BeRTOS
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00001 00042 #ifndef DRV_TIMER_MEGA_H 00043 #define DRV_TIMER_MEGA_H 00044 00045 #include <hw/hw_cpufreq.h> /* CPU_FREQ */ 00046 00047 #include "cfg/cfg_timer.h" /* CONFIG_TIMER */ 00048 #include <cfg/compiler.h> /* uint8_t */ 00049 #include <cfg/macros.h> /* DIV_ROUND */ 00050 00051 #include <avr/io.h> 00052 #include <avr/interrupt.h> 00053 00061 #define TIMER_ON_OUTPUT_COMPARE0 1 00062 #define TIMER_ON_OVERFLOW1 2 00063 #define TIMER_ON_OUTPUT_COMPARE2 3 00064 #define TIMER_ON_OVERFLOW3 4 00065 00066 #define TIMER_DEFAULT TIMER_ON_OUTPUT_COMPARE0 ///< Default system timer 00067 00068 /* 00069 * Hardware dependent timer initialization. 00070 */ 00071 #if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0) 00072 00073 #define TIMER_PRESCALER 64 00074 #define TIMER_HW_BITS 8 00075 #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA2560 00076 #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER0_COMPA_vect) 00077 #else 00078 #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER0_COMP_vect) 00079 #endif 00080 #define TIMER_TICKS_PER_SEC 1000 00081 #define TIMER_HW_CNT OCR_DIVISOR 00082 00084 typedef uint8_t hptime_t; 00085 #define SIZEOF_HPTIME_T 1 00086 00087 INLINE hptime_t timer_hw_hpread(void) 00088 { 00089 return TCNT0; 00090 } 00091 00092 #elif (CONFIG_TIMER == TIMER_ON_OVERFLOW1) 00093 00094 #define TIMER_PRESCALER 1 00095 #define TIMER_HW_BITS 8 00096 00097 #define TIMER_HW_CNT (1 << TIMER_HW_BITS) 00098 #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER1_OVF_vect) 00099 #define TIMER_TICKS_PER_SEC DIV_ROUND(TIMER_HW_HPTICKS_PER_SEC, TIMER_HW_CNT) 00100 00102 typedef uint16_t hptime_t; 00103 #define SIZEOF_HPTIME_T 2 00104 00105 INLINE hptime_t timer_hw_hpread(void) 00106 { 00107 return TCNT1; 00108 } 00109 00110 #elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2) 00111 00112 #define TIMER_PRESCALER 64 00113 #define TIMER_HW_BITS 8 00114 #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA2560 00115 #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER2_COMPA_vect) 00116 #else 00117 #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER2_COMP_vect) 00118 #endif 00119 #define TIMER_TICKS_PER_SEC 1000 00120 00121 #define TIMER_HW_CNT OCR_DIVISOR 00122 00124 typedef uint8_t hptime_t; 00125 #define SIZEOF_HPTIME_T 1 00126 00127 INLINE hptime_t timer_hw_hpread(void) 00128 { 00129 return TCNT2; 00130 } 00131 00132 #elif (CONFIG_TIMER == TIMER_ON_OVERFLOW3) 00133 00134 #define TIMER_PRESCALER 1 00135 #define TIMER_HW_BITS 8 00136 00137 #define TIMER_HW_CNT (1 << TIMER_HW_BITS) 00138 #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER3_OVF_vect) 00139 #define TIMER_TICKS_PER_SEC DIV_ROUND(TIMER_HW_HPTICKS_PER_SEC, TIMER_HW_CNT) 00140 00142 typedef uint16_t hptime_t; 00143 #define SIZEOF_HPTIME_T 2 00144 00145 INLINE hptime_t timer_hw_hpread(void) 00146 { 00147 return TCNT3; 00148 } 00149 00150 #else 00151 00152 #error Unimplemented value for CONFIG_TIMER 00153 #endif /* CONFIG_TIMER */ 00154 00155 00157 #define TIMER_HW_HPTICKS_PER_SEC DIV_ROUND(CPU_FREQ, TIMER_PRESCALER) 00158 00163 #define OCR_DIVISOR (DIV_ROUND(DIV_ROUND(CPU_FREQ, TIMER_PRESCALER), TIMER_TICKS_PER_SEC) - 1) 00164 00166 #define timer_hw_irq() do {} while (0) 00167 00169 #define timer_hw_triggered() (true) 00170 00171 void timer_hw_init(void); 00172 00173 #endif /* DRV_TIMER_MEGA_H */