BeRTOS
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ARM UART and SPI I/O driver. More...
#include "hw/hw_ser.h"
#include <hw/hw_cpufreq.h>
#include "cfg/cfg_ser.h"
#include <cfg/debug.h>
#include <io/arm.h>
#include <cpu/attr.h>
#include <drv/ser.h>
#include <drv/ser_p.h>
#include <struct/fifobuf.h>
Go to the source code of this file.
Data Structures | |
struct | ArmSerial |
Internal hardware state structure. More... | |
Defines | |
#define | SERIRQ_PRIORITY 4 |
default priority for serial irqs. | |
Overridable serial bus hooks | |
These can be redefined in hw.h to implement special bus policies such as half-duplex, 485, etc. TXBEGIN TXCHAR TXEND TXOFF | __________|__________ | | | | | | | | | | | v v v v v v v v v ______ __ __ __ __ __ __ ________________ \/ \/ \/ \/ \/ \/ \/ ______/\__/\__/\__/\__/\__/\__/ | |
#define | SER_UART0_BUS_TXINIT |
Default TXINIT macro - invoked in uart0_init() | |
#define | SER_UART0_BUS_TXBEGIN |
Invoked before starting a transmission. | |
#define | SER_UART0_BUS_TXCHAR(c) |
Invoked to send one character. | |
#define | SER_UART0_BUS_TXEND |
Invoked as soon as the txfifo becomes empty. | |
#define | SER_UART1_BUS_TXINIT |
Default TXINIT macro - invoked in uart1_init() | |
#define | SER_UART1_BUS_TXBEGIN |
Invoked before starting a transmission. | |
#define | SER_UART1_BUS_TXCHAR(c) |
Invoked to send one character. | |
#define | SER_UART1_BUS_TXEND |
Invoked as soon as the txfifo becomes empty. | |
Overridable SPI hooks | |
These can be redefined in hw.h to implement special bus policies such as slave select pin handling, etc. | |
#define | SER_SPI0_BUS_TXINIT |
Default TXINIT macro - invoked in spi_init() The default is no action. | |
#define | SER_SPI0_BUS_TXCLOSE |
Invoked after the last character has been transmitted. | |
Functions | |
void | uart0_irq_tx (void) |
Serial 0 TX interrupt handler. | |
void | uart0_irq_rx (void) |
Serial 0 RX complete interrupt handler. | |
static | DECLARE_ISR (uart0_irq_dispatcher) |
Serial IRQ dispatcher for USART0. | |
void | uart1_irq_tx (void) |
Serial 1 TX interrupt handler. | |
void | uart1_irq_rx (void) |
Serial 1 RX complete interrupt handler. | |
static | DECLARE_ISR (uart1_irq_dispatcher) |
Serial IRQ dispatcher for USART1. | |
static | DECLARE_ISR (spi0_irq_handler) |
SPI0 interrupt handler. |
ARM UART and SPI I/O driver.
Definition in file ser_at91.c.
#define SER_SPI0_BUS_TXCLOSE |
Invoked after the last character has been transmitted.
The default is no action.
Definition at line 180 of file ser_at91.c.
#define SER_UART0_BUS_TXINIT |
Default TXINIT macro - invoked in uart0_init()
Definition at line 89 of file ser_at91.c.
#define SER_UART1_BUS_TXINIT |
Default TXINIT macro - invoked in uart1_init()
Definition at line 129 of file ser_at91.c.