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Atmel SAM3 enhanced embedded flash controller definitions. More...
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Defines | |
#define | EEFC0_BASE 0x400E0A00 |
EEFC base registers addresses. | |
#define | EEFC_FMR_OFF 0x0 |
EFC register offsets. | |
#define | EEFC_FCR_OFF 0x4 |
Flash Command Register. | |
#define | EEFC_FSR_OFF 0x8 |
Flash Status Register. | |
#define | EEFC_FRR_OFF 0xC |
Flash Result Register. | |
#define | EEFC0_FMR (*((reg32_t *)(EEFC0_BASE + EEFC_FMR_OFF))) |
EEFC registers. | |
#define | EEFC0_FCR (*((reg32_t *)(EEFC0_BASE + EEFC_FCR_OFF))) |
Flash Command Register. | |
#define | EEFC0_FSR (*((reg32_t *)(EEFC0_BASE + EEFC_FSR_OFF))) |
Flash Status Register. | |
#define | EEFC0_FRR (*((reg32_t *)(EEFC0_BASE + EEFC_FRR_OFF))) |
Flash Result Register. | |
#define | EEFC_FMR_FRDY 0 |
Defines for bit fields in EEFC_FMR register. | |
#define | EEFC_FMR_FWS_SHIFT 8 |
Defines for bit fields in EEFC_FMR register. | |
#define | EEFC_FMR_FWS_MASK (0xf << EEFC_FMR_FWS_SHIFT) |
Flash Wait State. | |
#define | EEFC_FMR_FWS(value) (EEFC_FMR_FWS_MASK & ((value) << EEFC_FMR_FWS_SHIFT)) |
Defines for bit fields in EEFC_FMR register. | |
#define | EEFC_FMR_FAM 24 |
Flash Access Mode. | |
#define | EEFC_FCR_FCMD_MASK 0xff |
Defines for bit fields in EEFC_FCR register. | |
#define | EEFC_FCR_FCMD(value) (EEFC_FCR_FCMD_MASK & (value)) |
Defines for bit fields in EEFC_FCR register. | |
#define | EEFC_FCR_FARG_SHIFT 8 |
Defines for bit fields in EEFC_FCR register. | |
#define | EEFC_FCR_FARG_MASK (0xffff << EEFC_FCR_FARG_SHIFT) |
Flash Command Argument. | |
#define | EEFC_FCR_FARG(value) (EEFC_FCR_FARG_MASK & ((value) << EEFC_FCR_FARG_SHIFT)) |
Defines for bit fields in EEFC_FCR register. | |
#define | EEFC_FCR_FKEY_SHIFT 24 |
Defines for bit fields in EEFC_FCR register. | |
#define | EEFC_FCR_FKEY_MASK (0xff << EEFC_FCR_FKEY_SHIFT) |
Flash Writing Protection Key. | |
#define | EEFC_FCR_FKEY(value) (EEFC_FCR_FKEY_MASK & ((value) << EEFC_FCR_FKEY_SHIFT)) |
Defines for bit fields in EEFC_FCR register. | |
#define | EEFC_FSR_FRDY 0 |
Defines for bit fields in EEFC_FSR register. | |
#define | EEFC_FSR_FCMDE 1 |
Flash Command Error Status. | |
#define | EEFC_FSR_FLOCKE 2 |
Flash Lock Error Status. |
Atmel SAM3 enhanced embedded flash controller definitions.
Definition in file sam3_flash.h.
#define EEFC0_FMR (*((reg32_t *)(EEFC0_BASE + EEFC_FMR_OFF))) |
#define EEFC_FCR_FARG | ( | value | ) | (EEFC_FCR_FARG_MASK & ((value) << EEFC_FCR_FARG_SHIFT)) |
Defines for bit fields in EEFC_FCR register.
Flash Command
Definition at line 98 of file sam3_flash.h.
#define EEFC_FCR_FARG_SHIFT 8 |
Defines for bit fields in EEFC_FCR register.
Flash Command
Definition at line 96 of file sam3_flash.h.
#define EEFC_FCR_FCMD | ( | value | ) | (EEFC_FCR_FCMD_MASK & (value)) |
Defines for bit fields in EEFC_FCR register.
Flash Command
Definition at line 95 of file sam3_flash.h.
#define EEFC_FCR_FCMD_MASK 0xff |
Defines for bit fields in EEFC_FCR register.
Flash Command
Definition at line 94 of file sam3_flash.h.
#define EEFC_FCR_FKEY | ( | value | ) | (EEFC_FCR_FKEY_MASK & ((value) << EEFC_FCR_FKEY_SHIFT)) |
Defines for bit fields in EEFC_FCR register.
Flash Command
Definition at line 101 of file sam3_flash.h.
#define EEFC_FCR_FKEY_SHIFT 24 |
Defines for bit fields in EEFC_FCR register.
Flash Command
Definition at line 99 of file sam3_flash.h.
#define EEFC_FMR_FRDY 0 |
Defines for bit fields in EEFC_FMR register.
Ready Interrupt Enable
Definition at line 83 of file sam3_flash.h.
#define EEFC_FMR_FWS | ( | value | ) | (EEFC_FMR_FWS_MASK & ((value) << EEFC_FMR_FWS_SHIFT)) |
Defines for bit fields in EEFC_FMR register.
Ready Interrupt Enable
Definition at line 86 of file sam3_flash.h.
#define EEFC_FMR_FWS_SHIFT 8 |
Defines for bit fields in EEFC_FMR register.
Ready Interrupt Enable
Definition at line 84 of file sam3_flash.h.
#define EEFC_FMR_OFF 0x0 |
#define EEFC_FSR_FRDY 0 |
Defines for bit fields in EEFC_FSR register.
Flash Ready Status
Definition at line 108 of file sam3_flash.h.