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Defines
lm3s_memmap.h File Reference

LM3S1968 memory map. More...

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Defines

#define WATCHDOG_BASE   0x40000000
 The following definitions are deprecated.
#define FLASH_BASE   0x00000000
 The following are defines for the base address of the memories and peripherals.
#define SRAM_BASE   0x20000000
 The following are defines for the base address of the memories and peripherals.
#define WATCHDOG0_BASE   0x40000000
 The following are defines for the base address of the memories and peripherals.
#define WATCHDOG1_BASE   0x40001000
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTA_BASE   0x40004000
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTB_BASE   0x40005000
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTC_BASE   0x40006000
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTD_BASE   0x40007000
 The following are defines for the base address of the memories and peripherals.
#define SSI0_BASE   0x40008000
 The following are defines for the base address of the memories and peripherals.
#define SSI1_BASE   0x40009000
 The following are defines for the base address of the memories and peripherals.
#define UART0_BASE   0x4000C000
 The following are defines for the base address of the memories and peripherals.
#define UART1_BASE   0x4000D000
 The following are defines for the base address of the memories and peripherals.
#define UART2_BASE   0x4000E000
 The following are defines for the base address of the memories and peripherals.
#define I2C0_MASTER_BASE   0x40020000
 The following are defines for the base address of the memories and peripherals.
#define I2C0_SLAVE_BASE   0x40020800
 The following are defines for the base address of the memories and peripherals.
#define I2C1_MASTER_BASE   0x40021000
 The following are defines for the base address of the memories and peripherals.
#define I2C1_SLAVE_BASE   0x40021800
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTE_BASE   0x40024000
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTF_BASE   0x40025000
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTG_BASE   0x40026000
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTH_BASE   0x40027000
 The following are defines for the base address of the memories and peripherals.
#define PWM_BASE   0x40028000
 The following are defines for the base address of the memories and peripherals.
#define QEI0_BASE   0x4002C000
 The following are defines for the base address of the memories and peripherals.
#define QEI1_BASE   0x4002D000
 The following are defines for the base address of the memories and peripherals.
#define TIMER0_BASE   0x40030000
 The following are defines for the base address of the memories and peripherals.
#define TIMER1_BASE   0x40031000
 The following are defines for the base address of the memories and peripherals.
#define TIMER2_BASE   0x40032000
 The following are defines for the base address of the memories and peripherals.
#define TIMER3_BASE   0x40033000
 The following are defines for the base address of the memories and peripherals.
#define ADC0_BASE   0x40038000
 The following are defines for the base address of the memories and peripherals.
#define ADC1_BASE   0x40039000
 The following are defines for the base address of the memories and peripherals.
#define COMP_BASE   0x4003C000
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTJ_BASE   0x4003D000
 The following are defines for the base address of the memories and peripherals.
#define CAN0_BASE   0x40040000
 The following are defines for the base address of the memories and peripherals.
#define CAN1_BASE   0x40041000
 The following are defines for the base address of the memories and peripherals.
#define CAN2_BASE   0x40042000
 The following are defines for the base address of the memories and peripherals.
#define ETH_BASE   0x40048000
 The following are defines for the base address of the memories and peripherals.
#define MAC_BASE   0x40048000
 The following are defines for the base address of the memories and peripherals.
#define USB0_BASE   0x40050000
 The following are defines for the base address of the memories and peripherals.
#define I2S0_BASE   0x40054000
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTA_AHB_BASE   0x40058000
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTB_AHB_BASE   0x40059000
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTC_AHB_BASE   0x4005A000
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTD_AHB_BASE   0x4005B000
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTE_AHB_BASE   0x4005C000
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTF_AHB_BASE   0x4005D000
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTG_AHB_BASE   0x4005E000
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTH_AHB_BASE   0x4005F000
 The following are defines for the base address of the memories and peripherals.
#define GPIO_PORTJ_AHB_BASE   0x40060000
 The following are defines for the base address of the memories and peripherals.
#define EPI0_BASE   0x400D0000
 The following are defines for the base address of the memories and peripherals.
#define HIB_BASE   0x400FC000
 The following are defines for the base address of the memories and peripherals.
#define FLASH_CTRL_BASE   0x400FD000
 The following are defines for the base address of the memories and peripherals.
#define SYSCTL_BASE   0x400FE000
 The following are defines for the base address of the memories and peripherals.
#define UDMA_BASE   0x400FF000
 The following are defines for the base address of the memories and peripherals.
#define ITM_BASE   0xE0000000
 The following are defines for the base address of the memories and peripherals.
#define DWT_BASE   0xE0001000
 The following are defines for the base address of the memories and peripherals.
#define FPB_BASE   0xE0002000
 The following are defines for the base address of the memories and peripherals.
#define NVIC_BASE   0xE000E000
 The following are defines for the base address of the memories and peripherals.
#define TPIU_BASE   0xE0040000
 The following are defines for the base address of the memories and peripherals.

Detailed Description

LM3S1968 memory map.

Definition in file lm3s_memmap.h.