BeRTOS
at91_pit.h File Reference
#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define PIT_MR_OFF   0x00000000
 Periodic Inverval Timer Mode Register.
#define PIT_MR   (*((reg32_t *)(PIT_BASE + PIT_MR_OFF)))
 Mode register address.
#define PIV_MASK   0x000FFFFF
 Periodic interval value mask.
#define PIV_SHIFT   0
 Periodic interval value shift.
#define PITEN   24
 Periodic interval timer enable.
#define PITIEN   25
 Periodic interval timer interrupt enable.
#define PIT_SR_OFF   0x00000004
 Periodic Inverval Timer Status Register.
#define PIT_SR   (*((reg32_t *)(PIT_BASE + PIT_SR_OFF)))
 Status register address.
#define PITS   0
 Timer has reached PIV.
#define PIVR_OFF   0x00000008
 Periodic Inverval Timer Value and Image Registers.
#define PIVR   (*((reg32_t *)(PIT_BASE + PIVR_OFF)))
 Value register address.
#define PIIR_OFF   0x0000000C
 Image register offset.
#define PIIR   (*((reg32_t *)(PIT_BASE + PIIR_OFF)))
 Image register address.
#define CPIV_MASK   0x000FFFFF
 Current periodic interval value mask.
#define CPIV_SHIFT   0
 Current periodic interval value SHIFT.
#define PICNT_MASK   0xFFF00000
 Periodic interval counter mask.
#define PICNT_SHIFT   20
 Periodic interval counter LSB.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

AT91 periodic interval timer. This file is based on NUT/OS implementation. See license below.

Definition in file at91_pit.h.


Define Documentation

#define PIT_MR_OFF   0x00000000

Periodic Inverval Timer Mode Register.

Mode register offset.

Definition at line 80 of file at91_pit.h.

#define PIT_SR_OFF   0x00000004

Periodic Inverval Timer Status Register.

Status register offset.

Definition at line 93 of file at91_pit.h.

#define PIVR_OFF   0x00000008

Periodic Inverval Timer Value and Image Registers.

Value register offset.

Definition at line 103 of file at91_pit.h.