BeRTOS
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00001 00038 #include <cfg/cfg_debug.h> 00039 #include <cfg/macros.h> /* for BV() */ 00040 #include <drv/clock_lm3s.h> /* lm3s_busyWait() */ 00041 #include <drv/gpio_lm3s.h> 00042 #include <drv/ser_lm3s.h> 00043 #include "kdebug_lm3s.h" 00044 00045 #if CONFIG_KDEBUG_PORT == 0 00046 #define UART_BASE UART0_BASE 00047 #define UART_GPIO_BASE GPIO_PORTA_BASE 00048 #define UART_PINS (BV(1) | BV(0)) 00049 #define UART_REG_SYSCTL SYSCTL_RCGC2_GPIOA 00050 #elif CONFIG_KDEBUG_PORT == 1 00051 #define UART_BASE UART1_BASE 00052 #define UART_GPIO_BASE GPIO_PORTD_BASE 00053 #define UART_PINS (BV(3) | BV(2)) 00054 #define UART_REG_SYSCTL SYSCTL_RCGC2_GPIOD 00055 #elif CONFIG_KDEBUG_PORT == 2 00056 #define UART_BASE UART2_BASE 00057 #define UART_GPIO_BASE GPIO_PORTG_BASE 00058 #define UART_PINS (BV(1) | BV(0)) 00059 #define UART_REG_SYSCTL SYSCTL_RCGC2_GPIOG 00060 #else 00061 #error "UART port not supported in this board" 00062 #endif 00063 00064 #define KDBG_WAIT_READY() while (!lm3s_uartReady(UART_BASE)) {} 00065 #define KDBG_WAIT_TXDONE() while (!lm3s_uartTxDone(UART_BASE)) {} 00066 00067 #define KDBG_WRITE_CHAR(c) do { lm3s_uartPutCharNonBlocking(UART_BASE, c); } while(0) 00068 00069 /* Debug unit is used only for debug purposes so does not generate interrupts. */ 00070 #define KDBG_MASK_IRQ(old) do { (void)old; } while(0) 00071 00072 /* Debug unit is used only for debug purposes so does not generate interrupts. */ 00073 #define KDBG_RESTORE_IRQ(old) do { (void)old; } while(0) 00074 00075 typedef uint32_t kdbg_irqsave_t; 00076 00077 INLINE void uart_hw_config(void) 00078 { 00079 unsigned long div, baud = CONFIG_KDEBUG_BAUDRATE; 00080 bool hi_speed = false; 00081 00082 if (baud * 16 > CPU_FREQ) 00083 { 00084 hi_speed = true; 00085 baud /= 2; 00086 } 00087 div = (CPU_FREQ * 8 / baud + 1) / 2; 00088 00089 lm3s_uartDisable(UART_BASE); 00090 if (hi_speed) 00091 HWREG(UART_BASE + UART_O_CTL) |= UART_CTL_HSE; 00092 else 00093 HWREG(UART_BASE + UART_O_CTL) &= ~UART_CTL_HSE; 00094 /* Set the baud rate */ 00095 HWREG(UART_BASE + UART_O_IBRD) = div / 64; 00096 HWREG(UART_BASE + UART_O_FBRD) = div % 64; 00097 /* Set word lenght and parity */ 00098 HWREG(UART_BASE + UART_O_LCRH) = UART_LCRH_WLEN_8; 00099 lm3s_uartClear(UART_BASE); 00100 lm3s_uartEnable(UART_BASE); 00101 } 00102 00103 INLINE void kdbg_hw_init(void) 00104 { 00105 uint32_t reg_clock = 1 << CONFIG_KDEBUG_PORT; 00106 00107 /* Enable the peripheral clock */ 00108 SYSCTL_RCGC1_R |= reg_clock; 00109 SYSCTL_RCGC2_R |= UART_REG_SYSCTL; 00110 lm3s_busyWait(512); 00111 00112 /* Configure GPIO pins to work as UART pins */ 00113 lm3s_gpioPinConfig(UART_GPIO_BASE, UART_PINS, 00114 GPIO_DIR_MODE_HW, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD); 00115 00116 /* Low-level UART configuration */ 00117 uart_hw_config(); 00118 }