BeRTOS
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00001 00038 #ifndef SER_STM32_H 00039 #define SER_STM32_H 00040 00041 #include <cfg/debug.h> 00042 00043 #include <cpu/power.h> /* cpu_relax() */ 00044 00045 #include <io/stm32.h> 00046 00047 /* Serial hardware numbers */ 00048 enum 00049 { 00050 SER_UART1 = 0, 00051 SER_UART2, 00052 #if CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE 00053 SER_UART3, 00054 #endif 00055 SER_CNT //< Number of serial ports 00056 }; 00057 00058 /* Software errors */ 00059 #define SERRF_RXFIFOOVERRUN BV(6) //< Rx FIFO buffer overrun 00060 #define SERRF_RXTIMEOUT BV(5) //< Receive timeout 00061 #define SERRF_TXTIMEOUT BV(4) //< Transmit timeout 00062 00063 /* 00064 * Hardware errors. 00065 */ 00066 #define SERRF_RXSROVERRUN SR_ORE //< Input overrun 00067 #define SERRF_FRAMEERROR SR_FE //< Stop bit missing 00068 #define SERRF_PARITYERROR SR_PE //< Parity error 00069 #define SERRF_NOISEERROR SR_NE //< Noise error 00070 00071 /* Serial error/status flags */ 00072 typedef uint32_t serstatus_t; 00073 00074 INLINE void stm32_uartDisable(uint32_t base) 00075 { 00076 struct stm32_usart *_base = (struct stm32_usart *)base; 00077 _base->CR1 &= ~CR1_RUN_RESET; 00078 } 00079 00080 INLINE void stm32_uartEnable(uint32_t base) 00081 { 00082 struct stm32_usart *_base = (struct stm32_usart *)base; 00083 _base->CR1 |= CR1_RUN_SET; 00084 } 00085 00086 /* Clear the flags register */ 00087 INLINE void stm32_uartClear(uint32_t base) 00088 { 00089 struct stm32_usart *_base = (struct stm32_usart *)base; 00090 _base->SR &= ~USART_FLAG_MASK; 00091 } 00092 00093 INLINE bool stm32_uartTxDone(uint32_t base) 00094 { 00095 struct stm32_usart *_base = (struct stm32_usart *)base; 00096 return (_base->SR & USART_FLAG_TC); 00097 } 00098 00099 INLINE bool stm32_uartTxReady(uint32_t base) 00100 { 00101 struct stm32_usart *_base = (struct stm32_usart *)base; 00102 return (_base->SR & (BV(CR1_TXEIE) | BV(CR1_TCIE))); 00103 } 00104 00105 INLINE bool stm32_uartRxReady(uint32_t base) 00106 { 00107 struct stm32_usart *_base = (struct stm32_usart *)base; 00108 return (_base->SR & BV(CR1_RXNEIE)); 00109 } 00110 00111 INLINE int stm32_uartPutChar(uint32_t base, unsigned char c) 00112 { 00113 struct stm32_usart *_base = (struct stm32_usart *)base; 00114 while (!stm32_uartTxReady(base)) 00115 cpu_relax(); 00116 _base->DR = c; 00117 return c; 00118 } 00119 00120 INLINE int stm32_uartGetChar(uint32_t base) 00121 { 00122 struct stm32_usart * _base = (struct stm32_usart *)base; 00123 return _base->DR; 00124 } 00125 00126 void stm32_uartSetBaudRate(uint32_t base, unsigned long baud); 00127 void stm32_uartSetParity(uint32_t base, int parity); 00128 void stm32_uartInit(int port); 00129 00130 #endif /* SER_STM32_H */