BeRTOS
timer_at91.h
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00001 
00038 #ifndef DRV_AT91_TIMER_H
00039 #define DRV_AT91_TIMER_H
00040 
00041 #include <hw/hw_cpufreq.h>     /* CPU_FREQ */
00042 
00043 #include "cfg/cfg_timer.h"     /* CONFIG_TIMER */
00044 #include <cfg/compiler.h>      /* uint8_t */
00045 #include <cfg/macros.h>        /* BV */
00046 
00047 #include <io/arm.h>
00048 
00056 #define TIMER_ON_PIT 1  ///< System timer on Periodic interval timer
00057 
00058 #define TIMER_DEFAULT TIMER_ON_PIT  ///< Default system timer
00059 
00060 /*
00061  * Hardware dependent timer initialization.
00062  */
00063 #if (CONFIG_TIMER == TIMER_ON_PIT)
00064 
00065     /*
00066      * On ARM all system IRQs are handled by the sysirq_dispatcher, so the actual
00067      * timer handler can be treated like any other normal routine.
00068      */
00069     #define DEFINE_TIMER_ISR    void timer_handler(void);   \
00070                     void timer_handler(void)
00071 
00072     #define TIMER_TICKS_PER_SEC  1000
00073     #define TIMER_HW_CNT         (CPU_FREQ / (16 * TIMER_TICKS_PER_SEC) - 1)
00074 
00076     #define TIMER_HW_HPTICKS_PER_SEC (CPU_FREQ / 16)
00077 
00079     typedef uint32_t hptime_t;
00080     #define SIZEOF_HPTIME_T 4
00081 
00082     INLINE void timer_hw_irq(void)
00083     {
00084         /* Reset counters, this is needed to reset timer and interrupt flags */
00085         uint32_t dummy = PIVR;
00086         (void) dummy;
00087     }
00088 
00089     INLINE bool timer_hw_triggered(void)
00090     {
00091         return PIT_SR & BV(PITS);
00092     }
00093 
00094     INLINE hptime_t timer_hw_hpread(void)
00095     {
00096         /* In the upper part of PIT_PIIR there is unused data */
00097         return PIIR & CPIV_MASK;
00098     }
00099 
00100 #else
00101 
00102     #error Unimplemented value for CONFIG_TIMER
00103 #endif /* CONFIG_TIMER */
00104 
00105 void timer_hw_init(void);
00106 
00107 
00108 #endif /* DRV_TIMER_AT91_H */