BeRTOS
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00001 00036 #ifndef SAM3_H 00037 #define SAM3_H 00038 00039 #include <cpu/detect.h> 00040 #include <cfg/compiler.h> 00041 00042 /* 00043 * Peripherals IDs. 00044 */ 00045 /*\{*/ 00046 #if CPU_CM3_SAM3N 00047 #define SUPC_ID 0 ///< Supply Controller (SUPC) 00048 #define RSTC_ID 1 ///< Reset Controller (RSTC) 00049 #define RTC_ID 2 ///< Real Time Clock (RTC) 00050 #define RTT_ID 3 ///< Real Time Timer (RTT) 00051 #define WDT_ID 4 ///< Watchdog Timer (WDT) 00052 #define PMC_ID 5 ///< Power Management Controller (PMC) 00053 #define EEFC0_ID 6 ///< Enhanced Flash Controller 00054 #define UART0_ID 8 ///< UART 0 (UART0) 00055 #define UART1_ID 9 ///< UART 1 (UART1) 00056 #define PIOA_ID 11 ///< Parallel I/O Controller A (PIOA) 00057 #define PIOB_ID 12 ///< Parallel I/O Controller B (PIOB) 00058 #define PIOC_ID 13 ///< Parallel I/O Controller C (PIOC) 00059 #define US0_ID 14 ///< USART 0 (USART0) 00060 #define US1_ID 15 ///< USART 1 (USART1) 00061 #define TWI0_ID 19 ///< Two Wire Interface 0 (TWI0) 00062 #define TWI1_ID 20 ///< Two Wire Interface 1 (TWI1) 00063 #define SPI0_ID 21 ///< Serial Peripheral Interface (SPI) 00064 #define TC0_ID 23 ///< Timer/Counter 0 (TC0) 00065 #define TC1_ID 24 ///< Timer/Counter 1 (TC1) 00066 #define TC2_ID 25 ///< Timer/Counter 2 (TC2) 00067 #define TC3_ID 26 ///< Timer/Counter 3 (TC3) 00068 #define TC4_ID 27 ///< Timer/Counter 4 (TC4) 00069 #define TC5_ID 28 ///< Timer/Counter 5 (TC5) 00070 #define ADC_ID 29 ///< Analog To Digital Converter (ADC) 00071 #define DACC_ID 30 ///< Digital To Analog Converter (DACC) 00072 #define PWM_ID 31 ///< Pulse Width Modulation (PWM) 00073 #elif CPU_CM3_SAM3X 00074 #define SUPC_ID 0 ///< Supply Controller (SUPC) 00075 #define RSTC_ID 1 ///< Reset Controller (RSTC) 00076 #define RTC_ID 2 ///< Real Time Clock (RTC) 00077 #define RTT_ID 3 ///< Real Time Timer (RTT) 00078 #define WDT_ID 4 ///< Watchdog Timer (WDT) 00079 #define PMC_ID 5 ///< Power Management Controller (PMC) 00080 #define EEFC0_ID 6 ///< Enhanced Flash Controller 00081 #define EEFC1_ID 7 ///< Enhanced Flash Controller 00082 #define UART0_ID 8 ///< UART 0 (UART0) 00083 #define SMC_SDRAMC_ID 9 ///< Satic memory controller / SDRAM controller 00084 #define SDRAMC_ID 10 ///< Satic memory controller / SDRAM controller 00085 #define PIOA_ID 11 ///< Parallel I/O Controller A 00086 #define PIOB_ID 12 ///< Parallel I/O Controller B 00087 #define PIOC_ID 13 ///< Parallel I/O Controller C 00088 #define PIOD_ID 14 ///< Parallel I/O Controller D 00089 #define PIOE_ID 15 ///< Parallel I/O Controller E 00090 #define PIOF_ID 16 ///< Parallel I/O Controller F 00091 #define US0_ID 17 ///< USART 0 00092 #define US1_ID 18 ///< USART 1 00093 #define US2_ID 19 ///< USART 2 00094 #define US3_ID 20 ///< USART 3 00095 #define HSMCI_ID 21 ///< High speed multimedia card interface 00096 #define TWI0_ID 22 ///< Two Wire Interface 0 00097 #define TWI1_ID 23 ///< Two Wire Interface 1 00098 #define SPI0_ID 24 ///< Serial Peripheral Interface 00099 #define SPI1_ID 25 ///< Serial Peripheral Interface 00100 #define SSC_ID 26 ///< Synchronous serial controller 00101 #define TC0_ID 27 ///< Timer/Counter 0 00102 #define TC1_ID 28 ///< Timer/Counter 1 00103 #define TC2_ID 29 ///< Timer/Counter 2 00104 #define TC3_ID 30 ///< Timer/Counter 3 00105 #define TC4_ID 31 ///< Timer/Counter 4 00106 #define TC5_ID 32 ///< Timer/Counter 5 00107 #define TC6_ID 33 ///< Timer/Counter 6 00108 #define TC7_ID 34 ///< Timer/Counter 7 00109 #define TC8_ID 35 ///< Timer/Counter 8 00110 #define PWM_ID 36 ///< Pulse width modulation controller 00111 #define ADC_ID 37 ///< ADC controller 00112 #define DACC_ID 38 ///< DAC controller 00113 #define DMAC_ID 39 ///< DMA controller 00114 #define UOTGHS_ID 40 ///< USB OTG high speed 00115 #define TRNG_ID 41 ///< True random number generator 00116 #define EMAC_ID 42 ///< Ethernet MAC 00117 #define CAN0_ID 43 ///< CAN controller 0 00118 #define CAN1_ID 44 ///< CAN controller 1 00119 #else 00120 #error Peripheral IDs undefined 00121 #endif 00122 /*\}*/ 00123 00124 /* 00125 * Hardware features for drivers. 00126 */ 00127 #define USART_HAS_PDC 1 00128 #define SPI_HAS_PDC 1 00129 00130 #if CPU_CM3_SAM3X || CPU_CM3_SAM3U 00131 #define USART_PORTS 1 00132 #define UART_PORTS 4 00133 #elif CPU_CM3_SAM3N || CPU_CM3_SAM3S 00134 #define USART_PORTS 2 00135 #define UART_PORTS 2 00136 #else 00137 #error undefined U(S)ART_PORTS for this cpu 00138 #endif 00139 00140 /* PDC registers */ 00141 #define PERIPH_RPR_OFF 0x100 // Receive Pointer Register. 00142 #define PERIPH_RCR_OFF 0x104 // Receive Counter Register. 00143 #define PERIPH_TPR_OFF 0x108 // Transmit Pointer Register. 00144 #define PERIPH_TCR_OFF 0x10C // Transmit Counter Register. 00145 #define PERIPH_RNPR_OFF 0x110 // Receive Next Pointer Register. 00146 #define PERIPH_RNCR_OFF 0x114 // Receive Next Counter Register. 00147 #define PERIPH_TNPR_OFF 0x118 // Transmit Next Pointer Register. 00148 #define PERIPH_TNCR_OFF 0x11C // Transmit Next Counter Register. 00149 #define PERIPH_PTCR_OFF 0x120 // PDC Transfer Control Register. 00150 #define PERIPH_PTSR_OFF 0x124 // PDC Transfer Status Register. 00151 00152 #define PDC_RXTEN 0 00153 #define PDC_RXTDIS 1 00154 #define PDC_TXTEN 8 00155 #define PDC_TXTDIS 9 00156 00157 00158 #include "sam3_sysctl.h" 00159 #include "sam3_pmc.h" 00160 #include "sam3_smc.h" 00161 #include "sam3_sdramc.h" 00162 #include "sam3_ints.h" 00163 #include "sam3_pio.h" 00164 #include "sam3_nvic.h" 00165 #include "sam3_uart.h" 00166 #include "sam3_usart.h" 00167 #include "sam3_spi.h" 00168 #include "sam3_flash.h" 00169 #include "sam3_wdt.h" 00170 #include "sam3_emac.h" 00171 #include "sam3_rstc.h" 00172 #include "sam3_adc.h" 00173 #include "sam3_dacc.h" 00174 #include "sam3_tc.h" 00175 00179 /*\{*/ 00180 #if CPU_CM3_SAM3U 00181 #define UART0_PORT PIOA_BASE 00182 #define USART0_PORT PIOA_BASE 00183 #define USART1_PORT PIOA_BASE 00184 #define USART2_PORT PIOA_BASE 00185 #define USART3_PORT PIOC_BASE 00186 00187 #define UART0_PERIPH PIO_PERIPH_A 00188 #define USART0_PERIPH PIO_PERIPH_A 00189 #define USART1_PERIPH PIO_PERIPH_A 00190 #define USART2_PERIPH PIO_PERIPH_A 00191 #define USART3_PERIPH PIO_PERIPH_B 00192 00193 #define URXD0 11 00194 #define UTXD0 12 00195 #define RXD0 19 00196 #define TXD0 18 00197 #define RXD1 21 00198 #define TXD1 20 00199 #define RXD2 23 00200 #define TXD2 22 00201 #define RXD3 13 00202 #define TXD3 12 00203 #elif CPU_CM3_SAM3X 00204 #define UART0_PORT PIOA_BASE 00205 #define USART0_PORT PIOA_BASE 00206 #define USART1_PORT PIOA_BASE 00207 #define USART2_PORT PIOB_BASE 00208 #define USART3_PORT PIOD_BASE 00209 00210 #define UART0_PERIPH PIO_PERIPH_A 00211 #define USART0_PERIPH PIO_PERIPH_A 00212 #define USART1_PERIPH PIO_PERIPH_A 00213 #define USART2_PERIPH PIO_PERIPH_A 00214 #define USART3_PERIPH PIO_PERIPH_B 00215 00216 #define URXD0 8 00217 #define UTXD0 9 00218 #define RXD0 10 00219 #define TXD0 11 00220 #define RXD1 12 00221 #define TXD1 13 00222 #define RXD2 21 00223 #define TXD2 20 00224 #define RXD3 5 00225 #define TXD3 4 00226 #elif CPU_CM3_SAM3N || CPU_CM3_SAM3S 00227 #define UART0_PORT PIOA_BASE 00228 #define UART1_PORT PIOB_BASE 00229 #define USART0_PORT PIOA_BASE 00230 #define USART1_PORT PIOA_BASE 00231 00232 #define UART0_PERIPH PIO_PERIPH_A 00233 #define UART1_PERIPH PIO_PERIPH_A 00234 #define USART0_PERIPH PIO_PERIPH_A 00235 #define USART1_PERIPH PIO_PERIPH_A 00236 00237 #define URXD0 9 00238 #define UTXD0 10 00239 #define URXD1 2 00240 #define UTXD1 3 00241 #define RXD0 5 00242 #define TXD0 6 00243 #define RXD1 21 00244 #define TXD1 22 00245 #endif 00246 /*\}*/ 00247 00251 /*\{*/ 00252 #if CPU_CM3_SAM3U 00253 #define SPI0_SPCK 15 00254 #define SPI0_MOSI 14 00255 #define SPI0_MISO 13 00256 #elif CPU_CM3_SAM3X 00257 #define SPI0_SPCK 27 00258 #define SPI0_MOSI 26 00259 #define SPI0_MISO 25 00260 #else 00261 #define SPI0_SPCK 14 00262 #define SPI0_MOSI 13 00263 #define SPI0_MISO 12 00264 #endif 00265 /*\}*/ 00266 #endif /* SAM3_H */