i2c_software

i2c_software

Author Wouter van Ooijen, Copyright © 1998, 1999 Wouter van Ooijen
Adapted-by Joep Suijs.
Compiler >=2.4g

Description

Software implementation of I2C (single) master.





 Define i2c pins like:
alias i2c_scl            is pin_c3
alias i2c_scl_direction  is pin_c3_direction
alias i2c_sda            is pin_c4
alias i2c_sda_direction  is pin_c4_direction



const word _i2c_bus_speed = 1 ; * 100kHz


Dependencies


Summary

Global variables/contants

Procedures

Private

Functions


API details

Global variables/contants

Procedures

  • i2c_initialize()

    i2c_initialize - initialize the software i2c bus
    
    The output latch values are always low,
    the lines are switched open-collector fashion by 
    manipulating the direction registers.
    
    

  • i2c_stop()

    i2c_stop - output a stop condition
    
    
    

  • i2c_start()

    i2c_start - output a start condition
    
    
    

  • i2c_restart()

    i2c_restart - output a (re)start condition
    
    A restart is a start without a previous stop.
    This procedure is provided as part of the API to maintain compatibility 
    with the i2c hardware master lib.
    
    

Private
  • _i2c_bit_out(bit in x)

    _i2c_bit_out- output a single bit (for internal use only)
    
    
    

  • _i2c_bit_in(bit out x)

    _i2c_bit_in- input a single bit (for internal use only)
    
    
    

  • _i2c_wait()

    _i2c_wait - wait for a change to settle (for internal use only)
    
    The delay is determined by i2c_bus_speed and is 1/4 of the cycle time.
    Given the delay resolution of 1 us and all actions required by 
    i2c_software routines, the actual bus speed will be lower then the
    configured maximum.
    
    


Functions

  • i2c_transmit_byte( byte in x ) return bit

    i2c_transmit_byte - output one byte
    
    return true = okay, false = no ack received
    
    

  • i2c_receive_byte(bit in ack) return byte

    i2c_receive_byte - read one byte
    
    The ACK flag indicated if the byte read must be acked.
    In general, all bytes read by the master are acked, except the last one.
    Failing to NACK the last byte read will give unpredictable results.
    (Often it will provide repeatable sequences, where one out of 2 to 4 of 
    the reads from a specific device is correct. You are warned!)
    
    


Related samples

Here are the list of samples which use this library:

16f648a16f648a_lcd_hd44780_pcf8574.jal
16f648a16f648a_i2c_sw_master_echo.jal
16f648a16f648a_i2c_sw_l1.jal
16f648a16f648a_i2c_sw_l0.jal
16f648a16f648a_i2c_sw_master_check_bus.jal
16f648a16f648a_lcd_dsm0822a.jal
16f72316f723_lcd_dsm0822a.jal
16f72316f723_i2c_sw_master_echo.jal
16f72316f723_i2c_sw_l0.jal
16f72316f723_lcd_hd44780_pcf8574.jal
16f72316f723_i2c_sw_master_check_bus.jal
16f72316f723_i2c_sw_l1.jal
16f7316f73_i2c_sw_master_echo.jal
16f7316f73_i2c_sw_master_check_bus.jal
16f7316f73_lcd_hd44780_pcf8574.jal
16f7316f73_lcd_dsm0822a.jal
16f7316f73_i2c_sw_l0.jal
16f7316f73_i2c_sw_l1.jal
16f87716f877_i2c_sw_l1.jal
16f87716f877_lcd_dsm0822a.jal
16f87716f877_lcd_hd44780_pcf8574.jal
16f87716f877_24lc256.jal
16f87716f877_i2c_sw_master_echo.jal
16f87716f877_i2c_sw_l0.jal
16f87716f877_i2c_sw_master_check_bus.jal
16f877a16f877a_ds1307_sw.jal
16f877a16f877a_24lc256.jal
16f877a16f877a_lcd_dsm0822a.jal
16f877a16f877a_i2c_sw_master_check_bus.jal
16f877a16f877a_lcd_hd44780_pcf8574.jal
16f877a16f877a_i2c_sw_l1.jal
16f877a16f877a_i2c_sw_l0.jal
16f877a16f877a_servo_rc_master_dedicated_master_i2c.jal
16f877a16f877a_i2c_sw_master_echo.jal
16f8816f88_i2c_sw_master_check_bus.jal
16f8816f88_i2c_sw_l0.jal
16f8816f88_lcd_hd44780_pcf8574.jal
16f8816f88_lcd_dsm0822a.jal
16f8816f88_i2c_sw_master_echo.jal
16f8816f88_i2c_sw_l1.jal
18f14k5018f14k50_i2c_sw_master_check_bus.jal
18f14k5018f14k50_i2c_sw_master_echo.jal
18f14k5018f14k50_i2c_sw_l1.jal
18f14k5018f14k50_lcd_hd44780_pcf8574.jal
18f14k5018f14k50_i2c_sw_l0.jal
18f14k5018f14k50_lcd_dsm0822a.jal
18f245018f2450_i2c_sw_l0.jal
18f245018f2450_lcd_hd44780_pcf8574.jal
18f245018f2450_i2c_sw_master_echo.jal
18f245018f2450_i2c_sw_l1.jal
18f245018f2450_i2c_sw_master_check_bus.jal
18f245018f2450_lcd_dsm0822a.jal
18f252018f2520_lcd_hd44780_pcf8574.jal
18f252018f2520_i2c_sw_l0.jal
18f252018f2520_i2c_sw_l1.jal
18f252018f2520_lcd_dsm0822a.jal
18f252018f2520_i2c_sw_master_check_bus.jal
18f252018f2520_i2c_sw_master_echo.jal
18f255018f2550_lcd_dsm0822a.jal
18f255018f2550_i2c_sw_master_check_bus.jal
18f255018f2550_i2c_sw_l0.jal
18f255018f2550_i2c_sw_l1.jal
18f255018f2550_lcd_hd44780_pcf8574.jal
18f255018f2550_i2c_sw_master_echo.jal
18f262018f2620_i2c_sw_master_check_bus.jal
18f262018f2620_lcd_hd44780_pcf8574.jal
18f262018f2620_i2c_sw_master_echo.jal
18f262018f2620_i2c_sw_l1.jal
18f262018f2620_i2c_sw_l0.jal
18f262018f2620_lcd_dsm0822a.jal
18f45218f452_i2c_sw_master_echo.jal
18f45218f452_24lc256.jal
18f45218f452_pressure.jal
18f45218f452_i2c_sw_master_check_bus.jal
18f45218f452_i2c_sw_l1.jal
18f45218f452_lcd_hd44780_pcf8574.jal
18f45218f452_servo_rc_master_dedicated_master_i2c.jal
18f45218f452_i2c_sw_l0.jal
18f45218f452_lcd_dsm0822a.jal
18f452518f4525_24lc256.jal
18f455018f4550_lcd_hd44780_pcf8574.jal
18f455018f4550_lcd_dsm0822a.jal
18f455018f4550_i2c_sw_l0.jal
18f455018f4550_i2c_sw_l1.jal
18f455018f4550_i2c_sw_master_echo.jal
18f455018f4550_i2c_sw_master_check_bus.jal
18f455018f4550_24lc256.jal
18f462018f4620_servo_rc_master_dedicated_master_i2c.jal
18f462018f4620_i2c_sw_l1.jal
18f462018f4620_i2c_sw_l0.jal
18f462018f4620_lcd_hd44780_pcf8574.jal
18f462018f4620_lcd_dsm0822a.jal
18f462018f4620_24lc256.jal
18f462018f4620_i2c_sw_master_check_bus.jal
18f462018f4620_i2c_sw_master_echo.jal
18f67j5018f67j50_lcd_dsm0822a.jal
18f67j5018f67j50_i2c_sw_l0.jal
18f67j5018f67j50_i2c_sw_l1.jal
18f67j5018f67j50_lcd_hd44780_pcf8574.jal
18f67j5018f67j50_i2c_sw_master_check_bus.jal
18f67j5018f67j50_i2c_sw_master_echo.jal