BeRTOS: Main Page

BeRTOS
  • Main Page
  • Related Pages
  • Modules
  • Data Structures
  • Files
  • Directories
BeRTOS Documentation

Overview

BeRTOS is a real-time operating system designed for building applications for embedded systems, like reference boards, test boards, or custom boards.

It has a modular structure: its components can be used in very different environments, from 8-bit processor to Linux and Win32 hosted application (for debug purpose), using a wide range of compilers.

Have a look at A 5 minute introduction to BeRTOS page for a quick overview of the BeRTOS system.

History and Motivation

BeRTOS was born as a extremely modular, highly optimized and fine-tuned operating system for embedded programming. As a result, each module has its own scope and can be used alone or in cooperation with other modules. It's even possible to use most of the drivers without activating the kernel module.

We have grown it following our guidelines: simplicity and beauty. These guidelines made it possible to evolve it in a full-featured real time operating system, with more modularity than many other embedded OSes, without giving up reliability and performace.

To achieve the highest possible reusability, most BeRTOS components are designed for fine-grained modularity and minimal external dependencies. Most non-essential features can be configured out for applications with small memory footprint requirements.

The basic design principles are explained in the Object Oriented Programming page.

Features

  • multitasking kernel with IPC, semaphores, priority levels;
  • a comprehensive set of generic drivers for a wide range of devices, which can be easily customized to the actual hardware: timer, serial, adc, ntc, pwm, stepper motors, dc motors, lcd, keyboards, buzzer, eeprom;
  • full graphic subsystem for simple displays, with font support, bitmaps, clipping, text formatting, interactive menus;
  • simple console with command parser;
  • readline-like support for command history;
  • entropy generator and random numbers generator optimized for embedded systems;
  • checksumming and hashing functions (CRC, MD2);
  • full hash-table implementation with double-hashing collision resolution;
  • XMODEM protocol implementation;
  • RLE compression algorithm;

Directory Structure

The modules are sorted in subdirectories by their category:

  • app/ : demo applications;
  • bertos/algo/ : algorithms;
  • bertos/cfg/ : configuration stuff;
  • bertos/drv/ : hardware drivers;
  • bertos/dt/ : experimental object oriented gui toolkit;
  • bertos/emul/ : Qt-based emulator framework for embedded applications;
  • bertos/fonts/ : fonts;
  • bertos/fs/ : file system related stuff;
  • bertos/gfx/ : general purpose graphics routines;
  • bertos/gui/ : widgets for simple displays;
  • bertos/hw/ : hardware-specific declarations;
  • bertos/icons/ : conversion tool from image TXT format to LCD bitmap;
  • bertos/kern/ : multitasking kernel;
  • bertos/mware/ : algorithms, other standalone code;
  • bertos/struct/ : containers and other data structures;
  • bertos/os/ : OS-abstraction layers for hosted environments;
  • doc/ : documentation;

The top-level directory contains a few support headers that are meant to be usable by any C/C++ embedded or hosted application.

See the BeRTOS Development Status page for information about the various drivers.

License

BeRTOS is provided under the term of the GNU General Public License (see LICENSE.GPL) with following exception:

As a special exception, you may use this file as part of a free software
library without restriction.  Specifically, if other files instantiate
templates or use macros or inline functions from this file, or you compile
this file and link it with other files to produce an executable, this
file does not by itself cause the resulting executable to be covered by
the GNU General Public License.  This exception does not however
invalidate any other reasons why the executable file might be covered by
the GNU General Public License.


BeRTOS: Related Pages

  • Modules
  • Data Structures
  • Files
  • Directories
Related Pages
Here is a list of all related documentation pages:
  • Object Oriented Programming
  • A 5 minute introduction to BeRTOS
  • BeRTOS Development Status


BeRTOS: Object Oriented Programming

  • Directories
Object Oriented Programming

BeRTOS uses object oriented programming concepts for the base interfaces. If used in the right way, OOP elegantly solves a broad range of problems linked with the creation of common and reusable interfaces that allow you to save development time and precious memory space. Have a look at KFile tutorial on BeRTOS web site for a more complete introduction to object oriented programming.

OOP in C

Object oriented programming in C requires a context struct and a few interface functions that operate on that context. The base class is implemented with a struct with a few function pointers that point to the implementation specific for the context.

Inherited classes are created by defining a struct with the following members:

  • a base class member
  • context specific members

Then you can call interface functions by simply using the base class member as the context of the function. Note that base classes usually don't have an init function, because they are not meant to be used directly and it wouldn't make sense anyway, since they provide no functionality, only the interface. The usage pattern requires you to declare a context (eg. Flash), initialize the context with a specific function call (eg. flash_init()) then use the interface funtions to access the context.

To make an example, in BeRTOS the Serial driver is a derived class of the KFile interface. The KFile interface defines a few interface functions, which can be used to extract data from the Serial context.

// declare the serial context
Serial ser;
// read buffer
uint8_t buf[20];

int main()
{
   // initialize the serial driver
   ser_init(&ser, SER_UART0);
   ser_setbaudrate(115200);
   // now access using the interface functions
   // read...
   kfile_read(&ser.fd, buf, 20);
   // ...and write
   kfile_printf(&ser.fd, "Writing to serial using KFile interface...\n");
   // close the driver
   kfile_close(&ser.fd);
}


BeRTOS: A 5 minute introduction to BeRTOS

A 5 minute introduction to BeRTOS

Installing BeRTOS on your system

What do you need when developing an embedded project with BeRTOS?

  • a toolchain for your CPU
  • BeRTOS source code :)
  • supporting binaries for BeRTOS build system
  • supporting tools for BeRTOS Wizard

See the installation instructions page online for help on installing BeRTOS on your system.

Strictly speaking, BeRTOS doesn't need to be 'installed', you can just take .c files and compile them in your project.

However, BeRTOS is a complex system with many dependencies between modules. It's not easy to track the dependencies for each module, so we have developed a set of tools to make dependency tracking automatic.

Contact the support forum and look at the section Coding guidelines if you want help on using BeRTOS without the supporting tools. Be warned, though, that this method is not supported and we can only point you in the right direction.

Project's organization

Each project has its own full BeRTOS sources, configuration and HAL files. Why? Because we think that each project has its own life and it must not interfere with any other project. Let's say you use a shared BeRTOS version for all of your projects. Each time you update, you need to check that each and every project still works correctly. We don't want to do this (and I bet you don't want either). However, it's still easy to update a single project if you want to.

A project named Foo is organized as follows:

  • bertos/ - BeRTOS source directory
  • Makefile - BeRTOS build system Makefile
  • project.bertos - Wizard's configuration file
  • foo/ - your project's main directory
  • foo/hw/ - low level HAL files
  • foo/cfg/ - configuration directory
  • foo/foo_user.mk - makefile fragment that you can edit
  • foo/foo.mk - makefile fragment changed by the Wizard, don't edit

See BeRTOS HAL system for more information on HAL files.

Coding guidelines

BeRTOS assumes that the BeRTOS source directory and the project's root directory (as indicated above) are in the include path. This means that you should include configuration files using "..." rather than <...> style, otherwise you will use default configuration values instead of your project's values.

Also, you should change configuration settings using the Wizard. This is because sometimes there are more actions to be done than simply changing a define value.


BeRTOS: BeRTOS Development Status

BeRTOS Development Status

If you are looking for the list of BeRTOS ports or a detailed overview of all modules completeness and stability this is the right place.

BeRTOS is stable and it's used in production environments but it is also a very large project, so all of its parts may not be at the same level.

Table of contents:

  • Kernel
  • Core Drivers
  • MCU Internal peripheral drivers
  • Generic CPU independent drivers
  • File system
  • Graphic subsystem
  • Algorithms
  • Network protocols
  • Data Structures
  • Middleware

Kernel

BeRTOS features a cooperative kernel with synchronization primitives.

Embedded systems are mostly I/O bound systems. In these systems the microprocessor/microcontroller spends the most part of its computing power doing... absolutely nothing :-)

Since the system simply waits for external events to happen we decided to implement a strong and robust cooperative kernel with very low memory footprint and high modularity. This allows the kernel to be used on a variety of different CPUs, even the smaller ones. Currently the kernel code is very stable.

Kernel features :

  • Cooperative and preemptive round-robin scheduling.
  • Stack process monitor , useful to prevent stack overflows.
  • Inter-process messaging system (with very low overhead).
  • Binary semaphores .
  • Signals .

The kernel has a port layer (a single assembly function) that needs to be reimplemented each time a new CPU is added. Here is a list of currently available CPU family ports:

CPU Family | Port status
ARM7TDMI | Atmel AT91SAM7, NXP LPC2XXX
Cortex-M3 | Luminary Stellaris LM3S, ST Microelectronics STM32
Atmel AVR | Most cpu supported (including Arduino)
PowerPC | emulator
Intel/AMD x86 | emulator
Intel/AMD x86-64 | emulator

Core Drivers

BeRTOS is not only a kernel, it aims to supply full operating system services. To achieve this we need at least some core drivers for every CPU port.

These drivers are: system timer , debug system and serial comm driver .

Adding CPU support for an already present CPU family is quite simple since hardware manufacturers share peripherals design between the same CPU cores.

Core drivers are completely supported on all platforms.

MCU Internal peripheral drivers

Since BeRTOS aims to supply full operating system services, for every CPU port we try to implement as much drivers as possible. This section covers the current development status for MCU Internal peripheral drivers.

Driver / MCU family | ADC | UART | FLASH | I2C | PWM | SPI
Atmel AVR | Yes | Yes | Yes | Yes | Yes | Yes
Atmel AT91SAM7 ARM | Yes | Yes | Yes | Yes | Yes | Yes
Atmel AT91SAM3N ARM | - | Yes | - | - | - | -
STmicro STM32F103xx ARM | Yes | Yes | Yes | Yes | - | -
Philips LPC23XX ARM | - | Yes | Yes | Yes | - | -
Stellaris LM3S ARM | Yes | Yes | Yes | Yes | - | Yes

Generic CPU independent drivers

BeRTOS supplies a full set of CPU independent generic hardware drivers. To achieve this all drivers are structured to have an hardware abstraction layer (HAL) that isolate CPU specific code and makes porting to new CPU easy. Current driver list:

Driver | Status
ADC API | stable
Buzzer | stable
Atmel Dataflash | stable
I2C EEPROM | stable
AT25Fxxx Atmel flash memories | beta
FT245RL USB to parallel converter | beta
Keyboard | stable
I2C with bitbang support | stable
Displaytech 32122A Graphic LCD | stable
DC Motor with PID | stable
Alphanumeric LCD | stable
LM75 temperature sensor | stable
MPC41 digital potentiometer | stable
MPxx6115A pressure sensor | stable
NTC | stable
TRIAC phase partialization | stable
PWM API | beta
PCF85974 I2C port expander | beta
Secure Digital card API | stable
Serial API | stable
Bitbanged SPI | stable
TAS5706A digital audio DSP | stable
TC520 ADC | obsolete
Thermostat | stable
System timer API | stable
TMP123 temperature sensor | stable
Stepper motor with ramps | stable
Watchdog | beta

To get up to date informations look at the drivers source code.

File system

BeRTOS supports two file systems. The first one is the mainstream FAT filesystem, using the FatFs library. The module is highly configurable, for example it can be compiled in read-only mode for some space saving.

The second is BattFs, a file system specifically planned for embedded platforms. The goal is to have a filesystem suitable for little flash and eeprom memories (like dataflash), reliable, robust and capable of wear-levelling the memory pages to increase its life. The code is in beta stage. Currently you can create files, append data to them but file deletion is still not supported. Wear-levelling is achieved by rotating a page every time it is written. Plans are to add even transactions (a whole write can be performed atomically).

File system development takes place in the fs directory.

File System: FAT

The FAT file system is the de-facto standard for removable devices such as SD cards or Memory cards. BeRTOS supports read and write operations on all existing FAT file systems, ranging from FAT12 to FAT32, with support to long file names. This file system is light and fast and allows to easily exchange data through external memory devices.

FAT module is highly configurable, for example it can be compiled in read-only mode for some space saving.

File System: BattFS

BattFS (Batt File System), has been developed to solve problems specific to embedded systems; BattFS is a file system that can be used on any physical media and it's optimized to reduce RAM and ROM usage to meet the strict design guidelines we have used with all the others BeRTOS components.

The goal is to have a filesystem suitable for little flash and eeprom memories (like dataflash), reliable, robust and capable of wear-levelling the memory pages to increase its life.

The code is in beta stage. Currently you can create files, append data to them but file deletion is still not supported. Wear-levelling is achieved by rotating a page every time it is written. Plans are to add even transactions (a whole write can be performed atomically).

Graphic subsystem

BeRTOS also features a complete graphic subsystem, suitable for generating compact yet powerful GUI. This system is composed of several modules ranging from simple graphic primitives to complex menu management functions.

Module | Status
Bitmaps manipulation | stable
Lines drawing | stable
Rectangles drawing | stable
Simple windowing system | stable
Proportional and fixed size fonts | stable
Text rendering | stable
Simple Charts | stable
Menus | stable

To get up to date informations look at the source code in the directories gfx, gui or fonts.

Algorithms

In embedded programming sometimes you have to cope with protocols, security systems and things like that. BeRTOS comes in help with a set of optimized portable algorithms:

Algorithm | Status
CRC16 | stable
MD2 | beta
Cryptographically secure Random Pool | beta
Rotating hash checksum | stable
TEA (Tiny Encryption Algorithm) | stable
Stepper motor ramp generator | stable
PID Controller | stable
RLE (Run lenght en/decondig) | stable

To get up to date informations look at the algorithms source code.

Network protocols

Since BeRTOS can also be used in very tiny systems, some simple communication protocols has been developed.

This is the current status:

Protocol | Status
PocketBus | stable
Keytag (for 125KHz transponders) | stable
XModem protocol | stable
NMEA GPS protocol parser | stable
AFSK1200 modem | stable
AX25 data link layer protocol | beta

For more information take a look at network directory.

Data Structures

BeRTOS supplies common data structures, implemented and optimized for low memory footprint and speed.

Module | Status
FIFO | stable
Hash table | stable
Embedded-optimized dynamic memory allocator | stable
Lists | stable

Middleware

This section covers all BeRTOS modules that provide general purpose utility functions. Most of them should be moved to Algorithms directory.

In the meanwhile, here is the list:

Module | Status
Integers to/from host byte-order conversion | stable
Events | stable
C++ like exception handling in C | stable
Embedded-optimized printf | stable
Command shell with history | stable
Ini file reader | stable

As usual, check source code for detailed reference.


BeRTOS: Modules

Modules
Here is a list of all modules:
  • BeRTOS peripherals drivers
    • Generic ADC driver
    • Generic DAC driver
    • Embedded flash driver
    • I2C driver
      • I2C driver API
      • Old I2C API
    • Keyboard handling driver
    • 7 Segments LED Displays Driver
    • PWM driver
      • PWM API
  • BeRTOS core functionality
    • Debugging facilities and macros
    • Logging facilities
    • General purpose macros
    • Timer module
    • KBlock interface
    • KFile interface
    • KFile interface over KBlock
    • Event handling module
    • Embedded optimized memory allocator
  • Kernel facilities
    • Message box IPC
    • Process (Threads) management
    • Mutually exclusive semaphores
    • Kernel signals
  • Middleware facilities
    • Simple RPC machinery
  • General purpose graphical routines
    • Chart graphical routines
    • Text handling on graphical displays.
  • BeRTOS GUI toolkit
    • Menu handling module
  • Embedded optimized general purpose data types
    • FIFO buffer
    • General purpose lists
    • Pool memory allocator


BeRTOS: BeRTOS peripherals drivers

Modules
BeRTOS peripherals drivers

Modules

Generic ADC driver

Analog to Digital Converter driver (ADC).

Generic DAC driver

Digital to Analog Converter driver (DAC).

Embedded flash driver

Embedded flash for cpu.

I2C driver

I2C generic driver functions.

Keyboard handling driver

Keyboard driver.

7 Segments LED Displays Driver

7 segments LED displays (headers)

PWM driver

Pulse Width Modulation (PWM) driver.

Detailed Description

This section includes all BeRTOS drivers. They may be internal CPU drivers or CPU independent drivers


BeRTOS: Generic ADC driver

Defines | Typedefs | Functions
Generic ADC driver
BeRTOS peripherals drivers

Analog to Digital Converter driver (ADC). More...

Defines

#define | ADC_RANGECONV(data, y1, y2) (((((int32_t)(data)) * ((y2) - (y1))) / ((1 << ADC_BITS) - 1)) + (y1))
Macro used to convert data from adc range (0...(2 ^ADC_BITS - 1)) to y1 ...

Typedefs

typedef uint16_t | adcread_t
Type for ADC return value.
typedef uint8_t | adc_ch_t
Type for channel.

Functions

adcread_t | adc_read (adc_ch_t ch)
Read the ADC channel ch.
void | adc_init (void)
Initialize the ADC hardware.

Detailed Description

Analog to Digital Converter driver (ADC).

Configuration file: cfg_adc.h

Author:
Francesco Sacchi <batt@develer.com>

Define Documentation

#define ADC_RANGECONV | ( | data,
 |  | y1,
 |  | y2
 | ) | (((((int32_t)(data)) * ((y2) - (y1))) / ((1 << ADC_BITS) - 1)) + (y1))

Macro used to convert data from adc range (0...(2 ^ADC_BITS - 1)) to y1 ...

y2 range.

Note:
y1, y2 can be negative, and put in ascending or descending order as well.
data and y2 are evaluated only once, y1 twice.

Definition at line 73 of file adc.h.

Typedef Documentation

typedef uint16_t adcread_t

Type for ADC return value.

Definition at line 57 of file adc.h.


BeRTOS: Generic DAC driver

Generic DAC driver
BeRTOS peripherals drivers

Digital to Analog Converter driver (DAC). More...

Detailed Description

Digital to Analog Converter driver (DAC).

Configuration file: cfg_dac.h

Author:
Daniele Basile <asterix@develer.com>


BeRTOS: Embedded flash driver

Data Structures | Defines | Functions
Embedded flash driver
BeRTOS peripherals drivers

Embedded flash for cpu. More...

Data Structures

struct | Flash
EmbFlash KBlock context structure. More...

Defines

#define | flash_init(args...) PP_CAT(flash_init_, COUNT_PARMS(args)) (args)
Init function for flash driver.
#define | flash_init_2(fls, flags)
Initialize fls Flash context structure.

Functions

Flash * | FLASH_CAST (KBlock *fls)
Convert + ASSERT from generic KBlock to Flash.

Embedded flash error values

#define | FLASH_WR_OK 0
Write ok.
#define | FLASH_NOT_ERASED BV(1)
Flash memory was not erased before to write it.
#define | FLASH_WR_PROTECT BV(2)
Write not allowed the flash memory was protected.
#define | FLASH_WR_TIMEOUT BV(3)
Timeout while writing.
#define | FLASH_WR_ERR BV(4)
Invalid command and/or a bad keywords.

Flash init flags

#define | FLASH_WRITE_ONCE BV(0)
Allow only one write per block.
#define | FLASH_UNBUFFERED BV(1)
Open flash memory disabling page caching, no modification and partial write are allowed.

Detailed Description

Embedded flash for cpu.

This module allows to access in reading and writing to the internal flash memory of the micro. It is a block device, so it must be accessed using the KBlock interface functions (see kblock.h).

Once you have opened the flash for writing, you may want to use kblock_trim() to avoid overwriting data on other flash banks.

Example usage:

 Flash fls;
 flash_init(&fls, 0);
 // enable access only on desired blocks
 // start block = 50, num blocks = 20
 kblock_trim(&fls.blk, 50, 20);
 // ...
 // now write to the flash
 // block number is automatically converted
 kblock_write(&fls.blk, 0, buf, 0, 128);
Author:
Francesco Sacchi <batt@develer.com>
Daniele Basile <asterix@develer.com>

Define Documentation

#define flash_init ( args... ) PP_CAT(flash_init_, COUNT_PARMS(args)) (args)

Init function for flash driver.

This macro cannot fail, so no error conditions are reported.

This macro expands to

  • flash_init_2(Flash *fls, flags), the new KBlock API
  • flash_init_1(Flash *fls), old API, provided for compatibility

Do NOT use the above functions directly, use flash_init() instead. Disable old API if you are not upgrading an existing project.

Definition at line 95 of file flash.h.

#define flash_init_2 | ( | fls,
 |  | flags
 | ) |
Value:
(flags & FLASH_UNBUFFERED) ? \
                                        flash_hw_initUnbuffered(fls, flags) : flash_hw_init(fls, flags)

Initialize fls Flash context structure.

Parameters:
fls | Flash context structure
flags | A combination of flash init flags

Definition at line 158 of file flash.h.


BeRTOS: I2C driver

Modules | Functions
I2C driver
BeRTOS peripherals drivers

I2C generic driver functions. More...

Modules

I2C driver API
Old I2C API

This is the old and deprecated I2C API.

Functions

void | i2c_init_0 (void)
Initialize I2C module (old API).

I2C bitbang devices enum

enum | { , I2C_BITBANG0 = 1000, I2C_BITBANG1 , I2C_BITBANG_CNT }

Detailed Description

I2C generic driver functions.

Some hardware requires you to declare the number of transferred bytes and the communication direction before actually reading or writing to the bus. Furthermore, sometimes you need to specify the first transferred byte before any data is sent over the bus.

The usage pattern for writing is the following:

 i2c_init(args...);
 ...
 i2c_start_w(args...);
 i2c_write(i2c, buf, len);

The flags in i2c_start_w determine if the stop command is sent after the data. Notice that you don't need to explicitly call a stop function after the write.

Reading is a bit more complicated and it largely depends on the specific slave hardware. In general, the hardware may require you to first write something, then read the data without closing the communication. For example, EPROMs require first to write the reading address and then to read the actual data. Here is an example of how you can deal with such hardware:

 // init a session without closing it
 i2c_start_w(i2c, dev, bytes, I2C_NOSTOP);
 // write the address to read from
 i2c_write(i2c, addr, bytes);
 if (i2c_error(i2c))
     // check for errors during setup
     //...
 // now start the real data transfer
 i2c_start_r(i2c, dev, bytes, I2C_STOP);
 i2c_read(i2c, buf, bytes);
 // check for errors
 if (i2c_error(i2c))
     //...

It's not guaranteed that after a single call to i2c_putc, i2c_getc etc. data will pass on the bus (this is hardware dependent). However, it IS guaranteed after you have sent all the data.

You can check error conditions by calling the function i2c_error after each function call. (This is similar to libc errno handling).

Author:
Francesco Sacchi <batt@develer.com>

Enumeration Type Documentation

anonymous enum
Enumerator:
I2C_BITBANG0

Use bitbang on port 0.

I2C_BITBANG1

Use bitbang on port 1.

I2C_BITBANG_CNT

Number of i2c ports.

Definition at line 184 of file i2c.h.

Function Documentation

void i2c_init_0 ( void ) [inline]

Initialize I2C module (old API).

Attention:
This function is deprecated. Use i2c_init(args...) in new code

Definition at line 532 of file i2c.h.


BeRTOS: I2C driver API

Defines | Functions
I2C driver API
I2C driver

Defines

#define | i2c_init(args...) PP_CAT(i2c_init ## _, COUNT_PARMS(args)) (args)
Initialize I2C module.
#define | i2c_start_w(args...) PP_CAT(i2c_start_w ## _, COUNT_PARMS(args)) (args)
Start a write session.
#define | i2c_start_r(args...) PP_CAT(i2c_start_r ## _, COUNT_PARMS(args)) (args)
Start a read session.

Functions

void | i2c_hw_init (I2c *i2c, int dev, uint32_t clock)
Initialize I2C module.
void | i2c_hw_bitbangInit (I2c *i2c, int dev)
Initialize i2c module.

I2C error flags

#define | I2C_OK 0
I2C no errors flag.
#define | I2C_DATA_NACK BV(4)
I2C generic error.
#define | I2C_ERR BV(3)
I2C generic error.
#define | I2C_ARB_LOST BV(2)
I2C arbitration lost error.
#define | I2C_START_TIMEOUT BV(0)
I2C timeout error on start.
#define | I2C_NO_ACK BV(1)
I2C no ack for sla start.

I2C command flags

#define | I2C_NOSTOP 0
Do not program the stop for current transition.
#define | I2C_STOP BV(0)
Program the stop for current transition.

I2C interface functions

void | i2c_start_r_4 (I2c *i2c, uint16_t slave_addr, size_t size, int flags)
Start a read session.
void | i2c_start_w_4 (I2c *i2c, uint16_t slave_addr, size_t size, int flags)
Start a write session.
uint8_t | i2c_getc (I2c *i2c)
Read a byte from I2C bus.
void | i2c_putc (I2c *i2c, uint8_t data)
Write the byte data into I2C port i2c.
void | i2c_write (I2c *i2c, const void *_buf, size_t count)
Write count bytes to port i2c, reading from _buf.
void | i2c_read (I2c *i2c, void *_buf, size_t count)
Read count bytes into buffer _buf from device i2c.
int | i2c_error (I2c *i2c)
Return the error condition of the bus and clear errors.
#define | i2c_init_3(i2c, dev, clock)
Initialize I2C context structure.

Define Documentation

#define i2c_init ( args... ) PP_CAT(i2c_init ## _, COUNT_PARMS(args)) (args)

Initialize I2C module.

To initialize the module you can write this code:

 I2c ctx;
 i2c_init(&ctx, 0, CONFIG_I2C_FREQ);

This macro expands in two versions, depending on the number of parameters, to maintain compatibility with old API:

  • i2c_init_3(I2c *i2c, int dev, uint32_t clock)
  • i2c_init_0(void)

Do NOT use the above functions directly, use i2c_init().

Note:
Use the version with 3 parameters, the other one is only for legacy code.

Definition at line 140 of file i2c.h.

#define i2c_init_3 | ( | i2c,
 |  | dev,
 |  | clock
 | ) |
Value:
((((dev) >= I2C_BITBANG0) | ((dev) == I2C_BITBANG_OLD)) ? \
                                        i2c_hw_bitbangInit((i2c), (dev)) : i2c_hw_init((i2c), (dev), (clock)))

Initialize I2C context structure.

Parameters:
i2c | I2C context structure
dev | Number of device to be initialized. You can use I2C_BITBANG0 and similar if you want to activate the bitbang driver.
clock | Peripheral clock

Definition at line 438 of file i2c.h.

#define i2c_start_r ( args... ) PP_CAT(i2c_start_r ## _, COUNT_PARMS(args)) (args)

Start a read session.

To start a read session, use the following code:

 i2c_start_r(i2c, dev, bytes, I2C_STOP);

This macro expands in two versions, depending on the number of parameters:

  • i2c_start_r_4(I2c *i2c, uint16_t slave_addr, size_t size, int flags)
  • i2c_builtin_start_r(uint8_t id): Deprecated API, don't use in new projects
  • i2c_bitbang_start_r(uint8_t id): Deprecated API, don't use in new projects

Do NOT use the above functions directly, use i2c_start_r().

Note:
Use the version with 4 parameters, the others are only for legacy code

Definition at line 176 of file i2c.h.

#define i2c_start_w ( args... ) PP_CAT(i2c_start_w ## _, COUNT_PARMS(args)) (args)

Start a write session.

To start a write session, use the following code:

 i2c_start_w(i2c, dev, bytes, I2C_STOP);

This macro expands in two versions, depending on the number of parameters:

  • i2c_start_w_4(I2c *i2c, uint16_t slave_addr, size_t size, int flags)
  • i2c_builtin_start_w(uint8_t id): Deprecated API, don't use in new projects
  • i2c_bitbang_start_w(uint8_t id): Deprecated API, don't use in new projects

Do NOT use the above functions directly, use i2c_start_w().

Note:
Use the version with 4 parameters, the others are only for legacy code

Definition at line 158 of file i2c.h.

Function Documentation

uint8_t i2c_getc ( I2c * i2c ) [inline]

Read a byte from I2C bus.

Parameters:
i2c I2C context
Returns:
Byte read

Definition at line 333 of file i2c.h.

void i2c_putc | ( | I2c * | i2c,
 |  | uint8_t | data
 | ) |  | [inline]

Write the byte data into I2C port i2c.

Parameters:
i2c | I2C context
data | Byte to be written

Definition at line 358 of file i2c.h.

void i2c_read | ( | I2c * | i2c,
 |  | void * | _buf,
 |  | size_t | count
 | ) |  | [inline]

Read count bytes into buffer _buf from device i2c.

Parameters:
i2c | Context structure
_buf | Buffer to fill
count | Number of bytes to read

Definition at line 403 of file i2c.h.

void i2c_start_r_4 | ( | I2c * | i2c,
 |  | uint16_t | slave_addr,
 |  | size_t | size,
 |  | int | flags
 | ) |  | [inline]

Start a read session.

Parameters:
i2c | I2C context
slave_addr | Address of the slave device
size | Number of bytes to be read from device
flags | Session flags (I2C command flags)

Definition at line 307 of file i2c.h.

void i2c_start_w_4 | ( | I2c * | i2c,
 |  | uint16_t | slave_addr,
 |  | size_t | size,
 |  | int | flags
 | ) |  | [inline]

Start a write session.

Parameters:
i2c | I2C context
slave_addr | Address of the slave device
size | Size to be transferred
flags | Session flags

Definition at line 321 of file i2c.h.

void i2c_write | ( | I2c * | i2c,
 |  | const void * | _buf,
 |  | size_t | count
 | ) |  | [inline]

Write count bytes to port i2c, reading from _buf.

Parameters:
i2c | I2C context
_buf | User buffer to read from
count | Number of bytes to write

Definition at line 381 of file i2c.h.


BeRTOS: Old I2C API

Functions
Old I2C API
I2C driver

This is the old and deprecated I2C API. More...

Functions

bool | i2c_send (const void *_buf, size_t count)
Send a sequence of bytes in master transmitter mode to the selected slave device through the I2C bus.
bool | i2c_recv (void *_buf, size_t count)
Receive a sequence of one or more bytes from the selected slave device in master receive mode through the I2C bus.

I2C Backends.

Sometimes your cpu does not have a builtin i2c driver or you don't want, for some reason, to use that.

With this you can choose, at compile time, which backend to use. Set the CONFIG_I2C_BACKEND configuration variable in cfg_i2c.h

#define | I2C_BACKEND_BUILTIN 0
Uses cpu builtin i2c driver.
#define | I2C_BACKEND_BITBANG 1
Uses emulated bitbang driver.

I2c builtin prototypes.

Do NOT use these function directly, instead, you can call the ones named without "_builtin_" and specify in cfg_i2c.h (CONFIG_I2C_BACKEND) that you want the builtin backend.

bool | i2c_builtin_start_w (uint8_t id)
Send START condition and select slave for write.
bool | i2c_builtin_start_r (uint8_t id)
Send START condition and select slave for read.
void | i2c_builtin_stop (void)
Send STOP condition.
bool | i2c_builtin_put (uint8_t _data)
Put a single byte in master transmitter mode to the selected slave device through the TWI bus.
int | i2c_builtin_get (bool ack)
Get 1 byte from slave in master transmitter mode to the selected slave device through the TWI bus.

I2c bitbang prototypes.

Do NOT use these function directly, instead, you can call the ones named without "_bitbang_" and specify in cfg_i2c.h (CONFIG_I2C_BACKEND) that you want the bitbang backend.

bool | i2c_bitbang_start_w (uint8_t id)
bool | i2c_bitbang_start_r (uint8_t id)
void | i2c_bitbang_stop (void)
bool | i2c_bitbang_put (uint8_t _data)
int | i2c_bitbang_get (bool ack)

Detailed Description

This is the old and deprecated I2C API.

It is maintained for backward compatibility only, don't use it in new projects.

Function Documentation

int i2c_builtin_get ( bool ack )

Get 1 byte from slave in master transmitter mode to the selected slave device through the TWI bus.

If ack is true issue a ACK after getting the byte, otherwise a NACK is issued.

Returns:
the byte read if ok, EOF on errors.

Definition at line 187 of file i2c_avr.c.

bool i2c_builtin_put ( const uint8_t data )

Put a single byte in master transmitter mode to the selected slave device through the TWI bus.

Returns:
true on success, false on error.

Definition at line 166 of file i2c_avr.c.

bool i2c_builtin_start_r ( uint8_t id )

Send START condition and select slave for read.

id is the device id comprehensive of address left shifted by 1. The LSB of id is ignored and set to 1 for read operation.

Returns:
true on success, false otherwise.

Definition at line 133 of file i2c_avr.c.

bool i2c_builtin_start_w ( uint8_t id )

Send START condition and select slave for write.

id is the device id comprehensive of address left shifted by 1. The LSB of id is ignored and reset to 0 for write operation.

Returns:
true on success, false otherwise.

Definition at line 93 of file i2c_avr.c.

bool i2c_recv | ( | void * | _buf,
 |  | size_t | count
 | ) |  |

Receive a sequence of one or more bytes from the selected slave device in master receive mode through the I2C bus.

Received data is placed in buf.

Note:
a NACK is automatically given on the last received byte.
Returns:
true on success, false on error

Definition at line 76 of file i2c.c.

bool i2c_send | ( | const void * | _buf,
 |  | size_t | count
 | ) |  |

Send a sequence of bytes in master transmitter mode to the selected slave device through the I2C bus.

Returns:
true on success, false on error.

Definition at line 52 of file i2c.c.


BeRTOS: Keyboard handling driver

Data Structures | Defines | Functions
Keyboard handling driver
BeRTOS peripherals drivers

Keyboard driver. More...

Data Structures

struct | KbdHandler
Keyboard handler descriptor. More...

Defines

#define | KHF_RAWKEYS BV(0)
Handler gets raw key events.

Functions

void | kbd_init (void)
Initialize keyboard ports and softtimer.
keymask_t | kbd_peek (void)
Read a key from the keyboard buffer.
keymask_t | kbd_get (void)
Wait for a keypress and return the mask of depressed keys.
keymask_t | kbd_get_timeout (mtime_t timeout)
Wait up to timeout ms for a keypress and return the mask of depressed keys, or K_TIMEOUT if the timeout was reacked.
keymask_t | kbd_setRepeatMask (keymask_t mask)
Set current mask of repeatable keys.

Keyboard polling modes.

Define CONFIG_KBD_POLL to one of these.

#define | KBD_POLL_SOFTINT 1

Detailed Description

Keyboard driver.

Configuration file: cfg_kbd.h

HAL files: hw_kbd.h, kbd_map.h

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>
Francesco Sacchi <batt@develer.com>

Function Documentation

keymask_t kbd_get ( void )

Wait for a keypress and return the mask of depressed keys.

Note:
This function is not interrupt safe!

Definition at line 205 of file kbd.c.

keymask_t kbd_peek ( void )

Read a key from the keyboard buffer.

When a key is kept depressed between calls of this function a value is returned only after the time specified with KBD_REPAT_DELAY to avoid too fast keyboard repeat.

Note:
Calls schedule() internally.
This function is not interrupt safe!
Returns:
The mask of depressed keys or 0 if no keys are depressed.

Definition at line 178 of file kbd.c.


BeRTOS: 7 Segments LED Displays Driver

Data Structures | Defines | Functions
7 Segments LED Displays Driver
BeRTOS peripherals drivers

7 segments LED displays (headers) More...

Data Structures

struct | SevenSeg
Context data for Display functions. More...

Defines

#define | CONFIG_LED_7SEG_CCAT 0
Use a Common Cathode display.
#define | CONFIG_LED_7SEG_DIGIT 4
Number of digit present in the LED display.
#define | CONFIG_LED_7SEG_STRLEN 255
Max lenght of the string to be displayed.
#define | CONFIG_LED_7SEG_SSPEED 10
Default scrolling speed (ms * CONFIG_LED_7SEG_RTIME).
#define | CONFIG_LED_7SEG_RTIME 5
Default refresh time (ms).

Functions

int | sevenseg_print (SevenSeg *SS, const char *sstring)
Print a string on the display.
void | sevenseg_init (SevenSeg *SS)
initialize the structure and the timer for the display
bool | sevenseg_isReady (SevenSeg *SS)
check if is possible to do a new print
bool | sevenseg_unlock (SevenSeg *SS)
unlock the SevenSeg structure and stops the print
bool | sevenseg_lock (SevenSeg *SS)
lock the SeveSeg structure and starts a new print
bool | sevenseg_setBlink (SevenSeg *SS, bool blink, uint8_t digit)
set the blinking of the digits of the display
bool | sevenseg_setRunonce (SevenSeg *SS, bool runonce)
set if the text has to be displayed just one time
bool | sevenseg_setRunspeed (SevenSeg *SS, unsigned int r_speed)
set the scrolling speed of the text
bool | sevenseg_clear (SevenSeg *SS)
clear the display

Numbers and Letters Table.

Note:
These tables contain all the printable characters on a 7 segment digit encoded for common cathode and common anode display type.

0, 1, 2, 3, 4, 5, 6, 7, 8, 9, ., -, A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, Q, R, S, T, U, V, W, X, Y, Z, SPACE

static const uint8_t | segstable []

Detailed Description

7 segments LED displays (headers)

Here you find the prototypes and the data structures that format and holds the text that has to be displayed by the 7 segments display.

The main function is the sevenseg_print() that is called by your software to display the text, also important is the sevenseg_init() that initialize the data structures and set the refresh timer, you need to call this procedure just one time in the init procedure of your software before any use of the sevenseg_print().

Usage:

To use succesfully the display you have to follow these steps:

  • Create the structure and init the display
  • Check if the display is ready to accept a new print with the function sevenseg_isReady()
  • Unlock the display with the function sevenseg_unlock() NOTE: when the display is unlocked the displaying of any text is stopped but the data (text and attributes like text position, blinking etc etc) are not erased.
  • Set the wanted text attributes with sevenseg_set* functions
  • Print the wanted text with sevenseg_print()
  • Lock the display with sevenseg_lock()

When the display is locked the displaying of the text starts.

 static Seven_Seg display;
 // ...
 sevenseg_init(&display);
 while (!sevenseg_isReady(&display))
    ;
 sevenseg_unlock(&display);
 sevenseg_setBlink(&display,false,0);
 sevenseg_setRunonce(&display,false);
 sevenseg_setRunspeed(&display,10);
 if ((sevenseg_print(&display, "made with bertos.")) != 0)
        return -1;
 sevenseg_lock(&display);

Function Documentation

bool sevenseg_clear ( SevenSeg * SS )

clear the display

This is the procedure that blanks the text to be displayed and so on clear the display.

Parameters:
SS Pointer to the SevenSeg structure
Returns:
true if the clear was succesfull, false if the clear was not succesfull.

Definition at line 508 of file led_7seg.c.

void sevenseg_init ( SevenSeg * SS )

initialize the structure and the timer for the display

This is the procedure that inits all the structures that rules the 7 segments display and set the timer for the proper print/refresh of the text.

Parameters:
SS Pointer to the SevenSeg structure

Definition at line 325 of file led_7seg.c.

bool sevenseg_isReady ( SevenSeg * SS )

check if is possible to do a new print

This is the procedure that check if the print of the current text is run almost one time and we're ready to print a new text.

Parameters:
SS Pointer to the SevenSeg structure
Returns:
true if we can print a new text, false if we're still printing the previous text for the first time and we have to wait.

Definition at line 364 of file led_7seg.c.

bool sevenseg_lock ( SevenSeg * SS )

lock the SeveSeg structure and starts a new print

This is the procedure that lock the display and permit the print of the text.

Parameters:
SS Pointer to the SevenSeg structure
Returns:
true if the display is now locked, false if the display was already locked.

Definition at line 403 of file led_7seg.c.

int sevenseg_print | ( | SevenSeg * | SS,
 |  | const char * | sstring
 | ) |  |

Print a string on the display.

This is the procedure that fills the seven_seg structure with the translated string to display. It swaps also the structures to display the new text when all the data is ready to display.

Parameters:
SS | Pointer to the SevenSeg structure
sstring | String to be displayed
Returns:
0 if all went well, -1 if the display is locked, -2 if the string too long.

Definition at line 217 of file led_7seg.c.

bool sevenseg_setBlink | ( | SevenSeg * | SS,
 |  | bool | blink,
 |  | uint8_t | digit
 | ) |  |

set the blinking of the digits of the display

This is the procedure that set the blinking of the display. You can choose to blink all the display or only a single digit.

Parameters:
SS | Pointer to the SevenSeg structure
blink | if true the display will blink
digit | if 0 all the digits have to blink, else the digit that has to blink
Returns:
true if the set was succesfull, false if the set was not succesfull.

Definition at line 432 of file led_7seg.c.

bool sevenseg_setRunonce | ( | SevenSeg * | SS,
 |  | bool | runonce
 | ) |  |

set if the text has to be displayed just one time

This is the procedure that set if the text has to be displayed just one time

Parameters:
SS | Pointer to the SevenSeg structure
runonce | true if the text has to be displayed only one time, false if the text has to be displayed till next print
Returns:
true if the set was succesfull, false if the set was not succesfull.

Definition at line 464 of file led_7seg.c.

bool sevenseg_setRunspeed | ( | SevenSeg * | SS,
 |  | unsigned int | r_speed
 | ) |  |

set the scrolling speed of the text

This is the procedure that set the scrolling speed of the text if the text is longer than the display digits or the duration of the display if the text is smaller or equal the length of display digits.

Parameters:
SS | Pointer to the SevenSeg structure
r_speed | the Scrolling speed or display time
Returns:
true if the set was succesfull, false if the set was not succesfull.

Definition at line 486 of file led_7seg.c.

bool sevenseg_unlock ( SevenSeg * SS )

unlock the SevenSeg structure and stops the print

This is the procedure that check if the print of the current text is run almost one time and then set the status of the display to "unlocked".

Parameters:
SS Pointer to the SevenSeg structure
Returns:
true if the display is unlocked, false if the dispaly is still locked.

Definition at line 379 of file led_7seg.c.


BeRTOS: PWM driver

Modules | Defines | Typedefs
PWM driver
BeRTOS peripherals drivers

Pulse Width Modulation (PWM) driver. More...

Modules

PWM API

With this driver you can control a device with multiple PWM channels.

Defines

#define | PWM_MAX_DUTY ((pwm_duty_t)0xFFFF)
Maximum PWM duty cycle value (100%)

Typedefs

typedef uint16_t | pwm_duty_t
Type for PWM duty cycle.
typedef uint32_t | pwm_freq_t
Type for PWM frequency.

Detailed Description

Pulse Width Modulation (PWM) driver.

Author:
Francesco Sacchi <batt@develer.com>
Daniele Basile <asterix@develer.com>

Typedef Documentation

typedef uint16_t pwm_duty_t

Type for PWM duty cycle.

The value is represented as a 16bit unsigned integer, so it ranges from 0 (0%) to PWM_MAX_DUTY (0xFFFF = 100%).

Definition at line 65 of file pwm.h.

typedef uint32_t pwm_freq_t

Type for PWM frequency.

Unit of measure is Hz.

Definition at line 71 of file pwm.h.


BeRTOS: PWM API

Data Structures | Enumerations | Functions
PWM API
PWM driver

With this driver you can control a device with multiple PWM channels. More...

Data Structures

struct | Pwm
PWM context structure. More...

Enumerations

enum | PwmPolarity { PWM_POL_HIGH_PULSE, PWM_POL_POSITIVE = PWM_POL_HIGH_PULSE, PWM_POL_LOW_PULSE, PWM_POL_NEGATIVE = PWM_POL_LOW_PULSE }
Enum describing PWM polarities. More...

Functions

void | pwm_setDuty (Pwm *ctx, pwm_duty_t duty)
Set the duty cycle of the PWM channel linked to ctx.
void | pwm_setFrequency (Pwm *ctx, pwm_freq_t freq)
Set PWM frequency of channel linked to ctx.
void | pwm_setPolarity (Pwm *ctx, PwmPolarity pol)
Set PWM polarity of pwm channel linked to ctx.
void | pwm_enable (Pwm *ctx, bool state)
Enable/Disable the pwm channel linked to ctx.
void | pwm_init (Pwm *ctx, unsigned channel)
Initialize PWM driver.

Detailed Description

With this driver you can control a device with multiple PWM channels.

You can enable/disable each channel indipendently and also set frequency and duty cycle.

API usage example:

 Pwm pwm; // declare a context structure
 pwm_init(&pwm, 0); // init pwm channel 0
 pwm_setFrequency(&pwm, 1000); // Set frequency of channel 0 to 1000Hz
 pwm_setDuty(&pwm, 0x7FFF); // Set duty to 50% (0xFFFF/2)
 pwm_enable(&pwm, true); // Activate the output

Enumeration Type Documentation

enum PwmPolarity

Enum describing PWM polarities.

Enumerator:
PWM_POL_HIGH_PULSE

High pulse: increasing duty increases the part of the signal at high level.

PWM_POL_POSITIVE

Positive pulse: same as High pulse.

PWM_POL_LOW_PULSE

Low pulse: increasing duty increases the part of the signal at low level.

PWM_POL_NEGATIVE

Negative pulse: same as Low pulse.

Definition at line 94 of file pwm.h.

Function Documentation

void pwm_enable | ( | Pwm * | ctx,
 |  | bool | enable
 | ) |  |

Enable/Disable the pwm channel linked to ctx.

The modification will be applied to the channel immediatly.

Parameters:
ctx | PWM channel context.
enable | if true the channel will be enabled, if false will be disabled.
Note:
When a PWM channel is disabled, the output level will be the same as if the duty would be set to 0%. So, if current polarity is positive, a disabled channel will be low, if polarity is negative will be high.
See also:
pwm_setPolarity

Definition at line 220 of file pwm.c.

void pwm_init | ( | Pwm * | ctx,
 |  | unsigned | channel
 | ) |  |

Initialize PWM driver.

Parameters:
ctx | pointer to a PWM context structure, used for holding PWM driver related information.
channel | the channel you want to initialize.
Note:
The channel will be initialized disabled and with High polarity.

Definition at line 237 of file pwm.c.

void pwm_setDuty | ( | Pwm * | ctx,
 |  | pwm_duty_t | duty
 | ) |  |

Set the duty cycle of the PWM channel linked to ctx.

The modification will be applied to the channel immediatly. The current frequency of the channel will be maintained.

Parameters:
ctx | PWM channel context.
duty | the new duty cycle value.
See also:
pwm_duty_t

Definition at line 168 of file pwm.c.

void pwm_setFrequency | ( | Pwm * | ctx,
 |  | pwm_freq_t | freq
 | ) |  |

Set PWM frequency of channel linked to ctx.

The modification will be applied to the channel immediatly. The duty cycle of the channel will be maintained.

Parameters:
ctx | PWM channel context.
freq | the new frequency of the signal, in Hz.
Note:
Depending on the hardware implementation, this function may generate a glitch in the output signal upon frequency changing.

Definition at line 185 of file pwm.c.

void pwm_setPolarity | ( | Pwm * | ctx,
 |  | PwmPolarity | pol
 | ) |  |

Set PWM polarity of pwm channel linked to ctx.

The modification will be applied to the channel immediatly.

Parameters:
ctx | PWM channel context.
pol | the new polarity of the signal.
Note:
if a channel is disabled, changing its polarity will change the current steady output level.
See also:
pwm_enable
PwmPolarity

Definition at line 202 of file pwm.c.


BeRTOS: BeRTOS core functionality

Modules
BeRTOS core functionality

Modules

Debugging facilities and macros

Simple debug facilities for hosted and embedded C/C++ applications.

Logging facilities

Logging system module.

General purpose macros

Common and handy function macros.

Timer module

Hardware independent timer driver.

KBlock interface

KBlock interface.

KFile interface

Virtual KFile I/O interface.

KFile interface over KBlock

KFile interface over a KBlock.

Event handling module

Events handling.

Embedded optimized memory allocator

Heap subsystem (public interface).

Detailed Description

This section includes BeRTOS core functionalities and interfaces.


BeRTOS: Debugging facilities and macros

Defines | Functions
Debugging facilities and macros
BeRTOS core functionality

Simple debug facilities for hosted and embedded C/C++ applications. More...

Defines

#define | _DEBUG 1
Preprocessor symbol defined only for debug builds.
#define | THIS_FILE __FILE__
This macro duplicates the old MSVC trick of redefining THIS_FILE locally to avoid the overhead of many duplicate strings in ASSERT().
#define | DB(x) x
This macro can be used to conditionally exclude one or more statements conditioned on _DEBUG, avoiding the clutter of ifdef/endif pairs.
#define | ASSERT(x) ((void)(LIKELY(x) ? 0 : __bassert(#x, THIS_FILE, __LINE__)))
Assert a pre-condition on code.
#define | ASSERT2(x, help) ((void)(LIKELY(x) ? 0 : __bassert(help " (" #x ")", THIS_FILE, __LINE__)))
Assert a pre-condition and give explanation message when assert fails.
#define | ASSERT_VALID_PTR(p)
Check that the given pointer is either NULL or pointing to valid memory.
#define | ASSERT_VALID_PTR_OR_NULL(p)
Check that the given pointer is not pointing to invalid memory.
#define | ASSERT_VALID_OBJ(_t, _o)
Check that the given pointer actually points to an object of the specified type.

Functions

int | kputnum (int num)
Cheap function to print small integers without using printf().
void | kdump (const void *buf, size_t len)
Dump binary data in hex.

Debug object creation and destruction.

These macros help track some kinds of leaks in C++ programs.

Usage is as follows:

   class Foo
   {
       DECLARE_INSTANCE_TRACKING(Foo)

       Foo()
       {
           NEW_INSTANCE(Foo);
           // ...
       }

       ~Foo()
       {
           DELETE_INSTANCE(Foo);
           // ...
       }
   };

   // Put this in the implementation file of the class
   IMPLEMENT_INSTANCE_TRACKING(Foo)

   // Client code
   int main(void)
   {
        Foo *foo = new Foo;
        cout << GET_INSTANCE_COUNT(Foo) << endl; // prints "1"
        delete foo;
        ASSERT_ZERO_INSTANCES(Foo); // OK
   }
#define | NEW_INSTANCE(CLASS) do { ++CLASS::__instances } while (0)
#define | DELETE_INSTANCE(CLASS) do { --CLASS::__instances } while (0)
#define | ASSERT_ZERO_INSTANCES(CLASS) ASSERT(CLASS::__instances == 0)
#define | GET_INSTANCE_COUNT(CLASS) (CLASS::__instances)
#define | DECLARE_INSTANCE_TRACKING(CLASS) static int __instances
#define | IMPLEMENT_INSTANCE_TRACKING(CLASS) int CLASS::__instances = 0

Walls to detect data corruption

#define | WALL_SIZE 8
#define | WALL_VALUE (long)0xABADCAFEL
#define | DECLARE_WALL(name, size) long name[(size) / sizeof(long)];
#define | FWD_DECLARE_WALL(name, size) extern long name[(size) / sizeof(long)];
#define | INIT_WALL(name) __init_wall((name), countof(name))
#define | CHECK_WALL(name) __check_wall((name), countof(name), #name, THIS_FILE, __LINE__)

Detailed Description

Simple debug facilities for hosted and embedded C/C++ applications.

Debug output goes to stderr in hosted applications. Freestanding (AKA embedded) applications use drv/kdebug.c to output diagnostic messages to a serial terminal or a JTAG debugger.

Author:
Bernie Innocenti <bernie@codewiz.org>

Define Documentation

#define _DEBUG 1

Preprocessor symbol defined only for debug builds.

The build infrastructure must arrange for _DEBUG to be predefined for all the source files being compiled.

This is compatible with the MSVC convention for the default Debug and Release project targets.

Definition at line 85 of file debug.h.

#define ASSERT_VALID_PTR ( p )
Value:
(IS_VALID_PTR(p) \
        ? 0 : __invalid_ptr(p, #p, THIS_FILE, __LINE__))

Check that the given pointer is either NULL or pointing to valid memory.

The assumption here is that valid pointers never point to low memory regions. This helps catching pointers taken from struct/class memebers when the struct pointer was NULL.

See also:
ASSERT_VALID_PTR_OR_NULL()

Definition at line 194 of file debug.h.

#define ASSERT_VALID_PTR_OR_NULL ( p )
Value:
((void)(LIKELY((p == NULL) \
        || ((void *)(p) >= (void *)CPU_RAM_START)) \
        ? 0 : __invalid_ptr((p), #p, THIS_FILE, __LINE__)))

Check that the given pointer is not pointing to invalid memory.

Note:
The check for invalid memory is architecture specific and conservative. The current implementation only checks against a lower bound.
See also:
ASSERT_VALID_PTR()

Definition at line 206 of file debug.h.

#define DB ( x ) x

This macro can be used to conditionally exclude one or more statements conditioned on _DEBUG, avoiding the clutter of ifdef/endif pairs.

     struct FooBar
     {
         int foo;
         bool bar;
         DB(int ref_count;) // Track number of users

         void release()
         {
             DB(--ref_count;)
         }
     };

Definition at line 133 of file debug.h.


BeRTOS: Logging facilities

Defines
Logging facilities
BeRTOS core functionality

Logging system module. More...

Defines

#define | LOG_ERR(str,...) LOG_PRINT("ERR", str, ## __VA_ARGS__)
Output an error message.
#define | LOG_ERRB(x) x
Define a code block that will be compiled only when LOG_LEVEL >= LOG_LVL_ERR.
#define | LOG_WARN(str,...) LOG_PRINT("WARN", str, ## __VA_ARGS__)
Output a warning message.
#define | LOG_WARNB(x) x
Define a code block that will be compiled only when LOG_LEVEL >= LOG_LVL_WARN.
#define | LOG_INFO(str,...) LOG_PRINT("INFO", str, ## __VA_ARGS__)
Output an informative message.
#define | LOG_INFOB(x) x
Define a code block that will be compiled only when LOG_LEVEL >= LOG_LVL_INFO.

Logging level definition

When you choose a log level messages you choose also which print function are linked.

When using a log level, you link all log functions that have a priority higher or equal than the level you chose. The priority level go from error (highest) to info (lowest).

#define | LOG_LVL_NONE 0
#define | LOG_LVL_ERR 1
#define | LOG_LVL_WARN 2
#define | LOG_LVL_INFO 3

Logging format

There are two logging format: terse and verbose.

The latter prepends function names and line number information to each log entry.

#define | LOG_FMT_VERBOSE 1
#define | LOG_FMT_TERSE 0

Detailed Description

Logging system module.

This module implement a simple interface to use the multi level logging system. The log message have the priority order, like this:

  • error message (highest)
  • warning message
  • info message (lowest)

With this priority system we log only the messages that have priority higher or equal to the log level that has been configurated; messages below the selected log level are not included at compile time, so no time and space is wasted on unused functions.

Furthermore you can define different log levels for each module. To do this you just need to define LOG_LEVEL in the configuration file for the selected module.

This module provides two types of macros:

  • LOG_* macros: these macros allow formatted output, using the same format as kprintf
  • LOG_*B macros: these macros allow to optionally compile a block of code depending on the logging level chosen

To use the logging system you should include this module in your driver and use one of the LOG_ERR, LOG_WARN and LOG_INFO macros to output error messages. Then you should define a LOG_LEVEL and LOG_VERBOSE costant in your cfg/cfg_<your_cfg_module_name>.h using the follow policy:

  • in your file cfg/cfg_<cfg_module_name>.h, define the logging level and verbosity mode for your specific module:
    #define <cfg_module_name>_LOG_LEVEL    LOG_LVL_INFO

    #define <cfg_module_name>_LOG_FORMAT   LOG_FMT_VERBOSE
  • then, in the module where you use the logging macros you should define the macros LOG_LEVEL and LOG_FORMAT and you should include cfg/log.h module, as demonstrated in the following example:
    // Define log settings for cfg/log.h.
    #define LOG_LEVEL   <cfg_module_name>_LOG_LEVEL
    #define LOG_FORMAT  <cfg_module_name>_LOG_FORMAT
    #include <cfg/log.h>

if you include a log.h module without defining the LOG_LEVEL and LOG_VERBOSE macros, the module uses the default settings.

WARNING: when using the log.h module make sure to include this module after a cfg_<cfg_module_name>.h, because the LOG_LEVEL and LOG_VERBOSE macros must be defined before including the log module. Otherwise the log module will use the default settings.

Author:
Daniele Basile <asterix@develer.com>


BeRTOS: General purpose macros

Defines | Typedefs | Functions
General purpose macros
BeRTOS core functionality

Common and handy function macros. More...

Defines

#define | ALIGN_UP(value, align)
Align value to the next align boundary.
#define | MINMAX(min, x, max) (MIN(MAX(min, x), max))
Bound x between min and max.
#define | SHUFFLE(array, len)
Shuffle the content of array that counts len elements.
#define | SWAP_T(a, b, T)
Macro to swap a with b, with explicit type T for dumb C89 compilers.
#define | REVERSE_UINT8(b) ((uint8_t)((((b) * 0x0802UL & 0x22110UL) | ((b) * 0x8020UL & 0x88440UL)) * 0x10101UL >> 16))
Reverse the bits contained in b (LSB becomes the MSB and so on).
#define | BV(x) (1<<(x))
Convert a bit value to a binary flag.
#define | BV32(x) ((uint32_t)1<<(x))
Same as BV() but with 32 bit result.
#define | BV16(x) ((uint16_t)1<<(x))
Same as BV() but with 16 bit result.
#define | BV8(x) ((uint8_t)1<<(x))
Same as BV() but with 8 bit result.
#define | DIV_ROUND(dividend, divisor) (((dividend) + (divisor) / 2) / (divisor))
Perform an integer division rounding the result to the nearest int value.
#define | DIV_ROUNDUP(dividend, divisor) (((dividend) + (divisor) - 1) / (divisor))
Perform an integer division rounding the result to the upper int value.
#define | INT_MULT(a, f, prec) (((a) * (long)((f) * (1 << (prec)) + 0.5)) >> (prec))
Perform a multiply between the integer a and the float constant f.
#define | ROUND_UP2(x, pad) (((x) + ((pad) - 1)) & ~((pad) - 1))
Round up x to an even multiple of the 2's power pad.
#define | IS_POW2(x) (!(bool)((x) & ((x)-1)))
Check if x is an integer power of 2.
#define | UINT8_LOG2(x)
Calculate a compile-time log2 for a uint8_t.
#define | UINT16_LOG2(x) ((x < 256) ? UINT8_LOG2(x) : UINT8_LOG2((x) >> 8) + 8)
Calculate a compile-time log2 for a uint16_t.
#define | UINT32_LOG2(x) ((x < 65536UL) ? UINT16_LOG2(x) : UINT16_LOG2((x) >> 16) + 16)
Calculate a compile-time log2 for a uint32_t.
#define | PP_COUNT(...) PP_COUNT__(__VA_ARGS__,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0)
Count the number of arguments (up to 16).
#define | BIT_CHANGE(reg,...) BIT_CHANGE__(reg, 0, __VA_ARGS__)
This macro allows for efficient and compact bit toggling in a hardware register.
#define | BIT_CHANGE_BV(reg,...) BIT_CHANGE__(reg, 1, __VA_ARGS__)
Similar to BIT_CHANGE(), but get bits instead of masks (and applies BV() to convert them to masks).
#define | MAKE_ID(a, b, c, d)
Make an id from 4 letters, useful for file formats and kfile ids.

Typedefs

typedef uint32_t | id_t
Type for id generated by MAKE_ID().

Functions

bool | is_aligned (const void *addr, size_t size)
Check if a pointer is aligned to a certain power-of-2 size.

Integer round macros.

Round x to a multiple of base.

Note:
If x is signed these macros generate a lot of code.
#define | ROUND_DOWN(x, base) ( (x) - ((x) % (base)) )
#define | ROUND_UP(x, base) ( ((x) + (base) - 1) - (((x) + (base) - 1) % (base)) )
#define | ROUND_NEAREST(x, base) ( ((x) + (base) / 2) - (((x) + (base) / 2) % (base)) )
#define | ROTR(var, rot) (((var) >> (rot)) | ((var) << ((sizeof(var) * 8) - (rot))))
Macro for rotating bit left or right.
#define | ROTL(var, rot) (((var) << (rot)) | ((var) >> ((sizeof(var) * 8) - (rot))))
Macro for rotating bit left or right.

Detailed Description

Common and handy function macros.

Author:
Bernie Innocenti <bernie@codewiz.org>
Giovanni Bajo <rasky@develer.com>

Define Documentation

#define BIT_CHANGE | ( | reg,
 |  | ...
 | ) | BIT_CHANGE__(reg, 0, __VA_ARGS__)

This macro allows for efficient and compact bit toggling in a hardware register.

It is meant to replace hand-coded cruft which toggles bits in sequence.

It is possible to specify an unlimited pair of (mask, value) parameters. For instance:

 void set_timer(bool start)
 {
     BIT_CHANGE(REG_CTRL_TIMER,
        (TIMER_MODE, MODE_COUNT),
        (OVL_IRQ, 1),
        (CMP_IRQ, 1),
        (START, start)
     );
 }

The macro expansion will be roughly the following:

 REG_CTRL_TIMER = (REG_CTRL_TIMER & ~(TIMER_MODE|OVL_IRQ|CMP_IRQ|START)
                  | (MODE_COUNT|OVL_IRQ|CMP_IRQ|(start ? START : 0));

It is up to the compiler to produce the optimal code. We checked that GCC produces the best code in most cases. We preferred this expansion over the use of a block with a local variable because CodeWarrior 6.1 was not able to remove completely the allocation of the local from the stack.

Note:
This macro is available only in C99 because it makes use of variadic macros. It would be possible to make up an implementation with a slightly different syntax for use with C90 compilers, through Boost Preprocessor.

Definition at line 373 of file macros.h.

#define BV ( x ) (1<<(x))

Convert a bit value to a binary flag.

Definition at line 174 of file macros.h.

#define DIV_ROUND | ( | dividend,
 |  | divisor
 | ) | (((dividend) + (divisor) / 2) / (divisor))

Perform an integer division rounding the result to the nearest int value.

Note:
divisor should preferibly be a costant, otherwise this macro generates 2 division. Also divisor is evaluated twice.

Definition at line 191 of file macros.h.

#define DIV_ROUNDUP | ( | dividend,
 |  | divisor
 | ) | (((dividend) + (divisor) - 1) / (divisor))

Perform an integer division rounding the result to the upper int value.

Note:
divisor is evaluated twice.

Definition at line 197 of file macros.h.

#define INT_MULT | ( | a,
 |  | f,
 |  | prec
 | ) | (((a) * (long)((f) * (1 << (prec)) + 0.5)) >> (prec))

Perform a multiply between the integer a and the float constant f.

This macro can be used in order to avoid floating point arithmetics in expressions like this:

 int a, b;
 a = b * 0.5579652750;

This macro rounds the floating point constant to a fraction, usign (2 ^ prec) as the denominator. For instance, with prec = 8, the constant 0.5579652750 will be rounded to: (143 / 256) = 0.55859375 So, the former code will be transformed to:

 a = b * 143 / 256;

Since the denominator is a power of 2, we rely on the compiler to optimize this to a right shift. So, when you have to multiply an integer by a float constant, this macro will not use the floating point arithmentics. The operation will be converted to a mul + shift, with a huge performance boost.

Note:
f MUST be a constant in order gain performance benefits.
Parameters:
a | integer you want to multiply
f | floating point constant which you want to multply with a
prec | conversion precision, ranges from 1 to the number of bits in a long. The higher, the better the approximation of the float constant will be.

Definition at line 232 of file macros.h.

#define IS_POW2 ( x ) (!(bool)((x) & ((x)-1)))

Check if x is an integer power of 2.

Definition at line 251 of file macros.h.

#define MINMAX | ( | min,
 |  | x,
 |  | max
 | ) | (MIN(MAX(min, x), max))

Bound x between min and max.

Definition at line 107 of file macros.h.

#define PP_COUNT ( ... ) PP_COUNT__(__VA_ARGS__,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0)

Count the number of arguments (up to 16).

Definition at line 273 of file macros.h.

#define REVERSE_UINT8 ( b ) ((uint8_t)((((b) * 0x0802UL & 0x22110UL) | ((b) * 0x8020UL & 0x88440UL)) * 0x10101UL >> 16))

Reverse the bits contained in b (LSB becomes the MSB and so on).

Note:
b is evaluated twice

Definition at line 169 of file macros.h.

#define ROUND_UP2 | ( | x,
 |  | pad
 | ) | (((x) + ((pad) - 1)) & ~((pad) - 1))

Round up x to an even multiple of the 2's power pad.

Definition at line 236 of file macros.h.

#define SWAP_T | ( | a,
 |  | b,
 |  | T
 | ) |
Value:
do { \
        T tmp; \
        ASSERT_TYPE_IS(a, T); \
        ASSERT_TYPE_IS(b, T); \
        tmp = (a); \
        (a) = (b); \
        (b) = tmp; \
    } while (0)

Macro to swap a with b, with explicit type T for dumb C89 compilers.

Note:
Arguments are evaluated multiple times.

Definition at line 155 of file macros.h.


BeRTOS: Timer module

Data Structures | Defines | Functions | Variables
Timer module
BeRTOS core functionality

Hardware independent timer driver. More...

Data Structures

struct | Timer
The timer driver supports multiple synchronous timers that can trigger an event when they expire. More...

Defines

#define | synctimer_abort(t) timer_abort(t)

Functions

ticks_t | timer_clock (void)
Return the system tick counter (expressed in ticks)
ticks_t | timer_clock_unlocked (void)
Faster version of timer_clock(), to be called only when the timer interrupt is disabled (DISABLE_INTS) or overridden by a higher-priority or non-nesting interrupt.
ticks_t | ms_to_ticks (mtime_t ms)
Convert ms [ms] to ticks.
ticks_t | us_to_ticks (utime_t us)
Convert us [us] to ticks.
mtime_t | ticks_to_ms (ticks_t ticks)
Convert ticks [ticks] to ms.
utime_t | ticks_to_us (ticks_t ticks)
Convert ticks [ticks] to us.
hptime_t | us_to_hptime (utime_t us)
Convert us [us] to hpticks.
utime_t | hptime_to_us (hptime_t hpticks)
Convert hpticks [hptime] to usec.
void | timer_delayTicks (ticks_t delay)
Wait for the specified amount of timer ticks.
void | timer_delay (mtime_t delay)
Wait some time [ms].
void | timer_busyWait (hptime_t delay)
Busy wait until the specified amount of high-precision ticks have elapsed.
void | timer_delayHp (hptime_t delay)
Wait for the specified amount of time (expressed in microseconds).
void | timer_add (Timer *timer)
Add the specified timer to the software timer service queue.
Timer * | timer_abort (Timer *timer)
Remove a timer from the timers queue before it has expired.
void | timer_setSoftint (Timer *timer, Hook func, iptr_t user_data)
Set the timer so that it calls an user hook when it expires.
void | timer_setDelay (Timer *timer, ticks_t delay)
Set the timer delay (the time before the event will be triggered)
void | synctimer_add (Timer *timer, List *q)
Add timer to queue.
void | synctimer_poll (List *q)
Simple synchronous timer based scheduler polling routine.
void | timer_setEvent (Timer *timer)
Set the timer so that it sends a event notification when it expires.
void | timer_waitEvent (Timer *timer)
Wait until the timer expires.
void | timer_setSignal (Timer *timer, struct Process *proc, sigmask_t sigs)
Set the timer so that it sends a signal when it expires.

Variables

volatile ticks_t | _clock
Master system clock (1 tick accuracy)

Detailed Description

Hardware independent timer driver.

All timer related functions are implemented in this module. You have several options to use timers:

  • simple delay: just use timer_delay() if you want to wait for a few milliseconds;
  • delay with callback: create a timer structure and use timer_setDelay() and timer_setSoftint() to set the callback;
  • delay with signal: same as above but use timer_setSignal() to set specify which signal to send.
  • simple synchronous timer based scheduler: use synctimer_add() to schedule an event in a user provided queue.

Whenever a timer expires you need to explicitly arm it again with timer_add(). If you want to abort a timer, use timer_abort(). You can use conversion macros when using msecs to specify the delay.

Author:
Bernie Innocenti <bernie@codewiz.org>

Define Documentation

#define synctimer_abort ( t ) timer_abort(t)
See also:
timer_abort

Definition at line 309 of file timer.h.

Function Documentation

ticks_t ms_to_ticks ( mtime_t ms ) [inline]

Convert ms [ms] to ticks.

Definition at line 157 of file timer.h.

void synctimer_add | ( | Timer * | timer,
 |  | List * | queue
 | ) |  |

Add timer to queue.

See also:
synctimer_poll() for details.

Definition at line 215 of file timer.c.

void synctimer_poll ( List * queue )

Simple synchronous timer based scheduler polling routine.

Sometimes you would like to have a proper scheduler, but you can't afford it due to memory constraints.

This is a simple replacement: you can create events and call them periodically at specific time intervals. All you have to do is to set up normal timers, and call synctimer_add() instead of timer_add() to add the events to your specific queue. Then, in the main loop or wherever you want, you can call synctimer_poll() to process expired events. The associated callbacks will be executed. As this is done synchronously you don't have to worry about race conditions. You can kill an event by simply calling synctimer_abort().

Definition at line 237 of file timer.c.

mtime_t ticks_to_ms ( ticks_t ticks ) [inline]

Convert ticks [ticks] to ms.

Definition at line 181 of file timer.h.

utime_t ticks_to_us ( ticks_t ticks ) [inline]

Convert ticks [ticks] to us.

Definition at line 193 of file timer.h.

Timer* timer_abort ( Timer * timer )

Remove a timer from the timers queue before it has expired.

Note:
Attempting to remove a timer already expired cause undefined behaviour.

Definition at line 176 of file timer.c.

void timer_add ( Timer * timer )

Add the specified timer to the software timer service queue.

When the delay indicated by the timer expires, the timer device will execute the event associated with it.

You should not call this function on an already running timer.

Note:
Interrupt safe

Definition at line 165 of file timer.c.

void timer_busyWait ( hptime_t delay )

Busy wait until the specified amount of high-precision ticks have elapsed.

Note:
This function is interrupt safe, the only requirement is a running hardware timer.

Definition at line 285 of file timer.c.

ticks_t timer_clock ( void ) [inline]

Return the system tick counter (expressed in ticks)

The result is guaranteed to increment monotonically, but client code must be tolerant with respect to overflows.

The following code is safe:

   drop_teabag();
   ticks_t tea_start_time = timer_clock();

   for (;;)
   {
       if (timer_clock() - tea_start_time > TEAPOT_DELAY)
       {
           printf("Your tea, Sir.\n");
           break;
       }
       patience();
   }
Note:
This function must disable interrupts on 8/16bit CPUs because the clock variable is larger than the processor word size and can't be copied atomically.
See also:
timer_delay()

Definition at line 134 of file timer.h.

ticks_t timer_clock_unlocked ( void ) [inline]

Faster version of timer_clock(), to be called only when the timer interrupt is disabled (DISABLE_INTS) or overridden by a higher-priority or non-nesting interrupt.

See also:
timer_clock

Definition at line 150 of file timer.h.

void timer_delay ( mtime_t delay ) [inline]

Wait some time [ms].

Note:
CPU is released while waiting so you don't have to call cpu_relax() explicitly.
Parameters:
delay Time to wait [ms].

Definition at line 231 of file timer.h.

void timer_delayHp ( hptime_t delay )

Wait for the specified amount of time (expressed in microseconds).

Definition at line 328 of file timer.c.

void timer_delayTicks ( ticks_t delay )

Wait for the specified amount of timer ticks.

Note:
Sleeping while preemption is disabled fallbacks to a busy wait sleep.

Definition at line 250 of file timer.c.

void timer_setDelay | ( | Timer * | timer,
 |  | ticks_t | delay
 | ) |  | [inline]

Set the timer delay (the time before the event will be triggered)

Note:
It's illegal to change the delay of the timer when it's still running.

Definition at line 300 of file timer.h.

void timer_setSoftint | ( | Timer * | timer,
 |  | Hook | func,
 |  | iptr_t | user_data
 | ) |  | [inline]

Set the timer so that it calls an user hook when it expires.

Sometimes you may want to use the same callback for different events, so you must have different data to operate on. The user_data parameter is such data.

Parameters:
timer | Timer struct to set the callback to
func | Function that will be called when the timer expires
user_data | Additional data you may want to pass to the callback

Definition at line 289 of file timer.h.

ticks_t us_to_ticks ( utime_t us ) [inline]

Convert us [us] to ticks.

Definition at line 169 of file timer.h.


BeRTOS: KBlock interface

Data Structures | Defines | Typedefs | Functions
KBlock interface
BeRTOS core functionality

KBlock interface. More...

Data Structures

struct | KBlock
KBlock: interface for a generic block device. More...

Defines

#define | KB_BUFFERED BV(0)
Internal flag: true if the KBlock has a buffer.
#define | KB_CACHE_DIRTY BV(1)
Internal flag: true if the cache is dirty.
#define | KB_PARTIAL_WRITE BV(2)
Internal flag: true if the device allows partial block write.

Typedefs

typedef uint32_t | block_idx_t
Type for addressing blocks in the device.

Functions

int | kblock_trim (struct KBlock *b, block_idx_t start, block_idx_t count)
Use a subset of the blocks on the device.
int | kblock_error (struct KBlock *b)
Get the current errors for the device.
void | kblock_clearerr (struct KBlock *b)
Clear the errors of the device.
int | kblock_flush (struct KBlock *b)
Flush the cache (if any) to the device.
int | kblock_close (struct KBlock *b)
Close the device.
bool | kblock_buffered (struct KBlock *b)
block_idx_t | kblock_cachedBlock (struct KBlock *b)
bool | kblock_cacheDirty (struct KBlock *b)
Return the status of the internal cache.
bool | kblock_partialWrite (struct KBlock *b)
size_t | kblock_read (struct KBlock *b, block_idx_t idx, void *buf, size_t offset, size_t size)
Read data from the block device.
size_t | kblock_write (struct KBlock *b, block_idx_t idx, const void *buf, size_t offset, size_t size)
Write data to the block device.
int | kblock_copy (struct KBlock *b, block_idx_t src, block_idx_t dest)
Copy one block to another.

Prototypes for KBlock low level access functions.

When writing a driver implementing the KBlock interface you can choose which function subset to implement, but you have to set to NULL unimplemented features.

typedef size_t(* | kblock_read_direct_t )(struct KBlock *b, block_idx_t index, void *buf, size_t offset, size_t size)
typedef size_t(* | kblock_write_direct_t )(struct KBlock *b, block_idx_t index, const void *buf, size_t offset, size_t size)
typedef size_t(* | kblock_read_t )(struct KBlock *b, void *buf, size_t offset, size_t size)
typedef size_t(* | kblock_write_t )(struct KBlock *b, const void *buf, size_t offset, size_t size)
typedef int(* | kblock_load_t )(struct KBlock *b, block_idx_t index)
typedef int(* | kblock_store_t )(struct KBlock *b, block_idx_t index)
typedef int(* | kblock_error_t )(struct KBlock *b)
typedef void(* | kblock_clearerr_t )(struct KBlock *b)
typedef int(* | kblock_close_t )(struct KBlock *b)

Detailed Description

KBlock interface.

A block device is a device which can only be read/written with data blocks of constant size: flash memories, SD cards, hard disks, etc... This interface is designed to adapt to most block devices and use peculiar features in order to save CPU time and memory space.

There is no init function because you do not have to use this structure directly, specific implementations will supply their own init functions.

Error handling is done in a way similar to standard C library: whenever a function (eg. kblock_flush()) returns error, you need to check the error code, which is implementation specific.

Example of code flow:

 // init a KBlock-derived class
 Flash fls;
 flash_init(&fls.blk, 0);

 // use kblock_* functions to access the derived class
 kblock_write(&fls.blk, ...);
 if (kblock_flush(&fls.blk) == EOF)
 {
     // oops, error occurred!
     int err = kblock_error(&fls.blk);
     // handle Flash specific error conditions
     // ...
     // clear error condition
     kblock_clearerr(&fls.blk);
 }
Note:
The KBlock interface is optimized for block reads. If you need a file-like access, you can use KFile interface over KBlock.
Author:
Francesco Sacchi <batt@develer.com>

Typedef Documentation

typedef uint32_t block_idx_t

Type for addressing blocks in the device.

Definition at line 88 of file kblock.h.

Function Documentation

bool kblock_buffered ( struct KBlock * b ) [inline]
Returns:
true if the device b is buffered, false otherwise.
Parameters:
b KBlock device.
See also:
kblock_cachedBlock(), kblock_cacheDirty().

Definition at line 274 of file kblock.h.

block_idx_t kblock_cachedBlock ( struct KBlock * b ) [inline]
Returns:
The current cached block number if the device is buffered.
Parameters:
b KBlock device.
Note:
This function will throw an ASSERT if called on a non buffered KBlock.
See also:
kblock_buffered(), kblock_cacheDirty().

Definition at line 287 of file kblock.h.

bool kblock_cacheDirty ( struct KBlock * b ) [inline]

Return the status of the internal cache.

Parameters:
b KBlock device.
Returns:
If the device supports buffering, returns true if the cache is dirty, false if the cache is clean and coherent with device content.
Note:
This function will throw an ASSERT if called on a non buffered KBlock.
See also:
kblock_cachedBlock(), kblock_buffered().

Definition at line 303 of file kblock.h.

void kblock_clearerr ( struct KBlock * b ) [inline]

Clear the errors of the device.

Parameters:
b KBlock device.
See also:
kblock_error()

Definition at line 238 of file kblock.h.

int kblock_close ( struct KBlock * b ) [inline]

Close the device.

Parameters:
b KBlock device.
Returns:
0 on success, EOF on errors.

Definition at line 263 of file kblock.h.

int kblock_copy | ( | struct KBlock * | b,
 |  | block_idx_t | src,
 |  | block_idx_t | dest
 | ) |  |

Copy one block to another.

This function will copy the content of block src to block dest.

Note:
This function is available only on devices which support partial block write or are opened in buffered mode.
Parameters:
b | KBlock device.
src | source block number.
dest | destination block number.
Returns:
0 if all is OK, EOF on errors.

Definition at line 196 of file kblock.c.

int kblock_error ( struct KBlock * b ) [inline]

Get the current errors for the device.

Note:
Calling this function will not clear the errors.
Parameters:
b KBlock device.
Returns:
0 if no error is present, a driver specific mask of errors otherwise.
See also:
kblock_clearerr()

Definition at line 224 of file kblock.h.

int kblock_flush ( struct KBlock * b )

Flush the cache (if any) to the device.

This function will write any pending modifications to the device. If the device does not have a cache, this function will do nothing.

Returns:
0 if all is OK, EOF on errors.
See also:
kblock_read(), kblock_write(), kblock_buffered().

Definition at line 117 of file kblock.c.

bool kblock_partialWrite ( struct KBlock * b ) [inline]
Returns:
true if the device b supports partial block write. That is, you can call kblock_write() with a size which is lesser than the block size.
Parameters:
b KBlock device.
See also:
kblock_write().

Definition at line 316 of file kblock.h.

size_t kblock_read | ( | struct KBlock * | b,
 |  | block_idx_t | idx,
 |  | void * | buf,
 |  | size_t | offset,
 |  | size_t | size
 | ) |  |

Read data from the block device.

This function will read size bytes from block idx starting at address offset inside the block.

Most block devices (almost all flash memories, for instance), can efficiently read even a part of the block.

Note:
This function can be slow if you try to partial read a block from a device which does not support partial block reads and is opened in unbuffered mode.
Parameters:
b | KBlock device.
idx | the block number where you want to read.
buf | a buffer where the data will be read.
offset | the offset inside the block from which data reading will start.
size | the size of data to be read.
Returns:
the number of bytes read.
See also:
kblock_write().

Definition at line 103 of file kblock.c.

int kblock_trim | ( | struct KBlock * | b,
 |  | block_idx_t | start,
 |  | block_idx_t | count
 | ) |  |

Use a subset of the blocks on the device.

This function is useful for partitioning a device and use it for different purposes at the same time.

This function will limit the number of blocks used on the device by setting a start index and a number of blocks to be used counting from that index.

The blocks outside this range are no more accessible.

Logical block indexes will be mapped to physical indexes inside this new range automatically. Even following calls to kblock_trim() will use logical indexes, so, once trimmed, access can only be limited further and never expanded back.

Example:

 //...init KBlock device dev
 kblock_trim(dev, 200, 1500); // Restrict access to the 200-1700 physical block range.
 kblock_read(dev, 0, buf, 0, dev->blk_size);  // Read from physical block #200.
 kblock_trim(dev, 0, 300); // Restrict access to the 200-500 physical block range.
Parameters:
b | KBlock device.
start | The index of the start block for the limiting window in logical addressing units.
count | The number of blocks to be used.
Returns:
0 if all is OK, EOF on errors.

Definition at line 152 of file kblock.c.

size_t kblock_write | ( | struct KBlock * | b,
 |  | block_idx_t | idx,
 |  | const void * | buf,
 |  | size_t | offset,
 |  | size_t | size
 | ) |  |

Write data to the block device.

This function will write size bytes to block idx starting at address offset inside the block.

Note:
Partial block writes are supported only on certain devices. You can use kblock_partialWrite() in order to check if the device has this feature or not.
If the device is opened in buffered mode, this function will use efficiently and trasparently the cache provided. In order to be sure that all modifications are actually written to the device you have to call kblock_flush().
Parameters:
b | KBlock device.
idx | the block number where you want to write.
buf | a pointer to the data to be written.
offset | the offset inside the block from which data writing will start.
size | the size of data to be written.
Returns:
the number of bytes written.
See also:
kblock_read(), kblock_flush(), kblock_buffered(), kblock_partialWrite().

Definition at line 169 of file kblock.c.


BeRTOS: KFile interface

Data Structures | Typedefs | Enumerations | Functions
KFile interface
BeRTOS core functionality

Virtual KFile I/O interface. More...

Data Structures

struct | ReOpenFunc_t
Context data for callback functions which operate on pseudo files. More...

Typedefs

typedef int32_t | kfile_off_t
KFile offset type, used by kfile_seek().

Enumerations

enum | KSeekMode { KSM_SEEK_SET, KSM_SEEK_CUR, KSM_SEEK_END }
Costants for repositioning read/write file offset. More...

Functions

kfile_off_t | kfile_genericSeek (struct KFile *fd, kfile_off_t offset, KSeekMode whence)
Move fd file seek position of offset bytes from whence.
struct KFile * | kfile_genericReopen (struct KFile *fd)
Reopen file fd.
int | kfile_genericClose (struct KFile *fd)
Close file fd.

KFile access functions

Interface functions for KFile access.

size_t | kfile_read (struct KFile *fd, void *buf, size_t size)
Read size bytes from file fd into buf.
int | kfile_gets (struct KFile *fd, char *buf, int size)
Read a line long at most as size and put it in buf.
int | kfile_gets_echo (struct KFile *fd, char *buf, int size, bool echo)
Read a line long at most as size and put it in buf, with optional echo.
kfile_off_t | kfile_copy (KFile *src, KFile *dst, kfile_off_t size)
Copy size bytes from file src to dst.
size_t | kfile_write (struct KFile *fd, const void *buf, size_t size)
Write size bytes from buffer buf into KFile fd.
int | kfile_printf (struct KFile *fd, const char *format,...)
Formatted write.
int | kfile_print (struct KFile *fd, const char *s)
Write a string to kfile fd.
kfile_off_t | kfile_seek (struct KFile *fd, kfile_off_t offset, KSeekMode whence)
Seek into file (if seekable).
KFile * | kfile_reopen (struct KFile *fd)
Close and reopen file fd.
int | kfile_close (struct KFile *fd)
Close file.
int | kfile_flush (struct KFile *fd)
Flush file I/O.
int | kfile_error (struct KFile *fd)
Get file error mask.
void | kfile_clearerr (struct KFile *fd)
Clear errors.
int | kfile_putc (int c, struct KFile *fd)
Generic putc implementation using kfile_write.
int | kfile_getc (struct KFile *fd)
Generic getc implementation using kfile_read.
void | kfile_resync (KFile *fd, mtime_t delay)
Discard input to resynchronize with remote end.
void | kfile_init (struct KFile *fd)
Base class KFile constructor.

Detailed Description

Virtual KFile I/O interface.

KFile is a simple, generic interface for file I/O. It uses an object-oriented model to supply a device-neutral interface to communicate with drivers.

This module contains only definitions, the instance structure and the common API. Each KFile subclass can override one or more methods of the interface, and can extend the base KFile structure with its own private data. For instance, a serial driver might implement the KFile interface by declaring a context structure like this:

 typedef struct Serial
 {
      // base class instance
      KFile fd;

      // private instance data
      FIFOBuffer txfifo, rxfifo;
 } Serial;

You should also supply a macro for casting KFile to Serial:

 INLINE Serial * SERIAL_CAST(KFile *fd)
 {
        ASSERT(fd->_type == KFT_SERIAL);
        return (Serial *)fd;
 }

Then you can implement as many interface functions as needed and leave the rest to NULL.

Example implementation of the close KFile method for Serial:

 static int ser_kfile_close(struct KFile *fd)
 {
        Serial *fds = SERIAL_CAST(fd);
      // [driver specific code here]
        return 0;
 }

The SERIAL_CAST() macro helps ensure that the passed object is really of type Serial.

The KFile interface does not supply an open function: this is deliberate, because in embedded systems each device has its own init parameters. For the same reason, specific device settings like, for example, the baudrate, are not part of interface and should be handled by the driver-specific API.

Author:
Bernie Innocenti <bernie@codewiz.org>
Francesco Sacchi <batt@develer.com>
Daniele Basile <asterix@develer.com>

Enumeration Type Documentation

enum KSeekMode

Costants for repositioning read/write file offset.

These are needed because on some embedded platforms ANSI I/O library may not be present.

Enumerator:
KSM_SEEK_SET

Seek from file beginning.

KSM_SEEK_CUR

Seek from file current position.

KSM_SEEK_END

Seek from file end.

Definition at line 121 of file io/kfile.h.

Function Documentation

int kfile_close ( struct KFile * fd ) [inline]

Close file.

Returns:
0 on success, EOF on errors.

Definition at line 307 of file io/kfile.h.

kfile_off_t kfile_copy | ( | KFile * | src,
 |  | KFile * | dst,
 |  | kfile_off_t | size
 | ) |  |

Copy size bytes from file src to dst.

Parameters:
src | Source KFile.
dst | Destionation KFile.
size | number of bytes to copy.
Returns:
the number of bytes copied.

Definition at line 170 of file kfile.c.

int kfile_error ( struct KFile * fd ) [inline]

Get file error mask.

Returns:
0 on success or file error code, device specific.

Definition at line 327 of file io/kfile.h.

int kfile_flush ( struct KFile * fd ) [inline]

Flush file I/O.

Returns:
0 on success, EOF on errors.

Definition at line 317 of file io/kfile.h.

int kfile_genericClose ( struct KFile * fd )

Close file fd.

This is a generic implementation that only flush the file.

Definition at line 246 of file kfile.c.

struct KFile* kfile_genericReopen ( struct KFile * fd ) [read]

Reopen file fd.

This is a generic implementation that only flush file and reset seek_pos to 0.

Definition at line 235 of file kfile.c.

kfile_off_t kfile_genericSeek | ( | struct KFile * | fd,
 |  | kfile_off_t | offset,
 |  | KSeekMode | whence
 | ) |  |

Move fd file seek position of offset bytes from whence.

This is a generic implementation of seek function, you can redefine it in your local module if needed.

Definition at line 199 of file kfile.c.

int kfile_gets | ( | struct KFile * | fd,
 |  | char * | buf,
 |  | int | size
 | ) |  |

Read a line long at most as size and put it in buf.

Returns:
number of chars read or EOF in case of error.

Definition at line 126 of file kfile.c.

int kfile_gets_echo | ( | struct KFile * | fd,
 |  | char * | buf,
 |  | int | size,
 |  | bool | echo
 | ) |  |

Read a line long at most as size and put it in buf, with optional echo.

Returns:
number of chars read, or EOF in case of error.

Definition at line 139 of file kfile.c.

int kfile_print | ( | struct KFile * | fd,
 |  | const char * | s
 | ) |  |

Write a string to kfile fd.

Returns:
0 if OK, EOF in case of error.

Definition at line 109 of file kfile.c.

size_t kfile_read | ( | struct KFile * | fd,
 |  | void * | buf,
 |  | size_t | size
 | ) |  | [inline]

Read size bytes from file fd into buf.

This function reads at most the number of requested bytes into the provided buffer. The value returned may be less than the requested bytes in case EOF is reached OR an error occurred. You need to check the error conditions using kfile_error() to understand which case happened.

Note:
This function will block if there are less than size bytes to read.
Parameters:
fd | KFile context.
buf | User provided buffer.
size | Number of bytes to read.
Returns:
Number of bytes read.

Definition at line 240 of file io/kfile.h.

KFile* kfile_reopen ( struct KFile * fd ) [inline]

Close and reopen file fd.

The reopening is done with the former file parameters and access modes.

Definition at line 297 of file io/kfile.h.

void kfile_resync | ( | KFile * | fd,
 |  | mtime_t | delay
 | ) |  |

Discard input to resynchronize with remote end.

Discard incoming data until the kfile_getc stops receiving characters for at least delay milliseconds.

Note:
If the timeout occur, we reset the error before to quit.

Definition at line 261 of file kfile.c.

kfile_off_t kfile_seek | ( | struct KFile * | fd,
 |  | kfile_off_t | offset,
 |  | KSeekMode | whence
 | ) |  | [inline]

Seek into file (if seekable).

Move fd file seek position of offset bytes from whence.

Parameters:
fd | KFile context.
offset | Offset bytes to move from position whence.
whence | Position where to start the seek.
Returns:
Current postion in the file.

Definition at line 287 of file io/kfile.h.

size_t kfile_write | ( | struct KFile * | fd,
 |  | const void * | buf,
 |  | size_t | size
 | ) |  | [inline]

Write size bytes from buffer buf into KFile fd.

Return value may be less than size.

Parameters:
fd | KFile context.
buf | User provided data.
size | Number of bytes to write.
Returns:
Number of bytes written.

Definition at line 268 of file io/kfile.h.


BeRTOS: KFile interface over KBlock

Data Structures | Functions
KFile interface over KBlock
BeRTOS core functionality

KFile interface over a KBlock. More...

Data Structures

struct | KFileBlock
KFileBlock context. More...

Functions

void | kfileblock_init (KFileBlock *fb, KBlock *blk)
Init a KFile over KBlock.

Detailed Description

KFile interface over a KBlock.

With this module, you can access a KBlock device with the handy KFile interface. In order to achieve this, the block device must support partial block write.

Error codes returned by kfile_error() are specific of the underlying KBlock implementation.

Make sure you have trimmed the KBlock to avoid overwriting something. Example:

 // init a derived instance of KBlock
 // any will do.
 Flash flash;
 flash_init(&flash, 0);
 kblock_trim(&flash.blk, trim_start, internal_flash.blk.blk_cnt - trim_start);

 // now create and initialize the kfile_block instance
 KFileBlock kfb;
 kfileblock_init(&kfb, &flash.blk);

 // now you can access the Flash in a file like fashion
 kfile_read(&kfb.fd, buf, 20);
Author:
Francesco Sacchi <batt@develer.com>
Daniele Basile <asterix@develer.com>

Function Documentation

void kfileblock_init | ( | KFileBlock * | fb,
 |  | KBlock * | blk
 | ) |  |

Init a KFile over KBlock.

After this you can access your KBlock device with a handy KFile interface.

Note:
The block device must support partial block write in order to support random write access.
Parameters:
fb | KFileBlock context.
blk | block device to be accessed with a KFile interface.

Definition at line 116 of file kfile_block.c.


BeRTOS: Event handling module

Defines | Functions
Event handling module
BeRTOS core functionality

Events handling. More...

Defines

#define | event_initNone(e) ((e)->action = event_hook_ignore)
Initialize the event e as a no-op.
#define | event_initSoftint(e, f, u) ((e)->action = event_hook_softint,(e)->Ev.Int.func = (f), (e)->Ev.Int.user_data = (u))
Initialize the event e with a software interrupt (call function f, with parameter u)

Functions

Event | event_createNone (void)
Same as event_initNone(), but returns the initialized event.
Event | event_createSoftint (Hook func, void *user_data)
Same as event_initSoftint(), but returns the initialized event.
Event | event_createGeneric (void)
Create a generic sleepable event.
void | event_wait (Event *e)
Wait the completion of event e.
int | event_select (Event **evs, int n, ticks_t timeout)
Wait for multiple events.
bool | event_waitTimeout (Event *e, ticks_t timeout)
Wait the completion of event e or timeout elapses.
void | event_do (struct Event *e)
Trigger an event.

Detailed Description

Events handling.

This module implements a common system for executing a user defined action calling a hook function.

Device drivers often need to wait the completion of some event, usually to allow the hardware to accomplish some asynchronous task.

A common approach is to place a busy wait with a cpu_relax() loop that invokes the architecture-specific instructions to say that we're not doing much with the processor.

Although technically correct, the busy loop degrades the overall system performance in presence of multiple processes and power consumption.

With the kernel the natural way to implement such wait/complete mechanism is to use signals via sig_wait() and sig_post()/sig_send().

However, signals in BeRTOS are only available in presence of the kernel (that is just a compile-time option). This means that each device driver must provide two different interfaces to implement the wait/complete semantic: one with the kernel and another without the kernel.

The purpose of the completion events is to provide a generic interface to implement a synchronization mechanism to block the execution of code until a specific event happens.

This interface does not depend on the presence of the kernel and it automatically uses the appropriate event backend to provide the same behaviour with or without the kernel.

Example usage (wait for a generic device driver initialization):

  static Event e;

  static void irq_handler(void)
  {
      // Completion event has happened, resume the execution of init()
      event_do(&e);
  }

  static void init(void)
  {
      // Declare the generic completion event
      event_initGeneric(&e);
      // Submit the hardware initialization request
      async_hw_init();
      // Wait for the completion of the event
      event_wait(&e);
  }

Example usage: wait multiple generic events via event_select()

 Event ev1;
 Event ev2;

 void event_notifier(void)
 {
      Event *evs[] = { &ev1, &ev2 };

      event_initGeneric(&ev1);
      event_initGeneric(&ev2);

      while (1)
      {
              int id = event_select(evs, countof(evs),
                                      ms_to_ticks(100));
              if (id < 0)
              {
                      kprintf("no IRQ\n");
                      continue;
              }
              kprintf("IRQ %d happened\n", id);
      }
 }

 void irq1_handler(void)
 {
      // do something
      ...

      // notify the completion of event 1
      event_do(&ev1);
 }

 void irq2_handler(void)
 {
      // do something
      ...

      // notify the completion of event 2
      event_do(&ev2);
 }
Author:
Bernie Innocenti <bernie@codewiz.org>

Function Documentation

Event event_createGeneric ( void ) [inline]

Create a generic sleepable event.

Returns:
the properly initialized generic event structure.

Definition at line 247 of file event.h.

void event_do ( struct Event * e ) [inline]

Trigger an event.

Execute the callback function associated with event e.

This function can be used also in interrupt routines, but only if the event was created as a signal or generic event.

Definition at line 301 of file event.h.

int event_select | ( | Event ** | evs,
 |  | int | n,
 |  | ticks_t | timeout
 | ) |  |

Wait for multiple events.

On success return the offset in the evs vector of the Event that happened, -1 if the timeout expires.

NOTE: timeout == 0 means no timeout.

Attention:
The API is work in progress and may change in future versions.

Definition at line 193 of file event.c.

void event_wait ( Event * e ) [inline]

Wait the completion of event e.

This function releases the CPU the application is configured to use the kernel, otherwise it's just a busy wait.

Note:
It's forbidden to use this function inside irq handling functions.

Definition at line 261 of file event.h.

bool event_waitTimeout | ( | Event * | e,
 |  | ticks_t | timeout
 | ) |  |

Wait the completion of event e or timeout elapses.

Note:
It's forbidden to use this function inside irq handling functions.

Definition at line 178 of file event.c.


BeRTOS: Embedded optimized memory allocator

Data Structures | Defines | Functions
Embedded optimized memory allocator
BeRTOS core functionality

Heap subsystem (public interface). More...

Data Structures

struct | Heap
A heap. More...

Defines

#define | HEAP_DEFINE_BUF(name, size) heap_buf_t name[((size) + sizeof(heap_buf_t) - 1) / sizeof(heap_buf_t)]
Utility macro to allocate a heap of size size.

Functions

void | heap_init (struct Heap *heap, void *memory, size_t size)
Initialize heap within the buffer pointed by memory which is of size bytes.
void * | heap_allocmem (struct Heap *heap, size_t size)
Allocate a chunk of memory of size bytes from the heap.
void | heap_freemem (struct Heap *heap, void *mem, size_t size)
Free a chunk of memory of size bytes from the heap.
size_t | heap_freeSpace (struct Heap *h)
Returns the number of free bytes in a heap.

Compatibility interface with C standard library

void * | heap_malloc (struct Heap *heap, size_t size)
Standard malloc interface.
void * | heap_calloc (struct Heap *heap, size_t size)
Standard calloc interface.
void | heap_free (struct Heap *heap, void *mem)
Free a block of memory, determining its size automatically.

Detailed Description

Heap subsystem (public interface).

Author:
Bernie Innocenti <bernie@codewiz.org>

Define Documentation

#define HEAP_DEFINE_BUF | ( | name,
 |  | size
 | ) | heap_buf_t name[((size) + sizeof(heap_buf_t) - 1) / sizeof(heap_buf_t)]

Utility macro to allocate a heap of size size.

Parameters:
name | Variable name for the heap.
size | Heap size in bytes.

Definition at line 79 of file heap.h.

Function Documentation

void heap_free | ( | struct Heap * | h,
 |  | void * | mem
 | ) |  |

Free a block of memory, determining its size automatically.

Parameters:
h | Heap from which the block was allocated.
mem | Pointer to a block of memory previously allocated with either heap_malloc() or heap_calloc().
Note:
If mem is a NULL pointer, no operation is performed.
Freeing the same memory block twice has undefined behavior.
This function works like the ANSI C free().

Definition at line 247 of file heap.c.

size_t heap_freeSpace ( struct Heap * h )

Returns the number of free bytes in a heap.

Parameters:
h the heap to check.
Note:
The returned value is the sum of all free memory regions in the heap. Those regions are likely to be *not* contiguous, so a successive allocation may fail even if the requested amount of memory is lower than the current free space.

Definition at line 196 of file heap.c.


BeRTOS: Kernel facilities

Modules
Kernel facilities

Modules

Message box IPC

Simple inter-process messaging system.

Process (Threads) management

BeRTOS Kernel core (Process scheduler).

Mutually exclusive semaphores

Mutually exclusive semaphores.

Kernel signals

Signal module for IPC.

Detailed Description

This section describes the kernel facilities and the synchronization primitives available in BeRTOS.


BeRTOS: Message box IPC

Functions
Message box IPC
Kernel facilities

Simple inter-process messaging system. More...

Functions

void | msg_lockPort (UNUSED_ARG(MsgPort *, port))
Lock a message port.
void | msg_unlockPort (UNUSED_ARG(MsgPort *, port))
Unlock a message port.
void | msg_initPort (MsgPort *port, Event event)
Initialize a message port.
void | msg_put (MsgPort *port, Msg *msg)
Queue msg into port, triggering the associated event.
Msg * | msg_get (MsgPort *port)
Get the first message from the queue of port.
Msg * | msg_peek (MsgPort *port)
Peek the first message in the queue of port, or NULL if the port is empty.
void | msg_reply (Msg *msg)
Send back (reply) msg to its sender.

Detailed Description

Simple inter-process messaging system.

This module implements a common system for executing a user defined action calling a hook function.

A message port is an abstraction used to exchange information asynchronously between processes or other entities such as interrupts and call-back functions.

This form of IPC is higher-level than bare signals and semaphores, because it sets a policy for exchanging structured data with well-defined synchronization and ownership semantics.

Before using it, a message port must be initialized by calling msg_initPort(), which associates the port with an Event object, which can be setup to signal a process or invoke a call-back hook.

A process or interrupt routine can deliver messages to any message port by calling msg_put(). By sending a message, the sender temporarly or permanently transfers ownership of its associated data to the receiver.

Queuing a message to a port automatically triggers the associated Event to notify the receiver. When the receiver wakes up, it usually invokes msg_get() to pick the next message from the port.

Note:
When you put a message into a port, such message becomes unavailable until you retrieve it using msg_get(), eg. you must not delete it or put it into another port.

Message ports can hold any number of pending messages, and receivers usually process them in FIFO order. Other scheduling policies are possible, but not implemented in this API.

After the receiver has done processing a message, it replies it back to the sender with msg_reply(), which transfer ownership back to the original sender. Replies are delivered to a reply port, which is nothing more than another MsgPort structure designated by the sender.

Returning messages to senders is not mandatory, but it provides a convenient way to provide some kind of result and simplify the resource allocation scheme at the same time.

When using signals to receive messages in a process, you call sig_wait() in an event-loop to wake up when messages are delivered to any of your ports. When your process wakes up with the port signal active, multiple messages may already have queued up at the message port, and the process must process them all before returning to sleep. Signals don't keep a nesting count.

A simple message loop works like this:

    // Our message port.
    static MsgPort test_port;

    // A test message with two parameters and a result.
    typedef struct
    {
        Msg msg;

        int x, y;
        int result;
    } TestMsg;

  PROC_DEFINE_STACK(sender_stack, KERN_MINSTACKSIZE);

    // A process that sends two messages and waits for replies.
    static void sender_proc(void)
    {
        MsgPort test_reply_port;
        TestMsg msg1;
        TestMsg msg2;
        Msg *reply;

        msg_initPort(&test_reply_port,
            event_createSignal(proc_current(), SIG_SINGLE);

        // Fill-in first message and send it out.
        msg1.x = 3;
        msg1.y = 2;
        msg1.msg.replyPort = &test_reply_port;
        msg_put(&test_port, &msg1.msg);

        // Fill-in second message and send it out too.
        msg2.x = 5;
        msg2.y = 4;
        msg2.msg.replyPort = &test_reply_port;
        msg_put(&test_port, &msg2.msg);

        // Wait for a reply...
        sig_wait(SIG_SINGLE);

        reply = containerof(msg_get(&test_reply_port), TestMsg, msg);
        ASSERT(reply != NULL);
        ASSERT(reply->result == 5);

        // Get reply to second message.
        while (!(reply = containerof(msg_get(&test_reply_port), TestMsg, msg)))
        {
            // Not yet, be patient and wait some more.
            sig_wait(SIG_SINGLE);
        }

        ASSERT(reply->result == 9);
    }

    // Receive messages and do something boring with them.
    static void receiver_proc(void)
    {
        msg_initPort(&test_port,
            event_createSignal(proc_current(), SIG_EXAMPLE);

        proc_new(sender_proc, NULL,sizeof(sender_stack), sender_stack);

        for (;;)
        {
            sigmask_t sigs = sig_wait(SIG_EXAMPLE | more_signals);

            if (sigs & SIG_EXAMPLE)
            {
                TestMsg *emsg;
                while((emsg = containerof(msg_get(&test_port), TestMsg, msg)))
                {
                    // Do something with the message
                    emsg->result = emsg->x + emsg->y;
                    msg_reply(emsg->msg);
                }
            }
        }
    }
Author:
Bernie Innocenti <bernie@codewiz.org>

Function Documentation

Msg* msg_get ( MsgPort * port ) [inline]

Get the first message from the queue of port.

Returns:
Pointer to the message or NULL if the port was empty.

Definition at line 263 of file msg.h.

void msg_lockPort ( UNUSED_ARG(MsgPort *, port) ) [inline]

Lock a message port.

This is required before reading or manipulating any field of the MsgPort structure.

Note:
Ports may be locked multiple times and each call to msg_lockPort() must be paired with a corresponding call to msg_unlockPort().
See also:
msg_unlockPort()

Definition at line 225 of file msg.h.

Msg* msg_peek ( MsgPort * port ) [inline]

Peek the first message in the queue of port, or NULL if the port is empty.

Definition at line 275 of file msg.h.

void msg_reply ( Msg * msg ) [inline]

Send back (reply) msg to its sender.

Definition at line 289 of file msg.h.

void msg_unlockPort ( UNUSED_ARG(MsgPort *, port) ) [inline]

Unlock a message port.

See also:
msg_lockPort()

Definition at line 235 of file msg.h.


BeRTOS: Process (Threads) management

Defines | Functions
Process (Threads) management
Kernel facilities

BeRTOS Kernel core (Process scheduler). More...

Defines

#define | proc_new(entry, data, size, stack) proc_new_with_name(NULL,(entry),(data),(size),(stack))
Create a new named process and schedules it for execution.
#define | proc_allowed() proc_preemptAllowed()
Deprecated, use the proc_preemptAllowed() macro.
#define | PROC_ATOMIC(CODE)
Execute a block of CODE atomically with respect to task scheduling.
#define | KERN_MINSTACKSIZE
Default stack size for each thread, in bytes.
#define | PROC_DEFINE_STACK(name, size)
Utility macro to allocate a stack of size size.

Functions

void | proc_init (void)
Initialize the process subsystem (kernel).
void | proc_exit (void)
Terminate the execution of the current process.
void | proc_yield (void)
Voluntarily release the CPU.
bool | proc_needPreempt (void)
Check if we need to schedule another task.
void | proc_preempt (void)
Preempt the current task.
void | proc_rename (struct Process *proc, const char *name)
Rename a process.
const char * | proc_name (struct Process *proc)
Return the name of the specified process.
const char * | proc_currentName (void)
Return the name of the currently running process.
iptr_t | proc_currentUserData (void)
Return a pointer to the user data of the current process.
struct Process * | proc_current (void)
Return the context structure of the currently running process.
void | proc_setPri (struct Process *proc, int pri)
Change the scheduling priority of a process.
void | proc_forbid (void)
Disable preemptive task switching.
void | proc_permit (void)
Re-enable preemptive task switching.
bool | proc_preemptAllowed (void)

Detailed Description

BeRTOS Kernel core (Process scheduler).

This is the core kernel module. It allows you to create new processes (which are called threads in other systems) and set the priority of each process.

A process needs a work area (called stack) to run. To create a process, you need to declare a stack area, then create the process. You may also pass NULL for the stack area, if you have enabled kernel heap: in this case the stack will be automatically allocated.

Example:

 PROC_DEFINE_STACK(stack1, 200);

 void NORETURN proc1_run(void)
 {
    while (1)
    {
       LOG_INFO("I'm alive!\n");
       timer_delay(1000);
    }
 }

 int main()
 {
    Process *p1 = proc_new(proc1_run, NULL, stack1, sizeof(stack1));
    // here the process is already running
    proc_setPri(p1, 2);
    // ...
 }

The Process struct must be regarded as an opaque data type, do not access any of its members directly.

The entry point function should be declared as NORETURN, because it will remove a warning and enable compiler optimizations.

You can temporarily disable preemption calling proc_forbid(); remember to enable it again calling proc_permit().

Note:
You should hardly need to manually release the CPU; however you can do it using the cpu_relax() function. It is illegal to release the CPU with preemption disabled.
Author:
Bernie Innocenti <bernie@codewiz.org>

Define Documentation

#define KERN_MINSTACKSIZE
Value:
(sizeof(Process) + CPU_SAVED_REGS_CNT * 2 * sizeof(cpu_stack_t) \
            + 32 * sizeof(int) * 2)

Default stack size for each thread, in bytes.

The goal here is to allow a minimal task to save all of its registers twice, plus push a maximum of 32 variables on the stack. We add also struct Process size since we save it into the process' stack.

The actual size computed by the default formula greatly depends on what options are active and on the architecture.

Note that on most 16bit architectures, interrupts will also run on the stack of the currently running process. Nested interrupts will greatly increases the amount of stack space required per process. Use irqmanager to minimize stack usage.

Definition at line 391 of file proc.h.

#define proc_allowed ( ) proc_preemptAllowed()

Deprecated, use the proc_preemptAllowed() macro.

Definition at line 344 of file proc.h.

#define PROC_DEFINE_STACK | ( | name,
 |  | size
 | ) |
Value:
cpu_stack_t name[((size) + sizeof(cpu_stack_t) - 1) / sizeof(cpu_stack_t)]; \
    STATIC_ASSERT((size) >= KERN_MINSTACKSIZE);

Utility macro to allocate a stack of size size.

This macro define a static stack for one process and do check if given stack size is enough to run process.

Note:
If you plan to use kprintf() and similar functions, you will need at least KERN_MINSTACKSIZE * 2 bytes.
Parameters:
name | Variable name for the stack.
size | Stack size in bytes. It must be at least KERN_MINSTACKSIZE.

Definition at line 420 of file proc.h.

#define proc_new | ( | entry,
 |  | data,
 |  | size,
 |  | stack
 | ) | proc_new_with_name(NULL,(entry),(data),(size),(stack))

Create a new named process and schedules it for execution.

When defining the stacksize take into account that you may want at least:

  • save all the registers for each nested function call;
  • have memory for the struct Process, which is positioned at the bottom of the stack;
  • have some memory for temporary variables inside called functions.

The value given by KERN_MINSTACKSIZE is rather safe to use in the first place.

Parameters:
entry | Function that the process will execute.
data | Pointer to user data.
size | Length of the stack.
stack | Pointer to the memory area to be used as a stack.
Returns:
Process structure of new created process if successful, NULL otherwise.

Definition at line 178 of file proc.h.

Function Documentation

struct Process* proc_current ( void ) [read]

Return the context structure of the currently running process.

The details of the Process structure are private to the scheduler. The address returned by this function is an opaque pointer that can be passed as an argument to other process-related functions.

Definition at line 235 of file proc.h.

iptr_t proc_currentUserData ( void ) [inline]

Return a pointer to the user data of the current process.

To obtain user data, just call this function inside the process. Remember to cast the returned pointer to the correct type.

Returns:
Pointer to the user data of the current process.

Definition at line 218 of file proc.h.

void proc_forbid ( void ) [inline]

Disable preemptive task switching.

The scheduler maintains a global nesting counter. Task switching is effectively re-enabled only when the number of calls to proc_permit() matches the number of calls to proc_forbid().

Note:
Calling functions that could sleep while task switching is disabled is dangerous and unsupported.
proc_permit() expands inline to 1-2 asm instructions, so it's a very efficient locking primitive in simple but performance-critical situations. In all other cases, semaphores offer a more flexible and fine-grained locking primitive.
See also:
proc_permit()

Definition at line 268 of file proc.h.

void proc_init ( void )

Initialize the process subsystem (kernel).

It must be called before using any process related function.

Definition at line 201 of file proc.c.

const char* proc_name ( struct Process * proc )

Return the name of the specified process.

NULL is a legal argument and will return the name "<NULL>".

Definition at line 393 of file proc.c.

void proc_permit ( void ) [inline]

Re-enable preemptive task switching.

See also:
proc_forbid()

Definition at line 308 of file proc.h.

bool proc_preemptAllowed ( void ) [inline]
Returns:
true if preemptive task switching is allowed.
Note:
This accessor is needed because preempt_count must be absoultely private.

Definition at line 332 of file proc.h.

void proc_setPri | ( | struct Process * | proc,
 |  | int | pri
 | ) |  |

Change the scheduling priority of a process.

Process piorities are signed ints, whereas a larger integer value means higher scheduling priority. The default priority for new processes is 0. The idle process runs with the lowest possible priority: INT_MIN.

A process with a higher priority always preempts lower priority processes. Processes of equal priority share the CPU time according to a simple round-robin policy.

As a general rule to maximize responsiveness, compute-bound processes should be assigned negative priorities and tight, interactive processes should be assigned positive priorities.

To avoid interfering with system background activities such as input processing, application processes should remain within the range -10 and +10.

Definition at line 440 of file proc.c.


BeRTOS: Mutually exclusive semaphores

Mutually exclusive semaphores
Kernel facilities

Mutually exclusive semaphores. More...

Process synchronization services

void | sem_init (struct Semaphore *s)
Initialize a Semaphore structure.
bool | sem_attempt (struct Semaphore *s)
Attempt to lock a semaphore without waiting.
void | sem_obtain (struct Semaphore *s)
Lock a semaphore.
void | sem_release (struct Semaphore *s)
Release a lock on a previously locked semaphore.

Detailed Description

Mutually exclusive semaphores.

Shared locking not supported in this implementation.

Author:
Bernie Innocenti <bernie@codewiz.org>

Function Documentation

bool sem_attempt ( struct Semaphore * s )

Attempt to lock a semaphore without waiting.

Returns:
true in case of success, false if the semaphore was already locked by someone else.
Note:
each call to sem_attempt() must be matched by a call to sem_release().
See also:
sem_obtain() sem_release()

Definition at line 78 of file sem.c.

void sem_obtain ( struct Semaphore * s )

Lock a semaphore.

If the semaphore is already owned by another process, the caller process will be enqueued into the waiting list and sleep until the semaphore is available.

Note:
Each call to sem_obtain() must be matched by a call to sem_release().
This routine is optimized for highest speed in the most common case: the semaphore is free or locked by the calling process itself. Rearranging this code is probably a bad idea.
See also:
sem_release() sem_attempt()

Definition at line 113 of file sem.c.

void sem_release ( struct Semaphore * s )

Release a lock on a previously locked semaphore.

If the nesting count of the semaphore reaches zero, the next process waiting for it will be awaken.

Note:
This routine is optimized for highest speed in the most common case: the semaphore has been locked just once and nobody else was waiting for it. Rearranging this code is probably a bad idea.
See also:
sem_obtain() sem_attempt()

Definition at line 157 of file sem.c.


BeRTOS: Kernel signals

Functions
Kernel signals
Kernel facilities

Signal module for IPC. More...

Functions

sigmask_t | sig_checkSignal (Signal *s, sigmask_t sigs)
Check if any of the signals in sigs has occurred and clear them.
sigmask_t | sig_check (sigmask_t sigs)
Check if any of the signals in sigs has occurred and clear them.
void | sig_send (Process *proc, sigmask_t sig)
Send the signals sigs to the process proc and immeditaly dispatch it for execution.
void | sig_post (Process *proc, sigmask_t sig)
Send the signals sigs to the process proc.
sigmask_t | sig_wait (sigmask_t sigs)
Sleep until any of the signals in sigs occurs.
sigmask_t | sig_waitTimeout (sigmask_t sigs, ticks_t timeout)
Sleep until any of the signals in sigs or timeout ticks elapse.

Signal definitions

#define | SIG_USER0 BV(0)
Free for user usage.
#define | SIG_USER1 BV(1)
Free for user usage.
#define | SIG_USER2 BV(2)
Free for user usage.
#define | SIG_USER3 BV(3)
Free for user usage.
#define | SIG_SINGLE BV(4)
Used to wait for a single event.
#define | SIG_SYSTEM5 BV(5)
Reserved for internal system use.
#define | SIG_SYSTEM6 BV(6)
Reserved for internal system use.
#define | SIG_TIMEOUT BV(7)
Reserved for timeout use.
#define | SIG_USER_MAX SIG_SINGLE
Max number of signals that can be used by drivers or user applications.

Detailed Description

Signal module for IPC.

Author:
Bernie Innocenti <bernie@codewiz.org>

Function Documentation

sigmask_t sig_check ( sigmask_t sigs ) [inline]

Check if any of the signals in sigs has occurred and clear them.

Returns:
the signals that have occurred.

Definition at line 92 of file signal.h.

sigmask_t sig_checkSignal | ( | Signal * | s,
 |  | sigmask_t | sigs
 | ) |  | [inline]

Check if any of the signals in sigs has occurred and clear them.

Returns:
the signals that have occurred.

Definition at line 75 of file signal.h.

void sig_post | ( | Process * | proc,
 |  | sigmask_t | sig
 | ) |  | [inline]

Send the signals sigs to the process proc.

The process will be awoken if it was waiting for any of them.

Note:
This call is interrupt safe.

Definition at line 123 of file signal.h.

void sig_send | ( | Process * | proc,
 |  | sigmask_t | sig
 | ) |  | [inline]

Send the signals sigs to the process proc and immeditaly dispatch it for execution.

The process will be awoken if it was waiting for any of them and immediately dispatched for execution.

Note:
This function can't be called from IRQ context, use sig_post() instead.

Definition at line 110 of file signal.h.

sigmask_t sig_wait ( sigmask_t sigs ) [inline]

Sleep until any of the signals in sigs occurs.

Returns:
the signal(s) that have awoken the process.

Definition at line 144 of file signal.h.

sigmask_t sig_waitTimeout | ( | sigmask_t | sigs,
 |  | ticks_t | timeout
 | ) |  | [inline]

Sleep until any of the signals in sigs or timeout ticks elapse.

If the timeout elapse a SIG_TIMEOUT is added to the received signal(s).

Returns:
the signal(s) that have awoken the process.
Note:
Caller must check return value to check which signal awoke the process.

Definition at line 159 of file signal.h.


BeRTOS: Middleware facilities

Modules
Middleware facilities

Modules

Simple RPC machinery

Channel protocol parser and commands.

Detailed Description

This section describes various algorithms and standalone code useful in day to day programming.


BeRTOS: Simple RPC machinery

Data Structures | Defines | Typedefs | Enumerations | Functions
Simple RPC machinery
Middleware facilities

Channel protocol parser and commands. More...

Data Structures

union | parms
union that contains parameters passed to and from commands More...
struct | CmdTemplate
Define a command that can be tokenized by the parser. More...

Defines

#define | REGISTER_CMD(NAME) REGISTER_FUNCTION(&cmd_ ## NAME ## _template)
Utility function to register a command.
#define | MAKE_TEMPLATE(NAME, ARGS, RES, FLAGS)
Utility macro to create a command template.
#define | MAKE_CMD(NAME, ARGS, RES, BODY, FLAGS)
Utility macro to create command templates and callback functions.

Typedefs

typedef ResultCode(* | CmdFuncPtr )(parms args_results[])
pointer to commands

Enumerations

enum | ResultCode { RC_ERROR = -1, RC_OK = 0, RC_REPLY = 1, RC_SKIP = 2 }
Error generated by the commands through the return code. More...

Functions

void | parser_init (void)
Initialize the parser module.
void | parser_register_cmd (const struct CmdTemplate *cmd)
Register a new command into the parser.
const char * | parser_rl_match (void *dummy, const char *word, int word_len)
Hook for readline to provide completion support for the commands registered in the parser.
bool | parser_process_line (const char *line)
Command input handler.
bool | parser_execute_cmd (const struct CmdTemplate *templ, parms args[CONFIG_PARSER_MAX_ARGS])
Execute a command with its arguments, and fetch its results.
struct CmdTemplate * | parser_get_cmd_template (const char *line)
Find the template for the command contained in the text line.
bool | parser_get_cmd_arguments (const char *line, const struct CmdTemplate *templ, parms args[CONFIG_PARSER_MAX_ARGS])
Extract the arguments for the command contained in the text line.

Detailed Description

Channel protocol parser and commands.

This module provides a simple text based RPC implementation. Often there is the need to give a command to the device and receive results back. Each command may have a variable number of input and output parameters, with variable type, and a return code which indicates if the command was successfully executed or not; this module provides the machinery to facilitate the above RPC scenario. You will need to write the RPC input and reply code as well as the definition of the commands.

Commands are defined using a CmdTemplate struct containing:

  • command name: the string that will be matched by the parser;
  • command arguments: a string representing type and number of input arguments;
  • command output: a string representing type and number of output arguments;
  • function callback: function implementing the command.

Once you have declared the commands, you need to register them in the parser with the function parser_register_cmd(). You are strongly encouraged to use MAKE_CMD() (or alternatively MAKE_TEMPLATE()) and REGISTER_CMD() to declare and register commands.

A command line can be parsed with the following steps:

  • find the corresponding command template with parser_get_cmd_template()
  • extract command arguments with parser_get_cmd_arguments()
  • execute the command with parser_execute_cmd()

You can also provide interactive command line completion using parser_rl_match().

Example:

 // Declare a buzzer command
 MAKE_CMD(beep, "d", "",
 ({
    buz_beep(args[1].l);
    RC_OK;
 }), 0)

 // initialize the parser
 parser_init();
 REGISTER_CMD(beep);

 // parse an input line
 char buf[80];
 // read line from somewhere
 rpc_get(buf);
 // now parse the line
 const struct CmdTemplate *templ;
 templ = parser_get_cmd_template(buf);

 // Take arguments (optionally check errors)
 parms args[PARSER_MAX_ARGS];
 parser_get_cmd_arguments(buf, templ, args);
 //Execute command
 if(!parser_execute_cmd(templ, args))
 {
    // error
 }
 // Now args contain the outputs of the function, you can send it
 // back to the caller
 rpc_reply(args)

Configuration file: cfg_parser.h

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>
Giovanni Bajo <rasky@develer.com>

Define Documentation

#define MAKE_CMD | ( | NAME,
 |  | ARGS,
 |  | RES,
 |  | BODY,
 |  | FLAGS
 | ) |
Value:
static ResultCode cmd_ ## NAME (parms *args)    \
{                                               \
    return (ResultCode)BODY;                \
}                                               \
MAKE_TEMPLATE(NAME, ARGS, RES, FLAGS)

Utility macro to create command templates and callback functions.

Example for a version command:

 MAKE_CMD(ver, "", "ddd",
 ({
    args[1].l = VERS_MAJOR;
    args[2].l = VERS_MINOR;
    args[3].l = VERS_REV;
    RC_OK;
 }), 0);

Remember that input and output parameters start from index 1, since args[0] is the command itself. The last line is the return value of the function.

Parameters:
NAME | Command name matched by the parser
ARGS | Input arguments to the command
RES | Output arguments of the command
BODY | Command body, expressed with C 'statement expression'
FLAGS | Command flags

Definition at line 208 of file parser.h.

#define MAKE_TEMPLATE | ( | NAME,
 |  | ARGS,
 |  | RES,
 |  | FLAGS
 | ) |
Value:
const struct CmdTemplate cmd_ ## NAME ## _template =   \
{                                                      \
    #NAME, ARGS, RES, cmd_ ## NAME, FLAGS          \
};

Utility macro to create a command template.

It requires that a callback function with name cmd_NAME is already defined.

Parameters:
NAME | Command name
ARGS | Input arguments
RES | Output arguments
FLAGS | Command flags

Definition at line 178 of file parser.h.

#define REGISTER_CMD ( NAME ) REGISTER_FUNCTION(&cmd_ ## NAME ## _template)

Utility function to register a command.

Parameters:
NAME Command name to register

Definition at line 166 of file parser.h.

Enumeration Type Documentation

enum ResultCode

Error generated by the commands through the return code.

Enumerator:
RC_ERROR

Reply with error.

RC_OK

No reply (ignore reply arguments).

RC_REPLY

Reply command arguments.

RC_SKIP

Skip following commands.

Definition at line 125 of file parser.h.

Function Documentation

bool parser_execute_cmd | ( | const struct CmdTemplate * | templ,
 |  | parms | args[CONFIG_PARSER_MAX_ARGS]
 | ) |  | [inline]

Execute a command with its arguments, and fetch its results.

The args paramenter is value-result: it provides input arguments to the callback function and it stores output values on return.

Parameters:
templ | Template of the command to be executed
args | Arguments for the command, and will contain the results
Returns:
False if the command returned an error, true otherwise

Definition at line 247 of file parser.h.

bool parser_get_cmd_arguments | ( | const char * | input,
 |  | const struct CmdTemplate * | cmdp,
 |  | parms | args[CONFIG_PARSER_MAX_ARGS]
 | ) |  |

Extract the arguments for the command contained in the text line.

The first argument will always be the command name, so the actual arguments will start at index 1.

Parameters:
input | Text line to be processed (ASCIIZ)
cmdp | Command template for this line
args | Will contain the extracted parameters
Returns:
True if everything OK, false in case of parsing error.

Definition at line 261 of file parser.c.

struct CmdTemplate* parser_get_cmd_template ( const char * input ) [read]

Find the template for the command contained in the text line.

The template can be used to tokenize the command and interpret it.

This function can be used to find out which command is contained in a given text line without parsing all the parameters and executing it.

Parameters:
input Text line to be processed (ASCIIZ)
Returns:
The command template associated with the command contained in the line, or NULL if the command is invalid.

Definition at line 216 of file parser.c.

void parser_init ( void )

Initialize the parser module.

Note:
This function must be called before any other function in this module

Definition at line 318 of file parser.c.

bool parser_process_line ( const char * input )

Command input handler.

Process the input, calling the requested command (if found).

Parameters:
input Text line to be processed (ASCIIZ)
Returns:
true if everything is OK, false in case of errors

Definition at line 290 of file parser.c.

void parser_register_cmd ( const struct CmdTemplate * cmd )

Register a new command into the parser.

Parameters:
cmd Command template describing the command

Definition at line 313 of file parser.c.

const char* parser_rl_match | ( | void * | dummy,
 |  | const char * | word,
 |  | int | word_len
 | ) |  |

Hook for readline to provide completion support for the commands registered in the parser.

Note:
This is meant to be used with mware/readline.c. See the documentation there for a description of this hook.


BeRTOS: General purpose graphical routines

Modules
General purpose graphical routines

Modules

Chart graphical routines

Simple charts on top of mware/gfx routines (interface).

Text handling on graphical displays.

Text graphic routines (interface)


BeRTOS: Chart graphical routines

Functions
Chart graphical routines
General purpose graphical routines

Simple charts on top of mware/gfx routines (interface). More...

Functions

void | chart_drawAxis (Bitmap *bm)
Draw the chart axes.
void | chart_drawCurve (Bitmap *bm, const chart_y_t *curve_y, int curve_cnt)
Draw a set of curve_cnt connected segments, whose Y coordinates are identified by the curve_y array and X-coordinates are are evenly spaced by one virtual unit.
void | chart_drawDots (Bitmap *bm, const chart_x_t *dots_x, const chart_y_t *dots_y, int cnt)
Disegna dei dot in corrispondenza delle coppie (dotsx[i];dotsy[i]) Se dotsx e' NULL, i punti vengono disegnati ad intervalli regolari.

Width/height of the small ticks drawn over the axes

#define | TICKS_HEIGHT 2
#define | TICKS_WIDTH 2

Chart frame dimensions

#define | CHART_BORDERTOP 0
#define | CHART_BORDERBOTTOM 0
#define | CHART_BORDERLEFT 0
#define | CHART_BORDERRIGHT 0

Detailed Description

Simple charts on top of mware/gfx routines (interface).

Configuration:

  • CONFIG_CHART_TYPE_X: type for the input dataset of X-coordinates
  • CONFIG_CHART_TYPE_Y: type for the input dataset of Y-coordinates

Sample usage:

    bm = chart_init(0, ymax, N_POINTS_CURVE, ymin);

    chart_drawCurve(bm, curve_y, curve_points + 1);
    gfx_setViewRect(bm, xmin, ymax, xmax, ymin);
    chart_drawDots(bm, samples_x, samples_y, samples_cnt);

    print_bitmap(bm);
Author:
Bernie Innocenti <bernie@codewiz.org>


BeRTOS: Text handling on graphical displays.

Defines | Functions
Text handling on graphical displays.
General purpose graphical routines

Text graphic routines (interface) More...

Defines

#define | ANSI_ESC_CLEARSCREEN 'c'
Escape sequences codes.

Functions

void | text_moveTo (struct Bitmap *bm, int row, int col)
Move (imaginary) cursor to column and row specified.
void | text_setCoord (struct Bitmap *bm, int x, int y)
Move (imaginary) cursor to coordinates specified.
int | text_putchar (char c, struct Bitmap *bm)
Render char c, with (currently) limited ANSI escapes emulation support and '
' for newline.
uint8_t | text_style (struct Bitmap *bm, uint8_t flags, uint8_t mask)
Set/clear algorithmic font style bits.
void | text_clear (struct Bitmap *bm)
Clear the screen and reset cursor position.

Style flags

See also:
text_style()
#define | STYLEF_BOLD BV(0)
#define | STYLEF_ITALIC BV(1)
#define | STYLEF_UNDERLINE BV(2)
#define | STYLEF_INVERT BV(3)
#define | STYLEF_EXPANDED BV(4)
#define | STYLEF_CONDENSED BV(5)
#define | STYLEF_STRIKEOUT BV(6)
#define | STYLEF_TALL BV(7)
#define | STYLEF_MASK

Formatting flags for text rendering

See also:
text_xprintf()
#define | TEXT_NORMAL 0
Normal mode.
#define | TEXT_FILL BV(13)
Fill rest of line with spaces.
#define | TEXT_CENTER BV(14)
Center string in line.
#define | TEXT_RIGHT BV(15)
Right aligned.

Detailed Description

Text graphic routines (interface)

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Function Documentation

void text_moveTo | ( | struct Bitmap * | bm,
 |  | int | row,
 |  | int | col
 | ) |  |

Move (imaginary) cursor to column and row specified.

Next text write will start a that row and col.

Definition at line 70 of file text.c.

uint8_t text_style | ( | struct Bitmap * | bm,
 |  | uint8_t | flags,
 |  | uint8_t | mask
 | ) |  |

Set/clear algorithmic font style bits.

Parameters:
bm | Pointer to Bitmap to affect.
flags | Style flags to set
mask | Mask of flags to modify
Returns:
Old style flags

Examples: Turn on bold, leave other styles alone

 text_style(bm, STYLEF_BOLD, STYLEF_BOLD);

Turn off bold and turn on italic, leave others as they are

 text_style(bm, STYLEF_ITALIC, STYLEF_BOLD | STYLEF_ITALIC);

Query current style without chaning it

 style = text_style(bm, 0, 0);

Reset all styles (plain text)

 text_style(bm, 0, STYLE_MASK);

Definition at line 315 of file text.c.


BeRTOS: BeRTOS GUI toolkit

Modules
BeRTOS GUI toolkit

Modules

Menu handling module

Common menu handling API.


BeRTOS: Menu handling module

Data Structures | Typedefs | Functions
Menu handling module
BeRTOS GUI toolkit

Common menu handling API. More...

Data Structures

struct | MenuItem
Menu item description. More...
struct | Menu
Menu description. More...

Typedefs

typedef iptr_t(* | MenuHook )(iptr_t userdata)
Menu callback function.
typedef void(* | RenderHook )(struct Bitmap *bitmap, int ypos, bool selected, const struct MenuItem *item)
Render hook callback function prototype.

Functions

iptr_t | menu_handle (const struct Menu *menu)
Handle a menu and invoke hook functions for the selected menu items.
int | menu_setFlags (struct Menu *menu, int idx, int flags)
Set flags on a menuitem.
int | menu_clearFlags (struct Menu *menu, int idx, int flags)
Clear flags on a menuitem.

Flags for MenuItem.flags.

#define | MIF_EXCLUDE_MASK 0x00FF
Mask for mutual exclusion map (shared with priority).
#define | MIF_PRI_MASK 0x00FF
Mask for priority value (shared with mutual exclusion).
#define | MIF_PRI(x) ((x) & MIF_PRI_MASK)
Set menu item priority.
#define | MIF_EXCLUDE_0 BV(0)
Exclude item 0 when this item is checked.
#define | MIF_EXCLUDE_1 BV(1)
Exclude item 1 when this item is checked.
#define | MIF_EXCLUDE_2 BV(2)
Exclude item 2 when this item is checked.
#define | MIF_EXCLUDE_3 BV(3)
Exclude item 3 when this item is checked.
#define | MIF_EXCLUDE_4 BV(4)
Exclude item 4 when this item is checked.
#define | MIF_EXCLUDE_5 BV(5)
Exclude item 5 when this item is checked.
#define | MIF_EXCLUDE_6 BV(6)
Exclude item 6 when this item is checked.
#define | MIF_EXCLUDE_7 BV(7)
Exclude item 7 when this item is checked.
#define | MIF_CHECKED BV(8)
Item is currently checked.
#define | MIF_CHECKIT BV(9)
Automatically check this item when selected.
#define | MIF_TOGGLE BV(10)
Toggle MIF_CHECKED when item is selected.
#define | MIF_HIDDEN BV(11)
This menu item is not visible.
#define | MIF_DISABLED BV(12)
This menu item is not visible.
#define | MIF_RAMLABEL BV(13)
Item label is stored in RAM, not in program memory.
#define | MIF_RENDERHOOK BV(14)
Menu render function is passed in label field.

Flags for Menu.flags.

#define | MF_STICKY BV(0)
Stay in the menu when the items called return.
#define | MF_TOPLEVEL BV(1)
Top-level menu (do not display "back" label)
#define | MF_ROMITEMS BV(2)
Menu items are stored in ROM (default is RAM)
#define | MF_SAVESEL BV(3)
Remember the selected item across invocations.

Special result codes for menu_handle().

#define | MENU_OK ((iptr_t)0)
#define | MENU_CANCEL ((iptr_t)-1)
#define | MENU_TIMEOUT ((iptr_t)-2)
#define | MENU_ABORT ((iptr_t)-3)
#define | MENU_DISABLED ((iptr_t)-4)

Detailed Description

Common menu handling API.

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Define Documentation

#define MF_SAVESEL BV(3)

Remember the selected item across invocations.

Definition at line 115 of file menu.h.

#define MIF_EXCLUDE_MASK 0x00FF

Mask for mutual exclusion map (shared with priority).

Definition at line 75 of file menu.h.

#define MIF_PRI ( x ) ((x) & MIF_PRI_MASK)

Set menu item priority.

Definition at line 77 of file menu.h.

#define MIF_PRI_MASK 0x00FF

Mask for priority value (shared with mutual exclusion).

Definition at line 76 of file menu.h.

Function Documentation

int menu_clearFlags | ( | struct Menu * | menu,
 |  | int | idx,
 |  | int | flags
 | ) |  |

Clear flags on a menuitem.

Parameters:
menu | Menu owner of the item to change.
idx | Index of the menu item.
flags | Bit mask of the flags to clear.
Returns:
Old flags.

Definition at line 574 of file menu.c.

int menu_setFlags | ( | struct Menu * | menu,
 |  | int | idx,
 |  | int | flags
 | ) |  |

Set flags on a menuitem.

Parameters:
menu | Menu owner of the item to change.
idx | Index of the menu item.
flags | Bit mask of the flags to set.
Returns:
Old flags.

Definition at line 554 of file menu.c.


BeRTOS: Embedded optimized general purpose data types

Modules
Embedded optimized general purpose data types

Modules

FIFO buffer

General pourpose FIFO buffer implemented with a ring buffer.

General purpose lists

General pourpose double-linked lists.

Pool memory allocator

Pool macros.


BeRTOS: FIFO buffer

Functions
FIFO buffer
Embedded optimized general purpose data types

General pourpose FIFO buffer implemented with a ring buffer. More...

Functions

bool | fifo_isempty (const FIFOBuffer *fb)
Check whether the fifo is empty.
bool | fifo_isfull (const FIFOBuffer *fb)
Check whether the fifo is full.
void | fifo_push (FIFOBuffer *fb, unsigned char c)
Push a character on the fifo buffer.
unsigned char | fifo_pop (FIFOBuffer *fb)
Pop a character from the fifo buffer.
void | fifo_flush (FIFOBuffer *fb)
Make the fifo empty, discarding all its current contents.
bool | fifo_isempty_locked (const FIFOBuffer *fb)
Similar to fifo_isempty(), but with stronger guarantees for concurrent access between user and interrupt code.
void | fifo_push_locked (FIFOBuffer *fb, unsigned char c)
Similar to fifo_push(), but with stronger guarantees for concurrent access between user and interrupt code.
void | fifo_flush_locked (FIFOBuffer *fb)
Similar to fifo_flush(), but with stronger guarantees for concurrent access between user and interrupt code.
bool | fifo_isfull_locked (const FIFOBuffer *_fb)
Thread safe version of fifo_isfull()
void | fifo_init (FIFOBuffer *fb, unsigned char *buf, size_t size)
FIFO Initialization.
size_t | fifo_len (FIFOBuffer *fb)

Detailed Description

General pourpose FIFO buffer implemented with a ring buffer.

  • begin points to the first buffer element;
  • end points to the last buffer element (unlike the STL convention);
  • head points to the element to be extracted next;
  • tail points to the location following the last insertion;
  • when any of the pointers advances beyond end, it is reset back to begin.
  +-----------------------------------+
  |  empty  |   valid data   |  empty |
  +-----------------------------------+
  ^         ^                ^        ^
  begin    head             tail     end

The buffer is EMPTY when head and tail point to the same location:

 head == tail

The buffer is FULL when tail points to the location immediately after head:

 tail == head - 1

The buffer is also FULL when tail points to the last buffer location and head points to the first one:

 head == begin && tail == end
Author:
Bernie Innocenti <bernie@codewiz.org>

Function Documentation

void fifo_flush_locked ( FIFOBuffer * fb ) [inline]

Similar to fifo_flush(), but with stronger guarantees for concurrent access between user and interrupt code.

Note:
This is actually only needed for 8-bit processors.
See also:
fifo_flush()

Definition at line 264 of file fifobuf.h.

bool fifo_isempty ( const FIFOBuffer * fb ) [inline]

Check whether the fifo is empty.

Note:
Calling fifo_isempty() is safe while a concurrent execution context is calling fifo_push() or fifo_pop() only if the CPU can atomically update a pointer (which the AVR and other 8-bit processors can't do).
See also:
fifo_isempty_locked

Definition at line 105 of file fifobuf.h.

bool fifo_isempty_locked ( const FIFOBuffer * fb ) [inline]

Similar to fifo_isempty(), but with stronger guarantees for concurrent access between user and interrupt code.

Note:
This is actually only needed for 8-bit processors.
See also:
fifo_isempty()

Definition at line 227 of file fifobuf.h.

bool fifo_isfull ( const FIFOBuffer * fb ) [inline]

Check whether the fifo is full.

Note:
Calling fifo_isfull() is safe while a concurrent execution context is calling fifo_pop() and the CPU can update a pointer atomically. It is NOT safe when the other context calls fifo_push(). This limitation is not usually problematic in a consumer/producer scenario because the fifo_isfull() and fifo_push() are usually called in the producer context.

Definition at line 125 of file fifobuf.h.

size_t fifo_len ( FIFOBuffer * fb ) [inline]
Returns:
Lenght of the FIFOBuffer fb.

Definition at line 298 of file fifobuf.h.

unsigned char fifo_pop ( FIFOBuffer * fb ) [inline]

Pop a character from the fifo buffer.

Note:
Calling fifo_pop() on an empty buffer is undefined. The caller must make sure the buffer contains at least one character before calling this function.
It is safe to call fifo_pop() and fifo_push() from concurrent contexts.

Definition at line 177 of file fifobuf.h.

void fifo_push | ( | FIFOBuffer * | fb,
 |  | unsigned char | c
 | ) |  | [inline]

Push a character on the fifo buffer.

Note:
Calling fifo_push() on a full buffer is undefined. The caller must make sure the buffer has at least one free slot before calling this function.
It is safe to call fifo_pop() and fifo_push() from concurrent contexts, unless the CPU can't update a pointer atomically (which the AVR and other 8-bit processors can't do).
See also:
fifo_push_locked

Definition at line 148 of file fifobuf.h.

void fifo_push_locked | ( | FIFOBuffer * | fb,
 |  | unsigned char | c
 | ) |  | [inline]

Similar to fifo_push(), but with stronger guarantees for concurrent access between user and interrupt code.

Note:
This is actually only needed for 8-bit processors.
See also:
fifo_push()

Definition at line 243 of file fifobuf.h.


BeRTOS: General purpose lists

Data Structures | Defines | Functions
General purpose lists
Embedded optimized general purpose data types

General pourpose double-linked lists. More...

Data Structures

struct | Node
This structure represents a node for bidirectional lists. More...
struct | List
Head of a doubly-linked list of Node structs. More...
struct | PriNode
Extended node for priority queues. More...

Defines

#define | DECLARE_NODE_ANON(T) T *succ; T *pred;
Template for a naked node in a list of T structures.
#define | DECLARE_NODE_TYPE(T) typedef struct T##Node { T *succ; T *pred; } T##Node
Declare a typesafe node for structures of type T.
#define | DECLARE_LIST_TYPE(T)
Template for a list of T structures.
#define | LIST_HEAD(l) ((l)->head.succ)
Get a pointer to the first node in a list.
#define | LIST_TAIL(l) ((l)->tail.pred)
Get a pointer to the last node in a list.
#define | FOREACH_NODE(n, l)
Iterate over all nodes in a list.
#define | REVERSE_FOREACH_NODE(n, l)
Iterate backwards over all nodes in a list.
#define | LIST_INIT(l)
Initialize a list.
#define | LIST_ASSERT_VALID(l)
Make sure that a list is valid (it was initialized and is not corrupted).
#define | LIST_ASSERT_NOT_CONTAINS(list, node)
Checks that a node isn't part of a given list.
#define | LIST_EMPTY(l) ( (void *)((l)->head.succ) == (void *)(&(l)->tail) )
Tell whether a list is empty.
#define | ADDHEAD(l, n)
Add node to list head.
#define | ADDTAIL(l, n)
Add node to list tail.
#define | INSERT_BEFORE(n, ln)
Insert node n before node ln.
#define | REMOVE(n)
Remove n from whatever list it is in.
#define | LIST_ENQUEUE_HEAD(list, node)
Insert a priority node in a priority queue.
#define | LIST_ENQUEUE(list, node)
Insert a priority node in a priority queue.

Functions

Node * | list_remHead (List *l)
Unlink a node from the head of the list l.
Node * | list_remTail (List *l)
Unlink a node from the tail of the list l.

Detailed Description

General pourpose double-linked lists.

Lists contain nodes. You can put any custom struct into any list as long as it has a Node struct inside it. If you make the Node struct the first member of your data type, you can simply cast it to (Node *) when passing it to list functions.

Lists must be initialized before use with LIST_INIT(). You can then add objects using ADDHEAD() and ADDTAIL() macros, and remove them with list_remHead() and list_remTail().

You can create lists with priorities by using PriNode instead of Node as the base member struct. Use LIST_ENQUEUE() and LIST_ENQUEUE_HEAD() to insert a priority node into a list.

To iterate over a list, use the macros FOREACH_NODE() and REVERSE_FOREACH_NODE() in this way:

 struct Foo
 {
     Node n;
     int a;
 }

 int main()
 {
        List foo_list;
        static Foo foo1, foo2;
        Foo *fp;

        LIST_INIT(&foo_list);
        ADDHEAD(&foo_list, (Node *)&foo1);
        INSERT_BEFORE(&foo_list, (Node *)&foo2);
        FOREACH_NODE(fp, &foo_list)
            fp->a = 10;
 }
Author:
Bernie Innocenti <bernie@codewiz.org>

Define Documentation

#define ADDHEAD | ( | l,
 |  | n
 | ) |
Value:
do { \
        LIST_ASSERT_NOT_CONTAINS((l),(n)); \
        (n)->succ = (l)->head.succ; \
        (n)->pred = (l)->head.succ->pred; \
        (n)->succ->pred = (n); \
        (n)->pred->succ = (n); \
    } while (0)

Add node to list head.

Definition at line 267 of file list.h.

#define ADDTAIL | ( | l,
 |  | n
 | ) |
Value:
do { \
        LIST_ASSERT_NOT_CONTAINS((l),(n)); \
        (n)->succ = &(l)->tail; \
        (n)->pred = (l)->tail.pred; \
        (n)->pred->succ = (n); \
        (l)->tail.pred = (n); \
    } while (0)

Add node to list tail.

Definition at line 277 of file list.h.

#define DECLARE_LIST_TYPE ( T )
Value:
DECLARE_NODE_TYPE(T); \
    typedef struct T##List { \
         T##Node head; \
         T##Node tail; \
    } T##List

Template for a list of T structures.

Definition at line 160 of file list.h.

#define DECLARE_NODE_ANON ( T ) T *succ; T *pred;

Template for a naked node in a list of T structures.

To be used as data member in other structures:

    struct Foo
    {
        DECLARE_NODE_ANON(struct Foo)
        int a;
        float b;
    }

    DECLARE_LIST_TYPE(Foo);

    void foo(void)
    {
        static LIST_TYPE(Foo) foo_list;
        static Foo foo1, foo2;
        Foo *fp;

        LIST_INIT(&foo_list);
        ADDHEAD(&foo_list, &foo1);
        INSERT_BEFORE(&foo_list, &foo2);
        FOREACH_NODE(fp, &foo_list)
            fp->a = 10;
    }

Definition at line 152 of file list.h.

#define DECLARE_NODE_TYPE ( T ) typedef struct T##Node { T *succ; T *pred; } T##Node

Declare a typesafe node for structures of type T.

Definition at line 156 of file list.h.

#define FOREACH_NODE | ( | n,
 |  | l
 | ) |
Value:
for( \
        (n) = (TYPEOF_OR_VOIDPTR(n))LIST_HEAD(l); \
        ((Node *)(n))->succ; \
        (n) = (TYPEOF_OR_VOIDPTR(n))(((Node *)(n))->succ) \
    )

Iterate over all nodes in a list.

This macro generates a "for" statement using the following parameters:

Parameters:
n | Node pointer to be used in each iteration.
l | Pointer to list.

Definition at line 198 of file list.h.

#define INSERT_BEFORE | ( | n,
 |  | ln
 | ) |
Value:
do { \
        ASSERT_VALID_PTR(n); \
        ASSERT_VALID_PTR(ln); \
        (n)->succ = (ln); \
        (n)->pred = (ln)->pred; \
        (ln)->pred->succ = (n); \
        (ln)->pred = (n); \
    } while (0)

Insert node n before node ln.

Note:
You can't pass in a list header as ln, but it is safe to pass list->head of an empty list.

Definition at line 292 of file list.h.

#define LIST_ASSERT_VALID ( l )
Value:
do { \
            Node *n, *pred; \
            ASSERT((l)->head.succ != NULL); \
            ASSERT((l)->head.pred == NULL); \
            ASSERT((l)->tail.succ == NULL); \
            ASSERT((l)->tail.pred != NULL); \
            pred = &(l)->head; \
            FOREACH_NODE(n, l) \
            { \
                ASSERT(n->pred == pred); \
                pred = n; \
            } \
            ASSERT(n == &(l)->tail); \
        } while (0)

Make sure that a list is valid (it was initialized and is not corrupted).

Definition at line 230 of file list.h.

#define LIST_EMPTY ( l ) ( (void *)((l)->head.succ) == (void *)(&(l)->tail) )

Tell whether a list is empty.

Definition at line 264 of file list.h.

#define LIST_ENQUEUE | ( | list,
 |  | node
 | ) |
Value:
do { \
        PriNode *ln; \
        LIST_ASSERT_NOT_CONTAINS((list),(node)); \
        FOREACH_NODE(ln, (list)) \
            if (ln->pri < (node)->pri) \
                break; \
        INSERT_BEFORE(&(node)->link, &ln->link); \
    } while (0)

Insert a priority node in a priority queue.

The new node is inserted immediately before the first node with lower priority or appended to the tail if no such node exists.

Definition at line 338 of file list.h.

#define LIST_ENQUEUE_HEAD | ( | list,
 |  | node
 | ) |
Value:
do { \
        PriNode *ln; \
        LIST_ASSERT_NOT_CONTAINS((list),(node)); \
        FOREACH_NODE(ln, (list)) \
            if (ln->pri <= (node)->pri) \
                break; \
        INSERT_BEFORE(&(node)->link, &ln->link); \
    } while (0)

Insert a priority node in a priority queue.

The new node is inserted immediately before the first node with the same priority or appended to the tail if no such node exists.

Definition at line 322 of file list.h.

#define LIST_HEAD ( l ) ((l)->head.succ)

Get a pointer to the first node in a list.

If l is empty, result points to l->tail.

Definition at line 175 of file list.h.

#define LIST_INIT ( l )
Value:
do { \
        (l)->head.succ = (TYPEOF_OR_VOIDPTR((l)->head.succ)) &(l)->tail; \
        (l)->head.pred = NULL; \
        (l)->tail.succ = NULL; \
        (l)->tail.pred = (TYPEOF_OR_VOIDPTR((l)->tail.pred)) &(l)->head; \
    } while (0)

Initialize a list.

Definition at line 220 of file list.h.

#define LIST_TAIL ( l ) ((l)->tail.pred)

Get a pointer to the last node in a list.

If l is empty, result points to l->head.

Definition at line 182 of file list.h.

#define REMOVE ( n )
Value:
do { \
        ASSERT_VALID_PTR(n); \
        (n)->pred->succ = (n)->succ; \
        (n)->succ->pred = (n)->pred; \
        INVALIDATE_NODE(n); \
    } while (0)

Remove n from whatever list it is in.

Note:
Removing a node that has not previously been inserted into a list invokes undefined behavior.

Definition at line 308 of file list.h.

#define REVERSE_FOREACH_NODE | ( | n,
 |  | l
 | ) |
Value:
for( \
        (n) = (TYPEOF_OR_VOIDPTR(n))LIST_TAIL(l); \
        ((Node *)(n))->pred; \
        (n) = (TYPEOF_OR_VOIDPTR(n))(((Node *)(n))->pred) \
    )

Iterate backwards over all nodes in a list.

This macro generates a "for" statement using the following parameters:

Parameters:
n | Node pointer to be used in each iteration.
l | Pointer to list.

Definition at line 212 of file list.h.

Function Documentation

Node* list_remHead ( List * l ) [inline]

Unlink a node from the head of the list l.

Returns:
Pointer to node, or NULL if the list was empty.

Definition at line 354 of file list.h.

Node* list_remTail ( List * l ) [inline]

Unlink a node from the tail of the list l.

Returns:
Pointer to node, or NULL if the list was empty.

Definition at line 376 of file list.h.


BeRTOS: Pool memory allocator

Defines
Pool memory allocator
Embedded optimized general purpose data types

Pool macros. More...

Defines

#define | EXTERN_POOL(name) extern List name
Extern pool declaration.
#define | DECLARE_POOL(name, type, num) DECLARE_POOL_WITH_STORAGE(name, type, num, List)
Helper macro to declare a Pool data type.
#define | DECLARE_POOL_STATIC(name, type, num) DECLARE_POOL_WITH_STORAGE(name, type, num, static List)
Static Pool declaration.
#define | pool_init(name, init_func) (*(name##_init))(init_func)
Initialize the pool name, calling init_func on each element.
#define | pool_alloc(name) list_remHead(name)
Allocate an element from the pool.
#define | pool_free(name, elem) ADDHEAD(name, (Node*)elem)
Recycle an element into the pool.
#define | pool_empty(name) LIST_EMPTY(name)
Test if the pool is empty.

Detailed Description

Pool macros.

The pool module provides the boilerplate code to create a set of objects of the same type. It provides an interface similar to the heap module, with pool_alloc() and pool_free() functions that allocate and free an element respectively. In contrast with the heap module, you can specify exactly the number of items that you want to be in the pool.

Items in the pool must be a derived class of Node *, which also means that they can be used as-is with list containers, eg. MsgPort.

Example code:

 typedef struct MyType
 {
     Node *n;
     uint16_t *buf;
     // other members here...
 } MyType;

 DECLARE_POOL(mypool, MyType, POOL_SIZE);

 static void elem_init(MyType *e)
 {
     e->buf = NULL;
     // other initializations here
 }

 int main(void)
 {
     pool_init(&mypool, elem_init);

     MyType *foo = pool_alloc(&mypool);
     // do stuff with foo
     pool_free(&mypool, foo);
 }
Author:
Giovanni Bajo <rasky@develer.com>
Luca Ottaviano <lottaviano@develer.com>

Define Documentation

#define DECLARE_POOL | ( | name,
 |  | type,
 |  | num
 | ) | DECLARE_POOL_WITH_STORAGE(name, type, num, List)

Helper macro to declare a Pool data type.

Data type inserted into the pool must be a Node * type.

Parameters:
name | Variable name of the pool.
type | Data type held by the pool.
num | Number of elements in pool.

Definition at line 117 of file pool.h.

#define DECLARE_POOL_STATIC | ( | name,
 |  | type,
 |  | num
 | ) | DECLARE_POOL_WITH_STORAGE(name, type, num, static List)

Static Pool declaration.

See also:
DECLARE_POOL

Definition at line 125 of file pool.h.

#define pool_alloc ( name ) list_remHead(name)

Allocate an element from the pool.

The returned element is of type Node *, it's safe to cast it to the type contained in the pool.

Note:
If the element was recycled with pool_free(), it will not be reset, so don't assume that the element has specific values.
Parameters:
name Pointer to pool to alloc from.
Returns:
Element of the type present in the pool.

Definition at line 154 of file pool.h.

#define pool_empty ( name ) LIST_EMPTY(name)

Test if the pool is empty.

Parameters:
name Pointer to pool.
Returns:
True if the pool is empty, false otherwise.

Definition at line 173 of file pool.h.

#define pool_free | ( | name,
 |  | elem
 | ) | ADDHEAD(name, (Node*)elem)

Recycle an element into the pool.

Note:
Element fields are not reset to its original values, keep that in mind when you alloc nodes.
Parameters:
name | Pointer to pool where the node should be recycled.
elem | Element to be recycled.

Definition at line 165 of file pool.h.

#define pool_init | ( | name,
 |  | init_func
 | ) | (*(name##_init))(init_func)

Initialize the pool name, calling init_func on each element.

The init function must have the following prototype:

 void init_func(type *)

where type is the type of objects held in the pool.

Parameters:
name | Pool to initialize
init_func | Init function to be called on each element

Definition at line 140 of file pool.h.


BeRTOS: adc.c File Reference

  • File List
  • Globals
  • bertos
  • drv
Functions
adc.c File Reference

ADC driver (implementation) More...

#include <drv/adc.h>
#include <CPU_CSOURCE(adc)>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <cfg/module.h>

Go to the source code of this file.

Functions

adcread_t | adc_read (adc_ch_t ch)
Read the ADC channel ch.
void | adc_init (void)
Initialize the ADC hardware.

Detailed Description

ADC driver (implementation)

Author:
Francesco Sacchi <batt@develer.com>

Definition in file adc.c.


BeRTOS: adc.c Source File

  • bertos
  • drv
adc.c
Go to the documentation of this file.
00001
00038 #include <drv/adc.h>
00039
00040 #ifndef WIZ_AUTOGEN
00041     #warning Deprecated: now you should include adc_<cpu> directly in the makefile. Remove this line and the following once done.
00042     #include CPU_CSOURCE(adc)
00043 #else
00044     #include CPU_HEADER(adc)
00045 #endif
00046
00047 #include <cfg/debug.h>     // ASSERT()
00048 #include <cfg/macros.h>    // MIN()
00049 #include <cfg/compiler.h>
00050 #include <cfg/module.h>
00051
00055 adcread_t adc_read(adc_ch_t ch)
00056 {
00057     ASSERT(ch <= (adc_ch_t)ADC_MUX_MAXCH);
00058     ch = MIN(ch, (adc_ch_t)ADC_MUX_MAXCH);
00059
00060     adc_hw_select_ch(ch);
00061
00062     return(adc_hw_read());
00063 }
00064
00065 MOD_DEFINE(adc);
00066
00070 void adc_init(void)
00071 {
00072     adc_hw_init();
00073
00074     MOD_INIT(adc);
00075 }


BeRTOS: adc.h File Reference

  • drv
Defines | Typedefs | Functions
adc.h File Reference
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <cpu/attr.h>
#include <PP_STRINGIZE(drv/PP_CAT3(adc, _, CPU_ID).h)>

Go to the source code of this file.

Defines

#define | ADC_RANGECONV(data, y1, y2) (((((int32_t)(data)) * ((y2) - (y1))) / ((1 << ADC_BITS) - 1)) + (y1))
Macro used to convert data from adc range (0...(2 ^ADC_BITS - 1)) to y1 ...

Typedefs

typedef uint16_t | adcread_t
Type for ADC return value.
typedef uint8_t | adc_ch_t
Type for channel.

Functions

adcread_t | adc_read (adc_ch_t ch)
Read the ADC channel ch.
void | adc_init (void)
Initialize the ADC hardware.

Detailed Description

Definition in file adc.h.


BeRTOS: adc.h Source File

  • drv
adc.h
Go to the documentation of this file.
00001
00048 #ifndef DRV_ADC_H
00049 #define DRV_ADC_H
00050
00051 #include <cfg/compiler.h>
00052 #include <cfg/debug.h>
00053 #include <cpu/attr.h>
00054 #include CPU_HEADER(adc)
00055
00057 typedef uint16_t adcread_t;
00058
00060 typedef uint8_t adc_ch_t;
00061
00062 #define adc_bits() ADC_BITS
00063
00064 adcread_t adc_read(adc_ch_t ch);
00065 void adc_init(void);
00066
00073 #define ADC_RANGECONV(data, y1, y2) (((((int32_t)(data)) * ((y2) - (y1))) / ((1 << ADC_BITS) - 1)) + (y1))
00074  //defgroup adc
00076 #endif /* DRV_ADC_H */


BeRTOS: adc_arm.c File Reference

  • cpu
  • arm
  • drv
adc_arm.c File Reference

Low-level ADC module for ARM (inplementation). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level ADC module for ARM (inplementation).

Author:
Daniele Basile <asterix@develer.com>

This module is automatically included so no need to include in test list.

Definition in file adc_arm.c.


BeRTOS: adc_arm.c Source File

  • cpu
  • arm
  • drv
adc_arm.c
Go to the documentation of this file.
00001
00043 #ifndef WIZ_AUTOGEN
00044     #warning This file is deprecated, you should use adc_at91.c
00045
00046     #include <cpu/detect.h>
00047
00048     #if CPU_ARM_AT91
00049         #include "adc_at91.c"
00050     /*#elif  Add other ARM families here */
00051     #else
00052         #error Unknown CPU
00053     #endif
00054 #endif  /* WIZ_AUTOGEN */


BeRTOS: adc_arm.h File Reference

  • cpu
  • arm
  • drv
adc_arm.h File Reference

Low-level ADC module for ARM (interface). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level ADC module for ARM (interface).

Author:
Daniele Basile <asterix@develer.com>

Definition in file adc_arm.h.


BeRTOS: adc_arm.h Source File

  • cpu
  • arm
  • drv
adc_arm.h
Go to the documentation of this file.
00001
00039 #include <cpu/detect.h>
00040
00041 #if CPU_ARM_AT91
00042     #include "adc_at91.h"
00043 /*#elif  Add other ARM families here */
00044 #else
00045     #error Unknown CPU
00046 #endif


BeRTOS: adc_at91.c File Reference

  • cpu
  • arm
  • drv
Functions
adc_at91.c File Reference

ADC hardware-specific implementation. More...

#include "adc_at91.h"
#include <cpu/irq.h>
#include "cfg/cfg_adc.h"
#include "cfg/cfg_proc.h"
#include "cfg/cfg_signal.h"
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <cfg/log.h>
#include <drv/adc.h>
#include <io/arm.h>

Go to the source code of this file.

Functions

void | adc_hw_select_ch (uint8_t ch)
Select mux channel ch.
uint16_t | adc_hw_read (void)
Start an ADC convertion.
void | adc_hw_init (void)
Init ADC hardware.

Detailed Description

ADC hardware-specific implementation.

This ADC module should be use both whit kernel or none. If you are using a kernel, the adc drive does not wait the finish of conversion but use a singal every time a required conversion are ended. This signal wake up a process that return a result of conversion. Otherwise, if you not use a kernl, this module wait whit a loop the finishing of conversion.

Author:
Daniele Basile <asterix@develer.com>

Definition in file adc_at91.c.

Function Documentation

uint16_t adc_hw_read ( void )

Start an ADC convertion.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADC_DRDY bit is done.

Definition at line 130 of file adc_at91.c.

void adc_hw_select_ch ( uint8_t ch )

Select mux channel ch.

Definition at line 116 of file adc_at91.c.


BeRTOS: adc_at91.c Source File

  • cpu
  • arm
  • drv
adc_at91.c
Go to the documentation of this file.
00001
00047 #include "adc_at91.h"
00048
00049 #include <cpu/irq.h>
00050
00051 #include "cfg/cfg_adc.h"
00052 #include "cfg/cfg_proc.h"
00053 #include "cfg/cfg_signal.h"
00054 #include <cfg/macros.h>
00055 #include <cfg/compiler.h>
00056
00057 // Define log settings for cfg/log.h.
00058 #define LOG_LEVEL         ADC_LOG_LEVEL
00059 #define LOG_FORMAT        ADC_LOG_FORMAT
00060 #include <cfg/log.h>
00061
00062 #include <drv/adc.h>
00063
00064 #include <io/arm.h>
00065
00066 #if CONFIG_KERN
00067     #include <cfg/module.h>
00068     #include <kern/proc.h>
00069     #include <kern/signal.h>
00070
00071
00072     #if !CONFIG_KERN_SIGNALS
00073         #error Signals must be active to use ADC with kernel
00074     #endif
00075
00076     /* Signal adc convertion end */
00077     #define SIG_ADC_COMPLETE SIG_USER0
00078
00079     /* ADC waiting process */
00080     static struct Process *adc_process;
00081
00086     static DECLARE_ISR(adc_conversion_end_irq)
00087     {
00088         sig_post(adc_process, SIG_ADC_COMPLETE);
00089
00090         /* Inform hw that we have served the IRQ */
00091         AIC_EOICR = 0;
00092     }
00093
00094     static void adc_enable_irq(void)
00095     {
00096
00097         // Disable all interrupt
00098         ADC_IDR = 0xFFFFFFFF;
00099
00100         //Register interrupt vector
00101         AIC_SVR(ADC_ID) = adc_conversion_end_irq;
00102         AIC_SMR(ADC_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED;
00103         AIC_IECR = BV(ADC_ID);
00104
00105         //Enable data ready irq
00106         ADC_IER = BV(ADC_DRDY);
00107     }
00108
00109 #endif /* CONFIG_KERN */
00110
00111
00116 void adc_hw_select_ch(uint8_t ch)
00117 {
00118     //Disable all channels
00119     ADC_CHDR = ADC_CH_MASK;
00120     //Enable select channel
00121     ADC_CHER = BV(ch);
00122 }
00123
00124
00130 uint16_t adc_hw_read(void)
00131 {
00132     #if CONFIG_KERN
00133         /* Ensure ADC is not already in use by another process */
00134         ASSERT(adc_process == NULL);
00135         adc_process = proc_current();
00136     #endif
00137
00138     // Start convertion
00139     ADC_CR = BV(ADC_START);
00140
00141     #if CONFIG_KERN
00142         // Ensure IRQs enabled.
00143         IRQ_ASSERT_ENABLED();
00144         sig_wait(SIG_ADC_COMPLETE);
00145
00146         /* Prevent race condition in case of preemptive kernel */
00147         uint16_t ret = ADC_LCDR;
00148         MEMORY_BARRIER;
00149         adc_process = NULL;
00150         return ret;
00151     #else
00152         //Wait in polling until is done
00153         while (!(ADC_SR & BV(ADC_DRDY)));
00154
00155         //Return the last converted data
00156         return(ADC_LCDR);
00157     #endif
00158 }
00159
00163 void adc_hw_init(void)
00164 {
00165     //Init ADC pins.
00166     ADC_INIT_PINS();
00167
00168     /*
00169      * Set adc mode register:
00170      * - Disable hardware trigger and enable software trigger.
00171      * - Select normal mode.
00172      * - Set ADC_BITS bit convertion resolution.
00173      *
00174      * \{
00175      */
00176     ADC_MR = 0;
00177     #if ADC_BITS == 10
00178         ADC_MR &= ~BV(ADC_LOWRES);
00179     #elif ADC_BITS == 8
00180         ADC_MR |= BV(ADC_LOWRES);
00181     #else
00182         #error No select bit resolution is supported to this CPU
00183     #endif
00184     /* \} */
00185
00186     LOG_INFO("Computed ADC_CLOCK %ld\n", ADC_COMPUTED_CLOCK);
00187     LOG_INFO("prescaler[%ld], stup[%ld], shtim[%ld]\n",ADC_COMPUTED_PRESCALER, ADC_COMPUTED_STARTUPTIME,  ADC_COMPUTED_SHTIME);
00188
00189
00190     //Apply computed prescaler value
00191     ADC_MR &= ~ADC_PRESCALER_MASK;
00192     ADC_MR |= ((ADC_COMPUTED_PRESCALER << ADC_PRESCALER_SHIFT) & ADC_PRESCALER_MASK);
00193     LOG_INFO("prescaler[%ld]\n", (ADC_COMPUTED_PRESCALER << ADC_PRESCALER_SHIFT) & ADC_PRESCALER_MASK);
00194
00195     //Apply computed start up time
00196     ADC_MR &= ~ADC_STARTUP_MASK;
00197     ADC_MR |= ((ADC_COMPUTED_STARTUPTIME << ADC_STARTUP_SHIFT) & ADC_STARTUP_MASK);
00198     LOG_INFO("sttime[%ld]\n", (ADC_COMPUTED_STARTUPTIME << ADC_STARTUP_SHIFT) & ADC_STARTUP_MASK);
00199
00200     //Apply computed sample and hold time
00201     ADC_MR &= ~ADC_SHTIME_MASK;
00202     ADC_MR |= ((ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK);
00203     LOG_INFO("shtime[%ld]\n", (ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK);
00204
00205     #if CONFIG_KERN
00206         //Register and enable irq for adc.
00207         adc_enable_irq();
00208     #endif
00209
00210 }


BeRTOS: adc_at91.h File Reference

  • cpu
  • arm
  • drv
Defines | Functions
adc_at91.h File Reference

ADC hardware-specific definition. More...

#include <hw/hw_cpufreq.h>
#include "cfg/cfg_adc.h"
#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define | ADC_MUX_MAXCH 8
ADC config define.
#define | ADC_COMPUTED_PRESCALER (DIV_ROUNDUP(CPU_FREQ, 2 * CONFIG_ADC_CLOCK) - 1)
Macro for computing correct value to write into ADC register.
#define | ADC_INIT_PINS()
Init pins macro for adc.

Functions

void | adc_hw_select_ch (uint8_t ch)
Select mux channel ch.
uint16_t | adc_hw_read (void)
Start an ADC convertion.
void | adc_hw_init (void)
Init ADC hardware.

Detailed Description

ADC hardware-specific definition.

Author:
Daniele Basile <asterix@develer.com>

Definition in file adc_at91.h.

Define Documentation

#define ADC_INIT_PINS ( )
Value:
do { \
    } while (0)

Init pins macro for adc.

Define PIO controller for enable ADC function. Init the ADC pins. Implement it if necessary.

Definition at line 87 of file adc_at91.h.

Function Documentation

uint16_t adc_hw_read ( void )

Start an ADC convertion.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADC_DRDY bit is done.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADCS bit is done.

Definition at line 130 of file adc_at91.c.

void adc_hw_select_ch ( uint8_t ch )

Select mux channel ch.

Generally the stm32 cpu family allow us to program the order of adc channel that we want to read. In this driver implementation we put as fist channel to read the select ones.

Definition at line 116 of file adc_at91.c.


BeRTOS: adc_at91.h Source File

  • cpu
  • arm
  • drv
adc_at91.h
Go to the documentation of this file.
00001
00038 #ifndef DRV_ADC_AT91_H
00039 #define DRV_ADC_AT91_H
00040
00041 #include <hw/hw_cpufreq.h>
00042
00043 #include "cfg/cfg_adc.h"
00044
00045 #include <cfg/compiler.h>
00046
00050 #define ADC_MUX_MAXCH          8 //Max number of channel for ADC.
00051 #define ADC_BITS              10 //Bit resolution for ADC converter.
00052
00057 #define ADC_COMPUTED_PRESCALER    (DIV_ROUNDUP(CPU_FREQ, 2 * CONFIG_ADC_CLOCK) - 1)
00058 #define ADC_COMPUTED_CLOCK        (CPU_FREQ / ((ADC_COMPUTED_PRESCALER + 1) * 2))
00059 #define ADC_COMPUTED_STARTUPTIME  (((CONFIG_ADC_STARTUP_TIME * ADC_COMPUTED_CLOCK) / 8000000UL) - 1)
00060 #define ADC_COMPUTED_SHTIME       ((uint32_t)((CONFIG_ADC_SHTIME * (uint64_t)ADC_COMPUTED_CLOCK) / 1000000000UL) - 1)
00061
00070 #if CPU_ARM_SAM7X
00071     #define ADC_PIO_DISABLE           PIOB_PDR
00072     #define ADC_PIO_EN_FUNC           PIOB_ASR
00073
00074 #elif CPU_ARM_SAM7S_LARGE
00075     #define ADC_PIO_DISABLE           PIOA_PDR
00076     #define ADC_PIO_EN_FUNC           PIOA_BSR
00077
00078 #else
00079     #error No ADC pins name definitions for selected ARM CPU
00080 #endif
00081 /*\}*/
00082
00087 #define ADC_INIT_PINS() \
00088     do { \
00089     } while (0)
00090
00091 void adc_hw_select_ch(uint8_t ch);
00092 uint16_t adc_hw_read(void);
00093 void adc_hw_init(void);
00094
00095 #endif /* DRV_ADC_AT91_H */


BeRTOS: adc_avr.c File Reference

  • cpu
  • avr
  • drv
Functions
adc_avr.c File Reference

ADC hardware-specific definition. More...

#include "adc_avr.h"
#include "cfg/cfg_adc.h"
#include "cfg/cfg_proc.h"
#include "cfg/cfg_signal.h"
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <cpu/irq.h>
#include <drv/adc.h>
#include <avr/io.h>
#include <avr/interrupt.h>

Go to the source code of this file.

Defines

#define | ADC_AVR_AREF 0
ADC voltage referencese.
#define | ADC_AVR_AVCC 1
ADC voltage referencese.
#define | ADC_AVR_INT256 2
ADC voltage referencese.

Functions

void | adc_hw_select_ch (uint8_t ch)
Select mux channel ch.
uint16_t | adc_hw_read (void)
Start an ADC convertion.
void | adc_hw_init (void)
Init ADC hardware.

Detailed Description

ADC hardware-specific definition.

Author:
Francesco Sacchi <batt@develer.com>

This module is automatically included so no need to include in test list.

Definition in file adc_avr.c.

Function Documentation

uint16_t adc_hw_read ( void )

Start an ADC convertion.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADCS bit is done.

Definition at line 132 of file adc_avr.c.

void adc_hw_select_ch ( uint8_t ch )

Select mux channel ch.

Definition at line 99 of file adc_avr.c.


BeRTOS: adc_avr.c Source File

  • cpu
  • avr
  • drv
adc_avr.c
Go to the documentation of this file.
00001
00043 #include "adc_avr.h"
00044
00045 #include "cfg/cfg_adc.h"
00046 #include "cfg/cfg_proc.h"
00047 #include "cfg/cfg_signal.h"
00048 #include <cfg/macros.h>
00049 #include <cfg/compiler.h>
00050
00051 #include <cpu/irq.h> // IRQ_ASSERT_ENABLED()
00052
00053 #include <drv/adc.h>
00054
00055 #include <avr/io.h>
00056 #include <avr/interrupt.h>
00057
00064 #define ADC_AVR_AREF   0
00065 #define ADC_AVR_AVCC   1
00066 #define ADC_AVR_INT256 2
00067 /* \} */
00068
00069 #if CONFIG_KERN
00070     #include <cfg/module.h>
00071     #include <kern/proc.h>
00072     #include <kern/signal.h>
00073
00074
00075     #if !CONFIG_KERN_SIGNALS
00076         #error Signals must be active to use the ADC with kernel
00077     #endif
00078
00079     /* Signal adc convertion end */
00080     #define SIG_ADC_COMPLETE SIG_SINGLE
00081
00082     /* ADC waiting process */
00083     static struct Process *adc_process;
00084
00089     ISR(ADC_vect)
00090     {
00091         sig_post(adc_process, SIG_ADC_COMPLETE);
00092     }
00093 #endif /* CONFIG_KERN */
00094
00099 void adc_hw_select_ch(uint8_t ch)
00100 {
00101     /* Set to 0 all mux registers */
00102     #if CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA168
00103         ADMUX &= ~(BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0));
00104     #elif CPU_AVR_ATMEGA32 || CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 \
00105           || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
00106         ADMUX &= ~(BV(MUX4) | BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0));
00107         #if CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
00108             ADCSRB &= ~(BV(MUX5));
00109         #endif
00110     #else
00111         #error Unknown CPU
00112     #endif
00113
00114     /* Select channel, only first 8 channel modes are supported */
00115     ADMUX |= (ch & 0x07);
00116
00117     #if CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
00118         /* Select channel, all 16 channels are supported */
00119         if (ch > 0x07)
00120             ADCSRB |= BV(MUX5);
00121
00122     #endif
00123
00124 }
00125
00126
00132 uint16_t adc_hw_read(void)
00133 {
00134     // Ensure another convertion is not running.
00135     ASSERT(!(ADCSRA & BV(ADSC)));
00136
00137     // Start convertion
00138     ADCSRA |= BV(ADSC);
00139
00140     #if CONFIG_KERN
00141         // Ensure IRQs enabled.
00142         IRQ_ASSERT_ENABLED();
00143         adc_process = proc_current();
00144         sig_wait(SIG_ADC_COMPLETE);
00145     #else
00146         //Wait in polling until is done
00147         while (ADCSRA & BV(ADSC)) ;
00148     #endif
00149
00150     return(ADC);
00151 }
00152
00156 void adc_hw_init(void)
00157 {
00158     /*
00159      * Select channel 0 as default,
00160      * result right adjusted.
00161      */
00162     ADMUX = 0;
00163
00164     #if CONFIG_ADC_AVR_REF == ADC_AVR_AREF
00165         /* External voltage at AREF as analog ref source */
00166         /* None */
00167     #elif CONFIG_ADC_AVR_REF == ADC_AVR_AVCC
00168         /* AVCC as analog ref source */
00169         ADMUX |= BV(REFS0);
00170     #elif CONFIG_ADC_AVR_REF == ADC_AVR_INT256
00171         /* Internal 2.56V as ref source */
00172         ADMUX |= BV(REFS1) | BV(REFS0);
00173     #else
00174         #error Unsupported ADC ref value.
00175     #endif
00176
00177     #if defined(ADCSRB)
00178     /* Disable Auto trigger source: ADC in Free running mode. */
00179     ADCSRB = 0;
00180     #endif
00181
00182     /* Enable ADC, disable autotrigger mode. */
00183     ADCSRA = BV(ADEN);
00184
00185     #if CONFIG_KERN
00186         MOD_CHECK(proc);
00187         ADCSRA |= BV(ADIE);
00188     #endif
00189
00190     /* Set convertion frequency */
00191     #if CONFIG_ADC_AVR_DIVISOR == 2
00192         ADCSRA |= BV(ADPS0);
00193     #elif CONFIG_ADC_AVR_DIVISOR == 4
00194         ADCSRA |= BV(ADPS1);
00195     #elif CONFIG_ADC_AVR_DIVISOR == 8
00196         ADCSRA |= BV(ADPS1) | BV(ADPS0);
00197     #elif CONFIG_ADC_AVR_DIVISOR == 16
00198         ADCSRA |= BV(ADPS2);
00199     #elif CONFIG_ADC_AVR_DIVISOR == 32
00200         ADCSRA |= BV(ADPS2) | BV(ADPS0);
00201     #elif CONFIG_ADC_AVR_DIVISOR == 64
00202         ADCSRA |= BV(ADPS2) | BV(ADPS1);
00203     #elif CONFIG_ADC_AVR_DIVISOR == 128
00204         ADCSRA |= BV(ADPS2) | BV(ADPS1) | BV(ADPS0);
00205     #else
00206         #error Unsupported ADC prescaler value.
00207     #endif
00208
00209     /* Start a convertion to init ADC hw */
00210     adc_hw_read();
00211 }


BeRTOS: adc_avr.h File Reference

  • cpu
  • avr
  • drv
Functions
adc_avr.h File Reference

ADC hardware-specific definition. More...

#include <cfg/compiler.h>

Go to the source code of this file.

Functions

void | adc_hw_select_ch (uint8_t ch)
Select mux channel ch.
uint16_t | adc_hw_read (void)
Start an ADC convertion.
void | adc_hw_init (void)
Init ADC hardware.

Detailed Description

ADC hardware-specific definition.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file adc_avr.h.

Function Documentation

uint16_t adc_hw_read ( void )

Start an ADC convertion.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADC_DRDY bit is done.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADCS bit is done.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADC_DRDY bit is done.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADCS bit is done.

Definition at line 130 of file adc_at91.c.

void adc_hw_select_ch ( uint8_t ch )

Select mux channel ch.

Generally the stm32 cpu family allow us to program the order of adc channel that we want to read. In this driver implementation we put as fist channel to read the select ones.

Generally the stm32 cpu family allow us to program the order of adc channel that we want to read. In this driver implementation we put as fist channel to read the select ones.

Definition at line 116 of file adc_at91.c.


BeRTOS: adc_avr.h Source File

  • cpu
  • avr
  • drv
adc_avr.h
Go to the documentation of this file.
00001
00037 #ifndef DRV_ADC_AVR_H
00038 #define DRV_ADC_AVR_H
00039
00040 #include <cfg/compiler.h>
00041
00042 #if CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
00043     /* 16 channels aivailable */
00044     #define ADC_MUX_MAXCH 15
00045 #else
00046     /* only 8 channels aivailable */
00047     #define ADC_MUX_MAXCH 7
00048 #endif
00049 #define ADC_BITS      10
00050
00051 void adc_hw_select_ch(uint8_t ch);
00052 uint16_t adc_hw_read(void);
00053 void adc_hw_init(void);
00054
00055 #endif /* DRV_ADC_AVR_H */


BeRTOS: adc_cm3.h File Reference

  • cpu
  • cortex-m3
  • drv
adc_cm3.h File Reference

Low-level ADC module for ARM (interface). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level ADC module for ARM (interface).

Author:
Daniele Basile <asterix@develer.com>

Definition in file adc_cm3.h.


BeRTOS: adc_cm3.h Source File

  • cpu
  • cortex-m3
  • drv
adc_cm3.h
Go to the documentation of this file.
00001
00039 #include <cpu/detect.h>
00040
00041 #if CPU_CM3_LM3S
00042     #include "adc_lm3s.h"
00043 #elif CPU_CM3_STM32
00044     #include "adc_stm32.h"
00045 #elif CPU_CM3_SAM3X
00046     #include "adc_sam3.h"
00047 /*#elif  Add other ARM families here */
00048 #else
00049     #error Unknown CPU
00050 #endif


BeRTOS: adc_lm3s.c File Reference

  • cpu
  • cortex-m3
  • drv
Functions
adc_lm3s.c File Reference

ADC hardware-specific implementation. More...

#include "adc_lm3s.h"
#include <cpu/irq.h>
#include "cfg/cfg_adc.h"
#include "cfg/cfg_proc.h"
#include "cfg/cfg_signal.h"
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <cfg/log.h>
#include <drv/adc.h>
#include <drv/timer.h>
#include <drv/clock_lm3s.h>
#include <io/lm3s.h>

Go to the source code of this file.

Functions

void | adc_hw_select_ch (uint8_t ch)
Select mux channel ch.
uint16_t | adc_hw_read (void)
Start an ADC convertion.
void | adc_hw_init (void)
Init ADC hardware.

Detailed Description

ADC hardware-specific implementation.

This ADC module should be use both whit kernel or none. If you are using a kernel, the adc drive does not wait the finish of conversion but use a singal every time a required conversion are ended. This signal wake up a process that return a result of conversion. Otherwise, if you not use a kernl, this module wait whit a loop the finishing of conversion.

Author:
Daniele Basile <asterix@develer.com>

Definition in file adc_lm3s.c.

Function Documentation

uint16_t adc_hw_read ( void )

Start an ADC convertion.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADC_DRDY bit is done.

Definition at line 147 of file adc_lm3s.c.

void adc_hw_select_ch ( uint8_t ch )

Select mux channel ch.

Generally the stm32 cpu family allow us to program the order of adc channel that we want to read. In this driver implementation we put as fist channel to read the select ones.

Definition at line 132 of file adc_lm3s.c.


BeRTOS: adc_lm3s.c Source File

  • cpu
  • cortex-m3
  • drv
adc_lm3s.c
Go to the documentation of this file.
00001
00047 #include "adc_lm3s.h"
00048
00049 #include <cpu/irq.h>
00050
00051 #include "cfg/cfg_adc.h"
00052 #include "cfg/cfg_proc.h"
00053 #include "cfg/cfg_signal.h"
00054
00055 #include <cfg/macros.h>
00056 #include <cfg/compiler.h>
00057 #include <cfg/debug.h>
00058
00059 // Define log settings for cfg/log.h.
00060 #define LOG_LEVEL         ADC_LOG_LEVEL
00061 #define LOG_FORMAT        ADC_LOG_FORMAT
00062 #include <cfg/log.h>
00063
00064 #include <drv/adc.h>
00065 #include <drv/timer.h>
00066 #include <drv/clock_lm3s.h>
00067
00068 #include <io/lm3s.h>
00069
00070 /* Select witch ADC use */
00071 #if CPU_CM3_LM3S1968 || CPU_CM3_LM3S8962
00072     #define ADC_BASE            ADC0_BASE
00073     #define SYSCTL_RCGC_R       SYSCTL_RCGC0_R
00074     #define SYSCTL_RCGC_ADC     SYSCTL_RCGC0_ADC0
00075 #else
00076     #error Unknow ADC register for select cpu core
00077 #endif
00078
00079
00080 #if CONFIG_KERN
00081     #include <cfg/module.h>
00082
00083     #include <kern/proc.h>
00084     #include <kern/signal.h>
00085
00086     #include <drv/irq_cm3.h>
00087
00088
00089     #if !CONFIG_KERN_SIGNALS
00090         #error Signals must be active to use ADC with kernel
00091     #endif
00092
00093     /* Signal adc convertion end */
00094     #define SIG_ADC_COMPLETE SIG_USER0
00095
00096     /* ADC waiting process */
00097     static struct Process *adc_process;
00098
00103     static DECLARE_ISR(adc_conversion_end_irq)
00104     {
00105         sig_post(adc_process, SIG_ADC_COMPLETE);
00106
00107         /* Clear the status bit */
00108         HWREG(ADC_BASE + ADC_O_ISC) |= ADC_ISC_IN3;
00109
00110     }
00111
00112     static void adc_enable_irq(void)
00113     {
00114         /* Clear all pending irq */
00115         HWREG(ADC_BASE + ADC_O_ISC) = 0;
00116         /* Register the IRQ handler */
00117         sysirq_setHandler(INT_ADC3, adc_conversion_end_irq);
00118         /* Enable IRQ */
00119         HWREG(ADC_BASE + ADC_O_SSCTL3) |= ADC_SSCTL3_IE0;
00120         HWREG(ADC_BASE + ADC_O_IM) |= ADC_IM_MASK3;
00121     }
00122
00123 #endif /* CONFIG_KERN */
00124
00132 void adc_hw_select_ch(uint8_t ch)
00133 {
00134     /* Select channel that we want read */
00135     HWREG(ADC_BASE + ADC_O_SSMUX3) = ch;
00136     /* Make single acquisition */
00137     HWREG(ADC_BASE + ADC_O_SSCTL3) |= ADC_SSCTL3_END0;
00138     /* Enable sequence S03 (single sample on select channel) */
00139     HWREG(ADC_BASE + ADC_O_ACTSS) |= ADC_ACTSS_ASEN3;
00140 }
00141
00147 uint16_t adc_hw_read(void)
00148 {
00149     #if CONFIG_KERN
00150         /* Ensure ADC is not already in use by another process */
00151         ASSERT(adc_process == NULL);
00152         adc_process = proc_current();
00153     #endif
00154
00155     /* Start convertion */
00156     HWREG(ADC0_BASE + ADC_O_PSSI) |= ADC_PSSI_SS3;
00157
00158     #if CONFIG_KERN
00159         /* Ensure IRQs enabled. */
00160         IRQ_ASSERT_ENABLED();
00161         sig_wait(SIG_ADC_COMPLETE);
00162
00163         /* Prevent race condition in case of preemptive kernel */
00164         uint16_t ret = (uint16_t)HWREG(ADC_BASE + ADC_O_SSFIFO3);
00165         MEMORY_BARRIER;
00166         adc_process = NULL;
00167         return ret;
00168     #else
00169         /* Wait in polling until conversion is done */
00170         while (!(HWREG(ADC_BASE + ADC_O_SSFSTAT3) & ADC_SSFSTAT3_FULL));
00171
00172         /* Return the last converted data */
00173         return (uint16_t)HWREG(ADC_BASE + ADC_O_SSFIFO3);
00174     #endif
00175 }
00176
00180 void adc_hw_init(void)
00181 {
00182     /* Enable ADC0 clock */
00183     SYSCTL_RCGC_R |= SYSCTL_RCGC_ADC;
00184
00185     /*
00186      * We wait some time because the clock is istable
00187      * and that could cause system hardfault
00188      */
00189     lm3s_busyWait(10);
00190
00191     /* Disable all sequence */
00192     HWREG(ADC_BASE + ADC_O_ACTSS) = 0;
00193     /* Set trigger event to programmed (for all sequence) */
00194     HWREG(ADC_BASE + ADC_O_EMUX) = 0;
00195
00196     #if CONFIG_KERN
00197         adc_enable_irq();
00198     #endif
00199 }


BeRTOS: adc_lm3s.h File Reference

  • cpu
  • cortex-m3
  • drv
Defines | Functions
adc_lm3s.h File Reference

ADC hardware-specific definition. More...

#include "cfg/cfg_adc.h"
#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define | ADC_INIT_PINS()
ADC config define.

Functions

void | adc_hw_select_ch (uint8_t ch)
Select mux channel ch.
uint16_t | adc_hw_read (void)
Start an ADC convertion.
void | adc_hw_init (void)
Init ADC hardware.

Detailed Description

ADC hardware-specific definition.

Author:
Daniele Basile <asterix@develer.com>

Definition in file adc_lm3s.h.

Define Documentation

#define ADC_INIT_PINS ( )
Value:
do { \
    } while (0)

ADC config define.

Init the ADC pins. Implement it if necessary.

Definition at line 60 of file adc_lm3s.h.

Function Documentation

uint16_t adc_hw_read ( void )

Start an ADC convertion.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADC_DRDY bit is done.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADCS bit is done.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADC_DRDY bit is done.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADCS bit is done.

Definition at line 130 of file adc_at91.c.

void adc_hw_select_ch ( uint8_t ch )

Select mux channel ch.

Generally the stm32 cpu family allow us to program the order of adc channel that we want to read. In this driver implementation we put as fist channel to read the select ones.

Generally the stm32 cpu family allow us to program the order of adc channel that we want to read. In this driver implementation we put as fist channel to read the select ones.

Definition at line 116 of file adc_at91.c.


BeRTOS: adc_lm3s.h Source File

  • cpu
  • cortex-m3
  • drv
adc_lm3s.h
Go to the documentation of this file.
00001
00038 #ifndef DRV_ADC_LM3S_H
00039 #define DRV_ADC_LM3S_H
00040
00041 #include "cfg/cfg_adc.h"
00042
00043 #include <cfg/compiler.h>
00044
00048 #if CPU_CM3_LM3S1968
00049     #define ADC_MUX_MAXCH          8 //Max number of channel for ADC.
00050     #define ADC_BITS              10 //Bit resolution for ADC converter.
00051 #elif CPU_CM3_LM3S8962
00052     #define ADC_MUX_MAXCH          4 //Max number of channel for ADC.
00053     #define ADC_BITS              10 //Bit resolution for ADC convert
00054 #endif
00055
00060 #define ADC_INIT_PINS() \
00061     do { \
00062     } while (0)
00063
00064 void adc_hw_select_ch(uint8_t ch);
00065 uint16_t adc_hw_read(void);
00066 void adc_hw_init(void);
00067
00068 #endif /* DRV_ADC_LM3S_H */


BeRTOS: adc_sam3.c File Reference

  • cpu
  • cortex-m3
  • drv
Functions
adc_sam3.c File Reference

ADC hardware-specific implementation. More...

#include "adc_sam3.h"
#include "cfg/cfg_adc.h"
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <cfg/log.h>
#include <drv/adc.h>
#include <drv/irq_cm3.h>
#include <cpu/irq.h>
#include <mware/event.h>
#include <io/cm3.h>

Go to the source code of this file.

Functions

static | DECLARE_ISR (adc_conversion_end_irq)
ADC ISR.
void | adc_hw_select_ch (uint8_t ch)
Select mux channel ch.
uint16_t | adc_hw_read (void)
Start an ADC convertion.
void | adc_hw_init (void)
Init ADC hardware.

Detailed Description

ADC hardware-specific implementation.

Author:
Daniele Basile <asterix@develer.com>

Definition in file adc_sam3.c.

Function Documentation

uint16_t adc_hw_read ( void )

Start an ADC convertion.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADC_DRDY bit is done.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADCS bit is done.

Definition at line 101 of file adc_sam3.c.

void adc_hw_select_ch ( uint8_t ch )

Select mux channel ch.

Generally the stm32 cpu family allow us to program the order of adc channel that we want to read. In this driver implementation we put as fist channel to read the select ones.

Definition at line 90 of file adc_sam3.c.

static DECLARE_ISR ( adc_conversion_end_irq ) [static]

ADC ISR.

The interrupt is connected to ready data, so when the adc ends the conversion we generate an event and then we return the converted value.

Note:
to clear the Ready data bit and End of conversion bit we should read the Last Converted Data register, otherwise the ready data interrupt loop on this call.

Definition at line 77 of file adc_sam3.c.


BeRTOS: adc_sam3.c Source File

  • cpu
  • cortex-m3
  • drv
adc_sam3.c
Go to the documentation of this file.
00001
00039 #include "adc_sam3.h"
00040
00041 #include "cfg/cfg_adc.h"
00042
00043 #include <cfg/macros.h>
00044 #include <cfg/compiler.h>
00045
00046 // Define log settings for cfg/log.h.
00047 #define LOG_LEVEL         ADC_LOG_LEVEL
00048 #define LOG_FORMAT        ADC_LOG_FORMAT
00049 #include <cfg/log.h>
00050
00051 #include <drv/adc.h>
00052 #include <drv/irq_cm3.h>
00053
00054 #include <cpu/irq.h>
00055
00056 #include <mware/event.h>
00057
00058 #include <io/cm3.h>
00059
00060
00061 /* We use event to signal the end of conversion */
00062 static Event data_ready;
00063 /* The last converted data */
00064 static uint32_t data;
00065
00077 static DECLARE_ISR(adc_conversion_end_irq)
00078 {
00079     data = 0;
00080     if (ADC_ISR & BV(ADC_DRDY))
00081     {
00082         data = ADC_LDATA;
00083         event_do(&data_ready);
00084     }
00085 }
00086
00090 void adc_hw_select_ch(uint8_t ch)
00091 {
00092     /* Disable all channels */
00093     ADC_CHDR = ADC_CH_MASK;
00094     /* Enable select channel */
00095     ADC_CHER = BV(ch);
00096 }
00097
00101 uint16_t adc_hw_read(void)
00102 {
00103     ADC_CR = BV(ADC_START);
00104     event_wait(&data_ready);
00105     return(data);
00106 }
00107
00111 void adc_hw_init(void)
00112 {
00113     /* Make sure that interrupt are enabled */
00114     IRQ_ASSERT_ENABLED();
00115
00116     /* Initialize the dataready event */
00117     event_initGeneric(&data_ready);
00118
00119     /* Clock ADC peripheral */
00120     pmc_periphEnable(ADC_ID);
00121
00122      /* Reset adc controller */
00123     ADC_CR = ADC_SWRST;
00124
00125     /*
00126      * Set adc mode register:
00127      * - Disable hardware trigger and enable software trigger.
00128      * - Select normal mode.
00129      */
00130     ADC_MR = 0;
00131
00132     /* Set ADC_BITS bit convertion resolution. */
00133     #if ADC_BITS == 12
00134         ADC_MR &= ~BV(ADC_LOWRES);
00135     #elif ADC_BITS == 10
00136         ADC_MR |= BV(ADC_LOWRES);
00137     #else
00138         #error No select bit resolution is supported to this CPU
00139     #endif
00140
00141     /* Setup ADC */
00142     LOG_INFO("Computed ADC_CLOCK %ld\n", ADC_CLOCK);
00143     ADC_MR |= ((ADC_PRESCALER << ADC_PRESCALER_SHIFT) & ADC_PRESCALER_MASK);
00144     LOG_INFO("prescaler[%ld]\n", ADC_PRESCALER);
00145     ADC_MR |= ((CONFIG_ADC_SUT << ADC_STARTUP_SHIFT) & ADC_STARTUP_MASK);
00146     LOG_INFO("starup[%d]\n", CONFIG_ADC_SUT);
00147     ADC_MR |= ((CONFIG_ADC_STTLING << ADC_SETTLING_SHIFT) & ADC_SETTLING_MASK);
00148     LOG_INFO("sttime[%d]\n", CONFIG_ADC_STTLING);
00149     ADC_MR |= ((CONFIG_ADC_TRACKTIM << ADC_TRACKTIM_SHIFT) & ADC_TRACKTIM_MASK);
00150     LOG_INFO("tracking[%d]\n", CONFIG_ADC_TRACKTIM);
00151     ADC_MR |= ((CONFIG_ADC_TRANSFER << ADC_TRANSFER_SHIFT) & ADC_TRANSFER_MASK);
00152     LOG_INFO("tranfer[%d]\n", CONFIG_ADC_TRANSFER);
00153
00154     /* Register and enable irq for adc. */
00155     sysirq_setHandler(INT_ADC, adc_conversion_end_irq);
00156     ADC_IER = BV(ADC_DRDY);
00157 }


BeRTOS: adc_sam3.h File Reference

  • cpu
  • cortex-m3
  • drv
Defines | Functions
adc_sam3.h File Reference

ADC hardware-specific definition. More...

#include <hw/hw_cpufreq.h>
#include "cfg/cfg_adc.h"
#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define | ADC_MUX_MAXCH 16
ADC config define.
#define | ADC_PRESCALER (DIV_ROUNDUP(CPU_FREQ, 2 * CONFIG_ADC_CLOCK) - 1)
Macro for computing correct value to write into ADC register.

Functions

void | adc_hw_select_ch (uint8_t ch)
Select mux channel ch.
uint16_t | adc_hw_read (void)
Start an ADC convertion.
void | adc_hw_init (void)
Init ADC hardware.

Detailed Description

ADC hardware-specific definition.

Author:
Daniele Basile <asterix@develer.com>

Definition in file adc_sam3.h.

Function Documentation

uint16_t adc_hw_read ( void )

Start an ADC convertion.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADC_DRDY bit is done.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADCS bit is done.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADC_DRDY bit is done.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADCS bit is done.

Definition at line 130 of file adc_at91.c.

void adc_hw_select_ch ( uint8_t ch )

Select mux channel ch.

Generally the stm32 cpu family allow us to program the order of adc channel that we want to read. In this driver implementation we put as fist channel to read the select ones.

Generally the stm32 cpu family allow us to program the order of adc channel that we want to read. In this driver implementation we put as fist channel to read the select ones.

Definition at line 116 of file adc_at91.c.


BeRTOS: adc_sam3.h Source File

  • cpu
  • cortex-m3
  • drv
adc_sam3.h
Go to the documentation of this file.
00001
00038 #ifndef DRV_ADC_SAM3_H
00039 #define DRV_ADC_SAM3_H
00040
00041 #include <hw/hw_cpufreq.h>
00042
00043 #include "cfg/cfg_adc.h"
00044
00045 #include <cfg/compiler.h>
00046
00050 #define ADC_MUX_MAXCH         16 //Max number of channel for ADC.
00051 #define ADC_BITS              12 //Bit resolution for ADC converter.
00052
00057 #define ADC_PRESCALER    (DIV_ROUNDUP(CPU_FREQ, 2 * CONFIG_ADC_CLOCK) - 1)
00058 #define ADC_CLOCK        (CPU_FREQ / ((ADC_PRESCALER + 1) * 2))
00059
00060 void adc_hw_select_ch(uint8_t ch);
00061 uint16_t adc_hw_read(void);
00062 void adc_hw_init(void);
00063
00064 #endif /* DRV_ADC_SAM3_H */


BeRTOS: adc_stm32.c File Reference

  • cpu
  • cortex-m3
  • drv
Functions
adc_stm32.c File Reference

ADC hardware-specific implementation. More...

#include "adc_stm32.h"
#include <cpu/irq.h>
#include "cfg/cfg_adc.h"
#include "cfg/cfg_proc.h"
#include "cfg/cfg_signal.h"
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <cfg/log.h>
#include <drv/adc.h>
#include <drv/clock_stm32.h>
#include <drv/gpio_stm32.h>
#include <io/stm32.h>

Go to the source code of this file.

Functions

void | adc_hw_select_ch (uint8_t ch)
Select mux channel ch.
uint16_t | adc_hw_read (void)
Start an ADC convertion.
void | adc_hw_init (void)
Init ADC hardware.

Detailed Description

ADC hardware-specific implementation.

This ADC module should be use both whit kernel or none. If you are using a kernel, the adc drive does not wait the finish of conversion but use a singal every time a required conversion are ended. This signal wake up a process that return a result of conversion. Otherwise, if you not use a kernl, this module wait whit a loop the finishing of conversion.

Author:
Daniele Basile <asterix@develer.com>

Definition in file adc_stm32.c.

Function Documentation

uint16_t adc_hw_read ( void )

Start an ADC convertion.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADC_DRDY bit is done.

Definition at line 131 of file adc_stm32.c.

void adc_hw_select_ch ( uint8_t ch )

Select mux channel ch.

Generally the stm32 cpu family allow us to program the order of adc channel that we want to read. In this driver implementation we put as fist channel to read the select ones.

Definition at line 119 of file adc_stm32.c.


BeRTOS: adc_stm32.c Source File

  • cpu
  • cortex-m3
  • drv
adc_stm32.c
Go to the documentation of this file.
00001
00047 #include "adc_stm32.h"
00048
00049 #include <cpu/irq.h>
00050
00051 #include "cfg/cfg_adc.h"
00052 #include "cfg/cfg_proc.h"
00053 #include "cfg/cfg_signal.h"
00054
00055 #include <cfg/macros.h>
00056 #include <cfg/compiler.h>
00057 #include <cfg/debug.h>
00058
00059 // Define log settings for cfg/log.h.
00060 #define LOG_LEVEL         ADC_LOG_LEVEL
00061 #define LOG_FORMAT        ADC_LOG_FORMAT
00062 #include <cfg/log.h>
00063
00064 #include <drv/adc.h>
00065 #include <drv/clock_stm32.h>
00066 #include <drv/gpio_stm32.h>
00067
00068 #include <io/stm32.h>
00069
00070 struct stm32_adc *adc = (struct stm32_adc *)ADC1_BASE;
00071
00072 #if CONFIG_KERN
00073     #include <cfg/module.h>
00074
00075     #include <kern/proc.h>
00076     #include <kern/signal.h>
00077
00078     #include <drv/irq_cm3.h>
00079
00080
00081     #if !CONFIG_KERN_SIGNALS
00082         #error Signals must be active to use ADC with kernel
00083     #endif
00084
00085     /* Signal adc convertion end */
00086     #define SIG_ADC_COMPLETE SIG_USER0
00087
00088     /* ADC waiting process */
00089     static struct Process *adc_process;
00090
00095     static DECLARE_ISR(adc_conversion_end_irq)
00096     {
00097         sig_post(adc_process, SIG_ADC_COMPLETE);
00098
00099         /* Clear the status bit */
00100         adc->SR &= ~BV(SR_EOC);
00101     }
00102
00103     static void adc_enable_irq(void)
00104     {
00105         /* Register the IRQ handler */
00106         sysirq_setHandler(ADC_IRQHANDLER, adc_conversion_end_irq);
00107         adc->CR1 |= BV(CR1_EOCIE);
00108     }
00109
00110 #endif /* CONFIG_KERN */
00111
00119 void adc_hw_select_ch(uint8_t ch)
00120 {
00121     /* We sample only from one channel */
00122     adc->SQR1 |= BV(SQR1_SQ_LEN_SHIFT);
00123     adc->SQR3 = (ch & SQR3_SQ_MASK);
00124 }
00125
00131 uint16_t adc_hw_read(void)
00132 {
00133     #if CONFIG_KERN
00134         /* Ensure ADC is not already in use by another process */
00135         ASSERT(adc_process == NULL);
00136         adc_process = proc_current();
00137     #endif
00138
00139     /* Start convertion */
00140     adc->CR2 |= CR2_EXTTRIG_SWSTRT_SET;
00141
00142     #if CONFIG_KERN
00143         /* Ensure IRQs enabled. */
00144         IRQ_ASSERT_ENABLED();
00145         sig_wait(SIG_ADC_COMPLETE);
00146
00147         /* Prevent race condition in case of preemptive kernel */
00148         uint16_t ret = adc->DR;
00149         MEMORY_BARRIER;
00150         adc_process = NULL;
00151         return ret;
00152     #else
00153         /* Wait in polling until conversion is done */
00154         while (!(adc->SR & BV(SR_EOC)));
00155
00156         /* Return the last converted data */
00157         return (adc->DR);
00158     #endif
00159 }
00160
00164 void adc_hw_init(void)
00165 {
00166     RCC->APB2ENR |= (RCC_APB2_GPIOA | RCC_APB2_GPIOB | RCC_APB2_GPIOC);
00167     RCC->APB2ENR |= RCC_APB2_ADC1;
00168
00169     /* Reset registry */
00170     adc->CR1 = 0;
00171     adc->CR2 = 0;
00172     adc->SQR1 = 0;
00173     adc->SQR2 = 0;
00174     adc->SQR3 = 0;
00175
00176     /* Calibrate ADC */
00177     adc->CR2 |= BV(CR2_RTSCAL);
00178     adc->CR2 |= BV(CR2_CAL);
00179
00180     /* Wait in polling until calibration is done */
00181     while (adc->CR2 & BV(CR2_CAL));
00182
00183     /*
00184      * Configure ADC
00185      *  - Regular mode
00186      *  - Wake up adc
00187      *  - Wake up temperature and Vrefint
00188      */
00189     adc->CR2 |= (BV(CR2_ADON) | ADC_EXTERNALTRIGCONV_NONE | BV(CR2_TSVREFE));
00190
00191     /* Set 17.1usec sampling time*/
00192     adc->SMPR1 |= ((ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH17) |
00193         (ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH16) |
00194         (ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH15) |
00195         (ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH14) |
00196         (ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH13) |
00197         (ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH12) |
00198         (ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH11) |
00199         (ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH10));
00200
00201     adc->SMPR2 |= ((ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH9) |
00202         (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH8) |
00203         (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH7) |
00204         (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH6) |
00205         (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH5) |
00206         (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH4) |
00207         (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH3) |
00208         (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH2) |
00209         (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH1) |
00210         (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH0));
00211
00212     #if CONFIG_KERN
00213         adc_enable_irq();
00214     #endif
00215 }


BeRTOS: adc_stm32.h File Reference

  • cpu
  • cortex-m3
  • drv
Defines | Functions
adc_stm32.h File Reference

ADC hardware-specific definition. More...

#include <hw/hw_cpufreq.h>
#include "cfg/cfg_adc.h"
#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define | ADC_MUX_MAXCH 17
ADC config define.
#define | ADC_INIT_PINS()
Init the ADC pins.

Functions

void | adc_hw_select_ch (uint8_t ch)
Select mux channel ch.
uint16_t | adc_hw_read (void)
Start an ADC convertion.
void | adc_hw_init (void)
Init ADC hardware.

Detailed Description

ADC hardware-specific definition.

Author:
Daniele Basile <asterix@develer.com>

Definition in file adc_stm32.h.

Define Documentation

#define ADC_INIT_PINS ( )
Value:
do { \
    } while (0)

Init the ADC pins.

Implement it if necessary.

Definition at line 57 of file adc_stm32.h.

Function Documentation

uint16_t adc_hw_read ( void )

Start an ADC convertion.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADC_DRDY bit is done.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADCS bit is done.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADC_DRDY bit is done.

If a kernel is present, preempt until convertion is complete, otherwise a busy wait on ADCS bit is done.

Definition at line 130 of file adc_at91.c.

void adc_hw_select_ch ( uint8_t ch )

Select mux channel ch.

Generally the stm32 cpu family allow us to program the order of adc channel that we want to read. In this driver implementation we put as fist channel to read the select ones.

Generally the stm32 cpu family allow us to program the order of adc channel that we want to read. In this driver implementation we put as fist channel to read the select ones.

Definition at line 116 of file adc_at91.c.


BeRTOS: adc_stm32.h Source File

  • cpu
  • cortex-m3
  • drv
adc_stm32.h
Go to the documentation of this file.
00001
00038 #ifndef DRV_ADC_STM32_H
00039 #define DRV_ADC_STM32_H
00040
00041 #include <hw/hw_cpufreq.h>
00042
00043 #include "cfg/cfg_adc.h"
00044
00045 #include <cfg/compiler.h>
00046
00050 #define ADC_MUX_MAXCH         17 //Max number of channel for ADC.
00051 #define ADC_BITS              12 //Bit resolution for ADC converter.
00052
00057 #define ADC_INIT_PINS() \
00058     do { \
00059     } while (0)
00060
00061 void adc_hw_select_ch(uint8_t ch);
00062 uint16_t adc_hw_read(void);
00063 void adc_hw_init(void);
00064
00065 #endif /* DRV_ADC_STM32_H */


BeRTOS: aes.c File Reference

  • sec
  • cipher
aes.c File Reference

AES Advanced Encryption Standard implementation. More...

#include "aes.h"
#include <cfg/compiler.h>
#include <cpu/byteorder.h>
#include <string.h>
#include "aes_f8.h"

Go to the source code of this file.

Detailed Description

AES Advanced Encryption Standard implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file aes.c.


BeRTOS: aes.c Source File

  • sec
  • cipher
aes.c
Go to the documentation of this file.
00001
00041 #include "aes.h"
00042 #include <cfg/compiler.h>
00043 #include <cpu/byteorder.h>
00044
00045 #include <string.h>
00046
00047 // AES only supports Nb=4
00048 #define Nb 4            // number of columns in the state & expanded key
00049
00050 typedef struct
00051 {
00052     BlockCipher c;
00053     uint8_t num_rounds;
00054     int8_t key_status;
00055     uint8_t _dummy1;
00056     uint8_t _dummy2;
00057     uint8_t expkey[0];
00058 } AES_Context;
00059
00060
00061 #if CPU_REG_BITS == 32
00062
00063 // 32-bit optimized implementation
00064 #include "aes_f32.h"
00065
00066 #else
00067
00068 // Full 8-bit implementation
00069 #include "aes_f8.h"
00070
00071 #endif
00072
00073
00074 /******************************************************************************/
00075
00076 void AES128_init(AES128_Context *aes_)
00077 {
00078     AES_Context *aes = (AES_Context *)aes_;
00079     aes->c.set_key = AES_expandKey;
00080     aes->c.enc_block = AES_encrypt;
00081     aes->c.dec_block = AES_decrypt;
00082     aes->c.block_len = Nb*4;
00083     aes->c.key_len = 16;
00084     aes->num_rounds = 10;
00085 }
00086
00087 void AES192_init(AES192_Context *aes_)
00088 {
00089     AES_Context *aes = (AES_Context *)aes_;
00090     aes->c.set_key = AES_expandKey;
00091     aes->c.enc_block = AES_encrypt;
00092     aes->c.dec_block = AES_decrypt;
00093     aes->c.block_len = Nb*4;
00094     aes->c.key_len = 24;
00095     aes->num_rounds = 12;
00096 }
00097
00098 void AES256_init(AES256_Context *aes_)
00099 {
00100     AES_Context *aes = (AES_Context *)aes_;
00101     aes->c.set_key = AES_expandKey;
00102     aes->c.enc_block = AES_encrypt;
00103     aes->c.dec_block = AES_decrypt;
00104     aes->c.block_len = Nb*4;
00105     aes->c.key_len = 32;
00106     aes->num_rounds = 14;
00107 }


BeRTOS: aes.h File Reference

  • sec
  • cipher
aes.h File Reference

AES Advanced Encryption Standard implementation. More...

#include <sec/cipher.h>
#include <sec/util.h>
#include <alloca.h>

Go to the source code of this file.

Detailed Description

AES Advanced Encryption Standard implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file aes.h.


BeRTOS: aes.h Source File

  • sec
  • cipher
aes.h
Go to the documentation of this file.
00001
00040 #ifndef SEC_CIPHER_AES_H
00041 #define SEC_CIPHER_AES_H
00042
00043 #include <sec/cipher.h>
00044 #include <sec/util.h>
00045 #include <alloca.h>
00046
00047 typedef struct
00048 {
00049     BlockCipher c;
00050     uint32_t status;
00051     uint8_t expkey[44*4];
00052 } AES128_Context;
00053
00054 typedef struct
00055 {
00056     BlockCipher c;
00057     uint32_t status;
00058     uint8_t expkey[52*4];
00059 } AES192_Context;
00060
00061 typedef struct
00062 {
00063     BlockCipher c;
00064     uint32_t status;
00065     uint8_t expkey[60*4];
00066 } AES256_Context;
00067
00068 void AES128_init(AES128_Context *c);
00069 void AES192_init(AES192_Context *c);
00070 void AES256_init(AES256_Context *c);
00071
00072 #define AES128_stackinit(...) \
00073     ({ AES128_Context *ctx = alloca(sizeof(AES128_Context)); AES128_init(ctx, ##__VA_ARGS__); &ctx->c; })
00074
00075 #define AES192_stackinit(...) \
00076     ({ AES192_Context *ctx = alloca(sizeof(AES192_Context)); AES192_init(ctx, ##__VA_ARGS__); &ctx->c; })
00077
00078 #define AES256_stackinit(...) \
00079     ({ AES256_Context *ctx = alloca(sizeof(AES256_Context)); AES256_init(ctx, ##__VA_ARGS__); &ctx->c; })
00080
00081 int AES_testSetup(void);
00082 int AES_testRun(void);
00083 int AES_testTearDown(void);
00084
00085 #endif /* SEC_CIPHER_AES_H */


BeRTOS: aes_f8.h File Reference

  • sec
  • cipher
aes_f8.h File Reference

AES Advanced Encryption Standard implementation. More...

Go to the source code of this file.

Detailed Description

AES Advanced Encryption Standard implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file aes_f8.h.


BeRTOS: aes_f8.h Source File

  • sec
  • cipher
aes_f8.h
Go to the documentation of this file.
00001
00039 // advanced encryption standard
00040 // author: karl malbrain, malbrain@yahoo.com
00041 /*
00042 This work, including the source code, documentation
00043 and related data, is placed into the public domain.
00044
00045 The orginal author is Karl Malbrain.
00046
00047 THIS SOFTWARE IS PROVIDED AS-IS WITHOUT WARRANTY
00048 OF ANY KIND, NOT EVEN THE IMPLIED WARRANTY OF
00049 MERCHANTABILITY. THE AUTHOR OF THIS SOFTWARE,
00050 ASSUMES _NO_ RESPONSIBILITY FOR ANY CONSEQUENCE
00051 RESULTING FROM THE USE, MODIFICATION, OR
00052 REDISTRIBUTION OF THIS SOFTWARE.
00053 */
00054
00055 static uint8_t Sbox[256] = {        // forward s-box
00056 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,
00057 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0,
00058 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,
00059 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75,
00060 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84,
00061 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,
00062 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8,
00063 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2,
00064 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,
00065 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb,
00066 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79,
00067 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,
00068 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a,
00069 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e,
00070 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,
00071 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16};
00072
00073 static uint8_t InvSbox[256] = { // inverse s-box
00074 0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38, 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb,
00075 0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87, 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb,
00076 0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d, 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e,
00077 0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2, 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25,
00078 0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16, 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92,
00079 0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda, 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84,
00080 0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a, 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06,
00081 0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02, 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b,
00082 0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea, 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73,
00083 0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85, 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e,
00084 0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89, 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b,
00085 0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20, 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4,
00086 0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31, 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f,
00087 0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d, 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef,
00088 0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0, 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61,
00089 0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26, 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d};
00090
00091 // combined Xtimes2[Sbox[]]
00092 static uint8_t Xtime2Sbox[256] = {
00093 0xc6, 0xf8, 0xee, 0xf6, 0xff, 0xd6, 0xde, 0x91, 0x60, 0x02, 0xce, 0x56, 0xe7, 0xb5, 0x4d, 0xec,
00094 0x8f, 0x1f, 0x89, 0xfa, 0xef, 0xb2, 0x8e, 0xfb, 0x41, 0xb3, 0x5f, 0x45, 0x23, 0x53, 0xe4, 0x9b,
00095 0x75, 0xe1, 0x3d, 0x4c, 0x6c, 0x7e, 0xf5, 0x83, 0x68, 0x51, 0xd1, 0xf9, 0xe2, 0xab, 0x62, 0x2a,
00096 0x08, 0x95, 0x46, 0x9d, 0x30, 0x37, 0x0a, 0x2f, 0x0e, 0x24, 0x1b, 0xdf, 0xcd, 0x4e, 0x7f, 0xea,
00097 0x12, 0x1d, 0x58, 0x34, 0x36, 0xdc, 0xb4, 0x5b, 0xa4, 0x76, 0xb7, 0x7d, 0x52, 0xdd, 0x5e, 0x13,
00098 0xa6, 0xb9, 0x00, 0xc1, 0x40, 0xe3, 0x79, 0xb6, 0xd4, 0x8d, 0x67, 0x72, 0x94, 0x98, 0xb0, 0x85,
00099 0xbb, 0xc5, 0x4f, 0xed, 0x86, 0x9a, 0x66, 0x11, 0x8a, 0xe9, 0x04, 0xfe, 0xa0, 0x78, 0x25, 0x4b,
00100 0xa2, 0x5d, 0x80, 0x05, 0x3f, 0x21, 0x70, 0xf1, 0x63, 0x77, 0xaf, 0x42, 0x20, 0xe5, 0xfd, 0xbf,
00101 0x81, 0x18, 0x26, 0xc3, 0xbe, 0x35, 0x88, 0x2e, 0x93, 0x55, 0xfc, 0x7a, 0xc8, 0xba, 0x32, 0xe6,
00102 0xc0, 0x19, 0x9e, 0xa3, 0x44, 0x54, 0x3b, 0x0b, 0x8c, 0xc7, 0x6b, 0x28, 0xa7, 0xbc, 0x16, 0xad,
00103 0xdb, 0x64, 0x74, 0x14, 0x92, 0x0c, 0x48, 0xb8, 0x9f, 0xbd, 0x43, 0xc4, 0x39, 0x31, 0xd3, 0xf2,
00104 0xd5, 0x8b, 0x6e, 0xda, 0x01, 0xb1, 0x9c, 0x49, 0xd8, 0xac, 0xf3, 0xcf, 0xca, 0xf4, 0x47, 0x10,
00105 0x6f, 0xf0, 0x4a, 0x5c, 0x38, 0x57, 0x73, 0x97, 0xcb, 0xa1, 0xe8, 0x3e, 0x96, 0x61, 0x0d, 0x0f,
00106 0xe0, 0x7c, 0x71, 0xcc, 0x90, 0x06, 0xf7, 0x1c, 0xc2, 0x6a, 0xae, 0x69, 0x17, 0x99, 0x3a, 0x27,
00107 0xd9, 0xeb, 0x2b, 0x22, 0xd2, 0xa9, 0x07, 0x33, 0x2d, 0x3c, 0x15, 0xc9, 0x87, 0xaa, 0x50, 0xa5,
00108 0x03, 0x59, 0x09, 0x1a, 0x65, 0xd7, 0x84, 0xd0, 0x82, 0x29, 0x5a, 0x1e, 0x7b, 0xa8, 0x6d, 0x2c
00109 };
00110
00111 // combined Xtimes3[Sbox[]]
00112 static uint8_t Xtime3Sbox[256] = {
00113 0xa5, 0x84, 0x99, 0x8d, 0x0d, 0xbd, 0xb1, 0x54, 0x50, 0x03, 0xa9, 0x7d, 0x19, 0x62, 0xe6, 0x9a,
00114 0x45, 0x9d, 0x40, 0x87, 0x15, 0xeb, 0xc9, 0x0b, 0xec, 0x67, 0xfd, 0xea, 0xbf, 0xf7, 0x96, 0x5b,
00115 0xc2, 0x1c, 0xae, 0x6a, 0x5a, 0x41, 0x02, 0x4f, 0x5c, 0xf4, 0x34, 0x08, 0x93, 0x73, 0x53, 0x3f,
00116 0x0c, 0x52, 0x65, 0x5e, 0x28, 0xa1, 0x0f, 0xb5, 0x09, 0x36, 0x9b, 0x3d, 0x26, 0x69, 0xcd, 0x9f,
00117 0x1b, 0x9e, 0x74, 0x2e, 0x2d, 0xb2, 0xee, 0xfb, 0xf6, 0x4d, 0x61, 0xce, 0x7b, 0x3e, 0x71, 0x97,
00118 0xf5, 0x68, 0x00, 0x2c, 0x60, 0x1f, 0xc8, 0xed, 0xbe, 0x46, 0xd9, 0x4b, 0xde, 0xd4, 0xe8, 0x4a,
00119 0x6b, 0x2a, 0xe5, 0x16, 0xc5, 0xd7, 0x55, 0x94, 0xcf, 0x10, 0x06, 0x81, 0xf0, 0x44, 0xba, 0xe3,
00120 0xf3, 0xfe, 0xc0, 0x8a, 0xad, 0xbc, 0x48, 0x04, 0xdf, 0xc1, 0x75, 0x63, 0x30, 0x1a, 0x0e, 0x6d,
00121 0x4c, 0x14, 0x35, 0x2f, 0xe1, 0xa2, 0xcc, 0x39, 0x57, 0xf2, 0x82, 0x47, 0xac, 0xe7, 0x2b, 0x95,
00122 0xa0, 0x98, 0xd1, 0x7f, 0x66, 0x7e, 0xab, 0x83, 0xca, 0x29, 0xd3, 0x3c, 0x79, 0xe2, 0x1d, 0x76,
00123 0x3b, 0x56, 0x4e, 0x1e, 0xdb, 0x0a, 0x6c, 0xe4, 0x5d, 0x6e, 0xef, 0xa6, 0xa8, 0xa4, 0x37, 0x8b,
00124 0x32, 0x43, 0x59, 0xb7, 0x8c, 0x64, 0xd2, 0xe0, 0xb4, 0xfa, 0x07, 0x25, 0xaf, 0x8e, 0xe9, 0x18,
00125 0xd5, 0x88, 0x6f, 0x72, 0x24, 0xf1, 0xc7, 0x51, 0x23, 0x7c, 0x9c, 0x21, 0xdd, 0xdc, 0x86, 0x85,
00126 0x90, 0x42, 0xc4, 0xaa, 0xd8, 0x05, 0x01, 0x12, 0xa3, 0x5f, 0xf9, 0xd0, 0x91, 0x58, 0x27, 0xb9,
00127 0x38, 0x13, 0xb3, 0x33, 0xbb, 0x70, 0x89, 0xa7, 0xb6, 0x22, 0x92, 0x20, 0x49, 0xff, 0x78, 0x7a,
00128 0x8f, 0xf8, 0x80, 0x17, 0xda, 0x31, 0xc6, 0xb8, 0xc3, 0xb0, 0x77, 0x11, 0xcb, 0xfc, 0xd6, 0x3a
00129 };
00130
00131 // modular multiplication tables
00132 // based on:
00133
00134 // Xtime2[x] = (x & 0x80 ? 0x1b : 0) ^ (x + x)
00135 // Xtime3[x] = x^Xtime2[x];
00136 #if 0
00137 static uint8_t Xtime2[256] = {
00138 0x00, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e, 0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e,
00139 0x20, 0x22, 0x24, 0x26, 0x28, 0x2a, 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x3a, 0x3c, 0x3e,
00140 0x40, 0x42, 0x44, 0x46, 0x48, 0x4a, 0x4c, 0x4e, 0x50, 0x52, 0x54, 0x56, 0x58, 0x5a, 0x5c, 0x5e,
00141 0x60, 0x62, 0x64, 0x66, 0x68, 0x6a, 0x6c, 0x6e, 0x70, 0x72, 0x74, 0x76, 0x78, 0x7a, 0x7c, 0x7e,
00142 0x80, 0x82, 0x84, 0x86, 0x88, 0x8a, 0x8c, 0x8e, 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9c, 0x9e,
00143 0xa0, 0xa2, 0xa4, 0xa6, 0xa8, 0xaa, 0xac, 0xae, 0xb0, 0xb2, 0xb4, 0xb6, 0xb8, 0xba, 0xbc, 0xbe,
00144 0xc0, 0xc2, 0xc4, 0xc6, 0xc8, 0xca, 0xcc, 0xce, 0xd0, 0xd2, 0xd4, 0xd6, 0xd8, 0xda, 0xdc, 0xde,
00145 0xe0, 0xe2, 0xe4, 0xe6, 0xe8, 0xea, 0xec, 0xee, 0xf0, 0xf2, 0xf4, 0xf6, 0xf8, 0xfa, 0xfc, 0xfe,
00146 0x1b, 0x19, 0x1f, 0x1d, 0x13, 0x11, 0x17, 0x15, 0x0b, 0x09, 0x0f, 0x0d, 0x03, 0x01, 0x07, 0x05,
00147 0x3b, 0x39, 0x3f, 0x3d, 0x33, 0x31, 0x37, 0x35, 0x2b, 0x29, 0x2f, 0x2d, 0x23, 0x21, 0x27, 0x25,
00148 0x5b, 0x59, 0x5f, 0x5d, 0x53, 0x51, 0x57, 0x55, 0x4b, 0x49, 0x4f, 0x4d, 0x43, 0x41, 0x47, 0x45,
00149 0x7b, 0x79, 0x7f, 0x7d, 0x73, 0x71, 0x77, 0x75, 0x6b, 0x69, 0x6f, 0x6d, 0x63, 0x61, 0x67, 0x65,
00150 0x9b, 0x99, 0x9f, 0x9d, 0x93, 0x91, 0x97, 0x95, 0x8b, 0x89, 0x8f, 0x8d, 0x83, 0x81, 0x87, 0x85,
00151 0xbb, 0xb9, 0xbf, 0xbd, 0xb3, 0xb1, 0xb7, 0xb5, 0xab, 0xa9, 0xaf, 0xad, 0xa3, 0xa1, 0xa7, 0xa5,
00152 0xdb, 0xd9, 0xdf, 0xdd, 0xd3, 0xd1, 0xd7, 0xd5, 0xcb, 0xc9, 0xcf, 0xcd, 0xc3, 0xc1, 0xc7, 0xc5,
00153 0xfb, 0xf9, 0xff, 0xfd, 0xf3, 0xf1, 0xf7, 0xf5, 0xeb, 0xe9, 0xef, 0xed, 0xe3, 0xe1, 0xe7, 0xe5};
00154 #endif
00155
00156 static uint8_t Xtime9[256] = {
00157 0x00, 0x09, 0x12, 0x1b, 0x24, 0x2d, 0x36, 0x3f, 0x48, 0x41, 0x5a, 0x53, 0x6c, 0x65, 0x7e, 0x77,
00158 0x90, 0x99, 0x82, 0x8b, 0xb4, 0xbd, 0xa6, 0xaf, 0xd8, 0xd1, 0xca, 0xc3, 0xfc, 0xf5, 0xee, 0xe7,
00159 0x3b, 0x32, 0x29, 0x20, 0x1f, 0x16, 0x0d, 0x04, 0x73, 0x7a, 0x61, 0x68, 0x57, 0x5e, 0x45, 0x4c,
00160 0xab, 0xa2, 0xb9, 0xb0, 0x8f, 0x86, 0x9d, 0x94, 0xe3, 0xea, 0xf1, 0xf8, 0xc7, 0xce, 0xd5, 0xdc,
00161 0x76, 0x7f, 0x64, 0x6d, 0x52, 0x5b, 0x40, 0x49, 0x3e, 0x37, 0x2c, 0x25, 0x1a, 0x13, 0x08, 0x01,
00162 0xe6, 0xef, 0xf4, 0xfd, 0xc2, 0xcb, 0xd0, 0xd9, 0xae, 0xa7, 0xbc, 0xb5, 0x8a, 0x83, 0x98, 0x91,
00163 0x4d, 0x44, 0x5f, 0x56, 0x69, 0x60, 0x7b, 0x72, 0x05, 0x0c, 0x17, 0x1e, 0x21, 0x28, 0x33, 0x3a,
00164 0xdd, 0xd4, 0xcf, 0xc6, 0xf9, 0xf0, 0xeb, 0xe2, 0x95, 0x9c, 0x87, 0x8e, 0xb1, 0xb8, 0xa3, 0xaa,
00165 0xec, 0xe5, 0xfe, 0xf7, 0xc8, 0xc1, 0xda, 0xd3, 0xa4, 0xad, 0xb6, 0xbf, 0x80, 0x89, 0x92, 0x9b,
00166 0x7c, 0x75, 0x6e, 0x67, 0x58, 0x51, 0x4a, 0x43, 0x34, 0x3d, 0x26, 0x2f, 0x10, 0x19, 0x02, 0x0b,
00167 0xd7, 0xde, 0xc5, 0xcc, 0xf3, 0xfa, 0xe1, 0xe8, 0x9f, 0x96, 0x8d, 0x84, 0xbb, 0xb2, 0xa9, 0xa0,
00168 0x47, 0x4e, 0x55, 0x5c, 0x63, 0x6a, 0x71, 0x78, 0x0f, 0x06, 0x1d, 0x14, 0x2b, 0x22, 0x39, 0x30,
00169 0x9a, 0x93, 0x88, 0x81, 0xbe, 0xb7, 0xac, 0xa5, 0xd2, 0xdb, 0xc0, 0xc9, 0xf6, 0xff, 0xe4, 0xed,
00170 0x0a, 0x03, 0x18, 0x11, 0x2e, 0x27, 0x3c, 0x35, 0x42, 0x4b, 0x50, 0x59, 0x66, 0x6f, 0x74, 0x7d,
00171 0xa1, 0xa8, 0xb3, 0xba, 0x85, 0x8c, 0x97, 0x9e, 0xe9, 0xe0, 0xfb, 0xf2, 0xcd, 0xc4, 0xdf, 0xd6,
00172 0x31, 0x38, 0x23, 0x2a, 0x15, 0x1c, 0x07, 0x0e, 0x79, 0x70, 0x6b, 0x62, 0x5d, 0x54, 0x4f, 0x46};
00173
00174 static uint8_t XtimeB[256] = {
00175 0x00, 0x0b, 0x16, 0x1d, 0x2c, 0x27, 0x3a, 0x31, 0x58, 0x53, 0x4e, 0x45, 0x74, 0x7f, 0x62, 0x69,
00176 0xb0, 0xbb, 0xa6, 0xad, 0x9c, 0x97, 0x8a, 0x81, 0xe8, 0xe3, 0xfe, 0xf5, 0xc4, 0xcf, 0xd2, 0xd9,
00177 0x7b, 0x70, 0x6d, 0x66, 0x57, 0x5c, 0x41, 0x4a, 0x23, 0x28, 0x35, 0x3e, 0x0f, 0x04, 0x19, 0x12,
00178 0xcb, 0xc0, 0xdd, 0xd6, 0xe7, 0xec, 0xf1, 0xfa, 0x93, 0x98, 0x85, 0x8e, 0xbf, 0xb4, 0xa9, 0xa2,
00179 0xf6, 0xfd, 0xe0, 0xeb, 0xda, 0xd1, 0xcc, 0xc7, 0xae, 0xa5, 0xb8, 0xb3, 0x82, 0x89, 0x94, 0x9f,
00180 0x46, 0x4d, 0x50, 0x5b, 0x6a, 0x61, 0x7c, 0x77, 0x1e, 0x15, 0x08, 0x03, 0x32, 0x39, 0x24, 0x2f,
00181 0x8d, 0x86, 0x9b, 0x90, 0xa1, 0xaa, 0xb7, 0xbc, 0xd5, 0xde, 0xc3, 0xc8, 0xf9, 0xf2, 0xef, 0xe4,
00182 0x3d, 0x36, 0x2b, 0x20, 0x11, 0x1a, 0x07, 0x0c, 0x65, 0x6e, 0x73, 0x78, 0x49, 0x42, 0x5f, 0x54,
00183 0xf7, 0xfc, 0xe1, 0xea, 0xdb, 0xd0, 0xcd, 0xc6, 0xaf, 0xa4, 0xb9, 0xb2, 0x83, 0x88, 0x95, 0x9e,
00184 0x47, 0x4c, 0x51, 0x5a, 0x6b, 0x60, 0x7d, 0x76, 0x1f, 0x14, 0x09, 0x02, 0x33, 0x38, 0x25, 0x2e,
00185 0x8c, 0x87, 0x9a, 0x91, 0xa0, 0xab, 0xb6, 0xbd, 0xd4, 0xdf, 0xc2, 0xc9, 0xf8, 0xf3, 0xee, 0xe5,
00186 0x3c, 0x37, 0x2a, 0x21, 0x10, 0x1b, 0x06, 0x0d, 0x64, 0x6f, 0x72, 0x79, 0x48, 0x43, 0x5e, 0x55,
00187 0x01, 0x0a, 0x17, 0x1c, 0x2d, 0x26, 0x3b, 0x30, 0x59, 0x52, 0x4f, 0x44, 0x75, 0x7e, 0x63, 0x68,
00188 0xb1, 0xba, 0xa7, 0xac, 0x9d, 0x96, 0x8b, 0x80, 0xe9, 0xe2, 0xff, 0xf4, 0xc5, 0xce, 0xd3, 0xd8,
00189 0x7a, 0x71, 0x6c, 0x67, 0x56, 0x5d, 0x40, 0x4b, 0x22, 0x29, 0x34, 0x3f, 0x0e, 0x05, 0x18, 0x13,
00190 0xca, 0xc1, 0xdc, 0xd7, 0xe6, 0xed, 0xf0, 0xfb, 0x92, 0x99, 0x84, 0x8f, 0xbe, 0xb5, 0xa8, 0xa3};
00191
00192 static uint8_t XtimeD[256] = {
00193 0x00, 0x0d, 0x1a, 0x17, 0x34, 0x39, 0x2e, 0x23, 0x68, 0x65, 0x72, 0x7f, 0x5c, 0x51, 0x46, 0x4b,
00194 0xd0, 0xdd, 0xca, 0xc7, 0xe4, 0xe9, 0xfe, 0xf3, 0xb8, 0xb5, 0xa2, 0xaf, 0x8c, 0x81, 0x96, 0x9b,
00195 0xbb, 0xb6, 0xa1, 0xac, 0x8f, 0x82, 0x95, 0x98, 0xd3, 0xde, 0xc9, 0xc4, 0xe7, 0xea, 0xfd, 0xf0,
00196 0x6b, 0x66, 0x71, 0x7c, 0x5f, 0x52, 0x45, 0x48, 0x03, 0x0e, 0x19, 0x14, 0x37, 0x3a, 0x2d, 0x20,
00197 0x6d, 0x60, 0x77, 0x7a, 0x59, 0x54, 0x43, 0x4e, 0x05, 0x08, 0x1f, 0x12, 0x31, 0x3c, 0x2b, 0x26,
00198 0xbd, 0xb0, 0xa7, 0xaa, 0x89, 0x84, 0x93, 0x9e, 0xd5, 0xd8, 0xcf, 0xc2, 0xe1, 0xec, 0xfb, 0xf6,
00199 0xd6, 0xdb, 0xcc, 0xc1, 0xe2, 0xef, 0xf8, 0xf5, 0xbe, 0xb3, 0xa4, 0xa9, 0x8a, 0x87, 0x90, 0x9d,
00200 0x06, 0x0b, 0x1c, 0x11, 0x32, 0x3f, 0x28, 0x25, 0x6e, 0x63, 0x74, 0x79, 0x5a, 0x57, 0x40, 0x4d,
00201 0xda, 0xd7, 0xc0, 0xcd, 0xee, 0xe3, 0xf4, 0xf9, 0xb2, 0xbf, 0xa8, 0xa5, 0x86, 0x8b, 0x9c, 0x91,
00202 0x0a, 0x07, 0x10, 0x1d, 0x3e, 0x33, 0x24, 0x29, 0x62, 0x6f, 0x78, 0x75, 0x56, 0x5b, 0x4c, 0x41,
00203 0x61, 0x6c, 0x7b, 0x76, 0x55, 0x58, 0x4f, 0x42, 0x09, 0x04, 0x13, 0x1e, 0x3d, 0x30, 0x27, 0x2a,
00204 0xb1, 0xbc, 0xab, 0xa6, 0x85, 0x88, 0x9f, 0x92, 0xd9, 0xd4, 0xc3, 0xce, 0xed, 0xe0, 0xf7, 0xfa,
00205 0xb7, 0xba, 0xad, 0xa0, 0x83, 0x8e, 0x99, 0x94, 0xdf, 0xd2, 0xc5, 0xc8, 0xeb, 0xe6, 0xf1, 0xfc,
00206 0x67, 0x6a, 0x7d, 0x70, 0x53, 0x5e, 0x49, 0x44, 0x0f, 0x02, 0x15, 0x18, 0x3b, 0x36, 0x21, 0x2c,
00207 0x0c, 0x01, 0x16, 0x1b, 0x38, 0x35, 0x22, 0x2f, 0x64, 0x69, 0x7e, 0x73, 0x50, 0x5d, 0x4a, 0x47,
00208 0xdc, 0xd1, 0xc6, 0xcb, 0xe8, 0xe5, 0xf2, 0xff, 0xb4, 0xb9, 0xae, 0xa3, 0x80, 0x8d, 0x9a, 0x97};
00209
00210 static uint8_t XtimeE[256] = {
00211 0x00, 0x0e, 0x1c, 0x12, 0x38, 0x36, 0x24, 0x2a, 0x70, 0x7e, 0x6c, 0x62, 0x48, 0x46, 0x54, 0x5a,
00212 0xe0, 0xee, 0xfc, 0xf2, 0xd8, 0xd6, 0xc4, 0xca, 0x90, 0x9e, 0x8c, 0x82, 0xa8, 0xa6, 0xb4, 0xba,
00213 0xdb, 0xd5, 0xc7, 0xc9, 0xe3, 0xed, 0xff, 0xf1, 0xab, 0xa5, 0xb7, 0xb9, 0x93, 0x9d, 0x8f, 0x81,
00214 0x3b, 0x35, 0x27, 0x29, 0x03, 0x0d, 0x1f, 0x11, 0x4b, 0x45, 0x57, 0x59, 0x73, 0x7d, 0x6f, 0x61,
00215 0xad, 0xa3, 0xb1, 0xbf, 0x95, 0x9b, 0x89, 0x87, 0xdd, 0xd3, 0xc1, 0xcf, 0xe5, 0xeb, 0xf9, 0xf7,
00216 0x4d, 0x43, 0x51, 0x5f, 0x75, 0x7b, 0x69, 0x67, 0x3d, 0x33, 0x21, 0x2f, 0x05, 0x0b, 0x19, 0x17,
00217 0x76, 0x78, 0x6a, 0x64, 0x4e, 0x40, 0x52, 0x5c, 0x06, 0x08, 0x1a, 0x14, 0x3e, 0x30, 0x22, 0x2c,
00218 0x96, 0x98, 0x8a, 0x84, 0xae, 0xa0, 0xb2, 0xbc, 0xe6, 0xe8, 0xfa, 0xf4, 0xde, 0xd0, 0xc2, 0xcc,
00219 0x41, 0x4f, 0x5d, 0x53, 0x79, 0x77, 0x65, 0x6b, 0x31, 0x3f, 0x2d, 0x23, 0x09, 0x07, 0x15, 0x1b,
00220 0xa1, 0xaf, 0xbd, 0xb3, 0x99, 0x97, 0x85, 0x8b, 0xd1, 0xdf, 0xcd, 0xc3, 0xe9, 0xe7, 0xf5, 0xfb,
00221 0x9a, 0x94, 0x86, 0x88, 0xa2, 0xac, 0xbe, 0xb0, 0xea, 0xe4, 0xf6, 0xf8, 0xd2, 0xdc, 0xce, 0xc0,
00222 0x7a, 0x74, 0x66, 0x68, 0x42, 0x4c, 0x5e, 0x50, 0x0a, 0x04, 0x16, 0x18, 0x32, 0x3c, 0x2e, 0x20,
00223 0xec, 0xe2, 0xf0, 0xfe, 0xd4, 0xda, 0xc8, 0xc6, 0x9c, 0x92, 0x80, 0x8e, 0xa4, 0xaa, 0xb8, 0xb6,
00224 0x0c, 0x02, 0x10, 0x1e, 0x34, 0x3a, 0x28, 0x26, 0x7c, 0x72, 0x60, 0x6e, 0x44, 0x4a, 0x58, 0x56,
00225 0x37, 0x39, 0x2b, 0x25, 0x0f, 0x01, 0x13, 0x1d, 0x47, 0x49, 0x5b, 0x55, 0x7f, 0x71, 0x63, 0x6d,
00226 0xd7, 0xd9, 0xcb, 0xc5, 0xef, 0xe1, 0xf3, 0xfd, 0xa7, 0xa9, 0xbb, 0xb5, 0x9f, 0x91, 0x83, 0x8d};
00227
00228 // exchanges columns in each of 4 rows
00229 // row0 - unchanged, row1- shifted left 1,
00230 // row2 - shifted left 2 and row3 - shifted left 3
00231 static void ShiftRows (uint8_t *state)
00232 {
00233     uint8_t tmp;
00234
00235     // just substitute row 0
00236     state[0] = Sbox[state[0]], state[4] = Sbox[state[4]];
00237     state[8] = Sbox[state[8]], state[12] = Sbox[state[12]];
00238
00239     // rotate row 1
00240     tmp = Sbox[state[1]], state[1] = Sbox[state[5]];
00241     state[5] = Sbox[state[9]], state[9] = Sbox[state[13]], state[13] = tmp;
00242
00243     // rotate row 2
00244     tmp = Sbox[state[2]], state[2] = Sbox[state[10]], state[10] = tmp;
00245     tmp = Sbox[state[6]], state[6] = Sbox[state[14]], state[14] = tmp;
00246
00247     // rotate row 3
00248     tmp = Sbox[state[15]], state[15] = Sbox[state[11]];
00249     state[11] = Sbox[state[7]], state[7] = Sbox[state[3]], state[3] = tmp;
00250 }
00251
00252 // restores columns in each of 4 rows
00253 // row0 - unchanged, row1- shifted right 1,
00254 // row2 - shifted right 2 and row3 - shifted right 3
00255 static void InvShiftRows (uint8_t *state)
00256 {
00257     uint8_t tmp;
00258
00259     // restore row 0
00260     state[0] = InvSbox[state[0]], state[4] = InvSbox[state[4]];
00261     state[8] = InvSbox[state[8]], state[12] = InvSbox[state[12]];
00262
00263     // restore row 1
00264     tmp = InvSbox[state[13]], state[13] = InvSbox[state[9]];
00265     state[9] = InvSbox[state[5]], state[5] = InvSbox[state[1]], state[1] = tmp;
00266
00267     // restore row 2
00268     tmp = InvSbox[state[2]], state[2] = InvSbox[state[10]], state[10] = tmp;
00269     tmp = InvSbox[state[6]], state[6] = InvSbox[state[14]], state[14] = tmp;
00270
00271     // restore row 3
00272     tmp = InvSbox[state[3]], state[3] = InvSbox[state[7]];
00273     state[7] = InvSbox[state[11]], state[11] = InvSbox[state[15]], state[15] = tmp;
00274 }
00275
00276 // recombine and mix each row in a column
00277 static void MixSubColumns (uint8_t *state)
00278 {
00279     uint8_t tmp[4 * Nb];
00280
00281     // mixing column 0
00282     tmp[0] = Xtime2Sbox[state[0]] ^ Xtime3Sbox[state[5]] ^ Sbox[state[10]] ^ Sbox[state[15]];
00283     tmp[1] = Sbox[state[0]] ^ Xtime2Sbox[state[5]] ^ Xtime3Sbox[state[10]] ^ Sbox[state[15]];
00284     tmp[2] = Sbox[state[0]] ^ Sbox[state[5]] ^ Xtime2Sbox[state[10]] ^ Xtime3Sbox[state[15]];
00285     tmp[3] = Xtime3Sbox[state[0]] ^ Sbox[state[5]] ^ Sbox[state[10]] ^ Xtime2Sbox[state[15]];
00286
00287     // mixing column 1
00288     tmp[4] = Xtime2Sbox[state[4]] ^ Xtime3Sbox[state[9]] ^ Sbox[state[14]] ^ Sbox[state[3]];
00289     tmp[5] = Sbox[state[4]] ^ Xtime2Sbox[state[9]] ^ Xtime3Sbox[state[14]] ^ Sbox[state[3]];
00290     tmp[6] = Sbox[state[4]] ^ Sbox[state[9]] ^ Xtime2Sbox[state[14]] ^ Xtime3Sbox[state[3]];
00291     tmp[7] = Xtime3Sbox[state[4]] ^ Sbox[state[9]] ^ Sbox[state[14]] ^ Xtime2Sbox[state[3]];
00292
00293     // mixing column 2
00294     tmp[8] = Xtime2Sbox[state[8]] ^ Xtime3Sbox[state[13]] ^ Sbox[state[2]] ^ Sbox[state[7]];
00295     tmp[9] = Sbox[state[8]] ^ Xtime2Sbox[state[13]] ^ Xtime3Sbox[state[2]] ^ Sbox[state[7]];
00296     tmp[10]  = Sbox[state[8]] ^ Sbox[state[13]] ^ Xtime2Sbox[state[2]] ^ Xtime3Sbox[state[7]];
00297     tmp[11]  = Xtime3Sbox[state[8]] ^ Sbox[state[13]] ^ Sbox[state[2]] ^ Xtime2Sbox[state[7]];
00298
00299     // mixing column 3
00300     tmp[12] = Xtime2Sbox[state[12]] ^ Xtime3Sbox[state[1]] ^ Sbox[state[6]] ^ Sbox[state[11]];
00301     tmp[13] = Sbox[state[12]] ^ Xtime2Sbox[state[1]] ^ Xtime3Sbox[state[6]] ^ Sbox[state[11]];
00302     tmp[14] = Sbox[state[12]] ^ Sbox[state[1]] ^ Xtime2Sbox[state[6]] ^ Xtime3Sbox[state[11]];
00303     tmp[15] = Xtime3Sbox[state[12]] ^ Sbox[state[1]] ^ Sbox[state[6]] ^ Xtime2Sbox[state[11]];
00304
00305     memcpy (state, tmp, sizeof(tmp));
00306 }
00307
00308 // restore and un-mix each row in a column
00309 static void InvMixSubColumns (uint8_t *state)
00310 {
00311     uint8_t tmp[4 * Nb];
00312     int i;
00313
00314     // restore column 0
00315     tmp[0] = XtimeE[state[0]] ^ XtimeB[state[1]] ^ XtimeD[state[2]] ^ Xtime9[state[3]];
00316     tmp[5] = Xtime9[state[0]] ^ XtimeE[state[1]] ^ XtimeB[state[2]] ^ XtimeD[state[3]];
00317     tmp[10] = XtimeD[state[0]] ^ Xtime9[state[1]] ^ XtimeE[state[2]] ^ XtimeB[state[3]];
00318     tmp[15] = XtimeB[state[0]] ^ XtimeD[state[1]] ^ Xtime9[state[2]] ^ XtimeE[state[3]];
00319
00320     // restore column 1
00321     tmp[4] = XtimeE[state[4]] ^ XtimeB[state[5]] ^ XtimeD[state[6]] ^ Xtime9[state[7]];
00322     tmp[9] = Xtime9[state[4]] ^ XtimeE[state[5]] ^ XtimeB[state[6]] ^ XtimeD[state[7]];
00323     tmp[14] = XtimeD[state[4]] ^ Xtime9[state[5]] ^ XtimeE[state[6]] ^ XtimeB[state[7]];
00324     tmp[3] = XtimeB[state[4]] ^ XtimeD[state[5]] ^ Xtime9[state[6]] ^ XtimeE[state[7]];
00325
00326     // restore column 2
00327     tmp[8] = XtimeE[state[8]] ^ XtimeB[state[9]] ^ XtimeD[state[10]] ^ Xtime9[state[11]];
00328     tmp[13] = Xtime9[state[8]] ^ XtimeE[state[9]] ^ XtimeB[state[10]] ^ XtimeD[state[11]];
00329     tmp[2]  = XtimeD[state[8]] ^ Xtime9[state[9]] ^ XtimeE[state[10]] ^ XtimeB[state[11]];
00330     tmp[7]  = XtimeB[state[8]] ^ XtimeD[state[9]] ^ Xtime9[state[10]] ^ XtimeE[state[11]];
00331
00332     // restore column 3
00333     tmp[12] = XtimeE[state[12]] ^ XtimeB[state[13]] ^ XtimeD[state[14]] ^ Xtime9[state[15]];
00334     tmp[1] = Xtime9[state[12]] ^ XtimeE[state[13]] ^ XtimeB[state[14]] ^ XtimeD[state[15]];
00335     tmp[6] = XtimeD[state[12]] ^ Xtime9[state[13]] ^ XtimeE[state[14]] ^ XtimeB[state[15]];
00336     tmp[11] = XtimeB[state[12]] ^ XtimeD[state[13]] ^ Xtime9[state[14]] ^ XtimeE[state[15]];
00337
00338     for( i=0; i < 4 * Nb; i++ )
00339         state[i] = InvSbox[tmp[i]];
00340 }
00341
00342 // encrypt/decrypt columns of the key
00343 INLINE void AddRoundKey (uint8_t *state, uint8_t *key)
00344 {
00345     xor_block(state, state, key, 16);
00346 }
00347
00348 static uint8_t Rcon[11] =
00349 {
00350     0x00, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1b, 0x36
00351 };
00352
00353 // produce Nb bytes for each round
00354 static void AES_expandKey(BlockCipher *c_, const void *key, size_t len)
00355 {
00356     AES_Context *c = (AES_Context *)c_;
00357     ASSERT(len == c->c.key_len);
00358
00359     uint8_t tmp0, tmp1, tmp2, tmp3, tmp4;
00360     uint32_t idx, idx_mod_nk, idx_div_nk;
00361     int Nk = c->c.key_len/4;
00362     int Nr = c->num_rounds;
00363
00364     memcpy (c->expkey, key, Nk*4);
00365
00366     for( idx = Nk, idx_mod_nk = 0, idx_div_nk = 1; idx < Nb * (Nr + 1); idx++ ) {
00367         tmp0 = c->expkey[4*idx - 4];
00368         tmp1 = c->expkey[4*idx - 3];
00369         tmp2 = c->expkey[4*idx - 2];
00370         tmp3 = c->expkey[4*idx - 1];
00371
00372         if( idx_mod_nk == 0 ) {
00373             tmp4 = tmp3;
00374             tmp3 = Sbox[tmp0];
00375             tmp0 = Sbox[tmp1] ^ Rcon[idx_div_nk];
00376             tmp1 = Sbox[tmp2];
00377             tmp2 = Sbox[tmp4];
00378         } else if( Nk > 6 && idx_mod_nk == 4 ) {
00379             tmp0 = Sbox[tmp0];
00380             tmp1 = Sbox[tmp1];
00381             tmp2 = Sbox[tmp2];
00382             tmp3 = Sbox[tmp3];
00383         }
00384
00385         c->expkey[4*idx+0] = c->expkey[4*idx - 4*Nk + 0] ^ tmp0;
00386         c->expkey[4*idx+1] = c->expkey[4*idx - 4*Nk + 1] ^ tmp1;
00387         c->expkey[4*idx+2] = c->expkey[4*idx - 4*Nk + 2] ^ tmp2;
00388         c->expkey[4*idx+3] = c->expkey[4*idx - 4*Nk + 3] ^ tmp3;
00389
00390         idx_mod_nk += 1;
00391         if (idx_mod_nk == Nk)
00392         {
00393             idx_mod_nk = 0;
00394             ++idx_div_nk;
00395         }
00396     }
00397 }
00398
00399 // encrypt one 128 bit block
00400 static void AES_encrypt(BlockCipher *c_, void *block)
00401 {
00402     AES_Context *c = (AES_Context *)c_;
00403     uint8_t Nr = c->num_rounds;
00404     uint32_t round;
00405
00406     AddRoundKey (block, c->expkey);
00407
00408     for( round = 1; round < Nr + 1; round++ ) {
00409         if( round < Nr )
00410             MixSubColumns (block);
00411         else
00412             ShiftRows (block);
00413
00414         AddRoundKey (block, c->expkey + round * Nb * 4);
00415     }
00416 }
00417
00418 static void AES_decrypt(BlockCipher *c_, void *block)
00419 {
00420     AES_Context *c = (AES_Context *)c_;
00421     uint8_t Nr = c->num_rounds;
00422     uint32_t round;
00423
00424     AddRoundKey (block, c->expkey + Nr * Nb * 4);
00425     InvShiftRows(block);
00426
00427     for( round = Nr; round--; )
00428     {
00429         AddRoundKey (block, c->expkey + round * Nb * 4);
00430         if( round )
00431             InvMixSubColumns (block);
00432     }
00433 }


BeRTOS: aes_f32.h File Reference

  • sec
  • cipher
aes_f32.h File Reference

AES Advanced Encryption Standard implementation. More...

Go to the source code of this file.

Detailed Description

AES Advanced Encryption Standard implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file aes_f32.h.


BeRTOS: aes_f32.h Source File

  • sec
  • cipher
aes_f32.h
Go to the documentation of this file.
00001
00039 /*****************************************************************************/
00040 // ENCRYPTION TABLES
00041 /*****************************************************************************/
00042
00043 static const uint32_t TE0[256] =
00044 {
00045     be32_to_cpu(0xc66363a5UL), be32_to_cpu(0xf87c7c84UL), be32_to_cpu(0xee777799UL), be32_to_cpu(0xf67b7b8dUL),
00046     be32_to_cpu(0xfff2f20dUL), be32_to_cpu(0xd66b6bbdUL), be32_to_cpu(0xde6f6fb1UL), be32_to_cpu(0x91c5c554UL),
00047     be32_to_cpu(0x60303050UL), be32_to_cpu(0x02010103UL), be32_to_cpu(0xce6767a9UL), be32_to_cpu(0x562b2b7dUL),
00048     be32_to_cpu(0xe7fefe19UL), be32_to_cpu(0xb5d7d762UL), be32_to_cpu(0x4dababe6UL), be32_to_cpu(0xec76769aUL),
00049     be32_to_cpu(0x8fcaca45UL), be32_to_cpu(0x1f82829dUL), be32_to_cpu(0x89c9c940UL), be32_to_cpu(0xfa7d7d87UL),
00050     be32_to_cpu(0xeffafa15UL), be32_to_cpu(0xb25959ebUL), be32_to_cpu(0x8e4747c9UL), be32_to_cpu(0xfbf0f00bUL),
00051     be32_to_cpu(0x41adadecUL), be32_to_cpu(0xb3d4d467UL), be32_to_cpu(0x5fa2a2fdUL), be32_to_cpu(0x45afafeaUL),
00052     be32_to_cpu(0x239c9cbfUL), be32_to_cpu(0x53a4a4f7UL), be32_to_cpu(0xe4727296UL), be32_to_cpu(0x9bc0c05bUL),
00053     be32_to_cpu(0x75b7b7c2UL), be32_to_cpu(0xe1fdfd1cUL), be32_to_cpu(0x3d9393aeUL), be32_to_cpu(0x4c26266aUL),
00054     be32_to_cpu(0x6c36365aUL), be32_to_cpu(0x7e3f3f41UL), be32_to_cpu(0xf5f7f702UL), be32_to_cpu(0x83cccc4fUL),
00055     be32_to_cpu(0x6834345cUL), be32_to_cpu(0x51a5a5f4UL), be32_to_cpu(0xd1e5e534UL), be32_to_cpu(0xf9f1f108UL),
00056     be32_to_cpu(0xe2717193UL), be32_to_cpu(0xabd8d873UL), be32_to_cpu(0x62313153UL), be32_to_cpu(0x2a15153fUL),
00057     be32_to_cpu(0x0804040cUL), be32_to_cpu(0x95c7c752UL), be32_to_cpu(0x46232365UL), be32_to_cpu(0x9dc3c35eUL),
00058     be32_to_cpu(0x30181828UL), be32_to_cpu(0x379696a1UL), be32_to_cpu(0x0a05050fUL), be32_to_cpu(0x2f9a9ab5UL),
00059     be32_to_cpu(0x0e070709UL), be32_to_cpu(0x24121236UL), be32_to_cpu(0x1b80809bUL), be32_to_cpu(0xdfe2e23dUL),
00060     be32_to_cpu(0xcdebeb26UL), be32_to_cpu(0x4e272769UL), be32_to_cpu(0x7fb2b2cdUL), be32_to_cpu(0xea75759fUL),
00061     be32_to_cpu(0x1209091bUL), be32_to_cpu(0x1d83839eUL), be32_to_cpu(0x582c2c74UL), be32_to_cpu(0x341a1a2eUL),
00062     be32_to_cpu(0x361b1b2dUL), be32_to_cpu(0xdc6e6eb2UL), be32_to_cpu(0xb45a5aeeUL), be32_to_cpu(0x5ba0a0fbUL),
00063     be32_to_cpu(0xa45252f6UL), be32_to_cpu(0x763b3b4dUL), be32_to_cpu(0xb7d6d661UL), be32_to_cpu(0x7db3b3ceUL),
00064     be32_to_cpu(0x5229297bUL), be32_to_cpu(0xdde3e33eUL), be32_to_cpu(0x5e2f2f71UL), be32_to_cpu(0x13848497UL),
00065     be32_to_cpu(0xa65353f5UL), be32_to_cpu(0xb9d1d168UL), be32_to_cpu(0x00000000UL), be32_to_cpu(0xc1eded2cUL),
00066     be32_to_cpu(0x40202060UL), be32_to_cpu(0xe3fcfc1fUL), be32_to_cpu(0x79b1b1c8UL), be32_to_cpu(0xb65b5bedUL),
00067     be32_to_cpu(0xd46a6abeUL), be32_to_cpu(0x8dcbcb46UL), be32_to_cpu(0x67bebed9UL), be32_to_cpu(0x7239394bUL),
00068     be32_to_cpu(0x944a4adeUL), be32_to_cpu(0x984c4cd4UL), be32_to_cpu(0xb05858e8UL), be32_to_cpu(0x85cfcf4aUL),
00069     be32_to_cpu(0xbbd0d06bUL), be32_to_cpu(0xc5efef2aUL), be32_to_cpu(0x4faaaae5UL), be32_to_cpu(0xedfbfb16UL),
00070     be32_to_cpu(0x864343c5UL), be32_to_cpu(0x9a4d4dd7UL), be32_to_cpu(0x66333355UL), be32_to_cpu(0x11858594UL),
00071     be32_to_cpu(0x8a4545cfUL), be32_to_cpu(0xe9f9f910UL), be32_to_cpu(0x04020206UL), be32_to_cpu(0xfe7f7f81UL),
00072     be32_to_cpu(0xa05050f0UL), be32_to_cpu(0x783c3c44UL), be32_to_cpu(0x259f9fbaUL), be32_to_cpu(0x4ba8a8e3UL),
00073     be32_to_cpu(0xa25151f3UL), be32_to_cpu(0x5da3a3feUL), be32_to_cpu(0x804040c0UL), be32_to_cpu(0x058f8f8aUL),
00074     be32_to_cpu(0x3f9292adUL), be32_to_cpu(0x219d9dbcUL), be32_to_cpu(0x70383848UL), be32_to_cpu(0xf1f5f504UL),
00075     be32_to_cpu(0x63bcbcdfUL), be32_to_cpu(0x77b6b6c1UL), be32_to_cpu(0xafdada75UL), be32_to_cpu(0x42212163UL),
00076     be32_to_cpu(0x20101030UL), be32_to_cpu(0xe5ffff1aUL), be32_to_cpu(0xfdf3f30eUL), be32_to_cpu(0xbfd2d26dUL),
00077     be32_to_cpu(0x81cdcd4cUL), be32_to_cpu(0x180c0c14UL), be32_to_cpu(0x26131335UL), be32_to_cpu(0xc3ecec2fUL),
00078     be32_to_cpu(0xbe5f5fe1UL), be32_to_cpu(0x359797a2UL), be32_to_cpu(0x884444ccUL), be32_to_cpu(0x2e171739UL),
00079     be32_to_cpu(0x93c4c457UL), be32_to_cpu(0x55a7a7f2UL), be32_to_cpu(0xfc7e7e82UL), be32_to_cpu(0x7a3d3d47UL),
00080     be32_to_cpu(0xc86464acUL), be32_to_cpu(0xba5d5de7UL), be32_to_cpu(0x3219192bUL), be32_to_cpu(0xe6737395UL),
00081     be32_to_cpu(0xc06060a0UL), be32_to_cpu(0x19818198UL), be32_to_cpu(0x9e4f4fd1UL), be32_to_cpu(0xa3dcdc7fUL),
00082     be32_to_cpu(0x44222266UL), be32_to_cpu(0x542a2a7eUL), be32_to_cpu(0x3b9090abUL), be32_to_cpu(0x0b888883UL),
00083     be32_to_cpu(0x8c4646caUL), be32_to_cpu(0xc7eeee29UL), be32_to_cpu(0x6bb8b8d3UL), be32_to_cpu(0x2814143cUL),
00084     be32_to_cpu(0xa7dede79UL), be32_to_cpu(0xbc5e5ee2UL), be32_to_cpu(0x160b0b1dUL), be32_to_cpu(0xaddbdb76UL),
00085     be32_to_cpu(0xdbe0e03bUL), be32_to_cpu(0x64323256UL), be32_to_cpu(0x743a3a4eUL), be32_to_cpu(0x140a0a1eUL),
00086     be32_to_cpu(0x924949dbUL), be32_to_cpu(0x0c06060aUL), be32_to_cpu(0x4824246cUL), be32_to_cpu(0xb85c5ce4UL),
00087     be32_to_cpu(0x9fc2c25dUL), be32_to_cpu(0xbdd3d36eUL), be32_to_cpu(0x43acacefUL), be32_to_cpu(0xc46262a6UL),
00088     be32_to_cpu(0x399191a8UL), be32_to_cpu(0x319595a4UL), be32_to_cpu(0xd3e4e437UL), be32_to_cpu(0xf279798bUL),
00089     be32_to_cpu(0xd5e7e732UL), be32_to_cpu(0x8bc8c843UL), be32_to_cpu(0x6e373759UL), be32_to_cpu(0xda6d6db7UL),
00090     be32_to_cpu(0x018d8d8cUL), be32_to_cpu(0xb1d5d564UL), be32_to_cpu(0x9c4e4ed2UL), be32_to_cpu(0x49a9a9e0UL),
00091     be32_to_cpu(0xd86c6cb4UL), be32_to_cpu(0xac5656faUL), be32_to_cpu(0xf3f4f407UL), be32_to_cpu(0xcfeaea25UL),
00092     be32_to_cpu(0xca6565afUL), be32_to_cpu(0xf47a7a8eUL), be32_to_cpu(0x47aeaee9UL), be32_to_cpu(0x10080818UL),
00093     be32_to_cpu(0x6fbabad5UL), be32_to_cpu(0xf0787888UL), be32_to_cpu(0x4a25256fUL), be32_to_cpu(0x5c2e2e72UL),
00094     be32_to_cpu(0x381c1c24UL), be32_to_cpu(0x57a6a6f1UL), be32_to_cpu(0x73b4b4c7UL), be32_to_cpu(0x97c6c651UL),
00095     be32_to_cpu(0xcbe8e823UL), be32_to_cpu(0xa1dddd7cUL), be32_to_cpu(0xe874749cUL), be32_to_cpu(0x3e1f1f21UL),
00096     be32_to_cpu(0x964b4bddUL), be32_to_cpu(0x61bdbddcUL), be32_to_cpu(0x0d8b8b86UL), be32_to_cpu(0x0f8a8a85UL),
00097     be32_to_cpu(0xe0707090UL), be32_to_cpu(0x7c3e3e42UL), be32_to_cpu(0x71b5b5c4UL), be32_to_cpu(0xcc6666aaUL),
00098     be32_to_cpu(0x904848d8UL), be32_to_cpu(0x06030305UL), be32_to_cpu(0xf7f6f601UL), be32_to_cpu(0x1c0e0e12UL),
00099     be32_to_cpu(0xc26161a3UL), be32_to_cpu(0x6a35355fUL), be32_to_cpu(0xae5757f9UL), be32_to_cpu(0x69b9b9d0UL),
00100     be32_to_cpu(0x17868691UL), be32_to_cpu(0x99c1c158UL), be32_to_cpu(0x3a1d1d27UL), be32_to_cpu(0x279e9eb9UL),
00101     be32_to_cpu(0xd9e1e138UL), be32_to_cpu(0xebf8f813UL), be32_to_cpu(0x2b9898b3UL), be32_to_cpu(0x22111133UL),
00102     be32_to_cpu(0xd26969bbUL), be32_to_cpu(0xa9d9d970UL), be32_to_cpu(0x078e8e89UL), be32_to_cpu(0x339494a7UL),
00103     be32_to_cpu(0x2d9b9bb6UL), be32_to_cpu(0x3c1e1e22UL), be32_to_cpu(0x15878792UL), be32_to_cpu(0xc9e9e920UL),
00104     be32_to_cpu(0x87cece49UL), be32_to_cpu(0xaa5555ffUL), be32_to_cpu(0x50282878UL), be32_to_cpu(0xa5dfdf7aUL),
00105     be32_to_cpu(0x038c8c8fUL), be32_to_cpu(0x59a1a1f8UL), be32_to_cpu(0x09898980UL), be32_to_cpu(0x1a0d0d17UL),
00106     be32_to_cpu(0x65bfbfdaUL), be32_to_cpu(0xd7e6e631UL), be32_to_cpu(0x844242c6UL), be32_to_cpu(0xd06868b8UL),
00107     be32_to_cpu(0x824141c3UL), be32_to_cpu(0x299999b0UL), be32_to_cpu(0x5a2d2d77UL), be32_to_cpu(0x1e0f0f11UL),
00108     be32_to_cpu(0x7bb0b0cbUL), be32_to_cpu(0xa85454fcUL), be32_to_cpu(0x6dbbbbd6UL), be32_to_cpu(0x2c16163aUL),
00109 };
00110
00111 static const uint8_t TE4[256] =
00112 {
00113     0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5,
00114     0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,
00115     0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0,
00116     0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0,
00117     0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc,
00118     0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,
00119     0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a,
00120     0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75,
00121     0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0,
00122     0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84,
00123     0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b,
00124     0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,
00125     0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85,
00126     0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8,
00127     0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5,
00128     0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2,
00129     0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17,
00130     0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,
00131     0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88,
00132     0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb,
00133     0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c,
00134     0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79,
00135     0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9,
00136     0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,
00137     0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6,
00138     0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a,
00139     0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e,
00140     0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e,
00141     0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94,
00142     0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,
00143     0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68,
00144     0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16
00145 };
00146
00147 static const uint8_t rcon[10] =
00148 {
00149     0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1b, 0x36,
00150     /* for 128-bit blocks, Rijndael never uses more than 10 rcon values */
00151 };
00152
00153 #if CPU_BYTE_ORDER == CPU_LITTLE_ENDIAN
00154
00155 #define Te0(x) TE0[x&0xFF]
00156 #define Te1(x) ROTL(TE0[(x>>8)&0xFF], 8)
00157 #define Te2(x) ROTL(TE0[(x>>16)&0xFF], 16)
00158 #define Te3(x) ROTL(TE0[x>>24], 24)
00159
00160 #define Te4_0(x)  ((uint32_t)TE4[x>>24] << 24)
00161 #define Te4_1(x)  ((uint32_t)TE4[(x>>16)&0xFF] << 16)
00162 #define Te4_2(x)  ((uint32_t)TE4[(x>>8)&0xFF] << 8)
00163 #define Te4_3(x)  ((uint32_t)TE4[x&0xFF])
00164
00165 #define RCON(x)   ((uint32_t)rcon[x])
00166
00167 #define TeKeyMix(x)  \
00168     (((uint32_t)TE4[(x>>8)&0xFF]) ^ \
00169     ((uint32_t)TE4[(x>>16)&0xFF] << 8) ^ \
00170     ((uint32_t)TE4[x>>24] << 16) ^ \
00171     ((uint32_t)TE4[x&0xFF]) << 24)
00172
00173 #define TeKeyMix2(x) TeKeyMix(ROTL(x, 8))
00174
00175 #else
00176
00177 #define Te0(x) TE0[x>>24]
00178 #define Te1(x) ROTR(TE0[(x>>16)&0xFF], 8)
00179 #define Te2(x) ROTR(TE0[(x>>8)&0xFF], 16)
00180 #define Te3(x) ROTR(TE0[x&0xFF], 24)
00181
00182 #define Te4_0(x)  ((uint32_t)TE4[x&0xFF])
00183 #define Te4_1(x)  ((uint32_t)TE4[(x>>8)&0xFF] << 8)
00184 #define Te4_2(x)  ((uint32_t)TE4[(x>>16)&0xFF] << 16)
00185 #define Te4_3(x)  ((uint32_t)TE4[x>>24] << 24)
00186
00187 #define TeKeyMix(x)  \
00188     ((TE4[(x>>16)&0xFF] << 24) ^ \
00189     (TE4[(x>>8)&0xFF] << 16) ^ \
00190     (TE4[x&0xFF] << 8) ^ \
00191     (TE4[x>>24]))
00192
00193 #define TeKeyMix2(x) TeKeyMix(ROTR(x, 8))
00194
00195 #define RCON(x)   (((uint32_t)rcon[x])<<24)
00196
00197 #endif
00198
00199
00200 /*****************************************************************************/
00201 // DECRYPTION TABLES
00202 /*****************************************************************************/
00203
00204 static const uint32_t TD0[256] =
00205 {
00206     be32_to_cpu(0x51f4a750UL), be32_to_cpu(0x7e416553UL), be32_to_cpu(0x1a17a4c3UL), be32_to_cpu(0x3a275e96UL),
00207     be32_to_cpu(0x3bab6bcbUL), be32_to_cpu(0x1f9d45f1UL), be32_to_cpu(0xacfa58abUL), be32_to_cpu(0x4be30393UL),
00208     be32_to_cpu(0x2030fa55UL), be32_to_cpu(0xad766df6UL), be32_to_cpu(0x88cc7691UL), be32_to_cpu(0xf5024c25UL),
00209     be32_to_cpu(0x4fe5d7fcUL), be32_to_cpu(0xc52acbd7UL), be32_to_cpu(0x26354480UL), be32_to_cpu(0xb562a38fUL),
00210     be32_to_cpu(0xdeb15a49UL), be32_to_cpu(0x25ba1b67UL), be32_to_cpu(0x45ea0e98UL), be32_to_cpu(0x5dfec0e1UL),
00211     be32_to_cpu(0xc32f7502UL), be32_to_cpu(0x814cf012UL), be32_to_cpu(0x8d4697a3UL), be32_to_cpu(0x6bd3f9c6UL),
00212     be32_to_cpu(0x038f5fe7UL), be32_to_cpu(0x15929c95UL), be32_to_cpu(0xbf6d7aebUL), be32_to_cpu(0x955259daUL),
00213     be32_to_cpu(0xd4be832dUL), be32_to_cpu(0x587421d3UL), be32_to_cpu(0x49e06929UL), be32_to_cpu(0x8ec9c844UL),
00214     be32_to_cpu(0x75c2896aUL), be32_to_cpu(0xf48e7978UL), be32_to_cpu(0x99583e6bUL), be32_to_cpu(0x27b971ddUL),
00215     be32_to_cpu(0xbee14fb6UL), be32_to_cpu(0xf088ad17UL), be32_to_cpu(0xc920ac66UL), be32_to_cpu(0x7dce3ab4UL),
00216     be32_to_cpu(0x63df4a18UL), be32_to_cpu(0xe51a3182UL), be32_to_cpu(0x97513360UL), be32_to_cpu(0x62537f45UL),
00217     be32_to_cpu(0xb16477e0UL), be32_to_cpu(0xbb6bae84UL), be32_to_cpu(0xfe81a01cUL), be32_to_cpu(0xf9082b94UL),
00218     be32_to_cpu(0x70486858UL), be32_to_cpu(0x8f45fd19UL), be32_to_cpu(0x94de6c87UL), be32_to_cpu(0x527bf8b7UL),
00219     be32_to_cpu(0xab73d323UL), be32_to_cpu(0x724b02e2UL), be32_to_cpu(0xe31f8f57UL), be32_to_cpu(0x6655ab2aUL),
00220     be32_to_cpu(0xb2eb2807UL), be32_to_cpu(0x2fb5c203UL), be32_to_cpu(0x86c57b9aUL), be32_to_cpu(0xd33708a5UL),
00221     be32_to_cpu(0x302887f2UL), be32_to_cpu(0x23bfa5b2UL), be32_to_cpu(0x02036abaUL), be32_to_cpu(0xed16825cUL),
00222     be32_to_cpu(0x8acf1c2bUL), be32_to_cpu(0xa779b492UL), be32_to_cpu(0xf307f2f0UL), be32_to_cpu(0x4e69e2a1UL),
00223     be32_to_cpu(0x65daf4cdUL), be32_to_cpu(0x0605bed5UL), be32_to_cpu(0xd134621fUL), be32_to_cpu(0xc4a6fe8aUL),
00224     be32_to_cpu(0x342e539dUL), be32_to_cpu(0xa2f355a0UL), be32_to_cpu(0x058ae132UL), be32_to_cpu(0xa4f6eb75UL),
00225     be32_to_cpu(0x0b83ec39UL), be32_to_cpu(0x4060efaaUL), be32_to_cpu(0x5e719f06UL), be32_to_cpu(0xbd6e1051UL),
00226     be32_to_cpu(0x3e218af9UL), be32_to_cpu(0x96dd063dUL), be32_to_cpu(0xdd3e05aeUL), be32_to_cpu(0x4de6bd46UL),
00227     be32_to_cpu(0x91548db5UL), be32_to_cpu(0x71c45d05UL), be32_to_cpu(0x0406d46fUL), be32_to_cpu(0x605015ffUL),
00228     be32_to_cpu(0x1998fb24UL), be32_to_cpu(0xd6bde997UL), be32_to_cpu(0x894043ccUL), be32_to_cpu(0x67d99e77UL),
00229     be32_to_cpu(0xb0e842bdUL), be32_to_cpu(0x07898b88UL), be32_to_cpu(0xe7195b38UL), be32_to_cpu(0x79c8eedbUL),
00230     be32_to_cpu(0xa17c0a47UL), be32_to_cpu(0x7c420fe9UL), be32_to_cpu(0xf8841ec9UL), be32_to_cpu(0x00000000UL),
00231     be32_to_cpu(0x09808683UL), be32_to_cpu(0x322bed48UL), be32_to_cpu(0x1e1170acUL), be32_to_cpu(0x6c5a724eUL),
00232     be32_to_cpu(0xfd0efffbUL), be32_to_cpu(0x0f853856UL), be32_to_cpu(0x3daed51eUL), be32_to_cpu(0x362d3927UL),
00233     be32_to_cpu(0x0a0fd964UL), be32_to_cpu(0x685ca621UL), be32_to_cpu(0x9b5b54d1UL), be32_to_cpu(0x24362e3aUL),
00234     be32_to_cpu(0x0c0a67b1UL), be32_to_cpu(0x9357e70fUL), be32_to_cpu(0xb4ee96d2UL), be32_to_cpu(0x1b9b919eUL),
00235     be32_to_cpu(0x80c0c54fUL), be32_to_cpu(0x61dc20a2UL), be32_to_cpu(0x5a774b69UL), be32_to_cpu(0x1c121a16UL),
00236     be32_to_cpu(0xe293ba0aUL), be32_to_cpu(0xc0a02ae5UL), be32_to_cpu(0x3c22e043UL), be32_to_cpu(0x121b171dUL),
00237     be32_to_cpu(0x0e090d0bUL), be32_to_cpu(0xf28bc7adUL), be32_to_cpu(0x2db6a8b9UL), be32_to_cpu(0x141ea9c8UL),
00238     be32_to_cpu(0x57f11985UL), be32_to_cpu(0xaf75074cUL), be32_to_cpu(0xee99ddbbUL), be32_to_cpu(0xa37f60fdUL),
00239     be32_to_cpu(0xf701269fUL), be32_to_cpu(0x5c72f5bcUL), be32_to_cpu(0x44663bc5UL), be32_to_cpu(0x5bfb7e34UL),
00240     be32_to_cpu(0x8b432976UL), be32_to_cpu(0xcb23c6dcUL), be32_to_cpu(0xb6edfc68UL), be32_to_cpu(0xb8e4f163UL),
00241     be32_to_cpu(0xd731dccaUL), be32_to_cpu(0x42638510UL), be32_to_cpu(0x13972240UL), be32_to_cpu(0x84c61120UL),
00242     be32_to_cpu(0x854a247dUL), be32_to_cpu(0xd2bb3df8UL), be32_to_cpu(0xaef93211UL), be32_to_cpu(0xc729a16dUL),
00243     be32_to_cpu(0x1d9e2f4bUL), be32_to_cpu(0xdcb230f3UL), be32_to_cpu(0x0d8652ecUL), be32_to_cpu(0x77c1e3d0UL),
00244     be32_to_cpu(0x2bb3166cUL), be32_to_cpu(0xa970b999UL), be32_to_cpu(0x119448faUL), be32_to_cpu(0x47e96422UL),
00245     be32_to_cpu(0xa8fc8cc4UL), be32_to_cpu(0xa0f03f1aUL), be32_to_cpu(0x567d2cd8UL), be32_to_cpu(0x223390efUL),
00246     be32_to_cpu(0x87494ec7UL), be32_to_cpu(0xd938d1c1UL), be32_to_cpu(0x8ccaa2feUL), be32_to_cpu(0x98d40b36UL),
00247     be32_to_cpu(0xa6f581cfUL), be32_to_cpu(0xa57ade28UL), be32_to_cpu(0xdab78e26UL), be32_to_cpu(0x3fadbfa4UL),
00248     be32_to_cpu(0x2c3a9de4UL), be32_to_cpu(0x5078920dUL), be32_to_cpu(0x6a5fcc9bUL), be32_to_cpu(0x547e4662UL),
00249     be32_to_cpu(0xf68d13c2UL), be32_to_cpu(0x90d8b8e8UL), be32_to_cpu(0x2e39f75eUL), be32_to_cpu(0x82c3aff5UL),
00250     be32_to_cpu(0x9f5d80beUL), be32_to_cpu(0x69d0937cUL), be32_to_cpu(0x6fd52da9UL), be32_to_cpu(0xcf2512b3UL),
00251     be32_to_cpu(0xc8ac993bUL), be32_to_cpu(0x10187da7UL), be32_to_cpu(0xe89c636eUL), be32_to_cpu(0xdb3bbb7bUL),
00252     be32_to_cpu(0xcd267809UL), be32_to_cpu(0x6e5918f4UL), be32_to_cpu(0xec9ab701UL), be32_to_cpu(0x834f9aa8UL),
00253     be32_to_cpu(0xe6956e65UL), be32_to_cpu(0xaaffe67eUL), be32_to_cpu(0x21bccf08UL), be32_to_cpu(0xef15e8e6UL),
00254     be32_to_cpu(0xbae79bd9UL), be32_to_cpu(0x4a6f36ceUL), be32_to_cpu(0xea9f09d4UL), be32_to_cpu(0x29b07cd6UL),
00255     be32_to_cpu(0x31a4b2afUL), be32_to_cpu(0x2a3f2331UL), be32_to_cpu(0xc6a59430UL), be32_to_cpu(0x35a266c0UL),
00256     be32_to_cpu(0x744ebc37UL), be32_to_cpu(0xfc82caa6UL), be32_to_cpu(0xe090d0b0UL), be32_to_cpu(0x33a7d815UL),
00257     be32_to_cpu(0xf104984aUL), be32_to_cpu(0x41ecdaf7UL), be32_to_cpu(0x7fcd500eUL), be32_to_cpu(0x1791f62fUL),
00258     be32_to_cpu(0x764dd68dUL), be32_to_cpu(0x43efb04dUL), be32_to_cpu(0xccaa4d54UL), be32_to_cpu(0xe49604dfUL),
00259     be32_to_cpu(0x9ed1b5e3UL), be32_to_cpu(0x4c6a881bUL), be32_to_cpu(0xc12c1fb8UL), be32_to_cpu(0x4665517fUL),
00260     be32_to_cpu(0x9d5eea04UL), be32_to_cpu(0x018c355dUL), be32_to_cpu(0xfa877473UL), be32_to_cpu(0xfb0b412eUL),
00261     be32_to_cpu(0xb3671d5aUL), be32_to_cpu(0x92dbd252UL), be32_to_cpu(0xe9105633UL), be32_to_cpu(0x6dd64713UL),
00262     be32_to_cpu(0x9ad7618cUL), be32_to_cpu(0x37a10c7aUL), be32_to_cpu(0x59f8148eUL), be32_to_cpu(0xeb133c89UL),
00263     be32_to_cpu(0xcea927eeUL), be32_to_cpu(0xb761c935UL), be32_to_cpu(0xe11ce5edUL), be32_to_cpu(0x7a47b13cUL),
00264     be32_to_cpu(0x9cd2df59UL), be32_to_cpu(0x55f2733fUL), be32_to_cpu(0x1814ce79UL), be32_to_cpu(0x73c737bfUL),
00265     be32_to_cpu(0x53f7cdeaUL), be32_to_cpu(0x5ffdaa5bUL), be32_to_cpu(0xdf3d6f14UL), be32_to_cpu(0x7844db86UL),
00266     be32_to_cpu(0xcaaff381UL), be32_to_cpu(0xb968c43eUL), be32_to_cpu(0x3824342cUL), be32_to_cpu(0xc2a3405fUL),
00267     be32_to_cpu(0x161dc372UL), be32_to_cpu(0xbce2250cUL), be32_to_cpu(0x283c498bUL), be32_to_cpu(0xff0d9541UL),
00268     be32_to_cpu(0x39a80171UL), be32_to_cpu(0x080cb3deUL), be32_to_cpu(0xd8b4e49cUL), be32_to_cpu(0x6456c190UL),
00269     be32_to_cpu(0x7bcb8461UL), be32_to_cpu(0xd532b670UL), be32_to_cpu(0x486c5c74UL), be32_to_cpu(0xd0b85742UL),
00270 };
00271
00272 static const uint8_t TD4[256] =
00273 {
00274     0x52, 0x09, 0x6a, 0xd5,
00275     0x30, 0x36, 0xa5, 0x38,
00276     0xbf, 0x40, 0xa3, 0x9e,
00277     0x81, 0xf3, 0xd7, 0xfb,
00278     0x7c, 0xe3, 0x39, 0x82,
00279     0x9b, 0x2f, 0xff, 0x87,
00280     0x34, 0x8e, 0x43, 0x44,
00281     0xc4, 0xde, 0xe9, 0xcb,
00282     0x54, 0x7b, 0x94, 0x32,
00283     0xa6, 0xc2, 0x23, 0x3d,
00284     0xee, 0x4c, 0x95, 0x0b,
00285     0x42, 0xfa, 0xc3, 0x4e,
00286     0x08, 0x2e, 0xa1, 0x66,
00287     0x28, 0xd9, 0x24, 0xb2,
00288     0x76, 0x5b, 0xa2, 0x49,
00289     0x6d, 0x8b, 0xd1, 0x25,
00290     0x72, 0xf8, 0xf6, 0x64,
00291     0x86, 0x68, 0x98, 0x16,
00292     0xd4, 0xa4, 0x5c, 0xcc,
00293     0x5d, 0x65, 0xb6, 0x92,
00294     0x6c, 0x70, 0x48, 0x50,
00295     0xfd, 0xed, 0xb9, 0xda,
00296     0x5e, 0x15, 0x46, 0x57,
00297     0xa7, 0x8d, 0x9d, 0x84,
00298     0x90, 0xd8, 0xab, 0x00,
00299     0x8c, 0xbc, 0xd3, 0x0a,
00300     0xf7, 0xe4, 0x58, 0x05,
00301     0xb8, 0xb3, 0x45, 0x06,
00302     0xd0, 0x2c, 0x1e, 0x8f,
00303     0xca, 0x3f, 0x0f, 0x02,
00304     0xc1, 0xaf, 0xbd, 0x03,
00305     0x01, 0x13, 0x8a, 0x6b,
00306     0x3a, 0x91, 0x11, 0x41,
00307     0x4f, 0x67, 0xdc, 0xea,
00308     0x97, 0xf2, 0xcf, 0xce,
00309     0xf0, 0xb4, 0xe6, 0x73,
00310     0x96, 0xac, 0x74, 0x22,
00311     0xe7, 0xad, 0x35, 0x85,
00312     0xe2, 0xf9, 0x37, 0xe8,
00313     0x1c, 0x75, 0xdf, 0x6e,
00314     0x47, 0xf1, 0x1a, 0x71,
00315     0x1d, 0x29, 0xc5, 0x89,
00316     0x6f, 0xb7, 0x62, 0x0e,
00317     0xaa, 0x18, 0xbe, 0x1b,
00318     0xfc, 0x56, 0x3e, 0x4b,
00319     0xc6, 0xd2, 0x79, 0x20,
00320     0x9a, 0xdb, 0xc0, 0xfe,
00321     0x78, 0xcd, 0x5a, 0xf4,
00322     0x1f, 0xdd, 0xa8, 0x33,
00323     0x88, 0x07, 0xc7, 0x31,
00324     0xb1, 0x12, 0x10, 0x59,
00325     0x27, 0x80, 0xec, 0x5f,
00326     0x60, 0x51, 0x7f, 0xa9,
00327     0x19, 0xb5, 0x4a, 0x0d,
00328     0x2d, 0xe5, 0x7a, 0x9f,
00329     0x93, 0xc9, 0x9c, 0xef,
00330     0xa0, 0xe0, 0x3b, 0x4d,
00331     0xae, 0x2a, 0xf5, 0xb0,
00332     0xc8, 0xeb, 0xbb, 0x3c,
00333     0x83, 0x53, 0x99, 0x61,
00334     0x17, 0x2b, 0x04, 0x7e,
00335     0xba, 0x77, 0xd6, 0x26,
00336     0xe1, 0x69, 0x14, 0x63,
00337     0x55, 0x21, 0x0c, 0x7d,
00338 };
00339
00340
00341 #if CPU_BYTE_ORDER == CPU_LITTLE_ENDIAN
00342
00343 #define XTd0(x) TD0[x]
00344 #define XTd1(x) ROTL(TD0[x], 8)
00345 #define XTd2(x) ROTL(TD0[x], 16)
00346 #define XTd3(x) ROTL(TD0[x], 24)
00347
00348 #define Td0(x)  XTd0(x&0xff)
00349 #define Td1(x)  XTd1((x>>8)&0xff)
00350 #define Td2(x)  XTd2((x>>16)&0xff)
00351 #define Td3(x)  XTd3(x>>24)
00352
00353 #define TdMix_0(x)  TE4[x&0xFF]
00354 #define TdMix_1(x)  TE4[(x>>8)&0xFF]
00355 #define TdMix_2(x)  TE4[(x>>16)&0xFF]
00356 #define TdMix_3(x)  TE4[x>>24]
00357
00358 #define Td4_0(x)  ((uint32_t)TD4[x&0xFF])
00359 #define Td4_1(x)  ((uint32_t)TD4[(x>>8)&0xFF] << 8)
00360 #define Td4_2(x)  ((uint32_t)TD4[(x>>16)&0xFF] << 16)
00361 #define Td4_3(x)  ((uint32_t)TD4[x>>24] << 24)
00362
00363 #else
00364
00365 #define XTd0(x) TD0[x]
00366 #define XTd1(x) ROTR(TD0[x], 8)
00367 #define XTd2(x) ROTR(TD0[x], 16)
00368 #define XTd3(x) ROTR(TD0[x], 24)
00369
00370 #define Td0(x)  XTd0(x>>24)
00371 #define Td1(x)  XTd1((x>>16)&0xff)
00372 #define Td2(x)  XTd2((x>>8)&0xff)
00373 #define Td3(x)  XTd3(x&0xff)
00374
00375 #define TdMix_0(x)  TE4[x>>24]
00376 #define TdMix_1(x)  TE4[(x>>16)&0xFF]
00377 #define TdMix_2(x)  TE4[(x>>8)&0xFF]
00378 #define TdMix_3(x)  TE4[x&0xFF]
00379
00380 #define Td4_0(x)  ((uint32_t)TD4[x>>24] << 24)
00381 #define Td4_1(x)  ((uint32_t)TD4[(x>>16)&0xFF] << 16)
00382 #define Td4_2(x)  ((uint32_t)TD4[(x>>8)&0xFF] << 8)
00383 #define Td4_3(x)  ((uint32_t)TD4[x&0xFF])
00384
00385 #endif
00386
00387
00388 /*****************************************************************************/
00389 // CODE
00390 /*****************************************************************************/
00391
00392 static void lazy_expandKeyEnc128(uint32_t *k)
00393 {
00394     int i = 0;
00395     while (1)
00396     {
00397         k[4] = k[0] ^ TeKeyMix(k[3]) ^ RCON(i);
00398         k[5] = k[1] ^ k[4];
00399         k[6] = k[2] ^ k[5];
00400         k[7] = k[3] ^ k[6];
00401         if (++i == 10)
00402            break;
00403         k += 4;
00404     }
00405 }
00406
00407 static void lazy_expandKeyEnc192(uint32_t *k)
00408 {
00409     int i = 0;
00410     while (1)
00411     {
00412         k[ 6] = k[ 0] ^ TeKeyMix(k[5]) ^ RCON(i);
00413         k[ 7] = k[ 1] ^ k[ 6];
00414         k[ 8] = k[ 2] ^ k[ 7];
00415         k[ 9] = k[ 3] ^ k[ 8];
00416         if (++i == 8)
00417             break;
00418         k[10] = k[ 4] ^ k[ 9];
00419         k[11] = k[ 5] ^ k[10];
00420         k += 6;
00421     }
00422 }
00423
00424 static void lazy_expandKeyEnc256(uint32_t *k)
00425 {
00426     int i = 0;
00427     for (;;)
00428     {
00429         k[ 8] = k[ 0] ^ TeKeyMix(k[7]) ^ RCON(i);
00430         k[ 9] = k[ 1] ^ k[ 8];
00431         k[10] = k[ 2] ^ k[ 9];
00432         k[11] = k[ 3] ^ k[10];
00433         if (++i == 7)
00434             break;
00435         k[12] = k[ 4] ^ TeKeyMix2(k[11]);
00436         k[13] = k[ 5] ^ k[12];
00437         k[14] = k[ 6] ^ k[13];
00438         k[15] = k[ 7] ^ k[14];
00439         k += 8;
00440     }
00441 }
00442
00443 typedef void (*lazy_expand_handler)(uint32_t *);
00444
00445 static const lazy_expand_handler lazy_expandKeyEnc[3] =
00446 {
00447     lazy_expandKeyEnc128, lazy_expandKeyEnc192, lazy_expandKeyEnc256,
00448 };
00449
00450 static void lazy_expandKeyDec(uint32_t *k, int len)
00451 {
00452     k += len-5;
00453     for (int i=0;i<len-8;++i)
00454     {
00455         k[0] = XTd0(TdMix_0(k[0])) ^ XTd1(TdMix_1(k[0])) ^ XTd2(TdMix_2(k[0])) ^ XTd3(TdMix_3(k[0]));
00456         --k;
00457     }
00458 }
00459
00460 static void AES_expandKey(BlockCipher *c_, const void *key, size_t len)
00461 {
00462     AES_Context *c = (AES_Context *)c_;
00463     ASSERT(len == c->c.key_len);
00464
00465     memcpy (c->expkey, key, c->c.key_len);
00466     c->key_status = 0;
00467 }
00468
00469 static void AES_encrypt(BlockCipher *c_, void *block)
00470 {
00471     AES_Context *c = (AES_Context *)c_;
00472     uint32_t *k = c->expkey;
00473     uint32_t t0, t1, t2, t3, s0, s1, s2, s3;
00474     int Nr = c->num_rounds;
00475
00476     if (c->key_status <= 0)
00477     {
00478         lazy_expandKeyEnc[(Nr-10U)/2](k);
00479         c->key_status = 1;
00480     }
00481
00482     s0 = ((uint32_t*)block)[0];
00483     s1 = ((uint32_t*)block)[1];
00484     s2 = ((uint32_t*)block)[2];
00485     s3 = ((uint32_t*)block)[3];
00486
00487     s0 ^= k[0];
00488     s1 ^= k[1];
00489     s2 ^= k[2];
00490     s3 ^= k[3];
00491
00492     int r = 0;
00493     while (1)
00494     {
00495         k += 4;
00496         t0 = Te0(s0)^Te1(s1)^Te2(s2)^Te3(s3)^k[0];
00497         t1 = Te0(s1)^Te1(s2)^Te2(s3)^Te3(s0)^k[1];
00498         t2 = Te0(s2)^Te1(s3)^Te2(s0)^Te3(s1)^k[2];
00499         t3 = Te0(s3)^Te1(s0)^Te2(s1)^Te3(s2)^k[3];
00500         if (r == Nr-2)
00501             break;
00502         s0 = t0; s1 = t1; s2 = t2; s3 = t3;
00503         ++r;
00504     }
00505     k += 4;
00506
00507     s0 = Te4_3(t0)^Te4_2(t1)^Te4_1(t2)^Te4_0(t3)^k[0];
00508     s1 = Te4_3(t1)^Te4_2(t2)^Te4_1(t3)^Te4_0(t0)^k[1];
00509     s2 = Te4_3(t2)^Te4_2(t3)^Te4_1(t0)^Te4_0(t1)^k[2];
00510     s3 = Te4_3(t3)^Te4_2(t0)^Te4_1(t1)^Te4_0(t2)^k[3];
00511
00512     ((uint32_t*)block)[0] = s0;
00513     ((uint32_t*)block)[1] = s1;
00514     ((uint32_t*)block)[2] = s2;
00515     ((uint32_t*)block)[3] = s3;
00516 }
00517
00518
00519 static void AES_decrypt(BlockCipher *c_, void *block)
00520 {
00521     AES_Context *c = (AES_Context *)c_;
00522     uint32_t *k = c->expkey;
00523     uint32_t t0, t1, t2, t3, s0, s1, s2, s3;
00524     uint8_t Nr = c->num_rounds;
00525     int klen = (Nr+1)*4;
00526
00527     if (c->key_status >= 0)
00528     {
00529         if (c->key_status == 0)
00530             lazy_expandKeyEnc[(Nr-10U)/2](k);
00531         lazy_expandKeyDec(k, klen);
00532         c->key_status = -1;
00533     }
00534
00535     k += klen-4;
00536
00537     s0 = ((uint32_t*)block)[0] ^ k[0];
00538     s1 = ((uint32_t*)block)[1] ^ k[1];
00539     s2 = ((uint32_t*)block)[2] ^ k[2];
00540     s3 = ((uint32_t*)block)[3] ^ k[3];
00541
00542     int r = 0;
00543     while (1)
00544     {
00545         k -= 4;
00546
00547         t0 = Td0(s0)^Td1(s3)^Td2(s2)^Td3(s1)^k[0];
00548         t1 = Td0(s1)^Td1(s0)^Td2(s3)^Td3(s2)^k[1];
00549         t2 = Td0(s2)^Td1(s1)^Td2(s0)^Td3(s3)^k[2];
00550         t3 = Td0(s3)^Td1(s2)^Td2(s1)^Td3(s0)^k[3];
00551
00552         if (r == Nr-2)
00553             break;
00554         s0 = t0; s1 = t1; s2 = t2; s3 = t3;
00555         ++r;
00556     }
00557
00558     k -= 4;
00559     s0 = Td4_0(t0)^Td4_1(t3)^Td4_2(t2)^Td4_3(t1)^k[0];
00560     s1 = Td4_0(t1)^Td4_1(t0)^Td4_2(t3)^Td4_3(t2)^k[1];
00561     s2 = Td4_0(t2)^Td4_1(t1)^Td4_2(t0)^Td4_3(t3)^k[2];
00562     s3 = Td4_0(t3)^Td4_1(t2)^Td4_2(t1)^Td4_3(t0)^k[3];
00563
00564     ((uint32_t*)block)[0] = s0;
00565     ((uint32_t*)block)[1] = s1;
00566     ((uint32_t*)block)[2] = s2;
00567     ((uint32_t*)block)[3] = s3;
00568 }


BeRTOS: afsk.c File Reference

  • net
Defines | Functions | Variables
afsk.c File Reference

AFSK1200 modem. More...

#include "afsk.h"
#include <net/ax25.h>
#include "cfg/cfg_afsk.h"
#include "hw/hw_afsk.h"
#include <drv/timer.h>
#include <cfg/module.h>
#include <cfg/log.h>
#include <cpu/power.h>
#include <cpu/pgm.h>
#include <struct/fifobuf.h>
#include <string.h>

Go to the source code of this file.

Defines

#define | SIN_LEN 512
Full wave length.

Functions

uint8_t | sin_sample (uint16_t idx)
Given the index, this function computes the correct sine sample based only on the first quarter of wave.
static bool | hdlc_parse (Hdlc *hdlc, bool bit, FIFOBuffer *fifo)
High-Level Data Link Control parsing function.
void | afsk_adc_isr (Afsk *af, int8_t curr_sample)
ADC ISR callback.
uint8_t | afsk_dac_isr (Afsk *af)
DAC ISR callback.
void | afsk_init (Afsk *af, int adc_ch, int dac_ch)
Initialize an AFSK1200 modem.

Variables

static const uint8_t PROGMEM | sin_table []
Sine table for the first quarter of wave.

Detailed Description

AFSK1200 modem.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file afsk.c.

Function Documentation

void afsk_adc_isr | ( | Afsk * | af,
 |  | int8_t | curr_sample
 | ) |  |

ADC ISR callback.

This function has to be called by the ADC ISR when a sample of the configured channel is available.

Parameters:
af | Afsk context to operate on.
curr_sample | current sample from the ADC.

Definition at line 210 of file afsk.c.

uint8_t afsk_dac_isr ( Afsk * af )

DAC ISR callback.

This function has to be called by the DAC ISR when a sample of the configured channel has been converted out.

Parameters:
af Afsk context to operate on.
Returns:
The next DAC output sample.

Definition at line 342 of file afsk.c.

void afsk_init | ( | Afsk * | af,
 |  | int | adc_ch,
 |  | int | dac_ch
 | ) |  |

Initialize an AFSK1200 modem.

Parameters:
af | Afsk context to operate on.
adc_ch | ADC channel used by the demodulator.
dac_ch | DAC channel used by the modulator.

Definition at line 537 of file afsk.c.

static bool hdlc_parse | ( | Hdlc * | hdlc,
 |  | bool | bit,
 |  | FIFOBuffer * | fifo
 | ) |  | [static]

High-Level Data Link Control parsing function.

Parse bitstream in order to find characters.

Parameters:
hdlc | HDLC context.
bit | current bit to be parsed.
fifo | FIFO buffer used to push characters.
Returns:
true if all is ok, false if the fifo is full.

Definition at line 127 of file afsk.c.

Variable Documentation

const uint8_t PROGMEM sin_table[] [static]
Initial value:
{
    128, 129, 131, 132, 134, 135, 137, 138, 140, 142, 143, 145, 146, 148, 149, 151,
    152, 154, 155, 157, 158, 160, 162, 163, 165, 166, 167, 169, 170, 172, 173, 175,
    176, 178, 179, 181, 182, 183, 185, 186, 188, 189, 190, 192, 193, 194, 196, 197,
    198, 200, 201, 202, 203, 205, 206, 207, 208, 210, 211, 212, 213, 214, 215, 217,
    218, 219, 220, 221, 222, 223, 224, 225, 226, 227, 228, 229, 230, 231, 232, 233,
    234, 234, 235, 236, 237, 238, 238, 239, 240, 241, 241, 242, 243, 243, 244, 245,
    245, 246, 246, 247, 248, 248, 249, 249, 250, 250, 250, 251, 251, 252, 252, 252,
    253, 253, 253, 253, 254, 254, 254, 254, 254, 255, 255, 255, 255, 255, 255, 255,
}

Sine table for the first quarter of wave.

The rest of the wave is computed from this first quarter. This table is used to generate the modulated data.

Definition at line 81 of file afsk.c.


BeRTOS: afsk.c Source File

  • net
afsk.c
Go to the documentation of this file.
00001
00038 #include "afsk.h"
00039 #include <net/ax25.h>
00040
00041 #include "cfg/cfg_afsk.h"
00042 #include "hw/hw_afsk.h"
00043
00044 #include <drv/timer.h>
00045
00046 #include <cfg/module.h>
00047
00048 #define LOG_LEVEL   AFSK_LOG_LEVEL
00049 #define LOG_FORMAT  AFSK_LOG_FORMAT
00050 #include <cfg/log.h>
00051
00052 #include <cpu/power.h>
00053 #include <cpu/pgm.h>
00054 #include <struct/fifobuf.h>
00055
00056 #include <string.h> /* memset */
00057
00058 #define PHASE_BIT    8
00059 #define PHASE_INC    1
00060
00061 #define PHASE_MAX    (SAMPLEPERBIT * PHASE_BIT)
00062 #define PHASE_THRES  (PHASE_MAX / 2) // - PHASE_BIT / 2)
00063
00064 // Modulator constants
00065 #define MARK_FREQ  1200
00066 #define MARK_INC   (uint16_t)(DIV_ROUND(SIN_LEN * (uint32_t)MARK_FREQ, CONFIG_AFSK_DAC_SAMPLERATE))
00067
00068 #define SPACE_FREQ 2200
00069 #define SPACE_INC  (uint16_t)(DIV_ROUND(SIN_LEN * (uint32_t)SPACE_FREQ, CONFIG_AFSK_DAC_SAMPLERATE))
00070
00071 //Ensure sample rate is a multiple of bit rate
00072 STATIC_ASSERT(!(CONFIG_AFSK_DAC_SAMPLERATE % BITRATE));
00073
00074 #define DAC_SAMPLEPERBIT (CONFIG_AFSK_DAC_SAMPLERATE / BITRATE)
00075
00081 static const uint8_t PROGMEM sin_table[] =
00082 {
00083     128, 129, 131, 132, 134, 135, 137, 138, 140, 142, 143, 145, 146, 148, 149, 151,
00084     152, 154, 155, 157, 158, 160, 162, 163, 165, 166, 167, 169, 170, 172, 173, 175,
00085     176, 178, 179, 181, 182, 183, 185, 186, 188, 189, 190, 192, 193, 194, 196, 197,
00086     198, 200, 201, 202, 203, 205, 206, 207, 208, 210, 211, 212, 213, 214, 215, 217,
00087     218, 219, 220, 221, 222, 223, 224, 225, 226, 227, 228, 229, 230, 231, 232, 233,
00088     234, 234, 235, 236, 237, 238, 238, 239, 240, 241, 241, 242, 243, 243, 244, 245,
00089     245, 246, 246, 247, 248, 248, 249, 249, 250, 250, 250, 251, 251, 252, 252, 252,
00090     253, 253, 253, 253, 254, 254, 254, 254, 254, 255, 255, 255, 255, 255, 255, 255,
00091 };
00092
00093 #define SIN_LEN 512 ///< Full wave length
00094
00095 STATIC_ASSERT(sizeof(sin_table) == SIN_LEN / 4);
00096
00097
00102 INLINE uint8_t sin_sample(uint16_t idx)
00103 {
00104     ASSERT(idx < SIN_LEN);
00105     uint16_t new_idx = idx % (SIN_LEN / 2);
00106     new_idx = (new_idx >= (SIN_LEN / 4)) ? (SIN_LEN / 2 - new_idx - 1) : new_idx;
00107
00108     uint8_t data = pgm_read8(&sin_table[new_idx]);
00109
00110     return (idx >= (SIN_LEN / 2)) ? (255 - data) : data;
00111 }
00112
00113
00114 #define BIT_DIFFER(bitline1, bitline2) (((bitline1) ^ (bitline2)) & 0x01)
00115 #define EDGE_FOUND(bitline)            BIT_DIFFER((bitline), (bitline) >> 1)
00116
00127 static bool hdlc_parse(Hdlc *hdlc, bool bit, FIFOBuffer *fifo)
00128 {
00129     bool ret = true;
00130
00131     hdlc->demod_bits <<= 1;
00132     hdlc->demod_bits |= bit ? 1 : 0;
00133
00134     /* HDLC Flag */
00135     if (hdlc->demod_bits == HDLC_FLAG)
00136     {
00137         if (!fifo_isfull(fifo))
00138         {
00139             fifo_push(fifo, HDLC_FLAG);
00140             hdlc->rxstart = true;
00141         }
00142         else
00143         {
00144             ret = false;
00145             hdlc->rxstart = false;
00146         }
00147
00148         hdlc->currchar = 0;
00149         hdlc->bit_idx = 0;
00150         return ret;
00151     }
00152
00153     /* Reset */
00154     if ((hdlc->demod_bits & HDLC_RESET) == HDLC_RESET)
00155     {
00156         hdlc->rxstart = false;
00157         return ret;
00158     }
00159
00160     if (!hdlc->rxstart)
00161         return ret;
00162
00163     /* Stuffed bit */
00164     if ((hdlc->demod_bits & 0x3f) == 0x3e)
00165         return ret;
00166
00167     if (hdlc->demod_bits & 0x01)
00168         hdlc->currchar |= 0x80;
00169
00170     if (++hdlc->bit_idx >= 8)
00171     {
00172         if ((hdlc->currchar == HDLC_FLAG
00173             || hdlc->currchar == HDLC_RESET
00174             || hdlc->currchar == AX25_ESC))
00175         {
00176             if (!fifo_isfull(fifo))
00177                 fifo_push(fifo, AX25_ESC);
00178             else
00179             {
00180                 hdlc->rxstart = false;
00181                 ret = false;
00182             }
00183         }
00184
00185         if (!fifo_isfull(fifo))
00186             fifo_push(fifo, hdlc->currchar);
00187         else
00188         {
00189             hdlc->rxstart = false;
00190             ret = false;
00191         }
00192
00193         hdlc->currchar = 0;
00194         hdlc->bit_idx = 0;
00195     }
00196     else
00197         hdlc->currchar >>= 1;
00198
00199     return ret;
00200 }
00201
00202
00210 void afsk_adc_isr(Afsk *af, int8_t curr_sample)
00211 {
00212     AFSK_STROBE_ON();
00213
00214     /*
00215      * Frequency discriminator and LP IIR filter.
00216      * This filter is designed to work
00217      * at the given sample rate and bit rate.
00218      */
00219     STATIC_ASSERT(SAMPLERATE == 9600);
00220     STATIC_ASSERT(BITRATE == 1200);
00221
00222     /*
00223      * Frequency discrimination is achieved by simply multiplying
00224      * the sample with a delayed sample of (samples per bit) / 2.
00225      * Then the signal is lowpass filtered with a first order,
00226      * 600 Hz filter. The filter implementation is selectable
00227      * through the CONFIG_AFSK_FILTER config variable.
00228      */
00229
00230     af->iir_x[0] = af->iir_x[1];
00231
00232     #if (CONFIG_AFSK_FILTER == AFSK_BUTTERWORTH)
00233         af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) >> 2;
00234         //af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) / 6.027339492;
00235     #elif (CONFIG_AFSK_FILTER == AFSK_CHEBYSHEV)
00236         af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) >> 2;
00237         //af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) / 3.558147322;
00238     #else
00239         #error Filter type not found!
00240     #endif
00241
00242     af->iir_y[0] = af->iir_y[1];
00243
00244     #if CONFIG_AFSK_FILTER == AFSK_BUTTERWORTH
00245         /*
00246          * This strange sum + shift is an optimization for af->iir_y[0] * 0.668.
00247          * iir * 0.668 ~= (iir * 21) / 32 =
00248          * = (iir * 16) / 32 + (iir * 4) / 32 + iir / 32 =
00249          * = iir / 2 + iir / 8 + iir / 32 =
00250          * = iir >> 1 + iir >> 3 + iir >> 5
00251          */
00252         af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + (af->iir_y[0] >> 1) + (af->iir_y[0] >> 3) + (af->iir_y[0] >> 5);
00253         //af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + af->iir_y[0] * 0.6681786379;
00254     #elif CONFIG_AFSK_FILTER == AFSK_CHEBYSHEV
00255         /*
00256          * This should be (af->iir_y[0] * 0.438) but
00257          * (af->iir_y[0] >> 1) is a faster approximation :-)
00258          */
00259         af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + (af->iir_y[0] >> 1);
00260         //af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + af->iir_y[0] * 0.4379097269;
00261     #endif
00262
00263     /* Save this sampled bit in a delay line */
00264     af->sampled_bits <<= 1;
00265     af->sampled_bits |= (af->iir_y[1] > 0) ? 1 : 0;
00266
00267     /* Store current ADC sample in the af->delay_fifo */
00268     fifo_push(&af->delay_fifo, curr_sample);
00269
00270     /* If there is an edge, adjust phase sampling */
00271     if (EDGE_FOUND(af->sampled_bits))
00272     {
00273         if (af->curr_phase < PHASE_THRES)
00274             af->curr_phase += PHASE_INC;
00275         else
00276             af->curr_phase -= PHASE_INC;
00277     }
00278     af->curr_phase += PHASE_BIT;
00279
00280     /* sample the bit */
00281     if (af->curr_phase >= PHASE_MAX)
00282     {
00283         af->curr_phase %= PHASE_MAX;
00284
00285         /* Shift 1 position in the shift register of the found bits */
00286         af->found_bits <<= 1;
00287
00288         /*
00289          * Determine bit value by reading the last 3 sampled bits.
00290          * If the number of ones is two or greater, the bit value is a 1,
00291          * otherwise is a 0.
00292          * This algorithm presumes that there are 8 samples per bit.
00293          */
00294         STATIC_ASSERT(SAMPLEPERBIT == 8);
00295         uint8_t bits = af->sampled_bits & 0x07;
00296         if (bits == 0x07 // 111, 3 bits set to 1
00297          || bits == 0x06 // 110, 2 bits
00298          || bits == 0x05 // 101, 2 bits
00299          || bits == 0x03 // 011, 2 bits
00300         )
00301             af->found_bits |= 1;
00302
00303         /*
00304          * NRZI coding: if 2 consecutive bits have the same value
00305          * a 1 is received, otherwise it's a 0.
00306          */
00307         if (!hdlc_parse(&af->hdlc, !EDGE_FOUND(af->found_bits), &af->rx_fifo))
00308             af->status |= AFSK_RXFIFO_OVERRUN;
00309     }
00310
00311
00312     AFSK_STROBE_OFF();
00313 }
00314
00315 static void afsk_txStart(Afsk *af)
00316 {
00317     if (!af->sending)
00318     {
00319         af->phase_inc = MARK_INC;
00320         af->phase_acc = 0;
00321         af->stuff_cnt = 0;
00322         af->sending = true;
00323         af->preamble_len = DIV_ROUND(CONFIG_AFSK_PREAMBLE_LEN * BITRATE, 8000);
00324         AFSK_DAC_IRQ_START(af->dac_ch);
00325     }
00326     ATOMIC(af->trailer_len  = DIV_ROUND(CONFIG_AFSK_TRAILER_LEN  * BITRATE, 8000));
00327 }
00328
00329 #define BIT_STUFF_LEN 5
00330
00331 #define SWITCH_TONE(inc)  (((inc) == MARK_INC) ? SPACE_INC : MARK_INC)
00332
00342 uint8_t afsk_dac_isr(Afsk *af)
00343 {
00344     AFSK_STROBE_ON();
00345
00346     /* Check if we are at a start of a sample cycle */
00347     if (af->sample_count == 0)
00348     {
00349         if (af->tx_bit == 0)
00350         {
00351             /* We have just finished transimitting a char, get a new one. */
00352             if (fifo_isempty(&af->tx_fifo) && af->trailer_len == 0)
00353             {
00354                 AFSK_DAC_IRQ_STOP(af->dac_ch);
00355                 af->sending = false;
00356                 AFSK_STROBE_OFF();
00357                 return 0;
00358             }
00359             else
00360             {
00361                 /*
00362                  * If we have just finished sending an unstuffed byte,
00363                  * reset bitstuff counter.
00364                  */
00365                 if (!af->bit_stuff)
00366                     af->stuff_cnt = 0;
00367
00368                 af->bit_stuff = true;
00369
00370                 /*
00371                  * Handle preamble and trailer
00372                  */
00373                 if (af->preamble_len == 0)
00374                 {
00375                     if (fifo_isempty(&af->tx_fifo))
00376                     {
00377                         af->trailer_len--;
00378                         af->curr_out = HDLC_FLAG;
00379                     }
00380                     else
00381                         af->curr_out = fifo_pop(&af->tx_fifo);
00382                 }
00383                 else
00384                 {
00385                     af->preamble_len--;
00386                     af->curr_out = HDLC_FLAG;
00387                 }
00388
00389                 /* Handle char escape */
00390                 if (af->curr_out == AX25_ESC)
00391                 {
00392                     if (fifo_isempty(&af->tx_fifo))
00393                     {
00394                         AFSK_DAC_IRQ_STOP(af->dac_ch);
00395                         af->sending = false;
00396                         AFSK_STROBE_OFF();
00397                         return 0;
00398                     }
00399                     else
00400                         af->curr_out = fifo_pop(&af->tx_fifo);
00401                 }
00402                 else if (af->curr_out == HDLC_FLAG || af->curr_out == HDLC_RESET)
00403                     /* If these chars are not escaped disable bit stuffing */
00404                     af->bit_stuff = false;
00405             }
00406             /* Start with LSB mask */
00407             af->tx_bit = 0x01;
00408         }
00409
00410         /* check for bit stuffing */
00411         if (af->bit_stuff && af->stuff_cnt >= BIT_STUFF_LEN)
00412         {
00413             /* If there are more than 5 ones in a row insert a 0 */
00414             af->stuff_cnt = 0;
00415             /* switch tone */
00416             af->phase_inc = SWITCH_TONE(af->phase_inc);
00417         }
00418         else
00419         {
00420             /*
00421              * NRZI: if we want to transmit a 1 the modulated frequency will stay
00422              * unchanged; with a 0, there will be a change in the tone.
00423              */
00424             if (af->curr_out & af->tx_bit)
00425             {
00426                 /*
00427                  * Transmit a 1:
00428                  * - Stay on the previous tone
00429                  * - Increase bit stuff counter
00430                  */
00431                 af->stuff_cnt++;
00432             }
00433             else
00434             {
00435                 /*
00436                  * Transmit a 0:
00437                  * - Reset bit stuff counter
00438                  * - Switch tone
00439                  */
00440                 af->stuff_cnt = 0;
00441                 af->phase_inc = SWITCH_TONE(af->phase_inc);
00442             }
00443
00444             /* Go to the next bit */
00445             af->tx_bit <<= 1;
00446         }
00447         af->sample_count = DAC_SAMPLEPERBIT;
00448     }
00449
00450     /* Get new sample and put it out on the DAC */
00451     af->phase_acc += af->phase_inc;
00452     af->phase_acc %= SIN_LEN;
00453
00454     af->sample_count--;
00455     AFSK_STROBE_OFF();
00456     return sin_sample(af->phase_acc);
00457 }
00458
00459
00460 static size_t afsk_read(KFile *fd, void *_buf, size_t size)
00461 {
00462     Afsk *af = AFSK_CAST(fd);
00463     uint8_t *buf = (uint8_t *)_buf;
00464
00465     #if CONFIG_AFSK_RXTIMEOUT == 0
00466     while (size-- && !fifo_isempty_locked(&af->rx_fifo))
00467     #else
00468     while (size--)
00469     #endif
00470     {
00471         #if CONFIG_AFSK_RXTIMEOUT != -1
00472         ticks_t start = timer_clock();
00473         #endif
00474
00475         while (fifo_isempty_locked(&af->rx_fifo))
00476         {
00477             cpu_relax();
00478             #if CONFIG_AFSK_RXTIMEOUT != -1
00479             if (timer_clock() - start > ms_to_ticks(CONFIG_AFSK_RXTIMEOUT))
00480                 return buf - (uint8_t *)_buf;
00481             #endif
00482         }
00483
00484         *buf++ = fifo_pop_locked(&af->rx_fifo);
00485     }
00486
00487     return buf - (uint8_t *)_buf;
00488 }
00489
00490 static size_t afsk_write(KFile *fd, const void *_buf, size_t size)
00491 {
00492     Afsk *af = AFSK_CAST(fd);
00493     const uint8_t *buf = (const uint8_t *)_buf;
00494
00495     while (size--)
00496     {
00497         while (fifo_isfull_locked(&af->tx_fifo))
00498             cpu_relax();
00499
00500         fifo_push_locked(&af->tx_fifo, *buf++);
00501         afsk_txStart(af);
00502     }
00503
00504     return buf - (const uint8_t *)_buf;
00505 }
00506
00507 static int afsk_flush(KFile *fd)
00508 {
00509     Afsk *af = AFSK_CAST(fd);
00510     while (af->sending)
00511         cpu_relax();
00512     return 0;
00513 }
00514
00515 static int afsk_error(KFile *fd)
00516 {
00517     Afsk *af = AFSK_CAST(fd);
00518     int err;
00519
00520     ATOMIC(err = af->status);
00521     return err;
00522 }
00523
00524 static void afsk_clearerr(KFile *fd)
00525 {
00526     Afsk *af = AFSK_CAST(fd);
00527     ATOMIC(af->status = 0);
00528 }
00529
00530
00537 void afsk_init(Afsk *af, int adc_ch, int dac_ch)
00538 {
00539     #if CONFIG_AFSK_RXTIMEOUT != -1
00540     MOD_CHECK(timer);
00541     #endif
00542     memset(af, 0, sizeof(*af));
00543     af->adc_ch = adc_ch;
00544     af->dac_ch = dac_ch;
00545
00546     fifo_init(&af->delay_fifo, (uint8_t *)af->delay_buf, sizeof(af->delay_buf));
00547     fifo_init(&af->rx_fifo, af->rx_buf, sizeof(af->rx_buf));
00548
00549     /* Fill sample FIFO with 0 */
00550     for (int i = 0; i < SAMPLEPERBIT / 2; i++)
00551         fifo_push(&af->delay_fifo, 0);
00552
00553     fifo_init(&af->tx_fifo, af->tx_buf, sizeof(af->tx_buf));
00554
00555     AFSK_ADC_INIT(adc_ch, af);
00556     AFSK_DAC_INIT(dac_ch, af);
00557     AFSK_STROBE_INIT();
00558     LOG_INFO("MARK_INC %d, SPACE_INC %d\n", MARK_INC, SPACE_INC);
00559
00560     DB(af->fd._type = KFT_AFSK);
00561     af->fd.write = afsk_write;
00562     af->fd.read = afsk_read;
00563     af->fd.flush = afsk_flush;
00564     af->fd.error = afsk_error;
00565     af->fd.clearerr = afsk_clearerr;
00566     af->phase_inc = MARK_INC;
00567 }


BeRTOS: afsk.h File Reference

  • net
Data Structures | Defines | Functions
afsk.h File Reference

AFSK1200 modem. More...

#include "cfg/cfg_afsk.h"
#include "hw/hw_afsk.h"
#include <cfg/compiler.h>
#include <io/kfile.h>
#include <struct/fifobuf.h>

Go to the source code of this file.

Data Structures

struct | Hdlc
HDLC (High-Level Data Link Control) context. More...
struct | Afsk
AFSK1200 modem context. More...

Defines

#define | SAMPLERATE 9600
ADC sample rate.
#define | BITRATE 1200
Bitrate of the received/transmitted data.
#define | AFSK_RXFIFO_OVERRUN BV(0)
RX FIFO buffer full error.
Afsk filter types.
#define | AFSK_BUTTERWORTH 0
#define | AFSK_CHEBYSHEV 1

Functions

void | afsk_adc_isr (Afsk *af, int8_t sample)
ADC ISR callback.
uint8_t | afsk_dac_isr (Afsk *af)
DAC ISR callback.
void | afsk_init (Afsk *af, int adc_ch, int dac_ch)
Initialize an AFSK1200 modem.

Detailed Description

AFSK1200 modem.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file afsk.h.

Define Documentation

#define BITRATE 1200

Bitrate of the received/transmitted data.

The demodulator filters and decoderes are designed to work at this frequency. If you need to change this remember to update afsk_adc_isr().

Definition at line 69 of file afsk.h.

#define SAMPLERATE 9600

ADC sample rate.

The demodulator filters are designed to work at this frequency. If you need to change this remember to update afsk_adc_isr().

Definition at line 62 of file afsk.h.

Function Documentation

void afsk_adc_isr | ( | Afsk * | af,
 |  | int8_t | curr_sample
 | ) |  |

ADC ISR callback.

This function has to be called by the ADC ISR when a sample of the configured channel is available.

Parameters:
af | Afsk context to operate on.
curr_sample | current sample from the ADC.

Definition at line 210 of file afsk.c.

uint8_t afsk_dac_isr ( Afsk * af )

DAC ISR callback.

This function has to be called by the DAC ISR when a sample of the configured channel has been converted out.

Parameters:
af Afsk context to operate on.
Returns:
The next DAC output sample.

Definition at line 342 of file afsk.c.

void afsk_init | ( | Afsk * | af,
 |  | int | adc_ch,
 |  | int | dac_ch
 | ) |  |

Initialize an AFSK1200 modem.

Parameters:
af | Afsk context to operate on.
adc_ch | ADC channel used by the demodulator.
dac_ch | DAC channel used by the modulator.

Definition at line 537 of file afsk.c.


BeRTOS: afsk.h Source File

  • net
afsk.h
Go to the documentation of this file.
00001
00043 #ifndef NET_AFSK_H
00044 #define NET_AFSK_H
00045
00046 #include "cfg/cfg_afsk.h"
00047 #include "hw/hw_afsk.h"
00048
00049 #include <cfg/compiler.h>
00050
00051 #include <io/kfile.h>
00052
00053 #include <struct/fifobuf.h>
00054
00055
00056
00062 #define SAMPLERATE 9600
00063
00069 #define BITRATE    1200
00070
00071 #define SAMPLEPERBIT (SAMPLERATE / BITRATE)
00072
00077 typedef struct Hdlc
00078 {
00079     uint8_t demod_bits;
00080     uint8_t bit_idx;
00081     uint8_t currchar;
00082     bool rxstart;
00083 } Hdlc;
00084
00088 #define AFSK_RXFIFO_OVERRUN BV(0)
00089
00093 typedef struct Afsk
00094 {
00096     KFile fd;
00097
00099     int adc_ch;
00100
00102     int dac_ch;
00103
00105     uint8_t sample_count;
00106
00108     uint8_t curr_out;
00109
00111     uint8_t tx_bit;
00112
00114     bool bit_stuff;
00115
00117     uint8_t stuff_cnt;
00121     uint16_t phase_acc;
00122
00124     uint16_t phase_inc;
00125
00127     FIFOBuffer delay_fifo;
00128
00134     int8_t delay_buf[SAMPLEPERBIT / 2 + 1];
00135
00137     FIFOBuffer rx_fifo;
00138
00140     uint8_t rx_buf[CONFIG_AFSK_RX_BUFLEN];
00141
00143     FIFOBuffer tx_fifo;
00144
00146     uint8_t tx_buf[CONFIG_AFSK_TX_BUFLEN];
00147
00149     int16_t iir_x[2];
00150
00152     int16_t iir_y[2];
00153
00159     uint8_t sampled_bits;
00160
00165     int8_t curr_phase;
00166
00168     uint8_t found_bits;
00169
00171     volatile bool sending;
00172
00177     volatile int status;
00178
00180     Hdlc hdlc;
00181
00188     uint16_t preamble_len;
00189
00196     uint16_t trailer_len;
00197 } Afsk;
00198
00199 #define KFT_AFSK MAKE_ID('A', 'F', 'S', 'K')
00200
00201 INLINE Afsk *AFSK_CAST(KFile *fd)
00202 {
00203   ASSERT(fd->_type == KFT_AFSK);
00204   return (Afsk *)fd;
00205 }
00206
00207
00208 void afsk_adc_isr(Afsk *af, int8_t sample);
00209 uint8_t afsk_dac_isr(Afsk *af);
00210 void afsk_init(Afsk *af, int adc_ch, int dac_ch);
00211
00212
00218 #define AFSK_BUTTERWORTH  0
00219 #define AFSK_CHEBYSHEV    1
00220 /* \} */
00221
00222 int afsk_testSetup(void);
00223 int afsk_testRun(void);
00224 int afsk_testTearDown(void);
00225
00226 #endif /* NET_AFSK_H */


BeRTOS: rle.h File Reference

  • algo
Functions
algo/rle.h File Reference

General-purpose run-length {en,de}coding algorithm. More...

Go to the source code of this file.

Functions

int | rle (unsigned char *output, const unsigned char *input, int length)
Run-length encode len bytes from the input buffer to the output buffer.
int | unrle (unsigned char *output, const unsigned char *input)
Run-length decode from the input buffer to the output buffer.

Detailed Description

General-purpose run-length {en,de}coding algorithm.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file algo/rle.h.

Function Documentation

int unrle | ( | unsigned char * | output,
 |  | const unsigned char * | input
 | ) |  |

Run-length decode from the input buffer to the output buffer.

Note:
The output buffer must be large enough to accomodate all decoded output.

Definition at line 119 of file rle.c.


BeRTOS: rle.h Source File

  • algo
algo/rle.h
Go to the documentation of this file.
00001
00040 #ifndef RLE_H
00041 #define RLE_H
00042
00043 int rle(unsigned char *output, const unsigned char *input, int length);
00044 int unrle(unsigned char *output, const unsigned char *input);
00045
00046 #endif /* RLE_H */


BeRTOS: Data Structures

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Structures
Here are the data structures with brief descriptions:
__sn_state | State information for __sn_put_char()
Afsk | AFSK1200 modem context
ArmSerial | Internal hardware state structure
AvrSerial | Internal hardware state structure
AX25Call | AX25 Call sign
AX25Ctx | AX25 Protocol context
AX25Msg | AX25 Message
BattFs | Describe a BattFs file usign a KFile
BattFsPageHeader | BattFS page header, used to represent a page header in memory
BattFsSuper | Context used to describe a disk
Bitmap | Control structure to draw in a bitmap
CardCSD | Card Specific Data read directly from the card
CmdTemplate | Define a command that can be tokenized by the parser
DataFlash | Dataflash KFile context structure
DataflashInfo | Structure used to describe a dataflash memory
DCMotor | Context structure for DC motor
DCMotorConfig | DC motor configuration stucture
DFilter | A filter is an interface between two notifier
DFilterMap | Map for messages
DNotifier | Base object for receive and forward messages
DTagItem | This is the basic message structure used by all dnotifiers
DWidget | Widget definition
Eeprom | Describe an EEPROM context, used by the driver to access the single device
EepromInfo | Descrive all EEPROM informations needed by the driver
EmulLCD | Qt widget to emulate a dot-matrix LCD display
EmulSerial | Internal state structure
EmulTimer | Singleton class for Qt-based hardware timer emulation
EntropyPool | Sturct data of entropy pool
Flash | EmbFlash KBlock context structure
Flash25 | Flash25 KFile context structure
Ft245rl | Ft245rl KFile context structure
HashIterator | Iterator to walk the hash table
HashTable | Hash table description
Hdlc | HDLC (High-Level Data Link Control) context
Heap | A heap
Image | Hold image pixels
KbdHandler | Keyboard handler descriptor
KBlock | KBlock: interface for a generic block device
KFileBlock | KFileBlock context
KFileDebug | Context for KFile over debug console
KFileMem | Context for KFile over memory buffer
Layer | Overwrapping layer context
LevelEdit | State of a level meter
List | Head of a doubly-linked list of Node structs
LM3SSSI | LM3S1968 SSI handle structure
Md2Context | Context for MD2 computation
Menu | Menu description
MenuItem | Menu item description
Mt29f | MT29F context
NmeaGga | Global Positioning System Fix Data
nmeap_context_t | Parser context
nmeap_gga_t | Extracted data from a GGA message
nmeap_rmc_t | Extracted data from an RMC message
nmeap_sentence_t | Context for a single sentence
NmeaRmc | Recommended minimum specific GPS/Transit data
NmeaVtg | Extracted data from an vtg message
Node | This structure represents a node for bidirectional lists
NtcHwInfo | Type for defining amplifications amp_t = A, where A is a pure number
Observer | Here's a simple example:
parms | Union that contains parameters passed to and from commands
Pcf8574 | Context for accessing a PCF8574
PidCfg | PID context structure
PidContext | PID context structure
PocketBusCtx | PocketBus context structure
PocketBusHdr | Header of pocketBus messages
PocketCmdCtx | PocketBus context for command layer communications
PocketCmdHdr | Header for transmitted pocketBus Commands
PocketCmdMsg | PocketBus command message structure
PocketMsg | Structure holding pocketBus message parameters
PriNode | Extended node for priority queues
Pwm | PWM context structure
PwmChannel | Structur definition for pwm driver
Ramp | Ramp structure
RampPrecalc | Structure holding pre-calculated data for speeding up real-time evaluation of the ramp
Rect | Describe a rectangular area with coordinates expressed in pixels
ReOpenFunc_t | Context data for callback functions which operate on pseudo files
Resource | Hold context information for a resource such as an audio channel
ResourceWaiter | Internal structure for building a priority queue of processes waiting for the resource to become free
Sd | SD Card context structure
Serial | Serial handle structure
SevenSeg | Context data for Display functions
SHA1_Context | Context for SHA1 computation
Signal | Signal structure
Sipo | Sipo KFile context structure
Stepper | Motor context structure
StepperConfig | Stepper configuration
stm32_flash | Embbeded flash configuration registers structure
stm32_gpio | GPIO configuration registers structure
SvInfo | Extracted data from an gsv message
SysIrq | Structure used to define a system interrupt source
TagPacket | Structure of a Tag packet
Timer | The timer driver supports multiple synchronous timers that can trigger an event when they expire
TimerCounter | Timer contex structure
UsbConfigDesc | Device configuration descriptor
UsbCtrlRequest | USB Control Request descriptor
UsbDescHeader | USB common descriptor header
UsbDevice | USB: generic device descriptor
UsbDeviceDesc | USB Device descriptor
UsbEndpointDesc | Endpoint descriptor
UsbInterfaceDesc | Device interface descriptor
UsbStringDesc | USB string descriptor
Window | Window handle and context structure


BeRTOS: arm.h File Reference

  • cpu
  • arm
  • io
arm.h File Reference
#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

ARM I/O registers.

Definition in file arm.h.


BeRTOS: arm.h Source File

  • cpu
  • arm
  • io
arm.h
Go to the documentation of this file.
00001
00040 #ifndef ARM_H
00041 #define ARM_H
00042
00043 #include <cpu/detect.h>
00044
00045 #if CPU_ARM_AT91
00046     #include "at91.h"
00047 #elif  CPU_ARM_LPC2
00048     #include "lpc23xx.h"
00049 /*#elif  Add other ARM families here */
00050 #else
00051     #error Unknown CPU
00052 #endif
00053
00054
00055 #endif /* ARM_H */


BeRTOS: at91.h File Reference

  • cpu
  • arm
  • io
at91.h File Reference
#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

AT91 common definitions. This file is based on NUT/OS implementation. See license below.

Definition in file at91.h.


BeRTOS: at91.h Source File

  • cpu
  • arm
  • io
at91.h
Go to the documentation of this file.
00001
00040 /*
00041  * Copyright (C) 2006-2007 by egnite Software GmbH. All rights reserved.
00042  *
00043  * Redistribution and use in source and binary forms, with or without
00044  * modification, are permitted provided that the following conditions
00045  * are met:
00046  *
00047  * 1. Redistributions of source code must retain the above copyright
00048  *    notice, this list of conditions and the following disclaimer.
00049  * 2. Redistributions in binary form must reproduce the above copyright
00050  *    notice, this list of conditions and the following disclaimer in the
00051  *    documentation and/or other materials provided with the distribution.
00052  * 3. Neither the name of the copyright holders nor the names of
00053  *    contributors may be used to endorse or promote products derived
00054  *    from this software without specific prior written permission.
00055  *
00056  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00057  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00058  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00059  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00060  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00062  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00063  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00064  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00065  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00066  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00067  * SUCH DAMAGE.
00068  *
00069  * For additional information see http://www.ethernut.de/
00070  */
00071
00072 #ifndef AT91_H
00073 #define AT91_H
00074
00075 #include <cpu/detect.h>
00076
00077 #if CPU_ARM_SAM7S_LARGE || CPU_ARM_SAM7X
00078     #include "at91sam7.h"
00079
00080 #else
00081     #error Missing I/O definitions for CPU.
00082 #endif
00083
00084 #endif /* AT91_H */


BeRTOS: at91_adc.h File Reference

  • cpu
  • arm
  • io
Defines
at91_adc.h File Reference

Go to the source code of this file.

Defines

#define | ADC_CR_OFF 0x00000000
ADC control register.
#define | ADC_CR (*((reg32_t *)(ADC_BASE + ADC_CR_OFF)))
Control register address.
#define | ADC_SWRST 0
Software reset.
#define | ADC_START 1
Start conversion.
#define | ADC_MR_OFF 0x00000004
ADC mode register.
#define | ADC_MR (*((reg32_t *)(ADC_BASE + ADC_MR_OFF)))
Mode register address.
#define | ADC_TRGEN 0
Trigger enable.
#define | ADC_TRGSEL_TIOA0 0x00000000
TIOA output of the timer counter channel 0.
#define | ADC_TRGSEL_TIOA1 0x00000002
TIOA output of the timer counter channel 1.
#define | ADC_TRGSEL_TIOA2 0x00000004
TIOA output of the timer counter channel 2.
#define | ADC_TRGSEL_EXT 0x0000000C
External trigger.
#define | ADC_LOWRES 4
Resolution 0: 10-bit, 1: 8-bit.
#define | ADC_SLEEP 5
Sleep mode.
#define | ADC_PRESCALER_MASK 0x00003F00
Prescaler rate selection.
#define | ADC_PRESCALER_SHIFT 8
Prescale rate selection shift.
#define | ADC_STARTUP_MASK 0x001F0000
Start up timer.
#define | ADC_STARTUP_SHIFT 16
Start up timer shift.
#define | ADC_SHTIME_MASK 0x0F000000
Sample & hold time.
#define | ADC_SHTIME_SHIFT 24
Sample & hold time shift.
#define | ADC_CHER_OFF 0x00000010
ADC channel enable register.
#define | ADC_CHER (*((reg32_t *)(ADC_BASE + ADC_CHER_OFF)))
Channel enable register address.
#define | ADC_CHDR_OFF 0x00000014
ADC channel disable register.
#define | ADC_CHDR (*((reg32_t *)(ADC_BASE + ADC_CHDR_OFF)))
Channel disable register address.
#define | ADC_CHSR_OFF 0x00000018
ADC channel status register.
#define | ADC_CHSR (*((reg32_t *)(ADC_BASE + ADC_CHSR_OFF)))
Channel status register address.
#define | ADC_CH_MASK 0x000000FF
Channel mask.
#define | ADC_CH0 0
Channel 0.
#define | ADC_CH1 1
Channel 1.
#define | ADC_CH2 2
Channel 2.
#define | ADC_CH3 3
Channel 3.
#define | ADC_CH4 4
Channel 4.
#define | ADC_CH5 5
Channel 5.
#define | ADC_CH6 6
Channel 6.
#define | ADC_CH7 7
Channel 7.
#define | ADC_SR_OFF 0x0000001C
ADC status register.
#define | ADC_SR (*((reg32_t *)(ADC_BASE + ADC_SR_OFF)))
Status register address.
#define | ADC_IER_OFF 0x00000024
ADC Interrupt enable register.
#define | ADC_IER (*((reg32_t *)(ADC_BASE + ADC_IER_OFF)))
Interrupt enable register.
#define | ADC_IDR_OFF 0x00000028
ADC Interrupt disable register.
#define | ADC_IDR (*((reg32_t *)(ADC_BASE + ADC_IDR_OFF)))
Interrupt disable register.
#define | ADC_IMR_OFF 0x0000002C
ADC Interrupt mask register.
#define | ADC_IMR (*((reg32_t *)(ADC_BASE + ADC_IMR_OFF)))
Interrupt mask register.
#define | ADC_EOC_MASK 0x000000FF
End of converison mask.
#define | ADC_EOC0 0
End of conversion channel 0.
#define | ADC_EOC1 1
End of conversion channel 1.
#define | ADC_EOC2 2
End of conversion channel 2.
#define | ADC_EOC3 3
End of conversion channel 3.
#define | ADC_EOC4 4
End of conversion channel 4.
#define | ADC_EOC5 5
End of conversion channel 5.
#define | ADC_EOC6 6
End of conversion channel 6.
#define | ADC_EOC7 7
End of conversion channel 7.
#define | ADC_OVRE0 8
Overrun error channel 0.
#define | ADC_OVRE1 9
Overrun error channel 1.
#define | ADC_OVRE2 10
Overrun error channel 2.
#define | ADC_OVRE3 11
Overrun error channel 3.
#define | ADC_OVRE4 12
Overrun error channel 4.
#define | ADC_OVRE5 13
Overrun error channel 5.
#define | ADC_OVRE6 14
Overrun error channel 6.
#define | ADC_OVRE7 15
Overrun error channel 7.
#define | ADC_DRDY 16
Data ready.
#define | ADC_GOVRE 17
General overrun error.
#define | ADC_ENDRX 18
End of RX buffer.
#define | ADC_RXBUFF 19
Rx buffer full.
#define | ADC_LCDR_OFF 0x00000020
ADC last convert data register.
#define | ADC_LCDR (*((reg32_t *)(ADC_BASE + ADC_LCDR_OFF)))
Last converted data register.
#define | ADC_CDR0_OFF 0x00000030
ADC channel data register.
#define | ADC_CDR1_OFF 0x00000034
Channel data register 1 offeset.
#define | ADC_CDR2_OFF 0x00000038
Channel data register 2 offeset.
#define | ADC_CDR3_OFF 0x0000003C
Channel data register 3 offeset.
#define | ADC_CDR4_OFF 0x00000040
Channel data register 4 offeset.
#define | ADC_CDR5_OFF 0x00000044
Channel data register 5 offeset.
#define | ADC_CDR6_OFF 0x00000048
Channel data register 6 offeset.
#define | ADC_CDR7_OFF 0x0000004C
Channel data register 7 offeset.
#define | ADC_CDR0 (*((reg32_t *)(ADC_BASE + ADC_CDR0_OFF)))
Channel data register 0.
#define | ADC_CDR1 (*((reg32_t *)(ADC_BASE + ADC_CDR1_OFF)))
Channel data register 1.
#define | ADC_CDR2 (*((reg32_t *)(ADC_BASE + ADC_CDR2_OFF)))
Channel data register 2.
#define | ADC_CDR3 (*((reg32_t *)(ADC_BASE + ADC_CDR3_OFF)))
Channel data register 3.
#define | ADC_CDR4 (*((reg32_t *)(ADC_BASE + ADC_CDR4_OFF)))
Channel data register 4.
#define | ADC_CDR5 (*((reg32_t *)(ADC_BASE + ADC_CDR5_OFF)))
Channel data register 5.
#define | ADC_CDR6 (*((reg32_t *)(ADC_BASE + ADC_CDR6_OFF)))
Channel data register 6.
#define | ADC_CDR7 (*((reg32_t *)(ADC_BASE + ADC_CDR7_OFF)))
Channel data register 7.

Detailed Description

Author:
Daniele Basile <asterix@develer.com>

AT91SAM7 Analog to Digital Converter.

Definition in file at91_adc.h.

Define Documentation

#define ADC_CDR0_OFF 0x00000030

ADC channel data register.

Channel data register 0 offeset.

Definition at line 178 of file at91_adc.h.

#define ADC_CHDR_OFF 0x00000014

ADC channel disable register.

Channel disable register offeset.

Definition at line 100 of file at91_adc.h.

#define ADC_CHER_OFF 0x00000010

ADC channel enable register.

Channel enable register offeset.

Definition at line 94 of file at91_adc.h.

#define ADC_CHSR_OFF 0x00000018

ADC channel status register.

Channel status register offeset.

Definition at line 106 of file at91_adc.h.

#define ADC_CR_OFF 0x00000000

ADC control register.

Control register offeset.

Definition at line 47 of file at91_adc.h.

#define ADC_IDR_OFF 0x00000028

ADC Interrupt disable register.

Interrupt disable register offeset.

Definition at line 134 of file at91_adc.h.

#define ADC_IER_OFF 0x00000024

ADC Interrupt enable register.

Interrupt enable register offeset.

Definition at line 128 of file at91_adc.h.

#define ADC_IMR_OFF 0x0000002C

ADC Interrupt mask register.

Interrupt mask register offeset.

Definition at line 140 of file at91_adc.h.

#define ADC_LCDR_OFF 0x00000020

ADC last convert data register.

Last converted data register offeset.

Definition at line 170 of file at91_adc.h.

#define ADC_MR_OFF 0x00000004

ADC mode register.

Mode register offeset.

Definition at line 56 of file at91_adc.h.

#define ADC_PRESCALER_MASK 0x00003F00

Prescaler rate selection.

ADCClock = MCK / ((ADC_PRESCALER_VALUE + 1) * 2) Prescaler rate selection mask.

Definition at line 72 of file at91_adc.h.

#define ADC_SHTIME_MASK 0x0F000000

Sample & hold time.

Sample & hold time = (ADC_SHTIM_VALUE + 1) * 8 /ADCClock Sample & hold time mask.

Definition at line 87 of file at91_adc.h.

#define ADC_SR_OFF 0x0000001C

ADC status register.

Status register offeset.

Definition at line 122 of file at91_adc.h.

#define ADC_STARTUP_MASK 0x001F0000

Start up timer.

Startup time = (ADC_STARTUP_VALUE + 1) * 8 /ADCClock Start up timer mask.

Definition at line 79 of file at91_adc.h.


BeRTOS: at91_adc.h Source File

  • cpu
  • arm
  • io
at91_adc.h
Go to the documentation of this file.
00001
00040 #ifndef AT91_ADC_H
00041 #define AT91_ADC_H
00042
00043
00047 #define ADC_CR_OFF              0x00000000     ///< Control register offeset.
00048 #define ADC_CR          (*((reg32_t *)(ADC_BASE + ADC_CR_OFF))) ///< Control register address.
00049 #define ADC_SWRST                        0      ///< Software reset.
00050 #define ADC_START                        1      ///< Start conversion.
00051
00052
00056 #define ADC_MR_OFF              0x00000004     ///< Mode register offeset.
00057 #define ADC_MR          (*((reg32_t *)(ADC_BASE + ADC_MR_OFF))) ///< Mode register address.
00058 #define ADC_TRGEN                        0     ///< Trigger enable.
00059
00060 #define ADC_TRGSEL_TIOA0         0x00000000    ///< TIOA output of the timer counter channel 0.
00061 #define ADC_TRGSEL_TIOA1         0x00000002    ///< TIOA output of the timer counter channel 1.
00062 #define ADC_TRGSEL_TIOA2         0x00000004    ///< TIOA output of the timer counter channel 2.
00063 #define ADC_TRGSEL_EXT           0x0000000C    ///< External trigger.
00064
00065 #define ADC_LOWRES                        4   ///< Resolution 0: 10-bit, 1: 8-bit.
00066 #define ADC_SLEEP                         5   ///< Sleep mode.
00067
00072 #define ADC_PRESCALER_MASK       0x00003F00   ///< Prescaler rate selection mask.
00073 #define ADC_PRESCALER_SHIFT               8   ///< Prescale  rate selection shift.
00074
00079 #define ADC_STARTUP_MASK         0x001F0000   ///< Start up timer mask.
00080 #define ADC_STARTUP_SHIFT                16   ///< Start up timer shift.
00081
00082
00087 #define ADC_SHTIME_MASK          0x0F000000   ///< Sample & hold time mask.
00088 #define ADC_SHTIME_SHIFT                 24   ///< Sample & hold time shift.
00089
00090
00094 #define ADC_CHER_OFF             0x00000010     ///< Channel enable register offeset.
00095 #define ADC_CHER          (*((reg32_t *)(ADC_BASE + ADC_CHER_OFF))) ///<  Channel enable register address.
00096
00100 #define ADC_CHDR_OFF             0x00000014     ///< Channel disable register offeset.
00101 #define ADC_CHDR          (*((reg32_t *)(ADC_BASE + ADC_CHDR_OFF))) ///<  Channel disable register address.
00102
00106 #define ADC_CHSR_OFF             0x00000018     ///< Channel status register offeset.
00107 #define ADC_CHSR          (*((reg32_t *)(ADC_BASE + ADC_CHSR_OFF))) ///<  Channel status register address.
00108
00109 #define ADC_CH_MASK              0x000000FF    ///< Channel mask.
00110 #define ADC_CH0                           0    ///< Channel 0
00111 #define ADC_CH1                           1    ///< Channel 1
00112 #define ADC_CH2                           2    ///< Channel 2
00113 #define ADC_CH3                           3    ///< Channel 3
00114 #define ADC_CH4                           4    ///< Channel 4
00115 #define ADC_CH5                           5    ///< Channel 5
00116 #define ADC_CH6                           6    ///< Channel 6
00117 #define ADC_CH7                           7    ///< Channel 7
00118
00122 #define ADC_SR_OFF               0x0000001C     ///< Status register offeset.
00123 #define ADC_SR          (*((reg32_t *)(ADC_BASE + ADC_SR_OFF))) ///< Status register address.
00124
00128 #define ADC_IER_OFF              0x00000024     ///< Interrupt enable register offeset.
00129 #define ADC_IER          (*((reg32_t *)(ADC_BASE + ADC_IER_OFF))) ///<  Interrupt enable register.
00130
00134 #define ADC_IDR_OFF              0x00000028     ///< Interrupt disable register offeset.
00135 #define ADC_IDR          (*((reg32_t *)(ADC_BASE + ADC_IDR_OFF))) ///<  Interrupt disable register.
00136
00140 #define ADC_IMR_OFF              0x0000002C     ///< Interrupt mask register offeset.
00141 #define ADC_IMR          (*((reg32_t *)(ADC_BASE + ADC_IMR_OFF))) ///<  Interrupt mask register.
00142
00143 #define ADC_EOC_MASK             0x000000FF    ///< End of converison mask.
00144 #define ADC_EOC0                          0    ///< End of conversion channel 0.
00145 #define ADC_EOC1                          1    ///< End of conversion channel 1.
00146 #define ADC_EOC2                          2    ///< End of conversion channel 2.
00147 #define ADC_EOC3                          3    ///< End of conversion channel 3.
00148 #define ADC_EOC4                          4    ///< End of conversion channel 4.
00149 #define ADC_EOC5                          5    ///< End of conversion channel 5.
00150 #define ADC_EOC6                          6    ///< End of conversion channel 6.
00151 #define ADC_EOC7                          7    ///< End of conversion channel 7.
00152
00153 #define ADC_OVRE0                         8    ///< Overrun error channel 0.
00154 #define ADC_OVRE1                         9    ///< Overrun error channel 1.
00155 #define ADC_OVRE2                        10    ///< Overrun error channel 2.
00156 #define ADC_OVRE3                        11    ///< Overrun error channel 3.
00157 #define ADC_OVRE4                        12    ///< Overrun error channel 4.
00158 #define ADC_OVRE5                        13    ///< Overrun error channel 5.
00159 #define ADC_OVRE6                        14    ///< Overrun error channel 6.
00160 #define ADC_OVRE7                        15    ///< Overrun error channel 7.
00161
00162 #define ADC_DRDY                         16    ///< Data ready.
00163 #define ADC_GOVRE                        17    ///< General overrun error.
00164 #define ADC_ENDRX                        18    ///< End of RX buffer.
00165 #define ADC_RXBUFF                       19    ///< Rx buffer full.
00166
00170 #define ADC_LCDR_OFF             0x00000020     ///< Last converted data register offeset.
00171 #define ADC_LCDR          (*((reg32_t *)(ADC_BASE + ADC_LCDR_OFF))) ///< Last converted data register.
00172
00178 #define ADC_CDR0_OFF              0x00000030    ///< Channel data register 0 offeset.
00179 #define ADC_CDR1_OFF              0x00000034    ///< Channel data register 1 offeset.
00180 #define ADC_CDR2_OFF              0x00000038    ///< Channel data register 2 offeset.
00181 #define ADC_CDR3_OFF              0x0000003C    ///< Channel data register 3 offeset.
00182 #define ADC_CDR4_OFF              0x00000040    ///< Channel data register 4 offeset.
00183 #define ADC_CDR5_OFF              0x00000044    ///< Channel data register 5 offeset.
00184 #define ADC_CDR6_OFF              0x00000048    ///< Channel data register 6 offeset.
00185 #define ADC_CDR7_OFF              0x0000004C    ///< Channel data register 7 offeset.
00186
00187 #define ADC_CDR0    (*((reg32_t *)(ADC_BASE + ADC_CDR0_OFF)))  ///< Channel data register 0.
00188 #define ADC_CDR1    (*((reg32_t *)(ADC_BASE + ADC_CDR1_OFF)))  ///< Channel data register 1.
00189 #define ADC_CDR2    (*((reg32_t *)(ADC_BASE + ADC_CDR2_OFF)))  ///< Channel data register 2.
00190 #define ADC_CDR3    (*((reg32_t *)(ADC_BASE + ADC_CDR3_OFF)))  ///< Channel data register 3.
00191 #define ADC_CDR4    (*((reg32_t *)(ADC_BASE + ADC_CDR4_OFF)))  ///< Channel data register 4.
00192 #define ADC_CDR5    (*((reg32_t *)(ADC_BASE + ADC_CDR5_OFF)))  ///< Channel data register 5.
00193 #define ADC_CDR6    (*((reg32_t *)(ADC_BASE + ADC_CDR6_OFF)))  ///< Channel data register 6.
00194 #define ADC_CDR7    (*((reg32_t *)(ADC_BASE + ADC_CDR7_OFF)))  ///< Channel data register 7.
00195 /* \} */
00196
00197 #endif /* AT91_ADC_H */


BeRTOS: at91_aic.h File Reference

  • cpu
  • arm
  • io
Defines | Typedefs
at91_aic.h File Reference
#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define | AIC_SMR(i) (*((reg32_t *)(AIC_BASE + (i) * 4)))
Source mode register array.
#define | AIC_PRIOR_MASK 0x00000007
Priority mask.
#define | AIC_SRCTYPE_MASK 0x00000060
Interrupt source type mask.
#define | AIC_SRCTYPE_INT_LEVEL_SENSITIVE 0x00000000
Internal level sensitive.
#define | AIC_SRCTYPE_INT_EDGE_TRIGGERED 0x00000020
Internal edge triggered.
#define | AIC_SRCTYPE_EXT_LOW_LEVEL 0x00000000
External low level.
#define | AIC_SRCTYPE_EXT_NEGATIVE_EDGE 0x00000020
External falling edge.
#define | AIC_SRCTYPE_EXT_HIGH_LEVEL 0x00000040
External high level.
#define | AIC_SRCTYPE_EXT_POSITIVE_EDGE 0x00000060
External rising edge.
#define | AIC_SVR(i) (*((volatile irq_handler_t *)(AIC_BASE + 0x80 + (i) * 4)))
Interrupt Source Vector Registers.
#define | AIC_IVR_OFF 0x00000100
Interrupt Vector Register.
#define | AIC_IVR (*((reg32_t *)(AIC_BASE + AIC_IVR_OFF)))
IRQ vector register address.
#define | AIC_FVR_OFF 0x00000104
Fast Interrupt Vector Register.
#define | AIC_FVR (*((reg32_t *)(AIC_BASE + AIC_FVR_OFF)))
FIQ vector register address.
#define | AIC_ISR_OFF 0x00000108
Interrupt Status Register.
#define | AIC_ISR (*((reg32_t *)(AIC_BASE + AIC_ISR_OFF)))
Interrupt status register address.
#define | AIC_IRQID_MASK 0x0000001F
Current interrupt identifier mask.
#define | AIC_IPR_OFF 0x0000010C
Interrupt Pending Register.
#define | AIC_IPR (*((reg32_t *)(AIC_BASE + AIC_IPR_OFF)))
Interrupt pending register address.
#define | AIC_IMR_OFF 0x00000110
Interrupt Mask Register.
#define | AIC_IMR (*((reg32_t *)(AIC_BASE + AIC_IMR_OFF)))
Interrupt mask register address.
#define | AIC_CISR_OFF 0x00000114
Interrupt Core Status Register.
#define | AIC_CISR (*((reg32_t *)(AIC_BASE + AIC_CISR_OFF)))
Core interrupt status register address.
#define | AIC_NFIQ 1
Core FIQ Status.
#define | AIC_NIRQ 2
Core IRQ Status.
#define | AIC_IECR_OFF 0x00000120
Interrupt Enable Command Register.
#define | AIC_IECR (*((reg32_t *)(AIC_BASE + AIC_IECR_OFF)))
Interrupt enable command register address.
#define | AIC_IDCR_OFF 0x00000124
Interrupt Disable Command Register.
#define | AIC_IDCR (*((reg32_t *)(AIC_BASE + AIC_IDCR_OFF)))
Interrupt disable command register address.
#define | AIC_ICCR_OFF 0x00000128
Interrupt Clear Command Register.
#define | AIC_ICCR (*((reg32_t *)(AIC_BASE + AIC_ICCR_OFF)))
Interrupt clear command register address.
#define | AIC_ISCR_OFF 0x0000012C
Interrupt Set Command Register.
#define | AIC_ISCR (*((reg32_t *)(AIC_BASE + AIC_ISCR_OFF)))
Interrupt set command register address.
#define | AIC_EOICR_OFF 0x00000130
End Of Interrupt Command Register.
#define | AIC_EOICR (*((reg32_t *)(AIC_BASE + AIC_EOICR_OFF)))
End of interrupt command register address.
#define | AIC_SPU_OFF 0x00000134
Spurious Interrupt Vector Register.
#define | AIC_SPU (*((reg32_t *)(AIC_BASE + AIC_SPU_OFF)==
Spurious vector register address.
#define | AIC_DCR_OFF 0x0000138
Debug Control Register.
#define | AIC_DCR (*((reg32_t *)(AIC_BASE + AIC_DCR_OFF)))
Debug control register address.
#define | AIC_FFER_OFF 0x00000140
Fast Forcing Enable Register.
#define | AIC_FFER (*((reg32_t *)(AIC_BASE + AIC_FFER_OFF)))
Fast forcing enable register address.
#define | AIC_FFDR_OFF 0x00000144
Fast Forcing Disable Register.
#define | AIC_FFDR (*((reg32_t *)(AIC_BASE + AIC_FFDR_OFF)))
Fast forcing disable register address.
#define | AIC_FFSR_OFF 0x00000148
Fast Forcing Status Register.
#define | AIC_FFSR (*((reg32_t *)(AIC_BASE + AIC_FFSR_OFF)))
Fast forcing status register address.

Typedefs

typedef void(* | irq_handler_t )(void)
Type for interrupt handlers.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

AT91 advanced interrupt controller. This file is based on NUT/OS implementation. See license below.

Definition in file at91_aic.h.

Define Documentation

#define AIC_CISR_OFF 0x00000114

Interrupt Core Status Register.

Core interrupt status register offset.

Definition at line 156 of file at91_aic.h.

#define AIC_DCR_OFF 0x0000138

Debug Control Register.

Debug control register offset.

Definition at line 200 of file at91_aic.h.

#define AIC_EOICR_OFF 0x00000130

End Of Interrupt Command Register.

End of interrupt command register offset.

Definition at line 188 of file at91_aic.h.

#define AIC_FFDR_OFF 0x00000144

Fast Forcing Disable Register.

Fast forcing disable register address.

Definition at line 212 of file at91_aic.h.

#define AIC_FFER_OFF 0x00000140

Fast Forcing Enable Register.

Fast forcing enable register offset.

Definition at line 206 of file at91_aic.h.

#define AIC_FFSR_OFF 0x00000148

Fast Forcing Status Register.

Fast forcing status register address.

Definition at line 218 of file at91_aic.h.

#define AIC_FVR_OFF 0x00000104

Fast Interrupt Vector Register.

FIQ vector register offset.

Definition at line 131 of file at91_aic.h.

#define AIC_ICCR_OFF 0x00000128

Interrupt Clear Command Register.

Interrupt clear command register offset.

Definition at line 176 of file at91_aic.h.

#define AIC_IDCR_OFF 0x00000124

Interrupt Disable Command Register.

Interrupt disable command register offset.

Definition at line 170 of file at91_aic.h.

#define AIC_IECR_OFF 0x00000120

Interrupt Enable Command Register.

Interrupt enable command register offset.

Definition at line 164 of file at91_aic.h.

#define AIC_IMR_OFF 0x00000110

Interrupt Mask Register.

Interrupt mask register offset.

Definition at line 150 of file at91_aic.h.

#define AIC_IPR_OFF 0x0000010C

Interrupt Pending Register.

Interrupt pending register offset.

Definition at line 144 of file at91_aic.h.

#define AIC_ISCR_OFF 0x0000012C

Interrupt Set Command Register.

Interrupt set command register offset.

Definition at line 182 of file at91_aic.h.

#define AIC_ISR_OFF 0x00000108

Interrupt Status Register.

Interrupt status register offset.

Definition at line 137 of file at91_aic.h.

#define AIC_IVR_OFF 0x00000100

Interrupt Vector Register.

IRQ vector register offset.

Definition at line 125 of file at91_aic.h.

#define AIC_PRIOR_MASK 0x00000007

Priority mask.

Priority levels can be between 0 (lowest) and 7 (highest).

Definition at line 88 of file at91_aic.h.

#define AIC_SPU_OFF 0x00000134

Spurious Interrupt Vector Register.

Spurious vector register offset.

Definition at line 194 of file at91_aic.h.

#define AIC_SRCTYPE_MASK 0x00000060

Interrupt source type mask.

Internal interrupts can level sensitive or edge triggered.

External interrupts can triggered on positive or negative levels or on rising or falling edges.

Definition at line 98 of file at91_aic.h.

#define AIC_SVR ( i ) (*((volatile irq_handler_t *)(AIC_BASE + 0x80 + (i) * 4)))

Interrupt Source Vector Registers.

Source vector register array.

Stores the addresses of the corresponding interrupt handlers.

Definition at line 120 of file at91_aic.h.


BeRTOS: at91_aic.h Source File

  • cpu
  • arm
  • io
at91_aic.h
Go to the documentation of this file.
00001
00040 /*
00041  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00042  *
00043  * Redistribution and use in source and binary forms, with or without
00044  * modification, are permitted provided that the following conditions
00045  * are met:
00046  *
00047  * 1. Redistributions of source code must retain the above copyright
00048  *    notice, this list of conditions and the following disclaimer.
00049  * 2. Redistributions in binary form must reproduce the above copyright
00050  *    notice, this list of conditions and the following disclaimer in the
00051  *    documentation and/or other materials provided with the distribution.
00052  * 3. Neither the name of the copyright holders nor the names of
00053  *    contributors may be used to endorse or promote products derived
00054  *    from this software without specific prior written permission.
00055  *
00056  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00057  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00058  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00059  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00060  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00062  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00063  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00064  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00065  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00066  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00067  * SUCH DAMAGE.
00068  *
00069  * For additional information see http://www.ethernut.de/
00070  */
00071
00072 #ifndef AT91_AIC_H
00073 #define AT91_AIC_H
00074
00075 #include <cfg/compiler.h>
00076
00077
00078
00082 #define AIC_SMR(i)  (*((reg32_t *)(AIC_BASE + (i) * 4)))
00083
00088 #define AIC_PRIOR_MASK 0x00000007
00089
00097 /*\{*/
00098 #define AIC_SRCTYPE_MASK 0x00000060
00099
00100 #define AIC_SRCTYPE_INT_LEVEL_SENSITIVE 0x00000000      ///< Internal level sensitive.
00101 #define AIC_SRCTYPE_INT_EDGE_TRIGGERED  0x00000020      ///< Internal edge triggered.
00102 #define AIC_SRCTYPE_EXT_LOW_LEVEL       0x00000000      ///< External low level.
00103 #define AIC_SRCTYPE_EXT_NEGATIVE_EDGE   0x00000020      ///< External falling edge.
00104 #define AIC_SRCTYPE_EXT_HIGH_LEVEL      0x00000040      ///< External high level.
00105 #define AIC_SRCTYPE_EXT_POSITIVE_EDGE   0x00000060      ///< External rising edge.
00106 /*\}*/
00107
00108
00112 typedef void (*irq_handler_t)(void);
00113
00115 /*\{*/
00120 #define AIC_SVR(i)  (*((volatile irq_handler_t *)(AIC_BASE + 0x80 + (i) * 4)))
00121 /*\}*/
00122
00124 /*\{*/
00125 #define AIC_IVR_OFF 0x00000100  ///< IRQ vector register offset.
00126 #define AIC_IVR     (*((reg32_t *)(AIC_BASE + AIC_IVR_OFF))) ///< IRQ vector register address.
00127 /*\}*/
00128
00130 /*\{*/
00131 #define AIC_FVR_OFF 0x00000104  ///< FIQ vector register offset.
00132 #define AIC_FVR     (*((reg32_t *)(AIC_BASE + AIC_FVR_OFF))) ///< FIQ vector register address.
00133 /*\}*/
00134
00136 /*\{*/
00137 #define AIC_ISR_OFF    0x00000108  ///< Interrupt status register offset.
00138 #define AIC_ISR        (*((reg32_t *)(AIC_BASE + AIC_ISR_OFF))) ///< Interrupt status register address.
00139 #define AIC_IRQID_MASK 0x0000001F  ///< Current interrupt identifier mask.
00140 /*\}*/
00141
00143 /*\{*/
00144 #define AIC_IPR_OFF 0x0000010C  ///< Interrupt pending register offset.
00145 #define AIC_IPR     (*((reg32_t *)(AIC_BASE + AIC_IPR_OFF))) ///< Interrupt pending register address.
00146 /*\}*/
00147
00149 /*\{*/
00150 #define AIC_IMR_OFF 0x00000110  ///< Interrupt mask register offset.
00151 #define AIC_IMR     (*((reg32_t *)(AIC_BASE + AIC_IMR_OFF))) ///< Interrupt mask register address.
00152 /*\}*/
00153
00155 /*\{*/
00156 #define AIC_CISR_OFF 0x00000114  ///< Core interrupt status register offset.
00157 #define AIC_CISR     (*((reg32_t *)(AIC_BASE + AIC_CISR_OFF))) ///< Core interrupt status register address.
00158 #define AIC_NFIQ     1  ///< Core FIQ Status
00159 #define AIC_NIRQ     2  ///< Core IRQ Status
00160 /*\}*/
00161
00163 /*\{*/
00164 #define AIC_IECR_OFF 0x00000120  ///< Interrupt enable command register offset.
00165 #define AIC_IECR     (*((reg32_t *)(AIC_BASE + AIC_IECR_OFF)))   ///< Interrupt enable command register address.
00166 /*\}*/
00167
00169 /*\{*/
00170 #define AIC_IDCR_OFF 0x00000124  ///< Interrupt disable command register offset.
00171 #define AIC_IDCR     (*((reg32_t *)(AIC_BASE + AIC_IDCR_OFF)))   ///< Interrupt disable command register address.
00172 /*\}*/
00173
00175 /*\{*/
00176 #define AIC_ICCR_OFF 0x00000128  ///< Interrupt clear command register offset.
00177 #define AIC_ICCR     (*((reg32_t *)(AIC_BASE + AIC_ICCR_OFF)))   ///< Interrupt clear command register address.
00178 /*\}*/
00179
00181 /*\{*/
00182 #define AIC_ISCR_OFF 0x0000012C  ///< Interrupt set command register offset.
00183 #define AIC_ISCR     (*((reg32_t *)(AIC_BASE + AIC_ISCR_OFF)))   ///< Interrupt set command register address.
00184 /*\}*/
00185
00187 /*\{*/
00188 #define AIC_EOICR_OFF 0x00000130  ///< End of interrupt command register offset.
00189 #define AIC_EOICR     (*((reg32_t *)(AIC_BASE + AIC_EOICR_OFF)))  ///< End of interrupt command register address.
00190 /*\}*/
00191
00193 /*\{*/
00194 #define AIC_SPU_OFF 0x00000134  ///< Spurious vector register offset.
00195 #define AIC_SPU     (*((reg32_t *)(AIC_BASE + AIC_SPU_OFF)==    ///< Spurious vector register address.
00196 /*\}*/
00197
00199 /*\{*/
00200 #define AIC_DCR_OFF 0x0000138   ///< Debug control register offset.
00201 #define AIC_DCR     (*((reg32_t *)(AIC_BASE + AIC_DCR_OFF)))    ///< Debug control register address.
00202 /*\}*/
00203
00205 /*\{*/
00206 #define AIC_FFER_OFF 0x00000140  ///< Fast forcing enable register offset.
00207 #define AIC_FFER     (*((reg32_t *)(AIC_BASE + AIC_FFER_OFF)))   ///< Fast forcing enable register address.
00208 /*\}*/
00209
00211 /*\{*/
00212 #define AIC_FFDR_OFF 0x00000144  ///< Fast forcing disable register address.
00213 #define AIC_FFDR     (*((reg32_t *)(AIC_BASE + AIC_FFDR_OFF)))   ///< Fast forcing disable register address.
00214 /*\}*/
00215
00217 /*\{*/
00218 #define AIC_FFSR_OFF 0x00000148  ///< Fast forcing status register address.
00219 #define AIC_FFSR     (*((reg32_t *)(AIC_BASE + AIC_FFSR_OFF)))   ///< Fast forcing status register address.
00220 /*\}*/
00221
00222 #endif /* AT91_AIC_H */


BeRTOS: at91_dbgu.h File Reference

  • cpu
  • arm
  • io
Defines
at91_dbgu.h File Reference

Go to the source code of this file.

Defines

#define | DBGU_CR (*((reg32_t *)(DBGU_BASE + US_CR_OFF)))
DBGU control register address.
#define | DBGU_MR (*((reg32_t *)(DBGU_BASE + US_MR_OFF)))
DBGU mode register address.
#define | DBGU_IER (*((reg32_t *)(DBGU_BASE + US_IER_OFF)))
DBGU interrupt enable register address.
#define | DBGU_IDR (*((reg32_t *)(DBGU_BASE + US_IDR_OFF)))
DBGU interrupt disable register address.
#define | DBGU_IMR (*((reg32_t *)(DBGU_BASE + US_IMR_OFF)))
DBGU interrupt mask register address.
#define | DBGU_SR (*((reg32_t *)(DBGU_BASE + US_CSR_OFF)))
DBGU status register address.
#define | DBGU_RHR (*((reg32_t *)(DBGU_BASE + US_RHR_OFF)))
DBGU receiver holding register address.
#define | DBGU_THR (*((reg32_t *)(DBGU_BASE + US_THR_OFF)))
DBGU transmitter holding register address.
#define | DBGU_BRGR (*((reg32_t *)(DBGU_BASE + US_BRGR_OFF)))
DBGU baud rate register address.
#define | DBGU_CIDR_OFF 0x00000040
DBGU chip ID register offset.
#define | DBGU_CIDR (*((reg32_t *)(DBGU_BASE + DBGU_CIDR_OFF)))
DBGU chip ID register.
#define | DBGU_EXID_OFF 0x00000044
DBGU chip ID extension register offset.
#define | DBGU_EXID (*((reg32_t *)(DBGU_BASE + DBGU_EXID_OFF)))
DBGU chip ID extension register.
#define | DBGU_FNR_OFF 0x00000048
DBGU force NTRST register offset.
#define | DBGU_FNR (*((reg32_t *)(DBGU_BASE + DBGU_FNR_OFF)))
DBGU force NTRST register.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

AT91 Debug unit. This file is based on NUT/OS implementation. See license below.

Definition in file at91_dbgu.h.


BeRTOS: at91_dbgu.h Source File

  • cpu
  • arm
  • io
at91_dbgu.h
Go to the documentation of this file.
00001
00040 /*
00041  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00042  *
00043  * Redistribution and use in source and binary forms, with or without
00044  * modification, are permitted provided that the following conditions
00045  * are met:
00046  *
00047  * 1. Redistributions of source code must retain the above copyright
00048  *    notice, this list of conditions and the following disclaimer.
00049  * 2. Redistributions in binary form must reproduce the above copyright
00050  *    notice, this list of conditions and the following disclaimer in the
00051  *    documentation and/or other materials provided with the distribution.
00052  * 3. Neither the name of the copyright holders nor the names of
00053  *    contributors may be used to endorse or promote products derived
00054  *    from this software without specific prior written permission.
00055  *
00056  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00057  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00058  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00059  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00060  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00062  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00063  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00064  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00065  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00066  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00067  * SUCH DAMAGE.
00068  *
00069  * For additional information see http://www.ethernut.de/
00070  */
00071 #ifndef AT91_DBGU_H
00072 #define AT91_DBGU_H
00073
00074 #define DBGU_CR     (*((reg32_t *)(DBGU_BASE + US_CR_OFF)))     ///<DBGU control register address.
00075 #define DBGU_MR     (*((reg32_t *)(DBGU_BASE + US_MR_OFF)))     ///<DBGU mode register address.
00076 #define DBGU_IER    (*((reg32_t *)(DBGU_BASE + US_IER_OFF)))    ///<DBGU interrupt enable register address.
00077 #define DBGU_IDR    (*((reg32_t *)(DBGU_BASE + US_IDR_OFF)))    ///<DBGU interrupt disable register address.
00078 #define DBGU_IMR    (*((reg32_t *)(DBGU_BASE + US_IMR_OFF)))    ///<DBGU interrupt mask register address.
00079 #define DBGU_SR     (*((reg32_t *)(DBGU_BASE + US_CSR_OFF)))    ///<DBGU status register address.
00080 #define DBGU_RHR    (*((reg32_t *)(DBGU_BASE + US_RHR_OFF)))    ///<DBGU receiver holding register address.
00081 #define DBGU_THR    (*((reg32_t *)(DBGU_BASE + US_THR_OFF)))    ///<DBGU transmitter holding register address.
00082 #define DBGU_BRGR   (*((reg32_t *)(DBGU_BASE + US_BRGR_OFF)))   ///<DBGU baud rate register address.
00083
00084 #define DBGU_CIDR_OFF           0x00000040      ///<DBGU chip ID register offset.
00085 #define DBGU_CIDR   (*((reg32_t *)(DBGU_BASE + DBGU_CIDR_OFF))) ///<DBGU chip ID register.
00086
00087 #define DBGU_EXID_OFF           0x00000044      ///<DBGU chip ID extension register offset.
00088 #define DBGU_EXID   (*((reg32_t *)(DBGU_BASE + DBGU_EXID_OFF))) ///<DBGU chip ID extension register.
00089
00090 #define DBGU_FNR_OFF            0x00000048      ///<DBGU force NTRST register offset.
00091 #define DBGU_FNR    (*((reg32_t *)(DBGU_BASE + DBGU_FNR_OFF)))  ///<DBGU force NTRST register.
00092
00093 #if defined(DBGU_HAS_PDC)
00094 #define DBGU_RPR    (*((reg32_t *)(DBGU_BASE + PERIPH_RPR_OFF)))    ///<PDC receive pointer register.
00095 #define DBGU_RCR    (*((reg32_t *)(DBGU_BASE + PERIPH_RCR_OFF)))    ///<PDC receive counter register.
00096 #define DBGU_TPR    (*((reg32_t *)(DBGU_BASE + PERIPH_TPR_OFF)))    ///<PDC transmit pointer register.
00097 #define DBGU_TCR    (*((reg32_t *)(DBGU_BASE + PERIPH_TCR_OFF)))    ///<PDC transmit counter register.
00098 #define DBGU_RNPR   (*((reg32_t *)(DBGU_BASE + PERIPH_RNPR_OFF)))   ///<PDC receive next pointer register.
00099 #define DBGU_RNCR   (*((reg32_t *)(DBGU_BASE + PERIPH_RNCR_OFF)))   ///<PDC receive next counter register.
00100 #define DBGU_TNPR   (*((reg32_t *)(DBGU_BASE + PERIPH_TNPR_OFF)))   ///<PDC transmit next pointer register.
00101 #define DBGU_TNCR   (*((reg32_t *)(DBGU_BASE + PERIPH_TNCR_OFF)))   ///<PDC transmit next counter register.
00102 #define DBGU_PTCR   (*((reg32_t *)(DBGU_BASE + PERIPH_PTCR_OFF)))   ///<PDC transfer control register.
00103 #define DBGU_PTSR   (*((reg32_t *)(DBGU_BASE + PERIPH_PTSR_OFF)))   ///<PDC transfer status register.
00104 #endif
00105
00106 #endif /* AT91_DBGU_H */


BeRTOS: at91_emac.h File Reference

  • cpu
  • arm
  • io
at91_emac.h File Reference

Go to the source code of this file.

Defines

#define | EMAC_NCR_OFF 0x00000000
Network Control Register.
#define | EMAC_NCR (*((reg32_t *)(EMAC_BASE + EMAC_NCR_OFF)))
Network Control register address.
#define | EMAC_LB 0
PHY loopback.
#define | EMAC_LLB 1
EMAC loopback.
#define | EMAC_RE 2
Receive enable.
#define | EMAC_TE 3
Transmit enable.
#define | EMAC_MPE 4
Management port enable.
#define | EMAC_CLRSTAT 5
Clear statistics registers.
#define | EMAC_INCSTAT 6
Increment statistics registers.
#define | EMAC_WESTAT 7
Write enable for statistics registers.
#define | EMAC_BP 8
Back pressure.
#define | EMAC_TSTART 9
Start Transmission.
#define | EMAC_THALT 10
Transmission halt.
#define | EMAC_NCFGR_OFF 0x00000004
Network Configuration Register.
#define | EMAC_NCFGR (*((reg32_t *)(EMAC_BASE + EMAC_NCFGR_OFF)))
Network configuration register address.
#define | EMAC_SPD 0
Speed, set for 100Mb.
#define | EMAC_FD 1
Full duplex.
#define | EMAC_JFRAME 3
Jumbo Frames.
#define | EMAC_CAF 4
Copy all frames.
#define | EMAC_NBC 5
No broadcast.
#define | EMAC_MTI 6
Multicast hash event enable.
#define | EMAC_UNI 7
Unicast hash enable.
#define | EMAC_BIG 8
Receive 1522 bytes.
#define | EMAC_CLK 0x00000C00
Clock divider mask.
#define | EMAC_CLK_HCLK_8 0x00000000
HCLK divided by 8.
#define | EMAC_CLK_HCLK_16 0x00000400
HCLK divided by 16.
#define | EMAC_CLK_HCLK_32 0x00000800
HCLK divided by 32.
#define | EMAC_CLK_HCLK_64 0x00000C00
HCLK divided by 64.
#define | EMAC_RTY 12
Retry test.
#define | EMAC_PAE 13
Pause enable.
#define | EMAC_RBOF 0x0000C000
Receive buffer offset.
#define | EMAC_RBOF_OFFSET_0 0x00000000
No offset from start of receive buffer.
#define | EMAC_RBOF_OFFSET_1 0x00004000
One byte offset from start of receive buffer.
#define | EMAC_RBOF_OFFSET_2 0x00008000
Two bytes offset from start of receive buffer.
#define | EMAC_RBOF_OFFSET_3 0x0000C000
Three bytes offset from start of receive buffer.
#define | EMAC_RLCE 16
Receive length field checking enable.
#define | EMAC_DRFCS 17
Discard receive FCS.
#define | EMAC_EFRHD 18
Allow receive during transmit in half duplex.
#define | EMAC_IRXFCS 19
Ignore received FCS.
#define | EMAC_NSR_OFF 0x00000008
Network Status Register.
#define | EMAC_NSR (*((reg32_t *)(EMAC_BASE + EMAC_NSR_OFF)))
Network Status register address.
#define | EMAC_MDIO 1
Status of MDIO input pin.
#define | EMAC_IDLE 2
Set when PHY is running.
#define | EMAC_TSR_OFF 0x00000014
Transmit Status Register.
#define | EMAC_TSR (*((reg32_t *)(EMAC_BASE + EMAC_TSR_OFF)))
Transmit Status register address.
#define | EMAC_UBR 0
Used bit read.
#define | EMAC_COL 1
Collision occurred.
#define | EMAC_RLES 2
Retry limit exceeded.
#define | EMAC_TGO 3
Transmit active.
#define | EMAC_BEX 4
Buffers exhausted mid frame.
#define | EMAC_COMP 5
Transmit complete.
#define | EMAC_UND 6
Transmit underrun.
#define | EMAC_RBQP_OFF 0x00000018
Buffer Queue Pointer Register.
#define | EMAC_RBQP (*((reg32_t *)(EMAC_BASE + EMAC_RBQP_OFF)))
Receive buffer queue pointer.
#define | EMAC_TBQP_OFF 0x0000001C
Transmit buffer queue pointer.
#define | EMAC_TBQP (*((reg32_t *)(EMAC_BASE + EMAC_TBQP_OFF)))
Transmit buffer queue pointer.
#define | EMAC_RSR_OFF 0x00000020
Receive Status Register.
#define | EMAC_RSR (*((reg32_t *)(EMAC_BASE + EMAC_RSR_OFF)))
Receive status register address.
#define | EMAC_BNA 0
Buffer not available.
#define | EMAC_REC 1
Frame received.
#define | EMAC_OVR 2
Receive overrun.
#define | EMAC_ISR_OFF 0x00000024
Interrupt Registers.
#define | EMAC_ISR (*((reg32_t *)(EMAC_BASE + EMAC_ISR_OFF)))
Status register address.
#define | EMAC_IER_OFF 0x00000028
Enable register offset.
#define | EMAC_IER (*((reg32_t *)(EMAC_BASE + EMAC_IER_OFF)))
Enable register address.
#define | EMAC_IDR_OFF 0x0000002C
Disable register offset.
#define | EMAC_IDR (*((reg32_t *)(EMAC_BASE + EMAC_IDR_OFF)))
Disable register address.
#define | EMAC_IMR_OFF 0x00000030
Mask register offset.
#define | EMAC_IMR (*((reg32_t *)(EMAC_BASE + EMAC_IMR_OFF)))
Mask register address.
#define | EMAC_MFD 0
Management frame done.
#define | EMAC_RCOMP 1
Receive complete.
#define | EMAC_RXUBR 2
Receive used bit read.
#define | EMAC_TXUBR 3
Transmit used bit read.
#define | EMAC_TUND 4
Ethernet transmit buffer underrun.
#define | EMAC_RLEX 5
Retry limit exceeded.
#define | EMAC_TXERR 6
Transmit error.
#define | EMAC_TCOMP 7
Transmit complete.
#define | EMAC_ROVR 10
Receive overrun.
#define | EMAC_HRESP 11
DMA bus error.
#define | EMAC_PFR 12
Pause frame received.
#define | EMAC_PTZ 13
Pause time zero.
#define | EMAC_MAN_OFF 0x00000034
PHY Maintenance Register.
#define | EMAC_MAN (*((reg32_t *)(EMAC_BASE + EMAC_MAN_OFF)))
PHY maintenance register address.
#define | EMAC_DATA 0x0000FFFF
PHY data mask.
#define | EMAC_CODE 0x00020000
Fixed value.
#define | EMAC_REGA 0x007C0000
PHY register address mask.
#define | EMAC_REGA_SHIFT 18
PHY register address mask.
#define | EMAC_PHYA 0x0F800000
PHY address mask.
#define | EMAC_PHYA_SHIFT 23
PHY address mask.
#define | EMAC_RW 0x30000000
PHY read/write command mask.
#define | EMAC_RW_READ 0x20000000
PHY read command.
#define | EMAC_RW_WRITE 0x10000000
PHY write command.
#define | EMAC_SOF 0x40000000
Fixed value.
#define | EMAC_PTR_OFF 0x00000038
Pause Time Register.
#define | EMAC_PTR (*((reg32_t *)(EMAC_BASE + EMAC_PTR_OFF)))
Pause time register address.
#define | EMAC_PTIME 0x0000FFFF
Pause time mask.
#define | EMAC_PFRR_OFF 0x0000003C
Statistics Registers.
#define | EMAC_PFRR (*((reg32_t *)(EMAC_BASE + EMAC_PFRR_OFF)))
Pause frames received register address.
#define | EMAC_FTO_OFF 0x00000040
Frames transmitted OK register offset.
#define | EMAC_FTO (*((reg32_t *)(EMAC_BASE + EMAC_FTO_OFF)))
Frames transmitted OK register address.
#define | EMAC_SCF_OFF 0x00000044
Single collision frame register offset.
#define | EMAC_SCF (*((reg32_t *)(EMAC_BASE + EMAC_SCF_OFF)))
Single collision frame register address.
#define | EMAC_MCF_OFF 0x00000048
Multiple collision frame register offset.
#define | EMAC_MCF (*((reg32_t *)(EMAC_BASE + EMAC_MCF_OFF)))
Multiple collision frame register address.
#define | EMAC_FRO_OFF 0x0000004C
Frames received OK register offset.
#define | EMAC_FRO (*((reg32_t *)(EMAC_BASE + EMAC_FRO_OFF)))
Frames received OK register address.
#define | EMAC_FCSE_OFF 0x00000050
Frame check sequence error register offset.
#define | EMAC_FCSE (*((reg32_t *)(EMAC_BASE + EMAC_FCSE_OFF)))
Frame check sequence error register address.
#define | EMAC_ALE_OFF 0x00000054
Alignment error register offset.
#define | EMAC_ALE (*((reg32_t *)(EMAC_BASE + EMAC_ALE_OFF)))
Alignment error register address.
#define | EMAC_DTF_OFF 0x00000058
Deferred transmission frame register offset.
#define | EMAC_DTF (*((reg32_t *)(EMAC_BASE + EMAC_DTF_OFF)))
Deferred transmission frame register address.
#define | EMAC_LCOL_OFF 0x0000005C
Late collision register offset.
#define | EMAC_LCOL (*((reg32_t *)(EMAC_BASE + EMAC_LCOL_OFF)))
Late collision register address.
#define | EMAC_ECOL_OFF 0x00000060
Excessive collision register offset.
#define | EMAC_ECOL (*((reg32_t *)(EMAC_BASE + EMAC_ECOL_OFF)))
Excessive collision register address.
#define | EMAC_TUNDR_OFF 0x00000064
Transmit underrun error register offset.
#define | EMAC_TUNDR (*((reg32_t *)(EMAC_BASE + EMAC_TUNDR_OFF)))
Transmit underrun error register address.
#define | EMAC_CSE_OFF 0x00000068
Carrier sense error register offset.
#define | EMAC_CSE (*((reg32_t *)(EMAC_BASE + EMAC_CSE_OFF)))
Carrier sense error register address.
#define | EMAC_RRE_OFF 0x0000006C
Receive resource error register offset.
#define | EMAC_RRE (*((reg32_t *)(EMAC_BASE + EMAC_RRE_OFF)))
Receive resource error register address.
#define | EMAC_ROV_OFF 0x00000070
Receive overrun errors register offset.
#define | EMAC_ROV (*((reg32_t *)(EMAC_BASE + EMAC_ROV_OFF)))
Receive overrun errors register address.
#define | EMAC_RSE_OFF 0x00000074
Receive symbol errors register offset.
#define | EMAC_RSE (*((reg32_t *)(EMAC_BASE + EMAC_RSE_OFF)))
Receive symbol errors register address.
#define | EMAC_ELE_OFF 0x00000078
Excessive length errors register offset.
#define | EMAC_ELE (*((reg32_t *)(EMAC_BASE + EMAC_ELE_OFF)))
Excessive length errors register address.
#define | EMAC_RJA_OFF 0x0000007C
Receive jabbers register offset.
#define | EMAC_RJA (*((reg32_t *)(EMAC_BASE + EMAC_RJA_OFF)))
Receive jabbers register address.
#define | EMAC_USF_OFF 0x00000080
Undersize frames register offset.
#define | EMAC_USF (*((reg32_t *)(EMAC_BASE + EMAC_USF_OFF)))
Undersize frames register address.
#define | EMAC_STE_OFF 0x00000084
SQE test error register offset.
#define | EMAC_STE (*((reg32_t *)(EMAC_BASE + EMAC_STE_OFF)))
SQE test error register address.
#define | EMAC_RLE_OFF 0x00000088
Receive length field mismatch register offset.
#define | EMAC_RLE (*((reg32_t *)(EMAC_BASE + EMAC_RLE_OFF)))
Receive length field mismatch register address.
#define | EMAC_HRB_OFF 0x00000090
MAC Adressing Registers.
#define | EMAC_HRB (*((reg32_t *)(EMAC_BASE + EMAC_HRB_OFF)))
Hash address bottom[31:0].
#define | EMAC_HRT_OFF 0x00000094
Hash address top[63:32].
#define | EMAC_HRT (*((reg32_t *)(EMAC_BASE + EMAC_HRT_OFF)))
Hash address top[63:32].
#define | EMAC_SA1L_OFF 0x00000098
Specific address 1 bottom, first 4 bytes.
#define | EMAC_SA1L (*((reg32_t *)(EMAC_BASE + EMAC_SA1L_OFF)))
Specific address 1 bottom, first 4 bytes.
#define | EMAC_SA1H_OFF 0x0000009C
Specific address 1 top, last 2 bytes.
#define | EMAC_SA1H (*((reg32_t *)(EMAC_BASE + EMAC_SA1H_OFF)))
Specific address 1 top, last 2 bytes.
#define | EMAC_SA2L_OFF 0x000000A0
Specific address 2 bottom, first 4 bytes.
#define | EMAC_SA2L (*((reg32_t *)(EMAC_BASE + EMAC_SA2L_OFF)))
Specific address 2 bottom, first 4 bytes.
#define | EMAC_SA2H_OFF 0x000000A4
Specific address 2 top, last 2 bytes.
#define | EMAC_SA2H (*((reg32_t *)(EMAC_BASE + EMAC_SA2H_OFF)))
Specific address 2 top, last 2 bytes.
#define | EMAC_SA3L_OFF 0x000000A8
Specific address 3 bottom, first 4 bytes.
#define | EMAC_SA3L (*((reg32_t *)(EMAC_BASE + EMAC_SA3L_OFF)))
Specific address 3 bottom, first 4 bytes.
#define | EMAC_SA3H_OFF 0x000000AC
Specific address 3 top, last 2 bytes.
#define | EMAC_SA3H (*((reg32_t *)(EMAC_BASE + EMAC_SA3H_OFF)))
Specific address 3 top, last 2 bytes.
#define | EMAC_SA4L_OFF 0x000000B0
Specific address 4 bottom, first 4 bytes.
#define | EMAC_SA4L (*((reg32_t *)(EMAC_BASE + EMAC_SA4L_OFF)))
Specific address 4 bottom, first 4 bytes.
#define | EMAC_SA4H_OFF 0x000000B4
Specific address 4 top, last 2 bytes.
#define | EMAC_SA4H (*((reg32_t *)(EMAC_BASE + EMAC_SA4H_OFF)))
Specific address 4 top, last 2 bytes.
#define | EMAC_TID_OFF 0x000000B8
Type ID Register.
#define | EMAC_TID (*((reg32_t *)(EMAC_BASE + EMAC_TID_OFF)))
Type ID checking register address.
#define | EMAC_USRIO_OFF 0x000000C0
User Input/Output Register.
#define | EMAC_USRIO (*((reg32_t *)(EMAC_BASE + EMAC_USRIO_OFF)))
User input/output register address.
#define | EMAC_RMII 0
Enable reduced MII.
#define | EMAC_CLKEN 1
Enable tranceiver input clock.

Detailed Description

Author:
Daniele Basile <asterix@develer.com>

AT91 Ethernet MAC 10/100 controller. This file is based on NUT/OS implementation. See license below.

Definition in file at91_emac.h.

Define Documentation

#define EMAC_HRB_OFF 0x00000090

MAC Adressing Registers.

Hash address bottom[31:0].

Definition at line 295 of file at91_emac.h.

#define EMAC_ISR_OFF 0x00000024

Interrupt Registers.

Status register offset.

Definition at line 187 of file at91_emac.h.

#define EMAC_MAN_OFF 0x00000034

PHY Maintenance Register.

PHY maintenance register offset.

Definition at line 217 of file at91_emac.h.

#define EMAC_NCFGR_OFF 0x00000004

Network Configuration Register.

Network configuration register offset.

Definition at line 104 of file at91_emac.h.

#define EMAC_NCR_OFF 0x00000000

Network Control Register.

Network control register offset.

Definition at line 81 of file at91_emac.h.

#define EMAC_NSR_OFF 0x00000008

Network Status Register.

Network Status register offset.

Definition at line 139 of file at91_emac.h.

#define EMAC_PFRR_OFF 0x0000003C

Statistics Registers.

Pause frames received register offset.

Definition at line 245 of file at91_emac.h.

#define EMAC_PTR_OFF 0x00000038

Pause Time Register.

Pause time register offset.

Definition at line 236 of file at91_emac.h.

#define EMAC_RBQP_OFF 0x00000018

Buffer Queue Pointer Register.

Receive buffer queue pointer.

Definition at line 168 of file at91_emac.h.

#define EMAC_RSR_OFF 0x00000020

Receive Status Register.

Receive status register offset.

Definition at line 178 of file at91_emac.h.

#define EMAC_TID_OFF 0x000000B8

Type ID Register.

Type ID checking register offset.

Definition at line 322 of file at91_emac.h.

#define EMAC_TSR_OFF 0x00000014

Transmit Status Register.

Transmit Status register offset.

Definition at line 151 of file at91_emac.h.

#define EMAC_USRIO_OFF 0x000000C0

User Input/Output Register.

User input/output register offset.

Definition at line 334 of file at91_emac.h.


BeRTOS: at91_emac.h Source File

  • cpu
  • arm
  • io
at91_emac.h
Go to the documentation of this file.
00001
00039 /*
00040  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00041  *
00042  * Redistribution and use in source and binary forms, with or without
00043  * modification, are permitted provided that the following conditions
00044  * are met:
00045  *
00046  * 1. Redistributions of source code must retain the above copyright
00047  *    notice, this list of conditions and the following disclaimer.
00048  * 2. Redistributions in binary form must reproduce the above copyright
00049  *    notice, this list of conditions and the following disclaimer in the
00050  *    documentation and/or other materials provided with the distribution.
00051  * 3. Neither the name of the copyright holders nor the names of
00052  *    contributors may be used to endorse or promote products derived
00053  *    from this software without specific prior written permission.
00054  *
00055  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00056  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00057  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00058  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00059  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00060  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00061  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00062  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00063  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00064  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00065  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00066  * SUCH DAMAGE.
00067  *
00068  * For additional information see http://www.ethernut.de/
00069  */
00070
00071 #ifndef AT91_EMAC_H
00072 #define AT91_EMAC_H
00073
00074
00080 /* \{ */
00081 #define EMAC_NCR_OFF                0x00000000  ///< Network control register offset.
00082 #define EMAC_NCR    (*((reg32_t *)(EMAC_BASE +  EMAC_NCR_OFF)))  ///< Network Control register address.
00083 #define EMAC_LB                              0  ///< PHY loopback.
00084 #define EMAC_LLB                             1   ///< EMAC loopback.
00085 #define EMAC_RE                              2  ///< Receive enable.
00086 #define EMAC_TE                              3  ///< Transmit enable.
00087 #define EMAC_MPE                             4  ///< Management port enable.
00088 #define EMAC_CLRSTAT                         5  ///< Clear statistics registers.
00089 #define EMAC_INCSTAT                         6  ///< Increment statistics registers.
00090 #define EMAC_WESTAT                          7  ///< Write enable for statistics registers.
00091 #define EMAC_BP                              8  ///< Back pressure.
00092 #define EMAC_TSTART                          9  ///< Start Transmission.
00093 #define EMAC_THALT                          10  ///< Transmission halt.
00094 // Not in sam7x
00095 //#define EMAC_TPFR                           11  ///< Transmit pause frame.
00096 //#define EMAC_TZQ                            12  ///< Transmit zero quantum pause frame.
00097 /* \} */
00098
00103 /* \{ */
00104 #define EMAC_NCFGR_OFF              0x00000004  ///< Network configuration register offset.
00105 #define EMAC_NCFGR   (*((reg32_t *)(EMAC_BASE +  EMAC_NCFGR_OFF))) ///< Network configuration register address.
00106 #define EMAC_SPD                             0  ///< Speed, set for 100Mb.
00107 #define EMAC_FD                              1  ///< Full duplex.
00108 #define EMAC_JFRAME                          3  ///< Jumbo Frames.
00109 #define EMAC_CAF                             4  ///< Copy all frames.
00110 #define EMAC_NBC                             5  ///< No broadcast.
00111 #define EMAC_MTI                             6  ///< Multicast hash event enable.
00112 #define EMAC_UNI                             7  ///< Unicast hash enable.
00113 #define EMAC_BIG                             8  ///< Receive 1522 bytes.
00114 // Not in sam7x
00115 //#define EMAC_EAE                           9  ///< External address match enable.
00116 #define EMAC_CLK                    0x00000C00  ///< Clock divider mask.
00117 #define EMAC_CLK_HCLK_8             0x00000000  ///< HCLK divided by 8.
00118 #define EMAC_CLK_HCLK_16            0x00000400  ///< HCLK divided by 16.
00119 #define EMAC_CLK_HCLK_32            0x00000800  ///< HCLK divided by 32.
00120 #define EMAC_CLK_HCLK_64            0x00000C00  ///< HCLK divided by 64.
00121 #define EMAC_RTY                            12  ///< Retry test.
00122 #define EMAC_PAE                            13  ///< Pause enable.
00123 #define EMAC_RBOF                   0x0000C000  ///< Receive buffer offset.
00124 #define EMAC_RBOF_OFFSET_0          0x00000000  ///< No offset from start of receive buffer.
00125 #define EMAC_RBOF_OFFSET_1          0x00004000  ///< One byte offset from start of receive buffer.
00126 #define EMAC_RBOF_OFFSET_2          0x00008000  ///< Two bytes offset from start of receive buffer.
00127 #define EMAC_RBOF_OFFSET_3          0x0000C000  ///< Three bytes offset from start of receive buffer.
00128 #define EMAC_RLCE                           16  ///< Receive length field checking enable.
00129 #define EMAC_DRFCS                          17  ///< Discard receive FCS.
00130 #define EMAC_EFRHD                          18  ///< Allow receive during transmit in half duplex.
00131 #define EMAC_IRXFCS                         19  ///< Ignore received FCS.
00132 /* \} */
00133
00138 /* \{ */
00139 #define EMAC_NSR_OFF                0x00000008  ///< Network Status register offset.
00140 #define EMAC_NSR    (*((reg32_t *)(EMAC_BASE +  EMAC_NSR_OFF)))  ///< Network Status register address.
00141 // Not in sam7x
00142 //#define EMAC_LINKR                         0  ///< .
00143 #define EMAC_MDIO                            1  ///< Status of MDIO input pin.
00144 #define EMAC_IDLE                            2  ///< Set when PHY is running.
00145 /* \} */
00146
00150 /* \{ */
00151 #define EMAC_TSR_OFF                0x00000014  ///< Transmit Status register offset.
00152 #define EMAC_TSR    (*((reg32_t *)(EMAC_BASE +  EMAC_TSR_OFF)))  ///< Transmit Status register address.
00153
00154 #define EMAC_UBR                             0  ///< Used bit read.
00155 #define EMAC_COL                             1  ///< Collision occurred.
00156 #define EMAC_RLES                            2  ///< Retry limit exceeded.
00157 #define EMAC_TGO                             3  ///< Transmit active.
00158 #define EMAC_BEX                             4  ///< Buffers exhausted mid frame.
00159 #define EMAC_COMP                            5  ///< Transmit complete.
00160 #define EMAC_UND                             6  ///< Transmit underrun.
00161 /* \} */
00162
00167 /* \{ */
00168 #define EMAC_RBQP_OFF               0x00000018  ///< Receive buffer queue pointer.
00169 #define EMAC_RBQP   (*((reg32_t *)(EMAC_BASE +  EMAC_RBQP_OFF))) ///< Receive buffer queue pointer.
00170 #define EMAC_TBQP_OFF               0x0000001C  ///< Transmit buffer queue pointer.
00171 #define EMAC_TBQP   (*((reg32_t *)(EMAC_BASE +  EMAC_TBQP_OFF))) ///< Transmit buffer queue pointer.
00172 /* \} */
00173
00177 /* \{ */
00178 #define EMAC_RSR_OFF                0x00000020  ///< Receive status register offset.
00179 #define EMAC_RSR    (*((reg32_t *)(EMAC_BASE +  EMAC_RSR_OFF)))  ///< Receive status register address.
00180 #define EMAC_BNA                             0  ///< Buffer not available.
00181 #define EMAC_REC                             1  ///< Frame received.
00182 #define EMAC_OVR                             2  ///< Receive overrun.
00183 /* \} */
00184
00186 /* \{ */
00187 #define EMAC_ISR_OFF                0x00000024  ///< Status register offset.
00188 #define EMAC_ISR    (*((reg32_t *)(EMAC_BASE +  EMAC_ISR_OFF)))  ///< Status register address.
00189 #define EMAC_IER_OFF                0x00000028  ///< Enable register offset.
00190 #define EMAC_IER    (*((reg32_t *)(EMAC_BASE +  EMAC_IER_OFF)))  ///< Enable register address.
00191 #define EMAC_IDR_OFF                0x0000002C  ///< Disable register offset.
00192 #define EMAC_IDR    (*((reg32_t *)(EMAC_BASE +  EMAC_IDR_OFF)))  ///< Disable register address.
00193 #define EMAC_IMR_OFF                0x00000030  ///< Mask register offset.
00194 #define EMAC_IMR    (*((reg32_t *)(EMAC_BASE +  EMAC_IMR_OFF)))  ///< Mask register address.
00195
00196 #define EMAC_MFD                             0  ///< Management frame done.
00197 #define EMAC_RCOMP                           1  ///< Receive complete.
00198 #define EMAC_RXUBR                           2  ///< Receive used bit read.
00199 #define EMAC_TXUBR                           3  ///< Transmit used bit read.
00200 #define EMAC_TUND                            4  ///< Ethernet transmit buffer underrun.
00201 #define EMAC_RLEX                            5  ///< Retry limit exceeded.
00202 #define EMAC_TXERR                           6  ///< Transmit error.
00203 #define EMAC_TCOMP                           7  ///< Transmit complete.
00204 //Not in sam7x
00205 //#define EMAC_LINK                          8  ///< .
00206 #define EMAC_ROVR                           10  ///< Receive overrun.
00207 #define EMAC_HRESP                          11  ///< DMA bus error.
00208 #define EMAC_PFR                            12  ///< Pause frame received.
00209 #define EMAC_PTZ                            13  ///< Pause time zero.
00210 /* \} */
00211
00216 /* \{ */
00217 #define EMAC_MAN_OFF                0x00000034  ///< PHY maintenance register offset.
00218 #define EMAC_MAN    (*((reg32_t *)(EMAC_BASE +  EMAC_MAN_OFF)))  ///< PHY maintenance register address.
00219 #define EMAC_DATA                   0x0000FFFF  ///< PHY data mask.
00220 #define EMAC_CODE                   0x00020000  ///< Fixed value.
00221 #define EMAC_REGA                   0x007C0000  ///< PHY register address mask.
00222 #define EMAC_REGA_SHIFT                     18  ///< PHY register address mask.
00223 #define EMAC_PHYA                   0x0F800000  ///< PHY address mask.
00224 #define EMAC_PHYA_SHIFT                     23  ///< PHY address mask.
00225 #define EMAC_RW                     0x30000000  ///< PHY read/write command mask.
00226 #define EMAC_RW_READ                0x20000000  ///< PHY read command.
00227 #define EMAC_RW_WRITE               0x10000000  ///< PHY write command.
00228 #define EMAC_SOF                    0x40000000  ///< Fixed value.
00229 /* \} */
00230
00235 /* \{ */
00236 #define EMAC_PTR_OFF                0x00000038  ///< Pause time register offset.
00237 #define EMAC_PTR    (*((reg32_t *)(EMAC_BASE +  EMAC_PTR_OFF)))  ///< Pause time register address.
00238 #define EMAC_PTIME                  0x0000FFFF  ///< Pause time mask.
00239 /* \} */
00240
00244 /* \{ */
00245 #define EMAC_PFRR_OFF               0x0000003C  ///< Pause frames received register offset.
00246 #define EMAC_PFRR  (*((reg32_t *)(EMAC_BASE +  EMAC_PFRR_OFF)))  ///< Pause frames received register address.
00247 #define EMAC_FTO_OFF                0x00000040  ///< Frames transmitted OK register offset.
00248 #define EMAC_FTO    (*((reg32_t *)(EMAC_BASE +  EMAC_FTO_OFF)))  ///< Frames transmitted OK register address.
00249 #define EMAC_SCF_OFF                0x00000044  ///< Single collision frame register offset.
00250 #define EMAC_SCF    (*((reg32_t *)(EMAC_BASE +  EMAC_SCF_OFF)))  ///< Single collision frame register address.
00251 #define EMAC_MCF_OFF                0x00000048  ///< Multiple collision frame register offset.
00252 #define EMAC_MCF    (*((reg32_t *)(EMAC_BASE +  EMAC_MCF_OFF)))  ///< Multiple collision frame register address.
00253 #define EMAC_FRO_OFF                0x0000004C  ///< Frames received OK register offset.
00254 #define EMAC_FRO    (*((reg32_t *)(EMAC_BASE +  EMAC_FRO_OFF)))  ///< Frames received OK register address.
00255 #define EMAC_FCSE_OFF               0x00000050  ///< Frame check sequence error register offset.
00256 #define EMAC_FCSE   (*((reg32_t *)(EMAC_BASE +  EMAC_FCSE_OFF))) ///< Frame check sequence error register address.
00257 #define EMAC_ALE_OFF                0x00000054  ///< Alignment error register offset.
00258 #define EMAC_ALE    (*((reg32_t *)(EMAC_BASE +  EMAC_ALE_OFF)))  ///< Alignment error register address.
00259 #define EMAC_DTF_OFF                0x00000058  ///< Deferred transmission frame register offset.
00260 #define EMAC_DTF    (*((reg32_t *)(EMAC_BASE +  EMAC_DTF_OFF)))  ///< Deferred transmission frame register address.
00261 #define EMAC_LCOL_OFF               0x0000005C  ///< Late collision register offset.
00262 #define EMAC_LCOL   (*((reg32_t *)(EMAC_BASE +  EMAC_LCOL_OFF))) ///< Late collision register address.
00263 #define EMAC_ECOL_OFF               0x00000060  ///< Excessive collision register offset.
00264 #define EMAC_ECOL   (*((reg32_t *)(EMAC_BASE +  EMAC_ECOL_OFF))) ///< Excessive collision register address.
00265 #define EMAC_TUNDR_OFF              0x00000064  ///< Transmit underrun error register offset.
00266 #define EMAC_TUNDR (*((reg32_t *)(EMAC_BASE +  EMAC_TUNDR_OFF))) ///< Transmit underrun error register address.
00267 #define EMAC_CSE_OFF                0x00000068  ///< Carrier sense error register offset.
00268 #define EMAC_CSE    (*((reg32_t *)(EMAC_BASE +  EMAC_CSE_OFF)))  ///< Carrier sense error register address.
00269 #define EMAC_RRE_OFF                0x0000006C  ///< Receive resource error register offset.
00270 #define EMAC_RRE    (*((reg32_t *)(EMAC_BASE +  EMAC_RRE_OFF)))  ///< Receive resource error register address.
00271 #define EMAC_ROV_OFF                0x00000070  ///< Receive overrun errors register offset.
00272 #define EMAC_ROV    (*((reg32_t *)(EMAC_BASE +  EMAC_ROV_OFF)))  ///< Receive overrun errors register address.
00273 #define EMAC_RSE_OFF                0x00000074  ///< Receive symbol errors register offset.
00274 #define EMAC_RSE    (*((reg32_t *)(EMAC_BASE +  EMAC_RSE_OFF)))  ///< Receive symbol errors register address.
00275 #define EMAC_ELE_OFF                0x00000078  ///< Excessive length errors register offset.
00276 #define EMAC_ELE    (*((reg32_t *)(EMAC_BASE +  EMAC_ELE_OFF)))  ///< Excessive length errors register address.
00277 #define EMAC_RJA_OFF                0x0000007C  ///< Receive jabbers register offset.
00278 #define EMAC_RJA    (*((reg32_t *)(EMAC_BASE +  EMAC_RJA_OFF)))  ///< Receive jabbers register address.
00279 #define EMAC_USF_OFF                0x00000080  ///< Undersize frames register offset.
00280 #define EMAC_USF    (*((reg32_t *)(EMAC_BASE +  EMAC_USF_OFF)))  ///< Undersize frames register address.
00281 #define EMAC_STE_OFF                0x00000084  ///< SQE test error register offset.
00282 #define EMAC_STE    (*((reg32_t *)(EMAC_BASE +  EMAC_STE_OFF)))  ///< SQE test error register address.
00283 #define EMAC_RLE_OFF                0x00000088  ///< Receive length field mismatch register offset.
00284 #define EMAC_RLE    (*((reg32_t *)(EMAC_BASE +  EMAC_RLE_OFF)))  ///< Receive length field mismatch register address.
00285 // Not in sam7x
00286 //#define EMAC_TPF_OFF                0x0000008C  ///< Transmitted pause frames register offset.
00287 //#define EMAC_TPF    (*((reg32_t *)(EMAC_BASE +  EMAC_TPF_OFF)  ///< Transmitted pause frames register address.
00288 /* \} */
00289
00294 /* \{ */
00295 #define EMAC_HRB_OFF                0x00000090  ///< Hash address bottom[31:0].
00296 #define EMAC_HRB    (*((reg32_t *)(EMAC_BASE +  EMAC_HRB_OFF)))  ///< Hash address bottom[31:0].
00297 #define EMAC_HRT_OFF                0x00000094  ///< Hash address top[63:32].
00298 #define EMAC_HRT    (*((reg32_t *)(EMAC_BASE +  EMAC_HRT_OFF)))  ///< Hash address top[63:32].
00299 #define EMAC_SA1L_OFF               0x00000098  ///< Specific address 1 bottom, first 4 bytes.
00300 #define EMAC_SA1L   (*((reg32_t *)(EMAC_BASE +  EMAC_SA1L_OFF))) ///< Specific address 1 bottom, first 4 bytes.
00301 #define EMAC_SA1H_OFF               0x0000009C  ///< Specific address 1 top, last 2 bytes.
00302 #define EMAC_SA1H   (*((reg32_t *)(EMAC_BASE +  EMAC_SA1H_OFF))) ///< Specific address 1 top, last 2 bytes.
00303 #define EMAC_SA2L_OFF               0x000000A0  ///< Specific address 2 bottom, first 4 bytes.
00304 #define EMAC_SA2L   (*((reg32_t *)(EMAC_BASE +  EMAC_SA2L_OFF))) ///< Specific address 2 bottom, first 4 bytes.
00305 #define EMAC_SA2H_OFF               0x000000A4  ///< Specific address 2 top, last 2 bytes.
00306 #define EMAC_SA2H   (*((reg32_t *)(EMAC_BASE +  EMAC_SA2H_OFF))) ///< Specific address 2 top, last 2 bytes.
00307 #define EMAC_SA3L_OFF               0x000000A8  ///< Specific address 3 bottom, first 4 bytes.
00308 #define EMAC_SA3L   (*((reg32_t *)(EMAC_BASE +  EMAC_SA3L_OFF))) ///< Specific address 3 bottom, first 4 bytes.
00309 #define EMAC_SA3H_OFF               0x000000AC  ///< Specific address 3 top, last 2 bytes.
00310 #define EMAC_SA3H   (*((reg32_t *)(EMAC_BASE +  EMAC_SA3H_OFF))) ///< Specific address 3 top, last 2 bytes.
00311 #define EMAC_SA4L_OFF               0x000000B0  ///< Specific address 4 bottom, first 4 bytes.
00312 #define EMAC_SA4L   (*((reg32_t *)(EMAC_BASE +  EMAC_SA4L_OFF))) ///< Specific address 4 bottom, first 4 bytes.
00313 #define EMAC_SA4H_OFF               0x000000B4  ///< Specific address 4 top, last 2 bytes.
00314 #define EMAC_SA4H   (*((reg32_t *)(EMAC_BASE +  EMAC_SA4H_OFF))) ///< Specific address 4 top, last 2 bytes.
00315 /* \} */
00316
00321 /* \{ */
00322 #define EMAC_TID_OFF                0x000000B8  ///< Type ID checking register offset.
00323 #define EMAC_TID    (*((reg32_t *)(EMAC_BASE +  EMAC_TID_OFF))) ///< Type ID checking register address.
00324 // Not in sam7x
00325 //#define EMAC_TPQ_OFF                0x000000BC  ///< Transmit pause quantum register offset.
00326 //#define EMAC_TPQ    (*((reg32_t *)(EMAC_BASE +  EMAC_TPQ_OFF)))  ///< Transmit pause quantum register address.
00327 /* \} */
00328
00333 /* \{ */
00334 #define EMAC_USRIO_OFF              0x000000C0  ///< User input/output register offset.
00335 #define EMAC_USRIO (*((reg32_t *)(EMAC_BASE +  EMAC_USRIO_OFF))) ///< User input/output register address.
00336
00337 #define EMAC_RMII                            0  ///< Enable reduced MII.
00338 #define EMAC_CLKEN                           1  ///< Enable tranceiver input clock.
00339 /* \} */
00340
00341 // Not in sam7x
00342 /*
00343  * Wake On LAN Register
00344  *
00345  *
00346 * \{ *
00347 #define EMAC_WOL_OFF                0x000000C4  ///< Wake On LAN register offset.
00348 #define EMAC_WOL    (*((reg32_t *)(EMAC_BASE +  EMAC_WOL_OFF)  ///< Wake On LAN register address.
00349 #define EMAC_IP                     0x0000FFFF  ///< ARP request IP address mask.
00350 #define EMAC_MAG                    0x00010000  ///< Magic packet event enable.
00351 #define EMAC_ARP                    0x00020000  ///< ARP request event enable.
00352 #define EMAC_SA1                    0x00040000  ///< Specific address register 1 event enable.
00353 * \} *
00354
00355 ** Revision Register *
00356 * \{ *
00357 #define EMAC_REV_OFF                0x000000FC  ///< Revision register offset.
00358 #define EMAC_REV    (*((reg32_t *)(EMAC_BASE +  EMAC_REV_OFF)  ///< Revision register address.
00359 #define EMAC_REVREF                 0x0000FFFF  ///< Revision.
00360 #define EMAC_PARTREF                0xFFFF0000  ///< Part.
00361 * \} *
00362 */
00363
00364 #endif /* AT91_EMAC_H */


BeRTOS: at91_mc.h File Reference

  • cpu
  • arm
  • io
Defines
at91_mc.h File Reference

Go to the source code of this file.

Defines

#define | MC_RCR_OFF 0x00000000
MC remap control register offset.
#define | MC_RCR (*((reg32_t *)(MC_BASE + MC_RCR_OFF)))
MC remap control register address.
#define | MC_RCB 0
Remap command.
#define | MC_ASR_OFF 0x00000004
MC abort status register offset.
#define | MC_ASR (*((reg32_t *)(MC_BASE + MC_ASR_OFF)))
MC abort status register address.
#define | MC_UNDADD 0
Undefined Addess Abort status.
#define | MC_MISADD 1
Misaligned Addess Abort status.
#define | MC_ABTSZ_MASK 0x00000300
Abort size status mask.
#define | MC_ABTSZ_BYTE 0x00000000
Byte size abort.
#define | MC_ABTSZ_HWORD 0x00000100
Half-word size abort.
#define | MC_ABTSZ_WORD 0x00000200
Word size abort.
#define | MC_ABTTYP_MASK 0x00000C00
Abort type status mask.
#define | MC_ABTTYP_DATAR 0x00000000
Data read abort.
#define | MC_ABTTYP_DATAW 0x00000400
Data write abort.
#define | MC_ABTTYP_FETCH 0x00000800
Code fetch abort.
#define | MC_MST_PDC 0x00020000
PDC abort source.
#define | MC_MST_ARM 0x00040000
ARM abort source.
#define | MC_SVMST_PDC 0x02000000
Saved PDC abort source.
#define | MC_SVMST_ARM 0x04000000
Saved ARM abort source.
#define | MC_AASR_OFF 0x00000008
MC abort address status register offset.
#define | MC_AASR (*((reg32_t *)(MC_BASE + MC_AASR_OFF)))
MC abort address status register address.
#define | MC_FMR_OFF 0x00000060
MC flash mode register offset.
#define | MC_FMR (*((reg32_t *)(MC_BASE + MC_FMR_OFF)))
MC flash mode register address.
#define | MC_FRDY 0
Flash ready.
#define | MC_LOCKE 2
Lock error.
#define | MC_PROGE 3
Programming error.
#define | MC_NEBP 7
No erase before programming.
#define | MC_FWS_MASK 0x00000300
Flash wait state mask.
#define | MC_FWS_1R2W 0x00000000
1 cycle for read, 2 for write operations.
#define | MC_FWS_2R3W 0x00000100
2 cycles for read, 3 for write operations.
#define | MC_FWS_3R4W 0x00000200
3 cycles for read, 4 for write operations.
#define | MC_FWS_4R4W 0x00000300
4 cycles for read and write operations.
#define | MC_FMCN_MASK 0x00FF0000
Flash microsecond cycle number mask.
#define | MC_FMCN_SHIFT 16
Flash microsecond cycle number shift.
#define | MC_FCR_OFF 0x00000064
MC flash command register offset.
#define | MC_FCR (*((reg32_t *)(MC_BASE + MC_FCR_OFF)))
MC flash command register address.
#define | MC_FCMD_MASK 0x0000000F
Flash command mask.
#define | MC_FCMD_NOP 0x00000000
No command.
#define | MC_FCMD_WP 0x00000001
Write page.
#define | MC_FCMD_SLB 0x00000002
Set lock bit.
#define | MC_FCMD_WPL 0x00000003
Write page and lock.
#define | MC_FCMD_CLB 0x00000004
Clear lock bit.
#define | MC_FCMD_EA 0x00000008
Erase all.
#define | MC_FCMD_SGPB 0x0000000B
Set general purpose NVM bit.
#define | MC_FCMD_CGPB 0x0000000D
Clear general purpose NVM bit.
#define | MC_FCMD_SSB 0x0000000F
Set security bit.
#define | MC_PAGEN_MASK 0x0003FF00
Page number mask.
#define | MC_KEY 0x5A000000
Writing protect key.
#define | MC_FSR_OFF 0x00000068
MC flash status register offset.
#define | MC_FSR (*((reg32_t *)(MC_BASE + MC_FSR_OFF)))
MC flash status register address.
#define | MC_SECURITY 4
Security bit status.
#define | MC_GPNVM0 8
General purpose NVM bit 0.
#define | MC_GPNVM1 9
General purpose NVM bit 1.
#define | MC_GPNVM2 10
General purpose NVM bit 2.
#define | MC_LOCKS0 16
Lock region 0 lock status.
#define | MC_LOCKS1 17
Lock region 1 lock status.
#define | MC_LOCKS2 18
Lock region 2 lock status.
#define | MC_LOCKS3 19
Lock region 3 lock status.
#define | MC_LOCKS4 20
Lock region 4 lock status.
#define | MC_LOCKS5 21
Lock region 5 lock status.
#define | MC_LOCKS6 22
Lock region 6 lock status.
#define | MC_LOCKS7 23
Lock region 7 lock status.
#define | MC_LOCKS8 24
Lock region 8 lock status.
#define | MC_LOCKS9 25
Lock region 9 lock status.
#define | MC_LOCKS10 26
Lock region 10 lock status.
#define | MC_LOCKS11 27
Lock region 11 lock status.
#define | MC_LOCKS12 28
Lock region 12 lock status.
#define | MC_LOCKS13 29
Lock region 13 lock status.
#define | MC_LOCKS14 30
Lock region 14 lock status.
#define | MC_LOCKS15 31
Lock region 15 lock status.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

AT91 Memory controller. This file is based on NUT/OS implementation. See license below.

Definition in file at91_mc.h.


BeRTOS: at91_mc.h Source File

  • cpu
  • arm
  • io
at91_mc.h
Go to the documentation of this file.
00001
00040 /*
00041  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00042  *
00043  * Redistribution and use in source and binary forms, with or without
00044  * modification, are permitted provided that the following conditions
00045  * are met:
00046  *
00047  * 1. Redistributions of source code must retain the above copyright
00048  *    notice, this list of conditions and the following disclaimer.
00049  * 2. Redistributions in binary form must reproduce the above copyright
00050  *    notice, this list of conditions and the following disclaimer in the
00051  *    documentation and/or other materials provided with the distribution.
00052  * 3. Neither the name of the copyright holders nor the names of
00053  *    contributors may be used to endorse or promote products derived
00054  *    from this software without specific prior written permission.
00055  *
00056  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00057  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00058  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00059  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00060  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00062  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00063  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00064  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00065  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00066  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00067  * SUCH DAMAGE.
00068  *
00069  * For additional information see http://www.ethernut.de/
00070  */
00071
00072 #ifndef AT91_MC_H
00073 #define AT91_MC_H
00074
00075 #define MC_RCR_OFF              0x00000000      ///< MC remap control register offset.
00076 #define MC_RCR      (*((reg32_t *)(MC_BASE + MC_RCR_OFF)))      ///< MC remap control register address.
00077 #define MC_RCB                           0      ///< Remap command.
00078
00079 #define MC_ASR_OFF              0x00000004      ///< MC abort status register offset.
00080 #define MC_ASR      (*((reg32_t *)(MC_BASE + MC_ASR_OFF)))      ///< MC abort status register address.
00081 #define MC_UNDADD                        0      ///< Undefined Addess Abort status.
00082 #define MC_MISADD                        1      ///< Misaligned Addess Abort status.
00083 #define MC_ABTSZ_MASK           0x00000300      ///< Abort size status mask.
00084 #define MC_ABTSZ_BYTE           0x00000000      ///< Byte size abort.
00085 #define MC_ABTSZ_HWORD          0x00000100      ///< Half-word size abort.
00086 #define MC_ABTSZ_WORD           0x00000200      ///< Word size abort.
00087 #define MC_ABTTYP_MASK          0x00000C00      ///< Abort type status mask.
00088 #define MC_ABTTYP_DATAR         0x00000000      ///< Data read abort.
00089 #define MC_ABTTYP_DATAW         0x00000400      ///< Data write abort.
00090 #define MC_ABTTYP_FETCH         0x00000800      ///< Code fetch abort.
00091 #define MC_MST_PDC              0x00020000      ///< PDC abort source.
00092 #define MC_MST_ARM              0x00040000      ///< ARM abort source.
00093 #define MC_SVMST_PDC            0x02000000      ///< Saved PDC abort source.
00094 #define MC_SVMST_ARM            0x04000000      ///< Saved ARM abort source.
00095
00096 #define MC_AASR_OFF             0x00000008      ///< MC abort address status register offset.
00097 #define MC_AASR     (*((reg32_t *)(MC_BASE + MC_AASR_OFF)))     ///< MC abort address status register address.
00098
00099 #define MC_FMR_OFF              0x00000060      ///< MC flash mode register offset.
00100 #define MC_FMR      (*((reg32_t *)(MC_BASE + MC_FMR_OFF)))      ///< MC flash mode register address.
00101 #define MC_FRDY                          0      ///< Flash ready.
00102 #define MC_LOCKE                         2      ///< Lock error.
00103 #define MC_PROGE                         3      ///< Programming error.
00104 #define MC_NEBP                          7      ///< No erase before programming.
00105 #define MC_FWS_MASK             0x00000300      ///< Flash wait state mask.
00106 #define MC_FWS_1R2W             0x00000000      ///< 1 cycle for read, 2 for write operations.
00107 #define MC_FWS_2R3W             0x00000100      ///< 2 cycles for read, 3 for write operations.
00108 #define MC_FWS_3R4W             0x00000200      ///< 3 cycles for read, 4 for write operations.
00109 #define MC_FWS_4R4W             0x00000300      ///< 4 cycles for read and write operations.
00110 #define MC_FMCN_MASK            0x00FF0000      ///< Flash microsecond cycle number mask.
00111 #define MC_FMCN_SHIFT                   16      ///< Flash microsecond cycle number shift.
00112
00113 #define MC_FCR_OFF              0x00000064      ///< MC flash command register offset.
00114 #define MC_FCR      (*((reg32_t *)(MC_BASE + MC_FCR_OFF)))      ///< MC flash command register address.
00115 #define MC_FCMD_MASK            0x0000000F      ///< Flash command mask.
00116 #define MC_FCMD_NOP             0x00000000      ///< No command.
00117 #define MC_FCMD_WP              0x00000001      ///< Write page.
00118 #define MC_FCMD_SLB             0x00000002      ///< Set lock bit.
00119 #define MC_FCMD_WPL             0x00000003      ///< Write page and lock.
00120 #define MC_FCMD_CLB             0x00000004      ///< Clear lock bit.
00121 #define MC_FCMD_EA              0x00000008      ///< Erase all.
00122 #define MC_FCMD_SGPB            0x0000000B      ///< Set general purpose NVM bit.
00123 #define MC_FCMD_CGPB            0x0000000D      ///< Clear general purpose NVM bit.
00124 #define MC_FCMD_SSB             0x0000000F      ///< Set security bit.
00125 #define MC_PAGEN_MASK           0x0003FF00      ///< Page number mask.
00126 #define MC_KEY                  0x5A000000      ///< Writing protect key.
00127
00128 #define MC_FSR_OFF              0x00000068      ///< MC flash status register offset.
00129 #define MC_FSR      (*((reg32_t *)(MC_BASE + MC_FSR_OFF)))      ///< MC flash status register address.
00130 #define MC_SECURITY                      4      ///< Security bit status.
00131
00132 #define MC_GPNVM0                        8      ///< General purpose NVM bit 0.
00133 #define MC_GPNVM1                        9      ///< General purpose NVM bit 1.
00134 #define MC_GPNVM2                       10      ///< General purpose NVM bit 2.
00135
00136 #define MC_LOCKS0                       16      ///< Lock region 0 lock status.
00137 #define MC_LOCKS1                       17      ///< Lock region 1 lock status.
00138 #define MC_LOCKS2                       18      ///< Lock region 2 lock status.
00139 #define MC_LOCKS3                       19      ///< Lock region 3 lock status.
00140 #define MC_LOCKS4                       20      ///< Lock region 4 lock status.
00141 #define MC_LOCKS5                       21      ///< Lock region 5 lock status.
00142 #define MC_LOCKS6                       22      ///< Lock region 6 lock status.
00143 #define MC_LOCKS7                       23      ///< Lock region 7 lock status.
00144 #define MC_LOCKS8                       24      ///< Lock region 8 lock status.
00145 #define MC_LOCKS9                       25      ///< Lock region 9 lock status.
00146 #define MC_LOCKS10                      26      ///< Lock region 10 lock status.
00147 #define MC_LOCKS11                      27      ///< Lock region 11 lock status.
00148 #define MC_LOCKS12                      28      ///< Lock region 12 lock status.
00149 #define MC_LOCKS13                      29      ///< Lock region 13 lock status.
00150 #define MC_LOCKS14                      30      ///< Lock region 14 lock status.
00151 #define MC_LOCKS15                      31      ///< Lock region 15 lock status.
00152
00153 #endif /* AT91_MC_H */


BeRTOS: at91_pio.h File Reference

  • cpu
  • arm
  • io
at91_pio.h File Reference

Go to the source code of this file.

Defines

#define | PIO_PER_OFF 0x00000000
PIO Register Offsets.
#define | PIO_PDR_OFF 0x00000004
PIO disable register offset.
#define | PIO_PSR_OFF 0x00000008
PIO status register offset.
#define | PIO_OER_OFF 0x00000010
Output enable register offset.
#define | PIO_ODR_OFF 0x00000014
Output disable register offset.
#define | PIO_OSR_OFF 0x00000018
Output status register offset.
#define | PIO_IFER_OFF 0x00000020
Input filter enable register offset.
#define | PIO_IFDR_OFF 0x00000024
Input filter disable register offset.
#define | PIO_IFSR_OFF 0x00000028
Input filter status register offset.
#define | PIO_SODR_OFF 0x00000030
Set output data register offset.
#define | PIO_CODR_OFF 0x00000034
Clear output data register offset.
#define | PIO_ODSR_OFF 0x00000038
Output data status register offset.
#define | PIO_PDSR_OFF 0x0000003C
Pin data status register offset.
#define | PIO_IER_OFF 0x00000040
Interrupt enable register offset.
#define | PIO_IDR_OFF 0x00000044
Interrupt disable register offset.
#define | PIO_IMR_OFF 0x00000048
Interrupt mask register offset.
#define | PIO_ISR_OFF 0x0000004C
Interrupt status register offset.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

AT91 Parallel input/output controller. This file is based on NUT/OS implementation. See license below.

Definition in file at91_pio.h.

Define Documentation

#define PIO_PER_OFF 0x00000000

PIO Register Offsets.

PIO enable register offset.

Definition at line 77 of file at91_pio.h.


BeRTOS: at91_pio.h Source File

  • cpu
  • arm
  • io
at91_pio.h
Go to the documentation of this file.
00001
00040 /*
00041  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00042  *
00043  * Redistribution and use in source and binary forms, with or without
00044  * modification, are permitted provided that the following conditions
00045  * are met:
00046  *
00047  * 1. Redistributions of source code must retain the above copyright
00048  *    notice, this list of conditions and the following disclaimer.
00049  * 2. Redistributions in binary form must reproduce the above copyright
00050  *    notice, this list of conditions and the following disclaimer in the
00051  *    documentation and/or other materials provided with the distribution.
00052  * 3. Neither the name of the copyright holders nor the names of
00053  *    contributors may be used to endorse or promote products derived
00054  *    from this software without specific prior written permission.
00055  *
00056  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00057  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00058  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00059  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00060  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00062  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00063  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00064  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00065  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00066  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00067  * SUCH DAMAGE.
00068  *
00069  * For additional information see http://www.ethernut.de/
00070  */
00071
00072 #ifndef AT91_PIO_H
00073 #define AT91_PIO_H
00074
00076 /*\{*/
00077 #define PIO_PER_OFF     0x00000000  ///< PIO enable register offset.
00078 #define PIO_PDR_OFF     0x00000004  ///< PIO disable register offset.
00079 #define PIO_PSR_OFF     0x00000008  ///< PIO status register offset.
00080 #define PIO_OER_OFF     0x00000010  ///< Output enable register offset.
00081 #define PIO_ODR_OFF     0x00000014  ///< Output disable register offset.
00082 #define PIO_OSR_OFF     0x00000018  ///< Output status register offset.
00083 #define PIO_IFER_OFF    0x00000020  ///< Input filter enable register offset.
00084 #define PIO_IFDR_OFF    0x00000024  ///< Input filter disable register offset.
00085 #define PIO_IFSR_OFF    0x00000028  ///< Input filter status register offset.
00086 #define PIO_SODR_OFF    0x00000030  ///< Set output data register offset.
00087 #define PIO_CODR_OFF    0x00000034  ///< Clear output data register offset.
00088 #define PIO_ODSR_OFF    0x00000038  ///< Output data status register offset.
00089 #define PIO_PDSR_OFF    0x0000003C  ///< Pin data status register offset.
00090 #define PIO_IER_OFF     0x00000040  ///< Interrupt enable register offset.
00091 #define PIO_IDR_OFF     0x00000044  ///< Interrupt disable register offset.
00092 #define PIO_IMR_OFF     0x00000048  ///< Interrupt mask register offset.
00093 #define PIO_ISR_OFF     0x0000004C  ///< Interrupt status register offset.
00094 #if PIO_HAS_MULTIDRIVER
00095 #define PIO_MDER_OFF    0x00000050  ///< Multi-driver enable register offset.
00096 #define PIO_MDDR_OFF    0x00000054  ///< Multi-driver disable register offset.
00097 #define PIO_MDSR_OFF    0x00000058  ///< Multi-driver status register offset.
00098 #endif /* PIO_HAS_MULTIDRIVER */
00099 #if PIO_HAS_PULLUP
00100 #define PIO_PUDR_OFF    0x00000060  ///< Pull-up disable register offset.
00101 #define PIO_PUER_OFF    0x00000064  ///< Pull-up enable register offset.
00102 #define PIO_PUSR_OFF    0x00000068  ///< Pull-up status register offset.
00103 #endif /* PIO_HAS_PULLUP */
00104 #if PIO_HAS_PERIPHERALSELECT
00105 #define PIO_ASR_OFF     0x00000070  ///< PIO peripheral A select register offset.
00106 #define PIO_BSR_OFF     0x00000074  ///< PIO peripheral B select register offset.
00107 #define PIO_ABSR_OFF    0x00000078  ///< PIO peripheral AB status register offset.
00108 #endif /* PIO_HAS_PERIPHERALSELECT */
00109 #if PIO_HAS_OUTPUTWRITEENABLE
00110 #define PIO_OWER_OFF    0x000000A0  ///< PIO output write enable register offset.
00111 #define PIO_OWDR_OFF    0x000000A4  ///< PIO output write disable register offset.
00112 #define PIO_OWSR_OFF    0x000000A8  ///< PIO output write status register offset.
00113 #endif /* PIO_HAS_OUTPUTWRITEENABLE */
00114 /*\}*/
00115
00117 /*\{*/
00118 #if defined(PIO_BASE)
00119     #define PIO_ACCESS(offset) (*((reg32_t *)(PIO_BASE + (offset))))
00120
00121     #define PIO_PER     PIO_ACCESS(PIO_PER_OFF)    ///< PIO enable register address.
00122     #define PIO_PDR     PIO_ACCESS(PIO_PDR_OFF)    ///< PIO disable register address.
00123     #define PIO_PSR     PIO_ACCESS(PIO_PSR_OFF)    ///< PIO status register address.
00124     #define PIO_OER     PIO_ACCESS(PIO_OER_OFF)    ///< Output enable register address.
00125     #define PIO_ODR     PIO_ACCESS(PIO_ODR_OFF)    ///< Output disable register address.
00126     #define PIO_OSR     PIO_ACCESS(PIO_OSR_OFF)    ///< Output status register address.
00127     #define PIO_IFER    PIO_ACCESS(PIO_IFER_OFF)   ///< Input filter enable register address.
00128     #define PIO_IFDR    PIO_ACCESS(PIO_IFDR_OFF)   ///< Input filter disable register address.
00129     #define PIO_IFSR    PIO_ACCESS(PIO_IFSR_OFF)   ///< Input filter status register address.
00130     #define PIO_SODR    PIO_ACCESS(PIO_SODR_OFF)   ///< Set output data register address.
00131     #define PIO_CODR    PIO_ACCESS(PIO_CODR_OFF)   ///< Clear output data register address.
00132     #define PIO_ODSR    PIO_ACCESS(PIO_ODSR_OFF)   ///< Output data status register address.
00133     #define PIO_PDSR    PIO_ACCESS(PIO_PDSR_OFF)   ///< Pin data status register address.
00134     #define PIO_IER     PIO_ACCESS(PIO_IER_OFF)    ///< Interrupt enable register address.
00135     #define PIO_IDR     PIO_ACCESS(PIO_IDR_OFF)    ///< Interrupt disable register address.
00136     #define PIO_IMR     PIO_ACCESS(PIO_IMR_OFF)    ///< Interrupt mask register address.
00137     #define PIO_ISR     PIO_ACCESS(PIO_ISR_OFF)    ///< Interrupt status register address.
00138     #if PIO_HAS_MULTIDRIVER
00139     #define PIO_MDER    PIO_ACCESS(PIO_MDER_OFF)   ///< Multi-driver enable register address.
00140     #define PIO_MDDR    PIO_ACCESS(PIO_MDDR_OFF)   ///< Multi-driver disable register address.
00141     #define PIO_MDSR    PIO_ACCESS(PIO_MDSR_OFF)   ///< Multi-driver status register address.
00142     #endif /* PIO_HAS_MULTIDRIVER */
00143     #if PIO_HAS_PULLUP
00144     #define PIO_PUDR    PIO_ACCESS(PIO_PUDR_OFF)   ///< Pull-up disable register address.
00145     #define PIO_PUER    PIO_ACCESS(PIO_PUER_OFF)   ///< Pull-up enable register address.
00146     #define PIO_PUSR    PIO_ACCESS(PIO_PUSR_OFF)   ///< Pull-up status register address.
00147     #endif /* PIO_HAS_PULLUP */
00148     #if PIO_HAS_PERIPHERALSELECT
00149     #define PIO_ASR     PIO_ACCESS(PIO_ASR_OFF)    ///< PIO peripheral A select register address.
00150     #define PIO_BSR     PIO_ACCESS(PIO_BSR_OFF)    ///< PIO peripheral B select register address.
00151     #define PIO_ABSR    PIO_ACCESS(PIO_ABSR_OFF)   ///< PIO peripheral AB status register address.
00152     #endif /* PIO_HAS_PERIPHERALSELECT */
00153     #if PIO_HAS_OUTPUTWRITEENABLE
00154     #define PIO_OWER    PIO_ACCESS(PIO_OWER_OFF)   ///< PIO output write enable register address.
00155     #define PIO_OWDR    PIO_ACCESS(PIO_OWDR_OFF)   ///< PIO output write disable register address.
00156     #define PIO_OWSR    PIO_ACCESS(PIO_OWSR_OFF)   ///< PIO output write status register address.
00157     #endif /* PIO_HAS_OUTPUTWRITEENABLE */
00158 #endif /* PIO_BASE */
00159 /*\}*/
00160
00162 /*\{*/
00163 #if defined(PIOA_BASE)
00164     #define PIOA_ACCESS(offset) (*((reg32_t *)(PIOA_BASE + (offset))))
00165
00166     #define PIOA_PER    PIOA_ACCESS(PIO_PER_OFF)   ///< PIO enable register address.
00167     #define PIOA_PDR    PIOA_ACCESS(PIO_PDR_OFF)   ///< PIO disable register address.
00168     #define PIOA_PSR    PIOA_ACCESS(PIO_PSR_OFF)   ///< PIO status register address.
00169     #define PIOA_OER    PIOA_ACCESS(PIO_OER_OFF)   ///< Output enable register address.
00170     #define PIOA_ODR    PIOA_ACCESS(PIO_ODR_OFF)   ///< Output disable register address.
00171     #define PIOA_OSR    PIOA_ACCESS(PIO_OSR_OFF)   ///< Output status register address.
00172     #define PIOA_IFER   PIOA_ACCESS(PIO_IFER_OFF)  ///< Input filter enable register address.
00173     #define PIOA_IFDR   PIOA_ACCESS(PIO_IFDR_OFF)  ///< Input filter disable register address.
00174     #define PIOA_IFSR   PIOA_ACCESS(PIO_IFSR_OFF)  ///< Input filter status register address.
00175     #define PIOA_SODR   PIOA_ACCESS(PIO_SODR_OFF)  ///< Set output data register address.
00176     #define PIOA_CODR   PIOA_ACCESS(PIO_CODR_OFF)  ///< Clear output data register address.
00177     #define PIOA_ODSR   PIOA_ACCESS(PIO_ODSR_OFF)  ///< Output data status register address.
00178     #define PIOA_PDSR   PIOA_ACCESS(PIO_PDSR_OFF)  ///< Pin data status register address.
00179     #define PIOA_IER    PIOA_ACCESS(PIO_IER_OFF)   ///< Interrupt enable register address.
00180     #define PIOA_IDR    PIOA_ACCESS(PIO_IDR_OFF)   ///< Interrupt disable register address.
00181     #define PIOA_IMR    PIOA_ACCESS(PIO_IMR_OFF)   ///< Interrupt mask register address.
00182     #define PIOA_ISR    PIOA_ACCESS(PIO_ISR_OFF)   ///< Interrupt status register address.
00183     #if PIO_HAS_MULTIDRIVER
00184     #define PIOA_MDER   PIOA_ACCESS(PIO_MDER_OFF)  ///< Multi-driver enable register address.
00185     #define PIOA_MDDR   PIOA_ACCESS(PIO_MDDR_OFF)  ///< Multi-driver disable register address.
00186     #define PIOA_MDSR   PIOA_ACCESS(PIO_MDSR_OFF)  ///< Multi-driver status register address.
00187     #endif /* PIO_HAS_MULTIDRIVER */
00188     #if PIO_HAS_PULLUP
00189     #define PIOA_PUDR   PIOA_ACCESS(PIO_PUDR_OFF)  ///< Pull-up disable register address.
00190     #define PIOA_PUER   PIOA_ACCESS(PIO_PUER_OFF)  ///< Pull-up enable register address.
00191     #define PIOA_PUSR   PIOA_ACCESS(PIO_PUSR_OFF)  ///< Pull-up status register address.
00192     #endif /* PIO_HAS_PULLUP */
00193     #if PIO_HAS_PERIPHERALSELECT
00194     #define PIOA_ASR    PIOA_ACCESS(PIO_ASR_OFF)   ///< PIO peripheral A select register address.
00195     #define PIOA_BSR    PIOA_ACCESS(PIO_BSR_OFF)   ///< PIO peripheral B select register address.
00196     #define PIOA_ABSR   PIOA_ACCESS(PIO_ABSR_OFF)  ///< PIO peripheral AB status register address.
00197     #endif /* PIO_HAS_PERIPHERALSELECT */
00198     #if PIO_HAS_OUTPUTWRITEENABLE
00199     #define PIOA_OWER   PIOA_ACCESS(PIO_OWER_OFF)  ///< PIO output write enable register address.
00200     #define PIOA_OWDR   PIOA_ACCESS(PIO_OWDR_OFF)  ///< PIO output write disable register address.
00201     #define PIOA_OWSR   PIOA_ACCESS(PIO_OWSR_OFF)  ///< PIO output write status register address.
00202     #endif /* PIO_HAS_OUTPUTWRITEENABLE */
00203 #endif /* PIOA_BASE */
00204 /*\}*/
00205
00207 /*\{*/
00208 #if defined(PIOB_BASE)
00209     #define PIOB_ACCESS(offset) (*((reg32_t *)(PIOB_BASE + (offset))))
00210
00211     #define PIOB_PER    PIOB_ACCESS(PIO_PER_OFF)   ///< PIO enable register address.
00212     #define PIOB_PDR    PIOB_ACCESS(PIO_PDR_OFF)   ///< PIO disable register address.
00213     #define PIOB_PSR    PIOB_ACCESS(PIO_PSR_OFF)   ///< PIO status register address.
00214     #define PIOB_OER    PIOB_ACCESS(PIO_OER_OFF)   ///< Output enable register address.
00215     #define PIOB_ODR    PIOB_ACCESS(PIO_ODR_OFF)   ///< Output disable register address.
00216     #define PIOB_OSR    PIOB_ACCESS(PIO_OSR_OFF)   ///< Output status register address.
00217     #define PIOB_IFER   PIOB_ACCESS(PIO_IFER_OFF)  ///< Input filter enable register address.
00218     #define PIOB_IFDR   PIOB_ACCESS(PIO_IFDR_OFF)  ///< Input filter disable register address.
00219     #define PIOB_IFSR   PIOB_ACCESS(PIO_IFSR_OFF)  ///< Input filter status register address.
00220     #define PIOB_SODR   PIOB_ACCESS(PIO_SODR_OFF)  ///< Set output data register address.
00221     #define PIOB_CODR   PIOB_ACCESS(PIO_CODR_OFF)  ///< Clear output data register address.
00222     #define PIOB_ODSR   PIOB_ACCESS(PIO_ODSR_OFF)  ///< Output data status register address.
00223     #define PIOB_PDSR   PIOB_ACCESS(PIO_PDSR_OFF)  ///< Pin data status register address.
00224     #define PIOB_IER    PIOB_ACCESS(PIO_IER_OFF)   ///< Interrupt enable register address.
00225     #define PIOB_IDR    PIOB_ACCESS(PIO_IDR_OFF)   ///< Interrupt disable register address.
00226     #define PIOB_IMR    PIOB_ACCESS(PIO_IMR_OFF)   ///< Interrupt mask register address.
00227     #define PIOB_ISR    PIOB_ACCESS(PIO_ISR_OFF)   ///< Interrupt status register address.
00228     #if PIO_HAS_MULTIDRIVER
00229     #define PIOB_MDER   PIOB_ACCESS(PIO_MDER_OFF)  ///< Multi-driver enable register address.
00230     #define PIOB_MDDR   PIOB_ACCESS(PIO_MDDR_OFF)  ///< Multi-driver disable register address.
00231     #define PIOB_MDSR   PIOB_ACCESS(PIO_MDSR_OFF)  ///< Multi-driver status register address.
00232     #endif /* PIO_HAS_MULTIDRIVER */
00233     #if PIO_HAS_PULLUP
00234     #define PIOB_PUDR   PIOB_ACCESS(PIO_PUDR_OFF)  ///< Pull-up disable register address.
00235     #define PIOB_PUER   PIOB_ACCESS(PIO_PUER_OFF)  ///< Pull-up enable register address.
00236     #define PIOB_PUSR   PIOB_ACCESS(PIO_PUSR_OFF)  ///< Pull-up status register address.
00237     #endif /* PIO_HAS_PULLUP */
00238     #if PIO_HAS_PERIPHERALSELECT
00239     #define PIOB_ASR    PIOB_ACCESS(PIO_ASR_OFF)   ///< PIO peripheral A select register address.
00240     #define PIOB_BSR    PIOB_ACCESS(PIO_BSR_OFF)   ///< PIO peripheral B select register address.
00241     #define PIOB_ABSR   PIOB_ACCESS(PIO_ABSR_OFF)  ///< PIO peripheral AB status register address.
00242     #endif /* PIO_HAS_PERIPHERALSELECT */
00243     #if PIO_HAS_OUTPUTWRITEENABLE
00244     #define PIOB_OWER   PIOB_ACCESS(PIO_OWER_OFF)  ///< PIO output write enable register address.
00245     #define PIOB_OWDR   PIOB_ACCESS(PIO_OWDR_OFF)  ///< PIO output write disable register address.
00246     #define PIOB_OWSR   PIOB_ACCESS(PIO_OWSR_OFF)  ///< PIO output write status register address.
00247     #endif /* PIO_HAS_OUTPUTWRITEENABLE */
00248 #endif /* PIOB_BASE */
00249 /*\}*/
00250
00252 /*\{*/
00253 #if defined(PIOC_BASE)
00254     #define PIOC_ACCESS(offset) (*((reg32_t *)(PIOC_BASE + (offset))))
00255
00256     #define PIOC_PER    PIOC_ACCESS(PIO_PER_OFF)   ///< PIO enable register address.
00257     #define PIOC_PDR    PIOC_ACCESS(PIO_PDR_OFF)   ///< PIO disable register address.
00258     #define PIOC_PSR    PIOC_ACCESS(PIO_PSR_OFF)   ///< PIO status register address.
00259     #define PIOC_OER    PIOC_ACCESS(PIO_OER_OFF)   ///< Output enable register address.
00260     #define PIOC_ODR    PIOC_ACCESS(PIO_ODR_OFF)   ///< Output disable register address.
00261     #define PIOC_OSR    PIOC_ACCESS(PIO_OSR_OFF)   ///< Output status register address.
00262     #define PIOC_IFER   PIOC_ACCESS(PIO_IFER_OFF)  ///< Input filter enable register address.
00263     #define PIOC_IFDR   PIOC_ACCESS(PIO_IFDR_OFF)  ///< Input filter disable register address.
00264     #define PIOC_IFSR   PIOC_ACCESS(PIO_IFSR_OFF)  ///< Input filter status register address.
00265     #define PIOC_SODR   PIOC_ACCESS(PIO_SODR_OFF)  ///< Set output data register address.
00266     #define PIOC_CODR   PIOC_ACCESS(PIO_CODR_OFF)  ///< Clear output data register address.
00267     #define PIOC_ODSR   PIOC_ACCESS(PIO_ODSR_OFF)  ///< Output data status register address.
00268     #define PIOC_PDSR   PIOC_ACCESS(PIO_PDSR_OFF)  ///< Pin data status register address.
00269     #define PIOC_IER    PIOC_ACCESS(PIO_IER_OFF)   ///< Interrupt enable register address.
00270     #define PIOC_IDR    PIOC_ACCESS(PIO_IDR_OFF)   ///< Interrupt disable register address.
00271     #define PIOC_IMR    PIOC_ACCESS(PIO_IMR_OFF)   ///< Interrupt mask register address.
00272     #define PIOC_ISR    PIOC_ACCESS(PIO_ISR_OFF)   ///< Interrupt status register address.
00273     #if PIO_HAS_MULTIDRIVER
00274     #define PIOC_MDER   PIOC_ACCESS(PIO_MDER_OFF)  ///< Multi-driver enable register address.
00275     #define PIOC_MDDR   PIOC_ACCESS(PIO_MDDR_OFF)  ///< Multi-driver disable register address.
00276     #define PIOC_MDSR   PIOC_ACCESS(PIO_MDSR_OFF)  ///< Multi-driver status register address.
00277     #endif /* PIO_HAS_MULTIDRIVER */
00278     #if PIO_HAS_PULLUP
00279     #define PIOC_PUDR   PIOC_ACCESS(PIO_PUDR_OFF)  ///< Pull-up disable register address.
00280     #define PIOC_PUER   PIOC_ACCESS(PIO_PUER_OFF)  ///< Pull-up enable register address.
00281     #define PIOC_PUSR   PIOC_ACCESS(PIO_PUSR_OFF)  ///< Pull-up status register address.
00282     #endif /* PIO_HAS_PULLUP */
00283     #if PIO_HAS_PERIPHERALSELECT
00284     #define PIOC_ASR    PIOC_ACCESS(PIO_ASR_OFF)   ///< PIO peripheral A select register address.
00285     #define PIOC_BSR    PIOC_ACCESS(PIO_BSR_OFF)   ///< PIO peripheral B select register address.
00286     #define PIOC_ABSR   PIOC_ACCESS(PIO_ABSR_OFF)  ///< PIO peripheral AB status register address.
00287     #endif /* PIO_HAS_PERIPHERALSELECT */
00288     #if PIO_HAS_OUTPUTWRITEENABLE
00289     #define PIOC_OWER   PIOC_ACCESS(PIO_OWER_OFF)  ///< PIO output write enable register address.
00290     #define PIOC_OWDR   PIOC_ACCESS(PIO_OWDR_OFF)  ///< PIO output write disable register address.
00291     #define PIOC_OWSR   PIOC_ACCESS(PIO_OWSR_OFF)  ///< PIO output write status register address.
00292     #endif /* PIO_HAS_OUTPUTWRITEENABLE */
00293 #endif /* PIOC_BASE */
00294 /*\}*/
00295
00296 #endif /* AT91_PIO_H */


BeRTOS: at91_pit.h File Reference

  • cpu
  • arm
  • io
at91_pit.h File Reference
#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define | PIT_MR_OFF 0x00000000
Periodic Inverval Timer Mode Register.
#define | PIT_MR (*((reg32_t *)(PIT_BASE + PIT_MR_OFF)))
Mode register address.
#define | PIV_MASK 0x000FFFFF
Periodic interval value mask.
#define | PIV_SHIFT 0
Periodic interval value shift.
#define | PITEN 24
Periodic interval timer enable.
#define | PITIEN 25
Periodic interval timer interrupt enable.
#define | PIT_SR_OFF 0x00000004
Periodic Inverval Timer Status Register.
#define | PIT_SR (*((reg32_t *)(PIT_BASE + PIT_SR_OFF)))
Status register address.
#define | PITS 0
Timer has reached PIV.
#define | PIVR_OFF 0x00000008
Periodic Inverval Timer Value and Image Registers.
#define | PIVR (*((reg32_t *)(PIT_BASE + PIVR_OFF)))
Value register address.
#define | PIIR_OFF 0x0000000C
Image register offset.
#define | PIIR (*((reg32_t *)(PIT_BASE + PIIR_OFF)))
Image register address.
#define | CPIV_MASK 0x000FFFFF
Current periodic interval value mask.
#define | CPIV_SHIFT 0
Current periodic interval value SHIFT.
#define | PICNT_MASK 0xFFF00000
Periodic interval counter mask.
#define | PICNT_SHIFT 20
Periodic interval counter LSB.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

AT91 periodic interval timer. This file is based on NUT/OS implementation. See license below.

Definition in file at91_pit.h.

Define Documentation

#define PIT_MR_OFF 0x00000000

Periodic Inverval Timer Mode Register.

Mode register offset.

Definition at line 80 of file at91_pit.h.

#define PIT_SR_OFF 0x00000004

Periodic Inverval Timer Status Register.

Status register offset.

Definition at line 93 of file at91_pit.h.

#define PIVR_OFF 0x00000008

Periodic Inverval Timer Value and Image Registers.

Value register offset.

Definition at line 103 of file at91_pit.h.


BeRTOS: at91_pit.h Source File

  • cpu
  • arm
  • io
at91_pit.h
Go to the documentation of this file.
00001
00040 /*
00041  * Copyright (C) 2007 by egnite Software GmbH. All rights reserved.
00042  *
00043  * Redistribution and use in source and binary forms, with or without
00044  * modification, are permitted provided that the following conditions
00045  * are met:
00046  *
00047  * 1. Redistributions of source code must retain the above copyright
00048  *    notice, this list of conditions and the following disclaimer.
00049  * 2. Redistributions in binary form must reproduce the above copyright
00050  *    notice, this list of conditions and the following disclaimer in the
00051  *    documentation and/or other materials provided with the distribution.
00052  * 3. Neither the name of the copyright holders nor the names of
00053  *    contributors may be used to endorse or promote products derived
00054  *    from this software without specific prior written permission.
00055  *
00056  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00057  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00058  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00059  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00060  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00062  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00063  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00064  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00065  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00066  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00067  * SUCH DAMAGE.
00068  *
00069  * For additional information see http://www.ethernut.de/
00070  */
00071
00072 #ifndef AT91_PIT_H
00073 #define AT91_PIT_H
00074
00075 #include <cfg/compiler.h>
00080 #define PIT_MR_OFF 0x00000000 ///< Mode register offset.
00081 #define PIT_MR     (*((reg32_t *)(PIT_BASE + PIT_MR_OFF))) ///< Mode register address.
00082
00083 #define PIV_MASK   0x000FFFFF ///< Periodic interval value mask.
00084 #define PIV_SHIFT  0          ///< Periodic interval value shift.
00085 #define PITEN      24         ///< Periodic interval timer enable.
00086 #define PITIEN     25         ///< Periodic interval timer interrupt enable.
00087 /*\}*/
00088
00093 #define PIT_SR_OFF 0x00000004 ///< Status register offset.
00094 #define PIT_SR     (*((reg32_t *)(PIT_BASE + PIT_SR_OFF))) ///< Status register address.
00095
00096 #define PITS       0          ///< Timer has reached PIV.
00097 /*\}*/
00098
00103 #define PIVR_OFF    0x00000008 ///< Value register offset.
00104 #define PIVR        (*((reg32_t *)(PIT_BASE + PIVR_OFF))) ///< Value register address.
00105
00106 #define PIIR_OFF    0x0000000C ///< Image register offset.
00107 #define PIIR        (*((reg32_t *)(PIT_BASE + PIIR_OFF))) ///< Image register address.
00108 #define CPIV_MASK   0x000FFFFF ///< Current periodic interval value mask.
00109 #define CPIV_SHIFT  0          ///< Current periodic interval value SHIFT.
00110 #define PICNT_MASK  0xFFF00000 ///< Periodic interval counter mask.
00111 #define PICNT_SHIFT 20         ///< Periodic interval counter LSB.
00112 /*\}*/
00113
00114 #endif /* AT91_PIT_H */


BeRTOS: at91_pmc.h File Reference

  • cpu
  • arm
  • io
at91_pmc.h File Reference

Go to the source code of this file.

Defines

#define | PMC_SCER_OFF 0x00000000
System Clock Enable, Disable and Status Register.
#define | PMC_SCER (*((reg32_t *)(PMC_BASE + PMC_SCER_OFF)))
System clock enable register address.
#define | PMC_SCDR_OFF 0x00000004
System clock disable register offset.
#define | PMC_SCDR (*((reg32_t *)(PMC_BASE + PMC_SCDR_OFF)))
System clock disable register address.
#define | PMC_SCSR_OFF 0x00000008
System clock status register offset.
#define | PMC_SCSR (*((reg32_t *)(PMC_BASE + PMC_SCSR_OFF)))
System clock status register address.
#define | PMC_PCK 0
Processor clock.
#define | PMC_UDP 7
USB device port clock.
#define | PMC_PCK0 8
Programmable clock 0 output.
#define | PMC_PCK1 9
Programmable clock 1 output.
#define | PMC_PCK2 10
Programmable clock 2 output.
#define | PMC_PCER_OFF 0x00000010
Peripheral Clock Enable, Disable and Status Register.
#define | PMC_PCER (*((reg32_t *)(PMC_BASE + PMC_PCER_OFF)))
Peripheral clock enable register address.
#define | PMC_PCDR_OFF 0x00000014
Peripheral clock disable register offset.
#define | PMC_PCDR (*((reg32_t *)(PMC_BASE + PMC_PCDR_OFF)))
Peripheral clock disable register address.
#define | PMC_PCSR_OFF 0x00000018
Peripheral clock status register offset.
#define | PMC_PCSR (*((reg32_t *)(PMC_BASE + PMC_PCSR_OFF)))
Peripheral clock status register address.
#define | CKGR_MOR_OFF 0x00000020
Clock Generator Main Oscillator Register.
#define | CKGR_MOR (*((reg32_t *)(PMC_BASE + CKGR_MOR_OFF)))
Main oscillator register address.
#define | CKGR_MOSCEN 0
Main oscillator enable.
#define | CKGR_OSCBYPASS 1
Main oscillator bypass.
#define | CKGR_OSCOUNT_MASK 0x0000FF00
Main oscillator start-up time mask.
#define | CKGR_OSCOUNT_SHIFT 8
Main oscillator start-up time LSB.
#define | CKGR_MCFR_OFF 0x00000024
Clock Generator Main Clock Frequency Register.
#define | CKGR_MCFR (*((reg32_t *)(PMC_BASE + CKGR_MCFR_OFF)))
Main clock frequency register address.
#define | CKGR_MAINF_MASK 0x0000FFFF
Main clock frequency mask mask.
#define | CKGR_MAINRDY 16
Main clock ready.
#define | CKGR_PLLR_OFF 0x0000002C
PLL Registers.
#define | CKGR_PLLR (*((reg32_t *)(PMC_BASE + CKGR_PLLR_OFF)))
Clock generator PLL register address.
#define | CKGR_DIV_MASK 0x000000FF
Divider.
#define | CKGR_DIV_SHIFT 0
Least significant bit of the divider.
#define | CKGR_DIV_0 0x00000000
Divider output is 0.
#define | CKGR_DIV_BYPASS 0x00000001
Divider is bypassed.
#define | CKGR_PLLCOUNT_MASK 0x00003F00
PLL counter mask.
#define | CKGR_PLLCOUNT_SHIFT 8
PLL counter LSB.
#define | CKGR_OUT_MASK 0x0000C000
PLL output frequency range.
#define | CKGR_OUT_0 0x00000000
Please refer to the PLL datasheet.
#define | CKGR_OUT_1 0x00004000
Please refer to the PLL datasheet.
#define | CKGR_OUT_2 0x00008000
Please refer to the PLL datasheet.
#define | CKGR_OUT_3 0x0000C000
Please refer to the PLL datasheet.
#define | CKGR_MUL_MASK 0x07FF0000
PLL multiplier.
#define | CKGR_MUL_SHIFT 16
Least significant bit of the PLL multiplier.
#define | CKGR_USBDIV_MASK 0x30000000
Divider for USB clocks.
#define | CKGR_USBDIV_1 0x00000000
Divider output is PLL clock output.
#define | CKGR_USBDIV_2 0x10000000
Divider output is PLL clock output divided by 2.
#define | CKGR_USBDIV_4 0x20000000
Divider output is PLL clock output divided by 4.
#define | PMC_MCKR_OFF 0x00000030
Master Clock Register.
#define | PMC_MCKR (*((reg32_t *)(PMC_BASE + PMC_MCKR_OFF)))
Master clock register address.
#define | PMC_PCKR0_OFF 0x00000040
Programmable clock 0 register offset.
#define | PMC_PCKR0 (*((reg32_t *)(PMC_BASE + PMC_PCKR0_OFF)))
Programmable clock 0 register address.
#define | PMC_PCKR1_OFF 0x00000044
Programmable clock 1 register offset.
#define | PMC_PCKR1 (*((reg32_t *)(PMC_BASE + PMC_PCKR1_OFF)))
Programmable clock 1 register address.
#define | PMC_PCKR2_OFF 0x00000048
Programmable clock 2 register offset.
#define | PMC_PCKR2 (*((reg32_t *)(PMC_BASE + PMC_PCKR2_OFF)))
Programmable clock 2 register address.
#define | PMC_CSS_MASK 0x00000003
Clock selection mask.
#define | PMC_CSS_SLOW_CLK 0x00000000
Slow clock selected.
#define | PMC_CSS_MAIN_CLK 0x00000001
Main clock selected.
#define | PMC_CSS_PLL_CLK 0x00000003
PLL clock selected.
#define | PMC_PRES_MASK 0x0000001C
Clock prescaler mask.
#define | PMC_PRES_SHIFT 2
Clock prescaler LSB.
#define | PMC_PRES_CLK 0x00000000
Selected clock, not divided.
#define | PMC_PRES_CLK_2 0x00000004
Selected clock divided by 2.
#define | PMC_PRES_CLK_4 0x00000008
Selected clock divided by 4.
#define | PMC_PRES_CLK_8 0x0000000C
Selected clock divided by 8.
#define | PMC_PRES_CLK_16 0x00000010
Selected clock divided by 16.
#define | PMC_PRES_CLK_32 0x00000014
Selected clock divided by 32.
#define | PMC_PRES_CLK_64 0x00000018
Selected clock divided by 64.
#define | PMC_IER_OFF 0x00000060
Power Management Status and Interrupt Registers.
#define | PMC_IER (*((reg32_t *)(PMC_BASE + PMC_IER_OFF)))
Interrupt enable register address.
#define | PMC_IDR_OFF 0x00000064
Interrupt disable register offset.
#define | PMC_IDR (*((reg32_t *)(PMC_BASE + PMC_IDR_OFF)))
Interrupt disable register address.
#define | PMC_SR_OFF 0x00000068
Status register offset.
#define | PMC_SR (*((reg32_t *)(PMC_BASE + PMC_SR_OFF)))
Status register address.
#define | PMC_IMR_OFF 0x0000006C
Interrupt mask register offset.
#define | PMC_IMR (*((reg32_t *)(PMC_BASE + PMC_IMR_OFF)))
Interrupt mask register address.
#define | PMC_MOSCS 0
Main oscillator.
#define | PMC_LOCK 2
PLL lock.
#define | PMC_MCKRDY 3
Master clock ready.
#define | PMC_PCKRDY0 8
Programmable clock 0 ready.
#define | PMC_PCKRDY1 9
Programmable clock 1 ready.
#define | PMC_PCKRDY2 10
Programmable clock 2 ready.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

AT91 power management controller. This file is based on NUT/OS implementation. See license below.

Definition in file at91_pmc.h.

Define Documentation

#define CKGR_MCFR_OFF 0x00000024

Clock Generator Main Clock Frequency Register.

Main clock frequency register offset.

Definition at line 114 of file at91_pmc.h.

#define CKGR_MOR_OFF 0x00000020

Clock Generator Main Oscillator Register.

Main oscillator register offset.

Definition at line 103 of file at91_pmc.h.

#define CKGR_PLLR_OFF 0x0000002C

PLL Registers.

Clock generator PLL register offset.

Definition at line 123 of file at91_pmc.h.

#define PMC_IER_OFF 0x00000060

Power Management Status and Interrupt Registers.

Interrupt enable register offset.

Definition at line 177 of file at91_pmc.h.

#define PMC_MCKR_OFF 0x00000030

Master Clock Register.

Master clock register offset.

Definition at line 149 of file at91_pmc.h.

#define PMC_PCER_OFF 0x00000010

Peripheral Clock Enable, Disable and Status Register.

Peripheral clock enable register offset.

Definition at line 93 of file at91_pmc.h.

#define PMC_SCER_OFF 0x00000000

System Clock Enable, Disable and Status Register.

System clock enable register offset.

Definition at line 77 of file at91_pmc.h.


BeRTOS: at91_pmc.h Source File

  • cpu
  • arm
  • io
at91_pmc.h
Go to the documentation of this file.
00001
00040 /*
00041  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00042  *
00043  * Redistribution and use in source and binary forms, with or without
00044  * modification, are permitted provided that the following conditions
00045  * are met:
00046  *
00047  * 1. Redistributions of source code must retain the above copyright
00048  *    notice, this list of conditions and the following disclaimer.
00049  * 2. Redistributions in binary form must reproduce the above copyright
00050  *    notice, this list of conditions and the following disclaimer in the
00051  *    documentation and/or other materials provided with the distribution.
00052  * 3. Neither the name of the copyright holders nor the names of
00053  *    contributors may be used to endorse or promote products derived
00054  *    from this software without specific prior written permission.
00055  *
00056  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00057  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00058  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00059  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00060  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00062  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00063  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00064  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00065  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00066  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00067  * SUCH DAMAGE.
00068  *
00069  * For additional information see http://www.ethernut.de/
00070  */
00071
00072 #ifndef AT91_PMC_H
00073 #define AT91_PMC_H
00074
00076 /*\{*/
00077 #define PMC_SCER_OFF                0x00000000  ///< System clock enable register offset.
00078 #define PMC_SCER    (*((reg32_t *)(PMC_BASE + PMC_SCER_OFF)))   ///< System clock enable register address.
00079 #define PMC_SCDR_OFF                0x00000004  ///< System clock disable register offset.
00080 #define PMC_SCDR    (*((reg32_t *)(PMC_BASE + PMC_SCDR_OFF)))   ///< System clock disable register address.
00081 #define PMC_SCSR_OFF                0x00000008  ///< System clock status register offset.
00082 #define PMC_SCSR    (*((reg32_t *)(PMC_BASE + PMC_SCSR_OFF)))   ///< System clock status register address.
00083
00084 #define PMC_PCK                              0  ///< Processor clock.
00085 #define PMC_UDP                              7  ///< USB device port clock.
00086 #define PMC_PCK0                             8  ///< Programmable clock 0 output.
00087 #define PMC_PCK1                             9  ///< Programmable clock 1 output.
00088 #define PMC_PCK2                            10  ///< Programmable clock 2 output.
00089 /*\}*/
00090
00092 /*\{*/
00093 #define PMC_PCER_OFF                0x00000010  ///< Peripheral clock enable register offset.
00094 #define PMC_PCER    (*((reg32_t *)(PMC_BASE + PMC_PCER_OFF)))   ///< Peripheral clock enable register address.
00095 #define PMC_PCDR_OFF                0x00000014  ///< Peripheral clock disable register offset.
00096 #define PMC_PCDR    (*((reg32_t *)(PMC_BASE + PMC_PCDR_OFF)))   ///< Peripheral clock disable register address.
00097 #define PMC_PCSR_OFF                0x00000018  ///< Peripheral clock status register offset.
00098 #define PMC_PCSR    (*((reg32_t *)(PMC_BASE + PMC_PCSR_OFF)))   ///< Peripheral clock status register address.
00099 /*\}*/
00100
00102 /*\{*/
00103 #define CKGR_MOR_OFF                0x00000020  ///< Main oscillator register offset.
00104 #define CKGR_MOR    (*((reg32_t *)(PMC_BASE + CKGR_MOR_OFF)))   ///< Main oscillator register address.
00105
00106 #define CKGR_MOSCEN                          0  ///< Main oscillator enable.
00107 #define CKGR_OSCBYPASS                       1  ///< Main oscillator bypass.
00108 #define CKGR_OSCOUNT_MASK           0x0000FF00  ///< Main oscillator start-up time mask.
00109 #define CKGR_OSCOUNT_SHIFT                   8  ///< Main oscillator start-up time LSB.
00110 /*\}*/
00111
00113 /*\{*/
00114 #define CKGR_MCFR_OFF               0x00000024  ///< Main clock frequency register offset.
00115 #define CKGR_MCFR   (*((reg32_t *)(PMC_BASE + CKGR_MCFR_OFF)))  ///< Main clock frequency register address.
00116
00117 #define CKGR_MAINF_MASK             0x0000FFFF  ///< Main clock frequency mask mask.
00118 #define CKGR_MAINRDY                        16  ///< Main clock ready.
00119 /*\}*/
00120
00122 /*\{*/
00123 #define CKGR_PLLR_OFF               0x0000002C  ///< Clock generator PLL register offset.
00124 #define CKGR_PLLR   (*((reg32_t *)(PMC_BASE + CKGR_PLLR_OFF)))  ///< Clock generator PLL register address.
00125
00126 #define CKGR_DIV_MASK               0x000000FF  ///< Divider.
00127 #define CKGR_DIV_SHIFT                       0  ///< Least significant bit of the divider.
00128 #define CKGR_DIV_0                  0x00000000  ///< Divider output is 0.
00129 #define CKGR_DIV_BYPASS             0x00000001  ///< Divider is bypassed.
00130 #define CKGR_PLLCOUNT_MASK          0x00003F00  ///< PLL counter mask.
00131 #define CKGR_PLLCOUNT_SHIFT                  8  ///< PLL counter LSB.
00132
00133 #define CKGR_OUT_MASK               0x0000C000  ///< PLL output frequency range.
00134 #define CKGR_OUT_0                  0x00000000  ///< Please refer to the PLL datasheet.
00135 #define CKGR_OUT_1                  0x00004000  ///< Please refer to the PLL datasheet.
00136 #define CKGR_OUT_2                  0x00008000  ///< Please refer to the PLL datasheet.
00137 #define CKGR_OUT_3                  0x0000C000  ///< Please refer to the PLL datasheet.
00138 #define CKGR_MUL_MASK               0x07FF0000  ///< PLL multiplier.
00139 #define CKGR_MUL_SHIFT                      16  ///< Least significant bit of the PLL multiplier.
00140
00141 #define CKGR_USBDIV_MASK            0x30000000  ///< Divider for USB clocks.
00142 #define CKGR_USBDIV_1               0x00000000  ///< Divider output is PLL clock output.
00143 #define CKGR_USBDIV_2               0x10000000  ///< Divider output is PLL clock output divided by 2.
00144 #define CKGR_USBDIV_4               0x20000000  ///< Divider output is PLL clock output divided by 4.
00145 /*\}*/
00146
00148 /*\{*/
00149 #define PMC_MCKR_OFF                0x00000030  ///< Master clock register offset.
00150 #define PMC_MCKR    (*((reg32_t *)(PMC_BASE + PMC_MCKR_OFF)))   ///< Master clock register address.
00151
00152 #define PMC_PCKR0_OFF               0x00000040  ///< Programmable clock 0 register offset.
00153 #define PMC_PCKR0   (*((reg32_t *)(PMC_BASE + PMC_PCKR0_OFF)))  ///< Programmable clock 0 register address.
00154 #define PMC_PCKR1_OFF               0x00000044  ///< Programmable clock 1 register offset.
00155 #define PMC_PCKR1   (*((reg32_t *)(PMC_BASE + PMC_PCKR1_OFF)))  ///< Programmable clock 1 register address.
00156 #define PMC_PCKR2_OFF               0x00000048  ///< Programmable clock 2 register offset.
00157 #define PMC_PCKR2   (*((reg32_t *)(PMC_BASE + PMC_PCKR2_OFF)))  ///< Programmable clock 2 register address.
00158
00159 #define PMC_CSS_MASK                0x00000003  ///< Clock selection mask.
00160 #define PMC_CSS_SLOW_CLK            0x00000000  ///< Slow clock selected.
00161 #define PMC_CSS_MAIN_CLK            0x00000001  ///< Main clock selected.
00162 #define PMC_CSS_PLL_CLK             0x00000003  ///< PLL clock selected.
00163
00164 #define PMC_PRES_MASK               0x0000001C  ///< Clock prescaler mask.
00165 #define PMC_PRES_SHIFT                       2   ///< Clock prescaler LSB.
00166 #define PMC_PRES_CLK                0x00000000  ///< Selected clock, not divided.
00167 #define PMC_PRES_CLK_2              0x00000004  ///< Selected clock divided by 2.
00168 #define PMC_PRES_CLK_4              0x00000008  ///< Selected clock divided by 4.
00169 #define PMC_PRES_CLK_8              0x0000000C  ///< Selected clock divided by 8.
00170 #define PMC_PRES_CLK_16             0x00000010  ///< Selected clock divided by 16.
00171 #define PMC_PRES_CLK_32             0x00000014  ///< Selected clock divided by 32.
00172 #define PMC_PRES_CLK_64             0x00000018  ///< Selected clock divided by 64.
00173 /*\}*/
00174
00176 /*\{*/
00177 #define PMC_IER_OFF                 0x00000060  ///< Interrupt enable register offset.
00178 #define PMC_IER     (*((reg32_t *)(PMC_BASE + PMC_IER_OFF)))    ///< Interrupt enable register address.
00179 #define PMC_IDR_OFF                 0x00000064  ///< Interrupt disable register offset.
00180 #define PMC_IDR     (*((reg32_t *)(PMC_BASE + PMC_IDR_OFF)))    ///< Interrupt disable register address.
00181 #define PMC_SR_OFF                  0x00000068  ///< Status register offset.
00182 #define PMC_SR      (*((reg32_t *)(PMC_BASE + PMC_SR_OFF)))     ///< Status register address.
00183 #define PMC_IMR_OFF                 0x0000006C  ///< Interrupt mask register offset.
00184 #define PMC_IMR     (*((reg32_t *)(PMC_BASE + PMC_IMR_OFF)))    ///< Interrupt mask register address.
00185
00186 #define PMC_MOSCS                            0  ///< Main oscillator.
00187 #define PMC_LOCK                             2  ///< PLL lock.
00188 #define PMC_MCKRDY                           3  ///< Master clock ready.
00189 #define PMC_PCKRDY0                          8  ///< Programmable clock 0 ready.
00190 #define PMC_PCKRDY1                          9  ///< Programmable clock 1 ready.
00191 #define PMC_PCKRDY2                         10  ///< Programmable clock 2 ready.
00192 /*\}*/
00193
00194 #endif /* AT91_PMC_H */


BeRTOS: at91_pwm.h File Reference

  • cpu
  • arm
  • io
Defines
at91_pwm.h File Reference

Go to the source code of this file.

Defines

#define | PWM_CH0_OFF 0x00000200
PWM Channel 0 registers offset.
#define | PWM_CH1_OFF 0x00000220
PWM Channel 1 registers offset.
#define | PWM_CH2_OFF 0x00000240
PWM Channel 2 registers offset.
#define | PWM_CH3_OFF 0x00000260
PWM Channel 3 registers offset.
#define | PWM_MR_OFF 0x00000000
PWM Mode Register.
#define | PWM_MR (*((reg32_t *)(PWMC_BASE + PWM_MR_OFF)))
PWM Mode Register.
#define | PWM_MR_DIVA_MASK 0x000000FF
PWM Mode Divide factor A Mask.
#define | PWM_MR_DIVA_SHIFT 0
PWM Mode Divide factor A LSB.
#define | PWM_MR_DIVB_MASK 0x00FF0000
PWM Mode Divide factor B Mask.
#define | PWM_MR_DIVB_SHIFT 16
PWM Mode Divide factor B LSB.
#define | PWM_MR_PREA_MASK 0x00000F00
PWM Mode prescaler A Mask.
#define | PWM_MR_PREA_SHIFT 8
PWM Mode prescaler A LSB.
#define | PWM_MR_PREB_MASK 0x0F000000
PWM Mode prescaler B Mask.
#define | PWM_MR_PREB_SHIFT 24
PWM Mode prescaler B LSB.
#define | PWM_MR_PRE_MCK 0
PWM Mode prescaler set to MCK.
#define | PWM_MR_PRE_MCK_DIV2 1
PWM Mode prescaler set to MCK/2.
#define | PWM_MR_PRE_MCK_DIV4 2
PWM Mode prescaler set to MCK/4.
#define | PWM_MR_PRE_MCK_DIV8 3
PWM Mode prescaler set to MCK/8.
#define | PWM_MR_PRE_MCK_DIV16 4
PWM Mode prescaler set to MCK/16.
#define | PWM_MR_PRE_MCK_DIV32 5
PWM Mode prescaler set to MCK/32.
#define | PWM_MR_PRE_MCK_DIV64 6
PWM Mode prescaler set to MCK/64.
#define | PWM_MR_PRE_MCK_DIV128 7
PWM Mode prescaler set to MCK/128.
#define | PWM_MR_PRE_MCK_DIV256 8
PWM Mode prescaler set to MCK/256.
#define | PWM_MR_PRE_MCK_DIV512 9
PWM Mode prescaler set to MCK/512.
#define | PWM_MR_PRE_MCK_DIV1024 10
PWM Mode prescaler set to MCK/1024.
#define | PWM_CHID_MASK 0x0000000F
PWM Channel IDs.
#define | PWM_CHID0 0
PWM Channel IDs.
#define | PWM_CHID1 1
PWM Channel IDs.
#define | PWM_CHID2 2
PWM Channel IDs.
#define | PWM_CHID3 3
PWM Channel IDs.
#define | PWM_ENA_OFF 0x00000004
PWM Enable Register.
#define | PWM_ENA (*((reg32_t *)(PWMC_BASE + PWM_ENA_OFF)))
PWM Enable Register.
#define | PWM_DIS_OFF 0x00000008
PWM Disable Register.
#define | PWM_DIS (*((reg32_t *)(PWMC_BASE + PWM_DIS_OFF)))
PWM Disable Register.
#define | PWM_SR_OFF 0x0000000C
PWM Status Register.
#define | PWM_SR (*((reg32_t *)(PWMC_BASE + PWM_SR_OFF)))
PWM Status Register.
#define | PWM_IER_OFF 0x00000010
PWM Interrupt Enable Register.
#define | PWM_IER (*((reg32_t *)(PWMC_BASE + PWM_IER_OFF)))
PWM Interrupt Enable Register.
#define | PWM_IDR_OFF 0x00000014
PWM Interrupt Disable Register.
#define | PWM_IDR (*((reg32_t *)(PWMC_BASE + PWM_IDR_OFF)))
PWM Interrupt Disable Register.
#define | PWM_IMR_OFF 0x00000018
PWM Interrupt Mask Register.
#define | PWM_IMR (*((reg32_t *)(PWMC_BASE + PWM_IMR_OFF)))
PWM Interrupt Mask Register.
#define | PWM_ISR_OFF 0x0000001C
PWM Interrupt Status Register.
#define | PWM_ISR (*((reg32_t *)(PWMC_BASE + PWM_ISR_OFF)))
PWM Interrupt Status Register.
#define | PWM_CMR_OFF 0x00000000
PWM Channel Mode Register.
#define | PWM_CMR0 (*((reg32_t *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH0_OFF)))
PWM Channel 0 Mode Register.
#define | PWM_CMR1 (*((reg32_t *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH1_OFF)))
PWM Channel 1 Mode Register.
#define | PWM_CMR2 (*((reg32_t *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH2_OFF)))
PWM Channel 2 Mode Register.
#define | PWM_CMR3 (*((reg32_t *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH3_OFF)))
PWM Channel 3 Mode Register.
#define | PWM_CPRE_MCK_MASK 0x0000000F
PWM Mode prescaler mask.
#define | PWM_CPRE_MCK 0
PWM Mode prescaler set to MCK.
#define | PWM_CPRE_MCK_DIV2 1
PWM Mode prescaler set to MCK/2.
#define | PWM_CPRE_MCK_DIV4 2
PWM Mode prescaler set to MCK/4.
#define | PWM_CPRE_MCK_DIV8 3
PWM Mode prescaler set to MCK/8.
#define | PWM_CPRE_MCK_DIV16 4
PWM Mode prescaler set to MCK/16.
#define | PWM_CPRE_MCK_DIV32 5
PWM Mode prescaler set to MCK/32.
#define | PWM_CPRE_MCK_DIV64 6
PWM Mode prescaler set to MCK/64.
#define | PWM_CPRE_MCK_DIV128 7
PWM Mode prescaler set to MCK/128.
#define | PWM_CPRE_MCK_DIV256 8
PWM Mode prescaler set to MCK/256.
#define | PWM_CPRE_MCK_DIV512 9
PWM Mode prescaler set to MCK/512.
#define | PWM_CPRE_MCK_DIV1024 10
PWM Mode prescaler set to MCK/1024.
#define | PWM_CPRE_CLKA 11
PWM Mode prescaler set to CLKA.
#define | PWM_CPRE_CLKB 12
PWM Mode prescaler set to CLKB.
#define | PWM_CALG 8
PWM Mode channel alignment.
#define | PWM_CPOL 9
PWM Mode channel polarity.
#define | PWM_CPD 10
PWM Mode channel update period.
#define | PWM_CDTY_OFF 0x00000004
PWM Channel Duty Cycle Register.
#define | PWM_CDTY0 (*((reg32_t *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH0_OFF)))
PWM Channel 0 Duty Cycle Register.
#define | PWM_CDTY1 (*((reg32_t *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH1_OFF)))
PWM Channel 1 Duty Cycle Register.
#define | PWM_CDTY2 (*((reg32_t *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH2_OFF)))
PWM Channel 2 Duty Cycle Register.
#define | PWM_CDTY3 (*((reg32_t *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH3_OFF)))
PWM Channel 3 Duty Cycle Register.
#define | PWM_CPRD_OFF 0x00000008
PWM Channel Period Register.
#define | PWM_CPRD0 (*((reg32_t *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH0_OFF)))
PWM Channel 0 Period Register.
#define | PWM_CPRD1 (*((reg32_t *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH1_OFF)))
PWM Channel 1 Period Register.
#define | PWM_CPRD2 (*((reg32_t *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH2_OFF)))
PWM Channel 2 Period Register.
#define | PWM_CPRD3 (*((reg32_t *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH3_OFF)))
PWM Channel 3 Period Register.
#define | PWM_CCNT_OFF 0x0000000C
PWM Channel Counter Register.
#define | PWM_CCNT0 (*((reg32_t *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH0_OFF)))
PWM Channel 0 Counter Register.
#define | PWM_CCNT1 (*((reg32_t *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH1_OFF)))
PWM Channel 1 Counter Register.
#define | PWM_CCNT2 (*((reg32_t *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH2_OFF)))
PWM Channel 2 Counter Register.
#define | PWM_CCNT3 (*((reg32_t *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH3_OFF)))
PWM Channel 3 Counter Register.
#define | PWM_CUPD_OFF 0x00000010
PWM Channel Update Register.
#define | PWM_CUPD0 (*((reg32_t *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH0_OFF)))
PWM Channel 0 Update Register.
#define | PWM_CUPD1 (*((reg32_t *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH1_OFF)))
PWM Channel 1 Update Register.
#define | PWM_CUPD2 (*((reg32_t *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH2_OFF)))
PWM Channel 2 Update Register.
#define | PWM_CUPD3 (*((reg32_t *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH3_OFF)))
PWM Channel 3 Update Register.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

AT91SAM7 Pulse Width Modulation Controller.

Definition in file at91_pwm.h.

Define Documentation

#define PWM_CCNT_OFF 0x0000000C

PWM Channel Counter Register.

PWM Channel Counter Register offset.

Definition at line 202 of file at91_pwm.h.

#define PWM_CDTY_OFF 0x00000004

PWM Channel Duty Cycle Register.

PWM Channel Duty Cycle Register offset.

Definition at line 178 of file at91_pwm.h.

#define PWM_CMR_OFF 0x00000000

PWM Channel Mode Register.

PWM Channel Mode Register offset.

Definition at line 147 of file at91_pwm.h.

#define PWM_CPRD_OFF 0x00000008

PWM Channel Period Register.

PWM Channel Period Register offset.

Definition at line 190 of file at91_pwm.h.

#define PWM_CUPD_OFF 0x00000010

PWM Channel Update Register.

PWM Channel Update Register offset.

Definition at line 214 of file at91_pwm.h.

#define PWM_DIS_OFF 0x00000008

PWM Disable Register.

PWM Disable Register offset.

Definition at line 94 of file at91_pwm.h.

#define PWM_ENA_OFF 0x00000004

PWM Enable Register.

PWM Enable Register offset.

Definition at line 86 of file at91_pwm.h.

#define PWM_IDR_OFF 0x00000014

PWM Interrupt Disable Register.

PWM Interrupt Disable Register offset.

Definition at line 118 of file at91_pwm.h.

#define PWM_IER_OFF 0x00000010

PWM Interrupt Enable Register.

PWM Interrupt Enable Register offset.

Definition at line 110 of file at91_pwm.h.

#define PWM_IMR_OFF 0x00000018

PWM Interrupt Mask Register.

PWM Interrupt Mask Register offset.

Definition at line 126 of file at91_pwm.h.

#define PWM_ISR_OFF 0x0000001C

PWM Interrupt Status Register.

PWM Interrupt Status Register offset.

Definition at line 134 of file at91_pwm.h.

#define PWM_MR_OFF 0x00000000

PWM Mode Register.

PWM Mode Register offset.

Definition at line 46 of file at91_pwm.h.

#define PWM_SR_OFF 0x0000000C

PWM Status Register.

PWM Status Register offset.

Definition at line 102 of file at91_pwm.h.


BeRTOS: at91_pwm.h Source File

  • cpu
  • arm
  • io
at91_pwm.h
Go to the documentation of this file.
00001
00039 #ifndef AT91_PWM_H
00040 #define AT91_PWM_H
00041
00045 /*\{*/
00046 #define PWM_MR_OFF              0x00000000    ///< PWM Mode Register offset.
00047 #define PWM_MR     (*((reg32_t *)(PWMC_BASE + PWM_MR_OFF))) ///< PWM Mode Register.
00048 #define PWM_MR_DIVA_MASK        0x000000FF    ///< PWM Mode Divide factor A Mask.
00049 #define PWM_MR_DIVA_SHIFT       0             ///< PWM Mode Divide factor A LSB.
00050 #define PWM_MR_DIVB_MASK        0x00FF0000    ///< PWM Mode Divide factor B Mask.
00051 #define PWM_MR_DIVB_SHIFT       16            ///< PWM Mode Divide factor B LSB.
00052
00053 #define PWM_MR_PREA_MASK        0x00000F00    ///< PWM Mode prescaler A Mask.
00054 #define PWM_MR_PREA_SHIFT       8             ///< PWM Mode prescaler A LSB.
00055 #define PWM_MR_PREB_MASK        0x0F000000    ///< PWM Mode prescaler B Mask.
00056 #define PWM_MR_PREB_SHIFT       24            ///< PWM Mode prescaler B LSB.
00057
00058 #define PWM_MR_PRE_MCK          0             ///< PWM Mode prescaler set to MCK.
00059 #define PWM_MR_PRE_MCK_DIV2     1             ///< PWM Mode prescaler set to MCK/2.
00060 #define PWM_MR_PRE_MCK_DIV4     2             ///< PWM Mode prescaler set to MCK/4.
00061 #define PWM_MR_PRE_MCK_DIV8     3             ///< PWM Mode prescaler set to MCK/8.
00062 #define PWM_MR_PRE_MCK_DIV16    4             ///< PWM Mode prescaler set to MCK/16.
00063 #define PWM_MR_PRE_MCK_DIV32    5             ///< PWM Mode prescaler set to MCK/32.
00064 #define PWM_MR_PRE_MCK_DIV64    6             ///< PWM Mode prescaler set to MCK/64.
00065 #define PWM_MR_PRE_MCK_DIV128   7             ///< PWM Mode prescaler set to MCK/128.
00066 #define PWM_MR_PRE_MCK_DIV256   8             ///< PWM Mode prescaler set to MCK/256.
00067 #define PWM_MR_PRE_MCK_DIV512   9             ///< PWM Mode prescaler set to MCK/512.
00068 #define PWM_MR_PRE_MCK_DIV1024  10            ///< PWM Mode prescaler set to MCK/1024.
00069 /*\}*/
00070
00074 /*\{*/
00075 #define PWM_CHID_MASK           0x0000000F
00076 #define PWM_CHID0               0
00077 #define PWM_CHID1               1
00078 #define PWM_CHID2               2
00079 #define PWM_CHID3               3
00080 /*\}*/
00081
00085 /*\{*/
00086 #define PWM_ENA_OFF             0x00000004    ///< PWM Enable Register offset.
00087 #define PWM_ENA     (*((reg32_t *)(PWMC_BASE + PWM_ENA_OFF))) ///< PWM Enable Register.
00088 /*\}*/
00089
00093 /*\{*/
00094 #define PWM_DIS_OFF             0x00000008    ///< PWM Disable Register offset.
00095 #define PWM_DIS     (*((reg32_t *)(PWMC_BASE + PWM_DIS_OFF))) ///< PWM Disable Register.
00096 /*\}*/
00097
00101 /*\{*/
00102 #define PWM_SR_OFF              0x0000000C    ///< PWM Status Register offset.
00103 #define PWM_SR      (*((reg32_t *)(PWMC_BASE + PWM_SR_OFF)))  ///< PWM Status Register.
00104 /*\}*/
00105
00109 /*\{*/
00110 #define PWM_IER_OFF             0x00000010    ///< PWM Interrupt Enable Register offset.
00111 #define PWM_IER     (*((reg32_t *)(PWMC_BASE + PWM_IER_OFF))) ///< PWM Interrupt Enable Register.
00112 /*\}*/
00113
00117 /*\{*/
00118 #define PWM_IDR_OFF             0x00000014    ///< PWM Interrupt Disable Register offset.
00119 #define PWM_IDR     (*((reg32_t *)(PWMC_BASE + PWM_IDR_OFF))) ///< PWM Interrupt Disable Register.
00120 /*\}*/
00121
00125 /*\{*/
00126 #define PWM_IMR_OFF             0x00000018    ///< PWM Interrupt Mask Register offset.
00127 #define PWM_IMR     (*((reg32_t *)(PWMC_BASE + PWM_IMR_OFF))) ///< PWM Interrupt Mask Register.
00128 /*\}*/
00129
00133 /*\{*/
00134 #define PWM_ISR_OFF             0x0000001C    ///< PWM Interrupt Status Register offset.
00135 #define PWM_ISR     (*((reg32_t *)(PWMC_BASE + PWM_ISR_OFF))) ///< PWM Interrupt Status Register.
00136 /*\}*/
00137
00138 #define PWM_CH0_OFF             0x00000200    ///< PWM Channel 0 registers offset.
00139 #define PWM_CH1_OFF             0x00000220    ///< PWM Channel 1 registers offset.
00140 #define PWM_CH2_OFF             0x00000240    ///< PWM Channel 2 registers offset.
00141 #define PWM_CH3_OFF             0x00000260    ///< PWM Channel 3 registers offset.
00142
00146 /*\{*/
00147 #define PWM_CMR_OFF             0x00000000    ///< PWM Channel Mode Register offset.
00148 #define PWM_CMR0    (*((reg32_t *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Mode Register.
00149 #define PWM_CMR1    (*((reg32_t *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Mode Register.
00150 #define PWM_CMR2    (*((reg32_t *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Mode Register.
00151 #define PWM_CMR3    (*((reg32_t *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Mode Register.
00152
00153 #define PWM_CPRE_MCK_MASK       0x0000000F    ///< PWM Mode prescaler mask.
00154 #define PWM_CPRE_MCK            0             ///< PWM Mode prescaler set to MCK.
00155 #define PWM_CPRE_MCK_DIV2       1             ///< PWM Mode prescaler set to MCK/2.
00156 #define PWM_CPRE_MCK_DIV4       2             ///< PWM Mode prescaler set to MCK/4.
00157 #define PWM_CPRE_MCK_DIV8       3             ///< PWM Mode prescaler set to MCK/8.
00158 #define PWM_CPRE_MCK_DIV16      4             ///< PWM Mode prescaler set to MCK/16.
00159 #define PWM_CPRE_MCK_DIV32      5             ///< PWM Mode prescaler set to MCK/32.
00160 #define PWM_CPRE_MCK_DIV64      6             ///< PWM Mode prescaler set to MCK/64.
00161 #define PWM_CPRE_MCK_DIV128     7             ///< PWM Mode prescaler set to MCK/128.
00162 #define PWM_CPRE_MCK_DIV256     8             ///< PWM Mode prescaler set to MCK/256.
00163 #define PWM_CPRE_MCK_DIV512     9             ///< PWM Mode prescaler set to MCK/512.
00164 #define PWM_CPRE_MCK_DIV1024    10            ///< PWM Mode prescaler set to MCK/1024.
00165 #define PWM_CPRE_CLKA           11            ///< PWM Mode prescaler set to CLKA.
00166 #define PWM_CPRE_CLKB           12            ///< PWM Mode prescaler set to CLKB.
00167
00168 #define PWM_CALG                8             ///< PWM Mode channel alignment.
00169 #define PWM_CPOL                9             ///< PWM Mode channel polarity.
00170 #define PWM_CPD                 10            ///< PWM Mode channel update period.
00171 /*\}*/
00172
00173
00177 /*\{*/
00178 #define PWM_CDTY_OFF            0x00000004    ///< PWM Channel Duty Cycle Register offset.
00179 #define PWM_CDTY0   (*((reg32_t *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Duty Cycle Register.
00180 #define PWM_CDTY1   (*((reg32_t *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Duty Cycle Register.
00181 #define PWM_CDTY2   (*((reg32_t *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Duty Cycle Register.
00182 #define PWM_CDTY3   (*((reg32_t *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Duty Cycle Register.
00183 /*\}*/
00184
00185
00189 /*\{*/
00190 #define PWM_CPRD_OFF            0x00000008    ///< PWM Channel Period Register offset.
00191 #define PWM_CPRD0   (*((reg32_t *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Period Register.
00192 #define PWM_CPRD1   (*((reg32_t *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Period Register.
00193 #define PWM_CPRD2   (*((reg32_t *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Period Register.
00194 #define PWM_CPRD3   (*((reg32_t *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Period Register.
00195 /*\}*/
00196
00197
00201 /*\{*/
00202 #define PWM_CCNT_OFF            0x0000000C    ///< PWM Channel Counter Register offset.
00203 #define PWM_CCNT0   (*((reg32_t *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Counter Register.
00204 #define PWM_CCNT1   (*((reg32_t *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Counter Register.
00205 #define PWM_CCNT2   (*((reg32_t *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Counter Register.
00206 #define PWM_CCNT3   (*((reg32_t *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Counter Register.
00207 /*\}*/
00208
00209
00213 /*\{*/
00214 #define PWM_CUPD_OFF            0x00000010    ///< PWM Channel Update Register offset.
00215 #define PWM_CUPD0   (*((reg32_t *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Update Register.
00216 #define PWM_CUPD1   (*((reg32_t *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Update Register.
00217 #define PWM_CUPD2   (*((reg32_t *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Update Register.
00218 #define PWM_CUPD3   (*((reg32_t *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Update Register.
00219 /*\}*/
00220
00221 #endif /* AT91_PWM_H */


BeRTOS: at91_rstc.h File Reference

  • cpu
  • arm
  • io
at91_rstc.h File Reference

Go to the source code of this file.

Defines

#define | RSTC_CR (*((reg32_t *)(RSTC_BASE + 0x00)))
Reset Controller Control Register.
#define | RSTC_PROCRST 0
Processor reset.
#define | RSTC_PERRST 2
Peripheral reset.
#define | RSTC_EXTRST 3
External reset.
#define | RSTC_KEY 0xA5000000
Password.
#define | RSTC_SR (*((reg32_t *)(RSTC_BASE + 0x04)))
Reset Controller Status Register.
#define | RSTC_URSTS 0
User reset status.
#define | RSTC_BODSTS 1
Brownout detection status.
#define | RSTC_RSTTYP_MASK 0x00000700
Reset type.
#define | RSTC_RSTTYP_POWERUP 0x00000000
Power-up reset.
#define | RSTC_RSTTYP_WATCHDOG 0x00000200
Watchdog reset.
#define | RSTC_RSTTYP_SOFTWARE 0x00000300
Software reset.
#define | RSTC_RSTTYP_USER 0x00000400
User reset.
#define | RSTC_RSTTYP_BROWNOUT 0x00000500
Brownout reset.
#define | RSTC_NRSTL 16
NRST pin level.
#define | RSTC_SRCMP 17
Software reset command in progress.
#define | RSTC_MR (*((reg32_t *)(RSTC_BASE + 0x08)))
Reset Controller Mode Register.
#define | RSTC_URSTEN 0
User reset enable.
#define | RSTC_URSTIEN 4
User reset interrupt enable.
#define | RSTC_ERSTL_MASK 0x00000F00
External reset length.
#define | RSTC_ERSTL_SHIFT 8
Least significant bit of external reset length.
#define | RSTC_BODIEN 16
Brown-out detection interrupt enable.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

AT91 reset controller. This file is based on NUT/OS implementation. See license below.

Definition in file at91_rstc.h.

Define Documentation

#define RSTC_CR (*((reg32_t *)(RSTC_BASE + 0x00)))

Reset Controller Control Register.

Reset controller control register address.

Definition at line 77 of file at91_rstc.h.

#define RSTC_MR (*((reg32_t *)(RSTC_BASE + 0x08)))

Reset Controller Mode Register.

Reset controller mode register address.

Definition at line 102 of file at91_rstc.h.

#define RSTC_SR (*((reg32_t *)(RSTC_BASE + 0x04)))

Reset Controller Status Register.

Reset controller status register address.

Definition at line 86 of file at91_rstc.h.


BeRTOS: at91_rstc.h Source File

  • cpu
  • arm
  • io
at91_rstc.h
Go to the documentation of this file.
00001
00040 /*
00041  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00042  *
00043  * Redistribution and use in source and binary forms, with or without
00044  * modification, are permitted provided that the following conditions
00045  * are met:
00046  *
00047  * 1. Redistributions of source code must retain the above copyright
00048  *    notice, this list of conditions and the following disclaimer.
00049  * 2. Redistributions in binary form must reproduce the above copyright
00050  *    notice, this list of conditions and the following disclaimer in the
00051  *    documentation and/or other materials provided with the distribution.
00052  * 3. Neither the name of the copyright holders nor the names of
00053  *    contributors may be used to endorse or promote products derived
00054  *    from this software without specific prior written permission.
00055  *
00056  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00057  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00058  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00059  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00060  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00062  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00063  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00064  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00065  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00066  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00067  * SUCH DAMAGE.
00068  *
00069  * For additional information see http://www.ethernut.de/
00070  */
00071
00072 #ifndef AT91_RTSC_H
00073 #define AT91_RTSC_H
00074
00076 /*\{*/
00077 #define RSTC_CR         (*((reg32_t *)(RSTC_BASE + 0x00)))      ///< Reset controller control register address.
00078 #define RSTC_PROCRST                     0  ///< Processor reset.
00079 #define RSTC_PERRST                      2  ///< Peripheral reset.
00080 #define RSTC_EXTRST                      3  ///< External reset.
00081 #define RSTC_KEY                0xA5000000  ///< Password.
00082 /*\}*/
00083
00085 /*\{*/
00086 #define RSTC_SR         (*((reg32_t *)(RSTC_BASE + 0x04)))      ///< Reset controller status register address.
00087 #define RSTC_URSTS                       0  ///< User reset status.
00088 #define RSTC_BODSTS                      1  ///< Brownout detection status.
00089 #define RSTC_RSTTYP_MASK        0x00000700  ///< Reset type.
00090 #define RSTC_RSTTYP_POWERUP     0x00000000  ///< Power-up reset.
00091 //#define RSTC_RSTTYP_WAKEUP      0x00000100      ///< VDDCORE rising.
00092 #define RSTC_RSTTYP_WATCHDOG    0x00000200  ///< Watchdog reset.
00093 #define RSTC_RSTTYP_SOFTWARE    0x00000300  ///< Software reset.
00094 #define RSTC_RSTTYP_USER        0x00000400  ///< User reset.
00095 #define RSTC_RSTTYP_BROWNOUT    0x00000500  ///< Brownout reset.
00096 #define RSTC_NRSTL                      16  ///< NRST pin level.
00097 #define RSTC_SRCMP                      17  ///< Software reset command in progress.
00098 /*\}*/
00099
00101 /*\{*/
00102 #define RSTC_MR         (*((reg32_t *)(RSTC_BASE + 0x08)))      ///< Reset controller mode register address.
00103 #define RSTC_URSTEN                      0  ///< User reset enable.
00104 #define RSTC_URSTIEN                     4  ///< User reset interrupt enable.
00105 #define RSTC_ERSTL_MASK         0x00000F00  ///< External reset length.
00106 #define RSTC_ERSTL_SHIFT                 8  ///< Least significant bit of external reset length.
00107 #define RSTC_BODIEN                     16  ///< Brown-out detection interrupt enable.
00108 /*\}*/
00109
00110
00111 #endif /* AT91_RTSC_H */


BeRTOS: at91_spi.h File Reference

  • cpu
  • arm
  • io
at91_spi.h File Reference

Go to the source code of this file.

Defines

#define | SPI_CR_OFF 0x00000000
SPI Control Register.
#define | SPI_SPIEN 0
SPI enable.
#define | SPI_SPIDIS 1
SPI disable.
#define | SPI_SWRST 7
Software reset.
#define | SPI_LASTXFER 24
Last transfer.
#define | SPI_MR_OFF 0x00000004
SPI Mode Register.
#define | SPI_MSTR 0
Master mode.
#define | SPI_PS 1
Peripheral select.
#define | SPI_PCSDEC 2
Chip select decode.
#define | SPI_FDIV 3
Clock selection.
#define | SPI_MODFDIS 4
Mode fault detection.
#define | SPI_LLB 7
Local loopback enable.
#define | SPI_PCS 0x000F0000
Peripheral chip select mask.
#define | SPI_PCS_0 0x000E0000
Peripheral chip select 0.
#define | SPI_PCS_1 0x000D0000
Peripheral chip select 1.
#define | SPI_PCS_2 0x000B0000
Peripheral chip select 2.
#define | SPI_PCS_3 0x00070000
Peripheral chip select 3.
#define | SPI_PCS_SHIFT 16
Least significant bit of peripheral chip select.
#define | SPI_DLYBCS 0xFF000000
Mask for delay between chip selects.
#define | SPI_DLYBCS_SHIFT 24
Least significant bit of delay between chip selects.
#define | SPI_RDR_OFF 0x00000008
SPI Receive Data Register.
#define | SPI_RD 0x0000FFFF
Receive data mask.
#define | SPI_RD_SHIFT 0
Least significant bit of receive data.
#define | SPI_TDR_OFF 0x0000000C
SPI Transmit Data Register.
#define | SPI_TD 0x0000FFFF
Transmit data mask.
#define | SPI_TD_SHIFT 0
Least significant bit of transmit data.
#define | SPI_SR_OFF 0x00000010
SPI Status and Interrupt Register.
#define | SPI_IER_OFF 0x00000014
Interrupt enable register offset.
#define | SPI_IDR_OFF 0x00000018
Interrupt disable register offset.
#define | SPI_IMR_OFF 0x0000001C
Interrupt mask register offset.
#define | SPI_RDRF 0
Receive data register full.
#define | SPI_TDRE 1
Transmit data register empty.
#define | SPI_MODF 2
Mode fault error.
#define | SPI_OVRES 3
Overrun error status.
#define | SPI_ENDRX 4
End of RX buffer.
#define | SPI_ENDTX 5
End of TX buffer.
#define | SPI_RXBUFF 6
RX buffer full.
#define | SPI_TXBUFE 7
TX buffer empty.
#define | SPI_NSSR 8
NSS rising.
#define | SPI_TXEMPTY 9
Transmission register empty.
#define | SPI_SPIENS 16
SPI enable status.
#define | SPI_CSR0_OFF 0x00000030
SPI Chip Select Registers.
#define | SPI_CSR1_OFF 0x00000034
Chip select register 1 offset.
#define | SPI_CSR2_OFF 0x00000038
Chip select register 2 offset.
#define | SPI_CSR3_OFF 0x0000003C
Chip select register 3 offset.
#define | SPI_CPOL 0
Clock polarity.
#define | SPI_NCPHA 1
Clock phase.
#define | SPI_CSAAT 3
Chip select active after transfer.
#define | SPI_BITS 0x000000F0
Bits per transfer mask.
#define | SPI_BITS_8 0x00000000
8 bits per transfer.
#define | SPI_BITS_9 0x00000010
9 bits per transfer.
#define | SPI_BITS_10 0x00000020
10 bits per transfer.
#define | SPI_BITS_11 0x00000030
11 bits per transfer.
#define | SPI_BITS_12 0x00000040
12 bits per transfer.
#define | SPI_BITS_13 0x00000050
13 bits per transfer.
#define | SPI_BITS_14 0x00000060
14 bits per transfer.
#define | SPI_BITS_15 0x00000070
15 bits per transfer.
#define | SPI_BITS_16 0x00000080
16 bits per transfer.
#define | SPI_BITS_SHIFT 4
Least significant bit of bits per transfer.
#define | SPI_SCBR 0x0000FF00
Serial clock baud rate mask.
#define | SPI_SCBR_SHIFT 8
Least significant bit of serial clock baud rate.
#define | SPI_DLYBS 0x00FF0000
Delay before SPCK mask.
#define | SPI_DLYBS_SHIFT 16
Least significant bit of delay before SPCK.
#define | SPI_DLYBCT 0xFF000000
Delay between consecutive transfers mask.
#define | SPI_DLYBCT_SHIFT 24
Least significant bit of delay between consecutive transfers.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

AT91SAM7 SPI register definitions. This file is based on NUT/OS implementation. See license below.

Definition in file at91_spi.h.

Define Documentation

#define SPI_CR_OFF 0x00000000

SPI Control Register.

Control register offset.

Definition at line 81 of file at91_spi.h.

#define SPI_CSR0_OFF 0x00000030

SPI Chip Select Registers.

Chip select register 0 offset.

Definition at line 157 of file at91_spi.h.

#define SPI_MR_OFF 0x00000004

SPI Mode Register.

Mode register offset.

Definition at line 93 of file at91_spi.h.

#define SPI_RDR_OFF 0x00000008

SPI Receive Data Register.

Receive data register offset.

Definition at line 115 of file at91_spi.h.

#define SPI_SR_OFF 0x00000010

SPI Status and Interrupt Register.

Status register offset.

Definition at line 135 of file at91_spi.h.

#define SPI_TDR_OFF 0x0000000C

SPI Transmit Data Register.

Transmit data register offset.

Definition at line 125 of file at91_spi.h.


BeRTOS: at91_spi.h Source File

  • cpu
  • arm
  • io
at91_spi.h
Go to the documentation of this file.
00001
00041 /*
00042  * Copyright (C) 2006-2007 by egnite Software GmbH. All rights reserved.
00043  *
00044  * Redistribution and use in source and binary forms, with or without
00045  * modification, are permitted provided that the following conditions
00046  * are met:
00047  *
00048  * 1. Redistributions of source code must retain the above copyright
00049  *    notice, this list of conditions and the following disclaimer.
00050  * 2. Redistributions in binary form must reproduce the above copyright
00051  *    notice, this list of conditions and the following disclaimer in the
00052  *    documentation and/or other materials provided with the distribution.
00053  * 3. Neither the name of the copyright holders nor the names of
00054  *    contributors may be used to endorse or promote products derived
00055  *    from this software without specific prior written permission.
00056  *
00057  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00058  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00059  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00060  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00061  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00062  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00063  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00064  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00065  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00066  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00067  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00068  * SUCH DAMAGE.
00069  *
00070  * For additional information see http://www.ethernut.de/
00071
00072  */
00073
00074 #ifndef AT91_SPI_H
00075 #define AT91_SPI_H
00076
00080 /*\{*/
00081 #define SPI_CR_OFF      0x00000000  ///< Control register offset.
00082
00083 #define SPI_SPIEN                0  ///< SPI enable.
00084 #define SPI_SPIDIS               1  ///< SPI disable.
00085 #define SPI_SWRST                7  ///< Software reset.
00086 #define SPI_LASTXFER            24  ///< Last transfer.
00087 /*\}*/
00088
00092 /*\{*/
00093 #define SPI_MR_OFF      0x00000004  ///< Mode register offset.
00094
00095 #define SPI_MSTR                 0  ///< Master mode.
00096 #define SPI_PS                   1  ///< Peripheral select.
00097 #define SPI_PCSDEC               2 ///< Chip select decode.
00098 #define SPI_FDIV                 3  ///< Clock selection.
00099 #define SPI_MODFDIS              4  ///< Mode fault detection.
00100 #define SPI_LLB                  7  ///< Local loopback enable.
00101 #define SPI_PCS         0x000F0000  ///< Peripheral chip select mask.
00102 #define SPI_PCS_0       0x000E0000  ///< Peripheral chip select 0.
00103 #define SPI_PCS_1       0x000D0000  ///< Peripheral chip select 1.
00104 #define SPI_PCS_2       0x000B0000  ///< Peripheral chip select 2.
00105 #define SPI_PCS_3       0x00070000  ///< Peripheral chip select 3.
00106 #define SPI_PCS_SHIFT           16  ///< Least significant bit of peripheral chip select.
00107 #define SPI_DLYBCS      0xFF000000  ///< Mask for delay between chip selects.
00108 #define SPI_DLYBCS_SHIFT        24  ///< Least significant bit of delay between chip selects.
00109 /*\}*/
00110
00114 /*\{*/
00115 #define SPI_RDR_OFF     0x00000008  ///< Receive data register offset.
00116
00117 #define SPI_RD          0x0000FFFF  ///< Receive data mask.
00118 #define SPI_RD_SHIFT             0  ///< Least significant bit of receive data.
00119 /*\}*/
00120
00124 /*\{*/
00125 #define SPI_TDR_OFF     0x0000000C  ///< Transmit data register offset.
00126
00127 #define SPI_TD          0x0000FFFF  ///< Transmit data mask.
00128 #define SPI_TD_SHIFT             0  ///< Least significant bit of transmit data.
00129 /*\}*/
00130
00134 /*\{*/
00135 #define SPI_SR_OFF      0x00000010  ///< Status register offset.
00136 #define SPI_IER_OFF     0x00000014  ///< Interrupt enable register offset.
00137 #define SPI_IDR_OFF     0x00000018  ///< Interrupt disable register offset.
00138 #define SPI_IMR_OFF     0x0000001C  ///< Interrupt mask register offset.
00139
00140 #define SPI_RDRF                 0  ///< Receive data register full.
00141 #define SPI_TDRE                 1  ///< Transmit data register empty.
00142 #define SPI_MODF                 2  ///< Mode fault error.
00143 #define SPI_OVRES                3  ///< Overrun error status.
00144 #define SPI_ENDRX                4  ///< End of RX buffer.
00145 #define SPI_ENDTX                5  ///< End of TX buffer.
00146 #define SPI_RXBUFF               6  ///< RX buffer full.
00147 #define SPI_TXBUFE               7  ///< TX buffer empty.
00148 #define SPI_NSSR                 8  ///< NSS rising.
00149 #define SPI_TXEMPTY              9  ///< Transmission register empty.
00150 #define SPI_SPIENS              16  ///< SPI enable status.
00151 /*\}*/
00152
00156 /*\{*/
00157 #define SPI_CSR0_OFF    0x00000030  ///< Chip select register 0 offset.
00158 #define SPI_CSR1_OFF    0x00000034  ///< Chip select register 1 offset.
00159 #define SPI_CSR2_OFF    0x00000038  ///< Chip select register 2 offset.
00160 #define SPI_CSR3_OFF    0x0000003C  ///< Chip select register 3 offset.
00161
00162 #define SPI_CPOL                 0  ///< Clock polarity.
00163 #define SPI_NCPHA                1  ///< Clock phase.
00164 #define SPI_CSAAT                3  ///< Chip select active after transfer.
00165 #define SPI_BITS        0x000000F0  ///< Bits per transfer mask.
00166 #define SPI_BITS_8      0x00000000  ///< 8 bits per transfer.
00167 #define SPI_BITS_9      0x00000010  ///< 9 bits per transfer.
00168 #define SPI_BITS_10     0x00000020  ///< 10 bits per transfer.
00169 #define SPI_BITS_11     0x00000030  ///< 11 bits per transfer.
00170 #define SPI_BITS_12     0x00000040  ///< 12 bits per transfer.
00171 #define SPI_BITS_13     0x00000050  ///< 13 bits per transfer.
00172 #define SPI_BITS_14     0x00000060  ///< 14 bits per transfer.
00173 #define SPI_BITS_15     0x00000070  ///< 15 bits per transfer.
00174 #define SPI_BITS_16     0x00000080  ///< 16 bits per transfer.
00175 #define SPI_BITS_SHIFT           4  ///< Least significant bit of bits per transfer.
00176 #define SPI_SCBR        0x0000FF00  ///< Serial clock baud rate mask.
00177 #define SPI_SCBR_SHIFT           8  ///< Least significant bit of serial clock baud rate.
00178 #define SPI_DLYBS       0x00FF0000  ///< Delay before SPCK mask.
00179 #define SPI_DLYBS_SHIFT         16  ///< Least significant bit of delay before SPCK.
00180 #define SPI_DLYBCT      0xFF000000  ///< Delay between consecutive transfers mask.
00181 #define SPI_DLYBCT_SHIFT        24  ///< Least significant bit of delay between consecutive transfers.
00182 /*\}*/
00183
00187 /*\{*/
00188 #if defined(SPI_BASE)
00189     #define SPI0_BASE   SPI_BASE
00190     #define SPI_CR      SPI0_CR     ///< SPI Control Register Write-only.
00191     #define SPI_MR      SPI0_MR     ///< SPI Mode Register Read/Write Reset=0x0.
00192     #define SPI_RDR     SPI0_RDR    ///< SPI Receive Data Register Read-only Reset=0x0.
00193     #define SPI_TDR     SPI0_TDR    ///< SPI Transmit Data Register Write-only .
00194     #define SPI_SR      SPI0_SR     ///< SPI Status Register Read-only Reset=0x000000F0.
00195     #define SPI_IER     SPI0_IER    ///< SPI Interrupt Enable Register Write-only.
00196     #define SPI_IDR     SPI0_IDR    ///< SPI Interrupt Disable Register Write-only.
00197     #define SPI_IMR     SPI0_IMR    ///< SPI Interrupt Mask Register Read-only Reset=0x0.
00198     #define SPI_CSR0    SPI0_CSR0   ///< SPI Chip Select Register 0 Read/Write Reset=0x0.
00199     #define SPI_CSR1    SPI0_CSR1   ///< SPI Chip Select Register 1 Read/Write Reset=0x0.
00200     #define SPI_CSR2    SPI0_CSR2   ///< SPI Chip Select Register 2 Read/Write Reset=0x0.
00201     #define SPI_CSR3    SPI0_CSR3   ///< SPI Chip Select Register 3 Read/Write Reset=0x0.
00202     #if defined(SPI_HAS_PDC)
00203         #define SPI_RPR     SPI0_RPR    ///< PDC channel 0 receive pointer register.
00204         #define SPI_RCR     SPI0_RCR    ///< PDC channel 0 receive counter register.
00205         #define SPI_TPR     SPI0_TPR    ///< PDC channel 0 transmit pointer register.
00206         #define SPI_TCR     SPI0_TCR    ///< PDC channel 0 transmit counter register.
00207         #define SPI_RNPR    SPI0_RNPR   ///< PDC channel 0 receive next pointer register.
00208         #define SPI_RNCR    SPI0_RNCR   ///< PDC channel 0 receive next counter register.
00209         #define SPI_TNPR    SPI0_TNPR   ///< PDC channel 0 transmit next pointer register.
00210         #define SPI_TNCR    SPI0_TNCR   ///< PDC channel 0 transmit next counter register.
00211         #define SPI_PTCR    SPI0_PTCR   ///< PDC channel 0 transfer control register.
00212         #define SPI_PTSR    SPI0_PTSR   ///< PDC channel 0 transfer status register.
00213     #endif /* SPI_HAS_PDC */
00214 #endif /* SPI_BASE */
00215 /*\}*/
00216
00220 /*\{*/
00221 #if defined(SPI0_BASE)
00222     #define SPI0_CR     (*((reg32_t *)(SPI0_BASE + SPI_CR_OFF)))        ///< SPI Control Register Write-only.
00223     #define SPI0_MR     (*((reg32_t *)(SPI0_BASE + SPI_MR_OFF)))        ///< SPI Mode Register Read/Write Reset=0x0.
00224     #define SPI0_RDR    (*((reg32_t *)(SPI0_BASE + SPI_RDR_OFF)))       ///< SPI Receive Data Register Read-only Reset=0x0.
00225     #define SPI0_TDR    (*((reg32_t *)(SPI0_BASE + SPI_TDR_OFF)))       ///< SPI Transmit Data Register Write-only .
00226     #define SPI0_SR     (*((reg32_t *)(SPI0_BASE + SPI_SR_OFF)))        ///< SPI Status Register Read-only Reset=0x000000F0.
00227     #define SPI0_IER    (*((reg32_t *)(SPI0_BASE + SPI_IER_OFF)))       ///< SPI Interrupt Enable Register Write-only.
00228     #define SPI0_IDR    (*((reg32_t *)(SPI0_BASE + SPI_IDR_OFF)))       ///< SPI Interrupt Disable Register Write-only.
00229     #define SPI0_IMR    (*((reg32_t *)(SPI0_BASE + SPI_IMR_OFF)))       ///< SPI Interrupt Mask Register Read-only Reset=0x0.
00230     #define SPI0_CSR0   (*((reg32_t *)(SPI0_BASE + SPI_CSR0_OFF)))      ///< SPI Chip Select Register 0 Read/Write Reset=0x0.
00231     #define SPI0_CSR1   (*((reg32_t *)(SPI0_BASE + SPI_CSR1_OFF)))      ///< SPI Chip Select Register 1 Read/Write Reset=0x0.
00232     #define SPI0_CSR2   (*((reg32_t *)(SPI0_BASE + SPI_CSR2_OFF)))      ///< SPI Chip Select Register 2 Read/Write Reset=0x0.
00233     #define SPI0_CSR3   (*((reg32_t *)(SPI0_BASE + SPI_CSR3_OFF)))      ///< SPI Chip Select Register 3 Read/Write Reset=0x0.
00234     #if defined(SPI_HAS_PDC)
00235         #define SPI0_RPR    (*((reg32_t *)(SPI0_BASE + PERIPH_RPR_OFF)))    ///< PDC channel 0 receive pointer register.
00236         #define SPI0_RCR    (*((reg32_t *)(SPI0_BASE + PERIPH_RCR_OFF)))    ///< PDC channel 0 receive counter register.
00237         #define SPI0_TPR    (*((reg32_t *)(SPI0_BASE + PERIPH_TPR_OFF)))    ///< PDC channel 0 transmit pointer register.
00238         #define SPI0_TCR    (*((reg32_t *)(SPI0_BASE + PERIPH_TCR_OFF)))    ///< PDC channel 0 transmit counter register.
00239         #define SPI0_RNPR   (*((reg32_t *)(SPI0_BASE + PERIPH_RNPR_OFF)))   ///< PDC channel 0 receive next pointer register.
00240         #define SPI0_RNCR   (*((reg32_t *)(SPI0_BASE + PERIPH_RNCR_OFF)))   ///< PDC channel 0 receive next counter register.
00241         #define SPI0_TNPR   (*((reg32_t *)(SPI0_BASE + PERIPH_TNPR_OFF)))   ///< PDC channel 0 transmit next pointer register.
00242         #define SPI0_TNCR   (*((reg32_t *)(SPI0_BASE + PERIPH_TNCR_OFF)))   ///< PDC channel 0 transmit next counter register.
00243         #define SPI0_PTCR   (*((reg32_t *)(SPI0_BASE + PERIPH_PTCR_OFF)))   ///< PDC channel 0 transfer control register.
00244         #define SPI0_PTSR   (*((reg32_t *)(SPI0_BASE + PERIPH_PTSR_OFF)))   ///< PDC channel 0 transfer status register.
00245     #endif /* SPI_HAS_PDC */
00246 #endif /* SPI0_BASE */
00247 /*\}*/
00248
00252 /*\{*/
00253 #if defined(SPI1_BASE)
00254     #define SPI1_CR     (*((reg32_t *)(SPI1_BASE + SPI_CR_OFF)))        ///< SPI Control Register Write-only.
00255     #define SPI1_MR     (*((reg32_t *)(SPI1_BASE + SPI_MR_OFF)))        ///< SPI Mode Register Read/Write Reset=0x0.
00256     #define SPI1_RDR    (*((reg32_t *)(SPI1_BASE + SPI_RDR_OFF)))       ///< SPI Receive Data Register Read-only Reset=0x0.
00257     #define SPI1_TDR    (*((reg32_t *)(SPI1_BASE + SPI_TDR_OFF)))       ///< SPI Transmit Data Register Write-only .
00258     #define SPI1_SR     (*((reg32_t *)(SPI1_BASE + SPI_SR_OFF)))        ///< SPI Status Register Read-only Reset=0x000000F0.
00259     #define SPI1_IER    (*((reg32_t *)(SPI1_BASE + SPI_IER_OFF)))       ///< SPI Interrupt Enable Register Write-only.
00260     #define SPI1_IDR    (*((reg32_t *)(SPI1_BASE + SPI_IDR_OFF)))       ///< SPI Interrupt Disable Register Write-only.
00261     #define SPI1_IMR    (*((reg32_t *)(SPI1_BASE + SPI_IMR_OFF)))       ///< SPI Interrupt Mask Register Read-only Reset=0x0.
00262     #define SPI1_CSR0   (*((reg32_t *)(SPI1_BASE + SPI_CSR0_OFF)))      ///< SPI Chip Select Register 0 Read/Write Reset=0x0.
00263     #define SPI1_CSR1   (*((reg32_t *)(SPI1_BASE + SPI_CSR1_OFF)))      ///< SPI Chip Select Register 1 Read/Write Reset=0x0.
00264     #define SPI1_CSR2   (*((reg32_t *)(SPI1_BASE + SPI_CSR2_OFF)))      ///< SPI Chip Select Register 2 Read/Write Reset=0x0.
00265     #define SPI1_CSR3   (*((reg32_t *)(SPI1_BASE + SPI_CSR3_OFF)))      ///< SPI Chip Select Register 3 Read/Write Reset=0x0.
00266     #if defined(SPI_HAS_PDC)
00267         #define SPI1_RPR    (*((reg32_t *)(SPI1_BASE + PERIPH_RPR_OFF)))    ///< PDC channel 1 receive pointer register.
00268         #define SPI1_RCR    (*((reg32_t *)(SPI1_BASE + PERIPH_RCR_OFF)))    ///< PDC channel 1 receive counter register.
00269         #define SPI1_TPR    (*((reg32_t *)(SPI1_BASE + PERIPH_TPR_OFF)))    ///< PDC channel 1 transmit pointer register.
00270         #define SPI1_TCR    (*((reg32_t *)(SPI1_BASE + PERIPH_TCR_OFF)))    ///< PDC channel 1 transmit counter register.
00271         #define SPI1_RNPR   (*((reg32_t *)(SPI1_BASE + PERIPH_RNPR_OFF)))   ///< PDC channel 1 receive next pointer register.
00272         #define SPI1_RNCR   (*((reg32_t *)(SPI1_BASE + PERIPH_RNCR_OFF)))   ///< PDC channel 1 receive next counter register.
00273         #define SPI1_TNPR   (*((reg32_t *)(SPI1_BASE + PERIPH_TNPR_OFF)))   ///< PDC channel 1 transmit next pointer register.
00274         #define SPI1_TNCR   (*((reg32_t *)(SPI1_BASE + PERIPH_TNCR_OFF)))   ///< PDC channel 1 transmit next counter register.
00275         #define SPI1_PTCR   (*((reg32_t *)(SPI1_BASE + PERIPH_PTCR_OFF)))   ///< PDC channel 1 transfer control register.
00276         #define SPI1_PTSR   (*((reg32_t *)(SPI1_BASE + PERIPH_PTSR_OFF)))   ///< PDC channel 1 transfer status register.
00277     #endif /* SPI_HAS_PDC */
00278 #endif /* SPI1_BASE */
00279 /*\}*/
00280
00281 #endif  /* AT91_SPI_H */


BeRTOS: at91_ssc.h File Reference

  • cpu
  • arm
  • io
at91_ssc.h File Reference
#include <io/at91sam7.h>

Go to the source code of this file.

Defines

#define | SSC_CR_OFF 0x00000000
SSC Control Register.
#define | SSC_RXEN 0
Receive enable.
#define | SSC_RXDIS 1
Receive disable.
#define | SSC_TXEN 8
Transmit enable.
#define | SSC_TXDIS 9
Transmit disable.
#define | SSC_SWRST 15
Software reset.
#define | SSC_CMR_OFF 0x00000004
SSC Clock Mode Register.
#define | SSC_DIV_MASK 0x00000FFF
Clock divider.
#define | SSC_RCMR_OFF 0x00000010
SSC Receive/Transmit Clock Mode Register.
#define | SSC_TCMR_OFF 0x00000018
Transmit clock mode register offset.
#define | SSC_CKS_MASK 0x00000003
Receive clock selection.
#define | SSC_CKS_DIV 0x00000000
Divided clock.
#define | SSC_CKS_CLK 0x00000001
RK/TK clock signal.
#define | SSC_CKS_PIN 0x00000002
TK/RK pin.
#define | SSC_CKO_MASK 0x0000001C
Receive clock output mode selection.
#define | SSC_CKO_NONE 0x00000000
None.
#define | SSC_CKO_CONT 0x00000004
Continous receive clock.
#define | SSC_CKO_TRAN 0x00000008
Receive clock only during data transfers.
#define | SSC_CKI 5
Receive clock inversion.
#define | SSC_CKG_MASK 0x000000C0
Receive clock gating selection.
#define | SSC_CKG_NONE 0x00000000
None, continous clock.
#define | SSC_CKG_FL 0x00000040
Continous receive clock.
#define | SSC_CKG_FH 0x00000080
Receive clock only during data transfers.
#define | SSC_START_MASK 0x00000F00
Receive start selection.
#define | SSC_START_CONT 0x00000000
Receive start as soon as enabled.
#define | SSC_START_TX 0x00000100
Receive start on transmit start.
#define | SSC_START_RX 0x00000100
Receive start on receive start.
#define | SSC_START_LOW_F 0x00000200
Receive start on low level RF.
#define | SSC_START_HIGH_F 0x00000300
Receive start on high level RF.
#define | SSC_START_FALL_F 0x00000400
Receive start on falling edge RF.
#define | SSC_START_RISE_F 0x00000500
Receive start on rising edge RF.
#define | SSC_START_LEVEL_F 0x00000600
Receive start on any RF level change.
#define | SSC_START_EDGE_F 0x00000700
Receive start on any RF edge.
#define | SSC_START_COMP0 0x00000800
Receive on compare 0.
#define | SSC_STOP 12
Receive stop selection.
#define | SSC_STTDLY_MASK 0x00FF0000
Receive start delay.
#define | SSC_STTDLY_SHIFT 16
Least significant bit of receive start delay.
#define | SSC_PERIOD_MASK 0xFF000000
Receive period divider selection.
#define | SSC_PERIOD_SHIFT 24
Least significant bit of receive period divider selection.
#define | SSC_RFMR_OFF 0x00000014
SSC Receive/Transmit Frame Mode Registers.
#define | SSC_TFMR_OFF 0x0000001C
Transmit frame mode register offset.
#define | SSC_DATLEN_MASK 0x0000001F
Data length.
#define | SSC_LOOP 5
Receiver loop mode.
#define | SSC_DATDEF 5
Transmit default value.
#define | SSC_MSBF 7
Most significant bit first.
#define | SSC_DATNB_MASK 0x00000F00
Data number per frame.
#define | SSC_DATNB_SHIFT 8
Least significant bit of data number per frame.
#define | SSC_FSLEN_MASK 0x000F0000
Receive frame sync. length.
#define | SSC_FSLEN_SHIFT 16
Least significant bit of receive frame sync. length.
#define | SSC_FSOS 0x00700000
Receive frame sync. output selection.
#define | SSC_FSOS_NONE 0x00000000
No frame sync. Line set to input.
#define | SSC_FSOS_NEGATIVE 0x00100000
Negative pulse.
#define | SSC_FSOS_POSITIVE 0x00200000
Positive pulse.
#define | SSC_FSOS_LOW 0x00300000
Low during transfer.
#define | SSC_FSOS_HIGH 0x00400000
High during transfer.
#define | SSC_FSOS_TOGGLE 0x00500000
Toggling at each start.
#define | SSC_FSDEN 23
Frame sync. data enable.
#define | SSC_FSEDGE 24
Frame sync. edge detection.
#define | SSC_RHR_OFF 0x00000020
SSC Receive Holding Register.
#define | SSC_THR_OFF 0x00000024
SSC Transmit Holding Register.
#define | SSC_RSHR_OFF 0x00000030
SSC Receive Sync.
#define | SSC_TSHR_OFF 0x00000034
SSC Transmit Sync.
#define | SSC_RC0R_OFF 0x00000038
SSC Receive Compare 0 Register.
#define | SSC_RC1R_OFF 0x0000003C
SSC Receive Compare 1 Register.
#define | SSC_SR_OFF 0x00000040
SSC Status and Interrupt Register.
#define | SSC_IER_OFF 0x00000044
Interrupt enable register offset.
#define | SSC_IDR_OFF 0x00000048
Interrupt disable register offset.
#define | SSC_IMR_OFF 0x0000004C
Interrupt mask register offset.
#define | SSC_TXRDY 0
Transmit ready.
#define | SSC_TXEMPTY 1
Transmit empty.
#define | SSC_ENDTX 2
End of transmission.
#define | SSC_TXBUFE 3
Transmit buffer empty.
#define | SSC_RXRDY 4
Receive ready.
#define | SSC_OVRUN 5
Receive overrun.
#define | SSC_ENDRX 6
End of receiption.
#define | SSC_RXBUFF 7
Receive buffer full.
#define | SSC_CP0 8
Compare 0.
#define | SSC_CP1 9
Compare 1.
#define | SSC_TXSYN 10
Transmit sync.
#define | SSC_RXSYN 11
Receive sync.
#define | SSC_TXENA 16
Transmit enable.
#define | SSC_RXENA 17
Receive enable.

Detailed Description

Author:
Luca Ottaviano <lottaviano@develer.com>

AT91SAM7 SSC register definitions. This file is based on NUT/OS implementation. See license below.

Definition in file at91_ssc.h.

Define Documentation

#define SSC_CMR_OFF 0x00000004

SSC Clock Mode Register.

Clock mode register offset.

Definition at line 94 of file at91_ssc.h.

#define SSC_CR_OFF 0x00000000

SSC Control Register.

Control register offset.

Definition at line 81 of file at91_ssc.h.

#define SSC_RC0R_OFF 0x00000038

SSC Receive Compare 0 Register.

Receive compare 0 register offset.

Definition at line 196 of file at91_ssc.h.

#define SSC_RC1R_OFF 0x0000003C

SSC Receive Compare 1 Register.

Receive compare 1 register offset.

Definition at line 203 of file at91_ssc.h.

#define SSC_RCMR_OFF 0x00000010

SSC Receive/Transmit Clock Mode Register.

Receive clock mode register offset.

Definition at line 103 of file at91_ssc.h.

#define SSC_RFMR_OFF 0x00000014

SSC Receive/Transmit Frame Mode Registers.

Receive frame mode register offset.

Definition at line 141 of file at91_ssc.h.

#define SSC_RHR_OFF 0x00000020

SSC Receive Holding Register.

Receive holding register offset.

Definition at line 168 of file at91_ssc.h.

#define SSC_RSHR_OFF 0x00000030

SSC Receive Sync.

Holding Register Receive sync. holding register offset.

Definition at line 182 of file at91_ssc.h.

#define SSC_SR_OFF 0x00000040

SSC Status and Interrupt Register.

Status register offset.

Definition at line 210 of file at91_ssc.h.

#define SSC_THR_OFF 0x00000024

SSC Transmit Holding Register.

Transmit holding register offset.

Definition at line 175 of file at91_ssc.h.

#define SSC_TSHR_OFF 0x00000034

SSC Transmit Sync.

Holding Register Transmit sync. holding register offset.

Definition at line 189 of file at91_ssc.h.


BeRTOS: at91_ssc.h Source File

  • cpu
  • arm
  • io
at91_ssc.h
Go to the documentation of this file.
00001
00040 /*
00041  * Copyright (C) 2006-2007 by egnite Software GmbH. All rights reserved.
00042  *
00043  * Redistribution and use in source and binary forms, with or without
00044  * modification, are permitted provided that the following conditions
00045  * are met:
00046  *
00047  * 1. Redistributions of source code must retain the above copyright
00048  *    notice, this list of conditions and the following disclaimer.
00049  * 2. Redistributions in binary form must reproduce the above copyright
00050  *    notice, this list of conditions and the following disclaimer in the
00051  *    documentation and/or other materials provided with the distribution.
00052  * 3. Neither the name of the copyright holders nor the names of
00053  *    contributors may be used to endorse or promote products derived
00054  *    from this software without specific prior written permission.
00055  *
00056  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00057  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00058  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00059  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00060  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00062  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00063  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00064  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00065  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00066  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00067  * SUCH DAMAGE.
00068  *
00069  * For additional information see http://www.ethernut.de/
00070  */
00071
00072 #ifndef AT91_SSC_H
00073 #define AT91_SSC_H
00074
00075 #include <io/at91sam7.h>
00076
00080 /*\{*/
00081 #define SSC_CR_OFF                  0x00000000  ///< Control register offset.
00082
00083 #define SSC_RXEN                     0  ///< Receive enable.
00084 #define SSC_RXDIS                    1  ///< Receive disable.
00085 #define SSC_TXEN                     8  ///< Transmit enable.
00086 #define SSC_TXDIS                    9  ///< Transmit disable.
00087 #define SSC_SWRST                   15  ///< Software reset.
00088 /*\}*/
00089
00093 /*\{*/
00094 #define SSC_CMR_OFF                 0x00000004  ///< Clock mode register offset.
00095
00096 #define SSC_DIV_MASK                0x00000FFF  ///< Clock divider.
00097 /*\}*/
00098
00102 /*\{*/
00103 #define SSC_RCMR_OFF                0x00000010  ///< Receive clock mode register offset.
00104 #define SSC_TCMR_OFF                0x00000018  ///< Transmit clock mode register offset.
00105
00106 #define SSC_CKS_MASK                0x00000003  ///< Receive clock selection.
00107 #define SSC_CKS_DIV                 0x00000000  ///< Divided clock.
00108 #define SSC_CKS_CLK                 0x00000001  ///< RK/TK clock signal.
00109 #define SSC_CKS_PIN                 0x00000002  ///< TK/RK pin.
00110 #define SSC_CKO_MASK                0x0000001C  ///< Receive clock output mode selection.
00111 #define SSC_CKO_NONE                0x00000000  ///< None.
00112 #define SSC_CKO_CONT                0x00000004  ///< Continous receive clock.
00113 #define SSC_CKO_TRAN                0x00000008  ///< Receive clock only during data transfers.
00114 #define SSC_CKI                              5  ///< Receive clock inversion.
00115 #define SSC_CKG_MASK                0x000000C0  ///< Receive clock gating selection.
00116 #define SSC_CKG_NONE                0x00000000  ///< None, continous clock.
00117 #define SSC_CKG_FL                  0x00000040  ///< Continous receive clock.
00118 #define SSC_CKG_FH                  0x00000080  ///< Receive clock only during data transfers.
00119 #define SSC_START_MASK              0x00000F00  ///< Receive start selection.
00120 #define SSC_START_CONT              0x00000000  ///< Receive start as soon as enabled.
00121 #define SSC_START_TX                0x00000100  ///< Receive start on transmit start.
00122 #define SSC_START_RX                0x00000100  ///< Receive start on receive start.
00123 #define SSC_START_LOW_F             0x00000200  ///< Receive start on low level RF.
00124 #define SSC_START_HIGH_F            0x00000300  ///< Receive start on high level RF.
00125 #define SSC_START_FALL_F            0x00000400  ///< Receive start on falling edge RF.
00126 #define SSC_START_RISE_F            0x00000500  ///< Receive start on rising edge RF.
00127 #define SSC_START_LEVEL_F           0x00000600  ///< Receive start on any RF level change.
00128 #define SSC_START_EDGE_F            0x00000700  ///< Receive start on any RF edge.
00129 #define SSC_START_COMP0             0x00000800  ///< Receive on compare 0.
00130 #define SSC_STOP                            12  ///< Receive stop selection.
00131 #define SSC_STTDLY_MASK             0x00FF0000  ///< Receive start delay.
00132 #define SSC_STTDLY_SHIFT                    16  ///< Least significant bit of receive start delay.
00133 #define SSC_PERIOD_MASK             0xFF000000  ///< Receive period divider selection.
00134 #define SSC_PERIOD_SHIFT                    24  ///< Least significant bit of receive period divider selection.
00135 /*\}*/
00136
00140 /*\{*/
00141 #define SSC_RFMR_OFF                0x00000014  ///< Receive frame mode register offset.
00142 #define SSC_TFMR_OFF                0x0000001C  ///< Transmit frame mode register offset.
00143
00144 #define SSC_DATLEN_MASK             0x0000001F  ///< Data length.
00145 #define SSC_LOOP                             5  ///< Receiver loop mode.
00146 #define SSC_DATDEF                           5  ///< Transmit default value.
00147
00148 #define SSC_MSBF                             7  ///< Most significant bit first.
00149 #define SSC_DATNB_MASK              0x00000F00  ///< Data number per frame.
00150 #define SSC_DATNB_SHIFT                      8  ///< Least significant bit of data number per frame.
00151 #define SSC_FSLEN_MASK              0x000F0000  ///< Receive frame sync. length.
00152 #define SSC_FSLEN_SHIFT                     16  ///< Least significant bit of receive frame sync. length.
00153 #define SSC_FSOS                    0x00700000  ///< Receive frame sync. output selection.
00154 #define SSC_FSOS_NONE               0x00000000  ///< No frame sync. Line set to input.
00155 #define SSC_FSOS_NEGATIVE           0x00100000  ///< Negative pulse.
00156 #define SSC_FSOS_POSITIVE           0x00200000  ///< Positive pulse.
00157 #define SSC_FSOS_LOW                0x00300000  ///< Low during transfer.
00158 #define SSC_FSOS_HIGH               0x00400000  ///< High during transfer.
00159 #define SSC_FSOS_TOGGLE             0x00500000  ///< Toggling at each start.
00160 #define SSC_FSDEN                           23  ///< Frame sync. data enable.
00161 #define SSC_FSEDGE                          24  ///< Frame sync. edge detection.
00162 /*\}*/
00163
00167 /*\{*/
00168 #define SSC_RHR_OFF                 0x00000020  ///< Receive holding register offset.
00169 /*\}*/
00170
00174 /*\{*/
00175 #define SSC_THR_OFF                 0x00000024  ///< Transmit holding register offset.
00176 /*\}*/
00177
00181 /*\{*/
00182 #define SSC_RSHR_OFF                0x00000030  ///< Receive sync. holding register offset.
00183 /*\}*/
00184
00188 /*\{*/
00189 #define SSC_TSHR_OFF                0x00000034  ///< Transmit sync. holding register offset.
00190 /*\}*/
00191
00195 /*\{*/
00196 #define SSC_RC0R_OFF                0x00000038  ///< Receive compare 0 register offset.
00197 /*\}*/
00198
00202 /*\{*/
00203 #define SSC_RC1R_OFF                0x0000003C  ///< Receive compare 1 register offset.
00204 /*\}*/
00205
00209 /*\{*/
00210 #define SSC_SR_OFF                  0x00000040  ///< Status register offset.
00211 #define SSC_IER_OFF                 0x00000044  ///< Interrupt enable register offset.
00212 #define SSC_IDR_OFF                 0x00000048  ///< Interrupt disable register offset.
00213 #define SSC_IMR_OFF                 0x0000004C  ///< Interrupt mask register offset.
00214
00215 #define SSC_TXRDY                            0  ///< Transmit ready.
00216 #define SSC_TXEMPTY                          1  ///< Transmit empty.
00217 #define SSC_ENDTX                            2  ///< End of transmission.
00218 #define SSC_TXBUFE                           3  ///< Transmit buffer empty.
00219 #define SSC_RXRDY                            4  ///< Receive ready.
00220 #define SSC_OVRUN                            5  ///< Receive overrun.
00221 #define SSC_ENDRX                            6  ///< End of receiption.
00222 #define SSC_RXBUFF                           7  ///< Receive buffer full.
00223 #define SSC_CP0                              8  ///< Compare 0.
00224 #define SSC_CP1                              9  ///< Compare 1.
00225 #define SSC_TXSYN                           10  ///< Transmit sync.
00226 #define SSC_RXSYN                           11  ///< Receive sync.
00227 #define SSC_TXENA                           16  ///< Transmit enable.
00228 #define SSC_RXENA                           17  ///< Receive enable.
00229
00230
00231 #if defined(SSC_BASE)
00232     #define SSC_CR      (*((reg32_t *)(SSC_BASE + SSC_CR_OFF)))     ///< Control register address.
00233     #define SSC_CMR     (*((reg32_t *)(SSC_BASE + SSC_CMR_OFF)))    ///< Clock mode register address.
00234     #define SSC_RCMR    (*((reg32_t *)(SSC_BASE + SSC_RCMR_OFF)))   ///< Receive clock mode register address.
00235     #define SSC_TCMR    (*((reg32_t *)(SSC_BASE + SSC_TCMR_OFF)))   ///< Transmit clock mode register address.
00236     #define SSC_RFMR    (*((reg32_t *)(SSC_BASE + SSC_RFMR_OFF)))   ///< Receive frame mode register address.
00237     #define SSC_TFMR    (*((reg32_t *)(SSC_BASE + SSC_TFMR_OFF)))   ///< Transmit frame mode register address.
00238     #define SSC_RHR     (*((reg32_t *)(SSC_BASE + SSC_RHR_OFF)))    ///< Receive holding register address.
00239     #define SSC_THR     (*((reg32_t *)(SSC_BASE + SSC_THR_OFF)))    ///< Transmit holding register address.
00240     #define SSC_RSHR    (*((reg32_t *)(SSC_BASE + SSC_RSHR_OFF)))   ///< Receive sync. holding register address.
00241     #define SSC_TSHR    (*((reg32_t *)(SSC_BASE + SSC_TSHR_OFF)))   ///< Transmit sync. holding register address.
00242     #define SSC_RC0R    (*((reg32_t *)(SSC_BASE + SSC_RC0R_OFF)))   ///< Receive compare 0 register address.
00243     #define SSC_RC1R    (*((reg32_t *)(SSC_BASE + SSC_RC1R_OFF)))   ///< Receive compare 1 register address.
00244     #define SSC_SR      (*((reg32_t *)(SSC_BASE + SSC_SR_OFF)))     ///< Status register address.
00245     #define SSC_IER     (*((reg32_t *)(SSC_BASE + SSC_IER_OFF)))    ///< Interrupt enable register address.
00246     #define SSC_IDR     (*((reg32_t *)(SSC_BASE + SSC_IDR_OFF)))    ///< Interrupt disable register address.
00247     #define SSC_IMR     (*((reg32_t *)(SSC_BASE + SSC_IMR_OFF)))    ///< Interrupt mask register address.
00248     #if defined(SSC_HAS_PDC)
00249         #define SSC_RPR    (*((reg32_t *)(SSC_BASE + PERIPH_RPR_OFF)))  ///< PDC receive pointer register address.
00250         #define SSC_RCR    (*((reg32_t *)(SSC_BASE + PERIPH_RCR_OFF)))  ///< PDC receive counter register address.
00251         #define SSC_TPR    (*((reg32_t *)(SSC_BASE + PERIPH_TPR_OFF)))  ///< PDC transmit pointer register address.
00252         #define SSC_TCR    (*((reg32_t *)(SSC_BASE + PERIPH_TCR_OFF)))  ///< PDC transmit counter register address.
00253         #define SSC_RNPR   (*((reg32_t *)(SSC_BASE + PERIPH_RNPR_OFF))) ///< PDC receive next pointer register address.
00254         #define SSC_RNCR   (*((reg32_t *)(SSC_BASE + PERIPH_RNCR_OFF))) ///< PDC receive next counter register address.
00255         #define SSC_TNPR   (*((reg32_t *)(SSC_BASE + PERIPH_TNPR_OFF))) ///< PDC transmit next pointer register address.
00256         #define SSC_TNCR   (*((reg32_t *)(SSC_BASE + PERIPH_TNCR_OFF))) ///< PDC transmit next counter register address.
00257         #define SSC_PTCR   (*((reg32_t *)(SSC_BASE + PERIPH_PTCR_OFF))) ///< PDC transfer control register address.
00258         #define SSC_PTSR   (*((reg32_t *)(SSC_BASE + PERIPH_PTSR_OFF))) ///< PDC transfer status register address.
00259     #endif /* SSC_HAS_PDC */
00260
00261 #endif /* SSC_BASE */
00262
00263
00264 #endif /* AT91_SSC_H */


BeRTOS: at91_tc.h File Reference

  • cpu
  • arm
  • io
Defines
at91_tc.h File Reference

Go to the source code of this file.

Defines

#define | TC_TC0_OFF 0x00000000
Timer Counter Control Register.
#define | TC_TC1_OFF 0x00000040
Channel 1 control register offset.
#define | TC_TC2_OFF 0x00000080
Channel 2 control register offset.
#define | TC0_CCR (*((reg32_t *)(TC_BASE + TC_TC0_OFF)))
Channel 0 control register address.
#define | TC1_CCR (*((reg32_t *)(TC_BASE + TC_TC1_OFF)))
Channel 1 control register address.
#define | TC2_CCR (*((reg32_t *)(TC_BASE + TC_TC2_OFF)))
Channel 2 control register address.
#define | TC_CLKEN 0
Clock enable command.
#define | TC_CLKDIS 1
Clock disable command.
#define | TC_SWTRG 2
Software trigger command.
#define | TC_CMR_OFF 0x00000004
Timer Counter Channel Mode Register.
#define | TC0_CMR (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_CMR_OFF)))
Channel 0 mode register address.
#define | TC1_CMR (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_CMR_OFF)))
Channel 1 mode register address.
#define | TC2_CMR (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_CMR_OFF)))
Channel 2 mode register address.
#define | TC_CLKS_MASK 0x00000007
Clock selection mask.
#define | TC_CLKS_MCK2 0x00000000
Selects MCK / 2.
#define | TC_CLKS_MCK8 0x00000001
Selects MCK / 8.
#define | TC_CLKS_MCK32 0x00000002
Selects MCK / 32.
#define | TC_CLKS_MCK128 0x00000003
Selects MCK / 128.
#define | TC_CLKS_MCK1024 0x00000004
Selects MCK / 1024.
#define | TC_CLKS_XC0 0x00000005
Selects external clock 0.
#define | TC_CLKS_XC1 0x00000006
Selects external clock 1.
#define | TC_CLKS_XC2 0x00000007
Selects external clock 2.
#define | TC_CLKI 3
Increments on falling edge.
#define | TC_BURST_MASK 0x00000030
Burst signal selection mask.
#define | TC_BURST_NONE 0x00000000
Clock is not gated by an external signal.
#define | TC_BUSRT_XC0 0x00000010
ANDed with external clock 0.
#define | TC_BURST_XC1 0x00000020
ANDed with external clock 1.
#define | TC_BURST_XC2 0x00000030
ANDed with external clock 2.
#define | TC_WAVE 15
Selects waveform mode.
#define | TC_CPCTRG 14
Capture Mode.
#define | TC_LDBSTOP 6
Counter clock stopped on RB loading.
#define | TC_LDBDIS 7
Counter clock disabled on RB loading.
#define | TC_ETRGEDG_MASK 0x00000300
External trigger edge selection mask.
#define | TC_ETRGEDG_RISING_EDGE 0x00000100
Trigger on external rising edge.
#define | TC_ETRGEDG_FALLING_EDGE 0x00000200
Trigger on external falling edge.
#define | TC_ETRGEDG_BOTH_EDGE 0x00000300
Trigger on both external edges.
#define | TC_ABETRG_MASK 0x00000400
TIOA or TIOB external trigger selection mask.
#define | TC_ABETRG_TIOA 10
TIOA used as an external trigger.
#define | TC_LDRA_MASK 0x00030000
RA loading selection mask.
#define | TC_LDRA_RISING_EDGE 0x00010000
Load RA on rising edge of TIOA.
#define | TC_LDRA_FALLING_EDGE 0x00020000
Load RA on falling edge of TIOA.
#define | TC_LDRA_BOTH_EDGE 0x00030000
Load RA on any edge of TIOA.
#define | TC_LDRB_MASK 0x000C0000
RB loading selection mask.
#define | TC_LDRB_RISING_EDGE 0x00040000
Load RB on rising edge of TIOA.
#define | TC_LDRB_FALLING_EDGE 0x00080000
Load RB on falling edge of TIOA.
#define | TC_LDRB_BOTH_EDGE 0x000C0000
Load RB on any edge of TIOA.
#define | TC_CPCSTOP 6
Waveform Mode.
#define | TC_CPCDIS 7
Counter clock disabled on RC compare.
#define | TC_EEVTEDG_MASK 0x00000300
External event edge selection mask.
#define | TC_EEVTEDG_RISING_EDGE 0x00000100
External event on rising edge..
#define | TC_EEVTEDG_FALLING_EDGE 0x00000200
External event on falling edge..
#define | TC_EEVTEDG_BOTH_EDGE 0x00000300
External event on any edge..
#define | TC_EEVT_MASK 0x00000C00
External event selection mask.
#define | TC_EEVT_TIOB 0x00000000
TIOB selected as external event.
#define | TC_EEVT_XC0 0x00000400
XC0 selected as external event.
#define | TC_EEVT_XC1 0x00000800
XC1 selected as external event.
#define | TC_EEVT_XC2 0x00000C00
XC2 selected as external event.
#define | TC_ENETRG 12
External event trigger enable.
#define | TC_WAVSEL_MASK 0x00006000
Waveform selection mask.
#define | TC_WAVSEL_UP 0x00000000
UP mode whitout automatic trigger on RC compare.
#define | TC_WAVSEL_UP_RC_TRG 0x00004000
UP mode whit automatic trigger on RC compare.
#define | TC_WAVSEL_UPDOWN 0x00002000
UPDOWN mode whitout automatic trigger on RC compare.
#define | TC_WAVSEL_UPDOWN_RC_TRG 0x00003000
UPDOWN mode whit automatic trigger on RC compare.
#define | TC_ACPA_MASK 0x00030000
Masks RA compare effect on TIOA.
#define | TC_ACPA_SET_OUTPUT 0x00010000
RA compare sets TIOA.
#define | TC_ACPA_CLEAR_OUTPUT 0x00020000
RA compare clears TIOA.
#define | TC_ACPA_TOGGLE_OUTPUT 0x00030000
RA compare toggles TIOA.
#define | TC_ACPC_MASK 0x000C0000
Masks RC compare effect on TIOA.
#define | TC_ACPC_SET_OUTPUT 0x00040000
RC compare sets TIOA.
#define | TC_ACPC_CLEAR_OUTPUT 0x00080000
RC compare clears TIOA.
#define | TC_ACPC_TOGGLE_OUTPUT 0x000C0000
RC compare toggles TIOA.
#define | TC_AEEVT_MASK 0x00300000
Masks external event effect on TIOA.
#define | TC_AEEVT_SET_OUTPUT 0x00100000
External event sets TIOA.
#define | TC_AEEVT_CLEAR_OUTPUT 0x00200000
External event clears TIOA.
#define | TC_AEEVT_TOGGLE_OUTPUT 0x00300000
External event toggles TIOA.
#define | TC_ASWTRG_MASK 0x00C00000
Masks software trigger effect on TIOA.
#define | TC_ASWTRG_SET_OUTPUT 0x00400000
Software trigger sets TIOA.
#define | TC_ASWTRG_CLEAR_OUTPUT 0x00800000
Software trigger clears TIOA.
#define | TC_ASWTRG_TOGGLE_OUTPUT 0x00C00000
Software trigger toggles TIOA.
#define | TC_BCPB_MASK 0x03000000
Masks RB compare effect on TIOB.
#define | TC_BCPB_SET_OUTPUT 0x01000000
RB compare sets TIOB.
#define | TC_BCPB_CLEAR_OUTPUT 0x02000000
RB compare clears TIOB.
#define | TC_BCPB_TOGGLE_OUTPUT 0x03000000
RB compare toggles TIOB.
#define | TC_BCPC_MASK 0x0C000000
Masks RC compare effect on TIOB.
#define | TC_BCPC_SET_OUTPUT 0x04000000
RC compare sets TIOB.
#define | TC_BCPC_CLEAR_OUTPUT 0x08000000
RC compare clears TIOB.
#define | TC_BCPC_TOGGLE_OUTPUT 0x0C000000
RC compare toggles TIOB.
#define | TC_BEEVT_MASK 0x30000000
Masks external event effect on TIOB.
#define | TC_BEEVT_SET_OUTPUT 0x10000000
External event sets TIOB.
#define | TC_BEEVT_CLEAR_OUTPUT 0x20000000
External event clears TIOB.
#define | TC_BEEVT_TOGGLE_OUTPUT 0x30000000
External event toggles TIOB.
#define | TC_BSWTRG_MASK 0xC0000000
Masks software trigger effect on TIOB.
#define | TC_BSWTRG_SET_OUTPUT 0x40000000
Software trigger sets TIOB.
#define | TC_BSWTRG_CLEAR_OUTPUT 0x80000000
Software trigger clears TIOB.
#define | TC_BSWTRG_TOGGLE_OUTPUT 0xC0000000
Software trigger toggles TIOB.
#define | TC_CV_OFF 0x00000010
Counter Value Register.
#define | TC0_CV (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_CV_OFF)))
Counter 0 value.
#define | TC1_CV (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_CV_OFF)))
Counter 1 value.
#define | TC2_CV (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_CV_OFF)))
Counter 2 value.
#define | TC_RA_OFF 0x00000014
Timer Counter Register A.
#define | TC0_RA (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_RA_OFF)))
Channel 0 register A.
#define | TC1_RA (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_RA_OFF)))
Channel 1 register A.
#define | TC2_RA (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_RA_OFF)))
Channel 2 register A.
#define | TC_RB_OFF 0x00000018
Timer Counter Register B.
#define | TC0_RB (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_RB_OFF)))
Channel 0 register B.
#define | TC1_RB (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_RB_OFF)))
Channel 1 register B.
#define | TC2_RB (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_RB_OFF)))
Channel 2 register B.
#define | TC_RC_OFF 0x0000001C
Timer Counter Register C.
#define | TC0_RC (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_RC_OFF)))
Channel 0 register C.
#define | TC1_RC (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_RC_OFF)))
Channel 1 register C.
#define | TC2_RC (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_RC_OFF)))
Channel 2 register C.
#define | TC_SR_OFF 0x00000020
Timer Counter Status and Interrupt Registers.
#define | TC0_SR (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_SR_OFF)))
Status register address.
#define | TC1_SR (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_SR_OFF)))
Status register address.
#define | TC2_SR (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_SR_OFF)))
Status register address.
#define | TC_IER_OFF 0x00000024
Interrupt Enable Register offset.
#define | TC0_IER (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_IER_OFF)))
Channel 0 interrupt enable register address.
#define | TC1_IER (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_IER_OFF)))
Channel 1 interrupt enable register address.
#define | TC2_IER (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_IER_OFF)))
Channel 2 interrupt enable register address.
#define | TC_IDR_OFF 0x00000028
Interrupt Disable Register offset.
#define | TC0_IDR (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_IDR_OFF)))
Channel 0 interrupt disable register address.
#define | TC1_IDR (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_IDR_OFF)))
Channel 1 interrupt disable register address.
#define | TC2_IDR (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_IDR_OFF)))
Channel 2 interrupt disable register address.
#define | TC_IMR_OFF 0x0000002C
Interrupt Mask Register offset.
#define | TC0_IMR (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_IMR_OFF)))
Channel 0 interrupt mask register address.
#define | TC1_IMR (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_IMR_OFF)))
Channel 1 interrupt mask register address.
#define | TC2_IMR (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_IMR_OFF)))
Channel 2 interrupt mask register address.
#define | TC_COVFS 0
Counter overflow flag.
#define | TC_LOVRS 1
Load overrun flag.
#define | TC_CPAS 2
RA compare flag.
#define | TC_CPBS 3
RB compare flag.
#define | TC_CPCS 4
RC compare flag.
#define | TC_LDRAS 5
RA loading flag.
#define | TC_LDRBS 6
RB loading flag.
#define | TC_ETRGS 7
External trigger flag.
#define | TC_CLKSTA 16
Clock enable flag.
#define | TC_MTIOA 17
TIOA flag.
#define | TC_MTIOB 18
TIOB flag.
#define | TC_BCR_OFF 0x000000C0
Timer Counter Block Control Register.
#define | TC_BCR (*((reg32_t *)(TC_BASE + TC_BCR_OFF)))
Block control register address.
#define | TC_SYNC 0
Synchronisation trigger.
#define | TC_BMR_OFF 0x000000C4
Timer Counter Block Mode Register.
#define | TC_BMR (*((reg32_t *)(TC_BASE + TC_BMR_OFF)))
Block mode register address.
#define | TC_TC0XC0S 0x00000003
External clock signal 0 selection mask.
#define | TC_TCLK0XC0 0x00000000
Selects TCLK0.
#define | TC_NONEXC0 0x00000001
None selected.
#define | TC_TIOA1XC0 0x00000002
Selects TIOA1.
#define | TC_TIOA2XC0 0x00000003
Selects TIOA2.
#define | TC_TC1XC1S 0x0000000C
External clock signal 1 selection mask.
#define | TC_TCLK1XC1 0x00000000
Selects TCLK1.
#define | TC_NONEXC1 0x00000004
None selected.
#define | TC_TIOA0XC1 0x00000008
Selects TIOA0.
#define | TC_TIOA2XC1 0x0000000C
Selects TIOA2.
#define | TC_TC2XC2S 0x00000030
External clock signal 2 selection mask.
#define | TC_TCLK2XC2 0x00000000
Selects TCLK2.
#define | TC_NONEXC2 0x00000010
None selected.
#define | TC_TIOA0XC2 0x00000020
Selects TIOA0.
#define | TC_TIOA1XC2 0x00000030
Selects TIOA1.

Detailed Description

Author:
Daniele Basile <asterix@develer.com>

AT91SAM7 Conunter timer definition. This file is based on NUT/OS implementation. See license below.

Definition in file at91_tc.h.

Define Documentation

#define TC_BCR_OFF 0x000000C0

Timer Counter Block Control Register.

Block control register offset.

Definition at line 291 of file at91_tc.h.

#define TC_BMR_OFF 0x000000C4

Timer Counter Block Mode Register.

Block mode register offset.

Definition at line 299 of file at91_tc.h.

#define TC_CMR_OFF 0x00000004

Timer Counter Channel Mode Register.

Mode register offset.

Definition at line 92 of file at91_tc.h.

#define TC_CPCSTOP 6

Waveform Mode.

Counter clock stopped on RC compare.

Definition at line 153 of file at91_tc.h.

#define TC_CPCTRG 14

Capture Mode.

RC Compare Enable Trigger Enable.

Definition at line 124 of file at91_tc.h.

#define TC_CV_OFF 0x00000010

Counter Value Register.

Counter register value offset.

Definition at line 219 of file at91_tc.h.

#define TC_RA_OFF 0x00000014

Timer Counter Register A.

Register A offset.

Definition at line 227 of file at91_tc.h.

#define TC_RB_OFF 0x00000018

Timer Counter Register B.

Register B offset.

Definition at line 236 of file at91_tc.h.

#define TC_RC_OFF 0x0000001C

Timer Counter Register C.

Register C offset.

Definition at line 245 of file at91_tc.h.

#define TC_SR_OFF 0x00000020

Timer Counter Status and Interrupt Registers.

Status Register offset.

Definition at line 255 of file at91_tc.h.

#define TC_TC0_OFF 0x00000000

Timer Counter Control Register.

Channel 0 control register offset.

Definition at line 79 of file at91_tc.h.


BeRTOS: at91_tc.h Source File

  • cpu
  • arm
  • io
at91_tc.h
Go to the documentation of this file.
00001
00040 /*
00041  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00042  *
00043  * Redistribution and use in source and binary forms, with or without
00044  * modification, are permitted provided that the following conditions
00045  * are met:
00046  *
00047  * 1. Redistributions of source code must retain the above copyright
00048  *    notice, this list of conditions and the following disclaimer.
00049  * 2. Redistributions in binary form must reproduce the above copyright
00050  *    notice, this list of conditions and the following disclaimer in the
00051  *    documentation and/or other materials provided with the distribution.
00052  * 3. Neither the name of the copyright holders nor the names of
00053  *    contributors may be used to endorse or promote products derived
00054  *    from this software without specific prior written permission.
00055  *
00056  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00057  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00058  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00059  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00060  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00062  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00063  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00064  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00065  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00066  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00067  * SUCH DAMAGE.
00068  *
00069  * For additional information see http://www.ethernut.de/
00070  */
00071
00072 #ifndef AT91_TC_H
00073 #define AT91_TC_H
00074
00075
00079 #define TC_TC0_OFF              0x00000000     ///< Channel 0 control register offset.
00080 #define TC_TC1_OFF              0x00000040     ///< Channel 1 control register offset.
00081 #define TC_TC2_OFF              0x00000080     ///< Channel 2 control register offset.
00082 #define TC0_CCR         (*((reg32_t *)(TC_BASE + TC_TC0_OFF))) ///< Channel 0 control register address.
00083 #define TC1_CCR         (*((reg32_t *)(TC_BASE + TC_TC1_OFF))) ///< Channel 1 control register address.
00084 #define TC2_CCR         (*((reg32_t *)(TC_BASE + TC_TC2_OFF))) ///< Channel 2 control register address.
00085 #define TC_CLKEN                         0      ///< Clock enable command.
00086 #define TC_CLKDIS                        1      ///< Clock disable command.
00087 #define TC_SWTRG                         2      ///< Software trigger command.
00088
00092 #define TC_CMR_OFF              0x00000004      ///< Mode register offset.
00093 #define TC0_CMR         (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_CMR_OFF))) ///< Channel 0 mode register address.
00094 #define TC1_CMR         (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_CMR_OFF))) ///< Channel 1 mode register address.
00095 #define TC2_CMR         (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_CMR_OFF))) ///< Channel 2 mode register address.
00096
00097 #define TC_CLKS_MASK            0x00000007      ///< Clock selection mask.
00098 #define TC_CLKS_MCK2            0x00000000      ///< Selects MCK / 2.
00099 #define TC_CLKS_MCK8            0x00000001      ///< Selects MCK / 8.
00100 #define TC_CLKS_MCK32           0x00000002      ///< Selects MCK / 32.
00101 #define TC_CLKS_MCK128          0x00000003      ///< Selects MCK / 128.
00102 #define TC_CLKS_MCK1024         0x00000004      ///< Selects MCK / 1024.
00103 #define TC_CLKS_XC0             0x00000005      ///< Selects external clock 0.
00104 #define TC_CLKS_XC1             0x00000006      ///< Selects external clock 1.
00105 #define TC_CLKS_XC2             0x00000007      ///< Selects external clock 2.
00106
00107 #define TC_CLKI                          3      ///< Increments on falling edge.
00108
00109 #define TC_BURST_MASK           0x00000030      ///< Burst signal selection mask.
00110 #define TC_BURST_NONE           0x00000000      ///< Clock is not gated by an external signal.
00111 #define TC_BUSRT_XC0            0x00000010      ///< ANDed with external clock 0.
00112 #define TC_BURST_XC1            0x00000020      ///< ANDed with external clock 1.
00113 #define TC_BURST_XC2            0x00000030      ///< ANDed with external clock 2.
00114
00115
00116
00117 #define TC_WAVE                         15      ///< Selects waveform mode.
00118 //To select capture mode you must set TC_WAVE bit to 0.
00119 //#define TC_CAPT                         15      ///< Selects capture mode.
00120
00124 #define TC_CPCTRG                       14      ///< RC Compare Enable Trigger Enable.
00125 #define TC_LDBSTOP                       6      ///< Counter clock stopped on RB loading.
00126 #define TC_LDBDIS                        7      ///< Counter clock disabled on RB loading.
00127
00128 #define TC_ETRGEDG_MASK         0x00000300      ///< External trigger edge selection mask.
00129 #define TC_ETRGEDG_RISING_EDGE  0x00000100      ///< Trigger on external rising edge.
00130 #define TC_ETRGEDG_FALLING_EDGE 0x00000200      ///< Trigger on external falling edge.
00131 #define TC_ETRGEDG_BOTH_EDGE    0x00000300      ///< Trigger on both external edges.
00132
00133 #define TC_ABETRG_MASK          0x00000400      ///< TIOA or TIOB external trigger selection mask.
00134 #define TC_ABETRG_TIOA                  10      ///< TIOA used as an external trigger.
00135 //To use external trigger TIOB you must set TC_ABETRG_TIOA bit to 0.
00136 //#define TC_ABETRG_TIOB                  10      ///< TIOB used as an external trigger.
00137
00138
00139 #define TC_LDRA_MASK            0x00030000      ///< RA loading selection mask.
00140 #define TC_LDRA_RISING_EDGE     0x00010000      ///< Load RA on rising edge of TIOA.
00141 #define TC_LDRA_FALLING_EDGE    0x00020000      ///< Load RA on falling edge of TIOA.
00142 #define TC_LDRA_BOTH_EDGE       0x00030000      ///< Load RA on any edge of TIOA.
00143
00144 #define TC_LDRB_MASK            0x000C0000      ///< RB loading selection mask.
00145 #define TC_LDRB_RISING_EDGE     0x00040000      ///< Load RB on rising edge of TIOA.
00146 #define TC_LDRB_FALLING_EDGE    0x00080000      ///< Load RB on falling edge of TIOA.
00147 #define TC_LDRB_BOTH_EDGE       0x000C0000      ///< Load RB on any edge of TIOA.
00148
00149
00153 #define TC_CPCSTOP                       6      ///< Counter clock stopped on RC compare.
00154 #define TC_CPCDIS                        7      ///< Counter clock disabled on RC compare.
00155
00156 #define TC_EEVTEDG_MASK         0x00000300      ///< External event edge selection mask.
00157 #define TC_EEVTEDG_RISING_EDGE  0x00000100      ///< External event on rising edge..
00158 #define TC_EEVTEDG_FALLING_EDGE 0x00000200      ///< External event on falling edge..
00159 #define TC_EEVTEDG_BOTH_EDGE    0x00000300      ///< External event on any edge..
00160
00161 #define TC_EEVT_MASK            0x00000C00      ///< External event selection mask.
00162 #define TC_EEVT_TIOB            0x00000000      ///< TIOB selected as external event.
00163 #define TC_EEVT_XC0             0x00000400      ///< XC0 selected as external event.
00164 #define TC_EEVT_XC1             0x00000800      ///< XC1 selected as external event.
00165 #define TC_EEVT_XC2             0x00000C00      ///< XC2 selected as external event.
00166
00167 #define TC_ENETRG                       12      ///< External event trigger enable.
00168
00169 #define TC_WAVSEL_MASK          0x00006000      ///< Waveform selection mask.
00170 #define TC_WAVSEL_UP            0x00000000      ///< UP mode whitout automatic trigger on RC compare.
00171 #define TC_WAVSEL_UP_RC_TRG     0x00004000      ///< UP mode whit automatic trigger on RC compare.
00172 #define TC_WAVSEL_UPDOWN        0x00002000      ///< UPDOWN mode whitout automatic trigger on RC compare.
00173 #define TC_WAVSEL_UPDOWN_RC_TRG 0x00003000      ///< UPDOWN mode whit automatic trigger on RC compare.
00174
00175
00176 #define TC_ACPA_MASK            0x00030000      ///< Masks RA compare effect on TIOA.
00177 #define TC_ACPA_SET_OUTPUT      0x00010000      ///< RA compare sets TIOA.
00178 #define TC_ACPA_CLEAR_OUTPUT    0x00020000      ///< RA compare clears TIOA.
00179 #define TC_ACPA_TOGGLE_OUTPUT   0x00030000      ///< RA compare toggles TIOA.
00180
00181 #define TC_ACPC_MASK            0x000C0000      ///< Masks RC compare effect on TIOA.
00182 #define TC_ACPC_SET_OUTPUT      0x00040000      ///< RC compare sets TIOA.
00183 #define TC_ACPC_CLEAR_OUTPUT    0x00080000      ///< RC compare clears TIOA.
00184 #define TC_ACPC_TOGGLE_OUTPUT   0x000C0000      ///< RC compare toggles TIOA.
00185
00186 #define TC_AEEVT_MASK           0x00300000      ///< Masks external event effect on TIOA.
00187 #define TC_AEEVT_SET_OUTPUT     0x00100000      ///< External event sets TIOA.
00188 #define TC_AEEVT_CLEAR_OUTPUT   0x00200000      ///< External event clears TIOA.
00189 #define TC_AEEVT_TOGGLE_OUTPUT  0x00300000      ///< External event toggles TIOA.
00190
00191 #define TC_ASWTRG_MASK          0x00C00000      ///< Masks software trigger effect on TIOA.
00192 #define TC_ASWTRG_SET_OUTPUT    0x00400000      ///< Software trigger sets TIOA.
00193 #define TC_ASWTRG_CLEAR_OUTPUT  0x00800000      ///< Software trigger clears TIOA.
00194 #define TC_ASWTRG_TOGGLE_OUTPUT 0x00C00000      ///< Software trigger toggles TIOA.
00195
00196 #define TC_BCPB_MASK            0x03000000      ///< Masks RB compare effect on TIOB.
00197 #define TC_BCPB_SET_OUTPUT      0x01000000      ///< RB compare sets TIOB.
00198 #define TC_BCPB_CLEAR_OUTPUT    0x02000000      ///< RB compare clears TIOB.
00199 #define TC_BCPB_TOGGLE_OUTPUT   0x03000000      ///< RB compare toggles TIOB.
00200
00201 #define TC_BCPC_MASK            0x0C000000      ///< Masks RC compare effect on TIOB.
00202 #define TC_BCPC_SET_OUTPUT      0x04000000      ///< RC compare sets TIOB.
00203 #define TC_BCPC_CLEAR_OUTPUT    0x08000000      ///< RC compare clears TIOB.
00204 #define TC_BCPC_TOGGLE_OUTPUT   0x0C000000      ///< RC compare toggles TIOB.
00205
00206 #define TC_BEEVT_MASK           0x30000000      ///< Masks external event effect on TIOB.
00207 #define TC_BEEVT_SET_OUTPUT     0x10000000      ///< External event sets TIOB.
00208 #define TC_BEEVT_CLEAR_OUTPUT   0x20000000      ///< External event clears TIOB.
00209 #define TC_BEEVT_TOGGLE_OUTPUT  0x30000000      ///< External event toggles TIOB.
00210
00211 #define TC_BSWTRG_MASK          0xC0000000      ///< Masks software trigger effect on TIOB.
00212 #define TC_BSWTRG_SET_OUTPUT    0x40000000      ///< Software trigger sets TIOB.
00213 #define TC_BSWTRG_CLEAR_OUTPUT  0x80000000      ///< Software trigger clears TIOB.
00214 #define TC_BSWTRG_TOGGLE_OUTPUT 0xC0000000      ///< Software trigger toggles TIOB.
00215
00219 #define TC_CV_OFF               0x00000010      ///< Counter register value offset.
00220 #define TC0_CV          (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_CV_OFF))) ///< Counter 0 value.
00221 #define TC1_CV          (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_CV_OFF))) ///< Counter 1 value.
00222 #define TC2_CV          (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_CV_OFF))) ///< Counter 2 value.
00223
00227 #define TC_RA_OFF               0x00000014      ///< Register A offset.
00228 #define TC0_RA          (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_RA_OFF))) ///< Channel 0 register A.
00229 #define TC1_RA          (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_RA_OFF))) ///< Channel 1 register A.
00230 #define TC2_RA          (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_RA_OFF))) ///< Channel 2 register A.
00231
00232
00236 #define TC_RB_OFF               0x00000018      ///< Register B offset.
00237 #define TC0_RB           (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_RB_OFF))) ///< Channel 0 register B.
00238 #define TC1_RB           (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_RB_OFF))) ///< Channel 1 register B.
00239 #define TC2_RB           (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_RB_OFF))) ///< Channel 2 register B.
00240
00241
00245 #define TC_RC_OFF               0x0000001C      ///< Register C offset.
00246 #define TC0_RC          (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_RC_OFF))) ///< Channel 0 register C.
00247 #define TC1_RC          (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_RC_OFF))) ///< Channel 1 register C.
00248 #define TC2_RC          (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_RC_OFF))) ///< Channel 2 register C.
00249
00250
00251
00255 #define TC_SR_OFF               0x00000020      ///< Status Register offset.
00256 #define TC0_SR          (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_SR_OFF))) ///< Status register address.
00257 #define TC1_SR          (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_SR_OFF))) ///< Status register address.
00258 #define TC2_SR          (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_SR_OFF))) ///< Status register address.
00259
00260 #define TC_IER_OFF              0x00000024      ///< Interrupt Enable Register offset.
00261 #define TC0_IER         (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_IER_OFF))) ///< Channel 0 interrupt enable register address.
00262 #define TC1_IER         (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_IER_OFF))) ///< Channel 1 interrupt enable register address.
00263 #define TC2_IER         (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_IER_OFF))) ///< Channel 2 interrupt enable register address.
00264
00265 #define TC_IDR_OFF              0x00000028      ///< Interrupt Disable Register offset.
00266 #define TC0_IDR        (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_IDR_OFF))) ///< Channel 0 interrupt disable register address.
00267 #define TC1_IDR        (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_IDR_OFF))) ///< Channel 1 interrupt disable register address.
00268 #define TC2_IDR        (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_IDR_OFF))) ///< Channel 2 interrupt disable register address.
00269
00270 #define TC_IMR_OFF              0x0000002C      ///< Interrupt Mask Register offset.
00271 #define TC0_IMR        (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_IMR_OFF))) ///< Channel 0 interrupt mask register address.
00272 #define TC1_IMR        (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_IMR_OFF))) ///< Channel 1 interrupt mask register address.
00273 #define TC2_IMR        (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_IMR_OFF))) ///< Channel 2 interrupt mask register address.
00274
00275 #define TC_COVFS                         0      ///< Counter overflow flag.
00276 #define TC_LOVRS                         1      ///< Load overrun flag.
00277 #define TC_CPAS                          2      ///< RA compare flag.
00278 #define TC_CPBS                          3      ///< RB compare flag.
00279 #define TC_CPCS                          4      ///< RC compare flag.
00280 #define TC_LDRAS                         5      ///< RA loading flag.
00281 #define TC_LDRBS                         6      ///< RB loading flag.
00282 #define TC_ETRGS                         7      ///< External trigger flag.
00283 #define TC_CLKSTA                       16      ///< Clock enable flag.
00284 #define TC_MTIOA                        17      ///< TIOA flag.
00285 #define TC_MTIOB                        18      ///< TIOB flag.
00286
00287
00291 #define TC_BCR_OFF              0x000000C0      ///< Block control register offset.
00292 #define TC_BCR         (*((reg32_t *)(TC_BASE + TC_BCR_OFF))) ///< Block control register address.
00293 #define TC_SYNC                          0      ///< Synchronisation trigger
00294
00295
00299 #define TC_BMR_OFF              0x000000C4      ///< Block mode register offset.
00300 #define TC_BMR         (*((reg32_t *)(TC_BASE + TC_BMR_OFF))) ///< Block mode register address.
00301 #define TC_TC0XC0S              0x00000003      ///< External clock signal 0 selection mask.
00302 #define TC_TCLK0XC0             0x00000000      ///< Selects TCLK0.
00303 #define TC_NONEXC0              0x00000001      ///< None selected.
00304 #define TC_TIOA1XC0             0x00000002      ///< Selects TIOA1.
00305 #define TC_TIOA2XC0             0x00000003      ///< Selects TIOA2.
00306
00307 #define TC_TC1XC1S              0x0000000C      ///< External clock signal 1 selection mask.
00308 #define TC_TCLK1XC1             0x00000000      ///< Selects TCLK1.
00309 #define TC_NONEXC1              0x00000004      ///< None selected.
00310 #define TC_TIOA0XC1             0x00000008      ///< Selects TIOA0.
00311 #define TC_TIOA2XC1             0x0000000C      ///< Selects TIOA2.
00312
00313 #define TC_TC2XC2S              0x00000030      ///< External clock signal 2 selection mask.
00314 #define TC_TCLK2XC2             0x00000000      ///< Selects TCLK2.
00315 #define TC_NONEXC2              0x00000010      ///< None selected.
00316 #define TC_TIOA0XC2             0x00000020      ///< Selects TIOA0.
00317 #define TC_TIOA1XC2             0x00000030      ///< Selects TIOA1.
00318
00319
00320 #endif /* AT91_TC_H */


BeRTOS: at91_twi.h File Reference

  • cpu
  • arm
  • io
at91_twi.h File Reference

Go to the source code of this file.

Defines

#define | TWI_CR_OFF 0x00000000
TWI Control Register.
#define | TWI_CR (*((reg32_t *)(TWI_BASE + TWI_CR_OFF)))
Control register address.
#define | TWI_START 0
Send start condition.
#define | TWI_STOP 1
Send stop condition.
#define | TWI_MSEN 2
Enable master mode.
#define | TWI_MSDIS 3
Disable master mode.
#define | TWI_SWRST 7
Software reset.
#define | TWI_MMR_OFF 0x00000004
TWI Master Mode Register.
#define | TWI_MMR (*((reg32_t *)(TWI_BASE + TWI_MMR_OFF)))
Master mode register address.
#define | TWI_IADRSZ_SHIFT 8
Internal device address size shift.
#define | TWI_IADRSZ 0x00000300
Internal device address size mask.
#define | TWI_IADRSZ_NONE 0x00000000
No internal device address.
#define | TWI_IADRSZ_1BYTE 0x00000100
One byte internal device address.
#define | TWI_IADRSZ_2BYTE 0x00000200
Two byte internal device address.
#define | TWI_IADRSZ_3BYTE 0x00000300
Three byte internal device address.
#define | TWI_MREAD 12
Master read direction.
#define | TWI_DADR 0x007F0000
Device address mask.
#define | TWI_DADR_SHIFT 16
Device address LSB.
#define | TWI_IADR_OFF 0x0000000C
TWI Internal Address Register.
#define | TWI_IADR (*((reg32_t *)(TWI_BASE + TWI_IADR_OFF)))
Internal address register address.
#define | TWI_IADR_MASK 0x00FFFFFF
Internal address mask.
#define | TWI_IADR_SHIFT 0
Internal address LSB.
#define | TWI_CWGR_OFF 0x00000010
TWI Clock Waveform Generator Register.
#define | TWI_CWGR (*((reg32_t *)(TWI_BASE + TWI_CWGR_OFF)))
Clock waveform generator register address.
#define | TWI_CLDIV 0x000000FF
Clock low divider mask.
#define | TWI_CLDIV_SHIFT 0
Clock low divider LSB.
#define | TWI_CHDIV 0x0000FF00
Clock high divider mask.
#define | TWI_CHDIV_SHIFT 8
Clock high divider LSB.
#define | TWI_CKDIV 0x00070000
Clock divider mask.
#define | TWI_CKDIV_SHIFT 16
Clock divider LSB.
#define | TWI_SR_OFF 0x00000020
TWI Status and Interrupt Registers.
#define | TWI_SR (*((reg32_t *)(TWI_BASE + TWI_SR_OFF)))
Status register address.
#define | TWI_IER_OFF 0x00000024
Interrupt enable register offset.
#define | TWI_IER (*((reg32_t *)(TWI_BASE + TWI_IER_OFF)))
Interrupt enable register address.
#define | TWI_IDR_OFF 0x00000028
Interrupt disable register offset.
#define | TWI_IDR (*((reg32_t *)(TWI_BASE + TWI_IDR_OFF)))
Interrupt disable register address.
#define | TWI_IMR_OFF 0x0000002C
Interrupt mask register offset.
#define | TWI_IMR (*((reg32_t *)(TWI_BASE + TWI_IMR_OFF)))
Interrupt mask register address.
#define | TWI_TXCOMP 0
Transmission completed.
#define | TWI_RXRDY 1
Receive holding register ready.
#define | TWI_TXRDY 2
Transmit holding register ready.
#define | TWI_NACK 8
Not acknowledged.
#define | TWI_RHR_OFF 0x00000030
TWI Receive Holding Register.
#define | TWI_RHR (*((reg32_t *)(TWI_BASE + TWI_RHR_OFF)))
Receive holding register address.
#define | TWI_THR_OFF 0x00000034
TWI Transmit Holding Register.
#define | TWI_THR (*((reg32_t *)(TWI_BASE + TWI_THR_OFF)))
Transmit holding register address.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

AT91SAM7 Two wire interface. This file is based on NUT/OS implementation. See license below.

Definition in file at91_twi.h.

Define Documentation

#define TWI_CR_OFF 0x00000000

TWI Control Register.

Control register offset.

Definition at line 80 of file at91_twi.h.

#define TWI_CWGR_OFF 0x00000010

TWI Clock Waveform Generator Register.

Clock waveform generator register offset.

Definition at line 124 of file at91_twi.h.

#define TWI_IADR_OFF 0x0000000C

TWI Internal Address Register.

Internal address register offset.

Definition at line 114 of file at91_twi.h.

#define TWI_MMR_OFF 0x00000004

TWI Master Mode Register.

Master mode register offset.

Definition at line 97 of file at91_twi.h.

#define TWI_RHR_OFF 0x00000030

TWI Receive Holding Register.

Receive holding register offset.

Definition at line 177 of file at91_twi.h.

#define TWI_SR_OFF 0x00000020

TWI Status and Interrupt Registers.

Status register offset.

Definition at line 138 of file at91_twi.h.

#define TWI_THR_OFF 0x00000034

TWI Transmit Holding Register.

Transmit holding register offset.

Definition at line 185 of file at91_twi.h.


BeRTOS: at91_twi.h Source File

  • cpu
  • arm
  • io
at91_twi.h
Go to the documentation of this file.
00001
00040 /*
00041  * Copyright (C) 2006 by egnite Software GmbH. All rights reserved.
00042  *
00043  * Redistribution and use in source and binary forms, with or without
00044  * modification, are permitted provided that the following conditions
00045  * are met:
00046  *
00047  * 1. Redistributions of source code must retain the above copyright
00048  *    notice, this list of conditions and the following disclaimer.
00049  * 2. Redistributions in binary form must reproduce the above copyright
00050  *    notice, this list of conditions and the following disclaimer in the
00051  *    documentation and/or other materials provided with the distribution.
00052  * 3. Neither the name of the copyright holders nor the names of
00053  *    contributors may be used to endorse or promote products derived
00054  *    from this software without specific prior written permission.
00055  *
00056  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00057  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00058  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00059  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00060  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00062  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00063  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00064  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00065  * OR TORT (*((reg32_t *)(INCLUDING NEGLIGENCE OR OTHERWISE))) ARISING IN ANY WAY OUT OF
00066  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00067  * SUCH DAMAGE.
00068  *
00069  * For additional information see http://www.ethernut.de/
00070  */
00071
00072 #ifndef AT91_TWI_H
00073 #define AT91_TWI_H
00074
00075
00080 #define TWI_CR_OFF              0x00000000      ///< Control register offset.
00081 #define TWI_CR      (*((reg32_t *)(TWI_BASE + TWI_CR_OFF)))     ///< Control register address.
00082 #define TWI_START                        0      ///< Send start condition.
00083 #define TWI_STOP                         1      ///< Send stop condition.
00084 #define TWI_MSEN                         2      ///< Enable master mode.
00085 #define TWI_MSDIS                        3      ///< Disable master mode.
00086 /*
00087 #define TWI_SVEN                         4      ///< Enable slave mode.
00088 #define TWI_SVDIS                        5      ///< Disable slave mode.
00089 */
00090 #define TWI_SWRST                        7      ///< Software reset.
00091 /*\}*/
00092
00097 #define TWI_MMR_OFF             0x00000004      ///< Master mode register offset.
00098 #define TWI_MMR     (*((reg32_t *)(TWI_BASE + TWI_MMR_OFF)))    ///< Master mode register address.
00099 #define TWI_IADRSZ_SHIFT                 8      ///< Internal device address size shift.
00100 #define TWI_IADRSZ              0x00000300      ///< Internal device address size mask.
00101 #define TWI_IADRSZ_NONE         0x00000000      ///< No internal device address.
00102 #define TWI_IADRSZ_1BYTE        0x00000100      ///< One byte internal device address.
00103 #define TWI_IADRSZ_2BYTE        0x00000200      ///< Two byte internal device address.
00104 #define TWI_IADRSZ_3BYTE        0x00000300      ///< Three byte internal device address.
00105 #define TWI_MREAD                       12      ///< Master read direction.
00106 #define TWI_DADR                0x007F0000      ///< Device address mask.
00107 #define TWI_DADR_SHIFT                  16      ///< Device address LSB.
00108 /*\}*/
00109
00114 #define TWI_IADR_OFF           0x0000000C       ///< Internal address register offset.
00115 #define TWI_IADR   (*((reg32_t *)(TWI_BASE + TWI_IADR_OFF)))  ///< Internal address register address.
00116 #define TWI_IADR_MASK           0x00FFFFFF      ///< Internal address mask.
00117 #define TWI_IADR_SHIFT                   0      ///< Internal address LSB.
00118 /*\}*/
00119
00124 #define TWI_CWGR_OFF             0x00000010     ///< Clock waveform generator register offset.
00125 #define TWI_CWGR    (*((reg32_t *)(TWI_BASE + TWI_CWGR_OFF)))   ///< Clock waveform generator register address.
00126 #define TWI_CLDIV                0x000000FF     ///< Clock low divider mask.
00127 #define TWI_CLDIV_SHIFT                   0     ///< Clock low divider LSB.
00128 #define TWI_CHDIV                0x0000FF00     ///< Clock high divider mask.
00129 #define TWI_CHDIV_SHIFT                   8     ///< Clock high divider LSB.
00130 #define TWI_CKDIV                0x00070000     ///< Clock divider mask.
00131 #define TWI_CKDIV_SHIFT                  16     ///< Clock divider LSB.
00132 /*\}*/
00133
00138 #define TWI_SR_OFF              0x00000020      ///< Status register offset.
00139 #define TWI_SR      (*((reg32_t *)(TWI_BASE + TWI_SR_OFF)))     ///< Status register address.
00140
00141 #define TWI_IER_OFF             0x00000024      ///< Interrupt enable register offset.
00142 #define TWI_IER     (*((reg32_t *)(TWI_BASE + TWI_IER_OFF)))    ///< Interrupt enable register address.
00143
00144 #define TWI_IDR_OFF             0x00000028      ///< Interrupt disable register offset.
00145 #define TWI_IDR     (*((reg32_t *)(TWI_BASE + TWI_IDR_OFF)))    ///< Interrupt disable register address.
00146
00147 #define TWI_IMR_OFF             0x0000002C      ///< Interrupt mask register offset.
00148 #define TWI_IMR     (*((reg32_t *)(TWI_BASE + TWI_IMR_OFF)))    ///< Interrupt mask register address.
00149
00150 #define TWI_TXCOMP                       0      ///< Transmission completed.
00151 #define TWI_RXRDY                        1      ///< Receive holding register ready.
00152 #define TWI_TXRDY                        2      ///< Transmit holding register ready.
00153
00154 /*
00155 #define TWI_SVREAD              0x00000008      ///< Slave read.
00156 #define TWI_SVACC               0x00000010      ///< Slave access.
00157 #define TWI_GACC                0x00000020      ///< General call access.
00158 */
00159
00160 #if CPU_ARM_SAM7X
00161 #define TWI_OVRE                         6      ///< Overrun error.
00162 #define TWI_UNRE                         7      ///< Underrun error.
00163 #endif
00164
00165 #define TWI_NACK                         8      ///< Not acknowledged.
00166 /*
00167 #define TWI_ARBLST              0x00000200      ///< Arbitration lost.
00168 #define TWI_SCLWS               0x00000400      ///< Clock wait state.
00169 #define TWI_EOSACC              0x00000800      ///< End of slave access.
00170 */
00171 /*\}*/
00172
00177 #define TWI_RHR_OFF             0x00000030      ///< Receive holding register offset.
00178 #define TWI_RHR     (*((reg32_t *)(TWI_BASE + TWI_RHR_OFF)))    ///< Receive holding register address.
00179 /*\}*/
00180
00185 #define TWI_THR_OFF             0x00000034      ///< Transmit holding register offset.
00186 #define TWI_THR     (*((reg32_t *)(TWI_BASE + TWI_THR_OFF)))    ///< Transmit holding register address.
00187 /*\}*/
00188
00189
00190 #endif /* AT91_TWI_H */


BeRTOS: at91_us.h File Reference

  • cpu
  • arm
  • io
at91_us.h File Reference

Go to the source code of this file.

Defines

#define | US_CR_OFF 0x00000000
USART Control Register.
#define | US0_CR (*((reg32_t *)(USART0_BASE + US_CR_OFF)))
Channel 0 control register address.
#define | US1_CR (*((reg32_t *)(USART1_BASE + US_CR_OFF)))
Channel 1 control register address.
#define | US_RSTRX 2
Reset receiver.
#define | US_RSTTX 3
Reset transmitter.
#define | US_RXEN 4
Receiver enable.
#define | US_RXDIS 5
Receiver disable.
#define | US_TXEN 6
Transmitter enable.
#define | US_TXDIS 7
Transmitter disable.
#define | US_RSTSTA 8
Reset status bits.
#define | US_STTBRK 9
Start break.
#define | US_STPBRK 10
Stop break.
#define | US_STTTO 11
Start timeout.
#define | US_SENDA 12
Send next byte with address bit set.
#define | US_RSTIT 13
Reset interations.
#define | US_RSTNAK 14
Reset non acknowledge.
#define | US_RETTO 15
Rearm time out.
#define | US_DTREN 16
Data terminal ready enable.
#define | US_DTRDIS 17
Data terminal ready disable.
#define | US_RTSEN 18
Request to send enable.
#define | US_RTSDIS 19
Request to send disable.
#define | US_MR_OFF 0x00000004
Mode Register.
#define | US0_MR (*((reg32_t *)(USART0_BASE + US_MR_OFF)))
Channel 0 mode register address.
#define | US1_MR (*((reg32_t *)(USART1_BASE + US_MR_OFF)))
Channel 1 mode register address.
#define | US_USART_MODE_MASK 0x0000000F
USART mode mask.
#define | US_USART_MODE_NORMA 0x00000000
Normal.
#define | US_USART_MODE_RS485 0x00000001
RS485.
#define | US_USART_MODE_HW_HDSH 0x00000002
Hardware handshaking.
#define | US_USART_MODE_MODEM 0x00000003
Modem.
#define | US_USART_MODE_ISO7816T0 0x00000004
ISO7816 protocol: T=0.
#define | US_USART_MODE_ISO7816T1 0x00000006
ISO7816 protocol: T=1.
#define | US_USART_MODE_IRDA 0x00000008
IrDA.
#define | US_CLKS_MASK 0x00000030
Clock selection mask.
#define | US_CLKS_MCK 0x00000000
Master clock.
#define | US_CLKS_MCK8 0x00000010
Master clock divided by 8.
#define | US_CLKS_SCK 0x00000020
External clock.
#define | US_CLKS_SLCK 0x00000030
Slow clock.
#define | US_CHRL_MASK 0x000000C0
Masks data length.
#define | US_CHRL_5 0x00000000
5 data bits.
#define | US_CHRL_6 0x00000040
6 data bits.
#define | US_CHRL_7 0x00000080
7 data bits.
#define | US_CHRL_8 0x000000C0
8 data bits.
#define | US_SYNC 8
Synchronous mode enable.
#define | US_PAR_MASK 0x00000E00
Parity mode mask.
#define | US_PAR_EVEN 0x00000000
Even parity.
#define | US_PAR_ODD 0x00000200
Odd parity.
#define | US_PAR_SPACE 0x00000400
Space parity.
#define | US_PAR_MARK 0x00000600
Marked parity.
#define | US_PAR_NO 0x00000800
No parity.
#define | US_PAR_MULTIDROP 0x00000C00
Multi-drop mode.
#define | US_NBSTOP_MASK 0x00003000
Masks stop bit length.
#define | US_NBSTOP_1 0x00000000
1 stop bit.
#define | US_NBSTOP_1_5 0x00001000
1.5 stop bits.
#define | US_NBSTOP_2 0x00002000
2 stop bits.
#define | US_CHMODE_MASK 0x0000C000
Channel mode mask.
#define | US_CHMODE_NORMAL 0x00000000
Normal mode.
#define | US_CHMODE_AUTOMATIC_ECHO 0x00004000
Automatic echo.
#define | US_CHMODE_LOCAL_LOOPBACK 0x00008000
Local loopback.
#define | US_CHMODE_REMOTE_LOOPBACK 0x0000C000
Remote loopback.
#define | US_MSBF 16
Bit order.
#define | US_MODE9 17
9 bit mode.
#define | US_CLKO 18
Clock output select.
#define | US_OVER 19
Oversampling mode.
#define | US_INACK 20
Inhibit non acknowledge.
#define | US_DSNACK 21
Disable successive nack.
#define | US_MAX_INTERATION_MASK 0x07000000
Max numer of interation in mode ISO7816 T=0.
#define | US_FILTER 28
Infrared receive line filter.
#define | US_IER_OFF 0x00000008
Status and Interrupt Register.
#define | US0_IER (*((reg32_t *)(USART0_BASE + US_IER_OFF)))
Channel 0 interrupt enable register address.
#define | US1_IER (*((reg32_t *)(USART1_BASE + US_IER_OFF)))
Channel 1 interrupt enable register address.
#define | US_IDR_OFF 0x0000000C
USART interrupt disable register offset.
#define | US0_IDR (*((reg32_t *)(USART0_BASE + US_IDR_OFF)))
Channel 0 interrupt disable register address.
#define | US1_IDR (*((reg32_t *)(USART1_BASE + US_IDR_OFF)))
Channel 1 interrupt disable register address.
#define | US_IMR_OFF 0x00000010
USART interrupt mask register offset.
#define | US0_IMR (*((reg32_t *)(USART0_BASE + US_IMR_OFF)))
Channel 0 interrupt mask register address.
#define | US1_IMR (*((reg32_t *)(USART1_BASE + US_IMR_OFF)))
Channel 1 interrupt mask register address.
#define | US_CSR_OFF 0x00000014
USART status register offset.
#define | US0_CSR (*((reg32_t *)(USART0_BASE + US_CSR_OFF)))
Channel 0 status register address.
#define | US1_CSR (*((reg32_t *)(USART1_BASE + US_CSR_OFF)))
Channel 1 status register address.
#define | US_CSR_RI 20
Image of RI input.
#define | US_CSR_DSR 21
Image of DSR input.
#define | US_CSR_DCD 22
Image of DCD input.
#define | US_CSR_CTS 23
Image of CTS input.
#define | US_RXRDY 0
Receiver ready.
#define | US_TXRDY 1
Transmitter ready.
#define | US_RXBRK 2
Receiver break.
#define | US_ENDRX 3
End of receiver PDC transfer.
#define | US_ENDTX 4
End of transmitter PDC transfer.
#define | US_OVRE 5
Overrun error.
#define | US_FRAME 6
Framing error.
#define | US_PARE 7
Parity error.
#define | US_TIMEOUT 8
Receiver timeout.
#define | US_TXEMPTY 9
Transmitter empty.
#define | US_ITERATION 10
Iteration interrupt enable.
#define | US_TXBUFE 11
Buffer empty interrupt enable.
#define | US_RXBUFF 12
Buffer full interrupt enable.
#define | US_NACK 13
Non acknowledge interrupt enable.
#define | US_RIIC 16
Ring indicator input change enable.
#define | US_DSRIC 17
Data set ready input change enable.
#define | US_DCDIC 18
Data carrier detect input change interrupt enable.
#define | US_CTSIC 19
Clear to send input change interrupt enable.
#define | US_RHR_OFF 0x00000018
Receiver Holding Register.
#define | US0_RHR (*((reg32_t *)(USART0_BASE + US_RHR_OFF)))
Channel 0 receiver holding register address.
#define | US1_RHR (*((reg32_t *)(USART1_BASE + US_RHR_OFF)))
Channel 1 receiver holding register address.
#define | US_RHR_RXCHR_MASK 0x000001FF
Last char received if US_RXRDY is set.
#define | US_RHR_RXSYNH 15
Received sync.
#define | US_THR_OFF 0x0000001C
Transmitter Holding Register.
#define | US0_THR (*((reg32_t *)(USART0_BASE + US_THR_OFF)))
Channel 0 transmitter holding register address.
#define | US1_THR (*((reg32_t *)(USART1_BASE + US_THR_OFF)))
Channel 1 transmitter holding register address.
#define | US_THR_TXCHR_MASK 0x000001FF
Next char to be trasmitted.
#define | US_THR_TXSYNH 15
Sync field to be trasmitted.
#define | US_BRGR_OFF 0x00000020
Baud Rate Generator Register.
#define | US0_BRGR (*((reg32_t *)(USART0_BASE + US_BRGR_OFF)))
Channel 0 baud rate register address.
#define | US1_BRGR (*((reg32_t *)(USART1_BASE + US_BRGR_OFF)))
Channel 1 baud rate register address.
#define | US_RTOR_OFF 0x00000024
Receiver Timeout Register.
#define | US0_RTOR (*((reg32_t *)(USART0_BASE + US_RTOR_OFF)))
Channel 0 receiver timeout register address.
#define | US1_RTOR (*((reg32_t *)(USART1_BASE + US_RTOR_OFF)))
Channel 1 receiver timeout register address.
#define | US_TTGR_OFF 0x00000028
Transmitter Time Guard Register.
#define | US0_TTGR (*((reg32_t *)(USART0_BASE + US_TTGR_OFF)))
Channel 0 transmitter time guard register address.
#define | US1_TTGR (*((reg32_t *)(USART1_BASE + US_TTGR_OFF)))
Channel 1 transmitter time guard register address.
#define | US_FIDI_OFF 0x00000040
FI DI Ratio Register.
#define | US0_FIDI (*((reg32_t *)(USART0_BASE + US_FIDI_OFF)))
Channel 0 FI DI ratio register address.
#define | US1_FIDI (*((reg32_t *)(USART1_BASE + US_FIDI_OFF)))
Channel 1 FI DI ratio register address.
#define | US_NER_OFF 0x00000044
Error Counter Register.
#define | US0_NER (*((reg32_t *)(USART0_BASE + US_NER_OFF)))
Channel 0 error counter register address.
#define | US1_NER (*((reg32_t *)(USART1_BASE + US_NER_OFF)))
Channel 1 error counter register address.
#define | US_IF_OFF 0x0000004C
IrDA Filter Register.
#define | US0_IF (*((reg32_t *)(USART0_BASE + US_IF_OFF)))
Channel 0 IrDA filter register address.
#define | US1_IF (*((reg32_t *)(USART1_BASE + US_IF_OFF)))
Channel 1 IrDA filter register address.

Detailed Description

Author:
Daniele Basile <asterix@develer.com>

AT91 UART User interface. This file is based on NUT/OS implementation. See license below.

Definition in file at91_us.h.

Define Documentation

#define US_BRGR_OFF 0x00000020

Baud Rate Generator Register.

USART baud rate register offset.

Definition at line 233 of file at91_us.h.

#define US_CR_OFF 0x00000000

USART Control Register.

USART control register offset.

Definition at line 78 of file at91_us.h.

#define US_FIDI_OFF 0x00000040

FI DI Ratio Register.

USART FI DI ratio register offset.

Definition at line 260 of file at91_us.h.

#define US_IER_OFF 0x00000008

Status and Interrupt Register.

USART interrupt enable register offset.

Definition at line 168 of file at91_us.h.

#define US_IF_OFF 0x0000004C

IrDA Filter Register.

USART IrDA filter register offset.

Definition at line 278 of file at91_us.h.

#define US_MR_OFF 0x00000004

Mode Register.

USART mode register offset.

Definition at line 105 of file at91_us.h.

#define US_NER_OFF 0x00000044

Error Counter Register.

USART error counter register offset.

Definition at line 269 of file at91_us.h.

#define US_RHR_OFF 0x00000018

Receiver Holding Register.

USART receiver holding register offset.

Definition at line 211 of file at91_us.h.

#define US_RTOR_OFF 0x00000024

Receiver Timeout Register.

USART receiver timeout register offset.

Definition at line 242 of file at91_us.h.

#define US_THR_OFF 0x0000001C

Transmitter Holding Register.

USART transmitter holding register offset.

Definition at line 222 of file at91_us.h.

#define US_TTGR_OFF 0x00000028

Transmitter Time Guard Register.

USART transmitter time guard register offset.

Definition at line 251 of file at91_us.h.


BeRTOS: at91_us.h Source File

  • cpu
  • arm
  • io
at91_us.h
Go to the documentation of this file.
00001
00039 /*
00040  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00041  *
00042  * Redistribution and use in source and binary forms, with or without
00043  * modification, are permitted provided that the following conditions
00044  * are met:
00045  *
00046  * 1. Redistributions of source code must retain the above copyright
00047  *    notice, this list of conditions and the following disclaimer.
00048  * 2. Redistributions in binary form must reproduce the above copyright
00049  *    notice, this list of conditions and the following disclaimer in the
00050  *    documentation and/or other materials provided with the distribution.
00051  * 3. Neither the name of the copyright holders nor the names of
00052  *    contributors may be used to endorse or promote products derived
00053  *    from this software without specific prior written permission.
00054  *
00055  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00056  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00057  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00058  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00059  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00060  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00061  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00062  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00063  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00064  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00065  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00066  * SUCH DAMAGE.
00067  *
00068  * For additional information see http://www.ethernut.de/
00069  */
00070
00071 #ifndef AT91_US_H
00072 #define AT91_US_H
00073
00077 /*\{*/
00078 #define US_CR_OFF               0x00000000      ///< USART control register offset.
00079 #define US0_CR  (*((reg32_t *)(USART0_BASE + US_CR_OFF)))       ///< Channel 0 control register address.
00080 #define US1_CR  (*((reg32_t *)(USART1_BASE + US_CR_OFF)))       ///< Channel 1 control register address.
00081 #define US_RSTRX                         2      ///< Reset receiver.
00082 #define US_RSTTX                         3      ///< Reset transmitter.
00083 #define US_RXEN                          4      ///< Receiver enable.
00084 #define US_RXDIS                         5      ///< Receiver disable.
00085 #define US_TXEN                          6      ///< Transmitter enable.
00086 #define US_TXDIS                         7      ///< Transmitter disable.
00087 #define US_RSTSTA                        8      ///< Reset status bits.
00088 #define US_STTBRK                        9      ///< Start break.
00089 #define US_STPBRK                        10     ///< Stop break.
00090 #define US_STTTO                         11     ///< Start timeout.
00091 #define US_SENDA                         12     ///< Send next byte with address bit set.
00092 #define US_RSTIT                         13     ///< Reset interations.
00093 #define US_RSTNAK                        14     ///< Reset non acknowledge.
00094 #define US_RETTO                         15     ///< Rearm time out.
00095 #define US_DTREN                         16     ///< Data terminal ready enable.
00096 #define US_DTRDIS                        17     ///< Data terminal ready disable.
00097 #define US_RTSEN                         18     ///< Request to send enable.
00098 #define US_RTSDIS                        19     ///< Request to send disable.
00099 /*\}*/
00100
00104 /*\{*/
00105 #define US_MR_OFF               0x00000004      ///< USART mode register offset.
00106 #define US0_MR  (*((reg32_t *)(USART0_BASE + US_MR_OFF)))       ///< Channel 0 mode register address.
00107 #define US1_MR  (*((reg32_t *)(USART1_BASE + US_MR_OFF)))       ///< Channel 1 mode register address.
00108
00109 #define US_USART_MODE_MASK      0x0000000F      ///< USART mode mask.
00110 #define US_USART_MODE_NORMA     0x00000000      ///< Normal.
00111 #define US_USART_MODE_RS485     0x00000001      ///< RS485.
00112 #define US_USART_MODE_HW_HDSH   0x00000002      ///< Hardware handshaking.
00113 #define US_USART_MODE_MODEM     0x00000003      ///< Modem.
00114 #define US_USART_MODE_ISO7816T0 0x00000004      ///< ISO7816 protocol: T=0.
00115 #define US_USART_MODE_ISO7816T1 0x00000006      ///< ISO7816 protocol: T=1.
00116 #define US_USART_MODE_IRDA      0x00000008      ///< IrDA.
00117
00118 #define US_CLKS_MASK            0x00000030      ///< Clock selection mask.
00119 #define US_CLKS_MCK             0x00000000      ///< Master clock.
00120 #define US_CLKS_MCK8            0x00000010      ///< Master clock divided by 8.
00121 #define US_CLKS_SCK             0x00000020      ///< External clock.
00122 #define US_CLKS_SLCK            0x00000030      ///< Slow clock.
00123
00124 #define US_CHRL_MASK            0x000000C0      ///< Masks data length.
00125 #define US_CHRL_5               0x00000000      ///< 5 data bits.
00126 #define US_CHRL_6               0x00000040      ///< 6 data bits.
00127 #define US_CHRL_7               0x00000080      ///< 7 data bits.
00128 #define US_CHRL_8               0x000000C0      ///< 8 data bits.
00129
00130 #define US_SYNC                          8      ///< Synchronous mode enable.
00131
00132 #define US_PAR_MASK             0x00000E00      ///< Parity mode mask.
00133 #define US_PAR_EVEN             0x00000000      ///< Even parity.
00134 #define US_PAR_ODD              0x00000200      ///< Odd parity.
00135 #define US_PAR_SPACE            0x00000400      ///< Space parity.
00136 #define US_PAR_MARK             0x00000600      ///< Marked parity.
00137 #define US_PAR_NO               0x00000800      ///< No parity.
00138 #define US_PAR_MULTIDROP        0x00000C00      ///< Multi-drop mode.
00139
00140 #define US_NBSTOP_MASK          0x00003000      ///< Masks stop bit length.
00141 #define US_NBSTOP_1             0x00000000      ///< 1 stop bit.
00142 #define US_NBSTOP_1_5           0x00001000      ///< 1.5 stop bits.
00143 #define US_NBSTOP_2             0x00002000      ///< 2 stop bits.
00144
00145 #define US_CHMODE_MASK              0x0000C000  ///< Channel mode mask.
00146 #define US_CHMODE_NORMAL            0x00000000  ///< Normal mode.
00147 #define US_CHMODE_AUTOMATIC_ECHO    0x00004000  ///< Automatic echo.
00148 #define US_CHMODE_LOCAL_LOOPBACK    0x00008000  ///< Local loopback.
00149 #define US_CHMODE_REMOTE_LOOPBACK   0x0000C000  ///< Remote loopback.
00150
00151 #define US_MSBF                         16      ///< Bit order.
00152 #define US_MODE9                        17      ///< 9 bit mode.
00153 #define US_CLKO                         18      ///< Clock output select.
00154 #define US_OVER                         19      ///< Oversampling mode.
00155 #define US_INACK                        20      ///< Inhibit non acknowledge.
00156 #define US_DSNACK                       21      ///< Disable successive nack.
00157
00158 #define US_MAX_INTERATION_MASK      0x07000000  ///< Max numer of interation in mode ISO7816 T=0.
00159
00160 #define US_FILTER                       28      ///< Infrared receive line filter.
00161
00162 /*\}*/
00163
00167 /*\{*/
00168 #define US_IER_OFF              0x00000008      ///< USART interrupt enable register offset.
00169 #define US0_IER (*((reg32_t *)(USART0_BASE + US_IER_OFF)))      ///< Channel 0 interrupt enable register address.
00170 #define US1_IER (*((reg32_t *)(USART1_BASE + US_IER_OFF)))      ///< Channel 1 interrupt enable register address.
00171
00172 #define US_IDR_OFF              0x0000000C      ///< USART interrupt disable register offset.
00173 #define US0_IDR (*((reg32_t *)(USART0_BASE + US_IDR_OFF)))      ///< Channel 0 interrupt disable register address.
00174 #define US1_IDR (*((reg32_t *)(USART1_BASE + US_IDR_OFF)))      ///< Channel 1 interrupt disable register address.
00175
00176 #define US_IMR_OFF              0x00000010      ///< USART interrupt mask register offset.
00177 #define US0_IMR (*((reg32_t *)(USART0_BASE + US_IMR_OFF)))      ///< Channel 0 interrupt mask register address.
00178 #define US1_IMR (*((reg32_t *)(USART1_BASE + US_IMR_OFF)))      ///< Channel 1 interrupt mask register address.
00179
00180 #define US_CSR_OFF              0x00000014      ///< USART status register offset.
00181 #define US0_CSR (*((reg32_t *)(USART0_BASE + US_CSR_OFF)))      ///< Channel 0 status register address.
00182 #define US1_CSR (*((reg32_t *)(USART1_BASE + US_CSR_OFF)))      ///< Channel 1 status register address.
00183 #define US_CSR_RI                       20      ///< Image of RI input.
00184 #define US_CSR_DSR                      21      ///< Image of DSR input.
00185 #define US_CSR_DCD                      22      ///< Image of DCD input.
00186 #define US_CSR_CTS                      23      ///< Image of CTS input.
00187
00188 #define US_RXRDY                         0      ///< Receiver ready.
00189 #define US_TXRDY                         1      ///< Transmitter ready.
00190 #define US_RXBRK                         2      ///< Receiver break.
00191 #define US_ENDRX                         3      ///< End of receiver PDC transfer.
00192 #define US_ENDTX                         4      ///< End of transmitter PDC transfer.
00193 #define US_OVRE                          5      ///< Overrun error.
00194 #define US_FRAME                         6      ///< Framing error.
00195 #define US_PARE                          7      ///< Parity error.
00196 #define US_TIMEOUT                       8      ///< Receiver timeout.
00197 #define US_TXEMPTY                       9      ///< Transmitter empty.
00198 #define US_ITERATION                    10      ///< Iteration interrupt enable.
00199 #define US_TXBUFE                       11      ///< Buffer empty interrupt enable.
00200 #define US_RXBUFF                       12      ///< Buffer full interrupt enable.
00201 #define US_NACK                         13      ///< Non acknowledge interrupt enable.
00202 #define US_RIIC                         16      ///< Ring indicator input change enable.
00203 #define US_DSRIC                        17      ///< Data set ready input change enable.
00204 #define US_DCDIC                        18      ///< Data carrier detect input change interrupt enable.
00205 #define US_CTSIC                        19      ///< Clear to send input change interrupt enable.
00206
00210 /*\{*/
00211 #define US_RHR_OFF              0x00000018      ///< USART receiver holding register offset.
00212 #define US0_RHR (*((reg32_t *)(USART0_BASE + US_RHR_OFF)))      ///< Channel 0 receiver holding register address.
00213 #define US1_RHR (*((reg32_t *)(USART1_BASE + US_RHR_OFF)))      ///< Channel 1 receiver holding register address.
00214 #define US_RHR_RXCHR_MASK       0x000001FF      ///< Last char received if US_RXRDY is set.
00215 #define US_RHR_RXSYNH                   15      ///< Received sync.
00216 /*\}*/
00217
00221 /*\{*/
00222 #define US_THR_OFF              0x0000001C      ///< USART transmitter holding register offset.
00223 #define US0_THR (*((reg32_t *)(USART0_BASE + US_THR_OFF)))      ///< Channel 0 transmitter holding register address.
00224 #define US1_THR (*((reg32_t *)(USART1_BASE + US_THR_OFF)))      ///< Channel 1 transmitter holding register address.
00225 #define US_THR_TXCHR_MASK       0x000001FF      ///< Next char to be trasmitted.
00226 #define US_THR_TXSYNH                   15      ///< Sync field to be trasmitted.
00227 /*\}*/
00228
00232 /*\{*/
00233 #define US_BRGR_OFF             0x00000020      ///< USART baud rate register offset.
00234 #define US0_BRGR (*((reg32_t *)(USART0_BASE + US_BRGR_OFF)))    ///< Channel 0 baud rate register address.
00235 #define US1_BRGR (*((reg32_t *)(USART1_BASE + US_BRGR_OFF)))    ///< Channel 1 baud rate register address.
00236 /*\}*/
00237
00241 /*\{*/
00242 #define US_RTOR_OFF             0x00000024      ///< USART receiver timeout register offset.
00243 #define US0_RTOR (*((reg32_t *)(USART0_BASE + US_RTOR_OFF)))    ///< Channel 0 receiver timeout register address.
00244 #define US1_RTOR (*((reg32_t *)(USART1_BASE + US_RTOR_OFF)))    ///< Channel 1 receiver timeout register address.
00245 /*\}*/
00246
00250 /*\{*/
00251 #define US_TTGR_OFF             0x00000028      ///< USART transmitter time guard register offset.
00252 #define US0_TTGR (*((reg32_t *)(USART0_BASE + US_TTGR_OFF)))    ///< Channel 0 transmitter time guard register address.
00253 #define US1_TTGR (*((reg32_t *)(USART1_BASE + US_TTGR_OFF)))    ///< Channel 1 transmitter time guard register address.
00254 /*\}*/
00255
00259 /*\{*/
00260 #define US_FIDI_OFF             0x00000040      ///< USART FI DI ratio register offset.
00261 #define US0_FIDI (*((reg32_t *)(USART0_BASE + US_FIDI_OFF)))    ///< Channel 0 FI DI ratio register address.
00262 #define US1_FIDI (*((reg32_t *)(USART1_BASE + US_FIDI_OFF)))    ///< Channel 1 FI DI ratio register address.
00263 /*\}*/
00264
00268 /*\{*/
00269 #define US_NER_OFF              0x00000044      ///< USART error counter register offset.
00270 #define US0_NER  (*((reg32_t *)(USART0_BASE + US_NER_OFF)))     ///< Channel 0 error counter register address.
00271 #define US1_NER  (*((reg32_t *)(USART1_BASE + US_NER_OFF)))     ///< Channel 1 error counter register address.
00272 /*\}*/
00273
00277 /*\{*/
00278 #define US_IF_OFF               0x0000004C      ///< USART IrDA filter register offset.
00279 #define US0_IF (*((reg32_t *)(USART0_BASE + US_IF_OFF)))        ///< Channel 0 IrDA filter register address.
00280 #define US1_IF (*((reg32_t *)(USART1_BASE + US_IF_OFF)))        ///< Channel 1 IrDA filter register address.
00281 /*\}*/
00282
00283 #if USART_HAS_PDC
00284
00288     /*\{*/
00289     #define US0_RPR (*((reg32_t *)(USART0_BASE + PERIPH_RPR_OFF)))      ///< Channel 0 receive pointer register address.
00290     #define US1_RPR (*((reg32_t *)(USART1_BASE + PERIPH_RPR_OFF)))      ///< Channel 1 receive pointer register address.
00291     /*\}*/
00292
00296     /*\{*/
00297     #define US0_RCR (*((reg32_t *)(USART0_BASE + PERIPH_RCR_OFF)))      ///< Channel 0 receive counter register address.
00298     #define US1_RCR (*((reg32_t *)(USART1_BASE + PERIPH_RCR_OFF)))      ///< Channel 1 receive counter register address.
00299     /*\}*/
00300
00304     /*\{*/
00305     #define US0_TPR (*((reg32_t *)(USART0_BASE + PERIPH_TPR_OFF)))      ///< Channel 0 transmit pointer register address.
00306     #define US1_TPR (*((reg32_t *)(USART1_BASE + PERIPH_TPR_OFF)))      ///< Channel 1 transmit pointer register address.
00307     /*\}*/
00308
00312     /*\{*/
00313     #define US0_TCR (*((reg32_t *)(USART0_BASE + PERIPH_TCR_OFF)))      ///< Channel 0 transmit counter register address.
00314     #define US1_TCR (*((reg32_t *)(USART1_BASE + PERIPH_TCR_OFF)))      ///< Channel 1 transmit counter register address.
00315     /*\}*/
00316
00317     #if defined(PERIPH_RNPR_OFF) && defined(PERIPH_RNCR_OFF)
00318     #define US0_RNPR   (*((reg32_t *)(USART0_BASE + PERIPH_RNPR_OFF)))  ///< PDC channel 0 receive next pointer register.
00319     #define US1_RNPR   (*((reg32_t *)(USART1_BASE + PERIPH_RNPR_OFF)))  ///< PDC channel 1 receive next pointer register.
00320     #define US0_RNCR   (*((reg32_t *)(USART0_BASE + PERIPH_RNCR_OFF)))  ///< PDC channel 0 receive next counter register.
00321     #define US1_RNCR   (*((reg32_t *)(USART1_BASE + PERIPH_RNCR_OFF)))  ///< PDC channel 1 receive next counter register.
00322     #endif
00323
00324     #if defined(PERIPH_TNPR_OFF) && defined(PERIPH_TNCR_OFF)
00325     #define US0_TNPR   (*((reg32_t *)(USART0_BASE + PERIPH_TNPR_OFF)))  ///< PDC channel 0 transmit next pointer register.
00326     #define US1_TNPR   (*((reg32_t *)(USART1_BASE + PERIPH_TNPR_OFF)))  ///< PDC channel 1 transmit next pointer register.
00327     #define US0_TNCR   (*((reg32_t *)(USART0_BASE + PERIPH_TNCR_OFF)))  ///< PDC channel 0 transmit next counter register.
00328     #define US1_TNCR   (*((reg32_t *)(USART1_BASE + PERIPH_TNCR_OFF)))  ///< PDC channel 1 transmit next counter register.
00329     #endif
00330
00331     #if defined(PERIPH_PTCR_OFF)
00332     #define US0_PTCR   (*((reg32_t *)(USART0_BASE + PERIPH_PTCR_OFF)))  ///< PDC channel 0 transfer control register.
00333     #define US1_PTCR   (*((reg32_t *)(USART1_BASE + PERIPH_PTCR_OFF)))  ///< PDC channel 1 transfer control register.
00334     #endif
00335
00336     #if defined(PERIPH_PTSR_OFF)
00337     #define US0_PTSR   (*((reg32_t *)(USART0_BASE + PERIPH_PTSR_OFF)))  ///< PDC channel 0 transfer status register.
00338     #define US1_PTSR   (*((reg32_t *)(USART1_BASE + PERIPH_PTSR_OFF)))  ///< PDC channel 1 transfer status register.
00339     #endif
00340
00341 #endif  /* USART_HAS_PDC */
00342
00343 #endif /* AT91_US_H */


BeRTOS: at91_wdt.h File Reference

  • cpu
  • arm
  • io
at91_wdt.h File Reference

Go to the source code of this file.

Defines

#define | WDT_CR_OFF 0x00000000
Watch Dog Control Register.
#define | WDT_CR (*((reg32_t *)(WDT_BASE + WDT_CR_OFF)))
Watchdog control register address.
#define | WDT_WDRSTT 0
Watchdog restart.
#define | WDT_KEY 0xA5000000
Watchdog password.
#define | WDT_MR_OFF 0x00000004
Watch Dog Mode Register.
#define | WDT_MR (*((reg32_t *)(WDT_BASE + WDT_MR_OFF)))
Mode register address.
#define | WDT_WDV_MASK 0x00000FFF
Counter value mask.
#define | WDT_WDV_SHIFT 0
Counter value LSB.
#define | WDT_WDFIEN 12
Fault interrupt enable.
#define | WDT_WDRSTEN 13
Reset enable.
#define | WDT_WDRPROC 14
Eset processor enable.
#define | WDT_WDDIS 15
Watchdog disable.
#define | WDT_WDD_MASK 0x0FFF0000
Delta value mask.
#define | WDT_WDD_SHIFT 16
Delta value LSB.
#define | WDT_WDDBGHLT 28
Watchdog debug halt.
#define | WDT_WDIDLEHLT 29
Watchdog idle halt.
#define | WDT_SR_OFF 0x00000008
Watch Dog Status Register.
#define | WDT_SR (*((reg32_t *)(WDT_BASE + WDT_SR_OFF)))
Status register address.
#define | WDT_WDUNF 0
Watchdog underflow.
#define | WDT_WDERR 1
Watchdog error.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

AT91 Watchdog. This file is based on NUT/OS implementation. See license below.

Definition in file at91_wdt.h.

Define Documentation

#define WDT_CR_OFF 0x00000000

Watch Dog Control Register.

Watchdog control register offset.

Definition at line 79 of file at91_wdt.h.

#define WDT_MR_OFF 0x00000004

Watch Dog Mode Register.

Mode register offset.

Definition at line 87 of file at91_wdt.h.

#define WDT_SR_OFF 0x00000008

Watch Dog Status Register.

Status register offset.

Definition at line 103 of file at91_wdt.h.


BeRTOS: at91_wdt.h Source File

  • cpu
  • arm
  • io
at91_wdt.h
Go to the documentation of this file.
00001
00041 /*
00042  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00043  *
00044  * Redistribution and use in source and binary forms, with or without
00045  * modification, are permitted provided that the following conditions
00046  * are met:
00047  *
00048  * 1. Redistributions of source code must retain the above copyright
00049  *    notice, this list of conditions and the following disclaimer.
00050  * 2. Redistributions in binary form must reproduce the above copyright
00051  *    notice, this list of conditions and the following disclaimer in the
00052  *    documentation and/or other materials provided with the distribution.
00053  * 3. Neither the name of the copyright holders nor the names of
00054  *    contributors may be used to endorse or promote products derived
00055  *    from this software without specific prior written permission.
00056  *
00057  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00058  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00059  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00060  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00061  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00062  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00063  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00064  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00065  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00066  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00067  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00068  * SUCH DAMAGE.
00069  *
00070  * For additional information see http://www.ethernut.de/
00071  */
00072
00073 #ifndef AT91_WDT_H
00074 #define AT91_WDT_H
00075
00076
00078 /*\{*/
00079 #define WDT_CR_OFF          0x00000000  ///< Watchdog control register offset.
00080 #define WDT_CR  (*((reg32_t *)(WDT_BASE + WDT_CR_OFF))) ///< Watchdog control register address.
00081 #define WDT_WDRSTT                   0  ///< Watchdog restart.
00082 #define WDT_KEY             0xA5000000  ///< Watchdog password.
00083 /*\}*/
00084
00086 /*\{*/
00087 #define WDT_MR_OFF          0x00000004  ///< Mode register offset.
00088 #define WDT_MR  (*((reg32_t *)(WDT_BASE + WDT_MR_OFF))) ///< Mode register address.
00089 #define WDT_WDV_MASK        0x00000FFF  ///< Counter value mask.
00090 #define WDT_WDV_SHIFT                0  ///< Counter value LSB.
00091 #define WDT_WDFIEN                  12  ///< Fault interrupt enable.
00092 #define WDT_WDRSTEN                 13  ///< Reset enable.
00093 #define WDT_WDRPROC                 14  ///< Eset processor enable.
00094 #define WDT_WDDIS                   15  ///< Watchdog disable.
00095 #define WDT_WDD_MASK        0x0FFF0000  ///< Delta value mask.
00096 #define WDT_WDD_SHIFT               16  ///< Delta value LSB.
00097 #define WDT_WDDBGHLT                28  ///< Watchdog debug halt.
00098 #define WDT_WDIDLEHLT               29  ///< Watchdog idle halt.
00099 /*\}*/
00100
00102 /*\{*/
00103 #define WDT_SR_OFF          0x00000008  ///< Status register offset.
00104 #define WDT_SR  (*((reg32_t *)(WDT_BASE + WDT_SR_OFF))) ///< Status register address.
00105 #define WDT_WDUNF                    0  ///< Watchdog underflow.
00106 #define WDT_WDERR                    1  ///< Watchdog error.
00107 /*\}*/
00108
00109
00110 #endif /* AT91_WDT_H */


BeRTOS: at91sam7.h File Reference

  • cpu
  • arm
  • io
at91sam7.h File Reference
#include <cfg/compiler.h>
#include "at91_aic.h"
#include "at91_pit.h"
#include "at91_pmc.h"
#include "at91_mc.h"
#include "at91_wdt.h"
#include "at91_rstc.h"
#include "at91_pio.h"
#include "at91_us.h"
#include "at91_dbgu.h"
#include "at91_tc.h"
#include "at91_adc.h"
#include "at91_pwm.h"
#include "at91_spi.h"
#include "at91_twi.h"
#include "at91_ssc.h"
#include "at91_emac.h"

Go to the source code of this file.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>
Daniele Basile <asterix@develer.com>

AT91SAM7 register definitions. This file is based on NUT/OS implementation. See license below.

Definition in file at91sam7.h.


BeRTOS: at91sam7.h Source File

  • cpu
  • arm
  • io
at91sam7.h
Go to the documentation of this file.
00001
00041 /*
00042  * Copyright (C) 2006-2007 by egnite Software GmbH. All rights reserved.
00043  *
00044  * Redistribution and use in source and binary forms, with or without
00045  * modification, are permitted provided that the following conditions
00046  * are met:
00047  *
00048  * 1. Redistributions of source code must retain the above copyright
00049  *    notice, this list of conditions and the following disclaimer.
00050  * 2. Redistributions in binary form must reproduce the above copyright
00051  *    notice, this list of conditions and the following disclaimer in the
00052  *    documentation and/or other materials provided with the distribution.
00053  * 3. Neither the name of the copyright holders nor the names of
00054  *    contributors may be used to endorse or promote products derived
00055  *    from this software without specific prior written permission.
00056  *
00057  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00058  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00059  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00060  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00061  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00062  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00063  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00064  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00065  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00066  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00067  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00068  * SUCH DAMAGE.
00069  *
00070  * For additional information see http://www.ethernut.de/
00071  */
00072
00073 #ifndef AT91SAM7_H
00074 #define AT91SAM7_H
00075
00076 #include <cfg/compiler.h>
00077
00078 #if CPU_ARM_SAM7X || CPU_ARM_SAM7S_LARGE
00079     #define FLASH_BASE      0x100000UL
00080     #define RAM_BASE        0x200000UL
00081
00082     #define TC_BASE         0xFFFA0000      ///< Timer/counter base address.
00083     #define UDP_BASE        0xFFFB0000      ///< USB device port base address.
00084     #define TWI_BASE        0xFFFB8000      ///< Two-wire interface base address.
00085     #define USART0_BASE     0xFFFC0000      ///< USART 0 base address.
00086     #define USART1_BASE     0xFFFC4000      ///< USART 1 base address.
00087     #define PWMC_BASE       0xFFFCC000      ///< PWM controller base address.
00088     #define SSC_BASE        0xFFFD4000      ///< Serial synchronous controller base address.
00089     #define ADC_BASE        0xFFFD8000      ///< ADC base address.
00090
00091     #define AIC_BASE        0xFFFFF000      ///< AIC base address.
00092     #define DBGU_BASE       0xFFFFF200      ///< DBGU base address.
00093     #define PIOA_BASE       0xFFFFF400      ///< PIO A base address.
00094     #define PMC_BASE        0xFFFFFC00      ///< PMC base address.
00095     #define RSTC_BASE       0xFFFFFD00      ///< Resect controller register base address.
00096     #define RTT_BASE        0xFFFFFD20      ///< Realtime timer base address.
00097     #define PIT_BASE        0xFFFFFD30      ///< Periodic interval timer base address.
00098     #define WDT_BASE        0xFFFFFD40      ///< Watch Dog register base address.
00099     #define VREG_BASE       0xFFFFFD60      ///< Voltage regulator mode controller base address.
00100     #define MC_BASE         0xFFFFFF00      ///< Memory controller base.
00101
00102     #if CPU_ARM_SAM7X
00103         #define CAN_BASE        0xFFFD0000      ///< PWM controller base address.
00104         #define EMAC_BASE       0xFFFDC000      ///< Ethernet MAC address.
00105         #define SPI0_BASE       0xFFFE0000      ///< SPI0 base address.
00106         #define SPI1_BASE       0xFFFE4000      ///< SPI1 base address.
00107         #define PIOB_BASE       0xFFFFF600      ///< PIO base address.
00108     #endif
00109
00110     #if CPU_ARM_SAM7S_LARGE
00111         #define SPI_BASE        0xFFFE0000      ///< SPI0 base address.
00112     #endif
00113
00114     #define PIO_HAS_MULTIDRIVER        1
00115     #define PIO_HAS_PULLUP             1
00116     #define PIO_HAS_PERIPHERALSELECT   1
00117     #define PIO_HAS_OUTPUTWRITEENABLE  1
00118
00119     #define DBGU_HAS_PDC               1
00120     #define SPI_HAS_PDC                1
00121     #define SSC_HAS_PDC                1
00122     #define USART_HAS_PDC              1
00123
00124     /* PDC registers */
00125     #define PERIPH_RPR_OFF  0x100  ///< Receive Pointer Register.
00126     #define PERIPH_RCR_OFF  0x104  ///< Receive Counter Register.
00127     #define PERIPH_TPR_OFF  0x108  ///< Transmit Pointer Register.
00128     #define PERIPH_TCR_OFF  0x10C  ///< Transmit Counter Register.
00129     #define PERIPH_RNPR_OFF 0x110  ///< Receive Next Pointer Register.
00130     #define PERIPH_RNCR_OFF 0x114  ///< Receive Next Counter Register.
00131     #define PERIPH_TNPR_OFF 0x118  ///< Transmit Next Pointer Register.
00132     #define PERIPH_TNCR_OFF 0x11C  ///< Transmit Next Counter Register.
00133     #define PERIPH_PTCR_OFF 0x120  ///< PDC Transfer Control Register.
00134     #define PERIPH_PTSR_OFF 0x124  ///< PDC Transfer Status Register.
00135
00136     #define PDC_RXTEN  0
00137     #define PDC_RXTDIS 1
00138     #define PDC_TXTEN  8
00139     #define PDC_TXTDIS 9
00140
00141 #else
00142     #error No base address register definition for selected ARM CPU
00143
00144 #endif
00145
00146 #if CPU_ARM_AT91SAM7S64
00147     #define FLASH_MEM_SIZE          0x10000UL ///< Internal flash memory size
00148     #define FLASH_PAGE_SIZE_BYTES         128 ///< Size of cpu flash memory page in bytes
00149     #define FLASH_BANKS_NUM                 1 ///< Number of flash banks
00150     #define FLASH_SECTORS_NUM              16 ///< Number of flash sector
00151     #define FLASH_PAGE_PER_SECTOR          32 ///< Number of page for sector
00152
00153 #elif CPU_ARM_AT91SAM7S128 || CPU_ARM_AT91SAM7X128
00154     #define FLASH_MEM_SIZE          0x20000UL ///< Internal flash memory size
00155     #define FLASH_PAGE_SIZE_BYTES         256 ///< Size of cpu flash memory page in bytes
00156     #define FLASH_BANKS_NUM                 1 ///< Number of flash banks
00157     #define FLASH_SECTORS_NUM               8 ///< Number of flash sector
00158     #define FLASH_PAGE_PER_SECTOR          64 ///< Number of page for sector
00159
00160 #elif CPU_ARM_AT91SAM7S256 || CPU_ARM_AT91SAM7X256
00161     #define FLASH_MEM_SIZE          0x40000UL ///< Internal flash memory size
00162     #define FLASH_PAGE_SIZE_BYTES         256 ///< Size of cpu flash memory page in bytes
00163     #define FLASH_BANKS_NUM                 1 ///< Number of flash banks
00164     #define FLASH_SECTORS_NUM              16 ///< Number of flash sector
00165     #define FLASH_PAGE_PER_SECTOR          64 ///< Number of page for sector
00166
00167 #elif CPU_ARM_AT91SAM7S512 || CPU_ARM_AT91SAM7X512
00168     #define FLASH_MEM_SIZE          0x80000UL ///< Internal flash memory size
00169     #define FLASH_PAGE_SIZE_BYTES         256 ///< Size of cpu flash memory page in bytes
00170     #define FLASH_BANKS_NUM                 2 ///< Number of flash banks
00171     #define FLASH_SECTORS_NUM              32 ///< Number of flash sector
00172     #define FLASH_PAGE_PER_SECTOR          64 ///< Number of page for sector
00173
00174 #else
00175     #error Memory size definition for selected ARM CPU
00176 #endif
00177
00178 #include "at91_aic.h"
00179 #include "at91_pit.h"
00180 #include "at91_pmc.h"
00181 #include "at91_mc.h"
00182 #include "at91_wdt.h"
00183 #include "at91_rstc.h"
00184 #include "at91_pio.h"
00185 #include "at91_us.h"
00186 #include "at91_dbgu.h"
00187 #include "at91_tc.h"
00188 #include "at91_adc.h"
00189 #include "at91_pwm.h"
00190 #include "at91_spi.h"
00191 #include "at91_twi.h"
00192 #include "at91_ssc.h"
00193 #include "at91_emac.h"
00194 //TODO: add other peripherals
00195
00200 #if CPU_ARM_SAM7X || CPU_ARM_SAM7S_LARGE
00201     #define FIQ_ID      0       ///< Fast interrupt ID.
00202     #define SYSC_ID     1       ///< System controller interrupt.
00203     #define US0_ID      6       ///< USART 0 ID.
00204     #define US1_ID      7       ///< USART 1 ID.
00205     #define SSC_ID      8       ///< Synchronous serial controller ID.
00206     #define TWI_ID      9       ///< Two-wire interface ID.
00207     #define PWMC_ID     10      ///< PWM controller ID.
00208     #define UDP_ID      11      ///< USB device port ID.
00209     #define TC0_ID      12      ///< Timer 0 ID.
00210     #define TC1_ID      13      ///< Timer 1 ID.
00211     #define TC2_ID      14      ///< Timer 2 ID.
00212
00213     #define IRQ0_ID     30      ///< External interrupt 0 ID.
00214     #define IRQ1_ID     31      ///< External interrupt 1 ID.
00215
00216     #if CPU_ARM_SAM7X
00217         #define PIOA_ID     2       ///< Parallel A I/O controller ID.
00218         #define PIOB_ID     3       ///< Parallel B I/O controller ID.
00219         #define SPI0_ID     4       ///< Serial peripheral interface 0 ID.
00220         #define SPI1_ID     5       ///< Serial peripheral interface 1 ID.
00221         #define CAN_ID      15      ///< CAN controller ID.
00222         #define EMAC_ID     16      ///< Ethernet MAC ID.
00223         #define ADC_ID      17      ///< Analog to digital converter ID.
00224         /* 18-29 Reserved */
00225
00226     #endif
00227
00228     #if CPU_ARM_SAM7S_LARGE
00229         #define PIOA_ID     2       ///< Parallel I/O controller ID.
00230         /* ID 3 is reserved */
00231         #define ADC_ID      4       ///< Analog to digital converter ID.
00232         #define SPI_ID      5       ///< Serial peripheral interface ID.
00233         #define SPI0_ID     SPI_ID  ///< Alias
00234     #endif
00235
00236 #else
00237     #error No peripheral ID and interrupts definition for selected ARM CPU
00238
00239 #endif
00240 /*\}*/
00241
00246 #if CPU_ARM_SAM7S_LARGE
00247     #define RXD0        5
00248     #define TXD0        6
00249     #define RXD1       21
00250     #define TXD1       22
00251     #define DTXD       10
00252     #define DRXD        9
00253 #elif CPU_ARM_SAM7X
00254     #define RXD0        0 // PA0
00255     #define TXD0        1 // PA1
00256     #define RXD1        5 // PA5
00257     #define TXD1        6 // PA6
00258     #define DTXD       28 // PA28
00259     #define DRXD       27 // PA27
00260 #else
00261     #error No USART & debug pin names definition for selected ARM CPU
00262 #endif
00263 /*\}*/
00264
00269 #if CPU_ARM_SAM7S_LARGE
00270     #define SPI0_NPCS0      11  // Same as NSS pin.
00271     #define SPI0_MISO       12
00272     #define SPI0_MOSI       13
00273     #define SPI0_SPCK       14
00274
00275 #elif CPU_ARM_SAM7X
00276     #define SPI0_NPCS0  12 // Same as NSS pin. PA12
00277     #define SPI0_NPCS1  13 // PA13
00278     #define SPI0_NPCS2  14 // PA14
00279     #define SPI0_NPCS3  15 // PA15
00280     #define SPI0_MISO   16 // PA16
00281     #define SPI0_MOSI   17 // PA17
00282     #define SPI0_SPCK   18 // PA18
00283
00284     #define SPI1_NPCS0  21 // Same as NSS pin. PA21
00285     #define SPI1_NPCS1  25 // PA25
00286     #define SPI1_NPCS2  26 // PA26
00287     #define SPI1_NPCS3  29 // PA29
00288     #define SPI1_MISO   24 // PA24
00289     #define SPI1_MOSI   23 // PA23
00290     #define SPI1_SPCK   22 // PA22
00291
00292 #else
00293     #error No SPI pins name definition for selected ARM CPU
00294
00295 #endif
00296 /*\}*/
00297
00302 #if CPU_ARM_SAM7S_LARGE
00303
00304     #define SSC_TF     15 // PA15
00305     #define SSC_TK     16 // PA16
00306     #define SSC_TD     17 // PA17
00307     #define SSC_RD     18 // PA18
00308     #define SSC_RK     19 // PA19
00309     #define SSC_RF     20 // PA20
00310
00311 #elif CPU_ARM_SAM7X
00312
00313     #define SSC_TF     21 // PA21
00314     #define SSC_TK     22 // PA22
00315     #define SSC_TD     23 // PA23
00316     #define SSC_RD     24 // PA24
00317     #define SSC_RK     25 // PA25
00318     #define SSC_RF     26 // PA26
00319
00320 #else
00321     #error No SSC pins name definition for selected ARM CPU
00322
00323 #endif
00324 /*\}*/
00325
00330 #if CPU_ARM_SAM7X
00331     #define TIOA0  23 // PB23
00332     #define TIOB0  24 // PB24
00333     #define TIOA1  25 // PB25
00334     #define TIOB1  26 // PB26
00335     #define TIOA2  27 // PB27
00336     #define TIOB2  28 // PB28
00337
00338     #define TIO_PIO_PDR     PIOB_PDR
00339     #define TIO_PIO_ABSR    PIOB_ASR
00340
00341 #elif CPU_ARM_SAM7S_LARGE
00342     #define TIOA0  0 // PA0
00343     #define TIOB0  1 // PA1
00344     #define TIOA1  15 // PA15
00345     #define TIOB1  16 // PA16
00346     #define TIOA2  26 // PA26
00347     #define TIOB2  27 // PA27
00348
00349     #define TIO_PIO_PDR     PIOA_PDR
00350     #define TIO_PIO_ABSR    PIOA_BSR
00351
00352 #else
00353     #error No Timer Counter names of pins definition for selected ARM CPU
00354
00355 #endif
00356 /*\}*/
00357
00358
00363 #if CPU_ARM_SAM7X
00364     #define PWM0  19 // PB19
00365     #define PWM1  20 // PB20
00366     #define PWM2  21 // PB21
00367     #define PWM3  22 // PB22
00368
00369     #define PWM_PIO_PDR     PIOB_PDR
00370     #define PWM_PIO_PER     PIOB_PER
00371     #define PWM_PIO_CODR    PIOB_CODR
00372     #define PWM_PIO_OER     PIOB_OER
00373     #define PWM_PIO_ABSR    PIOB_ASR
00374
00375 #elif CPU_ARM_SAM7S_LARGE
00376     #define PWM0  11 // PA11
00377     #define PWM1  12 // PA12
00378     #define PWM2  13 // PA13
00379     #define PWM3  14 // PA14
00380
00381     #define PWM_PIO_PDR     PIOA_PDR
00382     #define PWM_PIO_PER     PIOA_PER
00383     #define PWM_PIO_CODR    PIOA_CODR
00384     #define PWM_PIO_OER     PIOA_OER
00385     #define PWM_PIO_ABSR    PIOA_BSR
00386
00387 #else
00388     #error No PWM names of pins definition for selected ARM CPU
00389
00390 #endif
00391 /*\}*/
00392
00397 #if CPU_ARM_SAM7X
00398     #define TWD  10
00399     #define TWCK 11
00400
00401 #elif CPU_ARM_SAM7S_LARGE
00402     #define TWD  3    //PA3
00403     #define TWCK 4    //PA4
00404
00405 #else
00406     #error No TWI names of pins definition for selected ARM CPU
00407 #endif
00408
00413 #if CPU_ARM_SAM7X
00414     #define ADTRG   18 // PB18
00415     #define AD0     23 // PB27
00416     #define AD1     24 // PB28
00417     #define AD2     25 // PB29
00418     #define AD3     26 // PB30
00419
00420 #elif CPU_ARM_SAM7S_LARGE
00421     #define ADTRG   18 // PA8
00422     #define AD0      0 // PA17
00423     #define AD1      1 // PA18
00424     #define AD2     15 // PA19
00425     #define AD3     16 // PA20
00426
00427 #else
00428     #error No ADC names of pins definition for selected ARM CPU
00429
00430 #endif
00431 /*\}*/
00432
00433 #endif /* AT91SAM7_H */


BeRTOS: attr.h File Reference

  • cpu
Defines
attr.h File Reference

CPU-specific attributes. More...

#include "detect.h"
#include "cfg/cfg_proc.h"
#include "cfg/cfg_attr.h"

Go to the source code of this file.

Defines

#define | CPU_HEADER(module) PP_STRINGIZE(drv/PP_CAT3(module, _, CPU_ID).h)
Macro to include cpu-specific versions of the headers.
#define | CPU_CSOURCE(module) PP_STRINGIZE(drv/PP_CAT3(module, _, CPU_ID).c)
Macro to include cpu-specific versions of implementation files.
#define | FAST_FUNC
Function attribute for use with performance critical code.
#define | FAST_RODATA
Data attribute to move constant data to fast memory storage.
#define | PAUSE do {NOP; MEMORY_BARRIER;} while (0)
Generic PAUSE implementation.
Macros for determining CPU endianness.
#define | CPU_BIG_ENDIAN 0x1234
#define | CPU_LITTLE_ENDIAN 0x3412

Detailed Description

CPU-specific attributes.

Author:
Giovanni Bajo <rasky@develer.com>
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>
Francesco Sacchi <batt@develer.com>

Definition in file attr.h.

Define Documentation

#define CPU_CSOURCE ( module ) PP_STRINGIZE(drv/PP_CAT3(module, _, CPU_ID).c)

Macro to include cpu-specific versions of implementation files.

Definition at line 61 of file attr.h.

#define CPU_HEADER ( module ) PP_STRINGIZE(drv/PP_CAT3(module, _, CPU_ID).h)

Macro to include cpu-specific versions of the headers.

Definition at line 58 of file attr.h.


BeRTOS: attr.h Source File

  • cpu
attr.h
Go to the documentation of this file.
00001
00040 #ifndef CPU_ATTR_H
00041 #define CPU_ATTR_H
00042
00043 #include "detect.h"
00044
00045 #include "cfg/cfg_proc.h"      /* CONFIG_KERN_PREEMPT */
00046 #include "cfg/cfg_attr.h"      /* CONFIG_FAST_MEM */
00047
00048
00053 #define CPU_BIG_ENDIAN    0x1234
00054 #define CPU_LITTLE_ENDIAN 0x3412 /* Look twice, pal. This is not a bug. */
00055 /*\}*/
00056
00058 #define CPU_HEADER(module)          PP_STRINGIZE(drv/PP_CAT3(module, _, CPU_ID).h)
00059
00061 #define CPU_CSOURCE(module)         PP_STRINGIZE(drv/PP_CAT3(module, _, CPU_ID).c)
00062
00063
00064 #if CPU_I196
00065
00066     #define NOP                     nop_instruction()
00067
00068     #define CPU_REG_BITS            16
00069     #define CPU_REGS_CNT            16
00070     #define CPU_BYTE_ORDER          CPU_LITTLE_ENDIAN
00071     #define CPU_HARVARD             0
00072
00074     #define CPU_RAM_START       0x100
00075
00076 #elif CPU_X86
00077
00078     #define CPU_REGS_CNT            7
00079     #define CPU_BYTE_ORDER          CPU_LITTLE_ENDIAN
00080     #define CPU_HARVARD             0
00081
00082     #if CPU_X86_64
00083         #define CPU_REG_BITS    64
00084
00085         #ifdef __WIN64__
00086             /* WIN64 is an IL32-P64 weirdo. */
00087             #define SIZEOF_LONG  4
00088         #endif
00089     #else
00090         #define CPU_REG_BITS    32
00091     #endif
00092
00094     #define CPU_RAM_START      0x1000
00095
00096     #ifdef __GNUC__
00097         #define NOP         asm volatile ("nop")
00098         /* This is a good thing to insert into busy-wait loops. */
00099         #define PAUSE       asm volatile ("rep; nop" ::: "memory")
00100         #define BREAKPOINT  asm volatile ("int3" ::)
00101     #endif
00102
00103 #elif CPU_ARM
00104
00105     #define CPU_REG_BITS           32
00106     #define CPU_REGS_CNT           16
00107     #define CPU_HARVARD            0
00108
00110     #if CPU_ARM_AT91
00111         #define CPU_RAM_START       0x00200000
00112     #elif CPU_ARM_LPC2
00113         #define CPU_RAM_START       0x40000000
00114     #else
00115         #warning Fix CPU_RAM_START address for your ARM, default value set to 0x200
00116         #define CPU_RAM_START       0x200
00117     #endif
00118
00119     #ifdef __IAR_SYSTEMS_ICC__
00120         #warning Check CPU_BYTE_ORDER
00121         #define CPU_BYTE_ORDER (__BIG_ENDIAN__ ? CPU_BIG_ENDIAN : CPU_LITTLE_ENDIAN)
00122
00123         #define NOP            __no_operation()
00124
00125     #else /* GCC and compatibles */
00126
00127         #if defined(__ARMEB__)
00128             #define CPU_BYTE_ORDER CPU_BIG_ENDIAN
00129         #elif defined(__ARMEL__)
00130             #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
00131         #else
00132             #error Unable to detect ARM endianness!
00133         #endif
00134
00135         #define NOP            asm volatile ("mov r0,r0" ::)
00136         #define BREAKPOINT  /* asm("bkpt 0") DOES NOT WORK */
00137
00138         #if CONFIG_FAST_MEM
00139
00147             #define FAST_FUNC __attribute__((section(".ramfunc")))
00148
00154             #define FAST_RODATA __attribute__((section(".data")))
00155
00156         #else // !CONFIG_FAST_MEM
00157             #define FAST_RODATA
00158             #define FAST_FUNC
00159         #endif
00160
00161         /*
00162          * Function attribute to move it into ram memory.
00163          */
00164         #define RAM_FUNC __attribute__((section(".ramfunc")))
00165
00166     #endif /* !__IAR_SYSTEMS_ICC_ */
00167 #elif CPU_CM3
00168
00169     #define CPU_REG_BITS           32
00170     #define CPU_REGS_CNT           16
00171     #define CPU_HARVARD            0
00172
00174     #if (CPU_CM3_LM3S1968 || CPU_CM3_LM3S8962 || CPU_CM3_STM32 || CPU_CM3_SAM3)
00175         #define CPU_RAM_START 0x20000000
00176     #else
00177         #warning Fix CPU_RAM_START address for your Cortex-M3, default value set to 0x20000000
00178         #define CPU_RAM_START 0x20000000
00179     #endif
00180
00181     #if defined( __ICCARM__)
00182         #if ((defined __LITTLE_ENDIAN__) && (__LITTLE_ENDIAN__ == 0))
00183             #define CPU_BYTE_ORDER CPU_BIG_ENDIAN
00184         #elif ((defined __LITTLE_ENDIAN__) && (__LITTLE_ENDIAN__ == 1))
00185             #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
00186         #else
00187             #error Unable to detect Cortex-M3 endianess!
00188         #endif
00189
00190     #define NOP            __no_operation()
00191     #else
00192         #if defined(__ARMEB__) // GCC
00193             #define CPU_BYTE_ORDER CPU_BIG_ENDIAN
00194         #elif defined(__ARMEL__) // GCC
00195             #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
00196         #else
00197             #error Unable to detect Cortex-M3 endianess!
00198         #endif
00199
00200     #define NOP         asm volatile ("nop")
00201     #define PAUSE       asm volatile ("wfi" ::: "memory")
00202     #define BREAKPOINT  /* asm("bkpt 0") DOES NOT WORK */
00203
00204     /*
00205      * Function attribute to move it into ram memory.
00206      */
00207     #define RAM_FUNC __attribute__((section(".ramfunc")))
00208     #endif
00209
00210 #elif CPU_PPC
00211
00212     #define CPU_REG_BITS           (CPU_PPC32 ? 32 : 64)
00213     #define CPU_REGS_CNT           FIXME
00214     #define CPU_BYTE_ORDER         (__BIG_ENDIAN__ ? CPU_BIG_ENDIAN : CPU_LITTLE_ENDIAN)
00215     #define CPU_HARVARD            0
00216
00218     #define CPU_RAM_START          0x1000
00219
00220     #ifdef __GNUC__
00221         #define NOP         asm volatile ("nop" ::)
00222         #define BREAKPOINT  asm volatile ("twge 2,2" ::)
00223     #endif
00224
00225 #elif CPU_DSP56K
00226
00227     #define CPU_REG_BITS            16
00228     #define CPU_REGS_CNT            FIXME
00229     #define CPU_BYTE_ORDER          CPU_BIG_ENDIAN
00230     #define CPU_HARVARD             1
00231
00232     /* Memory is word-addessed in the DSP56K */
00233     #define CPU_BITS_PER_CHAR  16
00234     #define SIZEOF_SHORT        1
00235     #define SIZEOF_INT          1
00236     #define SIZEOF_LONG         2
00237     #define SIZEOF_PTR          1
00238
00240     #define CPU_RAM_START       0x200
00241
00242     #define NOP                     asm(nop)
00243     #define BREAKPOINT              asm(debug)
00244
00245 #elif CPU_AVR
00246
00247     #define NOP                     asm volatile ("nop" ::)
00248
00249     #define CPU_REG_BITS            8
00250     #define CPU_REGS_CNT           33 /* Includes SREG */
00251     #define CPU_BYTE_ORDER          CPU_LITTLE_ENDIAN
00252     #define CPU_HARVARD             1
00253
00255     #if CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 || CPU_AVR_ATMEGA103
00256         #define CPU_RAM_START       0x60
00257     #elif CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
00258         #define CPU_RAM_START       0x100
00259     #elif CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
00260         #define CPU_RAM_START       0x200
00261     #elif CPU_AVR_XMEGA_D
00262         #define CPU_RAM_START       0x2000
00263     #else
00264         #warning Fix CPU_RAM_START address for your AVR, default value set to 0x100
00265         #define CPU_RAM_START       0x100
00266     #endif
00267
00268 #elif CPU_MSP430
00269
00270     #define CPU_REG_BITS            16
00271     #define CPU_REGS_CNT            12
00272     #define CPU_BYTE_ORDER          CPU_LITTLE_ENDIAN
00273     #define CPU_HARVARD             0
00274
00276     #define CPU_RAM_START           0x200
00277
00278     #define NOP                     __asm__ __volatile__ ("nop")
00279
00280 #else
00281     #error No CPU_... defined.
00282 #endif
00283
00284 #ifndef BREAKPOINT
00285 #define BREAKPOINT /* nop */
00286 #endif
00287
00288 #ifndef FAST_FUNC
00289
00290     #define FAST_FUNC /* */
00291 #endif
00292
00293 #ifndef FAST_RODATA
00294
00295     #define FAST_RODATA /* */
00296 #endif
00297
00298 #ifndef PAUSE
00299
00300     #define PAUSE   do {NOP; MEMORY_BARRIER;} while (0)
00301 #endif
00302
00303 #endif /* CPU_ATTR_H */


BeRTOS: ax25.c File Reference

  • net
Functions
ax25.c File Reference

Simple AX25 data link layer implementation. More...

#include "ax25.h"
#include "cfg/cfg_ax25.h"
#include <algo/crc_ccitt.h>
#include <cfg/log.h>
#include <string.h>
#include <ctype.h>

Go to the source code of this file.

Functions

void | ax25_poll (AX25Ctx *ctx)
Check if there are any AX25 messages to be processed.
void | ax25_sendVia (AX25Ctx *ctx, const AX25Call *path, size_t path_len, const void *_buf, size_t len)
Send an AX25 frame on the channel through a specific path.
void | ax25_print (KFile *ch, const AX25Msg *msg)
Print a AX25 message in TNC-2 packet monitor format.
void | ax25_init (AX25Ctx *ctx, KFile *channel, ax25_callback_t hook)
Init the AX25 protocol decoder.

Detailed Description

Simple AX25 data link layer implementation.

For now, only UI frames without any Layer 3 protocol are handled. This however is enough to send/receive APRS packets.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file ax25.c.

Function Documentation

void ax25_init | ( | AX25Ctx * | ctx,
 |  | KFile * | channel,
 |  | ax25_callback_t | hook
 | ) |  |

Init the AX25 protocol decoder.

Parameters:
ctx | AX25 context to init.
channel | Used to gain access to the physical medium
hook | Callback function called when a message is received

Definition at line 320 of file ax25.c.

void ax25_poll ( AX25Ctx * ctx )

Check if there are any AX25 messages to be processed.

This function read available characters from the medium and search for any AX25 messages. If a message is found it is decoded and the linked callback executed. This function may be blocking if there are no available chars and the KFile used in ctx to access the medium is configured in blocking mode.

Parameters:
ctx AX25 context to operate on.

Definition at line 141 of file ax25.c.

void ax25_print | ( | KFile * | ch,
 |  | const AX25Msg * | msg
 | ) |  |

Print a AX25 message in TNC-2 packet monitor format.

Parameters:
ch | a kfile channel where the message will be printed.
msg | the message to be printed.

Definition at line 291 of file ax25.c.

void ax25_sendVia | ( | AX25Ctx * | ctx,
 |  | const AX25Call * | path,
 |  | size_t | path_len,
 |  | const void * | _buf,
 |  | size_t | len
 | ) |  |

Send an AX25 frame on the channel through a specific path.

Parameters:
ctx | AX25 context to operate on.
path | An array of callsigns used as path,
See also:
AX25_PATH for an handy way to create a path.
Parameters:
path_len | callsigns path lenght.
_buf | payload buffer.
len | length of the payload.

Definition at line 245 of file ax25.c.


BeRTOS: ax25.c Source File

  • net
ax25.c
Go to the documentation of this file.
00001
00041 #include "ax25.h"
00042 #include "cfg/cfg_ax25.h"
00043
00044 #include <algo/crc_ccitt.h>
00045
00046 #define LOG_LEVEL  AX25_LOG_LEVEL
00047 #define LOG_FORMAT AX25_LOG_FORMAT
00048 #include <cfg/log.h>
00049
00050 #include <string.h> //memset, memcmp
00051 #include <ctype.h>  //isalnum, toupper
00052
00053 #if CONFIG_AX25_RPT_LST
00054     #define AX25_SET_REPEATED(msg, idx, val) \
00055         do \
00056         { \
00057             if (val) \
00058                 (msg)->rpt_flags |= BV(idx) ; \
00059             else \
00060                 (msg)->rpt_flags &= ~BV(idx) ; \
00061         } while(0)
00062 #endif
00063
00064 #define DECODE_CALL(buf, addr) \
00065     for (unsigned i = 0; i < sizeof((addr)); i++) \
00066     { \
00067         char c = (*(buf)++ >> 1); \
00068         (addr)[i] = (c == ' ') ? '\x0' : c; \
00069     }
00070
00071 static void ax25_decode(AX25Ctx *ctx)
00072 {
00073     AX25Msg msg;
00074     uint8_t *buf = ctx->buf;
00075
00076     DECODE_CALL(buf, msg.dst.call);
00077     msg.dst.ssid = (*buf++ >> 1) & 0x0F;
00078
00079     DECODE_CALL(buf, msg.src.call);
00080     msg.src.ssid = (*buf >> 1) & 0x0F;
00081
00082     LOG_INFO("SRC[%.6s-%d], DST[%.6s-%d]\n", msg.src.call, msg.src.ssid, msg.dst.call, msg.dst.ssid);
00083
00084     /* Repeater addresses */
00085     #if CONFIG_AX25_RPT_LST
00086         for (msg.rpt_cnt = 0; !(*buf++ & 0x01) && (msg.rpt_cnt < countof(msg.rpt_lst)); msg.rpt_cnt++)
00087         {
00088             DECODE_CALL(buf, msg.rpt_lst[msg.rpt_cnt].call);
00089             msg.rpt_lst[msg.rpt_cnt].ssid = (*buf >> 1) & 0x0F;
00090             AX25_SET_REPEATED(&msg, msg.rpt_cnt, (*buf & 0x80));
00091
00092             LOG_INFO("RPT%d[%.6s-%d]%c\n", msg.rpt_cnt,
00093                 msg.rpt_lst[msg.rpt_cnt].call,
00094                 msg.rpt_lst[msg.rpt_cnt].ssid,
00095                 (AX25_REPEATED(&msg, msg.rpt_cnt) ? '*' : ' '));
00096         }
00097     #else
00098         while (!(*buf++ & 0x01))
00099         {
00100             char rpt[6];
00101             uint8_t ssid;
00102             DECODE_CALL(buf, rpt);
00103             ssid = (*buf >> 1) & 0x0F;
00104             LOG_INFO("RPT[%.6s-%d]\n", rpt, ssid);
00105         }
00106     #endif
00107
00108     msg.ctrl = *buf++;
00109     if (msg.ctrl != AX25_CTRL_UI)
00110     {
00111         LOG_WARN("Only UI frames are handled, got [%02X]\n", msg.ctrl);
00112         return;
00113     }
00114
00115     msg.pid = *buf++;
00116     if (msg.pid != AX25_PID_NOLAYER3)
00117     {
00118         LOG_WARN("Only frames without layer3 protocol are handled, got [%02X]\n", msg.pid);
00119         return;
00120     }
00121
00122     msg.len = ctx->frm_len - 2 - (buf - ctx->buf);
00123     msg.info = buf;
00124     LOG_INFO("DATA: %.*s\n", msg.len, msg.info);
00125
00126     if (ctx->hook)
00127         ctx->hook(&msg);
00128 }
00129
00130
00141 void ax25_poll(AX25Ctx *ctx)
00142 {
00143     int c;
00144
00145     while ((c = kfile_getc(ctx->ch)) != EOF)
00146     {
00147         if (!ctx->escape && c == HDLC_FLAG)
00148         {
00149             if (ctx->frm_len >= AX25_MIN_FRAME_LEN)
00150             {
00151                 if (ctx->crc_in == AX25_CRC_CORRECT)
00152                 {
00153                     LOG_INFO("Frame found!\n");
00154                     ax25_decode(ctx);
00155                 }
00156                 else
00157                 {
00158                     LOG_INFO("CRC error, computed [%04X]\n", ctx->crc_in);
00159                 }
00160             }
00161             ctx->sync = true;
00162             ctx->crc_in = CRC_CCITT_INIT_VAL;
00163             ctx->frm_len = 0;
00164             continue;
00165         }
00166
00167         if (!ctx->escape && c == HDLC_RESET)
00168         {
00169             LOG_INFO("HDLC reset\n");
00170             ctx->sync = false;
00171             continue;
00172         }
00173
00174         if (!ctx->escape && c == AX25_ESC)
00175         {
00176             ctx->escape = true;
00177             continue;
00178         }
00179
00180         if (ctx->sync)
00181         {
00182             if (ctx->frm_len < CONFIG_AX25_FRAME_BUF_LEN)
00183             {
00184                 ctx->buf[ctx->frm_len++] = c;
00185                 ctx->crc_in = updcrc_ccitt(c, ctx->crc_in);
00186             }
00187             else
00188             {
00189                 LOG_INFO("Buffer overrun");
00190                 ctx->sync = false;
00191             }
00192         }
00193         ctx->escape = false;
00194     }
00195
00196     if (kfile_error(ctx->ch))
00197     {
00198         LOG_ERR("Channel error [%04x]\n", kfile_error(ctx->ch));
00199         kfile_clearerr(ctx->ch);
00200     }
00201 }
00202
00203 static void ax25_putchar(AX25Ctx *ctx, uint8_t c)
00204 {
00205     if (c == HDLC_FLAG || c == HDLC_RESET
00206         || c == AX25_ESC)
00207         kfile_putc(AX25_ESC, ctx->ch);
00208     ctx->crc_out = updcrc_ccitt(c, ctx->crc_out);
00209     kfile_putc(c, ctx->ch);
00210 }
00211
00212 static void ax25_sendCall(AX25Ctx *ctx, const AX25Call *addr, bool last)
00213 {
00214     unsigned len = MIN(sizeof(addr->call), strlen(addr->call));
00215
00216     for (unsigned i = 0; i < len; i++)
00217     {
00218         uint8_t c = addr->call[i];
00219         ASSERT(isalnum(c) || c == ' ');
00220         c = toupper(c);
00221         ax25_putchar(ctx, c << 1);
00222     }
00223
00224     /* Fill with spaces the rest of the CALL if it's shorter */
00225     if (len < sizeof(addr->call))
00226         for (unsigned i = 0; i < sizeof(addr->call) - len; i++)
00227             ax25_putchar(ctx, ' ' << 1);
00228
00229     /* The bit7 "has-been-repeated" flag is not implemented here */
00230     /* Bits6:5 should be set to 1 for all SSIDs (0x60) */
00231     /* The bit0 of last call SSID should be set to 1 */
00232     uint8_t ssid = 0x60 | (addr->ssid << 1) | (last ? 0x01 : 0);
00233     ax25_putchar(ctx, ssid);
00234 }
00235
00245 void ax25_sendVia(AX25Ctx *ctx, const AX25Call *path, size_t path_len, const void *_buf, size_t len)
00246 {
00247     const uint8_t *buf = (const uint8_t *)_buf;
00248     ASSERT(path);
00249     ASSERT(path_len >= 2);
00250
00251     ctx->crc_out = CRC_CCITT_INIT_VAL;
00252     kfile_putc(HDLC_FLAG, ctx->ch);
00253
00254
00255     /* Send call */
00256     for (size_t i = 0; i < path_len; i++)
00257         ax25_sendCall(ctx, &path[i], (i == path_len - 1));
00258
00259     ax25_putchar(ctx, AX25_CTRL_UI);
00260     ax25_putchar(ctx, AX25_PID_NOLAYER3);
00261
00262     while (len--)
00263         ax25_putchar(ctx, *buf++);
00264
00265     /*
00266      * According to AX25 protocol,
00267      * CRC is sent in reverse order!
00268      */
00269     uint8_t crcl = (ctx->crc_out & 0xff) ^ 0xff;
00270     uint8_t crch = (ctx->crc_out >> 8) ^ 0xff;
00271     ax25_putchar(ctx, crcl);
00272     ax25_putchar(ctx, crch);
00273
00274     ASSERT(ctx->crc_out == AX25_CRC_CORRECT);
00275
00276     kfile_putc(HDLC_FLAG, ctx->ch);
00277 }
00278
00279 static void print_call(KFile *ch, const AX25Call *call)
00280 {
00281     kfile_printf(ch, "%.6s", call->call);
00282     if (call->ssid)
00283         kfile_printf(ch, "-%d", call->ssid);
00284 }
00285
00291 void ax25_print(KFile *ch, const AX25Msg *msg)
00292 {
00293     print_call(ch, &msg->src);
00294     kfile_putc('>', ch);
00295     print_call(ch, &msg->dst);
00296
00297     #if CONFIG_AX25_RPT_LST
00298     for (int i = 0; i < msg->rpt_cnt; i++)
00299     {
00300         kfile_putc(',', ch);
00301         print_call(ch, &msg->rpt_lst[i]);
00302         /* Print a '*' if packet has already been transmitted
00303          * by this repeater */
00304         if (AX25_REPEATED(msg, i))
00305             kfile_putc('*', ch);
00306     }
00307     #endif
00308
00309     kfile_printf(ch, ":%.*s\n", msg->len, msg->info);
00310 }
00311
00312
00320 void ax25_init(AX25Ctx *ctx, KFile *channel, ax25_callback_t hook)
00321 {
00322     ASSERT(ctx);
00323     ASSERT(channel);
00324
00325     memset(ctx, 0, sizeof(*ctx));
00326     ctx->ch = channel;
00327     ctx->hook = hook;
00328     ctx->crc_in = ctx->crc_out = CRC_CCITT_INIT_VAL;
00329 }


BeRTOS: ax25.h File Reference

  • net
Data Structures | Defines | Typedefs | Functions
ax25.h File Reference

Simple AX25 data link layer implementation. More...

#include "cfg/cfg_ax25.h"
#include <cfg/compiler.h>
#include <io/kfile.h>

Go to the source code of this file.

Data Structures

struct | AX25Ctx
AX25 Protocol context. More...
struct | AX25Call
AX25 Call sign. More...
struct | AX25Msg
AX25 Message. More...

Defines

#define | AX25_MIN_FRAME_LEN 18
Maximum size of a AX25 frame.
#define | AX25_CRC_CORRECT 0xF0B8
CRC computation on correct AX25 packets should give this result (don't ask why).
#define | AX25_CALL(str, id) {.call = (str), .ssid = (id) }
Create an AX25Call structure on the fly.
#define | AX25_MAX_RPT 8
Maximum number of Repeaters in a AX25 message.
#define | AX25_PATH(dst, src,...) { dst, src, ## __VA_ARGS__ }
Declare an AX25 path.
#define | ax25_send(ctx, dst, src, buf, len) ax25_sendVia(ctx, ({static AX25Call __path[]={dst, src}; __path;}), 2, buf, len)
Send an AX25 frame on the channel.
HDLC flags.

These should be moved in a separated HDLC related file one day...

#define | HDLC_FLAG 0x7E
#define | HDLC_RESET 0x7F
#define | AX25_ESC 0x1B

Typedefs

typedef void(* | ax25_callback_t )(struct AX25Msg *msg)
Type for AX25 messages callback.

Functions

void | ax25_poll (AX25Ctx *ctx)
Check if there are any AX25 messages to be processed.
void | ax25_sendVia (AX25Ctx *ctx, const AX25Call *path, size_t path_len, const void *_buf, size_t len)
Send an AX25 frame on the channel through a specific path.
void | ax25_init (AX25Ctx *ctx, KFile *channel, ax25_callback_t hook)
Init the AX25 protocol decoder.
void | ax25_print (KFile *ch, const AX25Msg *msg)
Print a AX25 message in TNC-2 packet monitor format.

Detailed Description

Simple AX25 data link layer implementation.

For now, only UI frames without any Layer 3 protocol are handled. This however is enough to send/receive APRS packets.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file ax25.h.

Define Documentation

#define AX25_CALL | ( | str,
 |  | id
 | ) | {.call = (str), .ssid = (id) }

Create an AX25Call structure on the fly.

Parameters:
str | callsign, can be 6 characters or shorter.
id | ssid associated with the callsign.

Definition at line 102 of file ax25.h.

#define AX25_PATH | ( | dst,
 |  | src,
 |  | ...
 | ) | { dst, src, ## __VA_ARGS__ }

Declare an AX25 path.

Parameters:
dst the destination callsign for the path,
See also:
AX25_CALL for a handy way to create a callsign on the fly.
Parameters:
src the source callsign for the path,
See also:
AX25_CALL for a handy way to create a callsign on the fly.

Additional optional callsigns can be specified at the end of this macro in order to add repeater callsigns or specific unproto paths.

This macro can be used to simply path array declaration. Should be used in this way:

 AX25Call path[] = AX25_PATH(AX25_CALL("abcdef", 0), AX25_CALL("ghjklm", 0), AX25_CALL("wide1", 1), AX25_CALL("wide2", 2));

The declared path can then be passed to ax25_sendVia().

Definition at line 169 of file ax25.h.

#define ax25_send | ( | ctx,
 |  | dst,
 |  | src,
 |  | buf,
 |  | len
 | ) | ax25_sendVia(ctx, ({static AX25Call __path[]={dst, src}; __path;}), 2, buf, len)

Send an AX25 frame on the channel.

Parameters:
ctx | AX25 context to operate on.
dst | the destination callsign for the frame,
See also:
AX25_CALL for a handy way to create a callsign on the fly.
Parameters:
src the source callsign for the frame,
See also:
AX25_CALL for a handy way to create a callsign on the fly.
Parameters:
buf | payload buffer.
len | length of the payload.
See also:
ax25_sendVia() if you want to send a frame with a specific path.

Definition at line 186 of file ax25.h.

Function Documentation

void ax25_init | ( | AX25Ctx * | ctx,
 |  | KFile * | channel,
 |  | ax25_callback_t | hook
 | ) |  |

Init the AX25 protocol decoder.

Parameters:
ctx | AX25 context to init.
channel | Used to gain access to the physical medium
hook | Callback function called when a message is received

Definition at line 320 of file ax25.c.

void ax25_poll ( AX25Ctx * ctx )

Check if there are any AX25 messages to be processed.

This function read available characters from the medium and search for any AX25 messages. If a message is found it is decoded and the linked callback executed. This function may be blocking if there are no available chars and the KFile used in ctx to access the medium is configured in blocking mode.

Parameters:
ctx AX25 context to operate on.

Definition at line 141 of file ax25.c.

void ax25_print | ( | KFile * | ch,
 |  | const AX25Msg * | msg
 | ) |  |

Print a AX25 message in TNC-2 packet monitor format.

Parameters:
ch | a kfile channel where the message will be printed.
msg | the message to be printed.

Definition at line 291 of file ax25.c.

void ax25_sendVia | ( | AX25Ctx * | ctx,
 |  | const AX25Call * | path,
 |  | size_t | path_len,
 |  | const void * | _buf,
 |  | size_t | len
 | ) |  |

Send an AX25 frame on the channel through a specific path.

Parameters:
ctx | AX25 context to operate on.
path | An array of callsigns used as path,
See also:
AX25_PATH for an handy way to create a path.
Parameters:
path_len | callsigns path lenght.
_buf | payload buffer.
len | length of the payload.

Definition at line 245 of file ax25.c.


BeRTOS: ax25.h Source File

  • net
ax25.h
Go to the documentation of this file.
00001
00045 #ifndef NET_AX25_H
00046 #define NET_AX25_H
00047
00048 #include "cfg/cfg_ax25.h"
00049
00050 #include <cfg/compiler.h>
00051 #include <io/kfile.h>
00052
00056 #define AX25_MIN_FRAME_LEN 18
00057
00062 #define AX25_CRC_CORRECT 0xF0B8
00063
00064 struct AX25Msg; // fwd declaration
00065
00069 typedef void (*ax25_callback_t)(struct AX25Msg *msg);
00070
00071
00075 typedef struct AX25Ctx
00076 {
00077     uint8_t buf[CONFIG_AX25_FRAME_BUF_LEN];
00078     KFile *ch;
00079     size_t frm_len;
00080     uint16_t crc_in;
00081     uint16_t crc_out;
00082     ax25_callback_t hook;
00083     bool sync;
00084     bool escape;
00085 } AX25Ctx;
00086
00087
00091 typedef struct AX25Call
00092 {
00093     char call[6];
00094     uint8_t ssid;
00095 } AX25Call;
00096
00102 #define AX25_CALL(str, id) {.call = (str), .ssid = (id) }
00103
00107 #define AX25_MAX_RPT 8
00108
00109 /*
00110  * Has to be lesser than 8 in order to fit in one byte
00111  * change AX25Msg.rpt_flags if you need more repeaters.
00112  */
00113 STATIC_ASSERT(AX25_MAX_RPT <= 8);
00114
00119 typedef struct AX25Msg
00120 {
00121     AX25Call src;
00122     AX25Call dst;
00123     #if CONFIG_AX25_RPT_LST
00124     AX25Call rpt_lst[AX25_MAX_RPT];
00125     uint8_t rpt_cnt;
00126     uint8_t rpt_flags;
00127     #define AX25_REPEATED(msg, idx) ((msg)->rpt_flags & BV(idx))
00128     #endif
00129     uint16_t ctrl;
00130     uint8_t pid;
00131     const uint8_t *info;
00132     size_t len;
00133 } AX25Msg;
00134
00135
00136 #define AX25_CTRL_UI      0x03
00137 #define AX25_PID_NOLAYER3 0xF0
00138
00145 #define HDLC_FLAG  0x7E
00146 #define HDLC_RESET 0x7F
00147 #define AX25_ESC   0x1B
00148 /* \} */
00149
00150
00169 #define AX25_PATH(dst, src, ...) { dst, src, ## __VA_ARGS__ }
00170
00171 void ax25_poll(AX25Ctx *ctx);
00172 void ax25_sendVia(AX25Ctx *ctx, const AX25Call *path, size_t path_len, const void *_buf, size_t len);
00173
00186 #define ax25_send(ctx, dst, src, buf, len) ax25_sendVia(ctx, ({static AX25Call __path[]={dst, src}; __path;}), 2, buf, len)
00187 void ax25_init(AX25Ctx *ctx, KFile *channel, ax25_callback_t hook);
00188
00189 void ax25_print(KFile *ch, const AX25Msg *msg);
00190
00191 int ax25_testSetup(void);
00192 int ax25_testTearDown(void);
00193 int ax25_testRun(void);
00194
00195 #endif /* NET_AX25_H */


BeRTOS: battfs.c File Reference

  • fs
Functions
battfs.c File Reference

BattFS: a filesystem for embedded platforms (implementation). More...

#include "battfs.h"
#include "cfg/cfg_battfs.h"
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cfg/test.h>
#include <cpu/byteorder.h>
#include <cfg/log.h>
#include <string.h>

Go to the source code of this file.

Functions

void | battfs_to_disk (struct BattFsPageHeader *hdr, uint8_t *buf)
Convert from memory representation to disk structure.
void | disk_to_battfs (uint8_t *buf, struct BattFsPageHeader *hdr)
Convert from disk structure to memory representation.
static fcs_t | computeFcs (struct BattFsPageHeader *hdr)
Compute the fcs of the header.
static bool | readHdr (struct BattFsSuper *disk, pgcnt_t page, struct BattFsPageHeader *hdr)
Read header of page in hdr.
static pgcnt_t | countPages (pgoff_t *filelen_table, inode_t inode)
Count the number of pages from inode 0 to inode in filelen_table.
static void | movePages (struct BattFsSuper *disk, pgcnt_t src, int offset)
Move all pages in page allocation array from src to src + offset.
static bool | countDiskFilePages (struct BattFsSuper *disk, pgoff_t *filelen_table)
Count number of pages per file on disk.
static bool | fillPageArray (struct BattFsSuper *disk, pgoff_t *filelen_table)
Fill page allocation array of disk using file lenghts in filelen_table.
bool | battfs_mount (struct BattFsSuper *disk, struct KBlock *dev, pgcnt_t *page_array, size_t array_size)
Initialize and mount disk described by disk.
bool | battfs_fsck (struct BattFsSuper *disk)
Check the filesystem.
static int | battfs_flush (struct KFile *fd)
Flush file fd.
static int | battfs_fileclose (struct KFile *fd)
Close file fd.
static size_t | battfs_write (struct KFile *fd, const void *_buf, size_t size)
Write to file fd size bytes from buf.
static size_t | battfs_read (struct KFile *fd, void *_buf, size_t size)
Read from file fd size bytes in buf.
static bool | findFile (BattFsSuper *disk, inode_t inode, pgcnt_t *last)
Search file inode in disk using a binary search.
bool | battfs_fileExists (BattFsSuper *disk, inode_t inode)
static file_size_t | countFileSize (BattFsSuper *disk, pgcnt_t *start, inode_t inode)
Count size of file inode on disk, starting at pointer start in disk->page_array.
bool | battfs_fileopen (BattFsSuper *disk, BattFs *fd, inode_t inode, filemode_t mode)
Open file inode from disk in mode.
bool | battfs_umount (struct BattFsSuper *disk)
Umount disk.

Detailed Description

BattFS: a filesystem for embedded platforms (implementation).

Author:
Francesco Sacchi <batt@develer.com>

Definition in file battfs.c.

Function Documentation

static int battfs_fileclose ( struct KFile * fd ) [static]

Close file fd.

Returns:
0 if ok, EOF on errors.

Definition at line 500 of file battfs.c.

bool battfs_fileExists | ( | BattFsSuper * | disk,
 |  | inode_t | inode
 | ) |  |
Returns:
true if file inode exists on disk, false otherwise.

Definition at line 860 of file battfs.c.

bool battfs_fileopen | ( | BattFsSuper * | disk,
 |  | BattFs * | fd,
 |  | inode_t | inode,
 |  | filemode_t | mode
 | ) |  |

Open file inode from disk in mode.

File context is stored in fd.

Returns:
true if ok, false otherwise.

Definition at line 906 of file battfs.c.

static int battfs_flush ( struct KFile * fd ) [static]

Flush file fd.

Returns:
0 if ok, EOF on errors.

Definition at line 483 of file battfs.c.

bool battfs_fsck ( struct BattFsSuper * disk )

Check the filesystem.

Returns:
true if ok, false on errors.

Definition at line 425 of file battfs.c.

bool battfs_mount | ( | struct BattFsSuper * | disk,
 |  | struct KBlock * | dev,
 |  | pgcnt_t * | page_array,
 |  | size_t | array_size
 | ) |  |

Initialize and mount disk described by disk.

Returns:
false on errors, true otherwise.

Definition at line 364 of file battfs.c.

static size_t battfs_read | ( | struct KFile * | fd,
 |  | void * | _buf,
 |  | size_t | size
 | ) |  | [static]

Read from file fd size bytes in buf.

Returns:
The number of bytes read.

Definition at line 771 of file battfs.c.

void battfs_to_disk | ( | struct BattFsPageHeader * | hdr,
 |  | uint8_t * | buf
 | ) |  | [inline]

Convert from memory representation to disk structure.

Note:
filesystem is in little-endian format.

Definition at line 71 of file battfs.c.

static size_t battfs_write | ( | struct KFile * | fd,
 |  | const void * | _buf,
 |  | size_t | size
 | ) |  | [static]

Write to file fd size bytes from buf.

Returns:
The number of bytes written.

Definition at line 565 of file battfs.c.

static bool countDiskFilePages | ( | struct BattFsSuper * | disk,
 |  | pgoff_t * | filelen_table
 | ) |  | [static]

Count number of pages per file on disk.

This information is registered in filelen_table. Array index represent file inode, while value contained is the number of pages used by that file.

Returns:
true if ok, false on disk read errors.
Note:
The whole disk is scanned once.

Definition at line 221 of file battfs.c.

static file_size_t countFileSize | ( | BattFsSuper * | disk,
 |  | pgcnt_t * | start,
 |  | inode_t | inode
 | ) |  | [static]

Count size of file inode on disk, starting at pointer start in disk->page_array.

Size is written in size.

Returns:
true if all s ok, false on disk read errors.

Definition at line 871 of file battfs.c.

void disk_to_battfs | ( | uint8_t * | buf,
 |  | struct BattFsPageHeader * | hdr
 | ) |  | [inline]

Convert from disk structure to memory representation.

Note:
filesystem is in little-endian format.

Definition at line 105 of file battfs.c.

static bool fillPageArray | ( | struct BattFsSuper * | disk,
 |  | pgoff_t * | filelen_table
 | ) |  | [static]

Fill page allocation array of disk using file lenghts in filelen_table.

The page allocation array is an array containings all file infos. Is ordered by file, and within each file is ordered by page offset inside file. e.g. : at page array[0] you will find page address of the first page of the first file (if present). Free blocks are allocated after the last file.

Returns:
true if ok, false on disk read errors.
Note:
The whole disk is scanned at max twice.

Definition at line 267 of file battfs.c.

static bool findFile | ( | BattFsSuper * | disk,
 |  | inode_t | inode,
 |  | pgcnt_t * | last
 | ) |  | [static]

Search file inode in disk using a binary search.

last is filled with array offset of file start in disk->page_array if file is found, otherwise last is filled with the correct insert position for creating a file with the given inode.

Returns:
true if file is found, false otherwisr.

Definition at line 827 of file battfs.c.

static void movePages | ( | struct BattFsSuper * | disk,
 |  | pgcnt_t | src,
 |  | int | offset
 | ) |  | [static]

Move all pages in page allocation array from src to src + offset.

The number of pages moved is page_count - MAX(dst, src).

Definition at line 198 of file battfs.c.

static bool readHdr | ( | struct BattFsSuper * | disk,
 |  | pgcnt_t | page,
 |  | struct BattFsPageHeader * | hdr
 | ) |  | [static]

Read header of page in hdr.

Returns:
true on success, false otherwise.

Definition at line 134 of file battfs.c.


BeRTOS: battfs.c Source File

  • fs
battfs.c
Go to the documentation of this file.
00001
00040 #include "battfs.h"
00041 #include "cfg/cfg_battfs.h"
00042 #include <cfg/debug.h>
00043 #include <cfg/macros.h> /* MIN, MAX */
00044 #include <cfg/test.h>
00045 #include <cpu/byteorder.h> /* cpu_to_xx */
00046
00047 #define LOG_LEVEL       BATTFS_LOG_LEVEL
00048 #define LOG_FORMAT      BATTFS_LOG_FORMAT
00049 #include <cfg/log.h>
00050
00051 #include <string.h> /* memset, memmove */
00052
00053 #if LOG_LEVEL >= LOG_LVL_INFO
00054 static void dumpPageArray(struct BattFsSuper *disk)
00055 {
00056     kprintf("Page array dump, free_page_start %d:", disk->free_page_start);
00057     for (pgcnt_t i = 0; i < disk->dev->blk_cnt; i++)
00058     {
00059         if (!(i % 16))
00060             kputchar('\n');
00061         kprintf("%04d ", disk->page_array[i]);
00062     }
00063     kputchar('\n');
00064 }
00065 #endif
00066
00071 INLINE void battfs_to_disk(struct BattFsPageHeader *hdr, uint8_t *buf)
00072 {
00073     STATIC_ASSERT(BATTFS_HEADER_LEN == 12);
00074     buf[0] = hdr->inode;
00075
00076     buf[1] = hdr->fill;
00077     buf[2] = hdr->fill >> 8;
00078
00079     buf[3] = hdr->pgoff;
00080     buf[4] = hdr->pgoff >> 8;
00081
00082     /*
00083      * Sequence number is 40 bits long.
00084      * No need to take care of wraparonds: the memory will die first!
00085      */
00086     buf[5] = hdr->seq;
00087     buf[6] = hdr->seq >> 8;
00088     buf[7] = hdr->seq >> 16;
00089     buf[8] = hdr->seq >> 24;
00090     buf[9] = hdr->seq >> 32;
00091
00092     /*
00093      * This field must be the last one!
00094      * This is needed because if the page is only partially
00095      * written, we can use this to detect it.
00096      */
00097     buf[10] = hdr->fcs;
00098     buf[11] = hdr->fcs >> 8;
00099 }
00100
00105 INLINE void disk_to_battfs(uint8_t *buf, struct BattFsPageHeader *hdr)
00106 {
00107     STATIC_ASSERT(BATTFS_HEADER_LEN == 12);
00108     hdr->inode = buf[0];
00109     hdr->fill = buf[2] << 8 | buf[1];
00110     hdr->pgoff = buf[4] << 8 | buf[3];
00111     hdr->seq = (seq_t)buf[9] << 32 | (seq_t)buf[8] << 24 | (seq_t)buf[7] << 16 | buf[6] << 8 | buf[5];
00112     hdr->fcs = buf[11] << 8 | buf[10];
00113 }
00114
00118 static fcs_t computeFcs(struct BattFsPageHeader *hdr)
00119 {
00120     uint8_t buf[BATTFS_HEADER_LEN];
00121     fcs_t cks;
00122
00123     battfs_to_disk(hdr, buf);
00124     rotating_init(&cks);
00125     /* fcs is at the end of whole header */
00126     rotating_update(buf, BATTFS_HEADER_LEN - sizeof(fcs_t), &cks);
00127     return cks;
00128 }
00129
00134 static bool readHdr(struct BattFsSuper *disk, pgcnt_t page, struct BattFsPageHeader *hdr)
00135 {
00136     uint8_t buf[BATTFS_HEADER_LEN];
00137
00138     /*
00139      * Read header from disk.
00140      * Header is actually a footer, and so
00141      * resides at page end.
00142      */
00143     if (kblock_read(disk->dev, page, buf, disk->data_size, BATTFS_HEADER_LEN)
00144         != BATTFS_HEADER_LEN)
00145     {
00146         LOG_ERR("page[%d]\n", page);
00147         return false;
00148     }
00149
00150     /* Fill header */
00151     disk_to_battfs(buf, hdr);
00152
00153     return true;
00154 }
00155
00156 static bool writeHdr(struct BattFsSuper *disk, pgcnt_t page, struct BattFsPageHeader *hdr)
00157 {
00158     uint8_t buf[BATTFS_HEADER_LEN];
00159
00160     #warning FIXME:refactor computeFcs to save time and stack
00161     hdr->fcs = computeFcs(hdr);
00162     /* Fill buffer */
00163     battfs_to_disk(hdr, buf);
00164
00165     /*
00166      * write header to disk.
00167      * Header is actually a footer, and so
00168      * resides at page end.
00169      */
00170     if (kblock_write(disk->dev, page, buf, disk->data_size, BATTFS_HEADER_LEN)
00171         != BATTFS_HEADER_LEN)
00172     {
00173         LOG_ERR("writing to buffer\n");
00174         return false;
00175     }
00176     return true;
00177 }
00178
00179
00184 static pgcnt_t countPages(pgoff_t *filelen_table, inode_t inode)
00185 {
00186     pgcnt_t cnt = 0;
00187
00188     for (inode_t i = 0; i < inode; i++)
00189         cnt += filelen_table[i];
00190
00191     return cnt;
00192 }
00193
00198 static void movePages(struct BattFsSuper *disk, pgcnt_t src, int offset)
00199 {
00200     pgcnt_t dst = src + offset;
00201     LOG_INFO("src %d, offset %d, size %d\n", src, offset, (unsigned int)((disk->dev->blk_cnt - MAX(dst, src)) * sizeof(pgcnt_t)));
00202     memmove(&disk->page_array[dst], &disk->page_array[src], (disk->dev->blk_cnt - MAX(dst, src)) * sizeof(pgcnt_t));
00203
00204     if (offset < 0)
00205     {
00206         /* Fill empty space in array with sentinel */
00207         for (pgcnt_t page = disk->dev->blk_cnt + offset; page < disk->dev->blk_cnt; page++)
00208             disk->page_array[page] = PAGE_UNSET_SENTINEL;
00209     }
00210 }
00211
00221 static bool countDiskFilePages(struct BattFsSuper *disk, pgoff_t *filelen_table)
00222 {
00223     BattFsPageHeader hdr;
00224     disk->free_page_start = 0;
00225
00226     /* Count the number of disk page per file */
00227     for (pgcnt_t page = 0; page < disk->dev->blk_cnt; page++)
00228     {
00229         if (!readHdr(disk, page, &hdr))
00230             return false;
00231
00232         /* Increase free space */
00233         disk->free_bytes += disk->data_size;
00234
00235         /* Check header FCS */
00236         if (hdr.fcs == computeFcs(&hdr))
00237         {
00238             ASSERT(hdr.fill <= disk->data_size);
00239
00240             /* Page is valid and is owned by a file */
00241             filelen_table[hdr.inode]++;
00242
00243             /* Keep trace of free space */
00244             disk->free_bytes -= hdr.fill;
00245             disk->free_page_start++;
00246         }
00247     }
00248     LOG_INFO("free_bytes:%ld, free_page_start:%d\n", (long)disk->free_bytes, disk->free_page_start);
00249
00250     return true;
00251 }
00252
00267 static bool fillPageArray(struct BattFsSuper *disk, pgoff_t *filelen_table)
00268 {
00269     BattFsPageHeader hdr;
00270     pgcnt_t curr_free_page = disk->free_page_start;
00271     /* Fill page allocation array */
00272     for (pgcnt_t page = 0; page < disk->dev->blk_cnt; page++)
00273     {
00274         if (!readHdr(disk, page, &hdr))
00275             return false;
00276
00277         /* Check header FCS */
00278         if (hdr.fcs == computeFcs(&hdr))
00279         {
00280             /* Compute array position */
00281             pgcnt_t array_pos = countPages(filelen_table, hdr.inode);
00282             array_pos += hdr.pgoff;
00283
00284
00285             /* Check if position is already used by another page of the same file */
00286             if (disk->page_array[array_pos] == PAGE_UNSET_SENTINEL)
00287                 disk->page_array[array_pos] = page;
00288             else
00289             {
00290                 BattFsPageHeader hdr_prv;
00291
00292                 if (!readHdr(disk, disk->page_array[array_pos], &hdr_prv))
00293                     return false;
00294
00295                 /* Check header FCS */
00296                 ASSERT(hdr_prv.fcs == computeFcs(&hdr_prv));
00297
00298                 /* Only the very same page with a different seq number can be here */
00299                 ASSERT(hdr.inode == hdr_prv.inode);
00300                 ASSERT(hdr.pgoff == hdr_prv.pgoff);
00301                 ASSERT(hdr.seq != hdr_prv.seq);
00302
00303                 pgcnt_t new_page, old_page;
00304                 fill_t old_fill;
00305
00306                 /*
00307                  * Sequence number comparison: since
00308                  * seq is 40 bits wide, it wraps once
00309                  * every 1.1E12 times.
00310                  * The memory will not live enough to
00311                  * see a wraparound, so we can use a simple
00312                  * compare here.
00313                  */
00314                 if (hdr.seq > hdr_prv.seq)
00315                 {
00316                     /* Current header is newer than the previuos one */
00317                     old_page = disk->page_array[array_pos];
00318                     new_page = page;
00319                     old_fill = hdr_prv.fill;
00320                 }
00321                 else
00322                 {
00323                     /* Previous header is newer than the current one */
00324                     old_page = page;
00325                     new_page = disk->page_array[array_pos];
00326                     old_fill = hdr.fill;
00327                 }
00328
00329                 /* Set new page */
00330                 disk->page_array[array_pos] = new_page;
00331                 /* Add free space */
00332                 disk->free_bytes += old_fill;
00333                 /* Shift all array one position to the left, overwriting duplicate page */
00334                 array_pos -= hdr.pgoff;
00335                 array_pos += filelen_table[hdr.inode];
00336                 movePages(disk, array_pos, -1);
00337                 /* Move back all indexes */
00338                 filelen_table[hdr.inode]--;
00339                 disk->free_page_start--;
00340                 curr_free_page--;
00341                 /* Set old page as free */
00342                 ASSERT(disk->page_array[curr_free_page] == PAGE_UNSET_SENTINEL);
00343                 disk->page_array[curr_free_page++] = old_page;
00344
00345             }
00346         }
00347         else
00348         {
00349             /* Invalid page, keep as free */
00350             ASSERT(disk->page_array[curr_free_page] == PAGE_UNSET_SENTINEL);
00351             //LOG_INFO("Page %d invalid, keeping as free\n", page);
00352             disk->page_array[curr_free_page++] = page;
00353         }
00354     }
00355     return true;
00356 }
00357
00358
00364 bool battfs_mount(struct BattFsSuper *disk, struct KBlock *dev, pgcnt_t *page_array, size_t array_size)
00365 {
00366     pgoff_t filelen_table[BATTFS_MAX_FILES];
00367
00368     ASSERT(dev);
00369     ASSERT(kblock_partialWrite(dev));
00370     disk->dev = dev;
00371
00372     ASSERT(disk->dev->blk_size > BATTFS_HEADER_LEN);
00373     /* Fill page_size with the usable space */
00374     disk->data_size = disk->dev->blk_size - BATTFS_HEADER_LEN;
00375     ASSERT(disk->dev->blk_cnt);
00376     ASSERT(disk->dev->blk_cnt < PAGE_UNSET_SENTINEL - 1);
00377     ASSERT(page_array);
00378     disk->page_array = page_array;
00379     ASSERT(array_size >= disk->dev->blk_cnt * sizeof(pgcnt_t));
00380
00381     memset(filelen_table, 0, BATTFS_MAX_FILES * sizeof(pgoff_t));
00382
00383     disk->free_bytes = 0;
00384     disk->disk_size = (disk_size_t)disk->data_size * disk->dev->blk_cnt;
00385
00386     /* Count pages per file */
00387     if (!countDiskFilePages(disk, filelen_table))
00388     {
00389         LOG_ERR("counting file pages\n");
00390         return false;
00391     }
00392
00393     /* Once here, we have filelen_table filled with file lengths */
00394
00395     /* Fill page array with sentinel */
00396     for (pgcnt_t page = 0; page < disk->dev->blk_cnt; page++)
00397         disk->page_array[page] = PAGE_UNSET_SENTINEL;
00398
00399     /* Fill page allocation array using filelen_table */
00400     if (!fillPageArray(disk, filelen_table))
00401     {
00402         LOG_ERR("filling page array\n");
00403         return false;
00404     }
00405     #if LOG_LEVEL >= LOG_LVL_INFO
00406         dumpPageArray(disk);
00407     #endif
00408     #if CONFIG_BATTFS_SHUFFLE_FREE_PAGES
00409         SHUFFLE(&disk->page_array[disk->free_page_start], disk->dev->blk_cnt - disk->free_page_start);
00410
00411         LOG_INFO("Page array after shuffle:\n");
00412         #if LOG_LEVEL >= LOG_LVL_INFO
00413             dumpPageArray(disk);
00414         #endif
00415     #endif
00416     /* Init list for opened files. */
00417     LIST_INIT(&disk->file_opened_list);
00418     return true;
00419 }
00420
00425 bool battfs_fsck(struct BattFsSuper *disk)
00426 {
00427     #define FSCHECK(cond) do { if(!(cond)) { LOG_ERR("\"" #cond "\"\n"); return false; } } while (0)
00428
00429     FSCHECK(disk->free_page_start <= disk->dev->blk_cnt);
00430     FSCHECK(disk->data_size < disk->dev->blk_size);
00431     FSCHECK(disk->free_bytes <= disk->disk_size);
00432
00433     disk_size_t free_bytes = 0;
00434     BattFsPageHeader hdr, prev_hdr;
00435     inode_t files = 0;
00436     pgcnt_t page_used = 0;
00437
00438     bool start = true;
00439
00440     /* Uneeded, the first time will be overwritten but useful to silence
00441      * the warning for uninitialized value */
00442     FSCHECK(readHdr(disk, 0, &prev_hdr));
00443     for (pgcnt_t page = 0; page < disk->dev->blk_cnt; page++)
00444     {
00445         FSCHECK(readHdr(disk, disk->page_array[page], &hdr));
00446         free_bytes += disk->data_size;
00447
00448         if (page < disk->free_page_start)
00449         {
00450             FSCHECK(computeFcs(&hdr) == hdr.fcs);
00451             page_used++;
00452             free_bytes -= hdr.fill;
00453             if (hdr.inode != prev_hdr.inode || start)
00454             {
00455                 if (LIKELY(!start))
00456                     FSCHECK(hdr.inode > prev_hdr.inode);
00457                 else
00458                     start = false;
00459
00460                 FSCHECK(hdr.pgoff == 0);
00461                 files++;
00462             }
00463             else
00464             {
00465                 FSCHECK(hdr.fill != 0);
00466                 FSCHECK(prev_hdr.fill == disk->data_size);
00467                 FSCHECK(hdr.pgoff == prev_hdr.pgoff + 1);
00468             }
00469             prev_hdr = hdr;
00470         }
00471     }
00472
00473     FSCHECK(page_used == disk->free_page_start);
00474     FSCHECK(free_bytes == disk->free_bytes);
00475
00476     return true;
00477 }
00478
00483 static int battfs_flush(struct KFile *fd)
00484 {
00485     BattFs *fdb = BATTFS_CAST(fd);
00486
00487     if (kblock_flush(fdb->disk->dev) == 0)
00488         return 0;
00489     else
00490     {
00491         fdb->errors |= BATTFS_DISK_FLUSHBUF_ERR;
00492         return EOF;
00493     }
00494 }
00495
00500 static int battfs_fileclose(struct KFile *fd)
00501 {
00502     BattFs *fdb = BATTFS_CAST(fd);
00503
00504     if (battfs_flush(fd) == 0)
00505     {
00506         REMOVE(&fdb->link);
00507         return 0;
00508     }
00509     else
00510         return EOF;
00511 }
00512
00513 #define NO_SPACE PAGE_UNSET_SENTINEL
00514
00515 static pgcnt_t allocateNewPage(struct BattFsSuper *disk, pgcnt_t new_pos, inode_t inode)
00516 {
00517     if (SPACE_OVER(disk))
00518     {
00519         LOG_ERR("No disk space available!\n");
00520         return NO_SPACE;
00521     }
00522
00523     LOG_INFO("Getting new page %d, pos %d\n", disk->page_array[disk->free_page_start], new_pos);
00524     pgcnt_t new_page = disk->page_array[disk->free_page_start++];
00525     memmove(&disk->page_array[new_pos + 1], &disk->page_array[new_pos], (disk->free_page_start - new_pos - 1) * sizeof(pgcnt_t));
00526
00527     Node *n;
00528     /* Move following file start point one position ahead. */
00529     FOREACH_NODE(n, &disk->file_opened_list)
00530     {
00531         BattFs *file = containerof(n, BattFs, link);
00532         if (file->inode > inode)
00533         {
00534             LOG_INFO("Move file %d start pos\n", file->inode);
00535             file->start++;
00536         }
00537     }
00538
00539     disk->page_array[new_pos] = new_page;
00540     return new_page;
00541 }
00542
00543 static pgcnt_t renewPage(struct BattFsSuper *disk, pgcnt_t old_pos)
00544 {
00545     if (SPACE_OVER(disk))
00546     {
00547         LOG_ERR("No disk space available!\n");
00548         return NO_SPACE;
00549     }
00550
00551     /* Get a free page */
00552     pgcnt_t new_page = disk->page_array[disk->free_page_start];
00553     movePages(disk, disk->free_page_start + 1, -1);
00554
00555     /* Insert previous page in free blocks list */
00556     LOG_INFO("Setting page %d as free\n", old_pos);
00557     disk->page_array[disk->dev->blk_cnt - 1] = old_pos;
00558     return new_page;
00559 }
00560
00565 static size_t battfs_write(struct KFile *fd, const void *_buf, size_t size)
00566 {
00567     BattFs *fdb = BATTFS_CAST(fd);
00568     BattFsSuper *disk = fdb->disk;
00569     const uint8_t *buf = (const uint8_t *)_buf;
00570
00571     size_t total_write = 0;
00572     pgoff_t pg_offset;
00573     pgaddr_t addr_offset;
00574     pgaddr_t wr_len;
00575     BattFsPageHeader curr_hdr;
00576     pgcnt_t new_page;
00577
00578     if (fd->seek_pos < 0)
00579     {
00580         fdb->errors |= BATTFS_NEGATIVE_SEEK_ERR;
00581         return total_write;
00582     }
00583
00584     if (fd->seek_pos > fd->size)
00585     {
00586         if (!readHdr(disk, fdb->start[fdb->max_off], &curr_hdr))
00587         {
00588             fdb->errors |= BATTFS_DISK_READ_ERR;
00589             return total_write;
00590         }
00591
00592         /*
00593          * Renew page only if is not in cache.
00594          * This avoids rewriting the same page continuously
00595          * if the user code keeps writing in the same portion
00596          * of the file.
00597          */
00598         if (kblock_buffered(disk->dev)
00599             && ((fdb->start[fdb->max_off] != kblock_cachedBlock(disk->dev)) || !kblock_cacheDirty(disk->dev)))
00600         {
00601             new_page = renewPage(disk, fdb->start[fdb->max_off]);
00602             if (new_page == NO_SPACE)
00603             {
00604                 fdb->errors |= BATTFS_DISK_SPACEOVER_ERR;
00605                 return total_write;
00606             }
00607
00608             kblock_copy(disk->dev, fdb->start[fdb->max_off], new_page);
00609             fdb->start[fdb->max_off] = new_page;
00610         }
00611         else
00612             new_page = fdb->start[fdb->max_off];
00613
00614         /* Fill unused space of first page with 0s */
00615         uint8_t dummy = 0;
00616         // TODO: write in blocks to speed up things
00617         pgaddr_t zero_bytes = MIN(fd->seek_pos - fd->size, (kfile_off_t)(disk->data_size - curr_hdr.fill));
00618         while (zero_bytes--)
00619         {
00620             if (kblock_write(disk->dev, new_page, &dummy, curr_hdr.fill, 1) != 1)
00621             {
00622                 fdb->errors |= BATTFS_DISK_WRITE_ERR;
00623                 return total_write;
00624             }
00625             curr_hdr.fill++;
00626             fd->size++;
00627             disk->free_bytes--;
00628         }
00629         curr_hdr.seq++;
00630         if (!writeHdr(disk, new_page, &curr_hdr))
00631         {
00632             fdb->errors |= BATTFS_DISK_WRITE_ERR;
00633             return total_write;
00634         }
00635
00636         /* Allocate the missing pages first. */
00637         pgoff_t missing_pages = fd->seek_pos / disk->data_size - fdb->max_off;
00638
00639         LOG_INFO("missing pages: %d\n", missing_pages);
00640
00641         while (missing_pages--)
00642         {
00643             zero_bytes = MIN((kfile_off_t)disk->data_size, fd->seek_pos - fd->size);
00644
00645             new_page = allocateNewPage(disk, (fdb->start - disk->page_array) + fdb->max_off + 1, fdb->inode);
00646             if (new_page == NO_SPACE)
00647             {
00648                 fdb->errors |= BATTFS_DISK_SPACEOVER_ERR;
00649                 return total_write;
00650             }
00651
00652
00653             // TODO: write in blocks to speed up things
00654             /* Fill page buffer with 0 to avoid filling unused pages with garbage */
00655             for (pgaddr_t off = 0; off < disk->data_size; off++)
00656             {
00657                 if (kblock_write(disk->dev, new_page, &dummy, off, 1) != 1)
00658                 {
00659                     fdb->errors |= BATTFS_DISK_WRITE_ERR;
00660                     return total_write;
00661                 }
00662             }
00663             curr_hdr.inode = fdb->inode;
00664             curr_hdr.pgoff = ++fdb->max_off;
00665             curr_hdr.fill = zero_bytes;
00666             curr_hdr.seq = 0;
00667
00668             if (!writeHdr(disk, new_page, &curr_hdr))
00669             {
00670                 fdb->errors |= BATTFS_DISK_WRITE_ERR;
00671                 return total_write;
00672             }
00673
00674             /* Update size and free space left */
00675             fd->size += zero_bytes;
00676             disk->free_bytes -= zero_bytes;
00677         }
00678     }
00679
00680     while (size)
00681     {
00682         pg_offset = fd->seek_pos / disk->data_size;
00683         addr_offset = fd->seek_pos % disk->data_size;
00684         wr_len = MIN(size, (size_t)(disk->data_size - addr_offset));
00685
00686         /* Handle write outside EOF */
00687         if (pg_offset > fdb->max_off)
00688         {
00689             LOG_INFO("New page needed, pg_offset %d, pos %d\n", pg_offset, (int)((fdb->start - disk->page_array) + pg_offset));
00690
00691             new_page = allocateNewPage(disk, (fdb->start - disk->page_array) + pg_offset, fdb->inode);
00692             if (new_page == NO_SPACE)
00693             {
00694                 fdb->errors |= BATTFS_DISK_SPACEOVER_ERR;
00695                 return total_write;
00696             }
00697
00698             curr_hdr.inode = fdb->inode;
00699             curr_hdr.pgoff = pg_offset;
00700             curr_hdr.fill = 0;
00701             curr_hdr.seq = 0;
00702             fdb->max_off = pg_offset;
00703         }
00704         else
00705         {
00706             if (!readHdr(disk, fdb->start[pg_offset], &curr_hdr))
00707             {
00708                 fdb->errors |= BATTFS_DISK_READ_ERR;
00709                 return total_write;
00710             }
00711
00712             /* Renew page only if is not in cache. */
00713             if (kblock_buffered(disk->dev)
00714                 && ((fdb->start[fdb->max_off] != kblock_cachedBlock(disk->dev)) || !kblock_cacheDirty(disk->dev)))
00715             {
00716                 new_page = renewPage(disk, fdb->start[pg_offset]);
00717                 if (new_page == NO_SPACE)
00718                 {
00719                     fdb->errors |= BATTFS_DISK_SPACEOVER_ERR;
00720                     return total_write;
00721                 }
00722
00723                 LOG_INFO("Re-writing page %d to %d\n", fdb->start[pg_offset], new_page);
00724                 if (kblock_copy(disk->dev, fdb->start[pg_offset], new_page) != 0)
00725                 {
00726                     fdb->errors |= BATTFS_DISK_WRITE_ERR;
00727                     return total_write;
00728                 }
00729                 fdb->start[pg_offset] = new_page;
00730             }
00731             else
00732             {
00733                 LOG_INFO("Using cached block %d\n", fdb->start[pg_offset]);
00734                 new_page = fdb->start[pg_offset];
00735             }
00736
00737             curr_hdr.seq++;
00738         }
00739         //LOG_INFO("writing to buffer for page %d, offset %d, size %d\n", disk->curr_page, addr_offset, wr_len);
00740         if (kblock_write(disk->dev, new_page, buf, addr_offset, wr_len) != wr_len)
00741         {
00742             fdb->errors |= BATTFS_DISK_WRITE_ERR;
00743             return total_write;
00744         }
00745
00746         size -= wr_len;
00747         fd->seek_pos += wr_len;
00748         total_write += wr_len;
00749         buf += wr_len;
00750         fill_t fill_delta = MAX((int32_t)(addr_offset + wr_len) - curr_hdr.fill, (int32_t)0);
00751         disk->free_bytes -= fill_delta;
00752         fd->size += fill_delta;
00753         curr_hdr.fill += fill_delta;
00754
00755         if (!writeHdr(disk, new_page, &curr_hdr))
00756         {
00757             fdb->errors |= BATTFS_DISK_WRITE_ERR;
00758             return total_write;
00759         }
00760
00761         //LOG_INFO("free_bytes %d, seek_pos %d, size %d, curr_hdr.fill %d\n", disk->free_bytes, fd->seek_pos, fd->size, curr_hdr.fill);
00762     }
00763     return total_write;
00764 }
00765
00766
00771 static size_t battfs_read(struct KFile *fd, void *_buf, size_t size)
00772 {
00773     BattFs *fdb = BATTFS_CAST(fd);
00774     BattFsSuper *disk = fdb->disk;
00775     uint8_t *buf = (uint8_t *)_buf;
00776
00777     size_t total_read = 0;
00778     pgoff_t pg_offset;
00779     pgaddr_t addr_offset;
00780     pgaddr_t read_len;
00781
00782     if (fd->seek_pos < 0)
00783     {
00784         fdb->errors |= BATTFS_NEGATIVE_SEEK_ERR;
00785         return total_read;
00786     }
00787
00788     size = MIN((kfile_off_t)size, MAX(fd->size - fd->seek_pos, (kfile_off_t)0));
00789
00790     while (size)
00791     {
00792         pg_offset = fd->seek_pos / disk->data_size;
00793         addr_offset = fd->seek_pos % disk->data_size;
00794         read_len = MIN(size, (size_t)(disk->data_size - addr_offset));
00795
00796         //LOG_INFO("reading from page %d, offset %d, size %d\n", fdb->start[pg_offset], addr_offset, read_len);
00797         /* Read from disk */
00798         if (kblock_read(disk->dev, fdb->start[pg_offset], buf, addr_offset, read_len) != read_len)
00799         {
00800             fdb->errors |= BATTFS_DISK_READ_ERR;
00801             return total_read;
00802         }
00803
00804         #ifdef _DEBUG
00805             BattFsPageHeader hdr;
00806             readHdr(disk, fdb->start[pg_offset], &hdr);
00807             ASSERT(hdr.inode == fdb->inode);
00808         #endif
00809
00810         size -= read_len;
00811         fd->seek_pos += read_len;
00812         total_read += read_len;
00813         buf += read_len;
00814     }
00815     return total_read;
00816 }
00817
00818
00827 static bool findFile(BattFsSuper *disk, inode_t inode, pgcnt_t *last)
00828 {
00829     BattFsPageHeader hdr;
00830     pgcnt_t first = 0, page;
00831     *last = disk->free_page_start;
00832     fcs_t fcs;
00833
00834     while (first < *last)
00835     {
00836         page = (first + *last) / 2;
00837         LOG_INFO("first %d, last %d, page %d\n", first, *last, page);
00838         if (!readHdr(disk, disk->page_array[page], &hdr))
00839             return false;
00840         LOG_INFO("inode read: %d\n", hdr.inode);
00841         fcs = computeFcs(&hdr);
00842         if (hdr.fcs == fcs && hdr.inode == inode)
00843         {
00844             *last = page - hdr.pgoff;
00845             LOG_INFO("Found: %d\n", *last);
00846             return true;
00847         }
00848         else if (hdr.fcs == fcs && hdr.inode < inode)
00849             first = page + 1;
00850         else
00851             *last = page;
00852     }
00853     LOG_INFO("Not found: last %d\n", *last);
00854     return false;
00855 }
00856
00860 bool battfs_fileExists(BattFsSuper *disk, inode_t inode)
00861 {
00862     pgcnt_t dummy;
00863     return findFile(disk, inode, &dummy);
00864 }
00865
00871 static file_size_t countFileSize(BattFsSuper *disk, pgcnt_t *start, inode_t inode)
00872 {
00873     file_size_t size = 0;
00874     BattFsPageHeader hdr;
00875
00876     while (start < &disk->page_array[disk->free_page_start])
00877     {
00878         if (!readHdr(disk, *start++, &hdr))
00879             return EOF;
00880         if (hdr.fcs == computeFcs(&hdr) && hdr.inode == inode)
00881             size += hdr.fill;
00882         else
00883             break;
00884     }
00885     return size;
00886 }
00887
00888 static int battfs_error(struct KFile *fd)
00889 {
00890     BattFs *fdb = BATTFS_CAST(fd);
00891     return fdb->errors;
00892 }
00893
00894
00895 static void battfs_clearerr(struct KFile *fd)
00896 {
00897     BattFs *fdb = BATTFS_CAST(fd);
00898     fdb->errors = 0;
00899 }
00900
00906 bool battfs_fileopen(BattFsSuper *disk, BattFs *fd, inode_t inode, filemode_t mode)
00907 {
00908     Node *n;
00909
00910     memset(fd, 0, sizeof(*fd));
00911
00912     /* Search file start point in disk page array */
00913     pgcnt_t start_pos;
00914     if (!findFile(disk, inode, &start_pos))
00915     {
00916         LOG_INFO("file %d not found\n", inode);
00917         if (!(mode & BATTFS_CREATE))
00918         {
00919             fd->errors |= BATTFS_FILE_NOT_FOUND_ERR;
00920             return false;
00921         }
00922         /* Create the file */
00923         BattFsPageHeader hdr;
00924
00925         if (allocateNewPage(disk, start_pos, inode) == NO_SPACE)
00926         {
00927             fd->errors |= BATTFS_DISK_SPACEOVER_ERR;
00928             return false;
00929         }
00930
00931         hdr.inode = inode;
00932         hdr.pgoff = 0;
00933         hdr.fill = 0;
00934         hdr.seq = 0;
00935         if (!writeHdr(disk, disk->page_array[start_pos], &hdr))
00936         {
00937             fd->errors |= BATTFS_DISK_WRITE_ERR;
00938             return false;
00939         }
00940     }
00941     fd->start = &disk->page_array[start_pos];
00942     LOG_INFO("Start pos %d\n", start_pos);
00943
00944     /* Fill file size */
00945     if ((fd->fd.size = countFileSize(disk, fd->start, inode)) == EOF)
00946     {
00947         fd->errors |= BATTFS_DISK_READ_ERR;
00948         return false;
00949     }
00950     fd->max_off = fd->fd.size / disk->data_size;
00951
00952     /* Reset seek position */
00953     fd->fd.seek_pos = 0;
00954
00955     /* Insert file handle in list, ordered by inode, ascending. */
00956     FOREACH_NODE(n, &disk->file_opened_list)
00957     {
00958         BattFs *file = containerof(n, BattFs, link);
00959         if (file->inode >= inode)
00960             break;
00961     }
00962     INSERT_BEFORE(&fd->link, n);
00963
00964     /* Fill in data */
00965     fd->inode = inode;
00966     fd->mode = mode;
00967     fd->disk = disk;
00968
00969     fd->fd.close = battfs_fileclose;
00970     fd->fd.flush = battfs_flush;
00971     fd->fd.read = battfs_read;
00972     fd->fd.reopen = kfile_genericReopen;
00973     fd->fd.seek = kfile_genericSeek;
00974     fd->fd.write = battfs_write;
00975
00976     fd->fd.error = battfs_error;
00977     fd->fd.clearerr = battfs_clearerr;
00978
00979     DB(fd->fd._type = KFT_BATTFS);
00980
00981     return true;
00982 }
00983
00984
00988 bool battfs_umount(struct BattFsSuper *disk)
00989 {
00990     Node *n;
00991     int res = 0;
00992
00993     /* Close all open files */
00994     FOREACH_NODE(n, &disk->file_opened_list)
00995     {
00996         BattFs *file = containerof(n, BattFs, link);
00997         res += battfs_fileclose(&file->fd);
00998     }
00999
01000     /* Close disk */
01001     return (kblock_flush(disk->dev) == 0) && (kblock_close(disk->dev) == 0) && (res == 0);
01002 }
01003
01004 #if UNIT_TEST
01005
01006 void battfs_writeTestBlock(KBlock *dev, pgcnt_t page, inode_t inode, seq_t seq, fill_t fill, pgoff_t pgoff)
01007 {
01008     uint8_t buf[BATTFS_HEADER_LEN];
01009     battfs_eraseBlock(dev, page);
01010
01011     BattFsPageHeader hdr;
01012     hdr.inode = inode;
01013     hdr.fill = fill;
01014     hdr.pgoff = pgoff;
01015     hdr.seq = seq;
01016     hdr.fcs = computeFcs(&hdr);
01017
01018     battfs_to_disk(&hdr, buf);
01019
01020     ASSERT(kblock_write(dev, page, buf, dev->blk_size - BATTFS_HEADER_LEN, BATTFS_HEADER_LEN) == BATTFS_HEADER_LEN);
01021     ASSERT(kblock_flush(dev) == 0);
01022 }
01023
01024 void battfs_eraseBlock(KBlock *dev, pgcnt_t page)
01025 {
01026     /* Reset page to all 0xff */
01027     uint8_t buf[dev->blk_size];
01028     memset(buf, 0xFF, dev->blk_size);
01029     ASSERT(kblock_write(dev, page, buf, 0, dev->blk_size) == dev->blk_size);
01030     ASSERT(kblock_flush(dev) == 0);
01031 }
01032
01033 #endif


BeRTOS: battfs.h File Reference

  • fs
Data Structures | Defines | Typedefs
battfs.h File Reference

BattFS: a filesystem for embedded platforms (interface). TODO: Add detailed filesystem description. More...

#include <cfg/compiler.h>
#include <cpu/types.h>
#include <algo/rotating_hash.h>
#include <struct/list.h>
#include <io/kfile.h>
#include <io/kblock.h>

Go to the source code of this file.

Data Structures

struct | BattFsPageHeader
BattFS page header, used to represent a page header in memory. More...
struct | BattFsSuper
Context used to describe a disk. More...
struct | BattFs
Describe a BattFs file usign a KFile. More...

Defines

#define | BATTFS_HEADER_LEN 12
Size of the header once saved on disk.
#define | MAX_PAGE_ADDR ((1 << (CPU_BITS_PER_CHAR * sizeof(pgcnt_t))) - 1)
Maximum page address.
#define | BATTFS_MAX_FILES (1 << (CPU_BITS_PER_CHAR * sizeof(inode_t)))
Max number of files.
#define | PAGE_UNSET_SENTINEL ((pgcnt_t)((1L << (CPU_BITS_PER_CHAR * sizeof(pgcnt_t))) - 1))
Sentinel used to keep trace of unset pages in disk->page_array.
#define | SPACE_OVER(disk) ((disk)->free_page_start >= (disk)->dev->blk_cnt)
True if space on disk is over.

Typedefs

typedef uint16_t | fill_t
Type for keeping trace of space filled inside a page.
typedef fill_t | pgaddr_t
Type for addressing space inside a page.
typedef uint16_t | pgcnt_t
Type for counting pages on disk.
typedef pgcnt_t | pgoff_t
Type for counting pages inside a file.
typedef uint8_t | inode_t
Type for file inodes.
typedef uint64_t | seq_t
Type for page seq number, at least 40bits wide.
typedef rotating_t | fcs_t
Type for header FCS.
typedef uint32_t | disk_size_t
Type for disk sizes.
typedef uint8_t | filemode_t
Type for file open modes.
typedef int32_t | file_size_t
Type for file sizes.
#define | BATTFS_CREATE BV(0)
Modes for battfs_fileopen.
#define | BATTFS_RD BV(1)
Open file for reading.
#define | BATTFS_WR BV(2)
Open file fir writing.
#define | BATTFS_NEGATIVE_SEEK_ERR BV(0)
File errors.
#define | BATTFS_DISK_READ_ERR BV(1)
Error reading from disk device.
#define | BATTFS_DISK_WRITE_ERR BV(2)
Error writing in the disk device.
#define | BATTFS_DISK_SPACEOVER_ERR BV(3)
No more disk space available.
#define | BATTFS_DISK_FLUSHBUF_ERR BV(4)
Error flushing (writing) the current page to disk.
#define | BATTFS_FILE_NOT_FOUND_ERR BV(5)
File not found on disk.
#define | KFT_BATTFS MAKE_ID('B', 'T', 'F', 'S')
Id for battfs file descriptors.
BattFs * | BATTFS_CAST (KFile *fd)
Macro used to cast a KFile to a BattFS.
bool | battfs_mount (struct BattFsSuper *disk, struct KBlock *dev, pgcnt_t *page_array, size_t array_size)
Initialize and mount disk described by disk.
bool | battfs_fsck (struct BattFsSuper *disk)
Check the filesystem.
bool | battfs_umount (struct BattFsSuper *disk)
Umount disk.
bool | battfs_fileExists (BattFsSuper *disk, inode_t inode)
bool | battfs_fileopen (BattFsSuper *disk, BattFs *fd, inode_t inode, filemode_t mode)
Open file inode from disk in mode.
void | battfs_writeTestBlock (KBlock *dev, pgcnt_t page, inode_t inode, seq_t seq, fill_t fill, pgoff_t pgoff)
Modes for battfs_fileopen.
void | battfs_eraseBlock (KBlock *dev, pgcnt_t page)
Modes for battfs_fileopen.

Detailed Description

BattFS: a filesystem for embedded platforms (interface). TODO: Add detailed filesystem description.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file battfs.h.

Define Documentation

#define BATTFS_CREATE BV(0)

Modes for battfs_fileopen.

Create file if does not exist

Definition at line 160 of file battfs.h.

#define BATTFS_HEADER_LEN 12

Size of the header once saved on disk.

See also:
battfs_to_disk
disk_to_battfs

Definition at line 97 of file battfs.h.

#define BATTFS_NEGATIVE_SEEK_ERR BV(0)

File errors.

Trying to read/write before file start.

Definition at line 170 of file battfs.h.

Function Documentation

BattFs* BATTFS_CAST ( KFile * fd ) [inline]

Macro used to cast a KFile to a BattFS.

Also perform dynamic type check.

Definition at line 202 of file battfs.h.

void battfs_eraseBlock | ( | KBlock * | dev,
 |  | pgcnt_t | page
 | ) |  |

Modes for battfs_fileopen.

Create file if does not exist

bool battfs_fileExists | ( | BattFsSuper * | disk,
 |  | inode_t | inode
 | ) |  |
Returns:
true if file inode exists on disk, false otherwise.

Definition at line 860 of file battfs.c.

bool battfs_fileopen | ( | BattFsSuper * | disk,
 |  | BattFs * | fd,
 |  | inode_t | inode,
 |  | filemode_t | mode
 | ) |  |

Open file inode from disk in mode.

File context is stored in fd.

Returns:
true if ok, false otherwise.

Definition at line 906 of file battfs.c.

bool battfs_fsck ( struct BattFsSuper * disk )

Check the filesystem.

Returns:
true if ok, false on errors.

Definition at line 425 of file battfs.c.

bool battfs_mount | ( | struct BattFsSuper * | disk,
 |  | struct KBlock * | dev,
 |  | pgcnt_t * | page_array,
 |  | size_t | array_size
 | ) |  |

Initialize and mount disk described by disk.

Returns:
false on errors, true otherwise.

Definition at line 364 of file battfs.c.

void battfs_writeTestBlock | ( | KBlock * | dev,
 |  | pgcnt_t | page,
 |  | inode_t | inode,
 |  | seq_t | seq,
 |  | fill_t | fill,
 |  | pgoff_t | pgoff
 | ) |  |

Modes for battfs_fileopen.

Create file if does not exist


BeRTOS: battfs.h Source File

  • fs
battfs.h
Go to the documentation of this file.
00001
00044 #ifndef FS_BATTFS_H
00045 #define FS_BATTFS_H
00046
00047 #include <cfg/compiler.h> // uintXX_t; STATIC_ASSERT
00048 #include <cpu/types.h> // CPU_BITS_PER_CHAR
00049 #include <algo/rotating_hash.h>
00050 #include <struct/list.h>
00051 #include <io/kfile.h>
00052 #include <io/kblock.h>
00053
00054 typedef uint16_t fill_t;
00055 typedef fill_t   pgaddr_t;
00056 typedef uint16_t pgcnt_t;
00057 typedef pgcnt_t  pgoff_t;
00058 typedef uint8_t  inode_t;
00059 typedef uint64_t  seq_t;
00060 typedef rotating_t fcs_t;
00061
00062
00070 typedef struct BattFsPageHeader
00071 {
00072     inode_t  inode;
00073     fill_t   fill;
00074     pgoff_t  pgoff;
00075
00084     seq_t    seq;
00085
00089     fcs_t fcs;
00090 } BattFsPageHeader;
00091
00097 #define BATTFS_HEADER_LEN 12
00098
00102 #define MAX_PAGE_ADDR ((1 << (CPU_BITS_PER_CHAR * sizeof(pgcnt_t))) - 1)
00103
00107 #define BATTFS_MAX_FILES (1 << (CPU_BITS_PER_CHAR * sizeof(inode_t)))
00108
00112 #define PAGE_UNSET_SENTINEL ((pgcnt_t)((1L << (CPU_BITS_PER_CHAR * sizeof(pgcnt_t))) - 1))
00113
00114 typedef uint32_t disk_size_t;
00115
00121 typedef struct BattFsSuper
00122 {
00123     KBlock *dev;
00124
00125     pgaddr_t data_size;
00126
00133     pgcnt_t *page_array;
00134
00139     pgcnt_t free_page_start;
00140
00141     disk_size_t disk_size;
00142     disk_size_t free_bytes;
00143
00144     List file_opened_list;
00145     /* TODO add other fields. */
00146 } BattFsSuper;
00147
00151 #define SPACE_OVER(disk) ((disk)->free_page_start >= (disk)->dev->blk_cnt)
00152
00153 typedef uint8_t filemode_t;
00154 typedef int32_t file_size_t;
00155
00160 #define BATTFS_CREATE BV(0)  ///< Create file if does not exist
00161 #define BATTFS_RD     BV(1)  ///< Open file for reading
00162 #define BATTFS_WR     BV(2)  ///< Open file fir writing
00163 /*/}*/
00164
00165
00170 #define BATTFS_NEGATIVE_SEEK_ERR   BV(0) ///< Trying to read/write before file start.
00171 #define BATTFS_DISK_READ_ERR       BV(1) ///< Error reading from disk device.
00172 #define BATTFS_DISK_WRITE_ERR      BV(2) ///< Error writing in the disk device.
00173 #define BATTFS_DISK_SPACEOVER_ERR  BV(3) ///< No more disk space available.
00174 #define BATTFS_DISK_FLUSHBUF_ERR   BV(4) ///< Error flushing (writing) the current page to disk.
00175 #define BATTFS_FILE_NOT_FOUND_ERR  BV(5) ///< File not found on disk.
00176 /*/}*/
00177
00181 typedef struct BattFs
00182 {
00183     KFile fd;
00184     Node link;
00185     inode_t inode;
00186     BattFsSuper *disk;
00187     filemode_t mode;
00188     pgcnt_t *start;
00189     pgcnt_t max_off;
00190     int errors;
00191 } BattFs;
00192
00196 #define KFT_BATTFS MAKE_ID('B', 'T', 'F', 'S')
00197
00202 INLINE BattFs * BATTFS_CAST(KFile *fd)
00203 {
00204     ASSERT(fd->_type == KFT_BATTFS);
00205     return (BattFs *)fd;
00206 }
00207
00208 bool battfs_mount(struct BattFsSuper *disk, struct KBlock *dev, pgcnt_t *page_array, size_t array_size);
00209 bool battfs_fsck(struct BattFsSuper *disk);
00210 bool battfs_umount(struct BattFsSuper *disk);
00211
00212 bool battfs_fileExists(BattFsSuper *disk, inode_t inode);
00213 bool battfs_fileopen(BattFsSuper *disk, BattFs *fd, inode_t inode, filemode_t mode);
00214
00215 void battfs_writeTestBlock(KBlock *dev, pgcnt_t page, inode_t inode, seq_t seq, fill_t fill, pgoff_t pgoff);
00216 void battfs_eraseBlock(KBlock *dev, pgcnt_t page);
00217 #endif /* FS_BATTFS_H */


BeRTOS: benchmarks.c Source File

  • sec
benchmarks.c
00001 #include "benchmarks.h"
00002 #include <drv/timer.h>
00003 #include <string.h>
00004
00005 static uint8_t buf[512];
00006
00007 void hash_benchmark(Hash *h, const char *hname, int numk)
00008 {
00009     memset(buf, 0x12, sizeof(buf));
00010     ticks_t t = timer_clock();
00011
00012     for (int j=0;j<64;++j) {
00013         hash_begin(h);
00014         for (int i=0; i<numk*2; ++i)
00015             hash_update(h, buf, 512);
00016         hash_final(h);
00017     }
00018
00019     t = timer_clock() - t;
00020
00021     utime_t usec = ticks_to_us(t) / 64;
00022     kprintf("%s @ %ldMhz: %s of %dKiB of data: %lu.%lu ms\n", CPU_CORE_NAME, CPU_FREQ/1000000, hname, numk, (usec/1000), (usec % 1000));
00023 }
00024
00025 void prng_benchmark(PRNG *prng, const char *hname, int numbytes)
00026 {
00027     memset(buf, 0x12, sizeof(buf));
00028
00029     ASSERT(sizeof(buf) >= prng_seed_len(prng));
00030     prng_reseed(prng, buf);
00031
00032     ticks_t t = timer_clock();
00033     enum { CYCLES = 2048 };
00034
00035     for (int j=0;j<CYCLES;++j)
00036     {
00037         for (int i=0; i<(numbytes+511)/512-1; ++i)
00038             prng_generate(prng, buf, 512);
00039         if (numbytes % 512)
00040             prng_generate(prng, buf, numbytes%512);
00041     }
00042
00043     t = timer_clock() - t;
00044
00045     utime_t usec = ticks_to_us(t) / CYCLES;
00046     kprintf("%s @ %ldMhz: %s generation of %d random bytes: %lu.%lu ms\n", CPU_CORE_NAME, CPU_FREQ/1000000, hname, numbytes, (usec/1000), (usec % 1000));
00047     kprintf("Sample of random data:\n");
00048     kdump(buf, MIN(numbytes, 64));
00049 }
00050
00051 void cipher_benchmark(BlockCipher *c, const char *cname, int numbytes)
00052 {
00053     memset(buf, 0x12, sizeof(buf));
00054
00055     ASSERT(sizeof(buf) >= cipher_key_len(c));
00056     cipher_set_key(c, buf);
00057
00058     uint8_t iv[cipher_block_len(c)];
00059     memset(iv, 0, sizeof(iv));
00060
00061     ticks_t t = timer_clock();
00062     enum { CYCLES = 64 };
00063
00064     for (int j=0;j<CYCLES;++j)
00065     {
00066         cipher_cbc_begin(c, iv);
00067         int numblocks = (numbytes / cipher_block_len(c)) + 1;
00068         for (int i=0; i<numblocks; ++i)
00069             cipher_cbc_encrypt(c, buf);
00070     }
00071
00072     t = timer_clock() - t;
00073
00074     utime_t usec = ticks_to_us(t) / CYCLES;
00075     kprintf("%s @ %ldMhz: %s-CBC of %d bytes: %lu.%lu ms (%d KiB/s)\n",
00076             CPU_CORE_NAME, CPU_FREQ/1000000,
00077             cname, numbytes,
00078             (usec/1000), (usec % 1000),
00079             (uint32_t)(numbytes * (CYCLES * 1000000 / 1024) / ticks_to_us(t)));
00080 }


BeRTOS: benchmarks.h Source File

  • sec
benchmarks.h
00001 #ifndef SEC_BENCHMARKS_H
00002 #define SEC_BENCHMARKS_H
00003
00004 #include <sec/hash.h>
00005 #include <sec/prng.h>
00006 #include <sec/cipher.h>
00007
00008 void hash_benchmark(Hash *h, const char *hname, int numk);
00009 void prng_benchmark(PRNG *prng, const char *hname, int numk);
00010 void cipher_benchmark(BlockCipher *c, const char *cname, int msg_len);
00011
00012 #endif /* SEC_BENCHMARKS_H */


BeRTOS: bitarray.h File Reference

  • struct
Defines | Functions
bitarray.h File Reference

Bitarray module. More...

#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <cpu/types.h>

Go to the source code of this file.

Defines

#define | BITARRAY_ALLOC(name, size) uint8_t name[DIV_ROUNDUP((size), 8)]
Convenience macro to create a memory area for the BitArray.

Functions

void | bitarray_set (BitArray *bitx, int idx)
Set one bit into the bit array.
void | bitarray_clear (BitArray *bitx, int idx)
Clear one bit in the bit array.
void | bitarray_setRange (BitArray *bitx, int idx, int offset)
Set a range of bits.
void | bitarray_clearRange (BitArray *bitx, int idx, int offset)
Clear a range of bits.
bool | bitarray_test (BitArray *bitx, int idx)
Test a bit.
bool | bitarray_isFull (BitArray *bitx)
Check if the bitarray is full.
bool | bitarray_isRangeFull (BitArray *bitx, int idx, int offset)
Test if a range of bit is full.
bool | bitarray_isRangeEmpty (BitArray *bitx, int idx, int offset)
Test if a range of bit is empty.
void | bitarray_dump (BitArray *bitx)
Print on debug serial a BitArray.
void | bitarray_init (BitArray *bitx, size_t bitarray_len, uint8_t *array, size_t size)
Init a BitArray.

Detailed Description

Bitarray module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file bitarray.h.

Define Documentation

#define BITARRAY_ALLOC | ( | name,
 |  | size
 | ) | uint8_t name[DIV_ROUNDUP((size), 8)]

Convenience macro to create a memory area for the BitArray.

Parameters:
name | Name of the variable.
size | Number of bits requested. It will be rounded to the nearest byte

Definition at line 61 of file bitarray.h.

Function Documentation

void bitarray_clear | ( | BitArray * | bitx,
 |  | int | idx
 | ) |  | [inline]

Clear one bit in the bit array.

Parameters:
bitx | BitArray context
idx | The bit to clear

Definition at line 83 of file bitarray.h.

void bitarray_clearRange | ( | BitArray * | bitx,
 |  | int | idx,
 |  | int | offset
 | ) |  | [inline]

Clear a range of bits.

The range starts from idx (inclusive) and spans offset bits.

Parameters:
bitx | BitArray context
idx | Starting bit
offset | Number of bits to clear

Definition at line 119 of file bitarray.h.

void bitarray_dump ( BitArray * bitx ) [inline]

Print on debug serial a BitArray.

Note:
This module does not use the logging module, so you can't decide the logging level.
Parameters:
bitx BitArray to be printed.

Definition at line 217 of file bitarray.h.

void bitarray_init | ( | BitArray * | bitx,
 |  | size_t | bitarray_len,
 |  | uint8_t * | array,
 |  | size_t | size
 | ) |  | [inline]

Init a BitArray.

The BitArray uses an external array for storage. You can use the macro BITARRAY_ALLOC to declare an appropriate memory size. Example usage:

 BITARRAY_ALLOC(bits_mem, 17);
 BitArray bits;
 bitarray_init(&bits, 17, bits_mem, sizeof(bits_mem))
Parameters:
bitx | BitArray context
bitarray_len | Number of bits in the BitArray
array | Memory area for the BitArray
size | Size (in bytes) of the memory area array

Definition at line 257 of file bitarray.h.

bool bitarray_isFull ( BitArray * bitx ) [inline]

Check if the bitarray is full.

Only bitarray_len bits are tested.

Parameters:
bitx BitArray to test
Returns:
True if bitx is full, false otherwise

Definition at line 151 of file bitarray.h.

bool bitarray_isRangeEmpty | ( | BitArray * | bitx,
 |  | int | idx,
 |  | int | offset
 | ) |  | [inline]

Test if a range of bit is empty.

Parameters:
bitx | BitArray context
idx | Starting bit
offset | Number of bits to test
Returns:
True if range is empty, false otherwise

Definition at line 200 of file bitarray.h.

bool bitarray_isRangeFull | ( | BitArray * | bitx,
 |  | int | idx,
 |  | int | offset
 | ) |  | [inline]

Test if a range of bit is full.

Parameters:
bitx | BitArray context
idx | Starting bit
offset | Number of bits to test
Returns:
True if range is full, false otherwise

Definition at line 178 of file bitarray.h.

void bitarray_set | ( | BitArray * | bitx,
 |  | int | idx
 | ) |  | [inline]

Set one bit into the bit array.

Parameters:
bitx | BitArray context
idx | The bit to set

Definition at line 68 of file bitarray.h.

void bitarray_setRange | ( | BitArray * | bitx,
 |  | int | idx,
 |  | int | offset
 | ) |  | [inline]

Set a range of bits.

The range starts from idx (inclusive) and spans offset bits.

Parameters:
bitx | BitArray context
idx | Starting bit
offset | Number of bit to set

Definition at line 102 of file bitarray.h.

bool bitarray_test | ( | BitArray * | bitx,
 |  | int | idx
 | ) |  | [inline]

Test a bit.

Parameters:
bitx | BitArray context
idx | Bit to test
Returns:
True if bit is set, false otherwise.

Definition at line 134 of file bitarray.h.


BeRTOS: bitarray.h Source File

  • struct
bitarray.h
Go to the documentation of this file.
00001
00039 #ifndef STRUCT_BITARRAY_H
00040 #define STRUCT_BITARRAY_H
00041
00042 #include <cfg/compiler.h>
00043 #include <cfg/macros.h>
00044 #include <cfg/debug.h>
00045
00046 #include <cpu/types.h>
00047
00048 typedef struct BitArray
00049 {
00050     size_t size;
00051     size_t bitarray_len;
00052     uint8_t *array;
00053 } BitArray;
00054
00061 #define BITARRAY_ALLOC(name, size)   uint8_t name[DIV_ROUNDUP((size), 8)]
00062
00068 INLINE void bitarray_set(BitArray *bitx, int idx)
00069 {
00070     ASSERT((size_t)idx <= bitx->bitarray_len);
00071
00072     int page = idx / 8;
00073     uint8_t bit = idx % 8;
00074
00075     bitx->array[page] |= BV(bit);
00076 }
00077
00083 INLINE void bitarray_clear(BitArray *bitx, int idx)
00084 {
00085     ASSERT((size_t)idx <= bitx->bitarray_len);
00086
00087     int page = idx / 8;
00088     uint8_t bit = idx % 8;
00089
00090     bitx->array[page] &= ~BV(bit);
00091 }
00092
00102 INLINE void bitarray_setRange(BitArray *bitx, int idx, int offset)
00103 {
00104     ASSERT((size_t)idx <= bitx->bitarray_len);
00105
00106     for (int i = idx; i < offset + idx; i++)
00107         bitarray_set(bitx, i);
00108 }
00109
00119 INLINE void bitarray_clearRange(BitArray *bitx, int idx, int offset)
00120 {
00121     ASSERT((size_t)idx <= bitx->bitarray_len);
00122
00123     for (int i = idx; i < offset + idx; i++)
00124         bitarray_clear(bitx, i);
00125 }
00126
00134 INLINE bool bitarray_test(BitArray *bitx, int idx)
00135 {
00136     ASSERT((size_t)idx <= bitx->bitarray_len);
00137     int page = idx / 8;
00138     uint8_t bit = idx % 8;
00139
00140     return (bitx->array[page] & BV(bit));
00141 }
00142
00151 INLINE bool bitarray_isFull(BitArray *bitx)
00152 {
00153     // test full bytes except the last one
00154     for (size_t page = 0; page <= bitx->size - 2; page++)
00155     {
00156         if (!(bitx->array[page] == 0xff))
00157             return 0;
00158     }
00159     // test the last byte using the correct bitmask
00160     uint8_t mask = BV(bitx->bitarray_len >> 3) - 1;
00161     if (!(bitx->array[bitx->size - 1] & mask))
00162         return 0;
00163
00164     return 1;
00165 }
00166
00167 /*
00168  * Ugly!.. reformat it.
00169  */
00178 INLINE bool bitarray_isRangeFull(BitArray *bitx, int idx, int offset)
00179 {
00180     ASSERT((size_t)(idx + offset) <= bitx->bitarray_len);
00181
00182     for (int i = idx; i <= idx + offset; i++)
00183         if (!bitarray_test(bitx, i))
00184             return 0;
00185
00186     return 1;
00187 }
00188
00189 /*
00190  * Ugly!.. reformat it.
00191  */
00200 INLINE bool bitarray_isRangeEmpty(BitArray *bitx, int idx, int offset)
00201 {
00202     ASSERT((size_t)(idx + offset) <= bitx->bitarray_len);
00203
00204     for (int i = idx; i <= idx + offset; i++)
00205         if (bitarray_test(bitx, i))
00206             return 0;
00207
00208     return 1;
00209 }
00210
00217 INLINE void bitarray_dump(BitArray *bitx)
00218 {
00219     kprintf("bitarray size[%zu]bits on [%zu]bytes\n", bitx->bitarray_len, bitx->size);
00220
00221     int i = 0;
00222     int j = 0;
00223     int count = bitx->bitarray_len;
00224
00225     while (count--)
00226     {
00227         kprintf("%d", bitarray_test(bitx, i++));
00228         if (j == 7)
00229         {
00230             kprintf("..%02x [%d]\n", bitx->array[(i / 8) - 1], i);
00231             j = 0;
00232             continue;
00233         }
00234         j++;
00235     }
00236
00237     if (j != 0)
00238         kprintf("..%02x [%d]\n", bitx->array[i / 8], i);
00239 }
00240
00257 INLINE void bitarray_init(BitArray *bitx, size_t bitarray_len, uint8_t *array, size_t size)
00258 {
00259     bitx->size = size;
00260     bitx->array = array;
00261     bitx->bitarray_len = bitarray_len;
00262 }
00263
00264
00265 int bitarray_testSetup(void);
00266 int bitarray_testRun(void);
00267 int bitarray_testTearDown(void);
00268
00269 #endif /* STRUCT_BITARRAY_H */


BeRTOS: bitmap.c File Reference

  • gfx
Functions
bitmap.c File Reference

Bitmap manipulation routines. More...

#include "gfx.h"
#include "gfx_p.h"
#include "cfg/cfg_gfx.h"
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <cpu/attr.h>
#include <string.h>

Go to the source code of this file.

Functions

void | gfx_bitmapInit (Bitmap *bm, uint8_t *raster, coord_t w, coord_t h)
Initialize a Bitmap structure with the provided parameters.
void | gfx_bitmapClear (Bitmap *bm)
Clear the whole bitmap surface to the background color.
void | gfx_blit (Bitmap *dst, const Rect *rect, const Bitmap *src, coord_t srcx, coord_t srcy)
Copy a rectangular area of a bitmap on another bitmap.
void | gfx_blitRaster (Bitmap *dst, coord_t dxmin, coord_t dymin, const uint8_t *raster, coord_t w, coord_t h, coord_t stride)
Blit a raster to a Bitmap.
void | gfx_blitImage (Bitmap *dst, coord_t dxmin, coord_t dymin, const Image *image)
Blit an Image to a Bitmap.

Detailed Description

Bitmap manipulation routines.

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>
See also:
gfx.h

Definition in file bitmap.c.

Function Documentation

void gfx_bitmapClear ( Bitmap * bm )

Clear the whole bitmap surface to the background color.

Note:
This function does not update the current pen position.
This function bypasses the current clipping area.

Definition at line 97 of file bitmap.c.

void gfx_bitmapInit | ( | Bitmap * | bm,
 |  | uint8_t * | raster,
 |  | coord_t | w,
 |  | coord_t | h
 | ) |  |

Initialize a Bitmap structure with the provided parameters.

Note:
The pen position is reset to the origin.

Definition at line 62 of file bitmap.c.

void gfx_blit | ( | Bitmap * | dst,
 |  | const Rect * | rect,
 |  | const Bitmap * | src,
 |  | coord_t | srcx,
 |  | coord_t | srcy
 | ) |  |

Copy a rectangular area of a bitmap on another bitmap.

Blitting is a common copy operation involving two bitmaps. A rectangular area of the source bitmap is copied bit-wise to a different position in the destination bitmap.

Note:
Using the same bitmap for src and dst is unsupported.
Parameters:
dst | Bitmap where the operation writes.
rect | The (xmin;ymin) coordinates provide the top/left offset for drawing in the destination bitmap. If the source bitmap is larger than the rectangle, drawing is clipped.
src | Bitmap containing the source pixels.
srcx | Starting X offset in the source bitmap.
srcy | Starting Y offset in the source bitmap.

Definition at line 164 of file bitmap.c.

void gfx_blitImage | ( | Bitmap * | dst,
 |  | coord_t | dxmin,
 |  | coord_t | dymin,
 |  | const Image * | image
 | ) |  |

Blit an Image to a Bitmap.

See also:
gfx_blit()

Definition at line 222 of file bitmap.c.

void gfx_blitRaster | ( | Bitmap * | dst,
 |  | coord_t | dxmin,
 |  | coord_t | dymin,
 |  | const uint8_t * | raster,
 |  | coord_t | w,
 |  | coord_t | h,
 |  | coord_t | stride
 | ) |  |

Blit a raster to a Bitmap.

See also:
gfx_blit()

Definition at line 197 of file bitmap.c.


BeRTOS: bitmap.c Source File

  • gfx
bitmap.c
Go to the documentation of this file.
00001
00041 #include "gfx.h"
00042 #include "gfx_p.h"
00043
00044 #include "cfg/cfg_gfx.h"  /* CONFIG_GFX_CLIPPING */
00045 #include <cfg/macros.h>   /* MIN() */
00046 #include <cfg/debug.h>    /* ASSERT() */
00047
00048 #include <cpu/attr.h>     /* CPU_HARVARD */
00049
00050 #include <string.h>     /* memset() */
00051
00052 #if CONFIG_GFX_TEXT
00053 #include <gfx/font.h>   /* default_font */
00054 #endif
00055
00056
00062 void gfx_bitmapInit(Bitmap *bm, uint8_t *raster, coord_t w, coord_t h)
00063 {
00064     bm->raster = raster;
00065     bm->width = w;
00066     bm->height = h;
00067     #if (CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_H_MSB)
00068         bm->stride = (w + 7) / 8;
00069     #elif CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_V_LSB
00070         bm->stride = w;
00071     #else
00072         #error Unknown value of CONFIG_BITMAP_FMT
00073     #endif /* CONFIG_BITMAP_FMT */
00074     bm->penX = 0;
00075     bm->penY = 0;
00076
00077 #if CONFIG_GFX_TEXT
00078     gfx_setFont(bm, &default_font);
00079     bm->styles = 0;
00080 #endif
00081
00082 #if CONFIG_GFX_CLIPPING
00083     bm->cr.xmin = 0;
00084     bm->cr.ymin = 0;
00085     bm->cr.xmax = w;
00086     bm->cr.ymax = h;
00087 #endif /* CONFIG_GFX_CLIPPING */
00088 }
00089
00090
00097 void gfx_bitmapClear(Bitmap *bm)
00098 {
00099     memset(bm->raster, 0, RAST_SIZE(bm->width, bm->height));
00100 }
00101
00102
00103 #if CPU_HARVARD
00104
00105 #include <avr/pgmspace.h> /* FIXME: memcpy_P() */
00106
00113 void gfx_blit_P(Bitmap *bm, const pgm_uint8_t *raster)
00114 {
00115     memcpy_P(bm->raster, raster, RAST_SIZE(bm->width, bm->height));
00116 }
00117 #endif /* CPU_HARVARD */
00118
00119 #if CONFIG_GFX_CLIPPING
00120
00130     #define gfx_clip(dmin, dmax, smin, cmin, cmax) \
00131         do { \
00132             if ((dmin) < (cmin)) \
00133             { \
00134                 (smin) += (cmin) - (dmin); \
00135                 (dmin) = (cmin); \
00136             } \
00137             (dmax) = MIN((dmax), (cmax)); \
00138         } while(0)
00139
00140 #else /* !CONFIG_GFX_CLIPPING */
00141
00142     #define gfx_clip(dmin, dmax, smin, cmin, cmax) do { } while (0)
00143
00144 #endif /* !CONFIG_GFX_CLIPPING */
00145
00146
00164 void gfx_blit(Bitmap *dst, const Rect *rect, const Bitmap *src, coord_t srcx, coord_t srcy)
00165 {
00166     coord_t dxmin, dymin, dxmax, dymax;
00167     coord_t dx, dy, sx, sy;
00168
00169     /*
00170      * Pre-clip coordinates inside src->width/height.
00171      */
00172     dxmin = rect->xmin;
00173     dymin = rect->ymin;
00174     dxmax = MIN(rect->xmax, rect->xmin + src->width);
00175     dymax = MIN(rect->ymax, rect->ymin + src->height);
00176
00177     /* Perform regular clipping */
00178     gfx_clip(dxmin, dxmax, srcx, dst->cr.xmin, dst->cr.xmax);
00179     gfx_clip(dymin, dymax, srcy, dst->cr.ymin, dst->cr.ymax);
00180
00181     //kprintf("dxmin=%d, sxmin=%d, dxmax=%d; ", dxmin, sxmin, dxmax);
00182     //kprintf("dymin=%d, symin=%d, dymax=%d\n", dymin, symin, dymax);
00183
00184     /* TODO: make it not as dog slow as this */
00185     for (dx = dxmin, sx = srcx; dx < dxmax; ++dx, ++sx)
00186         for (dy = dymin, sy = srcy; dy < dymax; ++dy, ++sy)
00187             BM_DRAWPIXEL(dst, dx, dy, BM_READPIXEL(src, sx, sy));
00188 }
00189
00197 void gfx_blitRaster(Bitmap *dst, coord_t dxmin, coord_t dymin,
00198         const uint8_t *raster, coord_t w, coord_t h, coord_t stride)
00199 {
00200     coord_t dxmax = dxmin + w, dymax = dymin + h;
00201     coord_t sxmin = 0, symin = 0;
00202     coord_t dx, dy, sx, sy;
00203
00204     /* Perform regular clipping */
00205     gfx_clip(dxmin, dxmax, sxmin, dst->cr.xmin, dst->cr.xmax);
00206     gfx_clip(dymin, dymax, symin, dst->cr.ymin, dst->cr.ymax);
00207
00208     //kprintf("dxmin=%d, sxmin=%d, dxmax=%d; ", dxmin, sxmin, dxmax);
00209     //kprintf("dymin=%d, symin=%d, dymax=%d\n", dymin, symin, dymax);
00210
00211     /* TODO: make it not as dog slow as this */
00212     for (dx = dxmin, sx = sxmin; dx < dxmax; ++dx, ++sx)
00213         for (dy = dymin, sy = symin; dy < dymax; ++dy, ++sy)
00214             BM_DRAWPIXEL(dst, dx, dy, RAST_READPIXEL(raster, sx, sy, stride));
00215 }
00216
00222 void gfx_blitImage(Bitmap *dst, coord_t dxmin, coord_t dymin, const Image *image)
00223 {
00224     ASSERT(image);
00225
00226     gfx_blitRaster(dst, dxmin, dymin,
00227             image->raster, image->width, image->height, image->stride);
00228 }
00229
00230
00231 #if CONFIG_GFX_CLIPPING || CONFIG_GFX_VCOORDS
00232
00248 void gfx_setClipRect(Bitmap *bm, coord_t minx, coord_t miny, coord_t maxx, coord_t maxy)
00249 {
00250     ASSERT(minx < maxx);
00251     ASSERT(miny < maxy);
00252     ASSERT(miny >= 0);
00253     ASSERT(minx >= 0);
00254     ASSERT(maxx <= bm->width);
00255     ASSERT(maxy <= bm->height);
00256
00257     bm->cr.xmin = minx;
00258     bm->cr.ymin = miny;
00259     bm->cr.xmax = maxx;
00260     bm->cr.ymax = maxy;
00261
00262 //  kprintf("cr.xmin = %d, cr.ymin = %d, cr.xmax = %d, cr.ymax = %d\n",
00263 //      bm->cr.xMin, bm->cr.ymin, bm->cr.xmax, bm->cr.ymax);
00264 }
00265
00266 #endif /* CONFIG_GFX_CLIPPING */
00267


BeRTOS: blanker.c File Reference

  • mware
Variables
blanker.c File Reference

Display Blanker (implementation). More...

#include "blanker.h"
#include "hw/hw_blanker.h"
#include <drv/kbd.h>
#include <drv/timer.h>

Go to the source code of this file.

Variables

static KbdHandler | blk_KbdHandler
Keyboard event handler to listen for key presses in blanker.
static ticks_t | blk_lastevent
Time since last key event.
static bool | blk_enabled
Display blanking function is enabled.
static bool | blk_active
Display blanker is engaged right now.

Detailed Description

Display Blanker (implementation).

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file blanker.c.

Variable Documentation

bool blk_active [static]

Display blanker is engaged right now.

Definition at line 61 of file blanker.c.

bool blk_enabled [static]

Display blanking function is enabled.

Definition at line 58 of file blanker.c.

KbdHandler blk_KbdHandler [static]

Keyboard event handler to listen for key presses in blanker.

Definition at line 52 of file blanker.c.

ticks_t blk_lastevent [static]

Time since last key event.

Definition at line 55 of file blanker.c.


BeRTOS: blanker.c Source File

  • mware
blanker.c
Go to the documentation of this file.
00001
00039 #include "blanker.h"
00040 #include "hw/hw_blanker.h"
00041
00042 #include <drv/kbd.h>
00043 #include <drv/timer.h>
00044
00045 /* Time without input events before starting blanker */
00046 #define BLK_BLANKTIMEOUT    (15 * 1000) /* ms */
00047
00048
00049 #warning FIXME:Revise me!
00050
00052 static KbdHandler blk_KbdHandler;
00053
00055 static ticks_t blk_lastevent;
00056
00058 static bool blk_enabled;
00059
00061 static bool blk_active;
00062
00063
00064 static bool blk_on(void)
00065 {
00066     if (!blk_active)
00067     {
00068         blk_active = true;
00069         BLK_LCDOFF;
00070     }
00071     return true;
00072 }
00073
00074
00075 static void blk_off(void)
00076 {
00077     if (blk_active)
00078     {
00079         blk_active = false;
00080         BLK_LCDON;
00081     }
00082 }
00083
00084
00085 void blk_retrigger(void)
00086 {
00087     blk_lastevent = timer_clock();
00088     blk_off();
00089 }
00090
00091 #if 0
00092
00095 static void blk_hack(void)
00096 {
00097     static signed char blk_colstart[CONFIG_LCD_COLS];
00098     UBYTE row, col;
00099
00100
00101     if (rand()%3 == 0)
00102     {
00103         /* Modify one column */
00104         col = rand() % CONFIG_LCD_COLS;
00105         blk_colstart[col] += rand() % 12 - 5;
00106     }
00107
00108     for (col = 0; col < CONFIG_LCD_COLS; ++col)
00109     {
00110         if (blk_colstart[col] > 0)
00111         {
00112             --blk_colstart[col];
00113
00114             /* Scroll down */
00115             for(row = CONFIG_LCD_ROWS-1; row; --row)
00116             {
00117                 lcd_SetAddr(blk_layer, LCD_POS(col,row));
00118                 lcd_PutChar(blk_layer->Buf[LCD_POS(col,row-1)], blk_layer);
00119             }
00120
00121             /* Add new kanji */
00122             lcd_SetAddr(blk_layer, LCD_POS(col,0));
00123             lcd_PutChar((char)(rand() % 127 + 128), blk_layer);
00124         }
00125         else if (blk_colstart[col] < 0)
00126         {
00127             ++blk_colstart[col];
00128
00129             /* Clear tail */
00130             for(row = 0; row < CONFIG_LCD_ROWS; ++row)
00131             {
00132                 if (blk_layer->Buf[LCD_POS(col,row)] != ' ')
00133                 {
00134                     lcd_SetAddr(blk_layer, LCD_POS(col,row));
00135                     lcd_PutChar(' ', blk_layer);
00136                     break;
00137                 }
00138             }
00139         }
00140     }
00141 }
00142 #endif
00143
00144
00145 static keymask_t blk_handlerFunc(keymask_t key)
00146 {
00147     /* key used to turn off blanker */
00148     static keymask_t offkey;
00149
00150     ticks_t now = timer_clock();
00151
00152     /* If key pressed */
00153     if (key != 0)
00154     {
00155         blk_lastevent = now;
00156         if (blk_active)
00157         {
00158             blk_off();
00159
00160             /* remember and eat key event */
00161             offkey = key;
00162             key = 0;
00163         }
00164         else if (key == offkey)
00165         {
00166             /* keep eating the key until released */
00167             key = 0;
00168         }
00169
00170         /* pass key through */
00171         return key;
00172     }
00173
00174     /* reset off key */
00175     offkey = 0;
00176
00177     /* Blank timeout reached? */
00178     if (now - blk_lastevent > ms_to_ticks(BLK_BLANKTIMEOUT))
00179     {
00180         /* Enable blanker unless already done */
00181         if (!blk_active && !blk_on())
00182             return 0;
00183
00184 #if 0
00185         /* Do some nice visual effect */
00186         blk_hack();
00187 #endif /* _DEBUG */
00188     }
00189
00190     return 0;
00191 }
00192
00193
00194 void blk_enable(void)
00195 {
00196     if (!blk_enabled)
00197     {
00198         blk_active = false;
00199         blk_lastevent = timer_clock();
00200
00201         /* Add display blanker handler */
00202         blk_KbdHandler.hook = blk_handlerFunc;
00203         blk_KbdHandler.pri = 100; /* high priority */
00204         blk_KbdHandler.flags = KHF_RAWKEYS;
00205         kbd_addHandler(&blk_KbdHandler);
00206
00207         blk_enabled = true;
00208     }
00209 }
00210
00211
00212 void blk_disable(void)
00213 {
00214     if (blk_enabled)
00215     {
00216         kbd_remHandler(&blk_KbdHandler);
00217         blk_off();
00218         blk_enabled = false;
00219     }
00220 }
00221


BeRTOS: blanker.h File Reference

  • mware
blanker.h File Reference

Display Blanker (implementation). More...

Go to the source code of this file.

Detailed Description

Display Blanker (implementation).

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file blanker.h.


BeRTOS: blanker.h Source File

  • mware
blanker.h
Go to the documentation of this file.
00001
00038 #ifndef MWARE_BLANKER_H
00039 #define MWARE_BLANKER_H
00040
00041 extern void blk_enable(void);
00042 extern void blk_disable(void);
00043 extern void blk_retrigger(void);
00044
00045 #endif /* MWARE_BLANKER_H */


BeRTOS: blowfish.c File Reference

  • sec
  • cipher
blowfish.c File Reference

Blowfish implementation. More...

#include "blowfish.h"
#include <cfg/macros.h>
#include <cpu/byteorder.h>
#include <string.h>

Go to the source code of this file.

Detailed Description

Blowfish implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file blowfish.c.


BeRTOS: blowfish.c Source File

  • sec
  • cipher
blowfish.c
Go to the documentation of this file.
00001
00040 #include "blowfish.h"
00041 #include <cfg/macros.h>
00042 #include <cpu/byteorder.h>
00043 #include <string.h>
00044
00045 #define N 16
00046
00047 static const uint32_t P[16 + 2] =
00048 {
00049     0x243F6A88L, 0x85A308D3L, 0x13198A2EL, 0x03707344L,
00050     0xA4093822L, 0x299F31D0L, 0x082EFA98L, 0xEC4E6C89L,
00051     0x452821E6L, 0x38D01377L, 0xBE5466CFL, 0x34E90C6CL,
00052     0xC0AC29B7L, 0xC97C50DDL, 0x3F84D5B5L, 0xB5470917L,
00053     0x9216D5D9L, 0x8979FB1BL
00054 };
00055
00056 static const uint32_t S[4][256] =
00057 {
00058     {
00059         0xD1310BA6L, 0x98DFB5ACL, 0x2FFD72DBL, 0xD01ADFB7L,
00060         0xB8E1AFEDL, 0x6A267E96L, 0xBA7C9045L, 0xF12C7F99L,
00061         0x24A19947L, 0xB3916CF7L, 0x0801F2E2L, 0x858EFC16L,
00062         0x636920D8L, 0x71574E69L, 0xA458FEA3L, 0xF4933D7EL,
00063         0x0D95748FL, 0x728EB658L, 0x718BCD58L, 0x82154AEEL,
00064         0x7B54A41DL, 0xC25A59B5L, 0x9C30D539L, 0x2AF26013L,
00065         0xC5D1B023L, 0x286085F0L, 0xCA417918L, 0xB8DB38EFL,
00066         0x8E79DCB0L, 0x603A180EL, 0x6C9E0E8BL, 0xB01E8A3EL,
00067         0xD71577C1L, 0xBD314B27L, 0x78AF2FDAL, 0x55605C60L,
00068         0xE65525F3L, 0xAA55AB94L, 0x57489862L, 0x63E81440L,
00069         0x55CA396AL, 0x2AAB10B6L, 0xB4CC5C34L, 0x1141E8CEL,
00070         0xA15486AFL, 0x7C72E993L, 0xB3EE1411L, 0x636FBC2AL,
00071         0x2BA9C55DL, 0x741831F6L, 0xCE5C3E16L, 0x9B87931EL,
00072         0xAFD6BA33L, 0x6C24CF5CL, 0x7A325381L, 0x28958677L,
00073         0x3B8F4898L, 0x6B4BB9AFL, 0xC4BFE81BL, 0x66282193L,
00074         0x61D809CCL, 0xFB21A991L, 0x487CAC60L, 0x5DEC8032L,
00075         0xEF845D5DL, 0xE98575B1L, 0xDC262302L, 0xEB651B88L,
00076         0x23893E81L, 0xD396ACC5L, 0x0F6D6FF3L, 0x83F44239L,
00077         0x2E0B4482L, 0xA4842004L, 0x69C8F04AL, 0x9E1F9B5EL,
00078         0x21C66842L, 0xF6E96C9AL, 0x670C9C61L, 0xABD388F0L,
00079         0x6A51A0D2L, 0xD8542F68L, 0x960FA728L, 0xAB5133A3L,
00080         0x6EEF0B6CL, 0x137A3BE4L, 0xBA3BF050L, 0x7EFB2A98L,
00081         0xA1F1651DL, 0x39AF0176L, 0x66CA593EL, 0x82430E88L,
00082         0x8CEE8619L, 0x456F9FB4L, 0x7D84A5C3L, 0x3B8B5EBEL,
00083         0xE06F75D8L, 0x85C12073L, 0x401A449FL, 0x56C16AA6L,
00084         0x4ED3AA62L, 0x363F7706L, 0x1BFEDF72L, 0x429B023DL,
00085         0x37D0D724L, 0xD00A1248L, 0xDB0FEAD3L, 0x49F1C09BL,
00086         0x075372C9L, 0x80991B7BL, 0x25D479D8L, 0xF6E8DEF7L,
00087         0xE3FE501AL, 0xB6794C3BL, 0x976CE0BDL, 0x04C006BAL,
00088         0xC1A94FB6L, 0x409F60C4L, 0x5E5C9EC2L, 0x196A2463L,
00089         0x68FB6FAFL, 0x3E6C53B5L, 0x1339B2EBL, 0x3B52EC6FL,
00090         0x6DFC511FL, 0x9B30952CL, 0xCC814544L, 0xAF5EBD09L,
00091         0xBEE3D004L, 0xDE334AFDL, 0x660F2807L, 0x192E4BB3L,
00092         0xC0CBA857L, 0x45C8740FL, 0xD20B5F39L, 0xB9D3FBDBL,
00093         0x5579C0BDL, 0x1A60320AL, 0xD6A100C6L, 0x402C7279L,
00094         0x679F25FEL, 0xFB1FA3CCL, 0x8EA5E9F8L, 0xDB3222F8L,
00095         0x3C7516DFL, 0xFD616B15L, 0x2F501EC8L, 0xAD0552ABL,
00096         0x323DB5FAL, 0xFD238760L, 0x53317B48L, 0x3E00DF82L,
00097         0x9E5C57BBL, 0xCA6F8CA0L, 0x1A87562EL, 0xDF1769DBL,
00098         0xD542A8F6L, 0x287EFFC3L, 0xAC6732C6L, 0x8C4F5573L,
00099         0x695B27B0L, 0xBBCA58C8L, 0xE1FFA35DL, 0xB8F011A0L,
00100         0x10FA3D98L, 0xFD2183B8L, 0x4AFCB56CL, 0x2DD1D35BL,
00101         0x9A53E479L, 0xB6F84565L, 0xD28E49BCL, 0x4BFB9790L,
00102         0xE1DDF2DAL, 0xA4CB7E33L, 0x62FB1341L, 0xCEE4C6E8L,
00103         0xEF20CADAL, 0x36774C01L, 0xD07E9EFEL, 0x2BF11FB4L,
00104         0x95DBDA4DL, 0xAE909198L, 0xEAAD8E71L, 0x6B93D5A0L,
00105         0xD08ED1D0L, 0xAFC725E0L, 0x8E3C5B2FL, 0x8E7594B7L,
00106         0x8FF6E2FBL, 0xF2122B64L, 0x8888B812L, 0x900DF01CL,
00107         0x4FAD5EA0L, 0x688FC31CL, 0xD1CFF191L, 0xB3A8C1ADL,
00108         0x2F2F2218L, 0xBE0E1777L, 0xEA752DFEL, 0x8B021FA1L,
00109         0xE5A0CC0FL, 0xB56F74E8L, 0x18ACF3D6L, 0xCE89E299L,
00110         0xB4A84FE0L, 0xFD13E0B7L, 0x7CC43B81L, 0xD2ADA8D9L,
00111         0x165FA266L, 0x80957705L, 0x93CC7314L, 0x211A1477L,
00112         0xE6AD2065L, 0x77B5FA86L, 0xC75442F5L, 0xFB9D35CFL,
00113         0xEBCDAF0CL, 0x7B3E89A0L, 0xD6411BD3L, 0xAE1E7E49L,
00114         0x00250E2DL, 0x2071B35EL, 0x226800BBL, 0x57B8E0AFL,
00115         0x2464369BL, 0xF009B91EL, 0x5563911DL, 0x59DFA6AAL,
00116         0x78C14389L, 0xD95A537FL, 0x207D5BA2L, 0x02E5B9C5L,
00117         0x83260376L, 0x6295CFA9L, 0x11C81968L, 0x4E734A41L,
00118         0xB3472DCAL, 0x7B14A94AL, 0x1B510052L, 0x9A532915L,
00119         0xD60F573FL, 0xBC9BC6E4L, 0x2B60A476L, 0x81E67400L,
00120         0x08BA6FB5L, 0x571BE91FL, 0xF296EC6BL, 0x2A0DD915L,
00121         0xB6636521L, 0xE7B9F9B6L, 0xFF34052EL, 0xC5855664L,
00122         0x53B02D5DL, 0xA99F8FA1L, 0x08BA4799L, 0x6E85076AL,
00123     },
00124     {
00125         0x4B7A70E9L, 0xB5B32944L, 0xDB75092EL, 0xC4192623L,
00126         0xAD6EA6B0L, 0x49A7DF7DL, 0x9CEE60B8L, 0x8FEDB266L,
00127         0xECAA8C71L, 0x699A17FFL, 0x5664526CL, 0xC2B19EE1L,
00128         0x193602A5L, 0x75094C29L, 0xA0591340L, 0xE4183A3EL,
00129         0x3F54989AL, 0x5B429D65L, 0x6B8FE4D6L, 0x99F73FD6L,
00130         0xA1D29C07L, 0xEFE830F5L, 0x4D2D38E6L, 0xF0255DC1L,
00131         0x4CDD2086L, 0x8470EB26L, 0x6382E9C6L, 0x021ECC5EL,
00132         0x09686B3FL, 0x3EBAEFC9L, 0x3C971814L, 0x6B6A70A1L,
00133         0x687F3584L, 0x52A0E286L, 0xB79C5305L, 0xAA500737L,
00134         0x3E07841CL, 0x7FDEAE5CL, 0x8E7D44ECL, 0x5716F2B8L,
00135         0xB03ADA37L, 0xF0500C0DL, 0xF01C1F04L, 0x0200B3FFL,
00136         0xAE0CF51AL, 0x3CB574B2L, 0x25837A58L, 0xDC0921BDL,
00137         0xD19113F9L, 0x7CA92FF6L, 0x94324773L, 0x22F54701L,
00138         0x3AE5E581L, 0x37C2DADCL, 0xC8B57634L, 0x9AF3DDA7L,
00139         0xA9446146L, 0x0FD0030EL, 0xECC8C73EL, 0xA4751E41L,
00140         0xE238CD99L, 0x3BEA0E2FL, 0x3280BBA1L, 0x183EB331L,
00141         0x4E548B38L, 0x4F6DB908L, 0x6F420D03L, 0xF60A04BFL,
00142         0x2CB81290L, 0x24977C79L, 0x5679B072L, 0xBCAF89AFL,
00143         0xDE9A771FL, 0xD9930810L, 0xB38BAE12L, 0xDCCF3F2EL,
00144         0x5512721FL, 0x2E6B7124L, 0x501ADDE6L, 0x9F84CD87L,
00145         0x7A584718L, 0x7408DA17L, 0xBC9F9ABCL, 0xE94B7D8CL,
00146         0xEC7AEC3AL, 0xDB851DFAL, 0x63094366L, 0xC464C3D2L,
00147         0xEF1C1847L, 0x3215D908L, 0xDD433B37L, 0x24C2BA16L,
00148         0x12A14D43L, 0x2A65C451L, 0x50940002L, 0x133AE4DDL,
00149         0x71DFF89EL, 0x10314E55L, 0x81AC77D6L, 0x5F11199BL,
00150         0x043556F1L, 0xD7A3C76BL, 0x3C11183BL, 0x5924A509L,
00151         0xF28FE6EDL, 0x97F1FBFAL, 0x9EBABF2CL, 0x1E153C6EL,
00152         0x86E34570L, 0xEAE96FB1L, 0x860E5E0AL, 0x5A3E2AB3L,
00153         0x771FE71CL, 0x4E3D06FAL, 0x2965DCB9L, 0x99E71D0FL,
00154         0x803E89D6L, 0x5266C825L, 0x2E4CC978L, 0x9C10B36AL,
00155         0xC6150EBAL, 0x94E2EA78L, 0xA5FC3C53L, 0x1E0A2DF4L,
00156         0xF2F74EA7L, 0x361D2B3DL, 0x1939260FL, 0x19C27960L,
00157         0x5223A708L, 0xF71312B6L, 0xEBADFE6EL, 0xEAC31F66L,
00158         0xE3BC4595L, 0xA67BC883L, 0xB17F37D1L, 0x018CFF28L,
00159         0xC332DDEFL, 0xBE6C5AA5L, 0x65582185L, 0x68AB9802L,
00160         0xEECEA50FL, 0xDB2F953BL, 0x2AEF7DADL, 0x5B6E2F84L,
00161         0x1521B628L, 0x29076170L, 0xECDD4775L, 0x619F1510L,
00162         0x13CCA830L, 0xEB61BD96L, 0x0334FE1EL, 0xAA0363CFL,
00163         0xB5735C90L, 0x4C70A239L, 0xD59E9E0BL, 0xCBAADE14L,
00164         0xEECC86BCL, 0x60622CA7L, 0x9CAB5CABL, 0xB2F3846EL,
00165         0x648B1EAFL, 0x19BDF0CAL, 0xA02369B9L, 0x655ABB50L,
00166         0x40685A32L, 0x3C2AB4B3L, 0x319EE9D5L, 0xC021B8F7L,
00167         0x9B540B19L, 0x875FA099L, 0x95F7997EL, 0x623D7DA8L,
00168         0xF837889AL, 0x97E32D77L, 0x11ED935FL, 0x16681281L,
00169         0x0E358829L, 0xC7E61FD6L, 0x96DEDFA1L, 0x7858BA99L,
00170         0x57F584A5L, 0x1B227263L, 0x9B83C3FFL, 0x1AC24696L,
00171         0xCDB30AEBL, 0x532E3054L, 0x8FD948E4L, 0x6DBC3128L,
00172         0x58EBF2EFL, 0x34C6FFEAL, 0xFE28ED61L, 0xEE7C3C73L,
00173         0x5D4A14D9L, 0xE864B7E3L, 0x42105D14L, 0x203E13E0L,
00174         0x45EEE2B6L, 0xA3AAABEAL, 0xDB6C4F15L, 0xFACB4FD0L,
00175         0xC742F442L, 0xEF6ABBB5L, 0x654F3B1DL, 0x41CD2105L,
00176         0xD81E799EL, 0x86854DC7L, 0xE44B476AL, 0x3D816250L,
00177         0xCF62A1F2L, 0x5B8D2646L, 0xFC8883A0L, 0xC1C7B6A3L,
00178         0x7F1524C3L, 0x69CB7492L, 0x47848A0BL, 0x5692B285L,
00179         0x095BBF00L, 0xAD19489DL, 0x1462B174L, 0x23820E00L,
00180         0x58428D2AL, 0x0C55F5EAL, 0x1DADF43EL, 0x233F7061L,
00181         0x3372F092L, 0x8D937E41L, 0xD65FECF1L, 0x6C223BDBL,
00182         0x7CDE3759L, 0xCBEE7460L, 0x4085F2A7L, 0xCE77326EL,
00183         0xA6078084L, 0x19F8509EL, 0xE8EFD855L, 0x61D99735L,
00184         0xA969A7AAL, 0xC50C06C2L, 0x5A04ABFCL, 0x800BCADCL,
00185         0x9E447A2EL, 0xC3453484L, 0xFDD56705L, 0x0E1E9EC9L,
00186         0xDB73DBD3L, 0x105588CDL, 0x675FDA79L, 0xE3674340L,
00187         0xC5C43465L, 0x713E38D8L, 0x3D28F89EL, 0xF16DFF20L,
00188         0x153E21E7L, 0x8FB03D4AL, 0xE6E39F2BL, 0xDB83ADF7L,
00189     },
00190     {
00191         0xE93D5A68L, 0x948140F7L, 0xF64C261CL, 0x94692934L,
00192         0x411520F7L, 0x7602D4F7L, 0xBCF46B2EL, 0xD4A20068L,
00193         0xD4082471L, 0x3320F46AL, 0x43B7D4B7L, 0x500061AFL,
00194         0x1E39F62EL, 0x97244546L, 0x14214F74L, 0xBF8B8840L,
00195         0x4D95FC1DL, 0x96B591AFL, 0x70F4DDD3L, 0x66A02F45L,
00196         0xBFBC09ECL, 0x03BD9785L, 0x7FAC6DD0L, 0x31CB8504L,
00197         0x96EB27B3L, 0x55FD3941L, 0xDA2547E6L, 0xABCA0A9AL,
00198         0x28507825L, 0x530429F4L, 0x0A2C86DAL, 0xE9B66DFBL,
00199         0x68DC1462L, 0xD7486900L, 0x680EC0A4L, 0x27A18DEEL,
00200         0x4F3FFEA2L, 0xE887AD8CL, 0xB58CE006L, 0x7AF4D6B6L,
00201         0xAACE1E7CL, 0xD3375FECL, 0xCE78A399L, 0x406B2A42L,
00202         0x20FE9E35L, 0xD9F385B9L, 0xEE39D7ABL, 0x3B124E8BL,
00203         0x1DC9FAF7L, 0x4B6D1856L, 0x26A36631L, 0xEAE397B2L,
00204         0x3A6EFA74L, 0xDD5B4332L, 0x6841E7F7L, 0xCA7820FBL,
00205         0xFB0AF54EL, 0xD8FEB397L, 0x454056ACL, 0xBA489527L,
00206         0x55533A3AL, 0x20838D87L, 0xFE6BA9B7L, 0xD096954BL,
00207         0x55A867BCL, 0xA1159A58L, 0xCCA92963L, 0x99E1DB33L,
00208         0xA62A4A56L, 0x3F3125F9L, 0x5EF47E1CL, 0x9029317CL,
00209         0xFDF8E802L, 0x04272F70L, 0x80BB155CL, 0x05282CE3L,
00210         0x95C11548L, 0xE4C66D22L, 0x48C1133FL, 0xC70F86DCL,
00211         0x07F9C9EEL, 0x41041F0FL, 0x404779A4L, 0x5D886E17L,
00212         0x325F51EBL, 0xD59BC0D1L, 0xF2BCC18FL, 0x41113564L,
00213         0x257B7834L, 0x602A9C60L, 0xDFF8E8A3L, 0x1F636C1BL,
00214         0x0E12B4C2L, 0x02E1329EL, 0xAF664FD1L, 0xCAD18115L,
00215         0x6B2395E0L, 0x333E92E1L, 0x3B240B62L, 0xEEBEB922L,
00216         0x85B2A20EL, 0xE6BA0D99L, 0xDE720C8CL, 0x2DA2F728L,
00217         0xD0127845L, 0x95B794FDL, 0x647D0862L, 0xE7CCF5F0L,
00218         0x5449A36FL, 0x877D48FAL, 0xC39DFD27L, 0xF33E8D1EL,
00219         0x0A476341L, 0x992EFF74L, 0x3A6F6EABL, 0xF4F8FD37L,
00220         0xA812DC60L, 0xA1EBDDF8L, 0x991BE14CL, 0xDB6E6B0DL,
00221         0xC67B5510L, 0x6D672C37L, 0x2765D43BL, 0xDCD0E804L,
00222         0xF1290DC7L, 0xCC00FFA3L, 0xB5390F92L, 0x690FED0BL,
00223         0x667B9FFBL, 0xCEDB7D9CL, 0xA091CF0BL, 0xD9155EA3L,
00224         0xBB132F88L, 0x515BAD24L, 0x7B9479BFL, 0x763BD6EBL,
00225         0x37392EB3L, 0xCC115979L, 0x8026E297L, 0xF42E312DL,
00226         0x6842ADA7L, 0xC66A2B3BL, 0x12754CCCL, 0x782EF11CL,
00227         0x6A124237L, 0xB79251E7L, 0x06A1BBE6L, 0x4BFB6350L,
00228         0x1A6B1018L, 0x11CAEDFAL, 0x3D25BDD8L, 0xE2E1C3C9L,
00229         0x44421659L, 0x0A121386L, 0xD90CEC6EL, 0xD5ABEA2AL,
00230         0x64AF674EL, 0xDA86A85FL, 0xBEBFE988L, 0x64E4C3FEL,
00231         0x9DBC8057L, 0xF0F7C086L, 0x60787BF8L, 0x6003604DL,
00232         0xD1FD8346L, 0xF6381FB0L, 0x7745AE04L, 0xD736FCCCL,
00233         0x83426B33L, 0xF01EAB71L, 0xB0804187L, 0x3C005E5FL,
00234         0x77A057BEL, 0xBDE8AE24L, 0x55464299L, 0xBF582E61L,
00235         0x4E58F48FL, 0xF2DDFDA2L, 0xF474EF38L, 0x8789BDC2L,
00236         0x5366F9C3L, 0xC8B38E74L, 0xB475F255L, 0x46FCD9B9L,
00237         0x7AEB2661L, 0x8B1DDF84L, 0x846A0E79L, 0x915F95E2L,
00238         0x466E598EL, 0x20B45770L, 0x8CD55591L, 0xC902DE4CL,
00239         0xB90BACE1L, 0xBB8205D0L, 0x11A86248L, 0x7574A99EL,
00240         0xB77F19B6L, 0xE0A9DC09L, 0x662D09A1L, 0xC4324633L,
00241         0xE85A1F02L, 0x09F0BE8CL, 0x4A99A025L, 0x1D6EFE10L,
00242         0x1AB93D1DL, 0x0BA5A4DFL, 0xA186F20FL, 0x2868F169L,
00243         0xDCB7DA83L, 0x573906FEL, 0xA1E2CE9BL, 0x4FCD7F52L,
00244         0x50115E01L, 0xA70683FAL, 0xA002B5C4L, 0x0DE6D027L,
00245         0x9AF88C27L, 0x773F8641L, 0xC3604C06L, 0x61A806B5L,
00246         0xF0177A28L, 0xC0F586E0L, 0x006058AAL, 0x30DC7D62L,
00247         0x11E69ED7L, 0x2338EA63L, 0x53C2DD94L, 0xC2C21634L,
00248         0xBBCBEE56L, 0x90BCB6DEL, 0xEBFC7DA1L, 0xCE591D76L,
00249         0x6F05E409L, 0x4B7C0188L, 0x39720A3DL, 0x7C927C24L,
00250         0x86E3725FL, 0x724D9DB9L, 0x1AC15BB4L, 0xD39EB8FCL,
00251         0xED545578L, 0x08FCA5B5L, 0xD83D7CD3L, 0x4DAD0FC4L,
00252         0x1E50EF5EL, 0xB161E6F8L, 0xA28514D9L, 0x6C51133CL,
00253         0x6FD5C7E7L, 0x56E14EC4L, 0x362ABFCEL, 0xDDC6C837L,
00254         0xD79A3234L, 0x92638212L, 0x670EFA8EL, 0x406000E0L,
00255     },
00256     {
00257         0x3A39CE37L, 0xD3FAF5CFL, 0xABC27737L, 0x5AC52D1BL,
00258         0x5CB0679EL, 0x4FA33742L, 0xD3822740L, 0x99BC9BBEL,
00259         0xD5118E9DL, 0xBF0F7315L, 0xD62D1C7EL, 0xC700C47BL,
00260         0xB78C1B6BL, 0x21A19045L, 0xB26EB1BEL, 0x6A366EB4L,
00261         0x5748AB2FL, 0xBC946E79L, 0xC6A376D2L, 0x6549C2C8L,
00262         0x530FF8EEL, 0x468DDE7DL, 0xD5730A1DL, 0x4CD04DC6L,
00263         0x2939BBDBL, 0xA9BA4650L, 0xAC9526E8L, 0xBE5EE304L,
00264         0xA1FAD5F0L, 0x6A2D519AL, 0x63EF8CE2L, 0x9A86EE22L,
00265         0xC089C2B8L, 0x43242EF6L, 0xA51E03AAL, 0x9CF2D0A4L,
00266         0x83C061BAL, 0x9BE96A4DL, 0x8FE51550L, 0xBA645BD6L,
00267         0x2826A2F9L, 0xA73A3AE1L, 0x4BA99586L, 0xEF5562E9L,
00268         0xC72FEFD3L, 0xF752F7DAL, 0x3F046F69L, 0x77FA0A59L,
00269         0x80E4A915L, 0x87B08601L, 0x9B09E6ADL, 0x3B3EE593L,
00270         0xE990FD5AL, 0x9E34D797L, 0x2CF0B7D9L, 0x022B8B51L,
00271         0x96D5AC3AL, 0x017DA67DL, 0xD1CF3ED6L, 0x7C7D2D28L,
00272         0x1F9F25CFL, 0xADF2B89BL, 0x5AD6B472L, 0x5A88F54CL,
00273         0xE029AC71L, 0xE019A5E6L, 0x47B0ACFDL, 0xED93FA9BL,
00274         0xE8D3C48DL, 0x283B57CCL, 0xF8D56629L, 0x79132E28L,
00275         0x785F0191L, 0xED756055L, 0xF7960E44L, 0xE3D35E8CL,
00276         0x15056DD4L, 0x88F46DBAL, 0x03A16125L, 0x0564F0BDL,
00277         0xC3EB9E15L, 0x3C9057A2L, 0x97271AECL, 0xA93A072AL,
00278         0x1B3F6D9BL, 0x1E6321F5L, 0xF59C66FBL, 0x26DCF319L,
00279         0x7533D928L, 0xB155FDF5L, 0x03563482L, 0x8ABA3CBBL,
00280         0x28517711L, 0xC20AD9F8L, 0xABCC5167L, 0xCCAD925FL,
00281         0x4DE81751L, 0x3830DC8EL, 0x379D5862L, 0x9320F991L,
00282         0xEA7A90C2L, 0xFB3E7BCEL, 0x5121CE64L, 0x774FBE32L,
00283         0xA8B6E37EL, 0xC3293D46L, 0x48DE5369L, 0x6413E680L,
00284         0xA2AE0810L, 0xDD6DB224L, 0x69852DFDL, 0x09072166L,
00285         0xB39A460AL, 0x6445C0DDL, 0x586CDECFL, 0x1C20C8AEL,
00286         0x5BBEF7DDL, 0x1B588D40L, 0xCCD2017FL, 0x6BB4E3BBL,
00287         0xDDA26A7EL, 0x3A59FF45L, 0x3E350A44L, 0xBCB4CDD5L,
00288         0x72EACEA8L, 0xFA6484BBL, 0x8D6612AEL, 0xBF3C6F47L,
00289         0xD29BE463L, 0x542F5D9EL, 0xAEC2771BL, 0xF64E6370L,
00290         0x740E0D8DL, 0xE75B1357L, 0xF8721671L, 0xAF537D5DL,
00291         0x4040CB08L, 0x4EB4E2CCL, 0x34D2466AL, 0x0115AF84L,
00292         0xE1B00428L, 0x95983A1DL, 0x06B89FB4L, 0xCE6EA048L,
00293         0x6F3F3B82L, 0x3520AB82L, 0x011A1D4BL, 0x277227F8L,
00294         0x611560B1L, 0xE7933FDCL, 0xBB3A792BL, 0x344525BDL,
00295         0xA08839E1L, 0x51CE794BL, 0x2F32C9B7L, 0xA01FBAC9L,
00296         0xE01CC87EL, 0xBCC7D1F6L, 0xCF0111C3L, 0xA1E8AAC7L,
00297         0x1A908749L, 0xD44FBD9AL, 0xD0DADECBL, 0xD50ADA38L,
00298         0x0339C32AL, 0xC6913667L, 0x8DF9317CL, 0xE0B12B4FL,
00299         0xF79E59B7L, 0x43F5BB3AL, 0xF2D519FFL, 0x27D9459CL,
00300         0xBF97222CL, 0x15E6FC2AL, 0x0F91FC71L, 0x9B941525L,
00301         0xFAE59361L, 0xCEB69CEBL, 0xC2A86459L, 0x12BAA8D1L,
00302         0xB6C1075EL, 0xE3056A0CL, 0x10D25065L, 0xCB03A442L,
00303         0xE0EC6E0EL, 0x1698DB3BL, 0x4C98A0BEL, 0x3278E964L,
00304         0x9F1F9532L, 0xE0D392DFL, 0xD3A0342BL, 0x8971F21EL,
00305         0x1B0A7441L, 0x4BA3348CL, 0xC5BE7120L, 0xC37632D8L,
00306         0xDF359F8DL, 0x9B992F2EL, 0xE60B6F47L, 0x0FE3F11DL,
00307         0xE54CDA54L, 0x1EDAD891L, 0xCE6279CFL, 0xCD3E7E6FL,
00308         0x1618B166L, 0xFD2C1D05L, 0x848FD2C5L, 0xF6FB2299L,
00309         0xF523F357L, 0xA6327623L, 0x93A83531L, 0x56CCCD02L,
00310         0xACF08162L, 0x5A75EBB5L, 0x6E163697L, 0x88D273CCL,
00311         0xDE966292L, 0x81B949D0L, 0x4C50901BL, 0x71C65614L,
00312         0xE6C6C7BDL, 0x327A140AL, 0x45E1D006L, 0xC3F27B9AL,
00313         0xC9AA53FDL, 0x62A80F00L, 0xBB25BFE2L, 0x35BDD2F6L,
00314         0x71126905L, 0xB2040222L, 0xB6CBCF7CL, 0xCD769C2BL,
00315         0x53113EC0L, 0x1640E3D3L, 0x38ABBD60L, 0x2547ADF0L,
00316         0xBA38209CL, 0xF746CE76L, 0x77AFA1C5L, 0x20756060L,
00317         0x85CBFE4EL, 0x8AE88DD8L, 0x7AAAF9B0L, 0x4CF9AA7EL,
00318         0x1948C25CL, 0x02FB8A8CL, 0x01C36AE4L, 0xD6EBE1F9L,
00319         0x90D4F869L, 0xA65CDEA0L, 0x3F09252DL, 0xC208E69FL,
00320         0xB74E6132L, 0xCE77E25BL, 0x578FDFE3L, 0x3AC372E6L,
00321     },
00322 };
00323
00324 INLINE uint32_t F(uint32_t S[4][256], uint32_t x)
00325 {
00326     uint8_t a, b, c, d;
00327     uint32_t y;
00328
00329     d = x & 0x00FF;
00330     x >>= 8;
00331     c = x & 0x00FF;
00332     x >>= 8;
00333     b = x & 0x00FF;
00334     x >>= 8;
00335     a = x & 0x00FF;
00336
00337     y = ((S[0][a] + S[1][b]) ^ S[2][c]) + S[3][d];
00338
00339     return y;
00340 }
00341
00342
00343 static void blowfish_enc(BlockCipher *ctx_, void *block)
00344 {
00345     BlowfishContext *ctx = (BlowfishContext *)ctx_;
00346     uint32_t Xl;
00347     uint32_t Xr;
00348
00349     Xl = be32_to_cpu(((uint32_t*)block)[0]);
00350     Xr = be32_to_cpu(((uint32_t*)block)[1]);
00351
00352     for (int i = 0; i < N; ++i) {
00353         Xl = Xl ^ ctx->P[i];
00354         Xr = F(ctx->S, Xl) ^ Xr;
00355
00356         SWAP(Xl, Xr);
00357     }
00358
00359     SWAP(Xl, Xr);
00360
00361     Xr = Xr ^ ctx->P[N];
00362     Xl = Xl ^ ctx->P[N + 1];
00363
00364     ((uint32_t*)block)[0] = cpu_to_be32(Xl);
00365     ((uint32_t*)block)[1] = cpu_to_be32(Xr);
00366 }
00367
00368 static void blowfish_dec(BlockCipher *ctx_, void *block)
00369 {
00370     BlowfishContext *ctx = (BlowfishContext *)ctx_;
00371     uint32_t Xl;
00372     uint32_t Xr;
00373
00374     Xl = be32_to_cpu(((uint32_t*)block)[0]);
00375     Xr = be32_to_cpu(((uint32_t*)block)[1]);
00376
00377     for (int i = N + 1; i > 1; --i) {
00378         Xl = Xl ^ ctx->P[i];
00379         Xr = F(ctx->S, Xl) ^ Xr;
00380
00381         SWAP(Xl, Xr);
00382     }
00383
00384     SWAP(Xl, Xr);
00385
00386     Xr = Xr ^ ctx->P[1];
00387     Xl = Xl ^ ctx->P[0];
00388
00389     ((uint32_t*)block)[0] = cpu_to_be32(Xl);
00390     ((uint32_t*)block)[1] = cpu_to_be32(Xr);
00391 }
00392
00393 static void blowfish_setkey(BlockCipher *ctx_, const void *key_, size_t klen)
00394 {
00395     BlowfishContext *ctx = (BlowfishContext *)ctx_;
00396     const uint8_t *key = (const uint8_t*)key_;
00397     int i, k;
00398     size_t j;
00399
00400     STATIC_ASSERT(sizeof(P) == sizeof(ctx->P));
00401     STATIC_ASSERT(sizeof(S) == sizeof(ctx->S));
00402
00403     for (i = 0; i < 4; ++i)
00404         for (k = 0; k < 256; ++k)
00405             ctx->S[i][k] = S[i][k];
00406
00407     j = 0;
00408     for (i = 0; i < N + 2; ++i)
00409     {
00410         uint32_t data = 0x00000000;
00411         for (k = 0; k < 4; ++k)
00412         {
00413             data = (data << 8) | key[j];
00414             j = j + 1;
00415             if (j >= klen)
00416                 j = 0;
00417         }
00418         ctx->P[i] = P[i] ^ data;
00419     }
00420
00421     uint32_t data[2] = { 0x00000000, 0x00000000 };
00422
00423     for (i = 0; i < N + 2; i += 2)
00424     {
00425         blowfish_enc(ctx_, data);
00426
00427         ctx->P[i] = be32_to_cpu(data[0]);
00428         ctx->P[i + 1] = be32_to_cpu(data[1]);
00429     }
00430
00431     for (i = 0; i < 4; ++i)
00432     {
00433         for (j = 0; j < 256; j += 2)
00434         {
00435             blowfish_enc(ctx_, data);
00436
00437             ctx->S[i][j] = be32_to_cpu(data[0]);
00438             ctx->S[i][j + 1] = be32_to_cpu(data[1]);
00439         }
00440     }
00441 }
00442
00443 /*****************************************************************************/
00444
00445 void blowfish_init(BlowfishContext *ctx)
00446 {
00447     ctx->c.set_key = blowfish_setkey;
00448     ctx->c.enc_block = blowfish_enc;
00449     ctx->c.dec_block = blowfish_dec;
00450     ctx->c.key_len = 16;
00451     ctx->c.block_len = 8;
00452 }


BeRTOS: blowfish.h File Reference

  • sec
  • cipher
blowfish.h File Reference

Blowfish implementation. More...

#include <sec/cipher.h>
#include <alloca.h>

Go to the source code of this file.

Detailed Description

Blowfish implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file blowfish.h.


BeRTOS: blowfish.h Source File

  • sec
  • cipher
blowfish.h
Go to the documentation of this file.
00001
00040 #ifndef SEC_CIPHER_BLOWFISH_H
00041 #define SEC_CIPHER_BLOWFISH_H
00042
00043 #include <sec/cipher.h>
00044 #include <alloca.h>
00045
00046 typedef struct BlowfishContext
00047 {
00048     BlockCipher c;
00049     uint32_t S[4][256];
00050     uint32_t P[18];
00051
00052 } BlowfishContext;
00053
00054 void blowfish_init(BlowfishContext *ctx);
00055
00056 #define blowfish_stackinit(...) \
00057     ({ BlowfishContext *ctx = alloca(sizeof(BlowfishContext)); blowfish_init(ctx, ##__VA_ARGS__); &ctx->c; })
00058
00059 int blowfish_testSetup(void);
00060 int blowfish_testRun(void);
00061 int blowfish_testTearDown(void);
00062
00063 #endif /* SEC_CIPHER_BLOWFISH_H */


BeRTOS: buzzer.c File Reference

  • drv
Functions
buzzer.c File Reference

Buzzer driver (implementation) More...

#include "buzzer.h"
#include "hw/hw_buzzer.h"
#include <drv/timer.h>
#include <mware/event.h>
#include <cfg/debug.h>
#include <cfg/module.h>

Go to the source code of this file.

Functions

static void | buz_softint (void)
Turn off buzzer, called by software timer.
void | buz_beep (mtime_t time)
Beep for the specified ms time.
void | buz_repeat_start (mtime_t duration, mtime_t interval)
Start buzzer repetition.
void | buz_repeat_stop (void)
Stop buzzer repetition.
void | buz_init (void)
Initialize buzzer.

Detailed Description

Buzzer driver (implementation)

Author:
Bernie Innocenti <bernie@codewiz.org>
Francesco Sacchi <batt@develer.com>

Definition in file buzzer.c.


BeRTOS: buzzer.c Source File

  • drv
buzzer.c
Go to the documentation of this file.
00001
00040 #include "buzzer.h"
00041
00042 #include "hw/hw_buzzer.h"
00043 #include <drv/timer.h>
00044
00045 #include <mware/event.h>
00046
00047 #include <cfg/debug.h>
00048 #include <cfg/module.h>
00049
00050
00051 /* Local vars */
00052 static Timer buz_timer;
00053 static bool buz_timer_running;
00054 static mtime_t buz_repeat_interval;
00055 static mtime_t buz_repeat_duration;
00056
00057
00061 static void buz_softint(void)
00062 {
00063     if (IS_BUZZER_ON)
00064     {
00065         BUZZER_OFF;
00066         if (buz_repeat_interval)
00067         {
00068             /* Wait for interval time */
00069             timer_setDelay(&buz_timer, ms_to_ticks(buz_repeat_interval));
00070             timer_add(&buz_timer);
00071         }
00072         else
00073             buz_timer_running = false;
00074     }
00075     else if (buz_repeat_interval)
00076     {
00077         /* Wait for beep time */
00078         BUZZER_ON;
00079         timer_setDelay(&buz_timer, ms_to_ticks(buz_repeat_duration));
00080         timer_add(&buz_timer);
00081     }
00082     else
00083         buz_timer_running = false;
00084 }
00085
00086
00090 void buz_beep(mtime_t time)
00091 {
00092     cpu_flags_t flags;
00093     IRQ_SAVE_DISABLE(flags);
00094
00095     /* Remove the software interrupt if it was already queued */
00096     if (buz_timer_running)
00097         timer_abort(&buz_timer);
00098
00099     /* Turn on buzzer */
00100     BUZZER_ON;
00101
00102     /* Add software interrupt to turn the buzzer off later */
00103     buz_timer_running = true;
00104     timer_setDelay(&buz_timer, ms_to_ticks(time));
00105     timer_add(&buz_timer);
00106
00107     IRQ_RESTORE(flags);
00108 }
00109
00110
00114 void buz_repeat_start(mtime_t duration, mtime_t interval)
00115 {
00116     buz_repeat_interval = interval;
00117     buz_repeat_duration = duration;
00118     buz_beep(duration);
00119 }
00120
00121
00125 void buz_repeat_stop(void)
00126 {
00127     cpu_flags_t flags;
00128     IRQ_SAVE_DISABLE(flags);
00129
00130     /* Remove the software interrupt if it was already queued */
00131     if (buz_timer_running)
00132     {
00133         timer_abort(&buz_timer);
00134         buz_timer_running = false;
00135     }
00136
00137     buz_repeat_interval = 0;
00138     BUZZER_OFF;
00139
00140     IRQ_RESTORE(flags);
00141 }
00142
00143 MOD_DEFINE(buzzer)
00144
00145
00148 void buz_init(void)
00149 {
00150     MOD_CHECK(timer);
00151
00152     BUZZER_HW_INIT;
00153
00154     /* Init software interrupt. */
00155     timer_setSoftint(&buz_timer, (Hook)buz_softint, 0);
00156
00157     MOD_INIT(buzzer);
00158 }


BeRTOS: buzzer.h File Reference

  • drv
Functions
buzzer.h File Reference

Buzzer driver. More...

#include <cfg/compiler.h>

Go to the source code of this file.

Functions

void | buz_init (void)
Initialize buzzer.
void | buz_beep (mtime_t time)
Beep for the specified ms time.
void | buz_repeat_start (mtime_t duration, mtime_t interval)
Start buzzer repetition.
void | buz_repeat_stop (void)
Stop buzzer repetition.

Detailed Description

Buzzer driver.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file buzzer.h.


BeRTOS: buzzer.h Source File

  • drv
buzzer.h
Go to the documentation of this file.
00001
00043 #ifndef DRV_BUZZER_H
00044 #define DRV_BUZZER_H
00045
00046 #include <cfg/compiler.h>
00047
00048 void buz_init(void);
00049 void buz_beep(mtime_t time);
00050 void buz_repeat_start(mtime_t duration, mtime_t interval);
00051 void buz_repeat_stop(void);
00052
00053 #endif /* DRV_BUZZER_H */


BeRTOS: buzzerled.c File Reference

  • drv
buzzerled.c File Reference

Generic library to handle buzzers and leds. More...

#include "buzzerled.h"

Go to the source code of this file.

Detailed Description

Generic library to handle buzzers and leds.

This library is divided into three different layers:

  • The topmost portable layer is buzzerled.[ch] which exposes a common API enable/disable the devices. Basically, it handles the asynchronism to implement bld_beep and bld_repeat.
  • The middle layer is CPU-specific and exposes a single main function which turns on/off each device.
  • The lower layer is board-specific and communicates with the middle layer with any required API. The idea is that devices can be tied to the CPU in many different ways (many different pins), so this part should describe which devices are present, and how they are connected.
Author:
Giovanni Bajo <rasky@develer.com>

Definition in file buzzerled.c.


BeRTOS: buzzerled.c Source File

  • drv
buzzerled.c
Go to the documentation of this file.
00001
00052 #include "buzzerled.h"
00053
00054 #warning FIXME:This drive is obsolete, you must refactor it.
00055
00056 #if 0
00057 #include "cfg/cfg_buzzerled.h"
00058 #include <drv/timer.h>
00059
00060 static struct Timer timers[CONFIG_NUM_BLDS];
00061 static bool timer_go[CONFIG_NUM_BLDS];
00062
00063 INLINE enum BLD_DEVICE hook_parm_to_device(void* parm)
00064 {
00065     struct Timer* t = (struct Timer*)parm;
00066     int num_bld = t - &timers[0];
00067
00068     ASSERT(num_bld >= 0);
00069     ASSERT(num_bld < NUM_BLDS);
00070
00071     return (enum BLD_DEVICE)num_bld;
00072 }
00073
00074 static void hook_turn_off(void* parm)
00075 {
00076     enum BLD_DEVICE num_bld = hook_parm_to_device(parm);
00077     bld_set(num_bld, false);
00078 }
00079
00080 void bld_init(void)
00081 {
00082     bld_hw_init();
00083 }
00084
00085 void bld_beep(enum BLD_DEVICE device, uint16_t duration)
00086 {
00087     // \todo This is not reentrant for the same device. FIXME!
00088     struct Timer *t = &timers[device];
00089     timer_set_delay(t, duration);
00090     timer_set_event_softint(t, hook_turn_off, t);
00091     timer_add(t);
00092
00093     bld_set(device, true);
00094 }
00095
00096 void bld_beep_and_wait(enum BLD_DEVICE device, uint16_t duration)
00097 {
00098     bld_set(device, true);
00099     timer_delay(duration);
00100     bld_set(device, false);
00101 }
00102 #endif
00103


BeRTOS: buzzerled.h File Reference

  • drv
buzzerled.h File Reference

Generic library to handle buzzers and leds. More...

#include <cpu/attr.h>

Go to the source code of this file.

Detailed Description

Generic library to handle buzzers and leds.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file buzzerled.h.


BeRTOS: buzzerled.h Source File

  • drv
buzzerled.h
Go to the documentation of this file.
00001
00040 #ifndef DRV_BUZZERLED_H
00041 #define DRV_BUZZERLED_H
00042
00043 #include <cpu/attr.h>
00044
00045 #if 0
00046
00050 #include "hw/hw_buzzerled.h"
00051
00052
00053 /* Include hw-level implementation. This allows inlining of bld_set, which in turns
00054  * should allow fast constant propagation for the common case (where the parameter
00055  * device is a constant).
00056  */
00057 #include CPU_HEADER(buzzerled)
00058
00059
00064 void bld_init(void);
00065
00066
00072 #define bld_set(device, enable)  bld_hw_set(device, enable)
00073
00074
00082 void bld_beep(enum BLD_DEVICE device, uint16_t duration);
00083
00084
00092 void bld_beep_and_wait(enum BLD_DEVICE device, uint16_t duration);
00093
00094 #endif
00095
00096 #endif /* DRV_BUZZERLED_H */


BeRTOS: buzzerled_dsp56k.h File Reference

  • cpu
  • dsp56k
  • drv
buzzerled_dsp56k.h File Reference

Hardware support for buzzers and leds in DSP56K-based boards. More...

#include <cfg/compiler.h>
#include <hw.h>
#include "pwm.h"

Go to the source code of this file.

Detailed Description

Hardware support for buzzers and leds in DSP56K-based boards.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file buzzerled_dsp56k.h.


BeRTOS: buzzerled_dsp56k.h Source File

  • cpu
  • dsp56k
  • drv
buzzerled_dsp56k.h
Go to the documentation of this file.
00001
00040 /*#*
00041  *#* $Log$
00042  *#* Revision 1.7  2006/07/19 12:56:25  bernie
00043  *#* Convert to new Doxygen style.
00044  *#*
00045  *#* Revision 1.6  2005/11/04 16:20:02  bernie
00046  *#* Fix reference to README.devlib in header.
00047  *#*
00048  *#* Revision 1.5  2005/04/11 19:10:27  bernie
00049  *#* Include top-level headers from cfg/ subdir.
00050  *#*
00051  *#* Revision 1.4  2004/11/16 21:54:43  bernie
00052  *#* Changes for SC Monoboard support.
00053  *#*
00054  *#* Revision 1.3  2004/08/25 14:12:08  rasky
00055  *#* Aggiornato il comment block dei log RCS
00056  *#*
00057  *#* Revision 1.2  2004/06/03 11:27:09  bernie
00058  *#* Add dual-license information.
00059  *#*
00060  *#* Revision 1.1  2004/05/23 18:36:05  bernie
00061  *#* Import buzzerled driver.
00062  *#*
00063  *#*/
00064
00065 #ifndef DRV_BUZZERLED_DSP56K_H
00066 #define DRV_BUZZERLED_DSP56K_H
00067
00068 #include <cfg/compiler.h>
00069 #include <hw.h>
00070 #include "pwm.h"
00071
00072 #if ARCH & ARCH_HECO
00073
00085 INLINE bool bld_is_inverted_intensity(enum BLD_DEVICE device)
00086 {
00087     return (device == BLD_GREEN_LED
00088             || device == BLD_YELLOW_LED
00089             || device == BLD_RED_LED);
00090 }
00091
00092 INLINE bool bld_is_pwm(enum BLD_DEVICE device)
00093 {
00094     // Only the buzzer is connected to a PWM
00095     return (device == BLD_BUZZER || device == BLD_READY_LED);
00096 }
00097
00098 INLINE bool bld_is_timer(enum BLD_DEVICE device)
00099 {
00100     // LEDs are connected to timers
00101     return (device == BLD_GREEN_LED || device == BLD_YELLOW_LED || device == BLD_RED_LED);
00102 }
00103
00104 INLINE uint16_t bld_get_pwm(enum BLD_DEVICE device)
00105 {
00106     switch (device)
00107     {
00108     default: ASSERT(0);
00109     case BLD_BUZZER: return 5;  // PWMA5
00110     case BLD_READY_LED:  return 9;   // PWMB3
00111     }
00112 }
00113
00114
00115 INLINE struct REG_TIMER_STRUCT* bld_get_timer(enum BLD_DEVICE device)
00116 {
00117     switch (device)
00118     {
00119     default: ASSERT(0);
00120     case BLD_GREEN_LED: return &REG_TIMER_B[2];
00121     case BLD_RED_LED: return &REG_TIMER_B[1];
00122     case BLD_YELLOW_LED: return &REG_TIMER_B[3];
00123     }
00124 }
00125
00126 INLINE void bld_hw_init(void)
00127 {
00128 }
00129
00130 INLINE void bld_hw_set(enum BLD_DEVICE device, bool enable)
00131 {
00132     if (bld_is_inverted_intensity(device))
00133         enable = !enable;
00134
00135     // Handle a BLD connected to a PWM
00136     if (bld_is_pwm(device))
00137     {
00138         struct PWM* pwm = pwm_get_handle(bld_get_pwm(device));
00139
00140         pwm_set_enable(pwm, false);
00141         pwm_set_dutycycle_percent(pwm, (enable ? 50 : 0));
00142         pwm_set_enable(pwm, true);
00143     }
00144     else if (bld_is_timer(device))
00145     {
00146         struct REG_TIMER_STRUCT* timer = bld_get_timer(device);
00147
00148         // Check that the timer is currently stopped, and the OFLAG is not
00149         //  controlled by another timer. Otherwise, the led is already
00150         //  controlled by the timer, and we cannot correctly set it
00151         //  on/off without reprogramming the timer.
00152         ASSERT((timer->CTRL & REG_TIMER_CTRL_MODE_MASK) == REG_TIMER_CTRL_MODE_STOP);
00153         ASSERT(!(timer->SCR & REG_TIMER_SCR_EEOF));
00154
00155         // Check also that polarity is correct
00156         ASSERT(!(timer->SCR & REG_TIMER_SCR_OPS));
00157
00158         // Without programming the timer, we have a way to manually force a certain
00159         //  value on the external pin. We also need to enable the output pin.
00160         timer->SCR &= ~REG_TIMER_SCR_VAL_1;
00161         timer->SCR |= REG_TIMER_SCR_OEN |
00162                       REG_TIMER_SCR_FORCE |
00163                       (!enable ? REG_TIMER_SCR_VAL_0 : REG_TIMER_SCR_VAL_1);
00164     }
00165     else
00166         ASSERT(0);
00167 }
00168
00169 #elif ARCH & ARCH_SC
00170
00171 // We do not need inline functions here, because constant propagation is not big deal here
00172 void bld_hw_init(void);
00173 void bld_hw_set(enum BLD_DEVICE device, bool enable);
00174
00175 #endif
00176
00177 #endif /* DRV_BUZZERLED_DSP56K_H */


BeRTOS: cc932.c Source File

  • fs
  • fatfs
  • option
cc932.c
00001 /*------------------------------------------------------------------------*/
00002 /* Unicode - OEM code bidirectional converter  (C)ChaN, 2009              */
00003 /*                                                                        */
00004 /* CP932 (Japanese Shift-JIS)                                             */
00005 /*------------------------------------------------------------------------*/
00006
00007 #include "../ff.h"
00008
00009 #define _TINY_TABLE 0
00010
00011 #if _USE_LFN && _CODE_PAGE == 932
00012
00013
00014 static
00015 const WCHAR uni2sjis[] = {
00016 /*  Unicode - Sjis, Unicode - Sjis, Unicode - Sjis, Unicode - Sjis, */
00017     0x00A7, 0x8198, 0x00A8, 0x814E, 0x00B0, 0x818B, 0x00B1, 0x817D,
00018     0x00B4, 0x814C, 0x00B6, 0x81F7, 0x00D7, 0x817E, 0x00F7, 0x8180,
00019     0x0391, 0x839F, 0x0392, 0x83A0, 0x0393, 0x83A1, 0x0394, 0x83A2,
00020     0x0395, 0x83A3, 0x0396, 0x83A4, 0x0397, 0x83A5, 0x0398, 0x83A6,
00021     0x0399, 0x83A7, 0x039A, 0x83A8, 0x039B, 0x83A9, 0x039C, 0x83AA,
00022     0x039D, 0x83AB, 0x039E, 0x83AC, 0x039F, 0x83AD, 0x03A0, 0x83AE,
00023     0x03A1, 0x83AF, 0x03A3, 0x83B0, 0x03A4, 0x83B1, 0x03A5, 0x83B2,
00024     0x03A6, 0x83B3, 0x03A7, 0x83B4, 0x03A8, 0x83B5, 0x03A9, 0x83B6,
00025     0x03B1, 0x83BF, 0x03B2, 0x83C0, 0x03B3, 0x83C1, 0x03B4, 0x83C2,
00026     0x03B5, 0x83C3, 0x03B6, 0x83C4, 0x03B7, 0x83C5, 0x03B8, 0x83C6,
00027     0x03B9, 0x83C7, 0x03BA, 0x83C8, 0x03BB, 0x83C9, 0x03BC, 0x83CA,
00028     0x03BD, 0x83CB, 0x03BE, 0x83CC, 0x03BF, 0x83CD, 0x03C0, 0x83CE,
00029     0x03C1, 0x83CF, 0x03C3, 0x83D0, 0x03C4, 0x83D1, 0x03C5, 0x83D2,
00030     0x03C6, 0x83D3, 0x03C7, 0x83D4, 0x03C8, 0x83D5, 0x03C9, 0x83D6,
00031     0x0401, 0x8446, 0x0410, 0x8440, 0x0411, 0x8441, 0x0412, 0x8442,
00032     0x0413, 0x8443, 0x0414, 0x8444, 0x0415, 0x8445, 0x0416, 0x8447,
00033     0x0417, 0x8448, 0x0418, 0x8449, 0x0419, 0x844A, 0x041A, 0x844B,
00034     0x041B, 0x844C, 0x041C, 0x844D, 0x041D, 0x844E, 0x041E, 0x844F,
00035     0x041F, 0x8450, 0x0420, 0x8451, 0x0421, 0x8452, 0x0422, 0x8453,
00036     0x0423, 0x8454, 0x0424, 0x8455, 0x0425, 0x8456, 0x0426, 0x8457,
00037     0x0427, 0x8458, 0x0428, 0x8459, 0x0429, 0x845A, 0x042A, 0x845B,
00038     0x042B, 0x845C, 0x042C, 0x845D, 0x042D, 0x845E, 0x042E, 0x845F,
00039     0x042F, 0x8460, 0x0430, 0x8470, 0x0431, 0x8471, 0x0432, 0x8472,
00040     0x0433, 0x8473, 0x0434, 0x8474, 0x0435, 0x8475, 0x0436, 0x8477,
00041     0x0437, 0x8478, 0x0438, 0x8479, 0x0439, 0x847A, 0x043A, 0x847B,
00042     0x043B, 0x847C, 0x043C, 0x847D, 0x043D, 0x847E, 0x043E, 0x8480,
00043     0x043F, 0x8481, 0x0440, 0x8482, 0x0441, 0x8483, 0x0442, 0x8484,
00044     0x0443, 0x8485, 0x0444, 0x8486, 0x0445, 0x8487, 0x0446, 0x8488,
00045     0x0447, 0x8489, 0x0448, 0x848A, 0x0449, 0x848B, 0x044A, 0x848C,
00046     0x044B, 0x848D, 0x044C, 0x848E, 0x044D, 0x848F, 0x044E, 0x8490,
00047     0x044F, 0x8491, 0x0451, 0x8476, 0x2010, 0x815D, 0x2015, 0x815C,
00048     0x2018, 0x8165, 0x2019, 0x8166, 0x201C, 0x8167, 0x201D, 0x8168,
00049     0x2020, 0x81F5, 0x2021, 0x81F6, 0x2025, 0x8164, 0x2026, 0x8163,
00050     0x2030, 0x81F1, 0x2032, 0x818C, 0x2033, 0x818D, 0x203B, 0x81A6,
00051     0x2103, 0x818E, 0x2116, 0x8782, 0x2121, 0x8784, 0x212B, 0x81F0,
00052     0x2160, 0x8754, 0x2161, 0x8755, 0x2162, 0x8756, 0x2163, 0x8757,
00053     0x2164, 0x8758, 0x2165, 0x8759, 0x2166, 0x875A, 0x2167, 0x875B,
00054     0x2168, 0x875C, 0x2169, 0x875D, 0x2170, 0xFA40, 0x2171, 0xFA41,
00055     0x2172, 0xFA42, 0x2173, 0xFA43, 0x2174, 0xFA44, 0x2175, 0xFA45,
00056     0x2176, 0xFA46, 0x2177, 0xFA47, 0x2178, 0xFA48, 0x2179, 0xFA49,
00057     0x2190, 0x81A9, 0x2191, 0x81AA, 0x2192, 0x81A8, 0x2193, 0x81AB,
00058     0x21D2, 0x81CB, 0x21D4, 0x81CC, 0x2200, 0x81CD, 0x2202, 0x81DD,
00059     0x2203, 0x81CE, 0x2207, 0x81DE, 0x2208, 0x81B8, 0x220B, 0x81B9,
00060     0x2211, 0x8794, 0x221A, 0x81E3, 0x221D, 0x81E5, 0x221E, 0x8187,
00061     0x221F, 0x8798, 0x2220, 0x81DA, 0x2225, 0x8161, 0x2227, 0x81C8,
00062     0x2228, 0x81C9, 0x2229, 0x81BF, 0x222A, 0x81BE, 0x222B, 0x81E7,
00063     0x222C, 0x81E8, 0x222E, 0x8793, 0x2234, 0x8188, 0x2235, 0x81E6,
00064     0x223D, 0x81E4, 0x2252, 0x81E0, 0x2260, 0x8182, 0x2261, 0x81DF,
00065     0x2266, 0x8185, 0x2267, 0x8186, 0x226A, 0x81E1, 0x226B, 0x81E2,
00066     0x2282, 0x81BC, 0x2283, 0x81BD, 0x2286, 0x81BA, 0x2287, 0x81BB,
00067     0x22A5, 0x81DB, 0x22BF, 0x8799, 0x2312, 0x81DC, 0x2460, 0x8740,
00068     0x2461, 0x8741, 0x2462, 0x8742, 0x2463, 0x8743, 0x2464, 0x8744,
00069     0x2465, 0x8745, 0x2466, 0x8746, 0x2467, 0x8747, 0x2468, 0x8748,
00070     0x2469, 0x8749, 0x246A, 0x874A, 0x246B, 0x874B, 0x246C, 0x874C,
00071     0x246D, 0x874D, 0x246E, 0x874E, 0x246F, 0x874F, 0x2470, 0x8750,
00072     0x2471, 0x8751, 0x2472, 0x8752, 0x2473, 0x8753, 0x2500, 0x849F,
00073     0x2501, 0x84AA, 0x2502, 0x84A0, 0x2503, 0x84AB, 0x250C, 0x84A1,
00074     0x250F, 0x84AC, 0x2510, 0x84A2, 0x2513, 0x84AD, 0x2514, 0x84A4,
00075     0x2517, 0x84AF, 0x2518, 0x84A3, 0x251B, 0x84AE, 0x251C, 0x84A5,
00076     0x251D, 0x84BA, 0x2520, 0x84B5, 0x2523, 0x84B0, 0x2524, 0x84A7,
00077     0x2525, 0x84BC, 0x2528, 0x84B7, 0x252B, 0x84B2, 0x252C, 0x84A6,
00078     0x252F, 0x84B6, 0x2530, 0x84BB, 0x2533, 0x84B1, 0x2534, 0x84A8,
00079     0x2537, 0x84B8, 0x2538, 0x84BD, 0x253B, 0x84B3, 0x253C, 0x84A9,
00080     0x253F, 0x84B9, 0x2542, 0x84BE, 0x254B, 0x84B4, 0x25A0, 0x81A1,
00081     0x25A1, 0x81A0, 0x25B2, 0x81A3, 0x25B3, 0x81A2, 0x25BC, 0x81A5,
00082     0x25BD, 0x81A4, 0x25C6, 0x819F, 0x25C7, 0x819E, 0x25CB, 0x819B,
00083     0x25CE, 0x819D, 0x25CF, 0x819C, 0x25EF, 0x81FC, 0x2605, 0x819A,
00084     0x2606, 0x8199, 0x2640, 0x818A, 0x2642, 0x8189, 0x266A, 0x81F4,
00085     0x266D, 0x81F3, 0x266F, 0x81F2, 0x3000, 0x8140, 0x3001, 0x8141,
00086     0x3002, 0x8142, 0x3003, 0x8156, 0x3005, 0x8158, 0x3006, 0x8159,
00087     0x3007, 0x815A, 0x3008, 0x8171, 0x3009, 0x8172, 0x300A, 0x8173,
00088     0x300B, 0x8174, 0x300C, 0x8175, 0x300D, 0x8176, 0x300E, 0x8177,
00089     0x300F, 0x8178, 0x3010, 0x8179, 0x3011, 0x817A, 0x3012, 0x81A7,
00090     0x3013, 0x81AC, 0x3014, 0x816B, 0x3015, 0x816C, 0x301D, 0x8780,
00091     0x301F, 0x8781, 0x3041, 0x829F, 0x3042, 0x82A0, 0x3043, 0x82A1,
00092     0x3044, 0x82A2, 0x3045, 0x82A3, 0x3046, 0x82A4, 0x3047, 0x82A5,
00093     0x3048, 0x82A6, 0x3049, 0x82A7, 0x304A, 0x82A8, 0x304B, 0x82A9,
00094     0x304C, 0x82AA, 0x304D, 0x82AB, 0x304E, 0x82AC, 0x304F, 0x82AD,
00095     0x3050, 0x82AE, 0x3051, 0x82AF, 0x3052, 0x82B0, 0x3053, 0x82B1,
00096     0x3054, 0x82B2, 0x3055, 0x82B3, 0x3056, 0x82B4, 0x3057, 0x82B5,
00097     0x3058, 0x82B6, 0x3059, 0x82B7, 0x305A, 0x82B8, 0x305B, 0x82B9,
00098     0x305C, 0x82BA, 0x305D, 0x82BB, 0x305E, 0x82BC, 0x305F, 0x82BD,
00099     0x3060, 0x82BE, 0x3061, 0x82BF, 0x3062, 0x82C0, 0x3063, 0x82C1,
00100     0x3064, 0x82C2, 0x3065, 0x82C3, 0x3066, 0x82C4, 0x3067, 0x82C5,
00101     0x3068, 0x82C6, 0x3069, 0x82C7, 0x306A, 0x82C8, 0x306B, 0x82C9,
00102     0x306C, 0x82CA, 0x306D, 0x82CB, 0x306E, 0x82CC, 0x306F, 0x82CD,
00103     0x3070, 0x82CE, 0x3071, 0x82CF, 0x3072, 0x82D0, 0x3073, 0x82D1,
00104     0x3074, 0x82D2, 0x3075, 0x82D3, 0x3076, 0x82D4, 0x3077, 0x82D5,
00105     0x3078, 0x82D6, 0x3079, 0x82D7, 0x307A, 0x82D8, 0x307B, 0x82D9,
00106     0x307C, 0x82DA, 0x307D, 0x82DB, 0x307E, 0x82DC, 0x307F, 0x82DD,
00107     0x3080, 0x82DE, 0x3081, 0x82DF, 0x3082, 0x82E0, 0x3083, 0x82E1,
00108     0x3084, 0x82E2, 0x3085, 0x82E3, 0x3086, 0x82E4, 0x3087, 0x82E5,
00109     0x3088, 0x82E6, 0x3089, 0x82E7, 0x308A, 0x82E8, 0x308B, 0x82E9,
00110     0x308C, 0x82EA, 0x308D, 0x82EB, 0x308E, 0x82EC, 0x308F, 0x82ED,
00111     0x3090, 0x82EE, 0x3091, 0x82EF, 0x3092, 0x82F0, 0x3093, 0x82F1,
00112     0x3094, 0x8394, 0x309B, 0x814A, 0x309C, 0x814B, 0x309D, 0x8154,
00113     0x309E, 0x8155, 0x30A1, 0x8340, 0x30A2, 0x8341, 0x30A3, 0x8342,
00114     0x30A4, 0x8343, 0x30A5, 0x8344, 0x30A6, 0x8345, 0x30A7, 0x8346,
00115     0x30A8, 0x8347, 0x30A9, 0x8348, 0x30AA, 0x8349, 0x30AB, 0x834A,
00116     0x30AC, 0x834B, 0x30AD, 0x834C, 0x30AE, 0x834D, 0x30AF, 0x834E,
00117     0x30B0, 0x834F, 0x30B1, 0x8350, 0x30B2, 0x8351, 0x30B3, 0x8352,
00118     0x30B4, 0x8353, 0x30B5, 0x8354, 0x30B6, 0x8355, 0x30B7, 0x8356,
00119     0x30B8, 0x8357, 0x30B9, 0x8358, 0x30BA, 0x8359, 0x30BB, 0x835A,
00120     0x30BC, 0x835B, 0x30BD, 0x835C, 0x30BE, 0x835D, 0x30BF, 0x835E,
00121     0x30C0, 0x835F, 0x30C1, 0x8360, 0x30C2, 0x8361, 0x30C3, 0x8362,
00122     0x30C4, 0x8363, 0x30C5, 0x8364, 0x30C6, 0x8365, 0x30C7, 0x8366,
00123     0x30C8, 0x8367, 0x30C9, 0x8368, 0x30CA, 0x8369, 0x30CB, 0x836A,
00124     0x30CC, 0x836B, 0x30CD, 0x836C, 0x30CE, 0x836D, 0x30CF, 0x836E,
00125     0x30D0, 0x836F, 0x30D1, 0x8370, 0x30D2, 0x8371, 0x30D3, 0x8372,
00126     0x30D4, 0x8373, 0x30D5, 0x8374, 0x30D6, 0x8375, 0x30D7, 0x8376,
00127     0x30D8, 0x8377, 0x30D9, 0x8378, 0x30DA, 0x8379, 0x30DB, 0x837A,
00128     0x30DC, 0x837B, 0x30DD, 0x837C, 0x30DE, 0x837D, 0x30DF, 0x837E,
00129     0x30E0, 0x8380, 0x30E1, 0x8381, 0x30E2, 0x8382, 0x30E3, 0x8383,
00130     0x30E4, 0x8384, 0x30E5, 0x8385, 0x30E6, 0x8386, 0x30E7, 0x8387,
00131     0x30E8, 0x8388, 0x30E9, 0x8389, 0x30EA, 0x838A, 0x30EB, 0x838B,
00132     0x30EC, 0x838C, 0x30ED, 0x838D, 0x30EE, 0x838E, 0x30EF, 0x838F,
00133     0x30F0, 0x8390, 0x30F1, 0x8391, 0x30F2, 0x8392, 0x30F3, 0x8393,
00134     0x30F4, 0x8394, 0x30F5, 0x8395, 0x30F6, 0x8396, 0x30FB, 0x8145,
00135     0x30FC, 0x815B, 0x30FD, 0x8152, 0x30FE, 0x8153, 0x3231, 0x878A,
00136     0x3232, 0x878B, 0x3239, 0x878C, 0x32A4, 0x8785, 0x32A5, 0x8786,
00137     0x32A6, 0x8787, 0x32A7, 0x8788, 0x32A8, 0x8789, 0x3303, 0x8765,
00138     0x330D, 0x8769, 0x3314, 0x8760, 0x3318, 0x8763, 0x3322, 0x8761,
00139     0x3323, 0x876B, 0x3326, 0x876A, 0x3327, 0x8764, 0x332B, 0x876C,
00140     0x3336, 0x8766, 0x333B, 0x876E, 0x3349, 0x875F, 0x334A, 0x876D,
00141     0x334D, 0x8762, 0x3351, 0x8767, 0x3357, 0x8768, 0x337B, 0x877E,
00142     0x337C, 0x878F, 0x337D, 0x878E, 0x337E, 0x878D, 0x338E, 0x8772,
00143     0x338F, 0x8773, 0x339C, 0x876F, 0x339D, 0x8770, 0x339E, 0x8771,
00144     0x33A1, 0x8775, 0x33C4, 0x8774, 0x33CD, 0x8783, 0x4E00, 0x88EA,
00145     0x4E01, 0x929A, 0x4E03, 0x8EB5, 0x4E07, 0x969C, 0x4E08, 0x8FE4,
00146     0x4E09, 0x8E4F, 0x4E0A, 0x8FE3, 0x4E0B, 0x89BA, 0x4E0D, 0x9573,
00147     0x4E0E, 0x975E, 0x4E10, 0x98A0, 0x4E11, 0x894E, 0x4E14, 0x8A8E,
00148     0x4E15, 0x98A1, 0x4E16, 0x90A2, 0x4E17, 0x99C0, 0x4E18, 0x8B75,
00149     0x4E19, 0x95B8, 0x4E1E, 0x8FE5, 0x4E21, 0x97BC, 0x4E26, 0x95C0,
00150     0x4E28, 0xFA68, 0x4E2A, 0x98A2, 0x4E2D, 0x9286, 0x4E31, 0x98A3,
00151     0x4E32, 0x8BF8, 0x4E36, 0x98A4, 0x4E38, 0x8ADB, 0x4E39, 0x924F,
00152     0x4E3B, 0x8EE5, 0x4E3C, 0x98A5, 0x4E3F, 0x98A6, 0x4E42, 0x98A7,
00153     0x4E43, 0x9454, 0x4E45, 0x8B76, 0x4E4B, 0x9456, 0x4E4D, 0x93E1,
00154     0x4E4E, 0x8CC1, 0x4E4F, 0x9652, 0x4E55, 0xE568, 0x4E56, 0x98A8,
00155     0x4E57, 0x8FE6, 0x4E58, 0x98A9, 0x4E59, 0x89B3, 0x4E5D, 0x8BE3,
00156     0x4E5E, 0x8CEE, 0x4E5F, 0x96E7, 0x4E62, 0x9BA4, 0x4E71, 0x9790,
00157     0x4E73, 0x93FB, 0x4E7E, 0x8AA3, 0x4E80, 0x8B54, 0x4E82, 0x98AA,
00158     0x4E85, 0x98AB, 0x4E86, 0x97B9, 0x4E88, 0x975C, 0x4E89, 0x9188,
00159     0x4E8A, 0x98AD, 0x4E8B, 0x8E96, 0x4E8C, 0x93F1, 0x4E8E, 0x98B0,
00160     0x4E91, 0x895D, 0x4E92, 0x8CDD, 0x4E94, 0x8CDC, 0x4E95, 0x88E4,
00161     0x4E98, 0x986A, 0x4E99, 0x9869, 0x4E9B, 0x8DB1, 0x4E9C, 0x889F,
00162     0x4E9E, 0x98B1, 0x4E9F, 0x98B2, 0x4EA0, 0x98B3, 0x4EA1, 0x9653,
00163     0x4EA2, 0x98B4, 0x4EA4, 0x8CF0, 0x4EA5, 0x88E5, 0x4EA6, 0x9692,
00164     0x4EA8, 0x8B9C, 0x4EAB, 0x8B9D, 0x4EAC, 0x8B9E, 0x4EAD, 0x92E0,
00165     0x4EAE, 0x97BA, 0x4EB0, 0x98B5, 0x4EB3, 0x98B6, 0x4EB6, 0x98B7,
00166     0x4EBA, 0x906C, 0x4EC0, 0x8F59, 0x4EC1, 0x906D, 0x4EC2, 0x98BC,
00167     0x4EC4, 0x98BA, 0x4EC6, 0x98BB, 0x4EC7, 0x8B77, 0x4ECA, 0x8DA1,
00168     0x4ECB, 0x89EE, 0x4ECD, 0x98B9, 0x4ECE, 0x98B8, 0x4ECF, 0x95A7,
00169     0x4ED4, 0x8E65, 0x4ED5, 0x8E64, 0x4ED6, 0x91BC, 0x4ED7, 0x98BD,
00170     0x4ED8, 0x9574, 0x4ED9, 0x90E5, 0x4EDD, 0x8157, 0x4EDE, 0x98BE,
00171     0x4EDF, 0x98C0, 0x4EE1, 0xFA69, 0x4EE3, 0x91E3, 0x4EE4, 0x97DF,
00172     0x4EE5, 0x88C8, 0x4EED, 0x98BF, 0x4EEE, 0x89BC, 0x4EF0, 0x8BC2,
00173     0x4EF2, 0x9287, 0x4EF6, 0x8C8F, 0x4EF7, 0x98C1, 0x4EFB, 0x9443,
00174     0x4EFC, 0xFA6A, 0x4F00, 0xFA6B, 0x4F01, 0x8AE9, 0x4F03, 0xFA6C,
00175     0x4F09, 0x98C2, 0x4F0A, 0x88C9, 0x4F0D, 0x8CDE, 0x4F0E, 0x8AEA,
00176     0x4F0F, 0x959A, 0x4F10, 0x94B0, 0x4F11, 0x8B78, 0x4F1A, 0x89EF,
00177     0x4F1C, 0x98E5, 0x4F1D, 0x9360, 0x4F2F, 0x948C, 0x4F30, 0x98C4,
00178     0x4F34, 0x94BA, 0x4F36, 0x97E0, 0x4F38, 0x904C, 0x4F39, 0xFA6D,
00179     0x4F3A, 0x8E66, 0x4F3C, 0x8E97, 0x4F3D, 0x89BE, 0x4F43, 0x92CF,
00180     0x4F46, 0x9241, 0x4F47, 0x98C8, 0x4F4D, 0x88CA, 0x4F4E, 0x92E1,
00181     0x4F4F, 0x8F5A, 0x4F50, 0x8DB2, 0x4F51, 0x9743, 0x4F53, 0x91CC,
00182     0x4F55, 0x89BD, 0x4F56, 0xFA6E, 0x4F57, 0x98C7, 0x4F59, 0x975D,
00183     0x4F5A, 0x98C3, 0x4F5B, 0x98C5, 0x4F5C, 0x8DEC, 0x4F5D, 0x98C6,
00184     0x4F5E, 0x9B43, 0x4F69, 0x98CE, 0x4F6F, 0x98D1, 0x4F70, 0x98CF,
00185     0x4F73, 0x89C0, 0x4F75, 0x95B9, 0x4F76, 0x98C9, 0x4F7B, 0x98CD,
00186     0x4F7C, 0x8CF1, 0x4F7F, 0x8E67, 0x4F83, 0x8AA4, 0x4F86, 0x98D2,
00187     0x4F88, 0x98CA, 0x4F8A, 0xFA70, 0x4F8B, 0x97E1, 0x4F8D, 0x8E98,
00188     0x4F8F, 0x98CB, 0x4F91, 0x98D0, 0x4F92, 0xFA6F, 0x4F94, 0xFA72,
00189     0x4F96, 0x98D3, 0x4F98, 0x98CC, 0x4F9A, 0xFA71, 0x4F9B, 0x8B9F,
00190     0x4F9D, 0x88CB, 0x4FA0, 0x8BA0, 0x4FA1, 0x89BF, 0x4FAB, 0x9B44,
00191     0x4FAD, 0x9699, 0x4FAE, 0x958E, 0x4FAF, 0x8CF2, 0x4FB5, 0x904E,
00192     0x4FB6, 0x97B5, 0x4FBF, 0x95D6, 0x4FC2, 0x8C57, 0x4FC3, 0x91A3,
00193     0x4FC4, 0x89E2, 0x4FC9, 0xFA61, 0x4FCA, 0x8F72, 0x4FCD, 0xFA73,
00194     0x4FCE, 0x98D7, 0x4FD0, 0x98DC, 0x4FD1, 0x98DA, 0x4FD4, 0x98D5,
00195     0x4FD7, 0x91AD, 0x4FD8, 0x98D8, 0x4FDA, 0x98DB, 0x4FDB, 0x98D9,
00196     0x4FDD, 0x95DB, 0x4FDF, 0x98D6, 0x4FE1, 0x904D, 0x4FE3, 0x9693,
00197     0x4FE4, 0x98DD, 0x4FE5, 0x98DE, 0x4FEE, 0x8F43, 0x4FEF, 0x98EB,
00198     0x4FF3, 0x946F, 0x4FF5, 0x9555, 0x4FF6, 0x98E6, 0x4FF8, 0x95EE,
00199     0x4FFA, 0x89B4, 0x4FFE, 0x98EA, 0x4FFF, 0xFA76, 0x5005, 0x98E4,
00200     0x5006, 0x98ED, 0x5009, 0x9171, 0x500B, 0x8CC2, 0x500D, 0x947B,
00201     0x500F, 0xE0C5, 0x5011, 0x98EC, 0x5012, 0x937C, 0x5014, 0x98E1,
00202     0x5016, 0x8CF4, 0x5019, 0x8CF3, 0x501A, 0x98DF, 0x501E, 0xFA77,
00203     0x501F, 0x8ED8, 0x5021, 0x98E7, 0x5022, 0xFA75, 0x5023, 0x95ED,
00204     0x5024, 0x926C, 0x5025, 0x98E3, 0x5026, 0x8C91, 0x5028, 0x98E0,
00205     0x5029, 0x98E8, 0x502A, 0x98E2, 0x502B, 0x97CF, 0x502C, 0x98E9,
00206     0x502D, 0x9860, 0x5036, 0x8BE4, 0x5039, 0x8C90, 0x5040, 0xFA74,
00207     0x5042, 0xFA7A, 0x5043, 0x98EE, 0x5046, 0xFA78, 0x5047, 0x98EF,
00208     0x5048, 0x98F3, 0x5049, 0x88CC, 0x504F, 0x95CE, 0x5050, 0x98F2,
00209     0x5055, 0x98F1, 0x5056, 0x98F5, 0x505A, 0x98F4, 0x505C, 0x92E2,
00210     0x5065, 0x8C92, 0x506C, 0x98F6, 0x5070, 0xFA79, 0x5072, 0x8EC3,
00211     0x5074, 0x91A4, 0x5075, 0x92E3, 0x5076, 0x8BF4, 0x5078, 0x98F7,
00212     0x507D, 0x8B55, 0x5080, 0x98F8, 0x5085, 0x98FA, 0x508D, 0x9654,
00213     0x5091, 0x8C86, 0x5094, 0xFA7B, 0x5098, 0x8E50, 0x5099, 0x94F5,
00214     0x509A, 0x98F9, 0x50AC, 0x8DC3, 0x50AD, 0x9762, 0x50B2, 0x98FC,
00215     0x50B3, 0x9942, 0x50B4, 0x98FB, 0x50B5, 0x8DC2, 0x50B7, 0x8F9D,
00216     0x50BE, 0x8C58, 0x50C2, 0x9943, 0x50C5, 0x8BCD, 0x50C9, 0x9940,
00217     0x50CA, 0x9941, 0x50CD, 0x93AD, 0x50CF, 0x919C, 0x50D1, 0x8BA1,
00218     0x50D5, 0x966C, 0x50D6, 0x9944, 0x50D8, 0xFA7D, 0x50DA, 0x97BB,
00219     0x50DE, 0x9945, 0x50E3, 0x9948, 0x50E5, 0x9946, 0x50E7, 0x916D,
00220     0x50ED, 0x9947, 0x50EE, 0x9949, 0x50F4, 0xFA7C, 0x50F5, 0x994B,
00221     0x50F9, 0x994A, 0x50FB, 0x95C6, 0x5100, 0x8B56, 0x5101, 0x994D,
00222     0x5102, 0x994E, 0x5104, 0x89AD, 0x5109, 0x994C, 0x5112, 0x8EF2,
00223     0x5114, 0x9951, 0x5115, 0x9950, 0x5116, 0x994F, 0x5118, 0x98D4,
00224     0x511A, 0x9952, 0x511F, 0x8F9E, 0x5121, 0x9953, 0x512A, 0x9744,
00225     0x5132, 0x96D7, 0x5137, 0x9955, 0x513A, 0x9954, 0x513B, 0x9957,
00226     0x513C, 0x9956, 0x513F, 0x9958, 0x5140, 0x9959, 0x5141, 0x88F2,
00227     0x5143, 0x8CB3, 0x5144, 0x8C5A, 0x5145, 0x8F5B, 0x5146, 0x929B,
00228     0x5147, 0x8BA2, 0x5148, 0x90E6, 0x5149, 0x8CF5, 0x514A, 0xFA7E,
00229     0x514B, 0x8D8E, 0x514C, 0x995B, 0x514D, 0x96C6, 0x514E, 0x9365,
00230     0x5150, 0x8E99, 0x5152, 0x995A, 0x5154, 0x995C, 0x515A, 0x937D,
00231     0x515C, 0x8A95, 0x5162, 0x995D, 0x5164, 0xFA80, 0x5165, 0x93FC,
00232     0x5168, 0x9153, 0x5169, 0x995F, 0x516A, 0x9960, 0x516B, 0x94AA,
00233     0x516C, 0x8CF6, 0x516D, 0x985A, 0x516E, 0x9961, 0x5171, 0x8BA4,
00234     0x5175, 0x95BA, 0x5176, 0x91B4, 0x5177, 0x8BEF, 0x5178, 0x9354,
00235     0x517C, 0x8C93, 0x5180, 0x9962, 0x5182, 0x9963, 0x5185, 0x93E0,
00236     0x5186, 0x897E, 0x5189, 0x9966, 0x518A, 0x8DFB, 0x518C, 0x9965,
00237     0x518D, 0x8DC4, 0x518F, 0x9967, 0x5190, 0xE3EC, 0x5191, 0x9968,
00238     0x5192, 0x9660, 0x5193, 0x9969, 0x5195, 0x996A, 0x5196, 0x996B,
00239     0x5197, 0x8FE7, 0x5199, 0x8ECA, 0x519D, 0xFA81, 0x51A0, 0x8AA5,
00240     0x51A2, 0x996E, 0x51A4, 0x996C, 0x51A5, 0x96BB, 0x51A6, 0x996D,
00241     0x51A8, 0x9579, 0x51A9, 0x996F, 0x51AA, 0x9970, 0x51AB, 0x9971,
00242     0x51AC, 0x937E, 0x51B0, 0x9975, 0x51B1, 0x9973, 0x51B2, 0x9974,
00243     0x51B3, 0x9972, 0x51B4, 0x8DE1, 0x51B5, 0x9976, 0x51B6, 0x96E8,
00244     0x51B7, 0x97E2, 0x51BD, 0x9977, 0x51BE, 0xFA82, 0x51C4, 0x90A6,
00245     0x51C5, 0x9978, 0x51C6, 0x8F79, 0x51C9, 0x9979, 0x51CB, 0x929C,
00246     0x51CC, 0x97BD, 0x51CD, 0x9380, 0x51D6, 0x99C3, 0x51DB, 0x997A,
00247     0x51DC, 0xEAA3, 0x51DD, 0x8BC3, 0x51E0, 0x997B, 0x51E1, 0x967D,
00248     0x51E6, 0x8F88, 0x51E7, 0x91FA, 0x51E9, 0x997D, 0x51EA, 0x93E2,
00249     0x51EC, 0xFA83, 0x51ED, 0x997E, 0x51F0, 0x9980, 0x51F1, 0x8A4D,
00250     0x51F5, 0x9981, 0x51F6, 0x8BA5, 0x51F8, 0x93CA, 0x51F9, 0x899A,
00251     0x51FA, 0x8F6F, 0x51FD, 0x949F, 0x51FE, 0x9982, 0x5200, 0x9381,
00252     0x5203, 0x906E, 0x5204, 0x9983, 0x5206, 0x95AA, 0x5207, 0x90D8,
00253     0x5208, 0x8AA0, 0x520A, 0x8AA7, 0x520B, 0x9984, 0x520E, 0x9986,
00254     0x5211, 0x8C59, 0x5214, 0x9985, 0x5215, 0xFA84, 0x5217, 0x97F1,
00255     0x521D, 0x8F89, 0x5224, 0x94BB, 0x5225, 0x95CA, 0x5227, 0x9987,
00256     0x5229, 0x9798, 0x522A, 0x9988, 0x522E, 0x9989, 0x5230, 0x939E,
00257     0x5233, 0x998A, 0x5236, 0x90A7, 0x5237, 0x8DFC, 0x5238, 0x8C94,
00258     0x5239, 0x998B, 0x523A, 0x8E68, 0x523B, 0x8D8F, 0x5243, 0x92E4,
00259     0x5244, 0x998D, 0x5247, 0x91A5, 0x524A, 0x8DED, 0x524B, 0x998E,
00260     0x524C, 0x998F, 0x524D, 0x914F, 0x524F, 0x998C, 0x5254, 0x9991,
00261     0x5256, 0x9655, 0x525B, 0x8D84, 0x525E, 0x9990, 0x5263, 0x8C95,
00262     0x5264, 0x8DDC, 0x5265, 0x948D, 0x5269, 0x9994, 0x526A, 0x9992,
00263     0x526F, 0x959B, 0x5270, 0x8FE8, 0x5271, 0x999B, 0x5272, 0x8A84,
00264     0x5273, 0x9995, 0x5274, 0x9993, 0x5275, 0x916E, 0x527D, 0x9997,
00265     0x527F, 0x9996, 0x5283, 0x8A63, 0x5287, 0x8C80, 0x5288, 0x999C,
00266     0x5289, 0x97AB, 0x528D, 0x9998, 0x5291, 0x999D, 0x5292, 0x999A,
00267     0x5294, 0x9999, 0x529B, 0x97CD, 0x529C, 0xFA85, 0x529F, 0x8CF7,
00268     0x52A0, 0x89C1, 0x52A3, 0x97F2, 0x52A6, 0xFA86, 0x52A9, 0x8F95,
00269     0x52AA, 0x9377, 0x52AB, 0x8D85, 0x52AC, 0x99A0, 0x52AD, 0x99A1,
00270     0x52AF, 0xFB77, 0x52B1, 0x97E3, 0x52B4, 0x984A, 0x52B5, 0x99A3,
00271     0x52B9, 0x8CF8, 0x52BC, 0x99A2, 0x52BE, 0x8A4E, 0x52C0, 0xFA87,
00272     0x52C1, 0x99A4, 0x52C3, 0x9675, 0x52C5, 0x92BA, 0x52C7, 0x9745,
00273     0x52C9, 0x95D7, 0x52CD, 0x99A5, 0x52D2, 0xE8D3, 0x52D5, 0x93AE,
00274     0x52D7, 0x99A6, 0x52D8, 0x8AA8, 0x52D9, 0x96B1, 0x52DB, 0xFA88,
00275     0x52DD, 0x8F9F, 0x52DE, 0x99A7, 0x52DF, 0x95E5, 0x52E0, 0x99AB,
00276     0x52E2, 0x90A8, 0x52E3, 0x99A8, 0x52E4, 0x8BCE, 0x52E6, 0x99A9,
00277     0x52E7, 0x8AA9, 0x52F2, 0x8C4D, 0x52F3, 0x99AC, 0x52F5, 0x99AD,
00278     0x52F8, 0x99AE, 0x52F9, 0x99AF, 0x52FA, 0x8ED9, 0x52FE, 0x8CF9,
00279     0x52FF, 0x96DC, 0x5300, 0xFA89, 0x5301, 0x96E6, 0x5302, 0x93F5,
00280     0x5305, 0x95EF, 0x5306, 0x99B0, 0x5307, 0xFA8A, 0x5308, 0x99B1,
00281     0x530D, 0x99B3, 0x530F, 0x99B5, 0x5310, 0x99B4, 0x5315, 0x99B6,
00282     0x5316, 0x89BB, 0x5317, 0x966B, 0x5319, 0x8DFA, 0x531A, 0x99B7,
00283     0x531D, 0x9178, 0x5320, 0x8FA0, 0x5321, 0x8BA7, 0x5323, 0x99B8,
00284     0x5324, 0xFA8B, 0x532A, 0x94D9, 0x532F, 0x99B9, 0x5331, 0x99BA,
00285     0x5333, 0x99BB, 0x5338, 0x99BC, 0x5339, 0x9543, 0x533A, 0x8BE6,
00286     0x533B, 0x88E3, 0x533F, 0x93BD, 0x5340, 0x99BD, 0x5341, 0x8F5C,
00287     0x5343, 0x90E7, 0x5345, 0x99BF, 0x5346, 0x99BE, 0x5347, 0x8FA1,
00288     0x5348, 0x8CDF, 0x5349, 0x99C1, 0x534A, 0x94BC, 0x534D, 0x99C2,
00289     0x5351, 0x94DA, 0x5352, 0x91B2, 0x5353, 0x91EC, 0x5354, 0x8BA6,
00290     0x5357, 0x93EC, 0x5358, 0x9250, 0x535A, 0x948E, 0x535C, 0x966D,
00291     0x535E, 0x99C4, 0x5360, 0x90E8, 0x5366, 0x8C54, 0x5369, 0x99C5,
00292     0x536E, 0x99C6, 0x536F, 0x894B, 0x5370, 0x88F3, 0x5371, 0x8AEB,
00293     0x5372, 0xFA8C, 0x5373, 0x91A6, 0x5374, 0x8B70, 0x5375, 0x9791,
00294     0x5377, 0x99C9, 0x5378, 0x89B5, 0x537B, 0x99C8, 0x537F, 0x8BA8,
00295     0x5382, 0x99CA, 0x5384, 0x96EF, 0x5393, 0xFA8D, 0x5396, 0x99CB,
00296     0x5398, 0x97D0, 0x539A, 0x8CFA, 0x539F, 0x8CB4, 0x53A0, 0x99CC,
00297     0x53A5, 0x99CE, 0x53A6, 0x99CD, 0x53A8, 0x907E, 0x53A9, 0x8958,
00298     0x53AD, 0x897D, 0x53AE, 0x99CF, 0x53B0, 0x99D0, 0x53B2, 0xFA8E,
00299     0x53B3, 0x8CB5, 0x53B6, 0x99D1, 0x53BB, 0x8B8E, 0x53C2, 0x8E51,
00300     0x53C3, 0x99D2, 0x53C8, 0x9694, 0x53C9, 0x8DB3, 0x53CA, 0x8B79,
00301     0x53CB, 0x9746, 0x53CC, 0x916F, 0x53CD, 0x94BD, 0x53CE, 0x8EFB,
00302     0x53D4, 0x8F66, 0x53D6, 0x8EE6, 0x53D7, 0x8EF3, 0x53D9, 0x8F96,
00303     0x53DB, 0x94BE, 0x53DD, 0xFA8F, 0x53DF, 0x99D5, 0x53E1, 0x8962,
00304     0x53E2, 0x9170, 0x53E3, 0x8CFB, 0x53E4, 0x8CC3, 0x53E5, 0x8BE5,
00305     0x53E8, 0x99D9, 0x53E9, 0x9240, 0x53EA, 0x91FC, 0x53EB, 0x8BA9,
00306     0x53EC, 0x8FA2, 0x53ED, 0x99DA, 0x53EE, 0x99D8, 0x53EF, 0x89C2,
00307     0x53F0, 0x91E4, 0x53F1, 0x8EB6, 0x53F2, 0x8E6A, 0x53F3, 0x8945,
00308     0x53F6, 0x8A90, 0x53F7, 0x8D86, 0x53F8, 0x8E69, 0x53FA, 0x99DB,
00309     0x5401, 0x99DC, 0x5403, 0x8B68, 0x5404, 0x8A65, 0x5408, 0x8D87,
00310     0x5409, 0x8B67, 0x540A, 0x92DD, 0x540B, 0x8944, 0x540C, 0x93AF,
00311     0x540D, 0x96BC, 0x540E, 0x8D40, 0x540F, 0x9799, 0x5410, 0x9366,
00312     0x5411, 0x8CFC, 0x541B, 0x8C4E, 0x541D, 0x99E5, 0x541F, 0x8BE1,
00313     0x5420, 0x9669, 0x5426, 0x94DB, 0x5429, 0x99E4, 0x542B, 0x8ADC,
00314     0x542C, 0x99DF, 0x542D, 0x99E0, 0x542E, 0x99E2, 0x5436, 0x99E3,
00315     0x5438, 0x8B7A, 0x5439, 0x9081, 0x543B, 0x95AB, 0x543C, 0x99E1,
00316     0x543D, 0x99DD, 0x543E, 0x8CE1, 0x5440, 0x99DE, 0x5442, 0x9843,
00317     0x5446, 0x95F0, 0x5448, 0x92E6, 0x5449, 0x8CE0, 0x544A, 0x8D90,
00318     0x544E, 0x99E6, 0x5451, 0x93DB, 0x545F, 0x99EA, 0x5468, 0x8EFC,
00319     0x546A, 0x8EF4, 0x5470, 0x99ED, 0x5471, 0x99EB, 0x5473, 0x96A1,
00320     0x5475, 0x99E8, 0x5476, 0x99F1, 0x5477, 0x99EC, 0x547B, 0x99EF,
00321     0x547C, 0x8CC4, 0x547D, 0x96BD, 0x5480, 0x99F0, 0x5484, 0x99F2,
00322     0x5486, 0x99F4, 0x548A, 0xFA92, 0x548B, 0x8DEE, 0x548C, 0x9861,
00323     0x548E, 0x99E9, 0x548F, 0x99E7, 0x5490, 0x99F3, 0x5492, 0x99EE,
00324     0x549C, 0xFA91, 0x54A2, 0x99F6, 0x54A4, 0x9A42, 0x54A5, 0x99F8,
00325     0x54A8, 0x99FC, 0x54A9, 0xFA93, 0x54AB, 0x9A40, 0x54AC, 0x99F9,
00326     0x54AF, 0x9A5D, 0x54B2, 0x8DE7, 0x54B3, 0x8A50, 0x54B8, 0x99F7,
00327     0x54BC, 0x9A44, 0x54BD, 0x88F4, 0x54BE, 0x9A43, 0x54C0, 0x88A3,
00328     0x54C1, 0x9569, 0x54C2, 0x9A41, 0x54C4, 0x99FA, 0x54C7, 0x99F5,
00329     0x54C8, 0x99FB, 0x54C9, 0x8DC6, 0x54D8, 0x9A45, 0x54E1, 0x88F5,
00330     0x54E2, 0x9A4E, 0x54E5, 0x9A46, 0x54E6, 0x9A47, 0x54E8, 0x8FA3,
00331     0x54E9, 0x9689, 0x54ED, 0x9A4C, 0x54EE, 0x9A4B, 0x54F2, 0x934E,
00332     0x54FA, 0x9A4D, 0x54FD, 0x9A4A, 0x54FF, 0xFA94, 0x5504, 0x8953,
00333     0x5506, 0x8DB4, 0x5507, 0x904F, 0x550F, 0x9A48, 0x5510, 0x9382,
00334     0x5514, 0x9A49, 0x5516, 0x88A0, 0x552E, 0x9A53, 0x552F, 0x9742,
00335     0x5531, 0x8FA5, 0x5533, 0x9A59, 0x5538, 0x9A58, 0x5539, 0x9A4F,
00336     0x553E, 0x91C1, 0x5540, 0x9A50, 0x5544, 0x91ED, 0x5545, 0x9A55,
00337     0x5546, 0x8FA4, 0x554C, 0x9A52, 0x554F, 0x96E2, 0x5553, 0x8C5B,
00338     0x5556, 0x9A56, 0x5557, 0x9A57, 0x555C, 0x9A54, 0x555D, 0x9A5A,
00339     0x5563, 0x9A51, 0x557B, 0x9A60, 0x557C, 0x9A65, 0x557E, 0x9A61,
00340     0x5580, 0x9A5C, 0x5583, 0x9A66, 0x5584, 0x9150, 0x5586, 0xFA95,
00341     0x5587, 0x9A68, 0x5589, 0x8D41, 0x558A, 0x9A5E, 0x558B, 0x929D,
00342     0x5598, 0x9A62, 0x5599, 0x9A5B, 0x559A, 0x8AAB, 0x559C, 0x8AEC,
00343     0x559D, 0x8A85, 0x559E, 0x9A63, 0x559F, 0x9A5F, 0x55A7, 0x8C96,
00344     0x55A8, 0x9A69, 0x55A9, 0x9A67, 0x55AA, 0x9172, 0x55AB, 0x8B69,
00345     0x55AC, 0x8BAA, 0x55AE, 0x9A64, 0x55B0, 0x8BF2, 0x55B6, 0x8963,
00346     0x55C4, 0x9A6D, 0x55C5, 0x9A6B, 0x55C7, 0x9AA5, 0x55D4, 0x9A70,
00347     0x55DA, 0x9A6A, 0x55DC, 0x9A6E, 0x55DF, 0x9A6C, 0x55E3, 0x8E6B,
00348     0x55E4, 0x9A6F, 0x55F7, 0x9A72, 0x55F9, 0x9A77, 0x55FD, 0x9A75,
00349     0x55FE, 0x9A74, 0x5606, 0x9251, 0x5609, 0x89C3, 0x5614, 0x9A71,
00350     0x5616, 0x9A73, 0x5617, 0x8FA6, 0x5618, 0x8952, 0x561B, 0x9A76,
00351     0x5629, 0x89DC, 0x562F, 0x9A82, 0x5631, 0x8FFA, 0x5632, 0x9A7D,
00352     0x5634, 0x9A7B, 0x5636, 0x9A7C, 0x5638, 0x9A7E, 0x5642, 0x895C,
00353     0x564C, 0x9158, 0x564E, 0x9A78, 0x5650, 0x9A79, 0x565B, 0x8A9A,
00354     0x5664, 0x9A81, 0x5668, 0x8AED, 0x566A, 0x9A84, 0x566B, 0x9A80,
00355     0x566C, 0x9A83, 0x5674, 0x95AC, 0x5678, 0x93D3, 0x567A, 0x94B6,
00356     0x5680, 0x9A86, 0x5686, 0x9A85, 0x5687, 0x8A64, 0x568A, 0x9A87,
00357     0x568F, 0x9A8A, 0x5694, 0x9A89, 0x56A0, 0x9A88, 0x56A2, 0x9458,
00358     0x56A5, 0x9A8B, 0x56AE, 0x9A8C, 0x56B4, 0x9A8E, 0x56B6, 0x9A8D,
00359     0x56BC, 0x9A90, 0x56C0, 0x9A93, 0x56C1, 0x9A91, 0x56C2, 0x9A8F,
00360     0x56C3, 0x9A92, 0x56C8, 0x9A94, 0x56CE, 0x9A95, 0x56D1, 0x9A96,
00361     0x56D3, 0x9A97, 0x56D7, 0x9A98, 0x56D8, 0x9964, 0x56DA, 0x8EFA,
00362     0x56DB, 0x8E6C, 0x56DE, 0x89F1, 0x56E0, 0x88F6, 0x56E3, 0x9263,
00363     0x56EE, 0x9A99, 0x56F0, 0x8DA2, 0x56F2, 0x88CD, 0x56F3, 0x907D,
00364     0x56F9, 0x9A9A, 0x56FA, 0x8CC5, 0x56FD, 0x8D91, 0x56FF, 0x9A9C,
00365     0x5700, 0x9A9B, 0x5703, 0x95DE, 0x5704, 0x9A9D, 0x5708, 0x9A9F,
00366     0x5709, 0x9A9E, 0x570B, 0x9AA0, 0x570D, 0x9AA1, 0x570F, 0x8C97,
00367     0x5712, 0x8980, 0x5713, 0x9AA2, 0x5716, 0x9AA4, 0x5718, 0x9AA3,
00368     0x571C, 0x9AA6, 0x571F, 0x9379, 0x5726, 0x9AA7, 0x5727, 0x88B3,
00369     0x5728, 0x8DDD, 0x572D, 0x8C5C, 0x5730, 0x926E, 0x5737, 0x9AA8,
00370     0x5738, 0x9AA9, 0x573B, 0x9AAB, 0x5740, 0x9AAC, 0x5742, 0x8DE2,
00371     0x5747, 0x8BCF, 0x574A, 0x9656, 0x574E, 0x9AAA, 0x574F, 0x9AAD,
00372     0x5750, 0x8DBF, 0x5751, 0x8D42, 0x5759, 0xFA96, 0x5761, 0x9AB1,
00373     0x5764, 0x8DA3, 0x5765, 0xFA97, 0x5766, 0x9252, 0x5769, 0x9AAE,
00374     0x576A, 0x92D8, 0x577F, 0x9AB2, 0x5782, 0x9082, 0x5788, 0x9AB0,
00375     0x5789, 0x9AB3, 0x578B, 0x8C5E, 0x5793, 0x9AB4, 0x57A0, 0x9AB5,
00376     0x57A2, 0x8D43, 0x57A3, 0x8A5F, 0x57A4, 0x9AB7, 0x57AA, 0x9AB8,
00377     0x57AC, 0xFA98, 0x57B0, 0x9AB9, 0x57B3, 0x9AB6, 0x57C0, 0x9AAF,
00378     0x57C3, 0x9ABA, 0x57C6, 0x9ABB, 0x57C7, 0xFA9A, 0x57C8, 0xFA99,
00379     0x57CB, 0x9684, 0x57CE, 0x8FE9, 0x57D2, 0x9ABD, 0x57D3, 0x9ABE,
00380     0x57D4, 0x9ABC, 0x57D6, 0x9AC0, 0x57DC, 0x9457, 0x57DF, 0x88E6,
00381     0x57E0, 0x9575, 0x57E3, 0x9AC1, 0x57F4, 0x8FFB, 0x57F7, 0x8EB7,
00382     0x57F9, 0x947C, 0x57FA, 0x8AEE, 0x57FC, 0x8DE9, 0x5800, 0x9678,
00383     0x5802, 0x93B0, 0x5805, 0x8C98, 0x5806, 0x91CD, 0x580A, 0x9ABF,
00384     0x580B, 0x9AC2, 0x5815, 0x91C2, 0x5819, 0x9AC3, 0x581D, 0x9AC4,
00385     0x5821, 0x9AC6, 0x5824, 0x92E7, 0x582A, 0x8AAC, 0x582F, 0xEA9F,
00386     0x5830, 0x8981, 0x5831, 0x95F1, 0x5834, 0x8FEA, 0x5835, 0x9367,
00387     0x583A, 0x8DE4, 0x583D, 0x9ACC, 0x5840, 0x95BB, 0x5841, 0x97DB,
00388     0x584A, 0x89F2, 0x584B, 0x9AC8, 0x5851, 0x9159, 0x5852, 0x9ACB,
00389     0x5854, 0x9383, 0x5857, 0x9368, 0x5858, 0x9384, 0x5859, 0x94B7,
00390     0x585A, 0x92CB, 0x585E, 0x8DC7, 0x5862, 0x9AC7, 0x5869, 0x8996,
00391     0x586B, 0x9355, 0x5870, 0x9AC9, 0x5872, 0x9AC5, 0x5875, 0x906F,
00392     0x5879, 0x9ACD, 0x587E, 0x8F6D, 0x5883, 0x8BAB, 0x5885, 0x9ACE,
00393     0x5893, 0x95E6, 0x5897, 0x919D, 0x589C, 0x92C4, 0x589E, 0xFA9D,
00394     0x589F, 0x9AD0, 0x58A8, 0x966E, 0x58AB, 0x9AD1, 0x58AE, 0x9AD6,
00395     0x58B2, 0xFA9E, 0x58B3, 0x95AD, 0x58B8, 0x9AD5, 0x58B9, 0x9ACF,
00396     0x58BA, 0x9AD2, 0x58BB, 0x9AD4, 0x58BE, 0x8DA4, 0x58C1, 0x95C7,
00397     0x58C5, 0x9AD7, 0x58C7, 0x9264, 0x58CA, 0x89F3, 0x58CC, 0x8FEB,
00398     0x58D1, 0x9AD9, 0x58D3, 0x9AD8, 0x58D5, 0x8D88, 0x58D7, 0x9ADA,
00399     0x58D8, 0x9ADC, 0x58D9, 0x9ADB, 0x58DC, 0x9ADE, 0x58DE, 0x9AD3,
00400     0x58DF, 0x9AE0, 0x58E4, 0x9ADF, 0x58E5, 0x9ADD, 0x58EB, 0x8E6D,
00401     0x58EC, 0x9070, 0x58EE, 0x9173, 0x58EF, 0x9AE1, 0x58F0, 0x90BA,
00402     0x58F1, 0x88EB, 0x58F2, 0x9484, 0x58F7, 0x92D9, 0x58F9, 0x9AE3,
00403     0x58FA, 0x9AE2, 0x58FB, 0x9AE4, 0x58FC, 0x9AE5, 0x58FD, 0x9AE6,
00404     0x5902, 0x9AE7, 0x5909, 0x95CF, 0x590A, 0x9AE8, 0x590B, 0xFA9F,
00405     0x590F, 0x89C4, 0x5910, 0x9AE9, 0x5915, 0x975B, 0x5916, 0x8A4F,
00406     0x5918, 0x99C7, 0x5919, 0x8F67, 0x591A, 0x91BD, 0x591B, 0x9AEA,
00407     0x591C, 0x96E9, 0x5922, 0x96B2, 0x5925, 0x9AEC, 0x5927, 0x91E5,
00408     0x5929, 0x9356, 0x592A, 0x91BE, 0x592B, 0x9576, 0x592C, 0x9AED,
00409     0x592D, 0x9AEE, 0x592E, 0x899B, 0x5931, 0x8EB8, 0x5932, 0x9AEF,
00410     0x5937, 0x88CE, 0x5938, 0x9AF0, 0x593E, 0x9AF1, 0x5944, 0x8982,
00411     0x5947, 0x8AEF, 0x5948, 0x93DE, 0x5949, 0x95F2, 0x594E, 0x9AF5,
00412     0x594F, 0x9174, 0x5950, 0x9AF4, 0x5951, 0x8C5F, 0x5953, 0xFAA0,
00413     0x5954, 0x967A, 0x5955, 0x9AF3, 0x5957, 0x9385, 0x5958, 0x9AF7,
00414     0x595A, 0x9AF6, 0x595B, 0xFAA1, 0x595D, 0xFAA2, 0x5960, 0x9AF9,
00415     0x5962, 0x9AF8, 0x5963, 0xFAA3, 0x5965, 0x899C, 0x5967, 0x9AFA,
00416     0x5968, 0x8FA7, 0x5969, 0x9AFC, 0x596A, 0x9244, 0x596C, 0x9AFB,
00417     0x596E, 0x95B1, 0x5973, 0x8F97, 0x5974, 0x937A, 0x5978, 0x9B40,
00418     0x597D, 0x8D44, 0x5981, 0x9B41, 0x5982, 0x9440, 0x5983, 0x94DC,
00419     0x5984, 0x96CF, 0x598A, 0x9444, 0x598D, 0x9B4A, 0x5993, 0x8B57,
00420     0x5996, 0x9764, 0x5999, 0x96AD, 0x599B, 0x9BAA, 0x599D, 0x9B42,
00421     0x59A3, 0x9B45, 0x59A4, 0xFAA4, 0x59A5, 0x91C3, 0x59A8, 0x9657,
00422     0x59AC, 0x9369, 0x59B2, 0x9B46, 0x59B9, 0x9685, 0x59BA, 0xFAA5,
00423     0x59BB, 0x8DC8, 0x59BE, 0x8FA8, 0x59C6, 0x9B47, 0x59C9, 0x8E6F,
00424     0x59CB, 0x8E6E, 0x59D0, 0x88B7, 0x59D1, 0x8CC6, 0x59D3, 0x90A9,
00425     0x59D4, 0x88CF, 0x59D9, 0x9B4B, 0x59DA, 0x9B4C, 0x59DC, 0x9B49,
00426     0x59E5, 0x8957, 0x59E6, 0x8AAD, 0x59E8, 0x9B48, 0x59EA, 0x96C3,
00427     0x59EB, 0x9550, 0x59F6, 0x88A6, 0x59FB, 0x88F7, 0x59FF, 0x8E70,
00428     0x5A01, 0x88D0, 0x5A03, 0x88A1, 0x5A09, 0x9B51, 0x5A11, 0x9B4F,
00429     0x5A18, 0x96BA, 0x5A1A, 0x9B52, 0x5A1C, 0x9B50, 0x5A1F, 0x9B4E,
00430     0x5A20, 0x9050, 0x5A25, 0x9B4D, 0x5A29, 0x95D8, 0x5A2F, 0x8CE2,
00431     0x5A35, 0x9B56, 0x5A36, 0x9B57, 0x5A3C, 0x8FA9, 0x5A40, 0x9B53,
00432     0x5A41, 0x984B, 0x5A46, 0x946B, 0x5A49, 0x9B55, 0x5A5A, 0x8DA5,
00433     0x5A62, 0x9B58, 0x5A66, 0x9577, 0x5A6A, 0x9B59, 0x5A6C, 0x9B54,
00434     0x5A7F, 0x96B9, 0x5A92, 0x947D, 0x5A9A, 0x9B5A, 0x5A9B, 0x9551,
00435     0x5ABC, 0x9B5B, 0x5ABD, 0x9B5F, 0x5ABE, 0x9B5C, 0x5AC1, 0x89C5,
00436     0x5AC2, 0x9B5E, 0x5AC9, 0x8EB9, 0x5ACB, 0x9B5D, 0x5ACC, 0x8C99,
00437     0x5AD0, 0x9B6B, 0x5AD6, 0x9B64, 0x5AD7, 0x9B61, 0x5AE1, 0x9284,
00438     0x5AE3, 0x9B60, 0x5AE6, 0x9B62, 0x5AE9, 0x9B63, 0x5AFA, 0x9B65,
00439     0x5AFB, 0x9B66, 0x5B09, 0x8AF0, 0x5B0B, 0x9B68, 0x5B0C, 0x9B67,
00440     0x5B16, 0x9B69, 0x5B22, 0x8FEC, 0x5B2A, 0x9B6C, 0x5B2C, 0x92DA,
00441     0x5B30, 0x8964, 0x5B32, 0x9B6A, 0x5B36, 0x9B6D, 0x5B3E, 0x9B6E,
00442     0x5B40, 0x9B71, 0x5B43, 0x9B6F, 0x5B45, 0x9B70, 0x5B50, 0x8E71,
00443     0x5B51, 0x9B72, 0x5B54, 0x8D45, 0x5B55, 0x9B73, 0x5B56, 0xFAA6,
00444     0x5B57, 0x8E9A, 0x5B58, 0x91B6, 0x5B5A, 0x9B74, 0x5B5B, 0x9B75,
00445     0x5B5C, 0x8E79, 0x5B5D, 0x8D46, 0x5B5F, 0x96D0, 0x5B63, 0x8B47,
00446     0x5B64, 0x8CC7, 0x5B65, 0x9B76, 0x5B66, 0x8A77, 0x5B69, 0x9B77,
00447     0x5B6B, 0x91B7, 0x5B70, 0x9B78, 0x5B71, 0x9BA1, 0x5B73, 0x9B79,
00448     0x5B75, 0x9B7A, 0x5B78, 0x9B7B, 0x5B7A, 0x9B7D, 0x5B80, 0x9B7E,
00449     0x5B83, 0x9B80, 0x5B85, 0x91EE, 0x5B87, 0x8946, 0x5B88, 0x8EE7,
00450     0x5B89, 0x88C0, 0x5B8B, 0x9176, 0x5B8C, 0x8AAE, 0x5B8D, 0x8EB3,
00451     0x5B8F, 0x8D47, 0x5B95, 0x9386, 0x5B97, 0x8F40, 0x5B98, 0x8AAF,
00452     0x5B99, 0x9288, 0x5B9A, 0x92E8, 0x5B9B, 0x88B6, 0x5B9C, 0x8B58,
00453     0x5B9D, 0x95F3, 0x5B9F, 0x8EC0, 0x5BA2, 0x8B71, 0x5BA3, 0x90E9,
00454     0x5BA4, 0x8EBA, 0x5BA5, 0x9747, 0x5BA6, 0x9B81, 0x5BAE, 0x8B7B,
00455     0x5BB0, 0x8DC9, 0x5BB3, 0x8A51, 0x5BB4, 0x8983, 0x5BB5, 0x8FAA,
00456     0x5BB6, 0x89C6, 0x5BB8, 0x9B82, 0x5BB9, 0x9765, 0x5BBF, 0x8F68,
00457     0x5BC0, 0xFAA7, 0x5BC2, 0x8EE2, 0x5BC3, 0x9B83, 0x5BC4, 0x8AF1,
00458     0x5BC5, 0x93D0, 0x5BC6, 0x96A7, 0x5BC7, 0x9B84, 0x5BC9, 0x9B85,
00459     0x5BCC, 0x9578, 0x5BD0, 0x9B87, 0x5BD2, 0x8AA6, 0x5BD3, 0x8BF5,
00460     0x5BD4, 0x9B86, 0x5BD8, 0xFAA9, 0x5BDB, 0x8AB0, 0x5BDD, 0x9051,
00461     0x5BDE, 0x9B8B, 0x5BDF, 0x8E40, 0x5BE1, 0x89C7, 0x5BE2, 0x9B8A,
00462     0x5BE4, 0x9B88, 0x5BE5, 0x9B8C, 0x5BE6, 0x9B89, 0x5BE7, 0x944A,
00463     0x5BE8, 0x9ECB, 0x5BE9, 0x9052, 0x5BEB, 0x9B8D, 0x5BEC, 0xFAAA,
00464     0x5BEE, 0x97BE, 0x5BF0, 0x9B8E, 0x5BF3, 0x9B90, 0x5BF5, 0x929E,
00465     0x5BF6, 0x9B8F, 0x5BF8, 0x90A1, 0x5BFA, 0x8E9B, 0x5BFE, 0x91CE,
00466     0x5BFF, 0x8EF5, 0x5C01, 0x9595, 0x5C02, 0x90EA, 0x5C04, 0x8ECB,
00467     0x5C05, 0x9B91, 0x5C06, 0x8FAB, 0x5C07, 0x9B92, 0x5C08, 0x9B93,
00468     0x5C09, 0x88D1, 0x5C0A, 0x91B8, 0x5C0B, 0x9071, 0x5C0D, 0x9B94,
00469     0x5C0E, 0x93B1, 0x5C0F, 0x8FAC, 0x5C11, 0x8FAD, 0x5C13, 0x9B95,
00470     0x5C16, 0x90EB, 0x5C1A, 0x8FAE, 0x5C1E, 0xFAAB, 0x5C20, 0x9B96,
00471     0x5C22, 0x9B97, 0x5C24, 0x96DE, 0x5C28, 0x9B98, 0x5C2D, 0x8BC4,
00472     0x5C31, 0x8F41, 0x5C38, 0x9B99, 0x5C39, 0x9B9A, 0x5C3A, 0x8EDA,
00473     0x5C3B, 0x904B, 0x5C3C, 0x93F2, 0x5C3D, 0x9073, 0x5C3E, 0x94F6,
00474     0x5C3F, 0x9441, 0x5C40, 0x8BC7, 0x5C41, 0x9B9B, 0x5C45, 0x8B8F,
00475     0x5C46, 0x9B9C, 0x5C48, 0x8BFC, 0x5C4A, 0x93CD, 0x5C4B, 0x89AE,
00476     0x5C4D, 0x8E72, 0x5C4E, 0x9B9D, 0x5C4F, 0x9BA0, 0x5C50, 0x9B9F,
00477     0x5C51, 0x8BFB, 0x5C53, 0x9B9E, 0x5C55, 0x9357, 0x5C5E, 0x91AE,
00478     0x5C60, 0x936A, 0x5C61, 0x8EC6, 0x5C64, 0x9177, 0x5C65, 0x979A,
00479     0x5C6C, 0x9BA2, 0x5C6E, 0x9BA3, 0x5C6F, 0x93D4, 0x5C71, 0x8E52,
00480     0x5C76, 0x9BA5, 0x5C79, 0x9BA6, 0x5C8C, 0x9BA7, 0x5C90, 0x8AF2,
00481     0x5C91, 0x9BA8, 0x5C94, 0x9BA9, 0x5CA1, 0x89AA, 0x5CA6, 0xFAAC,
00482     0x5CA8, 0x915A, 0x5CA9, 0x8AE2, 0x5CAB, 0x9BAB, 0x5CAC, 0x96A6,
00483     0x5CB1, 0x91D0, 0x5CB3, 0x8A78, 0x5CB6, 0x9BAD, 0x5CB7, 0x9BAF,
00484     0x5CB8, 0x8ADD, 0x5CBA, 0xFAAD, 0x5CBB, 0x9BAC, 0x5CBC, 0x9BAE,
00485     0x5CBE, 0x9BB1, 0x5CC5, 0x9BB0, 0x5CC7, 0x9BB2, 0x5CD9, 0x9BB3,
00486     0x5CE0, 0x93BB, 0x5CE1, 0x8BAC, 0x5CE8, 0x89E3, 0x5CE9, 0x9BB4,
00487     0x5CEA, 0x9BB9, 0x5CED, 0x9BB7, 0x5CEF, 0x95F5, 0x5CF0, 0x95F4,
00488     0x5CF5, 0xFAAE, 0x5CF6, 0x9387, 0x5CFA, 0x9BB6, 0x5CFB, 0x8F73,
00489     0x5CFD, 0x9BB5, 0x5D07, 0x9092, 0x5D0B, 0x9BBA, 0x5D0E, 0x8DE8,
00490     0x5D11, 0x9BC0, 0x5D14, 0x9BC1, 0x5D15, 0x9BBB, 0x5D16, 0x8A52,
00491     0x5D17, 0x9BBC, 0x5D18, 0x9BC5, 0x5D19, 0x9BC4, 0x5D1A, 0x9BC3,
00492     0x5D1B, 0x9BBF, 0x5D1F, 0x9BBE, 0x5D22, 0x9BC2, 0x5D27, 0xFAAF,
00493     0x5D29, 0x95F6, 0x5D42, 0xFAB2, 0x5D4B, 0x9BC9, 0x5D4C, 0x9BC6,
00494     0x5D4E, 0x9BC8, 0x5D50, 0x9792, 0x5D52, 0x9BC7, 0x5D53, 0xFAB0,
00495     0x5D5C, 0x9BBD, 0x5D69, 0x9093, 0x5D6C, 0x9BCA, 0x5D6D, 0xFAB3,
00496     0x5D6F, 0x8DB5, 0x5D73, 0x9BCB, 0x5D76, 0x9BCC, 0x5D82, 0x9BCF,
00497     0x5D84, 0x9BCE, 0x5D87, 0x9BCD, 0x5D8B, 0x9388, 0x5D8C, 0x9BB8,
00498     0x5D90, 0x9BD5, 0x5D9D, 0x9BD1, 0x5DA2, 0x9BD0, 0x5DAC, 0x9BD2,
00499     0x5DAE, 0x9BD3, 0x5DB7, 0x9BD6, 0x5DB8, 0xFAB4, 0x5DB9, 0xFAB5,
00500     0x5DBA, 0x97E4, 0x5DBC, 0x9BD7, 0x5DBD, 0x9BD4, 0x5DC9, 0x9BD8,
00501     0x5DCC, 0x8ADE, 0x5DCD, 0x9BD9, 0x5DD0, 0xFAB6, 0x5DD2, 0x9BDB,
00502     0x5DD3, 0x9BDA, 0x5DD6, 0x9BDC, 0x5DDB, 0x9BDD, 0x5DDD, 0x90EC,
00503     0x5DDE, 0x8F42, 0x5DE1, 0x8F84, 0x5DE3, 0x9183, 0x5DE5, 0x8D48,
00504     0x5DE6, 0x8DB6, 0x5DE7, 0x8D49, 0x5DE8, 0x8B90, 0x5DEB, 0x9BDE,
00505     0x5DEE, 0x8DB7, 0x5DF1, 0x8CC8, 0x5DF2, 0x9BDF, 0x5DF3, 0x96A4,
00506     0x5DF4, 0x9462, 0x5DF5, 0x9BE0, 0x5DF7, 0x8D4A, 0x5DFB, 0x8AAA,
00507     0x5DFD, 0x9246, 0x5DFE, 0x8BD0, 0x5E02, 0x8E73, 0x5E03, 0x957A,
00508     0x5E06, 0x94BF, 0x5E0B, 0x9BE1, 0x5E0C, 0x8AF3, 0x5E11, 0x9BE4,
00509     0x5E16, 0x929F, 0x5E19, 0x9BE3, 0x5E1A, 0x9BE2, 0x5E1B, 0x9BE5,
00510     0x5E1D, 0x92E9, 0x5E25, 0x9083, 0x5E2B, 0x8E74, 0x5E2D, 0x90C8,
00511     0x5E2F, 0x91D1, 0x5E30, 0x8B41, 0x5E33, 0x92A0, 0x5E36, 0x9BE6,
00512     0x5E37, 0x9BE7, 0x5E38, 0x8FED, 0x5E3D, 0x9658, 0x5E40, 0x9BEA,
00513     0x5E43, 0x9BE9, 0x5E44, 0x9BE8, 0x5E45, 0x959D, 0x5E47, 0x9BF1,
00514     0x5E4C, 0x9679, 0x5E4E, 0x9BEB, 0x5E54, 0x9BED, 0x5E55, 0x968B,
00515     0x5E57, 0x9BEC, 0x5E5F, 0x9BEE, 0x5E61, 0x94A6, 0x5E62, 0x9BEF,
00516     0x5E63, 0x95BC, 0x5E64, 0x9BF0, 0x5E72, 0x8AB1, 0x5E73, 0x95BD,
00517     0x5E74, 0x944E, 0x5E75, 0x9BF2, 0x5E76, 0x9BF3, 0x5E78, 0x8D4B,
00518     0x5E79, 0x8AB2, 0x5E7A, 0x9BF4, 0x5E7B, 0x8CB6, 0x5E7C, 0x9763,
00519     0x5E7D, 0x9748, 0x5E7E, 0x8AF4, 0x5E7F, 0x9BF6, 0x5E81, 0x92A1,
00520     0x5E83, 0x8D4C, 0x5E84, 0x8FAF, 0x5E87, 0x94DD, 0x5E8A, 0x8FB0,
00521     0x5E8F, 0x8F98, 0x5E95, 0x92EA, 0x5E96, 0x95F7, 0x5E97, 0x9358,
00522     0x5E9A, 0x8D4D, 0x5E9C, 0x957B, 0x5EA0, 0x9BF7, 0x5EA6, 0x9378,
00523     0x5EA7, 0x8DC0, 0x5EAB, 0x8CC9, 0x5EAD, 0x92EB, 0x5EB5, 0x88C1,
00524     0x5EB6, 0x8F8E, 0x5EB7, 0x8D4E, 0x5EB8, 0x9766, 0x5EC1, 0x9BF8,
00525     0x5EC2, 0x9BF9, 0x5EC3, 0x9470, 0x5EC8, 0x9BFA, 0x5EC9, 0x97F5,
00526     0x5ECA, 0x984C, 0x5ECF, 0x9BFC, 0x5ED0, 0x9BFB, 0x5ED3, 0x8A66,
00527     0x5ED6, 0x9C40, 0x5EDA, 0x9C43, 0x5EDB, 0x9C44, 0x5EDD, 0x9C42,
00528     0x5EDF, 0x955F, 0x5EE0, 0x8FB1, 0x5EE1, 0x9C46, 0x5EE2, 0x9C45,
00529     0x5EE3, 0x9C41, 0x5EE8, 0x9C47, 0x5EE9, 0x9C48, 0x5EEC, 0x9C49,
00530     0x5EF0, 0x9C4C, 0x5EF1, 0x9C4A, 0x5EF3, 0x9C4B, 0x5EF4, 0x9C4D,
00531     0x5EF6, 0x8984, 0x5EF7, 0x92EC, 0x5EF8, 0x9C4E, 0x5EFA, 0x8C9A,
00532     0x5EFB, 0x89F4, 0x5EFC, 0x9455, 0x5EFE, 0x9C4F, 0x5EFF, 0x93F9,
00533     0x5F01, 0x95D9, 0x5F03, 0x9C50, 0x5F04, 0x984D, 0x5F09, 0x9C51,
00534     0x5F0A, 0x95BE, 0x5F0B, 0x9C54, 0x5F0C, 0x989F, 0x5F0D, 0x98AF,
00535     0x5F0F, 0x8EAE, 0x5F10, 0x93F3, 0x5F11, 0x9C55, 0x5F13, 0x8B7C,
00536     0x5F14, 0x92A2, 0x5F15, 0x88F8, 0x5F16, 0x9C56, 0x5F17, 0x95A4,
00537     0x5F18, 0x8D4F, 0x5F1B, 0x926F, 0x5F1F, 0x92ED, 0x5F21, 0xFAB7,
00538     0x5F25, 0x96ED, 0x5F26, 0x8CB7, 0x5F27, 0x8CCA, 0x5F29, 0x9C57,
00539     0x5F2D, 0x9C58, 0x5F2F, 0x9C5E, 0x5F31, 0x8EE3, 0x5F34, 0xFAB8,
00540     0x5F35, 0x92A3, 0x5F37, 0x8BAD, 0x5F38, 0x9C59, 0x5F3C, 0x954A,
00541     0x5F3E, 0x9265, 0x5F41, 0x9C5A, 0x5F45, 0xFA67, 0x5F48, 0x9C5B,
00542     0x5F4A, 0x8BAE, 0x5F4C, 0x9C5C, 0x5F4E, 0x9C5D, 0x5F51, 0x9C5F,
00543     0x5F53, 0x9396, 0x5F56, 0x9C60, 0x5F57, 0x9C61, 0x5F59, 0x9C62,
00544     0x5F5C, 0x9C53, 0x5F5D, 0x9C52, 0x5F61, 0x9C63, 0x5F62, 0x8C60,
00545     0x5F66, 0x9546, 0x5F67, 0xFAB9, 0x5F69, 0x8DCA, 0x5F6A, 0x9556,
00546     0x5F6B, 0x92A4, 0x5F6C, 0x956A, 0x5F6D, 0x9C64, 0x5F70, 0x8FB2,
00547     0x5F71, 0x8965, 0x5F73, 0x9C65, 0x5F77, 0x9C66, 0x5F79, 0x96F0,
00548     0x5F7C, 0x94DE, 0x5F7F, 0x9C69, 0x5F80, 0x899D, 0x5F81, 0x90AA,
00549     0x5F82, 0x9C68, 0x5F83, 0x9C67, 0x5F84, 0x8C61, 0x5F85, 0x91D2,
00550     0x5F87, 0x9C6D, 0x5F88, 0x9C6B, 0x5F8A, 0x9C6A, 0x5F8B, 0x97A5,
00551     0x5F8C, 0x8CE3, 0x5F90, 0x8F99, 0x5F91, 0x9C6C, 0x5F92, 0x936B,
00552     0x5F93, 0x8F5D, 0x5F97, 0x93BE, 0x5F98, 0x9C70, 0x5F99, 0x9C6F,
00553     0x5F9E, 0x9C6E, 0x5FA0, 0x9C71, 0x5FA1, 0x8CE4, 0x5FA8, 0x9C72,
00554     0x5FA9, 0x959C, 0x5FAA, 0x8F7A, 0x5FAD, 0x9C73, 0x5FAE, 0x94F7,
00555     0x5FB3, 0x93BF, 0x5FB4, 0x92A5, 0x5FB7, 0xFABA, 0x5FB9, 0x934F,
00556     0x5FBC, 0x9C74, 0x5FBD, 0x8B4A, 0x5FC3, 0x9053, 0x5FC5, 0x954B,
00557     0x5FCC, 0x8AF5, 0x5FCD, 0x9445, 0x5FD6, 0x9C75, 0x5FD7, 0x8E75,
00558     0x5FD8, 0x9659, 0x5FD9, 0x965A, 0x5FDC, 0x899E, 0x5FDD, 0x9C7A,
00559     0x5FDE, 0xFABB, 0x5FE0, 0x9289, 0x5FE4, 0x9C77, 0x5FEB, 0x89F5,
00560     0x5FF0, 0x9CAB, 0x5FF1, 0x9C79, 0x5FF5, 0x944F, 0x5FF8, 0x9C78,
00561     0x5FFB, 0x9C76, 0x5FFD, 0x8D9A, 0x5FFF, 0x9C7C, 0x600E, 0x9C83,
00562     0x600F, 0x9C89, 0x6010, 0x9C81, 0x6012, 0x937B, 0x6015, 0x9C86,
00563     0x6016, 0x957C, 0x6019, 0x9C80, 0x601B, 0x9C85, 0x601C, 0x97E5,
00564     0x601D, 0x8E76, 0x6020, 0x91D3, 0x6021, 0x9C7D, 0x6025, 0x8B7D,
00565     0x6026, 0x9C88, 0x6027, 0x90AB, 0x6028, 0x8985, 0x6029, 0x9C82,
00566     0x602A, 0x89F6, 0x602B, 0x9C87, 0x602F, 0x8BAF, 0x6031, 0x9C84,
00567     0x603A, 0x9C8A, 0x6041, 0x9C8C, 0x6042, 0x9C96, 0x6043, 0x9C94,
00568     0x6046, 0x9C91, 0x604A, 0x9C90, 0x604B, 0x97F6, 0x604D, 0x9C92,
00569     0x6050, 0x8BB0, 0x6052, 0x8D50, 0x6055, 0x8F9A, 0x6059, 0x9C99,
00570     0x605A, 0x9C8B, 0x605D, 0xFABC, 0x605F, 0x9C8F, 0x6060, 0x9C7E,
00571     0x6062, 0x89F8, 0x6063, 0x9C93, 0x6064, 0x9C95, 0x6065, 0x9270,
00572     0x6068, 0x8DA6, 0x6069, 0x89B6, 0x606A, 0x9C8D, 0x606B, 0x9C98,
00573     0x606C, 0x9C97, 0x606D, 0x8BB1, 0x606F, 0x91A7, 0x6070, 0x8A86,
00574     0x6075, 0x8C62, 0x6077, 0x9C8E, 0x6081, 0x9C9A, 0x6083, 0x9C9D,
00575     0x6084, 0x9C9F, 0x6085, 0xFABD, 0x6089, 0x8EBB, 0x608A, 0xFABE,
00576     0x608B, 0x9CA5, 0x608C, 0x92EE, 0x608D, 0x9C9B, 0x6092, 0x9CA3,
00577     0x6094, 0x89F7, 0x6096, 0x9CA1, 0x6097, 0x9CA2, 0x609A, 0x9C9E,
00578     0x609B, 0x9CA0, 0x609F, 0x8CE5, 0x60A0, 0x9749, 0x60A3, 0x8AB3,
00579     0x60A6, 0x8978, 0x60A7, 0x9CA4, 0x60A9, 0x9459, 0x60AA, 0x88AB,
00580     0x60B2, 0x94DF, 0x60B3, 0x9C7B, 0x60B4, 0x9CAA, 0x60B5, 0x9CAE,
00581     0x60B6, 0x96E3, 0x60B8, 0x9CA7, 0x60BC, 0x9389, 0x60BD, 0x9CAC,
00582     0x60C5, 0x8FEE, 0x60C6, 0x9CAD, 0x60C7, 0x93D5, 0x60D1, 0x9866,
00583     0x60D3, 0x9CA9, 0x60D5, 0xFAC0, 0x60D8, 0x9CAF, 0x60DA, 0x8D9B,
00584     0x60DC, 0x90C9, 0x60DE, 0xFABF, 0x60DF, 0x88D2, 0x60E0, 0x9CA8,
00585     0x60E1, 0x9CA6, 0x60E3, 0x9179, 0x60E7, 0x9C9C, 0x60E8, 0x8E53,
00586     0x60F0, 0x91C4, 0x60F1, 0x9CBB, 0x60F2, 0xFAC2, 0x60F3, 0x917A,
00587     0x60F4, 0x9CB6, 0x60F6, 0x9CB3, 0x60F7, 0x9CB4, 0x60F9, 0x8EE4,
00588     0x60FA, 0x9CB7, 0x60FB, 0x9CBA, 0x6100, 0x9CB5, 0x6101, 0x8F44,
00589     0x6103, 0x9CB8, 0x6106, 0x9CB2, 0x6108, 0x96FA, 0x6109, 0x96F9,
00590     0x610D, 0x9CBC, 0x610E, 0x9CBD, 0x610F, 0x88D3, 0x6111, 0xFAC3,
00591     0x6115, 0x9CB1, 0x611A, 0x8BF0, 0x611B, 0x88A4, 0x611F, 0x8AB4,
00592     0x6120, 0xFAC1, 0x6121, 0x9CB9, 0x6127, 0x9CC1, 0x6128, 0x9CC0,
00593     0x612C, 0x9CC5, 0x6130, 0xFAC5, 0x6134, 0x9CC6, 0x6137, 0xFAC4,
00594     0x613C, 0x9CC4, 0x613D, 0x9CC7, 0x613E, 0x9CBF, 0x613F, 0x9CC3,
00595     0x6142, 0x9CC8, 0x6144, 0x9CC9, 0x6147, 0x9CBE, 0x6148, 0x8E9C,
00596     0x614A, 0x9CC2, 0x614B, 0x91D4, 0x614C, 0x8D51, 0x614D, 0x9CB0,
00597     0x614E, 0x9054, 0x6153, 0x9CD6, 0x6155, 0x95E7, 0x6158, 0x9CCC,
00598     0x6159, 0x9CCD, 0x615A, 0x9CCE, 0x615D, 0x9CD5, 0x615F, 0x9CD4,
00599     0x6162, 0x969D, 0x6163, 0x8AB5, 0x6165, 0x9CD2, 0x6167, 0x8C64,
00600     0x6168, 0x8A53, 0x616B, 0x9CCF, 0x616E, 0x97B6, 0x616F, 0x9CD1,
00601     0x6170, 0x88D4, 0x6171, 0x9CD3, 0x6173, 0x9CCA, 0x6174, 0x9CD0,
00602     0x6175, 0x9CD7, 0x6176, 0x8C63, 0x6177, 0x9CCB, 0x617E, 0x977C,
00603     0x6182, 0x974A, 0x6187, 0x9CDA, 0x618A, 0x9CDE, 0x618E, 0x919E,
00604     0x6190, 0x97F7, 0x6191, 0x9CDF, 0x6194, 0x9CDC, 0x6196, 0x9CD9,
00605     0x6198, 0xFAC6, 0x6199, 0x9CD8, 0x619A, 0x9CDD, 0x61A4, 0x95AE,
00606     0x61A7, 0x93B2, 0x61A9, 0x8C65, 0x61AB, 0x9CE0, 0x61AC, 0x9CDB,
00607     0x61AE, 0x9CE1, 0x61B2, 0x8C9B, 0x61B6, 0x89AF, 0x61BA, 0x9CE9,
00608     0x61BE, 0x8AB6, 0x61C3, 0x9CE7, 0x61C6, 0x9CE8, 0x61C7, 0x8DA7,
00609     0x61C8, 0x9CE6, 0x61C9, 0x9CE4, 0x61CA, 0x9CE3, 0x61CB, 0x9CEA,
00610     0x61CC, 0x9CE2, 0x61CD, 0x9CEC, 0x61D0, 0x89F9, 0x61E3, 0x9CEE,
00611     0x61E6, 0x9CED, 0x61F2, 0x92A6, 0x61F4, 0x9CF1, 0x61F6, 0x9CEF,
00612     0x61F7, 0x9CE5, 0x61F8, 0x8C9C, 0x61FA, 0x9CF0, 0x61FC, 0x9CF4,
00613     0x61FD, 0x9CF3, 0x61FE, 0x9CF5, 0x61FF, 0x9CF2, 0x6200, 0x9CF6,
00614     0x6208, 0x9CF7, 0x6209, 0x9CF8, 0x620A, 0x95E8, 0x620C, 0x9CFA,
00615     0x620D, 0x9CF9, 0x620E, 0x8F5E, 0x6210, 0x90AC, 0x6211, 0x89E4,
00616     0x6212, 0x89FA, 0x6213, 0xFAC7, 0x6214, 0x9CFB, 0x6216, 0x88BD,
00617     0x621A, 0x90CA, 0x621B, 0x9CFC, 0x621D, 0xE6C1, 0x621E, 0x9D40,
00618     0x621F, 0x8C81, 0x6221, 0x9D41, 0x6226, 0x90ED, 0x622A, 0x9D42,
00619     0x622E, 0x9D43, 0x622F, 0x8B59, 0x6230, 0x9D44, 0x6232, 0x9D45,
00620     0x6233, 0x9D46, 0x6234, 0x91D5, 0x6238, 0x8CCB, 0x623B, 0x96DF,
00621     0x623F, 0x965B, 0x6240, 0x8F8A, 0x6241, 0x9D47, 0x6247, 0x90EE,
00622     0x6248, 0xE7BB, 0x6249, 0x94E0, 0x624B, 0x8EE8, 0x624D, 0x8DCB,
00623     0x624E, 0x9D48, 0x6253, 0x91C5, 0x6255, 0x95A5, 0x6258, 0x91EF,
00624     0x625B, 0x9D4B, 0x625E, 0x9D49, 0x6260, 0x9D4C, 0x6263, 0x9D4A,
00625     0x6268, 0x9D4D, 0x626E, 0x95AF, 0x6271, 0x88B5, 0x6276, 0x957D,
00626     0x6279, 0x94E1, 0x627C, 0x9D4E, 0x627E, 0x9D51, 0x627F, 0x8FB3,
00627     0x6280, 0x8B5A, 0x6282, 0x9D4F, 0x6283, 0x9D56, 0x6284, 0x8FB4,
00628     0x6289, 0x9D50, 0x628A, 0x9463, 0x6291, 0x977D, 0x6292, 0x9D52,
00629     0x6293, 0x9D53, 0x6294, 0x9D57, 0x6295, 0x938A, 0x6296, 0x9D54,
00630     0x6297, 0x8D52, 0x6298, 0x90DC, 0x629B, 0x9D65, 0x629C, 0x94B2,
00631     0x629E, 0x91F0, 0x62A6, 0xFAC8, 0x62AB, 0x94E2, 0x62AC, 0x9DAB,
00632     0x62B1, 0x95F8, 0x62B5, 0x92EF, 0x62B9, 0x9695, 0x62BB, 0x9D5A,
00633     0x62BC, 0x899F, 0x62BD, 0x928A, 0x62C2, 0x9D63, 0x62C5, 0x9253,
00634     0x62C6, 0x9D5D, 0x62C7, 0x9D64, 0x62C8, 0x9D5F, 0x62C9, 0x9D66,
00635     0x62CA, 0x9D62, 0x62CC, 0x9D61, 0x62CD, 0x948F, 0x62CF, 0x9D5B,
00636     0x62D0, 0x89FB, 0x62D1, 0x9D59, 0x62D2, 0x8B91, 0x62D3, 0x91F1,
00637     0x62D4, 0x9D55, 0x62D7, 0x9D58, 0x62D8, 0x8D53, 0x62D9, 0x90D9,
00638     0x62DB, 0x8FB5, 0x62DC, 0x9D60, 0x62DD, 0x9471, 0x62E0, 0x8B92,
00639     0x62E1, 0x8A67, 0x62EC, 0x8A87, 0x62ED, 0x9040, 0x62EE, 0x9D68,
00640     0x62EF, 0x9D6D, 0x62F1, 0x9D69, 0x62F3, 0x8C9D, 0x62F5, 0x9D6E,
00641     0x62F6, 0x8E41, 0x62F7, 0x8D89, 0x62FE, 0x8F45, 0x62FF, 0x9D5C,
00642     0x6301, 0x8E9D, 0x6302, 0x9D6B, 0x6307, 0x8E77, 0x6308, 0x9D6C,
00643     0x6309, 0x88C2, 0x630C, 0x9D67, 0x6311, 0x92A7, 0x6319, 0x8B93,
00644     0x631F, 0x8BB2, 0x6327, 0x9D6A, 0x6328, 0x88A5, 0x632B, 0x8DC1,
00645     0x632F, 0x9055, 0x633A, 0x92F0, 0x633D, 0x94D2, 0x633E, 0x9D70,
00646     0x633F, 0x917D, 0x6349, 0x91A8, 0x634C, 0x8E4A, 0x634D, 0x9D71,
00647     0x634F, 0x9D73, 0x6350, 0x9D6F, 0x6355, 0x95DF, 0x6357, 0x92BB,
00648     0x635C, 0x917B, 0x6367, 0x95F9, 0x6368, 0x8ECC, 0x6369, 0x9D80,
00649     0x636B, 0x9D7E, 0x636E, 0x9098, 0x6372, 0x8C9E, 0x6376, 0x9D78,
00650     0x6377, 0x8FB7, 0x637A, 0x93E6, 0x637B, 0x9450, 0x6380, 0x9D76,
00651     0x6383, 0x917C, 0x6388, 0x8EF6, 0x6389, 0x9D7B, 0x638C, 0x8FB6,
00652     0x638E, 0x9D75, 0x638F, 0x9D7A, 0x6392, 0x9472, 0x6396, 0x9D74,
00653     0x6398, 0x8C40, 0x639B, 0x8A7C, 0x639F, 0x9D7C, 0x63A0, 0x97A9,
00654     0x63A1, 0x8DCC, 0x63A2, 0x9254, 0x63A3, 0x9D79, 0x63A5, 0x90DA,
00655     0x63A7, 0x8D54, 0x63A8, 0x9084, 0x63A9, 0x8986, 0x63AA, 0x915B,
00656     0x63AB, 0x9D77, 0x63AC, 0x8B64, 0x63B2, 0x8C66, 0x63B4, 0x92CD,
00657     0x63B5, 0x9D7D, 0x63BB, 0x917E, 0x63BE, 0x9D81, 0x63C0, 0x9D83,
00658     0x63C3, 0x91B5, 0x63C4, 0x9D89, 0x63C6, 0x9D84, 0x63C9, 0x9D86,
00659     0x63CF, 0x9560, 0x63D0, 0x92F1, 0x63D2, 0x9D87, 0x63D6, 0x974B,
00660     0x63DA, 0x9767, 0x63DB, 0x8AB7, 0x63E1, 0x88AC, 0x63E3, 0x9D85,
00661     0x63E9, 0x9D82, 0x63EE, 0x8AF6, 0x63F4, 0x8987, 0x63F5, 0xFAC9,
00662     0x63F6, 0x9D88, 0x63FA, 0x9768, 0x6406, 0x9D8C, 0x640D, 0x91B9,
00663     0x640F, 0x9D93, 0x6413, 0x9D8D, 0x6416, 0x9D8A, 0x6417, 0x9D91,
00664     0x641C, 0x9D72, 0x6426, 0x9D8E, 0x6428, 0x9D92, 0x642C, 0x94C0,
00665     0x642D, 0x938B, 0x6434, 0x9D8B, 0x6436, 0x9D8F, 0x643A, 0x8C67,
00666     0x643E, 0x8DEF, 0x6442, 0x90DB, 0x644E, 0x9D97, 0x6458, 0x9345,
00667     0x6460, 0xFACA, 0x6467, 0x9D94, 0x6469, 0x9680, 0x646F, 0x9D95,
00668     0x6476, 0x9D96, 0x6478, 0x96CC, 0x647A, 0x90A0, 0x6483, 0x8C82,
00669     0x6488, 0x9D9D, 0x6492, 0x8E54, 0x6493, 0x9D9A, 0x6495, 0x9D99,
00670     0x649A, 0x9451, 0x649D, 0xFACB, 0x649E, 0x93B3, 0x64A4, 0x9350,
00671     0x64A5, 0x9D9B, 0x64A9, 0x9D9C, 0x64AB, 0x958F, 0x64AD, 0x9464,
00672     0x64AE, 0x8E42, 0x64B0, 0x90EF, 0x64B2, 0x966F, 0x64B9, 0x8A68,
00673     0x64BB, 0x9DA3, 0x64BC, 0x9D9E, 0x64C1, 0x9769, 0x64C2, 0x9DA5,
00674     0x64C5, 0x9DA1, 0x64C7, 0x9DA2, 0x64CD, 0x9180, 0x64CE, 0xFACC,
00675     0x64D2, 0x9DA0, 0x64D4, 0x9D5E, 0x64D8, 0x9DA4, 0x64DA, 0x9D9F,
00676     0x64E0, 0x9DA9, 0x64E1, 0x9DAA, 0x64E2, 0x9346, 0x64E3, 0x9DAC,
00677     0x64E6, 0x8E43, 0x64E7, 0x9DA7, 0x64EC, 0x8B5B, 0x64EF, 0x9DAD,
00678     0x64F1, 0x9DA6, 0x64F2, 0x9DB1, 0x64F4, 0x9DB0, 0x64F6, 0x9DAF,
00679     0x64FA, 0x9DB2, 0x64FD, 0x9DB4, 0x64FE, 0x8FEF, 0x6500, 0x9DB3,
00680     0x6505, 0x9DB7, 0x6518, 0x9DB5, 0x651C, 0x9DB6, 0x651D, 0x9D90,
00681     0x6523, 0x9DB9, 0x6524, 0x9DB8, 0x652A, 0x9D98, 0x652B, 0x9DBA,
00682     0x652C, 0x9DAE, 0x652F, 0x8E78, 0x6534, 0x9DBB, 0x6535, 0x9DBC,
00683     0x6536, 0x9DBE, 0x6537, 0x9DBD, 0x6538, 0x9DBF, 0x6539, 0x89FC,
00684     0x653B, 0x8D55, 0x653E, 0x95FA, 0x653F, 0x90AD, 0x6545, 0x8CCC,
00685     0x6548, 0x9DC1, 0x654D, 0x9DC4, 0x654E, 0xFACD, 0x654F, 0x9571,
00686     0x6551, 0x8B7E, 0x6555, 0x9DC3, 0x6556, 0x9DC2, 0x6557, 0x9473,
00687     0x6558, 0x9DC5, 0x6559, 0x8BB3, 0x655D, 0x9DC7, 0x655E, 0x9DC6,
00688     0x6562, 0x8AB8, 0x6563, 0x8E55, 0x6566, 0x93D6, 0x656C, 0x8C68,
00689     0x6570, 0x9094, 0x6572, 0x9DC8, 0x6574, 0x90AE, 0x6575, 0x9347,
00690     0x6577, 0x957E, 0x6578, 0x9DC9, 0x6582, 0x9DCA, 0x6583, 0x9DCB,
00691     0x6587, 0x95B6, 0x6588, 0x9B7C, 0x6589, 0x90C4, 0x658C, 0x956B,
00692     0x658E, 0x8DD6, 0x6590, 0x94E3, 0x6591, 0x94C1, 0x6597, 0x936C,
00693     0x6599, 0x97BF, 0x659B, 0x9DCD, 0x659C, 0x8ECE, 0x659F, 0x9DCE,
00694     0x65A1, 0x88B4, 0x65A4, 0x8BD2, 0x65A5, 0x90CB, 0x65A7, 0x9580,
00695     0x65AB, 0x9DCF, 0x65AC, 0x8E61, 0x65AD, 0x9266, 0x65AF, 0x8E7A,
00696     0x65B0, 0x9056, 0x65B7, 0x9DD0, 0x65B9, 0x95FB, 0x65BC, 0x8997,
00697     0x65BD, 0x8E7B, 0x65C1, 0x9DD3, 0x65C3, 0x9DD1, 0x65C4, 0x9DD4,
00698     0x65C5, 0x97B7, 0x65C6, 0x9DD2, 0x65CB, 0x90F9, 0x65CC, 0x9DD5,
00699     0x65CF, 0x91B0, 0x65D2, 0x9DD6, 0x65D7, 0x8AF8, 0x65D9, 0x9DD8,
00700     0x65DB, 0x9DD7, 0x65E0, 0x9DD9, 0x65E1, 0x9DDA, 0x65E2, 0x8AF9,
00701     0x65E5, 0x93FA, 0x65E6, 0x9255, 0x65E7, 0x8B8C, 0x65E8, 0x8E7C,
00702     0x65E9, 0x9181, 0x65EC, 0x8F7B, 0x65ED, 0x88AE, 0x65F1, 0x9DDB,
00703     0x65FA, 0x89A0, 0x65FB, 0x9DDF, 0x6600, 0xFACE, 0x6602, 0x8D56,
00704     0x6603, 0x9DDE, 0x6606, 0x8DA9, 0x6607, 0x8FB8, 0x6609, 0xFAD1,
00705     0x660A, 0x9DDD, 0x660C, 0x8FB9, 0x660E, 0x96BE, 0x660F, 0x8DA8,
00706     0x6613, 0x88D5, 0x6614, 0x90CC, 0x6615, 0xFACF, 0x661C, 0x9DE4,
00707     0x661E, 0xFAD3, 0x661F, 0x90AF, 0x6620, 0x8966, 0x6624, 0xFAD4,
00708     0x6625, 0x8F74, 0x6627, 0x9686, 0x6628, 0x8DF0, 0x662D, 0x8FBA,
00709     0x662E, 0xFAD2, 0x662F, 0x90A5, 0x6631, 0xFA63, 0x6634, 0x9DE3,
00710     0x6635, 0x9DE1, 0x6636, 0x9DE2, 0x663B, 0xFAD0, 0x663C, 0x928B,
00711     0x663F, 0x9E45, 0x6641, 0x9DE8, 0x6642, 0x8E9E, 0x6643, 0x8D57,
00712     0x6644, 0x9DE6, 0x6649, 0x9DE7, 0x664B, 0x9057, 0x664F, 0x9DE5,
00713     0x6652, 0x8E4E, 0x6657, 0xFAD6, 0x6659, 0xFAD7, 0x665D, 0x9DEA,
00714     0x665E, 0x9DE9, 0x665F, 0x9DEE, 0x6662, 0x9DEF, 0x6664, 0x9DEB,
00715     0x6665, 0xFAD5, 0x6666, 0x8A41, 0x6667, 0x9DEC, 0x6668, 0x9DED,
00716     0x6669, 0x94D3, 0x666E, 0x9581, 0x666F, 0x8C69, 0x6670, 0x9DF0,
00717     0x6673, 0xFAD9, 0x6674, 0x90B0, 0x6676, 0x8FBB, 0x667A, 0x9271,
00718     0x6681, 0x8BC5, 0x6683, 0x9DF1, 0x6684, 0x9DF5, 0x6687, 0x89C9,
00719     0x6688, 0x9DF2, 0x6689, 0x9DF4, 0x668E, 0x9DF3, 0x6691, 0x8F8B,
00720     0x6696, 0x9267, 0x6697, 0x88C3, 0x6698, 0x9DF6, 0x6699, 0xFADA,
00721     0x669D, 0x9DF7, 0x66A0, 0xFADB, 0x66A2, 0x92A8, 0x66A6, 0x97EF,
00722     0x66AB, 0x8E62, 0x66AE, 0x95E9, 0x66B2, 0xFADC, 0x66B4, 0x965C,
00723     0x66B8, 0x9E41, 0x66B9, 0x9DF9, 0x66BC, 0x9DFC, 0x66BE, 0x9DFB,
00724     0x66BF, 0xFADD, 0x66C1, 0x9DF8, 0x66C4, 0x9E40, 0x66C7, 0x93DC,
00725     0x66C9, 0x9DFA, 0x66D6, 0x9E42, 0x66D9, 0x8F8C, 0x66DA, 0x9E43,
00726     0x66DC, 0x976A, 0x66DD, 0x9498, 0x66E0, 0x9E44, 0x66E6, 0x9E46,
00727     0x66E9, 0x9E47, 0x66F0, 0x9E48, 0x66F2, 0x8BC8, 0x66F3, 0x8967,
00728     0x66F4, 0x8D58, 0x66F5, 0x9E49, 0x66F7, 0x9E4A, 0x66F8, 0x8F91,
00729     0x66F9, 0x9182, 0x66FA, 0xFADE, 0x66FB, 0xFA66, 0x66FC, 0x99D6,
00730     0x66FD, 0x915D, 0x66FE, 0x915C, 0x66FF, 0x91D6, 0x6700, 0x8DC5,
00731     0x6703, 0x98F0, 0x6708, 0x8C8E, 0x6709, 0x974C, 0x670B, 0x95FC,
00732     0x670D, 0x959E, 0x670E, 0xFADF, 0x670F, 0x9E4B, 0x6714, 0x8DF1,
00733     0x6715, 0x92BD, 0x6716, 0x9E4C, 0x6717, 0x984E, 0x671B, 0x965D,
00734     0x671D, 0x92A9, 0x671E, 0x9E4D, 0x671F, 0x8AFA, 0x6726, 0x9E4E,
00735     0x6727, 0x9E4F, 0x6728, 0x96D8, 0x672A, 0x96A2, 0x672B, 0x9696,
00736     0x672C, 0x967B, 0x672D, 0x8E44, 0x672E, 0x9E51, 0x6731, 0x8EE9,
00737     0x6734, 0x9670, 0x6736, 0x9E53, 0x6737, 0x9E56, 0x6738, 0x9E55,
00738     0x673A, 0x8AF7, 0x673D, 0x8B80, 0x673F, 0x9E52, 0x6741, 0x9E54,
00739     0x6746, 0x9E57, 0x6749, 0x9099, 0x674E, 0x979B, 0x674F, 0x88C7,
00740     0x6750, 0x8DDE, 0x6751, 0x91BA, 0x6753, 0x8EDB, 0x6756, 0x8FF1,
00741     0x6759, 0x9E5A, 0x675C, 0x936D, 0x675E, 0x9E58, 0x675F, 0x91A9,
00742     0x6760, 0x9E59, 0x6761, 0x8FF0, 0x6762, 0x96DB, 0x6763, 0x9E5B,
00743     0x6764, 0x9E5C, 0x6765, 0x9788, 0x6766, 0xFAE1, 0x676A, 0x9E61,
00744     0x676D, 0x8D59, 0x676F, 0x9474, 0x6770, 0x9E5E, 0x6771, 0x938C,
00745     0x6772, 0x9DDC, 0x6773, 0x9DE0, 0x6775, 0x8B6E, 0x6777, 0x9466,
00746     0x677C, 0x9E60, 0x677E, 0x8FBC, 0x677F, 0x94C2, 0x6785, 0x9E66,
00747     0x6787, 0x94F8, 0x6789, 0x9E5D, 0x678B, 0x9E63, 0x678C, 0x9E62,
00748     0x6790, 0x90CD, 0x6795, 0x968D, 0x6797, 0x97D1, 0x679A, 0x9687,
00749     0x679C, 0x89CA, 0x679D, 0x8E7D, 0x67A0, 0x9867, 0x67A1, 0x9E65,
00750     0x67A2, 0x9095, 0x67A6, 0x9E64, 0x67A9, 0x9E5F, 0x67AF, 0x8CCD,
00751     0x67B3, 0x9E6B, 0x67B4, 0x9E69, 0x67B6, 0x89CB, 0x67B7, 0x9E67,
00752     0x67B8, 0x9E6D, 0x67B9, 0x9E73, 0x67BB, 0xFAE2, 0x67C0, 0xFAE4,
00753     0x67C1, 0x91C6, 0x67C4, 0x95BF, 0x67C6, 0x9E75, 0x67CA, 0x9541,
00754     0x67CE, 0x9E74, 0x67CF, 0x9490, 0x67D0, 0x965E, 0x67D1, 0x8AB9,
00755     0x67D3, 0x90F5, 0x67D4, 0x8F5F, 0x67D8, 0x92D1, 0x67DA, 0x974D,
00756     0x67DD, 0x9E70, 0x67DE, 0x9E6F, 0x67E2, 0x9E71, 0x67E4, 0x9E6E,
00757     0x67E7, 0x9E76, 0x67E9, 0x9E6C, 0x67EC, 0x9E6A, 0x67EE, 0x9E72,
00758     0x67EF, 0x9E68, 0x67F1, 0x928C, 0x67F3, 0x96F6, 0x67F4, 0x8EC4,
00759     0x67F5, 0x8DF2, 0x67FB, 0x8DB8, 0x67FE, 0x968F, 0x67FF, 0x8A60,
00760     0x6801, 0xFAE5, 0x6802, 0x92CC, 0x6803, 0x93C8, 0x6804, 0x8968,
00761     0x6813, 0x90F0, 0x6816, 0x90B2, 0x6817, 0x8C49, 0x681E, 0x9E78,
00762     0x6821, 0x8D5A, 0x6822, 0x8A9C, 0x6829, 0x9E7A, 0x682A, 0x8A94,
00763     0x682B, 0x9E81, 0x6832, 0x9E7D, 0x6834, 0x90F1, 0x6838, 0x8A6A,
00764     0x6839, 0x8DAA, 0x683C, 0x8A69, 0x683D, 0x8DCD, 0x6840, 0x9E7B,
00765     0x6841, 0x8C85, 0x6842, 0x8C6A, 0x6843, 0x938D, 0x6844, 0xFAE6,
00766     0x6846, 0x9E79, 0x6848, 0x88C4, 0x684D, 0x9E7C, 0x684E, 0x9E7E,
00767     0x6850, 0x8BCB, 0x6851, 0x8C4B, 0x6852, 0xFAE3, 0x6853, 0x8ABA,
00768     0x6854, 0x8B6A, 0x6859, 0x9E82, 0x685C, 0x8DF7, 0x685D, 0x9691,
00769     0x685F, 0x8E56, 0x6863, 0x9E83, 0x6867, 0x954F, 0x6874, 0x9E8F,
00770     0x6876, 0x89B1, 0x6877, 0x9E84, 0x687E, 0x9E95, 0x687F, 0x9E85,
00771     0x6881, 0x97C0, 0x6883, 0x9E8C, 0x6885, 0x947E, 0x688D, 0x9E94,
00772     0x688F, 0x9E87, 0x6893, 0x88B2, 0x6894, 0x9E89, 0x6897, 0x8D5B,
00773     0x689B, 0x9E8B, 0x689D, 0x9E8A, 0x689F, 0x9E86, 0x68A0, 0x9E91,
00774     0x68A2, 0x8FBD, 0x68A6, 0x9AEB, 0x68A7, 0x8CE6, 0x68A8, 0x979C,
00775     0x68AD, 0x9E88, 0x68AF, 0x92F2, 0x68B0, 0x8A42, 0x68B1, 0x8DAB,
00776     0x68B3, 0x9E80, 0x68B5, 0x9E90, 0x68B6, 0x8A81, 0x68B9, 0x9E8E,
00777     0x68BA, 0x9E92, 0x68BC, 0x938E, 0x68C4, 0x8AFC, 0x68C6, 0x9EB0,
00778     0x68C8, 0xFA64, 0x68C9, 0x96C7, 0x68CA, 0x9E97, 0x68CB, 0x8AFB,
00779     0x68CD, 0x9E9E, 0x68CF, 0xFAE7, 0x68D2, 0x965F, 0x68D4, 0x9E9F,
00780     0x68D5, 0x9EA1, 0x68D7, 0x9EA5, 0x68D8, 0x9E99, 0x68DA, 0x9249,
00781     0x68DF, 0x938F, 0x68E0, 0x9EA9, 0x68E1, 0x9E9C, 0x68E3, 0x9EA6,
00782     0x68E7, 0x9EA0, 0x68EE, 0x9058, 0x68EF, 0x9EAA, 0x68F2, 0x90B1,
00783     0x68F9, 0x9EA8, 0x68FA, 0x8ABB, 0x6900, 0x986F, 0x6901, 0x9E96,
00784     0x6904, 0x9EA4, 0x6905, 0x88D6, 0x6908, 0x9E98, 0x690B, 0x96B8,
00785     0x690C, 0x9E9D, 0x690D, 0x9041, 0x690E, 0x92C5, 0x690F, 0x9E93,
00786     0x6912, 0x9EA3, 0x6919, 0x909A, 0x691A, 0x9EAD, 0x691B, 0x8A91,
00787     0x691C, 0x8C9F, 0x6921, 0x9EAF, 0x6922, 0x9E9A, 0x6923, 0x9EAE,
00788     0x6925, 0x9EA7, 0x6926, 0x9E9B, 0x6928, 0x9EAB, 0x692A, 0x9EAC,
00789     0x6930, 0x9EBD, 0x6934, 0x93CC, 0x6936, 0x9EA2, 0x6939, 0x9EB9,
00790     0x693D, 0x9EBB, 0x693F, 0x92D6, 0x694A, 0x976B, 0x6953, 0x9596,
00791     0x6954, 0x9EB6, 0x6955, 0x91C8, 0x6959, 0x9EBC, 0x695A, 0x915E,
00792     0x695C, 0x9EB3, 0x695D, 0x9EC0, 0x695E, 0x9EBF, 0x6960, 0x93ED,
00793     0x6961, 0x9EBE, 0x6962, 0x93E8, 0x6968, 0xFAE9, 0x696A, 0x9EC2,
00794     0x696B, 0x9EB5, 0x696D, 0x8BC6, 0x696E, 0x9EB8, 0x696F, 0x8F7C,
00795     0x6973, 0x9480, 0x6974, 0x9EBA, 0x6975, 0x8BC9, 0x6977, 0x9EB2,
00796     0x6978, 0x9EB4, 0x6979, 0x9EB1, 0x697C, 0x984F, 0x697D, 0x8A79,
00797     0x697E, 0x9EB7, 0x6981, 0x9EC1, 0x6982, 0x8A54, 0x698A, 0x8DE5,
00798     0x698E, 0x897C, 0x6991, 0x9ED2, 0x6994, 0x9850, 0x6995, 0x9ED5,
00799     0x6998, 0xFAEB, 0x699B, 0x9059, 0x699C, 0x9ED4, 0x69A0, 0x9ED3,
00800     0x69A7, 0x9ED0, 0x69AE, 0x9EC4, 0x69B1, 0x9EE1, 0x69B2, 0x9EC3,
00801     0x69B4, 0x9ED6, 0x69BB, 0x9ECE, 0x69BE, 0x9EC9, 0x69BF, 0x9EC6,
00802     0x69C1, 0x9EC7, 0x69C3, 0x9ECF, 0x69C7, 0xEAA0, 0x69CA, 0x9ECC,
00803     0x69CB, 0x8D5C, 0x69CC, 0x92C6, 0x69CD, 0x9184, 0x69CE, 0x9ECA,
00804     0x69D0, 0x9EC5, 0x69D3, 0x9EC8, 0x69D8, 0x976C, 0x69D9, 0x968A,
00805     0x69DD, 0x9ECD, 0x69DE, 0x9ED7, 0x69E2, 0xFAEC, 0x69E7, 0x9EDF,
00806     0x69E8, 0x9ED8, 0x69EB, 0x9EE5, 0x69ED, 0x9EE3, 0x69F2, 0x9EDE,
00807     0x69F9, 0x9EDD, 0x69FB, 0x92CE, 0x69FD, 0x9185, 0x69FF, 0x9EDB,
00808     0x6A02, 0x9ED9, 0x6A05, 0x9EE0, 0x6A0A, 0x9EE6, 0x6A0B, 0x94F3,
00809     0x6A0C, 0x9EEC, 0x6A12, 0x9EE7, 0x6A13, 0x9EEA, 0x6A14, 0x9EE4,
00810     0x6A17, 0x9294, 0x6A19, 0x9557, 0x6A1B, 0x9EDA, 0x6A1E, 0x9EE2,
00811     0x6A1F, 0x8FBE, 0x6A21, 0x96CD, 0x6A22, 0x9EF6, 0x6A23, 0x9EE9,
00812     0x6A29, 0x8CA0, 0x6A2A, 0x89A1, 0x6A2B, 0x8A7E, 0x6A2E, 0x9ED1,
00813     0x6A30, 0xFAED, 0x6A35, 0x8FBF, 0x6A36, 0x9EEE, 0x6A38, 0x9EF5,
00814     0x6A39, 0x8EF7, 0x6A3A, 0x8A92, 0x6A3D, 0x924D, 0x6A44, 0x9EEB,
00815     0x6A46, 0xFAEF, 0x6A47, 0x9EF0, 0x6A48, 0x9EF4, 0x6A4B, 0x8BB4,
00816     0x6A58, 0x8B6B, 0x6A59, 0x9EF2, 0x6A5F, 0x8B40, 0x6A61, 0x93C9,
00817     0x6A62, 0x9EF1, 0x6A66, 0x9EF3, 0x6A6B, 0xFAEE, 0x6A72, 0x9EED,
00818     0x6A73, 0xFAF0, 0x6A78, 0x9EEF, 0x6A7E, 0xFAF1, 0x6A7F, 0x8A80,
00819     0x6A80, 0x9268, 0x6A84, 0x9EFA, 0x6A8D, 0x9EF8, 0x6A8E, 0x8CE7,
00820     0x6A90, 0x9EF7, 0x6A97, 0x9F40, 0x6A9C, 0x9E77, 0x6AA0, 0x9EF9,
00821     0x6AA2, 0x9EFB, 0x6AA3, 0x9EFC, 0x6AAA, 0x9F4B, 0x6AAC, 0x9F47,
00822     0x6AAE, 0x9E8D, 0x6AB3, 0x9F46, 0x6AB8, 0x9F45, 0x6ABB, 0x9F42,
00823     0x6AC1, 0x9EE8, 0x6AC2, 0x9F44, 0x6AC3, 0x9F43, 0x6AD1, 0x9F49,
00824     0x6AD3, 0x9845, 0x6ADA, 0x9F4C, 0x6ADB, 0x8BF9, 0x6ADE, 0x9F48,
00825     0x6ADF, 0x9F4A, 0x6AE2, 0xFAF2, 0x6AE4, 0xFAF3, 0x6AE8, 0x94A5,
00826     0x6AEA, 0x9F4D, 0x6AFA, 0x9F51, 0x6AFB, 0x9F4E, 0x6B04, 0x9793,
00827     0x6B05, 0x9F4F, 0x6B0A, 0x9EDC, 0x6B12, 0x9F52, 0x6B16, 0x9F53,
00828     0x6B1D, 0x8954, 0x6B1F, 0x9F55, 0x6B20, 0x8C87, 0x6B21, 0x8E9F,
00829     0x6B23, 0x8BD3, 0x6B27, 0x89A2, 0x6B32, 0x977E, 0x6B37, 0x9F57,
00830     0x6B38, 0x9F56, 0x6B39, 0x9F59, 0x6B3A, 0x8B5C, 0x6B3D, 0x8BD4,
00831     0x6B3E, 0x8ABC, 0x6B43, 0x9F5C, 0x6B47, 0x9F5B, 0x6B49, 0x9F5D,
00832     0x6B4C, 0x89CC, 0x6B4E, 0x9256, 0x6B50, 0x9F5E, 0x6B53, 0x8ABD,
00833     0x6B54, 0x9F60, 0x6B59, 0x9F5F, 0x6B5B, 0x9F61, 0x6B5F, 0x9F62,
00834     0x6B61, 0x9F63, 0x6B62, 0x8E7E, 0x6B63, 0x90B3, 0x6B64, 0x8D9F,
00835     0x6B66, 0x9590, 0x6B69, 0x95E0, 0x6B6A, 0x9863, 0x6B6F, 0x8E95,
00836     0x6B73, 0x8DCE, 0x6B74, 0x97F0, 0x6B78, 0x9F64, 0x6B79, 0x9F65,
00837     0x6B7B, 0x8E80, 0x6B7F, 0x9F66, 0x6B80, 0x9F67, 0x6B83, 0x9F69,
00838     0x6B84, 0x9F68, 0x6B86, 0x9677, 0x6B89, 0x8F7D, 0x6B8A, 0x8EEA,
00839     0x6B8B, 0x8E63, 0x6B8D, 0x9F6A, 0x6B95, 0x9F6C, 0x6B96, 0x9042,
00840     0x6B98, 0x9F6B, 0x6B9E, 0x9F6D, 0x6BA4, 0x9F6E, 0x6BAA, 0x9F6F,
00841     0x6BAB, 0x9F70, 0x6BAF, 0x9F71, 0x6BB1, 0x9F73, 0x6BB2, 0x9F72,
00842     0x6BB3, 0x9F74, 0x6BB4, 0x89A3, 0x6BB5, 0x9269, 0x6BB7, 0x9F75,
00843     0x6BBA, 0x8E45, 0x6BBB, 0x8A6B, 0x6BBC, 0x9F76, 0x6BBF, 0x9361,
00844     0x6BC0, 0x9ACA, 0x6BC5, 0x8B42, 0x6BC6, 0x9F77, 0x6BCB, 0x9F78,
00845     0x6BCD, 0x95EA, 0x6BCE, 0x9688, 0x6BD2, 0x93C5, 0x6BD3, 0x9F79,
00846     0x6BD4, 0x94E4, 0x6BD6, 0xFAF4, 0x6BD8, 0x94F9, 0x6BDB, 0x96D1,
00847     0x6BDF, 0x9F7A, 0x6BEB, 0x9F7C, 0x6BEC, 0x9F7B, 0x6BEF, 0x9F7E,
00848     0x6BF3, 0x9F7D, 0x6C08, 0x9F81, 0x6C0F, 0x8E81, 0x6C11, 0x96AF,
00849     0x6C13, 0x9F82, 0x6C14, 0x9F83, 0x6C17, 0x8B43, 0x6C1B, 0x9F84,
00850     0x6C23, 0x9F86, 0x6C24, 0x9F85, 0x6C34, 0x9085, 0x6C37, 0x9558,
00851     0x6C38, 0x8969, 0x6C3E, 0x94C3, 0x6C3F, 0xFAF5, 0x6C40, 0x92F3,
00852     0x6C41, 0x8F60, 0x6C42, 0x8B81, 0x6C4E, 0x94C4, 0x6C50, 0x8EAC,
00853     0x6C55, 0x9F88, 0x6C57, 0x8ABE, 0x6C5A, 0x8998, 0x6C5C, 0xFAF6,
00854     0x6C5D, 0x93F0, 0x6C5E, 0x9F87, 0x6C5F, 0x8D5D, 0x6C60, 0x9272,
00855     0x6C62, 0x9F89, 0x6C68, 0x9F91, 0x6C6A, 0x9F8A, 0x6C6F, 0xFAF8,
00856     0x6C70, 0x91BF, 0x6C72, 0x8B82, 0x6C73, 0x9F92, 0x6C7A, 0x8C88,
00857     0x6C7D, 0x8B44, 0x6C7E, 0x9F90, 0x6C81, 0x9F8E, 0x6C82, 0x9F8B,
00858     0x6C83, 0x9780, 0x6C86, 0xFAF7, 0x6C88, 0x92BE, 0x6C8C, 0x93D7,
00859     0x6C8D, 0x9F8C, 0x6C90, 0x9F94, 0x6C92, 0x9F93, 0x6C93, 0x8C42,
00860     0x6C96, 0x89AB, 0x6C99, 0x8DB9, 0x6C9A, 0x9F8D, 0x6C9B, 0x9F8F,
00861     0x6CA1, 0x9676, 0x6CA2, 0x91F2, 0x6CAB, 0x9697, 0x6CAE, 0x9F9C,
00862     0x6CB1, 0x9F9D, 0x6CB3, 0x89CD, 0x6CB8, 0x95A6, 0x6CB9, 0x96FB,
00863     0x6CBA, 0x9F9F, 0x6CBB, 0x8EA1, 0x6CBC, 0x8FC0, 0x6CBD, 0x9F98,
00864     0x6CBE, 0x9F9E, 0x6CBF, 0x8988, 0x6CC1, 0x8BB5, 0x6CC4, 0x9F95,
00865     0x6CC5, 0x9F9A, 0x6CC9, 0x90F2, 0x6CCA, 0x9491, 0x6CCC, 0x94E5,
00866     0x6CD3, 0x9F97, 0x6CD5, 0x9640, 0x6CD7, 0x9F99, 0x6CD9, 0x9FA2,
00867     0x6CDA, 0xFAF9, 0x6CDB, 0x9FA0, 0x6CDD, 0x9F9B, 0x6CE1, 0x9641,
00868     0x6CE2, 0x9467, 0x6CE3, 0x8B83, 0x6CE5, 0x9344, 0x6CE8, 0x928D,
00869     0x6CEA, 0x9FA3, 0x6CEF, 0x9FA1, 0x6CF0, 0x91D7, 0x6CF1, 0x9F96,
00870     0x6CF3, 0x896A, 0x6D04, 0xFAFA, 0x6D0B, 0x976D, 0x6D0C, 0x9FAE,
00871     0x6D12, 0x9FAD, 0x6D17, 0x90F4, 0x6D19, 0x9FAA, 0x6D1B, 0x978C,
00872     0x6D1E, 0x93B4, 0x6D1F, 0x9FA4, 0x6D25, 0x92C3, 0x6D29, 0x896B,
00873     0x6D2A, 0x8D5E, 0x6D2B, 0x9FA7, 0x6D32, 0x8F46, 0x6D33, 0x9FAC,
00874     0x6D35, 0x9FAB, 0x6D36, 0x9FA6, 0x6D38, 0x9FA9, 0x6D3B, 0x8A88,
00875     0x6D3D, 0x9FA8, 0x6D3E, 0x9468, 0x6D41, 0x97AC, 0x6D44, 0x8FF2,
00876     0x6D45, 0x90F3, 0x6D59, 0x9FB4, 0x6D5A, 0x9FB2, 0x6D5C, 0x956C,
00877     0x6D63, 0x9FAF, 0x6D64, 0x9FB1, 0x6D66, 0x8959, 0x6D69, 0x8D5F,
00878     0x6D6A, 0x9851, 0x6D6C, 0x8A5C, 0x6D6E, 0x9582, 0x6D6F, 0xFAFC,
00879     0x6D74, 0x9781, 0x6D77, 0x8A43, 0x6D78, 0x905A, 0x6D79, 0x9FB3,
00880     0x6D85, 0x9FB8, 0x6D87, 0xFAFB, 0x6D88, 0x8FC1, 0x6D8C, 0x974F,
00881     0x6D8E, 0x9FB5, 0x6D93, 0x9FB0, 0x6D95, 0x9FB6, 0x6D96, 0xFB40,
00882     0x6D99, 0x97DC, 0x6D9B, 0x9393, 0x6D9C, 0x93C0, 0x6DAC, 0xFB41,
00883     0x6DAF, 0x8A55, 0x6DB2, 0x8974, 0x6DB5, 0x9FBC, 0x6DB8, 0x9FBF,
00884     0x6DBC, 0x97C1, 0x6DC0, 0x9784, 0x6DC5, 0x9FC6, 0x6DC6, 0x9FC0,
00885     0x6DC7, 0x9FBD, 0x6DCB, 0x97D2, 0x6DCC, 0x9FC3, 0x6DCF, 0xFB42,
00886     0x6DD1, 0x8F69, 0x6DD2, 0x9FC5, 0x6DD5, 0x9FCA, 0x6DD8, 0x9391,
00887     0x6DD9, 0x9FC8, 0x6DDE, 0x9FC2, 0x6DE1, 0x9257, 0x6DE4, 0x9FC9,
00888     0x6DE6, 0x9FBE, 0x6DE8, 0x9FC4, 0x6DEA, 0x9FCB, 0x6DEB, 0x88FA,
00889     0x6DEC, 0x9FC1, 0x6DEE, 0x9FCC, 0x6DF1, 0x905B, 0x6DF2, 0xFB44,
00890     0x6DF3, 0x8F7E, 0x6DF5, 0x95A3, 0x6DF7, 0x8DAC, 0x6DF8, 0xFB43,
00891     0x6DF9, 0x9FB9, 0x6DFA, 0x9FC7, 0x6DFB, 0x9359, 0x6DFC, 0xFB45,
00892     0x6E05, 0x90B4, 0x6E07, 0x8A89, 0x6E08, 0x8DCF, 0x6E09, 0x8FC2,
00893     0x6E0A, 0x9FBB, 0x6E0B, 0x8F61, 0x6E13, 0x8C6B, 0x6E15, 0x9FBA,
00894     0x6E19, 0x9FD0, 0x6E1A, 0x8F8D, 0x6E1B, 0x8CB8, 0x6E1D, 0x9FDF,
00895     0x6E1F, 0x9FD9, 0x6E20, 0x8B94, 0x6E21, 0x936E, 0x6E23, 0x9FD4,
00896     0x6E24, 0x9FDD, 0x6E25, 0x88AD, 0x6E26, 0x8951, 0x6E27, 0xFB48,
00897     0x6E29, 0x89B7, 0x6E2B, 0x9FD6, 0x6E2C, 0x91AA, 0x6E2D, 0x9FCD,
00898     0x6E2E, 0x9FCF, 0x6E2F, 0x8D60, 0x6E38, 0x9FE0, 0x6E39, 0xFB46,
00899     0x6E3A, 0x9FDB, 0x6E3C, 0xFB49, 0x6E3E, 0x9FD3, 0x6E43, 0x9FDA,
00900     0x6E4A, 0x96A9, 0x6E4D, 0x9FD8, 0x6E4E, 0x9FDC, 0x6E56, 0x8CCE,
00901     0x6E58, 0x8FC3, 0x6E5B, 0x9258, 0x6E5C, 0xFB47, 0x6E5F, 0x9FD2,
00902     0x6E67, 0x974E, 0x6E6B, 0x9FD5, 0x6E6E, 0x9FCE, 0x6E6F, 0x9392,
00903     0x6E72, 0x9FD1, 0x6E76, 0x9FD7, 0x6E7E, 0x9870, 0x6E7F, 0x8EBC,
00904     0x6E80, 0x969E, 0x6E82, 0x9FE1, 0x6E8C, 0x94AC, 0x6E8F, 0x9FED,
00905     0x6E90, 0x8CB9, 0x6E96, 0x8F80, 0x6E98, 0x9FE3, 0x6E9C, 0x97AD,
00906     0x6E9D, 0x8D61, 0x6E9F, 0x9FF0, 0x6EA2, 0x88EC, 0x6EA5, 0x9FEE,
00907     0x6EAA, 0x9FE2, 0x6EAF, 0x9FE8, 0x6EB2, 0x9FEA, 0x6EB6, 0x976E,
00908     0x6EB7, 0x9FE5, 0x6EBA, 0x934D, 0x6EBD, 0x9FE7, 0x6EBF, 0xFB4A,
00909     0x6EC2, 0x9FEF, 0x6EC4, 0x9FE9, 0x6EC5, 0x96C5, 0x6EC9, 0x9FE4,
00910     0x6ECB, 0x8EA0, 0x6ECC, 0x9FFC, 0x6ED1, 0x8A8A, 0x6ED3, 0x9FE6,
00911     0x6ED4, 0x9FEB, 0x6ED5, 0x9FEC, 0x6EDD, 0x91EA, 0x6EDE, 0x91D8,
00912     0x6EEC, 0x9FF4, 0x6EEF, 0x9FFA, 0x6EF2, 0x9FF8, 0x6EF4, 0x9348,
00913     0x6EF7, 0xE042, 0x6EF8, 0x9FF5, 0x6EFE, 0x9FF6, 0x6EFF, 0x9FDE,
00914     0x6F01, 0x8B99, 0x6F02, 0x9559, 0x6F06, 0x8EBD, 0x6F09, 0x8D97,
00915     0x6F0F, 0x9852, 0x6F11, 0x9FF2, 0x6F13, 0xE041, 0x6F14, 0x8989,
00916     0x6F15, 0x9186, 0x6F20, 0x9499, 0x6F22, 0x8ABF, 0x6F23, 0x97F8,
00917     0x6F2B, 0x969F, 0x6F2C, 0x92D0, 0x6F31, 0x9FF9, 0x6F32, 0x9FFB,
00918     0x6F38, 0x9151, 0x6F3E, 0xE040, 0x6F3F, 0x9FF7, 0x6F41, 0x9FF1,
00919     0x6F45, 0x8AC1, 0x6F54, 0x8C89, 0x6F58, 0xE04E, 0x6F5B, 0xE049,
00920     0x6F5C, 0x90F6, 0x6F5F, 0x8A83, 0x6F64, 0x8F81, 0x6F66, 0xE052,
00921     0x6F6D, 0xE04B, 0x6F6E, 0x92AA, 0x6F6F, 0xE048, 0x6F70, 0x92D7,
00922     0x6F74, 0xE06B, 0x6F78, 0xE045, 0x6F7A, 0xE044, 0x6F7C, 0xE04D,
00923     0x6F80, 0xE047, 0x6F81, 0xE046, 0x6F82, 0xE04C, 0x6F84, 0x909F,
00924     0x6F86, 0xE043, 0x6F88, 0xFB4B, 0x6F8E, 0xE04F, 0x6F91, 0xE050,
00925     0x6F97, 0x8AC0, 0x6FA1, 0xE055, 0x6FA3, 0xE054, 0x6FA4, 0xE056,
00926     0x6FAA, 0xE059, 0x6FB1, 0x9362, 0x6FB3, 0xE053, 0x6FB5, 0xFB4C,
00927     0x6FB9, 0xE057, 0x6FC0, 0x8C83, 0x6FC1, 0x91F7, 0x6FC2, 0xE051,
00928     0x6FC3, 0x945A, 0x6FC6, 0xE058, 0x6FD4, 0xE05D, 0x6FD5, 0xE05B,
00929     0x6FD8, 0xE05E, 0x6FDB, 0xE061, 0x6FDF, 0xE05A, 0x6FE0, 0x8D8A,
00930     0x6FE1, 0x9447, 0x6FE4, 0x9FB7, 0x6FEB, 0x9794, 0x6FEC, 0xE05C,
00931     0x6FEE, 0xE060, 0x6FEF, 0x91F3, 0x6FF1, 0xE05F, 0x6FF3, 0xE04A,
00932     0x6FF5, 0xFB4D, 0x6FF6, 0xE889, 0x6FFA, 0xE064, 0x6FFE, 0xE068,
00933     0x7001, 0xE066, 0x7005, 0xFB4E, 0x7007, 0xFB4F, 0x7009, 0xE062,
00934     0x700B, 0xE063, 0x700F, 0xE067, 0x7011, 0xE065, 0x7015, 0x956D,
00935     0x7018, 0xE06D, 0x701A, 0xE06A, 0x701B, 0xE069, 0x701D, 0xE06C,
00936     0x701E, 0x93D2, 0x701F, 0xE06E, 0x7026, 0x9295, 0x7027, 0x91EB,
00937     0x7028, 0xFB50, 0x702C, 0x90A3, 0x7030, 0xE06F, 0x7032, 0xE071,
00938     0x703E, 0xE070, 0x704C, 0x9FF3, 0x7051, 0xE072, 0x7058, 0x93E5,
00939     0x7063, 0xE073, 0x706B, 0x89CE, 0x706F, 0x9394, 0x7070, 0x8A44,
00940     0x7078, 0x8B84, 0x707C, 0x8EDC, 0x707D, 0x8DD0, 0x7085, 0xFB51,
00941     0x7089, 0x9846, 0x708A, 0x9086, 0x708E, 0x898A, 0x7092, 0xE075,
00942     0x7099, 0xE074, 0x70AB, 0xFB52, 0x70AC, 0xE078, 0x70AD, 0x9259,
00943     0x70AE, 0xE07B, 0x70AF, 0xE076, 0x70B3, 0xE07A, 0x70B8, 0xE079,
00944     0x70B9, 0x935F, 0x70BA, 0x88D7, 0x70BB, 0xFA62, 0x70C8, 0x97F3,
00945     0x70CB, 0xE07D, 0x70CF, 0x8947, 0x70D9, 0xE080, 0x70DD, 0xE07E,
00946     0x70DF, 0xE07C, 0x70F1, 0xE077, 0x70F9, 0x9642, 0x70FD, 0xE082,
00947     0x7104, 0xFB54, 0x7109, 0xE081, 0x710F, 0xFB53, 0x7114, 0x898B,
00948     0x7119, 0xE084, 0x711A, 0x95B0, 0x711C, 0xE083, 0x7121, 0x96B3,
00949     0x7126, 0x8FC5, 0x7136, 0x9152, 0x713C, 0x8FC4, 0x7146, 0xFB56,
00950     0x7147, 0xFB57, 0x7149, 0x97F9, 0x714C, 0xE08A, 0x714E, 0x90F7,
00951     0x7155, 0xE086, 0x7156, 0xE08B, 0x7159, 0x898C, 0x715C, 0xFB55,
00952     0x7162, 0xE089, 0x7164, 0x9481, 0x7165, 0xE085, 0x7166, 0xE088,
00953     0x7167, 0x8FC6, 0x7169, 0x94CF, 0x716C, 0xE08C, 0x716E, 0x8ECF,
00954     0x717D, 0x90F8, 0x7184, 0xE08F, 0x7188, 0xE087, 0x718A, 0x8C46,
00955     0x718F, 0xE08D, 0x7194, 0x976F, 0x7195, 0xE090, 0x7199, 0xEAA4,
00956     0x719F, 0x8F6E, 0x71A8, 0xE091, 0x71AC, 0xE092, 0x71B1, 0x944D,
00957     0x71B9, 0xE094, 0x71BE, 0xE095, 0x71C1, 0xFB59, 0x71C3, 0x9452,
00958     0x71C8, 0x9395, 0x71C9, 0xE097, 0x71CE, 0xE099, 0x71D0, 0x97D3,
00959     0x71D2, 0xE096, 0x71D4, 0xE098, 0x71D5, 0x898D, 0x71D7, 0xE093,
00960     0x71DF, 0x9A7A, 0x71E0, 0xE09A, 0x71E5, 0x9187, 0x71E6, 0x8E57,
00961     0x71E7, 0xE09C, 0x71EC, 0xE09B, 0x71ED, 0x9043, 0x71EE, 0x99D7,
00962     0x71F5, 0xE09D, 0x71F9, 0xE09F, 0x71FB, 0xE08E, 0x71FC, 0xE09E,
00963     0x71FE, 0xFB5A, 0x71FF, 0xE0A0, 0x7206, 0x949A, 0x720D, 0xE0A1,
00964     0x7210, 0xE0A2, 0x721B, 0xE0A3, 0x7228, 0xE0A4, 0x722A, 0x92DC,
00965     0x722C, 0xE0A6, 0x722D, 0xE0A5, 0x7230, 0xE0A7, 0x7232, 0xE0A8,
00966     0x7235, 0x8EDD, 0x7236, 0x9583, 0x723A, 0x96EA, 0x723B, 0xE0A9,
00967     0x723C, 0xE0AA, 0x723D, 0x9175, 0x723E, 0x8EA2, 0x723F, 0xE0AB,
00968     0x7240, 0xE0AC, 0x7246, 0xE0AD, 0x7247, 0x95D0, 0x7248, 0x94C5,
00969     0x724B, 0xE0AE, 0x724C, 0x9476, 0x7252, 0x92AB, 0x7258, 0xE0AF,
00970     0x7259, 0x89E5, 0x725B, 0x8B8D, 0x725D, 0x96C4, 0x725F, 0x96B4,
00971     0x7261, 0x89B2, 0x7262, 0x9853, 0x7267, 0x9671, 0x7269, 0x95A8,
00972     0x7272, 0x90B5, 0x7274, 0xE0B0, 0x7279, 0x93C1, 0x727D, 0x8CA1,
00973     0x727E, 0xE0B1, 0x7280, 0x8DD2, 0x7281, 0xE0B3, 0x7282, 0xE0B2,
00974     0x7287, 0xE0B4, 0x7292, 0xE0B5, 0x7296, 0xE0B6, 0x72A0, 0x8B5D,
00975     0x72A2, 0xE0B7, 0x72A7, 0xE0B8, 0x72AC, 0x8CA2, 0x72AF, 0x94C6,
00976     0x72B1, 0xFB5B, 0x72B2, 0xE0BA, 0x72B6, 0x8FF3, 0x72B9, 0xE0B9,
00977     0x72BE, 0xFB5C, 0x72C2, 0x8BB6, 0x72C3, 0xE0BB, 0x72C4, 0xE0BD,
00978     0x72C6, 0xE0BC, 0x72CE, 0xE0BE, 0x72D0, 0x8CCF, 0x72D2, 0xE0BF,
00979     0x72D7, 0x8BE7, 0x72D9, 0x915F, 0x72DB, 0x8D9D, 0x72E0, 0xE0C1,
00980     0x72E1, 0xE0C2, 0x72E2, 0xE0C0, 0x72E9, 0x8EEB, 0x72EC, 0x93C6,
00981     0x72ED, 0x8BB7, 0x72F7, 0xE0C4, 0x72F8, 0x924B, 0x72F9, 0xE0C3,
00982     0x72FC, 0x9854, 0x72FD, 0x9482, 0x730A, 0xE0C7, 0x7316, 0xE0C9,
00983     0x7317, 0xE0C6, 0x731B, 0x96D2, 0x731C, 0xE0C8, 0x731D, 0xE0CA,
00984     0x731F, 0x97C2, 0x7324, 0xFB5D, 0x7325, 0xE0CE, 0x7329, 0xE0CD,
00985     0x732A, 0x9296, 0x732B, 0x944C, 0x732E, 0x8CA3, 0x732F, 0xE0CC,
00986     0x7334, 0xE0CB, 0x7336, 0x9750, 0x7337, 0x9751, 0x733E, 0xE0CF,
00987     0x733F, 0x898E, 0x7344, 0x8D96, 0x7345, 0x8E82, 0x734E, 0xE0D0,
00988     0x734F, 0xE0D1, 0x7357, 0xE0D3, 0x7363, 0x8F62, 0x7368, 0xE0D5,
00989     0x736A, 0xE0D4, 0x7370, 0xE0D6, 0x7372, 0x8A6C, 0x7375, 0xE0D8,
00990     0x7377, 0xFB5F, 0x7378, 0xE0D7, 0x737A, 0xE0DA, 0x737B, 0xE0D9,
00991     0x7384, 0x8CBA, 0x7387, 0x97A6, 0x7389, 0x8BCA, 0x738B, 0x89A4,
00992     0x7396, 0x8BE8, 0x73A9, 0x8ADF, 0x73B2, 0x97E6, 0x73B3, 0xE0DC,
00993     0x73BB, 0xE0DE, 0x73BD, 0xFB60, 0x73C0, 0xE0DF, 0x73C2, 0x89CF,
00994     0x73C8, 0xE0DB, 0x73C9, 0xFB61, 0x73CA, 0x8E58, 0x73CD, 0x92BF,
00995     0x73CE, 0xE0DD, 0x73D2, 0xFB64, 0x73D6, 0xFB62, 0x73DE, 0xE0E2,
00996     0x73E0, 0x8EEC, 0x73E3, 0xFB63, 0x73E5, 0xE0E0, 0x73EA, 0x8C5D,
00997     0x73ED, 0x94C7, 0x73EE, 0xE0E1, 0x73F1, 0xE0FC, 0x73F5, 0xFB66,
00998     0x73F8, 0xE0E7, 0x73FE, 0x8CBB, 0x7403, 0x8B85, 0x7405, 0xE0E4,
00999     0x7406, 0x979D, 0x7407, 0xFB65, 0x7409, 0x97AE, 0x7422, 0x91F4,
01000     0x7425, 0xE0E6, 0x7426, 0xFB67, 0x7429, 0xFB69, 0x742A, 0xFB68,
01001     0x742E, 0xFB6A, 0x7432, 0xE0E8, 0x7433, 0x97D4, 0x7434, 0x8BD5,
01002     0x7435, 0x94FA, 0x7436, 0x9469, 0x743A, 0xE0E9, 0x743F, 0xE0EB,
01003     0x7441, 0xE0EE, 0x7455, 0xE0EA, 0x7459, 0xE0ED, 0x745A, 0x8CE8,
01004     0x745B, 0x896C, 0x745C, 0xE0EF, 0x745E, 0x9090, 0x745F, 0xE0EC,
01005     0x7460, 0x97DA, 0x7462, 0xFB6B, 0x7463, 0xE0F2, 0x7464, 0xEAA2,
01006     0x7469, 0xE0F0, 0x746A, 0xE0F3, 0x746F, 0xE0E5, 0x7470, 0xE0F1,
01007     0x7473, 0x8DBA, 0x7476, 0xE0F4, 0x747E, 0xE0F5, 0x7483, 0x979E,
01008     0x7489, 0xFB6C, 0x748B, 0xE0F6, 0x749E, 0xE0F7, 0x749F, 0xFB6D,
01009     0x74A2, 0xE0E3, 0x74A7, 0xE0F8, 0x74B0, 0x8AC2, 0x74BD, 0x8EA3,
01010     0x74CA, 0xE0F9, 0x74CF, 0xE0FA, 0x74D4, 0xE0FB, 0x74DC, 0x895A,
01011     0x74E0, 0xE140, 0x74E2, 0x955A, 0x74E3, 0xE141, 0x74E6, 0x8AA2,
01012     0x74E7, 0xE142, 0x74E9, 0xE143, 0x74EE, 0xE144, 0x74F0, 0xE146,
01013     0x74F1, 0xE147, 0x74F2, 0xE145, 0x74F6, 0x9572, 0x74F7, 0xE149,
01014     0x74F8, 0xE148, 0x7501, 0xFB6E, 0x7503, 0xE14B, 0x7504, 0xE14A,
01015     0x7505, 0xE14C, 0x750C, 0xE14D, 0x750D, 0xE14F, 0x750E, 0xE14E,
01016     0x7511, 0x8D99, 0x7513, 0xE151, 0x7515, 0xE150, 0x7518, 0x8AC3,
01017     0x751A, 0x9072, 0x751C, 0x935B, 0x751E, 0xE152, 0x751F, 0x90B6,
01018     0x7523, 0x8E59, 0x7525, 0x8999, 0x7526, 0xE153, 0x7528, 0x9770,
01019     0x752B, 0x95E1, 0x752C, 0xE154, 0x752F, 0xFAA8, 0x7530, 0x9363,
01020     0x7531, 0x9752, 0x7532, 0x8D62, 0x7533, 0x905C, 0x7537, 0x926A,
01021     0x7538, 0x99B2, 0x753A, 0x92AC, 0x753B, 0x89E6, 0x753C, 0xE155,
01022     0x7544, 0xE156, 0x7546, 0xE15B, 0x7549, 0xE159, 0x754A, 0xE158,
01023     0x754B, 0x9DC0, 0x754C, 0x8A45, 0x754D, 0xE157, 0x754F, 0x88D8,
01024     0x7551, 0x94A8, 0x7554, 0x94C8, 0x7559, 0x97AF, 0x755A, 0xE15C,
01025     0x755B, 0xE15A, 0x755C, 0x927B, 0x755D, 0x90A4, 0x7560, 0x94A9,
01026     0x7562, 0x954C, 0x7564, 0xE15E, 0x7565, 0x97AA, 0x7566, 0x8C6C,
01027     0x7567, 0xE15F, 0x7569, 0xE15D, 0x756A, 0x94D4, 0x756B, 0xE160,
01028     0x756D, 0xE161, 0x756F, 0xFB6F, 0x7570, 0x88D9, 0x7573, 0x8FF4,
01029     0x7574, 0xE166, 0x7576, 0xE163, 0x7577, 0x93EB, 0x7578, 0xE162,
01030     0x757F, 0x8B45, 0x7582, 0xE169, 0x7586, 0xE164, 0x7587, 0xE165,
01031     0x7589, 0xE168, 0x758A, 0xE167, 0x758B, 0x9544, 0x758E, 0x9161,
01032     0x758F, 0x9160, 0x7591, 0x8B5E, 0x7594, 0xE16A, 0x759A, 0xE16B,
01033     0x759D, 0xE16C, 0x75A3, 0xE16E, 0x75A5, 0xE16D, 0x75AB, 0x8975,
01034     0x75B1, 0xE176, 0x75B2, 0x94E6, 0x75B3, 0xE170, 0x75B5, 0xE172,
01035     0x75B8, 0xE174, 0x75B9, 0x905D, 0x75BC, 0xE175, 0x75BD, 0xE173,
01036     0x75BE, 0x8EBE, 0x75C2, 0xE16F, 0x75C3, 0xE171, 0x75C5, 0x9561,
01037     0x75C7, 0x8FC7, 0x75CA, 0xE178, 0x75CD, 0xE177, 0x75D2, 0xE179,
01038     0x75D4, 0x8EA4, 0x75D5, 0x8DAD, 0x75D8, 0x9397, 0x75D9, 0xE17A,
01039     0x75DB, 0x92C9, 0x75DE, 0xE17C, 0x75E2, 0x979F, 0x75E3, 0xE17B,
01040     0x75E9, 0x9189, 0x75F0, 0xE182, 0x75F2, 0xE184, 0x75F3, 0xE185,
01041     0x75F4, 0x9273, 0x75FA, 0xE183, 0x75FC, 0xE180, 0x75FE, 0xE17D,
01042     0x75FF, 0xE17E, 0x7601, 0xE181, 0x7609, 0xE188, 0x760B, 0xE186,
01043     0x760D, 0xE187, 0x761F, 0xE189, 0x7620, 0xE18B, 0x7621, 0xE18C,
01044     0x7622, 0xE18D, 0x7624, 0xE18E, 0x7627, 0xE18A, 0x7630, 0xE190,
01045     0x7634, 0xE18F, 0x763B, 0xE191, 0x7642, 0x97C3, 0x7646, 0xE194,
01046     0x7647, 0xE192, 0x7648, 0xE193, 0x764C, 0x8AE0, 0x7652, 0x96FC,
01047     0x7656, 0x95C8, 0x7658, 0xE196, 0x765C, 0xE195, 0x7661, 0xE197,
01048     0x7662, 0xE198, 0x7667, 0xE19C, 0x7668, 0xE199, 0x7669, 0xE19A,
01049     0x766A, 0xE19B, 0x766C, 0xE19D, 0x7670, 0xE19E, 0x7672, 0xE19F,
01050     0x7676, 0xE1A0, 0x7678, 0xE1A1, 0x767A, 0x94AD, 0x767B, 0x936F,
01051     0x767C, 0xE1A2, 0x767D, 0x9492, 0x767E, 0x9553, 0x7680, 0xE1A3,
01052     0x7682, 0xFB70, 0x7683, 0xE1A4, 0x7684, 0x9349, 0x7686, 0x8A46,
01053     0x7687, 0x8D63, 0x7688, 0xE1A5, 0x768B, 0xE1A6, 0x768E, 0xE1A7,
01054     0x7690, 0x8E48, 0x7693, 0xE1A9, 0x7696, 0xE1A8, 0x7699, 0xE1AA,
01055     0x769A, 0xE1AB, 0x769B, 0xFB73, 0x769C, 0xFB71, 0x769E, 0xFB72,
01056     0x76A6, 0xFB74, 0x76AE, 0x94E7, 0x76B0, 0xE1AC, 0x76B4, 0xE1AD,
01057     0x76B7, 0xEA89, 0x76B8, 0xE1AE, 0x76B9, 0xE1AF, 0x76BA, 0xE1B0,
01058     0x76BF, 0x8E4D, 0x76C2, 0xE1B1, 0x76C3, 0x9475, 0x76C6, 0x967E,
01059     0x76C8, 0x896D, 0x76CA, 0x8976, 0x76CD, 0xE1B2, 0x76D2, 0xE1B4,
01060     0x76D6, 0xE1B3, 0x76D7, 0x9390, 0x76DB, 0x90B7, 0x76DC, 0x9F58,
01061     0x76DE, 0xE1B5, 0x76DF, 0x96BF, 0x76E1, 0xE1B6, 0x76E3, 0x8AC4,
01062     0x76E4, 0x94D5, 0x76E5, 0xE1B7, 0x76E7, 0xE1B8, 0x76EA, 0xE1B9,
01063     0x76EE, 0x96DA, 0x76F2, 0x96D3, 0x76F4, 0x92BC, 0x76F8, 0x918A,
01064     0x76FB, 0xE1BB, 0x76FE, 0x8F82, 0x7701, 0x8FC8, 0x7704, 0xE1BE,
01065     0x7707, 0xE1BD, 0x7708, 0xE1BC, 0x7709, 0x94FB, 0x770B, 0x8AC5,
01066     0x770C, 0x8CA7, 0x771B, 0xE1C4, 0x771E, 0xE1C1, 0x771F, 0x905E,
01067     0x7720, 0x96B0, 0x7724, 0xE1C0, 0x7725, 0xE1C2, 0x7726, 0xE1C3,
01068     0x7729, 0xE1BF, 0x7737, 0xE1C5, 0x7738, 0xE1C6, 0x773A, 0x92AD,
01069     0x773C, 0x8AE1, 0x7740, 0x9285, 0x7746, 0xFB76, 0x7747, 0xE1C7,
01070     0x775A, 0xE1C8, 0x775B, 0xE1CB, 0x7761, 0x9087, 0x7763, 0x93C2,
01071     0x7765, 0xE1CC, 0x7766, 0x9672, 0x7768, 0xE1C9, 0x776B, 0xE1CA,
01072     0x7779, 0xE1CF, 0x777E, 0xE1CE, 0x777F, 0xE1CD, 0x778B, 0xE1D1,
01073     0x778E, 0xE1D0, 0x7791, 0xE1D2, 0x779E, 0xE1D4, 0x77A0, 0xE1D3,
01074     0x77A5, 0x95CB, 0x77AC, 0x8F75, 0x77AD, 0x97C4, 0x77B0, 0xE1D5,
01075     0x77B3, 0x93B5, 0x77B6, 0xE1D6, 0x77B9, 0xE1D7, 0x77BB, 0xE1DB,
01076     0x77BC, 0xE1D9, 0x77BD, 0xE1DA, 0x77BF, 0xE1D8, 0x77C7, 0xE1DC,
01077     0x77CD, 0xE1DD, 0x77D7, 0xE1DE, 0x77DA, 0xE1DF, 0x77DB, 0x96B5,
01078     0x77DC, 0xE1E0, 0x77E2, 0x96EE, 0x77E3, 0xE1E1, 0x77E5, 0x926D,
01079     0x77E7, 0x948A, 0x77E9, 0x8BE9, 0x77ED, 0x925A, 0x77EE, 0xE1E2,
01080     0x77EF, 0x8BB8, 0x77F3, 0x90CE, 0x77FC, 0xE1E3, 0x7802, 0x8DBB,
01081     0x780C, 0xE1E4, 0x7812, 0xE1E5, 0x7814, 0x8CA4, 0x7815, 0x8DD3,
01082     0x7820, 0xE1E7, 0x7821, 0xFB78, 0x7825, 0x9375, 0x7826, 0x8DD4,
01083     0x7827, 0x8B6D, 0x7832, 0x9643, 0x7834, 0x946A, 0x783A, 0x9376,
01084     0x783F, 0x8D7B, 0x7845, 0xE1E9, 0x784E, 0xFB79, 0x785D, 0x8FC9,
01085     0x7864, 0xFB7A, 0x786B, 0x97B0, 0x786C, 0x8D64, 0x786F, 0x8CA5,
01086     0x7872, 0x94A1, 0x7874, 0xE1EB, 0x787A, 0xFB7B, 0x787C, 0xE1ED,
01087     0x7881, 0x8CE9, 0x7886, 0xE1EC, 0x7887, 0x92F4, 0x788C, 0xE1EF,
01088     0x788D, 0x8A56, 0x788E, 0xE1EA, 0x7891, 0x94E8, 0x7893, 0x894F,
01089     0x7895, 0x8DEA, 0x7897, 0x9871, 0x789A, 0xE1EE, 0x78A3, 0xE1F0,
01090     0x78A7, 0x95C9, 0x78A9, 0x90D7, 0x78AA, 0xE1F2, 0x78AF, 0xE1F3,
01091     0x78B5, 0xE1F1, 0x78BA, 0x8A6D, 0x78BC, 0xE1F9, 0x78BE, 0xE1F8,
01092     0x78C1, 0x8EA5, 0x78C5, 0xE1FA, 0x78C6, 0xE1F5, 0x78CA, 0xE1FB,
01093     0x78CB, 0xE1F6, 0x78D0, 0x94D6, 0x78D1, 0xE1F4, 0x78D4, 0xE1F7,
01094     0x78DA, 0xE241, 0x78E7, 0xE240, 0x78E8, 0x9681, 0x78EC, 0xE1FC,
01095     0x78EF, 0x88E9, 0x78F4, 0xE243, 0x78FD, 0xE242, 0x7901, 0x8FCA,
01096     0x7907, 0xE244, 0x790E, 0x9162, 0x7911, 0xE246, 0x7912, 0xE245,
01097     0x7919, 0xE247, 0x7926, 0xE1E6, 0x792A, 0xE1E8, 0x792B, 0xE249,
01098     0x792C, 0xE248, 0x7930, 0xFB7C, 0x793A, 0x8EA6, 0x793C, 0x97E7,
01099     0x793E, 0x8ED0, 0x7940, 0xE24A, 0x7941, 0x8C56, 0x7947, 0x8B5F,
01100     0x7948, 0x8B46, 0x7949, 0x8E83, 0x7950, 0x9753, 0x7953, 0xE250,
01101     0x7955, 0xE24F, 0x7956, 0x9163, 0x7957, 0xE24C, 0x795A, 0xE24E,
01102     0x795D, 0x8F6A, 0x795E, 0x905F, 0x795F, 0xE24D, 0x7960, 0xE24B,
01103     0x7962, 0x9449, 0x7965, 0x8FCB, 0x7968, 0x955B, 0x796D, 0x8DD5,
01104     0x7977, 0x9398, 0x797A, 0xE251, 0x797F, 0xE252, 0x7980, 0xE268,
01105     0x7981, 0x8BD6, 0x7984, 0x985C, 0x7985, 0x9154, 0x798A, 0xE253,
01106     0x798D, 0x89D0, 0x798E, 0x92F5, 0x798F, 0x959F, 0x7994, 0xFB81,
01107     0x799B, 0xFB83, 0x799D, 0xE254, 0x79A6, 0x8B9A, 0x79A7, 0xE255,
01108     0x79AA, 0xE257, 0x79AE, 0xE258, 0x79B0, 0x9448, 0x79B3, 0xE259,
01109     0x79B9, 0xE25A, 0x79BA, 0xE25B, 0x79BD, 0x8BD7, 0x79BE, 0x89D1,
01110     0x79BF, 0x93C3, 0x79C0, 0x8F47, 0x79C1, 0x8E84, 0x79C9, 0xE25C,
01111     0x79CB, 0x8F48, 0x79D1, 0x89C8, 0x79D2, 0x9562, 0x79D5, 0xE25D,
01112     0x79D8, 0x94E9, 0x79DF, 0x9164, 0x79E1, 0xE260, 0x79E3, 0xE261,
01113     0x79E4, 0x9489, 0x79E6, 0x9060, 0x79E7, 0xE25E, 0x79E9, 0x9281,
01114     0x79EC, 0xE25F, 0x79F0, 0x8FCC, 0x79FB, 0x88DA, 0x7A00, 0x8B48,
01115     0x7A08, 0xE262, 0x7A0B, 0x92F6, 0x7A0D, 0xE263, 0x7A0E, 0x90C5,
01116     0x7A14, 0x96AB, 0x7A17, 0x9542, 0x7A18, 0xE264, 0x7A19, 0xE265,
01117     0x7A1A, 0x9274, 0x7A1C, 0x97C5, 0x7A1F, 0xE267, 0x7A20, 0xE266,
01118     0x7A2E, 0x8EED, 0x7A31, 0xE269, 0x7A32, 0x88EE, 0x7A37, 0xE26C,
01119     0x7A3B, 0xE26A, 0x7A3C, 0x89D2, 0x7A3D, 0x8C6D, 0x7A3E, 0xE26B,
01120     0x7A3F, 0x8D65, 0x7A40, 0x8D92, 0x7A42, 0x95E4, 0x7A43, 0xE26D,
01121     0x7A46, 0x9673, 0x7A49, 0xE26F, 0x7A4D, 0x90CF, 0x7A4E, 0x896E,
01122     0x7A4F, 0x89B8, 0x7A50, 0x88AA, 0x7A57, 0xE26E, 0x7A61, 0xE270,
01123     0x7A62, 0xE271, 0x7A63, 0x8FF5, 0x7A69, 0xE272, 0x7A6B, 0x8A6E,
01124     0x7A70, 0xE274, 0x7A74, 0x8C8A, 0x7A76, 0x8B86, 0x7A79, 0xE275,
01125     0x7A7A, 0x8BF3, 0x7A7D, 0xE276, 0x7A7F, 0x90FA, 0x7A81, 0x93CB,
01126     0x7A83, 0x90DE, 0x7A84, 0x8DF3, 0x7A88, 0xE277, 0x7A92, 0x9282,
01127     0x7A93, 0x918B, 0x7A95, 0xE279, 0x7A96, 0xE27B, 0x7A97, 0xE278,
01128     0x7A98, 0xE27A, 0x7A9F, 0x8C41, 0x7AA9, 0xE27C, 0x7AAA, 0x8C45,
01129     0x7AAE, 0x8B87, 0x7AAF, 0x9771, 0x7AB0, 0xE27E, 0x7AB6, 0xE280,
01130     0x7ABA, 0x894D, 0x7ABF, 0xE283, 0x7AC3, 0x8A96, 0x7AC4, 0xE282,
01131     0x7AC5, 0xE281, 0x7AC7, 0xE285, 0x7AC8, 0xE27D, 0x7ACA, 0xE286,
01132     0x7ACB, 0x97A7, 0x7ACD, 0xE287, 0x7ACF, 0xE288, 0x7AD1, 0xFB84,
01133     0x7AD2, 0x9AF2, 0x7AD3, 0xE28A, 0x7AD5, 0xE289, 0x7AD9, 0xE28B,
01134     0x7ADA, 0xE28C, 0x7ADC, 0x97B3, 0x7ADD, 0xE28D, 0x7ADF, 0xE8ED,
01135     0x7AE0, 0x8FCD, 0x7AE1, 0xE28E, 0x7AE2, 0xE28F, 0x7AE3, 0x8F76,
01136     0x7AE5, 0x93B6, 0x7AE6, 0xE290, 0x7AE7, 0xFB85, 0x7AEA, 0x9247,
01137     0x7AEB, 0xFB87, 0x7AED, 0xE291, 0x7AEF, 0x925B, 0x7AF0, 0xE292,
01138     0x7AF6, 0x8BA3, 0x7AF8, 0x995E, 0x7AF9, 0x927C, 0x7AFA, 0x8EB1,
01139     0x7AFF, 0x8AC6, 0x7B02, 0xE293, 0x7B04, 0xE2A0, 0x7B06, 0xE296,
01140     0x7B08, 0x8B88, 0x7B0A, 0xE295, 0x7B0B, 0xE2A2, 0x7B0F, 0xE294,
01141     0x7B11, 0x8FCE, 0x7B18, 0xE298, 0x7B19, 0xE299, 0x7B1B, 0x934A,
01142     0x7B1E, 0xE29A, 0x7B20, 0x8A7D, 0x7B25, 0x9079, 0x7B26, 0x9584,
01143     0x7B28, 0xE29C, 0x7B2C, 0x91E6, 0x7B33, 0xE297, 0x7B35, 0xE29B,
01144     0x7B36, 0xE29D, 0x7B39, 0x8DF9, 0x7B45, 0xE2A4, 0x7B46, 0x954D,
01145     0x7B48, 0x94A4, 0x7B49, 0x9399, 0x7B4B, 0x8BD8, 0x7B4C, 0xE2A3,
01146     0x7B4D, 0xE2A1, 0x7B4F, 0x94B3, 0x7B50, 0xE29E, 0x7B51, 0x927D,
01147     0x7B52, 0x939B, 0x7B54, 0x939A, 0x7B56, 0x8DF4, 0x7B5D, 0xE2B6,
01148     0x7B65, 0xE2A6, 0x7B67, 0xE2A8, 0x7B6C, 0xE2AB, 0x7B6E, 0xE2AC,
01149     0x7B70, 0xE2A9, 0x7B71, 0xE2AA, 0x7B74, 0xE2A7, 0x7B75, 0xE2A5,
01150     0x7B7A, 0xE29F, 0x7B86, 0x95CD, 0x7B87, 0x89D3, 0x7B8B, 0xE2B3,
01151     0x7B8D, 0xE2B0, 0x7B8F, 0xE2B5, 0x7B92, 0xE2B4, 0x7B94, 0x9493,
01152     0x7B95, 0x96A5, 0x7B97, 0x8E5A, 0x7B98, 0xE2AE, 0x7B99, 0xE2B7,
01153     0x7B9A, 0xE2B2, 0x7B9C, 0xE2B1, 0x7B9D, 0xE2AD, 0x7B9E, 0xFB88,
01154     0x7B9F, 0xE2AF, 0x7BA1, 0x8AC7, 0x7BAA, 0x925C, 0x7BAD, 0x90FB,
01155     0x7BB1, 0x94A0, 0x7BB4, 0xE2BC, 0x7BB8, 0x94A2, 0x7BC0, 0x90DF,
01156     0x7BC1, 0xE2B9, 0x7BC4, 0x94CD, 0x7BC6, 0xE2BD, 0x7BC7, 0x95D1,
01157     0x7BC9, 0x927A, 0x7BCB, 0xE2B8, 0x7BCC, 0xE2BA, 0x7BCF, 0xE2BB,
01158     0x7BDD, 0xE2BE, 0x7BE0, 0x8EC2, 0x7BE4, 0x93C4, 0x7BE5, 0xE2C3,
01159     0x7BE6, 0xE2C2, 0x7BE9, 0xE2BF, 0x7BED, 0x9855, 0x7BF3, 0xE2C8,
01160     0x7BF6, 0xE2CC, 0x7BF7, 0xE2C9, 0x7C00, 0xE2C5, 0x7C07, 0xE2C6,
01161     0x7C0D, 0xE2CB, 0x7C11, 0xE2C0, 0x7C12, 0x99D3, 0x7C13, 0xE2C7,
01162     0x7C14, 0xE2C1, 0x7C17, 0xE2CA, 0x7C1F, 0xE2D0, 0x7C21, 0x8AC8,
01163     0x7C23, 0xE2CD, 0x7C27, 0xE2CE, 0x7C2A, 0xE2CF, 0x7C2B, 0xE2D2,
01164     0x7C37, 0xE2D1, 0x7C38, 0x94F4, 0x7C3D, 0xE2D3, 0x7C3E, 0x97FA,
01165     0x7C3F, 0x95EB, 0x7C40, 0xE2D8, 0x7C43, 0xE2D5, 0x7C4C, 0xE2D4,
01166     0x7C4D, 0x90D0, 0x7C4F, 0xE2D7, 0x7C50, 0xE2D9, 0x7C54, 0xE2D6,
01167     0x7C56, 0xE2DD, 0x7C58, 0xE2DA, 0x7C5F, 0xE2DB, 0x7C60, 0xE2C4,
01168     0x7C64, 0xE2DC, 0x7C65, 0xE2DE, 0x7C6C, 0xE2DF, 0x7C73, 0x95C4,
01169     0x7C75, 0xE2E0, 0x7C7E, 0x96E0, 0x7C81, 0x8BCC, 0x7C82, 0x8C48,
01170     0x7C83, 0xE2E1, 0x7C89, 0x95B2, 0x7C8B, 0x9088, 0x7C8D, 0x96AE,
01171     0x7C90, 0xE2E2, 0x7C92, 0x97B1, 0x7C95, 0x9494, 0x7C97, 0x9165,
01172     0x7C98, 0x9453, 0x7C9B, 0x8F6C, 0x7C9F, 0x88BE, 0x7CA1, 0xE2E7,
01173     0x7CA2, 0xE2E5, 0x7CA4, 0xE2E3, 0x7CA5, 0x8A9F, 0x7CA7, 0x8FCF,
01174     0x7CA8, 0xE2E8, 0x7CAB, 0xE2E6, 0x7CAD, 0xE2E4, 0x7CAE, 0xE2EC,
01175     0x7CB1, 0xE2EB, 0x7CB2, 0xE2EA, 0x7CB3, 0xE2E9, 0x7CB9, 0xE2ED,
01176     0x7CBD, 0xE2EE, 0x7CBE, 0x90B8, 0x7CC0, 0xE2EF, 0x7CC2, 0xE2F1,
01177     0x7CC5, 0xE2F0, 0x7CCA, 0x8CD0, 0x7CCE, 0x9157, 0x7CD2, 0xE2F3,
01178     0x7CD6, 0x939C, 0x7CD8, 0xE2F2, 0x7CDC, 0xE2F4, 0x7CDE, 0x95B3,
01179     0x7CDF, 0x918C, 0x7CE0, 0x8D66, 0x7CE2, 0xE2F5, 0x7CE7, 0x97C6,
01180     0x7CEF, 0xE2F7, 0x7CF2, 0xE2F8, 0x7CF4, 0xE2F9, 0x7CF6, 0xE2FA,
01181     0x7CF8, 0x8E85, 0x7CFA, 0xE2FB, 0x7CFB, 0x8C6E, 0x7CFE, 0x8B8A,
01182     0x7D00, 0x8B49, 0x7D02, 0xE340, 0x7D04, 0x96F1, 0x7D05, 0x8D67,
01183     0x7D06, 0xE2FC, 0x7D0A, 0xE343, 0x7D0B, 0x96E4, 0x7D0D, 0x945B,
01184     0x7D10, 0x9552, 0x7D14, 0x8F83, 0x7D15, 0xE342, 0x7D17, 0x8ED1,
01185     0x7D18, 0x8D68, 0x7D19, 0x8E86, 0x7D1A, 0x8B89, 0x7D1B, 0x95B4,
01186     0x7D1C, 0xE341, 0x7D20, 0x9166, 0x7D21, 0x9661, 0x7D22, 0x8DF5,
01187     0x7D2B, 0x8E87, 0x7D2C, 0x92DB, 0x7D2E, 0xE346, 0x7D2F, 0x97DD,
01188     0x7D30, 0x8DD7, 0x7D32, 0xE347, 0x7D33, 0x9061, 0x7D35, 0xE349,
01189     0x7D39, 0x8FD0, 0x7D3A, 0x8DAE, 0x7D3F, 0xE348, 0x7D42, 0x8F49,
01190     0x7D43, 0x8CBC, 0x7D44, 0x9167, 0x7D45, 0xE344, 0x7D46, 0xE34A,
01191     0x7D48, 0xFB8A, 0x7D4B, 0xE345, 0x7D4C, 0x8C6F, 0x7D4E, 0xE34D,
01192     0x7D4F, 0xE351, 0x7D50, 0x8C8B, 0x7D56, 0xE34C, 0x7D5B, 0xE355,
01193     0x7D5C, 0xFB8B, 0x7D5E, 0x8D69, 0x7D61, 0x978D, 0x7D62, 0x88BA,
01194     0x7D63, 0xE352, 0x7D66, 0x8B8B, 0x7D68, 0xE34F, 0x7D6E, 0xE350,
01195     0x7D71, 0x939D, 0x7D72, 0xE34E, 0x7D73, 0xE34B, 0x7D75, 0x8A47,
01196     0x7D76, 0x90E2, 0x7D79, 0x8CA6, 0x7D7D, 0xE357, 0x7D89, 0xE354,
01197     0x7D8F, 0xE356, 0x7D93, 0xE353, 0x7D99, 0x8C70, 0x7D9A, 0x91B1,
01198     0x7D9B, 0xE358, 0x7D9C, 0x918E, 0x7D9F, 0xE365, 0x7DA0, 0xFB8D,
01199     0x7DA2, 0xE361, 0x7DA3, 0xE35B, 0x7DAB, 0xE35F, 0x7DAC, 0x8EF8,
01200     0x7DAD, 0x88DB, 0x7DAE, 0xE35A, 0x7DAF, 0xE362, 0x7DB0, 0xE366,
01201     0x7DB1, 0x8D6A, 0x7DB2, 0x96D4, 0x7DB4, 0x92D4, 0x7DB5, 0xE35C,
01202     0x7DB7, 0xFB8C, 0x7DB8, 0xE364, 0x7DBA, 0xE359, 0x7DBB, 0x925D,
01203     0x7DBD, 0xE35E, 0x7DBE, 0x88BB, 0x7DBF, 0x96C8, 0x7DC7, 0xE35D,
01204     0x7DCA, 0x8BD9, 0x7DCB, 0x94EA, 0x7DCF, 0x918D, 0x7DD1, 0x97CE,
01205     0x7DD2, 0x8F8F, 0x7DD5, 0xE38E, 0x7DD6, 0xFB8E, 0x7DD8, 0xE367,
01206     0x7DDA, 0x90FC, 0x7DDC, 0xE363, 0x7DDD, 0xE368, 0x7DDE, 0xE36A,
01207     0x7DE0, 0x92F7, 0x7DE1, 0xE36D, 0x7DE4, 0xE369, 0x7DE8, 0x95D2,
01208     0x7DE9, 0x8AC9, 0x7DEC, 0x96C9, 0x7DEF, 0x88DC, 0x7DF2, 0xE36C,
01209     0x7DF4, 0x97FB, 0x7DFB, 0xE36B, 0x7E01, 0x898F, 0x7E04, 0x93EA,
01210     0x7E05, 0xE36E, 0x7E09, 0xE375, 0x7E0A, 0xE36F, 0x7E0B, 0xE376,
01211     0x7E12, 0xE372, 0x7E1B, 0x949B, 0x7E1E, 0x8EC8, 0x7E1F, 0xE374,
01212     0x7E21, 0xE371, 0x7E22, 0xE377, 0x7E23, 0xE370, 0x7E26, 0x8F63,
01213     0x7E2B, 0x9644, 0x7E2E, 0x8F6B, 0x7E31, 0xE373, 0x7E32, 0xE380,
01214     0x7E35, 0xE37B, 0x7E37, 0xE37E, 0x7E39, 0xE37C, 0x7E3A, 0xE381,
01215     0x7E3B, 0xE37A, 0x7E3D, 0xE360, 0x7E3E, 0x90D1, 0x7E41, 0x94C9,
01216     0x7E43, 0xE37D, 0x7E46, 0xE378, 0x7E4A, 0x9140, 0x7E4B, 0x8C71,
01217     0x7E4D, 0x8F4A, 0x7E52, 0xFB8F, 0x7E54, 0x9044, 0x7E55, 0x9155,
01218     0x7E56, 0xE384, 0x7E59, 0xE386, 0x7E5A, 0xE387, 0x7E5D, 0xE383,
01219     0x7E5E, 0xE385, 0x7E66, 0xE379, 0x7E67, 0xE382, 0x7E69, 0xE38A,
01220     0x7E6A, 0xE389, 0x7E6D, 0x969A, 0x7E70, 0x8C4A, 0x7E79, 0xE388,
01221     0x7E7B, 0xE38C, 0x7E7C, 0xE38B, 0x7E7D, 0xE38F, 0x7E7F, 0xE391,
01222     0x7E82, 0x8E5B, 0x7E83, 0xE38D, 0x7E88, 0xE392, 0x7E89, 0xE393,
01223     0x7E8A, 0xFA5C, 0x7E8C, 0xE394, 0x7E8E, 0xE39A, 0x7E8F, 0x935A,
01224     0x7E90, 0xE396, 0x7E92, 0xE395, 0x7E93, 0xE397, 0x7E94, 0xE398,
01225     0x7E96, 0xE399, 0x7E9B, 0xE39B, 0x7E9C, 0xE39C, 0x7F36, 0x8ACA,
01226     0x7F38, 0xE39D, 0x7F3A, 0xE39E, 0x7F45, 0xE39F, 0x7F47, 0xFB90,
01227     0x7F4C, 0xE3A0, 0x7F4D, 0xE3A1, 0x7F4E, 0xE3A2, 0x7F50, 0xE3A3,
01228     0x7F51, 0xE3A4, 0x7F54, 0xE3A6, 0x7F55, 0xE3A5, 0x7F58, 0xE3A7,
01229     0x7F5F, 0xE3A8, 0x7F60, 0xE3A9, 0x7F67, 0xE3AC, 0x7F68, 0xE3AA,
01230     0x7F69, 0xE3AB, 0x7F6A, 0x8DDF, 0x7F6B, 0x8C72, 0x7F6E, 0x9275,
01231     0x7F70, 0x94B1, 0x7F72, 0x8F90, 0x7F75, 0x946C, 0x7F77, 0x94EB,
01232     0x7F78, 0xE3AD, 0x7F79, 0x9CEB, 0x7F82, 0xE3AE, 0x7F83, 0xE3B0,
01233     0x7F85, 0x9785, 0x7F86, 0xE3AF, 0x7F87, 0xE3B2, 0x7F88, 0xE3B1,
01234     0x7F8A, 0x9772, 0x7F8C, 0xE3B3, 0x7F8E, 0x94FC, 0x7F94, 0xE3B4,
01235     0x7F9A, 0xE3B7, 0x7F9D, 0xE3B6, 0x7F9E, 0xE3B5, 0x7FA1, 0xFB91,
01236     0x7FA3, 0xE3B8, 0x7FA4, 0x8C51, 0x7FA8, 0x9141, 0x7FA9, 0x8B60,
01237     0x7FAE, 0xE3BC, 0x7FAF, 0xE3B9, 0x7FB2, 0xE3BA, 0x7FB6, 0xE3BD,
01238     0x7FB8, 0xE3BE, 0x7FB9, 0xE3BB, 0x7FBD, 0x8948, 0x7FC1, 0x89A5,
01239     0x7FC5, 0xE3C0, 0x7FC6, 0xE3C1, 0x7FCA, 0xE3C2, 0x7FCC, 0x9782,
01240     0x7FD2, 0x8F4B, 0x7FD4, 0xE3C4, 0x7FD5, 0xE3C3, 0x7FE0, 0x9089,
01241     0x7FE1, 0xE3C5, 0x7FE6, 0xE3C6, 0x7FE9, 0xE3C7, 0x7FEB, 0x8AE3,
01242     0x7FF0, 0x8ACB, 0x7FF3, 0xE3C8, 0x7FF9, 0xE3C9, 0x7FFB, 0x967C,
01243     0x7FFC, 0x9783, 0x8000, 0x9773, 0x8001, 0x9856, 0x8003, 0x8D6C,
01244     0x8004, 0xE3CC, 0x8005, 0x8ED2, 0x8006, 0xE3CB, 0x800B, 0xE3CD,
01245     0x800C, 0x8EA7, 0x8010, 0x91CF, 0x8012, 0xE3CE, 0x8015, 0x8D6B,
01246     0x8017, 0x96D5, 0x8018, 0xE3CF, 0x8019, 0xE3D0, 0x801C, 0xE3D1,
01247     0x8021, 0xE3D2, 0x8028, 0xE3D3, 0x8033, 0x8EA8, 0x8036, 0x96EB,
01248     0x803B, 0xE3D5, 0x803D, 0x925E, 0x803F, 0xE3D4, 0x8046, 0xE3D7,
01249     0x804A, 0xE3D6, 0x8052, 0xE3D8, 0x8056, 0x90B9, 0x8058, 0xE3D9,
01250     0x805A, 0xE3DA, 0x805E, 0x95B7, 0x805F, 0xE3DB, 0x8061, 0x918F,
01251     0x8062, 0xE3DC, 0x8068, 0xE3DD, 0x806F, 0x97FC, 0x8070, 0xE3E0,
01252     0x8072, 0xE3DF, 0x8073, 0xE3DE, 0x8074, 0x92AE, 0x8076, 0xE3E1,
01253     0x8077, 0x9045, 0x8079, 0xE3E2, 0x807D, 0xE3E3, 0x807E, 0x9857,
01254     0x807F, 0xE3E4, 0x8084, 0xE3E5, 0x8085, 0xE3E7, 0x8086, 0xE3E6,
01255     0x8087, 0x94A3, 0x8089, 0x93F7, 0x808B, 0x985D, 0x808C, 0x94A7,
01256     0x8093, 0xE3E9, 0x8096, 0x8FD1, 0x8098, 0x9549, 0x809A, 0xE3EA,
01257     0x809B, 0xE3E8, 0x809D, 0x8ACC, 0x80A1, 0x8CD2, 0x80A2, 0x8E88,
01258     0x80A5, 0x94EC, 0x80A9, 0x8CA8, 0x80AA, 0x9662, 0x80AC, 0xE3ED,
01259     0x80AD, 0xE3EB, 0x80AF, 0x8D6D, 0x80B1, 0x8D6E, 0x80B2, 0x88E7,
01260     0x80B4, 0x8DE6, 0x80BA, 0x9478, 0x80C3, 0x88DD, 0x80C4, 0xE3F2,
01261     0x80C6, 0x925F, 0x80CC, 0x9477, 0x80CE, 0x91D9, 0x80D6, 0xE3F4,
01262     0x80D9, 0xE3F0, 0x80DA, 0xE3F3, 0x80DB, 0xE3EE, 0x80DD, 0xE3F1,
01263     0x80DE, 0x9645, 0x80E1, 0x8CD3, 0x80E4, 0x88FB, 0x80E5, 0xE3EF,
01264     0x80EF, 0xE3F6, 0x80F1, 0xE3F7, 0x80F4, 0x93B7, 0x80F8, 0x8BB9,
01265     0x80FC, 0xE445, 0x80FD, 0x945C, 0x8102, 0x8E89, 0x8105, 0x8BBA,
01266     0x8106, 0x90C6, 0x8107, 0x9865, 0x8108, 0x96AC, 0x8109, 0xE3F5,
01267     0x810A, 0x90D2, 0x811A, 0x8B72, 0x811B, 0xE3F8, 0x8123, 0xE3FA,
01268     0x8129, 0xE3F9, 0x812F, 0xE3FB, 0x8131, 0x9245, 0x8133, 0x945D,
01269     0x8139, 0x92AF, 0x813E, 0xE442, 0x8146, 0xE441, 0x814B, 0xE3FC,
01270     0x814E, 0x9074, 0x8150, 0x9585, 0x8151, 0xE444, 0x8153, 0xE443,
01271     0x8154, 0x8D6F, 0x8155, 0x9872, 0x815F, 0xE454, 0x8165, 0xE448,
01272     0x8166, 0xE449, 0x816B, 0x8EEE, 0x816E, 0xE447, 0x8170, 0x8D98,
01273     0x8171, 0xE446, 0x8174, 0xE44A, 0x8178, 0x92B0, 0x8179, 0x95A0,
01274     0x817A, 0x9142, 0x817F, 0x91DA, 0x8180, 0xE44E, 0x8182, 0xE44F,
01275     0x8183, 0xE44B, 0x8188, 0xE44C, 0x818A, 0xE44D, 0x818F, 0x8D70,
01276     0x8193, 0xE455, 0x8195, 0xE451, 0x819A, 0x9586, 0x819C, 0x968C,
01277     0x819D, 0x9547, 0x81A0, 0xE450, 0x81A3, 0xE453, 0x81A4, 0xE452,
01278     0x81A8, 0x9663, 0x81A9, 0xE456, 0x81B0, 0xE457, 0x81B3, 0x9156,
01279     0x81B5, 0xE458, 0x81B8, 0xE45A, 0x81BA, 0xE45E, 0x81BD, 0xE45B,
01280     0x81BE, 0xE459, 0x81BF, 0x945E, 0x81C0, 0xE45C, 0x81C2, 0xE45D,
01281     0x81C6, 0x89B0, 0x81C8, 0xE464, 0x81C9, 0xE45F, 0x81CD, 0xE460,
01282     0x81D1, 0xE461, 0x81D3, 0x919F, 0x81D8, 0xE463, 0x81D9, 0xE462,
01283     0x81DA, 0xE465, 0x81DF, 0xE466, 0x81E0, 0xE467, 0x81E3, 0x9062,
01284     0x81E5, 0x89E7, 0x81E7, 0xE468, 0x81E8, 0x97D5, 0x81EA, 0x8EA9,
01285     0x81ED, 0x8F4C, 0x81F3, 0x8E8A, 0x81F4, 0x9276, 0x81FA, 0xE469,
01286     0x81FB, 0xE46A, 0x81FC, 0x8950, 0x81FE, 0xE46B, 0x8201, 0xE46C,
01287     0x8202, 0xE46D, 0x8205, 0xE46E, 0x8207, 0xE46F, 0x8208, 0x8BBB,
01288     0x8209, 0x9DA8, 0x820A, 0xE470, 0x820C, 0x90E3, 0x820D, 0xE471,
01289     0x820E, 0x8EC9, 0x8210, 0xE472, 0x8212, 0x98AE, 0x8216, 0xE473,
01290     0x8217, 0x95DC, 0x8218, 0x8ADA, 0x821B, 0x9143, 0x821C, 0x8F77,
01291     0x821E, 0x9591, 0x821F, 0x8F4D, 0x8229, 0xE474, 0x822A, 0x8D71,
01292     0x822B, 0xE475, 0x822C, 0x94CA, 0x822E, 0xE484, 0x8233, 0xE477,
01293     0x8235, 0x91C7, 0x8236, 0x9495, 0x8237, 0x8CBD, 0x8238, 0xE476,
01294     0x8239, 0x9144, 0x8240, 0xE478, 0x8247, 0x92F8, 0x8258, 0xE47A,
01295     0x8259, 0xE479, 0x825A, 0xE47C, 0x825D, 0xE47B, 0x825F, 0xE47D,
01296     0x8262, 0xE480, 0x8264, 0xE47E, 0x8266, 0x8ACD, 0x8268, 0xE481,
01297     0x826A, 0xE482, 0x826B, 0xE483, 0x826E, 0x8DAF, 0x826F, 0x97C7,
01298     0x8271, 0xE485, 0x8272, 0x9046, 0x8276, 0x8990, 0x8277, 0xE486,
01299     0x8278, 0xE487, 0x827E, 0xE488, 0x828B, 0x88F0, 0x828D, 0xE489,
01300     0x8292, 0xE48A, 0x8299, 0x9587, 0x829D, 0x8EC5, 0x829F, 0xE48C,
01301     0x82A5, 0x8A48, 0x82A6, 0x88B0, 0x82AB, 0xE48B, 0x82AC, 0xE48E,
01302     0x82AD, 0x946D, 0x82AF, 0x9063, 0x82B1, 0x89D4, 0x82B3, 0x9646,
01303     0x82B8, 0x8C7C, 0x82B9, 0x8BDA, 0x82BB, 0xE48D, 0x82BD, 0x89E8,
01304     0x82C5, 0x8AA1, 0x82D1, 0x8991, 0x82D2, 0xE492, 0x82D3, 0x97E8,
01305     0x82D4, 0x91DB, 0x82D7, 0x9563, 0x82D9, 0xE49E, 0x82DB, 0x89D5,
01306     0x82DC, 0xE49C, 0x82DE, 0xE49A, 0x82DF, 0xE491, 0x82E1, 0xE48F,
01307     0x82E3, 0xE490, 0x82E5, 0x8EE1, 0x82E6, 0x8BEA, 0x82E7, 0x9297,
01308     0x82EB, 0x93CF, 0x82F1, 0x8970, 0x82F3, 0xE494, 0x82F4, 0xE493,
01309     0x82F9, 0xE499, 0x82FA, 0xE495, 0x82FB, 0xE498, 0x8301, 0xFB93,
01310     0x8302, 0x96CE, 0x8303, 0xE497, 0x8304, 0x89D6, 0x8305, 0x8A9D,
01311     0x8306, 0xE49B, 0x8309, 0xE49D, 0x830E, 0x8C73, 0x8316, 0xE4A1,
01312     0x8317, 0xE4AA, 0x8318, 0xE4AB, 0x831C, 0x88A9, 0x8323, 0xE4B2,
01313     0x8328, 0x88EF, 0x832B, 0xE4A9, 0x832F, 0xE4A8, 0x8331, 0xE4A3,
01314     0x8332, 0xE4A2, 0x8334, 0xE4A0, 0x8335, 0xE49F, 0x8336, 0x9283,
01315     0x8338, 0x91F9, 0x8339, 0xE4A5, 0x8340, 0xE4A4, 0x8345, 0xE4A7,
01316     0x8349, 0x9190, 0x834A, 0x8C74, 0x834F, 0x8960, 0x8350, 0xE4A6,
01317     0x8352, 0x8D72, 0x8358, 0x9191, 0x8362, 0xFB94, 0x8373, 0xE4B8,
01318     0x8375, 0xE4B9, 0x8377, 0x89D7, 0x837B, 0x89AC, 0x837C, 0xE4B6,
01319     0x837F, 0xFB95, 0x8385, 0xE4AC, 0x8387, 0xE4B4, 0x8389, 0xE4BB,
01320     0x838A, 0xE4B5, 0x838E, 0xE4B3, 0x8393, 0xE496, 0x8396, 0xE4B1,
01321     0x839A, 0xE4AD, 0x839E, 0x8ACE, 0x839F, 0xE4AF, 0x83A0, 0xE4BA,
01322     0x83A2, 0xE4B0, 0x83A8, 0xE4BC, 0x83AA, 0xE4AE, 0x83AB, 0x949C,
01323     0x83B1, 0x9789, 0x83B5, 0xE4B7, 0x83BD, 0xE4CD, 0x83C1, 0xE4C5,
01324     0x83C5, 0x909B, 0x83C7, 0xFB96, 0x83CA, 0x8B65, 0x83CC, 0x8BDB,
01325     0x83CE, 0xE4C0, 0x83D3, 0x89D9, 0x83D6, 0x8FD2, 0x83D8, 0xE4C3,
01326     0x83DC, 0x8DD8, 0x83DF, 0x9370, 0x83E0, 0xE4C8, 0x83E9, 0x95EC,
01327     0x83EB, 0xE4BF, 0x83EF, 0x89D8, 0x83F0, 0x8CD4, 0x83F1, 0x9548,
01328     0x83F2, 0xE4C9, 0x83F4, 0xE4BD, 0x83F6, 0xFB97, 0x83F7, 0xE4C6,
01329     0x83FB, 0xE4D0, 0x83FD, 0xE4C1, 0x8403, 0xE4C2, 0x8404, 0x93B8,
01330     0x8407, 0xE4C7, 0x840B, 0xE4C4, 0x840C, 0x9647, 0x840D, 0xE4CA,
01331     0x840E, 0x88DE, 0x8413, 0xE4BE, 0x8420, 0xE4CC, 0x8422, 0xE4CB,
01332     0x8429, 0x948B, 0x842A, 0xE4D2, 0x842C, 0xE4DD, 0x8431, 0x8A9E,
01333     0x8435, 0xE4E0, 0x8438, 0xE4CE, 0x843C, 0xE4D3, 0x843D, 0x978E,
01334     0x8446, 0xE4DC, 0x8448, 0xFB98, 0x8449, 0x9774, 0x844E, 0x97A8,
01335     0x8457, 0x9298, 0x845B, 0x8A8B, 0x8461, 0x9592, 0x8462, 0xE4E2,
01336     0x8463, 0x939F, 0x8466, 0x88AF, 0x8469, 0xE4DB, 0x846B, 0xE4D7,
01337     0x846C, 0x9192, 0x846D, 0xE4D1, 0x846E, 0xE4D9, 0x846F, 0xE4DE,
01338     0x8471, 0x944B, 0x8475, 0x88A8, 0x8477, 0xE4D6, 0x8479, 0xE4DF,
01339     0x847A, 0x9598, 0x8482, 0xE4DA, 0x8484, 0xE4D5, 0x848B, 0x8FD3,
01340     0x8490, 0x8F4E, 0x8494, 0x8EAA, 0x8499, 0x96D6, 0x849C, 0x9566,
01341     0x849F, 0xE4E5, 0x84A1, 0xE4EE, 0x84AD, 0xE4D8, 0x84B2, 0x8A97,
01342     0x84B4, 0xFB99, 0x84B8, 0x8FF6, 0x84B9, 0xE4E3, 0x84BB, 0xE4E8,
01343     0x84BC, 0x9193, 0x84BF, 0xE4E4, 0x84C1, 0xE4EB, 0x84C4, 0x927E,
01344     0x84C6, 0xE4EC, 0x84C9, 0x9775, 0x84CA, 0xE4E1, 0x84CB, 0x8A57,
01345     0x84CD, 0xE4E7, 0x84D0, 0xE4EA, 0x84D1, 0x96AA, 0x84D6, 0xE4ED,
01346     0x84D9, 0xE4E6, 0x84DA, 0xE4E9, 0x84DC, 0xFA60, 0x84EC, 0x9648,
01347     0x84EE, 0x9840, 0x84F4, 0xE4F1, 0x84FC, 0xE4F8, 0x84FF, 0xE4F0,
01348     0x8500, 0x8EC1, 0x8506, 0xE4CF, 0x8511, 0x95CC, 0x8513, 0x96A0,
01349     0x8514, 0xE4F7, 0x8515, 0xE4F6, 0x8517, 0xE4F2, 0x8518, 0xE4F3,
01350     0x851A, 0x8955, 0x851F, 0xE4F5, 0x8521, 0xE4EF, 0x8526, 0x92D3,
01351     0x852C, 0xE4F4, 0x852D, 0x88FC, 0x8535, 0x91A0, 0x853D, 0x95C1,
01352     0x8540, 0xE4F9, 0x8541, 0xE540, 0x8543, 0x94D7, 0x8548, 0xE4FC,
01353     0x8549, 0x8FD4, 0x854A, 0x8EC7, 0x854B, 0xE542, 0x854E, 0x8BBC,
01354     0x8553, 0xFB9A, 0x8555, 0xE543, 0x8557, 0x9599, 0x8558, 0xE4FB,
01355     0x8559, 0xFB9B, 0x855A, 0xE4D4, 0x8563, 0xE4FA, 0x8568, 0x986E,
01356     0x8569, 0x93A0, 0x856A, 0x9593, 0x856B, 0xFB9C, 0x856D, 0xE54A,
01357     0x8577, 0xE550, 0x857E, 0xE551, 0x8580, 0xE544, 0x8584, 0x9496,
01358     0x8587, 0xE54E, 0x8588, 0xE546, 0x858A, 0xE548, 0x8590, 0xE552,
01359     0x8591, 0xE547, 0x8594, 0xE54B, 0x8597, 0x8992, 0x8599, 0x93E3,
01360     0x859B, 0xE54C, 0x859C, 0xE54F, 0x85A4, 0xE545, 0x85A6, 0x9145,
01361     0x85A8, 0xE549, 0x85A9, 0x8E46, 0x85AA, 0x9064, 0x85AB, 0x8C4F,
01362     0x85AC, 0x96F2, 0x85AE, 0x96F7, 0x85AF, 0x8F92, 0x85B0, 0xFB9E,
01363     0x85B9, 0xE556, 0x85BA, 0xE554, 0x85C1, 0x986D, 0x85C9, 0xE553,
01364     0x85CD, 0x9795, 0x85CF, 0xE555, 0x85D0, 0xE557, 0x85D5, 0xE558,
01365     0x85DC, 0xE55B, 0x85DD, 0xE559, 0x85E4, 0x93A1, 0x85E5, 0xE55A,
01366     0x85E9, 0x94CB, 0x85EA, 0xE54D, 0x85F7, 0x8F93, 0x85F9, 0xE55C,
01367     0x85FA, 0xE561, 0x85FB, 0x9194, 0x85FE, 0xE560, 0x8602, 0xE541,
01368     0x8606, 0xE562, 0x8607, 0x9168, 0x860A, 0xE55D, 0x860B, 0xE55F,
01369     0x8613, 0xE55E, 0x8616, 0x9F50, 0x8617, 0x9F41, 0x861A, 0xE564,
01370     0x8622, 0xE563, 0x862D, 0x9796, 0x862F, 0xE1BA, 0x8630, 0xE565,
01371     0x863F, 0xE566, 0x864D, 0xE567, 0x864E, 0x8CD5, 0x8650, 0x8B73,
01372     0x8654, 0xE569, 0x8655, 0x997C, 0x865A, 0x8B95, 0x865C, 0x97B8,
01373     0x865E, 0x8BF1, 0x865F, 0xE56A, 0x8667, 0xE56B, 0x866B, 0x928E,
01374     0x8671, 0xE56C, 0x8679, 0x93F8, 0x867B, 0x88B8, 0x868A, 0x89E1,
01375     0x868B, 0xE571, 0x868C, 0xE572, 0x8693, 0xE56D, 0x8695, 0x8E5C,
01376     0x86A3, 0xE56E, 0x86A4, 0x9461, 0x86A9, 0xE56F, 0x86AA, 0xE570,
01377     0x86AB, 0xE57A, 0x86AF, 0xE574, 0x86B0, 0xE577, 0x86B6, 0xE573,
01378     0x86C4, 0xE575, 0x86C6, 0xE576, 0x86C7, 0x8ED6, 0x86C9, 0xE578,
01379     0x86CB, 0x9260, 0x86CD, 0x8C75, 0x86CE, 0x8A61, 0x86D4, 0xE57B,
01380     0x86D9, 0x8A5E, 0x86DB, 0xE581, 0x86DE, 0xE57C, 0x86DF, 0xE580,
01381     0x86E4, 0x94B8, 0x86E9, 0xE57D, 0x86EC, 0xE57E, 0x86ED, 0x9567,
01382     0x86EE, 0x94D8, 0x86EF, 0xE582, 0x86F8, 0x91FB, 0x86F9, 0xE58C,
01383     0x86FB, 0xE588, 0x86FE, 0x89E9, 0x8700, 0xE586, 0x8702, 0x9649,
01384     0x8703, 0xE587, 0x8706, 0xE584, 0x8708, 0xE585, 0x8709, 0xE58A,
01385     0x870A, 0xE58D, 0x870D, 0xE58B, 0x8711, 0xE589, 0x8712, 0xE583,
01386     0x8718, 0x9277, 0x871A, 0xE594, 0x871C, 0x96A8, 0x8725, 0xE592,
01387     0x8729, 0xE593, 0x8734, 0xE58E, 0x8737, 0xE590, 0x873B, 0xE591,
01388     0x873F, 0xE58F, 0x8749, 0x90E4, 0x874B, 0x9858, 0x874C, 0xE598,
01389     0x874E, 0xE599, 0x8753, 0xE59F, 0x8755, 0x9049, 0x8757, 0xE59B,
01390     0x8759, 0xE59E, 0x875F, 0xE596, 0x8760, 0xE595, 0x8763, 0xE5A0,
01391     0x8766, 0x89DA, 0x8768, 0xE59C, 0x876A, 0xE5A1, 0x876E, 0xE59D,
01392     0x8774, 0xE59A, 0x8776, 0x92B1, 0x8778, 0xE597, 0x877F, 0x9488,
01393     0x8782, 0xE5A5, 0x878D, 0x975A, 0x879F, 0xE5A4, 0x87A2, 0xE5A3,
01394     0x87AB, 0xE5AC, 0x87AF, 0xE5A6, 0x87B3, 0xE5AE, 0x87BA, 0x9786,
01395     0x87BB, 0xE5B1, 0x87BD, 0xE5A8, 0x87C0, 0xE5A9, 0x87C4, 0xE5AD,
01396     0x87C6, 0xE5B0, 0x87C7, 0xE5AF, 0x87CB, 0xE5A7, 0x87D0, 0xE5AA,
01397     0x87D2, 0xE5BB, 0x87E0, 0xE5B4, 0x87EF, 0xE5B2, 0x87F2, 0xE5B3,
01398     0x87F6, 0xE5B8, 0x87F7, 0xE5B9, 0x87F9, 0x8A49, 0x87FB, 0x8B61,
01399     0x87FE, 0xE5B7, 0x8805, 0xE5A2, 0x8807, 0xFBA1, 0x880D, 0xE5B6,
01400     0x880E, 0xE5BA, 0x880F, 0xE5B5, 0x8811, 0xE5BC, 0x8815, 0xE5BE,
01401     0x8816, 0xE5BD, 0x8821, 0xE5C0, 0x8822, 0xE5BF, 0x8823, 0xE579,
01402     0x8827, 0xE5C4, 0x8831, 0xE5C1, 0x8836, 0xE5C2, 0x8839, 0xE5C3,
01403     0x883B, 0xE5C5, 0x8840, 0x8C8C, 0x8842, 0xE5C7, 0x8844, 0xE5C6,
01404     0x8846, 0x8F4F, 0x884C, 0x8D73, 0x884D, 0x9FA5, 0x8852, 0xE5C8,
01405     0x8853, 0x8F70, 0x8857, 0x8A58, 0x8859, 0xE5C9, 0x885B, 0x8971,
01406     0x885D, 0x8FD5, 0x885E, 0xE5CA, 0x8861, 0x8D74, 0x8862, 0xE5CB,
01407     0x8863, 0x88DF, 0x8868, 0x955C, 0x886B, 0xE5CC, 0x8870, 0x908A,
01408     0x8872, 0xE5D3, 0x8875, 0xE5D0, 0x8877, 0x928F, 0x887D, 0xE5D1,
01409     0x887E, 0xE5CE, 0x887F, 0x8BDC, 0x8881, 0xE5CD, 0x8882, 0xE5D4,
01410     0x8888, 0x8C55, 0x888B, 0x91DC, 0x888D, 0xE5DA, 0x8892, 0xE5D6,
01411     0x8896, 0x91B3, 0x8897, 0xE5D5, 0x8899, 0xE5D8, 0x889E, 0xE5CF,
01412     0x88A2, 0xE5D9, 0x88A4, 0xE5DB, 0x88AB, 0x94ED, 0x88AE, 0xE5D7,
01413     0x88B0, 0xE5DC, 0x88B1, 0xE5DE, 0x88B4, 0x8CD1, 0x88B5, 0xE5D2,
01414     0x88B7, 0x88BF, 0x88BF, 0xE5DD, 0x88C1, 0x8DD9, 0x88C2, 0x97F4,
01415     0x88C3, 0xE5DF, 0x88C4, 0xE5E0, 0x88C5, 0x9195, 0x88CF, 0x97A0,
01416     0x88D4, 0xE5E1, 0x88D5, 0x9754, 0x88D8, 0xE5E2, 0x88D9, 0xE5E3,
01417     0x88DC, 0x95E2, 0x88DD, 0xE5E4, 0x88DF, 0x8DBE, 0x88E1, 0x97A1,
01418     0x88E8, 0xE5E9, 0x88F2, 0xE5EA, 0x88F3, 0x8FD6, 0x88F4, 0xE5E8,
01419     0x88F5, 0xFBA2, 0x88F8, 0x9787, 0x88F9, 0xE5E5, 0x88FC, 0xE5E7,
01420     0x88FD, 0x90BB, 0x88FE, 0x909E, 0x8902, 0xE5E6, 0x8904, 0xE5EB,
01421     0x8907, 0x95A1, 0x890A, 0xE5ED, 0x890C, 0xE5EC, 0x8910, 0x8A8C,
01422     0x8912, 0x964A, 0x8913, 0xE5EE, 0x891C, 0xFA5D, 0x891D, 0xE5FA,
01423     0x891E, 0xE5F0, 0x8925, 0xE5F1, 0x892A, 0xE5F2, 0x892B, 0xE5F3,
01424     0x8936, 0xE5F7, 0x8938, 0xE5F8, 0x893B, 0xE5F6, 0x8941, 0xE5F4,
01425     0x8943, 0xE5EF, 0x8944, 0xE5F5, 0x894C, 0xE5F9, 0x894D, 0xE8B5,
01426     0x8956, 0x89A6, 0x895E, 0xE5FC, 0x895F, 0x8BDD, 0x8960, 0xE5FB,
01427     0x8964, 0xE641, 0x8966, 0xE640, 0x896A, 0xE643, 0x896D, 0xE642,
01428     0x896F, 0xE644, 0x8972, 0x8F50, 0x8974, 0xE645, 0x8977, 0xE646,
01429     0x897E, 0xE647, 0x897F, 0x90BC, 0x8981, 0x9776, 0x8983, 0xE648,
01430     0x8986, 0x95A2, 0x8987, 0x9465, 0x8988, 0xE649, 0x898A, 0xE64A,
01431     0x898B, 0x8CA9, 0x898F, 0x8B4B, 0x8993, 0xE64B, 0x8996, 0x8E8B,
01432     0x8997, 0x9460, 0x8998, 0xE64C, 0x899A, 0x8A6F, 0x89A1, 0xE64D,
01433     0x89A6, 0xE64F, 0x89A7, 0x9797, 0x89A9, 0xE64E, 0x89AA, 0x9065,
01434     0x89AC, 0xE650, 0x89AF, 0xE651, 0x89B2, 0xE652, 0x89B3, 0x8ACF,
01435     0x89BA, 0xE653, 0x89BD, 0xE654, 0x89BF, 0xE655, 0x89C0, 0xE656,
01436     0x89D2, 0x8A70, 0x89DA, 0xE657, 0x89DC, 0xE658, 0x89DD, 0xE659,
01437     0x89E3, 0x89F0, 0x89E6, 0x9047, 0x89E7, 0xE65A, 0x89F4, 0xE65B,
01438     0x89F8, 0xE65C, 0x8A00, 0x8CBE, 0x8A02, 0x92F9, 0x8A03, 0xE65D,
01439     0x8A08, 0x8C76, 0x8A0A, 0x9075, 0x8A0C, 0xE660, 0x8A0E, 0x93A2,
01440     0x8A10, 0xE65F, 0x8A12, 0xFBA3, 0x8A13, 0x8C50, 0x8A16, 0xE65E,
01441     0x8A17, 0x91F5, 0x8A18, 0x8B4C, 0x8A1B, 0xE661, 0x8A1D, 0xE662,
01442     0x8A1F, 0x8FD7, 0x8A23, 0x8C8D, 0x8A25, 0xE663, 0x8A2A, 0x964B,
01443     0x8A2D, 0x90DD, 0x8A31, 0x8B96, 0x8A33, 0x96F3, 0x8A34, 0x9169,
01444     0x8A36, 0xE664, 0x8A37, 0xFBA4, 0x8A3A, 0x9066, 0x8A3B, 0x9290,
01445     0x8A3C, 0x8FD8, 0x8A41, 0xE665, 0x8A46, 0xE668, 0x8A48, 0xE669,
01446     0x8A50, 0x8DBC, 0x8A51, 0x91C0, 0x8A52, 0xE667, 0x8A54, 0x8FD9,
01447     0x8A55, 0x955D, 0x8A5B, 0xE666, 0x8A5E, 0x8E8C, 0x8A60, 0x8972,
01448     0x8A62, 0xE66D, 0x8A63, 0x8C77, 0x8A66, 0x8E8E, 0x8A69, 0x8E8D,
01449     0x8A6B, 0x986C, 0x8A6C, 0xE66C, 0x8A6D, 0xE66B, 0x8A6E, 0x9146,
01450     0x8A70, 0x8B6C, 0x8A71, 0x9862, 0x8A72, 0x8A59, 0x8A73, 0x8FDA,
01451     0x8A79, 0xFBA5, 0x8A7C, 0xE66A, 0x8A82, 0xE66F, 0x8A84, 0xE670,
01452     0x8A85, 0xE66E, 0x8A87, 0x8CD6, 0x8A89, 0x975F, 0x8A8C, 0x8E8F,
01453     0x8A8D, 0x9446, 0x8A91, 0xE673, 0x8A93, 0x90BE, 0x8A95, 0x9261,
01454     0x8A98, 0x9755, 0x8A9A, 0xE676, 0x8A9E, 0x8CEA, 0x8AA0, 0x90BD,
01455     0x8AA1, 0xE672, 0x8AA3, 0xE677, 0x8AA4, 0x8CEB, 0x8AA5, 0xE674,
01456     0x8AA6, 0xE675, 0x8AA7, 0xFBA6, 0x8AA8, 0xE671, 0x8AAC, 0x90E0,
01457     0x8AAD, 0x93C7, 0x8AB0, 0x924E, 0x8AB2, 0x89DB, 0x8AB9, 0x94EE,
01458     0x8ABC, 0x8B62, 0x8ABE, 0xFBA7, 0x8ABF, 0x92B2, 0x8AC2, 0xE67A,
01459     0x8AC4, 0xE678, 0x8AC7, 0x926B, 0x8ACB, 0x90BF, 0x8ACC, 0x8AD0,
01460     0x8ACD, 0xE679, 0x8ACF, 0x907A, 0x8AD2, 0x97C8, 0x8AD6, 0x985F,
01461     0x8ADA, 0xE67B, 0x8ADB, 0xE687, 0x8ADC, 0x92B3, 0x8ADE, 0xE686,
01462     0x8ADF, 0xFBA8, 0x8AE0, 0xE683, 0x8AE1, 0xE68B, 0x8AE2, 0xE684,
01463     0x8AE4, 0xE680, 0x8AE6, 0x92FA, 0x8AE7, 0xE67E, 0x8AEB, 0xE67C,
01464     0x8AED, 0x9740, 0x8AEE, 0x8E90, 0x8AF1, 0xE681, 0x8AF3, 0xE67D,
01465     0x8AF6, 0xFBAA, 0x8AF7, 0xE685, 0x8AF8, 0x8F94, 0x8AFA, 0x8CBF,
01466     0x8AFE, 0x91F8, 0x8B00, 0x9664, 0x8B01, 0x8979, 0x8B02, 0x88E0,
01467     0x8B04, 0x93A3, 0x8B07, 0xE689, 0x8B0C, 0xE688, 0x8B0E, 0x93E4,
01468     0x8B10, 0xE68D, 0x8B14, 0xE682, 0x8B16, 0xE68C, 0x8B17, 0xE68E,
01469     0x8B19, 0x8CAA, 0x8B1A, 0xE68A, 0x8B1B, 0x8D75, 0x8B1D, 0x8ED3,
01470     0x8B20, 0xE68F, 0x8B21, 0x9777, 0x8B26, 0xE692, 0x8B28, 0xE695,
01471     0x8B2B, 0xE693, 0x8B2C, 0x9554, 0x8B33, 0xE690, 0x8B39, 0x8BDE,
01472     0x8B3E, 0xE694, 0x8B41, 0xE696, 0x8B49, 0xE69A, 0x8B4C, 0xE697,
01473     0x8B4E, 0xE699, 0x8B4F, 0xE698, 0x8B53, 0xFBAB, 0x8B56, 0xE69B,
01474     0x8B58, 0x8EAF, 0x8B5A, 0xE69D, 0x8B5B, 0xE69C, 0x8B5C, 0x9588,
01475     0x8B5F, 0xE69F, 0x8B66, 0x8C78, 0x8B6B, 0xE69E, 0x8B6C, 0xE6A0,
01476     0x8B6F, 0xE6A1, 0x8B70, 0x8B63, 0x8B71, 0xE3BF, 0x8B72, 0x8FF7,
01477     0x8B74, 0xE6A2, 0x8B77, 0x8CEC, 0x8B7D, 0xE6A3, 0x8B7F, 0xFBAC,
01478     0x8B80, 0xE6A4, 0x8B83, 0x8E5D, 0x8B8A, 0x9DCC, 0x8B8C, 0xE6A5,
01479     0x8B8E, 0xE6A6, 0x8B90, 0x8F51, 0x8B92, 0xE6A7, 0x8B93, 0xE6A8,
01480     0x8B96, 0xE6A9, 0x8B99, 0xE6AA, 0x8B9A, 0xE6AB, 0x8C37, 0x924A,
01481     0x8C3A, 0xE6AC, 0x8C3F, 0xE6AE, 0x8C41, 0xE6AD, 0x8C46, 0x93A4,
01482     0x8C48, 0xE6AF, 0x8C4A, 0x964C, 0x8C4C, 0xE6B0, 0x8C4E, 0xE6B1,
01483     0x8C50, 0xE6B2, 0x8C55, 0xE6B3, 0x8C5A, 0x93D8, 0x8C61, 0x8FDB,
01484     0x8C62, 0xE6B4, 0x8C6A, 0x8D8B, 0x8C6B, 0x98AC, 0x8C6C, 0xE6B5,
01485     0x8C78, 0xE6B6, 0x8C79, 0x955E, 0x8C7A, 0xE6B7, 0x8C7C, 0xE6BF,
01486     0x8C82, 0xE6B8, 0x8C85, 0xE6BA, 0x8C89, 0xE6B9, 0x8C8A, 0xE6BB,
01487     0x8C8C, 0x9665, 0x8C8D, 0xE6BC, 0x8C8E, 0xE6BD, 0x8C94, 0xE6BE,
01488     0x8C98, 0xE6C0, 0x8C9D, 0x8A4C, 0x8C9E, 0x92E5, 0x8CA0, 0x9589,
01489     0x8CA1, 0x8DE0, 0x8CA2, 0x8D76, 0x8CA7, 0x956E, 0x8CA8, 0x89DD,
01490     0x8CA9, 0x94CC, 0x8CAA, 0xE6C3, 0x8CAB, 0x8AD1, 0x8CAC, 0x90D3,
01491     0x8CAD, 0xE6C2, 0x8CAE, 0xE6C7, 0x8CAF, 0x9299, 0x8CB0, 0x96E1,
01492     0x8CB2, 0xE6C5, 0x8CB3, 0xE6C6, 0x8CB4, 0x8B4D, 0x8CB6, 0xE6C8,
01493     0x8CB7, 0x9483, 0x8CB8, 0x91DD, 0x8CBB, 0x94EF, 0x8CBC, 0x935C,
01494     0x8CBD, 0xE6C4, 0x8CBF, 0x9666, 0x8CC0, 0x89EA, 0x8CC1, 0xE6CA,
01495     0x8CC2, 0x9847, 0x8CC3, 0x92C0, 0x8CC4, 0x9864, 0x8CC7, 0x8E91,
01496     0x8CC8, 0xE6C9, 0x8CCA, 0x91AF, 0x8CCD, 0xE6DA, 0x8CCE, 0x9147,
01497     0x8CD1, 0x93F6, 0x8CD3, 0x956F, 0x8CDA, 0xE6CD, 0x8CDB, 0x8E5E,
01498     0x8CDC, 0x8E92, 0x8CDE, 0x8FDC, 0x8CE0, 0x9485, 0x8CE2, 0x8CAB,
01499     0x8CE3, 0xE6CC, 0x8CE4, 0xE6CB, 0x8CE6, 0x958A, 0x8CEA, 0x8EBF,
01500     0x8CED, 0x9371, 0x8CF0, 0xFBAD, 0x8CF4, 0xFBAE, 0x8CFA, 0xE6CF,
01501     0x8CFB, 0xE6D0, 0x8CFC, 0x8D77, 0x8CFD, 0xE6CE, 0x8D04, 0xE6D1,
01502     0x8D05, 0xE6D2, 0x8D07, 0xE6D4, 0x8D08, 0x91A1, 0x8D0A, 0xE6D3,
01503     0x8D0B, 0x8AE4, 0x8D0D, 0xE6D6, 0x8D0F, 0xE6D5, 0x8D10, 0xE6D7,
01504     0x8D12, 0xFBAF, 0x8D13, 0xE6D9, 0x8D14, 0xE6DB, 0x8D16, 0xE6DC,
01505     0x8D64, 0x90D4, 0x8D66, 0x8ECD, 0x8D67, 0xE6DD, 0x8D6B, 0x8A71,
01506     0x8D6D, 0xE6DE, 0x8D70, 0x9196, 0x8D71, 0xE6DF, 0x8D73, 0xE6E0,
01507     0x8D74, 0x958B, 0x8D76, 0xFBB0, 0x8D77, 0x8B4E, 0x8D81, 0xE6E1,
01508     0x8D85, 0x92B4, 0x8D8A, 0x897A, 0x8D99, 0xE6E2, 0x8DA3, 0x8EEF,
01509     0x8DA8, 0x9096, 0x8DB3, 0x91AB, 0x8DBA, 0xE6E5, 0x8DBE, 0xE6E4,
01510     0x8DC2, 0xE6E3, 0x8DCB, 0xE6EB, 0x8DCC, 0xE6E9, 0x8DCF, 0xE6E6,
01511     0x8DD6, 0xE6E8, 0x8DDA, 0xE6E7, 0x8DDB, 0xE6EA, 0x8DDD, 0x8B97,
01512     0x8DDF, 0xE6EE, 0x8DE1, 0x90D5, 0x8DE3, 0xE6EF, 0x8DE8, 0x8CD7,
01513     0x8DEA, 0xE6EC, 0x8DEB, 0xE6ED, 0x8DEF, 0x9848, 0x8DF3, 0x92B5,
01514     0x8DF5, 0x9148, 0x8DFC, 0xE6F0, 0x8DFF, 0xE6F3, 0x8E08, 0xE6F1,
01515     0x8E09, 0xE6F2, 0x8E0A, 0x9778, 0x8E0F, 0x93A5, 0x8E10, 0xE6F6,
01516     0x8E1D, 0xE6F4, 0x8E1E, 0xE6F5, 0x8E1F, 0xE6F7, 0x8E2A, 0xE748,
01517     0x8E30, 0xE6FA, 0x8E34, 0xE6FB, 0x8E35, 0xE6F9, 0x8E42, 0xE6F8,
01518     0x8E44, 0x92FB, 0x8E47, 0xE740, 0x8E48, 0xE744, 0x8E49, 0xE741,
01519     0x8E4A, 0xE6FC, 0x8E4C, 0xE742, 0x8E50, 0xE743, 0x8E55, 0xE74A,
01520     0x8E59, 0xE745, 0x8E5F, 0x90D6, 0x8E60, 0xE747, 0x8E63, 0xE749,
01521     0x8E64, 0xE746, 0x8E72, 0xE74C, 0x8E74, 0x8F52, 0x8E76, 0xE74B,
01522     0x8E7C, 0xE74D, 0x8E81, 0xE74E, 0x8E84, 0xE751, 0x8E85, 0xE750,
01523     0x8E87, 0xE74F, 0x8E8A, 0xE753, 0x8E8B, 0xE752, 0x8E8D, 0x96F4,
01524     0x8E91, 0xE755, 0x8E93, 0xE754, 0x8E94, 0xE756, 0x8E99, 0xE757,
01525     0x8EA1, 0xE759, 0x8EAA, 0xE758, 0x8EAB, 0x9067, 0x8EAC, 0xE75A,
01526     0x8EAF, 0x8BEB, 0x8EB0, 0xE75B, 0x8EB1, 0xE75D, 0x8EBE, 0xE75E,
01527     0x8EC5, 0xE75F, 0x8EC6, 0xE75C, 0x8EC8, 0xE760, 0x8ECA, 0x8ED4,
01528     0x8ECB, 0xE761, 0x8ECC, 0x8B4F, 0x8ECD, 0x8C52, 0x8ECF, 0xFBB2,
01529     0x8ED2, 0x8CAC, 0x8EDB, 0xE762, 0x8EDF, 0x93EE, 0x8EE2, 0x935D,
01530     0x8EE3, 0xE763, 0x8EEB, 0xE766, 0x8EF8, 0x8EB2, 0x8EFB, 0xE765,
01531     0x8EFC, 0xE764, 0x8EFD, 0x8C79, 0x8EFE, 0xE767, 0x8F03, 0x8A72,
01532     0x8F05, 0xE769, 0x8F09, 0x8DDA, 0x8F0A, 0xE768, 0x8F0C, 0xE771,
01533     0x8F12, 0xE76B, 0x8F13, 0xE76D, 0x8F14, 0x95E3, 0x8F15, 0xE76A,
01534     0x8F19, 0xE76C, 0x8F1B, 0xE770, 0x8F1C, 0xE76E, 0x8F1D, 0x8B50,
01535     0x8F1F, 0xE76F, 0x8F26, 0xE772, 0x8F29, 0x9479, 0x8F2A, 0x97D6,
01536     0x8F2F, 0x8F53, 0x8F33, 0xE773, 0x8F38, 0x9741, 0x8F39, 0xE775,
01537     0x8F3B, 0xE774, 0x8F3E, 0xE778, 0x8F3F, 0x9760, 0x8F42, 0xE777,
01538     0x8F44, 0x8A8D, 0x8F45, 0xE776, 0x8F46, 0xE77B, 0x8F49, 0xE77A,
01539     0x8F4C, 0xE779, 0x8F4D, 0x9351, 0x8F4E, 0xE77C, 0x8F57, 0xE77D,
01540     0x8F5C, 0xE77E, 0x8F5F, 0x8D8C, 0x8F61, 0x8C44, 0x8F62, 0xE780,
01541     0x8F63, 0xE781, 0x8F64, 0xE782, 0x8F9B, 0x9068, 0x8F9C, 0xE783,
01542     0x8F9E, 0x8EAB, 0x8F9F, 0xE784, 0x8FA3, 0xE785, 0x8FA7, 0x999F,
01543     0x8FA8, 0x999E, 0x8FAD, 0xE786, 0x8FAE, 0xE390, 0x8FAF, 0xE787,
01544     0x8FB0, 0x9243, 0x8FB1, 0x904A, 0x8FB2, 0x945F, 0x8FB7, 0xE788,
01545     0x8FBA, 0x95D3, 0x8FBB, 0x92D2, 0x8FBC, 0x8D9E, 0x8FBF, 0x9248,
01546     0x8FC2, 0x8949, 0x8FC4, 0x9698, 0x8FC5, 0x9076, 0x8FCE, 0x8C7D,
01547     0x8FD1, 0x8BDF, 0x8FD4, 0x95D4, 0x8FDA, 0xE789, 0x8FE2, 0xE78B,
01548     0x8FE5, 0xE78A, 0x8FE6, 0x89DE, 0x8FE9, 0x93F4, 0x8FEA, 0xE78C,
01549     0x8FEB, 0x9497, 0x8FED, 0x9352, 0x8FEF, 0xE78D, 0x8FF0, 0x8F71,
01550     0x8FF4, 0xE78F, 0x8FF7, 0x96C0, 0x8FF8, 0xE79E, 0x8FF9, 0xE791,
01551     0x8FFA, 0xE792, 0x8FFD, 0x92C7, 0x9000, 0x91DE, 0x9001, 0x9197,
01552     0x9003, 0x93A6, 0x9005, 0xE790, 0x9006, 0x8B74, 0x900B, 0xE799,
01553     0x900D, 0xE796, 0x900E, 0xE7A3, 0x900F, 0x93A7, 0x9010, 0x9280,
01554     0x9011, 0xE793, 0x9013, 0x92FC, 0x9014, 0x9372, 0x9015, 0xE794,
01555     0x9016, 0xE798, 0x9017, 0x9080, 0x9019, 0x9487, 0x901A, 0x92CA,
01556     0x901D, 0x90C0, 0x901E, 0xE797, 0x901F, 0x91AC, 0x9020, 0x91A2,
01557     0x9021, 0xE795, 0x9022, 0x88A7, 0x9023, 0x9841, 0x9027, 0xE79A,
01558     0x902E, 0x91DF, 0x9031, 0x8F54, 0x9032, 0x9069, 0x9035, 0xE79C,
01559     0x9036, 0xE79B, 0x9038, 0x88ED, 0x9039, 0xE79D, 0x903C, 0x954E,
01560     0x903E, 0xE7A5, 0x9041, 0x93D9, 0x9042, 0x908B, 0x9045, 0x9278,
01561     0x9047, 0x8BF6, 0x9049, 0xE7A4, 0x904A, 0x9756, 0x904B, 0x895E,
01562     0x904D, 0x95D5, 0x904E, 0x89DF, 0x904F, 0xE79F, 0x9050, 0xE7A0,
01563     0x9051, 0xE7A1, 0x9052, 0xE7A2, 0x9053, 0x93B9, 0x9054, 0x9242,
01564     0x9055, 0x88E1, 0x9056, 0xE7A6, 0x9058, 0xE7A7, 0x9059, 0xEAA1,
01565     0x905C, 0x91BB, 0x905E, 0xE7A8, 0x9060, 0x8993, 0x9061, 0x916B,
01566     0x9063, 0x8CAD, 0x9065, 0x9779, 0x9067, 0xFBB5, 0x9068, 0xE7A9,
01567     0x9069, 0x934B, 0x906D, 0x9198, 0x906E, 0x8ED5, 0x906F, 0xE7AA,
01568     0x9072, 0xE7AD, 0x9075, 0x8F85, 0x9076, 0xE7AB, 0x9077, 0x914A,
01569     0x9078, 0x9149, 0x907A, 0x88E2, 0x907C, 0x97C9, 0x907D, 0xE7AF,
01570     0x907F, 0x94F0, 0x9080, 0xE7B1, 0x9081, 0xE7B0, 0x9082, 0xE7AE,
01571     0x9083, 0xE284, 0x9084, 0x8AD2, 0x9087, 0xE78E, 0x9089, 0xE7B3,
01572     0x908A, 0xE7B2, 0x908F, 0xE7B4, 0x9091, 0x9757, 0x90A3, 0x93DF,
01573     0x90A6, 0x964D, 0x90A8, 0xE7B5, 0x90AA, 0x8ED7, 0x90AF, 0xE7B6,
01574     0x90B1, 0xE7B7, 0x90B5, 0xE7B8, 0x90B8, 0x9340, 0x90C1, 0x88E8,
01575     0x90CA, 0x8D78, 0x90CE, 0x9859, 0x90DB, 0xE7BC, 0x90DE, 0xFBB6,
01576     0x90E1, 0x8C53, 0x90E2, 0xE7B9, 0x90E4, 0xE7BA, 0x90E8, 0x9594,
01577     0x90ED, 0x8A73, 0x90F5, 0x9758, 0x90F7, 0x8BBD, 0x90FD, 0x9373,
01578     0x9102, 0xE7BD, 0x9112, 0xE7BE, 0x9115, 0xFBB8, 0x9119, 0xE7BF,
01579     0x9127, 0xFBB9, 0x912D, 0x9341, 0x9130, 0xE7C1, 0x9132, 0xE7C0,
01580     0x9149, 0x93D1, 0x914A, 0xE7C2, 0x914B, 0x8F55, 0x914C, 0x8EDE,
01581     0x914D, 0x947A, 0x914E, 0x9291, 0x9152, 0x8EF0, 0x9154, 0x908C,
01582     0x9156, 0xE7C3, 0x9158, 0xE7C4, 0x9162, 0x907C, 0x9163, 0xE7C5,
01583     0x9165, 0xE7C6, 0x9169, 0xE7C7, 0x916A, 0x978F, 0x916C, 0x8F56,
01584     0x9172, 0xE7C9, 0x9173, 0xE7C8, 0x9175, 0x8D79, 0x9177, 0x8D93,
01585     0x9178, 0x8E5F, 0x9182, 0xE7CC, 0x9187, 0x8F86, 0x9189, 0xE7CB,
01586     0x918B, 0xE7CA, 0x918D, 0x91E7, 0x9190, 0x8CED, 0x9192, 0x90C1,
01587     0x9197, 0x94AE, 0x919C, 0x8F58, 0x91A2, 0xE7CD, 0x91A4, 0x8FDD,
01588     0x91AA, 0xE7D0, 0x91AB, 0xE7CE, 0x91AF, 0xE7CF, 0x91B4, 0xE7D2,
01589     0x91B5, 0xE7D1, 0x91B8, 0x8FF8, 0x91BA, 0xE7D3, 0x91C0, 0xE7D4,
01590     0x91C1, 0xE7D5, 0x91C6, 0x94CE, 0x91C7, 0x8DD1, 0x91C8, 0x8EDF,
01591     0x91C9, 0xE7D6, 0x91CB, 0xE7D7, 0x91CC, 0x97A2, 0x91CD, 0x8F64,
01592     0x91CE, 0x96EC, 0x91CF, 0x97CA, 0x91D0, 0xE7D8, 0x91D1, 0x8BE0,
01593     0x91D6, 0xE7D9, 0x91D7, 0xFBBB, 0x91D8, 0x9342, 0x91DA, 0xFBBA,
01594     0x91DB, 0xE7DC, 0x91DC, 0x8A98, 0x91DD, 0x906A, 0x91DE, 0xFBBC,
01595     0x91DF, 0xE7DA, 0x91E1, 0xE7DB, 0x91E3, 0x92DE, 0x91E4, 0xFBBF,
01596     0x91E5, 0xFBC0, 0x91E6, 0x9674, 0x91E7, 0x8BFA, 0x91ED, 0xFBBD,
01597     0x91EE, 0xFBBE, 0x91F5, 0xE7DE, 0x91F6, 0xE7DF, 0x91FC, 0xE7DD,
01598     0x91FF, 0xE7E1, 0x9206, 0xFBC1, 0x920A, 0xFBC3, 0x920D, 0x93DD,
01599     0x920E, 0x8A62, 0x9210, 0xFBC2, 0x9211, 0xE7E5, 0x9214, 0xE7E2,
01600     0x9215, 0xE7E4, 0x921E, 0xE7E0, 0x9229, 0xE86E, 0x922C, 0xE7E3,
01601     0x9234, 0x97E9, 0x9237, 0x8CD8, 0x9239, 0xFBCA, 0x923A, 0xFBC4,
01602     0x923C, 0xFBC6, 0x923F, 0xE7ED, 0x9240, 0xFBC5, 0x9244, 0x9353,
01603     0x9245, 0xE7E8, 0x9248, 0xE7EB, 0x9249, 0xE7E9, 0x924B, 0xE7EE,
01604     0x924E, 0xFBC7, 0x9250, 0xE7EF, 0x9251, 0xFBC9, 0x9257, 0xE7E7,
01605     0x9259, 0xFBC8, 0x925A, 0xE7F4, 0x925B, 0x8994, 0x925E, 0xE7E6,
01606     0x9262, 0x94AB, 0x9264, 0xE7EA, 0x9266, 0x8FDE, 0x9267, 0xFBCB,
01607     0x9271, 0x8D7A, 0x9277, 0xFBCD, 0x9278, 0xFBCE, 0x927E, 0x9667,
01608     0x9280, 0x8BE2, 0x9283, 0x8F65, 0x9285, 0x93BA, 0x9288, 0xFA5F,
01609     0x9291, 0x914C, 0x9293, 0xE7F2, 0x9295, 0xE7EC, 0x9296, 0xE7F1,
01610     0x9298, 0x96C1, 0x929A, 0x92B6, 0x929B, 0xE7F3, 0x929C, 0xE7F0,
01611     0x92A7, 0xFBCC, 0x92AD, 0x914B, 0x92B7, 0xE7F7, 0x92B9, 0xE7F6,
01612     0x92CF, 0xE7F5, 0x92D0, 0xFBD2, 0x92D2, 0x964E, 0x92D3, 0xFBD6,
01613     0x92D5, 0xFBD4, 0x92D7, 0xFBD0, 0x92D9, 0xFBD1, 0x92E0, 0xFBD5,
01614     0x92E4, 0x8F9B, 0x92E7, 0xFBCF, 0x92E9, 0xE7F8, 0x92EA, 0x95DD,
01615     0x92ED, 0x8973, 0x92F2, 0x9565, 0x92F3, 0x9292, 0x92F8, 0x8B98,
01616     0x92F9, 0xFA65, 0x92FA, 0xE7FA, 0x92FB, 0xFBD9, 0x92FC, 0x8D7C,
01617     0x92FF, 0xFBDC, 0x9302, 0xFBDE, 0x9306, 0x8E4B, 0x930F, 0xE7F9,
01618     0x9310, 0x908D, 0x9318, 0x908E, 0x9319, 0xE840, 0x931A, 0xE842,
01619     0x931D, 0xFBDD, 0x931E, 0xFBDB, 0x9320, 0x8FF9, 0x9321, 0xFBD8,
01620     0x9322, 0xE841, 0x9323, 0xE843, 0x9325, 0xFBD7, 0x9326, 0x8BD1,
01621     0x9328, 0x9564, 0x932B, 0x8EE0, 0x932C, 0x9842, 0x932E, 0xE7FC,
01622     0x932F, 0x8DF6, 0x9332, 0x985E, 0x9335, 0xE845, 0x933A, 0xE844,
01623     0x933B, 0xE846, 0x9344, 0xE7FB, 0x9348, 0xFA5E, 0x934B, 0x93E7,
01624     0x934D, 0x9374, 0x9354, 0x92D5, 0x9356, 0xE84B, 0x9357, 0xFBE0,
01625     0x935B, 0x9262, 0x935C, 0xE847, 0x9360, 0xE848, 0x936C, 0x8C4C,
01626     0x936E, 0xE84A, 0x9370, 0xFBDF, 0x9375, 0x8CAE, 0x937C, 0xE849,
01627     0x937E, 0x8FDF, 0x938C, 0x8A99, 0x9394, 0xE84F, 0x9396, 0x8DBD,
01628     0x9397, 0x9199, 0x939A, 0x92C8, 0x93A4, 0xFBE1, 0x93A7, 0x8A5A,
01629     0x93AC, 0xE84D, 0x93AD, 0xE84E, 0x93AE, 0x92C1, 0x93B0, 0xE84C,
01630     0x93B9, 0xE850, 0x93C3, 0xE856, 0x93C6, 0xFBE2, 0x93C8, 0xE859,
01631     0x93D0, 0xE858, 0x93D1, 0x934C, 0x93D6, 0xE851, 0x93D7, 0xE852,
01632     0x93D8, 0xE855, 0x93DD, 0xE857, 0x93DE, 0xFBE3, 0x93E1, 0x8BBE,
01633     0x93E4, 0xE85A, 0x93E5, 0xE854, 0x93E8, 0xE853, 0x93F8, 0xFBE4,
01634     0x9403, 0xE85E, 0x9407, 0xE85F, 0x9410, 0xE860, 0x9413, 0xE85D,
01635     0x9414, 0xE85C, 0x9418, 0x8FE0, 0x9419, 0x93A8, 0x941A, 0xE85B,
01636     0x9421, 0xE864, 0x942B, 0xE862, 0x9431, 0xFBE5, 0x9435, 0xE863,
01637     0x9436, 0xE861, 0x9438, 0x91F6, 0x943A, 0xE865, 0x9441, 0xE866,
01638     0x9444, 0xE868, 0x9445, 0xFBE6, 0x9448, 0xFBE7, 0x9451, 0x8AD3,
01639     0x9452, 0xE867, 0x9453, 0x96F8, 0x945A, 0xE873, 0x945B, 0xE869,
01640     0x945E, 0xE86C, 0x9460, 0xE86A, 0x9462, 0xE86B, 0x946A, 0xE86D,
01641     0x9470, 0xE86F, 0x9475, 0xE870, 0x9477, 0xE871, 0x947C, 0xE874,
01642     0x947D, 0xE872, 0x947E, 0xE875, 0x947F, 0xE877, 0x9481, 0xE876,
01643     0x9577, 0x92B7, 0x9580, 0x96E5, 0x9582, 0xE878, 0x9583, 0x914D,
01644     0x9587, 0xE879, 0x9589, 0x95C2, 0x958A, 0xE87A, 0x958B, 0x8A4A,
01645     0x958F, 0x895B, 0x9591, 0x8AD5, 0x9592, 0xFBE8, 0x9593, 0x8AD4,
01646     0x9594, 0xE87B, 0x9596, 0xE87C, 0x9598, 0xE87D, 0x9599, 0xE87E,
01647     0x95A0, 0xE880, 0x95A2, 0x8AD6, 0x95A3, 0x8A74, 0x95A4, 0x8D7D,
01648     0x95A5, 0x94B4, 0x95A7, 0xE882, 0x95A8, 0xE881, 0x95AD, 0xE883,
01649     0x95B2, 0x897B, 0x95B9, 0xE886, 0x95BB, 0xE885, 0x95BC, 0xE884,
01650     0x95BE, 0xE887, 0x95C3, 0xE88A, 0x95C7, 0x88C5, 0x95CA, 0xE888,
01651     0x95CC, 0xE88C, 0x95CD, 0xE88B, 0x95D4, 0xE88E, 0x95D5, 0xE88D,
01652     0x95D6, 0xE88F, 0x95D8, 0x93AC, 0x95DC, 0xE890, 0x95E1, 0xE891,
01653     0x95E2, 0xE893, 0x95E5, 0xE892, 0x961C, 0x958C, 0x9621, 0xE894,
01654     0x9628, 0xE895, 0x962A, 0x8DE3, 0x962E, 0xE896, 0x962F, 0xE897,
01655     0x9632, 0x9668, 0x963B, 0x916A, 0x963F, 0x88A2, 0x9640, 0x91C9,
01656     0x9642, 0xE898, 0x9644, 0x958D, 0x964B, 0xE89B, 0x964C, 0xE899,
01657     0x964D, 0x8D7E, 0x964F, 0xE89A, 0x9650, 0x8CC0, 0x965B, 0x95C3,
01658     0x965C, 0xE89D, 0x965D, 0xE89F, 0x965E, 0xE89E, 0x965F, 0xE8A0,
01659     0x9662, 0x8940, 0x9663, 0x9077, 0x9664, 0x8F9C, 0x9665, 0x8AD7,
01660     0x9666, 0xE8A1, 0x966A, 0x9486, 0x966C, 0xE8A3, 0x9670, 0x8941,
01661     0x9672, 0xE8A2, 0x9673, 0x92C2, 0x9675, 0x97CB, 0x9676, 0x93A9,
01662     0x9677, 0xE89C, 0x9678, 0x97A4, 0x967A, 0x8CAF, 0x967D, 0x977A,
01663     0x9685, 0x8BF7, 0x9686, 0x97B2, 0x9688, 0x8C47, 0x968A, 0x91E0,
01664     0x968B, 0xE440, 0x968D, 0xE8A4, 0x968E, 0x8A4B, 0x968F, 0x908F,
01665     0x9694, 0x8A75, 0x9695, 0xE8A6, 0x9697, 0xE8A7, 0x9698, 0xE8A5,
01666     0x9699, 0x8C84, 0x969B, 0x8DDB, 0x969C, 0x8FE1, 0x969D, 0xFBEB,
01667     0x96A0, 0x8942, 0x96A3, 0x97D7, 0x96A7, 0xE8A9, 0x96A8, 0xE7AC,
01668     0x96AA, 0xE8A8, 0x96AF, 0xFBEC, 0x96B0, 0xE8AC, 0x96B1, 0xE8AA,
01669     0x96B2, 0xE8AB, 0x96B4, 0xE8AD, 0x96B6, 0xE8AE, 0x96B7, 0x97EA,
01670     0x96B8, 0xE8AF, 0x96B9, 0xE8B0, 0x96BB, 0x90C7, 0x96BC, 0x94B9,
01671     0x96C0, 0x909D, 0x96C1, 0x8AE5, 0x96C4, 0x9759, 0x96C5, 0x89EB,
01672     0x96C6, 0x8F57, 0x96C7, 0x8CD9, 0x96C9, 0xE8B3, 0x96CB, 0xE8B2,
01673     0x96CC, 0x8E93, 0x96CD, 0xE8B4, 0x96CE, 0xE8B1, 0x96D1, 0x8E47,
01674     0x96D5, 0xE8B8, 0x96D6, 0xE5AB, 0x96D9, 0x99D4, 0x96DB, 0x9097,
01675     0x96DC, 0xE8B6, 0x96E2, 0x97A3, 0x96E3, 0x93EF, 0x96E8, 0x894A,
01676     0x96EA, 0x90E1, 0x96EB, 0x8EB4, 0x96F0, 0x95B5, 0x96F2, 0x895F,
01677     0x96F6, 0x97EB, 0x96F7, 0x978B, 0x96F9, 0xE8B9, 0x96FB, 0x9364,
01678     0x9700, 0x8EF9, 0x9704, 0xE8BA, 0x9706, 0xE8BB, 0x9707, 0x906B,
01679     0x9708, 0xE8BC, 0x970A, 0x97EC, 0x970D, 0xE8B7, 0x970E, 0xE8BE,
01680     0x970F, 0xE8C0, 0x9711, 0xE8BF, 0x9713, 0xE8BD, 0x9716, 0xE8C1,
01681     0x9719, 0xE8C2, 0x971C, 0x919A, 0x971E, 0x89E0, 0x9724, 0xE8C3,
01682     0x9727, 0x96B6, 0x972A, 0xE8C4, 0x9730, 0xE8C5, 0x9732, 0x9849,
01683     0x9733, 0xFBED, 0x9738, 0x9E50, 0x9739, 0xE8C6, 0x973B, 0xFBEE,
01684     0x973D, 0xE8C7, 0x973E, 0xE8C8, 0x9742, 0xE8CC, 0x9743, 0xFBEF,
01685     0x9744, 0xE8C9, 0x9746, 0xE8CA, 0x9748, 0xE8CB, 0x9749, 0xE8CD,
01686     0x974D, 0xFBF0, 0x974F, 0xFBF1, 0x9751, 0xFBF2, 0x9752, 0x90C2,
01687     0x9755, 0xFBF3, 0x9756, 0x96F5, 0x9759, 0x90C3, 0x975C, 0xE8CE,
01688     0x975E, 0x94F1, 0x9760, 0xE8CF, 0x9761, 0xEA72, 0x9762, 0x96CA,
01689     0x9764, 0xE8D0, 0x9766, 0xE8D1, 0x9768, 0xE8D2, 0x9769, 0x8A76,
01690     0x976B, 0xE8D4, 0x976D, 0x9078, 0x9771, 0xE8D5, 0x9774, 0x8C43,
01691     0x9779, 0xE8D6, 0x977A, 0xE8DA, 0x977C, 0xE8D8, 0x9781, 0xE8D9,
01692     0x9784, 0x8A93, 0x9785, 0xE8D7, 0x9786, 0xE8DB, 0x978B, 0xE8DC,
01693     0x978D, 0x88C6, 0x978F, 0xE8DD, 0x9790, 0xE8DE, 0x9798, 0x8FE2,
01694     0x979C, 0xE8DF, 0x97A0, 0x8B66, 0x97A3, 0xE8E2, 0x97A6, 0xE8E1,
01695     0x97A8, 0xE8E0, 0x97AB, 0xE691, 0x97AD, 0x95DA, 0x97B3, 0xE8E3,
01696     0x97B4, 0xE8E4, 0x97C3, 0xE8E5, 0x97C6, 0xE8E6, 0x97C8, 0xE8E7,
01697     0x97CB, 0xE8E8, 0x97D3, 0x8AD8, 0x97DC, 0xE8E9, 0x97ED, 0xE8EA,
01698     0x97EE, 0x9442, 0x97F2, 0xE8EC, 0x97F3, 0x89B9, 0x97F5, 0xE8EF,
01699     0x97F6, 0xE8EE, 0x97FB, 0x8943, 0x97FF, 0x8BBF, 0x9801, 0x95C5,
01700     0x9802, 0x92B8, 0x9803, 0x8DA0, 0x9805, 0x8D80, 0x9806, 0x8F87,
01701     0x9808, 0x907B, 0x980C, 0xE8F1, 0x980F, 0xE8F0, 0x9810, 0x9761,
01702     0x9811, 0x8AE6, 0x9812, 0x94D0, 0x9813, 0x93DA, 0x9817, 0x909C,
01703     0x9818, 0x97CC, 0x981A, 0x8C7A, 0x9821, 0xE8F4, 0x9824, 0xE8F3,
01704     0x982C, 0x966A, 0x982D, 0x93AA, 0x9834, 0x896F, 0x9837, 0xE8F5,
01705     0x9838, 0xE8F2, 0x983B, 0x9570, 0x983C, 0x978A, 0x983D, 0xE8F6,
01706     0x9846, 0xE8F7, 0x984B, 0xE8F9, 0x984C, 0x91E8, 0x984D, 0x8A7A,
01707     0x984E, 0x8A7B, 0x984F, 0xE8F8, 0x9854, 0x8AE7, 0x9855, 0x8CB0,
01708     0x9857, 0xFBF4, 0x9858, 0x8AE8, 0x985B, 0x935E, 0x985E, 0x97DE,
01709     0x9865, 0xFBF5, 0x9867, 0x8CDA, 0x986B, 0xE8FA, 0x986F, 0xE8FB,
01710     0x9870, 0xE8FC, 0x9871, 0xE940, 0x9873, 0xE942, 0x9874, 0xE941,
01711     0x98A8, 0x9597, 0x98AA, 0xE943, 0x98AF, 0xE944, 0x98B1, 0xE945,
01712     0x98B6, 0xE946, 0x98C3, 0xE948, 0x98C4, 0xE947, 0x98C6, 0xE949,
01713     0x98DB, 0x94F2, 0x98DC, 0xE3CA, 0x98DF, 0x9048, 0x98E2, 0x8B51,
01714     0x98E9, 0xE94A, 0x98EB, 0xE94B, 0x98ED, 0x99AA, 0x98EE, 0x9F5A,
01715     0x98EF, 0x94D1, 0x98F2, 0x88F9, 0x98F4, 0x88B9, 0x98FC, 0x8E94,
01716     0x98FD, 0x964F, 0x98FE, 0x8FFC, 0x9903, 0xE94C, 0x9905, 0x96DD,
01717     0x9909, 0xE94D, 0x990A, 0x977B, 0x990C, 0x8961, 0x9910, 0x8E60,
01718     0x9912, 0xE94E, 0x9913, 0x89EC, 0x9914, 0xE94F, 0x9918, 0xE950,
01719     0x991D, 0xE952, 0x991E, 0xE953, 0x9920, 0xE955, 0x9921, 0xE951,
01720     0x9924, 0xE954, 0x9927, 0xFBF8, 0x9928, 0x8AD9, 0x992C, 0xE956,
01721     0x992E, 0xE957, 0x993D, 0xE958, 0x993E, 0xE959, 0x9942, 0xE95A,
01722     0x9945, 0xE95C, 0x9949, 0xE95B, 0x994B, 0xE95E, 0x994C, 0xE961,
01723     0x9950, 0xE95D, 0x9951, 0xE95F, 0x9952, 0xE960, 0x9955, 0xE962,
01724     0x9957, 0x8BC0, 0x9996, 0x8EF1, 0x9997, 0xE963, 0x9998, 0xE964,
01725     0x9999, 0x8D81, 0x999E, 0xFBFA, 0x99A5, 0xE965, 0x99A8, 0x8A5D,
01726     0x99AC, 0x946E, 0x99AD, 0xE966, 0x99AE, 0xE967, 0x99B3, 0x9279,
01727     0x99B4, 0x93E9, 0x99BC, 0xE968, 0x99C1, 0x949D, 0x99C4, 0x91CA,
01728     0x99C5, 0x8977, 0x99C6, 0x8BEC, 0x99C8, 0x8BED, 0x99D0, 0x9293,
01729     0x99D1, 0xE96D, 0x99D2, 0x8BEE, 0x99D5, 0x89ED, 0x99D8, 0xE96C,
01730     0x99DB, 0xE96A, 0x99DD, 0xE96B, 0x99DF, 0xE969, 0x99E2, 0xE977,
01731     0x99ED, 0xE96E, 0x99EE, 0xE96F, 0x99F1, 0xE970, 0x99F2, 0xE971,
01732     0x99F8, 0xE973, 0x99FB, 0xE972, 0x99FF, 0x8F78, 0x9A01, 0xE974,
01733     0x9A05, 0xE976, 0x9A0E, 0x8B52, 0x9A0F, 0xE975, 0x9A12, 0x919B,
01734     0x9A13, 0x8CB1, 0x9A19, 0xE978, 0x9A28, 0x91CB, 0x9A2B, 0xE979,
01735     0x9A30, 0x93AB, 0x9A37, 0xE97A, 0x9A3E, 0xE980, 0x9A40, 0xE97D,
01736     0x9A42, 0xE97C, 0x9A43, 0xE97E, 0x9A45, 0xE97B, 0x9A4D, 0xE982,
01737     0x9A4E, 0xFBFB, 0x9A55, 0xE981, 0x9A57, 0xE984, 0x9A5A, 0x8BC1,
01738     0x9A5B, 0xE983, 0x9A5F, 0xE985, 0x9A62, 0xE986, 0x9A64, 0xE988,
01739     0x9A65, 0xE987, 0x9A69, 0xE989, 0x9A6A, 0xE98B, 0x9A6B, 0xE98A,
01740     0x9AA8, 0x8D9C, 0x9AAD, 0xE98C, 0x9AB0, 0xE98D, 0x9AB8, 0x8A5B,
01741     0x9ABC, 0xE98E, 0x9AC0, 0xE98F, 0x9AC4, 0x9091, 0x9ACF, 0xE990,
01742     0x9AD1, 0xE991, 0x9AD3, 0xE992, 0x9AD4, 0xE993, 0x9AD8, 0x8D82,
01743     0x9AD9, 0xFBFC, 0x9ADC, 0xFC40, 0x9ADE, 0xE994, 0x9ADF, 0xE995,
01744     0x9AE2, 0xE996, 0x9AE3, 0xE997, 0x9AE6, 0xE998, 0x9AEA, 0x94AF,
01745     0x9AEB, 0xE99A, 0x9AED, 0x9545, 0x9AEE, 0xE99B, 0x9AEF, 0xE999,
01746     0x9AF1, 0xE99D, 0x9AF4, 0xE99C, 0x9AF7, 0xE99E, 0x9AFB, 0xE99F,
01747     0x9B06, 0xE9A0, 0x9B18, 0xE9A1, 0x9B1A, 0xE9A2, 0x9B1F, 0xE9A3,
01748     0x9B22, 0xE9A4, 0x9B23, 0xE9A5, 0x9B25, 0xE9A6, 0x9B27, 0xE9A7,
01749     0x9B28, 0xE9A8, 0x9B29, 0xE9A9, 0x9B2A, 0xE9AA, 0x9B2E, 0xE9AB,
01750     0x9B2F, 0xE9AC, 0x9B31, 0x9F54, 0x9B32, 0xE9AD, 0x9B3B, 0xE2F6,
01751     0x9B3C, 0x8B53, 0x9B41, 0x8A40, 0x9B42, 0x8DB0, 0x9B43, 0xE9AF,
01752     0x9B44, 0xE9AE, 0x9B45, 0x96A3, 0x9B4D, 0xE9B1, 0x9B4E, 0xE9B2,
01753     0x9B4F, 0xE9B0, 0x9B51, 0xE9B3, 0x9B54, 0x9682, 0x9B58, 0xE9B4,
01754     0x9B5A, 0x8B9B, 0x9B6F, 0x9844, 0x9B72, 0xFC42, 0x9B74, 0xE9B5,
01755     0x9B75, 0xFC41, 0x9B83, 0xE9B7, 0x9B8E, 0x88BC, 0x9B8F, 0xFC43,
01756     0x9B91, 0xE9B8, 0x9B92, 0x95A9, 0x9B93, 0xE9B6, 0x9B96, 0xE9B9,
01757     0x9B97, 0xE9BA, 0x9B9F, 0xE9BB, 0x9BA0, 0xE9BC, 0x9BA8, 0xE9BD,
01758     0x9BAA, 0x968E, 0x9BAB, 0x8E4C, 0x9BAD, 0x8DF8, 0x9BAE, 0x914E,
01759     0x9BB1, 0xFC44, 0x9BB4, 0xE9BE, 0x9BB9, 0xE9C1, 0x9BBB, 0xFC45,
01760     0x9BC0, 0xE9BF, 0x9BC6, 0xE9C2, 0x9BC9, 0x8CEF, 0x9BCA, 0xE9C0,
01761     0x9BCF, 0xE9C3, 0x9BD1, 0xE9C4, 0x9BD2, 0xE9C5, 0x9BD4, 0xE9C9,
01762     0x9BD6, 0x8E49, 0x9BDB, 0x91E2, 0x9BE1, 0xE9CA, 0x9BE2, 0xE9C7,
01763     0x9BE3, 0xE9C6, 0x9BE4, 0xE9C8, 0x9BE8, 0x8C7E, 0x9BF0, 0xE9CE,
01764     0x9BF1, 0xE9CD, 0x9BF2, 0xE9CC, 0x9BF5, 0x88B1, 0x9C00, 0xFC46,
01765     0x9C04, 0xE9D8, 0x9C06, 0xE9D4, 0x9C08, 0xE9D5, 0x9C09, 0xE9D1,
01766     0x9C0A, 0xE9D7, 0x9C0C, 0xE9D3, 0x9C0D, 0x8A82, 0x9C10, 0x986B,
01767     0x9C12, 0xE9D6, 0x9C13, 0xE9D2, 0x9C14, 0xE9D0, 0x9C15, 0xE9CF,
01768     0x9C1B, 0xE9DA, 0x9C21, 0xE9DD, 0x9C24, 0xE9DC, 0x9C25, 0xE9DB,
01769     0x9C2D, 0x9568, 0x9C2E, 0xE9D9, 0x9C2F, 0x88F1, 0x9C30, 0xE9DE,
01770     0x9C32, 0xE9E0, 0x9C39, 0x8A8F, 0x9C3A, 0xE9CB, 0x9C3B, 0x8956,
01771     0x9C3E, 0xE9E2, 0x9C46, 0xE9E1, 0x9C47, 0xE9DF, 0x9C48, 0x924C,
01772     0x9C52, 0x9690, 0x9C57, 0x97D8, 0x9C5A, 0xE9E3, 0x9C60, 0xE9E4,
01773     0x9C67, 0xE9E5, 0x9C76, 0xE9E6, 0x9C78, 0xE9E7, 0x9CE5, 0x92B9,
01774     0x9CE7, 0xE9E8, 0x9CE9, 0x94B5, 0x9CEB, 0xE9ED, 0x9CEC, 0xE9E9,
01775     0x9CF0, 0xE9EA, 0x9CF3, 0x9650, 0x9CF4, 0x96C2, 0x9CF6, 0x93CE,
01776     0x9D03, 0xE9EE, 0x9D06, 0xE9EF, 0x9D07, 0x93BC, 0x9D08, 0xE9EC,
01777     0x9D09, 0xE9EB, 0x9D0E, 0x89A8, 0x9D12, 0xE9F7, 0x9D15, 0xE9F6,
01778     0x9D1B, 0x8995, 0x9D1F, 0xE9F4, 0x9D23, 0xE9F3, 0x9D26, 0xE9F1,
01779     0x9D28, 0x8A9B, 0x9D2A, 0xE9F0, 0x9D2B, 0x8EB0, 0x9D2C, 0x89A7,
01780     0x9D3B, 0x8D83, 0x9D3E, 0xE9FA, 0x9D3F, 0xE9F9, 0x9D41, 0xE9F8,
01781     0x9D44, 0xE9F5, 0x9D46, 0xE9FB, 0x9D48, 0xE9FC, 0x9D50, 0xEA44,
01782     0x9D51, 0xEA43, 0x9D59, 0xEA45, 0x9D5C, 0x894C, 0x9D5D, 0xEA40,
01783     0x9D5E, 0xEA41, 0x9D60, 0x8D94, 0x9D61, 0x96B7, 0x9D64, 0xEA42,
01784     0x9D6B, 0xFC48, 0x9D6C, 0x9651, 0x9D6F, 0xEA4A, 0x9D70, 0xFC47,
01785     0x9D72, 0xEA46, 0x9D7A, 0xEA4B, 0x9D87, 0xEA48, 0x9D89, 0xEA47,
01786     0x9D8F, 0x8C7B, 0x9D9A, 0xEA4C, 0x9DA4, 0xEA4D, 0x9DA9, 0xEA4E,
01787     0x9DAB, 0xEA49, 0x9DAF, 0xE9F2, 0x9DB2, 0xEA4F, 0x9DB4, 0x92DF,
01788     0x9DB8, 0xEA53, 0x9DBA, 0xEA54, 0x9DBB, 0xEA52, 0x9DC1, 0xEA51,
01789     0x9DC2, 0xEA57, 0x9DC4, 0xEA50, 0x9DC6, 0xEA55, 0x9DCF, 0xEA56,
01790     0x9DD3, 0xEA59, 0x9DD9, 0xEA58, 0x9DE6, 0xEA5B, 0x9DED, 0xEA5C,
01791     0x9DEF, 0xEA5D, 0x9DF2, 0x9868, 0x9DF8, 0xEA5A, 0x9DF9, 0x91E9,
01792     0x9DFA, 0x8DEB, 0x9DFD, 0xEA5E, 0x9E19, 0xFC4A, 0x9E1A, 0xEA5F,
01793     0x9E1B, 0xEA60, 0x9E1E, 0xEA61, 0x9E75, 0xEA62, 0x9E78, 0x8CB2,
01794     0x9E79, 0xEA63, 0x9E7D, 0xEA64, 0x9E7F, 0x8EAD, 0x9E81, 0xEA65,
01795     0x9E88, 0xEA66, 0x9E8B, 0xEA67, 0x9E8C, 0xEA68, 0x9E91, 0xEA6B,
01796     0x9E92, 0xEA69, 0x9E93, 0x985B, 0x9E95, 0xEA6A, 0x9E97, 0x97ED,
01797     0x9E9D, 0xEA6C, 0x9E9F, 0x97D9, 0x9EA5, 0xEA6D, 0x9EA6, 0x949E,
01798     0x9EA9, 0xEA6E, 0x9EAA, 0xEA70, 0x9EAD, 0xEA71, 0x9EB8, 0xEA6F,
01799     0x9EB9, 0x8D8D, 0x9EBA, 0x96CB, 0x9EBB, 0x9683, 0x9EBC, 0x9BF5,
01800     0x9EBE, 0x9F80, 0x9EBF, 0x969B, 0x9EC4, 0x89A9, 0x9ECC, 0xEA73,
01801     0x9ECD, 0x8B6F, 0x9ECE, 0xEA74, 0x9ECF, 0xEA75, 0x9ED0, 0xEA76,
01802     0x9ED1, 0xFC4B, 0x9ED2, 0x8D95, 0x9ED4, 0xEA77, 0x9ED8, 0xE0D2,
01803     0x9ED9, 0x96D9, 0x9EDB, 0x91E1, 0x9EDC, 0xEA78, 0x9EDD, 0xEA7A,
01804     0x9EDE, 0xEA79, 0x9EE0, 0xEA7B, 0x9EE5, 0xEA7C, 0x9EE8, 0xEA7D,
01805     0x9EEF, 0xEA7E, 0x9EF4, 0xEA80, 0x9EF6, 0xEA81, 0x9EF7, 0xEA82,
01806     0x9EF9, 0xEA83, 0x9EFB, 0xEA84, 0x9EFC, 0xEA85, 0x9EFD, 0xEA86,
01807     0x9F07, 0xEA87, 0x9F08, 0xEA88, 0x9F0E, 0x9343, 0x9F13, 0x8CDB,
01808     0x9F15, 0xEA8A, 0x9F20, 0x916C, 0x9F21, 0xEA8B, 0x9F2C, 0xEA8C,
01809     0x9F3B, 0x9540, 0x9F3E, 0xEA8D, 0x9F4A, 0xEA8E, 0x9F4B, 0xE256,
01810     0x9F4E, 0xE6D8, 0x9F4F, 0xE8EB, 0x9F52, 0xEA8F, 0x9F54, 0xEA90,
01811     0x9F5F, 0xEA92, 0x9F60, 0xEA93, 0x9F61, 0xEA94, 0x9F62, 0x97EE,
01812     0x9F63, 0xEA91, 0x9F66, 0xEA95, 0x9F67, 0xEA96, 0x9F6A, 0xEA98,
01813     0x9F6C, 0xEA97, 0x9F72, 0xEA9A, 0x9F76, 0xEA9B, 0x9F77, 0xEA99,
01814     0x9F8D, 0x97B4, 0x9F95, 0xEA9C, 0x9F9C, 0xEA9D, 0x9F9D, 0xE273,
01815     0x9FA0, 0xEA9E, 0xF929, 0xFAE0, 0xF9DC, 0xFBE9, 0xFA0E, 0xFA90,
01816     0xFA0F, 0xFA9B, 0xFA10, 0xFA9C, 0xFA11, 0xFAB1, 0xFA12, 0xFAD8,
01817     0xFA13, 0xFAE8, 0xFA14, 0xFAEA, 0xFA15, 0xFB58, 0xFA16, 0xFB5E,
01818     0xFA17, 0xFB75, 0xFA18, 0xFB7D, 0xFA19, 0xFB7E, 0xFA1A, 0xFB80,
01819     0xFA1B, 0xFB82, 0xFA1C, 0xFB86, 0xFA1D, 0xFB89, 0xFA1E, 0xFB92,
01820     0xFA1F, 0xFB9D, 0xFA20, 0xFB9F, 0xFA21, 0xFBA0, 0xFA22, 0xFBA9,
01821     0xFA23, 0xFBB1, 0xFA24, 0xFBB3, 0xFA25, 0xFBB4, 0xFA26, 0xFBB7,
01822     0xFA27, 0xFBD3, 0xFA28, 0xFBDA, 0xFA29, 0xFBEA, 0xFA2A, 0xFBF6,
01823     0xFA2B, 0xFBF7, 0xFA2C, 0xFBF9, 0xFA2D, 0xFC49, 0xFF01, 0x8149,
01824     0xFF02, 0xFA57, 0xFF03, 0x8194, 0xFF04, 0x8190, 0xFF05, 0x8193,
01825     0xFF06, 0x8195, 0xFF07, 0xFA56, 0xFF08, 0x8169, 0xFF09, 0x816A,
01826     0xFF0A, 0x8196, 0xFF0B, 0x817B, 0xFF0C, 0x8143, 0xFF0D, 0x817C,
01827     0xFF0E, 0x8144, 0xFF0F, 0x815E, 0xFF10, 0x824F, 0xFF11, 0x8250,
01828     0xFF12, 0x8251, 0xFF13, 0x8252, 0xFF14, 0x8253, 0xFF15, 0x8254,
01829     0xFF16, 0x8255, 0xFF17, 0x8256, 0xFF18, 0x8257, 0xFF19, 0x8258,
01830     0xFF1A, 0x8146, 0xFF1B, 0x8147, 0xFF1C, 0x8183, 0xFF1D, 0x8181,
01831     0xFF1E, 0x8184, 0xFF1F, 0x8148, 0xFF20, 0x8197, 0xFF21, 0x8260,
01832     0xFF22, 0x8261, 0xFF23, 0x8262, 0xFF24, 0x8263, 0xFF25, 0x8264,
01833     0xFF26, 0x8265, 0xFF27, 0x8266, 0xFF28, 0x8267, 0xFF29, 0x8268,
01834     0xFF2A, 0x8269, 0xFF2B, 0x826A, 0xFF2C, 0x826B, 0xFF2D, 0x826C,
01835     0xFF2E, 0x826D, 0xFF2F, 0x826E, 0xFF30, 0x826F, 0xFF31, 0x8270,
01836     0xFF32, 0x8271, 0xFF33, 0x8272, 0xFF34, 0x8273, 0xFF35, 0x8274,
01837     0xFF36, 0x8275, 0xFF37, 0x8276, 0xFF38, 0x8277, 0xFF39, 0x8278,
01838     0xFF3A, 0x8279, 0xFF3B, 0x816D, 0xFF3C, 0x815F, 0xFF3D, 0x816E,
01839     0xFF3E, 0x814F, 0xFF3F, 0x8151, 0xFF40, 0x814D, 0xFF41, 0x8281,
01840     0xFF42, 0x8282, 0xFF43, 0x8283, 0xFF44, 0x8284, 0xFF45, 0x8285,
01841     0xFF46, 0x8286, 0xFF47, 0x8287, 0xFF48, 0x8288, 0xFF49, 0x8289,
01842     0xFF4A, 0x828A, 0xFF4B, 0x828B, 0xFF4C, 0x828C, 0xFF4D, 0x828D,
01843     0xFF4E, 0x828E, 0xFF4F, 0x828F, 0xFF50, 0x8290, 0xFF51, 0x8291,
01844     0xFF52, 0x8292, 0xFF53, 0x8293, 0xFF54, 0x8294, 0xFF55, 0x8295,
01845     0xFF56, 0x8296, 0xFF57, 0x8297, 0xFF58, 0x8298, 0xFF59, 0x8299,
01846     0xFF5A, 0x829A, 0xFF5B, 0x816F, 0xFF5C, 0x8162, 0xFF5D, 0x8170,
01847     0xFF5E, 0x8160, 0xFF61, 0x00A1, 0xFF62, 0x00A2, 0xFF63, 0x00A3,
01848     0xFF64, 0x00A4, 0xFF65, 0x00A5, 0xFF66, 0x00A6, 0xFF67, 0x00A7,
01849     0xFF68, 0x00A8, 0xFF69, 0x00A9, 0xFF6A, 0x00AA, 0xFF6B, 0x00AB,
01850     0xFF6C, 0x00AC, 0xFF6D, 0x00AD, 0xFF6E, 0x00AE, 0xFF6F, 0x00AF,
01851     0xFF70, 0x00B0, 0xFF71, 0x00B1, 0xFF72, 0x00B2, 0xFF73, 0x00B3,
01852     0xFF74, 0x00B4, 0xFF75, 0x00B5, 0xFF76, 0x00B6, 0xFF77, 0x00B7,
01853     0xFF78, 0x00B8, 0xFF79, 0x00B9, 0xFF7A, 0x00BA, 0xFF7B, 0x00BB,
01854     0xFF7C, 0x00BC, 0xFF7D, 0x00BD, 0xFF7E, 0x00BE, 0xFF7F, 0x00BF,
01855     0xFF80, 0x00C0, 0xFF81, 0x00C1, 0xFF82, 0x00C2, 0xFF83, 0x00C3,
01856     0xFF84, 0x00C4, 0xFF85, 0x00C5, 0xFF86, 0x00C6, 0xFF87, 0x00C7,
01857     0xFF88, 0x00C8, 0xFF89, 0x00C9, 0xFF8A, 0x00CA, 0xFF8B, 0x00CB,
01858     0xFF8C, 0x00CC, 0xFF8D, 0x00CD, 0xFF8E, 0x00CE, 0xFF8F, 0x00CF,
01859     0xFF90, 0x00D0, 0xFF91, 0x00D1, 0xFF92, 0x00D2, 0xFF93, 0x00D3,
01860     0xFF94, 0x00D4, 0xFF95, 0x00D5, 0xFF96, 0x00D6, 0xFF97, 0x00D7,
01861     0xFF98, 0x00D8, 0xFF99, 0x00D9, 0xFF9A, 0x00DA, 0xFF9B, 0x00DB,
01862     0xFF9C, 0x00DC, 0xFF9D, 0x00DD, 0xFF9E, 0x00DE, 0xFF9F, 0x00DF,
01863     0xFFE0, 0x8191, 0xFFE1, 0x8192, 0xFFE2, 0x81CA, 0xFFE3, 0x8150,
01864     0xFFE4, 0xFA55, 0xFFE5, 0x818F, 0, 0
01865 };
01866
01867 #if !_TINY_TABLE
01868 static
01869 const WCHAR sjis2uni[] = {
01870 /*  SJIS - Unicode, SJIS - Unicode, SJIS - Unicode, SJIS - Unicode, */
01871     0x00A1, 0xFF61, 0x00A2, 0xFF62, 0x00A3, 0xFF63, 0x00A4, 0xFF64,
01872     0x00A5, 0xFF65, 0x00A6, 0xFF66, 0x00A7, 0xFF67, 0x00A8, 0xFF68,
01873     0x00A9, 0xFF69, 0x00AA, 0xFF6A, 0x00AB, 0xFF6B, 0x00AC, 0xFF6C,
01874     0x00AD, 0xFF6D, 0x00AE, 0xFF6E, 0x00AF, 0xFF6F, 0x00B0, 0xFF70,
01875     0x00B1, 0xFF71, 0x00B2, 0xFF72, 0x00B3, 0xFF73, 0x00B4, 0xFF74,
01876     0x00B5, 0xFF75, 0x00B6, 0xFF76, 0x00B7, 0xFF77, 0x00B8, 0xFF78,
01877     0x00B9, 0xFF79, 0x00BA, 0xFF7A, 0x00BB, 0xFF7B, 0x00BC, 0xFF7C,
01878     0x00BD, 0xFF7D, 0x00BE, 0xFF7E, 0x00BF, 0xFF7F, 0x00C0, 0xFF80,
01879     0x00C1, 0xFF81, 0x00C2, 0xFF82, 0x00C3, 0xFF83, 0x00C4, 0xFF84,
01880     0x00C5, 0xFF85, 0x00C6, 0xFF86, 0x00C7, 0xFF87, 0x00C8, 0xFF88,
01881     0x00C9, 0xFF89, 0x00CA, 0xFF8A, 0x00CB, 0xFF8B, 0x00CC, 0xFF8C,
01882     0x00CD, 0xFF8D, 0x00CE, 0xFF8E, 0x00CF, 0xFF8F, 0x00D0, 0xFF90,
01883     0x00D1, 0xFF91, 0x00D2, 0xFF92, 0x00D3, 0xFF93, 0x00D4, 0xFF94,
01884     0x00D5, 0xFF95, 0x00D6, 0xFF96, 0x00D7, 0xFF97, 0x00D8, 0xFF98,
01885     0x00D9, 0xFF99, 0x00DA, 0xFF9A, 0x00DB, 0xFF9B, 0x00DC, 0xFF9C,
01886     0x00DD, 0xFF9D, 0x00DE, 0xFF9E, 0x00DF, 0xFF9F, 0x8140, 0x3000,
01887     0x8141, 0x3001, 0x8142, 0x3002, 0x8143, 0xFF0C, 0x8144, 0xFF0E,
01888     0x8145, 0x30FB, 0x8146, 0xFF1A, 0x8147, 0xFF1B, 0x8148, 0xFF1F,
01889     0x8149, 0xFF01, 0x814A, 0x309B, 0x814B, 0x309C, 0x814C, 0x00B4,
01890     0x814D, 0xFF40, 0x814E, 0x00A8, 0x814F, 0xFF3E, 0x8150, 0xFFE3,
01891     0x8151, 0xFF3F, 0x8152, 0x30FD, 0x8153, 0x30FE, 0x8154, 0x309D,
01892     0x8155, 0x309E, 0x8156, 0x3003, 0x8157, 0x4EDD, 0x8158, 0x3005,
01893     0x8159, 0x3006, 0x815A, 0x3007, 0x815B, 0x30FC, 0x815C, 0x2015,
01894     0x815D, 0x2010, 0x815E, 0xFF0F, 0x815F, 0xFF3C, 0x8160, 0xFF5E,
01895     0x8161, 0x2225, 0x8162, 0xFF5C, 0x8163, 0x2026, 0x8164, 0x2025,
01896     0x8165, 0x2018, 0x8166, 0x2019, 0x8167, 0x201C, 0x8168, 0x201D,
01897     0x8169, 0xFF08, 0x816A, 0xFF09, 0x816B, 0x3014, 0x816C, 0x3015,
01898     0x816D, 0xFF3B, 0x816E, 0xFF3D, 0x816F, 0xFF5B, 0x8170, 0xFF5D,
01899     0x8171, 0x3008, 0x8172, 0x3009, 0x8173, 0x300A, 0x8174, 0x300B,
01900     0x8175, 0x300C, 0x8176, 0x300D, 0x8177, 0x300E, 0x8178, 0x300F,
01901     0x8179, 0x3010, 0x817A, 0x3011, 0x817B, 0xFF0B, 0x817C, 0xFF0D,
01902     0x817D, 0x00B1, 0x817E, 0x00D7, 0x8180, 0x00F7, 0x8181, 0xFF1D,
01903     0x8182, 0x2260, 0x8183, 0xFF1C, 0x8184, 0xFF1E, 0x8185, 0x2266,
01904     0x8186, 0x2267, 0x8187, 0x221E, 0x8188, 0x2234, 0x8189, 0x2642,
01905     0x818A, 0x2640, 0x818B, 0x00B0, 0x818C, 0x2032, 0x818D, 0x2033,
01906     0x818E, 0x2103, 0x818F, 0xFFE5, 0x8190, 0xFF04, 0x8191, 0xFFE0,
01907     0x8192, 0xFFE1, 0x8193, 0xFF05, 0x8194, 0xFF03, 0x8195, 0xFF06,
01908     0x8196, 0xFF0A, 0x8197, 0xFF20, 0x8198, 0x00A7, 0x8199, 0x2606,
01909     0x819A, 0x2605, 0x819B, 0x25CB, 0x819C, 0x25CF, 0x819D, 0x25CE,
01910     0x819E, 0x25C7, 0x819F, 0x25C6, 0x81A0, 0x25A1, 0x81A1, 0x25A0,
01911     0x81A2, 0x25B3, 0x81A3, 0x25B2, 0x81A4, 0x25BD, 0x81A5, 0x25BC,
01912     0x81A6, 0x203B, 0x81A7, 0x3012, 0x81A8, 0x2192, 0x81A9, 0x2190,
01913     0x81AA, 0x2191, 0x81AB, 0x2193, 0x81AC, 0x3013, 0x81B8, 0x2208,
01914     0x81B9, 0x220B, 0x81BA, 0x2286, 0x81BB, 0x2287, 0x81BC, 0x2282,
01915     0x81BD, 0x2283, 0x81BE, 0x222A, 0x81BF, 0x2229, 0x81C8, 0x2227,
01916     0x81C9, 0x2228, 0x81CA, 0xFFE2, 0x81CB, 0x21D2, 0x81CC, 0x21D4,
01917     0x81CD, 0x2200, 0x81CE, 0x2203, 0x81DA, 0x2220, 0x81DB, 0x22A5,
01918     0x81DC, 0x2312, 0x81DD, 0x2202, 0x81DE, 0x2207, 0x81DF, 0x2261,
01919     0x81E0, 0x2252, 0x81E1, 0x226A, 0x81E2, 0x226B, 0x81E3, 0x221A,
01920     0x81E4, 0x223D, 0x81E5, 0x221D, 0x81E6, 0x2235, 0x81E7, 0x222B,
01921     0x81E8, 0x222C, 0x81F0, 0x212B, 0x81F1, 0x2030, 0x81F2, 0x266F,
01922     0x81F3, 0x266D, 0x81F4, 0x266A, 0x81F5, 0x2020, 0x81F6, 0x2021,
01923     0x81F7, 0x00B6, 0x81FC, 0x25EF, 0x824F, 0xFF10, 0x8250, 0xFF11,
01924     0x8251, 0xFF12, 0x8252, 0xFF13, 0x8253, 0xFF14, 0x8254, 0xFF15,
01925     0x8255, 0xFF16, 0x8256, 0xFF17, 0x8257, 0xFF18, 0x8258, 0xFF19,
01926     0x8260, 0xFF21, 0x8261, 0xFF22, 0x8262, 0xFF23, 0x8263, 0xFF24,
01927     0x8264, 0xFF25, 0x8265, 0xFF26, 0x8266, 0xFF27, 0x8267, 0xFF28,
01928     0x8268, 0xFF29, 0x8269, 0xFF2A, 0x826A, 0xFF2B, 0x826B, 0xFF2C,
01929     0x826C, 0xFF2D, 0x826D, 0xFF2E, 0x826E, 0xFF2F, 0x826F, 0xFF30,
01930     0x8270, 0xFF31, 0x8271, 0xFF32, 0x8272, 0xFF33, 0x8273, 0xFF34,
01931     0x8274, 0xFF35, 0x8275, 0xFF36, 0x8276, 0xFF37, 0x8277, 0xFF38,
01932     0x8278, 0xFF39, 0x8279, 0xFF3A, 0x8281, 0xFF41, 0x8282, 0xFF42,
01933     0x8283, 0xFF43, 0x8284, 0xFF44, 0x8285, 0xFF45, 0x8286, 0xFF46,
01934     0x8287, 0xFF47, 0x8288, 0xFF48, 0x8289, 0xFF49, 0x828A, 0xFF4A,
01935     0x828B, 0xFF4B, 0x828C, 0xFF4C, 0x828D, 0xFF4D, 0x828E, 0xFF4E,
01936     0x828F, 0xFF4F, 0x8290, 0xFF50, 0x8291, 0xFF51, 0x8292, 0xFF52,
01937     0x8293, 0xFF53, 0x8294, 0xFF54, 0x8295, 0xFF55, 0x8296, 0xFF56,
01938     0x8297, 0xFF57, 0x8298, 0xFF58, 0x8299, 0xFF59, 0x829A, 0xFF5A,
01939     0x829F, 0x3041, 0x82A0, 0x3042, 0x82A1, 0x3043, 0x82A2, 0x3044,
01940     0x82A3, 0x3045, 0x82A4, 0x3046, 0x82A5, 0x3047, 0x82A6, 0x3048,
01941     0x82A7, 0x3049, 0x82A8, 0x304A, 0x82A9, 0x304B, 0x82AA, 0x304C,
01942     0x82AB, 0x304D, 0x82AC, 0x304E, 0x82AD, 0x304F, 0x82AE, 0x3050,
01943     0x82AF, 0x3051, 0x82B0, 0x3052, 0x82B1, 0x3053, 0x82B2, 0x3054,
01944     0x82B3, 0x3055, 0x82B4, 0x3056, 0x82B5, 0x3057, 0x82B6, 0x3058,
01945     0x82B7, 0x3059, 0x82B8, 0x305A, 0x82B9, 0x305B, 0x82BA, 0x305C,
01946     0x82BB, 0x305D, 0x82BC, 0x305E, 0x82BD, 0x305F, 0x82BE, 0x3060,
01947     0x82BF, 0x3061, 0x82C0, 0x3062, 0x82C1, 0x3063, 0x82C2, 0x3064,
01948     0x82C3, 0x3065, 0x82C4, 0x3066, 0x82C5, 0x3067, 0x82C6, 0x3068,
01949     0x82C7, 0x3069, 0x82C8, 0x306A, 0x82C9, 0x306B, 0x82CA, 0x306C,
01950     0x82CB, 0x306D, 0x82CC, 0x306E, 0x82CD, 0x306F, 0x82CE, 0x3070,
01951     0x82CF, 0x3071, 0x82D0, 0x3072, 0x82D1, 0x3073, 0x82D2, 0x3074,
01952     0x82D3, 0x3075, 0x82D4, 0x3076, 0x82D5, 0x3077, 0x82D6, 0x3078,
01953     0x82D7, 0x3079, 0x82D8, 0x307A, 0x82D9, 0x307B, 0x82DA, 0x307C,
01954     0x82DB, 0x307D, 0x82DC, 0x307E, 0x82DD, 0x307F, 0x82DE, 0x3080,
01955     0x82DF, 0x3081, 0x82E0, 0x3082, 0x82E1, 0x3083, 0x82E2, 0x3084,
01956     0x82E3, 0x3085, 0x82E4, 0x3086, 0x82E5, 0x3087, 0x82E6, 0x3088,
01957     0x82E7, 0x3089, 0x82E8, 0x308A, 0x82E9, 0x308B, 0x82EA, 0x308C,
01958     0x82EB, 0x308D, 0x82EC, 0x308E, 0x82ED, 0x308F, 0x82EE, 0x3090,
01959     0x82EF, 0x3091, 0x82F0, 0x3092, 0x82F1, 0x3093, 0x8340, 0x30A1,
01960     0x8341, 0x30A2, 0x8342, 0x30A3, 0x8343, 0x30A4, 0x8344, 0x30A5,
01961     0x8345, 0x30A6, 0x8346, 0x30A7, 0x8347, 0x30A8, 0x8348, 0x30A9,
01962     0x8349, 0x30AA, 0x834A, 0x30AB, 0x834B, 0x30AC, 0x834C, 0x30AD,
01963     0x834D, 0x30AE, 0x834E, 0x30AF, 0x834F, 0x30B0, 0x8350, 0x30B1,
01964     0x8351, 0x30B2, 0x8352, 0x30B3, 0x8353, 0x30B4, 0x8354, 0x30B5,
01965     0x8355, 0x30B6, 0x8356, 0x30B7, 0x8357, 0x30B8, 0x8358, 0x30B9,
01966     0x8359, 0x30BA, 0x835A, 0x30BB, 0x835B, 0x30BC, 0x835C, 0x30BD,
01967     0x835D, 0x30BE, 0x835E, 0x30BF, 0x835F, 0x30C0, 0x8360, 0x30C1,
01968     0x8361, 0x30C2, 0x8362, 0x30C3, 0x8363, 0x30C4, 0x8364, 0x30C5,
01969     0x8365, 0x30C6, 0x8366, 0x30C7, 0x8367, 0x30C8, 0x8368, 0x30C9,
01970     0x8369, 0x30CA, 0x836A, 0x30CB, 0x836B, 0x30CC, 0x836C, 0x30CD,
01971     0x836D, 0x30CE, 0x836E, 0x30CF, 0x836F, 0x30D0, 0x8370, 0x30D1,
01972     0x8371, 0x30D2, 0x8372, 0x30D3, 0x8373, 0x30D4, 0x8374, 0x30D5,
01973     0x8375, 0x30D6, 0x8376, 0x30D7, 0x8377, 0x30D8, 0x8378, 0x30D9,
01974     0x8379, 0x30DA, 0x837A, 0x30DB, 0x837B, 0x30DC, 0x837C, 0x30DD,
01975     0x837D, 0x30DE, 0x837E, 0x30DF, 0x8380, 0x30E0, 0x8381, 0x30E1,
01976     0x8382, 0x30E2, 0x8383, 0x30E3, 0x8384, 0x30E4, 0x8385, 0x30E5,
01977     0x8386, 0x30E6, 0x8387, 0x30E7, 0x8388, 0x30E8, 0x8389, 0x30E9,
01978     0x838A, 0x30EA, 0x838B, 0x30EB, 0x838C, 0x30EC, 0x838D, 0x30ED,
01979     0x838E, 0x30EE, 0x838F, 0x30EF, 0x8390, 0x30F0, 0x8391, 0x30F1,
01980     0x8392, 0x30F2, 0x8393, 0x30F3, 0x8394, 0x3094, 0x8394, 0x30F4,
01981     0x8395, 0x30F5, 0x8396, 0x30F6, 0x839F, 0x0391, 0x83A0, 0x0392,
01982     0x83A1, 0x0393, 0x83A2, 0x0394, 0x83A3, 0x0395, 0x83A4, 0x0396,
01983     0x83A5, 0x0397, 0x83A6, 0x0398, 0x83A7, 0x0399, 0x83A8, 0x039A,
01984     0x83A9, 0x039B, 0x83AA, 0x039C, 0x83AB, 0x039D, 0x83AC, 0x039E,
01985     0x83AD, 0x039F, 0x83AE, 0x03A0, 0x83AF, 0x03A1, 0x83B0, 0x03A3,
01986     0x83B1, 0x03A4, 0x83B2, 0x03A5, 0x83B3, 0x03A6, 0x83B4, 0x03A7,
01987     0x83B5, 0x03A8, 0x83B6, 0x03A9, 0x83BF, 0x03B1, 0x83C0, 0x03B2,
01988     0x83C1, 0x03B3, 0x83C2, 0x03B4, 0x83C3, 0x03B5, 0x83C4, 0x03B6,
01989     0x83C5, 0x03B7, 0x83C6, 0x03B8, 0x83C7, 0x03B9, 0x83C8, 0x03BA,
01990     0x83C9, 0x03BB, 0x83CA, 0x03BC, 0x83CB, 0x03BD, 0x83CC, 0x03BE,
01991     0x83CD, 0x03BF, 0x83CE, 0x03C0, 0x83CF, 0x03C1, 0x83D0, 0x03C3,
01992     0x83D1, 0x03C4, 0x83D2, 0x03C5, 0x83D3, 0x03C6, 0x83D4, 0x03C7,
01993     0x83D5, 0x03C8, 0x83D6, 0x03C9, 0x8440, 0x0410, 0x8441, 0x0411,
01994     0x8442, 0x0412, 0x8443, 0x0413, 0x8444, 0x0414, 0x8445, 0x0415,
01995     0x8446, 0x0401, 0x8447, 0x0416, 0x8448, 0x0417, 0x8449, 0x0418,
01996     0x844A, 0x0419, 0x844B, 0x041A, 0x844C, 0x041B, 0x844D, 0x041C,
01997     0x844E, 0x041D, 0x844F, 0x041E, 0x8450, 0x041F, 0x8451, 0x0420,
01998     0x8452, 0x0421, 0x8453, 0x0422, 0x8454, 0x0423, 0x8455, 0x0424,
01999     0x8456, 0x0425, 0x8457, 0x0426, 0x8458, 0x0427, 0x8459, 0x0428,
02000     0x845A, 0x0429, 0x845B, 0x042A, 0x845C, 0x042B, 0x845D, 0x042C,
02001     0x845E, 0x042D, 0x845F, 0x042E, 0x8460, 0x042F, 0x8470, 0x0430,
02002     0x8471, 0x0431, 0x8472, 0x0432, 0x8473, 0x0433, 0x8474, 0x0434,
02003     0x8475, 0x0435, 0x8476, 0x0451, 0x8477, 0x0436, 0x8478, 0x0437,
02004     0x8479, 0x0438, 0x847A, 0x0439, 0x847B, 0x043A, 0x847C, 0x043B,
02005     0x847D, 0x043C, 0x847E, 0x043D, 0x8480, 0x043E, 0x8481, 0x043F,
02006     0x8482, 0x0440, 0x8483, 0x0441, 0x8484, 0x0442, 0x8485, 0x0443,
02007     0x8486, 0x0444, 0x8487, 0x0445, 0x8488, 0x0446, 0x8489, 0x0447,
02008     0x848A, 0x0448, 0x848B, 0x0449, 0x848C, 0x044A, 0x848D, 0x044B,
02009     0x848E, 0x044C, 0x848F, 0x044D, 0x8490, 0x044E, 0x8491, 0x044F,
02010     0x849F, 0x2500, 0x84A0, 0x2502, 0x84A1, 0x250C, 0x84A2, 0x2510,
02011     0x84A3, 0x2518, 0x84A4, 0x2514, 0x84A5, 0x251C, 0x84A6, 0x252C,
02012     0x84A7, 0x2524, 0x84A8, 0x2534, 0x84A9, 0x253C, 0x84AA, 0x2501,
02013     0x84AB, 0x2503, 0x84AC, 0x250F, 0x84AD, 0x2513, 0x84AE, 0x251B,
02014     0x84AF, 0x2517, 0x84B0, 0x2523, 0x84B1, 0x2533, 0x84B2, 0x252B,
02015     0x84B3, 0x253B, 0x84B4, 0x254B, 0x84B5, 0x2520, 0x84B6, 0x252F,
02016     0x84B7, 0x2528, 0x84B8, 0x2537, 0x84B9, 0x253F, 0x84BA, 0x251D,
02017     0x84BB, 0x2530, 0x84BC, 0x2525, 0x84BD, 0x2538, 0x84BE, 0x2542,
02018     0x8740, 0x2460, 0x8741, 0x2461, 0x8742, 0x2462, 0x8743, 0x2463,
02019     0x8744, 0x2464, 0x8745, 0x2465, 0x8746, 0x2466, 0x8747, 0x2467,
02020     0x8748, 0x2468, 0x8749, 0x2469, 0x874A, 0x246A, 0x874B, 0x246B,
02021     0x874C, 0x246C, 0x874D, 0x246D, 0x874E, 0x246E, 0x874F, 0x246F,
02022     0x8750, 0x2470, 0x8751, 0x2471, 0x8752, 0x2472, 0x8753, 0x2473,
02023     0x8754, 0x2160, 0x8755, 0x2161, 0x8756, 0x2162, 0x8757, 0x2163,
02024     0x8758, 0x2164, 0x8759, 0x2165, 0x875A, 0x2166, 0x875B, 0x2167,
02025     0x875C, 0x2168, 0x875D, 0x2169, 0x875F, 0x3349, 0x8760, 0x3314,
02026     0x8761, 0x3322, 0x8762, 0x334D, 0x8763, 0x3318, 0x8764, 0x3327,
02027     0x8765, 0x3303, 0x8766, 0x3336, 0x8767, 0x3351, 0x8768, 0x3357,
02028     0x8769, 0x330D, 0x876A, 0x3326, 0x876B, 0x3323, 0x876C, 0x332B,
02029     0x876D, 0x334A, 0x876E, 0x333B, 0x876F, 0x339C, 0x8770, 0x339D,
02030     0x8771, 0x339E, 0x8772, 0x338E, 0x8773, 0x338F, 0x8774, 0x33C4,
02031     0x8775, 0x33A1, 0x877E, 0x337B, 0x8780, 0x301D, 0x8781, 0x301F,
02032     0x8782, 0x2116, 0x8783, 0x33CD, 0x8784, 0x2121, 0x8785, 0x32A4,
02033     0x8786, 0x32A5, 0x8787, 0x32A6, 0x8788, 0x32A7, 0x8789, 0x32A8,
02034     0x878A, 0x3231, 0x878B, 0x3232, 0x878C, 0x3239, 0x878D, 0x337E,
02035     0x878E, 0x337D, 0x878F, 0x337C, 0x8793, 0x222E, 0x8794, 0x2211,
02036     0x8798, 0x221F, 0x8799, 0x22BF, 0x889F, 0x4E9C, 0x88A0, 0x5516,
02037     0x88A1, 0x5A03, 0x88A2, 0x963F, 0x88A3, 0x54C0, 0x88A4, 0x611B,
02038     0x88A5, 0x6328, 0x88A6, 0x59F6, 0x88A7, 0x9022, 0x88A8, 0x8475,
02039     0x88A9, 0x831C, 0x88AA, 0x7A50, 0x88AB, 0x60AA, 0x88AC, 0x63E1,
02040     0x88AD, 0x6E25, 0x88AE, 0x65ED, 0x88AF, 0x8466, 0x88B0, 0x82A6,
02041     0x88B1, 0x9BF5, 0x88B2, 0x6893, 0x88B3, 0x5727, 0x88B4, 0x65A1,
02042     0x88B5, 0x6271, 0x88B6, 0x5B9B, 0x88B7, 0x59D0, 0x88B8, 0x867B,
02043     0x88B9, 0x98F4, 0x88BA, 0x7D62, 0x88BB, 0x7DBE, 0x88BC, 0x9B8E,
02044     0x88BD, 0x6216, 0x88BE, 0x7C9F, 0x88BF, 0x88B7, 0x88C0, 0x5B89,
02045     0x88C1, 0x5EB5, 0x88C2, 0x6309, 0x88C3, 0x6697, 0x88C4, 0x6848,
02046     0x88C5, 0x95C7, 0x88C6, 0x978D, 0x88C7, 0x674F, 0x88C8, 0x4EE5,
02047     0x88C9, 0x4F0A, 0x88CA, 0x4F4D, 0x88CB, 0x4F9D, 0x88CC, 0x5049,
02048     0x88CD, 0x56F2, 0x88CE, 0x5937, 0x88CF, 0x59D4, 0x88D0, 0x5A01,
02049     0x88D1, 0x5C09, 0x88D2, 0x60DF, 0x88D3, 0x610F, 0x88D4, 0x6170,
02050     0x88D5, 0x6613, 0x88D6, 0x6905, 0x88D7, 0x70BA, 0x88D8, 0x754F,
02051     0x88D9, 0x7570, 0x88DA, 0x79FB, 0x88DB, 0x7DAD, 0x88DC, 0x7DEF,
02052     0x88DD, 0x80C3, 0x88DE, 0x840E, 0x88DF, 0x8863, 0x88E0, 0x8B02,
02053     0x88E1, 0x9055, 0x88E2, 0x907A, 0x88E3, 0x533B, 0x88E4, 0x4E95,
02054     0x88E5, 0x4EA5, 0x88E6, 0x57DF, 0x88E7, 0x80B2, 0x88E8, 0x90C1,
02055     0x88E9, 0x78EF, 0x88EA, 0x4E00, 0x88EB, 0x58F1, 0x88EC, 0x6EA2,
02056     0x88ED, 0x9038, 0x88EE, 0x7A32, 0x88EF, 0x8328, 0x88F0, 0x828B,
02057     0x88F1, 0x9C2F, 0x88F2, 0x5141, 0x88F3, 0x5370, 0x88F4, 0x54BD,
02058     0x88F5, 0x54E1, 0x88F6, 0x56E0, 0x88F7, 0x59FB, 0x88F8, 0x5F15,
02059     0x88F9, 0x98F2, 0x88FA, 0x6DEB, 0x88FB, 0x80E4, 0x88FC, 0x852D,
02060     0x8940, 0x9662, 0x8941, 0x9670, 0x8942, 0x96A0, 0x8943, 0x97FB,
02061     0x8944, 0x540B, 0x8945, 0x53F3, 0x8946, 0x5B87, 0x8947, 0x70CF,
02062     0x8948, 0x7FBD, 0x8949, 0x8FC2, 0x894A, 0x96E8, 0x894B, 0x536F,
02063     0x894C, 0x9D5C, 0x894D, 0x7ABA, 0x894E, 0x4E11, 0x894F, 0x7893,
02064     0x8950, 0x81FC, 0x8951, 0x6E26, 0x8952, 0x5618, 0x8953, 0x5504,
02065     0x8954, 0x6B1D, 0x8955, 0x851A, 0x8956, 0x9C3B, 0x8957, 0x59E5,
02066     0x8958, 0x53A9, 0x8959, 0x6D66, 0x895A, 0x74DC, 0x895B, 0x958F,
02067     0x895C, 0x5642, 0x895D, 0x4E91, 0x895E, 0x904B, 0x895F, 0x96F2,
02068     0x8960, 0x834F, 0x8961, 0x990C, 0x8962, 0x53E1, 0x8963, 0x55B6,
02069     0x8964, 0x5B30, 0x8965, 0x5F71, 0x8966, 0x6620, 0x8967, 0x66F3,
02070     0x8968, 0x6804, 0x8969, 0x6C38, 0x896A, 0x6CF3, 0x896B, 0x6D29,
02071     0x896C, 0x745B, 0x896D, 0x76C8, 0x896E, 0x7A4E, 0x896F, 0x9834,
02072     0x8970, 0x82F1, 0x8971, 0x885B, 0x8972, 0x8A60, 0x8973, 0x92ED,
02073     0x8974, 0x6DB2, 0x8975, 0x75AB, 0x8976, 0x76CA, 0x8977, 0x99C5,
02074     0x8978, 0x60A6, 0x8979, 0x8B01, 0x897A, 0x8D8A, 0x897B, 0x95B2,
02075     0x897C, 0x698E, 0x897D, 0x53AD, 0x897E, 0x5186, 0x8980, 0x5712,
02076     0x8981, 0x5830, 0x8982, 0x5944, 0x8983, 0x5BB4, 0x8984, 0x5EF6,
02077     0x8985, 0x6028, 0x8986, 0x63A9, 0x8987, 0x63F4, 0x8988, 0x6CBF,
02078     0x8989, 0x6F14, 0x898A, 0x708E, 0x898B, 0x7114, 0x898C, 0x7159,
02079     0x898D, 0x71D5, 0x898E, 0x733F, 0x898F, 0x7E01, 0x8990, 0x8276,
02080     0x8991, 0x82D1, 0x8992, 0x8597, 0x8993, 0x9060, 0x8994, 0x925B,
02081     0x8995, 0x9D1B, 0x8996, 0x5869, 0x8997, 0x65BC, 0x8998, 0x6C5A,
02082     0x8999, 0x7525, 0x899A, 0x51F9, 0x899B, 0x592E, 0x899C, 0x5965,
02083     0x899D, 0x5F80, 0x899E, 0x5FDC, 0x899F, 0x62BC, 0x89A0, 0x65FA,
02084     0x89A1, 0x6A2A, 0x89A2, 0x6B27, 0x89A3, 0x6BB4, 0x89A4, 0x738B,
02085     0x89A5, 0x7FC1, 0x89A6, 0x8956, 0x89A7, 0x9D2C, 0x89A8, 0x9D0E,
02086     0x89A9, 0x9EC4, 0x89AA, 0x5CA1, 0x89AB, 0x6C96, 0x89AC, 0x837B,
02087     0x89AD, 0x5104, 0x89AE, 0x5C4B, 0x89AF, 0x61B6, 0x89B0, 0x81C6,
02088     0x89B1, 0x6876, 0x89B2, 0x7261, 0x89B3, 0x4E59, 0x89B4, 0x4FFA,
02089     0x89B5, 0x5378, 0x89B6, 0x6069, 0x89B7, 0x6E29, 0x89B8, 0x7A4F,
02090     0x89B9, 0x97F3, 0x89BA, 0x4E0B, 0x89BB, 0x5316, 0x89BC, 0x4EEE,
02091     0x89BD, 0x4F55, 0x89BE, 0x4F3D, 0x89BF, 0x4FA1, 0x89C0, 0x4F73,
02092     0x89C1, 0x52A0, 0x89C2, 0x53EF, 0x89C3, 0x5609, 0x89C4, 0x590F,
02093     0x89C5, 0x5AC1, 0x89C6, 0x5BB6, 0x89C7, 0x5BE1, 0x89C8, 0x79D1,
02094     0x89C9, 0x6687, 0x89CA, 0x679C, 0x89CB, 0x67B6, 0x89CC, 0x6B4C,
02095     0x89CD, 0x6CB3, 0x89CE, 0x706B, 0x89CF, 0x73C2, 0x89D0, 0x798D,
02096     0x89D1, 0x79BE, 0x89D2, 0x7A3C, 0x89D3, 0x7B87, 0x89D4, 0x82B1,
02097     0x89D5, 0x82DB, 0x89D6, 0x8304, 0x89D7, 0x8377, 0x89D8, 0x83EF,
02098     0x89D9, 0x83D3, 0x89DA, 0x8766, 0x89DB, 0x8AB2, 0x89DC, 0x5629,
02099     0x89DD, 0x8CA8, 0x89DE, 0x8FE6, 0x89DF, 0x904E, 0x89E0, 0x971E,
02100     0x89E1, 0x868A, 0x89E2, 0x4FC4, 0x89E3, 0x5CE8, 0x89E4, 0x6211,
02101     0x89E5, 0x7259, 0x89E6, 0x753B, 0x89E7, 0x81E5, 0x89E8, 0x82BD,
02102     0x89E9, 0x86FE, 0x89EA, 0x8CC0, 0x89EB, 0x96C5, 0x89EC, 0x9913,
02103     0x89ED, 0x99D5, 0x89EE, 0x4ECB, 0x89EF, 0x4F1A, 0x89F0, 0x89E3,
02104     0x89F1, 0x56DE, 0x89F2, 0x584A, 0x89F3, 0x58CA, 0x89F4, 0x5EFB,
02105     0x89F5, 0x5FEB, 0x89F6, 0x602A, 0x89F7, 0x6094, 0x89F8, 0x6062,
02106     0x89F9, 0x61D0, 0x89FA, 0x6212, 0x89FB, 0x62D0, 0x89FC, 0x6539,
02107     0x8A40, 0x9B41, 0x8A41, 0x6666, 0x8A42, 0x68B0, 0x8A43, 0x6D77,
02108     0x8A44, 0x7070, 0x8A45, 0x754C, 0x8A46, 0x7686, 0x8A47, 0x7D75,
02109     0x8A48, 0x82A5, 0x8A49, 0x87F9, 0x8A4A, 0x958B, 0x8A4B, 0x968E,
02110     0x8A4C, 0x8C9D, 0x8A4D, 0x51F1, 0x8A4E, 0x52BE, 0x8A4F, 0x5916,
02111     0x8A50, 0x54B3, 0x8A51, 0x5BB3, 0x8A52, 0x5D16, 0x8A53, 0x6168,
02112     0x8A54, 0x6982, 0x8A55, 0x6DAF, 0x8A56, 0x788D, 0x8A57, 0x84CB,
02113     0x8A58, 0x8857, 0x8A59, 0x8A72, 0x8A5A, 0x93A7, 0x8A5B, 0x9AB8,
02114     0x8A5C, 0x6D6C, 0x8A5D, 0x99A8, 0x8A5E, 0x86D9, 0x8A5F, 0x57A3,
02115     0x8A60, 0x67FF, 0x8A61, 0x86CE, 0x8A62, 0x920E, 0x8A63, 0x5283,
02116     0x8A64, 0x5687, 0x8A65, 0x5404, 0x8A66, 0x5ED3, 0x8A67, 0x62E1,
02117     0x8A68, 0x64B9, 0x8A69, 0x683C, 0x8A6A, 0x6838, 0x8A6B, 0x6BBB,
02118     0x8A6C, 0x7372, 0x8A6D, 0x78BA, 0x8A6E, 0x7A6B, 0x8A6F, 0x899A,
02119     0x8A70, 0x89D2, 0x8A71, 0x8D6B, 0x8A72, 0x8F03, 0x8A73, 0x90ED,
02120     0x8A74, 0x95A3, 0x8A75, 0x9694, 0x8A76, 0x9769, 0x8A77, 0x5B66,
02121     0x8A78, 0x5CB3, 0x8A79, 0x697D, 0x8A7A, 0x984D, 0x8A7B, 0x984E,
02122     0x8A7C, 0x639B, 0x8A7D, 0x7B20, 0x8A7E, 0x6A2B, 0x8A80, 0x6A7F,
02123     0x8A81, 0x68B6, 0x8A82, 0x9C0D, 0x8A83, 0x6F5F, 0x8A84, 0x5272,
02124     0x8A85, 0x559D, 0x8A86, 0x6070, 0x8A87, 0x62EC, 0x8A88, 0x6D3B,
02125     0x8A89, 0x6E07, 0x8A8A, 0x6ED1, 0x8A8B, 0x845B, 0x8A8C, 0x8910,
02126     0x8A8D, 0x8F44, 0x8A8E, 0x4E14, 0x8A8F, 0x9C39, 0x8A90, 0x53F6,
02127     0x8A91, 0x691B, 0x8A92, 0x6A3A, 0x8A93, 0x9784, 0x8A94, 0x682A,
02128     0x8A95, 0x515C, 0x8A96, 0x7AC3, 0x8A97, 0x84B2, 0x8A98, 0x91DC,
02129     0x8A99, 0x938C, 0x8A9A, 0x565B, 0x8A9B, 0x9D28, 0x8A9C, 0x6822,
02130     0x8A9D, 0x8305, 0x8A9E, 0x8431, 0x8A9F, 0x7CA5, 0x8AA0, 0x5208,
02131     0x8AA1, 0x82C5, 0x8AA2, 0x74E6, 0x8AA3, 0x4E7E, 0x8AA4, 0x4F83,
02132     0x8AA5, 0x51A0, 0x8AA6, 0x5BD2, 0x8AA7, 0x520A, 0x8AA8, 0x52D8,
02133     0x8AA9, 0x52E7, 0x8AAA, 0x5DFB, 0x8AAB, 0x559A, 0x8AAC, 0x582A,
02134     0x8AAD, 0x59E6, 0x8AAE, 0x5B8C, 0x8AAF, 0x5B98, 0x8AB0, 0x5BDB,
02135     0x8AB1, 0x5E72, 0x8AB2, 0x5E79, 0x8AB3, 0x60A3, 0x8AB4, 0x611F,
02136     0x8AB5, 0x6163, 0x8AB6, 0x61BE, 0x8AB7, 0x63DB, 0x8AB8, 0x6562,
02137     0x8AB9, 0x67D1, 0x8ABA, 0x6853, 0x8ABB, 0x68FA, 0x8ABC, 0x6B3E,
02138     0x8ABD, 0x6B53, 0x8ABE, 0x6C57, 0x8ABF, 0x6F22, 0x8AC0, 0x6F97,
02139     0x8AC1, 0x6F45, 0x8AC2, 0x74B0, 0x8AC3, 0x7518, 0x8AC4, 0x76E3,
02140     0x8AC5, 0x770B, 0x8AC6, 0x7AFF, 0x8AC7, 0x7BA1, 0x8AC8, 0x7C21,
02141     0x8AC9, 0x7DE9, 0x8ACA, 0x7F36, 0x8ACB, 0x7FF0, 0x8ACC, 0x809D,
02142     0x8ACD, 0x8266, 0x8ACE, 0x839E, 0x8ACF, 0x89B3, 0x8AD0, 0x8ACC,
02143     0x8AD1, 0x8CAB, 0x8AD2, 0x9084, 0x8AD3, 0x9451, 0x8AD4, 0x9593,
02144     0x8AD5, 0x9591, 0x8AD6, 0x95A2, 0x8AD7, 0x9665, 0x8AD8, 0x97D3,
02145     0x8AD9, 0x9928, 0x8ADA, 0x8218, 0x8ADB, 0x4E38, 0x8ADC, 0x542B,
02146     0x8ADD, 0x5CB8, 0x8ADE, 0x5DCC, 0x8ADF, 0x73A9, 0x8AE0, 0x764C,
02147     0x8AE1, 0x773C, 0x8AE2, 0x5CA9, 0x8AE3, 0x7FEB, 0x8AE4, 0x8D0B,
02148     0x8AE5, 0x96C1, 0x8AE6, 0x9811, 0x8AE7, 0x9854, 0x8AE8, 0x9858,
02149     0x8AE9, 0x4F01, 0x8AEA, 0x4F0E, 0x8AEB, 0x5371, 0x8AEC, 0x559C,
02150     0x8AED, 0x5668, 0x8AEE, 0x57FA, 0x8AEF, 0x5947, 0x8AF0, 0x5B09,
02151     0x8AF1, 0x5BC4, 0x8AF2, 0x5C90, 0x8AF3, 0x5E0C, 0x8AF4, 0x5E7E,
02152     0x8AF5, 0x5FCC, 0x8AF6, 0x63EE, 0x8AF7, 0x673A, 0x8AF8, 0x65D7,
02153     0x8AF9, 0x65E2, 0x8AFA, 0x671F, 0x8AFB, 0x68CB, 0x8AFC, 0x68C4,
02154     0x8B40, 0x6A5F, 0x8B41, 0x5E30, 0x8B42, 0x6BC5, 0x8B43, 0x6C17,
02155     0x8B44, 0x6C7D, 0x8B45, 0x757F, 0x8B46, 0x7948, 0x8B47, 0x5B63,
02156     0x8B48, 0x7A00, 0x8B49, 0x7D00, 0x8B4A, 0x5FBD, 0x8B4B, 0x898F,
02157     0x8B4C, 0x8A18, 0x8B4D, 0x8CB4, 0x8B4E, 0x8D77, 0x8B4F, 0x8ECC,
02158     0x8B50, 0x8F1D, 0x8B51, 0x98E2, 0x8B52, 0x9A0E, 0x8B53, 0x9B3C,
02159     0x8B54, 0x4E80, 0x8B55, 0x507D, 0x8B56, 0x5100, 0x8B57, 0x5993,
02160     0x8B58, 0x5B9C, 0x8B59, 0x622F, 0x8B5A, 0x6280, 0x8B5B, 0x64EC,
02161     0x8B5C, 0x6B3A, 0x8B5D, 0x72A0, 0x8B5E, 0x7591, 0x8B5F, 0x7947,
02162     0x8B60, 0x7FA9, 0x8B61, 0x87FB, 0x8B62, 0x8ABC, 0x8B63, 0x8B70,
02163     0x8B64, 0x63AC, 0x8B65, 0x83CA, 0x8B66, 0x97A0, 0x8B67, 0x5409,
02164     0x8B68, 0x5403, 0x8B69, 0x55AB, 0x8B6A, 0x6854, 0x8B6B, 0x6A58,
02165     0x8B6C, 0x8A70, 0x8B6D, 0x7827, 0x8B6E, 0x6775, 0x8B6F, 0x9ECD,
02166     0x8B70, 0x5374, 0x8B71, 0x5BA2, 0x8B72, 0x811A, 0x8B73, 0x8650,
02167     0x8B74, 0x9006, 0x8B75, 0x4E18, 0x8B76, 0x4E45, 0x8B77, 0x4EC7,
02168     0x8B78, 0x4F11, 0x8B79, 0x53CA, 0x8B7A, 0x5438, 0x8B7B, 0x5BAE,
02169     0x8B7C, 0x5F13, 0x8B7D, 0x6025, 0x8B7E, 0x6551, 0x8B80, 0x673D,
02170     0x8B81, 0x6C42, 0x8B82, 0x6C72, 0x8B83, 0x6CE3, 0x8B84, 0x7078,
02171     0x8B85, 0x7403, 0x8B86, 0x7A76, 0x8B87, 0x7AAE, 0x8B88, 0x7B08,
02172     0x8B89, 0x7D1A, 0x8B8A, 0x7CFE, 0x8B8B, 0x7D66, 0x8B8C, 0x65E7,
02173     0x8B8D, 0x725B, 0x8B8E, 0x53BB, 0x8B8F, 0x5C45, 0x8B90, 0x5DE8,
02174     0x8B91, 0x62D2, 0x8B92, 0x62E0, 0x8B93, 0x6319, 0x8B94, 0x6E20,
02175     0x8B95, 0x865A, 0x8B96, 0x8A31, 0x8B97, 0x8DDD, 0x8B98, 0x92F8,
02176     0x8B99, 0x6F01, 0x8B9A, 0x79A6, 0x8B9B, 0x9B5A, 0x8B9C, 0x4EA8,
02177     0x8B9D, 0x4EAB, 0x8B9E, 0x4EAC, 0x8B9F, 0x4F9B, 0x8BA0, 0x4FA0,
02178     0x8BA1, 0x50D1, 0x8BA2, 0x5147, 0x8BA3, 0x7AF6, 0x8BA4, 0x5171,
02179     0x8BA5, 0x51F6, 0x8BA6, 0x5354, 0x8BA7, 0x5321, 0x8BA8, 0x537F,
02180     0x8BA9, 0x53EB, 0x8BAA, 0x55AC, 0x8BAB, 0x5883, 0x8BAC, 0x5CE1,
02181     0x8BAD, 0x5F37, 0x8BAE, 0x5F4A, 0x8BAF, 0x602F, 0x8BB0, 0x6050,
02182     0x8BB1, 0x606D, 0x8BB2, 0x631F, 0x8BB3, 0x6559, 0x8BB4, 0x6A4B,
02183     0x8BB5, 0x6CC1, 0x8BB6, 0x72C2, 0x8BB7, 0x72ED, 0x8BB8, 0x77EF,
02184     0x8BB9, 0x80F8, 0x8BBA, 0x8105, 0x8BBB, 0x8208, 0x8BBC, 0x854E,
02185     0x8BBD, 0x90F7, 0x8BBE, 0x93E1, 0x8BBF, 0x97FF, 0x8BC0, 0x9957,
02186     0x8BC1, 0x9A5A, 0x8BC2, 0x4EF0, 0x8BC3, 0x51DD, 0x8BC4, 0x5C2D,
02187     0x8BC5, 0x6681, 0x8BC6, 0x696D, 0x8BC7, 0x5C40, 0x8BC8, 0x66F2,
02188     0x8BC9, 0x6975, 0x8BCA, 0x7389, 0x8BCB, 0x6850, 0x8BCC, 0x7C81,
02189     0x8BCD, 0x50C5, 0x8BCE, 0x52E4, 0x8BCF, 0x5747, 0x8BD0, 0x5DFE,
02190     0x8BD1, 0x9326, 0x8BD2, 0x65A4, 0x8BD3, 0x6B23, 0x8BD4, 0x6B3D,
02191     0x8BD5, 0x7434, 0x8BD6, 0x7981, 0x8BD7, 0x79BD, 0x8BD8, 0x7B4B,
02192     0x8BD9, 0x7DCA, 0x8BDA, 0x82B9, 0x8BDB, 0x83CC, 0x8BDC, 0x887F,
02193     0x8BDD, 0x895F, 0x8BDE, 0x8B39, 0x8BDF, 0x8FD1, 0x8BE0, 0x91D1,
02194     0x8BE1, 0x541F, 0x8BE2, 0x9280, 0x8BE3, 0x4E5D, 0x8BE4, 0x5036,
02195     0x8BE5, 0x53E5, 0x8BE6, 0x533A, 0x8BE7, 0x72D7, 0x8BE8, 0x7396,
02196     0x8BE9, 0x77E9, 0x8BEA, 0x82E6, 0x8BEB, 0x8EAF, 0x8BEC, 0x99C6,
02197     0x8BED, 0x99C8, 0x8BEE, 0x99D2, 0x8BEF, 0x5177, 0x8BF0, 0x611A,
02198     0x8BF1, 0x865E, 0x8BF2, 0x55B0, 0x8BF3, 0x7A7A, 0x8BF4, 0x5076,
02199     0x8BF5, 0x5BD3, 0x8BF6, 0x9047, 0x8BF7, 0x9685, 0x8BF8, 0x4E32,
02200     0x8BF9, 0x6ADB, 0x8BFA, 0x91E7, 0x8BFB, 0x5C51, 0x8BFC, 0x5C48,
02201     0x8C40, 0x6398, 0x8C41, 0x7A9F, 0x8C42, 0x6C93, 0x8C43, 0x9774,
02202     0x8C44, 0x8F61, 0x8C45, 0x7AAA, 0x8C46, 0x718A, 0x8C47, 0x9688,
02203     0x8C48, 0x7C82, 0x8C49, 0x6817, 0x8C4A, 0x7E70, 0x8C4B, 0x6851,
02204     0x8C4C, 0x936C, 0x8C4D, 0x52F2, 0x8C4E, 0x541B, 0x8C4F, 0x85AB,
02205     0x8C50, 0x8A13, 0x8C51, 0x7FA4, 0x8C52, 0x8ECD, 0x8C53, 0x90E1,
02206     0x8C54, 0x5366, 0x8C55, 0x8888, 0x8C56, 0x7941, 0x8C57, 0x4FC2,
02207     0x8C58, 0x50BE, 0x8C59, 0x5211, 0x8C5A, 0x5144, 0x8C5B, 0x5553,
02208     0x8C5C, 0x572D, 0x8C5D, 0x73EA, 0x8C5E, 0x578B, 0x8C5F, 0x5951,
02209     0x8C60, 0x5F62, 0x8C61, 0x5F84, 0x8C62, 0x6075, 0x8C63, 0x6176,
02210     0x8C64, 0x6167, 0x8C65, 0x61A9, 0x8C66, 0x63B2, 0x8C67, 0x643A,
02211     0x8C68, 0x656C, 0x8C69, 0x666F, 0x8C6A, 0x6842, 0x8C6B, 0x6E13,
02212     0x8C6C, 0x7566, 0x8C6D, 0x7A3D, 0x8C6E, 0x7CFB, 0x8C6F, 0x7D4C,
02213     0x8C70, 0x7D99, 0x8C71, 0x7E4B, 0x8C72, 0x7F6B, 0x8C73, 0x830E,
02214     0x8C74, 0x834A, 0x8C75, 0x86CD, 0x8C76, 0x8A08, 0x8C77, 0x8A63,
02215     0x8C78, 0x8B66, 0x8C79, 0x8EFD, 0x8C7A, 0x981A, 0x8C7B, 0x9D8F,
02216     0x8C7C, 0x82B8, 0x8C7D, 0x8FCE, 0x8C7E, 0x9BE8, 0x8C80, 0x5287,
02217     0x8C81, 0x621F, 0x8C82, 0x6483, 0x8C83, 0x6FC0, 0x8C84, 0x9699,
02218     0x8C85, 0x6841, 0x8C86, 0x5091, 0x8C87, 0x6B20, 0x8C88, 0x6C7A,
02219     0x8C89, 0x6F54, 0x8C8A, 0x7A74, 0x8C8B, 0x7D50, 0x8C8C, 0x8840,
02220     0x8C8D, 0x8A23, 0x8C8E, 0x6708, 0x8C8F, 0x4EF6, 0x8C90, 0x5039,
02221     0x8C91, 0x5026, 0x8C92, 0x5065, 0x8C93, 0x517C, 0x8C94, 0x5238,
02222     0x8C95, 0x5263, 0x8C96, 0x55A7, 0x8C97, 0x570F, 0x8C98, 0x5805,
02223     0x8C99, 0x5ACC, 0x8C9A, 0x5EFA, 0x8C9B, 0x61B2, 0x8C9C, 0x61F8,
02224     0x8C9D, 0x62F3, 0x8C9E, 0x6372, 0x8C9F, 0x691C, 0x8CA0, 0x6A29,
02225     0x8CA1, 0x727D, 0x8CA2, 0x72AC, 0x8CA3, 0x732E, 0x8CA4, 0x7814,
02226     0x8CA5, 0x786F, 0x8CA6, 0x7D79, 0x8CA7, 0x770C, 0x8CA8, 0x80A9,
02227     0x8CA9, 0x898B, 0x8CAA, 0x8B19, 0x8CAB, 0x8CE2, 0x8CAC, 0x8ED2,
02228     0x8CAD, 0x9063, 0x8CAE, 0x9375, 0x8CAF, 0x967A, 0x8CB0, 0x9855,
02229     0x8CB1, 0x9A13, 0x8CB2, 0x9E78, 0x8CB3, 0x5143, 0x8CB4, 0x539F,
02230     0x8CB5, 0x53B3, 0x8CB6, 0x5E7B, 0x8CB7, 0x5F26, 0x8CB8, 0x6E1B,
02231     0x8CB9, 0x6E90, 0x8CBA, 0x7384, 0x8CBB, 0x73FE, 0x8CBC, 0x7D43,
02232     0x8CBD, 0x8237, 0x8CBE, 0x8A00, 0x8CBF, 0x8AFA, 0x8CC0, 0x9650,
02233     0x8CC1, 0x4E4E, 0x8CC2, 0x500B, 0x8CC3, 0x53E4, 0x8CC4, 0x547C,
02234     0x8CC5, 0x56FA, 0x8CC6, 0x59D1, 0x8CC7, 0x5B64, 0x8CC8, 0x5DF1,
02235     0x8CC9, 0x5EAB, 0x8CCA, 0x5F27, 0x8CCB, 0x6238, 0x8CCC, 0x6545,
02236     0x8CCD, 0x67AF, 0x8CCE, 0x6E56, 0x8CCF, 0x72D0, 0x8CD0, 0x7CCA,
02237     0x8CD1, 0x88B4, 0x8CD2, 0x80A1, 0x8CD3, 0x80E1, 0x8CD4, 0x83F0,
02238     0x8CD5, 0x864E, 0x8CD6, 0x8A87, 0x8CD7, 0x8DE8, 0x8CD8, 0x9237,
02239     0x8CD9, 0x96C7, 0x8CDA, 0x9867, 0x8CDB, 0x9F13, 0x8CDC, 0x4E94,
02240     0x8CDD, 0x4E92, 0x8CDE, 0x4F0D, 0x8CDF, 0x5348, 0x8CE0, 0x5449,
02241     0x8CE1, 0x543E, 0x8CE2, 0x5A2F, 0x8CE3, 0x5F8C, 0x8CE4, 0x5FA1,
02242     0x8CE5, 0x609F, 0x8CE6, 0x68A7, 0x8CE7, 0x6A8E, 0x8CE8, 0x745A,
02243     0x8CE9, 0x7881, 0x8CEA, 0x8A9E, 0x8CEB, 0x8AA4, 0x8CEC, 0x8B77,
02244     0x8CED, 0x9190, 0x8CEE, 0x4E5E, 0x8CEF, 0x9BC9, 0x8CF0, 0x4EA4,
02245     0x8CF1, 0x4F7C, 0x8CF2, 0x4FAF, 0x8CF3, 0x5019, 0x8CF4, 0x5016,
02246     0x8CF5, 0x5149, 0x8CF6, 0x516C, 0x8CF7, 0x529F, 0x8CF8, 0x52B9,
02247     0x8CF9, 0x52FE, 0x8CFA, 0x539A, 0x8CFB, 0x53E3, 0x8CFC, 0x5411,
02248     0x8D40, 0x540E, 0x8D41, 0x5589, 0x8D42, 0x5751, 0x8D43, 0x57A2,
02249     0x8D44, 0x597D, 0x8D45, 0x5B54, 0x8D46, 0x5B5D, 0x8D47, 0x5B8F,
02250     0x8D48, 0x5DE5, 0x8D49, 0x5DE7, 0x8D4A, 0x5DF7, 0x8D4B, 0x5E78,
02251     0x8D4C, 0x5E83, 0x8D4D, 0x5E9A, 0x8D4E, 0x5EB7, 0x8D4F, 0x5F18,
02252     0x8D50, 0x6052, 0x8D51, 0x614C, 0x8D52, 0x6297, 0x8D53, 0x62D8,
02253     0x8D54, 0x63A7, 0x8D55, 0x653B, 0x8D56, 0x6602, 0x8D57, 0x6643,
02254     0x8D58, 0x66F4, 0x8D59, 0x676D, 0x8D5A, 0x6821, 0x8D5B, 0x6897,
02255     0x8D5C, 0x69CB, 0x8D5D, 0x6C5F, 0x8D5E, 0x6D2A, 0x8D5F, 0x6D69,
02256     0x8D60, 0x6E2F, 0x8D61, 0x6E9D, 0x8D62, 0x7532, 0x8D63, 0x7687,
02257     0x8D64, 0x786C, 0x8D65, 0x7A3F, 0x8D66, 0x7CE0, 0x8D67, 0x7D05,
02258     0x8D68, 0x7D18, 0x8D69, 0x7D5E, 0x8D6A, 0x7DB1, 0x8D6B, 0x8015,
02259     0x8D6C, 0x8003, 0x8D6D, 0x80AF, 0x8D6E, 0x80B1, 0x8D6F, 0x8154,
02260     0x8D70, 0x818F, 0x8D71, 0x822A, 0x8D72, 0x8352, 0x8D73, 0x884C,
02261     0x8D74, 0x8861, 0x8D75, 0x8B1B, 0x8D76, 0x8CA2, 0x8D77, 0x8CFC,
02262     0x8D78, 0x90CA, 0x8D79, 0x9175, 0x8D7A, 0x9271, 0x8D7B, 0x783F,
02263     0x8D7C, 0x92FC, 0x8D7D, 0x95A4, 0x8D7E, 0x964D, 0x8D80, 0x9805,
02264     0x8D81, 0x9999, 0x8D82, 0x9AD8, 0x8D83, 0x9D3B, 0x8D84, 0x525B,
02265     0x8D85, 0x52AB, 0x8D86, 0x53F7, 0x8D87, 0x5408, 0x8D88, 0x58D5,
02266     0x8D89, 0x62F7, 0x8D8A, 0x6FE0, 0x8D8B, 0x8C6A, 0x8D8C, 0x8F5F,
02267     0x8D8D, 0x9EB9, 0x8D8E, 0x514B, 0x8D8F, 0x523B, 0x8D90, 0x544A,
02268     0x8D91, 0x56FD, 0x8D92, 0x7A40, 0x8D93, 0x9177, 0x8D94, 0x9D60,
02269     0x8D95, 0x9ED2, 0x8D96, 0x7344, 0x8D97, 0x6F09, 0x8D98, 0x8170,
02270     0x8D99, 0x7511, 0x8D9A, 0x5FFD, 0x8D9B, 0x60DA, 0x8D9C, 0x9AA8,
02271     0x8D9D, 0x72DB, 0x8D9E, 0x8FBC, 0x8D9F, 0x6B64, 0x8DA0, 0x9803,
02272     0x8DA1, 0x4ECA, 0x8DA2, 0x56F0, 0x8DA3, 0x5764, 0x8DA4, 0x58BE,
02273     0x8DA5, 0x5A5A, 0x8DA6, 0x6068, 0x8DA7, 0x61C7, 0x8DA8, 0x660F,
02274     0x8DA9, 0x6606, 0x8DAA, 0x6839, 0x8DAB, 0x68B1, 0x8DAC, 0x6DF7,
02275     0x8DAD, 0x75D5, 0x8DAE, 0x7D3A, 0x8DAF, 0x826E, 0x8DB0, 0x9B42,
02276     0x8DB1, 0x4E9B, 0x8DB2, 0x4F50, 0x8DB3, 0x53C9, 0x8DB4, 0x5506,
02277     0x8DB5, 0x5D6F, 0x8DB6, 0x5DE6, 0x8DB7, 0x5DEE, 0x8DB8, 0x67FB,
02278     0x8DB9, 0x6C99, 0x8DBA, 0x7473, 0x8DBB, 0x7802, 0x8DBC, 0x8A50,
02279     0x8DBD, 0x9396, 0x8DBE, 0x88DF, 0x8DBF, 0x5750, 0x8DC0, 0x5EA7,
02280     0x8DC1, 0x632B, 0x8DC2, 0x50B5, 0x8DC3, 0x50AC, 0x8DC4, 0x518D,
02281     0x8DC5, 0x6700, 0x8DC6, 0x54C9, 0x8DC7, 0x585E, 0x8DC8, 0x59BB,
02282     0x8DC9, 0x5BB0, 0x8DCA, 0x5F69, 0x8DCB, 0x624D, 0x8DCC, 0x63A1,
02283     0x8DCD, 0x683D, 0x8DCE, 0x6B73, 0x8DCF, 0x6E08, 0x8DD0, 0x707D,
02284     0x8DD1, 0x91C7, 0x8DD2, 0x7280, 0x8DD3, 0x7815, 0x8DD4, 0x7826,
02285     0x8DD5, 0x796D, 0x8DD6, 0x658E, 0x8DD7, 0x7D30, 0x8DD8, 0x83DC,
02286     0x8DD9, 0x88C1, 0x8DDA, 0x8F09, 0x8DDB, 0x969B, 0x8DDC, 0x5264,
02287     0x8DDD, 0x5728, 0x8DDE, 0x6750, 0x8DDF, 0x7F6A, 0x8DE0, 0x8CA1,
02288     0x8DE1, 0x51B4, 0x8DE2, 0x5742, 0x8DE3, 0x962A, 0x8DE4, 0x583A,
02289     0x8DE5, 0x698A, 0x8DE6, 0x80B4, 0x8DE7, 0x54B2, 0x8DE8, 0x5D0E,
02290     0x8DE9, 0x57FC, 0x8DEA, 0x7895, 0x8DEB, 0x9DFA, 0x8DEC, 0x4F5C,
02291     0x8DED, 0x524A, 0x8DEE, 0x548B, 0x8DEF, 0x643E, 0x8DF0, 0x6628,
02292     0x8DF1, 0x6714, 0x8DF2, 0x67F5, 0x8DF3, 0x7A84, 0x8DF4, 0x7B56,
02293     0x8DF5, 0x7D22, 0x8DF6, 0x932F, 0x8DF7, 0x685C, 0x8DF8, 0x9BAD,
02294     0x8DF9, 0x7B39, 0x8DFA, 0x5319, 0x8DFB, 0x518A, 0x8DFC, 0x5237,
02295     0x8E40, 0x5BDF, 0x8E41, 0x62F6, 0x8E42, 0x64AE, 0x8E43, 0x64E6,
02296     0x8E44, 0x672D, 0x8E45, 0x6BBA, 0x8E46, 0x85A9, 0x8E47, 0x96D1,
02297     0x8E48, 0x7690, 0x8E49, 0x9BD6, 0x8E4A, 0x634C, 0x8E4B, 0x9306,
02298     0x8E4C, 0x9BAB, 0x8E4D, 0x76BF, 0x8E4E, 0x6652, 0x8E4F, 0x4E09,
02299     0x8E50, 0x5098, 0x8E51, 0x53C2, 0x8E52, 0x5C71, 0x8E53, 0x60E8,
02300     0x8E54, 0x6492, 0x8E55, 0x6563, 0x8E56, 0x685F, 0x8E57, 0x71E6,
02301     0x8E58, 0x73CA, 0x8E59, 0x7523, 0x8E5A, 0x7B97, 0x8E5B, 0x7E82,
02302     0x8E5C, 0x8695, 0x8E5D, 0x8B83, 0x8E5E, 0x8CDB, 0x8E5F, 0x9178,
02303     0x8E60, 0x9910, 0x8E61, 0x65AC, 0x8E62, 0x66AB, 0x8E63, 0x6B8B,
02304     0x8E64, 0x4ED5, 0x8E65, 0x4ED4, 0x8E66, 0x4F3A, 0x8E67, 0x4F7F,
02305     0x8E68, 0x523A, 0x8E69, 0x53F8, 0x8E6A, 0x53F2, 0x8E6B, 0x55E3,
02306     0x8E6C, 0x56DB, 0x8E6D, 0x58EB, 0x8E6E, 0x59CB, 0x8E6F, 0x59C9,
02307     0x8E70, 0x59FF, 0x8E71, 0x5B50, 0x8E72, 0x5C4D, 0x8E73, 0x5E02,
02308     0x8E74, 0x5E2B, 0x8E75, 0x5FD7, 0x8E76, 0x601D, 0x8E77, 0x6307,
02309     0x8E78, 0x652F, 0x8E79, 0x5B5C, 0x8E7A, 0x65AF, 0x8E7B, 0x65BD,
02310     0x8E7C, 0x65E8, 0x8E7D, 0x679D, 0x8E7E, 0x6B62, 0x8E80, 0x6B7B,
02311     0x8E81, 0x6C0F, 0x8E82, 0x7345, 0x8E83, 0x7949, 0x8E84, 0x79C1,
02312     0x8E85, 0x7CF8, 0x8E86, 0x7D19, 0x8E87, 0x7D2B, 0x8E88, 0x80A2,
02313     0x8E89, 0x8102, 0x8E8A, 0x81F3, 0x8E8B, 0x8996, 0x8E8C, 0x8A5E,
02314     0x8E8D, 0x8A69, 0x8E8E, 0x8A66, 0x8E8F, 0x8A8C, 0x8E90, 0x8AEE,
02315     0x8E91, 0x8CC7, 0x8E92, 0x8CDC, 0x8E93, 0x96CC, 0x8E94, 0x98FC,
02316     0x8E95, 0x6B6F, 0x8E96, 0x4E8B, 0x8E97, 0x4F3C, 0x8E98, 0x4F8D,
02317     0x8E99, 0x5150, 0x8E9A, 0x5B57, 0x8E9B, 0x5BFA, 0x8E9C, 0x6148,
02318     0x8E9D, 0x6301, 0x8E9E, 0x6642, 0x8E9F, 0x6B21, 0x8EA0, 0x6ECB,
02319     0x8EA1, 0x6CBB, 0x8EA2, 0x723E, 0x8EA3, 0x74BD, 0x8EA4, 0x75D4,
02320     0x8EA5, 0x78C1, 0x8EA6, 0x793A, 0x8EA7, 0x800C, 0x8EA8, 0x8033,
02321     0x8EA9, 0x81EA, 0x8EAA, 0x8494, 0x8EAB, 0x8F9E, 0x8EAC, 0x6C50,
02322     0x8EAD, 0x9E7F, 0x8EAE, 0x5F0F, 0x8EAF, 0x8B58, 0x8EB0, 0x9D2B,
02323     0x8EB1, 0x7AFA, 0x8EB2, 0x8EF8, 0x8EB3, 0x5B8D, 0x8EB4, 0x96EB,
02324     0x8EB5, 0x4E03, 0x8EB6, 0x53F1, 0x8EB7, 0x57F7, 0x8EB8, 0x5931,
02325     0x8EB9, 0x5AC9, 0x8EBA, 0x5BA4, 0x8EBB, 0x6089, 0x8EBC, 0x6E7F,
02326     0x8EBD, 0x6F06, 0x8EBE, 0x75BE, 0x8EBF, 0x8CEA, 0x8EC0, 0x5B9F,
02327     0x8EC1, 0x8500, 0x8EC2, 0x7BE0, 0x8EC3, 0x5072, 0x8EC4, 0x67F4,
02328     0x8EC5, 0x829D, 0x8EC6, 0x5C61, 0x8EC7, 0x854A, 0x8EC8, 0x7E1E,
02329     0x8EC9, 0x820E, 0x8ECA, 0x5199, 0x8ECB, 0x5C04, 0x8ECC, 0x6368,
02330     0x8ECD, 0x8D66, 0x8ECE, 0x659C, 0x8ECF, 0x716E, 0x8ED0, 0x793E,
02331     0x8ED1, 0x7D17, 0x8ED2, 0x8005, 0x8ED3, 0x8B1D, 0x8ED4, 0x8ECA,
02332     0x8ED5, 0x906E, 0x8ED6, 0x86C7, 0x8ED7, 0x90AA, 0x8ED8, 0x501F,
02333     0x8ED9, 0x52FA, 0x8EDA, 0x5C3A, 0x8EDB, 0x6753, 0x8EDC, 0x707C,
02334     0x8EDD, 0x7235, 0x8EDE, 0x914C, 0x8EDF, 0x91C8, 0x8EE0, 0x932B,
02335     0x8EE1, 0x82E5, 0x8EE2, 0x5BC2, 0x8EE3, 0x5F31, 0x8EE4, 0x60F9,
02336     0x8EE5, 0x4E3B, 0x8EE6, 0x53D6, 0x8EE7, 0x5B88, 0x8EE8, 0x624B,
02337     0x8EE9, 0x6731, 0x8EEA, 0x6B8A, 0x8EEB, 0x72E9, 0x8EEC, 0x73E0,
02338     0x8EED, 0x7A2E, 0x8EEE, 0x816B, 0x8EEF, 0x8DA3, 0x8EF0, 0x9152,
02339     0x8EF1, 0x9996, 0x8EF2, 0x5112, 0x8EF3, 0x53D7, 0x8EF4, 0x546A,
02340     0x8EF5, 0x5BFF, 0x8EF6, 0x6388, 0x8EF7, 0x6A39, 0x8EF8, 0x7DAC,
02341     0x8EF9, 0x9700, 0x8EFA, 0x56DA, 0x8EFB, 0x53CE, 0x8EFC, 0x5468,
02342     0x8F40, 0x5B97, 0x8F41, 0x5C31, 0x8F42, 0x5DDE, 0x8F43, 0x4FEE,
02343     0x8F44, 0x6101, 0x8F45, 0x62FE, 0x8F46, 0x6D32, 0x8F47, 0x79C0,
02344     0x8F48, 0x79CB, 0x8F49, 0x7D42, 0x8F4A, 0x7E4D, 0x8F4B, 0x7FD2,
02345     0x8F4C, 0x81ED, 0x8F4D, 0x821F, 0x8F4E, 0x8490, 0x8F4F, 0x8846,
02346     0x8F50, 0x8972, 0x8F51, 0x8B90, 0x8F52, 0x8E74, 0x8F53, 0x8F2F,
02347     0x8F54, 0x9031, 0x8F55, 0x914B, 0x8F56, 0x916C, 0x8F57, 0x96C6,
02348     0x8F58, 0x919C, 0x8F59, 0x4EC0, 0x8F5A, 0x4F4F, 0x8F5B, 0x5145,
02349     0x8F5C, 0x5341, 0x8F5D, 0x5F93, 0x8F5E, 0x620E, 0x8F5F, 0x67D4,
02350     0x8F60, 0x6C41, 0x8F61, 0x6E0B, 0x8F62, 0x7363, 0x8F63, 0x7E26,
02351     0x8F64, 0x91CD, 0x8F65, 0x9283, 0x8F66, 0x53D4, 0x8F67, 0x5919,
02352     0x8F68, 0x5BBF, 0x8F69, 0x6DD1, 0x8F6A, 0x795D, 0x8F6B, 0x7E2E,
02353     0x8F6C, 0x7C9B, 0x8F6D, 0x587E, 0x8F6E, 0x719F, 0x8F6F, 0x51FA,
02354     0x8F70, 0x8853, 0x8F71, 0x8FF0, 0x8F72, 0x4FCA, 0x8F73, 0x5CFB,
02355     0x8F74, 0x6625, 0x8F75, 0x77AC, 0x8F76, 0x7AE3, 0x8F77, 0x821C,
02356     0x8F78, 0x99FF, 0x8F79, 0x51C6, 0x8F7A, 0x5FAA, 0x8F7B, 0x65EC,
02357     0x8F7C, 0x696F, 0x8F7D, 0x6B89, 0x8F7E, 0x6DF3, 0x8F80, 0x6E96,
02358     0x8F81, 0x6F64, 0x8F82, 0x76FE, 0x8F83, 0x7D14, 0x8F84, 0x5DE1,
02359     0x8F85, 0x9075, 0x8F86, 0x9187, 0x8F87, 0x9806, 0x8F88, 0x51E6,
02360     0x8F89, 0x521D, 0x8F8A, 0x6240, 0x8F8B, 0x6691, 0x8F8C, 0x66D9,
02361     0x8F8D, 0x6E1A, 0x8F8E, 0x5EB6, 0x8F8F, 0x7DD2, 0x8F90, 0x7F72,
02362     0x8F91, 0x66F8, 0x8F92, 0x85AF, 0x8F93, 0x85F7, 0x8F94, 0x8AF8,
02363     0x8F95, 0x52A9, 0x8F96, 0x53D9, 0x8F97, 0x5973, 0x8F98, 0x5E8F,
02364     0x8F99, 0x5F90, 0x8F9A, 0x6055, 0x8F9B, 0x92E4, 0x8F9C, 0x9664,
02365     0x8F9D, 0x50B7, 0x8F9E, 0x511F, 0x8F9F, 0x52DD, 0x8FA0, 0x5320,
02366     0x8FA1, 0x5347, 0x8FA2, 0x53EC, 0x8FA3, 0x54E8, 0x8FA4, 0x5546,
02367     0x8FA5, 0x5531, 0x8FA6, 0x5617, 0x8FA7, 0x5968, 0x8FA8, 0x59BE,
02368     0x8FA9, 0x5A3C, 0x8FAA, 0x5BB5, 0x8FAB, 0x5C06, 0x8FAC, 0x5C0F,
02369     0x8FAD, 0x5C11, 0x8FAE, 0x5C1A, 0x8FAF, 0x5E84, 0x8FB0, 0x5E8A,
02370     0x8FB1, 0x5EE0, 0x8FB2, 0x5F70, 0x8FB3, 0x627F, 0x8FB4, 0x6284,
02371     0x8FB5, 0x62DB, 0x8FB6, 0x638C, 0x8FB7, 0x6377, 0x8FB8, 0x6607,
02372     0x8FB9, 0x660C, 0x8FBA, 0x662D, 0x8FBB, 0x6676, 0x8FBC, 0x677E,
02373     0x8FBD, 0x68A2, 0x8FBE, 0x6A1F, 0x8FBF, 0x6A35, 0x8FC0, 0x6CBC,
02374     0x8FC1, 0x6D88, 0x8FC2, 0x6E09, 0x8FC3, 0x6E58, 0x8FC4, 0x713C,
02375     0x8FC5, 0x7126, 0x8FC6, 0x7167, 0x8FC7, 0x75C7, 0x8FC8, 0x7701,
02376     0x8FC9, 0x785D, 0x8FCA, 0x7901, 0x8FCB, 0x7965, 0x8FCC, 0x79F0,
02377     0x8FCD, 0x7AE0, 0x8FCE, 0x7B11, 0x8FCF, 0x7CA7, 0x8FD0, 0x7D39,
02378     0x8FD1, 0x8096, 0x8FD2, 0x83D6, 0x8FD3, 0x848B, 0x8FD4, 0x8549,
02379     0x8FD5, 0x885D, 0x8FD6, 0x88F3, 0x8FD7, 0x8A1F, 0x8FD8, 0x8A3C,
02380     0x8FD9, 0x8A54, 0x8FDA, 0x8A73, 0x8FDB, 0x8C61, 0x8FDC, 0x8CDE,
02381     0x8FDD, 0x91A4, 0x8FDE, 0x9266, 0x8FDF, 0x937E, 0x8FE0, 0x9418,
02382     0x8FE1, 0x969C, 0x8FE2, 0x9798, 0x8FE3, 0x4E0A, 0x8FE4, 0x4E08,
02383     0x8FE5, 0x4E1E, 0x8FE6, 0x4E57, 0x8FE7, 0x5197, 0x8FE8, 0x5270,
02384     0x8FE9, 0x57CE, 0x8FEA, 0x5834, 0x8FEB, 0x58CC, 0x8FEC, 0x5B22,
02385     0x8FED, 0x5E38, 0x8FEE, 0x60C5, 0x8FEF, 0x64FE, 0x8FF0, 0x6761,
02386     0x8FF1, 0x6756, 0x8FF2, 0x6D44, 0x8FF3, 0x72B6, 0x8FF4, 0x7573,
02387     0x8FF5, 0x7A63, 0x8FF6, 0x84B8, 0x8FF7, 0x8B72, 0x8FF8, 0x91B8,
02388     0x8FF9, 0x9320, 0x8FFA, 0x5631, 0x8FFB, 0x57F4, 0x8FFC, 0x98FE,
02389     0x9040, 0x62ED, 0x9041, 0x690D, 0x9042, 0x6B96, 0x9043, 0x71ED,
02390     0x9044, 0x7E54, 0x9045, 0x8077, 0x9046, 0x8272, 0x9047, 0x89E6,
02391     0x9048, 0x98DF, 0x9049, 0x8755, 0x904A, 0x8FB1, 0x904B, 0x5C3B,
02392     0x904C, 0x4F38, 0x904D, 0x4FE1, 0x904E, 0x4FB5, 0x904F, 0x5507,
02393     0x9050, 0x5A20, 0x9051, 0x5BDD, 0x9052, 0x5BE9, 0x9053, 0x5FC3,
02394     0x9054, 0x614E, 0x9055, 0x632F, 0x9056, 0x65B0, 0x9057, 0x664B,
02395     0x9058, 0x68EE, 0x9059, 0x699B, 0x905A, 0x6D78, 0x905B, 0x6DF1,
02396     0x905C, 0x7533, 0x905D, 0x75B9, 0x905E, 0x771F, 0x905F, 0x795E,
02397     0x9060, 0x79E6, 0x9061, 0x7D33, 0x9062, 0x81E3, 0x9063, 0x82AF,
02398     0x9064, 0x85AA, 0x9065, 0x89AA, 0x9066, 0x8A3A, 0x9067, 0x8EAB,
02399     0x9068, 0x8F9B, 0x9069, 0x9032, 0x906A, 0x91DD, 0x906B, 0x9707,
02400     0x906C, 0x4EBA, 0x906D, 0x4EC1, 0x906E, 0x5203, 0x906F, 0x5875,
02401     0x9070, 0x58EC, 0x9071, 0x5C0B, 0x9072, 0x751A, 0x9073, 0x5C3D,
02402     0x9074, 0x814E, 0x9075, 0x8A0A, 0x9076, 0x8FC5, 0x9077, 0x9663,
02403     0x9078, 0x976D, 0x9079, 0x7B25, 0x907A, 0x8ACF, 0x907B, 0x9808,
02404     0x907C, 0x9162, 0x907D, 0x56F3, 0x907E, 0x53A8, 0x9080, 0x9017,
02405     0x9081, 0x5439, 0x9082, 0x5782, 0x9083, 0x5E25, 0x9084, 0x63A8,
02406     0x9085, 0x6C34, 0x9086, 0x708A, 0x9087, 0x7761, 0x9088, 0x7C8B,
02407     0x9089, 0x7FE0, 0x908A, 0x8870, 0x908B, 0x9042, 0x908C, 0x9154,
02408     0x908D, 0x9310, 0x908E, 0x9318, 0x908F, 0x968F, 0x9090, 0x745E,
02409     0x9091, 0x9AC4, 0x9092, 0x5D07, 0x9093, 0x5D69, 0x9094, 0x6570,
02410     0x9095, 0x67A2, 0x9096, 0x8DA8, 0x9097, 0x96DB, 0x9098, 0x636E,
02411     0x9099, 0x6749, 0x909A, 0x6919, 0x909B, 0x83C5, 0x909C, 0x9817,
02412     0x909D, 0x96C0, 0x909E, 0x88FE, 0x909F, 0x6F84, 0x90A0, 0x647A,
02413     0x90A1, 0x5BF8, 0x90A2, 0x4E16, 0x90A3, 0x702C, 0x90A4, 0x755D,
02414     0x90A5, 0x662F, 0x90A6, 0x51C4, 0x90A7, 0x5236, 0x90A8, 0x52E2,
02415     0x90A9, 0x59D3, 0x90AA, 0x5F81, 0x90AB, 0x6027, 0x90AC, 0x6210,
02416     0x90AD, 0x653F, 0x90AE, 0x6574, 0x90AF, 0x661F, 0x90B0, 0x6674,
02417     0x90B1, 0x68F2, 0x90B2, 0x6816, 0x90B3, 0x6B63, 0x90B4, 0x6E05,
02418     0x90B5, 0x7272, 0x90B6, 0x751F, 0x90B7, 0x76DB, 0x90B8, 0x7CBE,
02419     0x90B9, 0x8056, 0x90BA, 0x58F0, 0x90BB, 0x88FD, 0x90BC, 0x897F,
02420     0x90BD, 0x8AA0, 0x90BE, 0x8A93, 0x90BF, 0x8ACB, 0x90C0, 0x901D,
02421     0x90C1, 0x9192, 0x90C2, 0x9752, 0x90C3, 0x9759, 0x90C4, 0x6589,
02422     0x90C5, 0x7A0E, 0x90C6, 0x8106, 0x90C7, 0x96BB, 0x90C8, 0x5E2D,
02423     0x90C9, 0x60DC, 0x90CA, 0x621A, 0x90CB, 0x65A5, 0x90CC, 0x6614,
02424     0x90CD, 0x6790, 0x90CE, 0x77F3, 0x90CF, 0x7A4D, 0x90D0, 0x7C4D,
02425     0x90D1, 0x7E3E, 0x90D2, 0x810A, 0x90D3, 0x8CAC, 0x90D4, 0x8D64,
02426     0x90D5, 0x8DE1, 0x90D6, 0x8E5F, 0x90D7, 0x78A9, 0x90D8, 0x5207,
02427     0x90D9, 0x62D9, 0x90DA, 0x63A5, 0x90DB, 0x6442, 0x90DC, 0x6298,
02428     0x90DD, 0x8A2D, 0x90DE, 0x7A83, 0x90DF, 0x7BC0, 0x90E0, 0x8AAC,
02429     0x90E1, 0x96EA, 0x90E2, 0x7D76, 0x90E3, 0x820C, 0x90E4, 0x8749,
02430     0x90E5, 0x4ED9, 0x90E6, 0x5148, 0x90E7, 0x5343, 0x90E8, 0x5360,
02431     0x90E9, 0x5BA3, 0x90EA, 0x5C02, 0x90EB, 0x5C16, 0x90EC, 0x5DDD,
02432     0x90ED, 0x6226, 0x90EE, 0x6247, 0x90EF, 0x64B0, 0x90F0, 0x6813,
02433     0x90F1, 0x6834, 0x90F2, 0x6CC9, 0x90F3, 0x6D45, 0x90F4, 0x6D17,
02434     0x90F5, 0x67D3, 0x90F6, 0x6F5C, 0x90F7, 0x714E, 0x90F8, 0x717D,
02435     0x90F9, 0x65CB, 0x90FA, 0x7A7F, 0x90FB, 0x7BAD, 0x90FC, 0x7DDA,
02436     0x9140, 0x7E4A, 0x9141, 0x7FA8, 0x9142, 0x817A, 0x9143, 0x821B,
02437     0x9144, 0x8239, 0x9145, 0x85A6, 0x9146, 0x8A6E, 0x9147, 0x8CCE,
02438     0x9148, 0x8DF5, 0x9149, 0x9078, 0x914A, 0x9077, 0x914B, 0x92AD,
02439     0x914C, 0x9291, 0x914D, 0x9583, 0x914E, 0x9BAE, 0x914F, 0x524D,
02440     0x9150, 0x5584, 0x9151, 0x6F38, 0x9152, 0x7136, 0x9153, 0x5168,
02441     0x9154, 0x7985, 0x9155, 0x7E55, 0x9156, 0x81B3, 0x9157, 0x7CCE,
02442     0x9158, 0x564C, 0x9159, 0x5851, 0x915A, 0x5CA8, 0x915B, 0x63AA,
02443     0x915C, 0x66FE, 0x915D, 0x66FD, 0x915E, 0x695A, 0x915F, 0x72D9,
02444     0x9160, 0x758F, 0x9161, 0x758E, 0x9162, 0x790E, 0x9163, 0x7956,
02445     0x9164, 0x79DF, 0x9165, 0x7C97, 0x9166, 0x7D20, 0x9167, 0x7D44,
02446     0x9168, 0x8607, 0x9169, 0x8A34, 0x916A, 0x963B, 0x916B, 0x9061,
02447     0x916C, 0x9F20, 0x916D, 0x50E7, 0x916E, 0x5275, 0x916F, 0x53CC,
02448     0x9170, 0x53E2, 0x9171, 0x5009, 0x9172, 0x55AA, 0x9173, 0x58EE,
02449     0x9174, 0x594F, 0x9175, 0x723D, 0x9176, 0x5B8B, 0x9177, 0x5C64,
02450     0x9178, 0x531D, 0x9179, 0x60E3, 0x917A, 0x60F3, 0x917B, 0x635C,
02451     0x917C, 0x6383, 0x917D, 0x633F, 0x917E, 0x63BB, 0x9180, 0x64CD,
02452     0x9181, 0x65E9, 0x9182, 0x66F9, 0x9183, 0x5DE3, 0x9184, 0x69CD,
02453     0x9185, 0x69FD, 0x9186, 0x6F15, 0x9187, 0x71E5, 0x9188, 0x4E89,
02454     0x9189, 0x75E9, 0x918A, 0x76F8, 0x918B, 0x7A93, 0x918C, 0x7CDF,
02455     0x918D, 0x7DCF, 0x918E, 0x7D9C, 0x918F, 0x8061, 0x9190, 0x8349,
02456     0x9191, 0x8358, 0x9192, 0x846C, 0x9193, 0x84BC, 0x9194, 0x85FB,
02457     0x9195, 0x88C5, 0x9196, 0x8D70, 0x9197, 0x9001, 0x9198, 0x906D,
02458     0x9199, 0x9397, 0x919A, 0x971C, 0x919B, 0x9A12, 0x919C, 0x50CF,
02459     0x919D, 0x5897, 0x919E, 0x618E, 0x919F, 0x81D3, 0x91A0, 0x8535,
02460     0x91A1, 0x8D08, 0x91A2, 0x9020, 0x91A3, 0x4FC3, 0x91A4, 0x5074,
02461     0x91A5, 0x5247, 0x91A6, 0x5373, 0x91A7, 0x606F, 0x91A8, 0x6349,
02462     0x91A9, 0x675F, 0x91AA, 0x6E2C, 0x91AB, 0x8DB3, 0x91AC, 0x901F,
02463     0x91AD, 0x4FD7, 0x91AE, 0x5C5E, 0x91AF, 0x8CCA, 0x91B0, 0x65CF,
02464     0x91B1, 0x7D9A, 0x91B2, 0x5352, 0x91B3, 0x8896, 0x91B4, 0x5176,
02465     0x91B5, 0x63C3, 0x91B6, 0x5B58, 0x91B7, 0x5B6B, 0x91B8, 0x5C0A,
02466     0x91B9, 0x640D, 0x91BA, 0x6751, 0x91BB, 0x905C, 0x91BC, 0x4ED6,
02467     0x91BD, 0x591A, 0x91BE, 0x592A, 0x91BF, 0x6C70, 0x91C0, 0x8A51,
02468     0x91C1, 0x553E, 0x91C2, 0x5815, 0x91C3, 0x59A5, 0x91C4, 0x60F0,
02469     0x91C5, 0x6253, 0x91C6, 0x67C1, 0x91C7, 0x8235, 0x91C8, 0x6955,
02470     0x91C9, 0x9640, 0x91CA, 0x99C4, 0x91CB, 0x9A28, 0x91CC, 0x4F53,
02471     0x91CD, 0x5806, 0x91CE, 0x5BFE, 0x91CF, 0x8010, 0x91D0, 0x5CB1,
02472     0x91D1, 0x5E2F, 0x91D2, 0x5F85, 0x91D3, 0x6020, 0x91D4, 0x614B,
02473     0x91D5, 0x6234, 0x91D6, 0x66FF, 0x91D7, 0x6CF0, 0x91D8, 0x6EDE,
02474     0x91D9, 0x80CE, 0x91DA, 0x817F, 0x91DB, 0x82D4, 0x91DC, 0x888B,
02475     0x91DD, 0x8CB8, 0x91DE, 0x9000, 0x91DF, 0x902E, 0x91E0, 0x968A,
02476     0x91E1, 0x9EDB, 0x91E2, 0x9BDB, 0x91E3, 0x4EE3, 0x91E4, 0x53F0,
02477     0x91E5, 0x5927, 0x91E6, 0x7B2C, 0x91E7, 0x918D, 0x91E8, 0x984C,
02478     0x91E9, 0x9DF9, 0x91EA, 0x6EDD, 0x91EB, 0x7027, 0x91EC, 0x5353,
02479     0x91ED, 0x5544, 0x91EE, 0x5B85, 0x91EF, 0x6258, 0x91F0, 0x629E,
02480     0x91F1, 0x62D3, 0x91F2, 0x6CA2, 0x91F3, 0x6FEF, 0x91F4, 0x7422,
02481     0x91F5, 0x8A17, 0x91F6, 0x9438, 0x91F7, 0x6FC1, 0x91F8, 0x8AFE,
02482     0x91F9, 0x8338, 0x91FA, 0x51E7, 0x91FB, 0x86F8, 0x91FC, 0x53EA,
02483     0x9240, 0x53E9, 0x9241, 0x4F46, 0x9242, 0x9054, 0x9243, 0x8FB0,
02484     0x9244, 0x596A, 0x9245, 0x8131, 0x9246, 0x5DFD, 0x9247, 0x7AEA,
02485     0x9248, 0x8FBF, 0x9249, 0x68DA, 0x924A, 0x8C37, 0x924B, 0x72F8,
02486     0x924C, 0x9C48, 0x924D, 0x6A3D, 0x924E, 0x8AB0, 0x924F, 0x4E39,
02487     0x9250, 0x5358, 0x9251, 0x5606, 0x9252, 0x5766, 0x9253, 0x62C5,
02488     0x9254, 0x63A2, 0x9255, 0x65E6, 0x9256, 0x6B4E, 0x9257, 0x6DE1,
02489     0x9258, 0x6E5B, 0x9259, 0x70AD, 0x925A, 0x77ED, 0x925B, 0x7AEF,
02490     0x925C, 0x7BAA, 0x925D, 0x7DBB, 0x925E, 0x803D, 0x925F, 0x80C6,
02491     0x9260, 0x86CB, 0x9261, 0x8A95, 0x9262, 0x935B, 0x9263, 0x56E3,
02492     0x9264, 0x58C7, 0x9265, 0x5F3E, 0x9266, 0x65AD, 0x9267, 0x6696,
02493     0x9268, 0x6A80, 0x9269, 0x6BB5, 0x926A, 0x7537, 0x926B, 0x8AC7,
02494     0x926C, 0x5024, 0x926D, 0x77E5, 0x926E, 0x5730, 0x926F, 0x5F1B,
02495     0x9270, 0x6065, 0x9271, 0x667A, 0x9272, 0x6C60, 0x9273, 0x75F4,
02496     0x9274, 0x7A1A, 0x9275, 0x7F6E, 0x9276, 0x81F4, 0x9277, 0x8718,
02497     0x9278, 0x9045, 0x9279, 0x99B3, 0x927A, 0x7BC9, 0x927B, 0x755C,
02498     0x927C, 0x7AF9, 0x927D, 0x7B51, 0x927E, 0x84C4, 0x9280, 0x9010,
02499     0x9281, 0x79E9, 0x9282, 0x7A92, 0x9283, 0x8336, 0x9284, 0x5AE1,
02500     0x9285, 0x7740, 0x9286, 0x4E2D, 0x9287, 0x4EF2, 0x9288, 0x5B99,
02501     0x9289, 0x5FE0, 0x928A, 0x62BD, 0x928B, 0x663C, 0x928C, 0x67F1,
02502     0x928D, 0x6CE8, 0x928E, 0x866B, 0x928F, 0x8877, 0x9290, 0x8A3B,
02503     0x9291, 0x914E, 0x9292, 0x92F3, 0x9293, 0x99D0, 0x9294, 0x6A17,
02504     0x9295, 0x7026, 0x9296, 0x732A, 0x9297, 0x82E7, 0x9298, 0x8457,
02505     0x9299, 0x8CAF, 0x929A, 0x4E01, 0x929B, 0x5146, 0x929C, 0x51CB,
02506     0x929D, 0x558B, 0x929E, 0x5BF5, 0x929F, 0x5E16, 0x92A0, 0x5E33,
02507     0x92A1, 0x5E81, 0x92A2, 0x5F14, 0x92A3, 0x5F35, 0x92A4, 0x5F6B,
02508     0x92A5, 0x5FB4, 0x92A6, 0x61F2, 0x92A7, 0x6311, 0x92A8, 0x66A2,
02509     0x92A9, 0x671D, 0x92AA, 0x6F6E, 0x92AB, 0x7252, 0x92AC, 0x753A,
02510     0x92AD, 0x773A, 0x92AE, 0x8074, 0x92AF, 0x8139, 0x92B0, 0x8178,
02511     0x92B1, 0x8776, 0x92B2, 0x8ABF, 0x92B3, 0x8ADC, 0x92B4, 0x8D85,
02512     0x92B5, 0x8DF3, 0x92B6, 0x929A, 0x92B7, 0x9577, 0x92B8, 0x9802,
02513     0x92B9, 0x9CE5, 0x92BA, 0x52C5, 0x92BB, 0x6357, 0x92BC, 0x76F4,
02514     0x92BD, 0x6715, 0x92BE, 0x6C88, 0x92BF, 0x73CD, 0x92C0, 0x8CC3,
02515     0x92C1, 0x93AE, 0x92C2, 0x9673, 0x92C3, 0x6D25, 0x92C4, 0x589C,
02516     0x92C5, 0x690E, 0x92C6, 0x69CC, 0x92C7, 0x8FFD, 0x92C8, 0x939A,
02517     0x92C9, 0x75DB, 0x92CA, 0x901A, 0x92CB, 0x585A, 0x92CC, 0x6802,
02518     0x92CD, 0x63B4, 0x92CE, 0x69FB, 0x92CF, 0x4F43, 0x92D0, 0x6F2C,
02519     0x92D1, 0x67D8, 0x92D2, 0x8FBB, 0x92D3, 0x8526, 0x92D4, 0x7DB4,
02520     0x92D5, 0x9354, 0x92D6, 0x693F, 0x92D7, 0x6F70, 0x92D8, 0x576A,
02521     0x92D9, 0x58F7, 0x92DA, 0x5B2C, 0x92DB, 0x7D2C, 0x92DC, 0x722A,
02522     0x92DD, 0x540A, 0x92DE, 0x91E3, 0x92DF, 0x9DB4, 0x92E0, 0x4EAD,
02523     0x92E1, 0x4F4E, 0x92E2, 0x505C, 0x92E3, 0x5075, 0x92E4, 0x5243,
02524     0x92E5, 0x8C9E, 0x92E6, 0x5448, 0x92E7, 0x5824, 0x92E8, 0x5B9A,
02525     0x92E9, 0x5E1D, 0x92EA, 0x5E95, 0x92EB, 0x5EAD, 0x92EC, 0x5EF7,
02526     0x92ED, 0x5F1F, 0x92EE, 0x608C, 0x92EF, 0x62B5, 0x92F0, 0x633A,
02527     0x92F1, 0x63D0, 0x92F2, 0x68AF, 0x92F3, 0x6C40, 0x92F4, 0x7887,
02528     0x92F5, 0x798E, 0x92F6, 0x7A0B, 0x92F7, 0x7DE0, 0x92F8, 0x8247,
02529     0x92F9, 0x8A02, 0x92FA, 0x8AE6, 0x92FB, 0x8E44, 0x92FC, 0x9013,
02530     0x9340, 0x90B8, 0x9341, 0x912D, 0x9342, 0x91D8, 0x9343, 0x9F0E,
02531     0x9344, 0x6CE5, 0x9345, 0x6458, 0x9346, 0x64E2, 0x9347, 0x6575,
02532     0x9348, 0x6EF4, 0x9349, 0x7684, 0x934A, 0x7B1B, 0x934B, 0x9069,
02533     0x934C, 0x93D1, 0x934D, 0x6EBA, 0x934E, 0x54F2, 0x934F, 0x5FB9,
02534     0x9350, 0x64A4, 0x9351, 0x8F4D, 0x9352, 0x8FED, 0x9353, 0x9244,
02535     0x9354, 0x5178, 0x9355, 0x586B, 0x9356, 0x5929, 0x9357, 0x5C55,
02536     0x9358, 0x5E97, 0x9359, 0x6DFB, 0x935A, 0x7E8F, 0x935B, 0x751C,
02537     0x935C, 0x8CBC, 0x935D, 0x8EE2, 0x935E, 0x985B, 0x935F, 0x70B9,
02538     0x9360, 0x4F1D, 0x9361, 0x6BBF, 0x9362, 0x6FB1, 0x9363, 0x7530,
02539     0x9364, 0x96FB, 0x9365, 0x514E, 0x9366, 0x5410, 0x9367, 0x5835,
02540     0x9368, 0x5857, 0x9369, 0x59AC, 0x936A, 0x5C60, 0x936B, 0x5F92,
02541     0x936C, 0x6597, 0x936D, 0x675C, 0x936E, 0x6E21, 0x936F, 0x767B,
02542     0x9370, 0x83DF, 0x9371, 0x8CED, 0x9372, 0x9014, 0x9373, 0x90FD,
02543     0x9374, 0x934D, 0x9375, 0x7825, 0x9376, 0x783A, 0x9377, 0x52AA,
02544     0x9378, 0x5EA6, 0x9379, 0x571F, 0x937A, 0x5974, 0x937B, 0x6012,
02545     0x937C, 0x5012, 0x937D, 0x515A, 0x937E, 0x51AC, 0x9380, 0x51CD,
02546     0x9381, 0x5200, 0x9382, 0x5510, 0x9383, 0x5854, 0x9384, 0x5858,
02547     0x9385, 0x5957, 0x9386, 0x5B95, 0x9387, 0x5CF6, 0x9388, 0x5D8B,
02548     0x9389, 0x60BC, 0x938A, 0x6295, 0x938B, 0x642D, 0x938C, 0x6771,
02549     0x938D, 0x6843, 0x938E, 0x68BC, 0x938F, 0x68DF, 0x9390, 0x76D7,
02550     0x9391, 0x6DD8, 0x9392, 0x6E6F, 0x9393, 0x6D9B, 0x9394, 0x706F,
02551     0x9395, 0x71C8, 0x9396, 0x5F53, 0x9397, 0x75D8, 0x9398, 0x7977,
02552     0x9399, 0x7B49, 0x939A, 0x7B54, 0x939B, 0x7B52, 0x939C, 0x7CD6,
02553     0x939D, 0x7D71, 0x939E, 0x5230, 0x939F, 0x8463, 0x93A0, 0x8569,
02554     0x93A1, 0x85E4, 0x93A2, 0x8A0E, 0x93A3, 0x8B04, 0x93A4, 0x8C46,
02555     0x93A5, 0x8E0F, 0x93A6, 0x9003, 0x93A7, 0x900F, 0x93A8, 0x9419,
02556     0x93A9, 0x9676, 0x93AA, 0x982D, 0x93AB, 0x9A30, 0x93AC, 0x95D8,
02557     0x93AD, 0x50CD, 0x93AE, 0x52D5, 0x93AF, 0x540C, 0x93B0, 0x5802,
02558     0x93B1, 0x5C0E, 0x93B2, 0x61A7, 0x93B3, 0x649E, 0x93B4, 0x6D1E,
02559     0x93B5, 0x77B3, 0x93B6, 0x7AE5, 0x93B7, 0x80F4, 0x93B8, 0x8404,
02560     0x93B9, 0x9053, 0x93BA, 0x9285, 0x93BB, 0x5CE0, 0x93BC, 0x9D07,
02561     0x93BD, 0x533F, 0x93BE, 0x5F97, 0x93BF, 0x5FB3, 0x93C0, 0x6D9C,
02562     0x93C1, 0x7279, 0x93C2, 0x7763, 0x93C3, 0x79BF, 0x93C4, 0x7BE4,
02563     0x93C5, 0x6BD2, 0x93C6, 0x72EC, 0x93C7, 0x8AAD, 0x93C8, 0x6803,
02564     0x93C9, 0x6A61, 0x93CA, 0x51F8, 0x93CB, 0x7A81, 0x93CC, 0x6934,
02565     0x93CD, 0x5C4A, 0x93CE, 0x9CF6, 0x93CF, 0x82EB, 0x93D0, 0x5BC5,
02566     0x93D1, 0x9149, 0x93D2, 0x701E, 0x93D3, 0x5678, 0x93D4, 0x5C6F,
02567     0x93D5, 0x60C7, 0x93D6, 0x6566, 0x93D7, 0x6C8C, 0x93D8, 0x8C5A,
02568     0x93D9, 0x9041, 0x93DA, 0x9813, 0x93DB, 0x5451, 0x93DC, 0x66C7,
02569     0x93DD, 0x920D, 0x93DE, 0x5948, 0x93DF, 0x90A3, 0x93E0, 0x5185,
02570     0x93E1, 0x4E4D, 0x93E2, 0x51EA, 0x93E3, 0x8599, 0x93E4, 0x8B0E,
02571     0x93E5, 0x7058, 0x93E6, 0x637A, 0x93E7, 0x934B, 0x93E8, 0x6962,
02572     0x93E9, 0x99B4, 0x93EA, 0x7E04, 0x93EB, 0x7577, 0x93EC, 0x5357,
02573     0x93ED, 0x6960, 0x93EE, 0x8EDF, 0x93EF, 0x96E3, 0x93F0, 0x6C5D,
02574     0x93F1, 0x4E8C, 0x93F2, 0x5C3C, 0x93F3, 0x5F10, 0x93F4, 0x8FE9,
02575     0x93F5, 0x5302, 0x93F6, 0x8CD1, 0x93F7, 0x8089, 0x93F8, 0x8679,
02576     0x93F9, 0x5EFF, 0x93FA, 0x65E5, 0x93FB, 0x4E73, 0x93FC, 0x5165,
02577     0x9440, 0x5982, 0x9441, 0x5C3F, 0x9442, 0x97EE, 0x9443, 0x4EFB,
02578     0x9444, 0x598A, 0x9445, 0x5FCD, 0x9446, 0x8A8D, 0x9447, 0x6FE1,
02579     0x9448, 0x79B0, 0x9449, 0x7962, 0x944A, 0x5BE7, 0x944B, 0x8471,
02580     0x944C, 0x732B, 0x944D, 0x71B1, 0x944E, 0x5E74, 0x944F, 0x5FF5,
02581     0x9450, 0x637B, 0x9451, 0x649A, 0x9452, 0x71C3, 0x9453, 0x7C98,
02582     0x9454, 0x4E43, 0x9455, 0x5EFC, 0x9456, 0x4E4B, 0x9457, 0x57DC,
02583     0x9458, 0x56A2, 0x9459, 0x60A9, 0x945A, 0x6FC3, 0x945B, 0x7D0D,
02584     0x945C, 0x80FD, 0x945D, 0x8133, 0x945E, 0x81BF, 0x945F, 0x8FB2,
02585     0x9460, 0x8997, 0x9461, 0x86A4, 0x9462, 0x5DF4, 0x9463, 0x628A,
02586     0x9464, 0x64AD, 0x9465, 0x8987, 0x9466, 0x6777, 0x9467, 0x6CE2,
02587     0x9468, 0x6D3E, 0x9469, 0x7436, 0x946A, 0x7834, 0x946B, 0x5A46,
02588     0x946C, 0x7F75, 0x946D, 0x82AD, 0x946E, 0x99AC, 0x946F, 0x4FF3,
02589     0x9470, 0x5EC3, 0x9471, 0x62DD, 0x9472, 0x6392, 0x9473, 0x6557,
02590     0x9474, 0x676F, 0x9475, 0x76C3, 0x9476, 0x724C, 0x9477, 0x80CC,
02591     0x9478, 0x80BA, 0x9479, 0x8F29, 0x947A, 0x914D, 0x947B, 0x500D,
02592     0x947C, 0x57F9, 0x947D, 0x5A92, 0x947E, 0x6885, 0x9480, 0x6973,
02593     0x9481, 0x7164, 0x9482, 0x72FD, 0x9483, 0x8CB7, 0x9484, 0x58F2,
02594     0x9485, 0x8CE0, 0x9486, 0x966A, 0x9487, 0x9019, 0x9488, 0x877F,
02595     0x9489, 0x79E4, 0x948A, 0x77E7, 0x948B, 0x8429, 0x948C, 0x4F2F,
02596     0x948D, 0x5265, 0x948E, 0x535A, 0x948F, 0x62CD, 0x9490, 0x67CF,
02597     0x9491, 0x6CCA, 0x9492, 0x767D, 0x9493, 0x7B94, 0x9494, 0x7C95,
02598     0x9495, 0x8236, 0x9496, 0x8584, 0x9497, 0x8FEB, 0x9498, 0x66DD,
02599     0x9499, 0x6F20, 0x949A, 0x7206, 0x949B, 0x7E1B, 0x949C, 0x83AB,
02600     0x949D, 0x99C1, 0x949E, 0x9EA6, 0x949F, 0x51FD, 0x94A0, 0x7BB1,
02601     0x94A1, 0x7872, 0x94A2, 0x7BB8, 0x94A3, 0x8087, 0x94A4, 0x7B48,
02602     0x94A5, 0x6AE8, 0x94A6, 0x5E61, 0x94A7, 0x808C, 0x94A8, 0x7551,
02603     0x94A9, 0x7560, 0x94AA, 0x516B, 0x94AB, 0x9262, 0x94AC, 0x6E8C,
02604     0x94AD, 0x767A, 0x94AE, 0x9197, 0x94AF, 0x9AEA, 0x94B0, 0x4F10,
02605     0x94B1, 0x7F70, 0x94B2, 0x629C, 0x94B3, 0x7B4F, 0x94B4, 0x95A5,
02606     0x94B5, 0x9CE9, 0x94B6, 0x567A, 0x94B7, 0x5859, 0x94B8, 0x86E4,
02607     0x94B9, 0x96BC, 0x94BA, 0x4F34, 0x94BB, 0x5224, 0x94BC, 0x534A,
02608     0x94BD, 0x53CD, 0x94BE, 0x53DB, 0x94BF, 0x5E06, 0x94C0, 0x642C,
02609     0x94C1, 0x6591, 0x94C2, 0x677F, 0x94C3, 0x6C3E, 0x94C4, 0x6C4E,
02610     0x94C5, 0x7248, 0x94C6, 0x72AF, 0x94C7, 0x73ED, 0x94C8, 0x7554,
02611     0x94C9, 0x7E41, 0x94CA, 0x822C, 0x94CB, 0x85E9, 0x94CC, 0x8CA9,
02612     0x94CD, 0x7BC4, 0x94CE, 0x91C6, 0x94CF, 0x7169, 0x94D0, 0x9812,
02613     0x94D1, 0x98EF, 0x94D2, 0x633D, 0x94D3, 0x6669, 0x94D4, 0x756A,
02614     0x94D5, 0x76E4, 0x94D6, 0x78D0, 0x94D7, 0x8543, 0x94D8, 0x86EE,
02615     0x94D9, 0x532A, 0x94DA, 0x5351, 0x94DB, 0x5426, 0x94DC, 0x5983,
02616     0x94DD, 0x5E87, 0x94DE, 0x5F7C, 0x94DF, 0x60B2, 0x94E0, 0x6249,
02617     0x94E1, 0x6279, 0x94E2, 0x62AB, 0x94E3, 0x6590, 0x94E4, 0x6BD4,
02618     0x94E5, 0x6CCC, 0x94E6, 0x75B2, 0x94E7, 0x76AE, 0x94E8, 0x7891,
02619     0x94E9, 0x79D8, 0x94EA, 0x7DCB, 0x94EB, 0x7F77, 0x94EC, 0x80A5,
02620     0x94ED, 0x88AB, 0x94EE, 0x8AB9, 0x94EF, 0x8CBB, 0x94F0, 0x907F,
02621     0x94F1, 0x975E, 0x94F2, 0x98DB, 0x94F3, 0x6A0B, 0x94F4, 0x7C38,
02622     0x94F5, 0x5099, 0x94F6, 0x5C3E, 0x94F7, 0x5FAE, 0x94F8, 0x6787,
02623     0x94F9, 0x6BD8, 0x94FA, 0x7435, 0x94FB, 0x7709, 0x94FC, 0x7F8E,
02624     0x9540, 0x9F3B, 0x9541, 0x67CA, 0x9542, 0x7A17, 0x9543, 0x5339,
02625     0x9544, 0x758B, 0x9545, 0x9AED, 0x9546, 0x5F66, 0x9547, 0x819D,
02626     0x9548, 0x83F1, 0x9549, 0x8098, 0x954A, 0x5F3C, 0x954B, 0x5FC5,
02627     0x954C, 0x7562, 0x954D, 0x7B46, 0x954E, 0x903C, 0x954F, 0x6867,
02628     0x9550, 0x59EB, 0x9551, 0x5A9B, 0x9552, 0x7D10, 0x9553, 0x767E,
02629     0x9554, 0x8B2C, 0x9555, 0x4FF5, 0x9556, 0x5F6A, 0x9557, 0x6A19,
02630     0x9558, 0x6C37, 0x9559, 0x6F02, 0x955A, 0x74E2, 0x955B, 0x7968,
02631     0x955C, 0x8868, 0x955D, 0x8A55, 0x955E, 0x8C79, 0x955F, 0x5EDF,
02632     0x9560, 0x63CF, 0x9561, 0x75C5, 0x9562, 0x79D2, 0x9563, 0x82D7,
02633     0x9564, 0x9328, 0x9565, 0x92F2, 0x9566, 0x849C, 0x9567, 0x86ED,
02634     0x9568, 0x9C2D, 0x9569, 0x54C1, 0x956A, 0x5F6C, 0x956B, 0x658C,
02635     0x956C, 0x6D5C, 0x956D, 0x7015, 0x956E, 0x8CA7, 0x956F, 0x8CD3,
02636     0x9570, 0x983B, 0x9571, 0x654F, 0x9572, 0x74F6, 0x9573, 0x4E0D,
02637     0x9574, 0x4ED8, 0x9575, 0x57E0, 0x9576, 0x592B, 0x9577, 0x5A66,
02638     0x9578, 0x5BCC, 0x9579, 0x51A8, 0x957A, 0x5E03, 0x957B, 0x5E9C,
02639     0x957C, 0x6016, 0x957D, 0x6276, 0x957E, 0x6577, 0x9580, 0x65A7,
02640     0x9581, 0x666E, 0x9582, 0x6D6E, 0x9583, 0x7236, 0x9584, 0x7B26,
02641     0x9585, 0x8150, 0x9586, 0x819A, 0x9587, 0x8299, 0x9588, 0x8B5C,
02642     0x9589, 0x8CA0, 0x958A, 0x8CE6, 0x958B, 0x8D74, 0x958C, 0x961C,
02643     0x958D, 0x9644, 0x958E, 0x4FAE, 0x958F, 0x64AB, 0x9590, 0x6B66,
02644     0x9591, 0x821E, 0x9592, 0x8461, 0x9593, 0x856A, 0x9594, 0x90E8,
02645     0x9595, 0x5C01, 0x9596, 0x6953, 0x9597, 0x98A8, 0x9598, 0x847A,
02646     0x9599, 0x8557, 0x959A, 0x4F0F, 0x959B, 0x526F, 0x959C, 0x5FA9,
02647     0x959D, 0x5E45, 0x959E, 0x670D, 0x959F, 0x798F, 0x95A0, 0x8179,
02648     0x95A1, 0x8907, 0x95A2, 0x8986, 0x95A3, 0x6DF5, 0x95A4, 0x5F17,
02649     0x95A5, 0x6255, 0x95A6, 0x6CB8, 0x95A7, 0x4ECF, 0x95A8, 0x7269,
02650     0x95A9, 0x9B92, 0x95AA, 0x5206, 0x95AB, 0x543B, 0x95AC, 0x5674,
02651     0x95AD, 0x58B3, 0x95AE, 0x61A4, 0x95AF, 0x626E, 0x95B0, 0x711A,
02652     0x95B1, 0x596E, 0x95B2, 0x7C89, 0x95B3, 0x7CDE, 0x95B4, 0x7D1B,
02653     0x95B5, 0x96F0, 0x95B6, 0x6587, 0x95B7, 0x805E, 0x95B8, 0x4E19,
02654     0x95B9, 0x4F75, 0x95BA, 0x5175, 0x95BB, 0x5840, 0x95BC, 0x5E63,
02655     0x95BD, 0x5E73, 0x95BE, 0x5F0A, 0x95BF, 0x67C4, 0x95C0, 0x4E26,
02656     0x95C1, 0x853D, 0x95C2, 0x9589, 0x95C3, 0x965B, 0x95C4, 0x7C73,
02657     0x95C5, 0x9801, 0x95C6, 0x50FB, 0x95C7, 0x58C1, 0x95C8, 0x7656,
02658     0x95C9, 0x78A7, 0x95CA, 0x5225, 0x95CB, 0x77A5, 0x95CC, 0x8511,
02659     0x95CD, 0x7B86, 0x95CE, 0x504F, 0x95CF, 0x5909, 0x95D0, 0x7247,
02660     0x95D1, 0x7BC7, 0x95D2, 0x7DE8, 0x95D3, 0x8FBA, 0x95D4, 0x8FD4,
02661     0x95D5, 0x904D, 0x95D6, 0x4FBF, 0x95D7, 0x52C9, 0x95D8, 0x5A29,
02662     0x95D9, 0x5F01, 0x95DA, 0x97AD, 0x95DB, 0x4FDD, 0x95DC, 0x8217,
02663     0x95DD, 0x92EA, 0x95DE, 0x5703, 0x95DF, 0x6355, 0x95E0, 0x6B69,
02664     0x95E1, 0x752B, 0x95E2, 0x88DC, 0x95E3, 0x8F14, 0x95E4, 0x7A42,
02665     0x95E5, 0x52DF, 0x95E6, 0x5893, 0x95E7, 0x6155, 0x95E8, 0x620A,
02666     0x95E9, 0x66AE, 0x95EA, 0x6BCD, 0x95EB, 0x7C3F, 0x95EC, 0x83E9,
02667     0x95ED, 0x5023, 0x95EE, 0x4FF8, 0x95EF, 0x5305, 0x95F0, 0x5446,
02668     0x95F1, 0x5831, 0x95F2, 0x5949, 0x95F3, 0x5B9D, 0x95F4, 0x5CF0,
02669     0x95F5, 0x5CEF, 0x95F6, 0x5D29, 0x95F7, 0x5E96, 0x95F8, 0x62B1,
02670     0x95F9, 0x6367, 0x95FA, 0x653E, 0x95FB, 0x65B9, 0x95FC, 0x670B,
02671     0x9640, 0x6CD5, 0x9641, 0x6CE1, 0x9642, 0x70F9, 0x9643, 0x7832,
02672     0x9644, 0x7E2B, 0x9645, 0x80DE, 0x9646, 0x82B3, 0x9647, 0x840C,
02673     0x9648, 0x84EC, 0x9649, 0x8702, 0x964A, 0x8912, 0x964B, 0x8A2A,
02674     0x964C, 0x8C4A, 0x964D, 0x90A6, 0x964E, 0x92D2, 0x964F, 0x98FD,
02675     0x9650, 0x9CF3, 0x9651, 0x9D6C, 0x9652, 0x4E4F, 0x9653, 0x4EA1,
02676     0x9654, 0x508D, 0x9655, 0x5256, 0x9656, 0x574A, 0x9657, 0x59A8,
02677     0x9658, 0x5E3D, 0x9659, 0x5FD8, 0x965A, 0x5FD9, 0x965B, 0x623F,
02678     0x965C, 0x66B4, 0x965D, 0x671B, 0x965E, 0x67D0, 0x965F, 0x68D2,
02679     0x9660, 0x5192, 0x9661, 0x7D21, 0x9662, 0x80AA, 0x9663, 0x81A8,
02680     0x9664, 0x8B00, 0x9665, 0x8C8C, 0x9666, 0x8CBF, 0x9667, 0x927E,
02681     0x9668, 0x9632, 0x9669, 0x5420, 0x966A, 0x982C, 0x966B, 0x5317,
02682     0x966C, 0x50D5, 0x966D, 0x535C, 0x966E, 0x58A8, 0x966F, 0x64B2,
02683     0x9670, 0x6734, 0x9671, 0x7267, 0x9672, 0x7766, 0x9673, 0x7A46,
02684     0x9674, 0x91E6, 0x9675, 0x52C3, 0x9676, 0x6CA1, 0x9677, 0x6B86,
02685     0x9678, 0x5800, 0x9679, 0x5E4C, 0x967A, 0x5954, 0x967B, 0x672C,
02686     0x967C, 0x7FFB, 0x967D, 0x51E1, 0x967E, 0x76C6, 0x9680, 0x6469,
02687     0x9681, 0x78E8, 0x9682, 0x9B54, 0x9683, 0x9EBB, 0x9684, 0x57CB,
02688     0x9685, 0x59B9, 0x9686, 0x6627, 0x9687, 0x679A, 0x9688, 0x6BCE,
02689     0x9689, 0x54E9, 0x968A, 0x69D9, 0x968B, 0x5E55, 0x968C, 0x819C,
02690     0x968D, 0x6795, 0x968E, 0x9BAA, 0x968F, 0x67FE, 0x9690, 0x9C52,
02691     0x9691, 0x685D, 0x9692, 0x4EA6, 0x9693, 0x4FE3, 0x9694, 0x53C8,
02692     0x9695, 0x62B9, 0x9696, 0x672B, 0x9697, 0x6CAB, 0x9698, 0x8FC4,
02693     0x9699, 0x4FAD, 0x969A, 0x7E6D, 0x969B, 0x9EBF, 0x969C, 0x4E07,
02694     0x969D, 0x6162, 0x969E, 0x6E80, 0x969F, 0x6F2B, 0x96A0, 0x8513,
02695     0x96A1, 0x5473, 0x96A2, 0x672A, 0x96A3, 0x9B45, 0x96A4, 0x5DF3,
02696     0x96A5, 0x7B95, 0x96A6, 0x5CAC, 0x96A7, 0x5BC6, 0x96A8, 0x871C,
02697     0x96A9, 0x6E4A, 0x96AA, 0x84D1, 0x96AB, 0x7A14, 0x96AC, 0x8108,
02698     0x96AD, 0x5999, 0x96AE, 0x7C8D, 0x96AF, 0x6C11, 0x96B0, 0x7720,
02699     0x96B1, 0x52D9, 0x96B2, 0x5922, 0x96B3, 0x7121, 0x96B4, 0x725F,
02700     0x96B5, 0x77DB, 0x96B6, 0x9727, 0x96B7, 0x9D61, 0x96B8, 0x690B,
02701     0x96B9, 0x5A7F, 0x96BA, 0x5A18, 0x96BB, 0x51A5, 0x96BC, 0x540D,
02702     0x96BD, 0x547D, 0x96BE, 0x660E, 0x96BF, 0x76DF, 0x96C0, 0x8FF7,
02703     0x96C1, 0x9298, 0x96C2, 0x9CF4, 0x96C3, 0x59EA, 0x96C4, 0x725D,
02704     0x96C5, 0x6EC5, 0x96C6, 0x514D, 0x96C7, 0x68C9, 0x96C8, 0x7DBF,
02705     0x96C9, 0x7DEC, 0x96CA, 0x9762, 0x96CB, 0x9EBA, 0x96CC, 0x6478,
02706     0x96CD, 0x6A21, 0x96CE, 0x8302, 0x96CF, 0x5984, 0x96D0, 0x5B5F,
02707     0x96D1, 0x6BDB, 0x96D2, 0x731B, 0x96D3, 0x76F2, 0x96D4, 0x7DB2,
02708     0x96D5, 0x8017, 0x96D6, 0x8499, 0x96D7, 0x5132, 0x96D8, 0x6728,
02709     0x96D9, 0x9ED9, 0x96DA, 0x76EE, 0x96DB, 0x6762, 0x96DC, 0x52FF,
02710     0x96DD, 0x9905, 0x96DE, 0x5C24, 0x96DF, 0x623B, 0x96E0, 0x7C7E,
02711     0x96E1, 0x8CB0, 0x96E2, 0x554F, 0x96E3, 0x60B6, 0x96E4, 0x7D0B,
02712     0x96E5, 0x9580, 0x96E6, 0x5301, 0x96E7, 0x4E5F, 0x96E8, 0x51B6,
02713     0x96E9, 0x591C, 0x96EA, 0x723A, 0x96EB, 0x8036, 0x96EC, 0x91CE,
02714     0x96ED, 0x5F25, 0x96EE, 0x77E2, 0x96EF, 0x5384, 0x96F0, 0x5F79,
02715     0x96F1, 0x7D04, 0x96F2, 0x85AC, 0x96F3, 0x8A33, 0x96F4, 0x8E8D,
02716     0x96F5, 0x9756, 0x96F6, 0x67F3, 0x96F7, 0x85AE, 0x96F8, 0x9453,
02717     0x96F9, 0x6109, 0x96FA, 0x6108, 0x96FB, 0x6CB9, 0x96FC, 0x7652,
02718     0x9740, 0x8AED, 0x9741, 0x8F38, 0x9742, 0x552F, 0x9743, 0x4F51,
02719     0x9744, 0x512A, 0x9745, 0x52C7, 0x9746, 0x53CB, 0x9747, 0x5BA5,
02720     0x9748, 0x5E7D, 0x9749, 0x60A0, 0x974A, 0x6182, 0x974B, 0x63D6,
02721     0x974C, 0x6709, 0x974D, 0x67DA, 0x974E, 0x6E67, 0x974F, 0x6D8C,
02722     0x9750, 0x7336, 0x9751, 0x7337, 0x9752, 0x7531, 0x9753, 0x7950,
02723     0x9754, 0x88D5, 0x9755, 0x8A98, 0x9756, 0x904A, 0x9757, 0x9091,
02724     0x9758, 0x90F5, 0x9759, 0x96C4, 0x975A, 0x878D, 0x975B, 0x5915,
02725     0x975C, 0x4E88, 0x975D, 0x4F59, 0x975E, 0x4E0E, 0x975F, 0x8A89,
02726     0x9760, 0x8F3F, 0x9761, 0x9810, 0x9762, 0x50AD, 0x9763, 0x5E7C,
02727     0x9764, 0x5996, 0x9765, 0x5BB9, 0x9766, 0x5EB8, 0x9767, 0x63DA,
02728     0x9768, 0x63FA, 0x9769, 0x64C1, 0x976A, 0x66DC, 0x976B, 0x694A,
02729     0x976C, 0x69D8, 0x976D, 0x6D0B, 0x976E, 0x6EB6, 0x976F, 0x7194,
02730     0x9770, 0x7528, 0x9771, 0x7AAF, 0x9772, 0x7F8A, 0x9773, 0x8000,
02731     0x9774, 0x8449, 0x9775, 0x84C9, 0x9776, 0x8981, 0x9777, 0x8B21,
02732     0x9778, 0x8E0A, 0x9779, 0x9065, 0x977A, 0x967D, 0x977B, 0x990A,
02733     0x977C, 0x617E, 0x977D, 0x6291, 0x977E, 0x6B32, 0x9780, 0x6C83,
02734     0x9781, 0x6D74, 0x9782, 0x7FCC, 0x9783, 0x7FFC, 0x9784, 0x6DC0,
02735     0x9785, 0x7F85, 0x9786, 0x87BA, 0x9787, 0x88F8, 0x9788, 0x6765,
02736     0x9789, 0x83B1, 0x978A, 0x983C, 0x978B, 0x96F7, 0x978C, 0x6D1B,
02737     0x978D, 0x7D61, 0x978E, 0x843D, 0x978F, 0x916A, 0x9790, 0x4E71,
02738     0x9791, 0x5375, 0x9792, 0x5D50, 0x9793, 0x6B04, 0x9794, 0x6FEB,
02739     0x9795, 0x85CD, 0x9796, 0x862D, 0x9797, 0x89A7, 0x9798, 0x5229,
02740     0x9799, 0x540F, 0x979A, 0x5C65, 0x979B, 0x674E, 0x979C, 0x68A8,
02741     0x979D, 0x7406, 0x979E, 0x7483, 0x979F, 0x75E2, 0x97A0, 0x88CF,
02742     0x97A1, 0x88E1, 0x97A2, 0x91CC, 0x97A3, 0x96E2, 0x97A4, 0x9678,
02743     0x97A5, 0x5F8B, 0x97A6, 0x7387, 0x97A7, 0x7ACB, 0x97A8, 0x844E,
02744     0x97A9, 0x63A0, 0x97AA, 0x7565, 0x97AB, 0x5289, 0x97AC, 0x6D41,
02745     0x97AD, 0x6E9C, 0x97AE, 0x7409, 0x97AF, 0x7559, 0x97B0, 0x786B,
02746     0x97B1, 0x7C92, 0x97B2, 0x9686, 0x97B3, 0x7ADC, 0x97B4, 0x9F8D,
02747     0x97B5, 0x4FB6, 0x97B6, 0x616E, 0x97B7, 0x65C5, 0x97B8, 0x865C,
02748     0x97B9, 0x4E86, 0x97BA, 0x4EAE, 0x97BB, 0x50DA, 0x97BC, 0x4E21,
02749     0x97BD, 0x51CC, 0x97BE, 0x5BEE, 0x97BF, 0x6599, 0x97C0, 0x6881,
02750     0x97C1, 0x6DBC, 0x97C2, 0x731F, 0x97C3, 0x7642, 0x97C4, 0x77AD,
02751     0x97C5, 0x7A1C, 0x97C6, 0x7CE7, 0x97C7, 0x826F, 0x97C8, 0x8AD2,
02752     0x97C9, 0x907C, 0x97CA, 0x91CF, 0x97CB, 0x9675, 0x97CC, 0x9818,
02753     0x97CD, 0x529B, 0x97CE, 0x7DD1, 0x97CF, 0x502B, 0x97D0, 0x5398,
02754     0x97D1, 0x6797, 0x97D2, 0x6DCB, 0x97D3, 0x71D0, 0x97D4, 0x7433,
02755     0x97D5, 0x81E8, 0x97D6, 0x8F2A, 0x97D7, 0x96A3, 0x97D8, 0x9C57,
02756     0x97D9, 0x9E9F, 0x97DA, 0x7460, 0x97DB, 0x5841, 0x97DC, 0x6D99,
02757     0x97DD, 0x7D2F, 0x97DE, 0x985E, 0x97DF, 0x4EE4, 0x97E0, 0x4F36,
02758     0x97E1, 0x4F8B, 0x97E2, 0x51B7, 0x97E3, 0x52B1, 0x97E4, 0x5DBA,
02759     0x97E5, 0x601C, 0x97E6, 0x73B2, 0x97E7, 0x793C, 0x97E8, 0x82D3,
02760     0x97E9, 0x9234, 0x97EA, 0x96B7, 0x97EB, 0x96F6, 0x97EC, 0x970A,
02761     0x97ED, 0x9E97, 0x97EE, 0x9F62, 0x97EF, 0x66A6, 0x97F0, 0x6B74,
02762     0x97F1, 0x5217, 0x97F2, 0x52A3, 0x97F3, 0x70C8, 0x97F4, 0x88C2,
02763     0x97F5, 0x5EC9, 0x97F6, 0x604B, 0x97F7, 0x6190, 0x97F8, 0x6F23,
02764     0x97F9, 0x7149, 0x97FA, 0x7C3E, 0x97FB, 0x7DF4, 0x97FC, 0x806F,
02765     0x9840, 0x84EE, 0x9841, 0x9023, 0x9842, 0x932C, 0x9843, 0x5442,
02766     0x9844, 0x9B6F, 0x9845, 0x6AD3, 0x9846, 0x7089, 0x9847, 0x8CC2,
02767     0x9848, 0x8DEF, 0x9849, 0x9732, 0x984A, 0x52B4, 0x984B, 0x5A41,
02768     0x984C, 0x5ECA, 0x984D, 0x5F04, 0x984E, 0x6717, 0x984F, 0x697C,
02769     0x9850, 0x6994, 0x9851, 0x6D6A, 0x9852, 0x6F0F, 0x9853, 0x7262,
02770     0x9854, 0x72FC, 0x9855, 0x7BED, 0x9856, 0x8001, 0x9857, 0x807E,
02771     0x9858, 0x874B, 0x9859, 0x90CE, 0x985A, 0x516D, 0x985B, 0x9E93,
02772     0x985C, 0x7984, 0x985D, 0x808B, 0x985E, 0x9332, 0x985F, 0x8AD6,
02773     0x9860, 0x502D, 0x9861, 0x548C, 0x9862, 0x8A71, 0x9863, 0x6B6A,
02774     0x9864, 0x8CC4, 0x9865, 0x8107, 0x9866, 0x60D1, 0x9867, 0x67A0,
02775     0x9868, 0x9DF2, 0x9869, 0x4E99, 0x986A, 0x4E98, 0x986B, 0x9C10,
02776     0x986C, 0x8A6B, 0x986D, 0x85C1, 0x986E, 0x8568, 0x986F, 0x6900,
02777     0x9870, 0x6E7E, 0x9871, 0x7897, 0x9872, 0x8155, 0x989F, 0x5F0C,
02778     0x98A0, 0x4E10, 0x98A1, 0x4E15, 0x98A2, 0x4E2A, 0x98A3, 0x4E31,
02779     0x98A4, 0x4E36, 0x98A5, 0x4E3C, 0x98A6, 0x4E3F, 0x98A7, 0x4E42,
02780     0x98A8, 0x4E56, 0x98A9, 0x4E58, 0x98AA, 0x4E82, 0x98AB, 0x4E85,
02781     0x98AC, 0x8C6B, 0x98AD, 0x4E8A, 0x98AE, 0x8212, 0x98AF, 0x5F0D,
02782     0x98B0, 0x4E8E, 0x98B1, 0x4E9E, 0x98B2, 0x4E9F, 0x98B3, 0x4EA0,
02783     0x98B4, 0x4EA2, 0x98B5, 0x4EB0, 0x98B6, 0x4EB3, 0x98B7, 0x4EB6,
02784     0x98B8, 0x4ECE, 0x98B9, 0x4ECD, 0x98BA, 0x4EC4, 0x98BB, 0x4EC6,
02785     0x98BC, 0x4EC2, 0x98BD, 0x4ED7, 0x98BE, 0x4EDE, 0x98BF, 0x4EED,
02786     0x98C0, 0x4EDF, 0x98C1, 0x4EF7, 0x98C2, 0x4F09, 0x98C3, 0x4F5A,
02787     0x98C4, 0x4F30, 0x98C5, 0x4F5B, 0x98C6, 0x4F5D, 0x98C7, 0x4F57,
02788     0x98C8, 0x4F47, 0x98C9, 0x4F76, 0x98CA, 0x4F88, 0x98CB, 0x4F8F,
02789     0x98CC, 0x4F98, 0x98CD, 0x4F7B, 0x98CE, 0x4F69, 0x98CF, 0x4F70,
02790     0x98D0, 0x4F91, 0x98D1, 0x4F6F, 0x98D2, 0x4F86, 0x98D3, 0x4F96,
02791     0x98D4, 0x5118, 0x98D5, 0x4FD4, 0x98D6, 0x4FDF, 0x98D7, 0x4FCE,
02792     0x98D8, 0x4FD8, 0x98D9, 0x4FDB, 0x98DA, 0x4FD1, 0x98DB, 0x4FDA,
02793     0x98DC, 0x4FD0, 0x98DD, 0x4FE4, 0x98DE, 0x4FE5, 0x98DF, 0x501A,
02794     0x98E0, 0x5028, 0x98E1, 0x5014, 0x98E2, 0x502A, 0x98E3, 0x5025,
02795     0x98E4, 0x5005, 0x98E5, 0x4F1C, 0x98E6, 0x4FF6, 0x98E7, 0x5021,
02796     0x98E8, 0x5029, 0x98E9, 0x502C, 0x98EA, 0x4FFE, 0x98EB, 0x4FEF,
02797     0x98EC, 0x5011, 0x98ED, 0x5006, 0x98EE, 0x5043, 0x98EF, 0x5047,
02798     0x98F0, 0x6703, 0x98F1, 0x5055, 0x98F2, 0x5050, 0x98F3, 0x5048,
02799     0x98F4, 0x505A, 0x98F5, 0x5056, 0x98F6, 0x506C, 0x98F7, 0x5078,
02800     0x98F8, 0x5080, 0x98F9, 0x509A, 0x98FA, 0x5085, 0x98FB, 0x50B4,
02801     0x98FC, 0x50B2, 0x9940, 0x50C9, 0x9941, 0x50CA, 0x9942, 0x50B3,
02802     0x9943, 0x50C2, 0x9944, 0x50D6, 0x9945, 0x50DE, 0x9946, 0x50E5,
02803     0x9947, 0x50ED, 0x9948, 0x50E3, 0x9949, 0x50EE, 0x994A, 0x50F9,
02804     0x994B, 0x50F5, 0x994C, 0x5109, 0x994D, 0x5101, 0x994E, 0x5102,
02805     0x994F, 0x5116, 0x9950, 0x5115, 0x9951, 0x5114, 0x9952, 0x511A,
02806     0x9953, 0x5121, 0x9954, 0x513A, 0x9955, 0x5137, 0x9956, 0x513C,
02807     0x9957, 0x513B, 0x9958, 0x513F, 0x9959, 0x5140, 0x995A, 0x5152,
02808     0x995B, 0x514C, 0x995C, 0x5154, 0x995D, 0x5162, 0x995E, 0x7AF8,
02809     0x995F, 0x5169, 0x9960, 0x516A, 0x9961, 0x516E, 0x9962, 0x5180,
02810     0x9963, 0x5182, 0x9964, 0x56D8, 0x9965, 0x518C, 0x9966, 0x5189,
02811     0x9967, 0x518F, 0x9968, 0x5191, 0x9969, 0x5193, 0x996A, 0x5195,
02812     0x996B, 0x5196, 0x996C, 0x51A4, 0x996D, 0x51A6, 0x996E, 0x51A2,
02813     0x996F, 0x51A9, 0x9970, 0x51AA, 0x9971, 0x51AB, 0x9972, 0x51B3,
02814     0x9973, 0x51B1, 0x9974, 0x51B2, 0x9975, 0x51B0, 0x9976, 0x51B5,
02815     0x9977, 0x51BD, 0x9978, 0x51C5, 0x9979, 0x51C9, 0x997A, 0x51DB,
02816     0x997B, 0x51E0, 0x997C, 0x8655, 0x997D, 0x51E9, 0x997E, 0x51ED,
02817     0x9980, 0x51F0, 0x9981, 0x51F5, 0x9982, 0x51FE, 0x9983, 0x5204,
02818     0x9984, 0x520B, 0x9985, 0x5214, 0x9986, 0x520E, 0x9987, 0x5227,
02819     0x9988, 0x522A, 0x9989, 0x522E, 0x998A, 0x5233, 0x998B, 0x5239,
02820     0x998C, 0x524F, 0x998D, 0x5244, 0x998E, 0x524B, 0x998F, 0x524C,
02821     0x9990, 0x525E, 0x9991, 0x5254, 0x9992, 0x526A, 0x9993, 0x5274,
02822     0x9994, 0x5269, 0x9995, 0x5273, 0x9996, 0x527F, 0x9997, 0x527D,
02823     0x9998, 0x528D, 0x9999, 0x5294, 0x999A, 0x5292, 0x999B, 0x5271,
02824     0x999C, 0x5288, 0x999D, 0x5291, 0x999E, 0x8FA8, 0x999F, 0x8FA7,
02825     0x99A0, 0x52AC, 0x99A1, 0x52AD, 0x99A2, 0x52BC, 0x99A3, 0x52B5,
02826     0x99A4, 0x52C1, 0x99A5, 0x52CD, 0x99A6, 0x52D7, 0x99A7, 0x52DE,
02827     0x99A8, 0x52E3, 0x99A9, 0x52E6, 0x99AA, 0x98ED, 0x99AB, 0x52E0,
02828     0x99AC, 0x52F3, 0x99AD, 0x52F5, 0x99AE, 0x52F8, 0x99AF, 0x52F9,
02829     0x99B0, 0x5306, 0x99B1, 0x5308, 0x99B2, 0x7538, 0x99B3, 0x530D,
02830     0x99B4, 0x5310, 0x99B5, 0x530F, 0x99B6, 0x5315, 0x99B7, 0x531A,
02831     0x99B8, 0x5323, 0x99B9, 0x532F, 0x99BA, 0x5331, 0x99BB, 0x5333,
02832     0x99BC, 0x5338, 0x99BD, 0x5340, 0x99BE, 0x5346, 0x99BF, 0x5345,
02833     0x99C0, 0x4E17, 0x99C1, 0x5349, 0x99C2, 0x534D, 0x99C3, 0x51D6,
02834     0x99C4, 0x535E, 0x99C5, 0x5369, 0x99C6, 0x536E, 0x99C7, 0x5918,
02835     0x99C8, 0x537B, 0x99C9, 0x5377, 0x99CA, 0x5382, 0x99CB, 0x5396,
02836     0x99CC, 0x53A0, 0x99CD, 0x53A6, 0x99CE, 0x53A5, 0x99CF, 0x53AE,
02837     0x99D0, 0x53B0, 0x99D1, 0x53B6, 0x99D2, 0x53C3, 0x99D3, 0x7C12,
02838     0x99D4, 0x96D9, 0x99D5, 0x53DF, 0x99D6, 0x66FC, 0x99D7, 0x71EE,
02839     0x99D8, 0x53EE, 0x99D9, 0x53E8, 0x99DA, 0x53ED, 0x99DB, 0x53FA,
02840     0x99DC, 0x5401, 0x99DD, 0x543D, 0x99DE, 0x5440, 0x99DF, 0x542C,
02841     0x99E0, 0x542D, 0x99E1, 0x543C, 0x99E2, 0x542E, 0x99E3, 0x5436,
02842     0x99E4, 0x5429, 0x99E5, 0x541D, 0x99E6, 0x544E, 0x99E7, 0x548F,
02843     0x99E8, 0x5475, 0x99E9, 0x548E, 0x99EA, 0x545F, 0x99EB, 0x5471,
02844     0x99EC, 0x5477, 0x99ED, 0x5470, 0x99EE, 0x5492, 0x99EF, 0x547B,
02845     0x99F0, 0x5480, 0x99F1, 0x5476, 0x99F2, 0x5484, 0x99F3, 0x5490,
02846     0x99F4, 0x5486, 0x99F5, 0x54C7, 0x99F6, 0x54A2, 0x99F7, 0x54B8,
02847     0x99F8, 0x54A5, 0x99F9, 0x54AC, 0x99FA, 0x54C4, 0x99FB, 0x54C8,
02848     0x99FC, 0x54A8, 0x9A40, 0x54AB, 0x9A41, 0x54C2, 0x9A42, 0x54A4,
02849     0x9A43, 0x54BE, 0x9A44, 0x54BC, 0x9A45, 0x54D8, 0x9A46, 0x54E5,
02850     0x9A47, 0x54E6, 0x9A48, 0x550F, 0x9A49, 0x5514, 0x9A4A, 0x54FD,
02851     0x9A4B, 0x54EE, 0x9A4C, 0x54ED, 0x9A4D, 0x54FA, 0x9A4E, 0x54E2,
02852     0x9A4F, 0x5539, 0x9A50, 0x5540, 0x9A51, 0x5563, 0x9A52, 0x554C,
02853     0x9A53, 0x552E, 0x9A54, 0x555C, 0x9A55, 0x5545, 0x9A56, 0x5556,
02854     0x9A57, 0x5557, 0x9A58, 0x5538, 0x9A59, 0x5533, 0x9A5A, 0x555D,
02855     0x9A5B, 0x5599, 0x9A5C, 0x5580, 0x9A5D, 0x54AF, 0x9A5E, 0x558A,
02856     0x9A5F, 0x559F, 0x9A60, 0x557B, 0x9A61, 0x557E, 0x9A62, 0x5598,
02857     0x9A63, 0x559E, 0x9A64, 0x55AE, 0x9A65, 0x557C, 0x9A66, 0x5583,
02858     0x9A67, 0x55A9, 0x9A68, 0x5587, 0x9A69, 0x55A8, 0x9A6A, 0x55DA,
02859     0x9A6B, 0x55C5, 0x9A6C, 0x55DF, 0x9A6D, 0x55C4, 0x9A6E, 0x55DC,
02860     0x9A6F, 0x55E4, 0x9A70, 0x55D4, 0x9A71, 0x5614, 0x9A72, 0x55F7,
02861     0x9A73, 0x5616, 0x9A74, 0x55FE, 0x9A75, 0x55FD, 0x9A76, 0x561B,
02862     0x9A77, 0x55F9, 0x9A78, 0x564E, 0x9A79, 0x5650, 0x9A7A, 0x71DF,
02863     0x9A7B, 0x5634, 0x9A7C, 0x5636, 0x9A7D, 0x5632, 0x9A7E, 0x5638,
02864     0x9A80, 0x566B, 0x9A81, 0x5664, 0x9A82, 0x562F, 0x9A83, 0x566C,
02865     0x9A84, 0x566A, 0x9A85, 0x5686, 0x9A86, 0x5680, 0x9A87, 0x568A,
02866     0x9A88, 0x56A0, 0x9A89, 0x5694, 0x9A8A, 0x568F, 0x9A8B, 0x56A5,
02867     0x9A8C, 0x56AE, 0x9A8D, 0x56B6, 0x9A8E, 0x56B4, 0x9A8F, 0x56C2,
02868     0x9A90, 0x56BC, 0x9A91, 0x56C1, 0x9A92, 0x56C3, 0x9A93, 0x56C0,
02869     0x9A94, 0x56C8, 0x9A95, 0x56CE, 0x9A96, 0x56D1, 0x9A97, 0x56D3,
02870     0x9A98, 0x56D7, 0x9A99, 0x56EE, 0x9A9A, 0x56F9, 0x9A9B, 0x5700,
02871     0x9A9C, 0x56FF, 0x9A9D, 0x5704, 0x9A9E, 0x5709, 0x9A9F, 0x5708,
02872     0x9AA0, 0x570B, 0x9AA1, 0x570D, 0x9AA2, 0x5713, 0x9AA3, 0x5718,
02873     0x9AA4, 0x5716, 0x9AA5, 0x55C7, 0x9AA6, 0x571C, 0x9AA7, 0x5726,
02874     0x9AA8, 0x5737, 0x9AA9, 0x5738, 0x9AAA, 0x574E, 0x9AAB, 0x573B,
02875     0x9AAC, 0x5740, 0x9AAD, 0x574F, 0x9AAE, 0x5769, 0x9AAF, 0x57C0,
02876     0x9AB0, 0x5788, 0x9AB1, 0x5761, 0x9AB2, 0x577F, 0x9AB3, 0x5789,
02877     0x9AB4, 0x5793, 0x9AB5, 0x57A0, 0x9AB6, 0x57B3, 0x9AB7, 0x57A4,
02878     0x9AB8, 0x57AA, 0x9AB9, 0x57B0, 0x9ABA, 0x57C3, 0x9ABB, 0x57C6,
02879     0x9ABC, 0x57D4, 0x9ABD, 0x57D2, 0x9ABE, 0x57D3, 0x9ABF, 0x580A,
02880     0x9AC0, 0x57D6, 0x9AC1, 0x57E3, 0x9AC2, 0x580B, 0x9AC3, 0x5819,
02881     0x9AC4, 0x581D, 0x9AC5, 0x5872, 0x9AC6, 0x5821, 0x9AC7, 0x5862,
02882     0x9AC8, 0x584B, 0x9AC9, 0x5870, 0x9ACA, 0x6BC0, 0x9ACB, 0x5852,
02883     0x9ACC, 0x583D, 0x9ACD, 0x5879, 0x9ACE, 0x5885, 0x9ACF, 0x58B9,
02884     0x9AD0, 0x589F, 0x9AD1, 0x58AB, 0x9AD2, 0x58BA, 0x9AD3, 0x58DE,
02885     0x9AD4, 0x58BB, 0x9AD5, 0x58B8, 0x9AD6, 0x58AE, 0x9AD7, 0x58C5,
02886     0x9AD8, 0x58D3, 0x9AD9, 0x58D1, 0x9ADA, 0x58D7, 0x9ADB, 0x58D9,
02887     0x9ADC, 0x58D8, 0x9ADD, 0x58E5, 0x9ADE, 0x58DC, 0x9ADF, 0x58E4,
02888     0x9AE0, 0x58DF, 0x9AE1, 0x58EF, 0x9AE2, 0x58FA, 0x9AE3, 0x58F9,
02889     0x9AE4, 0x58FB, 0x9AE5, 0x58FC, 0x9AE6, 0x58FD, 0x9AE7, 0x5902,
02890     0x9AE8, 0x590A, 0x9AE9, 0x5910, 0x9AEA, 0x591B, 0x9AEB, 0x68A6,
02891     0x9AEC, 0x5925, 0x9AED, 0x592C, 0x9AEE, 0x592D, 0x9AEF, 0x5932,
02892     0x9AF0, 0x5938, 0x9AF1, 0x593E, 0x9AF2, 0x7AD2, 0x9AF3, 0x5955,
02893     0x9AF4, 0x5950, 0x9AF5, 0x594E, 0x9AF6, 0x595A, 0x9AF7, 0x5958,
02894     0x9AF8, 0x5962, 0x9AF9, 0x5960, 0x9AFA, 0x5967, 0x9AFB, 0x596C,
02895     0x9AFC, 0x5969, 0x9B40, 0x5978, 0x9B41, 0x5981, 0x9B42, 0x599D,
02896     0x9B43, 0x4F5E, 0x9B44, 0x4FAB, 0x9B45, 0x59A3, 0x9B46, 0x59B2,
02897     0x9B47, 0x59C6, 0x9B48, 0x59E8, 0x9B49, 0x59DC, 0x9B4A, 0x598D,
02898     0x9B4B, 0x59D9, 0x9B4C, 0x59DA, 0x9B4D, 0x5A25, 0x9B4E, 0x5A1F,
02899     0x9B4F, 0x5A11, 0x9B50, 0x5A1C, 0x9B51, 0x5A09, 0x9B52, 0x5A1A,
02900     0x9B53, 0x5A40, 0x9B54, 0x5A6C, 0x9B55, 0x5A49, 0x9B56, 0x5A35,
02901     0x9B57, 0x5A36, 0x9B58, 0x5A62, 0x9B59, 0x5A6A, 0x9B5A, 0x5A9A,
02902     0x9B5B, 0x5ABC, 0x9B5C, 0x5ABE, 0x9B5D, 0x5ACB, 0x9B5E, 0x5AC2,
02903     0x9B5F, 0x5ABD, 0x9B60, 0x5AE3, 0x9B61, 0x5AD7, 0x9B62, 0x5AE6,
02904     0x9B63, 0x5AE9, 0x9B64, 0x5AD6, 0x9B65, 0x5AFA, 0x9B66, 0x5AFB,
02905     0x9B67, 0x5B0C, 0x9B68, 0x5B0B, 0x9B69, 0x5B16, 0x9B6A, 0x5B32,
02906     0x9B6B, 0x5AD0, 0x9B6C, 0x5B2A, 0x9B6D, 0x5B36, 0x9B6E, 0x5B3E,
02907     0x9B6F, 0x5B43, 0x9B70, 0x5B45, 0x9B71, 0x5B40, 0x9B72, 0x5B51,
02908     0x9B73, 0x5B55, 0x9B74, 0x5B5A, 0x9B75, 0x5B5B, 0x9B76, 0x5B65,
02909     0x9B77, 0x5B69, 0x9B78, 0x5B70, 0x9B79, 0x5B73, 0x9B7A, 0x5B75,
02910     0x9B7B, 0x5B78, 0x9B7C, 0x6588, 0x9B7D, 0x5B7A, 0x9B7E, 0x5B80,
02911     0x9B80, 0x5B83, 0x9B81, 0x5BA6, 0x9B82, 0x5BB8, 0x9B83, 0x5BC3,
02912     0x9B84, 0x5BC7, 0x9B85, 0x5BC9, 0x9B86, 0x5BD4, 0x9B87, 0x5BD0,
02913     0x9B88, 0x5BE4, 0x9B89, 0x5BE6, 0x9B8A, 0x5BE2, 0x9B8B, 0x5BDE,
02914     0x9B8C, 0x5BE5, 0x9B8D, 0x5BEB, 0x9B8E, 0x5BF0, 0x9B8F, 0x5BF6,
02915     0x9B90, 0x5BF3, 0x9B91, 0x5C05, 0x9B92, 0x5C07, 0x9B93, 0x5C08,
02916     0x9B94, 0x5C0D, 0x9B95, 0x5C13, 0x9B96, 0x5C20, 0x9B97, 0x5C22,
02917     0x9B98, 0x5C28, 0x9B99, 0x5C38, 0x9B9A, 0x5C39, 0x9B9B, 0x5C41,
02918     0x9B9C, 0x5C46, 0x9B9D, 0x5C4E, 0x9B9E, 0x5C53, 0x9B9F, 0x5C50,
02919     0x9BA0, 0x5C4F, 0x9BA1, 0x5B71, 0x9BA2, 0x5C6C, 0x9BA3, 0x5C6E,
02920     0x9BA4, 0x4E62, 0x9BA5, 0x5C76, 0x9BA6, 0x5C79, 0x9BA7, 0x5C8C,
02921     0x9BA8, 0x5C91, 0x9BA9, 0x5C94, 0x9BAA, 0x599B, 0x9BAB, 0x5CAB,
02922     0x9BAC, 0x5CBB, 0x9BAD, 0x5CB6, 0x9BAE, 0x5CBC, 0x9BAF, 0x5CB7,
02923     0x9BB0, 0x5CC5, 0x9BB1, 0x5CBE, 0x9BB2, 0x5CC7, 0x9BB3, 0x5CD9,
02924     0x9BB4, 0x5CE9, 0x9BB5, 0x5CFD, 0x9BB6, 0x5CFA, 0x9BB7, 0x5CED,
02925     0x9BB8, 0x5D8C, 0x9BB9, 0x5CEA, 0x9BBA, 0x5D0B, 0x9BBB, 0x5D15,
02926     0x9BBC, 0x5D17, 0x9BBD, 0x5D5C, 0x9BBE, 0x5D1F, 0x9BBF, 0x5D1B,
02927     0x9BC0, 0x5D11, 0x9BC1, 0x5D14, 0x9BC2, 0x5D22, 0x9BC3, 0x5D1A,
02928     0x9BC4, 0x5D19, 0x9BC5, 0x5D18, 0x9BC6, 0x5D4C, 0x9BC7, 0x5D52,
02929     0x9BC8, 0x5D4E, 0x9BC9, 0x5D4B, 0x9BCA, 0x5D6C, 0x9BCB, 0x5D73,
02930     0x9BCC, 0x5D76, 0x9BCD, 0x5D87, 0x9BCE, 0x5D84, 0x9BCF, 0x5D82,
02931     0x9BD0, 0x5DA2, 0x9BD1, 0x5D9D, 0x9BD2, 0x5DAC, 0x9BD3, 0x5DAE,
02932     0x9BD4, 0x5DBD, 0x9BD5, 0x5D90, 0x9BD6, 0x5DB7, 0x9BD7, 0x5DBC,
02933     0x9BD8, 0x5DC9, 0x9BD9, 0x5DCD, 0x9BDA, 0x5DD3, 0x9BDB, 0x5DD2,
02934     0x9BDC, 0x5DD6, 0x9BDD, 0x5DDB, 0x9BDE, 0x5DEB, 0x9BDF, 0x5DF2,
02935     0x9BE0, 0x5DF5, 0x9BE1, 0x5E0B, 0x9BE2, 0x5E1A, 0x9BE3, 0x5E19,
02936     0x9BE4, 0x5E11, 0x9BE5, 0x5E1B, 0x9BE6, 0x5E36, 0x9BE7, 0x5E37,
02937     0x9BE8, 0x5E44, 0x9BE9, 0x5E43, 0x9BEA, 0x5E40, 0x9BEB, 0x5E4E,
02938     0x9BEC, 0x5E57, 0x9BED, 0x5E54, 0x9BEE, 0x5E5F, 0x9BEF, 0x5E62,
02939     0x9BF0, 0x5E64, 0x9BF1, 0x5E47, 0x9BF2, 0x5E75, 0x9BF3, 0x5E76,
02940     0x9BF4, 0x5E7A, 0x9BF5, 0x9EBC, 0x9BF6, 0x5E7F, 0x9BF7, 0x5EA0,
02941     0x9BF8, 0x5EC1, 0x9BF9, 0x5EC2, 0x9BFA, 0x5EC8, 0x9BFB, 0x5ED0,
02942     0x9BFC, 0x5ECF, 0x9C40, 0x5ED6, 0x9C41, 0x5EE3, 0x9C42, 0x5EDD,
02943     0x9C43, 0x5EDA, 0x9C44, 0x5EDB, 0x9C45, 0x5EE2, 0x9C46, 0x5EE1,
02944     0x9C47, 0x5EE8, 0x9C48, 0x5EE9, 0x9C49, 0x5EEC, 0x9C4A, 0x5EF1,
02945     0x9C4B, 0x5EF3, 0x9C4C, 0x5EF0, 0x9C4D, 0x5EF4, 0x9C4E, 0x5EF8,
02946     0x9C4F, 0x5EFE, 0x9C50, 0x5F03, 0x9C51, 0x5F09, 0x9C52, 0x5F5D,
02947     0x9C53, 0x5F5C, 0x9C54, 0x5F0B, 0x9C55, 0x5F11, 0x9C56, 0x5F16,
02948     0x9C57, 0x5F29, 0x9C58, 0x5F2D, 0x9C59, 0x5F38, 0x9C5A, 0x5F41,
02949     0x9C5B, 0x5F48, 0x9C5C, 0x5F4C, 0x9C5D, 0x5F4E, 0x9C5E, 0x5F2F,
02950     0x9C5F, 0x5F51, 0x9C60, 0x5F56, 0x9C61, 0x5F57, 0x9C62, 0x5F59,
02951     0x9C63, 0x5F61, 0x9C64, 0x5F6D, 0x9C65, 0x5F73, 0x9C66, 0x5F77,
02952     0x9C67, 0x5F83, 0x9C68, 0x5F82, 0x9C69, 0x5F7F, 0x9C6A, 0x5F8A,
02953     0x9C6B, 0x5F88, 0x9C6C, 0x5F91, 0x9C6D, 0x5F87, 0x9C6E, 0x5F9E,
02954     0x9C6F, 0x5F99, 0x9C70, 0x5F98, 0x9C71, 0x5FA0, 0x9C72, 0x5FA8,
02955     0x9C73, 0x5FAD, 0x9C74, 0x5FBC, 0x9C75, 0x5FD6, 0x9C76, 0x5FFB,
02956     0x9C77, 0x5FE4, 0x9C78, 0x5FF8, 0x9C79, 0x5FF1, 0x9C7A, 0x5FDD,
02957     0x9C7B, 0x60B3, 0x9C7C, 0x5FFF, 0x9C7D, 0x6021, 0x9C7E, 0x6060,
02958     0x9C80, 0x6019, 0x9C81, 0x6010, 0x9C82, 0x6029, 0x9C83, 0x600E,
02959     0x9C84, 0x6031, 0x9C85, 0x601B, 0x9C86, 0x6015, 0x9C87, 0x602B,
02960     0x9C88, 0x6026, 0x9C89, 0x600F, 0x9C8A, 0x603A, 0x9C8B, 0x605A,
02961     0x9C8C, 0x6041, 0x9C8D, 0x606A, 0x9C8E, 0x6077, 0x9C8F, 0x605F,
02962     0x9C90, 0x604A, 0x9C91, 0x6046, 0x9C92, 0x604D, 0x9C93, 0x6063,
02963     0x9C94, 0x6043, 0x9C95, 0x6064, 0x9C96, 0x6042, 0x9C97, 0x606C,
02964     0x9C98, 0x606B, 0x9C99, 0x6059, 0x9C9A, 0x6081, 0x9C9B, 0x608D,
02965     0x9C9C, 0x60E7, 0x9C9D, 0x6083, 0x9C9E, 0x609A, 0x9C9F, 0x6084,
02966     0x9CA0, 0x609B, 0x9CA1, 0x6096, 0x9CA2, 0x6097, 0x9CA3, 0x6092,
02967     0x9CA4, 0x60A7, 0x9CA5, 0x608B, 0x9CA6, 0x60E1, 0x9CA7, 0x60B8,
02968     0x9CA8, 0x60E0, 0x9CA9, 0x60D3, 0x9CAA, 0x60B4, 0x9CAB, 0x5FF0,
02969     0x9CAC, 0x60BD, 0x9CAD, 0x60C6, 0x9CAE, 0x60B5, 0x9CAF, 0x60D8,
02970     0x9CB0, 0x614D, 0x9CB1, 0x6115, 0x9CB2, 0x6106, 0x9CB3, 0x60F6,
02971     0x9CB4, 0x60F7, 0x9CB5, 0x6100, 0x9CB6, 0x60F4, 0x9CB7, 0x60FA,
02972     0x9CB8, 0x6103, 0x9CB9, 0x6121, 0x9CBA, 0x60FB, 0x9CBB, 0x60F1,
02973     0x9CBC, 0x610D, 0x9CBD, 0x610E, 0x9CBE, 0x6147, 0x9CBF, 0x613E,
02974     0x9CC0, 0x6128, 0x9CC1, 0x6127, 0x9CC2, 0x614A, 0x9CC3, 0x613F,
02975     0x9CC4, 0x613C, 0x9CC5, 0x612C, 0x9CC6, 0x6134, 0x9CC7, 0x613D,
02976     0x9CC8, 0x6142, 0x9CC9, 0x6144, 0x9CCA, 0x6173, 0x9CCB, 0x6177,
02977     0x9CCC, 0x6158, 0x9CCD, 0x6159, 0x9CCE, 0x615A, 0x9CCF, 0x616B,
02978     0x9CD0, 0x6174, 0x9CD1, 0x616F, 0x9CD2, 0x6165, 0x9CD3, 0x6171,
02979     0x9CD4, 0x615F, 0x9CD5, 0x615D, 0x9CD6, 0x6153, 0x9CD7, 0x6175,
02980     0x9CD8, 0x6199, 0x9CD9, 0x6196, 0x9CDA, 0x6187, 0x9CDB, 0x61AC,
02981     0x9CDC, 0x6194, 0x9CDD, 0x619A, 0x9CDE, 0x618A, 0x9CDF, 0x6191,
02982     0x9CE0, 0x61AB, 0x9CE1, 0x61AE, 0x9CE2, 0x61CC, 0x9CE3, 0x61CA,
02983     0x9CE4, 0x61C9, 0x9CE5, 0x61F7, 0x9CE6, 0x61C8, 0x9CE7, 0x61C3,
02984     0x9CE8, 0x61C6, 0x9CE9, 0x61BA, 0x9CEA, 0x61CB, 0x9CEB, 0x7F79,
02985     0x9CEC, 0x61CD, 0x9CED, 0x61E6, 0x9CEE, 0x61E3, 0x9CEF, 0x61F6,
02986     0x9CF0, 0x61FA, 0x9CF1, 0x61F4, 0x9CF2, 0x61FF, 0x9CF3, 0x61FD,
02987     0x9CF4, 0x61FC, 0x9CF5, 0x61FE, 0x9CF6, 0x6200, 0x9CF7, 0x6208,
02988     0x9CF8, 0x6209, 0x9CF9, 0x620D, 0x9CFA, 0x620C, 0x9CFB, 0x6214,
02989     0x9CFC, 0x621B, 0x9D40, 0x621E, 0x9D41, 0x6221, 0x9D42, 0x622A,
02990     0x9D43, 0x622E, 0x9D44, 0x6230, 0x9D45, 0x6232, 0x9D46, 0x6233,
02991     0x9D47, 0x6241, 0x9D48, 0x624E, 0x9D49, 0x625E, 0x9D4A, 0x6263,
02992     0x9D4B, 0x625B, 0x9D4C, 0x6260, 0x9D4D, 0x6268, 0x9D4E, 0x627C,
02993     0x9D4F, 0x6282, 0x9D50, 0x6289, 0x9D51, 0x627E, 0x9D52, 0x6292,
02994     0x9D53, 0x6293, 0x9D54, 0x6296, 0x9D55, 0x62D4, 0x9D56, 0x6283,
02995     0x9D57, 0x6294, 0x9D58, 0x62D7, 0x9D59, 0x62D1, 0x9D5A, 0x62BB,
02996     0x9D5B, 0x62CF, 0x9D5C, 0x62FF, 0x9D5D, 0x62C6, 0x9D5E, 0x64D4,
02997     0x9D5F, 0x62C8, 0x9D60, 0x62DC, 0x9D61, 0x62CC, 0x9D62, 0x62CA,
02998     0x9D63, 0x62C2, 0x9D64, 0x62C7, 0x9D65, 0x629B, 0x9D66, 0x62C9,
02999     0x9D67, 0x630C, 0x9D68, 0x62EE, 0x9D69, 0x62F1, 0x9D6A, 0x6327,
03000     0x9D6B, 0x6302, 0x9D6C, 0x6308, 0x9D6D, 0x62EF, 0x9D6E, 0x62F5,
03001     0x9D6F, 0x6350, 0x9D70, 0x633E, 0x9D71, 0x634D, 0x9D72, 0x641C,
03002     0x9D73, 0x634F, 0x9D74, 0x6396, 0x9D75, 0x638E, 0x9D76, 0x6380,
03003     0x9D77, 0x63AB, 0x9D78, 0x6376, 0x9D79, 0x63A3, 0x9D7A, 0x638F,
03004     0x9D7B, 0x6389, 0x9D7C, 0x639F, 0x9D7D, 0x63B5, 0x9D7E, 0x636B,
03005     0x9D80, 0x6369, 0x9D81, 0x63BE, 0x9D82, 0x63E9, 0x9D83, 0x63C0,
03006     0x9D84, 0x63C6, 0x9D85, 0x63E3, 0x9D86, 0x63C9, 0x9D87, 0x63D2,
03007     0x9D88, 0x63F6, 0x9D89, 0x63C4, 0x9D8A, 0x6416, 0x9D8B, 0x6434,
03008     0x9D8C, 0x6406, 0x9D8D, 0x6413, 0x9D8E, 0x6426, 0x9D8F, 0x6436,
03009     0x9D90, 0x651D, 0x9D91, 0x6417, 0x9D92, 0x6428, 0x9D93, 0x640F,
03010     0x9D94, 0x6467, 0x9D95, 0x646F, 0x9D96, 0x6476, 0x9D97, 0x644E,
03011     0x9D98, 0x652A, 0x9D99, 0x6495, 0x9D9A, 0x6493, 0x9D9B, 0x64A5,
03012     0x9D9C, 0x64A9, 0x9D9D, 0x6488, 0x9D9E, 0x64BC, 0x9D9F, 0x64DA,
03013     0x9DA0, 0x64D2, 0x9DA1, 0x64C5, 0x9DA2, 0x64C7, 0x9DA3, 0x64BB,
03014     0x9DA4, 0x64D8, 0x9DA5, 0x64C2, 0x9DA6, 0x64F1, 0x9DA7, 0x64E7,
03015     0x9DA8, 0x8209, 0x9DA9, 0x64E0, 0x9DAA, 0x64E1, 0x9DAB, 0x62AC,
03016     0x9DAC, 0x64E3, 0x9DAD, 0x64EF, 0x9DAE, 0x652C, 0x9DAF, 0x64F6,
03017     0x9DB0, 0x64F4, 0x9DB1, 0x64F2, 0x9DB2, 0x64FA, 0x9DB3, 0x6500,
03018     0x9DB4, 0x64FD, 0x9DB5, 0x6518, 0x9DB6, 0x651C, 0x9DB7, 0x6505,
03019     0x9DB8, 0x6524, 0x9DB9, 0x6523, 0x9DBA, 0x652B, 0x9DBB, 0x6534,
03020     0x9DBC, 0x6535, 0x9DBD, 0x6537, 0x9DBE, 0x6536, 0x9DBF, 0x6538,
03021     0x9DC0, 0x754B, 0x9DC1, 0x6548, 0x9DC2, 0x6556, 0x9DC3, 0x6555,
03022     0x9DC4, 0x654D, 0x9DC5, 0x6558, 0x9DC6, 0x655E, 0x9DC7, 0x655D,
03023     0x9DC8, 0x6572, 0x9DC9, 0x6578, 0x9DCA, 0x6582, 0x9DCB, 0x6583,
03024     0x9DCC, 0x8B8A, 0x9DCD, 0x659B, 0x9DCE, 0x659F, 0x9DCF, 0x65AB,
03025     0x9DD0, 0x65B7, 0x9DD1, 0x65C3, 0x9DD2, 0x65C6, 0x9DD3, 0x65C1,
03026     0x9DD4, 0x65C4, 0x9DD5, 0x65CC, 0x9DD6, 0x65D2, 0x9DD7, 0x65DB,
03027     0x9DD8, 0x65D9, 0x9DD9, 0x65E0, 0x9DDA, 0x65E1, 0x9DDB, 0x65F1,
03028     0x9DDC, 0x6772, 0x9DDD, 0x660A, 0x9DDE, 0x6603, 0x9DDF, 0x65FB,
03029     0x9DE0, 0x6773, 0x9DE1, 0x6635, 0x9DE2, 0x6636, 0x9DE3, 0x6634,
03030     0x9DE4, 0x661C, 0x9DE5, 0x664F, 0x9DE6, 0x6644, 0x9DE7, 0x6649,
03031     0x9DE8, 0x6641, 0x9DE9, 0x665E, 0x9DEA, 0x665D, 0x9DEB, 0x6664,
03032     0x9DEC, 0x6667, 0x9DED, 0x6668, 0x9DEE, 0x665F, 0x9DEF, 0x6662,
03033     0x9DF0, 0x6670, 0x9DF1, 0x6683, 0x9DF2, 0x6688, 0x9DF3, 0x668E,
03034     0x9DF4, 0x6689, 0x9DF5, 0x6684, 0x9DF6, 0x6698, 0x9DF7, 0x669D,
03035     0x9DF8, 0x66C1, 0x9DF9, 0x66B9, 0x9DFA, 0x66C9, 0x9DFB, 0x66BE,
03036     0x9DFC, 0x66BC, 0x9E40, 0x66C4, 0x9E41, 0x66B8, 0x9E42, 0x66D6,
03037     0x9E43, 0x66DA, 0x9E44, 0x66E0, 0x9E45, 0x663F, 0x9E46, 0x66E6,
03038     0x9E47, 0x66E9, 0x9E48, 0x66F0, 0x9E49, 0x66F5, 0x9E4A, 0x66F7,
03039     0x9E4B, 0x670F, 0x9E4C, 0x6716, 0x9E4D, 0x671E, 0x9E4E, 0x6726,
03040     0x9E4F, 0x6727, 0x9E50, 0x9738, 0x9E51, 0x672E, 0x9E52, 0x673F,
03041     0x9E53, 0x6736, 0x9E54, 0x6741, 0x9E55, 0x6738, 0x9E56, 0x6737,
03042     0x9E57, 0x6746, 0x9E58, 0x675E, 0x9E59, 0x6760, 0x9E5A, 0x6759,
03043     0x9E5B, 0x6763, 0x9E5C, 0x6764, 0x9E5D, 0x6789, 0x9E5E, 0x6770,
03044     0x9E5F, 0x67A9, 0x9E60, 0x677C, 0x9E61, 0x676A, 0x9E62, 0x678C,
03045     0x9E63, 0x678B, 0x9E64, 0x67A6, 0x9E65, 0x67A1, 0x9E66, 0x6785,
03046     0x9E67, 0x67B7, 0x9E68, 0x67EF, 0x9E69, 0x67B4, 0x9E6A, 0x67EC,
03047     0x9E6B, 0x67B3, 0x9E6C, 0x67E9, 0x9E6D, 0x67B8, 0x9E6E, 0x67E4,
03048     0x9E6F, 0x67DE, 0x9E70, 0x67DD, 0x9E71, 0x67E2, 0x9E72, 0x67EE,
03049     0x9E73, 0x67B9, 0x9E74, 0x67CE, 0x9E75, 0x67C6, 0x9E76, 0x67E7,
03050     0x9E77, 0x6A9C, 0x9E78, 0x681E, 0x9E79, 0x6846, 0x9E7A, 0x6829,
03051     0x9E7B, 0x6840, 0x9E7C, 0x684D, 0x9E7D, 0x6832, 0x9E7E, 0x684E,
03052     0x9E80, 0x68B3, 0x9E81, 0x682B, 0x9E82, 0x6859, 0x9E83, 0x6863,
03053     0x9E84, 0x6877, 0x9E85, 0x687F, 0x9E86, 0x689F, 0x9E87, 0x688F,
03054     0x9E88, 0x68AD, 0x9E89, 0x6894, 0x9E8A, 0x689D, 0x9E8B, 0x689B,
03055     0x9E8C, 0x6883, 0x9E8D, 0x6AAE, 0x9E8E, 0x68B9, 0x9E8F, 0x6874,
03056     0x9E90, 0x68B5, 0x9E91, 0x68A0, 0x9E92, 0x68BA, 0x9E93, 0x690F,
03057     0x9E94, 0x688D, 0x9E95, 0x687E, 0x9E96, 0x6901, 0x9E97, 0x68CA,
03058     0x9E98, 0x6908, 0x9E99, 0x68D8, 0x9E9A, 0x6922, 0x9E9B, 0x6926,
03059     0x9E9C, 0x68E1, 0x9E9D, 0x690C, 0x9E9E, 0x68CD, 0x9E9F, 0x68D4,
03060     0x9EA0, 0x68E7, 0x9EA1, 0x68D5, 0x9EA2, 0x6936, 0x9EA3, 0x6912,
03061     0x9EA4, 0x6904, 0x9EA5, 0x68D7, 0x9EA6, 0x68E3, 0x9EA7, 0x6925,
03062     0x9EA8, 0x68F9, 0x9EA9, 0x68E0, 0x9EAA, 0x68EF, 0x9EAB, 0x6928,
03063     0x9EAC, 0x692A, 0x9EAD, 0x691A, 0x9EAE, 0x6923, 0x9EAF, 0x6921,
03064     0x9EB0, 0x68C6, 0x9EB1, 0x6979, 0x9EB2, 0x6977, 0x9EB3, 0x695C,
03065     0x9EB4, 0x6978, 0x9EB5, 0x696B, 0x9EB6, 0x6954, 0x9EB7, 0x697E,
03066     0x9EB8, 0x696E, 0x9EB9, 0x6939, 0x9EBA, 0x6974, 0x9EBB, 0x693D,
03067     0x9EBC, 0x6959, 0x9EBD, 0x6930, 0x9EBE, 0x6961, 0x9EBF, 0x695E,
03068     0x9EC0, 0x695D, 0x9EC1, 0x6981, 0x9EC2, 0x696A, 0x9EC3, 0x69B2,
03069     0x9EC4, 0x69AE, 0x9EC5, 0x69D0, 0x9EC6, 0x69BF, 0x9EC7, 0x69C1,
03070     0x9EC8, 0x69D3, 0x9EC9, 0x69BE, 0x9ECA, 0x69CE, 0x9ECB, 0x5BE8,
03071     0x9ECC, 0x69CA, 0x9ECD, 0x69DD, 0x9ECE, 0x69BB, 0x9ECF, 0x69C3,
03072     0x9ED0, 0x69A7, 0x9ED1, 0x6A2E, 0x9ED2, 0x6991, 0x9ED3, 0x69A0,
03073     0x9ED4, 0x699C, 0x9ED5, 0x6995, 0x9ED6, 0x69B4, 0x9ED7, 0x69DE,
03074     0x9ED8, 0x69E8, 0x9ED9, 0x6A02, 0x9EDA, 0x6A1B, 0x9EDB, 0x69FF,
03075     0x9EDC, 0x6B0A, 0x9EDD, 0x69F9, 0x9EDE, 0x69F2, 0x9EDF, 0x69E7,
03076     0x9EE0, 0x6A05, 0x9EE1, 0x69B1, 0x9EE2, 0x6A1E, 0x9EE3, 0x69ED,
03077     0x9EE4, 0x6A14, 0x9EE5, 0x69EB, 0x9EE6, 0x6A0A, 0x9EE7, 0x6A12,
03078     0x9EE8, 0x6AC1, 0x9EE9, 0x6A23, 0x9EEA, 0x6A13, 0x9EEB, 0x6A44,
03079     0x9EEC, 0x6A0C, 0x9EED, 0x6A72, 0x9EEE, 0x6A36, 0x9EEF, 0x6A78,
03080     0x9EF0, 0x6A47, 0x9EF1, 0x6A62, 0x9EF2, 0x6A59, 0x9EF3, 0x6A66,
03081     0x9EF4, 0x6A48, 0x9EF5, 0x6A38, 0x9EF6, 0x6A22, 0x9EF7, 0x6A90,
03082     0x9EF8, 0x6A8D, 0x9EF9, 0x6AA0, 0x9EFA, 0x6A84, 0x9EFB, 0x6AA2,
03083     0x9EFC, 0x6AA3, 0x9F40, 0x6A97, 0x9F41, 0x8617, 0x9F42, 0x6ABB,
03084     0x9F43, 0x6AC3, 0x9F44, 0x6AC2, 0x9F45, 0x6AB8, 0x9F46, 0x6AB3,
03085     0x9F47, 0x6AAC, 0x9F48, 0x6ADE, 0x9F49, 0x6AD1, 0x9F4A, 0x6ADF,
03086     0x9F4B, 0x6AAA, 0x9F4C, 0x6ADA, 0x9F4D, 0x6AEA, 0x9F4E, 0x6AFB,
03087     0x9F4F, 0x6B05, 0x9F50, 0x8616, 0x9F51, 0x6AFA, 0x9F52, 0x6B12,
03088     0x9F53, 0x6B16, 0x9F54, 0x9B31, 0x9F55, 0x6B1F, 0x9F56, 0x6B38,
03089     0x9F57, 0x6B37, 0x9F58, 0x76DC, 0x9F59, 0x6B39, 0x9F5A, 0x98EE,
03090     0x9F5B, 0x6B47, 0x9F5C, 0x6B43, 0x9F5D, 0x6B49, 0x9F5E, 0x6B50,
03091     0x9F5F, 0x6B59, 0x9F60, 0x6B54, 0x9F61, 0x6B5B, 0x9F62, 0x6B5F,
03092     0x9F63, 0x6B61, 0x9F64, 0x6B78, 0x9F65, 0x6B79, 0x9F66, 0x6B7F,
03093     0x9F67, 0x6B80, 0x9F68, 0x6B84, 0x9F69, 0x6B83, 0x9F6A, 0x6B8D,
03094     0x9F6B, 0x6B98, 0x9F6C, 0x6B95, 0x9F6D, 0x6B9E, 0x9F6E, 0x6BA4,
03095     0x9F6F, 0x6BAA, 0x9F70, 0x6BAB, 0x9F71, 0x6BAF, 0x9F72, 0x6BB2,
03096     0x9F73, 0x6BB1, 0x9F74, 0x6BB3, 0x9F75, 0x6BB7, 0x9F76, 0x6BBC,
03097     0x9F77, 0x6BC6, 0x9F78, 0x6BCB, 0x9F79, 0x6BD3, 0x9F7A, 0x6BDF,
03098     0x9F7B, 0x6BEC, 0x9F7C, 0x6BEB, 0x9F7D, 0x6BF3, 0x9F7E, 0x6BEF,
03099     0x9F80, 0x9EBE, 0x9F81, 0x6C08, 0x9F82, 0x6C13, 0x9F83, 0x6C14,
03100     0x9F84, 0x6C1B, 0x9F85, 0x6C24, 0x9F86, 0x6C23, 0x9F87, 0x6C5E,
03101     0x9F88, 0x6C55, 0x9F89, 0x6C62, 0x9F8A, 0x6C6A, 0x9F8B, 0x6C82,
03102     0x9F8C, 0x6C8D, 0x9F8D, 0x6C9A, 0x9F8E, 0x6C81, 0x9F8F, 0x6C9B,
03103     0x9F90, 0x6C7E, 0x9F91, 0x6C68, 0x9F92, 0x6C73, 0x9F93, 0x6C92,
03104     0x9F94, 0x6C90, 0x9F95, 0x6CC4, 0x9F96, 0x6CF1, 0x9F97, 0x6CD3,
03105     0x9F98, 0x6CBD, 0x9F99, 0x6CD7, 0x9F9A, 0x6CC5, 0x9F9B, 0x6CDD,
03106     0x9F9C, 0x6CAE, 0x9F9D, 0x6CB1, 0x9F9E, 0x6CBE, 0x9F9F, 0x6CBA,
03107     0x9FA0, 0x6CDB, 0x9FA1, 0x6CEF, 0x9FA2, 0x6CD9, 0x9FA3, 0x6CEA,
03108     0x9FA4, 0x6D1F, 0x9FA5, 0x884D, 0x9FA6, 0x6D36, 0x9FA7, 0x6D2B,
03109     0x9FA8, 0x6D3D, 0x9FA9, 0x6D38, 0x9FAA, 0x6D19, 0x9FAB, 0x6D35,
03110     0x9FAC, 0x6D33, 0x9FAD, 0x6D12, 0x9FAE, 0x6D0C, 0x9FAF, 0x6D63,
03111     0x9FB0, 0x6D93, 0x9FB1, 0x6D64, 0x9FB2, 0x6D5A, 0x9FB3, 0x6D79,
03112     0x9FB4, 0x6D59, 0x9FB5, 0x6D8E, 0x9FB6, 0x6D95, 0x9FB7, 0x6FE4,
03113     0x9FB8, 0x6D85, 0x9FB9, 0x6DF9, 0x9FBA, 0x6E15, 0x9FBB, 0x6E0A,
03114     0x9FBC, 0x6DB5, 0x9FBD, 0x6DC7, 0x9FBE, 0x6DE6, 0x9FBF, 0x6DB8,
03115     0x9FC0, 0x6DC6, 0x9FC1, 0x6DEC, 0x9FC2, 0x6DDE, 0x9FC3, 0x6DCC,
03116     0x9FC4, 0x6DE8, 0x9FC5, 0x6DD2, 0x9FC6, 0x6DC5, 0x9FC7, 0x6DFA,
03117     0x9FC8, 0x6DD9, 0x9FC9, 0x6DE4, 0x9FCA, 0x6DD5, 0x9FCB, 0x6DEA,
03118     0x9FCC, 0x6DEE, 0x9FCD, 0x6E2D, 0x9FCE, 0x6E6E, 0x9FCF, 0x6E2E,
03119     0x9FD0, 0x6E19, 0x9FD1, 0x6E72, 0x9FD2, 0x6E5F, 0x9FD3, 0x6E3E,
03120     0x9FD4, 0x6E23, 0x9FD5, 0x6E6B, 0x9FD6, 0x6E2B, 0x9FD7, 0x6E76,
03121     0x9FD8, 0x6E4D, 0x9FD9, 0x6E1F, 0x9FDA, 0x6E43, 0x9FDB, 0x6E3A,
03122     0x9FDC, 0x6E4E, 0x9FDD, 0x6E24, 0x9FDE, 0x6EFF, 0x9FDF, 0x6E1D,
03123     0x9FE0, 0x6E38, 0x9FE1, 0x6E82, 0x9FE2, 0x6EAA, 0x9FE3, 0x6E98,
03124     0x9FE4, 0x6EC9, 0x9FE5, 0x6EB7, 0x9FE6, 0x6ED3, 0x9FE7, 0x6EBD,
03125     0x9FE8, 0x6EAF, 0x9FE9, 0x6EC4, 0x9FEA, 0x6EB2, 0x9FEB, 0x6ED4,
03126     0x9FEC, 0x6ED5, 0x9FED, 0x6E8F, 0x9FEE, 0x6EA5, 0x9FEF, 0x6EC2,
03127     0x9FF0, 0x6E9F, 0x9FF1, 0x6F41, 0x9FF2, 0x6F11, 0x9FF3, 0x704C,
03128     0x9FF4, 0x6EEC, 0x9FF5, 0x6EF8, 0x9FF6, 0x6EFE, 0x9FF7, 0x6F3F,
03129     0x9FF8, 0x6EF2, 0x9FF9, 0x6F31, 0x9FFA, 0x6EEF, 0x9FFB, 0x6F32,
03130     0x9FFC, 0x6ECC, 0xE040, 0x6F3E, 0xE041, 0x6F13, 0xE042, 0x6EF7,
03131     0xE043, 0x6F86, 0xE044, 0x6F7A, 0xE045, 0x6F78, 0xE046, 0x6F81,
03132     0xE047, 0x6F80, 0xE048, 0x6F6F, 0xE049, 0x6F5B, 0xE04A, 0x6FF3,
03133     0xE04B, 0x6F6D, 0xE04C, 0x6F82, 0xE04D, 0x6F7C, 0xE04E, 0x6F58,
03134     0xE04F, 0x6F8E, 0xE050, 0x6F91, 0xE051, 0x6FC2, 0xE052, 0x6F66,
03135     0xE053, 0x6FB3, 0xE054, 0x6FA3, 0xE055, 0x6FA1, 0xE056, 0x6FA4,
03136     0xE057, 0x6FB9, 0xE058, 0x6FC6, 0xE059, 0x6FAA, 0xE05A, 0x6FDF,
03137     0xE05B, 0x6FD5, 0xE05C, 0x6FEC, 0xE05D, 0x6FD4, 0xE05E, 0x6FD8,
03138     0xE05F, 0x6FF1, 0xE060, 0x6FEE, 0xE061, 0x6FDB, 0xE062, 0x7009,
03139     0xE063, 0x700B, 0xE064, 0x6FFA, 0xE065, 0x7011, 0xE066, 0x7001,
03140     0xE067, 0x700F, 0xE068, 0x6FFE, 0xE069, 0x701B, 0xE06A, 0x701A,
03141     0xE06B, 0x6F74, 0xE06C, 0x701D, 0xE06D, 0x7018, 0xE06E, 0x701F,
03142     0xE06F, 0x7030, 0xE070, 0x703E, 0xE071, 0x7032, 0xE072, 0x7051,
03143     0xE073, 0x7063, 0xE074, 0x7099, 0xE075, 0x7092, 0xE076, 0x70AF,
03144     0xE077, 0x70F1, 0xE078, 0x70AC, 0xE079, 0x70B8, 0xE07A, 0x70B3,
03145     0xE07B, 0x70AE, 0xE07C, 0x70DF, 0xE07D, 0x70CB, 0xE07E, 0x70DD,
03146     0xE080, 0x70D9, 0xE081, 0x7109, 0xE082, 0x70FD, 0xE083, 0x711C,
03147     0xE084, 0x7119, 0xE085, 0x7165, 0xE086, 0x7155, 0xE087, 0x7188,
03148     0xE088, 0x7166, 0xE089, 0x7162, 0xE08A, 0x714C, 0xE08B, 0x7156,
03149     0xE08C, 0x716C, 0xE08D, 0x718F, 0xE08E, 0x71FB, 0xE08F, 0x7184,
03150     0xE090, 0x7195, 0xE091, 0x71A8, 0xE092, 0x71AC, 0xE093, 0x71D7,
03151     0xE094, 0x71B9, 0xE095, 0x71BE, 0xE096, 0x71D2, 0xE097, 0x71C9,
03152     0xE098, 0x71D4, 0xE099, 0x71CE, 0xE09A, 0x71E0, 0xE09B, 0x71EC,
03153     0xE09C, 0x71E7, 0xE09D, 0x71F5, 0xE09E, 0x71FC, 0xE09F, 0x71F9,
03154     0xE0A0, 0x71FF, 0xE0A1, 0x720D, 0xE0A2, 0x7210, 0xE0A3, 0x721B,
03155     0xE0A4, 0x7228, 0xE0A5, 0x722D, 0xE0A6, 0x722C, 0xE0A7, 0x7230,
03156     0xE0A8, 0x7232, 0xE0A9, 0x723B, 0xE0AA, 0x723C, 0xE0AB, 0x723F,
03157     0xE0AC, 0x7240, 0xE0AD, 0x7246, 0xE0AE, 0x724B, 0xE0AF, 0x7258,
03158     0xE0B0, 0x7274, 0xE0B1, 0x727E, 0xE0B2, 0x7282, 0xE0B3, 0x7281,
03159     0xE0B4, 0x7287, 0xE0B5, 0x7292, 0xE0B6, 0x7296, 0xE0B7, 0x72A2,
03160     0xE0B8, 0x72A7, 0xE0B9, 0x72B9, 0xE0BA, 0x72B2, 0xE0BB, 0x72C3,
03161     0xE0BC, 0x72C6, 0xE0BD, 0x72C4, 0xE0BE, 0x72CE, 0xE0BF, 0x72D2,
03162     0xE0C0, 0x72E2, 0xE0C1, 0x72E0, 0xE0C2, 0x72E1, 0xE0C3, 0x72F9,
03163     0xE0C4, 0x72F7, 0xE0C5, 0x500F, 0xE0C6, 0x7317, 0xE0C7, 0x730A,
03164     0xE0C8, 0x731C, 0xE0C9, 0x7316, 0xE0CA, 0x731D, 0xE0CB, 0x7334,
03165     0xE0CC, 0x732F, 0xE0CD, 0x7329, 0xE0CE, 0x7325, 0xE0CF, 0x733E,
03166     0xE0D0, 0x734E, 0xE0D1, 0x734F, 0xE0D2, 0x9ED8, 0xE0D3, 0x7357,
03167     0xE0D4, 0x736A, 0xE0D5, 0x7368, 0xE0D6, 0x7370, 0xE0D7, 0x7378,
03168     0xE0D8, 0x7375, 0xE0D9, 0x737B, 0xE0DA, 0x737A, 0xE0DB, 0x73C8,
03169     0xE0DC, 0x73B3, 0xE0DD, 0x73CE, 0xE0DE, 0x73BB, 0xE0DF, 0x73C0,
03170     0xE0E0, 0x73E5, 0xE0E1, 0x73EE, 0xE0E2, 0x73DE, 0xE0E3, 0x74A2,
03171     0xE0E4, 0x7405, 0xE0E5, 0x746F, 0xE0E6, 0x7425, 0xE0E7, 0x73F8,
03172     0xE0E8, 0x7432, 0xE0E9, 0x743A, 0xE0EA, 0x7455, 0xE0EB, 0x743F,
03173     0xE0EC, 0x745F, 0xE0ED, 0x7459, 0xE0EE, 0x7441, 0xE0EF, 0x745C,
03174     0xE0F0, 0x7469, 0xE0F1, 0x7470, 0xE0F2, 0x7463, 0xE0F3, 0x746A,
03175     0xE0F4, 0x7476, 0xE0F5, 0x747E, 0xE0F6, 0x748B, 0xE0F7, 0x749E,
03176     0xE0F8, 0x74A7, 0xE0F9, 0x74CA, 0xE0FA, 0x74CF, 0xE0FB, 0x74D4,
03177     0xE0FC, 0x73F1, 0xE140, 0x74E0, 0xE141, 0x74E3, 0xE142, 0x74E7,
03178     0xE143, 0x74E9, 0xE144, 0x74EE, 0xE145, 0x74F2, 0xE146, 0x74F0,
03179     0xE147, 0x74F1, 0xE148, 0x74F8, 0xE149, 0x74F7, 0xE14A, 0x7504,
03180     0xE14B, 0x7503, 0xE14C, 0x7505, 0xE14D, 0x750C, 0xE14E, 0x750E,
03181     0xE14F, 0x750D, 0xE150, 0x7515, 0xE151, 0x7513, 0xE152, 0x751E,
03182     0xE153, 0x7526, 0xE154, 0x752C, 0xE155, 0x753C, 0xE156, 0x7544,
03183     0xE157, 0x754D, 0xE158, 0x754A, 0xE159, 0x7549, 0xE15A, 0x755B,
03184     0xE15B, 0x7546, 0xE15C, 0x755A, 0xE15D, 0x7569, 0xE15E, 0x7564,
03185     0xE15F, 0x7567, 0xE160, 0x756B, 0xE161, 0x756D, 0xE162, 0x7578,
03186     0xE163, 0x7576, 0xE164, 0x7586, 0xE165, 0x7587, 0xE166, 0x7574,
03187     0xE167, 0x758A, 0xE168, 0x7589, 0xE169, 0x7582, 0xE16A, 0x7594,
03188     0xE16B, 0x759A, 0xE16C, 0x759D, 0xE16D, 0x75A5, 0xE16E, 0x75A3,
03189     0xE16F, 0x75C2, 0xE170, 0x75B3, 0xE171, 0x75C3, 0xE172, 0x75B5,
03190     0xE173, 0x75BD, 0xE174, 0x75B8, 0xE175, 0x75BC, 0xE176, 0x75B1,
03191     0xE177, 0x75CD, 0xE178, 0x75CA, 0xE179, 0x75D2, 0xE17A, 0x75D9,
03192     0xE17B, 0x75E3, 0xE17C, 0x75DE, 0xE17D, 0x75FE, 0xE17E, 0x75FF,
03193     0xE180, 0x75FC, 0xE181, 0x7601, 0xE182, 0x75F0, 0xE183, 0x75FA,
03194     0xE184, 0x75F2, 0xE185, 0x75F3, 0xE186, 0x760B, 0xE187, 0x760D,
03195     0xE188, 0x7609, 0xE189, 0x761F, 0xE18A, 0x7627, 0xE18B, 0x7620,
03196     0xE18C, 0x7621, 0xE18D, 0x7622, 0xE18E, 0x7624, 0xE18F, 0x7634,
03197     0xE190, 0x7630, 0xE191, 0x763B, 0xE192, 0x7647, 0xE193, 0x7648,
03198     0xE194, 0x7646, 0xE195, 0x765C, 0xE196, 0x7658, 0xE197, 0x7661,
03199     0xE198, 0x7662, 0xE199, 0x7668, 0xE19A, 0x7669, 0xE19B, 0x766A,
03200     0xE19C, 0x7667, 0xE19D, 0x766C, 0xE19E, 0x7670, 0xE19F, 0x7672,
03201     0xE1A0, 0x7676, 0xE1A1, 0x7678, 0xE1A2, 0x767C, 0xE1A3, 0x7680,
03202     0xE1A4, 0x7683, 0xE1A5, 0x7688, 0xE1A6, 0x768B, 0xE1A7, 0x768E,
03203     0xE1A8, 0x7696, 0xE1A9, 0x7693, 0xE1AA, 0x7699, 0xE1AB, 0x769A,
03204     0xE1AC, 0x76B0, 0xE1AD, 0x76B4, 0xE1AE, 0x76B8, 0xE1AF, 0x76B9,
03205     0xE1B0, 0x76BA, 0xE1B1, 0x76C2, 0xE1B2, 0x76CD, 0xE1B3, 0x76D6,
03206     0xE1B4, 0x76D2, 0xE1B5, 0x76DE, 0xE1B6, 0x76E1, 0xE1B7, 0x76E5,
03207     0xE1B8, 0x76E7, 0xE1B9, 0x76EA, 0xE1BA, 0x862F, 0xE1BB, 0x76FB,
03208     0xE1BC, 0x7708, 0xE1BD, 0x7707, 0xE1BE, 0x7704, 0xE1BF, 0x7729,
03209     0xE1C0, 0x7724, 0xE1C1, 0x771E, 0xE1C2, 0x7725, 0xE1C3, 0x7726,
03210     0xE1C4, 0x771B, 0xE1C5, 0x7737, 0xE1C6, 0x7738, 0xE1C7, 0x7747,
03211     0xE1C8, 0x775A, 0xE1C9, 0x7768, 0xE1CA, 0x776B, 0xE1CB, 0x775B,
03212     0xE1CC, 0x7765, 0xE1CD, 0x777F, 0xE1CE, 0x777E, 0xE1CF, 0x7779,
03213     0xE1D0, 0x778E, 0xE1D1, 0x778B, 0xE1D2, 0x7791, 0xE1D3, 0x77A0,
03214     0xE1D4, 0x779E, 0xE1D5, 0x77B0, 0xE1D6, 0x77B6, 0xE1D7, 0x77B9,
03215     0xE1D8, 0x77BF, 0xE1D9, 0x77BC, 0xE1DA, 0x77BD, 0xE1DB, 0x77BB,
03216     0xE1DC, 0x77C7, 0xE1DD, 0x77CD, 0xE1DE, 0x77D7, 0xE1DF, 0x77DA,
03217     0xE1E0, 0x77DC, 0xE1E1, 0x77E3, 0xE1E2, 0x77EE, 0xE1E3, 0x77FC,
03218     0xE1E4, 0x780C, 0xE1E5, 0x7812, 0xE1E6, 0x7926, 0xE1E7, 0x7820,
03219     0xE1E8, 0x792A, 0xE1E9, 0x7845, 0xE1EA, 0x788E, 0xE1EB, 0x7874,
03220     0xE1EC, 0x7886, 0xE1ED, 0x787C, 0xE1EE, 0x789A, 0xE1EF, 0x788C,
03221     0xE1F0, 0x78A3, 0xE1F1, 0x78B5, 0xE1F2, 0x78AA, 0xE1F3, 0x78AF,
03222     0xE1F4, 0x78D1, 0xE1F5, 0x78C6, 0xE1F6, 0x78CB, 0xE1F7, 0x78D4,
03223     0xE1F8, 0x78BE, 0xE1F9, 0x78BC, 0xE1FA, 0x78C5, 0xE1FB, 0x78CA,
03224     0xE1FC, 0x78EC, 0xE240, 0x78E7, 0xE241, 0x78DA, 0xE242, 0x78FD,
03225     0xE243, 0x78F4, 0xE244, 0x7907, 0xE245, 0x7912, 0xE246, 0x7911,
03226     0xE247, 0x7919, 0xE248, 0x792C, 0xE249, 0x792B, 0xE24A, 0x7940,
03227     0xE24B, 0x7960, 0xE24C, 0x7957, 0xE24D, 0x795F, 0xE24E, 0x795A,
03228     0xE24F, 0x7955, 0xE250, 0x7953, 0xE251, 0x797A, 0xE252, 0x797F,
03229     0xE253, 0x798A, 0xE254, 0x799D, 0xE255, 0x79A7, 0xE256, 0x9F4B,
03230     0xE257, 0x79AA, 0xE258, 0x79AE, 0xE259, 0x79B3, 0xE25A, 0x79B9,
03231     0xE25B, 0x79BA, 0xE25C, 0x79C9, 0xE25D, 0x79D5, 0xE25E, 0x79E7,
03232     0xE25F, 0x79EC, 0xE260, 0x79E1, 0xE261, 0x79E3, 0xE262, 0x7A08,
03233     0xE263, 0x7A0D, 0xE264, 0x7A18, 0xE265, 0x7A19, 0xE266, 0x7A20,
03234     0xE267, 0x7A1F, 0xE268, 0x7980, 0xE269, 0x7A31, 0xE26A, 0x7A3B,
03235     0xE26B, 0x7A3E, 0xE26C, 0x7A37, 0xE26D, 0x7A43, 0xE26E, 0x7A57,
03236     0xE26F, 0x7A49, 0xE270, 0x7A61, 0xE271, 0x7A62, 0xE272, 0x7A69,
03237     0xE273, 0x9F9D, 0xE274, 0x7A70, 0xE275, 0x7A79, 0xE276, 0x7A7D,
03238     0xE277, 0x7A88, 0xE278, 0x7A97, 0xE279, 0x7A95, 0xE27A, 0x7A98,
03239     0xE27B, 0x7A96, 0xE27C, 0x7AA9, 0xE27D, 0x7AC8, 0xE27E, 0x7AB0,
03240     0xE280, 0x7AB6, 0xE281, 0x7AC5, 0xE282, 0x7AC4, 0xE283, 0x7ABF,
03241     0xE284, 0x9083, 0xE285, 0x7AC7, 0xE286, 0x7ACA, 0xE287, 0x7ACD,
03242     0xE288, 0x7ACF, 0xE289, 0x7AD5, 0xE28A, 0x7AD3, 0xE28B, 0x7AD9,
03243     0xE28C, 0x7ADA, 0xE28D, 0x7ADD, 0xE28E, 0x7AE1, 0xE28F, 0x7AE2,
03244     0xE290, 0x7AE6, 0xE291, 0x7AED, 0xE292, 0x7AF0, 0xE293, 0x7B02,
03245     0xE294, 0x7B0F, 0xE295, 0x7B0A, 0xE296, 0x7B06, 0xE297, 0x7B33,
03246     0xE298, 0x7B18, 0xE299, 0x7B19, 0xE29A, 0x7B1E, 0xE29B, 0x7B35,
03247     0xE29C, 0x7B28, 0xE29D, 0x7B36, 0xE29E, 0x7B50, 0xE29F, 0x7B7A,
03248     0xE2A0, 0x7B04, 0xE2A1, 0x7B4D, 0xE2A2, 0x7B0B, 0xE2A3, 0x7B4C,
03249     0xE2A4, 0x7B45, 0xE2A5, 0x7B75, 0xE2A6, 0x7B65, 0xE2A7, 0x7B74,
03250     0xE2A8, 0x7B67, 0xE2A9, 0x7B70, 0xE2AA, 0x7B71, 0xE2AB, 0x7B6C,
03251     0xE2AC, 0x7B6E, 0xE2AD, 0x7B9D, 0xE2AE, 0x7B98, 0xE2AF, 0x7B9F,
03252     0xE2B0, 0x7B8D, 0xE2B1, 0x7B9C, 0xE2B2, 0x7B9A, 0xE2B3, 0x7B8B,
03253     0xE2B4, 0x7B92, 0xE2B5, 0x7B8F, 0xE2B6, 0x7B5D, 0xE2B7, 0x7B99,
03254     0xE2B8, 0x7BCB, 0xE2B9, 0x7BC1, 0xE2BA, 0x7BCC, 0xE2BB, 0x7BCF,
03255     0xE2BC, 0x7BB4, 0xE2BD, 0x7BC6, 0xE2BE, 0x7BDD, 0xE2BF, 0x7BE9,
03256     0xE2C0, 0x7C11, 0xE2C1, 0x7C14, 0xE2C2, 0x7BE6, 0xE2C3, 0x7BE5,
03257     0xE2C4, 0x7C60, 0xE2C5, 0x7C00, 0xE2C6, 0x7C07, 0xE2C7, 0x7C13,
03258     0xE2C8, 0x7BF3, 0xE2C9, 0x7BF7, 0xE2CA, 0x7C17, 0xE2CB, 0x7C0D,
03259     0xE2CC, 0x7BF6, 0xE2CD, 0x7C23, 0xE2CE, 0x7C27, 0xE2CF, 0x7C2A,
03260     0xE2D0, 0x7C1F, 0xE2D1, 0x7C37, 0xE2D2, 0x7C2B, 0xE2D3, 0x7C3D,
03261     0xE2D4, 0x7C4C, 0xE2D5, 0x7C43, 0xE2D6, 0x7C54, 0xE2D7, 0x7C4F,
03262     0xE2D8, 0x7C40, 0xE2D9, 0x7C50, 0xE2DA, 0x7C58, 0xE2DB, 0x7C5F,
03263     0xE2DC, 0x7C64, 0xE2DD, 0x7C56, 0xE2DE, 0x7C65, 0xE2DF, 0x7C6C,
03264     0xE2E0, 0x7C75, 0xE2E1, 0x7C83, 0xE2E2, 0x7C90, 0xE2E3, 0x7CA4,
03265     0xE2E4, 0x7CAD, 0xE2E5, 0x7CA2, 0xE2E6, 0x7CAB, 0xE2E7, 0x7CA1,
03266     0xE2E8, 0x7CA8, 0xE2E9, 0x7CB3, 0xE2EA, 0x7CB2, 0xE2EB, 0x7CB1,
03267     0xE2EC, 0x7CAE, 0xE2ED, 0x7CB9, 0xE2EE, 0x7CBD, 0xE2EF, 0x7CC0,
03268     0xE2F0, 0x7CC5, 0xE2F1, 0x7CC2, 0xE2F2, 0x7CD8, 0xE2F3, 0x7CD2,
03269     0xE2F4, 0x7CDC, 0xE2F5, 0x7CE2, 0xE2F6, 0x9B3B, 0xE2F7, 0x7CEF,
03270     0xE2F8, 0x7CF2, 0xE2F9, 0x7CF4, 0xE2FA, 0x7CF6, 0xE2FB, 0x7CFA,
03271     0xE2FC, 0x7D06, 0xE340, 0x7D02, 0xE341, 0x7D1C, 0xE342, 0x7D15,
03272     0xE343, 0x7D0A, 0xE344, 0x7D45, 0xE345, 0x7D4B, 0xE346, 0x7D2E,
03273     0xE347, 0x7D32, 0xE348, 0x7D3F, 0xE349, 0x7D35, 0xE34A, 0x7D46,
03274     0xE34B, 0x7D73, 0xE34C, 0x7D56, 0xE34D, 0x7D4E, 0xE34E, 0x7D72,
03275     0xE34F, 0x7D68, 0xE350, 0x7D6E, 0xE351, 0x7D4F, 0xE352, 0x7D63,
03276     0xE353, 0x7D93, 0xE354, 0x7D89, 0xE355, 0x7D5B, 0xE356, 0x7D8F,
03277     0xE357, 0x7D7D, 0xE358, 0x7D9B, 0xE359, 0x7DBA, 0xE35A, 0x7DAE,
03278     0xE35B, 0x7DA3, 0xE35C, 0x7DB5, 0xE35D, 0x7DC7, 0xE35E, 0x7DBD,
03279     0xE35F, 0x7DAB, 0xE360, 0x7E3D, 0xE361, 0x7DA2, 0xE362, 0x7DAF,
03280     0xE363, 0x7DDC, 0xE364, 0x7DB8, 0xE365, 0x7D9F, 0xE366, 0x7DB0,
03281     0xE367, 0x7DD8, 0xE368, 0x7DDD, 0xE369, 0x7DE4, 0xE36A, 0x7DDE,
03282     0xE36B, 0x7DFB, 0xE36C, 0x7DF2, 0xE36D, 0x7DE1, 0xE36E, 0x7E05,
03283     0xE36F, 0x7E0A, 0xE370, 0x7E23, 0xE371, 0x7E21, 0xE372, 0x7E12,
03284     0xE373, 0x7E31, 0xE374, 0x7E1F, 0xE375, 0x7E09, 0xE376, 0x7E0B,
03285     0xE377, 0x7E22, 0xE378, 0x7E46, 0xE379, 0x7E66, 0xE37A, 0x7E3B,
03286     0xE37B, 0x7E35, 0xE37C, 0x7E39, 0xE37D, 0x7E43, 0xE37E, 0x7E37,
03287     0xE380, 0x7E32, 0xE381, 0x7E3A, 0xE382, 0x7E67, 0xE383, 0x7E5D,
03288     0xE384, 0x7E56, 0xE385, 0x7E5E, 0xE386, 0x7E59, 0xE387, 0x7E5A,
03289     0xE388, 0x7E79, 0xE389, 0x7E6A, 0xE38A, 0x7E69, 0xE38B, 0x7E7C,
03290     0xE38C, 0x7E7B, 0xE38D, 0x7E83, 0xE38E, 0x7DD5, 0xE38F, 0x7E7D,
03291     0xE390, 0x8FAE, 0xE391, 0x7E7F, 0xE392, 0x7E88, 0xE393, 0x7E89,
03292     0xE394, 0x7E8C, 0xE395, 0x7E92, 0xE396, 0x7E90, 0xE397, 0x7E93,
03293     0xE398, 0x7E94, 0xE399, 0x7E96, 0xE39A, 0x7E8E, 0xE39B, 0x7E9B,
03294     0xE39C, 0x7E9C, 0xE39D, 0x7F38, 0xE39E, 0x7F3A, 0xE39F, 0x7F45,
03295     0xE3A0, 0x7F4C, 0xE3A1, 0x7F4D, 0xE3A2, 0x7F4E, 0xE3A3, 0x7F50,
03296     0xE3A4, 0x7F51, 0xE3A5, 0x7F55, 0xE3A6, 0x7F54, 0xE3A7, 0x7F58,
03297     0xE3A8, 0x7F5F, 0xE3A9, 0x7F60, 0xE3AA, 0x7F68, 0xE3AB, 0x7F69,
03298     0xE3AC, 0x7F67, 0xE3AD, 0x7F78, 0xE3AE, 0x7F82, 0xE3AF, 0x7F86,
03299     0xE3B0, 0x7F83, 0xE3B1, 0x7F88, 0xE3B2, 0x7F87, 0xE3B3, 0x7F8C,
03300     0xE3B4, 0x7F94, 0xE3B5, 0x7F9E, 0xE3B6, 0x7F9D, 0xE3B7, 0x7F9A,
03301     0xE3B8, 0x7FA3, 0xE3B9, 0x7FAF, 0xE3BA, 0x7FB2, 0xE3BB, 0x7FB9,
03302     0xE3BC, 0x7FAE, 0xE3BD, 0x7FB6, 0xE3BE, 0x7FB8, 0xE3BF, 0x8B71,
03303     0xE3C0, 0x7FC5, 0xE3C1, 0x7FC6, 0xE3C2, 0x7FCA, 0xE3C3, 0x7FD5,
03304     0xE3C4, 0x7FD4, 0xE3C5, 0x7FE1, 0xE3C6, 0x7FE6, 0xE3C7, 0x7FE9,
03305     0xE3C8, 0x7FF3, 0xE3C9, 0x7FF9, 0xE3CA, 0x98DC, 0xE3CB, 0x8006,
03306     0xE3CC, 0x8004, 0xE3CD, 0x800B, 0xE3CE, 0x8012, 0xE3CF, 0x8018,
03307     0xE3D0, 0x8019, 0xE3D1, 0x801C, 0xE3D2, 0x8021, 0xE3D3, 0x8028,
03308     0xE3D4, 0x803F, 0xE3D5, 0x803B, 0xE3D6, 0x804A, 0xE3D7, 0x8046,
03309     0xE3D8, 0x8052, 0xE3D9, 0x8058, 0xE3DA, 0x805A, 0xE3DB, 0x805F,
03310     0xE3DC, 0x8062, 0xE3DD, 0x8068, 0xE3DE, 0x8073, 0xE3DF, 0x8072,
03311     0xE3E0, 0x8070, 0xE3E1, 0x8076, 0xE3E2, 0x8079, 0xE3E3, 0x807D,
03312     0xE3E4, 0x807F, 0xE3E5, 0x8084, 0xE3E6, 0x8086, 0xE3E7, 0x8085,
03313     0xE3E8, 0x809B, 0xE3E9, 0x8093, 0xE3EA, 0x809A, 0xE3EB, 0x80AD,
03314     0xE3EC, 0x5190, 0xE3ED, 0x80AC, 0xE3EE, 0x80DB, 0xE3EF, 0x80E5,
03315     0xE3F0, 0x80D9, 0xE3F1, 0x80DD, 0xE3F2, 0x80C4, 0xE3F3, 0x80DA,
03316     0xE3F4, 0x80D6, 0xE3F5, 0x8109, 0xE3F6, 0x80EF, 0xE3F7, 0x80F1,
03317     0xE3F8, 0x811B, 0xE3F9, 0x8129, 0xE3FA, 0x8123, 0xE3FB, 0x812F,
03318     0xE3FC, 0x814B, 0xE440, 0x968B, 0xE441, 0x8146, 0xE442, 0x813E,
03319     0xE443, 0x8153, 0xE444, 0x8151, 0xE445, 0x80FC, 0xE446, 0x8171,
03320     0xE447, 0x816E, 0xE448, 0x8165, 0xE449, 0x8166, 0xE44A, 0x8174,
03321     0xE44B, 0x8183, 0xE44C, 0x8188, 0xE44D, 0x818A, 0xE44E, 0x8180,
03322     0xE44F, 0x8182, 0xE450, 0x81A0, 0xE451, 0x8195, 0xE452, 0x81A4,
03323     0xE453, 0x81A3, 0xE454, 0x815F, 0xE455, 0x8193, 0xE456, 0x81A9,
03324     0xE457, 0x81B0, 0xE458, 0x81B5, 0xE459, 0x81BE, 0xE45A, 0x81B8,
03325     0xE45B, 0x81BD, 0xE45C, 0x81C0, 0xE45D, 0x81C2, 0xE45E, 0x81BA,
03326     0xE45F, 0x81C9, 0xE460, 0x81CD, 0xE461, 0x81D1, 0xE462, 0x81D9,
03327     0xE463, 0x81D8, 0xE464, 0x81C8, 0xE465, 0x81DA, 0xE466, 0x81DF,
03328     0xE467, 0x81E0, 0xE468, 0x81E7, 0xE469, 0x81FA, 0xE46A, 0x81FB,
03329     0xE46B, 0x81FE, 0xE46C, 0x8201, 0xE46D, 0x8202, 0xE46E, 0x8205,
03330     0xE46F, 0x8207, 0xE470, 0x820A, 0xE471, 0x820D, 0xE472, 0x8210,
03331     0xE473, 0x8216, 0xE474, 0x8229, 0xE475, 0x822B, 0xE476, 0x8238,
03332     0xE477, 0x8233, 0xE478, 0x8240, 0xE479, 0x8259, 0xE47A, 0x8258,
03333     0xE47B, 0x825D, 0xE47C, 0x825A, 0xE47D, 0x825F, 0xE47E, 0x8264,
03334     0xE480, 0x8262, 0xE481, 0x8268, 0xE482, 0x826A, 0xE483, 0x826B,
03335     0xE484, 0x822E, 0xE485, 0x8271, 0xE486, 0x8277, 0xE487, 0x8278,
03336     0xE488, 0x827E, 0xE489, 0x828D, 0xE48A, 0x8292, 0xE48B, 0x82AB,
03337     0xE48C, 0x829F, 0xE48D, 0x82BB, 0xE48E, 0x82AC, 0xE48F, 0x82E1,
03338     0xE490, 0x82E3, 0xE491, 0x82DF, 0xE492, 0x82D2, 0xE493, 0x82F4,
03339     0xE494, 0x82F3, 0xE495, 0x82FA, 0xE496, 0x8393, 0xE497, 0x8303,
03340     0xE498, 0x82FB, 0xE499, 0x82F9, 0xE49A, 0x82DE, 0xE49B, 0x8306,
03341     0xE49C, 0x82DC, 0xE49D, 0x8309, 0xE49E, 0x82D9, 0xE49F, 0x8335,
03342     0xE4A0, 0x8334, 0xE4A1, 0x8316, 0xE4A2, 0x8332, 0xE4A3, 0x8331,
03343     0xE4A4, 0x8340, 0xE4A5, 0x8339, 0xE4A6, 0x8350, 0xE4A7, 0x8345,
03344     0xE4A8, 0x832F, 0xE4A9, 0x832B, 0xE4AA, 0x8317, 0xE4AB, 0x8318,
03345     0xE4AC, 0x8385, 0xE4AD, 0x839A, 0xE4AE, 0x83AA, 0xE4AF, 0x839F,
03346     0xE4B0, 0x83A2, 0xE4B1, 0x8396, 0xE4B2, 0x8323, 0xE4B3, 0x838E,
03347     0xE4B4, 0x8387, 0xE4B5, 0x838A, 0xE4B6, 0x837C, 0xE4B7, 0x83B5,
03348     0xE4B8, 0x8373, 0xE4B9, 0x8375, 0xE4BA, 0x83A0, 0xE4BB, 0x8389,
03349     0xE4BC, 0x83A8, 0xE4BD, 0x83F4, 0xE4BE, 0x8413, 0xE4BF, 0x83EB,
03350     0xE4C0, 0x83CE, 0xE4C1, 0x83FD, 0xE4C2, 0x8403, 0xE4C3, 0x83D8,
03351     0xE4C4, 0x840B, 0xE4C5, 0x83C1, 0xE4C6, 0x83F7, 0xE4C7, 0x8407,
03352     0xE4C8, 0x83E0, 0xE4C9, 0x83F2, 0xE4CA, 0x840D, 0xE4CB, 0x8422,
03353     0xE4CC, 0x8420, 0xE4CD, 0x83BD, 0xE4CE, 0x8438, 0xE4CF, 0x8506,
03354     0xE4D0, 0x83FB, 0xE4D1, 0x846D, 0xE4D2, 0x842A, 0xE4D3, 0x843C,
03355     0xE4D4, 0x855A, 0xE4D5, 0x8484, 0xE4D6, 0x8477, 0xE4D7, 0x846B,
03356     0xE4D8, 0x84AD, 0xE4D9, 0x846E, 0xE4DA, 0x8482, 0xE4DB, 0x8469,
03357     0xE4DC, 0x8446, 0xE4DD, 0x842C, 0xE4DE, 0x846F, 0xE4DF, 0x8479,
03358     0xE4E0, 0x8435, 0xE4E1, 0x84CA, 0xE4E2, 0x8462, 0xE4E3, 0x84B9,
03359     0xE4E4, 0x84BF, 0xE4E5, 0x849F, 0xE4E6, 0x84D9, 0xE4E7, 0x84CD,
03360     0xE4E8, 0x84BB, 0xE4E9, 0x84DA, 0xE4EA, 0x84D0, 0xE4EB, 0x84C1,
03361     0xE4EC, 0x84C6, 0xE4ED, 0x84D6, 0xE4EE, 0x84A1, 0xE4EF, 0x8521,
03362     0xE4F0, 0x84FF, 0xE4F1, 0x84F4, 0xE4F2, 0x8517, 0xE4F3, 0x8518,
03363     0xE4F4, 0x852C, 0xE4F5, 0x851F, 0xE4F6, 0x8515, 0xE4F7, 0x8514,
03364     0xE4F8, 0x84FC, 0xE4F9, 0x8540, 0xE4FA, 0x8563, 0xE4FB, 0x8558,
03365     0xE4FC, 0x8548, 0xE540, 0x8541, 0xE541, 0x8602, 0xE542, 0x854B,
03366     0xE543, 0x8555, 0xE544, 0x8580, 0xE545, 0x85A4, 0xE546, 0x8588,
03367     0xE547, 0x8591, 0xE548, 0x858A, 0xE549, 0x85A8, 0xE54A, 0x856D,
03368     0xE54B, 0x8594, 0xE54C, 0x859B, 0xE54D, 0x85EA, 0xE54E, 0x8587,
03369     0xE54F, 0x859C, 0xE550, 0x8577, 0xE551, 0x857E, 0xE552, 0x8590,
03370     0xE553, 0x85C9, 0xE554, 0x85BA, 0xE555, 0x85CF, 0xE556, 0x85B9,
03371     0xE557, 0x85D0, 0xE558, 0x85D5, 0xE559, 0x85DD, 0xE55A, 0x85E5,
03372     0xE55B, 0x85DC, 0xE55C, 0x85F9, 0xE55D, 0x860A, 0xE55E, 0x8613,
03373     0xE55F, 0x860B, 0xE560, 0x85FE, 0xE561, 0x85FA, 0xE562, 0x8606,
03374     0xE563, 0x8622, 0xE564, 0x861A, 0xE565, 0x8630, 0xE566, 0x863F,
03375     0xE567, 0x864D, 0xE568, 0x4E55, 0xE569, 0x8654, 0xE56A, 0x865F,
03376     0xE56B, 0x8667, 0xE56C, 0x8671, 0xE56D, 0x8693, 0xE56E, 0x86A3,
03377     0xE56F, 0x86A9, 0xE570, 0x86AA, 0xE571, 0x868B, 0xE572, 0x868C,
03378     0xE573, 0x86B6, 0xE574, 0x86AF, 0xE575, 0x86C4, 0xE576, 0x86C6,
03379     0xE577, 0x86B0, 0xE578, 0x86C9, 0xE579, 0x8823, 0xE57A, 0x86AB,
03380     0xE57B, 0x86D4, 0xE57C, 0x86DE, 0xE57D, 0x86E9, 0xE57E, 0x86EC,
03381     0xE580, 0x86DF, 0xE581, 0x86DB, 0xE582, 0x86EF, 0xE583, 0x8712,
03382     0xE584, 0x8706, 0xE585, 0x8708, 0xE586, 0x8700, 0xE587, 0x8703,
03383     0xE588, 0x86FB, 0xE589, 0x8711, 0xE58A, 0x8709, 0xE58B, 0x870D,
03384     0xE58C, 0x86F9, 0xE58D, 0x870A, 0xE58E, 0x8734, 0xE58F, 0x873F,
03385     0xE590, 0x8737, 0xE591, 0x873B, 0xE592, 0x8725, 0xE593, 0x8729,
03386     0xE594, 0x871A, 0xE595, 0x8760, 0xE596, 0x875F, 0xE597, 0x8778,
03387     0xE598, 0x874C, 0xE599, 0x874E, 0xE59A, 0x8774, 0xE59B, 0x8757,
03388     0xE59C, 0x8768, 0xE59D, 0x876E, 0xE59E, 0x8759, 0xE59F, 0x8753,
03389     0xE5A0, 0x8763, 0xE5A1, 0x876A, 0xE5A2, 0x8805, 0xE5A3, 0x87A2,
03390     0xE5A4, 0x879F, 0xE5A5, 0x8782, 0xE5A6, 0x87AF, 0xE5A7, 0x87CB,
03391     0xE5A8, 0x87BD, 0xE5A9, 0x87C0, 0xE5AA, 0x87D0, 0xE5AB, 0x96D6,
03392     0xE5AC, 0x87AB, 0xE5AD, 0x87C4, 0xE5AE, 0x87B3, 0xE5AF, 0x87C7,
03393     0xE5B0, 0x87C6, 0xE5B1, 0x87BB, 0xE5B2, 0x87EF, 0xE5B3, 0x87F2,
03394     0xE5B4, 0x87E0, 0xE5B5, 0x880F, 0xE5B6, 0x880D, 0xE5B7, 0x87FE,
03395     0xE5B8, 0x87F6, 0xE5B9, 0x87F7, 0xE5BA, 0x880E, 0xE5BB, 0x87D2,
03396     0xE5BC, 0x8811, 0xE5BD, 0x8816, 0xE5BE, 0x8815, 0xE5BF, 0x8822,
03397     0xE5C0, 0x8821, 0xE5C1, 0x8831, 0xE5C2, 0x8836, 0xE5C3, 0x8839,
03398     0xE5C4, 0x8827, 0xE5C5, 0x883B, 0xE5C6, 0x8844, 0xE5C7, 0x8842,
03399     0xE5C8, 0x8852, 0xE5C9, 0x8859, 0xE5CA, 0x885E, 0xE5CB, 0x8862,
03400     0xE5CC, 0x886B, 0xE5CD, 0x8881, 0xE5CE, 0x887E, 0xE5CF, 0x889E,
03401     0xE5D0, 0x8875, 0xE5D1, 0x887D, 0xE5D2, 0x88B5, 0xE5D3, 0x8872,
03402     0xE5D4, 0x8882, 0xE5D5, 0x8897, 0xE5D6, 0x8892, 0xE5D7, 0x88AE,
03403     0xE5D8, 0x8899, 0xE5D9, 0x88A2, 0xE5DA, 0x888D, 0xE5DB, 0x88A4,
03404     0xE5DC, 0x88B0, 0xE5DD, 0x88BF, 0xE5DE, 0x88B1, 0xE5DF, 0x88C3,
03405     0xE5E0, 0x88C4, 0xE5E1, 0x88D4, 0xE5E2, 0x88D8, 0xE5E3, 0x88D9,
03406     0xE5E4, 0x88DD, 0xE5E5, 0x88F9, 0xE5E6, 0x8902, 0xE5E7, 0x88FC,
03407     0xE5E8, 0x88F4, 0xE5E9, 0x88E8, 0xE5EA, 0x88F2, 0xE5EB, 0x8904,
03408     0xE5EC, 0x890C, 0xE5ED, 0x890A, 0xE5EE, 0x8913, 0xE5EF, 0x8943,
03409     0xE5F0, 0x891E, 0xE5F1, 0x8925, 0xE5F2, 0x892A, 0xE5F3, 0x892B,
03410     0xE5F4, 0x8941, 0xE5F5, 0x8944, 0xE5F6, 0x893B, 0xE5F7, 0x8936,
03411     0xE5F8, 0x8938, 0xE5F9, 0x894C, 0xE5FA, 0x891D, 0xE5FB, 0x8960,
03412     0xE5FC, 0x895E, 0xE640, 0x8966, 0xE641, 0x8964, 0xE642, 0x896D,
03413     0xE643, 0x896A, 0xE644, 0x896F, 0xE645, 0x8974, 0xE646, 0x8977,
03414     0xE647, 0x897E, 0xE648, 0x8983, 0xE649, 0x8988, 0xE64A, 0x898A,
03415     0xE64B, 0x8993, 0xE64C, 0x8998, 0xE64D, 0x89A1, 0xE64E, 0x89A9,
03416     0xE64F, 0x89A6, 0xE650, 0x89AC, 0xE651, 0x89AF, 0xE652, 0x89B2,
03417     0xE653, 0x89BA, 0xE654, 0x89BD, 0xE655, 0x89BF, 0xE656, 0x89C0,
03418     0xE657, 0x89DA, 0xE658, 0x89DC, 0xE659, 0x89DD, 0xE65A, 0x89E7,
03419     0xE65B, 0x89F4, 0xE65C, 0x89F8, 0xE65D, 0x8A03, 0xE65E, 0x8A16,
03420     0xE65F, 0x8A10, 0xE660, 0x8A0C, 0xE661, 0x8A1B, 0xE662, 0x8A1D,
03421     0xE663, 0x8A25, 0xE664, 0x8A36, 0xE665, 0x8A41, 0xE666, 0x8A5B,
03422     0xE667, 0x8A52, 0xE668, 0x8A46, 0xE669, 0x8A48, 0xE66A, 0x8A7C,
03423     0xE66B, 0x8A6D, 0xE66C, 0x8A6C, 0xE66D, 0x8A62, 0xE66E, 0x8A85,
03424     0xE66F, 0x8A82, 0xE670, 0x8A84, 0xE671, 0x8AA8, 0xE672, 0x8AA1,
03425     0xE673, 0x8A91, 0xE674, 0x8AA5, 0xE675, 0x8AA6, 0xE676, 0x8A9A,
03426     0xE677, 0x8AA3, 0xE678, 0x8AC4, 0xE679, 0x8ACD, 0xE67A, 0x8AC2,
03427     0xE67B, 0x8ADA, 0xE67C, 0x8AEB, 0xE67D, 0x8AF3, 0xE67E, 0x8AE7,
03428     0xE680, 0x8AE4, 0xE681, 0x8AF1, 0xE682, 0x8B14, 0xE683, 0x8AE0,
03429     0xE684, 0x8AE2, 0xE685, 0x8AF7, 0xE686, 0x8ADE, 0xE687, 0x8ADB,
03430     0xE688, 0x8B0C, 0xE689, 0x8B07, 0xE68A, 0x8B1A, 0xE68B, 0x8AE1,
03431     0xE68C, 0x8B16, 0xE68D, 0x8B10, 0xE68E, 0x8B17, 0xE68F, 0x8B20,
03432     0xE690, 0x8B33, 0xE691, 0x97AB, 0xE692, 0x8B26, 0xE693, 0x8B2B,
03433     0xE694, 0x8B3E, 0xE695, 0x8B28, 0xE696, 0x8B41, 0xE697, 0x8B4C,
03434     0xE698, 0x8B4F, 0xE699, 0x8B4E, 0xE69A, 0x8B49, 0xE69B, 0x8B56,
03435     0xE69C, 0x8B5B, 0xE69D, 0x8B5A, 0xE69E, 0x8B6B, 0xE69F, 0x8B5F,
03436     0xE6A0, 0x8B6C, 0xE6A1, 0x8B6F, 0xE6A2, 0x8B74, 0xE6A3, 0x8B7D,
03437     0xE6A4, 0x8B80, 0xE6A5, 0x8B8C, 0xE6A6, 0x8B8E, 0xE6A7, 0x8B92,
03438     0xE6A8, 0x8B93, 0xE6A9, 0x8B96, 0xE6AA, 0x8B99, 0xE6AB, 0x8B9A,
03439     0xE6AC, 0x8C3A, 0xE6AD, 0x8C41, 0xE6AE, 0x8C3F, 0xE6AF, 0x8C48,
03440     0xE6B0, 0x8C4C, 0xE6B1, 0x8C4E, 0xE6B2, 0x8C50, 0xE6B3, 0x8C55,
03441     0xE6B4, 0x8C62, 0xE6B5, 0x8C6C, 0xE6B6, 0x8C78, 0xE6B7, 0x8C7A,
03442     0xE6B8, 0x8C82, 0xE6B9, 0x8C89, 0xE6BA, 0x8C85, 0xE6BB, 0x8C8A,
03443     0xE6BC, 0x8C8D, 0xE6BD, 0x8C8E, 0xE6BE, 0x8C94, 0xE6BF, 0x8C7C,
03444     0xE6C0, 0x8C98, 0xE6C1, 0x621D, 0xE6C2, 0x8CAD, 0xE6C3, 0x8CAA,
03445     0xE6C4, 0x8CBD, 0xE6C5, 0x8CB2, 0xE6C6, 0x8CB3, 0xE6C7, 0x8CAE,
03446     0xE6C8, 0x8CB6, 0xE6C9, 0x8CC8, 0xE6CA, 0x8CC1, 0xE6CB, 0x8CE4,
03447     0xE6CC, 0x8CE3, 0xE6CD, 0x8CDA, 0xE6CE, 0x8CFD, 0xE6CF, 0x8CFA,
03448     0xE6D0, 0x8CFB, 0xE6D1, 0x8D04, 0xE6D2, 0x8D05, 0xE6D3, 0x8D0A,
03449     0xE6D4, 0x8D07, 0xE6D5, 0x8D0F, 0xE6D6, 0x8D0D, 0xE6D7, 0x8D10,
03450     0xE6D8, 0x9F4E, 0xE6D9, 0x8D13, 0xE6DA, 0x8CCD, 0xE6DB, 0x8D14,
03451     0xE6DC, 0x8D16, 0xE6DD, 0x8D67, 0xE6DE, 0x8D6D, 0xE6DF, 0x8D71,
03452     0xE6E0, 0x8D73, 0xE6E1, 0x8D81, 0xE6E2, 0x8D99, 0xE6E3, 0x8DC2,
03453     0xE6E4, 0x8DBE, 0xE6E5, 0x8DBA, 0xE6E6, 0x8DCF, 0xE6E7, 0x8DDA,
03454     0xE6E8, 0x8DD6, 0xE6E9, 0x8DCC, 0xE6EA, 0x8DDB, 0xE6EB, 0x8DCB,
03455     0xE6EC, 0x8DEA, 0xE6ED, 0x8DEB, 0xE6EE, 0x8DDF, 0xE6EF, 0x8DE3,
03456     0xE6F0, 0x8DFC, 0xE6F1, 0x8E08, 0xE6F2, 0x8E09, 0xE6F3, 0x8DFF,
03457     0xE6F4, 0x8E1D, 0xE6F5, 0x8E1E, 0xE6F6, 0x8E10, 0xE6F7, 0x8E1F,
03458     0xE6F8, 0x8E42, 0xE6F9, 0x8E35, 0xE6FA, 0x8E30, 0xE6FB, 0x8E34,
03459     0xE6FC, 0x8E4A, 0xE740, 0x8E47, 0xE741, 0x8E49, 0xE742, 0x8E4C,
03460     0xE743, 0x8E50, 0xE744, 0x8E48, 0xE745, 0x8E59, 0xE746, 0x8E64,
03461     0xE747, 0x8E60, 0xE748, 0x8E2A, 0xE749, 0x8E63, 0xE74A, 0x8E55,
03462     0xE74B, 0x8E76, 0xE74C, 0x8E72, 0xE74D, 0x8E7C, 0xE74E, 0x8E81,
03463     0xE74F, 0x8E87, 0xE750, 0x8E85, 0xE751, 0x8E84, 0xE752, 0x8E8B,
03464     0xE753, 0x8E8A, 0xE754, 0x8E93, 0xE755, 0x8E91, 0xE756, 0x8E94,
03465     0xE757, 0x8E99, 0xE758, 0x8EAA, 0xE759, 0x8EA1, 0xE75A, 0x8EAC,
03466     0xE75B, 0x8EB0, 0xE75C, 0x8EC6, 0xE75D, 0x8EB1, 0xE75E, 0x8EBE,
03467     0xE75F, 0x8EC5, 0xE760, 0x8EC8, 0xE761, 0x8ECB, 0xE762, 0x8EDB,
03468     0xE763, 0x8EE3, 0xE764, 0x8EFC, 0xE765, 0x8EFB, 0xE766, 0x8EEB,
03469     0xE767, 0x8EFE, 0xE768, 0x8F0A, 0xE769, 0x8F05, 0xE76A, 0x8F15,
03470     0xE76B, 0x8F12, 0xE76C, 0x8F19, 0xE76D, 0x8F13, 0xE76E, 0x8F1C,
03471     0xE76F, 0x8F1F, 0xE770, 0x8F1B, 0xE771, 0x8F0C, 0xE772, 0x8F26,
03472     0xE773, 0x8F33, 0xE774, 0x8F3B, 0xE775, 0x8F39, 0xE776, 0x8F45,
03473     0xE777, 0x8F42, 0xE778, 0x8F3E, 0xE779, 0x8F4C, 0xE77A, 0x8F49,
03474     0xE77B, 0x8F46, 0xE77C, 0x8F4E, 0xE77D, 0x8F57, 0xE77E, 0x8F5C,
03475     0xE780, 0x8F62, 0xE781, 0x8F63, 0xE782, 0x8F64, 0xE783, 0x8F9C,
03476     0xE784, 0x8F9F, 0xE785, 0x8FA3, 0xE786, 0x8FAD, 0xE787, 0x8FAF,
03477     0xE788, 0x8FB7, 0xE789, 0x8FDA, 0xE78A, 0x8FE5, 0xE78B, 0x8FE2,
03478     0xE78C, 0x8FEA, 0xE78D, 0x8FEF, 0xE78E, 0x9087, 0xE78F, 0x8FF4,
03479     0xE790, 0x9005, 0xE791, 0x8FF9, 0xE792, 0x8FFA, 0xE793, 0x9011,
03480     0xE794, 0x9015, 0xE795, 0x9021, 0xE796, 0x900D, 0xE797, 0x901E,
03481     0xE798, 0x9016, 0xE799, 0x900B, 0xE79A, 0x9027, 0xE79B, 0x9036,
03482     0xE79C, 0x9035, 0xE79D, 0x9039, 0xE79E, 0x8FF8, 0xE79F, 0x904F,
03483     0xE7A0, 0x9050, 0xE7A1, 0x9051, 0xE7A2, 0x9052, 0xE7A3, 0x900E,
03484     0xE7A4, 0x9049, 0xE7A5, 0x903E, 0xE7A6, 0x9056, 0xE7A7, 0x9058,
03485     0xE7A8, 0x905E, 0xE7A9, 0x9068, 0xE7AA, 0x906F, 0xE7AB, 0x9076,
03486     0xE7AC, 0x96A8, 0xE7AD, 0x9072, 0xE7AE, 0x9082, 0xE7AF, 0x907D,
03487     0xE7B0, 0x9081, 0xE7B1, 0x9080, 0xE7B2, 0x908A, 0xE7B3, 0x9089,
03488     0xE7B4, 0x908F, 0xE7B5, 0x90A8, 0xE7B6, 0x90AF, 0xE7B7, 0x90B1,
03489     0xE7B8, 0x90B5, 0xE7B9, 0x90E2, 0xE7BA, 0x90E4, 0xE7BB, 0x6248,
03490     0xE7BC, 0x90DB, 0xE7BD, 0x9102, 0xE7BE, 0x9112, 0xE7BF, 0x9119,
03491     0xE7C0, 0x9132, 0xE7C1, 0x9130, 0xE7C2, 0x914A, 0xE7C3, 0x9156,
03492     0xE7C4, 0x9158, 0xE7C5, 0x9163, 0xE7C6, 0x9165, 0xE7C7, 0x9169,
03493     0xE7C8, 0x9173, 0xE7C9, 0x9172, 0xE7CA, 0x918B, 0xE7CB, 0x9189,
03494     0xE7CC, 0x9182, 0xE7CD, 0x91A2, 0xE7CE, 0x91AB, 0xE7CF, 0x91AF,
03495     0xE7D0, 0x91AA, 0xE7D1, 0x91B5, 0xE7D2, 0x91B4, 0xE7D3, 0x91BA,
03496     0xE7D4, 0x91C0, 0xE7D5, 0x91C1, 0xE7D6, 0x91C9, 0xE7D7, 0x91CB,
03497     0xE7D8, 0x91D0, 0xE7D9, 0x91D6, 0xE7DA, 0x91DF, 0xE7DB, 0x91E1,
03498     0xE7DC, 0x91DB, 0xE7DD, 0x91FC, 0xE7DE, 0x91F5, 0xE7DF, 0x91F6,
03499     0xE7E0, 0x921E, 0xE7E1, 0x91FF, 0xE7E2, 0x9214, 0xE7E3, 0x922C,
03500     0xE7E4, 0x9215, 0xE7E5, 0x9211, 0xE7E6, 0x925E, 0xE7E7, 0x9257,
03501     0xE7E8, 0x9245, 0xE7E9, 0x9249, 0xE7EA, 0x9264, 0xE7EB, 0x9248,
03502     0xE7EC, 0x9295, 0xE7ED, 0x923F, 0xE7EE, 0x924B, 0xE7EF, 0x9250,
03503     0xE7F0, 0x929C, 0xE7F1, 0x9296, 0xE7F2, 0x9293, 0xE7F3, 0x929B,
03504     0xE7F4, 0x925A, 0xE7F5, 0x92CF, 0xE7F6, 0x92B9, 0xE7F7, 0x92B7,
03505     0xE7F8, 0x92E9, 0xE7F9, 0x930F, 0xE7FA, 0x92FA, 0xE7FB, 0x9344,
03506     0xE7FC, 0x932E, 0xE840, 0x9319, 0xE841, 0x9322, 0xE842, 0x931A,
03507     0xE843, 0x9323, 0xE844, 0x933A, 0xE845, 0x9335, 0xE846, 0x933B,
03508     0xE847, 0x935C, 0xE848, 0x9360, 0xE849, 0x937C, 0xE84A, 0x936E,
03509     0xE84B, 0x9356, 0xE84C, 0x93B0, 0xE84D, 0x93AC, 0xE84E, 0x93AD,
03510     0xE84F, 0x9394, 0xE850, 0x93B9, 0xE851, 0x93D6, 0xE852, 0x93D7,
03511     0xE853, 0x93E8, 0xE854, 0x93E5, 0xE855, 0x93D8, 0xE856, 0x93C3,
03512     0xE857, 0x93DD, 0xE858, 0x93D0, 0xE859, 0x93C8, 0xE85A, 0x93E4,
03513     0xE85B, 0x941A, 0xE85C, 0x9414, 0xE85D, 0x9413, 0xE85E, 0x9403,
03514     0xE85F, 0x9407, 0xE860, 0x9410, 0xE861, 0x9436, 0xE862, 0x942B,
03515     0xE863, 0x9435, 0xE864, 0x9421, 0xE865, 0x943A, 0xE866, 0x9441,
03516     0xE867, 0x9452, 0xE868, 0x9444, 0xE869, 0x945B, 0xE86A, 0x9460,
03517     0xE86B, 0x9462, 0xE86C, 0x945E, 0xE86D, 0x946A, 0xE86E, 0x9229,
03518     0xE86F, 0x9470, 0xE870, 0x9475, 0xE871, 0x9477, 0xE872, 0x947D,
03519     0xE873, 0x945A, 0xE874, 0x947C, 0xE875, 0x947E, 0xE876, 0x9481,
03520     0xE877, 0x947F, 0xE878, 0x9582, 0xE879, 0x9587, 0xE87A, 0x958A,
03521     0xE87B, 0x9594, 0xE87C, 0x9596, 0xE87D, 0x9598, 0xE87E, 0x9599,
03522     0xE880, 0x95A0, 0xE881, 0x95A8, 0xE882, 0x95A7, 0xE883, 0x95AD,
03523     0xE884, 0x95BC, 0xE885, 0x95BB, 0xE886, 0x95B9, 0xE887, 0x95BE,
03524     0xE888, 0x95CA, 0xE889, 0x6FF6, 0xE88A, 0x95C3, 0xE88B, 0x95CD,
03525     0xE88C, 0x95CC, 0xE88D, 0x95D5, 0xE88E, 0x95D4, 0xE88F, 0x95D6,
03526     0xE890, 0x95DC, 0xE891, 0x95E1, 0xE892, 0x95E5, 0xE893, 0x95E2,
03527     0xE894, 0x9621, 0xE895, 0x9628, 0xE896, 0x962E, 0xE897, 0x962F,
03528     0xE898, 0x9642, 0xE899, 0x964C, 0xE89A, 0x964F, 0xE89B, 0x964B,
03529     0xE89C, 0x9677, 0xE89D, 0x965C, 0xE89E, 0x965E, 0xE89F, 0x965D,
03530     0xE8A0, 0x965F, 0xE8A1, 0x9666, 0xE8A2, 0x9672, 0xE8A3, 0x966C,
03531     0xE8A4, 0x968D, 0xE8A5, 0x9698, 0xE8A6, 0x9695, 0xE8A7, 0x9697,
03532     0xE8A8, 0x96AA, 0xE8A9, 0x96A7, 0xE8AA, 0x96B1, 0xE8AB, 0x96B2,
03533     0xE8AC, 0x96B0, 0xE8AD, 0x96B4, 0xE8AE, 0x96B6, 0xE8AF, 0x96B8,
03534     0xE8B0, 0x96B9, 0xE8B1, 0x96CE, 0xE8B2, 0x96CB, 0xE8B3, 0x96C9,
03535     0xE8B4, 0x96CD, 0xE8B5, 0x894D, 0xE8B6, 0x96DC, 0xE8B7, 0x970D,
03536     0xE8B8, 0x96D5, 0xE8B9, 0x96F9, 0xE8BA, 0x9704, 0xE8BB, 0x9706,
03537     0xE8BC, 0x9708, 0xE8BD, 0x9713, 0xE8BE, 0x970E, 0xE8BF, 0x9711,
03538     0xE8C0, 0x970F, 0xE8C1, 0x9716, 0xE8C2, 0x9719, 0xE8C3, 0x9724,
03539     0xE8C4, 0x972A, 0xE8C5, 0x9730, 0xE8C6, 0x9739, 0xE8C7, 0x973D,
03540     0xE8C8, 0x973E, 0xE8C9, 0x9744, 0xE8CA, 0x9746, 0xE8CB, 0x9748,
03541     0xE8CC, 0x9742, 0xE8CD, 0x9749, 0xE8CE, 0x975C, 0xE8CF, 0x9760,
03542     0xE8D0, 0x9764, 0xE8D1, 0x9766, 0xE8D2, 0x9768, 0xE8D3, 0x52D2,
03543     0xE8D4, 0x976B, 0xE8D5, 0x9771, 0xE8D6, 0x9779, 0xE8D7, 0x9785,
03544     0xE8D8, 0x977C, 0xE8D9, 0x9781, 0xE8DA, 0x977A, 0xE8DB, 0x9786,
03545     0xE8DC, 0x978B, 0xE8DD, 0x978F, 0xE8DE, 0x9790, 0xE8DF, 0x979C,
03546     0xE8E0, 0x97A8, 0xE8E1, 0x97A6, 0xE8E2, 0x97A3, 0xE8E3, 0x97B3,
03547     0xE8E4, 0x97B4, 0xE8E5, 0x97C3, 0xE8E6, 0x97C6, 0xE8E7, 0x97C8,
03548     0xE8E8, 0x97CB, 0xE8E9, 0x97DC, 0xE8EA, 0x97ED, 0xE8EB, 0x9F4F,
03549     0xE8EC, 0x97F2, 0xE8ED, 0x7ADF, 0xE8EE, 0x97F6, 0xE8EF, 0x97F5,
03550     0xE8F0, 0x980F, 0xE8F1, 0x980C, 0xE8F2, 0x9838, 0xE8F3, 0x9824,
03551     0xE8F4, 0x9821, 0xE8F5, 0x9837, 0xE8F6, 0x983D, 0xE8F7, 0x9846,
03552     0xE8F8, 0x984F, 0xE8F9, 0x984B, 0xE8FA, 0x986B, 0xE8FB, 0x986F,
03553     0xE8FC, 0x9870, 0xE940, 0x9871, 0xE941, 0x9874, 0xE942, 0x9873,
03554     0xE943, 0x98AA, 0xE944, 0x98AF, 0xE945, 0x98B1, 0xE946, 0x98B6,
03555     0xE947, 0x98C4, 0xE948, 0x98C3, 0xE949, 0x98C6, 0xE94A, 0x98E9,
03556     0xE94B, 0x98EB, 0xE94C, 0x9903, 0xE94D, 0x9909, 0xE94E, 0x9912,
03557     0xE94F, 0x9914, 0xE950, 0x9918, 0xE951, 0x9921, 0xE952, 0x991D,
03558     0xE953, 0x991E, 0xE954, 0x9924, 0xE955, 0x9920, 0xE956, 0x992C,
03559     0xE957, 0x992E, 0xE958, 0x993D, 0xE959, 0x993E, 0xE95A, 0x9942,
03560     0xE95B, 0x9949, 0xE95C, 0x9945, 0xE95D, 0x9950, 0xE95E, 0x994B,
03561     0xE95F, 0x9951, 0xE960, 0x9952, 0xE961, 0x994C, 0xE962, 0x9955,
03562     0xE963, 0x9997, 0xE964, 0x9998, 0xE965, 0x99A5, 0xE966, 0x99AD,
03563     0xE967, 0x99AE, 0xE968, 0x99BC, 0xE969, 0x99DF, 0xE96A, 0x99DB,
03564     0xE96B, 0x99DD, 0xE96C, 0x99D8, 0xE96D, 0x99D1, 0xE96E, 0x99ED,
03565     0xE96F, 0x99EE, 0xE970, 0x99F1, 0xE971, 0x99F2, 0xE972, 0x99FB,
03566     0xE973, 0x99F8, 0xE974, 0x9A01, 0xE975, 0x9A0F, 0xE976, 0x9A05,
03567     0xE977, 0x99E2, 0xE978, 0x9A19, 0xE979, 0x9A2B, 0xE97A, 0x9A37,
03568     0xE97B, 0x9A45, 0xE97C, 0x9A42, 0xE97D, 0x9A40, 0xE97E, 0x9A43,
03569     0xE980, 0x9A3E, 0xE981, 0x9A55, 0xE982, 0x9A4D, 0xE983, 0x9A5B,
03570     0xE984, 0x9A57, 0xE985, 0x9A5F, 0xE986, 0x9A62, 0xE987, 0x9A65,
03571     0xE988, 0x9A64, 0xE989, 0x9A69, 0xE98A, 0x9A6B, 0xE98B, 0x9A6A,
03572     0xE98C, 0x9AAD, 0xE98D, 0x9AB0, 0xE98E, 0x9ABC, 0xE98F, 0x9AC0,
03573     0xE990, 0x9ACF, 0xE991, 0x9AD1, 0xE992, 0x9AD3, 0xE993, 0x9AD4,
03574     0xE994, 0x9ADE, 0xE995, 0x9ADF, 0xE996, 0x9AE2, 0xE997, 0x9AE3,
03575     0xE998, 0x9AE6, 0xE999, 0x9AEF, 0xE99A, 0x9AEB, 0xE99B, 0x9AEE,
03576     0xE99C, 0x9AF4, 0xE99D, 0x9AF1, 0xE99E, 0x9AF7, 0xE99F, 0x9AFB,
03577     0xE9A0, 0x9B06, 0xE9A1, 0x9B18, 0xE9A2, 0x9B1A, 0xE9A3, 0x9B1F,
03578     0xE9A4, 0x9B22, 0xE9A5, 0x9B23, 0xE9A6, 0x9B25, 0xE9A7, 0x9B27,
03579     0xE9A8, 0x9B28, 0xE9A9, 0x9B29, 0xE9AA, 0x9B2A, 0xE9AB, 0x9B2E,
03580     0xE9AC, 0x9B2F, 0xE9AD, 0x9B32, 0xE9AE, 0x9B44, 0xE9AF, 0x9B43,
03581     0xE9B0, 0x9B4F, 0xE9B1, 0x9B4D, 0xE9B2, 0x9B4E, 0xE9B3, 0x9B51,
03582     0xE9B4, 0x9B58, 0xE9B5, 0x9B74, 0xE9B6, 0x9B93, 0xE9B7, 0x9B83,
03583     0xE9B8, 0x9B91, 0xE9B9, 0x9B96, 0xE9BA, 0x9B97, 0xE9BB, 0x9B9F,
03584     0xE9BC, 0x9BA0, 0xE9BD, 0x9BA8, 0xE9BE, 0x9BB4, 0xE9BF, 0x9BC0,
03585     0xE9C0, 0x9BCA, 0xE9C1, 0x9BB9, 0xE9C2, 0x9BC6, 0xE9C3, 0x9BCF,
03586     0xE9C4, 0x9BD1, 0xE9C5, 0x9BD2, 0xE9C6, 0x9BE3, 0xE9C7, 0x9BE2,
03587     0xE9C8, 0x9BE4, 0xE9C9, 0x9BD4, 0xE9CA, 0x9BE1, 0xE9CB, 0x9C3A,
03588     0xE9CC, 0x9BF2, 0xE9CD, 0x9BF1, 0xE9CE, 0x9BF0, 0xE9CF, 0x9C15,
03589     0xE9D0, 0x9C14, 0xE9D1, 0x9C09, 0xE9D2, 0x9C13, 0xE9D3, 0x9C0C,
03590     0xE9D4, 0x9C06, 0xE9D5, 0x9C08, 0xE9D6, 0x9C12, 0xE9D7, 0x9C0A,
03591     0xE9D8, 0x9C04, 0xE9D9, 0x9C2E, 0xE9DA, 0x9C1B, 0xE9DB, 0x9C25,
03592     0xE9DC, 0x9C24, 0xE9DD, 0x9C21, 0xE9DE, 0x9C30, 0xE9DF, 0x9C47,
03593     0xE9E0, 0x9C32, 0xE9E1, 0x9C46, 0xE9E2, 0x9C3E, 0xE9E3, 0x9C5A,
03594     0xE9E4, 0x9C60, 0xE9E5, 0x9C67, 0xE9E6, 0x9C76, 0xE9E7, 0x9C78,
03595     0xE9E8, 0x9CE7, 0xE9E9, 0x9CEC, 0xE9EA, 0x9CF0, 0xE9EB, 0x9D09,
03596     0xE9EC, 0x9D08, 0xE9ED, 0x9CEB, 0xE9EE, 0x9D03, 0xE9EF, 0x9D06,
03597     0xE9F0, 0x9D2A, 0xE9F1, 0x9D26, 0xE9F2, 0x9DAF, 0xE9F3, 0x9D23,
03598     0xE9F4, 0x9D1F, 0xE9F5, 0x9D44, 0xE9F6, 0x9D15, 0xE9F7, 0x9D12,
03599     0xE9F8, 0x9D41, 0xE9F9, 0x9D3F, 0xE9FA, 0x9D3E, 0xE9FB, 0x9D46,
03600     0xE9FC, 0x9D48, 0xEA40, 0x9D5D, 0xEA41, 0x9D5E, 0xEA42, 0x9D64,
03601     0xEA43, 0x9D51, 0xEA44, 0x9D50, 0xEA45, 0x9D59, 0xEA46, 0x9D72,
03602     0xEA47, 0x9D89, 0xEA48, 0x9D87, 0xEA49, 0x9DAB, 0xEA4A, 0x9D6F,
03603     0xEA4B, 0x9D7A, 0xEA4C, 0x9D9A, 0xEA4D, 0x9DA4, 0xEA4E, 0x9DA9,
03604     0xEA4F, 0x9DB2, 0xEA50, 0x9DC4, 0xEA51, 0x9DC1, 0xEA52, 0x9DBB,
03605     0xEA53, 0x9DB8, 0xEA54, 0x9DBA, 0xEA55, 0x9DC6, 0xEA56, 0x9DCF,
03606     0xEA57, 0x9DC2, 0xEA58, 0x9DD9, 0xEA59, 0x9DD3, 0xEA5A, 0x9DF8,
03607     0xEA5B, 0x9DE6, 0xEA5C, 0x9DED, 0xEA5D, 0x9DEF, 0xEA5E, 0x9DFD,
03608     0xEA5F, 0x9E1A, 0xEA60, 0x9E1B, 0xEA61, 0x9E1E, 0xEA62, 0x9E75,
03609     0xEA63, 0x9E79, 0xEA64, 0x9E7D, 0xEA65, 0x9E81, 0xEA66, 0x9E88,
03610     0xEA67, 0x9E8B, 0xEA68, 0x9E8C, 0xEA69, 0x9E92, 0xEA6A, 0x9E95,
03611     0xEA6B, 0x9E91, 0xEA6C, 0x9E9D, 0xEA6D, 0x9EA5, 0xEA6E, 0x9EA9,
03612     0xEA6F, 0x9EB8, 0xEA70, 0x9EAA, 0xEA71, 0x9EAD, 0xEA72, 0x9761,
03613     0xEA73, 0x9ECC, 0xEA74, 0x9ECE, 0xEA75, 0x9ECF, 0xEA76, 0x9ED0,
03614     0xEA77, 0x9ED4, 0xEA78, 0x9EDC, 0xEA79, 0x9EDE, 0xEA7A, 0x9EDD,
03615     0xEA7B, 0x9EE0, 0xEA7C, 0x9EE5, 0xEA7D, 0x9EE8, 0xEA7E, 0x9EEF,
03616     0xEA80, 0x9EF4, 0xEA81, 0x9EF6, 0xEA82, 0x9EF7, 0xEA83, 0x9EF9,
03617     0xEA84, 0x9EFB, 0xEA85, 0x9EFC, 0xEA86, 0x9EFD, 0xEA87, 0x9F07,
03618     0xEA88, 0x9F08, 0xEA89, 0x76B7, 0xEA8A, 0x9F15, 0xEA8B, 0x9F21,
03619     0xEA8C, 0x9F2C, 0xEA8D, 0x9F3E, 0xEA8E, 0x9F4A, 0xEA8F, 0x9F52,
03620     0xEA90, 0x9F54, 0xEA91, 0x9F63, 0xEA92, 0x9F5F, 0xEA93, 0x9F60,
03621     0xEA94, 0x9F61, 0xEA95, 0x9F66, 0xEA96, 0x9F67, 0xEA97, 0x9F6C,
03622     0xEA98, 0x9F6A, 0xEA99, 0x9F77, 0xEA9A, 0x9F72, 0xEA9B, 0x9F76,
03623     0xEA9C, 0x9F95, 0xEA9D, 0x9F9C, 0xEA9E, 0x9FA0, 0xEA9F, 0x582F,
03624     0xEAA0, 0x69C7, 0xEAA1, 0x9059, 0xEAA2, 0x7464, 0xEAA3, 0x51DC,
03625     0xEAA4, 0x7199, 0xFA40, 0x2170, 0xFA41, 0x2171, 0xFA42, 0x2172,
03626     0xFA43, 0x2173, 0xFA44, 0x2174, 0xFA45, 0x2175, 0xFA46, 0x2176,
03627     0xFA47, 0x2177, 0xFA48, 0x2178, 0xFA49, 0x2179, 0xFA55, 0xFFE4,
03628     0xFA56, 0xFF07, 0xFA57, 0xFF02, 0xFA5C, 0x7E8A, 0xFA5D, 0x891C,
03629     0xFA5E, 0x9348, 0xFA5F, 0x9288, 0xFA60, 0x84DC, 0xFA61, 0x4FC9,
03630     0xFA62, 0x70BB, 0xFA63, 0x6631, 0xFA64, 0x68C8, 0xFA65, 0x92F9,
03631     0xFA66, 0x66FB, 0xFA67, 0x5F45, 0xFA68, 0x4E28, 0xFA69, 0x4EE1,
03632     0xFA6A, 0x4EFC, 0xFA6B, 0x4F00, 0xFA6C, 0x4F03, 0xFA6D, 0x4F39,
03633     0xFA6E, 0x4F56, 0xFA6F, 0x4F92, 0xFA70, 0x4F8A, 0xFA71, 0x4F9A,
03634     0xFA72, 0x4F94, 0xFA73, 0x4FCD, 0xFA74, 0x5040, 0xFA75, 0x5022,
03635     0xFA76, 0x4FFF, 0xFA77, 0x501E, 0xFA78, 0x5046, 0xFA79, 0x5070,
03636     0xFA7A, 0x5042, 0xFA7B, 0x5094, 0xFA7C, 0x50F4, 0xFA7D, 0x50D8,
03637     0xFA7E, 0x514A, 0xFA80, 0x5164, 0xFA81, 0x519D, 0xFA82, 0x51BE,
03638     0xFA83, 0x51EC, 0xFA84, 0x5215, 0xFA85, 0x529C, 0xFA86, 0x52A6,
03639     0xFA87, 0x52C0, 0xFA88, 0x52DB, 0xFA89, 0x5300, 0xFA8A, 0x5307,
03640     0xFA8B, 0x5324, 0xFA8C, 0x5372, 0xFA8D, 0x5393, 0xFA8E, 0x53B2,
03641     0xFA8F, 0x53DD, 0xFA90, 0xFA0E, 0xFA91, 0x549C, 0xFA92, 0x548A,
03642     0xFA93, 0x54A9, 0xFA94, 0x54FF, 0xFA95, 0x5586, 0xFA96, 0x5759,
03643     0xFA97, 0x5765, 0xFA98, 0x57AC, 0xFA99, 0x57C8, 0xFA9A, 0x57C7,
03644     0xFA9B, 0xFA0F, 0xFA9C, 0xFA10, 0xFA9D, 0x589E, 0xFA9E, 0x58B2,
03645     0xFA9F, 0x590B, 0xFAA0, 0x5953, 0xFAA1, 0x595B, 0xFAA2, 0x595D,
03646     0xFAA3, 0x5963, 0xFAA4, 0x59A4, 0xFAA5, 0x59BA, 0xFAA6, 0x5B56,
03647     0xFAA7, 0x5BC0, 0xFAA8, 0x752F, 0xFAA9, 0x5BD8, 0xFAAA, 0x5BEC,
03648     0xFAAB, 0x5C1E, 0xFAAC, 0x5CA6, 0xFAAD, 0x5CBA, 0xFAAE, 0x5CF5,
03649     0xFAAF, 0x5D27, 0xFAB0, 0x5D53, 0xFAB1, 0xFA11, 0xFAB2, 0x5D42,
03650     0xFAB3, 0x5D6D, 0xFAB4, 0x5DB8, 0xFAB5, 0x5DB9, 0xFAB6, 0x5DD0,
03651     0xFAB7, 0x5F21, 0xFAB8, 0x5F34, 0xFAB9, 0x5F67, 0xFABA, 0x5FB7,
03652     0xFABB, 0x5FDE, 0xFABC, 0x605D, 0xFABD, 0x6085, 0xFABE, 0x608A,
03653     0xFABF, 0x60DE, 0xFAC0, 0x60D5, 0xFAC1, 0x6120, 0xFAC2, 0x60F2,
03654     0xFAC3, 0x6111, 0xFAC4, 0x6137, 0xFAC5, 0x6130, 0xFAC6, 0x6198,
03655     0xFAC7, 0x6213, 0xFAC8, 0x62A6, 0xFAC9, 0x63F5, 0xFACA, 0x6460,
03656     0xFACB, 0x649D, 0xFACC, 0x64CE, 0xFACD, 0x654E, 0xFACE, 0x6600,
03657     0xFACF, 0x6615, 0xFAD0, 0x663B, 0xFAD1, 0x6609, 0xFAD2, 0x662E,
03658     0xFAD3, 0x661E, 0xFAD4, 0x6624, 0xFAD5, 0x6665, 0xFAD6, 0x6657,
03659     0xFAD7, 0x6659, 0xFAD8, 0xFA12, 0xFAD9, 0x6673, 0xFADA, 0x6699,
03660     0xFADB, 0x66A0, 0xFADC, 0x66B2, 0xFADD, 0x66BF, 0xFADE, 0x66FA,
03661     0xFADF, 0x670E, 0xFAE0, 0xF929, 0xFAE1, 0x6766, 0xFAE2, 0x67BB,
03662     0xFAE3, 0x6852, 0xFAE4, 0x67C0, 0xFAE5, 0x6801, 0xFAE6, 0x6844,
03663     0xFAE7, 0x68CF, 0xFAE8, 0xFA13, 0xFAE9, 0x6968, 0xFAEA, 0xFA14,
03664     0xFAEB, 0x6998, 0xFAEC, 0x69E2, 0xFAED, 0x6A30, 0xFAEE, 0x6A6B,
03665     0xFAEF, 0x6A46, 0xFAF0, 0x6A73, 0xFAF1, 0x6A7E, 0xFAF2, 0x6AE2,
03666     0xFAF3, 0x6AE4, 0xFAF4, 0x6BD6, 0xFAF5, 0x6C3F, 0xFAF6, 0x6C5C,
03667     0xFAF7, 0x6C86, 0xFAF8, 0x6C6F, 0xFAF9, 0x6CDA, 0xFAFA, 0x6D04,
03668     0xFAFB, 0x6D87, 0xFAFC, 0x6D6F, 0xFB40, 0x6D96, 0xFB41, 0x6DAC,
03669     0xFB42, 0x6DCF, 0xFB43, 0x6DF8, 0xFB44, 0x6DF2, 0xFB45, 0x6DFC,
03670     0xFB46, 0x6E39, 0xFB47, 0x6E5C, 0xFB48, 0x6E27, 0xFB49, 0x6E3C,
03671     0xFB4A, 0x6EBF, 0xFB4B, 0x6F88, 0xFB4C, 0x6FB5, 0xFB4D, 0x6FF5,
03672     0xFB4E, 0x7005, 0xFB4F, 0x7007, 0xFB50, 0x7028, 0xFB51, 0x7085,
03673     0xFB52, 0x70AB, 0xFB53, 0x710F, 0xFB54, 0x7104, 0xFB55, 0x715C,
03674     0xFB56, 0x7146, 0xFB57, 0x7147, 0xFB58, 0xFA15, 0xFB59, 0x71C1,
03675     0xFB5A, 0x71FE, 0xFB5B, 0x72B1, 0xFB5C, 0x72BE, 0xFB5D, 0x7324,
03676     0xFB5E, 0xFA16, 0xFB5F, 0x7377, 0xFB60, 0x73BD, 0xFB61, 0x73C9,
03677     0xFB62, 0x73D6, 0xFB63, 0x73E3, 0xFB64, 0x73D2, 0xFB65, 0x7407,
03678     0xFB66, 0x73F5, 0xFB67, 0x7426, 0xFB68, 0x742A, 0xFB69, 0x7429,
03679     0xFB6A, 0x742E, 0xFB6B, 0x7462, 0xFB6C, 0x7489, 0xFB6D, 0x749F,
03680     0xFB6E, 0x7501, 0xFB6F, 0x756F, 0xFB70, 0x7682, 0xFB71, 0x769C,
03681     0xFB72, 0x769E, 0xFB73, 0x769B, 0xFB74, 0x76A6, 0xFB75, 0xFA17,
03682     0xFB76, 0x7746, 0xFB77, 0x52AF, 0xFB78, 0x7821, 0xFB79, 0x784E,
03683     0xFB7A, 0x7864, 0xFB7B, 0x787A, 0xFB7C, 0x7930, 0xFB7D, 0xFA18,
03684     0xFB7E, 0xFA19, 0xFB80, 0xFA1A, 0xFB81, 0x7994, 0xFB82, 0xFA1B,
03685     0xFB83, 0x799B, 0xFB84, 0x7AD1, 0xFB85, 0x7AE7, 0xFB86, 0xFA1C,
03686     0xFB87, 0x7AEB, 0xFB88, 0x7B9E, 0xFB89, 0xFA1D, 0xFB8A, 0x7D48,
03687     0xFB8B, 0x7D5C, 0xFB8C, 0x7DB7, 0xFB8D, 0x7DA0, 0xFB8E, 0x7DD6,
03688     0xFB8F, 0x7E52, 0xFB90, 0x7F47, 0xFB91, 0x7FA1, 0xFB92, 0xFA1E,
03689     0xFB93, 0x8301, 0xFB94, 0x8362, 0xFB95, 0x837F, 0xFB96, 0x83C7,
03690     0xFB97, 0x83F6, 0xFB98, 0x8448, 0xFB99, 0x84B4, 0xFB9A, 0x8553,
03691     0xFB9B, 0x8559, 0xFB9C, 0x856B, 0xFB9D, 0xFA1F, 0xFB9E, 0x85B0,
03692     0xFB9F, 0xFA20, 0xFBA0, 0xFA21, 0xFBA1, 0x8807, 0xFBA2, 0x88F5,
03693     0xFBA3, 0x8A12, 0xFBA4, 0x8A37, 0xFBA5, 0x8A79, 0xFBA6, 0x8AA7,
03694     0xFBA7, 0x8ABE, 0xFBA8, 0x8ADF, 0xFBA9, 0xFA22, 0xFBAA, 0x8AF6,
03695     0xFBAB, 0x8B53, 0xFBAC, 0x8B7F, 0xFBAD, 0x8CF0, 0xFBAE, 0x8CF4,
03696     0xFBAF, 0x8D12, 0xFBB0, 0x8D76, 0xFBB1, 0xFA23, 0xFBB2, 0x8ECF,
03697     0xFBB3, 0xFA24, 0xFBB4, 0xFA25, 0xFBB5, 0x9067, 0xFBB6, 0x90DE,
03698     0xFBB7, 0xFA26, 0xFBB8, 0x9115, 0xFBB9, 0x9127, 0xFBBA, 0x91DA,
03699     0xFBBB, 0x91D7, 0xFBBC, 0x91DE, 0xFBBD, 0x91ED, 0xFBBE, 0x91EE,
03700     0xFBBF, 0x91E4, 0xFBC0, 0x91E5, 0xFBC1, 0x9206, 0xFBC2, 0x9210,
03701     0xFBC3, 0x920A, 0xFBC4, 0x923A, 0xFBC5, 0x9240, 0xFBC6, 0x923C,
03702     0xFBC7, 0x924E, 0xFBC8, 0x9259, 0xFBC9, 0x9251, 0xFBCA, 0x9239,
03703     0xFBCB, 0x9267, 0xFBCC, 0x92A7, 0xFBCD, 0x9277, 0xFBCE, 0x9278,
03704     0xFBCF, 0x92E7, 0xFBD0, 0x92D7, 0xFBD1, 0x92D9, 0xFBD2, 0x92D0,
03705     0xFBD3, 0xFA27, 0xFBD4, 0x92D5, 0xFBD5, 0x92E0, 0xFBD6, 0x92D3,
03706     0xFBD7, 0x9325, 0xFBD8, 0x9321, 0xFBD9, 0x92FB, 0xFBDA, 0xFA28,
03707     0xFBDB, 0x931E, 0xFBDC, 0x92FF, 0xFBDD, 0x931D, 0xFBDE, 0x9302,
03708     0xFBDF, 0x9370, 0xFBE0, 0x9357, 0xFBE1, 0x93A4, 0xFBE2, 0x93C6,
03709     0xFBE3, 0x93DE, 0xFBE4, 0x93F8, 0xFBE5, 0x9431, 0xFBE6, 0x9445,
03710     0xFBE7, 0x9448, 0xFBE8, 0x9592, 0xFBE9, 0xF9DC, 0xFBEA, 0xFA29,
03711     0xFBEB, 0x969D, 0xFBEC, 0x96AF, 0xFBED, 0x9733, 0xFBEE, 0x973B,
03712     0xFBEF, 0x9743, 0xFBF0, 0x974D, 0xFBF1, 0x974F, 0xFBF2, 0x9751,
03713     0xFBF3, 0x9755, 0xFBF4, 0x9857, 0xFBF5, 0x9865, 0xFBF6, 0xFA2A,
03714     0xFBF7, 0xFA2B, 0xFBF8, 0x9927, 0xFBF9, 0xFA2C, 0xFBFA, 0x999E,
03715     0xFBFB, 0x9A4E, 0xFBFC, 0x9AD9, 0xFC40, 0x9ADC, 0xFC41, 0x9B75,
03716     0xFC42, 0x9B72, 0xFC43, 0x9B8F, 0xFC44, 0x9BB1, 0xFC45, 0x9BBB,
03717     0xFC46, 0x9C00, 0xFC47, 0x9D70, 0xFC48, 0x9D6B, 0xFC49, 0xFA2D,
03718     0xFC4A, 0x9E19, 0xFC4B, 0x9ED1, 0, 0
03719 };
03720 #endif
03721
03722
03723
03724 WCHAR ff_convert (  /* Converted code, 0 means conversion error */
03725     WCHAR   src,    /* Character code to be converted */
03726     UINT    dir     /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */
03727 )
03728 {
03729     const WCHAR *p;
03730     WCHAR c;
03731     int i, n, li, hi;
03732
03733
03734     if (src <= 0x80) {  /* ASCII */
03735         c = src;
03736     } else {
03737 #if !_TINY_TABLE
03738         if (dir) {      /* OEMCP to unicode */
03739             p = sjis2uni;
03740             hi = sizeof(sjis2uni) / 4 - 1;
03741         } else {        /* Unicode to OEMCP */
03742             p = uni2sjis;
03743             hi = sizeof(uni2sjis) / 4 - 1;
03744         }
03745         li = 0;
03746         for (n = 16; n; n--) {
03747             i = li + (hi - li) / 2;
03748             if (src == p[i * 2]) break;
03749             if (src > p[i * 2])
03750                 li = i;
03751             else
03752                 hi = i;
03753         }
03754         c = n ? p[i * 2 + 1] : 0;
03755 #else
03756         if (dir) {      /* OEMCP to unicode (Incremental search)*/
03757             p = &uni2sjis[1];
03758             do {
03759                 c = *p;
03760                 p += 2;
03761             p -= 3;
03762             c = *p;
03763             } while (c && c != src);
03764         } else {        /* Unicode to OEMCP */
03765             li = 0; hi = sizeof(uni2sjis) / 4 - 1;
03766             for (n = 16; n; n--) {
03767                 i = li + (hi - li) / 2;
03768                 if (src == uni2sjis[i * 2]) break;
03769                 if (src > uni2sjis[i * 2])
03770                     li = i;
03771                 else
03772                     hi = i;
03773             }
03774             c = n ? uni2sjis[i * 2 + 1] : 0;
03775         }
03776 #endif
03777     }
03778
03779     return c;
03780 }
03781 #else
03782 #error This file is not needed in current configuration.
03783
03784 #endif


BeRTOS: cc936.c Source File

  • fs
  • fatfs
  • option
cc936.c
00001 /*------------------------------------------------------------------------*/
00002 /* Unicode - OEM code bidirectional converter  (C)ChaN, 2009              */
00003 /*                                                                        */
00004 /* CP936 (Simplified Chinese GBK)                                         */
00005 /*------------------------------------------------------------------------*/
00006
00007 #include "../ff.h"
00008
00009
00010 #if _USE_LFN && _CODE_PAGE == 936
00011
00012
00013 static
00014 const WCHAR uni2oem[] = {
00015 /*  Unicode - OEM,  Unicode - OEM,  Unicode - OEM,  Unicode - OEM */
00016     0x00A4, 0xA1E8, 0x00A7, 0xA1EC, 0x00A8, 0xA1A7, 0x00B0, 0xA1E3,
00017     0x00B1, 0xA1C0, 0x00B7, 0xA1A4, 0x00D7, 0xA1C1, 0x00E0, 0xA8A4,
00018     0x00E1, 0xA8A2, 0x00E8, 0xA8A8, 0x00E9, 0xA8A6, 0x00EA, 0xA8BA,
00019     0x00EC, 0xA8AC, 0x00ED, 0xA8AA, 0x00F2, 0xA8B0, 0x00F3, 0xA8AE,
00020     0x00F7, 0xA1C2, 0x00F9, 0xA8B4, 0x00FA, 0xA8B2, 0x00FC, 0xA8B9,
00021     0x0101, 0xA8A1, 0x0113, 0xA8A5, 0x011B, 0xA8A7, 0x012B, 0xA8A9,
00022     0x0144, 0xA8BD, 0x0148, 0xA8BE, 0x014D, 0xA8AD, 0x016B, 0xA8B1,
00023     0x01CE, 0xA8A3, 0x01D0, 0xA8AB, 0x01D2, 0xA8AF, 0x01D4, 0xA8B3,
00024     0x01D6, 0xA8B5, 0x01D8, 0xA8B6, 0x01DA, 0xA8B7, 0x01DC, 0xA8B8,
00025     0x0251, 0xA8BB, 0x0261, 0xA8C0, 0x02C7, 0xA1A6, 0x02C9, 0xA1A5,
00026     0x02CA, 0xA840, 0x02CB, 0xA841, 0x02D9, 0xA842, 0x0391, 0xA6A1,
00027     0x0392, 0xA6A2, 0x0393, 0xA6A3, 0x0394, 0xA6A4, 0x0395, 0xA6A5,
00028     0x0396, 0xA6A6, 0x0397, 0xA6A7, 0x0398, 0xA6A8, 0x0399, 0xA6A9,
00029     0x039A, 0xA6AA, 0x039B, 0xA6AB, 0x039C, 0xA6AC, 0x039D, 0xA6AD,
00030     0x039E, 0xA6AE, 0x039F, 0xA6AF, 0x03A0, 0xA6B0, 0x03A1, 0xA6B1,
00031     0x03A3, 0xA6B2, 0x03A4, 0xA6B3, 0x03A5, 0xA6B4, 0x03A6, 0xA6B5,
00032     0x03A7, 0xA6B6, 0x03A8, 0xA6B7, 0x03A9, 0xA6B8, 0x03B1, 0xA6C1,
00033     0x03B2, 0xA6C2, 0x03B3, 0xA6C3, 0x03B4, 0xA6C4, 0x03B5, 0xA6C5,
00034     0x03B6, 0xA6C6, 0x03B7, 0xA6C7, 0x03B8, 0xA6C8, 0x03B9, 0xA6C9,
00035     0x03BA, 0xA6CA, 0x03BB, 0xA6CB, 0x03BC, 0xA6CC, 0x03BD, 0xA6CD,
00036     0x03BE, 0xA6CE, 0x03BF, 0xA6CF, 0x03C0, 0xA6D0, 0x03C1, 0xA6D1,
00037     0x03C3, 0xA6D2, 0x03C4, 0xA6D3, 0x03C5, 0xA6D4, 0x03C6, 0xA6D5,
00038     0x03C7, 0xA6D6, 0x03C8, 0xA6D7, 0x03C9, 0xA6D8, 0x0401, 0xA7A7,
00039     0x0410, 0xA7A1, 0x0411, 0xA7A2, 0x0412, 0xA7A3, 0x0413, 0xA7A4,
00040     0x0414, 0xA7A5, 0x0415, 0xA7A6, 0x0416, 0xA7A8, 0x0417, 0xA7A9,
00041     0x0418, 0xA7AA, 0x0419, 0xA7AB, 0x041A, 0xA7AC, 0x041B, 0xA7AD,
00042     0x041C, 0xA7AE, 0x041D, 0xA7AF, 0x041E, 0xA7B0, 0x041F, 0xA7B1,
00043     0x0420, 0xA7B2, 0x0421, 0xA7B3, 0x0422, 0xA7B4, 0x0423, 0xA7B5,
00044     0x0424, 0xA7B6, 0x0425, 0xA7B7, 0x0426, 0xA7B8, 0x0427, 0xA7B9,
00045     0x0428, 0xA7BA, 0x0429, 0xA7BB, 0x042A, 0xA7BC, 0x042B, 0xA7BD,
00046     0x042C, 0xA7BE, 0x042D, 0xA7BF, 0x042E, 0xA7C0, 0x042F, 0xA7C1,
00047     0x0430, 0xA7D1, 0x0431, 0xA7D2, 0x0432, 0xA7D3, 0x0433, 0xA7D4,
00048     0x0434, 0xA7D5, 0x0435, 0xA7D6, 0x0436, 0xA7D8, 0x0437, 0xA7D9,
00049     0x0438, 0xA7DA, 0x0439, 0xA7DB, 0x043A, 0xA7DC, 0x043B, 0xA7DD,
00050     0x043C, 0xA7DE, 0x043D, 0xA7DF, 0x043E, 0xA7E0, 0x043F, 0xA7E1,
00051     0x0440, 0xA7E2, 0x0441, 0xA7E3, 0x0442, 0xA7E4, 0x0443, 0xA7E5,
00052     0x0444, 0xA7E6, 0x0445, 0xA7E7, 0x0446, 0xA7E8, 0x0447, 0xA7E9,
00053     0x0448, 0xA7EA, 0x0449, 0xA7EB, 0x044A, 0xA7EC, 0x044B, 0xA7ED,
00054     0x044C, 0xA7EE, 0x044D, 0xA7EF, 0x044E, 0xA7F0, 0x044F, 0xA7F1,
00055     0x0451, 0xA7D7, 0x2010, 0xA95C, 0x2013, 0xA843, 0x2014, 0xA1AA,
00056     0x2015, 0xA844, 0x2016, 0xA1AC, 0x2018, 0xA1AE, 0x2019, 0xA1AF,
00057     0x201C, 0xA1B0, 0x201D, 0xA1B1, 0x2025, 0xA845, 0x2026, 0xA1AD,
00058     0x2030, 0xA1EB, 0x2032, 0xA1E4, 0x2033, 0xA1E5, 0x2035, 0xA846,
00059     0x203B, 0xA1F9, 0x20AC, 0x0080, 0x2103, 0xA1E6, 0x2105, 0xA847,
00060     0x2109, 0xA848, 0x2116, 0xA1ED, 0x2121, 0xA959, 0x2160, 0xA2F1,
00061     0x2161, 0xA2F2, 0x2162, 0xA2F3, 0x2163, 0xA2F4, 0x2164, 0xA2F5,
00062     0x2165, 0xA2F6, 0x2166, 0xA2F7, 0x2167, 0xA2F8, 0x2168, 0xA2F9,
00063     0x2169, 0xA2FA, 0x216A, 0xA2FB, 0x216B, 0xA2FC, 0x2170, 0xA2A1,
00064     0x2171, 0xA2A2, 0x2172, 0xA2A3, 0x2173, 0xA2A4, 0x2174, 0xA2A5,
00065     0x2175, 0xA2A6, 0x2176, 0xA2A7, 0x2177, 0xA2A8, 0x2178, 0xA2A9,
00066     0x2179, 0xA2AA, 0x2190, 0xA1FB, 0x2191, 0xA1FC, 0x2192, 0xA1FA,
00067     0x2193, 0xA1FD, 0x2196, 0xA849, 0x2197, 0xA84A, 0x2198, 0xA84B,
00068     0x2199, 0xA84C, 0x2208, 0xA1CA, 0x220F, 0xA1C7, 0x2211, 0xA1C6,
00069     0x2215, 0xA84D, 0x221A, 0xA1CC, 0x221D, 0xA1D8, 0x221E, 0xA1DE,
00070     0x221F, 0xA84E, 0x2220, 0xA1CF, 0x2223, 0xA84F, 0x2225, 0xA1CE,
00071     0x2227, 0xA1C4, 0x2228, 0xA1C5, 0x2229, 0xA1C9, 0x222A, 0xA1C8,
00072     0x222B, 0xA1D2, 0x222E, 0xA1D3, 0x2234, 0xA1E0, 0x2235, 0xA1DF,
00073     0x2236, 0xA1C3, 0x2237, 0xA1CB, 0x223D, 0xA1D7, 0x2248, 0xA1D6,
00074     0x224C, 0xA1D5, 0x2252, 0xA850, 0x2260, 0xA1D9, 0x2261, 0xA1D4,
00075     0x2264, 0xA1DC, 0x2265, 0xA1DD, 0x2266, 0xA851, 0x2267, 0xA852,
00076     0x226E, 0xA1DA, 0x226F, 0xA1DB, 0x2295, 0xA892, 0x2299, 0xA1D1,
00077     0x22A5, 0xA1CD, 0x22BF, 0xA853, 0x2312, 0xA1D0, 0x2460, 0xA2D9,
00078     0x2461, 0xA2DA, 0x2462, 0xA2DB, 0x2463, 0xA2DC, 0x2464, 0xA2DD,
00079     0x2465, 0xA2DE, 0x2466, 0xA2DF, 0x2467, 0xA2E0, 0x2468, 0xA2E1,
00080     0x2469, 0xA2E2, 0x2474, 0xA2C5, 0x2475, 0xA2C6, 0x2476, 0xA2C7,
00081     0x2477, 0xA2C8, 0x2478, 0xA2C9, 0x2479, 0xA2CA, 0x247A, 0xA2CB,
00082     0x247B, 0xA2CC, 0x247C, 0xA2CD, 0x247D, 0xA2CE, 0x247E, 0xA2CF,
00083     0x247F, 0xA2D0, 0x2480, 0xA2D1, 0x2481, 0xA2D2, 0x2482, 0xA2D3,
00084     0x2483, 0xA2D4, 0x2484, 0xA2D5, 0x2485, 0xA2D6, 0x2486, 0xA2D7,
00085     0x2487, 0xA2D8, 0x2488, 0xA2B1, 0x2489, 0xA2B2, 0x248A, 0xA2B3,
00086     0x248B, 0xA2B4, 0x248C, 0xA2B5, 0x248D, 0xA2B6, 0x248E, 0xA2B7,
00087     0x248F, 0xA2B8, 0x2490, 0xA2B9, 0x2491, 0xA2BA, 0x2492, 0xA2BB,
00088     0x2493, 0xA2BC, 0x2494, 0xA2BD, 0x2495, 0xA2BE, 0x2496, 0xA2BF,
00089     0x2497, 0xA2C0, 0x2498, 0xA2C1, 0x2499, 0xA2C2, 0x249A, 0xA2C3,
00090     0x249B, 0xA2C4, 0x2500, 0xA9A4, 0x2501, 0xA9A5, 0x2502, 0xA9A6,
00091     0x2503, 0xA9A7, 0x2504, 0xA9A8, 0x2505, 0xA9A9, 0x2506, 0xA9AA,
00092     0x2507, 0xA9AB, 0x2508, 0xA9AC, 0x2509, 0xA9AD, 0x250A, 0xA9AE,
00093     0x250B, 0xA9AF, 0x250C, 0xA9B0, 0x250D, 0xA9B1, 0x250E, 0xA9B2,
00094     0x250F, 0xA9B3, 0x2510, 0xA9B4, 0x2511, 0xA9B5, 0x2512, 0xA9B6,
00095     0x2513, 0xA9B7, 0x2514, 0xA9B8, 0x2515, 0xA9B9, 0x2516, 0xA9BA,
00096     0x2517, 0xA9BB, 0x2518, 0xA9BC, 0x2519, 0xA9BD, 0x251A, 0xA9BE,
00097     0x251B, 0xA9BF, 0x251C, 0xA9C0, 0x251D, 0xA9C1, 0x251E, 0xA9C2,
00098     0x251F, 0xA9C3, 0x2520, 0xA9C4, 0x2521, 0xA9C5, 0x2522, 0xA9C6,
00099     0x2523, 0xA9C7, 0x2524, 0xA9C8, 0x2525, 0xA9C9, 0x2526, 0xA9CA,
00100     0x2527, 0xA9CB, 0x2528, 0xA9CC, 0x2529, 0xA9CD, 0x252A, 0xA9CE,
00101     0x252B, 0xA9CF, 0x252C, 0xA9D0, 0x252D, 0xA9D1, 0x252E, 0xA9D2,
00102     0x252F, 0xA9D3, 0x2530, 0xA9D4, 0x2531, 0xA9D5, 0x2532, 0xA9D6,
00103     0x2533, 0xA9D7, 0x2534, 0xA9D8, 0x2535, 0xA9D9, 0x2536, 0xA9DA,
00104     0x2537, 0xA9DB, 0x2538, 0xA9DC, 0x2539, 0xA9DD, 0x253A, 0xA9DE,
00105     0x253B, 0xA9DF, 0x253C, 0xA9E0, 0x253D, 0xA9E1, 0x253E, 0xA9E2,
00106     0x253F, 0xA9E3, 0x2540, 0xA9E4, 0x2541, 0xA9E5, 0x2542, 0xA9E6,
00107     0x2543, 0xA9E7, 0x2544, 0xA9E8, 0x2545, 0xA9E9, 0x2546, 0xA9EA,
00108     0x2547, 0xA9EB, 0x2548, 0xA9EC, 0x2549, 0xA9ED, 0x254A, 0xA9EE,
00109     0x254B, 0xA9EF, 0x2550, 0xA854, 0x2551, 0xA855, 0x2552, 0xA856,
00110     0x2553, 0xA857, 0x2554, 0xA858, 0x2555, 0xA859, 0x2556, 0xA85A,
00111     0x2557, 0xA85B, 0x2558, 0xA85C, 0x2559, 0xA85D, 0x255A, 0xA85E,
00112     0x255B, 0xA85F, 0x255C, 0xA860, 0x255D, 0xA861, 0x255E, 0xA862,
00113     0x255F, 0xA863, 0x2560, 0xA864, 0x2561, 0xA865, 0x2562, 0xA866,
00114     0x2563, 0xA867, 0x2564, 0xA868, 0x2565, 0xA869, 0x2566, 0xA86A,
00115     0x2567, 0xA86B, 0x2568, 0xA86C, 0x2569, 0xA86D, 0x256A, 0xA86E,
00116     0x256B, 0xA86F, 0x256C, 0xA870, 0x256D, 0xA871, 0x256E, 0xA872,
00117     0x256F, 0xA873, 0x2570, 0xA874, 0x2571, 0xA875, 0x2572, 0xA876,
00118     0x2573, 0xA877, 0x2581, 0xA878, 0x2582, 0xA879, 0x2583, 0xA87A,
00119     0x2584, 0xA87B, 0x2585, 0xA87C, 0x2586, 0xA87D, 0x2587, 0xA87E,
00120     0x2588, 0xA880, 0x2589, 0xA881, 0x258A, 0xA882, 0x258B, 0xA883,
00121     0x258C, 0xA884, 0x258D, 0xA885, 0x258E, 0xA886, 0x258F, 0xA887,
00122     0x2593, 0xA888, 0x2594, 0xA889, 0x2595, 0xA88A, 0x25A0, 0xA1F6,
00123     0x25A1, 0xA1F5, 0x25B2, 0xA1F8, 0x25B3, 0xA1F7, 0x25BC, 0xA88B,
00124     0x25BD, 0xA88C, 0x25C6, 0xA1F4, 0x25C7, 0xA1F3, 0x25CB, 0xA1F0,
00125     0x25CE, 0xA1F2, 0x25CF, 0xA1F1, 0x25E2, 0xA88D, 0x25E3, 0xA88E,
00126     0x25E4, 0xA88F, 0x25E5, 0xA890, 0x2605, 0xA1EF, 0x2606, 0xA1EE,
00127     0x2609, 0xA891, 0x2640, 0xA1E2, 0x2642, 0xA1E1, 0x3000, 0xA1A1,
00128     0x3001, 0xA1A2, 0x3002, 0xA1A3, 0x3003, 0xA1A8, 0x3005, 0xA1A9,
00129     0x3006, 0xA965, 0x3007, 0xA996, 0x3008, 0xA1B4, 0x3009, 0xA1B5,
00130     0x300A, 0xA1B6, 0x300B, 0xA1B7, 0x300C, 0xA1B8, 0x300D, 0xA1B9,
00131     0x300E, 0xA1BA, 0x300F, 0xA1BB, 0x3010, 0xA1BE, 0x3011, 0xA1BF,
00132     0x3012, 0xA893, 0x3013, 0xA1FE, 0x3014, 0xA1B2, 0x3015, 0xA1B3,
00133     0x3016, 0xA1BC, 0x3017, 0xA1BD, 0x301D, 0xA894, 0x301E, 0xA895,
00134     0x3021, 0xA940, 0x3022, 0xA941, 0x3023, 0xA942, 0x3024, 0xA943,
00135     0x3025, 0xA944, 0x3026, 0xA945, 0x3027, 0xA946, 0x3028, 0xA947,
00136     0x3029, 0xA948, 0x3041, 0xA4A1, 0x3042, 0xA4A2, 0x3043, 0xA4A3,
00137     0x3044, 0xA4A4, 0x3045, 0xA4A5, 0x3046, 0xA4A6, 0x3047, 0xA4A7,
00138     0x3048, 0xA4A8, 0x3049, 0xA4A9, 0x304A, 0xA4AA, 0x304B, 0xA4AB,
00139     0x304C, 0xA4AC, 0x304D, 0xA4AD, 0x304E, 0xA4AE, 0x304F, 0xA4AF,
00140     0x3050, 0xA4B0, 0x3051, 0xA4B1, 0x3052, 0xA4B2, 0x3053, 0xA4B3,
00141     0x3054, 0xA4B4, 0x3055, 0xA4B5, 0x3056, 0xA4B6, 0x3057, 0xA4B7,
00142     0x3058, 0xA4B8, 0x3059, 0xA4B9, 0x305A, 0xA4BA, 0x305B, 0xA4BB,
00143     0x305C, 0xA4BC, 0x305D, 0xA4BD, 0x305E, 0xA4BE, 0x305F, 0xA4BF,
00144     0x3060, 0xA4C0, 0x3061, 0xA4C1, 0x3062, 0xA4C2, 0x3063, 0xA4C3,
00145     0x3064, 0xA4C4, 0x3065, 0xA4C5, 0x3066, 0xA4C6, 0x3067, 0xA4C7,
00146     0x3068, 0xA4C8, 0x3069, 0xA4C9, 0x306A, 0xA4CA, 0x306B, 0xA4CB,
00147     0x306C, 0xA4CC, 0x306D, 0xA4CD, 0x306E, 0xA4CE, 0x306F, 0xA4CF,
00148     0x3070, 0xA4D0, 0x3071, 0xA4D1, 0x3072, 0xA4D2, 0x3073, 0xA4D3,
00149     0x3074, 0xA4D4, 0x3075, 0xA4D5, 0x3076, 0xA4D6, 0x3077, 0xA4D7,
00150     0x3078, 0xA4D8, 0x3079, 0xA4D9, 0x307A, 0xA4DA, 0x307B, 0xA4DB,
00151     0x307C, 0xA4DC, 0x307D, 0xA4DD, 0x307E, 0xA4DE, 0x307F, 0xA4DF,
00152     0x3080, 0xA4E0, 0x3081, 0xA4E1, 0x3082, 0xA4E2, 0x3083, 0xA4E3,
00153     0x3084, 0xA4E4, 0x3085, 0xA4E5, 0x3086, 0xA4E6, 0x3087, 0xA4E7,
00154     0x3088, 0xA4E8, 0x3089, 0xA4E9, 0x308A, 0xA4EA, 0x308B, 0xA4EB,
00155     0x308C, 0xA4EC, 0x308D, 0xA4ED, 0x308E, 0xA4EE, 0x308F, 0xA4EF,
00156     0x3090, 0xA4F0, 0x3091, 0xA4F1, 0x3092, 0xA4F2, 0x3093, 0xA4F3,
00157     0x309B, 0xA961, 0x309C, 0xA962, 0x309D, 0xA966, 0x309E, 0xA967,
00158     0x30A1, 0xA5A1, 0x30A2, 0xA5A2, 0x30A3, 0xA5A3, 0x30A4, 0xA5A4,
00159     0x30A5, 0xA5A5, 0x30A6, 0xA5A6, 0x30A7, 0xA5A7, 0x30A8, 0xA5A8,
00160     0x30A9, 0xA5A9, 0x30AA, 0xA5AA, 0x30AB, 0xA5AB, 0x30AC, 0xA5AC,
00161     0x30AD, 0xA5AD, 0x30AE, 0xA5AE, 0x30AF, 0xA5AF, 0x30B0, 0xA5B0,
00162     0x30B1, 0xA5B1, 0x30B2, 0xA5B2, 0x30B3, 0xA5B3, 0x30B4, 0xA5B4,
00163     0x30B5, 0xA5B5, 0x30B6, 0xA5B6, 0x30B7, 0xA5B7, 0x30B8, 0xA5B8,
00164     0x30B9, 0xA5B9, 0x30BA, 0xA5BA, 0x30BB, 0xA5BB, 0x30BC, 0xA5BC,
00165     0x30BD, 0xA5BD, 0x30BE, 0xA5BE, 0x30BF, 0xA5BF, 0x30C0, 0xA5C0,
00166     0x30C1, 0xA5C1, 0x30C2, 0xA5C2, 0x30C3, 0xA5C3, 0x30C4, 0xA5C4,
00167     0x30C5, 0xA5C5, 0x30C6, 0xA5C6, 0x30C7, 0xA5C7, 0x30C8, 0xA5C8,
00168     0x30C9, 0xA5C9, 0x30CA, 0xA5CA, 0x30CB, 0xA5CB, 0x30CC, 0xA5CC,
00169     0x30CD, 0xA5CD, 0x30CE, 0xA5CE, 0x30CF, 0xA5CF, 0x30D0, 0xA5D0,
00170     0x30D1, 0xA5D1, 0x30D2, 0xA5D2, 0x30D3, 0xA5D3, 0x30D4, 0xA5D4,
00171     0x30D5, 0xA5D5, 0x30D6, 0xA5D6, 0x30D7, 0xA5D7, 0x30D8, 0xA5D8,
00172     0x30D9, 0xA5D9, 0x30DA, 0xA5DA, 0x30DB, 0xA5DB, 0x30DC, 0xA5DC,
00173     0x30DD, 0xA5DD, 0x30DE, 0xA5DE, 0x30DF, 0xA5DF, 0x30E0, 0xA5E0,
00174     0x30E1, 0xA5E1, 0x30E2, 0xA5E2, 0x30E3, 0xA5E3, 0x30E4, 0xA5E4,
00175     0x30E5, 0xA5E5, 0x30E6, 0xA5E6, 0x30E7, 0xA5E7, 0x30E8, 0xA5E8,
00176     0x30E9, 0xA5E9, 0x30EA, 0xA5EA, 0x30EB, 0xA5EB, 0x30EC, 0xA5EC,
00177     0x30ED, 0xA5ED, 0x30EE, 0xA5EE, 0x30EF, 0xA5EF, 0x30F0, 0xA5F0,
00178     0x30F1, 0xA5F1, 0x30F2, 0xA5F2, 0x30F3, 0xA5F3, 0x30F4, 0xA5F4,
00179     0x30F5, 0xA5F5, 0x30F6, 0xA5F6, 0x30FC, 0xA960, 0x30FD, 0xA963,
00180     0x30FE, 0xA964, 0x3105, 0xA8C5, 0x3106, 0xA8C6, 0x3107, 0xA8C7,
00181     0x3108, 0xA8C8, 0x3109, 0xA8C9, 0x310A, 0xA8CA, 0x310B, 0xA8CB,
00182     0x310C, 0xA8CC, 0x310D, 0xA8CD, 0x310E, 0xA8CE, 0x310F, 0xA8CF,
00183     0x3110, 0xA8D0, 0x3111, 0xA8D1, 0x3112, 0xA8D2, 0x3113, 0xA8D3,
00184     0x3114, 0xA8D4, 0x3115, 0xA8D5, 0x3116, 0xA8D6, 0x3117, 0xA8D7,
00185     0x3118, 0xA8D8, 0x3119, 0xA8D9, 0x311A, 0xA8DA, 0x311B, 0xA8DB,
00186     0x311C, 0xA8DC, 0x311D, 0xA8DD, 0x311E, 0xA8DE, 0x311F, 0xA8DF,
00187     0x3120, 0xA8E0, 0x3121, 0xA8E1, 0x3122, 0xA8E2, 0x3123, 0xA8E3,
00188     0x3124, 0xA8E4, 0x3125, 0xA8E5, 0x3126, 0xA8E6, 0x3127, 0xA8E7,
00189     0x3128, 0xA8E8, 0x3129, 0xA8E9, 0x3220, 0xA2E5, 0x3221, 0xA2E6,
00190     0x3222, 0xA2E7, 0x3223, 0xA2E8, 0x3224, 0xA2E9, 0x3225, 0xA2EA,
00191     0x3226, 0xA2EB, 0x3227, 0xA2EC, 0x3228, 0xA2ED, 0x3229, 0xA2EE,
00192     0x3231, 0xA95A, 0x32A3, 0xA949, 0x338E, 0xA94A, 0x338F, 0xA94B,
00193     0x339C, 0xA94C, 0x339D, 0xA94D, 0x339E, 0xA94E, 0x33A1, 0xA94F,
00194     0x33C4, 0xA950, 0x33CE, 0xA951, 0x33D1, 0xA952, 0x33D2, 0xA953,
00195     0x33D5, 0xA954, 0x4E00, 0xD2BB, 0x4E01, 0xB6A1, 0x4E02, 0x8140,
00196     0x4E03, 0xC6DF, 0x4E04, 0x8141, 0x4E05, 0x8142, 0x4E06, 0x8143,
00197     0x4E07, 0xCDF2, 0x4E08, 0xD5C9, 0x4E09, 0xC8FD, 0x4E0A, 0xC9CF,
00198     0x4E0B, 0xCFC2, 0x4E0C, 0xD8A2, 0x4E0D, 0xB2BB, 0x4E0E, 0xD3EB,
00199     0x4E0F, 0x8144, 0x4E10, 0xD8A4, 0x4E11, 0xB3F3, 0x4E12, 0x8145,
00200     0x4E13, 0xD7A8, 0x4E14, 0xC7D2, 0x4E15, 0xD8A7, 0x4E16, 0xCAC0,
00201     0x4E17, 0x8146, 0x4E18, 0xC7F0, 0x4E19, 0xB1FB, 0x4E1A, 0xD2B5,
00202     0x4E1B, 0xB4D4, 0x4E1C, 0xB6AB, 0x4E1D, 0xCBBF, 0x4E1E, 0xD8A9,
00203     0x4E1F, 0x8147, 0x4E20, 0x8148, 0x4E21, 0x8149, 0x4E22, 0xB6AA,
00204     0x4E23, 0x814A, 0x4E24, 0xC1BD, 0x4E25, 0xD1CF, 0x4E26, 0x814B,
00205     0x4E27, 0xC9A5, 0x4E28, 0xD8AD, 0x4E29, 0x814C, 0x4E2A, 0xB8F6,
00206     0x4E2B, 0xD1BE, 0x4E2C, 0xE3DC, 0x4E2D, 0xD6D0, 0x4E2E, 0x814D,
00207     0x4E2F, 0x814E, 0x4E30, 0xB7E1, 0x4E31, 0x814F, 0x4E32, 0xB4AE,
00208     0x4E33, 0x8150, 0x4E34, 0xC1D9, 0x4E35, 0x8151, 0x4E36, 0xD8BC,
00209     0x4E37, 0x8152, 0x4E38, 0xCDE8, 0x4E39, 0xB5A4, 0x4E3A, 0xCEAA,
00210     0x4E3B, 0xD6F7, 0x4E3C, 0x8153, 0x4E3D, 0xC0F6, 0x4E3E, 0xBED9,
00211     0x4E3F, 0xD8AF, 0x4E40, 0x8154, 0x4E41, 0x8155, 0x4E42, 0x8156,
00212     0x4E43, 0xC4CB, 0x4E44, 0x8157, 0x4E45, 0xBEC3, 0x4E46, 0x8158,
00213     0x4E47, 0xD8B1, 0x4E48, 0xC3B4, 0x4E49, 0xD2E5, 0x4E4A, 0x8159,
00214     0x4E4B, 0xD6AE, 0x4E4C, 0xCEDA, 0x4E4D, 0xD5A7, 0x4E4E, 0xBAF5,
00215     0x4E4F, 0xB7A6, 0x4E50, 0xC0D6, 0x4E51, 0x815A, 0x4E52, 0xC6B9,
00216     0x4E53, 0xC5D2, 0x4E54, 0xC7C7, 0x4E55, 0x815B, 0x4E56, 0xB9D4,
00217     0x4E57, 0x815C, 0x4E58, 0xB3CB, 0x4E59, 0xD2D2, 0x4E5A, 0x815D,
00218     0x4E5B, 0x815E, 0x4E5C, 0xD8BF, 0x4E5D, 0xBEC5, 0x4E5E, 0xC6F2,
00219     0x4E5F, 0xD2B2, 0x4E60, 0xCFB0, 0x4E61, 0xCFE7, 0x4E62, 0x815F,
00220     0x4E63, 0x8160, 0x4E64, 0x8161, 0x4E65, 0x8162, 0x4E66, 0xCAE9,
00221     0x4E67, 0x8163, 0x4E68, 0x8164, 0x4E69, 0xD8C0, 0x4E6A, 0x8165,
00222     0x4E6B, 0x8166, 0x4E6C, 0x8167, 0x4E6D, 0x8168, 0x4E6E, 0x8169,
00223     0x4E6F, 0x816A, 0x4E70, 0xC2F2, 0x4E71, 0xC2D2, 0x4E72, 0x816B,
00224     0x4E73, 0xC8E9, 0x4E74, 0x816C, 0x4E75, 0x816D, 0x4E76, 0x816E,
00225     0x4E77, 0x816F, 0x4E78, 0x8170, 0x4E79, 0x8171, 0x4E7A, 0x8172,
00226     0x4E7B, 0x8173, 0x4E7C, 0x8174, 0x4E7D, 0x8175, 0x4E7E, 0xC7AC,
00227     0x4E7F, 0x8176, 0x4E80, 0x8177, 0x4E81, 0x8178, 0x4E82, 0x8179,
00228     0x4E83, 0x817A, 0x4E84, 0x817B, 0x4E85, 0x817C, 0x4E86, 0xC1CB,
00229     0x4E87, 0x817D, 0x4E88, 0xD3E8, 0x4E89, 0xD5F9, 0x4E8A, 0x817E,
00230     0x4E8B, 0xCAC2, 0x4E8C, 0xB6FE, 0x4E8D, 0xD8A1, 0x4E8E, 0xD3DA,
00231     0x4E8F, 0xBFF7, 0x4E90, 0x8180, 0x4E91, 0xD4C6, 0x4E92, 0xBBA5,
00232     0x4E93, 0xD8C1, 0x4E94, 0xCEE5, 0x4E95, 0xBEAE, 0x4E96, 0x8181,
00233     0x4E97, 0x8182, 0x4E98, 0xD8A8, 0x4E99, 0x8183, 0x4E9A, 0xD1C7,
00234     0x4E9B, 0xD0A9, 0x4E9C, 0x8184, 0x4E9D, 0x8185, 0x4E9E, 0x8186,
00235     0x4E9F, 0xD8BD, 0x4EA0, 0xD9EF, 0x4EA1, 0xCDF6, 0x4EA2, 0xBFBA,
00236     0x4EA3, 0x8187, 0x4EA4, 0xBDBB, 0x4EA5, 0xBAA5, 0x4EA6, 0xD2E0,
00237     0x4EA7, 0xB2FA, 0x4EA8, 0xBAE0, 0x4EA9, 0xC4B6, 0x4EAA, 0x8188,
00238     0x4EAB, 0xCFED, 0x4EAC, 0xBEA9, 0x4EAD, 0xCDA4, 0x4EAE, 0xC1C1,
00239     0x4EAF, 0x8189, 0x4EB0, 0x818A, 0x4EB1, 0x818B, 0x4EB2, 0xC7D7,
00240     0x4EB3, 0xD9F1, 0x4EB4, 0x818C, 0x4EB5, 0xD9F4, 0x4EB6, 0x818D,
00241     0x4EB7, 0x818E, 0x4EB8, 0x818F, 0x4EB9, 0x8190, 0x4EBA, 0xC8CB,
00242     0x4EBB, 0xD8E9, 0x4EBC, 0x8191, 0x4EBD, 0x8192, 0x4EBE, 0x8193,
00243     0x4EBF, 0xD2DA, 0x4EC0, 0xCAB2, 0x4EC1, 0xC8CA, 0x4EC2, 0xD8EC,
00244     0x4EC3, 0xD8EA, 0x4EC4, 0xD8C6, 0x4EC5, 0xBDF6, 0x4EC6, 0xC6CD,
00245     0x4EC7, 0xB3F0, 0x4EC8, 0x8194, 0x4EC9, 0xD8EB, 0x4ECA, 0xBDF1,
00246     0x4ECB, 0xBDE9, 0x4ECC, 0x8195, 0x4ECD, 0xC8D4, 0x4ECE, 0xB4D3,
00247     0x4ECF, 0x8196, 0x4ED0, 0x8197, 0x4ED1, 0xC2D8, 0x4ED2, 0x8198,
00248     0x4ED3, 0xB2D6, 0x4ED4, 0xD7D0, 0x4ED5, 0xCACB, 0x4ED6, 0xCBFB,
00249     0x4ED7, 0xD5CC, 0x4ED8, 0xB8B6, 0x4ED9, 0xCFC9, 0x4EDA, 0x8199,
00250     0x4EDB, 0x819A, 0x4EDC, 0x819B, 0x4EDD, 0xD9DA, 0x4EDE, 0xD8F0,
00251     0x4EDF, 0xC7AA, 0x4EE0, 0x819C, 0x4EE1, 0xD8EE, 0x4EE2, 0x819D,
00252     0x4EE3, 0xB4FA, 0x4EE4, 0xC1EE, 0x4EE5, 0xD2D4, 0x4EE6, 0x819E,
00253     0x4EE7, 0x819F, 0x4EE8, 0xD8ED, 0x4EE9, 0x81A0, 0x4EEA, 0xD2C7,
00254     0x4EEB, 0xD8EF, 0x4EEC, 0xC3C7, 0x4EED, 0x81A1, 0x4EEE, 0x81A2,
00255     0x4EEF, 0x81A3, 0x4EF0, 0xD1F6, 0x4EF1, 0x81A4, 0x4EF2, 0xD6D9,
00256     0x4EF3, 0xD8F2, 0x4EF4, 0x81A5, 0x4EF5, 0xD8F5, 0x4EF6, 0xBCFE,
00257     0x4EF7, 0xBCDB, 0x4EF8, 0x81A6, 0x4EF9, 0x81A7, 0x4EFA, 0x81A8,
00258     0x4EFB, 0xC8CE, 0x4EFC, 0x81A9, 0x4EFD, 0xB7DD, 0x4EFE, 0x81AA,
00259     0x4EFF, 0xB7C2, 0x4F00, 0x81AB, 0x4F01, 0xC6F3, 0x4F02, 0x81AC,
00260     0x4F03, 0x81AD, 0x4F04, 0x81AE, 0x4F05, 0x81AF, 0x4F06, 0x81B0,
00261     0x4F07, 0x81B1, 0x4F08, 0x81B2, 0x4F09, 0xD8F8, 0x4F0A, 0xD2C1,
00262     0x4F0B, 0x81B3, 0x4F0C, 0x81B4, 0x4F0D, 0xCEE9, 0x4F0E, 0xBCBF,
00263     0x4F0F, 0xB7FC, 0x4F10, 0xB7A5, 0x4F11, 0xD0DD, 0x4F12, 0x81B5,
00264     0x4F13, 0x81B6, 0x4F14, 0x81B7, 0x4F15, 0x81B8, 0x4F16, 0x81B9,
00265     0x4F17, 0xD6DA, 0x4F18, 0xD3C5, 0x4F19, 0xBBEF, 0x4F1A, 0xBBE1,
00266     0x4F1B, 0xD8F1, 0x4F1C, 0x81BA, 0x4F1D, 0x81BB, 0x4F1E, 0xC9A1,
00267     0x4F1F, 0xCEB0, 0x4F20, 0xB4AB, 0x4F21, 0x81BC, 0x4F22, 0xD8F3,
00268     0x4F23, 0x81BD, 0x4F24, 0xC9CB, 0x4F25, 0xD8F6, 0x4F26, 0xC2D7,
00269     0x4F27, 0xD8F7, 0x4F28, 0x81BE, 0x4F29, 0x81BF, 0x4F2A, 0xCEB1,
00270     0x4F2B, 0xD8F9, 0x4F2C, 0x81C0, 0x4F2D, 0x81C1, 0x4F2E, 0x81C2,
00271     0x4F2F, 0xB2AE, 0x4F30, 0xB9C0, 0x4F31, 0x81C3, 0x4F32, 0xD9A3,
00272     0x4F33, 0x81C4, 0x4F34, 0xB0E9, 0x4F35, 0x81C5, 0x4F36, 0xC1E6,
00273     0x4F37, 0x81C6, 0x4F38, 0xC9EC, 0x4F39, 0x81C7, 0x4F3A, 0xCBC5,
00274     0x4F3B, 0x81C8, 0x4F3C, 0xCBC6, 0x4F3D, 0xD9A4, 0x4F3E, 0x81C9,
00275     0x4F3F, 0x81CA, 0x4F40, 0x81CB, 0x4F41, 0x81CC, 0x4F42, 0x81CD,
00276     0x4F43, 0xB5E8, 0x4F44, 0x81CE, 0x4F45, 0x81CF, 0x4F46, 0xB5AB,
00277     0x4F47, 0x81D0, 0x4F48, 0x81D1, 0x4F49, 0x81D2, 0x4F4A, 0x81D3,
00278     0x4F4B, 0x81D4, 0x4F4C, 0x81D5, 0x4F4D, 0xCEBB, 0x4F4E, 0xB5CD,
00279     0x4F4F, 0xD7A1, 0x4F50, 0xD7F4, 0x4F51, 0xD3D3, 0x4F52, 0x81D6,
00280     0x4F53, 0xCCE5, 0x4F54, 0x81D7, 0x4F55, 0xBACE, 0x4F56, 0x81D8,
00281     0x4F57, 0xD9A2, 0x4F58, 0xD9DC, 0x4F59, 0xD3E0, 0x4F5A, 0xD8FD,
00282     0x4F5B, 0xB7F0, 0x4F5C, 0xD7F7, 0x4F5D, 0xD8FE, 0x4F5E, 0xD8FA,
00283     0x4F5F, 0xD9A1, 0x4F60, 0xC4E3, 0x4F61, 0x81D9, 0x4F62, 0x81DA,
00284     0x4F63, 0xD3B6, 0x4F64, 0xD8F4, 0x4F65, 0xD9DD, 0x4F66, 0x81DB,
00285     0x4F67, 0xD8FB, 0x4F68, 0x81DC, 0x4F69, 0xC5E5, 0x4F6A, 0x81DD,
00286     0x4F6B, 0x81DE, 0x4F6C, 0xC0D0, 0x4F6D, 0x81DF, 0x4F6E, 0x81E0,
00287     0x4F6F, 0xD1F0, 0x4F70, 0xB0DB, 0x4F71, 0x81E1, 0x4F72, 0x81E2,
00288     0x4F73, 0xBCD1, 0x4F74, 0xD9A6, 0x4F75, 0x81E3, 0x4F76, 0xD9A5,
00289     0x4F77, 0x81E4, 0x4F78, 0x81E5, 0x4F79, 0x81E6, 0x4F7A, 0x81E7,
00290     0x4F7B, 0xD9AC, 0x4F7C, 0xD9AE, 0x4F7D, 0x81E8, 0x4F7E, 0xD9AB,
00291     0x4F7F, 0xCAB9, 0x4F80, 0x81E9, 0x4F81, 0x81EA, 0x4F82, 0x81EB,
00292     0x4F83, 0xD9A9, 0x4F84, 0xD6B6, 0x4F85, 0x81EC, 0x4F86, 0x81ED,
00293     0x4F87, 0x81EE, 0x4F88, 0xB3DE, 0x4F89, 0xD9A8, 0x4F8A, 0x81EF,
00294     0x4F8B, 0xC0FD, 0x4F8C, 0x81F0, 0x4F8D, 0xCACC, 0x4F8E, 0x81F1,
00295     0x4F8F, 0xD9AA, 0x4F90, 0x81F2, 0x4F91, 0xD9A7, 0x4F92, 0x81F3,
00296     0x4F93, 0x81F4, 0x4F94, 0xD9B0, 0x4F95, 0x81F5, 0x4F96, 0x81F6,
00297     0x4F97, 0xB6B1, 0x4F98, 0x81F7, 0x4F99, 0x81F8, 0x4F9A, 0x81F9,
00298     0x4F9B, 0xB9A9, 0x4F9C, 0x81FA, 0x4F9D, 0xD2C0, 0x4F9E, 0x81FB,
00299     0x4F9F, 0x81FC, 0x4FA0, 0xCFC0, 0x4FA1, 0x81FD, 0x4FA2, 0x81FE,
00300     0x4FA3, 0xC2C2, 0x4FA4, 0x8240, 0x4FA5, 0xBDC4, 0x4FA6, 0xD5EC,
00301     0x4FA7, 0xB2E0, 0x4FA8, 0xC7C8, 0x4FA9, 0xBFEB, 0x4FAA, 0xD9AD,
00302     0x4FAB, 0x8241, 0x4FAC, 0xD9AF, 0x4FAD, 0x8242, 0x4FAE, 0xCEEA,
00303     0x4FAF, 0xBAEE, 0x4FB0, 0x8243, 0x4FB1, 0x8244, 0x4FB2, 0x8245,
00304     0x4FB3, 0x8246, 0x4FB4, 0x8247, 0x4FB5, 0xC7D6, 0x4FB6, 0x8248,
00305     0x4FB7, 0x8249, 0x4FB8, 0x824A, 0x4FB9, 0x824B, 0x4FBA, 0x824C,
00306     0x4FBB, 0x824D, 0x4FBC, 0x824E, 0x4FBD, 0x824F, 0x4FBE, 0x8250,
00307     0x4FBF, 0xB1E3, 0x4FC0, 0x8251, 0x4FC1, 0x8252, 0x4FC2, 0x8253,
00308     0x4FC3, 0xB4D9, 0x4FC4, 0xB6ED, 0x4FC5, 0xD9B4, 0x4FC6, 0x8254,
00309     0x4FC7, 0x8255, 0x4FC8, 0x8256, 0x4FC9, 0x8257, 0x4FCA, 0xBFA1,
00310     0x4FCB, 0x8258, 0x4FCC, 0x8259, 0x4FCD, 0x825A, 0x4FCE, 0xD9DE,
00311     0x4FCF, 0xC7CE, 0x4FD0, 0xC0FE, 0x4FD1, 0xD9B8, 0x4FD2, 0x825B,
00312     0x4FD3, 0x825C, 0x4FD4, 0x825D, 0x4FD5, 0x825E, 0x4FD6, 0x825F,
00313     0x4FD7, 0xCBD7, 0x4FD8, 0xB7FD, 0x4FD9, 0x8260, 0x4FDA, 0xD9B5,
00314     0x4FDB, 0x8261, 0x4FDC, 0xD9B7, 0x4FDD, 0xB1A3, 0x4FDE, 0xD3E1,
00315     0x4FDF, 0xD9B9, 0x4FE0, 0x8262, 0x4FE1, 0xD0C5, 0x4FE2, 0x8263,
00316     0x4FE3, 0xD9B6, 0x4FE4, 0x8264, 0x4FE5, 0x8265, 0x4FE6, 0xD9B1,
00317     0x4FE7, 0x8266, 0x4FE8, 0xD9B2, 0x4FE9, 0xC1A9, 0x4FEA, 0xD9B3,
00318     0x4FEB, 0x8267, 0x4FEC, 0x8268, 0x4FED, 0xBCF3, 0x4FEE, 0xD0DE,
00319     0x4FEF, 0xB8A9, 0x4FF0, 0x8269, 0x4FF1, 0xBEE3, 0x4FF2, 0x826A,
00320     0x4FF3, 0xD9BD, 0x4FF4, 0x826B, 0x4FF5, 0x826C, 0x4FF6, 0x826D,
00321     0x4FF7, 0x826E, 0x4FF8, 0xD9BA, 0x4FF9, 0x826F, 0x4FFA, 0xB0B3,
00322     0x4FFB, 0x8270, 0x4FFC, 0x8271, 0x4FFD, 0x8272, 0x4FFE, 0xD9C2,
00323     0x4FFF, 0x8273, 0x5000, 0x8274, 0x5001, 0x8275, 0x5002, 0x8276,
00324     0x5003, 0x8277, 0x5004, 0x8278, 0x5005, 0x8279, 0x5006, 0x827A,
00325     0x5007, 0x827B, 0x5008, 0x827C, 0x5009, 0x827D, 0x500A, 0x827E,
00326     0x500B, 0x8280, 0x500C, 0xD9C4, 0x500D, 0xB1B6, 0x500E, 0x8281,
00327     0x500F, 0xD9BF, 0x5010, 0x8282, 0x5011, 0x8283, 0x5012, 0xB5B9,
00328     0x5013, 0x8284, 0x5014, 0xBEF3, 0x5015, 0x8285, 0x5016, 0x8286,
00329     0x5017, 0x8287, 0x5018, 0xCCC8, 0x5019, 0xBAF2, 0x501A, 0xD2D0,
00330     0x501B, 0x8288, 0x501C, 0xD9C3, 0x501D, 0x8289, 0x501E, 0x828A,
00331     0x501F, 0xBDE8, 0x5020, 0x828B, 0x5021, 0xB3AB, 0x5022, 0x828C,
00332     0x5023, 0x828D, 0x5024, 0x828E, 0x5025, 0xD9C5, 0x5026, 0xBEEB,
00333     0x5027, 0x828F, 0x5028, 0xD9C6, 0x5029, 0xD9BB, 0x502A, 0xC4DF,
00334     0x502B, 0x8290, 0x502C, 0xD9BE, 0x502D, 0xD9C1, 0x502E, 0xD9C0,
00335     0x502F, 0x8291, 0x5030, 0x8292, 0x5031, 0x8293, 0x5032, 0x8294,
00336     0x5033, 0x8295, 0x5034, 0x8296, 0x5035, 0x8297, 0x5036, 0x8298,
00337     0x5037, 0x8299, 0x5038, 0x829A, 0x5039, 0x829B, 0x503A, 0xD5AE,
00338     0x503B, 0x829C, 0x503C, 0xD6B5, 0x503D, 0x829D, 0x503E, 0xC7E3,
00339     0x503F, 0x829E, 0x5040, 0x829F, 0x5041, 0x82A0, 0x5042, 0x82A1,
00340     0x5043, 0xD9C8, 0x5044, 0x82A2, 0x5045, 0x82A3, 0x5046, 0x82A4,
00341     0x5047, 0xBCD9, 0x5048, 0xD9CA, 0x5049, 0x82A5, 0x504A, 0x82A6,
00342     0x504B, 0x82A7, 0x504C, 0xD9BC, 0x504D, 0x82A8, 0x504E, 0xD9CB,
00343     0x504F, 0xC6AB, 0x5050, 0x82A9, 0x5051, 0x82AA, 0x5052, 0x82AB,
00344     0x5053, 0x82AC, 0x5054, 0x82AD, 0x5055, 0xD9C9, 0x5056, 0x82AE,
00345     0x5057, 0x82AF, 0x5058, 0x82B0, 0x5059, 0x82B1, 0x505A, 0xD7F6,
00346     0x505B, 0x82B2, 0x505C, 0xCDA3, 0x505D, 0x82B3, 0x505E, 0x82B4,
00347     0x505F, 0x82B5, 0x5060, 0x82B6, 0x5061, 0x82B7, 0x5062, 0x82B8,
00348     0x5063, 0x82B9, 0x5064, 0x82BA, 0x5065, 0xBDA1, 0x5066, 0x82BB,
00349     0x5067, 0x82BC, 0x5068, 0x82BD, 0x5069, 0x82BE, 0x506A, 0x82BF,
00350     0x506B, 0x82C0, 0x506C, 0xD9CC, 0x506D, 0x82C1, 0x506E, 0x82C2,
00351     0x506F, 0x82C3, 0x5070, 0x82C4, 0x5071, 0x82C5, 0x5072, 0x82C6,
00352     0x5073, 0x82C7, 0x5074, 0x82C8, 0x5075, 0x82C9, 0x5076, 0xC5BC,
00353     0x5077, 0xCDB5, 0x5078, 0x82CA, 0x5079, 0x82CB, 0x507A, 0x82CC,
00354     0x507B, 0xD9CD, 0x507C, 0x82CD, 0x507D, 0x82CE, 0x507E, 0xD9C7,
00355     0x507F, 0xB3A5, 0x5080, 0xBFFE, 0x5081, 0x82CF, 0x5082, 0x82D0,
00356     0x5083, 0x82D1, 0x5084, 0x82D2, 0x5085, 0xB8B5, 0x5086, 0x82D3,
00357     0x5087, 0x82D4, 0x5088, 0xC0FC, 0x5089, 0x82D5, 0x508A, 0x82D6,
00358     0x508B, 0x82D7, 0x508C, 0x82D8, 0x508D, 0xB0F8, 0x508E, 0x82D9,
00359     0x508F, 0x82DA, 0x5090, 0x82DB, 0x5091, 0x82DC, 0x5092, 0x82DD,
00360     0x5093, 0x82DE, 0x5094, 0x82DF, 0x5095, 0x82E0, 0x5096, 0x82E1,
00361     0x5097, 0x82E2, 0x5098, 0x82E3, 0x5099, 0x82E4, 0x509A, 0x82E5,
00362     0x509B, 0x82E6, 0x509C, 0x82E7, 0x509D, 0x82E8, 0x509E, 0x82E9,
00363     0x509F, 0x82EA, 0x50A0, 0x82EB, 0x50A1, 0x82EC, 0x50A2, 0x82ED,
00364     0x50A3, 0xB4F6, 0x50A4, 0x82EE, 0x50A5, 0xD9CE, 0x50A6, 0x82EF,
00365     0x50A7, 0xD9CF, 0x50A8, 0xB4A2, 0x50A9, 0xD9D0, 0x50AA, 0x82F0,
00366     0x50AB, 0x82F1, 0x50AC, 0xB4DF, 0x50AD, 0x82F2, 0x50AE, 0x82F3,
00367     0x50AF, 0x82F4, 0x50B0, 0x82F5, 0x50B1, 0x82F6, 0x50B2, 0xB0C1,
00368     0x50B3, 0x82F7, 0x50B4, 0x82F8, 0x50B5, 0x82F9, 0x50B6, 0x82FA,
00369     0x50B7, 0x82FB, 0x50B8, 0x82FC, 0x50B9, 0x82FD, 0x50BA, 0xD9D1,
00370     0x50BB, 0xC9B5, 0x50BC, 0x82FE, 0x50BD, 0x8340, 0x50BE, 0x8341,
00371     0x50BF, 0x8342, 0x50C0, 0x8343, 0x50C1, 0x8344, 0x50C2, 0x8345,
00372     0x50C3, 0x8346, 0x50C4, 0x8347, 0x50C5, 0x8348, 0x50C6, 0x8349,
00373     0x50C7, 0x834A, 0x50C8, 0x834B, 0x50C9, 0x834C, 0x50CA, 0x834D,
00374     0x50CB, 0x834E, 0x50CC, 0x834F, 0x50CD, 0x8350, 0x50CE, 0x8351,
00375     0x50CF, 0xCFF1, 0x50D0, 0x8352, 0x50D1, 0x8353, 0x50D2, 0x8354,
00376     0x50D3, 0x8355, 0x50D4, 0x8356, 0x50D5, 0x8357, 0x50D6, 0xD9D2,
00377     0x50D7, 0x8358, 0x50D8, 0x8359, 0x50D9, 0x835A, 0x50DA, 0xC1C5,
00378     0x50DB, 0x835B, 0x50DC, 0x835C, 0x50DD, 0x835D, 0x50DE, 0x835E,
00379     0x50DF, 0x835F, 0x50E0, 0x8360, 0x50E1, 0x8361, 0x50E2, 0x8362,
00380     0x50E3, 0x8363, 0x50E4, 0x8364, 0x50E5, 0x8365, 0x50E6, 0xD9D6,
00381     0x50E7, 0xC9AE, 0x50E8, 0x8366, 0x50E9, 0x8367, 0x50EA, 0x8368,
00382     0x50EB, 0x8369, 0x50EC, 0xD9D5, 0x50ED, 0xD9D4, 0x50EE, 0xD9D7,
00383     0x50EF, 0x836A, 0x50F0, 0x836B, 0x50F1, 0x836C, 0x50F2, 0x836D,
00384     0x50F3, 0xCBDB, 0x50F4, 0x836E, 0x50F5, 0xBDA9, 0x50F6, 0x836F,
00385     0x50F7, 0x8370, 0x50F8, 0x8371, 0x50F9, 0x8372, 0x50FA, 0x8373,
00386     0x50FB, 0xC6A7, 0x50FC, 0x8374, 0x50FD, 0x8375, 0x50FE, 0x8376,
00387     0x50FF, 0x8377, 0x5100, 0x8378, 0x5101, 0x8379, 0x5102, 0x837A,
00388     0x5103, 0x837B, 0x5104, 0x837C, 0x5105, 0x837D, 0x5106, 0xD9D3,
00389     0x5107, 0xD9D8, 0x5108, 0x837E, 0x5109, 0x8380, 0x510A, 0x8381,
00390     0x510B, 0xD9D9, 0x510C, 0x8382, 0x510D, 0x8383, 0x510E, 0x8384,
00391     0x510F, 0x8385, 0x5110, 0x8386, 0x5111, 0x8387, 0x5112, 0xC8E5,
00392     0x5113, 0x8388, 0x5114, 0x8389, 0x5115, 0x838A, 0x5116, 0x838B,
00393     0x5117, 0x838C, 0x5118, 0x838D, 0x5119, 0x838E, 0x511A, 0x838F,
00394     0x511B, 0x8390, 0x511C, 0x8391, 0x511D, 0x8392, 0x511E, 0x8393,
00395     0x511F, 0x8394, 0x5120, 0x8395, 0x5121, 0xC0DC, 0x5122, 0x8396,
00396     0x5123, 0x8397, 0x5124, 0x8398, 0x5125, 0x8399, 0x5126, 0x839A,
00397     0x5127, 0x839B, 0x5128, 0x839C, 0x5129, 0x839D, 0x512A, 0x839E,
00398     0x512B, 0x839F, 0x512C, 0x83A0, 0x512D, 0x83A1, 0x512E, 0x83A2,
00399     0x512F, 0x83A3, 0x5130, 0x83A4, 0x5131, 0x83A5, 0x5132, 0x83A6,
00400     0x5133, 0x83A7, 0x5134, 0x83A8, 0x5135, 0x83A9, 0x5136, 0x83AA,
00401     0x5137, 0x83AB, 0x5138, 0x83AC, 0x5139, 0x83AD, 0x513A, 0x83AE,
00402     0x513B, 0x83AF, 0x513C, 0x83B0, 0x513D, 0x83B1, 0x513E, 0x83B2,
00403     0x513F, 0xB6F9, 0x5140, 0xD8A3, 0x5141, 0xD4CA, 0x5142, 0x83B3,
00404     0x5143, 0xD4AA, 0x5144, 0xD0D6, 0x5145, 0xB3E4, 0x5146, 0xD5D7,
00405     0x5147, 0x83B4, 0x5148, 0xCFC8, 0x5149, 0xB9E2, 0x514A, 0x83B5,
00406     0x514B, 0xBFCB, 0x514C, 0x83B6, 0x514D, 0xC3E2, 0x514E, 0x83B7,
00407     0x514F, 0x83B8, 0x5150, 0x83B9, 0x5151, 0xB6D2, 0x5152, 0x83BA,
00408     0x5153, 0x83BB, 0x5154, 0xCDC3, 0x5155, 0xD9EE, 0x5156, 0xD9F0,
00409     0x5157, 0x83BC, 0x5158, 0x83BD, 0x5159, 0x83BE, 0x515A, 0xB5B3,
00410     0x515B, 0x83BF, 0x515C, 0xB6B5, 0x515D, 0x83C0, 0x515E, 0x83C1,
00411     0x515F, 0x83C2, 0x5160, 0x83C3, 0x5161, 0x83C4, 0x5162, 0xBEA4,
00412     0x5163, 0x83C5, 0x5164, 0x83C6, 0x5165, 0xC8EB, 0x5166, 0x83C7,
00413     0x5167, 0x83C8, 0x5168, 0xC8AB, 0x5169, 0x83C9, 0x516A, 0x83CA,
00414     0x516B, 0xB0CB, 0x516C, 0xB9AB, 0x516D, 0xC1F9, 0x516E, 0xD9E2,
00415     0x516F, 0x83CB, 0x5170, 0xC0BC, 0x5171, 0xB9B2, 0x5172, 0x83CC,
00416     0x5173, 0xB9D8, 0x5174, 0xD0CB, 0x5175, 0xB1F8, 0x5176, 0xC6E4,
00417     0x5177, 0xBEDF, 0x5178, 0xB5E4, 0x5179, 0xD7C8, 0x517A, 0x83CD,
00418     0x517B, 0xD1F8, 0x517C, 0xBCE6, 0x517D, 0xCADE, 0x517E, 0x83CE,
00419     0x517F, 0x83CF, 0x5180, 0xBCBD, 0x5181, 0xD9E6, 0x5182, 0xD8E7,
00420     0x5183, 0x83D0, 0x5184, 0x83D1, 0x5185, 0xC4DA, 0x5186, 0x83D2,
00421     0x5187, 0x83D3, 0x5188, 0xB8D4, 0x5189, 0xC8BD, 0x518A, 0x83D4,
00422     0x518B, 0x83D5, 0x518C, 0xB2E1, 0x518D, 0xD4D9, 0x518E, 0x83D6,
00423     0x518F, 0x83D7, 0x5190, 0x83D8, 0x5191, 0x83D9, 0x5192, 0xC3B0,
00424     0x5193, 0x83DA, 0x5194, 0x83DB, 0x5195, 0xC3E1, 0x5196, 0xDAA2,
00425     0x5197, 0xC8DF, 0x5198, 0x83DC, 0x5199, 0xD0B4, 0x519A, 0x83DD,
00426     0x519B, 0xBEFC, 0x519C, 0xC5A9, 0x519D, 0x83DE, 0x519E, 0x83DF,
00427     0x519F, 0x83E0, 0x51A0, 0xB9DA, 0x51A1, 0x83E1, 0x51A2, 0xDAA3,
00428     0x51A3, 0x83E2, 0x51A4, 0xD4A9, 0x51A5, 0xDAA4, 0x51A6, 0x83E3,
00429     0x51A7, 0x83E4, 0x51A8, 0x83E5, 0x51A9, 0x83E6, 0x51AA, 0x83E7,
00430     0x51AB, 0xD9FB, 0x51AC, 0xB6AC, 0x51AD, 0x83E8, 0x51AE, 0x83E9,
00431     0x51AF, 0xB7EB, 0x51B0, 0xB1F9, 0x51B1, 0xD9FC, 0x51B2, 0xB3E5,
00432     0x51B3, 0xBEF6, 0x51B4, 0x83EA, 0x51B5, 0xBFF6, 0x51B6, 0xD2B1,
00433     0x51B7, 0xC0E4, 0x51B8, 0x83EB, 0x51B9, 0x83EC, 0x51BA, 0x83ED,
00434     0x51BB, 0xB6B3, 0x51BC, 0xD9FE, 0x51BD, 0xD9FD, 0x51BE, 0x83EE,
00435     0x51BF, 0x83EF, 0x51C0, 0xBEBB, 0x51C1, 0x83F0, 0x51C2, 0x83F1,
00436     0x51C3, 0x83F2, 0x51C4, 0xC6E0, 0x51C5, 0x83F3, 0x51C6, 0xD7BC,
00437     0x51C7, 0xDAA1, 0x51C8, 0x83F4, 0x51C9, 0xC1B9, 0x51CA, 0x83F5,
00438     0x51CB, 0xB5F2, 0x51CC, 0xC1E8, 0x51CD, 0x83F6, 0x51CE, 0x83F7,
00439     0x51CF, 0xBCF5, 0x51D0, 0x83F8, 0x51D1, 0xB4D5, 0x51D2, 0x83F9,
00440     0x51D3, 0x83FA, 0x51D4, 0x83FB, 0x51D5, 0x83FC, 0x51D6, 0x83FD,
00441     0x51D7, 0x83FE, 0x51D8, 0x8440, 0x51D9, 0x8441, 0x51DA, 0x8442,
00442     0x51DB, 0xC1DD, 0x51DC, 0x8443, 0x51DD, 0xC4FD, 0x51DE, 0x8444,
00443     0x51DF, 0x8445, 0x51E0, 0xBCB8, 0x51E1, 0xB7B2, 0x51E2, 0x8446,
00444     0x51E3, 0x8447, 0x51E4, 0xB7EF, 0x51E5, 0x8448, 0x51E6, 0x8449,
00445     0x51E7, 0x844A, 0x51E8, 0x844B, 0x51E9, 0x844C, 0x51EA, 0x844D,
00446     0x51EB, 0xD9EC, 0x51EC, 0x844E, 0x51ED, 0xC6BE, 0x51EE, 0x844F,
00447     0x51EF, 0xBFAD, 0x51F0, 0xBBCB, 0x51F1, 0x8450, 0x51F2, 0x8451,
00448     0x51F3, 0xB5CA, 0x51F4, 0x8452, 0x51F5, 0xDBC9, 0x51F6, 0xD0D7,
00449     0x51F7, 0x8453, 0x51F8, 0xCDB9, 0x51F9, 0xB0BC, 0x51FA, 0xB3F6,
00450     0x51FB, 0xBBF7, 0x51FC, 0xDBCA, 0x51FD, 0xBAAF, 0x51FE, 0x8454,
00451     0x51FF, 0xD4E4, 0x5200, 0xB5B6, 0x5201, 0xB5F3, 0x5202, 0xD8D6,
00452     0x5203, 0xC8D0, 0x5204, 0x8455, 0x5205, 0x8456, 0x5206, 0xB7D6,
00453     0x5207, 0xC7D0, 0x5208, 0xD8D7, 0x5209, 0x8457, 0x520A, 0xBFAF,
00454     0x520B, 0x8458, 0x520C, 0x8459, 0x520D, 0xDBBB, 0x520E, 0xD8D8,
00455     0x520F, 0x845A, 0x5210, 0x845B, 0x5211, 0xD0CC, 0x5212, 0xBBAE,
00456     0x5213, 0x845C, 0x5214, 0x845D, 0x5215, 0x845E, 0x5216, 0xEBBE,
00457     0x5217, 0xC1D0, 0x5218, 0xC1F5, 0x5219, 0xD4F2, 0x521A, 0xB8D5,
00458     0x521B, 0xB4B4, 0x521C, 0x845F, 0x521D, 0xB3F5, 0x521E, 0x8460,
00459     0x521F, 0x8461, 0x5220, 0xC9BE, 0x5221, 0x8462, 0x5222, 0x8463,
00460     0x5223, 0x8464, 0x5224, 0xC5D0, 0x5225, 0x8465, 0x5226, 0x8466,
00461     0x5227, 0x8467, 0x5228, 0xC5D9, 0x5229, 0xC0FB, 0x522A, 0x8468,
00462     0x522B, 0xB1F0, 0x522C, 0x8469, 0x522D, 0xD8D9, 0x522E, 0xB9CE,
00463     0x522F, 0x846A, 0x5230, 0xB5BD, 0x5231, 0x846B, 0x5232, 0x846C,
00464     0x5233, 0xD8DA, 0x5234, 0x846D, 0x5235, 0x846E, 0x5236, 0xD6C6,
00465     0x5237, 0xCBA2, 0x5238, 0xC8AF, 0x5239, 0xC9B2, 0x523A, 0xB4CC,
00466     0x523B, 0xBFCC, 0x523C, 0x846F, 0x523D, 0xB9F4, 0x523E, 0x8470,
00467     0x523F, 0xD8DB, 0x5240, 0xD8DC, 0x5241, 0xB6E7, 0x5242, 0xBCC1,
00468     0x5243, 0xCCEA, 0x5244, 0x8471, 0x5245, 0x8472, 0x5246, 0x8473,
00469     0x5247, 0x8474, 0x5248, 0x8475, 0x5249, 0x8476, 0x524A, 0xCFF7,
00470     0x524B, 0x8477, 0x524C, 0xD8DD, 0x524D, 0xC7B0, 0x524E, 0x8478,
00471     0x524F, 0x8479, 0x5250, 0xB9D0, 0x5251, 0xBDA3, 0x5252, 0x847A,
00472     0x5253, 0x847B, 0x5254, 0xCCDE, 0x5255, 0x847C, 0x5256, 0xC6CA,
00473     0x5257, 0x847D, 0x5258, 0x847E, 0x5259, 0x8480, 0x525A, 0x8481,
00474     0x525B, 0x8482, 0x525C, 0xD8E0, 0x525D, 0x8483, 0x525E, 0xD8DE,
00475     0x525F, 0x8484, 0x5260, 0x8485, 0x5261, 0xD8DF, 0x5262, 0x8486,
00476     0x5263, 0x8487, 0x5264, 0x8488, 0x5265, 0xB0FE, 0x5266, 0x8489,
00477     0x5267, 0xBEE7, 0x5268, 0x848A, 0x5269, 0xCAA3, 0x526A, 0xBCF4,
00478     0x526B, 0x848B, 0x526C, 0x848C, 0x526D, 0x848D, 0x526E, 0x848E,
00479     0x526F, 0xB8B1, 0x5270, 0x848F, 0x5271, 0x8490, 0x5272, 0xB8EE,
00480     0x5273, 0x8491, 0x5274, 0x8492, 0x5275, 0x8493, 0x5276, 0x8494,
00481     0x5277, 0x8495, 0x5278, 0x8496, 0x5279, 0x8497, 0x527A, 0x8498,
00482     0x527B, 0x8499, 0x527C, 0x849A, 0x527D, 0xD8E2, 0x527E, 0x849B,
00483     0x527F, 0xBDCB, 0x5280, 0x849C, 0x5281, 0xD8E4, 0x5282, 0xD8E3,
00484     0x5283, 0x849D, 0x5284, 0x849E, 0x5285, 0x849F, 0x5286, 0x84A0,
00485     0x5287, 0x84A1, 0x5288, 0xC5FC, 0x5289, 0x84A2, 0x528A, 0x84A3,
00486     0x528B, 0x84A4, 0x528C, 0x84A5, 0x528D, 0x84A6, 0x528E, 0x84A7,
00487     0x528F, 0x84A8, 0x5290, 0xD8E5, 0x5291, 0x84A9, 0x5292, 0x84AA,
00488     0x5293, 0xD8E6, 0x5294, 0x84AB, 0x5295, 0x84AC, 0x5296, 0x84AD,
00489     0x5297, 0x84AE, 0x5298, 0x84AF, 0x5299, 0x84B0, 0x529A, 0x84B1,
00490     0x529B, 0xC1A6, 0x529C, 0x84B2, 0x529D, 0xC8B0, 0x529E, 0xB0EC,
00491     0x529F, 0xB9A6, 0x52A0, 0xBCD3, 0x52A1, 0xCEF1, 0x52A2, 0xDBBD,
00492     0x52A3, 0xC1D3, 0x52A4, 0x84B3, 0x52A5, 0x84B4, 0x52A6, 0x84B5,
00493     0x52A7, 0x84B6, 0x52A8, 0xB6AF, 0x52A9, 0xD6FA, 0x52AA, 0xC5AC,
00494     0x52AB, 0xBDD9, 0x52AC, 0xDBBE, 0x52AD, 0xDBBF, 0x52AE, 0x84B7,
00495     0x52AF, 0x84B8, 0x52B0, 0x84B9, 0x52B1, 0xC0F8, 0x52B2, 0xBEA2,
00496     0x52B3, 0xC0CD, 0x52B4, 0x84BA, 0x52B5, 0x84BB, 0x52B6, 0x84BC,
00497     0x52B7, 0x84BD, 0x52B8, 0x84BE, 0x52B9, 0x84BF, 0x52BA, 0x84C0,
00498     0x52BB, 0x84C1, 0x52BC, 0x84C2, 0x52BD, 0x84C3, 0x52BE, 0xDBC0,
00499     0x52BF, 0xCAC6, 0x52C0, 0x84C4, 0x52C1, 0x84C5, 0x52C2, 0x84C6,
00500     0x52C3, 0xB2AA, 0x52C4, 0x84C7, 0x52C5, 0x84C8, 0x52C6, 0x84C9,
00501     0x52C7, 0xD3C2, 0x52C8, 0x84CA, 0x52C9, 0xC3E3, 0x52CA, 0x84CB,
00502     0x52CB, 0xD1AB, 0x52CC, 0x84CC, 0x52CD, 0x84CD, 0x52CE, 0x84CE,
00503     0x52CF, 0x84CF, 0x52D0, 0xDBC2, 0x52D1, 0x84D0, 0x52D2, 0xC0D5,
00504     0x52D3, 0x84D1, 0x52D4, 0x84D2, 0x52D5, 0x84D3, 0x52D6, 0xDBC3,
00505     0x52D7, 0x84D4, 0x52D8, 0xBFB1, 0x52D9, 0x84D5, 0x52DA, 0x84D6,
00506     0x52DB, 0x84D7, 0x52DC, 0x84D8, 0x52DD, 0x84D9, 0x52DE, 0x84DA,
00507     0x52DF, 0xC4BC, 0x52E0, 0x84DB, 0x52E1, 0x84DC, 0x52E2, 0x84DD,
00508     0x52E3, 0x84DE, 0x52E4, 0xC7DA, 0x52E5, 0x84DF, 0x52E6, 0x84E0,
00509     0x52E7, 0x84E1, 0x52E8, 0x84E2, 0x52E9, 0x84E3, 0x52EA, 0x84E4,
00510     0x52EB, 0x84E5, 0x52EC, 0x84E6, 0x52ED, 0x84E7, 0x52EE, 0x84E8,
00511     0x52EF, 0x84E9, 0x52F0, 0xDBC4, 0x52F1, 0x84EA, 0x52F2, 0x84EB,
00512     0x52F3, 0x84EC, 0x52F4, 0x84ED, 0x52F5, 0x84EE, 0x52F6, 0x84EF,
00513     0x52F7, 0x84F0, 0x52F8, 0x84F1, 0x52F9, 0xD9E8, 0x52FA, 0xC9D7,
00514     0x52FB, 0x84F2, 0x52FC, 0x84F3, 0x52FD, 0x84F4, 0x52FE, 0xB9B4,
00515     0x52FF, 0xCEF0, 0x5300, 0xD4C8, 0x5301, 0x84F5, 0x5302, 0x84F6,
00516     0x5303, 0x84F7, 0x5304, 0x84F8, 0x5305, 0xB0FC, 0x5306, 0xB4D2,
00517     0x5307, 0x84F9, 0x5308, 0xD0D9, 0x5309, 0x84FA, 0x530A, 0x84FB,
00518     0x530B, 0x84FC, 0x530C, 0x84FD, 0x530D, 0xD9E9, 0x530E, 0x84FE,
00519     0x530F, 0xDECB, 0x5310, 0xD9EB, 0x5311, 0x8540, 0x5312, 0x8541,
00520     0x5313, 0x8542, 0x5314, 0x8543, 0x5315, 0xD8B0, 0x5316, 0xBBAF,
00521     0x5317, 0xB1B1, 0x5318, 0x8544, 0x5319, 0xB3D7, 0x531A, 0xD8CE,
00522     0x531B, 0x8545, 0x531C, 0x8546, 0x531D, 0xD4D1, 0x531E, 0x8547,
00523     0x531F, 0x8548, 0x5320, 0xBDB3, 0x5321, 0xBFEF, 0x5322, 0x8549,
00524     0x5323, 0xCFBB, 0x5324, 0x854A, 0x5325, 0x854B, 0x5326, 0xD8D0,
00525     0x5327, 0x854C, 0x5328, 0x854D, 0x5329, 0x854E, 0x532A, 0xB7CB,
00526     0x532B, 0x854F, 0x532C, 0x8550, 0x532D, 0x8551, 0x532E, 0xD8D1,
00527     0x532F, 0x8552, 0x5330, 0x8553, 0x5331, 0x8554, 0x5332, 0x8555,
00528     0x5333, 0x8556, 0x5334, 0x8557, 0x5335, 0x8558, 0x5336, 0x8559,
00529     0x5337, 0x855A, 0x5338, 0x855B, 0x5339, 0xC6A5, 0x533A, 0xC7F8,
00530     0x533B, 0xD2BD, 0x533C, 0x855C, 0x533D, 0x855D, 0x533E, 0xD8D2,
00531     0x533F, 0xC4E4, 0x5340, 0x855E, 0x5341, 0xCAAE, 0x5342, 0x855F,
00532     0x5343, 0xC7A7, 0x5344, 0x8560, 0x5345, 0xD8A6, 0x5346, 0x8561,
00533     0x5347, 0xC9FD, 0x5348, 0xCEE7, 0x5349, 0xBBDC, 0x534A, 0xB0EB,
00534     0x534B, 0x8562, 0x534C, 0x8563, 0x534D, 0x8564, 0x534E, 0xBBAA,
00535     0x534F, 0xD0AD, 0x5350, 0x8565, 0x5351, 0xB1B0, 0x5352, 0xD7E4,
00536     0x5353, 0xD7BF, 0x5354, 0x8566, 0x5355, 0xB5A5, 0x5356, 0xC2F4,
00537     0x5357, 0xC4CF, 0x5358, 0x8567, 0x5359, 0x8568, 0x535A, 0xB2A9,
00538     0x535B, 0x8569, 0x535C, 0xB2B7, 0x535D, 0x856A, 0x535E, 0xB1E5,
00539     0x535F, 0xDFB2, 0x5360, 0xD5BC, 0x5361, 0xBFA8, 0x5362, 0xC2AC,
00540     0x5363, 0xD8D5, 0x5364, 0xC2B1, 0x5365, 0x856B, 0x5366, 0xD8D4,
00541     0x5367, 0xCED4, 0x5368, 0x856C, 0x5369, 0xDAE0, 0x536A, 0x856D,
00542     0x536B, 0xCEC0, 0x536C, 0x856E, 0x536D, 0x856F, 0x536E, 0xD8B4,
00543     0x536F, 0xC3AE, 0x5370, 0xD3A1, 0x5371, 0xCEA3, 0x5372, 0x8570,
00544     0x5373, 0xBCB4, 0x5374, 0xC8B4, 0x5375, 0xC2D1, 0x5376, 0x8571,
00545     0x5377, 0xBEED, 0x5378, 0xD0B6, 0x5379, 0x8572, 0x537A, 0xDAE1,
00546     0x537B, 0x8573, 0x537C, 0x8574, 0x537D, 0x8575, 0x537E, 0x8576,
00547     0x537F, 0xC7E4, 0x5380, 0x8577, 0x5381, 0x8578, 0x5382, 0xB3A7,
00548     0x5383, 0x8579, 0x5384, 0xB6F2, 0x5385, 0xCCFC, 0x5386, 0xC0FA,
00549     0x5387, 0x857A, 0x5388, 0x857B, 0x5389, 0xC0F7, 0x538A, 0x857C,
00550     0x538B, 0xD1B9, 0x538C, 0xD1E1, 0x538D, 0xD8C7, 0x538E, 0x857D,
00551     0x538F, 0x857E, 0x5390, 0x8580, 0x5391, 0x8581, 0x5392, 0x8582,
00552     0x5393, 0x8583, 0x5394, 0x8584, 0x5395, 0xB2DE, 0x5396, 0x8585,
00553     0x5397, 0x8586, 0x5398, 0xC0E5, 0x5399, 0x8587, 0x539A, 0xBAF1,
00554     0x539B, 0x8588, 0x539C, 0x8589, 0x539D, 0xD8C8, 0x539E, 0x858A,
00555     0x539F, 0xD4AD, 0x53A0, 0x858B, 0x53A1, 0x858C, 0x53A2, 0xCFE1,
00556     0x53A3, 0xD8C9, 0x53A4, 0x858D, 0x53A5, 0xD8CA, 0x53A6, 0xCFC3,
00557     0x53A7, 0x858E, 0x53A8, 0xB3F8, 0x53A9, 0xBEC7, 0x53AA, 0x858F,
00558     0x53AB, 0x8590, 0x53AC, 0x8591, 0x53AD, 0x8592, 0x53AE, 0xD8CB,
00559     0x53AF, 0x8593, 0x53B0, 0x8594, 0x53B1, 0x8595, 0x53B2, 0x8596,
00560     0x53B3, 0x8597, 0x53B4, 0x8598, 0x53B5, 0x8599, 0x53B6, 0xDBCC,
00561     0x53B7, 0x859A, 0x53B8, 0x859B, 0x53B9, 0x859C, 0x53BA, 0x859D,
00562     0x53BB, 0xC8A5, 0x53BC, 0x859E, 0x53BD, 0x859F, 0x53BE, 0x85A0,
00563     0x53BF, 0xCFD8, 0x53C0, 0x85A1, 0x53C1, 0xC8FE, 0x53C2, 0xB2CE,
00564     0x53C3, 0x85A2, 0x53C4, 0x85A3, 0x53C5, 0x85A4, 0x53C6, 0x85A5,
00565     0x53C7, 0x85A6, 0x53C8, 0xD3D6, 0x53C9, 0xB2E6, 0x53CA, 0xBCB0,
00566     0x53CB, 0xD3D1, 0x53CC, 0xCBAB, 0x53CD, 0xB7B4, 0x53CE, 0x85A7,
00567     0x53CF, 0x85A8, 0x53D0, 0x85A9, 0x53D1, 0xB7A2, 0x53D2, 0x85AA,
00568     0x53D3, 0x85AB, 0x53D4, 0xCAE5, 0x53D5, 0x85AC, 0x53D6, 0xC8A1,
00569     0x53D7, 0xCADC, 0x53D8, 0xB1E4, 0x53D9, 0xD0F0, 0x53DA, 0x85AD,
00570     0x53DB, 0xC5D1, 0x53DC, 0x85AE, 0x53DD, 0x85AF, 0x53DE, 0x85B0,
00571     0x53DF, 0xDBC5, 0x53E0, 0xB5FE, 0x53E1, 0x85B1, 0x53E2, 0x85B2,
00572     0x53E3, 0xBFDA, 0x53E4, 0xB9C5, 0x53E5, 0xBEE4, 0x53E6, 0xC1ED,
00573     0x53E7, 0x85B3, 0x53E8, 0xDFB6, 0x53E9, 0xDFB5, 0x53EA, 0xD6BB,
00574     0x53EB, 0xBDD0, 0x53EC, 0xD5D9, 0x53ED, 0xB0C8, 0x53EE, 0xB6A3,
00575     0x53EF, 0xBFC9, 0x53F0, 0xCCA8, 0x53F1, 0xDFB3, 0x53F2, 0xCAB7,
00576     0x53F3, 0xD3D2, 0x53F4, 0x85B4, 0x53F5, 0xD8CF, 0x53F6, 0xD2B6,
00577     0x53F7, 0xBAC5, 0x53F8, 0xCBBE, 0x53F9, 0xCCBE, 0x53FA, 0x85B5,
00578     0x53FB, 0xDFB7, 0x53FC, 0xB5F0, 0x53FD, 0xDFB4, 0x53FE, 0x85B6,
00579     0x53FF, 0x85B7, 0x5400, 0x85B8, 0x5401, 0xD3F5, 0x5402, 0x85B9,
00580     0x5403, 0xB3D4, 0x5404, 0xB8F7, 0x5405, 0x85BA, 0x5406, 0xDFBA,
00581     0x5407, 0x85BB, 0x5408, 0xBACF, 0x5409, 0xBCAA, 0x540A, 0xB5F5,
00582     0x540B, 0x85BC, 0x540C, 0xCDAC, 0x540D, 0xC3FB, 0x540E, 0xBAF3,
00583     0x540F, 0xC0F4, 0x5410, 0xCDC2, 0x5411, 0xCFF2, 0x5412, 0xDFB8,
00584     0x5413, 0xCFC5, 0x5414, 0x85BD, 0x5415, 0xC2C0, 0x5416, 0xDFB9,
00585     0x5417, 0xC2F0, 0x5418, 0x85BE, 0x5419, 0x85BF, 0x541A, 0x85C0,
00586     0x541B, 0xBEFD, 0x541C, 0x85C1, 0x541D, 0xC1DF, 0x541E, 0xCDCC,
00587     0x541F, 0xD2F7, 0x5420, 0xB7CD, 0x5421, 0xDFC1, 0x5422, 0x85C2,
00588     0x5423, 0xDFC4, 0x5424, 0x85C3, 0x5425, 0x85C4, 0x5426, 0xB7F1,
00589     0x5427, 0xB0C9, 0x5428, 0xB6D6, 0x5429, 0xB7D4, 0x542A, 0x85C5,
00590     0x542B, 0xBAAC, 0x542C, 0xCCFD, 0x542D, 0xBFD4, 0x542E, 0xCBB1,
00591     0x542F, 0xC6F4, 0x5430, 0x85C6, 0x5431, 0xD6A8, 0x5432, 0xDFC5,
00592     0x5433, 0x85C7, 0x5434, 0xCEE2, 0x5435, 0xB3B3, 0x5436, 0x85C8,
00593     0x5437, 0x85C9, 0x5438, 0xCEFC, 0x5439, 0xB4B5, 0x543A, 0x85CA,
00594     0x543B, 0xCEC7, 0x543C, 0xBAF0, 0x543D, 0x85CB, 0x543E, 0xCEE1,
00595     0x543F, 0x85CC, 0x5440, 0xD1BD, 0x5441, 0x85CD, 0x5442, 0x85CE,
00596     0x5443, 0xDFC0, 0x5444, 0x85CF, 0x5445, 0x85D0, 0x5446, 0xB4F4,
00597     0x5447, 0x85D1, 0x5448, 0xB3CA, 0x5449, 0x85D2, 0x544A, 0xB8E6,
00598     0x544B, 0xDFBB, 0x544C, 0x85D3, 0x544D, 0x85D4, 0x544E, 0x85D5,
00599     0x544F, 0x85D6, 0x5450, 0xC4C5, 0x5451, 0x85D7, 0x5452, 0xDFBC,
00600     0x5453, 0xDFBD, 0x5454, 0xDFBE, 0x5455, 0xC5BB, 0x5456, 0xDFBF,
00601     0x5457, 0xDFC2, 0x5458, 0xD4B1, 0x5459, 0xDFC3, 0x545A, 0x85D8,
00602     0x545B, 0xC7BA, 0x545C, 0xCED8, 0x545D, 0x85D9, 0x545E, 0x85DA,
00603     0x545F, 0x85DB, 0x5460, 0x85DC, 0x5461, 0x85DD, 0x5462, 0xC4D8,
00604     0x5463, 0x85DE, 0x5464, 0xDFCA, 0x5465, 0x85DF, 0x5466, 0xDFCF,
00605     0x5467, 0x85E0, 0x5468, 0xD6DC, 0x5469, 0x85E1, 0x546A, 0x85E2,
00606     0x546B, 0x85E3, 0x546C, 0x85E4, 0x546D, 0x85E5, 0x546E, 0x85E6,
00607     0x546F, 0x85E7, 0x5470, 0x85E8, 0x5471, 0xDFC9, 0x5472, 0xDFDA,
00608     0x5473, 0xCEB6, 0x5474, 0x85E9, 0x5475, 0xBAC7, 0x5476, 0xDFCE,
00609     0x5477, 0xDFC8, 0x5478, 0xC5DE, 0x5479, 0x85EA, 0x547A, 0x85EB,
00610     0x547B, 0xC9EB, 0x547C, 0xBAF4, 0x547D, 0xC3FC, 0x547E, 0x85EC,
00611     0x547F, 0x85ED, 0x5480, 0xBED7, 0x5481, 0x85EE, 0x5482, 0xDFC6,
00612     0x5483, 0x85EF, 0x5484, 0xDFCD, 0x5485, 0x85F0, 0x5486, 0xC5D8,
00613     0x5487, 0x85F1, 0x5488, 0x85F2, 0x5489, 0x85F3, 0x548A, 0x85F4,
00614     0x548B, 0xD5A6, 0x548C, 0xBACD, 0x548D, 0x85F5, 0x548E, 0xBECC,
00615     0x548F, 0xD3BD, 0x5490, 0xB8C0, 0x5491, 0x85F6, 0x5492, 0xD6E4,
00616     0x5493, 0x85F7, 0x5494, 0xDFC7, 0x5495, 0xB9BE, 0x5496, 0xBFA7,
00617     0x5497, 0x85F8, 0x5498, 0x85F9, 0x5499, 0xC1FC, 0x549A, 0xDFCB,
00618     0x549B, 0xDFCC, 0x549C, 0x85FA, 0x549D, 0xDFD0, 0x549E, 0x85FB,
00619     0x549F, 0x85FC, 0x54A0, 0x85FD, 0x54A1, 0x85FE, 0x54A2, 0x8640,
00620     0x54A3, 0xDFDB, 0x54A4, 0xDFE5, 0x54A5, 0x8641, 0x54A6, 0xDFD7,
00621     0x54A7, 0xDFD6, 0x54A8, 0xD7C9, 0x54A9, 0xDFE3, 0x54AA, 0xDFE4,
00622     0x54AB, 0xE5EB, 0x54AC, 0xD2A7, 0x54AD, 0xDFD2, 0x54AE, 0x8642,
00623     0x54AF, 0xBFA9, 0x54B0, 0x8643, 0x54B1, 0xD4DB, 0x54B2, 0x8644,
00624     0x54B3, 0xBFC8, 0x54B4, 0xDFD4, 0x54B5, 0x8645, 0x54B6, 0x8646,
00625     0x54B7, 0x8647, 0x54B8, 0xCFCC, 0x54B9, 0x8648, 0x54BA, 0x8649,
00626     0x54BB, 0xDFDD, 0x54BC, 0x864A, 0x54BD, 0xD1CA, 0x54BE, 0x864B,
00627     0x54BF, 0xDFDE, 0x54C0, 0xB0A7, 0x54C1, 0xC6B7, 0x54C2, 0xDFD3,
00628     0x54C3, 0x864C, 0x54C4, 0xBAE5, 0x54C5, 0x864D, 0x54C6, 0xB6DF,
00629     0x54C7, 0xCDDB, 0x54C8, 0xB9FE, 0x54C9, 0xD4D5, 0x54CA, 0x864E,
00630     0x54CB, 0x864F, 0x54CC, 0xDFDF, 0x54CD, 0xCFEC, 0x54CE, 0xB0A5,
00631     0x54CF, 0xDFE7, 0x54D0, 0xDFD1, 0x54D1, 0xD1C6, 0x54D2, 0xDFD5,
00632     0x54D3, 0xDFD8, 0x54D4, 0xDFD9, 0x54D5, 0xDFDC, 0x54D6, 0x8650,
00633     0x54D7, 0xBBA9, 0x54D8, 0x8651, 0x54D9, 0xDFE0, 0x54DA, 0xDFE1,
00634     0x54DB, 0x8652, 0x54DC, 0xDFE2, 0x54DD, 0xDFE6, 0x54DE, 0xDFE8,
00635     0x54DF, 0xD3B4, 0x54E0, 0x8653, 0x54E1, 0x8654, 0x54E2, 0x8655,
00636     0x54E3, 0x8656, 0x54E4, 0x8657, 0x54E5, 0xB8E7, 0x54E6, 0xC5B6,
00637     0x54E7, 0xDFEA, 0x54E8, 0xC9DA, 0x54E9, 0xC1A8, 0x54EA, 0xC4C4,
00638     0x54EB, 0x8658, 0x54EC, 0x8659, 0x54ED, 0xBFDE, 0x54EE, 0xCFF8,
00639     0x54EF, 0x865A, 0x54F0, 0x865B, 0x54F1, 0x865C, 0x54F2, 0xD5DC,
00640     0x54F3, 0xDFEE, 0x54F4, 0x865D, 0x54F5, 0x865E, 0x54F6, 0x865F,
00641     0x54F7, 0x8660, 0x54F8, 0x8661, 0x54F9, 0x8662, 0x54FA, 0xB2B8,
00642     0x54FB, 0x8663, 0x54FC, 0xBADF, 0x54FD, 0xDFEC, 0x54FE, 0x8664,
00643     0x54FF, 0xDBC1, 0x5500, 0x8665, 0x5501, 0xD1E4, 0x5502, 0x8666,
00644     0x5503, 0x8667, 0x5504, 0x8668, 0x5505, 0x8669, 0x5506, 0xCBF4,
00645     0x5507, 0xB4BD, 0x5508, 0x866A, 0x5509, 0xB0A6, 0x550A, 0x866B,
00646     0x550B, 0x866C, 0x550C, 0x866D, 0x550D, 0x866E, 0x550E, 0x866F,
00647     0x550F, 0xDFF1, 0x5510, 0xCCC6, 0x5511, 0xDFF2, 0x5512, 0x8670,
00648     0x5513, 0x8671, 0x5514, 0xDFED, 0x5515, 0x8672, 0x5516, 0x8673,
00649     0x5517, 0x8674, 0x5518, 0x8675, 0x5519, 0x8676, 0x551A, 0x8677,
00650     0x551B, 0xDFE9, 0x551C, 0x8678, 0x551D, 0x8679, 0x551E, 0x867A,
00651     0x551F, 0x867B, 0x5520, 0xDFEB, 0x5521, 0x867C, 0x5522, 0xDFEF,
00652     0x5523, 0xDFF0, 0x5524, 0xBBBD, 0x5525, 0x867D, 0x5526, 0x867E,
00653     0x5527, 0xDFF3, 0x5528, 0x8680, 0x5529, 0x8681, 0x552A, 0xDFF4,
00654     0x552B, 0x8682, 0x552C, 0xBBA3, 0x552D, 0x8683, 0x552E, 0xCADB,
00655     0x552F, 0xCEA8, 0x5530, 0xE0A7, 0x5531, 0xB3AA, 0x5532, 0x8684,
00656     0x5533, 0xE0A6, 0x5534, 0x8685, 0x5535, 0x8686, 0x5536, 0x8687,
00657     0x5537, 0xE0A1, 0x5538, 0x8688, 0x5539, 0x8689, 0x553A, 0x868A,
00658     0x553B, 0x868B, 0x553C, 0xDFFE, 0x553D, 0x868C, 0x553E, 0xCDD9,
00659     0x553F, 0xDFFC, 0x5540, 0x868D, 0x5541, 0xDFFA, 0x5542, 0x868E,
00660     0x5543, 0xBFD0, 0x5544, 0xD7C4, 0x5545, 0x868F, 0x5546, 0xC9CC,
00661     0x5547, 0x8690, 0x5548, 0x8691, 0x5549, 0xDFF8, 0x554A, 0xB0A1,
00662     0x554B, 0x8692, 0x554C, 0x8693, 0x554D, 0x8694, 0x554E, 0x8695,
00663     0x554F, 0x8696, 0x5550, 0xDFFD, 0x5551, 0x8697, 0x5552, 0x8698,
00664     0x5553, 0x8699, 0x5554, 0x869A, 0x5555, 0xDFFB, 0x5556, 0xE0A2,
00665     0x5557, 0x869B, 0x5558, 0x869C, 0x5559, 0x869D, 0x555A, 0x869E,
00666     0x555B, 0x869F, 0x555C, 0xE0A8, 0x555D, 0x86A0, 0x555E, 0x86A1,
00667     0x555F, 0x86A2, 0x5560, 0x86A3, 0x5561, 0xB7C8, 0x5562, 0x86A4,
00668     0x5563, 0x86A5, 0x5564, 0xC6A1, 0x5565, 0xC9B6, 0x5566, 0xC0B2,
00669     0x5567, 0xDFF5, 0x5568, 0x86A6, 0x5569, 0x86A7, 0x556A, 0xC5BE,
00670     0x556B, 0x86A8, 0x556C, 0xD8C4, 0x556D, 0xDFF9, 0x556E, 0xC4F6,
00671     0x556F, 0x86A9, 0x5570, 0x86AA, 0x5571, 0x86AB, 0x5572, 0x86AC,
00672     0x5573, 0x86AD, 0x5574, 0x86AE, 0x5575, 0xE0A3, 0x5576, 0xE0A4,
00673     0x5577, 0xE0A5, 0x5578, 0xD0A5, 0x5579, 0x86AF, 0x557A, 0x86B0,
00674     0x557B, 0xE0B4, 0x557C, 0xCCE4, 0x557D, 0x86B1, 0x557E, 0xE0B1,
00675     0x557F, 0x86B2, 0x5580, 0xBFA6, 0x5581, 0xE0AF, 0x5582, 0xCEB9,
00676     0x5583, 0xE0AB, 0x5584, 0xC9C6, 0x5585, 0x86B3, 0x5586, 0x86B4,
00677     0x5587, 0xC0AE, 0x5588, 0xE0AE, 0x5589, 0xBAED, 0x558A, 0xBAB0,
00678     0x558B, 0xE0A9, 0x558C, 0x86B5, 0x558D, 0x86B6, 0x558E, 0x86B7,
00679     0x558F, 0xDFF6, 0x5590, 0x86B8, 0x5591, 0xE0B3, 0x5592, 0x86B9,
00680     0x5593, 0x86BA, 0x5594, 0xE0B8, 0x5595, 0x86BB, 0x5596, 0x86BC,
00681     0x5597, 0x86BD, 0x5598, 0xB4AD, 0x5599, 0xE0B9, 0x559A, 0x86BE,
00682     0x559B, 0x86BF, 0x559C, 0xCFB2, 0x559D, 0xBAC8, 0x559E, 0x86C0,
00683     0x559F, 0xE0B0, 0x55A0, 0x86C1, 0x55A1, 0x86C2, 0x55A2, 0x86C3,
00684     0x55A3, 0x86C4, 0x55A4, 0x86C5, 0x55A5, 0x86C6, 0x55A6, 0x86C7,
00685     0x55A7, 0xD0FA, 0x55A8, 0x86C8, 0x55A9, 0x86C9, 0x55AA, 0x86CA,
00686     0x55AB, 0x86CB, 0x55AC, 0x86CC, 0x55AD, 0x86CD, 0x55AE, 0x86CE,
00687     0x55AF, 0x86CF, 0x55B0, 0x86D0, 0x55B1, 0xE0AC, 0x55B2, 0x86D1,
00688     0x55B3, 0xD4FB, 0x55B4, 0x86D2, 0x55B5, 0xDFF7, 0x55B6, 0x86D3,
00689     0x55B7, 0xC5E7, 0x55B8, 0x86D4, 0x55B9, 0xE0AD, 0x55BA, 0x86D5,
00690     0x55BB, 0xD3F7, 0x55BC, 0x86D6, 0x55BD, 0xE0B6, 0x55BE, 0xE0B7,
00691     0x55BF, 0x86D7, 0x55C0, 0x86D8, 0x55C1, 0x86D9, 0x55C2, 0x86DA,
00692     0x55C3, 0x86DB, 0x55C4, 0xE0C4, 0x55C5, 0xD0E1, 0x55C6, 0x86DC,
00693     0x55C7, 0x86DD, 0x55C8, 0x86DE, 0x55C9, 0xE0BC, 0x55CA, 0x86DF,
00694     0x55CB, 0x86E0, 0x55CC, 0xE0C9, 0x55CD, 0xE0CA, 0x55CE, 0x86E1,
00695     0x55CF, 0x86E2, 0x55D0, 0x86E3, 0x55D1, 0xE0BE, 0x55D2, 0xE0AA,
00696     0x55D3, 0xC9A4, 0x55D4, 0xE0C1, 0x55D5, 0x86E4, 0x55D6, 0xE0B2,
00697     0x55D7, 0x86E5, 0x55D8, 0x86E6, 0x55D9, 0x86E7, 0x55DA, 0x86E8,
00698     0x55DB, 0x86E9, 0x55DC, 0xCAC8, 0x55DD, 0xE0C3, 0x55DE, 0x86EA,
00699     0x55DF, 0xE0B5, 0x55E0, 0x86EB, 0x55E1, 0xCECB, 0x55E2, 0x86EC,
00700     0x55E3, 0xCBC3, 0x55E4, 0xE0CD, 0x55E5, 0xE0C6, 0x55E6, 0xE0C2,
00701     0x55E7, 0x86ED, 0x55E8, 0xE0CB, 0x55E9, 0x86EE, 0x55EA, 0xE0BA,
00702     0x55EB, 0xE0BF, 0x55EC, 0xE0C0, 0x55ED, 0x86EF, 0x55EE, 0x86F0,
00703     0x55EF, 0xE0C5, 0x55F0, 0x86F1, 0x55F1, 0x86F2, 0x55F2, 0xE0C7,
00704     0x55F3, 0xE0C8, 0x55F4, 0x86F3, 0x55F5, 0xE0CC, 0x55F6, 0x86F4,
00705     0x55F7, 0xE0BB, 0x55F8, 0x86F5, 0x55F9, 0x86F6, 0x55FA, 0x86F7,
00706     0x55FB, 0x86F8, 0x55FC, 0x86F9, 0x55FD, 0xCBD4, 0x55FE, 0xE0D5,
00707     0x55FF, 0x86FA, 0x5600, 0xE0D6, 0x5601, 0xE0D2, 0x5602, 0x86FB,
00708     0x5603, 0x86FC, 0x5604, 0x86FD, 0x5605, 0x86FE, 0x5606, 0x8740,
00709     0x5607, 0x8741, 0x5608, 0xE0D0, 0x5609, 0xBCCE, 0x560A, 0x8742,
00710     0x560B, 0x8743, 0x560C, 0xE0D1, 0x560D, 0x8744, 0x560E, 0xB8C2,
00711     0x560F, 0xD8C5, 0x5610, 0x8745, 0x5611, 0x8746, 0x5612, 0x8747,
00712     0x5613, 0x8748, 0x5614, 0x8749, 0x5615, 0x874A, 0x5616, 0x874B,
00713     0x5617, 0x874C, 0x5618, 0xD0EA, 0x5619, 0x874D, 0x561A, 0x874E,
00714     0x561B, 0xC2EF, 0x561C, 0x874F, 0x561D, 0x8750, 0x561E, 0xE0CF,
00715     0x561F, 0xE0BD, 0x5620, 0x8751, 0x5621, 0x8752, 0x5622, 0x8753,
00716     0x5623, 0xE0D4, 0x5624, 0xE0D3, 0x5625, 0x8754, 0x5626, 0x8755,
00717     0x5627, 0xE0D7, 0x5628, 0x8756, 0x5629, 0x8757, 0x562A, 0x8758,
00718     0x562B, 0x8759, 0x562C, 0xE0DC, 0x562D, 0xE0D8, 0x562E, 0x875A,
00719     0x562F, 0x875B, 0x5630, 0x875C, 0x5631, 0xD6F6, 0x5632, 0xB3B0,
00720     0x5633, 0x875D, 0x5634, 0xD7EC, 0x5635, 0x875E, 0x5636, 0xCBBB,
00721     0x5637, 0x875F, 0x5638, 0x8760, 0x5639, 0xE0DA, 0x563A, 0x8761,
00722     0x563B, 0xCEFB, 0x563C, 0x8762, 0x563D, 0x8763, 0x563E, 0x8764,
00723     0x563F, 0xBAD9, 0x5640, 0x8765, 0x5641, 0x8766, 0x5642, 0x8767,
00724     0x5643, 0x8768, 0x5644, 0x8769, 0x5645, 0x876A, 0x5646, 0x876B,
00725     0x5647, 0x876C, 0x5648, 0x876D, 0x5649, 0x876E, 0x564A, 0x876F,
00726     0x564B, 0x8770, 0x564C, 0xE0E1, 0x564D, 0xE0DD, 0x564E, 0xD2AD,
00727     0x564F, 0x8771, 0x5650, 0x8772, 0x5651, 0x8773, 0x5652, 0x8774,
00728     0x5653, 0x8775, 0x5654, 0xE0E2, 0x5655, 0x8776, 0x5656, 0x8777,
00729     0x5657, 0xE0DB, 0x5658, 0xE0D9, 0x5659, 0xE0DF, 0x565A, 0x8778,
00730     0x565B, 0x8779, 0x565C, 0xE0E0, 0x565D, 0x877A, 0x565E, 0x877B,
00731     0x565F, 0x877C, 0x5660, 0x877D, 0x5661, 0x877E, 0x5662, 0xE0DE,
00732     0x5663, 0x8780, 0x5664, 0xE0E4, 0x5665, 0x8781, 0x5666, 0x8782,
00733     0x5667, 0x8783, 0x5668, 0xC6F7, 0x5669, 0xD8AC, 0x566A, 0xD4EB,
00734     0x566B, 0xE0E6, 0x566C, 0xCAC9, 0x566D, 0x8784, 0x566E, 0x8785,
00735     0x566F, 0x8786, 0x5670, 0x8787, 0x5671, 0xE0E5, 0x5672, 0x8788,
00736     0x5673, 0x8789, 0x5674, 0x878A, 0x5675, 0x878B, 0x5676, 0xB8C1,
00737     0x5677, 0x878C, 0x5678, 0x878D, 0x5679, 0x878E, 0x567A, 0x878F,
00738     0x567B, 0xE0E7, 0x567C, 0xE0E8, 0x567D, 0x8790, 0x567E, 0x8791,
00739     0x567F, 0x8792, 0x5680, 0x8793, 0x5681, 0x8794, 0x5682, 0x8795,
00740     0x5683, 0x8796, 0x5684, 0x8797, 0x5685, 0xE0E9, 0x5686, 0xE0E3,
00741     0x5687, 0x8798, 0x5688, 0x8799, 0x5689, 0x879A, 0x568A, 0x879B,
00742     0x568B, 0x879C, 0x568C, 0x879D, 0x568D, 0x879E, 0x568E, 0xBABF,
00743     0x568F, 0xCCE7, 0x5690, 0x879F, 0x5691, 0x87A0, 0x5692, 0x87A1,
00744     0x5693, 0xE0EA, 0x5694, 0x87A2, 0x5695, 0x87A3, 0x5696, 0x87A4,
00745     0x5697, 0x87A5, 0x5698, 0x87A6, 0x5699, 0x87A7, 0x569A, 0x87A8,
00746     0x569B, 0x87A9, 0x569C, 0x87AA, 0x569D, 0x87AB, 0x569E, 0x87AC,
00747     0x569F, 0x87AD, 0x56A0, 0x87AE, 0x56A1, 0x87AF, 0x56A2, 0x87B0,
00748     0x56A3, 0xCFF9, 0x56A4, 0x87B1, 0x56A5, 0x87B2, 0x56A6, 0x87B3,
00749     0x56A7, 0x87B4, 0x56A8, 0x87B5, 0x56A9, 0x87B6, 0x56AA, 0x87B7,
00750     0x56AB, 0x87B8, 0x56AC, 0x87B9, 0x56AD, 0x87BA, 0x56AE, 0x87BB,
00751     0x56AF, 0xE0EB, 0x56B0, 0x87BC, 0x56B1, 0x87BD, 0x56B2, 0x87BE,
00752     0x56B3, 0x87BF, 0x56B4, 0x87C0, 0x56B5, 0x87C1, 0x56B6, 0x87C2,
00753     0x56B7, 0xC8C2, 0x56B8, 0x87C3, 0x56B9, 0x87C4, 0x56BA, 0x87C5,
00754     0x56BB, 0x87C6, 0x56BC, 0xBDC0, 0x56BD, 0x87C7, 0x56BE, 0x87C8,
00755     0x56BF, 0x87C9, 0x56C0, 0x87CA, 0x56C1, 0x87CB, 0x56C2, 0x87CC,
00756     0x56C3, 0x87CD, 0x56C4, 0x87CE, 0x56C5, 0x87CF, 0x56C6, 0x87D0,
00757     0x56C7, 0x87D1, 0x56C8, 0x87D2, 0x56C9, 0x87D3, 0x56CA, 0xC4D2,
00758     0x56CB, 0x87D4, 0x56CC, 0x87D5, 0x56CD, 0x87D6, 0x56CE, 0x87D7,
00759     0x56CF, 0x87D8, 0x56D0, 0x87D9, 0x56D1, 0x87DA, 0x56D2, 0x87DB,
00760     0x56D3, 0x87DC, 0x56D4, 0xE0EC, 0x56D5, 0x87DD, 0x56D6, 0x87DE,
00761     0x56D7, 0xE0ED, 0x56D8, 0x87DF, 0x56D9, 0x87E0, 0x56DA, 0xC7F4,
00762     0x56DB, 0xCBC4, 0x56DC, 0x87E1, 0x56DD, 0xE0EE, 0x56DE, 0xBBD8,
00763     0x56DF, 0xD8B6, 0x56E0, 0xD2F2, 0x56E1, 0xE0EF, 0x56E2, 0xCDC5,
00764     0x56E3, 0x87E2, 0x56E4, 0xB6DA, 0x56E5, 0x87E3, 0x56E6, 0x87E4,
00765     0x56E7, 0x87E5, 0x56E8, 0x87E6, 0x56E9, 0x87E7, 0x56EA, 0x87E8,
00766     0x56EB, 0xE0F1, 0x56EC, 0x87E9, 0x56ED, 0xD4B0, 0x56EE, 0x87EA,
00767     0x56EF, 0x87EB, 0x56F0, 0xC0A7, 0x56F1, 0xB4D1, 0x56F2, 0x87EC,
00768     0x56F3, 0x87ED, 0x56F4, 0xCEA7, 0x56F5, 0xE0F0, 0x56F6, 0x87EE,
00769     0x56F7, 0x87EF, 0x56F8, 0x87F0, 0x56F9, 0xE0F2, 0x56FA, 0xB9CC,
00770     0x56FB, 0x87F1, 0x56FC, 0x87F2, 0x56FD, 0xB9FA, 0x56FE, 0xCDBC,
00771     0x56FF, 0xE0F3, 0x5700, 0x87F3, 0x5701, 0x87F4, 0x5702, 0x87F5,
00772     0x5703, 0xC6D4, 0x5704, 0xE0F4, 0x5705, 0x87F6, 0x5706, 0xD4B2,
00773     0x5707, 0x87F7, 0x5708, 0xC8A6, 0x5709, 0xE0F6, 0x570A, 0xE0F5,
00774     0x570B, 0x87F8, 0x570C, 0x87F9, 0x570D, 0x87FA, 0x570E, 0x87FB,
00775     0x570F, 0x87FC, 0x5710, 0x87FD, 0x5711, 0x87FE, 0x5712, 0x8840,
00776     0x5713, 0x8841, 0x5714, 0x8842, 0x5715, 0x8843, 0x5716, 0x8844,
00777     0x5717, 0x8845, 0x5718, 0x8846, 0x5719, 0x8847, 0x571A, 0x8848,
00778     0x571B, 0x8849, 0x571C, 0xE0F7, 0x571D, 0x884A, 0x571E, 0x884B,
00779     0x571F, 0xCDC1, 0x5720, 0x884C, 0x5721, 0x884D, 0x5722, 0x884E,
00780     0x5723, 0xCAA5, 0x5724, 0x884F, 0x5725, 0x8850, 0x5726, 0x8851,
00781     0x5727, 0x8852, 0x5728, 0xD4DA, 0x5729, 0xDBD7, 0x572A, 0xDBD9,
00782     0x572B, 0x8853, 0x572C, 0xDBD8, 0x572D, 0xB9E7, 0x572E, 0xDBDC,
00783     0x572F, 0xDBDD, 0x5730, 0xB5D8, 0x5731, 0x8854, 0x5732, 0x8855,
00784     0x5733, 0xDBDA, 0x5734, 0x8856, 0x5735, 0x8857, 0x5736, 0x8858,
00785     0x5737, 0x8859, 0x5738, 0x885A, 0x5739, 0xDBDB, 0x573A, 0xB3A1,
00786     0x573B, 0xDBDF, 0x573C, 0x885B, 0x573D, 0x885C, 0x573E, 0xBBF8,
00787     0x573F, 0x885D, 0x5740, 0xD6B7, 0x5741, 0x885E, 0x5742, 0xDBE0,
00788     0x5743, 0x885F, 0x5744, 0x8860, 0x5745, 0x8861, 0x5746, 0x8862,
00789     0x5747, 0xBEF9, 0x5748, 0x8863, 0x5749, 0x8864, 0x574A, 0xB7BB,
00790     0x574B, 0x8865, 0x574C, 0xDBD0, 0x574D, 0xCCAE, 0x574E, 0xBFB2,
00791     0x574F, 0xBBB5, 0x5750, 0xD7F8, 0x5751, 0xBFD3, 0x5752, 0x8866,
00792     0x5753, 0x8867, 0x5754, 0x8868, 0x5755, 0x8869, 0x5756, 0x886A,
00793     0x5757, 0xBFE9, 0x5758, 0x886B, 0x5759, 0x886C, 0x575A, 0xBCE1,
00794     0x575B, 0xCCB3, 0x575C, 0xDBDE, 0x575D, 0xB0D3, 0x575E, 0xCEEB,
00795     0x575F, 0xB7D8, 0x5760, 0xD7B9, 0x5761, 0xC6C2, 0x5762, 0x886D,
00796     0x5763, 0x886E, 0x5764, 0xC0A4, 0x5765, 0x886F, 0x5766, 0xCCB9,
00797     0x5767, 0x8870, 0x5768, 0xDBE7, 0x5769, 0xDBE1, 0x576A, 0xC6BA,
00798     0x576B, 0xDBE3, 0x576C, 0x8871, 0x576D, 0xDBE8, 0x576E, 0x8872,
00799     0x576F, 0xC5F7, 0x5770, 0x8873, 0x5771, 0x8874, 0x5772, 0x8875,
00800     0x5773, 0xDBEA, 0x5774, 0x8876, 0x5775, 0x8877, 0x5776, 0xDBE9,
00801     0x5777, 0xBFC0, 0x5778, 0x8878, 0x5779, 0x8879, 0x577A, 0x887A,
00802     0x577B, 0xDBE6, 0x577C, 0xDBE5, 0x577D, 0x887B, 0x577E, 0x887C,
00803     0x577F, 0x887D, 0x5780, 0x887E, 0x5781, 0x8880, 0x5782, 0xB4B9,
00804     0x5783, 0xC0AC, 0x5784, 0xC2A2, 0x5785, 0xDBE2, 0x5786, 0xDBE4,
00805     0x5787, 0x8881, 0x5788, 0x8882, 0x5789, 0x8883, 0x578A, 0x8884,
00806     0x578B, 0xD0CD, 0x578C, 0xDBED, 0x578D, 0x8885, 0x578E, 0x8886,
00807     0x578F, 0x8887, 0x5790, 0x8888, 0x5791, 0x8889, 0x5792, 0xC0DD,
00808     0x5793, 0xDBF2, 0x5794, 0x888A, 0x5795, 0x888B, 0x5796, 0x888C,
00809     0x5797, 0x888D, 0x5798, 0x888E, 0x5799, 0x888F, 0x579A, 0x8890,
00810     0x579B, 0xB6E2, 0x579C, 0x8891, 0x579D, 0x8892, 0x579E, 0x8893,
00811     0x579F, 0x8894, 0x57A0, 0xDBF3, 0x57A1, 0xDBD2, 0x57A2, 0xB9B8,
00812     0x57A3, 0xD4AB, 0x57A4, 0xDBEC, 0x57A5, 0x8895, 0x57A6, 0xBFD1,
00813     0x57A7, 0xDBF0, 0x57A8, 0x8896, 0x57A9, 0xDBD1, 0x57AA, 0x8897,
00814     0x57AB, 0xB5E6, 0x57AC, 0x8898, 0x57AD, 0xDBEB, 0x57AE, 0xBFE5,
00815     0x57AF, 0x8899, 0x57B0, 0x889A, 0x57B1, 0x889B, 0x57B2, 0xDBEE,
00816     0x57B3, 0x889C, 0x57B4, 0xDBF1, 0x57B5, 0x889D, 0x57B6, 0x889E,
00817     0x57B7, 0x889F, 0x57B8, 0xDBF9, 0x57B9, 0x88A0, 0x57BA, 0x88A1,
00818     0x57BB, 0x88A2, 0x57BC, 0x88A3, 0x57BD, 0x88A4, 0x57BE, 0x88A5,
00819     0x57BF, 0x88A6, 0x57C0, 0x88A7, 0x57C1, 0x88A8, 0x57C2, 0xB9A1,
00820     0x57C3, 0xB0A3, 0x57C4, 0x88A9, 0x57C5, 0x88AA, 0x57C6, 0x88AB,
00821     0x57C7, 0x88AC, 0x57C8, 0x88AD, 0x57C9, 0x88AE, 0x57CA, 0x88AF,
00822     0x57CB, 0xC2F1, 0x57CC, 0x88B0, 0x57CD, 0x88B1, 0x57CE, 0xB3C7,
00823     0x57CF, 0xDBEF, 0x57D0, 0x88B2, 0x57D1, 0x88B3, 0x57D2, 0xDBF8,
00824     0x57D3, 0x88B4, 0x57D4, 0xC6D2, 0x57D5, 0xDBF4, 0x57D6, 0x88B5,
00825     0x57D7, 0x88B6, 0x57D8, 0xDBF5, 0x57D9, 0xDBF7, 0x57DA, 0xDBF6,
00826     0x57DB, 0x88B7, 0x57DC, 0x88B8, 0x57DD, 0xDBFE, 0x57DE, 0x88B9,
00827     0x57DF, 0xD3F2, 0x57E0, 0xB2BA, 0x57E1, 0x88BA, 0x57E2, 0x88BB,
00828     0x57E3, 0x88BC, 0x57E4, 0xDBFD, 0x57E5, 0x88BD, 0x57E6, 0x88BE,
00829     0x57E7, 0x88BF, 0x57E8, 0x88C0, 0x57E9, 0x88C1, 0x57EA, 0x88C2,
00830     0x57EB, 0x88C3, 0x57EC, 0x88C4, 0x57ED, 0xDCA4, 0x57EE, 0x88C5,
00831     0x57EF, 0xDBFB, 0x57F0, 0x88C6, 0x57F1, 0x88C7, 0x57F2, 0x88C8,
00832     0x57F3, 0x88C9, 0x57F4, 0xDBFA, 0x57F5, 0x88CA, 0x57F6, 0x88CB,
00833     0x57F7, 0x88CC, 0x57F8, 0xDBFC, 0x57F9, 0xC5E0, 0x57FA, 0xBBF9,
00834     0x57FB, 0x88CD, 0x57FC, 0x88CE, 0x57FD, 0xDCA3, 0x57FE, 0x88CF,
00835     0x57FF, 0x88D0, 0x5800, 0xDCA5, 0x5801, 0x88D1, 0x5802, 0xCCC3,
00836     0x5803, 0x88D2, 0x5804, 0x88D3, 0x5805, 0x88D4, 0x5806, 0xB6D1,
00837     0x5807, 0xDDC0, 0x5808, 0x88D5, 0x5809, 0x88D6, 0x580A, 0x88D7,
00838     0x580B, 0xDCA1, 0x580C, 0x88D8, 0x580D, 0xDCA2, 0x580E, 0x88D9,
00839     0x580F, 0x88DA, 0x5810, 0x88DB, 0x5811, 0xC7B5, 0x5812, 0x88DC,
00840     0x5813, 0x88DD, 0x5814, 0x88DE, 0x5815, 0xB6E9, 0x5816, 0x88DF,
00841     0x5817, 0x88E0, 0x5818, 0x88E1, 0x5819, 0xDCA7, 0x581A, 0x88E2,
00842     0x581B, 0x88E3, 0x581C, 0x88E4, 0x581D, 0x88E5, 0x581E, 0xDCA6,
00843     0x581F, 0x88E6, 0x5820, 0xDCA9, 0x5821, 0xB1A4, 0x5822, 0x88E7,
00844     0x5823, 0x88E8, 0x5824, 0xB5CC, 0x5825, 0x88E9, 0x5826, 0x88EA,
00845     0x5827, 0x88EB, 0x5828, 0x88EC, 0x5829, 0x88ED, 0x582A, 0xBFB0,
00846     0x582B, 0x88EE, 0x582C, 0x88EF, 0x582D, 0x88F0, 0x582E, 0x88F1,
00847     0x582F, 0x88F2, 0x5830, 0xD1DF, 0x5831, 0x88F3, 0x5832, 0x88F4,
00848     0x5833, 0x88F5, 0x5834, 0x88F6, 0x5835, 0xB6C2, 0x5836, 0x88F7,
00849     0x5837, 0x88F8, 0x5838, 0x88F9, 0x5839, 0x88FA, 0x583A, 0x88FB,
00850     0x583B, 0x88FC, 0x583C, 0x88FD, 0x583D, 0x88FE, 0x583E, 0x8940,
00851     0x583F, 0x8941, 0x5840, 0x8942, 0x5841, 0x8943, 0x5842, 0x8944,
00852     0x5843, 0x8945, 0x5844, 0xDCA8, 0x5845, 0x8946, 0x5846, 0x8947,
00853     0x5847, 0x8948, 0x5848, 0x8949, 0x5849, 0x894A, 0x584A, 0x894B,
00854     0x584B, 0x894C, 0x584C, 0xCBFA, 0x584D, 0xEBF3, 0x584E, 0x894D,
00855     0x584F, 0x894E, 0x5850, 0x894F, 0x5851, 0xCBDC, 0x5852, 0x8950,
00856     0x5853, 0x8951, 0x5854, 0xCBFE, 0x5855, 0x8952, 0x5856, 0x8953,
00857     0x5857, 0x8954, 0x5858, 0xCCC1, 0x5859, 0x8955, 0x585A, 0x8956,
00858     0x585B, 0x8957, 0x585C, 0x8958, 0x585D, 0x8959, 0x585E, 0xC8FB,
00859     0x585F, 0x895A, 0x5860, 0x895B, 0x5861, 0x895C, 0x5862, 0x895D,
00860     0x5863, 0x895E, 0x5864, 0x895F, 0x5865, 0xDCAA, 0x5866, 0x8960,
00861     0x5867, 0x8961, 0x5868, 0x8962, 0x5869, 0x8963, 0x586A, 0x8964,
00862     0x586B, 0xCCEE, 0x586C, 0xDCAB, 0x586D, 0x8965, 0x586E, 0x8966,
00863     0x586F, 0x8967, 0x5870, 0x8968, 0x5871, 0x8969, 0x5872, 0x896A,
00864     0x5873, 0x896B, 0x5874, 0x896C, 0x5875, 0x896D, 0x5876, 0x896E,
00865     0x5877, 0x896F, 0x5878, 0x8970, 0x5879, 0x8971, 0x587A, 0x8972,
00866     0x587B, 0x8973, 0x587C, 0x8974, 0x587D, 0x8975, 0x587E, 0xDBD3,
00867     0x587F, 0x8976, 0x5880, 0xDCAF, 0x5881, 0xDCAC, 0x5882, 0x8977,
00868     0x5883, 0xBEB3, 0x5884, 0x8978, 0x5885, 0xCAFB, 0x5886, 0x8979,
00869     0x5887, 0x897A, 0x5888, 0x897B, 0x5889, 0xDCAD, 0x588A, 0x897C,
00870     0x588B, 0x897D, 0x588C, 0x897E, 0x588D, 0x8980, 0x588E, 0x8981,
00871     0x588F, 0x8982, 0x5890, 0x8983, 0x5891, 0x8984, 0x5892, 0xC9CA,
00872     0x5893, 0xC4B9, 0x5894, 0x8985, 0x5895, 0x8986, 0x5896, 0x8987,
00873     0x5897, 0x8988, 0x5898, 0x8989, 0x5899, 0xC7BD, 0x589A, 0xDCAE,
00874     0x589B, 0x898A, 0x589C, 0x898B, 0x589D, 0x898C, 0x589E, 0xD4F6,
00875     0x589F, 0xD0E6, 0x58A0, 0x898D, 0x58A1, 0x898E, 0x58A2, 0x898F,
00876     0x58A3, 0x8990, 0x58A4, 0x8991, 0x58A5, 0x8992, 0x58A6, 0x8993,
00877     0x58A7, 0x8994, 0x58A8, 0xC4AB, 0x58A9, 0xB6D5, 0x58AA, 0x8995,
00878     0x58AB, 0x8996, 0x58AC, 0x8997, 0x58AD, 0x8998, 0x58AE, 0x8999,
00879     0x58AF, 0x899A, 0x58B0, 0x899B, 0x58B1, 0x899C, 0x58B2, 0x899D,
00880     0x58B3, 0x899E, 0x58B4, 0x899F, 0x58B5, 0x89A0, 0x58B6, 0x89A1,
00881     0x58B7, 0x89A2, 0x58B8, 0x89A3, 0x58B9, 0x89A4, 0x58BA, 0x89A5,
00882     0x58BB, 0x89A6, 0x58BC, 0xDBD4, 0x58BD, 0x89A7, 0x58BE, 0x89A8,
00883     0x58BF, 0x89A9, 0x58C0, 0x89AA, 0x58C1, 0xB1DA, 0x58C2, 0x89AB,
00884     0x58C3, 0x89AC, 0x58C4, 0x89AD, 0x58C5, 0xDBD5, 0x58C6, 0x89AE,
00885     0x58C7, 0x89AF, 0x58C8, 0x89B0, 0x58C9, 0x89B1, 0x58CA, 0x89B2,
00886     0x58CB, 0x89B3, 0x58CC, 0x89B4, 0x58CD, 0x89B5, 0x58CE, 0x89B6,
00887     0x58CF, 0x89B7, 0x58D0, 0x89B8, 0x58D1, 0xDBD6, 0x58D2, 0x89B9,
00888     0x58D3, 0x89BA, 0x58D4, 0x89BB, 0x58D5, 0xBABE, 0x58D6, 0x89BC,
00889     0x58D7, 0x89BD, 0x58D8, 0x89BE, 0x58D9, 0x89BF, 0x58DA, 0x89C0,
00890     0x58DB, 0x89C1, 0x58DC, 0x89C2, 0x58DD, 0x89C3, 0x58DE, 0x89C4,
00891     0x58DF, 0x89C5, 0x58E0, 0x89C6, 0x58E1, 0x89C7, 0x58E2, 0x89C8,
00892     0x58E3, 0x89C9, 0x58E4, 0xC8C0, 0x58E5, 0x89CA, 0x58E6, 0x89CB,
00893     0x58E7, 0x89CC, 0x58E8, 0x89CD, 0x58E9, 0x89CE, 0x58EA, 0x89CF,
00894     0x58EB, 0xCABF, 0x58EC, 0xC8C9, 0x58ED, 0x89D0, 0x58EE, 0xD7B3,
00895     0x58EF, 0x89D1, 0x58F0, 0xC9F9, 0x58F1, 0x89D2, 0x58F2, 0x89D3,
00896     0x58F3, 0xBFC7, 0x58F4, 0x89D4, 0x58F5, 0x89D5, 0x58F6, 0xBAF8,
00897     0x58F7, 0x89D6, 0x58F8, 0x89D7, 0x58F9, 0xD2BC, 0x58FA, 0x89D8,
00898     0x58FB, 0x89D9, 0x58FC, 0x89DA, 0x58FD, 0x89DB, 0x58FE, 0x89DC,
00899     0x58FF, 0x89DD, 0x5900, 0x89DE, 0x5901, 0x89DF, 0x5902, 0xE2BA,
00900     0x5903, 0x89E0, 0x5904, 0xB4A6, 0x5905, 0x89E1, 0x5906, 0x89E2,
00901     0x5907, 0xB1B8, 0x5908, 0x89E3, 0x5909, 0x89E4, 0x590A, 0x89E5,
00902     0x590B, 0x89E6, 0x590C, 0x89E7, 0x590D, 0xB8B4, 0x590E, 0x89E8,
00903     0x590F, 0xCFC4, 0x5910, 0x89E9, 0x5911, 0x89EA, 0x5912, 0x89EB,
00904     0x5913, 0x89EC, 0x5914, 0xD9E7, 0x5915, 0xCFA6, 0x5916, 0xCDE2,
00905     0x5917, 0x89ED, 0x5918, 0x89EE, 0x5919, 0xD9ED, 0x591A, 0xB6E0,
00906     0x591B, 0x89EF, 0x591C, 0xD2B9, 0x591D, 0x89F0, 0x591E, 0x89F1,
00907     0x591F, 0xB9BB, 0x5920, 0x89F2, 0x5921, 0x89F3, 0x5922, 0x89F4,
00908     0x5923, 0x89F5, 0x5924, 0xE2B9, 0x5925, 0xE2B7, 0x5926, 0x89F6,
00909     0x5927, 0xB4F3, 0x5928, 0x89F7, 0x5929, 0xCCEC, 0x592A, 0xCCAB,
00910     0x592B, 0xB7F2, 0x592C, 0x89F8, 0x592D, 0xD8B2, 0x592E, 0xD1EB,
00911     0x592F, 0xBABB, 0x5930, 0x89F9, 0x5931, 0xCAA7, 0x5932, 0x89FA,
00912     0x5933, 0x89FB, 0x5934, 0xCDB7, 0x5935, 0x89FC, 0x5936, 0x89FD,
00913     0x5937, 0xD2C4, 0x5938, 0xBFE4, 0x5939, 0xBCD0, 0x593A, 0xB6E1,
00914     0x593B, 0x89FE, 0x593C, 0xDEC5, 0x593D, 0x8A40, 0x593E, 0x8A41,
00915     0x593F, 0x8A42, 0x5940, 0x8A43, 0x5941, 0xDEC6, 0x5942, 0xDBBC,
00916     0x5943, 0x8A44, 0x5944, 0xD1D9, 0x5945, 0x8A45, 0x5946, 0x8A46,
00917     0x5947, 0xC6E6, 0x5948, 0xC4CE, 0x5949, 0xB7EE, 0x594A, 0x8A47,
00918     0x594B, 0xB7DC, 0x594C, 0x8A48, 0x594D, 0x8A49, 0x594E, 0xBFFC,
00919     0x594F, 0xD7E0, 0x5950, 0x8A4A, 0x5951, 0xC6F5, 0x5952, 0x8A4B,
00920     0x5953, 0x8A4C, 0x5954, 0xB1BC, 0x5955, 0xDEC8, 0x5956, 0xBDB1,
00921     0x5957, 0xCCD7, 0x5958, 0xDECA, 0x5959, 0x8A4D, 0x595A, 0xDEC9,
00922     0x595B, 0x8A4E, 0x595C, 0x8A4F, 0x595D, 0x8A50, 0x595E, 0x8A51,
00923     0x595F, 0x8A52, 0x5960, 0xB5EC, 0x5961, 0x8A53, 0x5962, 0xC9DD,
00924     0x5963, 0x8A54, 0x5964, 0x8A55, 0x5965, 0xB0C2, 0x5966, 0x8A56,
00925     0x5967, 0x8A57, 0x5968, 0x8A58, 0x5969, 0x8A59, 0x596A, 0x8A5A,
00926     0x596B, 0x8A5B, 0x596C, 0x8A5C, 0x596D, 0x8A5D, 0x596E, 0x8A5E,
00927     0x596F, 0x8A5F, 0x5970, 0x8A60, 0x5971, 0x8A61, 0x5972, 0x8A62,
00928     0x5973, 0xC5AE, 0x5974, 0xC5AB, 0x5975, 0x8A63, 0x5976, 0xC4CC,
00929     0x5977, 0x8A64, 0x5978, 0xBCE9, 0x5979, 0xCBFD, 0x597A, 0x8A65,
00930     0x597B, 0x8A66, 0x597C, 0x8A67, 0x597D, 0xBAC3, 0x597E, 0x8A68,
00931     0x597F, 0x8A69, 0x5980, 0x8A6A, 0x5981, 0xE5F9, 0x5982, 0xC8E7,
00932     0x5983, 0xE5FA, 0x5984, 0xCDFD, 0x5985, 0x8A6B, 0x5986, 0xD7B1,
00933     0x5987, 0xB8BE, 0x5988, 0xC2E8, 0x5989, 0x8A6C, 0x598A, 0xC8D1,
00934     0x598B, 0x8A6D, 0x598C, 0x8A6E, 0x598D, 0xE5FB, 0x598E, 0x8A6F,
00935     0x598F, 0x8A70, 0x5990, 0x8A71, 0x5991, 0x8A72, 0x5992, 0xB6CA,
00936     0x5993, 0xBCCB, 0x5994, 0x8A73, 0x5995, 0x8A74, 0x5996, 0xD1FD,
00937     0x5997, 0xE6A1, 0x5998, 0x8A75, 0x5999, 0xC3EE, 0x599A, 0x8A76,
00938     0x599B, 0x8A77, 0x599C, 0x8A78, 0x599D, 0x8A79, 0x599E, 0xE6A4,
00939     0x599F, 0x8A7A, 0x59A0, 0x8A7B, 0x59A1, 0x8A7C, 0x59A2, 0x8A7D,
00940     0x59A3, 0xE5FE, 0x59A4, 0xE6A5, 0x59A5, 0xCDD7, 0x59A6, 0x8A7E,
00941     0x59A7, 0x8A80, 0x59A8, 0xB7C1, 0x59A9, 0xE5FC, 0x59AA, 0xE5FD,
00942     0x59AB, 0xE6A3, 0x59AC, 0x8A81, 0x59AD, 0x8A82, 0x59AE, 0xC4DD,
00943     0x59AF, 0xE6A8, 0x59B0, 0x8A83, 0x59B1, 0x8A84, 0x59B2, 0xE6A7,
00944     0x59B3, 0x8A85, 0x59B4, 0x8A86, 0x59B5, 0x8A87, 0x59B6, 0x8A88,
00945     0x59B7, 0x8A89, 0x59B8, 0x8A8A, 0x59B9, 0xC3C3, 0x59BA, 0x8A8B,
00946     0x59BB, 0xC6DE, 0x59BC, 0x8A8C, 0x59BD, 0x8A8D, 0x59BE, 0xE6AA,
00947     0x59BF, 0x8A8E, 0x59C0, 0x8A8F, 0x59C1, 0x8A90, 0x59C2, 0x8A91,
00948     0x59C3, 0x8A92, 0x59C4, 0x8A93, 0x59C5, 0x8A94, 0x59C6, 0xC4B7,
00949     0x59C7, 0x8A95, 0x59C8, 0x8A96, 0x59C9, 0x8A97, 0x59CA, 0xE6A2,
00950     0x59CB, 0xCABC, 0x59CC, 0x8A98, 0x59CD, 0x8A99, 0x59CE, 0x8A9A,
00951     0x59CF, 0x8A9B, 0x59D0, 0xBDE3, 0x59D1, 0xB9C3, 0x59D2, 0xE6A6,
00952     0x59D3, 0xD0D5, 0x59D4, 0xCEAF, 0x59D5, 0x8A9C, 0x59D6, 0x8A9D,
00953     0x59D7, 0xE6A9, 0x59D8, 0xE6B0, 0x59D9, 0x8A9E, 0x59DA, 0xD2A6,
00954     0x59DB, 0x8A9F, 0x59DC, 0xBDAA, 0x59DD, 0xE6AD, 0x59DE, 0x8AA0,
00955     0x59DF, 0x8AA1, 0x59E0, 0x8AA2, 0x59E1, 0x8AA3, 0x59E2, 0x8AA4,
00956     0x59E3, 0xE6AF, 0x59E4, 0x8AA5, 0x59E5, 0xC0D1, 0x59E6, 0x8AA6,
00957     0x59E7, 0x8AA7, 0x59E8, 0xD2CC, 0x59E9, 0x8AA8, 0x59EA, 0x8AA9,
00958     0x59EB, 0x8AAA, 0x59EC, 0xBCA7, 0x59ED, 0x8AAB, 0x59EE, 0x8AAC,
00959     0x59EF, 0x8AAD, 0x59F0, 0x8AAE, 0x59F1, 0x8AAF, 0x59F2, 0x8AB0,
00960     0x59F3, 0x8AB1, 0x59F4, 0x8AB2, 0x59F5, 0x8AB3, 0x59F6, 0x8AB4,
00961     0x59F7, 0x8AB5, 0x59F8, 0x8AB6, 0x59F9, 0xE6B1, 0x59FA, 0x8AB7,
00962     0x59FB, 0xD2F6, 0x59FC, 0x8AB8, 0x59FD, 0x8AB9, 0x59FE, 0x8ABA,
00963     0x59FF, 0xD7CB, 0x5A00, 0x8ABB, 0x5A01, 0xCDFE, 0x5A02, 0x8ABC,
00964     0x5A03, 0xCDDE, 0x5A04, 0xC2A6, 0x5A05, 0xE6AB, 0x5A06, 0xE6AC,
00965     0x5A07, 0xBDBF, 0x5A08, 0xE6AE, 0x5A09, 0xE6B3, 0x5A0A, 0x8ABD,
00966     0x5A0B, 0x8ABE, 0x5A0C, 0xE6B2, 0x5A0D, 0x8ABF, 0x5A0E, 0x8AC0,
00967     0x5A0F, 0x8AC1, 0x5A10, 0x8AC2, 0x5A11, 0xE6B6, 0x5A12, 0x8AC3,
00968     0x5A13, 0xE6B8, 0x5A14, 0x8AC4, 0x5A15, 0x8AC5, 0x5A16, 0x8AC6,
00969     0x5A17, 0x8AC7, 0x5A18, 0xC4EF, 0x5A19, 0x8AC8, 0x5A1A, 0x8AC9,
00970     0x5A1B, 0x8ACA, 0x5A1C, 0xC4C8, 0x5A1D, 0x8ACB, 0x5A1E, 0x8ACC,
00971     0x5A1F, 0xBEEA, 0x5A20, 0xC9EF, 0x5A21, 0x8ACD, 0x5A22, 0x8ACE,
00972     0x5A23, 0xE6B7, 0x5A24, 0x8ACF, 0x5A25, 0xB6F0, 0x5A26, 0x8AD0,
00973     0x5A27, 0x8AD1, 0x5A28, 0x8AD2, 0x5A29, 0xC3E4, 0x5A2A, 0x8AD3,
00974     0x5A2B, 0x8AD4, 0x5A2C, 0x8AD5, 0x5A2D, 0x8AD6, 0x5A2E, 0x8AD7,
00975     0x5A2F, 0x8AD8, 0x5A30, 0x8AD9, 0x5A31, 0xD3E9, 0x5A32, 0xE6B4,
00976     0x5A33, 0x8ADA, 0x5A34, 0xE6B5, 0x5A35, 0x8ADB, 0x5A36, 0xC8A2,
00977     0x5A37, 0x8ADC, 0x5A38, 0x8ADD, 0x5A39, 0x8ADE, 0x5A3A, 0x8ADF,
00978     0x5A3B, 0x8AE0, 0x5A3C, 0xE6BD, 0x5A3D, 0x8AE1, 0x5A3E, 0x8AE2,
00979     0x5A3F, 0x8AE3, 0x5A40, 0xE6B9, 0x5A41, 0x8AE4, 0x5A42, 0x8AE5,
00980     0x5A43, 0x8AE6, 0x5A44, 0x8AE7, 0x5A45, 0x8AE8, 0x5A46, 0xC6C5,
00981     0x5A47, 0x8AE9, 0x5A48, 0x8AEA, 0x5A49, 0xCDF1, 0x5A4A, 0xE6BB,
00982     0x5A4B, 0x8AEB, 0x5A4C, 0x8AEC, 0x5A4D, 0x8AED, 0x5A4E, 0x8AEE,
00983     0x5A4F, 0x8AEF, 0x5A50, 0x8AF0, 0x5A51, 0x8AF1, 0x5A52, 0x8AF2,
00984     0x5A53, 0x8AF3, 0x5A54, 0x8AF4, 0x5A55, 0xE6BC, 0x5A56, 0x8AF5,
00985     0x5A57, 0x8AF6, 0x5A58, 0x8AF7, 0x5A59, 0x8AF8, 0x5A5A, 0xBBE9,
00986     0x5A5B, 0x8AF9, 0x5A5C, 0x8AFA, 0x5A5D, 0x8AFB, 0x5A5E, 0x8AFC,
00987     0x5A5F, 0x8AFD, 0x5A60, 0x8AFE, 0x5A61, 0x8B40, 0x5A62, 0xE6BE,
00988     0x5A63, 0x8B41, 0x5A64, 0x8B42, 0x5A65, 0x8B43, 0x5A66, 0x8B44,
00989     0x5A67, 0xE6BA, 0x5A68, 0x8B45, 0x5A69, 0x8B46, 0x5A6A, 0xC0B7,
00990     0x5A6B, 0x8B47, 0x5A6C, 0x8B48, 0x5A6D, 0x8B49, 0x5A6E, 0x8B4A,
00991     0x5A6F, 0x8B4B, 0x5A70, 0x8B4C, 0x5A71, 0x8B4D, 0x5A72, 0x8B4E,
00992     0x5A73, 0x8B4F, 0x5A74, 0xD3A4, 0x5A75, 0xE6BF, 0x5A76, 0xC9F4,
00993     0x5A77, 0xE6C3, 0x5A78, 0x8B50, 0x5A79, 0x8B51, 0x5A7A, 0xE6C4,
00994     0x5A7B, 0x8B52, 0x5A7C, 0x8B53, 0x5A7D, 0x8B54, 0x5A7E, 0x8B55,
00995     0x5A7F, 0xD0F6, 0x5A80, 0x8B56, 0x5A81, 0x8B57, 0x5A82, 0x8B58,
00996     0x5A83, 0x8B59, 0x5A84, 0x8B5A, 0x5A85, 0x8B5B, 0x5A86, 0x8B5C,
00997     0x5A87, 0x8B5D, 0x5A88, 0x8B5E, 0x5A89, 0x8B5F, 0x5A8A, 0x8B60,
00998     0x5A8B, 0x8B61, 0x5A8C, 0x8B62, 0x5A8D, 0x8B63, 0x5A8E, 0x8B64,
00999     0x5A8F, 0x8B65, 0x5A90, 0x8B66, 0x5A91, 0x8B67, 0x5A92, 0xC3BD,
01000     0x5A93, 0x8B68, 0x5A94, 0x8B69, 0x5A95, 0x8B6A, 0x5A96, 0x8B6B,
01001     0x5A97, 0x8B6C, 0x5A98, 0x8B6D, 0x5A99, 0x8B6E, 0x5A9A, 0xC3C4,
01002     0x5A9B, 0xE6C2, 0x5A9C, 0x8B6F, 0x5A9D, 0x8B70, 0x5A9E, 0x8B71,
01003     0x5A9F, 0x8B72, 0x5AA0, 0x8B73, 0x5AA1, 0x8B74, 0x5AA2, 0x8B75,
01004     0x5AA3, 0x8B76, 0x5AA4, 0x8B77, 0x5AA5, 0x8B78, 0x5AA6, 0x8B79,
01005     0x5AA7, 0x8B7A, 0x5AA8, 0x8B7B, 0x5AA9, 0x8B7C, 0x5AAA, 0xE6C1,
01006     0x5AAB, 0x8B7D, 0x5AAC, 0x8B7E, 0x5AAD, 0x8B80, 0x5AAE, 0x8B81,
01007     0x5AAF, 0x8B82, 0x5AB0, 0x8B83, 0x5AB1, 0x8B84, 0x5AB2, 0xE6C7,
01008     0x5AB3, 0xCFB1, 0x5AB4, 0x8B85, 0x5AB5, 0xEBF4, 0x5AB6, 0x8B86,
01009     0x5AB7, 0x8B87, 0x5AB8, 0xE6CA, 0x5AB9, 0x8B88, 0x5ABA, 0x8B89,
01010     0x5ABB, 0x8B8A, 0x5ABC, 0x8B8B, 0x5ABD, 0x8B8C, 0x5ABE, 0xE6C5,
01011     0x5ABF, 0x8B8D, 0x5AC0, 0x8B8E, 0x5AC1, 0xBCDE, 0x5AC2, 0xC9A9,
01012     0x5AC3, 0x8B8F, 0x5AC4, 0x8B90, 0x5AC5, 0x8B91, 0x5AC6, 0x8B92,
01013     0x5AC7, 0x8B93, 0x5AC8, 0x8B94, 0x5AC9, 0xBCB5, 0x5ACA, 0x8B95,
01014     0x5ACB, 0x8B96, 0x5ACC, 0xCFD3, 0x5ACD, 0x8B97, 0x5ACE, 0x8B98,
01015     0x5ACF, 0x8B99, 0x5AD0, 0x8B9A, 0x5AD1, 0x8B9B, 0x5AD2, 0xE6C8,
01016     0x5AD3, 0x8B9C, 0x5AD4, 0xE6C9, 0x5AD5, 0x8B9D, 0x5AD6, 0xE6CE,
01017     0x5AD7, 0x8B9E, 0x5AD8, 0xE6D0, 0x5AD9, 0x8B9F, 0x5ADA, 0x8BA0,
01018     0x5ADB, 0x8BA1, 0x5ADC, 0xE6D1, 0x5ADD, 0x8BA2, 0x5ADE, 0x8BA3,
01019     0x5ADF, 0x8BA4, 0x5AE0, 0xE6CB, 0x5AE1, 0xB5D5, 0x5AE2, 0x8BA5,
01020     0x5AE3, 0xE6CC, 0x5AE4, 0x8BA6, 0x5AE5, 0x8BA7, 0x5AE6, 0xE6CF,
01021     0x5AE7, 0x8BA8, 0x5AE8, 0x8BA9, 0x5AE9, 0xC4DB, 0x5AEA, 0x8BAA,
01022     0x5AEB, 0xE6C6, 0x5AEC, 0x8BAB, 0x5AED, 0x8BAC, 0x5AEE, 0x8BAD,
01023     0x5AEF, 0x8BAE, 0x5AF0, 0x8BAF, 0x5AF1, 0xE6CD, 0x5AF2, 0x8BB0,
01024     0x5AF3, 0x8BB1, 0x5AF4, 0x8BB2, 0x5AF5, 0x8BB3, 0x5AF6, 0x8BB4,
01025     0x5AF7, 0x8BB5, 0x5AF8, 0x8BB6, 0x5AF9, 0x8BB7, 0x5AFA, 0x8BB8,
01026     0x5AFB, 0x8BB9, 0x5AFC, 0x8BBA, 0x5AFD, 0x8BBB, 0x5AFE, 0x8BBC,
01027     0x5AFF, 0x8BBD, 0x5B00, 0x8BBE, 0x5B01, 0x8BBF, 0x5B02, 0x8BC0,
01028     0x5B03, 0x8BC1, 0x5B04, 0x8BC2, 0x5B05, 0x8BC3, 0x5B06, 0x8BC4,
01029     0x5B07, 0x8BC5, 0x5B08, 0x8BC6, 0x5B09, 0xE6D2, 0x5B0A, 0x8BC7,
01030     0x5B0B, 0x8BC8, 0x5B0C, 0x8BC9, 0x5B0D, 0x8BCA, 0x5B0E, 0x8BCB,
01031     0x5B0F, 0x8BCC, 0x5B10, 0x8BCD, 0x5B11, 0x8BCE, 0x5B12, 0x8BCF,
01032     0x5B13, 0x8BD0, 0x5B14, 0x8BD1, 0x5B15, 0x8BD2, 0x5B16, 0xE6D4,
01033     0x5B17, 0xE6D3, 0x5B18, 0x8BD3, 0x5B19, 0x8BD4, 0x5B1A, 0x8BD5,
01034     0x5B1B, 0x8BD6, 0x5B1C, 0x8BD7, 0x5B1D, 0x8BD8, 0x5B1E, 0x8BD9,
01035     0x5B1F, 0x8BDA, 0x5B20, 0x8BDB, 0x5B21, 0x8BDC, 0x5B22, 0x8BDD,
01036     0x5B23, 0x8BDE, 0x5B24, 0x8BDF, 0x5B25, 0x8BE0, 0x5B26, 0x8BE1,
01037     0x5B27, 0x8BE2, 0x5B28, 0x8BE3, 0x5B29, 0x8BE4, 0x5B2A, 0x8BE5,
01038     0x5B2B, 0x8BE6, 0x5B2C, 0x8BE7, 0x5B2D, 0x8BE8, 0x5B2E, 0x8BE9,
01039     0x5B2F, 0x8BEA, 0x5B30, 0x8BEB, 0x5B31, 0x8BEC, 0x5B32, 0xE6D5,
01040     0x5B33, 0x8BED, 0x5B34, 0xD9F8, 0x5B35, 0x8BEE, 0x5B36, 0x8BEF,
01041     0x5B37, 0xE6D6, 0x5B38, 0x8BF0, 0x5B39, 0x8BF1, 0x5B3A, 0x8BF2,
01042     0x5B3B, 0x8BF3, 0x5B3C, 0x8BF4, 0x5B3D, 0x8BF5, 0x5B3E, 0x8BF6,
01043     0x5B3F, 0x8BF7, 0x5B40, 0xE6D7, 0x5B41, 0x8BF8, 0x5B42, 0x8BF9,
01044     0x5B43, 0x8BFA, 0x5B44, 0x8BFB, 0x5B45, 0x8BFC, 0x5B46, 0x8BFD,
01045     0x5B47, 0x8BFE, 0x5B48, 0x8C40, 0x5B49, 0x8C41, 0x5B4A, 0x8C42,
01046     0x5B4B, 0x8C43, 0x5B4C, 0x8C44, 0x5B4D, 0x8C45, 0x5B4E, 0x8C46,
01047     0x5B4F, 0x8C47, 0x5B50, 0xD7D3, 0x5B51, 0xE6DD, 0x5B52, 0x8C48,
01048     0x5B53, 0xE6DE, 0x5B54, 0xBFD7, 0x5B55, 0xD4D0, 0x5B56, 0x8C49,
01049     0x5B57, 0xD7D6, 0x5B58, 0xB4E6, 0x5B59, 0xCBEF, 0x5B5A, 0xE6DA,
01050     0x5B5B, 0xD8C3, 0x5B5C, 0xD7CE, 0x5B5D, 0xD0A2, 0x5B5E, 0x8C4A,
01051     0x5B5F, 0xC3CF, 0x5B60, 0x8C4B, 0x5B61, 0x8C4C, 0x5B62, 0xE6DF,
01052     0x5B63, 0xBCBE, 0x5B64, 0xB9C2, 0x5B65, 0xE6DB, 0x5B66, 0xD1A7,
01053     0x5B67, 0x8C4D, 0x5B68, 0x8C4E, 0x5B69, 0xBAA2, 0x5B6A, 0xC2CF,
01054     0x5B6B, 0x8C4F, 0x5B6C, 0xD8AB, 0x5B6D, 0x8C50, 0x5B6E, 0x8C51,
01055     0x5B6F, 0x8C52, 0x5B70, 0xCAEB, 0x5B71, 0xE5EE, 0x5B72, 0x8C53,
01056     0x5B73, 0xE6DC, 0x5B74, 0x8C54, 0x5B75, 0xB7F5, 0x5B76, 0x8C55,
01057     0x5B77, 0x8C56, 0x5B78, 0x8C57, 0x5B79, 0x8C58, 0x5B7A, 0xC8E6,
01058     0x5B7B, 0x8C59, 0x5B7C, 0x8C5A, 0x5B7D, 0xC4F5, 0x5B7E, 0x8C5B,
01059     0x5B7F, 0x8C5C, 0x5B80, 0xE5B2, 0x5B81, 0xC4FE, 0x5B82, 0x8C5D,
01060     0x5B83, 0xCBFC, 0x5B84, 0xE5B3, 0x5B85, 0xD5AC, 0x5B86, 0x8C5E,
01061     0x5B87, 0xD3EE, 0x5B88, 0xCAD8, 0x5B89, 0xB0B2, 0x5B8A, 0x8C5F,
01062     0x5B8B, 0xCBCE, 0x5B8C, 0xCDEA, 0x5B8D, 0x8C60, 0x5B8E, 0x8C61,
01063     0x5B8F, 0xBAEA, 0x5B90, 0x8C62, 0x5B91, 0x8C63, 0x5B92, 0x8C64,
01064     0x5B93, 0xE5B5, 0x5B94, 0x8C65, 0x5B95, 0xE5B4, 0x5B96, 0x8C66,
01065     0x5B97, 0xD7DA, 0x5B98, 0xB9D9, 0x5B99, 0xD6E6, 0x5B9A, 0xB6A8,
01066     0x5B9B, 0xCDF0, 0x5B9C, 0xD2CB, 0x5B9D, 0xB1A6, 0x5B9E, 0xCAB5,
01067     0x5B9F, 0x8C67, 0x5BA0, 0xB3E8, 0x5BA1, 0xC9F3, 0x5BA2, 0xBFCD,
01068     0x5BA3, 0xD0FB, 0x5BA4, 0xCAD2, 0x5BA5, 0xE5B6, 0x5BA6, 0xBBC2,
01069     0x5BA7, 0x8C68, 0x5BA8, 0x8C69, 0x5BA9, 0x8C6A, 0x5BAA, 0xCFDC,
01070     0x5BAB, 0xB9AC, 0x5BAC, 0x8C6B, 0x5BAD, 0x8C6C, 0x5BAE, 0x8C6D,
01071     0x5BAF, 0x8C6E, 0x5BB0, 0xD4D7, 0x5BB1, 0x8C6F, 0x5BB2, 0x8C70,
01072     0x5BB3, 0xBAA6, 0x5BB4, 0xD1E7, 0x5BB5, 0xCFFC, 0x5BB6, 0xBCD2,
01073     0x5BB7, 0x8C71, 0x5BB8, 0xE5B7, 0x5BB9, 0xC8DD, 0x5BBA, 0x8C72,
01074     0x5BBB, 0x8C73, 0x5BBC, 0x8C74, 0x5BBD, 0xBFED, 0x5BBE, 0xB1F6,
01075     0x5BBF, 0xCBDE, 0x5BC0, 0x8C75, 0x5BC1, 0x8C76, 0x5BC2, 0xBCC5,
01076     0x5BC3, 0x8C77, 0x5BC4, 0xBCC4, 0x5BC5, 0xD2FA, 0x5BC6, 0xC3DC,
01077     0x5BC7, 0xBFDC, 0x5BC8, 0x8C78, 0x5BC9, 0x8C79, 0x5BCA, 0x8C7A,
01078     0x5BCB, 0x8C7B, 0x5BCC, 0xB8BB, 0x5BCD, 0x8C7C, 0x5BCE, 0x8C7D,
01079     0x5BCF, 0x8C7E, 0x5BD0, 0xC3C2, 0x5BD1, 0x8C80, 0x5BD2, 0xBAAE,
01080     0x5BD3, 0xD4A2, 0x5BD4, 0x8C81, 0x5BD5, 0x8C82, 0x5BD6, 0x8C83,
01081     0x5BD7, 0x8C84, 0x5BD8, 0x8C85, 0x5BD9, 0x8C86, 0x5BDA, 0x8C87,
01082     0x5BDB, 0x8C88, 0x5BDC, 0x8C89, 0x5BDD, 0xC7DE, 0x5BDE, 0xC4AF,
01083     0x5BDF, 0xB2EC, 0x5BE0, 0x8C8A, 0x5BE1, 0xB9D1, 0x5BE2, 0x8C8B,
01084     0x5BE3, 0x8C8C, 0x5BE4, 0xE5BB, 0x5BE5, 0xC1C8, 0x5BE6, 0x8C8D,
01085     0x5BE7, 0x8C8E, 0x5BE8, 0xD5AF, 0x5BE9, 0x8C8F, 0x5BEA, 0x8C90,
01086     0x5BEB, 0x8C91, 0x5BEC, 0x8C92, 0x5BED, 0x8C93, 0x5BEE, 0xE5BC,
01087     0x5BEF, 0x8C94, 0x5BF0, 0xE5BE, 0x5BF1, 0x8C95, 0x5BF2, 0x8C96,
01088     0x5BF3, 0x8C97, 0x5BF4, 0x8C98, 0x5BF5, 0x8C99, 0x5BF6, 0x8C9A,
01089     0x5BF7, 0x8C9B, 0x5BF8, 0xB4E7, 0x5BF9, 0xB6D4, 0x5BFA, 0xCBC2,
01090     0x5BFB, 0xD1B0, 0x5BFC, 0xB5BC, 0x5BFD, 0x8C9C, 0x5BFE, 0x8C9D,
01091     0x5BFF, 0xCAD9, 0x5C00, 0x8C9E, 0x5C01, 0xB7E2, 0x5C02, 0x8C9F,
01092     0x5C03, 0x8CA0, 0x5C04, 0xC9E4, 0x5C05, 0x8CA1, 0x5C06, 0xBDAB,
01093     0x5C07, 0x8CA2, 0x5C08, 0x8CA3, 0x5C09, 0xCEBE, 0x5C0A, 0xD7F0,
01094     0x5C0B, 0x8CA4, 0x5C0C, 0x8CA5, 0x5C0D, 0x8CA6, 0x5C0E, 0x8CA7,
01095     0x5C0F, 0xD0A1, 0x5C10, 0x8CA8, 0x5C11, 0xC9D9, 0x5C12, 0x8CA9,
01096     0x5C13, 0x8CAA, 0x5C14, 0xB6FB, 0x5C15, 0xE6D8, 0x5C16, 0xBCE2,
01097     0x5C17, 0x8CAB, 0x5C18, 0xB3BE, 0x5C19, 0x8CAC, 0x5C1A, 0xC9D0,
01098     0x5C1B, 0x8CAD, 0x5C1C, 0xE6D9, 0x5C1D, 0xB3A2, 0x5C1E, 0x8CAE,
01099     0x5C1F, 0x8CAF, 0x5C20, 0x8CB0, 0x5C21, 0x8CB1, 0x5C22, 0xDECC,
01100     0x5C23, 0x8CB2, 0x5C24, 0xD3C8, 0x5C25, 0xDECD, 0x5C26, 0x8CB3,
01101     0x5C27, 0xD2A2, 0x5C28, 0x8CB4, 0x5C29, 0x8CB5, 0x5C2A, 0x8CB6,
01102     0x5C2B, 0x8CB7, 0x5C2C, 0xDECE, 0x5C2D, 0x8CB8, 0x5C2E, 0x8CB9,
01103     0x5C2F, 0x8CBA, 0x5C30, 0x8CBB, 0x5C31, 0xBECD, 0x5C32, 0x8CBC,
01104     0x5C33, 0x8CBD, 0x5C34, 0xDECF, 0x5C35, 0x8CBE, 0x5C36, 0x8CBF,
01105     0x5C37, 0x8CC0, 0x5C38, 0xCAAC, 0x5C39, 0xD2FC, 0x5C3A, 0xB3DF,
01106     0x5C3B, 0xE5EA, 0x5C3C, 0xC4E1, 0x5C3D, 0xBEA1, 0x5C3E, 0xCEB2,
01107     0x5C3F, 0xC4F2, 0x5C40, 0xBED6, 0x5C41, 0xC6A8, 0x5C42, 0xB2E3,
01108     0x5C43, 0x8CC1, 0x5C44, 0x8CC2, 0x5C45, 0xBED3, 0x5C46, 0x8CC3,
01109     0x5C47, 0x8CC4, 0x5C48, 0xC7FC, 0x5C49, 0xCCEB, 0x5C4A, 0xBDEC,
01110     0x5C4B, 0xCEDD, 0x5C4C, 0x8CC5, 0x5C4D, 0x8CC6, 0x5C4E, 0xCABA,
01111     0x5C4F, 0xC6C1, 0x5C50, 0xE5EC, 0x5C51, 0xD0BC, 0x5C52, 0x8CC7,
01112     0x5C53, 0x8CC8, 0x5C54, 0x8CC9, 0x5C55, 0xD5B9, 0x5C56, 0x8CCA,
01113     0x5C57, 0x8CCB, 0x5C58, 0x8CCC, 0x5C59, 0xE5ED, 0x5C5A, 0x8CCD,
01114     0x5C5B, 0x8CCE, 0x5C5C, 0x8CCF, 0x5C5D, 0x8CD0, 0x5C5E, 0xCAF4,
01115     0x5C5F, 0x8CD1, 0x5C60, 0xCDC0, 0x5C61, 0xC2C5, 0x5C62, 0x8CD2,
01116     0x5C63, 0xE5EF, 0x5C64, 0x8CD3, 0x5C65, 0xC2C4, 0x5C66, 0xE5F0,
01117     0x5C67, 0x8CD4, 0x5C68, 0x8CD5, 0x5C69, 0x8CD6, 0x5C6A, 0x8CD7,
01118     0x5C6B, 0x8CD8, 0x5C6C, 0x8CD9, 0x5C6D, 0x8CDA, 0x5C6E, 0xE5F8,
01119     0x5C6F, 0xCDCD, 0x5C70, 0x8CDB, 0x5C71, 0xC9BD, 0x5C72, 0x8CDC,
01120     0x5C73, 0x8CDD, 0x5C74, 0x8CDE, 0x5C75, 0x8CDF, 0x5C76, 0x8CE0,
01121     0x5C77, 0x8CE1, 0x5C78, 0x8CE2, 0x5C79, 0xD2D9, 0x5C7A, 0xE1A8,
01122     0x5C7B, 0x8CE3, 0x5C7C, 0x8CE4, 0x5C7D, 0x8CE5, 0x5C7E, 0x8CE6,
01123     0x5C7F, 0xD3EC, 0x5C80, 0x8CE7, 0x5C81, 0xCBEA, 0x5C82, 0xC6F1,
01124     0x5C83, 0x8CE8, 0x5C84, 0x8CE9, 0x5C85, 0x8CEA, 0x5C86, 0x8CEB,
01125     0x5C87, 0x8CEC, 0x5C88, 0xE1AC, 0x5C89, 0x8CED, 0x5C8A, 0x8CEE,
01126     0x5C8B, 0x8CEF, 0x5C8C, 0xE1A7, 0x5C8D, 0xE1A9, 0x5C8E, 0x8CF0,
01127     0x5C8F, 0x8CF1, 0x5C90, 0xE1AA, 0x5C91, 0xE1AF, 0x5C92, 0x8CF2,
01128     0x5C93, 0x8CF3, 0x5C94, 0xB2ED, 0x5C95, 0x8CF4, 0x5C96, 0xE1AB,
01129     0x5C97, 0xB8DA, 0x5C98, 0xE1AD, 0x5C99, 0xE1AE, 0x5C9A, 0xE1B0,
01130     0x5C9B, 0xB5BA, 0x5C9C, 0xE1B1, 0x5C9D, 0x8CF5, 0x5C9E, 0x8CF6,
01131     0x5C9F, 0x8CF7, 0x5CA0, 0x8CF8, 0x5CA1, 0x8CF9, 0x5CA2, 0xE1B3,
01132     0x5CA3, 0xE1B8, 0x5CA4, 0x8CFA, 0x5CA5, 0x8CFB, 0x5CA6, 0x8CFC,
01133     0x5CA7, 0x8CFD, 0x5CA8, 0x8CFE, 0x5CA9, 0xD1D2, 0x5CAA, 0x8D40,
01134     0x5CAB, 0xE1B6, 0x5CAC, 0xE1B5, 0x5CAD, 0xC1EB, 0x5CAE, 0x8D41,
01135     0x5CAF, 0x8D42, 0x5CB0, 0x8D43, 0x5CB1, 0xE1B7, 0x5CB2, 0x8D44,
01136     0x5CB3, 0xD4C0, 0x5CB4, 0x8D45, 0x5CB5, 0xE1B2, 0x5CB6, 0x8D46,
01137     0x5CB7, 0xE1BA, 0x5CB8, 0xB0B6, 0x5CB9, 0x8D47, 0x5CBA, 0x8D48,
01138     0x5CBB, 0x8D49, 0x5CBC, 0x8D4A, 0x5CBD, 0xE1B4, 0x5CBE, 0x8D4B,
01139     0x5CBF, 0xBFF9, 0x5CC0, 0x8D4C, 0x5CC1, 0xE1B9, 0x5CC2, 0x8D4D,
01140     0x5CC3, 0x8D4E, 0x5CC4, 0xE1BB, 0x5CC5, 0x8D4F, 0x5CC6, 0x8D50,
01141     0x5CC7, 0x8D51, 0x5CC8, 0x8D52, 0x5CC9, 0x8D53, 0x5CCA, 0x8D54,
01142     0x5CCB, 0xE1BE, 0x5CCC, 0x8D55, 0x5CCD, 0x8D56, 0x5CCE, 0x8D57,
01143     0x5CCF, 0x8D58, 0x5CD0, 0x8D59, 0x5CD1, 0x8D5A, 0x5CD2, 0xE1BC,
01144     0x5CD3, 0x8D5B, 0x5CD4, 0x8D5C, 0x5CD5, 0x8D5D, 0x5CD6, 0x8D5E,
01145     0x5CD7, 0x8D5F, 0x5CD8, 0x8D60, 0x5CD9, 0xD6C5, 0x5CDA, 0x8D61,
01146     0x5CDB, 0x8D62, 0x5CDC, 0x8D63, 0x5CDD, 0x8D64, 0x5CDE, 0x8D65,
01147     0x5CDF, 0x8D66, 0x5CE0, 0x8D67, 0x5CE1, 0xCFBF, 0x5CE2, 0x8D68,
01148     0x5CE3, 0x8D69, 0x5CE4, 0xE1BD, 0x5CE5, 0xE1BF, 0x5CE6, 0xC2CD,
01149     0x5CE7, 0x8D6A, 0x5CE8, 0xB6EB, 0x5CE9, 0x8D6B, 0x5CEA, 0xD3F8,
01150     0x5CEB, 0x8D6C, 0x5CEC, 0x8D6D, 0x5CED, 0xC7CD, 0x5CEE, 0x8D6E,
01151     0x5CEF, 0x8D6F, 0x5CF0, 0xB7E5, 0x5CF1, 0x8D70, 0x5CF2, 0x8D71,
01152     0x5CF3, 0x8D72, 0x5CF4, 0x8D73, 0x5CF5, 0x8D74, 0x5CF6, 0x8D75,
01153     0x5CF7, 0x8D76, 0x5CF8, 0x8D77, 0x5CF9, 0x8D78, 0x5CFA, 0x8D79,
01154     0x5CFB, 0xBEFE, 0x5CFC, 0x8D7A, 0x5CFD, 0x8D7B, 0x5CFE, 0x8D7C,
01155     0x5CFF, 0x8D7D, 0x5D00, 0x8D7E, 0x5D01, 0x8D80, 0x5D02, 0xE1C0,
01156     0x5D03, 0xE1C1, 0x5D04, 0x8D81, 0x5D05, 0x8D82, 0x5D06, 0xE1C7,
01157     0x5D07, 0xB3E7, 0x5D08, 0x8D83, 0x5D09, 0x8D84, 0x5D0A, 0x8D85,
01158     0x5D0B, 0x8D86, 0x5D0C, 0x8D87, 0x5D0D, 0x8D88, 0x5D0E, 0xC6E9,
01159     0x5D0F, 0x8D89, 0x5D10, 0x8D8A, 0x5D11, 0x8D8B, 0x5D12, 0x8D8C,
01160     0x5D13, 0x8D8D, 0x5D14, 0xB4DE, 0x5D15, 0x8D8E, 0x5D16, 0xD1C2,
01161     0x5D17, 0x8D8F, 0x5D18, 0x8D90, 0x5D19, 0x8D91, 0x5D1A, 0x8D92,
01162     0x5D1B, 0xE1C8, 0x5D1C, 0x8D93, 0x5D1D, 0x8D94, 0x5D1E, 0xE1C6,
01163     0x5D1F, 0x8D95, 0x5D20, 0x8D96, 0x5D21, 0x8D97, 0x5D22, 0x8D98,
01164     0x5D23, 0x8D99, 0x5D24, 0xE1C5, 0x5D25, 0x8D9A, 0x5D26, 0xE1C3,
01165     0x5D27, 0xE1C2, 0x5D28, 0x8D9B, 0x5D29, 0xB1C0, 0x5D2A, 0x8D9C,
01166     0x5D2B, 0x8D9D, 0x5D2C, 0x8D9E, 0x5D2D, 0xD5B8, 0x5D2E, 0xE1C4,
01167     0x5D2F, 0x8D9F, 0x5D30, 0x8DA0, 0x5D31, 0x8DA1, 0x5D32, 0x8DA2,
01168     0x5D33, 0x8DA3, 0x5D34, 0xE1CB, 0x5D35, 0x8DA4, 0x5D36, 0x8DA5,
01169     0x5D37, 0x8DA6, 0x5D38, 0x8DA7, 0x5D39, 0x8DA8, 0x5D3A, 0x8DA9,
01170     0x5D3B, 0x8DAA, 0x5D3C, 0x8DAB, 0x5D3D, 0xE1CC, 0x5D3E, 0xE1CA,
01171     0x5D3F, 0x8DAC, 0x5D40, 0x8DAD, 0x5D41, 0x8DAE, 0x5D42, 0x8DAF,
01172     0x5D43, 0x8DB0, 0x5D44, 0x8DB1, 0x5D45, 0x8DB2, 0x5D46, 0x8DB3,
01173     0x5D47, 0xEFFA, 0x5D48, 0x8DB4, 0x5D49, 0x8DB5, 0x5D4A, 0xE1D3,
01174     0x5D4B, 0xE1D2, 0x5D4C, 0xC7B6, 0x5D4D, 0x8DB6, 0x5D4E, 0x8DB7,
01175     0x5D4F, 0x8DB8, 0x5D50, 0x8DB9, 0x5D51, 0x8DBA, 0x5D52, 0x8DBB,
01176     0x5D53, 0x8DBC, 0x5D54, 0x8DBD, 0x5D55, 0x8DBE, 0x5D56, 0x8DBF,
01177     0x5D57, 0x8DC0, 0x5D58, 0xE1C9, 0x5D59, 0x8DC1, 0x5D5A, 0x8DC2,
01178     0x5D5B, 0xE1CE, 0x5D5C, 0x8DC3, 0x5D5D, 0xE1D0, 0x5D5E, 0x8DC4,
01179     0x5D5F, 0x8DC5, 0x5D60, 0x8DC6, 0x5D61, 0x8DC7, 0x5D62, 0x8DC8,
01180     0x5D63, 0x8DC9, 0x5D64, 0x8DCA, 0x5D65, 0x8DCB, 0x5D66, 0x8DCC,
01181     0x5D67, 0x8DCD, 0x5D68, 0x8DCE, 0x5D69, 0xE1D4, 0x5D6A, 0x8DCF,
01182     0x5D6B, 0xE1D1, 0x5D6C, 0xE1CD, 0x5D6D, 0x8DD0, 0x5D6E, 0x8DD1,
01183     0x5D6F, 0xE1CF, 0x5D70, 0x8DD2, 0x5D71, 0x8DD3, 0x5D72, 0x8DD4,
01184     0x5D73, 0x8DD5, 0x5D74, 0xE1D5, 0x5D75, 0x8DD6, 0x5D76, 0x8DD7,
01185     0x5D77, 0x8DD8, 0x5D78, 0x8DD9, 0x5D79, 0x8DDA, 0x5D7A, 0x8DDB,
01186     0x5D7B, 0x8DDC, 0x5D7C, 0x8DDD, 0x5D7D, 0x8DDE, 0x5D7E, 0x8DDF,
01187     0x5D7F, 0x8DE0, 0x5D80, 0x8DE1, 0x5D81, 0x8DE2, 0x5D82, 0xE1D6,
01188     0x5D83, 0x8DE3, 0x5D84, 0x8DE4, 0x5D85, 0x8DE5, 0x5D86, 0x8DE6,
01189     0x5D87, 0x8DE7, 0x5D88, 0x8DE8, 0x5D89, 0x8DE9, 0x5D8A, 0x8DEA,
01190     0x5D8B, 0x8DEB, 0x5D8C, 0x8DEC, 0x5D8D, 0x8DED, 0x5D8E, 0x8DEE,
01191     0x5D8F, 0x8DEF, 0x5D90, 0x8DF0, 0x5D91, 0x8DF1, 0x5D92, 0x8DF2,
01192     0x5D93, 0x8DF3, 0x5D94, 0x8DF4, 0x5D95, 0x8DF5, 0x5D96, 0x8DF6,
01193     0x5D97, 0x8DF7, 0x5D98, 0x8DF8, 0x5D99, 0xE1D7, 0x5D9A, 0x8DF9,
01194     0x5D9B, 0x8DFA, 0x5D9C, 0x8DFB, 0x5D9D, 0xE1D8, 0x5D9E, 0x8DFC,
01195     0x5D9F, 0x8DFD, 0x5DA0, 0x8DFE, 0x5DA1, 0x8E40, 0x5DA2, 0x8E41,
01196     0x5DA3, 0x8E42, 0x5DA4, 0x8E43, 0x5DA5, 0x8E44, 0x5DA6, 0x8E45,
01197     0x5DA7, 0x8E46, 0x5DA8, 0x8E47, 0x5DA9, 0x8E48, 0x5DAA, 0x8E49,
01198     0x5DAB, 0x8E4A, 0x5DAC, 0x8E4B, 0x5DAD, 0x8E4C, 0x5DAE, 0x8E4D,
01199     0x5DAF, 0x8E4E, 0x5DB0, 0x8E4F, 0x5DB1, 0x8E50, 0x5DB2, 0x8E51,
01200     0x5DB3, 0x8E52, 0x5DB4, 0x8E53, 0x5DB5, 0x8E54, 0x5DB6, 0x8E55,
01201     0x5DB7, 0xE1DA, 0x5DB8, 0x8E56, 0x5DB9, 0x8E57, 0x5DBA, 0x8E58,
01202     0x5DBB, 0x8E59, 0x5DBC, 0x8E5A, 0x5DBD, 0x8E5B, 0x5DBE, 0x8E5C,
01203     0x5DBF, 0x8E5D, 0x5DC0, 0x8E5E, 0x5DC1, 0x8E5F, 0x5DC2, 0x8E60,
01204     0x5DC3, 0x8E61, 0x5DC4, 0x8E62, 0x5DC5, 0xE1DB, 0x5DC6, 0x8E63,
01205     0x5DC7, 0x8E64, 0x5DC8, 0x8E65, 0x5DC9, 0x8E66, 0x5DCA, 0x8E67,
01206     0x5DCB, 0x8E68, 0x5DCC, 0x8E69, 0x5DCD, 0xCEA1, 0x5DCE, 0x8E6A,
01207     0x5DCF, 0x8E6B, 0x5DD0, 0x8E6C, 0x5DD1, 0x8E6D, 0x5DD2, 0x8E6E,
01208     0x5DD3, 0x8E6F, 0x5DD4, 0x8E70, 0x5DD5, 0x8E71, 0x5DD6, 0x8E72,
01209     0x5DD7, 0x8E73, 0x5DD8, 0x8E74, 0x5DD9, 0x8E75, 0x5DDA, 0x8E76,
01210     0x5DDB, 0xE7DD, 0x5DDC, 0x8E77, 0x5DDD, 0xB4A8, 0x5DDE, 0xD6DD,
01211     0x5DDF, 0x8E78, 0x5DE0, 0x8E79, 0x5DE1, 0xD1B2, 0x5DE2, 0xB3B2,
01212     0x5DE3, 0x8E7A, 0x5DE4, 0x8E7B, 0x5DE5, 0xB9A4, 0x5DE6, 0xD7F3,
01213     0x5DE7, 0xC7C9, 0x5DE8, 0xBEDE, 0x5DE9, 0xB9AE, 0x5DEA, 0x8E7C,
01214     0x5DEB, 0xCED7, 0x5DEC, 0x8E7D, 0x5DED, 0x8E7E, 0x5DEE, 0xB2EE,
01215     0x5DEF, 0xDBCF, 0x5DF0, 0x8E80, 0x5DF1, 0xBCBA, 0x5DF2, 0xD2D1,
01216     0x5DF3, 0xCBC8, 0x5DF4, 0xB0CD, 0x5DF5, 0x8E81, 0x5DF6, 0x8E82,
01217     0x5DF7, 0xCFEF, 0x5DF8, 0x8E83, 0x5DF9, 0x8E84, 0x5DFA, 0x8E85,
01218     0x5DFB, 0x8E86, 0x5DFC, 0x8E87, 0x5DFD, 0xD9E3, 0x5DFE, 0xBDED,
01219     0x5DFF, 0x8E88, 0x5E00, 0x8E89, 0x5E01, 0xB1D2, 0x5E02, 0xCAD0,
01220     0x5E03, 0xB2BC, 0x5E04, 0x8E8A, 0x5E05, 0xCBA7, 0x5E06, 0xB7AB,
01221     0x5E07, 0x8E8B, 0x5E08, 0xCAA6, 0x5E09, 0x8E8C, 0x5E0A, 0x8E8D,
01222     0x5E0B, 0x8E8E, 0x5E0C, 0xCFA3, 0x5E0D, 0x8E8F, 0x5E0E, 0x8E90,
01223     0x5E0F, 0xE0F8, 0x5E10, 0xD5CA, 0x5E11, 0xE0FB, 0x5E12, 0x8E91,
01224     0x5E13, 0x8E92, 0x5E14, 0xE0FA, 0x5E15, 0xC5C1, 0x5E16, 0xCCFB,
01225     0x5E17, 0x8E93, 0x5E18, 0xC1B1, 0x5E19, 0xE0F9, 0x5E1A, 0xD6E3,
01226     0x5E1B, 0xB2AF, 0x5E1C, 0xD6C4, 0x5E1D, 0xB5DB, 0x5E1E, 0x8E94,
01227     0x5E1F, 0x8E95, 0x5E20, 0x8E96, 0x5E21, 0x8E97, 0x5E22, 0x8E98,
01228     0x5E23, 0x8E99, 0x5E24, 0x8E9A, 0x5E25, 0x8E9B, 0x5E26, 0xB4F8,
01229     0x5E27, 0xD6A1, 0x5E28, 0x8E9C, 0x5E29, 0x8E9D, 0x5E2A, 0x8E9E,
01230     0x5E2B, 0x8E9F, 0x5E2C, 0x8EA0, 0x5E2D, 0xCFAF, 0x5E2E, 0xB0EF,
01231     0x5E2F, 0x8EA1, 0x5E30, 0x8EA2, 0x5E31, 0xE0FC, 0x5E32, 0x8EA3,
01232     0x5E33, 0x8EA4, 0x5E34, 0x8EA5, 0x5E35, 0x8EA6, 0x5E36, 0x8EA7,
01233     0x5E37, 0xE1A1, 0x5E38, 0xB3A3, 0x5E39, 0x8EA8, 0x5E3A, 0x8EA9,
01234     0x5E3B, 0xE0FD, 0x5E3C, 0xE0FE, 0x5E3D, 0xC3B1, 0x5E3E, 0x8EAA,
01235     0x5E3F, 0x8EAB, 0x5E40, 0x8EAC, 0x5E41, 0x8EAD, 0x5E42, 0xC3DD,
01236     0x5E43, 0x8EAE, 0x5E44, 0xE1A2, 0x5E45, 0xB7F9, 0x5E46, 0x8EAF,
01237     0x5E47, 0x8EB0, 0x5E48, 0x8EB1, 0x5E49, 0x8EB2, 0x5E4A, 0x8EB3,
01238     0x5E4B, 0x8EB4, 0x5E4C, 0xBBCF, 0x5E4D, 0x8EB5, 0x5E4E, 0x8EB6,
01239     0x5E4F, 0x8EB7, 0x5E50, 0x8EB8, 0x5E51, 0x8EB9, 0x5E52, 0x8EBA,
01240     0x5E53, 0x8EBB, 0x5E54, 0xE1A3, 0x5E55, 0xC4BB, 0x5E56, 0x8EBC,
01241     0x5E57, 0x8EBD, 0x5E58, 0x8EBE, 0x5E59, 0x8EBF, 0x5E5A, 0x8EC0,
01242     0x5E5B, 0xE1A4, 0x5E5C, 0x8EC1, 0x5E5D, 0x8EC2, 0x5E5E, 0xE1A5,
01243     0x5E5F, 0x8EC3, 0x5E60, 0x8EC4, 0x5E61, 0xE1A6, 0x5E62, 0xB4B1,
01244     0x5E63, 0x8EC5, 0x5E64, 0x8EC6, 0x5E65, 0x8EC7, 0x5E66, 0x8EC8,
01245     0x5E67, 0x8EC9, 0x5E68, 0x8ECA, 0x5E69, 0x8ECB, 0x5E6A, 0x8ECC,
01246     0x5E6B, 0x8ECD, 0x5E6C, 0x8ECE, 0x5E6D, 0x8ECF, 0x5E6E, 0x8ED0,
01247     0x5E6F, 0x8ED1, 0x5E70, 0x8ED2, 0x5E71, 0x8ED3, 0x5E72, 0xB8C9,
01248     0x5E73, 0xC6BD, 0x5E74, 0xC4EA, 0x5E75, 0x8ED4, 0x5E76, 0xB2A2,
01249     0x5E77, 0x8ED5, 0x5E78, 0xD0D2, 0x5E79, 0x8ED6, 0x5E7A, 0xE7DB,
01250     0x5E7B, 0xBBC3, 0x5E7C, 0xD3D7, 0x5E7D, 0xD3C4, 0x5E7E, 0x8ED7,
01251     0x5E7F, 0xB9E3, 0x5E80, 0xE2CF, 0x5E81, 0x8ED8, 0x5E82, 0x8ED9,
01252     0x5E83, 0x8EDA, 0x5E84, 0xD7AF, 0x5E85, 0x8EDB, 0x5E86, 0xC7EC,
01253     0x5E87, 0xB1D3, 0x5E88, 0x8EDC, 0x5E89, 0x8EDD, 0x5E8A, 0xB4B2,
01254     0x5E8B, 0xE2D1, 0x5E8C, 0x8EDE, 0x5E8D, 0x8EDF, 0x5E8E, 0x8EE0,
01255     0x5E8F, 0xD0F2, 0x5E90, 0xC2AE, 0x5E91, 0xE2D0, 0x5E92, 0x8EE1,
01256     0x5E93, 0xBFE2, 0x5E94, 0xD3A6, 0x5E95, 0xB5D7, 0x5E96, 0xE2D2,
01257     0x5E97, 0xB5EA, 0x5E98, 0x8EE2, 0x5E99, 0xC3ED, 0x5E9A, 0xB8FD,
01258     0x5E9B, 0x8EE3, 0x5E9C, 0xB8AE, 0x5E9D, 0x8EE4, 0x5E9E, 0xC5D3,
01259     0x5E9F, 0xB7CF, 0x5EA0, 0xE2D4, 0x5EA1, 0x8EE5, 0x5EA2, 0x8EE6,
01260     0x5EA3, 0x8EE7, 0x5EA4, 0x8EE8, 0x5EA5, 0xE2D3, 0x5EA6, 0xB6C8,
01261     0x5EA7, 0xD7F9, 0x5EA8, 0x8EE9, 0x5EA9, 0x8EEA, 0x5EAA, 0x8EEB,
01262     0x5EAB, 0x8EEC, 0x5EAC, 0x8EED, 0x5EAD, 0xCDA5, 0x5EAE, 0x8EEE,
01263     0x5EAF, 0x8EEF, 0x5EB0, 0x8EF0, 0x5EB1, 0x8EF1, 0x5EB2, 0x8EF2,
01264     0x5EB3, 0xE2D8, 0x5EB4, 0x8EF3, 0x5EB5, 0xE2D6, 0x5EB6, 0xCAFC,
01265     0x5EB7, 0xBFB5, 0x5EB8, 0xD3B9, 0x5EB9, 0xE2D5, 0x5EBA, 0x8EF4,
01266     0x5EBB, 0x8EF5, 0x5EBC, 0x8EF6, 0x5EBD, 0x8EF7, 0x5EBE, 0xE2D7,
01267     0x5EBF, 0x8EF8, 0x5EC0, 0x8EF9, 0x5EC1, 0x8EFA, 0x5EC2, 0x8EFB,
01268     0x5EC3, 0x8EFC, 0x5EC4, 0x8EFD, 0x5EC5, 0x8EFE, 0x5EC6, 0x8F40,
01269     0x5EC7, 0x8F41, 0x5EC8, 0x8F42, 0x5EC9, 0xC1AE, 0x5ECA, 0xC0C8,
01270     0x5ECB, 0x8F43, 0x5ECC, 0x8F44, 0x5ECD, 0x8F45, 0x5ECE, 0x8F46,
01271     0x5ECF, 0x8F47, 0x5ED0, 0x8F48, 0x5ED1, 0xE2DB, 0x5ED2, 0xE2DA,
01272     0x5ED3, 0xC0AA, 0x5ED4, 0x8F49, 0x5ED5, 0x8F4A, 0x5ED6, 0xC1CE,
01273     0x5ED7, 0x8F4B, 0x5ED8, 0x8F4C, 0x5ED9, 0x8F4D, 0x5EDA, 0x8F4E,
01274     0x5EDB, 0xE2DC, 0x5EDC, 0x8F4F, 0x5EDD, 0x8F50, 0x5EDE, 0x8F51,
01275     0x5EDF, 0x8F52, 0x5EE0, 0x8F53, 0x5EE1, 0x8F54, 0x5EE2, 0x8F55,
01276     0x5EE3, 0x8F56, 0x5EE4, 0x8F57, 0x5EE5, 0x8F58, 0x5EE6, 0x8F59,
01277     0x5EE7, 0x8F5A, 0x5EE8, 0xE2DD, 0x5EE9, 0x8F5B, 0x5EEA, 0xE2DE,
01278     0x5EEB, 0x8F5C, 0x5EEC, 0x8F5D, 0x5EED, 0x8F5E, 0x5EEE, 0x8F5F,
01279     0x5EEF, 0x8F60, 0x5EF0, 0x8F61, 0x5EF1, 0x8F62, 0x5EF2, 0x8F63,
01280     0x5EF3, 0x8F64, 0x5EF4, 0xDBC8, 0x5EF5, 0x8F65, 0x5EF6, 0xD1D3,
01281     0x5EF7, 0xCDA2, 0x5EF8, 0x8F66, 0x5EF9, 0x8F67, 0x5EFA, 0xBDA8,
01282     0x5EFB, 0x8F68, 0x5EFC, 0x8F69, 0x5EFD, 0x8F6A, 0x5EFE, 0xDEC3,
01283     0x5EFF, 0xD8A5, 0x5F00, 0xBFAA, 0x5F01, 0xDBCD, 0x5F02, 0xD2EC,
01284     0x5F03, 0xC6FA, 0x5F04, 0xC5AA, 0x5F05, 0x8F6B, 0x5F06, 0x8F6C,
01285     0x5F07, 0x8F6D, 0x5F08, 0xDEC4, 0x5F09, 0x8F6E, 0x5F0A, 0xB1D7,
01286     0x5F0B, 0xDFAE, 0x5F0C, 0x8F6F, 0x5F0D, 0x8F70, 0x5F0E, 0x8F71,
01287     0x5F0F, 0xCABD, 0x5F10, 0x8F72, 0x5F11, 0xDFB1, 0x5F12, 0x8F73,
01288     0x5F13, 0xB9AD, 0x5F14, 0x8F74, 0x5F15, 0xD2FD, 0x5F16, 0x8F75,
01289     0x5F17, 0xB8A5, 0x5F18, 0xBAEB, 0x5F19, 0x8F76, 0x5F1A, 0x8F77,
01290     0x5F1B, 0xB3DA, 0x5F1C, 0x8F78, 0x5F1D, 0x8F79, 0x5F1E, 0x8F7A,
01291     0x5F1F, 0xB5DC, 0x5F20, 0xD5C5, 0x5F21, 0x8F7B, 0x5F22, 0x8F7C,
01292     0x5F23, 0x8F7D, 0x5F24, 0x8F7E, 0x5F25, 0xC3D6, 0x5F26, 0xCFD2,
01293     0x5F27, 0xBBA1, 0x5F28, 0x8F80, 0x5F29, 0xE5F3, 0x5F2A, 0xE5F2,
01294     0x5F2B, 0x8F81, 0x5F2C, 0x8F82, 0x5F2D, 0xE5F4, 0x5F2E, 0x8F83,
01295     0x5F2F, 0xCDE4, 0x5F30, 0x8F84, 0x5F31, 0xC8F5, 0x5F32, 0x8F85,
01296     0x5F33, 0x8F86, 0x5F34, 0x8F87, 0x5F35, 0x8F88, 0x5F36, 0x8F89,
01297     0x5F37, 0x8F8A, 0x5F38, 0x8F8B, 0x5F39, 0xB5AF, 0x5F3A, 0xC7BF,
01298     0x5F3B, 0x8F8C, 0x5F3C, 0xE5F6, 0x5F3D, 0x8F8D, 0x5F3E, 0x8F8E,
01299     0x5F3F, 0x8F8F, 0x5F40, 0xECB0, 0x5F41, 0x8F90, 0x5F42, 0x8F91,
01300     0x5F43, 0x8F92, 0x5F44, 0x8F93, 0x5F45, 0x8F94, 0x5F46, 0x8F95,
01301     0x5F47, 0x8F96, 0x5F48, 0x8F97, 0x5F49, 0x8F98, 0x5F4A, 0x8F99,
01302     0x5F4B, 0x8F9A, 0x5F4C, 0x8F9B, 0x5F4D, 0x8F9C, 0x5F4E, 0x8F9D,
01303     0x5F4F, 0x8F9E, 0x5F50, 0xE5E6, 0x5F51, 0x8F9F, 0x5F52, 0xB9E9,
01304     0x5F53, 0xB5B1, 0x5F54, 0x8FA0, 0x5F55, 0xC2BC, 0x5F56, 0xE5E8,
01305     0x5F57, 0xE5E7, 0x5F58, 0xE5E9, 0x5F59, 0x8FA1, 0x5F5A, 0x8FA2,
01306     0x5F5B, 0x8FA3, 0x5F5C, 0x8FA4, 0x5F5D, 0xD2CD, 0x5F5E, 0x8FA5,
01307     0x5F5F, 0x8FA6, 0x5F60, 0x8FA7, 0x5F61, 0xE1EA, 0x5F62, 0xD0CE,
01308     0x5F63, 0x8FA8, 0x5F64, 0xCDAE, 0x5F65, 0x8FA9, 0x5F66, 0xD1E5,
01309     0x5F67, 0x8FAA, 0x5F68, 0x8FAB, 0x5F69, 0xB2CA, 0x5F6A, 0xB1EB,
01310     0x5F6B, 0x8FAC, 0x5F6C, 0xB1F2, 0x5F6D, 0xC5ED, 0x5F6E, 0x8FAD,
01311     0x5F6F, 0x8FAE, 0x5F70, 0xD5C3, 0x5F71, 0xD3B0, 0x5F72, 0x8FAF,
01312     0x5F73, 0xE1DC, 0x5F74, 0x8FB0, 0x5F75, 0x8FB1, 0x5F76, 0x8FB2,
01313     0x5F77, 0xE1DD, 0x5F78, 0x8FB3, 0x5F79, 0xD2DB, 0x5F7A, 0x8FB4,
01314     0x5F7B, 0xB3B9, 0x5F7C, 0xB1CB, 0x5F7D, 0x8FB5, 0x5F7E, 0x8FB6,
01315     0x5F7F, 0x8FB7, 0x5F80, 0xCDF9, 0x5F81, 0xD5F7, 0x5F82, 0xE1DE,
01316     0x5F83, 0x8FB8, 0x5F84, 0xBEB6, 0x5F85, 0xB4FD, 0x5F86, 0x8FB9,
01317     0x5F87, 0xE1DF, 0x5F88, 0xBADC, 0x5F89, 0xE1E0, 0x5F8A, 0xBBB2,
01318     0x5F8B, 0xC2C9, 0x5F8C, 0xE1E1, 0x5F8D, 0x8FBA, 0x5F8E, 0x8FBB,
01319     0x5F8F, 0x8FBC, 0x5F90, 0xD0EC, 0x5F91, 0x8FBD, 0x5F92, 0xCDBD,
01320     0x5F93, 0x8FBE, 0x5F94, 0x8FBF, 0x5F95, 0xE1E2, 0x5F96, 0x8FC0,
01321     0x5F97, 0xB5C3, 0x5F98, 0xC5C7, 0x5F99, 0xE1E3, 0x5F9A, 0x8FC1,
01322     0x5F9B, 0x8FC2, 0x5F9C, 0xE1E4, 0x5F9D, 0x8FC3, 0x5F9E, 0x8FC4,
01323     0x5F9F, 0x8FC5, 0x5FA0, 0x8FC6, 0x5FA1, 0xD3F9, 0x5FA2, 0x8FC7,
01324     0x5FA3, 0x8FC8, 0x5FA4, 0x8FC9, 0x5FA5, 0x8FCA, 0x5FA6, 0x8FCB,
01325     0x5FA7, 0x8FCC, 0x5FA8, 0xE1E5, 0x5FA9, 0x8FCD, 0x5FAA, 0xD1AD,
01326     0x5FAB, 0x8FCE, 0x5FAC, 0x8FCF, 0x5FAD, 0xE1E6, 0x5FAE, 0xCEA2,
01327     0x5FAF, 0x8FD0, 0x5FB0, 0x8FD1, 0x5FB1, 0x8FD2, 0x5FB2, 0x8FD3,
01328     0x5FB3, 0x8FD4, 0x5FB4, 0x8FD5, 0x5FB5, 0xE1E7, 0x5FB6, 0x8FD6,
01329     0x5FB7, 0xB5C2, 0x5FB8, 0x8FD7, 0x5FB9, 0x8FD8, 0x5FBA, 0x8FD9,
01330     0x5FBB, 0x8FDA, 0x5FBC, 0xE1E8, 0x5FBD, 0xBBD5, 0x5FBE, 0x8FDB,
01331     0x5FBF, 0x8FDC, 0x5FC0, 0x8FDD, 0x5FC1, 0x8FDE, 0x5FC2, 0x8FDF,
01332     0x5FC3, 0xD0C4, 0x5FC4, 0xE2E0, 0x5FC5, 0xB1D8, 0x5FC6, 0xD2E4,
01333     0x5FC7, 0x8FE0, 0x5FC8, 0x8FE1, 0x5FC9, 0xE2E1, 0x5FCA, 0x8FE2,
01334     0x5FCB, 0x8FE3, 0x5FCC, 0xBCC9, 0x5FCD, 0xC8CC, 0x5FCE, 0x8FE4,
01335     0x5FCF, 0xE2E3, 0x5FD0, 0xECFE, 0x5FD1, 0xECFD, 0x5FD2, 0xDFAF,
01336     0x5FD3, 0x8FE5, 0x5FD4, 0x8FE6, 0x5FD5, 0x8FE7, 0x5FD6, 0xE2E2,
01337     0x5FD7, 0xD6BE, 0x5FD8, 0xCDFC, 0x5FD9, 0xC3A6, 0x5FDA, 0x8FE8,
01338     0x5FDB, 0x8FE9, 0x5FDC, 0x8FEA, 0x5FDD, 0xE3C3, 0x5FDE, 0x8FEB,
01339     0x5FDF, 0x8FEC, 0x5FE0, 0xD6D2, 0x5FE1, 0xE2E7, 0x5FE2, 0x8FED,
01340     0x5FE3, 0x8FEE, 0x5FE4, 0xE2E8, 0x5FE5, 0x8FEF, 0x5FE6, 0x8FF0,
01341     0x5FE7, 0xD3C7, 0x5FE8, 0x8FF1, 0x5FE9, 0x8FF2, 0x5FEA, 0xE2EC,
01342     0x5FEB, 0xBFEC, 0x5FEC, 0x8FF3, 0x5FED, 0xE2ED, 0x5FEE, 0xE2E5,
01343     0x5FEF, 0x8FF4, 0x5FF0, 0x8FF5, 0x5FF1, 0xB3C0, 0x5FF2, 0x8FF6,
01344     0x5FF3, 0x8FF7, 0x5FF4, 0x8FF8, 0x5FF5, 0xC4EE, 0x5FF6, 0x8FF9,
01345     0x5FF7, 0x8FFA, 0x5FF8, 0xE2EE, 0x5FF9, 0x8FFB, 0x5FFA, 0x8FFC,
01346     0x5FFB, 0xD0C3, 0x5FFC, 0x8FFD, 0x5FFD, 0xBAF6, 0x5FFE, 0xE2E9,
01347     0x5FFF, 0xB7DE, 0x6000, 0xBBB3, 0x6001, 0xCCAC, 0x6002, 0xCBCB,
01348     0x6003, 0xE2E4, 0x6004, 0xE2E6, 0x6005, 0xE2EA, 0x6006, 0xE2EB,
01349     0x6007, 0x8FFE, 0x6008, 0x9040, 0x6009, 0x9041, 0x600A, 0xE2F7,
01350     0x600B, 0x9042, 0x600C, 0x9043, 0x600D, 0xE2F4, 0x600E, 0xD4F5,
01351     0x600F, 0xE2F3, 0x6010, 0x9044, 0x6011, 0x9045, 0x6012, 0xC5AD,
01352     0x6013, 0x9046, 0x6014, 0xD5FA, 0x6015, 0xC5C2, 0x6016, 0xB2C0,
01353     0x6017, 0x9047, 0x6018, 0x9048, 0x6019, 0xE2EF, 0x601A, 0x9049,
01354     0x601B, 0xE2F2, 0x601C, 0xC1AF, 0x601D, 0xCBBC, 0x601E, 0x904A,
01355     0x601F, 0x904B, 0x6020, 0xB5A1, 0x6021, 0xE2F9, 0x6022, 0x904C,
01356     0x6023, 0x904D, 0x6024, 0x904E, 0x6025, 0xBCB1, 0x6026, 0xE2F1,
01357     0x6027, 0xD0D4, 0x6028, 0xD4B9, 0x6029, 0xE2F5, 0x602A, 0xB9D6,
01358     0x602B, 0xE2F6, 0x602C, 0x904F, 0x602D, 0x9050, 0x602E, 0x9051,
01359     0x602F, 0xC7D3, 0x6030, 0x9052, 0x6031, 0x9053, 0x6032, 0x9054,
01360     0x6033, 0x9055, 0x6034, 0x9056, 0x6035, 0xE2F0, 0x6036, 0x9057,
01361     0x6037, 0x9058, 0x6038, 0x9059, 0x6039, 0x905A, 0x603A, 0x905B,
01362     0x603B, 0xD7DC, 0x603C, 0xEDA1, 0x603D, 0x905C, 0x603E, 0x905D,
01363     0x603F, 0xE2F8, 0x6040, 0x905E, 0x6041, 0xEDA5, 0x6042, 0xE2FE,
01364     0x6043, 0xCAD1, 0x6044, 0x905F, 0x6045, 0x9060, 0x6046, 0x9061,
01365     0x6047, 0x9062, 0x6048, 0x9063, 0x6049, 0x9064, 0x604A, 0x9065,
01366     0x604B, 0xC1B5, 0x604C, 0x9066, 0x604D, 0xBBD0, 0x604E, 0x9067,
01367     0x604F, 0x9068, 0x6050, 0xBFD6, 0x6051, 0x9069, 0x6052, 0xBAE3,
01368     0x6053, 0x906A, 0x6054, 0x906B, 0x6055, 0xCBA1, 0x6056, 0x906C,
01369     0x6057, 0x906D, 0x6058, 0x906E, 0x6059, 0xEDA6, 0x605A, 0xEDA3,
01370     0x605B, 0x906F, 0x605C, 0x9070, 0x605D, 0xEDA2, 0x605E, 0x9071,
01371     0x605F, 0x9072, 0x6060, 0x9073, 0x6061, 0x9074, 0x6062, 0xBBD6,
01372     0x6063, 0xEDA7, 0x6064, 0xD0F4, 0x6065, 0x9075, 0x6066, 0x9076,
01373     0x6067, 0xEDA4, 0x6068, 0xBADE, 0x6069, 0xB6F7, 0x606A, 0xE3A1,
01374     0x606B, 0xB6B2, 0x606C, 0xCCF1, 0x606D, 0xB9A7, 0x606E, 0x9077,
01375     0x606F, 0xCFA2, 0x6070, 0xC7A1, 0x6071, 0x9078, 0x6072, 0x9079,
01376     0x6073, 0xBFD2, 0x6074, 0x907A, 0x6075, 0x907B, 0x6076, 0xB6F1,
01377     0x6077, 0x907C, 0x6078, 0xE2FA, 0x6079, 0xE2FB, 0x607A, 0xE2FD,
01378     0x607B, 0xE2FC, 0x607C, 0xC4D5, 0x607D, 0xE3A2, 0x607E, 0x907D,
01379     0x607F, 0xD3C1, 0x6080, 0x907E, 0x6081, 0x9080, 0x6082, 0x9081,
01380     0x6083, 0xE3A7, 0x6084, 0xC7C4, 0x6085, 0x9082, 0x6086, 0x9083,
01381     0x6087, 0x9084, 0x6088, 0x9085, 0x6089, 0xCFA4, 0x608A, 0x9086,
01382     0x608B, 0x9087, 0x608C, 0xE3A9, 0x608D, 0xBAB7, 0x608E, 0x9088,
01383     0x608F, 0x9089, 0x6090, 0x908A, 0x6091, 0x908B, 0x6092, 0xE3A8,
01384     0x6093, 0x908C, 0x6094, 0xBBDA, 0x6095, 0x908D, 0x6096, 0xE3A3,
01385     0x6097, 0x908E, 0x6098, 0x908F, 0x6099, 0x9090, 0x609A, 0xE3A4,
01386     0x609B, 0xE3AA, 0x609C, 0x9091, 0x609D, 0xE3A6, 0x609E, 0x9092,
01387     0x609F, 0xCEF2, 0x60A0, 0xD3C6, 0x60A1, 0x9093, 0x60A2, 0x9094,
01388     0x60A3, 0xBBBC, 0x60A4, 0x9095, 0x60A5, 0x9096, 0x60A6, 0xD4C3,
01389     0x60A7, 0x9097, 0x60A8, 0xC4FA, 0x60A9, 0x9098, 0x60AA, 0x9099,
01390     0x60AB, 0xEDA8, 0x60AC, 0xD0FC, 0x60AD, 0xE3A5, 0x60AE, 0x909A,
01391     0x60AF, 0xC3F5, 0x60B0, 0x909B, 0x60B1, 0xE3AD, 0x60B2, 0xB1AF,
01392     0x60B3, 0x909C, 0x60B4, 0xE3B2, 0x60B5, 0x909D, 0x60B6, 0x909E,
01393     0x60B7, 0x909F, 0x60B8, 0xBCC2, 0x60B9, 0x90A0, 0x60BA, 0x90A1,
01394     0x60BB, 0xE3AC, 0x60BC, 0xB5BF, 0x60BD, 0x90A2, 0x60BE, 0x90A3,
01395     0x60BF, 0x90A4, 0x60C0, 0x90A5, 0x60C1, 0x90A6, 0x60C2, 0x90A7,
01396     0x60C3, 0x90A8, 0x60C4, 0x90A9, 0x60C5, 0xC7E9, 0x60C6, 0xE3B0,
01397     0x60C7, 0x90AA, 0x60C8, 0x90AB, 0x60C9, 0x90AC, 0x60CA, 0xBEAA,
01398     0x60CB, 0xCDEF, 0x60CC, 0x90AD, 0x60CD, 0x90AE, 0x60CE, 0x90AF,
01399     0x60CF, 0x90B0, 0x60D0, 0x90B1, 0x60D1, 0xBBF3, 0x60D2, 0x90B2,
01400     0x60D3, 0x90B3, 0x60D4, 0x90B4, 0x60D5, 0xCCE8, 0x60D6, 0x90B5,
01401     0x60D7, 0x90B6, 0x60D8, 0xE3AF, 0x60D9, 0x90B7, 0x60DA, 0xE3B1,
01402     0x60DB, 0x90B8, 0x60DC, 0xCFA7, 0x60DD, 0xE3AE, 0x60DE, 0x90B9,
01403     0x60DF, 0xCEA9, 0x60E0, 0xBBDD, 0x60E1, 0x90BA, 0x60E2, 0x90BB,
01404     0x60E3, 0x90BC, 0x60E4, 0x90BD, 0x60E5, 0x90BE, 0x60E6, 0xB5EB,
01405     0x60E7, 0xBEE5, 0x60E8, 0xB2D2, 0x60E9, 0xB3CD, 0x60EA, 0x90BF,
01406     0x60EB, 0xB1B9, 0x60EC, 0xE3AB, 0x60ED, 0xB2D1, 0x60EE, 0xB5AC,
01407     0x60EF, 0xB9DF, 0x60F0, 0xB6E8, 0x60F1, 0x90C0, 0x60F2, 0x90C1,
01408     0x60F3, 0xCFEB, 0x60F4, 0xE3B7, 0x60F5, 0x90C2, 0x60F6, 0xBBCC,
01409     0x60F7, 0x90C3, 0x60F8, 0x90C4, 0x60F9, 0xC8C7, 0x60FA, 0xD0CA,
01410     0x60FB, 0x90C5, 0x60FC, 0x90C6, 0x60FD, 0x90C7, 0x60FE, 0x90C8,
01411     0x60FF, 0x90C9, 0x6100, 0xE3B8, 0x6101, 0xB3EE, 0x6102, 0x90CA,
01412     0x6103, 0x90CB, 0x6104, 0x90CC, 0x6105, 0x90CD, 0x6106, 0xEDA9,
01413     0x6107, 0x90CE, 0x6108, 0xD3FA, 0x6109, 0xD3E4, 0x610A, 0x90CF,
01414     0x610B, 0x90D0, 0x610C, 0x90D1, 0x610D, 0xEDAA, 0x610E, 0xE3B9,
01415     0x610F, 0xD2E2, 0x6110, 0x90D2, 0x6111, 0x90D3, 0x6112, 0x90D4,
01416     0x6113, 0x90D5, 0x6114, 0x90D6, 0x6115, 0xE3B5, 0x6116, 0x90D7,
01417     0x6117, 0x90D8, 0x6118, 0x90D9, 0x6119, 0x90DA, 0x611A, 0xD3DE,
01418     0x611B, 0x90DB, 0x611C, 0x90DC, 0x611D, 0x90DD, 0x611E, 0x90DE,
01419     0x611F, 0xB8D0, 0x6120, 0xE3B3, 0x6121, 0x90DF, 0x6122, 0x90E0,
01420     0x6123, 0xE3B6, 0x6124, 0xB7DF, 0x6125, 0x90E1, 0x6126, 0xE3B4,
01421     0x6127, 0xC0A2, 0x6128, 0x90E2, 0x6129, 0x90E3, 0x612A, 0x90E4,
01422     0x612B, 0xE3BA, 0x612C, 0x90E5, 0x612D, 0x90E6, 0x612E, 0x90E7,
01423     0x612F, 0x90E8, 0x6130, 0x90E9, 0x6131, 0x90EA, 0x6132, 0x90EB,
01424     0x6133, 0x90EC, 0x6134, 0x90ED, 0x6135, 0x90EE, 0x6136, 0x90EF,
01425     0x6137, 0x90F0, 0x6138, 0x90F1, 0x6139, 0x90F2, 0x613A, 0x90F3,
01426     0x613B, 0x90F4, 0x613C, 0x90F5, 0x613D, 0x90F6, 0x613E, 0x90F7,
01427     0x613F, 0xD4B8, 0x6140, 0x90F8, 0x6141, 0x90F9, 0x6142, 0x90FA,
01428     0x6143, 0x90FB, 0x6144, 0x90FC, 0x6145, 0x90FD, 0x6146, 0x90FE,
01429     0x6147, 0x9140, 0x6148, 0xB4C8, 0x6149, 0x9141, 0x614A, 0xE3BB,
01430     0x614B, 0x9142, 0x614C, 0xBBC5, 0x614D, 0x9143, 0x614E, 0xC9F7,
01431     0x614F, 0x9144, 0x6150, 0x9145, 0x6151, 0xC9E5, 0x6152, 0x9146,
01432     0x6153, 0x9147, 0x6154, 0x9148, 0x6155, 0xC4BD, 0x6156, 0x9149,
01433     0x6157, 0x914A, 0x6158, 0x914B, 0x6159, 0x914C, 0x615A, 0x914D,
01434     0x615B, 0x914E, 0x615C, 0x914F, 0x615D, 0xEDAB, 0x615E, 0x9150,
01435     0x615F, 0x9151, 0x6160, 0x9152, 0x6161, 0x9153, 0x6162, 0xC2FD,
01436     0x6163, 0x9154, 0x6164, 0x9155, 0x6165, 0x9156, 0x6166, 0x9157,
01437     0x6167, 0xBBDB, 0x6168, 0xBFAE, 0x6169, 0x9158, 0x616A, 0x9159,
01438     0x616B, 0x915A, 0x616C, 0x915B, 0x616D, 0x915C, 0x616E, 0x915D,
01439     0x616F, 0x915E, 0x6170, 0xCEBF, 0x6171, 0x915F, 0x6172, 0x9160,
01440     0x6173, 0x9161, 0x6174, 0x9162, 0x6175, 0xE3BC, 0x6176, 0x9163,
01441     0x6177, 0xBFB6, 0x6178, 0x9164, 0x6179, 0x9165, 0x617A, 0x9166,
01442     0x617B, 0x9167, 0x617C, 0x9168, 0x617D, 0x9169, 0x617E, 0x916A,
01443     0x617F, 0x916B, 0x6180, 0x916C, 0x6181, 0x916D, 0x6182, 0x916E,
01444     0x6183, 0x916F, 0x6184, 0x9170, 0x6185, 0x9171, 0x6186, 0x9172,
01445     0x6187, 0x9173, 0x6188, 0x9174, 0x6189, 0x9175, 0x618A, 0x9176,
01446     0x618B, 0xB1EF, 0x618C, 0x9177, 0x618D, 0x9178, 0x618E, 0xD4F7,
01447     0x618F, 0x9179, 0x6190, 0x917A, 0x6191, 0x917B, 0x6192, 0x917C,
01448     0x6193, 0x917D, 0x6194, 0xE3BE, 0x6195, 0x917E, 0x6196, 0x9180,
01449     0x6197, 0x9181, 0x6198, 0x9182, 0x6199, 0x9183, 0x619A, 0x9184,
01450     0x619B, 0x9185, 0x619C, 0x9186, 0x619D, 0xEDAD, 0x619E, 0x9187,
01451     0x619F, 0x9188, 0x61A0, 0x9189, 0x61A1, 0x918A, 0x61A2, 0x918B,
01452     0x61A3, 0x918C, 0x61A4, 0x918D, 0x61A5, 0x918E, 0x61A6, 0x918F,
01453     0x61A7, 0xE3BF, 0x61A8, 0xBAA9, 0x61A9, 0xEDAC, 0x61AA, 0x9190,
01454     0x61AB, 0x9191, 0x61AC, 0xE3BD, 0x61AD, 0x9192, 0x61AE, 0x9193,
01455     0x61AF, 0x9194, 0x61B0, 0x9195, 0x61B1, 0x9196, 0x61B2, 0x9197,
01456     0x61B3, 0x9198, 0x61B4, 0x9199, 0x61B5, 0x919A, 0x61B6, 0x919B,
01457     0x61B7, 0xE3C0, 0x61B8, 0x919C, 0x61B9, 0x919D, 0x61BA, 0x919E,
01458     0x61BB, 0x919F, 0x61BC, 0x91A0, 0x61BD, 0x91A1, 0x61BE, 0xBAB6,
01459     0x61BF, 0x91A2, 0x61C0, 0x91A3, 0x61C1, 0x91A4, 0x61C2, 0xB6AE,
01460     0x61C3, 0x91A5, 0x61C4, 0x91A6, 0x61C5, 0x91A7, 0x61C6, 0x91A8,
01461     0x61C7, 0x91A9, 0x61C8, 0xD0B8, 0x61C9, 0x91AA, 0x61CA, 0xB0C3,
01462     0x61CB, 0xEDAE, 0x61CC, 0x91AB, 0x61CD, 0x91AC, 0x61CE, 0x91AD,
01463     0x61CF, 0x91AE, 0x61D0, 0x91AF, 0x61D1, 0xEDAF, 0x61D2, 0xC0C1,
01464     0x61D3, 0x91B0, 0x61D4, 0xE3C1, 0x61D5, 0x91B1, 0x61D6, 0x91B2,
01465     0x61D7, 0x91B3, 0x61D8, 0x91B4, 0x61D9, 0x91B5, 0x61DA, 0x91B6,
01466     0x61DB, 0x91B7, 0x61DC, 0x91B8, 0x61DD, 0x91B9, 0x61DE, 0x91BA,
01467     0x61DF, 0x91BB, 0x61E0, 0x91BC, 0x61E1, 0x91BD, 0x61E2, 0x91BE,
01468     0x61E3, 0x91BF, 0x61E4, 0x91C0, 0x61E5, 0x91C1, 0x61E6, 0xC5B3,
01469     0x61E7, 0x91C2, 0x61E8, 0x91C3, 0x61E9, 0x91C4, 0x61EA, 0x91C5,
01470     0x61EB, 0x91C6, 0x61EC, 0x91C7, 0x61ED, 0x91C8, 0x61EE, 0x91C9,
01471     0x61EF, 0x91CA, 0x61F0, 0x91CB, 0x61F1, 0x91CC, 0x61F2, 0x91CD,
01472     0x61F3, 0x91CE, 0x61F4, 0x91CF, 0x61F5, 0xE3C2, 0x61F6, 0x91D0,
01473     0x61F7, 0x91D1, 0x61F8, 0x91D2, 0x61F9, 0x91D3, 0x61FA, 0x91D4,
01474     0x61FB, 0x91D5, 0x61FC, 0x91D6, 0x61FD, 0x91D7, 0x61FE, 0x91D8,
01475     0x61FF, 0xDCB2, 0x6200, 0x91D9, 0x6201, 0x91DA, 0x6202, 0x91DB,
01476     0x6203, 0x91DC, 0x6204, 0x91DD, 0x6205, 0x91DE, 0x6206, 0xEDB0,
01477     0x6207, 0x91DF, 0x6208, 0xB8EA, 0x6209, 0x91E0, 0x620A, 0xCEEC,
01478     0x620B, 0xEAA7, 0x620C, 0xD0E7, 0x620D, 0xCAF9, 0x620E, 0xC8D6,
01479     0x620F, 0xCFB7, 0x6210, 0xB3C9, 0x6211, 0xCED2, 0x6212, 0xBDE4,
01480     0x6213, 0x91E1, 0x6214, 0x91E2, 0x6215, 0xE3DE, 0x6216, 0xBBF2,
01481     0x6217, 0xEAA8, 0x6218, 0xD5BD, 0x6219, 0x91E3, 0x621A, 0xC6DD,
01482     0x621B, 0xEAA9, 0x621C, 0x91E4, 0x621D, 0x91E5, 0x621E, 0x91E6,
01483     0x621F, 0xEAAA, 0x6220, 0x91E7, 0x6221, 0xEAAC, 0x6222, 0xEAAB,
01484     0x6223, 0x91E8, 0x6224, 0xEAAE, 0x6225, 0xEAAD, 0x6226, 0x91E9,
01485     0x6227, 0x91EA, 0x6228, 0x91EB, 0x6229, 0x91EC, 0x622A, 0xBDD8,
01486     0x622B, 0x91ED, 0x622C, 0xEAAF, 0x622D, 0x91EE, 0x622E, 0xC2BE,
01487     0x622F, 0x91EF, 0x6230, 0x91F0, 0x6231, 0x91F1, 0x6232, 0x91F2,
01488     0x6233, 0xB4C1, 0x6234, 0xB4F7, 0x6235, 0x91F3, 0x6236, 0x91F4,
01489     0x6237, 0xBBA7, 0x6238, 0x91F5, 0x6239, 0x91F6, 0x623A, 0x91F7,
01490     0x623B, 0x91F8, 0x623C, 0x91F9, 0x623D, 0xECE6, 0x623E, 0xECE5,
01491     0x623F, 0xB7BF, 0x6240, 0xCBF9, 0x6241, 0xB1E2, 0x6242, 0x91FA,
01492     0x6243, 0xECE7, 0x6244, 0x91FB, 0x6245, 0x91FC, 0x6246, 0x91FD,
01493     0x6247, 0xC9C8, 0x6248, 0xECE8, 0x6249, 0xECE9, 0x624A, 0x91FE,
01494     0x624B, 0xCAD6, 0x624C, 0xDED0, 0x624D, 0xB2C5, 0x624E, 0xD4FA,
01495     0x624F, 0x9240, 0x6250, 0x9241, 0x6251, 0xC6CB, 0x6252, 0xB0C7,
01496     0x6253, 0xB4F2, 0x6254, 0xC8D3, 0x6255, 0x9242, 0x6256, 0x9243,
01497     0x6257, 0x9244, 0x6258, 0xCDD0, 0x6259, 0x9245, 0x625A, 0x9246,
01498     0x625B, 0xBFB8, 0x625C, 0x9247, 0x625D, 0x9248, 0x625E, 0x9249,
01499     0x625F, 0x924A, 0x6260, 0x924B, 0x6261, 0x924C, 0x6262, 0x924D,
01500     0x6263, 0xBFDB, 0x6264, 0x924E, 0x6265, 0x924F, 0x6266, 0xC7A4,
01501     0x6267, 0xD6B4, 0x6268, 0x9250, 0x6269, 0xC0A9, 0x626A, 0xDED1,
01502     0x626B, 0xC9A8, 0x626C, 0xD1EF, 0x626D, 0xC5A4, 0x626E, 0xB0E7,
01503     0x626F, 0xB3B6, 0x6270, 0xC8C5, 0x6271, 0x9251, 0x6272, 0x9252,
01504     0x6273, 0xB0E2, 0x6274, 0x9253, 0x6275, 0x9254, 0x6276, 0xB7F6,
01505     0x6277, 0x9255, 0x6278, 0x9256, 0x6279, 0xC5FA, 0x627A, 0x9257,
01506     0x627B, 0x9258, 0x627C, 0xB6F3, 0x627D, 0x9259, 0x627E, 0xD5D2,
01507     0x627F, 0xB3D0, 0x6280, 0xBCBC, 0x6281, 0x925A, 0x6282, 0x925B,
01508     0x6283, 0x925C, 0x6284, 0xB3AD, 0x6285, 0x925D, 0x6286, 0x925E,
01509     0x6287, 0x925F, 0x6288, 0x9260, 0x6289, 0xBEF1, 0x628A, 0xB0D1,
01510     0x628B, 0x9261, 0x628C, 0x9262, 0x628D, 0x9263, 0x628E, 0x9264,
01511     0x628F, 0x9265, 0x6290, 0x9266, 0x6291, 0xD2D6, 0x6292, 0xCAE3,
01512     0x6293, 0xD7A5, 0x6294, 0x9267, 0x6295, 0xCDB6, 0x6296, 0xB6B6,
01513     0x6297, 0xBFB9, 0x6298, 0xD5DB, 0x6299, 0x9268, 0x629A, 0xB8A7,
01514     0x629B, 0xC5D7, 0x629C, 0x9269, 0x629D, 0x926A, 0x629E, 0x926B,
01515     0x629F, 0xDED2, 0x62A0, 0xBFD9, 0x62A1, 0xC2D5, 0x62A2, 0xC7C0,
01516     0x62A3, 0x926C, 0x62A4, 0xBBA4, 0x62A5, 0xB1A8, 0x62A6, 0x926D,
01517     0x62A7, 0x926E, 0x62A8, 0xC5EA, 0x62A9, 0x926F, 0x62AA, 0x9270,
01518     0x62AB, 0xC5FB, 0x62AC, 0xCCA7, 0x62AD, 0x9271, 0x62AE, 0x9272,
01519     0x62AF, 0x9273, 0x62B0, 0x9274, 0x62B1, 0xB1A7, 0x62B2, 0x9275,
01520     0x62B3, 0x9276, 0x62B4, 0x9277, 0x62B5, 0xB5D6, 0x62B6, 0x9278,
01521     0x62B7, 0x9279, 0x62B8, 0x927A, 0x62B9, 0xC4A8, 0x62BA, 0x927B,
01522     0x62BB, 0xDED3, 0x62BC, 0xD1BA, 0x62BD, 0xB3E9, 0x62BE, 0x927C,
01523     0x62BF, 0xC3F2, 0x62C0, 0x927D, 0x62C1, 0x927E, 0x62C2, 0xB7F7,
01524     0x62C3, 0x9280, 0x62C4, 0xD6F4, 0x62C5, 0xB5A3, 0x62C6, 0xB2F0,
01525     0x62C7, 0xC4B4, 0x62C8, 0xC4E9, 0x62C9, 0xC0AD, 0x62CA, 0xDED4,
01526     0x62CB, 0x9281, 0x62CC, 0xB0E8, 0x62CD, 0xC5C4, 0x62CE, 0xC1E0,
01527     0x62CF, 0x9282, 0x62D0, 0xB9D5, 0x62D1, 0x9283, 0x62D2, 0xBEDC,
01528     0x62D3, 0xCDD8, 0x62D4, 0xB0CE, 0x62D5, 0x9284, 0x62D6, 0xCDCF,
01529     0x62D7, 0xDED6, 0x62D8, 0xBED0, 0x62D9, 0xD7BE, 0x62DA, 0xDED5,
01530     0x62DB, 0xD5D0, 0x62DC, 0xB0DD, 0x62DD, 0x9285, 0x62DE, 0x9286,
01531     0x62DF, 0xC4E2, 0x62E0, 0x9287, 0x62E1, 0x9288, 0x62E2, 0xC2A3,
01532     0x62E3, 0xBCF0, 0x62E4, 0x9289, 0x62E5, 0xD3B5, 0x62E6, 0xC0B9,
01533     0x62E7, 0xC5A1, 0x62E8, 0xB2A6, 0x62E9, 0xD4F1, 0x62EA, 0x928A,
01534     0x62EB, 0x928B, 0x62EC, 0xC0A8, 0x62ED, 0xCAC3, 0x62EE, 0xDED7,
01535     0x62EF, 0xD5FC, 0x62F0, 0x928C, 0x62F1, 0xB9B0, 0x62F2, 0x928D,
01536     0x62F3, 0xC8AD, 0x62F4, 0xCBA9, 0x62F5, 0x928E, 0x62F6, 0xDED9,
01537     0x62F7, 0xBFBD, 0x62F8, 0x928F, 0x62F9, 0x9290, 0x62FA, 0x9291,
01538     0x62FB, 0x9292, 0x62FC, 0xC6B4, 0x62FD, 0xD7A7, 0x62FE, 0xCAB0,
01539     0x62FF, 0xC4C3, 0x6300, 0x9293, 0x6301, 0xB3D6, 0x6302, 0xB9D2,
01540     0x6303, 0x9294, 0x6304, 0x9295, 0x6305, 0x9296, 0x6306, 0x9297,
01541     0x6307, 0xD6B8, 0x6308, 0xEAFC, 0x6309, 0xB0B4, 0x630A, 0x9298,
01542     0x630B, 0x9299, 0x630C, 0x929A, 0x630D, 0x929B, 0x630E, 0xBFE6,
01543     0x630F, 0x929C, 0x6310, 0x929D, 0x6311, 0xCCF4, 0x6312, 0x929E,
01544     0x6313, 0x929F, 0x6314, 0x92A0, 0x6315, 0x92A1, 0x6316, 0xCDDA,
01545     0x6317, 0x92A2, 0x6318, 0x92A3, 0x6319, 0x92A4, 0x631A, 0xD6BF,
01546     0x631B, 0xC2CE, 0x631C, 0x92A5, 0x631D, 0xCECE, 0x631E, 0xCCA2,
01547     0x631F, 0xD0AE, 0x6320, 0xC4D3, 0x6321, 0xB5B2, 0x6322, 0xDED8,
01548     0x6323, 0xD5F5, 0x6324, 0xBCB7, 0x6325, 0xBBD3, 0x6326, 0x92A6,
01549     0x6327, 0x92A7, 0x6328, 0xB0A4, 0x6329, 0x92A8, 0x632A, 0xC5B2,
01550     0x632B, 0xB4EC, 0x632C, 0x92A9, 0x632D, 0x92AA, 0x632E, 0x92AB,
01551     0x632F, 0xD5F1, 0x6330, 0x92AC, 0x6331, 0x92AD, 0x6332, 0xEAFD,
01552     0x6333, 0x92AE, 0x6334, 0x92AF, 0x6335, 0x92B0, 0x6336, 0x92B1,
01553     0x6337, 0x92B2, 0x6338, 0x92B3, 0x6339, 0xDEDA, 0x633A, 0xCDA6,
01554     0x633B, 0x92B4, 0x633C, 0x92B5, 0x633D, 0xCDEC, 0x633E, 0x92B6,
01555     0x633F, 0x92B7, 0x6340, 0x92B8, 0x6341, 0x92B9, 0x6342, 0xCEE6,
01556     0x6343, 0xDEDC, 0x6344, 0x92BA, 0x6345, 0xCDB1, 0x6346, 0xC0A6,
01557     0x6347, 0x92BB, 0x6348, 0x92BC, 0x6349, 0xD7BD, 0x634A, 0x92BD,
01558     0x634B, 0xDEDB, 0x634C, 0xB0C6, 0x634D, 0xBAB4, 0x634E, 0xC9D3,
01559     0x634F, 0xC4F3, 0x6350, 0xBEE8, 0x6351, 0x92BE, 0x6352, 0x92BF,
01560     0x6353, 0x92C0, 0x6354, 0x92C1, 0x6355, 0xB2B6, 0x6356, 0x92C2,
01561     0x6357, 0x92C3, 0x6358, 0x92C4, 0x6359, 0x92C5, 0x635A, 0x92C6,
01562     0x635B, 0x92C7, 0x635C, 0x92C8, 0x635D, 0x92C9, 0x635E, 0xC0CC,
01563     0x635F, 0xCBF0, 0x6360, 0x92CA, 0x6361, 0xBCF1, 0x6362, 0xBBBB,
01564     0x6363, 0xB5B7, 0x6364, 0x92CB, 0x6365, 0x92CC, 0x6366, 0x92CD,
01565     0x6367, 0xC5F5, 0x6368, 0x92CE, 0x6369, 0xDEE6, 0x636A, 0x92CF,
01566     0x636B, 0x92D0, 0x636C, 0x92D1, 0x636D, 0xDEE3, 0x636E, 0xBEDD,
01567     0x636F, 0x92D2, 0x6370, 0x92D3, 0x6371, 0xDEDF, 0x6372, 0x92D4,
01568     0x6373, 0x92D5, 0x6374, 0x92D6, 0x6375, 0x92D7, 0x6376, 0xB4B7,
01569     0x6377, 0xBDDD, 0x6378, 0x92D8, 0x6379, 0x92D9, 0x637A, 0xDEE0,
01570     0x637B, 0xC4ED, 0x637C, 0x92DA, 0x637D, 0x92DB, 0x637E, 0x92DC,
01571     0x637F, 0x92DD, 0x6380, 0xCFC6, 0x6381, 0x92DE, 0x6382, 0xB5E0,
01572     0x6383, 0x92DF, 0x6384, 0x92E0, 0x6385, 0x92E1, 0x6386, 0x92E2,
01573     0x6387, 0xB6DE, 0x6388, 0xCADA, 0x6389, 0xB5F4, 0x638A, 0xDEE5,
01574     0x638B, 0x92E3, 0x638C, 0xD5C6, 0x638D, 0x92E4, 0x638E, 0xDEE1,
01575     0x638F, 0xCCCD, 0x6390, 0xC6FE, 0x6391, 0x92E5, 0x6392, 0xC5C5,
01576     0x6393, 0x92E6, 0x6394, 0x92E7, 0x6395, 0x92E8, 0x6396, 0xD2B4,
01577     0x6397, 0x92E9, 0x6398, 0xBEF2, 0x6399, 0x92EA, 0x639A, 0x92EB,
01578     0x639B, 0x92EC, 0x639C, 0x92ED, 0x639D, 0x92EE, 0x639E, 0x92EF,
01579     0x639F, 0x92F0, 0x63A0, 0xC2D3, 0x63A1, 0x92F1, 0x63A2, 0xCCBD,
01580     0x63A3, 0xB3B8, 0x63A4, 0x92F2, 0x63A5, 0xBDD3, 0x63A6, 0x92F3,
01581     0x63A7, 0xBFD8, 0x63A8, 0xCDC6, 0x63A9, 0xD1DA, 0x63AA, 0xB4EB,
01582     0x63AB, 0x92F4, 0x63AC, 0xDEE4, 0x63AD, 0xDEDD, 0x63AE, 0xDEE7,
01583     0x63AF, 0x92F5, 0x63B0, 0xEAFE, 0x63B1, 0x92F6, 0x63B2, 0x92F7,
01584     0x63B3, 0xC2B0, 0x63B4, 0xDEE2, 0x63B5, 0x92F8, 0x63B6, 0x92F9,
01585     0x63B7, 0xD6C0, 0x63B8, 0xB5A7, 0x63B9, 0x92FA, 0x63BA, 0xB2F4,
01586     0x63BB, 0x92FB, 0x63BC, 0xDEE8, 0x63BD, 0x92FC, 0x63BE, 0xDEF2,
01587     0x63BF, 0x92FD, 0x63C0, 0x92FE, 0x63C1, 0x9340, 0x63C2, 0x9341,
01588     0x63C3, 0x9342, 0x63C4, 0xDEED, 0x63C5, 0x9343, 0x63C6, 0xDEF1,
01589     0x63C7, 0x9344, 0x63C8, 0x9345, 0x63C9, 0xC8E0, 0x63CA, 0x9346,
01590     0x63CB, 0x9347, 0x63CC, 0x9348, 0x63CD, 0xD7E1, 0x63CE, 0xDEEF,
01591     0x63CF, 0xC3E8, 0x63D0, 0xCCE1, 0x63D1, 0x9349, 0x63D2, 0xB2E5,
01592     0x63D3, 0x934A, 0x63D4, 0x934B, 0x63D5, 0x934C, 0x63D6, 0xD2BE,
01593     0x63D7, 0x934D, 0x63D8, 0x934E, 0x63D9, 0x934F, 0x63DA, 0x9350,
01594     0x63DB, 0x9351, 0x63DC, 0x9352, 0x63DD, 0x9353, 0x63DE, 0xDEEE,
01595     0x63DF, 0x9354, 0x63E0, 0xDEEB, 0x63E1, 0xCED5, 0x63E2, 0x9355,
01596     0x63E3, 0xB4A7, 0x63E4, 0x9356, 0x63E5, 0x9357, 0x63E6, 0x9358,
01597     0x63E7, 0x9359, 0x63E8, 0x935A, 0x63E9, 0xBFAB, 0x63EA, 0xBEBE,
01598     0x63EB, 0x935B, 0x63EC, 0x935C, 0x63ED, 0xBDD2, 0x63EE, 0x935D,
01599     0x63EF, 0x935E, 0x63F0, 0x935F, 0x63F1, 0x9360, 0x63F2, 0xDEE9,
01600     0x63F3, 0x9361, 0x63F4, 0xD4AE, 0x63F5, 0x9362, 0x63F6, 0xDEDE,
01601     0x63F7, 0x9363, 0x63F8, 0xDEEA, 0x63F9, 0x9364, 0x63FA, 0x9365,
01602     0x63FB, 0x9366, 0x63FC, 0x9367, 0x63FD, 0xC0BF, 0x63FE, 0x9368,
01603     0x63FF, 0xDEEC, 0x6400, 0xB2F3, 0x6401, 0xB8E9, 0x6402, 0xC2A7,
01604     0x6403, 0x9369, 0x6404, 0x936A, 0x6405, 0xBDC1, 0x6406, 0x936B,
01605     0x6407, 0x936C, 0x6408, 0x936D, 0x6409, 0x936E, 0x640A, 0x936F,
01606     0x640B, 0xDEF5, 0x640C, 0xDEF8, 0x640D, 0x9370, 0x640E, 0x9371,
01607     0x640F, 0xB2AB, 0x6410, 0xB4A4, 0x6411, 0x9372, 0x6412, 0x9373,
01608     0x6413, 0xB4EA, 0x6414, 0xC9A6, 0x6415, 0x9374, 0x6416, 0x9375,
01609     0x6417, 0x9376, 0x6418, 0x9377, 0x6419, 0x9378, 0x641A, 0x9379,
01610     0x641B, 0xDEF6, 0x641C, 0xCBD1, 0x641D, 0x937A, 0x641E, 0xB8E3,
01611     0x641F, 0x937B, 0x6420, 0xDEF7, 0x6421, 0xDEFA, 0x6422, 0x937C,
01612     0x6423, 0x937D, 0x6424, 0x937E, 0x6425, 0x9380, 0x6426, 0xDEF9,
01613     0x6427, 0x9381, 0x6428, 0x9382, 0x6429, 0x9383, 0x642A, 0xCCC2,
01614     0x642B, 0x9384, 0x642C, 0xB0E1, 0x642D, 0xB4EE, 0x642E, 0x9385,
01615     0x642F, 0x9386, 0x6430, 0x9387, 0x6431, 0x9388, 0x6432, 0x9389,
01616     0x6433, 0x938A, 0x6434, 0xE5BA, 0x6435, 0x938B, 0x6436, 0x938C,
01617     0x6437, 0x938D, 0x6438, 0x938E, 0x6439, 0x938F, 0x643A, 0xD0AF,
01618     0x643B, 0x9390, 0x643C, 0x9391, 0x643D, 0xB2EB, 0x643E, 0x9392,
01619     0x643F, 0xEBA1, 0x6440, 0x9393, 0x6441, 0xDEF4, 0x6442, 0x9394,
01620     0x6443, 0x9395, 0x6444, 0xC9E3, 0x6445, 0xDEF3, 0x6446, 0xB0DA,
01621     0x6447, 0xD2A1, 0x6448, 0xB1F7, 0x6449, 0x9396, 0x644A, 0xCCAF,
01622     0x644B, 0x9397, 0x644C, 0x9398, 0x644D, 0x9399, 0x644E, 0x939A,
01623     0x644F, 0x939B, 0x6450, 0x939C, 0x6451, 0x939D, 0x6452, 0xDEF0,
01624     0x6453, 0x939E, 0x6454, 0xCBA4, 0x6455, 0x939F, 0x6456, 0x93A0,
01625     0x6457, 0x93A1, 0x6458, 0xD5AA, 0x6459, 0x93A2, 0x645A, 0x93A3,
01626     0x645B, 0x93A4, 0x645C, 0x93A5, 0x645D, 0x93A6, 0x645E, 0xDEFB,
01627     0x645F, 0x93A7, 0x6460, 0x93A8, 0x6461, 0x93A9, 0x6462, 0x93AA,
01628     0x6463, 0x93AB, 0x6464, 0x93AC, 0x6465, 0x93AD, 0x6466, 0x93AE,
01629     0x6467, 0xB4DD, 0x6468, 0x93AF, 0x6469, 0xC4A6, 0x646A, 0x93B0,
01630     0x646B, 0x93B1, 0x646C, 0x93B2, 0x646D, 0xDEFD, 0x646E, 0x93B3,
01631     0x646F, 0x93B4, 0x6470, 0x93B5, 0x6471, 0x93B6, 0x6472, 0x93B7,
01632     0x6473, 0x93B8, 0x6474, 0x93B9, 0x6475, 0x93BA, 0x6476, 0x93BB,
01633     0x6477, 0x93BC, 0x6478, 0xC3FE, 0x6479, 0xC4A1, 0x647A, 0xDFA1,
01634     0x647B, 0x93BD, 0x647C, 0x93BE, 0x647D, 0x93BF, 0x647E, 0x93C0,
01635     0x647F, 0x93C1, 0x6480, 0x93C2, 0x6481, 0x93C3, 0x6482, 0xC1CC,
01636     0x6483, 0x93C4, 0x6484, 0xDEFC, 0x6485, 0xBEEF, 0x6486, 0x93C5,
01637     0x6487, 0xC6B2, 0x6488, 0x93C6, 0x6489, 0x93C7, 0x648A, 0x93C8,
01638     0x648B, 0x93C9, 0x648C, 0x93CA, 0x648D, 0x93CB, 0x648E, 0x93CC,
01639     0x648F, 0x93CD, 0x6490, 0x93CE, 0x6491, 0xB3C5, 0x6492, 0xC8F6,
01640     0x6493, 0x93CF, 0x6494, 0x93D0, 0x6495, 0xCBBA, 0x6496, 0xDEFE,
01641     0x6497, 0x93D1, 0x6498, 0x93D2, 0x6499, 0xDFA4, 0x649A, 0x93D3,
01642     0x649B, 0x93D4, 0x649C, 0x93D5, 0x649D, 0x93D6, 0x649E, 0xD7B2,
01643     0x649F, 0x93D7, 0x64A0, 0x93D8, 0x64A1, 0x93D9, 0x64A2, 0x93DA,
01644     0x64A3, 0x93DB, 0x64A4, 0xB3B7, 0x64A5, 0x93DC, 0x64A6, 0x93DD,
01645     0x64A7, 0x93DE, 0x64A8, 0x93DF, 0x64A9, 0xC1C3, 0x64AA, 0x93E0,
01646     0x64AB, 0x93E1, 0x64AC, 0xC7CB, 0x64AD, 0xB2A5, 0x64AE, 0xB4E9,
01647     0x64AF, 0x93E2, 0x64B0, 0xD7AB, 0x64B1, 0x93E3, 0x64B2, 0x93E4,
01648     0x64B3, 0x93E5, 0x64B4, 0x93E6, 0x64B5, 0xC4EC, 0x64B6, 0x93E7,
01649     0x64B7, 0xDFA2, 0x64B8, 0xDFA3, 0x64B9, 0x93E8, 0x64BA, 0xDFA5,
01650     0x64BB, 0x93E9, 0x64BC, 0xBAB3, 0x64BD, 0x93EA, 0x64BE, 0x93EB,
01651     0x64BF, 0x93EC, 0x64C0, 0xDFA6, 0x64C1, 0x93ED, 0x64C2, 0xC0DE,
01652     0x64C3, 0x93EE, 0x64C4, 0x93EF, 0x64C5, 0xC9C3, 0x64C6, 0x93F0,
01653     0x64C7, 0x93F1, 0x64C8, 0x93F2, 0x64C9, 0x93F3, 0x64CA, 0x93F4,
01654     0x64CB, 0x93F5, 0x64CC, 0x93F6, 0x64CD, 0xB2D9, 0x64CE, 0xC7E6,
01655     0x64CF, 0x93F7, 0x64D0, 0xDFA7, 0x64D1, 0x93F8, 0x64D2, 0xC7DC,
01656     0x64D3, 0x93F9, 0x64D4, 0x93FA, 0x64D5, 0x93FB, 0x64D6, 0x93FC,
01657     0x64D7, 0xDFA8, 0x64D8, 0xEBA2, 0x64D9, 0x93FD, 0x64DA, 0x93FE,
01658     0x64DB, 0x9440, 0x64DC, 0x9441, 0x64DD, 0x9442, 0x64DE, 0xCBD3,
01659     0x64DF, 0x9443, 0x64E0, 0x9444, 0x64E1, 0x9445, 0x64E2, 0xDFAA,
01660     0x64E3, 0x9446, 0x64E4, 0xDFA9, 0x64E5, 0x9447, 0x64E6, 0xB2C1,
01661     0x64E7, 0x9448, 0x64E8, 0x9449, 0x64E9, 0x944A, 0x64EA, 0x944B,
01662     0x64EB, 0x944C, 0x64EC, 0x944D, 0x64ED, 0x944E, 0x64EE, 0x944F,
01663     0x64EF, 0x9450, 0x64F0, 0x9451, 0x64F1, 0x9452, 0x64F2, 0x9453,
01664     0x64F3, 0x9454, 0x64F4, 0x9455, 0x64F5, 0x9456, 0x64F6, 0x9457,
01665     0x64F7, 0x9458, 0x64F8, 0x9459, 0x64F9, 0x945A, 0x64FA, 0x945B,
01666     0x64FB, 0x945C, 0x64FC, 0x945D, 0x64FD, 0x945E, 0x64FE, 0x945F,
01667     0x64FF, 0x9460, 0x6500, 0xC5CA, 0x6501, 0x9461, 0x6502, 0x9462,
01668     0x6503, 0x9463, 0x6504, 0x9464, 0x6505, 0x9465, 0x6506, 0x9466,
01669     0x6507, 0x9467, 0x6508, 0x9468, 0x6509, 0xDFAB, 0x650A, 0x9469,
01670     0x650B, 0x946A, 0x650C, 0x946B, 0x650D, 0x946C, 0x650E, 0x946D,
01671     0x650F, 0x946E, 0x6510, 0x946F, 0x6511, 0x9470, 0x6512, 0xD4DC,
01672     0x6513, 0x9471, 0x6514, 0x9472, 0x6515, 0x9473, 0x6516, 0x9474,
01673     0x6517, 0x9475, 0x6518, 0xC8C1, 0x6519, 0x9476, 0x651A, 0x9477,
01674     0x651B, 0x9478, 0x651C, 0x9479, 0x651D, 0x947A, 0x651E, 0x947B,
01675     0x651F, 0x947C, 0x6520, 0x947D, 0x6521, 0x947E, 0x6522, 0x9480,
01676     0x6523, 0x9481, 0x6524, 0x9482, 0x6525, 0xDFAC, 0x6526, 0x9483,
01677     0x6527, 0x9484, 0x6528, 0x9485, 0x6529, 0x9486, 0x652A, 0x9487,
01678     0x652B, 0xBEF0, 0x652C, 0x9488, 0x652D, 0x9489, 0x652E, 0xDFAD,
01679     0x652F, 0xD6A7, 0x6530, 0x948A, 0x6531, 0x948B, 0x6532, 0x948C,
01680     0x6533, 0x948D, 0x6534, 0xEAB7, 0x6535, 0xEBB6, 0x6536, 0xCAD5,
01681     0x6537, 0x948E, 0x6538, 0xD8FC, 0x6539, 0xB8C4, 0x653A, 0x948F,
01682     0x653B, 0xB9A5, 0x653C, 0x9490, 0x653D, 0x9491, 0x653E, 0xB7C5,
01683     0x653F, 0xD5FE, 0x6540, 0x9492, 0x6541, 0x9493, 0x6542, 0x9494,
01684     0x6543, 0x9495, 0x6544, 0x9496, 0x6545, 0xB9CA, 0x6546, 0x9497,
01685     0x6547, 0x9498, 0x6548, 0xD0A7, 0x6549, 0xF4CD, 0x654A, 0x9499,
01686     0x654B, 0x949A, 0x654C, 0xB5D0, 0x654D, 0x949B, 0x654E, 0x949C,
01687     0x654F, 0xC3F4, 0x6550, 0x949D, 0x6551, 0xBEC8, 0x6552, 0x949E,
01688     0x6553, 0x949F, 0x6554, 0x94A0, 0x6555, 0xEBB7, 0x6556, 0xB0BD,
01689     0x6557, 0x94A1, 0x6558, 0x94A2, 0x6559, 0xBDCC, 0x655A, 0x94A3,
01690     0x655B, 0xC1B2, 0x655C, 0x94A4, 0x655D, 0xB1D6, 0x655E, 0xB3A8,
01691     0x655F, 0x94A5, 0x6560, 0x94A6, 0x6561, 0x94A7, 0x6562, 0xB8D2,
01692     0x6563, 0xC9A2, 0x6564, 0x94A8, 0x6565, 0x94A9, 0x6566, 0xB6D8,
01693     0x6567, 0x94AA, 0x6568, 0x94AB, 0x6569, 0x94AC, 0x656A, 0x94AD,
01694     0x656B, 0xEBB8, 0x656C, 0xBEB4, 0x656D, 0x94AE, 0x656E, 0x94AF,
01695     0x656F, 0x94B0, 0x6570, 0xCAFD, 0x6571, 0x94B1, 0x6572, 0xC7C3,
01696     0x6573, 0x94B2, 0x6574, 0xD5FB, 0x6575, 0x94B3, 0x6576, 0x94B4,
01697     0x6577, 0xB7F3, 0x6578, 0x94B5, 0x6579, 0x94B6, 0x657A, 0x94B7,
01698     0x657B, 0x94B8, 0x657C, 0x94B9, 0x657D, 0x94BA, 0x657E, 0x94BB,
01699     0x657F, 0x94BC, 0x6580, 0x94BD, 0x6581, 0x94BE, 0x6582, 0x94BF,
01700     0x6583, 0x94C0, 0x6584, 0x94C1, 0x6585, 0x94C2, 0x6586, 0x94C3,
01701     0x6587, 0xCEC4, 0x6588, 0x94C4, 0x6589, 0x94C5, 0x658A, 0x94C6,
01702     0x658B, 0xD5AB, 0x658C, 0xB1F3, 0x658D, 0x94C7, 0x658E, 0x94C8,
01703     0x658F, 0x94C9, 0x6590, 0xECB3, 0x6591, 0xB0DF, 0x6592, 0x94CA,
01704     0x6593, 0xECB5, 0x6594, 0x94CB, 0x6595, 0x94CC, 0x6596, 0x94CD,
01705     0x6597, 0xB6B7, 0x6598, 0x94CE, 0x6599, 0xC1CF, 0x659A, 0x94CF,
01706     0x659B, 0xF5FA, 0x659C, 0xD0B1, 0x659D, 0x94D0, 0x659E, 0x94D1,
01707     0x659F, 0xD5E5, 0x65A0, 0x94D2, 0x65A1, 0xCED3, 0x65A2, 0x94D3,
01708     0x65A3, 0x94D4, 0x65A4, 0xBDEF, 0x65A5, 0xB3E2, 0x65A6, 0x94D5,
01709     0x65A7, 0xB8AB, 0x65A8, 0x94D6, 0x65A9, 0xD5B6, 0x65AA, 0x94D7,
01710     0x65AB, 0xEDBD, 0x65AC, 0x94D8, 0x65AD, 0xB6CF, 0x65AE, 0x94D9,
01711     0x65AF, 0xCBB9, 0x65B0, 0xD0C2, 0x65B1, 0x94DA, 0x65B2, 0x94DB,
01712     0x65B3, 0x94DC, 0x65B4, 0x94DD, 0x65B5, 0x94DE, 0x65B6, 0x94DF,
01713     0x65B7, 0x94E0, 0x65B8, 0x94E1, 0x65B9, 0xB7BD, 0x65BA, 0x94E2,
01714     0x65BB, 0x94E3, 0x65BC, 0xECB6, 0x65BD, 0xCAA9, 0x65BE, 0x94E4,
01715     0x65BF, 0x94E5, 0x65C0, 0x94E6, 0x65C1, 0xC5D4, 0x65C2, 0x94E7,
01716     0x65C3, 0xECB9, 0x65C4, 0xECB8, 0x65C5, 0xC2C3, 0x65C6, 0xECB7,
01717     0x65C7, 0x94E8, 0x65C8, 0x94E9, 0x65C9, 0x94EA, 0x65CA, 0x94EB,
01718     0x65CB, 0xD0FD, 0x65CC, 0xECBA, 0x65CD, 0x94EC, 0x65CE, 0xECBB,
01719     0x65CF, 0xD7E5, 0x65D0, 0x94ED, 0x65D1, 0x94EE, 0x65D2, 0xECBC,
01720     0x65D3, 0x94EF, 0x65D4, 0x94F0, 0x65D5, 0x94F1, 0x65D6, 0xECBD,
01721     0x65D7, 0xC6EC, 0x65D8, 0x94F2, 0x65D9, 0x94F3, 0x65DA, 0x94F4,
01722     0x65DB, 0x94F5, 0x65DC, 0x94F6, 0x65DD, 0x94F7, 0x65DE, 0x94F8,
01723     0x65DF, 0x94F9, 0x65E0, 0xCEDE, 0x65E1, 0x94FA, 0x65E2, 0xBCC8,
01724     0x65E3, 0x94FB, 0x65E4, 0x94FC, 0x65E5, 0xC8D5, 0x65E6, 0xB5A9,
01725     0x65E7, 0xBEC9, 0x65E8, 0xD6BC, 0x65E9, 0xD4E7, 0x65EA, 0x94FD,
01726     0x65EB, 0x94FE, 0x65EC, 0xD1AE, 0x65ED, 0xD0F1, 0x65EE, 0xEAB8,
01727     0x65EF, 0xEAB9, 0x65F0, 0xEABA, 0x65F1, 0xBAB5, 0x65F2, 0x9540,
01728     0x65F3, 0x9541, 0x65F4, 0x9542, 0x65F5, 0x9543, 0x65F6, 0xCAB1,
01729     0x65F7, 0xBFF5, 0x65F8, 0x9544, 0x65F9, 0x9545, 0x65FA, 0xCDFA,
01730     0x65FB, 0x9546, 0x65FC, 0x9547, 0x65FD, 0x9548, 0x65FE, 0x9549,
01731     0x65FF, 0x954A, 0x6600, 0xEAC0, 0x6601, 0x954B, 0x6602, 0xB0BA,
01732     0x6603, 0xEABE, 0x6604, 0x954C, 0x6605, 0x954D, 0x6606, 0xC0A5,
01733     0x6607, 0x954E, 0x6608, 0x954F, 0x6609, 0x9550, 0x660A, 0xEABB,
01734     0x660B, 0x9551, 0x660C, 0xB2FD, 0x660D, 0x9552, 0x660E, 0xC3F7,
01735     0x660F, 0xBBE8, 0x6610, 0x9553, 0x6611, 0x9554, 0x6612, 0x9555,
01736     0x6613, 0xD2D7, 0x6614, 0xCEF4, 0x6615, 0xEABF, 0x6616, 0x9556,
01737     0x6617, 0x9557, 0x6618, 0x9558, 0x6619, 0xEABC, 0x661A, 0x9559,
01738     0x661B, 0x955A, 0x661C, 0x955B, 0x661D, 0xEAC3, 0x661E, 0x955C,
01739     0x661F, 0xD0C7, 0x6620, 0xD3B3, 0x6621, 0x955D, 0x6622, 0x955E,
01740     0x6623, 0x955F, 0x6624, 0x9560, 0x6625, 0xB4BA, 0x6626, 0x9561,
01741     0x6627, 0xC3C1, 0x6628, 0xD7F2, 0x6629, 0x9562, 0x662A, 0x9563,
01742     0x662B, 0x9564, 0x662C, 0x9565, 0x662D, 0xD5D1, 0x662E, 0x9566,
01743     0x662F, 0xCAC7, 0x6630, 0x9567, 0x6631, 0xEAC5, 0x6632, 0x9568,
01744     0x6633, 0x9569, 0x6634, 0xEAC4, 0x6635, 0xEAC7, 0x6636, 0xEAC6,
01745     0x6637, 0x956A, 0x6638, 0x956B, 0x6639, 0x956C, 0x663A, 0x956D,
01746     0x663B, 0x956E, 0x663C, 0xD6E7, 0x663D, 0x956F, 0x663E, 0xCFD4,
01747     0x663F, 0x9570, 0x6640, 0x9571, 0x6641, 0xEACB, 0x6642, 0x9572,
01748     0x6643, 0xBBCE, 0x6644, 0x9573, 0x6645, 0x9574, 0x6646, 0x9575,
01749     0x6647, 0x9576, 0x6648, 0x9577, 0x6649, 0x9578, 0x664A, 0x9579,
01750     0x664B, 0xBDFA, 0x664C, 0xC9CE, 0x664D, 0x957A, 0x664E, 0x957B,
01751     0x664F, 0xEACC, 0x6650, 0x957C, 0x6651, 0x957D, 0x6652, 0xC9B9,
01752     0x6653, 0xCFFE, 0x6654, 0xEACA, 0x6655, 0xD4CE, 0x6656, 0xEACD,
01753     0x6657, 0xEACF, 0x6658, 0x957E, 0x6659, 0x9580, 0x665A, 0xCDED,
01754     0x665B, 0x9581, 0x665C, 0x9582, 0x665D, 0x9583, 0x665E, 0x9584,
01755     0x665F, 0xEAC9, 0x6660, 0x9585, 0x6661, 0xEACE, 0x6662, 0x9586,
01756     0x6663, 0x9587, 0x6664, 0xCEEE, 0x6665, 0x9588, 0x6666, 0xBBDE,
01757     0x6667, 0x9589, 0x6668, 0xB3BF, 0x6669, 0x958A, 0x666A, 0x958B,
01758     0x666B, 0x958C, 0x666C, 0x958D, 0x666D, 0x958E, 0x666E, 0xC6D5,
01759     0x666F, 0xBEB0, 0x6670, 0xCEFA, 0x6671, 0x958F, 0x6672, 0x9590,
01760     0x6673, 0x9591, 0x6674, 0xC7E7, 0x6675, 0x9592, 0x6676, 0xBEA7,
01761     0x6677, 0xEAD0, 0x6678, 0x9593, 0x6679, 0x9594, 0x667A, 0xD6C7,
01762     0x667B, 0x9595, 0x667C, 0x9596, 0x667D, 0x9597, 0x667E, 0xC1C0,
01763     0x667F, 0x9598, 0x6680, 0x9599, 0x6681, 0x959A, 0x6682, 0xD4DD,
01764     0x6683, 0x959B, 0x6684, 0xEAD1, 0x6685, 0x959C, 0x6686, 0x959D,
01765     0x6687, 0xCFBE, 0x6688, 0x959E, 0x6689, 0x959F, 0x668A, 0x95A0,
01766     0x668B, 0x95A1, 0x668C, 0xEAD2, 0x668D, 0x95A2, 0x668E, 0x95A3,
01767     0x668F, 0x95A4, 0x6690, 0x95A5, 0x6691, 0xCAEE, 0x6692, 0x95A6,
01768     0x6693, 0x95A7, 0x6694, 0x95A8, 0x6695, 0x95A9, 0x6696, 0xC5AF,
01769     0x6697, 0xB0B5, 0x6698, 0x95AA, 0x6699, 0x95AB, 0x669A, 0x95AC,
01770     0x669B, 0x95AD, 0x669C, 0x95AE, 0x669D, 0xEAD4, 0x669E, 0x95AF,
01771     0x669F, 0x95B0, 0x66A0, 0x95B1, 0x66A1, 0x95B2, 0x66A2, 0x95B3,
01772     0x66A3, 0x95B4, 0x66A4, 0x95B5, 0x66A5, 0x95B6, 0x66A6, 0x95B7,
01773     0x66A7, 0xEAD3, 0x66A8, 0xF4DF, 0x66A9, 0x95B8, 0x66AA, 0x95B9,
01774     0x66AB, 0x95BA, 0x66AC, 0x95BB, 0x66AD, 0x95BC, 0x66AE, 0xC4BA,
01775     0x66AF, 0x95BD, 0x66B0, 0x95BE, 0x66B1, 0x95BF, 0x66B2, 0x95C0,
01776     0x66B3, 0x95C1, 0x66B4, 0xB1A9, 0x66B5, 0x95C2, 0x66B6, 0x95C3,
01777     0x66B7, 0x95C4, 0x66B8, 0x95C5, 0x66B9, 0xE5DF, 0x66BA, 0x95C6,
01778     0x66BB, 0x95C7, 0x66BC, 0x95C8, 0x66BD, 0x95C9, 0x66BE, 0xEAD5,
01779     0x66BF, 0x95CA, 0x66C0, 0x95CB, 0x66C1, 0x95CC, 0x66C2, 0x95CD,
01780     0x66C3, 0x95CE, 0x66C4, 0x95CF, 0x66C5, 0x95D0, 0x66C6, 0x95D1,
01781     0x66C7, 0x95D2, 0x66C8, 0x95D3, 0x66C9, 0x95D4, 0x66CA, 0x95D5,
01782     0x66CB, 0x95D6, 0x66CC, 0x95D7, 0x66CD, 0x95D8, 0x66CE, 0x95D9,
01783     0x66CF, 0x95DA, 0x66D0, 0x95DB, 0x66D1, 0x95DC, 0x66D2, 0x95DD,
01784     0x66D3, 0x95DE, 0x66D4, 0x95DF, 0x66D5, 0x95E0, 0x66D6, 0x95E1,
01785     0x66D7, 0x95E2, 0x66D8, 0x95E3, 0x66D9, 0xCAEF, 0x66DA, 0x95E4,
01786     0x66DB, 0xEAD6, 0x66DC, 0xEAD7, 0x66DD, 0xC6D8, 0x66DE, 0x95E5,
01787     0x66DF, 0x95E6, 0x66E0, 0x95E7, 0x66E1, 0x95E8, 0x66E2, 0x95E9,
01788     0x66E3, 0x95EA, 0x66E4, 0x95EB, 0x66E5, 0x95EC, 0x66E6, 0xEAD8,
01789     0x66E7, 0x95ED, 0x66E8, 0x95EE, 0x66E9, 0xEAD9, 0x66EA, 0x95EF,
01790     0x66EB, 0x95F0, 0x66EC, 0x95F1, 0x66ED, 0x95F2, 0x66EE, 0x95F3,
01791     0x66EF, 0x95F4, 0x66F0, 0xD4BB, 0x66F1, 0x95F5, 0x66F2, 0xC7FA,
01792     0x66F3, 0xD2B7, 0x66F4, 0xB8FC, 0x66F5, 0x95F6, 0x66F6, 0x95F7,
01793     0x66F7, 0xEAC2, 0x66F8, 0x95F8, 0x66F9, 0xB2DC, 0x66FA, 0x95F9,
01794     0x66FB, 0x95FA, 0x66FC, 0xC2FC, 0x66FD, 0x95FB, 0x66FE, 0xD4F8,
01795     0x66FF, 0xCCE6, 0x6700, 0xD7EE, 0x6701, 0x95FC, 0x6702, 0x95FD,
01796     0x6703, 0x95FE, 0x6704, 0x9640, 0x6705, 0x9641, 0x6706, 0x9642,
01797     0x6707, 0x9643, 0x6708, 0xD4C2, 0x6709, 0xD3D0, 0x670A, 0xEBC3,
01798     0x670B, 0xC5F3, 0x670C, 0x9644, 0x670D, 0xB7FE, 0x670E, 0x9645,
01799     0x670F, 0x9646, 0x6710, 0xEBD4, 0x6711, 0x9647, 0x6712, 0x9648,
01800     0x6713, 0x9649, 0x6714, 0xCBB7, 0x6715, 0xEBDE, 0x6716, 0x964A,
01801     0x6717, 0xC0CA, 0x6718, 0x964B, 0x6719, 0x964C, 0x671A, 0x964D,
01802     0x671B, 0xCDFB, 0x671C, 0x964E, 0x671D, 0xB3AF, 0x671E, 0x964F,
01803     0x671F, 0xC6DA, 0x6720, 0x9650, 0x6721, 0x9651, 0x6722, 0x9652,
01804     0x6723, 0x9653, 0x6724, 0x9654, 0x6725, 0x9655, 0x6726, 0xEBFC,
01805     0x6727, 0x9656, 0x6728, 0xC4BE, 0x6729, 0x9657, 0x672A, 0xCEB4,
01806     0x672B, 0xC4A9, 0x672C, 0xB1BE, 0x672D, 0xD4FD, 0x672E, 0x9658,
01807     0x672F, 0xCAF5, 0x6730, 0x9659, 0x6731, 0xD6EC, 0x6732, 0x965A,
01808     0x6733, 0x965B, 0x6734, 0xC6D3, 0x6735, 0xB6E4, 0x6736, 0x965C,
01809     0x6737, 0x965D, 0x6738, 0x965E, 0x6739, 0x965F, 0x673A, 0xBBFA,
01810     0x673B, 0x9660, 0x673C, 0x9661, 0x673D, 0xD0E0, 0x673E, 0x9662,
01811     0x673F, 0x9663, 0x6740, 0xC9B1, 0x6741, 0x9664, 0x6742, 0xD4D3,
01812     0x6743, 0xC8A8, 0x6744, 0x9665, 0x6745, 0x9666, 0x6746, 0xB8CB,
01813     0x6747, 0x9667, 0x6748, 0xE8BE, 0x6749, 0xC9BC, 0x674A, 0x9668,
01814     0x674B, 0x9669, 0x674C, 0xE8BB, 0x674D, 0x966A, 0x674E, 0xC0EE,
01815     0x674F, 0xD0D3, 0x6750, 0xB2C4, 0x6751, 0xB4E5, 0x6752, 0x966B,
01816     0x6753, 0xE8BC, 0x6754, 0x966C, 0x6755, 0x966D, 0x6756, 0xD5C8,
01817     0x6757, 0x966E, 0x6758, 0x966F, 0x6759, 0x9670, 0x675A, 0x9671,
01818     0x675B, 0x9672, 0x675C, 0xB6C5, 0x675D, 0x9673, 0x675E, 0xE8BD,
01819     0x675F, 0xCAF8, 0x6760, 0xB8DC, 0x6761, 0xCCF5, 0x6762, 0x9674,
01820     0x6763, 0x9675, 0x6764, 0x9676, 0x6765, 0xC0B4, 0x6766, 0x9677,
01821     0x6767, 0x9678, 0x6768, 0xD1EE, 0x6769, 0xE8BF, 0x676A, 0xE8C2,
01822     0x676B, 0x9679, 0x676C, 0x967A, 0x676D, 0xBABC, 0x676E, 0x967B,
01823     0x676F, 0xB1AD, 0x6770, 0xBDDC, 0x6771, 0x967C, 0x6772, 0xEABD,
01824     0x6773, 0xE8C3, 0x6774, 0x967D, 0x6775, 0xE8C6, 0x6776, 0x967E,
01825     0x6777, 0xE8CB, 0x6778, 0x9680, 0x6779, 0x9681, 0x677A, 0x9682,
01826     0x677B, 0x9683, 0x677C, 0xE8CC, 0x677D, 0x9684, 0x677E, 0xCBC9,
01827     0x677F, 0xB0E5, 0x6780, 0x9685, 0x6781, 0xBCAB, 0x6782, 0x9686,
01828     0x6783, 0x9687, 0x6784, 0xB9B9, 0x6785, 0x9688, 0x6786, 0x9689,
01829     0x6787, 0xE8C1, 0x6788, 0x968A, 0x6789, 0xCDF7, 0x678A, 0x968B,
01830     0x678B, 0xE8CA, 0x678C, 0x968C, 0x678D, 0x968D, 0x678E, 0x968E,
01831     0x678F, 0x968F, 0x6790, 0xCEF6, 0x6791, 0x9690, 0x6792, 0x9691,
01832     0x6793, 0x9692, 0x6794, 0x9693, 0x6795, 0xD5ED, 0x6796, 0x9694,
01833     0x6797, 0xC1D6, 0x6798, 0xE8C4, 0x6799, 0x9695, 0x679A, 0xC3B6,
01834     0x679B, 0x9696, 0x679C, 0xB9FB, 0x679D, 0xD6A6, 0x679E, 0xE8C8,
01835     0x679F, 0x9697, 0x67A0, 0x9698, 0x67A1, 0x9699, 0x67A2, 0xCAE0,
01836     0x67A3, 0xD4E6, 0x67A4, 0x969A, 0x67A5, 0xE8C0, 0x67A6, 0x969B,
01837     0x67A7, 0xE8C5, 0x67A8, 0xE8C7, 0x67A9, 0x969C, 0x67AA, 0xC7B9,
01838     0x67AB, 0xB7E3, 0x67AC, 0x969D, 0x67AD, 0xE8C9, 0x67AE, 0x969E,
01839     0x67AF, 0xBFDD, 0x67B0, 0xE8D2, 0x67B1, 0x969F, 0x67B2, 0x96A0,
01840     0x67B3, 0xE8D7, 0x67B4, 0x96A1, 0x67B5, 0xE8D5, 0x67B6, 0xBCDC,
01841     0x67B7, 0xBCCF, 0x67B8, 0xE8DB, 0x67B9, 0x96A2, 0x67BA, 0x96A3,
01842     0x67BB, 0x96A4, 0x67BC, 0x96A5, 0x67BD, 0x96A6, 0x67BE, 0x96A7,
01843     0x67BF, 0x96A8, 0x67C0, 0x96A9, 0x67C1, 0xE8DE, 0x67C2, 0x96AA,
01844     0x67C3, 0xE8DA, 0x67C4, 0xB1FA, 0x67C5, 0x96AB, 0x67C6, 0x96AC,
01845     0x67C7, 0x96AD, 0x67C8, 0x96AE, 0x67C9, 0x96AF, 0x67CA, 0x96B0,
01846     0x67CB, 0x96B1, 0x67CC, 0x96B2, 0x67CD, 0x96B3, 0x67CE, 0x96B4,
01847     0x67CF, 0xB0D8, 0x67D0, 0xC4B3, 0x67D1, 0xB8CC, 0x67D2, 0xC6E2,
01848     0x67D3, 0xC8BE, 0x67D4, 0xC8E1, 0x67D5, 0x96B5, 0x67D6, 0x96B6,
01849     0x67D7, 0x96B7, 0x67D8, 0xE8CF, 0x67D9, 0xE8D4, 0x67DA, 0xE8D6,
01850     0x67DB, 0x96B8, 0x67DC, 0xB9F1, 0x67DD, 0xE8D8, 0x67DE, 0xD7F5,
01851     0x67DF, 0x96B9, 0x67E0, 0xC4FB, 0x67E1, 0x96BA, 0x67E2, 0xE8DC,
01852     0x67E3, 0x96BB, 0x67E4, 0x96BC, 0x67E5, 0xB2E9, 0x67E6, 0x96BD,
01853     0x67E7, 0x96BE, 0x67E8, 0x96BF, 0x67E9, 0xE8D1, 0x67EA, 0x96C0,
01854     0x67EB, 0x96C1, 0x67EC, 0xBCED, 0x67ED, 0x96C2, 0x67EE, 0x96C3,
01855     0x67EF, 0xBFC2, 0x67F0, 0xE8CD, 0x67F1, 0xD6F9, 0x67F2, 0x96C4,
01856     0x67F3, 0xC1F8, 0x67F4, 0xB2F1, 0x67F5, 0x96C5, 0x67F6, 0x96C6,
01857     0x67F7, 0x96C7, 0x67F8, 0x96C8, 0x67F9, 0x96C9, 0x67FA, 0x96CA,
01858     0x67FB, 0x96CB, 0x67FC, 0x96CC, 0x67FD, 0xE8DF, 0x67FE, 0x96CD,
01859     0x67FF, 0xCAC1, 0x6800, 0xE8D9, 0x6801, 0x96CE, 0x6802, 0x96CF,
01860     0x6803, 0x96D0, 0x6804, 0x96D1, 0x6805, 0xD5A4, 0x6806, 0x96D2,
01861     0x6807, 0xB1EA, 0x6808, 0xD5BB, 0x6809, 0xE8CE, 0x680A, 0xE8D0,
01862     0x680B, 0xB6B0, 0x680C, 0xE8D3, 0x680D, 0x96D3, 0x680E, 0xE8DD,
01863     0x680F, 0xC0B8, 0x6810, 0x96D4, 0x6811, 0xCAF7, 0x6812, 0x96D5,
01864     0x6813, 0xCBA8, 0x6814, 0x96D6, 0x6815, 0x96D7, 0x6816, 0xC6DC,
01865     0x6817, 0xC0F5, 0x6818, 0x96D8, 0x6819, 0x96D9, 0x681A, 0x96DA,
01866     0x681B, 0x96DB, 0x681C, 0x96DC, 0x681D, 0xE8E9, 0x681E, 0x96DD,
01867     0x681F, 0x96DE, 0x6820, 0x96DF, 0x6821, 0xD0A3, 0x6822, 0x96E0,
01868     0x6823, 0x96E1, 0x6824, 0x96E2, 0x6825, 0x96E3, 0x6826, 0x96E4,
01869     0x6827, 0x96E5, 0x6828, 0x96E6, 0x6829, 0xE8F2, 0x682A, 0xD6EA,
01870     0x682B, 0x96E7, 0x682C, 0x96E8, 0x682D, 0x96E9, 0x682E, 0x96EA,
01871     0x682F, 0x96EB, 0x6830, 0x96EC, 0x6831, 0x96ED, 0x6832, 0xE8E0,
01872     0x6833, 0xE8E1, 0x6834, 0x96EE, 0x6835, 0x96EF, 0x6836, 0x96F0,
01873     0x6837, 0xD1F9, 0x6838, 0xBACB, 0x6839, 0xB8F9, 0x683A, 0x96F1,
01874     0x683B, 0x96F2, 0x683C, 0xB8F1, 0x683D, 0xD4D4, 0x683E, 0xE8EF,
01875     0x683F, 0x96F3, 0x6840, 0xE8EE, 0x6841, 0xE8EC, 0x6842, 0xB9F0,
01876     0x6843, 0xCCD2, 0x6844, 0xE8E6, 0x6845, 0xCEA6, 0x6846, 0xBFF2,
01877     0x6847, 0x96F4, 0x6848, 0xB0B8, 0x6849, 0xE8F1, 0x684A, 0xE8F0,
01878     0x684B, 0x96F5, 0x684C, 0xD7C0, 0x684D, 0x96F6, 0x684E, 0xE8E4,
01879     0x684F, 0x96F7, 0x6850, 0xCDA9, 0x6851, 0xC9A3, 0x6852, 0x96F8,
01880     0x6853, 0xBBB8, 0x6854, 0xBDDB, 0x6855, 0xE8EA, 0x6856, 0x96F9,
01881     0x6857, 0x96FA, 0x6858, 0x96FB, 0x6859, 0x96FC, 0x685A, 0x96FD,
01882     0x685B, 0x96FE, 0x685C, 0x9740, 0x685D, 0x9741, 0x685E, 0x9742,
01883     0x685F, 0x9743, 0x6860, 0xE8E2, 0x6861, 0xE8E3, 0x6862, 0xE8E5,
01884     0x6863, 0xB5B5, 0x6864, 0xE8E7, 0x6865, 0xC7C5, 0x6866, 0xE8EB,
01885     0x6867, 0xE8ED, 0x6868, 0xBDB0, 0x6869, 0xD7AE, 0x686A, 0x9744,
01886     0x686B, 0xE8F8, 0x686C, 0x9745, 0x686D, 0x9746, 0x686E, 0x9747,
01887     0x686F, 0x9748, 0x6870, 0x9749, 0x6871, 0x974A, 0x6872, 0x974B,
01888     0x6873, 0x974C, 0x6874, 0xE8F5, 0x6875, 0x974D, 0x6876, 0xCDB0,
01889     0x6877, 0xE8F6, 0x6878, 0x974E, 0x6879, 0x974F, 0x687A, 0x9750,
01890     0x687B, 0x9751, 0x687C, 0x9752, 0x687D, 0x9753, 0x687E, 0x9754,
01891     0x687F, 0x9755, 0x6880, 0x9756, 0x6881, 0xC1BA, 0x6882, 0x9757,
01892     0x6883, 0xE8E8, 0x6884, 0x9758, 0x6885, 0xC3B7, 0x6886, 0xB0F0,
01893     0x6887, 0x9759, 0x6888, 0x975A, 0x6889, 0x975B, 0x688A, 0x975C,
01894     0x688B, 0x975D, 0x688C, 0x975E, 0x688D, 0x975F, 0x688E, 0x9760,
01895     0x688F, 0xE8F4, 0x6890, 0x9761, 0x6891, 0x9762, 0x6892, 0x9763,
01896     0x6893, 0xE8F7, 0x6894, 0x9764, 0x6895, 0x9765, 0x6896, 0x9766,
01897     0x6897, 0xB9A3, 0x6898, 0x9767, 0x6899, 0x9768, 0x689A, 0x9769,
01898     0x689B, 0x976A, 0x689C, 0x976B, 0x689D, 0x976C, 0x689E, 0x976D,
01899     0x689F, 0x976E, 0x68A0, 0x976F, 0x68A1, 0x9770, 0x68A2, 0xC9D2,
01900     0x68A3, 0x9771, 0x68A4, 0x9772, 0x68A5, 0x9773, 0x68A6, 0xC3CE,
01901     0x68A7, 0xCEE0, 0x68A8, 0xC0E6, 0x68A9, 0x9774, 0x68AA, 0x9775,
01902     0x68AB, 0x9776, 0x68AC, 0x9777, 0x68AD, 0xCBF3, 0x68AE, 0x9778,
01903     0x68AF, 0xCCDD, 0x68B0, 0xD0B5, 0x68B1, 0x9779, 0x68B2, 0x977A,
01904     0x68B3, 0xCAE1, 0x68B4, 0x977B, 0x68B5, 0xE8F3, 0x68B6, 0x977C,
01905     0x68B7, 0x977D, 0x68B8, 0x977E, 0x68B9, 0x9780, 0x68BA, 0x9781,
01906     0x68BB, 0x9782, 0x68BC, 0x9783, 0x68BD, 0x9784, 0x68BE, 0x9785,
01907     0x68BF, 0x9786, 0x68C0, 0xBCEC, 0x68C1, 0x9787, 0x68C2, 0xE8F9,
01908     0x68C3, 0x9788, 0x68C4, 0x9789, 0x68C5, 0x978A, 0x68C6, 0x978B,
01909     0x68C7, 0x978C, 0x68C8, 0x978D, 0x68C9, 0xC3DE, 0x68CA, 0x978E,
01910     0x68CB, 0xC6E5, 0x68CC, 0x978F, 0x68CD, 0xB9F7, 0x68CE, 0x9790,
01911     0x68CF, 0x9791, 0x68D0, 0x9792, 0x68D1, 0x9793, 0x68D2, 0xB0F4,
01912     0x68D3, 0x9794, 0x68D4, 0x9795, 0x68D5, 0xD7D8, 0x68D6, 0x9796,
01913     0x68D7, 0x9797, 0x68D8, 0xBCAC, 0x68D9, 0x9798, 0x68DA, 0xC5EF,
01914     0x68DB, 0x9799, 0x68DC, 0x979A, 0x68DD, 0x979B, 0x68DE, 0x979C,
01915     0x68DF, 0x979D, 0x68E0, 0xCCC4, 0x68E1, 0x979E, 0x68E2, 0x979F,
01916     0x68E3, 0xE9A6, 0x68E4, 0x97A0, 0x68E5, 0x97A1, 0x68E6, 0x97A2,
01917     0x68E7, 0x97A3, 0x68E8, 0x97A4, 0x68E9, 0x97A5, 0x68EA, 0x97A6,
01918     0x68EB, 0x97A7, 0x68EC, 0x97A8, 0x68ED, 0x97A9, 0x68EE, 0xC9AD,
01919     0x68EF, 0x97AA, 0x68F0, 0xE9A2, 0x68F1, 0xC0E2, 0x68F2, 0x97AB,
01920     0x68F3, 0x97AC, 0x68F4, 0x97AD, 0x68F5, 0xBFC3, 0x68F6, 0x97AE,
01921     0x68F7, 0x97AF, 0x68F8, 0x97B0, 0x68F9, 0xE8FE, 0x68FA, 0xB9D7,
01922     0x68FB, 0x97B1, 0x68FC, 0xE8FB, 0x68FD, 0x97B2, 0x68FE, 0x97B3,
01923     0x68FF, 0x97B4, 0x6900, 0x97B5, 0x6901, 0xE9A4, 0x6902, 0x97B6,
01924     0x6903, 0x97B7, 0x6904, 0x97B8, 0x6905, 0xD2CE, 0x6906, 0x97B9,
01925     0x6907, 0x97BA, 0x6908, 0x97BB, 0x6909, 0x97BC, 0x690A, 0x97BD,
01926     0x690B, 0xE9A3, 0x690C, 0x97BE, 0x690D, 0xD6B2, 0x690E, 0xD7B5,
01927     0x690F, 0x97BF, 0x6910, 0xE9A7, 0x6911, 0x97C0, 0x6912, 0xBDB7,
01928     0x6913, 0x97C1, 0x6914, 0x97C2, 0x6915, 0x97C3, 0x6916, 0x97C4,
01929     0x6917, 0x97C5, 0x6918, 0x97C6, 0x6919, 0x97C7, 0x691A, 0x97C8,
01930     0x691B, 0x97C9, 0x691C, 0x97CA, 0x691D, 0x97CB, 0x691E, 0x97CC,
01931     0x691F, 0xE8FC, 0x6920, 0xE8FD, 0x6921, 0x97CD, 0x6922, 0x97CE,
01932     0x6923, 0x97CF, 0x6924, 0xE9A1, 0x6925, 0x97D0, 0x6926, 0x97D1,
01933     0x6927, 0x97D2, 0x6928, 0x97D3, 0x6929, 0x97D4, 0x692A, 0x97D5,
01934     0x692B, 0x97D6, 0x692C, 0x97D7, 0x692D, 0xCDD6, 0x692E, 0x97D8,
01935     0x692F, 0x97D9, 0x6930, 0xD2AC, 0x6931, 0x97DA, 0x6932, 0x97DB,
01936     0x6933, 0x97DC, 0x6934, 0xE9B2, 0x6935, 0x97DD, 0x6936, 0x97DE,
01937     0x6937, 0x97DF, 0x6938, 0x97E0, 0x6939, 0xE9A9, 0x693A, 0x97E1,
01938     0x693B, 0x97E2, 0x693C, 0x97E3, 0x693D, 0xB4AA, 0x693E, 0x97E4,
01939     0x693F, 0xB4BB, 0x6940, 0x97E5, 0x6941, 0x97E6, 0x6942, 0xE9AB,
01940     0x6943, 0x97E7, 0x6944, 0x97E8, 0x6945, 0x97E9, 0x6946, 0x97EA,
01941     0x6947, 0x97EB, 0x6948, 0x97EC, 0x6949, 0x97ED, 0x694A, 0x97EE,
01942     0x694B, 0x97EF, 0x694C, 0x97F0, 0x694D, 0x97F1, 0x694E, 0x97F2,
01943     0x694F, 0x97F3, 0x6950, 0x97F4, 0x6951, 0x97F5, 0x6952, 0x97F6,
01944     0x6953, 0x97F7, 0x6954, 0xD0A8, 0x6955, 0x97F8, 0x6956, 0x97F9,
01945     0x6957, 0xE9A5, 0x6958, 0x97FA, 0x6959, 0x97FB, 0x695A, 0xB3FE,
01946     0x695B, 0x97FC, 0x695C, 0x97FD, 0x695D, 0xE9AC, 0x695E, 0xC0E3,
01947     0x695F, 0x97FE, 0x6960, 0xE9AA, 0x6961, 0x9840, 0x6962, 0x9841,
01948     0x6963, 0xE9B9, 0x6964, 0x9842, 0x6965, 0x9843, 0x6966, 0xE9B8,
01949     0x6967, 0x9844, 0x6968, 0x9845, 0x6969, 0x9846, 0x696A, 0x9847,
01950     0x696B, 0xE9AE, 0x696C, 0x9848, 0x696D, 0x9849, 0x696E, 0xE8FA,
01951     0x696F, 0x984A, 0x6970, 0x984B, 0x6971, 0xE9A8, 0x6972, 0x984C,
01952     0x6973, 0x984D, 0x6974, 0x984E, 0x6975, 0x984F, 0x6976, 0x9850,
01953     0x6977, 0xBFAC, 0x6978, 0xE9B1, 0x6979, 0xE9BA, 0x697A, 0x9851,
01954     0x697B, 0x9852, 0x697C, 0xC2A5, 0x697D, 0x9853, 0x697E, 0x9854,
01955     0x697F, 0x9855, 0x6980, 0xE9AF, 0x6981, 0x9856, 0x6982, 0xB8C5,
01956     0x6983, 0x9857, 0x6984, 0xE9AD, 0x6985, 0x9858, 0x6986, 0xD3DC,
01957     0x6987, 0xE9B4, 0x6988, 0xE9B5, 0x6989, 0xE9B7, 0x698A, 0x9859,
01958     0x698B, 0x985A, 0x698C, 0x985B, 0x698D, 0xE9C7, 0x698E, 0x985C,
01959     0x698F, 0x985D, 0x6990, 0x985E, 0x6991, 0x985F, 0x6992, 0x9860,
01960     0x6993, 0x9861, 0x6994, 0xC0C6, 0x6995, 0xE9C5, 0x6996, 0x9862,
01961     0x6997, 0x9863, 0x6998, 0xE9B0, 0x6999, 0x9864, 0x699A, 0x9865,
01962     0x699B, 0xE9BB, 0x699C, 0xB0F1, 0x699D, 0x9866, 0x699E, 0x9867,
01963     0x699F, 0x9868, 0x69A0, 0x9869, 0x69A1, 0x986A, 0x69A2, 0x986B,
01964     0x69A3, 0x986C, 0x69A4, 0x986D, 0x69A5, 0x986E, 0x69A6, 0x986F,
01965     0x69A7, 0xE9BC, 0x69A8, 0xD5A5, 0x69A9, 0x9870, 0x69AA, 0x9871,
01966     0x69AB, 0xE9BE, 0x69AC, 0x9872, 0x69AD, 0xE9BF, 0x69AE, 0x9873,
01967     0x69AF, 0x9874, 0x69B0, 0x9875, 0x69B1, 0xE9C1, 0x69B2, 0x9876,
01968     0x69B3, 0x9877, 0x69B4, 0xC1F1, 0x69B5, 0x9878, 0x69B6, 0x9879,
01969     0x69B7, 0xC8B6, 0x69B8, 0x987A, 0x69B9, 0x987B, 0x69BA, 0x987C,
01970     0x69BB, 0xE9BD, 0x69BC, 0x987D, 0x69BD, 0x987E, 0x69BE, 0x9880,
01971     0x69BF, 0x9881, 0x69C0, 0x9882, 0x69C1, 0xE9C2, 0x69C2, 0x9883,
01972     0x69C3, 0x9884, 0x69C4, 0x9885, 0x69C5, 0x9886, 0x69C6, 0x9887,
01973     0x69C7, 0x9888, 0x69C8, 0x9889, 0x69C9, 0x988A, 0x69CA, 0xE9C3,
01974     0x69CB, 0x988B, 0x69CC, 0xE9B3, 0x69CD, 0x988C, 0x69CE, 0xE9B6,
01975     0x69CF, 0x988D, 0x69D0, 0xBBB1, 0x69D1, 0x988E, 0x69D2, 0x988F,
01976     0x69D3, 0x9890, 0x69D4, 0xE9C0, 0x69D5, 0x9891, 0x69D6, 0x9892,
01977     0x69D7, 0x9893, 0x69D8, 0x9894, 0x69D9, 0x9895, 0x69DA, 0x9896,
01978     0x69DB, 0xBCF7, 0x69DC, 0x9897, 0x69DD, 0x9898, 0x69DE, 0x9899,
01979     0x69DF, 0xE9C4, 0x69E0, 0xE9C6, 0x69E1, 0x989A, 0x69E2, 0x989B,
01980     0x69E3, 0x989C, 0x69E4, 0x989D, 0x69E5, 0x989E, 0x69E6, 0x989F,
01981     0x69E7, 0x98A0, 0x69E8, 0x98A1, 0x69E9, 0x98A2, 0x69EA, 0x98A3,
01982     0x69EB, 0x98A4, 0x69EC, 0x98A5, 0x69ED, 0xE9CA, 0x69EE, 0x98A6,
01983     0x69EF, 0x98A7, 0x69F0, 0x98A8, 0x69F1, 0x98A9, 0x69F2, 0xE9CE,
01984     0x69F3, 0x98AA, 0x69F4, 0x98AB, 0x69F5, 0x98AC, 0x69F6, 0x98AD,
01985     0x69F7, 0x98AE, 0x69F8, 0x98AF, 0x69F9, 0x98B0, 0x69FA, 0x98B1,
01986     0x69FB, 0x98B2, 0x69FC, 0x98B3, 0x69FD, 0xB2DB, 0x69FE, 0x98B4,
01987     0x69FF, 0xE9C8, 0x6A00, 0x98B5, 0x6A01, 0x98B6, 0x6A02, 0x98B7,
01988     0x6A03, 0x98B8, 0x6A04, 0x98B9, 0x6A05, 0x98BA, 0x6A06, 0x98BB,
01989     0x6A07, 0x98BC, 0x6A08, 0x98BD, 0x6A09, 0x98BE, 0x6A0A, 0xB7AE,
01990     0x6A0B, 0x98BF, 0x6A0C, 0x98C0, 0x6A0D, 0x98C1, 0x6A0E, 0x98C2,
01991     0x6A0F, 0x98C3, 0x6A10, 0x98C4, 0x6A11, 0x98C5, 0x6A12, 0x98C6,
01992     0x6A13, 0x98C7, 0x6A14, 0x98C8, 0x6A15, 0x98C9, 0x6A16, 0x98CA,
01993     0x6A17, 0xE9CB, 0x6A18, 0xE9CC, 0x6A19, 0x98CB, 0x6A1A, 0x98CC,
01994     0x6A1B, 0x98CD, 0x6A1C, 0x98CE, 0x6A1D, 0x98CF, 0x6A1E, 0x98D0,
01995     0x6A1F, 0xD5C1, 0x6A20, 0x98D1, 0x6A21, 0xC4A3, 0x6A22, 0x98D2,
01996     0x6A23, 0x98D3, 0x6A24, 0x98D4, 0x6A25, 0x98D5, 0x6A26, 0x98D6,
01997     0x6A27, 0x98D7, 0x6A28, 0xE9D8, 0x6A29, 0x98D8, 0x6A2A, 0xBAE1,
01998     0x6A2B, 0x98D9, 0x6A2C, 0x98DA, 0x6A2D, 0x98DB, 0x6A2E, 0x98DC,
01999     0x6A2F, 0xE9C9, 0x6A30, 0x98DD, 0x6A31, 0xD3A3, 0x6A32, 0x98DE,
02000     0x6A33, 0x98DF, 0x6A34, 0x98E0, 0x6A35, 0xE9D4, 0x6A36, 0x98E1,
02001     0x6A37, 0x98E2, 0x6A38, 0x98E3, 0x6A39, 0x98E4, 0x6A3A, 0x98E5,
02002     0x6A3B, 0x98E6, 0x6A3C, 0x98E7, 0x6A3D, 0xE9D7, 0x6A3E, 0xE9D0,
02003     0x6A3F, 0x98E8, 0x6A40, 0x98E9, 0x6A41, 0x98EA, 0x6A42, 0x98EB,
02004     0x6A43, 0x98EC, 0x6A44, 0xE9CF, 0x6A45, 0x98ED, 0x6A46, 0x98EE,
02005     0x6A47, 0xC7C1, 0x6A48, 0x98EF, 0x6A49, 0x98F0, 0x6A4A, 0x98F1,
02006     0x6A4B, 0x98F2, 0x6A4C, 0x98F3, 0x6A4D, 0x98F4, 0x6A4E, 0x98F5,
02007     0x6A4F, 0x98F6, 0x6A50, 0xE9D2, 0x6A51, 0x98F7, 0x6A52, 0x98F8,
02008     0x6A53, 0x98F9, 0x6A54, 0x98FA, 0x6A55, 0x98FB, 0x6A56, 0x98FC,
02009     0x6A57, 0x98FD, 0x6A58, 0xE9D9, 0x6A59, 0xB3C8, 0x6A5A, 0x98FE,
02010     0x6A5B, 0xE9D3, 0x6A5C, 0x9940, 0x6A5D, 0x9941, 0x6A5E, 0x9942,
02011     0x6A5F, 0x9943, 0x6A60, 0x9944, 0x6A61, 0xCFF0, 0x6A62, 0x9945,
02012     0x6A63, 0x9946, 0x6A64, 0x9947, 0x6A65, 0xE9CD, 0x6A66, 0x9948,
02013     0x6A67, 0x9949, 0x6A68, 0x994A, 0x6A69, 0x994B, 0x6A6A, 0x994C,
02014     0x6A6B, 0x994D, 0x6A6C, 0x994E, 0x6A6D, 0x994F, 0x6A6E, 0x9950,
02015     0x6A6F, 0x9951, 0x6A70, 0x9952, 0x6A71, 0xB3F7, 0x6A72, 0x9953,
02016     0x6A73, 0x9954, 0x6A74, 0x9955, 0x6A75, 0x9956, 0x6A76, 0x9957,
02017     0x6A77, 0x9958, 0x6A78, 0x9959, 0x6A79, 0xE9D6, 0x6A7A, 0x995A,
02018     0x6A7B, 0x995B, 0x6A7C, 0xE9DA, 0x6A7D, 0x995C, 0x6A7E, 0x995D,
02019     0x6A7F, 0x995E, 0x6A80, 0xCCB4, 0x6A81, 0x995F, 0x6A82, 0x9960,
02020     0x6A83, 0x9961, 0x6A84, 0xCFAD, 0x6A85, 0x9962, 0x6A86, 0x9963,
02021     0x6A87, 0x9964, 0x6A88, 0x9965, 0x6A89, 0x9966, 0x6A8A, 0x9967,
02022     0x6A8B, 0x9968, 0x6A8C, 0x9969, 0x6A8D, 0x996A, 0x6A8E, 0xE9D5,
02023     0x6A8F, 0x996B, 0x6A90, 0xE9DC, 0x6A91, 0xE9DB, 0x6A92, 0x996C,
02024     0x6A93, 0x996D, 0x6A94, 0x996E, 0x6A95, 0x996F, 0x6A96, 0x9970,
02025     0x6A97, 0xE9DE, 0x6A98, 0x9971, 0x6A99, 0x9972, 0x6A9A, 0x9973,
02026     0x6A9B, 0x9974, 0x6A9C, 0x9975, 0x6A9D, 0x9976, 0x6A9E, 0x9977,
02027     0x6A9F, 0x9978, 0x6AA0, 0xE9D1, 0x6AA1, 0x9979, 0x6AA2, 0x997A,
02028     0x6AA3, 0x997B, 0x6AA4, 0x997C, 0x6AA5, 0x997D, 0x6AA6, 0x997E,
02029     0x6AA7, 0x9980, 0x6AA8, 0x9981, 0x6AA9, 0xE9DD, 0x6AAA, 0x9982,
02030     0x6AAB, 0xE9DF, 0x6AAC, 0xC3CA, 0x6AAD, 0x9983, 0x6AAE, 0x9984,
02031     0x6AAF, 0x9985, 0x6AB0, 0x9986, 0x6AB1, 0x9987, 0x6AB2, 0x9988,
02032     0x6AB3, 0x9989, 0x6AB4, 0x998A, 0x6AB5, 0x998B, 0x6AB6, 0x998C,
02033     0x6AB7, 0x998D, 0x6AB8, 0x998E, 0x6AB9, 0x998F, 0x6ABA, 0x9990,
02034     0x6ABB, 0x9991, 0x6ABC, 0x9992, 0x6ABD, 0x9993, 0x6ABE, 0x9994,
02035     0x6ABF, 0x9995, 0x6AC0, 0x9996, 0x6AC1, 0x9997, 0x6AC2, 0x9998,
02036     0x6AC3, 0x9999, 0x6AC4, 0x999A, 0x6AC5, 0x999B, 0x6AC6, 0x999C,
02037     0x6AC7, 0x999D, 0x6AC8, 0x999E, 0x6AC9, 0x999F, 0x6ACA, 0x99A0,
02038     0x6ACB, 0x99A1, 0x6ACC, 0x99A2, 0x6ACD, 0x99A3, 0x6ACE, 0x99A4,
02039     0x6ACF, 0x99A5, 0x6AD0, 0x99A6, 0x6AD1, 0x99A7, 0x6AD2, 0x99A8,
02040     0x6AD3, 0x99A9, 0x6AD4, 0x99AA, 0x6AD5, 0x99AB, 0x6AD6, 0x99AC,
02041     0x6AD7, 0x99AD, 0x6AD8, 0x99AE, 0x6AD9, 0x99AF, 0x6ADA, 0x99B0,
02042     0x6ADB, 0x99B1, 0x6ADC, 0x99B2, 0x6ADD, 0x99B3, 0x6ADE, 0x99B4,
02043     0x6ADF, 0x99B5, 0x6AE0, 0x99B6, 0x6AE1, 0x99B7, 0x6AE2, 0x99B8,
02044     0x6AE3, 0x99B9, 0x6AE4, 0x99BA, 0x6AE5, 0x99BB, 0x6AE6, 0x99BC,
02045     0x6AE7, 0x99BD, 0x6AE8, 0x99BE, 0x6AE9, 0x99BF, 0x6AEA, 0x99C0,
02046     0x6AEB, 0x99C1, 0x6AEC, 0x99C2, 0x6AED, 0x99C3, 0x6AEE, 0x99C4,
02047     0x6AEF, 0x99C5, 0x6AF0, 0x99C6, 0x6AF1, 0x99C7, 0x6AF2, 0x99C8,
02048     0x6AF3, 0x99C9, 0x6AF4, 0x99CA, 0x6AF5, 0x99CB, 0x6AF6, 0x99CC,
02049     0x6AF7, 0x99CD, 0x6AF8, 0x99CE, 0x6AF9, 0x99CF, 0x6AFA, 0x99D0,
02050     0x6AFB, 0x99D1, 0x6AFC, 0x99D2, 0x6AFD, 0x99D3, 0x6AFE, 0x99D4,
02051     0x6AFF, 0x99D5, 0x6B00, 0x99D6, 0x6B01, 0x99D7, 0x6B02, 0x99D8,
02052     0x6B03, 0x99D9, 0x6B04, 0x99DA, 0x6B05, 0x99DB, 0x6B06, 0x99DC,
02053     0x6B07, 0x99DD, 0x6B08, 0x99DE, 0x6B09, 0x99DF, 0x6B0A, 0x99E0,
02054     0x6B0B, 0x99E1, 0x6B0C, 0x99E2, 0x6B0D, 0x99E3, 0x6B0E, 0x99E4,
02055     0x6B0F, 0x99E5, 0x6B10, 0x99E6, 0x6B11, 0x99E7, 0x6B12, 0x99E8,
02056     0x6B13, 0x99E9, 0x6B14, 0x99EA, 0x6B15, 0x99EB, 0x6B16, 0x99EC,
02057     0x6B17, 0x99ED, 0x6B18, 0x99EE, 0x6B19, 0x99EF, 0x6B1A, 0x99F0,
02058     0x6B1B, 0x99F1, 0x6B1C, 0x99F2, 0x6B1D, 0x99F3, 0x6B1E, 0x99F4,
02059     0x6B1F, 0x99F5, 0x6B20, 0xC7B7, 0x6B21, 0xB4CE, 0x6B22, 0xBBB6,
02060     0x6B23, 0xD0C0, 0x6B24, 0xECA3, 0x6B25, 0x99F6, 0x6B26, 0x99F7,
02061     0x6B27, 0xC5B7, 0x6B28, 0x99F8, 0x6B29, 0x99F9, 0x6B2A, 0x99FA,
02062     0x6B2B, 0x99FB, 0x6B2C, 0x99FC, 0x6B2D, 0x99FD, 0x6B2E, 0x99FE,
02063     0x6B2F, 0x9A40, 0x6B30, 0x9A41, 0x6B31, 0x9A42, 0x6B32, 0xD3FB,
02064     0x6B33, 0x9A43, 0x6B34, 0x9A44, 0x6B35, 0x9A45, 0x6B36, 0x9A46,
02065     0x6B37, 0xECA4, 0x6B38, 0x9A47, 0x6B39, 0xECA5, 0x6B3A, 0xC6DB,
02066     0x6B3B, 0x9A48, 0x6B3C, 0x9A49, 0x6B3D, 0x9A4A, 0x6B3E, 0xBFEE,
02067     0x6B3F, 0x9A4B, 0x6B40, 0x9A4C, 0x6B41, 0x9A4D, 0x6B42, 0x9A4E,
02068     0x6B43, 0xECA6, 0x6B44, 0x9A4F, 0x6B45, 0x9A50, 0x6B46, 0xECA7,
02069     0x6B47, 0xD0AA, 0x6B48, 0x9A51, 0x6B49, 0xC7B8, 0x6B4A, 0x9A52,
02070     0x6B4B, 0x9A53, 0x6B4C, 0xB8E8, 0x6B4D, 0x9A54, 0x6B4E, 0x9A55,
02071     0x6B4F, 0x9A56, 0x6B50, 0x9A57, 0x6B51, 0x9A58, 0x6B52, 0x9A59,
02072     0x6B53, 0x9A5A, 0x6B54, 0x9A5B, 0x6B55, 0x9A5C, 0x6B56, 0x9A5D,
02073     0x6B57, 0x9A5E, 0x6B58, 0x9A5F, 0x6B59, 0xECA8, 0x6B5A, 0x9A60,
02074     0x6B5B, 0x9A61, 0x6B5C, 0x9A62, 0x6B5D, 0x9A63, 0x6B5E, 0x9A64,
02075     0x6B5F, 0x9A65, 0x6B60, 0x9A66, 0x6B61, 0x9A67, 0x6B62, 0xD6B9,
02076     0x6B63, 0xD5FD, 0x6B64, 0xB4CB, 0x6B65, 0xB2BD, 0x6B66, 0xCEE4,
02077     0x6B67, 0xC6E7, 0x6B68, 0x9A68, 0x6B69, 0x9A69, 0x6B6A, 0xCDE1,
02078     0x6B6B, 0x9A6A, 0x6B6C, 0x9A6B, 0x6B6D, 0x9A6C, 0x6B6E, 0x9A6D,
02079     0x6B6F, 0x9A6E, 0x6B70, 0x9A6F, 0x6B71, 0x9A70, 0x6B72, 0x9A71,
02080     0x6B73, 0x9A72, 0x6B74, 0x9A73, 0x6B75, 0x9A74, 0x6B76, 0x9A75,
02081     0x6B77, 0x9A76, 0x6B78, 0x9A77, 0x6B79, 0xB4F5, 0x6B7A, 0x9A78,
02082     0x6B7B, 0xCBC0, 0x6B7C, 0xBCDF, 0x6B7D, 0x9A79, 0x6B7E, 0x9A7A,
02083     0x6B7F, 0x9A7B, 0x6B80, 0x9A7C, 0x6B81, 0xE9E2, 0x6B82, 0xE9E3,
02084     0x6B83, 0xD1EA, 0x6B84, 0xE9E5, 0x6B85, 0x9A7D, 0x6B86, 0xB4F9,
02085     0x6B87, 0xE9E4, 0x6B88, 0x9A7E, 0x6B89, 0xD1B3, 0x6B8A, 0xCAE2,
02086     0x6B8B, 0xB2D0, 0x6B8C, 0x9A80, 0x6B8D, 0xE9E8, 0x6B8E, 0x9A81,
02087     0x6B8F, 0x9A82, 0x6B90, 0x9A83, 0x6B91, 0x9A84, 0x6B92, 0xE9E6,
02088     0x6B93, 0xE9E7, 0x6B94, 0x9A85, 0x6B95, 0x9A86, 0x6B96, 0xD6B3,
02089     0x6B97, 0x9A87, 0x6B98, 0x9A88, 0x6B99, 0x9A89, 0x6B9A, 0xE9E9,
02090     0x6B9B, 0xE9EA, 0x6B9C, 0x9A8A, 0x6B9D, 0x9A8B, 0x6B9E, 0x9A8C,
02091     0x6B9F, 0x9A8D, 0x6BA0, 0x9A8E, 0x6BA1, 0xE9EB, 0x6BA2, 0x9A8F,
02092     0x6BA3, 0x9A90, 0x6BA4, 0x9A91, 0x6BA5, 0x9A92, 0x6BA6, 0x9A93,
02093     0x6BA7, 0x9A94, 0x6BA8, 0x9A95, 0x6BA9, 0x9A96, 0x6BAA, 0xE9EC,
02094     0x6BAB, 0x9A97, 0x6BAC, 0x9A98, 0x6BAD, 0x9A99, 0x6BAE, 0x9A9A,
02095     0x6BAF, 0x9A9B, 0x6BB0, 0x9A9C, 0x6BB1, 0x9A9D, 0x6BB2, 0x9A9E,
02096     0x6BB3, 0xECAF, 0x6BB4, 0xC5B9, 0x6BB5, 0xB6CE, 0x6BB6, 0x9A9F,
02097     0x6BB7, 0xD2F3, 0x6BB8, 0x9AA0, 0x6BB9, 0x9AA1, 0x6BBA, 0x9AA2,
02098     0x6BBB, 0x9AA3, 0x6BBC, 0x9AA4, 0x6BBD, 0x9AA5, 0x6BBE, 0x9AA6,
02099     0x6BBF, 0xB5EE, 0x6BC0, 0x9AA7, 0x6BC1, 0xBBD9, 0x6BC2, 0xECB1,
02100     0x6BC3, 0x9AA8, 0x6BC4, 0x9AA9, 0x6BC5, 0xD2E3, 0x6BC6, 0x9AAA,
02101     0x6BC7, 0x9AAB, 0x6BC8, 0x9AAC, 0x6BC9, 0x9AAD, 0x6BCA, 0x9AAE,
02102     0x6BCB, 0xCEE3, 0x6BCC, 0x9AAF, 0x6BCD, 0xC4B8, 0x6BCE, 0x9AB0,
02103     0x6BCF, 0xC3BF, 0x6BD0, 0x9AB1, 0x6BD1, 0x9AB2, 0x6BD2, 0xB6BE,
02104     0x6BD3, 0xD8B9, 0x6BD4, 0xB1C8, 0x6BD5, 0xB1CF, 0x6BD6, 0xB1D1,
02105     0x6BD7, 0xC5FE, 0x6BD8, 0x9AB3, 0x6BD9, 0xB1D0, 0x6BDA, 0x9AB4,
02106     0x6BDB, 0xC3AB, 0x6BDC, 0x9AB5, 0x6BDD, 0x9AB6, 0x6BDE, 0x9AB7,
02107     0x6BDF, 0x9AB8, 0x6BE0, 0x9AB9, 0x6BE1, 0xD5B1, 0x6BE2, 0x9ABA,
02108     0x6BE3, 0x9ABB, 0x6BE4, 0x9ABC, 0x6BE5, 0x9ABD, 0x6BE6, 0x9ABE,
02109     0x6BE7, 0x9ABF, 0x6BE8, 0x9AC0, 0x6BE9, 0x9AC1, 0x6BEA, 0xEBA4,
02110     0x6BEB, 0xBAC1, 0x6BEC, 0x9AC2, 0x6BED, 0x9AC3, 0x6BEE, 0x9AC4,
02111     0x6BEF, 0xCCBA, 0x6BF0, 0x9AC5, 0x6BF1, 0x9AC6, 0x6BF2, 0x9AC7,
02112     0x6BF3, 0xEBA5, 0x6BF4, 0x9AC8, 0x6BF5, 0xEBA7, 0x6BF6, 0x9AC9,
02113     0x6BF7, 0x9ACA, 0x6BF8, 0x9ACB, 0x6BF9, 0xEBA8, 0x6BFA, 0x9ACC,
02114     0x6BFB, 0x9ACD, 0x6BFC, 0x9ACE, 0x6BFD, 0xEBA6, 0x6BFE, 0x9ACF,
02115     0x6BFF, 0x9AD0, 0x6C00, 0x9AD1, 0x6C01, 0x9AD2, 0x6C02, 0x9AD3,
02116     0x6C03, 0x9AD4, 0x6C04, 0x9AD5, 0x6C05, 0xEBA9, 0x6C06, 0xEBAB,
02117     0x6C07, 0xEBAA, 0x6C08, 0x9AD6, 0x6C09, 0x9AD7, 0x6C0A, 0x9AD8,
02118     0x6C0B, 0x9AD9, 0x6C0C, 0x9ADA, 0x6C0D, 0xEBAC, 0x6C0E, 0x9ADB,
02119     0x6C0F, 0xCACF, 0x6C10, 0xD8B5, 0x6C11, 0xC3F1, 0x6C12, 0x9ADC,
02120     0x6C13, 0xC3A5, 0x6C14, 0xC6F8, 0x6C15, 0xEBAD, 0x6C16, 0xC4CA,
02121     0x6C17, 0x9ADD, 0x6C18, 0xEBAE, 0x6C19, 0xEBAF, 0x6C1A, 0xEBB0,
02122     0x6C1B, 0xB7D5, 0x6C1C, 0x9ADE, 0x6C1D, 0x9ADF, 0x6C1E, 0x9AE0,
02123     0x6C1F, 0xB7FA, 0x6C20, 0x9AE1, 0x6C21, 0xEBB1, 0x6C22, 0xC7E2,
02124     0x6C23, 0x9AE2, 0x6C24, 0xEBB3, 0x6C25, 0x9AE3, 0x6C26, 0xBAA4,
02125     0x6C27, 0xD1F5, 0x6C28, 0xB0B1, 0x6C29, 0xEBB2, 0x6C2A, 0xEBB4,
02126     0x6C2B, 0x9AE4, 0x6C2C, 0x9AE5, 0x6C2D, 0x9AE6, 0x6C2E, 0xB5AA,
02127     0x6C2F, 0xC2C8, 0x6C30, 0xC7E8, 0x6C31, 0x9AE7, 0x6C32, 0xEBB5,
02128     0x6C33, 0x9AE8, 0x6C34, 0xCBAE, 0x6C35, 0xE3DF, 0x6C36, 0x9AE9,
02129     0x6C37, 0x9AEA, 0x6C38, 0xD3C0, 0x6C39, 0x9AEB, 0x6C3A, 0x9AEC,
02130     0x6C3B, 0x9AED, 0x6C3C, 0x9AEE, 0x6C3D, 0xD9DB, 0x6C3E, 0x9AEF,
02131     0x6C3F, 0x9AF0, 0x6C40, 0xCDA1, 0x6C41, 0xD6AD, 0x6C42, 0xC7F3,
02132     0x6C43, 0x9AF1, 0x6C44, 0x9AF2, 0x6C45, 0x9AF3, 0x6C46, 0xD9E0,
02133     0x6C47, 0xBBE3, 0x6C48, 0x9AF4, 0x6C49, 0xBABA, 0x6C4A, 0xE3E2,
02134     0x6C4B, 0x9AF5, 0x6C4C, 0x9AF6, 0x6C4D, 0x9AF7, 0x6C4E, 0x9AF8,
02135     0x6C4F, 0x9AF9, 0x6C50, 0xCFAB, 0x6C51, 0x9AFA, 0x6C52, 0x9AFB,
02136     0x6C53, 0x9AFC, 0x6C54, 0xE3E0, 0x6C55, 0xC9C7, 0x6C56, 0x9AFD,
02137     0x6C57, 0xBAB9, 0x6C58, 0x9AFE, 0x6C59, 0x9B40, 0x6C5A, 0x9B41,
02138     0x6C5B, 0xD1B4, 0x6C5C, 0xE3E1, 0x6C5D, 0xC8EA, 0x6C5E, 0xB9AF,
02139     0x6C5F, 0xBDAD, 0x6C60, 0xB3D8, 0x6C61, 0xCEDB, 0x6C62, 0x9B42,
02140     0x6C63, 0x9B43, 0x6C64, 0xCCC0, 0x6C65, 0x9B44, 0x6C66, 0x9B45,
02141     0x6C67, 0x9B46, 0x6C68, 0xE3E8, 0x6C69, 0xE3E9, 0x6C6A, 0xCDF4,
02142     0x6C6B, 0x9B47, 0x6C6C, 0x9B48, 0x6C6D, 0x9B49, 0x6C6E, 0x9B4A,
02143     0x6C6F, 0x9B4B, 0x6C70, 0xCCAD, 0x6C71, 0x9B4C, 0x6C72, 0xBCB3,
02144     0x6C73, 0x9B4D, 0x6C74, 0xE3EA, 0x6C75, 0x9B4E, 0x6C76, 0xE3EB,
02145     0x6C77, 0x9B4F, 0x6C78, 0x9B50, 0x6C79, 0xD0DA, 0x6C7A, 0x9B51,
02146     0x6C7B, 0x9B52, 0x6C7C, 0x9B53, 0x6C7D, 0xC6FB, 0x6C7E, 0xB7DA,
02147     0x6C7F, 0x9B54, 0x6C80, 0x9B55, 0x6C81, 0xC7DF, 0x6C82, 0xD2CA,
02148     0x6C83, 0xCED6, 0x6C84, 0x9B56, 0x6C85, 0xE3E4, 0x6C86, 0xE3EC,
02149     0x6C87, 0x9B57, 0x6C88, 0xC9F2, 0x6C89, 0xB3C1, 0x6C8A, 0x9B58,
02150     0x6C8B, 0x9B59, 0x6C8C, 0xE3E7, 0x6C8D, 0x9B5A, 0x6C8E, 0x9B5B,
02151     0x6C8F, 0xC6E3, 0x6C90, 0xE3E5, 0x6C91, 0x9B5C, 0x6C92, 0x9B5D,
02152     0x6C93, 0xEDB3, 0x6C94, 0xE3E6, 0x6C95, 0x9B5E, 0x6C96, 0x9B5F,
02153     0x6C97, 0x9B60, 0x6C98, 0x9B61, 0x6C99, 0xC9B3, 0x6C9A, 0x9B62,
02154     0x6C9B, 0xC5E6, 0x6C9C, 0x9B63, 0x6C9D, 0x9B64, 0x6C9E, 0x9B65,
02155     0x6C9F, 0xB9B5, 0x6CA0, 0x9B66, 0x6CA1, 0xC3BB, 0x6CA2, 0x9B67,
02156     0x6CA3, 0xE3E3, 0x6CA4, 0xC5BD, 0x6CA5, 0xC1A4, 0x6CA6, 0xC2D9,
02157     0x6CA7, 0xB2D7, 0x6CA8, 0x9B68, 0x6CA9, 0xE3ED, 0x6CAA, 0xBBA6,
02158     0x6CAB, 0xC4AD, 0x6CAC, 0x9B69, 0x6CAD, 0xE3F0, 0x6CAE, 0xBEDA,
02159     0x6CAF, 0x9B6A, 0x6CB0, 0x9B6B, 0x6CB1, 0xE3FB, 0x6CB2, 0xE3F5,
02160     0x6CB3, 0xBAD3, 0x6CB4, 0x9B6C, 0x6CB5, 0x9B6D, 0x6CB6, 0x9B6E,
02161     0x6CB7, 0x9B6F, 0x6CB8, 0xB7D0, 0x6CB9, 0xD3CD, 0x6CBA, 0x9B70,
02162     0x6CBB, 0xD6CE, 0x6CBC, 0xD5D3, 0x6CBD, 0xB9C1, 0x6CBE, 0xD5B4,
02163     0x6CBF, 0xD1D8, 0x6CC0, 0x9B71, 0x6CC1, 0x9B72, 0x6CC2, 0x9B73,
02164     0x6CC3, 0x9B74, 0x6CC4, 0xD0B9, 0x6CC5, 0xC7F6, 0x6CC6, 0x9B75,
02165     0x6CC7, 0x9B76, 0x6CC8, 0x9B77, 0x6CC9, 0xC8AA, 0x6CCA, 0xB2B4,
02166     0x6CCB, 0x9B78, 0x6CCC, 0xC3DA, 0x6CCD, 0x9B79, 0x6CCE, 0x9B7A,
02167     0x6CCF, 0x9B7B, 0x6CD0, 0xE3EE, 0x6CD1, 0x9B7C, 0x6CD2, 0x9B7D,
02168     0x6CD3, 0xE3FC, 0x6CD4, 0xE3EF, 0x6CD5, 0xB7A8, 0x6CD6, 0xE3F7,
02169     0x6CD7, 0xE3F4, 0x6CD8, 0x9B7E, 0x6CD9, 0x9B80, 0x6CDA, 0x9B81,
02170     0x6CDB, 0xB7BA, 0x6CDC, 0x9B82, 0x6CDD, 0x9B83, 0x6CDE, 0xC5A2,
02171     0x6CDF, 0x9B84, 0x6CE0, 0xE3F6, 0x6CE1, 0xC5DD, 0x6CE2, 0xB2A8,
02172     0x6CE3, 0xC6FC, 0x6CE4, 0x9B85, 0x6CE5, 0xC4E0, 0x6CE6, 0x9B86,
02173     0x6CE7, 0x9B87, 0x6CE8, 0xD7A2, 0x6CE9, 0x9B88, 0x6CEA, 0xC0E1,
02174     0x6CEB, 0xE3F9, 0x6CEC, 0x9B89, 0x6CED, 0x9B8A, 0x6CEE, 0xE3FA,
02175     0x6CEF, 0xE3FD, 0x6CF0, 0xCCA9, 0x6CF1, 0xE3F3, 0x6CF2, 0x9B8B,
02176     0x6CF3, 0xD3BE, 0x6CF4, 0x9B8C, 0x6CF5, 0xB1C3, 0x6CF6, 0xEDB4,
02177     0x6CF7, 0xE3F1, 0x6CF8, 0xE3F2, 0x6CF9, 0x9B8D, 0x6CFA, 0xE3F8,
02178     0x6CFB, 0xD0BA, 0x6CFC, 0xC6C3, 0x6CFD, 0xD4F3, 0x6CFE, 0xE3FE,
02179     0x6CFF, 0x9B8E, 0x6D00, 0x9B8F, 0x6D01, 0xBDE0, 0x6D02, 0x9B90,
02180     0x6D03, 0x9B91, 0x6D04, 0xE4A7, 0x6D05, 0x9B92, 0x6D06, 0x9B93,
02181     0x6D07, 0xE4A6, 0x6D08, 0x9B94, 0x6D09, 0x9B95, 0x6D0A, 0x9B96,
02182     0x6D0B, 0xD1F3, 0x6D0C, 0xE4A3, 0x6D0D, 0x9B97, 0x6D0E, 0xE4A9,
02183     0x6D0F, 0x9B98, 0x6D10, 0x9B99, 0x6D11, 0x9B9A, 0x6D12, 0xC8F7,
02184     0x6D13, 0x9B9B, 0x6D14, 0x9B9C, 0x6D15, 0x9B9D, 0x6D16, 0x9B9E,
02185     0x6D17, 0xCFB4, 0x6D18, 0x9B9F, 0x6D19, 0xE4A8, 0x6D1A, 0xE4AE,
02186     0x6D1B, 0xC2E5, 0x6D1C, 0x9BA0, 0x6D1D, 0x9BA1, 0x6D1E, 0xB6B4,
02187     0x6D1F, 0x9BA2, 0x6D20, 0x9BA3, 0x6D21, 0x9BA4, 0x6D22, 0x9BA5,
02188     0x6D23, 0x9BA6, 0x6D24, 0x9BA7, 0x6D25, 0xBDF2, 0x6D26, 0x9BA8,
02189     0x6D27, 0xE4A2, 0x6D28, 0x9BA9, 0x6D29, 0x9BAA, 0x6D2A, 0xBAE9,
02190     0x6D2B, 0xE4AA, 0x6D2C, 0x9BAB, 0x6D2D, 0x9BAC, 0x6D2E, 0xE4AC,
02191     0x6D2F, 0x9BAD, 0x6D30, 0x9BAE, 0x6D31, 0xB6FD, 0x6D32, 0xD6DE,
02192     0x6D33, 0xE4B2, 0x6D34, 0x9BAF, 0x6D35, 0xE4AD, 0x6D36, 0x9BB0,
02193     0x6D37, 0x9BB1, 0x6D38, 0x9BB2, 0x6D39, 0xE4A1, 0x6D3A, 0x9BB3,
02194     0x6D3B, 0xBBEE, 0x6D3C, 0xCDDD, 0x6D3D, 0xC7A2, 0x6D3E, 0xC5C9,
02195     0x6D3F, 0x9BB4, 0x6D40, 0x9BB5, 0x6D41, 0xC1F7, 0x6D42, 0x9BB6,
02196     0x6D43, 0xE4A4, 0x6D44, 0x9BB7, 0x6D45, 0xC7B3, 0x6D46, 0xBDAC,
02197     0x6D47, 0xBDBD, 0x6D48, 0xE4A5, 0x6D49, 0x9BB8, 0x6D4A, 0xD7C7,
02198     0x6D4B, 0xB2E2, 0x6D4C, 0x9BB9, 0x6D4D, 0xE4AB, 0x6D4E, 0xBCC3,
02199     0x6D4F, 0xE4AF, 0x6D50, 0x9BBA, 0x6D51, 0xBBEB, 0x6D52, 0xE4B0,
02200     0x6D53, 0xC5A8, 0x6D54, 0xE4B1, 0x6D55, 0x9BBB, 0x6D56, 0x9BBC,
02201     0x6D57, 0x9BBD, 0x6D58, 0x9BBE, 0x6D59, 0xD5E3, 0x6D5A, 0xBFA3,
02202     0x6D5B, 0x9BBF, 0x6D5C, 0xE4BA, 0x6D5D, 0x9BC0, 0x6D5E, 0xE4B7,
02203     0x6D5F, 0x9BC1, 0x6D60, 0xE4BB, 0x6D61, 0x9BC2, 0x6D62, 0x9BC3,
02204     0x6D63, 0xE4BD, 0x6D64, 0x9BC4, 0x6D65, 0x9BC5, 0x6D66, 0xC6D6,
02205     0x6D67, 0x9BC6, 0x6D68, 0x9BC7, 0x6D69, 0xBAC6, 0x6D6A, 0xC0CB,
02206     0x6D6B, 0x9BC8, 0x6D6C, 0x9BC9, 0x6D6D, 0x9BCA, 0x6D6E, 0xB8A1,
02207     0x6D6F, 0xE4B4, 0x6D70, 0x9BCB, 0x6D71, 0x9BCC, 0x6D72, 0x9BCD,
02208     0x6D73, 0x9BCE, 0x6D74, 0xD4A1, 0x6D75, 0x9BCF, 0x6D76, 0x9BD0,
02209     0x6D77, 0xBAA3, 0x6D78, 0xBDFE, 0x6D79, 0x9BD1, 0x6D7A, 0x9BD2,
02210     0x6D7B, 0x9BD3, 0x6D7C, 0xE4BC, 0x6D7D, 0x9BD4, 0x6D7E, 0x9BD5,
02211     0x6D7F, 0x9BD6, 0x6D80, 0x9BD7, 0x6D81, 0x9BD8, 0x6D82, 0xCDBF,
02212     0x6D83, 0x9BD9, 0x6D84, 0x9BDA, 0x6D85, 0xC4F9, 0x6D86, 0x9BDB,
02213     0x6D87, 0x9BDC, 0x6D88, 0xCFFB, 0x6D89, 0xC9E6, 0x6D8A, 0x9BDD,
02214     0x6D8B, 0x9BDE, 0x6D8C, 0xD3BF, 0x6D8D, 0x9BDF, 0x6D8E, 0xCFD1,
02215     0x6D8F, 0x9BE0, 0x6D90, 0x9BE1, 0x6D91, 0xE4B3, 0x6D92, 0x9BE2,
02216     0x6D93, 0xE4B8, 0x6D94, 0xE4B9, 0x6D95, 0xCCE9, 0x6D96, 0x9BE3,
02217     0x6D97, 0x9BE4, 0x6D98, 0x9BE5, 0x6D99, 0x9BE6, 0x6D9A, 0x9BE7,
02218     0x6D9B, 0xCCCE, 0x6D9C, 0x9BE8, 0x6D9D, 0xC0D4, 0x6D9E, 0xE4B5,
02219     0x6D9F, 0xC1B0, 0x6DA0, 0xE4B6, 0x6DA1, 0xCED0, 0x6DA2, 0x9BE9,
02220     0x6DA3, 0xBBC1, 0x6DA4, 0xB5D3, 0x6DA5, 0x9BEA, 0x6DA6, 0xC8F3,
02221     0x6DA7, 0xBDA7, 0x6DA8, 0xD5C7, 0x6DA9, 0xC9AC, 0x6DAA, 0xB8A2,
02222     0x6DAB, 0xE4CA, 0x6DAC, 0x9BEB, 0x6DAD, 0x9BEC, 0x6DAE, 0xE4CC,
02223     0x6DAF, 0xD1C4, 0x6DB0, 0x9BED, 0x6DB1, 0x9BEE, 0x6DB2, 0xD2BA,
02224     0x6DB3, 0x9BEF, 0x6DB4, 0x9BF0, 0x6DB5, 0xBAAD, 0x6DB6, 0x9BF1,
02225     0x6DB7, 0x9BF2, 0x6DB8, 0xBAD4, 0x6DB9, 0x9BF3, 0x6DBA, 0x9BF4,
02226     0x6DBB, 0x9BF5, 0x6DBC, 0x9BF6, 0x6DBD, 0x9BF7, 0x6DBE, 0x9BF8,
02227     0x6DBF, 0xE4C3, 0x6DC0, 0xB5ED, 0x6DC1, 0x9BF9, 0x6DC2, 0x9BFA,
02228     0x6DC3, 0x9BFB, 0x6DC4, 0xD7CD, 0x6DC5, 0xE4C0, 0x6DC6, 0xCFFD,
02229     0x6DC7, 0xE4BF, 0x6DC8, 0x9BFC, 0x6DC9, 0x9BFD, 0x6DCA, 0x9BFE,
02230     0x6DCB, 0xC1DC, 0x6DCC, 0xCCCA, 0x6DCD, 0x9C40, 0x6DCE, 0x9C41,
02231     0x6DCF, 0x9C42, 0x6DD0, 0x9C43, 0x6DD1, 0xCAE7, 0x6DD2, 0x9C44,
02232     0x6DD3, 0x9C45, 0x6DD4, 0x9C46, 0x6DD5, 0x9C47, 0x6DD6, 0xC4D7,
02233     0x6DD7, 0x9C48, 0x6DD8, 0xCCD4, 0x6DD9, 0xE4C8, 0x6DDA, 0x9C49,
02234     0x6DDB, 0x9C4A, 0x6DDC, 0x9C4B, 0x6DDD, 0xE4C7, 0x6DDE, 0xE4C1,
02235     0x6DDF, 0x9C4C, 0x6DE0, 0xE4C4, 0x6DE1, 0xB5AD, 0x6DE2, 0x9C4D,
02236     0x6DE3, 0x9C4E, 0x6DE4, 0xD3D9, 0x6DE5, 0x9C4F, 0x6DE6, 0xE4C6,
02237     0x6DE7, 0x9C50, 0x6DE8, 0x9C51, 0x6DE9, 0x9C52, 0x6DEA, 0x9C53,
02238     0x6DEB, 0xD2F9, 0x6DEC, 0xB4E3, 0x6DED, 0x9C54, 0x6DEE, 0xBBB4,
02239     0x6DEF, 0x9C55, 0x6DF0, 0x9C56, 0x6DF1, 0xC9EE, 0x6DF2, 0x9C57,
02240     0x6DF3, 0xB4BE, 0x6DF4, 0x9C58, 0x6DF5, 0x9C59, 0x6DF6, 0x9C5A,
02241     0x6DF7, 0xBBEC, 0x6DF8, 0x9C5B, 0x6DF9, 0xD1CD, 0x6DFA, 0x9C5C,
02242     0x6DFB, 0xCCED, 0x6DFC, 0xEDB5, 0x6DFD, 0x9C5D, 0x6DFE, 0x9C5E,
02243     0x6DFF, 0x9C5F, 0x6E00, 0x9C60, 0x6E01, 0x9C61, 0x6E02, 0x9C62,
02244     0x6E03, 0x9C63, 0x6E04, 0x9C64, 0x6E05, 0xC7E5, 0x6E06, 0x9C65,
02245     0x6E07, 0x9C66, 0x6E08, 0x9C67, 0x6E09, 0x9C68, 0x6E0A, 0xD4A8,
02246     0x6E0B, 0x9C69, 0x6E0C, 0xE4CB, 0x6E0D, 0xD7D5, 0x6E0E, 0xE4C2,
02247     0x6E0F, 0x9C6A, 0x6E10, 0xBDA5, 0x6E11, 0xE4C5, 0x6E12, 0x9C6B,
02248     0x6E13, 0x9C6C, 0x6E14, 0xD3E6, 0x6E15, 0x9C6D, 0x6E16, 0xE4C9,
02249     0x6E17, 0xC9F8, 0x6E18, 0x9C6E, 0x6E19, 0x9C6F, 0x6E1A, 0xE4BE,
02250     0x6E1B, 0x9C70, 0x6E1C, 0x9C71, 0x6E1D, 0xD3E5, 0x6E1E, 0x9C72,
02251     0x6E1F, 0x9C73, 0x6E20, 0xC7FE, 0x6E21, 0xB6C9, 0x6E22, 0x9C74,
02252     0x6E23, 0xD4FC, 0x6E24, 0xB2B3, 0x6E25, 0xE4D7, 0x6E26, 0x9C75,
02253     0x6E27, 0x9C76, 0x6E28, 0x9C77, 0x6E29, 0xCEC2, 0x6E2A, 0x9C78,
02254     0x6E2B, 0xE4CD, 0x6E2C, 0x9C79, 0x6E2D, 0xCEBC, 0x6E2E, 0x9C7A,
02255     0x6E2F, 0xB8DB, 0x6E30, 0x9C7B, 0x6E31, 0x9C7C, 0x6E32, 0xE4D6,
02256     0x6E33, 0x9C7D, 0x6E34, 0xBFCA, 0x6E35, 0x9C7E, 0x6E36, 0x9C80,
02257     0x6E37, 0x9C81, 0x6E38, 0xD3CE, 0x6E39, 0x9C82, 0x6E3A, 0xC3EC,
02258     0x6E3B, 0x9C83, 0x6E3C, 0x9C84, 0x6E3D, 0x9C85, 0x6E3E, 0x9C86,
02259     0x6E3F, 0x9C87, 0x6E40, 0x9C88, 0x6E41, 0x9C89, 0x6E42, 0x9C8A,
02260     0x6E43, 0xC5C8, 0x6E44, 0xE4D8, 0x6E45, 0x9C8B, 0x6E46, 0x9C8C,
02261     0x6E47, 0x9C8D, 0x6E48, 0x9C8E, 0x6E49, 0x9C8F, 0x6E4A, 0x9C90,
02262     0x6E4B, 0x9C91, 0x6E4C, 0x9C92, 0x6E4D, 0xCDC4, 0x6E4E, 0xE4CF,
02263     0x6E4F, 0x9C93, 0x6E50, 0x9C94, 0x6E51, 0x9C95, 0x6E52, 0x9C96,
02264     0x6E53, 0xE4D4, 0x6E54, 0xE4D5, 0x6E55, 0x9C97, 0x6E56, 0xBAFE,
02265     0x6E57, 0x9C98, 0x6E58, 0xCFE6, 0x6E59, 0x9C99, 0x6E5A, 0x9C9A,
02266     0x6E5B, 0xD5BF, 0x6E5C, 0x9C9B, 0x6E5D, 0x9C9C, 0x6E5E, 0x9C9D,
02267     0x6E5F, 0xE4D2, 0x6E60, 0x9C9E, 0x6E61, 0x9C9F, 0x6E62, 0x9CA0,
02268     0x6E63, 0x9CA1, 0x6E64, 0x9CA2, 0x6E65, 0x9CA3, 0x6E66, 0x9CA4,
02269     0x6E67, 0x9CA5, 0x6E68, 0x9CA6, 0x6E69, 0x9CA7, 0x6E6A, 0x9CA8,
02270     0x6E6B, 0xE4D0, 0x6E6C, 0x9CA9, 0x6E6D, 0x9CAA, 0x6E6E, 0xE4CE,
02271     0x6E6F, 0x9CAB, 0x6E70, 0x9CAC, 0x6E71, 0x9CAD, 0x6E72, 0x9CAE,
02272     0x6E73, 0x9CAF, 0x6E74, 0x9CB0, 0x6E75, 0x9CB1, 0x6E76, 0x9CB2,
02273     0x6E77, 0x9CB3, 0x6E78, 0x9CB4, 0x6E79, 0x9CB5, 0x6E7A, 0x9CB6,
02274     0x6E7B, 0x9CB7, 0x6E7C, 0x9CB8, 0x6E7D, 0x9CB9, 0x6E7E, 0xCDE5,
02275     0x6E7F, 0xCAAA, 0x6E80, 0x9CBA, 0x6E81, 0x9CBB, 0x6E82, 0x9CBC,
02276     0x6E83, 0xC0A3, 0x6E84, 0x9CBD, 0x6E85, 0xBDA6, 0x6E86, 0xE4D3,
02277     0x6E87, 0x9CBE, 0x6E88, 0x9CBF, 0x6E89, 0xB8C8, 0x6E8A, 0x9CC0,
02278     0x6E8B, 0x9CC1, 0x6E8C, 0x9CC2, 0x6E8D, 0x9CC3, 0x6E8E, 0x9CC4,
02279     0x6E8F, 0xE4E7, 0x6E90, 0xD4B4, 0x6E91, 0x9CC5, 0x6E92, 0x9CC6,
02280     0x6E93, 0x9CC7, 0x6E94, 0x9CC8, 0x6E95, 0x9CC9, 0x6E96, 0x9CCA,
02281     0x6E97, 0x9CCB, 0x6E98, 0xE4DB, 0x6E99, 0x9CCC, 0x6E9A, 0x9CCD,
02282     0x6E9B, 0x9CCE, 0x6E9C, 0xC1EF, 0x6E9D, 0x9CCF, 0x6E9E, 0x9CD0,
02283     0x6E9F, 0xE4E9, 0x6EA0, 0x9CD1, 0x6EA1, 0x9CD2, 0x6EA2, 0xD2E7,
02284     0x6EA3, 0x9CD3, 0x6EA4, 0x9CD4, 0x6EA5, 0xE4DF, 0x6EA6, 0x9CD5,
02285     0x6EA7, 0xE4E0, 0x6EA8, 0x9CD6, 0x6EA9, 0x9CD7, 0x6EAA, 0xCFAA,
02286     0x6EAB, 0x9CD8, 0x6EAC, 0x9CD9, 0x6EAD, 0x9CDA, 0x6EAE, 0x9CDB,
02287     0x6EAF, 0xCBDD, 0x6EB0, 0x9CDC, 0x6EB1, 0xE4DA, 0x6EB2, 0xE4D1,
02288     0x6EB3, 0x9CDD, 0x6EB4, 0xE4E5, 0x6EB5, 0x9CDE, 0x6EB6, 0xC8DC,
02289     0x6EB7, 0xE4E3, 0x6EB8, 0x9CDF, 0x6EB9, 0x9CE0, 0x6EBA, 0xC4E7,
02290     0x6EBB, 0xE4E2, 0x6EBC, 0x9CE1, 0x6EBD, 0xE4E1, 0x6EBE, 0x9CE2,
02291     0x6EBF, 0x9CE3, 0x6EC0, 0x9CE4, 0x6EC1, 0xB3FC, 0x6EC2, 0xE4E8,
02292     0x6EC3, 0x9CE5, 0x6EC4, 0x9CE6, 0x6EC5, 0x9CE7, 0x6EC6, 0x9CE8,
02293     0x6EC7, 0xB5E1, 0x6EC8, 0x9CE9, 0x6EC9, 0x9CEA, 0x6ECA, 0x9CEB,
02294     0x6ECB, 0xD7CC, 0x6ECC, 0x9CEC, 0x6ECD, 0x9CED, 0x6ECE, 0x9CEE,
02295     0x6ECF, 0xE4E6, 0x6ED0, 0x9CEF, 0x6ED1, 0xBBAC, 0x6ED2, 0x9CF0,
02296     0x6ED3, 0xD7D2, 0x6ED4, 0xCCCF, 0x6ED5, 0xEBF8, 0x6ED6, 0x9CF1,
02297     0x6ED7, 0xE4E4, 0x6ED8, 0x9CF2, 0x6ED9, 0x9CF3, 0x6EDA, 0xB9F6,
02298     0x6EDB, 0x9CF4, 0x6EDC, 0x9CF5, 0x6EDD, 0x9CF6, 0x6EDE, 0xD6CD,
02299     0x6EDF, 0xE4D9, 0x6EE0, 0xE4DC, 0x6EE1, 0xC2FA, 0x6EE2, 0xE4DE,
02300     0x6EE3, 0x9CF7, 0x6EE4, 0xC2CB, 0x6EE5, 0xC0C4, 0x6EE6, 0xC2D0,
02301     0x6EE7, 0x9CF8, 0x6EE8, 0xB1F5, 0x6EE9, 0xCCB2, 0x6EEA, 0x9CF9,
02302     0x6EEB, 0x9CFA, 0x6EEC, 0x9CFB, 0x6EED, 0x9CFC, 0x6EEE, 0x9CFD,
02303     0x6EEF, 0x9CFE, 0x6EF0, 0x9D40, 0x6EF1, 0x9D41, 0x6EF2, 0x9D42,
02304     0x6EF3, 0x9D43, 0x6EF4, 0xB5CE, 0x6EF5, 0x9D44, 0x6EF6, 0x9D45,
02305     0x6EF7, 0x9D46, 0x6EF8, 0x9D47, 0x6EF9, 0xE4EF, 0x6EFA, 0x9D48,
02306     0x6EFB, 0x9D49, 0x6EFC, 0x9D4A, 0x6EFD, 0x9D4B, 0x6EFE, 0x9D4C,
02307     0x6EFF, 0x9D4D, 0x6F00, 0x9D4E, 0x6F01, 0x9D4F, 0x6F02, 0xC6AF,
02308     0x6F03, 0x9D50, 0x6F04, 0x9D51, 0x6F05, 0x9D52, 0x6F06, 0xC6E1,
02309     0x6F07, 0x9D53, 0x6F08, 0x9D54, 0x6F09, 0xE4F5, 0x6F0A, 0x9D55,
02310     0x6F0B, 0x9D56, 0x6F0C, 0x9D57, 0x6F0D, 0x9D58, 0x6F0E, 0x9D59,
02311     0x6F0F, 0xC2A9, 0x6F10, 0x9D5A, 0x6F11, 0x9D5B, 0x6F12, 0x9D5C,
02312     0x6F13, 0xC0EC, 0x6F14, 0xD1DD, 0x6F15, 0xE4EE, 0x6F16, 0x9D5D,
02313     0x6F17, 0x9D5E, 0x6F18, 0x9D5F, 0x6F19, 0x9D60, 0x6F1A, 0x9D61,
02314     0x6F1B, 0x9D62, 0x6F1C, 0x9D63, 0x6F1D, 0x9D64, 0x6F1E, 0x9D65,
02315     0x6F1F, 0x9D66, 0x6F20, 0xC4AE, 0x6F21, 0x9D67, 0x6F22, 0x9D68,
02316     0x6F23, 0x9D69, 0x6F24, 0xE4ED, 0x6F25, 0x9D6A, 0x6F26, 0x9D6B,
02317     0x6F27, 0x9D6C, 0x6F28, 0x9D6D, 0x6F29, 0xE4F6, 0x6F2A, 0xE4F4,
02318     0x6F2B, 0xC2FE, 0x6F2C, 0x9D6E, 0x6F2D, 0xE4DD, 0x6F2E, 0x9D6F,
02319     0x6F2F, 0xE4F0, 0x6F30, 0x9D70, 0x6F31, 0xCAFE, 0x6F32, 0x9D71,
02320     0x6F33, 0xD5C4, 0x6F34, 0x9D72, 0x6F35, 0x9D73, 0x6F36, 0xE4F1,
02321     0x6F37, 0x9D74, 0x6F38, 0x9D75, 0x6F39, 0x9D76, 0x6F3A, 0x9D77,
02322     0x6F3B, 0x9D78, 0x6F3C, 0x9D79, 0x6F3D, 0x9D7A, 0x6F3E, 0xD1FA,
02323     0x6F3F, 0x9D7B, 0x6F40, 0x9D7C, 0x6F41, 0x9D7D, 0x6F42, 0x9D7E,
02324     0x6F43, 0x9D80, 0x6F44, 0x9D81, 0x6F45, 0x9D82, 0x6F46, 0xE4EB,
02325     0x6F47, 0xE4EC, 0x6F48, 0x9D83, 0x6F49, 0x9D84, 0x6F4A, 0x9D85,
02326     0x6F4B, 0xE4F2, 0x6F4C, 0x9D86, 0x6F4D, 0xCEAB, 0x6F4E, 0x9D87,
02327     0x6F4F, 0x9D88, 0x6F50, 0x9D89, 0x6F51, 0x9D8A, 0x6F52, 0x9D8B,
02328     0x6F53, 0x9D8C, 0x6F54, 0x9D8D, 0x6F55, 0x9D8E, 0x6F56, 0x9D8F,
02329     0x6F57, 0x9D90, 0x6F58, 0xC5CB, 0x6F59, 0x9D91, 0x6F5A, 0x9D92,
02330     0x6F5B, 0x9D93, 0x6F5C, 0xC7B1, 0x6F5D, 0x9D94, 0x6F5E, 0xC2BA,
02331     0x6F5F, 0x9D95, 0x6F60, 0x9D96, 0x6F61, 0x9D97, 0x6F62, 0xE4EA,
02332     0x6F63, 0x9D98, 0x6F64, 0x9D99, 0x6F65, 0x9D9A, 0x6F66, 0xC1CA,
02333     0x6F67, 0x9D9B, 0x6F68, 0x9D9C, 0x6F69, 0x9D9D, 0x6F6A, 0x9D9E,
02334     0x6F6B, 0x9D9F, 0x6F6C, 0x9DA0, 0x6F6D, 0xCCB6, 0x6F6E, 0xB3B1,
02335     0x6F6F, 0x9DA1, 0x6F70, 0x9DA2, 0x6F71, 0x9DA3, 0x6F72, 0xE4FB,
02336     0x6F73, 0x9DA4, 0x6F74, 0xE4F3, 0x6F75, 0x9DA5, 0x6F76, 0x9DA6,
02337     0x6F77, 0x9DA7, 0x6F78, 0xE4FA, 0x6F79, 0x9DA8, 0x6F7A, 0xE4FD,
02338     0x6F7B, 0x9DA9, 0x6F7C, 0xE4FC, 0x6F7D, 0x9DAA, 0x6F7E, 0x9DAB,
02339     0x6F7F, 0x9DAC, 0x6F80, 0x9DAD, 0x6F81, 0x9DAE, 0x6F82, 0x9DAF,
02340     0x6F83, 0x9DB0, 0x6F84, 0xB3CE, 0x6F85, 0x9DB1, 0x6F86, 0x9DB2,
02341     0x6F87, 0x9DB3, 0x6F88, 0xB3BA, 0x6F89, 0xE4F7, 0x6F8A, 0x9DB4,
02342     0x6F8B, 0x9DB5, 0x6F8C, 0xE4F9, 0x6F8D, 0xE4F8, 0x6F8E, 0xC5EC,
02343     0x6F8F, 0x9DB6, 0x6F90, 0x9DB7, 0x6F91, 0x9DB8, 0x6F92, 0x9DB9,
02344     0x6F93, 0x9DBA, 0x6F94, 0x9DBB, 0x6F95, 0x9DBC, 0x6F96, 0x9DBD,
02345     0x6F97, 0x9DBE, 0x6F98, 0x9DBF, 0x6F99, 0x9DC0, 0x6F9A, 0x9DC1,
02346     0x6F9B, 0x9DC2, 0x6F9C, 0xC0BD, 0x6F9D, 0x9DC3, 0x6F9E, 0x9DC4,
02347     0x6F9F, 0x9DC5, 0x6FA0, 0x9DC6, 0x6FA1, 0xD4E8, 0x6FA2, 0x9DC7,
02348     0x6FA3, 0x9DC8, 0x6FA4, 0x9DC9, 0x6FA5, 0x9DCA, 0x6FA6, 0x9DCB,
02349     0x6FA7, 0xE5A2, 0x6FA8, 0x9DCC, 0x6FA9, 0x9DCD, 0x6FAA, 0x9DCE,
02350     0x6FAB, 0x9DCF, 0x6FAC, 0x9DD0, 0x6FAD, 0x9DD1, 0x6FAE, 0x9DD2,
02351     0x6FAF, 0x9DD3, 0x6FB0, 0x9DD4, 0x6FB1, 0x9DD5, 0x6FB2, 0x9DD6,
02352     0x6FB3, 0xB0C4, 0x6FB4, 0x9DD7, 0x6FB5, 0x9DD8, 0x6FB6, 0xE5A4,
02353     0x6FB7, 0x9DD9, 0x6FB8, 0x9DDA, 0x6FB9, 0xE5A3, 0x6FBA, 0x9DDB,
02354     0x6FBB, 0x9DDC, 0x6FBC, 0x9DDD, 0x6FBD, 0x9DDE, 0x6FBE, 0x9DDF,
02355     0x6FBF, 0x9DE0, 0x6FC0, 0xBCA4, 0x6FC1, 0x9DE1, 0x6FC2, 0xE5A5,
02356     0x6FC3, 0x9DE2, 0x6FC4, 0x9DE3, 0x6FC5, 0x9DE4, 0x6FC6, 0x9DE5,
02357     0x6FC7, 0x9DE6, 0x6FC8, 0x9DE7, 0x6FC9, 0xE5A1, 0x6FCA, 0x9DE8,
02358     0x6FCB, 0x9DE9, 0x6FCC, 0x9DEA, 0x6FCD, 0x9DEB, 0x6FCE, 0x9DEC,
02359     0x6FCF, 0x9DED, 0x6FD0, 0x9DEE, 0x6FD1, 0xE4FE, 0x6FD2, 0xB1F4,
02360     0x6FD3, 0x9DEF, 0x6FD4, 0x9DF0, 0x6FD5, 0x9DF1, 0x6FD6, 0x9DF2,
02361     0x6FD7, 0x9DF3, 0x6FD8, 0x9DF4, 0x6FD9, 0x9DF5, 0x6FDA, 0x9DF6,
02362     0x6FDB, 0x9DF7, 0x6FDC, 0x9DF8, 0x6FDD, 0x9DF9, 0x6FDE, 0xE5A8,
02363     0x6FDF, 0x9DFA, 0x6FE0, 0xE5A9, 0x6FE1, 0xE5A6, 0x6FE2, 0x9DFB,
02364     0x6FE3, 0x9DFC, 0x6FE4, 0x9DFD, 0x6FE5, 0x9DFE, 0x6FE6, 0x9E40,
02365     0x6FE7, 0x9E41, 0x6FE8, 0x9E42, 0x6FE9, 0x9E43, 0x6FEA, 0x9E44,
02366     0x6FEB, 0x9E45, 0x6FEC, 0x9E46, 0x6FED, 0x9E47, 0x6FEE, 0xE5A7,
02367     0x6FEF, 0xE5AA, 0x6FF0, 0x9E48, 0x6FF1, 0x9E49, 0x6FF2, 0x9E4A,
02368     0x6FF3, 0x9E4B, 0x6FF4, 0x9E4C, 0x6FF5, 0x9E4D, 0x6FF6, 0x9E4E,
02369     0x6FF7, 0x9E4F, 0x6FF8, 0x9E50, 0x6FF9, 0x9E51, 0x6FFA, 0x9E52,
02370     0x6FFB, 0x9E53, 0x6FFC, 0x9E54, 0x6FFD, 0x9E55, 0x6FFE, 0x9E56,
02371     0x6FFF, 0x9E57, 0x7000, 0x9E58, 0x7001, 0x9E59, 0x7002, 0x9E5A,
02372     0x7003, 0x9E5B, 0x7004, 0x9E5C, 0x7005, 0x9E5D, 0x7006, 0x9E5E,
02373     0x7007, 0x9E5F, 0x7008, 0x9E60, 0x7009, 0x9E61, 0x700A, 0x9E62,
02374     0x700B, 0x9E63, 0x700C, 0x9E64, 0x700D, 0x9E65, 0x700E, 0x9E66,
02375     0x700F, 0x9E67, 0x7010, 0x9E68, 0x7011, 0xC6D9, 0x7012, 0x9E69,
02376     0x7013, 0x9E6A, 0x7014, 0x9E6B, 0x7015, 0x9E6C, 0x7016, 0x9E6D,
02377     0x7017, 0x9E6E, 0x7018, 0x9E6F, 0x7019, 0x9E70, 0x701A, 0xE5AB,
02378     0x701B, 0xE5AD, 0x701C, 0x9E71, 0x701D, 0x9E72, 0x701E, 0x9E73,
02379     0x701F, 0x9E74, 0x7020, 0x9E75, 0x7021, 0x9E76, 0x7022, 0x9E77,
02380     0x7023, 0xE5AC, 0x7024, 0x9E78, 0x7025, 0x9E79, 0x7026, 0x9E7A,
02381     0x7027, 0x9E7B, 0x7028, 0x9E7C, 0x7029, 0x9E7D, 0x702A, 0x9E7E,
02382     0x702B, 0x9E80, 0x702C, 0x9E81, 0x702D, 0x9E82, 0x702E, 0x9E83,
02383     0x702F, 0x9E84, 0x7030, 0x9E85, 0x7031, 0x9E86, 0x7032, 0x9E87,
02384     0x7033, 0x9E88, 0x7034, 0x9E89, 0x7035, 0xE5AF, 0x7036, 0x9E8A,
02385     0x7037, 0x9E8B, 0x7038, 0x9E8C, 0x7039, 0xE5AE, 0x703A, 0x9E8D,
02386     0x703B, 0x9E8E, 0x703C, 0x9E8F, 0x703D, 0x9E90, 0x703E, 0x9E91,
02387     0x703F, 0x9E92, 0x7040, 0x9E93, 0x7041, 0x9E94, 0x7042, 0x9E95,
02388     0x7043, 0x9E96, 0x7044, 0x9E97, 0x7045, 0x9E98, 0x7046, 0x9E99,
02389     0x7047, 0x9E9A, 0x7048, 0x9E9B, 0x7049, 0x9E9C, 0x704A, 0x9E9D,
02390     0x704B, 0x9E9E, 0x704C, 0xB9E0, 0x704D, 0x9E9F, 0x704E, 0x9EA0,
02391     0x704F, 0xE5B0, 0x7050, 0x9EA1, 0x7051, 0x9EA2, 0x7052, 0x9EA3,
02392     0x7053, 0x9EA4, 0x7054, 0x9EA5, 0x7055, 0x9EA6, 0x7056, 0x9EA7,
02393     0x7057, 0x9EA8, 0x7058, 0x9EA9, 0x7059, 0x9EAA, 0x705A, 0x9EAB,
02394     0x705B, 0x9EAC, 0x705C, 0x9EAD, 0x705D, 0x9EAE, 0x705E, 0xE5B1,
02395     0x705F, 0x9EAF, 0x7060, 0x9EB0, 0x7061, 0x9EB1, 0x7062, 0x9EB2,
02396     0x7063, 0x9EB3, 0x7064, 0x9EB4, 0x7065, 0x9EB5, 0x7066, 0x9EB6,
02397     0x7067, 0x9EB7, 0x7068, 0x9EB8, 0x7069, 0x9EB9, 0x706A, 0x9EBA,
02398     0x706B, 0xBBF0, 0x706C, 0xECE1, 0x706D, 0xC3F0, 0x706E, 0x9EBB,
02399     0x706F, 0xB5C6, 0x7070, 0xBBD2, 0x7071, 0x9EBC, 0x7072, 0x9EBD,
02400     0x7073, 0x9EBE, 0x7074, 0x9EBF, 0x7075, 0xC1E9, 0x7076, 0xD4EE,
02401     0x7077, 0x9EC0, 0x7078, 0xBEC4, 0x7079, 0x9EC1, 0x707A, 0x9EC2,
02402     0x707B, 0x9EC3, 0x707C, 0xD7C6, 0x707D, 0x9EC4, 0x707E, 0xD4D6,
02403     0x707F, 0xB2D3, 0x7080, 0xECBE, 0x7081, 0x9EC5, 0x7082, 0x9EC6,
02404     0x7083, 0x9EC7, 0x7084, 0x9EC8, 0x7085, 0xEAC1, 0x7086, 0x9EC9,
02405     0x7087, 0x9ECA, 0x7088, 0x9ECB, 0x7089, 0xC2AF, 0x708A, 0xB4B6,
02406     0x708B, 0x9ECC, 0x708C, 0x9ECD, 0x708D, 0x9ECE, 0x708E, 0xD1D7,
02407     0x708F, 0x9ECF, 0x7090, 0x9ED0, 0x7091, 0x9ED1, 0x7092, 0xB3B4,
02408     0x7093, 0x9ED2, 0x7094, 0xC8B2, 0x7095, 0xBFBB, 0x7096, 0xECC0,
02409     0x7097, 0x9ED3, 0x7098, 0x9ED4, 0x7099, 0xD6CB, 0x709A, 0x9ED5,
02410     0x709B, 0x9ED6, 0x709C, 0xECBF, 0x709D, 0xECC1, 0x709E, 0x9ED7,
02411     0x709F, 0x9ED8, 0x70A0, 0x9ED9, 0x70A1, 0x9EDA, 0x70A2, 0x9EDB,
02412     0x70A3, 0x9EDC, 0x70A4, 0x9EDD, 0x70A5, 0x9EDE, 0x70A6, 0x9EDF,
02413     0x70A7, 0x9EE0, 0x70A8, 0x9EE1, 0x70A9, 0x9EE2, 0x70AA, 0x9EE3,
02414     0x70AB, 0xECC5, 0x70AC, 0xBEE6, 0x70AD, 0xCCBF, 0x70AE, 0xC5DA,
02415     0x70AF, 0xBEBC, 0x70B0, 0x9EE4, 0x70B1, 0xECC6, 0x70B2, 0x9EE5,
02416     0x70B3, 0xB1FE, 0x70B4, 0x9EE6, 0x70B5, 0x9EE7, 0x70B6, 0x9EE8,
02417     0x70B7, 0xECC4, 0x70B8, 0xD5A8, 0x70B9, 0xB5E3, 0x70BA, 0x9EE9,
02418     0x70BB, 0xECC2, 0x70BC, 0xC1B6, 0x70BD, 0xB3E3, 0x70BE, 0x9EEA,
02419     0x70BF, 0x9EEB, 0x70C0, 0xECC3, 0x70C1, 0xCBB8, 0x70C2, 0xC0C3,
02420     0x70C3, 0xCCFE, 0x70C4, 0x9EEC, 0x70C5, 0x9EED, 0x70C6, 0x9EEE,
02421     0x70C7, 0x9EEF, 0x70C8, 0xC1D2, 0x70C9, 0x9EF0, 0x70CA, 0xECC8,
02422     0x70CB, 0x9EF1, 0x70CC, 0x9EF2, 0x70CD, 0x9EF3, 0x70CE, 0x9EF4,
02423     0x70CF, 0x9EF5, 0x70D0, 0x9EF6, 0x70D1, 0x9EF7, 0x70D2, 0x9EF8,
02424     0x70D3, 0x9EF9, 0x70D4, 0x9EFA, 0x70D5, 0x9EFB, 0x70D6, 0x9EFC,
02425     0x70D7, 0x9EFD, 0x70D8, 0xBAE6, 0x70D9, 0xC0D3, 0x70DA, 0x9EFE,
02426     0x70DB, 0xD6F2, 0x70DC, 0x9F40, 0x70DD, 0x9F41, 0x70DE, 0x9F42,
02427     0x70DF, 0xD1CC, 0x70E0, 0x9F43, 0x70E1, 0x9F44, 0x70E2, 0x9F45,
02428     0x70E3, 0x9F46, 0x70E4, 0xBFBE, 0x70E5, 0x9F47, 0x70E6, 0xB7B3,
02429     0x70E7, 0xC9D5, 0x70E8, 0xECC7, 0x70E9, 0xBBE2, 0x70EA, 0x9F48,
02430     0x70EB, 0xCCCC, 0x70EC, 0xBDFD, 0x70ED, 0xC8C8, 0x70EE, 0x9F49,
02431     0x70EF, 0xCFA9, 0x70F0, 0x9F4A, 0x70F1, 0x9F4B, 0x70F2, 0x9F4C,
02432     0x70F3, 0x9F4D, 0x70F4, 0x9F4E, 0x70F5, 0x9F4F, 0x70F6, 0x9F50,
02433     0x70F7, 0xCDE9, 0x70F8, 0x9F51, 0x70F9, 0xC5EB, 0x70FA, 0x9F52,
02434     0x70FB, 0x9F53, 0x70FC, 0x9F54, 0x70FD, 0xB7E9, 0x70FE, 0x9F55,
02435     0x70FF, 0x9F56, 0x7100, 0x9F57, 0x7101, 0x9F58, 0x7102, 0x9F59,
02436     0x7103, 0x9F5A, 0x7104, 0x9F5B, 0x7105, 0x9F5C, 0x7106, 0x9F5D,
02437     0x7107, 0x9F5E, 0x7108, 0x9F5F, 0x7109, 0xD1C9, 0x710A, 0xBAB8,
02438     0x710B, 0x9F60, 0x710C, 0x9F61, 0x710D, 0x9F62, 0x710E, 0x9F63,
02439     0x710F, 0x9F64, 0x7110, 0xECC9, 0x7111, 0x9F65, 0x7112, 0x9F66,
02440     0x7113, 0xECCA, 0x7114, 0x9F67, 0x7115, 0xBBC0, 0x7116, 0xECCB,
02441     0x7117, 0x9F68, 0x7118, 0xECE2, 0x7119, 0xB1BA, 0x711A, 0xB7D9,
02442     0x711B, 0x9F69, 0x711C, 0x9F6A, 0x711D, 0x9F6B, 0x711E, 0x9F6C,
02443     0x711F, 0x9F6D, 0x7120, 0x9F6E, 0x7121, 0x9F6F, 0x7122, 0x9F70,
02444     0x7123, 0x9F71, 0x7124, 0x9F72, 0x7125, 0x9F73, 0x7126, 0xBDB9,
02445     0x7127, 0x9F74, 0x7128, 0x9F75, 0x7129, 0x9F76, 0x712A, 0x9F77,
02446     0x712B, 0x9F78, 0x712C, 0x9F79, 0x712D, 0x9F7A, 0x712E, 0x9F7B,
02447     0x712F, 0xECCC, 0x7130, 0xD1E6, 0x7131, 0xECCD, 0x7132, 0x9F7C,
02448     0x7133, 0x9F7D, 0x7134, 0x9F7E, 0x7135, 0x9F80, 0x7136, 0xC8BB,
02449     0x7137, 0x9F81, 0x7138, 0x9F82, 0x7139, 0x9F83, 0x713A, 0x9F84,
02450     0x713B, 0x9F85, 0x713C, 0x9F86, 0x713D, 0x9F87, 0x713E, 0x9F88,
02451     0x713F, 0x9F89, 0x7140, 0x9F8A, 0x7141, 0x9F8B, 0x7142, 0x9F8C,
02452     0x7143, 0x9F8D, 0x7144, 0x9F8E, 0x7145, 0xECD1, 0x7146, 0x9F8F,
02453     0x7147, 0x9F90, 0x7148, 0x9F91, 0x7149, 0x9F92, 0x714A, 0xECD3,
02454     0x714B, 0x9F93, 0x714C, 0xBBCD, 0x714D, 0x9F94, 0x714E, 0xBCE5,
02455     0x714F, 0x9F95, 0x7150, 0x9F96, 0x7151, 0x9F97, 0x7152, 0x9F98,
02456     0x7153, 0x9F99, 0x7154, 0x9F9A, 0x7155, 0x9F9B, 0x7156, 0x9F9C,
02457     0x7157, 0x9F9D, 0x7158, 0x9F9E, 0x7159, 0x9F9F, 0x715A, 0x9FA0,
02458     0x715B, 0x9FA1, 0x715C, 0xECCF, 0x715D, 0x9FA2, 0x715E, 0xC9B7,
02459     0x715F, 0x9FA3, 0x7160, 0x9FA4, 0x7161, 0x9FA5, 0x7162, 0x9FA6,
02460     0x7163, 0x9FA7, 0x7164, 0xC3BA, 0x7165, 0x9FA8, 0x7166, 0xECE3,
02461     0x7167, 0xD5D5, 0x7168, 0xECD0, 0x7169, 0x9FA9, 0x716A, 0x9FAA,
02462     0x716B, 0x9FAB, 0x716C, 0x9FAC, 0x716D, 0x9FAD, 0x716E, 0xD6F3,
02463     0x716F, 0x9FAE, 0x7170, 0x9FAF, 0x7171, 0x9FB0, 0x7172, 0xECD2,
02464     0x7173, 0xECCE, 0x7174, 0x9FB1, 0x7175, 0x9FB2, 0x7176, 0x9FB3,
02465     0x7177, 0x9FB4, 0x7178, 0xECD4, 0x7179, 0x9FB5, 0x717A, 0xECD5,
02466     0x717B, 0x9FB6, 0x717C, 0x9FB7, 0x717D, 0xC9BF, 0x717E, 0x9FB8,
02467     0x717F, 0x9FB9, 0x7180, 0x9FBA, 0x7181, 0x9FBB, 0x7182, 0x9FBC,
02468     0x7183, 0x9FBD, 0x7184, 0xCFA8, 0x7185, 0x9FBE, 0x7186, 0x9FBF,
02469     0x7187, 0x9FC0, 0x7188, 0x9FC1, 0x7189, 0x9FC2, 0x718A, 0xD0DC,
02470     0x718B, 0x9FC3, 0x718C, 0x9FC4, 0x718D, 0x9FC5, 0x718E, 0x9FC6,
02471     0x718F, 0xD1AC, 0x7190, 0x9FC7, 0x7191, 0x9FC8, 0x7192, 0x9FC9,
02472     0x7193, 0x9FCA, 0x7194, 0xC8DB, 0x7195, 0x9FCB, 0x7196, 0x9FCC,
02473     0x7197, 0x9FCD, 0x7198, 0xECD6, 0x7199, 0xCEF5, 0x719A, 0x9FCE,
02474     0x719B, 0x9FCF, 0x719C, 0x9FD0, 0x719D, 0x9FD1, 0x719E, 0x9FD2,
02475     0x719F, 0xCAEC, 0x71A0, 0xECDA, 0x71A1, 0x9FD3, 0x71A2, 0x9FD4,
02476     0x71A3, 0x9FD5, 0x71A4, 0x9FD6, 0x71A5, 0x9FD7, 0x71A6, 0x9FD8,
02477     0x71A7, 0x9FD9, 0x71A8, 0xECD9, 0x71A9, 0x9FDA, 0x71AA, 0x9FDB,
02478     0x71AB, 0x9FDC, 0x71AC, 0xB0BE, 0x71AD, 0x9FDD, 0x71AE, 0x9FDE,
02479     0x71AF, 0x9FDF, 0x71B0, 0x9FE0, 0x71B1, 0x9FE1, 0x71B2, 0x9FE2,
02480     0x71B3, 0xECD7, 0x71B4, 0x9FE3, 0x71B5, 0xECD8, 0x71B6, 0x9FE4,
02481     0x71B7, 0x9FE5, 0x71B8, 0x9FE6, 0x71B9, 0xECE4, 0x71BA, 0x9FE7,
02482     0x71BB, 0x9FE8, 0x71BC, 0x9FE9, 0x71BD, 0x9FEA, 0x71BE, 0x9FEB,
02483     0x71BF, 0x9FEC, 0x71C0, 0x9FED, 0x71C1, 0x9FEE, 0x71C2, 0x9FEF,
02484     0x71C3, 0xC8BC, 0x71C4, 0x9FF0, 0x71C5, 0x9FF1, 0x71C6, 0x9FF2,
02485     0x71C7, 0x9FF3, 0x71C8, 0x9FF4, 0x71C9, 0x9FF5, 0x71CA, 0x9FF6,
02486     0x71CB, 0x9FF7, 0x71CC, 0x9FF8, 0x71CD, 0x9FF9, 0x71CE, 0xC1C7,
02487     0x71CF, 0x9FFA, 0x71D0, 0x9FFB, 0x71D1, 0x9FFC, 0x71D2, 0x9FFD,
02488     0x71D3, 0x9FFE, 0x71D4, 0xECDC, 0x71D5, 0xD1E0, 0x71D6, 0xA040,
02489     0x71D7, 0xA041, 0x71D8, 0xA042, 0x71D9, 0xA043, 0x71DA, 0xA044,
02490     0x71DB, 0xA045, 0x71DC, 0xA046, 0x71DD, 0xA047, 0x71DE, 0xA048,
02491     0x71DF, 0xA049, 0x71E0, 0xECDB, 0x71E1, 0xA04A, 0x71E2, 0xA04B,
02492     0x71E3, 0xA04C, 0x71E4, 0xA04D, 0x71E5, 0xD4EF, 0x71E6, 0xA04E,
02493     0x71E7, 0xECDD, 0x71E8, 0xA04F, 0x71E9, 0xA050, 0x71EA, 0xA051,
02494     0x71EB, 0xA052, 0x71EC, 0xA053, 0x71ED, 0xA054, 0x71EE, 0xDBC6,
02495     0x71EF, 0xA055, 0x71F0, 0xA056, 0x71F1, 0xA057, 0x71F2, 0xA058,
02496     0x71F3, 0xA059, 0x71F4, 0xA05A, 0x71F5, 0xA05B, 0x71F6, 0xA05C,
02497     0x71F7, 0xA05D, 0x71F8, 0xA05E, 0x71F9, 0xECDE, 0x71FA, 0xA05F,
02498     0x71FB, 0xA060, 0x71FC, 0xA061, 0x71FD, 0xA062, 0x71FE, 0xA063,
02499     0x71FF, 0xA064, 0x7200, 0xA065, 0x7201, 0xA066, 0x7202, 0xA067,
02500     0x7203, 0xA068, 0x7204, 0xA069, 0x7205, 0xA06A, 0x7206, 0xB1AC,
02501     0x7207, 0xA06B, 0x7208, 0xA06C, 0x7209, 0xA06D, 0x720A, 0xA06E,
02502     0x720B, 0xA06F, 0x720C, 0xA070, 0x720D, 0xA071, 0x720E, 0xA072,
02503     0x720F, 0xA073, 0x7210, 0xA074, 0x7211, 0xA075, 0x7212, 0xA076,
02504     0x7213, 0xA077, 0x7214, 0xA078, 0x7215, 0xA079, 0x7216, 0xA07A,
02505     0x7217, 0xA07B, 0x7218, 0xA07C, 0x7219, 0xA07D, 0x721A, 0xA07E,
02506     0x721B, 0xA080, 0x721C, 0xA081, 0x721D, 0xECDF, 0x721E, 0xA082,
02507     0x721F, 0xA083, 0x7220, 0xA084, 0x7221, 0xA085, 0x7222, 0xA086,
02508     0x7223, 0xA087, 0x7224, 0xA088, 0x7225, 0xA089, 0x7226, 0xA08A,
02509     0x7227, 0xA08B, 0x7228, 0xECE0, 0x7229, 0xA08C, 0x722A, 0xD7A6,
02510     0x722B, 0xA08D, 0x722C, 0xC5C0, 0x722D, 0xA08E, 0x722E, 0xA08F,
02511     0x722F, 0xA090, 0x7230, 0xEBBC, 0x7231, 0xB0AE, 0x7232, 0xA091,
02512     0x7233, 0xA092, 0x7234, 0xA093, 0x7235, 0xBEF4, 0x7236, 0xB8B8,
02513     0x7237, 0xD2AF, 0x7238, 0xB0D6, 0x7239, 0xB5F9, 0x723A, 0xA094,
02514     0x723B, 0xD8B3, 0x723C, 0xA095, 0x723D, 0xCBAC, 0x723E, 0xA096,
02515     0x723F, 0xE3DD, 0x7240, 0xA097, 0x7241, 0xA098, 0x7242, 0xA099,
02516     0x7243, 0xA09A, 0x7244, 0xA09B, 0x7245, 0xA09C, 0x7246, 0xA09D,
02517     0x7247, 0xC6AC, 0x7248, 0xB0E6, 0x7249, 0xA09E, 0x724A, 0xA09F,
02518     0x724B, 0xA0A0, 0x724C, 0xC5C6, 0x724D, 0xEBB9, 0x724E, 0xA0A1,
02519     0x724F, 0xA0A2, 0x7250, 0xA0A3, 0x7251, 0xA0A4, 0x7252, 0xEBBA,
02520     0x7253, 0xA0A5, 0x7254, 0xA0A6, 0x7255, 0xA0A7, 0x7256, 0xEBBB,
02521     0x7257, 0xA0A8, 0x7258, 0xA0A9, 0x7259, 0xD1C0, 0x725A, 0xA0AA,
02522     0x725B, 0xC5A3, 0x725C, 0xA0AB, 0x725D, 0xEAF2, 0x725E, 0xA0AC,
02523     0x725F, 0xC4B2, 0x7260, 0xA0AD, 0x7261, 0xC4B5, 0x7262, 0xC0CE,
02524     0x7263, 0xA0AE, 0x7264, 0xA0AF, 0x7265, 0xA0B0, 0x7266, 0xEAF3,
02525     0x7267, 0xC4C1, 0x7268, 0xA0B1, 0x7269, 0xCEEF, 0x726A, 0xA0B2,
02526     0x726B, 0xA0B3, 0x726C, 0xA0B4, 0x726D, 0xA0B5, 0x726E, 0xEAF0,
02527     0x726F, 0xEAF4, 0x7270, 0xA0B6, 0x7271, 0xA0B7, 0x7272, 0xC9FC,
02528     0x7273, 0xA0B8, 0x7274, 0xA0B9, 0x7275, 0xC7A3, 0x7276, 0xA0BA,
02529     0x7277, 0xA0BB, 0x7278, 0xA0BC, 0x7279, 0xCCD8, 0x727A, 0xCEFE,
02530     0x727B, 0xA0BD, 0x727C, 0xA0BE, 0x727D, 0xA0BF, 0x727E, 0xEAF5,
02531     0x727F, 0xEAF6, 0x7280, 0xCFAC, 0x7281, 0xC0E7, 0x7282, 0xA0C0,
02532     0x7283, 0xA0C1, 0x7284, 0xEAF7, 0x7285, 0xA0C2, 0x7286, 0xA0C3,
02533     0x7287, 0xA0C4, 0x7288, 0xA0C5, 0x7289, 0xA0C6, 0x728A, 0xB6BF,
02534     0x728B, 0xEAF8, 0x728C, 0xA0C7, 0x728D, 0xEAF9, 0x728E, 0xA0C8,
02535     0x728F, 0xEAFA, 0x7290, 0xA0C9, 0x7291, 0xA0CA, 0x7292, 0xEAFB,
02536     0x7293, 0xA0CB, 0x7294, 0xA0CC, 0x7295, 0xA0CD, 0x7296, 0xA0CE,
02537     0x7297, 0xA0CF, 0x7298, 0xA0D0, 0x7299, 0xA0D1, 0x729A, 0xA0D2,
02538     0x729B, 0xA0D3, 0x729C, 0xA0D4, 0x729D, 0xA0D5, 0x729E, 0xA0D6,
02539     0x729F, 0xEAF1, 0x72A0, 0xA0D7, 0x72A1, 0xA0D8, 0x72A2, 0xA0D9,
02540     0x72A3, 0xA0DA, 0x72A4, 0xA0DB, 0x72A5, 0xA0DC, 0x72A6, 0xA0DD,
02541     0x72A7, 0xA0DE, 0x72A8, 0xA0DF, 0x72A9, 0xA0E0, 0x72AA, 0xA0E1,
02542     0x72AB, 0xA0E2, 0x72AC, 0xC8AE, 0x72AD, 0xE1EB, 0x72AE, 0xA0E3,
02543     0x72AF, 0xB7B8, 0x72B0, 0xE1EC, 0x72B1, 0xA0E4, 0x72B2, 0xA0E5,
02544     0x72B3, 0xA0E6, 0x72B4, 0xE1ED, 0x72B5, 0xA0E7, 0x72B6, 0xD7B4,
02545     0x72B7, 0xE1EE, 0x72B8, 0xE1EF, 0x72B9, 0xD3CC, 0x72BA, 0xA0E8,
02546     0x72BB, 0xA0E9, 0x72BC, 0xA0EA, 0x72BD, 0xA0EB, 0x72BE, 0xA0EC,
02547     0x72BF, 0xA0ED, 0x72C0, 0xA0EE, 0x72C1, 0xE1F1, 0x72C2, 0xBFF1,
02548     0x72C3, 0xE1F0, 0x72C4, 0xB5D2, 0x72C5, 0xA0EF, 0x72C6, 0xA0F0,
02549     0x72C7, 0xA0F1, 0x72C8, 0xB1B7, 0x72C9, 0xA0F2, 0x72CA, 0xA0F3,
02550     0x72CB, 0xA0F4, 0x72CC, 0xA0F5, 0x72CD, 0xE1F3, 0x72CE, 0xE1F2,
02551     0x72CF, 0xA0F6, 0x72D0, 0xBAFC, 0x72D1, 0xA0F7, 0x72D2, 0xE1F4,
02552     0x72D3, 0xA0F8, 0x72D4, 0xA0F9, 0x72D5, 0xA0FA, 0x72D6, 0xA0FB,
02553     0x72D7, 0xB9B7, 0x72D8, 0xA0FC, 0x72D9, 0xBED1, 0x72DA, 0xA0FD,
02554     0x72DB, 0xA0FE, 0x72DC, 0xAA40, 0x72DD, 0xAA41, 0x72DE, 0xC4FC,
02555     0x72DF, 0xAA42, 0x72E0, 0xBADD, 0x72E1, 0xBDC6, 0x72E2, 0xAA43,
02556     0x72E3, 0xAA44, 0x72E4, 0xAA45, 0x72E5, 0xAA46, 0x72E6, 0xAA47,
02557     0x72E7, 0xAA48, 0x72E8, 0xE1F5, 0x72E9, 0xE1F7, 0x72EA, 0xAA49,
02558     0x72EB, 0xAA4A, 0x72EC, 0xB6C0, 0x72ED, 0xCFC1, 0x72EE, 0xCAA8,
02559     0x72EF, 0xE1F6, 0x72F0, 0xD5F8, 0x72F1, 0xD3FC, 0x72F2, 0xE1F8,
02560     0x72F3, 0xE1FC, 0x72F4, 0xE1F9, 0x72F5, 0xAA4B, 0x72F6, 0xAA4C,
02561     0x72F7, 0xE1FA, 0x72F8, 0xC0EA, 0x72F9, 0xAA4D, 0x72FA, 0xE1FE,
02562     0x72FB, 0xE2A1, 0x72FC, 0xC0C7, 0x72FD, 0xAA4E, 0x72FE, 0xAA4F,
02563     0x72FF, 0xAA50, 0x7300, 0xAA51, 0x7301, 0xE1FB, 0x7302, 0xAA52,
02564     0x7303, 0xE1FD, 0x7304, 0xAA53, 0x7305, 0xAA54, 0x7306, 0xAA55,
02565     0x7307, 0xAA56, 0x7308, 0xAA57, 0x7309, 0xAA58, 0x730A, 0xE2A5,
02566     0x730B, 0xAA59, 0x730C, 0xAA5A, 0x730D, 0xAA5B, 0x730E, 0xC1D4,
02567     0x730F, 0xAA5C, 0x7310, 0xAA5D, 0x7311, 0xAA5E, 0x7312, 0xAA5F,
02568     0x7313, 0xE2A3, 0x7314, 0xAA60, 0x7315, 0xE2A8, 0x7316, 0xB2FE,
02569     0x7317, 0xE2A2, 0x7318, 0xAA61, 0x7319, 0xAA62, 0x731A, 0xAA63,
02570     0x731B, 0xC3CD, 0x731C, 0xB2C2, 0x731D, 0xE2A7, 0x731E, 0xE2A6,
02571     0x731F, 0xAA64, 0x7320, 0xAA65, 0x7321, 0xE2A4, 0x7322, 0xE2A9,
02572     0x7323, 0xAA66, 0x7324, 0xAA67, 0x7325, 0xE2AB, 0x7326, 0xAA68,
02573     0x7327, 0xAA69, 0x7328, 0xAA6A, 0x7329, 0xD0C9, 0x732A, 0xD6ED,
02574     0x732B, 0xC3A8, 0x732C, 0xE2AC, 0x732D, 0xAA6B, 0x732E, 0xCFD7,
02575     0x732F, 0xAA6C, 0x7330, 0xAA6D, 0x7331, 0xE2AE, 0x7332, 0xAA6E,
02576     0x7333, 0xAA6F, 0x7334, 0xBAEF, 0x7335, 0xAA70, 0x7336, 0xAA71,
02577     0x7337, 0xE9E0, 0x7338, 0xE2AD, 0x7339, 0xE2AA, 0x733A, 0xAA72,
02578     0x733B, 0xAA73, 0x733C, 0xAA74, 0x733D, 0xAA75, 0x733E, 0xBBAB,
02579     0x733F, 0xD4B3, 0x7340, 0xAA76, 0x7341, 0xAA77, 0x7342, 0xAA78,
02580     0x7343, 0xAA79, 0x7344, 0xAA7A, 0x7345, 0xAA7B, 0x7346, 0xAA7C,
02581     0x7347, 0xAA7D, 0x7348, 0xAA7E, 0x7349, 0xAA80, 0x734A, 0xAA81,
02582     0x734B, 0xAA82, 0x734C, 0xAA83, 0x734D, 0xE2B0, 0x734E, 0xAA84,
02583     0x734F, 0xAA85, 0x7350, 0xE2AF, 0x7351, 0xAA86, 0x7352, 0xE9E1,
02584     0x7353, 0xAA87, 0x7354, 0xAA88, 0x7355, 0xAA89, 0x7356, 0xAA8A,
02585     0x7357, 0xE2B1, 0x7358, 0xAA8B, 0x7359, 0xAA8C, 0x735A, 0xAA8D,
02586     0x735B, 0xAA8E, 0x735C, 0xAA8F, 0x735D, 0xAA90, 0x735E, 0xAA91,
02587     0x735F, 0xAA92, 0x7360, 0xE2B2, 0x7361, 0xAA93, 0x7362, 0xAA94,
02588     0x7363, 0xAA95, 0x7364, 0xAA96, 0x7365, 0xAA97, 0x7366, 0xAA98,
02589     0x7367, 0xAA99, 0x7368, 0xAA9A, 0x7369, 0xAA9B, 0x736A, 0xAA9C,
02590     0x736B, 0xAA9D, 0x736C, 0xE2B3, 0x736D, 0xCCA1, 0x736E, 0xAA9E,
02591     0x736F, 0xE2B4, 0x7370, 0xAA9F, 0x7371, 0xAAA0, 0x7372, 0xAB40,
02592     0x7373, 0xAB41, 0x7374, 0xAB42, 0x7375, 0xAB43, 0x7376, 0xAB44,
02593     0x7377, 0xAB45, 0x7378, 0xAB46, 0x7379, 0xAB47, 0x737A, 0xAB48,
02594     0x737B, 0xAB49, 0x737C, 0xAB4A, 0x737D, 0xAB4B, 0x737E, 0xE2B5,
02595     0x737F, 0xAB4C, 0x7380, 0xAB4D, 0x7381, 0xAB4E, 0x7382, 0xAB4F,
02596     0x7383, 0xAB50, 0x7384, 0xD0FE, 0x7385, 0xAB51, 0x7386, 0xAB52,
02597     0x7387, 0xC2CA, 0x7388, 0xAB53, 0x7389, 0xD3F1, 0x738A, 0xAB54,
02598     0x738B, 0xCDF5, 0x738C, 0xAB55, 0x738D, 0xAB56, 0x738E, 0xE7E0,
02599     0x738F, 0xAB57, 0x7390, 0xAB58, 0x7391, 0xE7E1, 0x7392, 0xAB59,
02600     0x7393, 0xAB5A, 0x7394, 0xAB5B, 0x7395, 0xAB5C, 0x7396, 0xBEC1,
02601     0x7397, 0xAB5D, 0x7398, 0xAB5E, 0x7399, 0xAB5F, 0x739A, 0xAB60,
02602     0x739B, 0xC2EA, 0x739C, 0xAB61, 0x739D, 0xAB62, 0x739E, 0xAB63,
02603     0x739F, 0xE7E4, 0x73A0, 0xAB64, 0x73A1, 0xAB65, 0x73A2, 0xE7E3,
02604     0x73A3, 0xAB66, 0x73A4, 0xAB67, 0x73A5, 0xAB68, 0x73A6, 0xAB69,
02605     0x73A7, 0xAB6A, 0x73A8, 0xAB6B, 0x73A9, 0xCDE6, 0x73AA, 0xAB6C,
02606     0x73AB, 0xC3B5, 0x73AC, 0xAB6D, 0x73AD, 0xAB6E, 0x73AE, 0xE7E2,
02607     0x73AF, 0xBBB7, 0x73B0, 0xCFD6, 0x73B1, 0xAB6F, 0x73B2, 0xC1E1,
02608     0x73B3, 0xE7E9, 0x73B4, 0xAB70, 0x73B5, 0xAB71, 0x73B6, 0xAB72,
02609     0x73B7, 0xE7E8, 0x73B8, 0xAB73, 0x73B9, 0xAB74, 0x73BA, 0xE7F4,
02610     0x73BB, 0xB2A3, 0x73BC, 0xAB75, 0x73BD, 0xAB76, 0x73BE, 0xAB77,
02611     0x73BF, 0xAB78, 0x73C0, 0xE7EA, 0x73C1, 0xAB79, 0x73C2, 0xE7E6,
02612     0x73C3, 0xAB7A, 0x73C4, 0xAB7B, 0x73C5, 0xAB7C, 0x73C6, 0xAB7D,
02613     0x73C7, 0xAB7E, 0x73C8, 0xE7EC, 0x73C9, 0xE7EB, 0x73CA, 0xC9BA,
02614     0x73CB, 0xAB80, 0x73CC, 0xAB81, 0x73CD, 0xD5E4, 0x73CE, 0xAB82,
02615     0x73CF, 0xE7E5, 0x73D0, 0xB7A9, 0x73D1, 0xE7E7, 0x73D2, 0xAB83,
02616     0x73D3, 0xAB84, 0x73D4, 0xAB85, 0x73D5, 0xAB86, 0x73D6, 0xAB87,
02617     0x73D7, 0xAB88, 0x73D8, 0xAB89, 0x73D9, 0xE7EE, 0x73DA, 0xAB8A,
02618     0x73DB, 0xAB8B, 0x73DC, 0xAB8C, 0x73DD, 0xAB8D, 0x73DE, 0xE7F3,
02619     0x73DF, 0xAB8E, 0x73E0, 0xD6E9, 0x73E1, 0xAB8F, 0x73E2, 0xAB90,
02620     0x73E3, 0xAB91, 0x73E4, 0xAB92, 0x73E5, 0xE7ED, 0x73E6, 0xAB93,
02621     0x73E7, 0xE7F2, 0x73E8, 0xAB94, 0x73E9, 0xE7F1, 0x73EA, 0xAB95,
02622     0x73EB, 0xAB96, 0x73EC, 0xAB97, 0x73ED, 0xB0E0, 0x73EE, 0xAB98,
02623     0x73EF, 0xAB99, 0x73F0, 0xAB9A, 0x73F1, 0xAB9B, 0x73F2, 0xE7F5,
02624     0x73F3, 0xAB9C, 0x73F4, 0xAB9D, 0x73F5, 0xAB9E, 0x73F6, 0xAB9F,
02625     0x73F7, 0xABA0, 0x73F8, 0xAC40, 0x73F9, 0xAC41, 0x73FA, 0xAC42,
02626     0x73FB, 0xAC43, 0x73FC, 0xAC44, 0x73FD, 0xAC45, 0x73FE, 0xAC46,
02627     0x73FF, 0xAC47, 0x7400, 0xAC48, 0x7401, 0xAC49, 0x7402, 0xAC4A,
02628     0x7403, 0xC7F2, 0x7404, 0xAC4B, 0x7405, 0xC0C5, 0x7406, 0xC0ED,
02629     0x7407, 0xAC4C, 0x7408, 0xAC4D, 0x7409, 0xC1F0, 0x740A, 0xE7F0,
02630     0x740B, 0xAC4E, 0x740C, 0xAC4F, 0x740D, 0xAC50, 0x740E, 0xAC51,
02631     0x740F, 0xE7F6, 0x7410, 0xCBF6, 0x7411, 0xAC52, 0x7412, 0xAC53,
02632     0x7413, 0xAC54, 0x7414, 0xAC55, 0x7415, 0xAC56, 0x7416, 0xAC57,
02633     0x7417, 0xAC58, 0x7418, 0xAC59, 0x7419, 0xAC5A, 0x741A, 0xE8A2,
02634     0x741B, 0xE8A1, 0x741C, 0xAC5B, 0x741D, 0xAC5C, 0x741E, 0xAC5D,
02635     0x741F, 0xAC5E, 0x7420, 0xAC5F, 0x7421, 0xAC60, 0x7422, 0xD7C1,
02636     0x7423, 0xAC61, 0x7424, 0xAC62, 0x7425, 0xE7FA, 0x7426, 0xE7F9,
02637     0x7427, 0xAC63, 0x7428, 0xE7FB, 0x7429, 0xAC64, 0x742A, 0xE7F7,
02638     0x742B, 0xAC65, 0x742C, 0xE7FE, 0x742D, 0xAC66, 0x742E, 0xE7FD,
02639     0x742F, 0xAC67, 0x7430, 0xE7FC, 0x7431, 0xAC68, 0x7432, 0xAC69,
02640     0x7433, 0xC1D5, 0x7434, 0xC7D9, 0x7435, 0xC5FD, 0x7436, 0xC5C3,
02641     0x7437, 0xAC6A, 0x7438, 0xAC6B, 0x7439, 0xAC6C, 0x743A, 0xAC6D,
02642     0x743B, 0xAC6E, 0x743C, 0xC7ED, 0x743D, 0xAC6F, 0x743E, 0xAC70,
02643     0x743F, 0xAC71, 0x7440, 0xAC72, 0x7441, 0xE8A3, 0x7442, 0xAC73,
02644     0x7443, 0xAC74, 0x7444, 0xAC75, 0x7445, 0xAC76, 0x7446, 0xAC77,
02645     0x7447, 0xAC78, 0x7448, 0xAC79, 0x7449, 0xAC7A, 0x744A, 0xAC7B,
02646     0x744B, 0xAC7C, 0x744C, 0xAC7D, 0x744D, 0xAC7E, 0x744E, 0xAC80,
02647     0x744F, 0xAC81, 0x7450, 0xAC82, 0x7451, 0xAC83, 0x7452, 0xAC84,
02648     0x7453, 0xAC85, 0x7454, 0xAC86, 0x7455, 0xE8A6, 0x7456, 0xAC87,
02649     0x7457, 0xE8A5, 0x7458, 0xAC88, 0x7459, 0xE8A7, 0x745A, 0xBAF7,
02650     0x745B, 0xE7F8, 0x745C, 0xE8A4, 0x745D, 0xAC89, 0x745E, 0xC8F0,
02651     0x745F, 0xC9AA, 0x7460, 0xAC8A, 0x7461, 0xAC8B, 0x7462, 0xAC8C,
02652     0x7463, 0xAC8D, 0x7464, 0xAC8E, 0x7465, 0xAC8F, 0x7466, 0xAC90,
02653     0x7467, 0xAC91, 0x7468, 0xAC92, 0x7469, 0xAC93, 0x746A, 0xAC94,
02654     0x746B, 0xAC95, 0x746C, 0xAC96, 0x746D, 0xE8A9, 0x746E, 0xAC97,
02655     0x746F, 0xAC98, 0x7470, 0xB9E5, 0x7471, 0xAC99, 0x7472, 0xAC9A,
02656     0x7473, 0xAC9B, 0x7474, 0xAC9C, 0x7475, 0xAC9D, 0x7476, 0xD1FE,
02657     0x7477, 0xE8A8, 0x7478, 0xAC9E, 0x7479, 0xAC9F, 0x747A, 0xACA0,
02658     0x747B, 0xAD40, 0x747C, 0xAD41, 0x747D, 0xAD42, 0x747E, 0xE8AA,
02659     0x747F, 0xAD43, 0x7480, 0xE8AD, 0x7481, 0xE8AE, 0x7482, 0xAD44,
02660     0x7483, 0xC1A7, 0x7484, 0xAD45, 0x7485, 0xAD46, 0x7486, 0xAD47,
02661     0x7487, 0xE8AF, 0x7488, 0xAD48, 0x7489, 0xAD49, 0x748A, 0xAD4A,
02662     0x748B, 0xE8B0, 0x748C, 0xAD4B, 0x748D, 0xAD4C, 0x748E, 0xE8AC,
02663     0x748F, 0xAD4D, 0x7490, 0xE8B4, 0x7491, 0xAD4E, 0x7492, 0xAD4F,
02664     0x7493, 0xAD50, 0x7494, 0xAD51, 0x7495, 0xAD52, 0x7496, 0xAD53,
02665     0x7497, 0xAD54, 0x7498, 0xAD55, 0x7499, 0xAD56, 0x749A, 0xAD57,
02666     0x749B, 0xAD58, 0x749C, 0xE8AB, 0x749D, 0xAD59, 0x749E, 0xE8B1,
02667     0x749F, 0xAD5A, 0x74A0, 0xAD5B, 0x74A1, 0xAD5C, 0x74A2, 0xAD5D,
02668     0x74A3, 0xAD5E, 0x74A4, 0xAD5F, 0x74A5, 0xAD60, 0x74A6, 0xAD61,
02669     0x74A7, 0xE8B5, 0x74A8, 0xE8B2, 0x74A9, 0xE8B3, 0x74AA, 0xAD62,
02670     0x74AB, 0xAD63, 0x74AC, 0xAD64, 0x74AD, 0xAD65, 0x74AE, 0xAD66,
02671     0x74AF, 0xAD67, 0x74B0, 0xAD68, 0x74B1, 0xAD69, 0x74B2, 0xAD6A,
02672     0x74B3, 0xAD6B, 0x74B4, 0xAD6C, 0x74B5, 0xAD6D, 0x74B6, 0xAD6E,
02673     0x74B7, 0xAD6F, 0x74B8, 0xAD70, 0x74B9, 0xAD71, 0x74BA, 0xE8B7,
02674     0x74BB, 0xAD72, 0x74BC, 0xAD73, 0x74BD, 0xAD74, 0x74BE, 0xAD75,
02675     0x74BF, 0xAD76, 0x74C0, 0xAD77, 0x74C1, 0xAD78, 0x74C2, 0xAD79,
02676     0x74C3, 0xAD7A, 0x74C4, 0xAD7B, 0x74C5, 0xAD7C, 0x74C6, 0xAD7D,
02677     0x74C7, 0xAD7E, 0x74C8, 0xAD80, 0x74C9, 0xAD81, 0x74CA, 0xAD82,
02678     0x74CB, 0xAD83, 0x74CC, 0xAD84, 0x74CD, 0xAD85, 0x74CE, 0xAD86,
02679     0x74CF, 0xAD87, 0x74D0, 0xAD88, 0x74D1, 0xAD89, 0x74D2, 0xE8B6,
02680     0x74D3, 0xAD8A, 0x74D4, 0xAD8B, 0x74D5, 0xAD8C, 0x74D6, 0xAD8D,
02681     0x74D7, 0xAD8E, 0x74D8, 0xAD8F, 0x74D9, 0xAD90, 0x74DA, 0xAD91,
02682     0x74DB, 0xAD92, 0x74DC, 0xB9CF, 0x74DD, 0xAD93, 0x74DE, 0xF0AC,
02683     0x74DF, 0xAD94, 0x74E0, 0xF0AD, 0x74E1, 0xAD95, 0x74E2, 0xC6B0,
02684     0x74E3, 0xB0EA, 0x74E4, 0xC8BF, 0x74E5, 0xAD96, 0x74E6, 0xCDDF,
02685     0x74E7, 0xAD97, 0x74E8, 0xAD98, 0x74E9, 0xAD99, 0x74EA, 0xAD9A,
02686     0x74EB, 0xAD9B, 0x74EC, 0xAD9C, 0x74ED, 0xAD9D, 0x74EE, 0xCECD,
02687     0x74EF, 0xEAB1, 0x74F0, 0xAD9E, 0x74F1, 0xAD9F, 0x74F2, 0xADA0,
02688     0x74F3, 0xAE40, 0x74F4, 0xEAB2, 0x74F5, 0xAE41, 0x74F6, 0xC6BF,
02689     0x74F7, 0xB4C9, 0x74F8, 0xAE42, 0x74F9, 0xAE43, 0x74FA, 0xAE44,
02690     0x74FB, 0xAE45, 0x74FC, 0xAE46, 0x74FD, 0xAE47, 0x74FE, 0xAE48,
02691     0x74FF, 0xEAB3, 0x7500, 0xAE49, 0x7501, 0xAE4A, 0x7502, 0xAE4B,
02692     0x7503, 0xAE4C, 0x7504, 0xD5E7, 0x7505, 0xAE4D, 0x7506, 0xAE4E,
02693     0x7507, 0xAE4F, 0x7508, 0xAE50, 0x7509, 0xAE51, 0x750A, 0xAE52,
02694     0x750B, 0xAE53, 0x750C, 0xAE54, 0x750D, 0xDDF9, 0x750E, 0xAE55,
02695     0x750F, 0xEAB4, 0x7510, 0xAE56, 0x7511, 0xEAB5, 0x7512, 0xAE57,
02696     0x7513, 0xEAB6, 0x7514, 0xAE58, 0x7515, 0xAE59, 0x7516, 0xAE5A,
02697     0x7517, 0xAE5B, 0x7518, 0xB8CA, 0x7519, 0xDFB0, 0x751A, 0xC9F5,
02698     0x751B, 0xAE5C, 0x751C, 0xCCF0, 0x751D, 0xAE5D, 0x751E, 0xAE5E,
02699     0x751F, 0xC9FA, 0x7520, 0xAE5F, 0x7521, 0xAE60, 0x7522, 0xAE61,
02700     0x7523, 0xAE62, 0x7524, 0xAE63, 0x7525, 0xC9FB, 0x7526, 0xAE64,
02701     0x7527, 0xAE65, 0x7528, 0xD3C3, 0x7529, 0xCBA6, 0x752A, 0xAE66,
02702     0x752B, 0xB8A6, 0x752C, 0xF0AE, 0x752D, 0xB1C2, 0x752E, 0xAE67,
02703     0x752F, 0xE5B8, 0x7530, 0xCCEF, 0x7531, 0xD3C9, 0x7532, 0xBCD7,
02704     0x7533, 0xC9EA, 0x7534, 0xAE68, 0x7535, 0xB5E7, 0x7536, 0xAE69,
02705     0x7537, 0xC4D0, 0x7538, 0xB5E9, 0x7539, 0xAE6A, 0x753A, 0xEEAE,
02706     0x753B, 0xBBAD, 0x753C, 0xAE6B, 0x753D, 0xAE6C, 0x753E, 0xE7DE,
02707     0x753F, 0xAE6D, 0x7540, 0xEEAF, 0x7541, 0xAE6E, 0x7542, 0xAE6F,
02708     0x7543, 0xAE70, 0x7544, 0xAE71, 0x7545, 0xB3A9, 0x7546, 0xAE72,
02709     0x7547, 0xAE73, 0x7548, 0xEEB2, 0x7549, 0xAE74, 0x754A, 0xAE75,
02710     0x754B, 0xEEB1, 0x754C, 0xBDE7, 0x754D, 0xAE76, 0x754E, 0xEEB0,
02711     0x754F, 0xCEB7, 0x7550, 0xAE77, 0x7551, 0xAE78, 0x7552, 0xAE79,
02712     0x7553, 0xAE7A, 0x7554, 0xC5CF, 0x7555, 0xAE7B, 0x7556, 0xAE7C,
02713     0x7557, 0xAE7D, 0x7558, 0xAE7E, 0x7559, 0xC1F4, 0x755A, 0xDBCE,
02714     0x755B, 0xEEB3, 0x755C, 0xD0F3, 0x755D, 0xAE80, 0x755E, 0xAE81,
02715     0x755F, 0xAE82, 0x7560, 0xAE83, 0x7561, 0xAE84, 0x7562, 0xAE85,
02716     0x7563, 0xAE86, 0x7564, 0xAE87, 0x7565, 0xC2D4, 0x7566, 0xC6E8,
02717     0x7567, 0xAE88, 0x7568, 0xAE89, 0x7569, 0xAE8A, 0x756A, 0xB7AC,
02718     0x756B, 0xAE8B, 0x756C, 0xAE8C, 0x756D, 0xAE8D, 0x756E, 0xAE8E,
02719     0x756F, 0xAE8F, 0x7570, 0xAE90, 0x7571, 0xAE91, 0x7572, 0xEEB4,
02720     0x7573, 0xAE92, 0x7574, 0xB3EB, 0x7575, 0xAE93, 0x7576, 0xAE94,
02721     0x7577, 0xAE95, 0x7578, 0xBBFB, 0x7579, 0xEEB5, 0x757A, 0xAE96,
02722     0x757B, 0xAE97, 0x757C, 0xAE98, 0x757D, 0xAE99, 0x757E, 0xAE9A,
02723     0x757F, 0xE7DC, 0x7580, 0xAE9B, 0x7581, 0xAE9C, 0x7582, 0xAE9D,
02724     0x7583, 0xEEB6, 0x7584, 0xAE9E, 0x7585, 0xAE9F, 0x7586, 0xBDAE,
02725     0x7587, 0xAEA0, 0x7588, 0xAF40, 0x7589, 0xAF41, 0x758A, 0xAF42,
02726     0x758B, 0xF1E2, 0x758C, 0xAF43, 0x758D, 0xAF44, 0x758E, 0xAF45,
02727     0x758F, 0xCAE8, 0x7590, 0xAF46, 0x7591, 0xD2C9, 0x7592, 0xF0DA,
02728     0x7593, 0xAF47, 0x7594, 0xF0DB, 0x7595, 0xAF48, 0x7596, 0xF0DC,
02729     0x7597, 0xC1C6, 0x7598, 0xAF49, 0x7599, 0xB8ED, 0x759A, 0xBECE,
02730     0x759B, 0xAF4A, 0x759C, 0xAF4B, 0x759D, 0xF0DE, 0x759E, 0xAF4C,
02731     0x759F, 0xC5B1, 0x75A0, 0xF0DD, 0x75A1, 0xD1F1, 0x75A2, 0xAF4D,
02732     0x75A3, 0xF0E0, 0x75A4, 0xB0CC, 0x75A5, 0xBDEA, 0x75A6, 0xAF4E,
02733     0x75A7, 0xAF4F, 0x75A8, 0xAF50, 0x75A9, 0xAF51, 0x75AA, 0xAF52,
02734     0x75AB, 0xD2DF, 0x75AC, 0xF0DF, 0x75AD, 0xAF53, 0x75AE, 0xB4AF,
02735     0x75AF, 0xB7E8, 0x75B0, 0xF0E6, 0x75B1, 0xF0E5, 0x75B2, 0xC6A3,
02736     0x75B3, 0xF0E1, 0x75B4, 0xF0E2, 0x75B5, 0xB4C3, 0x75B6, 0xAF54,
02737     0x75B7, 0xAF55, 0x75B8, 0xF0E3, 0x75B9, 0xD5EE, 0x75BA, 0xAF56,
02738     0x75BB, 0xAF57, 0x75BC, 0xCCDB, 0x75BD, 0xBED2, 0x75BE, 0xBCB2,
02739     0x75BF, 0xAF58, 0x75C0, 0xAF59, 0x75C1, 0xAF5A, 0x75C2, 0xF0E8,
02740     0x75C3, 0xF0E7, 0x75C4, 0xF0E4, 0x75C5, 0xB2A1, 0x75C6, 0xAF5B,
02741     0x75C7, 0xD6A2, 0x75C8, 0xD3B8, 0x75C9, 0xBEB7, 0x75CA, 0xC8AC,
02742     0x75CB, 0xAF5C, 0x75CC, 0xAF5D, 0x75CD, 0xF0EA, 0x75CE, 0xAF5E,
02743     0x75CF, 0xAF5F, 0x75D0, 0xAF60, 0x75D1, 0xAF61, 0x75D2, 0xD1F7,
02744     0x75D3, 0xAF62, 0x75D4, 0xD6CC, 0x75D5, 0xBADB, 0x75D6, 0xF0E9,
02745     0x75D7, 0xAF63, 0x75D8, 0xB6BB, 0x75D9, 0xAF64, 0x75DA, 0xAF65,
02746     0x75DB, 0xCDB4, 0x75DC, 0xAF66, 0x75DD, 0xAF67, 0x75DE, 0xC6A6,
02747     0x75DF, 0xAF68, 0x75E0, 0xAF69, 0x75E1, 0xAF6A, 0x75E2, 0xC1A1,
02748     0x75E3, 0xF0EB, 0x75E4, 0xF0EE, 0x75E5, 0xAF6B, 0x75E6, 0xF0ED,
02749     0x75E7, 0xF0F0, 0x75E8, 0xF0EC, 0x75E9, 0xAF6C, 0x75EA, 0xBBBE,
02750     0x75EB, 0xF0EF, 0x75EC, 0xAF6D, 0x75ED, 0xAF6E, 0x75EE, 0xAF6F,
02751     0x75EF, 0xAF70, 0x75F0, 0xCCB5, 0x75F1, 0xF0F2, 0x75F2, 0xAF71,
02752     0x75F3, 0xAF72, 0x75F4, 0xB3D5, 0x75F5, 0xAF73, 0x75F6, 0xAF74,
02753     0x75F7, 0xAF75, 0x75F8, 0xAF76, 0x75F9, 0xB1D4, 0x75FA, 0xAF77,
02754     0x75FB, 0xAF78, 0x75FC, 0xF0F3, 0x75FD, 0xAF79, 0x75FE, 0xAF7A,
02755     0x75FF, 0xF0F4, 0x7600, 0xF0F6, 0x7601, 0xB4E1, 0x7602, 0xAF7B,
02756     0x7603, 0xF0F1, 0x7604, 0xAF7C, 0x7605, 0xF0F7, 0x7606, 0xAF7D,
02757     0x7607, 0xAF7E, 0x7608, 0xAF80, 0x7609, 0xAF81, 0x760A, 0xF0FA,
02758     0x760B, 0xAF82, 0x760C, 0xF0F8, 0x760D, 0xAF83, 0x760E, 0xAF84,
02759     0x760F, 0xAF85, 0x7610, 0xF0F5, 0x7611, 0xAF86, 0x7612, 0xAF87,
02760     0x7613, 0xAF88, 0x7614, 0xAF89, 0x7615, 0xF0FD, 0x7616, 0xAF8A,
02761     0x7617, 0xF0F9, 0x7618, 0xF0FC, 0x7619, 0xF0FE, 0x761A, 0xAF8B,
02762     0x761B, 0xF1A1, 0x761C, 0xAF8C, 0x761D, 0xAF8D, 0x761E, 0xAF8E,
02763     0x761F, 0xCEC1, 0x7620, 0xF1A4, 0x7621, 0xAF8F, 0x7622, 0xF1A3,
02764     0x7623, 0xAF90, 0x7624, 0xC1F6, 0x7625, 0xF0FB, 0x7626, 0xCADD,
02765     0x7627, 0xAF91, 0x7628, 0xAF92, 0x7629, 0xB4F1, 0x762A, 0xB1F1,
02766     0x762B, 0xCCB1, 0x762C, 0xAF93, 0x762D, 0xF1A6, 0x762E, 0xAF94,
02767     0x762F, 0xAF95, 0x7630, 0xF1A7, 0x7631, 0xAF96, 0x7632, 0xAF97,
02768     0x7633, 0xF1AC, 0x7634, 0xD5CE, 0x7635, 0xF1A9, 0x7636, 0xAF98,
02769     0x7637, 0xAF99, 0x7638, 0xC8B3, 0x7639, 0xAF9A, 0x763A, 0xAF9B,
02770     0x763B, 0xAF9C, 0x763C, 0xF1A2, 0x763D, 0xAF9D, 0x763E, 0xF1AB,
02771     0x763F, 0xF1A8, 0x7640, 0xF1A5, 0x7641, 0xAF9E, 0x7642, 0xAF9F,
02772     0x7643, 0xF1AA, 0x7644, 0xAFA0, 0x7645, 0xB040, 0x7646, 0xB041,
02773     0x7647, 0xB042, 0x7648, 0xB043, 0x7649, 0xB044, 0x764A, 0xB045,
02774     0x764B, 0xB046, 0x764C, 0xB0A9, 0x764D, 0xF1AD, 0x764E, 0xB047,
02775     0x764F, 0xB048, 0x7650, 0xB049, 0x7651, 0xB04A, 0x7652, 0xB04B,
02776     0x7653, 0xB04C, 0x7654, 0xF1AF, 0x7655, 0xB04D, 0x7656, 0xF1B1,
02777     0x7657, 0xB04E, 0x7658, 0xB04F, 0x7659, 0xB050, 0x765A, 0xB051,
02778     0x765B, 0xB052, 0x765C, 0xF1B0, 0x765D, 0xB053, 0x765E, 0xF1AE,
02779     0x765F, 0xB054, 0x7660, 0xB055, 0x7661, 0xB056, 0x7662, 0xB057,
02780     0x7663, 0xD1A2, 0x7664, 0xB058, 0x7665, 0xB059, 0x7666, 0xB05A,
02781     0x7667, 0xB05B, 0x7668, 0xB05C, 0x7669, 0xB05D, 0x766A, 0xB05E,
02782     0x766B, 0xF1B2, 0x766C, 0xB05F, 0x766D, 0xB060, 0x766E, 0xB061,
02783     0x766F, 0xF1B3, 0x7670, 0xB062, 0x7671, 0xB063, 0x7672, 0xB064,
02784     0x7673, 0xB065, 0x7674, 0xB066, 0x7675, 0xB067, 0x7676, 0xB068,
02785     0x7677, 0xB069, 0x7678, 0xB9EF, 0x7679, 0xB06A, 0x767A, 0xB06B,
02786     0x767B, 0xB5C7, 0x767C, 0xB06C, 0x767D, 0xB0D7, 0x767E, 0xB0D9,
02787     0x767F, 0xB06D, 0x7680, 0xB06E, 0x7681, 0xB06F, 0x7682, 0xD4ED,
02788     0x7683, 0xB070, 0x7684, 0xB5C4, 0x7685, 0xB071, 0x7686, 0xBDD4,
02789     0x7687, 0xBBCA, 0x7688, 0xF0A7, 0x7689, 0xB072, 0x768A, 0xB073,
02790     0x768B, 0xB8DE, 0x768C, 0xB074, 0x768D, 0xB075, 0x768E, 0xF0A8,
02791     0x768F, 0xB076, 0x7690, 0xB077, 0x7691, 0xB0A8, 0x7692, 0xB078,
02792     0x7693, 0xF0A9, 0x7694, 0xB079, 0x7695, 0xB07A, 0x7696, 0xCDEE,
02793     0x7697, 0xB07B, 0x7698, 0xB07C, 0x7699, 0xF0AA, 0x769A, 0xB07D,
02794     0x769B, 0xB07E, 0x769C, 0xB080, 0x769D, 0xB081, 0x769E, 0xB082,
02795     0x769F, 0xB083, 0x76A0, 0xB084, 0x76A1, 0xB085, 0x76A2, 0xB086,
02796     0x76A3, 0xB087, 0x76A4, 0xF0AB, 0x76A5, 0xB088, 0x76A6, 0xB089,
02797     0x76A7, 0xB08A, 0x76A8, 0xB08B, 0x76A9, 0xB08C, 0x76AA, 0xB08D,
02798     0x76AB, 0xB08E, 0x76AC, 0xB08F, 0x76AD, 0xB090, 0x76AE, 0xC6A4,
02799     0x76AF, 0xB091, 0x76B0, 0xB092, 0x76B1, 0xD6E5, 0x76B2, 0xF1E4,
02800     0x76B3, 0xB093, 0x76B4, 0xF1E5, 0x76B5, 0xB094, 0x76B6, 0xB095,
02801     0x76B7, 0xB096, 0x76B8, 0xB097, 0x76B9, 0xB098, 0x76BA, 0xB099,
02802     0x76BB, 0xB09A, 0x76BC, 0xB09B, 0x76BD, 0xB09C, 0x76BE, 0xB09D,
02803     0x76BF, 0xC3F3, 0x76C0, 0xB09E, 0x76C1, 0xB09F, 0x76C2, 0xD3DB,
02804     0x76C3, 0xB0A0, 0x76C4, 0xB140, 0x76C5, 0xD6D1, 0x76C6, 0xC5E8,
02805     0x76C7, 0xB141, 0x76C8, 0xD3AF, 0x76C9, 0xB142, 0x76CA, 0xD2E6,
02806     0x76CB, 0xB143, 0x76CC, 0xB144, 0x76CD, 0xEEC1, 0x76CE, 0xB0BB,
02807     0x76CF, 0xD5B5, 0x76D0, 0xD1CE, 0x76D1, 0xBCE0, 0x76D2, 0xBAD0,
02808     0x76D3, 0xB145, 0x76D4, 0xBFF8, 0x76D5, 0xB146, 0x76D6, 0xB8C7,
02809     0x76D7, 0xB5C1, 0x76D8, 0xC5CC, 0x76D9, 0xB147, 0x76DA, 0xB148,
02810     0x76DB, 0xCAA2, 0x76DC, 0xB149, 0x76DD, 0xB14A, 0x76DE, 0xB14B,
02811     0x76DF, 0xC3CB, 0x76E0, 0xB14C, 0x76E1, 0xB14D, 0x76E2, 0xB14E,
02812     0x76E3, 0xB14F, 0x76E4, 0xB150, 0x76E5, 0xEEC2, 0x76E6, 0xB151,
02813     0x76E7, 0xB152, 0x76E8, 0xB153, 0x76E9, 0xB154, 0x76EA, 0xB155,
02814     0x76EB, 0xB156, 0x76EC, 0xB157, 0x76ED, 0xB158, 0x76EE, 0xC4BF,
02815     0x76EF, 0xB6A2, 0x76F0, 0xB159, 0x76F1, 0xEDEC, 0x76F2, 0xC3A4,
02816     0x76F3, 0xB15A, 0x76F4, 0xD6B1, 0x76F5, 0xB15B, 0x76F6, 0xB15C,
02817     0x76F7, 0xB15D, 0x76F8, 0xCFE0, 0x76F9, 0xEDEF, 0x76FA, 0xB15E,
02818     0x76FB, 0xB15F, 0x76FC, 0xC5CE, 0x76FD, 0xB160, 0x76FE, 0xB6DC,
02819     0x76FF, 0xB161, 0x7700, 0xB162, 0x7701, 0xCAA1, 0x7702, 0xB163,
02820     0x7703, 0xB164, 0x7704, 0xEDED, 0x7705, 0xB165, 0x7706, 0xB166,
02821     0x7707, 0xEDF0, 0x7708, 0xEDF1, 0x7709, 0xC3BC, 0x770A, 0xB167,
02822     0x770B, 0xBFB4, 0x770C, 0xB168, 0x770D, 0xEDEE, 0x770E, 0xB169,
02823     0x770F, 0xB16A, 0x7710, 0xB16B, 0x7711, 0xB16C, 0x7712, 0xB16D,
02824     0x7713, 0xB16E, 0x7714, 0xB16F, 0x7715, 0xB170, 0x7716, 0xB171,
02825     0x7717, 0xB172, 0x7718, 0xB173, 0x7719, 0xEDF4, 0x771A, 0xEDF2,
02826     0x771B, 0xB174, 0x771C, 0xB175, 0x771D, 0xB176, 0x771E, 0xB177,
02827     0x771F, 0xD5E6, 0x7720, 0xC3DF, 0x7721, 0xB178, 0x7722, 0xEDF3,
02828     0x7723, 0xB179, 0x7724, 0xB17A, 0x7725, 0xB17B, 0x7726, 0xEDF6,
02829     0x7727, 0xB17C, 0x7728, 0xD5A3, 0x7729, 0xD1A3, 0x772A, 0xB17D,
02830     0x772B, 0xB17E, 0x772C, 0xB180, 0x772D, 0xEDF5, 0x772E, 0xB181,
02831     0x772F, 0xC3D0, 0x7730, 0xB182, 0x7731, 0xB183, 0x7732, 0xB184,
02832     0x7733, 0xB185, 0x7734, 0xB186, 0x7735, 0xEDF7, 0x7736, 0xBFF4,
02833     0x7737, 0xBEEC, 0x7738, 0xEDF8, 0x7739, 0xB187, 0x773A, 0xCCF7,
02834     0x773B, 0xB188, 0x773C, 0xD1DB, 0x773D, 0xB189, 0x773E, 0xB18A,
02835     0x773F, 0xB18B, 0x7740, 0xD7C5, 0x7741, 0xD5F6, 0x7742, 0xB18C,
02836     0x7743, 0xEDFC, 0x7744, 0xB18D, 0x7745, 0xB18E, 0x7746, 0xB18F,
02837     0x7747, 0xEDFB, 0x7748, 0xB190, 0x7749, 0xB191, 0x774A, 0xB192,
02838     0x774B, 0xB193, 0x774C, 0xB194, 0x774D, 0xB195, 0x774E, 0xB196,
02839     0x774F, 0xB197, 0x7750, 0xEDF9, 0x7751, 0xEDFA, 0x7752, 0xB198,
02840     0x7753, 0xB199, 0x7754, 0xB19A, 0x7755, 0xB19B, 0x7756, 0xB19C,
02841     0x7757, 0xB19D, 0x7758, 0xB19E, 0x7759, 0xB19F, 0x775A, 0xEDFD,
02842     0x775B, 0xBEA6, 0x775C, 0xB1A0, 0x775D, 0xB240, 0x775E, 0xB241,
02843     0x775F, 0xB242, 0x7760, 0xB243, 0x7761, 0xCBAF, 0x7762, 0xEEA1,
02844     0x7763, 0xB6BD, 0x7764, 0xB244, 0x7765, 0xEEA2, 0x7766, 0xC4C0,
02845     0x7767, 0xB245, 0x7768, 0xEDFE, 0x7769, 0xB246, 0x776A, 0xB247,
02846     0x776B, 0xBDDE, 0x776C, 0xB2C7, 0x776D, 0xB248, 0x776E, 0xB249,
02847     0x776F, 0xB24A, 0x7770, 0xB24B, 0x7771, 0xB24C, 0x7772, 0xB24D,
02848     0x7773, 0xB24E, 0x7774, 0xB24F, 0x7775, 0xB250, 0x7776, 0xB251,
02849     0x7777, 0xB252, 0x7778, 0xB253, 0x7779, 0xB6C3, 0x777A, 0xB254,
02850     0x777B, 0xB255, 0x777C, 0xB256, 0x777D, 0xEEA5, 0x777E, 0xD8BA,
02851     0x777F, 0xEEA3, 0x7780, 0xEEA6, 0x7781, 0xB257, 0x7782, 0xB258,
02852     0x7783, 0xB259, 0x7784, 0xC3E9, 0x7785, 0xB3F2, 0x7786, 0xB25A,
02853     0x7787, 0xB25B, 0x7788, 0xB25C, 0x7789, 0xB25D, 0x778A, 0xB25E,
02854     0x778B, 0xB25F, 0x778C, 0xEEA7, 0x778D, 0xEEA4, 0x778E, 0xCFB9,
02855     0x778F, 0xB260, 0x7790, 0xB261, 0x7791, 0xEEA8, 0x7792, 0xC2F7,
02856     0x7793, 0xB262, 0x7794, 0xB263, 0x7795, 0xB264, 0x7796, 0xB265,
02857     0x7797, 0xB266, 0x7798, 0xB267, 0x7799, 0xB268, 0x779A, 0xB269,
02858     0x779B, 0xB26A, 0x779C, 0xB26B, 0x779D, 0xB26C, 0x779E, 0xB26D,
02859     0x779F, 0xEEA9, 0x77A0, 0xEEAA, 0x77A1, 0xB26E, 0x77A2, 0xDEAB,
02860     0x77A3, 0xB26F, 0x77A4, 0xB270, 0x77A5, 0xC6B3, 0x77A6, 0xB271,
02861     0x77A7, 0xC7C6, 0x77A8, 0xB272, 0x77A9, 0xD6F5, 0x77AA, 0xB5C9,
02862     0x77AB, 0xB273, 0x77AC, 0xCBB2, 0x77AD, 0xB274, 0x77AE, 0xB275,
02863     0x77AF, 0xB276, 0x77B0, 0xEEAB, 0x77B1, 0xB277, 0x77B2, 0xB278,
02864     0x77B3, 0xCDAB, 0x77B4, 0xB279, 0x77B5, 0xEEAC, 0x77B6, 0xB27A,
02865     0x77B7, 0xB27B, 0x77B8, 0xB27C, 0x77B9, 0xB27D, 0x77BA, 0xB27E,
02866     0x77BB, 0xD5B0, 0x77BC, 0xB280, 0x77BD, 0xEEAD, 0x77BE, 0xB281,
02867     0x77BF, 0xF6C4, 0x77C0, 0xB282, 0x77C1, 0xB283, 0x77C2, 0xB284,
02868     0x77C3, 0xB285, 0x77C4, 0xB286, 0x77C5, 0xB287, 0x77C6, 0xB288,
02869     0x77C7, 0xB289, 0x77C8, 0xB28A, 0x77C9, 0xB28B, 0x77CA, 0xB28C,
02870     0x77CB, 0xB28D, 0x77CC, 0xB28E, 0x77CD, 0xDBC7, 0x77CE, 0xB28F,
02871     0x77CF, 0xB290, 0x77D0, 0xB291, 0x77D1, 0xB292, 0x77D2, 0xB293,
02872     0x77D3, 0xB294, 0x77D4, 0xB295, 0x77D5, 0xB296, 0x77D6, 0xB297,
02873     0x77D7, 0xB4A3, 0x77D8, 0xB298, 0x77D9, 0xB299, 0x77DA, 0xB29A,
02874     0x77DB, 0xC3AC, 0x77DC, 0xF1E6, 0x77DD, 0xB29B, 0x77DE, 0xB29C,
02875     0x77DF, 0xB29D, 0x77E0, 0xB29E, 0x77E1, 0xB29F, 0x77E2, 0xCAB8,
02876     0x77E3, 0xD2D3, 0x77E4, 0xB2A0, 0x77E5, 0xD6AA, 0x77E6, 0xB340,
02877     0x77E7, 0xEFF2, 0x77E8, 0xB341, 0x77E9, 0xBED8, 0x77EA, 0xB342,
02878     0x77EB, 0xBDC3, 0x77EC, 0xEFF3, 0x77ED, 0xB6CC, 0x77EE, 0xB0AB,
02879     0x77EF, 0xB343, 0x77F0, 0xB344, 0x77F1, 0xB345, 0x77F2, 0xB346,
02880     0x77F3, 0xCAAF, 0x77F4, 0xB347, 0x77F5, 0xB348, 0x77F6, 0xEDB6,
02881     0x77F7, 0xB349, 0x77F8, 0xEDB7, 0x77F9, 0xB34A, 0x77FA, 0xB34B,
02882     0x77FB, 0xB34C, 0x77FC, 0xB34D, 0x77FD, 0xCEF9, 0x77FE, 0xB7AF,
02883     0x77FF, 0xBFF3, 0x7800, 0xEDB8, 0x7801, 0xC2EB, 0x7802, 0xC9B0,
02884     0x7803, 0xB34E, 0x7804, 0xB34F, 0x7805, 0xB350, 0x7806, 0xB351,
02885     0x7807, 0xB352, 0x7808, 0xB353, 0x7809, 0xEDB9, 0x780A, 0xB354,
02886     0x780B, 0xB355, 0x780C, 0xC6F6, 0x780D, 0xBFB3, 0x780E, 0xB356,
02887     0x780F, 0xB357, 0x7810, 0xB358, 0x7811, 0xEDBC, 0x7812, 0xC5F8,
02888     0x7813, 0xB359, 0x7814, 0xD1D0, 0x7815, 0xB35A, 0x7816, 0xD7A9,
02889     0x7817, 0xEDBA, 0x7818, 0xEDBB, 0x7819, 0xB35B, 0x781A, 0xD1E2,
02890     0x781B, 0xB35C, 0x781C, 0xEDBF, 0x781D, 0xEDC0, 0x781E, 0xB35D,
02891     0x781F, 0xEDC4, 0x7820, 0xB35E, 0x7821, 0xB35F, 0x7822, 0xB360,
02892     0x7823, 0xEDC8, 0x7824, 0xB361, 0x7825, 0xEDC6, 0x7826, 0xEDCE,
02893     0x7827, 0xD5E8, 0x7828, 0xB362, 0x7829, 0xEDC9, 0x782A, 0xB363,
02894     0x782B, 0xB364, 0x782C, 0xEDC7, 0x782D, 0xEDBE, 0x782E, 0xB365,
02895     0x782F, 0xB366, 0x7830, 0xC5E9, 0x7831, 0xB367, 0x7832, 0xB368,
02896     0x7833, 0xB369, 0x7834, 0xC6C6, 0x7835, 0xB36A, 0x7836, 0xB36B,
02897     0x7837, 0xC9E9, 0x7838, 0xD4D2, 0x7839, 0xEDC1, 0x783A, 0xEDC2,
02898     0x783B, 0xEDC3, 0x783C, 0xEDC5, 0x783D, 0xB36C, 0x783E, 0xC0F9,
02899     0x783F, 0xB36D, 0x7840, 0xB4A1, 0x7841, 0xB36E, 0x7842, 0xB36F,
02900     0x7843, 0xB370, 0x7844, 0xB371, 0x7845, 0xB9E8, 0x7846, 0xB372,
02901     0x7847, 0xEDD0, 0x7848, 0xB373, 0x7849, 0xB374, 0x784A, 0xB375,
02902     0x784B, 0xB376, 0x784C, 0xEDD1, 0x784D, 0xB377, 0x784E, 0xEDCA,
02903     0x784F, 0xB378, 0x7850, 0xEDCF, 0x7851, 0xB379, 0x7852, 0xCEF8,
02904     0x7853, 0xB37A, 0x7854, 0xB37B, 0x7855, 0xCBB6, 0x7856, 0xEDCC,
02905     0x7857, 0xEDCD, 0x7858, 0xB37C, 0x7859, 0xB37D, 0x785A, 0xB37E,
02906     0x785B, 0xB380, 0x785C, 0xB381, 0x785D, 0xCFF5, 0x785E, 0xB382,
02907     0x785F, 0xB383, 0x7860, 0xB384, 0x7861, 0xB385, 0x7862, 0xB386,
02908     0x7863, 0xB387, 0x7864, 0xB388, 0x7865, 0xB389, 0x7866, 0xB38A,
02909     0x7867, 0xB38B, 0x7868, 0xB38C, 0x7869, 0xB38D, 0x786A, 0xEDD2,
02910     0x786B, 0xC1F2, 0x786C, 0xD3B2, 0x786D, 0xEDCB, 0x786E, 0xC8B7,
02911     0x786F, 0xB38E, 0x7870, 0xB38F, 0x7871, 0xB390, 0x7872, 0xB391,
02912     0x7873, 0xB392, 0x7874, 0xB393, 0x7875, 0xB394, 0x7876, 0xB395,
02913     0x7877, 0xBCEF, 0x7878, 0xB396, 0x7879, 0xB397, 0x787A, 0xB398,
02914     0x787B, 0xB399, 0x787C, 0xC5F0, 0x787D, 0xB39A, 0x787E, 0xB39B,
02915     0x787F, 0xB39C, 0x7880, 0xB39D, 0x7881, 0xB39E, 0x7882, 0xB39F,
02916     0x7883, 0xB3A0, 0x7884, 0xB440, 0x7885, 0xB441, 0x7886, 0xB442,
02917     0x7887, 0xEDD6, 0x7888, 0xB443, 0x7889, 0xB5EF, 0x788A, 0xB444,
02918     0x788B, 0xB445, 0x788C, 0xC2B5, 0x788D, 0xB0AD, 0x788E, 0xCBE9,
02919     0x788F, 0xB446, 0x7890, 0xB447, 0x7891, 0xB1AE, 0x7892, 0xB448,
02920     0x7893, 0xEDD4, 0x7894, 0xB449, 0x7895, 0xB44A, 0x7896, 0xB44B,
02921     0x7897, 0xCDEB, 0x7898, 0xB5E2, 0x7899, 0xB44C, 0x789A, 0xEDD5,
02922     0x789B, 0xEDD3, 0x789C, 0xEDD7, 0x789D, 0xB44D, 0x789E, 0xB44E,
02923     0x789F, 0xB5FA, 0x78A0, 0xB44F, 0x78A1, 0xEDD8, 0x78A2, 0xB450,
02924     0x78A3, 0xEDD9, 0x78A4, 0xB451, 0x78A5, 0xEDDC, 0x78A6, 0xB452,
02925     0x78A7, 0xB1CC, 0x78A8, 0xB453, 0x78A9, 0xB454, 0x78AA, 0xB455,
02926     0x78AB, 0xB456, 0x78AC, 0xB457, 0x78AD, 0xB458, 0x78AE, 0xB459,
02927     0x78AF, 0xB45A, 0x78B0, 0xC5F6, 0x78B1, 0xBCEE, 0x78B2, 0xEDDA,
02928     0x78B3, 0xCCBC, 0x78B4, 0xB2EA, 0x78B5, 0xB45B, 0x78B6, 0xB45C,
02929     0x78B7, 0xB45D, 0x78B8, 0xB45E, 0x78B9, 0xEDDB, 0x78BA, 0xB45F,
02930     0x78BB, 0xB460, 0x78BC, 0xB461, 0x78BD, 0xB462, 0x78BE, 0xC4EB,
02931     0x78BF, 0xB463, 0x78C0, 0xB464, 0x78C1, 0xB4C5, 0x78C2, 0xB465,
02932     0x78C3, 0xB466, 0x78C4, 0xB467, 0x78C5, 0xB0F5, 0x78C6, 0xB468,
02933     0x78C7, 0xB469, 0x78C8, 0xB46A, 0x78C9, 0xEDDF, 0x78CA, 0xC0DA,
02934     0x78CB, 0xB4E8, 0x78CC, 0xB46B, 0x78CD, 0xB46C, 0x78CE, 0xB46D,
02935     0x78CF, 0xB46E, 0x78D0, 0xC5CD, 0x78D1, 0xB46F, 0x78D2, 0xB470,
02936     0x78D3, 0xB471, 0x78D4, 0xEDDD, 0x78D5, 0xBFC4, 0x78D6, 0xB472,
02937     0x78D7, 0xB473, 0x78D8, 0xB474, 0x78D9, 0xEDDE, 0x78DA, 0xB475,
02938     0x78DB, 0xB476, 0x78DC, 0xB477, 0x78DD, 0xB478, 0x78DE, 0xB479,
02939     0x78DF, 0xB47A, 0x78E0, 0xB47B, 0x78E1, 0xB47C, 0x78E2, 0xB47D,
02940     0x78E3, 0xB47E, 0x78E4, 0xB480, 0x78E5, 0xB481, 0x78E6, 0xB482,
02941     0x78E7, 0xB483, 0x78E8, 0xC4A5, 0x78E9, 0xB484, 0x78EA, 0xB485,
02942     0x78EB, 0xB486, 0x78EC, 0xEDE0, 0x78ED, 0xB487, 0x78EE, 0xB488,
02943     0x78EF, 0xB489, 0x78F0, 0xB48A, 0x78F1, 0xB48B, 0x78F2, 0xEDE1,
02944     0x78F3, 0xB48C, 0x78F4, 0xEDE3, 0x78F5, 0xB48D, 0x78F6, 0xB48E,
02945     0x78F7, 0xC1D7, 0x78F8, 0xB48F, 0x78F9, 0xB490, 0x78FA, 0xBBC7,
02946     0x78FB, 0xB491, 0x78FC, 0xB492, 0x78FD, 0xB493, 0x78FE, 0xB494,
02947     0x78FF, 0xB495, 0x7900, 0xB496, 0x7901, 0xBDB8, 0x7902, 0xB497,
02948     0x7903, 0xB498, 0x7904, 0xB499, 0x7905, 0xEDE2, 0x7906, 0xB49A,
02949     0x7907, 0xB49B, 0x7908, 0xB49C, 0x7909, 0xB49D, 0x790A, 0xB49E,
02950     0x790B, 0xB49F, 0x790C, 0xB4A0, 0x790D, 0xB540, 0x790E, 0xB541,
02951     0x790F, 0xB542, 0x7910, 0xB543, 0x7911, 0xB544, 0x7912, 0xB545,
02952     0x7913, 0xEDE4, 0x7914, 0xB546, 0x7915, 0xB547, 0x7916, 0xB548,
02953     0x7917, 0xB549, 0x7918, 0xB54A, 0x7919, 0xB54B, 0x791A, 0xB54C,
02954     0x791B, 0xB54D, 0x791C, 0xB54E, 0x791D, 0xB54F, 0x791E, 0xEDE6,
02955     0x791F, 0xB550, 0x7920, 0xB551, 0x7921, 0xB552, 0x7922, 0xB553,
02956     0x7923, 0xB554, 0x7924, 0xEDE5, 0x7925, 0xB555, 0x7926, 0xB556,
02957     0x7927, 0xB557, 0x7928, 0xB558, 0x7929, 0xB559, 0x792A, 0xB55A,
02958     0x792B, 0xB55B, 0x792C, 0xB55C, 0x792D, 0xB55D, 0x792E, 0xB55E,
02959     0x792F, 0xB55F, 0x7930, 0xB560, 0x7931, 0xB561, 0x7932, 0xB562,
02960     0x7933, 0xB563, 0x7934, 0xEDE7, 0x7935, 0xB564, 0x7936, 0xB565,
02961     0x7937, 0xB566, 0x7938, 0xB567, 0x7939, 0xB568, 0x793A, 0xCABE,
02962     0x793B, 0xECEA, 0x793C, 0xC0F1, 0x793D, 0xB569, 0x793E, 0xC9E7,
02963     0x793F, 0xB56A, 0x7940, 0xECEB, 0x7941, 0xC6EE, 0x7942, 0xB56B,
02964     0x7943, 0xB56C, 0x7944, 0xB56D, 0x7945, 0xB56E, 0x7946, 0xECEC,
02965     0x7947, 0xB56F, 0x7948, 0xC6ED, 0x7949, 0xECED, 0x794A, 0xB570,
02966     0x794B, 0xB571, 0x794C, 0xB572, 0x794D, 0xB573, 0x794E, 0xB574,
02967     0x794F, 0xB575, 0x7950, 0xB576, 0x7951, 0xB577, 0x7952, 0xB578,
02968     0x7953, 0xECF0, 0x7954, 0xB579, 0x7955, 0xB57A, 0x7956, 0xD7E6,
02969     0x7957, 0xECF3, 0x7958, 0xB57B, 0x7959, 0xB57C, 0x795A, 0xECF1,
02970     0x795B, 0xECEE, 0x795C, 0xECEF, 0x795D, 0xD7A3, 0x795E, 0xC9F1,
02971     0x795F, 0xCBEE, 0x7960, 0xECF4, 0x7961, 0xB57D, 0x7962, 0xECF2,
02972     0x7963, 0xB57E, 0x7964, 0xB580, 0x7965, 0xCFE9, 0x7966, 0xB581,
02973     0x7967, 0xECF6, 0x7968, 0xC6B1, 0x7969, 0xB582, 0x796A, 0xB583,
02974     0x796B, 0xB584, 0x796C, 0xB585, 0x796D, 0xBCC0, 0x796E, 0xB586,
02975     0x796F, 0xECF5, 0x7970, 0xB587, 0x7971, 0xB588, 0x7972, 0xB589,
02976     0x7973, 0xB58A, 0x7974, 0xB58B, 0x7975, 0xB58C, 0x7976, 0xB58D,
02977     0x7977, 0xB5BB, 0x7978, 0xBBF6, 0x7979, 0xB58E, 0x797A, 0xECF7,
02978     0x797B, 0xB58F, 0x797C, 0xB590, 0x797D, 0xB591, 0x797E, 0xB592,
02979     0x797F, 0xB593, 0x7980, 0xD9F7, 0x7981, 0xBDFB, 0x7982, 0xB594,
02980     0x7983, 0xB595, 0x7984, 0xC2BB, 0x7985, 0xECF8, 0x7986, 0xB596,
02981     0x7987, 0xB597, 0x7988, 0xB598, 0x7989, 0xB599, 0x798A, 0xECF9,
02982     0x798B, 0xB59A, 0x798C, 0xB59B, 0x798D, 0xB59C, 0x798E, 0xB59D,
02983     0x798F, 0xB8A3, 0x7990, 0xB59E, 0x7991, 0xB59F, 0x7992, 0xB5A0,
02984     0x7993, 0xB640, 0x7994, 0xB641, 0x7995, 0xB642, 0x7996, 0xB643,
02985     0x7997, 0xB644, 0x7998, 0xB645, 0x7999, 0xB646, 0x799A, 0xECFA,
02986     0x799B, 0xB647, 0x799C, 0xB648, 0x799D, 0xB649, 0x799E, 0xB64A,
02987     0x799F, 0xB64B, 0x79A0, 0xB64C, 0x79A1, 0xB64D, 0x79A2, 0xB64E,
02988     0x79A3, 0xB64F, 0x79A4, 0xB650, 0x79A5, 0xB651, 0x79A6, 0xB652,
02989     0x79A7, 0xECFB, 0x79A8, 0xB653, 0x79A9, 0xB654, 0x79AA, 0xB655,
02990     0x79AB, 0xB656, 0x79AC, 0xB657, 0x79AD, 0xB658, 0x79AE, 0xB659,
02991     0x79AF, 0xB65A, 0x79B0, 0xB65B, 0x79B1, 0xB65C, 0x79B2, 0xB65D,
02992     0x79B3, 0xECFC, 0x79B4, 0xB65E, 0x79B5, 0xB65F, 0x79B6, 0xB660,
02993     0x79B7, 0xB661, 0x79B8, 0xB662, 0x79B9, 0xD3ED, 0x79BA, 0xD8AE,
02994     0x79BB, 0xC0EB, 0x79BC, 0xB663, 0x79BD, 0xC7DD, 0x79BE, 0xBACC,
02995     0x79BF, 0xB664, 0x79C0, 0xD0E3, 0x79C1, 0xCBBD, 0x79C2, 0xB665,
02996     0x79C3, 0xCDBA, 0x79C4, 0xB666, 0x79C5, 0xB667, 0x79C6, 0xB8D1,
02997     0x79C7, 0xB668, 0x79C8, 0xB669, 0x79C9, 0xB1FC, 0x79CA, 0xB66A,
02998     0x79CB, 0xC7EF, 0x79CC, 0xB66B, 0x79CD, 0xD6D6, 0x79CE, 0xB66C,
02999     0x79CF, 0xB66D, 0x79D0, 0xB66E, 0x79D1, 0xBFC6, 0x79D2, 0xC3EB,
03000     0x79D3, 0xB66F, 0x79D4, 0xB670, 0x79D5, 0xEFF5, 0x79D6, 0xB671,
03001     0x79D7, 0xB672, 0x79D8, 0xC3D8, 0x79D9, 0xB673, 0x79DA, 0xB674,
03002     0x79DB, 0xB675, 0x79DC, 0xB676, 0x79DD, 0xB677, 0x79DE, 0xB678,
03003     0x79DF, 0xD7E2, 0x79E0, 0xB679, 0x79E1, 0xB67A, 0x79E2, 0xB67B,
03004     0x79E3, 0xEFF7, 0x79E4, 0xB3D3, 0x79E5, 0xB67C, 0x79E6, 0xC7D8,
03005     0x79E7, 0xD1ED, 0x79E8, 0xB67D, 0x79E9, 0xD6C8, 0x79EA, 0xB67E,
03006     0x79EB, 0xEFF8, 0x79EC, 0xB680, 0x79ED, 0xEFF6, 0x79EE, 0xB681,
03007     0x79EF, 0xBBFD, 0x79F0, 0xB3C6, 0x79F1, 0xB682, 0x79F2, 0xB683,
03008     0x79F3, 0xB684, 0x79F4, 0xB685, 0x79F5, 0xB686, 0x79F6, 0xB687,
03009     0x79F7, 0xB688, 0x79F8, 0xBDD5, 0x79F9, 0xB689, 0x79FA, 0xB68A,
03010     0x79FB, 0xD2C6, 0x79FC, 0xB68B, 0x79FD, 0xBBE0, 0x79FE, 0xB68C,
03011     0x79FF, 0xB68D, 0x7A00, 0xCFA1, 0x7A01, 0xB68E, 0x7A02, 0xEFFC,
03012     0x7A03, 0xEFFB, 0x7A04, 0xB68F, 0x7A05, 0xB690, 0x7A06, 0xEFF9,
03013     0x7A07, 0xB691, 0x7A08, 0xB692, 0x7A09, 0xB693, 0x7A0A, 0xB694,
03014     0x7A0B, 0xB3CC, 0x7A0C, 0xB695, 0x7A0D, 0xC9D4, 0x7A0E, 0xCBB0,
03015     0x7A0F, 0xB696, 0x7A10, 0xB697, 0x7A11, 0xB698, 0x7A12, 0xB699,
03016     0x7A13, 0xB69A, 0x7A14, 0xEFFE, 0x7A15, 0xB69B, 0x7A16, 0xB69C,
03017     0x7A17, 0xB0DE, 0x7A18, 0xB69D, 0x7A19, 0xB69E, 0x7A1A, 0xD6C9,
03018     0x7A1B, 0xB69F, 0x7A1C, 0xB6A0, 0x7A1D, 0xB740, 0x7A1E, 0xEFFD,
03019     0x7A1F, 0xB741, 0x7A20, 0xB3ED, 0x7A21, 0xB742, 0x7A22, 0xB743,
03020     0x7A23, 0xF6D5, 0x7A24, 0xB744, 0x7A25, 0xB745, 0x7A26, 0xB746,
03021     0x7A27, 0xB747, 0x7A28, 0xB748, 0x7A29, 0xB749, 0x7A2A, 0xB74A,
03022     0x7A2B, 0xB74B, 0x7A2C, 0xB74C, 0x7A2D, 0xB74D, 0x7A2E, 0xB74E,
03023     0x7A2F, 0xB74F, 0x7A30, 0xB750, 0x7A31, 0xB751, 0x7A32, 0xB752,
03024     0x7A33, 0xCEC8, 0x7A34, 0xB753, 0x7A35, 0xB754, 0x7A36, 0xB755,
03025     0x7A37, 0xF0A2, 0x7A38, 0xB756, 0x7A39, 0xF0A1, 0x7A3A, 0xB757,
03026     0x7A3B, 0xB5BE, 0x7A3C, 0xBCDA, 0x7A3D, 0xBBFC, 0x7A3E, 0xB758,
03027     0x7A3F, 0xB8E5, 0x7A40, 0xB759, 0x7A41, 0xB75A, 0x7A42, 0xB75B,
03028     0x7A43, 0xB75C, 0x7A44, 0xB75D, 0x7A45, 0xB75E, 0x7A46, 0xC4C2,
03029     0x7A47, 0xB75F, 0x7A48, 0xB760, 0x7A49, 0xB761, 0x7A4A, 0xB762,
03030     0x7A4B, 0xB763, 0x7A4C, 0xB764, 0x7A4D, 0xB765, 0x7A4E, 0xB766,
03031     0x7A4F, 0xB767, 0x7A50, 0xB768, 0x7A51, 0xF0A3, 0x7A52, 0xB769,
03032     0x7A53, 0xB76A, 0x7A54, 0xB76B, 0x7A55, 0xB76C, 0x7A56, 0xB76D,
03033     0x7A57, 0xCBEB, 0x7A58, 0xB76E, 0x7A59, 0xB76F, 0x7A5A, 0xB770,
03034     0x7A5B, 0xB771, 0x7A5C, 0xB772, 0x7A5D, 0xB773, 0x7A5E, 0xB774,
03035     0x7A5F, 0xB775, 0x7A60, 0xB776, 0x7A61, 0xB777, 0x7A62, 0xB778,
03036     0x7A63, 0xB779, 0x7A64, 0xB77A, 0x7A65, 0xB77B, 0x7A66, 0xB77C,
03037     0x7A67, 0xB77D, 0x7A68, 0xB77E, 0x7A69, 0xB780, 0x7A6A, 0xB781,
03038     0x7A6B, 0xB782, 0x7A6C, 0xB783, 0x7A6D, 0xB784, 0x7A6E, 0xB785,
03039     0x7A6F, 0xB786, 0x7A70, 0xF0A6, 0x7A71, 0xB787, 0x7A72, 0xB788,
03040     0x7A73, 0xB789, 0x7A74, 0xD1A8, 0x7A75, 0xB78A, 0x7A76, 0xBEBF,
03041     0x7A77, 0xC7EE, 0x7A78, 0xF1B6, 0x7A79, 0xF1B7, 0x7A7A, 0xBFD5,
03042     0x7A7B, 0xB78B, 0x7A7C, 0xB78C, 0x7A7D, 0xB78D, 0x7A7E, 0xB78E,
03043     0x7A7F, 0xB4A9, 0x7A80, 0xF1B8, 0x7A81, 0xCDBB, 0x7A82, 0xB78F,
03044     0x7A83, 0xC7D4, 0x7A84, 0xD5AD, 0x7A85, 0xB790, 0x7A86, 0xF1B9,
03045     0x7A87, 0xB791, 0x7A88, 0xF1BA, 0x7A89, 0xB792, 0x7A8A, 0xB793,
03046     0x7A8B, 0xB794, 0x7A8C, 0xB795, 0x7A8D, 0xC7CF, 0x7A8E, 0xB796,
03047     0x7A8F, 0xB797, 0x7A90, 0xB798, 0x7A91, 0xD2A4, 0x7A92, 0xD6CF,
03048     0x7A93, 0xB799, 0x7A94, 0xB79A, 0x7A95, 0xF1BB, 0x7A96, 0xBDD1,
03049     0x7A97, 0xB4B0, 0x7A98, 0xBEBD, 0x7A99, 0xB79B, 0x7A9A, 0xB79C,
03050     0x7A9B, 0xB79D, 0x7A9C, 0xB4DC, 0x7A9D, 0xCED1, 0x7A9E, 0xB79E,
03051     0x7A9F, 0xBFDF, 0x7AA0, 0xF1BD, 0x7AA1, 0xB79F, 0x7AA2, 0xB7A0,
03052     0x7AA3, 0xB840, 0x7AA4, 0xB841, 0x7AA5, 0xBFFA, 0x7AA6, 0xF1BC,
03053     0x7AA7, 0xB842, 0x7AA8, 0xF1BF, 0x7AA9, 0xB843, 0x7AAA, 0xB844,
03054     0x7AAB, 0xB845, 0x7AAC, 0xF1BE, 0x7AAD, 0xF1C0, 0x7AAE, 0xB846,
03055     0x7AAF, 0xB847, 0x7AB0, 0xB848, 0x7AB1, 0xB849, 0x7AB2, 0xB84A,
03056     0x7AB3, 0xF1C1, 0x7AB4, 0xB84B, 0x7AB5, 0xB84C, 0x7AB6, 0xB84D,
03057     0x7AB7, 0xB84E, 0x7AB8, 0xB84F, 0x7AB9, 0xB850, 0x7ABA, 0xB851,
03058     0x7ABB, 0xB852, 0x7ABC, 0xB853, 0x7ABD, 0xB854, 0x7ABE, 0xB855,
03059     0x7ABF, 0xC1FE, 0x7AC0, 0xB856, 0x7AC1, 0xB857, 0x7AC2, 0xB858,
03060     0x7AC3, 0xB859, 0x7AC4, 0xB85A, 0x7AC5, 0xB85B, 0x7AC6, 0xB85C,
03061     0x7AC7, 0xB85D, 0x7AC8, 0xB85E, 0x7AC9, 0xB85F, 0x7ACA, 0xB860,
03062     0x7ACB, 0xC1A2, 0x7ACC, 0xB861, 0x7ACD, 0xB862, 0x7ACE, 0xB863,
03063     0x7ACF, 0xB864, 0x7AD0, 0xB865, 0x7AD1, 0xB866, 0x7AD2, 0xB867,
03064     0x7AD3, 0xB868, 0x7AD4, 0xB869, 0x7AD5, 0xB86A, 0x7AD6, 0xCAFA,
03065     0x7AD7, 0xB86B, 0x7AD8, 0xB86C, 0x7AD9, 0xD5BE, 0x7ADA, 0xB86D,
03066     0x7ADB, 0xB86E, 0x7ADC, 0xB86F, 0x7ADD, 0xB870, 0x7ADE, 0xBEBA,
03067     0x7ADF, 0xBEB9, 0x7AE0, 0xD5C2, 0x7AE1, 0xB871, 0x7AE2, 0xB872,
03068     0x7AE3, 0xBFA2, 0x7AE4, 0xB873, 0x7AE5, 0xCDAF, 0x7AE6, 0xF1B5,
03069     0x7AE7, 0xB874, 0x7AE8, 0xB875, 0x7AE9, 0xB876, 0x7AEA, 0xB877,
03070     0x7AEB, 0xB878, 0x7AEC, 0xB879, 0x7AED, 0xBDDF, 0x7AEE, 0xB87A,
03071     0x7AEF, 0xB6CB, 0x7AF0, 0xB87B, 0x7AF1, 0xB87C, 0x7AF2, 0xB87D,
03072     0x7AF3, 0xB87E, 0x7AF4, 0xB880, 0x7AF5, 0xB881, 0x7AF6, 0xB882,
03073     0x7AF7, 0xB883, 0x7AF8, 0xB884, 0x7AF9, 0xD6F1, 0x7AFA, 0xF3C3,
03074     0x7AFB, 0xB885, 0x7AFC, 0xB886, 0x7AFD, 0xF3C4, 0x7AFE, 0xB887,
03075     0x7AFF, 0xB8CD, 0x7B00, 0xB888, 0x7B01, 0xB889, 0x7B02, 0xB88A,
03076     0x7B03, 0xF3C6, 0x7B04, 0xF3C7, 0x7B05, 0xB88B, 0x7B06, 0xB0CA,
03077     0x7B07, 0xB88C, 0x7B08, 0xF3C5, 0x7B09, 0xB88D, 0x7B0A, 0xF3C9,
03078     0x7B0B, 0xCBF1, 0x7B0C, 0xB88E, 0x7B0D, 0xB88F, 0x7B0E, 0xB890,
03079     0x7B0F, 0xF3CB, 0x7B10, 0xB891, 0x7B11, 0xD0A6, 0x7B12, 0xB892,
03080     0x7B13, 0xB893, 0x7B14, 0xB1CA, 0x7B15, 0xF3C8, 0x7B16, 0xB894,
03081     0x7B17, 0xB895, 0x7B18, 0xB896, 0x7B19, 0xF3CF, 0x7B1A, 0xB897,
03082     0x7B1B, 0xB5D1, 0x7B1C, 0xB898, 0x7B1D, 0xB899, 0x7B1E, 0xF3D7,
03083     0x7B1F, 0xB89A, 0x7B20, 0xF3D2, 0x7B21, 0xB89B, 0x7B22, 0xB89C,
03084     0x7B23, 0xB89D, 0x7B24, 0xF3D4, 0x7B25, 0xF3D3, 0x7B26, 0xB7FB,
03085     0x7B27, 0xB89E, 0x7B28, 0xB1BF, 0x7B29, 0xB89F, 0x7B2A, 0xF3CE,
03086     0x7B2B, 0xF3CA, 0x7B2C, 0xB5DA, 0x7B2D, 0xB8A0, 0x7B2E, 0xF3D0,
03087     0x7B2F, 0xB940, 0x7B30, 0xB941, 0x7B31, 0xF3D1, 0x7B32, 0xB942,
03088     0x7B33, 0xF3D5, 0x7B34, 0xB943, 0x7B35, 0xB944, 0x7B36, 0xB945,
03089     0x7B37, 0xB946, 0x7B38, 0xF3CD, 0x7B39, 0xB947, 0x7B3A, 0xBCE3,
03090     0x7B3B, 0xB948, 0x7B3C, 0xC1FD, 0x7B3D, 0xB949, 0x7B3E, 0xF3D6,
03091     0x7B3F, 0xB94A, 0x7B40, 0xB94B, 0x7B41, 0xB94C, 0x7B42, 0xB94D,
03092     0x7B43, 0xB94E, 0x7B44, 0xB94F, 0x7B45, 0xF3DA, 0x7B46, 0xB950,
03093     0x7B47, 0xF3CC, 0x7B48, 0xB951, 0x7B49, 0xB5C8, 0x7B4A, 0xB952,
03094     0x7B4B, 0xBDEE, 0x7B4C, 0xF3DC, 0x7B4D, 0xB953, 0x7B4E, 0xB954,
03095     0x7B4F, 0xB7A4, 0x7B50, 0xBFF0, 0x7B51, 0xD6FE, 0x7B52, 0xCDB2,
03096     0x7B53, 0xB955, 0x7B54, 0xB4F0, 0x7B55, 0xB956, 0x7B56, 0xB2DF,
03097     0x7B57, 0xB957, 0x7B58, 0xF3D8, 0x7B59, 0xB958, 0x7B5A, 0xF3D9,
03098     0x7B5B, 0xC9B8, 0x7B5C, 0xB959, 0x7B5D, 0xF3DD, 0x7B5E, 0xB95A,
03099     0x7B5F, 0xB95B, 0x7B60, 0xF3DE, 0x7B61, 0xB95C, 0x7B62, 0xF3E1,
03100     0x7B63, 0xB95D, 0x7B64, 0xB95E, 0x7B65, 0xB95F, 0x7B66, 0xB960,
03101     0x7B67, 0xB961, 0x7B68, 0xB962, 0x7B69, 0xB963, 0x7B6A, 0xB964,
03102     0x7B6B, 0xB965, 0x7B6C, 0xB966, 0x7B6D, 0xB967, 0x7B6E, 0xF3DF,
03103     0x7B6F, 0xB968, 0x7B70, 0xB969, 0x7B71, 0xF3E3, 0x7B72, 0xF3E2,
03104     0x7B73, 0xB96A, 0x7B74, 0xB96B, 0x7B75, 0xF3DB, 0x7B76, 0xB96C,
03105     0x7B77, 0xBFEA, 0x7B78, 0xB96D, 0x7B79, 0xB3EF, 0x7B7A, 0xB96E,
03106     0x7B7B, 0xF3E0, 0x7B7C, 0xB96F, 0x7B7D, 0xB970, 0x7B7E, 0xC7A9,
03107     0x7B7F, 0xB971, 0x7B80, 0xBCF2, 0x7B81, 0xB972, 0x7B82, 0xB973,
03108     0x7B83, 0xB974, 0x7B84, 0xB975, 0x7B85, 0xF3EB, 0x7B86, 0xB976,
03109     0x7B87, 0xB977, 0x7B88, 0xB978, 0x7B89, 0xB979, 0x7B8A, 0xB97A,
03110     0x7B8B, 0xB97B, 0x7B8C, 0xB97C, 0x7B8D, 0xB9BF, 0x7B8E, 0xB97D,
03111     0x7B8F, 0xB97E, 0x7B90, 0xF3E4, 0x7B91, 0xB980, 0x7B92, 0xB981,
03112     0x7B93, 0xB982, 0x7B94, 0xB2AD, 0x7B95, 0xBBFE, 0x7B96, 0xB983,
03113     0x7B97, 0xCBE3, 0x7B98, 0xB984, 0x7B99, 0xB985, 0x7B9A, 0xB986,
03114     0x7B9B, 0xB987, 0x7B9C, 0xF3ED, 0x7B9D, 0xF3E9, 0x7B9E, 0xB988,
03115     0x7B9F, 0xB989, 0x7BA0, 0xB98A, 0x7BA1, 0xB9DC, 0x7BA2, 0xF3EE,
03116     0x7BA3, 0xB98B, 0x7BA4, 0xB98C, 0x7BA5, 0xB98D, 0x7BA6, 0xF3E5,
03117     0x7BA7, 0xF3E6, 0x7BA8, 0xF3EA, 0x7BA9, 0xC2E1, 0x7BAA, 0xF3EC,
03118     0x7BAB, 0xF3EF, 0x7BAC, 0xF3E8, 0x7BAD, 0xBCFD, 0x7BAE, 0xB98E,
03119     0x7BAF, 0xB98F, 0x7BB0, 0xB990, 0x7BB1, 0xCFE4, 0x7BB2, 0xB991,
03120     0x7BB3, 0xB992, 0x7BB4, 0xF3F0, 0x7BB5, 0xB993, 0x7BB6, 0xB994,
03121     0x7BB7, 0xB995, 0x7BB8, 0xF3E7, 0x7BB9, 0xB996, 0x7BBA, 0xB997,
03122     0x7BBB, 0xB998, 0x7BBC, 0xB999, 0x7BBD, 0xB99A, 0x7BBE, 0xB99B,
03123     0x7BBF, 0xB99C, 0x7BC0, 0xB99D, 0x7BC1, 0xF3F2, 0x7BC2, 0xB99E,
03124     0x7BC3, 0xB99F, 0x7BC4, 0xB9A0, 0x7BC5, 0xBA40, 0x7BC6, 0xD7AD,
03125     0x7BC7, 0xC6AA, 0x7BC8, 0xBA41, 0x7BC9, 0xBA42, 0x7BCA, 0xBA43,
03126     0x7BCB, 0xBA44, 0x7BCC, 0xF3F3, 0x7BCD, 0xBA45, 0x7BCE, 0xBA46,
03127     0x7BCF, 0xBA47, 0x7BD0, 0xBA48, 0x7BD1, 0xF3F1, 0x7BD2, 0xBA49,
03128     0x7BD3, 0xC2A8, 0x7BD4, 0xBA4A, 0x7BD5, 0xBA4B, 0x7BD6, 0xBA4C,
03129     0x7BD7, 0xBA4D, 0x7BD8, 0xBA4E, 0x7BD9, 0xB8DD, 0x7BDA, 0xF3F5,
03130     0x7BDB, 0xBA4F, 0x7BDC, 0xBA50, 0x7BDD, 0xF3F4, 0x7BDE, 0xBA51,
03131     0x7BDF, 0xBA52, 0x7BE0, 0xBA53, 0x7BE1, 0xB4DB, 0x7BE2, 0xBA54,
03132     0x7BE3, 0xBA55, 0x7BE4, 0xBA56, 0x7BE5, 0xF3F6, 0x7BE6, 0xF3F7,
03133     0x7BE7, 0xBA57, 0x7BE8, 0xBA58, 0x7BE9, 0xBA59, 0x7BEA, 0xF3F8,
03134     0x7BEB, 0xBA5A, 0x7BEC, 0xBA5B, 0x7BED, 0xBA5C, 0x7BEE, 0xC0BA,
03135     0x7BEF, 0xBA5D, 0x7BF0, 0xBA5E, 0x7BF1, 0xC0E9, 0x7BF2, 0xBA5F,
03136     0x7BF3, 0xBA60, 0x7BF4, 0xBA61, 0x7BF5, 0xBA62, 0x7BF6, 0xBA63,
03137     0x7BF7, 0xC5F1, 0x7BF8, 0xBA64, 0x7BF9, 0xBA65, 0x7BFA, 0xBA66,
03138     0x7BFB, 0xBA67, 0x7BFC, 0xF3FB, 0x7BFD, 0xBA68, 0x7BFE, 0xF3FA,
03139     0x7BFF, 0xBA69, 0x7C00, 0xBA6A, 0x7C01, 0xBA6B, 0x7C02, 0xBA6C,
03140     0x7C03, 0xBA6D, 0x7C04, 0xBA6E, 0x7C05, 0xBA6F, 0x7C06, 0xBA70,
03141     0x7C07, 0xB4D8, 0x7C08, 0xBA71, 0x7C09, 0xBA72, 0x7C0A, 0xBA73,
03142     0x7C0B, 0xF3FE, 0x7C0C, 0xF3F9, 0x7C0D, 0xBA74, 0x7C0E, 0xBA75,
03143     0x7C0F, 0xF3FC, 0x7C10, 0xBA76, 0x7C11, 0xBA77, 0x7C12, 0xBA78,
03144     0x7C13, 0xBA79, 0x7C14, 0xBA7A, 0x7C15, 0xBA7B, 0x7C16, 0xF3FD,
03145     0x7C17, 0xBA7C, 0x7C18, 0xBA7D, 0x7C19, 0xBA7E, 0x7C1A, 0xBA80,
03146     0x7C1B, 0xBA81, 0x7C1C, 0xBA82, 0x7C1D, 0xBA83, 0x7C1E, 0xBA84,
03147     0x7C1F, 0xF4A1, 0x7C20, 0xBA85, 0x7C21, 0xBA86, 0x7C22, 0xBA87,
03148     0x7C23, 0xBA88, 0x7C24, 0xBA89, 0x7C25, 0xBA8A, 0x7C26, 0xF4A3,
03149     0x7C27, 0xBBC9, 0x7C28, 0xBA8B, 0x7C29, 0xBA8C, 0x7C2A, 0xF4A2,
03150     0x7C2B, 0xBA8D, 0x7C2C, 0xBA8E, 0x7C2D, 0xBA8F, 0x7C2E, 0xBA90,
03151     0x7C2F, 0xBA91, 0x7C30, 0xBA92, 0x7C31, 0xBA93, 0x7C32, 0xBA94,
03152     0x7C33, 0xBA95, 0x7C34, 0xBA96, 0x7C35, 0xBA97, 0x7C36, 0xBA98,
03153     0x7C37, 0xBA99, 0x7C38, 0xF4A4, 0x7C39, 0xBA9A, 0x7C3A, 0xBA9B,
03154     0x7C3B, 0xBA9C, 0x7C3C, 0xBA9D, 0x7C3D, 0xBA9E, 0x7C3E, 0xBA9F,
03155     0x7C3F, 0xB2BE, 0x7C40, 0xF4A6, 0x7C41, 0xF4A5, 0x7C42, 0xBAA0,
03156     0x7C43, 0xBB40, 0x7C44, 0xBB41, 0x7C45, 0xBB42, 0x7C46, 0xBB43,
03157     0x7C47, 0xBB44, 0x7C48, 0xBB45, 0x7C49, 0xBB46, 0x7C4A, 0xBB47,
03158     0x7C4B, 0xBB48, 0x7C4C, 0xBB49, 0x7C4D, 0xBCAE, 0x7C4E, 0xBB4A,
03159     0x7C4F, 0xBB4B, 0x7C50, 0xBB4C, 0x7C51, 0xBB4D, 0x7C52, 0xBB4E,
03160     0x7C53, 0xBB4F, 0x7C54, 0xBB50, 0x7C55, 0xBB51, 0x7C56, 0xBB52,
03161     0x7C57, 0xBB53, 0x7C58, 0xBB54, 0x7C59, 0xBB55, 0x7C5A, 0xBB56,
03162     0x7C5B, 0xBB57, 0x7C5C, 0xBB58, 0x7C5D, 0xBB59, 0x7C5E, 0xBB5A,
03163     0x7C5F, 0xBB5B, 0x7C60, 0xBB5C, 0x7C61, 0xBB5D, 0x7C62, 0xBB5E,
03164     0x7C63, 0xBB5F, 0x7C64, 0xBB60, 0x7C65, 0xBB61, 0x7C66, 0xBB62,
03165     0x7C67, 0xBB63, 0x7C68, 0xBB64, 0x7C69, 0xBB65, 0x7C6A, 0xBB66,
03166     0x7C6B, 0xBB67, 0x7C6C, 0xBB68, 0x7C6D, 0xBB69, 0x7C6E, 0xBB6A,
03167     0x7C6F, 0xBB6B, 0x7C70, 0xBB6C, 0x7C71, 0xBB6D, 0x7C72, 0xBB6E,
03168     0x7C73, 0xC3D7, 0x7C74, 0xD9E1, 0x7C75, 0xBB6F, 0x7C76, 0xBB70,
03169     0x7C77, 0xBB71, 0x7C78, 0xBB72, 0x7C79, 0xBB73, 0x7C7A, 0xBB74,
03170     0x7C7B, 0xC0E0, 0x7C7C, 0xF4CC, 0x7C7D, 0xD7D1, 0x7C7E, 0xBB75,
03171     0x7C7F, 0xBB76, 0x7C80, 0xBB77, 0x7C81, 0xBB78, 0x7C82, 0xBB79,
03172     0x7C83, 0xBB7A, 0x7C84, 0xBB7B, 0x7C85, 0xBB7C, 0x7C86, 0xBB7D,
03173     0x7C87, 0xBB7E, 0x7C88, 0xBB80, 0x7C89, 0xB7DB, 0x7C8A, 0xBB81,
03174     0x7C8B, 0xBB82, 0x7C8C, 0xBB83, 0x7C8D, 0xBB84, 0x7C8E, 0xBB85,
03175     0x7C8F, 0xBB86, 0x7C90, 0xBB87, 0x7C91, 0xF4CE, 0x7C92, 0xC1A3,
03176     0x7C93, 0xBB88, 0x7C94, 0xBB89, 0x7C95, 0xC6C9, 0x7C96, 0xBB8A,
03177     0x7C97, 0xB4D6, 0x7C98, 0xD5B3, 0x7C99, 0xBB8B, 0x7C9A, 0xBB8C,
03178     0x7C9B, 0xBB8D, 0x7C9C, 0xF4D0, 0x7C9D, 0xF4CF, 0x7C9E, 0xF4D1,
03179     0x7C9F, 0xCBDA, 0x7CA0, 0xBB8E, 0x7CA1, 0xBB8F, 0x7CA2, 0xF4D2,
03180     0x7CA3, 0xBB90, 0x7CA4, 0xD4C1, 0x7CA5, 0xD6E0, 0x7CA6, 0xBB91,
03181     0x7CA7, 0xBB92, 0x7CA8, 0xBB93, 0x7CA9, 0xBB94, 0x7CAA, 0xB7E0,
03182     0x7CAB, 0xBB95, 0x7CAC, 0xBB96, 0x7CAD, 0xBB97, 0x7CAE, 0xC1B8,
03183     0x7CAF, 0xBB98, 0x7CB0, 0xBB99, 0x7CB1, 0xC1BB, 0x7CB2, 0xF4D3,
03184     0x7CB3, 0xBEAC, 0x7CB4, 0xBB9A, 0x7CB5, 0xBB9B, 0x7CB6, 0xBB9C,
03185     0x7CB7, 0xBB9D, 0x7CB8, 0xBB9E, 0x7CB9, 0xB4E2, 0x7CBA, 0xBB9F,
03186     0x7CBB, 0xBBA0, 0x7CBC, 0xF4D4, 0x7CBD, 0xF4D5, 0x7CBE, 0xBEAB,
03187     0x7CBF, 0xBC40, 0x7CC0, 0xBC41, 0x7CC1, 0xF4D6, 0x7CC2, 0xBC42,
03188     0x7CC3, 0xBC43, 0x7CC4, 0xBC44, 0x7CC5, 0xF4DB, 0x7CC6, 0xBC45,
03189     0x7CC7, 0xF4D7, 0x7CC8, 0xF4DA, 0x7CC9, 0xBC46, 0x7CCA, 0xBAFD,
03190     0x7CCB, 0xBC47, 0x7CCC, 0xF4D8, 0x7CCD, 0xF4D9, 0x7CCE, 0xBC48,
03191     0x7CCF, 0xBC49, 0x7CD0, 0xBC4A, 0x7CD1, 0xBC4B, 0x7CD2, 0xBC4C,
03192     0x7CD3, 0xBC4D, 0x7CD4, 0xBC4E, 0x7CD5, 0xB8E2, 0x7CD6, 0xCCC7,
03193     0x7CD7, 0xF4DC, 0x7CD8, 0xBC4F, 0x7CD9, 0xB2DA, 0x7CDA, 0xBC50,
03194     0x7CDB, 0xBC51, 0x7CDC, 0xC3D3, 0x7CDD, 0xBC52, 0x7CDE, 0xBC53,
03195     0x7CDF, 0xD4E3, 0x7CE0, 0xBFB7, 0x7CE1, 0xBC54, 0x7CE2, 0xBC55,
03196     0x7CE3, 0xBC56, 0x7CE4, 0xBC57, 0x7CE5, 0xBC58, 0x7CE6, 0xBC59,
03197     0x7CE7, 0xBC5A, 0x7CE8, 0xF4DD, 0x7CE9, 0xBC5B, 0x7CEA, 0xBC5C,
03198     0x7CEB, 0xBC5D, 0x7CEC, 0xBC5E, 0x7CED, 0xBC5F, 0x7CEE, 0xBC60,
03199     0x7CEF, 0xC5B4, 0x7CF0, 0xBC61, 0x7CF1, 0xBC62, 0x7CF2, 0xBC63,
03200     0x7CF3, 0xBC64, 0x7CF4, 0xBC65, 0x7CF5, 0xBC66, 0x7CF6, 0xBC67,
03201     0x7CF7, 0xBC68, 0x7CF8, 0xF4E9, 0x7CF9, 0xBC69, 0x7CFA, 0xBC6A,
03202     0x7CFB, 0xCFB5, 0x7CFC, 0xBC6B, 0x7CFD, 0xBC6C, 0x7CFE, 0xBC6D,
03203     0x7CFF, 0xBC6E, 0x7D00, 0xBC6F, 0x7D01, 0xBC70, 0x7D02, 0xBC71,
03204     0x7D03, 0xBC72, 0x7D04, 0xBC73, 0x7D05, 0xBC74, 0x7D06, 0xBC75,
03205     0x7D07, 0xBC76, 0x7D08, 0xBC77, 0x7D09, 0xBC78, 0x7D0A, 0xCEC9,
03206     0x7D0B, 0xBC79, 0x7D0C, 0xBC7A, 0x7D0D, 0xBC7B, 0x7D0E, 0xBC7C,
03207     0x7D0F, 0xBC7D, 0x7D10, 0xBC7E, 0x7D11, 0xBC80, 0x7D12, 0xBC81,
03208     0x7D13, 0xBC82, 0x7D14, 0xBC83, 0x7D15, 0xBC84, 0x7D16, 0xBC85,
03209     0x7D17, 0xBC86, 0x7D18, 0xBC87, 0x7D19, 0xBC88, 0x7D1A, 0xBC89,
03210     0x7D1B, 0xBC8A, 0x7D1C, 0xBC8B, 0x7D1D, 0xBC8C, 0x7D1E, 0xBC8D,
03211     0x7D1F, 0xBC8E, 0x7D20, 0xCBD8, 0x7D21, 0xBC8F, 0x7D22, 0xCBF7,
03212     0x7D23, 0xBC90, 0x7D24, 0xBC91, 0x7D25, 0xBC92, 0x7D26, 0xBC93,
03213     0x7D27, 0xBDF4, 0x7D28, 0xBC94, 0x7D29, 0xBC95, 0x7D2A, 0xBC96,
03214     0x7D2B, 0xD7CF, 0x7D2C, 0xBC97, 0x7D2D, 0xBC98, 0x7D2E, 0xBC99,
03215     0x7D2F, 0xC0DB, 0x7D30, 0xBC9A, 0x7D31, 0xBC9B, 0x7D32, 0xBC9C,
03216     0x7D33, 0xBC9D, 0x7D34, 0xBC9E, 0x7D35, 0xBC9F, 0x7D36, 0xBCA0,
03217     0x7D37, 0xBD40, 0x7D38, 0xBD41, 0x7D39, 0xBD42, 0x7D3A, 0xBD43,
03218     0x7D3B, 0xBD44, 0x7D3C, 0xBD45, 0x7D3D, 0xBD46, 0x7D3E, 0xBD47,
03219     0x7D3F, 0xBD48, 0x7D40, 0xBD49, 0x7D41, 0xBD4A, 0x7D42, 0xBD4B,
03220     0x7D43, 0xBD4C, 0x7D44, 0xBD4D, 0x7D45, 0xBD4E, 0x7D46, 0xBD4F,
03221     0x7D47, 0xBD50, 0x7D48, 0xBD51, 0x7D49, 0xBD52, 0x7D4A, 0xBD53,
03222     0x7D4B, 0xBD54, 0x7D4C, 0xBD55, 0x7D4D, 0xBD56, 0x7D4E, 0xBD57,
03223     0x7D4F, 0xBD58, 0x7D50, 0xBD59, 0x7D51, 0xBD5A, 0x7D52, 0xBD5B,
03224     0x7D53, 0xBD5C, 0x7D54, 0xBD5D, 0x7D55, 0xBD5E, 0x7D56, 0xBD5F,
03225     0x7D57, 0xBD60, 0x7D58, 0xBD61, 0x7D59, 0xBD62, 0x7D5A, 0xBD63,
03226     0x7D5B, 0xBD64, 0x7D5C, 0xBD65, 0x7D5D, 0xBD66, 0x7D5E, 0xBD67,
03227     0x7D5F, 0xBD68, 0x7D60, 0xBD69, 0x7D61, 0xBD6A, 0x7D62, 0xBD6B,
03228     0x7D63, 0xBD6C, 0x7D64, 0xBD6D, 0x7D65, 0xBD6E, 0x7D66, 0xBD6F,
03229     0x7D67, 0xBD70, 0x7D68, 0xBD71, 0x7D69, 0xBD72, 0x7D6A, 0xBD73,
03230     0x7D6B, 0xBD74, 0x7D6C, 0xBD75, 0x7D6D, 0xBD76, 0x7D6E, 0xD0F5,
03231     0x7D6F, 0xBD77, 0x7D70, 0xBD78, 0x7D71, 0xBD79, 0x7D72, 0xBD7A,
03232     0x7D73, 0xBD7B, 0x7D74, 0xBD7C, 0x7D75, 0xBD7D, 0x7D76, 0xBD7E,
03233     0x7D77, 0xF4EA, 0x7D78, 0xBD80, 0x7D79, 0xBD81, 0x7D7A, 0xBD82,
03234     0x7D7B, 0xBD83, 0x7D7C, 0xBD84, 0x7D7D, 0xBD85, 0x7D7E, 0xBD86,
03235     0x7D7F, 0xBD87, 0x7D80, 0xBD88, 0x7D81, 0xBD89, 0x7D82, 0xBD8A,
03236     0x7D83, 0xBD8B, 0x7D84, 0xBD8C, 0x7D85, 0xBD8D, 0x7D86, 0xBD8E,
03237     0x7D87, 0xBD8F, 0x7D88, 0xBD90, 0x7D89, 0xBD91, 0x7D8A, 0xBD92,
03238     0x7D8B, 0xBD93, 0x7D8C, 0xBD94, 0x7D8D, 0xBD95, 0x7D8E, 0xBD96,
03239     0x7D8F, 0xBD97, 0x7D90, 0xBD98, 0x7D91, 0xBD99, 0x7D92, 0xBD9A,
03240     0x7D93, 0xBD9B, 0x7D94, 0xBD9C, 0x7D95, 0xBD9D, 0x7D96, 0xBD9E,
03241     0x7D97, 0xBD9F, 0x7D98, 0xBDA0, 0x7D99, 0xBE40, 0x7D9A, 0xBE41,
03242     0x7D9B, 0xBE42, 0x7D9C, 0xBE43, 0x7D9D, 0xBE44, 0x7D9E, 0xBE45,
03243     0x7D9F, 0xBE46, 0x7DA0, 0xBE47, 0x7DA1, 0xBE48, 0x7DA2, 0xBE49,
03244     0x7DA3, 0xBE4A, 0x7DA4, 0xBE4B, 0x7DA5, 0xBE4C, 0x7DA6, 0xF4EB,
03245     0x7DA7, 0xBE4D, 0x7DA8, 0xBE4E, 0x7DA9, 0xBE4F, 0x7DAA, 0xBE50,
03246     0x7DAB, 0xBE51, 0x7DAC, 0xBE52, 0x7DAD, 0xBE53, 0x7DAE, 0xF4EC,
03247     0x7DAF, 0xBE54, 0x7DB0, 0xBE55, 0x7DB1, 0xBE56, 0x7DB2, 0xBE57,
03248     0x7DB3, 0xBE58, 0x7DB4, 0xBE59, 0x7DB5, 0xBE5A, 0x7DB6, 0xBE5B,
03249     0x7DB7, 0xBE5C, 0x7DB8, 0xBE5D, 0x7DB9, 0xBE5E, 0x7DBA, 0xBE5F,
03250     0x7DBB, 0xBE60, 0x7DBC, 0xBE61, 0x7DBD, 0xBE62, 0x7DBE, 0xBE63,
03251     0x7DBF, 0xBE64, 0x7DC0, 0xBE65, 0x7DC1, 0xBE66, 0x7DC2, 0xBE67,
03252     0x7DC3, 0xBE68, 0x7DC4, 0xBE69, 0x7DC5, 0xBE6A, 0x7DC6, 0xBE6B,
03253     0x7DC7, 0xBE6C, 0x7DC8, 0xBE6D, 0x7DC9, 0xBE6E, 0x7DCA, 0xBE6F,
03254     0x7DCB, 0xBE70, 0x7DCC, 0xBE71, 0x7DCD, 0xBE72, 0x7DCE, 0xBE73,
03255     0x7DCF, 0xBE74, 0x7DD0, 0xBE75, 0x7DD1, 0xBE76, 0x7DD2, 0xBE77,
03256     0x7DD3, 0xBE78, 0x7DD4, 0xBE79, 0x7DD5, 0xBE7A, 0x7DD6, 0xBE7B,
03257     0x7DD7, 0xBE7C, 0x7DD8, 0xBE7D, 0x7DD9, 0xBE7E, 0x7DDA, 0xBE80,
03258     0x7DDB, 0xBE81, 0x7DDC, 0xBE82, 0x7DDD, 0xBE83, 0x7DDE, 0xBE84,
03259     0x7DDF, 0xBE85, 0x7DE0, 0xBE86, 0x7DE1, 0xBE87, 0x7DE2, 0xBE88,
03260     0x7DE3, 0xBE89, 0x7DE4, 0xBE8A, 0x7DE5, 0xBE8B, 0x7DE6, 0xBE8C,
03261     0x7DE7, 0xBE8D, 0x7DE8, 0xBE8E, 0x7DE9, 0xBE8F, 0x7DEA, 0xBE90,
03262     0x7DEB, 0xBE91, 0x7DEC, 0xBE92, 0x7DED, 0xBE93, 0x7DEE, 0xBE94,
03263     0x7DEF, 0xBE95, 0x7DF0, 0xBE96, 0x7DF1, 0xBE97, 0x7DF2, 0xBE98,
03264     0x7DF3, 0xBE99, 0x7DF4, 0xBE9A, 0x7DF5, 0xBE9B, 0x7DF6, 0xBE9C,
03265     0x7DF7, 0xBE9D, 0x7DF8, 0xBE9E, 0x7DF9, 0xBE9F, 0x7DFA, 0xBEA0,
03266     0x7DFB, 0xBF40, 0x7DFC, 0xBF41, 0x7DFD, 0xBF42, 0x7DFE, 0xBF43,
03267     0x7DFF, 0xBF44, 0x7E00, 0xBF45, 0x7E01, 0xBF46, 0x7E02, 0xBF47,
03268     0x7E03, 0xBF48, 0x7E04, 0xBF49, 0x7E05, 0xBF4A, 0x7E06, 0xBF4B,
03269     0x7E07, 0xBF4C, 0x7E08, 0xBF4D, 0x7E09, 0xBF4E, 0x7E0A, 0xBF4F,
03270     0x7E0B, 0xBF50, 0x7E0C, 0xBF51, 0x7E0D, 0xBF52, 0x7E0E, 0xBF53,
03271     0x7E0F, 0xBF54, 0x7E10, 0xBF55, 0x7E11, 0xBF56, 0x7E12, 0xBF57,
03272     0x7E13, 0xBF58, 0x7E14, 0xBF59, 0x7E15, 0xBF5A, 0x7E16, 0xBF5B,
03273     0x7E17, 0xBF5C, 0x7E18, 0xBF5D, 0x7E19, 0xBF5E, 0x7E1A, 0xBF5F,
03274     0x7E1B, 0xBF60, 0x7E1C, 0xBF61, 0x7E1D, 0xBF62, 0x7E1E, 0xBF63,
03275     0x7E1F, 0xBF64, 0x7E20, 0xBF65, 0x7E21, 0xBF66, 0x7E22, 0xBF67,
03276     0x7E23, 0xBF68, 0x7E24, 0xBF69, 0x7E25, 0xBF6A, 0x7E26, 0xBF6B,
03277     0x7E27, 0xBF6C, 0x7E28, 0xBF6D, 0x7E29, 0xBF6E, 0x7E2A, 0xBF6F,
03278     0x7E2B, 0xBF70, 0x7E2C, 0xBF71, 0x7E2D, 0xBF72, 0x7E2E, 0xBF73,
03279     0x7E2F, 0xBF74, 0x7E30, 0xBF75, 0x7E31, 0xBF76, 0x7E32, 0xBF77,
03280     0x7E33, 0xBF78, 0x7E34, 0xBF79, 0x7E35, 0xBF7A, 0x7E36, 0xBF7B,
03281     0x7E37, 0xBF7C, 0x7E38, 0xBF7D, 0x7E39, 0xBF7E, 0x7E3A, 0xBF80,
03282     0x7E3B, 0xF7E3, 0x7E3C, 0xBF81, 0x7E3D, 0xBF82, 0x7E3E, 0xBF83,
03283     0x7E3F, 0xBF84, 0x7E40, 0xBF85, 0x7E41, 0xB7B1, 0x7E42, 0xBF86,
03284     0x7E43, 0xBF87, 0x7E44, 0xBF88, 0x7E45, 0xBF89, 0x7E46, 0xBF8A,
03285     0x7E47, 0xF4ED, 0x7E48, 0xBF8B, 0x7E49, 0xBF8C, 0x7E4A, 0xBF8D,
03286     0x7E4B, 0xBF8E, 0x7E4C, 0xBF8F, 0x7E4D, 0xBF90, 0x7E4E, 0xBF91,
03287     0x7E4F, 0xBF92, 0x7E50, 0xBF93, 0x7E51, 0xBF94, 0x7E52, 0xBF95,
03288     0x7E53, 0xBF96, 0x7E54, 0xBF97, 0x7E55, 0xBF98, 0x7E56, 0xBF99,
03289     0x7E57, 0xBF9A, 0x7E58, 0xBF9B, 0x7E59, 0xBF9C, 0x7E5A, 0xBF9D,
03290     0x7E5B, 0xBF9E, 0x7E5C, 0xBF9F, 0x7E5D, 0xBFA0, 0x7E5E, 0xC040,
03291     0x7E5F, 0xC041, 0x7E60, 0xC042, 0x7E61, 0xC043, 0x7E62, 0xC044,
03292     0x7E63, 0xC045, 0x7E64, 0xC046, 0x7E65, 0xC047, 0x7E66, 0xC048,
03293     0x7E67, 0xC049, 0x7E68, 0xC04A, 0x7E69, 0xC04B, 0x7E6A, 0xC04C,
03294     0x7E6B, 0xC04D, 0x7E6C, 0xC04E, 0x7E6D, 0xC04F, 0x7E6E, 0xC050,
03295     0x7E6F, 0xC051, 0x7E70, 0xC052, 0x7E71, 0xC053, 0x7E72, 0xC054,
03296     0x7E73, 0xC055, 0x7E74, 0xC056, 0x7E75, 0xC057, 0x7E76, 0xC058,
03297     0x7E77, 0xC059, 0x7E78, 0xC05A, 0x7E79, 0xC05B, 0x7E7A, 0xC05C,
03298     0x7E7B, 0xC05D, 0x7E7C, 0xC05E, 0x7E7D, 0xC05F, 0x7E7E, 0xC060,
03299     0x7E7F, 0xC061, 0x7E80, 0xC062, 0x7E81, 0xC063, 0x7E82, 0xD7EB,
03300     0x7E83, 0xC064, 0x7E84, 0xC065, 0x7E85, 0xC066, 0x7E86, 0xC067,
03301     0x7E87, 0xC068, 0x7E88, 0xC069, 0x7E89, 0xC06A, 0x7E8A, 0xC06B,
03302     0x7E8B, 0xC06C, 0x7E8C, 0xC06D, 0x7E8D, 0xC06E, 0x7E8E, 0xC06F,
03303     0x7E8F, 0xC070, 0x7E90, 0xC071, 0x7E91, 0xC072, 0x7E92, 0xC073,
03304     0x7E93, 0xC074, 0x7E94, 0xC075, 0x7E95, 0xC076, 0x7E96, 0xC077,
03305     0x7E97, 0xC078, 0x7E98, 0xC079, 0x7E99, 0xC07A, 0x7E9A, 0xC07B,
03306     0x7E9B, 0xF4EE, 0x7E9C, 0xC07C, 0x7E9D, 0xC07D, 0x7E9E, 0xC07E,
03307     0x7E9F, 0xE6F9, 0x7EA0, 0xBEC0, 0x7EA1, 0xE6FA, 0x7EA2, 0xBAEC,
03308     0x7EA3, 0xE6FB, 0x7EA4, 0xCFCB, 0x7EA5, 0xE6FC, 0x7EA6, 0xD4BC,
03309     0x7EA7, 0xBCB6, 0x7EA8, 0xE6FD, 0x7EA9, 0xE6FE, 0x7EAA, 0xBCCD,
03310     0x7EAB, 0xC8D2, 0x7EAC, 0xCEB3, 0x7EAD, 0xE7A1, 0x7EAE, 0xC080,
03311     0x7EAF, 0xB4BF, 0x7EB0, 0xE7A2, 0x7EB1, 0xC9B4, 0x7EB2, 0xB8D9,
03312     0x7EB3, 0xC4C9, 0x7EB4, 0xC081, 0x7EB5, 0xD7DD, 0x7EB6, 0xC2DA,
03313     0x7EB7, 0xB7D7, 0x7EB8, 0xD6BD, 0x7EB9, 0xCEC6, 0x7EBA, 0xB7C4,
03314     0x7EBB, 0xC082, 0x7EBC, 0xC083, 0x7EBD, 0xC5A6, 0x7EBE, 0xE7A3,
03315     0x7EBF, 0xCFDF, 0x7EC0, 0xE7A4, 0x7EC1, 0xE7A5, 0x7EC2, 0xE7A6,
03316     0x7EC3, 0xC1B7, 0x7EC4, 0xD7E9, 0x7EC5, 0xC9F0, 0x7EC6, 0xCFB8,
03317     0x7EC7, 0xD6AF, 0x7EC8, 0xD6D5, 0x7EC9, 0xE7A7, 0x7ECA, 0xB0ED,
03318     0x7ECB, 0xE7A8, 0x7ECC, 0xE7A9, 0x7ECD, 0xC9DC, 0x7ECE, 0xD2EF,
03319     0x7ECF, 0xBEAD, 0x7ED0, 0xE7AA, 0x7ED1, 0xB0F3, 0x7ED2, 0xC8DE,
03320     0x7ED3, 0xBDE1, 0x7ED4, 0xE7AB, 0x7ED5, 0xC8C6, 0x7ED6, 0xC084,
03321     0x7ED7, 0xE7AC, 0x7ED8, 0xBBE6, 0x7ED9, 0xB8F8, 0x7EDA, 0xD1A4,
03322     0x7EDB, 0xE7AD, 0x7EDC, 0xC2E7, 0x7EDD, 0xBEF8, 0x7EDE, 0xBDCA,
03323     0x7EDF, 0xCDB3, 0x7EE0, 0xE7AE, 0x7EE1, 0xE7AF, 0x7EE2, 0xBEEE,
03324     0x7EE3, 0xD0E5, 0x7EE4, 0xC085, 0x7EE5, 0xCBE7, 0x7EE6, 0xCCD0,
03325     0x7EE7, 0xBCCC, 0x7EE8, 0xE7B0, 0x7EE9, 0xBCA8, 0x7EEA, 0xD0F7,
03326     0x7EEB, 0xE7B1, 0x7EEC, 0xC086, 0x7EED, 0xD0F8, 0x7EEE, 0xE7B2,
03327     0x7EEF, 0xE7B3, 0x7EF0, 0xB4C2, 0x7EF1, 0xE7B4, 0x7EF2, 0xE7B5,
03328     0x7EF3, 0xC9FE, 0x7EF4, 0xCEAC, 0x7EF5, 0xC3E0, 0x7EF6, 0xE7B7,
03329     0x7EF7, 0xB1C1, 0x7EF8, 0xB3F1, 0x7EF9, 0xC087, 0x7EFA, 0xE7B8,
03330     0x7EFB, 0xE7B9, 0x7EFC, 0xD7DB, 0x7EFD, 0xD5C0, 0x7EFE, 0xE7BA,
03331     0x7EFF, 0xC2CC, 0x7F00, 0xD7BA, 0x7F01, 0xE7BB, 0x7F02, 0xE7BC,
03332     0x7F03, 0xE7BD, 0x7F04, 0xBCEA, 0x7F05, 0xC3E5, 0x7F06, 0xC0C2,
03333     0x7F07, 0xE7BE, 0x7F08, 0xE7BF, 0x7F09, 0xBCA9, 0x7F0A, 0xC088,
03334     0x7F0B, 0xE7C0, 0x7F0C, 0xE7C1, 0x7F0D, 0xE7B6, 0x7F0E, 0xB6D0,
03335     0x7F0F, 0xE7C2, 0x7F10, 0xC089, 0x7F11, 0xE7C3, 0x7F12, 0xE7C4,
03336     0x7F13, 0xBBBA, 0x7F14, 0xB5DE, 0x7F15, 0xC2C6, 0x7F16, 0xB1E0,
03337     0x7F17, 0xE7C5, 0x7F18, 0xD4B5, 0x7F19, 0xE7C6, 0x7F1A, 0xB8BF,
03338     0x7F1B, 0xE7C8, 0x7F1C, 0xE7C7, 0x7F1D, 0xB7EC, 0x7F1E, 0xC08A,
03339     0x7F1F, 0xE7C9, 0x7F20, 0xB2F8, 0x7F21, 0xE7CA, 0x7F22, 0xE7CB,
03340     0x7F23, 0xE7CC, 0x7F24, 0xE7CD, 0x7F25, 0xE7CE, 0x7F26, 0xE7CF,
03341     0x7F27, 0xE7D0, 0x7F28, 0xD3A7, 0x7F29, 0xCBF5, 0x7F2A, 0xE7D1,
03342     0x7F2B, 0xE7D2, 0x7F2C, 0xE7D3, 0x7F2D, 0xE7D4, 0x7F2E, 0xC9C9,
03343     0x7F2F, 0xE7D5, 0x7F30, 0xE7D6, 0x7F31, 0xE7D7, 0x7F32, 0xE7D8,
03344     0x7F33, 0xE7D9, 0x7F34, 0xBDC9, 0x7F35, 0xE7DA, 0x7F36, 0xF3BE,
03345     0x7F37, 0xC08B, 0x7F38, 0xB8D7, 0x7F39, 0xC08C, 0x7F3A, 0xC8B1,
03346     0x7F3B, 0xC08D, 0x7F3C, 0xC08E, 0x7F3D, 0xC08F, 0x7F3E, 0xC090,
03347     0x7F3F, 0xC091, 0x7F40, 0xC092, 0x7F41, 0xC093, 0x7F42, 0xF3BF,
03348     0x7F43, 0xC094, 0x7F44, 0xF3C0, 0x7F45, 0xF3C1, 0x7F46, 0xC095,
03349     0x7F47, 0xC096, 0x7F48, 0xC097, 0x7F49, 0xC098, 0x7F4A, 0xC099,
03350     0x7F4B, 0xC09A, 0x7F4C, 0xC09B, 0x7F4D, 0xC09C, 0x7F4E, 0xC09D,
03351     0x7F4F, 0xC09E, 0x7F50, 0xB9DE, 0x7F51, 0xCDF8, 0x7F52, 0xC09F,
03352     0x7F53, 0xC0A0, 0x7F54, 0xD8E8, 0x7F55, 0xBAB1, 0x7F56, 0xC140,
03353     0x7F57, 0xC2DE, 0x7F58, 0xEEB7, 0x7F59, 0xC141, 0x7F5A, 0xB7A3,
03354     0x7F5B, 0xC142, 0x7F5C, 0xC143, 0x7F5D, 0xC144, 0x7F5E, 0xC145,
03355     0x7F5F, 0xEEB9, 0x7F60, 0xC146, 0x7F61, 0xEEB8, 0x7F62, 0xB0D5,
03356     0x7F63, 0xC147, 0x7F64, 0xC148, 0x7F65, 0xC149, 0x7F66, 0xC14A,
03357     0x7F67, 0xC14B, 0x7F68, 0xEEBB, 0x7F69, 0xD5D6, 0x7F6A, 0xD7EF,
03358     0x7F6B, 0xC14C, 0x7F6C, 0xC14D, 0x7F6D, 0xC14E, 0x7F6E, 0xD6C3,
03359     0x7F6F, 0xC14F, 0x7F70, 0xC150, 0x7F71, 0xEEBD, 0x7F72, 0xCAF0,
03360     0x7F73, 0xC151, 0x7F74, 0xEEBC, 0x7F75, 0xC152, 0x7F76, 0xC153,
03361     0x7F77, 0xC154, 0x7F78, 0xC155, 0x7F79, 0xEEBE, 0x7F7A, 0xC156,
03362     0x7F7B, 0xC157, 0x7F7C, 0xC158, 0x7F7D, 0xC159, 0x7F7E, 0xEEC0,
03363     0x7F7F, 0xC15A, 0x7F80, 0xC15B, 0x7F81, 0xEEBF, 0x7F82, 0xC15C,
03364     0x7F83, 0xC15D, 0x7F84, 0xC15E, 0x7F85, 0xC15F, 0x7F86, 0xC160,
03365     0x7F87, 0xC161, 0x7F88, 0xC162, 0x7F89, 0xC163, 0x7F8A, 0xD1F2,
03366     0x7F8B, 0xC164, 0x7F8C, 0xC7BC, 0x7F8D, 0xC165, 0x7F8E, 0xC3C0,
03367     0x7F8F, 0xC166, 0x7F90, 0xC167, 0x7F91, 0xC168, 0x7F92, 0xC169,
03368     0x7F93, 0xC16A, 0x7F94, 0xB8E1, 0x7F95, 0xC16B, 0x7F96, 0xC16C,
03369     0x7F97, 0xC16D, 0x7F98, 0xC16E, 0x7F99, 0xC16F, 0x7F9A, 0xC1E7,
03370     0x7F9B, 0xC170, 0x7F9C, 0xC171, 0x7F9D, 0xF4C6, 0x7F9E, 0xD0DF,
03371     0x7F9F, 0xF4C7, 0x7FA0, 0xC172, 0x7FA1, 0xCFDB, 0x7FA2, 0xC173,
03372     0x7FA3, 0xC174, 0x7FA4, 0xC8BA, 0x7FA5, 0xC175, 0x7FA6, 0xC176,
03373     0x7FA7, 0xF4C8, 0x7FA8, 0xC177, 0x7FA9, 0xC178, 0x7FAA, 0xC179,
03374     0x7FAB, 0xC17A, 0x7FAC, 0xC17B, 0x7FAD, 0xC17C, 0x7FAE, 0xC17D,
03375     0x7FAF, 0xF4C9, 0x7FB0, 0xF4CA, 0x7FB1, 0xC17E, 0x7FB2, 0xF4CB,
03376     0x7FB3, 0xC180, 0x7FB4, 0xC181, 0x7FB5, 0xC182, 0x7FB6, 0xC183,
03377     0x7FB7, 0xC184, 0x7FB8, 0xD9FA, 0x7FB9, 0xB8FE, 0x7FBA, 0xC185,
03378     0x7FBB, 0xC186, 0x7FBC, 0xE5F1, 0x7FBD, 0xD3F0, 0x7FBE, 0xC187,
03379     0x7FBF, 0xF4E0, 0x7FC0, 0xC188, 0x7FC1, 0xCECC, 0x7FC2, 0xC189,
03380     0x7FC3, 0xC18A, 0x7FC4, 0xC18B, 0x7FC5, 0xB3E1, 0x7FC6, 0xC18C,
03381     0x7FC7, 0xC18D, 0x7FC8, 0xC18E, 0x7FC9, 0xC18F, 0x7FCA, 0xF1B4,
03382     0x7FCB, 0xC190, 0x7FCC, 0xD2EE, 0x7FCD, 0xC191, 0x7FCE, 0xF4E1,
03383     0x7FCF, 0xC192, 0x7FD0, 0xC193, 0x7FD1, 0xC194, 0x7FD2, 0xC195,
03384     0x7FD3, 0xC196, 0x7FD4, 0xCFE8, 0x7FD5, 0xF4E2, 0x7FD6, 0xC197,
03385     0x7FD7, 0xC198, 0x7FD8, 0xC7CC, 0x7FD9, 0xC199, 0x7FDA, 0xC19A,
03386     0x7FDB, 0xC19B, 0x7FDC, 0xC19C, 0x7FDD, 0xC19D, 0x7FDE, 0xC19E,
03387     0x7FDF, 0xB5D4, 0x7FE0, 0xB4E4, 0x7FE1, 0xF4E4, 0x7FE2, 0xC19F,
03388     0x7FE3, 0xC1A0, 0x7FE4, 0xC240, 0x7FE5, 0xF4E3, 0x7FE6, 0xF4E5,
03389     0x7FE7, 0xC241, 0x7FE8, 0xC242, 0x7FE9, 0xF4E6, 0x7FEA, 0xC243,
03390     0x7FEB, 0xC244, 0x7FEC, 0xC245, 0x7FED, 0xC246, 0x7FEE, 0xF4E7,
03391     0x7FEF, 0xC247, 0x7FF0, 0xBAB2, 0x7FF1, 0xB0BF, 0x7FF2, 0xC248,
03392     0x7FF3, 0xF4E8, 0x7FF4, 0xC249, 0x7FF5, 0xC24A, 0x7FF6, 0xC24B,
03393     0x7FF7, 0xC24C, 0x7FF8, 0xC24D, 0x7FF9, 0xC24E, 0x7FFA, 0xC24F,
03394     0x7FFB, 0xB7AD, 0x7FFC, 0xD2ED, 0x7FFD, 0xC250, 0x7FFE, 0xC251,
03395     0x7FFF, 0xC252, 0x8000, 0xD2AB, 0x8001, 0xC0CF, 0x8002, 0xC253,
03396     0x8003, 0xBFBC, 0x8004, 0xEBA3, 0x8005, 0xD5DF, 0x8006, 0xEAC8,
03397     0x8007, 0xC254, 0x8008, 0xC255, 0x8009, 0xC256, 0x800A, 0xC257,
03398     0x800B, 0xF1F3, 0x800C, 0xB6F8, 0x800D, 0xCBA3, 0x800E, 0xC258,
03399     0x800F, 0xC259, 0x8010, 0xC4CD, 0x8011, 0xC25A, 0x8012, 0xF1E7,
03400     0x8013, 0xC25B, 0x8014, 0xF1E8, 0x8015, 0xB8FB, 0x8016, 0xF1E9,
03401     0x8017, 0xBAC4, 0x8018, 0xD4C5, 0x8019, 0xB0D2, 0x801A, 0xC25C,
03402     0x801B, 0xC25D, 0x801C, 0xF1EA, 0x801D, 0xC25E, 0x801E, 0xC25F,
03403     0x801F, 0xC260, 0x8020, 0xF1EB, 0x8021, 0xC261, 0x8022, 0xF1EC,
03404     0x8023, 0xC262, 0x8024, 0xC263, 0x8025, 0xF1ED, 0x8026, 0xF1EE,
03405     0x8027, 0xF1EF, 0x8028, 0xF1F1, 0x8029, 0xF1F0, 0x802A, 0xC5D5,
03406     0x802B, 0xC264, 0x802C, 0xC265, 0x802D, 0xC266, 0x802E, 0xC267,
03407     0x802F, 0xC268, 0x8030, 0xC269, 0x8031, 0xF1F2, 0x8032, 0xC26A,
03408     0x8033, 0xB6FA, 0x8034, 0xC26B, 0x8035, 0xF1F4, 0x8036, 0xD2AE,
03409     0x8037, 0xDEC7, 0x8038, 0xCBCA, 0x8039, 0xC26C, 0x803A, 0xC26D,
03410     0x803B, 0xB3DC, 0x803C, 0xC26E, 0x803D, 0xB5A2, 0x803E, 0xC26F,
03411     0x803F, 0xB9A2, 0x8040, 0xC270, 0x8041, 0xC271, 0x8042, 0xC4F4,
03412     0x8043, 0xF1F5, 0x8044, 0xC272, 0x8045, 0xC273, 0x8046, 0xF1F6,
03413     0x8047, 0xC274, 0x8048, 0xC275, 0x8049, 0xC276, 0x804A, 0xC1C4,
03414     0x804B, 0xC1FB, 0x804C, 0xD6B0, 0x804D, 0xF1F7, 0x804E, 0xC277,
03415     0x804F, 0xC278, 0x8050, 0xC279, 0x8051, 0xC27A, 0x8052, 0xF1F8,
03416     0x8053, 0xC27B, 0x8054, 0xC1AA, 0x8055, 0xC27C, 0x8056, 0xC27D,
03417     0x8057, 0xC27E, 0x8058, 0xC6B8, 0x8059, 0xC280, 0x805A, 0xBEDB,
03418     0x805B, 0xC281, 0x805C, 0xC282, 0x805D, 0xC283, 0x805E, 0xC284,
03419     0x805F, 0xC285, 0x8060, 0xC286, 0x8061, 0xC287, 0x8062, 0xC288,
03420     0x8063, 0xC289, 0x8064, 0xC28A, 0x8065, 0xC28B, 0x8066, 0xC28C,
03421     0x8067, 0xC28D, 0x8068, 0xC28E, 0x8069, 0xF1F9, 0x806A, 0xB4CF,
03422     0x806B, 0xC28F, 0x806C, 0xC290, 0x806D, 0xC291, 0x806E, 0xC292,
03423     0x806F, 0xC293, 0x8070, 0xC294, 0x8071, 0xF1FA, 0x8072, 0xC295,
03424     0x8073, 0xC296, 0x8074, 0xC297, 0x8075, 0xC298, 0x8076, 0xC299,
03425     0x8077, 0xC29A, 0x8078, 0xC29B, 0x8079, 0xC29C, 0x807A, 0xC29D,
03426     0x807B, 0xC29E, 0x807C, 0xC29F, 0x807D, 0xC2A0, 0x807E, 0xC340,
03427     0x807F, 0xEDB2, 0x8080, 0xEDB1, 0x8081, 0xC341, 0x8082, 0xC342,
03428     0x8083, 0xCBE0, 0x8084, 0xD2DE, 0x8085, 0xC343, 0x8086, 0xCBC1,
03429     0x8087, 0xD5D8, 0x8088, 0xC344, 0x8089, 0xC8E2, 0x808A, 0xC345,
03430     0x808B, 0xC0DF, 0x808C, 0xBCA1, 0x808D, 0xC346, 0x808E, 0xC347,
03431     0x808F, 0xC348, 0x8090, 0xC349, 0x8091, 0xC34A, 0x8092, 0xC34B,
03432     0x8093, 0xEBC1, 0x8094, 0xC34C, 0x8095, 0xC34D, 0x8096, 0xD0A4,
03433     0x8097, 0xC34E, 0x8098, 0xD6E2, 0x8099, 0xC34F, 0x809A, 0xB6C7,
03434     0x809B, 0xB8D8, 0x809C, 0xEBC0, 0x809D, 0xB8CE, 0x809E, 0xC350,
03435     0x809F, 0xEBBF, 0x80A0, 0xB3A6, 0x80A1, 0xB9C9, 0x80A2, 0xD6AB,
03436     0x80A3, 0xC351, 0x80A4, 0xB7F4, 0x80A5, 0xB7CA, 0x80A6, 0xC352,
03437     0x80A7, 0xC353, 0x80A8, 0xC354, 0x80A9, 0xBCE7, 0x80AA, 0xB7BE,
03438     0x80AB, 0xEBC6, 0x80AC, 0xC355, 0x80AD, 0xEBC7, 0x80AE, 0xB0B9,
03439     0x80AF, 0xBFCF, 0x80B0, 0xC356, 0x80B1, 0xEBC5, 0x80B2, 0xD3FD,
03440     0x80B3, 0xC357, 0x80B4, 0xEBC8, 0x80B5, 0xC358, 0x80B6, 0xC359,
03441     0x80B7, 0xEBC9, 0x80B8, 0xC35A, 0x80B9, 0xC35B, 0x80BA, 0xB7CE,
03442     0x80BB, 0xC35C, 0x80BC, 0xEBC2, 0x80BD, 0xEBC4, 0x80BE, 0xC9F6,
03443     0x80BF, 0xD6D7, 0x80C0, 0xD5CD, 0x80C1, 0xD0B2, 0x80C2, 0xEBCF,
03444     0x80C3, 0xCEB8, 0x80C4, 0xEBD0, 0x80C5, 0xC35D, 0x80C6, 0xB5A8,
03445     0x80C7, 0xC35E, 0x80C8, 0xC35F, 0x80C9, 0xC360, 0x80CA, 0xC361,
03446     0x80CB, 0xC362, 0x80CC, 0xB1B3, 0x80CD, 0xEBD2, 0x80CE, 0xCCA5,
03447     0x80CF, 0xC363, 0x80D0, 0xC364, 0x80D1, 0xC365, 0x80D2, 0xC366,
03448     0x80D3, 0xC367, 0x80D4, 0xC368, 0x80D5, 0xC369, 0x80D6, 0xC5D6,
03449     0x80D7, 0xEBD3, 0x80D8, 0xC36A, 0x80D9, 0xEBD1, 0x80DA, 0xC5DF,
03450     0x80DB, 0xEBCE, 0x80DC, 0xCAA4, 0x80DD, 0xEBD5, 0x80DE, 0xB0FB,
03451     0x80DF, 0xC36B, 0x80E0, 0xC36C, 0x80E1, 0xBAFA, 0x80E2, 0xC36D,
03452     0x80E3, 0xC36E, 0x80E4, 0xD8B7, 0x80E5, 0xF1E3, 0x80E6, 0xC36F,
03453     0x80E7, 0xEBCA, 0x80E8, 0xEBCB, 0x80E9, 0xEBCC, 0x80EA, 0xEBCD,
03454     0x80EB, 0xEBD6, 0x80EC, 0xE6C0, 0x80ED, 0xEBD9, 0x80EE, 0xC370,
03455     0x80EF, 0xBFE8, 0x80F0, 0xD2C8, 0x80F1, 0xEBD7, 0x80F2, 0xEBDC,
03456     0x80F3, 0xB8EC, 0x80F4, 0xEBD8, 0x80F5, 0xC371, 0x80F6, 0xBDBA,
03457     0x80F7, 0xC372, 0x80F8, 0xD0D8, 0x80F9, 0xC373, 0x80FA, 0xB0B7,
03458     0x80FB, 0xC374, 0x80FC, 0xEBDD, 0x80FD, 0xC4DC, 0x80FE, 0xC375,
03459     0x80FF, 0xC376, 0x8100, 0xC377, 0x8101, 0xC378, 0x8102, 0xD6AC,
03460     0x8103, 0xC379, 0x8104, 0xC37A, 0x8105, 0xC37B, 0x8106, 0xB4E0,
03461     0x8107, 0xC37C, 0x8108, 0xC37D, 0x8109, 0xC2F6, 0x810A, 0xBCB9,
03462     0x810B, 0xC37E, 0x810C, 0xC380, 0x810D, 0xEBDA, 0x810E, 0xEBDB,
03463     0x810F, 0xD4E0, 0x8110, 0xC6EA, 0x8111, 0xC4D4, 0x8112, 0xEBDF,
03464     0x8113, 0xC5A7, 0x8114, 0xD9F5, 0x8115, 0xC381, 0x8116, 0xB2B1,
03465     0x8117, 0xC382, 0x8118, 0xEBE4, 0x8119, 0xC383, 0x811A, 0xBDC5,
03466     0x811B, 0xC384, 0x811C, 0xC385, 0x811D, 0xC386, 0x811E, 0xEBE2,
03467     0x811F, 0xC387, 0x8120, 0xC388, 0x8121, 0xC389, 0x8122, 0xC38A,
03468     0x8123, 0xC38B, 0x8124, 0xC38C, 0x8125, 0xC38D, 0x8126, 0xC38E,
03469     0x8127, 0xC38F, 0x8128, 0xC390, 0x8129, 0xC391, 0x812A, 0xC392,
03470     0x812B, 0xC393, 0x812C, 0xEBE3, 0x812D, 0xC394, 0x812E, 0xC395,
03471     0x812F, 0xB8AC, 0x8130, 0xC396, 0x8131, 0xCDD1, 0x8132, 0xEBE5,
03472     0x8133, 0xC397, 0x8134, 0xC398, 0x8135, 0xC399, 0x8136, 0xEBE1,
03473     0x8137, 0xC39A, 0x8138, 0xC1B3, 0x8139, 0xC39B, 0x813A, 0xC39C,
03474     0x813B, 0xC39D, 0x813C, 0xC39E, 0x813D, 0xC39F, 0x813E, 0xC6A2,
03475     0x813F, 0xC3A0, 0x8140, 0xC440, 0x8141, 0xC441, 0x8142, 0xC442,
03476     0x8143, 0xC443, 0x8144, 0xC444, 0x8145, 0xC445, 0x8146, 0xCCF3,
03477     0x8147, 0xC446, 0x8148, 0xEBE6, 0x8149, 0xC447, 0x814A, 0xC0B0,
03478     0x814B, 0xD2B8, 0x814C, 0xEBE7, 0x814D, 0xC448, 0x814E, 0xC449,
03479     0x814F, 0xC44A, 0x8150, 0xB8AF, 0x8151, 0xB8AD, 0x8152, 0xC44B,
03480     0x8153, 0xEBE8, 0x8154, 0xC7BB, 0x8155, 0xCDF3, 0x8156, 0xC44C,
03481     0x8157, 0xC44D, 0x8158, 0xC44E, 0x8159, 0xEBEA, 0x815A, 0xEBEB,
03482     0x815B, 0xC44F, 0x815C, 0xC450, 0x815D, 0xC451, 0x815E, 0xC452,
03483     0x815F, 0xC453, 0x8160, 0xEBED, 0x8161, 0xC454, 0x8162, 0xC455,
03484     0x8163, 0xC456, 0x8164, 0xC457, 0x8165, 0xD0C8, 0x8166, 0xC458,
03485     0x8167, 0xEBF2, 0x8168, 0xC459, 0x8169, 0xEBEE, 0x816A, 0xC45A,
03486     0x816B, 0xC45B, 0x816C, 0xC45C, 0x816D, 0xEBF1, 0x816E, 0xC8F9,
03487     0x816F, 0xC45D, 0x8170, 0xD1FC, 0x8171, 0xEBEC, 0x8172, 0xC45E,
03488     0x8173, 0xC45F, 0x8174, 0xEBE9, 0x8175, 0xC460, 0x8176, 0xC461,
03489     0x8177, 0xC462, 0x8178, 0xC463, 0x8179, 0xB8B9, 0x817A, 0xCFD9,
03490     0x817B, 0xC4E5, 0x817C, 0xEBEF, 0x817D, 0xEBF0, 0x817E, 0xCCDA,
03491     0x817F, 0xCDC8, 0x8180, 0xB0F2, 0x8181, 0xC464, 0x8182, 0xEBF6,
03492     0x8183, 0xC465, 0x8184, 0xC466, 0x8185, 0xC467, 0x8186, 0xC468,
03493     0x8187, 0xC469, 0x8188, 0xEBF5, 0x8189, 0xC46A, 0x818A, 0xB2B2,
03494     0x818B, 0xC46B, 0x818C, 0xC46C, 0x818D, 0xC46D, 0x818E, 0xC46E,
03495     0x818F, 0xB8E0, 0x8190, 0xC46F, 0x8191, 0xEBF7, 0x8192, 0xC470,
03496     0x8193, 0xC471, 0x8194, 0xC472, 0x8195, 0xC473, 0x8196, 0xC474,
03497     0x8197, 0xC475, 0x8198, 0xB1EC, 0x8199, 0xC476, 0x819A, 0xC477,
03498     0x819B, 0xCCC5, 0x819C, 0xC4A4, 0x819D, 0xCFA5, 0x819E, 0xC478,
03499     0x819F, 0xC479, 0x81A0, 0xC47A, 0x81A1, 0xC47B, 0x81A2, 0xC47C,
03500     0x81A3, 0xEBF9, 0x81A4, 0xC47D, 0x81A5, 0xC47E, 0x81A6, 0xECA2,
03501     0x81A7, 0xC480, 0x81A8, 0xC5F2, 0x81A9, 0xC481, 0x81AA, 0xEBFA,
03502     0x81AB, 0xC482, 0x81AC, 0xC483, 0x81AD, 0xC484, 0x81AE, 0xC485,
03503     0x81AF, 0xC486, 0x81B0, 0xC487, 0x81B1, 0xC488, 0x81B2, 0xC489,
03504     0x81B3, 0xC9C5, 0x81B4, 0xC48A, 0x81B5, 0xC48B, 0x81B6, 0xC48C,
03505     0x81B7, 0xC48D, 0x81B8, 0xC48E, 0x81B9, 0xC48F, 0x81BA, 0xE2DF,
03506     0x81BB, 0xEBFE, 0x81BC, 0xC490, 0x81BD, 0xC491, 0x81BE, 0xC492,
03507     0x81BF, 0xC493, 0x81C0, 0xCDCE, 0x81C1, 0xECA1, 0x81C2, 0xB1DB,
03508     0x81C3, 0xD3B7, 0x81C4, 0xC494, 0x81C5, 0xC495, 0x81C6, 0xD2DC,
03509     0x81C7, 0xC496, 0x81C8, 0xC497, 0x81C9, 0xC498, 0x81CA, 0xEBFD,
03510     0x81CB, 0xC499, 0x81CC, 0xEBFB, 0x81CD, 0xC49A, 0x81CE, 0xC49B,
03511     0x81CF, 0xC49C, 0x81D0, 0xC49D, 0x81D1, 0xC49E, 0x81D2, 0xC49F,
03512     0x81D3, 0xC4A0, 0x81D4, 0xC540, 0x81D5, 0xC541, 0x81D6, 0xC542,
03513     0x81D7, 0xC543, 0x81D8, 0xC544, 0x81D9, 0xC545, 0x81DA, 0xC546,
03514     0x81DB, 0xC547, 0x81DC, 0xC548, 0x81DD, 0xC549, 0x81DE, 0xC54A,
03515     0x81DF, 0xC54B, 0x81E0, 0xC54C, 0x81E1, 0xC54D, 0x81E2, 0xC54E,
03516     0x81E3, 0xB3BC, 0x81E4, 0xC54F, 0x81E5, 0xC550, 0x81E6, 0xC551,
03517     0x81E7, 0xEAB0, 0x81E8, 0xC552, 0x81E9, 0xC553, 0x81EA, 0xD7D4,
03518     0x81EB, 0xC554, 0x81EC, 0xF4AB, 0x81ED, 0xB3F4, 0x81EE, 0xC555,
03519     0x81EF, 0xC556, 0x81F0, 0xC557, 0x81F1, 0xC558, 0x81F2, 0xC559,
03520     0x81F3, 0xD6C1, 0x81F4, 0xD6C2, 0x81F5, 0xC55A, 0x81F6, 0xC55B,
03521     0x81F7, 0xC55C, 0x81F8, 0xC55D, 0x81F9, 0xC55E, 0x81FA, 0xC55F,
03522     0x81FB, 0xD5E9, 0x81FC, 0xBECA, 0x81FD, 0xC560, 0x81FE, 0xF4A7,
03523     0x81FF, 0xC561, 0x8200, 0xD2A8, 0x8201, 0xF4A8, 0x8202, 0xF4A9,
03524     0x8203, 0xC562, 0x8204, 0xF4AA, 0x8205, 0xBECB, 0x8206, 0xD3DF,
03525     0x8207, 0xC563, 0x8208, 0xC564, 0x8209, 0xC565, 0x820A, 0xC566,
03526     0x820B, 0xC567, 0x820C, 0xC9E0, 0x820D, 0xC9E1, 0x820E, 0xC568,
03527     0x820F, 0xC569, 0x8210, 0xF3C2, 0x8211, 0xC56A, 0x8212, 0xCAE6,
03528     0x8213, 0xC56B, 0x8214, 0xCCF2, 0x8215, 0xC56C, 0x8216, 0xC56D,
03529     0x8217, 0xC56E, 0x8218, 0xC56F, 0x8219, 0xC570, 0x821A, 0xC571,
03530     0x821B, 0xE2B6, 0x821C, 0xCBB4, 0x821D, 0xC572, 0x821E, 0xCEE8,
03531     0x821F, 0xD6DB, 0x8220, 0xC573, 0x8221, 0xF4AD, 0x8222, 0xF4AE,
03532     0x8223, 0xF4AF, 0x8224, 0xC574, 0x8225, 0xC575, 0x8226, 0xC576,
03533     0x8227, 0xC577, 0x8228, 0xF4B2, 0x8229, 0xC578, 0x822A, 0xBABD,
03534     0x822B, 0xF4B3, 0x822C, 0xB0E3, 0x822D, 0xF4B0, 0x822E, 0xC579,
03535     0x822F, 0xF4B1, 0x8230, 0xBDA2, 0x8231, 0xB2D5, 0x8232, 0xC57A,
03536     0x8233, 0xF4B6, 0x8234, 0xF4B7, 0x8235, 0xB6E6, 0x8236, 0xB2B0,
03537     0x8237, 0xCFCF, 0x8238, 0xF4B4, 0x8239, 0xB4AC, 0x823A, 0xC57B,
03538     0x823B, 0xF4B5, 0x823C, 0xC57C, 0x823D, 0xC57D, 0x823E, 0xF4B8,
03539     0x823F, 0xC57E, 0x8240, 0xC580, 0x8241, 0xC581, 0x8242, 0xC582,
03540     0x8243, 0xC583, 0x8244, 0xF4B9, 0x8245, 0xC584, 0x8246, 0xC585,
03541     0x8247, 0xCDA7, 0x8248, 0xC586, 0x8249, 0xF4BA, 0x824A, 0xC587,
03542     0x824B, 0xF4BB, 0x824C, 0xC588, 0x824D, 0xC589, 0x824E, 0xC58A,
03543     0x824F, 0xF4BC, 0x8250, 0xC58B, 0x8251, 0xC58C, 0x8252, 0xC58D,
03544     0x8253, 0xC58E, 0x8254, 0xC58F, 0x8255, 0xC590, 0x8256, 0xC591,
03545     0x8257, 0xC592, 0x8258, 0xCBD2, 0x8259, 0xC593, 0x825A, 0xF4BD,
03546     0x825B, 0xC594, 0x825C, 0xC595, 0x825D, 0xC596, 0x825E, 0xC597,
03547     0x825F, 0xF4BE, 0x8260, 0xC598, 0x8261, 0xC599, 0x8262, 0xC59A,
03548     0x8263, 0xC59B, 0x8264, 0xC59C, 0x8265, 0xC59D, 0x8266, 0xC59E,
03549     0x8267, 0xC59F, 0x8268, 0xF4BF, 0x8269, 0xC5A0, 0x826A, 0xC640,
03550     0x826B, 0xC641, 0x826C, 0xC642, 0x826D, 0xC643, 0x826E, 0xF4DE,
03551     0x826F, 0xC1BC, 0x8270, 0xBCE8, 0x8271, 0xC644, 0x8272, 0xC9AB,
03552     0x8273, 0xD1DE, 0x8274, 0xE5F5, 0x8275, 0xC645, 0x8276, 0xC646,
03553     0x8277, 0xC647, 0x8278, 0xC648, 0x8279, 0xDCB3, 0x827A, 0xD2D5,
03554     0x827B, 0xC649, 0x827C, 0xC64A, 0x827D, 0xDCB4, 0x827E, 0xB0AC,
03555     0x827F, 0xDCB5, 0x8280, 0xC64B, 0x8281, 0xC64C, 0x8282, 0xBDDA,
03556     0x8283, 0xC64D, 0x8284, 0xDCB9, 0x8285, 0xC64E, 0x8286, 0xC64F,
03557     0x8287, 0xC650, 0x8288, 0xD8C2, 0x8289, 0xC651, 0x828A, 0xDCB7,
03558     0x828B, 0xD3F3, 0x828C, 0xC652, 0x828D, 0xC9D6, 0x828E, 0xDCBA,
03559     0x828F, 0xDCB6, 0x8290, 0xC653, 0x8291, 0xDCBB, 0x8292, 0xC3A2,
03560     0x8293, 0xC654, 0x8294, 0xC655, 0x8295, 0xC656, 0x8296, 0xC657,
03561     0x8297, 0xDCBC, 0x8298, 0xDCC5, 0x8299, 0xDCBD, 0x829A, 0xC658,
03562     0x829B, 0xC659, 0x829C, 0xCEDF, 0x829D, 0xD6A5, 0x829E, 0xC65A,
03563     0x829F, 0xDCCF, 0x82A0, 0xC65B, 0x82A1, 0xDCCD, 0x82A2, 0xC65C,
03564     0x82A3, 0xC65D, 0x82A4, 0xDCD2, 0x82A5, 0xBDE6, 0x82A6, 0xC2AB,
03565     0x82A7, 0xC65E, 0x82A8, 0xDCB8, 0x82A9, 0xDCCB, 0x82AA, 0xDCCE,
03566     0x82AB, 0xDCBE, 0x82AC, 0xB7D2, 0x82AD, 0xB0C5, 0x82AE, 0xDCC7,
03567     0x82AF, 0xD0BE, 0x82B0, 0xDCC1, 0x82B1, 0xBBA8, 0x82B2, 0xC65F,
03568     0x82B3, 0xB7BC, 0x82B4, 0xDCCC, 0x82B5, 0xC660, 0x82B6, 0xC661,
03569     0x82B7, 0xDCC6, 0x82B8, 0xDCBF, 0x82B9, 0xC7DB, 0x82BA, 0xC662,
03570     0x82BB, 0xC663, 0x82BC, 0xC664, 0x82BD, 0xD1BF, 0x82BE, 0xDCC0,
03571     0x82BF, 0xC665, 0x82C0, 0xC666, 0x82C1, 0xDCCA, 0x82C2, 0xC667,
03572     0x82C3, 0xC668, 0x82C4, 0xDCD0, 0x82C5, 0xC669, 0x82C6, 0xC66A,
03573     0x82C7, 0xCEAD, 0x82C8, 0xDCC2, 0x82C9, 0xC66B, 0x82CA, 0xDCC3,
03574     0x82CB, 0xDCC8, 0x82CC, 0xDCC9, 0x82CD, 0xB2D4, 0x82CE, 0xDCD1,
03575     0x82CF, 0xCBD5, 0x82D0, 0xC66C, 0x82D1, 0xD4B7, 0x82D2, 0xDCDB,
03576     0x82D3, 0xDCDF, 0x82D4, 0xCCA6, 0x82D5, 0xDCE6, 0x82D6, 0xC66D,
03577     0x82D7, 0xC3E7, 0x82D8, 0xDCDC, 0x82D9, 0xC66E, 0x82DA, 0xC66F,
03578     0x82DB, 0xBFC1, 0x82DC, 0xDCD9, 0x82DD, 0xC670, 0x82DE, 0xB0FA,
03579     0x82DF, 0xB9B6, 0x82E0, 0xDCE5, 0x82E1, 0xDCD3, 0x82E2, 0xC671,
03580     0x82E3, 0xDCC4, 0x82E4, 0xDCD6, 0x82E5, 0xC8F4, 0x82E6, 0xBFE0,
03581     0x82E7, 0xC672, 0x82E8, 0xC673, 0x82E9, 0xC674, 0x82EA, 0xC675,
03582     0x82EB, 0xC9BB, 0x82EC, 0xC676, 0x82ED, 0xC677, 0x82EE, 0xC678,
03583     0x82EF, 0xB1BD, 0x82F0, 0xC679, 0x82F1, 0xD3A2, 0x82F2, 0xC67A,
03584     0x82F3, 0xC67B, 0x82F4, 0xDCDA, 0x82F5, 0xC67C, 0x82F6, 0xC67D,
03585     0x82F7, 0xDCD5, 0x82F8, 0xC67E, 0x82F9, 0xC6BB, 0x82FA, 0xC680,
03586     0x82FB, 0xDCDE, 0x82FC, 0xC681, 0x82FD, 0xC682, 0x82FE, 0xC683,
03587     0x82FF, 0xC684, 0x8300, 0xC685, 0x8301, 0xD7C2, 0x8302, 0xC3AF,
03588     0x8303, 0xB7B6, 0x8304, 0xC7D1, 0x8305, 0xC3A9, 0x8306, 0xDCE2,
03589     0x8307, 0xDCD8, 0x8308, 0xDCEB, 0x8309, 0xDCD4, 0x830A, 0xC686,
03590     0x830B, 0xC687, 0x830C, 0xDCDD, 0x830D, 0xC688, 0x830E, 0xBEA5,
03591     0x830F, 0xDCD7, 0x8310, 0xC689, 0x8311, 0xDCE0, 0x8312, 0xC68A,
03592     0x8313, 0xC68B, 0x8314, 0xDCE3, 0x8315, 0xDCE4, 0x8316, 0xC68C,
03593     0x8317, 0xDCF8, 0x8318, 0xC68D, 0x8319, 0xC68E, 0x831A, 0xDCE1,
03594     0x831B, 0xDDA2, 0x831C, 0xDCE7, 0x831D, 0xC68F, 0x831E, 0xC690,
03595     0x831F, 0xC691, 0x8320, 0xC692, 0x8321, 0xC693, 0x8322, 0xC694,
03596     0x8323, 0xC695, 0x8324, 0xC696, 0x8325, 0xC697, 0x8326, 0xC698,
03597     0x8327, 0xBCEB, 0x8328, 0xB4C4, 0x8329, 0xC699, 0x832A, 0xC69A,
03598     0x832B, 0xC3A3, 0x832C, 0xB2E7, 0x832D, 0xDCFA, 0x832E, 0xC69B,
03599     0x832F, 0xDCF2, 0x8330, 0xC69C, 0x8331, 0xDCEF, 0x8332, 0xC69D,
03600     0x8333, 0xDCFC, 0x8334, 0xDCEE, 0x8335, 0xD2F0, 0x8336, 0xB2E8,
03601     0x8337, 0xC69E, 0x8338, 0xC8D7, 0x8339, 0xC8E3, 0x833A, 0xDCFB,
03602     0x833B, 0xC69F, 0x833C, 0xDCED, 0x833D, 0xC6A0, 0x833E, 0xC740,
03603     0x833F, 0xC741, 0x8340, 0xDCF7, 0x8341, 0xC742, 0x8342, 0xC743,
03604     0x8343, 0xDCF5, 0x8344, 0xC744, 0x8345, 0xC745, 0x8346, 0xBEA3,
03605     0x8347, 0xDCF4, 0x8348, 0xC746, 0x8349, 0xB2DD, 0x834A, 0xC747,
03606     0x834B, 0xC748, 0x834C, 0xC749, 0x834D, 0xC74A, 0x834E, 0xC74B,
03607     0x834F, 0xDCF3, 0x8350, 0xBCF6, 0x8351, 0xDCE8, 0x8352, 0xBBC4,
03608     0x8353, 0xC74C, 0x8354, 0xC0F3, 0x8355, 0xC74D, 0x8356, 0xC74E,
03609     0x8357, 0xC74F, 0x8358, 0xC750, 0x8359, 0xC751, 0x835A, 0xBCD4,
03610     0x835B, 0xDCE9, 0x835C, 0xDCEA, 0x835D, 0xC752, 0x835E, 0xDCF1,
03611     0x835F, 0xDCF6, 0x8360, 0xDCF9, 0x8361, 0xB5B4, 0x8362, 0xC753,
03612     0x8363, 0xC8D9, 0x8364, 0xBBE7, 0x8365, 0xDCFE, 0x8366, 0xDCFD,
03613     0x8367, 0xD3AB, 0x8368, 0xDDA1, 0x8369, 0xDDA3, 0x836A, 0xDDA5,
03614     0x836B, 0xD2F1, 0x836C, 0xDDA4, 0x836D, 0xDDA6, 0x836E, 0xDDA7,
03615     0x836F, 0xD2A9, 0x8370, 0xC754, 0x8371, 0xC755, 0x8372, 0xC756,
03616     0x8373, 0xC757, 0x8374, 0xC758, 0x8375, 0xC759, 0x8376, 0xC75A,
03617     0x8377, 0xBAC9, 0x8378, 0xDDA9, 0x8379, 0xC75B, 0x837A, 0xC75C,
03618     0x837B, 0xDDB6, 0x837C, 0xDDB1, 0x837D, 0xDDB4, 0x837E, 0xC75D,
03619     0x837F, 0xC75E, 0x8380, 0xC75F, 0x8381, 0xC760, 0x8382, 0xC761,
03620     0x8383, 0xC762, 0x8384, 0xC763, 0x8385, 0xDDB0, 0x8386, 0xC6CE,
03621     0x8387, 0xC764, 0x8388, 0xC765, 0x8389, 0xC0F2, 0x838A, 0xC766,
03622     0x838B, 0xC767, 0x838C, 0xC768, 0x838D, 0xC769, 0x838E, 0xC9AF,
03623     0x838F, 0xC76A, 0x8390, 0xC76B, 0x8391, 0xC76C, 0x8392, 0xDCEC,
03624     0x8393, 0xDDAE, 0x8394, 0xC76D, 0x8395, 0xC76E, 0x8396, 0xC76F,
03625     0x8397, 0xC770, 0x8398, 0xDDB7, 0x8399, 0xC771, 0x839A, 0xC772,
03626     0x839B, 0xDCF0, 0x839C, 0xDDAF, 0x839D, 0xC773, 0x839E, 0xDDB8,
03627     0x839F, 0xC774, 0x83A0, 0xDDAC, 0x83A1, 0xC775, 0x83A2, 0xC776,
03628     0x83A3, 0xC777, 0x83A4, 0xC778, 0x83A5, 0xC779, 0x83A6, 0xC77A,
03629     0x83A7, 0xC77B, 0x83A8, 0xDDB9, 0x83A9, 0xDDB3, 0x83AA, 0xDDAD,
03630     0x83AB, 0xC4AA, 0x83AC, 0xC77C, 0x83AD, 0xC77D, 0x83AE, 0xC77E,
03631     0x83AF, 0xC780, 0x83B0, 0xDDA8, 0x83B1, 0xC0B3, 0x83B2, 0xC1AB,
03632     0x83B3, 0xDDAA, 0x83B4, 0xDDAB, 0x83B5, 0xC781, 0x83B6, 0xDDB2,
03633     0x83B7, 0xBBF1, 0x83B8, 0xDDB5, 0x83B9, 0xD3A8, 0x83BA, 0xDDBA,
03634     0x83BB, 0xC782, 0x83BC, 0xDDBB, 0x83BD, 0xC3A7, 0x83BE, 0xC783,
03635     0x83BF, 0xC784, 0x83C0, 0xDDD2, 0x83C1, 0xDDBC, 0x83C2, 0xC785,
03636     0x83C3, 0xC786, 0x83C4, 0xC787, 0x83C5, 0xDDD1, 0x83C6, 0xC788,
03637     0x83C7, 0xB9BD, 0x83C8, 0xC789, 0x83C9, 0xC78A, 0x83CA, 0xBED5,
03638     0x83CB, 0xC78B, 0x83CC, 0xBEFA, 0x83CD, 0xC78C, 0x83CE, 0xC78D,
03639     0x83CF, 0xBACA, 0x83D0, 0xC78E, 0x83D1, 0xC78F, 0x83D2, 0xC790,
03640     0x83D3, 0xC791, 0x83D4, 0xDDCA, 0x83D5, 0xC792, 0x83D6, 0xDDC5,
03641     0x83D7, 0xC793, 0x83D8, 0xDDBF, 0x83D9, 0xC794, 0x83DA, 0xC795,
03642     0x83DB, 0xC796, 0x83DC, 0xB2CB, 0x83DD, 0xDDC3, 0x83DE, 0xC797,
03643     0x83DF, 0xDDCB, 0x83E0, 0xB2A4, 0x83E1, 0xDDD5, 0x83E2, 0xC798,
03644     0x83E3, 0xC799, 0x83E4, 0xC79A, 0x83E5, 0xDDBE, 0x83E6, 0xC79B,
03645     0x83E7, 0xC79C, 0x83E8, 0xC79D, 0x83E9, 0xC6D0, 0x83EA, 0xDDD0,
03646     0x83EB, 0xC79E, 0x83EC, 0xC79F, 0x83ED, 0xC7A0, 0x83EE, 0xC840,
03647     0x83EF, 0xC841, 0x83F0, 0xDDD4, 0x83F1, 0xC1E2, 0x83F2, 0xB7C6,
03648     0x83F3, 0xC842, 0x83F4, 0xC843, 0x83F5, 0xC844, 0x83F6, 0xC845,
03649     0x83F7, 0xC846, 0x83F8, 0xDDCE, 0x83F9, 0xDDCF, 0x83FA, 0xC847,
03650     0x83FB, 0xC848, 0x83FC, 0xC849, 0x83FD, 0xDDC4, 0x83FE, 0xC84A,
03651     0x83FF, 0xC84B, 0x8400, 0xC84C, 0x8401, 0xDDBD, 0x8402, 0xC84D,
03652     0x8403, 0xDDCD, 0x8404, 0xCCD1, 0x8405, 0xC84E, 0x8406, 0xDDC9,
03653     0x8407, 0xC84F, 0x8408, 0xC850, 0x8409, 0xC851, 0x840A, 0xC852,
03654     0x840B, 0xDDC2, 0x840C, 0xC3C8, 0x840D, 0xC6BC, 0x840E, 0xCEAE,
03655     0x840F, 0xDDCC, 0x8410, 0xC853, 0x8411, 0xDDC8, 0x8412, 0xC854,
03656     0x8413, 0xC855, 0x8414, 0xC856, 0x8415, 0xC857, 0x8416, 0xC858,
03657     0x8417, 0xC859, 0x8418, 0xDDC1, 0x8419, 0xC85A, 0x841A, 0xC85B,
03658     0x841B, 0xC85C, 0x841C, 0xDDC6, 0x841D, 0xC2DC, 0x841E, 0xC85D,
03659     0x841F, 0xC85E, 0x8420, 0xC85F, 0x8421, 0xC860, 0x8422, 0xC861,
03660     0x8423, 0xC862, 0x8424, 0xD3A9, 0x8425, 0xD3AA, 0x8426, 0xDDD3,
03661     0x8427, 0xCFF4, 0x8428, 0xC8F8, 0x8429, 0xC863, 0x842A, 0xC864,
03662     0x842B, 0xC865, 0x842C, 0xC866, 0x842D, 0xC867, 0x842E, 0xC868,
03663     0x842F, 0xC869, 0x8430, 0xC86A, 0x8431, 0xDDE6, 0x8432, 0xC86B,
03664     0x8433, 0xC86C, 0x8434, 0xC86D, 0x8435, 0xC86E, 0x8436, 0xC86F,
03665     0x8437, 0xC870, 0x8438, 0xDDC7, 0x8439, 0xC871, 0x843A, 0xC872,
03666     0x843B, 0xC873, 0x843C, 0xDDE0, 0x843D, 0xC2E4, 0x843E, 0xC874,
03667     0x843F, 0xC875, 0x8440, 0xC876, 0x8441, 0xC877, 0x8442, 0xC878,
03668     0x8443, 0xC879, 0x8444, 0xC87A, 0x8445, 0xC87B, 0x8446, 0xDDE1,
03669     0x8447, 0xC87C, 0x8448, 0xC87D, 0x8449, 0xC87E, 0x844A, 0xC880,
03670     0x844B, 0xC881, 0x844C, 0xC882, 0x844D, 0xC883, 0x844E, 0xC884,
03671     0x844F, 0xC885, 0x8450, 0xC886, 0x8451, 0xDDD7, 0x8452, 0xC887,
03672     0x8453, 0xC888, 0x8454, 0xC889, 0x8455, 0xC88A, 0x8456, 0xC88B,
03673     0x8457, 0xD6F8, 0x8458, 0xC88C, 0x8459, 0xDDD9, 0x845A, 0xDDD8,
03674     0x845B, 0xB8F0, 0x845C, 0xDDD6, 0x845D, 0xC88D, 0x845E, 0xC88E,
03675     0x845F, 0xC88F, 0x8460, 0xC890, 0x8461, 0xC6CF, 0x8462, 0xC891,
03676     0x8463, 0xB6AD, 0x8464, 0xC892, 0x8465, 0xC893, 0x8466, 0xC894,
03677     0x8467, 0xC895, 0x8468, 0xC896, 0x8469, 0xDDE2, 0x846A, 0xC897,
03678     0x846B, 0xBAF9, 0x846C, 0xD4E1, 0x846D, 0xDDE7, 0x846E, 0xC898,
03679     0x846F, 0xC899, 0x8470, 0xC89A, 0x8471, 0xB4D0, 0x8472, 0xC89B,
03680     0x8473, 0xDDDA, 0x8474, 0xC89C, 0x8475, 0xBFFB, 0x8476, 0xDDE3,
03681     0x8477, 0xC89D, 0x8478, 0xDDDF, 0x8479, 0xC89E, 0x847A, 0xDDDD,
03682     0x847B, 0xC89F, 0x847C, 0xC8A0, 0x847D, 0xC940, 0x847E, 0xC941,
03683     0x847F, 0xC942, 0x8480, 0xC943, 0x8481, 0xC944, 0x8482, 0xB5D9,
03684     0x8483, 0xC945, 0x8484, 0xC946, 0x8485, 0xC947, 0x8486, 0xC948,
03685     0x8487, 0xDDDB, 0x8488, 0xDDDC, 0x8489, 0xDDDE, 0x848A, 0xC949,
03686     0x848B, 0xBDAF, 0x848C, 0xDDE4, 0x848D, 0xC94A, 0x848E, 0xDDE5,
03687     0x848F, 0xC94B, 0x8490, 0xC94C, 0x8491, 0xC94D, 0x8492, 0xC94E,
03688     0x8493, 0xC94F, 0x8494, 0xC950, 0x8495, 0xC951, 0x8496, 0xC952,
03689     0x8497, 0xDDF5, 0x8498, 0xC953, 0x8499, 0xC3C9, 0x849A, 0xC954,
03690     0x849B, 0xC955, 0x849C, 0xCBE2, 0x849D, 0xC956, 0x849E, 0xC957,
03691     0x849F, 0xC958, 0x84A0, 0xC959, 0x84A1, 0xDDF2, 0x84A2, 0xC95A,
03692     0x84A3, 0xC95B, 0x84A4, 0xC95C, 0x84A5, 0xC95D, 0x84A6, 0xC95E,
03693     0x84A7, 0xC95F, 0x84A8, 0xC960, 0x84A9, 0xC961, 0x84AA, 0xC962,
03694     0x84AB, 0xC963, 0x84AC, 0xC964, 0x84AD, 0xC965, 0x84AE, 0xC966,
03695     0x84AF, 0xD8E1, 0x84B0, 0xC967, 0x84B1, 0xC968, 0x84B2, 0xC6D1,
03696     0x84B3, 0xC969, 0x84B4, 0xDDF4, 0x84B5, 0xC96A, 0x84B6, 0xC96B,
03697     0x84B7, 0xC96C, 0x84B8, 0xD5F4, 0x84B9, 0xDDF3, 0x84BA, 0xDDF0,
03698     0x84BB, 0xC96D, 0x84BC, 0xC96E, 0x84BD, 0xDDEC, 0x84BE, 0xC96F,
03699     0x84BF, 0xDDEF, 0x84C0, 0xC970, 0x84C1, 0xDDE8, 0x84C2, 0xC971,
03700     0x84C3, 0xC972, 0x84C4, 0xD0EE, 0x84C5, 0xC973, 0x84C6, 0xC974,
03701     0x84C7, 0xC975, 0x84C8, 0xC976, 0x84C9, 0xC8D8, 0x84CA, 0xDDEE,
03702     0x84CB, 0xC977, 0x84CC, 0xC978, 0x84CD, 0xDDE9, 0x84CE, 0xC979,
03703     0x84CF, 0xC97A, 0x84D0, 0xDDEA, 0x84D1, 0xCBF2, 0x84D2, 0xC97B,
03704     0x84D3, 0xDDED, 0x84D4, 0xC97C, 0x84D5, 0xC97D, 0x84D6, 0xB1CD,
03705     0x84D7, 0xC97E, 0x84D8, 0xC980, 0x84D9, 0xC981, 0x84DA, 0xC982,
03706     0x84DB, 0xC983, 0x84DC, 0xC984, 0x84DD, 0xC0B6, 0x84DE, 0xC985,
03707     0x84DF, 0xBCBB, 0x84E0, 0xDDF1, 0x84E1, 0xC986, 0x84E2, 0xC987,
03708     0x84E3, 0xDDF7, 0x84E4, 0xC988, 0x84E5, 0xDDF6, 0x84E6, 0xDDEB,
03709     0x84E7, 0xC989, 0x84E8, 0xC98A, 0x84E9, 0xC98B, 0x84EA, 0xC98C,
03710     0x84EB, 0xC98D, 0x84EC, 0xC5EE, 0x84ED, 0xC98E, 0x84EE, 0xC98F,
03711     0x84EF, 0xC990, 0x84F0, 0xDDFB, 0x84F1, 0xC991, 0x84F2, 0xC992,
03712     0x84F3, 0xC993, 0x84F4, 0xC994, 0x84F5, 0xC995, 0x84F6, 0xC996,
03713     0x84F7, 0xC997, 0x84F8, 0xC998, 0x84F9, 0xC999, 0x84FA, 0xC99A,
03714     0x84FB, 0xC99B, 0x84FC, 0xDEA4, 0x84FD, 0xC99C, 0x84FE, 0xC99D,
03715     0x84FF, 0xDEA3, 0x8500, 0xC99E, 0x8501, 0xC99F, 0x8502, 0xC9A0,
03716     0x8503, 0xCA40, 0x8504, 0xCA41, 0x8505, 0xCA42, 0x8506, 0xCA43,
03717     0x8507, 0xCA44, 0x8508, 0xCA45, 0x8509, 0xCA46, 0x850A, 0xCA47,
03718     0x850B, 0xCA48, 0x850C, 0xDDF8, 0x850D, 0xCA49, 0x850E, 0xCA4A,
03719     0x850F, 0xCA4B, 0x8510, 0xCA4C, 0x8511, 0xC3EF, 0x8512, 0xCA4D,
03720     0x8513, 0xC2FB, 0x8514, 0xCA4E, 0x8515, 0xCA4F, 0x8516, 0xCA50,
03721     0x8517, 0xD5E1, 0x8518, 0xCA51, 0x8519, 0xCA52, 0x851A, 0xCEB5,
03722     0x851B, 0xCA53, 0x851C, 0xCA54, 0x851D, 0xCA55, 0x851E, 0xCA56,
03723     0x851F, 0xDDFD, 0x8520, 0xCA57, 0x8521, 0xB2CC, 0x8522, 0xCA58,
03724     0x8523, 0xCA59, 0x8524, 0xCA5A, 0x8525, 0xCA5B, 0x8526, 0xCA5C,
03725     0x8527, 0xCA5D, 0x8528, 0xCA5E, 0x8529, 0xCA5F, 0x852A, 0xCA60,
03726     0x852B, 0xC4E8, 0x852C, 0xCADF, 0x852D, 0xCA61, 0x852E, 0xCA62,
03727     0x852F, 0xCA63, 0x8530, 0xCA64, 0x8531, 0xCA65, 0x8532, 0xCA66,
03728     0x8533, 0xCA67, 0x8534, 0xCA68, 0x8535, 0xCA69, 0x8536, 0xCA6A,
03729     0x8537, 0xC7BE, 0x8538, 0xDDFA, 0x8539, 0xDDFC, 0x853A, 0xDDFE,
03730     0x853B, 0xDEA2, 0x853C, 0xB0AA, 0x853D, 0xB1CE, 0x853E, 0xCA6B,
03731     0x853F, 0xCA6C, 0x8540, 0xCA6D, 0x8541, 0xCA6E, 0x8542, 0xCA6F,
03732     0x8543, 0xDEAC, 0x8544, 0xCA70, 0x8545, 0xCA71, 0x8546, 0xCA72,
03733     0x8547, 0xCA73, 0x8548, 0xDEA6, 0x8549, 0xBDB6, 0x854A, 0xC8EF,
03734     0x854B, 0xCA74, 0x854C, 0xCA75, 0x854D, 0xCA76, 0x854E, 0xCA77,
03735     0x854F, 0xCA78, 0x8550, 0xCA79, 0x8551, 0xCA7A, 0x8552, 0xCA7B,
03736     0x8553, 0xCA7C, 0x8554, 0xCA7D, 0x8555, 0xCA7E, 0x8556, 0xDEA1,
03737     0x8557, 0xCA80, 0x8558, 0xCA81, 0x8559, 0xDEA5, 0x855A, 0xCA82,
03738     0x855B, 0xCA83, 0x855C, 0xCA84, 0x855D, 0xCA85, 0x855E, 0xDEA9,
03739     0x855F, 0xCA86, 0x8560, 0xCA87, 0x8561, 0xCA88, 0x8562, 0xCA89,
03740     0x8563, 0xCA8A, 0x8564, 0xDEA8, 0x8565, 0xCA8B, 0x8566, 0xCA8C,
03741     0x8567, 0xCA8D, 0x8568, 0xDEA7, 0x8569, 0xCA8E, 0x856A, 0xCA8F,
03742     0x856B, 0xCA90, 0x856C, 0xCA91, 0x856D, 0xCA92, 0x856E, 0xCA93,
03743     0x856F, 0xCA94, 0x8570, 0xCA95, 0x8571, 0xCA96, 0x8572, 0xDEAD,
03744     0x8573, 0xCA97, 0x8574, 0xD4CC, 0x8575, 0xCA98, 0x8576, 0xCA99,
03745     0x8577, 0xCA9A, 0x8578, 0xCA9B, 0x8579, 0xDEB3, 0x857A, 0xDEAA,
03746     0x857B, 0xDEAE, 0x857C, 0xCA9C, 0x857D, 0xCA9D, 0x857E, 0xC0D9,
03747     0x857F, 0xCA9E, 0x8580, 0xCA9F, 0x8581, 0xCAA0, 0x8582, 0xCB40,
03748     0x8583, 0xCB41, 0x8584, 0xB1A1, 0x8585, 0xDEB6, 0x8586, 0xCB42,
03749     0x8587, 0xDEB1, 0x8588, 0xCB43, 0x8589, 0xCB44, 0x858A, 0xCB45,
03750     0x858B, 0xCB46, 0x858C, 0xCB47, 0x858D, 0xCB48, 0x858E, 0xCB49,
03751     0x858F, 0xDEB2, 0x8590, 0xCB4A, 0x8591, 0xCB4B, 0x8592, 0xCB4C,
03752     0x8593, 0xCB4D, 0x8594, 0xCB4E, 0x8595, 0xCB4F, 0x8596, 0xCB50,
03753     0x8597, 0xCB51, 0x8598, 0xCB52, 0x8599, 0xCB53, 0x859A, 0xCB54,
03754     0x859B, 0xD1A6, 0x859C, 0xDEB5, 0x859D, 0xCB55, 0x859E, 0xCB56,
03755     0x859F, 0xCB57, 0x85A0, 0xCB58, 0x85A1, 0xCB59, 0x85A2, 0xCB5A,
03756     0x85A3, 0xCB5B, 0x85A4, 0xDEAF, 0x85A5, 0xCB5C, 0x85A6, 0xCB5D,
03757     0x85A7, 0xCB5E, 0x85A8, 0xDEB0, 0x85A9, 0xCB5F, 0x85AA, 0xD0BD,
03758     0x85AB, 0xCB60, 0x85AC, 0xCB61, 0x85AD, 0xCB62, 0x85AE, 0xDEB4,
03759     0x85AF, 0xCAED, 0x85B0, 0xDEB9, 0x85B1, 0xCB63, 0x85B2, 0xCB64,
03760     0x85B3, 0xCB65, 0x85B4, 0xCB66, 0x85B5, 0xCB67, 0x85B6, 0xCB68,
03761     0x85B7, 0xDEB8, 0x85B8, 0xCB69, 0x85B9, 0xDEB7, 0x85BA, 0xCB6A,
03762     0x85BB, 0xCB6B, 0x85BC, 0xCB6C, 0x85BD, 0xCB6D, 0x85BE, 0xCB6E,
03763     0x85BF, 0xCB6F, 0x85C0, 0xCB70, 0x85C1, 0xDEBB, 0x85C2, 0xCB71,
03764     0x85C3, 0xCB72, 0x85C4, 0xCB73, 0x85C5, 0xCB74, 0x85C6, 0xCB75,
03765     0x85C7, 0xCB76, 0x85C8, 0xCB77, 0x85C9, 0xBDE5, 0x85CA, 0xCB78,
03766     0x85CB, 0xCB79, 0x85CC, 0xCB7A, 0x85CD, 0xCB7B, 0x85CE, 0xCB7C,
03767     0x85CF, 0xB2D8, 0x85D0, 0xC3EA, 0x85D1, 0xCB7D, 0x85D2, 0xCB7E,
03768     0x85D3, 0xDEBA, 0x85D4, 0xCB80, 0x85D5, 0xC5BA, 0x85D6, 0xCB81,
03769     0x85D7, 0xCB82, 0x85D8, 0xCB83, 0x85D9, 0xCB84, 0x85DA, 0xCB85,
03770     0x85DB, 0xCB86, 0x85DC, 0xDEBC, 0x85DD, 0xCB87, 0x85DE, 0xCB88,
03771     0x85DF, 0xCB89, 0x85E0, 0xCB8A, 0x85E1, 0xCB8B, 0x85E2, 0xCB8C,
03772     0x85E3, 0xCB8D, 0x85E4, 0xCCD9, 0x85E5, 0xCB8E, 0x85E6, 0xCB8F,
03773     0x85E7, 0xCB90, 0x85E8, 0xCB91, 0x85E9, 0xB7AA, 0x85EA, 0xCB92,
03774     0x85EB, 0xCB93, 0x85EC, 0xCB94, 0x85ED, 0xCB95, 0x85EE, 0xCB96,
03775     0x85EF, 0xCB97, 0x85F0, 0xCB98, 0x85F1, 0xCB99, 0x85F2, 0xCB9A,
03776     0x85F3, 0xCB9B, 0x85F4, 0xCB9C, 0x85F5, 0xCB9D, 0x85F6, 0xCB9E,
03777     0x85F7, 0xCB9F, 0x85F8, 0xCBA0, 0x85F9, 0xCC40, 0x85FA, 0xCC41,
03778     0x85FB, 0xD4E5, 0x85FC, 0xCC42, 0x85FD, 0xCC43, 0x85FE, 0xCC44,
03779     0x85FF, 0xDEBD, 0x8600, 0xCC45, 0x8601, 0xCC46, 0x8602, 0xCC47,
03780     0x8603, 0xCC48, 0x8604, 0xCC49, 0x8605, 0xDEBF, 0x8606, 0xCC4A,
03781     0x8607, 0xCC4B, 0x8608, 0xCC4C, 0x8609, 0xCC4D, 0x860A, 0xCC4E,
03782     0x860B, 0xCC4F, 0x860C, 0xCC50, 0x860D, 0xCC51, 0x860E, 0xCC52,
03783     0x860F, 0xCC53, 0x8610, 0xCC54, 0x8611, 0xC4A2, 0x8612, 0xCC55,
03784     0x8613, 0xCC56, 0x8614, 0xCC57, 0x8615, 0xCC58, 0x8616, 0xDEC1,
03785     0x8617, 0xCC59, 0x8618, 0xCC5A, 0x8619, 0xCC5B, 0x861A, 0xCC5C,
03786     0x861B, 0xCC5D, 0x861C, 0xCC5E, 0x861D, 0xCC5F, 0x861E, 0xCC60,
03787     0x861F, 0xCC61, 0x8620, 0xCC62, 0x8621, 0xCC63, 0x8622, 0xCC64,
03788     0x8623, 0xCC65, 0x8624, 0xCC66, 0x8625, 0xCC67, 0x8626, 0xCC68,
03789     0x8627, 0xDEBE, 0x8628, 0xCC69, 0x8629, 0xDEC0, 0x862A, 0xCC6A,
03790     0x862B, 0xCC6B, 0x862C, 0xCC6C, 0x862D, 0xCC6D, 0x862E, 0xCC6E,
03791     0x862F, 0xCC6F, 0x8630, 0xCC70, 0x8631, 0xCC71, 0x8632, 0xCC72,
03792     0x8633, 0xCC73, 0x8634, 0xCC74, 0x8635, 0xCC75, 0x8636, 0xCC76,
03793     0x8637, 0xCC77, 0x8638, 0xD5BA, 0x8639, 0xCC78, 0x863A, 0xCC79,
03794     0x863B, 0xCC7A, 0x863C, 0xDEC2, 0x863D, 0xCC7B, 0x863E, 0xCC7C,
03795     0x863F, 0xCC7D, 0x8640, 0xCC7E, 0x8641, 0xCC80, 0x8642, 0xCC81,
03796     0x8643, 0xCC82, 0x8644, 0xCC83, 0x8645, 0xCC84, 0x8646, 0xCC85,
03797     0x8647, 0xCC86, 0x8648, 0xCC87, 0x8649, 0xCC88, 0x864A, 0xCC89,
03798     0x864B, 0xCC8A, 0x864C, 0xCC8B, 0x864D, 0xF2AE, 0x864E, 0xBBA2,
03799     0x864F, 0xC2B2, 0x8650, 0xC5B0, 0x8651, 0xC2C7, 0x8652, 0xCC8C,
03800     0x8653, 0xCC8D, 0x8654, 0xF2AF, 0x8655, 0xCC8E, 0x8656, 0xCC8F,
03801     0x8657, 0xCC90, 0x8658, 0xCC91, 0x8659, 0xCC92, 0x865A, 0xD0E9,
03802     0x865B, 0xCC93, 0x865C, 0xCC94, 0x865D, 0xCC95, 0x865E, 0xD3DD,
03803     0x865F, 0xCC96, 0x8660, 0xCC97, 0x8661, 0xCC98, 0x8662, 0xEBBD,
03804     0x8663, 0xCC99, 0x8664, 0xCC9A, 0x8665, 0xCC9B, 0x8666, 0xCC9C,
03805     0x8667, 0xCC9D, 0x8668, 0xCC9E, 0x8669, 0xCC9F, 0x866A, 0xCCA0,
03806     0x866B, 0xB3E6, 0x866C, 0xF2B0, 0x866D, 0xCD40, 0x866E, 0xF2B1,
03807     0x866F, 0xCD41, 0x8670, 0xCD42, 0x8671, 0xCAAD, 0x8672, 0xCD43,
03808     0x8673, 0xCD44, 0x8674, 0xCD45, 0x8675, 0xCD46, 0x8676, 0xCD47,
03809     0x8677, 0xCD48, 0x8678, 0xCD49, 0x8679, 0xBAE7, 0x867A, 0xF2B3,
03810     0x867B, 0xF2B5, 0x867C, 0xF2B4, 0x867D, 0xCBE4, 0x867E, 0xCFBA,
03811     0x867F, 0xF2B2, 0x8680, 0xCAB4, 0x8681, 0xD2CF, 0x8682, 0xC2EC,
03812     0x8683, 0xCD4A, 0x8684, 0xCD4B, 0x8685, 0xCD4C, 0x8686, 0xCD4D,
03813     0x8687, 0xCD4E, 0x8688, 0xCD4F, 0x8689, 0xCD50, 0x868A, 0xCEC3,
03814     0x868B, 0xF2B8, 0x868C, 0xB0F6, 0x868D, 0xF2B7, 0x868E, 0xCD51,
03815     0x868F, 0xCD52, 0x8690, 0xCD53, 0x8691, 0xCD54, 0x8692, 0xCD55,
03816     0x8693, 0xF2BE, 0x8694, 0xCD56, 0x8695, 0xB2CF, 0x8696, 0xCD57,
03817     0x8697, 0xCD58, 0x8698, 0xCD59, 0x8699, 0xCD5A, 0x869A, 0xCD5B,
03818     0x869B, 0xCD5C, 0x869C, 0xD1C1, 0x869D, 0xF2BA, 0x869E, 0xCD5D,
03819     0x869F, 0xCD5E, 0x86A0, 0xCD5F, 0x86A1, 0xCD60, 0x86A2, 0xCD61,
03820     0x86A3, 0xF2BC, 0x86A4, 0xD4E9, 0x86A5, 0xCD62, 0x86A6, 0xCD63,
03821     0x86A7, 0xF2BB, 0x86A8, 0xF2B6, 0x86A9, 0xF2BF, 0x86AA, 0xF2BD,
03822     0x86AB, 0xCD64, 0x86AC, 0xF2B9, 0x86AD, 0xCD65, 0x86AE, 0xCD66,
03823     0x86AF, 0xF2C7, 0x86B0, 0xF2C4, 0x86B1, 0xF2C6, 0x86B2, 0xCD67,
03824     0x86B3, 0xCD68, 0x86B4, 0xF2CA, 0x86B5, 0xF2C2, 0x86B6, 0xF2C0,
03825     0x86B7, 0xCD69, 0x86B8, 0xCD6A, 0x86B9, 0xCD6B, 0x86BA, 0xF2C5,
03826     0x86BB, 0xCD6C, 0x86BC, 0xCD6D, 0x86BD, 0xCD6E, 0x86BE, 0xCD6F,
03827     0x86BF, 0xCD70, 0x86C0, 0xD6FB, 0x86C1, 0xCD71, 0x86C2, 0xCD72,
03828     0x86C3, 0xCD73, 0x86C4, 0xF2C1, 0x86C5, 0xCD74, 0x86C6, 0xC7F9,
03829     0x86C7, 0xC9DF, 0x86C8, 0xCD75, 0x86C9, 0xF2C8, 0x86CA, 0xB9C6,
03830     0x86CB, 0xB5B0, 0x86CC, 0xCD76, 0x86CD, 0xCD77, 0x86CE, 0xF2C3,
03831     0x86CF, 0xF2C9, 0x86D0, 0xF2D0, 0x86D1, 0xF2D6, 0x86D2, 0xCD78,
03832     0x86D3, 0xCD79, 0x86D4, 0xBBD7, 0x86D5, 0xCD7A, 0x86D6, 0xCD7B,
03833     0x86D7, 0xCD7C, 0x86D8, 0xF2D5, 0x86D9, 0xCDDC, 0x86DA, 0xCD7D,
03834     0x86DB, 0xD6EB, 0x86DC, 0xCD7E, 0x86DD, 0xCD80, 0x86DE, 0xF2D2,
03835     0x86DF, 0xF2D4, 0x86E0, 0xCD81, 0x86E1, 0xCD82, 0x86E2, 0xCD83,
03836     0x86E3, 0xCD84, 0x86E4, 0xB8F2, 0x86E5, 0xCD85, 0x86E6, 0xCD86,
03837     0x86E7, 0xCD87, 0x86E8, 0xCD88, 0x86E9, 0xF2CB, 0x86EA, 0xCD89,
03838     0x86EB, 0xCD8A, 0x86EC, 0xCD8B, 0x86ED, 0xF2CE, 0x86EE, 0xC2F9,
03839     0x86EF, 0xCD8C, 0x86F0, 0xD5DD, 0x86F1, 0xF2CC, 0x86F2, 0xF2CD,
03840     0x86F3, 0xF2CF, 0x86F4, 0xF2D3, 0x86F5, 0xCD8D, 0x86F6, 0xCD8E,
03841     0x86F7, 0xCD8F, 0x86F8, 0xF2D9, 0x86F9, 0xD3BC, 0x86FA, 0xCD90,
03842     0x86FB, 0xCD91, 0x86FC, 0xCD92, 0x86FD, 0xCD93, 0x86FE, 0xB6EA,
03843     0x86FF, 0xCD94, 0x8700, 0xCAF1, 0x8701, 0xCD95, 0x8702, 0xB7E4,
03844     0x8703, 0xF2D7, 0x8704, 0xCD96, 0x8705, 0xCD97, 0x8706, 0xCD98,
03845     0x8707, 0xF2D8, 0x8708, 0xF2DA, 0x8709, 0xF2DD, 0x870A, 0xF2DB,
03846     0x870B, 0xCD99, 0x870C, 0xCD9A, 0x870D, 0xF2DC, 0x870E, 0xCD9B,
03847     0x870F, 0xCD9C, 0x8710, 0xCD9D, 0x8711, 0xCD9E, 0x8712, 0xD1D1,
03848     0x8713, 0xF2D1, 0x8714, 0xCD9F, 0x8715, 0xCDC9, 0x8716, 0xCDA0,
03849     0x8717, 0xCECF, 0x8718, 0xD6A9, 0x8719, 0xCE40, 0x871A, 0xF2E3,
03850     0x871B, 0xCE41, 0x871C, 0xC3DB, 0x871D, 0xCE42, 0x871E, 0xF2E0,
03851     0x871F, 0xCE43, 0x8720, 0xCE44, 0x8721, 0xC0AF, 0x8722, 0xF2EC,
03852     0x8723, 0xF2DE, 0x8724, 0xCE45, 0x8725, 0xF2E1, 0x8726, 0xCE46,
03853     0x8727, 0xCE47, 0x8728, 0xCE48, 0x8729, 0xF2E8, 0x872A, 0xCE49,
03854     0x872B, 0xCE4A, 0x872C, 0xCE4B, 0x872D, 0xCE4C, 0x872E, 0xF2E2,
03855     0x872F, 0xCE4D, 0x8730, 0xCE4E, 0x8731, 0xF2E7, 0x8732, 0xCE4F,
03856     0x8733, 0xCE50, 0x8734, 0xF2E6, 0x8735, 0xCE51, 0x8736, 0xCE52,
03857     0x8737, 0xF2E9, 0x8738, 0xCE53, 0x8739, 0xCE54, 0x873A, 0xCE55,
03858     0x873B, 0xF2DF, 0x873C, 0xCE56, 0x873D, 0xCE57, 0x873E, 0xF2E4,
03859     0x873F, 0xF2EA, 0x8740, 0xCE58, 0x8741, 0xCE59, 0x8742, 0xCE5A,
03860     0x8743, 0xCE5B, 0x8744, 0xCE5C, 0x8745, 0xCE5D, 0x8746, 0xCE5E,
03861     0x8747, 0xD3AC, 0x8748, 0xF2E5, 0x8749, 0xB2F5, 0x874A, 0xCE5F,
03862     0x874B, 0xCE60, 0x874C, 0xF2F2, 0x874D, 0xCE61, 0x874E, 0xD0AB,
03863     0x874F, 0xCE62, 0x8750, 0xCE63, 0x8751, 0xCE64, 0x8752, 0xCE65,
03864     0x8753, 0xF2F5, 0x8754, 0xCE66, 0x8755, 0xCE67, 0x8756, 0xCE68,
03865     0x8757, 0xBBC8, 0x8758, 0xCE69, 0x8759, 0xF2F9, 0x875A, 0xCE6A,
03866     0x875B, 0xCE6B, 0x875C, 0xCE6C, 0x875D, 0xCE6D, 0x875E, 0xCE6E,
03867     0x875F, 0xCE6F, 0x8760, 0xF2F0, 0x8761, 0xCE70, 0x8762, 0xCE71,
03868     0x8763, 0xF2F6, 0x8764, 0xF2F8, 0x8765, 0xF2FA, 0x8766, 0xCE72,
03869     0x8767, 0xCE73, 0x8768, 0xCE74, 0x8769, 0xCE75, 0x876A, 0xCE76,
03870     0x876B, 0xCE77, 0x876C, 0xCE78, 0x876D, 0xCE79, 0x876E, 0xF2F3,
03871     0x876F, 0xCE7A, 0x8770, 0xF2F1, 0x8771, 0xCE7B, 0x8772, 0xCE7C,
03872     0x8773, 0xCE7D, 0x8774, 0xBAFB, 0x8775, 0xCE7E, 0x8776, 0xB5FB,
03873     0x8777, 0xCE80, 0x8778, 0xCE81, 0x8779, 0xCE82, 0x877A, 0xCE83,
03874     0x877B, 0xF2EF, 0x877C, 0xF2F7, 0x877D, 0xF2ED, 0x877E, 0xF2EE,
03875     0x877F, 0xCE84, 0x8780, 0xCE85, 0x8781, 0xCE86, 0x8782, 0xF2EB,
03876     0x8783, 0xF3A6, 0x8784, 0xCE87, 0x8785, 0xF3A3, 0x8786, 0xCE88,
03877     0x8787, 0xCE89, 0x8788, 0xF3A2, 0x8789, 0xCE8A, 0x878A, 0xCE8B,
03878     0x878B, 0xF2F4, 0x878C, 0xCE8C, 0x878D, 0xC8DA, 0x878E, 0xCE8D,
03879     0x878F, 0xCE8E, 0x8790, 0xCE8F, 0x8791, 0xCE90, 0x8792, 0xCE91,
03880     0x8793, 0xF2FB, 0x8794, 0xCE92, 0x8795, 0xCE93, 0x8796, 0xCE94,
03881     0x8797, 0xF3A5, 0x8798, 0xCE95, 0x8799, 0xCE96, 0x879A, 0xCE97,
03882     0x879B, 0xCE98, 0x879C, 0xCE99, 0x879D, 0xCE9A, 0x879E, 0xCE9B,
03883     0x879F, 0xC3F8, 0x87A0, 0xCE9C, 0x87A1, 0xCE9D, 0x87A2, 0xCE9E,
03884     0x87A3, 0xCE9F, 0x87A4, 0xCEA0, 0x87A5, 0xCF40, 0x87A6, 0xCF41,
03885     0x87A7, 0xCF42, 0x87A8, 0xF2FD, 0x87A9, 0xCF43, 0x87AA, 0xCF44,
03886     0x87AB, 0xF3A7, 0x87AC, 0xF3A9, 0x87AD, 0xF3A4, 0x87AE, 0xCF45,
03887     0x87AF, 0xF2FC, 0x87B0, 0xCF46, 0x87B1, 0xCF47, 0x87B2, 0xCF48,
03888     0x87B3, 0xF3AB, 0x87B4, 0xCF49, 0x87B5, 0xF3AA, 0x87B6, 0xCF4A,
03889     0x87B7, 0xCF4B, 0x87B8, 0xCF4C, 0x87B9, 0xCF4D, 0x87BA, 0xC2DD,
03890     0x87BB, 0xCF4E, 0x87BC, 0xCF4F, 0x87BD, 0xF3AE, 0x87BE, 0xCF50,
03891     0x87BF, 0xCF51, 0x87C0, 0xF3B0, 0x87C1, 0xCF52, 0x87C2, 0xCF53,
03892     0x87C3, 0xCF54, 0x87C4, 0xCF55, 0x87C5, 0xCF56, 0x87C6, 0xF3A1,
03893     0x87C7, 0xCF57, 0x87C8, 0xCF58, 0x87C9, 0xCF59, 0x87CA, 0xF3B1,
03894     0x87CB, 0xF3AC, 0x87CC, 0xCF5A, 0x87CD, 0xCF5B, 0x87CE, 0xCF5C,
03895     0x87CF, 0xCF5D, 0x87D0, 0xCF5E, 0x87D1, 0xF3AF, 0x87D2, 0xF2FE,
03896     0x87D3, 0xF3AD, 0x87D4, 0xCF5F, 0x87D5, 0xCF60, 0x87D6, 0xCF61,
03897     0x87D7, 0xCF62, 0x87D8, 0xCF63, 0x87D9, 0xCF64, 0x87DA, 0xCF65,
03898     0x87DB, 0xF3B2, 0x87DC, 0xCF66, 0x87DD, 0xCF67, 0x87DE, 0xCF68,
03899     0x87DF, 0xCF69, 0x87E0, 0xF3B4, 0x87E1, 0xCF6A, 0x87E2, 0xCF6B,
03900     0x87E3, 0xCF6C, 0x87E4, 0xCF6D, 0x87E5, 0xF3A8, 0x87E6, 0xCF6E,
03901     0x87E7, 0xCF6F, 0x87E8, 0xCF70, 0x87E9, 0xCF71, 0x87EA, 0xF3B3,
03902     0x87EB, 0xCF72, 0x87EC, 0xCF73, 0x87ED, 0xCF74, 0x87EE, 0xF3B5,
03903     0x87EF, 0xCF75, 0x87F0, 0xCF76, 0x87F1, 0xCF77, 0x87F2, 0xCF78,
03904     0x87F3, 0xCF79, 0x87F4, 0xCF7A, 0x87F5, 0xCF7B, 0x87F6, 0xCF7C,
03905     0x87F7, 0xCF7D, 0x87F8, 0xCF7E, 0x87F9, 0xD0B7, 0x87FA, 0xCF80,
03906     0x87FB, 0xCF81, 0x87FC, 0xCF82, 0x87FD, 0xCF83, 0x87FE, 0xF3B8,
03907     0x87FF, 0xCF84, 0x8800, 0xCF85, 0x8801, 0xCF86, 0x8802, 0xCF87,
03908     0x8803, 0xD9F9, 0x8804, 0xCF88, 0x8805, 0xCF89, 0x8806, 0xCF8A,
03909     0x8807, 0xCF8B, 0x8808, 0xCF8C, 0x8809, 0xCF8D, 0x880A, 0xF3B9,
03910     0x880B, 0xCF8E, 0x880C, 0xCF8F, 0x880D, 0xCF90, 0x880E, 0xCF91,
03911     0x880F, 0xCF92, 0x8810, 0xCF93, 0x8811, 0xCF94, 0x8812, 0xCF95,
03912     0x8813, 0xF3B7, 0x8814, 0xCF96, 0x8815, 0xC8E4, 0x8816, 0xF3B6,
03913     0x8817, 0xCF97, 0x8818, 0xCF98, 0x8819, 0xCF99, 0x881A, 0xCF9A,
03914     0x881B, 0xF3BA, 0x881C, 0xCF9B, 0x881D, 0xCF9C, 0x881E, 0xCF9D,
03915     0x881F, 0xCF9E, 0x8820, 0xCF9F, 0x8821, 0xF3BB, 0x8822, 0xB4C0,
03916     0x8823, 0xCFA0, 0x8824, 0xD040, 0x8825, 0xD041, 0x8826, 0xD042,
03917     0x8827, 0xD043, 0x8828, 0xD044, 0x8829, 0xD045, 0x882A, 0xD046,
03918     0x882B, 0xD047, 0x882C, 0xD048, 0x882D, 0xD049, 0x882E, 0xD04A,
03919     0x882F, 0xD04B, 0x8830, 0xD04C, 0x8831, 0xD04D, 0x8832, 0xEEC3,
03920     0x8833, 0xD04E, 0x8834, 0xD04F, 0x8835, 0xD050, 0x8836, 0xD051,
03921     0x8837, 0xD052, 0x8838, 0xD053, 0x8839, 0xF3BC, 0x883A, 0xD054,
03922     0x883B, 0xD055, 0x883C, 0xF3BD, 0x883D, 0xD056, 0x883E, 0xD057,
03923     0x883F, 0xD058, 0x8840, 0xD1AA, 0x8841, 0xD059, 0x8842, 0xD05A,
03924     0x8843, 0xD05B, 0x8844, 0xF4AC, 0x8845, 0xD0C6, 0x8846, 0xD05C,
03925     0x8847, 0xD05D, 0x8848, 0xD05E, 0x8849, 0xD05F, 0x884A, 0xD060,
03926     0x884B, 0xD061, 0x884C, 0xD0D0, 0x884D, 0xD1DC, 0x884E, 0xD062,
03927     0x884F, 0xD063, 0x8850, 0xD064, 0x8851, 0xD065, 0x8852, 0xD066,
03928     0x8853, 0xD067, 0x8854, 0xCFCE, 0x8855, 0xD068, 0x8856, 0xD069,
03929     0x8857, 0xBDD6, 0x8858, 0xD06A, 0x8859, 0xD1C3, 0x885A, 0xD06B,
03930     0x885B, 0xD06C, 0x885C, 0xD06D, 0x885D, 0xD06E, 0x885E, 0xD06F,
03931     0x885F, 0xD070, 0x8860, 0xD071, 0x8861, 0xBAE2, 0x8862, 0xE1E9,
03932     0x8863, 0xD2C2, 0x8864, 0xF1C2, 0x8865, 0xB2B9, 0x8866, 0xD072,
03933     0x8867, 0xD073, 0x8868, 0xB1ED, 0x8869, 0xF1C3, 0x886A, 0xD074,
03934     0x886B, 0xC9C0, 0x886C, 0xB3C4, 0x886D, 0xD075, 0x886E, 0xD9F2,
03935     0x886F, 0xD076, 0x8870, 0xCBA5, 0x8871, 0xD077, 0x8872, 0xF1C4,
03936     0x8873, 0xD078, 0x8874, 0xD079, 0x8875, 0xD07A, 0x8876, 0xD07B,
03937     0x8877, 0xD6D4, 0x8878, 0xD07C, 0x8879, 0xD07D, 0x887A, 0xD07E,
03938     0x887B, 0xD080, 0x887C, 0xD081, 0x887D, 0xF1C5, 0x887E, 0xF4C0,
03939     0x887F, 0xF1C6, 0x8880, 0xD082, 0x8881, 0xD4AC, 0x8882, 0xF1C7,
03940     0x8883, 0xD083, 0x8884, 0xB0C0, 0x8885, 0xF4C1, 0x8886, 0xD084,
03941     0x8887, 0xD085, 0x8888, 0xF4C2, 0x8889, 0xD086, 0x888A, 0xD087,
03942     0x888B, 0xB4FC, 0x888C, 0xD088, 0x888D, 0xC5DB, 0x888E, 0xD089,
03943     0x888F, 0xD08A, 0x8890, 0xD08B, 0x8891, 0xD08C, 0x8892, 0xCCBB,
03944     0x8893, 0xD08D, 0x8894, 0xD08E, 0x8895, 0xD08F, 0x8896, 0xD0E4,
03945     0x8897, 0xD090, 0x8898, 0xD091, 0x8899, 0xD092, 0x889A, 0xD093,
03946     0x889B, 0xD094, 0x889C, 0xCDE0, 0x889D, 0xD095, 0x889E, 0xD096,
03947     0x889F, 0xD097, 0x88A0, 0xD098, 0x88A1, 0xD099, 0x88A2, 0xF1C8,
03948     0x88A3, 0xD09A, 0x88A4, 0xD9F3, 0x88A5, 0xD09B, 0x88A6, 0xD09C,
03949     0x88A7, 0xD09D, 0x88A8, 0xD09E, 0x88A9, 0xD09F, 0x88AA, 0xD0A0,
03950     0x88AB, 0xB1BB, 0x88AC, 0xD140, 0x88AD, 0xCFAE, 0x88AE, 0xD141,
03951     0x88AF, 0xD142, 0x88B0, 0xD143, 0x88B1, 0xB8A4, 0x88B2, 0xD144,
03952     0x88B3, 0xD145, 0x88B4, 0xD146, 0x88B5, 0xD147, 0x88B6, 0xD148,
03953     0x88B7, 0xF1CA, 0x88B8, 0xD149, 0x88B9, 0xD14A, 0x88BA, 0xD14B,
03954     0x88BB, 0xD14C, 0x88BC, 0xF1CB, 0x88BD, 0xD14D, 0x88BE, 0xD14E,
03955     0x88BF, 0xD14F, 0x88C0, 0xD150, 0x88C1, 0xB2C3, 0x88C2, 0xC1D1,
03956     0x88C3, 0xD151, 0x88C4, 0xD152, 0x88C5, 0xD7B0, 0x88C6, 0xF1C9,
03957     0x88C7, 0xD153, 0x88C8, 0xD154, 0x88C9, 0xF1CC, 0x88CA, 0xD155,
03958     0x88CB, 0xD156, 0x88CC, 0xD157, 0x88CD, 0xD158, 0x88CE, 0xF1CE,
03959     0x88CF, 0xD159, 0x88D0, 0xD15A, 0x88D1, 0xD15B, 0x88D2, 0xD9F6,
03960     0x88D3, 0xD15C, 0x88D4, 0xD2E1, 0x88D5, 0xD4A3, 0x88D6, 0xD15D,
03961     0x88D7, 0xD15E, 0x88D8, 0xF4C3, 0x88D9, 0xC8B9, 0x88DA, 0xD15F,
03962     0x88DB, 0xD160, 0x88DC, 0xD161, 0x88DD, 0xD162, 0x88DE, 0xD163,
03963     0x88DF, 0xF4C4, 0x88E0, 0xD164, 0x88E1, 0xD165, 0x88E2, 0xF1CD,
03964     0x88E3, 0xF1CF, 0x88E4, 0xBFE3, 0x88E5, 0xF1D0, 0x88E6, 0xD166,
03965     0x88E7, 0xD167, 0x88E8, 0xF1D4, 0x88E9, 0xD168, 0x88EA, 0xD169,
03966     0x88EB, 0xD16A, 0x88EC, 0xD16B, 0x88ED, 0xD16C, 0x88EE, 0xD16D,
03967     0x88EF, 0xD16E, 0x88F0, 0xF1D6, 0x88F1, 0xF1D1, 0x88F2, 0xD16F,
03968     0x88F3, 0xC9D1, 0x88F4, 0xC5E1, 0x88F5, 0xD170, 0x88F6, 0xD171,
03969     0x88F7, 0xD172, 0x88F8, 0xC2E3, 0x88F9, 0xB9FC, 0x88FA, 0xD173,
03970     0x88FB, 0xD174, 0x88FC, 0xF1D3, 0x88FD, 0xD175, 0x88FE, 0xF1D5,
03971     0x88FF, 0xD176, 0x8900, 0xD177, 0x8901, 0xD178, 0x8902, 0xB9D3,
03972     0x8903, 0xD179, 0x8904, 0xD17A, 0x8905, 0xD17B, 0x8906, 0xD17C,
03973     0x8907, 0xD17D, 0x8908, 0xD17E, 0x8909, 0xD180, 0x890A, 0xF1DB,
03974     0x890B, 0xD181, 0x890C, 0xD182, 0x890D, 0xD183, 0x890E, 0xD184,
03975     0x890F, 0xD185, 0x8910, 0xBAD6, 0x8911, 0xD186, 0x8912, 0xB0FD,
03976     0x8913, 0xF1D9, 0x8914, 0xD187, 0x8915, 0xD188, 0x8916, 0xD189,
03977     0x8917, 0xD18A, 0x8918, 0xD18B, 0x8919, 0xF1D8, 0x891A, 0xF1D2,
03978     0x891B, 0xF1DA, 0x891C, 0xD18C, 0x891D, 0xD18D, 0x891E, 0xD18E,
03979     0x891F, 0xD18F, 0x8920, 0xD190, 0x8921, 0xF1D7, 0x8922, 0xD191,
03980     0x8923, 0xD192, 0x8924, 0xD193, 0x8925, 0xC8EC, 0x8926, 0xD194,
03981     0x8927, 0xD195, 0x8928, 0xD196, 0x8929, 0xD197, 0x892A, 0xCDCA,
03982     0x892B, 0xF1DD, 0x892C, 0xD198, 0x892D, 0xD199, 0x892E, 0xD19A,
03983     0x892F, 0xD19B, 0x8930, 0xE5BD, 0x8931, 0xD19C, 0x8932, 0xD19D,
03984     0x8933, 0xD19E, 0x8934, 0xF1DC, 0x8935, 0xD19F, 0x8936, 0xF1DE,
03985     0x8937, 0xD1A0, 0x8938, 0xD240, 0x8939, 0xD241, 0x893A, 0xD242,
03986     0x893B, 0xD243, 0x893C, 0xD244, 0x893D, 0xD245, 0x893E, 0xD246,
03987     0x893F, 0xD247, 0x8940, 0xD248, 0x8941, 0xF1DF, 0x8942, 0xD249,
03988     0x8943, 0xD24A, 0x8944, 0xCFE5, 0x8945, 0xD24B, 0x8946, 0xD24C,
03989     0x8947, 0xD24D, 0x8948, 0xD24E, 0x8949, 0xD24F, 0x894A, 0xD250,
03990     0x894B, 0xD251, 0x894C, 0xD252, 0x894D, 0xD253, 0x894E, 0xD254,
03991     0x894F, 0xD255, 0x8950, 0xD256, 0x8951, 0xD257, 0x8952, 0xD258,
03992     0x8953, 0xD259, 0x8954, 0xD25A, 0x8955, 0xD25B, 0x8956, 0xD25C,
03993     0x8957, 0xD25D, 0x8958, 0xD25E, 0x8959, 0xD25F, 0x895A, 0xD260,
03994     0x895B, 0xD261, 0x895C, 0xD262, 0x895D, 0xD263, 0x895E, 0xF4C5,
03995     0x895F, 0xBDF3, 0x8960, 0xD264, 0x8961, 0xD265, 0x8962, 0xD266,
03996     0x8963, 0xD267, 0x8964, 0xD268, 0x8965, 0xD269, 0x8966, 0xF1E0,
03997     0x8967, 0xD26A, 0x8968, 0xD26B, 0x8969, 0xD26C, 0x896A, 0xD26D,
03998     0x896B, 0xD26E, 0x896C, 0xD26F, 0x896D, 0xD270, 0x896E, 0xD271,
03999     0x896F, 0xD272, 0x8970, 0xD273, 0x8971, 0xD274, 0x8972, 0xD275,
04000     0x8973, 0xD276, 0x8974, 0xD277, 0x8975, 0xD278, 0x8976, 0xD279,
04001     0x8977, 0xD27A, 0x8978, 0xD27B, 0x8979, 0xD27C, 0x897A, 0xD27D,
04002     0x897B, 0xF1E1, 0x897C, 0xD27E, 0x897D, 0xD280, 0x897E, 0xD281,
04003     0x897F, 0xCEF7, 0x8980, 0xD282, 0x8981, 0xD2AA, 0x8982, 0xD283,
04004     0x8983, 0xF1FB, 0x8984, 0xD284, 0x8985, 0xD285, 0x8986, 0xB8B2,
04005     0x8987, 0xD286, 0x8988, 0xD287, 0x8989, 0xD288, 0x898A, 0xD289,
04006     0x898B, 0xD28A, 0x898C, 0xD28B, 0x898D, 0xD28C, 0x898E, 0xD28D,
04007     0x898F, 0xD28E, 0x8990, 0xD28F, 0x8991, 0xD290, 0x8992, 0xD291,
04008     0x8993, 0xD292, 0x8994, 0xD293, 0x8995, 0xD294, 0x8996, 0xD295,
04009     0x8997, 0xD296, 0x8998, 0xD297, 0x8999, 0xD298, 0x899A, 0xD299,
04010     0x899B, 0xD29A, 0x899C, 0xD29B, 0x899D, 0xD29C, 0x899E, 0xD29D,
04011     0x899F, 0xD29E, 0x89A0, 0xD29F, 0x89A1, 0xD2A0, 0x89A2, 0xD340,
04012     0x89A3, 0xD341, 0x89A4, 0xD342, 0x89A5, 0xD343, 0x89A6, 0xD344,
04013     0x89A7, 0xD345, 0x89A8, 0xD346, 0x89A9, 0xD347, 0x89AA, 0xD348,
04014     0x89AB, 0xD349, 0x89AC, 0xD34A, 0x89AD, 0xD34B, 0x89AE, 0xD34C,
04015     0x89AF, 0xD34D, 0x89B0, 0xD34E, 0x89B1, 0xD34F, 0x89B2, 0xD350,
04016     0x89B3, 0xD351, 0x89B4, 0xD352, 0x89B5, 0xD353, 0x89B6, 0xD354,
04017     0x89B7, 0xD355, 0x89B8, 0xD356, 0x89B9, 0xD357, 0x89BA, 0xD358,
04018     0x89BB, 0xD359, 0x89BC, 0xD35A, 0x89BD, 0xD35B, 0x89BE, 0xD35C,
04019     0x89BF, 0xD35D, 0x89C0, 0xD35E, 0x89C1, 0xBCFB, 0x89C2, 0xB9DB,
04020     0x89C3, 0xD35F, 0x89C4, 0xB9E6, 0x89C5, 0xC3D9, 0x89C6, 0xCAD3,
04021     0x89C7, 0xEAE8, 0x89C8, 0xC0C0, 0x89C9, 0xBEF5, 0x89CA, 0xEAE9,
04022     0x89CB, 0xEAEA, 0x89CC, 0xEAEB, 0x89CD, 0xD360, 0x89CE, 0xEAEC,
04023     0x89CF, 0xEAED, 0x89D0, 0xEAEE, 0x89D1, 0xEAEF, 0x89D2, 0xBDC7,
04024     0x89D3, 0xD361, 0x89D4, 0xD362, 0x89D5, 0xD363, 0x89D6, 0xF5FB,
04025     0x89D7, 0xD364, 0x89D8, 0xD365, 0x89D9, 0xD366, 0x89DA, 0xF5FD,
04026     0x89DB, 0xD367, 0x89DC, 0xF5FE, 0x89DD, 0xD368, 0x89DE, 0xF5FC,
04027     0x89DF, 0xD369, 0x89E0, 0xD36A, 0x89E1, 0xD36B, 0x89E2, 0xD36C,
04028     0x89E3, 0xBDE2, 0x89E4, 0xD36D, 0x89E5, 0xF6A1, 0x89E6, 0xB4A5,
04029     0x89E7, 0xD36E, 0x89E8, 0xD36F, 0x89E9, 0xD370, 0x89EA, 0xD371,
04030     0x89EB, 0xF6A2, 0x89EC, 0xD372, 0x89ED, 0xD373, 0x89EE, 0xD374,
04031     0x89EF, 0xF6A3, 0x89F0, 0xD375, 0x89F1, 0xD376, 0x89F2, 0xD377,
04032     0x89F3, 0xECB2, 0x89F4, 0xD378, 0x89F5, 0xD379, 0x89F6, 0xD37A,
04033     0x89F7, 0xD37B, 0x89F8, 0xD37C, 0x89F9, 0xD37D, 0x89FA, 0xD37E,
04034     0x89FB, 0xD380, 0x89FC, 0xD381, 0x89FD, 0xD382, 0x89FE, 0xD383,
04035     0x89FF, 0xD384, 0x8A00, 0xD1D4, 0x8A01, 0xD385, 0x8A02, 0xD386,
04036     0x8A03, 0xD387, 0x8A04, 0xD388, 0x8A05, 0xD389, 0x8A06, 0xD38A,
04037     0x8A07, 0xD9EA, 0x8A08, 0xD38B, 0x8A09, 0xD38C, 0x8A0A, 0xD38D,
04038     0x8A0B, 0xD38E, 0x8A0C, 0xD38F, 0x8A0D, 0xD390, 0x8A0E, 0xD391,
04039     0x8A0F, 0xD392, 0x8A10, 0xD393, 0x8A11, 0xD394, 0x8A12, 0xD395,
04040     0x8A13, 0xD396, 0x8A14, 0xD397, 0x8A15, 0xD398, 0x8A16, 0xD399,
04041     0x8A17, 0xD39A, 0x8A18, 0xD39B, 0x8A19, 0xD39C, 0x8A1A, 0xD39D,
04042     0x8A1B, 0xD39E, 0x8A1C, 0xD39F, 0x8A1D, 0xD3A0, 0x8A1E, 0xD440,
04043     0x8A1F, 0xD441, 0x8A20, 0xD442, 0x8A21, 0xD443, 0x8A22, 0xD444,
04044     0x8A23, 0xD445, 0x8A24, 0xD446, 0x8A25, 0xD447, 0x8A26, 0xD448,
04045     0x8A27, 0xD449, 0x8A28, 0xD44A, 0x8A29, 0xD44B, 0x8A2A, 0xD44C,
04046     0x8A2B, 0xD44D, 0x8A2C, 0xD44E, 0x8A2D, 0xD44F, 0x8A2E, 0xD450,
04047     0x8A2F, 0xD451, 0x8A30, 0xD452, 0x8A31, 0xD453, 0x8A32, 0xD454,
04048     0x8A33, 0xD455, 0x8A34, 0xD456, 0x8A35, 0xD457, 0x8A36, 0xD458,
04049     0x8A37, 0xD459, 0x8A38, 0xD45A, 0x8A39, 0xD45B, 0x8A3A, 0xD45C,
04050     0x8A3B, 0xD45D, 0x8A3C, 0xD45E, 0x8A3D, 0xD45F, 0x8A3E, 0xF6A4,
04051     0x8A3F, 0xD460, 0x8A40, 0xD461, 0x8A41, 0xD462, 0x8A42, 0xD463,
04052     0x8A43, 0xD464, 0x8A44, 0xD465, 0x8A45, 0xD466, 0x8A46, 0xD467,
04053     0x8A47, 0xD468, 0x8A48, 0xEEBA, 0x8A49, 0xD469, 0x8A4A, 0xD46A,
04054     0x8A4B, 0xD46B, 0x8A4C, 0xD46C, 0x8A4D, 0xD46D, 0x8A4E, 0xD46E,
04055     0x8A4F, 0xD46F, 0x8A50, 0xD470, 0x8A51, 0xD471, 0x8A52, 0xD472,
04056     0x8A53, 0xD473, 0x8A54, 0xD474, 0x8A55, 0xD475, 0x8A56, 0xD476,
04057     0x8A57, 0xD477, 0x8A58, 0xD478, 0x8A59, 0xD479, 0x8A5A, 0xD47A,
04058     0x8A5B, 0xD47B, 0x8A5C, 0xD47C, 0x8A5D, 0xD47D, 0x8A5E, 0xD47E,
04059     0x8A5F, 0xD480, 0x8A60, 0xD481, 0x8A61, 0xD482, 0x8A62, 0xD483,
04060     0x8A63, 0xD484, 0x8A64, 0xD485, 0x8A65, 0xD486, 0x8A66, 0xD487,
04061     0x8A67, 0xD488, 0x8A68, 0xD489, 0x8A69, 0xD48A, 0x8A6A, 0xD48B,
04062     0x8A6B, 0xD48C, 0x8A6C, 0xD48D, 0x8A6D, 0xD48E, 0x8A6E, 0xD48F,
04063     0x8A6F, 0xD490, 0x8A70, 0xD491, 0x8A71, 0xD492, 0x8A72, 0xD493,
04064     0x8A73, 0xD494, 0x8A74, 0xD495, 0x8A75, 0xD496, 0x8A76, 0xD497,
04065     0x8A77, 0xD498, 0x8A78, 0xD499, 0x8A79, 0xD5B2, 0x8A7A, 0xD49A,
04066     0x8A7B, 0xD49B, 0x8A7C, 0xD49C, 0x8A7D, 0xD49D, 0x8A7E, 0xD49E,
04067     0x8A7F, 0xD49F, 0x8A80, 0xD4A0, 0x8A81, 0xD540, 0x8A82, 0xD541,
04068     0x8A83, 0xD542, 0x8A84, 0xD543, 0x8A85, 0xD544, 0x8A86, 0xD545,
04069     0x8A87, 0xD546, 0x8A88, 0xD547, 0x8A89, 0xD3FE, 0x8A8A, 0xCCDC,
04070     0x8A8B, 0xD548, 0x8A8C, 0xD549, 0x8A8D, 0xD54A, 0x8A8E, 0xD54B,
04071     0x8A8F, 0xD54C, 0x8A90, 0xD54D, 0x8A91, 0xD54E, 0x8A92, 0xD54F,
04072     0x8A93, 0xCAC4, 0x8A94, 0xD550, 0x8A95, 0xD551, 0x8A96, 0xD552,
04073     0x8A97, 0xD553, 0x8A98, 0xD554, 0x8A99, 0xD555, 0x8A9A, 0xD556,
04074     0x8A9B, 0xD557, 0x8A9C, 0xD558, 0x8A9D, 0xD559, 0x8A9E, 0xD55A,
04075     0x8A9F, 0xD55B, 0x8AA0, 0xD55C, 0x8AA1, 0xD55D, 0x8AA2, 0xD55E,
04076     0x8AA3, 0xD55F, 0x8AA4, 0xD560, 0x8AA5, 0xD561, 0x8AA6, 0xD562,
04077     0x8AA7, 0xD563, 0x8AA8, 0xD564, 0x8AA9, 0xD565, 0x8AAA, 0xD566,
04078     0x8AAB, 0xD567, 0x8AAC, 0xD568, 0x8AAD, 0xD569, 0x8AAE, 0xD56A,
04079     0x8AAF, 0xD56B, 0x8AB0, 0xD56C, 0x8AB1, 0xD56D, 0x8AB2, 0xD56E,
04080     0x8AB3, 0xD56F, 0x8AB4, 0xD570, 0x8AB5, 0xD571, 0x8AB6, 0xD572,
04081     0x8AB7, 0xD573, 0x8AB8, 0xD574, 0x8AB9, 0xD575, 0x8ABA, 0xD576,
04082     0x8ABB, 0xD577, 0x8ABC, 0xD578, 0x8ABD, 0xD579, 0x8ABE, 0xD57A,
04083     0x8ABF, 0xD57B, 0x8AC0, 0xD57C, 0x8AC1, 0xD57D, 0x8AC2, 0xD57E,
04084     0x8AC3, 0xD580, 0x8AC4, 0xD581, 0x8AC5, 0xD582, 0x8AC6, 0xD583,
04085     0x8AC7, 0xD584, 0x8AC8, 0xD585, 0x8AC9, 0xD586, 0x8ACA, 0xD587,
04086     0x8ACB, 0xD588, 0x8ACC, 0xD589, 0x8ACD, 0xD58A, 0x8ACE, 0xD58B,
04087     0x8ACF, 0xD58C, 0x8AD0, 0xD58D, 0x8AD1, 0xD58E, 0x8AD2, 0xD58F,
04088     0x8AD3, 0xD590, 0x8AD4, 0xD591, 0x8AD5, 0xD592, 0x8AD6, 0xD593,
04089     0x8AD7, 0xD594, 0x8AD8, 0xD595, 0x8AD9, 0xD596, 0x8ADA, 0xD597,
04090     0x8ADB, 0xD598, 0x8ADC, 0xD599, 0x8ADD, 0xD59A, 0x8ADE, 0xD59B,
04091     0x8ADF, 0xD59C, 0x8AE0, 0xD59D, 0x8AE1, 0xD59E, 0x8AE2, 0xD59F,
04092     0x8AE3, 0xD5A0, 0x8AE4, 0xD640, 0x8AE5, 0xD641, 0x8AE6, 0xD642,
04093     0x8AE7, 0xD643, 0x8AE8, 0xD644, 0x8AE9, 0xD645, 0x8AEA, 0xD646,
04094     0x8AEB, 0xD647, 0x8AEC, 0xD648, 0x8AED, 0xD649, 0x8AEE, 0xD64A,
04095     0x8AEF, 0xD64B, 0x8AF0, 0xD64C, 0x8AF1, 0xD64D, 0x8AF2, 0xD64E,
04096     0x8AF3, 0xD64F, 0x8AF4, 0xD650, 0x8AF5, 0xD651, 0x8AF6, 0xD652,
04097     0x8AF7, 0xD653, 0x8AF8, 0xD654, 0x8AF9, 0xD655, 0x8AFA, 0xD656,
04098     0x8AFB, 0xD657, 0x8AFC, 0xD658, 0x8AFD, 0xD659, 0x8AFE, 0xD65A,
04099     0x8AFF, 0xD65B, 0x8B00, 0xD65C, 0x8B01, 0xD65D, 0x8B02, 0xD65E,
04100     0x8B03, 0xD65F, 0x8B04, 0xD660, 0x8B05, 0xD661, 0x8B06, 0xD662,
04101     0x8B07, 0xE5C0, 0x8B08, 0xD663, 0x8B09, 0xD664, 0x8B0A, 0xD665,
04102     0x8B0B, 0xD666, 0x8B0C, 0xD667, 0x8B0D, 0xD668, 0x8B0E, 0xD669,
04103     0x8B0F, 0xD66A, 0x8B10, 0xD66B, 0x8B11, 0xD66C, 0x8B12, 0xD66D,
04104     0x8B13, 0xD66E, 0x8B14, 0xD66F, 0x8B15, 0xD670, 0x8B16, 0xD671,
04105     0x8B17, 0xD672, 0x8B18, 0xD673, 0x8B19, 0xD674, 0x8B1A, 0xD675,
04106     0x8B1B, 0xD676, 0x8B1C, 0xD677, 0x8B1D, 0xD678, 0x8B1E, 0xD679,
04107     0x8B1F, 0xD67A, 0x8B20, 0xD67B, 0x8B21, 0xD67C, 0x8B22, 0xD67D,
04108     0x8B23, 0xD67E, 0x8B24, 0xD680, 0x8B25, 0xD681, 0x8B26, 0xF6A5,
04109     0x8B27, 0xD682, 0x8B28, 0xD683, 0x8B29, 0xD684, 0x8B2A, 0xD685,
04110     0x8B2B, 0xD686, 0x8B2C, 0xD687, 0x8B2D, 0xD688, 0x8B2E, 0xD689,
04111     0x8B2F, 0xD68A, 0x8B30, 0xD68B, 0x8B31, 0xD68C, 0x8B32, 0xD68D,
04112     0x8B33, 0xD68E, 0x8B34, 0xD68F, 0x8B35, 0xD690, 0x8B36, 0xD691,
04113     0x8B37, 0xD692, 0x8B38, 0xD693, 0x8B39, 0xD694, 0x8B3A, 0xD695,
04114     0x8B3B, 0xD696, 0x8B3C, 0xD697, 0x8B3D, 0xD698, 0x8B3E, 0xD699,
04115     0x8B3F, 0xD69A, 0x8B40, 0xD69B, 0x8B41, 0xD69C, 0x8B42, 0xD69D,
04116     0x8B43, 0xD69E, 0x8B44, 0xD69F, 0x8B45, 0xD6A0, 0x8B46, 0xD740,
04117     0x8B47, 0xD741, 0x8B48, 0xD742, 0x8B49, 0xD743, 0x8B4A, 0xD744,
04118     0x8B4B, 0xD745, 0x8B4C, 0xD746, 0x8B4D, 0xD747, 0x8B4E, 0xD748,
04119     0x8B4F, 0xD749, 0x8B50, 0xD74A, 0x8B51, 0xD74B, 0x8B52, 0xD74C,
04120     0x8B53, 0xD74D, 0x8B54, 0xD74E, 0x8B55, 0xD74F, 0x8B56, 0xD750,
04121     0x8B57, 0xD751, 0x8B58, 0xD752, 0x8B59, 0xD753, 0x8B5A, 0xD754,
04122     0x8B5B, 0xD755, 0x8B5C, 0xD756, 0x8B5D, 0xD757, 0x8B5E, 0xD758,
04123     0x8B5F, 0xD759, 0x8B60, 0xD75A, 0x8B61, 0xD75B, 0x8B62, 0xD75C,
04124     0x8B63, 0xD75D, 0x8B64, 0xD75E, 0x8B65, 0xD75F, 0x8B66, 0xBEAF,
04125     0x8B67, 0xD760, 0x8B68, 0xD761, 0x8B69, 0xD762, 0x8B6A, 0xD763,
04126     0x8B6B, 0xD764, 0x8B6C, 0xC6A9, 0x8B6D, 0xD765, 0x8B6E, 0xD766,
04127     0x8B6F, 0xD767, 0x8B70, 0xD768, 0x8B71, 0xD769, 0x8B72, 0xD76A,
04128     0x8B73, 0xD76B, 0x8B74, 0xD76C, 0x8B75, 0xD76D, 0x8B76, 0xD76E,
04129     0x8B77, 0xD76F, 0x8B78, 0xD770, 0x8B79, 0xD771, 0x8B7A, 0xD772,
04130     0x8B7B, 0xD773, 0x8B7C, 0xD774, 0x8B7D, 0xD775, 0x8B7E, 0xD776,
04131     0x8B7F, 0xD777, 0x8B80, 0xD778, 0x8B81, 0xD779, 0x8B82, 0xD77A,
04132     0x8B83, 0xD77B, 0x8B84, 0xD77C, 0x8B85, 0xD77D, 0x8B86, 0xD77E,
04133     0x8B87, 0xD780, 0x8B88, 0xD781, 0x8B89, 0xD782, 0x8B8A, 0xD783,
04134     0x8B8B, 0xD784, 0x8B8C, 0xD785, 0x8B8D, 0xD786, 0x8B8E, 0xD787,
04135     0x8B8F, 0xD788, 0x8B90, 0xD789, 0x8B91, 0xD78A, 0x8B92, 0xD78B,
04136     0x8B93, 0xD78C, 0x8B94, 0xD78D, 0x8B95, 0xD78E, 0x8B96, 0xD78F,
04137     0x8B97, 0xD790, 0x8B98, 0xD791, 0x8B99, 0xD792, 0x8B9A, 0xD793,
04138     0x8B9B, 0xD794, 0x8B9C, 0xD795, 0x8B9D, 0xD796, 0x8B9E, 0xD797,
04139     0x8B9F, 0xD798, 0x8BA0, 0xDAA5, 0x8BA1, 0xBCC6, 0x8BA2, 0xB6A9,
04140     0x8BA3, 0xB8BC, 0x8BA4, 0xC8CF, 0x8BA5, 0xBCA5, 0x8BA6, 0xDAA6,
04141     0x8BA7, 0xDAA7, 0x8BA8, 0xCCD6, 0x8BA9, 0xC8C3, 0x8BAA, 0xDAA8,
04142     0x8BAB, 0xC6FD, 0x8BAC, 0xD799, 0x8BAD, 0xD1B5, 0x8BAE, 0xD2E9,
04143     0x8BAF, 0xD1B6, 0x8BB0, 0xBCC7, 0x8BB1, 0xD79A, 0x8BB2, 0xBDB2,
04144     0x8BB3, 0xBBE4, 0x8BB4, 0xDAA9, 0x8BB5, 0xDAAA, 0x8BB6, 0xD1C8,
04145     0x8BB7, 0xDAAB, 0x8BB8, 0xD0ED, 0x8BB9, 0xB6EF, 0x8BBA, 0xC2DB,
04146     0x8BBB, 0xD79B, 0x8BBC, 0xCBCF, 0x8BBD, 0xB7ED, 0x8BBE, 0xC9E8,
04147     0x8BBF, 0xB7C3, 0x8BC0, 0xBEF7, 0x8BC1, 0xD6A4, 0x8BC2, 0xDAAC,
04148     0x8BC3, 0xDAAD, 0x8BC4, 0xC6C0, 0x8BC5, 0xD7E7, 0x8BC6, 0xCAB6,
04149     0x8BC7, 0xD79C, 0x8BC8, 0xD5A9, 0x8BC9, 0xCBDF, 0x8BCA, 0xD5EF,
04150     0x8BCB, 0xDAAE, 0x8BCC, 0xD6DF, 0x8BCD, 0xB4CA, 0x8BCE, 0xDAB0,
04151     0x8BCF, 0xDAAF, 0x8BD0, 0xD79D, 0x8BD1, 0xD2EB, 0x8BD2, 0xDAB1,
04152     0x8BD3, 0xDAB2, 0x8BD4, 0xDAB3, 0x8BD5, 0xCAD4, 0x8BD6, 0xDAB4,
04153     0x8BD7, 0xCAAB, 0x8BD8, 0xDAB5, 0x8BD9, 0xDAB6, 0x8BDA, 0xB3CF,
04154     0x8BDB, 0xD6EF, 0x8BDC, 0xDAB7, 0x8BDD, 0xBBB0, 0x8BDE, 0xB5AE,
04155     0x8BDF, 0xDAB8, 0x8BE0, 0xDAB9, 0x8BE1, 0xB9EE, 0x8BE2, 0xD1AF,
04156     0x8BE3, 0xD2E8, 0x8BE4, 0xDABA, 0x8BE5, 0xB8C3, 0x8BE6, 0xCFEA,
04157     0x8BE7, 0xB2EF, 0x8BE8, 0xDABB, 0x8BE9, 0xDABC, 0x8BEA, 0xD79E,
04158     0x8BEB, 0xBDEB, 0x8BEC, 0xCEDC, 0x8BED, 0xD3EF, 0x8BEE, 0xDABD,
04159     0x8BEF, 0xCEF3, 0x8BF0, 0xDABE, 0x8BF1, 0xD3D5, 0x8BF2, 0xBBE5,
04160     0x8BF3, 0xDABF, 0x8BF4, 0xCBB5, 0x8BF5, 0xCBD0, 0x8BF6, 0xDAC0,
04161     0x8BF7, 0xC7EB, 0x8BF8, 0xD6EE, 0x8BF9, 0xDAC1, 0x8BFA, 0xC5B5,
04162     0x8BFB, 0xB6C1, 0x8BFC, 0xDAC2, 0x8BFD, 0xB7CC, 0x8BFE, 0xBFCE,
04163     0x8BFF, 0xDAC3, 0x8C00, 0xDAC4, 0x8C01, 0xCBAD, 0x8C02, 0xDAC5,
04164     0x8C03, 0xB5F7, 0x8C04, 0xDAC6, 0x8C05, 0xC1C2, 0x8C06, 0xD7BB,
04165     0x8C07, 0xDAC7, 0x8C08, 0xCCB8, 0x8C09, 0xD79F, 0x8C0A, 0xD2EA,
04166     0x8C0B, 0xC4B1, 0x8C0C, 0xDAC8, 0x8C0D, 0xB5FD, 0x8C0E, 0xBBD1,
04167     0x8C0F, 0xDAC9, 0x8C10, 0xD0B3, 0x8C11, 0xDACA, 0x8C12, 0xDACB,
04168     0x8C13, 0xCEBD, 0x8C14, 0xDACC, 0x8C15, 0xDACD, 0x8C16, 0xDACE,
04169     0x8C17, 0xB2F7, 0x8C18, 0xDAD1, 0x8C19, 0xDACF, 0x8C1A, 0xD1E8,
04170     0x8C1B, 0xDAD0, 0x8C1C, 0xC3D5, 0x8C1D, 0xDAD2, 0x8C1E, 0xD7A0,
04171     0x8C1F, 0xDAD3, 0x8C20, 0xDAD4, 0x8C21, 0xDAD5, 0x8C22, 0xD0BB,
04172     0x8C23, 0xD2A5, 0x8C24, 0xB0F9, 0x8C25, 0xDAD6, 0x8C26, 0xC7AB,
04173     0x8C27, 0xDAD7, 0x8C28, 0xBDF7, 0x8C29, 0xC3A1, 0x8C2A, 0xDAD8,
04174     0x8C2B, 0xDAD9, 0x8C2C, 0xC3FD, 0x8C2D, 0xCCB7, 0x8C2E, 0xDADA,
04175     0x8C2F, 0xDADB, 0x8C30, 0xC0BE, 0x8C31, 0xC6D7, 0x8C32, 0xDADC,
04176     0x8C33, 0xDADD, 0x8C34, 0xC7B4, 0x8C35, 0xDADE, 0x8C36, 0xDADF,
04177     0x8C37, 0xB9C8, 0x8C38, 0xD840, 0x8C39, 0xD841, 0x8C3A, 0xD842,
04178     0x8C3B, 0xD843, 0x8C3C, 0xD844, 0x8C3D, 0xD845, 0x8C3E, 0xD846,
04179     0x8C3F, 0xD847, 0x8C40, 0xD848, 0x8C41, 0xBBED, 0x8C42, 0xD849,
04180     0x8C43, 0xD84A, 0x8C44, 0xD84B, 0x8C45, 0xD84C, 0x8C46, 0xB6B9,
04181     0x8C47, 0xF4F8, 0x8C48, 0xD84D, 0x8C49, 0xF4F9, 0x8C4A, 0xD84E,
04182     0x8C4B, 0xD84F, 0x8C4C, 0xCDE3, 0x8C4D, 0xD850, 0x8C4E, 0xD851,
04183     0x8C4F, 0xD852, 0x8C50, 0xD853, 0x8C51, 0xD854, 0x8C52, 0xD855,
04184     0x8C53, 0xD856, 0x8C54, 0xD857, 0x8C55, 0xF5B9, 0x8C56, 0xD858,
04185     0x8C57, 0xD859, 0x8C58, 0xD85A, 0x8C59, 0xD85B, 0x8C5A, 0xEBE0,
04186     0x8C5B, 0xD85C, 0x8C5C, 0xD85D, 0x8C5D, 0xD85E, 0x8C5E, 0xD85F,
04187     0x8C5F, 0xD860, 0x8C60, 0xD861, 0x8C61, 0xCFF3, 0x8C62, 0xBBBF,
04188     0x8C63, 0xD862, 0x8C64, 0xD863, 0x8C65, 0xD864, 0x8C66, 0xD865,
04189     0x8C67, 0xD866, 0x8C68, 0xD867, 0x8C69, 0xD868, 0x8C6A, 0xBAC0,
04190     0x8C6B, 0xD4A5, 0x8C6C, 0xD869, 0x8C6D, 0xD86A, 0x8C6E, 0xD86B,
04191     0x8C6F, 0xD86C, 0x8C70, 0xD86D, 0x8C71, 0xD86E, 0x8C72, 0xD86F,
04192     0x8C73, 0xE1D9, 0x8C74, 0xD870, 0x8C75, 0xD871, 0x8C76, 0xD872,
04193     0x8C77, 0xD873, 0x8C78, 0xF5F4, 0x8C79, 0xB1AA, 0x8C7A, 0xB2F2,
04194     0x8C7B, 0xD874, 0x8C7C, 0xD875, 0x8C7D, 0xD876, 0x8C7E, 0xD877,
04195     0x8C7F, 0xD878, 0x8C80, 0xD879, 0x8C81, 0xD87A, 0x8C82, 0xF5F5,
04196     0x8C83, 0xD87B, 0x8C84, 0xD87C, 0x8C85, 0xF5F7, 0x8C86, 0xD87D,
04197     0x8C87, 0xD87E, 0x8C88, 0xD880, 0x8C89, 0xBAD1, 0x8C8A, 0xF5F6,
04198     0x8C8B, 0xD881, 0x8C8C, 0xC3B2, 0x8C8D, 0xD882, 0x8C8E, 0xD883,
04199     0x8C8F, 0xD884, 0x8C90, 0xD885, 0x8C91, 0xD886, 0x8C92, 0xD887,
04200     0x8C93, 0xD888, 0x8C94, 0xF5F9, 0x8C95, 0xD889, 0x8C96, 0xD88A,
04201     0x8C97, 0xD88B, 0x8C98, 0xF5F8, 0x8C99, 0xD88C, 0x8C9A, 0xD88D,
04202     0x8C9B, 0xD88E, 0x8C9C, 0xD88F, 0x8C9D, 0xD890, 0x8C9E, 0xD891,
04203     0x8C9F, 0xD892, 0x8CA0, 0xD893, 0x8CA1, 0xD894, 0x8CA2, 0xD895,
04204     0x8CA3, 0xD896, 0x8CA4, 0xD897, 0x8CA5, 0xD898, 0x8CA6, 0xD899,
04205     0x8CA7, 0xD89A, 0x8CA8, 0xD89B, 0x8CA9, 0xD89C, 0x8CAA, 0xD89D,
04206     0x8CAB, 0xD89E, 0x8CAC, 0xD89F, 0x8CAD, 0xD8A0, 0x8CAE, 0xD940,
04207     0x8CAF, 0xD941, 0x8CB0, 0xD942, 0x8CB1, 0xD943, 0x8CB2, 0xD944,
04208     0x8CB3, 0xD945, 0x8CB4, 0xD946, 0x8CB5, 0xD947, 0x8CB6, 0xD948,
04209     0x8CB7, 0xD949, 0x8CB8, 0xD94A, 0x8CB9, 0xD94B, 0x8CBA, 0xD94C,
04210     0x8CBB, 0xD94D, 0x8CBC, 0xD94E, 0x8CBD, 0xD94F, 0x8CBE, 0xD950,
04211     0x8CBF, 0xD951, 0x8CC0, 0xD952, 0x8CC1, 0xD953, 0x8CC2, 0xD954,
04212     0x8CC3, 0xD955, 0x8CC4, 0xD956, 0x8CC5, 0xD957, 0x8CC6, 0xD958,
04213     0x8CC7, 0xD959, 0x8CC8, 0xD95A, 0x8CC9, 0xD95B, 0x8CCA, 0xD95C,
04214     0x8CCB, 0xD95D, 0x8CCC, 0xD95E, 0x8CCD, 0xD95F, 0x8CCE, 0xD960,
04215     0x8CCF, 0xD961, 0x8CD0, 0xD962, 0x8CD1, 0xD963, 0x8CD2, 0xD964,
04216     0x8CD3, 0xD965, 0x8CD4, 0xD966, 0x8CD5, 0xD967, 0x8CD6, 0xD968,
04217     0x8CD7, 0xD969, 0x8CD8, 0xD96A, 0x8CD9, 0xD96B, 0x8CDA, 0xD96C,
04218     0x8CDB, 0xD96D, 0x8CDC, 0xD96E, 0x8CDD, 0xD96F, 0x8CDE, 0xD970,
04219     0x8CDF, 0xD971, 0x8CE0, 0xD972, 0x8CE1, 0xD973, 0x8CE2, 0xD974,
04220     0x8CE3, 0xD975, 0x8CE4, 0xD976, 0x8CE5, 0xD977, 0x8CE6, 0xD978,
04221     0x8CE7, 0xD979, 0x8CE8, 0xD97A, 0x8CE9, 0xD97B, 0x8CEA, 0xD97C,
04222     0x8CEB, 0xD97D, 0x8CEC, 0xD97E, 0x8CED, 0xD980, 0x8CEE, 0xD981,
04223     0x8CEF, 0xD982, 0x8CF0, 0xD983, 0x8CF1, 0xD984, 0x8CF2, 0xD985,
04224     0x8CF3, 0xD986, 0x8CF4, 0xD987, 0x8CF5, 0xD988, 0x8CF6, 0xD989,
04225     0x8CF7, 0xD98A, 0x8CF8, 0xD98B, 0x8CF9, 0xD98C, 0x8CFA, 0xD98D,
04226     0x8CFB, 0xD98E, 0x8CFC, 0xD98F, 0x8CFD, 0xD990, 0x8CFE, 0xD991,
04227     0x8CFF, 0xD992, 0x8D00, 0xD993, 0x8D01, 0xD994, 0x8D02, 0xD995,
04228     0x8D03, 0xD996, 0x8D04, 0xD997, 0x8D05, 0xD998, 0x8D06, 0xD999,
04229     0x8D07, 0xD99A, 0x8D08, 0xD99B, 0x8D09, 0xD99C, 0x8D0A, 0xD99D,
04230     0x8D0B, 0xD99E, 0x8D0C, 0xD99F, 0x8D0D, 0xD9A0, 0x8D0E, 0xDA40,
04231     0x8D0F, 0xDA41, 0x8D10, 0xDA42, 0x8D11, 0xDA43, 0x8D12, 0xDA44,
04232     0x8D13, 0xDA45, 0x8D14, 0xDA46, 0x8D15, 0xDA47, 0x8D16, 0xDA48,
04233     0x8D17, 0xDA49, 0x8D18, 0xDA4A, 0x8D19, 0xDA4B, 0x8D1A, 0xDA4C,
04234     0x8D1B, 0xDA4D, 0x8D1C, 0xDA4E, 0x8D1D, 0xB1B4, 0x8D1E, 0xD5EA,
04235     0x8D1F, 0xB8BA, 0x8D20, 0xDA4F, 0x8D21, 0xB9B1, 0x8D22, 0xB2C6,
04236     0x8D23, 0xD4F0, 0x8D24, 0xCFCD, 0x8D25, 0xB0DC, 0x8D26, 0xD5CB,
04237     0x8D27, 0xBBF5, 0x8D28, 0xD6CA, 0x8D29, 0xB7B7, 0x8D2A, 0xCCB0,
04238     0x8D2B, 0xC6B6, 0x8D2C, 0xB1E1, 0x8D2D, 0xB9BA, 0x8D2E, 0xD6FC,
04239     0x8D2F, 0xB9E1, 0x8D30, 0xB7A1, 0x8D31, 0xBCFA, 0x8D32, 0xEADA,
04240     0x8D33, 0xEADB, 0x8D34, 0xCCF9, 0x8D35, 0xB9F3, 0x8D36, 0xEADC,
04241     0x8D37, 0xB4FB, 0x8D38, 0xC3B3, 0x8D39, 0xB7D1, 0x8D3A, 0xBAD8,
04242     0x8D3B, 0xEADD, 0x8D3C, 0xD4F4, 0x8D3D, 0xEADE, 0x8D3E, 0xBCD6,
04243     0x8D3F, 0xBBDF, 0x8D40, 0xEADF, 0x8D41, 0xC1DE, 0x8D42, 0xC2B8,
04244     0x8D43, 0xD4DF, 0x8D44, 0xD7CA, 0x8D45, 0xEAE0, 0x8D46, 0xEAE1,
04245     0x8D47, 0xEAE4, 0x8D48, 0xEAE2, 0x8D49, 0xEAE3, 0x8D4A, 0xC9DE,
04246     0x8D4B, 0xB8B3, 0x8D4C, 0xB6C4, 0x8D4D, 0xEAE5, 0x8D4E, 0xCAEA,
04247     0x8D4F, 0xC9CD, 0x8D50, 0xB4CD, 0x8D51, 0xDA50, 0x8D52, 0xDA51,
04248     0x8D53, 0xE2D9, 0x8D54, 0xC5E2, 0x8D55, 0xEAE6, 0x8D56, 0xC0B5,
04249     0x8D57, 0xDA52, 0x8D58, 0xD7B8, 0x8D59, 0xEAE7, 0x8D5A, 0xD7AC,
04250     0x8D5B, 0xC8FC, 0x8D5C, 0xD8D3, 0x8D5D, 0xD8CD, 0x8D5E, 0xD4DE,
04251     0x8D5F, 0xDA53, 0x8D60, 0xD4F9, 0x8D61, 0xC9C4, 0x8D62, 0xD3AE,
04252     0x8D63, 0xB8D3, 0x8D64, 0xB3E0, 0x8D65, 0xDA54, 0x8D66, 0xC9E2,
04253     0x8D67, 0xF4F6, 0x8D68, 0xDA55, 0x8D69, 0xDA56, 0x8D6A, 0xDA57,
04254     0x8D6B, 0xBAD5, 0x8D6C, 0xDA58, 0x8D6D, 0xF4F7, 0x8D6E, 0xDA59,
04255     0x8D6F, 0xDA5A, 0x8D70, 0xD7DF, 0x8D71, 0xDA5B, 0x8D72, 0xDA5C,
04256     0x8D73, 0xF4F1, 0x8D74, 0xB8B0, 0x8D75, 0xD5D4, 0x8D76, 0xB8CF,
04257     0x8D77, 0xC6F0, 0x8D78, 0xDA5D, 0x8D79, 0xDA5E, 0x8D7A, 0xDA5F,
04258     0x8D7B, 0xDA60, 0x8D7C, 0xDA61, 0x8D7D, 0xDA62, 0x8D7E, 0xDA63,
04259     0x8D7F, 0xDA64, 0x8D80, 0xDA65, 0x8D81, 0xB3C3, 0x8D82, 0xDA66,
04260     0x8D83, 0xDA67, 0x8D84, 0xF4F2, 0x8D85, 0xB3AC, 0x8D86, 0xDA68,
04261     0x8D87, 0xDA69, 0x8D88, 0xDA6A, 0x8D89, 0xDA6B, 0x8D8A, 0xD4BD,
04262     0x8D8B, 0xC7F7, 0x8D8C, 0xDA6C, 0x8D8D, 0xDA6D, 0x8D8E, 0xDA6E,
04263     0x8D8F, 0xDA6F, 0x8D90, 0xDA70, 0x8D91, 0xF4F4, 0x8D92, 0xDA71,
04264     0x8D93, 0xDA72, 0x8D94, 0xF4F3, 0x8D95, 0xDA73, 0x8D96, 0xDA74,
04265     0x8D97, 0xDA75, 0x8D98, 0xDA76, 0x8D99, 0xDA77, 0x8D9A, 0xDA78,
04266     0x8D9B, 0xDA79, 0x8D9C, 0xDA7A, 0x8D9D, 0xDA7B, 0x8D9E, 0xDA7C,
04267     0x8D9F, 0xCCCB, 0x8DA0, 0xDA7D, 0x8DA1, 0xDA7E, 0x8DA2, 0xDA80,
04268     0x8DA3, 0xC8A4, 0x8DA4, 0xDA81, 0x8DA5, 0xDA82, 0x8DA6, 0xDA83,
04269     0x8DA7, 0xDA84, 0x8DA8, 0xDA85, 0x8DA9, 0xDA86, 0x8DAA, 0xDA87,
04270     0x8DAB, 0xDA88, 0x8DAC, 0xDA89, 0x8DAD, 0xDA8A, 0x8DAE, 0xDA8B,
04271     0x8DAF, 0xDA8C, 0x8DB0, 0xDA8D, 0x8DB1, 0xF4F5, 0x8DB2, 0xDA8E,
04272     0x8DB3, 0xD7E3, 0x8DB4, 0xC5BF, 0x8DB5, 0xF5C0, 0x8DB6, 0xDA8F,
04273     0x8DB7, 0xDA90, 0x8DB8, 0xF5BB, 0x8DB9, 0xDA91, 0x8DBA, 0xF5C3,
04274     0x8DBB, 0xDA92, 0x8DBC, 0xF5C2, 0x8DBD, 0xDA93, 0x8DBE, 0xD6BA,
04275     0x8DBF, 0xF5C1, 0x8DC0, 0xDA94, 0x8DC1, 0xDA95, 0x8DC2, 0xDA96,
04276     0x8DC3, 0xD4BE, 0x8DC4, 0xF5C4, 0x8DC5, 0xDA97, 0x8DC6, 0xF5CC,
04277     0x8DC7, 0xDA98, 0x8DC8, 0xDA99, 0x8DC9, 0xDA9A, 0x8DCA, 0xDA9B,
04278     0x8DCB, 0xB0CF, 0x8DCC, 0xB5F8, 0x8DCD, 0xDA9C, 0x8DCE, 0xF5C9,
04279     0x8DCF, 0xF5CA, 0x8DD0, 0xDA9D, 0x8DD1, 0xC5DC, 0x8DD2, 0xDA9E,
04280     0x8DD3, 0xDA9F, 0x8DD4, 0xDAA0, 0x8DD5, 0xDB40, 0x8DD6, 0xF5C5,
04281     0x8DD7, 0xF5C6, 0x8DD8, 0xDB41, 0x8DD9, 0xDB42, 0x8DDA, 0xF5C7,
04282     0x8DDB, 0xF5CB, 0x8DDC, 0xDB43, 0x8DDD, 0xBEE0, 0x8DDE, 0xF5C8,
04283     0x8DDF, 0xB8FA, 0x8DE0, 0xDB44, 0x8DE1, 0xDB45, 0x8DE2, 0xDB46,
04284     0x8DE3, 0xF5D0, 0x8DE4, 0xF5D3, 0x8DE5, 0xDB47, 0x8DE6, 0xDB48,
04285     0x8DE7, 0xDB49, 0x8DE8, 0xBFE7, 0x8DE9, 0xDB4A, 0x8DEA, 0xB9F2,
04286     0x8DEB, 0xF5BC, 0x8DEC, 0xF5CD, 0x8DED, 0xDB4B, 0x8DEE, 0xDB4C,
04287     0x8DEF, 0xC2B7, 0x8DF0, 0xDB4D, 0x8DF1, 0xDB4E, 0x8DF2, 0xDB4F,
04288     0x8DF3, 0xCCF8, 0x8DF4, 0xDB50, 0x8DF5, 0xBCF9, 0x8DF6, 0xDB51,
04289     0x8DF7, 0xF5CE, 0x8DF8, 0xF5CF, 0x8DF9, 0xF5D1, 0x8DFA, 0xB6E5,
04290     0x8DFB, 0xF5D2, 0x8DFC, 0xDB52, 0x8DFD, 0xF5D5, 0x8DFE, 0xDB53,
04291     0x8DFF, 0xDB54, 0x8E00, 0xDB55, 0x8E01, 0xDB56, 0x8E02, 0xDB57,
04292     0x8E03, 0xDB58, 0x8E04, 0xDB59, 0x8E05, 0xF5BD, 0x8E06, 0xDB5A,
04293     0x8E07, 0xDB5B, 0x8E08, 0xDB5C, 0x8E09, 0xF5D4, 0x8E0A, 0xD3BB,
04294     0x8E0B, 0xDB5D, 0x8E0C, 0xB3EC, 0x8E0D, 0xDB5E, 0x8E0E, 0xDB5F,
04295     0x8E0F, 0xCCA4, 0x8E10, 0xDB60, 0x8E11, 0xDB61, 0x8E12, 0xDB62,
04296     0x8E13, 0xDB63, 0x8E14, 0xF5D6, 0x8E15, 0xDB64, 0x8E16, 0xDB65,
04297     0x8E17, 0xDB66, 0x8E18, 0xDB67, 0x8E19, 0xDB68, 0x8E1A, 0xDB69,
04298     0x8E1B, 0xDB6A, 0x8E1C, 0xDB6B, 0x8E1D, 0xF5D7, 0x8E1E, 0xBEE1,
04299     0x8E1F, 0xF5D8, 0x8E20, 0xDB6C, 0x8E21, 0xDB6D, 0x8E22, 0xCCDF,
04300     0x8E23, 0xF5DB, 0x8E24, 0xDB6E, 0x8E25, 0xDB6F, 0x8E26, 0xDB70,
04301     0x8E27, 0xDB71, 0x8E28, 0xDB72, 0x8E29, 0xB2C8, 0x8E2A, 0xD7D9,
04302     0x8E2B, 0xDB73, 0x8E2C, 0xF5D9, 0x8E2D, 0xDB74, 0x8E2E, 0xF5DA,
04303     0x8E2F, 0xF5DC, 0x8E30, 0xDB75, 0x8E31, 0xF5E2, 0x8E32, 0xDB76,
04304     0x8E33, 0xDB77, 0x8E34, 0xDB78, 0x8E35, 0xF5E0, 0x8E36, 0xDB79,
04305     0x8E37, 0xDB7A, 0x8E38, 0xDB7B, 0x8E39, 0xF5DF, 0x8E3A, 0xF5DD,
04306     0x8E3B, 0xDB7C, 0x8E3C, 0xDB7D, 0x8E3D, 0xF5E1, 0x8E3E, 0xDB7E,
04307     0x8E3F, 0xDB80, 0x8E40, 0xF5DE, 0x8E41, 0xF5E4, 0x8E42, 0xF5E5,
04308     0x8E43, 0xDB81, 0x8E44, 0xCCE3, 0x8E45, 0xDB82, 0x8E46, 0xDB83,
04309     0x8E47, 0xE5BF, 0x8E48, 0xB5B8, 0x8E49, 0xF5E3, 0x8E4A, 0xF5E8,
04310     0x8E4B, 0xCCA3, 0x8E4C, 0xDB84, 0x8E4D, 0xDB85, 0x8E4E, 0xDB86,
04311     0x8E4F, 0xDB87, 0x8E50, 0xDB88, 0x8E51, 0xF5E6, 0x8E52, 0xF5E7,
04312     0x8E53, 0xDB89, 0x8E54, 0xDB8A, 0x8E55, 0xDB8B, 0x8E56, 0xDB8C,
04313     0x8E57, 0xDB8D, 0x8E58, 0xDB8E, 0x8E59, 0xF5BE, 0x8E5A, 0xDB8F,
04314     0x8E5B, 0xDB90, 0x8E5C, 0xDB91, 0x8E5D, 0xDB92, 0x8E5E, 0xDB93,
04315     0x8E5F, 0xDB94, 0x8E60, 0xDB95, 0x8E61, 0xDB96, 0x8E62, 0xDB97,
04316     0x8E63, 0xDB98, 0x8E64, 0xDB99, 0x8E65, 0xDB9A, 0x8E66, 0xB1C4,
04317     0x8E67, 0xDB9B, 0x8E68, 0xDB9C, 0x8E69, 0xF5BF, 0x8E6A, 0xDB9D,
04318     0x8E6B, 0xDB9E, 0x8E6C, 0xB5C5, 0x8E6D, 0xB2E4, 0x8E6E, 0xDB9F,
04319     0x8E6F, 0xF5EC, 0x8E70, 0xF5E9, 0x8E71, 0xDBA0, 0x8E72, 0xB6D7,
04320     0x8E73, 0xDC40, 0x8E74, 0xF5ED, 0x8E75, 0xDC41, 0x8E76, 0xF5EA,
04321     0x8E77, 0xDC42, 0x8E78, 0xDC43, 0x8E79, 0xDC44, 0x8E7A, 0xDC45,
04322     0x8E7B, 0xDC46, 0x8E7C, 0xF5EB, 0x8E7D, 0xDC47, 0x8E7E, 0xDC48,
04323     0x8E7F, 0xB4DA, 0x8E80, 0xDC49, 0x8E81, 0xD4EA, 0x8E82, 0xDC4A,
04324     0x8E83, 0xDC4B, 0x8E84, 0xDC4C, 0x8E85, 0xF5EE, 0x8E86, 0xDC4D,
04325     0x8E87, 0xB3F9, 0x8E88, 0xDC4E, 0x8E89, 0xDC4F, 0x8E8A, 0xDC50,
04326     0x8E8B, 0xDC51, 0x8E8C, 0xDC52, 0x8E8D, 0xDC53, 0x8E8E, 0xDC54,
04327     0x8E8F, 0xF5EF, 0x8E90, 0xF5F1, 0x8E91, 0xDC55, 0x8E92, 0xDC56,
04328     0x8E93, 0xDC57, 0x8E94, 0xF5F0, 0x8E95, 0xDC58, 0x8E96, 0xDC59,
04329     0x8E97, 0xDC5A, 0x8E98, 0xDC5B, 0x8E99, 0xDC5C, 0x8E9A, 0xDC5D,
04330     0x8E9B, 0xDC5E, 0x8E9C, 0xF5F2, 0x8E9D, 0xDC5F, 0x8E9E, 0xF5F3,
04331     0x8E9F, 0xDC60, 0x8EA0, 0xDC61, 0x8EA1, 0xDC62, 0x8EA2, 0xDC63,
04332     0x8EA3, 0xDC64, 0x8EA4, 0xDC65, 0x8EA5, 0xDC66, 0x8EA6, 0xDC67,
04333     0x8EA7, 0xDC68, 0x8EA8, 0xDC69, 0x8EA9, 0xDC6A, 0x8EAA, 0xDC6B,
04334     0x8EAB, 0xC9ED, 0x8EAC, 0xB9AA, 0x8EAD, 0xDC6C, 0x8EAE, 0xDC6D,
04335     0x8EAF, 0xC7FB, 0x8EB0, 0xDC6E, 0x8EB1, 0xDC6F, 0x8EB2, 0xB6E3,
04336     0x8EB3, 0xDC70, 0x8EB4, 0xDC71, 0x8EB5, 0xDC72, 0x8EB6, 0xDC73,
04337     0x8EB7, 0xDC74, 0x8EB8, 0xDC75, 0x8EB9, 0xDC76, 0x8EBA, 0xCCC9,
04338     0x8EBB, 0xDC77, 0x8EBC, 0xDC78, 0x8EBD, 0xDC79, 0x8EBE, 0xDC7A,
04339     0x8EBF, 0xDC7B, 0x8EC0, 0xDC7C, 0x8EC1, 0xDC7D, 0x8EC2, 0xDC7E,
04340     0x8EC3, 0xDC80, 0x8EC4, 0xDC81, 0x8EC5, 0xDC82, 0x8EC6, 0xDC83,
04341     0x8EC7, 0xDC84, 0x8EC8, 0xDC85, 0x8EC9, 0xDC86, 0x8ECA, 0xDC87,
04342     0x8ECB, 0xDC88, 0x8ECC, 0xDC89, 0x8ECD, 0xDC8A, 0x8ECE, 0xEAA6,
04343     0x8ECF, 0xDC8B, 0x8ED0, 0xDC8C, 0x8ED1, 0xDC8D, 0x8ED2, 0xDC8E,
04344     0x8ED3, 0xDC8F, 0x8ED4, 0xDC90, 0x8ED5, 0xDC91, 0x8ED6, 0xDC92,
04345     0x8ED7, 0xDC93, 0x8ED8, 0xDC94, 0x8ED9, 0xDC95, 0x8EDA, 0xDC96,
04346     0x8EDB, 0xDC97, 0x8EDC, 0xDC98, 0x8EDD, 0xDC99, 0x8EDE, 0xDC9A,
04347     0x8EDF, 0xDC9B, 0x8EE0, 0xDC9C, 0x8EE1, 0xDC9D, 0x8EE2, 0xDC9E,
04348     0x8EE3, 0xDC9F, 0x8EE4, 0xDCA0, 0x8EE5, 0xDD40, 0x8EE6, 0xDD41,
04349     0x8EE7, 0xDD42, 0x8EE8, 0xDD43, 0x8EE9, 0xDD44, 0x8EEA, 0xDD45,
04350     0x8EEB, 0xDD46, 0x8EEC, 0xDD47, 0x8EED, 0xDD48, 0x8EEE, 0xDD49,
04351     0x8EEF, 0xDD4A, 0x8EF0, 0xDD4B, 0x8EF1, 0xDD4C, 0x8EF2, 0xDD4D,
04352     0x8EF3, 0xDD4E, 0x8EF4, 0xDD4F, 0x8EF5, 0xDD50, 0x8EF6, 0xDD51,
04353     0x8EF7, 0xDD52, 0x8EF8, 0xDD53, 0x8EF9, 0xDD54, 0x8EFA, 0xDD55,
04354     0x8EFB, 0xDD56, 0x8EFC, 0xDD57, 0x8EFD, 0xDD58, 0x8EFE, 0xDD59,
04355     0x8EFF, 0xDD5A, 0x8F00, 0xDD5B, 0x8F01, 0xDD5C, 0x8F02, 0xDD5D,
04356     0x8F03, 0xDD5E, 0x8F04, 0xDD5F, 0x8F05, 0xDD60, 0x8F06, 0xDD61,
04357     0x8F07, 0xDD62, 0x8F08, 0xDD63, 0x8F09, 0xDD64, 0x8F0A, 0xDD65,
04358     0x8F0B, 0xDD66, 0x8F0C, 0xDD67, 0x8F0D, 0xDD68, 0x8F0E, 0xDD69,
04359     0x8F0F, 0xDD6A, 0x8F10, 0xDD6B, 0x8F11, 0xDD6C, 0x8F12, 0xDD6D,
04360     0x8F13, 0xDD6E, 0x8F14, 0xDD6F, 0x8F15, 0xDD70, 0x8F16, 0xDD71,
04361     0x8F17, 0xDD72, 0x8F18, 0xDD73, 0x8F19, 0xDD74, 0x8F1A, 0xDD75,
04362     0x8F1B, 0xDD76, 0x8F1C, 0xDD77, 0x8F1D, 0xDD78, 0x8F1E, 0xDD79,
04363     0x8F1F, 0xDD7A, 0x8F20, 0xDD7B, 0x8F21, 0xDD7C, 0x8F22, 0xDD7D,
04364     0x8F23, 0xDD7E, 0x8F24, 0xDD80, 0x8F25, 0xDD81, 0x8F26, 0xDD82,
04365     0x8F27, 0xDD83, 0x8F28, 0xDD84, 0x8F29, 0xDD85, 0x8F2A, 0xDD86,
04366     0x8F2B, 0xDD87, 0x8F2C, 0xDD88, 0x8F2D, 0xDD89, 0x8F2E, 0xDD8A,
04367     0x8F2F, 0xDD8B, 0x8F30, 0xDD8C, 0x8F31, 0xDD8D, 0x8F32, 0xDD8E,
04368     0x8F33, 0xDD8F, 0x8F34, 0xDD90, 0x8F35, 0xDD91, 0x8F36, 0xDD92,
04369     0x8F37, 0xDD93, 0x8F38, 0xDD94, 0x8F39, 0xDD95, 0x8F3A, 0xDD96,
04370     0x8F3B, 0xDD97, 0x8F3C, 0xDD98, 0x8F3D, 0xDD99, 0x8F3E, 0xDD9A,
04371     0x8F3F, 0xDD9B, 0x8F40, 0xDD9C, 0x8F41, 0xDD9D, 0x8F42, 0xDD9E,
04372     0x8F43, 0xDD9F, 0x8F44, 0xDDA0, 0x8F45, 0xDE40, 0x8F46, 0xDE41,
04373     0x8F47, 0xDE42, 0x8F48, 0xDE43, 0x8F49, 0xDE44, 0x8F4A, 0xDE45,
04374     0x8F4B, 0xDE46, 0x8F4C, 0xDE47, 0x8F4D, 0xDE48, 0x8F4E, 0xDE49,
04375     0x8F4F, 0xDE4A, 0x8F50, 0xDE4B, 0x8F51, 0xDE4C, 0x8F52, 0xDE4D,
04376     0x8F53, 0xDE4E, 0x8F54, 0xDE4F, 0x8F55, 0xDE50, 0x8F56, 0xDE51,
04377     0x8F57, 0xDE52, 0x8F58, 0xDE53, 0x8F59, 0xDE54, 0x8F5A, 0xDE55,
04378     0x8F5B, 0xDE56, 0x8F5C, 0xDE57, 0x8F5D, 0xDE58, 0x8F5E, 0xDE59,
04379     0x8F5F, 0xDE5A, 0x8F60, 0xDE5B, 0x8F61, 0xDE5C, 0x8F62, 0xDE5D,
04380     0x8F63, 0xDE5E, 0x8F64, 0xDE5F, 0x8F65, 0xDE60, 0x8F66, 0xB3B5,
04381     0x8F67, 0xD4FE, 0x8F68, 0xB9EC, 0x8F69, 0xD0F9, 0x8F6A, 0xDE61,
04382     0x8F6B, 0xE9ED, 0x8F6C, 0xD7AA, 0x8F6D, 0xE9EE, 0x8F6E, 0xC2D6,
04383     0x8F6F, 0xC8ED, 0x8F70, 0xBAE4, 0x8F71, 0xE9EF, 0x8F72, 0xE9F0,
04384     0x8F73, 0xE9F1, 0x8F74, 0xD6E1, 0x8F75, 0xE9F2, 0x8F76, 0xE9F3,
04385     0x8F77, 0xE9F5, 0x8F78, 0xE9F4, 0x8F79, 0xE9F6, 0x8F7A, 0xE9F7,
04386     0x8F7B, 0xC7E1, 0x8F7C, 0xE9F8, 0x8F7D, 0xD4D8, 0x8F7E, 0xE9F9,
04387     0x8F7F, 0xBDCE, 0x8F80, 0xDE62, 0x8F81, 0xE9FA, 0x8F82, 0xE9FB,
04388     0x8F83, 0xBDCF, 0x8F84, 0xE9FC, 0x8F85, 0xB8A8, 0x8F86, 0xC1BE,
04389     0x8F87, 0xE9FD, 0x8F88, 0xB1B2, 0x8F89, 0xBBD4, 0x8F8A, 0xB9F5,
04390     0x8F8B, 0xE9FE, 0x8F8C, 0xDE63, 0x8F8D, 0xEAA1, 0x8F8E, 0xEAA2,
04391     0x8F8F, 0xEAA3, 0x8F90, 0xB7F8, 0x8F91, 0xBCAD, 0x8F92, 0xDE64,
04392     0x8F93, 0xCAE4, 0x8F94, 0xE0CE, 0x8F95, 0xD4AF, 0x8F96, 0xCFBD,
04393     0x8F97, 0xD5B7, 0x8F98, 0xEAA4, 0x8F99, 0xD5DE, 0x8F9A, 0xEAA5,
04394     0x8F9B, 0xD0C1, 0x8F9C, 0xB9BC, 0x8F9D, 0xDE65, 0x8F9E, 0xB4C7,
04395     0x8F9F, 0xB1D9, 0x8FA0, 0xDE66, 0x8FA1, 0xDE67, 0x8FA2, 0xDE68,
04396     0x8FA3, 0xC0B1, 0x8FA4, 0xDE69, 0x8FA5, 0xDE6A, 0x8FA6, 0xDE6B,
04397     0x8FA7, 0xDE6C, 0x8FA8, 0xB1E6, 0x8FA9, 0xB1E7, 0x8FAA, 0xDE6D,
04398     0x8FAB, 0xB1E8, 0x8FAC, 0xDE6E, 0x8FAD, 0xDE6F, 0x8FAE, 0xDE70,
04399     0x8FAF, 0xDE71, 0x8FB0, 0xB3BD, 0x8FB1, 0xC8E8, 0x8FB2, 0xDE72,
04400     0x8FB3, 0xDE73, 0x8FB4, 0xDE74, 0x8FB5, 0xDE75, 0x8FB6, 0xE5C1,
04401     0x8FB7, 0xDE76, 0x8FB8, 0xDE77, 0x8FB9, 0xB1DF, 0x8FBA, 0xDE78,
04402     0x8FBB, 0xDE79, 0x8FBC, 0xDE7A, 0x8FBD, 0xC1C9, 0x8FBE, 0xB4EF,
04403     0x8FBF, 0xDE7B, 0x8FC0, 0xDE7C, 0x8FC1, 0xC7A8, 0x8FC2, 0xD3D8,
04404     0x8FC3, 0xDE7D, 0x8FC4, 0xC6F9, 0x8FC5, 0xD1B8, 0x8FC6, 0xDE7E,
04405     0x8FC7, 0xB9FD, 0x8FC8, 0xC2F5, 0x8FC9, 0xDE80, 0x8FCA, 0xDE81,
04406     0x8FCB, 0xDE82, 0x8FCC, 0xDE83, 0x8FCD, 0xDE84, 0x8FCE, 0xD3AD,
04407     0x8FCF, 0xDE85, 0x8FD0, 0xD4CB, 0x8FD1, 0xBDFC, 0x8FD2, 0xDE86,
04408     0x8FD3, 0xE5C2, 0x8FD4, 0xB7B5, 0x8FD5, 0xE5C3, 0x8FD6, 0xDE87,
04409     0x8FD7, 0xDE88, 0x8FD8, 0xBBB9, 0x8FD9, 0xD5E2, 0x8FDA, 0xDE89,
04410     0x8FDB, 0xBDF8, 0x8FDC, 0xD4B6, 0x8FDD, 0xCEA5, 0x8FDE, 0xC1AC,
04411     0x8FDF, 0xB3D9, 0x8FE0, 0xDE8A, 0x8FE1, 0xDE8B, 0x8FE2, 0xCCF6,
04412     0x8FE3, 0xDE8C, 0x8FE4, 0xE5C6, 0x8FE5, 0xE5C4, 0x8FE6, 0xE5C8,
04413     0x8FE7, 0xDE8D, 0x8FE8, 0xE5CA, 0x8FE9, 0xE5C7, 0x8FEA, 0xB5CF,
04414     0x8FEB, 0xC6C8, 0x8FEC, 0xDE8E, 0x8FED, 0xB5FC, 0x8FEE, 0xE5C5,
04415     0x8FEF, 0xDE8F, 0x8FF0, 0xCAF6, 0x8FF1, 0xDE90, 0x8FF2, 0xDE91,
04416     0x8FF3, 0xE5C9, 0x8FF4, 0xDE92, 0x8FF5, 0xDE93, 0x8FF6, 0xDE94,
04417     0x8FF7, 0xC3D4, 0x8FF8, 0xB1C5, 0x8FF9, 0xBCA3, 0x8FFA, 0xDE95,
04418     0x8FFB, 0xDE96, 0x8FFC, 0xDE97, 0x8FFD, 0xD7B7, 0x8FFE, 0xDE98,
04419     0x8FFF, 0xDE99, 0x9000, 0xCDCB, 0x9001, 0xCBCD, 0x9002, 0xCACA,
04420     0x9003, 0xCCD3, 0x9004, 0xE5CC, 0x9005, 0xE5CB, 0x9006, 0xC4E6,
04421     0x9007, 0xDE9A, 0x9008, 0xDE9B, 0x9009, 0xD1A1, 0x900A, 0xD1B7,
04422     0x900B, 0xE5CD, 0x900C, 0xDE9C, 0x900D, 0xE5D0, 0x900E, 0xDE9D,
04423     0x900F, 0xCDB8, 0x9010, 0xD6F0, 0x9011, 0xE5CF, 0x9012, 0xB5DD,
04424     0x9013, 0xDE9E, 0x9014, 0xCDBE, 0x9015, 0xDE9F, 0x9016, 0xE5D1,
04425     0x9017, 0xB6BA, 0x9018, 0xDEA0, 0x9019, 0xDF40, 0x901A, 0xCDA8,
04426     0x901B, 0xB9E4, 0x901C, 0xDF41, 0x901D, 0xCAC5, 0x901E, 0xB3D1,
04427     0x901F, 0xCBD9, 0x9020, 0xD4EC, 0x9021, 0xE5D2, 0x9022, 0xB7EA,
04428     0x9023, 0xDF42, 0x9024, 0xDF43, 0x9025, 0xDF44, 0x9026, 0xE5CE,
04429     0x9027, 0xDF45, 0x9028, 0xDF46, 0x9029, 0xDF47, 0x902A, 0xDF48,
04430     0x902B, 0xDF49, 0x902C, 0xDF4A, 0x902D, 0xE5D5, 0x902E, 0xB4FE,
04431     0x902F, 0xE5D6, 0x9030, 0xDF4B, 0x9031, 0xDF4C, 0x9032, 0xDF4D,
04432     0x9033, 0xDF4E, 0x9034, 0xDF4F, 0x9035, 0xE5D3, 0x9036, 0xE5D4,
04433     0x9037, 0xDF50, 0x9038, 0xD2DD, 0x9039, 0xDF51, 0x903A, 0xDF52,
04434     0x903B, 0xC2DF, 0x903C, 0xB1C6, 0x903D, 0xDF53, 0x903E, 0xD3E2,
04435     0x903F, 0xDF54, 0x9040, 0xDF55, 0x9041, 0xB6DD, 0x9042, 0xCBEC,
04436     0x9043, 0xDF56, 0x9044, 0xE5D7, 0x9045, 0xDF57, 0x9046, 0xDF58,
04437     0x9047, 0xD3F6, 0x9048, 0xDF59, 0x9049, 0xDF5A, 0x904A, 0xDF5B,
04438     0x904B, 0xDF5C, 0x904C, 0xDF5D, 0x904D, 0xB1E9, 0x904E, 0xDF5E,
04439     0x904F, 0xB6F4, 0x9050, 0xE5DA, 0x9051, 0xE5D8, 0x9052, 0xE5D9,
04440     0x9053, 0xB5C0, 0x9054, 0xDF5F, 0x9055, 0xDF60, 0x9056, 0xDF61,
04441     0x9057, 0xD2C5, 0x9058, 0xE5DC, 0x9059, 0xDF62, 0x905A, 0xDF63,
04442     0x905B, 0xE5DE, 0x905C, 0xDF64, 0x905D, 0xDF65, 0x905E, 0xDF66,
04443     0x905F, 0xDF67, 0x9060, 0xDF68, 0x9061, 0xDF69, 0x9062, 0xE5DD,
04444     0x9063, 0xC7B2, 0x9064, 0xDF6A, 0x9065, 0xD2A3, 0x9066, 0xDF6B,
04445     0x9067, 0xDF6C, 0x9068, 0xE5DB, 0x9069, 0xDF6D, 0x906A, 0xDF6E,
04446     0x906B, 0xDF6F, 0x906C, 0xDF70, 0x906D, 0xD4E2, 0x906E, 0xD5DA,
04447     0x906F, 0xDF71, 0x9070, 0xDF72, 0x9071, 0xDF73, 0x9072, 0xDF74,
04448     0x9073, 0xDF75, 0x9074, 0xE5E0, 0x9075, 0xD7F1, 0x9076, 0xDF76,
04449     0x9077, 0xDF77, 0x9078, 0xDF78, 0x9079, 0xDF79, 0x907A, 0xDF7A,
04450     0x907B, 0xDF7B, 0x907C, 0xDF7C, 0x907D, 0xE5E1, 0x907E, 0xDF7D,
04451     0x907F, 0xB1DC, 0x9080, 0xD1FB, 0x9081, 0xDF7E, 0x9082, 0xE5E2,
04452     0x9083, 0xE5E4, 0x9084, 0xDF80, 0x9085, 0xDF81, 0x9086, 0xDF82,
04453     0x9087, 0xDF83, 0x9088, 0xE5E3, 0x9089, 0xDF84, 0x908A, 0xDF85,
04454     0x908B, 0xE5E5, 0x908C, 0xDF86, 0x908D, 0xDF87, 0x908E, 0xDF88,
04455     0x908F, 0xDF89, 0x9090, 0xDF8A, 0x9091, 0xD2D8, 0x9092, 0xDF8B,
04456     0x9093, 0xB5CB, 0x9094, 0xDF8C, 0x9095, 0xE7DF, 0x9096, 0xDF8D,
04457     0x9097, 0xDAF5, 0x9098, 0xDF8E, 0x9099, 0xDAF8, 0x909A, 0xDF8F,
04458     0x909B, 0xDAF6, 0x909C, 0xDF90, 0x909D, 0xDAF7, 0x909E, 0xDF91,
04459     0x909F, 0xDF92, 0x90A0, 0xDF93, 0x90A1, 0xDAFA, 0x90A2, 0xD0CF,
04460     0x90A3, 0xC4C7, 0x90A4, 0xDF94, 0x90A5, 0xDF95, 0x90A6, 0xB0EE,
04461     0x90A7, 0xDF96, 0x90A8, 0xDF97, 0x90A9, 0xDF98, 0x90AA, 0xD0B0,
04462     0x90AB, 0xDF99, 0x90AC, 0xDAF9, 0x90AD, 0xDF9A, 0x90AE, 0xD3CA,
04463     0x90AF, 0xBAAA, 0x90B0, 0xDBA2, 0x90B1, 0xC7F1, 0x90B2, 0xDF9B,
04464     0x90B3, 0xDAFC, 0x90B4, 0xDAFB, 0x90B5, 0xC9DB, 0x90B6, 0xDAFD,
04465     0x90B7, 0xDF9C, 0x90B8, 0xDBA1, 0x90B9, 0xD7DE, 0x90BA, 0xDAFE,
04466     0x90BB, 0xC1DA, 0x90BC, 0xDF9D, 0x90BD, 0xDF9E, 0x90BE, 0xDBA5,
04467     0x90BF, 0xDF9F, 0x90C0, 0xDFA0, 0x90C1, 0xD3F4, 0x90C2, 0xE040,
04468     0x90C3, 0xE041, 0x90C4, 0xDBA7, 0x90C5, 0xDBA4, 0x90C6, 0xE042,
04469     0x90C7, 0xDBA8, 0x90C8, 0xE043, 0x90C9, 0xE044, 0x90CA, 0xBDBC,
04470     0x90CB, 0xE045, 0x90CC, 0xE046, 0x90CD, 0xE047, 0x90CE, 0xC0C9,
04471     0x90CF, 0xDBA3, 0x90D0, 0xDBA6, 0x90D1, 0xD6A3, 0x90D2, 0xE048,
04472     0x90D3, 0xDBA9, 0x90D4, 0xE049, 0x90D5, 0xE04A, 0x90D6, 0xE04B,
04473     0x90D7, 0xDBAD, 0x90D8, 0xE04C, 0x90D9, 0xE04D, 0x90DA, 0xE04E,
04474     0x90DB, 0xDBAE, 0x90DC, 0xDBAC, 0x90DD, 0xBAC2, 0x90DE, 0xE04F,
04475     0x90DF, 0xE050, 0x90E0, 0xE051, 0x90E1, 0xBFA4, 0x90E2, 0xDBAB,
04476     0x90E3, 0xE052, 0x90E4, 0xE053, 0x90E5, 0xE054, 0x90E6, 0xDBAA,
04477     0x90E7, 0xD4C7, 0x90E8, 0xB2BF, 0x90E9, 0xE055, 0x90EA, 0xE056,
04478     0x90EB, 0xDBAF, 0x90EC, 0xE057, 0x90ED, 0xB9F9, 0x90EE, 0xE058,
04479     0x90EF, 0xDBB0, 0x90F0, 0xE059, 0x90F1, 0xE05A, 0x90F2, 0xE05B,
04480     0x90F3, 0xE05C, 0x90F4, 0xB3BB, 0x90F5, 0xE05D, 0x90F6, 0xE05E,
04481     0x90F7, 0xE05F, 0x90F8, 0xB5A6, 0x90F9, 0xE060, 0x90FA, 0xE061,
04482     0x90FB, 0xE062, 0x90FC, 0xE063, 0x90FD, 0xB6BC, 0x90FE, 0xDBB1,
04483     0x90FF, 0xE064, 0x9100, 0xE065, 0x9101, 0xE066, 0x9102, 0xB6F5,
04484     0x9103, 0xE067, 0x9104, 0xDBB2, 0x9105, 0xE068, 0x9106, 0xE069,
04485     0x9107, 0xE06A, 0x9108, 0xE06B, 0x9109, 0xE06C, 0x910A, 0xE06D,
04486     0x910B, 0xE06E, 0x910C, 0xE06F, 0x910D, 0xE070, 0x910E, 0xE071,
04487     0x910F, 0xE072, 0x9110, 0xE073, 0x9111, 0xE074, 0x9112, 0xE075,
04488     0x9113, 0xE076, 0x9114, 0xE077, 0x9115, 0xE078, 0x9116, 0xE079,
04489     0x9117, 0xE07A, 0x9118, 0xE07B, 0x9119, 0xB1C9, 0x911A, 0xE07C,
04490     0x911B, 0xE07D, 0x911C, 0xE07E, 0x911D, 0xE080, 0x911E, 0xDBB4,
04491     0x911F, 0xE081, 0x9120, 0xE082, 0x9121, 0xE083, 0x9122, 0xDBB3,
04492     0x9123, 0xDBB5, 0x9124, 0xE084, 0x9125, 0xE085, 0x9126, 0xE086,
04493     0x9127, 0xE087, 0x9128, 0xE088, 0x9129, 0xE089, 0x912A, 0xE08A,
04494     0x912B, 0xE08B, 0x912C, 0xE08C, 0x912D, 0xE08D, 0x912E, 0xE08E,
04495     0x912F, 0xDBB7, 0x9130, 0xE08F, 0x9131, 0xDBB6, 0x9132, 0xE090,
04496     0x9133, 0xE091, 0x9134, 0xE092, 0x9135, 0xE093, 0x9136, 0xE094,
04497     0x9137, 0xE095, 0x9138, 0xE096, 0x9139, 0xDBB8, 0x913A, 0xE097,
04498     0x913B, 0xE098, 0x913C, 0xE099, 0x913D, 0xE09A, 0x913E, 0xE09B,
04499     0x913F, 0xE09C, 0x9140, 0xE09D, 0x9141, 0xE09E, 0x9142, 0xE09F,
04500     0x9143, 0xDBB9, 0x9144, 0xE0A0, 0x9145, 0xE140, 0x9146, 0xDBBA,
04501     0x9147, 0xE141, 0x9148, 0xE142, 0x9149, 0xD3CF, 0x914A, 0xF4FA,
04502     0x914B, 0xC7F5, 0x914C, 0xD7C3, 0x914D, 0xC5E4, 0x914E, 0xF4FC,
04503     0x914F, 0xF4FD, 0x9150, 0xF4FB, 0x9151, 0xE143, 0x9152, 0xBEC6,
04504     0x9153, 0xE144, 0x9154, 0xE145, 0x9155, 0xE146, 0x9156, 0xE147,
04505     0x9157, 0xD0EF, 0x9158, 0xE148, 0x9159, 0xE149, 0x915A, 0xB7D3,
04506     0x915B, 0xE14A, 0x915C, 0xE14B, 0x915D, 0xD4CD, 0x915E, 0xCCAA,
04507     0x915F, 0xE14C, 0x9160, 0xE14D, 0x9161, 0xF5A2, 0x9162, 0xF5A1,
04508     0x9163, 0xBAA8, 0x9164, 0xF4FE, 0x9165, 0xCBD6, 0x9166, 0xE14E,
04509     0x9167, 0xE14F, 0x9168, 0xE150, 0x9169, 0xF5A4, 0x916A, 0xC0D2,
04510     0x916B, 0xE151, 0x916C, 0xB3EA, 0x916D, 0xE152, 0x916E, 0xCDAA,
04511     0x916F, 0xF5A5, 0x9170, 0xF5A3, 0x9171, 0xBDB4, 0x9172, 0xF5A8,
04512     0x9173, 0xE153, 0x9174, 0xF5A9, 0x9175, 0xBDCD, 0x9176, 0xC3B8,
04513     0x9177, 0xBFE1, 0x9178, 0xCBE1, 0x9179, 0xF5AA, 0x917A, 0xE154,
04514     0x917B, 0xE155, 0x917C, 0xE156, 0x917D, 0xF5A6, 0x917E, 0xF5A7,
04515     0x917F, 0xC4F0, 0x9180, 0xE157, 0x9181, 0xE158, 0x9182, 0xE159,
04516     0x9183, 0xE15A, 0x9184, 0xE15B, 0x9185, 0xF5AC, 0x9186, 0xE15C,
04517     0x9187, 0xB4BC, 0x9188, 0xE15D, 0x9189, 0xD7ED, 0x918A, 0xE15E,
04518     0x918B, 0xB4D7, 0x918C, 0xF5AB, 0x918D, 0xF5AE, 0x918E, 0xE15F,
04519     0x918F, 0xE160, 0x9190, 0xF5AD, 0x9191, 0xF5AF, 0x9192, 0xD0D1,
04520     0x9193, 0xE161, 0x9194, 0xE162, 0x9195, 0xE163, 0x9196, 0xE164,
04521     0x9197, 0xE165, 0x9198, 0xE166, 0x9199, 0xE167, 0x919A, 0xC3D1,
04522     0x919B, 0xC8A9, 0x919C, 0xE168, 0x919D, 0xE169, 0x919E, 0xE16A,
04523     0x919F, 0xE16B, 0x91A0, 0xE16C, 0x91A1, 0xE16D, 0x91A2, 0xF5B0,
04524     0x91A3, 0xF5B1, 0x91A4, 0xE16E, 0x91A5, 0xE16F, 0x91A6, 0xE170,
04525     0x91A7, 0xE171, 0x91A8, 0xE172, 0x91A9, 0xE173, 0x91AA, 0xF5B2,
04526     0x91AB, 0xE174, 0x91AC, 0xE175, 0x91AD, 0xF5B3, 0x91AE, 0xF5B4,
04527     0x91AF, 0xF5B5, 0x91B0, 0xE176, 0x91B1, 0xE177, 0x91B2, 0xE178,
04528     0x91B3, 0xE179, 0x91B4, 0xF5B7, 0x91B5, 0xF5B6, 0x91B6, 0xE17A,
04529     0x91B7, 0xE17B, 0x91B8, 0xE17C, 0x91B9, 0xE17D, 0x91BA, 0xF5B8,
04530     0x91BB, 0xE17E, 0x91BC, 0xE180, 0x91BD, 0xE181, 0x91BE, 0xE182,
04531     0x91BF, 0xE183, 0x91C0, 0xE184, 0x91C1, 0xE185, 0x91C2, 0xE186,
04532     0x91C3, 0xE187, 0x91C4, 0xE188, 0x91C5, 0xE189, 0x91C6, 0xE18A,
04533     0x91C7, 0xB2C9, 0x91C8, 0xE18B, 0x91C9, 0xD3D4, 0x91CA, 0xCACD,
04534     0x91CB, 0xE18C, 0x91CC, 0xC0EF, 0x91CD, 0xD6D8, 0x91CE, 0xD2B0,
04535     0x91CF, 0xC1BF, 0x91D0, 0xE18D, 0x91D1, 0xBDF0, 0x91D2, 0xE18E,
04536     0x91D3, 0xE18F, 0x91D4, 0xE190, 0x91D5, 0xE191, 0x91D6, 0xE192,
04537     0x91D7, 0xE193, 0x91D8, 0xE194, 0x91D9, 0xE195, 0x91DA, 0xE196,
04538     0x91DB, 0xE197, 0x91DC, 0xB8AA, 0x91DD, 0xE198, 0x91DE, 0xE199,
04539     0x91DF, 0xE19A, 0x91E0, 0xE19B, 0x91E1, 0xE19C, 0x91E2, 0xE19D,
04540     0x91E3, 0xE19E, 0x91E4, 0xE19F, 0x91E5, 0xE1A0, 0x91E6, 0xE240,
04541     0x91E7, 0xE241, 0x91E8, 0xE242, 0x91E9, 0xE243, 0x91EA, 0xE244,
04542     0x91EB, 0xE245, 0x91EC, 0xE246, 0x91ED, 0xE247, 0x91EE, 0xE248,
04543     0x91EF, 0xE249, 0x91F0, 0xE24A, 0x91F1, 0xE24B, 0x91F2, 0xE24C,
04544     0x91F3, 0xE24D, 0x91F4, 0xE24E, 0x91F5, 0xE24F, 0x91F6, 0xE250,
04545     0x91F7, 0xE251, 0x91F8, 0xE252, 0x91F9, 0xE253, 0x91FA, 0xE254,
04546     0x91FB, 0xE255, 0x91FC, 0xE256, 0x91FD, 0xE257, 0x91FE, 0xE258,
04547     0x91FF, 0xE259, 0x9200, 0xE25A, 0x9201, 0xE25B, 0x9202, 0xE25C,
04548     0x9203, 0xE25D, 0x9204, 0xE25E, 0x9205, 0xE25F, 0x9206, 0xE260,
04549     0x9207, 0xE261, 0x9208, 0xE262, 0x9209, 0xE263, 0x920A, 0xE264,
04550     0x920B, 0xE265, 0x920C, 0xE266, 0x920D, 0xE267, 0x920E, 0xE268,
04551     0x920F, 0xE269, 0x9210, 0xE26A, 0x9211, 0xE26B, 0x9212, 0xE26C,
04552     0x9213, 0xE26D, 0x9214, 0xE26E, 0x9215, 0xE26F, 0x9216, 0xE270,
04553     0x9217, 0xE271, 0x9218, 0xE272, 0x9219, 0xE273, 0x921A, 0xE274,
04554     0x921B, 0xE275, 0x921C, 0xE276, 0x921D, 0xE277, 0x921E, 0xE278,
04555     0x921F, 0xE279, 0x9220, 0xE27A, 0x9221, 0xE27B, 0x9222, 0xE27C,
04556     0x9223, 0xE27D, 0x9224, 0xE27E, 0x9225, 0xE280, 0x9226, 0xE281,
04557     0x9227, 0xE282, 0x9228, 0xE283, 0x9229, 0xE284, 0x922A, 0xE285,
04558     0x922B, 0xE286, 0x922C, 0xE287, 0x922D, 0xE288, 0x922E, 0xE289,
04559     0x922F, 0xE28A, 0x9230, 0xE28B, 0x9231, 0xE28C, 0x9232, 0xE28D,
04560     0x9233, 0xE28E, 0x9234, 0xE28F, 0x9235, 0xE290, 0x9236, 0xE291,
04561     0x9237, 0xE292, 0x9238, 0xE293, 0x9239, 0xE294, 0x923A, 0xE295,
04562     0x923B, 0xE296, 0x923C, 0xE297, 0x923D, 0xE298, 0x923E, 0xE299,
04563     0x923F, 0xE29A, 0x9240, 0xE29B, 0x9241, 0xE29C, 0x9242, 0xE29D,
04564     0x9243, 0xE29E, 0x9244, 0xE29F, 0x9245, 0xE2A0, 0x9246, 0xE340,
04565     0x9247, 0xE341, 0x9248, 0xE342, 0x9249, 0xE343, 0x924A, 0xE344,
04566     0x924B, 0xE345, 0x924C, 0xE346, 0x924D, 0xE347, 0x924E, 0xE348,
04567     0x924F, 0xE349, 0x9250, 0xE34A, 0x9251, 0xE34B, 0x9252, 0xE34C,
04568     0x9253, 0xE34D, 0x9254, 0xE34E, 0x9255, 0xE34F, 0x9256, 0xE350,
04569     0x9257, 0xE351, 0x9258, 0xE352, 0x9259, 0xE353, 0x925A, 0xE354,
04570     0x925B, 0xE355, 0x925C, 0xE356, 0x925D, 0xE357, 0x925E, 0xE358,
04571     0x925F, 0xE359, 0x9260, 0xE35A, 0x9261, 0xE35B, 0x9262, 0xE35C,
04572     0x9263, 0xE35D, 0x9264, 0xE35E, 0x9265, 0xE35F, 0x9266, 0xE360,
04573     0x9267, 0xE361, 0x9268, 0xE362, 0x9269, 0xE363, 0x926A, 0xE364,
04574     0x926B, 0xE365, 0x926C, 0xE366, 0x926D, 0xE367, 0x926E, 0xE368,
04575     0x926F, 0xE369, 0x9270, 0xE36A, 0x9271, 0xE36B, 0x9272, 0xE36C,
04576     0x9273, 0xE36D, 0x9274, 0xBCF8, 0x9275, 0xE36E, 0x9276, 0xE36F,
04577     0x9277, 0xE370, 0x9278, 0xE371, 0x9279, 0xE372, 0x927A, 0xE373,
04578     0x927B, 0xE374, 0x927C, 0xE375, 0x927D, 0xE376, 0x927E, 0xE377,
04579     0x927F, 0xE378, 0x9280, 0xE379, 0x9281, 0xE37A, 0x9282, 0xE37B,
04580     0x9283, 0xE37C, 0x9284, 0xE37D, 0x9285, 0xE37E, 0x9286, 0xE380,
04581     0x9287, 0xE381, 0x9288, 0xE382, 0x9289, 0xE383, 0x928A, 0xE384,
04582     0x928B, 0xE385, 0x928C, 0xE386, 0x928D, 0xE387, 0x928E, 0xF6C6,
04583     0x928F, 0xE388, 0x9290, 0xE389, 0x9291, 0xE38A, 0x9292, 0xE38B,
04584     0x9293, 0xE38C, 0x9294, 0xE38D, 0x9295, 0xE38E, 0x9296, 0xE38F,
04585     0x9297, 0xE390, 0x9298, 0xE391, 0x9299, 0xE392, 0x929A, 0xE393,
04586     0x929B, 0xE394, 0x929C, 0xE395, 0x929D, 0xE396, 0x929E, 0xE397,
04587     0x929F, 0xE398, 0x92A0, 0xE399, 0x92A1, 0xE39A, 0x92A2, 0xE39B,
04588     0x92A3, 0xE39C, 0x92A4, 0xE39D, 0x92A5, 0xE39E, 0x92A6, 0xE39F,
04589     0x92A7, 0xE3A0, 0x92A8, 0xE440, 0x92A9, 0xE441, 0x92AA, 0xE442,
04590     0x92AB, 0xE443, 0x92AC, 0xE444, 0x92AD, 0xE445, 0x92AE, 0xF6C7,
04591     0x92AF, 0xE446, 0x92B0, 0xE447, 0x92B1, 0xE448, 0x92B2, 0xE449,
04592     0x92B3, 0xE44A, 0x92B4, 0xE44B, 0x92B5, 0xE44C, 0x92B6, 0xE44D,
04593     0x92B7, 0xE44E, 0x92B8, 0xE44F, 0x92B9, 0xE450, 0x92BA, 0xE451,
04594     0x92BB, 0xE452, 0x92BC, 0xE453, 0x92BD, 0xE454, 0x92BE, 0xE455,
04595     0x92BF, 0xE456, 0x92C0, 0xE457, 0x92C1, 0xE458, 0x92C2, 0xE459,
04596     0x92C3, 0xE45A, 0x92C4, 0xE45B, 0x92C5, 0xE45C, 0x92C6, 0xE45D,
04597     0x92C7, 0xE45E, 0x92C8, 0xF6C8, 0x92C9, 0xE45F, 0x92CA, 0xE460,
04598     0x92CB, 0xE461, 0x92CC, 0xE462, 0x92CD, 0xE463, 0x92CE, 0xE464,
04599     0x92CF, 0xE465, 0x92D0, 0xE466, 0x92D1, 0xE467, 0x92D2, 0xE468,
04600     0x92D3, 0xE469, 0x92D4, 0xE46A, 0x92D5, 0xE46B, 0x92D6, 0xE46C,
04601     0x92D7, 0xE46D, 0x92D8, 0xE46E, 0x92D9, 0xE46F, 0x92DA, 0xE470,
04602     0x92DB, 0xE471, 0x92DC, 0xE472, 0x92DD, 0xE473, 0x92DE, 0xE474,
04603     0x92DF, 0xE475, 0x92E0, 0xE476, 0x92E1, 0xE477, 0x92E2, 0xE478,
04604     0x92E3, 0xE479, 0x92E4, 0xE47A, 0x92E5, 0xE47B, 0x92E6, 0xE47C,
04605     0x92E7, 0xE47D, 0x92E8, 0xE47E, 0x92E9, 0xE480, 0x92EA, 0xE481,
04606     0x92EB, 0xE482, 0x92EC, 0xE483, 0x92ED, 0xE484, 0x92EE, 0xE485,
04607     0x92EF, 0xE486, 0x92F0, 0xE487, 0x92F1, 0xE488, 0x92F2, 0xE489,
04608     0x92F3, 0xE48A, 0x92F4, 0xE48B, 0x92F5, 0xE48C, 0x92F6, 0xE48D,
04609     0x92F7, 0xE48E, 0x92F8, 0xE48F, 0x92F9, 0xE490, 0x92FA, 0xE491,
04610     0x92FB, 0xE492, 0x92FC, 0xE493, 0x92FD, 0xE494, 0x92FE, 0xE495,
04611     0x92FF, 0xE496, 0x9300, 0xE497, 0x9301, 0xE498, 0x9302, 0xE499,
04612     0x9303, 0xE49A, 0x9304, 0xE49B, 0x9305, 0xE49C, 0x9306, 0xE49D,
04613     0x9307, 0xE49E, 0x9308, 0xE49F, 0x9309, 0xE4A0, 0x930A, 0xE540,
04614     0x930B, 0xE541, 0x930C, 0xE542, 0x930D, 0xE543, 0x930E, 0xE544,
04615     0x930F, 0xE545, 0x9310, 0xE546, 0x9311, 0xE547, 0x9312, 0xE548,
04616     0x9313, 0xE549, 0x9314, 0xE54A, 0x9315, 0xE54B, 0x9316, 0xE54C,
04617     0x9317, 0xE54D, 0x9318, 0xE54E, 0x9319, 0xE54F, 0x931A, 0xE550,
04618     0x931B, 0xE551, 0x931C, 0xE552, 0x931D, 0xE553, 0x931E, 0xE554,
04619     0x931F, 0xE555, 0x9320, 0xE556, 0x9321, 0xE557, 0x9322, 0xE558,
04620     0x9323, 0xE559, 0x9324, 0xE55A, 0x9325, 0xE55B, 0x9326, 0xE55C,
04621     0x9327, 0xE55D, 0x9328, 0xE55E, 0x9329, 0xE55F, 0x932A, 0xE560,
04622     0x932B, 0xE561, 0x932C, 0xE562, 0x932D, 0xE563, 0x932E, 0xE564,
04623     0x932F, 0xE565, 0x9330, 0xE566, 0x9331, 0xE567, 0x9332, 0xE568,
04624     0x9333, 0xE569, 0x9334, 0xE56A, 0x9335, 0xE56B, 0x9336, 0xE56C,
04625     0x9337, 0xE56D, 0x9338, 0xE56E, 0x9339, 0xE56F, 0x933A, 0xE570,
04626     0x933B, 0xE571, 0x933C, 0xE572, 0x933D, 0xE573, 0x933E, 0xF6C9,
04627     0x933F, 0xE574, 0x9340, 0xE575, 0x9341, 0xE576, 0x9342, 0xE577,
04628     0x9343, 0xE578, 0x9344, 0xE579, 0x9345, 0xE57A, 0x9346, 0xE57B,
04629     0x9347, 0xE57C, 0x9348, 0xE57D, 0x9349, 0xE57E, 0x934A, 0xE580,
04630     0x934B, 0xE581, 0x934C, 0xE582, 0x934D, 0xE583, 0x934E, 0xE584,
04631     0x934F, 0xE585, 0x9350, 0xE586, 0x9351, 0xE587, 0x9352, 0xE588,
04632     0x9353, 0xE589, 0x9354, 0xE58A, 0x9355, 0xE58B, 0x9356, 0xE58C,
04633     0x9357, 0xE58D, 0x9358, 0xE58E, 0x9359, 0xE58F, 0x935A, 0xE590,
04634     0x935B, 0xE591, 0x935C, 0xE592, 0x935D, 0xE593, 0x935E, 0xE594,
04635     0x935F, 0xE595, 0x9360, 0xE596, 0x9361, 0xE597, 0x9362, 0xE598,
04636     0x9363, 0xE599, 0x9364, 0xE59A, 0x9365, 0xE59B, 0x9366, 0xE59C,
04637     0x9367, 0xE59D, 0x9368, 0xE59E, 0x9369, 0xE59F, 0x936A, 0xF6CA,
04638     0x936B, 0xE5A0, 0x936C, 0xE640, 0x936D, 0xE641, 0x936E, 0xE642,
04639     0x936F, 0xE643, 0x9370, 0xE644, 0x9371, 0xE645, 0x9372, 0xE646,
04640     0x9373, 0xE647, 0x9374, 0xE648, 0x9375, 0xE649, 0x9376, 0xE64A,
04641     0x9377, 0xE64B, 0x9378, 0xE64C, 0x9379, 0xE64D, 0x937A, 0xE64E,
04642     0x937B, 0xE64F, 0x937C, 0xE650, 0x937D, 0xE651, 0x937E, 0xE652,
04643     0x937F, 0xE653, 0x9380, 0xE654, 0x9381, 0xE655, 0x9382, 0xE656,
04644     0x9383, 0xE657, 0x9384, 0xE658, 0x9385, 0xE659, 0x9386, 0xE65A,
04645     0x9387, 0xE65B, 0x9388, 0xE65C, 0x9389, 0xE65D, 0x938A, 0xE65E,
04646     0x938B, 0xE65F, 0x938C, 0xE660, 0x938D, 0xE661, 0x938E, 0xE662,
04647     0x938F, 0xF6CC, 0x9390, 0xE663, 0x9391, 0xE664, 0x9392, 0xE665,
04648     0x9393, 0xE666, 0x9394, 0xE667, 0x9395, 0xE668, 0x9396, 0xE669,
04649     0x9397, 0xE66A, 0x9398, 0xE66B, 0x9399, 0xE66C, 0x939A, 0xE66D,
04650     0x939B, 0xE66E, 0x939C, 0xE66F, 0x939D, 0xE670, 0x939E, 0xE671,
04651     0x939F, 0xE672, 0x93A0, 0xE673, 0x93A1, 0xE674, 0x93A2, 0xE675,
04652     0x93A3, 0xE676, 0x93A4, 0xE677, 0x93A5, 0xE678, 0x93A6, 0xE679,
04653     0x93A7, 0xE67A, 0x93A8, 0xE67B, 0x93A9, 0xE67C, 0x93AA, 0xE67D,
04654     0x93AB, 0xE67E, 0x93AC, 0xE680, 0x93AD, 0xE681, 0x93AE, 0xE682,
04655     0x93AF, 0xE683, 0x93B0, 0xE684, 0x93B1, 0xE685, 0x93B2, 0xE686,
04656     0x93B3, 0xE687, 0x93B4, 0xE688, 0x93B5, 0xE689, 0x93B6, 0xE68A,
04657     0x93B7, 0xE68B, 0x93B8, 0xE68C, 0x93B9, 0xE68D, 0x93BA, 0xE68E,
04658     0x93BB, 0xE68F, 0x93BC, 0xE690, 0x93BD, 0xE691, 0x93BE, 0xE692,
04659     0x93BF, 0xE693, 0x93C0, 0xE694, 0x93C1, 0xE695, 0x93C2, 0xE696,
04660     0x93C3, 0xE697, 0x93C4, 0xE698, 0x93C5, 0xE699, 0x93C6, 0xE69A,
04661     0x93C7, 0xE69B, 0x93C8, 0xE69C, 0x93C9, 0xE69D, 0x93CA, 0xF6CB,
04662     0x93CB, 0xE69E, 0x93CC, 0xE69F, 0x93CD, 0xE6A0, 0x93CE, 0xE740,
04663     0x93CF, 0xE741, 0x93D0, 0xE742, 0x93D1, 0xE743, 0x93D2, 0xE744,
04664     0x93D3, 0xE745, 0x93D4, 0xE746, 0x93D5, 0xE747, 0x93D6, 0xF7E9,
04665     0x93D7, 0xE748, 0x93D8, 0xE749, 0x93D9, 0xE74A, 0x93DA, 0xE74B,
04666     0x93DB, 0xE74C, 0x93DC, 0xE74D, 0x93DD, 0xE74E, 0x93DE, 0xE74F,
04667     0x93DF, 0xE750, 0x93E0, 0xE751, 0x93E1, 0xE752, 0x93E2, 0xE753,
04668     0x93E3, 0xE754, 0x93E4, 0xE755, 0x93E5, 0xE756, 0x93E6, 0xE757,
04669     0x93E7, 0xE758, 0x93E8, 0xE759, 0x93E9, 0xE75A, 0x93EA, 0xE75B,
04670     0x93EB, 0xE75C, 0x93EC, 0xE75D, 0x93ED, 0xE75E, 0x93EE, 0xE75F,
04671     0x93EF, 0xE760, 0x93F0, 0xE761, 0x93F1, 0xE762, 0x93F2, 0xE763,
04672     0x93F3, 0xE764, 0x93F4, 0xE765, 0x93F5, 0xE766, 0x93F6, 0xE767,
04673     0x93F7, 0xE768, 0x93F8, 0xE769, 0x93F9, 0xE76A, 0x93FA, 0xE76B,
04674     0x93FB, 0xE76C, 0x93FC, 0xE76D, 0x93FD, 0xE76E, 0x93FE, 0xE76F,
04675     0x93FF, 0xE770, 0x9400, 0xE771, 0x9401, 0xE772, 0x9402, 0xE773,
04676     0x9403, 0xE774, 0x9404, 0xE775, 0x9405, 0xE776, 0x9406, 0xE777,
04677     0x9407, 0xE778, 0x9408, 0xE779, 0x9409, 0xE77A, 0x940A, 0xE77B,
04678     0x940B, 0xE77C, 0x940C, 0xE77D, 0x940D, 0xE77E, 0x940E, 0xE780,
04679     0x940F, 0xE781, 0x9410, 0xE782, 0x9411, 0xE783, 0x9412, 0xE784,
04680     0x9413, 0xE785, 0x9414, 0xE786, 0x9415, 0xE787, 0x9416, 0xE788,
04681     0x9417, 0xE789, 0x9418, 0xE78A, 0x9419, 0xE78B, 0x941A, 0xE78C,
04682     0x941B, 0xE78D, 0x941C, 0xE78E, 0x941D, 0xE78F, 0x941E, 0xE790,
04683     0x941F, 0xE791, 0x9420, 0xE792, 0x9421, 0xE793, 0x9422, 0xE794,
04684     0x9423, 0xE795, 0x9424, 0xE796, 0x9425, 0xE797, 0x9426, 0xE798,
04685     0x9427, 0xE799, 0x9428, 0xE79A, 0x9429, 0xE79B, 0x942A, 0xE79C,
04686     0x942B, 0xE79D, 0x942C, 0xE79E, 0x942D, 0xE79F, 0x942E, 0xE7A0,
04687     0x942F, 0xE840, 0x9430, 0xE841, 0x9431, 0xE842, 0x9432, 0xE843,
04688     0x9433, 0xE844, 0x9434, 0xE845, 0x9435, 0xE846, 0x9436, 0xE847,
04689     0x9437, 0xE848, 0x9438, 0xE849, 0x9439, 0xE84A, 0x943A, 0xE84B,
04690     0x943B, 0xE84C, 0x943C, 0xE84D, 0x943D, 0xE84E, 0x943E, 0xF6CD,
04691     0x943F, 0xE84F, 0x9440, 0xE850, 0x9441, 0xE851, 0x9442, 0xE852,
04692     0x9443, 0xE853, 0x9444, 0xE854, 0x9445, 0xE855, 0x9446, 0xE856,
04693     0x9447, 0xE857, 0x9448, 0xE858, 0x9449, 0xE859, 0x944A, 0xE85A,
04694     0x944B, 0xE85B, 0x944C, 0xE85C, 0x944D, 0xE85D, 0x944E, 0xE85E,
04695     0x944F, 0xE85F, 0x9450, 0xE860, 0x9451, 0xE861, 0x9452, 0xE862,
04696     0x9453, 0xE863, 0x9454, 0xE864, 0x9455, 0xE865, 0x9456, 0xE866,
04697     0x9457, 0xE867, 0x9458, 0xE868, 0x9459, 0xE869, 0x945A, 0xE86A,
04698     0x945B, 0xE86B, 0x945C, 0xE86C, 0x945D, 0xE86D, 0x945E, 0xE86E,
04699     0x945F, 0xE86F, 0x9460, 0xE870, 0x9461, 0xE871, 0x9462, 0xE872,
04700     0x9463, 0xE873, 0x9464, 0xE874, 0x9465, 0xE875, 0x9466, 0xE876,
04701     0x9467, 0xE877, 0x9468, 0xE878, 0x9469, 0xE879, 0x946A, 0xE87A,
04702     0x946B, 0xF6CE, 0x946C, 0xE87B, 0x946D, 0xE87C, 0x946E, 0xE87D,
04703     0x946F, 0xE87E, 0x9470, 0xE880, 0x9471, 0xE881, 0x9472, 0xE882,
04704     0x9473, 0xE883, 0x9474, 0xE884, 0x9475, 0xE885, 0x9476, 0xE886,
04705     0x9477, 0xE887, 0x9478, 0xE888, 0x9479, 0xE889, 0x947A, 0xE88A,
04706     0x947B, 0xE88B, 0x947C, 0xE88C, 0x947D, 0xE88D, 0x947E, 0xE88E,
04707     0x947F, 0xE88F, 0x9480, 0xE890, 0x9481, 0xE891, 0x9482, 0xE892,
04708     0x9483, 0xE893, 0x9484, 0xE894, 0x9485, 0xEEC4, 0x9486, 0xEEC5,
04709     0x9487, 0xEEC6, 0x9488, 0xD5EB, 0x9489, 0xB6A4, 0x948A, 0xEEC8,
04710     0x948B, 0xEEC7, 0x948C, 0xEEC9, 0x948D, 0xEECA, 0x948E, 0xC7A5,
04711     0x948F, 0xEECB, 0x9490, 0xEECC, 0x9491, 0xE895, 0x9492, 0xB7B0,
04712     0x9493, 0xB5F6, 0x9494, 0xEECD, 0x9495, 0xEECF, 0x9496, 0xE896,
04713     0x9497, 0xEECE, 0x9498, 0xE897, 0x9499, 0xB8C6, 0x949A, 0xEED0,
04714     0x949B, 0xEED1, 0x949C, 0xEED2, 0x949D, 0xB6DB, 0x949E, 0xB3AE,
04715     0x949F, 0xD6D3, 0x94A0, 0xC4C6, 0x94A1, 0xB1B5, 0x94A2, 0xB8D6,
04716     0x94A3, 0xEED3, 0x94A4, 0xEED4, 0x94A5, 0xD4BF, 0x94A6, 0xC7D5,
04717     0x94A7, 0xBEFB, 0x94A8, 0xCED9, 0x94A9, 0xB9B3, 0x94AA, 0xEED6,
04718     0x94AB, 0xEED5, 0x94AC, 0xEED8, 0x94AD, 0xEED7, 0x94AE, 0xC5A5,
04719     0x94AF, 0xEED9, 0x94B0, 0xEEDA, 0x94B1, 0xC7AE, 0x94B2, 0xEEDB,
04720     0x94B3, 0xC7AF, 0x94B4, 0xEEDC, 0x94B5, 0xB2A7, 0x94B6, 0xEEDD,
04721     0x94B7, 0xEEDE, 0x94B8, 0xEEDF, 0x94B9, 0xEEE0, 0x94BA, 0xEEE1,
04722     0x94BB, 0xD7EA, 0x94BC, 0xEEE2, 0x94BD, 0xEEE3, 0x94BE, 0xBCD8,
04723     0x94BF, 0xEEE4, 0x94C0, 0xD3CB, 0x94C1, 0xCCFA, 0x94C2, 0xB2AC,
04724     0x94C3, 0xC1E5, 0x94C4, 0xEEE5, 0x94C5, 0xC7A6, 0x94C6, 0xC3AD,
04725     0x94C7, 0xE898, 0x94C8, 0xEEE6, 0x94C9, 0xEEE7, 0x94CA, 0xEEE8,
04726     0x94CB, 0xEEE9, 0x94CC, 0xEEEA, 0x94CD, 0xEEEB, 0x94CE, 0xEEEC,
04727     0x94CF, 0xE899, 0x94D0, 0xEEED, 0x94D1, 0xEEEE, 0x94D2, 0xEEEF,
04728     0x94D3, 0xE89A, 0x94D4, 0xE89B, 0x94D5, 0xEEF0, 0x94D6, 0xEEF1,
04729     0x94D7, 0xEEF2, 0x94D8, 0xEEF4, 0x94D9, 0xEEF3, 0x94DA, 0xE89C,
04730     0x94DB, 0xEEF5, 0x94DC, 0xCDAD, 0x94DD, 0xC2C1, 0x94DE, 0xEEF6,
04731     0x94DF, 0xEEF7, 0x94E0, 0xEEF8, 0x94E1, 0xD5A1, 0x94E2, 0xEEF9,
04732     0x94E3, 0xCFB3, 0x94E4, 0xEEFA, 0x94E5, 0xEEFB, 0x94E6, 0xE89D,
04733     0x94E7, 0xEEFC, 0x94E8, 0xEEFD, 0x94E9, 0xEFA1, 0x94EA, 0xEEFE,
04734     0x94EB, 0xEFA2, 0x94EC, 0xB8F5, 0x94ED, 0xC3FA, 0x94EE, 0xEFA3,
04735     0x94EF, 0xEFA4, 0x94F0, 0xBDC2, 0x94F1, 0xD2BF, 0x94F2, 0xB2F9,
04736     0x94F3, 0xEFA5, 0x94F4, 0xEFA6, 0x94F5, 0xEFA7, 0x94F6, 0xD2F8,
04737     0x94F7, 0xEFA8, 0x94F8, 0xD6FD, 0x94F9, 0xEFA9, 0x94FA, 0xC6CC,
04738     0x94FB, 0xE89E, 0x94FC, 0xEFAA, 0x94FD, 0xEFAB, 0x94FE, 0xC1B4,
04739     0x94FF, 0xEFAC, 0x9500, 0xCFFA, 0x9501, 0xCBF8, 0x9502, 0xEFAE,
04740     0x9503, 0xEFAD, 0x9504, 0xB3FA, 0x9505, 0xB9F8, 0x9506, 0xEFAF,
04741     0x9507, 0xEFB0, 0x9508, 0xD0E2, 0x9509, 0xEFB1, 0x950A, 0xEFB2,
04742     0x950B, 0xB7E6, 0x950C, 0xD0BF, 0x950D, 0xEFB3, 0x950E, 0xEFB4,
04743     0x950F, 0xEFB5, 0x9510, 0xC8F1, 0x9511, 0xCCE0, 0x9512, 0xEFB6,
04744     0x9513, 0xEFB7, 0x9514, 0xEFB8, 0x9515, 0xEFB9, 0x9516, 0xEFBA,
04745     0x9517, 0xD5E0, 0x9518, 0xEFBB, 0x9519, 0xB4ED, 0x951A, 0xC3AA,
04746     0x951B, 0xEFBC, 0x951C, 0xE89F, 0x951D, 0xEFBD, 0x951E, 0xEFBE,
04747     0x951F, 0xEFBF, 0x9520, 0xE8A0, 0x9521, 0xCEFD, 0x9522, 0xEFC0,
04748     0x9523, 0xC2E0, 0x9524, 0xB4B8, 0x9525, 0xD7B6, 0x9526, 0xBDF5,
04749     0x9527, 0xE940, 0x9528, 0xCFC7, 0x9529, 0xEFC3, 0x952A, 0xEFC1,
04750     0x952B, 0xEFC2, 0x952C, 0xEFC4, 0x952D, 0xB6A7, 0x952E, 0xBCFC,
04751     0x952F, 0xBEE2, 0x9530, 0xC3CC, 0x9531, 0xEFC5, 0x9532, 0xEFC6,
04752     0x9533, 0xE941, 0x9534, 0xEFC7, 0x9535, 0xEFCF, 0x9536, 0xEFC8,
04753     0x9537, 0xEFC9, 0x9538, 0xEFCA, 0x9539, 0xC7C2, 0x953A, 0xEFF1,
04754     0x953B, 0xB6CD, 0x953C, 0xEFCB, 0x953D, 0xE942, 0x953E, 0xEFCC,
04755     0x953F, 0xEFCD, 0x9540, 0xB6C6, 0x9541, 0xC3BE, 0x9542, 0xEFCE,
04756     0x9543, 0xE943, 0x9544, 0xEFD0, 0x9545, 0xEFD1, 0x9546, 0xEFD2,
04757     0x9547, 0xD5F2, 0x9548, 0xE944, 0x9549, 0xEFD3, 0x954A, 0xC4F7,
04758     0x954B, 0xE945, 0x954C, 0xEFD4, 0x954D, 0xC4F8, 0x954E, 0xEFD5,
04759     0x954F, 0xEFD6, 0x9550, 0xB8E4, 0x9551, 0xB0F7, 0x9552, 0xEFD7,
04760     0x9553, 0xEFD8, 0x9554, 0xEFD9, 0x9555, 0xE946, 0x9556, 0xEFDA,
04761     0x9557, 0xEFDB, 0x9558, 0xEFDC, 0x9559, 0xEFDD, 0x955A, 0xE947,
04762     0x955B, 0xEFDE, 0x955C, 0xBEB5, 0x955D, 0xEFE1, 0x955E, 0xEFDF,
04763     0x955F, 0xEFE0, 0x9560, 0xE948, 0x9561, 0xEFE2, 0x9562, 0xEFE3,
04764     0x9563, 0xC1CD, 0x9564, 0xEFE4, 0x9565, 0xEFE5, 0x9566, 0xEFE6,
04765     0x9567, 0xEFE7, 0x9568, 0xEFE8, 0x9569, 0xEFE9, 0x956A, 0xEFEA,
04766     0x956B, 0xEFEB, 0x956C, 0xEFEC, 0x956D, 0xC0D8, 0x956E, 0xE949,
04767     0x956F, 0xEFED, 0x9570, 0xC1AD, 0x9571, 0xEFEE, 0x9572, 0xEFEF,
04768     0x9573, 0xEFF0, 0x9574, 0xE94A, 0x9575, 0xE94B, 0x9576, 0xCFE2,
04769     0x9577, 0xE94C, 0x9578, 0xE94D, 0x9579, 0xE94E, 0x957A, 0xE94F,
04770     0x957B, 0xE950, 0x957C, 0xE951, 0x957D, 0xE952, 0x957E, 0xE953,
04771     0x957F, 0xB3A4, 0x9580, 0xE954, 0x9581, 0xE955, 0x9582, 0xE956,
04772     0x9583, 0xE957, 0x9584, 0xE958, 0x9585, 0xE959, 0x9586, 0xE95A,
04773     0x9587, 0xE95B, 0x9588, 0xE95C, 0x9589, 0xE95D, 0x958A, 0xE95E,
04774     0x958B, 0xE95F, 0x958C, 0xE960, 0x958D, 0xE961, 0x958E, 0xE962,
04775     0x958F, 0xE963, 0x9590, 0xE964, 0x9591, 0xE965, 0x9592, 0xE966,
04776     0x9593, 0xE967, 0x9594, 0xE968, 0x9595, 0xE969, 0x9596, 0xE96A,
04777     0x9597, 0xE96B, 0x9598, 0xE96C, 0x9599, 0xE96D, 0x959A, 0xE96E,
04778     0x959B, 0xE96F, 0x959C, 0xE970, 0x959D, 0xE971, 0x959E, 0xE972,
04779     0x959F, 0xE973, 0x95A0, 0xE974, 0x95A1, 0xE975, 0x95A2, 0xE976,
04780     0x95A3, 0xE977, 0x95A4, 0xE978, 0x95A5, 0xE979, 0x95A6, 0xE97A,
04781     0x95A7, 0xE97B, 0x95A8, 0xE97C, 0x95A9, 0xE97D, 0x95AA, 0xE97E,
04782     0x95AB, 0xE980, 0x95AC, 0xE981, 0x95AD, 0xE982, 0x95AE, 0xE983,
04783     0x95AF, 0xE984, 0x95B0, 0xE985, 0x95B1, 0xE986, 0x95B2, 0xE987,
04784     0x95B3, 0xE988, 0x95B4, 0xE989, 0x95B5, 0xE98A, 0x95B6, 0xE98B,
04785     0x95B7, 0xE98C, 0x95B8, 0xE98D, 0x95B9, 0xE98E, 0x95BA, 0xE98F,
04786     0x95BB, 0xE990, 0x95BC, 0xE991, 0x95BD, 0xE992, 0x95BE, 0xE993,
04787     0x95BF, 0xE994, 0x95C0, 0xE995, 0x95C1, 0xE996, 0x95C2, 0xE997,
04788     0x95C3, 0xE998, 0x95C4, 0xE999, 0x95C5, 0xE99A, 0x95C6, 0xE99B,
04789     0x95C7, 0xE99C, 0x95C8, 0xE99D, 0x95C9, 0xE99E, 0x95CA, 0xE99F,
04790     0x95CB, 0xE9A0, 0x95CC, 0xEA40, 0x95CD, 0xEA41, 0x95CE, 0xEA42,
04791     0x95CF, 0xEA43, 0x95D0, 0xEA44, 0x95D1, 0xEA45, 0x95D2, 0xEA46,
04792     0x95D3, 0xEA47, 0x95D4, 0xEA48, 0x95D5, 0xEA49, 0x95D6, 0xEA4A,
04793     0x95D7, 0xEA4B, 0x95D8, 0xEA4C, 0x95D9, 0xEA4D, 0x95DA, 0xEA4E,
04794     0x95DB, 0xEA4F, 0x95DC, 0xEA50, 0x95DD, 0xEA51, 0x95DE, 0xEA52,
04795     0x95DF, 0xEA53, 0x95E0, 0xEA54, 0x95E1, 0xEA55, 0x95E2, 0xEA56,
04796     0x95E3, 0xEA57, 0x95E4, 0xEA58, 0x95E5, 0xEA59, 0x95E6, 0xEA5A,
04797     0x95E7, 0xEA5B, 0x95E8, 0xC3C5, 0x95E9, 0xE3C5, 0x95EA, 0xC9C1,
04798     0x95EB, 0xE3C6, 0x95EC, 0xEA5C, 0x95ED, 0xB1D5, 0x95EE, 0xCECA,
04799     0x95EF, 0xB4B3, 0x95F0, 0xC8F2, 0x95F1, 0xE3C7, 0x95F2, 0xCFD0,
04800     0x95F3, 0xE3C8, 0x95F4, 0xBCE4, 0x95F5, 0xE3C9, 0x95F6, 0xE3CA,
04801     0x95F7, 0xC3C6, 0x95F8, 0xD5A2, 0x95F9, 0xC4D6, 0x95FA, 0xB9EB,
04802     0x95FB, 0xCEC5, 0x95FC, 0xE3CB, 0x95FD, 0xC3F6, 0x95FE, 0xE3CC,
04803     0x95FF, 0xEA5D, 0x9600, 0xB7A7, 0x9601, 0xB8F3, 0x9602, 0xBAD2,
04804     0x9603, 0xE3CD, 0x9604, 0xE3CE, 0x9605, 0xD4C4, 0x9606, 0xE3CF,
04805     0x9607, 0xEA5E, 0x9608, 0xE3D0, 0x9609, 0xD1CB, 0x960A, 0xE3D1,
04806     0x960B, 0xE3D2, 0x960C, 0xE3D3, 0x960D, 0xE3D4, 0x960E, 0xD1D6,
04807     0x960F, 0xE3D5, 0x9610, 0xB2FB, 0x9611, 0xC0BB, 0x9612, 0xE3D6,
04808     0x9613, 0xEA5F, 0x9614, 0xC0AB, 0x9615, 0xE3D7, 0x9616, 0xE3D8,
04809     0x9617, 0xE3D9, 0x9618, 0xEA60, 0x9619, 0xE3DA, 0x961A, 0xE3DB,
04810     0x961B, 0xEA61, 0x961C, 0xB8B7, 0x961D, 0xDAE2, 0x961E, 0xEA62,
04811     0x961F, 0xB6D3, 0x9620, 0xEA63, 0x9621, 0xDAE4, 0x9622, 0xDAE3,
04812     0x9623, 0xEA64, 0x9624, 0xEA65, 0x9625, 0xEA66, 0x9626, 0xEA67,
04813     0x9627, 0xEA68, 0x9628, 0xEA69, 0x9629, 0xEA6A, 0x962A, 0xDAE6,
04814     0x962B, 0xEA6B, 0x962C, 0xEA6C, 0x962D, 0xEA6D, 0x962E, 0xC8EE,
04815     0x962F, 0xEA6E, 0x9630, 0xEA6F, 0x9631, 0xDAE5, 0x9632, 0xB7C0,
04816     0x9633, 0xD1F4, 0x9634, 0xD2F5, 0x9635, 0xD5F3, 0x9636, 0xBDD7,
04817     0x9637, 0xEA70, 0x9638, 0xEA71, 0x9639, 0xEA72, 0x963A, 0xEA73,
04818     0x963B, 0xD7E8, 0x963C, 0xDAE8, 0x963D, 0xDAE7, 0x963E, 0xEA74,
04819     0x963F, 0xB0A2, 0x9640, 0xCDD3, 0x9641, 0xEA75, 0x9642, 0xDAE9,
04820     0x9643, 0xEA76, 0x9644, 0xB8BD, 0x9645, 0xBCCA, 0x9646, 0xC2BD,
04821     0x9647, 0xC2A4, 0x9648, 0xB3C2, 0x9649, 0xDAEA, 0x964A, 0xEA77,
04822     0x964B, 0xC2AA, 0x964C, 0xC4B0, 0x964D, 0xBDB5, 0x964E, 0xEA78,
04823     0x964F, 0xEA79, 0x9650, 0xCFDE, 0x9651, 0xEA7A, 0x9652, 0xEA7B,
04824     0x9653, 0xEA7C, 0x9654, 0xDAEB, 0x9655, 0xC9C2, 0x9656, 0xEA7D,
04825     0x9657, 0xEA7E, 0x9658, 0xEA80, 0x9659, 0xEA81, 0x965A, 0xEA82,
04826     0x965B, 0xB1DD, 0x965C, 0xEA83, 0x965D, 0xEA84, 0x965E, 0xEA85,
04827     0x965F, 0xDAEC, 0x9660, 0xEA86, 0x9661, 0xB6B8, 0x9662, 0xD4BA,
04828     0x9663, 0xEA87, 0x9664, 0xB3FD, 0x9665, 0xEA88, 0x9666, 0xEA89,
04829     0x9667, 0xDAED, 0x9668, 0xD4C9, 0x9669, 0xCFD5, 0x966A, 0xC5E3,
04830     0x966B, 0xEA8A, 0x966C, 0xDAEE, 0x966D, 0xEA8B, 0x966E, 0xEA8C,
04831     0x966F, 0xEA8D, 0x9670, 0xEA8E, 0x9671, 0xEA8F, 0x9672, 0xDAEF,
04832     0x9673, 0xEA90, 0x9674, 0xDAF0, 0x9675, 0xC1EA, 0x9676, 0xCCD5,
04833     0x9677, 0xCFDD, 0x9678, 0xEA91, 0x9679, 0xEA92, 0x967A, 0xEA93,
04834     0x967B, 0xEA94, 0x967C, 0xEA95, 0x967D, 0xEA96, 0x967E, 0xEA97,
04835     0x967F, 0xEA98, 0x9680, 0xEA99, 0x9681, 0xEA9A, 0x9682, 0xEA9B,
04836     0x9683, 0xEA9C, 0x9684, 0xEA9D, 0x9685, 0xD3E7, 0x9686, 0xC2A1,
04837     0x9687, 0xEA9E, 0x9688, 0xDAF1, 0x9689, 0xEA9F, 0x968A, 0xEAA0,
04838     0x968B, 0xCBE5, 0x968C, 0xEB40, 0x968D, 0xDAF2, 0x968E, 0xEB41,
04839     0x968F, 0xCBE6, 0x9690, 0xD2FE, 0x9691, 0xEB42, 0x9692, 0xEB43,
04840     0x9693, 0xEB44, 0x9694, 0xB8F4, 0x9695, 0xEB45, 0x9696, 0xEB46,
04841     0x9697, 0xDAF3, 0x9698, 0xB0AF, 0x9699, 0xCFB6, 0x969A, 0xEB47,
04842     0x969B, 0xEB48, 0x969C, 0xD5CF, 0x969D, 0xEB49, 0x969E, 0xEB4A,
04843     0x969F, 0xEB4B, 0x96A0, 0xEB4C, 0x96A1, 0xEB4D, 0x96A2, 0xEB4E,
04844     0x96A3, 0xEB4F, 0x96A4, 0xEB50, 0x96A5, 0xEB51, 0x96A6, 0xEB52,
04845     0x96A7, 0xCBED, 0x96A8, 0xEB53, 0x96A9, 0xEB54, 0x96AA, 0xEB55,
04846     0x96AB, 0xEB56, 0x96AC, 0xEB57, 0x96AD, 0xEB58, 0x96AE, 0xEB59,
04847     0x96AF, 0xEB5A, 0x96B0, 0xDAF4, 0x96B1, 0xEB5B, 0x96B2, 0xEB5C,
04848     0x96B3, 0xE3C4, 0x96B4, 0xEB5D, 0x96B5, 0xEB5E, 0x96B6, 0xC1A5,
04849     0x96B7, 0xEB5F, 0x96B8, 0xEB60, 0x96B9, 0xF6BF, 0x96BA, 0xEB61,
04850     0x96BB, 0xEB62, 0x96BC, 0xF6C0, 0x96BD, 0xF6C1, 0x96BE, 0xC4D1,
04851     0x96BF, 0xEB63, 0x96C0, 0xC8B8, 0x96C1, 0xD1E3, 0x96C2, 0xEB64,
04852     0x96C3, 0xEB65, 0x96C4, 0xD0DB, 0x96C5, 0xD1C5, 0x96C6, 0xBCAF,
04853     0x96C7, 0xB9CD, 0x96C8, 0xEB66, 0x96C9, 0xEFF4, 0x96CA, 0xEB67,
04854     0x96CB, 0xEB68, 0x96CC, 0xB4C6, 0x96CD, 0xD3BA, 0x96CE, 0xF6C2,
04855     0x96CF, 0xB3FB, 0x96D0, 0xEB69, 0x96D1, 0xEB6A, 0x96D2, 0xF6C3,
04856     0x96D3, 0xEB6B, 0x96D4, 0xEB6C, 0x96D5, 0xB5F1, 0x96D6, 0xEB6D,
04857     0x96D7, 0xEB6E, 0x96D8, 0xEB6F, 0x96D9, 0xEB70, 0x96DA, 0xEB71,
04858     0x96DB, 0xEB72, 0x96DC, 0xEB73, 0x96DD, 0xEB74, 0x96DE, 0xEB75,
04859     0x96DF, 0xEB76, 0x96E0, 0xF6C5, 0x96E1, 0xEB77, 0x96E2, 0xEB78,
04860     0x96E3, 0xEB79, 0x96E4, 0xEB7A, 0x96E5, 0xEB7B, 0x96E6, 0xEB7C,
04861     0x96E7, 0xEB7D, 0x96E8, 0xD3EA, 0x96E9, 0xF6A7, 0x96EA, 0xD1A9,
04862     0x96EB, 0xEB7E, 0x96EC, 0xEB80, 0x96ED, 0xEB81, 0x96EE, 0xEB82,
04863     0x96EF, 0xF6A9, 0x96F0, 0xEB83, 0x96F1, 0xEB84, 0x96F2, 0xEB85,
04864     0x96F3, 0xF6A8, 0x96F4, 0xEB86, 0x96F5, 0xEB87, 0x96F6, 0xC1E3,
04865     0x96F7, 0xC0D7, 0x96F8, 0xEB88, 0x96F9, 0xB1A2, 0x96FA, 0xEB89,
04866     0x96FB, 0xEB8A, 0x96FC, 0xEB8B, 0x96FD, 0xEB8C, 0x96FE, 0xCEED,
04867     0x96FF, 0xEB8D, 0x9700, 0xD0E8, 0x9701, 0xF6AB, 0x9702, 0xEB8E,
04868     0x9703, 0xEB8F, 0x9704, 0xCFF6, 0x9705, 0xEB90, 0x9706, 0xF6AA,
04869     0x9707, 0xD5F0, 0x9708, 0xF6AC, 0x9709, 0xC3B9, 0x970A, 0xEB91,
04870     0x970B, 0xEB92, 0x970C, 0xEB93, 0x970D, 0xBBF4, 0x970E, 0xF6AE,
04871     0x970F, 0xF6AD, 0x9710, 0xEB94, 0x9711, 0xEB95, 0x9712, 0xEB96,
04872     0x9713, 0xC4DE, 0x9714, 0xEB97, 0x9715, 0xEB98, 0x9716, 0xC1D8,
04873     0x9717, 0xEB99, 0x9718, 0xEB9A, 0x9719, 0xEB9B, 0x971A, 0xEB9C,
04874     0x971B, 0xEB9D, 0x971C, 0xCBAA, 0x971D, 0xEB9E, 0x971E, 0xCFBC,
04875     0x971F, 0xEB9F, 0x9720, 0xEBA0, 0x9721, 0xEC40, 0x9722, 0xEC41,
04876     0x9723, 0xEC42, 0x9724, 0xEC43, 0x9725, 0xEC44, 0x9726, 0xEC45,
04877     0x9727, 0xEC46, 0x9728, 0xEC47, 0x9729, 0xEC48, 0x972A, 0xF6AF,
04878     0x972B, 0xEC49, 0x972C, 0xEC4A, 0x972D, 0xF6B0, 0x972E, 0xEC4B,
04879     0x972F, 0xEC4C, 0x9730, 0xF6B1, 0x9731, 0xEC4D, 0x9732, 0xC2B6,
04880     0x9733, 0xEC4E, 0x9734, 0xEC4F, 0x9735, 0xEC50, 0x9736, 0xEC51,
04881     0x9737, 0xEC52, 0x9738, 0xB0D4, 0x9739, 0xC5F9, 0x973A, 0xEC53,
04882     0x973B, 0xEC54, 0x973C, 0xEC55, 0x973D, 0xEC56, 0x973E, 0xF6B2,
04883     0x973F, 0xEC57, 0x9740, 0xEC58, 0x9741, 0xEC59, 0x9742, 0xEC5A,
04884     0x9743, 0xEC5B, 0x9744, 0xEC5C, 0x9745, 0xEC5D, 0x9746, 0xEC5E,
04885     0x9747, 0xEC5F, 0x9748, 0xEC60, 0x9749, 0xEC61, 0x974A, 0xEC62,
04886     0x974B, 0xEC63, 0x974C, 0xEC64, 0x974D, 0xEC65, 0x974E, 0xEC66,
04887     0x974F, 0xEC67, 0x9750, 0xEC68, 0x9751, 0xEC69, 0x9752, 0xC7E0,
04888     0x9753, 0xF6A6, 0x9754, 0xEC6A, 0x9755, 0xEC6B, 0x9756, 0xBEB8,
04889     0x9757, 0xEC6C, 0x9758, 0xEC6D, 0x9759, 0xBEB2, 0x975A, 0xEC6E,
04890     0x975B, 0xB5E5, 0x975C, 0xEC6F, 0x975D, 0xEC70, 0x975E, 0xB7C7,
04891     0x975F, 0xEC71, 0x9760, 0xBFBF, 0x9761, 0xC3D2, 0x9762, 0xC3E6,
04892     0x9763, 0xEC72, 0x9764, 0xEC73, 0x9765, 0xD8CC, 0x9766, 0xEC74,
04893     0x9767, 0xEC75, 0x9768, 0xEC76, 0x9769, 0xB8EF, 0x976A, 0xEC77,
04894     0x976B, 0xEC78, 0x976C, 0xEC79, 0x976D, 0xEC7A, 0x976E, 0xEC7B,
04895     0x976F, 0xEC7C, 0x9770, 0xEC7D, 0x9771, 0xEC7E, 0x9772, 0xEC80,
04896     0x9773, 0xBDF9, 0x9774, 0xD1A5, 0x9775, 0xEC81, 0x9776, 0xB0D0,
04897     0x9777, 0xEC82, 0x9778, 0xEC83, 0x9779, 0xEC84, 0x977A, 0xEC85,
04898     0x977B, 0xEC86, 0x977C, 0xF7B0, 0x977D, 0xEC87, 0x977E, 0xEC88,
04899     0x977F, 0xEC89, 0x9780, 0xEC8A, 0x9781, 0xEC8B, 0x9782, 0xEC8C,
04900     0x9783, 0xEC8D, 0x9784, 0xEC8E, 0x9785, 0xF7B1, 0x9786, 0xEC8F,
04901     0x9787, 0xEC90, 0x9788, 0xEC91, 0x9789, 0xEC92, 0x978A, 0xEC93,
04902     0x978B, 0xD0AC, 0x978C, 0xEC94, 0x978D, 0xB0B0, 0x978E, 0xEC95,
04903     0x978F, 0xEC96, 0x9790, 0xEC97, 0x9791, 0xF7B2, 0x9792, 0xF7B3,
04904     0x9793, 0xEC98, 0x9794, 0xF7B4, 0x9795, 0xEC99, 0x9796, 0xEC9A,
04905     0x9797, 0xEC9B, 0x9798, 0xC7CA, 0x9799, 0xEC9C, 0x979A, 0xEC9D,
04906     0x979B, 0xEC9E, 0x979C, 0xEC9F, 0x979D, 0xECA0, 0x979E, 0xED40,
04907     0x979F, 0xED41, 0x97A0, 0xBECF, 0x97A1, 0xED42, 0x97A2, 0xED43,
04908     0x97A3, 0xF7B7, 0x97A4, 0xED44, 0x97A5, 0xED45, 0x97A6, 0xED46,
04909     0x97A7, 0xED47, 0x97A8, 0xED48, 0x97A9, 0xED49, 0x97AA, 0xED4A,
04910     0x97AB, 0xF7B6, 0x97AC, 0xED4B, 0x97AD, 0xB1DE, 0x97AE, 0xED4C,
04911     0x97AF, 0xF7B5, 0x97B0, 0xED4D, 0x97B1, 0xED4E, 0x97B2, 0xF7B8,
04912     0x97B3, 0xED4F, 0x97B4, 0xF7B9, 0x97B5, 0xED50, 0x97B6, 0xED51,
04913     0x97B7, 0xED52, 0x97B8, 0xED53, 0x97B9, 0xED54, 0x97BA, 0xED55,
04914     0x97BB, 0xED56, 0x97BC, 0xED57, 0x97BD, 0xED58, 0x97BE, 0xED59,
04915     0x97BF, 0xED5A, 0x97C0, 0xED5B, 0x97C1, 0xED5C, 0x97C2, 0xED5D,
04916     0x97C3, 0xED5E, 0x97C4, 0xED5F, 0x97C5, 0xED60, 0x97C6, 0xED61,
04917     0x97C7, 0xED62, 0x97C8, 0xED63, 0x97C9, 0xED64, 0x97CA, 0xED65,
04918     0x97CB, 0xED66, 0x97CC, 0xED67, 0x97CD, 0xED68, 0x97CE, 0xED69,
04919     0x97CF, 0xED6A, 0x97D0, 0xED6B, 0x97D1, 0xED6C, 0x97D2, 0xED6D,
04920     0x97D3, 0xED6E, 0x97D4, 0xED6F, 0x97D5, 0xED70, 0x97D6, 0xED71,
04921     0x97D7, 0xED72, 0x97D8, 0xED73, 0x97D9, 0xED74, 0x97DA, 0xED75,
04922     0x97DB, 0xED76, 0x97DC, 0xED77, 0x97DD, 0xED78, 0x97DE, 0xED79,
04923     0x97DF, 0xED7A, 0x97E0, 0xED7B, 0x97E1, 0xED7C, 0x97E2, 0xED7D,
04924     0x97E3, 0xED7E, 0x97E4, 0xED80, 0x97E5, 0xED81, 0x97E6, 0xCEA4,
04925     0x97E7, 0xC8CD, 0x97E8, 0xED82, 0x97E9, 0xBAAB, 0x97EA, 0xE8B8,
04926     0x97EB, 0xE8B9, 0x97EC, 0xE8BA, 0x97ED, 0xBEC2, 0x97EE, 0xED83,
04927     0x97EF, 0xED84, 0x97F0, 0xED85, 0x97F1, 0xED86, 0x97F2, 0xED87,
04928     0x97F3, 0xD2F4, 0x97F4, 0xED88, 0x97F5, 0xD4CF, 0x97F6, 0xC9D8,
04929     0x97F7, 0xED89, 0x97F8, 0xED8A, 0x97F9, 0xED8B, 0x97FA, 0xED8C,
04930     0x97FB, 0xED8D, 0x97FC, 0xED8E, 0x97FD, 0xED8F, 0x97FE, 0xED90,
04931     0x97FF, 0xED91, 0x9800, 0xED92, 0x9801, 0xED93, 0x9802, 0xED94,
04932     0x9803, 0xED95, 0x9804, 0xED96, 0x9805, 0xED97, 0x9806, 0xED98,
04933     0x9807, 0xED99, 0x9808, 0xED9A, 0x9809, 0xED9B, 0x980A, 0xED9C,
04934     0x980B, 0xED9D, 0x980C, 0xED9E, 0x980D, 0xED9F, 0x980E, 0xEDA0,
04935     0x980F, 0xEE40, 0x9810, 0xEE41, 0x9811, 0xEE42, 0x9812, 0xEE43,
04936     0x9813, 0xEE44, 0x9814, 0xEE45, 0x9815, 0xEE46, 0x9816, 0xEE47,
04937     0x9817, 0xEE48, 0x9818, 0xEE49, 0x9819, 0xEE4A, 0x981A, 0xEE4B,
04938     0x981B, 0xEE4C, 0x981C, 0xEE4D, 0x981D, 0xEE4E, 0x981E, 0xEE4F,
04939     0x981F, 0xEE50, 0x9820, 0xEE51, 0x9821, 0xEE52, 0x9822, 0xEE53,
04940     0x9823, 0xEE54, 0x9824, 0xEE55, 0x9825, 0xEE56, 0x9826, 0xEE57,
04941     0x9827, 0xEE58, 0x9828, 0xEE59, 0x9829, 0xEE5A, 0x982A, 0xEE5B,
04942     0x982B, 0xEE5C, 0x982C, 0xEE5D, 0x982D, 0xEE5E, 0x982E, 0xEE5F,
04943     0x982F, 0xEE60, 0x9830, 0xEE61, 0x9831, 0xEE62, 0x9832, 0xEE63,
04944     0x9833, 0xEE64, 0x9834, 0xEE65, 0x9835, 0xEE66, 0x9836, 0xEE67,
04945     0x9837, 0xEE68, 0x9838, 0xEE69, 0x9839, 0xEE6A, 0x983A, 0xEE6B,
04946     0x983B, 0xEE6C, 0x983C, 0xEE6D, 0x983D, 0xEE6E, 0x983E, 0xEE6F,
04947     0x983F, 0xEE70, 0x9840, 0xEE71, 0x9841, 0xEE72, 0x9842, 0xEE73,
04948     0x9843, 0xEE74, 0x9844, 0xEE75, 0x9845, 0xEE76, 0x9846, 0xEE77,
04949     0x9847, 0xEE78, 0x9848, 0xEE79, 0x9849, 0xEE7A, 0x984A, 0xEE7B,
04950     0x984B, 0xEE7C, 0x984C, 0xEE7D, 0x984D, 0xEE7E, 0x984E, 0xEE80,
04951     0x984F, 0xEE81, 0x9850, 0xEE82, 0x9851, 0xEE83, 0x9852, 0xEE84,
04952     0x9853, 0xEE85, 0x9854, 0xEE86, 0x9855, 0xEE87, 0x9856, 0xEE88,
04953     0x9857, 0xEE89, 0x9858, 0xEE8A, 0x9859, 0xEE8B, 0x985A, 0xEE8C,
04954     0x985B, 0xEE8D, 0x985C, 0xEE8E, 0x985D, 0xEE8F, 0x985E, 0xEE90,
04955     0x985F, 0xEE91, 0x9860, 0xEE92, 0x9861, 0xEE93, 0x9862, 0xEE94,
04956     0x9863, 0xEE95, 0x9864, 0xEE96, 0x9865, 0xEE97, 0x9866, 0xEE98,
04957     0x9867, 0xEE99, 0x9868, 0xEE9A, 0x9869, 0xEE9B, 0x986A, 0xEE9C,
04958     0x986B, 0xEE9D, 0x986C, 0xEE9E, 0x986D, 0xEE9F, 0x986E, 0xEEA0,
04959     0x986F, 0xEF40, 0x9870, 0xEF41, 0x9871, 0xEF42, 0x9872, 0xEF43,
04960     0x9873, 0xEF44, 0x9874, 0xEF45, 0x9875, 0xD2B3, 0x9876, 0xB6A5,
04961     0x9877, 0xC7EA, 0x9878, 0xF1FC, 0x9879, 0xCFEE, 0x987A, 0xCBB3,
04962     0x987B, 0xD0EB, 0x987C, 0xE7EF, 0x987D, 0xCDE7, 0x987E, 0xB9CB,
04963     0x987F, 0xB6D9, 0x9880, 0xF1FD, 0x9881, 0xB0E4, 0x9882, 0xCBCC,
04964     0x9883, 0xF1FE, 0x9884, 0xD4A4, 0x9885, 0xC2AD, 0x9886, 0xC1EC,
04965     0x9887, 0xC6C4, 0x9888, 0xBEB1, 0x9889, 0xF2A1, 0x988A, 0xBCD5,
04966     0x988B, 0xEF46, 0x988C, 0xF2A2, 0x988D, 0xF2A3, 0x988E, 0xEF47,
04967     0x988F, 0xF2A4, 0x9890, 0xD2C3, 0x9891, 0xC6B5, 0x9892, 0xEF48,
04968     0x9893, 0xCDC7, 0x9894, 0xF2A5, 0x9895, 0xEF49, 0x9896, 0xD3B1,
04969     0x9897, 0xBFC5, 0x9898, 0xCCE2, 0x9899, 0xEF4A, 0x989A, 0xF2A6,
04970     0x989B, 0xF2A7, 0x989C, 0xD1D5, 0x989D, 0xB6EE, 0x989E, 0xF2A8,
04971     0x989F, 0xF2A9, 0x98A0, 0xB5DF, 0x98A1, 0xF2AA, 0x98A2, 0xF2AB,
04972     0x98A3, 0xEF4B, 0x98A4, 0xB2FC, 0x98A5, 0xF2AC, 0x98A6, 0xF2AD,
04973     0x98A7, 0xC8A7, 0x98A8, 0xEF4C, 0x98A9, 0xEF4D, 0x98AA, 0xEF4E,
04974     0x98AB, 0xEF4F, 0x98AC, 0xEF50, 0x98AD, 0xEF51, 0x98AE, 0xEF52,
04975     0x98AF, 0xEF53, 0x98B0, 0xEF54, 0x98B1, 0xEF55, 0x98B2, 0xEF56,
04976     0x98B3, 0xEF57, 0x98B4, 0xEF58, 0x98B5, 0xEF59, 0x98B6, 0xEF5A,
04977     0x98B7, 0xEF5B, 0x98B8, 0xEF5C, 0x98B9, 0xEF5D, 0x98BA, 0xEF5E,
04978     0x98BB, 0xEF5F, 0x98BC, 0xEF60, 0x98BD, 0xEF61, 0x98BE, 0xEF62,
04979     0x98BF, 0xEF63, 0x98C0, 0xEF64, 0x98C1, 0xEF65, 0x98C2, 0xEF66,
04980     0x98C3, 0xEF67, 0x98C4, 0xEF68, 0x98C5, 0xEF69, 0x98C6, 0xEF6A,
04981     0x98C7, 0xEF6B, 0x98C8, 0xEF6C, 0x98C9, 0xEF6D, 0x98CA, 0xEF6E,
04982     0x98CB, 0xEF6F, 0x98CC, 0xEF70, 0x98CD, 0xEF71, 0x98CE, 0xB7E7,
04983     0x98CF, 0xEF72, 0x98D0, 0xEF73, 0x98D1, 0xECA9, 0x98D2, 0xECAA,
04984     0x98D3, 0xECAB, 0x98D4, 0xEF74, 0x98D5, 0xECAC, 0x98D6, 0xEF75,
04985     0x98D7, 0xEF76, 0x98D8, 0xC6AE, 0x98D9, 0xECAD, 0x98DA, 0xECAE,
04986     0x98DB, 0xEF77, 0x98DC, 0xEF78, 0x98DD, 0xEF79, 0x98DE, 0xB7C9,
04987     0x98DF, 0xCAB3, 0x98E0, 0xEF7A, 0x98E1, 0xEF7B, 0x98E2, 0xEF7C,
04988     0x98E3, 0xEF7D, 0x98E4, 0xEF7E, 0x98E5, 0xEF80, 0x98E6, 0xEF81,
04989     0x98E7, 0xE2B8, 0x98E8, 0xF7CF, 0x98E9, 0xEF82, 0x98EA, 0xEF83,
04990     0x98EB, 0xEF84, 0x98EC, 0xEF85, 0x98ED, 0xEF86, 0x98EE, 0xEF87,
04991     0x98EF, 0xEF88, 0x98F0, 0xEF89, 0x98F1, 0xEF8A, 0x98F2, 0xEF8B,
04992     0x98F3, 0xEF8C, 0x98F4, 0xEF8D, 0x98F5, 0xEF8E, 0x98F6, 0xEF8F,
04993     0x98F7, 0xEF90, 0x98F8, 0xEF91, 0x98F9, 0xEF92, 0x98FA, 0xEF93,
04994     0x98FB, 0xEF94, 0x98FC, 0xEF95, 0x98FD, 0xEF96, 0x98FE, 0xEF97,
04995     0x98FF, 0xEF98, 0x9900, 0xEF99, 0x9901, 0xEF9A, 0x9902, 0xEF9B,
04996     0x9903, 0xEF9C, 0x9904, 0xEF9D, 0x9905, 0xEF9E, 0x9906, 0xEF9F,
04997     0x9907, 0xEFA0, 0x9908, 0xF040, 0x9909, 0xF041, 0x990A, 0xF042,
04998     0x990B, 0xF043, 0x990C, 0xF044, 0x990D, 0xF7D0, 0x990E, 0xF045,
04999     0x990F, 0xF046, 0x9910, 0xB2CD, 0x9911, 0xF047, 0x9912, 0xF048,
05000     0x9913, 0xF049, 0x9914, 0xF04A, 0x9915, 0xF04B, 0x9916, 0xF04C,
05001     0x9917, 0xF04D, 0x9918, 0xF04E, 0x9919, 0xF04F, 0x991A, 0xF050,
05002     0x991B, 0xF051, 0x991C, 0xF052, 0x991D, 0xF053, 0x991E, 0xF054,
05003     0x991F, 0xF055, 0x9920, 0xF056, 0x9921, 0xF057, 0x9922, 0xF058,
05004     0x9923, 0xF059, 0x9924, 0xF05A, 0x9925, 0xF05B, 0x9926, 0xF05C,
05005     0x9927, 0xF05D, 0x9928, 0xF05E, 0x9929, 0xF05F, 0x992A, 0xF060,
05006     0x992B, 0xF061, 0x992C, 0xF062, 0x992D, 0xF063, 0x992E, 0xF7D1,
05007     0x992F, 0xF064, 0x9930, 0xF065, 0x9931, 0xF066, 0x9932, 0xF067,
05008     0x9933, 0xF068, 0x9934, 0xF069, 0x9935, 0xF06A, 0x9936, 0xF06B,
05009     0x9937, 0xF06C, 0x9938, 0xF06D, 0x9939, 0xF06E, 0x993A, 0xF06F,
05010     0x993B, 0xF070, 0x993C, 0xF071, 0x993D, 0xF072, 0x993E, 0xF073,
05011     0x993F, 0xF074, 0x9940, 0xF075, 0x9941, 0xF076, 0x9942, 0xF077,
05012     0x9943, 0xF078, 0x9944, 0xF079, 0x9945, 0xF07A, 0x9946, 0xF07B,
05013     0x9947, 0xF07C, 0x9948, 0xF07D, 0x9949, 0xF07E, 0x994A, 0xF080,
05014     0x994B, 0xF081, 0x994C, 0xF082, 0x994D, 0xF083, 0x994E, 0xF084,
05015     0x994F, 0xF085, 0x9950, 0xF086, 0x9951, 0xF087, 0x9952, 0xF088,
05016     0x9953, 0xF089, 0x9954, 0xF7D3, 0x9955, 0xF7D2, 0x9956, 0xF08A,
05017     0x9957, 0xF08B, 0x9958, 0xF08C, 0x9959, 0xF08D, 0x995A, 0xF08E,
05018     0x995B, 0xF08F, 0x995C, 0xF090, 0x995D, 0xF091, 0x995E, 0xF092,
05019     0x995F, 0xF093, 0x9960, 0xF094, 0x9961, 0xF095, 0x9962, 0xF096,
05020     0x9963, 0xE2BB, 0x9964, 0xF097, 0x9965, 0xBCA2, 0x9966, 0xF098,
05021     0x9967, 0xE2BC, 0x9968, 0xE2BD, 0x9969, 0xE2BE, 0x996A, 0xE2BF,
05022     0x996B, 0xE2C0, 0x996C, 0xE2C1, 0x996D, 0xB7B9, 0x996E, 0xD2FB,
05023     0x996F, 0xBDA4, 0x9970, 0xCACE, 0x9971, 0xB1A5, 0x9972, 0xCBC7,
05024     0x9973, 0xF099, 0x9974, 0xE2C2, 0x9975, 0xB6FC, 0x9976, 0xC8C4,
05025     0x9977, 0xE2C3, 0x9978, 0xF09A, 0x9979, 0xF09B, 0x997A, 0xBDC8,
05026     0x997B, 0xF09C, 0x997C, 0xB1FD, 0x997D, 0xE2C4, 0x997E, 0xF09D,
05027     0x997F, 0xB6F6, 0x9980, 0xE2C5, 0x9981, 0xC4D9, 0x9982, 0xF09E,
05028     0x9983, 0xF09F, 0x9984, 0xE2C6, 0x9985, 0xCFDA, 0x9986, 0xB9DD,
05029     0x9987, 0xE2C7, 0x9988, 0xC0A1, 0x9989, 0xF0A0, 0x998A, 0xE2C8,
05030     0x998B, 0xB2F6, 0x998C, 0xF140, 0x998D, 0xE2C9, 0x998E, 0xF141,
05031     0x998F, 0xC1F3, 0x9990, 0xE2CA, 0x9991, 0xE2CB, 0x9992, 0xC2F8,
05032     0x9993, 0xE2CC, 0x9994, 0xE2CD, 0x9995, 0xE2CE, 0x9996, 0xCAD7,
05033     0x9997, 0xD8B8, 0x9998, 0xD9E5, 0x9999, 0xCFE3, 0x999A, 0xF142,
05034     0x999B, 0xF143, 0x999C, 0xF144, 0x999D, 0xF145, 0x999E, 0xF146,
05035     0x999F, 0xF147, 0x99A0, 0xF148, 0x99A1, 0xF149, 0x99A2, 0xF14A,
05036     0x99A3, 0xF14B, 0x99A4, 0xF14C, 0x99A5, 0xF0A5, 0x99A6, 0xF14D,
05037     0x99A7, 0xF14E, 0x99A8, 0xDCB0, 0x99A9, 0xF14F, 0x99AA, 0xF150,
05038     0x99AB, 0xF151, 0x99AC, 0xF152, 0x99AD, 0xF153, 0x99AE, 0xF154,
05039     0x99AF, 0xF155, 0x99B0, 0xF156, 0x99B1, 0xF157, 0x99B2, 0xF158,
05040     0x99B3, 0xF159, 0x99B4, 0xF15A, 0x99B5, 0xF15B, 0x99B6, 0xF15C,
05041     0x99B7, 0xF15D, 0x99B8, 0xF15E, 0x99B9, 0xF15F, 0x99BA, 0xF160,
05042     0x99BB, 0xF161, 0x99BC, 0xF162, 0x99BD, 0xF163, 0x99BE, 0xF164,
05043     0x99BF, 0xF165, 0x99C0, 0xF166, 0x99C1, 0xF167, 0x99C2, 0xF168,
05044     0x99C3, 0xF169, 0x99C4, 0xF16A, 0x99C5, 0xF16B, 0x99C6, 0xF16C,
05045     0x99C7, 0xF16D, 0x99C8, 0xF16E, 0x99C9, 0xF16F, 0x99CA, 0xF170,
05046     0x99CB, 0xF171, 0x99CC, 0xF172, 0x99CD, 0xF173, 0x99CE, 0xF174,
05047     0x99CF, 0xF175, 0x99D0, 0xF176, 0x99D1, 0xF177, 0x99D2, 0xF178,
05048     0x99D3, 0xF179, 0x99D4, 0xF17A, 0x99D5, 0xF17B, 0x99D6, 0xF17C,
05049     0x99D7, 0xF17D, 0x99D8, 0xF17E, 0x99D9, 0xF180, 0x99DA, 0xF181,
05050     0x99DB, 0xF182, 0x99DC, 0xF183, 0x99DD, 0xF184, 0x99DE, 0xF185,
05051     0x99DF, 0xF186, 0x99E0, 0xF187, 0x99E1, 0xF188, 0x99E2, 0xF189,
05052     0x99E3, 0xF18A, 0x99E4, 0xF18B, 0x99E5, 0xF18C, 0x99E6, 0xF18D,
05053     0x99E7, 0xF18E, 0x99E8, 0xF18F, 0x99E9, 0xF190, 0x99EA, 0xF191,
05054     0x99EB, 0xF192, 0x99EC, 0xF193, 0x99ED, 0xF194, 0x99EE, 0xF195,
05055     0x99EF, 0xF196, 0x99F0, 0xF197, 0x99F1, 0xF198, 0x99F2, 0xF199,
05056     0x99F3, 0xF19A, 0x99F4, 0xF19B, 0x99F5, 0xF19C, 0x99F6, 0xF19D,
05057     0x99F7, 0xF19E, 0x99F8, 0xF19F, 0x99F9, 0xF1A0, 0x99FA, 0xF240,
05058     0x99FB, 0xF241, 0x99FC, 0xF242, 0x99FD, 0xF243, 0x99FE, 0xF244,
05059     0x99FF, 0xF245, 0x9A00, 0xF246, 0x9A01, 0xF247, 0x9A02, 0xF248,
05060     0x9A03, 0xF249, 0x9A04, 0xF24A, 0x9A05, 0xF24B, 0x9A06, 0xF24C,
05061     0x9A07, 0xF24D, 0x9A08, 0xF24E, 0x9A09, 0xF24F, 0x9A0A, 0xF250,
05062     0x9A0B, 0xF251, 0x9A0C, 0xF252, 0x9A0D, 0xF253, 0x9A0E, 0xF254,
05063     0x9A0F, 0xF255, 0x9A10, 0xF256, 0x9A11, 0xF257, 0x9A12, 0xF258,
05064     0x9A13, 0xF259, 0x9A14, 0xF25A, 0x9A15, 0xF25B, 0x9A16, 0xF25C,
05065     0x9A17, 0xF25D, 0x9A18, 0xF25E, 0x9A19, 0xF25F, 0x9A1A, 0xF260,
05066     0x9A1B, 0xF261, 0x9A1C, 0xF262, 0x9A1D, 0xF263, 0x9A1E, 0xF264,
05067     0x9A1F, 0xF265, 0x9A20, 0xF266, 0x9A21, 0xF267, 0x9A22, 0xF268,
05068     0x9A23, 0xF269, 0x9A24, 0xF26A, 0x9A25, 0xF26B, 0x9A26, 0xF26C,
05069     0x9A27, 0xF26D, 0x9A28, 0xF26E, 0x9A29, 0xF26F, 0x9A2A, 0xF270,
05070     0x9A2B, 0xF271, 0x9A2C, 0xF272, 0x9A2D, 0xF273, 0x9A2E, 0xF274,
05071     0x9A2F, 0xF275, 0x9A30, 0xF276, 0x9A31, 0xF277, 0x9A32, 0xF278,
05072     0x9A33, 0xF279, 0x9A34, 0xF27A, 0x9A35, 0xF27B, 0x9A36, 0xF27C,
05073     0x9A37, 0xF27D, 0x9A38, 0xF27E, 0x9A39, 0xF280, 0x9A3A, 0xF281,
05074     0x9A3B, 0xF282, 0x9A3C, 0xF283, 0x9A3D, 0xF284, 0x9A3E, 0xF285,
05075     0x9A3F, 0xF286, 0x9A40, 0xF287, 0x9A41, 0xF288, 0x9A42, 0xF289,
05076     0x9A43, 0xF28A, 0x9A44, 0xF28B, 0x9A45, 0xF28C, 0x9A46, 0xF28D,
05077     0x9A47, 0xF28E, 0x9A48, 0xF28F, 0x9A49, 0xF290, 0x9A4A, 0xF291,
05078     0x9A4B, 0xF292, 0x9A4C, 0xF293, 0x9A4D, 0xF294, 0x9A4E, 0xF295,
05079     0x9A4F, 0xF296, 0x9A50, 0xF297, 0x9A51, 0xF298, 0x9A52, 0xF299,
05080     0x9A53, 0xF29A, 0x9A54, 0xF29B, 0x9A55, 0xF29C, 0x9A56, 0xF29D,
05081     0x9A57, 0xF29E, 0x9A58, 0xF29F, 0x9A59, 0xF2A0, 0x9A5A, 0xF340,
05082     0x9A5B, 0xF341, 0x9A5C, 0xF342, 0x9A5D, 0xF343, 0x9A5E, 0xF344,
05083     0x9A5F, 0xF345, 0x9A60, 0xF346, 0x9A61, 0xF347, 0x9A62, 0xF348,
05084     0x9A63, 0xF349, 0x9A64, 0xF34A, 0x9A65, 0xF34B, 0x9A66, 0xF34C,
05085     0x9A67, 0xF34D, 0x9A68, 0xF34E, 0x9A69, 0xF34F, 0x9A6A, 0xF350,
05086     0x9A6B, 0xF351, 0x9A6C, 0xC2ED, 0x9A6D, 0xD4A6, 0x9A6E, 0xCDD4,
05087     0x9A6F, 0xD1B1, 0x9A70, 0xB3DB, 0x9A71, 0xC7FD, 0x9A72, 0xF352,
05088     0x9A73, 0xB2B5, 0x9A74, 0xC2BF, 0x9A75, 0xE6E0, 0x9A76, 0xCABB,
05089     0x9A77, 0xE6E1, 0x9A78, 0xE6E2, 0x9A79, 0xBED4, 0x9A7A, 0xE6E3,
05090     0x9A7B, 0xD7A4, 0x9A7C, 0xCDD5, 0x9A7D, 0xE6E5, 0x9A7E, 0xBCDD,
05091     0x9A7F, 0xE6E4, 0x9A80, 0xE6E6, 0x9A81, 0xE6E7, 0x9A82, 0xC2EE,
05092     0x9A83, 0xF353, 0x9A84, 0xBDBE, 0x9A85, 0xE6E8, 0x9A86, 0xC2E6,
05093     0x9A87, 0xBAA7, 0x9A88, 0xE6E9, 0x9A89, 0xF354, 0x9A8A, 0xE6EA,
05094     0x9A8B, 0xB3D2, 0x9A8C, 0xD1E9, 0x9A8D, 0xF355, 0x9A8E, 0xF356,
05095     0x9A8F, 0xBFA5, 0x9A90, 0xE6EB, 0x9A91, 0xC6EF, 0x9A92, 0xE6EC,
05096     0x9A93, 0xE6ED, 0x9A94, 0xF357, 0x9A95, 0xF358, 0x9A96, 0xE6EE,
05097     0x9A97, 0xC6AD, 0x9A98, 0xE6EF, 0x9A99, 0xF359, 0x9A9A, 0xC9A7,
05098     0x9A9B, 0xE6F0, 0x9A9C, 0xE6F1, 0x9A9D, 0xE6F2, 0x9A9E, 0xE5B9,
05099     0x9A9F, 0xE6F3, 0x9AA0, 0xE6F4, 0x9AA1, 0xC2E2, 0x9AA2, 0xE6F5,
05100     0x9AA3, 0xE6F6, 0x9AA4, 0xD6E8, 0x9AA5, 0xE6F7, 0x9AA6, 0xF35A,
05101     0x9AA7, 0xE6F8, 0x9AA8, 0xB9C7, 0x9AA9, 0xF35B, 0x9AAA, 0xF35C,
05102     0x9AAB, 0xF35D, 0x9AAC, 0xF35E, 0x9AAD, 0xF35F, 0x9AAE, 0xF360,
05103     0x9AAF, 0xF361, 0x9AB0, 0xF7BB, 0x9AB1, 0xF7BA, 0x9AB2, 0xF362,
05104     0x9AB3, 0xF363, 0x9AB4, 0xF364, 0x9AB5, 0xF365, 0x9AB6, 0xF7BE,
05105     0x9AB7, 0xF7BC, 0x9AB8, 0xBAA1, 0x9AB9, 0xF366, 0x9ABA, 0xF7BF,
05106     0x9ABB, 0xF367, 0x9ABC, 0xF7C0, 0x9ABD, 0xF368, 0x9ABE, 0xF369,
05107     0x9ABF, 0xF36A, 0x9AC0, 0xF7C2, 0x9AC1, 0xF7C1, 0x9AC2, 0xF7C4,
05108     0x9AC3, 0xF36B, 0x9AC4, 0xF36C, 0x9AC5, 0xF7C3, 0x9AC6, 0xF36D,
05109     0x9AC7, 0xF36E, 0x9AC8, 0xF36F, 0x9AC9, 0xF370, 0x9ACA, 0xF371,
05110     0x9ACB, 0xF7C5, 0x9ACC, 0xF7C6, 0x9ACD, 0xF372, 0x9ACE, 0xF373,
05111     0x9ACF, 0xF374, 0x9AD0, 0xF375, 0x9AD1, 0xF7C7, 0x9AD2, 0xF376,
05112     0x9AD3, 0xCBE8, 0x9AD4, 0xF377, 0x9AD5, 0xF378, 0x9AD6, 0xF379,
05113     0x9AD7, 0xF37A, 0x9AD8, 0xB8DF, 0x9AD9, 0xF37B, 0x9ADA, 0xF37C,
05114     0x9ADB, 0xF37D, 0x9ADC, 0xF37E, 0x9ADD, 0xF380, 0x9ADE, 0xF381,
05115     0x9ADF, 0xF7D4, 0x9AE0, 0xF382, 0x9AE1, 0xF7D5, 0x9AE2, 0xF383,
05116     0x9AE3, 0xF384, 0x9AE4, 0xF385, 0x9AE5, 0xF386, 0x9AE6, 0xF7D6,
05117     0x9AE7, 0xF387, 0x9AE8, 0xF388, 0x9AE9, 0xF389, 0x9AEA, 0xF38A,
05118     0x9AEB, 0xF7D8, 0x9AEC, 0xF38B, 0x9AED, 0xF7DA, 0x9AEE, 0xF38C,
05119     0x9AEF, 0xF7D7, 0x9AF0, 0xF38D, 0x9AF1, 0xF38E, 0x9AF2, 0xF38F,
05120     0x9AF3, 0xF390, 0x9AF4, 0xF391, 0x9AF5, 0xF392, 0x9AF6, 0xF393,
05121     0x9AF7, 0xF394, 0x9AF8, 0xF395, 0x9AF9, 0xF7DB, 0x9AFA, 0xF396,
05122     0x9AFB, 0xF7D9, 0x9AFC, 0xF397, 0x9AFD, 0xF398, 0x9AFE, 0xF399,
05123     0x9AFF, 0xF39A, 0x9B00, 0xF39B, 0x9B01, 0xF39C, 0x9B02, 0xF39D,
05124     0x9B03, 0xD7D7, 0x9B04, 0xF39E, 0x9B05, 0xF39F, 0x9B06, 0xF3A0,
05125     0x9B07, 0xF440, 0x9B08, 0xF7DC, 0x9B09, 0xF441, 0x9B0A, 0xF442,
05126     0x9B0B, 0xF443, 0x9B0C, 0xF444, 0x9B0D, 0xF445, 0x9B0E, 0xF446,
05127     0x9B0F, 0xF7DD, 0x9B10, 0xF447, 0x9B11, 0xF448, 0x9B12, 0xF449,
05128     0x9B13, 0xF7DE, 0x9B14, 0xF44A, 0x9B15, 0xF44B, 0x9B16, 0xF44C,
05129     0x9B17, 0xF44D, 0x9B18, 0xF44E, 0x9B19, 0xF44F, 0x9B1A, 0xF450,
05130     0x9B1B, 0xF451, 0x9B1C, 0xF452, 0x9B1D, 0xF453, 0x9B1E, 0xF454,
05131     0x9B1F, 0xF7DF, 0x9B20, 0xF455, 0x9B21, 0xF456, 0x9B22, 0xF457,
05132     0x9B23, 0xF7E0, 0x9B24, 0xF458, 0x9B25, 0xF459, 0x9B26, 0xF45A,
05133     0x9B27, 0xF45B, 0x9B28, 0xF45C, 0x9B29, 0xF45D, 0x9B2A, 0xF45E,
05134     0x9B2B, 0xF45F, 0x9B2C, 0xF460, 0x9B2D, 0xF461, 0x9B2E, 0xF462,
05135     0x9B2F, 0xDBCB, 0x9B30, 0xF463, 0x9B31, 0xF464, 0x9B32, 0xD8AA,
05136     0x9B33, 0xF465, 0x9B34, 0xF466, 0x9B35, 0xF467, 0x9B36, 0xF468,
05137     0x9B37, 0xF469, 0x9B38, 0xF46A, 0x9B39, 0xF46B, 0x9B3A, 0xF46C,
05138     0x9B3B, 0xE5F7, 0x9B3C, 0xB9ED, 0x9B3D, 0xF46D, 0x9B3E, 0xF46E,
05139     0x9B3F, 0xF46F, 0x9B40, 0xF470, 0x9B41, 0xBFFD, 0x9B42, 0xBBEA,
05140     0x9B43, 0xF7C9, 0x9B44, 0xC6C7, 0x9B45, 0xF7C8, 0x9B46, 0xF471,
05141     0x9B47, 0xF7CA, 0x9B48, 0xF7CC, 0x9B49, 0xF7CB, 0x9B4A, 0xF472,
05142     0x9B4B, 0xF473, 0x9B4C, 0xF474, 0x9B4D, 0xF7CD, 0x9B4E, 0xF475,
05143     0x9B4F, 0xCEBA, 0x9B50, 0xF476, 0x9B51, 0xF7CE, 0x9B52, 0xF477,
05144     0x9B53, 0xF478, 0x9B54, 0xC4A7, 0x9B55, 0xF479, 0x9B56, 0xF47A,
05145     0x9B57, 0xF47B, 0x9B58, 0xF47C, 0x9B59, 0xF47D, 0x9B5A, 0xF47E,
05146     0x9B5B, 0xF480, 0x9B5C, 0xF481, 0x9B5D, 0xF482, 0x9B5E, 0xF483,
05147     0x9B5F, 0xF484, 0x9B60, 0xF485, 0x9B61, 0xF486, 0x9B62, 0xF487,
05148     0x9B63, 0xF488, 0x9B64, 0xF489, 0x9B65, 0xF48A, 0x9B66, 0xF48B,
05149     0x9B67, 0xF48C, 0x9B68, 0xF48D, 0x9B69, 0xF48E, 0x9B6A, 0xF48F,
05150     0x9B6B, 0xF490, 0x9B6C, 0xF491, 0x9B6D, 0xF492, 0x9B6E, 0xF493,
05151     0x9B6F, 0xF494, 0x9B70, 0xF495, 0x9B71, 0xF496, 0x9B72, 0xF497,
05152     0x9B73, 0xF498, 0x9B74, 0xF499, 0x9B75, 0xF49A, 0x9B76, 0xF49B,
05153     0x9B77, 0xF49C, 0x9B78, 0xF49D, 0x9B79, 0xF49E, 0x9B7A, 0xF49F,
05154     0x9B7B, 0xF4A0, 0x9B7C, 0xF540, 0x9B7D, 0xF541, 0x9B7E, 0xF542,
05155     0x9B7F, 0xF543, 0x9B80, 0xF544, 0x9B81, 0xF545, 0x9B82, 0xF546,
05156     0x9B83, 0xF547, 0x9B84, 0xF548, 0x9B85, 0xF549, 0x9B86, 0xF54A,
05157     0x9B87, 0xF54B, 0x9B88, 0xF54C, 0x9B89, 0xF54D, 0x9B8A, 0xF54E,
05158     0x9B8B, 0xF54F, 0x9B8C, 0xF550, 0x9B8D, 0xF551, 0x9B8E, 0xF552,
05159     0x9B8F, 0xF553, 0x9B90, 0xF554, 0x9B91, 0xF555, 0x9B92, 0xF556,
05160     0x9B93, 0xF557, 0x9B94, 0xF558, 0x9B95, 0xF559, 0x9B96, 0xF55A,
05161     0x9B97, 0xF55B, 0x9B98, 0xF55C, 0x9B99, 0xF55D, 0x9B9A, 0xF55E,
05162     0x9B9B, 0xF55F, 0x9B9C, 0xF560, 0x9B9D, 0xF561, 0x9B9E, 0xF562,
05163     0x9B9F, 0xF563, 0x9BA0, 0xF564, 0x9BA1, 0xF565, 0x9BA2, 0xF566,
05164     0x9BA3, 0xF567, 0x9BA4, 0xF568, 0x9BA5, 0xF569, 0x9BA6, 0xF56A,
05165     0x9BA7, 0xF56B, 0x9BA8, 0xF56C, 0x9BA9, 0xF56D, 0x9BAA, 0xF56E,
05166     0x9BAB, 0xF56F, 0x9BAC, 0xF570, 0x9BAD, 0xF571, 0x9BAE, 0xF572,
05167     0x9BAF, 0xF573, 0x9BB0, 0xF574, 0x9BB1, 0xF575, 0x9BB2, 0xF576,
05168     0x9BB3, 0xF577, 0x9BB4, 0xF578, 0x9BB5, 0xF579, 0x9BB6, 0xF57A,
05169     0x9BB7, 0xF57B, 0x9BB8, 0xF57C, 0x9BB9, 0xF57D, 0x9BBA, 0xF57E,
05170     0x9BBB, 0xF580, 0x9BBC, 0xF581, 0x9BBD, 0xF582, 0x9BBE, 0xF583,
05171     0x9BBF, 0xF584, 0x9BC0, 0xF585, 0x9BC1, 0xF586, 0x9BC2, 0xF587,
05172     0x9BC3, 0xF588, 0x9BC4, 0xF589, 0x9BC5, 0xF58A, 0x9BC6, 0xF58B,
05173     0x9BC7, 0xF58C, 0x9BC8, 0xF58D, 0x9BC9, 0xF58E, 0x9BCA, 0xF58F,
05174     0x9BCB, 0xF590, 0x9BCC, 0xF591, 0x9BCD, 0xF592, 0x9BCE, 0xF593,
05175     0x9BCF, 0xF594, 0x9BD0, 0xF595, 0x9BD1, 0xF596, 0x9BD2, 0xF597,
05176     0x9BD3, 0xF598, 0x9BD4, 0xF599, 0x9BD5, 0xF59A, 0x9BD6, 0xF59B,
05177     0x9BD7, 0xF59C, 0x9BD8, 0xF59D, 0x9BD9, 0xF59E, 0x9BDA, 0xF59F,
05178     0x9BDB, 0xF5A0, 0x9BDC, 0xF640, 0x9BDD, 0xF641, 0x9BDE, 0xF642,
05179     0x9BDF, 0xF643, 0x9BE0, 0xF644, 0x9BE1, 0xF645, 0x9BE2, 0xF646,
05180     0x9BE3, 0xF647, 0x9BE4, 0xF648, 0x9BE5, 0xF649, 0x9BE6, 0xF64A,
05181     0x9BE7, 0xF64B, 0x9BE8, 0xF64C, 0x9BE9, 0xF64D, 0x9BEA, 0xF64E,
05182     0x9BEB, 0xF64F, 0x9BEC, 0xF650, 0x9BED, 0xF651, 0x9BEE, 0xF652,
05183     0x9BEF, 0xF653, 0x9BF0, 0xF654, 0x9BF1, 0xF655, 0x9BF2, 0xF656,
05184     0x9BF3, 0xF657, 0x9BF4, 0xF658, 0x9BF5, 0xF659, 0x9BF6, 0xF65A,
05185     0x9BF7, 0xF65B, 0x9BF8, 0xF65C, 0x9BF9, 0xF65D, 0x9BFA, 0xF65E,
05186     0x9BFB, 0xF65F, 0x9BFC, 0xF660, 0x9BFD, 0xF661, 0x9BFE, 0xF662,
05187     0x9BFF, 0xF663, 0x9C00, 0xF664, 0x9C01, 0xF665, 0x9C02, 0xF666,
05188     0x9C03, 0xF667, 0x9C04, 0xF668, 0x9C05, 0xF669, 0x9C06, 0xF66A,
05189     0x9C07, 0xF66B, 0x9C08, 0xF66C, 0x9C09, 0xF66D, 0x9C0A, 0xF66E,
05190     0x9C0B, 0xF66F, 0x9C0C, 0xF670, 0x9C0D, 0xF671, 0x9C0E, 0xF672,
05191     0x9C0F, 0xF673, 0x9C10, 0xF674, 0x9C11, 0xF675, 0x9C12, 0xF676,
05192     0x9C13, 0xF677, 0x9C14, 0xF678, 0x9C15, 0xF679, 0x9C16, 0xF67A,
05193     0x9C17, 0xF67B, 0x9C18, 0xF67C, 0x9C19, 0xF67D, 0x9C1A, 0xF67E,
05194     0x9C1B, 0xF680, 0x9C1C, 0xF681, 0x9C1D, 0xF682, 0x9C1E, 0xF683,
05195     0x9C1F, 0xF684, 0x9C20, 0xF685, 0x9C21, 0xF686, 0x9C22, 0xF687,
05196     0x9C23, 0xF688, 0x9C24, 0xF689, 0x9C25, 0xF68A, 0x9C26, 0xF68B,
05197     0x9C27, 0xF68C, 0x9C28, 0xF68D, 0x9C29, 0xF68E, 0x9C2A, 0xF68F,
05198     0x9C2B, 0xF690, 0x9C2C, 0xF691, 0x9C2D, 0xF692, 0x9C2E, 0xF693,
05199     0x9C2F, 0xF694, 0x9C30, 0xF695, 0x9C31, 0xF696, 0x9C32, 0xF697,
05200     0x9C33, 0xF698, 0x9C34, 0xF699, 0x9C35, 0xF69A, 0x9C36, 0xF69B,
05201     0x9C37, 0xF69C, 0x9C38, 0xF69D, 0x9C39, 0xF69E, 0x9C3A, 0xF69F,
05202     0x9C3B, 0xF6A0, 0x9C3C, 0xF740, 0x9C3D, 0xF741, 0x9C3E, 0xF742,
05203     0x9C3F, 0xF743, 0x9C40, 0xF744, 0x9C41, 0xF745, 0x9C42, 0xF746,
05204     0x9C43, 0xF747, 0x9C44, 0xF748, 0x9C45, 0xF749, 0x9C46, 0xF74A,
05205     0x9C47, 0xF74B, 0x9C48, 0xF74C, 0x9C49, 0xF74D, 0x9C4A, 0xF74E,
05206     0x9C4B, 0xF74F, 0x9C4C, 0xF750, 0x9C4D, 0xF751, 0x9C4E, 0xF752,
05207     0x9C4F, 0xF753, 0x9C50, 0xF754, 0x9C51, 0xF755, 0x9C52, 0xF756,
05208     0x9C53, 0xF757, 0x9C54, 0xF758, 0x9C55, 0xF759, 0x9C56, 0xF75A,
05209     0x9C57, 0xF75B, 0x9C58, 0xF75C, 0x9C59, 0xF75D, 0x9C5A, 0xF75E,
05210     0x9C5B, 0xF75F, 0x9C5C, 0xF760, 0x9C5D, 0xF761, 0x9C5E, 0xF762,
05211     0x9C5F, 0xF763, 0x9C60, 0xF764, 0x9C61, 0xF765, 0x9C62, 0xF766,
05212     0x9C63, 0xF767, 0x9C64, 0xF768, 0x9C65, 0xF769, 0x9C66, 0xF76A,
05213     0x9C67, 0xF76B, 0x9C68, 0xF76C, 0x9C69, 0xF76D, 0x9C6A, 0xF76E,
05214     0x9C6B, 0xF76F, 0x9C6C, 0xF770, 0x9C6D, 0xF771, 0x9C6E, 0xF772,
05215     0x9C6F, 0xF773, 0x9C70, 0xF774, 0x9C71, 0xF775, 0x9C72, 0xF776,
05216     0x9C73, 0xF777, 0x9C74, 0xF778, 0x9C75, 0xF779, 0x9C76, 0xF77A,
05217     0x9C77, 0xF77B, 0x9C78, 0xF77C, 0x9C79, 0xF77D, 0x9C7A, 0xF77E,
05218     0x9C7B, 0xF780, 0x9C7C, 0xD3E3, 0x9C7D, 0xF781, 0x9C7E, 0xF782,
05219     0x9C7F, 0xF6CF, 0x9C80, 0xF783, 0x9C81, 0xC2B3, 0x9C82, 0xF6D0,
05220     0x9C83, 0xF784, 0x9C84, 0xF785, 0x9C85, 0xF6D1, 0x9C86, 0xF6D2,
05221     0x9C87, 0xF6D3, 0x9C88, 0xF6D4, 0x9C89, 0xF786, 0x9C8A, 0xF787,
05222     0x9C8B, 0xF6D6, 0x9C8C, 0xF788, 0x9C8D, 0xB1AB, 0x9C8E, 0xF6D7,
05223     0x9C8F, 0xF789, 0x9C90, 0xF6D8, 0x9C91, 0xF6D9, 0x9C92, 0xF6DA,
05224     0x9C93, 0xF78A, 0x9C94, 0xF6DB, 0x9C95, 0xF6DC, 0x9C96, 0xF78B,
05225     0x9C97, 0xF78C, 0x9C98, 0xF78D, 0x9C99, 0xF78E, 0x9C9A, 0xF6DD,
05226     0x9C9B, 0xF6DE, 0x9C9C, 0xCFCA, 0x9C9D, 0xF78F, 0x9C9E, 0xF6DF,
05227     0x9C9F, 0xF6E0, 0x9CA0, 0xF6E1, 0x9CA1, 0xF6E2, 0x9CA2, 0xF6E3,
05228     0x9CA3, 0xF6E4, 0x9CA4, 0xC0F0, 0x9CA5, 0xF6E5, 0x9CA6, 0xF6E6,
05229     0x9CA7, 0xF6E7, 0x9CA8, 0xF6E8, 0x9CA9, 0xF6E9, 0x9CAA, 0xF790,
05230     0x9CAB, 0xF6EA, 0x9CAC, 0xF791, 0x9CAD, 0xF6EB, 0x9CAE, 0xF6EC,
05231     0x9CAF, 0xF792, 0x9CB0, 0xF6ED, 0x9CB1, 0xF6EE, 0x9CB2, 0xF6EF,
05232     0x9CB3, 0xF6F0, 0x9CB4, 0xF6F1, 0x9CB5, 0xF6F2, 0x9CB6, 0xF6F3,
05233     0x9CB7, 0xF6F4, 0x9CB8, 0xBEA8, 0x9CB9, 0xF793, 0x9CBA, 0xF6F5,
05234     0x9CBB, 0xF6F6, 0x9CBC, 0xF6F7, 0x9CBD, 0xF6F8, 0x9CBE, 0xF794,
05235     0x9CBF, 0xF795, 0x9CC0, 0xF796, 0x9CC1, 0xF797, 0x9CC2, 0xF798,
05236     0x9CC3, 0xC8FA, 0x9CC4, 0xF6F9, 0x9CC5, 0xF6FA, 0x9CC6, 0xF6FB,
05237     0x9CC7, 0xF6FC, 0x9CC8, 0xF799, 0x9CC9, 0xF79A, 0x9CCA, 0xF6FD,
05238     0x9CCB, 0xF6FE, 0x9CCC, 0xF7A1, 0x9CCD, 0xF7A2, 0x9CCE, 0xF7A3,
05239     0x9CCF, 0xF7A4, 0x9CD0, 0xF7A5, 0x9CD1, 0xF79B, 0x9CD2, 0xF79C,
05240     0x9CD3, 0xF7A6, 0x9CD4, 0xF7A7, 0x9CD5, 0xF7A8, 0x9CD6, 0xB1EE,
05241     0x9CD7, 0xF7A9, 0x9CD8, 0xF7AA, 0x9CD9, 0xF7AB, 0x9CDA, 0xF79D,
05242     0x9CDB, 0xF79E, 0x9CDC, 0xF7AC, 0x9CDD, 0xF7AD, 0x9CDE, 0xC1DB,
05243     0x9CDF, 0xF7AE, 0x9CE0, 0xF79F, 0x9CE1, 0xF7A0, 0x9CE2, 0xF7AF,
05244     0x9CE3, 0xF840, 0x9CE4, 0xF841, 0x9CE5, 0xF842, 0x9CE6, 0xF843,
05245     0x9CE7, 0xF844, 0x9CE8, 0xF845, 0x9CE9, 0xF846, 0x9CEA, 0xF847,
05246     0x9CEB, 0xF848, 0x9CEC, 0xF849, 0x9CED, 0xF84A, 0x9CEE, 0xF84B,
05247     0x9CEF, 0xF84C, 0x9CF0, 0xF84D, 0x9CF1, 0xF84E, 0x9CF2, 0xF84F,
05248     0x9CF3, 0xF850, 0x9CF4, 0xF851, 0x9CF5, 0xF852, 0x9CF6, 0xF853,
05249     0x9CF7, 0xF854, 0x9CF8, 0xF855, 0x9CF9, 0xF856, 0x9CFA, 0xF857,
05250     0x9CFB, 0xF858, 0x9CFC, 0xF859, 0x9CFD, 0xF85A, 0x9CFE, 0xF85B,
05251     0x9CFF, 0xF85C, 0x9D00, 0xF85D, 0x9D01, 0xF85E, 0x9D02, 0xF85F,
05252     0x9D03, 0xF860, 0x9D04, 0xF861, 0x9D05, 0xF862, 0x9D06, 0xF863,
05253     0x9D07, 0xF864, 0x9D08, 0xF865, 0x9D09, 0xF866, 0x9D0A, 0xF867,
05254     0x9D0B, 0xF868, 0x9D0C, 0xF869, 0x9D0D, 0xF86A, 0x9D0E, 0xF86B,
05255     0x9D0F, 0xF86C, 0x9D10, 0xF86D, 0x9D11, 0xF86E, 0x9D12, 0xF86F,
05256     0x9D13, 0xF870, 0x9D14, 0xF871, 0x9D15, 0xF872, 0x9D16, 0xF873,
05257     0x9D17, 0xF874, 0x9D18, 0xF875, 0x9D19, 0xF876, 0x9D1A, 0xF877,
05258     0x9D1B, 0xF878, 0x9D1C, 0xF879, 0x9D1D, 0xF87A, 0x9D1E, 0xF87B,
05259     0x9D1F, 0xF87C, 0x9D20, 0xF87D, 0x9D21, 0xF87E, 0x9D22, 0xF880,
05260     0x9D23, 0xF881, 0x9D24, 0xF882, 0x9D25, 0xF883, 0x9D26, 0xF884,
05261     0x9D27, 0xF885, 0x9D28, 0xF886, 0x9D29, 0xF887, 0x9D2A, 0xF888,
05262     0x9D2B, 0xF889, 0x9D2C, 0xF88A, 0x9D2D, 0xF88B, 0x9D2E, 0xF88C,
05263     0x9D2F, 0xF88D, 0x9D30, 0xF88E, 0x9D31, 0xF88F, 0x9D32, 0xF890,
05264     0x9D33, 0xF891, 0x9D34, 0xF892, 0x9D35, 0xF893, 0x9D36, 0xF894,
05265     0x9D37, 0xF895, 0x9D38, 0xF896, 0x9D39, 0xF897, 0x9D3A, 0xF898,
05266     0x9D3B, 0xF899, 0x9D3C, 0xF89A, 0x9D3D, 0xF89B, 0x9D3E, 0xF89C,
05267     0x9D3F, 0xF89D, 0x9D40, 0xF89E, 0x9D41, 0xF89F, 0x9D42, 0xF8A0,
05268     0x9D43, 0xF940, 0x9D44, 0xF941, 0x9D45, 0xF942, 0x9D46, 0xF943,
05269     0x9D47, 0xF944, 0x9D48, 0xF945, 0x9D49, 0xF946, 0x9D4A, 0xF947,
05270     0x9D4B, 0xF948, 0x9D4C, 0xF949, 0x9D4D, 0xF94A, 0x9D4E, 0xF94B,
05271     0x9D4F, 0xF94C, 0x9D50, 0xF94D, 0x9D51, 0xF94E, 0x9D52, 0xF94F,
05272     0x9D53, 0xF950, 0x9D54, 0xF951, 0x9D55, 0xF952, 0x9D56, 0xF953,
05273     0x9D57, 0xF954, 0x9D58, 0xF955, 0x9D59, 0xF956, 0x9D5A, 0xF957,
05274     0x9D5B, 0xF958, 0x9D5C, 0xF959, 0x9D5D, 0xF95A, 0x9D5E, 0xF95B,
05275     0x9D5F, 0xF95C, 0x9D60, 0xF95D, 0x9D61, 0xF95E, 0x9D62, 0xF95F,
05276     0x9D63, 0xF960, 0x9D64, 0xF961, 0x9D65, 0xF962, 0x9D66, 0xF963,
05277     0x9D67, 0xF964, 0x9D68, 0xF965, 0x9D69, 0xF966, 0x9D6A, 0xF967,
05278     0x9D6B, 0xF968, 0x9D6C, 0xF969, 0x9D6D, 0xF96A, 0x9D6E, 0xF96B,
05279     0x9D6F, 0xF96C, 0x9D70, 0xF96D, 0x9D71, 0xF96E, 0x9D72, 0xF96F,
05280     0x9D73, 0xF970, 0x9D74, 0xF971, 0x9D75, 0xF972, 0x9D76, 0xF973,
05281     0x9D77, 0xF974, 0x9D78, 0xF975, 0x9D79, 0xF976, 0x9D7A, 0xF977,
05282     0x9D7B, 0xF978, 0x9D7C, 0xF979, 0x9D7D, 0xF97A, 0x9D7E, 0xF97B,
05283     0x9D7F, 0xF97C, 0x9D80, 0xF97D, 0x9D81, 0xF97E, 0x9D82, 0xF980,
05284     0x9D83, 0xF981, 0x9D84, 0xF982, 0x9D85, 0xF983, 0x9D86, 0xF984,
05285     0x9D87, 0xF985, 0x9D88, 0xF986, 0x9D89, 0xF987, 0x9D8A, 0xF988,
05286     0x9D8B, 0xF989, 0x9D8C, 0xF98A, 0x9D8D, 0xF98B, 0x9D8E, 0xF98C,
05287     0x9D8F, 0xF98D, 0x9D90, 0xF98E, 0x9D91, 0xF98F, 0x9D92, 0xF990,
05288     0x9D93, 0xF991, 0x9D94, 0xF992, 0x9D95, 0xF993, 0x9D96, 0xF994,
05289     0x9D97, 0xF995, 0x9D98, 0xF996, 0x9D99, 0xF997, 0x9D9A, 0xF998,
05290     0x9D9B, 0xF999, 0x9D9C, 0xF99A, 0x9D9D, 0xF99B, 0x9D9E, 0xF99C,
05291     0x9D9F, 0xF99D, 0x9DA0, 0xF99E, 0x9DA1, 0xF99F, 0x9DA2, 0xF9A0,
05292     0x9DA3, 0xFA40, 0x9DA4, 0xFA41, 0x9DA5, 0xFA42, 0x9DA6, 0xFA43,
05293     0x9DA7, 0xFA44, 0x9DA8, 0xFA45, 0x9DA9, 0xFA46, 0x9DAA, 0xFA47,
05294     0x9DAB, 0xFA48, 0x9DAC, 0xFA49, 0x9DAD, 0xFA4A, 0x9DAE, 0xFA4B,
05295     0x9DAF, 0xFA4C, 0x9DB0, 0xFA4D, 0x9DB1, 0xFA4E, 0x9DB2, 0xFA4F,
05296     0x9DB3, 0xFA50, 0x9DB4, 0xFA51, 0x9DB5, 0xFA52, 0x9DB6, 0xFA53,
05297     0x9DB7, 0xFA54, 0x9DB8, 0xFA55, 0x9DB9, 0xFA56, 0x9DBA, 0xFA57,
05298     0x9DBB, 0xFA58, 0x9DBC, 0xFA59, 0x9DBD, 0xFA5A, 0x9DBE, 0xFA5B,
05299     0x9DBF, 0xFA5C, 0x9DC0, 0xFA5D, 0x9DC1, 0xFA5E, 0x9DC2, 0xFA5F,
05300     0x9DC3, 0xFA60, 0x9DC4, 0xFA61, 0x9DC5, 0xFA62, 0x9DC6, 0xFA63,
05301     0x9DC7, 0xFA64, 0x9DC8, 0xFA65, 0x9DC9, 0xFA66, 0x9DCA, 0xFA67,
05302     0x9DCB, 0xFA68, 0x9DCC, 0xFA69, 0x9DCD, 0xFA6A, 0x9DCE, 0xFA6B,
05303     0x9DCF, 0xFA6C, 0x9DD0, 0xFA6D, 0x9DD1, 0xFA6E, 0x9DD2, 0xFA6F,
05304     0x9DD3, 0xFA70, 0x9DD4, 0xFA71, 0x9DD5, 0xFA72, 0x9DD6, 0xFA73,
05305     0x9DD7, 0xFA74, 0x9DD8, 0xFA75, 0x9DD9, 0xFA76, 0x9DDA, 0xFA77,
05306     0x9DDB, 0xFA78, 0x9DDC, 0xFA79, 0x9DDD, 0xFA7A, 0x9DDE, 0xFA7B,
05307     0x9DDF, 0xFA7C, 0x9DE0, 0xFA7D, 0x9DE1, 0xFA7E, 0x9DE2, 0xFA80,
05308     0x9DE3, 0xFA81, 0x9DE4, 0xFA82, 0x9DE5, 0xFA83, 0x9DE6, 0xFA84,
05309     0x9DE7, 0xFA85, 0x9DE8, 0xFA86, 0x9DE9, 0xFA87, 0x9DEA, 0xFA88,
05310     0x9DEB, 0xFA89, 0x9DEC, 0xFA8A, 0x9DED, 0xFA8B, 0x9DEE, 0xFA8C,
05311     0x9DEF, 0xFA8D, 0x9DF0, 0xFA8E, 0x9DF1, 0xFA8F, 0x9DF2, 0xFA90,
05312     0x9DF3, 0xFA91, 0x9DF4, 0xFA92, 0x9DF5, 0xFA93, 0x9DF6, 0xFA94,
05313     0x9DF7, 0xFA95, 0x9DF8, 0xFA96, 0x9DF9, 0xFA97, 0x9DFA, 0xFA98,
05314     0x9DFB, 0xFA99, 0x9DFC, 0xFA9A, 0x9DFD, 0xFA9B, 0x9DFE, 0xFA9C,
05315     0x9DFF, 0xFA9D, 0x9E00, 0xFA9E, 0x9E01, 0xFA9F, 0x9E02, 0xFAA0,
05316     0x9E03, 0xFB40, 0x9E04, 0xFB41, 0x9E05, 0xFB42, 0x9E06, 0xFB43,
05317     0x9E07, 0xFB44, 0x9E08, 0xFB45, 0x9E09, 0xFB46, 0x9E0A, 0xFB47,
05318     0x9E0B, 0xFB48, 0x9E0C, 0xFB49, 0x9E0D, 0xFB4A, 0x9E0E, 0xFB4B,
05319     0x9E0F, 0xFB4C, 0x9E10, 0xFB4D, 0x9E11, 0xFB4E, 0x9E12, 0xFB4F,
05320     0x9E13, 0xFB50, 0x9E14, 0xFB51, 0x9E15, 0xFB52, 0x9E16, 0xFB53,
05321     0x9E17, 0xFB54, 0x9E18, 0xFB55, 0x9E19, 0xFB56, 0x9E1A, 0xFB57,
05322     0x9E1B, 0xFB58, 0x9E1C, 0xFB59, 0x9E1D, 0xFB5A, 0x9E1E, 0xFB5B,
05323     0x9E1F, 0xC4F1, 0x9E20, 0xF0AF, 0x9E21, 0xBCA6, 0x9E22, 0xF0B0,
05324     0x9E23, 0xC3F9, 0x9E24, 0xFB5C, 0x9E25, 0xC5B8, 0x9E26, 0xD1BB,
05325     0x9E27, 0xFB5D, 0x9E28, 0xF0B1, 0x9E29, 0xF0B2, 0x9E2A, 0xF0B3,
05326     0x9E2B, 0xF0B4, 0x9E2C, 0xF0B5, 0x9E2D, 0xD1BC, 0x9E2E, 0xFB5E,
05327     0x9E2F, 0xD1EC, 0x9E30, 0xFB5F, 0x9E31, 0xF0B7, 0x9E32, 0xF0B6,
05328     0x9E33, 0xD4A7, 0x9E34, 0xFB60, 0x9E35, 0xCDD2, 0x9E36, 0xF0B8,
05329     0x9E37, 0xF0BA, 0x9E38, 0xF0B9, 0x9E39, 0xF0BB, 0x9E3A, 0xF0BC,
05330     0x9E3B, 0xFB61, 0x9E3C, 0xFB62, 0x9E3D, 0xB8EB, 0x9E3E, 0xF0BD,
05331     0x9E3F, 0xBAE8, 0x9E40, 0xFB63, 0x9E41, 0xF0BE, 0x9E42, 0xF0BF,
05332     0x9E43, 0xBEE9, 0x9E44, 0xF0C0, 0x9E45, 0xB6EC, 0x9E46, 0xF0C1,
05333     0x9E47, 0xF0C2, 0x9E48, 0xF0C3, 0x9E49, 0xF0C4, 0x9E4A, 0xC8B5,
05334     0x9E4B, 0xF0C5, 0x9E4C, 0xF0C6, 0x9E4D, 0xFB64, 0x9E4E, 0xF0C7,
05335     0x9E4F, 0xC5F4, 0x9E50, 0xFB65, 0x9E51, 0xF0C8, 0x9E52, 0xFB66,
05336     0x9E53, 0xFB67, 0x9E54, 0xFB68, 0x9E55, 0xF0C9, 0x9E56, 0xFB69,
05337     0x9E57, 0xF0CA, 0x9E58, 0xF7BD, 0x9E59, 0xFB6A, 0x9E5A, 0xF0CB,
05338     0x9E5B, 0xF0CC, 0x9E5C, 0xF0CD, 0x9E5D, 0xFB6B, 0x9E5E, 0xF0CE,
05339     0x9E5F, 0xFB6C, 0x9E60, 0xFB6D, 0x9E61, 0xFB6E, 0x9E62, 0xFB6F,
05340     0x9E63, 0xF0CF, 0x9E64, 0xBAD7, 0x9E65, 0xFB70, 0x9E66, 0xF0D0,
05341     0x9E67, 0xF0D1, 0x9E68, 0xF0D2, 0x9E69, 0xF0D3, 0x9E6A, 0xF0D4,
05342     0x9E6B, 0xF0D5, 0x9E6C, 0xF0D6, 0x9E6D, 0xF0D8, 0x9E6E, 0xFB71,
05343     0x9E6F, 0xFB72, 0x9E70, 0xD3A5, 0x9E71, 0xF0D7, 0x9E72, 0xFB73,
05344     0x9E73, 0xF0D9, 0x9E74, 0xFB74, 0x9E75, 0xFB75, 0x9E76, 0xFB76,
05345     0x9E77, 0xFB77, 0x9E78, 0xFB78, 0x9E79, 0xFB79, 0x9E7A, 0xFB7A,
05346     0x9E7B, 0xFB7B, 0x9E7C, 0xFB7C, 0x9E7D, 0xFB7D, 0x9E7E, 0xF5BA,
05347     0x9E7F, 0xC2B9, 0x9E80, 0xFB7E, 0x9E81, 0xFB80, 0x9E82, 0xF7E4,
05348     0x9E83, 0xFB81, 0x9E84, 0xFB82, 0x9E85, 0xFB83, 0x9E86, 0xFB84,
05349     0x9E87, 0xF7E5, 0x9E88, 0xF7E6, 0x9E89, 0xFB85, 0x9E8A, 0xFB86,
05350     0x9E8B, 0xF7E7, 0x9E8C, 0xFB87, 0x9E8D, 0xFB88, 0x9E8E, 0xFB89,
05351     0x9E8F, 0xFB8A, 0x9E90, 0xFB8B, 0x9E91, 0xFB8C, 0x9E92, 0xF7E8,
05352     0x9E93, 0xC2B4, 0x9E94, 0xFB8D, 0x9E95, 0xFB8E, 0x9E96, 0xFB8F,
05353     0x9E97, 0xFB90, 0x9E98, 0xFB91, 0x9E99, 0xFB92, 0x9E9A, 0xFB93,
05354     0x9E9B, 0xFB94, 0x9E9C, 0xFB95, 0x9E9D, 0xF7EA, 0x9E9E, 0xFB96,
05355     0x9E9F, 0xF7EB, 0x9EA0, 0xFB97, 0x9EA1, 0xFB98, 0x9EA2, 0xFB99,
05356     0x9EA3, 0xFB9A, 0x9EA4, 0xFB9B, 0x9EA5, 0xFB9C, 0x9EA6, 0xC2F3,
05357     0x9EA7, 0xFB9D, 0x9EA8, 0xFB9E, 0x9EA9, 0xFB9F, 0x9EAA, 0xFBA0,
05358     0x9EAB, 0xFC40, 0x9EAC, 0xFC41, 0x9EAD, 0xFC42, 0x9EAE, 0xFC43,
05359     0x9EAF, 0xFC44, 0x9EB0, 0xFC45, 0x9EB1, 0xFC46, 0x9EB2, 0xFC47,
05360     0x9EB3, 0xFC48, 0x9EB4, 0xF4F0, 0x9EB5, 0xFC49, 0x9EB6, 0xFC4A,
05361     0x9EB7, 0xFC4B, 0x9EB8, 0xF4EF, 0x9EB9, 0xFC4C, 0x9EBA, 0xFC4D,
05362     0x9EBB, 0xC2E9, 0x9EBC, 0xFC4E, 0x9EBD, 0xF7E1, 0x9EBE, 0xF7E2,
05363     0x9EBF, 0xFC4F, 0x9EC0, 0xFC50, 0x9EC1, 0xFC51, 0x9EC2, 0xFC52,
05364     0x9EC3, 0xFC53, 0x9EC4, 0xBBC6, 0x9EC5, 0xFC54, 0x9EC6, 0xFC55,
05365     0x9EC7, 0xFC56, 0x9EC8, 0xFC57, 0x9EC9, 0xD9E4, 0x9ECA, 0xFC58,
05366     0x9ECB, 0xFC59, 0x9ECC, 0xFC5A, 0x9ECD, 0xCAF2, 0x9ECE, 0xC0E8,
05367     0x9ECF, 0xF0A4, 0x9ED0, 0xFC5B, 0x9ED1, 0xBADA, 0x9ED2, 0xFC5C,
05368     0x9ED3, 0xFC5D, 0x9ED4, 0xC7AD, 0x9ED5, 0xFC5E, 0x9ED6, 0xFC5F,
05369     0x9ED7, 0xFC60, 0x9ED8, 0xC4AC, 0x9ED9, 0xFC61, 0x9EDA, 0xFC62,
05370     0x9EDB, 0xF7EC, 0x9EDC, 0xF7ED, 0x9EDD, 0xF7EE, 0x9EDE, 0xFC63,
05371     0x9EDF, 0xF7F0, 0x9EE0, 0xF7EF, 0x9EE1, 0xFC64, 0x9EE2, 0xF7F1,
05372     0x9EE3, 0xFC65, 0x9EE4, 0xFC66, 0x9EE5, 0xF7F4, 0x9EE6, 0xFC67,
05373     0x9EE7, 0xF7F3, 0x9EE8, 0xFC68, 0x9EE9, 0xF7F2, 0x9EEA, 0xF7F5,
05374     0x9EEB, 0xFC69, 0x9EEC, 0xFC6A, 0x9EED, 0xFC6B, 0x9EEE, 0xFC6C,
05375     0x9EEF, 0xF7F6, 0x9EF0, 0xFC6D, 0x9EF1, 0xFC6E, 0x9EF2, 0xFC6F,
05376     0x9EF3, 0xFC70, 0x9EF4, 0xFC71, 0x9EF5, 0xFC72, 0x9EF6, 0xFC73,
05377     0x9EF7, 0xFC74, 0x9EF8, 0xFC75, 0x9EF9, 0xEDE9, 0x9EFA, 0xFC76,
05378     0x9EFB, 0xEDEA, 0x9EFC, 0xEDEB, 0x9EFD, 0xFC77, 0x9EFE, 0xF6BC,
05379     0x9EFF, 0xFC78, 0x9F00, 0xFC79, 0x9F01, 0xFC7A, 0x9F02, 0xFC7B,
05380     0x9F03, 0xFC7C, 0x9F04, 0xFC7D, 0x9F05, 0xFC7E, 0x9F06, 0xFC80,
05381     0x9F07, 0xFC81, 0x9F08, 0xFC82, 0x9F09, 0xFC83, 0x9F0A, 0xFC84,
05382     0x9F0B, 0xF6BD, 0x9F0C, 0xFC85, 0x9F0D, 0xF6BE, 0x9F0E, 0xB6A6,
05383     0x9F0F, 0xFC86, 0x9F10, 0xD8BE, 0x9F11, 0xFC87, 0x9F12, 0xFC88,
05384     0x9F13, 0xB9C4, 0x9F14, 0xFC89, 0x9F15, 0xFC8A, 0x9F16, 0xFC8B,
05385     0x9F17, 0xD8BB, 0x9F18, 0xFC8C, 0x9F19, 0xDCB1, 0x9F1A, 0xFC8D,
05386     0x9F1B, 0xFC8E, 0x9F1C, 0xFC8F, 0x9F1D, 0xFC90, 0x9F1E, 0xFC91,
05387     0x9F1F, 0xFC92, 0x9F20, 0xCAF3, 0x9F21, 0xFC93, 0x9F22, 0xF7F7,
05388     0x9F23, 0xFC94, 0x9F24, 0xFC95, 0x9F25, 0xFC96, 0x9F26, 0xFC97,
05389     0x9F27, 0xFC98, 0x9F28, 0xFC99, 0x9F29, 0xFC9A, 0x9F2A, 0xFC9B,
05390     0x9F2B, 0xFC9C, 0x9F2C, 0xF7F8, 0x9F2D, 0xFC9D, 0x9F2E, 0xFC9E,
05391     0x9F2F, 0xF7F9, 0x9F30, 0xFC9F, 0x9F31, 0xFCA0, 0x9F32, 0xFD40,
05392     0x9F33, 0xFD41, 0x9F34, 0xFD42, 0x9F35, 0xFD43, 0x9F36, 0xFD44,
05393     0x9F37, 0xF7FB, 0x9F38, 0xFD45, 0x9F39, 0xF7FA, 0x9F3A, 0xFD46,
05394     0x9F3B, 0xB1C7, 0x9F3C, 0xFD47, 0x9F3D, 0xF7FC, 0x9F3E, 0xF7FD,
05395     0x9F3F, 0xFD48, 0x9F40, 0xFD49, 0x9F41, 0xFD4A, 0x9F42, 0xFD4B,
05396     0x9F43, 0xFD4C, 0x9F44, 0xF7FE, 0x9F45, 0xFD4D, 0x9F46, 0xFD4E,
05397     0x9F47, 0xFD4F, 0x9F48, 0xFD50, 0x9F49, 0xFD51, 0x9F4A, 0xFD52,
05398     0x9F4B, 0xFD53, 0x9F4C, 0xFD54, 0x9F4D, 0xFD55, 0x9F4E, 0xFD56,
05399     0x9F4F, 0xFD57, 0x9F50, 0xC6EB, 0x9F51, 0xECB4, 0x9F52, 0xFD58,
05400     0x9F53, 0xFD59, 0x9F54, 0xFD5A, 0x9F55, 0xFD5B, 0x9F56, 0xFD5C,
05401     0x9F57, 0xFD5D, 0x9F58, 0xFD5E, 0x9F59, 0xFD5F, 0x9F5A, 0xFD60,
05402     0x9F5B, 0xFD61, 0x9F5C, 0xFD62, 0x9F5D, 0xFD63, 0x9F5E, 0xFD64,
05403     0x9F5F, 0xFD65, 0x9F60, 0xFD66, 0x9F61, 0xFD67, 0x9F62, 0xFD68,
05404     0x9F63, 0xFD69, 0x9F64, 0xFD6A, 0x9F65, 0xFD6B, 0x9F66, 0xFD6C,
05405     0x9F67, 0xFD6D, 0x9F68, 0xFD6E, 0x9F69, 0xFD6F, 0x9F6A, 0xFD70,
05406     0x9F6B, 0xFD71, 0x9F6C, 0xFD72, 0x9F6D, 0xFD73, 0x9F6E, 0xFD74,
05407     0x9F6F, 0xFD75, 0x9F70, 0xFD76, 0x9F71, 0xFD77, 0x9F72, 0xFD78,
05408     0x9F73, 0xFD79, 0x9F74, 0xFD7A, 0x9F75, 0xFD7B, 0x9F76, 0xFD7C,
05409     0x9F77, 0xFD7D, 0x9F78, 0xFD7E, 0x9F79, 0xFD80, 0x9F7A, 0xFD81,
05410     0x9F7B, 0xFD82, 0x9F7C, 0xFD83, 0x9F7D, 0xFD84, 0x9F7E, 0xFD85,
05411     0x9F7F, 0xB3DD, 0x9F80, 0xF6B3, 0x9F81, 0xFD86, 0x9F82, 0xFD87,
05412     0x9F83, 0xF6B4, 0x9F84, 0xC1E4, 0x9F85, 0xF6B5, 0x9F86, 0xF6B6,
05413     0x9F87, 0xF6B7, 0x9F88, 0xF6B8, 0x9F89, 0xF6B9, 0x9F8A, 0xF6BA,
05414     0x9F8B, 0xC8A3, 0x9F8C, 0xF6BB, 0x9F8D, 0xFD88, 0x9F8E, 0xFD89,
05415     0x9F8F, 0xFD8A, 0x9F90, 0xFD8B, 0x9F91, 0xFD8C, 0x9F92, 0xFD8D,
05416     0x9F93, 0xFD8E, 0x9F94, 0xFD8F, 0x9F95, 0xFD90, 0x9F96, 0xFD91,
05417     0x9F97, 0xFD92, 0x9F98, 0xFD93, 0x9F99, 0xC1FA, 0x9F9A, 0xB9A8,
05418     0x9F9B, 0xEDE8, 0x9F9C, 0xFD94, 0x9F9D, 0xFD95, 0x9F9E, 0xFD96,
05419     0x9F9F, 0xB9EA, 0x9FA0, 0xD9DF, 0x9FA1, 0xFD97, 0x9FA2, 0xFD98,
05420     0x9FA3, 0xFD99, 0x9FA4, 0xFD9A, 0x9FA5, 0xFD9B, 0xF92C, 0xFD9C,
05421     0xF979, 0xFD9D, 0xF995, 0xFD9E, 0xF9E7, 0xFD9F, 0xF9F1, 0xFDA0,
05422     0xFA0C, 0xFE40, 0xFA0D, 0xFE41, 0xFA0E, 0xFE42, 0xFA0F, 0xFE43,
05423     0xFA11, 0xFE44, 0xFA13, 0xFE45, 0xFA14, 0xFE46, 0xFA18, 0xFE47,
05424     0xFA1F, 0xFE48, 0xFA20, 0xFE49, 0xFA21, 0xFE4A, 0xFA23, 0xFE4B,
05425     0xFA24, 0xFE4C, 0xFA27, 0xFE4D, 0xFA28, 0xFE4E, 0xFA29, 0xFE4F,
05426     0xFE30, 0xA955, 0xFE31, 0xA6F2, 0xFE33, 0xA6F4, 0xFE34, 0xA6F5,
05427     0xFE35, 0xA6E0, 0xFE36, 0xA6E1, 0xFE37, 0xA6F0, 0xFE38, 0xA6F1,
05428     0xFE39, 0xA6E2, 0xFE3A, 0xA6E3, 0xFE3B, 0xA6EE, 0xFE3C, 0xA6EF,
05429     0xFE3D, 0xA6E6, 0xFE3E, 0xA6E7, 0xFE3F, 0xA6E4, 0xFE40, 0xA6E5,
05430     0xFE41, 0xA6E8, 0xFE42, 0xA6E9, 0xFE43, 0xA6EA, 0xFE44, 0xA6EB,
05431     0xFE49, 0xA968, 0xFE4A, 0xA969, 0xFE4B, 0xA96A, 0xFE4C, 0xA96B,
05432     0xFE4D, 0xA96C, 0xFE4E, 0xA96D, 0xFE4F, 0xA96E, 0xFE50, 0xA96F,
05433     0xFE51, 0xA970, 0xFE52, 0xA971, 0xFE54, 0xA972, 0xFE55, 0xA973,
05434     0xFE56, 0xA974, 0xFE57, 0xA975, 0xFE59, 0xA976, 0xFE5A, 0xA977,
05435     0xFE5B, 0xA978, 0xFE5C, 0xA979, 0xFE5D, 0xA97A, 0xFE5E, 0xA97B,
05436     0xFE5F, 0xA97C, 0xFE60, 0xA97D, 0xFE61, 0xA97E, 0xFE62, 0xA980,
05437     0xFE63, 0xA981, 0xFE64, 0xA982, 0xFE65, 0xA983, 0xFE66, 0xA984,
05438     0xFE68, 0xA985, 0xFE69, 0xA986, 0xFE6A, 0xA987, 0xFE6B, 0xA988,
05439     0xFF01, 0xA3A1, 0xFF02, 0xA3A2, 0xFF03, 0xA3A3, 0xFF04, 0xA1E7,
05440     0xFF05, 0xA3A5, 0xFF06, 0xA3A6, 0xFF07, 0xA3A7, 0xFF08, 0xA3A8,
05441     0xFF09, 0xA3A9, 0xFF0A, 0xA3AA, 0xFF0B, 0xA3AB, 0xFF0C, 0xA3AC,
05442     0xFF0D, 0xA3AD, 0xFF0E, 0xA3AE, 0xFF0F, 0xA3AF, 0xFF10, 0xA3B0,
05443     0xFF11, 0xA3B1, 0xFF12, 0xA3B2, 0xFF13, 0xA3B3, 0xFF14, 0xA3B4,
05444     0xFF15, 0xA3B5, 0xFF16, 0xA3B6, 0xFF17, 0xA3B7, 0xFF18, 0xA3B8,
05445     0xFF19, 0xA3B9, 0xFF1A, 0xA3BA, 0xFF1B, 0xA3BB, 0xFF1C, 0xA3BC,
05446     0xFF1D, 0xA3BD, 0xFF1E, 0xA3BE, 0xFF1F, 0xA3BF, 0xFF20, 0xA3C0,
05447     0xFF21, 0xA3C1, 0xFF22, 0xA3C2, 0xFF23, 0xA3C3, 0xFF24, 0xA3C4,
05448     0xFF25, 0xA3C5, 0xFF26, 0xA3C6, 0xFF27, 0xA3C7, 0xFF28, 0xA3C8,
05449     0xFF29, 0xA3C9, 0xFF2A, 0xA3CA, 0xFF2B, 0xA3CB, 0xFF2C, 0xA3CC,
05450     0xFF2D, 0xA3CD, 0xFF2E, 0xA3CE, 0xFF2F, 0xA3CF, 0xFF30, 0xA3D0,
05451     0xFF31, 0xA3D1, 0xFF32, 0xA3D2, 0xFF33, 0xA3D3, 0xFF34, 0xA3D4,
05452     0xFF35, 0xA3D5, 0xFF36, 0xA3D6, 0xFF37, 0xA3D7, 0xFF38, 0xA3D8,
05453     0xFF39, 0xA3D9, 0xFF3A, 0xA3DA, 0xFF3B, 0xA3DB, 0xFF3C, 0xA3DC,
05454     0xFF3D, 0xA3DD, 0xFF3E, 0xA3DE, 0xFF3F, 0xA3DF, 0xFF40, 0xA3E0,
05455     0xFF41, 0xA3E1, 0xFF42, 0xA3E2, 0xFF43, 0xA3E3, 0xFF44, 0xA3E4,
05456     0xFF45, 0xA3E5, 0xFF46, 0xA3E6, 0xFF47, 0xA3E7, 0xFF48, 0xA3E8,
05457     0xFF49, 0xA3E9, 0xFF4A, 0xA3EA, 0xFF4B, 0xA3EB, 0xFF4C, 0xA3EC,
05458     0xFF4D, 0xA3ED, 0xFF4E, 0xA3EE, 0xFF4F, 0xA3EF, 0xFF50, 0xA3F0,
05459     0xFF51, 0xA3F1, 0xFF52, 0xA3F2, 0xFF53, 0xA3F3, 0xFF54, 0xA3F4,
05460     0xFF55, 0xA3F5, 0xFF56, 0xA3F6, 0xFF57, 0xA3F7, 0xFF58, 0xA3F8,
05461     0xFF59, 0xA3F9, 0xFF5A, 0xA3FA, 0xFF5B, 0xA3FB, 0xFF5C, 0xA3FC,
05462     0xFF5D, 0xA3FD, 0xFF5E, 0xA1AB, 0xFFE0, 0xA1E9, 0xFFE1, 0xA1EA,
05463     0xFFE2, 0xA956, 0xFFE3, 0xA3FE, 0xFFE4, 0xA957, 0xFFE5, 0xA3A4,
05464     0, 0
05465 };
05466
05467 static
05468 const WCHAR oem2uni[] = {
05469 /*  OEM - Unicode,  OEM - Unicode,  OEM - Unicode,  OEM - Unicode */
05470     0x0080, 0x20AC, 0x8140, 0x4E02, 0x8141, 0x4E04, 0x8142, 0x4E05,
05471     0x8143, 0x4E06, 0x8144, 0x4E0F, 0x8145, 0x4E12, 0x8146, 0x4E17,
05472     0x8147, 0x4E1F, 0x8148, 0x4E20, 0x8149, 0x4E21, 0x814A, 0x4E23,
05473     0x814B, 0x4E26, 0x814C, 0x4E29, 0x814D, 0x4E2E, 0x814E, 0x4E2F,
05474     0x814F, 0x4E31, 0x8150, 0x4E33, 0x8151, 0x4E35, 0x8152, 0x4E37,
05475     0x8153, 0x4E3C, 0x8154, 0x4E40, 0x8155, 0x4E41, 0x8156, 0x4E42,
05476     0x8157, 0x4E44, 0x8158, 0x4E46, 0x8159, 0x4E4A, 0x815A, 0x4E51,
05477     0x815B, 0x4E55, 0x815C, 0x4E57, 0x815D, 0x4E5A, 0x815E, 0x4E5B,
05478     0x815F, 0x4E62, 0x8160, 0x4E63, 0x8161, 0x4E64, 0x8162, 0x4E65,
05479     0x8163, 0x4E67, 0x8164, 0x4E68, 0x8165, 0x4E6A, 0x8166, 0x4E6B,
05480     0x8167, 0x4E6C, 0x8168, 0x4E6D, 0x8169, 0x4E6E, 0x816A, 0x4E6F,
05481     0x816B, 0x4E72, 0x816C, 0x4E74, 0x816D, 0x4E75, 0x816E, 0x4E76,
05482     0x816F, 0x4E77, 0x8170, 0x4E78, 0x8171, 0x4E79, 0x8172, 0x4E7A,
05483     0x8173, 0x4E7B, 0x8174, 0x4E7C, 0x8175, 0x4E7D, 0x8176, 0x4E7F,
05484     0x8177, 0x4E80, 0x8178, 0x4E81, 0x8179, 0x4E82, 0x817A, 0x4E83,
05485     0x817B, 0x4E84, 0x817C, 0x4E85, 0x817D, 0x4E87, 0x817E, 0x4E8A,
05486     0x8180, 0x4E90, 0x8181, 0x4E96, 0x8182, 0x4E97, 0x8183, 0x4E99,
05487     0x8184, 0x4E9C, 0x8185, 0x4E9D, 0x8186, 0x4E9E, 0x8187, 0x4EA3,
05488     0x8188, 0x4EAA, 0x8189, 0x4EAF, 0x818A, 0x4EB0, 0x818B, 0x4EB1,
05489     0x818C, 0x4EB4, 0x818D, 0x4EB6, 0x818E, 0x4EB7, 0x818F, 0x4EB8,
05490     0x8190, 0x4EB9, 0x8191, 0x4EBC, 0x8192, 0x4EBD, 0x8193, 0x4EBE,
05491     0x8194, 0x4EC8, 0x8195, 0x4ECC, 0x8196, 0x4ECF, 0x8197, 0x4ED0,
05492     0x8198, 0x4ED2, 0x8199, 0x4EDA, 0x819A, 0x4EDB, 0x819B, 0x4EDC,
05493     0x819C, 0x4EE0, 0x819D, 0x4EE2, 0x819E, 0x4EE6, 0x819F, 0x4EE7,
05494     0x81A0, 0x4EE9, 0x81A1, 0x4EED, 0x81A2, 0x4EEE, 0x81A3, 0x4EEF,
05495     0x81A4, 0x4EF1, 0x81A5, 0x4EF4, 0x81A6, 0x4EF8, 0x81A7, 0x4EF9,
05496     0x81A8, 0x4EFA, 0x81A9, 0x4EFC, 0x81AA, 0x4EFE, 0x81AB, 0x4F00,
05497     0x81AC, 0x4F02, 0x81AD, 0x4F03, 0x81AE, 0x4F04, 0x81AF, 0x4F05,
05498     0x81B0, 0x4F06, 0x81B1, 0x4F07, 0x81B2, 0x4F08, 0x81B3, 0x4F0B,
05499     0x81B4, 0x4F0C, 0x81B5, 0x4F12, 0x81B6, 0x4F13, 0x81B7, 0x4F14,
05500     0x81B8, 0x4F15, 0x81B9, 0x4F16, 0x81BA, 0x4F1C, 0x81BB, 0x4F1D,
05501     0x81BC, 0x4F21, 0x81BD, 0x4F23, 0x81BE, 0x4F28, 0x81BF, 0x4F29,
05502     0x81C0, 0x4F2C, 0x81C1, 0x4F2D, 0x81C2, 0x4F2E, 0x81C3, 0x4F31,
05503     0x81C4, 0x4F33, 0x81C5, 0x4F35, 0x81C6, 0x4F37, 0x81C7, 0x4F39,
05504     0x81C8, 0x4F3B, 0x81C9, 0x4F3E, 0x81CA, 0x4F3F, 0x81CB, 0x4F40,
05505     0x81CC, 0x4F41, 0x81CD, 0x4F42, 0x81CE, 0x4F44, 0x81CF, 0x4F45,
05506     0x81D0, 0x4F47, 0x81D1, 0x4F48, 0x81D2, 0x4F49, 0x81D3, 0x4F4A,
05507     0x81D4, 0x4F4B, 0x81D5, 0x4F4C, 0x81D6, 0x4F52, 0x81D7, 0x4F54,
05508     0x81D8, 0x4F56, 0x81D9, 0x4F61, 0x81DA, 0x4F62, 0x81DB, 0x4F66,
05509     0x81DC, 0x4F68, 0x81DD, 0x4F6A, 0x81DE, 0x4F6B, 0x81DF, 0x4F6D,
05510     0x81E0, 0x4F6E, 0x81E1, 0x4F71, 0x81E2, 0x4F72, 0x81E3, 0x4F75,
05511     0x81E4, 0x4F77, 0x81E5, 0x4F78, 0x81E6, 0x4F79, 0x81E7, 0x4F7A,
05512     0x81E8, 0x4F7D, 0x81E9, 0x4F80, 0x81EA, 0x4F81, 0x81EB, 0x4F82,
05513     0x81EC, 0x4F85, 0x81ED, 0x4F86, 0x81EE, 0x4F87, 0x81EF, 0x4F8A,
05514     0x81F0, 0x4F8C, 0x81F1, 0x4F8E, 0x81F2, 0x4F90, 0x81F3, 0x4F92,
05515     0x81F4, 0x4F93, 0x81F5, 0x4F95, 0x81F6, 0x4F96, 0x81F7, 0x4F98,
05516     0x81F8, 0x4F99, 0x81F9, 0x4F9A, 0x81FA, 0x4F9C, 0x81FB, 0x4F9E,
05517     0x81FC, 0x4F9F, 0x81FD, 0x4FA1, 0x81FE, 0x4FA2, 0x8240, 0x4FA4,
05518     0x8241, 0x4FAB, 0x8242, 0x4FAD, 0x8243, 0x4FB0, 0x8244, 0x4FB1,
05519     0x8245, 0x4FB2, 0x8246, 0x4FB3, 0x8247, 0x4FB4, 0x8248, 0x4FB6,
05520     0x8249, 0x4FB7, 0x824A, 0x4FB8, 0x824B, 0x4FB9, 0x824C, 0x4FBA,
05521     0x824D, 0x4FBB, 0x824E, 0x4FBC, 0x824F, 0x4FBD, 0x8250, 0x4FBE,
05522     0x8251, 0x4FC0, 0x8252, 0x4FC1, 0x8253, 0x4FC2, 0x8254, 0x4FC6,
05523     0x8255, 0x4FC7, 0x8256, 0x4FC8, 0x8257, 0x4FC9, 0x8258, 0x4FCB,
05524     0x8259, 0x4FCC, 0x825A, 0x4FCD, 0x825B, 0x4FD2, 0x825C, 0x4FD3,
05525     0x825D, 0x4FD4, 0x825E, 0x4FD5, 0x825F, 0x4FD6, 0x8260, 0x4FD9,
05526     0x8261, 0x4FDB, 0x8262, 0x4FE0, 0x8263, 0x4FE2, 0x8264, 0x4FE4,
05527     0x8265, 0x4FE5, 0x8266, 0x4FE7, 0x8267, 0x4FEB, 0x8268, 0x4FEC,
05528     0x8269, 0x4FF0, 0x826A, 0x4FF2, 0x826B, 0x4FF4, 0x826C, 0x4FF5,
05529     0x826D, 0x4FF6, 0x826E, 0x4FF7, 0x826F, 0x4FF9, 0x8270, 0x4FFB,
05530     0x8271, 0x4FFC, 0x8272, 0x4FFD, 0x8273, 0x4FFF, 0x8274, 0x5000,
05531     0x8275, 0x5001, 0x8276, 0x5002, 0x8277, 0x5003, 0x8278, 0x5004,
05532     0x8279, 0x5005, 0x827A, 0x5006, 0x827B, 0x5007, 0x827C, 0x5008,
05533     0x827D, 0x5009, 0x827E, 0x500A, 0x8280, 0x500B, 0x8281, 0x500E,
05534     0x8282, 0x5010, 0x8283, 0x5011, 0x8284, 0x5013, 0x8285, 0x5015,
05535     0x8286, 0x5016, 0x8287, 0x5017, 0x8288, 0x501B, 0x8289, 0x501D,
05536     0x828A, 0x501E, 0x828B, 0x5020, 0x828C, 0x5022, 0x828D, 0x5023,
05537     0x828E, 0x5024, 0x828F, 0x5027, 0x8290, 0x502B, 0x8291, 0x502F,
05538     0x8292, 0x5030, 0x8293, 0x5031, 0x8294, 0x5032, 0x8295, 0x5033,
05539     0x8296, 0x5034, 0x8297, 0x5035, 0x8298, 0x5036, 0x8299, 0x5037,
05540     0x829A, 0x5038, 0x829B, 0x5039, 0x829C, 0x503B, 0x829D, 0x503D,
05541     0x829E, 0x503F, 0x829F, 0x5040, 0x82A0, 0x5041, 0x82A1, 0x5042,
05542     0x82A2, 0x5044, 0x82A3, 0x5045, 0x82A4, 0x5046, 0x82A5, 0x5049,
05543     0x82A6, 0x504A, 0x82A7, 0x504B, 0x82A8, 0x504D, 0x82A9, 0x5050,
05544     0x82AA, 0x5051, 0x82AB, 0x5052, 0x82AC, 0x5053, 0x82AD, 0x5054,
05545     0x82AE, 0x5056, 0x82AF, 0x5057, 0x82B0, 0x5058, 0x82B1, 0x5059,
05546     0x82B2, 0x505B, 0x82B3, 0x505D, 0x82B4, 0x505E, 0x82B5, 0x505F,
05547     0x82B6, 0x5060, 0x82B7, 0x5061, 0x82B8, 0x5062, 0x82B9, 0x5063,
05548     0x82BA, 0x5064, 0x82BB, 0x5066, 0x82BC, 0x5067, 0x82BD, 0x5068,
05549     0x82BE, 0x5069, 0x82BF, 0x506A, 0x82C0, 0x506B, 0x82C1, 0x506D,
05550     0x82C2, 0x506E, 0x82C3, 0x506F, 0x82C4, 0x5070, 0x82C5, 0x5071,
05551     0x82C6, 0x5072, 0x82C7, 0x5073, 0x82C8, 0x5074, 0x82C9, 0x5075,
05552     0x82CA, 0x5078, 0x82CB, 0x5079, 0x82CC, 0x507A, 0x82CD, 0x507C,
05553     0x82CE, 0x507D, 0x82CF, 0x5081, 0x82D0, 0x5082, 0x82D1, 0x5083,
05554     0x82D2, 0x5084, 0x82D3, 0x5086, 0x82D4, 0x5087, 0x82D5, 0x5089,
05555     0x82D6, 0x508A, 0x82D7, 0x508B, 0x82D8, 0x508C, 0x82D9, 0x508E,
05556     0x82DA, 0x508F, 0x82DB, 0x5090, 0x82DC, 0x5091, 0x82DD, 0x5092,
05557     0x82DE, 0x5093, 0x82DF, 0x5094, 0x82E0, 0x5095, 0x82E1, 0x5096,
05558     0x82E2, 0x5097, 0x82E3, 0x5098, 0x82E4, 0x5099, 0x82E5, 0x509A,
05559     0x82E6, 0x509B, 0x82E7, 0x509C, 0x82E8, 0x509D, 0x82E9, 0x509E,
05560     0x82EA, 0x509F, 0x82EB, 0x50A0, 0x82EC, 0x50A1, 0x82ED, 0x50A2,
05561     0x82EE, 0x50A4, 0x82EF, 0x50A6, 0x82F0, 0x50AA, 0x82F1, 0x50AB,
05562     0x82F2, 0x50AD, 0x82F3, 0x50AE, 0x82F4, 0x50AF, 0x82F5, 0x50B0,
05563     0x82F6, 0x50B1, 0x82F7, 0x50B3, 0x82F8, 0x50B4, 0x82F9, 0x50B5,
05564     0x82FA, 0x50B6, 0x82FB, 0x50B7, 0x82FC, 0x50B8, 0x82FD, 0x50B9,
05565     0x82FE, 0x50BC, 0x8340, 0x50BD, 0x8341, 0x50BE, 0x8342, 0x50BF,
05566     0x8343, 0x50C0, 0x8344, 0x50C1, 0x8345, 0x50C2, 0x8346, 0x50C3,
05567     0x8347, 0x50C4, 0x8348, 0x50C5, 0x8349, 0x50C6, 0x834A, 0x50C7,
05568     0x834B, 0x50C8, 0x834C, 0x50C9, 0x834D, 0x50CA, 0x834E, 0x50CB,
05569     0x834F, 0x50CC, 0x8350, 0x50CD, 0x8351, 0x50CE, 0x8352, 0x50D0,
05570     0x8353, 0x50D1, 0x8354, 0x50D2, 0x8355, 0x50D3, 0x8356, 0x50D4,
05571     0x8357, 0x50D5, 0x8358, 0x50D7, 0x8359, 0x50D8, 0x835A, 0x50D9,
05572     0x835B, 0x50DB, 0x835C, 0x50DC, 0x835D, 0x50DD, 0x835E, 0x50DE,
05573     0x835F, 0x50DF, 0x8360, 0x50E0, 0x8361, 0x50E1, 0x8362, 0x50E2,
05574     0x8363, 0x50E3, 0x8364, 0x50E4, 0x8365, 0x50E5, 0x8366, 0x50E8,
05575     0x8367, 0x50E9, 0x8368, 0x50EA, 0x8369, 0x50EB, 0x836A, 0x50EF,
05576     0x836B, 0x50F0, 0x836C, 0x50F1, 0x836D, 0x50F2, 0x836E, 0x50F4,
05577     0x836F, 0x50F6, 0x8370, 0x50F7, 0x8371, 0x50F8, 0x8372, 0x50F9,
05578     0x8373, 0x50FA, 0x8374, 0x50FC, 0x8375, 0x50FD, 0x8376, 0x50FE,
05579     0x8377, 0x50FF, 0x8378, 0x5100, 0x8379, 0x5101, 0x837A, 0x5102,
05580     0x837B, 0x5103, 0x837C, 0x5104, 0x837D, 0x5105, 0x837E, 0x5108,
05581     0x8380, 0x5109, 0x8381, 0x510A, 0x8382, 0x510C, 0x8383, 0x510D,
05582     0x8384, 0x510E, 0x8385, 0x510F, 0x8386, 0x5110, 0x8387, 0x5111,
05583     0x8388, 0x5113, 0x8389, 0x5114, 0x838A, 0x5115, 0x838B, 0x5116,
05584     0x838C, 0x5117, 0x838D, 0x5118, 0x838E, 0x5119, 0x838F, 0x511A,
05585     0x8390, 0x511B, 0x8391, 0x511C, 0x8392, 0x511D, 0x8393, 0x511E,
05586     0x8394, 0x511F, 0x8395, 0x5120, 0x8396, 0x5122, 0x8397, 0x5123,
05587     0x8398, 0x5124, 0x8399, 0x5125, 0x839A, 0x5126, 0x839B, 0x5127,
05588     0x839C, 0x5128, 0x839D, 0x5129, 0x839E, 0x512A, 0x839F, 0x512B,
05589     0x83A0, 0x512C, 0x83A1, 0x512D, 0x83A2, 0x512E, 0x83A3, 0x512F,
05590     0x83A4, 0x5130, 0x83A5, 0x5131, 0x83A6, 0x5132, 0x83A7, 0x5133,
05591     0x83A8, 0x5134, 0x83A9, 0x5135, 0x83AA, 0x5136, 0x83AB, 0x5137,
05592     0x83AC, 0x5138, 0x83AD, 0x5139, 0x83AE, 0x513A, 0x83AF, 0x513B,
05593     0x83B0, 0x513C, 0x83B1, 0x513D, 0x83B2, 0x513E, 0x83B3, 0x5142,
05594     0x83B4, 0x5147, 0x83B5, 0x514A, 0x83B6, 0x514C, 0x83B7, 0x514E,
05595     0x83B8, 0x514F, 0x83B9, 0x5150, 0x83BA, 0x5152, 0x83BB, 0x5153,
05596     0x83BC, 0x5157, 0x83BD, 0x5158, 0x83BE, 0x5159, 0x83BF, 0x515B,
05597     0x83C0, 0x515D, 0x83C1, 0x515E, 0x83C2, 0x515F, 0x83C3, 0x5160,
05598     0x83C4, 0x5161, 0x83C5, 0x5163, 0x83C6, 0x5164, 0x83C7, 0x5166,
05599     0x83C8, 0x5167, 0x83C9, 0x5169, 0x83CA, 0x516A, 0x83CB, 0x516F,
05600     0x83CC, 0x5172, 0x83CD, 0x517A, 0x83CE, 0x517E, 0x83CF, 0x517F,
05601     0x83D0, 0x5183, 0x83D1, 0x5184, 0x83D2, 0x5186, 0x83D3, 0x5187,
05602     0x83D4, 0x518A, 0x83D5, 0x518B, 0x83D6, 0x518E, 0x83D7, 0x518F,
05603     0x83D8, 0x5190, 0x83D9, 0x5191, 0x83DA, 0x5193, 0x83DB, 0x5194,
05604     0x83DC, 0x5198, 0x83DD, 0x519A, 0x83DE, 0x519D, 0x83DF, 0x519E,
05605     0x83E0, 0x519F, 0x83E1, 0x51A1, 0x83E2, 0x51A3, 0x83E3, 0x51A6,
05606     0x83E4, 0x51A7, 0x83E5, 0x51A8, 0x83E6, 0x51A9, 0x83E7, 0x51AA,
05607     0x83E8, 0x51AD, 0x83E9, 0x51AE, 0x83EA, 0x51B4, 0x83EB, 0x51B8,
05608     0x83EC, 0x51B9, 0x83ED, 0x51BA, 0x83EE, 0x51BE, 0x83EF, 0x51BF,
05609     0x83F0, 0x51C1, 0x83F1, 0x51C2, 0x83F2, 0x51C3, 0x83F3, 0x51C5,
05610     0x83F4, 0x51C8, 0x83F5, 0x51CA, 0x83F6, 0x51CD, 0x83F7, 0x51CE,
05611     0x83F8, 0x51D0, 0x83F9, 0x51D2, 0x83FA, 0x51D3, 0x83FB, 0x51D4,
05612     0x83FC, 0x51D5, 0x83FD, 0x51D6, 0x83FE, 0x51D7, 0x8440, 0x51D8,
05613     0x8441, 0x51D9, 0x8442, 0x51DA, 0x8443, 0x51DC, 0x8444, 0x51DE,
05614     0x8445, 0x51DF, 0x8446, 0x51E2, 0x8447, 0x51E3, 0x8448, 0x51E5,
05615     0x8449, 0x51E6, 0x844A, 0x51E7, 0x844B, 0x51E8, 0x844C, 0x51E9,
05616     0x844D, 0x51EA, 0x844E, 0x51EC, 0x844F, 0x51EE, 0x8450, 0x51F1,
05617     0x8451, 0x51F2, 0x8452, 0x51F4, 0x8453, 0x51F7, 0x8454, 0x51FE,
05618     0x8455, 0x5204, 0x8456, 0x5205, 0x8457, 0x5209, 0x8458, 0x520B,
05619     0x8459, 0x520C, 0x845A, 0x520F, 0x845B, 0x5210, 0x845C, 0x5213,
05620     0x845D, 0x5214, 0x845E, 0x5215, 0x845F, 0x521C, 0x8460, 0x521E,
05621     0x8461, 0x521F, 0x8462, 0x5221, 0x8463, 0x5222, 0x8464, 0x5223,
05622     0x8465, 0x5225, 0x8466, 0x5226, 0x8467, 0x5227, 0x8468, 0x522A,
05623     0x8469, 0x522C, 0x846A, 0x522F, 0x846B, 0x5231, 0x846C, 0x5232,
05624     0x846D, 0x5234, 0x846E, 0x5235, 0x846F, 0x523C, 0x8470, 0x523E,
05625     0x8471, 0x5244, 0x8472, 0x5245, 0x8473, 0x5246, 0x8474, 0x5247,
05626     0x8475, 0x5248, 0x8476, 0x5249, 0x8477, 0x524B, 0x8478, 0x524E,
05627     0x8479, 0x524F, 0x847A, 0x5252, 0x847B, 0x5253, 0x847C, 0x5255,
05628     0x847D, 0x5257, 0x847E, 0x5258, 0x8480, 0x5259, 0x8481, 0x525A,
05629     0x8482, 0x525B, 0x8483, 0x525D, 0x8484, 0x525F, 0x8485, 0x5260,
05630     0x8486, 0x5262, 0x8487, 0x5263, 0x8488, 0x5264, 0x8489, 0x5266,
05631     0x848A, 0x5268, 0x848B, 0x526B, 0x848C, 0x526C, 0x848D, 0x526D,
05632     0x848E, 0x526E, 0x848F, 0x5270, 0x8490, 0x5271, 0x8491, 0x5273,
05633     0x8492, 0x5274, 0x8493, 0x5275, 0x8494, 0x5276, 0x8495, 0x5277,
05634     0x8496, 0x5278, 0x8497, 0x5279, 0x8498, 0x527A, 0x8499, 0x527B,
05635     0x849A, 0x527C, 0x849B, 0x527E, 0x849C, 0x5280, 0x849D, 0x5283,
05636     0x849E, 0x5284, 0x849F, 0x5285, 0x84A0, 0x5286, 0x84A1, 0x5287,
05637     0x84A2, 0x5289, 0x84A3, 0x528A, 0x84A4, 0x528B, 0x84A5, 0x528C,
05638     0x84A6, 0x528D, 0x84A7, 0x528E, 0x84A8, 0x528F, 0x84A9, 0x5291,
05639     0x84AA, 0x5292, 0x84AB, 0x5294, 0x84AC, 0x5295, 0x84AD, 0x5296,
05640     0x84AE, 0x5297, 0x84AF, 0x5298, 0x84B0, 0x5299, 0x84B1, 0x529A,
05641     0x84B2, 0x529C, 0x84B3, 0x52A4, 0x84B4, 0x52A5, 0x84B5, 0x52A6,
05642     0x84B6, 0x52A7, 0x84B7, 0x52AE, 0x84B8, 0x52AF, 0x84B9, 0x52B0,
05643     0x84BA, 0x52B4, 0x84BB, 0x52B5, 0x84BC, 0x52B6, 0x84BD, 0x52B7,
05644     0x84BE, 0x52B8, 0x84BF, 0x52B9, 0x84C0, 0x52BA, 0x84C1, 0x52BB,
05645     0x84C2, 0x52BC, 0x84C3, 0x52BD, 0x84C4, 0x52C0, 0x84C5, 0x52C1,
05646     0x84C6, 0x52C2, 0x84C7, 0x52C4, 0x84C8, 0x52C5, 0x84C9, 0x52C6,
05647     0x84CA, 0x52C8, 0x84CB, 0x52CA, 0x84CC, 0x52CC, 0x84CD, 0x52CD,
05648     0x84CE, 0x52CE, 0x84CF, 0x52CF, 0x84D0, 0x52D1, 0x84D1, 0x52D3,
05649     0x84D2, 0x52D4, 0x84D3, 0x52D5, 0x84D4, 0x52D7, 0x84D5, 0x52D9,
05650     0x84D6, 0x52DA, 0x84D7, 0x52DB, 0x84D8, 0x52DC, 0x84D9, 0x52DD,
05651     0x84DA, 0x52DE, 0x84DB, 0x52E0, 0x84DC, 0x52E1, 0x84DD, 0x52E2,
05652     0x84DE, 0x52E3, 0x84DF, 0x52E5, 0x84E0, 0x52E6, 0x84E1, 0x52E7,
05653     0x84E2, 0x52E8, 0x84E3, 0x52E9, 0x84E4, 0x52EA, 0x84E5, 0x52EB,
05654     0x84E6, 0x52EC, 0x84E7, 0x52ED, 0x84E8, 0x52EE, 0x84E9, 0x52EF,
05655     0x84EA, 0x52F1, 0x84EB, 0x52F2, 0x84EC, 0x52F3, 0x84ED, 0x52F4,
05656     0x84EE, 0x52F5, 0x84EF, 0x52F6, 0x84F0, 0x52F7, 0x84F1, 0x52F8,
05657     0x84F2, 0x52FB, 0x84F3, 0x52FC, 0x84F4, 0x52FD, 0x84F5, 0x5301,
05658     0x84F6, 0x5302, 0x84F7, 0x5303, 0x84F8, 0x5304, 0x84F9, 0x5307,
05659     0x84FA, 0x5309, 0x84FB, 0x530A, 0x84FC, 0x530B, 0x84FD, 0x530C,
05660     0x84FE, 0x530E, 0x8540, 0x5311, 0x8541, 0x5312, 0x8542, 0x5313,
05661     0x8543, 0x5314, 0x8544, 0x5318, 0x8545, 0x531B, 0x8546, 0x531C,
05662     0x8547, 0x531E, 0x8548, 0x531F, 0x8549, 0x5322, 0x854A, 0x5324,
05663     0x854B, 0x5325, 0x854C, 0x5327, 0x854D, 0x5328, 0x854E, 0x5329,
05664     0x854F, 0x532B, 0x8550, 0x532C, 0x8551, 0x532D, 0x8552, 0x532F,
05665     0x8553, 0x5330, 0x8554, 0x5331, 0x8555, 0x5332, 0x8556, 0x5333,
05666     0x8557, 0x5334, 0x8558, 0x5335, 0x8559, 0x5336, 0x855A, 0x5337,
05667     0x855B, 0x5338, 0x855C, 0x533C, 0x855D, 0x533D, 0x855E, 0x5340,
05668     0x855F, 0x5342, 0x8560, 0x5344, 0x8561, 0x5346, 0x8562, 0x534B,
05669     0x8563, 0x534C, 0x8564, 0x534D, 0x8565, 0x5350, 0x8566, 0x5354,
05670     0x8567, 0x5358, 0x8568, 0x5359, 0x8569, 0x535B, 0x856A, 0x535D,
05671     0x856B, 0x5365, 0x856C, 0x5368, 0x856D, 0x536A, 0x856E, 0x536C,
05672     0x856F, 0x536D, 0x8570, 0x5372, 0x8571, 0x5376, 0x8572, 0x5379,
05673     0x8573, 0x537B, 0x8574, 0x537C, 0x8575, 0x537D, 0x8576, 0x537E,
05674     0x8577, 0x5380, 0x8578, 0x5381, 0x8579, 0x5383, 0x857A, 0x5387,
05675     0x857B, 0x5388, 0x857C, 0x538A, 0x857D, 0x538E, 0x857E, 0x538F,
05676     0x8580, 0x5390, 0x8581, 0x5391, 0x8582, 0x5392, 0x8583, 0x5393,
05677     0x8584, 0x5394, 0x8585, 0x5396, 0x8586, 0x5397, 0x8587, 0x5399,
05678     0x8588, 0x539B, 0x8589, 0x539C, 0x858A, 0x539E, 0x858B, 0x53A0,
05679     0x858C, 0x53A1, 0x858D, 0x53A4, 0x858E, 0x53A7, 0x858F, 0x53AA,
05680     0x8590, 0x53AB, 0x8591, 0x53AC, 0x8592, 0x53AD, 0x8593, 0x53AF,
05681     0x8594, 0x53B0, 0x8595, 0x53B1, 0x8596, 0x53B2, 0x8597, 0x53B3,
05682     0x8598, 0x53B4, 0x8599, 0x53B5, 0x859A, 0x53B7, 0x859B, 0x53B8,
05683     0x859C, 0x53B9, 0x859D, 0x53BA, 0x859E, 0x53BC, 0x859F, 0x53BD,
05684     0x85A0, 0x53BE, 0x85A1, 0x53C0, 0x85A2, 0x53C3, 0x85A3, 0x53C4,
05685     0x85A4, 0x53C5, 0x85A5, 0x53C6, 0x85A6, 0x53C7, 0x85A7, 0x53CE,
05686     0x85A8, 0x53CF, 0x85A9, 0x53D0, 0x85AA, 0x53D2, 0x85AB, 0x53D3,
05687     0x85AC, 0x53D5, 0x85AD, 0x53DA, 0x85AE, 0x53DC, 0x85AF, 0x53DD,
05688     0x85B0, 0x53DE, 0x85B1, 0x53E1, 0x85B2, 0x53E2, 0x85B3, 0x53E7,
05689     0x85B4, 0x53F4, 0x85B5, 0x53FA, 0x85B6, 0x53FE, 0x85B7, 0x53FF,
05690     0x85B8, 0x5400, 0x85B9, 0x5402, 0x85BA, 0x5405, 0x85BB, 0x5407,
05691     0x85BC, 0x540B, 0x85BD, 0x5414, 0x85BE, 0x5418, 0x85BF, 0x5419,
05692     0x85C0, 0x541A, 0x85C1, 0x541C, 0x85C2, 0x5422, 0x85C3, 0x5424,
05693     0x85C4, 0x5425, 0x85C5, 0x542A, 0x85C6, 0x5430, 0x85C7, 0x5433,
05694     0x85C8, 0x5436, 0x85C9, 0x5437, 0x85CA, 0x543A, 0x85CB, 0x543D,
05695     0x85CC, 0x543F, 0x85CD, 0x5441, 0x85CE, 0x5442, 0x85CF, 0x5444,
05696     0x85D0, 0x5445, 0x85D1, 0x5447, 0x85D2, 0x5449, 0x85D3, 0x544C,
05697     0x85D4, 0x544D, 0x85D5, 0x544E, 0x85D6, 0x544F, 0x85D7, 0x5451,
05698     0x85D8, 0x545A, 0x85D9, 0x545D, 0x85DA, 0x545E, 0x85DB, 0x545F,
05699     0x85DC, 0x5460, 0x85DD, 0x5461, 0x85DE, 0x5463, 0x85DF, 0x5465,
05700     0x85E0, 0x5467, 0x85E1, 0x5469, 0x85E2, 0x546A, 0x85E3, 0x546B,
05701     0x85E4, 0x546C, 0x85E5, 0x546D, 0x85E6, 0x546E, 0x85E7, 0x546F,
05702     0x85E8, 0x5470, 0x85E9, 0x5474, 0x85EA, 0x5479, 0x85EB, 0x547A,
05703     0x85EC, 0x547E, 0x85ED, 0x547F, 0x85EE, 0x5481, 0x85EF, 0x5483,
05704     0x85F0, 0x5485, 0x85F1, 0x5487, 0x85F2, 0x5488, 0x85F3, 0x5489,
05705     0x85F4, 0x548A, 0x85F5, 0x548D, 0x85F6, 0x5491, 0x85F7, 0x5493,
05706     0x85F8, 0x5497, 0x85F9, 0x5498, 0x85FA, 0x549C, 0x85FB, 0x549E,
05707     0x85FC, 0x549F, 0x85FD, 0x54A0, 0x85FE, 0x54A1, 0x8640, 0x54A2,
05708     0x8641, 0x54A5, 0x8642, 0x54AE, 0x8643, 0x54B0, 0x8644, 0x54B2,
05709     0x8645, 0x54B5, 0x8646, 0x54B6, 0x8647, 0x54B7, 0x8648, 0x54B9,
05710     0x8649, 0x54BA, 0x864A, 0x54BC, 0x864B, 0x54BE, 0x864C, 0x54C3,
05711     0x864D, 0x54C5, 0x864E, 0x54CA, 0x864F, 0x54CB, 0x8650, 0x54D6,
05712     0x8651, 0x54D8, 0x8652, 0x54DB, 0x8653, 0x54E0, 0x8654, 0x54E1,
05713     0x8655, 0x54E2, 0x8656, 0x54E3, 0x8657, 0x54E4, 0x8658, 0x54EB,
05714     0x8659, 0x54EC, 0x865A, 0x54EF, 0x865B, 0x54F0, 0x865C, 0x54F1,
05715     0x865D, 0x54F4, 0x865E, 0x54F5, 0x865F, 0x54F6, 0x8660, 0x54F7,
05716     0x8661, 0x54F8, 0x8662, 0x54F9, 0x8663, 0x54FB, 0x8664, 0x54FE,
05717     0x8665, 0x5500, 0x8666, 0x5502, 0x8667, 0x5503, 0x8668, 0x5504,
05718     0x8669, 0x5505, 0x866A, 0x5508, 0x866B, 0x550A, 0x866C, 0x550B,
05719     0x866D, 0x550C, 0x866E, 0x550D, 0x866F, 0x550E, 0x8670, 0x5512,
05720     0x8671, 0x5513, 0x8672, 0x5515, 0x8673, 0x5516, 0x8674, 0x5517,
05721     0x8675, 0x5518, 0x8676, 0x5519, 0x8677, 0x551A, 0x8678, 0x551C,
05722     0x8679, 0x551D, 0x867A, 0x551E, 0x867B, 0x551F, 0x867C, 0x5521,
05723     0x867D, 0x5525, 0x867E, 0x5526, 0x8680, 0x5528, 0x8681, 0x5529,
05724     0x8682, 0x552B, 0x8683, 0x552D, 0x8684, 0x5532, 0x8685, 0x5534,
05725     0x8686, 0x5535, 0x8687, 0x5536, 0x8688, 0x5538, 0x8689, 0x5539,
05726     0x868A, 0x553A, 0x868B, 0x553B, 0x868C, 0x553D, 0x868D, 0x5540,
05727     0x868E, 0x5542, 0x868F, 0x5545, 0x8690, 0x5547, 0x8691, 0x5548,
05728     0x8692, 0x554B, 0x8693, 0x554C, 0x8694, 0x554D, 0x8695, 0x554E,
05729     0x8696, 0x554F, 0x8697, 0x5551, 0x8698, 0x5552, 0x8699, 0x5553,
05730     0x869A, 0x5554, 0x869B, 0x5557, 0x869C, 0x5558, 0x869D, 0x5559,
05731     0x869E, 0x555A, 0x869F, 0x555B, 0x86A0, 0x555D, 0x86A1, 0x555E,
05732     0x86A2, 0x555F, 0x86A3, 0x5560, 0x86A4, 0x5562, 0x86A5, 0x5563,
05733     0x86A6, 0x5568, 0x86A7, 0x5569, 0x86A8, 0x556B, 0x86A9, 0x556F,
05734     0x86AA, 0x5570, 0x86AB, 0x5571, 0x86AC, 0x5572, 0x86AD, 0x5573,
05735     0x86AE, 0x5574, 0x86AF, 0x5579, 0x86B0, 0x557A, 0x86B1, 0x557D,
05736     0x86B2, 0x557F, 0x86B3, 0x5585, 0x86B4, 0x5586, 0x86B5, 0x558C,
05737     0x86B6, 0x558D, 0x86B7, 0x558E, 0x86B8, 0x5590, 0x86B9, 0x5592,
05738     0x86BA, 0x5593, 0x86BB, 0x5595, 0x86BC, 0x5596, 0x86BD, 0x5597,
05739     0x86BE, 0x559A, 0x86BF, 0x559B, 0x86C0, 0x559E, 0x86C1, 0x55A0,
05740     0x86C2, 0x55A1, 0x86C3, 0x55A2, 0x86C4, 0x55A3, 0x86C5, 0x55A4,
05741     0x86C6, 0x55A5, 0x86C7, 0x55A6, 0x86C8, 0x55A8, 0x86C9, 0x55A9,
05742     0x86CA, 0x55AA, 0x86CB, 0x55AB, 0x86CC, 0x55AC, 0x86CD, 0x55AD,
05743     0x86CE, 0x55AE, 0x86CF, 0x55AF, 0x86D0, 0x55B0, 0x86D1, 0x55B2,
05744     0x86D2, 0x55B4, 0x86D3, 0x55B6, 0x86D4, 0x55B8, 0x86D5, 0x55BA,
05745     0x86D6, 0x55BC, 0x86D7, 0x55BF, 0x86D8, 0x55C0, 0x86D9, 0x55C1,
05746     0x86DA, 0x55C2, 0x86DB, 0x55C3, 0x86DC, 0x55C6, 0x86DD, 0x55C7,
05747     0x86DE, 0x55C8, 0x86DF, 0x55CA, 0x86E0, 0x55CB, 0x86E1, 0x55CE,
05748     0x86E2, 0x55CF, 0x86E3, 0x55D0, 0x86E4, 0x55D5, 0x86E5, 0x55D7,
05749     0x86E6, 0x55D8, 0x86E7, 0x55D9, 0x86E8, 0x55DA, 0x86E9, 0x55DB,
05750     0x86EA, 0x55DE, 0x86EB, 0x55E0, 0x86EC, 0x55E2, 0x86ED, 0x55E7,
05751     0x86EE, 0x55E9, 0x86EF, 0x55ED, 0x86F0, 0x55EE, 0x86F1, 0x55F0,
05752     0x86F2, 0x55F1, 0x86F3, 0x55F4, 0x86F4, 0x55F6, 0x86F5, 0x55F8,
05753     0x86F6, 0x55F9, 0x86F7, 0x55FA, 0x86F8, 0x55FB, 0x86F9, 0x55FC,
05754     0x86FA, 0x55FF, 0x86FB, 0x5602, 0x86FC, 0x5603, 0x86FD, 0x5604,
05755     0x86FE, 0x5605, 0x8740, 0x5606, 0x8741, 0x5607, 0x8742, 0x560A,
05756     0x8743, 0x560B, 0x8744, 0x560D, 0x8745, 0x5610, 0x8746, 0x5611,
05757     0x8747, 0x5612, 0x8748, 0x5613, 0x8749, 0x5614, 0x874A, 0x5615,
05758     0x874B, 0x5616, 0x874C, 0x5617, 0x874D, 0x5619, 0x874E, 0x561A,
05759     0x874F, 0x561C, 0x8750, 0x561D, 0x8751, 0x5620, 0x8752, 0x5621,
05760     0x8753, 0x5622, 0x8754, 0x5625, 0x8755, 0x5626, 0x8756, 0x5628,
05761     0x8757, 0x5629, 0x8758, 0x562A, 0x8759, 0x562B, 0x875A, 0x562E,
05762     0x875B, 0x562F, 0x875C, 0x5630, 0x875D, 0x5633, 0x875E, 0x5635,
05763     0x875F, 0x5637, 0x8760, 0x5638, 0x8761, 0x563A, 0x8762, 0x563C,
05764     0x8763, 0x563D, 0x8764, 0x563E, 0x8765, 0x5640, 0x8766, 0x5641,
05765     0x8767, 0x5642, 0x8768, 0x5643, 0x8769, 0x5644, 0x876A, 0x5645,
05766     0x876B, 0x5646, 0x876C, 0x5647, 0x876D, 0x5648, 0x876E, 0x5649,
05767     0x876F, 0x564A, 0x8770, 0x564B, 0x8771, 0x564F, 0x8772, 0x5650,
05768     0x8773, 0x5651, 0x8774, 0x5652, 0x8775, 0x5653, 0x8776, 0x5655,
05769     0x8777, 0x5656, 0x8778, 0x565A, 0x8779, 0x565B, 0x877A, 0x565D,
05770     0x877B, 0x565E, 0x877C, 0x565F, 0x877D, 0x5660, 0x877E, 0x5661,
05771     0x8780, 0x5663, 0x8781, 0x5665, 0x8782, 0x5666, 0x8783, 0x5667,
05772     0x8784, 0x566D, 0x8785, 0x566E, 0x8786, 0x566F, 0x8787, 0x5670,
05773     0x8788, 0x5672, 0x8789, 0x5673, 0x878A, 0x5674, 0x878B, 0x5675,
05774     0x878C, 0x5677, 0x878D, 0x5678, 0x878E, 0x5679, 0x878F, 0x567A,
05775     0x8790, 0x567D, 0x8791, 0x567E, 0x8792, 0x567F, 0x8793, 0x5680,
05776     0x8794, 0x5681, 0x8795, 0x5682, 0x8796, 0x5683, 0x8797, 0x5684,
05777     0x8798, 0x5687, 0x8799, 0x5688, 0x879A, 0x5689, 0x879B, 0x568A,
05778     0x879C, 0x568B, 0x879D, 0x568C, 0x879E, 0x568D, 0x879F, 0x5690,
05779     0x87A0, 0x5691, 0x87A1, 0x5692, 0x87A2, 0x5694, 0x87A3, 0x5695,
05780     0x87A4, 0x5696, 0x87A5, 0x5697, 0x87A6, 0x5698, 0x87A7, 0x5699,
05781     0x87A8, 0x569A, 0x87A9, 0x569B, 0x87AA, 0x569C, 0x87AB, 0x569D,
05782     0x87AC, 0x569E, 0x87AD, 0x569F, 0x87AE, 0x56A0, 0x87AF, 0x56A1,
05783     0x87B0, 0x56A2, 0x87B1, 0x56A4, 0x87B2, 0x56A5, 0x87B3, 0x56A6,
05784     0x87B4, 0x56A7, 0x87B5, 0x56A8, 0x87B6, 0x56A9, 0x87B7, 0x56AA,
05785     0x87B8, 0x56AB, 0x87B9, 0x56AC, 0x87BA, 0x56AD, 0x87BB, 0x56AE,
05786     0x87BC, 0x56B0, 0x87BD, 0x56B1, 0x87BE, 0x56B2, 0x87BF, 0x56B3,
05787     0x87C0, 0x56B4, 0x87C1, 0x56B5, 0x87C2, 0x56B6, 0x87C3, 0x56B8,
05788     0x87C4, 0x56B9, 0x87C5, 0x56BA, 0x87C6, 0x56BB, 0x87C7, 0x56BD,
05789     0x87C8, 0x56BE, 0x87C9, 0x56BF, 0x87CA, 0x56C0, 0x87CB, 0x56C1,
05790     0x87CC, 0x56C2, 0x87CD, 0x56C3, 0x87CE, 0x56C4, 0x87CF, 0x56C5,
05791     0x87D0, 0x56C6, 0x87D1, 0x56C7, 0x87D2, 0x56C8, 0x87D3, 0x56C9,
05792     0x87D4, 0x56CB, 0x87D5, 0x56CC, 0x87D6, 0x56CD, 0x87D7, 0x56CE,
05793     0x87D8, 0x56CF, 0x87D9, 0x56D0, 0x87DA, 0x56D1, 0x87DB, 0x56D2,
05794     0x87DC, 0x56D3, 0x87DD, 0x56D5, 0x87DE, 0x56D6, 0x87DF, 0x56D8,
05795     0x87E0, 0x56D9, 0x87E1, 0x56DC, 0x87E2, 0x56E3, 0x87E3, 0x56E5,
05796     0x87E4, 0x56E6, 0x87E5, 0x56E7, 0x87E6, 0x56E8, 0x87E7, 0x56E9,
05797     0x87E8, 0x56EA, 0x87E9, 0x56EC, 0x87EA, 0x56EE, 0x87EB, 0x56EF,
05798     0x87EC, 0x56F2, 0x87ED, 0x56F3, 0x87EE, 0x56F6, 0x87EF, 0x56F7,
05799     0x87F0, 0x56F8, 0x87F1, 0x56FB, 0x87F2, 0x56FC, 0x87F3, 0x5700,
05800     0x87F4, 0x5701, 0x87F5, 0x5702, 0x87F6, 0x5705, 0x87F7, 0x5707,
05801     0x87F8, 0x570B, 0x87F9, 0x570C, 0x87FA, 0x570D, 0x87FB, 0x570E,
05802     0x87FC, 0x570F, 0x87FD, 0x5710, 0x87FE, 0x5711, 0x8840, 0x5712,
05803     0x8841, 0x5713, 0x8842, 0x5714, 0x8843, 0x5715, 0x8844, 0x5716,
05804     0x8845, 0x5717, 0x8846, 0x5718, 0x8847, 0x5719, 0x8848, 0x571A,
05805     0x8849, 0x571B, 0x884A, 0x571D, 0x884B, 0x571E, 0x884C, 0x5720,
05806     0x884D, 0x5721, 0x884E, 0x5722, 0x884F, 0x5724, 0x8850, 0x5725,
05807     0x8851, 0x5726, 0x8852, 0x5727, 0x8853, 0x572B, 0x8854, 0x5731,
05808     0x8855, 0x5732, 0x8856, 0x5734, 0x8857, 0x5735, 0x8858, 0x5736,
05809     0x8859, 0x5737, 0x885A, 0x5738, 0x885B, 0x573C, 0x885C, 0x573D,
05810     0x885D, 0x573F, 0x885E, 0x5741, 0x885F, 0x5743, 0x8860, 0x5744,
05811     0x8861, 0x5745, 0x8862, 0x5746, 0x8863, 0x5748, 0x8864, 0x5749,
05812     0x8865, 0x574B, 0x8866, 0x5752, 0x8867, 0x5753, 0x8868, 0x5754,
05813     0x8869, 0x5755, 0x886A, 0x5756, 0x886B, 0x5758, 0x886C, 0x5759,
05814     0x886D, 0x5762, 0x886E, 0x5763, 0x886F, 0x5765, 0x8870, 0x5767,
05815     0x8871, 0x576C, 0x8872, 0x576E, 0x8873, 0x5770, 0x8874, 0x5771,
05816     0x8875, 0x5772, 0x8876, 0x5774, 0x8877, 0x5775, 0x8878, 0x5778,
05817     0x8879, 0x5779, 0x887A, 0x577A, 0x887B, 0x577D, 0x887C, 0x577E,
05818     0x887D, 0x577F, 0x887E, 0x5780, 0x8880, 0x5781, 0x8881, 0x5787,
05819     0x8882, 0x5788, 0x8883, 0x5789, 0x8884, 0x578A, 0x8885, 0x578D,
05820     0x8886, 0x578E, 0x8887, 0x578F, 0x8888, 0x5790, 0x8889, 0x5791,
05821     0x888A, 0x5794, 0x888B, 0x5795, 0x888C, 0x5796, 0x888D, 0x5797,
05822     0x888E, 0x5798, 0x888F, 0x5799, 0x8890, 0x579A, 0x8891, 0x579C,
05823     0x8892, 0x579D, 0x8893, 0x579E, 0x8894, 0x579F, 0x8895, 0x57A5,
05824     0x8896, 0x57A8, 0x8897, 0x57AA, 0x8898, 0x57AC, 0x8899, 0x57AF,
05825     0x889A, 0x57B0, 0x889B, 0x57B1, 0x889C, 0x57B3, 0x889D, 0x57B5,
05826     0x889E, 0x57B6, 0x889F, 0x57B7, 0x88A0, 0x57B9, 0x88A1, 0x57BA,
05827     0x88A2, 0x57BB, 0x88A3, 0x57BC, 0x88A4, 0x57BD, 0x88A5, 0x57BE,
05828     0x88A6, 0x57BF, 0x88A7, 0x57C0, 0x88A8, 0x57C1, 0x88A9, 0x57C4,
05829     0x88AA, 0x57C5, 0x88AB, 0x57C6, 0x88AC, 0x57C7, 0x88AD, 0x57C8,
05830     0x88AE, 0x57C9, 0x88AF, 0x57CA, 0x88B0, 0x57CC, 0x88B1, 0x57CD,
05831     0x88B2, 0x57D0, 0x88B3, 0x57D1, 0x88B4, 0x57D3, 0x88B5, 0x57D6,
05832     0x88B6, 0x57D7, 0x88B7, 0x57DB, 0x88B8, 0x57DC, 0x88B9, 0x57DE,
05833     0x88BA, 0x57E1, 0x88BB, 0x57E2, 0x88BC, 0x57E3, 0x88BD, 0x57E5,
05834     0x88BE, 0x57E6, 0x88BF, 0x57E7, 0x88C0, 0x57E8, 0x88C1, 0x57E9,
05835     0x88C2, 0x57EA, 0x88C3, 0x57EB, 0x88C4, 0x57EC, 0x88C5, 0x57EE,
05836     0x88C6, 0x57F0, 0x88C7, 0x57F1, 0x88C8, 0x57F2, 0x88C9, 0x57F3,
05837     0x88CA, 0x57F5, 0x88CB, 0x57F6, 0x88CC, 0x57F7, 0x88CD, 0x57FB,
05838     0x88CE, 0x57FC, 0x88CF, 0x57FE, 0x88D0, 0x57FF, 0x88D1, 0x5801,
05839     0x88D2, 0x5803, 0x88D3, 0x5804, 0x88D4, 0x5805, 0x88D5, 0x5808,
05840     0x88D6, 0x5809, 0x88D7, 0x580A, 0x88D8, 0x580C, 0x88D9, 0x580E,
05841     0x88DA, 0x580F, 0x88DB, 0x5810, 0x88DC, 0x5812, 0x88DD, 0x5813,
05842     0x88DE, 0x5814, 0x88DF, 0x5816, 0x88E0, 0x5817, 0x88E1, 0x5818,
05843     0x88E2, 0x581A, 0x88E3, 0x581B, 0x88E4, 0x581C, 0x88E5, 0x581D,
05844     0x88E6, 0x581F, 0x88E7, 0x5822, 0x88E8, 0x5823, 0x88E9, 0x5825,
05845     0x88EA, 0x5826, 0x88EB, 0x5827, 0x88EC, 0x5828, 0x88ED, 0x5829,
05846     0x88EE, 0x582B, 0x88EF, 0x582C, 0x88F0, 0x582D, 0x88F1, 0x582E,
05847     0x88F2, 0x582F, 0x88F3, 0x5831, 0x88F4, 0x5832, 0x88F5, 0x5833,
05848     0x88F6, 0x5834, 0x88F7, 0x5836, 0x88F8, 0x5837, 0x88F9, 0x5838,
05849     0x88FA, 0x5839, 0x88FB, 0x583A, 0x88FC, 0x583B, 0x88FD, 0x583C,
05850     0x88FE, 0x583D, 0x8940, 0x583E, 0x8941, 0x583F, 0x8942, 0x5840,
05851     0x8943, 0x5841, 0x8944, 0x5842, 0x8945, 0x5843, 0x8946, 0x5845,
05852     0x8947, 0x5846, 0x8948, 0x5847, 0x8949, 0x5848, 0x894A, 0x5849,
05853     0x894B, 0x584A, 0x894C, 0x584B, 0x894D, 0x584E, 0x894E, 0x584F,
05854     0x894F, 0x5850, 0x8950, 0x5852, 0x8951, 0x5853, 0x8952, 0x5855,
05855     0x8953, 0x5856, 0x8954, 0x5857, 0x8955, 0x5859, 0x8956, 0x585A,
05856     0x8957, 0x585B, 0x8958, 0x585C, 0x8959, 0x585D, 0x895A, 0x585F,
05857     0x895B, 0x5860, 0x895C, 0x5861, 0x895D, 0x5862, 0x895E, 0x5863,
05858     0x895F, 0x5864, 0x8960, 0x5866, 0x8961, 0x5867, 0x8962, 0x5868,
05859     0x8963, 0x5869, 0x8964, 0x586A, 0x8965, 0x586D, 0x8966, 0x586E,
05860     0x8967, 0x586F, 0x8968, 0x5870, 0x8969, 0x5871, 0x896A, 0x5872,
05861     0x896B, 0x5873, 0x896C, 0x5874, 0x896D, 0x5875, 0x896E, 0x5876,
05862     0x896F, 0x5877, 0x8970, 0x5878, 0x8971, 0x5879, 0x8972, 0x587A,
05863     0x8973, 0x587B, 0x8974, 0x587C, 0x8975, 0x587D, 0x8976, 0x587F,
05864     0x8977, 0x5882, 0x8978, 0x5884, 0x8979, 0x5886, 0x897A, 0x5887,
05865     0x897B, 0x5888, 0x897C, 0x588A, 0x897D, 0x588B, 0x897E, 0x588C,
05866     0x8980, 0x588D, 0x8981, 0x588E, 0x8982, 0x588F, 0x8983, 0x5890,
05867     0x8984, 0x5891, 0x8985, 0x5894, 0x8986, 0x5895, 0x8987, 0x5896,
05868     0x8988, 0x5897, 0x8989, 0x5898, 0x898A, 0x589B, 0x898B, 0x589C,
05869     0x898C, 0x589D, 0x898D, 0x58A0, 0x898E, 0x58A1, 0x898F, 0x58A2,
05870     0x8990, 0x58A3, 0x8991, 0x58A4, 0x8992, 0x58A5, 0x8993, 0x58A6,
05871     0x8994, 0x58A7, 0x8995, 0x58AA, 0x8996, 0x58AB, 0x8997, 0x58AC,
05872     0x8998, 0x58AD, 0x8999, 0x58AE, 0x899A, 0x58AF, 0x899B, 0x58B0,
05873     0x899C, 0x58B1, 0x899D, 0x58B2, 0x899E, 0x58B3, 0x899F, 0x58B4,
05874     0x89A0, 0x58B5, 0x89A1, 0x58B6, 0x89A2, 0x58B7, 0x89A3, 0x58B8,
05875     0x89A4, 0x58B9, 0x89A5, 0x58BA, 0x89A6, 0x58BB, 0x89A7, 0x58BD,
05876     0x89A8, 0x58BE, 0x89A9, 0x58BF, 0x89AA, 0x58C0, 0x89AB, 0x58C2,
05877     0x89AC, 0x58C3, 0x89AD, 0x58C4, 0x89AE, 0x58C6, 0x89AF, 0x58C7,
05878     0x89B0, 0x58C8, 0x89B1, 0x58C9, 0x89B2, 0x58CA, 0x89B3, 0x58CB,
05879     0x89B4, 0x58CC, 0x89B5, 0x58CD, 0x89B6, 0x58CE, 0x89B7, 0x58CF,
05880     0x89B8, 0x58D0, 0x89B9, 0x58D2, 0x89BA, 0x58D3, 0x89BB, 0x58D4,
05881     0x89BC, 0x58D6, 0x89BD, 0x58D7, 0x89BE, 0x58D8, 0x89BF, 0x58D9,
05882     0x89C0, 0x58DA, 0x89C1, 0x58DB, 0x89C2, 0x58DC, 0x89C3, 0x58DD,
05883     0x89C4, 0x58DE, 0x89C5, 0x58DF, 0x89C6, 0x58E0, 0x89C7, 0x58E1,
05884     0x89C8, 0x58E2, 0x89C9, 0x58E3, 0x89CA, 0x58E5, 0x89CB, 0x58E6,
05885     0x89CC, 0x58E7, 0x89CD, 0x58E8, 0x89CE, 0x58E9, 0x89CF, 0x58EA,
05886     0x89D0, 0x58ED, 0x89D1, 0x58EF, 0x89D2, 0x58F1, 0x89D3, 0x58F2,
05887     0x89D4, 0x58F4, 0x89D5, 0x58F5, 0x89D6, 0x58F7, 0x89D7, 0x58F8,
05888     0x89D8, 0x58FA, 0x89D9, 0x58FB, 0x89DA, 0x58FC, 0x89DB, 0x58FD,
05889     0x89DC, 0x58FE, 0x89DD, 0x58FF, 0x89DE, 0x5900, 0x89DF, 0x5901,
05890     0x89E0, 0x5903, 0x89E1, 0x5905, 0x89E2, 0x5906, 0x89E3, 0x5908,
05891     0x89E4, 0x5909, 0x89E5, 0x590A, 0x89E6, 0x590B, 0x89E7, 0x590C,
05892     0x89E8, 0x590E, 0x89E9, 0x5910, 0x89EA, 0x5911, 0x89EB, 0x5912,
05893     0x89EC, 0x5913, 0x89ED, 0x5917, 0x89EE, 0x5918, 0x89EF, 0x591B,
05894     0x89F0, 0x591D, 0x89F1, 0x591E, 0x89F2, 0x5920, 0x89F3, 0x5921,
05895     0x89F4, 0x5922, 0x89F5, 0x5923, 0x89F6, 0x5926, 0x89F7, 0x5928,
05896     0x89F8, 0x592C, 0x89F9, 0x5930, 0x89FA, 0x5932, 0x89FB, 0x5933,
05897     0x89FC, 0x5935, 0x89FD, 0x5936, 0x89FE, 0x593B, 0x8A40, 0x593D,
05898     0x8A41, 0x593E, 0x8A42, 0x593F, 0x8A43, 0x5940, 0x8A44, 0x5943,
05899     0x8A45, 0x5945, 0x8A46, 0x5946, 0x8A47, 0x594A, 0x8A48, 0x594C,
05900     0x8A49, 0x594D, 0x8A4A, 0x5950, 0x8A4B, 0x5952, 0x8A4C, 0x5953,
05901     0x8A4D, 0x5959, 0x8A4E, 0x595B, 0x8A4F, 0x595C, 0x8A50, 0x595D,
05902     0x8A51, 0x595E, 0x8A52, 0x595F, 0x8A53, 0x5961, 0x8A54, 0x5963,
05903     0x8A55, 0x5964, 0x8A56, 0x5966, 0x8A57, 0x5967, 0x8A58, 0x5968,
05904     0x8A59, 0x5969, 0x8A5A, 0x596A, 0x8A5B, 0x596B, 0x8A5C, 0x596C,
05905     0x8A5D, 0x596D, 0x8A5E, 0x596E, 0x8A5F, 0x596F, 0x8A60, 0x5970,
05906     0x8A61, 0x5971, 0x8A62, 0x5972, 0x8A63, 0x5975, 0x8A64, 0x5977,
05907     0x8A65, 0x597A, 0x8A66, 0x597B, 0x8A67, 0x597C, 0x8A68, 0x597E,
05908     0x8A69, 0x597F, 0x8A6A, 0x5980, 0x8A6B, 0x5985, 0x8A6C, 0x5989,
05909     0x8A6D, 0x598B, 0x8A6E, 0x598C, 0x8A6F, 0x598E, 0x8A70, 0x598F,
05910     0x8A71, 0x5990, 0x8A72, 0x5991, 0x8A73, 0x5994, 0x8A74, 0x5995,
05911     0x8A75, 0x5998, 0x8A76, 0x599A, 0x8A77, 0x599B, 0x8A78, 0x599C,
05912     0x8A79, 0x599D, 0x8A7A, 0x599F, 0x8A7B, 0x59A0, 0x8A7C, 0x59A1,
05913     0x8A7D, 0x59A2, 0x8A7E, 0x59A6, 0x8A80, 0x59A7, 0x8A81, 0x59AC,
05914     0x8A82, 0x59AD, 0x8A83, 0x59B0, 0x8A84, 0x59B1, 0x8A85, 0x59B3,
05915     0x8A86, 0x59B4, 0x8A87, 0x59B5, 0x8A88, 0x59B6, 0x8A89, 0x59B7,
05916     0x8A8A, 0x59B8, 0x8A8B, 0x59BA, 0x8A8C, 0x59BC, 0x8A8D, 0x59BD,
05917     0x8A8E, 0x59BF, 0x8A8F, 0x59C0, 0x8A90, 0x59C1, 0x8A91, 0x59C2,
05918     0x8A92, 0x59C3, 0x8A93, 0x59C4, 0x8A94, 0x59C5, 0x8A95, 0x59C7,
05919     0x8A96, 0x59C8, 0x8A97, 0x59C9, 0x8A98, 0x59CC, 0x8A99, 0x59CD,
05920     0x8A9A, 0x59CE, 0x8A9B, 0x59CF, 0x8A9C, 0x59D5, 0x8A9D, 0x59D6,
05921     0x8A9E, 0x59D9, 0x8A9F, 0x59DB, 0x8AA0, 0x59DE, 0x8AA1, 0x59DF,
05922     0x8AA2, 0x59E0, 0x8AA3, 0x59E1, 0x8AA4, 0x59E2, 0x8AA5, 0x59E4,
05923     0x8AA6, 0x59E6, 0x8AA7, 0x59E7, 0x8AA8, 0x59E9, 0x8AA9, 0x59EA,
05924     0x8AAA, 0x59EB, 0x8AAB, 0x59ED, 0x8AAC, 0x59EE, 0x8AAD, 0x59EF,
05925     0x8AAE, 0x59F0, 0x8AAF, 0x59F1, 0x8AB0, 0x59F2, 0x8AB1, 0x59F3,
05926     0x8AB2, 0x59F4, 0x8AB3, 0x59F5, 0x8AB4, 0x59F6, 0x8AB5, 0x59F7,
05927     0x8AB6, 0x59F8, 0x8AB7, 0x59FA, 0x8AB8, 0x59FC, 0x8AB9, 0x59FD,
05928     0x8ABA, 0x59FE, 0x8ABB, 0x5A00, 0x8ABC, 0x5A02, 0x8ABD, 0x5A0A,
05929     0x8ABE, 0x5A0B, 0x8ABF, 0x5A0D, 0x8AC0, 0x5A0E, 0x8AC1, 0x5A0F,
05930     0x8AC2, 0x5A10, 0x8AC3, 0x5A12, 0x8AC4, 0x5A14, 0x8AC5, 0x5A15,
05931     0x8AC6, 0x5A16, 0x8AC7, 0x5A17, 0x8AC8, 0x5A19, 0x8AC9, 0x5A1A,
05932     0x8ACA, 0x5A1B, 0x8ACB, 0x5A1D, 0x8ACC, 0x5A1E, 0x8ACD, 0x5A21,
05933     0x8ACE, 0x5A22, 0x8ACF, 0x5A24, 0x8AD0, 0x5A26, 0x8AD1, 0x5A27,
05934     0x8AD2, 0x5A28, 0x8AD3, 0x5A2A, 0x8AD4, 0x5A2B, 0x8AD5, 0x5A2C,
05935     0x8AD6, 0x5A2D, 0x8AD7, 0x5A2E, 0x8AD8, 0x5A2F, 0x8AD9, 0x5A30,
05936     0x8ADA, 0x5A33, 0x8ADB, 0x5A35, 0x8ADC, 0x5A37, 0x8ADD, 0x5A38,
05937     0x8ADE, 0x5A39, 0x8ADF, 0x5A3A, 0x8AE0, 0x5A3B, 0x8AE1, 0x5A3D,
05938     0x8AE2, 0x5A3E, 0x8AE3, 0x5A3F, 0x8AE4, 0x5A41, 0x8AE5, 0x5A42,
05939     0x8AE6, 0x5A43, 0x8AE7, 0x5A44, 0x8AE8, 0x5A45, 0x8AE9, 0x5A47,
05940     0x8AEA, 0x5A48, 0x8AEB, 0x5A4B, 0x8AEC, 0x5A4C, 0x8AED, 0x5A4D,
05941     0x8AEE, 0x5A4E, 0x8AEF, 0x5A4F, 0x8AF0, 0x5A50, 0x8AF1, 0x5A51,
05942     0x8AF2, 0x5A52, 0x8AF3, 0x5A53, 0x8AF4, 0x5A54, 0x8AF5, 0x5A56,
05943     0x8AF6, 0x5A57, 0x8AF7, 0x5A58, 0x8AF8, 0x5A59, 0x8AF9, 0x5A5B,
05944     0x8AFA, 0x5A5C, 0x8AFB, 0x5A5D, 0x8AFC, 0x5A5E, 0x8AFD, 0x5A5F,
05945     0x8AFE, 0x5A60, 0x8B40, 0x5A61, 0x8B41, 0x5A63, 0x8B42, 0x5A64,
05946     0x8B43, 0x5A65, 0x8B44, 0x5A66, 0x8B45, 0x5A68, 0x8B46, 0x5A69,
05947     0x8B47, 0x5A6B, 0x8B48, 0x5A6C, 0x8B49, 0x5A6D, 0x8B4A, 0x5A6E,
05948     0x8B4B, 0x5A6F, 0x8B4C, 0x5A70, 0x8B4D, 0x5A71, 0x8B4E, 0x5A72,
05949     0x8B4F, 0x5A73, 0x8B50, 0x5A78, 0x8B51, 0x5A79, 0x8B52, 0x5A7B,
05950     0x8B53, 0x5A7C, 0x8B54, 0x5A7D, 0x8B55, 0x5A7E, 0x8B56, 0x5A80,
05951     0x8B57, 0x5A81, 0x8B58, 0x5A82, 0x8B59, 0x5A83, 0x8B5A, 0x5A84,
05952     0x8B5B, 0x5A85, 0x8B5C, 0x5A86, 0x8B5D, 0x5A87, 0x8B5E, 0x5A88,
05953     0x8B5F, 0x5A89, 0x8B60, 0x5A8A, 0x8B61, 0x5A8B, 0x8B62, 0x5A8C,
05954     0x8B63, 0x5A8D, 0x8B64, 0x5A8E, 0x8B65, 0x5A8F, 0x8B66, 0x5A90,
05955     0x8B67, 0x5A91, 0x8B68, 0x5A93, 0x8B69, 0x5A94, 0x8B6A, 0x5A95,
05956     0x8B6B, 0x5A96, 0x8B6C, 0x5A97, 0x8B6D, 0x5A98, 0x8B6E, 0x5A99,
05957     0x8B6F, 0x5A9C, 0x8B70, 0x5A9D, 0x8B71, 0x5A9E, 0x8B72, 0x5A9F,
05958     0x8B73, 0x5AA0, 0x8B74, 0x5AA1, 0x8B75, 0x5AA2, 0x8B76, 0x5AA3,
05959     0x8B77, 0x5AA4, 0x8B78, 0x5AA5, 0x8B79, 0x5AA6, 0x8B7A, 0x5AA7,
05960     0x8B7B, 0x5AA8, 0x8B7C, 0x5AA9, 0x8B7D, 0x5AAB, 0x8B7E, 0x5AAC,
05961     0x8B80, 0x5AAD, 0x8B81, 0x5AAE, 0x8B82, 0x5AAF, 0x8B83, 0x5AB0,
05962     0x8B84, 0x5AB1, 0x8B85, 0x5AB4, 0x8B86, 0x5AB6, 0x8B87, 0x5AB7,
05963     0x8B88, 0x5AB9, 0x8B89, 0x5ABA, 0x8B8A, 0x5ABB, 0x8B8B, 0x5ABC,
05964     0x8B8C, 0x5ABD, 0x8B8D, 0x5ABF, 0x8B8E, 0x5AC0, 0x8B8F, 0x5AC3,
05965     0x8B90, 0x5AC4, 0x8B91, 0x5AC5, 0x8B92, 0x5AC6, 0x8B93, 0x5AC7,
05966     0x8B94, 0x5AC8, 0x8B95, 0x5ACA, 0x8B96, 0x5ACB, 0x8B97, 0x5ACD,
05967     0x8B98, 0x5ACE, 0x8B99, 0x5ACF, 0x8B9A, 0x5AD0, 0x8B9B, 0x5AD1,
05968     0x8B9C, 0x5AD3, 0x8B9D, 0x5AD5, 0x8B9E, 0x5AD7, 0x8B9F, 0x5AD9,
05969     0x8BA0, 0x5ADA, 0x8BA1, 0x5ADB, 0x8BA2, 0x5ADD, 0x8BA3, 0x5ADE,
05970     0x8BA4, 0x5ADF, 0x8BA5, 0x5AE2, 0x8BA6, 0x5AE4, 0x8BA7, 0x5AE5,
05971     0x8BA8, 0x5AE7, 0x8BA9, 0x5AE8, 0x8BAA, 0x5AEA, 0x8BAB, 0x5AEC,
05972     0x8BAC, 0x5AED, 0x8BAD, 0x5AEE, 0x8BAE, 0x5AEF, 0x8BAF, 0x5AF0,
05973     0x8BB0, 0x5AF2, 0x8BB1, 0x5AF3, 0x8BB2, 0x5AF4, 0x8BB3, 0x5AF5,
05974     0x8BB4, 0x5AF6, 0x8BB5, 0x5AF7, 0x8BB6, 0x5AF8, 0x8BB7, 0x5AF9,
05975     0x8BB8, 0x5AFA, 0x8BB9, 0x5AFB, 0x8BBA, 0x5AFC, 0x8BBB, 0x5AFD,
05976     0x8BBC, 0x5AFE, 0x8BBD, 0x5AFF, 0x8BBE, 0x5B00, 0x8BBF, 0x5B01,
05977     0x8BC0, 0x5B02, 0x8BC1, 0x5B03, 0x8BC2, 0x5B04, 0x8BC3, 0x5B05,
05978     0x8BC4, 0x5B06, 0x8BC5, 0x5B07, 0x8BC6, 0x5B08, 0x8BC7, 0x5B0A,
05979     0x8BC8, 0x5B0B, 0x8BC9, 0x5B0C, 0x8BCA, 0x5B0D, 0x8BCB, 0x5B0E,
05980     0x8BCC, 0x5B0F, 0x8BCD, 0x5B10, 0x8BCE, 0x5B11, 0x8BCF, 0x5B12,
05981     0x8BD0, 0x5B13, 0x8BD1, 0x5B14, 0x8BD2, 0x5B15, 0x8BD3, 0x5B18,
05982     0x8BD4, 0x5B19, 0x8BD5, 0x5B1A, 0x8BD6, 0x5B1B, 0x8BD7, 0x5B1C,
05983     0x8BD8, 0x5B1D, 0x8BD9, 0x5B1E, 0x8BDA, 0x5B1F, 0x8BDB, 0x5B20,
05984     0x8BDC, 0x5B21, 0x8BDD, 0x5B22, 0x8BDE, 0x5B23, 0x8BDF, 0x5B24,
05985     0x8BE0, 0x5B25, 0x8BE1, 0x5B26, 0x8BE2, 0x5B27, 0x8BE3, 0x5B28,
05986     0x8BE4, 0x5B29, 0x8BE5, 0x5B2A, 0x8BE6, 0x5B2B, 0x8BE7, 0x5B2C,
05987     0x8BE8, 0x5B2D, 0x8BE9, 0x5B2E, 0x8BEA, 0x5B2F, 0x8BEB, 0x5B30,
05988     0x8BEC, 0x5B31, 0x8BED, 0x5B33, 0x8BEE, 0x5B35, 0x8BEF, 0x5B36,
05989     0x8BF0, 0x5B38, 0x8BF1, 0x5B39, 0x8BF2, 0x5B3A, 0x8BF3, 0x5B3B,
05990     0x8BF4, 0x5B3C, 0x8BF5, 0x5B3D, 0x8BF6, 0x5B3E, 0x8BF7, 0x5B3F,
05991     0x8BF8, 0x5B41, 0x8BF9, 0x5B42, 0x8BFA, 0x5B43, 0x8BFB, 0x5B44,
05992     0x8BFC, 0x5B45, 0x8BFD, 0x5B46, 0x8BFE, 0x5B47, 0x8C40, 0x5B48,
05993     0x8C41, 0x5B49, 0x8C42, 0x5B4A, 0x8C43, 0x5B4B, 0x8C44, 0x5B4C,
05994     0x8C45, 0x5B4D, 0x8C46, 0x5B4E, 0x8C47, 0x5B4F, 0x8C48, 0x5B52,
05995     0x8C49, 0x5B56, 0x8C4A, 0x5B5E, 0x8C4B, 0x5B60, 0x8C4C, 0x5B61,
05996     0x8C4D, 0x5B67, 0x8C4E, 0x5B68, 0x8C4F, 0x5B6B, 0x8C50, 0x5B6D,
05997     0x8C51, 0x5B6E, 0x8C52, 0x5B6F, 0x8C53, 0x5B72, 0x8C54, 0x5B74,
05998     0x8C55, 0x5B76, 0x8C56, 0x5B77, 0x8C57, 0x5B78, 0x8C58, 0x5B79,
05999     0x8C59, 0x5B7B, 0x8C5A, 0x5B7C, 0x8C5B, 0x5B7E, 0x8C5C, 0x5B7F,
06000     0x8C5D, 0x5B82, 0x8C5E, 0x5B86, 0x8C5F, 0x5B8A, 0x8C60, 0x5B8D,
06001     0x8C61, 0x5B8E, 0x8C62, 0x5B90, 0x8C63, 0x5B91, 0x8C64, 0x5B92,
06002     0x8C65, 0x5B94, 0x8C66, 0x5B96, 0x8C67, 0x5B9F, 0x8C68, 0x5BA7,
06003     0x8C69, 0x5BA8, 0x8C6A, 0x5BA9, 0x8C6B, 0x5BAC, 0x8C6C, 0x5BAD,
06004     0x8C6D, 0x5BAE, 0x8C6E, 0x5BAF, 0x8C6F, 0x5BB1, 0x8C70, 0x5BB2,
06005     0x8C71, 0x5BB7, 0x8C72, 0x5BBA, 0x8C73, 0x5BBB, 0x8C74, 0x5BBC,
06006     0x8C75, 0x5BC0, 0x8C76, 0x5BC1, 0x8C77, 0x5BC3, 0x8C78, 0x5BC8,
06007     0x8C79, 0x5BC9, 0x8C7A, 0x5BCA, 0x8C7B, 0x5BCB, 0x8C7C, 0x5BCD,
06008     0x8C7D, 0x5BCE, 0x8C7E, 0x5BCF, 0x8C80, 0x5BD1, 0x8C81, 0x5BD4,
06009     0x8C82, 0x5BD5, 0x8C83, 0x5BD6, 0x8C84, 0x5BD7, 0x8C85, 0x5BD8,
06010     0x8C86, 0x5BD9, 0x8C87, 0x5BDA, 0x8C88, 0x5BDB, 0x8C89, 0x5BDC,
06011     0x8C8A, 0x5BE0, 0x8C8B, 0x5BE2, 0x8C8C, 0x5BE3, 0x8C8D, 0x5BE6,
06012     0x8C8E, 0x5BE7, 0x8C8F, 0x5BE9, 0x8C90, 0x5BEA, 0x8C91, 0x5BEB,
06013     0x8C92, 0x5BEC, 0x8C93, 0x5BED, 0x8C94, 0x5BEF, 0x8C95, 0x5BF1,
06014     0x8C96, 0x5BF2, 0x8C97, 0x5BF3, 0x8C98, 0x5BF4, 0x8C99, 0x5BF5,
06015     0x8C9A, 0x5BF6, 0x8C9B, 0x5BF7, 0x8C9C, 0x5BFD, 0x8C9D, 0x5BFE,
06016     0x8C9E, 0x5C00, 0x8C9F, 0x5C02, 0x8CA0, 0x5C03, 0x8CA1, 0x5C05,
06017     0x8CA2, 0x5C07, 0x8CA3, 0x5C08, 0x8CA4, 0x5C0B, 0x8CA5, 0x5C0C,
06018     0x8CA6, 0x5C0D, 0x8CA7, 0x5C0E, 0x8CA8, 0x5C10, 0x8CA9, 0x5C12,
06019     0x8CAA, 0x5C13, 0x8CAB, 0x5C17, 0x8CAC, 0x5C19, 0x8CAD, 0x5C1B,
06020     0x8CAE, 0x5C1E, 0x8CAF, 0x5C1F, 0x8CB0, 0x5C20, 0x8CB1, 0x5C21,
06021     0x8CB2, 0x5C23, 0x8CB3, 0x5C26, 0x8CB4, 0x5C28, 0x8CB5, 0x5C29,
06022     0x8CB6, 0x5C2A, 0x8CB7, 0x5C2B, 0x8CB8, 0x5C2D, 0x8CB9, 0x5C2E,
06023     0x8CBA, 0x5C2F, 0x8CBB, 0x5C30, 0x8CBC, 0x5C32, 0x8CBD, 0x5C33,
06024     0x8CBE, 0x5C35, 0x8CBF, 0x5C36, 0x8CC0, 0x5C37, 0x8CC1, 0x5C43,
06025     0x8CC2, 0x5C44, 0x8CC3, 0x5C46, 0x8CC4, 0x5C47, 0x8CC5, 0x5C4C,
06026     0x8CC6, 0x5C4D, 0x8CC7, 0x5C52, 0x8CC8, 0x5C53, 0x8CC9, 0x5C54,
06027     0x8CCA, 0x5C56, 0x8CCB, 0x5C57, 0x8CCC, 0x5C58, 0x8CCD, 0x5C5A,
06028     0x8CCE, 0x5C5B, 0x8CCF, 0x5C5C, 0x8CD0, 0x5C5D, 0x8CD1, 0x5C5F,
06029     0x8CD2, 0x5C62, 0x8CD3, 0x5C64, 0x8CD4, 0x5C67, 0x8CD5, 0x5C68,
06030     0x8CD6, 0x5C69, 0x8CD7, 0x5C6A, 0x8CD8, 0x5C6B, 0x8CD9, 0x5C6C,
06031     0x8CDA, 0x5C6D, 0x8CDB, 0x5C70, 0x8CDC, 0x5C72, 0x8CDD, 0x5C73,
06032     0x8CDE, 0x5C74, 0x8CDF, 0x5C75, 0x8CE0, 0x5C76, 0x8CE1, 0x5C77,
06033     0x8CE2, 0x5C78, 0x8CE3, 0x5C7B, 0x8CE4, 0x5C7C, 0x8CE5, 0x5C7D,
06034     0x8CE6, 0x5C7E, 0x8CE7, 0x5C80, 0x8CE8, 0x5C83, 0x8CE9, 0x5C84,
06035     0x8CEA, 0x5C85, 0x8CEB, 0x5C86, 0x8CEC, 0x5C87, 0x8CED, 0x5C89,
06036     0x8CEE, 0x5C8A, 0x8CEF, 0x5C8B, 0x8CF0, 0x5C8E, 0x8CF1, 0x5C8F,
06037     0x8CF2, 0x5C92, 0x8CF3, 0x5C93, 0x8CF4, 0x5C95, 0x8CF5, 0x5C9D,
06038     0x8CF6, 0x5C9E, 0x8CF7, 0x5C9F, 0x8CF8, 0x5CA0, 0x8CF9, 0x5CA1,
06039     0x8CFA, 0x5CA4, 0x8CFB, 0x5CA5, 0x8CFC, 0x5CA6, 0x8CFD, 0x5CA7,
06040     0x8CFE, 0x5CA8, 0x8D40, 0x5CAA, 0x8D41, 0x5CAE, 0x8D42, 0x5CAF,
06041     0x8D43, 0x5CB0, 0x8D44, 0x5CB2, 0x8D45, 0x5CB4, 0x8D46, 0x5CB6,
06042     0x8D47, 0x5CB9, 0x8D48, 0x5CBA, 0x8D49, 0x5CBB, 0x8D4A, 0x5CBC,
06043     0x8D4B, 0x5CBE, 0x8D4C, 0x5CC0, 0x8D4D, 0x5CC2, 0x8D4E, 0x5CC3,
06044     0x8D4F, 0x5CC5, 0x8D50, 0x5CC6, 0x8D51, 0x5CC7, 0x8D52, 0x5CC8,
06045     0x8D53, 0x5CC9, 0x8D54, 0x5CCA, 0x8D55, 0x5CCC, 0x8D56, 0x5CCD,
06046     0x8D57, 0x5CCE, 0x8D58, 0x5CCF, 0x8D59, 0x5CD0, 0x8D5A, 0x5CD1,
06047     0x8D5B, 0x5CD3, 0x8D5C, 0x5CD4, 0x8D5D, 0x5CD5, 0x8D5E, 0x5CD6,
06048     0x8D5F, 0x5CD7, 0x8D60, 0x5CD8, 0x8D61, 0x5CDA, 0x8D62, 0x5CDB,
06049     0x8D63, 0x5CDC, 0x8D64, 0x5CDD, 0x8D65, 0x5CDE, 0x8D66, 0x5CDF,
06050     0x8D67, 0x5CE0, 0x8D68, 0x5CE2, 0x8D69, 0x5CE3, 0x8D6A, 0x5CE7,
06051     0x8D6B, 0x5CE9, 0x8D6C, 0x5CEB, 0x8D6D, 0x5CEC, 0x8D6E, 0x5CEE,
06052     0x8D6F, 0x5CEF, 0x8D70, 0x5CF1, 0x8D71, 0x5CF2, 0x8D72, 0x5CF3,
06053     0x8D73, 0x5CF4, 0x8D74, 0x5CF5, 0x8D75, 0x5CF6, 0x8D76, 0x5CF7,
06054     0x8D77, 0x5CF8, 0x8D78, 0x5CF9, 0x8D79, 0x5CFA, 0x8D7A, 0x5CFC,
06055     0x8D7B, 0x5CFD, 0x8D7C, 0x5CFE, 0x8D7D, 0x5CFF, 0x8D7E, 0x5D00,
06056     0x8D80, 0x5D01, 0x8D81, 0x5D04, 0x8D82, 0x5D05, 0x8D83, 0x5D08,
06057     0x8D84, 0x5D09, 0x8D85, 0x5D0A, 0x8D86, 0x5D0B, 0x8D87, 0x5D0C,
06058     0x8D88, 0x5D0D, 0x8D89, 0x5D0F, 0x8D8A, 0x5D10, 0x8D8B, 0x5D11,
06059     0x8D8C, 0x5D12, 0x8D8D, 0x5D13, 0x8D8E, 0x5D15, 0x8D8F, 0x5D17,
06060     0x8D90, 0x5D18, 0x8D91, 0x5D19, 0x8D92, 0x5D1A, 0x8D93, 0x5D1C,
06061     0x8D94, 0x5D1D, 0x8D95, 0x5D1F, 0x8D96, 0x5D20, 0x8D97, 0x5D21,
06062     0x8D98, 0x5D22, 0x8D99, 0x5D23, 0x8D9A, 0x5D25, 0x8D9B, 0x5D28,
06063     0x8D9C, 0x5D2A, 0x8D9D, 0x5D2B, 0x8D9E, 0x5D2C, 0x8D9F, 0x5D2F,
06064     0x8DA0, 0x5D30, 0x8DA1, 0x5D31, 0x8DA2, 0x5D32, 0x8DA3, 0x5D33,
06065     0x8DA4, 0x5D35, 0x8DA5, 0x5D36, 0x8DA6, 0x5D37, 0x8DA7, 0x5D38,
06066     0x8DA8, 0x5D39, 0x8DA9, 0x5D3A, 0x8DAA, 0x5D3B, 0x8DAB, 0x5D3C,
06067     0x8DAC, 0x5D3F, 0x8DAD, 0x5D40, 0x8DAE, 0x5D41, 0x8DAF, 0x5D42,
06068     0x8DB0, 0x5D43, 0x8DB1, 0x5D44, 0x8DB2, 0x5D45, 0x8DB3, 0x5D46,
06069     0x8DB4, 0x5D48, 0x8DB5, 0x5D49, 0x8DB6, 0x5D4D, 0x8DB7, 0x5D4E,
06070     0x8DB8, 0x5D4F, 0x8DB9, 0x5D50, 0x8DBA, 0x5D51, 0x8DBB, 0x5D52,
06071     0x8DBC, 0x5D53, 0x8DBD, 0x5D54, 0x8DBE, 0x5D55, 0x8DBF, 0x5D56,
06072     0x8DC0, 0x5D57, 0x8DC1, 0x5D59, 0x8DC2, 0x5D5A, 0x8DC3, 0x5D5C,
06073     0x8DC4, 0x5D5E, 0x8DC5, 0x5D5F, 0x8DC6, 0x5D60, 0x8DC7, 0x5D61,
06074     0x8DC8, 0x5D62, 0x8DC9, 0x5D63, 0x8DCA, 0x5D64, 0x8DCB, 0x5D65,
06075     0x8DCC, 0x5D66, 0x8DCD, 0x5D67, 0x8DCE, 0x5D68, 0x8DCF, 0x5D6A,
06076     0x8DD0, 0x5D6D, 0x8DD1, 0x5D6E, 0x8DD2, 0x5D70, 0x8DD3, 0x5D71,
06077     0x8DD4, 0x5D72, 0x8DD5, 0x5D73, 0x8DD6, 0x5D75, 0x8DD7, 0x5D76,
06078     0x8DD8, 0x5D77, 0x8DD9, 0x5D78, 0x8DDA, 0x5D79, 0x8DDB, 0x5D7A,
06079     0x8DDC, 0x5D7B, 0x8DDD, 0x5D7C, 0x8DDE, 0x5D7D, 0x8DDF, 0x5D7E,
06080     0x8DE0, 0x5D7F, 0x8DE1, 0x5D80, 0x8DE2, 0x5D81, 0x8DE3, 0x5D83,
06081     0x8DE4, 0x5D84, 0x8DE5, 0x5D85, 0x8DE6, 0x5D86, 0x8DE7, 0x5D87,
06082     0x8DE8, 0x5D88, 0x8DE9, 0x5D89, 0x8DEA, 0x5D8A, 0x8DEB, 0x5D8B,
06083     0x8DEC, 0x5D8C, 0x8DED, 0x5D8D, 0x8DEE, 0x5D8E, 0x8DEF, 0x5D8F,
06084     0x8DF0, 0x5D90, 0x8DF1, 0x5D91, 0x8DF2, 0x5D92, 0x8DF3, 0x5D93,
06085     0x8DF4, 0x5D94, 0x8DF5, 0x5D95, 0x8DF6, 0x5D96, 0x8DF7, 0x5D97,
06086     0x8DF8, 0x5D98, 0x8DF9, 0x5D9A, 0x8DFA, 0x5D9B, 0x8DFB, 0x5D9C,
06087     0x8DFC, 0x5D9E, 0x8DFD, 0x5D9F, 0x8DFE, 0x5DA0, 0x8E40, 0x5DA1,
06088     0x8E41, 0x5DA2, 0x8E42, 0x5DA3, 0x8E43, 0x5DA4, 0x8E44, 0x5DA5,
06089     0x8E45, 0x5DA6, 0x8E46, 0x5DA7, 0x8E47, 0x5DA8, 0x8E48, 0x5DA9,
06090     0x8E49, 0x5DAA, 0x8E4A, 0x5DAB, 0x8E4B, 0x5DAC, 0x8E4C, 0x5DAD,
06091     0x8E4D, 0x5DAE, 0x8E4E, 0x5DAF, 0x8E4F, 0x5DB0, 0x8E50, 0x5DB1,
06092     0x8E51, 0x5DB2, 0x8E52, 0x5DB3, 0x8E53, 0x5DB4, 0x8E54, 0x5DB5,
06093     0x8E55, 0x5DB6, 0x8E56, 0x5DB8, 0x8E57, 0x5DB9, 0x8E58, 0x5DBA,
06094     0x8E59, 0x5DBB, 0x8E5A, 0x5DBC, 0x8E5B, 0x5DBD, 0x8E5C, 0x5DBE,
06095     0x8E5D, 0x5DBF, 0x8E5E, 0x5DC0, 0x8E5F, 0x5DC1, 0x8E60, 0x5DC2,
06096     0x8E61, 0x5DC3, 0x8E62, 0x5DC4, 0x8E63, 0x5DC6, 0x8E64, 0x5DC7,
06097     0x8E65, 0x5DC8, 0x8E66, 0x5DC9, 0x8E67, 0x5DCA, 0x8E68, 0x5DCB,
06098     0x8E69, 0x5DCC, 0x8E6A, 0x5DCE, 0x8E6B, 0x5DCF, 0x8E6C, 0x5DD0,
06099     0x8E6D, 0x5DD1, 0x8E6E, 0x5DD2, 0x8E6F, 0x5DD3, 0x8E70, 0x5DD4,
06100     0x8E71, 0x5DD5, 0x8E72, 0x5DD6, 0x8E73, 0x5DD7, 0x8E74, 0x5DD8,
06101     0x8E75, 0x5DD9, 0x8E76, 0x5DDA, 0x8E77, 0x5DDC, 0x8E78, 0x5DDF,
06102     0x8E79, 0x5DE0, 0x8E7A, 0x5DE3, 0x8E7B, 0x5DE4, 0x8E7C, 0x5DEA,
06103     0x8E7D, 0x5DEC, 0x8E7E, 0x5DED, 0x8E80, 0x5DF0, 0x8E81, 0x5DF5,
06104     0x8E82, 0x5DF6, 0x8E83, 0x5DF8, 0x8E84, 0x5DF9, 0x8E85, 0x5DFA,
06105     0x8E86, 0x5DFB, 0x8E87, 0x5DFC, 0x8E88, 0x5DFF, 0x8E89, 0x5E00,
06106     0x8E8A, 0x5E04, 0x8E8B, 0x5E07, 0x8E8C, 0x5E09, 0x8E8D, 0x5E0A,
06107     0x8E8E, 0x5E0B, 0x8E8F, 0x5E0D, 0x8E90, 0x5E0E, 0x8E91, 0x5E12,
06108     0x8E92, 0x5E13, 0x8E93, 0x5E17, 0x8E94, 0x5E1E, 0x8E95, 0x5E1F,
06109     0x8E96, 0x5E20, 0x8E97, 0x5E21, 0x8E98, 0x5E22, 0x8E99, 0x5E23,
06110     0x8E9A, 0x5E24, 0x8E9B, 0x5E25, 0x8E9C, 0x5E28, 0x8E9D, 0x5E29,
06111     0x8E9E, 0x5E2A, 0x8E9F, 0x5E2B, 0x8EA0, 0x5E2C, 0x8EA1, 0x5E2F,
06112     0x8EA2, 0x5E30, 0x8EA3, 0x5E32, 0x8EA4, 0x5E33, 0x8EA5, 0x5E34,
06113     0x8EA6, 0x5E35, 0x8EA7, 0x5E36, 0x8EA8, 0x5E39, 0x8EA9, 0x5E3A,
06114     0x8EAA, 0x5E3E, 0x8EAB, 0x5E3F, 0x8EAC, 0x5E40, 0x8EAD, 0x5E41,
06115     0x8EAE, 0x5E43, 0x8EAF, 0x5E46, 0x8EB0, 0x5E47, 0x8EB1, 0x5E48,
06116     0x8EB2, 0x5E49, 0x8EB3, 0x5E4A, 0x8EB4, 0x5E4B, 0x8EB5, 0x5E4D,
06117     0x8EB6, 0x5E4E, 0x8EB7, 0x5E4F, 0x8EB8, 0x5E50, 0x8EB9, 0x5E51,
06118     0x8EBA, 0x5E52, 0x8EBB, 0x5E53, 0x8EBC, 0x5E56, 0x8EBD, 0x5E57,
06119     0x8EBE, 0x5E58, 0x8EBF, 0x5E59, 0x8EC0, 0x5E5A, 0x8EC1, 0x5E5C,
06120     0x8EC2, 0x5E5D, 0x8EC3, 0x5E5F, 0x8EC4, 0x5E60, 0x8EC5, 0x5E63,
06121     0x8EC6, 0x5E64, 0x8EC7, 0x5E65, 0x8EC8, 0x5E66, 0x8EC9, 0x5E67,
06122     0x8ECA, 0x5E68, 0x8ECB, 0x5E69, 0x8ECC, 0x5E6A, 0x8ECD, 0x5E6B,
06123     0x8ECE, 0x5E6C, 0x8ECF, 0x5E6D, 0x8ED0, 0x5E6E, 0x8ED1, 0x5E6F,
06124     0x8ED2, 0x5E70, 0x8ED3, 0x5E71, 0x8ED4, 0x5E75, 0x8ED5, 0x5E77,
06125     0x8ED6, 0x5E79, 0x8ED7, 0x5E7E, 0x8ED8, 0x5E81, 0x8ED9, 0x5E82,
06126     0x8EDA, 0x5E83, 0x8EDB, 0x5E85, 0x8EDC, 0x5E88, 0x8EDD, 0x5E89,
06127     0x8EDE, 0x5E8C, 0x8EDF, 0x5E8D, 0x8EE0, 0x5E8E, 0x8EE1, 0x5E92,
06128     0x8EE2, 0x5E98, 0x8EE3, 0x5E9B, 0x8EE4, 0x5E9D, 0x8EE5, 0x5EA1,
06129     0x8EE6, 0x5EA2, 0x8EE7, 0x5EA3, 0x8EE8, 0x5EA4, 0x8EE9, 0x5EA8,
06130     0x8EEA, 0x5EA9, 0x8EEB, 0x5EAA, 0x8EEC, 0x5EAB, 0x8EED, 0x5EAC,
06131     0x8EEE, 0x5EAE, 0x8EEF, 0x5EAF, 0x8EF0, 0x5EB0, 0x8EF1, 0x5EB1,
06132     0x8EF2, 0x5EB2, 0x8EF3, 0x5EB4, 0x8EF4, 0x5EBA, 0x8EF5, 0x5EBB,
06133     0x8EF6, 0x5EBC, 0x8EF7, 0x5EBD, 0x8EF8, 0x5EBF, 0x8EF9, 0x5EC0,
06134     0x8EFA, 0x5EC1, 0x8EFB, 0x5EC2, 0x8EFC, 0x5EC3, 0x8EFD, 0x5EC4,
06135     0x8EFE, 0x5EC5, 0x8F40, 0x5EC6, 0x8F41, 0x5EC7, 0x8F42, 0x5EC8,
06136     0x8F43, 0x5ECB, 0x8F44, 0x5ECC, 0x8F45, 0x5ECD, 0x8F46, 0x5ECE,
06137     0x8F47, 0x5ECF, 0x8F48, 0x5ED0, 0x8F49, 0x5ED4, 0x8F4A, 0x5ED5,
06138     0x8F4B, 0x5ED7, 0x8F4C, 0x5ED8, 0x8F4D, 0x5ED9, 0x8F4E, 0x5EDA,
06139     0x8F4F, 0x5EDC, 0x8F50, 0x5EDD, 0x8F51, 0x5EDE, 0x8F52, 0x5EDF,
06140     0x8F53, 0x5EE0, 0x8F54, 0x5EE1, 0x8F55, 0x5EE2, 0x8F56, 0x5EE3,
06141     0x8F57, 0x5EE4, 0x8F58, 0x5EE5, 0x8F59, 0x5EE6, 0x8F5A, 0x5EE7,
06142     0x8F5B, 0x5EE9, 0x8F5C, 0x5EEB, 0x8F5D, 0x5EEC, 0x8F5E, 0x5EED,
06143     0x8F5F, 0x5EEE, 0x8F60, 0x5EEF, 0x8F61, 0x5EF0, 0x8F62, 0x5EF1,
06144     0x8F63, 0x5EF2, 0x8F64, 0x5EF3, 0x8F65, 0x5EF5, 0x8F66, 0x5EF8,
06145     0x8F67, 0x5EF9, 0x8F68, 0x5EFB, 0x8F69, 0x5EFC, 0x8F6A, 0x5EFD,
06146     0x8F6B, 0x5F05, 0x8F6C, 0x5F06, 0x8F6D, 0x5F07, 0x8F6E, 0x5F09,
06147     0x8F6F, 0x5F0C, 0x8F70, 0x5F0D, 0x8F71, 0x5F0E, 0x8F72, 0x5F10,
06148     0x8F73, 0x5F12, 0x8F74, 0x5F14, 0x8F75, 0x5F16, 0x8F76, 0x5F19,
06149     0x8F77, 0x5F1A, 0x8F78, 0x5F1C, 0x8F79, 0x5F1D, 0x8F7A, 0x5F1E,
06150     0x8F7B, 0x5F21, 0x8F7C, 0x5F22, 0x8F7D, 0x5F23, 0x8F7E, 0x5F24,
06151     0x8F80, 0x5F28, 0x8F81, 0x5F2B, 0x8F82, 0x5F2C, 0x8F83, 0x5F2E,
06152     0x8F84, 0x5F30, 0x8F85, 0x5F32, 0x8F86, 0x5F33, 0x8F87, 0x5F34,
06153     0x8F88, 0x5F35, 0x8F89, 0x5F36, 0x8F8A, 0x5F37, 0x8F8B, 0x5F38,
06154     0x8F8C, 0x5F3B, 0x8F8D, 0x5F3D, 0x8F8E, 0x5F3E, 0x8F8F, 0x5F3F,
06155     0x8F90, 0x5F41, 0x8F91, 0x5F42, 0x8F92, 0x5F43, 0x8F93, 0x5F44,
06156     0x8F94, 0x5F45, 0x8F95, 0x5F46, 0x8F96, 0x5F47, 0x8F97, 0x5F48,
06157     0x8F98, 0x5F49, 0x8F99, 0x5F4A, 0x8F9A, 0x5F4B, 0x8F9B, 0x5F4C,
06158     0x8F9C, 0x5F4D, 0x8F9D, 0x5F4E, 0x8F9E, 0x5F4F, 0x8F9F, 0x5F51,
06159     0x8FA0, 0x5F54, 0x8FA1, 0x5F59, 0x8FA2, 0x5F5A, 0x8FA3, 0x5F5B,
06160     0x8FA4, 0x5F5C, 0x8FA5, 0x5F5E, 0x8FA6, 0x5F5F, 0x8FA7, 0x5F60,
06161     0x8FA8, 0x5F63, 0x8FA9, 0x5F65, 0x8FAA, 0x5F67, 0x8FAB, 0x5F68,
06162     0x8FAC, 0x5F6B, 0x8FAD, 0x5F6E, 0x8FAE, 0x5F6F, 0x8FAF, 0x5F72,
06163     0x8FB0, 0x5F74, 0x8FB1, 0x5F75, 0x8FB2, 0x5F76, 0x8FB3, 0x5F78,
06164     0x8FB4, 0x5F7A, 0x8FB5, 0x5F7D, 0x8FB6, 0x5F7E, 0x8FB7, 0x5F7F,
06165     0x8FB8, 0x5F83, 0x8FB9, 0x5F86, 0x8FBA, 0x5F8D, 0x8FBB, 0x5F8E,
06166     0x8FBC, 0x5F8F, 0x8FBD, 0x5F91, 0x8FBE, 0x5F93, 0x8FBF, 0x5F94,
06167     0x8FC0, 0x5F96, 0x8FC1, 0x5F9A, 0x8FC2, 0x5F9B, 0x8FC3, 0x5F9D,
06168     0x8FC4, 0x5F9E, 0x8FC5, 0x5F9F, 0x8FC6, 0x5FA0, 0x8FC7, 0x5FA2,
06169     0x8FC8, 0x5FA3, 0x8FC9, 0x5FA4, 0x8FCA, 0x5FA5, 0x8FCB, 0x5FA6,
06170     0x8FCC, 0x5FA7, 0x8FCD, 0x5FA9, 0x8FCE, 0x5FAB, 0x8FCF, 0x5FAC,
06171     0x8FD0, 0x5FAF, 0x8FD1, 0x5FB0, 0x8FD2, 0x5FB1, 0x8FD3, 0x5FB2,
06172     0x8FD4, 0x5FB3, 0x8FD5, 0x5FB4, 0x8FD6, 0x5FB6, 0x8FD7, 0x5FB8,
06173     0x8FD8, 0x5FB9, 0x8FD9, 0x5FBA, 0x8FDA, 0x5FBB, 0x8FDB, 0x5FBE,
06174     0x8FDC, 0x5FBF, 0x8FDD, 0x5FC0, 0x8FDE, 0x5FC1, 0x8FDF, 0x5FC2,
06175     0x8FE0, 0x5FC7, 0x8FE1, 0x5FC8, 0x8FE2, 0x5FCA, 0x8FE3, 0x5FCB,
06176     0x8FE4, 0x5FCE, 0x8FE5, 0x5FD3, 0x8FE6, 0x5FD4, 0x8FE7, 0x5FD5,
06177     0x8FE8, 0x5FDA, 0x8FE9, 0x5FDB, 0x8FEA, 0x5FDC, 0x8FEB, 0x5FDE,
06178     0x8FEC, 0x5FDF, 0x8FED, 0x5FE2, 0x8FEE, 0x5FE3, 0x8FEF, 0x5FE5,
06179     0x8FF0, 0x5FE6, 0x8FF1, 0x5FE8, 0x8FF2, 0x5FE9, 0x8FF3, 0x5FEC,
06180     0x8FF4, 0x5FEF, 0x8FF5, 0x5FF0, 0x8FF6, 0x5FF2, 0x8FF7, 0x5FF3,
06181     0x8FF8, 0x5FF4, 0x8FF9, 0x5FF6, 0x8FFA, 0x5FF7, 0x8FFB, 0x5FF9,
06182     0x8FFC, 0x5FFA, 0x8FFD, 0x5FFC, 0x8FFE, 0x6007, 0x9040, 0x6008,
06183     0x9041, 0x6009, 0x9042, 0x600B, 0x9043, 0x600C, 0x9044, 0x6010,
06184     0x9045, 0x6011, 0x9046, 0x6013, 0x9047, 0x6017, 0x9048, 0x6018,
06185     0x9049, 0x601A, 0x904A, 0x601E, 0x904B, 0x601F, 0x904C, 0x6022,
06186     0x904D, 0x6023, 0x904E, 0x6024, 0x904F, 0x602C, 0x9050, 0x602D,
06187     0x9051, 0x602E, 0x9052, 0x6030, 0x9053, 0x6031, 0x9054, 0x6032,
06188     0x9055, 0x6033, 0x9056, 0x6034, 0x9057, 0x6036, 0x9058, 0x6037,
06189     0x9059, 0x6038, 0x905A, 0x6039, 0x905B, 0x603A, 0x905C, 0x603D,
06190     0x905D, 0x603E, 0x905E, 0x6040, 0x905F, 0x6044, 0x9060, 0x6045,
06191     0x9061, 0x6046, 0x9062, 0x6047, 0x9063, 0x6048, 0x9064, 0x6049,
06192     0x9065, 0x604A, 0x9066, 0x604C, 0x9067, 0x604E, 0x9068, 0x604F,
06193     0x9069, 0x6051, 0x906A, 0x6053, 0x906B, 0x6054, 0x906C, 0x6056,
06194     0x906D, 0x6057, 0x906E, 0x6058, 0x906F, 0x605B, 0x9070, 0x605C,
06195     0x9071, 0x605E, 0x9072, 0x605F, 0x9073, 0x6060, 0x9074, 0x6061,
06196     0x9075, 0x6065, 0x9076, 0x6066, 0x9077, 0x606E, 0x9078, 0x6071,
06197     0x9079, 0x6072, 0x907A, 0x6074, 0x907B, 0x6075, 0x907C, 0x6077,
06198     0x907D, 0x607E, 0x907E, 0x6080, 0x9080, 0x6081, 0x9081, 0x6082,
06199     0x9082, 0x6085, 0x9083, 0x6086, 0x9084, 0x6087, 0x9085, 0x6088,
06200     0x9086, 0x608A, 0x9087, 0x608B, 0x9088, 0x608E, 0x9089, 0x608F,
06201     0x908A, 0x6090, 0x908B, 0x6091, 0x908C, 0x6093, 0x908D, 0x6095,
06202     0x908E, 0x6097, 0x908F, 0x6098, 0x9090, 0x6099, 0x9091, 0x609C,
06203     0x9092, 0x609E, 0x9093, 0x60A1, 0x9094, 0x60A2, 0x9095, 0x60A4,
06204     0x9096, 0x60A5, 0x9097, 0x60A7, 0x9098, 0x60A9, 0x9099, 0x60AA,
06205     0x909A, 0x60AE, 0x909B, 0x60B0, 0x909C, 0x60B3, 0x909D, 0x60B5,
06206     0x909E, 0x60B6, 0x909F, 0x60B7, 0x90A0, 0x60B9, 0x90A1, 0x60BA,
06207     0x90A2, 0x60BD, 0x90A3, 0x60BE, 0x90A4, 0x60BF, 0x90A5, 0x60C0,
06208     0x90A6, 0x60C1, 0x90A7, 0x60C2, 0x90A8, 0x60C3, 0x90A9, 0x60C4,
06209     0x90AA, 0x60C7, 0x90AB, 0x60C8, 0x90AC, 0x60C9, 0x90AD, 0x60CC,
06210     0x90AE, 0x60CD, 0x90AF, 0x60CE, 0x90B0, 0x60CF, 0x90B1, 0x60D0,
06211     0x90B2, 0x60D2, 0x90B3, 0x60D3, 0x90B4, 0x60D4, 0x90B5, 0x60D6,
06212     0x90B6, 0x60D7, 0x90B7, 0x60D9, 0x90B8, 0x60DB, 0x90B9, 0x60DE,
06213     0x90BA, 0x60E1, 0x90BB, 0x60E2, 0x90BC, 0x60E3, 0x90BD, 0x60E4,
06214     0x90BE, 0x60E5, 0x90BF, 0x60EA, 0x90C0, 0x60F1, 0x90C1, 0x60F2,
06215     0x90C2, 0x60F5, 0x90C3, 0x60F7, 0x90C4, 0x60F8, 0x90C5, 0x60FB,
06216     0x90C6, 0x60FC, 0x90C7, 0x60FD, 0x90C8, 0x60FE, 0x90C9, 0x60FF,
06217     0x90CA, 0x6102, 0x90CB, 0x6103, 0x90CC, 0x6104, 0x90CD, 0x6105,
06218     0x90CE, 0x6107, 0x90CF, 0x610A, 0x90D0, 0x610B, 0x90D1, 0x610C,
06219     0x90D2, 0x6110, 0x90D3, 0x6111, 0x90D4, 0x6112, 0x90D5, 0x6113,
06220     0x90D6, 0x6114, 0x90D7, 0x6116, 0x90D8, 0x6117, 0x90D9, 0x6118,
06221     0x90DA, 0x6119, 0x90DB, 0x611B, 0x90DC, 0x611C, 0x90DD, 0x611D,
06222     0x90DE, 0x611E, 0x90DF, 0x6121, 0x90E0, 0x6122, 0x90E1, 0x6125,
06223     0x90E2, 0x6128, 0x90E3, 0x6129, 0x90E4, 0x612A, 0x90E5, 0x612C,
06224     0x90E6, 0x612D, 0x90E7, 0x612E, 0x90E8, 0x612F, 0x90E9, 0x6130,
06225     0x90EA, 0x6131, 0x90EB, 0x6132, 0x90EC, 0x6133, 0x90ED, 0x6134,
06226     0x90EE, 0x6135, 0x90EF, 0x6136, 0x90F0, 0x6137, 0x90F1, 0x6138,
06227     0x90F2, 0x6139, 0x90F3, 0x613A, 0x90F4, 0x613B, 0x90F5, 0x613C,
06228     0x90F6, 0x613D, 0x90F7, 0x613E, 0x90F8, 0x6140, 0x90F9, 0x6141,
06229     0x90FA, 0x6142, 0x90FB, 0x6143, 0x90FC, 0x6144, 0x90FD, 0x6145,
06230     0x90FE, 0x6146, 0x9140, 0x6147, 0x9141, 0x6149, 0x9142, 0x614B,
06231     0x9143, 0x614D, 0x9144, 0x614F, 0x9145, 0x6150, 0x9146, 0x6152,
06232     0x9147, 0x6153, 0x9148, 0x6154, 0x9149, 0x6156, 0x914A, 0x6157,
06233     0x914B, 0x6158, 0x914C, 0x6159, 0x914D, 0x615A, 0x914E, 0x615B,
06234     0x914F, 0x615C, 0x9150, 0x615E, 0x9151, 0x615F, 0x9152, 0x6160,
06235     0x9153, 0x6161, 0x9154, 0x6163, 0x9155, 0x6164, 0x9156, 0x6165,
06236     0x9157, 0x6166, 0x9158, 0x6169, 0x9159, 0x616A, 0x915A, 0x616B,
06237     0x915B, 0x616C, 0x915C, 0x616D, 0x915D, 0x616E, 0x915E, 0x616F,
06238     0x915F, 0x6171, 0x9160, 0x6172, 0x9161, 0x6173, 0x9162, 0x6174,
06239     0x9163, 0x6176, 0x9164, 0x6178, 0x9165, 0x6179, 0x9166, 0x617A,
06240     0x9167, 0x617B, 0x9168, 0x617C, 0x9169, 0x617D, 0x916A, 0x617E,
06241     0x916B, 0x617F, 0x916C, 0x6180, 0x916D, 0x6181, 0x916E, 0x6182,
06242     0x916F, 0x6183, 0x9170, 0x6184, 0x9171, 0x6185, 0x9172, 0x6186,
06243     0x9173, 0x6187, 0x9174, 0x6188, 0x9175, 0x6189, 0x9176, 0x618A,
06244     0x9177, 0x618C, 0x9178, 0x618D, 0x9179, 0x618F, 0x917A, 0x6190,
06245     0x917B, 0x6191, 0x917C, 0x6192, 0x917D, 0x6193, 0x917E, 0x6195,
06246     0x9180, 0x6196, 0x9181, 0x6197, 0x9182, 0x6198, 0x9183, 0x6199,
06247     0x9184, 0x619A, 0x9185, 0x619B, 0x9186, 0x619C, 0x9187, 0x619E,
06248     0x9188, 0x619F, 0x9189, 0x61A0, 0x918A, 0x61A1, 0x918B, 0x61A2,
06249     0x918C, 0x61A3, 0x918D, 0x61A4, 0x918E, 0x61A5, 0x918F, 0x61A6,
06250     0x9190, 0x61AA, 0x9191, 0x61AB, 0x9192, 0x61AD, 0x9193, 0x61AE,
06251     0x9194, 0x61AF, 0x9195, 0x61B0, 0x9196, 0x61B1, 0x9197, 0x61B2,
06252     0x9198, 0x61B3, 0x9199, 0x61B4, 0x919A, 0x61B5, 0x919B, 0x61B6,
06253     0x919C, 0x61B8, 0x919D, 0x61B9, 0x919E, 0x61BA, 0x919F, 0x61BB,
06254     0x91A0, 0x61BC, 0x91A1, 0x61BD, 0x91A2, 0x61BF, 0x91A3, 0x61C0,
06255     0x91A4, 0x61C1, 0x91A5, 0x61C3, 0x91A6, 0x61C4, 0x91A7, 0x61C5,
06256     0x91A8, 0x61C6, 0x91A9, 0x61C7, 0x91AA, 0x61C9, 0x91AB, 0x61CC,
06257     0x91AC, 0x61CD, 0x91AD, 0x61CE, 0x91AE, 0x61CF, 0x91AF, 0x61D0,
06258     0x91B0, 0x61D3, 0x91B1, 0x61D5, 0x91B2, 0x61D6, 0x91B3, 0x61D7,
06259     0x91B4, 0x61D8, 0x91B5, 0x61D9, 0x91B6, 0x61DA, 0x91B7, 0x61DB,
06260     0x91B8, 0x61DC, 0x91B9, 0x61DD, 0x91BA, 0x61DE, 0x91BB, 0x61DF,
06261     0x91BC, 0x61E0, 0x91BD, 0x61E1, 0x91BE, 0x61E2, 0x91BF, 0x61E3,
06262     0x91C0, 0x61E4, 0x91C1, 0x61E5, 0x91C2, 0x61E7, 0x91C3, 0x61E8,
06263     0x91C4, 0x61E9, 0x91C5, 0x61EA, 0x91C6, 0x61EB, 0x91C7, 0x61EC,
06264     0x91C8, 0x61ED, 0x91C9, 0x61EE, 0x91CA, 0x61EF, 0x91CB, 0x61F0,
06265     0x91CC, 0x61F1, 0x91CD, 0x61F2, 0x91CE, 0x61F3, 0x91CF, 0x61F4,
06266     0x91D0, 0x61F6, 0x91D1, 0x61F7, 0x91D2, 0x61F8, 0x91D3, 0x61F9,
06267     0x91D4, 0x61FA, 0x91D5, 0x61FB, 0x91D6, 0x61FC, 0x91D7, 0x61FD,
06268     0x91D8, 0x61FE, 0x91D9, 0x6200, 0x91DA, 0x6201, 0x91DB, 0x6202,
06269     0x91DC, 0x6203, 0x91DD, 0x6204, 0x91DE, 0x6205, 0x91DF, 0x6207,
06270     0x91E0, 0x6209, 0x91E1, 0x6213, 0x91E2, 0x6214, 0x91E3, 0x6219,
06271     0x91E4, 0x621C, 0x91E5, 0x621D, 0x91E6, 0x621E, 0x91E7, 0x6220,
06272     0x91E8, 0x6223, 0x91E9, 0x6226, 0x91EA, 0x6227, 0x91EB, 0x6228,
06273     0x91EC, 0x6229, 0x91ED, 0x622B, 0x91EE, 0x622D, 0x91EF, 0x622F,
06274     0x91F0, 0x6230, 0x91F1, 0x6231, 0x91F2, 0x6232, 0x91F3, 0x6235,
06275     0x91F4, 0x6236, 0x91F5, 0x6238, 0x91F6, 0x6239, 0x91F7, 0x623A,
06276     0x91F8, 0x623B, 0x91F9, 0x623C, 0x91FA, 0x6242, 0x91FB, 0x6244,
06277     0x91FC, 0x6245, 0x91FD, 0x6246, 0x91FE, 0x624A, 0x9240, 0x624F,
06278     0x9241, 0x6250, 0x9242, 0x6255, 0x9243, 0x6256, 0x9244, 0x6257,
06279     0x9245, 0x6259, 0x9246, 0x625A, 0x9247, 0x625C, 0x9248, 0x625D,
06280     0x9249, 0x625E, 0x924A, 0x625F, 0x924B, 0x6260, 0x924C, 0x6261,
06281     0x924D, 0x6262, 0x924E, 0x6264, 0x924F, 0x6265, 0x9250, 0x6268,
06282     0x9251, 0x6271, 0x9252, 0x6272, 0x9253, 0x6274, 0x9254, 0x6275,
06283     0x9255, 0x6277, 0x9256, 0x6278, 0x9257, 0x627A, 0x9258, 0x627B,
06284     0x9259, 0x627D, 0x925A, 0x6281, 0x925B, 0x6282, 0x925C, 0x6283,
06285     0x925D, 0x6285, 0x925E, 0x6286, 0x925F, 0x6287, 0x9260, 0x6288,
06286     0x9261, 0x628B, 0x9262, 0x628C, 0x9263, 0x628D, 0x9264, 0x628E,
06287     0x9265, 0x628F, 0x9266, 0x6290, 0x9267, 0x6294, 0x9268, 0x6299,
06288     0x9269, 0x629C, 0x926A, 0x629D, 0x926B, 0x629E, 0x926C, 0x62A3,
06289     0x926D, 0x62A6, 0x926E, 0x62A7, 0x926F, 0x62A9, 0x9270, 0x62AA,
06290     0x9271, 0x62AD, 0x9272, 0x62AE, 0x9273, 0x62AF, 0x9274, 0x62B0,
06291     0x9275, 0x62B2, 0x9276, 0x62B3, 0x9277, 0x62B4, 0x9278, 0x62B6,
06292     0x9279, 0x62B7, 0x927A, 0x62B8, 0x927B, 0x62BA, 0x927C, 0x62BE,
06293     0x927D, 0x62C0, 0x927E, 0x62C1, 0x9280, 0x62C3, 0x9281, 0x62CB,
06294     0x9282, 0x62CF, 0x9283, 0x62D1, 0x9284, 0x62D5, 0x9285, 0x62DD,
06295     0x9286, 0x62DE, 0x9287, 0x62E0, 0x9288, 0x62E1, 0x9289, 0x62E4,
06296     0x928A, 0x62EA, 0x928B, 0x62EB, 0x928C, 0x62F0, 0x928D, 0x62F2,
06297     0x928E, 0x62F5, 0x928F, 0x62F8, 0x9290, 0x62F9, 0x9291, 0x62FA,
06298     0x9292, 0x62FB, 0x9293, 0x6300, 0x9294, 0x6303, 0x9295, 0x6304,
06299     0x9296, 0x6305, 0x9297, 0x6306, 0x9298, 0x630A, 0x9299, 0x630B,
06300     0x929A, 0x630C, 0x929B, 0x630D, 0x929C, 0x630F, 0x929D, 0x6310,
06301     0x929E, 0x6312, 0x929F, 0x6313, 0x92A0, 0x6314, 0x92A1, 0x6315,
06302     0x92A2, 0x6317, 0x92A3, 0x6318, 0x92A4, 0x6319, 0x92A5, 0x631C,
06303     0x92A6, 0x6326, 0x92A7, 0x6327, 0x92A8, 0x6329, 0x92A9, 0x632C,
06304     0x92AA, 0x632D, 0x92AB, 0x632E, 0x92AC, 0x6330, 0x92AD, 0x6331,
06305     0x92AE, 0x6333, 0x92AF, 0x6334, 0x92B0, 0x6335, 0x92B1, 0x6336,
06306     0x92B2, 0x6337, 0x92B3, 0x6338, 0x92B4, 0x633B, 0x92B5, 0x633C,
06307     0x92B6, 0x633E, 0x92B7, 0x633F, 0x92B8, 0x6340, 0x92B9, 0x6341,
06308     0x92BA, 0x6344, 0x92BB, 0x6347, 0x92BC, 0x6348, 0x92BD, 0x634A,
06309     0x92BE, 0x6351, 0x92BF, 0x6352, 0x92C0, 0x6353, 0x92C1, 0x6354,
06310     0x92C2, 0x6356, 0x92C3, 0x6357, 0x92C4, 0x6358, 0x92C5, 0x6359,
06311     0x92C6, 0x635A, 0x92C7, 0x635B, 0x92C8, 0x635C, 0x92C9, 0x635D,
06312     0x92CA, 0x6360, 0x92CB, 0x6364, 0x92CC, 0x6365, 0x92CD, 0x6366,
06313     0x92CE, 0x6368, 0x92CF, 0x636A, 0x92D0, 0x636B, 0x92D1, 0x636C,
06314     0x92D2, 0x636F, 0x92D3, 0x6370, 0x92D4, 0x6372, 0x92D5, 0x6373,
06315     0x92D6, 0x6374, 0x92D7, 0x6375, 0x92D8, 0x6378, 0x92D9, 0x6379,
06316     0x92DA, 0x637C, 0x92DB, 0x637D, 0x92DC, 0x637E, 0x92DD, 0x637F,
06317     0x92DE, 0x6381, 0x92DF, 0x6383, 0x92E0, 0x6384, 0x92E1, 0x6385,
06318     0x92E2, 0x6386, 0x92E3, 0x638B, 0x92E4, 0x638D, 0x92E5, 0x6391,
06319     0x92E6, 0x6393, 0x92E7, 0x6394, 0x92E8, 0x6395, 0x92E9, 0x6397,
06320     0x92EA, 0x6399, 0x92EB, 0x639A, 0x92EC, 0x639B, 0x92ED, 0x639C,
06321     0x92EE, 0x639D, 0x92EF, 0x639E, 0x92F0, 0x639F, 0x92F1, 0x63A1,
06322     0x92F2, 0x63A4, 0x92F3, 0x63A6, 0x92F4, 0x63AB, 0x92F5, 0x63AF,
06323     0x92F6, 0x63B1, 0x92F7, 0x63B2, 0x92F8, 0x63B5, 0x92F9, 0x63B6,
06324     0x92FA, 0x63B9, 0x92FB, 0x63BB, 0x92FC, 0x63BD, 0x92FD, 0x63BF,
06325     0x92FE, 0x63C0, 0x9340, 0x63C1, 0x9341, 0x63C2, 0x9342, 0x63C3,
06326     0x9343, 0x63C5, 0x9344, 0x63C7, 0x9345, 0x63C8, 0x9346, 0x63CA,
06327     0x9347, 0x63CB, 0x9348, 0x63CC, 0x9349, 0x63D1, 0x934A, 0x63D3,
06328     0x934B, 0x63D4, 0x934C, 0x63D5, 0x934D, 0x63D7, 0x934E, 0x63D8,
06329     0x934F, 0x63D9, 0x9350, 0x63DA, 0x9351, 0x63DB, 0x9352, 0x63DC,
06330     0x9353, 0x63DD, 0x9354, 0x63DF, 0x9355, 0x63E2, 0x9356, 0x63E4,
06331     0x9357, 0x63E5, 0x9358, 0x63E6, 0x9359, 0x63E7, 0x935A, 0x63E8,
06332     0x935B, 0x63EB, 0x935C, 0x63EC, 0x935D, 0x63EE, 0x935E, 0x63EF,
06333     0x935F, 0x63F0, 0x9360, 0x63F1, 0x9361, 0x63F3, 0x9362, 0x63F5,
06334     0x9363, 0x63F7, 0x9364, 0x63F9, 0x9365, 0x63FA, 0x9366, 0x63FB,
06335     0x9367, 0x63FC, 0x9368, 0x63FE, 0x9369, 0x6403, 0x936A, 0x6404,
06336     0x936B, 0x6406, 0x936C, 0x6407, 0x936D, 0x6408, 0x936E, 0x6409,
06337     0x936F, 0x640A, 0x9370, 0x640D, 0x9371, 0x640E, 0x9372, 0x6411,
06338     0x9373, 0x6412, 0x9374, 0x6415, 0x9375, 0x6416, 0x9376, 0x6417,
06339     0x9377, 0x6418, 0x9378, 0x6419, 0x9379, 0x641A, 0x937A, 0x641D,
06340     0x937B, 0x641F, 0x937C, 0x6422, 0x937D, 0x6423, 0x937E, 0x6424,
06341     0x9380, 0x6425, 0x9381, 0x6427, 0x9382, 0x6428, 0x9383, 0x6429,
06342     0x9384, 0x642B, 0x9385, 0x642E, 0x9386, 0x642F, 0x9387, 0x6430,
06343     0x9388, 0x6431, 0x9389, 0x6432, 0x938A, 0x6433, 0x938B, 0x6435,
06344     0x938C, 0x6436, 0x938D, 0x6437, 0x938E, 0x6438, 0x938F, 0x6439,
06345     0x9390, 0x643B, 0x9391, 0x643C, 0x9392, 0x643E, 0x9393, 0x6440,
06346     0x9394, 0x6442, 0x9395, 0x6443, 0x9396, 0x6449, 0x9397, 0x644B,
06347     0x9398, 0x644C, 0x9399, 0x644D, 0x939A, 0x644E, 0x939B, 0x644F,
06348     0x939C, 0x6450, 0x939D, 0x6451, 0x939E, 0x6453, 0x939F, 0x6455,
06349     0x93A0, 0x6456, 0x93A1, 0x6457, 0x93A2, 0x6459, 0x93A3, 0x645A,
06350     0x93A4, 0x645B, 0x93A5, 0x645C, 0x93A6, 0x645D, 0x93A7, 0x645F,
06351     0x93A8, 0x6460, 0x93A9, 0x6461, 0x93AA, 0x6462, 0x93AB, 0x6463,
06352     0x93AC, 0x6464, 0x93AD, 0x6465, 0x93AE, 0x6466, 0x93AF, 0x6468,
06353     0x93B0, 0x646A, 0x93B1, 0x646B, 0x93B2, 0x646C, 0x93B3, 0x646E,
06354     0x93B4, 0x646F, 0x93B5, 0x6470, 0x93B6, 0x6471, 0x93B7, 0x6472,
06355     0x93B8, 0x6473, 0x93B9, 0x6474, 0x93BA, 0x6475, 0x93BB, 0x6476,
06356     0x93BC, 0x6477, 0x93BD, 0x647B, 0x93BE, 0x647C, 0x93BF, 0x647D,
06357     0x93C0, 0x647E, 0x93C1, 0x647F, 0x93C2, 0x6480, 0x93C3, 0x6481,
06358     0x93C4, 0x6483, 0x93C5, 0x6486, 0x93C6, 0x6488, 0x93C7, 0x6489,
06359     0x93C8, 0x648A, 0x93C9, 0x648B, 0x93CA, 0x648C, 0x93CB, 0x648D,
06360     0x93CC, 0x648E, 0x93CD, 0x648F, 0x93CE, 0x6490, 0x93CF, 0x6493,
06361     0x93D0, 0x6494, 0x93D1, 0x6497, 0x93D2, 0x6498, 0x93D3, 0x649A,
06362     0x93D4, 0x649B, 0x93D5, 0x649C, 0x93D6, 0x649D, 0x93D7, 0x649F,
06363     0x93D8, 0x64A0, 0x93D9, 0x64A1, 0x93DA, 0x64A2, 0x93DB, 0x64A3,
06364     0x93DC, 0x64A5, 0x93DD, 0x64A6, 0x93DE, 0x64A7, 0x93DF, 0x64A8,
06365     0x93E0, 0x64AA, 0x93E1, 0x64AB, 0x93E2, 0x64AF, 0x93E3, 0x64B1,
06366     0x93E4, 0x64B2, 0x93E5, 0x64B3, 0x93E6, 0x64B4, 0x93E7, 0x64B6,
06367     0x93E8, 0x64B9, 0x93E9, 0x64BB, 0x93EA, 0x64BD, 0x93EB, 0x64BE,
06368     0x93EC, 0x64BF, 0x93ED, 0x64C1, 0x93EE, 0x64C3, 0x93EF, 0x64C4,
06369     0x93F0, 0x64C6, 0x93F1, 0x64C7, 0x93F2, 0x64C8, 0x93F3, 0x64C9,
06370     0x93F4, 0x64CA, 0x93F5, 0x64CB, 0x93F6, 0x64CC, 0x93F7, 0x64CF,
06371     0x93F8, 0x64D1, 0x93F9, 0x64D3, 0x93FA, 0x64D4, 0x93FB, 0x64D5,
06372     0x93FC, 0x64D6, 0x93FD, 0x64D9, 0x93FE, 0x64DA, 0x9440, 0x64DB,
06373     0x9441, 0x64DC, 0x9442, 0x64DD, 0x9443, 0x64DF, 0x9444, 0x64E0,
06374     0x9445, 0x64E1, 0x9446, 0x64E3, 0x9447, 0x64E5, 0x9448, 0x64E7,
06375     0x9449, 0x64E8, 0x944A, 0x64E9, 0x944B, 0x64EA, 0x944C, 0x64EB,
06376     0x944D, 0x64EC, 0x944E, 0x64ED, 0x944F, 0x64EE, 0x9450, 0x64EF,
06377     0x9451, 0x64F0, 0x9452, 0x64F1, 0x9453, 0x64F2, 0x9454, 0x64F3,
06378     0x9455, 0x64F4, 0x9456, 0x64F5, 0x9457, 0x64F6, 0x9458, 0x64F7,
06379     0x9459, 0x64F8, 0x945A, 0x64F9, 0x945B, 0x64FA, 0x945C, 0x64FB,
06380     0x945D, 0x64FC, 0x945E, 0x64FD, 0x945F, 0x64FE, 0x9460, 0x64FF,
06381     0x9461, 0x6501, 0x9462, 0x6502, 0x9463, 0x6503, 0x9464, 0x6504,
06382     0x9465, 0x6505, 0x9466, 0x6506, 0x9467, 0x6507, 0x9468, 0x6508,
06383     0x9469, 0x650A, 0x946A, 0x650B, 0x946B, 0x650C, 0x946C, 0x650D,
06384     0x946D, 0x650E, 0x946E, 0x650F, 0x946F, 0x6510, 0x9470, 0x6511,
06385     0x9471, 0x6513, 0x9472, 0x6514, 0x9473, 0x6515, 0x9474, 0x6516,
06386     0x9475, 0x6517, 0x9476, 0x6519, 0x9477, 0x651A, 0x9478, 0x651B,
06387     0x9479, 0x651C, 0x947A, 0x651D, 0x947B, 0x651E, 0x947C, 0x651F,
06388     0x947D, 0x6520, 0x947E, 0x6521, 0x9480, 0x6522, 0x9481, 0x6523,
06389     0x9482, 0x6524, 0x9483, 0x6526, 0x9484, 0x6527, 0x9485, 0x6528,
06390     0x9486, 0x6529, 0x9487, 0x652A, 0x9488, 0x652C, 0x9489, 0x652D,
06391     0x948A, 0x6530, 0x948B, 0x6531, 0x948C, 0x6532, 0x948D, 0x6533,
06392     0x948E, 0x6537, 0x948F, 0x653A, 0x9490, 0x653C, 0x9491, 0x653D,
06393     0x9492, 0x6540, 0x9493, 0x6541, 0x9494, 0x6542, 0x9495, 0x6543,
06394     0x9496, 0x6544, 0x9497, 0x6546, 0x9498, 0x6547, 0x9499, 0x654A,
06395     0x949A, 0x654B, 0x949B, 0x654D, 0x949C, 0x654E, 0x949D, 0x6550,
06396     0x949E, 0x6552, 0x949F, 0x6553, 0x94A0, 0x6554, 0x94A1, 0x6557,
06397     0x94A2, 0x6558, 0x94A3, 0x655A, 0x94A4, 0x655C, 0x94A5, 0x655F,
06398     0x94A6, 0x6560, 0x94A7, 0x6561, 0x94A8, 0x6564, 0x94A9, 0x6565,
06399     0x94AA, 0x6567, 0x94AB, 0x6568, 0x94AC, 0x6569, 0x94AD, 0x656A,
06400     0x94AE, 0x656D, 0x94AF, 0x656E, 0x94B0, 0x656F, 0x94B1, 0x6571,
06401     0x94B2, 0x6573, 0x94B3, 0x6575, 0x94B4, 0x6576, 0x94B5, 0x6578,
06402     0x94B6, 0x6579, 0x94B7, 0x657A, 0x94B8, 0x657B, 0x94B9, 0x657C,
06403     0x94BA, 0x657D, 0x94BB, 0x657E, 0x94BC, 0x657F, 0x94BD, 0x6580,
06404     0x94BE, 0x6581, 0x94BF, 0x6582, 0x94C0, 0x6583, 0x94C1, 0x6584,
06405     0x94C2, 0x6585, 0x94C3, 0x6586, 0x94C4, 0x6588, 0x94C5, 0x6589,
06406     0x94C6, 0x658A, 0x94C7, 0x658D, 0x94C8, 0x658E, 0x94C9, 0x658F,
06407     0x94CA, 0x6592, 0x94CB, 0x6594, 0x94CC, 0x6595, 0x94CD, 0x6596,
06408     0x94CE, 0x6598, 0x94CF, 0x659A, 0x94D0, 0x659D, 0x94D1, 0x659E,
06409     0x94D2, 0x65A0, 0x94D3, 0x65A2, 0x94D4, 0x65A3, 0x94D5, 0x65A6,
06410     0x94D6, 0x65A8, 0x94D7, 0x65AA, 0x94D8, 0x65AC, 0x94D9, 0x65AE,
06411     0x94DA, 0x65B1, 0x94DB, 0x65B2, 0x94DC, 0x65B3, 0x94DD, 0x65B4,
06412     0x94DE, 0x65B5, 0x94DF, 0x65B6, 0x94E0, 0x65B7, 0x94E1, 0x65B8,
06413     0x94E2, 0x65BA, 0x94E3, 0x65BB, 0x94E4, 0x65BE, 0x94E5, 0x65BF,
06414     0x94E6, 0x65C0, 0x94E7, 0x65C2, 0x94E8, 0x65C7, 0x94E9, 0x65C8,
06415     0x94EA, 0x65C9, 0x94EB, 0x65CA, 0x94EC, 0x65CD, 0x94ED, 0x65D0,
06416     0x94EE, 0x65D1, 0x94EF, 0x65D3, 0x94F0, 0x65D4, 0x94F1, 0x65D5,
06417     0x94F2, 0x65D8, 0x94F3, 0x65D9, 0x94F4, 0x65DA, 0x94F5, 0x65DB,
06418     0x94F6, 0x65DC, 0x94F7, 0x65DD, 0x94F8, 0x65DE, 0x94F9, 0x65DF,
06419     0x94FA, 0x65E1, 0x94FB, 0x65E3, 0x94FC, 0x65E4, 0x94FD, 0x65EA,
06420     0x94FE, 0x65EB, 0x9540, 0x65F2, 0x9541, 0x65F3, 0x9542, 0x65F4,
06421     0x9543, 0x65F5, 0x9544, 0x65F8, 0x9545, 0x65F9, 0x9546, 0x65FB,
06422     0x9547, 0x65FC, 0x9548, 0x65FD, 0x9549, 0x65FE, 0x954A, 0x65FF,
06423     0x954B, 0x6601, 0x954C, 0x6604, 0x954D, 0x6605, 0x954E, 0x6607,
06424     0x954F, 0x6608, 0x9550, 0x6609, 0x9551, 0x660B, 0x9552, 0x660D,
06425     0x9553, 0x6610, 0x9554, 0x6611, 0x9555, 0x6612, 0x9556, 0x6616,
06426     0x9557, 0x6617, 0x9558, 0x6618, 0x9559, 0x661A, 0x955A, 0x661B,
06427     0x955B, 0x661C, 0x955C, 0x661E, 0x955D, 0x6621, 0x955E, 0x6622,
06428     0x955F, 0x6623, 0x9560, 0x6624, 0x9561, 0x6626, 0x9562, 0x6629,
06429     0x9563, 0x662A, 0x9564, 0x662B, 0x9565, 0x662C, 0x9566, 0x662E,
06430     0x9567, 0x6630, 0x9568, 0x6632, 0x9569, 0x6633, 0x956A, 0x6637,
06431     0x956B, 0x6638, 0x956C, 0x6639, 0x956D, 0x663A, 0x956E, 0x663B,
06432     0x956F, 0x663D, 0x9570, 0x663F, 0x9571, 0x6640, 0x9572, 0x6642,
06433     0x9573, 0x6644, 0x9574, 0x6645, 0x9575, 0x6646, 0x9576, 0x6647,
06434     0x9577, 0x6648, 0x9578, 0x6649, 0x9579, 0x664A, 0x957A, 0x664D,
06435     0x957B, 0x664E, 0x957C, 0x6650, 0x957D, 0x6651, 0x957E, 0x6658,
06436     0x9580, 0x6659, 0x9581, 0x665B, 0x9582, 0x665C, 0x9583, 0x665D,
06437     0x9584, 0x665E, 0x9585, 0x6660, 0x9586, 0x6662, 0x9587, 0x6663,
06438     0x9588, 0x6665, 0x9589, 0x6667, 0x958A, 0x6669, 0x958B, 0x666A,
06439     0x958C, 0x666B, 0x958D, 0x666C, 0x958E, 0x666D, 0x958F, 0x6671,
06440     0x9590, 0x6672, 0x9591, 0x6673, 0x9592, 0x6675, 0x9593, 0x6678,
06441     0x9594, 0x6679, 0x9595, 0x667B, 0x9596, 0x667C, 0x9597, 0x667D,
06442     0x9598, 0x667F, 0x9599, 0x6680, 0x959A, 0x6681, 0x959B, 0x6683,
06443     0x959C, 0x6685, 0x959D, 0x6686, 0x959E, 0x6688, 0x959F, 0x6689,
06444     0x95A0, 0x668A, 0x95A1, 0x668B, 0x95A2, 0x668D, 0x95A3, 0x668E,
06445     0x95A4, 0x668F, 0x95A5, 0x6690, 0x95A6, 0x6692, 0x95A7, 0x6693,
06446     0x95A8, 0x6694, 0x95A9, 0x6695, 0x95AA, 0x6698, 0x95AB, 0x6699,
06447     0x95AC, 0x669A, 0x95AD, 0x669B, 0x95AE, 0x669C, 0x95AF, 0x669E,
06448     0x95B0, 0x669F, 0x95B1, 0x66A0, 0x95B2, 0x66A1, 0x95B3, 0x66A2,
06449     0x95B4, 0x66A3, 0x95B5, 0x66A4, 0x95B6, 0x66A5, 0x95B7, 0x66A6,
06450     0x95B8, 0x66A9, 0x95B9, 0x66AA, 0x95BA, 0x66AB, 0x95BB, 0x66AC,
06451     0x95BC, 0x66AD, 0x95BD, 0x66AF, 0x95BE, 0x66B0, 0x95BF, 0x66B1,
06452     0x95C0, 0x66B2, 0x95C1, 0x66B3, 0x95C2, 0x66B5, 0x95C3, 0x66B6,
06453     0x95C4, 0x66B7, 0x95C5, 0x66B8, 0x95C6, 0x66BA, 0x95C7, 0x66BB,
06454     0x95C8, 0x66BC, 0x95C9, 0x66BD, 0x95CA, 0x66BF, 0x95CB, 0x66C0,
06455     0x95CC, 0x66C1, 0x95CD, 0x66C2, 0x95CE, 0x66C3, 0x95CF, 0x66C4,
06456     0x95D0, 0x66C5, 0x95D1, 0x66C6, 0x95D2, 0x66C7, 0x95D3, 0x66C8,
06457     0x95D4, 0x66C9, 0x95D5, 0x66CA, 0x95D6, 0x66CB, 0x95D7, 0x66CC,
06458     0x95D8, 0x66CD, 0x95D9, 0x66CE, 0x95DA, 0x66CF, 0x95DB, 0x66D0,
06459     0x95DC, 0x66D1, 0x95DD, 0x66D2, 0x95DE, 0x66D3, 0x95DF, 0x66D4,
06460     0x95E0, 0x66D5, 0x95E1, 0x66D6, 0x95E2, 0x66D7, 0x95E3, 0x66D8,
06461     0x95E4, 0x66DA, 0x95E5, 0x66DE, 0x95E6, 0x66DF, 0x95E7, 0x66E0,
06462     0x95E8, 0x66E1, 0x95E9, 0x66E2, 0x95EA, 0x66E3, 0x95EB, 0x66E4,
06463     0x95EC, 0x66E5, 0x95ED, 0x66E7, 0x95EE, 0x66E8, 0x95EF, 0x66EA,
06464     0x95F0, 0x66EB, 0x95F1, 0x66EC, 0x95F2, 0x66ED, 0x95F3, 0x66EE,
06465     0x95F4, 0x66EF, 0x95F5, 0x66F1, 0x95F6, 0x66F5, 0x95F7, 0x66F6,
06466     0x95F8, 0x66F8, 0x95F9, 0x66FA, 0x95FA, 0x66FB, 0x95FB, 0x66FD,
06467     0x95FC, 0x6701, 0x95FD, 0x6702, 0x95FE, 0x6703, 0x9640, 0x6704,
06468     0x9641, 0x6705, 0x9642, 0x6706, 0x9643, 0x6707, 0x9644, 0x670C,
06469     0x9645, 0x670E, 0x9646, 0x670F, 0x9647, 0x6711, 0x9648, 0x6712,
06470     0x9649, 0x6713, 0x964A, 0x6716, 0x964B, 0x6718, 0x964C, 0x6719,
06471     0x964D, 0x671A, 0x964E, 0x671C, 0x964F, 0x671E, 0x9650, 0x6720,
06472     0x9651, 0x6721, 0x9652, 0x6722, 0x9653, 0x6723, 0x9654, 0x6724,
06473     0x9655, 0x6725, 0x9656, 0x6727, 0x9657, 0x6729, 0x9658, 0x672E,
06474     0x9659, 0x6730, 0x965A, 0x6732, 0x965B, 0x6733, 0x965C, 0x6736,
06475     0x965D, 0x6737, 0x965E, 0x6738, 0x965F, 0x6739, 0x9660, 0x673B,
06476     0x9661, 0x673C, 0x9662, 0x673E, 0x9663, 0x673F, 0x9664, 0x6741,
06477     0x9665, 0x6744, 0x9666, 0x6745, 0x9667, 0x6747, 0x9668, 0x674A,
06478     0x9669, 0x674B, 0x966A, 0x674D, 0x966B, 0x6752, 0x966C, 0x6754,
06479     0x966D, 0x6755, 0x966E, 0x6757, 0x966F, 0x6758, 0x9670, 0x6759,
06480     0x9671, 0x675A, 0x9672, 0x675B, 0x9673, 0x675D, 0x9674, 0x6762,
06481     0x9675, 0x6763, 0x9676, 0x6764, 0x9677, 0x6766, 0x9678, 0x6767,
06482     0x9679, 0x676B, 0x967A, 0x676C, 0x967B, 0x676E, 0x967C, 0x6771,
06483     0x967D, 0x6774, 0x967E, 0x6776, 0x9680, 0x6778, 0x9681, 0x6779,
06484     0x9682, 0x677A, 0x9683, 0x677B, 0x9684, 0x677D, 0x9685, 0x6780,
06485     0x9686, 0x6782, 0x9687, 0x6783, 0x9688, 0x6785, 0x9689, 0x6786,
06486     0x968A, 0x6788, 0x968B, 0x678A, 0x968C, 0x678C, 0x968D, 0x678D,
06487     0x968E, 0x678E, 0x968F, 0x678F, 0x9690, 0x6791, 0x9691, 0x6792,
06488     0x9692, 0x6793, 0x9693, 0x6794, 0x9694, 0x6796, 0x9695, 0x6799,
06489     0x9696, 0x679B, 0x9697, 0x679F, 0x9698, 0x67A0, 0x9699, 0x67A1,
06490     0x969A, 0x67A4, 0x969B, 0x67A6, 0x969C, 0x67A9, 0x969D, 0x67AC,
06491     0x969E, 0x67AE, 0x969F, 0x67B1, 0x96A0, 0x67B2, 0x96A1, 0x67B4,
06492     0x96A2, 0x67B9, 0x96A3, 0x67BA, 0x96A4, 0x67BB, 0x96A5, 0x67BC,
06493     0x96A6, 0x67BD, 0x96A7, 0x67BE, 0x96A8, 0x67BF, 0x96A9, 0x67C0,
06494     0x96AA, 0x67C2, 0x96AB, 0x67C5, 0x96AC, 0x67C6, 0x96AD, 0x67C7,
06495     0x96AE, 0x67C8, 0x96AF, 0x67C9, 0x96B0, 0x67CA, 0x96B1, 0x67CB,
06496     0x96B2, 0x67CC, 0x96B3, 0x67CD, 0x96B4, 0x67CE, 0x96B5, 0x67D5,
06497     0x96B6, 0x67D6, 0x96B7, 0x67D7, 0x96B8, 0x67DB, 0x96B9, 0x67DF,
06498     0x96BA, 0x67E1, 0x96BB, 0x67E3, 0x96BC, 0x67E4, 0x96BD, 0x67E6,
06499     0x96BE, 0x67E7, 0x96BF, 0x67E8, 0x96C0, 0x67EA, 0x96C1, 0x67EB,
06500     0x96C2, 0x67ED, 0x96C3, 0x67EE, 0x96C4, 0x67F2, 0x96C5, 0x67F5,
06501     0x96C6, 0x67F6, 0x96C7, 0x67F7, 0x96C8, 0x67F8, 0x96C9, 0x67F9,
06502     0x96CA, 0x67FA, 0x96CB, 0x67FB, 0x96CC, 0x67FC, 0x96CD, 0x67FE,
06503     0x96CE, 0x6801, 0x96CF, 0x6802, 0x96D0, 0x6803, 0x96D1, 0x6804,
06504     0x96D2, 0x6806, 0x96D3, 0x680D, 0x96D4, 0x6810, 0x96D5, 0x6812,
06505     0x96D6, 0x6814, 0x96D7, 0x6815, 0x96D8, 0x6818, 0x96D9, 0x6819,
06506     0x96DA, 0x681A, 0x96DB, 0x681B, 0x96DC, 0x681C, 0x96DD, 0x681E,
06507     0x96DE, 0x681F, 0x96DF, 0x6820, 0x96E0, 0x6822, 0x96E1, 0x6823,
06508     0x96E2, 0x6824, 0x96E3, 0x6825, 0x96E4, 0x6826, 0x96E5, 0x6827,
06509     0x96E6, 0x6828, 0x96E7, 0x682B, 0x96E8, 0x682C, 0x96E9, 0x682D,
06510     0x96EA, 0x682E, 0x96EB, 0x682F, 0x96EC, 0x6830, 0x96ED, 0x6831,
06511     0x96EE, 0x6834, 0x96EF, 0x6835, 0x96F0, 0x6836, 0x96F1, 0x683A,
06512     0x96F2, 0x683B, 0x96F3, 0x683F, 0x96F4, 0x6847, 0x96F5, 0x684B,
06513     0x96F6, 0x684D, 0x96F7, 0x684F, 0x96F8, 0x6852, 0x96F9, 0x6856,
06514     0x96FA, 0x6857, 0x96FB, 0x6858, 0x96FC, 0x6859, 0x96FD, 0x685A,
06515     0x96FE, 0x685B, 0x9740, 0x685C, 0x9741, 0x685D, 0x9742, 0x685E,
06516     0x9743, 0x685F, 0x9744, 0x686A, 0x9745, 0x686C, 0x9746, 0x686D,
06517     0x9747, 0x686E, 0x9748, 0x686F, 0x9749, 0x6870, 0x974A, 0x6871,
06518     0x974B, 0x6872, 0x974C, 0x6873, 0x974D, 0x6875, 0x974E, 0x6878,
06519     0x974F, 0x6879, 0x9750, 0x687A, 0x9751, 0x687B, 0x9752, 0x687C,
06520     0x9753, 0x687D, 0x9754, 0x687E, 0x9755, 0x687F, 0x9756, 0x6880,
06521     0x9757, 0x6882, 0x9758, 0x6884, 0x9759, 0x6887, 0x975A, 0x6888,
06522     0x975B, 0x6889, 0x975C, 0x688A, 0x975D, 0x688B, 0x975E, 0x688C,
06523     0x975F, 0x688D, 0x9760, 0x688E, 0x9761, 0x6890, 0x9762, 0x6891,
06524     0x9763, 0x6892, 0x9764, 0x6894, 0x9765, 0x6895, 0x9766, 0x6896,
06525     0x9767, 0x6898, 0x9768, 0x6899, 0x9769, 0x689A, 0x976A, 0x689B,
06526     0x976B, 0x689C, 0x976C, 0x689D, 0x976D, 0x689E, 0x976E, 0x689F,
06527     0x976F, 0x68A0, 0x9770, 0x68A1, 0x9771, 0x68A3, 0x9772, 0x68A4,
06528     0x9773, 0x68A5, 0x9774, 0x68A9, 0x9775, 0x68AA, 0x9776, 0x68AB,
06529     0x9777, 0x68AC, 0x9778, 0x68AE, 0x9779, 0x68B1, 0x977A, 0x68B2,
06530     0x977B, 0x68B4, 0x977C, 0x68B6, 0x977D, 0x68B7, 0x977E, 0x68B8,
06531     0x9780, 0x68B9, 0x9781, 0x68BA, 0x9782, 0x68BB, 0x9783, 0x68BC,
06532     0x9784, 0x68BD, 0x9785, 0x68BE, 0x9786, 0x68BF, 0x9787, 0x68C1,
06533     0x9788, 0x68C3, 0x9789, 0x68C4, 0x978A, 0x68C5, 0x978B, 0x68C6,
06534     0x978C, 0x68C7, 0x978D, 0x68C8, 0x978E, 0x68CA, 0x978F, 0x68CC,
06535     0x9790, 0x68CE, 0x9791, 0x68CF, 0x9792, 0x68D0, 0x9793, 0x68D1,
06536     0x9794, 0x68D3, 0x9795, 0x68D4, 0x9796, 0x68D6, 0x9797, 0x68D7,
06537     0x9798, 0x68D9, 0x9799, 0x68DB, 0x979A, 0x68DC, 0x979B, 0x68DD,
06538     0x979C, 0x68DE, 0x979D, 0x68DF, 0x979E, 0x68E1, 0x979F, 0x68E2,
06539     0x97A0, 0x68E4, 0x97A1, 0x68E5, 0x97A2, 0x68E6, 0x97A3, 0x68E7,
06540     0x97A4, 0x68E8, 0x97A5, 0x68E9, 0x97A6, 0x68EA, 0x97A7, 0x68EB,
06541     0x97A8, 0x68EC, 0x97A9, 0x68ED, 0x97AA, 0x68EF, 0x97AB, 0x68F2,
06542     0x97AC, 0x68F3, 0x97AD, 0x68F4, 0x97AE, 0x68F6, 0x97AF, 0x68F7,
06543     0x97B0, 0x68F8, 0x97B1, 0x68FB, 0x97B2, 0x68FD, 0x97B3, 0x68FE,
06544     0x97B4, 0x68FF, 0x97B5, 0x6900, 0x97B6, 0x6902, 0x97B7, 0x6903,
06545     0x97B8, 0x6904, 0x97B9, 0x6906, 0x97BA, 0x6907, 0x97BB, 0x6908,
06546     0x97BC, 0x6909, 0x97BD, 0x690A, 0x97BE, 0x690C, 0x97BF, 0x690F,
06547     0x97C0, 0x6911, 0x97C1, 0x6913, 0x97C2, 0x6914, 0x97C3, 0x6915,
06548     0x97C4, 0x6916, 0x97C5, 0x6917, 0x97C6, 0x6918, 0x97C7, 0x6919,
06549     0x97C8, 0x691A, 0x97C9, 0x691B, 0x97CA, 0x691C, 0x97CB, 0x691D,
06550     0x97CC, 0x691E, 0x97CD, 0x6921, 0x97CE, 0x6922, 0x97CF, 0x6923,
06551     0x97D0, 0x6925, 0x97D1, 0x6926, 0x97D2, 0x6927, 0x97D3, 0x6928,
06552     0x97D4, 0x6929, 0x97D5, 0x692A, 0x97D6, 0x692B, 0x97D7, 0x692C,
06553     0x97D8, 0x692E, 0x97D9, 0x692F, 0x97DA, 0x6931, 0x97DB, 0x6932,
06554     0x97DC, 0x6933, 0x97DD, 0x6935, 0x97DE, 0x6936, 0x97DF, 0x6937,
06555     0x97E0, 0x6938, 0x97E1, 0x693A, 0x97E2, 0x693B, 0x97E3, 0x693C,
06556     0x97E4, 0x693E, 0x97E5, 0x6940, 0x97E6, 0x6941, 0x97E7, 0x6943,
06557     0x97E8, 0x6944, 0x97E9, 0x6945, 0x97EA, 0x6946, 0x97EB, 0x6947,
06558     0x97EC, 0x6948, 0x97ED, 0x6949, 0x97EE, 0x694A, 0x97EF, 0x694B,
06559     0x97F0, 0x694C, 0x97F1, 0x694D, 0x97F2, 0x694E, 0x97F3, 0x694F,
06560     0x97F4, 0x6950, 0x97F5, 0x6951, 0x97F6, 0x6952, 0x97F7, 0x6953,
06561     0x97F8, 0x6955, 0x97F9, 0x6956, 0x97FA, 0x6958, 0x97FB, 0x6959,
06562     0x97FC, 0x695B, 0x97FD, 0x695C, 0x97FE, 0x695F, 0x9840, 0x6961,
06563     0x9841, 0x6962, 0x9842, 0x6964, 0x9843, 0x6965, 0x9844, 0x6967,
06564     0x9845, 0x6968, 0x9846, 0x6969, 0x9847, 0x696A, 0x9848, 0x696C,
06565     0x9849, 0x696D, 0x984A, 0x696F, 0x984B, 0x6970, 0x984C, 0x6972,
06566     0x984D, 0x6973, 0x984E, 0x6974, 0x984F, 0x6975, 0x9850, 0x6976,
06567     0x9851, 0x697A, 0x9852, 0x697B, 0x9853, 0x697D, 0x9854, 0x697E,
06568     0x9855, 0x697F, 0x9856, 0x6981, 0x9857, 0x6983, 0x9858, 0x6985,
06569     0x9859, 0x698A, 0x985A, 0x698B, 0x985B, 0x698C, 0x985C, 0x698E,
06570     0x985D, 0x698F, 0x985E, 0x6990, 0x985F, 0x6991, 0x9860, 0x6992,
06571     0x9861, 0x6993, 0x9862, 0x6996, 0x9863, 0x6997, 0x9864, 0x6999,
06572     0x9865, 0x699A, 0x9866, 0x699D, 0x9867, 0x699E, 0x9868, 0x699F,
06573     0x9869, 0x69A0, 0x986A, 0x69A1, 0x986B, 0x69A2, 0x986C, 0x69A3,
06574     0x986D, 0x69A4, 0x986E, 0x69A5, 0x986F, 0x69A6, 0x9870, 0x69A9,
06575     0x9871, 0x69AA, 0x9872, 0x69AC, 0x9873, 0x69AE, 0x9874, 0x69AF,
06576     0x9875, 0x69B0, 0x9876, 0x69B2, 0x9877, 0x69B3, 0x9878, 0x69B5,
06577     0x9879, 0x69B6, 0x987A, 0x69B8, 0x987B, 0x69B9, 0x987C, 0x69BA,
06578     0x987D, 0x69BC, 0x987E, 0x69BD, 0x9880, 0x69BE, 0x9881, 0x69BF,
06579     0x9882, 0x69C0, 0x9883, 0x69C2, 0x9884, 0x69C3, 0x9885, 0x69C4,
06580     0x9886, 0x69C5, 0x9887, 0x69C6, 0x9888, 0x69C7, 0x9889, 0x69C8,
06581     0x988A, 0x69C9, 0x988B, 0x69CB, 0x988C, 0x69CD, 0x988D, 0x69CF,
06582     0x988E, 0x69D1, 0x988F, 0x69D2, 0x9890, 0x69D3, 0x9891, 0x69D5,
06583     0x9892, 0x69D6, 0x9893, 0x69D7, 0x9894, 0x69D8, 0x9895, 0x69D9,
06584     0x9896, 0x69DA, 0x9897, 0x69DC, 0x9898, 0x69DD, 0x9899, 0x69DE,
06585     0x989A, 0x69E1, 0x989B, 0x69E2, 0x989C, 0x69E3, 0x989D, 0x69E4,
06586     0x989E, 0x69E5, 0x989F, 0x69E6, 0x98A0, 0x69E7, 0x98A1, 0x69E8,
06587     0x98A2, 0x69E9, 0x98A3, 0x69EA, 0x98A4, 0x69EB, 0x98A5, 0x69EC,
06588     0x98A6, 0x69EE, 0x98A7, 0x69EF, 0x98A8, 0x69F0, 0x98A9, 0x69F1,
06589     0x98AA, 0x69F3, 0x98AB, 0x69F4, 0x98AC, 0x69F5, 0x98AD, 0x69F6,
06590     0x98AE, 0x69F7, 0x98AF, 0x69F8, 0x98B0, 0x69F9, 0x98B1, 0x69FA,
06591     0x98B2, 0x69FB, 0x98B3, 0x69FC, 0x98B4, 0x69FE, 0x98B5, 0x6A00,
06592     0x98B6, 0x6A01, 0x98B7, 0x6A02, 0x98B8, 0x6A03, 0x98B9, 0x6A04,
06593     0x98BA, 0x6A05, 0x98BB, 0x6A06, 0x98BC, 0x6A07, 0x98BD, 0x6A08,
06594     0x98BE, 0x6A09, 0x98BF, 0x6A0B, 0x98C0, 0x6A0C, 0x98C1, 0x6A0D,
06595     0x98C2, 0x6A0E, 0x98C3, 0x6A0F, 0x98C4, 0x6A10, 0x98C5, 0x6A11,
06596     0x98C6, 0x6A12, 0x98C7, 0x6A13, 0x98C8, 0x6A14, 0x98C9, 0x6A15,
06597     0x98CA, 0x6A16, 0x98CB, 0x6A19, 0x98CC, 0x6A1A, 0x98CD, 0x6A1B,
06598     0x98CE, 0x6A1C, 0x98CF, 0x6A1D, 0x98D0, 0x6A1E, 0x98D1, 0x6A20,
06599     0x98D2, 0x6A22, 0x98D3, 0x6A23, 0x98D4, 0x6A24, 0x98D5, 0x6A25,
06600     0x98D6, 0x6A26, 0x98D7, 0x6A27, 0x98D8, 0x6A29, 0x98D9, 0x6A2B,
06601     0x98DA, 0x6A2C, 0x98DB, 0x6A2D, 0x98DC, 0x6A2E, 0x98DD, 0x6A30,
06602     0x98DE, 0x6A32, 0x98DF, 0x6A33, 0x98E0, 0x6A34, 0x98E1, 0x6A36,
06603     0x98E2, 0x6A37, 0x98E3, 0x6A38, 0x98E4, 0x6A39, 0x98E5, 0x6A3A,
06604     0x98E6, 0x6A3B, 0x98E7, 0x6A3C, 0x98E8, 0x6A3F, 0x98E9, 0x6A40,
06605     0x98EA, 0x6A41, 0x98EB, 0x6A42, 0x98EC, 0x6A43, 0x98ED, 0x6A45,
06606     0x98EE, 0x6A46, 0x98EF, 0x6A48, 0x98F0, 0x6A49, 0x98F1, 0x6A4A,
06607     0x98F2, 0x6A4B, 0x98F3, 0x6A4C, 0x98F4, 0x6A4D, 0x98F5, 0x6A4E,
06608     0x98F6, 0x6A4F, 0x98F7, 0x6A51, 0x98F8, 0x6A52, 0x98F9, 0x6A53,
06609     0x98FA, 0x6A54, 0x98FB, 0x6A55, 0x98FC, 0x6A56, 0x98FD, 0x6A57,
06610     0x98FE, 0x6A5A, 0x9940, 0x6A5C, 0x9941, 0x6A5D, 0x9942, 0x6A5E,
06611     0x9943, 0x6A5F, 0x9944, 0x6A60, 0x9945, 0x6A62, 0x9946, 0x6A63,
06612     0x9947, 0x6A64, 0x9948, 0x6A66, 0x9949, 0x6A67, 0x994A, 0x6A68,
06613     0x994B, 0x6A69, 0x994C, 0x6A6A, 0x994D, 0x6A6B, 0x994E, 0x6A6C,
06614     0x994F, 0x6A6D, 0x9950, 0x6A6E, 0x9951, 0x6A6F, 0x9952, 0x6A70,
06615     0x9953, 0x6A72, 0x9954, 0x6A73, 0x9955, 0x6A74, 0x9956, 0x6A75,
06616     0x9957, 0x6A76, 0x9958, 0x6A77, 0x9959, 0x6A78, 0x995A, 0x6A7A,
06617     0x995B, 0x6A7B, 0x995C, 0x6A7D, 0x995D, 0x6A7E, 0x995E, 0x6A7F,
06618     0x995F, 0x6A81, 0x9960, 0x6A82, 0x9961, 0x6A83, 0x9962, 0x6A85,
06619     0x9963, 0x6A86, 0x9964, 0x6A87, 0x9965, 0x6A88, 0x9966, 0x6A89,
06620     0x9967, 0x6A8A, 0x9968, 0x6A8B, 0x9969, 0x6A8C, 0x996A, 0x6A8D,
06621     0x996B, 0x6A8F, 0x996C, 0x6A92, 0x996D, 0x6A93, 0x996E, 0x6A94,
06622     0x996F, 0x6A95, 0x9970, 0x6A96, 0x9971, 0x6A98, 0x9972, 0x6A99,
06623     0x9973, 0x6A9A, 0x9974, 0x6A9B, 0x9975, 0x6A9C, 0x9976, 0x6A9D,
06624     0x9977, 0x6A9E, 0x9978, 0x6A9F, 0x9979, 0x6AA1, 0x997A, 0x6AA2,
06625     0x997B, 0x6AA3, 0x997C, 0x6AA4, 0x997D, 0x6AA5, 0x997E, 0x6AA6,
06626     0x9980, 0x6AA7, 0x9981, 0x6AA8, 0x9982, 0x6AAA, 0x9983, 0x6AAD,
06627     0x9984, 0x6AAE, 0x9985, 0x6AAF, 0x9986, 0x6AB0, 0x9987, 0x6AB1,
06628     0x9988, 0x6AB2, 0x9989, 0x6AB3, 0x998A, 0x6AB4, 0x998B, 0x6AB5,
06629     0x998C, 0x6AB6, 0x998D, 0x6AB7, 0x998E, 0x6AB8, 0x998F, 0x6AB9,
06630     0x9990, 0x6ABA, 0x9991, 0x6ABB, 0x9992, 0x6ABC, 0x9993, 0x6ABD,
06631     0x9994, 0x6ABE, 0x9995, 0x6ABF, 0x9996, 0x6AC0, 0x9997, 0x6AC1,
06632     0x9998, 0x6AC2, 0x9999, 0x6AC3, 0x999A, 0x6AC4, 0x999B, 0x6AC5,
06633     0x999C, 0x6AC6, 0x999D, 0x6AC7, 0x999E, 0x6AC8, 0x999F, 0x6AC9,
06634     0x99A0, 0x6ACA, 0x99A1, 0x6ACB, 0x99A2, 0x6ACC, 0x99A3, 0x6ACD,
06635     0x99A4, 0x6ACE, 0x99A5, 0x6ACF, 0x99A6, 0x6AD0, 0x99A7, 0x6AD1,
06636     0x99A8, 0x6AD2, 0x99A9, 0x6AD3, 0x99AA, 0x6AD4, 0x99AB, 0x6AD5,
06637     0x99AC, 0x6AD6, 0x99AD, 0x6AD7, 0x99AE, 0x6AD8, 0x99AF, 0x6AD9,
06638     0x99B0, 0x6ADA, 0x99B1, 0x6ADB, 0x99B2, 0x6ADC, 0x99B3, 0x6ADD,
06639     0x99B4, 0x6ADE, 0x99B5, 0x6ADF, 0x99B6, 0x6AE0, 0x99B7, 0x6AE1,
06640     0x99B8, 0x6AE2, 0x99B9, 0x6AE3, 0x99BA, 0x6AE4, 0x99BB, 0x6AE5,
06641     0x99BC, 0x6AE6, 0x99BD, 0x6AE7, 0x99BE, 0x6AE8, 0x99BF, 0x6AE9,
06642     0x99C0, 0x6AEA, 0x99C1, 0x6AEB, 0x99C2, 0x6AEC, 0x99C3, 0x6AED,
06643     0x99C4, 0x6AEE, 0x99C5, 0x6AEF, 0x99C6, 0x6AF0, 0x99C7, 0x6AF1,
06644     0x99C8, 0x6AF2, 0x99C9, 0x6AF3, 0x99CA, 0x6AF4, 0x99CB, 0x6AF5,
06645     0x99CC, 0x6AF6, 0x99CD, 0x6AF7, 0x99CE, 0x6AF8, 0x99CF, 0x6AF9,
06646     0x99D0, 0x6AFA, 0x99D1, 0x6AFB, 0x99D2, 0x6AFC, 0x99D3, 0x6AFD,
06647     0x99D4, 0x6AFE, 0x99D5, 0x6AFF, 0x99D6, 0x6B00, 0x99D7, 0x6B01,
06648     0x99D8, 0x6B02, 0x99D9, 0x6B03, 0x99DA, 0x6B04, 0x99DB, 0x6B05,
06649     0x99DC, 0x6B06, 0x99DD, 0x6B07, 0x99DE, 0x6B08, 0x99DF, 0x6B09,
06650     0x99E0, 0x6B0A, 0x99E1, 0x6B0B, 0x99E2, 0x6B0C, 0x99E3, 0x6B0D,
06651     0x99E4, 0x6B0E, 0x99E5, 0x6B0F, 0x99E6, 0x6B10, 0x99E7, 0x6B11,
06652     0x99E8, 0x6B12, 0x99E9, 0x6B13, 0x99EA, 0x6B14, 0x99EB, 0x6B15,
06653     0x99EC, 0x6B16, 0x99ED, 0x6B17, 0x99EE, 0x6B18, 0x99EF, 0x6B19,
06654     0x99F0, 0x6B1A, 0x99F1, 0x6B1B, 0x99F2, 0x6B1C, 0x99F3, 0x6B1D,
06655     0x99F4, 0x6B1E, 0x99F5, 0x6B1F, 0x99F6, 0x6B25, 0x99F7, 0x6B26,
06656     0x99F8, 0x6B28, 0x99F9, 0x6B29, 0x99FA, 0x6B2A, 0x99FB, 0x6B2B,
06657     0x99FC, 0x6B2C, 0x99FD, 0x6B2D, 0x99FE, 0x6B2E, 0x9A40, 0x6B2F,
06658     0x9A41, 0x6B30, 0x9A42, 0x6B31, 0x9A43, 0x6B33, 0x9A44, 0x6B34,
06659     0x9A45, 0x6B35, 0x9A46, 0x6B36, 0x9A47, 0x6B38, 0x9A48, 0x6B3B,
06660     0x9A49, 0x6B3C, 0x9A4A, 0x6B3D, 0x9A4B, 0x6B3F, 0x9A4C, 0x6B40,
06661     0x9A4D, 0x6B41, 0x9A4E, 0x6B42, 0x9A4F, 0x6B44, 0x9A50, 0x6B45,
06662     0x9A51, 0x6B48, 0x9A52, 0x6B4A, 0x9A53, 0x6B4B, 0x9A54, 0x6B4D,
06663     0x9A55, 0x6B4E, 0x9A56, 0x6B4F, 0x9A57, 0x6B50, 0x9A58, 0x6B51,
06664     0x9A59, 0x6B52, 0x9A5A, 0x6B53, 0x9A5B, 0x6B54, 0x9A5C, 0x6B55,
06665     0x9A5D, 0x6B56, 0x9A5E, 0x6B57, 0x9A5F, 0x6B58, 0x9A60, 0x6B5A,
06666     0x9A61, 0x6B5B, 0x9A62, 0x6B5C, 0x9A63, 0x6B5D, 0x9A64, 0x6B5E,
06667     0x9A65, 0x6B5F, 0x9A66, 0x6B60, 0x9A67, 0x6B61, 0x9A68, 0x6B68,
06668     0x9A69, 0x6B69, 0x9A6A, 0x6B6B, 0x9A6B, 0x6B6C, 0x9A6C, 0x6B6D,
06669     0x9A6D, 0x6B6E, 0x9A6E, 0x6B6F, 0x9A6F, 0x6B70, 0x9A70, 0x6B71,
06670     0x9A71, 0x6B72, 0x9A72, 0x6B73, 0x9A73, 0x6B74, 0x9A74, 0x6B75,
06671     0x9A75, 0x6B76, 0x9A76, 0x6B77, 0x9A77, 0x6B78, 0x9A78, 0x6B7A,
06672     0x9A79, 0x6B7D, 0x9A7A, 0x6B7E, 0x9A7B, 0x6B7F, 0x9A7C, 0x6B80,
06673     0x9A7D, 0x6B85, 0x9A7E, 0x6B88, 0x9A80, 0x6B8C, 0x9A81, 0x6B8E,
06674     0x9A82, 0x6B8F, 0x9A83, 0x6B90, 0x9A84, 0x6B91, 0x9A85, 0x6B94,
06675     0x9A86, 0x6B95, 0x9A87, 0x6B97, 0x9A88, 0x6B98, 0x9A89, 0x6B99,
06676     0x9A8A, 0x6B9C, 0x9A8B, 0x6B9D, 0x9A8C, 0x6B9E, 0x9A8D, 0x6B9F,
06677     0x9A8E, 0x6BA0, 0x9A8F, 0x6BA2, 0x9A90, 0x6BA3, 0x9A91, 0x6BA4,
06678     0x9A92, 0x6BA5, 0x9A93, 0x6BA6, 0x9A94, 0x6BA7, 0x9A95, 0x6BA8,
06679     0x9A96, 0x6BA9, 0x9A97, 0x6BAB, 0x9A98, 0x6BAC, 0x9A99, 0x6BAD,
06680     0x9A9A, 0x6BAE, 0x9A9B, 0x6BAF, 0x9A9C, 0x6BB0, 0x9A9D, 0x6BB1,
06681     0x9A9E, 0x6BB2, 0x9A9F, 0x6BB6, 0x9AA0, 0x6BB8, 0x9AA1, 0x6BB9,
06682     0x9AA2, 0x6BBA, 0x9AA3, 0x6BBB, 0x9AA4, 0x6BBC, 0x9AA5, 0x6BBD,
06683     0x9AA6, 0x6BBE, 0x9AA7, 0x6BC0, 0x9AA8, 0x6BC3, 0x9AA9, 0x6BC4,
06684     0x9AAA, 0x6BC6, 0x9AAB, 0x6BC7, 0x9AAC, 0x6BC8, 0x9AAD, 0x6BC9,
06685     0x9AAE, 0x6BCA, 0x9AAF, 0x6BCC, 0x9AB0, 0x6BCE, 0x9AB1, 0x6BD0,
06686     0x9AB2, 0x6BD1, 0x9AB3, 0x6BD8, 0x9AB4, 0x6BDA, 0x9AB5, 0x6BDC,
06687     0x9AB6, 0x6BDD, 0x9AB7, 0x6BDE, 0x9AB8, 0x6BDF, 0x9AB9, 0x6BE0,
06688     0x9ABA, 0x6BE2, 0x9ABB, 0x6BE3, 0x9ABC, 0x6BE4, 0x9ABD, 0x6BE5,
06689     0x9ABE, 0x6BE6, 0x9ABF, 0x6BE7, 0x9AC0, 0x6BE8, 0x9AC1, 0x6BE9,
06690     0x9AC2, 0x6BEC, 0x9AC3, 0x6BED, 0x9AC4, 0x6BEE, 0x9AC5, 0x6BF0,
06691     0x9AC6, 0x6BF1, 0x9AC7, 0x6BF2, 0x9AC8, 0x6BF4, 0x9AC9, 0x6BF6,
06692     0x9ACA, 0x6BF7, 0x9ACB, 0x6BF8, 0x9ACC, 0x6BFA, 0x9ACD, 0x6BFB,
06693     0x9ACE, 0x6BFC, 0x9ACF, 0x6BFE, 0x9AD0, 0x6BFF, 0x9AD1, 0x6C00,
06694     0x9AD2, 0x6C01, 0x9AD3, 0x6C02, 0x9AD4, 0x6C03, 0x9AD5, 0x6C04,
06695     0x9AD6, 0x6C08, 0x9AD7, 0x6C09, 0x9AD8, 0x6C0A, 0x9AD9, 0x6C0B,
06696     0x9ADA, 0x6C0C, 0x9ADB, 0x6C0E, 0x9ADC, 0x6C12, 0x9ADD, 0x6C17,
06697     0x9ADE, 0x6C1C, 0x9ADF, 0x6C1D, 0x9AE0, 0x6C1E, 0x9AE1, 0x6C20,
06698     0x9AE2, 0x6C23, 0x9AE3, 0x6C25, 0x9AE4, 0x6C2B, 0x9AE5, 0x6C2C,
06699     0x9AE6, 0x6C2D, 0x9AE7, 0x6C31, 0x9AE8, 0x6C33, 0x9AE9, 0x6C36,
06700     0x9AEA, 0x6C37, 0x9AEB, 0x6C39, 0x9AEC, 0x6C3A, 0x9AED, 0x6C3B,
06701     0x9AEE, 0x6C3C, 0x9AEF, 0x6C3E, 0x9AF0, 0x6C3F, 0x9AF1, 0x6C43,
06702     0x9AF2, 0x6C44, 0x9AF3, 0x6C45, 0x9AF4, 0x6C48, 0x9AF5, 0x6C4B,
06703     0x9AF6, 0x6C4C, 0x9AF7, 0x6C4D, 0x9AF8, 0x6C4E, 0x9AF9, 0x6C4F,
06704     0x9AFA, 0x6C51, 0x9AFB, 0x6C52, 0x9AFC, 0x6C53, 0x9AFD, 0x6C56,
06705     0x9AFE, 0x6C58, 0x9B40, 0x6C59, 0x9B41, 0x6C5A, 0x9B42, 0x6C62,
06706     0x9B43, 0x6C63, 0x9B44, 0x6C65, 0x9B45, 0x6C66, 0x9B46, 0x6C67,
06707     0x9B47, 0x6C6B, 0x9B48, 0x6C6C, 0x9B49, 0x6C6D, 0x9B4A, 0x6C6E,
06708     0x9B4B, 0x6C6F, 0x9B4C, 0x6C71, 0x9B4D, 0x6C73, 0x9B4E, 0x6C75,
06709     0x9B4F, 0x6C77, 0x9B50, 0x6C78, 0x9B51, 0x6C7A, 0x9B52, 0x6C7B,
06710     0x9B53, 0x6C7C, 0x9B54, 0x6C7F, 0x9B55, 0x6C80, 0x9B56, 0x6C84,
06711     0x9B57, 0x6C87, 0x9B58, 0x6C8A, 0x9B59, 0x6C8B, 0x9B5A, 0x6C8D,
06712     0x9B5B, 0x6C8E, 0x9B5C, 0x6C91, 0x9B5D, 0x6C92, 0x9B5E, 0x6C95,
06713     0x9B5F, 0x6C96, 0x9B60, 0x6C97, 0x9B61, 0x6C98, 0x9B62, 0x6C9A,
06714     0x9B63, 0x6C9C, 0x9B64, 0x6C9D, 0x9B65, 0x6C9E, 0x9B66, 0x6CA0,
06715     0x9B67, 0x6CA2, 0x9B68, 0x6CA8, 0x9B69, 0x6CAC, 0x9B6A, 0x6CAF,
06716     0x9B6B, 0x6CB0, 0x9B6C, 0x6CB4, 0x9B6D, 0x6CB5, 0x9B6E, 0x6CB6,
06717     0x9B6F, 0x6CB7, 0x9B70, 0x6CBA, 0x9B71, 0x6CC0, 0x9B72, 0x6CC1,
06718     0x9B73, 0x6CC2, 0x9B74, 0x6CC3, 0x9B75, 0x6CC6, 0x9B76, 0x6CC7,
06719     0x9B77, 0x6CC8, 0x9B78, 0x6CCB, 0x9B79, 0x6CCD, 0x9B7A, 0x6CCE,
06720     0x9B7B, 0x6CCF, 0x9B7C, 0x6CD1, 0x9B7D, 0x6CD2, 0x9B7E, 0x6CD8,
06721     0x9B80, 0x6CD9, 0x9B81, 0x6CDA, 0x9B82, 0x6CDC, 0x9B83, 0x6CDD,
06722     0x9B84, 0x6CDF, 0x9B85, 0x6CE4, 0x9B86, 0x6CE6, 0x9B87, 0x6CE7,
06723     0x9B88, 0x6CE9, 0x9B89, 0x6CEC, 0x9B8A, 0x6CED, 0x9B8B, 0x6CF2,
06724     0x9B8C, 0x6CF4, 0x9B8D, 0x6CF9, 0x9B8E, 0x6CFF, 0x9B8F, 0x6D00,
06725     0x9B90, 0x6D02, 0x9B91, 0x6D03, 0x9B92, 0x6D05, 0x9B93, 0x6D06,
06726     0x9B94, 0x6D08, 0x9B95, 0x6D09, 0x9B96, 0x6D0A, 0x9B97, 0x6D0D,
06727     0x9B98, 0x6D0F, 0x9B99, 0x6D10, 0x9B9A, 0x6D11, 0x9B9B, 0x6D13,
06728     0x9B9C, 0x6D14, 0x9B9D, 0x6D15, 0x9B9E, 0x6D16, 0x9B9F, 0x6D18,
06729     0x9BA0, 0x6D1C, 0x9BA1, 0x6D1D, 0x9BA2, 0x6D1F, 0x9BA3, 0x6D20,
06730     0x9BA4, 0x6D21, 0x9BA5, 0x6D22, 0x9BA6, 0x6D23, 0x9BA7, 0x6D24,
06731     0x9BA8, 0x6D26, 0x9BA9, 0x6D28, 0x9BAA, 0x6D29, 0x9BAB, 0x6D2C,
06732     0x9BAC, 0x6D2D, 0x9BAD, 0x6D2F, 0x9BAE, 0x6D30, 0x9BAF, 0x6D34,
06733     0x9BB0, 0x6D36, 0x9BB1, 0x6D37, 0x9BB2, 0x6D38, 0x9BB3, 0x6D3A,
06734     0x9BB4, 0x6D3F, 0x9BB5, 0x6D40, 0x9BB6, 0x6D42, 0x9BB7, 0x6D44,
06735     0x9BB8, 0x6D49, 0x9BB9, 0x6D4C, 0x9BBA, 0x6D50, 0x9BBB, 0x6D55,
06736     0x9BBC, 0x6D56, 0x9BBD, 0x6D57, 0x9BBE, 0x6D58, 0x9BBF, 0x6D5B,
06737     0x9BC0, 0x6D5D, 0x9BC1, 0x6D5F, 0x9BC2, 0x6D61, 0x9BC3, 0x6D62,
06738     0x9BC4, 0x6D64, 0x9BC5, 0x6D65, 0x9BC6, 0x6D67, 0x9BC7, 0x6D68,
06739     0x9BC8, 0x6D6B, 0x9BC9, 0x6D6C, 0x9BCA, 0x6D6D, 0x9BCB, 0x6D70,
06740     0x9BCC, 0x6D71, 0x9BCD, 0x6D72, 0x9BCE, 0x6D73, 0x9BCF, 0x6D75,
06741     0x9BD0, 0x6D76, 0x9BD1, 0x6D79, 0x9BD2, 0x6D7A, 0x9BD3, 0x6D7B,
06742     0x9BD4, 0x6D7D, 0x9BD5, 0x6D7E, 0x9BD6, 0x6D7F, 0x9BD7, 0x6D80,
06743     0x9BD8, 0x6D81, 0x9BD9, 0x6D83, 0x9BDA, 0x6D84, 0x9BDB, 0x6D86,
06744     0x9BDC, 0x6D87, 0x9BDD, 0x6D8A, 0x9BDE, 0x6D8B, 0x9BDF, 0x6D8D,
06745     0x9BE0, 0x6D8F, 0x9BE1, 0x6D90, 0x9BE2, 0x6D92, 0x9BE3, 0x6D96,
06746     0x9BE4, 0x6D97, 0x9BE5, 0x6D98, 0x9BE6, 0x6D99, 0x9BE7, 0x6D9A,
06747     0x9BE8, 0x6D9C, 0x9BE9, 0x6DA2, 0x9BEA, 0x6DA5, 0x9BEB, 0x6DAC,
06748     0x9BEC, 0x6DAD, 0x9BED, 0x6DB0, 0x9BEE, 0x6DB1, 0x9BEF, 0x6DB3,
06749     0x9BF0, 0x6DB4, 0x9BF1, 0x6DB6, 0x9BF2, 0x6DB7, 0x9BF3, 0x6DB9,
06750     0x9BF4, 0x6DBA, 0x9BF5, 0x6DBB, 0x9BF6, 0x6DBC, 0x9BF7, 0x6DBD,
06751     0x9BF8, 0x6DBE, 0x9BF9, 0x6DC1, 0x9BFA, 0x6DC2, 0x9BFB, 0x6DC3,
06752     0x9BFC, 0x6DC8, 0x9BFD, 0x6DC9, 0x9BFE, 0x6DCA, 0x9C40, 0x6DCD,
06753     0x9C41, 0x6DCE, 0x9C42, 0x6DCF, 0x9C43, 0x6DD0, 0x9C44, 0x6DD2,
06754     0x9C45, 0x6DD3, 0x9C46, 0x6DD4, 0x9C47, 0x6DD5, 0x9C48, 0x6DD7,
06755     0x9C49, 0x6DDA, 0x9C4A, 0x6DDB, 0x9C4B, 0x6DDC, 0x9C4C, 0x6DDF,
06756     0x9C4D, 0x6DE2, 0x9C4E, 0x6DE3, 0x9C4F, 0x6DE5, 0x9C50, 0x6DE7,
06757     0x9C51, 0x6DE8, 0x9C52, 0x6DE9, 0x9C53, 0x6DEA, 0x9C54, 0x6DED,
06758     0x9C55, 0x6DEF, 0x9C56, 0x6DF0, 0x9C57, 0x6DF2, 0x9C58, 0x6DF4,
06759     0x9C59, 0x6DF5, 0x9C5A, 0x6DF6, 0x9C5B, 0x6DF8, 0x9C5C, 0x6DFA,
06760     0x9C5D, 0x6DFD, 0x9C5E, 0x6DFE, 0x9C5F, 0x6DFF, 0x9C60, 0x6E00,
06761     0x9C61, 0x6E01, 0x9C62, 0x6E02, 0x9C63, 0x6E03, 0x9C64, 0x6E04,
06762     0x9C65, 0x6E06, 0x9C66, 0x6E07, 0x9C67, 0x6E08, 0x9C68, 0x6E09,
06763     0x9C69, 0x6E0B, 0x9C6A, 0x6E0F, 0x9C6B, 0x6E12, 0x9C6C, 0x6E13,
06764     0x9C6D, 0x6E15, 0x9C6E, 0x6E18, 0x9C6F, 0x6E19, 0x9C70, 0x6E1B,
06765     0x9C71, 0x6E1C, 0x9C72, 0x6E1E, 0x9C73, 0x6E1F, 0x9C74, 0x6E22,
06766     0x9C75, 0x6E26, 0x9C76, 0x6E27, 0x9C77, 0x6E28, 0x9C78, 0x6E2A,
06767     0x9C79, 0x6E2C, 0x9C7A, 0x6E2E, 0x9C7B, 0x6E30, 0x9C7C, 0x6E31,
06768     0x9C7D, 0x6E33, 0x9C7E, 0x6E35, 0x9C80, 0x6E36, 0x9C81, 0x6E37,
06769     0x9C82, 0x6E39, 0x9C83, 0x6E3B, 0x9C84, 0x6E3C, 0x9C85, 0x6E3D,
06770     0x9C86, 0x6E3E, 0x9C87, 0x6E3F, 0x9C88, 0x6E40, 0x9C89, 0x6E41,
06771     0x9C8A, 0x6E42, 0x9C8B, 0x6E45, 0x9C8C, 0x6E46, 0x9C8D, 0x6E47,
06772     0x9C8E, 0x6E48, 0x9C8F, 0x6E49, 0x9C90, 0x6E4A, 0x9C91, 0x6E4B,
06773     0x9C92, 0x6E4C, 0x9C93, 0x6E4F, 0x9C94, 0x6E50, 0x9C95, 0x6E51,
06774     0x9C96, 0x6E52, 0x9C97, 0x6E55, 0x9C98, 0x6E57, 0x9C99, 0x6E59,
06775     0x9C9A, 0x6E5A, 0x9C9B, 0x6E5C, 0x9C9C, 0x6E5D, 0x9C9D, 0x6E5E,
06776     0x9C9E, 0x6E60, 0x9C9F, 0x6E61, 0x9CA0, 0x6E62, 0x9CA1, 0x6E63,
06777     0x9CA2, 0x6E64, 0x9CA3, 0x6E65, 0x9CA4, 0x6E66, 0x9CA5, 0x6E67,
06778     0x9CA6, 0x6E68, 0x9CA7, 0x6E69, 0x9CA8, 0x6E6A, 0x9CA9, 0x6E6C,
06779     0x9CAA, 0x6E6D, 0x9CAB, 0x6E6F, 0x9CAC, 0x6E70, 0x9CAD, 0x6E71,
06780     0x9CAE, 0x6E72, 0x9CAF, 0x6E73, 0x9CB0, 0x6E74, 0x9CB1, 0x6E75,
06781     0x9CB2, 0x6E76, 0x9CB3, 0x6E77, 0x9CB4, 0x6E78, 0x9CB5, 0x6E79,
06782     0x9CB6, 0x6E7A, 0x9CB7, 0x6E7B, 0x9CB8, 0x6E7C, 0x9CB9, 0x6E7D,
06783     0x9CBA, 0x6E80, 0x9CBB, 0x6E81, 0x9CBC, 0x6E82, 0x9CBD, 0x6E84,
06784     0x9CBE, 0x6E87, 0x9CBF, 0x6E88, 0x9CC0, 0x6E8A, 0x9CC1, 0x6E8B,
06785     0x9CC2, 0x6E8C, 0x9CC3, 0x6E8D, 0x9CC4, 0x6E8E, 0x9CC5, 0x6E91,
06786     0x9CC6, 0x6E92, 0x9CC7, 0x6E93, 0x9CC8, 0x6E94, 0x9CC9, 0x6E95,
06787     0x9CCA, 0x6E96, 0x9CCB, 0x6E97, 0x9CCC, 0x6E99, 0x9CCD, 0x6E9A,
06788     0x9CCE, 0x6E9B, 0x9CCF, 0x6E9D, 0x9CD0, 0x6E9E, 0x9CD1, 0x6EA0,
06789     0x9CD2, 0x6EA1, 0x9CD3, 0x6EA3, 0x9CD4, 0x6EA4, 0x9CD5, 0x6EA6,
06790     0x9CD6, 0x6EA8, 0x9CD7, 0x6EA9, 0x9CD8, 0x6EAB, 0x9CD9, 0x6EAC,
06791     0x9CDA, 0x6EAD, 0x9CDB, 0x6EAE, 0x9CDC, 0x6EB0, 0x9CDD, 0x6EB3,
06792     0x9CDE, 0x6EB5, 0x9CDF, 0x6EB8, 0x9CE0, 0x6EB9, 0x9CE1, 0x6EBC,
06793     0x9CE2, 0x6EBE, 0x9CE3, 0x6EBF, 0x9CE4, 0x6EC0, 0x9CE5, 0x6EC3,
06794     0x9CE6, 0x6EC4, 0x9CE7, 0x6EC5, 0x9CE8, 0x6EC6, 0x9CE9, 0x6EC8,
06795     0x9CEA, 0x6EC9, 0x9CEB, 0x6ECA, 0x9CEC, 0x6ECC, 0x9CED, 0x6ECD,
06796     0x9CEE, 0x6ECE, 0x9CEF, 0x6ED0, 0x9CF0, 0x6ED2, 0x9CF1, 0x6ED6,
06797     0x9CF2, 0x6ED8, 0x9CF3, 0x6ED9, 0x9CF4, 0x6EDB, 0x9CF5, 0x6EDC,
06798     0x9CF6, 0x6EDD, 0x9CF7, 0x6EE3, 0x9CF8, 0x6EE7, 0x9CF9, 0x6EEA,
06799     0x9CFA, 0x6EEB, 0x9CFB, 0x6EEC, 0x9CFC, 0x6EED, 0x9CFD, 0x6EEE,
06800     0x9CFE, 0x6EEF, 0x9D40, 0x6EF0, 0x9D41, 0x6EF1, 0x9D42, 0x6EF2,
06801     0x9D43, 0x6EF3, 0x9D44, 0x6EF5, 0x9D45, 0x6EF6, 0x9D46, 0x6EF7,
06802     0x9D47, 0x6EF8, 0x9D48, 0x6EFA, 0x9D49, 0x6EFB, 0x9D4A, 0x6EFC,
06803     0x9D4B, 0x6EFD, 0x9D4C, 0x6EFE, 0x9D4D, 0x6EFF, 0x9D4E, 0x6F00,
06804     0x9D4F, 0x6F01, 0x9D50, 0x6F03, 0x9D51, 0x6F04, 0x9D52, 0x6F05,
06805     0x9D53, 0x6F07, 0x9D54, 0x6F08, 0x9D55, 0x6F0A, 0x9D56, 0x6F0B,
06806     0x9D57, 0x6F0C, 0x9D58, 0x6F0D, 0x9D59, 0x6F0E, 0x9D5A, 0x6F10,
06807     0x9D5B, 0x6F11, 0x9D5C, 0x6F12, 0x9D5D, 0x6F16, 0x9D5E, 0x6F17,
06808     0x9D5F, 0x6F18, 0x9D60, 0x6F19, 0x9D61, 0x6F1A, 0x9D62, 0x6F1B,
06809     0x9D63, 0x6F1C, 0x9D64, 0x6F1D, 0x9D65, 0x6F1E, 0x9D66, 0x6F1F,
06810     0x9D67, 0x6F21, 0x9D68, 0x6F22, 0x9D69, 0x6F23, 0x9D6A, 0x6F25,
06811     0x9D6B, 0x6F26, 0x9D6C, 0x6F27, 0x9D6D, 0x6F28, 0x9D6E, 0x6F2C,
06812     0x9D6F, 0x6F2E, 0x9D70, 0x6F30, 0x9D71, 0x6F32, 0x9D72, 0x6F34,
06813     0x9D73, 0x6F35, 0x9D74, 0x6F37, 0x9D75, 0x6F38, 0x9D76, 0x6F39,
06814     0x9D77, 0x6F3A, 0x9D78, 0x6F3B, 0x9D79, 0x6F3C, 0x9D7A, 0x6F3D,
06815     0x9D7B, 0x6F3F, 0x9D7C, 0x6F40, 0x9D7D, 0x6F41, 0x9D7E, 0x6F42,
06816     0x9D80, 0x6F43, 0x9D81, 0x6F44, 0x9D82, 0x6F45, 0x9D83, 0x6F48,
06817     0x9D84, 0x6F49, 0x9D85, 0x6F4A, 0x9D86, 0x6F4C, 0x9D87, 0x6F4E,
06818     0x9D88, 0x6F4F, 0x9D89, 0x6F50, 0x9D8A, 0x6F51, 0x9D8B, 0x6F52,
06819     0x9D8C, 0x6F53, 0x9D8D, 0x6F54, 0x9D8E, 0x6F55, 0x9D8F, 0x6F56,
06820     0x9D90, 0x6F57, 0x9D91, 0x6F59, 0x9D92, 0x6F5A, 0x9D93, 0x6F5B,
06821     0x9D94, 0x6F5D, 0x9D95, 0x6F5F, 0x9D96, 0x6F60, 0x9D97, 0x6F61,
06822     0x9D98, 0x6F63, 0x9D99, 0x6F64, 0x9D9A, 0x6F65, 0x9D9B, 0x6F67,
06823     0x9D9C, 0x6F68, 0x9D9D, 0x6F69, 0x9D9E, 0x6F6A, 0x9D9F, 0x6F6B,
06824     0x9DA0, 0x6F6C, 0x9DA1, 0x6F6F, 0x9DA2, 0x6F70, 0x9DA3, 0x6F71,
06825     0x9DA4, 0x6F73, 0x9DA5, 0x6F75, 0x9DA6, 0x6F76, 0x9DA7, 0x6F77,
06826     0x9DA8, 0x6F79, 0x9DA9, 0x6F7B, 0x9DAA, 0x6F7D, 0x9DAB, 0x6F7E,
06827     0x9DAC, 0x6F7F, 0x9DAD, 0x6F80, 0x9DAE, 0x6F81, 0x9DAF, 0x6F82,
06828     0x9DB0, 0x6F83, 0x9DB1, 0x6F85, 0x9DB2, 0x6F86, 0x9DB3, 0x6F87,
06829     0x9DB4, 0x6F8A, 0x9DB5, 0x6F8B, 0x9DB6, 0x6F8F, 0x9DB7, 0x6F90,
06830     0x9DB8, 0x6F91, 0x9DB9, 0x6F92, 0x9DBA, 0x6F93, 0x9DBB, 0x6F94,
06831     0x9DBC, 0x6F95, 0x9DBD, 0x6F96, 0x9DBE, 0x6F97, 0x9DBF, 0x6F98,
06832     0x9DC0, 0x6F99, 0x9DC1, 0x6F9A, 0x9DC2, 0x6F9B, 0x9DC3, 0x6F9D,
06833     0x9DC4, 0x6F9E, 0x9DC5, 0x6F9F, 0x9DC6, 0x6FA0, 0x9DC7, 0x6FA2,
06834     0x9DC8, 0x6FA3, 0x9DC9, 0x6FA4, 0x9DCA, 0x6FA5, 0x9DCB, 0x6FA6,
06835     0x9DCC, 0x6FA8, 0x9DCD, 0x6FA9, 0x9DCE, 0x6FAA, 0x9DCF, 0x6FAB,
06836     0x9DD0, 0x6FAC, 0x9DD1, 0x6FAD, 0x9DD2, 0x6FAE, 0x9DD3, 0x6FAF,
06837     0x9DD4, 0x6FB0, 0x9DD5, 0x6FB1, 0x9DD6, 0x6FB2, 0x9DD7, 0x6FB4,
06838     0x9DD8, 0x6FB5, 0x9DD9, 0x6FB7, 0x9DDA, 0x6FB8, 0x9DDB, 0x6FBA,
06839     0x9DDC, 0x6FBB, 0x9DDD, 0x6FBC, 0x9DDE, 0x6FBD, 0x9DDF, 0x6FBE,
06840     0x9DE0, 0x6FBF, 0x9DE1, 0x6FC1, 0x9DE2, 0x6FC3, 0x9DE3, 0x6FC4,
06841     0x9DE4, 0x6FC5, 0x9DE5, 0x6FC6, 0x9DE6, 0x6FC7, 0x9DE7, 0x6FC8,
06842     0x9DE8, 0x6FCA, 0x9DE9, 0x6FCB, 0x9DEA, 0x6FCC, 0x9DEB, 0x6FCD,
06843     0x9DEC, 0x6FCE, 0x9DED, 0x6FCF, 0x9DEE, 0x6FD0, 0x9DEF, 0x6FD3,
06844     0x9DF0, 0x6FD4, 0x9DF1, 0x6FD5, 0x9DF2, 0x6FD6, 0x9DF3, 0x6FD7,
06845     0x9DF4, 0x6FD8, 0x9DF5, 0x6FD9, 0x9DF6, 0x6FDA, 0x9DF7, 0x6FDB,
06846     0x9DF8, 0x6FDC, 0x9DF9, 0x6FDD, 0x9DFA, 0x6FDF, 0x9DFB, 0x6FE2,
06847     0x9DFC, 0x6FE3, 0x9DFD, 0x6FE4, 0x9DFE, 0x6FE5, 0x9E40, 0x6FE6,
06848     0x9E41, 0x6FE7, 0x9E42, 0x6FE8, 0x9E43, 0x6FE9, 0x9E44, 0x6FEA,
06849     0x9E45, 0x6FEB, 0x9E46, 0x6FEC, 0x9E47, 0x6FED, 0x9E48, 0x6FF0,
06850     0x9E49, 0x6FF1, 0x9E4A, 0x6FF2, 0x9E4B, 0x6FF3, 0x9E4C, 0x6FF4,
06851     0x9E4D, 0x6FF5, 0x9E4E, 0x6FF6, 0x9E4F, 0x6FF7, 0x9E50, 0x6FF8,
06852     0x9E51, 0x6FF9, 0x9E52, 0x6FFA, 0x9E53, 0x6FFB, 0x9E54, 0x6FFC,
06853     0x9E55, 0x6FFD, 0x9E56, 0x6FFE, 0x9E57, 0x6FFF, 0x9E58, 0x7000,
06854     0x9E59, 0x7001, 0x9E5A, 0x7002, 0x9E5B, 0x7003, 0x9E5C, 0x7004,
06855     0x9E5D, 0x7005, 0x9E5E, 0x7006, 0x9E5F, 0x7007, 0x9E60, 0x7008,
06856     0x9E61, 0x7009, 0x9E62, 0x700A, 0x9E63, 0x700B, 0x9E64, 0x700C,
06857     0x9E65, 0x700D, 0x9E66, 0x700E, 0x9E67, 0x700F, 0x9E68, 0x7010,
06858     0x9E69, 0x7012, 0x9E6A, 0x7013, 0x9E6B, 0x7014, 0x9E6C, 0x7015,
06859     0x9E6D, 0x7016, 0x9E6E, 0x7017, 0x9E6F, 0x7018, 0x9E70, 0x7019,
06860     0x9E71, 0x701C, 0x9E72, 0x701D, 0x9E73, 0x701E, 0x9E74, 0x701F,
06861     0x9E75, 0x7020, 0x9E76, 0x7021, 0x9E77, 0x7022, 0x9E78, 0x7024,
06862     0x9E79, 0x7025, 0x9E7A, 0x7026, 0x9E7B, 0x7027, 0x9E7C, 0x7028,
06863     0x9E7D, 0x7029, 0x9E7E, 0x702A, 0x9E80, 0x702B, 0x9E81, 0x702C,
06864     0x9E82, 0x702D, 0x9E83, 0x702E, 0x9E84, 0x702F, 0x9E85, 0x7030,
06865     0x9E86, 0x7031, 0x9E87, 0x7032, 0x9E88, 0x7033, 0x9E89, 0x7034,
06866     0x9E8A, 0x7036, 0x9E8B, 0x7037, 0x9E8C, 0x7038, 0x9E8D, 0x703A,
06867     0x9E8E, 0x703B, 0x9E8F, 0x703C, 0x9E90, 0x703D, 0x9E91, 0x703E,
06868     0x9E92, 0x703F, 0x9E93, 0x7040, 0x9E94, 0x7041, 0x9E95, 0x7042,
06869     0x9E96, 0x7043, 0x9E97, 0x7044, 0x9E98, 0x7045, 0x9E99, 0x7046,
06870     0x9E9A, 0x7047, 0x9E9B, 0x7048, 0x9E9C, 0x7049, 0x9E9D, 0x704A,
06871     0x9E9E, 0x704B, 0x9E9F, 0x704D, 0x9EA0, 0x704E, 0x9EA1, 0x7050,
06872     0x9EA2, 0x7051, 0x9EA3, 0x7052, 0x9EA4, 0x7053, 0x9EA5, 0x7054,
06873     0x9EA6, 0x7055, 0x9EA7, 0x7056, 0x9EA8, 0x7057, 0x9EA9, 0x7058,
06874     0x9EAA, 0x7059, 0x9EAB, 0x705A, 0x9EAC, 0x705B, 0x9EAD, 0x705C,
06875     0x9EAE, 0x705D, 0x9EAF, 0x705F, 0x9EB0, 0x7060, 0x9EB1, 0x7061,
06876     0x9EB2, 0x7062, 0x9EB3, 0x7063, 0x9EB4, 0x7064, 0x9EB5, 0x7065,
06877     0x9EB6, 0x7066, 0x9EB7, 0x7067, 0x9EB8, 0x7068, 0x9EB9, 0x7069,
06878     0x9EBA, 0x706A, 0x9EBB, 0x706E, 0x9EBC, 0x7071, 0x9EBD, 0x7072,
06879     0x9EBE, 0x7073, 0x9EBF, 0x7074, 0x9EC0, 0x7077, 0x9EC1, 0x7079,
06880     0x9EC2, 0x707A, 0x9EC3, 0x707B, 0x9EC4, 0x707D, 0x9EC5, 0x7081,
06881     0x9EC6, 0x7082, 0x9EC7, 0x7083, 0x9EC8, 0x7084, 0x9EC9, 0x7086,
06882     0x9ECA, 0x7087, 0x9ECB, 0x7088, 0x9ECC, 0x708B, 0x9ECD, 0x708C,
06883     0x9ECE, 0x708D, 0x9ECF, 0x708F, 0x9ED0, 0x7090, 0x9ED1, 0x7091,
06884     0x9ED2, 0x7093, 0x9ED3, 0x7097, 0x9ED4, 0x7098, 0x9ED5, 0x709A,
06885     0x9ED6, 0x709B, 0x9ED7, 0x709E, 0x9ED8, 0x709F, 0x9ED9, 0x70A0,
06886     0x9EDA, 0x70A1, 0x9EDB, 0x70A2, 0x9EDC, 0x70A3, 0x9EDD, 0x70A4,
06887     0x9EDE, 0x70A5, 0x9EDF, 0x70A6, 0x9EE0, 0x70A7, 0x9EE1, 0x70A8,
06888     0x9EE2, 0x70A9, 0x9EE3, 0x70AA, 0x9EE4, 0x70B0, 0x9EE5, 0x70B2,
06889     0x9EE6, 0x70B4, 0x9EE7, 0x70B5, 0x9EE8, 0x70B6, 0x9EE9, 0x70BA,
06890     0x9EEA, 0x70BE, 0x9EEB, 0x70BF, 0x9EEC, 0x70C4, 0x9EED, 0x70C5,
06891     0x9EEE, 0x70C6, 0x9EEF, 0x70C7, 0x9EF0, 0x70C9, 0x9EF1, 0x70CB,
06892     0x9EF2, 0x70CC, 0x9EF3, 0x70CD, 0x9EF4, 0x70CE, 0x9EF5, 0x70CF,
06893     0x9EF6, 0x70D0, 0x9EF7, 0x70D1, 0x9EF8, 0x70D2, 0x9EF9, 0x70D3,
06894     0x9EFA, 0x70D4, 0x9EFB, 0x70D5, 0x9EFC, 0x70D6, 0x9EFD, 0x70D7,
06895     0x9EFE, 0x70DA, 0x9F40, 0x70DC, 0x9F41, 0x70DD, 0x9F42, 0x70DE,
06896     0x9F43, 0x70E0, 0x9F44, 0x70E1, 0x9F45, 0x70E2, 0x9F46, 0x70E3,
06897     0x9F47, 0x70E5, 0x9F48, 0x70EA, 0x9F49, 0x70EE, 0x9F4A, 0x70F0,
06898     0x9F4B, 0x70F1, 0x9F4C, 0x70F2, 0x9F4D, 0x70F3, 0x9F4E, 0x70F4,
06899     0x9F4F, 0x70F5, 0x9F50, 0x70F6, 0x9F51, 0x70F8, 0x9F52, 0x70FA,
06900     0x9F53, 0x70FB, 0x9F54, 0x70FC, 0x9F55, 0x70FE, 0x9F56, 0x70FF,
06901     0x9F57, 0x7100, 0x9F58, 0x7101, 0x9F59, 0x7102, 0x9F5A, 0x7103,
06902     0x9F5B, 0x7104, 0x9F5C, 0x7105, 0x9F5D, 0x7106, 0x9F5E, 0x7107,
06903     0x9F5F, 0x7108, 0x9F60, 0x710B, 0x9F61, 0x710C, 0x9F62, 0x710D,
06904     0x9F63, 0x710E, 0x9F64, 0x710F, 0x9F65, 0x7111, 0x9F66, 0x7112,
06905     0x9F67, 0x7114, 0x9F68, 0x7117, 0x9F69, 0x711B, 0x9F6A, 0x711C,
06906     0x9F6B, 0x711D, 0x9F6C, 0x711E, 0x9F6D, 0x711F, 0x9F6E, 0x7120,
06907     0x9F6F, 0x7121, 0x9F70, 0x7122, 0x9F71, 0x7123, 0x9F72, 0x7124,
06908     0x9F73, 0x7125, 0x9F74, 0x7127, 0x9F75, 0x7128, 0x9F76, 0x7129,
06909     0x9F77, 0x712A, 0x9F78, 0x712B, 0x9F79, 0x712C, 0x9F7A, 0x712D,
06910     0x9F7B, 0x712E, 0x9F7C, 0x7132, 0x9F7D, 0x7133, 0x9F7E, 0x7134,
06911     0x9F80, 0x7135, 0x9F81, 0x7137, 0x9F82, 0x7138, 0x9F83, 0x7139,
06912     0x9F84, 0x713A, 0x9F85, 0x713B, 0x9F86, 0x713C, 0x9F87, 0x713D,
06913     0x9F88, 0x713E, 0x9F89, 0x713F, 0x9F8A, 0x7140, 0x9F8B, 0x7141,
06914     0x9F8C, 0x7142, 0x9F8D, 0x7143, 0x9F8E, 0x7144, 0x9F8F, 0x7146,
06915     0x9F90, 0x7147, 0x9F91, 0x7148, 0x9F92, 0x7149, 0x9F93, 0x714B,
06916     0x9F94, 0x714D, 0x9F95, 0x714F, 0x9F96, 0x7150, 0x9F97, 0x7151,
06917     0x9F98, 0x7152, 0x9F99, 0x7153, 0x9F9A, 0x7154, 0x9F9B, 0x7155,
06918     0x9F9C, 0x7156, 0x9F9D, 0x7157, 0x9F9E, 0x7158, 0x9F9F, 0x7159,
06919     0x9FA0, 0x715A, 0x9FA1, 0x715B, 0x9FA2, 0x715D, 0x9FA3, 0x715F,
06920     0x9FA4, 0x7160, 0x9FA5, 0x7161, 0x9FA6, 0x7162, 0x9FA7, 0x7163,
06921     0x9FA8, 0x7165, 0x9FA9, 0x7169, 0x9FAA, 0x716A, 0x9FAB, 0x716B,
06922     0x9FAC, 0x716C, 0x9FAD, 0x716D, 0x9FAE, 0x716F, 0x9FAF, 0x7170,
06923     0x9FB0, 0x7171, 0x9FB1, 0x7174, 0x9FB2, 0x7175, 0x9FB3, 0x7176,
06924     0x9FB4, 0x7177, 0x9FB5, 0x7179, 0x9FB6, 0x717B, 0x9FB7, 0x717C,
06925     0x9FB8, 0x717E, 0x9FB9, 0x717F, 0x9FBA, 0x7180, 0x9FBB, 0x7181,
06926     0x9FBC, 0x7182, 0x9FBD, 0x7183, 0x9FBE, 0x7185, 0x9FBF, 0x7186,
06927     0x9FC0, 0x7187, 0x9FC1, 0x7188, 0x9FC2, 0x7189, 0x9FC3, 0x718B,
06928     0x9FC4, 0x718C, 0x9FC5, 0x718D, 0x9FC6, 0x718E, 0x9FC7, 0x7190,
06929     0x9FC8, 0x7191, 0x9FC9, 0x7192, 0x9FCA, 0x7193, 0x9FCB, 0x7195,
06930     0x9FCC, 0x7196, 0x9FCD, 0x7197, 0x9FCE, 0x719A, 0x9FCF, 0x719B,
06931     0x9FD0, 0x719C, 0x9FD1, 0x719D, 0x9FD2, 0x719E, 0x9FD3, 0x71A1,
06932     0x9FD4, 0x71A2, 0x9FD5, 0x71A3, 0x9FD6, 0x71A4, 0x9FD7, 0x71A5,
06933     0x9FD8, 0x71A6, 0x9FD9, 0x71A7, 0x9FDA, 0x71A9, 0x9FDB, 0x71AA,
06934     0x9FDC, 0x71AB, 0x9FDD, 0x71AD, 0x9FDE, 0x71AE, 0x9FDF, 0x71AF,
06935     0x9FE0, 0x71B0, 0x9FE1, 0x71B1, 0x9FE2, 0x71B2, 0x9FE3, 0x71B4,
06936     0x9FE4, 0x71B6, 0x9FE5, 0x71B7, 0x9FE6, 0x71B8, 0x9FE7, 0x71BA,
06937     0x9FE8, 0x71BB, 0x9FE9, 0x71BC, 0x9FEA, 0x71BD, 0x9FEB, 0x71BE,
06938     0x9FEC, 0x71BF, 0x9FED, 0x71C0, 0x9FEE, 0x71C1, 0x9FEF, 0x71C2,
06939     0x9FF0, 0x71C4, 0x9FF1, 0x71C5, 0x9FF2, 0x71C6, 0x9FF3, 0x71C7,
06940     0x9FF4, 0x71C8, 0x9FF5, 0x71C9, 0x9FF6, 0x71CA, 0x9FF7, 0x71CB,
06941     0x9FF8, 0x71CC, 0x9FF9, 0x71CD, 0x9FFA, 0x71CF, 0x9FFB, 0x71D0,
06942     0x9FFC, 0x71D1, 0x9FFD, 0x71D2, 0x9FFE, 0x71D3, 0xA040, 0x71D6,
06943     0xA041, 0x71D7, 0xA042, 0x71D8, 0xA043, 0x71D9, 0xA044, 0x71DA,
06944     0xA045, 0x71DB, 0xA046, 0x71DC, 0xA047, 0x71DD, 0xA048, 0x71DE,
06945     0xA049, 0x71DF, 0xA04A, 0x71E1, 0xA04B, 0x71E2, 0xA04C, 0x71E3,
06946     0xA04D, 0x71E4, 0xA04E, 0x71E6, 0xA04F, 0x71E8, 0xA050, 0x71E9,
06947     0xA051, 0x71EA, 0xA052, 0x71EB, 0xA053, 0x71EC, 0xA054, 0x71ED,
06948     0xA055, 0x71EF, 0xA056, 0x71F0, 0xA057, 0x71F1, 0xA058, 0x71F2,
06949     0xA059, 0x71F3, 0xA05A, 0x71F4, 0xA05B, 0x71F5, 0xA05C, 0x71F6,
06950     0xA05D, 0x71F7, 0xA05E, 0x71F8, 0xA05F, 0x71FA, 0xA060, 0x71FB,
06951     0xA061, 0x71FC, 0xA062, 0x71FD, 0xA063, 0x71FE, 0xA064, 0x71FF,
06952     0xA065, 0x7200, 0xA066, 0x7201, 0xA067, 0x7202, 0xA068, 0x7203,
06953     0xA069, 0x7204, 0xA06A, 0x7205, 0xA06B, 0x7207, 0xA06C, 0x7208,
06954     0xA06D, 0x7209, 0xA06E, 0x720A, 0xA06F, 0x720B, 0xA070, 0x720C,
06955     0xA071, 0x720D, 0xA072, 0x720E, 0xA073, 0x720F, 0xA074, 0x7210,
06956     0xA075, 0x7211, 0xA076, 0x7212, 0xA077, 0x7213, 0xA078, 0x7214,
06957     0xA079, 0x7215, 0xA07A, 0x7216, 0xA07B, 0x7217, 0xA07C, 0x7218,
06958     0xA07D, 0x7219, 0xA07E, 0x721A, 0xA080, 0x721B, 0xA081, 0x721C,
06959     0xA082, 0x721E, 0xA083, 0x721F, 0xA084, 0x7220, 0xA085, 0x7221,
06960     0xA086, 0x7222, 0xA087, 0x7223, 0xA088, 0x7224, 0xA089, 0x7225,
06961     0xA08A, 0x7226, 0xA08B, 0x7227, 0xA08C, 0x7229, 0xA08D, 0x722B,
06962     0xA08E, 0x722D, 0xA08F, 0x722E, 0xA090, 0x722F, 0xA091, 0x7232,
06963     0xA092, 0x7233, 0xA093, 0x7234, 0xA094, 0x723A, 0xA095, 0x723C,
06964     0xA096, 0x723E, 0xA097, 0x7240, 0xA098, 0x7241, 0xA099, 0x7242,
06965     0xA09A, 0x7243, 0xA09B, 0x7244, 0xA09C, 0x7245, 0xA09D, 0x7246,
06966     0xA09E, 0x7249, 0xA09F, 0x724A, 0xA0A0, 0x724B, 0xA0A1, 0x724E,
06967     0xA0A2, 0x724F, 0xA0A3, 0x7250, 0xA0A4, 0x7251, 0xA0A5, 0x7253,
06968     0xA0A6, 0x7254, 0xA0A7, 0x7255, 0xA0A8, 0x7257, 0xA0A9, 0x7258,
06969     0xA0AA, 0x725A, 0xA0AB, 0x725C, 0xA0AC, 0x725E, 0xA0AD, 0x7260,
06970     0xA0AE, 0x7263, 0xA0AF, 0x7264, 0xA0B0, 0x7265, 0xA0B1, 0x7268,
06971     0xA0B2, 0x726A, 0xA0B3, 0x726B, 0xA0B4, 0x726C, 0xA0B5, 0x726D,
06972     0xA0B6, 0x7270, 0xA0B7, 0x7271, 0xA0B8, 0x7273, 0xA0B9, 0x7274,
06973     0xA0BA, 0x7276, 0xA0BB, 0x7277, 0xA0BC, 0x7278, 0xA0BD, 0x727B,
06974     0xA0BE, 0x727C, 0xA0BF, 0x727D, 0xA0C0, 0x7282, 0xA0C1, 0x7283,
06975     0xA0C2, 0x7285, 0xA0C3, 0x7286, 0xA0C4, 0x7287, 0xA0C5, 0x7288,
06976     0xA0C6, 0x7289, 0xA0C7, 0x728C, 0xA0C8, 0x728E, 0xA0C9, 0x7290,
06977     0xA0CA, 0x7291, 0xA0CB, 0x7293, 0xA0CC, 0x7294, 0xA0CD, 0x7295,
06978     0xA0CE, 0x7296, 0xA0CF, 0x7297, 0xA0D0, 0x7298, 0xA0D1, 0x7299,
06979     0xA0D2, 0x729A, 0xA0D3, 0x729B, 0xA0D4, 0x729C, 0xA0D5, 0x729D,
06980     0xA0D6, 0x729E, 0xA0D7, 0x72A0, 0xA0D8, 0x72A1, 0xA0D9, 0x72A2,
06981     0xA0DA, 0x72A3, 0xA0DB, 0x72A4, 0xA0DC, 0x72A5, 0xA0DD, 0x72A6,
06982     0xA0DE, 0x72A7, 0xA0DF, 0x72A8, 0xA0E0, 0x72A9, 0xA0E1, 0x72AA,
06983     0xA0E2, 0x72AB, 0xA0E3, 0x72AE, 0xA0E4, 0x72B1, 0xA0E5, 0x72B2,
06984     0xA0E6, 0x72B3, 0xA0E7, 0x72B5, 0xA0E8, 0x72BA, 0xA0E9, 0x72BB,
06985     0xA0EA, 0x72BC, 0xA0EB, 0x72BD, 0xA0EC, 0x72BE, 0xA0ED, 0x72BF,
06986     0xA0EE, 0x72C0, 0xA0EF, 0x72C5, 0xA0F0, 0x72C6, 0xA0F1, 0x72C7,
06987     0xA0F2, 0x72C9, 0xA0F3, 0x72CA, 0xA0F4, 0x72CB, 0xA0F5, 0x72CC,
06988     0xA0F6, 0x72CF, 0xA0F7, 0x72D1, 0xA0F8, 0x72D3, 0xA0F9, 0x72D4,
06989     0xA0FA, 0x72D5, 0xA0FB, 0x72D6, 0xA0FC, 0x72D8, 0xA0FD, 0x72DA,
06990     0xA0FE, 0x72DB, 0xA1A1, 0x3000, 0xA1A2, 0x3001, 0xA1A3, 0x3002,
06991     0xA1A4, 0x00B7, 0xA1A5, 0x02C9, 0xA1A6, 0x02C7, 0xA1A7, 0x00A8,
06992     0xA1A8, 0x3003, 0xA1A9, 0x3005, 0xA1AA, 0x2014, 0xA1AB, 0xFF5E,
06993     0xA1AC, 0x2016, 0xA1AD, 0x2026, 0xA1AE, 0x2018, 0xA1AF, 0x2019,
06994     0xA1B0, 0x201C, 0xA1B1, 0x201D, 0xA1B2, 0x3014, 0xA1B3, 0x3015,
06995     0xA1B4, 0x3008, 0xA1B5, 0x3009, 0xA1B6, 0x300A, 0xA1B7, 0x300B,
06996     0xA1B8, 0x300C, 0xA1B9, 0x300D, 0xA1BA, 0x300E, 0xA1BB, 0x300F,
06997     0xA1BC, 0x3016, 0xA1BD, 0x3017, 0xA1BE, 0x3010, 0xA1BF, 0x3011,
06998     0xA1C0, 0x00B1, 0xA1C1, 0x00D7, 0xA1C2, 0x00F7, 0xA1C3, 0x2236,
06999     0xA1C4, 0x2227, 0xA1C5, 0x2228, 0xA1C6, 0x2211, 0xA1C7, 0x220F,
07000     0xA1C8, 0x222A, 0xA1C9, 0x2229, 0xA1CA, 0x2208, 0xA1CB, 0x2237,
07001     0xA1CC, 0x221A, 0xA1CD, 0x22A5, 0xA1CE, 0x2225, 0xA1CF, 0x2220,
07002     0xA1D0, 0x2312, 0xA1D1, 0x2299, 0xA1D2, 0x222B, 0xA1D3, 0x222E,
07003     0xA1D4, 0x2261, 0xA1D5, 0x224C, 0xA1D6, 0x2248, 0xA1D7, 0x223D,
07004     0xA1D8, 0x221D, 0xA1D9, 0x2260, 0xA1DA, 0x226E, 0xA1DB, 0x226F,
07005     0xA1DC, 0x2264, 0xA1DD, 0x2265, 0xA1DE, 0x221E, 0xA1DF, 0x2235,
07006     0xA1E0, 0x2234, 0xA1E1, 0x2642, 0xA1E2, 0x2640, 0xA1E3, 0x00B0,
07007     0xA1E4, 0x2032, 0xA1E5, 0x2033, 0xA1E6, 0x2103, 0xA1E7, 0xFF04,
07008     0xA1E8, 0x00A4, 0xA1E9, 0xFFE0, 0xA1EA, 0xFFE1, 0xA1EB, 0x2030,
07009     0xA1EC, 0x00A7, 0xA1ED, 0x2116, 0xA1EE, 0x2606, 0xA1EF, 0x2605,
07010     0xA1F0, 0x25CB, 0xA1F1, 0x25CF, 0xA1F2, 0x25CE, 0xA1F3, 0x25C7,
07011     0xA1F4, 0x25C6, 0xA1F5, 0x25A1, 0xA1F6, 0x25A0, 0xA1F7, 0x25B3,
07012     0xA1F8, 0x25B2, 0xA1F9, 0x203B, 0xA1FA, 0x2192, 0xA1FB, 0x2190,
07013     0xA1FC, 0x2191, 0xA1FD, 0x2193, 0xA1FE, 0x3013, 0xA2A1, 0x2170,
07014     0xA2A2, 0x2171, 0xA2A3, 0x2172, 0xA2A4, 0x2173, 0xA2A5, 0x2174,
07015     0xA2A6, 0x2175, 0xA2A7, 0x2176, 0xA2A8, 0x2177, 0xA2A9, 0x2178,
07016     0xA2AA, 0x2179, 0xA2B1, 0x2488, 0xA2B2, 0x2489, 0xA2B3, 0x248A,
07017     0xA2B4, 0x248B, 0xA2B5, 0x248C, 0xA2B6, 0x248D, 0xA2B7, 0x248E,
07018     0xA2B8, 0x248F, 0xA2B9, 0x2490, 0xA2BA, 0x2491, 0xA2BB, 0x2492,
07019     0xA2BC, 0x2493, 0xA2BD, 0x2494, 0xA2BE, 0x2495, 0xA2BF, 0x2496,
07020     0xA2C0, 0x2497, 0xA2C1, 0x2498, 0xA2C2, 0x2499, 0xA2C3, 0x249A,
07021     0xA2C4, 0x249B, 0xA2C5, 0x2474, 0xA2C6, 0x2475, 0xA2C7, 0x2476,
07022     0xA2C8, 0x2477, 0xA2C9, 0x2478, 0xA2CA, 0x2479, 0xA2CB, 0x247A,
07023     0xA2CC, 0x247B, 0xA2CD, 0x247C, 0xA2CE, 0x247D, 0xA2CF, 0x247E,
07024     0xA2D0, 0x247F, 0xA2D1, 0x2480, 0xA2D2, 0x2481, 0xA2D3, 0x2482,
07025     0xA2D4, 0x2483, 0xA2D5, 0x2484, 0xA2D6, 0x2485, 0xA2D7, 0x2486,
07026     0xA2D8, 0x2487, 0xA2D9, 0x2460, 0xA2DA, 0x2461, 0xA2DB, 0x2462,
07027     0xA2DC, 0x2463, 0xA2DD, 0x2464, 0xA2DE, 0x2465, 0xA2DF, 0x2466,
07028     0xA2E0, 0x2467, 0xA2E1, 0x2468, 0xA2E2, 0x2469, 0xA2E5, 0x3220,
07029     0xA2E6, 0x3221, 0xA2E7, 0x3222, 0xA2E8, 0x3223, 0xA2E9, 0x3224,
07030     0xA2EA, 0x3225, 0xA2EB, 0x3226, 0xA2EC, 0x3227, 0xA2ED, 0x3228,
07031     0xA2EE, 0x3229, 0xA2F1, 0x2160, 0xA2F2, 0x2161, 0xA2F3, 0x2162,
07032     0xA2F4, 0x2163, 0xA2F5, 0x2164, 0xA2F6, 0x2165, 0xA2F7, 0x2166,
07033     0xA2F8, 0x2167, 0xA2F9, 0x2168, 0xA2FA, 0x2169, 0xA2FB, 0x216A,
07034     0xA2FC, 0x216B, 0xA3A1, 0xFF01, 0xA3A2, 0xFF02, 0xA3A3, 0xFF03,
07035     0xA3A4, 0xFFE5, 0xA3A5, 0xFF05, 0xA3A6, 0xFF06, 0xA3A7, 0xFF07,
07036     0xA3A8, 0xFF08, 0xA3A9, 0xFF09, 0xA3AA, 0xFF0A, 0xA3AB, 0xFF0B,
07037     0xA3AC, 0xFF0C, 0xA3AD, 0xFF0D, 0xA3AE, 0xFF0E, 0xA3AF, 0xFF0F,
07038     0xA3B0, 0xFF10, 0xA3B1, 0xFF11, 0xA3B2, 0xFF12, 0xA3B3, 0xFF13,
07039     0xA3B4, 0xFF14, 0xA3B5, 0xFF15, 0xA3B6, 0xFF16, 0xA3B7, 0xFF17,
07040     0xA3B8, 0xFF18, 0xA3B9, 0xFF19, 0xA3BA, 0xFF1A, 0xA3BB, 0xFF1B,
07041     0xA3BC, 0xFF1C, 0xA3BD, 0xFF1D, 0xA3BE, 0xFF1E, 0xA3BF, 0xFF1F,
07042     0xA3C0, 0xFF20, 0xA3C1, 0xFF21, 0xA3C2, 0xFF22, 0xA3C3, 0xFF23,
07043     0xA3C4, 0xFF24, 0xA3C5, 0xFF25, 0xA3C6, 0xFF26, 0xA3C7, 0xFF27,
07044     0xA3C8, 0xFF28, 0xA3C9, 0xFF29, 0xA3CA, 0xFF2A, 0xA3CB, 0xFF2B,
07045     0xA3CC, 0xFF2C, 0xA3CD, 0xFF2D, 0xA3CE, 0xFF2E, 0xA3CF, 0xFF2F,
07046     0xA3D0, 0xFF30, 0xA3D1, 0xFF31, 0xA3D2, 0xFF32, 0xA3D3, 0xFF33,
07047     0xA3D4, 0xFF34, 0xA3D5, 0xFF35, 0xA3D6, 0xFF36, 0xA3D7, 0xFF37,
07048     0xA3D8, 0xFF38, 0xA3D9, 0xFF39, 0xA3DA, 0xFF3A, 0xA3DB, 0xFF3B,
07049     0xA3DC, 0xFF3C, 0xA3DD, 0xFF3D, 0xA3DE, 0xFF3E, 0xA3DF, 0xFF3F,
07050     0xA3E0, 0xFF40, 0xA3E1, 0xFF41, 0xA3E2, 0xFF42, 0xA3E3, 0xFF43,
07051     0xA3E4, 0xFF44, 0xA3E5, 0xFF45, 0xA3E6, 0xFF46, 0xA3E7, 0xFF47,
07052     0xA3E8, 0xFF48, 0xA3E9, 0xFF49, 0xA3EA, 0xFF4A, 0xA3EB, 0xFF4B,
07053     0xA3EC, 0xFF4C, 0xA3ED, 0xFF4D, 0xA3EE, 0xFF4E, 0xA3EF, 0xFF4F,
07054     0xA3F0, 0xFF50, 0xA3F1, 0xFF51, 0xA3F2, 0xFF52, 0xA3F3, 0xFF53,
07055     0xA3F4, 0xFF54, 0xA3F5, 0xFF55, 0xA3F6, 0xFF56, 0xA3F7, 0xFF57,
07056     0xA3F8, 0xFF58, 0xA3F9, 0xFF59, 0xA3FA, 0xFF5A, 0xA3FB, 0xFF5B,
07057     0xA3FC, 0xFF5C, 0xA3FD, 0xFF5D, 0xA3FE, 0xFFE3, 0xA4A1, 0x3041,
07058     0xA4A2, 0x3042, 0xA4A3, 0x3043, 0xA4A4, 0x3044, 0xA4A5, 0x3045,
07059     0xA4A6, 0x3046, 0xA4A7, 0x3047, 0xA4A8, 0x3048, 0xA4A9, 0x3049,
07060     0xA4AA, 0x304A, 0xA4AB, 0x304B, 0xA4AC, 0x304C, 0xA4AD, 0x304D,
07061     0xA4AE, 0x304E, 0xA4AF, 0x304F, 0xA4B0, 0x3050, 0xA4B1, 0x3051,
07062     0xA4B2, 0x3052, 0xA4B3, 0x3053, 0xA4B4, 0x3054, 0xA4B5, 0x3055,
07063     0xA4B6, 0x3056, 0xA4B7, 0x3057, 0xA4B8, 0x3058, 0xA4B9, 0x3059,
07064     0xA4BA, 0x305A, 0xA4BB, 0x305B, 0xA4BC, 0x305C, 0xA4BD, 0x305D,
07065     0xA4BE, 0x305E, 0xA4BF, 0x305F, 0xA4C0, 0x3060, 0xA4C1, 0x3061,
07066     0xA4C2, 0x3062, 0xA4C3, 0x3063, 0xA4C4, 0x3064, 0xA4C5, 0x3065,
07067     0xA4C6, 0x3066, 0xA4C7, 0x3067, 0xA4C8, 0x3068, 0xA4C9, 0x3069,
07068     0xA4CA, 0x306A, 0xA4CB, 0x306B, 0xA4CC, 0x306C, 0xA4CD, 0x306D,
07069     0xA4CE, 0x306E, 0xA4CF, 0x306F, 0xA4D0, 0x3070, 0xA4D1, 0x3071,
07070     0xA4D2, 0x3072, 0xA4D3, 0x3073, 0xA4D4, 0x3074, 0xA4D5, 0x3075,
07071     0xA4D6, 0x3076, 0xA4D7, 0x3077, 0xA4D8, 0x3078, 0xA4D9, 0x3079,
07072     0xA4DA, 0x307A, 0xA4DB, 0x307B, 0xA4DC, 0x307C, 0xA4DD, 0x307D,
07073     0xA4DE, 0x307E, 0xA4DF, 0x307F, 0xA4E0, 0x3080, 0xA4E1, 0x3081,
07074     0xA4E2, 0x3082, 0xA4E3, 0x3083, 0xA4E4, 0x3084, 0xA4E5, 0x3085,
07075     0xA4E6, 0x3086, 0xA4E7, 0x3087, 0xA4E8, 0x3088, 0xA4E9, 0x3089,
07076     0xA4EA, 0x308A, 0xA4EB, 0x308B, 0xA4EC, 0x308C, 0xA4ED, 0x308D,
07077     0xA4EE, 0x308E, 0xA4EF, 0x308F, 0xA4F0, 0x3090, 0xA4F1, 0x3091,
07078     0xA4F2, 0x3092, 0xA4F3, 0x3093, 0xA5A1, 0x30A1, 0xA5A2, 0x30A2,
07079     0xA5A3, 0x30A3, 0xA5A4, 0x30A4, 0xA5A5, 0x30A5, 0xA5A6, 0x30A6,
07080     0xA5A7, 0x30A7, 0xA5A8, 0x30A8, 0xA5A9, 0x30A9, 0xA5AA, 0x30AA,
07081     0xA5AB, 0x30AB, 0xA5AC, 0x30AC, 0xA5AD, 0x30AD, 0xA5AE, 0x30AE,
07082     0xA5AF, 0x30AF, 0xA5B0, 0x30B0, 0xA5B1, 0x30B1, 0xA5B2, 0x30B2,
07083     0xA5B3, 0x30B3, 0xA5B4, 0x30B4, 0xA5B5, 0x30B5, 0xA5B6, 0x30B6,
07084     0xA5B7, 0x30B7, 0xA5B8, 0x30B8, 0xA5B9, 0x30B9, 0xA5BA, 0x30BA,
07085     0xA5BB, 0x30BB, 0xA5BC, 0x30BC, 0xA5BD, 0x30BD, 0xA5BE, 0x30BE,
07086     0xA5BF, 0x30BF, 0xA5C0, 0x30C0, 0xA5C1, 0x30C1, 0xA5C2, 0x30C2,
07087     0xA5C3, 0x30C3, 0xA5C4, 0x30C4, 0xA5C5, 0x30C5, 0xA5C6, 0x30C6,
07088     0xA5C7, 0x30C7, 0xA5C8, 0x30C8, 0xA5C9, 0x30C9, 0xA5CA, 0x30CA,
07089     0xA5CB, 0x30CB, 0xA5CC, 0x30CC, 0xA5CD, 0x30CD, 0xA5CE, 0x30CE,
07090     0xA5CF, 0x30CF, 0xA5D0, 0x30D0, 0xA5D1, 0x30D1, 0xA5D2, 0x30D2,
07091     0xA5D3, 0x30D3, 0xA5D4, 0x30D4, 0xA5D5, 0x30D5, 0xA5D6, 0x30D6,
07092     0xA5D7, 0x30D7, 0xA5D8, 0x30D8, 0xA5D9, 0x30D9, 0xA5DA, 0x30DA,
07093     0xA5DB, 0x30DB, 0xA5DC, 0x30DC, 0xA5DD, 0x30DD, 0xA5DE, 0x30DE,
07094     0xA5DF, 0x30DF, 0xA5E0, 0x30E0, 0xA5E1, 0x30E1, 0xA5E2, 0x30E2,
07095     0xA5E3, 0x30E3, 0xA5E4, 0x30E4, 0xA5E5, 0x30E5, 0xA5E6, 0x30E6,
07096     0xA5E7, 0x30E7, 0xA5E8, 0x30E8, 0xA5E9, 0x30E9, 0xA5EA, 0x30EA,
07097     0xA5EB, 0x30EB, 0xA5EC, 0x30EC, 0xA5ED, 0x30ED, 0xA5EE, 0x30EE,
07098     0xA5EF, 0x30EF, 0xA5F0, 0x30F0, 0xA5F1, 0x30F1, 0xA5F2, 0x30F2,
07099     0xA5F3, 0x30F3, 0xA5F4, 0x30F4, 0xA5F5, 0x30F5, 0xA5F6, 0x30F6,
07100     0xA6A1, 0x0391, 0xA6A2, 0x0392, 0xA6A3, 0x0393, 0xA6A4, 0x0394,
07101     0xA6A5, 0x0395, 0xA6A6, 0x0396, 0xA6A7, 0x0397, 0xA6A8, 0x0398,
07102     0xA6A9, 0x0399, 0xA6AA, 0x039A, 0xA6AB, 0x039B, 0xA6AC, 0x039C,
07103     0xA6AD, 0x039D, 0xA6AE, 0x039E, 0xA6AF, 0x039F, 0xA6B0, 0x03A0,
07104     0xA6B1, 0x03A1, 0xA6B2, 0x03A3, 0xA6B3, 0x03A4, 0xA6B4, 0x03A5,
07105     0xA6B5, 0x03A6, 0xA6B6, 0x03A7, 0xA6B7, 0x03A8, 0xA6B8, 0x03A9,
07106     0xA6C1, 0x03B1, 0xA6C2, 0x03B2, 0xA6C3, 0x03B3, 0xA6C4, 0x03B4,
07107     0xA6C5, 0x03B5, 0xA6C6, 0x03B6, 0xA6C7, 0x03B7, 0xA6C8, 0x03B8,
07108     0xA6C9, 0x03B9, 0xA6CA, 0x03BA, 0xA6CB, 0x03BB, 0xA6CC, 0x03BC,
07109     0xA6CD, 0x03BD, 0xA6CE, 0x03BE, 0xA6CF, 0x03BF, 0xA6D0, 0x03C0,
07110     0xA6D1, 0x03C1, 0xA6D2, 0x03C3, 0xA6D3, 0x03C4, 0xA6D4, 0x03C5,
07111     0xA6D5, 0x03C6, 0xA6D6, 0x03C7, 0xA6D7, 0x03C8, 0xA6D8, 0x03C9,
07112     0xA6E0, 0xFE35, 0xA6E1, 0xFE36, 0xA6E2, 0xFE39, 0xA6E3, 0xFE3A,
07113     0xA6E4, 0xFE3F, 0xA6E5, 0xFE40, 0xA6E6, 0xFE3D, 0xA6E7, 0xFE3E,
07114     0xA6E8, 0xFE41, 0xA6E9, 0xFE42, 0xA6EA, 0xFE43, 0xA6EB, 0xFE44,
07115     0xA6EE, 0xFE3B, 0xA6EF, 0xFE3C, 0xA6F0, 0xFE37, 0xA6F1, 0xFE38,
07116     0xA6F2, 0xFE31, 0xA6F4, 0xFE33, 0xA6F5, 0xFE34, 0xA7A1, 0x0410,
07117     0xA7A2, 0x0411, 0xA7A3, 0x0412, 0xA7A4, 0x0413, 0xA7A5, 0x0414,
07118     0xA7A6, 0x0415, 0xA7A7, 0x0401, 0xA7A8, 0x0416, 0xA7A9, 0x0417,
07119     0xA7AA, 0x0418, 0xA7AB, 0x0419, 0xA7AC, 0x041A, 0xA7AD, 0x041B,
07120     0xA7AE, 0x041C, 0xA7AF, 0x041D, 0xA7B0, 0x041E, 0xA7B1, 0x041F,
07121     0xA7B2, 0x0420, 0xA7B3, 0x0421, 0xA7B4, 0x0422, 0xA7B5, 0x0423,
07122     0xA7B6, 0x0424, 0xA7B7, 0x0425, 0xA7B8, 0x0426, 0xA7B9, 0x0427,
07123     0xA7BA, 0x0428, 0xA7BB, 0x0429, 0xA7BC, 0x042A, 0xA7BD, 0x042B,
07124     0xA7BE, 0x042C, 0xA7BF, 0x042D, 0xA7C0, 0x042E, 0xA7C1, 0x042F,
07125     0xA7D1, 0x0430, 0xA7D2, 0x0431, 0xA7D3, 0x0432, 0xA7D4, 0x0433,
07126     0xA7D5, 0x0434, 0xA7D6, 0x0435, 0xA7D7, 0x0451, 0xA7D8, 0x0436,
07127     0xA7D9, 0x0437, 0xA7DA, 0x0438, 0xA7DB, 0x0439, 0xA7DC, 0x043A,
07128     0xA7DD, 0x043B, 0xA7DE, 0x043C, 0xA7DF, 0x043D, 0xA7E0, 0x043E,
07129     0xA7E1, 0x043F, 0xA7E2, 0x0440, 0xA7E3, 0x0441, 0xA7E4, 0x0442,
07130     0xA7E5, 0x0443, 0xA7E6, 0x0444, 0xA7E7, 0x0445, 0xA7E8, 0x0446,
07131     0xA7E9, 0x0447, 0xA7EA, 0x0448, 0xA7EB, 0x0449, 0xA7EC, 0x044A,
07132     0xA7ED, 0x044B, 0xA7EE, 0x044C, 0xA7EF, 0x044D, 0xA7F0, 0x044E,
07133     0xA7F1, 0x044F, 0xA840, 0x02CA, 0xA841, 0x02CB, 0xA842, 0x02D9,
07134     0xA843, 0x2013, 0xA844, 0x2015, 0xA845, 0x2025, 0xA846, 0x2035,
07135     0xA847, 0x2105, 0xA848, 0x2109, 0xA849, 0x2196, 0xA84A, 0x2197,
07136     0xA84B, 0x2198, 0xA84C, 0x2199, 0xA84D, 0x2215, 0xA84E, 0x221F,
07137     0xA84F, 0x2223, 0xA850, 0x2252, 0xA851, 0x2266, 0xA852, 0x2267,
07138     0xA853, 0x22BF, 0xA854, 0x2550, 0xA855, 0x2551, 0xA856, 0x2552,
07139     0xA857, 0x2553, 0xA858, 0x2554, 0xA859, 0x2555, 0xA85A, 0x2556,
07140     0xA85B, 0x2557, 0xA85C, 0x2558, 0xA85D, 0x2559, 0xA85E, 0x255A,
07141     0xA85F, 0x255B, 0xA860, 0x255C, 0xA861, 0x255D, 0xA862, 0x255E,
07142     0xA863, 0x255F, 0xA864, 0x2560, 0xA865, 0x2561, 0xA866, 0x2562,
07143     0xA867, 0x2563, 0xA868, 0x2564, 0xA869, 0x2565, 0xA86A, 0x2566,
07144     0xA86B, 0x2567, 0xA86C, 0x2568, 0xA86D, 0x2569, 0xA86E, 0x256A,
07145     0xA86F, 0x256B, 0xA870, 0x256C, 0xA871, 0x256D, 0xA872, 0x256E,
07146     0xA873, 0x256F, 0xA874, 0x2570, 0xA875, 0x2571, 0xA876, 0x2572,
07147     0xA877, 0x2573, 0xA878, 0x2581, 0xA879, 0x2582, 0xA87A, 0x2583,
07148     0xA87B, 0x2584, 0xA87C, 0x2585, 0xA87D, 0x2586, 0xA87E, 0x2587,
07149     0xA880, 0x2588, 0xA881, 0x2589, 0xA882, 0x258A, 0xA883, 0x258B,
07150     0xA884, 0x258C, 0xA885, 0x258D, 0xA886, 0x258E, 0xA887, 0x258F,
07151     0xA888, 0x2593, 0xA889, 0x2594, 0xA88A, 0x2595, 0xA88B, 0x25BC,
07152     0xA88C, 0x25BD, 0xA88D, 0x25E2, 0xA88E, 0x25E3, 0xA88F, 0x25E4,
07153     0xA890, 0x25E5, 0xA891, 0x2609, 0xA892, 0x2295, 0xA893, 0x3012,
07154     0xA894, 0x301D, 0xA895, 0x301E, 0xA8A1, 0x0101, 0xA8A2, 0x00E1,
07155     0xA8A3, 0x01CE, 0xA8A4, 0x00E0, 0xA8A5, 0x0113, 0xA8A6, 0x00E9,
07156     0xA8A7, 0x011B, 0xA8A8, 0x00E8, 0xA8A9, 0x012B, 0xA8AA, 0x00ED,
07157     0xA8AB, 0x01D0, 0xA8AC, 0x00EC, 0xA8AD, 0x014D, 0xA8AE, 0x00F3,
07158     0xA8AF, 0x01D2, 0xA8B0, 0x00F2, 0xA8B1, 0x016B, 0xA8B2, 0x00FA,
07159     0xA8B3, 0x01D4, 0xA8B4, 0x00F9, 0xA8B5, 0x01D6, 0xA8B6, 0x01D8,
07160     0xA8B7, 0x01DA, 0xA8B8, 0x01DC, 0xA8B9, 0x00FC, 0xA8BA, 0x00EA,
07161     0xA8BB, 0x0251, 0xA8BD, 0x0144, 0xA8BE, 0x0148, 0xA8C0, 0x0261,
07162     0xA8C5, 0x3105, 0xA8C6, 0x3106, 0xA8C7, 0x3107, 0xA8C8, 0x3108,
07163     0xA8C9, 0x3109, 0xA8CA, 0x310A, 0xA8CB, 0x310B, 0xA8CC, 0x310C,
07164     0xA8CD, 0x310D, 0xA8CE, 0x310E, 0xA8CF, 0x310F, 0xA8D0, 0x3110,
07165     0xA8D1, 0x3111, 0xA8D2, 0x3112, 0xA8D3, 0x3113, 0xA8D4, 0x3114,
07166     0xA8D5, 0x3115, 0xA8D6, 0x3116, 0xA8D7, 0x3117, 0xA8D8, 0x3118,
07167     0xA8D9, 0x3119, 0xA8DA, 0x311A, 0xA8DB, 0x311B, 0xA8DC, 0x311C,
07168     0xA8DD, 0x311D, 0xA8DE, 0x311E, 0xA8DF, 0x311F, 0xA8E0, 0x3120,
07169     0xA8E1, 0x3121, 0xA8E2, 0x3122, 0xA8E3, 0x3123, 0xA8E4, 0x3124,
07170     0xA8E5, 0x3125, 0xA8E6, 0x3126, 0xA8E7, 0x3127, 0xA8E8, 0x3128,
07171     0xA8E9, 0x3129, 0xA940, 0x3021, 0xA941, 0x3022, 0xA942, 0x3023,
07172     0xA943, 0x3024, 0xA944, 0x3025, 0xA945, 0x3026, 0xA946, 0x3027,
07173     0xA947, 0x3028, 0xA948, 0x3029, 0xA949, 0x32A3, 0xA94A, 0x338E,
07174     0xA94B, 0x338F, 0xA94C, 0x339C, 0xA94D, 0x339D, 0xA94E, 0x339E,
07175     0xA94F, 0x33A1, 0xA950, 0x33C4, 0xA951, 0x33CE, 0xA952, 0x33D1,
07176     0xA953, 0x33D2, 0xA954, 0x33D5, 0xA955, 0xFE30, 0xA956, 0xFFE2,
07177     0xA957, 0xFFE4, 0xA959, 0x2121, 0xA95A, 0x3231, 0xA95C, 0x2010,
07178     0xA960, 0x30FC, 0xA961, 0x309B, 0xA962, 0x309C, 0xA963, 0x30FD,
07179     0xA964, 0x30FE, 0xA965, 0x3006, 0xA966, 0x309D, 0xA967, 0x309E,
07180     0xA968, 0xFE49, 0xA969, 0xFE4A, 0xA96A, 0xFE4B, 0xA96B, 0xFE4C,
07181     0xA96C, 0xFE4D, 0xA96D, 0xFE4E, 0xA96E, 0xFE4F, 0xA96F, 0xFE50,
07182     0xA970, 0xFE51, 0xA971, 0xFE52, 0xA972, 0xFE54, 0xA973, 0xFE55,
07183     0xA974, 0xFE56, 0xA975, 0xFE57, 0xA976, 0xFE59, 0xA977, 0xFE5A,
07184     0xA978, 0xFE5B, 0xA979, 0xFE5C, 0xA97A, 0xFE5D, 0xA97B, 0xFE5E,
07185     0xA97C, 0xFE5F, 0xA97D, 0xFE60, 0xA97E, 0xFE61, 0xA980, 0xFE62,
07186     0xA981, 0xFE63, 0xA982, 0xFE64, 0xA983, 0xFE65, 0xA984, 0xFE66,
07187     0xA985, 0xFE68, 0xA986, 0xFE69, 0xA987, 0xFE6A, 0xA988, 0xFE6B,
07188     0xA996, 0x3007, 0xA9A4, 0x2500, 0xA9A5, 0x2501, 0xA9A6, 0x2502,
07189     0xA9A7, 0x2503, 0xA9A8, 0x2504, 0xA9A9, 0x2505, 0xA9AA, 0x2506,
07190     0xA9AB, 0x2507, 0xA9AC, 0x2508, 0xA9AD, 0x2509, 0xA9AE, 0x250A,
07191     0xA9AF, 0x250B, 0xA9B0, 0x250C, 0xA9B1, 0x250D, 0xA9B2, 0x250E,
07192     0xA9B3, 0x250F, 0xA9B4, 0x2510, 0xA9B5, 0x2511, 0xA9B6, 0x2512,
07193     0xA9B7, 0x2513, 0xA9B8, 0x2514, 0xA9B9, 0x2515, 0xA9BA, 0x2516,
07194     0xA9BB, 0x2517, 0xA9BC, 0x2518, 0xA9BD, 0x2519, 0xA9BE, 0x251A,
07195     0xA9BF, 0x251B, 0xA9C0, 0x251C, 0xA9C1, 0x251D, 0xA9C2, 0x251E,
07196     0xA9C3, 0x251F, 0xA9C4, 0x2520, 0xA9C5, 0x2521, 0xA9C6, 0x2522,
07197     0xA9C7, 0x2523, 0xA9C8, 0x2524, 0xA9C9, 0x2525, 0xA9CA, 0x2526,
07198     0xA9CB, 0x2527, 0xA9CC, 0x2528, 0xA9CD, 0x2529, 0xA9CE, 0x252A,
07199     0xA9CF, 0x252B, 0xA9D0, 0x252C, 0xA9D1, 0x252D, 0xA9D2, 0x252E,
07200     0xA9D3, 0x252F, 0xA9D4, 0x2530, 0xA9D5, 0x2531, 0xA9D6, 0x2532,
07201     0xA9D7, 0x2533, 0xA9D8, 0x2534, 0xA9D9, 0x2535, 0xA9DA, 0x2536,
07202     0xA9DB, 0x2537, 0xA9DC, 0x2538, 0xA9DD, 0x2539, 0xA9DE, 0x253A,
07203     0xA9DF, 0x253B, 0xA9E0, 0x253C, 0xA9E1, 0x253D, 0xA9E2, 0x253E,
07204     0xA9E3, 0x253F, 0xA9E4, 0x2540, 0xA9E5, 0x2541, 0xA9E6, 0x2542,
07205     0xA9E7, 0x2543, 0xA9E8, 0x2544, 0xA9E9, 0x2545, 0xA9EA, 0x2546,
07206     0xA9EB, 0x2547, 0xA9EC, 0x2548, 0xA9ED, 0x2549, 0xA9EE, 0x254A,
07207     0xA9EF, 0x254B, 0xAA40, 0x72DC, 0xAA41, 0x72DD, 0xAA42, 0x72DF,
07208     0xAA43, 0x72E2, 0xAA44, 0x72E3, 0xAA45, 0x72E4, 0xAA46, 0x72E5,
07209     0xAA47, 0x72E6, 0xAA48, 0x72E7, 0xAA49, 0x72EA, 0xAA4A, 0x72EB,
07210     0xAA4B, 0x72F5, 0xAA4C, 0x72F6, 0xAA4D, 0x72F9, 0xAA4E, 0x72FD,
07211     0xAA4F, 0x72FE, 0xAA50, 0x72FF, 0xAA51, 0x7300, 0xAA52, 0x7302,
07212     0xAA53, 0x7304, 0xAA54, 0x7305, 0xAA55, 0x7306, 0xAA56, 0x7307,
07213     0xAA57, 0x7308, 0xAA58, 0x7309, 0xAA59, 0x730B, 0xAA5A, 0x730C,
07214     0xAA5B, 0x730D, 0xAA5C, 0x730F, 0xAA5D, 0x7310, 0xAA5E, 0x7311,
07215     0xAA5F, 0x7312, 0xAA60, 0x7314, 0xAA61, 0x7318, 0xAA62, 0x7319,
07216     0xAA63, 0x731A, 0xAA64, 0x731F, 0xAA65, 0x7320, 0xAA66, 0x7323,
07217     0xAA67, 0x7324, 0xAA68, 0x7326, 0xAA69, 0x7327, 0xAA6A, 0x7328,
07218     0xAA6B, 0x732D, 0xAA6C, 0x732F, 0xAA6D, 0x7330, 0xAA6E, 0x7332,
07219     0xAA6F, 0x7333, 0xAA70, 0x7335, 0xAA71, 0x7336, 0xAA72, 0x733A,
07220     0xAA73, 0x733B, 0xAA74, 0x733C, 0xAA75, 0x733D, 0xAA76, 0x7340,
07221     0xAA77, 0x7341, 0xAA78, 0x7342, 0xAA79, 0x7343, 0xAA7A, 0x7344,
07222     0xAA7B, 0x7345, 0xAA7C, 0x7346, 0xAA7D, 0x7347, 0xAA7E, 0x7348,
07223     0xAA80, 0x7349, 0xAA81, 0x734A, 0xAA82, 0x734B, 0xAA83, 0x734C,
07224     0xAA84, 0x734E, 0xAA85, 0x734F, 0xAA86, 0x7351, 0xAA87, 0x7353,
07225     0xAA88, 0x7354, 0xAA89, 0x7355, 0xAA8A, 0x7356, 0xAA8B, 0x7358,
07226     0xAA8C, 0x7359, 0xAA8D, 0x735A, 0xAA8E, 0x735B, 0xAA8F, 0x735C,
07227     0xAA90, 0x735D, 0xAA91, 0x735E, 0xAA92, 0x735F, 0xAA93, 0x7361,
07228     0xAA94, 0x7362, 0xAA95, 0x7363, 0xAA96, 0x7364, 0xAA97, 0x7365,
07229     0xAA98, 0x7366, 0xAA99, 0x7367, 0xAA9A, 0x7368, 0xAA9B, 0x7369,
07230     0xAA9C, 0x736A, 0xAA9D, 0x736B, 0xAA9E, 0x736E, 0xAA9F, 0x7370,
07231     0xAAA0, 0x7371, 0xAB40, 0x7372, 0xAB41, 0x7373, 0xAB42, 0x7374,
07232     0xAB43, 0x7375, 0xAB44, 0x7376, 0xAB45, 0x7377, 0xAB46, 0x7378,
07233     0xAB47, 0x7379, 0xAB48, 0x737A, 0xAB49, 0x737B, 0xAB4A, 0x737C,
07234     0xAB4B, 0x737D, 0xAB4C, 0x737F, 0xAB4D, 0x7380, 0xAB4E, 0x7381,
07235     0xAB4F, 0x7382, 0xAB50, 0x7383, 0xAB51, 0x7385, 0xAB52, 0x7386,
07236     0xAB53, 0x7388, 0xAB54, 0x738A, 0xAB55, 0x738C, 0xAB56, 0x738D,
07237     0xAB57, 0x738F, 0xAB58, 0x7390, 0xAB59, 0x7392, 0xAB5A, 0x7393,
07238     0xAB5B, 0x7394, 0xAB5C, 0x7395, 0xAB5D, 0x7397, 0xAB5E, 0x7398,
07239     0xAB5F, 0x7399, 0xAB60, 0x739A, 0xAB61, 0x739C, 0xAB62, 0x739D,
07240     0xAB63, 0x739E, 0xAB64, 0x73A0, 0xAB65, 0x73A1, 0xAB66, 0x73A3,
07241     0xAB67, 0x73A4, 0xAB68, 0x73A5, 0xAB69, 0x73A6, 0xAB6A, 0x73A7,
07242     0xAB6B, 0x73A8, 0xAB6C, 0x73AA, 0xAB6D, 0x73AC, 0xAB6E, 0x73AD,
07243     0xAB6F, 0x73B1, 0xAB70, 0x73B4, 0xAB71, 0x73B5, 0xAB72, 0x73B6,
07244     0xAB73, 0x73B8, 0xAB74, 0x73B9, 0xAB75, 0x73BC, 0xAB76, 0x73BD,
07245     0xAB77, 0x73BE, 0xAB78, 0x73BF, 0xAB79, 0x73C1, 0xAB7A, 0x73C3,
07246     0xAB7B, 0x73C4, 0xAB7C, 0x73C5, 0xAB7D, 0x73C6, 0xAB7E, 0x73C7,
07247     0xAB80, 0x73CB, 0xAB81, 0x73CC, 0xAB82, 0x73CE, 0xAB83, 0x73D2,
07248     0xAB84, 0x73D3, 0xAB85, 0x73D4, 0xAB86, 0x73D5, 0xAB87, 0x73D6,
07249     0xAB88, 0x73D7, 0xAB89, 0x73D8, 0xAB8A, 0x73DA, 0xAB8B, 0x73DB,
07250     0xAB8C, 0x73DC, 0xAB8D, 0x73DD, 0xAB8E, 0x73DF, 0xAB8F, 0x73E1,
07251     0xAB90, 0x73E2, 0xAB91, 0x73E3, 0xAB92, 0x73E4, 0xAB93, 0x73E6,
07252     0xAB94, 0x73E8, 0xAB95, 0x73EA, 0xAB96, 0x73EB, 0xAB97, 0x73EC,
07253     0xAB98, 0x73EE, 0xAB99, 0x73EF, 0xAB9A, 0x73F0, 0xAB9B, 0x73F1,
07254     0xAB9C, 0x73F3, 0xAB9D, 0x73F4, 0xAB9E, 0x73F5, 0xAB9F, 0x73F6,
07255     0xABA0, 0x73F7, 0xAC40, 0x73F8, 0xAC41, 0x73F9, 0xAC42, 0x73FA,
07256     0xAC43, 0x73FB, 0xAC44, 0x73FC, 0xAC45, 0x73FD, 0xAC46, 0x73FE,
07257     0xAC47, 0x73FF, 0xAC48, 0x7400, 0xAC49, 0x7401, 0xAC4A, 0x7402,
07258     0xAC4B, 0x7404, 0xAC4C, 0x7407, 0xAC4D, 0x7408, 0xAC4E, 0x740B,
07259     0xAC4F, 0x740C, 0xAC50, 0x740D, 0xAC51, 0x740E, 0xAC52, 0x7411,
07260     0xAC53, 0x7412, 0xAC54, 0x7413, 0xAC55, 0x7414, 0xAC56, 0x7415,
07261     0xAC57, 0x7416, 0xAC58, 0x7417, 0xAC59, 0x7418, 0xAC5A, 0x7419,
07262     0xAC5B, 0x741C, 0xAC5C, 0x741D, 0xAC5D, 0x741E, 0xAC5E, 0x741F,
07263     0xAC5F, 0x7420, 0xAC60, 0x7421, 0xAC61, 0x7423, 0xAC62, 0x7424,
07264     0xAC63, 0x7427, 0xAC64, 0x7429, 0xAC65, 0x742B, 0xAC66, 0x742D,
07265     0xAC67, 0x742F, 0xAC68, 0x7431, 0xAC69, 0x7432, 0xAC6A, 0x7437,
07266     0xAC6B, 0x7438, 0xAC6C, 0x7439, 0xAC6D, 0x743A, 0xAC6E, 0x743B,
07267     0xAC6F, 0x743D, 0xAC70, 0x743E, 0xAC71, 0x743F, 0xAC72, 0x7440,
07268     0xAC73, 0x7442, 0xAC74, 0x7443, 0xAC75, 0x7444, 0xAC76, 0x7445,
07269     0xAC77, 0x7446, 0xAC78, 0x7447, 0xAC79, 0x7448, 0xAC7A, 0x7449,
07270     0xAC7B, 0x744A, 0xAC7C, 0x744B, 0xAC7D, 0x744C, 0xAC7E, 0x744D,
07271     0xAC80, 0x744E, 0xAC81, 0x744F, 0xAC82, 0x7450, 0xAC83, 0x7451,
07272     0xAC84, 0x7452, 0xAC85, 0x7453, 0xAC86, 0x7454, 0xAC87, 0x7456,
07273     0xAC88, 0x7458, 0xAC89, 0x745D, 0xAC8A, 0x7460, 0xAC8B, 0x7461,
07274     0xAC8C, 0x7462, 0xAC8D, 0x7463, 0xAC8E, 0x7464, 0xAC8F, 0x7465,
07275     0xAC90, 0x7466, 0xAC91, 0x7467, 0xAC92, 0x7468, 0xAC93, 0x7469,
07276     0xAC94, 0x746A, 0xAC95, 0x746B, 0xAC96, 0x746C, 0xAC97, 0x746E,
07277     0xAC98, 0x746F, 0xAC99, 0x7471, 0xAC9A, 0x7472, 0xAC9B, 0x7473,
07278     0xAC9C, 0x7474, 0xAC9D, 0x7475, 0xAC9E, 0x7478, 0xAC9F, 0x7479,
07279     0xACA0, 0x747A, 0xAD40, 0x747B, 0xAD41, 0x747C, 0xAD42, 0x747D,
07280     0xAD43, 0x747F, 0xAD44, 0x7482, 0xAD45, 0x7484, 0xAD46, 0x7485,
07281     0xAD47, 0x7486, 0xAD48, 0x7488, 0xAD49, 0x7489, 0xAD4A, 0x748A,
07282     0xAD4B, 0x748C, 0xAD4C, 0x748D, 0xAD4D, 0x748F, 0xAD4E, 0x7491,
07283     0xAD4F, 0x7492, 0xAD50, 0x7493, 0xAD51, 0x7494, 0xAD52, 0x7495,
07284     0xAD53, 0x7496, 0xAD54, 0x7497, 0xAD55, 0x7498, 0xAD56, 0x7499,
07285     0xAD57, 0x749A, 0xAD58, 0x749B, 0xAD59, 0x749D, 0xAD5A, 0x749F,
07286     0xAD5B, 0x74A0, 0xAD5C, 0x74A1, 0xAD5D, 0x74A2, 0xAD5E, 0x74A3,
07287     0xAD5F, 0x74A4, 0xAD60, 0x74A5, 0xAD61, 0x74A6, 0xAD62, 0x74AA,
07288     0xAD63, 0x74AB, 0xAD64, 0x74AC, 0xAD65, 0x74AD, 0xAD66, 0x74AE,
07289     0xAD67, 0x74AF, 0xAD68, 0x74B0, 0xAD69, 0x74B1, 0xAD6A, 0x74B2,
07290     0xAD6B, 0x74B3, 0xAD6C, 0x74B4, 0xAD6D, 0x74B5, 0xAD6E, 0x74B6,
07291     0xAD6F, 0x74B7, 0xAD70, 0x74B8, 0xAD71, 0x74B9, 0xAD72, 0x74BB,
07292     0xAD73, 0x74BC, 0xAD74, 0x74BD, 0xAD75, 0x74BE, 0xAD76, 0x74BF,
07293     0xAD77, 0x74C0, 0xAD78, 0x74C1, 0xAD79, 0x74C2, 0xAD7A, 0x74C3,
07294     0xAD7B, 0x74C4, 0xAD7C, 0x74C5, 0xAD7D, 0x74C6, 0xAD7E, 0x74C7,
07295     0xAD80, 0x74C8, 0xAD81, 0x74C9, 0xAD82, 0x74CA, 0xAD83, 0x74CB,
07296     0xAD84, 0x74CC, 0xAD85, 0x74CD, 0xAD86, 0x74CE, 0xAD87, 0x74CF,
07297     0xAD88, 0x74D0, 0xAD89, 0x74D1, 0xAD8A, 0x74D3, 0xAD8B, 0x74D4,
07298     0xAD8C, 0x74D5, 0xAD8D, 0x74D6, 0xAD8E, 0x74D7, 0xAD8F, 0x74D8,
07299     0xAD90, 0x74D9, 0xAD91, 0x74DA, 0xAD92, 0x74DB, 0xAD93, 0x74DD,
07300     0xAD94, 0x74DF, 0xAD95, 0x74E1, 0xAD96, 0x74E5, 0xAD97, 0x74E7,
07301     0xAD98, 0x74E8, 0xAD99, 0x74E9, 0xAD9A, 0x74EA, 0xAD9B, 0x74EB,
07302     0xAD9C, 0x74EC, 0xAD9D, 0x74ED, 0xAD9E, 0x74F0, 0xAD9F, 0x74F1,
07303     0xADA0, 0x74F2, 0xAE40, 0x74F3, 0xAE41, 0x74F5, 0xAE42, 0x74F8,
07304     0xAE43, 0x74F9, 0xAE44, 0x74FA, 0xAE45, 0x74FB, 0xAE46, 0x74FC,
07305     0xAE47, 0x74FD, 0xAE48, 0x74FE, 0xAE49, 0x7500, 0xAE4A, 0x7501,
07306     0xAE4B, 0x7502, 0xAE4C, 0x7503, 0xAE4D, 0x7505, 0xAE4E, 0x7506,
07307     0xAE4F, 0x7507, 0xAE50, 0x7508, 0xAE51, 0x7509, 0xAE52, 0x750A,
07308     0xAE53, 0x750B, 0xAE54, 0x750C, 0xAE55, 0x750E, 0xAE56, 0x7510,
07309     0xAE57, 0x7512, 0xAE58, 0x7514, 0xAE59, 0x7515, 0xAE5A, 0x7516,
07310     0xAE5B, 0x7517, 0xAE5C, 0x751B, 0xAE5D, 0x751D, 0xAE5E, 0x751E,
07311     0xAE5F, 0x7520, 0xAE60, 0x7521, 0xAE61, 0x7522, 0xAE62, 0x7523,
07312     0xAE63, 0x7524, 0xAE64, 0x7526, 0xAE65, 0x7527, 0xAE66, 0x752A,
07313     0xAE67, 0x752E, 0xAE68, 0x7534, 0xAE69, 0x7536, 0xAE6A, 0x7539,
07314     0xAE6B, 0x753C, 0xAE6C, 0x753D, 0xAE6D, 0x753F, 0xAE6E, 0x7541,
07315     0xAE6F, 0x7542, 0xAE70, 0x7543, 0xAE71, 0x7544, 0xAE72, 0x7546,
07316     0xAE73, 0x7547, 0xAE74, 0x7549, 0xAE75, 0x754A, 0xAE76, 0x754D,
07317     0xAE77, 0x7550, 0xAE78, 0x7551, 0xAE79, 0x7552, 0xAE7A, 0x7553,
07318     0xAE7B, 0x7555, 0xAE7C, 0x7556, 0xAE7D, 0x7557, 0xAE7E, 0x7558,
07319     0xAE80, 0x755D, 0xAE81, 0x755E, 0xAE82, 0x755F, 0xAE83, 0x7560,
07320     0xAE84, 0x7561, 0xAE85, 0x7562, 0xAE86, 0x7563, 0xAE87, 0x7564,
07321     0xAE88, 0x7567, 0xAE89, 0x7568, 0xAE8A, 0x7569, 0xAE8B, 0x756B,
07322     0xAE8C, 0x756C, 0xAE8D, 0x756D, 0xAE8E, 0x756E, 0xAE8F, 0x756F,
07323     0xAE90, 0x7570, 0xAE91, 0x7571, 0xAE92, 0x7573, 0xAE93, 0x7575,
07324     0xAE94, 0x7576, 0xAE95, 0x7577, 0xAE96, 0x757A, 0xAE97, 0x757B,
07325     0xAE98, 0x757C, 0xAE99, 0x757D, 0xAE9A, 0x757E, 0xAE9B, 0x7580,
07326     0xAE9C, 0x7581, 0xAE9D, 0x7582, 0xAE9E, 0x7584, 0xAE9F, 0x7585,
07327     0xAEA0, 0x7587, 0xAF40, 0x7588, 0xAF41, 0x7589, 0xAF42, 0x758A,
07328     0xAF43, 0x758C, 0xAF44, 0x758D, 0xAF45, 0x758E, 0xAF46, 0x7590,
07329     0xAF47, 0x7593, 0xAF48, 0x7595, 0xAF49, 0x7598, 0xAF4A, 0x759B,
07330     0xAF4B, 0x759C, 0xAF4C, 0x759E, 0xAF4D, 0x75A2, 0xAF4E, 0x75A6,
07331     0xAF4F, 0x75A7, 0xAF50, 0x75A8, 0xAF51, 0x75A9, 0xAF52, 0x75AA,
07332     0xAF53, 0x75AD, 0xAF54, 0x75B6, 0xAF55, 0x75B7, 0xAF56, 0x75BA,
07333     0xAF57, 0x75BB, 0xAF58, 0x75BF, 0xAF59, 0x75C0, 0xAF5A, 0x75C1,
07334     0xAF5B, 0x75C6, 0xAF5C, 0x75CB, 0xAF5D, 0x75CC, 0xAF5E, 0x75CE,
07335     0xAF5F, 0x75CF, 0xAF60, 0x75D0, 0xAF61, 0x75D1, 0xAF62, 0x75D3,
07336     0xAF63, 0x75D7, 0xAF64, 0x75D9, 0xAF65, 0x75DA, 0xAF66, 0x75DC,
07337     0xAF67, 0x75DD, 0xAF68, 0x75DF, 0xAF69, 0x75E0, 0xAF6A, 0x75E1,
07338     0xAF6B, 0x75E5, 0xAF6C, 0x75E9, 0xAF6D, 0x75EC, 0xAF6E, 0x75ED,
07339     0xAF6F, 0x75EE, 0xAF70, 0x75EF, 0xAF71, 0x75F2, 0xAF72, 0x75F3,
07340     0xAF73, 0x75F5, 0xAF74, 0x75F6, 0xAF75, 0x75F7, 0xAF76, 0x75F8,
07341     0xAF77, 0x75FA, 0xAF78, 0x75FB, 0xAF79, 0x75FD, 0xAF7A, 0x75FE,
07342     0xAF7B, 0x7602, 0xAF7C, 0x7604, 0xAF7D, 0x7606, 0xAF7E, 0x7607,
07343     0xAF80, 0x7608, 0xAF81, 0x7609, 0xAF82, 0x760B, 0xAF83, 0x760D,
07344     0xAF84, 0x760E, 0xAF85, 0x760F, 0xAF86, 0x7611, 0xAF87, 0x7612,
07345     0xAF88, 0x7613, 0xAF89, 0x7614, 0xAF8A, 0x7616, 0xAF8B, 0x761A,
07346     0xAF8C, 0x761C, 0xAF8D, 0x761D, 0xAF8E, 0x761E, 0xAF8F, 0x7621,
07347     0xAF90, 0x7623, 0xAF91, 0x7627, 0xAF92, 0x7628, 0xAF93, 0x762C,
07348     0xAF94, 0x762E, 0xAF95, 0x762F, 0xAF96, 0x7631, 0xAF97, 0x7632,
07349     0xAF98, 0x7636, 0xAF99, 0x7637, 0xAF9A, 0x7639, 0xAF9B, 0x763A,
07350     0xAF9C, 0x763B, 0xAF9D, 0x763D, 0xAF9E, 0x7641, 0xAF9F, 0x7642,
07351     0xAFA0, 0x7644, 0xB040, 0x7645, 0xB041, 0x7646, 0xB042, 0x7647,
07352     0xB043, 0x7648, 0xB044, 0x7649, 0xB045, 0x764A, 0xB046, 0x764B,
07353     0xB047, 0x764E, 0xB048, 0x764F, 0xB049, 0x7650, 0xB04A, 0x7651,
07354     0xB04B, 0x7652, 0xB04C, 0x7653, 0xB04D, 0x7655, 0xB04E, 0x7657,
07355     0xB04F, 0x7658, 0xB050, 0x7659, 0xB051, 0x765A, 0xB052, 0x765B,
07356     0xB053, 0x765D, 0xB054, 0x765F, 0xB055, 0x7660, 0xB056, 0x7661,
07357     0xB057, 0x7662, 0xB058, 0x7664, 0xB059, 0x7665, 0xB05A, 0x7666,
07358     0xB05B, 0x7667, 0xB05C, 0x7668, 0xB05D, 0x7669, 0xB05E, 0x766A,
07359     0xB05F, 0x766C, 0xB060, 0x766D, 0xB061, 0x766E, 0xB062, 0x7670,
07360     0xB063, 0x7671, 0xB064, 0x7672, 0xB065, 0x7673, 0xB066, 0x7674,
07361     0xB067, 0x7675, 0xB068, 0x7676, 0xB069, 0x7677, 0xB06A, 0x7679,
07362     0xB06B, 0x767A, 0xB06C, 0x767C, 0xB06D, 0x767F, 0xB06E, 0x7680,
07363     0xB06F, 0x7681, 0xB070, 0x7683, 0xB071, 0x7685, 0xB072, 0x7689,
07364     0xB073, 0x768A, 0xB074, 0x768C, 0xB075, 0x768D, 0xB076, 0x768F,
07365     0xB077, 0x7690, 0xB078, 0x7692, 0xB079, 0x7694, 0xB07A, 0x7695,
07366     0xB07B, 0x7697, 0xB07C, 0x7698, 0xB07D, 0x769A, 0xB07E, 0x769B,
07367     0xB080, 0x769C, 0xB081, 0x769D, 0xB082, 0x769E, 0xB083, 0x769F,
07368     0xB084, 0x76A0, 0xB085, 0x76A1, 0xB086, 0x76A2, 0xB087, 0x76A3,
07369     0xB088, 0x76A5, 0xB089, 0x76A6, 0xB08A, 0x76A7, 0xB08B, 0x76A8,
07370     0xB08C, 0x76A9, 0xB08D, 0x76AA, 0xB08E, 0x76AB, 0xB08F, 0x76AC,
07371     0xB090, 0x76AD, 0xB091, 0x76AF, 0xB092, 0x76B0, 0xB093, 0x76B3,
07372     0xB094, 0x76B5, 0xB095, 0x76B6, 0xB096, 0x76B7, 0xB097, 0x76B8,
07373     0xB098, 0x76B9, 0xB099, 0x76BA, 0xB09A, 0x76BB, 0xB09B, 0x76BC,
07374     0xB09C, 0x76BD, 0xB09D, 0x76BE, 0xB09E, 0x76C0, 0xB09F, 0x76C1,
07375     0xB0A0, 0x76C3, 0xB0A1, 0x554A, 0xB0A2, 0x963F, 0xB0A3, 0x57C3,
07376     0xB0A4, 0x6328, 0xB0A5, 0x54CE, 0xB0A6, 0x5509, 0xB0A7, 0x54C0,
07377     0xB0A8, 0x7691, 0xB0A9, 0x764C, 0xB0AA, 0x853C, 0xB0AB, 0x77EE,
07378     0xB0AC, 0x827E, 0xB0AD, 0x788D, 0xB0AE, 0x7231, 0xB0AF, 0x9698,
07379     0xB0B0, 0x978D, 0xB0B1, 0x6C28, 0xB0B2, 0x5B89, 0xB0B3, 0x4FFA,
07380     0xB0B4, 0x6309, 0xB0B5, 0x6697, 0xB0B6, 0x5CB8, 0xB0B7, 0x80FA,
07381     0xB0B8, 0x6848, 0xB0B9, 0x80AE, 0xB0BA, 0x6602, 0xB0BB, 0x76CE,
07382     0xB0BC, 0x51F9, 0xB0BD, 0x6556, 0xB0BE, 0x71AC, 0xB0BF, 0x7FF1,
07383     0xB0C0, 0x8884, 0xB0C1, 0x50B2, 0xB0C2, 0x5965, 0xB0C3, 0x61CA,
07384     0xB0C4, 0x6FB3, 0xB0C5, 0x82AD, 0xB0C6, 0x634C, 0xB0C7, 0x6252,
07385     0xB0C8, 0x53ED, 0xB0C9, 0x5427, 0xB0CA, 0x7B06, 0xB0CB, 0x516B,
07386     0xB0CC, 0x75A4, 0xB0CD, 0x5DF4, 0xB0CE, 0x62D4, 0xB0CF, 0x8DCB,
07387     0xB0D0, 0x9776, 0xB0D1, 0x628A, 0xB0D2, 0x8019, 0xB0D3, 0x575D,
07388     0xB0D4, 0x9738, 0xB0D5, 0x7F62, 0xB0D6, 0x7238, 0xB0D7, 0x767D,
07389     0xB0D8, 0x67CF, 0xB0D9, 0x767E, 0xB0DA, 0x6446, 0xB0DB, 0x4F70,
07390     0xB0DC, 0x8D25, 0xB0DD, 0x62DC, 0xB0DE, 0x7A17, 0xB0DF, 0x6591,
07391     0xB0E0, 0x73ED, 0xB0E1, 0x642C, 0xB0E2, 0x6273, 0xB0E3, 0x822C,
07392     0xB0E4, 0x9881, 0xB0E5, 0x677F, 0xB0E6, 0x7248, 0xB0E7, 0x626E,
07393     0xB0E8, 0x62CC, 0xB0E9, 0x4F34, 0xB0EA, 0x74E3, 0xB0EB, 0x534A,
07394     0xB0EC, 0x529E, 0xB0ED, 0x7ECA, 0xB0EE, 0x90A6, 0xB0EF, 0x5E2E,
07395     0xB0F0, 0x6886, 0xB0F1, 0x699C, 0xB0F2, 0x8180, 0xB0F3, 0x7ED1,
07396     0xB0F4, 0x68D2, 0xB0F5, 0x78C5, 0xB0F6, 0x868C, 0xB0F7, 0x9551,
07397     0xB0F8, 0x508D, 0xB0F9, 0x8C24, 0xB0FA, 0x82DE, 0xB0FB, 0x80DE,
07398     0xB0FC, 0x5305, 0xB0FD, 0x8912, 0xB0FE, 0x5265, 0xB140, 0x76C4,
07399     0xB141, 0x76C7, 0xB142, 0x76C9, 0xB143, 0x76CB, 0xB144, 0x76CC,
07400     0xB145, 0x76D3, 0xB146, 0x76D5, 0xB147, 0x76D9, 0xB148, 0x76DA,
07401     0xB149, 0x76DC, 0xB14A, 0x76DD, 0xB14B, 0x76DE, 0xB14C, 0x76E0,
07402     0xB14D, 0x76E1, 0xB14E, 0x76E2, 0xB14F, 0x76E3, 0xB150, 0x76E4,
07403     0xB151, 0x76E6, 0xB152, 0x76E7, 0xB153, 0x76E8, 0xB154, 0x76E9,
07404     0xB155, 0x76EA, 0xB156, 0x76EB, 0xB157, 0x76EC, 0xB158, 0x76ED,
07405     0xB159, 0x76F0, 0xB15A, 0x76F3, 0xB15B, 0x76F5, 0xB15C, 0x76F6,
07406     0xB15D, 0x76F7, 0xB15E, 0x76FA, 0xB15F, 0x76FB, 0xB160, 0x76FD,
07407     0xB161, 0x76FF, 0xB162, 0x7700, 0xB163, 0x7702, 0xB164, 0x7703,
07408     0xB165, 0x7705, 0xB166, 0x7706, 0xB167, 0x770A, 0xB168, 0x770C,
07409     0xB169, 0x770E, 0xB16A, 0x770F, 0xB16B, 0x7710, 0xB16C, 0x7711,
07410     0xB16D, 0x7712, 0xB16E, 0x7713, 0xB16F, 0x7714, 0xB170, 0x7715,
07411     0xB171, 0x7716, 0xB172, 0x7717, 0xB173, 0x7718, 0xB174, 0x771B,
07412     0xB175, 0x771C, 0xB176, 0x771D, 0xB177, 0x771E, 0xB178, 0x7721,
07413     0xB179, 0x7723, 0xB17A, 0x7724, 0xB17B, 0x7725, 0xB17C, 0x7727,
07414     0xB17D, 0x772A, 0xB17E, 0x772B, 0xB180, 0x772C, 0xB181, 0x772E,
07415     0xB182, 0x7730, 0xB183, 0x7731, 0xB184, 0x7732, 0xB185, 0x7733,
07416     0xB186, 0x7734, 0xB187, 0x7739, 0xB188, 0x773B, 0xB189, 0x773D,
07417     0xB18A, 0x773E, 0xB18B, 0x773F, 0xB18C, 0x7742, 0xB18D, 0x7744,
07418     0xB18E, 0x7745, 0xB18F, 0x7746, 0xB190, 0x7748, 0xB191, 0x7749,
07419     0xB192, 0x774A, 0xB193, 0x774B, 0xB194, 0x774C, 0xB195, 0x774D,
07420     0xB196, 0x774E, 0xB197, 0x774F, 0xB198, 0x7752, 0xB199, 0x7753,
07421     0xB19A, 0x7754, 0xB19B, 0x7755, 0xB19C, 0x7756, 0xB19D, 0x7757,
07422     0xB19E, 0x7758, 0xB19F, 0x7759, 0xB1A0, 0x775C, 0xB1A1, 0x8584,
07423     0xB1A2, 0x96F9, 0xB1A3, 0x4FDD, 0xB1A4, 0x5821, 0xB1A5, 0x9971,
07424     0xB1A6, 0x5B9D, 0xB1A7, 0x62B1, 0xB1A8, 0x62A5, 0xB1A9, 0x66B4,
07425     0xB1AA, 0x8C79, 0xB1AB, 0x9C8D, 0xB1AC, 0x7206, 0xB1AD, 0x676F,
07426     0xB1AE, 0x7891, 0xB1AF, 0x60B2, 0xB1B0, 0x5351, 0xB1B1, 0x5317,
07427     0xB1B2, 0x8F88, 0xB1B3, 0x80CC, 0xB1B4, 0x8D1D, 0xB1B5, 0x94A1,
07428     0xB1B6, 0x500D, 0xB1B7, 0x72C8, 0xB1B8, 0x5907, 0xB1B9, 0x60EB,
07429     0xB1BA, 0x7119, 0xB1BB, 0x88AB, 0xB1BC, 0x5954, 0xB1BD, 0x82EF,
07430     0xB1BE, 0x672C, 0xB1BF, 0x7B28, 0xB1C0, 0x5D29, 0xB1C1, 0x7EF7,
07431     0xB1C2, 0x752D, 0xB1C3, 0x6CF5, 0xB1C4, 0x8E66, 0xB1C5, 0x8FF8,
07432     0xB1C6, 0x903C, 0xB1C7, 0x9F3B, 0xB1C8, 0x6BD4, 0xB1C9, 0x9119,
07433     0xB1CA, 0x7B14, 0xB1CB, 0x5F7C, 0xB1CC, 0x78A7, 0xB1CD, 0x84D6,
07434     0xB1CE, 0x853D, 0xB1CF, 0x6BD5, 0xB1D0, 0x6BD9, 0xB1D1, 0x6BD6,
07435     0xB1D2, 0x5E01, 0xB1D3, 0x5E87, 0xB1D4, 0x75F9, 0xB1D5, 0x95ED,
07436     0xB1D6, 0x655D, 0xB1D7, 0x5F0A, 0xB1D8, 0x5FC5, 0xB1D9, 0x8F9F,
07437     0xB1DA, 0x58C1, 0xB1DB, 0x81C2, 0xB1DC, 0x907F, 0xB1DD, 0x965B,
07438     0xB1DE, 0x97AD, 0xB1DF, 0x8FB9, 0xB1E0, 0x7F16, 0xB1E1, 0x8D2C,
07439     0xB1E2, 0x6241, 0xB1E3, 0x4FBF, 0xB1E4, 0x53D8, 0xB1E5, 0x535E,
07440     0xB1E6, 0x8FA8, 0xB1E7, 0x8FA9, 0xB1E8, 0x8FAB, 0xB1E9, 0x904D,
07441     0xB1EA, 0x6807, 0xB1EB, 0x5F6A, 0xB1EC, 0x8198, 0xB1ED, 0x8868,
07442     0xB1EE, 0x9CD6, 0xB1EF, 0x618B, 0xB1F0, 0x522B, 0xB1F1, 0x762A,
07443     0xB1F2, 0x5F6C, 0xB1F3, 0x658C, 0xB1F4, 0x6FD2, 0xB1F5, 0x6EE8,
07444     0xB1F6, 0x5BBE, 0xB1F7, 0x6448, 0xB1F8, 0x5175, 0xB1F9, 0x51B0,
07445     0xB1FA, 0x67C4, 0xB1FB, 0x4E19, 0xB1FC, 0x79C9, 0xB1FD, 0x997C,
07446     0xB1FE, 0x70B3, 0xB240, 0x775D, 0xB241, 0x775E, 0xB242, 0x775F,
07447     0xB243, 0x7760, 0xB244, 0x7764, 0xB245, 0x7767, 0xB246, 0x7769,
07448     0xB247, 0x776A, 0xB248, 0x776D, 0xB249, 0x776E, 0xB24A, 0x776F,
07449     0xB24B, 0x7770, 0xB24C, 0x7771, 0xB24D, 0x7772, 0xB24E, 0x7773,
07450     0xB24F, 0x7774, 0xB250, 0x7775, 0xB251, 0x7776, 0xB252, 0x7777,
07451     0xB253, 0x7778, 0xB254, 0x777A, 0xB255, 0x777B, 0xB256, 0x777C,
07452     0xB257, 0x7781, 0xB258, 0x7782, 0xB259, 0x7783, 0xB25A, 0x7786,
07453     0xB25B, 0x7787, 0xB25C, 0x7788, 0xB25D, 0x7789, 0xB25E, 0x778A,
07454     0xB25F, 0x778B, 0xB260, 0x778F, 0xB261, 0x7790, 0xB262, 0x7793,
07455     0xB263, 0x7794, 0xB264, 0x7795, 0xB265, 0x7796, 0xB266, 0x7797,
07456     0xB267, 0x7798, 0xB268, 0x7799, 0xB269, 0x779A, 0xB26A, 0x779B,
07457     0xB26B, 0x779C, 0xB26C, 0x779D, 0xB26D, 0x779E, 0xB26E, 0x77A1,
07458     0xB26F, 0x77A3, 0xB270, 0x77A4, 0xB271, 0x77A6, 0xB272, 0x77A8,
07459     0xB273, 0x77AB, 0xB274, 0x77AD, 0xB275, 0x77AE, 0xB276, 0x77AF,
07460     0xB277, 0x77B1, 0xB278, 0x77B2, 0xB279, 0x77B4, 0xB27A, 0x77B6,
07461     0xB27B, 0x77B7, 0xB27C, 0x77B8, 0xB27D, 0x77B9, 0xB27E, 0x77BA,
07462     0xB280, 0x77BC, 0xB281, 0x77BE, 0xB282, 0x77C0, 0xB283, 0x77C1,
07463     0xB284, 0x77C2, 0xB285, 0x77C3, 0xB286, 0x77C4, 0xB287, 0x77C5,
07464     0xB288, 0x77C6, 0xB289, 0x77C7, 0xB28A, 0x77C8, 0xB28B, 0x77C9,
07465     0xB28C, 0x77CA, 0xB28D, 0x77CB, 0xB28E, 0x77CC, 0xB28F, 0x77CE,
07466     0xB290, 0x77CF, 0xB291, 0x77D0, 0xB292, 0x77D1, 0xB293, 0x77D2,
07467     0xB294, 0x77D3, 0xB295, 0x77D4, 0xB296, 0x77D5, 0xB297, 0x77D6,
07468     0xB298, 0x77D8, 0xB299, 0x77D9, 0xB29A, 0x77DA, 0xB29B, 0x77DD,
07469     0xB29C, 0x77DE, 0xB29D, 0x77DF, 0xB29E, 0x77E0, 0xB29F, 0x77E1,
07470     0xB2A0, 0x77E4, 0xB2A1, 0x75C5, 0xB2A2, 0x5E76, 0xB2A3, 0x73BB,
07471     0xB2A4, 0x83E0, 0xB2A5, 0x64AD, 0xB2A6, 0x62E8, 0xB2A7, 0x94B5,
07472     0xB2A8, 0x6CE2, 0xB2A9, 0x535A, 0xB2AA, 0x52C3, 0xB2AB, 0x640F,
07473     0xB2AC, 0x94C2, 0xB2AD, 0x7B94, 0xB2AE, 0x4F2F, 0xB2AF, 0x5E1B,
07474     0xB2B0, 0x8236, 0xB2B1, 0x8116, 0xB2B2, 0x818A, 0xB2B3, 0x6E24,
07475     0xB2B4, 0x6CCA, 0xB2B5, 0x9A73, 0xB2B6, 0x6355, 0xB2B7, 0x535C,
07476     0xB2B8, 0x54FA, 0xB2B9, 0x8865, 0xB2BA, 0x57E0, 0xB2BB, 0x4E0D,
07477     0xB2BC, 0x5E03, 0xB2BD, 0x6B65, 0xB2BE, 0x7C3F, 0xB2BF, 0x90E8,
07478     0xB2C0, 0x6016, 0xB2C1, 0x64E6, 0xB2C2, 0x731C, 0xB2C3, 0x88C1,
07479     0xB2C4, 0x6750, 0xB2C5, 0x624D, 0xB2C6, 0x8D22, 0xB2C7, 0x776C,
07480     0xB2C8, 0x8E29, 0xB2C9, 0x91C7, 0xB2CA, 0x5F69, 0xB2CB, 0x83DC,
07481     0xB2CC, 0x8521, 0xB2CD, 0x9910, 0xB2CE, 0x53C2, 0xB2CF, 0x8695,
07482     0xB2D0, 0x6B8B, 0xB2D1, 0x60ED, 0xB2D2, 0x60E8, 0xB2D3, 0x707F,
07483     0xB2D4, 0x82CD, 0xB2D5, 0x8231, 0xB2D6, 0x4ED3, 0xB2D7, 0x6CA7,
07484     0xB2D8, 0x85CF, 0xB2D9, 0x64CD, 0xB2DA, 0x7CD9, 0xB2DB, 0x69FD,
07485     0xB2DC, 0x66F9, 0xB2DD, 0x8349, 0xB2DE, 0x5395, 0xB2DF, 0x7B56,
07486     0xB2E0, 0x4FA7, 0xB2E1, 0x518C, 0xB2E2, 0x6D4B, 0xB2E3, 0x5C42,
07487     0xB2E4, 0x8E6D, 0xB2E5, 0x63D2, 0xB2E6, 0x53C9, 0xB2E7, 0x832C,
07488     0xB2E8, 0x8336, 0xB2E9, 0x67E5, 0xB2EA, 0x78B4, 0xB2EB, 0x643D,
07489     0xB2EC, 0x5BDF, 0xB2ED, 0x5C94, 0xB2EE, 0x5DEE, 0xB2EF, 0x8BE7,
07490     0xB2F0, 0x62C6, 0xB2F1, 0x67F4, 0xB2F2, 0x8C7A, 0xB2F3, 0x6400,
07491     0xB2F4, 0x63BA, 0xB2F5, 0x8749, 0xB2F6, 0x998B, 0xB2F7, 0x8C17,
07492     0xB2F8, 0x7F20, 0xB2F9, 0x94F2, 0xB2FA, 0x4EA7, 0xB2FB, 0x9610,
07493     0xB2FC, 0x98A4, 0xB2FD, 0x660C, 0xB2FE, 0x7316, 0xB340, 0x77E6,
07494     0xB341, 0x77E8, 0xB342, 0x77EA, 0xB343, 0x77EF, 0xB344, 0x77F0,
07495     0xB345, 0x77F1, 0xB346, 0x77F2, 0xB347, 0x77F4, 0xB348, 0x77F5,
07496     0xB349, 0x77F7, 0xB34A, 0x77F9, 0xB34B, 0x77FA, 0xB34C, 0x77FB,
07497     0xB34D, 0x77FC, 0xB34E, 0x7803, 0xB34F, 0x7804, 0xB350, 0x7805,
07498     0xB351, 0x7806, 0xB352, 0x7807, 0xB353, 0x7808, 0xB354, 0x780A,
07499     0xB355, 0x780B, 0xB356, 0x780E, 0xB357, 0x780F, 0xB358, 0x7810,
07500     0xB359, 0x7813, 0xB35A, 0x7815, 0xB35B, 0x7819, 0xB35C, 0x781B,
07501     0xB35D, 0x781E, 0xB35E, 0x7820, 0xB35F, 0x7821, 0xB360, 0x7822,
07502     0xB361, 0x7824, 0xB362, 0x7828, 0xB363, 0x782A, 0xB364, 0x782B,
07503     0xB365, 0x782E, 0xB366, 0x782F, 0xB367, 0x7831, 0xB368, 0x7832,
07504     0xB369, 0x7833, 0xB36A, 0x7835, 0xB36B, 0x7836, 0xB36C, 0x783D,
07505     0xB36D, 0x783F, 0xB36E, 0x7841, 0xB36F, 0x7842, 0xB370, 0x7843,
07506     0xB371, 0x7844, 0xB372, 0x7846, 0xB373, 0x7848, 0xB374, 0x7849,
07507     0xB375, 0x784A, 0xB376, 0x784B, 0xB377, 0x784D, 0xB378, 0x784F,
07508     0xB379, 0x7851, 0xB37A, 0x7853, 0xB37B, 0x7854, 0xB37C, 0x7858,
07509     0xB37D, 0x7859, 0xB37E, 0x785A, 0xB380, 0x785B, 0xB381, 0x785C,
07510     0xB382, 0x785E, 0xB383, 0x785F, 0xB384, 0x7860, 0xB385, 0x7861,
07511     0xB386, 0x7862, 0xB387, 0x7863, 0xB388, 0x7864, 0xB389, 0x7865,
07512     0xB38A, 0x7866, 0xB38B, 0x7867, 0xB38C, 0x7868, 0xB38D, 0x7869,
07513     0xB38E, 0x786F, 0xB38F, 0x7870, 0xB390, 0x7871, 0xB391, 0x7872,
07514     0xB392, 0x7873, 0xB393, 0x7874, 0xB394, 0x7875, 0xB395, 0x7876,
07515     0xB396, 0x7878, 0xB397, 0x7879, 0xB398, 0x787A, 0xB399, 0x787B,
07516     0xB39A, 0x787D, 0xB39B, 0x787E, 0xB39C, 0x787F, 0xB39D, 0x7880,
07517     0xB39E, 0x7881, 0xB39F, 0x7882, 0xB3A0, 0x7883, 0xB3A1, 0x573A,
07518     0xB3A2, 0x5C1D, 0xB3A3, 0x5E38, 0xB3A4, 0x957F, 0xB3A5, 0x507F,
07519     0xB3A6, 0x80A0, 0xB3A7, 0x5382, 0xB3A8, 0x655E, 0xB3A9, 0x7545,
07520     0xB3AA, 0x5531, 0xB3AB, 0x5021, 0xB3AC, 0x8D85, 0xB3AD, 0x6284,
07521     0xB3AE, 0x949E, 0xB3AF, 0x671D, 0xB3B0, 0x5632, 0xB3B1, 0x6F6E,
07522     0xB3B2, 0x5DE2, 0xB3B3, 0x5435, 0xB3B4, 0x7092, 0xB3B5, 0x8F66,
07523     0xB3B6, 0x626F, 0xB3B7, 0x64A4, 0xB3B8, 0x63A3, 0xB3B9, 0x5F7B,
07524     0xB3BA, 0x6F88, 0xB3BB, 0x90F4, 0xB3BC, 0x81E3, 0xB3BD, 0x8FB0,
07525     0xB3BE, 0x5C18, 0xB3BF, 0x6668, 0xB3C0, 0x5FF1, 0xB3C1, 0x6C89,
07526     0xB3C2, 0x9648, 0xB3C3, 0x8D81, 0xB3C4, 0x886C, 0xB3C5, 0x6491,
07527     0xB3C6, 0x79F0, 0xB3C7, 0x57CE, 0xB3C8, 0x6A59, 0xB3C9, 0x6210,
07528     0xB3CA, 0x5448, 0xB3CB, 0x4E58, 0xB3CC, 0x7A0B, 0xB3CD, 0x60E9,
07529     0xB3CE, 0x6F84, 0xB3CF, 0x8BDA, 0xB3D0, 0x627F, 0xB3D1, 0x901E,
07530     0xB3D2, 0x9A8B, 0xB3D3, 0x79E4, 0xB3D4, 0x5403, 0xB3D5, 0x75F4,
07531     0xB3D6, 0x6301, 0xB3D7, 0x5319, 0xB3D8, 0x6C60, 0xB3D9, 0x8FDF,
07532     0xB3DA, 0x5F1B, 0xB3DB, 0x9A70, 0xB3DC, 0x803B, 0xB3DD, 0x9F7F,
07533     0xB3DE, 0x4F88, 0xB3DF, 0x5C3A, 0xB3E0, 0x8D64, 0xB3E1, 0x7FC5,
07534     0xB3E2, 0x65A5, 0xB3E3, 0x70BD, 0xB3E4, 0x5145, 0xB3E5, 0x51B2,
07535     0xB3E6, 0x866B, 0xB3E7, 0x5D07, 0xB3E8, 0x5BA0, 0xB3E9, 0x62BD,
07536     0xB3EA, 0x916C, 0xB3EB, 0x7574, 0xB3EC, 0x8E0C, 0xB3ED, 0x7A20,
07537     0xB3EE, 0x6101, 0xB3EF, 0x7B79, 0xB3F0, 0x4EC7, 0xB3F1, 0x7EF8,
07538     0xB3F2, 0x7785, 0xB3F3, 0x4E11, 0xB3F4, 0x81ED, 0xB3F5, 0x521D,
07539     0xB3F6, 0x51FA, 0xB3F7, 0x6A71, 0xB3F8, 0x53A8, 0xB3F9, 0x8E87,
07540     0xB3FA, 0x9504, 0xB3FB, 0x96CF, 0xB3FC, 0x6EC1, 0xB3FD, 0x9664,
07541     0xB3FE, 0x695A, 0xB440, 0x7884, 0xB441, 0x7885, 0xB442, 0x7886,
07542     0xB443, 0x7888, 0xB444, 0x788A, 0xB445, 0x788B, 0xB446, 0x788F,
07543     0xB447, 0x7890, 0xB448, 0x7892, 0xB449, 0x7894, 0xB44A, 0x7895,
07544     0xB44B, 0x7896, 0xB44C, 0x7899, 0xB44D, 0x789D, 0xB44E, 0x789E,
07545     0xB44F, 0x78A0, 0xB450, 0x78A2, 0xB451, 0x78A4, 0xB452, 0x78A6,
07546     0xB453, 0x78A8, 0xB454, 0x78A9, 0xB455, 0x78AA, 0xB456, 0x78AB,
07547     0xB457, 0x78AC, 0xB458, 0x78AD, 0xB459, 0x78AE, 0xB45A, 0x78AF,
07548     0xB45B, 0x78B5, 0xB45C, 0x78B6, 0xB45D, 0x78B7, 0xB45E, 0x78B8,
07549     0xB45F, 0x78BA, 0xB460, 0x78BB, 0xB461, 0x78BC, 0xB462, 0x78BD,
07550     0xB463, 0x78BF, 0xB464, 0x78C0, 0xB465, 0x78C2, 0xB466, 0x78C3,
07551     0xB467, 0x78C4, 0xB468, 0x78C6, 0xB469, 0x78C7, 0xB46A, 0x78C8,
07552     0xB46B, 0x78CC, 0xB46C, 0x78CD, 0xB46D, 0x78CE, 0xB46E, 0x78CF,
07553     0xB46F, 0x78D1, 0xB470, 0x78D2, 0xB471, 0x78D3, 0xB472, 0x78D6,
07554     0xB473, 0x78D7, 0xB474, 0x78D8, 0xB475, 0x78DA, 0xB476, 0x78DB,
07555     0xB477, 0x78DC, 0xB478, 0x78DD, 0xB479, 0x78DE, 0xB47A, 0x78DF,
07556     0xB47B, 0x78E0, 0xB47C, 0x78E1, 0xB47D, 0x78E2, 0xB47E, 0x78E3,
07557     0xB480, 0x78E4, 0xB481, 0x78E5, 0xB482, 0x78E6, 0xB483, 0x78E7,
07558     0xB484, 0x78E9, 0xB485, 0x78EA, 0xB486, 0x78EB, 0xB487, 0x78ED,
07559     0xB488, 0x78EE, 0xB489, 0x78EF, 0xB48A, 0x78F0, 0xB48B, 0x78F1,
07560     0xB48C, 0x78F3, 0xB48D, 0x78F5, 0xB48E, 0x78F6, 0xB48F, 0x78F8,
07561     0xB490, 0x78F9, 0xB491, 0x78FB, 0xB492, 0x78FC, 0xB493, 0x78FD,
07562     0xB494, 0x78FE, 0xB495, 0x78FF, 0xB496, 0x7900, 0xB497, 0x7902,
07563     0xB498, 0x7903, 0xB499, 0x7904, 0xB49A, 0x7906, 0xB49B, 0x7907,
07564     0xB49C, 0x7908, 0xB49D, 0x7909, 0xB49E, 0x790A, 0xB49F, 0x790B,
07565     0xB4A0, 0x790C, 0xB4A1, 0x7840, 0xB4A2, 0x50A8, 0xB4A3, 0x77D7,
07566     0xB4A4, 0x6410, 0xB4A5, 0x89E6, 0xB4A6, 0x5904, 0xB4A7, 0x63E3,
07567     0xB4A8, 0x5DDD, 0xB4A9, 0x7A7F, 0xB4AA, 0x693D, 0xB4AB, 0x4F20,
07568     0xB4AC, 0x8239, 0xB4AD, 0x5598, 0xB4AE, 0x4E32, 0xB4AF, 0x75AE,
07569     0xB4B0, 0x7A97, 0xB4B1, 0x5E62, 0xB4B2, 0x5E8A, 0xB4B3, 0x95EF,
07570     0xB4B4, 0x521B, 0xB4B5, 0x5439, 0xB4B6, 0x708A, 0xB4B7, 0x6376,
07571     0xB4B8, 0x9524, 0xB4B9, 0x5782, 0xB4BA, 0x6625, 0xB4BB, 0x693F,
07572     0xB4BC, 0x9187, 0xB4BD, 0x5507, 0xB4BE, 0x6DF3, 0xB4BF, 0x7EAF,
07573     0xB4C0, 0x8822, 0xB4C1, 0x6233, 0xB4C2, 0x7EF0, 0xB4C3, 0x75B5,
07574     0xB4C4, 0x8328, 0xB4C5, 0x78C1, 0xB4C6, 0x96CC, 0xB4C7, 0x8F9E,
07575     0xB4C8, 0x6148, 0xB4C9, 0x74F7, 0xB4CA, 0x8BCD, 0xB4CB, 0x6B64,
07576     0xB4CC, 0x523A, 0xB4CD, 0x8D50, 0xB4CE, 0x6B21, 0xB4CF, 0x806A,
07577     0xB4D0, 0x8471, 0xB4D1, 0x56F1, 0xB4D2, 0x5306, 0xB4D3, 0x4ECE,
07578     0xB4D4, 0x4E1B, 0xB4D5, 0x51D1, 0xB4D6, 0x7C97, 0xB4D7, 0x918B,
07579     0xB4D8, 0x7C07, 0xB4D9, 0x4FC3, 0xB4DA, 0x8E7F, 0xB4DB, 0x7BE1,
07580     0xB4DC, 0x7A9C, 0xB4DD, 0x6467, 0xB4DE, 0x5D14, 0xB4DF, 0x50AC,
07581     0xB4E0, 0x8106, 0xB4E1, 0x7601, 0xB4E2, 0x7CB9, 0xB4E3, 0x6DEC,
07582     0xB4E4, 0x7FE0, 0xB4E5, 0x6751, 0xB4E6, 0x5B58, 0xB4E7, 0x5BF8,
07583     0xB4E8, 0x78CB, 0xB4E9, 0x64AE, 0xB4EA, 0x6413, 0xB4EB, 0x63AA,
07584     0xB4EC, 0x632B, 0xB4ED, 0x9519, 0xB4EE, 0x642D, 0xB4EF, 0x8FBE,
07585     0xB4F0, 0x7B54, 0xB4F1, 0x7629, 0xB4F2, 0x6253, 0xB4F3, 0x5927,
07586     0xB4F4, 0x5446, 0xB4F5, 0x6B79, 0xB4F6, 0x50A3, 0xB4F7, 0x6234,
07587     0xB4F8, 0x5E26, 0xB4F9, 0x6B86, 0xB4FA, 0x4EE3, 0xB4FB, 0x8D37,
07588     0xB4FC, 0x888B, 0xB4FD, 0x5F85, 0xB4FE, 0x902E, 0xB540, 0x790D,
07589     0xB541, 0x790E, 0xB542, 0x790F, 0xB543, 0x7910, 0xB544, 0x7911,
07590     0xB545, 0x7912, 0xB546, 0x7914, 0xB547, 0x7915, 0xB548, 0x7916,
07591     0xB549, 0x7917, 0xB54A, 0x7918, 0xB54B, 0x7919, 0xB54C, 0x791A,
07592     0xB54D, 0x791B, 0xB54E, 0x791C, 0xB54F, 0x791D, 0xB550, 0x791F,
07593     0xB551, 0x7920, 0xB552, 0x7921, 0xB553, 0x7922, 0xB554, 0x7923,
07594     0xB555, 0x7925, 0xB556, 0x7926, 0xB557, 0x7927, 0xB558, 0x7928,
07595     0xB559, 0x7929, 0xB55A, 0x792A, 0xB55B, 0x792B, 0xB55C, 0x792C,
07596     0xB55D, 0x792D, 0xB55E, 0x792E, 0xB55F, 0x792F, 0xB560, 0x7930,
07597     0xB561, 0x7931, 0xB562, 0x7932, 0xB563, 0x7933, 0xB564, 0x7935,
07598     0xB565, 0x7936, 0xB566, 0x7937, 0xB567, 0x7938, 0xB568, 0x7939,
07599     0xB569, 0x793D, 0xB56A, 0x793F, 0xB56B, 0x7942, 0xB56C, 0x7943,
07600     0xB56D, 0x7944, 0xB56E, 0x7945, 0xB56F, 0x7947, 0xB570, 0x794A,
07601     0xB571, 0x794B, 0xB572, 0x794C, 0xB573, 0x794D, 0xB574, 0x794E,
07602     0xB575, 0x794F, 0xB576, 0x7950, 0xB577, 0x7951, 0xB578, 0x7952,
07603     0xB579, 0x7954, 0xB57A, 0x7955, 0xB57B, 0x7958, 0xB57C, 0x7959,
07604     0xB57D, 0x7961, 0xB57E, 0x7963, 0xB580, 0x7964, 0xB581, 0x7966,
07605     0xB582, 0x7969, 0xB583, 0x796A, 0xB584, 0x796B, 0xB585, 0x796C,
07606     0xB586, 0x796E, 0xB587, 0x7970, 0xB588, 0x7971, 0xB589, 0x7972,
07607     0xB58A, 0x7973, 0xB58B, 0x7974, 0xB58C, 0x7975, 0xB58D, 0x7976,
07608     0xB58E, 0x7979, 0xB58F, 0x797B, 0xB590, 0x797C, 0xB591, 0x797D,
07609     0xB592, 0x797E, 0xB593, 0x797F, 0xB594, 0x7982, 0xB595, 0x7983,
07610     0xB596, 0x7986, 0xB597, 0x7987, 0xB598, 0x7988, 0xB599, 0x7989,
07611     0xB59A, 0x798B, 0xB59B, 0x798C, 0xB59C, 0x798D, 0xB59D, 0x798E,
07612     0xB59E, 0x7990, 0xB59F, 0x7991, 0xB5A0, 0x7992, 0xB5A1, 0x6020,
07613     0xB5A2, 0x803D, 0xB5A3, 0x62C5, 0xB5A4, 0x4E39, 0xB5A5, 0x5355,
07614     0xB5A6, 0x90F8, 0xB5A7, 0x63B8, 0xB5A8, 0x80C6, 0xB5A9, 0x65E6,
07615     0xB5AA, 0x6C2E, 0xB5AB, 0x4F46, 0xB5AC, 0x60EE, 0xB5AD, 0x6DE1,
07616     0xB5AE, 0x8BDE, 0xB5AF, 0x5F39, 0xB5B0, 0x86CB, 0xB5B1, 0x5F53,
07617     0xB5B2, 0x6321, 0xB5B3, 0x515A, 0xB5B4, 0x8361, 0xB5B5, 0x6863,
07618     0xB5B6, 0x5200, 0xB5B7, 0x6363, 0xB5B8, 0x8E48, 0xB5B9, 0x5012,
07619     0xB5BA, 0x5C9B, 0xB5BB, 0x7977, 0xB5BC, 0x5BFC, 0xB5BD, 0x5230,
07620     0xB5BE, 0x7A3B, 0xB5BF, 0x60BC, 0xB5C0, 0x9053, 0xB5C1, 0x76D7,
07621     0xB5C2, 0x5FB7, 0xB5C3, 0x5F97, 0xB5C4, 0x7684, 0xB5C5, 0x8E6C,
07622     0xB5C6, 0x706F, 0xB5C7, 0x767B, 0xB5C8, 0x7B49, 0xB5C9, 0x77AA,
07623     0xB5CA, 0x51F3, 0xB5CB, 0x9093, 0xB5CC, 0x5824, 0xB5CD, 0x4F4E,
07624     0xB5CE, 0x6EF4, 0xB5CF, 0x8FEA, 0xB5D0, 0x654C, 0xB5D1, 0x7B1B,
07625     0xB5D2, 0x72C4, 0xB5D3, 0x6DA4, 0xB5D4, 0x7FDF, 0xB5D5, 0x5AE1,
07626     0xB5D6, 0x62B5, 0xB5D7, 0x5E95, 0xB5D8, 0x5730, 0xB5D9, 0x8482,
07627     0xB5DA, 0x7B2C, 0xB5DB, 0x5E1D, 0xB5DC, 0x5F1F, 0xB5DD, 0x9012,
07628     0xB5DE, 0x7F14, 0xB5DF, 0x98A0, 0xB5E0, 0x6382, 0xB5E1, 0x6EC7,
07629     0xB5E2, 0x7898, 0xB5E3, 0x70B9, 0xB5E4, 0x5178, 0xB5E5, 0x975B,
07630     0xB5E6, 0x57AB, 0xB5E7, 0x7535, 0xB5E8, 0x4F43, 0xB5E9, 0x7538,
07631     0xB5EA, 0x5E97, 0xB5EB, 0x60E6, 0xB5EC, 0x5960, 0xB5ED, 0x6DC0,
07632     0xB5EE, 0x6BBF, 0xB5EF, 0x7889, 0xB5F0, 0x53FC, 0xB5F1, 0x96D5,
07633     0xB5F2, 0x51CB, 0xB5F3, 0x5201, 0xB5F4, 0x6389, 0xB5F5, 0x540A,
07634     0xB5F6, 0x9493, 0xB5F7, 0x8C03, 0xB5F8, 0x8DCC, 0xB5F9, 0x7239,
07635     0xB5FA, 0x789F, 0xB5FB, 0x8776, 0xB5FC, 0x8FED, 0xB5FD, 0x8C0D,
07636     0xB5FE, 0x53E0, 0xB640, 0x7993, 0xB641, 0x7994, 0xB642, 0x7995,
07637     0xB643, 0x7996, 0xB644, 0x7997, 0xB645, 0x7998, 0xB646, 0x7999,
07638     0xB647, 0x799B, 0xB648, 0x799C, 0xB649, 0x799D, 0xB64A, 0x799E,
07639     0xB64B, 0x799F, 0xB64C, 0x79A0, 0xB64D, 0x79A1, 0xB64E, 0x79A2,
07640     0xB64F, 0x79A3, 0xB650, 0x79A4, 0xB651, 0x79A5, 0xB652, 0x79A6,
07641     0xB653, 0x79A8, 0xB654, 0x79A9, 0xB655, 0x79AA, 0xB656, 0x79AB,
07642     0xB657, 0x79AC, 0xB658, 0x79AD, 0xB659, 0x79AE, 0xB65A, 0x79AF,
07643     0xB65B, 0x79B0, 0xB65C, 0x79B1, 0xB65D, 0x79B2, 0xB65E, 0x79B4,
07644     0xB65F, 0x79B5, 0xB660, 0x79B6, 0xB661, 0x79B7, 0xB662, 0x79B8,
07645     0xB663, 0x79BC, 0xB664, 0x79BF, 0xB665, 0x79C2, 0xB666, 0x79C4,
07646     0xB667, 0x79C5, 0xB668, 0x79C7, 0xB669, 0x79C8, 0xB66A, 0x79CA,
07647     0xB66B, 0x79CC, 0xB66C, 0x79CE, 0xB66D, 0x79CF, 0xB66E, 0x79D0,
07648     0xB66F, 0x79D3, 0xB670, 0x79D4, 0xB671, 0x79D6, 0xB672, 0x79D7,
07649     0xB673, 0x79D9, 0xB674, 0x79DA, 0xB675, 0x79DB, 0xB676, 0x79DC,
07650     0xB677, 0x79DD, 0xB678, 0x79DE, 0xB679, 0x79E0, 0xB67A, 0x79E1,
07651     0xB67B, 0x79E2, 0xB67C, 0x79E5, 0xB67D, 0x79E8, 0xB67E, 0x79EA,
07652     0xB680, 0x79EC, 0xB681, 0x79EE, 0xB682, 0x79F1, 0xB683, 0x79F2,
07653     0xB684, 0x79F3, 0xB685, 0x79F4, 0xB686, 0x79F5, 0xB687, 0x79F6,
07654     0xB688, 0x79F7, 0xB689, 0x79F9, 0xB68A, 0x79FA, 0xB68B, 0x79FC,
07655     0xB68C, 0x79FE, 0xB68D, 0x79FF, 0xB68E, 0x7A01, 0xB68F, 0x7A04,
07656     0xB690, 0x7A05, 0xB691, 0x7A07, 0xB692, 0x7A08, 0xB693, 0x7A09,
07657     0xB694, 0x7A0A, 0xB695, 0x7A0C, 0xB696, 0x7A0F, 0xB697, 0x7A10,
07658     0xB698, 0x7A11, 0xB699, 0x7A12, 0xB69A, 0x7A13, 0xB69B, 0x7A15,
07659     0xB69C, 0x7A16, 0xB69D, 0x7A18, 0xB69E, 0x7A19, 0xB69F, 0x7A1B,
07660     0xB6A0, 0x7A1C, 0xB6A1, 0x4E01, 0xB6A2, 0x76EF, 0xB6A3, 0x53EE,
07661     0xB6A4, 0x9489, 0xB6A5, 0x9876, 0xB6A6, 0x9F0E, 0xB6A7, 0x952D,
07662     0xB6A8, 0x5B9A, 0xB6A9, 0x8BA2, 0xB6AA, 0x4E22, 0xB6AB, 0x4E1C,
07663     0xB6AC, 0x51AC, 0xB6AD, 0x8463, 0xB6AE, 0x61C2, 0xB6AF, 0x52A8,
07664     0xB6B0, 0x680B, 0xB6B1, 0x4F97, 0xB6B2, 0x606B, 0xB6B3, 0x51BB,
07665     0xB6B4, 0x6D1E, 0xB6B5, 0x515C, 0xB6B6, 0x6296, 0xB6B7, 0x6597,
07666     0xB6B8, 0x9661, 0xB6B9, 0x8C46, 0xB6BA, 0x9017, 0xB6BB, 0x75D8,
07667     0xB6BC, 0x90FD, 0xB6BD, 0x7763, 0xB6BE, 0x6BD2, 0xB6BF, 0x728A,
07668     0xB6C0, 0x72EC, 0xB6C1, 0x8BFB, 0xB6C2, 0x5835, 0xB6C3, 0x7779,
07669     0xB6C4, 0x8D4C, 0xB6C5, 0x675C, 0xB6C6, 0x9540, 0xB6C7, 0x809A,
07670     0xB6C8, 0x5EA6, 0xB6C9, 0x6E21, 0xB6CA, 0x5992, 0xB6CB, 0x7AEF,
07671     0xB6CC, 0x77ED, 0xB6CD, 0x953B, 0xB6CE, 0x6BB5, 0xB6CF, 0x65AD,
07672     0xB6D0, 0x7F0E, 0xB6D1, 0x5806, 0xB6D2, 0x5151, 0xB6D3, 0x961F,
07673     0xB6D4, 0x5BF9, 0xB6D5, 0x58A9, 0xB6D6, 0x5428, 0xB6D7, 0x8E72,
07674     0xB6D8, 0x6566, 0xB6D9, 0x987F, 0xB6DA, 0x56E4, 0xB6DB, 0x949D,
07675     0xB6DC, 0x76FE, 0xB6DD, 0x9041, 0xB6DE, 0x6387, 0xB6DF, 0x54C6,
07676     0xB6E0, 0x591A, 0xB6E1, 0x593A, 0xB6E2, 0x579B, 0xB6E3, 0x8EB2,
07677     0xB6E4, 0x6735, 0xB6E5, 0x8DFA, 0xB6E6, 0x8235, 0xB6E7, 0x5241,
07678     0xB6E8, 0x60F0, 0xB6E9, 0x5815, 0xB6EA, 0x86FE, 0xB6EB, 0x5CE8,
07679     0xB6EC, 0x9E45, 0xB6ED, 0x4FC4, 0xB6EE, 0x989D, 0xB6EF, 0x8BB9,
07680     0xB6F0, 0x5A25, 0xB6F1, 0x6076, 0xB6F2, 0x5384, 0xB6F3, 0x627C,
07681     0xB6F4, 0x904F, 0xB6F5, 0x9102, 0xB6F6, 0x997F, 0xB6F7, 0x6069,
07682     0xB6F8, 0x800C, 0xB6F9, 0x513F, 0xB6FA, 0x8033, 0xB6FB, 0x5C14,
07683     0xB6FC, 0x9975, 0xB6FD, 0x6D31, 0xB6FE, 0x4E8C, 0xB740, 0x7A1D,
07684     0xB741, 0x7A1F, 0xB742, 0x7A21, 0xB743, 0x7A22, 0xB744, 0x7A24,
07685     0xB745, 0x7A25, 0xB746, 0x7A26, 0xB747, 0x7A27, 0xB748, 0x7A28,
07686     0xB749, 0x7A29, 0xB74A, 0x7A2A, 0xB74B, 0x7A2B, 0xB74C, 0x7A2C,
07687     0xB74D, 0x7A2D, 0xB74E, 0x7A2E, 0xB74F, 0x7A2F, 0xB750, 0x7A30,
07688     0xB751, 0x7A31, 0xB752, 0x7A32, 0xB753, 0x7A34, 0xB754, 0x7A35,
07689     0xB755, 0x7A36, 0xB756, 0x7A38, 0xB757, 0x7A3A, 0xB758, 0x7A3E,
07690     0xB759, 0x7A40, 0xB75A, 0x7A41, 0xB75B, 0x7A42, 0xB75C, 0x7A43,
07691     0xB75D, 0x7A44, 0xB75E, 0x7A45, 0xB75F, 0x7A47, 0xB760, 0x7A48,
07692     0xB761, 0x7A49, 0xB762, 0x7A4A, 0xB763, 0x7A4B, 0xB764, 0x7A4C,
07693     0xB765, 0x7A4D, 0xB766, 0x7A4E, 0xB767, 0x7A4F, 0xB768, 0x7A50,
07694     0xB769, 0x7A52, 0xB76A, 0x7A53, 0xB76B, 0x7A54, 0xB76C, 0x7A55,
07695     0xB76D, 0x7A56, 0xB76E, 0x7A58, 0xB76F, 0x7A59, 0xB770, 0x7A5A,
07696     0xB771, 0x7A5B, 0xB772, 0x7A5C, 0xB773, 0x7A5D, 0xB774, 0x7A5E,
07697     0xB775, 0x7A5F, 0xB776, 0x7A60, 0xB777, 0x7A61, 0xB778, 0x7A62,
07698     0xB779, 0x7A63, 0xB77A, 0x7A64, 0xB77B, 0x7A65, 0xB77C, 0x7A66,
07699     0xB77D, 0x7A67, 0xB77E, 0x7A68, 0xB780, 0x7A69, 0xB781, 0x7A6A,
07700     0xB782, 0x7A6B, 0xB783, 0x7A6C, 0xB784, 0x7A6D, 0xB785, 0x7A6E,
07701     0xB786, 0x7A6F, 0xB787, 0x7A71, 0xB788, 0x7A72, 0xB789, 0x7A73,
07702     0xB78A, 0x7A75, 0xB78B, 0x7A7B, 0xB78C, 0x7A7C, 0xB78D, 0x7A7D,
07703     0xB78E, 0x7A7E, 0xB78F, 0x7A82, 0xB790, 0x7A85, 0xB791, 0x7A87,
07704     0xB792, 0x7A89, 0xB793, 0x7A8A, 0xB794, 0x7A8B, 0xB795, 0x7A8C,
07705     0xB796, 0x7A8E, 0xB797, 0x7A8F, 0xB798, 0x7A90, 0xB799, 0x7A93,
07706     0xB79A, 0x7A94, 0xB79B, 0x7A99, 0xB79C, 0x7A9A, 0xB79D, 0x7A9B,
07707     0xB79E, 0x7A9E, 0xB79F, 0x7AA1, 0xB7A0, 0x7AA2, 0xB7A1, 0x8D30,
07708     0xB7A2, 0x53D1, 0xB7A3, 0x7F5A, 0xB7A4, 0x7B4F, 0xB7A5, 0x4F10,
07709     0xB7A6, 0x4E4F, 0xB7A7, 0x9600, 0xB7A8, 0x6CD5, 0xB7A9, 0x73D0,
07710     0xB7AA, 0x85E9, 0xB7AB, 0x5E06, 0xB7AC, 0x756A, 0xB7AD, 0x7FFB,
07711     0xB7AE, 0x6A0A, 0xB7AF, 0x77FE, 0xB7B0, 0x9492, 0xB7B1, 0x7E41,
07712     0xB7B2, 0x51E1, 0xB7B3, 0x70E6, 0xB7B4, 0x53CD, 0xB7B5, 0x8FD4,
07713     0xB7B6, 0x8303, 0xB7B7, 0x8D29, 0xB7B8, 0x72AF, 0xB7B9, 0x996D,
07714     0xB7BA, 0x6CDB, 0xB7BB, 0x574A, 0xB7BC, 0x82B3, 0xB7BD, 0x65B9,
07715     0xB7BE, 0x80AA, 0xB7BF, 0x623F, 0xB7C0, 0x9632, 0xB7C1, 0x59A8,
07716     0xB7C2, 0x4EFF, 0xB7C3, 0x8BBF, 0xB7C4, 0x7EBA, 0xB7C5, 0x653E,
07717     0xB7C6, 0x83F2, 0xB7C7, 0x975E, 0xB7C8, 0x5561, 0xB7C9, 0x98DE,
07718     0xB7CA, 0x80A5, 0xB7CB, 0x532A, 0xB7CC, 0x8BFD, 0xB7CD, 0x5420,
07719     0xB7CE, 0x80BA, 0xB7CF, 0x5E9F, 0xB7D0, 0x6CB8, 0xB7D1, 0x8D39,
07720     0xB7D2, 0x82AC, 0xB7D3, 0x915A, 0xB7D4, 0x5429, 0xB7D5, 0x6C1B,
07721     0xB7D6, 0x5206, 0xB7D7, 0x7EB7, 0xB7D8, 0x575F, 0xB7D9, 0x711A,
07722     0xB7DA, 0x6C7E, 0xB7DB, 0x7C89, 0xB7DC, 0x594B, 0xB7DD, 0x4EFD,
07723     0xB7DE, 0x5FFF, 0xB7DF, 0x6124, 0xB7E0, 0x7CAA, 0xB7E1, 0x4E30,
07724     0xB7E2, 0x5C01, 0xB7E3, 0x67AB, 0xB7E4, 0x8702, 0xB7E5, 0x5CF0,
07725     0xB7E6, 0x950B, 0xB7E7, 0x98CE, 0xB7E8, 0x75AF, 0xB7E9, 0x70FD,
07726     0xB7EA, 0x9022, 0xB7EB, 0x51AF, 0xB7EC, 0x7F1D, 0xB7ED, 0x8BBD,
07727     0xB7EE, 0x5949, 0xB7EF, 0x51E4, 0xB7F0, 0x4F5B, 0xB7F1, 0x5426,
07728     0xB7F2, 0x592B, 0xB7F3, 0x6577, 0xB7F4, 0x80A4, 0xB7F5, 0x5B75,
07729     0xB7F6, 0x6276, 0xB7F7, 0x62C2, 0xB7F8, 0x8F90, 0xB7F9, 0x5E45,
07730     0xB7FA, 0x6C1F, 0xB7FB, 0x7B26, 0xB7FC, 0x4F0F, 0xB7FD, 0x4FD8,
07731     0xB7FE, 0x670D, 0xB840, 0x7AA3, 0xB841, 0x7AA4, 0xB842, 0x7AA7,
07732     0xB843, 0x7AA9, 0xB844, 0x7AAA, 0xB845, 0x7AAB, 0xB846, 0x7AAE,
07733     0xB847, 0x7AAF, 0xB848, 0x7AB0, 0xB849, 0x7AB1, 0xB84A, 0x7AB2,
07734     0xB84B, 0x7AB4, 0xB84C, 0x7AB5, 0xB84D, 0x7AB6, 0xB84E, 0x7AB7,
07735     0xB84F, 0x7AB8, 0xB850, 0x7AB9, 0xB851, 0x7ABA, 0xB852, 0x7ABB,
07736     0xB853, 0x7ABC, 0xB854, 0x7ABD, 0xB855, 0x7ABE, 0xB856, 0x7AC0,
07737     0xB857, 0x7AC1, 0xB858, 0x7AC2, 0xB859, 0x7AC3, 0xB85A, 0x7AC4,
07738     0xB85B, 0x7AC5, 0xB85C, 0x7AC6, 0xB85D, 0x7AC7, 0xB85E, 0x7AC8,
07739     0xB85F, 0x7AC9, 0xB860, 0x7ACA, 0xB861, 0x7ACC, 0xB862, 0x7ACD,
07740     0xB863, 0x7ACE, 0xB864, 0x7ACF, 0xB865, 0x7AD0, 0xB866, 0x7AD1,
07741     0xB867, 0x7AD2, 0xB868, 0x7AD3, 0xB869, 0x7AD4, 0xB86A, 0x7AD5,
07742     0xB86B, 0x7AD7, 0xB86C, 0x7AD8, 0xB86D, 0x7ADA, 0xB86E, 0x7ADB,
07743     0xB86F, 0x7ADC, 0xB870, 0x7ADD, 0xB871, 0x7AE1, 0xB872, 0x7AE2,
07744     0xB873, 0x7AE4, 0xB874, 0x7AE7, 0xB875, 0x7AE8, 0xB876, 0x7AE9,
07745     0xB877, 0x7AEA, 0xB878, 0x7AEB, 0xB879, 0x7AEC, 0xB87A, 0x7AEE,
07746     0xB87B, 0x7AF0, 0xB87C, 0x7AF1, 0xB87D, 0x7AF2, 0xB87E, 0x7AF3,
07747     0xB880, 0x7AF4, 0xB881, 0x7AF5, 0xB882, 0x7AF6, 0xB883, 0x7AF7,
07748     0xB884, 0x7AF8, 0xB885, 0x7AFB, 0xB886, 0x7AFC, 0xB887, 0x7AFE,
07749     0xB888, 0x7B00, 0xB889, 0x7B01, 0xB88A, 0x7B02, 0xB88B, 0x7B05,
07750     0xB88C, 0x7B07, 0xB88D, 0x7B09, 0xB88E, 0x7B0C, 0xB88F, 0x7B0D,
07751     0xB890, 0x7B0E, 0xB891, 0x7B10, 0xB892, 0x7B12, 0xB893, 0x7B13,
07752     0xB894, 0x7B16, 0xB895, 0x7B17, 0xB896, 0x7B18, 0xB897, 0x7B1A,
07753     0xB898, 0x7B1C, 0xB899, 0x7B1D, 0xB89A, 0x7B1F, 0xB89B, 0x7B21,
07754     0xB89C, 0x7B22, 0xB89D, 0x7B23, 0xB89E, 0x7B27, 0xB89F, 0x7B29,
07755     0xB8A0, 0x7B2D, 0xB8A1, 0x6D6E, 0xB8A2, 0x6DAA, 0xB8A3, 0x798F,
07756     0xB8A4, 0x88B1, 0xB8A5, 0x5F17, 0xB8A6, 0x752B, 0xB8A7, 0x629A,
07757     0xB8A8, 0x8F85, 0xB8A9, 0x4FEF, 0xB8AA, 0x91DC, 0xB8AB, 0x65A7,
07758     0xB8AC, 0x812F, 0xB8AD, 0x8151, 0xB8AE, 0x5E9C, 0xB8AF, 0x8150,
07759     0xB8B0, 0x8D74, 0xB8B1, 0x526F, 0xB8B2, 0x8986, 0xB8B3, 0x8D4B,
07760     0xB8B4, 0x590D, 0xB8B5, 0x5085, 0xB8B6, 0x4ED8, 0xB8B7, 0x961C,
07761     0xB8B8, 0x7236, 0xB8B9, 0x8179, 0xB8BA, 0x8D1F, 0xB8BB, 0x5BCC,
07762     0xB8BC, 0x8BA3, 0xB8BD, 0x9644, 0xB8BE, 0x5987, 0xB8BF, 0x7F1A,
07763     0xB8C0, 0x5490, 0xB8C1, 0x5676, 0xB8C2, 0x560E, 0xB8C3, 0x8BE5,
07764     0xB8C4, 0x6539, 0xB8C5, 0x6982, 0xB8C6, 0x9499, 0xB8C7, 0x76D6,
07765     0xB8C8, 0x6E89, 0xB8C9, 0x5E72, 0xB8CA, 0x7518, 0xB8CB, 0x6746,
07766     0xB8CC, 0x67D1, 0xB8CD, 0x7AFF, 0xB8CE, 0x809D, 0xB8CF, 0x8D76,
07767     0xB8D0, 0x611F, 0xB8D1, 0x79C6, 0xB8D2, 0x6562, 0xB8D3, 0x8D63,
07768     0xB8D4, 0x5188, 0xB8D5, 0x521A, 0xB8D6, 0x94A2, 0xB8D7, 0x7F38,
07769     0xB8D8, 0x809B, 0xB8D9, 0x7EB2, 0xB8DA, 0x5C97, 0xB8DB, 0x6E2F,
07770     0xB8DC, 0x6760, 0xB8DD, 0x7BD9, 0xB8DE, 0x768B, 0xB8DF, 0x9AD8,
07771     0xB8E0, 0x818F, 0xB8E1, 0x7F94, 0xB8E2, 0x7CD5, 0xB8E3, 0x641E,
07772     0xB8E4, 0x9550, 0xB8E5, 0x7A3F, 0xB8E6, 0x544A, 0xB8E7, 0x54E5,
07773     0xB8E8, 0x6B4C, 0xB8E9, 0x6401, 0xB8EA, 0x6208, 0xB8EB, 0x9E3D,
07774     0xB8EC, 0x80F3, 0xB8ED, 0x7599, 0xB8EE, 0x5272, 0xB8EF, 0x9769,
07775     0xB8F0, 0x845B, 0xB8F1, 0x683C, 0xB8F2, 0x86E4, 0xB8F3, 0x9601,
07776     0xB8F4, 0x9694, 0xB8F5, 0x94EC, 0xB8F6, 0x4E2A, 0xB8F7, 0x5404,
07777     0xB8F8, 0x7ED9, 0xB8F9, 0x6839, 0xB8FA, 0x8DDF, 0xB8FB, 0x8015,
07778     0xB8FC, 0x66F4, 0xB8FD, 0x5E9A, 0xB8FE, 0x7FB9, 0xB940, 0x7B2F,
07779     0xB941, 0x7B30, 0xB942, 0x7B32, 0xB943, 0x7B34, 0xB944, 0x7B35,
07780     0xB945, 0x7B36, 0xB946, 0x7B37, 0xB947, 0x7B39, 0xB948, 0x7B3B,
07781     0xB949, 0x7B3D, 0xB94A, 0x7B3F, 0xB94B, 0x7B40, 0xB94C, 0x7B41,
07782     0xB94D, 0x7B42, 0xB94E, 0x7B43, 0xB94F, 0x7B44, 0xB950, 0x7B46,
07783     0xB951, 0x7B48, 0xB952, 0x7B4A, 0xB953, 0x7B4D, 0xB954, 0x7B4E,
07784     0xB955, 0x7B53, 0xB956, 0x7B55, 0xB957, 0x7B57, 0xB958, 0x7B59,
07785     0xB959, 0x7B5C, 0xB95A, 0x7B5E, 0xB95B, 0x7B5F, 0xB95C, 0x7B61,
07786     0xB95D, 0x7B63, 0xB95E, 0x7B64, 0xB95F, 0x7B65, 0xB960, 0x7B66,
07787     0xB961, 0x7B67, 0xB962, 0x7B68, 0xB963, 0x7B69, 0xB964, 0x7B6A,
07788     0xB965, 0x7B6B, 0xB966, 0x7B6C, 0xB967, 0x7B6D, 0xB968, 0x7B6F,
07789     0xB969, 0x7B70, 0xB96A, 0x7B73, 0xB96B, 0x7B74, 0xB96C, 0x7B76,
07790     0xB96D, 0x7B78, 0xB96E, 0x7B7A, 0xB96F, 0x7B7C, 0xB970, 0x7B7D,
07791     0xB971, 0x7B7F, 0xB972, 0x7B81, 0xB973, 0x7B82, 0xB974, 0x7B83,
07792     0xB975, 0x7B84, 0xB976, 0x7B86, 0xB977, 0x7B87, 0xB978, 0x7B88,
07793     0xB979, 0x7B89, 0xB97A, 0x7B8A, 0xB97B, 0x7B8B, 0xB97C, 0x7B8C,
07794     0xB97D, 0x7B8E, 0xB97E, 0x7B8F, 0xB980, 0x7B91, 0xB981, 0x7B92,
07795     0xB982, 0x7B93, 0xB983, 0x7B96, 0xB984, 0x7B98, 0xB985, 0x7B99,
07796     0xB986, 0x7B9A, 0xB987, 0x7B9B, 0xB988, 0x7B9E, 0xB989, 0x7B9F,
07797     0xB98A, 0x7BA0, 0xB98B, 0x7BA3, 0xB98C, 0x7BA4, 0xB98D, 0x7BA5,
07798     0xB98E, 0x7BAE, 0xB98F, 0x7BAF, 0xB990, 0x7BB0, 0xB991, 0x7BB2,
07799     0xB992, 0x7BB3, 0xB993, 0x7BB5, 0xB994, 0x7BB6, 0xB995, 0x7BB7,
07800     0xB996, 0x7BB9, 0xB997, 0x7BBA, 0xB998, 0x7BBB, 0xB999, 0x7BBC,
07801     0xB99A, 0x7BBD, 0xB99B, 0x7BBE, 0xB99C, 0x7BBF, 0xB99D, 0x7BC0,
07802     0xB99E, 0x7BC2, 0xB99F, 0x7BC3, 0xB9A0, 0x7BC4, 0xB9A1, 0x57C2,
07803     0xB9A2, 0x803F, 0xB9A3, 0x6897, 0xB9A4, 0x5DE5, 0xB9A5, 0x653B,
07804     0xB9A6, 0x529F, 0xB9A7, 0x606D, 0xB9A8, 0x9F9A, 0xB9A9, 0x4F9B,
07805     0xB9AA, 0x8EAC, 0xB9AB, 0x516C, 0xB9AC, 0x5BAB, 0xB9AD, 0x5F13,
07806     0xB9AE, 0x5DE9, 0xB9AF, 0x6C5E, 0xB9B0, 0x62F1, 0xB9B1, 0x8D21,
07807     0xB9B2, 0x5171, 0xB9B3, 0x94A9, 0xB9B4, 0x52FE, 0xB9B5, 0x6C9F,
07808     0xB9B6, 0x82DF, 0xB9B7, 0x72D7, 0xB9B8, 0x57A2, 0xB9B9, 0x6784,
07809     0xB9BA, 0x8D2D, 0xB9BB, 0x591F, 0xB9BC, 0x8F9C, 0xB9BD, 0x83C7,
07810     0xB9BE, 0x5495, 0xB9BF, 0x7B8D, 0xB9C0, 0x4F30, 0xB9C1, 0x6CBD,
07811     0xB9C2, 0x5B64, 0xB9C3, 0x59D1, 0xB9C4, 0x9F13, 0xB9C5, 0x53E4,
07812     0xB9C6, 0x86CA, 0xB9C7, 0x9AA8, 0xB9C8, 0x8C37, 0xB9C9, 0x80A1,
07813     0xB9CA, 0x6545, 0xB9CB, 0x987E, 0xB9CC, 0x56FA, 0xB9CD, 0x96C7,
07814     0xB9CE, 0x522E, 0xB9CF, 0x74DC, 0xB9D0, 0x5250, 0xB9D1, 0x5BE1,
07815     0xB9D2, 0x6302, 0xB9D3, 0x8902, 0xB9D4, 0x4E56, 0xB9D5, 0x62D0,
07816     0xB9D6, 0x602A, 0xB9D7, 0x68FA, 0xB9D8, 0x5173, 0xB9D9, 0x5B98,
07817     0xB9DA, 0x51A0, 0xB9DB, 0x89C2, 0xB9DC, 0x7BA1, 0xB9DD, 0x9986,
07818     0xB9DE, 0x7F50, 0xB9DF, 0x60EF, 0xB9E0, 0x704C, 0xB9E1, 0x8D2F,
07819     0xB9E2, 0x5149, 0xB9E3, 0x5E7F, 0xB9E4, 0x901B, 0xB9E5, 0x7470,
07820     0xB9E6, 0x89C4, 0xB9E7, 0x572D, 0xB9E8, 0x7845, 0xB9E9, 0x5F52,
07821     0xB9EA, 0x9F9F, 0xB9EB, 0x95FA, 0xB9EC, 0x8F68, 0xB9ED, 0x9B3C,
07822     0xB9EE, 0x8BE1, 0xB9EF, 0x7678, 0xB9F0, 0x6842, 0xB9F1, 0x67DC,
07823     0xB9F2, 0x8DEA, 0xB9F3, 0x8D35, 0xB9F4, 0x523D, 0xB9F5, 0x8F8A,
07824     0xB9F6, 0x6EDA, 0xB9F7, 0x68CD, 0xB9F8, 0x9505, 0xB9F9, 0x90ED,
07825     0xB9FA, 0x56FD, 0xB9FB, 0x679C, 0xB9FC, 0x88F9, 0xB9FD, 0x8FC7,
07826     0xB9FE, 0x54C8, 0xBA40, 0x7BC5, 0xBA41, 0x7BC8, 0xBA42, 0x7BC9,
07827     0xBA43, 0x7BCA, 0xBA44, 0x7BCB, 0xBA45, 0x7BCD, 0xBA46, 0x7BCE,
07828     0xBA47, 0x7BCF, 0xBA48, 0x7BD0, 0xBA49, 0x7BD2, 0xBA4A, 0x7BD4,
07829     0xBA4B, 0x7BD5, 0xBA4C, 0x7BD6, 0xBA4D, 0x7BD7, 0xBA4E, 0x7BD8,
07830     0xBA4F, 0x7BDB, 0xBA50, 0x7BDC, 0xBA51, 0x7BDE, 0xBA52, 0x7BDF,
07831     0xBA53, 0x7BE0, 0xBA54, 0x7BE2, 0xBA55, 0x7BE3, 0xBA56, 0x7BE4,
07832     0xBA57, 0x7BE7, 0xBA58, 0x7BE8, 0xBA59, 0x7BE9, 0xBA5A, 0x7BEB,
07833     0xBA5B, 0x7BEC, 0xBA5C, 0x7BED, 0xBA5D, 0x7BEF, 0xBA5E, 0x7BF0,
07834     0xBA5F, 0x7BF2, 0xBA60, 0x7BF3, 0xBA61, 0x7BF4, 0xBA62, 0x7BF5,
07835     0xBA63, 0x7BF6, 0xBA64, 0x7BF8, 0xBA65, 0x7BF9, 0xBA66, 0x7BFA,
07836     0xBA67, 0x7BFB, 0xBA68, 0x7BFD, 0xBA69, 0x7BFF, 0xBA6A, 0x7C00,
07837     0xBA6B, 0x7C01, 0xBA6C, 0x7C02, 0xBA6D, 0x7C03, 0xBA6E, 0x7C04,
07838     0xBA6F, 0x7C05, 0xBA70, 0x7C06, 0xBA71, 0x7C08, 0xBA72, 0x7C09,
07839     0xBA73, 0x7C0A, 0xBA74, 0x7C0D, 0xBA75, 0x7C0E, 0xBA76, 0x7C10,
07840     0xBA77, 0x7C11, 0xBA78, 0x7C12, 0xBA79, 0x7C13, 0xBA7A, 0x7C14,
07841     0xBA7B, 0x7C15, 0xBA7C, 0x7C17, 0xBA7D, 0x7C18, 0xBA7E, 0x7C19,
07842     0xBA80, 0x7C1A, 0xBA81, 0x7C1B, 0xBA82, 0x7C1C, 0xBA83, 0x7C1D,
07843     0xBA84, 0x7C1E, 0xBA85, 0x7C20, 0xBA86, 0x7C21, 0xBA87, 0x7C22,
07844     0xBA88, 0x7C23, 0xBA89, 0x7C24, 0xBA8A, 0x7C25, 0xBA8B, 0x7C28,
07845     0xBA8C, 0x7C29, 0xBA8D, 0x7C2B, 0xBA8E, 0x7C2C, 0xBA8F, 0x7C2D,
07846     0xBA90, 0x7C2E, 0xBA91, 0x7C2F, 0xBA92, 0x7C30, 0xBA93, 0x7C31,
07847     0xBA94, 0x7C32, 0xBA95, 0x7C33, 0xBA96, 0x7C34, 0xBA97, 0x7C35,
07848     0xBA98, 0x7C36, 0xBA99, 0x7C37, 0xBA9A, 0x7C39, 0xBA9B, 0x7C3A,
07849     0xBA9C, 0x7C3B, 0xBA9D, 0x7C3C, 0xBA9E, 0x7C3D, 0xBA9F, 0x7C3E,
07850     0xBAA0, 0x7C42, 0xBAA1, 0x9AB8, 0xBAA2, 0x5B69, 0xBAA3, 0x6D77,
07851     0xBAA4, 0x6C26, 0xBAA5, 0x4EA5, 0xBAA6, 0x5BB3, 0xBAA7, 0x9A87,
07852     0xBAA8, 0x9163, 0xBAA9, 0x61A8, 0xBAAA, 0x90AF, 0xBAAB, 0x97E9,
07853     0xBAAC, 0x542B, 0xBAAD, 0x6DB5, 0xBAAE, 0x5BD2, 0xBAAF, 0x51FD,
07854     0xBAB0, 0x558A, 0xBAB1, 0x7F55, 0xBAB2, 0x7FF0, 0xBAB3, 0x64BC,
07855     0xBAB4, 0x634D, 0xBAB5, 0x65F1, 0xBAB6, 0x61BE, 0xBAB7, 0x608D,
07856     0xBAB8, 0x710A, 0xBAB9, 0x6C57, 0xBABA, 0x6C49, 0xBABB, 0x592F,
07857     0xBABC, 0x676D, 0xBABD, 0x822A, 0xBABE, 0x58D5, 0xBABF, 0x568E,
07858     0xBAC0, 0x8C6A, 0xBAC1, 0x6BEB, 0xBAC2, 0x90DD, 0xBAC3, 0x597D,
07859     0xBAC4, 0x8017, 0xBAC5, 0x53F7, 0xBAC6, 0x6D69, 0xBAC7, 0x5475,
07860     0xBAC8, 0x559D, 0xBAC9, 0x8377, 0xBACA, 0x83CF, 0xBACB, 0x6838,
07861     0xBACC, 0x79BE, 0xBACD, 0x548C, 0xBACE, 0x4F55, 0xBACF, 0x5408,
07862     0xBAD0, 0x76D2, 0xBAD1, 0x8C89, 0xBAD2, 0x9602, 0xBAD3, 0x6CB3,
07863     0xBAD4, 0x6DB8, 0xBAD5, 0x8D6B, 0xBAD6, 0x8910, 0xBAD7, 0x9E64,
07864     0xBAD8, 0x8D3A, 0xBAD9, 0x563F, 0xBADA, 0x9ED1, 0xBADB, 0x75D5,
07865     0xBADC, 0x5F88, 0xBADD, 0x72E0, 0xBADE, 0x6068, 0xBADF, 0x54FC,
07866     0xBAE0, 0x4EA8, 0xBAE1, 0x6A2A, 0xBAE2, 0x8861, 0xBAE3, 0x6052,
07867     0xBAE4, 0x8F70, 0xBAE5, 0x54C4, 0xBAE6, 0x70D8, 0xBAE7, 0x8679,
07868     0xBAE8, 0x9E3F, 0xBAE9, 0x6D2A, 0xBAEA, 0x5B8F, 0xBAEB, 0x5F18,
07869     0xBAEC, 0x7EA2, 0xBAED, 0x5589, 0xBAEE, 0x4FAF, 0xBAEF, 0x7334,
07870     0xBAF0, 0x543C, 0xBAF1, 0x539A, 0xBAF2, 0x5019, 0xBAF3, 0x540E,
07871     0xBAF4, 0x547C, 0xBAF5, 0x4E4E, 0xBAF6, 0x5FFD, 0xBAF7, 0x745A,
07872     0xBAF8, 0x58F6, 0xBAF9, 0x846B, 0xBAFA, 0x80E1, 0xBAFB, 0x8774,
07873     0xBAFC, 0x72D0, 0xBAFD, 0x7CCA, 0xBAFE, 0x6E56, 0xBB40, 0x7C43,
07874     0xBB41, 0x7C44, 0xBB42, 0x7C45, 0xBB43, 0x7C46, 0xBB44, 0x7C47,
07875     0xBB45, 0x7C48, 0xBB46, 0x7C49, 0xBB47, 0x7C4A, 0xBB48, 0x7C4B,
07876     0xBB49, 0x7C4C, 0xBB4A, 0x7C4E, 0xBB4B, 0x7C4F, 0xBB4C, 0x7C50,
07877     0xBB4D, 0x7C51, 0xBB4E, 0x7C52, 0xBB4F, 0x7C53, 0xBB50, 0x7C54,
07878     0xBB51, 0x7C55, 0xBB52, 0x7C56, 0xBB53, 0x7C57, 0xBB54, 0x7C58,
07879     0xBB55, 0x7C59, 0xBB56, 0x7C5A, 0xBB57, 0x7C5B, 0xBB58, 0x7C5C,
07880     0xBB59, 0x7C5D, 0xBB5A, 0x7C5E, 0xBB5B, 0x7C5F, 0xBB5C, 0x7C60,
07881     0xBB5D, 0x7C61, 0xBB5E, 0x7C62, 0xBB5F, 0x7C63, 0xBB60, 0x7C64,
07882     0xBB61, 0x7C65, 0xBB62, 0x7C66, 0xBB63, 0x7C67, 0xBB64, 0x7C68,
07883     0xBB65, 0x7C69, 0xBB66, 0x7C6A, 0xBB67, 0x7C6B, 0xBB68, 0x7C6C,
07884     0xBB69, 0x7C6D, 0xBB6A, 0x7C6E, 0xBB6B, 0x7C6F, 0xBB6C, 0x7C70,
07885     0xBB6D, 0x7C71, 0xBB6E, 0x7C72, 0xBB6F, 0x7C75, 0xBB70, 0x7C76,
07886     0xBB71, 0x7C77, 0xBB72, 0x7C78, 0xBB73, 0x7C79, 0xBB74, 0x7C7A,
07887     0xBB75, 0x7C7E, 0xBB76, 0x7C7F, 0xBB77, 0x7C80, 0xBB78, 0x7C81,
07888     0xBB79, 0x7C82, 0xBB7A, 0x7C83, 0xBB7B, 0x7C84, 0xBB7C, 0x7C85,
07889     0xBB7D, 0x7C86, 0xBB7E, 0x7C87, 0xBB80, 0x7C88, 0xBB81, 0x7C8A,
07890     0xBB82, 0x7C8B, 0xBB83, 0x7C8C, 0xBB84, 0x7C8D, 0xBB85, 0x7C8E,
07891     0xBB86, 0x7C8F, 0xBB87, 0x7C90, 0xBB88, 0x7C93, 0xBB89, 0x7C94,
07892     0xBB8A, 0x7C96, 0xBB8B, 0x7C99, 0xBB8C, 0x7C9A, 0xBB8D, 0x7C9B,
07893     0xBB8E, 0x7CA0, 0xBB8F, 0x7CA1, 0xBB90, 0x7CA3, 0xBB91, 0x7CA6,
07894     0xBB92, 0x7CA7, 0xBB93, 0x7CA8, 0xBB94, 0x7CA9, 0xBB95, 0x7CAB,
07895     0xBB96, 0x7CAC, 0xBB97, 0x7CAD, 0xBB98, 0x7CAF, 0xBB99, 0x7CB0,
07896     0xBB9A, 0x7CB4, 0xBB9B, 0x7CB5, 0xBB9C, 0x7CB6, 0xBB9D, 0x7CB7,
07897     0xBB9E, 0x7CB8, 0xBB9F, 0x7CBA, 0xBBA0, 0x7CBB, 0xBBA1, 0x5F27,
07898     0xBBA2, 0x864E, 0xBBA3, 0x552C, 0xBBA4, 0x62A4, 0xBBA5, 0x4E92,
07899     0xBBA6, 0x6CAA, 0xBBA7, 0x6237, 0xBBA8, 0x82B1, 0xBBA9, 0x54D7,
07900     0xBBAA, 0x534E, 0xBBAB, 0x733E, 0xBBAC, 0x6ED1, 0xBBAD, 0x753B,
07901     0xBBAE, 0x5212, 0xBBAF, 0x5316, 0xBBB0, 0x8BDD, 0xBBB1, 0x69D0,
07902     0xBBB2, 0x5F8A, 0xBBB3, 0x6000, 0xBBB4, 0x6DEE, 0xBBB5, 0x574F,
07903     0xBBB6, 0x6B22, 0xBBB7, 0x73AF, 0xBBB8, 0x6853, 0xBBB9, 0x8FD8,
07904     0xBBBA, 0x7F13, 0xBBBB, 0x6362, 0xBBBC, 0x60A3, 0xBBBD, 0x5524,
07905     0xBBBE, 0x75EA, 0xBBBF, 0x8C62, 0xBBC0, 0x7115, 0xBBC1, 0x6DA3,
07906     0xBBC2, 0x5BA6, 0xBBC3, 0x5E7B, 0xBBC4, 0x8352, 0xBBC5, 0x614C,
07907     0xBBC6, 0x9EC4, 0xBBC7, 0x78FA, 0xBBC8, 0x8757, 0xBBC9, 0x7C27,
07908     0xBBCA, 0x7687, 0xBBCB, 0x51F0, 0xBBCC, 0x60F6, 0xBBCD, 0x714C,
07909     0xBBCE, 0x6643, 0xBBCF, 0x5E4C, 0xBBD0, 0x604D, 0xBBD1, 0x8C0E,
07910     0xBBD2, 0x7070, 0xBBD3, 0x6325, 0xBBD4, 0x8F89, 0xBBD5, 0x5FBD,
07911     0xBBD6, 0x6062, 0xBBD7, 0x86D4, 0xBBD8, 0x56DE, 0xBBD9, 0x6BC1,
07912     0xBBDA, 0x6094, 0xBBDB, 0x6167, 0xBBDC, 0x5349, 0xBBDD, 0x60E0,
07913     0xBBDE, 0x6666, 0xBBDF, 0x8D3F, 0xBBE0, 0x79FD, 0xBBE1, 0x4F1A,
07914     0xBBE2, 0x70E9, 0xBBE3, 0x6C47, 0xBBE4, 0x8BB3, 0xBBE5, 0x8BF2,
07915     0xBBE6, 0x7ED8, 0xBBE7, 0x8364, 0xBBE8, 0x660F, 0xBBE9, 0x5A5A,
07916     0xBBEA, 0x9B42, 0xBBEB, 0x6D51, 0xBBEC, 0x6DF7, 0xBBED, 0x8C41,
07917     0xBBEE, 0x6D3B, 0xBBEF, 0x4F19, 0xBBF0, 0x706B, 0xBBF1, 0x83B7,
07918     0xBBF2, 0x6216, 0xBBF3, 0x60D1, 0xBBF4, 0x970D, 0xBBF5, 0x8D27,
07919     0xBBF6, 0x7978, 0xBBF7, 0x51FB, 0xBBF8, 0x573E, 0xBBF9, 0x57FA,
07920     0xBBFA, 0x673A, 0xBBFB, 0x7578, 0xBBFC, 0x7A3D, 0xBBFD, 0x79EF,
07921     0xBBFE, 0x7B95, 0xBC40, 0x7CBF, 0xBC41, 0x7CC0, 0xBC42, 0x7CC2,
07922     0xBC43, 0x7CC3, 0xBC44, 0x7CC4, 0xBC45, 0x7CC6, 0xBC46, 0x7CC9,
07923     0xBC47, 0x7CCB, 0xBC48, 0x7CCE, 0xBC49, 0x7CCF, 0xBC4A, 0x7CD0,
07924     0xBC4B, 0x7CD1, 0xBC4C, 0x7CD2, 0xBC4D, 0x7CD3, 0xBC4E, 0x7CD4,
07925     0xBC4F, 0x7CD8, 0xBC50, 0x7CDA, 0xBC51, 0x7CDB, 0xBC52, 0x7CDD,
07926     0xBC53, 0x7CDE, 0xBC54, 0x7CE1, 0xBC55, 0x7CE2, 0xBC56, 0x7CE3,
07927     0xBC57, 0x7CE4, 0xBC58, 0x7CE5, 0xBC59, 0x7CE6, 0xBC5A, 0x7CE7,
07928     0xBC5B, 0x7CE9, 0xBC5C, 0x7CEA, 0xBC5D, 0x7CEB, 0xBC5E, 0x7CEC,
07929     0xBC5F, 0x7CED, 0xBC60, 0x7CEE, 0xBC61, 0x7CF0, 0xBC62, 0x7CF1,
07930     0xBC63, 0x7CF2, 0xBC64, 0x7CF3, 0xBC65, 0x7CF4, 0xBC66, 0x7CF5,
07931     0xBC67, 0x7CF6, 0xBC68, 0x7CF7, 0xBC69, 0x7CF9, 0xBC6A, 0x7CFA,
07932     0xBC6B, 0x7CFC, 0xBC6C, 0x7CFD, 0xBC6D, 0x7CFE, 0xBC6E, 0x7CFF,
07933     0xBC6F, 0x7D00, 0xBC70, 0x7D01, 0xBC71, 0x7D02, 0xBC72, 0x7D03,
07934     0xBC73, 0x7D04, 0xBC74, 0x7D05, 0xBC75, 0x7D06, 0xBC76, 0x7D07,
07935     0xBC77, 0x7D08, 0xBC78, 0x7D09, 0xBC79, 0x7D0B, 0xBC7A, 0x7D0C,
07936     0xBC7B, 0x7D0D, 0xBC7C, 0x7D0E, 0xBC7D, 0x7D0F, 0xBC7E, 0x7D10,
07937     0xBC80, 0x7D11, 0xBC81, 0x7D12, 0xBC82, 0x7D13, 0xBC83, 0x7D14,
07938     0xBC84, 0x7D15, 0xBC85, 0x7D16, 0xBC86, 0x7D17, 0xBC87, 0x7D18,
07939     0xBC88, 0x7D19, 0xBC89, 0x7D1A, 0xBC8A, 0x7D1B, 0xBC8B, 0x7D1C,
07940     0xBC8C, 0x7D1D, 0xBC8D, 0x7D1E, 0xBC8E, 0x7D1F, 0xBC8F, 0x7D21,
07941     0xBC90, 0x7D23, 0xBC91, 0x7D24, 0xBC92, 0x7D25, 0xBC93, 0x7D26,
07942     0xBC94, 0x7D28, 0xBC95, 0x7D29, 0xBC96, 0x7D2A, 0xBC97, 0x7D2C,
07943     0xBC98, 0x7D2D, 0xBC99, 0x7D2E, 0xBC9A, 0x7D30, 0xBC9B, 0x7D31,
07944     0xBC9C, 0x7D32, 0xBC9D, 0x7D33, 0xBC9E, 0x7D34, 0xBC9F, 0x7D35,
07945     0xBCA0, 0x7D36, 0xBCA1, 0x808C, 0xBCA2, 0x9965, 0xBCA3, 0x8FF9,
07946     0xBCA4, 0x6FC0, 0xBCA5, 0x8BA5, 0xBCA6, 0x9E21, 0xBCA7, 0x59EC,
07947     0xBCA8, 0x7EE9, 0xBCA9, 0x7F09, 0xBCAA, 0x5409, 0xBCAB, 0x6781,
07948     0xBCAC, 0x68D8, 0xBCAD, 0x8F91, 0xBCAE, 0x7C4D, 0xBCAF, 0x96C6,
07949     0xBCB0, 0x53CA, 0xBCB1, 0x6025, 0xBCB2, 0x75BE, 0xBCB3, 0x6C72,
07950     0xBCB4, 0x5373, 0xBCB5, 0x5AC9, 0xBCB6, 0x7EA7, 0xBCB7, 0x6324,
07951     0xBCB8, 0x51E0, 0xBCB9, 0x810A, 0xBCBA, 0x5DF1, 0xBCBB, 0x84DF,
07952     0xBCBC, 0x6280, 0xBCBD, 0x5180, 0xBCBE, 0x5B63, 0xBCBF, 0x4F0E,
07953     0xBCC0, 0x796D, 0xBCC1, 0x5242, 0xBCC2, 0x60B8, 0xBCC3, 0x6D4E,
07954     0xBCC4, 0x5BC4, 0xBCC5, 0x5BC2, 0xBCC6, 0x8BA1, 0xBCC7, 0x8BB0,
07955     0xBCC8, 0x65E2, 0xBCC9, 0x5FCC, 0xBCCA, 0x9645, 0xBCCB, 0x5993,
07956     0xBCCC, 0x7EE7, 0xBCCD, 0x7EAA, 0xBCCE, 0x5609, 0xBCCF, 0x67B7,
07957     0xBCD0, 0x5939, 0xBCD1, 0x4F73, 0xBCD2, 0x5BB6, 0xBCD3, 0x52A0,
07958     0xBCD4, 0x835A, 0xBCD5, 0x988A, 0xBCD6, 0x8D3E, 0xBCD7, 0x7532,
07959     0xBCD8, 0x94BE, 0xBCD9, 0x5047, 0xBCDA, 0x7A3C, 0xBCDB, 0x4EF7,
07960     0xBCDC, 0x67B6, 0xBCDD, 0x9A7E, 0xBCDE, 0x5AC1, 0xBCDF, 0x6B7C,
07961     0xBCE0, 0x76D1, 0xBCE1, 0x575A, 0xBCE2, 0x5C16, 0xBCE3, 0x7B3A,
07962     0xBCE4, 0x95F4, 0xBCE5, 0x714E, 0xBCE6, 0x517C, 0xBCE7, 0x80A9,
07963     0xBCE8, 0x8270, 0xBCE9, 0x5978, 0xBCEA, 0x7F04, 0xBCEB, 0x8327,
07964     0xBCEC, 0x68C0, 0xBCED, 0x67EC, 0xBCEE, 0x78B1, 0xBCEF, 0x7877,
07965     0xBCF0, 0x62E3, 0xBCF1, 0x6361, 0xBCF2, 0x7B80, 0xBCF3, 0x4FED,
07966     0xBCF4, 0x526A, 0xBCF5, 0x51CF, 0xBCF6, 0x8350, 0xBCF7, 0x69DB,
07967     0xBCF8, 0x9274, 0xBCF9, 0x8DF5, 0xBCFA, 0x8D31, 0xBCFB, 0x89C1,
07968     0xBCFC, 0x952E, 0xBCFD, 0x7BAD, 0xBCFE, 0x4EF6, 0xBD40, 0x7D37,
07969     0xBD41, 0x7D38, 0xBD42, 0x7D39, 0xBD43, 0x7D3A, 0xBD44, 0x7D3B,
07970     0xBD45, 0x7D3C, 0xBD46, 0x7D3D, 0xBD47, 0x7D3E, 0xBD48, 0x7D3F,
07971     0xBD49, 0x7D40, 0xBD4A, 0x7D41, 0xBD4B, 0x7D42, 0xBD4C, 0x7D43,
07972     0xBD4D, 0x7D44, 0xBD4E, 0x7D45, 0xBD4F, 0x7D46, 0xBD50, 0x7D47,
07973     0xBD51, 0x7D48, 0xBD52, 0x7D49, 0xBD53, 0x7D4A, 0xBD54, 0x7D4B,
07974     0xBD55, 0x7D4C, 0xBD56, 0x7D4D, 0xBD57, 0x7D4E, 0xBD58, 0x7D4F,
07975     0xBD59, 0x7D50, 0xBD5A, 0x7D51, 0xBD5B, 0x7D52, 0xBD5C, 0x7D53,
07976     0xBD5D, 0x7D54, 0xBD5E, 0x7D55, 0xBD5F, 0x7D56, 0xBD60, 0x7D57,
07977     0xBD61, 0x7D58, 0xBD62, 0x7D59, 0xBD63, 0x7D5A, 0xBD64, 0x7D5B,
07978     0xBD65, 0x7D5C, 0xBD66, 0x7D5D, 0xBD67, 0x7D5E, 0xBD68, 0x7D5F,
07979     0xBD69, 0x7D60, 0xBD6A, 0x7D61, 0xBD6B, 0x7D62, 0xBD6C, 0x7D63,
07980     0xBD6D, 0x7D64, 0xBD6E, 0x7D65, 0xBD6F, 0x7D66, 0xBD70, 0x7D67,
07981     0xBD71, 0x7D68, 0xBD72, 0x7D69, 0xBD73, 0x7D6A, 0xBD74, 0x7D6B,
07982     0xBD75, 0x7D6C, 0xBD76, 0x7D6D, 0xBD77, 0x7D6F, 0xBD78, 0x7D70,
07983     0xBD79, 0x7D71, 0xBD7A, 0x7D72, 0xBD7B, 0x7D73, 0xBD7C, 0x7D74,
07984     0xBD7D, 0x7D75, 0xBD7E, 0x7D76, 0xBD80, 0x7D78, 0xBD81, 0x7D79,
07985     0xBD82, 0x7D7A, 0xBD83, 0x7D7B, 0xBD84, 0x7D7C, 0xBD85, 0x7D7D,
07986     0xBD86, 0x7D7E, 0xBD87, 0x7D7F, 0xBD88, 0x7D80, 0xBD89, 0x7D81,
07987     0xBD8A, 0x7D82, 0xBD8B, 0x7D83, 0xBD8C, 0x7D84, 0xBD8D, 0x7D85,
07988     0xBD8E, 0x7D86, 0xBD8F, 0x7D87, 0xBD90, 0x7D88, 0xBD91, 0x7D89,
07989     0xBD92, 0x7D8A, 0xBD93, 0x7D8B, 0xBD94, 0x7D8C, 0xBD95, 0x7D8D,
07990     0xBD96, 0x7D8E, 0xBD97, 0x7D8F, 0xBD98, 0x7D90, 0xBD99, 0x7D91,
07991     0xBD9A, 0x7D92, 0xBD9B, 0x7D93, 0xBD9C, 0x7D94, 0xBD9D, 0x7D95,
07992     0xBD9E, 0x7D96, 0xBD9F, 0x7D97, 0xBDA0, 0x7D98, 0xBDA1, 0x5065,
07993     0xBDA2, 0x8230, 0xBDA3, 0x5251, 0xBDA4, 0x996F, 0xBDA5, 0x6E10,
07994     0xBDA6, 0x6E85, 0xBDA7, 0x6DA7, 0xBDA8, 0x5EFA, 0xBDA9, 0x50F5,
07995     0xBDAA, 0x59DC, 0xBDAB, 0x5C06, 0xBDAC, 0x6D46, 0xBDAD, 0x6C5F,
07996     0xBDAE, 0x7586, 0xBDAF, 0x848B, 0xBDB0, 0x6868, 0xBDB1, 0x5956,
07997     0xBDB2, 0x8BB2, 0xBDB3, 0x5320, 0xBDB4, 0x9171, 0xBDB5, 0x964D,
07998     0xBDB6, 0x8549, 0xBDB7, 0x6912, 0xBDB8, 0x7901, 0xBDB9, 0x7126,
07999     0xBDBA, 0x80F6, 0xBDBB, 0x4EA4, 0xBDBC, 0x90CA, 0xBDBD, 0x6D47,
08000     0xBDBE, 0x9A84, 0xBDBF, 0x5A07, 0xBDC0, 0x56BC, 0xBDC1, 0x6405,
08001     0xBDC2, 0x94F0, 0xBDC3, 0x77EB, 0xBDC4, 0x4FA5, 0xBDC5, 0x811A,
08002     0xBDC6, 0x72E1, 0xBDC7, 0x89D2, 0xBDC8, 0x997A, 0xBDC9, 0x7F34,
08003     0xBDCA, 0x7EDE, 0xBDCB, 0x527F, 0xBDCC, 0x6559, 0xBDCD, 0x9175,
08004     0xBDCE, 0x8F7F, 0xBDCF, 0x8F83, 0xBDD0, 0x53EB, 0xBDD1, 0x7A96,
08005     0xBDD2, 0x63ED, 0xBDD3, 0x63A5, 0xBDD4, 0x7686, 0xBDD5, 0x79F8,
08006     0xBDD6, 0x8857, 0xBDD7, 0x9636, 0xBDD8, 0x622A, 0xBDD9, 0x52AB,
08007     0xBDDA, 0x8282, 0xBDDB, 0x6854, 0xBDDC, 0x6770, 0xBDDD, 0x6377,
08008     0xBDDE, 0x776B, 0xBDDF, 0x7AED, 0xBDE0, 0x6D01, 0xBDE1, 0x7ED3,
08009     0xBDE2, 0x89E3, 0xBDE3, 0x59D0, 0xBDE4, 0x6212, 0xBDE5, 0x85C9,
08010     0xBDE6, 0x82A5, 0xBDE7, 0x754C, 0xBDE8, 0x501F, 0xBDE9, 0x4ECB,
08011     0xBDEA, 0x75A5, 0xBDEB, 0x8BEB, 0xBDEC, 0x5C4A, 0xBDED, 0x5DFE,
08012     0xBDEE, 0x7B4B, 0xBDEF, 0x65A4, 0xBDF0, 0x91D1, 0xBDF1, 0x4ECA,
08013     0xBDF2, 0x6D25, 0xBDF3, 0x895F, 0xBDF4, 0x7D27, 0xBDF5, 0x9526,
08014     0xBDF6, 0x4EC5, 0xBDF7, 0x8C28, 0xBDF8, 0x8FDB, 0xBDF9, 0x9773,
08015     0xBDFA, 0x664B, 0xBDFB, 0x7981, 0xBDFC, 0x8FD1, 0xBDFD, 0x70EC,
08016     0xBDFE, 0x6D78, 0xBE40, 0x7D99, 0xBE41, 0x7D9A, 0xBE42, 0x7D9B,
08017     0xBE43, 0x7D9C, 0xBE44, 0x7D9D, 0xBE45, 0x7D9E, 0xBE46, 0x7D9F,
08018     0xBE47, 0x7DA0, 0xBE48, 0x7DA1, 0xBE49, 0x7DA2, 0xBE4A, 0x7DA3,
08019     0xBE4B, 0x7DA4, 0xBE4C, 0x7DA5, 0xBE4D, 0x7DA7, 0xBE4E, 0x7DA8,
08020     0xBE4F, 0x7DA9, 0xBE50, 0x7DAA, 0xBE51, 0x7DAB, 0xBE52, 0x7DAC,
08021     0xBE53, 0x7DAD, 0xBE54, 0x7DAF, 0xBE55, 0x7DB0, 0xBE56, 0x7DB1,
08022     0xBE57, 0x7DB2, 0xBE58, 0x7DB3, 0xBE59, 0x7DB4, 0xBE5A, 0x7DB5,
08023     0xBE5B, 0x7DB6, 0xBE5C, 0x7DB7, 0xBE5D, 0x7DB8, 0xBE5E, 0x7DB9,
08024     0xBE5F, 0x7DBA, 0xBE60, 0x7DBB, 0xBE61, 0x7DBC, 0xBE62, 0x7DBD,
08025     0xBE63, 0x7DBE, 0xBE64, 0x7DBF, 0xBE65, 0x7DC0, 0xBE66, 0x7DC1,
08026     0xBE67, 0x7DC2, 0xBE68, 0x7DC3, 0xBE69, 0x7DC4, 0xBE6A, 0x7DC5,
08027     0xBE6B, 0x7DC6, 0xBE6C, 0x7DC7, 0xBE6D, 0x7DC8, 0xBE6E, 0x7DC9,
08028     0xBE6F, 0x7DCA, 0xBE70, 0x7DCB, 0xBE71, 0x7DCC, 0xBE72, 0x7DCD,
08029     0xBE73, 0x7DCE, 0xBE74, 0x7DCF, 0xBE75, 0x7DD0, 0xBE76, 0x7DD1,
08030     0xBE77, 0x7DD2, 0xBE78, 0x7DD3, 0xBE79, 0x7DD4, 0xBE7A, 0x7DD5,
08031     0xBE7B, 0x7DD6, 0xBE7C, 0x7DD7, 0xBE7D, 0x7DD8, 0xBE7E, 0x7DD9,
08032     0xBE80, 0x7DDA, 0xBE81, 0x7DDB, 0xBE82, 0x7DDC, 0xBE83, 0x7DDD,
08033     0xBE84, 0x7DDE, 0xBE85, 0x7DDF, 0xBE86, 0x7DE0, 0xBE87, 0x7DE1,
08034     0xBE88, 0x7DE2, 0xBE89, 0x7DE3, 0xBE8A, 0x7DE4, 0xBE8B, 0x7DE5,
08035     0xBE8C, 0x7DE6, 0xBE8D, 0x7DE7, 0xBE8E, 0x7DE8, 0xBE8F, 0x7DE9,
08036     0xBE90, 0x7DEA, 0xBE91, 0x7DEB, 0xBE92, 0x7DEC, 0xBE93, 0x7DED,
08037     0xBE94, 0x7DEE, 0xBE95, 0x7DEF, 0xBE96, 0x7DF0, 0xBE97, 0x7DF1,
08038     0xBE98, 0x7DF2, 0xBE99, 0x7DF3, 0xBE9A, 0x7DF4, 0xBE9B, 0x7DF5,
08039     0xBE9C, 0x7DF6, 0xBE9D, 0x7DF7, 0xBE9E, 0x7DF8, 0xBE9F, 0x7DF9,
08040     0xBEA0, 0x7DFA, 0xBEA1, 0x5C3D, 0xBEA2, 0x52B2, 0xBEA3, 0x8346,
08041     0xBEA4, 0x5162, 0xBEA5, 0x830E, 0xBEA6, 0x775B, 0xBEA7, 0x6676,
08042     0xBEA8, 0x9CB8, 0xBEA9, 0x4EAC, 0xBEAA, 0x60CA, 0xBEAB, 0x7CBE,
08043     0xBEAC, 0x7CB3, 0xBEAD, 0x7ECF, 0xBEAE, 0x4E95, 0xBEAF, 0x8B66,
08044     0xBEB0, 0x666F, 0xBEB1, 0x9888, 0xBEB2, 0x9759, 0xBEB3, 0x5883,
08045     0xBEB4, 0x656C, 0xBEB5, 0x955C, 0xBEB6, 0x5F84, 0xBEB7, 0x75C9,
08046     0xBEB8, 0x9756, 0xBEB9, 0x7ADF, 0xBEBA, 0x7ADE, 0xBEBB, 0x51C0,
08047     0xBEBC, 0x70AF, 0xBEBD, 0x7A98, 0xBEBE, 0x63EA, 0xBEBF, 0x7A76,
08048     0xBEC0, 0x7EA0, 0xBEC1, 0x7396, 0xBEC2, 0x97ED, 0xBEC3, 0x4E45,
08049     0xBEC4, 0x7078, 0xBEC5, 0x4E5D, 0xBEC6, 0x9152, 0xBEC7, 0x53A9,
08050     0xBEC8, 0x6551, 0xBEC9, 0x65E7, 0xBECA, 0x81FC, 0xBECB, 0x8205,
08051     0xBECC, 0x548E, 0xBECD, 0x5C31, 0xBECE, 0x759A, 0xBECF, 0x97A0,
08052     0xBED0, 0x62D8, 0xBED1, 0x72D9, 0xBED2, 0x75BD, 0xBED3, 0x5C45,
08053     0xBED4, 0x9A79, 0xBED5, 0x83CA, 0xBED6, 0x5C40, 0xBED7, 0x5480,
08054     0xBED8, 0x77E9, 0xBED9, 0x4E3E, 0xBEDA, 0x6CAE, 0xBEDB, 0x805A,
08055     0xBEDC, 0x62D2, 0xBEDD, 0x636E, 0xBEDE, 0x5DE8, 0xBEDF, 0x5177,
08056     0xBEE0, 0x8DDD, 0xBEE1, 0x8E1E, 0xBEE2, 0x952F, 0xBEE3, 0x4FF1,
08057     0xBEE4, 0x53E5, 0xBEE5, 0x60E7, 0xBEE6, 0x70AC, 0xBEE7, 0x5267,
08058     0xBEE8, 0x6350, 0xBEE9, 0x9E43, 0xBEEA, 0x5A1F, 0xBEEB, 0x5026,
08059     0xBEEC, 0x7737, 0xBEED, 0x5377, 0xBEEE, 0x7EE2, 0xBEEF, 0x6485,
08060     0xBEF0, 0x652B, 0xBEF1, 0x6289, 0xBEF2, 0x6398, 0xBEF3, 0x5014,
08061     0xBEF4, 0x7235, 0xBEF5, 0x89C9, 0xBEF6, 0x51B3, 0xBEF7, 0x8BC0,
08062     0xBEF8, 0x7EDD, 0xBEF9, 0x5747, 0xBEFA, 0x83CC, 0xBEFB, 0x94A7,
08063     0xBEFC, 0x519B, 0xBEFD, 0x541B, 0xBEFE, 0x5CFB, 0xBF40, 0x7DFB,
08064     0xBF41, 0x7DFC, 0xBF42, 0x7DFD, 0xBF43, 0x7DFE, 0xBF44, 0x7DFF,
08065     0xBF45, 0x7E00, 0xBF46, 0x7E01, 0xBF47, 0x7E02, 0xBF48, 0x7E03,
08066     0xBF49, 0x7E04, 0xBF4A, 0x7E05, 0xBF4B, 0x7E06, 0xBF4C, 0x7E07,
08067     0xBF4D, 0x7E08, 0xBF4E, 0x7E09, 0xBF4F, 0x7E0A, 0xBF50, 0x7E0B,
08068     0xBF51, 0x7E0C, 0xBF52, 0x7E0D, 0xBF53, 0x7E0E, 0xBF54, 0x7E0F,
08069     0xBF55, 0x7E10, 0xBF56, 0x7E11, 0xBF57, 0x7E12, 0xBF58, 0x7E13,
08070     0xBF59, 0x7E14, 0xBF5A, 0x7E15, 0xBF5B, 0x7E16, 0xBF5C, 0x7E17,
08071     0xBF5D, 0x7E18, 0xBF5E, 0x7E19, 0xBF5F, 0x7E1A, 0xBF60, 0x7E1B,
08072     0xBF61, 0x7E1C, 0xBF62, 0x7E1D, 0xBF63, 0x7E1E, 0xBF64, 0x7E1F,
08073     0xBF65, 0x7E20, 0xBF66, 0x7E21, 0xBF67, 0x7E22, 0xBF68, 0x7E23,
08074     0xBF69, 0x7E24, 0xBF6A, 0x7E25, 0xBF6B, 0x7E26, 0xBF6C, 0x7E27,
08075     0xBF6D, 0x7E28, 0xBF6E, 0x7E29, 0xBF6F, 0x7E2A, 0xBF70, 0x7E2B,
08076     0xBF71, 0x7E2C, 0xBF72, 0x7E2D, 0xBF73, 0x7E2E, 0xBF74, 0x7E2F,
08077     0xBF75, 0x7E30, 0xBF76, 0x7E31, 0xBF77, 0x7E32, 0xBF78, 0x7E33,
08078     0xBF79, 0x7E34, 0xBF7A, 0x7E35, 0xBF7B, 0x7E36, 0xBF7C, 0x7E37,
08079     0xBF7D, 0x7E38, 0xBF7E, 0x7E39, 0xBF80, 0x7E3A, 0xBF81, 0x7E3C,
08080     0xBF82, 0x7E3D, 0xBF83, 0x7E3E, 0xBF84, 0x7E3F, 0xBF85, 0x7E40,
08081     0xBF86, 0x7E42, 0xBF87, 0x7E43, 0xBF88, 0x7E44, 0xBF89, 0x7E45,
08082     0xBF8A, 0x7E46, 0xBF8B, 0x7E48, 0xBF8C, 0x7E49, 0xBF8D, 0x7E4A,
08083     0xBF8E, 0x7E4B, 0xBF8F, 0x7E4C, 0xBF90, 0x7E4D, 0xBF91, 0x7E4E,
08084     0xBF92, 0x7E4F, 0xBF93, 0x7E50, 0xBF94, 0x7E51, 0xBF95, 0x7E52,
08085     0xBF96, 0x7E53, 0xBF97, 0x7E54, 0xBF98, 0x7E55, 0xBF99, 0x7E56,
08086     0xBF9A, 0x7E57, 0xBF9B, 0x7E58, 0xBF9C, 0x7E59, 0xBF9D, 0x7E5A,
08087     0xBF9E, 0x7E5B, 0xBF9F, 0x7E5C, 0xBFA0, 0x7E5D, 0xBFA1, 0x4FCA,
08088     0xBFA2, 0x7AE3, 0xBFA3, 0x6D5A, 0xBFA4, 0x90E1, 0xBFA5, 0x9A8F,
08089     0xBFA6, 0x5580, 0xBFA7, 0x5496, 0xBFA8, 0x5361, 0xBFA9, 0x54AF,
08090     0xBFAA, 0x5F00, 0xBFAB, 0x63E9, 0xBFAC, 0x6977, 0xBFAD, 0x51EF,
08091     0xBFAE, 0x6168, 0xBFAF, 0x520A, 0xBFB0, 0x582A, 0xBFB1, 0x52D8,
08092     0xBFB2, 0x574E, 0xBFB3, 0x780D, 0xBFB4, 0x770B, 0xBFB5, 0x5EB7,
08093     0xBFB6, 0x6177, 0xBFB7, 0x7CE0, 0xBFB8, 0x625B, 0xBFB9, 0x6297,
08094     0xBFBA, 0x4EA2, 0xBFBB, 0x7095, 0xBFBC, 0x8003, 0xBFBD, 0x62F7,
08095     0xBFBE, 0x70E4, 0xBFBF, 0x9760, 0xBFC0, 0x5777, 0xBFC1, 0x82DB,
08096     0xBFC2, 0x67EF, 0xBFC3, 0x68F5, 0xBFC4, 0x78D5, 0xBFC5, 0x9897,
08097     0xBFC6, 0x79D1, 0xBFC7, 0x58F3, 0xBFC8, 0x54B3, 0xBFC9, 0x53EF,
08098     0xBFCA, 0x6E34, 0xBFCB, 0x514B, 0xBFCC, 0x523B, 0xBFCD, 0x5BA2,
08099     0xBFCE, 0x8BFE, 0xBFCF, 0x80AF, 0xBFD0, 0x5543, 0xBFD1, 0x57A6,
08100     0xBFD2, 0x6073, 0xBFD3, 0x5751, 0xBFD4, 0x542D, 0xBFD5, 0x7A7A,
08101     0xBFD6, 0x6050, 0xBFD7, 0x5B54, 0xBFD8, 0x63A7, 0xBFD9, 0x62A0,
08102     0xBFDA, 0x53E3, 0xBFDB, 0x6263, 0xBFDC, 0x5BC7, 0xBFDD, 0x67AF,
08103     0xBFDE, 0x54ED, 0xBFDF, 0x7A9F, 0xBFE0, 0x82E6, 0xBFE1, 0x9177,
08104     0xBFE2, 0x5E93, 0xBFE3, 0x88E4, 0xBFE4, 0x5938, 0xBFE5, 0x57AE,
08105     0xBFE6, 0x630E, 0xBFE7, 0x8DE8, 0xBFE8, 0x80EF, 0xBFE9, 0x5757,
08106     0xBFEA, 0x7B77, 0xBFEB, 0x4FA9, 0xBFEC, 0x5FEB, 0xBFED, 0x5BBD,
08107     0xBFEE, 0x6B3E, 0xBFEF, 0x5321, 0xBFF0, 0x7B50, 0xBFF1, 0x72C2,
08108     0xBFF2, 0x6846, 0xBFF3, 0x77FF, 0xBFF4, 0x7736, 0xBFF5, 0x65F7,
08109     0xBFF6, 0x51B5, 0xBFF7, 0x4E8F, 0xBFF8, 0x76D4, 0xBFF9, 0x5CBF,
08110     0xBFFA, 0x7AA5, 0xBFFB, 0x8475, 0xBFFC, 0x594E, 0xBFFD, 0x9B41,
08111     0xBFFE, 0x5080, 0xC040, 0x7E5E, 0xC041, 0x7E5F, 0xC042, 0x7E60,
08112     0xC043, 0x7E61, 0xC044, 0x7E62, 0xC045, 0x7E63, 0xC046, 0x7E64,
08113     0xC047, 0x7E65, 0xC048, 0x7E66, 0xC049, 0x7E67, 0xC04A, 0x7E68,
08114     0xC04B, 0x7E69, 0xC04C, 0x7E6A, 0xC04D, 0x7E6B, 0xC04E, 0x7E6C,
08115     0xC04F, 0x7E6D, 0xC050, 0x7E6E, 0xC051, 0x7E6F, 0xC052, 0x7E70,
08116     0xC053, 0x7E71, 0xC054, 0x7E72, 0xC055, 0x7E73, 0xC056, 0x7E74,
08117     0xC057, 0x7E75, 0xC058, 0x7E76, 0xC059, 0x7E77, 0xC05A, 0x7E78,
08118     0xC05B, 0x7E79, 0xC05C, 0x7E7A, 0xC05D, 0x7E7B, 0xC05E, 0x7E7C,
08119     0xC05F, 0x7E7D, 0xC060, 0x7E7E, 0xC061, 0x7E7F, 0xC062, 0x7E80,
08120     0xC063, 0x7E81, 0xC064, 0x7E83, 0xC065, 0x7E84, 0xC066, 0x7E85,
08121     0xC067, 0x7E86, 0xC068, 0x7E87, 0xC069, 0x7E88, 0xC06A, 0x7E89,
08122     0xC06B, 0x7E8A, 0xC06C, 0x7E8B, 0xC06D, 0x7E8C, 0xC06E, 0x7E8D,
08123     0xC06F, 0x7E8E, 0xC070, 0x7E8F, 0xC071, 0x7E90, 0xC072, 0x7E91,
08124     0xC073, 0x7E92, 0xC074, 0x7E93, 0xC075, 0x7E94, 0xC076, 0x7E95,
08125     0xC077, 0x7E96, 0xC078, 0x7E97, 0xC079, 0x7E98, 0xC07A, 0x7E99,
08126     0xC07B, 0x7E9A, 0xC07C, 0x7E9C, 0xC07D, 0x7E9D, 0xC07E, 0x7E9E,
08127     0xC080, 0x7EAE, 0xC081, 0x7EB4, 0xC082, 0x7EBB, 0xC083, 0x7EBC,
08128     0xC084, 0x7ED6, 0xC085, 0x7EE4, 0xC086, 0x7EEC, 0xC087, 0x7EF9,
08129     0xC088, 0x7F0A, 0xC089, 0x7F10, 0xC08A, 0x7F1E, 0xC08B, 0x7F37,
08130     0xC08C, 0x7F39, 0xC08D, 0x7F3B, 0xC08E, 0x7F3C, 0xC08F, 0x7F3D,
08131     0xC090, 0x7F3E, 0xC091, 0x7F3F, 0xC092, 0x7F40, 0xC093, 0x7F41,
08132     0xC094, 0x7F43, 0xC095, 0x7F46, 0xC096, 0x7F47, 0xC097, 0x7F48,
08133     0xC098, 0x7F49, 0xC099, 0x7F4A, 0xC09A, 0x7F4B, 0xC09B, 0x7F4C,
08134     0xC09C, 0x7F4D, 0xC09D, 0x7F4E, 0xC09E, 0x7F4F, 0xC09F, 0x7F52,
08135     0xC0A0, 0x7F53, 0xC0A1, 0x9988, 0xC0A2, 0x6127, 0xC0A3, 0x6E83,
08136     0xC0A4, 0x5764, 0xC0A5, 0x6606, 0xC0A6, 0x6346, 0xC0A7, 0x56F0,
08137     0xC0A8, 0x62EC, 0xC0A9, 0x6269, 0xC0AA, 0x5ED3, 0xC0AB, 0x9614,
08138     0xC0AC, 0x5783, 0xC0AD, 0x62C9, 0xC0AE, 0x5587, 0xC0AF, 0x8721,
08139     0xC0B0, 0x814A, 0xC0B1, 0x8FA3, 0xC0B2, 0x5566, 0xC0B3, 0x83B1,
08140     0xC0B4, 0x6765, 0xC0B5, 0x8D56, 0xC0B6, 0x84DD, 0xC0B7, 0x5A6A,
08141     0xC0B8, 0x680F, 0xC0B9, 0x62E6, 0xC0BA, 0x7BEE, 0xC0BB, 0x9611,
08142     0xC0BC, 0x5170, 0xC0BD, 0x6F9C, 0xC0BE, 0x8C30, 0xC0BF, 0x63FD,
08143     0xC0C0, 0x89C8, 0xC0C1, 0x61D2, 0xC0C2, 0x7F06, 0xC0C3, 0x70C2,
08144     0xC0C4, 0x6EE5, 0xC0C5, 0x7405, 0xC0C6, 0x6994, 0xC0C7, 0x72FC,
08145     0xC0C8, 0x5ECA, 0xC0C9, 0x90CE, 0xC0CA, 0x6717, 0xC0CB, 0x6D6A,
08146     0xC0CC, 0x635E, 0xC0CD, 0x52B3, 0xC0CE, 0x7262, 0xC0CF, 0x8001,
08147     0xC0D0, 0x4F6C, 0xC0D1, 0x59E5, 0xC0D2, 0x916A, 0xC0D3, 0x70D9,
08148     0xC0D4, 0x6D9D, 0xC0D5, 0x52D2, 0xC0D6, 0x4E50, 0xC0D7, 0x96F7,
08149     0xC0D8, 0x956D, 0xC0D9, 0x857E, 0xC0DA, 0x78CA, 0xC0DB, 0x7D2F,
08150     0xC0DC, 0x5121, 0xC0DD, 0x5792, 0xC0DE, 0x64C2, 0xC0DF, 0x808B,
08151     0xC0E0, 0x7C7B, 0xC0E1, 0x6CEA, 0xC0E2, 0x68F1, 0xC0E3, 0x695E,
08152     0xC0E4, 0x51B7, 0xC0E5, 0x5398, 0xC0E6, 0x68A8, 0xC0E7, 0x7281,
08153     0xC0E8, 0x9ECE, 0xC0E9, 0x7BF1, 0xC0EA, 0x72F8, 0xC0EB, 0x79BB,
08154     0xC0EC, 0x6F13, 0xC0ED, 0x7406, 0xC0EE, 0x674E, 0xC0EF, 0x91CC,
08155     0xC0F0, 0x9CA4, 0xC0F1, 0x793C, 0xC0F2, 0x8389, 0xC0F3, 0x8354,
08156     0xC0F4, 0x540F, 0xC0F5, 0x6817, 0xC0F6, 0x4E3D, 0xC0F7, 0x5389,
08157     0xC0F8, 0x52B1, 0xC0F9, 0x783E, 0xC0FA, 0x5386, 0xC0FB, 0x5229,
08158     0xC0FC, 0x5088, 0xC0FD, 0x4F8B, 0xC0FE, 0x4FD0, 0xC140, 0x7F56,
08159     0xC141, 0x7F59, 0xC142, 0x7F5B, 0xC143, 0x7F5C, 0xC144, 0x7F5D,
08160     0xC145, 0x7F5E, 0xC146, 0x7F60, 0xC147, 0x7F63, 0xC148, 0x7F64,
08161     0xC149, 0x7F65, 0xC14A, 0x7F66, 0xC14B, 0x7F67, 0xC14C, 0x7F6B,
08162     0xC14D, 0x7F6C, 0xC14E, 0x7F6D, 0xC14F, 0x7F6F, 0xC150, 0x7F70,
08163     0xC151, 0x7F73, 0xC152, 0x7F75, 0xC153, 0x7F76, 0xC154, 0x7F77,
08164     0xC155, 0x7F78, 0xC156, 0x7F7A, 0xC157, 0x7F7B, 0xC158, 0x7F7C,
08165     0xC159, 0x7F7D, 0xC15A, 0x7F7F, 0xC15B, 0x7F80, 0xC15C, 0x7F82,
08166     0xC15D, 0x7F83, 0xC15E, 0x7F84, 0xC15F, 0x7F85, 0xC160, 0x7F86,
08167     0xC161, 0x7F87, 0xC162, 0x7F88, 0xC163, 0x7F89, 0xC164, 0x7F8B,
08168     0xC165, 0x7F8D, 0xC166, 0x7F8F, 0xC167, 0x7F90, 0xC168, 0x7F91,
08169     0xC169, 0x7F92, 0xC16A, 0x7F93, 0xC16B, 0x7F95, 0xC16C, 0x7F96,
08170     0xC16D, 0x7F97, 0xC16E, 0x7F98, 0xC16F, 0x7F99, 0xC170, 0x7F9B,
08171     0xC171, 0x7F9C, 0xC172, 0x7FA0, 0xC173, 0x7FA2, 0xC174, 0x7FA3,
08172     0xC175, 0x7FA5, 0xC176, 0x7FA6, 0xC177, 0x7FA8, 0xC178, 0x7FA9,
08173     0xC179, 0x7FAA, 0xC17A, 0x7FAB, 0xC17B, 0x7FAC, 0xC17C, 0x7FAD,
08174     0xC17D, 0x7FAE, 0xC17E, 0x7FB1, 0xC180, 0x7FB3, 0xC181, 0x7FB4,
08175     0xC182, 0x7FB5, 0xC183, 0x7FB6, 0xC184, 0x7FB7, 0xC185, 0x7FBA,
08176     0xC186, 0x7FBB, 0xC187, 0x7FBE, 0xC188, 0x7FC0, 0xC189, 0x7FC2,
08177     0xC18A, 0x7FC3, 0xC18B, 0x7FC4, 0xC18C, 0x7FC6, 0xC18D, 0x7FC7,
08178     0xC18E, 0x7FC8, 0xC18F, 0x7FC9, 0xC190, 0x7FCB, 0xC191, 0x7FCD,
08179     0xC192, 0x7FCF, 0xC193, 0x7FD0, 0xC194, 0x7FD1, 0xC195, 0x7FD2,
08180     0xC196, 0x7FD3, 0xC197, 0x7FD6, 0xC198, 0x7FD7, 0xC199, 0x7FD9,
08181     0xC19A, 0x7FDA, 0xC19B, 0x7FDB, 0xC19C, 0x7FDC, 0xC19D, 0x7FDD,
08182     0xC19E, 0x7FDE, 0xC19F, 0x7FE2, 0xC1A0, 0x7FE3, 0xC1A1, 0x75E2,
08183     0xC1A2, 0x7ACB, 0xC1A3, 0x7C92, 0xC1A4, 0x6CA5, 0xC1A5, 0x96B6,
08184     0xC1A6, 0x529B, 0xC1A7, 0x7483, 0xC1A8, 0x54E9, 0xC1A9, 0x4FE9,
08185     0xC1AA, 0x8054, 0xC1AB, 0x83B2, 0xC1AC, 0x8FDE, 0xC1AD, 0x9570,
08186     0xC1AE, 0x5EC9, 0xC1AF, 0x601C, 0xC1B0, 0x6D9F, 0xC1B1, 0x5E18,
08187     0xC1B2, 0x655B, 0xC1B3, 0x8138, 0xC1B4, 0x94FE, 0xC1B5, 0x604B,
08188     0xC1B6, 0x70BC, 0xC1B7, 0x7EC3, 0xC1B8, 0x7CAE, 0xC1B9, 0x51C9,
08189     0xC1BA, 0x6881, 0xC1BB, 0x7CB1, 0xC1BC, 0x826F, 0xC1BD, 0x4E24,
08190     0xC1BE, 0x8F86, 0xC1BF, 0x91CF, 0xC1C0, 0x667E, 0xC1C1, 0x4EAE,
08191     0xC1C2, 0x8C05, 0xC1C3, 0x64A9, 0xC1C4, 0x804A, 0xC1C5, 0x50DA,
08192     0xC1C6, 0x7597, 0xC1C7, 0x71CE, 0xC1C8, 0x5BE5, 0xC1C9, 0x8FBD,
08193     0xC1CA, 0x6F66, 0xC1CB, 0x4E86, 0xC1CC, 0x6482, 0xC1CD, 0x9563,
08194     0xC1CE, 0x5ED6, 0xC1CF, 0x6599, 0xC1D0, 0x5217, 0xC1D1, 0x88C2,
08195     0xC1D2, 0x70C8, 0xC1D3, 0x52A3, 0xC1D4, 0x730E, 0xC1D5, 0x7433,
08196     0xC1D6, 0x6797, 0xC1D7, 0x78F7, 0xC1D8, 0x9716, 0xC1D9, 0x4E34,
08197     0xC1DA, 0x90BB, 0xC1DB, 0x9CDE, 0xC1DC, 0x6DCB, 0xC1DD, 0x51DB,
08198     0xC1DE, 0x8D41, 0xC1DF, 0x541D, 0xC1E0, 0x62CE, 0xC1E1, 0x73B2,
08199     0xC1E2, 0x83F1, 0xC1E3, 0x96F6, 0xC1E4, 0x9F84, 0xC1E5, 0x94C3,
08200     0xC1E6, 0x4F36, 0xC1E7, 0x7F9A, 0xC1E8, 0x51CC, 0xC1E9, 0x7075,
08201     0xC1EA, 0x9675, 0xC1EB, 0x5CAD, 0xC1EC, 0x9886, 0xC1ED, 0x53E6,
08202     0xC1EE, 0x4EE4, 0xC1EF, 0x6E9C, 0xC1F0, 0x7409, 0xC1F1, 0x69B4,
08203     0xC1F2, 0x786B, 0xC1F3, 0x998F, 0xC1F4, 0x7559, 0xC1F5, 0x5218,
08204     0xC1F6, 0x7624, 0xC1F7, 0x6D41, 0xC1F8, 0x67F3, 0xC1F9, 0x516D,
08205     0xC1FA, 0x9F99, 0xC1FB, 0x804B, 0xC1FC, 0x5499, 0xC1FD, 0x7B3C,
08206     0xC1FE, 0x7ABF, 0xC240, 0x7FE4, 0xC241, 0x7FE7, 0xC242, 0x7FE8,
08207     0xC243, 0x7FEA, 0xC244, 0x7FEB, 0xC245, 0x7FEC, 0xC246, 0x7FED,
08208     0xC247, 0x7FEF, 0xC248, 0x7FF2, 0xC249, 0x7FF4, 0xC24A, 0x7FF5,
08209     0xC24B, 0x7FF6, 0xC24C, 0x7FF7, 0xC24D, 0x7FF8, 0xC24E, 0x7FF9,
08210     0xC24F, 0x7FFA, 0xC250, 0x7FFD, 0xC251, 0x7FFE, 0xC252, 0x7FFF,
08211     0xC253, 0x8002, 0xC254, 0x8007, 0xC255, 0x8008, 0xC256, 0x8009,
08212     0xC257, 0x800A, 0xC258, 0x800E, 0xC259, 0x800F, 0xC25A, 0x8011,
08213     0xC25B, 0x8013, 0xC25C, 0x801A, 0xC25D, 0x801B, 0xC25E, 0x801D,
08214     0xC25F, 0x801E, 0xC260, 0x801F, 0xC261, 0x8021, 0xC262, 0x8023,
08215     0xC263, 0x8024, 0xC264, 0x802B, 0xC265, 0x802C, 0xC266, 0x802D,
08216     0xC267, 0x802E, 0xC268, 0x802F, 0xC269, 0x8030, 0xC26A, 0x8032,
08217     0xC26B, 0x8034, 0xC26C, 0x8039, 0xC26D, 0x803A, 0xC26E, 0x803C,
08218     0xC26F, 0x803E, 0xC270, 0x8040, 0xC271, 0x8041, 0xC272, 0x8044,
08219     0xC273, 0x8045, 0xC274, 0x8047, 0xC275, 0x8048, 0xC276, 0x8049,
08220     0xC277, 0x804E, 0xC278, 0x804F, 0xC279, 0x8050, 0xC27A, 0x8051,
08221     0xC27B, 0x8053, 0xC27C, 0x8055, 0xC27D, 0x8056, 0xC27E, 0x8057,
08222     0xC280, 0x8059, 0xC281, 0x805B, 0xC282, 0x805C, 0xC283, 0x805D,
08223     0xC284, 0x805E, 0xC285, 0x805F, 0xC286, 0x8060, 0xC287, 0x8061,
08224     0xC288, 0x8062, 0xC289, 0x8063, 0xC28A, 0x8064, 0xC28B, 0x8065,
08225     0xC28C, 0x8066, 0xC28D, 0x8067, 0xC28E, 0x8068, 0xC28F, 0x806B,
08226     0xC290, 0x806C, 0xC291, 0x806D, 0xC292, 0x806E, 0xC293, 0x806F,
08227     0xC294, 0x8070, 0xC295, 0x8072, 0xC296, 0x8073, 0xC297, 0x8074,
08228     0xC298, 0x8075, 0xC299, 0x8076, 0xC29A, 0x8077, 0xC29B, 0x8078,
08229     0xC29C, 0x8079, 0xC29D, 0x807A, 0xC29E, 0x807B, 0xC29F, 0x807C,
08230     0xC2A0, 0x807D, 0xC2A1, 0x9686, 0xC2A2, 0x5784, 0xC2A3, 0x62E2,
08231     0xC2A4, 0x9647, 0xC2A5, 0x697C, 0xC2A6, 0x5A04, 0xC2A7, 0x6402,
08232     0xC2A8, 0x7BD3, 0xC2A9, 0x6F0F, 0xC2AA, 0x964B, 0xC2AB, 0x82A6,
08233     0xC2AC, 0x5362, 0xC2AD, 0x9885, 0xC2AE, 0x5E90, 0xC2AF, 0x7089,
08234     0xC2B0, 0x63B3, 0xC2B1, 0x5364, 0xC2B2, 0x864F, 0xC2B3, 0x9C81,
08235     0xC2B4, 0x9E93, 0xC2B5, 0x788C, 0xC2B6, 0x9732, 0xC2B7, 0x8DEF,
08236     0xC2B8, 0x8D42, 0xC2B9, 0x9E7F, 0xC2BA, 0x6F5E, 0xC2BB, 0x7984,
08237     0xC2BC, 0x5F55, 0xC2BD, 0x9646, 0xC2BE, 0x622E, 0xC2BF, 0x9A74,
08238     0xC2C0, 0x5415, 0xC2C1, 0x94DD, 0xC2C2, 0x4FA3, 0xC2C3, 0x65C5,
08239     0xC2C4, 0x5C65, 0xC2C5, 0x5C61, 0xC2C6, 0x7F15, 0xC2C7, 0x8651,
08240     0xC2C8, 0x6C2F, 0xC2C9, 0x5F8B, 0xC2CA, 0x7387, 0xC2CB, 0x6EE4,
08241     0xC2CC, 0x7EFF, 0xC2CD, 0x5CE6, 0xC2CE, 0x631B, 0xC2CF, 0x5B6A,
08242     0xC2D0, 0x6EE6, 0xC2D1, 0x5375, 0xC2D2, 0x4E71, 0xC2D3, 0x63A0,
08243     0xC2D4, 0x7565, 0xC2D5, 0x62A1, 0xC2D6, 0x8F6E, 0xC2D7, 0x4F26,
08244     0xC2D8, 0x4ED1, 0xC2D9, 0x6CA6, 0xC2DA, 0x7EB6, 0xC2DB, 0x8BBA,
08245     0xC2DC, 0x841D, 0xC2DD, 0x87BA, 0xC2DE, 0x7F57, 0xC2DF, 0x903B,
08246     0xC2E0, 0x9523, 0xC2E1, 0x7BA9, 0xC2E2, 0x9AA1, 0xC2E3, 0x88F8,
08247     0xC2E4, 0x843D, 0xC2E5, 0x6D1B, 0xC2E6, 0x9A86, 0xC2E7, 0x7EDC,
08248     0xC2E8, 0x5988, 0xC2E9, 0x9EBB, 0xC2EA, 0x739B, 0xC2EB, 0x7801,
08249     0xC2EC, 0x8682, 0xC2ED, 0x9A6C, 0xC2EE, 0x9A82, 0xC2EF, 0x561B,
08250     0xC2F0, 0x5417, 0xC2F1, 0x57CB, 0xC2F2, 0x4E70, 0xC2F3, 0x9EA6,
08251     0xC2F4, 0x5356, 0xC2F5, 0x8FC8, 0xC2F6, 0x8109, 0xC2F7, 0x7792,
08252     0xC2F8, 0x9992, 0xC2F9, 0x86EE, 0xC2FA, 0x6EE1, 0xC2FB, 0x8513,
08253     0xC2FC, 0x66FC, 0xC2FD, 0x6162, 0xC2FE, 0x6F2B, 0xC340, 0x807E,
08254     0xC341, 0x8081, 0xC342, 0x8082, 0xC343, 0x8085, 0xC344, 0x8088,
08255     0xC345, 0x808A, 0xC346, 0x808D, 0xC347, 0x808E, 0xC348, 0x808F,
08256     0xC349, 0x8090, 0xC34A, 0x8091, 0xC34B, 0x8092, 0xC34C, 0x8094,
08257     0xC34D, 0x8095, 0xC34E, 0x8097, 0xC34F, 0x8099, 0xC350, 0x809E,
08258     0xC351, 0x80A3, 0xC352, 0x80A6, 0xC353, 0x80A7, 0xC354, 0x80A8,
08259     0xC355, 0x80AC, 0xC356, 0x80B0, 0xC357, 0x80B3, 0xC358, 0x80B5,
08260     0xC359, 0x80B6, 0xC35A, 0x80B8, 0xC35B, 0x80B9, 0xC35C, 0x80BB,
08261     0xC35D, 0x80C5, 0xC35E, 0x80C7, 0xC35F, 0x80C8, 0xC360, 0x80C9,
08262     0xC361, 0x80CA, 0xC362, 0x80CB, 0xC363, 0x80CF, 0xC364, 0x80D0,
08263     0xC365, 0x80D1, 0xC366, 0x80D2, 0xC367, 0x80D3, 0xC368, 0x80D4,
08264     0xC369, 0x80D5, 0xC36A, 0x80D8, 0xC36B, 0x80DF, 0xC36C, 0x80E0,
08265     0xC36D, 0x80E2, 0xC36E, 0x80E3, 0xC36F, 0x80E6, 0xC370, 0x80EE,
08266     0xC371, 0x80F5, 0xC372, 0x80F7, 0xC373, 0x80F9, 0xC374, 0x80FB,
08267     0xC375, 0x80FE, 0xC376, 0x80FF, 0xC377, 0x8100, 0xC378, 0x8101,
08268     0xC379, 0x8103, 0xC37A, 0x8104, 0xC37B, 0x8105, 0xC37C, 0x8107,
08269     0xC37D, 0x8108, 0xC37E, 0x810B, 0xC380, 0x810C, 0xC381, 0x8115,
08270     0xC382, 0x8117, 0xC383, 0x8119, 0xC384, 0x811B, 0xC385, 0x811C,
08271     0xC386, 0x811D, 0xC387, 0x811F, 0xC388, 0x8120, 0xC389, 0x8121,
08272     0xC38A, 0x8122, 0xC38B, 0x8123, 0xC38C, 0x8124, 0xC38D, 0x8125,
08273     0xC38E, 0x8126, 0xC38F, 0x8127, 0xC390, 0x8128, 0xC391, 0x8129,
08274     0xC392, 0x812A, 0xC393, 0x812B, 0xC394, 0x812D, 0xC395, 0x812E,
08275     0xC396, 0x8130, 0xC397, 0x8133, 0xC398, 0x8134, 0xC399, 0x8135,
08276     0xC39A, 0x8137, 0xC39B, 0x8139, 0xC39C, 0x813A, 0xC39D, 0x813B,
08277     0xC39E, 0x813C, 0xC39F, 0x813D, 0xC3A0, 0x813F, 0xC3A1, 0x8C29,
08278     0xC3A2, 0x8292, 0xC3A3, 0x832B, 0xC3A4, 0x76F2, 0xC3A5, 0x6C13,
08279     0xC3A6, 0x5FD9, 0xC3A7, 0x83BD, 0xC3A8, 0x732B, 0xC3A9, 0x8305,
08280     0xC3AA, 0x951A, 0xC3AB, 0x6BDB, 0xC3AC, 0x77DB, 0xC3AD, 0x94C6,
08281     0xC3AE, 0x536F, 0xC3AF, 0x8302, 0xC3B0, 0x5192, 0xC3B1, 0x5E3D,
08282     0xC3B2, 0x8C8C, 0xC3B3, 0x8D38, 0xC3B4, 0x4E48, 0xC3B5, 0x73AB,
08283     0xC3B6, 0x679A, 0xC3B7, 0x6885, 0xC3B8, 0x9176, 0xC3B9, 0x9709,
08284     0xC3BA, 0x7164, 0xC3BB, 0x6CA1, 0xC3BC, 0x7709, 0xC3BD, 0x5A92,
08285     0xC3BE, 0x9541, 0xC3BF, 0x6BCF, 0xC3C0, 0x7F8E, 0xC3C1, 0x6627,
08286     0xC3C2, 0x5BD0, 0xC3C3, 0x59B9, 0xC3C4, 0x5A9A, 0xC3C5, 0x95E8,
08287     0xC3C6, 0x95F7, 0xC3C7, 0x4EEC, 0xC3C8, 0x840C, 0xC3C9, 0x8499,
08288     0xC3CA, 0x6AAC, 0xC3CB, 0x76DF, 0xC3CC, 0x9530, 0xC3CD, 0x731B,
08289     0xC3CE, 0x68A6, 0xC3CF, 0x5B5F, 0xC3D0, 0x772F, 0xC3D1, 0x919A,
08290     0xC3D2, 0x9761, 0xC3D3, 0x7CDC, 0xC3D4, 0x8FF7, 0xC3D5, 0x8C1C,
08291     0xC3D6, 0x5F25, 0xC3D7, 0x7C73, 0xC3D8, 0x79D8, 0xC3D9, 0x89C5,
08292     0xC3DA, 0x6CCC, 0xC3DB, 0x871C, 0xC3DC, 0x5BC6, 0xC3DD, 0x5E42,
08293     0xC3DE, 0x68C9, 0xC3DF, 0x7720, 0xC3E0, 0x7EF5, 0xC3E1, 0x5195,
08294     0xC3E2, 0x514D, 0xC3E3, 0x52C9, 0xC3E4, 0x5A29, 0xC3E5, 0x7F05,
08295     0xC3E6, 0x9762, 0xC3E7, 0x82D7, 0xC3E8, 0x63CF, 0xC3E9, 0x7784,
08296     0xC3EA, 0x85D0, 0xC3EB, 0x79D2, 0xC3EC, 0x6E3A, 0xC3ED, 0x5E99,
08297     0xC3EE, 0x5999, 0xC3EF, 0x8511, 0xC3F0, 0x706D, 0xC3F1, 0x6C11,
08298     0xC3F2, 0x62BF, 0xC3F3, 0x76BF, 0xC3F4, 0x654F, 0xC3F5, 0x60AF,
08299     0xC3F6, 0x95FD, 0xC3F7, 0x660E, 0xC3F8, 0x879F, 0xC3F9, 0x9E23,
08300     0xC3FA, 0x94ED, 0xC3FB, 0x540D, 0xC3FC, 0x547D, 0xC3FD, 0x8C2C,
08301     0xC3FE, 0x6478, 0xC440, 0x8140, 0xC441, 0x8141, 0xC442, 0x8142,
08302     0xC443, 0x8143, 0xC444, 0x8144, 0xC445, 0x8145, 0xC446, 0x8147,
08303     0xC447, 0x8149, 0xC448, 0x814D, 0xC449, 0x814E, 0xC44A, 0x814F,
08304     0xC44B, 0x8152, 0xC44C, 0x8156, 0xC44D, 0x8157, 0xC44E, 0x8158,
08305     0xC44F, 0x815B, 0xC450, 0x815C, 0xC451, 0x815D, 0xC452, 0x815E,
08306     0xC453, 0x815F, 0xC454, 0x8161, 0xC455, 0x8162, 0xC456, 0x8163,
08307     0xC457, 0x8164, 0xC458, 0x8166, 0xC459, 0x8168, 0xC45A, 0x816A,
08308     0xC45B, 0x816B, 0xC45C, 0x816C, 0xC45D, 0x816F, 0xC45E, 0x8172,
08309     0xC45F, 0x8173, 0xC460, 0x8175, 0xC461, 0x8176, 0xC462, 0x8177,
08310     0xC463, 0x8178, 0xC464, 0x8181, 0xC465, 0x8183, 0xC466, 0x8184,
08311     0xC467, 0x8185, 0xC468, 0x8186, 0xC469, 0x8187, 0xC46A, 0x8189,
08312     0xC46B, 0x818B, 0xC46C, 0x818C, 0xC46D, 0x818D, 0xC46E, 0x818E,
08313     0xC46F, 0x8190, 0xC470, 0x8192, 0xC471, 0x8193, 0xC472, 0x8194,
08314     0xC473, 0x8195, 0xC474, 0x8196, 0xC475, 0x8197, 0xC476, 0x8199,
08315     0xC477, 0x819A, 0xC478, 0x819E, 0xC479, 0x819F, 0xC47A, 0x81A0,
08316     0xC47B, 0x81A1, 0xC47C, 0x81A2, 0xC47D, 0x81A4, 0xC47E, 0x81A5,
08317     0xC480, 0x81A7, 0xC481, 0x81A9, 0xC482, 0x81AB, 0xC483, 0x81AC,
08318     0xC484, 0x81AD, 0xC485, 0x81AE, 0xC486, 0x81AF, 0xC487, 0x81B0,
08319     0xC488, 0x81B1, 0xC489, 0x81B2, 0xC48A, 0x81B4, 0xC48B, 0x81B5,
08320     0xC48C, 0x81B6, 0xC48D, 0x81B7, 0xC48E, 0x81B8, 0xC48F, 0x81B9,
08321     0xC490, 0x81BC, 0xC491, 0x81BD, 0xC492, 0x81BE, 0xC493, 0x81BF,
08322     0xC494, 0x81C4, 0xC495, 0x81C5, 0xC496, 0x81C7, 0xC497, 0x81C8,
08323     0xC498, 0x81C9, 0xC499, 0x81CB, 0xC49A, 0x81CD, 0xC49B, 0x81CE,
08324     0xC49C, 0x81CF, 0xC49D, 0x81D0, 0xC49E, 0x81D1, 0xC49F, 0x81D2,
08325     0xC4A0, 0x81D3, 0xC4A1, 0x6479, 0xC4A2, 0x8611, 0xC4A3, 0x6A21,
08326     0xC4A4, 0x819C, 0xC4A5, 0x78E8, 0xC4A6, 0x6469, 0xC4A7, 0x9B54,
08327     0xC4A8, 0x62B9, 0xC4A9, 0x672B, 0xC4AA, 0x83AB, 0xC4AB, 0x58A8,
08328     0xC4AC, 0x9ED8, 0xC4AD, 0x6CAB, 0xC4AE, 0x6F20, 0xC4AF, 0x5BDE,
08329     0xC4B0, 0x964C, 0xC4B1, 0x8C0B, 0xC4B2, 0x725F, 0xC4B3, 0x67D0,
08330     0xC4B4, 0x62C7, 0xC4B5, 0x7261, 0xC4B6, 0x4EA9, 0xC4B7, 0x59C6,
08331     0xC4B8, 0x6BCD, 0xC4B9, 0x5893, 0xC4BA, 0x66AE, 0xC4BB, 0x5E55,
08332     0xC4BC, 0x52DF, 0xC4BD, 0x6155, 0xC4BE, 0x6728, 0xC4BF, 0x76EE,
08333     0xC4C0, 0x7766, 0xC4C1, 0x7267, 0xC4C2, 0x7A46, 0xC4C3, 0x62FF,
08334     0xC4C4, 0x54EA, 0xC4C5, 0x5450, 0xC4C6, 0x94A0, 0xC4C7, 0x90A3,
08335     0xC4C8, 0x5A1C, 0xC4C9, 0x7EB3, 0xC4CA, 0x6C16, 0xC4CB, 0x4E43,
08336     0xC4CC, 0x5976, 0xC4CD, 0x8010, 0xC4CE, 0x5948, 0xC4CF, 0x5357,
08337     0xC4D0, 0x7537, 0xC4D1, 0x96BE, 0xC4D2, 0x56CA, 0xC4D3, 0x6320,
08338     0xC4D4, 0x8111, 0xC4D5, 0x607C, 0xC4D6, 0x95F9, 0xC4D7, 0x6DD6,
08339     0xC4D8, 0x5462, 0xC4D9, 0x9981, 0xC4DA, 0x5185, 0xC4DB, 0x5AE9,
08340     0xC4DC, 0x80FD, 0xC4DD, 0x59AE, 0xC4DE, 0x9713, 0xC4DF, 0x502A,
08341     0xC4E0, 0x6CE5, 0xC4E1, 0x5C3C, 0xC4E2, 0x62DF, 0xC4E3, 0x4F60,
08342     0xC4E4, 0x533F, 0xC4E5, 0x817B, 0xC4E6, 0x9006, 0xC4E7, 0x6EBA,
08343     0xC4E8, 0x852B, 0xC4E9, 0x62C8, 0xC4EA, 0x5E74, 0xC4EB, 0x78BE,
08344     0xC4EC, 0x64B5, 0xC4ED, 0x637B, 0xC4EE, 0x5FF5, 0xC4EF, 0x5A18,
08345     0xC4F0, 0x917F, 0xC4F1, 0x9E1F, 0xC4F2, 0x5C3F, 0xC4F3, 0x634F,
08346     0xC4F4, 0x8042, 0xC4F5, 0x5B7D, 0xC4F6, 0x556E, 0xC4F7, 0x954A,
08347     0xC4F8, 0x954D, 0xC4F9, 0x6D85, 0xC4FA, 0x60A8, 0xC4FB, 0x67E0,
08348     0xC4FC, 0x72DE, 0xC4FD, 0x51DD, 0xC4FE, 0x5B81, 0xC540, 0x81D4,
08349     0xC541, 0x81D5, 0xC542, 0x81D6, 0xC543, 0x81D7, 0xC544, 0x81D8,
08350     0xC545, 0x81D9, 0xC546, 0x81DA, 0xC547, 0x81DB, 0xC548, 0x81DC,
08351     0xC549, 0x81DD, 0xC54A, 0x81DE, 0xC54B, 0x81DF, 0xC54C, 0x81E0,
08352     0xC54D, 0x81E1, 0xC54E, 0x81E2, 0xC54F, 0x81E4, 0xC550, 0x81E5,
08353     0xC551, 0x81E6, 0xC552, 0x81E8, 0xC553, 0x81E9, 0xC554, 0x81EB,
08354     0xC555, 0x81EE, 0xC556, 0x81EF, 0xC557, 0x81F0, 0xC558, 0x81F1,
08355     0xC559, 0x81F2, 0xC55A, 0x81F5, 0xC55B, 0x81F6, 0xC55C, 0x81F7,
08356     0xC55D, 0x81F8, 0xC55E, 0x81F9, 0xC55F, 0x81FA, 0xC560, 0x81FD,
08357     0xC561, 0x81FF, 0xC562, 0x8203, 0xC563, 0x8207, 0xC564, 0x8208,
08358     0xC565, 0x8209, 0xC566, 0x820A, 0xC567, 0x820B, 0xC568, 0x820E,
08359     0xC569, 0x820F, 0xC56A, 0x8211, 0xC56B, 0x8213, 0xC56C, 0x8215,
08360     0xC56D, 0x8216, 0xC56E, 0x8217, 0xC56F, 0x8218, 0xC570, 0x8219,
08361     0xC571, 0x821A, 0xC572, 0x821D, 0xC573, 0x8220, 0xC574, 0x8224,
08362     0xC575, 0x8225, 0xC576, 0x8226, 0xC577, 0x8227, 0xC578, 0x8229,
08363     0xC579, 0x822E, 0xC57A, 0x8232, 0xC57B, 0x823A, 0xC57C, 0x823C,
08364     0xC57D, 0x823D, 0xC57E, 0x823F, 0xC580, 0x8240, 0xC581, 0x8241,
08365     0xC582, 0x8242, 0xC583, 0x8243, 0xC584, 0x8245, 0xC585, 0x8246,
08366     0xC586, 0x8248, 0xC587, 0x824A, 0xC588, 0x824C, 0xC589, 0x824D,
08367     0xC58A, 0x824E, 0xC58B, 0x8250, 0xC58C, 0x8251, 0xC58D, 0x8252,
08368     0xC58E, 0x8253, 0xC58F, 0x8254, 0xC590, 0x8255, 0xC591, 0x8256,
08369     0xC592, 0x8257, 0xC593, 0x8259, 0xC594, 0x825B, 0xC595, 0x825C,
08370     0xC596, 0x825D, 0xC597, 0x825E, 0xC598, 0x8260, 0xC599, 0x8261,
08371     0xC59A, 0x8262, 0xC59B, 0x8263, 0xC59C, 0x8264, 0xC59D, 0x8265,
08372     0xC59E, 0x8266, 0xC59F, 0x8267, 0xC5A0, 0x8269, 0xC5A1, 0x62E7,
08373     0xC5A2, 0x6CDE, 0xC5A3, 0x725B, 0xC5A4, 0x626D, 0xC5A5, 0x94AE,
08374     0xC5A6, 0x7EBD, 0xC5A7, 0x8113, 0xC5A8, 0x6D53, 0xC5A9, 0x519C,
08375     0xC5AA, 0x5F04, 0xC5AB, 0x5974, 0xC5AC, 0x52AA, 0xC5AD, 0x6012,
08376     0xC5AE, 0x5973, 0xC5AF, 0x6696, 0xC5B0, 0x8650, 0xC5B1, 0x759F,
08377     0xC5B2, 0x632A, 0xC5B3, 0x61E6, 0xC5B4, 0x7CEF, 0xC5B5, 0x8BFA,
08378     0xC5B6, 0x54E6, 0xC5B7, 0x6B27, 0xC5B8, 0x9E25, 0xC5B9, 0x6BB4,
08379     0xC5BA, 0x85D5, 0xC5BB, 0x5455, 0xC5BC, 0x5076, 0xC5BD, 0x6CA4,
08380     0xC5BE, 0x556A, 0xC5BF, 0x8DB4, 0xC5C0, 0x722C, 0xC5C1, 0x5E15,
08381     0xC5C2, 0x6015, 0xC5C3, 0x7436, 0xC5C4, 0x62CD, 0xC5C5, 0x6392,
08382     0xC5C6, 0x724C, 0xC5C7, 0x5F98, 0xC5C8, 0x6E43, 0xC5C9, 0x6D3E,
08383     0xC5CA, 0x6500, 0xC5CB, 0x6F58, 0xC5CC, 0x76D8, 0xC5CD, 0x78D0,
08384     0xC5CE, 0x76FC, 0xC5CF, 0x7554, 0xC5D0, 0x5224, 0xC5D1, 0x53DB,
08385     0xC5D2, 0x4E53, 0xC5D3, 0x5E9E, 0xC5D4, 0x65C1, 0xC5D5, 0x802A,
08386     0xC5D6, 0x80D6, 0xC5D7, 0x629B, 0xC5D8, 0x5486, 0xC5D9, 0x5228,
08387     0xC5DA, 0x70AE, 0xC5DB, 0x888D, 0xC5DC, 0x8DD1, 0xC5DD, 0x6CE1,
08388     0xC5DE, 0x5478, 0xC5DF, 0x80DA, 0xC5E0, 0x57F9, 0xC5E1, 0x88F4,
08389     0xC5E2, 0x8D54, 0xC5E3, 0x966A, 0xC5E4, 0x914D, 0xC5E5, 0x4F69,
08390     0xC5E6, 0x6C9B, 0xC5E7, 0x55B7, 0xC5E8, 0x76C6, 0xC5E9, 0x7830,
08391     0xC5EA, 0x62A8, 0xC5EB, 0x70F9, 0xC5EC, 0x6F8E, 0xC5ED, 0x5F6D,
08392     0xC5EE, 0x84EC, 0xC5EF, 0x68DA, 0xC5F0, 0x787C, 0xC5F1, 0x7BF7,
08393     0xC5F2, 0x81A8, 0xC5F3, 0x670B, 0xC5F4, 0x9E4F, 0xC5F5, 0x6367,
08394     0xC5F6, 0x78B0, 0xC5F7, 0x576F, 0xC5F8, 0x7812, 0xC5F9, 0x9739,
08395     0xC5FA, 0x6279, 0xC5FB, 0x62AB, 0xC5FC, 0x5288, 0xC5FD, 0x7435,
08396     0xC5FE, 0x6BD7, 0xC640, 0x826A, 0xC641, 0x826B, 0xC642, 0x826C,
08397     0xC643, 0x826D, 0xC644, 0x8271, 0xC645, 0x8275, 0xC646, 0x8276,
08398     0xC647, 0x8277, 0xC648, 0x8278, 0xC649, 0x827B, 0xC64A, 0x827C,
08399     0xC64B, 0x8280, 0xC64C, 0x8281, 0xC64D, 0x8283, 0xC64E, 0x8285,
08400     0xC64F, 0x8286, 0xC650, 0x8287, 0xC651, 0x8289, 0xC652, 0x828C,
08401     0xC653, 0x8290, 0xC654, 0x8293, 0xC655, 0x8294, 0xC656, 0x8295,
08402     0xC657, 0x8296, 0xC658, 0x829A, 0xC659, 0x829B, 0xC65A, 0x829E,
08403     0xC65B, 0x82A0, 0xC65C, 0x82A2, 0xC65D, 0x82A3, 0xC65E, 0x82A7,
08404     0xC65F, 0x82B2, 0xC660, 0x82B5, 0xC661, 0x82B6, 0xC662, 0x82BA,
08405     0xC663, 0x82BB, 0xC664, 0x82BC, 0xC665, 0x82BF, 0xC666, 0x82C0,
08406     0xC667, 0x82C2, 0xC668, 0x82C3, 0xC669, 0x82C5, 0xC66A, 0x82C6,
08407     0xC66B, 0x82C9, 0xC66C, 0x82D0, 0xC66D, 0x82D6, 0xC66E, 0x82D9,
08408     0xC66F, 0x82DA, 0xC670, 0x82DD, 0xC671, 0x82E2, 0xC672, 0x82E7,
08409     0xC673, 0x82E8, 0xC674, 0x82E9, 0xC675, 0x82EA, 0xC676, 0x82EC,
08410     0xC677, 0x82ED, 0xC678, 0x82EE, 0xC679, 0x82F0, 0xC67A, 0x82F2,
08411     0xC67B, 0x82F3, 0xC67C, 0x82F5, 0xC67D, 0x82F6, 0xC67E, 0x82F8,
08412     0xC680, 0x82FA, 0xC681, 0x82FC, 0xC682, 0x82FD, 0xC683, 0x82FE,
08413     0xC684, 0x82FF, 0xC685, 0x8300, 0xC686, 0x830A, 0xC687, 0x830B,
08414     0xC688, 0x830D, 0xC689, 0x8310, 0xC68A, 0x8312, 0xC68B, 0x8313,
08415     0xC68C, 0x8316, 0xC68D, 0x8318, 0xC68E, 0x8319, 0xC68F, 0x831D,
08416     0xC690, 0x831E, 0xC691, 0x831F, 0xC692, 0x8320, 0xC693, 0x8321,
08417     0xC694, 0x8322, 0xC695, 0x8323, 0xC696, 0x8324, 0xC697, 0x8325,
08418     0xC698, 0x8326, 0xC699, 0x8329, 0xC69A, 0x832A, 0xC69B, 0x832E,
08419     0xC69C, 0x8330, 0xC69D, 0x8332, 0xC69E, 0x8337, 0xC69F, 0x833B,
08420     0xC6A0, 0x833D, 0xC6A1, 0x5564, 0xC6A2, 0x813E, 0xC6A3, 0x75B2,
08421     0xC6A4, 0x76AE, 0xC6A5, 0x5339, 0xC6A6, 0x75DE, 0xC6A7, 0x50FB,
08422     0xC6A8, 0x5C41, 0xC6A9, 0x8B6C, 0xC6AA, 0x7BC7, 0xC6AB, 0x504F,
08423     0xC6AC, 0x7247, 0xC6AD, 0x9A97, 0xC6AE, 0x98D8, 0xC6AF, 0x6F02,
08424     0xC6B0, 0x74E2, 0xC6B1, 0x7968, 0xC6B2, 0x6487, 0xC6B3, 0x77A5,
08425     0xC6B4, 0x62FC, 0xC6B5, 0x9891, 0xC6B6, 0x8D2B, 0xC6B7, 0x54C1,
08426     0xC6B8, 0x8058, 0xC6B9, 0x4E52, 0xC6BA, 0x576A, 0xC6BB, 0x82F9,
08427     0xC6BC, 0x840D, 0xC6BD, 0x5E73, 0xC6BE, 0x51ED, 0xC6BF, 0x74F6,
08428     0xC6C0, 0x8BC4, 0xC6C1, 0x5C4F, 0xC6C2, 0x5761, 0xC6C3, 0x6CFC,
08429     0xC6C4, 0x9887, 0xC6C5, 0x5A46, 0xC6C6, 0x7834, 0xC6C7, 0x9B44,
08430     0xC6C8, 0x8FEB, 0xC6C9, 0x7C95, 0xC6CA, 0x5256, 0xC6CB, 0x6251,
08431     0xC6CC, 0x94FA, 0xC6CD, 0x4EC6, 0xC6CE, 0x8386, 0xC6CF, 0x8461,
08432     0xC6D0, 0x83E9, 0xC6D1, 0x84B2, 0xC6D2, 0x57D4, 0xC6D3, 0x6734,
08433     0xC6D4, 0x5703, 0xC6D5, 0x666E, 0xC6D6, 0x6D66, 0xC6D7, 0x8C31,
08434     0xC6D8, 0x66DD, 0xC6D9, 0x7011, 0xC6DA, 0x671F, 0xC6DB, 0x6B3A,
08435     0xC6DC, 0x6816, 0xC6DD, 0x621A, 0xC6DE, 0x59BB, 0xC6DF, 0x4E03,
08436     0xC6E0, 0x51C4, 0xC6E1, 0x6F06, 0xC6E2, 0x67D2, 0xC6E3, 0x6C8F,
08437     0xC6E4, 0x5176, 0xC6E5, 0x68CB, 0xC6E6, 0x5947, 0xC6E7, 0x6B67,
08438     0xC6E8, 0x7566, 0xC6E9, 0x5D0E, 0xC6EA, 0x8110, 0xC6EB, 0x9F50,
08439     0xC6EC, 0x65D7, 0xC6ED, 0x7948, 0xC6EE, 0x7941, 0xC6EF, 0x9A91,
08440     0xC6F0, 0x8D77, 0xC6F1, 0x5C82, 0xC6F2, 0x4E5E, 0xC6F3, 0x4F01,
08441     0xC6F4, 0x542F, 0xC6F5, 0x5951, 0xC6F6, 0x780C, 0xC6F7, 0x5668,
08442     0xC6F8, 0x6C14, 0xC6F9, 0x8FC4, 0xC6FA, 0x5F03, 0xC6FB, 0x6C7D,
08443     0xC6FC, 0x6CE3, 0xC6FD, 0x8BAB, 0xC6FE, 0x6390, 0xC740, 0x833E,
08444     0xC741, 0x833F, 0xC742, 0x8341, 0xC743, 0x8342, 0xC744, 0x8344,
08445     0xC745, 0x8345, 0xC746, 0x8348, 0xC747, 0x834A, 0xC748, 0x834B,
08446     0xC749, 0x834C, 0xC74A, 0x834D, 0xC74B, 0x834E, 0xC74C, 0x8353,
08447     0xC74D, 0x8355, 0xC74E, 0x8356, 0xC74F, 0x8357, 0xC750, 0x8358,
08448     0xC751, 0x8359, 0xC752, 0x835D, 0xC753, 0x8362, 0xC754, 0x8370,
08449     0xC755, 0x8371, 0xC756, 0x8372, 0xC757, 0x8373, 0xC758, 0x8374,
08450     0xC759, 0x8375, 0xC75A, 0x8376, 0xC75B, 0x8379, 0xC75C, 0x837A,
08451     0xC75D, 0x837E, 0xC75E, 0x837F, 0xC75F, 0x8380, 0xC760, 0x8381,
08452     0xC761, 0x8382, 0xC762, 0x8383, 0xC763, 0x8384, 0xC764, 0x8387,
08453     0xC765, 0x8388, 0xC766, 0x838A, 0xC767, 0x838B, 0xC768, 0x838C,
08454     0xC769, 0x838D, 0xC76A, 0x838F, 0xC76B, 0x8390, 0xC76C, 0x8391,
08455     0xC76D, 0x8394, 0xC76E, 0x8395, 0xC76F, 0x8396, 0xC770, 0x8397,
08456     0xC771, 0x8399, 0xC772, 0x839A, 0xC773, 0x839D, 0xC774, 0x839F,
08457     0xC775, 0x83A1, 0xC776, 0x83A2, 0xC777, 0x83A3, 0xC778, 0x83A4,
08458     0xC779, 0x83A5, 0xC77A, 0x83A6, 0xC77B, 0x83A7, 0xC77C, 0x83AC,
08459     0xC77D, 0x83AD, 0xC77E, 0x83AE, 0xC780, 0x83AF, 0xC781, 0x83B5,
08460     0xC782, 0x83BB, 0xC783, 0x83BE, 0xC784, 0x83BF, 0xC785, 0x83C2,
08461     0xC786, 0x83C3, 0xC787, 0x83C4, 0xC788, 0x83C6, 0xC789, 0x83C8,
08462     0xC78A, 0x83C9, 0xC78B, 0x83CB, 0xC78C, 0x83CD, 0xC78D, 0x83CE,
08463     0xC78E, 0x83D0, 0xC78F, 0x83D1, 0xC790, 0x83D2, 0xC791, 0x83D3,
08464     0xC792, 0x83D5, 0xC793, 0x83D7, 0xC794, 0x83D9, 0xC795, 0x83DA,
08465     0xC796, 0x83DB, 0xC797, 0x83DE, 0xC798, 0x83E2, 0xC799, 0x83E3,
08466     0xC79A, 0x83E4, 0xC79B, 0x83E6, 0xC79C, 0x83E7, 0xC79D, 0x83E8,
08467     0xC79E, 0x83EB, 0xC79F, 0x83EC, 0xC7A0, 0x83ED, 0xC7A1, 0x6070,
08468     0xC7A2, 0x6D3D, 0xC7A3, 0x7275, 0xC7A4, 0x6266, 0xC7A5, 0x948E,
08469     0xC7A6, 0x94C5, 0xC7A7, 0x5343, 0xC7A8, 0x8FC1, 0xC7A9, 0x7B7E,
08470     0xC7AA, 0x4EDF, 0xC7AB, 0x8C26, 0xC7AC, 0x4E7E, 0xC7AD, 0x9ED4,
08471     0xC7AE, 0x94B1, 0xC7AF, 0x94B3, 0xC7B0, 0x524D, 0xC7B1, 0x6F5C,
08472     0xC7B2, 0x9063, 0xC7B3, 0x6D45, 0xC7B4, 0x8C34, 0xC7B5, 0x5811,
08473     0xC7B6, 0x5D4C, 0xC7B7, 0x6B20, 0xC7B8, 0x6B49, 0xC7B9, 0x67AA,
08474     0xC7BA, 0x545B, 0xC7BB, 0x8154, 0xC7BC, 0x7F8C, 0xC7BD, 0x5899,
08475     0xC7BE, 0x8537, 0xC7BF, 0x5F3A, 0xC7C0, 0x62A2, 0xC7C1, 0x6A47,
08476     0xC7C2, 0x9539, 0xC7C3, 0x6572, 0xC7C4, 0x6084, 0xC7C5, 0x6865,
08477     0xC7C6, 0x77A7, 0xC7C7, 0x4E54, 0xC7C8, 0x4FA8, 0xC7C9, 0x5DE7,
08478     0xC7CA, 0x9798, 0xC7CB, 0x64AC, 0xC7CC, 0x7FD8, 0xC7CD, 0x5CED,
08479     0xC7CE, 0x4FCF, 0xC7CF, 0x7A8D, 0xC7D0, 0x5207, 0xC7D1, 0x8304,
08480     0xC7D2, 0x4E14, 0xC7D3, 0x602F, 0xC7D4, 0x7A83, 0xC7D5, 0x94A6,
08481     0xC7D6, 0x4FB5, 0xC7D7, 0x4EB2, 0xC7D8, 0x79E6, 0xC7D9, 0x7434,
08482     0xC7DA, 0x52E4, 0xC7DB, 0x82B9, 0xC7DC, 0x64D2, 0xC7DD, 0x79BD,
08483     0xC7DE, 0x5BDD, 0xC7DF, 0x6C81, 0xC7E0, 0x9752, 0xC7E1, 0x8F7B,
08484     0xC7E2, 0x6C22, 0xC7E3, 0x503E, 0xC7E4, 0x537F, 0xC7E5, 0x6E05,
08485     0xC7E6, 0x64CE, 0xC7E7, 0x6674, 0xC7E8, 0x6C30, 0xC7E9, 0x60C5,
08486     0xC7EA, 0x9877, 0xC7EB, 0x8BF7, 0xC7EC, 0x5E86, 0xC7ED, 0x743C,
08487     0xC7EE, 0x7A77, 0xC7EF, 0x79CB, 0xC7F0, 0x4E18, 0xC7F1, 0x90B1,
08488     0xC7F2, 0x7403, 0xC7F3, 0x6C42, 0xC7F4, 0x56DA, 0xC7F5, 0x914B,
08489     0xC7F6, 0x6CC5, 0xC7F7, 0x8D8B, 0xC7F8, 0x533A, 0xC7F9, 0x86C6,
08490     0xC7FA, 0x66F2, 0xC7FB, 0x8EAF, 0xC7FC, 0x5C48, 0xC7FD, 0x9A71,
08491     0xC7FE, 0x6E20, 0xC840, 0x83EE, 0xC841, 0x83EF, 0xC842, 0x83F3,
08492     0xC843, 0x83F4, 0xC844, 0x83F5, 0xC845, 0x83F6, 0xC846, 0x83F7,
08493     0xC847, 0x83FA, 0xC848, 0x83FB, 0xC849, 0x83FC, 0xC84A, 0x83FE,
08494     0xC84B, 0x83FF, 0xC84C, 0x8400, 0xC84D, 0x8402, 0xC84E, 0x8405,
08495     0xC84F, 0x8407, 0xC850, 0x8408, 0xC851, 0x8409, 0xC852, 0x840A,
08496     0xC853, 0x8410, 0xC854, 0x8412, 0xC855, 0x8413, 0xC856, 0x8414,
08497     0xC857, 0x8415, 0xC858, 0x8416, 0xC859, 0x8417, 0xC85A, 0x8419,
08498     0xC85B, 0x841A, 0xC85C, 0x841B, 0xC85D, 0x841E, 0xC85E, 0x841F,
08499     0xC85F, 0x8420, 0xC860, 0x8421, 0xC861, 0x8422, 0xC862, 0x8423,
08500     0xC863, 0x8429, 0xC864, 0x842A, 0xC865, 0x842B, 0xC866, 0x842C,
08501     0xC867, 0x842D, 0xC868, 0x842E, 0xC869, 0x842F, 0xC86A, 0x8430,
08502     0xC86B, 0x8432, 0xC86C, 0x8433, 0xC86D, 0x8434, 0xC86E, 0x8435,
08503     0xC86F, 0x8436, 0xC870, 0x8437, 0xC871, 0x8439, 0xC872, 0x843A,
08504     0xC873, 0x843B, 0xC874, 0x843E, 0xC875, 0x843F, 0xC876, 0x8440,
08505     0xC877, 0x8441, 0xC878, 0x8442, 0xC879, 0x8443, 0xC87A, 0x8444,
08506     0xC87B, 0x8445, 0xC87C, 0x8447, 0xC87D, 0x8448, 0xC87E, 0x8449,
08507     0xC880, 0x844A, 0xC881, 0x844B, 0xC882, 0x844C, 0xC883, 0x844D,
08508     0xC884, 0x844E, 0xC885, 0x844F, 0xC886, 0x8450, 0xC887, 0x8452,
08509     0xC888, 0x8453, 0xC889, 0x8454, 0xC88A, 0x8455, 0xC88B, 0x8456,
08510     0xC88C, 0x8458, 0xC88D, 0x845D, 0xC88E, 0x845E, 0xC88F, 0x845F,
08511     0xC890, 0x8460, 0xC891, 0x8462, 0xC892, 0x8464, 0xC893, 0x8465,
08512     0xC894, 0x8466, 0xC895, 0x8467, 0xC896, 0x8468, 0xC897, 0x846A,
08513     0xC898, 0x846E, 0xC899, 0x846F, 0xC89A, 0x8470, 0xC89B, 0x8472,
08514     0xC89C, 0x8474, 0xC89D, 0x8477, 0xC89E, 0x8479, 0xC89F, 0x847B,
08515     0xC8A0, 0x847C, 0xC8A1, 0x53D6, 0xC8A2, 0x5A36, 0xC8A3, 0x9F8B,
08516     0xC8A4, 0x8DA3, 0xC8A5, 0x53BB, 0xC8A6, 0x5708, 0xC8A7, 0x98A7,
08517     0xC8A8, 0x6743, 0xC8A9, 0x919B, 0xC8AA, 0x6CC9, 0xC8AB, 0x5168,
08518     0xC8AC, 0x75CA, 0xC8AD, 0x62F3, 0xC8AE, 0x72AC, 0xC8AF, 0x5238,
08519     0xC8B0, 0x529D, 0xC8B1, 0x7F3A, 0xC8B2, 0x7094, 0xC8B3, 0x7638,
08520     0xC8B4, 0x5374, 0xC8B5, 0x9E4A, 0xC8B6, 0x69B7, 0xC8B7, 0x786E,
08521     0xC8B8, 0x96C0, 0xC8B9, 0x88D9, 0xC8BA, 0x7FA4, 0xC8BB, 0x7136,
08522     0xC8BC, 0x71C3, 0xC8BD, 0x5189, 0xC8BE, 0x67D3, 0xC8BF, 0x74E4,
08523     0xC8C0, 0x58E4, 0xC8C1, 0x6518, 0xC8C2, 0x56B7, 0xC8C3, 0x8BA9,
08524     0xC8C4, 0x9976, 0xC8C5, 0x6270, 0xC8C6, 0x7ED5, 0xC8C7, 0x60F9,
08525     0xC8C8, 0x70ED, 0xC8C9, 0x58EC, 0xC8CA, 0x4EC1, 0xC8CB, 0x4EBA,
08526     0xC8CC, 0x5FCD, 0xC8CD, 0x97E7, 0xC8CE, 0x4EFB, 0xC8CF, 0x8BA4,
08527     0xC8D0, 0x5203, 0xC8D1, 0x598A, 0xC8D2, 0x7EAB, 0xC8D3, 0x6254,
08528     0xC8D4, 0x4ECD, 0xC8D5, 0x65E5, 0xC8D6, 0x620E, 0xC8D7, 0x8338,
08529     0xC8D8, 0x84C9, 0xC8D9, 0x8363, 0xC8DA, 0x878D, 0xC8DB, 0x7194,
08530     0xC8DC, 0x6EB6, 0xC8DD, 0x5BB9, 0xC8DE, 0x7ED2, 0xC8DF, 0x5197,
08531     0xC8E0, 0x63C9, 0xC8E1, 0x67D4, 0xC8E2, 0x8089, 0xC8E3, 0x8339,
08532     0xC8E4, 0x8815, 0xC8E5, 0x5112, 0xC8E6, 0x5B7A, 0xC8E7, 0x5982,
08533     0xC8E8, 0x8FB1, 0xC8E9, 0x4E73, 0xC8EA, 0x6C5D, 0xC8EB, 0x5165,
08534     0xC8EC, 0x8925, 0xC8ED, 0x8F6F, 0xC8EE, 0x962E, 0xC8EF, 0x854A,
08535     0xC8F0, 0x745E, 0xC8F1, 0x9510, 0xC8F2, 0x95F0, 0xC8F3, 0x6DA6,
08536     0xC8F4, 0x82E5, 0xC8F5, 0x5F31, 0xC8F6, 0x6492, 0xC8F7, 0x6D12,
08537     0xC8F8, 0x8428, 0xC8F9, 0x816E, 0xC8FA, 0x9CC3, 0xC8FB, 0x585E,
08538     0xC8FC, 0x8D5B, 0xC8FD, 0x4E09, 0xC8FE, 0x53C1, 0xC940, 0x847D,
08539     0xC941, 0x847E, 0xC942, 0x847F, 0xC943, 0x8480, 0xC944, 0x8481,
08540     0xC945, 0x8483, 0xC946, 0x8484, 0xC947, 0x8485, 0xC948, 0x8486,
08541     0xC949, 0x848A, 0xC94A, 0x848D, 0xC94B, 0x848F, 0xC94C, 0x8490,
08542     0xC94D, 0x8491, 0xC94E, 0x8492, 0xC94F, 0x8493, 0xC950, 0x8494,
08543     0xC951, 0x8495, 0xC952, 0x8496, 0xC953, 0x8498, 0xC954, 0x849A,
08544     0xC955, 0x849B, 0xC956, 0x849D, 0xC957, 0x849E, 0xC958, 0x849F,
08545     0xC959, 0x84A0, 0xC95A, 0x84A2, 0xC95B, 0x84A3, 0xC95C, 0x84A4,
08546     0xC95D, 0x84A5, 0xC95E, 0x84A6, 0xC95F, 0x84A7, 0xC960, 0x84A8,
08547     0xC961, 0x84A9, 0xC962, 0x84AA, 0xC963, 0x84AB, 0xC964, 0x84AC,
08548     0xC965, 0x84AD, 0xC966, 0x84AE, 0xC967, 0x84B0, 0xC968, 0x84B1,
08549     0xC969, 0x84B3, 0xC96A, 0x84B5, 0xC96B, 0x84B6, 0xC96C, 0x84B7,
08550     0xC96D, 0x84BB, 0xC96E, 0x84BC, 0xC96F, 0x84BE, 0xC970, 0x84C0,
08551     0xC971, 0x84C2, 0xC972, 0x84C3, 0xC973, 0x84C5, 0xC974, 0x84C6,
08552     0xC975, 0x84C7, 0xC976, 0x84C8, 0xC977, 0x84CB, 0xC978, 0x84CC,
08553     0xC979, 0x84CE, 0xC97A, 0x84CF, 0xC97B, 0x84D2, 0xC97C, 0x84D4,
08554     0xC97D, 0x84D5, 0xC97E, 0x84D7, 0xC980, 0x84D8, 0xC981, 0x84D9,
08555     0xC982, 0x84DA, 0xC983, 0x84DB, 0xC984, 0x84DC, 0xC985, 0x84DE,
08556     0xC986, 0x84E1, 0xC987, 0x84E2, 0xC988, 0x84E4, 0xC989, 0x84E7,
08557     0xC98A, 0x84E8, 0xC98B, 0x84E9, 0xC98C, 0x84EA, 0xC98D, 0x84EB,
08558     0xC98E, 0x84ED, 0xC98F, 0x84EE, 0xC990, 0x84EF, 0xC991, 0x84F1,
08559     0xC992, 0x84F2, 0xC993, 0x84F3, 0xC994, 0x84F4, 0xC995, 0x84F5,
08560     0xC996, 0x84F6, 0xC997, 0x84F7, 0xC998, 0x84F8, 0xC999, 0x84F9,
08561     0xC99A, 0x84FA, 0xC99B, 0x84FB, 0xC99C, 0x84FD, 0xC99D, 0x84FE,
08562     0xC99E, 0x8500, 0xC99F, 0x8501, 0xC9A0, 0x8502, 0xC9A1, 0x4F1E,
08563     0xC9A2, 0x6563, 0xC9A3, 0x6851, 0xC9A4, 0x55D3, 0xC9A5, 0x4E27,
08564     0xC9A6, 0x6414, 0xC9A7, 0x9A9A, 0xC9A8, 0x626B, 0xC9A9, 0x5AC2,
08565     0xC9AA, 0x745F, 0xC9AB, 0x8272, 0xC9AC, 0x6DA9, 0xC9AD, 0x68EE,
08566     0xC9AE, 0x50E7, 0xC9AF, 0x838E, 0xC9B0, 0x7802, 0xC9B1, 0x6740,
08567     0xC9B2, 0x5239, 0xC9B3, 0x6C99, 0xC9B4, 0x7EB1, 0xC9B5, 0x50BB,
08568     0xC9B6, 0x5565, 0xC9B7, 0x715E, 0xC9B8, 0x7B5B, 0xC9B9, 0x6652,
08569     0xC9BA, 0x73CA, 0xC9BB, 0x82EB, 0xC9BC, 0x6749, 0xC9BD, 0x5C71,
08570     0xC9BE, 0x5220, 0xC9BF, 0x717D, 0xC9C0, 0x886B, 0xC9C1, 0x95EA,
08571     0xC9C2, 0x9655, 0xC9C3, 0x64C5, 0xC9C4, 0x8D61, 0xC9C5, 0x81B3,
08572     0xC9C6, 0x5584, 0xC9C7, 0x6C55, 0xC9C8, 0x6247, 0xC9C9, 0x7F2E,
08573     0xC9CA, 0x5892, 0xC9CB, 0x4F24, 0xC9CC, 0x5546, 0xC9CD, 0x8D4F,
08574     0xC9CE, 0x664C, 0xC9CF, 0x4E0A, 0xC9D0, 0x5C1A, 0xC9D1, 0x88F3,
08575     0xC9D2, 0x68A2, 0xC9D3, 0x634E, 0xC9D4, 0x7A0D, 0xC9D5, 0x70E7,
08576     0xC9D6, 0x828D, 0xC9D7, 0x52FA, 0xC9D8, 0x97F6, 0xC9D9, 0x5C11,
08577     0xC9DA, 0x54E8, 0xC9DB, 0x90B5, 0xC9DC, 0x7ECD, 0xC9DD, 0x5962,
08578     0xC9DE, 0x8D4A, 0xC9DF, 0x86C7, 0xC9E0, 0x820C, 0xC9E1, 0x820D,
08579     0xC9E2, 0x8D66, 0xC9E3, 0x6444, 0xC9E4, 0x5C04, 0xC9E5, 0x6151,
08580     0xC9E6, 0x6D89, 0xC9E7, 0x793E, 0xC9E8, 0x8BBE, 0xC9E9, 0x7837,
08581     0xC9EA, 0x7533, 0xC9EB, 0x547B, 0xC9EC, 0x4F38, 0xC9ED, 0x8EAB,
08582     0xC9EE, 0x6DF1, 0xC9EF, 0x5A20, 0xC9F0, 0x7EC5, 0xC9F1, 0x795E,
08583     0xC9F2, 0x6C88, 0xC9F3, 0x5BA1, 0xC9F4, 0x5A76, 0xC9F5, 0x751A,
08584     0xC9F6, 0x80BE, 0xC9F7, 0x614E, 0xC9F8, 0x6E17, 0xC9F9, 0x58F0,
08585     0xC9FA, 0x751F, 0xC9FB, 0x7525, 0xC9FC, 0x7272, 0xC9FD, 0x5347,
08586     0xC9FE, 0x7EF3, 0xCA40, 0x8503, 0xCA41, 0x8504, 0xCA42, 0x8505,
08587     0xCA43, 0x8506, 0xCA44, 0x8507, 0xCA45, 0x8508, 0xCA46, 0x8509,
08588     0xCA47, 0x850A, 0xCA48, 0x850B, 0xCA49, 0x850D, 0xCA4A, 0x850E,
08589     0xCA4B, 0x850F, 0xCA4C, 0x8510, 0xCA4D, 0x8512, 0xCA4E, 0x8514,
08590     0xCA4F, 0x8515, 0xCA50, 0x8516, 0xCA51, 0x8518, 0xCA52, 0x8519,
08591     0xCA53, 0x851B, 0xCA54, 0x851C, 0xCA55, 0x851D, 0xCA56, 0x851E,
08592     0xCA57, 0x8520, 0xCA58, 0x8522, 0xCA59, 0x8523, 0xCA5A, 0x8524,
08593     0xCA5B, 0x8525, 0xCA5C, 0x8526, 0xCA5D, 0x8527, 0xCA5E, 0x8528,
08594     0xCA5F, 0x8529, 0xCA60, 0x852A, 0xCA61, 0x852D, 0xCA62, 0x852E,
08595     0xCA63, 0x852F, 0xCA64, 0x8530, 0xCA65, 0x8531, 0xCA66, 0x8532,
08596     0xCA67, 0x8533, 0xCA68, 0x8534, 0xCA69, 0x8535, 0xCA6A, 0x8536,
08597     0xCA6B, 0x853E, 0xCA6C, 0x853F, 0xCA6D, 0x8540, 0xCA6E, 0x8541,
08598     0xCA6F, 0x8542, 0xCA70, 0x8544, 0xCA71, 0x8545, 0xCA72, 0x8546,
08599     0xCA73, 0x8547, 0xCA74, 0x854B, 0xCA75, 0x854C, 0xCA76, 0x854D,
08600     0xCA77, 0x854E, 0xCA78, 0x854F, 0xCA79, 0x8550, 0xCA7A, 0x8551,
08601     0xCA7B, 0x8552, 0xCA7C, 0x8553, 0xCA7D, 0x8554, 0xCA7E, 0x8555,
08602     0xCA80, 0x8557, 0xCA81, 0x8558, 0xCA82, 0x855A, 0xCA83, 0x855B,
08603     0xCA84, 0x855C, 0xCA85, 0x855D, 0xCA86, 0x855F, 0xCA87, 0x8560,
08604     0xCA88, 0x8561, 0xCA89, 0x8562, 0xCA8A, 0x8563, 0xCA8B, 0x8565,
08605     0xCA8C, 0x8566, 0xCA8D, 0x8567, 0xCA8E, 0x8569, 0xCA8F, 0x856A,
08606     0xCA90, 0x856B, 0xCA91, 0x856C, 0xCA92, 0x856D, 0xCA93, 0x856E,
08607     0xCA94, 0x856F, 0xCA95, 0x8570, 0xCA96, 0x8571, 0xCA97, 0x8573,
08608     0xCA98, 0x8575, 0xCA99, 0x8576, 0xCA9A, 0x8577, 0xCA9B, 0x8578,
08609     0xCA9C, 0x857C, 0xCA9D, 0x857D, 0xCA9E, 0x857F, 0xCA9F, 0x8580,
08610     0xCAA0, 0x8581, 0xCAA1, 0x7701, 0xCAA2, 0x76DB, 0xCAA3, 0x5269,
08611     0xCAA4, 0x80DC, 0xCAA5, 0x5723, 0xCAA6, 0x5E08, 0xCAA7, 0x5931,
08612     0xCAA8, 0x72EE, 0xCAA9, 0x65BD, 0xCAAA, 0x6E7F, 0xCAAB, 0x8BD7,
08613     0xCAAC, 0x5C38, 0xCAAD, 0x8671, 0xCAAE, 0x5341, 0xCAAF, 0x77F3,
08614     0xCAB0, 0x62FE, 0xCAB1, 0x65F6, 0xCAB2, 0x4EC0, 0xCAB3, 0x98DF,
08615     0xCAB4, 0x8680, 0xCAB5, 0x5B9E, 0xCAB6, 0x8BC6, 0xCAB7, 0x53F2,
08616     0xCAB8, 0x77E2, 0xCAB9, 0x4F7F, 0xCABA, 0x5C4E, 0xCABB, 0x9A76,
08617     0xCABC, 0x59CB, 0xCABD, 0x5F0F, 0xCABE, 0x793A, 0xCABF, 0x58EB,
08618     0xCAC0, 0x4E16, 0xCAC1, 0x67FF, 0xCAC2, 0x4E8B, 0xCAC3, 0x62ED,
08619     0xCAC4, 0x8A93, 0xCAC5, 0x901D, 0xCAC6, 0x52BF, 0xCAC7, 0x662F,
08620     0xCAC8, 0x55DC, 0xCAC9, 0x566C, 0xCACA, 0x9002, 0xCACB, 0x4ED5,
08621     0xCACC, 0x4F8D, 0xCACD, 0x91CA, 0xCACE, 0x9970, 0xCACF, 0x6C0F,
08622     0xCAD0, 0x5E02, 0xCAD1, 0x6043, 0xCAD2, 0x5BA4, 0xCAD3, 0x89C6,
08623     0xCAD4, 0x8BD5, 0xCAD5, 0x6536, 0xCAD6, 0x624B, 0xCAD7, 0x9996,
08624     0xCAD8, 0x5B88, 0xCAD9, 0x5BFF, 0xCADA, 0x6388, 0xCADB, 0x552E,
08625     0xCADC, 0x53D7, 0xCADD, 0x7626, 0xCADE, 0x517D, 0xCADF, 0x852C,
08626     0xCAE0, 0x67A2, 0xCAE1, 0x68B3, 0xCAE2, 0x6B8A, 0xCAE3, 0x6292,
08627     0xCAE4, 0x8F93, 0xCAE5, 0x53D4, 0xCAE6, 0x8212, 0xCAE7, 0x6DD1,
08628     0xCAE8, 0x758F, 0xCAE9, 0x4E66, 0xCAEA, 0x8D4E, 0xCAEB, 0x5B70,
08629     0xCAEC, 0x719F, 0xCAED, 0x85AF, 0xCAEE, 0x6691, 0xCAEF, 0x66D9,
08630     0xCAF0, 0x7F72, 0xCAF1, 0x8700, 0xCAF2, 0x9ECD, 0xCAF3, 0x9F20,
08631     0xCAF4, 0x5C5E, 0xCAF5, 0x672F, 0xCAF6, 0x8FF0, 0xCAF7, 0x6811,
08632     0xCAF8, 0x675F, 0xCAF9, 0x620D, 0xCAFA, 0x7AD6, 0xCAFB, 0x5885,
08633     0xCAFC, 0x5EB6, 0xCAFD, 0x6570, 0xCAFE, 0x6F31, 0xCB40, 0x8582,
08634     0xCB41, 0x8583, 0xCB42, 0x8586, 0xCB43, 0x8588, 0xCB44, 0x8589,
08635     0xCB45, 0x858A, 0xCB46, 0x858B, 0xCB47, 0x858C, 0xCB48, 0x858D,
08636     0xCB49, 0x858E, 0xCB4A, 0x8590, 0xCB4B, 0x8591, 0xCB4C, 0x8592,
08637     0xCB4D, 0x8593, 0xCB4E, 0x8594, 0xCB4F, 0x8595, 0xCB50, 0x8596,
08638     0xCB51, 0x8597, 0xCB52, 0x8598, 0xCB53, 0x8599, 0xCB54, 0x859A,
08639     0xCB55, 0x859D, 0xCB56, 0x859E, 0xCB57, 0x859F, 0xCB58, 0x85A0,
08640     0xCB59, 0x85A1, 0xCB5A, 0x85A2, 0xCB5B, 0x85A3, 0xCB5C, 0x85A5,
08641     0xCB5D, 0x85A6, 0xCB5E, 0x85A7, 0xCB5F, 0x85A9, 0xCB60, 0x85AB,
08642     0xCB61, 0x85AC, 0xCB62, 0x85AD, 0xCB63, 0x85B1, 0xCB64, 0x85B2,
08643     0xCB65, 0x85B3, 0xCB66, 0x85B4, 0xCB67, 0x85B5, 0xCB68, 0x85B6,
08644     0xCB69, 0x85B8, 0xCB6A, 0x85BA, 0xCB6B, 0x85BB, 0xCB6C, 0x85BC,
08645     0xCB6D, 0x85BD, 0xCB6E, 0x85BE, 0xCB6F, 0x85BF, 0xCB70, 0x85C0,
08646     0xCB71, 0x85C2, 0xCB72, 0x85C3, 0xCB73, 0x85C4, 0xCB74, 0x85C5,
08647     0xCB75, 0x85C6, 0xCB76, 0x85C7, 0xCB77, 0x85C8, 0xCB78, 0x85CA,
08648     0xCB79, 0x85CB, 0xCB7A, 0x85CC, 0xCB7B, 0x85CD, 0xCB7C, 0x85CE,
08649     0xCB7D, 0x85D1, 0xCB7E, 0x85D2, 0xCB80, 0x85D4, 0xCB81, 0x85D6,
08650     0xCB82, 0x85D7, 0xCB83, 0x85D8, 0xCB84, 0x85D9, 0xCB85, 0x85DA,
08651     0xCB86, 0x85DB, 0xCB87, 0x85DD, 0xCB88, 0x85DE, 0xCB89, 0x85DF,
08652     0xCB8A, 0x85E0, 0xCB8B, 0x85E1, 0xCB8C, 0x85E2, 0xCB8D, 0x85E3,
08653     0xCB8E, 0x85E5, 0xCB8F, 0x85E6, 0xCB90, 0x85E7, 0xCB91, 0x85E8,
08654     0xCB92, 0x85EA, 0xCB93, 0x85EB, 0xCB94, 0x85EC, 0xCB95, 0x85ED,
08655     0xCB96, 0x85EE, 0xCB97, 0x85EF, 0xCB98, 0x85F0, 0xCB99, 0x85F1,
08656     0xCB9A, 0x85F2, 0xCB9B, 0x85F3, 0xCB9C, 0x85F4, 0xCB9D, 0x85F5,
08657     0xCB9E, 0x85F6, 0xCB9F, 0x85F7, 0xCBA0, 0x85F8, 0xCBA1, 0x6055,
08658     0xCBA2, 0x5237, 0xCBA3, 0x800D, 0xCBA4, 0x6454, 0xCBA5, 0x8870,
08659     0xCBA6, 0x7529, 0xCBA7, 0x5E05, 0xCBA8, 0x6813, 0xCBA9, 0x62F4,
08660     0xCBAA, 0x971C, 0xCBAB, 0x53CC, 0xCBAC, 0x723D, 0xCBAD, 0x8C01,
08661     0xCBAE, 0x6C34, 0xCBAF, 0x7761, 0xCBB0, 0x7A0E, 0xCBB1, 0x542E,
08662     0xCBB2, 0x77AC, 0xCBB3, 0x987A, 0xCBB4, 0x821C, 0xCBB5, 0x8BF4,
08663     0xCBB6, 0x7855, 0xCBB7, 0x6714, 0xCBB8, 0x70C1, 0xCBB9, 0x65AF,
08664     0xCBBA, 0x6495, 0xCBBB, 0x5636, 0xCBBC, 0x601D, 0xCBBD, 0x79C1,
08665     0xCBBE, 0x53F8, 0xCBBF, 0x4E1D, 0xCBC0, 0x6B7B, 0xCBC1, 0x8086,
08666     0xCBC2, 0x5BFA, 0xCBC3, 0x55E3, 0xCBC4, 0x56DB, 0xCBC5, 0x4F3A,
08667     0xCBC6, 0x4F3C, 0xCBC7, 0x9972, 0xCBC8, 0x5DF3, 0xCBC9, 0x677E,
08668     0xCBCA, 0x8038, 0xCBCB, 0x6002, 0xCBCC, 0x9882, 0xCBCD, 0x9001,
08669     0xCBCE, 0x5B8B, 0xCBCF, 0x8BBC, 0xCBD0, 0x8BF5, 0xCBD1, 0x641C,
08670     0xCBD2, 0x8258, 0xCBD3, 0x64DE, 0xCBD4, 0x55FD, 0xCBD5, 0x82CF,
08671     0xCBD6, 0x9165, 0xCBD7, 0x4FD7, 0xCBD8, 0x7D20, 0xCBD9, 0x901F,
08672     0xCBDA, 0x7C9F, 0xCBDB, 0x50F3, 0xCBDC, 0x5851, 0xCBDD, 0x6EAF,
08673     0xCBDE, 0x5BBF, 0xCBDF, 0x8BC9, 0xCBE0, 0x8083, 0xCBE1, 0x9178,
08674     0xCBE2, 0x849C, 0xCBE3, 0x7B97, 0xCBE4, 0x867D, 0xCBE5, 0x968B,
08675     0xCBE6, 0x968F, 0xCBE7, 0x7EE5, 0xCBE8, 0x9AD3, 0xCBE9, 0x788E,
08676     0xCBEA, 0x5C81, 0xCBEB, 0x7A57, 0xCBEC, 0x9042, 0xCBED, 0x96A7,
08677     0xCBEE, 0x795F, 0xCBEF, 0x5B59, 0xCBF0, 0x635F, 0xCBF1, 0x7B0B,
08678     0xCBF2, 0x84D1, 0xCBF3, 0x68AD, 0xCBF4, 0x5506, 0xCBF5, 0x7F29,
08679     0xCBF6, 0x7410, 0xCBF7, 0x7D22, 0xCBF8, 0x9501, 0xCBF9, 0x6240,
08680     0xCBFA, 0x584C, 0xCBFB, 0x4ED6, 0xCBFC, 0x5B83, 0xCBFD, 0x5979,
08681     0xCBFE, 0x5854, 0xCC40, 0x85F9, 0xCC41, 0x85FA, 0xCC42, 0x85FC,
08682     0xCC43, 0x85FD, 0xCC44, 0x85FE, 0xCC45, 0x8600, 0xCC46, 0x8601,
08683     0xCC47, 0x8602, 0xCC48, 0x8603, 0xCC49, 0x8604, 0xCC4A, 0x8606,
08684     0xCC4B, 0x8607, 0xCC4C, 0x8608, 0xCC4D, 0x8609, 0xCC4E, 0x860A,
08685     0xCC4F, 0x860B, 0xCC50, 0x860C, 0xCC51, 0x860D, 0xCC52, 0x860E,
08686     0xCC53, 0x860F, 0xCC54, 0x8610, 0xCC55, 0x8612, 0xCC56, 0x8613,
08687     0xCC57, 0x8614, 0xCC58, 0x8615, 0xCC59, 0x8617, 0xCC5A, 0x8618,
08688     0xCC5B, 0x8619, 0xCC5C, 0x861A, 0xCC5D, 0x861B, 0xCC5E, 0x861C,
08689     0xCC5F, 0x861D, 0xCC60, 0x861E, 0xCC61, 0x861F, 0xCC62, 0x8620,
08690     0xCC63, 0x8621, 0xCC64, 0x8622, 0xCC65, 0x8623, 0xCC66, 0x8624,
08691     0xCC67, 0x8625, 0xCC68, 0x8626, 0xCC69, 0x8628, 0xCC6A, 0x862A,
08692     0xCC6B, 0x862B, 0xCC6C, 0x862C, 0xCC6D, 0x862D, 0xCC6E, 0x862E,
08693     0xCC6F, 0x862F, 0xCC70, 0x8630, 0xCC71, 0x8631, 0xCC72, 0x8632,
08694     0xCC73, 0x8633, 0xCC74, 0x8634, 0xCC75, 0x8635, 0xCC76, 0x8636,
08695     0xCC77, 0x8637, 0xCC78, 0x8639, 0xCC79, 0x863A, 0xCC7A, 0x863B,
08696     0xCC7B, 0x863D, 0xCC7C, 0x863E, 0xCC7D, 0x863F, 0xCC7E, 0x8640,
08697     0xCC80, 0x8641, 0xCC81, 0x8642, 0xCC82, 0x8643, 0xCC83, 0x8644,
08698     0xCC84, 0x8645, 0xCC85, 0x8646, 0xCC86, 0x8647, 0xCC87, 0x8648,
08699     0xCC88, 0x8649, 0xCC89, 0x864A, 0xCC8A, 0x864B, 0xCC8B, 0x864C,
08700     0xCC8C, 0x8652, 0xCC8D, 0x8653, 0xCC8E, 0x8655, 0xCC8F, 0x8656,
08701     0xCC90, 0x8657, 0xCC91, 0x8658, 0xCC92, 0x8659, 0xCC93, 0x865B,
08702     0xCC94, 0x865C, 0xCC95, 0x865D, 0xCC96, 0x865F, 0xCC97, 0x8660,
08703     0xCC98, 0x8661, 0xCC99, 0x8663, 0xCC9A, 0x8664, 0xCC9B, 0x8665,
08704     0xCC9C, 0x8666, 0xCC9D, 0x8667, 0xCC9E, 0x8668, 0xCC9F, 0x8669,
08705     0xCCA0, 0x866A, 0xCCA1, 0x736D, 0xCCA2, 0x631E, 0xCCA3, 0x8E4B,
08706     0xCCA4, 0x8E0F, 0xCCA5, 0x80CE, 0xCCA6, 0x82D4, 0xCCA7, 0x62AC,
08707     0xCCA8, 0x53F0, 0xCCA9, 0x6CF0, 0xCCAA, 0x915E, 0xCCAB, 0x592A,
08708     0xCCAC, 0x6001, 0xCCAD, 0x6C70, 0xCCAE, 0x574D, 0xCCAF, 0x644A,
08709     0xCCB0, 0x8D2A, 0xCCB1, 0x762B, 0xCCB2, 0x6EE9, 0xCCB3, 0x575B,
08710     0xCCB4, 0x6A80, 0xCCB5, 0x75F0, 0xCCB6, 0x6F6D, 0xCCB7, 0x8C2D,
08711     0xCCB8, 0x8C08, 0xCCB9, 0x5766, 0xCCBA, 0x6BEF, 0xCCBB, 0x8892,
08712     0xCCBC, 0x78B3, 0xCCBD, 0x63A2, 0xCCBE, 0x53F9, 0xCCBF, 0x70AD,
08713     0xCCC0, 0x6C64, 0xCCC1, 0x5858, 0xCCC2, 0x642A, 0xCCC3, 0x5802,
08714     0xCCC4, 0x68E0, 0xCCC5, 0x819B, 0xCCC6, 0x5510, 0xCCC7, 0x7CD6,
08715     0xCCC8, 0x5018, 0xCCC9, 0x8EBA, 0xCCCA, 0x6DCC, 0xCCCB, 0x8D9F,
08716     0xCCCC, 0x70EB, 0xCCCD, 0x638F, 0xCCCE, 0x6D9B, 0xCCCF, 0x6ED4,
08717     0xCCD0, 0x7EE6, 0xCCD1, 0x8404, 0xCCD2, 0x6843, 0xCCD3, 0x9003,
08718     0xCCD4, 0x6DD8, 0xCCD5, 0x9676, 0xCCD6, 0x8BA8, 0xCCD7, 0x5957,
08719     0xCCD8, 0x7279, 0xCCD9, 0x85E4, 0xCCDA, 0x817E, 0xCCDB, 0x75BC,
08720     0xCCDC, 0x8A8A, 0xCCDD, 0x68AF, 0xCCDE, 0x5254, 0xCCDF, 0x8E22,
08721     0xCCE0, 0x9511, 0xCCE1, 0x63D0, 0xCCE2, 0x9898, 0xCCE3, 0x8E44,
08722     0xCCE4, 0x557C, 0xCCE5, 0x4F53, 0xCCE6, 0x66FF, 0xCCE7, 0x568F,
08723     0xCCE8, 0x60D5, 0xCCE9, 0x6D95, 0xCCEA, 0x5243, 0xCCEB, 0x5C49,
08724     0xCCEC, 0x5929, 0xCCED, 0x6DFB, 0xCCEE, 0x586B, 0xCCEF, 0x7530,
08725     0xCCF0, 0x751C, 0xCCF1, 0x606C, 0xCCF2, 0x8214, 0xCCF3, 0x8146,
08726     0xCCF4, 0x6311, 0xCCF5, 0x6761, 0xCCF6, 0x8FE2, 0xCCF7, 0x773A,
08727     0xCCF8, 0x8DF3, 0xCCF9, 0x8D34, 0xCCFA, 0x94C1, 0xCCFB, 0x5E16,
08728     0xCCFC, 0x5385, 0xCCFD, 0x542C, 0xCCFE, 0x70C3, 0xCD40, 0x866D,
08729     0xCD41, 0x866F, 0xCD42, 0x8670, 0xCD43, 0x8672, 0xCD44, 0x8673,
08730     0xCD45, 0x8674, 0xCD46, 0x8675, 0xCD47, 0x8676, 0xCD48, 0x8677,
08731     0xCD49, 0x8678, 0xCD4A, 0x8683, 0xCD4B, 0x8684, 0xCD4C, 0x8685,
08732     0xCD4D, 0x8686, 0xCD4E, 0x8687, 0xCD4F, 0x8688, 0xCD50, 0x8689,
08733     0xCD51, 0x868E, 0xCD52, 0x868F, 0xCD53, 0x8690, 0xCD54, 0x8691,
08734     0xCD55, 0x8692, 0xCD56, 0x8694, 0xCD57, 0x8696, 0xCD58, 0x8697,
08735     0xCD59, 0x8698, 0xCD5A, 0x8699, 0xCD5B, 0x869A, 0xCD5C, 0x869B,
08736     0xCD5D, 0x869E, 0xCD5E, 0x869F, 0xCD5F, 0x86A0, 0xCD60, 0x86A1,
08737     0xCD61, 0x86A2, 0xCD62, 0x86A5, 0xCD63, 0x86A6, 0xCD64, 0x86AB,
08738     0xCD65, 0x86AD, 0xCD66, 0x86AE, 0xCD67, 0x86B2, 0xCD68, 0x86B3,
08739     0xCD69, 0x86B7, 0xCD6A, 0x86B8, 0xCD6B, 0x86B9, 0xCD6C, 0x86BB,
08740     0xCD6D, 0x86BC, 0xCD6E, 0x86BD, 0xCD6F, 0x86BE, 0xCD70, 0x86BF,
08741     0xCD71, 0x86C1, 0xCD72, 0x86C2, 0xCD73, 0x86C3, 0xCD74, 0x86C5,
08742     0xCD75, 0x86C8, 0xCD76, 0x86CC, 0xCD77, 0x86CD, 0xCD78, 0x86D2,
08743     0xCD79, 0x86D3, 0xCD7A, 0x86D5, 0xCD7B, 0x86D6, 0xCD7C, 0x86D7,
08744     0xCD7D, 0x86DA, 0xCD7E, 0x86DC, 0xCD80, 0x86DD, 0xCD81, 0x86E0,
08745     0xCD82, 0x86E1, 0xCD83, 0x86E2, 0xCD84, 0x86E3, 0xCD85, 0x86E5,
08746     0xCD86, 0x86E6, 0xCD87, 0x86E7, 0xCD88, 0x86E8, 0xCD89, 0x86EA,
08747     0xCD8A, 0x86EB, 0xCD8B, 0x86EC, 0xCD8C, 0x86EF, 0xCD8D, 0x86F5,
08748     0xCD8E, 0x86F6, 0xCD8F, 0x86F7, 0xCD90, 0x86FA, 0xCD91, 0x86FB,
08749     0xCD92, 0x86FC, 0xCD93, 0x86FD, 0xCD94, 0x86FF, 0xCD95, 0x8701,
08750     0xCD96, 0x8704, 0xCD97, 0x8705, 0xCD98, 0x8706, 0xCD99, 0x870B,
08751     0xCD9A, 0x870C, 0xCD9B, 0x870E, 0xCD9C, 0x870F, 0xCD9D, 0x8710,
08752     0xCD9E, 0x8711, 0xCD9F, 0x8714, 0xCDA0, 0x8716, 0xCDA1, 0x6C40,
08753     0xCDA2, 0x5EF7, 0xCDA3, 0x505C, 0xCDA4, 0x4EAD, 0xCDA5, 0x5EAD,
08754     0xCDA6, 0x633A, 0xCDA7, 0x8247, 0xCDA8, 0x901A, 0xCDA9, 0x6850,
08755     0xCDAA, 0x916E, 0xCDAB, 0x77B3, 0xCDAC, 0x540C, 0xCDAD, 0x94DC,
08756     0xCDAE, 0x5F64, 0xCDAF, 0x7AE5, 0xCDB0, 0x6876, 0xCDB1, 0x6345,
08757     0xCDB2, 0x7B52, 0xCDB3, 0x7EDF, 0xCDB4, 0x75DB, 0xCDB5, 0x5077,
08758     0xCDB6, 0x6295, 0xCDB7, 0x5934, 0xCDB8, 0x900F, 0xCDB9, 0x51F8,
08759     0xCDBA, 0x79C3, 0xCDBB, 0x7A81, 0xCDBC, 0x56FE, 0xCDBD, 0x5F92,
08760     0xCDBE, 0x9014, 0xCDBF, 0x6D82, 0xCDC0, 0x5C60, 0xCDC1, 0x571F,
08761     0xCDC2, 0x5410, 0xCDC3, 0x5154, 0xCDC4, 0x6E4D, 0xCDC5, 0x56E2,
08762     0xCDC6, 0x63A8, 0xCDC7, 0x9893, 0xCDC8, 0x817F, 0xCDC9, 0x8715,
08763     0xCDCA, 0x892A, 0xCDCB, 0x9000, 0xCDCC, 0x541E, 0xCDCD, 0x5C6F,
08764     0xCDCE, 0x81C0, 0xCDCF, 0x62D6, 0xCDD0, 0x6258, 0xCDD1, 0x8131,
08765     0xCDD2, 0x9E35, 0xCDD3, 0x9640, 0xCDD4, 0x9A6E, 0xCDD5, 0x9A7C,
08766     0xCDD6, 0x692D, 0xCDD7, 0x59A5, 0xCDD8, 0x62D3, 0xCDD9, 0x553E,
08767     0xCDDA, 0x6316, 0xCDDB, 0x54C7, 0xCDDC, 0x86D9, 0xCDDD, 0x6D3C,
08768     0xCDDE, 0x5A03, 0xCDDF, 0x74E6, 0xCDE0, 0x889C, 0xCDE1, 0x6B6A,
08769     0xCDE2, 0x5916, 0xCDE3, 0x8C4C, 0xCDE4, 0x5F2F, 0xCDE5, 0x6E7E,
08770     0xCDE6, 0x73A9, 0xCDE7, 0x987D, 0xCDE8, 0x4E38, 0xCDE9, 0x70F7,
08771     0xCDEA, 0x5B8C, 0xCDEB, 0x7897, 0xCDEC, 0x633D, 0xCDED, 0x665A,
08772     0xCDEE, 0x7696, 0xCDEF, 0x60CB, 0xCDF0, 0x5B9B, 0xCDF1, 0x5A49,
08773     0xCDF2, 0x4E07, 0xCDF3, 0x8155, 0xCDF4, 0x6C6A, 0xCDF5, 0x738B,
08774     0xCDF6, 0x4EA1, 0xCDF7, 0x6789, 0xCDF8, 0x7F51, 0xCDF9, 0x5F80,
08775     0xCDFA, 0x65FA, 0xCDFB, 0x671B, 0xCDFC, 0x5FD8, 0xCDFD, 0x5984,
08776     0xCDFE, 0x5A01, 0xCE40, 0x8719, 0xCE41, 0x871B, 0xCE42, 0x871D,
08777     0xCE43, 0x871F, 0xCE44, 0x8720, 0xCE45, 0x8724, 0xCE46, 0x8726,
08778     0xCE47, 0x8727, 0xCE48, 0x8728, 0xCE49, 0x872A, 0xCE4A, 0x872B,
08779     0xCE4B, 0x872C, 0xCE4C, 0x872D, 0xCE4D, 0x872F, 0xCE4E, 0x8730,
08780     0xCE4F, 0x8732, 0xCE50, 0x8733, 0xCE51, 0x8735, 0xCE52, 0x8736,
08781     0xCE53, 0x8738, 0xCE54, 0x8739, 0xCE55, 0x873A, 0xCE56, 0x873C,
08782     0xCE57, 0x873D, 0xCE58, 0x8740, 0xCE59, 0x8741, 0xCE5A, 0x8742,
08783     0xCE5B, 0x8743, 0xCE5C, 0x8744, 0xCE5D, 0x8745, 0xCE5E, 0x8746,
08784     0xCE5F, 0x874A, 0xCE60, 0x874B, 0xCE61, 0x874D, 0xCE62, 0x874F,
08785     0xCE63, 0x8750, 0xCE64, 0x8751, 0xCE65, 0x8752, 0xCE66, 0x8754,
08786     0xCE67, 0x8755, 0xCE68, 0x8756, 0xCE69, 0x8758, 0xCE6A, 0x875A,
08787     0xCE6B, 0x875B, 0xCE6C, 0x875C, 0xCE6D, 0x875D, 0xCE6E, 0x875E,
08788     0xCE6F, 0x875F, 0xCE70, 0x8761, 0xCE71, 0x8762, 0xCE72, 0x8766,
08789     0xCE73, 0x8767, 0xCE74, 0x8768, 0xCE75, 0x8769, 0xCE76, 0x876A,
08790     0xCE77, 0x876B, 0xCE78, 0x876C, 0xCE79, 0x876D, 0xCE7A, 0x876F,
08791     0xCE7B, 0x8771, 0xCE7C, 0x8772, 0xCE7D, 0x8773, 0xCE7E, 0x8775,
08792     0xCE80, 0x8777, 0xCE81, 0x8778, 0xCE82, 0x8779, 0xCE83, 0x877A,
08793     0xCE84, 0x877F, 0xCE85, 0x8780, 0xCE86, 0x8781, 0xCE87, 0x8784,
08794     0xCE88, 0x8786, 0xCE89, 0x8787, 0xCE8A, 0x8789, 0xCE8B, 0x878A,
08795     0xCE8C, 0x878C, 0xCE8D, 0x878E, 0xCE8E, 0x878F, 0xCE8F, 0x8790,
08796     0xCE90, 0x8791, 0xCE91, 0x8792, 0xCE92, 0x8794, 0xCE93, 0x8795,
08797     0xCE94, 0x8796, 0xCE95, 0x8798, 0xCE96, 0x8799, 0xCE97, 0x879A,
08798     0xCE98, 0x879B, 0xCE99, 0x879C, 0xCE9A, 0x879D, 0xCE9B, 0x879E,
08799     0xCE9C, 0x87A0, 0xCE9D, 0x87A1, 0xCE9E, 0x87A2, 0xCE9F, 0x87A3,
08800     0xCEA0, 0x87A4, 0xCEA1, 0x5DCD, 0xCEA2, 0x5FAE, 0xCEA3, 0x5371,
08801     0xCEA4, 0x97E6, 0xCEA5, 0x8FDD, 0xCEA6, 0x6845, 0xCEA7, 0x56F4,
08802     0xCEA8, 0x552F, 0xCEA9, 0x60DF, 0xCEAA, 0x4E3A, 0xCEAB, 0x6F4D,
08803     0xCEAC, 0x7EF4, 0xCEAD, 0x82C7, 0xCEAE, 0x840E, 0xCEAF, 0x59D4,
08804     0xCEB0, 0x4F1F, 0xCEB1, 0x4F2A, 0xCEB2, 0x5C3E, 0xCEB3, 0x7EAC,
08805     0xCEB4, 0x672A, 0xCEB5, 0x851A, 0xCEB6, 0x5473, 0xCEB7, 0x754F,
08806     0xCEB8, 0x80C3, 0xCEB9, 0x5582, 0xCEBA, 0x9B4F, 0xCEBB, 0x4F4D,
08807     0xCEBC, 0x6E2D, 0xCEBD, 0x8C13, 0xCEBE, 0x5C09, 0xCEBF, 0x6170,
08808     0xCEC0, 0x536B, 0xCEC1, 0x761F, 0xCEC2, 0x6E29, 0xCEC3, 0x868A,
08809     0xCEC4, 0x6587, 0xCEC5, 0x95FB, 0xCEC6, 0x7EB9, 0xCEC7, 0x543B,
08810     0xCEC8, 0x7A33, 0xCEC9, 0x7D0A, 0xCECA, 0x95EE, 0xCECB, 0x55E1,
08811     0xCECC, 0x7FC1, 0xCECD, 0x74EE, 0xCECE, 0x631D, 0xCECF, 0x8717,
08812     0xCED0, 0x6DA1, 0xCED1, 0x7A9D, 0xCED2, 0x6211, 0xCED3, 0x65A1,
08813     0xCED4, 0x5367, 0xCED5, 0x63E1, 0xCED6, 0x6C83, 0xCED7, 0x5DEB,
08814     0xCED8, 0x545C, 0xCED9, 0x94A8, 0xCEDA, 0x4E4C, 0xCEDB, 0x6C61,
08815     0xCEDC, 0x8BEC, 0xCEDD, 0x5C4B, 0xCEDE, 0x65E0, 0xCEDF, 0x829C,
08816     0xCEE0, 0x68A7, 0xCEE1, 0x543E, 0xCEE2, 0x5434, 0xCEE3, 0x6BCB,
08817     0xCEE4, 0x6B66, 0xCEE5, 0x4E94, 0xCEE6, 0x6342, 0xCEE7, 0x5348,
08818     0xCEE8, 0x821E, 0xCEE9, 0x4F0D, 0xCEEA, 0x4FAE, 0xCEEB, 0x575E,
08819     0xCEEC, 0x620A, 0xCEED, 0x96FE, 0xCEEE, 0x6664, 0xCEEF, 0x7269,
08820     0xCEF0, 0x52FF, 0xCEF1, 0x52A1, 0xCEF2, 0x609F, 0xCEF3, 0x8BEF,
08821     0xCEF4, 0x6614, 0xCEF5, 0x7199, 0xCEF6, 0x6790, 0xCEF7, 0x897F,
08822     0xCEF8, 0x7852, 0xCEF9, 0x77FD, 0xCEFA, 0x6670, 0xCEFB, 0x563B,
08823     0xCEFC, 0x5438, 0xCEFD, 0x9521, 0xCEFE, 0x727A, 0xCF40, 0x87A5,
08824     0xCF41, 0x87A6, 0xCF42, 0x87A7, 0xCF43, 0x87A9, 0xCF44, 0x87AA,
08825     0xCF45, 0x87AE, 0xCF46, 0x87B0, 0xCF47, 0x87B1, 0xCF48, 0x87B2,
08826     0xCF49, 0x87B4, 0xCF4A, 0x87B6, 0xCF4B, 0x87B7, 0xCF4C, 0x87B8,
08827     0xCF4D, 0x87B9, 0xCF4E, 0x87BB, 0xCF4F, 0x87BC, 0xCF50, 0x87BE,
08828     0xCF51, 0x87BF, 0xCF52, 0x87C1, 0xCF53, 0x87C2, 0xCF54, 0x87C3,
08829     0xCF55, 0x87C4, 0xCF56, 0x87C5, 0xCF57, 0x87C7, 0xCF58, 0x87C8,
08830     0xCF59, 0x87C9, 0xCF5A, 0x87CC, 0xCF5B, 0x87CD, 0xCF5C, 0x87CE,
08831     0xCF5D, 0x87CF, 0xCF5E, 0x87D0, 0xCF5F, 0x87D4, 0xCF60, 0x87D5,
08832     0xCF61, 0x87D6, 0xCF62, 0x87D7, 0xCF63, 0x87D8, 0xCF64, 0x87D9,
08833     0xCF65, 0x87DA, 0xCF66, 0x87DC, 0xCF67, 0x87DD, 0xCF68, 0x87DE,
08834     0xCF69, 0x87DF, 0xCF6A, 0x87E1, 0xCF6B, 0x87E2, 0xCF6C, 0x87E3,
08835     0xCF6D, 0x87E4, 0xCF6E, 0x87E6, 0xCF6F, 0x87E7, 0xCF70, 0x87E8,
08836     0xCF71, 0x87E9, 0xCF72, 0x87EB, 0xCF73, 0x87EC, 0xCF74, 0x87ED,
08837     0xCF75, 0x87EF, 0xCF76, 0x87F0, 0xCF77, 0x87F1, 0xCF78, 0x87F2,
08838     0xCF79, 0x87F3, 0xCF7A, 0x87F4, 0xCF7B, 0x87F5, 0xCF7C, 0x87F6,
08839     0xCF7D, 0x87F7, 0xCF7E, 0x87F8, 0xCF80, 0x87FA, 0xCF81, 0x87FB,
08840     0xCF82, 0x87FC, 0xCF83, 0x87FD, 0xCF84, 0x87FF, 0xCF85, 0x8800,
08841     0xCF86, 0x8801, 0xCF87, 0x8802, 0xCF88, 0x8804, 0xCF89, 0x8805,
08842     0xCF8A, 0x8806, 0xCF8B, 0x8807, 0xCF8C, 0x8808, 0xCF8D, 0x8809,
08843     0xCF8E, 0x880B, 0xCF8F, 0x880C, 0xCF90, 0x880D, 0xCF91, 0x880E,
08844     0xCF92, 0x880F, 0xCF93, 0x8810, 0xCF94, 0x8811, 0xCF95, 0x8812,
08845     0xCF96, 0x8814, 0xCF97, 0x8817, 0xCF98, 0x8818, 0xCF99, 0x8819,
08846     0xCF9A, 0x881A, 0xCF9B, 0x881C, 0xCF9C, 0x881D, 0xCF9D, 0x881E,
08847     0xCF9E, 0x881F, 0xCF9F, 0x8820, 0xCFA0, 0x8823, 0xCFA1, 0x7A00,
08848     0xCFA2, 0x606F, 0xCFA3, 0x5E0C, 0xCFA4, 0x6089, 0xCFA5, 0x819D,
08849     0xCFA6, 0x5915, 0xCFA7, 0x60DC, 0xCFA8, 0x7184, 0xCFA9, 0x70EF,
08850     0xCFAA, 0x6EAA, 0xCFAB, 0x6C50, 0xCFAC, 0x7280, 0xCFAD, 0x6A84,
08851     0xCFAE, 0x88AD, 0xCFAF, 0x5E2D, 0xCFB0, 0x4E60, 0xCFB1, 0x5AB3,
08852     0xCFB2, 0x559C, 0xCFB3, 0x94E3, 0xCFB4, 0x6D17, 0xCFB5, 0x7CFB,
08853     0xCFB6, 0x9699, 0xCFB7, 0x620F, 0xCFB8, 0x7EC6, 0xCFB9, 0x778E,
08854     0xCFBA, 0x867E, 0xCFBB, 0x5323, 0xCFBC, 0x971E, 0xCFBD, 0x8F96,
08855     0xCFBE, 0x6687, 0xCFBF, 0x5CE1, 0xCFC0, 0x4FA0, 0xCFC1, 0x72ED,
08856     0xCFC2, 0x4E0B, 0xCFC3, 0x53A6, 0xCFC4, 0x590F, 0xCFC5, 0x5413,
08857     0xCFC6, 0x6380, 0xCFC7, 0x9528, 0xCFC8, 0x5148, 0xCFC9, 0x4ED9,
08858     0xCFCA, 0x9C9C, 0xCFCB, 0x7EA4, 0xCFCC, 0x54B8, 0xCFCD, 0x8D24,
08859     0xCFCE, 0x8854, 0xCFCF, 0x8237, 0xCFD0, 0x95F2, 0xCFD1, 0x6D8E,
08860     0xCFD2, 0x5F26, 0xCFD3, 0x5ACC, 0xCFD4, 0x663E, 0xCFD5, 0x9669,
08861     0xCFD6, 0x73B0, 0xCFD7, 0x732E, 0xCFD8, 0x53BF, 0xCFD9, 0x817A,
08862     0xCFDA, 0x9985, 0xCFDB, 0x7FA1, 0xCFDC, 0x5BAA, 0xCFDD, 0x9677,
08863     0xCFDE, 0x9650, 0xCFDF, 0x7EBF, 0xCFE0, 0x76F8, 0xCFE1, 0x53A2,
08864     0xCFE2, 0x9576, 0xCFE3, 0x9999, 0xCFE4, 0x7BB1, 0xCFE5, 0x8944,
08865     0xCFE6, 0x6E58, 0xCFE7, 0x4E61, 0xCFE8, 0x7FD4, 0xCFE9, 0x7965,
08866     0xCFEA, 0x8BE6, 0xCFEB, 0x60F3, 0xCFEC, 0x54CD, 0xCFED, 0x4EAB,
08867     0xCFEE, 0x9879, 0xCFEF, 0x5DF7, 0xCFF0, 0x6A61, 0xCFF1, 0x50CF,
08868     0xCFF2, 0x5411, 0xCFF3, 0x8C61, 0xCFF4, 0x8427, 0xCFF5, 0x785D,
08869     0xCFF6, 0x9704, 0xCFF7, 0x524A, 0xCFF8, 0x54EE, 0xCFF9, 0x56A3,
08870     0xCFFA, 0x9500, 0xCFFB, 0x6D88, 0xCFFC, 0x5BB5, 0xCFFD, 0x6DC6,
08871     0xCFFE, 0x6653, 0xD040, 0x8824, 0xD041, 0x8825, 0xD042, 0x8826,
08872     0xD043, 0x8827, 0xD044, 0x8828, 0xD045, 0x8829, 0xD046, 0x882A,
08873     0xD047, 0x882B, 0xD048, 0x882C, 0xD049, 0x882D, 0xD04A, 0x882E,
08874     0xD04B, 0x882F, 0xD04C, 0x8830, 0xD04D, 0x8831, 0xD04E, 0x8833,
08875     0xD04F, 0x8834, 0xD050, 0x8835, 0xD051, 0x8836, 0xD052, 0x8837,
08876     0xD053, 0x8838, 0xD054, 0x883A, 0xD055, 0x883B, 0xD056, 0x883D,
08877     0xD057, 0x883E, 0xD058, 0x883F, 0xD059, 0x8841, 0xD05A, 0x8842,
08878     0xD05B, 0x8843, 0xD05C, 0x8846, 0xD05D, 0x8847, 0xD05E, 0x8848,
08879     0xD05F, 0x8849, 0xD060, 0x884A, 0xD061, 0x884B, 0xD062, 0x884E,
08880     0xD063, 0x884F, 0xD064, 0x8850, 0xD065, 0x8851, 0xD066, 0x8852,
08881     0xD067, 0x8853, 0xD068, 0x8855, 0xD069, 0x8856, 0xD06A, 0x8858,
08882     0xD06B, 0x885A, 0xD06C, 0x885B, 0xD06D, 0x885C, 0xD06E, 0x885D,
08883     0xD06F, 0x885E, 0xD070, 0x885F, 0xD071, 0x8860, 0xD072, 0x8866,
08884     0xD073, 0x8867, 0xD074, 0x886A, 0xD075, 0x886D, 0xD076, 0x886F,
08885     0xD077, 0x8871, 0xD078, 0x8873, 0xD079, 0x8874, 0xD07A, 0x8875,
08886     0xD07B, 0x8876, 0xD07C, 0x8878, 0xD07D, 0x8879, 0xD07E, 0x887A,
08887     0xD080, 0x887B, 0xD081, 0x887C, 0xD082, 0x8880, 0xD083, 0x8883,
08888     0xD084, 0x8886, 0xD085, 0x8887, 0xD086, 0x8889, 0xD087, 0x888A,
08889     0xD088, 0x888C, 0xD089, 0x888E, 0xD08A, 0x888F, 0xD08B, 0x8890,
08890     0xD08C, 0x8891, 0xD08D, 0x8893, 0xD08E, 0x8894, 0xD08F, 0x8895,
08891     0xD090, 0x8897, 0xD091, 0x8898, 0xD092, 0x8899, 0xD093, 0x889A,
08892     0xD094, 0x889B, 0xD095, 0x889D, 0xD096, 0x889E, 0xD097, 0x889F,
08893     0xD098, 0x88A0, 0xD099, 0x88A1, 0xD09A, 0x88A3, 0xD09B, 0x88A5,
08894     0xD09C, 0x88A6, 0xD09D, 0x88A7, 0xD09E, 0x88A8, 0xD09F, 0x88A9,
08895     0xD0A0, 0x88AA, 0xD0A1, 0x5C0F, 0xD0A2, 0x5B5D, 0xD0A3, 0x6821,
08896     0xD0A4, 0x8096, 0xD0A5, 0x5578, 0xD0A6, 0x7B11, 0xD0A7, 0x6548,
08897     0xD0A8, 0x6954, 0xD0A9, 0x4E9B, 0xD0AA, 0x6B47, 0xD0AB, 0x874E,
08898     0xD0AC, 0x978B, 0xD0AD, 0x534F, 0xD0AE, 0x631F, 0xD0AF, 0x643A,
08899     0xD0B0, 0x90AA, 0xD0B1, 0x659C, 0xD0B2, 0x80C1, 0xD0B3, 0x8C10,
08900     0xD0B4, 0x5199, 0xD0B5, 0x68B0, 0xD0B6, 0x5378, 0xD0B7, 0x87F9,
08901     0xD0B8, 0x61C8, 0xD0B9, 0x6CC4, 0xD0BA, 0x6CFB, 0xD0BB, 0x8C22,
08902     0xD0BC, 0x5C51, 0xD0BD, 0x85AA, 0xD0BE, 0x82AF, 0xD0BF, 0x950C,
08903     0xD0C0, 0x6B23, 0xD0C1, 0x8F9B, 0xD0C2, 0x65B0, 0xD0C3, 0x5FFB,
08904     0xD0C4, 0x5FC3, 0xD0C5, 0x4FE1, 0xD0C6, 0x8845, 0xD0C7, 0x661F,
08905     0xD0C8, 0x8165, 0xD0C9, 0x7329, 0xD0CA, 0x60FA, 0xD0CB, 0x5174,
08906     0xD0CC, 0x5211, 0xD0CD, 0x578B, 0xD0CE, 0x5F62, 0xD0CF, 0x90A2,
08907     0xD0D0, 0x884C, 0xD0D1, 0x9192, 0xD0D2, 0x5E78, 0xD0D3, 0x674F,
08908     0xD0D4, 0x6027, 0xD0D5, 0x59D3, 0xD0D6, 0x5144, 0xD0D7, 0x51F6,
08909     0xD0D8, 0x80F8, 0xD0D9, 0x5308, 0xD0DA, 0x6C79, 0xD0DB, 0x96C4,
08910     0xD0DC, 0x718A, 0xD0DD, 0x4F11, 0xD0DE, 0x4FEE, 0xD0DF, 0x7F9E,
08911     0xD0E0, 0x673D, 0xD0E1, 0x55C5, 0xD0E2, 0x9508, 0xD0E3, 0x79C0,
08912     0xD0E4, 0x8896, 0xD0E5, 0x7EE3, 0xD0E6, 0x589F, 0xD0E7, 0x620C,
08913     0xD0E8, 0x9700, 0xD0E9, 0x865A, 0xD0EA, 0x5618, 0xD0EB, 0x987B,
08914     0xD0EC, 0x5F90, 0xD0ED, 0x8BB8, 0xD0EE, 0x84C4, 0xD0EF, 0x9157,
08915     0xD0F0, 0x53D9, 0xD0F1, 0x65ED, 0xD0F2, 0x5E8F, 0xD0F3, 0x755C,
08916     0xD0F4, 0x6064, 0xD0F5, 0x7D6E, 0xD0F6, 0x5A7F, 0xD0F7, 0x7EEA,
08917     0xD0F8, 0x7EED, 0xD0F9, 0x8F69, 0xD0FA, 0x55A7, 0xD0FB, 0x5BA3,
08918     0xD0FC, 0x60AC, 0xD0FD, 0x65CB, 0xD0FE, 0x7384, 0xD140, 0x88AC,
08919     0xD141, 0x88AE, 0xD142, 0x88AF, 0xD143, 0x88B0, 0xD144, 0x88B2,
08920     0xD145, 0x88B3, 0xD146, 0x88B4, 0xD147, 0x88B5, 0xD148, 0x88B6,
08921     0xD149, 0x88B8, 0xD14A, 0x88B9, 0xD14B, 0x88BA, 0xD14C, 0x88BB,
08922     0xD14D, 0x88BD, 0xD14E, 0x88BE, 0xD14F, 0x88BF, 0xD150, 0x88C0,
08923     0xD151, 0x88C3, 0xD152, 0x88C4, 0xD153, 0x88C7, 0xD154, 0x88C8,
08924     0xD155, 0x88CA, 0xD156, 0x88CB, 0xD157, 0x88CC, 0xD158, 0x88CD,
08925     0xD159, 0x88CF, 0xD15A, 0x88D0, 0xD15B, 0x88D1, 0xD15C, 0x88D3,
08926     0xD15D, 0x88D6, 0xD15E, 0x88D7, 0xD15F, 0x88DA, 0xD160, 0x88DB,
08927     0xD161, 0x88DC, 0xD162, 0x88DD, 0xD163, 0x88DE, 0xD164, 0x88E0,
08928     0xD165, 0x88E1, 0xD166, 0x88E6, 0xD167, 0x88E7, 0xD168, 0x88E9,
08929     0xD169, 0x88EA, 0xD16A, 0x88EB, 0xD16B, 0x88EC, 0xD16C, 0x88ED,
08930     0xD16D, 0x88EE, 0xD16E, 0x88EF, 0xD16F, 0x88F2, 0xD170, 0x88F5,
08931     0xD171, 0x88F6, 0xD172, 0x88F7, 0xD173, 0x88FA, 0xD174, 0x88FB,
08932     0xD175, 0x88FD, 0xD176, 0x88FF, 0xD177, 0x8900, 0xD178, 0x8901,
08933     0xD179, 0x8903, 0xD17A, 0x8904, 0xD17B, 0x8905, 0xD17C, 0x8906,
08934     0xD17D, 0x8907, 0xD17E, 0x8908, 0xD180, 0x8909, 0xD181, 0x890B,
08935     0xD182, 0x890C, 0xD183, 0x890D, 0xD184, 0x890E, 0xD185, 0x890F,
08936     0xD186, 0x8911, 0xD187, 0x8914, 0xD188, 0x8915, 0xD189, 0x8916,
08937     0xD18A, 0x8917, 0xD18B, 0x8918, 0xD18C, 0x891C, 0xD18D, 0x891D,
08938     0xD18E, 0x891E, 0xD18F, 0x891F, 0xD190, 0x8920, 0xD191, 0x8922,
08939     0xD192, 0x8923, 0xD193, 0x8924, 0xD194, 0x8926, 0xD195, 0x8927,
08940     0xD196, 0x8928, 0xD197, 0x8929, 0xD198, 0x892C, 0xD199, 0x892D,
08941     0xD19A, 0x892E, 0xD19B, 0x892F, 0xD19C, 0x8931, 0xD19D, 0x8932,
08942     0xD19E, 0x8933, 0xD19F, 0x8935, 0xD1A0, 0x8937, 0xD1A1, 0x9009,
08943     0xD1A2, 0x7663, 0xD1A3, 0x7729, 0xD1A4, 0x7EDA, 0xD1A5, 0x9774,
08944     0xD1A6, 0x859B, 0xD1A7, 0x5B66, 0xD1A8, 0x7A74, 0xD1A9, 0x96EA,
08945     0xD1AA, 0x8840, 0xD1AB, 0x52CB, 0xD1AC, 0x718F, 0xD1AD, 0x5FAA,
08946     0xD1AE, 0x65EC, 0xD1AF, 0x8BE2, 0xD1B0, 0x5BFB, 0xD1B1, 0x9A6F,
08947     0xD1B2, 0x5DE1, 0xD1B3, 0x6B89, 0xD1B4, 0x6C5B, 0xD1B5, 0x8BAD,
08948     0xD1B6, 0x8BAF, 0xD1B7, 0x900A, 0xD1B8, 0x8FC5, 0xD1B9, 0x538B,
08949     0xD1BA, 0x62BC, 0xD1BB, 0x9E26, 0xD1BC, 0x9E2D, 0xD1BD, 0x5440,
08950     0xD1BE, 0x4E2B, 0xD1BF, 0x82BD, 0xD1C0, 0x7259, 0xD1C1, 0x869C,
08951     0xD1C2, 0x5D16, 0xD1C3, 0x8859, 0xD1C4, 0x6DAF, 0xD1C5, 0x96C5,
08952     0xD1C6, 0x54D1, 0xD1C7, 0x4E9A, 0xD1C8, 0x8BB6, 0xD1C9, 0x7109,
08953     0xD1CA, 0x54BD, 0xD1CB, 0x9609, 0xD1CC, 0x70DF, 0xD1CD, 0x6DF9,
08954     0xD1CE, 0x76D0, 0xD1CF, 0x4E25, 0xD1D0, 0x7814, 0xD1D1, 0x8712,
08955     0xD1D2, 0x5CA9, 0xD1D3, 0x5EF6, 0xD1D4, 0x8A00, 0xD1D5, 0x989C,
08956     0xD1D6, 0x960E, 0xD1D7, 0x708E, 0xD1D8, 0x6CBF, 0xD1D9, 0x5944,
08957     0xD1DA, 0x63A9, 0xD1DB, 0x773C, 0xD1DC, 0x884D, 0xD1DD, 0x6F14,
08958     0xD1DE, 0x8273, 0xD1DF, 0x5830, 0xD1E0, 0x71D5, 0xD1E1, 0x538C,
08959     0xD1E2, 0x781A, 0xD1E3, 0x96C1, 0xD1E4, 0x5501, 0xD1E5, 0x5F66,
08960     0xD1E6, 0x7130, 0xD1E7, 0x5BB4, 0xD1E8, 0x8C1A, 0xD1E9, 0x9A8C,
08961     0xD1EA, 0x6B83, 0xD1EB, 0x592E, 0xD1EC, 0x9E2F, 0xD1ED, 0x79E7,
08962     0xD1EE, 0x6768, 0xD1EF, 0x626C, 0xD1F0, 0x4F6F, 0xD1F1, 0x75A1,
08963     0xD1F2, 0x7F8A, 0xD1F3, 0x6D0B, 0xD1F4, 0x9633, 0xD1F5, 0x6C27,
08964     0xD1F6, 0x4EF0, 0xD1F7, 0x75D2, 0xD1F8, 0x517B, 0xD1F9, 0x6837,
08965     0xD1FA, 0x6F3E, 0xD1FB, 0x9080, 0xD1FC, 0x8170, 0xD1FD, 0x5996,
08966     0xD1FE, 0x7476, 0xD240, 0x8938, 0xD241, 0x8939, 0xD242, 0x893A,
08967     0xD243, 0x893B, 0xD244, 0x893C, 0xD245, 0x893D, 0xD246, 0x893E,
08968     0xD247, 0x893F, 0xD248, 0x8940, 0xD249, 0x8942, 0xD24A, 0x8943,
08969     0xD24B, 0x8945, 0xD24C, 0x8946, 0xD24D, 0x8947, 0xD24E, 0x8948,
08970     0xD24F, 0x8949, 0xD250, 0x894A, 0xD251, 0x894B, 0xD252, 0x894C,
08971     0xD253, 0x894D, 0xD254, 0x894E, 0xD255, 0x894F, 0xD256, 0x8950,
08972     0xD257, 0x8951, 0xD258, 0x8952, 0xD259, 0x8953, 0xD25A, 0x8954,
08973     0xD25B, 0x8955, 0xD25C, 0x8956, 0xD25D, 0x8957, 0xD25E, 0x8958,
08974     0xD25F, 0x8959, 0xD260, 0x895A, 0xD261, 0x895B, 0xD262, 0x895C,
08975     0xD263, 0x895D, 0xD264, 0x8960, 0xD265, 0x8961, 0xD266, 0x8962,
08976     0xD267, 0x8963, 0xD268, 0x8964, 0xD269, 0x8965, 0xD26A, 0x8967,
08977     0xD26B, 0x8968, 0xD26C, 0x8969, 0xD26D, 0x896A, 0xD26E, 0x896B,
08978     0xD26F, 0x896C, 0xD270, 0x896D, 0xD271, 0x896E, 0xD272, 0x896F,
08979     0xD273, 0x8970, 0xD274, 0x8971, 0xD275, 0x8972, 0xD276, 0x8973,
08980     0xD277, 0x8974, 0xD278, 0x8975, 0xD279, 0x8976, 0xD27A, 0x8977,
08981     0xD27B, 0x8978, 0xD27C, 0x8979, 0xD27D, 0x897A, 0xD27E, 0x897C,
08982     0xD280, 0x897D, 0xD281, 0x897E, 0xD282, 0x8980, 0xD283, 0x8982,
08983     0xD284, 0x8984, 0xD285, 0x8985, 0xD286, 0x8987, 0xD287, 0x8988,
08984     0xD288, 0x8989, 0xD289, 0x898A, 0xD28A, 0x898B, 0xD28B, 0x898C,
08985     0xD28C, 0x898D, 0xD28D, 0x898E, 0xD28E, 0x898F, 0xD28F, 0x8990,
08986     0xD290, 0x8991, 0xD291, 0x8992, 0xD292, 0x8993, 0xD293, 0x8994,
08987     0xD294, 0x8995, 0xD295, 0x8996, 0xD296, 0x8997, 0xD297, 0x8998,
08988     0xD298, 0x8999, 0xD299, 0x899A, 0xD29A, 0x899B, 0xD29B, 0x899C,
08989     0xD29C, 0x899D, 0xD29D, 0x899E, 0xD29E, 0x899F, 0xD29F, 0x89A0,
08990     0xD2A0, 0x89A1, 0xD2A1, 0x6447, 0xD2A2, 0x5C27, 0xD2A3, 0x9065,
08991     0xD2A4, 0x7A91, 0xD2A5, 0x8C23, 0xD2A6, 0x59DA, 0xD2A7, 0x54AC,
08992     0xD2A8, 0x8200, 0xD2A9, 0x836F, 0xD2AA, 0x8981, 0xD2AB, 0x8000,
08993     0xD2AC, 0x6930, 0xD2AD, 0x564E, 0xD2AE, 0x8036, 0xD2AF, 0x7237,
08994     0xD2B0, 0x91CE, 0xD2B1, 0x51B6, 0xD2B2, 0x4E5F, 0xD2B3, 0x9875,
08995     0xD2B4, 0x6396, 0xD2B5, 0x4E1A, 0xD2B6, 0x53F6, 0xD2B7, 0x66F3,
08996     0xD2B8, 0x814B, 0xD2B9, 0x591C, 0xD2BA, 0x6DB2, 0xD2BB, 0x4E00,
08997     0xD2BC, 0x58F9, 0xD2BD, 0x533B, 0xD2BE, 0x63D6, 0xD2BF, 0x94F1,
08998     0xD2C0, 0x4F9D, 0xD2C1, 0x4F0A, 0xD2C2, 0x8863, 0xD2C3, 0x9890,
08999     0xD2C4, 0x5937, 0xD2C5, 0x9057, 0xD2C6, 0x79FB, 0xD2C7, 0x4EEA,
09000     0xD2C8, 0x80F0, 0xD2C9, 0x7591, 0xD2CA, 0x6C82, 0xD2CB, 0x5B9C,
09001     0xD2CC, 0x59E8, 0xD2CD, 0x5F5D, 0xD2CE, 0x6905, 0xD2CF, 0x8681,
09002     0xD2D0, 0x501A, 0xD2D1, 0x5DF2, 0xD2D2, 0x4E59, 0xD2D3, 0x77E3,
09003     0xD2D4, 0x4EE5, 0xD2D5, 0x827A, 0xD2D6, 0x6291, 0xD2D7, 0x6613,
09004     0xD2D8, 0x9091, 0xD2D9, 0x5C79, 0xD2DA, 0x4EBF, 0xD2DB, 0x5F79,
09005     0xD2DC, 0x81C6, 0xD2DD, 0x9038, 0xD2DE, 0x8084, 0xD2DF, 0x75AB,
09006     0xD2E0, 0x4EA6, 0xD2E1, 0x88D4, 0xD2E2, 0x610F, 0xD2E3, 0x6BC5,
09007     0xD2E4, 0x5FC6, 0xD2E5, 0x4E49, 0xD2E6, 0x76CA, 0xD2E7, 0x6EA2,
09008     0xD2E8, 0x8BE3, 0xD2E9, 0x8BAE, 0xD2EA, 0x8C0A, 0xD2EB, 0x8BD1,
09009     0xD2EC, 0x5F02, 0xD2ED, 0x7FFC, 0xD2EE, 0x7FCC, 0xD2EF, 0x7ECE,
09010     0xD2F0, 0x8335, 0xD2F1, 0x836B, 0xD2F2, 0x56E0, 0xD2F3, 0x6BB7,
09011     0xD2F4, 0x97F3, 0xD2F5, 0x9634, 0xD2F6, 0x59FB, 0xD2F7, 0x541F,
09012     0xD2F8, 0x94F6, 0xD2F9, 0x6DEB, 0xD2FA, 0x5BC5, 0xD2FB, 0x996E,
09013     0xD2FC, 0x5C39, 0xD2FD, 0x5F15, 0xD2FE, 0x9690, 0xD340, 0x89A2,
09014     0xD341, 0x89A3, 0xD342, 0x89A4, 0xD343, 0x89A5, 0xD344, 0x89A6,
09015     0xD345, 0x89A7, 0xD346, 0x89A8, 0xD347, 0x89A9, 0xD348, 0x89AA,
09016     0xD349, 0x89AB, 0xD34A, 0x89AC, 0xD34B, 0x89AD, 0xD34C, 0x89AE,
09017     0xD34D, 0x89AF, 0xD34E, 0x89B0, 0xD34F, 0x89B1, 0xD350, 0x89B2,
09018     0xD351, 0x89B3, 0xD352, 0x89B4, 0xD353, 0x89B5, 0xD354, 0x89B6,
09019     0xD355, 0x89B7, 0xD356, 0x89B8, 0xD357, 0x89B9, 0xD358, 0x89BA,
09020     0xD359, 0x89BB, 0xD35A, 0x89BC, 0xD35B, 0x89BD, 0xD35C, 0x89BE,
09021     0xD35D, 0x89BF, 0xD35E, 0x89C0, 0xD35F, 0x89C3, 0xD360, 0x89CD,
09022     0xD361, 0x89D3, 0xD362, 0x89D4, 0xD363, 0x89D5, 0xD364, 0x89D7,
09023     0xD365, 0x89D8, 0xD366, 0x89D9, 0xD367, 0x89DB, 0xD368, 0x89DD,
09024     0xD369, 0x89DF, 0xD36A, 0x89E0, 0xD36B, 0x89E1, 0xD36C, 0x89E2,
09025     0xD36D, 0x89E4, 0xD36E, 0x89E7, 0xD36F, 0x89E8, 0xD370, 0x89E9,
09026     0xD371, 0x89EA, 0xD372, 0x89EC, 0xD373, 0x89ED, 0xD374, 0x89EE,
09027     0xD375, 0x89F0, 0xD376, 0x89F1, 0xD377, 0x89F2, 0xD378, 0x89F4,
09028     0xD379, 0x89F5, 0xD37A, 0x89F6, 0xD37B, 0x89F7, 0xD37C, 0x89F8,
09029     0xD37D, 0x89F9, 0xD37E, 0x89FA, 0xD380, 0x89FB, 0xD381, 0x89FC,
09030     0xD382, 0x89FD, 0xD383, 0x89FE, 0xD384, 0x89FF, 0xD385, 0x8A01,
09031     0xD386, 0x8A02, 0xD387, 0x8A03, 0xD388, 0x8A04, 0xD389, 0x8A05,
09032     0xD38A, 0x8A06, 0xD38B, 0x8A08, 0xD38C, 0x8A09, 0xD38D, 0x8A0A,
09033     0xD38E, 0x8A0B, 0xD38F, 0x8A0C, 0xD390, 0x8A0D, 0xD391, 0x8A0E,
09034     0xD392, 0x8A0F, 0xD393, 0x8A10, 0xD394, 0x8A11, 0xD395, 0x8A12,
09035     0xD396, 0x8A13, 0xD397, 0x8A14, 0xD398, 0x8A15, 0xD399, 0x8A16,
09036     0xD39A, 0x8A17, 0xD39B, 0x8A18, 0xD39C, 0x8A19, 0xD39D, 0x8A1A,
09037     0xD39E, 0x8A1B, 0xD39F, 0x8A1C, 0xD3A0, 0x8A1D, 0xD3A1, 0x5370,
09038     0xD3A2, 0x82F1, 0xD3A3, 0x6A31, 0xD3A4, 0x5A74, 0xD3A5, 0x9E70,
09039     0xD3A6, 0x5E94, 0xD3A7, 0x7F28, 0xD3A8, 0x83B9, 0xD3A9, 0x8424,
09040     0xD3AA, 0x8425, 0xD3AB, 0x8367, 0xD3AC, 0x8747, 0xD3AD, 0x8FCE,
09041     0xD3AE, 0x8D62, 0xD3AF, 0x76C8, 0xD3B0, 0x5F71, 0xD3B1, 0x9896,
09042     0xD3B2, 0x786C, 0xD3B3, 0x6620, 0xD3B4, 0x54DF, 0xD3B5, 0x62E5,
09043     0xD3B6, 0x4F63, 0xD3B7, 0x81C3, 0xD3B8, 0x75C8, 0xD3B9, 0x5EB8,
09044     0xD3BA, 0x96CD, 0xD3BB, 0x8E0A, 0xD3BC, 0x86F9, 0xD3BD, 0x548F,
09045     0xD3BE, 0x6CF3, 0xD3BF, 0x6D8C, 0xD3C0, 0x6C38, 0xD3C1, 0x607F,
09046     0xD3C2, 0x52C7, 0xD3C3, 0x7528, 0xD3C4, 0x5E7D, 0xD3C5, 0x4F18,
09047     0xD3C6, 0x60A0, 0xD3C7, 0x5FE7, 0xD3C8, 0x5C24, 0xD3C9, 0x7531,
09048     0xD3CA, 0x90AE, 0xD3CB, 0x94C0, 0xD3CC, 0x72B9, 0xD3CD, 0x6CB9,
09049     0xD3CE, 0x6E38, 0xD3CF, 0x9149, 0xD3D0, 0x6709, 0xD3D1, 0x53CB,
09050     0xD3D2, 0x53F3, 0xD3D3, 0x4F51, 0xD3D4, 0x91C9, 0xD3D5, 0x8BF1,
09051     0xD3D6, 0x53C8, 0xD3D7, 0x5E7C, 0xD3D8, 0x8FC2, 0xD3D9, 0x6DE4,
09052     0xD3DA, 0x4E8E, 0xD3DB, 0x76C2, 0xD3DC, 0x6986, 0xD3DD, 0x865E,
09053     0xD3DE, 0x611A, 0xD3DF, 0x8206, 0xD3E0, 0x4F59, 0xD3E1, 0x4FDE,
09054     0xD3E2, 0x903E, 0xD3E3, 0x9C7C, 0xD3E4, 0x6109, 0xD3E5, 0x6E1D,
09055     0xD3E6, 0x6E14, 0xD3E7, 0x9685, 0xD3E8, 0x4E88, 0xD3E9, 0x5A31,
09056     0xD3EA, 0x96E8, 0xD3EB, 0x4E0E, 0xD3EC, 0x5C7F, 0xD3ED, 0x79B9,
09057     0xD3EE, 0x5B87, 0xD3EF, 0x8BED, 0xD3F0, 0x7FBD, 0xD3F1, 0x7389,
09058     0xD3F2, 0x57DF, 0xD3F3, 0x828B, 0xD3F4, 0x90C1, 0xD3F5, 0x5401,
09059     0xD3F6, 0x9047, 0xD3F7, 0x55BB, 0xD3F8, 0x5CEA, 0xD3F9, 0x5FA1,
09060     0xD3FA, 0x6108, 0xD3FB, 0x6B32, 0xD3FC, 0x72F1, 0xD3FD, 0x80B2,
09061     0xD3FE, 0x8A89, 0xD440, 0x8A1E, 0xD441, 0x8A1F, 0xD442, 0x8A20,
09062     0xD443, 0x8A21, 0xD444, 0x8A22, 0xD445, 0x8A23, 0xD446, 0x8A24,
09063     0xD447, 0x8A25, 0xD448, 0x8A26, 0xD449, 0x8A27, 0xD44A, 0x8A28,
09064     0xD44B, 0x8A29, 0xD44C, 0x8A2A, 0xD44D, 0x8A2B, 0xD44E, 0x8A2C,
09065     0xD44F, 0x8A2D, 0xD450, 0x8A2E, 0xD451, 0x8A2F, 0xD452, 0x8A30,
09066     0xD453, 0x8A31, 0xD454, 0x8A32, 0xD455, 0x8A33, 0xD456, 0x8A34,
09067     0xD457, 0x8A35, 0xD458, 0x8A36, 0xD459, 0x8A37, 0xD45A, 0x8A38,
09068     0xD45B, 0x8A39, 0xD45C, 0x8A3A, 0xD45D, 0x8A3B, 0xD45E, 0x8A3C,
09069     0xD45F, 0x8A3D, 0xD460, 0x8A3F, 0xD461, 0x8A40, 0xD462, 0x8A41,
09070     0xD463, 0x8A42, 0xD464, 0x8A43, 0xD465, 0x8A44, 0xD466, 0x8A45,
09071     0xD467, 0x8A46, 0xD468, 0x8A47, 0xD469, 0x8A49, 0xD46A, 0x8A4A,
09072     0xD46B, 0x8A4B, 0xD46C, 0x8A4C, 0xD46D, 0x8A4D, 0xD46E, 0x8A4E,
09073     0xD46F, 0x8A4F, 0xD470, 0x8A50, 0xD471, 0x8A51, 0xD472, 0x8A52,
09074     0xD473, 0x8A53, 0xD474, 0x8A54, 0xD475, 0x8A55, 0xD476, 0x8A56,
09075     0xD477, 0x8A57, 0xD478, 0x8A58, 0xD479, 0x8A59, 0xD47A, 0x8A5A,
09076     0xD47B, 0x8A5B, 0xD47C, 0x8A5C, 0xD47D, 0x8A5D, 0xD47E, 0x8A5E,
09077     0xD480, 0x8A5F, 0xD481, 0x8A60, 0xD482, 0x8A61, 0xD483, 0x8A62,
09078     0xD484, 0x8A63, 0xD485, 0x8A64, 0xD486, 0x8A65, 0xD487, 0x8A66,
09079     0xD488, 0x8A67, 0xD489, 0x8A68, 0xD48A, 0x8A69, 0xD48B, 0x8A6A,
09080     0xD48C, 0x8A6B, 0xD48D, 0x8A6C, 0xD48E, 0x8A6D, 0xD48F, 0x8A6E,
09081     0xD490, 0x8A6F, 0xD491, 0x8A70, 0xD492, 0x8A71, 0xD493, 0x8A72,
09082     0xD494, 0x8A73, 0xD495, 0x8A74, 0xD496, 0x8A75, 0xD497, 0x8A76,
09083     0xD498, 0x8A77, 0xD499, 0x8A78, 0xD49A, 0x8A7A, 0xD49B, 0x8A7B,
09084     0xD49C, 0x8A7C, 0xD49D, 0x8A7D, 0xD49E, 0x8A7E, 0xD49F, 0x8A7F,
09085     0xD4A0, 0x8A80, 0xD4A1, 0x6D74, 0xD4A2, 0x5BD3, 0xD4A3, 0x88D5,
09086     0xD4A4, 0x9884, 0xD4A5, 0x8C6B, 0xD4A6, 0x9A6D, 0xD4A7, 0x9E33,
09087     0xD4A8, 0x6E0A, 0xD4A9, 0x51A4, 0xD4AA, 0x5143, 0xD4AB, 0x57A3,
09088     0xD4AC, 0x8881, 0xD4AD, 0x539F, 0xD4AE, 0x63F4, 0xD4AF, 0x8F95,
09089     0xD4B0, 0x56ED, 0xD4B1, 0x5458, 0xD4B2, 0x5706, 0xD4B3, 0x733F,
09090     0xD4B4, 0x6E90, 0xD4B5, 0x7F18, 0xD4B6, 0x8FDC, 0xD4B7, 0x82D1,
09091     0xD4B8, 0x613F, 0xD4B9, 0x6028, 0xD4BA, 0x9662, 0xD4BB, 0x66F0,
09092     0xD4BC, 0x7EA6, 0xD4BD, 0x8D8A, 0xD4BE, 0x8DC3, 0xD4BF, 0x94A5,
09093     0xD4C0, 0x5CB3, 0xD4C1, 0x7CA4, 0xD4C2, 0x6708, 0xD4C3, 0x60A6,
09094     0xD4C4, 0x9605, 0xD4C5, 0x8018, 0xD4C6, 0x4E91, 0xD4C7, 0x90E7,
09095     0xD4C8, 0x5300, 0xD4C9, 0x9668, 0xD4CA, 0x5141, 0xD4CB, 0x8FD0,
09096     0xD4CC, 0x8574, 0xD4CD, 0x915D, 0xD4CE, 0x6655, 0xD4CF, 0x97F5,
09097     0xD4D0, 0x5B55, 0xD4D1, 0x531D, 0xD4D2, 0x7838, 0xD4D3, 0x6742,
09098     0xD4D4, 0x683D, 0xD4D5, 0x54C9, 0xD4D6, 0x707E, 0xD4D7, 0x5BB0,
09099     0xD4D8, 0x8F7D, 0xD4D9, 0x518D, 0xD4DA, 0x5728, 0xD4DB, 0x54B1,
09100     0xD4DC, 0x6512, 0xD4DD, 0x6682, 0xD4DE, 0x8D5E, 0xD4DF, 0x8D43,
09101     0xD4E0, 0x810F, 0xD4E1, 0x846C, 0xD4E2, 0x906D, 0xD4E3, 0x7CDF,
09102     0xD4E4, 0x51FF, 0xD4E5, 0x85FB, 0xD4E6, 0x67A3, 0xD4E7, 0x65E9,
09103     0xD4E8, 0x6FA1, 0xD4E9, 0x86A4, 0xD4EA, 0x8E81, 0xD4EB, 0x566A,
09104     0xD4EC, 0x9020, 0xD4ED, 0x7682, 0xD4EE, 0x7076, 0xD4EF, 0x71E5,
09105     0xD4F0, 0x8D23, 0xD4F1, 0x62E9, 0xD4F2, 0x5219, 0xD4F3, 0x6CFD,
09106     0xD4F4, 0x8D3C, 0xD4F5, 0x600E, 0xD4F6, 0x589E, 0xD4F7, 0x618E,
09107     0xD4F8, 0x66FE, 0xD4F9, 0x8D60, 0xD4FA, 0x624E, 0xD4FB, 0x55B3,
09108     0xD4FC, 0x6E23, 0xD4FD, 0x672D, 0xD4FE, 0x8F67, 0xD540, 0x8A81,
09109     0xD541, 0x8A82, 0xD542, 0x8A83, 0xD543, 0x8A84, 0xD544, 0x8A85,
09110     0xD545, 0x8A86, 0xD546, 0x8A87, 0xD547, 0x8A88, 0xD548, 0x8A8B,
09111     0xD549, 0x8A8C, 0xD54A, 0x8A8D, 0xD54B, 0x8A8E, 0xD54C, 0x8A8F,
09112     0xD54D, 0x8A90, 0xD54E, 0x8A91, 0xD54F, 0x8A92, 0xD550, 0x8A94,
09113     0xD551, 0x8A95, 0xD552, 0x8A96, 0xD553, 0x8A97, 0xD554, 0x8A98,
09114     0xD555, 0x8A99, 0xD556, 0x8A9A, 0xD557, 0x8A9B, 0xD558, 0x8A9C,
09115     0xD559, 0x8A9D, 0xD55A, 0x8A9E, 0xD55B, 0x8A9F, 0xD55C, 0x8AA0,
09116     0xD55D, 0x8AA1, 0xD55E, 0x8AA2, 0xD55F, 0x8AA3, 0xD560, 0x8AA4,
09117     0xD561, 0x8AA5, 0xD562, 0x8AA6, 0xD563, 0x8AA7, 0xD564, 0x8AA8,
09118     0xD565, 0x8AA9, 0xD566, 0x8AAA, 0xD567, 0x8AAB, 0xD568, 0x8AAC,
09119     0xD569, 0x8AAD, 0xD56A, 0x8AAE, 0xD56B, 0x8AAF, 0xD56C, 0x8AB0,
09120     0xD56D, 0x8AB1, 0xD56E, 0x8AB2, 0xD56F, 0x8AB3, 0xD570, 0x8AB4,
09121     0xD571, 0x8AB5, 0xD572, 0x8AB6, 0xD573, 0x8AB7, 0xD574, 0x8AB8,
09122     0xD575, 0x8AB9, 0xD576, 0x8ABA, 0xD577, 0x8ABB, 0xD578, 0x8ABC,
09123     0xD579, 0x8ABD, 0xD57A, 0x8ABE, 0xD57B, 0x8ABF, 0xD57C, 0x8AC0,
09124     0xD57D, 0x8AC1, 0xD57E, 0x8AC2, 0xD580, 0x8AC3, 0xD581, 0x8AC4,
09125     0xD582, 0x8AC5, 0xD583, 0x8AC6, 0xD584, 0x8AC7, 0xD585, 0x8AC8,
09126     0xD586, 0x8AC9, 0xD587, 0x8ACA, 0xD588, 0x8ACB, 0xD589, 0x8ACC,
09127     0xD58A, 0x8ACD, 0xD58B, 0x8ACE, 0xD58C, 0x8ACF, 0xD58D, 0x8AD0,
09128     0xD58E, 0x8AD1, 0xD58F, 0x8AD2, 0xD590, 0x8AD3, 0xD591, 0x8AD4,
09129     0xD592, 0x8AD5, 0xD593, 0x8AD6, 0xD594, 0x8AD7, 0xD595, 0x8AD8,
09130     0xD596, 0x8AD9, 0xD597, 0x8ADA, 0xD598, 0x8ADB, 0xD599, 0x8ADC,
09131     0xD59A, 0x8ADD, 0xD59B, 0x8ADE, 0xD59C, 0x8ADF, 0xD59D, 0x8AE0,
09132     0xD59E, 0x8AE1, 0xD59F, 0x8AE2, 0xD5A0, 0x8AE3, 0xD5A1, 0x94E1,
09133     0xD5A2, 0x95F8, 0xD5A3, 0x7728, 0xD5A4, 0x6805, 0xD5A5, 0x69A8,
09134     0xD5A6, 0x548B, 0xD5A7, 0x4E4D, 0xD5A8, 0x70B8, 0xD5A9, 0x8BC8,
09135     0xD5AA, 0x6458, 0xD5AB, 0x658B, 0xD5AC, 0x5B85, 0xD5AD, 0x7A84,
09136     0xD5AE, 0x503A, 0xD5AF, 0x5BE8, 0xD5B0, 0x77BB, 0xD5B1, 0x6BE1,
09137     0xD5B2, 0x8A79, 0xD5B3, 0x7C98, 0xD5B4, 0x6CBE, 0xD5B5, 0x76CF,
09138     0xD5B6, 0x65A9, 0xD5B7, 0x8F97, 0xD5B8, 0x5D2D, 0xD5B9, 0x5C55,
09139     0xD5BA, 0x8638, 0xD5BB, 0x6808, 0xD5BC, 0x5360, 0xD5BD, 0x6218,
09140     0xD5BE, 0x7AD9, 0xD5BF, 0x6E5B, 0xD5C0, 0x7EFD, 0xD5C1, 0x6A1F,
09141     0xD5C2, 0x7AE0, 0xD5C3, 0x5F70, 0xD5C4, 0x6F33, 0xD5C5, 0x5F20,
09142     0xD5C6, 0x638C, 0xD5C7, 0x6DA8, 0xD5C8, 0x6756, 0xD5C9, 0x4E08,
09143     0xD5CA, 0x5E10, 0xD5CB, 0x8D26, 0xD5CC, 0x4ED7, 0xD5CD, 0x80C0,
09144     0xD5CE, 0x7634, 0xD5CF, 0x969C, 0xD5D0, 0x62DB, 0xD5D1, 0x662D,
09145     0xD5D2, 0x627E, 0xD5D3, 0x6CBC, 0xD5D4, 0x8D75, 0xD5D5, 0x7167,
09146     0xD5D6, 0x7F69, 0xD5D7, 0x5146, 0xD5D8, 0x8087, 0xD5D9, 0x53EC,
09147     0xD5DA, 0x906E, 0xD5DB, 0x6298, 0xD5DC, 0x54F2, 0xD5DD, 0x86F0,
09148     0xD5DE, 0x8F99, 0xD5DF, 0x8005, 0xD5E0, 0x9517, 0xD5E1, 0x8517,
09149     0xD5E2, 0x8FD9, 0xD5E3, 0x6D59, 0xD5E4, 0x73CD, 0xD5E5, 0x659F,
09150     0xD5E6, 0x771F, 0xD5E7, 0x7504, 0xD5E8, 0x7827, 0xD5E9, 0x81FB,
09151     0xD5EA, 0x8D1E, 0xD5EB, 0x9488, 0xD5EC, 0x4FA6, 0xD5ED, 0x6795,
09152     0xD5EE, 0x75B9, 0xD5EF, 0x8BCA, 0xD5F0, 0x9707, 0xD5F1, 0x632F,
09153     0xD5F2, 0x9547, 0xD5F3, 0x9635, 0xD5F4, 0x84B8, 0xD5F5, 0x6323,
09154     0xD5F6, 0x7741, 0xD5F7, 0x5F81, 0xD5F8, 0x72F0, 0xD5F9, 0x4E89,
09155     0xD5FA, 0x6014, 0xD5FB, 0x6574, 0xD5FC, 0x62EF, 0xD5FD, 0x6B63,
09156     0xD5FE, 0x653F, 0xD640, 0x8AE4, 0xD641, 0x8AE5, 0xD642, 0x8AE6,
09157     0xD643, 0x8AE7, 0xD644, 0x8AE8, 0xD645, 0x8AE9, 0xD646, 0x8AEA,
09158     0xD647, 0x8AEB, 0xD648, 0x8AEC, 0xD649, 0x8AED, 0xD64A, 0x8AEE,
09159     0xD64B, 0x8AEF, 0xD64C, 0x8AF0, 0xD64D, 0x8AF1, 0xD64E, 0x8AF2,
09160     0xD64F, 0x8AF3, 0xD650, 0x8AF4, 0xD651, 0x8AF5, 0xD652, 0x8AF6,
09161     0xD653, 0x8AF7, 0xD654, 0x8AF8, 0xD655, 0x8AF9, 0xD656, 0x8AFA,
09162     0xD657, 0x8AFB, 0xD658, 0x8AFC, 0xD659, 0x8AFD, 0xD65A, 0x8AFE,
09163     0xD65B, 0x8AFF, 0xD65C, 0x8B00, 0xD65D, 0x8B01, 0xD65E, 0x8B02,
09164     0xD65F, 0x8B03, 0xD660, 0x8B04, 0xD661, 0x8B05, 0xD662, 0x8B06,
09165     0xD663, 0x8B08, 0xD664, 0x8B09, 0xD665, 0x8B0A, 0xD666, 0x8B0B,
09166     0xD667, 0x8B0C, 0xD668, 0x8B0D, 0xD669, 0x8B0E, 0xD66A, 0x8B0F,
09167     0xD66B, 0x8B10, 0xD66C, 0x8B11, 0xD66D, 0x8B12, 0xD66E, 0x8B13,
09168     0xD66F, 0x8B14, 0xD670, 0x8B15, 0xD671, 0x8B16, 0xD672, 0x8B17,
09169     0xD673, 0x8B18, 0xD674, 0x8B19, 0xD675, 0x8B1A, 0xD676, 0x8B1B,
09170     0xD677, 0x8B1C, 0xD678, 0x8B1D, 0xD679, 0x8B1E, 0xD67A, 0x8B1F,
09171     0xD67B, 0x8B20, 0xD67C, 0x8B21, 0xD67D, 0x8B22, 0xD67E, 0x8B23,
09172     0xD680, 0x8B24, 0xD681, 0x8B25, 0xD682, 0x8B27, 0xD683, 0x8B28,
09173     0xD684, 0x8B29, 0xD685, 0x8B2A, 0xD686, 0x8B2B, 0xD687, 0x8B2C,
09174     0xD688, 0x8B2D, 0xD689, 0x8B2E, 0xD68A, 0x8B2F, 0xD68B, 0x8B30,
09175     0xD68C, 0x8B31, 0xD68D, 0x8B32, 0xD68E, 0x8B33, 0xD68F, 0x8B34,
09176     0xD690, 0x8B35, 0xD691, 0x8B36, 0xD692, 0x8B37, 0xD693, 0x8B38,
09177     0xD694, 0x8B39, 0xD695, 0x8B3A, 0xD696, 0x8B3B, 0xD697, 0x8B3C,
09178     0xD698, 0x8B3D, 0xD699, 0x8B3E, 0xD69A, 0x8B3F, 0xD69B, 0x8B40,
09179     0xD69C, 0x8B41, 0xD69D, 0x8B42, 0xD69E, 0x8B43, 0xD69F, 0x8B44,
09180     0xD6A0, 0x8B45, 0xD6A1, 0x5E27, 0xD6A2, 0x75C7, 0xD6A3, 0x90D1,
09181     0xD6A4, 0x8BC1, 0xD6A5, 0x829D, 0xD6A6, 0x679D, 0xD6A7, 0x652F,
09182     0xD6A8, 0x5431, 0xD6A9, 0x8718, 0xD6AA, 0x77E5, 0xD6AB, 0x80A2,
09183     0xD6AC, 0x8102, 0xD6AD, 0x6C41, 0xD6AE, 0x4E4B, 0xD6AF, 0x7EC7,
09184     0xD6B0, 0x804C, 0xD6B1, 0x76F4, 0xD6B2, 0x690D, 0xD6B3, 0x6B96,
09185     0xD6B4, 0x6267, 0xD6B5, 0x503C, 0xD6B6, 0x4F84, 0xD6B7, 0x5740,
09186     0xD6B8, 0x6307, 0xD6B9, 0x6B62, 0xD6BA, 0x8DBE, 0xD6BB, 0x53EA,
09187     0xD6BC, 0x65E8, 0xD6BD, 0x7EB8, 0xD6BE, 0x5FD7, 0xD6BF, 0x631A,
09188     0xD6C0, 0x63B7, 0xD6C1, 0x81F3, 0xD6C2, 0x81F4, 0xD6C3, 0x7F6E,
09189     0xD6C4, 0x5E1C, 0xD6C5, 0x5CD9, 0xD6C6, 0x5236, 0xD6C7, 0x667A,
09190     0xD6C8, 0x79E9, 0xD6C9, 0x7A1A, 0xD6CA, 0x8D28, 0xD6CB, 0x7099,
09191     0xD6CC, 0x75D4, 0xD6CD, 0x6EDE, 0xD6CE, 0x6CBB, 0xD6CF, 0x7A92,
09192     0xD6D0, 0x4E2D, 0xD6D1, 0x76C5, 0xD6D2, 0x5FE0, 0xD6D3, 0x949F,
09193     0xD6D4, 0x8877, 0xD6D5, 0x7EC8, 0xD6D6, 0x79CD, 0xD6D7, 0x80BF,
09194     0xD6D8, 0x91CD, 0xD6D9, 0x4EF2, 0xD6DA, 0x4F17, 0xD6DB, 0x821F,
09195     0xD6DC, 0x5468, 0xD6DD, 0x5DDE, 0xD6DE, 0x6D32, 0xD6DF, 0x8BCC,
09196     0xD6E0, 0x7CA5, 0xD6E1, 0x8F74, 0xD6E2, 0x8098, 0xD6E3, 0x5E1A,
09197     0xD6E4, 0x5492, 0xD6E5, 0x76B1, 0xD6E6, 0x5B99, 0xD6E7, 0x663C,
09198     0xD6E8, 0x9AA4, 0xD6E9, 0x73E0, 0xD6EA, 0x682A, 0xD6EB, 0x86DB,
09199     0xD6EC, 0x6731, 0xD6ED, 0x732A, 0xD6EE, 0x8BF8, 0xD6EF, 0x8BDB,
09200     0xD6F0, 0x9010, 0xD6F1, 0x7AF9, 0xD6F2, 0x70DB, 0xD6F3, 0x716E,
09201     0xD6F4, 0x62C4, 0xD6F5, 0x77A9, 0xD6F6, 0x5631, 0xD6F7, 0x4E3B,
09202     0xD6F8, 0x8457, 0xD6F9, 0x67F1, 0xD6FA, 0x52A9, 0xD6FB, 0x86C0,
09203     0xD6FC, 0x8D2E, 0xD6FD, 0x94F8, 0xD6FE, 0x7B51, 0xD740, 0x8B46,
09204     0xD741, 0x8B47, 0xD742, 0x8B48, 0xD743, 0x8B49, 0xD744, 0x8B4A,
09205     0xD745, 0x8B4B, 0xD746, 0x8B4C, 0xD747, 0x8B4D, 0xD748, 0x8B4E,
09206     0xD749, 0x8B4F, 0xD74A, 0x8B50, 0xD74B, 0x8B51, 0xD74C, 0x8B52,
09207     0xD74D, 0x8B53, 0xD74E, 0x8B54, 0xD74F, 0x8B55, 0xD750, 0x8B56,
09208     0xD751, 0x8B57, 0xD752, 0x8B58, 0xD753, 0x8B59, 0xD754, 0x8B5A,
09209     0xD755, 0x8B5B, 0xD756, 0x8B5C, 0xD757, 0x8B5D, 0xD758, 0x8B5E,
09210     0xD759, 0x8B5F, 0xD75A, 0x8B60, 0xD75B, 0x8B61, 0xD75C, 0x8B62,
09211     0xD75D, 0x8B63, 0xD75E, 0x8B64, 0xD75F, 0x8B65, 0xD760, 0x8B67,
09212     0xD761, 0x8B68, 0xD762, 0x8B69, 0xD763, 0x8B6A, 0xD764, 0x8B6B,
09213     0xD765, 0x8B6D, 0xD766, 0x8B6E, 0xD767, 0x8B6F, 0xD768, 0x8B70,
09214     0xD769, 0x8B71, 0xD76A, 0x8B72, 0xD76B, 0x8B73, 0xD76C, 0x8B74,
09215     0xD76D, 0x8B75, 0xD76E, 0x8B76, 0xD76F, 0x8B77, 0xD770, 0x8B78,
09216     0xD771, 0x8B79, 0xD772, 0x8B7A, 0xD773, 0x8B7B, 0xD774, 0x8B7C,
09217     0xD775, 0x8B7D, 0xD776, 0x8B7E, 0xD777, 0x8B7F, 0xD778, 0x8B80,
09218     0xD779, 0x8B81, 0xD77A, 0x8B82, 0xD77B, 0x8B83, 0xD77C, 0x8B84,
09219     0xD77D, 0x8B85, 0xD77E, 0x8B86, 0xD780, 0x8B87, 0xD781, 0x8B88,
09220     0xD782, 0x8B89, 0xD783, 0x8B8A, 0xD784, 0x8B8B, 0xD785, 0x8B8C,
09221     0xD786, 0x8B8D, 0xD787, 0x8B8E, 0xD788, 0x8B8F, 0xD789, 0x8B90,
09222     0xD78A, 0x8B91, 0xD78B, 0x8B92, 0xD78C, 0x8B93, 0xD78D, 0x8B94,
09223     0xD78E, 0x8B95, 0xD78F, 0x8B96, 0xD790, 0x8B97, 0xD791, 0x8B98,
09224     0xD792, 0x8B99, 0xD793, 0x8B9A, 0xD794, 0x8B9B, 0xD795, 0x8B9C,
09225     0xD796, 0x8B9D, 0xD797, 0x8B9E, 0xD798, 0x8B9F, 0xD799, 0x8BAC,
09226     0xD79A, 0x8BB1, 0xD79B, 0x8BBB, 0xD79C, 0x8BC7, 0xD79D, 0x8BD0,
09227     0xD79E, 0x8BEA, 0xD79F, 0x8C09, 0xD7A0, 0x8C1E, 0xD7A1, 0x4F4F,
09228     0xD7A2, 0x6CE8, 0xD7A3, 0x795D, 0xD7A4, 0x9A7B, 0xD7A5, 0x6293,
09229     0xD7A6, 0x722A, 0xD7A7, 0x62FD, 0xD7A8, 0x4E13, 0xD7A9, 0x7816,
09230     0xD7AA, 0x8F6C, 0xD7AB, 0x64B0, 0xD7AC, 0x8D5A, 0xD7AD, 0x7BC6,
09231     0xD7AE, 0x6869, 0xD7AF, 0x5E84, 0xD7B0, 0x88C5, 0xD7B1, 0x5986,
09232     0xD7B2, 0x649E, 0xD7B3, 0x58EE, 0xD7B4, 0x72B6, 0xD7B5, 0x690E,
09233     0xD7B6, 0x9525, 0xD7B7, 0x8FFD, 0xD7B8, 0x8D58, 0xD7B9, 0x5760,
09234     0xD7BA, 0x7F00, 0xD7BB, 0x8C06, 0xD7BC, 0x51C6, 0xD7BD, 0x6349,
09235     0xD7BE, 0x62D9, 0xD7BF, 0x5353, 0xD7C0, 0x684C, 0xD7C1, 0x7422,
09236     0xD7C2, 0x8301, 0xD7C3, 0x914C, 0xD7C4, 0x5544, 0xD7C5, 0x7740,
09237     0xD7C6, 0x707C, 0xD7C7, 0x6D4A, 0xD7C8, 0x5179, 0xD7C9, 0x54A8,
09238     0xD7CA, 0x8D44, 0xD7CB, 0x59FF, 0xD7CC, 0x6ECB, 0xD7CD, 0x6DC4,
09239     0xD7CE, 0x5B5C, 0xD7CF, 0x7D2B, 0xD7D0, 0x4ED4, 0xD7D1, 0x7C7D,
09240     0xD7D2, 0x6ED3, 0xD7D3, 0x5B50, 0xD7D4, 0x81EA, 0xD7D5, 0x6E0D,
09241     0xD7D6, 0x5B57, 0xD7D7, 0x9B03, 0xD7D8, 0x68D5, 0xD7D9, 0x8E2A,
09242     0xD7DA, 0x5B97, 0xD7DB, 0x7EFC, 0xD7DC, 0x603B, 0xD7DD, 0x7EB5,
09243     0xD7DE, 0x90B9, 0xD7DF, 0x8D70, 0xD7E0, 0x594F, 0xD7E1, 0x63CD,
09244     0xD7E2, 0x79DF, 0xD7E3, 0x8DB3, 0xD7E4, 0x5352, 0xD7E5, 0x65CF,
09245     0xD7E6, 0x7956, 0xD7E7, 0x8BC5, 0xD7E8, 0x963B, 0xD7E9, 0x7EC4,
09246     0xD7EA, 0x94BB, 0xD7EB, 0x7E82, 0xD7EC, 0x5634, 0xD7ED, 0x9189,
09247     0xD7EE, 0x6700, 0xD7EF, 0x7F6A, 0xD7F0, 0x5C0A, 0xD7F1, 0x9075,
09248     0xD7F2, 0x6628, 0xD7F3, 0x5DE6, 0xD7F4, 0x4F50, 0xD7F5, 0x67DE,
09249     0xD7F6, 0x505A, 0xD7F7, 0x4F5C, 0xD7F8, 0x5750, 0xD7F9, 0x5EA7,
09250     0xD840, 0x8C38, 0xD841, 0x8C39, 0xD842, 0x8C3A, 0xD843, 0x8C3B,
09251     0xD844, 0x8C3C, 0xD845, 0x8C3D, 0xD846, 0x8C3E, 0xD847, 0x8C3F,
09252     0xD848, 0x8C40, 0xD849, 0x8C42, 0xD84A, 0x8C43, 0xD84B, 0x8C44,
09253     0xD84C, 0x8C45, 0xD84D, 0x8C48, 0xD84E, 0x8C4A, 0xD84F, 0x8C4B,
09254     0xD850, 0x8C4D, 0xD851, 0x8C4E, 0xD852, 0x8C4F, 0xD853, 0x8C50,
09255     0xD854, 0x8C51, 0xD855, 0x8C52, 0xD856, 0x8C53, 0xD857, 0x8C54,
09256     0xD858, 0x8C56, 0xD859, 0x8C57, 0xD85A, 0x8C58, 0xD85B, 0x8C59,
09257     0xD85C, 0x8C5B, 0xD85D, 0x8C5C, 0xD85E, 0x8C5D, 0xD85F, 0x8C5E,
09258     0xD860, 0x8C5F, 0xD861, 0x8C60, 0xD862, 0x8C63, 0xD863, 0x8C64,
09259     0xD864, 0x8C65, 0xD865, 0x8C66, 0xD866, 0x8C67, 0xD867, 0x8C68,
09260     0xD868, 0x8C69, 0xD869, 0x8C6C, 0xD86A, 0x8C6D, 0xD86B, 0x8C6E,
09261     0xD86C, 0x8C6F, 0xD86D, 0x8C70, 0xD86E, 0x8C71, 0xD86F, 0x8C72,
09262     0xD870, 0x8C74, 0xD871, 0x8C75, 0xD872, 0x8C76, 0xD873, 0x8C77,
09263     0xD874, 0x8C7B, 0xD875, 0x8C7C, 0xD876, 0x8C7D, 0xD877, 0x8C7E,
09264     0xD878, 0x8C7F, 0xD879, 0x8C80, 0xD87A, 0x8C81, 0xD87B, 0x8C83,
09265     0xD87C, 0x8C84, 0xD87D, 0x8C86, 0xD87E, 0x8C87, 0xD880, 0x8C88,
09266     0xD881, 0x8C8B, 0xD882, 0x8C8D, 0xD883, 0x8C8E, 0xD884, 0x8C8F,
09267     0xD885, 0x8C90, 0xD886, 0x8C91, 0xD887, 0x8C92, 0xD888, 0x8C93,
09268     0xD889, 0x8C95, 0xD88A, 0x8C96, 0xD88B, 0x8C97, 0xD88C, 0x8C99,
09269     0xD88D, 0x8C9A, 0xD88E, 0x8C9B, 0xD88F, 0x8C9C, 0xD890, 0x8C9D,
09270     0xD891, 0x8C9E, 0xD892, 0x8C9F, 0xD893, 0x8CA0, 0xD894, 0x8CA1,
09271     0xD895, 0x8CA2, 0xD896, 0x8CA3, 0xD897, 0x8CA4, 0xD898, 0x8CA5,
09272     0xD899, 0x8CA6, 0xD89A, 0x8CA7, 0xD89B, 0x8CA8, 0xD89C, 0x8CA9,
09273     0xD89D, 0x8CAA, 0xD89E, 0x8CAB, 0xD89F, 0x8CAC, 0xD8A0, 0x8CAD,
09274     0xD8A1, 0x4E8D, 0xD8A2, 0x4E0C, 0xD8A3, 0x5140, 0xD8A4, 0x4E10,
09275     0xD8A5, 0x5EFF, 0xD8A6, 0x5345, 0xD8A7, 0x4E15, 0xD8A8, 0x4E98,
09276     0xD8A9, 0x4E1E, 0xD8AA, 0x9B32, 0xD8AB, 0x5B6C, 0xD8AC, 0x5669,
09277     0xD8AD, 0x4E28, 0xD8AE, 0x79BA, 0xD8AF, 0x4E3F, 0xD8B0, 0x5315,
09278     0xD8B1, 0x4E47, 0xD8B2, 0x592D, 0xD8B3, 0x723B, 0xD8B4, 0x536E,
09279     0xD8B5, 0x6C10, 0xD8B6, 0x56DF, 0xD8B7, 0x80E4, 0xD8B8, 0x9997,
09280     0xD8B9, 0x6BD3, 0xD8BA, 0x777E, 0xD8BB, 0x9F17, 0xD8BC, 0x4E36,
09281     0xD8BD, 0x4E9F, 0xD8BE, 0x9F10, 0xD8BF, 0x4E5C, 0xD8C0, 0x4E69,
09282     0xD8C1, 0x4E93, 0xD8C2, 0x8288, 0xD8C3, 0x5B5B, 0xD8C4, 0x556C,
09283     0xD8C5, 0x560F, 0xD8C6, 0x4EC4, 0xD8C7, 0x538D, 0xD8C8, 0x539D,
09284     0xD8C9, 0x53A3, 0xD8CA, 0x53A5, 0xD8CB, 0x53AE, 0xD8CC, 0x9765,
09285     0xD8CD, 0x8D5D, 0xD8CE, 0x531A, 0xD8CF, 0x53F5, 0xD8D0, 0x5326,
09286     0xD8D1, 0x532E, 0xD8D2, 0x533E, 0xD8D3, 0x8D5C, 0xD8D4, 0x5366,
09287     0xD8D5, 0x5363, 0xD8D6, 0x5202, 0xD8D7, 0x5208, 0xD8D8, 0x520E,
09288     0xD8D9, 0x522D, 0xD8DA, 0x5233, 0xD8DB, 0x523F, 0xD8DC, 0x5240,
09289     0xD8DD, 0x524C, 0xD8DE, 0x525E, 0xD8DF, 0x5261, 0xD8E0, 0x525C,
09290     0xD8E1, 0x84AF, 0xD8E2, 0x527D, 0xD8E3, 0x5282, 0xD8E4, 0x5281,
09291     0xD8E5, 0x5290, 0xD8E6, 0x5293, 0xD8E7, 0x5182, 0xD8E8, 0x7F54,
09292     0xD8E9, 0x4EBB, 0xD8EA, 0x4EC3, 0xD8EB, 0x4EC9, 0xD8EC, 0x4EC2,
09293     0xD8ED, 0x4EE8, 0xD8EE, 0x4EE1, 0xD8EF, 0x4EEB, 0xD8F0, 0x4EDE,
09294     0xD8F1, 0x4F1B, 0xD8F2, 0x4EF3, 0xD8F3, 0x4F22, 0xD8F4, 0x4F64,
09295     0xD8F5, 0x4EF5, 0xD8F6, 0x4F25, 0xD8F7, 0x4F27, 0xD8F8, 0x4F09,
09296     0xD8F9, 0x4F2B, 0xD8FA, 0x4F5E, 0xD8FB, 0x4F67, 0xD8FC, 0x6538,
09297     0xD8FD, 0x4F5A, 0xD8FE, 0x4F5D, 0xD940, 0x8CAE, 0xD941, 0x8CAF,
09298     0xD942, 0x8CB0, 0xD943, 0x8CB1, 0xD944, 0x8CB2, 0xD945, 0x8CB3,
09299     0xD946, 0x8CB4, 0xD947, 0x8CB5, 0xD948, 0x8CB6, 0xD949, 0x8CB7,
09300     0xD94A, 0x8CB8, 0xD94B, 0x8CB9, 0xD94C, 0x8CBA, 0xD94D, 0x8CBB,
09301     0xD94E, 0x8CBC, 0xD94F, 0x8CBD, 0xD950, 0x8CBE, 0xD951, 0x8CBF,
09302     0xD952, 0x8CC0, 0xD953, 0x8CC1, 0xD954, 0x8CC2, 0xD955, 0x8CC3,
09303     0xD956, 0x8CC4, 0xD957, 0x8CC5, 0xD958, 0x8CC6, 0xD959, 0x8CC7,
09304     0xD95A, 0x8CC8, 0xD95B, 0x8CC9, 0xD95C, 0x8CCA, 0xD95D, 0x8CCB,
09305     0xD95E, 0x8CCC, 0xD95F, 0x8CCD, 0xD960, 0x8CCE, 0xD961, 0x8CCF,
09306     0xD962, 0x8CD0, 0xD963, 0x8CD1, 0xD964, 0x8CD2, 0xD965, 0x8CD3,
09307     0xD966, 0x8CD4, 0xD967, 0x8CD5, 0xD968, 0x8CD6, 0xD969, 0x8CD7,
09308     0xD96A, 0x8CD8, 0xD96B, 0x8CD9, 0xD96C, 0x8CDA, 0xD96D, 0x8CDB,
09309     0xD96E, 0x8CDC, 0xD96F, 0x8CDD, 0xD970, 0x8CDE, 0xD971, 0x8CDF,
09310     0xD972, 0x8CE0, 0xD973, 0x8CE1, 0xD974, 0x8CE2, 0xD975, 0x8CE3,
09311     0xD976, 0x8CE4, 0xD977, 0x8CE5, 0xD978, 0x8CE6, 0xD979, 0x8CE7,
09312     0xD97A, 0x8CE8, 0xD97B, 0x8CE9, 0xD97C, 0x8CEA, 0xD97D, 0x8CEB,
09313     0xD97E, 0x8CEC, 0xD980, 0x8CED, 0xD981, 0x8CEE, 0xD982, 0x8CEF,
09314     0xD983, 0x8CF0, 0xD984, 0x8CF1, 0xD985, 0x8CF2, 0xD986, 0x8CF3,
09315     0xD987, 0x8CF4, 0xD988, 0x8CF5, 0xD989, 0x8CF6, 0xD98A, 0x8CF7,
09316     0xD98B, 0x8CF8, 0xD98C, 0x8CF9, 0xD98D, 0x8CFA, 0xD98E, 0x8CFB,
09317     0xD98F, 0x8CFC, 0xD990, 0x8CFD, 0xD991, 0x8CFE, 0xD992, 0x8CFF,
09318     0xD993, 0x8D00, 0xD994, 0x8D01, 0xD995, 0x8D02, 0xD996, 0x8D03,
09319     0xD997, 0x8D04, 0xD998, 0x8D05, 0xD999, 0x8D06, 0xD99A, 0x8D07,
09320     0xD99B, 0x8D08, 0xD99C, 0x8D09, 0xD99D, 0x8D0A, 0xD99E, 0x8D0B,
09321     0xD99F, 0x8D0C, 0xD9A0, 0x8D0D, 0xD9A1, 0x4F5F, 0xD9A2, 0x4F57,
09322     0xD9A3, 0x4F32, 0xD9A4, 0x4F3D, 0xD9A5, 0x4F76, 0xD9A6, 0x4F74,
09323     0xD9A7, 0x4F91, 0xD9A8, 0x4F89, 0xD9A9, 0x4F83, 0xD9AA, 0x4F8F,
09324     0xD9AB, 0x4F7E, 0xD9AC, 0x4F7B, 0xD9AD, 0x4FAA, 0xD9AE, 0x4F7C,
09325     0xD9AF, 0x4FAC, 0xD9B0, 0x4F94, 0xD9B1, 0x4FE6, 0xD9B2, 0x4FE8,
09326     0xD9B3, 0x4FEA, 0xD9B4, 0x4FC5, 0xD9B5, 0x4FDA, 0xD9B6, 0x4FE3,
09327     0xD9B7, 0x4FDC, 0xD9B8, 0x4FD1, 0xD9B9, 0x4FDF, 0xD9BA, 0x4FF8,
09328     0xD9BB, 0x5029, 0xD9BC, 0x504C, 0xD9BD, 0x4FF3, 0xD9BE, 0x502C,
09329     0xD9BF, 0x500F, 0xD9C0, 0x502E, 0xD9C1, 0x502D, 0xD9C2, 0x4FFE,
09330     0xD9C3, 0x501C, 0xD9C4, 0x500C, 0xD9C5, 0x5025, 0xD9C6, 0x5028,
09331     0xD9C7, 0x507E, 0xD9C8, 0x5043, 0xD9C9, 0x5055, 0xD9CA, 0x5048,
09332     0xD9CB, 0x504E, 0xD9CC, 0x506C, 0xD9CD, 0x507B, 0xD9CE, 0x50A5,
09333     0xD9CF, 0x50A7, 0xD9D0, 0x50A9, 0xD9D1, 0x50BA, 0xD9D2, 0x50D6,
09334     0xD9D3, 0x5106, 0xD9D4, 0x50ED, 0xD9D5, 0x50EC, 0xD9D6, 0x50E6,
09335     0xD9D7, 0x50EE, 0xD9D8, 0x5107, 0xD9D9, 0x510B, 0xD9DA, 0x4EDD,
09336     0xD9DB, 0x6C3D, 0xD9DC, 0x4F58, 0xD9DD, 0x4F65, 0xD9DE, 0x4FCE,
09337     0xD9DF, 0x9FA0, 0xD9E0, 0x6C46, 0xD9E1, 0x7C74, 0xD9E2, 0x516E,
09338     0xD9E3, 0x5DFD, 0xD9E4, 0x9EC9, 0xD9E5, 0x9998, 0xD9E6, 0x5181,
09339     0xD9E7, 0x5914, 0xD9E8, 0x52F9, 0xD9E9, 0x530D, 0xD9EA, 0x8A07,
09340     0xD9EB, 0x5310, 0xD9EC, 0x51EB, 0xD9ED, 0x5919, 0xD9EE, 0x5155,
09341     0xD9EF, 0x4EA0, 0xD9F0, 0x5156, 0xD9F1, 0x4EB3, 0xD9F2, 0x886E,
09342     0xD9F3, 0x88A4, 0xD9F4, 0x4EB5, 0xD9F5, 0x8114, 0xD9F6, 0x88D2,
09343     0xD9F7, 0x7980, 0xD9F8, 0x5B34, 0xD9F9, 0x8803, 0xD9FA, 0x7FB8,
09344     0xD9FB, 0x51AB, 0xD9FC, 0x51B1, 0xD9FD, 0x51BD, 0xD9FE, 0x51BC,
09345     0xDA40, 0x8D0E, 0xDA41, 0x8D0F, 0xDA42, 0x8D10, 0xDA43, 0x8D11,
09346     0xDA44, 0x8D12, 0xDA45, 0x8D13, 0xDA46, 0x8D14, 0xDA47, 0x8D15,
09347     0xDA48, 0x8D16, 0xDA49, 0x8D17, 0xDA4A, 0x8D18, 0xDA4B, 0x8D19,
09348     0xDA4C, 0x8D1A, 0xDA4D, 0x8D1B, 0xDA4E, 0x8D1C, 0xDA4F, 0x8D20,
09349     0xDA50, 0x8D51, 0xDA51, 0x8D52, 0xDA52, 0x8D57, 0xDA53, 0x8D5F,
09350     0xDA54, 0x8D65, 0xDA55, 0x8D68, 0xDA56, 0x8D69, 0xDA57, 0x8D6A,
09351     0xDA58, 0x8D6C, 0xDA59, 0x8D6E, 0xDA5A, 0x8D6F, 0xDA5B, 0x8D71,
09352     0xDA5C, 0x8D72, 0xDA5D, 0x8D78, 0xDA5E, 0x8D79, 0xDA5F, 0x8D7A,
09353     0xDA60, 0x8D7B, 0xDA61, 0x8D7C, 0xDA62, 0x8D7D, 0xDA63, 0x8D7E,
09354     0xDA64, 0x8D7F, 0xDA65, 0x8D80, 0xDA66, 0x8D82, 0xDA67, 0x8D83,
09355     0xDA68, 0x8D86, 0xDA69, 0x8D87, 0xDA6A, 0x8D88, 0xDA6B, 0x8D89,
09356     0xDA6C, 0x8D8C, 0xDA6D, 0x8D8D, 0xDA6E, 0x8D8E, 0xDA6F, 0x8D8F,
09357     0xDA70, 0x8D90, 0xDA71, 0x8D92, 0xDA72, 0x8D93, 0xDA73, 0x8D95,
09358     0xDA74, 0x8D96, 0xDA75, 0x8D97, 0xDA76, 0x8D98, 0xDA77, 0x8D99,
09359     0xDA78, 0x8D9A, 0xDA79, 0x8D9B, 0xDA7A, 0x8D9C, 0xDA7B, 0x8D9D,
09360     0xDA7C, 0x8D9E, 0xDA7D, 0x8DA0, 0xDA7E, 0x8DA1, 0xDA80, 0x8DA2,
09361     0xDA81, 0x8DA4, 0xDA82, 0x8DA5, 0xDA83, 0x8DA6, 0xDA84, 0x8DA7,
09362     0xDA85, 0x8DA8, 0xDA86, 0x8DA9, 0xDA87, 0x8DAA, 0xDA88, 0x8DAB,
09363     0xDA89, 0x8DAC, 0xDA8A, 0x8DAD, 0xDA8B, 0x8DAE, 0xDA8C, 0x8DAF,
09364     0xDA8D, 0x8DB0, 0xDA8E, 0x8DB2, 0xDA8F, 0x8DB6, 0xDA90, 0x8DB7,
09365     0xDA91, 0x8DB9, 0xDA92, 0x8DBB, 0xDA93, 0x8DBD, 0xDA94, 0x8DC0,
09366     0xDA95, 0x8DC1, 0xDA96, 0x8DC2, 0xDA97, 0x8DC5, 0xDA98, 0x8DC7,
09367     0xDA99, 0x8DC8, 0xDA9A, 0x8DC9, 0xDA9B, 0x8DCA, 0xDA9C, 0x8DCD,
09368     0xDA9D, 0x8DD0, 0xDA9E, 0x8DD2, 0xDA9F, 0x8DD3, 0xDAA0, 0x8DD4,
09369     0xDAA1, 0x51C7, 0xDAA2, 0x5196, 0xDAA3, 0x51A2, 0xDAA4, 0x51A5,
09370     0xDAA5, 0x8BA0, 0xDAA6, 0x8BA6, 0xDAA7, 0x8BA7, 0xDAA8, 0x8BAA,
09371     0xDAA9, 0x8BB4, 0xDAAA, 0x8BB5, 0xDAAB, 0x8BB7, 0xDAAC, 0x8BC2,
09372     0xDAAD, 0x8BC3, 0xDAAE, 0x8BCB, 0xDAAF, 0x8BCF, 0xDAB0, 0x8BCE,
09373     0xDAB1, 0x8BD2, 0xDAB2, 0x8BD3, 0xDAB3, 0x8BD4, 0xDAB4, 0x8BD6,
09374     0xDAB5, 0x8BD8, 0xDAB6, 0x8BD9, 0xDAB7, 0x8BDC, 0xDAB8, 0x8BDF,
09375     0xDAB9, 0x8BE0, 0xDABA, 0x8BE4, 0xDABB, 0x8BE8, 0xDABC, 0x8BE9,
09376     0xDABD, 0x8BEE, 0xDABE, 0x8BF0, 0xDABF, 0x8BF3, 0xDAC0, 0x8BF6,
09377     0xDAC1, 0x8BF9, 0xDAC2, 0x8BFC, 0xDAC3, 0x8BFF, 0xDAC4, 0x8C00,
09378     0xDAC5, 0x8C02, 0xDAC6, 0x8C04, 0xDAC7, 0x8C07, 0xDAC8, 0x8C0C,
09379     0xDAC9, 0x8C0F, 0xDACA, 0x8C11, 0xDACB, 0x8C12, 0xDACC, 0x8C14,
09380     0xDACD, 0x8C15, 0xDACE, 0x8C16, 0xDACF, 0x8C19, 0xDAD0, 0x8C1B,
09381     0xDAD1, 0x8C18, 0xDAD2, 0x8C1D, 0xDAD3, 0x8C1F, 0xDAD4, 0x8C20,
09382     0xDAD5, 0x8C21, 0xDAD6, 0x8C25, 0xDAD7, 0x8C27, 0xDAD8, 0x8C2A,
09383     0xDAD9, 0x8C2B, 0xDADA, 0x8C2E, 0xDADB, 0x8C2F, 0xDADC, 0x8C32,
09384     0xDADD, 0x8C33, 0xDADE, 0x8C35, 0xDADF, 0x8C36, 0xDAE0, 0x5369,
09385     0xDAE1, 0x537A, 0xDAE2, 0x961D, 0xDAE3, 0x9622, 0xDAE4, 0x9621,
09386     0xDAE5, 0x9631, 0xDAE6, 0x962A, 0xDAE7, 0x963D, 0xDAE8, 0x963C,
09387     0xDAE9, 0x9642, 0xDAEA, 0x9649, 0xDAEB, 0x9654, 0xDAEC, 0x965F,
09388     0xDAED, 0x9667, 0xDAEE, 0x966C, 0xDAEF, 0x9672, 0xDAF0, 0x9674,
09389     0xDAF1, 0x9688, 0xDAF2, 0x968D, 0xDAF3, 0x9697, 0xDAF4, 0x96B0,
09390     0xDAF5, 0x9097, 0xDAF6, 0x909B, 0xDAF7, 0x909D, 0xDAF8, 0x9099,
09391     0xDAF9, 0x90AC, 0xDAFA, 0x90A1, 0xDAFB, 0x90B4, 0xDAFC, 0x90B3,
09392     0xDAFD, 0x90B6, 0xDAFE, 0x90BA, 0xDB40, 0x8DD5, 0xDB41, 0x8DD8,
09393     0xDB42, 0x8DD9, 0xDB43, 0x8DDC, 0xDB44, 0x8DE0, 0xDB45, 0x8DE1,
09394     0xDB46, 0x8DE2, 0xDB47, 0x8DE5, 0xDB48, 0x8DE6, 0xDB49, 0x8DE7,
09395     0xDB4A, 0x8DE9, 0xDB4B, 0x8DED, 0xDB4C, 0x8DEE, 0xDB4D, 0x8DF0,
09396     0xDB4E, 0x8DF1, 0xDB4F, 0x8DF2, 0xDB50, 0x8DF4, 0xDB51, 0x8DF6,
09397     0xDB52, 0x8DFC, 0xDB53, 0x8DFE, 0xDB54, 0x8DFF, 0xDB55, 0x8E00,
09398     0xDB56, 0x8E01, 0xDB57, 0x8E02, 0xDB58, 0x8E03, 0xDB59, 0x8E04,
09399     0xDB5A, 0x8E06, 0xDB5B, 0x8E07, 0xDB5C, 0x8E08, 0xDB5D, 0x8E0B,
09400     0xDB5E, 0x8E0D, 0xDB5F, 0x8E0E, 0xDB60, 0x8E10, 0xDB61, 0x8E11,
09401     0xDB62, 0x8E12, 0xDB63, 0x8E13, 0xDB64, 0x8E15, 0xDB65, 0x8E16,
09402     0xDB66, 0x8E17, 0xDB67, 0x8E18, 0xDB68, 0x8E19, 0xDB69, 0x8E1A,
09403     0xDB6A, 0x8E1B, 0xDB6B, 0x8E1C, 0xDB6C, 0x8E20, 0xDB6D, 0x8E21,
09404     0xDB6E, 0x8E24, 0xDB6F, 0x8E25, 0xDB70, 0x8E26, 0xDB71, 0x8E27,
09405     0xDB72, 0x8E28, 0xDB73, 0x8E2B, 0xDB74, 0x8E2D, 0xDB75, 0x8E30,
09406     0xDB76, 0x8E32, 0xDB77, 0x8E33, 0xDB78, 0x8E34, 0xDB79, 0x8E36,
09407     0xDB7A, 0x8E37, 0xDB7B, 0x8E38, 0xDB7C, 0x8E3B, 0xDB7D, 0x8E3C,
09408     0xDB7E, 0x8E3E, 0xDB80, 0x8E3F, 0xDB81, 0x8E43, 0xDB82, 0x8E45,
09409     0xDB83, 0x8E46, 0xDB84, 0x8E4C, 0xDB85, 0x8E4D, 0xDB86, 0x8E4E,
09410     0xDB87, 0x8E4F, 0xDB88, 0x8E50, 0xDB89, 0x8E53, 0xDB8A, 0x8E54,
09411     0xDB8B, 0x8E55, 0xDB8C, 0x8E56, 0xDB8D, 0x8E57, 0xDB8E, 0x8E58,
09412     0xDB8F, 0x8E5A, 0xDB90, 0x8E5B, 0xDB91, 0x8E5C, 0xDB92, 0x8E5D,
09413     0xDB93, 0x8E5E, 0xDB94, 0x8E5F, 0xDB95, 0x8E60, 0xDB96, 0x8E61,
09414     0xDB97, 0x8E62, 0xDB98, 0x8E63, 0xDB99, 0x8E64, 0xDB9A, 0x8E65,
09415     0xDB9B, 0x8E67, 0xDB9C, 0x8E68, 0xDB9D, 0x8E6A, 0xDB9E, 0x8E6B,
09416     0xDB9F, 0x8E6E, 0xDBA0, 0x8E71, 0xDBA1, 0x90B8, 0xDBA2, 0x90B0,
09417     0xDBA3, 0x90CF, 0xDBA4, 0x90C5, 0xDBA5, 0x90BE, 0xDBA6, 0x90D0,
09418     0xDBA7, 0x90C4, 0xDBA8, 0x90C7, 0xDBA9, 0x90D3, 0xDBAA, 0x90E6,
09419     0xDBAB, 0x90E2, 0xDBAC, 0x90DC, 0xDBAD, 0x90D7, 0xDBAE, 0x90DB,
09420     0xDBAF, 0x90EB, 0xDBB0, 0x90EF, 0xDBB1, 0x90FE, 0xDBB2, 0x9104,
09421     0xDBB3, 0x9122, 0xDBB4, 0x911E, 0xDBB5, 0x9123, 0xDBB6, 0x9131,
09422     0xDBB7, 0x912F, 0xDBB8, 0x9139, 0xDBB9, 0x9143, 0xDBBA, 0x9146,
09423     0xDBBB, 0x520D, 0xDBBC, 0x5942, 0xDBBD, 0x52A2, 0xDBBE, 0x52AC,
09424     0xDBBF, 0x52AD, 0xDBC0, 0x52BE, 0xDBC1, 0x54FF, 0xDBC2, 0x52D0,
09425     0xDBC3, 0x52D6, 0xDBC4, 0x52F0, 0xDBC5, 0x53DF, 0xDBC6, 0x71EE,
09426     0xDBC7, 0x77CD, 0xDBC8, 0x5EF4, 0xDBC9, 0x51F5, 0xDBCA, 0x51FC,
09427     0xDBCB, 0x9B2F, 0xDBCC, 0x53B6, 0xDBCD, 0x5F01, 0xDBCE, 0x755A,
09428     0xDBCF, 0x5DEF, 0xDBD0, 0x574C, 0xDBD1, 0x57A9, 0xDBD2, 0x57A1,
09429     0xDBD3, 0x587E, 0xDBD4, 0x58BC, 0xDBD5, 0x58C5, 0xDBD6, 0x58D1,
09430     0xDBD7, 0x5729, 0xDBD8, 0x572C, 0xDBD9, 0x572A, 0xDBDA, 0x5733,
09431     0xDBDB, 0x5739, 0xDBDC, 0x572E, 0xDBDD, 0x572F, 0xDBDE, 0x575C,
09432     0xDBDF, 0x573B, 0xDBE0, 0x5742, 0xDBE1, 0x5769, 0xDBE2, 0x5785,
09433     0xDBE3, 0x576B, 0xDBE4, 0x5786, 0xDBE5, 0x577C, 0xDBE6, 0x577B,
09434     0xDBE7, 0x5768, 0xDBE8, 0x576D, 0xDBE9, 0x5776, 0xDBEA, 0x5773,
09435     0xDBEB, 0x57AD, 0xDBEC, 0x57A4, 0xDBED, 0x578C, 0xDBEE, 0x57B2,
09436     0xDBEF, 0x57CF, 0xDBF0, 0x57A7, 0xDBF1, 0x57B4, 0xDBF2, 0x5793,
09437     0xDBF3, 0x57A0, 0xDBF4, 0x57D5, 0xDBF5, 0x57D8, 0xDBF6, 0x57DA,
09438     0xDBF7, 0x57D9, 0xDBF8, 0x57D2, 0xDBF9, 0x57B8, 0xDBFA, 0x57F4,
09439     0xDBFB, 0x57EF, 0xDBFC, 0x57F8, 0xDBFD, 0x57E4, 0xDBFE, 0x57DD,
09440     0xDC40, 0x8E73, 0xDC41, 0x8E75, 0xDC42, 0x8E77, 0xDC43, 0x8E78,
09441     0xDC44, 0x8E79, 0xDC45, 0x8E7A, 0xDC46, 0x8E7B, 0xDC47, 0x8E7D,
09442     0xDC48, 0x8E7E, 0xDC49, 0x8E80, 0xDC4A, 0x8E82, 0xDC4B, 0x8E83,
09443     0xDC4C, 0x8E84, 0xDC4D, 0x8E86, 0xDC4E, 0x8E88, 0xDC4F, 0x8E89,
09444     0xDC50, 0x8E8A, 0xDC51, 0x8E8B, 0xDC52, 0x8E8C, 0xDC53, 0x8E8D,
09445     0xDC54, 0x8E8E, 0xDC55, 0x8E91, 0xDC56, 0x8E92, 0xDC57, 0x8E93,
09446     0xDC58, 0x8E95, 0xDC59, 0x8E96, 0xDC5A, 0x8E97, 0xDC5B, 0x8E98,
09447     0xDC5C, 0x8E99, 0xDC5D, 0x8E9A, 0xDC5E, 0x8E9B, 0xDC5F, 0x8E9D,
09448     0xDC60, 0x8E9F, 0xDC61, 0x8EA0, 0xDC62, 0x8EA1, 0xDC63, 0x8EA2,
09449     0xDC64, 0x8EA3, 0xDC65, 0x8EA4, 0xDC66, 0x8EA5, 0xDC67, 0x8EA6,
09450     0xDC68, 0x8EA7, 0xDC69, 0x8EA8, 0xDC6A, 0x8EA9, 0xDC6B, 0x8EAA,
09451     0xDC6C, 0x8EAD, 0xDC6D, 0x8EAE, 0xDC6E, 0x8EB0, 0xDC6F, 0x8EB1,
09452     0xDC70, 0x8EB3, 0xDC71, 0x8EB4, 0xDC72, 0x8EB5, 0xDC73, 0x8EB6,
09453     0xDC74, 0x8EB7, 0xDC75, 0x8EB8, 0xDC76, 0x8EB9, 0xDC77, 0x8EBB,
09454     0xDC78, 0x8EBC, 0xDC79, 0x8EBD, 0xDC7A, 0x8EBE, 0xDC7B, 0x8EBF,
09455     0xDC7C, 0x8EC0, 0xDC7D, 0x8EC1, 0xDC7E, 0x8EC2, 0xDC80, 0x8EC3,
09456     0xDC81, 0x8EC4, 0xDC82, 0x8EC5, 0xDC83, 0x8EC6, 0xDC84, 0x8EC7,
09457     0xDC85, 0x8EC8, 0xDC86, 0x8EC9, 0xDC87, 0x8ECA, 0xDC88, 0x8ECB,
09458     0xDC89, 0x8ECC, 0xDC8A, 0x8ECD, 0xDC8B, 0x8ECF, 0xDC8C, 0x8ED0,
09459     0xDC8D, 0x8ED1, 0xDC8E, 0x8ED2, 0xDC8F, 0x8ED3, 0xDC90, 0x8ED4,
09460     0xDC91, 0x8ED5, 0xDC92, 0x8ED6, 0xDC93, 0x8ED7, 0xDC94, 0x8ED8,
09461     0xDC95, 0x8ED9, 0xDC96, 0x8EDA, 0xDC97, 0x8EDB, 0xDC98, 0x8EDC,
09462     0xDC99, 0x8EDD, 0xDC9A, 0x8EDE, 0xDC9B, 0x8EDF, 0xDC9C, 0x8EE0,
09463     0xDC9D, 0x8EE1, 0xDC9E, 0x8EE2, 0xDC9F, 0x8EE3, 0xDCA0, 0x8EE4,
09464     0xDCA1, 0x580B, 0xDCA2, 0x580D, 0xDCA3, 0x57FD, 0xDCA4, 0x57ED,
09465     0xDCA5, 0x5800, 0xDCA6, 0x581E, 0xDCA7, 0x5819, 0xDCA8, 0x5844,
09466     0xDCA9, 0x5820, 0xDCAA, 0x5865, 0xDCAB, 0x586C, 0xDCAC, 0x5881,
09467     0xDCAD, 0x5889, 0xDCAE, 0x589A, 0xDCAF, 0x5880, 0xDCB0, 0x99A8,
09468     0xDCB1, 0x9F19, 0xDCB2, 0x61FF, 0xDCB3, 0x8279, 0xDCB4, 0x827D,
09469     0xDCB5, 0x827F, 0xDCB6, 0x828F, 0xDCB7, 0x828A, 0xDCB8, 0x82A8,
09470     0xDCB9, 0x8284, 0xDCBA, 0x828E, 0xDCBB, 0x8291, 0xDCBC, 0x8297,
09471     0xDCBD, 0x8299, 0xDCBE, 0x82AB, 0xDCBF, 0x82B8, 0xDCC0, 0x82BE,
09472     0xDCC1, 0x82B0, 0xDCC2, 0x82C8, 0xDCC3, 0x82CA, 0xDCC4, 0x82E3,
09473     0xDCC5, 0x8298, 0xDCC6, 0x82B7, 0xDCC7, 0x82AE, 0xDCC8, 0x82CB,
09474     0xDCC9, 0x82CC, 0xDCCA, 0x82C1, 0xDCCB, 0x82A9, 0xDCCC, 0x82B4,
09475     0xDCCD, 0x82A1, 0xDCCE, 0x82AA, 0xDCCF, 0x829F, 0xDCD0, 0x82C4,
09476     0xDCD1, 0x82CE, 0xDCD2, 0x82A4, 0xDCD3, 0x82E1, 0xDCD4, 0x8309,
09477     0xDCD5, 0x82F7, 0xDCD6, 0x82E4, 0xDCD7, 0x830F, 0xDCD8, 0x8307,
09478     0xDCD9, 0x82DC, 0xDCDA, 0x82F4, 0xDCDB, 0x82D2, 0xDCDC, 0x82D8,
09479     0xDCDD, 0x830C, 0xDCDE, 0x82FB, 0xDCDF, 0x82D3, 0xDCE0, 0x8311,
09480     0xDCE1, 0x831A, 0xDCE2, 0x8306, 0xDCE3, 0x8314, 0xDCE4, 0x8315,
09481     0xDCE5, 0x82E0, 0xDCE6, 0x82D5, 0xDCE7, 0x831C, 0xDCE8, 0x8351,
09482     0xDCE9, 0x835B, 0xDCEA, 0x835C, 0xDCEB, 0x8308, 0xDCEC, 0x8392,
09483     0xDCED, 0x833C, 0xDCEE, 0x8334, 0xDCEF, 0x8331, 0xDCF0, 0x839B,
09484     0xDCF1, 0x835E, 0xDCF2, 0x832F, 0xDCF3, 0x834F, 0xDCF4, 0x8347,
09485     0xDCF5, 0x8343, 0xDCF6, 0x835F, 0xDCF7, 0x8340, 0xDCF8, 0x8317,
09486     0xDCF9, 0x8360, 0xDCFA, 0x832D, 0xDCFB, 0x833A, 0xDCFC, 0x8333,
09487     0xDCFD, 0x8366, 0xDCFE, 0x8365, 0xDD40, 0x8EE5, 0xDD41, 0x8EE6,
09488     0xDD42, 0x8EE7, 0xDD43, 0x8EE8, 0xDD44, 0x8EE9, 0xDD45, 0x8EEA,
09489     0xDD46, 0x8EEB, 0xDD47, 0x8EEC, 0xDD48, 0x8EED, 0xDD49, 0x8EEE,
09490     0xDD4A, 0x8EEF, 0xDD4B, 0x8EF0, 0xDD4C, 0x8EF1, 0xDD4D, 0x8EF2,
09491     0xDD4E, 0x8EF3, 0xDD4F, 0x8EF4, 0xDD50, 0x8EF5, 0xDD51, 0x8EF6,
09492     0xDD52, 0x8EF7, 0xDD53, 0x8EF8, 0xDD54, 0x8EF9, 0xDD55, 0x8EFA,
09493     0xDD56, 0x8EFB, 0xDD57, 0x8EFC, 0xDD58, 0x8EFD, 0xDD59, 0x8EFE,
09494     0xDD5A, 0x8EFF, 0xDD5B, 0x8F00, 0xDD5C, 0x8F01, 0xDD5D, 0x8F02,
09495     0xDD5E, 0x8F03, 0xDD5F, 0x8F04, 0xDD60, 0x8F05, 0xDD61, 0x8F06,
09496     0xDD62, 0x8F07, 0xDD63, 0x8F08, 0xDD64, 0x8F09, 0xDD65, 0x8F0A,
09497     0xDD66, 0x8F0B, 0xDD67, 0x8F0C, 0xDD68, 0x8F0D, 0xDD69, 0x8F0E,
09498     0xDD6A, 0x8F0F, 0xDD6B, 0x8F10, 0xDD6C, 0x8F11, 0xDD6D, 0x8F12,
09499     0xDD6E, 0x8F13, 0xDD6F, 0x8F14, 0xDD70, 0x8F15, 0xDD71, 0x8F16,
09500     0xDD72, 0x8F17, 0xDD73, 0x8F18, 0xDD74, 0x8F19, 0xDD75, 0x8F1A,
09501     0xDD76, 0x8F1B, 0xDD77, 0x8F1C, 0xDD78, 0x8F1D, 0xDD79, 0x8F1E,
09502     0xDD7A, 0x8F1F, 0xDD7B, 0x8F20, 0xDD7C, 0x8F21, 0xDD7D, 0x8F22,
09503     0xDD7E, 0x8F23, 0xDD80, 0x8F24, 0xDD81, 0x8F25, 0xDD82, 0x8F26,
09504     0xDD83, 0x8F27, 0xDD84, 0x8F28, 0xDD85, 0x8F29, 0xDD86, 0x8F2A,
09505     0xDD87, 0x8F2B, 0xDD88, 0x8F2C, 0xDD89, 0x8F2D, 0xDD8A, 0x8F2E,
09506     0xDD8B, 0x8F2F, 0xDD8C, 0x8F30, 0xDD8D, 0x8F31, 0xDD8E, 0x8F32,
09507     0xDD8F, 0x8F33, 0xDD90, 0x8F34, 0xDD91, 0x8F35, 0xDD92, 0x8F36,
09508     0xDD93, 0x8F37, 0xDD94, 0x8F38, 0xDD95, 0x8F39, 0xDD96, 0x8F3A,
09509     0xDD97, 0x8F3B, 0xDD98, 0x8F3C, 0xDD99, 0x8F3D, 0xDD9A, 0x8F3E,
09510     0xDD9B, 0x8F3F, 0xDD9C, 0x8F40, 0xDD9D, 0x8F41, 0xDD9E, 0x8F42,
09511     0xDD9F, 0x8F43, 0xDDA0, 0x8F44, 0xDDA1, 0x8368, 0xDDA2, 0x831B,
09512     0xDDA3, 0x8369, 0xDDA4, 0x836C, 0xDDA5, 0x836A, 0xDDA6, 0x836D,
09513     0xDDA7, 0x836E, 0xDDA8, 0x83B0, 0xDDA9, 0x8378, 0xDDAA, 0x83B3,
09514     0xDDAB, 0x83B4, 0xDDAC, 0x83A0, 0xDDAD, 0x83AA, 0xDDAE, 0x8393,
09515     0xDDAF, 0x839C, 0xDDB0, 0x8385, 0xDDB1, 0x837C, 0xDDB2, 0x83B6,
09516     0xDDB3, 0x83A9, 0xDDB4, 0x837D, 0xDDB5, 0x83B8, 0xDDB6, 0x837B,
09517     0xDDB7, 0x8398, 0xDDB8, 0x839E, 0xDDB9, 0x83A8, 0xDDBA, 0x83BA,
09518     0xDDBB, 0x83BC, 0xDDBC, 0x83C1, 0xDDBD, 0x8401, 0xDDBE, 0x83E5,
09519     0xDDBF, 0x83D8, 0xDDC0, 0x5807, 0xDDC1, 0x8418, 0xDDC2, 0x840B,
09520     0xDDC3, 0x83DD, 0xDDC4, 0x83FD, 0xDDC5, 0x83D6, 0xDDC6, 0x841C,
09521     0xDDC7, 0x8438, 0xDDC8, 0x8411, 0xDDC9, 0x8406, 0xDDCA, 0x83D4,
09522     0xDDCB, 0x83DF, 0xDDCC, 0x840F, 0xDDCD, 0x8403, 0xDDCE, 0x83F8,
09523     0xDDCF, 0x83F9, 0xDDD0, 0x83EA, 0xDDD1, 0x83C5, 0xDDD2, 0x83C0,
09524     0xDDD3, 0x8426, 0xDDD4, 0x83F0, 0xDDD5, 0x83E1, 0xDDD6, 0x845C,
09525     0xDDD7, 0x8451, 0xDDD8, 0x845A, 0xDDD9, 0x8459, 0xDDDA, 0x8473,
09526     0xDDDB, 0x8487, 0xDDDC, 0x8488, 0xDDDD, 0x847A, 0xDDDE, 0x8489,
09527     0xDDDF, 0x8478, 0xDDE0, 0x843C, 0xDDE1, 0x8446, 0xDDE2, 0x8469,
09528     0xDDE3, 0x8476, 0xDDE4, 0x848C, 0xDDE5, 0x848E, 0xDDE6, 0x8431,
09529     0xDDE7, 0x846D, 0xDDE8, 0x84C1, 0xDDE9, 0x84CD, 0xDDEA, 0x84D0,
09530     0xDDEB, 0x84E6, 0xDDEC, 0x84BD, 0xDDED, 0x84D3, 0xDDEE, 0x84CA,
09531     0xDDEF, 0x84BF, 0xDDF0, 0x84BA, 0xDDF1, 0x84E0, 0xDDF2, 0x84A1,
09532     0xDDF3, 0x84B9, 0xDDF4, 0x84B4, 0xDDF5, 0x8497, 0xDDF6, 0x84E5,
09533     0xDDF7, 0x84E3, 0xDDF8, 0x850C, 0xDDF9, 0x750D, 0xDDFA, 0x8538,
09534     0xDDFB, 0x84F0, 0xDDFC, 0x8539, 0xDDFD, 0x851F, 0xDDFE, 0x853A,
09535     0xDE40, 0x8F45, 0xDE41, 0x8F46, 0xDE42, 0x8F47, 0xDE43, 0x8F48,
09536     0xDE44, 0x8F49, 0xDE45, 0x8F4A, 0xDE46, 0x8F4B, 0xDE47, 0x8F4C,
09537     0xDE48, 0x8F4D, 0xDE49, 0x8F4E, 0xDE4A, 0x8F4F, 0xDE4B, 0x8F50,
09538     0xDE4C, 0x8F51, 0xDE4D, 0x8F52, 0xDE4E, 0x8F53, 0xDE4F, 0x8F54,
09539     0xDE50, 0x8F55, 0xDE51, 0x8F56, 0xDE52, 0x8F57, 0xDE53, 0x8F58,
09540     0xDE54, 0x8F59, 0xDE55, 0x8F5A, 0xDE56, 0x8F5B, 0xDE57, 0x8F5C,
09541     0xDE58, 0x8F5D, 0xDE59, 0x8F5E, 0xDE5A, 0x8F5F, 0xDE5B, 0x8F60,
09542     0xDE5C, 0x8F61, 0xDE5D, 0x8F62, 0xDE5E, 0x8F63, 0xDE5F, 0x8F64,
09543     0xDE60, 0x8F65, 0xDE61, 0x8F6A, 0xDE62, 0x8F80, 0xDE63, 0x8F8C,
09544     0xDE64, 0x8F92, 0xDE65, 0x8F9D, 0xDE66, 0x8FA0, 0xDE67, 0x8FA1,
09545     0xDE68, 0x8FA2, 0xDE69, 0x8FA4, 0xDE6A, 0x8FA5, 0xDE6B, 0x8FA6,
09546     0xDE6C, 0x8FA7, 0xDE6D, 0x8FAA, 0xDE6E, 0x8FAC, 0xDE6F, 0x8FAD,
09547     0xDE70, 0x8FAE, 0xDE71, 0x8FAF, 0xDE72, 0x8FB2, 0xDE73, 0x8FB3,
09548     0xDE74, 0x8FB4, 0xDE75, 0x8FB5, 0xDE76, 0x8FB7, 0xDE77, 0x8FB8,
09549     0xDE78, 0x8FBA, 0xDE79, 0x8FBB, 0xDE7A, 0x8FBC, 0xDE7B, 0x8FBF,
09550     0xDE7C, 0x8FC0, 0xDE7D, 0x8FC3, 0xDE7E, 0x8FC6, 0xDE80, 0x8FC9,
09551     0xDE81, 0x8FCA, 0xDE82, 0x8FCB, 0xDE83, 0x8FCC, 0xDE84, 0x8FCD,
09552     0xDE85, 0x8FCF, 0xDE86, 0x8FD2, 0xDE87, 0x8FD6, 0xDE88, 0x8FD7,
09553     0xDE89, 0x8FDA, 0xDE8A, 0x8FE0, 0xDE8B, 0x8FE1, 0xDE8C, 0x8FE3,
09554     0xDE8D, 0x8FE7, 0xDE8E, 0x8FEC, 0xDE8F, 0x8FEF, 0xDE90, 0x8FF1,
09555     0xDE91, 0x8FF2, 0xDE92, 0x8FF4, 0xDE93, 0x8FF5, 0xDE94, 0x8FF6,
09556     0xDE95, 0x8FFA, 0xDE96, 0x8FFB, 0xDE97, 0x8FFC, 0xDE98, 0x8FFE,
09557     0xDE99, 0x8FFF, 0xDE9A, 0x9007, 0xDE9B, 0x9008, 0xDE9C, 0x900C,
09558     0xDE9D, 0x900E, 0xDE9E, 0x9013, 0xDE9F, 0x9015, 0xDEA0, 0x9018,
09559     0xDEA1, 0x8556, 0xDEA2, 0x853B, 0xDEA3, 0x84FF, 0xDEA4, 0x84FC,
09560     0xDEA5, 0x8559, 0xDEA6, 0x8548, 0xDEA7, 0x8568, 0xDEA8, 0x8564,
09561     0xDEA9, 0x855E, 0xDEAA, 0x857A, 0xDEAB, 0x77A2, 0xDEAC, 0x8543,
09562     0xDEAD, 0x8572, 0xDEAE, 0x857B, 0xDEAF, 0x85A4, 0xDEB0, 0x85A8,
09563     0xDEB1, 0x8587, 0xDEB2, 0x858F, 0xDEB3, 0x8579, 0xDEB4, 0x85AE,
09564     0xDEB5, 0x859C, 0xDEB6, 0x8585, 0xDEB7, 0x85B9, 0xDEB8, 0x85B7,
09565     0xDEB9, 0x85B0, 0xDEBA, 0x85D3, 0xDEBB, 0x85C1, 0xDEBC, 0x85DC,
09566     0xDEBD, 0x85FF, 0xDEBE, 0x8627, 0xDEBF, 0x8605, 0xDEC0, 0x8629,
09567     0xDEC1, 0x8616, 0xDEC2, 0x863C, 0xDEC3, 0x5EFE, 0xDEC4, 0x5F08,
09568     0xDEC5, 0x593C, 0xDEC6, 0x5941, 0xDEC7, 0x8037, 0xDEC8, 0x5955,
09569     0xDEC9, 0x595A, 0xDECA, 0x5958, 0xDECB, 0x530F, 0xDECC, 0x5C22,
09570     0xDECD, 0x5C25, 0xDECE, 0x5C2C, 0xDECF, 0x5C34, 0xDED0, 0x624C,
09571     0xDED1, 0x626A, 0xDED2, 0x629F, 0xDED3, 0x62BB, 0xDED4, 0x62CA,
09572     0xDED5, 0x62DA, 0xDED6, 0x62D7, 0xDED7, 0x62EE, 0xDED8, 0x6322,
09573     0xDED9, 0x62F6, 0xDEDA, 0x6339, 0xDEDB, 0x634B, 0xDEDC, 0x6343,
09574     0xDEDD, 0x63AD, 0xDEDE, 0x63F6, 0xDEDF, 0x6371, 0xDEE0, 0x637A,
09575     0xDEE1, 0x638E, 0xDEE2, 0x63B4, 0xDEE3, 0x636D, 0xDEE4, 0x63AC,
09576     0xDEE5, 0x638A, 0xDEE6, 0x6369, 0xDEE7, 0x63AE, 0xDEE8, 0x63BC,
09577     0xDEE9, 0x63F2, 0xDEEA, 0x63F8, 0xDEEB, 0x63E0, 0xDEEC, 0x63FF,
09578     0xDEED, 0x63C4, 0xDEEE, 0x63DE, 0xDEEF, 0x63CE, 0xDEF0, 0x6452,
09579     0xDEF1, 0x63C6, 0xDEF2, 0x63BE, 0xDEF3, 0x6445, 0xDEF4, 0x6441,
09580     0xDEF5, 0x640B, 0xDEF6, 0x641B, 0xDEF7, 0x6420, 0xDEF8, 0x640C,
09581     0xDEF9, 0x6426, 0xDEFA, 0x6421, 0xDEFB, 0x645E, 0xDEFC, 0x6484,
09582     0xDEFD, 0x646D, 0xDEFE, 0x6496, 0xDF40, 0x9019, 0xDF41, 0x901C,
09583     0xDF42, 0x9023, 0xDF43, 0x9024, 0xDF44, 0x9025, 0xDF45, 0x9027,
09584     0xDF46, 0x9028, 0xDF47, 0x9029, 0xDF48, 0x902A, 0xDF49, 0x902B,
09585     0xDF4A, 0x902C, 0xDF4B, 0x9030, 0xDF4C, 0x9031, 0xDF4D, 0x9032,
09586     0xDF4E, 0x9033, 0xDF4F, 0x9034, 0xDF50, 0x9037, 0xDF51, 0x9039,
09587     0xDF52, 0x903A, 0xDF53, 0x903D, 0xDF54, 0x903F, 0xDF55, 0x9040,
09588     0xDF56, 0x9043, 0xDF57, 0x9045, 0xDF58, 0x9046, 0xDF59, 0x9048,
09589     0xDF5A, 0x9049, 0xDF5B, 0x904A, 0xDF5C, 0x904B, 0xDF5D, 0x904C,
09590     0xDF5E, 0x904E, 0xDF5F, 0x9054, 0xDF60, 0x9055, 0xDF61, 0x9056,
09591     0xDF62, 0x9059, 0xDF63, 0x905A, 0xDF64, 0x905C, 0xDF65, 0x905D,
09592     0xDF66, 0x905E, 0xDF67, 0x905F, 0xDF68, 0x9060, 0xDF69, 0x9061,
09593     0xDF6A, 0x9064, 0xDF6B, 0x9066, 0xDF6C, 0x9067, 0xDF6D, 0x9069,
09594     0xDF6E, 0x906A, 0xDF6F, 0x906B, 0xDF70, 0x906C, 0xDF71, 0x906F,
09595     0xDF72, 0x9070, 0xDF73, 0x9071, 0xDF74, 0x9072, 0xDF75, 0x9073,
09596     0xDF76, 0x9076, 0xDF77, 0x9077, 0xDF78, 0x9078, 0xDF79, 0x9079,
09597     0xDF7A, 0x907A, 0xDF7B, 0x907B, 0xDF7C, 0x907C, 0xDF7D, 0x907E,
09598     0xDF7E, 0x9081, 0xDF80, 0x9084, 0xDF81, 0x9085, 0xDF82, 0x9086,
09599     0xDF83, 0x9087, 0xDF84, 0x9089, 0xDF85, 0x908A, 0xDF86, 0x908C,
09600     0xDF87, 0x908D, 0xDF88, 0x908E, 0xDF89, 0x908F, 0xDF8A, 0x9090,
09601     0xDF8B, 0x9092, 0xDF8C, 0x9094, 0xDF8D, 0x9096, 0xDF8E, 0x9098,
09602     0xDF8F, 0x909A, 0xDF90, 0x909C, 0xDF91, 0x909E, 0xDF92, 0x909F,
09603     0xDF93, 0x90A0, 0xDF94, 0x90A4, 0xDF95, 0x90A5, 0xDF96, 0x90A7,
09604     0xDF97, 0x90A8, 0xDF98, 0x90A9, 0xDF99, 0x90AB, 0xDF9A, 0x90AD,
09605     0xDF9B, 0x90B2, 0xDF9C, 0x90B7, 0xDF9D, 0x90BC, 0xDF9E, 0x90BD,
09606     0xDF9F, 0x90BF, 0xDFA0, 0x90C0, 0xDFA1, 0x647A, 0xDFA2, 0x64B7,
09607     0xDFA3, 0x64B8, 0xDFA4, 0x6499, 0xDFA5, 0x64BA, 0xDFA6, 0x64C0,
09608     0xDFA7, 0x64D0, 0xDFA8, 0x64D7, 0xDFA9, 0x64E4, 0xDFAA, 0x64E2,
09609     0xDFAB, 0x6509, 0xDFAC, 0x6525, 0xDFAD, 0x652E, 0xDFAE, 0x5F0B,
09610     0xDFAF, 0x5FD2, 0xDFB0, 0x7519, 0xDFB1, 0x5F11, 0xDFB2, 0x535F,
09611     0xDFB3, 0x53F1, 0xDFB4, 0x53FD, 0xDFB5, 0x53E9, 0xDFB6, 0x53E8,
09612     0xDFB7, 0x53FB, 0xDFB8, 0x5412, 0xDFB9, 0x5416, 0xDFBA, 0x5406,
09613     0xDFBB, 0x544B, 0xDFBC, 0x5452, 0xDFBD, 0x5453, 0xDFBE, 0x5454,
09614     0xDFBF, 0x5456, 0xDFC0, 0x5443, 0xDFC1, 0x5421, 0xDFC2, 0x5457,
09615     0xDFC3, 0x5459, 0xDFC4, 0x5423, 0xDFC5, 0x5432, 0xDFC6, 0x5482,
09616     0xDFC7, 0x5494, 0xDFC8, 0x5477, 0xDFC9, 0x5471, 0xDFCA, 0x5464,
09617     0xDFCB, 0x549A, 0xDFCC, 0x549B, 0xDFCD, 0x5484, 0xDFCE, 0x5476,
09618     0xDFCF, 0x5466, 0xDFD0, 0x549D, 0xDFD1, 0x54D0, 0xDFD2, 0x54AD,
09619     0xDFD3, 0x54C2, 0xDFD4, 0x54B4, 0xDFD5, 0x54D2, 0xDFD6, 0x54A7,
09620     0xDFD7, 0x54A6, 0xDFD8, 0x54D3, 0xDFD9, 0x54D4, 0xDFDA, 0x5472,
09621     0xDFDB, 0x54A3, 0xDFDC, 0x54D5, 0xDFDD, 0x54BB, 0xDFDE, 0x54BF,
09622     0xDFDF, 0x54CC, 0xDFE0, 0x54D9, 0xDFE1, 0x54DA, 0xDFE2, 0x54DC,
09623     0xDFE3, 0x54A9, 0xDFE4, 0x54AA, 0xDFE5, 0x54A4, 0xDFE6, 0x54DD,
09624     0xDFE7, 0x54CF, 0xDFE8, 0x54DE, 0xDFE9, 0x551B, 0xDFEA, 0x54E7,
09625     0xDFEB, 0x5520, 0xDFEC, 0x54FD, 0xDFED, 0x5514, 0xDFEE, 0x54F3,
09626     0xDFEF, 0x5522, 0xDFF0, 0x5523, 0xDFF1, 0x550F, 0xDFF2, 0x5511,
09627     0xDFF3, 0x5527, 0xDFF4, 0x552A, 0xDFF5, 0x5567, 0xDFF6, 0x558F,
09628     0xDFF7, 0x55B5, 0xDFF8, 0x5549, 0xDFF9, 0x556D, 0xDFFA, 0x5541,
09629     0xDFFB, 0x5555, 0xDFFC, 0x553F, 0xDFFD, 0x5550, 0xDFFE, 0x553C,
09630     0xE040, 0x90C2, 0xE041, 0x90C3, 0xE042, 0x90C6, 0xE043, 0x90C8,
09631     0xE044, 0x90C9, 0xE045, 0x90CB, 0xE046, 0x90CC, 0xE047, 0x90CD,
09632     0xE048, 0x90D2, 0xE049, 0x90D4, 0xE04A, 0x90D5, 0xE04B, 0x90D6,
09633     0xE04C, 0x90D8, 0xE04D, 0x90D9, 0xE04E, 0x90DA, 0xE04F, 0x90DE,
09634     0xE050, 0x90DF, 0xE051, 0x90E0, 0xE052, 0x90E3, 0xE053, 0x90E4,
09635     0xE054, 0x90E5, 0xE055, 0x90E9, 0xE056, 0x90EA, 0xE057, 0x90EC,
09636     0xE058, 0x90EE, 0xE059, 0x90F0, 0xE05A, 0x90F1, 0xE05B, 0x90F2,
09637     0xE05C, 0x90F3, 0xE05D, 0x90F5, 0xE05E, 0x90F6, 0xE05F, 0x90F7,
09638     0xE060, 0x90F9, 0xE061, 0x90FA, 0xE062, 0x90FB, 0xE063, 0x90FC,
09639     0xE064, 0x90FF, 0xE065, 0x9100, 0xE066, 0x9101, 0xE067, 0x9103,
09640     0xE068, 0x9105, 0xE069, 0x9106, 0xE06A, 0x9107, 0xE06B, 0x9108,
09641     0xE06C, 0x9109, 0xE06D, 0x910A, 0xE06E, 0x910B, 0xE06F, 0x910C,
09642     0xE070, 0x910D, 0xE071, 0x910E, 0xE072, 0x910F, 0xE073, 0x9110,
09643     0xE074, 0x9111, 0xE075, 0x9112, 0xE076, 0x9113, 0xE077, 0x9114,
09644     0xE078, 0x9115, 0xE079, 0x9116, 0xE07A, 0x9117, 0xE07B, 0x9118,
09645     0xE07C, 0x911A, 0xE07D, 0x911B, 0xE07E, 0x911C, 0xE080, 0x911D,
09646     0xE081, 0x911F, 0xE082, 0x9120, 0xE083, 0x9121, 0xE084, 0x9124,
09647     0xE085, 0x9125, 0xE086, 0x9126, 0xE087, 0x9127, 0xE088, 0x9128,
09648     0xE089, 0x9129, 0xE08A, 0x912A, 0xE08B, 0x912B, 0xE08C, 0x912C,
09649     0xE08D, 0x912D, 0xE08E, 0x912E, 0xE08F, 0x9130, 0xE090, 0x9132,
09650     0xE091, 0x9133, 0xE092, 0x9134, 0xE093, 0x9135, 0xE094, 0x9136,
09651     0xE095, 0x9137, 0xE096, 0x9138, 0xE097, 0x913A, 0xE098, 0x913B,
09652     0xE099, 0x913C, 0xE09A, 0x913D, 0xE09B, 0x913E, 0xE09C, 0x913F,
09653     0xE09D, 0x9140, 0xE09E, 0x9141, 0xE09F, 0x9142, 0xE0A0, 0x9144,
09654     0xE0A1, 0x5537, 0xE0A2, 0x5556, 0xE0A3, 0x5575, 0xE0A4, 0x5576,
09655     0xE0A5, 0x5577, 0xE0A6, 0x5533, 0xE0A7, 0x5530, 0xE0A8, 0x555C,
09656     0xE0A9, 0x558B, 0xE0AA, 0x55D2, 0xE0AB, 0x5583, 0xE0AC, 0x55B1,
09657     0xE0AD, 0x55B9, 0xE0AE, 0x5588, 0xE0AF, 0x5581, 0xE0B0, 0x559F,
09658     0xE0B1, 0x557E, 0xE0B2, 0x55D6, 0xE0B3, 0x5591, 0xE0B4, 0x557B,
09659     0xE0B5, 0x55DF, 0xE0B6, 0x55BD, 0xE0B7, 0x55BE, 0xE0B8, 0x5594,
09660     0xE0B9, 0x5599, 0xE0BA, 0x55EA, 0xE0BB, 0x55F7, 0xE0BC, 0x55C9,
09661     0xE0BD, 0x561F, 0xE0BE, 0x55D1, 0xE0BF, 0x55EB, 0xE0C0, 0x55EC,
09662     0xE0C1, 0x55D4, 0xE0C2, 0x55E6, 0xE0C3, 0x55DD, 0xE0C4, 0x55C4,
09663     0xE0C5, 0x55EF, 0xE0C6, 0x55E5, 0xE0C7, 0x55F2, 0xE0C8, 0x55F3,
09664     0xE0C9, 0x55CC, 0xE0CA, 0x55CD, 0xE0CB, 0x55E8, 0xE0CC, 0x55F5,
09665     0xE0CD, 0x55E4, 0xE0CE, 0x8F94, 0xE0CF, 0x561E, 0xE0D0, 0x5608,
09666     0xE0D1, 0x560C, 0xE0D2, 0x5601, 0xE0D3, 0x5624, 0xE0D4, 0x5623,
09667     0xE0D5, 0x55FE, 0xE0D6, 0x5600, 0xE0D7, 0x5627, 0xE0D8, 0x562D,
09668     0xE0D9, 0x5658, 0xE0DA, 0x5639, 0xE0DB, 0x5657, 0xE0DC, 0x562C,
09669     0xE0DD, 0x564D, 0xE0DE, 0x5662, 0xE0DF, 0x5659, 0xE0E0, 0x565C,
09670     0xE0E1, 0x564C, 0xE0E2, 0x5654, 0xE0E3, 0x5686, 0xE0E4, 0x5664,
09671     0xE0E5, 0x5671, 0xE0E6, 0x566B, 0xE0E7, 0x567B, 0xE0E8, 0x567C,
09672     0xE0E9, 0x5685, 0xE0EA, 0x5693, 0xE0EB, 0x56AF, 0xE0EC, 0x56D4,
09673     0xE0ED, 0x56D7, 0xE0EE, 0x56DD, 0xE0EF, 0x56E1, 0xE0F0, 0x56F5,
09674     0xE0F1, 0x56EB, 0xE0F2, 0x56F9, 0xE0F3, 0x56FF, 0xE0F4, 0x5704,
09675     0xE0F5, 0x570A, 0xE0F6, 0x5709, 0xE0F7, 0x571C, 0xE0F8, 0x5E0F,
09676     0xE0F9, 0x5E19, 0xE0FA, 0x5E14, 0xE0FB, 0x5E11, 0xE0FC, 0x5E31,
09677     0xE0FD, 0x5E3B, 0xE0FE, 0x5E3C, 0xE140, 0x9145, 0xE141, 0x9147,
09678     0xE142, 0x9148, 0xE143, 0x9151, 0xE144, 0x9153, 0xE145, 0x9154,
09679     0xE146, 0x9155, 0xE147, 0x9156, 0xE148, 0x9158, 0xE149, 0x9159,
09680     0xE14A, 0x915B, 0xE14B, 0x915C, 0xE14C, 0x915F, 0xE14D, 0x9160,
09681     0xE14E, 0x9166, 0xE14F, 0x9167, 0xE150, 0x9168, 0xE151, 0x916B,
09682     0xE152, 0x916D, 0xE153, 0x9173, 0xE154, 0x917A, 0xE155, 0x917B,
09683     0xE156, 0x917C, 0xE157, 0x9180, 0xE158, 0x9181, 0xE159, 0x9182,
09684     0xE15A, 0x9183, 0xE15B, 0x9184, 0xE15C, 0x9186, 0xE15D, 0x9188,
09685     0xE15E, 0x918A, 0xE15F, 0x918E, 0xE160, 0x918F, 0xE161, 0x9193,
09686     0xE162, 0x9194, 0xE163, 0x9195, 0xE164, 0x9196, 0xE165, 0x9197,
09687     0xE166, 0x9198, 0xE167, 0x9199, 0xE168, 0x919C, 0xE169, 0x919D,
09688     0xE16A, 0x919E, 0xE16B, 0x919F, 0xE16C, 0x91A0, 0xE16D, 0x91A1,
09689     0xE16E, 0x91A4, 0xE16F, 0x91A5, 0xE170, 0x91A6, 0xE171, 0x91A7,
09690     0xE172, 0x91A8, 0xE173, 0x91A9, 0xE174, 0x91AB, 0xE175, 0x91AC,
09691     0xE176, 0x91B0, 0xE177, 0x91B1, 0xE178, 0x91B2, 0xE179, 0x91B3,
09692     0xE17A, 0x91B6, 0xE17B, 0x91B7, 0xE17C, 0x91B8, 0xE17D, 0x91B9,
09693     0xE17E, 0x91BB, 0xE180, 0x91BC, 0xE181, 0x91BD, 0xE182, 0x91BE,
09694     0xE183, 0x91BF, 0xE184, 0x91C0, 0xE185, 0x91C1, 0xE186, 0x91C2,
09695     0xE187, 0x91C3, 0xE188, 0x91C4, 0xE189, 0x91C5, 0xE18A, 0x91C6,
09696     0xE18B, 0x91C8, 0xE18C, 0x91CB, 0xE18D, 0x91D0, 0xE18E, 0x91D2,
09697     0xE18F, 0x91D3, 0xE190, 0x91D4, 0xE191, 0x91D5, 0xE192, 0x91D6,
09698     0xE193, 0x91D7, 0xE194, 0x91D8, 0xE195, 0x91D9, 0xE196, 0x91DA,
09699     0xE197, 0x91DB, 0xE198, 0x91DD, 0xE199, 0x91DE, 0xE19A, 0x91DF,
09700     0xE19B, 0x91E0, 0xE19C, 0x91E1, 0xE19D, 0x91E2, 0xE19E, 0x91E3,
09701     0xE19F, 0x91E4, 0xE1A0, 0x91E5, 0xE1A1, 0x5E37, 0xE1A2, 0x5E44,
09702     0xE1A3, 0x5E54, 0xE1A4, 0x5E5B, 0xE1A5, 0x5E5E, 0xE1A6, 0x5E61,
09703     0xE1A7, 0x5C8C, 0xE1A8, 0x5C7A, 0xE1A9, 0x5C8D, 0xE1AA, 0x5C90,
09704     0xE1AB, 0x5C96, 0xE1AC, 0x5C88, 0xE1AD, 0x5C98, 0xE1AE, 0x5C99,
09705     0xE1AF, 0x5C91, 0xE1B0, 0x5C9A, 0xE1B1, 0x5C9C, 0xE1B2, 0x5CB5,
09706     0xE1B3, 0x5CA2, 0xE1B4, 0x5CBD, 0xE1B5, 0x5CAC, 0xE1B6, 0x5CAB,
09707     0xE1B7, 0x5CB1, 0xE1B8, 0x5CA3, 0xE1B9, 0x5CC1, 0xE1BA, 0x5CB7,
09708     0xE1BB, 0x5CC4, 0xE1BC, 0x5CD2, 0xE1BD, 0x5CE4, 0xE1BE, 0x5CCB,
09709     0xE1BF, 0x5CE5, 0xE1C0, 0x5D02, 0xE1C1, 0x5D03, 0xE1C2, 0x5D27,
09710     0xE1C3, 0x5D26, 0xE1C4, 0x5D2E, 0xE1C5, 0x5D24, 0xE1C6, 0x5D1E,
09711     0xE1C7, 0x5D06, 0xE1C8, 0x5D1B, 0xE1C9, 0x5D58, 0xE1CA, 0x5D3E,
09712     0xE1CB, 0x5D34, 0xE1CC, 0x5D3D, 0xE1CD, 0x5D6C, 0xE1CE, 0x5D5B,
09713     0xE1CF, 0x5D6F, 0xE1D0, 0x5D5D, 0xE1D1, 0x5D6B, 0xE1D2, 0x5D4B,
09714     0xE1D3, 0x5D4A, 0xE1D4, 0x5D69, 0xE1D5, 0x5D74, 0xE1D6, 0x5D82,
09715     0xE1D7, 0x5D99, 0xE1D8, 0x5D9D, 0xE1D9, 0x8C73, 0xE1DA, 0x5DB7,
09716     0xE1DB, 0x5DC5, 0xE1DC, 0x5F73, 0xE1DD, 0x5F77, 0xE1DE, 0x5F82,
09717     0xE1DF, 0x5F87, 0xE1E0, 0x5F89, 0xE1E1, 0x5F8C, 0xE1E2, 0x5F95,
09718     0xE1E3, 0x5F99, 0xE1E4, 0x5F9C, 0xE1E5, 0x5FA8, 0xE1E6, 0x5FAD,
09719     0xE1E7, 0x5FB5, 0xE1E8, 0x5FBC, 0xE1E9, 0x8862, 0xE1EA, 0x5F61,
09720     0xE1EB, 0x72AD, 0xE1EC, 0x72B0, 0xE1ED, 0x72B4, 0xE1EE, 0x72B7,
09721     0xE1EF, 0x72B8, 0xE1F0, 0x72C3, 0xE1F1, 0x72C1, 0xE1F2, 0x72CE,
09722     0xE1F3, 0x72CD, 0xE1F4, 0x72D2, 0xE1F5, 0x72E8, 0xE1F6, 0x72EF,
09723     0xE1F7, 0x72E9, 0xE1F8, 0x72F2, 0xE1F9, 0x72F4, 0xE1FA, 0x72F7,
09724     0xE1FB, 0x7301, 0xE1FC, 0x72F3, 0xE1FD, 0x7303, 0xE1FE, 0x72FA,
09725     0xE240, 0x91E6, 0xE241, 0x91E7, 0xE242, 0x91E8, 0xE243, 0x91E9,
09726     0xE244, 0x91EA, 0xE245, 0x91EB, 0xE246, 0x91EC, 0xE247, 0x91ED,
09727     0xE248, 0x91EE, 0xE249, 0x91EF, 0xE24A, 0x91F0, 0xE24B, 0x91F1,
09728     0xE24C, 0x91F2, 0xE24D, 0x91F3, 0xE24E, 0x91F4, 0xE24F, 0x91F5,
09729     0xE250, 0x91F6, 0xE251, 0x91F7, 0xE252, 0x91F8, 0xE253, 0x91F9,
09730     0xE254, 0x91FA, 0xE255, 0x91FB, 0xE256, 0x91FC, 0xE257, 0x91FD,
09731     0xE258, 0x91FE, 0xE259, 0x91FF, 0xE25A, 0x9200, 0xE25B, 0x9201,
09732     0xE25C, 0x9202, 0xE25D, 0x9203, 0xE25E, 0x9204, 0xE25F, 0x9205,
09733     0xE260, 0x9206, 0xE261, 0x9207, 0xE262, 0x9208, 0xE263, 0x9209,
09734     0xE264, 0x920A, 0xE265, 0x920B, 0xE266, 0x920C, 0xE267, 0x920D,
09735     0xE268, 0x920E, 0xE269, 0x920F, 0xE26A, 0x9210, 0xE26B, 0x9211,
09736     0xE26C, 0x9212, 0xE26D, 0x9213, 0xE26E, 0x9214, 0xE26F, 0x9215,
09737     0xE270, 0x9216, 0xE271, 0x9217, 0xE272, 0x9218, 0xE273, 0x9219,
09738     0xE274, 0x921A, 0xE275, 0x921B, 0xE276, 0x921C, 0xE277, 0x921D,
09739     0xE278, 0x921E, 0xE279, 0x921F, 0xE27A, 0x9220, 0xE27B, 0x9221,
09740     0xE27C, 0x9222, 0xE27D, 0x9223, 0xE27E, 0x9224, 0xE280, 0x9225,
09741     0xE281, 0x9226, 0xE282, 0x9227, 0xE283, 0x9228, 0xE284, 0x9229,
09742     0xE285, 0x922A, 0xE286, 0x922B, 0xE287, 0x922C, 0xE288, 0x922D,
09743     0xE289, 0x922E, 0xE28A, 0x922F, 0xE28B, 0x9230, 0xE28C, 0x9231,
09744     0xE28D, 0x9232, 0xE28E, 0x9233, 0xE28F, 0x9234, 0xE290, 0x9235,
09745     0xE291, 0x9236, 0xE292, 0x9237, 0xE293, 0x9238, 0xE294, 0x9239,
09746     0xE295, 0x923A, 0xE296, 0x923B, 0xE297, 0x923C, 0xE298, 0x923D,
09747     0xE299, 0x923E, 0xE29A, 0x923F, 0xE29B, 0x9240, 0xE29C, 0x9241,
09748     0xE29D, 0x9242, 0xE29E, 0x9243, 0xE29F, 0x9244, 0xE2A0, 0x9245,
09749     0xE2A1, 0x72FB, 0xE2A2, 0x7317, 0xE2A3, 0x7313, 0xE2A4, 0x7321,
09750     0xE2A5, 0x730A, 0xE2A6, 0x731E, 0xE2A7, 0x731D, 0xE2A8, 0x7315,
09751     0xE2A9, 0x7322, 0xE2AA, 0x7339, 0xE2AB, 0x7325, 0xE2AC, 0x732C,
09752     0xE2AD, 0x7338, 0xE2AE, 0x7331, 0xE2AF, 0x7350, 0xE2B0, 0x734D,
09753     0xE2B1, 0x7357, 0xE2B2, 0x7360, 0xE2B3, 0x736C, 0xE2B4, 0x736F,
09754     0xE2B5, 0x737E, 0xE2B6, 0x821B, 0xE2B7, 0x5925, 0xE2B8, 0x98E7,
09755     0xE2B9, 0x5924, 0xE2BA, 0x5902, 0xE2BB, 0x9963, 0xE2BC, 0x9967,
09756     0xE2BD, 0x9968, 0xE2BE, 0x9969, 0xE2BF, 0x996A, 0xE2C0, 0x996B,
09757     0xE2C1, 0x996C, 0xE2C2, 0x9974, 0xE2C3, 0x9977, 0xE2C4, 0x997D,
09758     0xE2C5, 0x9980, 0xE2C6, 0x9984, 0xE2C7, 0x9987, 0xE2C8, 0x998A,
09759     0xE2C9, 0x998D, 0xE2CA, 0x9990, 0xE2CB, 0x9991, 0xE2CC, 0x9993,
09760     0xE2CD, 0x9994, 0xE2CE, 0x9995, 0xE2CF, 0x5E80, 0xE2D0, 0x5E91,
09761     0xE2D1, 0x5E8B, 0xE2D2, 0x5E96, 0xE2D3, 0x5EA5, 0xE2D4, 0x5EA0,
09762     0xE2D5, 0x5EB9, 0xE2D6, 0x5EB5, 0xE2D7, 0x5EBE, 0xE2D8, 0x5EB3,
09763     0xE2D9, 0x8D53, 0xE2DA, 0x5ED2, 0xE2DB, 0x5ED1, 0xE2DC, 0x5EDB,
09764     0xE2DD, 0x5EE8, 0xE2DE, 0x5EEA, 0xE2DF, 0x81BA, 0xE2E0, 0x5FC4,
09765     0xE2E1, 0x5FC9, 0xE2E2, 0x5FD6, 0xE2E3, 0x5FCF, 0xE2E4, 0x6003,
09766     0xE2E5, 0x5FEE, 0xE2E6, 0x6004, 0xE2E7, 0x5FE1, 0xE2E8, 0x5FE4,
09767     0xE2E9, 0x5FFE, 0xE2EA, 0x6005, 0xE2EB, 0x6006, 0xE2EC, 0x5FEA,
09768     0xE2ED, 0x5FED, 0xE2EE, 0x5FF8, 0xE2EF, 0x6019, 0xE2F0, 0x6035,
09769     0xE2F1, 0x6026, 0xE2F2, 0x601B, 0xE2F3, 0x600F, 0xE2F4, 0x600D,
09770     0xE2F5, 0x6029, 0xE2F6, 0x602B, 0xE2F7, 0x600A, 0xE2F8, 0x603F,
09771     0xE2F9, 0x6021, 0xE2FA, 0x6078, 0xE2FB, 0x6079, 0xE2FC, 0x607B,
09772     0xE2FD, 0x607A, 0xE2FE, 0x6042, 0xE340, 0x9246, 0xE341, 0x9247,
09773     0xE342, 0x9248, 0xE343, 0x9249, 0xE344, 0x924A, 0xE345, 0x924B,
09774     0xE346, 0x924C, 0xE347, 0x924D, 0xE348, 0x924E, 0xE349, 0x924F,
09775     0xE34A, 0x9250, 0xE34B, 0x9251, 0xE34C, 0x9252, 0xE34D, 0x9253,
09776     0xE34E, 0x9254, 0xE34F, 0x9255, 0xE350, 0x9256, 0xE351, 0x9257,
09777     0xE352, 0x9258, 0xE353, 0x9259, 0xE354, 0x925A, 0xE355, 0x925B,
09778     0xE356, 0x925C, 0xE357, 0x925D, 0xE358, 0x925E, 0xE359, 0x925F,
09779     0xE35A, 0x9260, 0xE35B, 0x9261, 0xE35C, 0x9262, 0xE35D, 0x9263,
09780     0xE35E, 0x9264, 0xE35F, 0x9265, 0xE360, 0x9266, 0xE361, 0x9267,
09781     0xE362, 0x9268, 0xE363, 0x9269, 0xE364, 0x926A, 0xE365, 0x926B,
09782     0xE366, 0x926C, 0xE367, 0x926D, 0xE368, 0x926E, 0xE369, 0x926F,
09783     0xE36A, 0x9270, 0xE36B, 0x9271, 0xE36C, 0x9272, 0xE36D, 0x9273,
09784     0xE36E, 0x9275, 0xE36F, 0x9276, 0xE370, 0x9277, 0xE371, 0x9278,
09785     0xE372, 0x9279, 0xE373, 0x927A, 0xE374, 0x927B, 0xE375, 0x927C,
09786     0xE376, 0x927D, 0xE377, 0x927E, 0xE378, 0x927F, 0xE379, 0x9280,
09787     0xE37A, 0x9281, 0xE37B, 0x9282, 0xE37C, 0x9283, 0xE37D, 0x9284,
09788     0xE37E, 0x9285, 0xE380, 0x9286, 0xE381, 0x9287, 0xE382, 0x9288,
09789     0xE383, 0x9289, 0xE384, 0x928A, 0xE385, 0x928B, 0xE386, 0x928C,
09790     0xE387, 0x928D, 0xE388, 0x928F, 0xE389, 0x9290, 0xE38A, 0x9291,
09791     0xE38B, 0x9292, 0xE38C, 0x9293, 0xE38D, 0x9294, 0xE38E, 0x9295,
09792     0xE38F, 0x9296, 0xE390, 0x9297, 0xE391, 0x9298, 0xE392, 0x9299,
09793     0xE393, 0x929A, 0xE394, 0x929B, 0xE395, 0x929C, 0xE396, 0x929D,
09794     0xE397, 0x929E, 0xE398, 0x929F, 0xE399, 0x92A0, 0xE39A, 0x92A1,
09795     0xE39B, 0x92A2, 0xE39C, 0x92A3, 0xE39D, 0x92A4, 0xE39E, 0x92A5,
09796     0xE39F, 0x92A6, 0xE3A0, 0x92A7, 0xE3A1, 0x606A, 0xE3A2, 0x607D,
09797     0xE3A3, 0x6096, 0xE3A4, 0x609A, 0xE3A5, 0x60AD, 0xE3A6, 0x609D,
09798     0xE3A7, 0x6083, 0xE3A8, 0x6092, 0xE3A9, 0x608C, 0xE3AA, 0x609B,
09799     0xE3AB, 0x60EC, 0xE3AC, 0x60BB, 0xE3AD, 0x60B1, 0xE3AE, 0x60DD,
09800     0xE3AF, 0x60D8, 0xE3B0, 0x60C6, 0xE3B1, 0x60DA, 0xE3B2, 0x60B4,
09801     0xE3B3, 0x6120, 0xE3B4, 0x6126, 0xE3B5, 0x6115, 0xE3B6, 0x6123,
09802     0xE3B7, 0x60F4, 0xE3B8, 0x6100, 0xE3B9, 0x610E, 0xE3BA, 0x612B,
09803     0xE3BB, 0x614A, 0xE3BC, 0x6175, 0xE3BD, 0x61AC, 0xE3BE, 0x6194,
09804     0xE3BF, 0x61A7, 0xE3C0, 0x61B7, 0xE3C1, 0x61D4, 0xE3C2, 0x61F5,
09805     0xE3C3, 0x5FDD, 0xE3C4, 0x96B3, 0xE3C5, 0x95E9, 0xE3C6, 0x95EB,
09806     0xE3C7, 0x95F1, 0xE3C8, 0x95F3, 0xE3C9, 0x95F5, 0xE3CA, 0x95F6,
09807     0xE3CB, 0x95FC, 0xE3CC, 0x95FE, 0xE3CD, 0x9603, 0xE3CE, 0x9604,
09808     0xE3CF, 0x9606, 0xE3D0, 0x9608, 0xE3D1, 0x960A, 0xE3D2, 0x960B,
09809     0xE3D3, 0x960C, 0xE3D4, 0x960D, 0xE3D5, 0x960F, 0xE3D6, 0x9612,
09810     0xE3D7, 0x9615, 0xE3D8, 0x9616, 0xE3D9, 0x9617, 0xE3DA, 0x9619,
09811     0xE3DB, 0x961A, 0xE3DC, 0x4E2C, 0xE3DD, 0x723F, 0xE3DE, 0x6215,
09812     0xE3DF, 0x6C35, 0xE3E0, 0x6C54, 0xE3E1, 0x6C5C, 0xE3E2, 0x6C4A,
09813     0xE3E3, 0x6CA3, 0xE3E4, 0x6C85, 0xE3E5, 0x6C90, 0xE3E6, 0x6C94,
09814     0xE3E7, 0x6C8C, 0xE3E8, 0x6C68, 0xE3E9, 0x6C69, 0xE3EA, 0x6C74,
09815     0xE3EB, 0x6C76, 0xE3EC, 0x6C86, 0xE3ED, 0x6CA9, 0xE3EE, 0x6CD0,
09816     0xE3EF, 0x6CD4, 0xE3F0, 0x6CAD, 0xE3F1, 0x6CF7, 0xE3F2, 0x6CF8,
09817     0xE3F3, 0x6CF1, 0xE3F4, 0x6CD7, 0xE3F5, 0x6CB2, 0xE3F6, 0x6CE0,
09818     0xE3F7, 0x6CD6, 0xE3F8, 0x6CFA, 0xE3F9, 0x6CEB, 0xE3FA, 0x6CEE,
09819     0xE3FB, 0x6CB1, 0xE3FC, 0x6CD3, 0xE3FD, 0x6CEF, 0xE3FE, 0x6CFE,
09820     0xE440, 0x92A8, 0xE441, 0x92A9, 0xE442, 0x92AA, 0xE443, 0x92AB,
09821     0xE444, 0x92AC, 0xE445, 0x92AD, 0xE446, 0x92AF, 0xE447, 0x92B0,
09822     0xE448, 0x92B1, 0xE449, 0x92B2, 0xE44A, 0x92B3, 0xE44B, 0x92B4,
09823     0xE44C, 0x92B5, 0xE44D, 0x92B6, 0xE44E, 0x92B7, 0xE44F, 0x92B8,
09824     0xE450, 0x92B9, 0xE451, 0x92BA, 0xE452, 0x92BB, 0xE453, 0x92BC,
09825     0xE454, 0x92BD, 0xE455, 0x92BE, 0xE456, 0x92BF, 0xE457, 0x92C0,
09826     0xE458, 0x92C1, 0xE459, 0x92C2, 0xE45A, 0x92C3, 0xE45B, 0x92C4,
09827     0xE45C, 0x92C5, 0xE45D, 0x92C6, 0xE45E, 0x92C7, 0xE45F, 0x92C9,
09828     0xE460, 0x92CA, 0xE461, 0x92CB, 0xE462, 0x92CC, 0xE463, 0x92CD,
09829     0xE464, 0x92CE, 0xE465, 0x92CF, 0xE466, 0x92D0, 0xE467, 0x92D1,
09830     0xE468, 0x92D2, 0xE469, 0x92D3, 0xE46A, 0x92D4, 0xE46B, 0x92D5,
09831     0xE46C, 0x92D6, 0xE46D, 0x92D7, 0xE46E, 0x92D8, 0xE46F, 0x92D9,
09832     0xE470, 0x92DA, 0xE471, 0x92DB, 0xE472, 0x92DC, 0xE473, 0x92DD,
09833     0xE474, 0x92DE, 0xE475, 0x92DF, 0xE476, 0x92E0, 0xE477, 0x92E1,
09834     0xE478, 0x92E2, 0xE479, 0x92E3, 0xE47A, 0x92E4, 0xE47B, 0x92E5,
09835     0xE47C, 0x92E6, 0xE47D, 0x92E7, 0xE47E, 0x92E8, 0xE480, 0x92E9,
09836     0xE481, 0x92EA, 0xE482, 0x92EB, 0xE483, 0x92EC, 0xE484, 0x92ED,
09837     0xE485, 0x92EE, 0xE486, 0x92EF, 0xE487, 0x92F0, 0xE488, 0x92F1,
09838     0xE489, 0x92F2, 0xE48A, 0x92F3, 0xE48B, 0x92F4, 0xE48C, 0x92F5,
09839     0xE48D, 0x92F6, 0xE48E, 0x92F7, 0xE48F, 0x92F8, 0xE490, 0x92F9,
09840     0xE491, 0x92FA, 0xE492, 0x92FB, 0xE493, 0x92FC, 0xE494, 0x92FD,
09841     0xE495, 0x92FE, 0xE496, 0x92FF, 0xE497, 0x9300, 0xE498, 0x9301,
09842     0xE499, 0x9302, 0xE49A, 0x9303, 0xE49B, 0x9304, 0xE49C, 0x9305,
09843     0xE49D, 0x9306, 0xE49E, 0x9307, 0xE49F, 0x9308, 0xE4A0, 0x9309,
09844     0xE4A1, 0x6D39, 0xE4A2, 0x6D27, 0xE4A3, 0x6D0C, 0xE4A4, 0x6D43,
09845     0xE4A5, 0x6D48, 0xE4A6, 0x6D07, 0xE4A7, 0x6D04, 0xE4A8, 0x6D19,
09846     0xE4A9, 0x6D0E, 0xE4AA, 0x6D2B, 0xE4AB, 0x6D4D, 0xE4AC, 0x6D2E,
09847     0xE4AD, 0x6D35, 0xE4AE, 0x6D1A, 0xE4AF, 0x6D4F, 0xE4B0, 0x6D52,
09848     0xE4B1, 0x6D54, 0xE4B2, 0x6D33, 0xE4B3, 0x6D91, 0xE4B4, 0x6D6F,
09849     0xE4B5, 0x6D9E, 0xE4B6, 0x6DA0, 0xE4B7, 0x6D5E, 0xE4B8, 0x6D93,
09850     0xE4B9, 0x6D94, 0xE4BA, 0x6D5C, 0xE4BB, 0x6D60, 0xE4BC, 0x6D7C,
09851     0xE4BD, 0x6D63, 0xE4BE, 0x6E1A, 0xE4BF, 0x6DC7, 0xE4C0, 0x6DC5,
09852     0xE4C1, 0x6DDE, 0xE4C2, 0x6E0E, 0xE4C3, 0x6DBF, 0xE4C4, 0x6DE0,
09853     0xE4C5, 0x6E11, 0xE4C6, 0x6DE6, 0xE4C7, 0x6DDD, 0xE4C8, 0x6DD9,
09854     0xE4C9, 0x6E16, 0xE4CA, 0x6DAB, 0xE4CB, 0x6E0C, 0xE4CC, 0x6DAE,
09855     0xE4CD, 0x6E2B, 0xE4CE, 0x6E6E, 0xE4CF, 0x6E4E, 0xE4D0, 0x6E6B,
09856     0xE4D1, 0x6EB2, 0xE4D2, 0x6E5F, 0xE4D3, 0x6E86, 0xE4D4, 0x6E53,
09857     0xE4D5, 0x6E54, 0xE4D6, 0x6E32, 0xE4D7, 0x6E25, 0xE4D8, 0x6E44,
09858     0xE4D9, 0x6EDF, 0xE4DA, 0x6EB1, 0xE4DB, 0x6E98, 0xE4DC, 0x6EE0,
09859     0xE4DD, 0x6F2D, 0xE4DE, 0x6EE2, 0xE4DF, 0x6EA5, 0xE4E0, 0x6EA7,
09860     0xE4E1, 0x6EBD, 0xE4E2, 0x6EBB, 0xE4E3, 0x6EB7, 0xE4E4, 0x6ED7,
09861     0xE4E5, 0x6EB4, 0xE4E6, 0x6ECF, 0xE4E7, 0x6E8F, 0xE4E8, 0x6EC2,
09862     0xE4E9, 0x6E9F, 0xE4EA, 0x6F62, 0xE4EB, 0x6F46, 0xE4EC, 0x6F47,
09863     0xE4ED, 0x6F24, 0xE4EE, 0x6F15, 0xE4EF, 0x6EF9, 0xE4F0, 0x6F2F,
09864     0xE4F1, 0x6F36, 0xE4F2, 0x6F4B, 0xE4F3, 0x6F74, 0xE4F4, 0x6F2A,
09865     0xE4F5, 0x6F09, 0xE4F6, 0x6F29, 0xE4F7, 0x6F89, 0xE4F8, 0x6F8D,
09866     0xE4F9, 0x6F8C, 0xE4FA, 0x6F78, 0xE4FB, 0x6F72, 0xE4FC, 0x6F7C,
09867     0xE4FD, 0x6F7A, 0xE4FE, 0x6FD1, 0xE540, 0x930A, 0xE541, 0x930B,
09868     0xE542, 0x930C, 0xE543, 0x930D, 0xE544, 0x930E, 0xE545, 0x930F,
09869     0xE546, 0x9310, 0xE547, 0x9311, 0xE548, 0x9312, 0xE549, 0x9313,
09870     0xE54A, 0x9314, 0xE54B, 0x9315, 0xE54C, 0x9316, 0xE54D, 0x9317,
09871     0xE54E, 0x9318, 0xE54F, 0x9319, 0xE550, 0x931A, 0xE551, 0x931B,
09872     0xE552, 0x931C, 0xE553, 0x931D, 0xE554, 0x931E, 0xE555, 0x931F,
09873     0xE556, 0x9320, 0xE557, 0x9321, 0xE558, 0x9322, 0xE559, 0x9323,
09874     0xE55A, 0x9324, 0xE55B, 0x9325, 0xE55C, 0x9326, 0xE55D, 0x9327,
09875     0xE55E, 0x9328, 0xE55F, 0x9329, 0xE560, 0x932A, 0xE561, 0x932B,
09876     0xE562, 0x932C, 0xE563, 0x932D, 0xE564, 0x932E, 0xE565, 0x932F,
09877     0xE566, 0x9330, 0xE567, 0x9331, 0xE568, 0x9332, 0xE569, 0x9333,
09878     0xE56A, 0x9334, 0xE56B, 0x9335, 0xE56C, 0x9336, 0xE56D, 0x9337,
09879     0xE56E, 0x9338, 0xE56F, 0x9339, 0xE570, 0x933A, 0xE571, 0x933B,
09880     0xE572, 0x933C, 0xE573, 0x933D, 0xE574, 0x933F, 0xE575, 0x9340,
09881     0xE576, 0x9341, 0xE577, 0x9342, 0xE578, 0x9343, 0xE579, 0x9344,
09882     0xE57A, 0x9345, 0xE57B, 0x9346, 0xE57C, 0x9347, 0xE57D, 0x9348,
09883     0xE57E, 0x9349, 0xE580, 0x934A, 0xE581, 0x934B, 0xE582, 0x934C,
09884     0xE583, 0x934D, 0xE584, 0x934E, 0xE585, 0x934F, 0xE586, 0x9350,
09885     0xE587, 0x9351, 0xE588, 0x9352, 0xE589, 0x9353, 0xE58A, 0x9354,
09886     0xE58B, 0x9355, 0xE58C, 0x9356, 0xE58D, 0x9357, 0xE58E, 0x9358,
09887     0xE58F, 0x9359, 0xE590, 0x935A, 0xE591, 0x935B, 0xE592, 0x935C,
09888     0xE593, 0x935D, 0xE594, 0x935E, 0xE595, 0x935F, 0xE596, 0x9360,
09889     0xE597, 0x9361, 0xE598, 0x9362, 0xE599, 0x9363, 0xE59A, 0x9364,
09890     0xE59B, 0x9365, 0xE59C, 0x9366, 0xE59D, 0x9367, 0xE59E, 0x9368,
09891     0xE59F, 0x9369, 0xE5A0, 0x936B, 0xE5A1, 0x6FC9, 0xE5A2, 0x6FA7,
09892     0xE5A3, 0x6FB9, 0xE5A4, 0x6FB6, 0xE5A5, 0x6FC2, 0xE5A6, 0x6FE1,
09893     0xE5A7, 0x6FEE, 0xE5A8, 0x6FDE, 0xE5A9, 0x6FE0, 0xE5AA, 0x6FEF,
09894     0xE5AB, 0x701A, 0xE5AC, 0x7023, 0xE5AD, 0x701B, 0xE5AE, 0x7039,
09895     0xE5AF, 0x7035, 0xE5B0, 0x704F, 0xE5B1, 0x705E, 0xE5B2, 0x5B80,
09896     0xE5B3, 0x5B84, 0xE5B4, 0x5B95, 0xE5B5, 0x5B93, 0xE5B6, 0x5BA5,
09897     0xE5B7, 0x5BB8, 0xE5B8, 0x752F, 0xE5B9, 0x9A9E, 0xE5BA, 0x6434,
09898     0xE5BB, 0x5BE4, 0xE5BC, 0x5BEE, 0xE5BD, 0x8930, 0xE5BE, 0x5BF0,
09899     0xE5BF, 0x8E47, 0xE5C0, 0x8B07, 0xE5C1, 0x8FB6, 0xE5C2, 0x8FD3,
09900     0xE5C3, 0x8FD5, 0xE5C4, 0x8FE5, 0xE5C5, 0x8FEE, 0xE5C6, 0x8FE4,
09901     0xE5C7, 0x8FE9, 0xE5C8, 0x8FE6, 0xE5C9, 0x8FF3, 0xE5CA, 0x8FE8,
09902     0xE5CB, 0x9005, 0xE5CC, 0x9004, 0xE5CD, 0x900B, 0xE5CE, 0x9026,
09903     0xE5CF, 0x9011, 0xE5D0, 0x900D, 0xE5D1, 0x9016, 0xE5D2, 0x9021,
09904     0xE5D3, 0x9035, 0xE5D4, 0x9036, 0xE5D5, 0x902D, 0xE5D6, 0x902F,
09905     0xE5D7, 0x9044, 0xE5D8, 0x9051, 0xE5D9, 0x9052, 0xE5DA, 0x9050,
09906     0xE5DB, 0x9068, 0xE5DC, 0x9058, 0xE5DD, 0x9062, 0xE5DE, 0x905B,
09907     0xE5DF, 0x66B9, 0xE5E0, 0x9074, 0xE5E1, 0x907D, 0xE5E2, 0x9082,
09908     0xE5E3, 0x9088, 0xE5E4, 0x9083, 0xE5E5, 0x908B, 0xE5E6, 0x5F50,
09909     0xE5E7, 0x5F57, 0xE5E8, 0x5F56, 0xE5E9, 0x5F58, 0xE5EA, 0x5C3B,
09910     0xE5EB, 0x54AB, 0xE5EC, 0x5C50, 0xE5ED, 0x5C59, 0xE5EE, 0x5B71,
09911     0xE5EF, 0x5C63, 0xE5F0, 0x5C66, 0xE5F1, 0x7FBC, 0xE5F2, 0x5F2A,
09912     0xE5F3, 0x5F29, 0xE5F4, 0x5F2D, 0xE5F5, 0x8274, 0xE5F6, 0x5F3C,
09913     0xE5F7, 0x9B3B, 0xE5F8, 0x5C6E, 0xE5F9, 0x5981, 0xE5FA, 0x5983,
09914     0xE5FB, 0x598D, 0xE5FC, 0x59A9, 0xE5FD, 0x59AA, 0xE5FE, 0x59A3,
09915     0xE640, 0x936C, 0xE641, 0x936D, 0xE642, 0x936E, 0xE643, 0x936F,
09916     0xE644, 0x9370, 0xE645, 0x9371, 0xE646, 0x9372, 0xE647, 0x9373,
09917     0xE648, 0x9374, 0xE649, 0x9375, 0xE64A, 0x9376, 0xE64B, 0x9377,
09918     0xE64C, 0x9378, 0xE64D, 0x9379, 0xE64E, 0x937A, 0xE64F, 0x937B,
09919     0xE650, 0x937C, 0xE651, 0x937D, 0xE652, 0x937E, 0xE653, 0x937F,
09920     0xE654, 0x9380, 0xE655, 0x9381, 0xE656, 0x9382, 0xE657, 0x9383,
09921     0xE658, 0x9384, 0xE659, 0x9385, 0xE65A, 0x9386, 0xE65B, 0x9387,
09922     0xE65C, 0x9388, 0xE65D, 0x9389, 0xE65E, 0x938A, 0xE65F, 0x938B,
09923     0xE660, 0x938C, 0xE661, 0x938D, 0xE662, 0x938E, 0xE663, 0x9390,
09924     0xE664, 0x9391, 0xE665, 0x9392, 0xE666, 0x9393, 0xE667, 0x9394,
09925     0xE668, 0x9395, 0xE669, 0x9396, 0xE66A, 0x9397, 0xE66B, 0x9398,
09926     0xE66C, 0x9399, 0xE66D, 0x939A, 0xE66E, 0x939B, 0xE66F, 0x939C,
09927     0xE670, 0x939D, 0xE671, 0x939E, 0xE672, 0x939F, 0xE673, 0x93A0,
09928     0xE674, 0x93A1, 0xE675, 0x93A2, 0xE676, 0x93A3, 0xE677, 0x93A4,
09929     0xE678, 0x93A5, 0xE679, 0x93A6, 0xE67A, 0x93A7, 0xE67B, 0x93A8,
09930     0xE67C, 0x93A9, 0xE67D, 0x93AA, 0xE67E, 0x93AB, 0xE680, 0x93AC,
09931     0xE681, 0x93AD, 0xE682, 0x93AE, 0xE683, 0x93AF, 0xE684, 0x93B0,
09932     0xE685, 0x93B1, 0xE686, 0x93B2, 0xE687, 0x93B3, 0xE688, 0x93B4,
09933     0xE689, 0x93B5, 0xE68A, 0x93B6, 0xE68B, 0x93B7, 0xE68C, 0x93B8,
09934     0xE68D, 0x93B9, 0xE68E, 0x93BA, 0xE68F, 0x93BB, 0xE690, 0x93BC,
09935     0xE691, 0x93BD, 0xE692, 0x93BE, 0xE693, 0x93BF, 0xE694, 0x93C0,
09936     0xE695, 0x93C1, 0xE696, 0x93C2, 0xE697, 0x93C3, 0xE698, 0x93C4,
09937     0xE699, 0x93C5, 0xE69A, 0x93C6, 0xE69B, 0x93C7, 0xE69C, 0x93C8,
09938     0xE69D, 0x93C9, 0xE69E, 0x93CB, 0xE69F, 0x93CC, 0xE6A0, 0x93CD,
09939     0xE6A1, 0x5997, 0xE6A2, 0x59CA, 0xE6A3, 0x59AB, 0xE6A4, 0x599E,
09940     0xE6A5, 0x59A4, 0xE6A6, 0x59D2, 0xE6A7, 0x59B2, 0xE6A8, 0x59AF,
09941     0xE6A9, 0x59D7, 0xE6AA, 0x59BE, 0xE6AB, 0x5A05, 0xE6AC, 0x5A06,
09942     0xE6AD, 0x59DD, 0xE6AE, 0x5A08, 0xE6AF, 0x59E3, 0xE6B0, 0x59D8,
09943     0xE6B1, 0x59F9, 0xE6B2, 0x5A0C, 0xE6B3, 0x5A09, 0xE6B4, 0x5A32,
09944     0xE6B5, 0x5A34, 0xE6B6, 0x5A11, 0xE6B7, 0x5A23, 0xE6B8, 0x5A13,
09945     0xE6B9, 0x5A40, 0xE6BA, 0x5A67, 0xE6BB, 0x5A4A, 0xE6BC, 0x5A55,
09946     0xE6BD, 0x5A3C, 0xE6BE, 0x5A62, 0xE6BF, 0x5A75, 0xE6C0, 0x80EC,
09947     0xE6C1, 0x5AAA, 0xE6C2, 0x5A9B, 0xE6C3, 0x5A77, 0xE6C4, 0x5A7A,
09948     0xE6C5, 0x5ABE, 0xE6C6, 0x5AEB, 0xE6C7, 0x5AB2, 0xE6C8, 0x5AD2,
09949     0xE6C9, 0x5AD4, 0xE6CA, 0x5AB8, 0xE6CB, 0x5AE0, 0xE6CC, 0x5AE3,
09950     0xE6CD, 0x5AF1, 0xE6CE, 0x5AD6, 0xE6CF, 0x5AE6, 0xE6D0, 0x5AD8,
09951     0xE6D1, 0x5ADC, 0xE6D2, 0x5B09, 0xE6D3, 0x5B17, 0xE6D4, 0x5B16,
09952     0xE6D5, 0x5B32, 0xE6D6, 0x5B37, 0xE6D7, 0x5B40, 0xE6D8, 0x5C15,
09953     0xE6D9, 0x5C1C, 0xE6DA, 0x5B5A, 0xE6DB, 0x5B65, 0xE6DC, 0x5B73,
09954     0xE6DD, 0x5B51, 0xE6DE, 0x5B53, 0xE6DF, 0x5B62, 0xE6E0, 0x9A75,
09955     0xE6E1, 0x9A77, 0xE6E2, 0x9A78, 0xE6E3, 0x9A7A, 0xE6E4, 0x9A7F,
09956     0xE6E5, 0x9A7D, 0xE6E6, 0x9A80, 0xE6E7, 0x9A81, 0xE6E8, 0x9A85,
09957     0xE6E9, 0x9A88, 0xE6EA, 0x9A8A, 0xE6EB, 0x9A90, 0xE6EC, 0x9A92,
09958     0xE6ED, 0x9A93, 0xE6EE, 0x9A96, 0xE6EF, 0x9A98, 0xE6F0, 0x9A9B,
09959     0xE6F1, 0x9A9C, 0xE6F2, 0x9A9D, 0xE6F3, 0x9A9F, 0xE6F4, 0x9AA0,
09960     0xE6F5, 0x9AA2, 0xE6F6, 0x9AA3, 0xE6F7, 0x9AA5, 0xE6F8, 0x9AA7,
09961     0xE6F9, 0x7E9F, 0xE6FA, 0x7EA1, 0xE6FB, 0x7EA3, 0xE6FC, 0x7EA5,
09962     0xE6FD, 0x7EA8, 0xE6FE, 0x7EA9, 0xE740, 0x93CE, 0xE741, 0x93CF,
09963     0xE742, 0x93D0, 0xE743, 0x93D1, 0xE744, 0x93D2, 0xE745, 0x93D3,
09964     0xE746, 0x93D4, 0xE747, 0x93D5, 0xE748, 0x93D7, 0xE749, 0x93D8,
09965     0xE74A, 0x93D9, 0xE74B, 0x93DA, 0xE74C, 0x93DB, 0xE74D, 0x93DC,
09966     0xE74E, 0x93DD, 0xE74F, 0x93DE, 0xE750, 0x93DF, 0xE751, 0x93E0,
09967     0xE752, 0x93E1, 0xE753, 0x93E2, 0xE754, 0x93E3, 0xE755, 0x93E4,
09968     0xE756, 0x93E5, 0xE757, 0x93E6, 0xE758, 0x93E7, 0xE759, 0x93E8,
09969     0xE75A, 0x93E9, 0xE75B, 0x93EA, 0xE75C, 0x93EB, 0xE75D, 0x93EC,
09970     0xE75E, 0x93ED, 0xE75F, 0x93EE, 0xE760, 0x93EF, 0xE761, 0x93F0,
09971     0xE762, 0x93F1, 0xE763, 0x93F2, 0xE764, 0x93F3, 0xE765, 0x93F4,
09972     0xE766, 0x93F5, 0xE767, 0x93F6, 0xE768, 0x93F7, 0xE769, 0x93F8,
09973     0xE76A, 0x93F9, 0xE76B, 0x93FA, 0xE76C, 0x93FB, 0xE76D, 0x93FC,
09974     0xE76E, 0x93FD, 0xE76F, 0x93FE, 0xE770, 0x93FF, 0xE771, 0x9400,
09975     0xE772, 0x9401, 0xE773, 0x9402, 0xE774, 0x9403, 0xE775, 0x9404,
09976     0xE776, 0x9405, 0xE777, 0x9406, 0xE778, 0x9407, 0xE779, 0x9408,
09977     0xE77A, 0x9409, 0xE77B, 0x940A, 0xE77C, 0x940B, 0xE77D, 0x940C,
09978     0xE77E, 0x940D, 0xE780, 0x940E, 0xE781, 0x940F, 0xE782, 0x9410,
09979     0xE783, 0x9411, 0xE784, 0x9412, 0xE785, 0x9413, 0xE786, 0x9414,
09980     0xE787, 0x9415, 0xE788, 0x9416, 0xE789, 0x9417, 0xE78A, 0x9418,
09981     0xE78B, 0x9419, 0xE78C, 0x941A, 0xE78D, 0x941B, 0xE78E, 0x941C,
09982     0xE78F, 0x941D, 0xE790, 0x941E, 0xE791, 0x941F, 0xE792, 0x9420,
09983     0xE793, 0x9421, 0xE794, 0x9422, 0xE795, 0x9423, 0xE796, 0x9424,
09984     0xE797, 0x9425, 0xE798, 0x9426, 0xE799, 0x9427, 0xE79A, 0x9428,
09985     0xE79B, 0x9429, 0xE79C, 0x942A, 0xE79D, 0x942B, 0xE79E, 0x942C,
09986     0xE79F, 0x942D, 0xE7A0, 0x942E, 0xE7A1, 0x7EAD, 0xE7A2, 0x7EB0,
09987     0xE7A3, 0x7EBE, 0xE7A4, 0x7EC0, 0xE7A5, 0x7EC1, 0xE7A6, 0x7EC2,
09988     0xE7A7, 0x7EC9, 0xE7A8, 0x7ECB, 0xE7A9, 0x7ECC, 0xE7AA, 0x7ED0,
09989     0xE7AB, 0x7ED4, 0xE7AC, 0x7ED7, 0xE7AD, 0x7EDB, 0xE7AE, 0x7EE0,
09990     0xE7AF, 0x7EE1, 0xE7B0, 0x7EE8, 0xE7B1, 0x7EEB, 0xE7B2, 0x7EEE,
09991     0xE7B3, 0x7EEF, 0xE7B4, 0x7EF1, 0xE7B5, 0x7EF2, 0xE7B6, 0x7F0D,
09992     0xE7B7, 0x7EF6, 0xE7B8, 0x7EFA, 0xE7B9, 0x7EFB, 0xE7BA, 0x7EFE,
09993     0xE7BB, 0x7F01, 0xE7BC, 0x7F02, 0xE7BD, 0x7F03, 0xE7BE, 0x7F07,
09994     0xE7BF, 0x7F08, 0xE7C0, 0x7F0B, 0xE7C1, 0x7F0C, 0xE7C2, 0x7F0F,
09995     0xE7C3, 0x7F11, 0xE7C4, 0x7F12, 0xE7C5, 0x7F17, 0xE7C6, 0x7F19,
09996     0xE7C7, 0x7F1C, 0xE7C8, 0x7F1B, 0xE7C9, 0x7F1F, 0xE7CA, 0x7F21,
09997     0xE7CB, 0x7F22, 0xE7CC, 0x7F23, 0xE7CD, 0x7F24, 0xE7CE, 0x7F25,
09998     0xE7CF, 0x7F26, 0xE7D0, 0x7F27, 0xE7D1, 0x7F2A, 0xE7D2, 0x7F2B,
09999     0xE7D3, 0x7F2C, 0xE7D4, 0x7F2D, 0xE7D5, 0x7F2F, 0xE7D6, 0x7F30,
10000     0xE7D7, 0x7F31, 0xE7D8, 0x7F32, 0xE7D9, 0x7F33, 0xE7DA, 0x7F35,
10001     0xE7DB, 0x5E7A, 0xE7DC, 0x757F, 0xE7DD, 0x5DDB, 0xE7DE, 0x753E,
10002     0xE7DF, 0x9095, 0xE7E0, 0x738E, 0xE7E1, 0x7391, 0xE7E2, 0x73AE,
10003     0xE7E3, 0x73A2, 0xE7E4, 0x739F, 0xE7E5, 0x73CF, 0xE7E6, 0x73C2,
10004     0xE7E7, 0x73D1, 0xE7E8, 0x73B7, 0xE7E9, 0x73B3, 0xE7EA, 0x73C0,
10005     0xE7EB, 0x73C9, 0xE7EC, 0x73C8, 0xE7ED, 0x73E5, 0xE7EE, 0x73D9,
10006     0xE7EF, 0x987C, 0xE7F0, 0x740A, 0xE7F1, 0x73E9, 0xE7F2, 0x73E7,
10007     0xE7F3, 0x73DE, 0xE7F4, 0x73BA, 0xE7F5, 0x73F2, 0xE7F6, 0x740F,
10008     0xE7F7, 0x742A, 0xE7F8, 0x745B, 0xE7F9, 0x7426, 0xE7FA, 0x7425,
10009     0xE7FB, 0x7428, 0xE7FC, 0x7430, 0xE7FD, 0x742E, 0xE7FE, 0x742C,
10010     0xE840, 0x942F, 0xE841, 0x9430, 0xE842, 0x9431, 0xE843, 0x9432,
10011     0xE844, 0x9433, 0xE845, 0x9434, 0xE846, 0x9435, 0xE847, 0x9436,
10012     0xE848, 0x9437, 0xE849, 0x9438, 0xE84A, 0x9439, 0xE84B, 0x943A,
10013     0xE84C, 0x943B, 0xE84D, 0x943C, 0xE84E, 0x943D, 0xE84F, 0x943F,
10014     0xE850, 0x9440, 0xE851, 0x9441, 0xE852, 0x9442, 0xE853, 0x9443,
10015     0xE854, 0x9444, 0xE855, 0x9445, 0xE856, 0x9446, 0xE857, 0x9447,
10016     0xE858, 0x9448, 0xE859, 0x9449, 0xE85A, 0x944A, 0xE85B, 0x944B,
10017     0xE85C, 0x944C, 0xE85D, 0x944D, 0xE85E, 0x944E, 0xE85F, 0x944F,
10018     0xE860, 0x9450, 0xE861, 0x9451, 0xE862, 0x9452, 0xE863, 0x9453,
10019     0xE864, 0x9454, 0xE865, 0x9455, 0xE866, 0x9456, 0xE867, 0x9457,
10020     0xE868, 0x9458, 0xE869, 0x9459, 0xE86A, 0x945A, 0xE86B, 0x945B,
10021     0xE86C, 0x945C, 0xE86D, 0x945D, 0xE86E, 0x945E, 0xE86F, 0x945F,
10022     0xE870, 0x9460, 0xE871, 0x9461, 0xE872, 0x9462, 0xE873, 0x9463,
10023     0xE874, 0x9464, 0xE875, 0x9465, 0xE876, 0x9466, 0xE877, 0x9467,
10024     0xE878, 0x9468, 0xE879, 0x9469, 0xE87A, 0x946A, 0xE87B, 0x946C,
10025     0xE87C, 0x946D, 0xE87D, 0x946E, 0xE87E, 0x946F, 0xE880, 0x9470,
10026     0xE881, 0x9471, 0xE882, 0x9472, 0xE883, 0x9473, 0xE884, 0x9474,
10027     0xE885, 0x9475, 0xE886, 0x9476, 0xE887, 0x9477, 0xE888, 0x9478,
10028     0xE889, 0x9479, 0xE88A, 0x947A, 0xE88B, 0x947B, 0xE88C, 0x947C,
10029     0xE88D, 0x947D, 0xE88E, 0x947E, 0xE88F, 0x947F, 0xE890, 0x9480,
10030     0xE891, 0x9481, 0xE892, 0x9482, 0xE893, 0x9483, 0xE894, 0x9484,
10031     0xE895, 0x9491, 0xE896, 0x9496, 0xE897, 0x9498, 0xE898, 0x94C7,
10032     0xE899, 0x94CF, 0xE89A, 0x94D3, 0xE89B, 0x94D4, 0xE89C, 0x94DA,
10033     0xE89D, 0x94E6, 0xE89E, 0x94FB, 0xE89F, 0x951C, 0xE8A0, 0x9520,
10034     0xE8A1, 0x741B, 0xE8A2, 0x741A, 0xE8A3, 0x7441, 0xE8A4, 0x745C,
10035     0xE8A5, 0x7457, 0xE8A6, 0x7455, 0xE8A7, 0x7459, 0xE8A8, 0x7477,
10036     0xE8A9, 0x746D, 0xE8AA, 0x747E, 0xE8AB, 0x749C, 0xE8AC, 0x748E,
10037     0xE8AD, 0x7480, 0xE8AE, 0x7481, 0xE8AF, 0x7487, 0xE8B0, 0x748B,
10038     0xE8B1, 0x749E, 0xE8B2, 0x74A8, 0xE8B3, 0x74A9, 0xE8B4, 0x7490,
10039     0xE8B5, 0x74A7, 0xE8B6, 0x74D2, 0xE8B7, 0x74BA, 0xE8B8, 0x97EA,
10040     0xE8B9, 0x97EB, 0xE8BA, 0x97EC, 0xE8BB, 0x674C, 0xE8BC, 0x6753,
10041     0xE8BD, 0x675E, 0xE8BE, 0x6748, 0xE8BF, 0x6769, 0xE8C0, 0x67A5,
10042     0xE8C1, 0x6787, 0xE8C2, 0x676A, 0xE8C3, 0x6773, 0xE8C4, 0x6798,
10043     0xE8C5, 0x67A7, 0xE8C6, 0x6775, 0xE8C7, 0x67A8, 0xE8C8, 0x679E,
10044     0xE8C9, 0x67AD, 0xE8CA, 0x678B, 0xE8CB, 0x6777, 0xE8CC, 0x677C,
10045     0xE8CD, 0x67F0, 0xE8CE, 0x6809, 0xE8CF, 0x67D8, 0xE8D0, 0x680A,
10046     0xE8D1, 0x67E9, 0xE8D2, 0x67B0, 0xE8D3, 0x680C, 0xE8D4, 0x67D9,
10047     0xE8D5, 0x67B5, 0xE8D6, 0x67DA, 0xE8D7, 0x67B3, 0xE8D8, 0x67DD,
10048     0xE8D9, 0x6800, 0xE8DA, 0x67C3, 0xE8DB, 0x67B8, 0xE8DC, 0x67E2,
10049     0xE8DD, 0x680E, 0xE8DE, 0x67C1, 0xE8DF, 0x67FD, 0xE8E0, 0x6832,
10050     0xE8E1, 0x6833, 0xE8E2, 0x6860, 0xE8E3, 0x6861, 0xE8E4, 0x684E,
10051     0xE8E5, 0x6862, 0xE8E6, 0x6844, 0xE8E7, 0x6864, 0xE8E8, 0x6883,
10052     0xE8E9, 0x681D, 0xE8EA, 0x6855, 0xE8EB, 0x6866, 0xE8EC, 0x6841,
10053     0xE8ED, 0x6867, 0xE8EE, 0x6840, 0xE8EF, 0x683E, 0xE8F0, 0x684A,
10054     0xE8F1, 0x6849, 0xE8F2, 0x6829, 0xE8F3, 0x68B5, 0xE8F4, 0x688F,
10055     0xE8F5, 0x6874, 0xE8F6, 0x6877, 0xE8F7, 0x6893, 0xE8F8, 0x686B,
10056     0xE8F9, 0x68C2, 0xE8FA, 0x696E, 0xE8FB, 0x68FC, 0xE8FC, 0x691F,
10057     0xE8FD, 0x6920, 0xE8FE, 0x68F9, 0xE940, 0x9527, 0xE941, 0x9533,
10058     0xE942, 0x953D, 0xE943, 0x9543, 0xE944, 0x9548, 0xE945, 0x954B,
10059     0xE946, 0x9555, 0xE947, 0x955A, 0xE948, 0x9560, 0xE949, 0x956E,
10060     0xE94A, 0x9574, 0xE94B, 0x9575, 0xE94C, 0x9577, 0xE94D, 0x9578,
10061     0xE94E, 0x9579, 0xE94F, 0x957A, 0xE950, 0x957B, 0xE951, 0x957C,
10062     0xE952, 0x957D, 0xE953, 0x957E, 0xE954, 0x9580, 0xE955, 0x9581,
10063     0xE956, 0x9582, 0xE957, 0x9583, 0xE958, 0x9584, 0xE959, 0x9585,
10064     0xE95A, 0x9586, 0xE95B, 0x9587, 0xE95C, 0x9588, 0xE95D, 0x9589,
10065     0xE95E, 0x958A, 0xE95F, 0x958B, 0xE960, 0x958C, 0xE961, 0x958D,
10066     0xE962, 0x958E, 0xE963, 0x958F, 0xE964, 0x9590, 0xE965, 0x9591,
10067     0xE966, 0x9592, 0xE967, 0x9593, 0xE968, 0x9594, 0xE969, 0x9595,
10068     0xE96A, 0x9596, 0xE96B, 0x9597, 0xE96C, 0x9598, 0xE96D, 0x9599,
10069     0xE96E, 0x959A, 0xE96F, 0x959B, 0xE970, 0x959C, 0xE971, 0x959D,
10070     0xE972, 0x959E, 0xE973, 0x959F, 0xE974, 0x95A0, 0xE975, 0x95A1,
10071     0xE976, 0x95A2, 0xE977, 0x95A3, 0xE978, 0x95A4, 0xE979, 0x95A5,
10072     0xE97A, 0x95A6, 0xE97B, 0x95A7, 0xE97C, 0x95A8, 0xE97D, 0x95A9,
10073     0xE97E, 0x95AA, 0xE980, 0x95AB, 0xE981, 0x95AC, 0xE982, 0x95AD,
10074     0xE983, 0x95AE, 0xE984, 0x95AF, 0xE985, 0x95B0, 0xE986, 0x95B1,
10075     0xE987, 0x95B2, 0xE988, 0x95B3, 0xE989, 0x95B4, 0xE98A, 0x95B5,
10076     0xE98B, 0x95B6, 0xE98C, 0x95B7, 0xE98D, 0x95B8, 0xE98E, 0x95B9,
10077     0xE98F, 0x95BA, 0xE990, 0x95BB, 0xE991, 0x95BC, 0xE992, 0x95BD,
10078     0xE993, 0x95BE, 0xE994, 0x95BF, 0xE995, 0x95C0, 0xE996, 0x95C1,
10079     0xE997, 0x95C2, 0xE998, 0x95C3, 0xE999, 0x95C4, 0xE99A, 0x95C5,
10080     0xE99B, 0x95C6, 0xE99C, 0x95C7, 0xE99D, 0x95C8, 0xE99E, 0x95C9,
10081     0xE99F, 0x95CA, 0xE9A0, 0x95CB, 0xE9A1, 0x6924, 0xE9A2, 0x68F0,
10082     0xE9A3, 0x690B, 0xE9A4, 0x6901, 0xE9A5, 0x6957, 0xE9A6, 0x68E3,
10083     0xE9A7, 0x6910, 0xE9A8, 0x6971, 0xE9A9, 0x6939, 0xE9AA, 0x6960,
10084     0xE9AB, 0x6942, 0xE9AC, 0x695D, 0xE9AD, 0x6984, 0xE9AE, 0x696B,
10085     0xE9AF, 0x6980, 0xE9B0, 0x6998, 0xE9B1, 0x6978, 0xE9B2, 0x6934,
10086     0xE9B3, 0x69CC, 0xE9B4, 0x6987, 0xE9B5, 0x6988, 0xE9B6, 0x69CE,
10087     0xE9B7, 0x6989, 0xE9B8, 0x6966, 0xE9B9, 0x6963, 0xE9BA, 0x6979,
10088     0xE9BB, 0x699B, 0xE9BC, 0x69A7, 0xE9BD, 0x69BB, 0xE9BE, 0x69AB,
10089     0xE9BF, 0x69AD, 0xE9C0, 0x69D4, 0xE9C1, 0x69B1, 0xE9C2, 0x69C1,
10090     0xE9C3, 0x69CA, 0xE9C4, 0x69DF, 0xE9C5, 0x6995, 0xE9C6, 0x69E0,
10091     0xE9C7, 0x698D, 0xE9C8, 0x69FF, 0xE9C9, 0x6A2F, 0xE9CA, 0x69ED,
10092     0xE9CB, 0x6A17, 0xE9CC, 0x6A18, 0xE9CD, 0x6A65, 0xE9CE, 0x69F2,
10093     0xE9CF, 0x6A44, 0xE9D0, 0x6A3E, 0xE9D1, 0x6AA0, 0xE9D2, 0x6A50,
10094     0xE9D3, 0x6A5B, 0xE9D4, 0x6A35, 0xE9D5, 0x6A8E, 0xE9D6, 0x6A79,
10095     0xE9D7, 0x6A3D, 0xE9D8, 0x6A28, 0xE9D9, 0x6A58, 0xE9DA, 0x6A7C,
10096     0xE9DB, 0x6A91, 0xE9DC, 0x6A90, 0xE9DD, 0x6AA9, 0xE9DE, 0x6A97,
10097     0xE9DF, 0x6AAB, 0xE9E0, 0x7337, 0xE9E1, 0x7352, 0xE9E2, 0x6B81,
10098     0xE9E3, 0x6B82, 0xE9E4, 0x6B87, 0xE9E5, 0x6B84, 0xE9E6, 0x6B92,
10099     0xE9E7, 0x6B93, 0xE9E8, 0x6B8D, 0xE9E9, 0x6B9A, 0xE9EA, 0x6B9B,
10100     0xE9EB, 0x6BA1, 0xE9EC, 0x6BAA, 0xE9ED, 0x8F6B, 0xE9EE, 0x8F6D,
10101     0xE9EF, 0x8F71, 0xE9F0, 0x8F72, 0xE9F1, 0x8F73, 0xE9F2, 0x8F75,
10102     0xE9F3, 0x8F76, 0xE9F4, 0x8F78, 0xE9F5, 0x8F77, 0xE9F6, 0x8F79,
10103     0xE9F7, 0x8F7A, 0xE9F8, 0x8F7C, 0xE9F9, 0x8F7E, 0xE9FA, 0x8F81,
10104     0xE9FB, 0x8F82, 0xE9FC, 0x8F84, 0xE9FD, 0x8F87, 0xE9FE, 0x8F8B,
10105     0xEA40, 0x95CC, 0xEA41, 0x95CD, 0xEA42, 0x95CE, 0xEA43, 0x95CF,
10106     0xEA44, 0x95D0, 0xEA45, 0x95D1, 0xEA46, 0x95D2, 0xEA47, 0x95D3,
10107     0xEA48, 0x95D4, 0xEA49, 0x95D5, 0xEA4A, 0x95D6, 0xEA4B, 0x95D7,
10108     0xEA4C, 0x95D8, 0xEA4D, 0x95D9, 0xEA4E, 0x95DA, 0xEA4F, 0x95DB,
10109     0xEA50, 0x95DC, 0xEA51, 0x95DD, 0xEA52, 0x95DE, 0xEA53, 0x95DF,
10110     0xEA54, 0x95E0, 0xEA55, 0x95E1, 0xEA56, 0x95E2, 0xEA57, 0x95E3,
10111     0xEA58, 0x95E4, 0xEA59, 0x95E5, 0xEA5A, 0x95E6, 0xEA5B, 0x95E7,
10112     0xEA5C, 0x95EC, 0xEA5D, 0x95FF, 0xEA5E, 0x9607, 0xEA5F, 0x9613,
10113     0xEA60, 0x9618, 0xEA61, 0x961B, 0xEA62, 0x961E, 0xEA63, 0x9620,
10114     0xEA64, 0x9623, 0xEA65, 0x9624, 0xEA66, 0x9625, 0xEA67, 0x9626,
10115     0xEA68, 0x9627, 0xEA69, 0x9628, 0xEA6A, 0x9629, 0xEA6B, 0x962B,
10116     0xEA6C, 0x962C, 0xEA6D, 0x962D, 0xEA6E, 0x962F, 0xEA6F, 0x9630,
10117     0xEA70, 0x9637, 0xEA71, 0x9638, 0xEA72, 0x9639, 0xEA73, 0x963A,
10118     0xEA74, 0x963E, 0xEA75, 0x9641, 0xEA76, 0x9643, 0xEA77, 0x964A,
10119     0xEA78, 0x964E, 0xEA79, 0x964F, 0xEA7A, 0x9651, 0xEA7B, 0x9652,
10120     0xEA7C, 0x9653, 0xEA7D, 0x9656, 0xEA7E, 0x9657, 0xEA80, 0x9658,
10121     0xEA81, 0x9659, 0xEA82, 0x965A, 0xEA83, 0x965C, 0xEA84, 0x965D,
10122     0xEA85, 0x965E, 0xEA86, 0x9660, 0xEA87, 0x9663, 0xEA88, 0x9665,
10123     0xEA89, 0x9666, 0xEA8A, 0x966B, 0xEA8B, 0x966D, 0xEA8C, 0x966E,
10124     0xEA8D, 0x966F, 0xEA8E, 0x9670, 0xEA8F, 0x9671, 0xEA90, 0x9673,
10125     0xEA91, 0x9678, 0xEA92, 0x9679, 0xEA93, 0x967A, 0xEA94, 0x967B,
10126     0xEA95, 0x967C, 0xEA96, 0x967D, 0xEA97, 0x967E, 0xEA98, 0x967F,
10127     0xEA99, 0x9680, 0xEA9A, 0x9681, 0xEA9B, 0x9682, 0xEA9C, 0x9683,
10128     0xEA9D, 0x9684, 0xEA9E, 0x9687, 0xEA9F, 0x9689, 0xEAA0, 0x968A,
10129     0xEAA1, 0x8F8D, 0xEAA2, 0x8F8E, 0xEAA3, 0x8F8F, 0xEAA4, 0x8F98,
10130     0xEAA5, 0x8F9A, 0xEAA6, 0x8ECE, 0xEAA7, 0x620B, 0xEAA8, 0x6217,
10131     0xEAA9, 0x621B, 0xEAAA, 0x621F, 0xEAAB, 0x6222, 0xEAAC, 0x6221,
10132     0xEAAD, 0x6225, 0xEAAE, 0x6224, 0xEAAF, 0x622C, 0xEAB0, 0x81E7,
10133     0xEAB1, 0x74EF, 0xEAB2, 0x74F4, 0xEAB3, 0x74FF, 0xEAB4, 0x750F,
10134     0xEAB5, 0x7511, 0xEAB6, 0x7513, 0xEAB7, 0x6534, 0xEAB8, 0x65EE,
10135     0xEAB9, 0x65EF, 0xEABA, 0x65F0, 0xEABB, 0x660A, 0xEABC, 0x6619,
10136     0xEABD, 0x6772, 0xEABE, 0x6603, 0xEABF, 0x6615, 0xEAC0, 0x6600,
10137     0xEAC1, 0x7085, 0xEAC2, 0x66F7, 0xEAC3, 0x661D, 0xEAC4, 0x6634,
10138     0xEAC5, 0x6631, 0xEAC6, 0x6636, 0xEAC7, 0x6635, 0xEAC8, 0x8006,
10139     0xEAC9, 0x665F, 0xEACA, 0x6654, 0xEACB, 0x6641, 0xEACC, 0x664F,
10140     0xEACD, 0x6656, 0xEACE, 0x6661, 0xEACF, 0x6657, 0xEAD0, 0x6677,
10141     0xEAD1, 0x6684, 0xEAD2, 0x668C, 0xEAD3, 0x66A7, 0xEAD4, 0x669D,
10142     0xEAD5, 0x66BE, 0xEAD6, 0x66DB, 0xEAD7, 0x66DC, 0xEAD8, 0x66E6,
10143     0xEAD9, 0x66E9, 0xEADA, 0x8D32, 0xEADB, 0x8D33, 0xEADC, 0x8D36,
10144     0xEADD, 0x8D3B, 0xEADE, 0x8D3D, 0xEADF, 0x8D40, 0xEAE0, 0x8D45,
10145     0xEAE1, 0x8D46, 0xEAE2, 0x8D48, 0xEAE3, 0x8D49, 0xEAE4, 0x8D47,
10146     0xEAE5, 0x8D4D, 0xEAE6, 0x8D55, 0xEAE7, 0x8D59, 0xEAE8, 0x89C7,
10147     0xEAE9, 0x89CA, 0xEAEA, 0x89CB, 0xEAEB, 0x89CC, 0xEAEC, 0x89CE,
10148     0xEAED, 0x89CF, 0xEAEE, 0x89D0, 0xEAEF, 0x89D1, 0xEAF0, 0x726E,
10149     0xEAF1, 0x729F, 0xEAF2, 0x725D, 0xEAF3, 0x7266, 0xEAF4, 0x726F,
10150     0xEAF5, 0x727E, 0xEAF6, 0x727F, 0xEAF7, 0x7284, 0xEAF8, 0x728B,
10151     0xEAF9, 0x728D, 0xEAFA, 0x728F, 0xEAFB, 0x7292, 0xEAFC, 0x6308,
10152     0xEAFD, 0x6332, 0xEAFE, 0x63B0, 0xEB40, 0x968C, 0xEB41, 0x968E,
10153     0xEB42, 0x9691, 0xEB43, 0x9692, 0xEB44, 0x9693, 0xEB45, 0x9695,
10154     0xEB46, 0x9696, 0xEB47, 0x969A, 0xEB48, 0x969B, 0xEB49, 0x969D,
10155     0xEB4A, 0x969E, 0xEB4B, 0x969F, 0xEB4C, 0x96A0, 0xEB4D, 0x96A1,
10156     0xEB4E, 0x96A2, 0xEB4F, 0x96A3, 0xEB50, 0x96A4, 0xEB51, 0x96A5,
10157     0xEB52, 0x96A6, 0xEB53, 0x96A8, 0xEB54, 0x96A9, 0xEB55, 0x96AA,
10158     0xEB56, 0x96AB, 0xEB57, 0x96AC, 0xEB58, 0x96AD, 0xEB59, 0x96AE,
10159     0xEB5A, 0x96AF, 0xEB5B, 0x96B1, 0xEB5C, 0x96B2, 0xEB5D, 0x96B4,
10160     0xEB5E, 0x96B5, 0xEB5F, 0x96B7, 0xEB60, 0x96B8, 0xEB61, 0x96BA,
10161     0xEB62, 0x96BB, 0xEB63, 0x96BF, 0xEB64, 0x96C2, 0xEB65, 0x96C3,
10162     0xEB66, 0x96C8, 0xEB67, 0x96CA, 0xEB68, 0x96CB, 0xEB69, 0x96D0,
10163     0xEB6A, 0x96D1, 0xEB6B, 0x96D3, 0xEB6C, 0x96D4, 0xEB6D, 0x96D6,
10164     0xEB6E, 0x96D7, 0xEB6F, 0x96D8, 0xEB70, 0x96D9, 0xEB71, 0x96DA,
10165     0xEB72, 0x96DB, 0xEB73, 0x96DC, 0xEB74, 0x96DD, 0xEB75, 0x96DE,
10166     0xEB76, 0x96DF, 0xEB77, 0x96E1, 0xEB78, 0x96E2, 0xEB79, 0x96E3,
10167     0xEB7A, 0x96E4, 0xEB7B, 0x96E5, 0xEB7C, 0x96E6, 0xEB7D, 0x96E7,
10168     0xEB7E, 0x96EB, 0xEB80, 0x96EC, 0xEB81, 0x96ED, 0xEB82, 0x96EE,
10169     0xEB83, 0x96F0, 0xEB84, 0x96F1, 0xEB85, 0x96F2, 0xEB86, 0x96F4,
10170     0xEB87, 0x96F5, 0xEB88, 0x96F8, 0xEB89, 0x96FA, 0xEB8A, 0x96FB,
10171     0xEB8B, 0x96FC, 0xEB8C, 0x96FD, 0xEB8D, 0x96FF, 0xEB8E, 0x9702,
10172     0xEB8F, 0x9703, 0xEB90, 0x9705, 0xEB91, 0x970A, 0xEB92, 0x970B,
10173     0xEB93, 0x970C, 0xEB94, 0x9710, 0xEB95, 0x9711, 0xEB96, 0x9712,
10174     0xEB97, 0x9714, 0xEB98, 0x9715, 0xEB99, 0x9717, 0xEB9A, 0x9718,
10175     0xEB9B, 0x9719, 0xEB9C, 0x971A, 0xEB9D, 0x971B, 0xEB9E, 0x971D,
10176     0xEB9F, 0x971F, 0xEBA0, 0x9720, 0xEBA1, 0x643F, 0xEBA2, 0x64D8,
10177     0xEBA3, 0x8004, 0xEBA4, 0x6BEA, 0xEBA5, 0x6BF3, 0xEBA6, 0x6BFD,
10178     0xEBA7, 0x6BF5, 0xEBA8, 0x6BF9, 0xEBA9, 0x6C05, 0xEBAA, 0x6C07,
10179     0xEBAB, 0x6C06, 0xEBAC, 0x6C0D, 0xEBAD, 0x6C15, 0xEBAE, 0x6C18,
10180     0xEBAF, 0x6C19, 0xEBB0, 0x6C1A, 0xEBB1, 0x6C21, 0xEBB2, 0x6C29,
10181     0xEBB3, 0x6C24, 0xEBB4, 0x6C2A, 0xEBB5, 0x6C32, 0xEBB6, 0x6535,
10182     0xEBB7, 0x6555, 0xEBB8, 0x656B, 0xEBB9, 0x724D, 0xEBBA, 0x7252,
10183     0xEBBB, 0x7256, 0xEBBC, 0x7230, 0xEBBD, 0x8662, 0xEBBE, 0x5216,
10184     0xEBBF, 0x809F, 0xEBC0, 0x809C, 0xEBC1, 0x8093, 0xEBC2, 0x80BC,
10185     0xEBC3, 0x670A, 0xEBC4, 0x80BD, 0xEBC5, 0x80B1, 0xEBC6, 0x80AB,
10186     0xEBC7, 0x80AD, 0xEBC8, 0x80B4, 0xEBC9, 0x80B7, 0xEBCA, 0x80E7,
10187     0xEBCB, 0x80E8, 0xEBCC, 0x80E9, 0xEBCD, 0x80EA, 0xEBCE, 0x80DB,
10188     0xEBCF, 0x80C2, 0xEBD0, 0x80C4, 0xEBD1, 0x80D9, 0xEBD2, 0x80CD,
10189     0xEBD3, 0x80D7, 0xEBD4, 0x6710, 0xEBD5, 0x80DD, 0xEBD6, 0x80EB,
10190     0xEBD7, 0x80F1, 0xEBD8, 0x80F4, 0xEBD9, 0x80ED, 0xEBDA, 0x810D,
10191     0xEBDB, 0x810E, 0xEBDC, 0x80F2, 0xEBDD, 0x80FC, 0xEBDE, 0x6715,
10192     0xEBDF, 0x8112, 0xEBE0, 0x8C5A, 0xEBE1, 0x8136, 0xEBE2, 0x811E,
10193     0xEBE3, 0x812C, 0xEBE4, 0x8118, 0xEBE5, 0x8132, 0xEBE6, 0x8148,
10194     0xEBE7, 0x814C, 0xEBE8, 0x8153, 0xEBE9, 0x8174, 0xEBEA, 0x8159,
10195     0xEBEB, 0x815A, 0xEBEC, 0x8171, 0xEBED, 0x8160, 0xEBEE, 0x8169,
10196     0xEBEF, 0x817C, 0xEBF0, 0x817D, 0xEBF1, 0x816D, 0xEBF2, 0x8167,
10197     0xEBF3, 0x584D, 0xEBF4, 0x5AB5, 0xEBF5, 0x8188, 0xEBF6, 0x8182,
10198     0xEBF7, 0x8191, 0xEBF8, 0x6ED5, 0xEBF9, 0x81A3, 0xEBFA, 0x81AA,
10199     0xEBFB, 0x81CC, 0xEBFC, 0x6726, 0xEBFD, 0x81CA, 0xEBFE, 0x81BB,
10200     0xEC40, 0x9721, 0xEC41, 0x9722, 0xEC42, 0x9723, 0xEC43, 0x9724,
10201     0xEC44, 0x9725, 0xEC45, 0x9726, 0xEC46, 0x9727, 0xEC47, 0x9728,
10202     0xEC48, 0x9729, 0xEC49, 0x972B, 0xEC4A, 0x972C, 0xEC4B, 0x972E,
10203     0xEC4C, 0x972F, 0xEC4D, 0x9731, 0xEC4E, 0x9733, 0xEC4F, 0x9734,
10204     0xEC50, 0x9735, 0xEC51, 0x9736, 0xEC52, 0x9737, 0xEC53, 0x973A,
10205     0xEC54, 0x973B, 0xEC55, 0x973C, 0xEC56, 0x973D, 0xEC57, 0x973F,
10206     0xEC58, 0x9740, 0xEC59, 0x9741, 0xEC5A, 0x9742, 0xEC5B, 0x9743,
10207     0xEC5C, 0x9744, 0xEC5D, 0x9745, 0xEC5E, 0x9746, 0xEC5F, 0x9747,
10208     0xEC60, 0x9748, 0xEC61, 0x9749, 0xEC62, 0x974A, 0xEC63, 0x974B,
10209     0xEC64, 0x974C, 0xEC65, 0x974D, 0xEC66, 0x974E, 0xEC67, 0x974F,
10210     0xEC68, 0x9750, 0xEC69, 0x9751, 0xEC6A, 0x9754, 0xEC6B, 0x9755,
10211     0xEC6C, 0x9757, 0xEC6D, 0x9758, 0xEC6E, 0x975A, 0xEC6F, 0x975C,
10212     0xEC70, 0x975D, 0xEC71, 0x975F, 0xEC72, 0x9763, 0xEC73, 0x9764,
10213     0xEC74, 0x9766, 0xEC75, 0x9767, 0xEC76, 0x9768, 0xEC77, 0x976A,
10214     0xEC78, 0x976B, 0xEC79, 0x976C, 0xEC7A, 0x976D, 0xEC7B, 0x976E,
10215     0xEC7C, 0x976F, 0xEC7D, 0x9770, 0xEC7E, 0x9771, 0xEC80, 0x9772,
10216     0xEC81, 0x9775, 0xEC82, 0x9777, 0xEC83, 0x9778, 0xEC84, 0x9779,
10217     0xEC85, 0x977A, 0xEC86, 0x977B, 0xEC87, 0x977D, 0xEC88, 0x977E,
10218     0xEC89, 0x977F, 0xEC8A, 0x9780, 0xEC8B, 0x9781, 0xEC8C, 0x9782,
10219     0xEC8D, 0x9783, 0xEC8E, 0x9784, 0xEC8F, 0x9786, 0xEC90, 0x9787,
10220     0xEC91, 0x9788, 0xEC92, 0x9789, 0xEC93, 0x978A, 0xEC94, 0x978C,
10221     0xEC95, 0x978E, 0xEC96, 0x978F, 0xEC97, 0x9790, 0xEC98, 0x9793,
10222     0xEC99, 0x9795, 0xEC9A, 0x9796, 0xEC9B, 0x9797, 0xEC9C, 0x9799,
10223     0xEC9D, 0x979A, 0xEC9E, 0x979B, 0xEC9F, 0x979C, 0xECA0, 0x979D,
10224     0xECA1, 0x81C1, 0xECA2, 0x81A6, 0xECA3, 0x6B24, 0xECA4, 0x6B37,
10225     0xECA5, 0x6B39, 0xECA6, 0x6B43, 0xECA7, 0x6B46, 0xECA8, 0x6B59,
10226     0xECA9, 0x98D1, 0xECAA, 0x98D2, 0xECAB, 0x98D3, 0xECAC, 0x98D5,
10227     0xECAD, 0x98D9, 0xECAE, 0x98DA, 0xECAF, 0x6BB3, 0xECB0, 0x5F40,
10228     0xECB1, 0x6BC2, 0xECB2, 0x89F3, 0xECB3, 0x6590, 0xECB4, 0x9F51,
10229     0xECB5, 0x6593, 0xECB6, 0x65BC, 0xECB7, 0x65C6, 0xECB8, 0x65C4,
10230     0xECB9, 0x65C3, 0xECBA, 0x65CC, 0xECBB, 0x65CE, 0xECBC, 0x65D2,
10231     0xECBD, 0x65D6, 0xECBE, 0x7080, 0xECBF, 0x709C, 0xECC0, 0x7096,
10232     0xECC1, 0x709D, 0xECC2, 0x70BB, 0xECC3, 0x70C0, 0xECC4, 0x70B7,
10233     0xECC5, 0x70AB, 0xECC6, 0x70B1, 0xECC7, 0x70E8, 0xECC8, 0x70CA,
10234     0xECC9, 0x7110, 0xECCA, 0x7113, 0xECCB, 0x7116, 0xECCC, 0x712F,
10235     0xECCD, 0x7131, 0xECCE, 0x7173, 0xECCF, 0x715C, 0xECD0, 0x7168,
10236     0xECD1, 0x7145, 0xECD2, 0x7172, 0xECD3, 0x714A, 0xECD4, 0x7178,
10237     0xECD5, 0x717A, 0xECD6, 0x7198, 0xECD7, 0x71B3, 0xECD8, 0x71B5,
10238     0xECD9, 0x71A8, 0xECDA, 0x71A0, 0xECDB, 0x71E0, 0xECDC, 0x71D4,
10239     0xECDD, 0x71E7, 0xECDE, 0x71F9, 0xECDF, 0x721D, 0xECE0, 0x7228,
10240     0xECE1, 0x706C, 0xECE2, 0x7118, 0xECE3, 0x7166, 0xECE4, 0x71B9,
10241     0xECE5, 0x623E, 0xECE6, 0x623D, 0xECE7, 0x6243, 0xECE8, 0x6248,
10242     0xECE9, 0x6249, 0xECEA, 0x793B, 0xECEB, 0x7940, 0xECEC, 0x7946,
10243     0xECED, 0x7949, 0xECEE, 0x795B, 0xECEF, 0x795C, 0xECF0, 0x7953,
10244     0xECF1, 0x795A, 0xECF2, 0x7962, 0xECF3, 0x7957, 0xECF4, 0x7960,
10245     0xECF5, 0x796F, 0xECF6, 0x7967, 0xECF7, 0x797A, 0xECF8, 0x7985,
10246     0xECF9, 0x798A, 0xECFA, 0x799A, 0xECFB, 0x79A7, 0xECFC, 0x79B3,
10247     0xECFD, 0x5FD1, 0xECFE, 0x5FD0, 0xED40, 0x979E, 0xED41, 0x979F,
10248     0xED42, 0x97A1, 0xED43, 0x97A2, 0xED44, 0x97A4, 0xED45, 0x97A5,
10249     0xED46, 0x97A6, 0xED47, 0x97A7, 0xED48, 0x97A8, 0xED49, 0x97A9,
10250     0xED4A, 0x97AA, 0xED4B, 0x97AC, 0xED4C, 0x97AE, 0xED4D, 0x97B0,
10251     0xED4E, 0x97B1, 0xED4F, 0x97B3, 0xED50, 0x97B5, 0xED51, 0x97B6,
10252     0xED52, 0x97B7, 0xED53, 0x97B8, 0xED54, 0x97B9, 0xED55, 0x97BA,
10253     0xED56, 0x97BB, 0xED57, 0x97BC, 0xED58, 0x97BD, 0xED59, 0x97BE,
10254     0xED5A, 0x97BF, 0xED5B, 0x97C0, 0xED5C, 0x97C1, 0xED5D, 0x97C2,
10255     0xED5E, 0x97C3, 0xED5F, 0x97C4, 0xED60, 0x97C5, 0xED61, 0x97C6,
10256     0xED62, 0x97C7, 0xED63, 0x97C8, 0xED64, 0x97C9, 0xED65, 0x97CA,
10257     0xED66, 0x97CB, 0xED67, 0x97CC, 0xED68, 0x97CD, 0xED69, 0x97CE,
10258     0xED6A, 0x97CF, 0xED6B, 0x97D0, 0xED6C, 0x97D1, 0xED6D, 0x97D2,
10259     0xED6E, 0x97D3, 0xED6F, 0x97D4, 0xED70, 0x97D5, 0xED71, 0x97D6,
10260     0xED72, 0x97D7, 0xED73, 0x97D8, 0xED74, 0x97D9, 0xED75, 0x97DA,
10261     0xED76, 0x97DB, 0xED77, 0x97DC, 0xED78, 0x97DD, 0xED79, 0x97DE,
10262     0xED7A, 0x97DF, 0xED7B, 0x97E0, 0xED7C, 0x97E1, 0xED7D, 0x97E2,
10263     0xED7E, 0x97E3, 0xED80, 0x97E4, 0xED81, 0x97E5, 0xED82, 0x97E8,
10264     0xED83, 0x97EE, 0xED84, 0x97EF, 0xED85, 0x97F0, 0xED86, 0x97F1,
10265     0xED87, 0x97F2, 0xED88, 0x97F4, 0xED89, 0x97F7, 0xED8A, 0x97F8,
10266     0xED8B, 0x97F9, 0xED8C, 0x97FA, 0xED8D, 0x97FB, 0xED8E, 0x97FC,
10267     0xED8F, 0x97FD, 0xED90, 0x97FE, 0xED91, 0x97FF, 0xED92, 0x9800,
10268     0xED93, 0x9801, 0xED94, 0x9802, 0xED95, 0x9803, 0xED96, 0x9804,
10269     0xED97, 0x9805, 0xED98, 0x9806, 0xED99, 0x9807, 0xED9A, 0x9808,
10270     0xED9B, 0x9809, 0xED9C, 0x980A, 0xED9D, 0x980B, 0xED9E, 0x980C,
10271     0xED9F, 0x980D, 0xEDA0, 0x980E, 0xEDA1, 0x603C, 0xEDA2, 0x605D,
10272     0xEDA3, 0x605A, 0xEDA4, 0x6067, 0xEDA5, 0x6041, 0xEDA6, 0x6059,
10273     0xEDA7, 0x6063, 0xEDA8, 0x60AB, 0xEDA9, 0x6106, 0xEDAA, 0x610D,
10274     0xEDAB, 0x615D, 0xEDAC, 0x61A9, 0xEDAD, 0x619D, 0xEDAE, 0x61CB,
10275     0xEDAF, 0x61D1, 0xEDB0, 0x6206, 0xEDB1, 0x8080, 0xEDB2, 0x807F,
10276     0xEDB3, 0x6C93, 0xEDB4, 0x6CF6, 0xEDB5, 0x6DFC, 0xEDB6, 0x77F6,
10277     0xEDB7, 0x77F8, 0xEDB8, 0x7800, 0xEDB9, 0x7809, 0xEDBA, 0x7817,
10278     0xEDBB, 0x7818, 0xEDBC, 0x7811, 0xEDBD, 0x65AB, 0xEDBE, 0x782D,
10279     0xEDBF, 0x781C, 0xEDC0, 0x781D, 0xEDC1, 0x7839, 0xEDC2, 0x783A,
10280     0xEDC3, 0x783B, 0xEDC4, 0x781F, 0xEDC5, 0x783C, 0xEDC6, 0x7825,
10281     0xEDC7, 0x782C, 0xEDC8, 0x7823, 0xEDC9, 0x7829, 0xEDCA, 0x784E,
10282     0xEDCB, 0x786D, 0xEDCC, 0x7856, 0xEDCD, 0x7857, 0xEDCE, 0x7826,
10283     0xEDCF, 0x7850, 0xEDD0, 0x7847, 0xEDD1, 0x784C, 0xEDD2, 0x786A,
10284     0xEDD3, 0x789B, 0xEDD4, 0x7893, 0xEDD5, 0x789A, 0xEDD6, 0x7887,
10285     0xEDD7, 0x789C, 0xEDD8, 0x78A1, 0xEDD9, 0x78A3, 0xEDDA, 0x78B2,
10286     0xEDDB, 0x78B9, 0xEDDC, 0x78A5, 0xEDDD, 0x78D4, 0xEDDE, 0x78D9,
10287     0xEDDF, 0x78C9, 0xEDE0, 0x78EC, 0xEDE1, 0x78F2, 0xEDE2, 0x7905,
10288     0xEDE3, 0x78F4, 0xEDE4, 0x7913, 0xEDE5, 0x7924, 0xEDE6, 0x791E,
10289     0xEDE7, 0x7934, 0xEDE8, 0x9F9B, 0xEDE9, 0x9EF9, 0xEDEA, 0x9EFB,
10290     0xEDEB, 0x9EFC, 0xEDEC, 0x76F1, 0xEDED, 0x7704, 0xEDEE, 0x770D,
10291     0xEDEF, 0x76F9, 0xEDF0, 0x7707, 0xEDF1, 0x7708, 0xEDF2, 0x771A,
10292     0xEDF3, 0x7722, 0xEDF4, 0x7719, 0xEDF5, 0x772D, 0xEDF6, 0x7726,
10293     0xEDF7, 0x7735, 0xEDF8, 0x7738, 0xEDF9, 0x7750, 0xEDFA, 0x7751,
10294     0xEDFB, 0x7747, 0xEDFC, 0x7743, 0xEDFD, 0x775A, 0xEDFE, 0x7768,
10295     0xEE40, 0x980F, 0xEE41, 0x9810, 0xEE42, 0x9811, 0xEE43, 0x9812,
10296     0xEE44, 0x9813, 0xEE45, 0x9814, 0xEE46, 0x9815, 0xEE47, 0x9816,
10297     0xEE48, 0x9817, 0xEE49, 0x9818, 0xEE4A, 0x9819, 0xEE4B, 0x981A,
10298     0xEE4C, 0x981B, 0xEE4D, 0x981C, 0xEE4E, 0x981D, 0xEE4F, 0x981E,
10299     0xEE50, 0x981F, 0xEE51, 0x9820, 0xEE52, 0x9821, 0xEE53, 0x9822,
10300     0xEE54, 0x9823, 0xEE55, 0x9824, 0xEE56, 0x9825, 0xEE57, 0x9826,
10301     0xEE58, 0x9827, 0xEE59, 0x9828, 0xEE5A, 0x9829, 0xEE5B, 0x982A,
10302     0xEE5C, 0x982B, 0xEE5D, 0x982C, 0xEE5E, 0x982D, 0xEE5F, 0x982E,
10303     0xEE60, 0x982F, 0xEE61, 0x9830, 0xEE62, 0x9831, 0xEE63, 0x9832,
10304     0xEE64, 0x9833, 0xEE65, 0x9834, 0xEE66, 0x9835, 0xEE67, 0x9836,
10305     0xEE68, 0x9837, 0xEE69, 0x9838, 0xEE6A, 0x9839, 0xEE6B, 0x983A,
10306     0xEE6C, 0x983B, 0xEE6D, 0x983C, 0xEE6E, 0x983D, 0xEE6F, 0x983E,
10307     0xEE70, 0x983F, 0xEE71, 0x9840, 0xEE72, 0x9841, 0xEE73, 0x9842,
10308     0xEE74, 0x9843, 0xEE75, 0x9844, 0xEE76, 0x9845, 0xEE77, 0x9846,
10309     0xEE78, 0x9847, 0xEE79, 0x9848, 0xEE7A, 0x9849, 0xEE7B, 0x984A,
10310     0xEE7C, 0x984B, 0xEE7D, 0x984C, 0xEE7E, 0x984D, 0xEE80, 0x984E,
10311     0xEE81, 0x984F, 0xEE82, 0x9850, 0xEE83, 0x9851, 0xEE84, 0x9852,
10312     0xEE85, 0x9853, 0xEE86, 0x9854, 0xEE87, 0x9855, 0xEE88, 0x9856,
10313     0xEE89, 0x9857, 0xEE8A, 0x9858, 0xEE8B, 0x9859, 0xEE8C, 0x985A,
10314     0xEE8D, 0x985B, 0xEE8E, 0x985C, 0xEE8F, 0x985D, 0xEE90, 0x985E,
10315     0xEE91, 0x985F, 0xEE92, 0x9860, 0xEE93, 0x9861, 0xEE94, 0x9862,
10316     0xEE95, 0x9863, 0xEE96, 0x9864, 0xEE97, 0x9865, 0xEE98, 0x9866,
10317     0xEE99, 0x9867, 0xEE9A, 0x9868, 0xEE9B, 0x9869, 0xEE9C, 0x986A,
10318     0xEE9D, 0x986B, 0xEE9E, 0x986C, 0xEE9F, 0x986D, 0xEEA0, 0x986E,
10319     0xEEA1, 0x7762, 0xEEA2, 0x7765, 0xEEA3, 0x777F, 0xEEA4, 0x778D,
10320     0xEEA5, 0x777D, 0xEEA6, 0x7780, 0xEEA7, 0x778C, 0xEEA8, 0x7791,
10321     0xEEA9, 0x779F, 0xEEAA, 0x77A0, 0xEEAB, 0x77B0, 0xEEAC, 0x77B5,
10322     0xEEAD, 0x77BD, 0xEEAE, 0x753A, 0xEEAF, 0x7540, 0xEEB0, 0x754E,
10323     0xEEB1, 0x754B, 0xEEB2, 0x7548, 0xEEB3, 0x755B, 0xEEB4, 0x7572,
10324     0xEEB5, 0x7579, 0xEEB6, 0x7583, 0xEEB7, 0x7F58, 0xEEB8, 0x7F61,
10325     0xEEB9, 0x7F5F, 0xEEBA, 0x8A48, 0xEEBB, 0x7F68, 0xEEBC, 0x7F74,
10326     0xEEBD, 0x7F71, 0xEEBE, 0x7F79, 0xEEBF, 0x7F81, 0xEEC0, 0x7F7E,
10327     0xEEC1, 0x76CD, 0xEEC2, 0x76E5, 0xEEC3, 0x8832, 0xEEC4, 0x9485,
10328     0xEEC5, 0x9486, 0xEEC6, 0x9487, 0xEEC7, 0x948B, 0xEEC8, 0x948A,
10329     0xEEC9, 0x948C, 0xEECA, 0x948D, 0xEECB, 0x948F, 0xEECC, 0x9490,
10330     0xEECD, 0x9494, 0xEECE, 0x9497, 0xEECF, 0x9495, 0xEED0, 0x949A,
10331     0xEED1, 0x949B, 0xEED2, 0x949C, 0xEED3, 0x94A3, 0xEED4, 0x94A4,
10332     0xEED5, 0x94AB, 0xEED6, 0x94AA, 0xEED7, 0x94AD, 0xEED8, 0x94AC,
10333     0xEED9, 0x94AF, 0xEEDA, 0x94B0, 0xEEDB, 0x94B2, 0xEEDC, 0x94B4,
10334     0xEEDD, 0x94B6, 0xEEDE, 0x94B7, 0xEEDF, 0x94B8, 0xEEE0, 0x94B9,
10335     0xEEE1, 0x94BA, 0xEEE2, 0x94BC, 0xEEE3, 0x94BD, 0xEEE4, 0x94BF,
10336     0xEEE5, 0x94C4, 0xEEE6, 0x94C8, 0xEEE7, 0x94C9, 0xEEE8, 0x94CA,
10337     0xEEE9, 0x94CB, 0xEEEA, 0x94CC, 0xEEEB, 0x94CD, 0xEEEC, 0x94CE,
10338     0xEEED, 0x94D0, 0xEEEE, 0x94D1, 0xEEEF, 0x94D2, 0xEEF0, 0x94D5,
10339     0xEEF1, 0x94D6, 0xEEF2, 0x94D7, 0xEEF3, 0x94D9, 0xEEF4, 0x94D8,
10340     0xEEF5, 0x94DB, 0xEEF6, 0x94DE, 0xEEF7, 0x94DF, 0xEEF8, 0x94E0,
10341     0xEEF9, 0x94E2, 0xEEFA, 0x94E4, 0xEEFB, 0x94E5, 0xEEFC, 0x94E7,
10342     0xEEFD, 0x94E8, 0xEEFE, 0x94EA, 0xEF40, 0x986F, 0xEF41, 0x9870,
10343     0xEF42, 0x9871, 0xEF43, 0x9872, 0xEF44, 0x9873, 0xEF45, 0x9874,
10344     0xEF46, 0x988B, 0xEF47, 0x988E, 0xEF48, 0x9892, 0xEF49, 0x9895,
10345     0xEF4A, 0x9899, 0xEF4B, 0x98A3, 0xEF4C, 0x98A8, 0xEF4D, 0x98A9,
10346     0xEF4E, 0x98AA, 0xEF4F, 0x98AB, 0xEF50, 0x98AC, 0xEF51, 0x98AD,
10347     0xEF52, 0x98AE, 0xEF53, 0x98AF, 0xEF54, 0x98B0, 0xEF55, 0x98B1,
10348     0xEF56, 0x98B2, 0xEF57, 0x98B3, 0xEF58, 0x98B4, 0xEF59, 0x98B5,
10349     0xEF5A, 0x98B6, 0xEF5B, 0x98B7, 0xEF5C, 0x98B8, 0xEF5D, 0x98B9,
10350     0xEF5E, 0x98BA, 0xEF5F, 0x98BB, 0xEF60, 0x98BC, 0xEF61, 0x98BD,
10351     0xEF62, 0x98BE, 0xEF63, 0x98BF, 0xEF64, 0x98C0, 0xEF65, 0x98C1,
10352     0xEF66, 0x98C2, 0xEF67, 0x98C3, 0xEF68, 0x98C4, 0xEF69, 0x98C5,
10353     0xEF6A, 0x98C6, 0xEF6B, 0x98C7, 0xEF6C, 0x98C8, 0xEF6D, 0x98C9,
10354     0xEF6E, 0x98CA, 0xEF6F, 0x98CB, 0xEF70, 0x98CC, 0xEF71, 0x98CD,
10355     0xEF72, 0x98CF, 0xEF73, 0x98D0, 0xEF74, 0x98D4, 0xEF75, 0x98D6,
10356     0xEF76, 0x98D7, 0xEF77, 0x98DB, 0xEF78, 0x98DC, 0xEF79, 0x98DD,
10357     0xEF7A, 0x98E0, 0xEF7B, 0x98E1, 0xEF7C, 0x98E2, 0xEF7D, 0x98E3,
10358     0xEF7E, 0x98E4, 0xEF80, 0x98E5, 0xEF81, 0x98E6, 0xEF82, 0x98E9,
10359     0xEF83, 0x98EA, 0xEF84, 0x98EB, 0xEF85, 0x98EC, 0xEF86, 0x98ED,
10360     0xEF87, 0x98EE, 0xEF88, 0x98EF, 0xEF89, 0x98F0, 0xEF8A, 0x98F1,
10361     0xEF8B, 0x98F2, 0xEF8C, 0x98F3, 0xEF8D, 0x98F4, 0xEF8E, 0x98F5,
10362     0xEF8F, 0x98F6, 0xEF90, 0x98F7, 0xEF91, 0x98F8, 0xEF92, 0x98F9,
10363     0xEF93, 0x98FA, 0xEF94, 0x98FB, 0xEF95, 0x98FC, 0xEF96, 0x98FD,
10364     0xEF97, 0x98FE, 0xEF98, 0x98FF, 0xEF99, 0x9900, 0xEF9A, 0x9901,
10365     0xEF9B, 0x9902, 0xEF9C, 0x9903, 0xEF9D, 0x9904, 0xEF9E, 0x9905,
10366     0xEF9F, 0x9906, 0xEFA0, 0x9907, 0xEFA1, 0x94E9, 0xEFA2, 0x94EB,
10367     0xEFA3, 0x94EE, 0xEFA4, 0x94EF, 0xEFA5, 0x94F3, 0xEFA6, 0x94F4,
10368     0xEFA7, 0x94F5, 0xEFA8, 0x94F7, 0xEFA9, 0x94F9, 0xEFAA, 0x94FC,
10369     0xEFAB, 0x94FD, 0xEFAC, 0x94FF, 0xEFAD, 0x9503, 0xEFAE, 0x9502,
10370     0xEFAF, 0x9506, 0xEFB0, 0x9507, 0xEFB1, 0x9509, 0xEFB2, 0x950A,
10371     0xEFB3, 0x950D, 0xEFB4, 0x950E, 0xEFB5, 0x950F, 0xEFB6, 0x9512,
10372     0xEFB7, 0x9513, 0xEFB8, 0x9514, 0xEFB9, 0x9515, 0xEFBA, 0x9516,
10373     0xEFBB, 0x9518, 0xEFBC, 0x951B, 0xEFBD, 0x951D, 0xEFBE, 0x951E,
10374     0xEFBF, 0x951F, 0xEFC0, 0x9522, 0xEFC1, 0x952A, 0xEFC2, 0x952B,
10375     0xEFC3, 0x9529, 0xEFC4, 0x952C, 0xEFC5, 0x9531, 0xEFC6, 0x9532,
10376     0xEFC7, 0x9534, 0xEFC8, 0x9536, 0xEFC9, 0x9537, 0xEFCA, 0x9538,
10377     0xEFCB, 0x953C, 0xEFCC, 0x953E, 0xEFCD, 0x953F, 0xEFCE, 0x9542,
10378     0xEFCF, 0x9535, 0xEFD0, 0x9544, 0xEFD1, 0x9545, 0xEFD2, 0x9546,
10379     0xEFD3, 0x9549, 0xEFD4, 0x954C, 0xEFD5, 0x954E, 0xEFD6, 0x954F,
10380     0xEFD7, 0x9552, 0xEFD8, 0x9553, 0xEFD9, 0x9554, 0xEFDA, 0x9556,
10381     0xEFDB, 0x9557, 0xEFDC, 0x9558, 0xEFDD, 0x9559, 0xEFDE, 0x955B,
10382     0xEFDF, 0x955E, 0xEFE0, 0x955F, 0xEFE1, 0x955D, 0xEFE2, 0x9561,
10383     0xEFE3, 0x9562, 0xEFE4, 0x9564, 0xEFE5, 0x9565, 0xEFE6, 0x9566,
10384     0xEFE7, 0x9567, 0xEFE8, 0x9568, 0xEFE9, 0x9569, 0xEFEA, 0x956A,
10385     0xEFEB, 0x956B, 0xEFEC, 0x956C, 0xEFED, 0x956F, 0xEFEE, 0x9571,
10386     0xEFEF, 0x9572, 0xEFF0, 0x9573, 0xEFF1, 0x953A, 0xEFF2, 0x77E7,
10387     0xEFF3, 0x77EC, 0xEFF4, 0x96C9, 0xEFF5, 0x79D5, 0xEFF6, 0x79ED,
10388     0xEFF7, 0x79E3, 0xEFF8, 0x79EB, 0xEFF9, 0x7A06, 0xEFFA, 0x5D47,
10389     0xEFFB, 0x7A03, 0xEFFC, 0x7A02, 0xEFFD, 0x7A1E, 0xEFFE, 0x7A14,
10390     0xF040, 0x9908, 0xF041, 0x9909, 0xF042, 0x990A, 0xF043, 0x990B,
10391     0xF044, 0x990C, 0xF045, 0x990E, 0xF046, 0x990F, 0xF047, 0x9911,
10392     0xF048, 0x9912, 0xF049, 0x9913, 0xF04A, 0x9914, 0xF04B, 0x9915,
10393     0xF04C, 0x9916, 0xF04D, 0x9917, 0xF04E, 0x9918, 0xF04F, 0x9919,
10394     0xF050, 0x991A, 0xF051, 0x991B, 0xF052, 0x991C, 0xF053, 0x991D,
10395     0xF054, 0x991E, 0xF055, 0x991F, 0xF056, 0x9920, 0xF057, 0x9921,
10396     0xF058, 0x9922, 0xF059, 0x9923, 0xF05A, 0x9924, 0xF05B, 0x9925,
10397     0xF05C, 0x9926, 0xF05D, 0x9927, 0xF05E, 0x9928, 0xF05F, 0x9929,
10398     0xF060, 0x992A, 0xF061, 0x992B, 0xF062, 0x992C, 0xF063, 0x992D,
10399     0xF064, 0x992F, 0xF065, 0x9930, 0xF066, 0x9931, 0xF067, 0x9932,
10400     0xF068, 0x9933, 0xF069, 0x9934, 0xF06A, 0x9935, 0xF06B, 0x9936,
10401     0xF06C, 0x9937, 0xF06D, 0x9938, 0xF06E, 0x9939, 0xF06F, 0x993A,
10402     0xF070, 0x993B, 0xF071, 0x993C, 0xF072, 0x993D, 0xF073, 0x993E,
10403     0xF074, 0x993F, 0xF075, 0x9940, 0xF076, 0x9941, 0xF077, 0x9942,
10404     0xF078, 0x9943, 0xF079, 0x9944, 0xF07A, 0x9945, 0xF07B, 0x9946,
10405     0xF07C, 0x9947, 0xF07D, 0x9948, 0xF07E, 0x9949, 0xF080, 0x994A,
10406     0xF081, 0x994B, 0xF082, 0x994C, 0xF083, 0x994D, 0xF084, 0x994E,
10407     0xF085, 0x994F, 0xF086, 0x9950, 0xF087, 0x9951, 0xF088, 0x9952,
10408     0xF089, 0x9953, 0xF08A, 0x9956, 0xF08B, 0x9957, 0xF08C, 0x9958,
10409     0xF08D, 0x9959, 0xF08E, 0x995A, 0xF08F, 0x995B, 0xF090, 0x995C,
10410     0xF091, 0x995D, 0xF092, 0x995E, 0xF093, 0x995F, 0xF094, 0x9960,
10411     0xF095, 0x9961, 0xF096, 0x9962, 0xF097, 0x9964, 0xF098, 0x9966,
10412     0xF099, 0x9973, 0xF09A, 0x9978, 0xF09B, 0x9979, 0xF09C, 0x997B,
10413     0xF09D, 0x997E, 0xF09E, 0x9982, 0xF09F, 0x9983, 0xF0A0, 0x9989,
10414     0xF0A1, 0x7A39, 0xF0A2, 0x7A37, 0xF0A3, 0x7A51, 0xF0A4, 0x9ECF,
10415     0xF0A5, 0x99A5, 0xF0A6, 0x7A70, 0xF0A7, 0x7688, 0xF0A8, 0x768E,
10416     0xF0A9, 0x7693, 0xF0AA, 0x7699, 0xF0AB, 0x76A4, 0xF0AC, 0x74DE,
10417     0xF0AD, 0x74E0, 0xF0AE, 0x752C, 0xF0AF, 0x9E20, 0xF0B0, 0x9E22,
10418     0xF0B1, 0x9E28, 0xF0B2, 0x9E29, 0xF0B3, 0x9E2A, 0xF0B4, 0x9E2B,
10419     0xF0B5, 0x9E2C, 0xF0B6, 0x9E32, 0xF0B7, 0x9E31, 0xF0B8, 0x9E36,
10420     0xF0B9, 0x9E38, 0xF0BA, 0x9E37, 0xF0BB, 0x9E39, 0xF0BC, 0x9E3A,
10421     0xF0BD, 0x9E3E, 0xF0BE, 0x9E41, 0xF0BF, 0x9E42, 0xF0C0, 0x9E44,
10422     0xF0C1, 0x9E46, 0xF0C2, 0x9E47, 0xF0C3, 0x9E48, 0xF0C4, 0x9E49,
10423     0xF0C5, 0x9E4B, 0xF0C6, 0x9E4C, 0xF0C7, 0x9E4E, 0xF0C8, 0x9E51,
10424     0xF0C9, 0x9E55, 0xF0CA, 0x9E57, 0xF0CB, 0x9E5A, 0xF0CC, 0x9E5B,
10425     0xF0CD, 0x9E5C, 0xF0CE, 0x9E5E, 0xF0CF, 0x9E63, 0xF0D0, 0x9E66,
10426     0xF0D1, 0x9E67, 0xF0D2, 0x9E68, 0xF0D3, 0x9E69, 0xF0D4, 0x9E6A,
10427     0xF0D5, 0x9E6B, 0xF0D6, 0x9E6C, 0xF0D7, 0x9E71, 0xF0D8, 0x9E6D,
10428     0xF0D9, 0x9E73, 0xF0DA, 0x7592, 0xF0DB, 0x7594, 0xF0DC, 0x7596,
10429     0xF0DD, 0x75A0, 0xF0DE, 0x759D, 0xF0DF, 0x75AC, 0xF0E0, 0x75A3,
10430     0xF0E1, 0x75B3, 0xF0E2, 0x75B4, 0xF0E3, 0x75B8, 0xF0E4, 0x75C4,
10431     0xF0E5, 0x75B1, 0xF0E6, 0x75B0, 0xF0E7, 0x75C3, 0xF0E8, 0x75C2,
10432     0xF0E9, 0x75D6, 0xF0EA, 0x75CD, 0xF0EB, 0x75E3, 0xF0EC, 0x75E8,
10433     0xF0ED, 0x75E6, 0xF0EE, 0x75E4, 0xF0EF, 0x75EB, 0xF0F0, 0x75E7,
10434     0xF0F1, 0x7603, 0xF0F2, 0x75F1, 0xF0F3, 0x75FC, 0xF0F4, 0x75FF,
10435     0xF0F5, 0x7610, 0xF0F6, 0x7600, 0xF0F7, 0x7605, 0xF0F8, 0x760C,
10436     0xF0F9, 0x7617, 0xF0FA, 0x760A, 0xF0FB, 0x7625, 0xF0FC, 0x7618,
10437     0xF0FD, 0x7615, 0xF0FE, 0x7619, 0xF140, 0x998C, 0xF141, 0x998E,
10438     0xF142, 0x999A, 0xF143, 0x999B, 0xF144, 0x999C, 0xF145, 0x999D,
10439     0xF146, 0x999E, 0xF147, 0x999F, 0xF148, 0x99A0, 0xF149, 0x99A1,
10440     0xF14A, 0x99A2, 0xF14B, 0x99A3, 0xF14C, 0x99A4, 0xF14D, 0x99A6,
10441     0xF14E, 0x99A7, 0xF14F, 0x99A9, 0xF150, 0x99AA, 0xF151, 0x99AB,
10442     0xF152, 0x99AC, 0xF153, 0x99AD, 0xF154, 0x99AE, 0xF155, 0x99AF,
10443     0xF156, 0x99B0, 0xF157, 0x99B1, 0xF158, 0x99B2, 0xF159, 0x99B3,
10444     0xF15A, 0x99B4, 0xF15B, 0x99B5, 0xF15C, 0x99B6, 0xF15D, 0x99B7,
10445     0xF15E, 0x99B8, 0xF15F, 0x99B9, 0xF160, 0x99BA, 0xF161, 0x99BB,
10446     0xF162, 0x99BC, 0xF163, 0x99BD, 0xF164, 0x99BE, 0xF165, 0x99BF,
10447     0xF166, 0x99C0, 0xF167, 0x99C1, 0xF168, 0x99C2, 0xF169, 0x99C3,
10448     0xF16A, 0x99C4, 0xF16B, 0x99C5, 0xF16C, 0x99C6, 0xF16D, 0x99C7,
10449     0xF16E, 0x99C8, 0xF16F, 0x99C9, 0xF170, 0x99CA, 0xF171, 0x99CB,
10450     0xF172, 0x99CC, 0xF173, 0x99CD, 0xF174, 0x99CE, 0xF175, 0x99CF,
10451     0xF176, 0x99D0, 0xF177, 0x99D1, 0xF178, 0x99D2, 0xF179, 0x99D3,
10452     0xF17A, 0x99D4, 0xF17B, 0x99D5, 0xF17C, 0x99D6, 0xF17D, 0x99D7,
10453     0xF17E, 0x99D8, 0xF180, 0x99D9, 0xF181, 0x99DA, 0xF182, 0x99DB,
10454     0xF183, 0x99DC, 0xF184, 0x99DD, 0xF185, 0x99DE, 0xF186, 0x99DF,
10455     0xF187, 0x99E0, 0xF188, 0x99E1, 0xF189, 0x99E2, 0xF18A, 0x99E3,
10456     0xF18B, 0x99E4, 0xF18C, 0x99E5, 0xF18D, 0x99E6, 0xF18E, 0x99E7,
10457     0xF18F, 0x99E8, 0xF190, 0x99E9, 0xF191, 0x99EA, 0xF192, 0x99EB,
10458     0xF193, 0x99EC, 0xF194, 0x99ED, 0xF195, 0x99EE, 0xF196, 0x99EF,
10459     0xF197, 0x99F0, 0xF198, 0x99F1, 0xF199, 0x99F2, 0xF19A, 0x99F3,
10460     0xF19B, 0x99F4, 0xF19C, 0x99F5, 0xF19D, 0x99F6, 0xF19E, 0x99F7,
10461     0xF19F, 0x99F8, 0xF1A0, 0x99F9, 0xF1A1, 0x761B, 0xF1A2, 0x763C,
10462     0xF1A3, 0x7622, 0xF1A4, 0x7620, 0xF1A5, 0x7640, 0xF1A6, 0x762D,
10463     0xF1A7, 0x7630, 0xF1A8, 0x763F, 0xF1A9, 0x7635, 0xF1AA, 0x7643,
10464     0xF1AB, 0x763E, 0xF1AC, 0x7633, 0xF1AD, 0x764D, 0xF1AE, 0x765E,
10465     0xF1AF, 0x7654, 0xF1B0, 0x765C, 0xF1B1, 0x7656, 0xF1B2, 0x766B,
10466     0xF1B3, 0x766F, 0xF1B4, 0x7FCA, 0xF1B5, 0x7AE6, 0xF1B6, 0x7A78,
10467     0xF1B7, 0x7A79, 0xF1B8, 0x7A80, 0xF1B9, 0x7A86, 0xF1BA, 0x7A88,
10468     0xF1BB, 0x7A95, 0xF1BC, 0x7AA6, 0xF1BD, 0x7AA0, 0xF1BE, 0x7AAC,
10469     0xF1BF, 0x7AA8, 0xF1C0, 0x7AAD, 0xF1C1, 0x7AB3, 0xF1C2, 0x8864,
10470     0xF1C3, 0x8869, 0xF1C4, 0x8872, 0xF1C5, 0x887D, 0xF1C6, 0x887F,
10471     0xF1C7, 0x8882, 0xF1C8, 0x88A2, 0xF1C9, 0x88C6, 0xF1CA, 0x88B7,
10472     0xF1CB, 0x88BC, 0xF1CC, 0x88C9, 0xF1CD, 0x88E2, 0xF1CE, 0x88CE,
10473     0xF1CF, 0x88E3, 0xF1D0, 0x88E5, 0xF1D1, 0x88F1, 0xF1D2, 0x891A,
10474     0xF1D3, 0x88FC, 0xF1D4, 0x88E8, 0xF1D5, 0x88FE, 0xF1D6, 0x88F0,
10475     0xF1D7, 0x8921, 0xF1D8, 0x8919, 0xF1D9, 0x8913, 0xF1DA, 0x891B,
10476     0xF1DB, 0x890A, 0xF1DC, 0x8934, 0xF1DD, 0x892B, 0xF1DE, 0x8936,
10477     0xF1DF, 0x8941, 0xF1E0, 0x8966, 0xF1E1, 0x897B, 0xF1E2, 0x758B,
10478     0xF1E3, 0x80E5, 0xF1E4, 0x76B2, 0xF1E5, 0x76B4, 0xF1E6, 0x77DC,
10479     0xF1E7, 0x8012, 0xF1E8, 0x8014, 0xF1E9, 0x8016, 0xF1EA, 0x801C,
10480     0xF1EB, 0x8020, 0xF1EC, 0x8022, 0xF1ED, 0x8025, 0xF1EE, 0x8026,
10481     0xF1EF, 0x8027, 0xF1F0, 0x8029, 0xF1F1, 0x8028, 0xF1F2, 0x8031,
10482     0xF1F3, 0x800B, 0xF1F4, 0x8035, 0xF1F5, 0x8043, 0xF1F6, 0x8046,
10483     0xF1F7, 0x804D, 0xF1F8, 0x8052, 0xF1F9, 0x8069, 0xF1FA, 0x8071,
10484     0xF1FB, 0x8983, 0xF1FC, 0x9878, 0xF1FD, 0x9880, 0xF1FE, 0x9883,
10485     0xF240, 0x99FA, 0xF241, 0x99FB, 0xF242, 0x99FC, 0xF243, 0x99FD,
10486     0xF244, 0x99FE, 0xF245, 0x99FF, 0xF246, 0x9A00, 0xF247, 0x9A01,
10487     0xF248, 0x9A02, 0xF249, 0x9A03, 0xF24A, 0x9A04, 0xF24B, 0x9A05,
10488     0xF24C, 0x9A06, 0xF24D, 0x9A07, 0xF24E, 0x9A08, 0xF24F, 0x9A09,
10489     0xF250, 0x9A0A, 0xF251, 0x9A0B, 0xF252, 0x9A0C, 0xF253, 0x9A0D,
10490     0xF254, 0x9A0E, 0xF255, 0x9A0F, 0xF256, 0x9A10, 0xF257, 0x9A11,
10491     0xF258, 0x9A12, 0xF259, 0x9A13, 0xF25A, 0x9A14, 0xF25B, 0x9A15,
10492     0xF25C, 0x9A16, 0xF25D, 0x9A17, 0xF25E, 0x9A18, 0xF25F, 0x9A19,
10493     0xF260, 0x9A1A, 0xF261, 0x9A1B, 0xF262, 0x9A1C, 0xF263, 0x9A1D,
10494     0xF264, 0x9A1E, 0xF265, 0x9A1F, 0xF266, 0x9A20, 0xF267, 0x9A21,
10495     0xF268, 0x9A22, 0xF269, 0x9A23, 0xF26A, 0x9A24, 0xF26B, 0x9A25,
10496     0xF26C, 0x9A26, 0xF26D, 0x9A27, 0xF26E, 0x9A28, 0xF26F, 0x9A29,
10497     0xF270, 0x9A2A, 0xF271, 0x9A2B, 0xF272, 0x9A2C, 0xF273, 0x9A2D,
10498     0xF274, 0x9A2E, 0xF275, 0x9A2F, 0xF276, 0x9A30, 0xF277, 0x9A31,
10499     0xF278, 0x9A32, 0xF279, 0x9A33, 0xF27A, 0x9A34, 0xF27B, 0x9A35,
10500     0xF27C, 0x9A36, 0xF27D, 0x9A37, 0xF27E, 0x9A38, 0xF280, 0x9A39,
10501     0xF281, 0x9A3A, 0xF282, 0x9A3B, 0xF283, 0x9A3C, 0xF284, 0x9A3D,
10502     0xF285, 0x9A3E, 0xF286, 0x9A3F, 0xF287, 0x9A40, 0xF288, 0x9A41,
10503     0xF289, 0x9A42, 0xF28A, 0x9A43, 0xF28B, 0x9A44, 0xF28C, 0x9A45,
10504     0xF28D, 0x9A46, 0xF28E, 0x9A47, 0xF28F, 0x9A48, 0xF290, 0x9A49,
10505     0xF291, 0x9A4A, 0xF292, 0x9A4B, 0xF293, 0x9A4C, 0xF294, 0x9A4D,
10506     0xF295, 0x9A4E, 0xF296, 0x9A4F, 0xF297, 0x9A50, 0xF298, 0x9A51,
10507     0xF299, 0x9A52, 0xF29A, 0x9A53, 0xF29B, 0x9A54, 0xF29C, 0x9A55,
10508     0xF29D, 0x9A56, 0xF29E, 0x9A57, 0xF29F, 0x9A58, 0xF2A0, 0x9A59,
10509     0xF2A1, 0x9889, 0xF2A2, 0x988C, 0xF2A3, 0x988D, 0xF2A4, 0x988F,
10510     0xF2A5, 0x9894, 0xF2A6, 0x989A, 0xF2A7, 0x989B, 0xF2A8, 0x989E,
10511     0xF2A9, 0x989F, 0xF2AA, 0x98A1, 0xF2AB, 0x98A2, 0xF2AC, 0x98A5,
10512     0xF2AD, 0x98A6, 0xF2AE, 0x864D, 0xF2AF, 0x8654, 0xF2B0, 0x866C,
10513     0xF2B1, 0x866E, 0xF2B2, 0x867F, 0xF2B3, 0x867A, 0xF2B4, 0x867C,
10514     0xF2B5, 0x867B, 0xF2B6, 0x86A8, 0xF2B7, 0x868D, 0xF2B8, 0x868B,
10515     0xF2B9, 0x86AC, 0xF2BA, 0x869D, 0xF2BB, 0x86A7, 0xF2BC, 0x86A3,
10516     0xF2BD, 0x86AA, 0xF2BE, 0x8693, 0xF2BF, 0x86A9, 0xF2C0, 0x86B6,
10517     0xF2C1, 0x86C4, 0xF2C2, 0x86B5, 0xF2C3, 0x86CE, 0xF2C4, 0x86B0,
10518     0xF2C5, 0x86BA, 0xF2C6, 0x86B1, 0xF2C7, 0x86AF, 0xF2C8, 0x86C9,
10519     0xF2C9, 0x86CF, 0xF2CA, 0x86B4, 0xF2CB, 0x86E9, 0xF2CC, 0x86F1,
10520     0xF2CD, 0x86F2, 0xF2CE, 0x86ED, 0xF2CF, 0x86F3, 0xF2D0, 0x86D0,
10521     0xF2D1, 0x8713, 0xF2D2, 0x86DE, 0xF2D3, 0x86F4, 0xF2D4, 0x86DF,
10522     0xF2D5, 0x86D8, 0xF2D6, 0x86D1, 0xF2D7, 0x8703, 0xF2D8, 0x8707,
10523     0xF2D9, 0x86F8, 0xF2DA, 0x8708, 0xF2DB, 0x870A, 0xF2DC, 0x870D,
10524     0xF2DD, 0x8709, 0xF2DE, 0x8723, 0xF2DF, 0x873B, 0xF2E0, 0x871E,
10525     0xF2E1, 0x8725, 0xF2E2, 0x872E, 0xF2E3, 0x871A, 0xF2E4, 0x873E,
10526     0xF2E5, 0x8748, 0xF2E6, 0x8734, 0xF2E7, 0x8731, 0xF2E8, 0x8729,
10527     0xF2E9, 0x8737, 0xF2EA, 0x873F, 0xF2EB, 0x8782, 0xF2EC, 0x8722,
10528     0xF2ED, 0x877D, 0xF2EE, 0x877E, 0xF2EF, 0x877B, 0xF2F0, 0x8760,
10529     0xF2F1, 0x8770, 0xF2F2, 0x874C, 0xF2F3, 0x876E, 0xF2F4, 0x878B,
10530     0xF2F5, 0x8753, 0xF2F6, 0x8763, 0xF2F7, 0x877C, 0xF2F8, 0x8764,
10531     0xF2F9, 0x8759, 0xF2FA, 0x8765, 0xF2FB, 0x8793, 0xF2FC, 0x87AF,
10532     0xF2FD, 0x87A8, 0xF2FE, 0x87D2, 0xF340, 0x9A5A, 0xF341, 0x9A5B,
10533     0xF342, 0x9A5C, 0xF343, 0x9A5D, 0xF344, 0x9A5E, 0xF345, 0x9A5F,
10534     0xF346, 0x9A60, 0xF347, 0x9A61, 0xF348, 0x9A62, 0xF349, 0x9A63,
10535     0xF34A, 0x9A64, 0xF34B, 0x9A65, 0xF34C, 0x9A66, 0xF34D, 0x9A67,
10536     0xF34E, 0x9A68, 0xF34F, 0x9A69, 0xF350, 0x9A6A, 0xF351, 0x9A6B,
10537     0xF352, 0x9A72, 0xF353, 0x9A83, 0xF354, 0x9A89, 0xF355, 0x9A8D,
10538     0xF356, 0x9A8E, 0xF357, 0x9A94, 0xF358, 0x9A95, 0xF359, 0x9A99,
10539     0xF35A, 0x9AA6, 0xF35B, 0x9AA9, 0xF35C, 0x9AAA, 0xF35D, 0x9AAB,
10540     0xF35E, 0x9AAC, 0xF35F, 0x9AAD, 0xF360, 0x9AAE, 0xF361, 0x9AAF,
10541     0xF362, 0x9AB2, 0xF363, 0x9AB3, 0xF364, 0x9AB4, 0xF365, 0x9AB5,
10542     0xF366, 0x9AB9, 0xF367, 0x9ABB, 0xF368, 0x9ABD, 0xF369, 0x9ABE,
10543     0xF36A, 0x9ABF, 0xF36B, 0x9AC3, 0xF36C, 0x9AC4, 0xF36D, 0x9AC6,
10544     0xF36E, 0x9AC7, 0xF36F, 0x9AC8, 0xF370, 0x9AC9, 0xF371, 0x9ACA,
10545     0xF372, 0x9ACD, 0xF373, 0x9ACE, 0xF374, 0x9ACF, 0xF375, 0x9AD0,
10546     0xF376, 0x9AD2, 0xF377, 0x9AD4, 0xF378, 0x9AD5, 0xF379, 0x9AD6,
10547     0xF37A, 0x9AD7, 0xF37B, 0x9AD9, 0xF37C, 0x9ADA, 0xF37D, 0x9ADB,
10548     0xF37E, 0x9ADC, 0xF380, 0x9ADD, 0xF381, 0x9ADE, 0xF382, 0x9AE0,
10549     0xF383, 0x9AE2, 0xF384, 0x9AE3, 0xF385, 0x9AE4, 0xF386, 0x9AE5,
10550     0xF387, 0x9AE7, 0xF388, 0x9AE8, 0xF389, 0x9AE9, 0xF38A, 0x9AEA,
10551     0xF38B, 0x9AEC, 0xF38C, 0x9AEE, 0xF38D, 0x9AF0, 0xF38E, 0x9AF1,
10552     0xF38F, 0x9AF2, 0xF390, 0x9AF3, 0xF391, 0x9AF4, 0xF392, 0x9AF5,
10553     0xF393, 0x9AF6, 0xF394, 0x9AF7, 0xF395, 0x9AF8, 0xF396, 0x9AFA,
10554     0xF397, 0x9AFC, 0xF398, 0x9AFD, 0xF399, 0x9AFE, 0xF39A, 0x9AFF,
10555     0xF39B, 0x9B00, 0xF39C, 0x9B01, 0xF39D, 0x9B02, 0xF39E, 0x9B04,
10556     0xF39F, 0x9B05, 0xF3A0, 0x9B06, 0xF3A1, 0x87C6, 0xF3A2, 0x8788,
10557     0xF3A3, 0x8785, 0xF3A4, 0x87AD, 0xF3A5, 0x8797, 0xF3A6, 0x8783,
10558     0xF3A7, 0x87AB, 0xF3A8, 0x87E5, 0xF3A9, 0x87AC, 0xF3AA, 0x87B5,
10559     0xF3AB, 0x87B3, 0xF3AC, 0x87CB, 0xF3AD, 0x87D3, 0xF3AE, 0x87BD,
10560     0xF3AF, 0x87D1, 0xF3B0, 0x87C0, 0xF3B1, 0x87CA, 0xF3B2, 0x87DB,
10561     0xF3B3, 0x87EA, 0xF3B4, 0x87E0, 0xF3B5, 0x87EE, 0xF3B6, 0x8816,
10562     0xF3B7, 0x8813, 0xF3B8, 0x87FE, 0xF3B9, 0x880A, 0xF3BA, 0x881B,
10563     0xF3BB, 0x8821, 0xF3BC, 0x8839, 0xF3BD, 0x883C, 0xF3BE, 0x7F36,
10564     0xF3BF, 0x7F42, 0xF3C0, 0x7F44, 0xF3C1, 0x7F45, 0xF3C2, 0x8210,
10565     0xF3C3, 0x7AFA, 0xF3C4, 0x7AFD, 0xF3C5, 0x7B08, 0xF3C6, 0x7B03,
10566     0xF3C7, 0x7B04, 0xF3C8, 0x7B15, 0xF3C9, 0x7B0A, 0xF3CA, 0x7B2B,
10567     0xF3CB, 0x7B0F, 0xF3CC, 0x7B47, 0xF3CD, 0x7B38, 0xF3CE, 0x7B2A,
10568     0xF3CF, 0x7B19, 0xF3D0, 0x7B2E, 0xF3D1, 0x7B31, 0xF3D2, 0x7B20,
10569     0xF3D3, 0x7B25, 0xF3D4, 0x7B24, 0xF3D5, 0x7B33, 0xF3D6, 0x7B3E,
10570     0xF3D7, 0x7B1E, 0xF3D8, 0x7B58, 0xF3D9, 0x7B5A, 0xF3DA, 0x7B45,
10571     0xF3DB, 0x7B75, 0xF3DC, 0x7B4C, 0xF3DD, 0x7B5D, 0xF3DE, 0x7B60,
10572     0xF3DF, 0x7B6E, 0xF3E0, 0x7B7B, 0xF3E1, 0x7B62, 0xF3E2, 0x7B72,
10573     0xF3E3, 0x7B71, 0xF3E4, 0x7B90, 0xF3E5, 0x7BA6, 0xF3E6, 0x7BA7,
10574     0xF3E7, 0x7BB8, 0xF3E8, 0x7BAC, 0xF3E9, 0x7B9D, 0xF3EA, 0x7BA8,
10575     0xF3EB, 0x7B85, 0xF3EC, 0x7BAA, 0xF3ED, 0x7B9C, 0xF3EE, 0x7BA2,
10576     0xF3EF, 0x7BAB, 0xF3F0, 0x7BB4, 0xF3F1, 0x7BD1, 0xF3F2, 0x7BC1,
10577     0xF3F3, 0x7BCC, 0xF3F4, 0x7BDD, 0xF3F5, 0x7BDA, 0xF3F6, 0x7BE5,
10578     0xF3F7, 0x7BE6, 0xF3F8, 0x7BEA, 0xF3F9, 0x7C0C, 0xF3FA, 0x7BFE,
10579     0xF3FB, 0x7BFC, 0xF3FC, 0x7C0F, 0xF3FD, 0x7C16, 0xF3FE, 0x7C0B,
10580     0xF440, 0x9B07, 0xF441, 0x9B09, 0xF442, 0x9B0A, 0xF443, 0x9B0B,
10581     0xF444, 0x9B0C, 0xF445, 0x9B0D, 0xF446, 0x9B0E, 0xF447, 0x9B10,
10582     0xF448, 0x9B11, 0xF449, 0x9B12, 0xF44A, 0x9B14, 0xF44B, 0x9B15,
10583     0xF44C, 0x9B16, 0xF44D, 0x9B17, 0xF44E, 0x9B18, 0xF44F, 0x9B19,
10584     0xF450, 0x9B1A, 0xF451, 0x9B1B, 0xF452, 0x9B1C, 0xF453, 0x9B1D,
10585     0xF454, 0x9B1E, 0xF455, 0x9B20, 0xF456, 0x9B21, 0xF457, 0x9B22,
10586     0xF458, 0x9B24, 0xF459, 0x9B25, 0xF45A, 0x9B26, 0xF45B, 0x9B27,
10587     0xF45C, 0x9B28, 0xF45D, 0x9B29, 0xF45E, 0x9B2A, 0xF45F, 0x9B2B,
10588     0xF460, 0x9B2C, 0xF461, 0x9B2D, 0xF462, 0x9B2E, 0xF463, 0x9B30,
10589     0xF464, 0x9B31, 0xF465, 0x9B33, 0xF466, 0x9B34, 0xF467, 0x9B35,
10590     0xF468, 0x9B36, 0xF469, 0x9B37, 0xF46A, 0x9B38, 0xF46B, 0x9B39,
10591     0xF46C, 0x9B3A, 0xF46D, 0x9B3D, 0xF46E, 0x9B3E, 0xF46F, 0x9B3F,
10592     0xF470, 0x9B40, 0xF471, 0x9B46, 0xF472, 0x9B4A, 0xF473, 0x9B4B,
10593     0xF474, 0x9B4C, 0xF475, 0x9B4E, 0xF476, 0x9B50, 0xF477, 0x9B52,
10594     0xF478, 0x9B53, 0xF479, 0x9B55, 0xF47A, 0x9B56, 0xF47B, 0x9B57,
10595     0xF47C, 0x9B58, 0xF47D, 0x9B59, 0xF47E, 0x9B5A, 0xF480, 0x9B5B,
10596     0xF481, 0x9B5C, 0xF482, 0x9B5D, 0xF483, 0x9B5E, 0xF484, 0x9B5F,
10597     0xF485, 0x9B60, 0xF486, 0x9B61, 0xF487, 0x9B62, 0xF488, 0x9B63,
10598     0xF489, 0x9B64, 0xF48A, 0x9B65, 0xF48B, 0x9B66, 0xF48C, 0x9B67,
10599     0xF48D, 0x9B68, 0xF48E, 0x9B69, 0xF48F, 0x9B6A, 0xF490, 0x9B6B,
10600     0xF491, 0x9B6C, 0xF492, 0x9B6D, 0xF493, 0x9B6E, 0xF494, 0x9B6F,
10601     0xF495, 0x9B70, 0xF496, 0x9B71, 0xF497, 0x9B72, 0xF498, 0x9B73,
10602     0xF499, 0x9B74, 0xF49A, 0x9B75, 0xF49B, 0x9B76, 0xF49C, 0x9B77,
10603     0xF49D, 0x9B78, 0xF49E, 0x9B79, 0xF49F, 0x9B7A, 0xF4A0, 0x9B7B,
10604     0xF4A1, 0x7C1F, 0xF4A2, 0x7C2A, 0xF4A3, 0x7C26, 0xF4A4, 0x7C38,
10605     0xF4A5, 0x7C41, 0xF4A6, 0x7C40, 0xF4A7, 0x81FE, 0xF4A8, 0x8201,
10606     0xF4A9, 0x8202, 0xF4AA, 0x8204, 0xF4AB, 0x81EC, 0xF4AC, 0x8844,
10607     0xF4AD, 0x8221, 0xF4AE, 0x8222, 0xF4AF, 0x8223, 0xF4B0, 0x822D,
10608     0xF4B1, 0x822F, 0xF4B2, 0x8228, 0xF4B3, 0x822B, 0xF4B4, 0x8238,
10609     0xF4B5, 0x823B, 0xF4B6, 0x8233, 0xF4B7, 0x8234, 0xF4B8, 0x823E,
10610     0xF4B9, 0x8244, 0xF4BA, 0x8249, 0xF4BB, 0x824B, 0xF4BC, 0x824F,
10611     0xF4BD, 0x825A, 0xF4BE, 0x825F, 0xF4BF, 0x8268, 0xF4C0, 0x887E,
10612     0xF4C1, 0x8885, 0xF4C2, 0x8888, 0xF4C3, 0x88D8, 0xF4C4, 0x88DF,
10613     0xF4C5, 0x895E, 0xF4C6, 0x7F9D, 0xF4C7, 0x7F9F, 0xF4C8, 0x7FA7,
10614     0xF4C9, 0x7FAF, 0xF4CA, 0x7FB0, 0xF4CB, 0x7FB2, 0xF4CC, 0x7C7C,
10615     0xF4CD, 0x6549, 0xF4CE, 0x7C91, 0xF4CF, 0x7C9D, 0xF4D0, 0x7C9C,
10616     0xF4D1, 0x7C9E, 0xF4D2, 0x7CA2, 0xF4D3, 0x7CB2, 0xF4D4, 0x7CBC,
10617     0xF4D5, 0x7CBD, 0xF4D6, 0x7CC1, 0xF4D7, 0x7CC7, 0xF4D8, 0x7CCC,
10618     0xF4D9, 0x7CCD, 0xF4DA, 0x7CC8, 0xF4DB, 0x7CC5, 0xF4DC, 0x7CD7,
10619     0xF4DD, 0x7CE8, 0xF4DE, 0x826E, 0xF4DF, 0x66A8, 0xF4E0, 0x7FBF,
10620     0xF4E1, 0x7FCE, 0xF4E2, 0x7FD5, 0xF4E3, 0x7FE5, 0xF4E4, 0x7FE1,
10621     0xF4E5, 0x7FE6, 0xF4E6, 0x7FE9, 0xF4E7, 0x7FEE, 0xF4E8, 0x7FF3,
10622     0xF4E9, 0x7CF8, 0xF4EA, 0x7D77, 0xF4EB, 0x7DA6, 0xF4EC, 0x7DAE,
10623     0xF4ED, 0x7E47, 0xF4EE, 0x7E9B, 0xF4EF, 0x9EB8, 0xF4F0, 0x9EB4,
10624     0xF4F1, 0x8D73, 0xF4F2, 0x8D84, 0xF4F3, 0x8D94, 0xF4F4, 0x8D91,
10625     0xF4F5, 0x8DB1, 0xF4F6, 0x8D67, 0xF4F7, 0x8D6D, 0xF4F8, 0x8C47,
10626     0xF4F9, 0x8C49, 0xF4FA, 0x914A, 0xF4FB, 0x9150, 0xF4FC, 0x914E,
10627     0xF4FD, 0x914F, 0xF4FE, 0x9164, 0xF540, 0x9B7C, 0xF541, 0x9B7D,
10628     0xF542, 0x9B7E, 0xF543, 0x9B7F, 0xF544, 0x9B80, 0xF545, 0x9B81,
10629     0xF546, 0x9B82, 0xF547, 0x9B83, 0xF548, 0x9B84, 0xF549, 0x9B85,
10630     0xF54A, 0x9B86, 0xF54B, 0x9B87, 0xF54C, 0x9B88, 0xF54D, 0x9B89,
10631     0xF54E, 0x9B8A, 0xF54F, 0x9B8B, 0xF550, 0x9B8C, 0xF551, 0x9B8D,
10632     0xF552, 0x9B8E, 0xF553, 0x9B8F, 0xF554, 0x9B90, 0xF555, 0x9B91,
10633     0xF556, 0x9B92, 0xF557, 0x9B93, 0xF558, 0x9B94, 0xF559, 0x9B95,
10634     0xF55A, 0x9B96, 0xF55B, 0x9B97, 0xF55C, 0x9B98, 0xF55D, 0x9B99,
10635     0xF55E, 0x9B9A, 0xF55F, 0x9B9B, 0xF560, 0x9B9C, 0xF561, 0x9B9D,
10636     0xF562, 0x9B9E, 0xF563, 0x9B9F, 0xF564, 0x9BA0, 0xF565, 0x9BA1,
10637     0xF566, 0x9BA2, 0xF567, 0x9BA3, 0xF568, 0x9BA4, 0xF569, 0x9BA5,
10638     0xF56A, 0x9BA6, 0xF56B, 0x9BA7, 0xF56C, 0x9BA8, 0xF56D, 0x9BA9,
10639     0xF56E, 0x9BAA, 0xF56F, 0x9BAB, 0xF570, 0x9BAC, 0xF571, 0x9BAD,
10640     0xF572, 0x9BAE, 0xF573, 0x9BAF, 0xF574, 0x9BB0, 0xF575, 0x9BB1,
10641     0xF576, 0x9BB2, 0xF577, 0x9BB3, 0xF578, 0x9BB4, 0xF579, 0x9BB5,
10642     0xF57A, 0x9BB6, 0xF57B, 0x9BB7, 0xF57C, 0x9BB8, 0xF57D, 0x9BB9,
10643     0xF57E, 0x9BBA, 0xF580, 0x9BBB, 0xF581, 0x9BBC, 0xF582, 0x9BBD,
10644     0xF583, 0x9BBE, 0xF584, 0x9BBF, 0xF585, 0x9BC0, 0xF586, 0x9BC1,
10645     0xF587, 0x9BC2, 0xF588, 0x9BC3, 0xF589, 0x9BC4, 0xF58A, 0x9BC5,
10646     0xF58B, 0x9BC6, 0xF58C, 0x9BC7, 0xF58D, 0x9BC8, 0xF58E, 0x9BC9,
10647     0xF58F, 0x9BCA, 0xF590, 0x9BCB, 0xF591, 0x9BCC, 0xF592, 0x9BCD,
10648     0xF593, 0x9BCE, 0xF594, 0x9BCF, 0xF595, 0x9BD0, 0xF596, 0x9BD1,
10649     0xF597, 0x9BD2, 0xF598, 0x9BD3, 0xF599, 0x9BD4, 0xF59A, 0x9BD5,
10650     0xF59B, 0x9BD6, 0xF59C, 0x9BD7, 0xF59D, 0x9BD8, 0xF59E, 0x9BD9,
10651     0xF59F, 0x9BDA, 0xF5A0, 0x9BDB, 0xF5A1, 0x9162, 0xF5A2, 0x9161,
10652     0xF5A3, 0x9170, 0xF5A4, 0x9169, 0xF5A5, 0x916F, 0xF5A6, 0x917D,
10653     0xF5A7, 0x917E, 0xF5A8, 0x9172, 0xF5A9, 0x9174, 0xF5AA, 0x9179,
10654     0xF5AB, 0x918C, 0xF5AC, 0x9185, 0xF5AD, 0x9190, 0xF5AE, 0x918D,
10655     0xF5AF, 0x9191, 0xF5B0, 0x91A2, 0xF5B1, 0x91A3, 0xF5B2, 0x91AA,
10656     0xF5B3, 0x91AD, 0xF5B4, 0x91AE, 0xF5B5, 0x91AF, 0xF5B6, 0x91B5,
10657     0xF5B7, 0x91B4, 0xF5B8, 0x91BA, 0xF5B9, 0x8C55, 0xF5BA, 0x9E7E,
10658     0xF5BB, 0x8DB8, 0xF5BC, 0x8DEB, 0xF5BD, 0x8E05, 0xF5BE, 0x8E59,
10659     0xF5BF, 0x8E69, 0xF5C0, 0x8DB5, 0xF5C1, 0x8DBF, 0xF5C2, 0x8DBC,
10660     0xF5C3, 0x8DBA, 0xF5C4, 0x8DC4, 0xF5C5, 0x8DD6, 0xF5C6, 0x8DD7,
10661     0xF5C7, 0x8DDA, 0xF5C8, 0x8DDE, 0xF5C9, 0x8DCE, 0xF5CA, 0x8DCF,
10662     0xF5CB, 0x8DDB, 0xF5CC, 0x8DC6, 0xF5CD, 0x8DEC, 0xF5CE, 0x8DF7,
10663     0xF5CF, 0x8DF8, 0xF5D0, 0x8DE3, 0xF5D1, 0x8DF9, 0xF5D2, 0x8DFB,
10664     0xF5D3, 0x8DE4, 0xF5D4, 0x8E09, 0xF5D5, 0x8DFD, 0xF5D6, 0x8E14,
10665     0xF5D7, 0x8E1D, 0xF5D8, 0x8E1F, 0xF5D9, 0x8E2C, 0xF5DA, 0x8E2E,
10666     0xF5DB, 0x8E23, 0xF5DC, 0x8E2F, 0xF5DD, 0x8E3A, 0xF5DE, 0x8E40,
10667     0xF5DF, 0x8E39, 0xF5E0, 0x8E35, 0xF5E1, 0x8E3D, 0xF5E2, 0x8E31,
10668     0xF5E3, 0x8E49, 0xF5E4, 0x8E41, 0xF5E5, 0x8E42, 0xF5E6, 0x8E51,
10669     0xF5E7, 0x8E52, 0xF5E8, 0x8E4A, 0xF5E9, 0x8E70, 0xF5EA, 0x8E76,
10670     0xF5EB, 0x8E7C, 0xF5EC, 0x8E6F, 0xF5ED, 0x8E74, 0xF5EE, 0x8E85,
10671     0xF5EF, 0x8E8F, 0xF5F0, 0x8E94, 0xF5F1, 0x8E90, 0xF5F2, 0x8E9C,
10672     0xF5F3, 0x8E9E, 0xF5F4, 0x8C78, 0xF5F5, 0x8C82, 0xF5F6, 0x8C8A,
10673     0xF5F7, 0x8C85, 0xF5F8, 0x8C98, 0xF5F9, 0x8C94, 0xF5FA, 0x659B,
10674     0xF5FB, 0x89D6, 0xF5FC, 0x89DE, 0xF5FD, 0x89DA, 0xF5FE, 0x89DC,
10675     0xF640, 0x9BDC, 0xF641, 0x9BDD, 0xF642, 0x9BDE, 0xF643, 0x9BDF,
10676     0xF644, 0x9BE0, 0xF645, 0x9BE1, 0xF646, 0x9BE2, 0xF647, 0x9BE3,
10677     0xF648, 0x9BE4, 0xF649, 0x9BE5, 0xF64A, 0x9BE6, 0xF64B, 0x9BE7,
10678     0xF64C, 0x9BE8, 0xF64D, 0x9BE9, 0xF64E, 0x9BEA, 0xF64F, 0x9BEB,
10679     0xF650, 0x9BEC, 0xF651, 0x9BED, 0xF652, 0x9BEE, 0xF653, 0x9BEF,
10680     0xF654, 0x9BF0, 0xF655, 0x9BF1, 0xF656, 0x9BF2, 0xF657, 0x9BF3,
10681     0xF658, 0x9BF4, 0xF659, 0x9BF5, 0xF65A, 0x9BF6, 0xF65B, 0x9BF7,
10682     0xF65C, 0x9BF8, 0xF65D, 0x9BF9, 0xF65E, 0x9BFA, 0xF65F, 0x9BFB,
10683     0xF660, 0x9BFC, 0xF661, 0x9BFD, 0xF662, 0x9BFE, 0xF663, 0x9BFF,
10684     0xF664, 0x9C00, 0xF665, 0x9C01, 0xF666, 0x9C02, 0xF667, 0x9C03,
10685     0xF668, 0x9C04, 0xF669, 0x9C05, 0xF66A, 0x9C06, 0xF66B, 0x9C07,
10686     0xF66C, 0x9C08, 0xF66D, 0x9C09, 0xF66E, 0x9C0A, 0xF66F, 0x9C0B,
10687     0xF670, 0x9C0C, 0xF671, 0x9C0D, 0xF672, 0x9C0E, 0xF673, 0x9C0F,
10688     0xF674, 0x9C10, 0xF675, 0x9C11, 0xF676, 0x9C12, 0xF677, 0x9C13,
10689     0xF678, 0x9C14, 0xF679, 0x9C15, 0xF67A, 0x9C16, 0xF67B, 0x9C17,
10690     0xF67C, 0x9C18, 0xF67D, 0x9C19, 0xF67E, 0x9C1A, 0xF680, 0x9C1B,
10691     0xF681, 0x9C1C, 0xF682, 0x9C1D, 0xF683, 0x9C1E, 0xF684, 0x9C1F,
10692     0xF685, 0x9C20, 0xF686, 0x9C21, 0xF687, 0x9C22, 0xF688, 0x9C23,
10693     0xF689, 0x9C24, 0xF68A, 0x9C25, 0xF68B, 0x9C26, 0xF68C, 0x9C27,
10694     0xF68D, 0x9C28, 0xF68E, 0x9C29, 0xF68F, 0x9C2A, 0xF690, 0x9C2B,
10695     0xF691, 0x9C2C, 0xF692, 0x9C2D, 0xF693, 0x9C2E, 0xF694, 0x9C2F,
10696     0xF695, 0x9C30, 0xF696, 0x9C31, 0xF697, 0x9C32, 0xF698, 0x9C33,
10697     0xF699, 0x9C34, 0xF69A, 0x9C35, 0xF69B, 0x9C36, 0xF69C, 0x9C37,
10698     0xF69D, 0x9C38, 0xF69E, 0x9C39, 0xF69F, 0x9C3A, 0xF6A0, 0x9C3B,
10699     0xF6A1, 0x89E5, 0xF6A2, 0x89EB, 0xF6A3, 0x89EF, 0xF6A4, 0x8A3E,
10700     0xF6A5, 0x8B26, 0xF6A6, 0x9753, 0xF6A7, 0x96E9, 0xF6A8, 0x96F3,
10701     0xF6A9, 0x96EF, 0xF6AA, 0x9706, 0xF6AB, 0x9701, 0xF6AC, 0x9708,
10702     0xF6AD, 0x970F, 0xF6AE, 0x970E, 0xF6AF, 0x972A, 0xF6B0, 0x972D,
10703     0xF6B1, 0x9730, 0xF6B2, 0x973E, 0xF6B3, 0x9F80, 0xF6B4, 0x9F83,
10704     0xF6B5, 0x9F85, 0xF6B6, 0x9F86, 0xF6B7, 0x9F87, 0xF6B8, 0x9F88,
10705     0xF6B9, 0x9F89, 0xF6BA, 0x9F8A, 0xF6BB, 0x9F8C, 0xF6BC, 0x9EFE,
10706     0xF6BD, 0x9F0B, 0xF6BE, 0x9F0D, 0xF6BF, 0x96B9, 0xF6C0, 0x96BC,
10707     0xF6C1, 0x96BD, 0xF6C2, 0x96CE, 0xF6C3, 0x96D2, 0xF6C4, 0x77BF,
10708     0xF6C5, 0x96E0, 0xF6C6, 0x928E, 0xF6C7, 0x92AE, 0xF6C8, 0x92C8,
10709     0xF6C9, 0x933E, 0xF6CA, 0x936A, 0xF6CB, 0x93CA, 0xF6CC, 0x938F,
10710     0xF6CD, 0x943E, 0xF6CE, 0x946B, 0xF6CF, 0x9C7F, 0xF6D0, 0x9C82,
10711     0xF6D1, 0x9C85, 0xF6D2, 0x9C86, 0xF6D3, 0x9C87, 0xF6D4, 0x9C88,
10712     0xF6D5, 0x7A23, 0xF6D6, 0x9C8B, 0xF6D7, 0x9C8E, 0xF6D8, 0x9C90,
10713     0xF6D9, 0x9C91, 0xF6DA, 0x9C92, 0xF6DB, 0x9C94, 0xF6DC, 0x9C95,
10714     0xF6DD, 0x9C9A, 0xF6DE, 0x9C9B, 0xF6DF, 0x9C9E, 0xF6E0, 0x9C9F,
10715     0xF6E1, 0x9CA0, 0xF6E2, 0x9CA1, 0xF6E3, 0x9CA2, 0xF6E4, 0x9CA3,
10716     0xF6E5, 0x9CA5, 0xF6E6, 0x9CA6, 0xF6E7, 0x9CA7, 0xF6E8, 0x9CA8,
10717     0xF6E9, 0x9CA9, 0xF6EA, 0x9CAB, 0xF6EB, 0x9CAD, 0xF6EC, 0x9CAE,
10718     0xF6ED, 0x9CB0, 0xF6EE, 0x9CB1, 0xF6EF, 0x9CB2, 0xF6F0, 0x9CB3,
10719     0xF6F1, 0x9CB4, 0xF6F2, 0x9CB5, 0xF6F3, 0x9CB6, 0xF6F4, 0x9CB7,
10720     0xF6F5, 0x9CBA, 0xF6F6, 0x9CBB, 0xF6F7, 0x9CBC, 0xF6F8, 0x9CBD,
10721     0xF6F9, 0x9CC4, 0xF6FA, 0x9CC5, 0xF6FB, 0x9CC6, 0xF6FC, 0x9CC7,
10722     0xF6FD, 0x9CCA, 0xF6FE, 0x9CCB, 0xF740, 0x9C3C, 0xF741, 0x9C3D,
10723     0xF742, 0x9C3E, 0xF743, 0x9C3F, 0xF744, 0x9C40, 0xF745, 0x9C41,
10724     0xF746, 0x9C42, 0xF747, 0x9C43, 0xF748, 0x9C44, 0xF749, 0x9C45,
10725     0xF74A, 0x9C46, 0xF74B, 0x9C47, 0xF74C, 0x9C48, 0xF74D, 0x9C49,
10726     0xF74E, 0x9C4A, 0xF74F, 0x9C4B, 0xF750, 0x9C4C, 0xF751, 0x9C4D,
10727     0xF752, 0x9C4E, 0xF753, 0x9C4F, 0xF754, 0x9C50, 0xF755, 0x9C51,
10728     0xF756, 0x9C52, 0xF757, 0x9C53, 0xF758, 0x9C54, 0xF759, 0x9C55,
10729     0xF75A, 0x9C56, 0xF75B, 0x9C57, 0xF75C, 0x9C58, 0xF75D, 0x9C59,
10730     0xF75E, 0x9C5A, 0xF75F, 0x9C5B, 0xF760, 0x9C5C, 0xF761, 0x9C5D,
10731     0xF762, 0x9C5E, 0xF763, 0x9C5F, 0xF764, 0x9C60, 0xF765, 0x9C61,
10732     0xF766, 0x9C62, 0xF767, 0x9C63, 0xF768, 0x9C64, 0xF769, 0x9C65,
10733     0xF76A, 0x9C66, 0xF76B, 0x9C67, 0xF76C, 0x9C68, 0xF76D, 0x9C69,
10734     0xF76E, 0x9C6A, 0xF76F, 0x9C6B, 0xF770, 0x9C6C, 0xF771, 0x9C6D,
10735     0xF772, 0x9C6E, 0xF773, 0x9C6F, 0xF774, 0x9C70, 0xF775, 0x9C71,
10736     0xF776, 0x9C72, 0xF777, 0x9C73, 0xF778, 0x9C74, 0xF779, 0x9C75,
10737     0xF77A, 0x9C76, 0xF77B, 0x9C77, 0xF77C, 0x9C78, 0xF77D, 0x9C79,
10738     0xF77E, 0x9C7A, 0xF780, 0x9C7B, 0xF781, 0x9C7D, 0xF782, 0x9C7E,
10739     0xF783, 0x9C80, 0xF784, 0x9C83, 0xF785, 0x9C84, 0xF786, 0x9C89,
10740     0xF787, 0x9C8A, 0xF788, 0x9C8C, 0xF789, 0x9C8F, 0xF78A, 0x9C93,
10741     0xF78B, 0x9C96, 0xF78C, 0x9C97, 0xF78D, 0x9C98, 0xF78E, 0x9C99,
10742     0xF78F, 0x9C9D, 0xF790, 0x9CAA, 0xF791, 0x9CAC, 0xF792, 0x9CAF,
10743     0xF793, 0x9CB9, 0xF794, 0x9CBE, 0xF795, 0x9CBF, 0xF796, 0x9CC0,
10744     0xF797, 0x9CC1, 0xF798, 0x9CC2, 0xF799, 0x9CC8, 0xF79A, 0x9CC9,
10745     0xF79B, 0x9CD1, 0xF79C, 0x9CD2, 0xF79D, 0x9CDA, 0xF79E, 0x9CDB,
10746     0xF79F, 0x9CE0, 0xF7A0, 0x9CE1, 0xF7A1, 0x9CCC, 0xF7A2, 0x9CCD,
10747     0xF7A3, 0x9CCE, 0xF7A4, 0x9CCF, 0xF7A5, 0x9CD0, 0xF7A6, 0x9CD3,
10748     0xF7A7, 0x9CD4, 0xF7A8, 0x9CD5, 0xF7A9, 0x9CD7, 0xF7AA, 0x9CD8,
10749     0xF7AB, 0x9CD9, 0xF7AC, 0x9CDC, 0xF7AD, 0x9CDD, 0xF7AE, 0x9CDF,
10750     0xF7AF, 0x9CE2, 0xF7B0, 0x977C, 0xF7B1, 0x9785, 0xF7B2, 0x9791,
10751     0xF7B3, 0x9792, 0xF7B4, 0x9794, 0xF7B5, 0x97AF, 0xF7B6, 0x97AB,
10752     0xF7B7, 0x97A3, 0xF7B8, 0x97B2, 0xF7B9, 0x97B4, 0xF7BA, 0x9AB1,
10753     0xF7BB, 0x9AB0, 0xF7BC, 0x9AB7, 0xF7BD, 0x9E58, 0xF7BE, 0x9AB6,
10754     0xF7BF, 0x9ABA, 0xF7C0, 0x9ABC, 0xF7C1, 0x9AC1, 0xF7C2, 0x9AC0,
10755     0xF7C3, 0x9AC5, 0xF7C4, 0x9AC2, 0xF7C5, 0x9ACB, 0xF7C6, 0x9ACC,
10756     0xF7C7, 0x9AD1, 0xF7C8, 0x9B45, 0xF7C9, 0x9B43, 0xF7CA, 0x9B47,
10757     0xF7CB, 0x9B49, 0xF7CC, 0x9B48, 0xF7CD, 0x9B4D, 0xF7CE, 0x9B51,
10758     0xF7CF, 0x98E8, 0xF7D0, 0x990D, 0xF7D1, 0x992E, 0xF7D2, 0x9955,
10759     0xF7D3, 0x9954, 0xF7D4, 0x9ADF, 0xF7D5, 0x9AE1, 0xF7D6, 0x9AE6,
10760     0xF7D7, 0x9AEF, 0xF7D8, 0x9AEB, 0xF7D9, 0x9AFB, 0xF7DA, 0x9AED,
10761     0xF7DB, 0x9AF9, 0xF7DC, 0x9B08, 0xF7DD, 0x9B0F, 0xF7DE, 0x9B13,
10762     0xF7DF, 0x9B1F, 0xF7E0, 0x9B23, 0xF7E1, 0x9EBD, 0xF7E2, 0x9EBE,
10763     0xF7E3, 0x7E3B, 0xF7E4, 0x9E82, 0xF7E5, 0x9E87, 0xF7E6, 0x9E88,
10764     0xF7E7, 0x9E8B, 0xF7E8, 0x9E92, 0xF7E9, 0x93D6, 0xF7EA, 0x9E9D,
10765     0xF7EB, 0x9E9F, 0xF7EC, 0x9EDB, 0xF7ED, 0x9EDC, 0xF7EE, 0x9EDD,
10766     0xF7EF, 0x9EE0, 0xF7F0, 0x9EDF, 0xF7F1, 0x9EE2, 0xF7F2, 0x9EE9,
10767     0xF7F3, 0x9EE7, 0xF7F4, 0x9EE5, 0xF7F5, 0x9EEA, 0xF7F6, 0x9EEF,
10768     0xF7F7, 0x9F22, 0xF7F8, 0x9F2C, 0xF7F9, 0x9F2F, 0xF7FA, 0x9F39,
10769     0xF7FB, 0x9F37, 0xF7FC, 0x9F3D, 0xF7FD, 0x9F3E, 0xF7FE, 0x9F44,
10770     0xF840, 0x9CE3, 0xF841, 0x9CE4, 0xF842, 0x9CE5, 0xF843, 0x9CE6,
10771     0xF844, 0x9CE7, 0xF845, 0x9CE8, 0xF846, 0x9CE9, 0xF847, 0x9CEA,
10772     0xF848, 0x9CEB, 0xF849, 0x9CEC, 0xF84A, 0x9CED, 0xF84B, 0x9CEE,
10773     0xF84C, 0x9CEF, 0xF84D, 0x9CF0, 0xF84E, 0x9CF1, 0xF84F, 0x9CF2,
10774     0xF850, 0x9CF3, 0xF851, 0x9CF4, 0xF852, 0x9CF5, 0xF853, 0x9CF6,
10775     0xF854, 0x9CF7, 0xF855, 0x9CF8, 0xF856, 0x9CF9, 0xF857, 0x9CFA,
10776     0xF858, 0x9CFB, 0xF859, 0x9CFC, 0xF85A, 0x9CFD, 0xF85B, 0x9CFE,
10777     0xF85C, 0x9CFF, 0xF85D, 0x9D00, 0xF85E, 0x9D01, 0xF85F, 0x9D02,
10778     0xF860, 0x9D03, 0xF861, 0x9D04, 0xF862, 0x9D05, 0xF863, 0x9D06,
10779     0xF864, 0x9D07, 0xF865, 0x9D08, 0xF866, 0x9D09, 0xF867, 0x9D0A,
10780     0xF868, 0x9D0B, 0xF869, 0x9D0C, 0xF86A, 0x9D0D, 0xF86B, 0x9D0E,
10781     0xF86C, 0x9D0F, 0xF86D, 0x9D10, 0xF86E, 0x9D11, 0xF86F, 0x9D12,
10782     0xF870, 0x9D13, 0xF871, 0x9D14, 0xF872, 0x9D15, 0xF873, 0x9D16,
10783     0xF874, 0x9D17, 0xF875, 0x9D18, 0xF876, 0x9D19, 0xF877, 0x9D1A,
10784     0xF878, 0x9D1B, 0xF879, 0x9D1C, 0xF87A, 0x9D1D, 0xF87B, 0x9D1E,
10785     0xF87C, 0x9D1F, 0xF87D, 0x9D20, 0xF87E, 0x9D21, 0xF880, 0x9D22,
10786     0xF881, 0x9D23, 0xF882, 0x9D24, 0xF883, 0x9D25, 0xF884, 0x9D26,
10787     0xF885, 0x9D27, 0xF886, 0x9D28, 0xF887, 0x9D29, 0xF888, 0x9D2A,
10788     0xF889, 0x9D2B, 0xF88A, 0x9D2C, 0xF88B, 0x9D2D, 0xF88C, 0x9D2E,
10789     0xF88D, 0x9D2F, 0xF88E, 0x9D30, 0xF88F, 0x9D31, 0xF890, 0x9D32,
10790     0xF891, 0x9D33, 0xF892, 0x9D34, 0xF893, 0x9D35, 0xF894, 0x9D36,
10791     0xF895, 0x9D37, 0xF896, 0x9D38, 0xF897, 0x9D39, 0xF898, 0x9D3A,
10792     0xF899, 0x9D3B, 0xF89A, 0x9D3C, 0xF89B, 0x9D3D, 0xF89C, 0x9D3E,
10793     0xF89D, 0x9D3F, 0xF89E, 0x9D40, 0xF89F, 0x9D41, 0xF8A0, 0x9D42,
10794     0xF940, 0x9D43, 0xF941, 0x9D44, 0xF942, 0x9D45, 0xF943, 0x9D46,
10795     0xF944, 0x9D47, 0xF945, 0x9D48, 0xF946, 0x9D49, 0xF947, 0x9D4A,
10796     0xF948, 0x9D4B, 0xF949, 0x9D4C, 0xF94A, 0x9D4D, 0xF94B, 0x9D4E,
10797     0xF94C, 0x9D4F, 0xF94D, 0x9D50, 0xF94E, 0x9D51, 0xF94F, 0x9D52,
10798     0xF950, 0x9D53, 0xF951, 0x9D54, 0xF952, 0x9D55, 0xF953, 0x9D56,
10799     0xF954, 0x9D57, 0xF955, 0x9D58, 0xF956, 0x9D59, 0xF957, 0x9D5A,
10800     0xF958, 0x9D5B, 0xF959, 0x9D5C, 0xF95A, 0x9D5D, 0xF95B, 0x9D5E,
10801     0xF95C, 0x9D5F, 0xF95D, 0x9D60, 0xF95E, 0x9D61, 0xF95F, 0x9D62,
10802     0xF960, 0x9D63, 0xF961, 0x9D64, 0xF962, 0x9D65, 0xF963, 0x9D66,
10803     0xF964, 0x9D67, 0xF965, 0x9D68, 0xF966, 0x9D69, 0xF967, 0x9D6A,
10804     0xF968, 0x9D6B, 0xF969, 0x9D6C, 0xF96A, 0x9D6D, 0xF96B, 0x9D6E,
10805     0xF96C, 0x9D6F, 0xF96D, 0x9D70, 0xF96E, 0x9D71, 0xF96F, 0x9D72,
10806     0xF970, 0x9D73, 0xF971, 0x9D74, 0xF972, 0x9D75, 0xF973, 0x9D76,
10807     0xF974, 0x9D77, 0xF975, 0x9D78, 0xF976, 0x9D79, 0xF977, 0x9D7A,
10808     0xF978, 0x9D7B, 0xF979, 0x9D7C, 0xF97A, 0x9D7D, 0xF97B, 0x9D7E,
10809     0xF97C, 0x9D7F, 0xF97D, 0x9D80, 0xF97E, 0x9D81, 0xF980, 0x9D82,
10810     0xF981, 0x9D83, 0xF982, 0x9D84, 0xF983, 0x9D85, 0xF984, 0x9D86,
10811     0xF985, 0x9D87, 0xF986, 0x9D88, 0xF987, 0x9D89, 0xF988, 0x9D8A,
10812     0xF989, 0x9D8B, 0xF98A, 0x9D8C, 0xF98B, 0x9D8D, 0xF98C, 0x9D8E,
10813     0xF98D, 0x9D8F, 0xF98E, 0x9D90, 0xF98F, 0x9D91, 0xF990, 0x9D92,
10814     0xF991, 0x9D93, 0xF992, 0x9D94, 0xF993, 0x9D95, 0xF994, 0x9D96,
10815     0xF995, 0x9D97, 0xF996, 0x9D98, 0xF997, 0x9D99, 0xF998, 0x9D9A,
10816     0xF999, 0x9D9B, 0xF99A, 0x9D9C, 0xF99B, 0x9D9D, 0xF99C, 0x9D9E,
10817     0xF99D, 0x9D9F, 0xF99E, 0x9DA0, 0xF99F, 0x9DA1, 0xF9A0, 0x9DA2,
10818     0xFA40, 0x9DA3, 0xFA41, 0x9DA4, 0xFA42, 0x9DA5, 0xFA43, 0x9DA6,
10819     0xFA44, 0x9DA7, 0xFA45, 0x9DA8, 0xFA46, 0x9DA9, 0xFA47, 0x9DAA,
10820     0xFA48, 0x9DAB, 0xFA49, 0x9DAC, 0xFA4A, 0x9DAD, 0xFA4B, 0x9DAE,
10821     0xFA4C, 0x9DAF, 0xFA4D, 0x9DB0, 0xFA4E, 0x9DB1, 0xFA4F, 0x9DB2,
10822     0xFA50, 0x9DB3, 0xFA51, 0x9DB4, 0xFA52, 0x9DB5, 0xFA53, 0x9DB6,
10823     0xFA54, 0x9DB7, 0xFA55, 0x9DB8, 0xFA56, 0x9DB9, 0xFA57, 0x9DBA,
10824     0xFA58, 0x9DBB, 0xFA59, 0x9DBC, 0xFA5A, 0x9DBD, 0xFA5B, 0x9DBE,
10825     0xFA5C, 0x9DBF, 0xFA5D, 0x9DC0, 0xFA5E, 0x9DC1, 0xFA5F, 0x9DC2,
10826     0xFA60, 0x9DC3, 0xFA61, 0x9DC4, 0xFA62, 0x9DC5, 0xFA63, 0x9DC6,
10827     0xFA64, 0x9DC7, 0xFA65, 0x9DC8, 0xFA66, 0x9DC9, 0xFA67, 0x9DCA,
10828     0xFA68, 0x9DCB, 0xFA69, 0x9DCC, 0xFA6A, 0x9DCD, 0xFA6B, 0x9DCE,
10829     0xFA6C, 0x9DCF, 0xFA6D, 0x9DD0, 0xFA6E, 0x9DD1, 0xFA6F, 0x9DD2,
10830     0xFA70, 0x9DD3, 0xFA71, 0x9DD4, 0xFA72, 0x9DD5, 0xFA73, 0x9DD6,
10831     0xFA74, 0x9DD7, 0xFA75, 0x9DD8, 0xFA76, 0x9DD9, 0xFA77, 0x9DDA,
10832     0xFA78, 0x9DDB, 0xFA79, 0x9DDC, 0xFA7A, 0x9DDD, 0xFA7B, 0x9DDE,
10833     0xFA7C, 0x9DDF, 0xFA7D, 0x9DE0, 0xFA7E, 0x9DE1, 0xFA80, 0x9DE2,
10834     0xFA81, 0x9DE3, 0xFA82, 0x9DE4, 0xFA83, 0x9DE5, 0xFA84, 0x9DE6,
10835     0xFA85, 0x9DE7, 0xFA86, 0x9DE8, 0xFA87, 0x9DE9, 0xFA88, 0x9DEA,
10836     0xFA89, 0x9DEB, 0xFA8A, 0x9DEC, 0xFA8B, 0x9DED, 0xFA8C, 0x9DEE,
10837     0xFA8D, 0x9DEF, 0xFA8E, 0x9DF0, 0xFA8F, 0x9DF1, 0xFA90, 0x9DF2,
10838     0xFA91, 0x9DF3, 0xFA92, 0x9DF4, 0xFA93, 0x9DF5, 0xFA94, 0x9DF6,
10839     0xFA95, 0x9DF7, 0xFA96, 0x9DF8, 0xFA97, 0x9DF9, 0xFA98, 0x9DFA,
10840     0xFA99, 0x9DFB, 0xFA9A, 0x9DFC, 0xFA9B, 0x9DFD, 0xFA9C, 0x9DFE,
10841     0xFA9D, 0x9DFF, 0xFA9E, 0x9E00, 0xFA9F, 0x9E01, 0xFAA0, 0x9E02,
10842     0xFB40, 0x9E03, 0xFB41, 0x9E04, 0xFB42, 0x9E05, 0xFB43, 0x9E06,
10843     0xFB44, 0x9E07, 0xFB45, 0x9E08, 0xFB46, 0x9E09, 0xFB47, 0x9E0A,
10844     0xFB48, 0x9E0B, 0xFB49, 0x9E0C, 0xFB4A, 0x9E0D, 0xFB4B, 0x9E0E,
10845     0xFB4C, 0x9E0F, 0xFB4D, 0x9E10, 0xFB4E, 0x9E11, 0xFB4F, 0x9E12,
10846     0xFB50, 0x9E13, 0xFB51, 0x9E14, 0xFB52, 0x9E15, 0xFB53, 0x9E16,
10847     0xFB54, 0x9E17, 0xFB55, 0x9E18, 0xFB56, 0x9E19, 0xFB57, 0x9E1A,
10848     0xFB58, 0x9E1B, 0xFB59, 0x9E1C, 0xFB5A, 0x9E1D, 0xFB5B, 0x9E1E,
10849     0xFB5C, 0x9E24, 0xFB5D, 0x9E27, 0xFB5E, 0x9E2E, 0xFB5F, 0x9E30,
10850     0xFB60, 0x9E34, 0xFB61, 0x9E3B, 0xFB62, 0x9E3C, 0xFB63, 0x9E40,
10851     0xFB64, 0x9E4D, 0xFB65, 0x9E50, 0xFB66, 0x9E52, 0xFB67, 0x9E53,
10852     0xFB68, 0x9E54, 0xFB69, 0x9E56, 0xFB6A, 0x9E59, 0xFB6B, 0x9E5D,
10853     0xFB6C, 0x9E5F, 0xFB6D, 0x9E60, 0xFB6E, 0x9E61, 0xFB6F, 0x9E62,
10854     0xFB70, 0x9E65, 0xFB71, 0x9E6E, 0xFB72, 0x9E6F, 0xFB73, 0x9E72,
10855     0xFB74, 0x9E74, 0xFB75, 0x9E75, 0xFB76, 0x9E76, 0xFB77, 0x9E77,
10856     0xFB78, 0x9E78, 0xFB79, 0x9E79, 0xFB7A, 0x9E7A, 0xFB7B, 0x9E7B,
10857     0xFB7C, 0x9E7C, 0xFB7D, 0x9E7D, 0xFB7E, 0x9E80, 0xFB80, 0x9E81,
10858     0xFB81, 0x9E83, 0xFB82, 0x9E84, 0xFB83, 0x9E85, 0xFB84, 0x9E86,
10859     0xFB85, 0x9E89, 0xFB86, 0x9E8A, 0xFB87, 0x9E8C, 0xFB88, 0x9E8D,
10860     0xFB89, 0x9E8E, 0xFB8A, 0x9E8F, 0xFB8B, 0x9E90, 0xFB8C, 0x9E91,
10861     0xFB8D, 0x9E94, 0xFB8E, 0x9E95, 0xFB8F, 0x9E96, 0xFB90, 0x9E97,
10862     0xFB91, 0x9E98, 0xFB92, 0x9E99, 0xFB93, 0x9E9A, 0xFB94, 0x9E9B,
10863     0xFB95, 0x9E9C, 0xFB96, 0x9E9E, 0xFB97, 0x9EA0, 0xFB98, 0x9EA1,
10864     0xFB99, 0x9EA2, 0xFB9A, 0x9EA3, 0xFB9B, 0x9EA4, 0xFB9C, 0x9EA5,
10865     0xFB9D, 0x9EA7, 0xFB9E, 0x9EA8, 0xFB9F, 0x9EA9, 0xFBA0, 0x9EAA,
10866     0xFC40, 0x9EAB, 0xFC41, 0x9EAC, 0xFC42, 0x9EAD, 0xFC43, 0x9EAE,
10867     0xFC44, 0x9EAF, 0xFC45, 0x9EB0, 0xFC46, 0x9EB1, 0xFC47, 0x9EB2,
10868     0xFC48, 0x9EB3, 0xFC49, 0x9EB5, 0xFC4A, 0x9EB6, 0xFC4B, 0x9EB7,
10869     0xFC4C, 0x9EB9, 0xFC4D, 0x9EBA, 0xFC4E, 0x9EBC, 0xFC4F, 0x9EBF,
10870     0xFC50, 0x9EC0, 0xFC51, 0x9EC1, 0xFC52, 0x9EC2, 0xFC53, 0x9EC3,
10871     0xFC54, 0x9EC5, 0xFC55, 0x9EC6, 0xFC56, 0x9EC7, 0xFC57, 0x9EC8,
10872     0xFC58, 0x9ECA, 0xFC59, 0x9ECB, 0xFC5A, 0x9ECC, 0xFC5B, 0x9ED0,
10873     0xFC5C, 0x9ED2, 0xFC5D, 0x9ED3, 0xFC5E, 0x9ED5, 0xFC5F, 0x9ED6,
10874     0xFC60, 0x9ED7, 0xFC61, 0x9ED9, 0xFC62, 0x9EDA, 0xFC63, 0x9EDE,
10875     0xFC64, 0x9EE1, 0xFC65, 0x9EE3, 0xFC66, 0x9EE4, 0xFC67, 0x9EE6,
10876     0xFC68, 0x9EE8, 0xFC69, 0x9EEB, 0xFC6A, 0x9EEC, 0xFC6B, 0x9EED,
10877     0xFC6C, 0x9EEE, 0xFC6D, 0x9EF0, 0xFC6E, 0x9EF1, 0xFC6F, 0x9EF2,
10878     0xFC70, 0x9EF3, 0xFC71, 0x9EF4, 0xFC72, 0x9EF5, 0xFC73, 0x9EF6,
10879     0xFC74, 0x9EF7, 0xFC75, 0x9EF8, 0xFC76, 0x9EFA, 0xFC77, 0x9EFD,
10880     0xFC78, 0x9EFF, 0xFC79, 0x9F00, 0xFC7A, 0x9F01, 0xFC7B, 0x9F02,
10881     0xFC7C, 0x9F03, 0xFC7D, 0x9F04, 0xFC7E, 0x9F05, 0xFC80, 0x9F06,
10882     0xFC81, 0x9F07, 0xFC82, 0x9F08, 0xFC83, 0x9F09, 0xFC84, 0x9F0A,
10883     0xFC85, 0x9F0C, 0xFC86, 0x9F0F, 0xFC87, 0x9F11, 0xFC88, 0x9F12,
10884     0xFC89, 0x9F14, 0xFC8A, 0x9F15, 0xFC8B, 0x9F16, 0xFC8C, 0x9F18,
10885     0xFC8D, 0x9F1A, 0xFC8E, 0x9F1B, 0xFC8F, 0x9F1C, 0xFC90, 0x9F1D,
10886     0xFC91, 0x9F1E, 0xFC92, 0x9F1F, 0xFC93, 0x9F21, 0xFC94, 0x9F23,
10887     0xFC95, 0x9F24, 0xFC96, 0x9F25, 0xFC97, 0x9F26, 0xFC98, 0x9F27,
10888     0xFC99, 0x9F28, 0xFC9A, 0x9F29, 0xFC9B, 0x9F2A, 0xFC9C, 0x9F2B,
10889     0xFC9D, 0x9F2D, 0xFC9E, 0x9F2E, 0xFC9F, 0x9F30, 0xFCA0, 0x9F31,
10890     0xFD40, 0x9F32, 0xFD41, 0x9F33, 0xFD42, 0x9F34, 0xFD43, 0x9F35,
10891     0xFD44, 0x9F36, 0xFD45, 0x9F38, 0xFD46, 0x9F3A, 0xFD47, 0x9F3C,
10892     0xFD48, 0x9F3F, 0xFD49, 0x9F40, 0xFD4A, 0x9F41, 0xFD4B, 0x9F42,
10893     0xFD4C, 0x9F43, 0xFD4D, 0x9F45, 0xFD4E, 0x9F46, 0xFD4F, 0x9F47,
10894     0xFD50, 0x9F48, 0xFD51, 0x9F49, 0xFD52, 0x9F4A, 0xFD53, 0x9F4B,
10895     0xFD54, 0x9F4C, 0xFD55, 0x9F4D, 0xFD56, 0x9F4E, 0xFD57, 0x9F4F,
10896     0xFD58, 0x9F52, 0xFD59, 0x9F53, 0xFD5A, 0x9F54, 0xFD5B, 0x9F55,
10897     0xFD5C, 0x9F56, 0xFD5D, 0x9F57, 0xFD5E, 0x9F58, 0xFD5F, 0x9F59,
10898     0xFD60, 0x9F5A, 0xFD61, 0x9F5B, 0xFD62, 0x9F5C, 0xFD63, 0x9F5D,
10899     0xFD64, 0x9F5E, 0xFD65, 0x9F5F, 0xFD66, 0x9F60, 0xFD67, 0x9F61,
10900     0xFD68, 0x9F62, 0xFD69, 0x9F63, 0xFD6A, 0x9F64, 0xFD6B, 0x9F65,
10901     0xFD6C, 0x9F66, 0xFD6D, 0x9F67, 0xFD6E, 0x9F68, 0xFD6F, 0x9F69,
10902     0xFD70, 0x9F6A, 0xFD71, 0x9F6B, 0xFD72, 0x9F6C, 0xFD73, 0x9F6D,
10903     0xFD74, 0x9F6E, 0xFD75, 0x9F6F, 0xFD76, 0x9F70, 0xFD77, 0x9F71,
10904     0xFD78, 0x9F72, 0xFD79, 0x9F73, 0xFD7A, 0x9F74, 0xFD7B, 0x9F75,
10905     0xFD7C, 0x9F76, 0xFD7D, 0x9F77, 0xFD7E, 0x9F78, 0xFD80, 0x9F79,
10906     0xFD81, 0x9F7A, 0xFD82, 0x9F7B, 0xFD83, 0x9F7C, 0xFD84, 0x9F7D,
10907     0xFD85, 0x9F7E, 0xFD86, 0x9F81, 0xFD87, 0x9F82, 0xFD88, 0x9F8D,
10908     0xFD89, 0x9F8E, 0xFD8A, 0x9F8F, 0xFD8B, 0x9F90, 0xFD8C, 0x9F91,
10909     0xFD8D, 0x9F92, 0xFD8E, 0x9F93, 0xFD8F, 0x9F94, 0xFD90, 0x9F95,
10910     0xFD91, 0x9F96, 0xFD92, 0x9F97, 0xFD93, 0x9F98, 0xFD94, 0x9F9C,
10911     0xFD95, 0x9F9D, 0xFD96, 0x9F9E, 0xFD97, 0x9FA1, 0xFD98, 0x9FA2,
10912     0xFD99, 0x9FA3, 0xFD9A, 0x9FA4, 0xFD9B, 0x9FA5, 0xFD9C, 0xF92C,
10913     0xFD9D, 0xF979, 0xFD9E, 0xF995, 0xFD9F, 0xF9E7, 0xFDA0, 0xF9F1,
10914     0xFE40, 0xFA0C, 0xFE41, 0xFA0D, 0xFE42, 0xFA0E, 0xFE43, 0xFA0F,
10915     0xFE44, 0xFA11, 0xFE45, 0xFA13, 0xFE46, 0xFA14, 0xFE47, 0xFA18,
10916     0xFE48, 0xFA1F, 0xFE49, 0xFA20, 0xFE4A, 0xFA21, 0xFE4B, 0xFA23,
10917     0xFE4C, 0xFA24, 0xFE4D, 0xFA27, 0xFE4E, 0xFA28, 0xFE4F, 0xFA29,
10918     0, 0
10919 };
10920
10921
10922
10923 WCHAR ff_convert (  /* Converted code, 0 means conversion error */
10924     WCHAR   src,    /* Character code to be converted */
10925     UINT    dir     /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */
10926 )
10927 {
10928     const WCHAR *p;
10929     WCHAR c;
10930     int i, n, li, hi;
10931
10932
10933     if (src < 0x80) {   /* ASCII */
10934         c = src;
10935     } else {
10936         if (dir) {      /* OEMCP to unicode */
10937             p = oem2uni;
10938             hi = sizeof(oem2uni) / 4 - 1;
10939         } else {        /* Unicode to OEMCP */
10940             p = uni2oem;
10941             hi = sizeof(uni2oem) / 4 - 1;
10942         }
10943         li = 0;
10944         for (n = 16; n; n--) {
10945             i = li + (hi - li) / 2;
10946             if (src == p[i * 2]) break;
10947             if (src > p[i * 2])
10948                 li = i;
10949             else
10950                 hi = i;
10951         }
10952         c = n ? p[i * 2 + 1] : 0;
10953     }
10954
10955     return c;
10956 }
10957 #else
10958 #error This file is not needed in current configuration.
10959
10960 #endif


BeRTOS: cc949.c Source File

  • fs
  • fatfs
  • option
cc949.c
00001 /*------------------------------------------------------------------------*/
00002 /* Unicode - OEM code bidirectional converter  (C)ChaN, 2009              */
00003 /*                                                                        */
00004 /* CP949 (Korean)                                                         */
00005 /*------------------------------------------------------------------------*/
00006
00007 #include "../ff.h"
00008
00009
00010 #if _USE_LFN && _CODE_PAGE == 949
00011
00012
00013 static
00014 const WCHAR uni2oem[] = {
00015 /*  Unicode - OEM,  Unicode - OEM,  Unicode - OEM,  Unicode - OEM */
00016     0x00A1, 0xA2AE, 0x00A4, 0xA2B4, 0x00A7, 0xA1D7, 0x00A8, 0xA1A7,
00017     0x00AA, 0xA8A3, 0x00AD, 0xA1A9, 0x00AE, 0xA2E7, 0x00B0, 0xA1C6,
00018     0x00B1, 0xA1BE, 0x00B2, 0xA9F7, 0x00B3, 0xA9F8, 0x00B4, 0xA2A5,
00019     0x00B6, 0xA2D2, 0x00B7, 0xA1A4, 0x00B8, 0xA2AC, 0x00B9, 0xA9F6,
00020     0x00BA, 0xA8AC, 0x00BC, 0xA8F9, 0x00BD, 0xA8F6, 0x00BE, 0xA8FA,
00021     0x00BF, 0xA2AF, 0x00C6, 0xA8A1, 0x00D0, 0xA8A2, 0x00D7, 0xA1BF,
00022     0x00D8, 0xA8AA, 0x00DE, 0xA8AD, 0x00DF, 0xA9AC, 0x00E6, 0xA9A1,
00023     0x00F0, 0xA9A3, 0x00F7, 0xA1C0, 0x00F8, 0xA9AA, 0x00FE, 0xA9AD,
00024     0x0111, 0xA9A2, 0x0126, 0xA8A4, 0x0127, 0xA9A4, 0x0131, 0xA9A5,
00025     0x0132, 0xA8A6, 0x0133, 0xA9A6, 0x0138, 0xA9A7, 0x013F, 0xA8A8,
00026     0x0140, 0xA9A8, 0x0141, 0xA8A9, 0x0142, 0xA9A9, 0x0149, 0xA9B0,
00027     0x014A, 0xA8AF, 0x014B, 0xA9AF, 0x0152, 0xA8AB, 0x0153, 0xA9AB,
00028     0x0166, 0xA8AE, 0x0167, 0xA9AE, 0x02C7, 0xA2A7, 0x02D0, 0xA2B0,
00029     0x02D8, 0xA2A8, 0x02D9, 0xA2AB, 0x02DA, 0xA2AA, 0x02DB, 0xA2AD,
00030     0x02DD, 0xA2A9, 0x0391, 0xA5C1, 0x0392, 0xA5C2, 0x0393, 0xA5C3,
00031     0x0394, 0xA5C4, 0x0395, 0xA5C5, 0x0396, 0xA5C6, 0x0397, 0xA5C7,
00032     0x0398, 0xA5C8, 0x0399, 0xA5C9, 0x039A, 0xA5CA, 0x039B, 0xA5CB,
00033     0x039C, 0xA5CC, 0x039D, 0xA5CD, 0x039E, 0xA5CE, 0x039F, 0xA5CF,
00034     0x03A0, 0xA5D0, 0x03A1, 0xA5D1, 0x03A3, 0xA5D2, 0x03A4, 0xA5D3,
00035     0x03A5, 0xA5D4, 0x03A6, 0xA5D5, 0x03A7, 0xA5D6, 0x03A8, 0xA5D7,
00036     0x03A9, 0xA5D8, 0x03B1, 0xA5E1, 0x03B2, 0xA5E2, 0x03B3, 0xA5E3,
00037     0x03B4, 0xA5E4, 0x03B5, 0xA5E5, 0x03B6, 0xA5E6, 0x03B7, 0xA5E7,
00038     0x03B8, 0xA5E8, 0x03B9, 0xA5E9, 0x03BA, 0xA5EA, 0x03BB, 0xA5EB,
00039     0x03BC, 0xA5EC, 0x03BD, 0xA5ED, 0x03BE, 0xA5EE, 0x03BF, 0xA5EF,
00040     0x03C0, 0xA5F0, 0x03C1, 0xA5F1, 0x03C3, 0xA5F2, 0x03C4, 0xA5F3,
00041     0x03C5, 0xA5F4, 0x03C6, 0xA5F5, 0x03C7, 0xA5F6, 0x03C8, 0xA5F7,
00042     0x03C9, 0xA5F8, 0x0401, 0xACA7, 0x0410, 0xACA1, 0x0411, 0xACA2,
00043     0x0412, 0xACA3, 0x0413, 0xACA4, 0x0414, 0xACA5, 0x0415, 0xACA6,
00044     0x0416, 0xACA8, 0x0417, 0xACA9, 0x0418, 0xACAA, 0x0419, 0xACAB,
00045     0x041A, 0xACAC, 0x041B, 0xACAD, 0x041C, 0xACAE, 0x041D, 0xACAF,
00046     0x041E, 0xACB0, 0x041F, 0xACB1, 0x0420, 0xACB2, 0x0421, 0xACB3,
00047     0x0422, 0xACB4, 0x0423, 0xACB5, 0x0424, 0xACB6, 0x0425, 0xACB7,
00048     0x0426, 0xACB8, 0x0427, 0xACB9, 0x0428, 0xACBA, 0x0429, 0xACBB,
00049     0x042A, 0xACBC, 0x042B, 0xACBD, 0x042C, 0xACBE, 0x042D, 0xACBF,
00050     0x042E, 0xACC0, 0x042F, 0xACC1, 0x0430, 0xACD1, 0x0431, 0xACD2,
00051     0x0432, 0xACD3, 0x0433, 0xACD4, 0x0434, 0xACD5, 0x0435, 0xACD6,
00052     0x0436, 0xACD8, 0x0437, 0xACD9, 0x0438, 0xACDA, 0x0439, 0xACDB,
00053     0x043A, 0xACDC, 0x043B, 0xACDD, 0x043C, 0xACDE, 0x043D, 0xACDF,
00054     0x043E, 0xACE0, 0x043F, 0xACE1, 0x0440, 0xACE2, 0x0441, 0xACE3,
00055     0x0442, 0xACE4, 0x0443, 0xACE5, 0x0444, 0xACE6, 0x0445, 0xACE7,
00056     0x0446, 0xACE8, 0x0447, 0xACE9, 0x0448, 0xACEA, 0x0449, 0xACEB,
00057     0x044A, 0xACEC, 0x044B, 0xACED, 0x044C, 0xACEE, 0x044D, 0xACEF,
00058     0x044E, 0xACF0, 0x044F, 0xACF1, 0x0451, 0xACD7, 0x2015, 0xA1AA,
00059     0x2018, 0xA1AE, 0x2019, 0xA1AF, 0x201C, 0xA1B0, 0x201D, 0xA1B1,
00060     0x2020, 0xA2D3, 0x2021, 0xA2D4, 0x2025, 0xA1A5, 0x2026, 0xA1A6,
00061     0x2030, 0xA2B6, 0x2032, 0xA1C7, 0x2033, 0xA1C8, 0x203B, 0xA1D8,
00062     0x2074, 0xA9F9, 0x207F, 0xA9FA, 0x2081, 0xA9FB, 0x2082, 0xA9FC,
00063     0x2083, 0xA9FD, 0x2084, 0xA9FE, 0x20AC, 0xA2E6, 0x2103, 0xA1C9,
00064     0x2109, 0xA2B5, 0x2113, 0xA7A4, 0x2116, 0xA2E0, 0x2121, 0xA2E5,
00065     0x2122, 0xA2E2, 0x2126, 0xA7D9, 0x212B, 0xA1CA, 0x2153, 0xA8F7,
00066     0x2154, 0xA8F8, 0x215B, 0xA8FB, 0x215C, 0xA8FC, 0x215D, 0xA8FD,
00067     0x215E, 0xA8FE, 0x2160, 0xA5B0, 0x2161, 0xA5B1, 0x2162, 0xA5B2,
00068     0x2163, 0xA5B3, 0x2164, 0xA5B4, 0x2165, 0xA5B5, 0x2166, 0xA5B6,
00069     0x2167, 0xA5B7, 0x2168, 0xA5B8, 0x2169, 0xA5B9, 0x2170, 0xA5A1,
00070     0x2171, 0xA5A2, 0x2172, 0xA5A3, 0x2173, 0xA5A4, 0x2174, 0xA5A5,
00071     0x2175, 0xA5A6, 0x2176, 0xA5A7, 0x2177, 0xA5A8, 0x2178, 0xA5A9,
00072     0x2179, 0xA5AA, 0x2190, 0xA1E7, 0x2191, 0xA1E8, 0x2192, 0xA1E6,
00073     0x2193, 0xA1E9, 0x2194, 0xA1EA, 0x2195, 0xA2D5, 0x2196, 0xA2D8,
00074     0x2197, 0xA2D6, 0x2198, 0xA2D9, 0x2199, 0xA2D7, 0x21D2, 0xA2A1,
00075     0x21D4, 0xA2A2, 0x2200, 0xA2A3, 0x2202, 0xA1D3, 0x2203, 0xA2A4,
00076     0x2207, 0xA1D4, 0x2208, 0xA1F4, 0x220B, 0xA1F5, 0x220F, 0xA2B3,
00077     0x2211, 0xA2B2, 0x221A, 0xA1EE, 0x221D, 0xA1F0, 0x221E, 0xA1C4,
00078     0x2220, 0xA1D0, 0x2225, 0xA1AB, 0x2227, 0xA1FC, 0x2228, 0xA1FD,
00079     0x2229, 0xA1FB, 0x222A, 0xA1FA, 0x222B, 0xA1F2, 0x222C, 0xA1F3,
00080     0x222E, 0xA2B1, 0x2234, 0xA1C5, 0x2235, 0xA1F1, 0x223C, 0xA1AD,
00081     0x223D, 0xA1EF, 0x2252, 0xA1D6, 0x2260, 0xA1C1, 0x2261, 0xA1D5,
00082     0x2264, 0xA1C2, 0x2265, 0xA1C3, 0x226A, 0xA1EC, 0x226B, 0xA1ED,
00083     0x2282, 0xA1F8, 0x2283, 0xA1F9, 0x2286, 0xA1F6, 0x2287, 0xA1F7,
00084     0x2299, 0xA2C1, 0x22A5, 0xA1D1, 0x2312, 0xA1D2, 0x2460, 0xA8E7,
00085     0x2461, 0xA8E8, 0x2462, 0xA8E9, 0x2463, 0xA8EA, 0x2464, 0xA8EB,
00086     0x2465, 0xA8EC, 0x2466, 0xA8ED, 0x2467, 0xA8EE, 0x2468, 0xA8EF,
00087     0x2469, 0xA8F0, 0x246A, 0xA8F1, 0x246B, 0xA8F2, 0x246C, 0xA8F3,
00088     0x246D, 0xA8F4, 0x246E, 0xA8F5, 0x2474, 0xA9E7, 0x2475, 0xA9E8,
00089     0x2476, 0xA9E9, 0x2477, 0xA9EA, 0x2478, 0xA9EB, 0x2479, 0xA9EC,
00090     0x247A, 0xA9ED, 0x247B, 0xA9EE, 0x247C, 0xA9EF, 0x247D, 0xA9F0,
00091     0x247E, 0xA9F1, 0x247F, 0xA9F2, 0x2480, 0xA9F3, 0x2481, 0xA9F4,
00092     0x2482, 0xA9F5, 0x249C, 0xA9CD, 0x249D, 0xA9CE, 0x249E, 0xA9CF,
00093     0x249F, 0xA9D0, 0x24A0, 0xA9D1, 0x24A1, 0xA9D2, 0x24A2, 0xA9D3,
00094     0x24A3, 0xA9D4, 0x24A4, 0xA9D5, 0x24A5, 0xA9D6, 0x24A6, 0xA9D7,
00095     0x24A7, 0xA9D8, 0x24A8, 0xA9D9, 0x24A9, 0xA9DA, 0x24AA, 0xA9DB,
00096     0x24AB, 0xA9DC, 0x24AC, 0xA9DD, 0x24AD, 0xA9DE, 0x24AE, 0xA9DF,
00097     0x24AF, 0xA9E0, 0x24B0, 0xA9E1, 0x24B1, 0xA9E2, 0x24B2, 0xA9E3,
00098     0x24B3, 0xA9E4, 0x24B4, 0xA9E5, 0x24B5, 0xA9E6, 0x24D0, 0xA8CD,
00099     0x24D1, 0xA8CE, 0x24D2, 0xA8CF, 0x24D3, 0xA8D0, 0x24D4, 0xA8D1,
00100     0x24D5, 0xA8D2, 0x24D6, 0xA8D3, 0x24D7, 0xA8D4, 0x24D8, 0xA8D5,
00101     0x24D9, 0xA8D6, 0x24DA, 0xA8D7, 0x24DB, 0xA8D8, 0x24DC, 0xA8D9,
00102     0x24DD, 0xA8DA, 0x24DE, 0xA8DB, 0x24DF, 0xA8DC, 0x24E0, 0xA8DD,
00103     0x24E1, 0xA8DE, 0x24E2, 0xA8DF, 0x24E3, 0xA8E0, 0x24E4, 0xA8E1,
00104     0x24E5, 0xA8E2, 0x24E6, 0xA8E3, 0x24E7, 0xA8E4, 0x24E8, 0xA8E5,
00105     0x24E9, 0xA8E6, 0x2500, 0xA6A1, 0x2501, 0xA6AC, 0x2502, 0xA6A2,
00106     0x2503, 0xA6AD, 0x250C, 0xA6A3, 0x250D, 0xA6C8, 0x250E, 0xA6C7,
00107     0x250F, 0xA6AE, 0x2510, 0xA6A4, 0x2511, 0xA6C2, 0x2512, 0xA6C1,
00108     0x2513, 0xA6AF, 0x2514, 0xA6A6, 0x2515, 0xA6C6, 0x2516, 0xA6C5,
00109     0x2517, 0xA6B1, 0x2518, 0xA6A5, 0x2519, 0xA6C4, 0x251A, 0xA6C3,
00110     0x251B, 0xA6B0, 0x251C, 0xA6A7, 0x251D, 0xA6BC, 0x251E, 0xA6C9,
00111     0x251F, 0xA6CA, 0x2520, 0xA6B7, 0x2521, 0xA6CB, 0x2522, 0xA6CC,
00112     0x2523, 0xA6B2, 0x2524, 0xA6A9, 0x2525, 0xA6BE, 0x2526, 0xA6CD,
00113     0x2527, 0xA6CE, 0x2528, 0xA6B9, 0x2529, 0xA6CF, 0x252A, 0xA6D0,
00114     0x252B, 0xA6B4, 0x252C, 0xA6A8, 0x252D, 0xA6D1, 0x252E, 0xA6D2,
00115     0x252F, 0xA6B8, 0x2530, 0xA6BD, 0x2531, 0xA6D3, 0x2532, 0xA6D4,
00116     0x2533, 0xA6B3, 0x2534, 0xA6AA, 0x2535, 0xA6D5, 0x2536, 0xA6D6,
00117     0x2537, 0xA6BA, 0x2538, 0xA6BF, 0x2539, 0xA6D7, 0x253A, 0xA6D8,
00118     0x253B, 0xA6B5, 0x253C, 0xA6AB, 0x253D, 0xA6D9, 0x253E, 0xA6DA,
00119     0x253F, 0xA6BB, 0x2540, 0xA6DB, 0x2541, 0xA6DC, 0x2542, 0xA6C0,
00120     0x2543, 0xA6DD, 0x2544, 0xA6DE, 0x2545, 0xA6DF, 0x2546, 0xA6E0,
00121     0x2547, 0xA6E1, 0x2548, 0xA6E2, 0x2549, 0xA6E3, 0x254A, 0xA6E4,
00122     0x254B, 0xA6B6, 0x2592, 0xA2C6, 0x25A0, 0xA1E1, 0x25A1, 0xA1E0,
00123     0x25A3, 0xA2C3, 0x25A4, 0xA2C7, 0x25A5, 0xA2C8, 0x25A6, 0xA2CB,
00124     0x25A7, 0xA2CA, 0x25A8, 0xA2C9, 0x25A9, 0xA2CC, 0x25B2, 0xA1E3,
00125     0x25B3, 0xA1E2, 0x25B6, 0xA2BA, 0x25B7, 0xA2B9, 0x25BC, 0xA1E5,
00126     0x25BD, 0xA1E4, 0x25C0, 0xA2B8, 0x25C1, 0xA2B7, 0x25C6, 0xA1DF,
00127     0x25C7, 0xA1DE, 0x25C8, 0xA2C2, 0x25CB, 0xA1DB, 0x25CE, 0xA1DD,
00128     0x25CF, 0xA1DC, 0x25D0, 0xA2C4, 0x25D1, 0xA2C5, 0x2605, 0xA1DA,
00129     0x2606, 0xA1D9, 0x260E, 0xA2CF, 0x260F, 0xA2CE, 0x261C, 0xA2D0,
00130     0x261E, 0xA2D1, 0x2640, 0xA1CF, 0x2642, 0xA1CE, 0x2660, 0xA2BC,
00131     0x2661, 0xA2BD, 0x2663, 0xA2C0, 0x2664, 0xA2BB, 0x2665, 0xA2BE,
00132     0x2667, 0xA2BF, 0x2668, 0xA2CD, 0x2669, 0xA2DB, 0x266A, 0xA2DC,
00133     0x266C, 0xA2DD, 0x266D, 0xA2DA, 0x3000, 0xA1A1, 0x3001, 0xA1A2,
00134     0x3002, 0xA1A3, 0x3003, 0xA1A8, 0x3008, 0xA1B4, 0x3009, 0xA1B5,
00135     0x300A, 0xA1B6, 0x300B, 0xA1B7, 0x300C, 0xA1B8, 0x300D, 0xA1B9,
00136     0x300E, 0xA1BA, 0x300F, 0xA1BB, 0x3010, 0xA1BC, 0x3011, 0xA1BD,
00137     0x3013, 0xA1EB, 0x3014, 0xA1B2, 0x3015, 0xA1B3, 0x3041, 0xAAA1,
00138     0x3042, 0xAAA2, 0x3043, 0xAAA3, 0x3044, 0xAAA4, 0x3045, 0xAAA5,
00139     0x3046, 0xAAA6, 0x3047, 0xAAA7, 0x3048, 0xAAA8, 0x3049, 0xAAA9,
00140     0x304A, 0xAAAA, 0x304B, 0xAAAB, 0x304C, 0xAAAC, 0x304D, 0xAAAD,
00141     0x304E, 0xAAAE, 0x304F, 0xAAAF, 0x3050, 0xAAB0, 0x3051, 0xAAB1,
00142     0x3052, 0xAAB2, 0x3053, 0xAAB3, 0x3054, 0xAAB4, 0x3055, 0xAAB5,
00143     0x3056, 0xAAB6, 0x3057, 0xAAB7, 0x3058, 0xAAB8, 0x3059, 0xAAB9,
00144     0x305A, 0xAABA, 0x305B, 0xAABB, 0x305C, 0xAABC, 0x305D, 0xAABD,
00145     0x305E, 0xAABE, 0x305F, 0xAABF, 0x3060, 0xAAC0, 0x3061, 0xAAC1,
00146     0x3062, 0xAAC2, 0x3063, 0xAAC3, 0x3064, 0xAAC4, 0x3065, 0xAAC5,
00147     0x3066, 0xAAC6, 0x3067, 0xAAC7, 0x3068, 0xAAC8, 0x3069, 0xAAC9,
00148     0x306A, 0xAACA, 0x306B, 0xAACB, 0x306C, 0xAACC, 0x306D, 0xAACD,
00149     0x306E, 0xAACE, 0x306F, 0xAACF, 0x3070, 0xAAD0, 0x3071, 0xAAD1,
00150     0x3072, 0xAAD2, 0x3073, 0xAAD3, 0x3074, 0xAAD4, 0x3075, 0xAAD5,
00151     0x3076, 0xAAD6, 0x3077, 0xAAD7, 0x3078, 0xAAD8, 0x3079, 0xAAD9,
00152     0x307A, 0xAADA, 0x307B, 0xAADB, 0x307C, 0xAADC, 0x307D, 0xAADD,
00153     0x307E, 0xAADE, 0x307F, 0xAADF, 0x3080, 0xAAE0, 0x3081, 0xAAE1,
00154     0x3082, 0xAAE2, 0x3083, 0xAAE3, 0x3084, 0xAAE4, 0x3085, 0xAAE5,
00155     0x3086, 0xAAE6, 0x3087, 0xAAE7, 0x3088, 0xAAE8, 0x3089, 0xAAE9,
00156     0x308A, 0xAAEA, 0x308B, 0xAAEB, 0x308C, 0xAAEC, 0x308D, 0xAAED,
00157     0x308E, 0xAAEE, 0x308F, 0xAAEF, 0x3090, 0xAAF0, 0x3091, 0xAAF1,
00158     0x3092, 0xAAF2, 0x3093, 0xAAF3, 0x30A1, 0xABA1, 0x30A2, 0xABA2,
00159     0x30A3, 0xABA3, 0x30A4, 0xABA4, 0x30A5, 0xABA5, 0x30A6, 0xABA6,
00160     0x30A7, 0xABA7, 0x30A8, 0xABA8, 0x30A9, 0xABA9, 0x30AA, 0xABAA,
00161     0x30AB, 0xABAB, 0x30AC, 0xABAC, 0x30AD, 0xABAD, 0x30AE, 0xABAE,
00162     0x30AF, 0xABAF, 0x30B0, 0xABB0, 0x30B1, 0xABB1, 0x30B2, 0xABB2,
00163     0x30B3, 0xABB3, 0x30B4, 0xABB4, 0x30B5, 0xABB5, 0x30B6, 0xABB6,
00164     0x30B7, 0xABB7, 0x30B8, 0xABB8, 0x30B9, 0xABB9, 0x30BA, 0xABBA,
00165     0x30BB, 0xABBB, 0x30BC, 0xABBC, 0x30BD, 0xABBD, 0x30BE, 0xABBE,
00166     0x30BF, 0xABBF, 0x30C0, 0xABC0, 0x30C1, 0xABC1, 0x30C2, 0xABC2,
00167     0x30C3, 0xABC3, 0x30C4, 0xABC4, 0x30C5, 0xABC5, 0x30C6, 0xABC6,
00168     0x30C7, 0xABC7, 0x30C8, 0xABC8, 0x30C9, 0xABC9, 0x30CA, 0xABCA,
00169     0x30CB, 0xABCB, 0x30CC, 0xABCC, 0x30CD, 0xABCD, 0x30CE, 0xABCE,
00170     0x30CF, 0xABCF, 0x30D0, 0xABD0, 0x30D1, 0xABD1, 0x30D2, 0xABD2,
00171     0x30D3, 0xABD3, 0x30D4, 0xABD4, 0x30D5, 0xABD5, 0x30D6, 0xABD6,
00172     0x30D7, 0xABD7, 0x30D8, 0xABD8, 0x30D9, 0xABD9, 0x30DA, 0xABDA,
00173     0x30DB, 0xABDB, 0x30DC, 0xABDC, 0x30DD, 0xABDD, 0x30DE, 0xABDE,
00174     0x30DF, 0xABDF, 0x30E0, 0xABE0, 0x30E1, 0xABE1, 0x30E2, 0xABE2,
00175     0x30E3, 0xABE3, 0x30E4, 0xABE4, 0x30E5, 0xABE5, 0x30E6, 0xABE6,
00176     0x30E7, 0xABE7, 0x30E8, 0xABE8, 0x30E9, 0xABE9, 0x30EA, 0xABEA,
00177     0x30EB, 0xABEB, 0x30EC, 0xABEC, 0x30ED, 0xABED, 0x30EE, 0xABEE,
00178     0x30EF, 0xABEF, 0x30F0, 0xABF0, 0x30F1, 0xABF1, 0x30F2, 0xABF2,
00179     0x30F3, 0xABF3, 0x30F4, 0xABF4, 0x30F5, 0xABF5, 0x30F6, 0xABF6,
00180     0x3131, 0xA4A1, 0x3132, 0xA4A2, 0x3133, 0xA4A3, 0x3134, 0xA4A4,
00181     0x3135, 0xA4A5, 0x3136, 0xA4A6, 0x3137, 0xA4A7, 0x3138, 0xA4A8,
00182     0x3139, 0xA4A9, 0x313A, 0xA4AA, 0x313B, 0xA4AB, 0x313C, 0xA4AC,
00183     0x313D, 0xA4AD, 0x313E, 0xA4AE, 0x313F, 0xA4AF, 0x3140, 0xA4B0,
00184     0x3141, 0xA4B1, 0x3142, 0xA4B2, 0x3143, 0xA4B3, 0x3144, 0xA4B4,
00185     0x3145, 0xA4B5, 0x3146, 0xA4B6, 0x3147, 0xA4B7, 0x3148, 0xA4B8,
00186     0x3149, 0xA4B9, 0x314A, 0xA4BA, 0x314B, 0xA4BB, 0x314C, 0xA4BC,
00187     0x314D, 0xA4BD, 0x314E, 0xA4BE, 0x314F, 0xA4BF, 0x3150, 0xA4C0,
00188     0x3151, 0xA4C1, 0x3152, 0xA4C2, 0x3153, 0xA4C3, 0x3154, 0xA4C4,
00189     0x3155, 0xA4C5, 0x3156, 0xA4C6, 0x3157, 0xA4C7, 0x3158, 0xA4C8,
00190     0x3159, 0xA4C9, 0x315A, 0xA4CA, 0x315B, 0xA4CB, 0x315C, 0xA4CC,
00191     0x315D, 0xA4CD, 0x315E, 0xA4CE, 0x315F, 0xA4CF, 0x3160, 0xA4D0,
00192     0x3161, 0xA4D1, 0x3162, 0xA4D2, 0x3163, 0xA4D3, 0x3164, 0xA4D4,
00193     0x3165, 0xA4D5, 0x3166, 0xA4D6, 0x3167, 0xA4D7, 0x3168, 0xA4D8,
00194     0x3169, 0xA4D9, 0x316A, 0xA4DA, 0x316B, 0xA4DB, 0x316C, 0xA4DC,
00195     0x316D, 0xA4DD, 0x316E, 0xA4DE, 0x316F, 0xA4DF, 0x3170, 0xA4E0,
00196     0x3171, 0xA4E1, 0x3172, 0xA4E2, 0x3173, 0xA4E3, 0x3174, 0xA4E4,
00197     0x3175, 0xA4E5, 0x3176, 0xA4E6, 0x3177, 0xA4E7, 0x3178, 0xA4E8,
00198     0x3179, 0xA4E9, 0x317A, 0xA4EA, 0x317B, 0xA4EB, 0x317C, 0xA4EC,
00199     0x317D, 0xA4ED, 0x317E, 0xA4EE, 0x317F, 0xA4EF, 0x3180, 0xA4F0,
00200     0x3181, 0xA4F1, 0x3182, 0xA4F2, 0x3183, 0xA4F3, 0x3184, 0xA4F4,
00201     0x3185, 0xA4F5, 0x3186, 0xA4F6, 0x3187, 0xA4F7, 0x3188, 0xA4F8,
00202     0x3189, 0xA4F9, 0x318A, 0xA4FA, 0x318B, 0xA4FB, 0x318C, 0xA4FC,
00203     0x318D, 0xA4FD, 0x318E, 0xA4FE, 0x3200, 0xA9B1, 0x3201, 0xA9B2,
00204     0x3202, 0xA9B3, 0x3203, 0xA9B4, 0x3204, 0xA9B5, 0x3205, 0xA9B6,
00205     0x3206, 0xA9B7, 0x3207, 0xA9B8, 0x3208, 0xA9B9, 0x3209, 0xA9BA,
00206     0x320A, 0xA9BB, 0x320B, 0xA9BC, 0x320C, 0xA9BD, 0x320D, 0xA9BE,
00207     0x320E, 0xA9BF, 0x320F, 0xA9C0, 0x3210, 0xA9C1, 0x3211, 0xA9C2,
00208     0x3212, 0xA9C3, 0x3213, 0xA9C4, 0x3214, 0xA9C5, 0x3215, 0xA9C6,
00209     0x3216, 0xA9C7, 0x3217, 0xA9C8, 0x3218, 0xA9C9, 0x3219, 0xA9CA,
00210     0x321A, 0xA9CB, 0x321B, 0xA9CC, 0x321C, 0xA2DF, 0x3260, 0xA8B1,
00211     0x3261, 0xA8B2, 0x3262, 0xA8B3, 0x3263, 0xA8B4, 0x3264, 0xA8B5,
00212     0x3265, 0xA8B6, 0x3266, 0xA8B7, 0x3267, 0xA8B8, 0x3268, 0xA8B9,
00213     0x3269, 0xA8BA, 0x326A, 0xA8BB, 0x326B, 0xA8BC, 0x326C, 0xA8BD,
00214     0x326D, 0xA8BE, 0x326E, 0xA8BF, 0x326F, 0xA8C0, 0x3270, 0xA8C1,
00215     0x3271, 0xA8C2, 0x3272, 0xA8C3, 0x3273, 0xA8C4, 0x3274, 0xA8C5,
00216     0x3275, 0xA8C6, 0x3276, 0xA8C7, 0x3277, 0xA8C8, 0x3278, 0xA8C9,
00217     0x3279, 0xA8CA, 0x327A, 0xA8CB, 0x327B, 0xA8CC, 0x327F, 0xA2DE,
00218     0x3380, 0xA7C9, 0x3381, 0xA7CA, 0x3382, 0xA7CB, 0x3383, 0xA7CC,
00219     0x3384, 0xA7CD, 0x3388, 0xA7BA, 0x3389, 0xA7BB, 0x338A, 0xA7DC,
00220     0x338B, 0xA7DD, 0x338C, 0xA7DE, 0x338D, 0xA7B6, 0x338E, 0xA7B7,
00221     0x338F, 0xA7B8, 0x3390, 0xA7D4, 0x3391, 0xA7D5, 0x3392, 0xA7D6,
00222     0x3393, 0xA7D7, 0x3394, 0xA7D8, 0x3395, 0xA7A1, 0x3396, 0xA7A2,
00223     0x3397, 0xA7A3, 0x3398, 0xA7A5, 0x3399, 0xA7AB, 0x339A, 0xA7AC,
00224     0x339B, 0xA7AD, 0x339C, 0xA7AE, 0x339D, 0xA7AF, 0x339E, 0xA7B0,
00225     0x339F, 0xA7B1, 0x33A0, 0xA7B2, 0x33A1, 0xA7B3, 0x33A2, 0xA7B4,
00226     0x33A3, 0xA7A7, 0x33A4, 0xA7A8, 0x33A5, 0xA7A9, 0x33A6, 0xA7AA,
00227     0x33A7, 0xA7BD, 0x33A8, 0xA7BE, 0x33A9, 0xA7E5, 0x33AA, 0xA7E6,
00228     0x33AB, 0xA7E7, 0x33AC, 0xA7E8, 0x33AD, 0xA7E1, 0x33AE, 0xA7E2,
00229     0x33AF, 0xA7E3, 0x33B0, 0xA7BF, 0x33B1, 0xA7C0, 0x33B2, 0xA7C1,
00230     0x33B3, 0xA7C2, 0x33B4, 0xA7C3, 0x33B5, 0xA7C4, 0x33B6, 0xA7C5,
00231     0x33B7, 0xA7C6, 0x33B8, 0xA7C7, 0x33B9, 0xA7C8, 0x33BA, 0xA7CE,
00232     0x33BB, 0xA7CF, 0x33BC, 0xA7D0, 0x33BD, 0xA7D1, 0x33BE, 0xA7D2,
00233     0x33BF, 0xA7D3, 0x33C0, 0xA7DA, 0x33C1, 0xA7DB, 0x33C2, 0xA2E3,
00234     0x33C3, 0xA7EC, 0x33C4, 0xA7A6, 0x33C5, 0xA7E0, 0x33C6, 0xA7EF,
00235     0x33C7, 0xA2E1, 0x33C8, 0xA7BC, 0x33C9, 0xA7ED, 0x33CA, 0xA7B5,
00236     0x33CF, 0xA7B9, 0x33D0, 0xA7EA, 0x33D3, 0xA7EB, 0x33D6, 0xA7DF,
00237     0x33D8, 0xA2E4, 0x33DB, 0xA7E4, 0x33DC, 0xA7EE, 0x33DD, 0xA7E9,
00238     0x4E00, 0xECE9, 0x4E01, 0xEFCB, 0x4E03, 0xF6D2, 0x4E07, 0xD8B2,
00239     0x4E08, 0xEDDB, 0x4E09, 0xDFB2, 0x4E0A, 0xDFBE, 0x4E0B, 0xF9BB,
00240     0x4E0D, 0xDCF4, 0x4E11, 0xF5E4, 0x4E14, 0xF3A6, 0x4E15, 0xDDE0,
00241     0x4E16, 0xE1A6, 0x4E18, 0xCEF8, 0x4E19, 0xDCB0, 0x4E1E, 0xE3AA,
00242     0x4E2D, 0xF1E9, 0x4E32, 0xCDFA, 0x4E38, 0xFCAF, 0x4E39, 0xD3A1,
00243     0x4E3B, 0xF1AB, 0x4E42, 0xE7D1, 0x4E43, 0xD2AC, 0x4E45, 0xCEF9,
00244     0x4E4B, 0xF1FD, 0x4E4D, 0xDEBF, 0x4E4E, 0xFBBA, 0x4E4F, 0xF9B9,
00245     0x4E56, 0xCED2, 0x4E58, 0xE3AB, 0x4E59, 0xEBE0, 0x4E5D, 0xCEFA,
00246     0x4E5E, 0xCBF7, 0x4E5F, 0xE5A5, 0x4E6B, 0xCAE1, 0x4E6D, 0xD4CC,
00247     0x4E73, 0xEAE1, 0x4E76, 0xDCE3, 0x4E77, 0xDFAD, 0x4E7E, 0xCBEB,
00248     0x4E82, 0xD5AF, 0x4E86, 0xD6F5, 0x4E88, 0xE5F8, 0x4E8B, 0xDEC0,
00249     0x4E8C, 0xECA3, 0x4E8E, 0xE9CD, 0x4E90, 0xEAA7, 0x4E91, 0xE9F6,
00250     0x4E92, 0xFBBB, 0x4E94, 0xE7E9, 0x4E95, 0xEFCC, 0x4E98, 0xD0E6,
00251     0x4E9B, 0xDEC1, 0x4E9E, 0xE4AC, 0x4EA1, 0xD8CC, 0x4EA2, 0xF9F1,
00252     0x4EA4, 0xCEDF, 0x4EA5, 0xFAA4, 0x4EA6, 0xE6B2, 0x4EA8, 0xFAFB,
00253     0x4EAB, 0xFABD, 0x4EAC, 0xCCC8, 0x4EAD, 0xEFCD, 0x4EAE, 0xD5D5,
00254     0x4EB6, 0xD3A2, 0x4EBA, 0xECD1, 0x4EC0, 0xE4A7, 0x4EC1, 0xECD2,
00255     0x4EC4, 0xF6B1, 0x4EC7, 0xCEFB, 0x4ECA, 0xD0D1, 0x4ECB, 0xCBBF,
00256     0x4ECD, 0xEDA4, 0x4ED4, 0xEDA8, 0x4ED5, 0xDEC2, 0x4ED6, 0xF6E2,
00257     0x4ED7, 0xEDDC, 0x4ED8, 0xDCF5, 0x4ED9, 0xE0B9, 0x4EDD, 0xD4CE,
00258     0x4EDF, 0xF4B5, 0x4EE3, 0xD3DB, 0x4EE4, 0xD6B5, 0x4EE5, 0xECA4,
00259     0x4EF0, 0xE4E6, 0x4EF2, 0xF1EA, 0x4EF6, 0xCBEC, 0x4EF7, 0xCBC0,
00260     0x4EFB, 0xECF2, 0x4F01, 0xD0EA, 0x4F09, 0xF9F2, 0x4F0A, 0xECA5,
00261     0x4F0B, 0xD0DF, 0x4F0D, 0xE7EA, 0x4F0E, 0xD0EB, 0x4F0F, 0xDCD1,
00262     0x4F10, 0xDBE9, 0x4F11, 0xFDCC, 0x4F2F, 0xDBD7, 0x4F34, 0xDAE1,
00263     0x4F36, 0xD6B6, 0x4F38, 0xE3DF, 0x4F3A, 0xDEC3, 0x4F3C, 0xDEC4,
00264     0x4F3D, 0xCAA1, 0x4F43, 0xEEEC, 0x4F46, 0xD3A3, 0x4F47, 0xEEB7,
00265     0x4F48, 0xF8CF, 0x4F4D, 0xEAC8, 0x4F4E, 0xEEB8, 0x4F4F, 0xF1AC,
00266     0x4F50, 0xF1A5, 0x4F51, 0xE9CE, 0x4F55, 0xF9BC, 0x4F59, 0xE5F9,
00267     0x4F5A, 0xECEA, 0x4F5B, 0xDDD6, 0x4F5C, 0xEDC2, 0x4F69, 0xF8A5,
00268     0x4F6F, 0xE5BA, 0x4F70, 0xDBD8, 0x4F73, 0xCAA2, 0x4F76, 0xD1CD,
00269     0x4F7A, 0xEEED, 0x4F7E, 0xECEB, 0x4F7F, 0xDEC5, 0x4F81, 0xE3E0,
00270     0x4F83, 0xCAC9, 0x4F84, 0xF2E9, 0x4F86, 0xD5CE, 0x4F88, 0xF6B6,
00271     0x4F8A, 0xCEC2, 0x4F8B, 0xD6C7, 0x4F8D, 0xE3B4, 0x4F8F, 0xF1AD,
00272     0x4F91, 0xEAE2, 0x4F96, 0xD7C2, 0x4F98, 0xF3A7, 0x4F9B, 0xCDEA,
00273     0x4F9D, 0xEBEE, 0x4FAE, 0xD9B2, 0x4FAF, 0xFDA5, 0x4FB5, 0xF6D5,
00274     0x4FB6, 0xD5E2, 0x4FBF, 0xF8B5, 0x4FC2, 0xCCF5, 0x4FC3, 0xF5B5,
00275     0x4FC4, 0xE4AD, 0x4FC9, 0xE7EB, 0x4FCA, 0xF1D5, 0x4FCE, 0xF0BB,
00276     0x4FD1, 0xE9B5, 0x4FD3, 0xCCC9, 0x4FD4, 0xFAD5, 0x4FD7, 0xE1D4,
00277     0x4FDA, 0xD7D6, 0x4FDD, 0xDCC1, 0x4FDF, 0xDEC6, 0x4FE0, 0xFAEF,
00278     0x4FE1, 0xE3E1, 0x4FEE, 0xE1F3, 0x4FEF, 0xDCF6, 0x4FF1, 0xCEFC,
00279     0x4FF3, 0xDBC4, 0x4FF5, 0xF8F1, 0x4FF8, 0xDCE4, 0x4FFA, 0xE5EF,
00280     0x5002, 0xDCB1, 0x5006, 0xD5D6, 0x5009, 0xF3DA, 0x500B, 0xCBC1,
00281     0x500D, 0xDBC3, 0x5011, 0xD9FA, 0x5012, 0xD3EE, 0x5016, 0xFAB8,
00282     0x5019, 0xFDA6, 0x501A, 0xEBEF, 0x501C, 0xF4A6, 0x501E, 0xCCCA,
00283     0x501F, 0xF3A8, 0x5021, 0xF3DB, 0x5023, 0xDBA7, 0x5024, 0xF6B7,
00284     0x5026, 0xCFE6, 0x5027, 0xF0F2, 0x5028, 0xCBDA, 0x502A, 0xE7D2,
00285     0x502B, 0xD7C3, 0x502C, 0xF6F0, 0x502D, 0xE8DE, 0x503B, 0xE5A6,
00286     0x5043, 0xE5E7, 0x5047, 0xCAA3, 0x5048, 0xCCA7, 0x5049, 0xEAC9,
00287     0x504F, 0xF8B6, 0x5055, 0xFAA5, 0x505A, 0xF1AE, 0x505C, 0xEFCE,
00288     0x5065, 0xCBED, 0x5074, 0xF6B0, 0x5075, 0xEFCF, 0x5076, 0xE9CF,
00289     0x5078, 0xF7DE, 0x5080, 0xCED3, 0x5085, 0xDCF7, 0x508D, 0xDBA8,
00290     0x5091, 0xCBF8, 0x5098, 0xDFA1, 0x5099, 0xDDE1, 0x50AC, 0xF5CA,
00291     0x50AD, 0xE9B6, 0x50B2, 0xE7EC, 0x50B3, 0xEEEE, 0x50B5, 0xF3F0,
00292     0x50B7, 0xDFBF, 0x50BE, 0xCCCB, 0x50C5, 0xD0C1, 0x50C9, 0xF4D2,
00293     0x50CA, 0xE0BA, 0x50CF, 0xDFC0, 0x50D1, 0xCEE0, 0x50D5, 0xDCD2,
00294     0x50D6, 0xFDEA, 0x50DA, 0xD6F6, 0x50DE, 0xEACA, 0x50E5, 0xE8E9,
00295     0x50E7, 0xE3AC, 0x50ED, 0xF3D0, 0x50F9, 0xCAA4, 0x50FB, 0xDBF8,
00296     0x50FF, 0xDEC7, 0x5100, 0xEBF0, 0x5101, 0xF1D6, 0x5104, 0xE5E2,
00297     0x5106, 0xCCCC, 0x5109, 0xCBFB, 0x5112, 0xEAE3, 0x511F, 0xDFC1,
00298     0x5121, 0xD6ED, 0x512A, 0xE9D0, 0x5132, 0xEEB9, 0x5137, 0xD5E3,
00299     0x513A, 0xD1D3, 0x513C, 0xE5F0, 0x5140, 0xE8B4, 0x5141, 0xEBC3,
00300     0x5143, 0xEAAA, 0x5144, 0xFAFC, 0x5145, 0xF5F6, 0x5146, 0xF0BC,
00301     0x5147, 0xFDD4, 0x5148, 0xE0BB, 0x5149, 0xCEC3, 0x514B, 0xD0BA,
00302     0x514C, 0xF7BA, 0x514D, 0xD8F3, 0x514E, 0xF7CD, 0x5152, 0xE4AE,
00303     0x515C, 0xD4DF, 0x5162, 0xD0E7, 0x5165, 0xECFD, 0x5167, 0xD2AE,
00304     0x5168, 0xEEEF, 0x5169, 0xD5D7, 0x516A, 0xEAE4, 0x516B, 0xF8A2,
00305     0x516C, 0xCDEB, 0x516D, 0xD7BF, 0x516E, 0xFBB1, 0x5171, 0xCDEC,
00306     0x5175, 0xDCB2, 0x5176, 0xD0EC, 0x5177, 0xCEFD, 0x5178, 0xEEF0,
00307     0x517C, 0xCCC2, 0x5180, 0xD0ED, 0x5186, 0xE5F7, 0x518A, 0xF3FC,
00308     0x518D, 0xEEA2, 0x5192, 0xD9B3, 0x5195, 0xD8F4, 0x5197, 0xE9B7,
00309     0x51A0, 0xCEAE, 0x51A5, 0xD9A2, 0x51AA, 0xD8F1, 0x51AC, 0xD4CF,
00310     0x51B6, 0xE5A7, 0x51B7, 0xD5D2, 0x51BD, 0xD6A9, 0x51C4, 0xF4A2,
00311     0x51C6, 0xF1D7, 0x51C9, 0xD5D8, 0x51CB, 0xF0BD, 0x51CC, 0xD7D0,
00312     0x51CD, 0xD4D0, 0x51DC, 0xD7CF, 0x51DD, 0xEBEA, 0x51DE, 0xFDEB,
00313     0x51E1, 0xDBED, 0x51F0, 0xFCC5, 0x51F1, 0xCBC2, 0x51F6, 0xFDD5,
00314     0x51F8, 0xF4C8, 0x51F9, 0xE8EA, 0x51FA, 0xF5F3, 0x51FD, 0xF9DE,
00315     0x5200, 0xD3EF, 0x5203, 0xECD3, 0x5206, 0xDDC2, 0x5207, 0xEFB7,
00316     0x5208, 0xE7D4, 0x520A, 0xCACA, 0x520E, 0xD9FB, 0x5211, 0xFAFD,
00317     0x5217, 0xD6AA, 0x521D, 0xF4F8, 0x5224, 0xF7F7, 0x5225, 0xDCAC,
00318     0x5229, 0xD7D7, 0x522A, 0xDFA2, 0x522E, 0xCEBE, 0x5230, 0xD3F0,
00319     0x5236, 0xF0A4, 0x5237, 0xE1EC, 0x5238, 0xCFE7, 0x5239, 0xF3CB,
00320     0x523A, 0xEDA9, 0x523B, 0xCABE, 0x5243, 0xF4EF, 0x5247, 0xF6CE,
00321     0x524A, 0xDEFB, 0x524B, 0xD0BB, 0x524C, 0xD5B7, 0x524D, 0xEEF1,
00322     0x5254, 0xF4A8, 0x5256, 0xDCF8, 0x525B, 0xCBA7, 0x525D, 0xDACE,
00323     0x5261, 0xE0E6, 0x5269, 0xEDA5, 0x526A, 0xEEF2, 0x526F, 0xDCF9,
00324     0x5272, 0xF9DC, 0x5275, 0xF3DC, 0x527D, 0xF8F2, 0x527F, 0xF4F9,
00325     0x5283, 0xFCF1, 0x5287, 0xD0BC, 0x5288, 0xDBF9, 0x5289, 0xD7B1,
00326     0x528D, 0xCBFC, 0x5291, 0xF0A5, 0x5292, 0xCBFD, 0x529B, 0xD5F4,
00327     0x529F, 0xCDED, 0x52A0, 0xCAA5, 0x52A3, 0xD6AB, 0x52A4, 0xD0C2,
00328     0x52A9, 0xF0BE, 0x52AA, 0xD2BD, 0x52AB, 0xCCA4, 0x52BE, 0xFAB6,
00329     0x52C1, 0xCCCD, 0x52C3, 0xDAFA, 0x52C5, 0xF6CF, 0x52C7, 0xE9B8,
00330     0x52C9, 0xD8F5, 0x52CD, 0xCCCE, 0x52D2, 0xD7CD, 0x52D5, 0xD4D1,
00331     0x52D6, 0xE9ED, 0x52D8, 0xCAEB, 0x52D9, 0xD9E2, 0x52DB, 0xFDB2,
00332     0x52DD, 0xE3AD, 0x52DE, 0xD6CC, 0x52DF, 0xD9B4, 0x52E2, 0xE1A7,
00333     0x52E3, 0xEED3, 0x52E4, 0xD0C3, 0x52F3, 0xFDB3, 0x52F5, 0xD5E4,
00334     0x52F8, 0xCFE8, 0x52FA, 0xEDC3, 0x52FB, 0xD0B2, 0x52FE, 0xCEFE,
00335     0x52FF, 0xDAA8, 0x5305, 0xF8D0, 0x5308, 0xFDD6, 0x530D, 0xF8D1,
00336     0x530F, 0xF8D2, 0x5310, 0xDCD3, 0x5315, 0xDDE2, 0x5316, 0xFBF9,
00337     0x5317, 0xDDC1, 0x5319, 0xE3B5, 0x5320, 0xEDDD, 0x5321, 0xCEC4,
00338     0x5323, 0xCBA1, 0x532A, 0xDDE3, 0x532F, 0xFCDD, 0x5339, 0xF9AF,
00339     0x533F, 0xD2FB, 0x5340, 0xCFA1, 0x5341, 0xE4A8, 0x5343, 0xF4B6,
00340     0x5344, 0xECFE, 0x5347, 0xE3AE, 0x5348, 0xE7ED, 0x5349, 0xFDC1,
00341     0x534A, 0xDAE2, 0x534D, 0xD8B3, 0x5351, 0xDDE4, 0x5352, 0xF0EF,
00342     0x5353, 0xF6F1, 0x5354, 0xFAF0, 0x5357, 0xD1F5, 0x535A, 0xDACF,
00343     0x535C, 0xDCD4, 0x535E, 0xDCA6, 0x5360, 0xEFBF, 0x5366, 0xCECF,
00344     0x5368, 0xE0D9, 0x536F, 0xD9D6, 0x5370, 0xECD4, 0x5371, 0xEACB,
00345     0x5374, 0xCABF, 0x5375, 0xD5B0, 0x5377, 0xCFE9, 0x537D, 0xF1ED,
00346     0x537F, 0xCCCF, 0x5384, 0xE4F8, 0x5393, 0xE4ED, 0x5398, 0xD7D8,
00347     0x539A, 0xFDA7, 0x539F, 0xEAAB, 0x53A0, 0xF6B2, 0x53A5, 0xCFF0,
00348     0x53A6, 0xF9BD, 0x53AD, 0xE6F4, 0x53BB, 0xCBDB, 0x53C3, 0xF3D1,
00349     0x53C8, 0xE9D1, 0x53C9, 0xF3A9, 0x53CA, 0xD0E0, 0x53CB, 0xE9D2,
00350     0x53CD, 0xDAE3, 0x53D4, 0xE2D2, 0x53D6, 0xF6A2, 0x53D7, 0xE1F4,
00351     0x53DB, 0xDAE4, 0x53E1, 0xE7D5, 0x53E2, 0xF5BF, 0x53E3, 0xCFA2,
00352     0x53E4, 0xCDAF, 0x53E5, 0xCFA3, 0x53E9, 0xCDB0, 0x53EA, 0xF1FE,
00353     0x53EB, 0xD0A3, 0x53EC, 0xE1AF, 0x53ED, 0xF8A3, 0x53EF, 0xCAA6,
00354     0x53F0, 0xF7BB, 0x53F1, 0xF2EA, 0x53F2, 0xDEC8, 0x53F3, 0xE9D3,
00355     0x53F8, 0xDEC9, 0x5403, 0xFDDE, 0x5404, 0xCAC0, 0x5408, 0xF9EA,
00356     0x5409, 0xD1CE, 0x540A, 0xEED4, 0x540C, 0xD4D2, 0x540D, 0xD9A3,
00357     0x540E, 0xFDA8, 0x540F, 0xD7D9, 0x5410, 0xF7CE, 0x5411, 0xFABE,
00358     0x541B, 0xCFD6, 0x541D, 0xD7F0, 0x541F, 0xEBE1, 0x5420, 0xF8C5,
00359     0x5426, 0xDCFA, 0x5429, 0xDDC3, 0x542B, 0xF9DF, 0x5433, 0xE7EF,
00360     0x5438, 0xFDE5, 0x5439, 0xF6A3, 0x543B, 0xD9FC, 0x543C, 0xFDA9,
00361     0x543E, 0xE7EE, 0x5442, 0xD5E5, 0x5448, 0xEFD0, 0x544A, 0xCDB1,
00362     0x5451, 0xF7A2, 0x5468, 0xF1B2, 0x546A, 0xF1B1, 0x5471, 0xCDB2,
00363     0x5473, 0xDAAB, 0x5475, 0xCAA7, 0x547B, 0xE3E2, 0x547C, 0xFBBC,
00364     0x547D, 0xD9A4, 0x5480, 0xEEBA, 0x5486, 0xF8D3, 0x548C, 0xFBFA,
00365     0x548E, 0xCFA4, 0x5490, 0xDCFB, 0x54A4, 0xF6E3, 0x54A8, 0xEDAA,
00366     0x54AB, 0xF2A1, 0x54AC, 0xCEE1, 0x54B3, 0xFAA6, 0x54B8, 0xF9E0,
00367     0x54BD, 0xECD6, 0x54C0, 0xE4EE, 0x54C1, 0xF9A1, 0x54C4, 0xFBEF,
00368     0x54C8, 0xF9EB, 0x54C9, 0xEEA3, 0x54E1, 0xEAAC, 0x54E5, 0xCAA8,
00369     0x54E8, 0xF4FA, 0x54ED, 0xCDD6, 0x54EE, 0xFCF6, 0x54F2, 0xF4C9,
00370     0x54FA, 0xF8D4, 0x5504, 0xF8A6, 0x5506, 0xDECA, 0x5507, 0xF2C6,
00371     0x550E, 0xD7DA, 0x5510, 0xD3D0, 0x551C, 0xD8C5, 0x552F, 0xEAE6,
00372     0x5531, 0xF3DD, 0x5535, 0xE4DA, 0x553E, 0xF6E4, 0x5544, 0xF6F2,
00373     0x5546, 0xDFC2, 0x554F, 0xD9FD, 0x5553, 0xCCF6, 0x5556, 0xD3BA,
00374     0x555E, 0xE4AF, 0x5563, 0xF9E1, 0x557C, 0xF0A6, 0x5580, 0xCBD3,
00375     0x5584, 0xE0BC, 0x5586, 0xF4CA, 0x5587, 0xD4FA, 0x5589, 0xFDAA,
00376     0x558A, 0xF9E2, 0x5598, 0xF4B7, 0x5599, 0xFDC2, 0x559A, 0xFCB0,
00377     0x559C, 0xFDEC, 0x559D, 0xCAE2, 0x55A7, 0xFDBD, 0x55A9, 0xEAE7,
00378     0x55AA, 0xDFC3, 0x55AB, 0xD1D2, 0x55AC, 0xCEE2, 0x55AE, 0xD3A4,
00379     0x55C5, 0xFDAB, 0x55C7, 0xDFE0, 0x55D4, 0xF2C7, 0x55DA, 0xE7F0,
00380     0x55DC, 0xD0EE, 0x55DF, 0xF3AA, 0x55E3, 0xDECB, 0x55E4, 0xF6B8,
00381     0x55FD, 0xE1F5, 0x55FE, 0xF1B3, 0x5606, 0xF7A3, 0x5609, 0xCAA9,
00382     0x5614, 0xCFA5, 0x5617, 0xDFC4, 0x562F, 0xE1B0, 0x5632, 0xF0BF,
00383     0x5634, 0xF6A4, 0x5636, 0xE3B6, 0x5653, 0xFAC6, 0x5668, 0xD0EF,
00384     0x566B, 0xFDED, 0x5674, 0xDDC4, 0x5686, 0xFCF7, 0x56A5, 0xE6BF,
00385     0x56AC, 0xDEAD, 0x56AE, 0xFABF, 0x56B4, 0xE5F1, 0x56BC, 0xEDC4,
00386     0x56CA, 0xD2A5, 0x56CD, 0xFDEE, 0x56D1, 0xF5B6, 0x56DA, 0xE1F6,
00387     0x56DB, 0xDECC, 0x56DE, 0xFCDE, 0x56E0, 0xECD7, 0x56F0, 0xCDDD,
00388     0x56F9, 0xD6B7, 0x56FA, 0xCDB3, 0x5703, 0xF8D5, 0x5704, 0xE5D8,
00389     0x5708, 0xCFEA, 0x570B, 0xCFD0, 0x570D, 0xEACC, 0x5712, 0xEAAE,
00390     0x5713, 0xEAAD, 0x5716, 0xD3F1, 0x5718, 0xD3A5, 0x571F, 0xF7CF,
00391     0x5728, 0xEEA4, 0x572D, 0xD0A4, 0x5730, 0xF2A2, 0x573B, 0xD0F0,
00392     0x5740, 0xF2A3, 0x5742, 0xF7F8, 0x5747, 0xD0B3, 0x574A, 0xDBA9,
00393     0x574D, 0xD3BB, 0x574E, 0xCAEC, 0x5750, 0xF1A6, 0x5751, 0xCBD5,
00394     0x5761, 0xF7E7, 0x5764, 0xCDDE, 0x5766, 0xF7A4, 0x576A, 0xF8C0,
00395     0x576E, 0xD3DD, 0x5770, 0xCCD0, 0x5775, 0xCFA6, 0x577C, 0xF6F3,
00396     0x5782, 0xE1F7, 0x5788, 0xD3DC, 0x578B, 0xFAFE, 0x5793, 0xFAA7,
00397     0x57A0, 0xEBD9, 0x57A2, 0xCFA7, 0x57A3, 0xEAAF, 0x57C3, 0xE4EF,
00398     0x57C7, 0xE9B9, 0x57C8, 0xF1D8, 0x57CB, 0xD8D8, 0x57CE, 0xE0F2,
00399     0x57DF, 0xE6B4, 0x57E0, 0xDCFC, 0x57F0, 0xF3F1, 0x57F4, 0xE3D0,
00400     0x57F7, 0xF2FB, 0x57F9, 0xDBC6, 0x57FA, 0xD0F1, 0x57FC, 0xD0F2,
00401     0x5800, 0xCFDC, 0x5802, 0xD3D1, 0x5805, 0xCCB1, 0x5806, 0xF7D8,
00402     0x5808, 0xCBA8, 0x5809, 0xEBBC, 0x580A, 0xE4BE, 0x581E, 0xF4DC,
00403     0x5821, 0xDCC2, 0x5824, 0xF0A7, 0x5827, 0xE6C0, 0x582A, 0xCAED,
00404     0x582F, 0xE8EB, 0x5830, 0xE5E8, 0x5831, 0xDCC3, 0x5834, 0xEDDE,
00405     0x5835, 0xD3F2, 0x583A, 0xCCF7, 0x584A, 0xCED4, 0x584B, 0xE7AB,
00406     0x584F, 0xCBC3, 0x5851, 0xE1B1, 0x5854, 0xF7B2, 0x5857, 0xD3F3,
00407     0x5858, 0xD3D2, 0x585A, 0xF5C0, 0x585E, 0xDFDD, 0x5861, 0xEEF3,
00408     0x5862, 0xE7F1, 0x5864, 0xFDB4, 0x5875, 0xF2C8, 0x5879, 0xF3D2,
00409     0x587C, 0xEEF4, 0x587E, 0xE2D3, 0x5883, 0xCCD1, 0x5885, 0xDFEA,
00410     0x5889, 0xE9BA, 0x5893, 0xD9D7, 0x589C, 0xF5CD, 0x589E, 0xF1F2,
00411     0x589F, 0xFAC7, 0x58A8, 0xD9F8, 0x58A9, 0xD4C2, 0x58AE, 0xF6E5,
00412     0x58B3, 0xDDC5, 0x58BA, 0xE7F2, 0x58BB, 0xEDDF, 0x58BE, 0xCACB,
00413     0x58C1, 0xDBFA, 0x58C5, 0xE8B5, 0x58C7, 0xD3A6, 0x58CE, 0xFDB5,
00414     0x58D1, 0xF9C9, 0x58D3, 0xE4E2, 0x58D5, 0xFBBD, 0x58D8, 0xD7A4,
00415     0x58D9, 0xCEC5, 0x58DE, 0xCED5, 0x58DF, 0xD6E6, 0x58E4, 0xE5BD,
00416     0x58EB, 0xDECD, 0x58EC, 0xECF3, 0x58EF, 0xEDE0, 0x58F9, 0xECEC,
00417     0x58FA, 0xFBBE, 0x58FB, 0xDFEB, 0x58FD, 0xE1F8, 0x590F, 0xF9BE,
00418     0x5914, 0xD0F3, 0x5915, 0xE0AA, 0x5916, 0xE8E2, 0x5919, 0xE2D4,
00419     0x591A, 0xD2FD, 0x591C, 0xE5A8, 0x5922, 0xD9D3, 0x5927, 0xD3DE,
00420     0x5929, 0xF4B8, 0x592A, 0xF7BC, 0x592B, 0xDCFD, 0x592D, 0xE8EC,
00421     0x592E, 0xE4E7, 0x5931, 0xE3F7, 0x5937, 0xECA8, 0x593E, 0xFAF1,
00422     0x5944, 0xE5F2, 0x5947, 0xD0F4, 0x5948, 0xD2AF, 0x5949, 0xDCE5,
00423     0x594E, 0xD0A5, 0x594F, 0xF1B4, 0x5950, 0xFCB1, 0x5951, 0xCCF8,
00424     0x5954, 0xDDC6, 0x5955, 0xFAD1, 0x5957, 0xF7DF, 0x595A, 0xFAA8,
00425     0x5960, 0xEEF5, 0x5962, 0xDECE, 0x5967, 0xE7F3, 0x596A, 0xF7AC,
00426     0x596B, 0xEBC4, 0x596C, 0xEDE1, 0x596D, 0xE0AB, 0x596E, 0xDDC7,
00427     0x5973, 0xD2B3, 0x5974, 0xD2BF, 0x5978, 0xCACC, 0x597D, 0xFBBF,
00428     0x5982, 0xE5FD, 0x5983, 0xDDE5, 0x5984, 0xD8CD, 0x598A, 0xECF4,
00429     0x5993, 0xD0F5, 0x5996, 0xE8ED, 0x5997, 0xD0D2, 0x5999, 0xD9D8,
00430     0x59A5, 0xF6E6, 0x59A8, 0xDBAA, 0x59AC, 0xF7E0, 0x59B9, 0xD8D9,
00431     0x59BB, 0xF4A3, 0x59BE, 0xF4DD, 0x59C3, 0xEFD1, 0x59C6, 0xD9B5,
00432     0x59C9, 0xEDAB, 0x59CB, 0xE3B7, 0x59D0, 0xEEBB, 0x59D1, 0xCDB4,
00433     0x59D3, 0xE0F3, 0x59D4, 0xEACD, 0x59D9, 0xECF5, 0x59DA, 0xE8EE,
00434     0x59DC, 0xCBA9, 0x59DD, 0xF1AF, 0x59E6, 0xCACD, 0x59E8, 0xECA9,
00435     0x59EA, 0xF2EB, 0x59EC, 0xFDEF, 0x59EE, 0xF9F3, 0x59F8, 0xE6C1,
00436     0x59FB, 0xECD8, 0x59FF, 0xEDAC, 0x5A01, 0xEACE, 0x5A03, 0xE8DF,
00437     0x5A11, 0xDECF, 0x5A18, 0xD2A6, 0x5A1B, 0xE7F4, 0x5A1C, 0xD1D6,
00438     0x5A1F, 0xE6C2, 0x5A20, 0xE3E3, 0x5A25, 0xE4B0, 0x5A29, 0xD8B4,
00439     0x5A36, 0xF6A5, 0x5A3C, 0xF3DE, 0x5A41, 0xD7A5, 0x5A46, 0xF7E8,
00440     0x5A49, 0xE8C6, 0x5A5A, 0xFBE6, 0x5A62, 0xDDE6, 0x5A66, 0xDCFE,
00441     0x5A92, 0xD8DA, 0x5A9A, 0xDAAC, 0x5A9B, 0xEAB0, 0x5AA4, 0xE3B8,
00442     0x5AC1, 0xCAAA, 0x5AC2, 0xE1F9, 0x5AC4, 0xEAB1, 0x5AC9, 0xF2EC,
00443     0x5ACC, 0xFAEE, 0x5AE1, 0xEED5, 0x5AE6, 0xF9F4, 0x5AE9, 0xD2EC,
00444     0x5B05, 0xFBFB, 0x5B09, 0xFDF0, 0x5B0B, 0xE0BD, 0x5B0C, 0xCEE3,
00445     0x5B16, 0xF8C6, 0x5B2A, 0xDEAE, 0x5B40, 0xDFC5, 0x5B43, 0xE5BE,
00446     0x5B50, 0xEDAD, 0x5B51, 0xFAEA, 0x5B54, 0xCDEE, 0x5B55, 0xEDA6,
00447     0x5B57, 0xEDAE, 0x5B58, 0xF0ED, 0x5B5A, 0xDDA1, 0x5B5C, 0xEDAF,
00448     0x5B5D, 0xFCF8, 0x5B5F, 0xD8EB, 0x5B63, 0xCCF9, 0x5B64, 0xCDB5,
00449     0x5B69, 0xFAA9, 0x5B6B, 0xE1DD, 0x5B70, 0xE2D5, 0x5B71, 0xEDCF,
00450     0x5B75, 0xDDA2, 0x5B78, 0xF9CA, 0x5B7A, 0xEAE8, 0x5B7C, 0xE5ED,
00451     0x5B85, 0xD3EB, 0x5B87, 0xE9D4, 0x5B88, 0xE1FA, 0x5B89, 0xE4CC,
00452     0x5B8B, 0xE1E4, 0x5B8C, 0xE8C7, 0x5B8F, 0xCEDB, 0x5B93, 0xDCD5,
00453     0x5B95, 0xF7B5, 0x5B96, 0xFCF3, 0x5B97, 0xF0F3, 0x5B98, 0xCEAF,
00454     0x5B99, 0xF1B5, 0x5B9A, 0xEFD2, 0x5B9B, 0xE8C8, 0x5B9C, 0xEBF1,
00455     0x5BA2, 0xCBD4, 0x5BA3, 0xE0BE, 0x5BA4, 0xE3F8, 0x5BA5, 0xEAE9,
00456     0x5BA6, 0xFCB2, 0x5BAC, 0xE0F4, 0x5BAE, 0xCFE0, 0x5BB0, 0xEEA5,
00457     0x5BB3, 0xFAAA, 0x5BB4, 0xE6C3, 0x5BB5, 0xE1B2, 0x5BB6, 0xCAAB,
00458     0x5BB8, 0xE3E4, 0x5BB9, 0xE9BB, 0x5BBF, 0xE2D6, 0x5BC0, 0xF3F2,
00459     0x5BC2, 0xEED6, 0x5BC3, 0xEAB2, 0x5BC4, 0xD0F6, 0x5BC5, 0xECD9,
00460     0x5BC6, 0xDACB, 0x5BC7, 0xCFA8, 0x5BCC, 0xDDA3, 0x5BD0, 0xD8DB,
00461     0x5BD2, 0xF9CE, 0x5BD3, 0xE9D5, 0x5BD4, 0xE3D1, 0x5BD7, 0xD2BC,
00462     0x5BDE, 0xD8AC, 0x5BDF, 0xF3CC, 0x5BE1, 0xCDFB, 0x5BE2, 0xF6D6,
00463     0x5BE4, 0xE7F5, 0x5BE5, 0xE8EF, 0x5BE6, 0xE3F9, 0x5BE7, 0xD2BB,
00464     0x5BE8, 0xF3F3, 0x5BE9, 0xE3FB, 0x5BEB, 0xDED0, 0x5BEC, 0xCEB0,
00465     0x5BEE, 0xD6F7, 0x5BEF, 0xF1D9, 0x5BF5, 0xF5C1, 0x5BF6, 0xDCC4,
00466     0x5BF8, 0xF5BB, 0x5BFA, 0xDED1, 0x5C01, 0xDCE6, 0x5C04, 0xDED2,
00467     0x5C07, 0xEDE2, 0x5C08, 0xEEF6, 0x5C09, 0xEACF, 0x5C0A, 0xF0EE,
00468     0x5C0B, 0xE3FC, 0x5C0D, 0xD3DF, 0x5C0E, 0xD3F4, 0x5C0F, 0xE1B3,
00469     0x5C11, 0xE1B4, 0x5C16, 0xF4D3, 0x5C19, 0xDFC6, 0x5C24, 0xE9D6,
00470     0x5C28, 0xDBAB, 0x5C31, 0xF6A6, 0x5C38, 0xE3B9, 0x5C39, 0xEBC5,
00471     0x5C3A, 0xF4A9, 0x5C3B, 0xCDB6, 0x5C3C, 0xD2F9, 0x5C3E, 0xDAAD,
00472     0x5C3F, 0xD2E3, 0x5C40, 0xCFD1, 0x5C45, 0xCBDC, 0x5C46, 0xCCFA,
00473     0x5C48, 0xCFDD, 0x5C4B, 0xE8A9, 0x5C4D, 0xE3BB, 0x5C4E, 0xE3BA,
00474     0x5C51, 0xE0DA, 0x5C55, 0xEEF7, 0x5C5B, 0xDCB3, 0x5C60, 0xD3F5,
00475     0x5C62, 0xD7A6, 0x5C64, 0xF6B5, 0x5C65, 0xD7DB, 0x5C6C, 0xE1D5,
00476     0x5C6F, 0xD4EA, 0x5C71, 0xDFA3, 0x5C79, 0xFDDF, 0x5C90, 0xD0F7,
00477     0x5C91, 0xEDD4, 0x5CA1, 0xCBAA, 0x5CA9, 0xE4DB, 0x5CAB, 0xE1FB,
00478     0x5CAC, 0xCBA2, 0x5CB1, 0xD3E0, 0x5CB3, 0xE4BF, 0x5CB5, 0xFBC0,
00479     0x5CB7, 0xDABE, 0x5CB8, 0xE4CD, 0x5CBA, 0xD6B9, 0x5CBE, 0xEFC0,
00480     0x5CC0, 0xE1FC, 0x5CD9, 0xF6B9, 0x5CE0, 0xDFC7, 0x5CE8, 0xE4B1,
00481     0x5CEF, 0xDCE7, 0x5CF0, 0xDCE8, 0x5CF4, 0xFAD6, 0x5CF6, 0xD3F6,
00482     0x5CFB, 0xF1DA, 0x5CFD, 0xFAF2, 0x5D07, 0xE2FD, 0x5D0D, 0xD5CF,
00483     0x5D0E, 0xD0F8, 0x5D11, 0xCDDF, 0x5D14, 0xF5CB, 0x5D16, 0xE4F0,
00484     0x5D17, 0xCBAB, 0x5D19, 0xD7C4, 0x5D27, 0xE2FE, 0x5D29, 0xDDDA,
00485     0x5D4B, 0xDAAE, 0x5D4C, 0xCAEE, 0x5D50, 0xD5B9, 0x5D69, 0xE3A1,
00486     0x5D6C, 0xE8E3, 0x5D6F, 0xF3AB, 0x5D87, 0xCFA9, 0x5D8B, 0xD3F7,
00487     0x5D9D, 0xD4F1, 0x5DA0, 0xCEE4, 0x5DA2, 0xE8F2, 0x5DAA, 0xE5F5,
00488     0x5DB8, 0xE7AE, 0x5DBA, 0xD6BA, 0x5DBC, 0xDFEC, 0x5DBD, 0xE4C0,
00489     0x5DCD, 0xE8E4, 0x5DD2, 0xD8B5, 0x5DD6, 0xE4DC, 0x5DDD, 0xF4B9,
00490     0x5DDE, 0xF1B6, 0x5DE1, 0xE2DE, 0x5DE2, 0xE1B5, 0x5DE5, 0xCDEF,
00491     0x5DE6, 0xF1A7, 0x5DE7, 0xCEE5, 0x5DE8, 0xCBDD, 0x5DEB, 0xD9E3,
00492     0x5DEE, 0xF3AC, 0x5DF1, 0xD0F9, 0x5DF2, 0xECAB, 0x5DF3, 0xDED3,
00493     0x5DF4, 0xF7E9, 0x5DF7, 0xF9F5, 0x5DFD, 0xE1DE, 0x5DFE, 0xCBEE,
00494     0x5E02, 0xE3BC, 0x5E03, 0xF8D6, 0x5E06, 0xDBEE, 0x5E0C, 0xFDF1,
00495     0x5E11, 0xF7B6, 0x5E16, 0xF4DE, 0x5E19, 0xF2ED, 0x5E1B, 0xDBD9,
00496     0x5E1D, 0xF0A8, 0x5E25, 0xE1FD, 0x5E2B, 0xDED4, 0x5E2D, 0xE0AC,
00497     0x5E33, 0xEDE3, 0x5E36, 0xD3E1, 0x5E38, 0xDFC8, 0x5E3D, 0xD9B6,
00498     0x5E3F, 0xFDAC, 0x5E40, 0xEFD3, 0x5E44, 0xE4C1, 0x5E45, 0xF8EB,
00499     0x5E47, 0xDBAC, 0x5E4C, 0xFCC6, 0x5E55, 0xD8AD, 0x5E5F, 0xF6BA,
00500     0x5E61, 0xDBDF, 0x5E62, 0xD3D3, 0x5E63, 0xF8C7, 0x5E72, 0xCACE,
00501     0x5E73, 0xF8C1, 0x5E74, 0xD2B4, 0x5E77, 0xDCB4, 0x5E78, 0xFAB9,
00502     0x5E79, 0xCACF, 0x5E7B, 0xFCB3, 0x5E7C, 0xEAEA, 0x5E7D, 0xEAEB,
00503     0x5E7E, 0xD0FA, 0x5E84, 0xEDE4, 0x5E87, 0xDDE7, 0x5E8A, 0xDFC9,
00504     0x5E8F, 0xDFED, 0x5E95, 0xEEBC, 0x5E97, 0xEFC1, 0x5E9A, 0xCCD2,
00505     0x5E9C, 0xDDA4, 0x5EA0, 0xDFCA, 0x5EA6, 0xD3F8, 0x5EA7, 0xF1A8,
00506     0x5EAB, 0xCDB7, 0x5EAD, 0xEFD4, 0x5EB5, 0xE4DD, 0x5EB6, 0xDFEE,
00507     0x5EB7, 0xCBAC, 0x5EB8, 0xE9BC, 0x5EBE, 0xEAEC, 0x5EC2, 0xDFCB,
00508     0x5EC8, 0xF9BF, 0x5EC9, 0xD6AF, 0x5ECA, 0xD5C6, 0x5ED0, 0xCFAA,
00509     0x5ED3, 0xCEA9, 0x5ED6, 0xD6F8, 0x5EDA, 0xF1B7, 0x5EDB, 0xEEF8,
00510     0x5EDF, 0xD9D9, 0x5EE0, 0xF3DF, 0x5EE2, 0xF8C8, 0x5EE3, 0xCEC6,
00511     0x5EEC, 0xD5E6, 0x5EF3, 0xF4E6, 0x5EF6, 0xE6C5, 0x5EF7, 0xEFD5,
00512     0x5EFA, 0xCBEF, 0x5EFB, 0xFCDF, 0x5F01, 0xDCA7, 0x5F04, 0xD6E7,
00513     0x5F0A, 0xF8C9, 0x5F0F, 0xE3D2, 0x5F11, 0xE3BD, 0x5F13, 0xCFE1,
00514     0x5F14, 0xF0C0, 0x5F15, 0xECDA, 0x5F17, 0xDDD7, 0x5F18, 0xFBF0,
00515     0x5F1B, 0xECAC, 0x5F1F, 0xF0A9, 0x5F26, 0xFAD7, 0x5F27, 0xFBC1,
00516     0x5F29, 0xD2C0, 0x5F31, 0xE5B0, 0x5F35, 0xEDE5, 0x5F3A, 0xCBAD,
00517     0x5F3C, 0xF9B0, 0x5F48, 0xF7A5, 0x5F4A, 0xCBAE, 0x5F4C, 0xDAAF,
00518     0x5F4E, 0xD8B6, 0x5F56, 0xD3A7, 0x5F57, 0xFBB2, 0x5F59, 0xFDC4,
00519     0x5F5B, 0xECAD, 0x5F62, 0xFBA1, 0x5F66, 0xE5E9, 0x5F67, 0xE9EE,
00520     0x5F69, 0xF3F4, 0x5F6A, 0xF8F3, 0x5F6B, 0xF0C1, 0x5F6C, 0xDEAF,
00521     0x5F6D, 0xF8B0, 0x5F70, 0xF3E0, 0x5F71, 0xE7AF, 0x5F77, 0xDBAD,
00522     0x5F79, 0xE6B5, 0x5F7C, 0xF9A8, 0x5F7F, 0xDDD8, 0x5F80, 0xE8D9,
00523     0x5F81, 0xEFD6, 0x5F85, 0xD3E2, 0x5F87, 0xE2DF, 0x5F8A, 0xFCE0,
00524     0x5F8B, 0xD7C8, 0x5F8C, 0xFDAD, 0x5F90, 0xDFEF, 0x5F91, 0xCCD3,
00525     0x5F92, 0xD3F9, 0x5F97, 0xD4F0, 0x5F98, 0xDBC7, 0x5F99, 0xDED5,
00526     0x5F9E, 0xF0F4, 0x5FA0, 0xD5D0, 0x5FA1, 0xE5D9, 0x5FA8, 0xFCC7,
00527     0x5FA9, 0xDCD6, 0x5FAA, 0xE2E0, 0x5FAE, 0xDAB0, 0x5FB5, 0xF3A3,
00528     0x5FB7, 0xD3EC, 0x5FB9, 0xF4CB, 0x5FBD, 0xFDC5, 0x5FC3, 0xE3FD,
00529     0x5FC5, 0xF9B1, 0x5FCC, 0xD0FB, 0x5FCD, 0xECDB, 0x5FD6, 0xF5BC,
00530     0x5FD7, 0xF2A4, 0x5FD8, 0xD8CE, 0x5FD9, 0xD8CF, 0x5FE0, 0xF5F7,
00531     0x5FEB, 0xF6E1, 0x5FF5, 0xD2B7, 0x5FFD, 0xFBEC, 0x5FFF, 0xDDC8,
00532     0x600F, 0xE4E8, 0x6012, 0xD2C1, 0x6016, 0xF8D7, 0x601C, 0xD6BB,
00533     0x601D, 0xDED6, 0x6020, 0xF7BD, 0x6021, 0xECAE, 0x6025, 0xD0E1,
00534     0x6027, 0xE0F5, 0x6028, 0xEAB3, 0x602A, 0xCED6, 0x602F, 0xCCA5,
00535     0x6041, 0xECF6, 0x6042, 0xE2E1, 0x6043, 0xE3BE, 0x604D, 0xFCC8,
00536     0x6050, 0xCDF0, 0x6052, 0xF9F6, 0x6055, 0xDFF0, 0x6059, 0xE5BF,
00537     0x605D, 0xCEBF, 0x6062, 0xFCE1, 0x6063, 0xEDB0, 0x6064, 0xFDD1,
00538     0x6065, 0xF6BB, 0x6068, 0xF9CF, 0x6069, 0xEBDA, 0x606A, 0xCAC1,
00539     0x606C, 0xD2B8, 0x606D, 0xCDF1, 0x606F, 0xE3D3, 0x6070, 0xFDE6,
00540     0x6085, 0xE6ED, 0x6089, 0xE3FA, 0x608C, 0xF0AA, 0x608D, 0xF9D0,
00541     0x6094, 0xFCE2, 0x6096, 0xF8A7, 0x609A, 0xE1E5, 0x609B, 0xEEF9,
00542     0x609F, 0xE7F6, 0x60A0, 0xEAED, 0x60A3, 0xFCB4, 0x60A4, 0xF5C2,
00543     0x60A7, 0xD7DC, 0x60B0, 0xF0F5, 0x60B2, 0xDDE8, 0x60B3, 0xD3ED,
00544     0x60B4, 0xF5FC, 0x60B6, 0xDABF, 0x60B8, 0xCCFB, 0x60BC, 0xD3FA,
00545     0x60BD, 0xF4A4, 0x60C5, 0xEFD7, 0x60C7, 0xD4C3, 0x60D1, 0xFBE3,
00546     0x60DA, 0xFBED, 0x60DC, 0xE0AD, 0x60DF, 0xEAEE, 0x60E0, 0xFBB3,
00547     0x60E1, 0xE4C2, 0x60F0, 0xF6E7, 0x60F1, 0xD2DD, 0x60F3, 0xDFCC,
00548     0x60F6, 0xFCC9, 0x60F9, 0xE5A9, 0x60FA, 0xE0F6, 0x60FB, 0xF6B3,
00549     0x6101, 0xE1FE, 0x6106, 0xCBF0, 0x6108, 0xEAEF, 0x6109, 0xEAF0,
00550     0x610D, 0xDAC0, 0x610E, 0xF8B4, 0x610F, 0xEBF2, 0x6115, 0xE4C3,
00551     0x611A, 0xE9D7, 0x611B, 0xE4F1, 0x611F, 0xCAEF, 0x6127, 0xCED7,
00552     0x6130, 0xFCCA, 0x6134, 0xF3E1, 0x6137, 0xCBC4, 0x613C, 0xE3E5,
00553     0x613E, 0xCBC5, 0x613F, 0xEAB4, 0x6142, 0xE9BD, 0x6144, 0xD7C9,
00554     0x6147, 0xEBDB, 0x6148, 0xEDB1, 0x614A, 0xCCC3, 0x614B, 0xF7BE,
00555     0x614C, 0xFCCB, 0x6153, 0xF8F4, 0x6155, 0xD9B7, 0x6158, 0xF3D3,
00556     0x6159, 0xF3D4, 0x615D, 0xF7E4, 0x615F, 0xF7D1, 0x6162, 0xD8B7,
00557     0x6163, 0xCEB1, 0x6164, 0xCAC2, 0x6167, 0xFBB4, 0x6168, 0xCBC6,
00558     0x616B, 0xF0F6, 0x616E, 0xD5E7, 0x6170, 0xEAD0, 0x6176, 0xCCD4,
00559     0x6177, 0xCBAF, 0x617D, 0xF4AA, 0x617E, 0xE9AF, 0x6181, 0xF5C3,
00560     0x6182, 0xE9D8, 0x618A, 0xDDE9, 0x618E, 0xF1F3, 0x6190, 0xD5FB,
00561     0x6191, 0xDEBB, 0x6194, 0xF4FB, 0x6198, 0xFDF3, 0x6199, 0xFDF2,
00562     0x619A, 0xF7A6, 0x61A4, 0xDDC9, 0x61A7, 0xD4D3, 0x61A9, 0xCCA8,
00563     0x61AB, 0xDAC1, 0x61AC, 0xCCD5, 0x61AE, 0xD9E4, 0x61B2, 0xFACA,
00564     0x61B6, 0xE5E3, 0x61BA, 0xD3BC, 0x61BE, 0xCAF0, 0x61C3, 0xD0C4,
00565     0x61C7, 0xCAD0, 0x61C8, 0xFAAB, 0x61C9, 0xEBEB, 0x61CA, 0xE7F8,
00566     0x61CB, 0xD9E5, 0x61E6, 0xD1D7, 0x61F2, 0xF3A4, 0x61F6, 0xD4FB,
00567     0x61F7, 0xFCE3, 0x61F8, 0xFAD8, 0x61FA, 0xF3D5, 0x61FC, 0xCFAB,
00568     0x61FF, 0xEBF3, 0x6200, 0xD5FC, 0x6207, 0xD3D4, 0x6208, 0xCDFC,
00569     0x620A, 0xD9E6, 0x620C, 0xE2F9, 0x620D, 0xE2A1, 0x620E, 0xEBD4,
00570     0x6210, 0xE0F7, 0x6211, 0xE4B2, 0x6212, 0xCCFC, 0x6216, 0xFBE4,
00571     0x621A, 0xF4AB, 0x621F, 0xD0BD, 0x6221, 0xCAF1, 0x622A, 0xEFB8,
00572     0x622E, 0xD7C0, 0x6230, 0xEEFA, 0x6231, 0xFDF4, 0x6234, 0xD3E3,
00573     0x6236, 0xFBC2, 0x623E, 0xD5E8, 0x623F, 0xDBAE, 0x6240, 0xE1B6,
00574     0x6241, 0xF8B7, 0x6247, 0xE0BF, 0x6248, 0xFBC3, 0x6249, 0xDDEA,
00575     0x624B, 0xE2A2, 0x624D, 0xEEA6, 0x6253, 0xF6E8, 0x6258, 0xF6F5,
00576     0x626E, 0xDDCA, 0x6271, 0xD0E2, 0x6276, 0xDDA6, 0x6279, 0xDDEB,
00577     0x627C, 0xE4F9, 0x627F, 0xE3AF, 0x6280, 0xD0FC, 0x6284, 0xF4FC,
00578     0x6289, 0xCCBC, 0x628A, 0xF7EA, 0x6291, 0xE5E4, 0x6292, 0xDFF1,
00579     0x6295, 0xF7E1, 0x6297, 0xF9F7, 0x6298, 0xEFB9, 0x629B, 0xF8D8,
00580     0x62AB, 0xF9A9, 0x62B1, 0xF8D9, 0x62B5, 0xEEBD, 0x62B9, 0xD8C6,
00581     0x62BC, 0xE4E3, 0x62BD, 0xF5CE, 0x62C2, 0xDDD9, 0x62C7, 0xD9E7,
00582     0x62C8, 0xD2B9, 0x62C9, 0xD5C3, 0x62CC, 0xDAE5, 0x62CD, 0xDAD0,
00583     0x62CF, 0xD1D9, 0x62D0, 0xCED8, 0x62D2, 0xCBDE, 0x62D3, 0xF4AC,
00584     0x62D4, 0xDAFB, 0x62D6, 0xF6E9, 0x62D7, 0xE8F3, 0x62D8, 0xCFAC,
00585     0x62D9, 0xF0F0, 0x62DB, 0xF4FD, 0x62DC, 0xDBC8, 0x62EC, 0xCEC0,
00586     0x62ED, 0xE3D4, 0x62EE, 0xD1CF, 0x62EF, 0xF1F5, 0x62F1, 0xCDF2,
00587     0x62F3, 0xCFEB, 0x62F7, 0xCDB8, 0x62FE, 0xE3A6, 0x62FF, 0xD1DA,
00588     0x6301, 0xF2A5, 0x6307, 0xF2A6, 0x6309, 0xE4CE, 0x6311, 0xD3FB,
00589     0x632B, 0xF1A9, 0x632F, 0xF2C9, 0x633A, 0xEFD8, 0x633B, 0xE6C9,
00590     0x633D, 0xD8B8, 0x633E, 0xFAF3, 0x6349, 0xF3B5, 0x634C, 0xF8A4,
00591     0x634F, 0xD1F3, 0x6350, 0xE6C8, 0x6355, 0xF8DA, 0x6367, 0xDCE9,
00592     0x6368, 0xDED7, 0x636E, 0xCBDF, 0x6372, 0xCFEC, 0x6377, 0xF4DF,
00593     0x637A, 0xD1F4, 0x637B, 0xD2BA, 0x637F, 0xDFF2, 0x6383, 0xE1B7,
00594     0x6388, 0xE2A3, 0x6389, 0xD3FC, 0x638C, 0xEDE6, 0x6392, 0xDBC9,
00595     0x6396, 0xE4FA, 0x6398, 0xCFDE, 0x639B, 0xCED0, 0x63A0, 0xD5D3,
00596     0x63A1, 0xF3F5, 0x63A2, 0xF7AE, 0x63A5, 0xEFC8, 0x63A7, 0xCDF3,
00597     0x63A8, 0xF5CF, 0x63A9, 0xE5F3, 0x63AA, 0xF0C2, 0x63C0, 0xCAD1,
00598     0x63C4, 0xEAF1, 0x63C6, 0xD0A6, 0x63CF, 0xD9DA, 0x63D0, 0xF0AB,
00599     0x63D6, 0xEBE7, 0x63DA, 0xE5C0, 0x63DB, 0xFCB5, 0x63E1, 0xE4C4,
00600     0x63ED, 0xCCA9, 0x63EE, 0xFDC6, 0x63F4, 0xEAB5, 0x63F6, 0xE5AA,
00601     0x63F7, 0xDFBA, 0x640D, 0xE1DF, 0x640F, 0xDAD1, 0x6414, 0xE1B8,
00602     0x6416, 0xE8F4, 0x6417, 0xD3FD, 0x641C, 0xE2A4, 0x6422, 0xF2CA,
00603     0x642C, 0xDAE6, 0x642D, 0xF7B3, 0x643A, 0xFDCD, 0x643E, 0xF3B6,
00604     0x6458, 0xEED7, 0x6460, 0xF5C4, 0x6469, 0xD8A4, 0x646F, 0xF2A7,
00605     0x6478, 0xD9B8, 0x6479, 0xD9B9, 0x647A, 0xEFC9, 0x6488, 0xD6CE,
00606     0x6491, 0xF7CB, 0x6492, 0xDFAE, 0x6493, 0xE8F5, 0x649A, 0xD2B5,
00607     0x649E, 0xD3D5, 0x64A4, 0xF4CC, 0x64A5, 0xDAFC, 0x64AB, 0xD9E8,
00608     0x64AD, 0xF7EB, 0x64AE, 0xF5C9, 0x64B0, 0xF3BC, 0x64B2, 0xDAD2,
00609     0x64BB, 0xD3B5, 0x64C1, 0xE8B6, 0x64C4, 0xD6CF, 0x64C5, 0xF4BA,
00610     0x64C7, 0xF7C9, 0x64CA, 0xCCAA, 0x64CD, 0xF0C3, 0x64CE, 0xCCD6,
00611     0x64D2, 0xD0D3, 0x64D4, 0xD3BD, 0x64D8, 0xDBFB, 0x64DA, 0xCBE0,
00612     0x64E1, 0xD3E4, 0x64E2, 0xF6F7, 0x64E5, 0xD5BA, 0x64E6, 0xF3CD,
00613     0x64E7, 0xCBE1, 0x64EC, 0xEBF4, 0x64F2, 0xF4AD, 0x64F4, 0xFCAA,
00614     0x64FA, 0xF7EC, 0x64FE, 0xE8F6, 0x6500, 0xDAE7, 0x6504, 0xF7CC,
00615     0x6518, 0xE5C1, 0x651D, 0xE0EE, 0x6523, 0xD5FD, 0x652A, 0xCEE6,
00616     0x652B, 0xFCAB, 0x652C, 0xD5BB, 0x652F, 0xF2A8, 0x6536, 0xE2A5,
00617     0x6537, 0xCDB9, 0x6538, 0xEAF2, 0x6539, 0xCBC7, 0x653B, 0xCDF4,
00618     0x653E, 0xDBAF, 0x653F, 0xEFD9, 0x6545, 0xCDBA, 0x6548, 0xFCF9,
00619     0x654D, 0xDFF3, 0x654E, 0xCEE7, 0x654F, 0xDAC2, 0x6551, 0xCFAD,
00620     0x6556, 0xE7F9, 0x6557, 0xF8A8, 0x655E, 0xF3E2, 0x6562, 0xCAF2,
00621     0x6563, 0xDFA4, 0x6566, 0xD4C4, 0x656C, 0xCCD7, 0x656D, 0xE5C2,
00622     0x6572, 0xCDBB, 0x6574, 0xEFDA, 0x6575, 0xEED8, 0x6577, 0xDDA7,
00623     0x6578, 0xE2A6, 0x657E, 0xE0C0, 0x6582, 0xD6B0, 0x6583, 0xF8CA,
00624     0x6585, 0xFCFA, 0x6587, 0xD9FE, 0x658C, 0xDEB0, 0x6590, 0xDDEC,
00625     0x6591, 0xDAE8, 0x6597, 0xD4E0, 0x6599, 0xD6F9, 0x659B, 0xCDD7,
00626     0x659C, 0xDED8, 0x659F, 0xF2F8, 0x65A1, 0xE4D6, 0x65A4, 0xD0C5,
00627     0x65A5, 0xF4AE, 0x65A7, 0xDDA8, 0x65AB, 0xEDC5, 0x65AC, 0xF3D6,
00628     0x65AF, 0xDED9, 0x65B0, 0xE3E6, 0x65B7, 0xD3A8, 0x65B9, 0xDBB0,
00629     0x65BC, 0xE5DA, 0x65BD, 0xE3BF, 0x65C1, 0xDBB1, 0x65C5, 0xD5E9,
00630     0x65CB, 0xE0C1, 0x65CC, 0xEFDB, 0x65CF, 0xF0E9, 0x65D2, 0xD7B2,
00631     0x65D7, 0xD0FD, 0x65E0, 0xD9E9, 0x65E3, 0xD0FE, 0x65E5, 0xECED,
00632     0x65E6, 0xD3A9, 0x65E8, 0xF2A9, 0x65E9, 0xF0C4, 0x65EC, 0xE2E2,
00633     0x65ED, 0xE9EF, 0x65F1, 0xF9D1, 0x65F4, 0xE9D9, 0x65FA, 0xE8DA,
00634     0x65FB, 0xDAC3, 0x65FC, 0xDAC4, 0x65FD, 0xD4C5, 0x65FF, 0xE7FA,
00635     0x6606, 0xCDE0, 0x6607, 0xE3B0, 0x6609, 0xDBB2, 0x660A, 0xFBC4,
00636     0x660C, 0xF3E3, 0x660E, 0xD9A5, 0x660F, 0xFBE7, 0x6610, 0xDDCB,
00637     0x6611, 0xD0D4, 0x6613, 0xE6B6, 0x6614, 0xE0AE, 0x6615, 0xFDDA,
00638     0x661E, 0xDCB5, 0x661F, 0xE0F8, 0x6620, 0xE7B1, 0x6625, 0xF5F0,
00639     0x6627, 0xD8DC, 0x6628, 0xEDC6, 0x662D, 0xE1B9, 0x662F, 0xE3C0,
00640     0x6630, 0xF9C0, 0x6631, 0xE9F0, 0x6634, 0xD9DB, 0x6636, 0xF3E4,
00641     0x663A, 0xDCB6, 0x663B, 0xE4E9, 0x6641, 0xF0C5, 0x6642, 0xE3C1,
00642     0x6643, 0xFCCC, 0x6644, 0xFCCD, 0x6649, 0xF2CB, 0x664B, 0xF2CC,
00643     0x664F, 0xE4CF, 0x6659, 0xF1DB, 0x665B, 0xFAD9, 0x665D, 0xF1B8,
00644     0x665E, 0xFDF5, 0x665F, 0xE0F9, 0x6664, 0xE7FB, 0x6665, 0xFCB7,
00645     0x6666, 0xFCE4, 0x6667, 0xFBC5, 0x6668, 0xE3E7, 0x6669, 0xD8B9,
00646     0x666B, 0xF6F8, 0x666E, 0xDCC5, 0x666F, 0xCCD8, 0x6673, 0xE0AF,
00647     0x6674, 0xF4E7, 0x6676, 0xEFDC, 0x6677, 0xCFFC, 0x6678, 0xEFDD,
00648     0x667A, 0xF2AA, 0x6684, 0xFDBE, 0x6687, 0xCAAC, 0x6688, 0xFDBB,
00649     0x6689, 0xFDC7, 0x668E, 0xE7B2, 0x6690, 0xEAD1, 0x6691, 0xDFF4,
00650     0x6696, 0xD1EC, 0x6697, 0xE4DE, 0x6698, 0xE5C3, 0x669D, 0xD9A6,
00651     0x66A0, 0xCDBC, 0x66A2, 0xF3E5, 0x66AB, 0xEDD5, 0x66AE, 0xD9BA,
00652     0x66B2, 0xEDE7, 0x66B3, 0xFBB5, 0x66B4, 0xF8EC, 0x66B9, 0xE0E7,
00653     0x66BB, 0xCCD9, 0x66BE, 0xD4C6, 0x66C4, 0xE7A5, 0x66C6, 0xD5F5,
00654     0x66C7, 0xD3BE, 0x66C9, 0xFCFB, 0x66D6, 0xE4F2, 0x66D9, 0xDFF5,
00655     0x66DC, 0xE8F8, 0x66DD, 0xF8ED, 0x66E0, 0xCEC7, 0x66E6, 0xFDF6,
00656     0x66F0, 0xE8D8, 0x66F2, 0xCDD8, 0x66F3, 0xE7D6, 0x66F4, 0xCCDA,
00657     0x66F7, 0xCAE3, 0x66F8, 0xDFF6, 0x66F9, 0xF0C7, 0x66FA, 0xF0C6,
00658     0x66FC, 0xD8BA, 0x66FE, 0xF1F4, 0x66FF, 0xF4F0, 0x6700, 0xF5CC,
00659     0x6703, 0xFCE5, 0x6708, 0xEAC5, 0x6709, 0xEAF3, 0x670B, 0xDDDB,
00660     0x670D, 0xDCD7, 0x6714, 0xDEFD, 0x6715, 0xF2F9, 0x6717, 0xD5C7,
00661     0x671B, 0xD8D0, 0x671D, 0xF0C8, 0x671E, 0xD1A1, 0x671F, 0xD1A2,
00662     0x6726, 0xD9D4, 0x6727, 0xD6E8, 0x6728, 0xD9CA, 0x672A, 0xDAB1,
00663     0x672B, 0xD8C7, 0x672C, 0xDCE2, 0x672D, 0xF3CE, 0x672E, 0xF5F4,
00664     0x6731, 0xF1B9, 0x6734, 0xDAD3, 0x6736, 0xF6EA, 0x673A, 0xCFF5,
00665     0x673D, 0xFDAE, 0x6746, 0xCAD2, 0x6749, 0xDFB4, 0x674E, 0xD7DD,
00666     0x674F, 0xFABA, 0x6750, 0xEEA7, 0x6751, 0xF5BD, 0x6753, 0xF8F5,
00667     0x6756, 0xEDE8, 0x675C, 0xD4E1, 0x675E, 0xD1A3, 0x675F, 0xE1D6,
00668     0x676D, 0xF9F8, 0x676F, 0xDBCA, 0x6770, 0xCBF9, 0x6771, 0xD4D4,
00669     0x6773, 0xD9DC, 0x6775, 0xEEBE, 0x6777, 0xF7ED, 0x677B, 0xD2EE,
00670     0x677E, 0xE1E6, 0x677F, 0xF7F9, 0x6787, 0xDDED, 0x6789, 0xE8DB,
00671     0x678B, 0xDBB3, 0x678F, 0xD1F7, 0x6790, 0xE0B0, 0x6793, 0xD4E2,
00672     0x6795, 0xF6D7, 0x6797, 0xD7F9, 0x679A, 0xD8DD, 0x679C, 0xCDFD,
00673     0x679D, 0xF2AB, 0x67AF, 0xCDBD, 0x67B0, 0xF8C2, 0x67B3, 0xF2AC,
00674     0x67B6, 0xCAAD, 0x67B7, 0xCAAE, 0x67B8, 0xCFAE, 0x67BE, 0xE3C2,
00675     0x67C4, 0xDCB7, 0x67CF, 0xDBDA, 0x67D0, 0xD9BB, 0x67D1, 0xCAF3,
00676     0x67D2, 0xF6D3, 0x67D3, 0xE6F8, 0x67D4, 0xEAF5, 0x67DA, 0xEAF6,
00677     0x67DD, 0xF6F9, 0x67E9, 0xCFAF, 0x67EC, 0xCAD3, 0x67EF, 0xCAAF,
00678     0x67F0, 0xD2B0, 0x67F1, 0xF1BA, 0x67F3, 0xD7B3, 0x67F4, 0xE3C3,
00679     0x67F5, 0xF3FD, 0x67F6, 0xDEDA, 0x67FB, 0xDEDB, 0x67FE, 0xEFDE,
00680     0x6812, 0xE2E3, 0x6813, 0xEEFB, 0x6816, 0xDFF7, 0x6817, 0xD7CA,
00681     0x6821, 0xCEE8, 0x6822, 0xDBDB, 0x682A, 0xF1BB, 0x682F, 0xE9F1,
00682     0x6838, 0xFAB7, 0x6839, 0xD0C6, 0x683C, 0xCCAB, 0x683D, 0xEEA8,
00683     0x6840, 0xCBFA, 0x6841, 0xF9F9, 0x6842, 0xCCFD, 0x6843, 0xD3FE,
00684     0x6848, 0xE4D0, 0x684E, 0xF2EE, 0x6850, 0xD4D5, 0x6851, 0xDFCD,
00685     0x6853, 0xFCB8, 0x6854, 0xD1D0, 0x686D, 0xF2CD, 0x6876, 0xF7D2,
00686     0x687F, 0xCAD4, 0x6881, 0xD5D9, 0x6885, 0xD8DE, 0x688F, 0xCDD9,
00687     0x6893, 0xEEA9, 0x6894, 0xF6BC, 0x6897, 0xCCDB, 0x689D, 0xF0C9,
00688     0x689F, 0xFCFC, 0x68A1, 0xE8C9, 0x68A2, 0xF4FE, 0x68A7, 0xE7FC,
00689     0x68A8, 0xD7DE, 0x68AD, 0xDEDC, 0x68AF, 0xF0AC, 0x68B0, 0xCCFE,
00690     0x68B1, 0xCDE1, 0x68B3, 0xE1BA, 0x68B5, 0xDBEF, 0x68B6, 0xDAB2,
00691     0x68C4, 0xD1A5, 0x68C5, 0xDCB8, 0x68C9, 0xD8F6, 0x68CB, 0xD1A4,
00692     0x68CD, 0xCDE2, 0x68D2, 0xDCEA, 0x68D5, 0xF0F7, 0x68D7, 0xF0CA,
00693     0x68D8, 0xD0BE, 0x68DA, 0xDDDC, 0x68DF, 0xD4D6, 0x68E0, 0xD3D6,
00694     0x68E7, 0xEDD0, 0x68E8, 0xCDA1, 0x68EE, 0xDFB5, 0x68F2, 0xDFF8,
00695     0x68F9, 0xD4A1, 0x68FA, 0xCEB2, 0x6900, 0xE8CA, 0x6905, 0xEBF5,
00696     0x690D, 0xE3D5, 0x690E, 0xF5D0, 0x6912, 0xF5A1, 0x6927, 0xD9A7,
00697     0x6930, 0xE5AB, 0x693D, 0xE6CB, 0x693F, 0xF5F1, 0x694A, 0xE5C5,
00698     0x6953, 0xF9A3, 0x6954, 0xE0DB, 0x6955, 0xF6EB, 0x6957, 0xCBF1,
00699     0x6959, 0xD9EA, 0x695A, 0xF5A2, 0x695E, 0xD7D1, 0x6960, 0xD1F8,
00700     0x6961, 0xEAF8, 0x6962, 0xEAF9, 0x6963, 0xDAB3, 0x6968, 0xEFDF,
00701     0x696B, 0xF1EF, 0x696D, 0xE5F6, 0x696E, 0xEEBF, 0x696F, 0xE2E4,
00702     0x6975, 0xD0BF, 0x6977, 0xFAAC, 0x6978, 0xF5D1, 0x6979, 0xE7B3,
00703     0x6995, 0xE9BE, 0x699B, 0xF2CE, 0x699C, 0xDBB4, 0x69A5, 0xFCCE,
00704     0x69A7, 0xDDEE, 0x69AE, 0xE7B4, 0x69B4, 0xD7B4, 0x69BB, 0xF7B4,
00705     0x69C1, 0xCDBE, 0x69C3, 0xDAE9, 0x69CB, 0xCFB0, 0x69CC, 0xF7D9,
00706     0x69CD, 0xF3E6, 0x69D0, 0xCED9, 0x69E8, 0xCEAA, 0x69EA, 0xCBC8,
00707     0x69FB, 0xD0A7, 0x69FD, 0xF0CB, 0x69FF, 0xD0C7, 0x6A02, 0xE4C5,
00708     0x6A0A, 0xDBE0, 0x6A11, 0xD5DA, 0x6A13, 0xD7A7, 0x6A17, 0xEEC0,
00709     0x6A19, 0xF8F6, 0x6A1E, 0xF5D2, 0x6A1F, 0xEDE9, 0x6A21, 0xD9BC,
00710     0x6A23, 0xE5C6, 0x6A35, 0xF5A3, 0x6A38, 0xDAD4, 0x6A39, 0xE2A7,
00711     0x6A3A, 0xFBFC, 0x6A3D, 0xF1DC, 0x6A44, 0xCAF4, 0x6A48, 0xE8FA,
00712     0x6A4B, 0xCEE9, 0x6A52, 0xE9F8, 0x6A53, 0xE2E5, 0x6A58, 0xD0B9,
00713     0x6A59, 0xD4F2, 0x6A5F, 0xD1A6, 0x6A61, 0xDFCE, 0x6A6B, 0xFCF4,
00714     0x6A80, 0xD3AA, 0x6A84, 0xCCAC, 0x6A89, 0xEFE0, 0x6A8D, 0xE5E5,
00715     0x6A8E, 0xD0D5, 0x6A97, 0xDBFC, 0x6A9C, 0xFCE6, 0x6AA2, 0xCBFE,
00716     0x6AA3, 0xEDEA, 0x6AB3, 0xDEB1, 0x6ABB, 0xF9E3, 0x6AC2, 0xD4A2,
00717     0x6AC3, 0xCFF6, 0x6AD3, 0xD6D0, 0x6ADA, 0xD5EA, 0x6ADB, 0xF1EE,
00718     0x6AF6, 0xFACB, 0x6AFB, 0xE5A1, 0x6B04, 0xD5B1, 0x6B0A, 0xCFED,
00719     0x6B0C, 0xEDEB, 0x6B12, 0xD5B2, 0x6B16, 0xD5BC, 0x6B20, 0xFDE2,
00720     0x6B21, 0xF3AD, 0x6B23, 0xFDDB, 0x6B32, 0xE9B0, 0x6B3A, 0xD1A7,
00721     0x6B3D, 0xFDE3, 0x6B3E, 0xCEB3, 0x6B46, 0xFDE4, 0x6B47, 0xFACE,
00722     0x6B4C, 0xCAB0, 0x6B4E, 0xF7A7, 0x6B50, 0xCFB1, 0x6B5F, 0xE6A2,
00723     0x6B61, 0xFCB6, 0x6B62, 0xF2AD, 0x6B63, 0xEFE1, 0x6B64, 0xF3AE,
00724     0x6B65, 0xDCC6, 0x6B66, 0xD9EB, 0x6B6A, 0xE8E0, 0x6B72, 0xE1A8,
00725     0x6B77, 0xD5F6, 0x6B78, 0xCFFD, 0x6B7B, 0xDEDD, 0x6B7F, 0xD9D1,
00726     0x6B83, 0xE4EA, 0x6B84, 0xF2CF, 0x6B86, 0xF7BF, 0x6B89, 0xE2E6,
00727     0x6B8A, 0xE2A8, 0x6B96, 0xE3D6, 0x6B98, 0xEDD1, 0x6B9E, 0xE9F9,
00728     0x6BAE, 0xD6B1, 0x6BAF, 0xDEB2, 0x6BB2, 0xE0E8, 0x6BB5, 0xD3AB,
00729     0x6BB7, 0xEBDC, 0x6BBA, 0xDFAF, 0x6BBC, 0xCAC3, 0x6BBF, 0xEEFC,
00730     0x6BC1, 0xFDC3, 0x6BC5, 0xEBF6, 0x6BC6, 0xCFB2, 0x6BCB, 0xD9EC,
00731     0x6BCD, 0xD9BD, 0x6BCF, 0xD8DF, 0x6BD2, 0xD4B8, 0x6BD3, 0xEBBE,
00732     0x6BD4, 0xDDEF, 0x6BD6, 0xDDF0, 0x6BD7, 0xDDF1, 0x6BD8, 0xDDF2,
00733     0x6BDB, 0xD9BE, 0x6BEB, 0xFBC6, 0x6BEC, 0xCFB3, 0x6C08, 0xEEFD,
00734     0x6C0F, 0xE4AB, 0x6C11, 0xDAC5, 0x6C13, 0xD8EC, 0x6C23, 0xD1A8,
00735     0x6C34, 0xE2A9, 0x6C37, 0xDEBC, 0x6C38, 0xE7B5, 0x6C3E, 0xDBF0,
00736     0x6C40, 0xEFE2, 0x6C41, 0xF1F0, 0x6C42, 0xCFB4, 0x6C4E, 0xDBF1,
00737     0x6C50, 0xE0B1, 0x6C55, 0xDFA5, 0x6C57, 0xF9D2, 0x6C5A, 0xE7FD,
00738     0x6C5D, 0xE6A3, 0x6C5E, 0xFBF1, 0x6C5F, 0xCBB0, 0x6C60, 0xF2AE,
00739     0x6C68, 0xCDE7, 0x6C6A, 0xE8DC, 0x6C6D, 0xE7D7, 0x6C70, 0xF7C0,
00740     0x6C72, 0xD0E3, 0x6C76, 0xDAA1, 0x6C7A, 0xCCBD, 0x6C7D, 0xD1A9,
00741     0x6C7E, 0xDDCC, 0x6C81, 0xE3FE, 0x6C82, 0xD1AA, 0x6C83, 0xE8AA,
00742     0x6C85, 0xEAB6, 0x6C86, 0xF9FA, 0x6C87, 0xE6CC, 0x6C88, 0xF6D8,
00743     0x6C8C, 0xD4C7, 0x6C90, 0xD9CB, 0x6C92, 0xD9D2, 0x6C93, 0xD3CB,
00744     0x6C94, 0xD8F7, 0x6C95, 0xDAA9, 0x6C96, 0xF5F8, 0x6C99, 0xDEDE,
00745     0x6C9A, 0xF2AF, 0x6C9B, 0xF8A9, 0x6CAB, 0xD8C8, 0x6CAE, 0xEEC1,
00746     0x6CB3, 0xF9C1, 0x6CB8, 0xDDF3, 0x6CB9, 0xEAFA, 0x6CBB, 0xF6BD,
00747     0x6CBC, 0xE1BB, 0x6CBD, 0xCDBF, 0x6CBE, 0xF4D4, 0x6CBF, 0xE6CD,
00748     0x6CC1, 0xFCCF, 0x6CC2, 0xFBA2, 0x6CC4, 0xE0DC, 0x6CC9, 0xF4BB,
00749     0x6CCA, 0xDAD5, 0x6CCC, 0xF9B2, 0x6CD3, 0xFBF2, 0x6CD5, 0xDBF6,
00750     0x6CD7, 0xDEDF, 0x6CDB, 0xDBF2, 0x6CE1, 0xF8DC, 0x6CE2, 0xF7EE,
00751     0x6CE3, 0xEBE8, 0x6CE5, 0xD2FA, 0x6CE8, 0xF1BC, 0x6CEB, 0xFADA,
00752     0x6CEE, 0xDAEA, 0x6CEF, 0xDAC6, 0x6CF0, 0xF7C1, 0x6CF3, 0xE7B6,
00753     0x6D0B, 0xE5C7, 0x6D0C, 0xD6AC, 0x6D11, 0xDCC7, 0x6D17, 0xE1A9,
00754     0x6D19, 0xE2AA, 0x6D1B, 0xD5A6, 0x6D1E, 0xD4D7, 0x6D25, 0xF2D0,
00755     0x6D27, 0xEAFB, 0x6D29, 0xE0DD, 0x6D2A, 0xFBF3, 0x6D32, 0xF1BD,
00756     0x6D35, 0xE2E7, 0x6D36, 0xFDD7, 0x6D38, 0xCEC8, 0x6D39, 0xEAB7,
00757     0x6D3B, 0xFCC0, 0x6D3D, 0xFDE7, 0x6D3E, 0xF7EF, 0x6D41, 0xD7B5,
00758     0x6D59, 0xEFBA, 0x6D5A, 0xF1DD, 0x6D5C, 0xDEB3, 0x6D63, 0xE8CB,
00759     0x6D66, 0xF8DD, 0x6D69, 0xFBC7, 0x6D6A, 0xD5C8, 0x6D6C, 0xD7DF,
00760     0x6D6E, 0xDDA9, 0x6D74, 0xE9B1, 0x6D77, 0xFAAD, 0x6D78, 0xF6D9,
00761     0x6D79, 0xFAF4, 0x6D7F, 0xF8AA, 0x6D85, 0xE6EE, 0x6D87, 0xCCDC,
00762     0x6D88, 0xE1BC, 0x6D89, 0xE0EF, 0x6D8C, 0xE9BF, 0x6D8D, 0xFCFD,
00763     0x6D8E, 0xE6CE, 0x6D91, 0xE1D7, 0x6D93, 0xE6CF, 0x6D95, 0xF4F1,
00764     0x6DAF, 0xE4F3, 0x6DB2, 0xE4FB, 0x6DB5, 0xF9E4, 0x6DC0, 0xEFE3,
00765     0x6DC3, 0xCFEE, 0x6DC4, 0xF6BE, 0x6DC5, 0xE0B2, 0x6DC6, 0xFCFE,
00766     0x6DC7, 0xD1AB, 0x6DCB, 0xD7FA, 0x6DCF, 0xFBC8, 0x6DD1, 0xE2D7,
00767     0x6DD8, 0xD4A3, 0x6DD9, 0xF0F8, 0x6DDA, 0xD7A8, 0x6DDE, 0xE1E7,
00768     0x6DE1, 0xD3BF, 0x6DE8, 0xEFE4, 0x6DEA, 0xD7C5, 0x6DEB, 0xEBE2,
00769     0x6DEE, 0xFCE7, 0x6DF1, 0xE4A2, 0x6DF3, 0xE2E8, 0x6DF5, 0xE6D0,
00770     0x6DF7, 0xFBE8, 0x6DF8, 0xF4E8, 0x6DF9, 0xE5F4, 0x6DFA, 0xF4BC,
00771     0x6DFB, 0xF4D5, 0x6E17, 0xDFB6, 0x6E19, 0xFCB9, 0x6E1A, 0xEEC2,
00772     0x6E1B, 0xCAF5, 0x6E1F, 0xEFE5, 0x6E20, 0xCBE2, 0x6E21, 0xD4A4,
00773     0x6E23, 0xDEE0, 0x6E24, 0xDAFD, 0x6E25, 0xE4C6, 0x6E26, 0xE8BE,
00774     0x6E2B, 0xE0DE, 0x6E2C, 0xF6B4, 0x6E2D, 0xEAD2, 0x6E2F, 0xF9FB,
00775     0x6E32, 0xE0C2, 0x6E34, 0xCAE4, 0x6E36, 0xE7B7, 0x6E38, 0xEAFD,
00776     0x6E3A, 0xD9DD, 0x6E3C, 0xDAB4, 0x6E3D, 0xEEAA, 0x6E3E, 0xFBE9,
00777     0x6E43, 0xDBCB, 0x6E44, 0xDAB5, 0x6E4A, 0xF1BE, 0x6E4D, 0xD3AC,
00778     0x6E56, 0xFBC9, 0x6E58, 0xDFCF, 0x6E5B, 0xD3C0, 0x6E5C, 0xE3D7,
00779     0x6E5E, 0xEFE6, 0x6E5F, 0xFCD0, 0x6E67, 0xE9C0, 0x6E6B, 0xF5D3,
00780     0x6E6E, 0xECDC, 0x6E6F, 0xF7B7, 0x6E72, 0xEAB8, 0x6E73, 0xD1F9,
00781     0x6E7A, 0xDCC8, 0x6E90, 0xEAB9, 0x6E96, 0xF1DE, 0x6E9C, 0xD7B6,
00782     0x6E9D, 0xCFB5, 0x6E9F, 0xD9A8, 0x6EA2, 0xECEE, 0x6EA5, 0xDDAA,
00783     0x6EAA, 0xCDA2, 0x6EAB, 0xE8AE, 0x6EAF, 0xE1BD, 0x6EB1, 0xF2D1,
00784     0x6EB6, 0xE9C1, 0x6EBA, 0xD2FC, 0x6EC2, 0xDBB5, 0x6EC4, 0xF3E7,
00785     0x6EC5, 0xD8FE, 0x6EC9, 0xFCD1, 0x6ECB, 0xEDB2, 0x6ECC, 0xF4AF,
00786     0x6ECE, 0xFBA3, 0x6ED1, 0xFCC1, 0x6ED3, 0xEEAB, 0x6ED4, 0xD4A5,
00787     0x6EEF, 0xF4F2, 0x6EF4, 0xEED9, 0x6EF8, 0xFBCA, 0x6EFE, 0xCDE3,
00788     0x6EFF, 0xD8BB, 0x6F01, 0xE5DB, 0x6F02, 0xF8F7, 0x6F06, 0xF6D4,
00789     0x6F0F, 0xD7A9, 0x6F11, 0xCBC9, 0x6F14, 0xE6D1, 0x6F15, 0xF0CC,
00790     0x6F20, 0xD8AE, 0x6F22, 0xF9D3, 0x6F23, 0xD5FE, 0x6F2B, 0xD8BC,
00791     0x6F2C, 0xF2B0, 0x6F31, 0xE2AB, 0x6F32, 0xF3E8, 0x6F38, 0xEFC2,
00792     0x6F3F, 0xEDEC, 0x6F41, 0xE7B8, 0x6F51, 0xDAFE, 0x6F54, 0xCCBE,
00793     0x6F57, 0xF2FC, 0x6F58, 0xDAEB, 0x6F5A, 0xE2D8, 0x6F5B, 0xEDD6,
00794     0x6F5E, 0xD6D1, 0x6F5F, 0xE0B3, 0x6F62, 0xFCD2, 0x6F64, 0xEBC8,
00795     0x6F6D, 0xD3C1, 0x6F6E, 0xF0CD, 0x6F70, 0xCFF7, 0x6F7A, 0xEDD2,
00796     0x6F7C, 0xD4D8, 0x6F7D, 0xDCC9, 0x6F7E, 0xD7F1, 0x6F81, 0xDFBB,
00797     0x6F84, 0xF3A5, 0x6F88, 0xF4CD, 0x6F8D, 0xF1BF, 0x6F8E, 0xF8B1,
00798     0x6F90, 0xE9FA, 0x6F94, 0xFBCB, 0x6F97, 0xCAD5, 0x6FA3, 0xF9D4,
00799     0x6FA4, 0xF7CA, 0x6FA7, 0xD6C8, 0x6FAE, 0xFCE8, 0x6FAF, 0xF3BD,
00800     0x6FB1, 0xEEFE, 0x6FB3, 0xE7FE, 0x6FB9, 0xD3C2, 0x6FBE, 0xD3B6,
00801     0x6FC0, 0xCCAD, 0x6FC1, 0xF6FA, 0x6FC2, 0xD6B2, 0x6FC3, 0xD2D8,
00802     0x6FCA, 0xE7D8, 0x6FD5, 0xE3A5, 0x6FDA, 0xE7B9, 0x6FDF, 0xF0AD,
00803     0x6FE0, 0xFBCC, 0x6FE1, 0xEBA1, 0x6FE4, 0xD4A6, 0x6FE9, 0xFBCD,
00804     0x6FEB, 0xD5BD, 0x6FEC, 0xF1DF, 0x6FEF, 0xF6FB, 0x6FF1, 0xDEB4,
00805     0x6FFE, 0xD5EB, 0x7001, 0xE5C8, 0x7005, 0xFBA4, 0x7006, 0xD4B9,
00806     0x7009, 0xDEE1, 0x700B, 0xE4A3, 0x700F, 0xD7B7, 0x7011, 0xF8EE,
00807     0x7015, 0xDEB5, 0x7018, 0xD6D2, 0x701A, 0xF9D5, 0x701B, 0xE7BA,
00808     0x701C, 0xEBD5, 0x701D, 0xD5F7, 0x701E, 0xEFE7, 0x701F, 0xE1BE,
00809     0x7023, 0xFAAE, 0x7027, 0xD6E9, 0x7028, 0xD6EE, 0x702F, 0xE7BB,
00810     0x7037, 0xECCB, 0x703E, 0xD5B3, 0x704C, 0xCEB4, 0x7050, 0xFBA5,
00811     0x7051, 0xE1EE, 0x7058, 0xF7A8, 0x705D, 0xFBCE, 0x7063, 0xD8BD,
00812     0x706B, 0xFBFD, 0x7070, 0xFCE9, 0x7078, 0xCFB6, 0x707C, 0xEDC7,
00813     0x707D, 0xEEAC, 0x7085, 0xCCDD, 0x708A, 0xF6A7, 0x708E, 0xE6FA,
00814     0x7092, 0xF5A4, 0x7098, 0xFDDC, 0x7099, 0xEDB3, 0x709A, 0xCEC9,
00815     0x70A1, 0xEFE8, 0x70A4, 0xE1BF, 0x70AB, 0xFADB, 0x70AC, 0xCBE3,
00816     0x70AD, 0xF7A9, 0x70AF, 0xFBA6, 0x70B3, 0xDCB9, 0x70B7, 0xF1C0,
00817     0x70B8, 0xEDC8, 0x70B9, 0xEFC3, 0x70C8, 0xD6AD, 0x70CB, 0xFDCE,
00818     0x70CF, 0xE8A1, 0x70D8, 0xFBF4, 0x70D9, 0xD5A7, 0x70DD, 0xF1F6,
00819     0x70DF, 0xE6D3, 0x70F1, 0xCCDE, 0x70F9, 0xF8B2, 0x70FD, 0xDCEB,
00820     0x7104, 0xFDB6, 0x7109, 0xE5EA, 0x710C, 0xF1E0, 0x7119, 0xDBCC,
00821     0x711A, 0xDDCD, 0x711E, 0xD4C8, 0x7121, 0xD9ED, 0x7126, 0xF5A5,
00822     0x7130, 0xE6FB, 0x7136, 0xE6D4, 0x7147, 0xFDC8, 0x7149, 0xD6A1,
00823     0x714A, 0xFDBF, 0x714C, 0xFCD3, 0x714E, 0xEFA1, 0x7150, 0xE7BC,
00824     0x7156, 0xD1EE, 0x7159, 0xE6D5, 0x715C, 0xE9F2, 0x715E, 0xDFB0,
00825     0x7164, 0xD8E0, 0x7165, 0xFCBA, 0x7166, 0xFDAF, 0x7167, 0xF0CE,
00826     0x7169, 0xDBE1, 0x716C, 0xE5C9, 0x716E, 0xEDB4, 0x717D, 0xE0C3,
00827     0x7184, 0xE3D8, 0x7189, 0xE9FB, 0x718A, 0xEAA8, 0x718F, 0xFDB7,
00828     0x7192, 0xFBA7, 0x7194, 0xE9C2, 0x7199, 0xFDF7, 0x719F, 0xE2D9,
00829     0x71A2, 0xDCEC, 0x71AC, 0xE8A2, 0x71B1, 0xE6F0, 0x71B9, 0xFDF8,
00830     0x71BA, 0xFDF9, 0x71BE, 0xF6BF, 0x71C1, 0xE7A7, 0x71C3, 0xE6D7,
00831     0x71C8, 0xD4F3, 0x71C9, 0xD4C9, 0x71CE, 0xD6FA, 0x71D0, 0xD7F2,
00832     0x71D2, 0xE1C0, 0x71D4, 0xDBE2, 0x71D5, 0xE6D8, 0x71DF, 0xE7BD,
00833     0x71E5, 0xF0CF, 0x71E6, 0xF3BE, 0x71E7, 0xE2AC, 0x71ED, 0xF5B7,
00834     0x71EE, 0xE0F0, 0x71FB, 0xFDB8, 0x71FC, 0xE3E8, 0x71FE, 0xD4A7,
00835     0x71FF, 0xE8FC, 0x7200, 0xFAD2, 0x7206, 0xF8EF, 0x7210, 0xD6D3,
00836     0x721B, 0xD5B4, 0x722A, 0xF0D0, 0x722C, 0xF7F0, 0x722D, 0xEEB3,
00837     0x7230, 0xEABA, 0x7232, 0xEAD3, 0x7235, 0xEDC9, 0x7236, 0xDDAB,
00838     0x723A, 0xE5AC, 0x723B, 0xFDA1, 0x723D, 0xDFD0, 0x723E, 0xECB3,
00839     0x7240, 0xDFD1, 0x7246, 0xEDED, 0x7247, 0xF8B8, 0x7248, 0xF7FA,
00840     0x724C, 0xF8AB, 0x7252, 0xF4E0, 0x7258, 0xD4BA, 0x7259, 0xE4B3,
00841     0x725B, 0xE9DA, 0x725D, 0xDEB6, 0x725F, 0xD9BF, 0x7261, 0xD9C0,
00842     0x7262, 0xD6EF, 0x7267, 0xD9CC, 0x7269, 0xDAAA, 0x7272, 0xDFE5,
00843     0x7279, 0xF7E5, 0x727D, 0xCCB2, 0x7280, 0xDFF9, 0x7281, 0xD7E0,
00844     0x72A2, 0xD4BB, 0x72A7, 0xFDFA, 0x72AC, 0xCCB3, 0x72AF, 0xDBF3,
00845     0x72C0, 0xDFD2, 0x72C2, 0xCECA, 0x72C4, 0xEEDA, 0x72CE, 0xE4E4,
00846     0x72D0, 0xFBCF, 0x72D7, 0xCFB7, 0x72D9, 0xEEC3, 0x72E1, 0xCEEA,
00847     0x72E9, 0xE2AD, 0x72F8, 0xD7E1, 0x72F9, 0xFAF5, 0x72FC, 0xD5C9,
00848     0x72FD, 0xF8AC, 0x730A, 0xE7D9, 0x7316, 0xF3E9, 0x731B, 0xD8ED,
00849     0x731C, 0xE3C4, 0x731D, 0xF0F1, 0x7325, 0xE8E5, 0x7329, 0xE0FA,
00850     0x732A, 0xEEC4, 0x732B, 0xD9DE, 0x7336, 0xEBA2, 0x7337, 0xEBA3,
00851     0x733E, 0xFCC2, 0x733F, 0xEABB, 0x7344, 0xE8AB, 0x7345, 0xDEE2,
00852     0x7350, 0xEDEF, 0x7352, 0xE8A3, 0x7357, 0xCFF1, 0x7368, 0xD4BC,
00853     0x736A, 0xFCEA, 0x7370, 0xE7BE, 0x7372, 0xFCF2, 0x7375, 0xD6B4,
00854     0x7378, 0xE2AE, 0x737A, 0xD3B7, 0x737B, 0xFACC, 0x7384, 0xFADC,
00855     0x7386, 0xEDB5, 0x7387, 0xE1E3, 0x7389, 0xE8AC, 0x738B, 0xE8DD,
00856     0x738E, 0xEFE9, 0x7394, 0xF4BD, 0x7396, 0xCFB8, 0x7397, 0xE9DB,
00857     0x7398, 0xD1AC, 0x739F, 0xDAC7, 0x73A7, 0xEBC9, 0x73A9, 0xE8CC,
00858     0x73AD, 0xDEB7, 0x73B2, 0xD6BC, 0x73B3, 0xD3E5, 0x73B9, 0xFADD,
00859     0x73C0, 0xDAD6, 0x73C2, 0xCAB1, 0x73C9, 0xDAC8, 0x73CA, 0xDFA6,
00860     0x73CC, 0xF9B3, 0x73CD, 0xF2D2, 0x73CF, 0xCAC4, 0x73D6, 0xCECB,
00861     0x73D9, 0xCDF5, 0x73DD, 0xFDB0, 0x73DE, 0xD5A8, 0x73E0, 0xF1C1,
00862     0x73E3, 0xE2E9, 0x73E4, 0xDCCA, 0x73E5, 0xECB4, 0x73E6, 0xFAC0,
00863     0x73E9, 0xFBA8, 0x73EA, 0xD0A8, 0x73ED, 0xDAEC, 0x73F7, 0xD9EE,
00864     0x73F9, 0xE0FB, 0x73FD, 0xEFEA, 0x73FE, 0xFADE, 0x7401, 0xE0C4,
00865     0x7403, 0xCFB9, 0x7405, 0xD5CA, 0x7406, 0xD7E2, 0x7407, 0xE2AF,
00866     0x7409, 0xD7B8, 0x7413, 0xE8CD, 0x741B, 0xF6DA, 0x7420, 0xEFA2,
00867     0x7421, 0xE2DA, 0x7422, 0xF6FC, 0x7425, 0xFBD0, 0x7426, 0xD1AD,
00868     0x7428, 0xCDE4, 0x742A, 0xD1AE, 0x742B, 0xDCED, 0x742C, 0xE8CE,
00869     0x742E, 0xF0F9, 0x742F, 0xCEB5, 0x7430, 0xE6FC, 0x7433, 0xD7FB,
00870     0x7434, 0xD0D6, 0x7435, 0xDDF5, 0x7436, 0xF7F1, 0x7438, 0xF6FD,
00871     0x743A, 0xDBF7, 0x743F, 0xFBEA, 0x7440, 0xE9DC, 0x7441, 0xD9C1,
00872     0x7443, 0xF5F2, 0x7444, 0xE0C5, 0x744B, 0xEAD4, 0x7455, 0xF9C2,
00873     0x7457, 0xEABC, 0x7459, 0xD2C5, 0x745A, 0xFBD1, 0x745B, 0xE7C0,
00874     0x745C, 0xEBA5, 0x745E, 0xDFFA, 0x745F, 0xE3A2, 0x7460, 0xD7B9,
00875     0x7462, 0xE9C3, 0x7464, 0xE8FD, 0x7465, 0xE8AF, 0x7468, 0xF2D3,
00876     0x7469, 0xFBA9, 0x746A, 0xD8A5, 0x746F, 0xD5CB, 0x747E, 0xD0C8,
00877     0x7482, 0xD1AF, 0x7483, 0xD7E3, 0x7487, 0xE0C6, 0x7489, 0xD6A2,
00878     0x748B, 0xEDF0, 0x7498, 0xD7F3, 0x749C, 0xFCD4, 0x749E, 0xDAD7,
00879     0x749F, 0xCCDF, 0x74A1, 0xF2D4, 0x74A3, 0xD1B0, 0x74A5, 0xCCE0,
00880     0x74A7, 0xDBFD, 0x74A8, 0xF3BF, 0x74AA, 0xF0D1, 0x74B0, 0xFCBB,
00881     0x74B2, 0xE2B0, 0x74B5, 0xE6A5, 0x74B9, 0xE2DB, 0x74BD, 0xDFDE,
00882     0x74BF, 0xE0C7, 0x74C6, 0xF2EF, 0x74CA, 0xCCE1, 0x74CF, 0xD6EA,
00883     0x74D4, 0xE7C2, 0x74D8, 0xCEB6, 0x74DA, 0xF3C0, 0x74DC, 0xCDFE,
00884     0x74E0, 0xFBD2, 0x74E2, 0xF8F8, 0x74E3, 0xF7FB, 0x74E6, 0xE8BF,
00885     0x74EE, 0xE8B7, 0x74F7, 0xEDB6, 0x7501, 0xDCBA, 0x7504, 0xCCB4,
00886     0x7511, 0xF1F7, 0x7515, 0xE8B8, 0x7518, 0xCAF6, 0x751A, 0xE4A4,
00887     0x751B, 0xF4D6, 0x751F, 0xDFE6, 0x7523, 0xDFA7, 0x7525, 0xDFE7,
00888     0x7526, 0xE1C1, 0x7528, 0xE9C4, 0x752B, 0xDCCB, 0x752C, 0xE9C5,
00889     0x7530, 0xEFA3, 0x7531, 0xEBA6, 0x7532, 0xCBA3, 0x7533, 0xE3E9,
00890     0x7537, 0xD1FB, 0x7538, 0xEFA4, 0x753A, 0xEFEB, 0x7547, 0xD0B4,
00891     0x754C, 0xCDA3, 0x754F, 0xE8E6, 0x7551, 0xEFA5, 0x7553, 0xD3CC,
00892     0x7554, 0xDAED, 0x7559, 0xD7BA, 0x755B, 0xF2D5, 0x755C, 0xF5E5,
00893     0x755D, 0xD9EF, 0x7562, 0xF9B4, 0x7565, 0xD5D4, 0x7566, 0xFDCF,
00894     0x756A, 0xDBE3, 0x756F, 0xF1E1, 0x7570, 0xECB6, 0x7575, 0xFBFE,
00895     0x7576, 0xD3D7, 0x7578, 0xD1B1, 0x757A, 0xCBB1, 0x757F, 0xD1B2,
00896     0x7586, 0xCBB2, 0x7587, 0xF1C2, 0x758A, 0xF4E1, 0x758B, 0xF9B5,
00897     0x758E, 0xE1C3, 0x758F, 0xE1C2, 0x7591, 0xEBF7, 0x759D, 0xDFA8,
00898     0x75A5, 0xCBCA, 0x75AB, 0xE6B9, 0x75B1, 0xF8DE, 0x75B2, 0xF9AA,
00899     0x75B3, 0xCAF7, 0x75B5, 0xEDB7, 0x75B8, 0xD3B8, 0x75B9, 0xF2D6,
00900     0x75BC, 0xD4D9, 0x75BD, 0xEEC5, 0x75BE, 0xF2F0, 0x75C2, 0xCAB2,
00901     0x75C5, 0xDCBB, 0x75C7, 0xF1F8, 0x75CD, 0xECB7, 0x75D2, 0xE5CA,
00902     0x75D4, 0xF6C0, 0x75D5, 0xFDDD, 0x75D8, 0xD4E3, 0x75D9, 0xCCE2,
00903     0x75DB, 0xF7D4, 0x75E2, 0xD7E5, 0x75F0, 0xD3C3, 0x75F2, 0xD8A6,
00904     0x75F4, 0xF6C1, 0x75FA, 0xDDF6, 0x75FC, 0xCDC0, 0x7600, 0xE5DC,
00905     0x760D, 0xE5CB, 0x7619, 0xE1C4, 0x761F, 0xE8B0, 0x7620, 0xF4B0,
00906     0x7621, 0xF3EA, 0x7622, 0xDAEE, 0x7624, 0xD7BB, 0x7626, 0xE2B1,
00907     0x763B, 0xD7AA, 0x7642, 0xD6FB, 0x764C, 0xE4DF, 0x764E, 0xCAD6,
00908     0x7652, 0xEBA8, 0x7656, 0xDBFE, 0x7661, 0xF6C2, 0x7664, 0xEFBB,
00909     0x7669, 0xD4FD, 0x766C, 0xE0C8, 0x7670, 0xE8B9, 0x7672, 0xEFA6,
00910     0x7678, 0xCDA4, 0x767B, 0xD4F4, 0x767C, 0xDBA1, 0x767D, 0xDBDC,
00911     0x767E, 0xDBDD, 0x7684, 0xEEDC, 0x7686, 0xCBCB, 0x7687, 0xFCD5,
00912     0x768E, 0xCEEB, 0x7690, 0xCDC1, 0x7693, 0xFBD3, 0x76AE, 0xF9AB,
00913     0x76BA, 0xF5D4, 0x76BF, 0xD9A9, 0x76C2, 0xE9DD, 0x76C3, 0xDBCD,
00914     0x76C6, 0xDDCE, 0x76C8, 0xE7C3, 0x76CA, 0xECCC, 0x76D2, 0xF9EC,
00915     0x76D6, 0xCBCC, 0x76DB, 0xE0FC, 0x76DC, 0xD4A8, 0x76DE, 0xEDD3,
00916     0x76DF, 0xD8EF, 0x76E1, 0xF2D7, 0x76E3, 0xCAF8, 0x76E4, 0xDAEF,
00917     0x76E7, 0xD6D4, 0x76EE, 0xD9CD, 0x76F2, 0xD8EE, 0x76F4, 0xF2C1,
00918     0x76F8, 0xDFD3, 0x76FC, 0xDAF0, 0x76FE, 0xE2EA, 0x7701, 0xE0FD,
00919     0x7704, 0xD8F8, 0x7708, 0xF7AF, 0x7709, 0xDAB6, 0x770B, 0xCAD7,
00920     0x771E, 0xF2D8, 0x7720, 0xD8F9, 0x7729, 0xFADF, 0x7737, 0xCFEF,
00921     0x7738, 0xD9C2, 0x773A, 0xF0D2, 0x773C, 0xE4D1, 0x7740, 0xF3B7,
00922     0x774D, 0xFAE0, 0x775B, 0xEFEC, 0x7761, 0xE2B2, 0x7763, 0xD4BD,
00923     0x7766, 0xD9CE, 0x776B, 0xF4E2, 0x7779, 0xD4A9, 0x777E, 0xCDC2,
00924     0x777F, 0xE7DA, 0x778B, 0xF2D9, 0x7791, 0xD9AA, 0x779E, 0xD8BE,
00925     0x77A5, 0xDCAD, 0x77AC, 0xE2EB, 0x77AD, 0xD6FC, 0x77B0, 0xCAF9,
00926     0x77B3, 0xD4DA, 0x77BB, 0xF4D7, 0x77BC, 0xCCA1, 0x77BF, 0xCFBA,
00927     0x77D7, 0xF5B8, 0x77DB, 0xD9C3, 0x77DC, 0xD0E8, 0x77E2, 0xE3C5,
00928     0x77E3, 0xEBF8, 0x77E5, 0xF2B1, 0x77E9, 0xCFBB, 0x77ED, 0xD3AD,
00929     0x77EE, 0xE8E1, 0x77EF, 0xCEEC, 0x77F3, 0xE0B4, 0x7802, 0xDEE3,
00930     0x7812, 0xDDF7, 0x7825, 0xF2B2, 0x7826, 0xF3F6, 0x7827, 0xF6DB,
00931     0x782C, 0xD7FE, 0x7832, 0xF8DF, 0x7834, 0xF7F2, 0x7845, 0xD0A9,
00932     0x784F, 0xE6DA, 0x785D, 0xF5A6, 0x786B, 0xD7BC, 0x786C, 0xCCE3,
00933     0x786F, 0xE6DB, 0x787C, 0xDDDD, 0x7881, 0xD1B3, 0x7887, 0xEFED,
00934     0x788C, 0xD6DE, 0x788D, 0xE4F4, 0x788E, 0xE1EF, 0x7891, 0xDDF8,
00935     0x7897, 0xE8CF, 0x78A3, 0xCAE5, 0x78A7, 0xDCA1, 0x78A9, 0xE0B5,
00936     0x78BA, 0xFCAC, 0x78BB, 0xFCAD, 0x78BC, 0xD8A7, 0x78C1, 0xEDB8,
00937     0x78C5, 0xDBB6, 0x78CA, 0xD6F0, 0x78CB, 0xF3AF, 0x78CE, 0xCDA5,
00938     0x78D0, 0xDAF1, 0x78E8, 0xD8A8, 0x78EC, 0xCCE4, 0x78EF, 0xD1B4,
00939     0x78F5, 0xCAD8, 0x78FB, 0xDAF2, 0x7901, 0xF5A7, 0x790E, 0xF5A8,
00940     0x7916, 0xE6A6, 0x792A, 0xD5EC, 0x792B, 0xD5F8, 0x792C, 0xDAF3,
00941     0x793A, 0xE3C6, 0x793E, 0xDEE4, 0x7940, 0xDEE5, 0x7941, 0xD1B5,
00942     0x7947, 0xD1B6, 0x7948, 0xD1B7, 0x7949, 0xF2B3, 0x7950, 0xE9DE,
00943     0x7956, 0xF0D3, 0x7957, 0xF2B4, 0x795A, 0xF0D4, 0x795B, 0xCBE4,
00944     0x795C, 0xFBD4, 0x795D, 0xF5E6, 0x795E, 0xE3EA, 0x7960, 0xDEE6,
00945     0x7965, 0xDFD4, 0x7968, 0xF8F9, 0x796D, 0xF0AE, 0x797A, 0xD1B8,
00946     0x797F, 0xD6DF, 0x7981, 0xD0D7, 0x798D, 0xFCA1, 0x798E, 0xEFEE,
00947     0x798F, 0xDCD8, 0x7991, 0xE9DF, 0x79A6, 0xE5DD, 0x79A7, 0xFDFB,
00948     0x79AA, 0xE0C9, 0x79AE, 0xD6C9, 0x79B1, 0xD4AA, 0x79B3, 0xE5CC,
00949     0x79B9, 0xE9E0, 0x79BD, 0xD0D8, 0x79BE, 0xFCA2, 0x79BF, 0xD4BE,
00950     0x79C0, 0xE2B3, 0x79C1, 0xDEE7, 0x79C9, 0xDCBC, 0x79CA, 0xD2B6,
00951     0x79CB, 0xF5D5, 0x79D1, 0xCEA1, 0x79D2, 0xF5A9, 0x79D5, 0xDDF9,
00952     0x79D8, 0xDDFA, 0x79DF, 0xF0D5, 0x79E4, 0xF6DF, 0x79E6, 0xF2DA,
00953     0x79E7, 0xE4EB, 0x79E9, 0xF2F1, 0x79FB, 0xECB9, 0x7A00, 0xFDFC,
00954     0x7A05, 0xE1AA, 0x7A08, 0xCAD9, 0x7A0B, 0xEFEF, 0x7A0D, 0xF5AA,
00955     0x7A14, 0xECF9, 0x7A17, 0xF8AD, 0x7A19, 0xF2C2, 0x7A1A, 0xF6C3,
00956     0x7A1C, 0xD7D2, 0x7A1F, 0xF9A2, 0x7A20, 0xF0D6, 0x7A2E, 0xF0FA,
00957     0x7A31, 0xF6E0, 0x7A36, 0xE9F3, 0x7A37, 0xF2C3, 0x7A3B, 0xD4AB,
00958     0x7A3C, 0xCAB3, 0x7A3D, 0xCDA6, 0x7A3F, 0xCDC3, 0x7A40, 0xCDDA,
00959     0x7A46, 0xD9CF, 0x7A49, 0xF6C4, 0x7A4D, 0xEEDD, 0x7A4E, 0xE7C4,
00960     0x7A57, 0xE2B4, 0x7A61, 0xDFE2, 0x7A62, 0xE7DB, 0x7A69, 0xE8B1,
00961     0x7A6B, 0xFCAE, 0x7A70, 0xE5CD, 0x7A74, 0xFAEB, 0x7A76, 0xCFBC,
00962     0x7A79, 0xCFE2, 0x7A7A, 0xCDF6, 0x7A7D, 0xEFF0, 0x7A7F, 0xF4BE,
00963     0x7A81, 0xD4CD, 0x7A84, 0xF3B8, 0x7A88, 0xE9A1, 0x7A92, 0xF2F2,
00964     0x7A93, 0xF3EB, 0x7A95, 0xF0D7, 0x7A98, 0xCFD7, 0x7A9F, 0xCFDF,
00965     0x7AA9, 0xE8C0, 0x7AAA, 0xE8C1, 0x7AAE, 0xCFE3, 0x7AAF, 0xE9A2,
00966     0x7ABA, 0xD0AA, 0x7AC4, 0xF3C1, 0x7AC5, 0xD0AB, 0x7AC7, 0xD4E4,
00967     0x7ACA, 0xEFBC, 0x7ACB, 0xD8A1, 0x7AD7, 0xD9DF, 0x7AD9, 0xF3D7,
00968     0x7ADD, 0xDCBD, 0x7ADF, 0xCCE5, 0x7AE0, 0xEDF1, 0x7AE3, 0xF1E2,
00969     0x7AE5, 0xD4DB, 0x7AEA, 0xE2B5, 0x7AED, 0xCAE6, 0x7AEF, 0xD3AE,
00970     0x7AF6, 0xCCE6, 0x7AF9, 0xF1D3, 0x7AFA, 0xF5E7, 0x7AFF, 0xCADA,
00971     0x7B0F, 0xFBEE, 0x7B11, 0xE1C5, 0x7B19, 0xDFE9, 0x7B1B, 0xEEDE,
00972     0x7B1E, 0xF7C2, 0x7B20, 0xD8A2, 0x7B26, 0xDDAC, 0x7B2C, 0xF0AF,
00973     0x7B2D, 0xD6BD, 0x7B39, 0xE1AB, 0x7B46, 0xF9B6, 0x7B49, 0xD4F5,
00974     0x7B4B, 0xD0C9, 0x7B4C, 0xEFA7, 0x7B4D, 0xE2EC, 0x7B4F, 0xDBEA,
00975     0x7B50, 0xCECC, 0x7B51, 0xF5E8, 0x7B52, 0xF7D5, 0x7B54, 0xD3CD,
00976     0x7B56, 0xF3FE, 0x7B60, 0xD0B5, 0x7B6C, 0xE0FE, 0x7B6E, 0xDFFB,
00977     0x7B75, 0xE6DD, 0x7B7D, 0xE8A4, 0x7B87, 0xCBCD, 0x7B8B, 0xEFA8,
00978     0x7B8F, 0xEEB4, 0x7B94, 0xDAD8, 0x7B95, 0xD1B9, 0x7B97, 0xDFA9,
00979     0x7B9A, 0xF3B0, 0x7B9D, 0xCCC4, 0x7BA1, 0xCEB7, 0x7BAD, 0xEFA9,
00980     0x7BB1, 0xDFD5, 0x7BB4, 0xEDD7, 0x7BB8, 0xEEC6, 0x7BC0, 0xEFBD,
00981     0x7BC1, 0xFCD6, 0x7BC4, 0xDBF4, 0x7BC6, 0xEFAA, 0x7BC7, 0xF8B9,
00982     0x7BC9, 0xF5E9, 0x7BD2, 0xE3D9, 0x7BE0, 0xE1C6, 0x7BE4, 0xD4BF,
00983     0x7BE9, 0xDEE8, 0x7C07, 0xF0EA, 0x7C12, 0xF3C2, 0x7C1E, 0xD3AF,
00984     0x7C21, 0xCADB, 0x7C27, 0xFCD7, 0x7C2A, 0xEDD8, 0x7C2B, 0xE1C7,
00985     0x7C3D, 0xF4D8, 0x7C3E, 0xD6B3, 0x7C3F, 0xDDAD, 0x7C43, 0xD5BE,
00986     0x7C4C, 0xF1C3, 0x7C4D, 0xEEDF, 0x7C60, 0xD6EB, 0x7C64, 0xF4D9,
00987     0x7C6C, 0xD7E6, 0x7C73, 0xDAB7, 0x7C83, 0xDDFB, 0x7C89, 0xDDCF,
00988     0x7C92, 0xD8A3, 0x7C95, 0xDAD9, 0x7C97, 0xF0D8, 0x7C98, 0xEFC4,
00989     0x7C9F, 0xE1D8, 0x7CA5, 0xF1D4, 0x7CA7, 0xEDF2, 0x7CAE, 0xD5DB,
00990     0x7CB1, 0xD5DC, 0x7CB2, 0xF3C4, 0x7CB3, 0xCBD7, 0x7CB9, 0xE2B6,
00991     0x7CBE, 0xEFF1, 0x7CCA, 0xFBD5, 0x7CD6, 0xD3D8, 0x7CDE, 0xDDD0,
00992     0x7CDF, 0xF0D9, 0x7CE0, 0xCBB3, 0x7CE7, 0xD5DD, 0x7CFB, 0xCDA7,
00993     0x7CFE, 0xD0AC, 0x7D00, 0xD1BA, 0x7D02, 0xF1C4, 0x7D04, 0xE5B3,
00994     0x7D05, 0xFBF5, 0x7D06, 0xE9E1, 0x7D07, 0xFDE0, 0x7D08, 0xFCBC,
00995     0x7D0A, 0xDAA2, 0x7D0B, 0xDAA3, 0x7D0D, 0xD2A1, 0x7D10, 0xD2EF,
00996     0x7D14, 0xE2ED, 0x7D17, 0xDEE9, 0x7D18, 0xCEDC, 0x7D19, 0xF2B5,
00997     0x7D1A, 0xD0E4, 0x7D1B, 0xDDD1, 0x7D20, 0xE1C8, 0x7D21, 0xDBB7,
00998     0x7D22, 0xDFE3, 0x7D2B, 0xEDB9, 0x7D2C, 0xF1C5, 0x7D2E, 0xF3CF,
00999     0x7D2F, 0xD7AB, 0x7D30, 0xE1AC, 0x7D33, 0xE3EB, 0x7D35, 0xEEC7,
01000     0x7D39, 0xE1C9, 0x7D3A, 0xCAFA, 0x7D42, 0xF0FB, 0x7D43, 0xFAE1,
01001     0x7D44, 0xF0DA, 0x7D45, 0xCCE7, 0x7D46, 0xDAF4, 0x7D50, 0xCCBF,
01002     0x7D5E, 0xCEED, 0x7D61, 0xD5A9, 0x7D62, 0xFAE2, 0x7D66, 0xD0E5,
01003     0x7D68, 0xEBD6, 0x7D6A, 0xECDF, 0x7D6E, 0xDFFC, 0x7D71, 0xF7D6,
01004     0x7D72, 0xDEEA, 0x7D73, 0xCBB4, 0x7D76, 0xEFBE, 0x7D79, 0xCCB5,
01005     0x7D7F, 0xCFBD, 0x7D8E, 0xEFF2, 0x7D8F, 0xE2B7, 0x7D93, 0xCCE8,
01006     0x7D9C, 0xF0FC, 0x7DA0, 0xD6E0, 0x7DA2, 0xF1C6, 0x7DAC, 0xE2B8,
01007     0x7DAD, 0xEBAB, 0x7DB1, 0xCBB5, 0x7DB2, 0xD8D1, 0x7DB4, 0xF4CE,
01008     0x7DB5, 0xF3F7, 0x7DB8, 0xD7C6, 0x7DBA, 0xD1BB, 0x7DBB, 0xF7AA,
01009     0x7DBD, 0xEDCA, 0x7DBE, 0xD7D3, 0x7DBF, 0xD8FA, 0x7DC7, 0xF6C5,
01010     0x7DCA, 0xD1CC, 0x7DCB, 0xDDFC, 0x7DD6, 0xDFFD, 0x7DD8, 0xF9E5,
01011     0x7DDA, 0xE0CA, 0x7DDD, 0xF2FD, 0x7DDE, 0xD3B0, 0x7DE0, 0xF4F3,
01012     0x7DE1, 0xDAC9, 0x7DE3, 0xE6DE, 0x7DE8, 0xF8BA, 0x7DE9, 0xE8D0,
01013     0x7DEC, 0xD8FB, 0x7DEF, 0xEAD5, 0x7DF4, 0xD6A3, 0x7DFB, 0xF6C6,
01014     0x7E09, 0xF2DB, 0x7E0A, 0xE4FC, 0x7E15, 0xE8B2, 0x7E1B, 0xDADA,
01015     0x7E1D, 0xF2DC, 0x7E1E, 0xFBD6, 0x7E1F, 0xE9B2, 0x7E21, 0xEEAD,
01016     0x7E23, 0xFAE3, 0x7E2B, 0xDCEE, 0x7E2E, 0xF5EA, 0x7E2F, 0xE6E0,
01017     0x7E31, 0xF0FD, 0x7E37, 0xD7AC, 0x7E3D, 0xF5C5, 0x7E3E, 0xEEE0,
01018     0x7E41, 0xDBE5, 0x7E43, 0xDDDE, 0x7E46, 0xD9F0, 0x7E47, 0xE9A3,
01019     0x7E52, 0xF1F9, 0x7E54, 0xF2C4, 0x7E55, 0xE0CB, 0x7E5E, 0xE9A4,
01020     0x7E61, 0xE2B9, 0x7E69, 0xE3B1, 0x7E6A, 0xFCEB, 0x7E6B, 0xCDA8,
01021     0x7E6D, 0xCCB6, 0x7E70, 0xF0DB, 0x7E79, 0xE6BA, 0x7E7C, 0xCDA9,
01022     0x7E82, 0xF3C3, 0x7E8C, 0xE1D9, 0x7E8F, 0xEFAB, 0x7E93, 0xE7C5,
01023     0x7E96, 0xE0E9, 0x7E98, 0xF3C5, 0x7E9B, 0xD4C0, 0x7E9C, 0xD5BF,
01024     0x7F36, 0xDDAE, 0x7F38, 0xF9FC, 0x7F3A, 0xCCC0, 0x7F4C, 0xE5A2,
01025     0x7F50, 0xCEB8, 0x7F54, 0xD8D2, 0x7F55, 0xF9D6, 0x7F6A, 0xF1AA,
01026     0x7F6B, 0xCED1, 0x7F6E, 0xF6C7, 0x7F70, 0xDBEB, 0x7F72, 0xDFFE,
01027     0x7F75, 0xD8E1, 0x7F77, 0xF7F3, 0x7F79, 0xD7E7, 0x7F85, 0xD4FE,
01028     0x7F88, 0xD1BC, 0x7F8A, 0xE5CF, 0x7F8C, 0xCBB6, 0x7F8E, 0xDAB8,
01029     0x7F94, 0xCDC4, 0x7F9A, 0xD6BE, 0x7F9E, 0xE2BA, 0x7FA4, 0xCFD8,
01030     0x7FA8, 0xE0CC, 0x7FA9, 0xEBF9, 0x7FB2, 0xFDFD, 0x7FB8, 0xD7E8,
01031     0x7FB9, 0xCBD8, 0x7FBD, 0xE9E2, 0x7FC1, 0xE8BA, 0x7FC5, 0xE3C7,
01032     0x7FCA, 0xECCD, 0x7FCC, 0xECCE, 0x7FCE, 0xD6BF, 0x7FD2, 0xE3A7,
01033     0x7FD4, 0xDFD6, 0x7FD5, 0xFDE8, 0x7FDF, 0xEEE1, 0x7FE0, 0xF6A8,
01034     0x7FE1, 0xDDFD, 0x7FE9, 0xF8BB, 0x7FEB, 0xE8D1, 0x7FF0, 0xF9D7,
01035     0x7FF9, 0xCEEE, 0x7FFC, 0xECCF, 0x8000, 0xE9A5, 0x8001, 0xD6D5,
01036     0x8003, 0xCDC5, 0x8005, 0xEDBA, 0x8006, 0xD1BD, 0x8009, 0xCFBE,
01037     0x800C, 0xECBB, 0x8010, 0xD2B1, 0x8015, 0xCCE9, 0x8017, 0xD9C4,
01038     0x8018, 0xE9FC, 0x802D, 0xD1BE, 0x8033, 0xECBC, 0x8036, 0xE5AD,
01039     0x803D, 0xF7B0, 0x803F, 0xCCEA, 0x8043, 0xD3C4, 0x8046, 0xD6C0,
01040     0x804A, 0xD6FD, 0x8056, 0xE1A1, 0x8058, 0xDEBD, 0x805A, 0xF6A9,
01041     0x805E, 0xDAA4, 0x806F, 0xD6A4, 0x8070, 0xF5C6, 0x8072, 0xE1A2,
01042     0x8073, 0xE9C6, 0x8077, 0xF2C5, 0x807D, 0xF4E9, 0x807E, 0xD6EC,
01043     0x807F, 0xEBD3, 0x8084, 0xECBD, 0x8085, 0xE2DC, 0x8086, 0xDEEB,
01044     0x8087, 0xF0DC, 0x8089, 0xEBBF, 0x808B, 0xD7CE, 0x808C, 0xD1BF,
01045     0x8096, 0xF5AB, 0x809B, 0xF9FD, 0x809D, 0xCADC, 0x80A1, 0xCDC6,
01046     0x80A2, 0xF2B6, 0x80A5, 0xDDFE, 0x80A9, 0xCCB7, 0x80AA, 0xDBB8,
01047     0x80AF, 0xD0E9, 0x80B1, 0xCEDD, 0x80B2, 0xEBC0, 0x80B4, 0xFDA2,
01048     0x80BA, 0xF8CB, 0x80C3, 0xEAD6, 0x80C4, 0xF1B0, 0x80CC, 0xDBCE,
01049     0x80CE, 0xF7C3, 0x80DA, 0xDBCF, 0x80DB, 0xCBA4, 0x80DE, 0xF8E0,
01050     0x80E1, 0xFBD7, 0x80E4, 0xEBCA, 0x80E5, 0xE0A1, 0x80F1, 0xCECD,
01051     0x80F4, 0xD4DC, 0x80F8, 0xFDD8, 0x80FD, 0xD2F6, 0x8102, 0xF2B7,
01052     0x8105, 0xFAF6, 0x8106, 0xF6AA, 0x8107, 0xFAF7, 0x8108, 0xD8E6,
01053     0x810A, 0xF4B1, 0x8118, 0xE8D2, 0x811A, 0xCAC5, 0x811B, 0xCCEB,
01054     0x8123, 0xE2EE, 0x8129, 0xE2BB, 0x812B, 0xF7AD, 0x812F, 0xF8E1,
01055     0x8139, 0xF3EC, 0x813E, 0xDEA1, 0x814B, 0xE4FD, 0x814E, 0xE3EC,
01056     0x8150, 0xDDAF, 0x8151, 0xDDB0, 0x8154, 0xCBB7, 0x8155, 0xE8D3,
01057     0x8165, 0xE1A3, 0x8166, 0xD2E0, 0x816B, 0xF0FE, 0x8170, 0xE9A6,
01058     0x8171, 0xCBF2, 0x8178, 0xEDF3, 0x8179, 0xDCD9, 0x817A, 0xE0CD,
01059     0x817F, 0xF7DA, 0x8180, 0xDBB9, 0x8188, 0xCCAE, 0x818A, 0xDADB,
01060     0x818F, 0xCDC7, 0x819A, 0xDDB1, 0x819C, 0xD8AF, 0x819D, 0xE3A3,
01061     0x81A0, 0xCEEF, 0x81A3, 0xF2F3, 0x81A8, 0xF8B3, 0x81B3, 0xE0CE,
01062     0x81B5, 0xF5FD, 0x81BA, 0xEBEC, 0x81BD, 0xD3C5, 0x81BE, 0xFCEC,
01063     0x81BF, 0xD2DB, 0x81C0, 0xD4EB, 0x81C2, 0xDEA2, 0x81C6, 0xE5E6,
01064     0x81CD, 0xF0B0, 0x81D8, 0xD5C4, 0x81DF, 0xEDF4, 0x81E3, 0xE3ED,
01065     0x81E5, 0xE8C2, 0x81E7, 0xEDF5, 0x81E8, 0xD7FC, 0x81EA, 0xEDBB,
01066     0x81ED, 0xF6AB, 0x81F3, 0xF2B8, 0x81F4, 0xF6C8, 0x81FA, 0xD3E6,
01067     0x81FB, 0xF2DD, 0x81FC, 0xCFBF, 0x81FE, 0xEBAC, 0x8205, 0xCFC0,
01068     0x8207, 0xE6A8, 0x8208, 0xFDE9, 0x820A, 0xCFC1, 0x820C, 0xE0DF,
01069     0x820D, 0xDEEC, 0x8212, 0xE0A2, 0x821B, 0xF4BF, 0x821C, 0xE2EF,
01070     0x821E, 0xD9F1, 0x821F, 0xF1C7, 0x8221, 0xCBB8, 0x822A, 0xF9FE,
01071     0x822B, 0xDBBA, 0x822C, 0xDAF5, 0x8235, 0xF6EC, 0x8236, 0xDADC,
01072     0x8237, 0xFAE4, 0x8239, 0xE0CF, 0x8240, 0xDDB2, 0x8245, 0xE6A9,
01073     0x8247, 0xEFF3, 0x8259, 0xF3ED, 0x8264, 0xEBFA, 0x8266, 0xF9E6,
01074     0x826E, 0xCADD, 0x826F, 0xD5DE, 0x8271, 0xCADE, 0x8272, 0xDFE4,
01075     0x8276, 0xE6FD, 0x8278, 0xF5AC, 0x827E, 0xE4F5, 0x828B, 0xE9E3,
01076     0x828D, 0xEDCB, 0x828E, 0xCFE4, 0x8292, 0xD8D3, 0x8299, 0xDDB3,
01077     0x829A, 0xD4EC, 0x829D, 0xF2B9, 0x829F, 0xDFB7, 0x82A5, 0xCBCE,
01078     0x82A6, 0xFBD8, 0x82A9, 0xD0D9, 0x82AC, 0xDDD2, 0x82AD, 0xF7F4,
01079     0x82AE, 0xE7DC, 0x82AF, 0xE4A5, 0x82B1, 0xFCA3, 0x82B3, 0xDBBB,
01080     0x82B7, 0xF2BA, 0x82B8, 0xE9FD, 0x82B9, 0xD0CA, 0x82BB, 0xF5D6,
01081     0x82BC, 0xD9C5, 0x82BD, 0xE4B4, 0x82BF, 0xEDA7, 0x82D1, 0xEABD,
01082     0x82D2, 0xE6FE, 0x82D4, 0xF7C4, 0x82D5, 0xF5AD, 0x82D7, 0xD9E0,
01083     0x82DB, 0xCAB4, 0x82DE, 0xF8E2, 0x82DF, 0xCFC2, 0x82E1, 0xECBE,
01084     0x82E5, 0xE5B4, 0x82E6, 0xCDC8, 0x82E7, 0xEEC8, 0x82F1, 0xE7C8,
01085     0x82FD, 0xCDC9, 0x82FE, 0xF9B7, 0x8301, 0xF1E8, 0x8302, 0xD9F2,
01086     0x8303, 0xDBF5, 0x8304, 0xCAB5, 0x8305, 0xD9C6, 0x8309, 0xD8C9,
01087     0x8317, 0xD9AB, 0x8328, 0xEDBC, 0x832B, 0xD8D4, 0x832F, 0xDCDA,
01088     0x8331, 0xE2BC, 0x8334, 0xFCED, 0x8335, 0xECE0, 0x8336, 0xD2FE,
01089     0x8338, 0xE9C7, 0x8339, 0xE6AA, 0x8340, 0xE2F0, 0x8347, 0xFABB,
01090     0x8349, 0xF5AE, 0x834A, 0xFBAA, 0x834F, 0xECFB, 0x8351, 0xECBF,
01091     0x8352, 0xFCD8, 0x8373, 0xD4E5, 0x8377, 0xF9C3, 0x837B, 0xEEE2,
01092     0x8389, 0xD7E9, 0x838A, 0xEDF6, 0x838E, 0xDEED, 0x8396, 0xCCEC,
01093     0x8398, 0xE3EE, 0x839E, 0xE8D4, 0x83A2, 0xFAF8, 0x83A9, 0xDDB4,
01094     0x83AA, 0xE4B5, 0x83AB, 0xD8B0, 0x83BD, 0xD8D5, 0x83C1, 0xF4EA,
01095     0x83C5, 0xCEB9, 0x83C9, 0xD6E1, 0x83CA, 0xCFD2, 0x83CC, 0xD0B6,
01096     0x83D3, 0xCEA2, 0x83D6, 0xF3EE, 0x83DC, 0xF3F8, 0x83E9, 0xDCCC,
01097     0x83EB, 0xD0CB, 0x83EF, 0xFCA4, 0x83F0, 0xCDCA, 0x83F1, 0xD7D4,
01098     0x83F2, 0xDEA3, 0x83F4, 0xE4E0, 0x83F9, 0xEEC9, 0x83FD, 0xE2DD,
01099     0x8403, 0xF5FE, 0x8404, 0xD4AC, 0x840A, 0xD5D1, 0x840C, 0xD8F0,
01100     0x840D, 0xF8C3, 0x840E, 0xEAD7, 0x8429, 0xF5D7, 0x842C, 0xD8BF,
01101     0x8431, 0xFDC0, 0x8438, 0xEBAD, 0x843D, 0xD5AA, 0x8449, 0xE7A8,
01102     0x8457, 0xEECA, 0x845B, 0xCAE7, 0x8461, 0xF8E3, 0x8463, 0xD4DD,
01103     0x8466, 0xEAD8, 0x846B, 0xFBD9, 0x846C, 0xEDF7, 0x846F, 0xE5B5,
01104     0x8475, 0xD0AD, 0x847A, 0xF1F1, 0x8490, 0xE2BD, 0x8494, 0xE3C8,
01105     0x8499, 0xD9D5, 0x849C, 0xDFAA, 0x84A1, 0xDBBC, 0x84B2, 0xF8E4,
01106     0x84B8, 0xF1FA, 0x84BB, 0xE5B6, 0x84BC, 0xF3EF, 0x84BF, 0xFBDA,
01107     0x84C0, 0xE1E0, 0x84C2, 0xD9AC, 0x84C4, 0xF5EB, 0x84C6, 0xE0B6,
01108     0x84C9, 0xE9C8, 0x84CB, 0xCBCF, 0x84CD, 0xE3C9, 0x84D1, 0xDEEE,
01109     0x84DA, 0xE2BE, 0x84EC, 0xDCEF, 0x84EE, 0xD6A5, 0x84F4, 0xE2F1,
01110     0x84FC, 0xD6FE, 0x8511, 0xD9A1, 0x8513, 0xD8C0, 0x8514, 0xDCDB,
01111     0x8517, 0xEDBD, 0x8518, 0xDFB8, 0x851A, 0xEAA5, 0x851E, 0xD7AD,
01112     0x8521, 0xF3F9, 0x8523, 0xEDF8, 0x8525, 0xF5C7, 0x852C, 0xE1CA,
01113     0x852D, 0xEBE3, 0x852F, 0xF2DE, 0x853D, 0xF8CC, 0x853F, 0xEAD9,
01114     0x8541, 0xD3C6, 0x8543, 0xDBE6, 0x8549, 0xF5AF, 0x854E, 0xCEF0,
01115     0x8553, 0xE9FE, 0x8559, 0xFBB6, 0x8563, 0xE2F2, 0x8568, 0xCFF2,
01116     0x8569, 0xF7B9, 0x856A, 0xD9F3, 0x856D, 0xE1CB, 0x8584, 0xDADD,
01117     0x8587, 0xDAB9, 0x858F, 0xEBFB, 0x8591, 0xCBB9, 0x8594, 0xEDF9,
01118     0x859B, 0xE0E0, 0x85A6, 0xF4C0, 0x85A8, 0xFDBC, 0x85A9, 0xDFB1,
01119     0x85AA, 0xE3EF, 0x85AF, 0xE0A3, 0x85B0, 0xFDB9, 0x85BA, 0xF0B1,
01120     0x85C1, 0xCDCB, 0x85C9, 0xEDBE, 0x85CD, 0xD5C0, 0x85CE, 0xE3F0,
01121     0x85CF, 0xEDFA, 0x85D5, 0xE9E4, 0x85DC, 0xD5ED, 0x85DD, 0xE7DD,
01122     0x85E4, 0xD4F6, 0x85E5, 0xE5B7, 0x85E9, 0xDBE7, 0x85EA, 0xE2BF,
01123     0x85F7, 0xEECB, 0x85FA, 0xD7F4, 0x85FB, 0xF0DD, 0x85FF, 0xCEAB,
01124     0x8602, 0xE7DE, 0x8606, 0xD6D6, 0x8607, 0xE1CC, 0x860A, 0xE8B3,
01125     0x8616, 0xE5EE, 0x8617, 0xDCA2, 0x861A, 0xE0D0, 0x862D, 0xD5B5,
01126     0x863F, 0xD5A1, 0x864E, 0xFBDB, 0x8650, 0xF9CB, 0x8654, 0xCBF3,
01127     0x8655, 0xF4A5, 0x865B, 0xFAC8, 0x865C, 0xD6D7, 0x865E, 0xE9E5,
01128     0x865F, 0xFBDC, 0x8667, 0xFDD0, 0x8679, 0xFBF6, 0x868A, 0xDAA5,
01129     0x868C, 0xDBBD, 0x8693, 0xECE2, 0x86A3, 0xCDF7, 0x86A4, 0xF0DE,
01130     0x86A9, 0xF6C9, 0x86C7, 0xDEEF, 0x86CB, 0xD3B1, 0x86D4, 0xFCEE,
01131     0x86D9, 0xE8C3, 0x86DB, 0xF1C8, 0x86DF, 0xCEF1, 0x86E4, 0xF9ED,
01132     0x86ED, 0xF2F4, 0x86FE, 0xE4B6, 0x8700, 0xF5B9, 0x8702, 0xDCF0,
01133     0x8703, 0xE3F1, 0x8708, 0xE8A5, 0x8718, 0xF2BB, 0x871A, 0xDEA4,
01134     0x871C, 0xDACC, 0x874E, 0xCAE9, 0x8755, 0xE3DA, 0x8757, 0xFCD9,
01135     0x875F, 0xEADA, 0x8766, 0xF9C4, 0x8768, 0xE3A4, 0x8774, 0xFBDD,
01136     0x8776, 0xEFCA, 0x8778, 0xE8C4, 0x8782, 0xD5CC, 0x878D, 0xEBD7,
01137     0x879F, 0xD9AD, 0x87A2, 0xFBAB, 0x87B3, 0xD3D9, 0x87BA, 0xD5A2,
01138     0x87C4, 0xF6DE, 0x87E0, 0xDAF6, 0x87EC, 0xE0D1, 0x87EF, 0xE9A8,
01139     0x87F2, 0xF5F9, 0x87F9, 0xFAAF, 0x87FB, 0xEBFC, 0x87FE, 0xE0EA,
01140     0x8805, 0xE3B2, 0x881F, 0xD5C5, 0x8822, 0xF1E3, 0x8823, 0xD5EE,
01141     0x8831, 0xCDCC, 0x8836, 0xEDD9, 0x883B, 0xD8C1, 0x8840, 0xFAEC,
01142     0x8846, 0xF1EB, 0x884C, 0xFABC, 0x884D, 0xE6E2, 0x8852, 0xFAE5,
01143     0x8853, 0xE2FA, 0x8857, 0xCAB6, 0x8859, 0xE4B7, 0x885B, 0xEADB,
01144     0x885D, 0xF5FA, 0x8861, 0xFBAC, 0x8862, 0xCFC3, 0x8863, 0xEBFD,
01145     0x8868, 0xF8FA, 0x886B, 0xDFB9, 0x8870, 0xE1F1, 0x8872, 0xD2A4,
01146     0x8877, 0xF5FB, 0x887E, 0xD0DA, 0x887F, 0xD0DB, 0x8881, 0xEABE,
01147     0x8882, 0xD9B1, 0x8888, 0xCAB7, 0x888B, 0xD3E7, 0x888D, 0xF8E5,
01148     0x8892, 0xD3B2, 0x8896, 0xE2C0, 0x8897, 0xF2DF, 0x889E, 0xCDE5,
01149     0x88AB, 0xF9AC, 0x88B4, 0xCDCD, 0x88C1, 0xEEAE, 0x88C2, 0xD6AE,
01150     0x88CF, 0xD7EA, 0x88D4, 0xE7E0, 0x88D5, 0xEBAE, 0x88D9, 0xCFD9,
01151     0x88DC, 0xDCCD, 0x88DD, 0xEDFB, 0x88DF, 0xDEF0, 0x88E1, 0xD7EB,
01152     0x88E8, 0xDEA5, 0x88F3, 0xDFD7, 0x88F4, 0xDBD0, 0x88F5, 0xDBD1,
01153     0x88F8, 0xD5A3, 0x88FD, 0xF0B2, 0x8907, 0xDCDC, 0x8910, 0xCAE8,
01154     0x8912, 0xF8E6, 0x8913, 0xDCCE, 0x8918, 0xEADC, 0x8919, 0xDBD2,
01155     0x8925, 0xE9B3, 0x892A, 0xF7DB, 0x8936, 0xE3A8, 0x8938, 0xD7AE,
01156     0x893B, 0xE0E1, 0x8941, 0xCBBA, 0x8944, 0xE5D1, 0x895F, 0xD0DC,
01157     0x8964, 0xD5C1, 0x896A, 0xD8CA, 0x8972, 0xE3A9, 0x897F, 0xE0A4,
01158     0x8981, 0xE9A9, 0x8983, 0xD3C7, 0x8986, 0xDCDD, 0x8987, 0xF8AE,
01159     0x898B, 0xCCB8, 0x898F, 0xD0AE, 0x8993, 0xD8F2, 0x8996, 0xE3CA,
01160     0x89A1, 0xCCAF, 0x89A9, 0xD4AD, 0x89AA, 0xF6D1, 0x89B2, 0xD0CC,
01161     0x89BA, 0xCAC6, 0x89BD, 0xD5C2, 0x89C0, 0xCEBA, 0x89D2, 0xCAC7,
01162     0x89E3, 0xFAB0, 0x89F4, 0xDFD8, 0x89F8, 0xF5BA, 0x8A00, 0xE5EB,
01163     0x8A02, 0xEFF4, 0x8A03, 0xDDB5, 0x8A08, 0xCDAA, 0x8A0A, 0xE3F2,
01164     0x8A0C, 0xFBF7, 0x8A0E, 0xF7D0, 0x8A13, 0xFDBA, 0x8A16, 0xFDE1,
01165     0x8A17, 0xF6FE, 0x8A18, 0xD1C0, 0x8A1B, 0xE8C5, 0x8A1D, 0xE4B8,
01166     0x8A1F, 0xE1E8, 0x8A23, 0xCCC1, 0x8A25, 0xD2ED, 0x8A2A, 0xDBBE,
01167     0x8A2D, 0xE0E2, 0x8A31, 0xFAC9, 0x8A34, 0xE1CD, 0x8A36, 0xCAB8,
01168     0x8A3A, 0xF2E0, 0x8A3B, 0xF1C9, 0x8A50, 0xDEF1, 0x8A54, 0xF0DF,
01169     0x8A55, 0xF8C4, 0x8A5B, 0xEECC, 0x8A5E, 0xDEF2, 0x8A60, 0xE7C9,
01170     0x8A62, 0xE2F3, 0x8A63, 0xE7E1, 0x8A66, 0xE3CB, 0x8A69, 0xE3CC,
01171     0x8A6D, 0xCFF8, 0x8A6E, 0xEFAC, 0x8A70, 0xFDFE, 0x8A71, 0xFCA5,
01172     0x8A72, 0xFAB1, 0x8A73, 0xDFD9, 0x8A75, 0xE0D2, 0x8A79, 0xF4DA,
01173     0x8A85, 0xF1CA, 0x8A87, 0xCEA3, 0x8A8C, 0xF2BC, 0x8A8D, 0xECE3,
01174     0x8A93, 0xE0A5, 0x8A95, 0xF7AB, 0x8A98, 0xEBAF, 0x8A9E, 0xE5DE,
01175     0x8AA0, 0xE1A4, 0x8AA1, 0xCDAB, 0x8AA3, 0xD9F4, 0x8AA4, 0xE8A6,
01176     0x8AA5, 0xCDCE, 0x8AA6, 0xE1E9, 0x8AA8, 0xFCEF, 0x8AAA, 0xE0E3,
01177     0x8AB0, 0xE2C1, 0x8AB2, 0xCEA4, 0x8AB9, 0xDEA6, 0x8ABC, 0xEBFE,
01178     0x8ABE, 0xEBDD, 0x8ABF, 0xF0E0, 0x8AC2, 0xF4DB, 0x8AC4, 0xE2F4,
01179     0x8AC7, 0xD3C8, 0x8ACB, 0xF4EB, 0x8ACD, 0xEEB5, 0x8ACF, 0xF5D8,
01180     0x8AD2, 0xD5DF, 0x8AD6, 0xD6E5, 0x8ADB, 0xEBB0, 0x8ADC, 0xF4E3,
01181     0x8AE1, 0xE3CD, 0x8AE6, 0xF4F4, 0x8AE7, 0xFAB2, 0x8AEA, 0xEFF5,
01182     0x8AEB, 0xCADF, 0x8AED, 0xEBB1, 0x8AEE, 0xEDBF, 0x8AF1, 0xFDC9,
01183     0x8AF6, 0xE4A6, 0x8AF7, 0xF9A4, 0x8AF8, 0xF0B3, 0x8AFA, 0xE5EC,
01184     0x8AFE, 0xD1E7, 0x8B00, 0xD9C7, 0x8B01, 0xE4D7, 0x8B02, 0xEADD,
01185     0x8B04, 0xD4F7, 0x8B0E, 0xDABA, 0x8B10, 0xDACD, 0x8B14, 0xF9CC,
01186     0x8B16, 0xE1DA, 0x8B17, 0xDBBF, 0x8B19, 0xCCC5, 0x8B1A, 0xECD0,
01187     0x8B1B, 0xCBBB, 0x8B1D, 0xDEF3, 0x8B20, 0xE9AA, 0x8B28, 0xD9C8,
01188     0x8B2B, 0xEEE3, 0x8B2C, 0xD7BD, 0x8B33, 0xCFC4, 0x8B39, 0xD0CD,
01189     0x8B41, 0xFCA6, 0x8B49, 0xF1FB, 0x8B4E, 0xFDD2, 0x8B4F, 0xD1C1,
01190     0x8B58, 0xE3DB, 0x8B5A, 0xD3C9, 0x8B5C, 0xDCCF, 0x8B66, 0xCCED,
01191     0x8B6C, 0xDEA7, 0x8B6F, 0xE6BB, 0x8B70, 0xECA1, 0x8B74, 0xCCB9,
01192     0x8B77, 0xFBDE, 0x8B7D, 0xE7E2, 0x8B80, 0xD4C1, 0x8B8A, 0xDCA8,
01193     0x8B90, 0xE2C2, 0x8B92, 0xF3D8, 0x8B93, 0xE5D3, 0x8B96, 0xF3D9,
01194     0x8B9A, 0xF3C6, 0x8C37, 0xCDDB, 0x8C3F, 0xCDAC, 0x8C41, 0xFCC3,
01195     0x8C46, 0xD4E7, 0x8C48, 0xD1C2, 0x8C4A, 0xF9A5, 0x8C4C, 0xE8D5,
01196     0x8C55, 0xE3CE, 0x8C5A, 0xD4CA, 0x8C61, 0xDFDA, 0x8C6A, 0xFBDF,
01197     0x8C6B, 0xE7E3, 0x8C79, 0xF8FB, 0x8C7A, 0xE3CF, 0x8C82, 0xF5B0,
01198     0x8C8A, 0xD8E7, 0x8C8C, 0xD9C9, 0x8C9D, 0xF8AF, 0x8C9E, 0xEFF6,
01199     0x8CA0, 0xDDB6, 0x8CA1, 0xEEAF, 0x8CA2, 0xCDF8, 0x8CA7, 0xDEB8,
01200     0x8CA8, 0xFCA7, 0x8CA9, 0xF7FC, 0x8CAA, 0xF7B1, 0x8CAB, 0xCEBB,
01201     0x8CAC, 0xF4A1, 0x8CAF, 0xEECD, 0x8CB0, 0xE1AE, 0x8CB3, 0xECC3,
01202     0x8CB4, 0xCFFE, 0x8CB6, 0xF8BF, 0x8CB7, 0xD8E2, 0x8CB8, 0xD3E8,
01203     0x8CBB, 0xDEA8, 0x8CBC, 0xF4E4, 0x8CBD, 0xECC2, 0x8CBF, 0xD9F5,
01204     0x8CC0, 0xF9C5, 0x8CC1, 0xDDD3, 0x8CC2, 0xD6F1, 0x8CC3, 0xECFC,
01205     0x8CC4, 0xFCF0, 0x8CC7, 0xEDC0, 0x8CC8, 0xCAB9, 0x8CCA, 0xEEE4,
01206     0x8CD1, 0xF2E1, 0x8CD3, 0xDEB9, 0x8CDA, 0xD6F2, 0x8CDC, 0xDEF4,
01207     0x8CDE, 0xDFDB, 0x8CE0, 0xDBD3, 0x8CE2, 0xFAE7, 0x8CE3, 0xD8E3,
01208     0x8CE4, 0xF4C1, 0x8CE6, 0xDDB7, 0x8CEA, 0xF2F5, 0x8CED, 0xD4AE,
01209     0x8CF4, 0xD6F3, 0x8CFB, 0xDDB8, 0x8CFC, 0xCFC5, 0x8CFD, 0xDFDF,
01210     0x8D04, 0xF2BE, 0x8D05, 0xF6A1, 0x8D07, 0xEBCB, 0x8D08, 0xF1FC,
01211     0x8D0A, 0xF3C7, 0x8D0D, 0xE0EB, 0x8D13, 0xEDFC, 0x8D16, 0xE1DB,
01212     0x8D64, 0xEEE5, 0x8D66, 0xDEF5, 0x8D6B, 0xFAD3, 0x8D70, 0xF1CB,
01213     0x8D73, 0xD0AF, 0x8D74, 0xDDB9, 0x8D77, 0xD1C3, 0x8D85, 0xF5B1,
01214     0x8D8A, 0xEAC6, 0x8D99, 0xF0E1, 0x8DA3, 0xF6AC, 0x8DA8, 0xF5D9,
01215     0x8DB3, 0xF0EB, 0x8DBA, 0xDDBA, 0x8DBE, 0xF2BF, 0x8DC6, 0xF7C5,
01216     0x8DCB, 0xDBA2, 0x8DCC, 0xF2F6, 0x8DCF, 0xCABA, 0x8DDB, 0xF7F5,
01217     0x8DDD, 0xCBE5, 0x8DE1, 0xEEE6, 0x8DE3, 0xE0D3, 0x8DE8, 0xCEA5,
01218     0x8DEF, 0xD6D8, 0x8DF3, 0xD4AF, 0x8E0A, 0xE9C9, 0x8E0F, 0xD3CE,
01219     0x8E10, 0xF4C2, 0x8E1E, 0xCBE6, 0x8E2A, 0xF1A1, 0x8E30, 0xEBB2,
01220     0x8E35, 0xF1A2, 0x8E42, 0xEBB3, 0x8E44, 0xF0B4, 0x8E47, 0xCBF4,
01221     0x8E48, 0xD4B0, 0x8E49, 0xF3B2, 0x8E4A, 0xFBB7, 0x8E59, 0xF5EC,
01222     0x8E5F, 0xEEE7, 0x8E60, 0xF4B2, 0x8E74, 0xF5ED, 0x8E76, 0xCFF3,
01223     0x8E81, 0xF0E2, 0x8E87, 0xEECE, 0x8E8A, 0xF1CC, 0x8E8D, 0xE5B8,
01224     0x8EAA, 0xD7F5, 0x8EAB, 0xE3F3, 0x8EAC, 0xCFE5, 0x8EC0, 0xCFC6,
01225     0x8ECA, 0xF3B3, 0x8ECB, 0xE4D8, 0x8ECC, 0xCFF9, 0x8ECD, 0xCFDA,
01226     0x8ED2, 0xFACD, 0x8EDF, 0xE6E3, 0x8EEB, 0xF2E2, 0x8EF8, 0xF5EE,
01227     0x8EFB, 0xCABB, 0x8EFE, 0xE3DC, 0x8F03, 0xCEF2, 0x8F05, 0xD6D9,
01228     0x8F09, 0xEEB0, 0x8F12, 0xF4E5, 0x8F13, 0xD8C2, 0x8F14, 0xDCD0,
01229     0x8F15, 0xCCEE, 0x8F1B, 0xD5E0, 0x8F1C, 0xF6CA, 0x8F1D, 0xFDCA,
01230     0x8F1E, 0xD8D6, 0x8F1F, 0xF4CF, 0x8F26, 0xD6A6, 0x8F27, 0xDCBE,
01231     0x8F29, 0xDBD4, 0x8F2A, 0xD7C7, 0x8F2F, 0xF2FE, 0x8F33, 0xF1CD,
01232     0x8F38, 0xE2C3, 0x8F39, 0xDCDE, 0x8F3B, 0xDCDF, 0x8F3E, 0xEFAD,
01233     0x8F3F, 0xE6AB, 0x8F44, 0xF9DD, 0x8F45, 0xEABF, 0x8F49, 0xEFAE,
01234     0x8F4D, 0xF4D0, 0x8F4E, 0xCEF3, 0x8F5D, 0xE6AC, 0x8F5F, 0xCEDE,
01235     0x8F62, 0xD5F9, 0x8F9B, 0xE3F4, 0x8F9C, 0xCDD0, 0x8FA3, 0xD5B8,
01236     0x8FA6, 0xF7FD, 0x8FA8, 0xDCA9, 0x8FAD, 0xDEF6, 0x8FAF, 0xDCAA,
01237     0x8FB0, 0xF2E3, 0x8FB1, 0xE9B4, 0x8FB2, 0xD2DC, 0x8FC2, 0xE9E6,
01238     0x8FC5, 0xE3F6, 0x8FCE, 0xE7CA, 0x8FD1, 0xD0CE, 0x8FD4, 0xDAF7,
01239     0x8FE6, 0xCABC, 0x8FEA, 0xEEE8, 0x8FEB, 0xDADE, 0x8FED, 0xF2F7,
01240     0x8FF0, 0xE2FB, 0x8FF2, 0xCCA6, 0x8FF7, 0xDABB, 0x8FF9, 0xEEE9,
01241     0x8FFD, 0xF5DA, 0x9000, 0xF7DC, 0x9001, 0xE1EA, 0x9002, 0xCEC1,
01242     0x9003, 0xD4B1, 0x9005, 0xFDB1, 0x9006, 0xE6BD, 0x9008, 0xFBAD,
01243     0x900B, 0xF8E7, 0x900D, 0xE1CE, 0x900F, 0xF7E2, 0x9010, 0xF5EF,
01244     0x9011, 0xCFC7, 0x9014, 0xD4B2, 0x9015, 0xCCEF, 0x9017, 0xD4E8,
01245     0x9019, 0xEECF, 0x901A, 0xF7D7, 0x901D, 0xE0A6, 0x901E, 0xD6C1,
01246     0x901F, 0xE1DC, 0x9020, 0xF0E3, 0x9021, 0xF1E4, 0x9022, 0xDCF1,
01247     0x9023, 0xD6A7, 0x902E, 0xF4F5, 0x9031, 0xF1CE, 0x9032, 0xF2E4,
01248     0x9035, 0xD0B0, 0x9038, 0xECEF, 0x903C, 0xF9BA, 0x903E, 0xEBB5,
01249     0x9041, 0xD4ED, 0x9042, 0xE2C4, 0x9047, 0xE9E7, 0x904A, 0xEBB4,
01250     0x904B, 0xEAA1, 0x904D, 0xF8BC, 0x904E, 0xCEA6, 0x9050, 0xF9C6,
01251     0x9051, 0xFCDA, 0x9053, 0xD4B3, 0x9054, 0xD3B9, 0x9055, 0xEADE,
01252     0x9059, 0xE9AB, 0x905C, 0xE1E1, 0x905D, 0xD3CF, 0x905E, 0xF4F6,
01253     0x9060, 0xEAC0, 0x9061, 0xE1CF, 0x9063, 0xCCBA, 0x9069, 0xEEEA,
01254     0x906D, 0xF0E4, 0x906E, 0xF3B4, 0x906F, 0xD4EE, 0x9072, 0xF2C0,
01255     0x9075, 0xF1E5, 0x9077, 0xF4C3, 0x9078, 0xE0D4, 0x907A, 0xEBB6,
01256     0x907C, 0xD7A1, 0x907D, 0xCBE8, 0x907F, 0xF9AD, 0x9080, 0xE9AD,
01257     0x9081, 0xD8E4, 0x9082, 0xFAB3, 0x9083, 0xE2C5, 0x9084, 0xFCBD,
01258     0x9087, 0xECC4, 0x9088, 0xD8B1, 0x908A, 0xDCAB, 0x908F, 0xD5A4,
01259     0x9091, 0xEBE9, 0x9095, 0xE8BB, 0x9099, 0xD8D7, 0x90A2, 0xFBAE,
01260     0x90A3, 0xD1E1, 0x90A6, 0xDBC0, 0x90A8, 0xF5BE, 0x90AA, 0xDEF7,
01261     0x90AF, 0xCAFB, 0x90B0, 0xF7C6, 0x90B1, 0xCFC8, 0x90B5, 0xE1D0,
01262     0x90B8, 0xEED0, 0x90C1, 0xE9F4, 0x90CA, 0xCEF4, 0x90DE, 0xD5CD,
01263     0x90E1, 0xCFDB, 0x90E8, 0xDDBB, 0x90ED, 0xCEAC, 0x90F5, 0xE9E8,
01264     0x90FD, 0xD4B4, 0x9102, 0xE4C7, 0x9112, 0xF5DB, 0x9115, 0xFAC1,
01265     0x9119, 0xDEA9, 0x9127, 0xD4F8, 0x912D, 0xEFF7, 0x9132, 0xD3B3,
01266     0x9149, 0xEBB7, 0x914A, 0xEFF8, 0x914B, 0xF5DC, 0x914C, 0xEDCC,
01267     0x914D, 0xDBD5, 0x914E, 0xF1CF, 0x9152, 0xF1D0, 0x9162, 0xF5B2,
01268     0x9169, 0xD9AE, 0x916A, 0xD5AC, 0x916C, 0xE2C6, 0x9175, 0xFDA3,
01269     0x9177, 0xFBE5, 0x9178, 0xDFAB, 0x9187, 0xE2F5, 0x9189, 0xF6AD,
01270     0x918B, 0xF5B3, 0x918D, 0xF0B5, 0x9192, 0xE1A5, 0x919C, 0xF5DD,
01271     0x91AB, 0xECA2, 0x91AC, 0xEDFD, 0x91AE, 0xF5B4, 0x91AF, 0xFBB8,
01272     0x91B1, 0xDBA3, 0x91B4, 0xD6CA, 0x91B5, 0xCBD9, 0x91C0, 0xE5D4,
01273     0x91C7, 0xF3FA, 0x91C9, 0xEBB8, 0x91CB, 0xE0B7, 0x91CC, 0xD7EC,
01274     0x91CD, 0xF1EC, 0x91CE, 0xE5AF, 0x91CF, 0xD5E1, 0x91D0, 0xD7ED,
01275     0x91D1, 0xD1D1, 0x91D7, 0xE1F2, 0x91D8, 0xEFF9, 0x91DC, 0xDDBC,
01276     0x91DD, 0xF6DC, 0x91E3, 0xF0E5, 0x91E7, 0xF4C4, 0x91EA, 0xE9E9,
01277     0x91F5, 0xF3FB, 0x920D, 0xD4EF, 0x9210, 0xCCA2, 0x9211, 0xF7FE,
01278     0x9212, 0xDFBC, 0x9217, 0xEBCD, 0x921E, 0xD0B7, 0x9234, 0xD6C2,
01279     0x923A, 0xE8AD, 0x923F, 0xEFAF, 0x9240, 0xCBA5, 0x9245, 0xCBE9,
01280     0x9249, 0xFAE8, 0x9257, 0xCCC6, 0x925B, 0xE6E7, 0x925E, 0xEAC7,
01281     0x9262, 0xDBA4, 0x9264, 0xCFC9, 0x9265, 0xE2FC, 0x9266, 0xEFFA,
01282     0x9280, 0xEBDE, 0x9283, 0xF5C8, 0x9285, 0xD4DE, 0x9291, 0xE0D5,
01283     0x9293, 0xEFB0, 0x9296, 0xE2C7, 0x9298, 0xD9AF, 0x929C, 0xF9E7,
01284     0x92B3, 0xE7E5, 0x92B6, 0xCFCA, 0x92B7, 0xE1D1, 0x92B9, 0xE2C8,
01285     0x92CC, 0xEFFB, 0x92CF, 0xFAF9, 0x92D2, 0xDCF2, 0x92E4, 0xE0A7,
01286     0x92EA, 0xF8E8, 0x92F8, 0xCBEA, 0x92FC, 0xCBBC, 0x9304, 0xD6E2,
01287     0x9310, 0xF5DE, 0x9318, 0xF5DF, 0x931A, 0xEEB6, 0x931E, 0xE2F6,
01288     0x931F, 0xD3CA, 0x9320, 0xEFFC, 0x9321, 0xD1C4, 0x9322, 0xEFB1,
01289     0x9324, 0xD1C5, 0x9326, 0xD0DE, 0x9328, 0xD9E1, 0x932B, 0xE0B8,
01290     0x932E, 0xCDD1, 0x932F, 0xF3B9, 0x9348, 0xE7CC, 0x934A, 0xD6A8,
01291     0x934B, 0xCEA7, 0x934D, 0xD4B5, 0x9354, 0xE4C8, 0x935B, 0xD3B4,
01292     0x936E, 0xEBB9, 0x9375, 0xCBF5, 0x937C, 0xF6DD, 0x937E, 0xF1A3,
01293     0x938C, 0xCCC7, 0x9394, 0xE9CA, 0x9396, 0xE1F0, 0x939A, 0xF5E0,
01294     0x93A3, 0xFBAF, 0x93A7, 0xCBD1, 0x93AC, 0xFBE0, 0x93AD, 0xF2E5,
01295     0x93B0, 0xECF0, 0x93C3, 0xF0EC, 0x93D1, 0xEEEB, 0x93DE, 0xE9CB,
01296     0x93E1, 0xCCF0, 0x93E4, 0xD7AF, 0x93F6, 0xF3A1, 0x9404, 0xFCF5,
01297     0x9418, 0xF1A4, 0x9425, 0xE0D6, 0x942B, 0xEFB2, 0x9435, 0xF4D1,
01298     0x9438, 0xF7A1, 0x9444, 0xF1D1, 0x9451, 0xCAFC, 0x9452, 0xCAFD,
01299     0x945B, 0xCECE, 0x947D, 0xF3C8, 0x947F, 0xF3BA, 0x9577, 0xEDFE,
01300     0x9580, 0xDAA6, 0x9583, 0xE0EC, 0x9589, 0xF8CD, 0x958B, 0xCBD2,
01301     0x958F, 0xEBCE, 0x9591, 0xF9D8, 0x9592, 0xF9D9, 0x9593, 0xCAE0,
01302     0x9594, 0xDACA, 0x9598, 0xCBA6, 0x95A3, 0xCAC8, 0x95A4, 0xF9EE,
01303     0x95A5, 0xDBEC, 0x95A8, 0xD0B1, 0x95AD, 0xD5EF, 0x95B1, 0xE6F3,
01304     0x95BB, 0xE7A2, 0x95BC, 0xE4D9, 0x95C7, 0xE4E1, 0x95CA, 0xFCC4,
01305     0x95D4, 0xF9EF, 0x95D5, 0xCFF4, 0x95D6, 0xF7E6, 0x95DC, 0xCEBC,
01306     0x95E1, 0xF4C5, 0x95E2, 0xDCA3, 0x961C, 0xDDBD, 0x9621, 0xF4C6,
01307     0x962A, 0xF8A1, 0x962E, 0xE8D6, 0x9632, 0xDBC1, 0x963B, 0xF0E6,
01308     0x963F, 0xE4B9, 0x9640, 0xF6ED, 0x9642, 0xF9AE, 0x9644, 0xDDBE,
01309     0x964B, 0xD7B0, 0x964C, 0xD8E8, 0x964D, 0xCBBD, 0x9650, 0xF9DA,
01310     0x965B, 0xF8CE, 0x965C, 0xF9F0, 0x965D, 0xE0ED, 0x965E, 0xE3B3,
01311     0x965F, 0xF4B3, 0x9662, 0xEAC2, 0x9663, 0xF2E6, 0x9664, 0xF0B6,
01312     0x966A, 0xDBD6, 0x9670, 0xEBE4, 0x9673, 0xF2E7, 0x9675, 0xD7D5,
01313     0x9676, 0xD4B6, 0x9677, 0xF9E8, 0x9678, 0xD7C1, 0x967D, 0xE5D5,
01314     0x9685, 0xE9EA, 0x9686, 0xD7CC, 0x968A, 0xD3E9, 0x968B, 0xE2C9,
01315     0x968D, 0xFCDB, 0x968E, 0xCDAD, 0x9694, 0xCCB0, 0x9695, 0xEAA2,
01316     0x9698, 0xE4F6, 0x9699, 0xD0C0, 0x969B, 0xF0B7, 0x969C, 0xEEA1,
01317     0x96A3, 0xD7F6, 0x96A7, 0xE2CA, 0x96A8, 0xE2CB, 0x96AA, 0xFACF,
01318     0x96B1, 0xEBDF, 0x96B7, 0xD6CB, 0x96BB, 0xF4B4, 0x96C0, 0xEDCD,
01319     0x96C1, 0xE4D2, 0x96C4, 0xEAA9, 0x96C5, 0xE4BA, 0x96C6, 0xF3A2,
01320     0x96C7, 0xCDD2, 0x96C9, 0xF6CB, 0x96CB, 0xF1E6, 0x96CC, 0xEDC1,
01321     0x96CD, 0xE8BC, 0x96CE, 0xEED1, 0x96D5, 0xF0E7, 0x96D6, 0xE2CC,
01322     0x96D9, 0xE4AA, 0x96DB, 0xF5E1, 0x96DC, 0xEDDA, 0x96E2, 0xD7EE,
01323     0x96E3, 0xD1F1, 0x96E8, 0xE9EB, 0x96E9, 0xE9EC, 0x96EA, 0xE0E4,
01324     0x96EF, 0xDAA7, 0x96F0, 0xDDD4, 0x96F2, 0xEAA3, 0x96F6, 0xD6C3,
01325     0x96F7, 0xD6F4, 0x96F9, 0xDADF, 0x96FB, 0xEFB3, 0x9700, 0xE2CD,
01326     0x9706, 0xEFFD, 0x9707, 0xF2E8, 0x9711, 0xEFC5, 0x9713, 0xE7E7,
01327     0x9716, 0xD7FD, 0x9719, 0xE7CE, 0x971C, 0xDFDC, 0x971E, 0xF9C7,
01328     0x9727, 0xD9F6, 0x9730, 0xDFAC, 0x9732, 0xD6DA, 0x9739, 0xDCA4,
01329     0x973D, 0xF0B8, 0x9742, 0xD5FA, 0x9744, 0xE4F7, 0x9748, 0xD6C4,
01330     0x9751, 0xF4EC, 0x9756, 0xEFFE, 0x975C, 0xF0A1, 0x975E, 0xDEAA,
01331     0x9761, 0xDABC, 0x9762, 0xD8FC, 0x9769, 0xFAD4, 0x976D, 0xECE5,
01332     0x9774, 0xFCA8, 0x9777, 0xECE6, 0x977A, 0xD8CB, 0x978B, 0xFBB9,
01333     0x978D, 0xE4D3, 0x978F, 0xCDF9, 0x97A0, 0xCFD3, 0x97A8, 0xCAEA,
01334     0x97AB, 0xCFD4, 0x97AD, 0xF8BD, 0x97C6, 0xF4C7, 0x97CB, 0xEADF,
01335     0x97D3, 0xF9DB, 0x97DC, 0xD4B7, 0x97F3, 0xEBE5, 0x97F6, 0xE1D2,
01336     0x97FB, 0xEAA4, 0x97FF, 0xFAC2, 0x9800, 0xFBE1, 0x9801, 0xFAED,
01337     0x9802, 0xF0A2, 0x9803, 0xCCF1, 0x9805, 0xFAA3, 0x9806, 0xE2F7,
01338     0x9808, 0xE2CE, 0x980A, 0xE9F5, 0x980C, 0xE1EB, 0x9810, 0xE7E8,
01339     0x9811, 0xE8D7, 0x9812, 0xDAF8, 0x9813, 0xD4CB, 0x9817, 0xF7F6,
01340     0x9818, 0xD6C5, 0x982D, 0xD4E9, 0x9830, 0xFAFA, 0x9838, 0xCCF2,
01341     0x9839, 0xF7DD, 0x983B, 0xDEBA, 0x9846, 0xCEA8, 0x984C, 0xF0B9,
01342     0x984D, 0xE4FE, 0x984E, 0xE4C9, 0x9854, 0xE4D4, 0x9858, 0xEAC3,
01343     0x985A, 0xEFB4, 0x985E, 0xD7BE, 0x9865, 0xFBE2, 0x9867, 0xCDD3,
01344     0x986B, 0xEFB5, 0x986F, 0xFAE9, 0x98A8, 0xF9A6, 0x98AF, 0xDFBD,
01345     0x98B1, 0xF7C7, 0x98C4, 0xF8FD, 0x98C7, 0xF8FC, 0x98DB, 0xDEAB,
01346     0x98DC, 0xDBE8, 0x98DF, 0xE3DD, 0x98E1, 0xE1E2, 0x98E2, 0xD1C6,
01347     0x98ED, 0xF6D0, 0x98EE, 0xEBE6, 0x98EF, 0xDAF9, 0x98F4, 0xECC7,
01348     0x98FC, 0xDEF8, 0x98FD, 0xF8E9, 0x98FE, 0xE3DE, 0x9903, 0xCEF5,
01349     0x9909, 0xFAC3, 0x990A, 0xE5D7, 0x990C, 0xECC8, 0x9910, 0xF3C9,
01350     0x9913, 0xE4BB, 0x9918, 0xE6AE, 0x991E, 0xEFB6, 0x9920, 0xDCBF,
01351     0x9928, 0xCEBD, 0x9945, 0xD8C3, 0x9949, 0xD0CF, 0x994B, 0xCFFA,
01352     0x994C, 0xF3CA, 0x994D, 0xE0D7, 0x9951, 0xD1C7, 0x9952, 0xE9AE,
01353     0x9954, 0xE8BD, 0x9957, 0xFAC4, 0x9996, 0xE2CF, 0x9999, 0xFAC5,
01354     0x999D, 0xF9B8, 0x99A5, 0xDCE0, 0x99A8, 0xFBB0, 0x99AC, 0xD8A9,
01355     0x99AD, 0xE5DF, 0x99AE, 0xF9A7, 0x99B1, 0xF6EE, 0x99B3, 0xF6CC,
01356     0x99B4, 0xE2F8, 0x99B9, 0xECF1, 0x99C1, 0xDAE0, 0x99D0, 0xF1D2,
01357     0x99D1, 0xD2CC, 0x99D2, 0xCFCB, 0x99D5, 0xCABD, 0x99D9, 0xDDBF,
01358     0x99DD, 0xF6EF, 0x99DF, 0xDEF9, 0x99ED, 0xFAB4, 0x99F1, 0xD5AD,
01359     0x99FF, 0xF1E7, 0x9A01, 0xDEBE, 0x9A08, 0xDCC0, 0x9A0E, 0xD1C8,
01360     0x9A0F, 0xD1C9, 0x9A19, 0xF8BE, 0x9A2B, 0xCBF6, 0x9A30, 0xD4F9,
01361     0x9A36, 0xF5E2, 0x9A37, 0xE1D3, 0x9A40, 0xD8E9, 0x9A43, 0xF8FE,
01362     0x9A45, 0xCFCC, 0x9A4D, 0xFDA4, 0x9A55, 0xCEF6, 0x9A57, 0xFAD0,
01363     0x9A5A, 0xCCF3, 0x9A5B, 0xE6BE, 0x9A5F, 0xF6AE, 0x9A62, 0xD5F0,
01364     0x9A65, 0xD1CA, 0x9A69, 0xFCBE, 0x9A6A, 0xD5F1, 0x9AA8, 0xCDE9,
01365     0x9AB8, 0xFAB5, 0x9AD3, 0xE2D0, 0x9AD4, 0xF4F7, 0x9AD8, 0xCDD4,
01366     0x9AE5, 0xE7A3, 0x9AEE, 0xDBA5, 0x9B1A, 0xE2D1, 0x9B27, 0xD7A2,
01367     0x9B2A, 0xF7E3, 0x9B31, 0xEAA6, 0x9B3C, 0xD0A1, 0x9B41, 0xCEDA,
01368     0x9B42, 0xFBEB, 0x9B43, 0xDBA6, 0x9B44, 0xDBDE, 0x9B45, 0xD8E5,
01369     0x9B4F, 0xEAE0, 0x9B54, 0xD8AA, 0x9B5A, 0xE5E0, 0x9B6F, 0xD6DB,
01370     0x9B8E, 0xEFC6, 0x9B91, 0xF8EA, 0x9B9F, 0xE4D5, 0x9BAB, 0xCEF7,
01371     0x9BAE, 0xE0D8, 0x9BC9, 0xD7EF, 0x9BD6, 0xF4ED, 0x9BE4, 0xCDE6,
01372     0x9BE8, 0xCCF4, 0x9C0D, 0xF5E3, 0x9C10, 0xE4CA, 0x9C12, 0xDCE1,
01373     0x9C15, 0xF9C8, 0x9C25, 0xFCBF, 0x9C32, 0xE8A7, 0x9C3B, 0xD8C4,
01374     0x9C47, 0xCBBE, 0x9C49, 0xDCAE, 0x9C57, 0xD7F7, 0x9CE5, 0xF0E8,
01375     0x9CE7, 0xDDC0, 0x9CE9, 0xCFCD, 0x9CF3, 0xDCF3, 0x9CF4, 0xD9B0,
01376     0x9CF6, 0xE6E9, 0x9D09, 0xE4BC, 0x9D1B, 0xEAC4, 0x9D26, 0xE4EC,
01377     0x9D28, 0xE4E5, 0x9D3B, 0xFBF8, 0x9D51, 0xCCBB, 0x9D5D, 0xE4BD,
01378     0x9D60, 0xCDDC, 0x9D61, 0xD9F7, 0x9D6C, 0xDDDF, 0x9D72, 0xEDCE,
01379     0x9DA9, 0xD9D0, 0x9DAF, 0xE5A3, 0x9DB4, 0xF9CD, 0x9DC4, 0xCDAE,
01380     0x9DD7, 0xCFCE, 0x9DF2, 0xF6AF, 0x9DF8, 0xFDD3, 0x9DF9, 0xEBED,
01381     0x9DFA, 0xD6DC, 0x9E1A, 0xE5A4, 0x9E1E, 0xD5B6, 0x9E75, 0xD6DD,
01382     0x9E79, 0xF9E9, 0x9E7D, 0xE7A4, 0x9E7F, 0xD6E3, 0x9E92, 0xD1CB,
01383     0x9E93, 0xD6E4, 0x9E97, 0xD5F2, 0x9E9D, 0xDEFA, 0x9E9F, 0xD7F8,
01384     0x9EA5, 0xD8EA, 0x9EB4, 0xCFD5, 0x9EB5, 0xD8FD, 0x9EBB, 0xD8AB,
01385     0x9EBE, 0xFDCB, 0x9EC3, 0xFCDC, 0x9ECD, 0xE0A8, 0x9ECE, 0xD5F3,
01386     0x9ED1, 0xFDD9, 0x9ED4, 0xCCA3, 0x9ED8, 0xD9F9, 0x9EDB, 0xD3EA,
01387     0x9EDC, 0xF5F5, 0x9EDE, 0xEFC7, 0x9EE8, 0xD3DA, 0x9EF4, 0xDABD,
01388     0x9F07, 0xE8A8, 0x9F08, 0xDCAF, 0x9F0E, 0xF0A3, 0x9F13, 0xCDD5,
01389     0x9F20, 0xE0A9, 0x9F3B, 0xDEAC, 0x9F4A, 0xF0BA, 0x9F4B, 0xEEB1,
01390     0x9F4E, 0xEEB2, 0x9F52, 0xF6CD, 0x9F5F, 0xEED2, 0x9F61, 0xD6C6,
01391     0x9F67, 0xE0E5, 0x9F6A, 0xF3BB, 0x9F6C, 0xE5E1, 0x9F77, 0xE4CB,
01392     0x9F8D, 0xD7A3, 0x9F90, 0xDBC2, 0x9F95, 0xCAFE, 0x9F9C, 0xCFCF,
01393     0xAC00, 0xB0A1, 0xAC01, 0xB0A2, 0xAC02, 0x8141, 0xAC03, 0x8142,
01394     0xAC04, 0xB0A3, 0xAC05, 0x8143, 0xAC06, 0x8144, 0xAC07, 0xB0A4,
01395     0xAC08, 0xB0A5, 0xAC09, 0xB0A6, 0xAC0A, 0xB0A7, 0xAC0B, 0x8145,
01396     0xAC0C, 0x8146, 0xAC0D, 0x8147, 0xAC0E, 0x8148, 0xAC0F, 0x8149,
01397     0xAC10, 0xB0A8, 0xAC11, 0xB0A9, 0xAC12, 0xB0AA, 0xAC13, 0xB0AB,
01398     0xAC14, 0xB0AC, 0xAC15, 0xB0AD, 0xAC16, 0xB0AE, 0xAC17, 0xB0AF,
01399     0xAC18, 0x814A, 0xAC19, 0xB0B0, 0xAC1A, 0xB0B1, 0xAC1B, 0xB0B2,
01400     0xAC1C, 0xB0B3, 0xAC1D, 0xB0B4, 0xAC1E, 0x814B, 0xAC1F, 0x814C,
01401     0xAC20, 0xB0B5, 0xAC21, 0x814D, 0xAC22, 0x814E, 0xAC23, 0x814F,
01402     0xAC24, 0xB0B6, 0xAC25, 0x8150, 0xAC26, 0x8151, 0xAC27, 0x8152,
01403     0xAC28, 0x8153, 0xAC29, 0x8154, 0xAC2A, 0x8155, 0xAC2B, 0x8156,
01404     0xAC2C, 0xB0B7, 0xAC2D, 0xB0B8, 0xAC2E, 0x8157, 0xAC2F, 0xB0B9,
01405     0xAC30, 0xB0BA, 0xAC31, 0xB0BB, 0xAC32, 0x8158, 0xAC33, 0x8159,
01406     0xAC34, 0x815A, 0xAC35, 0x8161, 0xAC36, 0x8162, 0xAC37, 0x8163,
01407     0xAC38, 0xB0BC, 0xAC39, 0xB0BD, 0xAC3A, 0x8164, 0xAC3B, 0x8165,
01408     0xAC3C, 0xB0BE, 0xAC3D, 0x8166, 0xAC3E, 0x8167, 0xAC3F, 0x8168,
01409     0xAC40, 0xB0BF, 0xAC41, 0x8169, 0xAC42, 0x816A, 0xAC43, 0x816B,
01410     0xAC44, 0x816C, 0xAC45, 0x816D, 0xAC46, 0x816E, 0xAC47, 0x816F,
01411     0xAC48, 0x8170, 0xAC49, 0x8171, 0xAC4A, 0x8172, 0xAC4B, 0xB0C0,
01412     0xAC4C, 0x8173, 0xAC4D, 0xB0C1, 0xAC4E, 0x8174, 0xAC4F, 0x8175,
01413     0xAC50, 0x8176, 0xAC51, 0x8177, 0xAC52, 0x8178, 0xAC53, 0x8179,
01414     0xAC54, 0xB0C2, 0xAC55, 0x817A, 0xAC56, 0x8181, 0xAC57, 0x8182,
01415     0xAC58, 0xB0C3, 0xAC59, 0x8183, 0xAC5A, 0x8184, 0xAC5B, 0x8185,
01416     0xAC5C, 0xB0C4, 0xAC5D, 0x8186, 0xAC5E, 0x8187, 0xAC5F, 0x8188,
01417     0xAC60, 0x8189, 0xAC61, 0x818A, 0xAC62, 0x818B, 0xAC63, 0x818C,
01418     0xAC64, 0x818D, 0xAC65, 0x818E, 0xAC66, 0x818F, 0xAC67, 0x8190,
01419     0xAC68, 0x8191, 0xAC69, 0x8192, 0xAC6A, 0x8193, 0xAC6B, 0x8194,
01420     0xAC6C, 0x8195, 0xAC6D, 0x8196, 0xAC6E, 0x8197, 0xAC6F, 0x8198,
01421     0xAC70, 0xB0C5, 0xAC71, 0xB0C6, 0xAC72, 0x8199, 0xAC73, 0x819A,
01422     0xAC74, 0xB0C7, 0xAC75, 0x819B, 0xAC76, 0x819C, 0xAC77, 0xB0C8,
01423     0xAC78, 0xB0C9, 0xAC79, 0x819D, 0xAC7A, 0xB0CA, 0xAC7B, 0x819E,
01424     0xAC7C, 0x819F, 0xAC7D, 0x81A0, 0xAC7E, 0x81A1, 0xAC7F, 0x81A2,
01425     0xAC80, 0xB0CB, 0xAC81, 0xB0CC, 0xAC82, 0x81A3, 0xAC83, 0xB0CD,
01426     0xAC84, 0xB0CE, 0xAC85, 0xB0CF, 0xAC86, 0xB0D0, 0xAC87, 0x81A4,
01427     0xAC88, 0x81A5, 0xAC89, 0xB0D1, 0xAC8A, 0xB0D2, 0xAC8B, 0xB0D3,
01428     0xAC8C, 0xB0D4, 0xAC8D, 0x81A6, 0xAC8E, 0x81A7, 0xAC8F, 0x81A8,
01429     0xAC90, 0xB0D5, 0xAC91, 0x81A9, 0xAC92, 0x81AA, 0xAC93, 0x81AB,
01430     0xAC94, 0xB0D6, 0xAC95, 0x81AC, 0xAC96, 0x81AD, 0xAC97, 0x81AE,
01431     0xAC98, 0x81AF, 0xAC99, 0x81B0, 0xAC9A, 0x81B1, 0xAC9B, 0x81B2,
01432     0xAC9C, 0xB0D7, 0xAC9D, 0xB0D8, 0xAC9E, 0x81B3, 0xAC9F, 0xB0D9,
01433     0xACA0, 0xB0DA, 0xACA1, 0xB0DB, 0xACA2, 0x81B4, 0xACA3, 0x81B5,
01434     0xACA4, 0x81B6, 0xACA5, 0x81B7, 0xACA6, 0x81B8, 0xACA7, 0x81B9,
01435     0xACA8, 0xB0DC, 0xACA9, 0xB0DD, 0xACAA, 0xB0DE, 0xACAB, 0x81BA,
01436     0xACAC, 0xB0DF, 0xACAD, 0x81BB, 0xACAE, 0x81BC, 0xACAF, 0xB0E0,
01437     0xACB0, 0xB0E1, 0xACB1, 0x81BD, 0xACB2, 0x81BE, 0xACB3, 0x81BF,
01438     0xACB4, 0x81C0, 0xACB5, 0x81C1, 0xACB6, 0x81C2, 0xACB7, 0x81C3,
01439     0xACB8, 0xB0E2, 0xACB9, 0xB0E3, 0xACBA, 0x81C4, 0xACBB, 0xB0E4,
01440     0xACBC, 0xB0E5, 0xACBD, 0xB0E6, 0xACBE, 0x81C5, 0xACBF, 0x81C6,
01441     0xACC0, 0x81C7, 0xACC1, 0xB0E7, 0xACC2, 0x81C8, 0xACC3, 0x81C9,
01442     0xACC4, 0xB0E8, 0xACC5, 0x81CA, 0xACC6, 0x81CB, 0xACC7, 0x81CC,
01443     0xACC8, 0xB0E9, 0xACC9, 0x81CD, 0xACCA, 0x81CE, 0xACCB, 0x81CF,
01444     0xACCC, 0xB0EA, 0xACCD, 0x81D0, 0xACCE, 0x81D1, 0xACCF, 0x81D2,
01445     0xACD0, 0x81D3, 0xACD1, 0x81D4, 0xACD2, 0x81D5, 0xACD3, 0x81D6,
01446     0xACD4, 0x81D7, 0xACD5, 0xB0EB, 0xACD6, 0x81D8, 0xACD7, 0xB0EC,
01447     0xACD8, 0x81D9, 0xACD9, 0x81DA, 0xACDA, 0x81DB, 0xACDB, 0x81DC,
01448     0xACDC, 0x81DD, 0xACDD, 0x81DE, 0xACDE, 0x81DF, 0xACDF, 0x81E0,
01449     0xACE0, 0xB0ED, 0xACE1, 0xB0EE, 0xACE2, 0x81E1, 0xACE3, 0x81E2,
01450     0xACE4, 0xB0EF, 0xACE5, 0x81E3, 0xACE6, 0x81E4, 0xACE7, 0xB0F0,
01451     0xACE8, 0xB0F1, 0xACE9, 0x81E5, 0xACEA, 0xB0F2, 0xACEB, 0x81E6,
01452     0xACEC, 0xB0F3, 0xACED, 0x81E7, 0xACEE, 0x81E8, 0xACEF, 0xB0F4,
01453     0xACF0, 0xB0F5, 0xACF1, 0xB0F6, 0xACF2, 0x81E9, 0xACF3, 0xB0F7,
01454     0xACF4, 0x81EA, 0xACF5, 0xB0F8, 0xACF6, 0xB0F9, 0xACF7, 0x81EB,
01455     0xACF8, 0x81EC, 0xACF9, 0x81ED, 0xACFA, 0x81EE, 0xACFB, 0x81EF,
01456     0xACFC, 0xB0FA, 0xACFD, 0xB0FB, 0xACFE, 0x81F0, 0xACFF, 0x81F1,
01457     0xAD00, 0xB0FC, 0xAD01, 0x81F2, 0xAD02, 0x81F3, 0xAD03, 0x81F4,
01458     0xAD04, 0xB0FD, 0xAD05, 0x81F5, 0xAD06, 0xB0FE, 0xAD07, 0x81F6,
01459     0xAD08, 0x81F7, 0xAD09, 0x81F8, 0xAD0A, 0x81F9, 0xAD0B, 0x81FA,
01460     0xAD0C, 0xB1A1, 0xAD0D, 0xB1A2, 0xAD0E, 0x81FB, 0xAD0F, 0xB1A3,
01461     0xAD10, 0x81FC, 0xAD11, 0xB1A4, 0xAD12, 0x81FD, 0xAD13, 0x81FE,
01462     0xAD14, 0x8241, 0xAD15, 0x8242, 0xAD16, 0x8243, 0xAD17, 0x8244,
01463     0xAD18, 0xB1A5, 0xAD19, 0x8245, 0xAD1A, 0x8246, 0xAD1B, 0x8247,
01464     0xAD1C, 0xB1A6, 0xAD1D, 0x8248, 0xAD1E, 0x8249, 0xAD1F, 0x824A,
01465     0xAD20, 0xB1A7, 0xAD21, 0x824B, 0xAD22, 0x824C, 0xAD23, 0x824D,
01466     0xAD24, 0x824E, 0xAD25, 0x824F, 0xAD26, 0x8250, 0xAD27, 0x8251,
01467     0xAD28, 0x8252, 0xAD29, 0xB1A8, 0xAD2A, 0x8253, 0xAD2B, 0x8254,
01468     0xAD2C, 0xB1A9, 0xAD2D, 0xB1AA, 0xAD2E, 0x8255, 0xAD2F, 0x8256,
01469     0xAD30, 0x8257, 0xAD31, 0x8258, 0xAD32, 0x8259, 0xAD33, 0x825A,
01470     0xAD34, 0xB1AB, 0xAD35, 0xB1AC, 0xAD36, 0x8261, 0xAD37, 0x8262,
01471     0xAD38, 0xB1AD, 0xAD39, 0x8263, 0xAD3A, 0x8264, 0xAD3B, 0x8265,
01472     0xAD3C, 0xB1AE, 0xAD3D, 0x8266, 0xAD3E, 0x8267, 0xAD3F, 0x8268,
01473     0xAD40, 0x8269, 0xAD41, 0x826A, 0xAD42, 0x826B, 0xAD43, 0x826C,
01474     0xAD44, 0xB1AF, 0xAD45, 0xB1B0, 0xAD46, 0x826D, 0xAD47, 0xB1B1,
01475     0xAD48, 0x826E, 0xAD49, 0xB1B2, 0xAD4A, 0x826F, 0xAD4B, 0x8270,
01476     0xAD4C, 0x8271, 0xAD4D, 0x8272, 0xAD4E, 0x8273, 0xAD4F, 0x8274,
01477     0xAD50, 0xB1B3, 0xAD51, 0x8275, 0xAD52, 0x8276, 0xAD53, 0x8277,
01478     0xAD54, 0xB1B4, 0xAD55, 0x8278, 0xAD56, 0x8279, 0xAD57, 0x827A,
01479     0xAD58, 0xB1B5, 0xAD59, 0x8281, 0xAD5A, 0x8282, 0xAD5B, 0x8283,
01480     0xAD5C, 0x8284, 0xAD5D, 0x8285, 0xAD5E, 0x8286, 0xAD5F, 0x8287,
01481     0xAD60, 0x8288, 0xAD61, 0xB1B6, 0xAD62, 0x8289, 0xAD63, 0xB1B7,
01482     0xAD64, 0x828A, 0xAD65, 0x828B, 0xAD66, 0x828C, 0xAD67, 0x828D,
01483     0xAD68, 0x828E, 0xAD69, 0x828F, 0xAD6A, 0x8290, 0xAD6B, 0x8291,
01484     0xAD6C, 0xB1B8, 0xAD6D, 0xB1B9, 0xAD6E, 0x8292, 0xAD6F, 0x8293,
01485     0xAD70, 0xB1BA, 0xAD71, 0x8294, 0xAD72, 0x8295, 0xAD73, 0xB1BB,
01486     0xAD74, 0xB1BC, 0xAD75, 0xB1BD, 0xAD76, 0xB1BE, 0xAD77, 0x8296,
01487     0xAD78, 0x8297, 0xAD79, 0x8298, 0xAD7A, 0x8299, 0xAD7B, 0xB1BF,
01488     0xAD7C, 0xB1C0, 0xAD7D, 0xB1C1, 0xAD7E, 0x829A, 0xAD7F, 0xB1C2,
01489     0xAD80, 0x829B, 0xAD81, 0xB1C3, 0xAD82, 0xB1C4, 0xAD83, 0x829C,
01490     0xAD84, 0x829D, 0xAD85, 0x829E, 0xAD86, 0x829F, 0xAD87, 0x82A0,
01491     0xAD88, 0xB1C5, 0xAD89, 0xB1C6, 0xAD8A, 0x82A1, 0xAD8B, 0x82A2,
01492     0xAD8C, 0xB1C7, 0xAD8D, 0x82A3, 0xAD8E, 0x82A4, 0xAD8F, 0x82A5,
01493     0xAD90, 0xB1C8, 0xAD91, 0x82A6, 0xAD92, 0x82A7, 0xAD93, 0x82A8,
01494     0xAD94, 0x82A9, 0xAD95, 0x82AA, 0xAD96, 0x82AB, 0xAD97, 0x82AC,
01495     0xAD98, 0x82AD, 0xAD99, 0x82AE, 0xAD9A, 0x82AF, 0xAD9B, 0x82B0,
01496     0xAD9C, 0xB1C9, 0xAD9D, 0xB1CA, 0xAD9E, 0x82B1, 0xAD9F, 0x82B2,
01497     0xADA0, 0x82B3, 0xADA1, 0x82B4, 0xADA2, 0x82B5, 0xADA3, 0x82B6,
01498     0xADA4, 0xB1CB, 0xADA5, 0x82B7, 0xADA6, 0x82B8, 0xADA7, 0x82B9,
01499     0xADA8, 0x82BA, 0xADA9, 0x82BB, 0xADAA, 0x82BC, 0xADAB, 0x82BD,
01500     0xADAC, 0x82BE, 0xADAD, 0x82BF, 0xADAE, 0x82C0, 0xADAF, 0x82C1,
01501     0xADB0, 0x82C2, 0xADB1, 0x82C3, 0xADB2, 0x82C4, 0xADB3, 0x82C5,
01502     0xADB4, 0x82C6, 0xADB5, 0x82C7, 0xADB6, 0x82C8, 0xADB7, 0xB1CC,
01503     0xADB8, 0x82C9, 0xADB9, 0x82CA, 0xADBA, 0x82CB, 0xADBB, 0x82CC,
01504     0xADBC, 0x82CD, 0xADBD, 0x82CE, 0xADBE, 0x82CF, 0xADBF, 0x82D0,
01505     0xADC0, 0xB1CD, 0xADC1, 0xB1CE, 0xADC2, 0x82D1, 0xADC3, 0x82D2,
01506     0xADC4, 0xB1CF, 0xADC5, 0x82D3, 0xADC6, 0x82D4, 0xADC7, 0x82D5,
01507     0xADC8, 0xB1D0, 0xADC9, 0x82D6, 0xADCA, 0x82D7, 0xADCB, 0x82D8,
01508     0xADCC, 0x82D9, 0xADCD, 0x82DA, 0xADCE, 0x82DB, 0xADCF, 0x82DC,
01509     0xADD0, 0xB1D1, 0xADD1, 0xB1D2, 0xADD2, 0x82DD, 0xADD3, 0xB1D3,
01510     0xADD4, 0x82DE, 0xADD5, 0x82DF, 0xADD6, 0x82E0, 0xADD7, 0x82E1,
01511     0xADD8, 0x82E2, 0xADD9, 0x82E3, 0xADDA, 0x82E4, 0xADDB, 0x82E5,
01512     0xADDC, 0xB1D4, 0xADDD, 0x82E6, 0xADDE, 0x82E7, 0xADDF, 0x82E8,
01513     0xADE0, 0xB1D5, 0xADE1, 0x82E9, 0xADE2, 0x82EA, 0xADE3, 0x82EB,
01514     0xADE4, 0xB1D6, 0xADE5, 0x82EC, 0xADE6, 0x82ED, 0xADE7, 0x82EE,
01515     0xADE8, 0x82EF, 0xADE9, 0x82F0, 0xADEA, 0x82F1, 0xADEB, 0x82F2,
01516     0xADEC, 0x82F3, 0xADED, 0x82F4, 0xADEE, 0x82F5, 0xADEF, 0x82F6,
01517     0xADF0, 0x82F7, 0xADF1, 0x82F8, 0xADF2, 0x82F9, 0xADF3, 0x82FA,
01518     0xADF4, 0x82FB, 0xADF5, 0x82FC, 0xADF6, 0x82FD, 0xADF7, 0x82FE,
01519     0xADF8, 0xB1D7, 0xADF9, 0xB1D8, 0xADFA, 0x8341, 0xADFB, 0x8342,
01520     0xADFC, 0xB1D9, 0xADFD, 0x8343, 0xADFE, 0x8344, 0xADFF, 0xB1DA,
01521     0xAE00, 0xB1DB, 0xAE01, 0xB1DC, 0xAE02, 0x8345, 0xAE03, 0x8346,
01522     0xAE04, 0x8347, 0xAE05, 0x8348, 0xAE06, 0x8349, 0xAE07, 0x834A,
01523     0xAE08, 0xB1DD, 0xAE09, 0xB1DE, 0xAE0A, 0x834B, 0xAE0B, 0xB1DF,
01524     0xAE0C, 0x834C, 0xAE0D, 0xB1E0, 0xAE0E, 0x834D, 0xAE0F, 0x834E,
01525     0xAE10, 0x834F, 0xAE11, 0x8350, 0xAE12, 0x8351, 0xAE13, 0x8352,
01526     0xAE14, 0xB1E1, 0xAE15, 0x8353, 0xAE16, 0x8354, 0xAE17, 0x8355,
01527     0xAE18, 0x8356, 0xAE19, 0x8357, 0xAE1A, 0x8358, 0xAE1B, 0x8359,
01528     0xAE1C, 0x835A, 0xAE1D, 0x8361, 0xAE1E, 0x8362, 0xAE1F, 0x8363,
01529     0xAE20, 0x8364, 0xAE21, 0x8365, 0xAE22, 0x8366, 0xAE23, 0x8367,
01530     0xAE24, 0x8368, 0xAE25, 0x8369, 0xAE26, 0x836A, 0xAE27, 0x836B,
01531     0xAE28, 0x836C, 0xAE29, 0x836D, 0xAE2A, 0x836E, 0xAE2B, 0x836F,
01532     0xAE2C, 0x8370, 0xAE2D, 0x8371, 0xAE2E, 0x8372, 0xAE2F, 0x8373,
01533     0xAE30, 0xB1E2, 0xAE31, 0xB1E3, 0xAE32, 0x8374, 0xAE33, 0x8375,
01534     0xAE34, 0xB1E4, 0xAE35, 0x8376, 0xAE36, 0x8377, 0xAE37, 0xB1E5,
01535     0xAE38, 0xB1E6, 0xAE39, 0x8378, 0xAE3A, 0xB1E7, 0xAE3B, 0x8379,
01536     0xAE3C, 0x837A, 0xAE3D, 0x8381, 0xAE3E, 0x8382, 0xAE3F, 0x8383,
01537     0xAE40, 0xB1E8, 0xAE41, 0xB1E9, 0xAE42, 0x8384, 0xAE43, 0xB1EA,
01538     0xAE44, 0x8385, 0xAE45, 0xB1EB, 0xAE46, 0xB1EC, 0xAE47, 0x8386,
01539     0xAE48, 0x8387, 0xAE49, 0x8388, 0xAE4A, 0xB1ED, 0xAE4B, 0x8389,
01540     0xAE4C, 0xB1EE, 0xAE4D, 0xB1EF, 0xAE4E, 0xB1F0, 0xAE4F, 0x838A,
01541     0xAE50, 0xB1F1, 0xAE51, 0x838B, 0xAE52, 0x838C, 0xAE53, 0x838D,
01542     0xAE54, 0xB1F2, 0xAE55, 0x838E, 0xAE56, 0xB1F3, 0xAE57, 0x838F,
01543     0xAE58, 0x8390, 0xAE59, 0x8391, 0xAE5A, 0x8392, 0xAE5B, 0x8393,
01544     0xAE5C, 0xB1F4, 0xAE5D, 0xB1F5, 0xAE5E, 0x8394, 0xAE5F, 0xB1F6,
01545     0xAE60, 0xB1F7, 0xAE61, 0xB1F8, 0xAE62, 0x8395, 0xAE63, 0x8396,
01546     0xAE64, 0x8397, 0xAE65, 0xB1F9, 0xAE66, 0x8398, 0xAE67, 0x8399,
01547     0xAE68, 0xB1FA, 0xAE69, 0xB1FB, 0xAE6A, 0x839A, 0xAE6B, 0x839B,
01548     0xAE6C, 0xB1FC, 0xAE6D, 0x839C, 0xAE6E, 0x839D, 0xAE6F, 0x839E,
01549     0xAE70, 0xB1FD, 0xAE71, 0x839F, 0xAE72, 0x83A0, 0xAE73, 0x83A1,
01550     0xAE74, 0x83A2, 0xAE75, 0x83A3, 0xAE76, 0x83A4, 0xAE77, 0x83A5,
01551     0xAE78, 0xB1FE, 0xAE79, 0xB2A1, 0xAE7A, 0x83A6, 0xAE7B, 0xB2A2,
01552     0xAE7C, 0xB2A3, 0xAE7D, 0xB2A4, 0xAE7E, 0x83A7, 0xAE7F, 0x83A8,
01553     0xAE80, 0x83A9, 0xAE81, 0x83AA, 0xAE82, 0x83AB, 0xAE83, 0x83AC,
01554     0xAE84, 0xB2A5, 0xAE85, 0xB2A6, 0xAE86, 0x83AD, 0xAE87, 0x83AE,
01555     0xAE88, 0x83AF, 0xAE89, 0x83B0, 0xAE8A, 0x83B1, 0xAE8B, 0x83B2,
01556     0xAE8C, 0xB2A7, 0xAE8D, 0x83B3, 0xAE8E, 0x83B4, 0xAE8F, 0x83B5,
01557     0xAE90, 0x83B6, 0xAE91, 0x83B7, 0xAE92, 0x83B8, 0xAE93, 0x83B9,
01558     0xAE94, 0x83BA, 0xAE95, 0x83BB, 0xAE96, 0x83BC, 0xAE97, 0x83BD,
01559     0xAE98, 0x83BE, 0xAE99, 0x83BF, 0xAE9A, 0x83C0, 0xAE9B, 0x83C1,
01560     0xAE9C, 0x83C2, 0xAE9D, 0x83C3, 0xAE9E, 0x83C4, 0xAE9F, 0x83C5,
01561     0xAEA0, 0x83C6, 0xAEA1, 0x83C7, 0xAEA2, 0x83C8, 0xAEA3, 0x83C9,
01562     0xAEA4, 0x83CA, 0xAEA5, 0x83CB, 0xAEA6, 0x83CC, 0xAEA7, 0x83CD,
01563     0xAEA8, 0x83CE, 0xAEA9, 0x83CF, 0xAEAA, 0x83D0, 0xAEAB, 0x83D1,
01564     0xAEAC, 0x83D2, 0xAEAD, 0x83D3, 0xAEAE, 0x83D4, 0xAEAF, 0x83D5,
01565     0xAEB0, 0x83D6, 0xAEB1, 0x83D7, 0xAEB2, 0x83D8, 0xAEB3, 0x83D9,
01566     0xAEB4, 0x83DA, 0xAEB5, 0x83DB, 0xAEB6, 0x83DC, 0xAEB7, 0x83DD,
01567     0xAEB8, 0x83DE, 0xAEB9, 0x83DF, 0xAEBA, 0x83E0, 0xAEBB, 0x83E1,
01568     0xAEBC, 0xB2A8, 0xAEBD, 0xB2A9, 0xAEBE, 0xB2AA, 0xAEBF, 0x83E2,
01569     0xAEC0, 0xB2AB, 0xAEC1, 0x83E3, 0xAEC2, 0x83E4, 0xAEC3, 0x83E5,
01570     0xAEC4, 0xB2AC, 0xAEC5, 0x83E6, 0xAEC6, 0x83E7, 0xAEC7, 0x83E8,
01571     0xAEC8, 0x83E9, 0xAEC9, 0x83EA, 0xAECA, 0x83EB, 0xAECB, 0x83EC,
01572     0xAECC, 0xB2AD, 0xAECD, 0xB2AE, 0xAECE, 0x83ED, 0xAECF, 0xB2AF,
01573     0xAED0, 0xB2B0, 0xAED1, 0xB2B1, 0xAED2, 0x83EE, 0xAED3, 0x83EF,
01574     0xAED4, 0x83F0, 0xAED5, 0x83F1, 0xAED6, 0x83F2, 0xAED7, 0x83F3,
01575     0xAED8, 0xB2B2, 0xAED9, 0xB2B3, 0xAEDA, 0x83F4, 0xAEDB, 0x83F5,
01576     0xAEDC, 0xB2B4, 0xAEDD, 0x83F6, 0xAEDE, 0x83F7, 0xAEDF, 0x83F8,
01577     0xAEE0, 0x83F9, 0xAEE1, 0x83FA, 0xAEE2, 0x83FB, 0xAEE3, 0x83FC,
01578     0xAEE4, 0x83FD, 0xAEE5, 0x83FE, 0xAEE6, 0x8441, 0xAEE7, 0x8442,
01579     0xAEE8, 0xB2B5, 0xAEE9, 0x8443, 0xAEEA, 0x8444, 0xAEEB, 0xB2B6,
01580     0xAEEC, 0x8445, 0xAEED, 0xB2B7, 0xAEEE, 0x8446, 0xAEEF, 0x8447,
01581     0xAEF0, 0x8448, 0xAEF1, 0x8449, 0xAEF2, 0x844A, 0xAEF3, 0x844B,
01582     0xAEF4, 0xB2B8, 0xAEF5, 0x844C, 0xAEF6, 0x844D, 0xAEF7, 0x844E,
01583     0xAEF8, 0xB2B9, 0xAEF9, 0x844F, 0xAEFA, 0x8450, 0xAEFB, 0x8451,
01584     0xAEFC, 0xB2BA, 0xAEFD, 0x8452, 0xAEFE, 0x8453, 0xAEFF, 0x8454,
01585     0xAF00, 0x8455, 0xAF01, 0x8456, 0xAF02, 0x8457, 0xAF03, 0x8458,
01586     0xAF04, 0x8459, 0xAF05, 0x845A, 0xAF06, 0x8461, 0xAF07, 0xB2BB,
01587     0xAF08, 0xB2BC, 0xAF09, 0x8462, 0xAF0A, 0x8463, 0xAF0B, 0x8464,
01588     0xAF0C, 0x8465, 0xAF0D, 0xB2BD, 0xAF0E, 0x8466, 0xAF0F, 0x8467,
01589     0xAF10, 0xB2BE, 0xAF11, 0x8468, 0xAF12, 0x8469, 0xAF13, 0x846A,
01590     0xAF14, 0x846B, 0xAF15, 0x846C, 0xAF16, 0x846D, 0xAF17, 0x846E,
01591     0xAF18, 0x846F, 0xAF19, 0x8470, 0xAF1A, 0x8471, 0xAF1B, 0x8472,
01592     0xAF1C, 0x8473, 0xAF1D, 0x8474, 0xAF1E, 0x8475, 0xAF1F, 0x8476,
01593     0xAF20, 0x8477, 0xAF21, 0x8478, 0xAF22, 0x8479, 0xAF23, 0x847A,
01594     0xAF24, 0x8481, 0xAF25, 0x8482, 0xAF26, 0x8483, 0xAF27, 0x8484,
01595     0xAF28, 0x8485, 0xAF29, 0x8486, 0xAF2A, 0x8487, 0xAF2B, 0x8488,
01596     0xAF2C, 0xB2BF, 0xAF2D, 0xB2C0, 0xAF2E, 0x8489, 0xAF2F, 0x848A,
01597     0xAF30, 0xB2C1, 0xAF31, 0x848B, 0xAF32, 0xB2C2, 0xAF33, 0x848C,
01598     0xAF34, 0xB2C3, 0xAF35, 0x848D, 0xAF36, 0x848E, 0xAF37, 0x848F,
01599     0xAF38, 0x8490, 0xAF39, 0x8491, 0xAF3A, 0x8492, 0xAF3B, 0x8493,
01600     0xAF3C, 0xB2C4, 0xAF3D, 0xB2C5, 0xAF3E, 0x8494, 0xAF3F, 0xB2C6,
01601     0xAF40, 0x8495, 0xAF41, 0xB2C7, 0xAF42, 0xB2C8, 0xAF43, 0xB2C9,
01602     0xAF44, 0x8496, 0xAF45, 0x8497, 0xAF46, 0x8498, 0xAF47, 0x8499,
01603     0xAF48, 0xB2CA, 0xAF49, 0xB2CB, 0xAF4A, 0x849A, 0xAF4B, 0x849B,
01604     0xAF4C, 0x849C, 0xAF4D, 0x849D, 0xAF4E, 0x849E, 0xAF4F, 0x849F,
01605     0xAF50, 0xB2CC, 0xAF51, 0x84A0, 0xAF52, 0x84A1, 0xAF53, 0x84A2,
01606     0xAF54, 0x84A3, 0xAF55, 0x84A4, 0xAF56, 0x84A5, 0xAF57, 0x84A6,
01607     0xAF58, 0x84A7, 0xAF59, 0x84A8, 0xAF5A, 0x84A9, 0xAF5B, 0x84AA,
01608     0xAF5C, 0xB2CD, 0xAF5D, 0xB2CE, 0xAF5E, 0x84AB, 0xAF5F, 0x84AC,
01609     0xAF60, 0x84AD, 0xAF61, 0x84AE, 0xAF62, 0x84AF, 0xAF63, 0x84B0,
01610     0xAF64, 0xB2CF, 0xAF65, 0xB2D0, 0xAF66, 0x84B1, 0xAF67, 0x84B2,
01611     0xAF68, 0x84B3, 0xAF69, 0x84B4, 0xAF6A, 0x84B5, 0xAF6B, 0x84B6,
01612     0xAF6C, 0x84B7, 0xAF6D, 0x84B8, 0xAF6E, 0x84B9, 0xAF6F, 0x84BA,
01613     0xAF70, 0x84BB, 0xAF71, 0x84BC, 0xAF72, 0x84BD, 0xAF73, 0x84BE,
01614     0xAF74, 0x84BF, 0xAF75, 0x84C0, 0xAF76, 0x84C1, 0xAF77, 0x84C2,
01615     0xAF78, 0x84C3, 0xAF79, 0xB2D1, 0xAF7A, 0x84C4, 0xAF7B, 0x84C5,
01616     0xAF7C, 0x84C6, 0xAF7D, 0x84C7, 0xAF7E, 0x84C8, 0xAF7F, 0x84C9,
01617     0xAF80, 0xB2D2, 0xAF81, 0x84CA, 0xAF82, 0x84CB, 0xAF83, 0x84CC,
01618     0xAF84, 0xB2D3, 0xAF85, 0x84CD, 0xAF86, 0x84CE, 0xAF87, 0x84CF,
01619     0xAF88, 0xB2D4, 0xAF89, 0x84D0, 0xAF8A, 0x84D1, 0xAF8B, 0x84D2,
01620     0xAF8C, 0x84D3, 0xAF8D, 0x84D4, 0xAF8E, 0x84D5, 0xAF8F, 0x84D6,
01621     0xAF90, 0xB2D5, 0xAF91, 0xB2D6, 0xAF92, 0x84D7, 0xAF93, 0x84D8,
01622     0xAF94, 0x84D9, 0xAF95, 0xB2D7, 0xAF96, 0x84DA, 0xAF97, 0x84DB,
01623     0xAF98, 0x84DC, 0xAF99, 0x84DD, 0xAF9A, 0x84DE, 0xAF9B, 0x84DF,
01624     0xAF9C, 0xB2D8, 0xAF9D, 0x84E0, 0xAF9E, 0x84E1, 0xAF9F, 0x84E2,
01625     0xAFA0, 0x84E3, 0xAFA1, 0x84E4, 0xAFA2, 0x84E5, 0xAFA3, 0x84E6,
01626     0xAFA4, 0x84E7, 0xAFA5, 0x84E8, 0xAFA6, 0x84E9, 0xAFA7, 0x84EA,
01627     0xAFA8, 0x84EB, 0xAFA9, 0x84EC, 0xAFAA, 0x84ED, 0xAFAB, 0x84EE,
01628     0xAFAC, 0x84EF, 0xAFAD, 0x84F0, 0xAFAE, 0x84F1, 0xAFAF, 0x84F2,
01629     0xAFB0, 0x84F3, 0xAFB1, 0x84F4, 0xAFB2, 0x84F5, 0xAFB3, 0x84F6,
01630     0xAFB4, 0x84F7, 0xAFB5, 0x84F8, 0xAFB6, 0x84F9, 0xAFB7, 0x84FA,
01631     0xAFB8, 0xB2D9, 0xAFB9, 0xB2DA, 0xAFBA, 0x84FB, 0xAFBB, 0x84FC,
01632     0xAFBC, 0xB2DB, 0xAFBD, 0x84FD, 0xAFBE, 0x84FE, 0xAFBF, 0x8541,
01633     0xAFC0, 0xB2DC, 0xAFC1, 0x8542, 0xAFC2, 0x8543, 0xAFC3, 0x8544,
01634     0xAFC4, 0x8545, 0xAFC5, 0x8546, 0xAFC6, 0x8547, 0xAFC7, 0xB2DD,
01635     0xAFC8, 0xB2DE, 0xAFC9, 0xB2DF, 0xAFCA, 0x8548, 0xAFCB, 0xB2E0,
01636     0xAFCC, 0x8549, 0xAFCD, 0xB2E1, 0xAFCE, 0xB2E2, 0xAFCF, 0x854A,
01637     0xAFD0, 0x854B, 0xAFD1, 0x854C, 0xAFD2, 0x854D, 0xAFD3, 0x854E,
01638     0xAFD4, 0xB2E3, 0xAFD5, 0x854F, 0xAFD6, 0x8550, 0xAFD7, 0x8551,
01639     0xAFD8, 0x8552, 0xAFD9, 0x8553, 0xAFDA, 0x8554, 0xAFDB, 0x8555,
01640     0xAFDC, 0xB2E4, 0xAFDD, 0x8556, 0xAFDE, 0x8557, 0xAFDF, 0x8558,
01641     0xAFE0, 0x8559, 0xAFE1, 0x855A, 0xAFE2, 0x8561, 0xAFE3, 0x8562,
01642     0xAFE4, 0x8563, 0xAFE5, 0x8564, 0xAFE6, 0x8565, 0xAFE7, 0x8566,
01643     0xAFE8, 0xB2E5, 0xAFE9, 0xB2E6, 0xAFEA, 0x8567, 0xAFEB, 0x8568,
01644     0xAFEC, 0x8569, 0xAFED, 0x856A, 0xAFEE, 0x856B, 0xAFEF, 0x856C,
01645     0xAFF0, 0xB2E7, 0xAFF1, 0xB2E8, 0xAFF2, 0x856D, 0xAFF3, 0x856E,
01646     0xAFF4, 0xB2E9, 0xAFF5, 0x856F, 0xAFF6, 0x8570, 0xAFF7, 0x8571,
01647     0xAFF8, 0xB2EA, 0xAFF9, 0x8572, 0xAFFA, 0x8573, 0xAFFB, 0x8574,
01648     0xAFFC, 0x8575, 0xAFFD, 0x8576, 0xAFFE, 0x8577, 0xAFFF, 0x8578,
01649     0xB000, 0xB2EB, 0xB001, 0xB2EC, 0xB002, 0x8579, 0xB003, 0x857A,
01650     0xB004, 0xB2ED, 0xB005, 0x8581, 0xB006, 0x8582, 0xB007, 0x8583,
01651     0xB008, 0x8584, 0xB009, 0x8585, 0xB00A, 0x8586, 0xB00B, 0x8587,
01652     0xB00C, 0xB2EE, 0xB00D, 0x8588, 0xB00E, 0x8589, 0xB00F, 0x858A,
01653     0xB010, 0xB2EF, 0xB011, 0x858B, 0xB012, 0x858C, 0xB013, 0x858D,
01654     0xB014, 0xB2F0, 0xB015, 0x858E, 0xB016, 0x858F, 0xB017, 0x8590,
01655     0xB018, 0x8591, 0xB019, 0x8592, 0xB01A, 0x8593, 0xB01B, 0x8594,
01656     0xB01C, 0xB2F1, 0xB01D, 0xB2F2, 0xB01E, 0x8595, 0xB01F, 0x8596,
01657     0xB020, 0x8597, 0xB021, 0x8598, 0xB022, 0x8599, 0xB023, 0x859A,
01658     0xB024, 0x859B, 0xB025, 0x859C, 0xB026, 0x859D, 0xB027, 0x859E,
01659     0xB028, 0xB2F3, 0xB029, 0x859F, 0xB02A, 0x85A0, 0xB02B, 0x85A1,
01660     0xB02C, 0x85A2, 0xB02D, 0x85A3, 0xB02E, 0x85A4, 0xB02F, 0x85A5,
01661     0xB030, 0x85A6, 0xB031, 0x85A7, 0xB032, 0x85A8, 0xB033, 0x85A9,
01662     0xB034, 0x85AA, 0xB035, 0x85AB, 0xB036, 0x85AC, 0xB037, 0x85AD,
01663     0xB038, 0x85AE, 0xB039, 0x85AF, 0xB03A, 0x85B0, 0xB03B, 0x85B1,
01664     0xB03C, 0x85B2, 0xB03D, 0x85B3, 0xB03E, 0x85B4, 0xB03F, 0x85B5,
01665     0xB040, 0x85B6, 0xB041, 0x85B7, 0xB042, 0x85B8, 0xB043, 0x85B9,
01666     0xB044, 0xB2F4, 0xB045, 0xB2F5, 0xB046, 0x85BA, 0xB047, 0x85BB,
01667     0xB048, 0xB2F6, 0xB049, 0x85BC, 0xB04A, 0xB2F7, 0xB04B, 0x85BD,
01668     0xB04C, 0xB2F8, 0xB04D, 0x85BE, 0xB04E, 0xB2F9, 0xB04F, 0x85BF,
01669     0xB050, 0x85C0, 0xB051, 0x85C1, 0xB052, 0x85C2, 0xB053, 0xB2FA,
01670     0xB054, 0xB2FB, 0xB055, 0xB2FC, 0xB056, 0x85C3, 0xB057, 0xB2FD,
01671     0xB058, 0x85C4, 0xB059, 0xB2FE, 0xB05A, 0x85C5, 0xB05B, 0x85C6,
01672     0xB05C, 0x85C7, 0xB05D, 0xB3A1, 0xB05E, 0x85C8, 0xB05F, 0x85C9,
01673     0xB060, 0x85CA, 0xB061, 0x85CB, 0xB062, 0x85CC, 0xB063, 0x85CD,
01674     0xB064, 0x85CE, 0xB065, 0x85CF, 0xB066, 0x85D0, 0xB067, 0x85D1,
01675     0xB068, 0x85D2, 0xB069, 0x85D3, 0xB06A, 0x85D4, 0xB06B, 0x85D5,
01676     0xB06C, 0x85D6, 0xB06D, 0x85D7, 0xB06E, 0x85D8, 0xB06F, 0x85D9,
01677     0xB070, 0x85DA, 0xB071, 0x85DB, 0xB072, 0x85DC, 0xB073, 0x85DD,
01678     0xB074, 0x85DE, 0xB075, 0x85DF, 0xB076, 0x85E0, 0xB077, 0x85E1,
01679     0xB078, 0x85E2, 0xB079, 0x85E3, 0xB07A, 0x85E4, 0xB07B, 0x85E5,
01680     0xB07C, 0xB3A2, 0xB07D, 0xB3A3, 0xB07E, 0x85E6, 0xB07F, 0x85E7,
01681     0xB080, 0xB3A4, 0xB081, 0x85E8, 0xB082, 0x85E9, 0xB083, 0x85EA,
01682     0xB084, 0xB3A5, 0xB085, 0x85EB, 0xB086, 0x85EC, 0xB087, 0x85ED,
01683     0xB088, 0x85EE, 0xB089, 0x85EF, 0xB08A, 0x85F0, 0xB08B, 0x85F1,
01684     0xB08C, 0xB3A6, 0xB08D, 0xB3A7, 0xB08E, 0x85F2, 0xB08F, 0xB3A8,
01685     0xB090, 0x85F3, 0xB091, 0xB3A9, 0xB092, 0x85F4, 0xB093, 0x85F5,
01686     0xB094, 0x85F6, 0xB095, 0x85F7, 0xB096, 0x85F8, 0xB097, 0x85F9,
01687     0xB098, 0xB3AA, 0xB099, 0xB3AB, 0xB09A, 0xB3AC, 0xB09B, 0x85FA,
01688     0xB09C, 0xB3AD, 0xB09D, 0x85FB, 0xB09E, 0x85FC, 0xB09F, 0xB3AE,
01689     0xB0A0, 0xB3AF, 0xB0A1, 0xB3B0, 0xB0A2, 0xB3B1, 0xB0A3, 0x85FD,
01690     0xB0A4, 0x85FE, 0xB0A5, 0x8641, 0xB0A6, 0x8642, 0xB0A7, 0x8643,
01691     0xB0A8, 0xB3B2, 0xB0A9, 0xB3B3, 0xB0AA, 0x8644, 0xB0AB, 0xB3B4,
01692     0xB0AC, 0xB3B5, 0xB0AD, 0xB3B6, 0xB0AE, 0xB3B7, 0xB0AF, 0xB3B8,
01693     0xB0B0, 0x8645, 0xB0B1, 0xB3B9, 0xB0B2, 0x8646, 0xB0B3, 0xB3BA,
01694     0xB0B4, 0xB3BB, 0xB0B5, 0xB3BC, 0xB0B6, 0x8647, 0xB0B7, 0x8648,
01695     0xB0B8, 0xB3BD, 0xB0B9, 0x8649, 0xB0BA, 0x864A, 0xB0BB, 0x864B,
01696     0xB0BC, 0xB3BE, 0xB0BD, 0x864C, 0xB0BE, 0x864D, 0xB0BF, 0x864E,
01697     0xB0C0, 0x864F, 0xB0C1, 0x8650, 0xB0C2, 0x8651, 0xB0C3, 0x8652,
01698     0xB0C4, 0xB3BF, 0xB0C5, 0xB3C0, 0xB0C6, 0x8653, 0xB0C7, 0xB3C1,
01699     0xB0C8, 0xB3C2, 0xB0C9, 0xB3C3, 0xB0CA, 0x8654, 0xB0CB, 0x8655,
01700     0xB0CC, 0x8656, 0xB0CD, 0x8657, 0xB0CE, 0x8658, 0xB0CF, 0x8659,
01701     0xB0D0, 0xB3C4, 0xB0D1, 0xB3C5, 0xB0D2, 0x865A, 0xB0D3, 0x8661,
01702     0xB0D4, 0xB3C6, 0xB0D5, 0x8662, 0xB0D6, 0x8663, 0xB0D7, 0x8664,
01703     0xB0D8, 0xB3C7, 0xB0D9, 0x8665, 0xB0DA, 0x8666, 0xB0DB, 0x8667,
01704     0xB0DC, 0x8668, 0xB0DD, 0x8669, 0xB0DE, 0x866A, 0xB0DF, 0x866B,
01705     0xB0E0, 0xB3C8, 0xB0E1, 0x866C, 0xB0E2, 0x866D, 0xB0E3, 0x866E,
01706     0xB0E4, 0x866F, 0xB0E5, 0xB3C9, 0xB0E6, 0x8670, 0xB0E7, 0x8671,
01707     0xB0E8, 0x8672, 0xB0E9, 0x8673, 0xB0EA, 0x8674, 0xB0EB, 0x8675,
01708     0xB0EC, 0x8676, 0xB0ED, 0x8677, 0xB0EE, 0x8678, 0xB0EF, 0x8679,
01709     0xB0F0, 0x867A, 0xB0F1, 0x8681, 0xB0F2, 0x8682, 0xB0F3, 0x8683,
01710     0xB0F4, 0x8684, 0xB0F5, 0x8685, 0xB0F6, 0x8686, 0xB0F7, 0x8687,
01711     0xB0F8, 0x8688, 0xB0F9, 0x8689, 0xB0FA, 0x868A, 0xB0FB, 0x868B,
01712     0xB0FC, 0x868C, 0xB0FD, 0x868D, 0xB0FE, 0x868E, 0xB0FF, 0x868F,
01713     0xB100, 0x8690, 0xB101, 0x8691, 0xB102, 0x8692, 0xB103, 0x8693,
01714     0xB104, 0x8694, 0xB105, 0x8695, 0xB106, 0x8696, 0xB107, 0x8697,
01715     0xB108, 0xB3CA, 0xB109, 0xB3CB, 0xB10A, 0x8698, 0xB10B, 0xB3CC,
01716     0xB10C, 0xB3CD, 0xB10D, 0x8699, 0xB10E, 0x869A, 0xB10F, 0x869B,
01717     0xB110, 0xB3CE, 0xB111, 0x869C, 0xB112, 0xB3CF, 0xB113, 0xB3D0,
01718     0xB114, 0x869D, 0xB115, 0x869E, 0xB116, 0x869F, 0xB117, 0x86A0,
01719     0xB118, 0xB3D1, 0xB119, 0xB3D2, 0xB11A, 0x86A1, 0xB11B, 0xB3D3,
01720     0xB11C, 0xB3D4, 0xB11D, 0xB3D5, 0xB11E, 0x86A2, 0xB11F, 0x86A3,
01721     0xB120, 0x86A4, 0xB121, 0x86A5, 0xB122, 0x86A6, 0xB123, 0xB3D6,
01722     0xB124, 0xB3D7, 0xB125, 0xB3D8, 0xB126, 0x86A7, 0xB127, 0x86A8,
01723     0xB128, 0xB3D9, 0xB129, 0x86A9, 0xB12A, 0x86AA, 0xB12B, 0x86AB,
01724     0xB12C, 0xB3DA, 0xB12D, 0x86AC, 0xB12E, 0x86AD, 0xB12F, 0x86AE,
01725     0xB130, 0x86AF, 0xB131, 0x86B0, 0xB132, 0x86B1, 0xB133, 0x86B2,
01726     0xB134, 0xB3DB, 0xB135, 0xB3DC, 0xB136, 0x86B3, 0xB137, 0xB3DD,
01727     0xB138, 0xB3DE, 0xB139, 0xB3DF, 0xB13A, 0x86B4, 0xB13B, 0x86B5,
01728     0xB13C, 0x86B6, 0xB13D, 0x86B7, 0xB13E, 0x86B8, 0xB13F, 0x86B9,
01729     0xB140, 0xB3E0, 0xB141, 0xB3E1, 0xB142, 0x86BA, 0xB143, 0x86BB,
01730     0xB144, 0xB3E2, 0xB145, 0x86BC, 0xB146, 0x86BD, 0xB147, 0x86BE,
01731     0xB148, 0xB3E3, 0xB149, 0x86BF, 0xB14A, 0x86C0, 0xB14B, 0x86C1,
01732     0xB14C, 0x86C2, 0xB14D, 0x86C3, 0xB14E, 0x86C4, 0xB14F, 0x86C5,
01733     0xB150, 0xB3E4, 0xB151, 0xB3E5, 0xB152, 0x86C6, 0xB153, 0x86C7,
01734     0xB154, 0xB3E6, 0xB155, 0xB3E7, 0xB156, 0x86C8, 0xB157, 0x86C9,
01735     0xB158, 0xB3E8, 0xB159, 0x86CA, 0xB15A, 0x86CB, 0xB15B, 0x86CC,
01736     0xB15C, 0xB3E9, 0xB15D, 0x86CD, 0xB15E, 0x86CE, 0xB15F, 0x86CF,
01737     0xB160, 0xB3EA, 0xB161, 0x86D0, 0xB162, 0x86D1, 0xB163, 0x86D2,
01738     0xB164, 0x86D3, 0xB165, 0x86D4, 0xB166, 0x86D5, 0xB167, 0x86D6,
01739     0xB168, 0x86D7, 0xB169, 0x86D8, 0xB16A, 0x86D9, 0xB16B, 0x86DA,
01740     0xB16C, 0x86DB, 0xB16D, 0x86DC, 0xB16E, 0x86DD, 0xB16F, 0x86DE,
01741     0xB170, 0x86DF, 0xB171, 0x86E0, 0xB172, 0x86E1, 0xB173, 0x86E2,
01742     0xB174, 0x86E3, 0xB175, 0x86E4, 0xB176, 0x86E5, 0xB177, 0x86E6,
01743     0xB178, 0xB3EB, 0xB179, 0xB3EC, 0xB17A, 0x86E7, 0xB17B, 0x86E8,
01744     0xB17C, 0xB3ED, 0xB17D, 0x86E9, 0xB17E, 0x86EA, 0xB17F, 0x86EB,
01745     0xB180, 0xB3EE, 0xB181, 0x86EC, 0xB182, 0xB3EF, 0xB183, 0x86ED,
01746     0xB184, 0x86EE, 0xB185, 0x86EF, 0xB186, 0x86F0, 0xB187, 0x86F1,
01747     0xB188, 0xB3F0, 0xB189, 0xB3F1, 0xB18A, 0x86F2, 0xB18B, 0xB3F2,
01748     0xB18C, 0x86F3, 0xB18D, 0xB3F3, 0xB18E, 0x86F4, 0xB18F, 0x86F5,
01749     0xB190, 0x86F6, 0xB191, 0x86F7, 0xB192, 0xB3F4, 0xB193, 0xB3F5,
01750     0xB194, 0xB3F6, 0xB195, 0x86F8, 0xB196, 0x86F9, 0xB197, 0x86FA,
01751     0xB198, 0xB3F7, 0xB199, 0x86FB, 0xB19A, 0x86FC, 0xB19B, 0x86FD,
01752     0xB19C, 0xB3F8, 0xB19D, 0x86FE, 0xB19E, 0x8741, 0xB19F, 0x8742,
01753     0xB1A0, 0x8743, 0xB1A1, 0x8744, 0xB1A2, 0x8745, 0xB1A3, 0x8746,
01754     0xB1A4, 0x8747, 0xB1A5, 0x8748, 0xB1A6, 0x8749, 0xB1A7, 0x874A,
01755     0xB1A8, 0xB3F9, 0xB1A9, 0x874B, 0xB1AA, 0x874C, 0xB1AB, 0x874D,
01756     0xB1AC, 0x874E, 0xB1AD, 0x874F, 0xB1AE, 0x8750, 0xB1AF, 0x8751,
01757     0xB1B0, 0x8752, 0xB1B1, 0x8753, 0xB1B2, 0x8754, 0xB1B3, 0x8755,
01758     0xB1B4, 0x8756, 0xB1B5, 0x8757, 0xB1B6, 0x8758, 0xB1B7, 0x8759,
01759     0xB1B8, 0x875A, 0xB1B9, 0x8761, 0xB1BA, 0x8762, 0xB1BB, 0x8763,
01760     0xB1BC, 0x8764, 0xB1BD, 0x8765, 0xB1BE, 0x8766, 0xB1BF, 0x8767,
01761     0xB1C0, 0x8768, 0xB1C1, 0x8769, 0xB1C2, 0x876A, 0xB1C3, 0x876B,
01762     0xB1C4, 0x876C, 0xB1C5, 0x876D, 0xB1C6, 0x876E, 0xB1C7, 0x876F,
01763     0xB1C8, 0x8770, 0xB1C9, 0x8771, 0xB1CA, 0x8772, 0xB1CB, 0x8773,
01764     0xB1CC, 0xB3FA, 0xB1CD, 0x8774, 0xB1CE, 0x8775, 0xB1CF, 0x8776,
01765     0xB1D0, 0xB3FB, 0xB1D1, 0x8777, 0xB1D2, 0x8778, 0xB1D3, 0x8779,
01766     0xB1D4, 0xB3FC, 0xB1D5, 0x877A, 0xB1D6, 0x8781, 0xB1D7, 0x8782,
01767     0xB1D8, 0x8783, 0xB1D9, 0x8784, 0xB1DA, 0x8785, 0xB1DB, 0x8786,
01768     0xB1DC, 0xB3FD, 0xB1DD, 0xB3FE, 0xB1DE, 0x8787, 0xB1DF, 0xB4A1,
01769     0xB1E0, 0x8788, 0xB1E1, 0x8789, 0xB1E2, 0x878A, 0xB1E3, 0x878B,
01770     0xB1E4, 0x878C, 0xB1E5, 0x878D, 0xB1E6, 0x878E, 0xB1E7, 0x878F,
01771     0xB1E8, 0xB4A2, 0xB1E9, 0xB4A3, 0xB1EA, 0x8790, 0xB1EB, 0x8791,
01772     0xB1EC, 0xB4A4, 0xB1ED, 0x8792, 0xB1EE, 0x8793, 0xB1EF, 0x8794,
01773     0xB1F0, 0xB4A5, 0xB1F1, 0x8795, 0xB1F2, 0x8796, 0xB1F3, 0x8797,
01774     0xB1F4, 0x8798, 0xB1F5, 0x8799, 0xB1F6, 0x879A, 0xB1F7, 0x879B,
01775     0xB1F8, 0x879C, 0xB1F9, 0xB4A6, 0xB1FA, 0x879D, 0xB1FB, 0xB4A7,
01776     0xB1FC, 0x879E, 0xB1FD, 0xB4A8, 0xB1FE, 0x879F, 0xB1FF, 0x87A0,
01777     0xB200, 0x87A1, 0xB201, 0x87A2, 0xB202, 0x87A3, 0xB203, 0x87A4,
01778     0xB204, 0xB4A9, 0xB205, 0xB4AA, 0xB206, 0x87A5, 0xB207, 0x87A6,
01779     0xB208, 0xB4AB, 0xB209, 0x87A7, 0xB20A, 0x87A8, 0xB20B, 0xB4AC,
01780     0xB20C, 0xB4AD, 0xB20D, 0x87A9, 0xB20E, 0x87AA, 0xB20F, 0x87AB,
01781     0xB210, 0x87AC, 0xB211, 0x87AD, 0xB212, 0x87AE, 0xB213, 0x87AF,
01782     0xB214, 0xB4AE, 0xB215, 0xB4AF, 0xB216, 0x87B0, 0xB217, 0xB4B0,
01783     0xB218, 0x87B1, 0xB219, 0xB4B1, 0xB21A, 0x87B2, 0xB21B, 0x87B3,
01784     0xB21C, 0x87B4, 0xB21D, 0x87B5, 0xB21E, 0x87B6, 0xB21F, 0x87B7,
01785     0xB220, 0xB4B2, 0xB221, 0x87B8, 0xB222, 0x87B9, 0xB223, 0x87BA,
01786     0xB224, 0x87BB, 0xB225, 0x87BC, 0xB226, 0x87BD, 0xB227, 0x87BE,
01787     0xB228, 0x87BF, 0xB229, 0x87C0, 0xB22A, 0x87C1, 0xB22B, 0x87C2,
01788     0xB22C, 0x87C3, 0xB22D, 0x87C4, 0xB22E, 0x87C5, 0xB22F, 0x87C6,
01789     0xB230, 0x87C7, 0xB231, 0x87C8, 0xB232, 0x87C9, 0xB233, 0x87CA,
01790     0xB234, 0xB4B3, 0xB235, 0x87CB, 0xB236, 0x87CC, 0xB237, 0x87CD,
01791     0xB238, 0x87CE, 0xB239, 0x87CF, 0xB23A, 0x87D0, 0xB23B, 0x87D1,
01792     0xB23C, 0xB4B4, 0xB23D, 0x87D2, 0xB23E, 0x87D3, 0xB23F, 0x87D4,
01793     0xB240, 0x87D5, 0xB241, 0x87D6, 0xB242, 0x87D7, 0xB243, 0x87D8,
01794     0xB244, 0x87D9, 0xB245, 0x87DA, 0xB246, 0x87DB, 0xB247, 0x87DC,
01795     0xB248, 0x87DD, 0xB249, 0x87DE, 0xB24A, 0x87DF, 0xB24B, 0x87E0,
01796     0xB24C, 0x87E1, 0xB24D, 0x87E2, 0xB24E, 0x87E3, 0xB24F, 0x87E4,
01797     0xB250, 0x87E5, 0xB251, 0x87E6, 0xB252, 0x87E7, 0xB253, 0x87E8,
01798     0xB254, 0x87E9, 0xB255, 0x87EA, 0xB256, 0x87EB, 0xB257, 0x87EC,
01799     0xB258, 0xB4B5, 0xB259, 0x87ED, 0xB25A, 0x87EE, 0xB25B, 0x87EF,
01800     0xB25C, 0xB4B6, 0xB25D, 0x87F0, 0xB25E, 0x87F1, 0xB25F, 0x87F2,
01801     0xB260, 0xB4B7, 0xB261, 0x87F3, 0xB262, 0x87F4, 0xB263, 0x87F5,
01802     0xB264, 0x87F6, 0xB265, 0x87F7, 0xB266, 0x87F8, 0xB267, 0x87F9,
01803     0xB268, 0xB4B8, 0xB269, 0xB4B9, 0xB26A, 0x87FA, 0xB26B, 0x87FB,
01804     0xB26C, 0x87FC, 0xB26D, 0x87FD, 0xB26E, 0x87FE, 0xB26F, 0x8841,
01805     0xB270, 0x8842, 0xB271, 0x8843, 0xB272, 0x8844, 0xB273, 0x8845,
01806     0xB274, 0xB4BA, 0xB275, 0xB4BB, 0xB276, 0x8846, 0xB277, 0x8847,
01807     0xB278, 0x8848, 0xB279, 0x8849, 0xB27A, 0x884A, 0xB27B, 0x884B,
01808     0xB27C, 0xB4BC, 0xB27D, 0x884C, 0xB27E, 0x884D, 0xB27F, 0x884E,
01809     0xB280, 0x884F, 0xB281, 0x8850, 0xB282, 0x8851, 0xB283, 0x8852,
01810     0xB284, 0xB4BD, 0xB285, 0xB4BE, 0xB286, 0x8853, 0xB287, 0x8854,
01811     0xB288, 0x8855, 0xB289, 0xB4BF, 0xB28A, 0x8856, 0xB28B, 0x8857,
01812     0xB28C, 0x8858, 0xB28D, 0x8859, 0xB28E, 0x885A, 0xB28F, 0x8861,
01813     0xB290, 0xB4C0, 0xB291, 0xB4C1, 0xB292, 0x8862, 0xB293, 0x8863,
01814     0xB294, 0xB4C2, 0xB295, 0x8864, 0xB296, 0x8865, 0xB297, 0x8866,
01815     0xB298, 0xB4C3, 0xB299, 0xB4C4, 0xB29A, 0xB4C5, 0xB29B, 0x8867,
01816     0xB29C, 0x8868, 0xB29D, 0x8869, 0xB29E, 0x886A, 0xB29F, 0x886B,
01817     0xB2A0, 0xB4C6, 0xB2A1, 0xB4C7, 0xB2A2, 0x886C, 0xB2A3, 0xB4C8,
01818     0xB2A4, 0x886D, 0xB2A5, 0xB4C9, 0xB2A6, 0xB4CA, 0xB2A7, 0x886E,
01819     0xB2A8, 0x886F, 0xB2A9, 0x8870, 0xB2AA, 0xB4CB, 0xB2AB, 0x8871,
01820     0xB2AC, 0xB4CC, 0xB2AD, 0x8872, 0xB2AE, 0x8873, 0xB2AF, 0x8874,
01821     0xB2B0, 0xB4CD, 0xB2B1, 0x8875, 0xB2B2, 0x8876, 0xB2B3, 0x8877,
01822     0xB2B4, 0xB4CE, 0xB2B5, 0x8878, 0xB2B6, 0x8879, 0xB2B7, 0x887A,
01823     0xB2B8, 0x8881, 0xB2B9, 0x8882, 0xB2BA, 0x8883, 0xB2BB, 0x8884,
01824     0xB2BC, 0x8885, 0xB2BD, 0x8886, 0xB2BE, 0x8887, 0xB2BF, 0x8888,
01825     0xB2C0, 0x8889, 0xB2C1, 0x888A, 0xB2C2, 0x888B, 0xB2C3, 0x888C,
01826     0xB2C4, 0x888D, 0xB2C5, 0x888E, 0xB2C6, 0x888F, 0xB2C7, 0x8890,
01827     0xB2C8, 0xB4CF, 0xB2C9, 0xB4D0, 0xB2CA, 0x8891, 0xB2CB, 0x8892,
01828     0xB2CC, 0xB4D1, 0xB2CD, 0x8893, 0xB2CE, 0x8894, 0xB2CF, 0x8895,
01829     0xB2D0, 0xB4D2, 0xB2D1, 0x8896, 0xB2D2, 0xB4D3, 0xB2D3, 0x8897,
01830     0xB2D4, 0x8898, 0xB2D5, 0x8899, 0xB2D6, 0x889A, 0xB2D7, 0x889B,
01831     0xB2D8, 0xB4D4, 0xB2D9, 0xB4D5, 0xB2DA, 0x889C, 0xB2DB, 0xB4D6,
01832     0xB2DC, 0x889D, 0xB2DD, 0xB4D7, 0xB2DE, 0x889E, 0xB2DF, 0x889F,
01833     0xB2E0, 0x88A0, 0xB2E1, 0x88A1, 0xB2E2, 0xB4D8, 0xB2E3, 0x88A2,
01834     0xB2E4, 0xB4D9, 0xB2E5, 0xB4DA, 0xB2E6, 0xB4DB, 0xB2E7, 0x88A3,
01835     0xB2E8, 0xB4DC, 0xB2E9, 0x88A4, 0xB2EA, 0x88A5, 0xB2EB, 0xB4DD,
01836     0xB2EC, 0xB4DE, 0xB2ED, 0xB4DF, 0xB2EE, 0xB4E0, 0xB2EF, 0xB4E1,
01837     0xB2F0, 0x88A6, 0xB2F1, 0x88A7, 0xB2F2, 0x88A8, 0xB2F3, 0xB4E2,
01838     0xB2F4, 0xB4E3, 0xB2F5, 0xB4E4, 0xB2F6, 0x88A9, 0xB2F7, 0xB4E5,
01839     0xB2F8, 0xB4E6, 0xB2F9, 0xB4E7, 0xB2FA, 0xB4E8, 0xB2FB, 0xB4E9,
01840     0xB2FC, 0x88AA, 0xB2FD, 0x88AB, 0xB2FE, 0x88AC, 0xB2FF, 0xB4EA,
01841     0xB300, 0xB4EB, 0xB301, 0xB4EC, 0xB302, 0x88AD, 0xB303, 0x88AE,
01842     0xB304, 0xB4ED, 0xB305, 0x88AF, 0xB306, 0x88B0, 0xB307, 0x88B1,
01843     0xB308, 0xB4EE, 0xB309, 0x88B2, 0xB30A, 0x88B3, 0xB30B, 0x88B4,
01844     0xB30C, 0x88B5, 0xB30D, 0x88B6, 0xB30E, 0x88B7, 0xB30F, 0x88B8,
01845     0xB310, 0xB4EF, 0xB311, 0xB4F0, 0xB312, 0x88B9, 0xB313, 0xB4F1,
01846     0xB314, 0xB4F2, 0xB315, 0xB4F3, 0xB316, 0x88BA, 0xB317, 0x88BB,
01847     0xB318, 0x88BC, 0xB319, 0x88BD, 0xB31A, 0x88BE, 0xB31B, 0x88BF,
01848     0xB31C, 0xB4F4, 0xB31D, 0x88C0, 0xB31E, 0x88C1, 0xB31F, 0x88C2,
01849     0xB320, 0x88C3, 0xB321, 0x88C4, 0xB322, 0x88C5, 0xB323, 0x88C6,
01850     0xB324, 0x88C7, 0xB325, 0x88C8, 0xB326, 0x88C9, 0xB327, 0x88CA,
01851     0xB328, 0x88CB, 0xB329, 0x88CC, 0xB32A, 0x88CD, 0xB32B, 0x88CE,
01852     0xB32C, 0x88CF, 0xB32D, 0x88D0, 0xB32E, 0x88D1, 0xB32F, 0x88D2,
01853     0xB330, 0x88D3, 0xB331, 0x88D4, 0xB332, 0x88D5, 0xB333, 0x88D6,
01854     0xB334, 0x88D7, 0xB335, 0x88D8, 0xB336, 0x88D9, 0xB337, 0x88DA,
01855     0xB338, 0x88DB, 0xB339, 0x88DC, 0xB33A, 0x88DD, 0xB33B, 0x88DE,
01856     0xB33C, 0x88DF, 0xB33D, 0x88E0, 0xB33E, 0x88E1, 0xB33F, 0x88E2,
01857     0xB340, 0x88E3, 0xB341, 0x88E4, 0xB342, 0x88E5, 0xB343, 0x88E6,
01858     0xB344, 0x88E7, 0xB345, 0x88E8, 0xB346, 0x88E9, 0xB347, 0x88EA,
01859     0xB348, 0x88EB, 0xB349, 0x88EC, 0xB34A, 0x88ED, 0xB34B, 0x88EE,
01860     0xB34C, 0x88EF, 0xB34D, 0x88F0, 0xB34E, 0x88F1, 0xB34F, 0x88F2,
01861     0xB350, 0x88F3, 0xB351, 0x88F4, 0xB352, 0x88F5, 0xB353, 0x88F6,
01862     0xB354, 0xB4F5, 0xB355, 0xB4F6, 0xB356, 0xB4F7, 0xB357, 0x88F7,
01863     0xB358, 0xB4F8, 0xB359, 0x88F8, 0xB35A, 0x88F9, 0xB35B, 0xB4F9,
01864     0xB35C, 0xB4FA, 0xB35D, 0x88FA, 0xB35E, 0xB4FB, 0xB35F, 0xB4FC,
01865     0xB360, 0x88FB, 0xB361, 0x88FC, 0xB362, 0x88FD, 0xB363, 0x88FE,
01866     0xB364, 0xB4FD, 0xB365, 0xB4FE, 0xB366, 0x8941, 0xB367, 0xB5A1,
01867     0xB368, 0x8942, 0xB369, 0xB5A2, 0xB36A, 0x8943, 0xB36B, 0xB5A3,
01868     0xB36C, 0x8944, 0xB36D, 0x8945, 0xB36E, 0xB5A4, 0xB36F, 0x8946,
01869     0xB370, 0xB5A5, 0xB371, 0xB5A6, 0xB372, 0x8947, 0xB373, 0x8948,
01870     0xB374, 0xB5A7, 0xB375, 0x8949, 0xB376, 0x894A, 0xB377, 0x894B,
01871     0xB378, 0xB5A8, 0xB379, 0x894C, 0xB37A, 0x894D, 0xB37B, 0x894E,
01872     0xB37C, 0x894F, 0xB37D, 0x8950, 0xB37E, 0x8951, 0xB37F, 0x8952,
01873     0xB380, 0xB5A9, 0xB381, 0xB5AA, 0xB382, 0x8953, 0xB383, 0xB5AB,
01874     0xB384, 0xB5AC, 0xB385, 0xB5AD, 0xB386, 0x8954, 0xB387, 0x8955,
01875     0xB388, 0x8956, 0xB389, 0x8957, 0xB38A, 0x8958, 0xB38B, 0x8959,
01876     0xB38C, 0xB5AE, 0xB38D, 0x895A, 0xB38E, 0x8961, 0xB38F, 0x8962,
01877     0xB390, 0xB5AF, 0xB391, 0x8963, 0xB392, 0x8964, 0xB393, 0x8965,
01878     0xB394, 0xB5B0, 0xB395, 0x8966, 0xB396, 0x8967, 0xB397, 0x8968,
01879     0xB398, 0x8969, 0xB399, 0x896A, 0xB39A, 0x896B, 0xB39B, 0x896C,
01880     0xB39C, 0x896D, 0xB39D, 0x896E, 0xB39E, 0x896F, 0xB39F, 0x8970,
01881     0xB3A0, 0xB5B1, 0xB3A1, 0xB5B2, 0xB3A2, 0x8971, 0xB3A3, 0x8972,
01882     0xB3A4, 0x8973, 0xB3A5, 0x8974, 0xB3A6, 0x8975, 0xB3A7, 0x8976,
01883     0xB3A8, 0xB5B3, 0xB3A9, 0x8977, 0xB3AA, 0x8978, 0xB3AB, 0x8979,
01884     0xB3AC, 0xB5B4, 0xB3AD, 0x897A, 0xB3AE, 0x8981, 0xB3AF, 0x8982,
01885     0xB3B0, 0x8983, 0xB3B1, 0x8984, 0xB3B2, 0x8985, 0xB3B3, 0x8986,
01886     0xB3B4, 0x8987, 0xB3B5, 0x8988, 0xB3B6, 0x8989, 0xB3B7, 0x898A,
01887     0xB3B8, 0x898B, 0xB3B9, 0x898C, 0xB3BA, 0x898D, 0xB3BB, 0x898E,
01888     0xB3BC, 0x898F, 0xB3BD, 0x8990, 0xB3BE, 0x8991, 0xB3BF, 0x8992,
01889     0xB3C0, 0x8993, 0xB3C1, 0x8994, 0xB3C2, 0x8995, 0xB3C3, 0x8996,
01890     0xB3C4, 0xB5B5, 0xB3C5, 0xB5B6, 0xB3C6, 0x8997, 0xB3C7, 0x8998,
01891     0xB3C8, 0xB5B7, 0xB3C9, 0x8999, 0xB3CA, 0x899A, 0xB3CB, 0xB5B8,
01892     0xB3CC, 0xB5B9, 0xB3CD, 0x899B, 0xB3CE, 0xB5BA, 0xB3CF, 0x899C,
01893     0xB3D0, 0xB5BB, 0xB3D1, 0x899D, 0xB3D2, 0x899E, 0xB3D3, 0x899F,
01894     0xB3D4, 0xB5BC, 0xB3D5, 0xB5BD, 0xB3D6, 0x89A0, 0xB3D7, 0xB5BE,
01895     0xB3D8, 0x89A1, 0xB3D9, 0xB5BF, 0xB3DA, 0x89A2, 0xB3DB, 0xB5C0,
01896     0xB3DC, 0x89A3, 0xB3DD, 0xB5C1, 0xB3DE, 0x89A4, 0xB3DF, 0x89A5,
01897     0xB3E0, 0xB5C2, 0xB3E1, 0x89A6, 0xB3E2, 0x89A7, 0xB3E3, 0x89A8,
01898     0xB3E4, 0xB5C3, 0xB3E5, 0x89A9, 0xB3E6, 0x89AA, 0xB3E7, 0x89AB,
01899     0xB3E8, 0xB5C4, 0xB3E9, 0x89AC, 0xB3EA, 0x89AD, 0xB3EB, 0x89AE,
01900     0xB3EC, 0x89AF, 0xB3ED, 0x89B0, 0xB3EE, 0x89B1, 0xB3EF, 0x89B2,
01901     0xB3F0, 0x89B3, 0xB3F1, 0x89B4, 0xB3F2, 0x89B5, 0xB3F3, 0x89B6,
01902     0xB3F4, 0x89B7, 0xB3F5, 0x89B8, 0xB3F6, 0x89B9, 0xB3F7, 0x89BA,
01903     0xB3F8, 0x89BB, 0xB3F9, 0x89BC, 0xB3FA, 0x89BD, 0xB3FB, 0x89BE,
01904     0xB3FC, 0xB5C5, 0xB3FD, 0x89BF, 0xB3FE, 0x89C0, 0xB3FF, 0x89C1,
01905     0xB400, 0x89C2, 0xB401, 0x89C3, 0xB402, 0x89C4, 0xB403, 0x89C5,
01906     0xB404, 0x89C6, 0xB405, 0x89C7, 0xB406, 0x89C8, 0xB407, 0x89C9,
01907     0xB408, 0x89CA, 0xB409, 0x89CB, 0xB40A, 0x89CC, 0xB40B, 0x89CD,
01908     0xB40C, 0x89CE, 0xB40D, 0x89CF, 0xB40E, 0x89D0, 0xB40F, 0x89D1,
01909     0xB410, 0xB5C6, 0xB411, 0x89D2, 0xB412, 0x89D3, 0xB413, 0x89D4,
01910     0xB414, 0x89D5, 0xB415, 0x89D6, 0xB416, 0x89D7, 0xB417, 0x89D8,
01911     0xB418, 0xB5C7, 0xB419, 0x89D9, 0xB41A, 0x89DA, 0xB41B, 0x89DB,
01912     0xB41C, 0xB5C8, 0xB41D, 0x89DC, 0xB41E, 0x89DD, 0xB41F, 0x89DE,
01913     0xB420, 0xB5C9, 0xB421, 0x89DF, 0xB422, 0x89E0, 0xB423, 0x89E1,
01914     0xB424, 0x89E2, 0xB425, 0x89E3, 0xB426, 0x89E4, 0xB427, 0x89E5,
01915     0xB428, 0xB5CA, 0xB429, 0xB5CB, 0xB42A, 0x89E6, 0xB42B, 0xB5CC,
01916     0xB42C, 0x89E7, 0xB42D, 0x89E8, 0xB42E, 0x89E9, 0xB42F, 0x89EA,
01917     0xB430, 0x89EB, 0xB431, 0x89EC, 0xB432, 0x89ED, 0xB433, 0x89EE,
01918     0xB434, 0xB5CD, 0xB435, 0x89EF, 0xB436, 0x89F0, 0xB437, 0x89F1,
01919     0xB438, 0x89F2, 0xB439, 0x89F3, 0xB43A, 0x89F4, 0xB43B, 0x89F5,
01920     0xB43C, 0x89F6, 0xB43D, 0x89F7, 0xB43E, 0x89F8, 0xB43F, 0x89F9,
01921     0xB440, 0x89FA, 0xB441, 0x89FB, 0xB442, 0x89FC, 0xB443, 0x89FD,
01922     0xB444, 0x89FE, 0xB445, 0x8A41, 0xB446, 0x8A42, 0xB447, 0x8A43,
01923     0xB448, 0x8A44, 0xB449, 0x8A45, 0xB44A, 0x8A46, 0xB44B, 0x8A47,
01924     0xB44C, 0x8A48, 0xB44D, 0x8A49, 0xB44E, 0x8A4A, 0xB44F, 0x8A4B,
01925     0xB450, 0xB5CE, 0xB451, 0xB5CF, 0xB452, 0x8A4C, 0xB453, 0x8A4D,
01926     0xB454, 0xB5D0, 0xB455, 0x8A4E, 0xB456, 0x8A4F, 0xB457, 0x8A50,
01927     0xB458, 0xB5D1, 0xB459, 0x8A51, 0xB45A, 0x8A52, 0xB45B, 0x8A53,
01928     0xB45C, 0x8A54, 0xB45D, 0x8A55, 0xB45E, 0x8A56, 0xB45F, 0x8A57,
01929     0xB460, 0xB5D2, 0xB461, 0xB5D3, 0xB462, 0x8A58, 0xB463, 0xB5D4,
01930     0xB464, 0x8A59, 0xB465, 0xB5D5, 0xB466, 0x8A5A, 0xB467, 0x8A61,
01931     0xB468, 0x8A62, 0xB469, 0x8A63, 0xB46A, 0x8A64, 0xB46B, 0x8A65,
01932     0xB46C, 0xB5D6, 0xB46D, 0x8A66, 0xB46E, 0x8A67, 0xB46F, 0x8A68,
01933     0xB470, 0x8A69, 0xB471, 0x8A6A, 0xB472, 0x8A6B, 0xB473, 0x8A6C,
01934     0xB474, 0x8A6D, 0xB475, 0x8A6E, 0xB476, 0x8A6F, 0xB477, 0x8A70,
01935     0xB478, 0x8A71, 0xB479, 0x8A72, 0xB47A, 0x8A73, 0xB47B, 0x8A74,
01936     0xB47C, 0x8A75, 0xB47D, 0x8A76, 0xB47E, 0x8A77, 0xB47F, 0x8A78,
01937     0xB480, 0xB5D7, 0xB481, 0x8A79, 0xB482, 0x8A7A, 0xB483, 0x8A81,
01938     0xB484, 0x8A82, 0xB485, 0x8A83, 0xB486, 0x8A84, 0xB487, 0x8A85,
01939     0xB488, 0xB5D8, 0xB489, 0x8A86, 0xB48A, 0x8A87, 0xB48B, 0x8A88,
01940     0xB48C, 0x8A89, 0xB48D, 0x8A8A, 0xB48E, 0x8A8B, 0xB48F, 0x8A8C,
01941     0xB490, 0x8A8D, 0xB491, 0x8A8E, 0xB492, 0x8A8F, 0xB493, 0x8A90,
01942     0xB494, 0x8A91, 0xB495, 0x8A92, 0xB496, 0x8A93, 0xB497, 0x8A94,
01943     0xB498, 0x8A95, 0xB499, 0x8A96, 0xB49A, 0x8A97, 0xB49B, 0x8A98,
01944     0xB49C, 0x8A99, 0xB49D, 0xB5D9, 0xB49E, 0x8A9A, 0xB49F, 0x8A9B,
01945     0xB4A0, 0x8A9C, 0xB4A1, 0x8A9D, 0xB4A2, 0x8A9E, 0xB4A3, 0x8A9F,
01946     0xB4A4, 0xB5DA, 0xB4A5, 0x8AA0, 0xB4A6, 0x8AA1, 0xB4A7, 0x8AA2,
01947     0xB4A8, 0xB5DB, 0xB4A9, 0x8AA3, 0xB4AA, 0x8AA4, 0xB4AB, 0x8AA5,
01948     0xB4AC, 0xB5DC, 0xB4AD, 0x8AA6, 0xB4AE, 0x8AA7, 0xB4AF, 0x8AA8,
01949     0xB4B0, 0x8AA9, 0xB4B1, 0x8AAA, 0xB4B2, 0x8AAB, 0xB4B3, 0x8AAC,
01950     0xB4B4, 0x8AAD, 0xB4B5, 0xB5DD, 0xB4B6, 0x8AAE, 0xB4B7, 0xB5DE,
01951     0xB4B8, 0x8AAF, 0xB4B9, 0xB5DF, 0xB4BA, 0x8AB0, 0xB4BB, 0x8AB1,
01952     0xB4BC, 0x8AB2, 0xB4BD, 0x8AB3, 0xB4BE, 0x8AB4, 0xB4BF, 0x8AB5,
01953     0xB4C0, 0xB5E0, 0xB4C1, 0x8AB6, 0xB4C2, 0x8AB7, 0xB4C3, 0x8AB8,
01954     0xB4C4, 0xB5E1, 0xB4C5, 0x8AB9, 0xB4C6, 0x8ABA, 0xB4C7, 0x8ABB,
01955     0xB4C8, 0xB5E2, 0xB4C9, 0x8ABC, 0xB4CA, 0x8ABD, 0xB4CB, 0x8ABE,
01956     0xB4CC, 0x8ABF, 0xB4CD, 0x8AC0, 0xB4CE, 0x8AC1, 0xB4CF, 0x8AC2,
01957     0xB4D0, 0xB5E3, 0xB4D1, 0x8AC3, 0xB4D2, 0x8AC4, 0xB4D3, 0x8AC5,
01958     0xB4D4, 0x8AC6, 0xB4D5, 0xB5E4, 0xB4D6, 0x8AC7, 0xB4D7, 0x8AC8,
01959     0xB4D8, 0x8AC9, 0xB4D9, 0x8ACA, 0xB4DA, 0x8ACB, 0xB4DB, 0x8ACC,
01960     0xB4DC, 0xB5E5, 0xB4DD, 0xB5E6, 0xB4DE, 0x8ACD, 0xB4DF, 0x8ACE,
01961     0xB4E0, 0xB5E7, 0xB4E1, 0x8ACF, 0xB4E2, 0x8AD0, 0xB4E3, 0xB5E8,
01962     0xB4E4, 0xB5E9, 0xB4E5, 0x8AD1, 0xB4E6, 0xB5EA, 0xB4E7, 0x8AD2,
01963     0xB4E8, 0x8AD3, 0xB4E9, 0x8AD4, 0xB4EA, 0x8AD5, 0xB4EB, 0x8AD6,
01964     0xB4EC, 0xB5EB, 0xB4ED, 0xB5EC, 0xB4EE, 0x8AD7, 0xB4EF, 0xB5ED,
01965     0xB4F0, 0x8AD8, 0xB4F1, 0xB5EE, 0xB4F2, 0x8AD9, 0xB4F3, 0x8ADA,
01966     0xB4F4, 0x8ADB, 0xB4F5, 0x8ADC, 0xB4F6, 0x8ADD, 0xB4F7, 0x8ADE,
01967     0xB4F8, 0xB5EF, 0xB4F9, 0x8ADF, 0xB4FA, 0x8AE0, 0xB4FB, 0x8AE1,
01968     0xB4FC, 0x8AE2, 0xB4FD, 0x8AE3, 0xB4FE, 0x8AE4, 0xB4FF, 0x8AE5,
01969     0xB500, 0x8AE6, 0xB501, 0x8AE7, 0xB502, 0x8AE8, 0xB503, 0x8AE9,
01970     0xB504, 0x8AEA, 0xB505, 0x8AEB, 0xB506, 0x8AEC, 0xB507, 0x8AED,
01971     0xB508, 0x8AEE, 0xB509, 0x8AEF, 0xB50A, 0x8AF0, 0xB50B, 0x8AF1,
01972     0xB50C, 0x8AF2, 0xB50D, 0x8AF3, 0xB50E, 0x8AF4, 0xB50F, 0x8AF5,
01973     0xB510, 0x8AF6, 0xB511, 0x8AF7, 0xB512, 0x8AF8, 0xB513, 0x8AF9,
01974     0xB514, 0xB5F0, 0xB515, 0xB5F1, 0xB516, 0x8AFA, 0xB517, 0x8AFB,
01975     0xB518, 0xB5F2, 0xB519, 0x8AFC, 0xB51A, 0x8AFD, 0xB51B, 0xB5F3,
01976     0xB51C, 0xB5F4, 0xB51D, 0x8AFE, 0xB51E, 0x8B41, 0xB51F, 0x8B42,
01977     0xB520, 0x8B43, 0xB521, 0x8B44, 0xB522, 0x8B45, 0xB523, 0x8B46,
01978     0xB524, 0xB5F5, 0xB525, 0xB5F6, 0xB526, 0x8B47, 0xB527, 0xB5F7,
01979     0xB528, 0xB5F8, 0xB529, 0xB5F9, 0xB52A, 0xB5FA, 0xB52B, 0x8B48,
01980     0xB52C, 0x8B49, 0xB52D, 0x8B4A, 0xB52E, 0x8B4B, 0xB52F, 0x8B4C,
01981     0xB530, 0xB5FB, 0xB531, 0xB5FC, 0xB532, 0x8B4D, 0xB533, 0x8B4E,
01982     0xB534, 0xB5FD, 0xB535, 0x8B4F, 0xB536, 0x8B50, 0xB537, 0x8B51,
01983     0xB538, 0xB5FE, 0xB539, 0x8B52, 0xB53A, 0x8B53, 0xB53B, 0x8B54,
01984     0xB53C, 0x8B55, 0xB53D, 0x8B56, 0xB53E, 0x8B57, 0xB53F, 0x8B58,
01985     0xB540, 0xB6A1, 0xB541, 0xB6A2, 0xB542, 0x8B59, 0xB543, 0xB6A3,
01986     0xB544, 0xB6A4, 0xB545, 0xB6A5, 0xB546, 0x8B5A, 0xB547, 0x8B61,
01987     0xB548, 0x8B62, 0xB549, 0x8B63, 0xB54A, 0x8B64, 0xB54B, 0xB6A6,
01988     0xB54C, 0xB6A7, 0xB54D, 0xB6A8, 0xB54E, 0x8B65, 0xB54F, 0x8B66,
01989     0xB550, 0xB6A9, 0xB551, 0x8B67, 0xB552, 0x8B68, 0xB553, 0x8B69,
01990     0xB554, 0xB6AA, 0xB555, 0x8B6A, 0xB556, 0x8B6B, 0xB557, 0x8B6C,
01991     0xB558, 0x8B6D, 0xB559, 0x8B6E, 0xB55A, 0x8B6F, 0xB55B, 0x8B70,
01992     0xB55C, 0xB6AB, 0xB55D, 0xB6AC, 0xB55E, 0x8B71, 0xB55F, 0xB6AD,
01993     0xB560, 0xB6AE, 0xB561, 0xB6AF, 0xB562, 0x8B72, 0xB563, 0x8B73,
01994     0xB564, 0x8B74, 0xB565, 0x8B75, 0xB566, 0x8B76, 0xB567, 0x8B77,
01995     0xB568, 0x8B78, 0xB569, 0x8B79, 0xB56A, 0x8B7A, 0xB56B, 0x8B81,
01996     0xB56C, 0x8B82, 0xB56D, 0x8B83, 0xB56E, 0x8B84, 0xB56F, 0x8B85,
01997     0xB570, 0x8B86, 0xB571, 0x8B87, 0xB572, 0x8B88, 0xB573, 0x8B89,
01998     0xB574, 0x8B8A, 0xB575, 0x8B8B, 0xB576, 0x8B8C, 0xB577, 0x8B8D,
01999     0xB578, 0x8B8E, 0xB579, 0x8B8F, 0xB57A, 0x8B90, 0xB57B, 0x8B91,
02000     0xB57C, 0x8B92, 0xB57D, 0x8B93, 0xB57E, 0x8B94, 0xB57F, 0x8B95,
02001     0xB580, 0x8B96, 0xB581, 0x8B97, 0xB582, 0x8B98, 0xB583, 0x8B99,
02002     0xB584, 0x8B9A, 0xB585, 0x8B9B, 0xB586, 0x8B9C, 0xB587, 0x8B9D,
02003     0xB588, 0x8B9E, 0xB589, 0x8B9F, 0xB58A, 0x8BA0, 0xB58B, 0x8BA1,
02004     0xB58C, 0x8BA2, 0xB58D, 0x8BA3, 0xB58E, 0x8BA4, 0xB58F, 0x8BA5,
02005     0xB590, 0x8BA6, 0xB591, 0x8BA7, 0xB592, 0x8BA8, 0xB593, 0x8BA9,
02006     0xB594, 0x8BAA, 0xB595, 0x8BAB, 0xB596, 0x8BAC, 0xB597, 0x8BAD,
02007     0xB598, 0x8BAE, 0xB599, 0x8BAF, 0xB59A, 0x8BB0, 0xB59B, 0x8BB1,
02008     0xB59C, 0x8BB2, 0xB59D, 0x8BB3, 0xB59E, 0x8BB4, 0xB59F, 0x8BB5,
02009     0xB5A0, 0xB6B0, 0xB5A1, 0xB6B1, 0xB5A2, 0x8BB6, 0xB5A3, 0x8BB7,
02010     0xB5A4, 0xB6B2, 0xB5A5, 0x8BB8, 0xB5A6, 0x8BB9, 0xB5A7, 0x8BBA,
02011     0xB5A8, 0xB6B3, 0xB5A9, 0x8BBB, 0xB5AA, 0xB6B4, 0xB5AB, 0xB6B5,
02012     0xB5AC, 0x8BBC, 0xB5AD, 0x8BBD, 0xB5AE, 0x8BBE, 0xB5AF, 0x8BBF,
02013     0xB5B0, 0xB6B6, 0xB5B1, 0xB6B7, 0xB5B2, 0x8BC0, 0xB5B3, 0xB6B8,
02014     0xB5B4, 0xB6B9, 0xB5B5, 0xB6BA, 0xB5B6, 0x8BC1, 0xB5B7, 0x8BC2,
02015     0xB5B8, 0x8BC3, 0xB5B9, 0x8BC4, 0xB5BA, 0x8BC5, 0xB5BB, 0xB6BB,
02016     0xB5BC, 0xB6BC, 0xB5BD, 0xB6BD, 0xB5BE, 0x8BC6, 0xB5BF, 0x8BC7,
02017     0xB5C0, 0xB6BE, 0xB5C1, 0x8BC8, 0xB5C2, 0x8BC9, 0xB5C3, 0x8BCA,
02018     0xB5C4, 0xB6BF, 0xB5C5, 0x8BCB, 0xB5C6, 0x8BCC, 0xB5C7, 0x8BCD,
02019     0xB5C8, 0x8BCE, 0xB5C9, 0x8BCF, 0xB5CA, 0x8BD0, 0xB5CB, 0x8BD1,
02020     0xB5CC, 0xB6C0, 0xB5CD, 0xB6C1, 0xB5CE, 0x8BD2, 0xB5CF, 0xB6C2,
02021     0xB5D0, 0xB6C3, 0xB5D1, 0xB6C4, 0xB5D2, 0x8BD3, 0xB5D3, 0x8BD4,
02022     0xB5D4, 0x8BD5, 0xB5D5, 0x8BD6, 0xB5D6, 0x8BD7, 0xB5D7, 0x8BD8,
02023     0xB5D8, 0xB6C5, 0xB5D9, 0x8BD9, 0xB5DA, 0x8BDA, 0xB5DB, 0x8BDB,
02024     0xB5DC, 0x8BDC, 0xB5DD, 0x8BDD, 0xB5DE, 0x8BDE, 0xB5DF, 0x8BDF,
02025     0xB5E0, 0x8BE0, 0xB5E1, 0x8BE1, 0xB5E2, 0x8BE2, 0xB5E3, 0x8BE3,
02026     0xB5E4, 0x8BE4, 0xB5E5, 0x8BE5, 0xB5E6, 0x8BE6, 0xB5E7, 0x8BE7,
02027     0xB5E8, 0x8BE8, 0xB5E9, 0x8BE9, 0xB5EA, 0x8BEA, 0xB5EB, 0x8BEB,
02028     0xB5EC, 0xB6C6, 0xB5ED, 0x8BEC, 0xB5EE, 0x8BED, 0xB5EF, 0x8BEE,
02029     0xB5F0, 0x8BEF, 0xB5F1, 0x8BF0, 0xB5F2, 0x8BF1, 0xB5F3, 0x8BF2,
02030     0xB5F4, 0x8BF3, 0xB5F5, 0x8BF4, 0xB5F6, 0x8BF5, 0xB5F7, 0x8BF6,
02031     0xB5F8, 0x8BF7, 0xB5F9, 0x8BF8, 0xB5FA, 0x8BF9, 0xB5FB, 0x8BFA,
02032     0xB5FC, 0x8BFB, 0xB5FD, 0x8BFC, 0xB5FE, 0x8BFD, 0xB5FF, 0x8BFE,
02033     0xB600, 0x8C41, 0xB601, 0x8C42, 0xB602, 0x8C43, 0xB603, 0x8C44,
02034     0xB604, 0x8C45, 0xB605, 0x8C46, 0xB606, 0x8C47, 0xB607, 0x8C48,
02035     0xB608, 0x8C49, 0xB609, 0x8C4A, 0xB60A, 0x8C4B, 0xB60B, 0x8C4C,
02036     0xB60C, 0x8C4D, 0xB60D, 0x8C4E, 0xB60E, 0x8C4F, 0xB60F, 0x8C50,
02037     0xB610, 0xB6C7, 0xB611, 0xB6C8, 0xB612, 0x8C51, 0xB613, 0x8C52,
02038     0xB614, 0xB6C9, 0xB615, 0x8C53, 0xB616, 0x8C54, 0xB617, 0x8C55,
02039     0xB618, 0xB6CA, 0xB619, 0x8C56, 0xB61A, 0x8C57, 0xB61B, 0x8C58,
02040     0xB61C, 0x8C59, 0xB61D, 0x8C5A, 0xB61E, 0x8C61, 0xB61F, 0x8C62,
02041     0xB620, 0x8C63, 0xB621, 0x8C64, 0xB622, 0x8C65, 0xB623, 0x8C66,
02042     0xB624, 0x8C67, 0xB625, 0xB6CB, 0xB626, 0x8C68, 0xB627, 0x8C69,
02043     0xB628, 0x8C6A, 0xB629, 0x8C6B, 0xB62A, 0x8C6C, 0xB62B, 0x8C6D,
02044     0xB62C, 0xB6CC, 0xB62D, 0x8C6E, 0xB62E, 0x8C6F, 0xB62F, 0x8C70,
02045     0xB630, 0x8C71, 0xB631, 0x8C72, 0xB632, 0x8C73, 0xB633, 0x8C74,
02046     0xB634, 0xB6CD, 0xB635, 0x8C75, 0xB636, 0x8C76, 0xB637, 0x8C77,
02047     0xB638, 0x8C78, 0xB639, 0x8C79, 0xB63A, 0x8C7A, 0xB63B, 0x8C81,
02048     0xB63C, 0x8C82, 0xB63D, 0x8C83, 0xB63E, 0x8C84, 0xB63F, 0x8C85,
02049     0xB640, 0x8C86, 0xB641, 0x8C87, 0xB642, 0x8C88, 0xB643, 0x8C89,
02050     0xB644, 0x8C8A, 0xB645, 0x8C8B, 0xB646, 0x8C8C, 0xB647, 0x8C8D,
02051     0xB648, 0xB6CE, 0xB649, 0x8C8E, 0xB64A, 0x8C8F, 0xB64B, 0x8C90,
02052     0xB64C, 0x8C91, 0xB64D, 0x8C92, 0xB64E, 0x8C93, 0xB64F, 0x8C94,
02053     0xB650, 0x8C95, 0xB651, 0x8C96, 0xB652, 0x8C97, 0xB653, 0x8C98,
02054     0xB654, 0x8C99, 0xB655, 0x8C9A, 0xB656, 0x8C9B, 0xB657, 0x8C9C,
02055     0xB658, 0x8C9D, 0xB659, 0x8C9E, 0xB65A, 0x8C9F, 0xB65B, 0x8CA0,
02056     0xB65C, 0x8CA1, 0xB65D, 0x8CA2, 0xB65E, 0x8CA3, 0xB65F, 0x8CA4,
02057     0xB660, 0x8CA5, 0xB661, 0x8CA6, 0xB662, 0x8CA7, 0xB663, 0x8CA8,
02058     0xB664, 0xB6CF, 0xB665, 0x8CA9, 0xB666, 0x8CAA, 0xB667, 0x8CAB,
02059     0xB668, 0xB6D0, 0xB669, 0x8CAC, 0xB66A, 0x8CAD, 0xB66B, 0x8CAE,
02060     0xB66C, 0x8CAF, 0xB66D, 0x8CB0, 0xB66E, 0x8CB1, 0xB66F, 0x8CB2,
02061     0xB670, 0x8CB3, 0xB671, 0x8CB4, 0xB672, 0x8CB5, 0xB673, 0x8CB6,
02062     0xB674, 0x8CB7, 0xB675, 0x8CB8, 0xB676, 0x8CB9, 0xB677, 0x8CBA,
02063     0xB678, 0x8CBB, 0xB679, 0x8CBC, 0xB67A, 0x8CBD, 0xB67B, 0x8CBE,
02064     0xB67C, 0x8CBF, 0xB67D, 0x8CC0, 0xB67E, 0x8CC1, 0xB67F, 0x8CC2,
02065     0xB680, 0x8CC3, 0xB681, 0x8CC4, 0xB682, 0x8CC5, 0xB683, 0x8CC6,
02066     0xB684, 0x8CC7, 0xB685, 0x8CC8, 0xB686, 0x8CC9, 0xB687, 0x8CCA,
02067     0xB688, 0x8CCB, 0xB689, 0x8CCC, 0xB68A, 0x8CCD, 0xB68B, 0x8CCE,
02068     0xB68C, 0x8CCF, 0xB68D, 0x8CD0, 0xB68E, 0x8CD1, 0xB68F, 0x8CD2,
02069     0xB690, 0x8CD3, 0xB691, 0x8CD4, 0xB692, 0x8CD5, 0xB693, 0x8CD6,
02070     0xB694, 0x8CD7, 0xB695, 0x8CD8, 0xB696, 0x8CD9, 0xB697, 0x8CDA,
02071     0xB698, 0x8CDB, 0xB699, 0x8CDC, 0xB69A, 0x8CDD, 0xB69B, 0x8CDE,
02072     0xB69C, 0xB6D1, 0xB69D, 0xB6D2, 0xB69E, 0x8CDF, 0xB69F, 0x8CE0,
02073     0xB6A0, 0xB6D3, 0xB6A1, 0x8CE1, 0xB6A2, 0x8CE2, 0xB6A3, 0x8CE3,
02074     0xB6A4, 0xB6D4, 0xB6A5, 0x8CE4, 0xB6A6, 0x8CE5, 0xB6A7, 0x8CE6,
02075     0xB6A8, 0x8CE7, 0xB6A9, 0x8CE8, 0xB6AA, 0x8CE9, 0xB6AB, 0xB6D5,
02076     0xB6AC, 0xB6D6, 0xB6AD, 0x8CEA, 0xB6AE, 0x8CEB, 0xB6AF, 0x8CEC,
02077     0xB6B0, 0x8CED, 0xB6B1, 0xB6D7, 0xB6B2, 0x8CEE, 0xB6B3, 0x8CEF,
02078     0xB6B4, 0x8CF0, 0xB6B5, 0x8CF1, 0xB6B6, 0x8CF2, 0xB6B7, 0x8CF3,
02079     0xB6B8, 0x8CF4, 0xB6B9, 0x8CF5, 0xB6BA, 0x8CF6, 0xB6BB, 0x8CF7,
02080     0xB6BC, 0x8CF8, 0xB6BD, 0x8CF9, 0xB6BE, 0x8CFA, 0xB6BF, 0x8CFB,
02081     0xB6C0, 0x8CFC, 0xB6C1, 0x8CFD, 0xB6C2, 0x8CFE, 0xB6C3, 0x8D41,
02082     0xB6C4, 0x8D42, 0xB6C5, 0x8D43, 0xB6C6, 0x8D44, 0xB6C7, 0x8D45,
02083     0xB6C8, 0x8D46, 0xB6C9, 0x8D47, 0xB6CA, 0x8D48, 0xB6CB, 0x8D49,
02084     0xB6CC, 0x8D4A, 0xB6CD, 0x8D4B, 0xB6CE, 0x8D4C, 0xB6CF, 0x8D4D,
02085     0xB6D0, 0x8D4E, 0xB6D1, 0x8D4F, 0xB6D2, 0x8D50, 0xB6D3, 0x8D51,
02086     0xB6D4, 0xB6D8, 0xB6D5, 0x8D52, 0xB6D6, 0x8D53, 0xB6D7, 0x8D54,
02087     0xB6D8, 0x8D55, 0xB6D9, 0x8D56, 0xB6DA, 0x8D57, 0xB6DB, 0x8D58,
02088     0xB6DC, 0x8D59, 0xB6DD, 0x8D5A, 0xB6DE, 0x8D61, 0xB6DF, 0x8D62,
02089     0xB6E0, 0x8D63, 0xB6E1, 0x8D64, 0xB6E2, 0x8D65, 0xB6E3, 0x8D66,
02090     0xB6E4, 0x8D67, 0xB6E5, 0x8D68, 0xB6E6, 0x8D69, 0xB6E7, 0x8D6A,
02091     0xB6E8, 0x8D6B, 0xB6E9, 0x8D6C, 0xB6EA, 0x8D6D, 0xB6EB, 0x8D6E,
02092     0xB6EC, 0x8D6F, 0xB6ED, 0x8D70, 0xB6EE, 0x8D71, 0xB6EF, 0x8D72,
02093     0xB6F0, 0xB6D9, 0xB6F1, 0x8D73, 0xB6F2, 0x8D74, 0xB6F3, 0x8D75,
02094     0xB6F4, 0xB6DA, 0xB6F5, 0x8D76, 0xB6F6, 0x8D77, 0xB6F7, 0x8D78,
02095     0xB6F8, 0xB6DB, 0xB6F9, 0x8D79, 0xB6FA, 0x8D7A, 0xB6FB, 0x8D81,
02096     0xB6FC, 0x8D82, 0xB6FD, 0x8D83, 0xB6FE, 0x8D84, 0xB6FF, 0x8D85,
02097     0xB700, 0xB6DC, 0xB701, 0xB6DD, 0xB702, 0x8D86, 0xB703, 0x8D87,
02098     0xB704, 0x8D88, 0xB705, 0xB6DE, 0xB706, 0x8D89, 0xB707, 0x8D8A,
02099     0xB708, 0x8D8B, 0xB709, 0x8D8C, 0xB70A, 0x8D8D, 0xB70B, 0x8D8E,
02100     0xB70C, 0x8D8F, 0xB70D, 0x8D90, 0xB70E, 0x8D91, 0xB70F, 0x8D92,
02101     0xB710, 0x8D93, 0xB711, 0x8D94, 0xB712, 0x8D95, 0xB713, 0x8D96,
02102     0xB714, 0x8D97, 0xB715, 0x8D98, 0xB716, 0x8D99, 0xB717, 0x8D9A,
02103     0xB718, 0x8D9B, 0xB719, 0x8D9C, 0xB71A, 0x8D9D, 0xB71B, 0x8D9E,
02104     0xB71C, 0x8D9F, 0xB71D, 0x8DA0, 0xB71E, 0x8DA1, 0xB71F, 0x8DA2,
02105     0xB720, 0x8DA3, 0xB721, 0x8DA4, 0xB722, 0x8DA5, 0xB723, 0x8DA6,
02106     0xB724, 0x8DA7, 0xB725, 0x8DA8, 0xB726, 0x8DA9, 0xB727, 0x8DAA,
02107     0xB728, 0xB6DF, 0xB729, 0xB6E0, 0xB72A, 0x8DAB, 0xB72B, 0x8DAC,
02108     0xB72C, 0xB6E1, 0xB72D, 0x8DAD, 0xB72E, 0x8DAE, 0xB72F, 0xB6E2,
02109     0xB730, 0xB6E3, 0xB731, 0x8DAF, 0xB732, 0x8DB0, 0xB733, 0x8DB1,
02110     0xB734, 0x8DB2, 0xB735, 0x8DB3, 0xB736, 0x8DB4, 0xB737, 0x8DB5,
02111     0xB738, 0xB6E4, 0xB739, 0xB6E5, 0xB73A, 0x8DB6, 0xB73B, 0xB6E6,
02112     0xB73C, 0x8DB7, 0xB73D, 0x8DB8, 0xB73E, 0x8DB9, 0xB73F, 0x8DBA,
02113     0xB740, 0x8DBB, 0xB741, 0x8DBC, 0xB742, 0x8DBD, 0xB743, 0x8DBE,
02114     0xB744, 0xB6E7, 0xB745, 0x8DBF, 0xB746, 0x8DC0, 0xB747, 0x8DC1,
02115     0xB748, 0xB6E8, 0xB749, 0x8DC2, 0xB74A, 0x8DC3, 0xB74B, 0x8DC4,
02116     0xB74C, 0xB6E9, 0xB74D, 0x8DC5, 0xB74E, 0x8DC6, 0xB74F, 0x8DC7,
02117     0xB750, 0x8DC8, 0xB751, 0x8DC9, 0xB752, 0x8DCA, 0xB753, 0x8DCB,
02118     0xB754, 0xB6EA, 0xB755, 0xB6EB, 0xB756, 0x8DCC, 0xB757, 0x8DCD,
02119     0xB758, 0x8DCE, 0xB759, 0x8DCF, 0xB75A, 0x8DD0, 0xB75B, 0x8DD1,
02120     0xB75C, 0x8DD2, 0xB75D, 0x8DD3, 0xB75E, 0x8DD4, 0xB75F, 0x8DD5,
02121     0xB760, 0xB6EC, 0xB761, 0x8DD6, 0xB762, 0x8DD7, 0xB763, 0x8DD8,
02122     0xB764, 0xB6ED, 0xB765, 0x8DD9, 0xB766, 0x8DDA, 0xB767, 0x8DDB,
02123     0xB768, 0xB6EE, 0xB769, 0x8DDC, 0xB76A, 0x8DDD, 0xB76B, 0x8DDE,
02124     0xB76C, 0x8DDF, 0xB76D, 0x8DE0, 0xB76E, 0x8DE1, 0xB76F, 0x8DE2,
02125     0xB770, 0xB6EF, 0xB771, 0xB6F0, 0xB772, 0x8DE3, 0xB773, 0xB6F1,
02126     0xB774, 0x8DE4, 0xB775, 0xB6F2, 0xB776, 0x8DE5, 0xB777, 0x8DE6,
02127     0xB778, 0x8DE7, 0xB779, 0x8DE8, 0xB77A, 0x8DE9, 0xB77B, 0x8DEA,
02128     0xB77C, 0xB6F3, 0xB77D, 0xB6F4, 0xB77E, 0x8DEB, 0xB77F, 0x8DEC,
02129     0xB780, 0xB6F5, 0xB781, 0x8DED, 0xB782, 0x8DEE, 0xB783, 0x8DEF,
02130     0xB784, 0xB6F6, 0xB785, 0x8DF0, 0xB786, 0x8DF1, 0xB787, 0x8DF2,
02131     0xB788, 0x8DF3, 0xB789, 0x8DF4, 0xB78A, 0x8DF5, 0xB78B, 0x8DF6,
02132     0xB78C, 0xB6F7, 0xB78D, 0xB6F8, 0xB78E, 0x8DF7, 0xB78F, 0xB6F9,
02133     0xB790, 0xB6FA, 0xB791, 0xB6FB, 0xB792, 0xB6FC, 0xB793, 0x8DF8,
02134     0xB794, 0x8DF9, 0xB795, 0x8DFA, 0xB796, 0xB6FD, 0xB797, 0xB6FE,
02135     0xB798, 0xB7A1, 0xB799, 0xB7A2, 0xB79A, 0x8DFB, 0xB79B, 0x8DFC,
02136     0xB79C, 0xB7A3, 0xB79D, 0x8DFD, 0xB79E, 0x8DFE, 0xB79F, 0x8E41,
02137     0xB7A0, 0xB7A4, 0xB7A1, 0x8E42, 0xB7A2, 0x8E43, 0xB7A3, 0x8E44,
02138     0xB7A4, 0x8E45, 0xB7A5, 0x8E46, 0xB7A6, 0x8E47, 0xB7A7, 0x8E48,
02139     0xB7A8, 0xB7A5, 0xB7A9, 0xB7A6, 0xB7AA, 0x8E49, 0xB7AB, 0xB7A7,
02140     0xB7AC, 0xB7A8, 0xB7AD, 0xB7A9, 0xB7AE, 0x8E4A, 0xB7AF, 0x8E4B,
02141     0xB7B0, 0x8E4C, 0xB7B1, 0x8E4D, 0xB7B2, 0x8E4E, 0xB7B3, 0x8E4F,
02142     0xB7B4, 0xB7AA, 0xB7B5, 0xB7AB, 0xB7B6, 0x8E50, 0xB7B7, 0x8E51,
02143     0xB7B8, 0xB7AC, 0xB7B9, 0x8E52, 0xB7BA, 0x8E53, 0xB7BB, 0x8E54,
02144     0xB7BC, 0x8E55, 0xB7BD, 0x8E56, 0xB7BE, 0x8E57, 0xB7BF, 0x8E58,
02145     0xB7C0, 0x8E59, 0xB7C1, 0x8E5A, 0xB7C2, 0x8E61, 0xB7C3, 0x8E62,
02146     0xB7C4, 0x8E63, 0xB7C5, 0x8E64, 0xB7C6, 0x8E65, 0xB7C7, 0xB7AD,
02147     0xB7C8, 0x8E66, 0xB7C9, 0xB7AE, 0xB7CA, 0x8E67, 0xB7CB, 0x8E68,
02148     0xB7CC, 0x8E69, 0xB7CD, 0x8E6A, 0xB7CE, 0x8E6B, 0xB7CF, 0x8E6C,
02149     0xB7D0, 0x8E6D, 0xB7D1, 0x8E6E, 0xB7D2, 0x8E6F, 0xB7D3, 0x8E70,
02150     0xB7D4, 0x8E71, 0xB7D5, 0x8E72, 0xB7D6, 0x8E73, 0xB7D7, 0x8E74,
02151     0xB7D8, 0x8E75, 0xB7D9, 0x8E76, 0xB7DA, 0x8E77, 0xB7DB, 0x8E78,
02152     0xB7DC, 0x8E79, 0xB7DD, 0x8E7A, 0xB7DE, 0x8E81, 0xB7DF, 0x8E82,
02153     0xB7E0, 0x8E83, 0xB7E1, 0x8E84, 0xB7E2, 0x8E85, 0xB7E3, 0x8E86,
02154     0xB7E4, 0x8E87, 0xB7E5, 0x8E88, 0xB7E6, 0x8E89, 0xB7E7, 0x8E8A,
02155     0xB7E8, 0x8E8B, 0xB7E9, 0x8E8C, 0xB7EA, 0x8E8D, 0xB7EB, 0x8E8E,
02156     0xB7EC, 0xB7AF, 0xB7ED, 0xB7B0, 0xB7EE, 0x8E8F, 0xB7EF, 0x8E90,
02157     0xB7F0, 0xB7B1, 0xB7F1, 0x8E91, 0xB7F2, 0x8E92, 0xB7F3, 0x8E93,
02158     0xB7F4, 0xB7B2, 0xB7F5, 0x8E94, 0xB7F6, 0x8E95, 0xB7F7, 0x8E96,
02159     0xB7F8, 0x8E97, 0xB7F9, 0x8E98, 0xB7FA, 0x8E99, 0xB7FB, 0x8E9A,
02160     0xB7FC, 0xB7B3, 0xB7FD, 0xB7B4, 0xB7FE, 0x8E9B, 0xB7FF, 0xB7B5,
02161     0xB800, 0xB7B6, 0xB801, 0xB7B7, 0xB802, 0x8E9C, 0xB803, 0x8E9D,
02162     0xB804, 0x8E9E, 0xB805, 0x8E9F, 0xB806, 0x8EA0, 0xB807, 0xB7B8,
02163     0xB808, 0xB7B9, 0xB809, 0xB7BA, 0xB80A, 0x8EA1, 0xB80B, 0x8EA2,
02164     0xB80C, 0xB7BB, 0xB80D, 0x8EA3, 0xB80E, 0x8EA4, 0xB80F, 0x8EA5,
02165     0xB810, 0xB7BC, 0xB811, 0x8EA6, 0xB812, 0x8EA7, 0xB813, 0x8EA8,
02166     0xB814, 0x8EA9, 0xB815, 0x8EAA, 0xB816, 0x8EAB, 0xB817, 0x8EAC,
02167     0xB818, 0xB7BD, 0xB819, 0xB7BE, 0xB81A, 0x8EAD, 0xB81B, 0xB7BF,
02168     0xB81C, 0x8EAE, 0xB81D, 0xB7C0, 0xB81E, 0x8EAF, 0xB81F, 0x8EB0,
02169     0xB820, 0x8EB1, 0xB821, 0x8EB2, 0xB822, 0x8EB3, 0xB823, 0x8EB4,
02170     0xB824, 0xB7C1, 0xB825, 0xB7C2, 0xB826, 0x8EB5, 0xB827, 0x8EB6,
02171     0xB828, 0xB7C3, 0xB829, 0x8EB7, 0xB82A, 0x8EB8, 0xB82B, 0x8EB9,
02172     0xB82C, 0xB7C4, 0xB82D, 0x8EBA, 0xB82E, 0x8EBB, 0xB82F, 0x8EBC,
02173     0xB830, 0x8EBD, 0xB831, 0x8EBE, 0xB832, 0x8EBF, 0xB833, 0x8EC0,
02174     0xB834, 0xB7C5, 0xB835, 0xB7C6, 0xB836, 0x8EC1, 0xB837, 0xB7C7,
02175     0xB838, 0xB7C8, 0xB839, 0xB7C9, 0xB83A, 0x8EC2, 0xB83B, 0x8EC3,
02176     0xB83C, 0x8EC4, 0xB83D, 0x8EC5, 0xB83E, 0x8EC6, 0xB83F, 0x8EC7,
02177     0xB840, 0xB7CA, 0xB841, 0x8EC8, 0xB842, 0x8EC9, 0xB843, 0x8ECA,
02178     0xB844, 0xB7CB, 0xB845, 0x8ECB, 0xB846, 0x8ECC, 0xB847, 0x8ECD,
02179     0xB848, 0x8ECE, 0xB849, 0x8ECF, 0xB84A, 0x8ED0, 0xB84B, 0x8ED1,
02180     0xB84C, 0x8ED2, 0xB84D, 0x8ED3, 0xB84E, 0x8ED4, 0xB84F, 0x8ED5,
02181     0xB850, 0x8ED6, 0xB851, 0xB7CC, 0xB852, 0x8ED7, 0xB853, 0xB7CD,
02182     0xB854, 0x8ED8, 0xB855, 0x8ED9, 0xB856, 0x8EDA, 0xB857, 0x8EDB,
02183     0xB858, 0x8EDC, 0xB859, 0x8EDD, 0xB85A, 0x8EDE, 0xB85B, 0x8EDF,
02184     0xB85C, 0xB7CE, 0xB85D, 0xB7CF, 0xB85E, 0x8EE0, 0xB85F, 0x8EE1,
02185     0xB860, 0xB7D0, 0xB861, 0x8EE2, 0xB862, 0x8EE3, 0xB863, 0x8EE4,
02186     0xB864, 0xB7D1, 0xB865, 0x8EE5, 0xB866, 0x8EE6, 0xB867, 0x8EE7,
02187     0xB868, 0x8EE8, 0xB869, 0x8EE9, 0xB86A, 0x8EEA, 0xB86B, 0x8EEB,
02188     0xB86C, 0xB7D2, 0xB86D, 0xB7D3, 0xB86E, 0x8EEC, 0xB86F, 0xB7D4,
02189     0xB870, 0x8EED, 0xB871, 0xB7D5, 0xB872, 0x8EEE, 0xB873, 0x8EEF,
02190     0xB874, 0x8EF0, 0xB875, 0x8EF1, 0xB876, 0x8EF2, 0xB877, 0x8EF3,
02191     0xB878, 0xB7D6, 0xB879, 0x8EF4, 0xB87A, 0x8EF5, 0xB87B, 0x8EF6,
02192     0xB87C, 0xB7D7, 0xB87D, 0x8EF7, 0xB87E, 0x8EF8, 0xB87F, 0x8EF9,
02193     0xB880, 0x8EFA, 0xB881, 0x8EFB, 0xB882, 0x8EFC, 0xB883, 0x8EFD,
02194     0xB884, 0x8EFE, 0xB885, 0x8F41, 0xB886, 0x8F42, 0xB887, 0x8F43,
02195     0xB888, 0x8F44, 0xB889, 0x8F45, 0xB88A, 0x8F46, 0xB88B, 0x8F47,
02196     0xB88C, 0x8F48, 0xB88D, 0xB7D8, 0xB88E, 0x8F49, 0xB88F, 0x8F4A,
02197     0xB890, 0x8F4B, 0xB891, 0x8F4C, 0xB892, 0x8F4D, 0xB893, 0x8F4E,
02198     0xB894, 0x8F4F, 0xB895, 0x8F50, 0xB896, 0x8F51, 0xB897, 0x8F52,
02199     0xB898, 0x8F53, 0xB899, 0x8F54, 0xB89A, 0x8F55, 0xB89B, 0x8F56,
02200     0xB89C, 0x8F57, 0xB89D, 0x8F58, 0xB89E, 0x8F59, 0xB89F, 0x8F5A,
02201     0xB8A0, 0x8F61, 0xB8A1, 0x8F62, 0xB8A2, 0x8F63, 0xB8A3, 0x8F64,
02202     0xB8A4, 0x8F65, 0xB8A5, 0x8F66, 0xB8A6, 0x8F67, 0xB8A7, 0x8F68,
02203     0xB8A8, 0xB7D9, 0xB8A9, 0x8F69, 0xB8AA, 0x8F6A, 0xB8AB, 0x8F6B,
02204     0xB8AC, 0x8F6C, 0xB8AD, 0x8F6D, 0xB8AE, 0x8F6E, 0xB8AF, 0x8F6F,
02205     0xB8B0, 0xB7DA, 0xB8B1, 0x8F70, 0xB8B2, 0x8F71, 0xB8B3, 0x8F72,
02206     0xB8B4, 0xB7DB, 0xB8B5, 0x8F73, 0xB8B6, 0x8F74, 0xB8B7, 0x8F75,
02207     0xB8B8, 0xB7DC, 0xB8B9, 0x8F76, 0xB8BA, 0x8F77, 0xB8BB, 0x8F78,
02208     0xB8BC, 0x8F79, 0xB8BD, 0x8F7A, 0xB8BE, 0x8F81, 0xB8BF, 0x8F82,
02209     0xB8C0, 0xB7DD, 0xB8C1, 0xB7DE, 0xB8C2, 0x8F83, 0xB8C3, 0xB7DF,
02210     0xB8C4, 0x8F84, 0xB8C5, 0xB7E0, 0xB8C6, 0x8F85, 0xB8C7, 0x8F86,
02211     0xB8C8, 0x8F87, 0xB8C9, 0x8F88, 0xB8CA, 0x8F89, 0xB8CB, 0x8F8A,
02212     0xB8CC, 0xB7E1, 0xB8CD, 0x8F8B, 0xB8CE, 0x8F8C, 0xB8CF, 0x8F8D,
02213     0xB8D0, 0xB7E2, 0xB8D1, 0x8F8E, 0xB8D2, 0x8F8F, 0xB8D3, 0x8F90,
02214     0xB8D4, 0xB7E3, 0xB8D5, 0x8F91, 0xB8D6, 0x8F92, 0xB8D7, 0x8F93,
02215     0xB8D8, 0x8F94, 0xB8D9, 0x8F95, 0xB8DA, 0x8F96, 0xB8DB, 0x8F97,
02216     0xB8DC, 0x8F98, 0xB8DD, 0xB7E4, 0xB8DE, 0x8F99, 0xB8DF, 0xB7E5,
02217     0xB8E0, 0x8F9A, 0xB8E1, 0xB7E6, 0xB8E2, 0x8F9B, 0xB8E3, 0x8F9C,
02218     0xB8E4, 0x8F9D, 0xB8E5, 0x8F9E, 0xB8E6, 0x8F9F, 0xB8E7, 0x8FA0,
02219     0xB8E8, 0xB7E7, 0xB8E9, 0xB7E8, 0xB8EA, 0x8FA1, 0xB8EB, 0x8FA2,
02220     0xB8EC, 0xB7E9, 0xB8ED, 0x8FA3, 0xB8EE, 0x8FA4, 0xB8EF, 0x8FA5,
02221     0xB8F0, 0xB7EA, 0xB8F1, 0x8FA6, 0xB8F2, 0x8FA7, 0xB8F3, 0x8FA8,
02222     0xB8F4, 0x8FA9, 0xB8F5, 0x8FAA, 0xB8F6, 0x8FAB, 0xB8F7, 0x8FAC,
02223     0xB8F8, 0xB7EB, 0xB8F9, 0xB7EC, 0xB8FA, 0x8FAD, 0xB8FB, 0xB7ED,
02224     0xB8FC, 0x8FAE, 0xB8FD, 0xB7EE, 0xB8FE, 0x8FAF, 0xB8FF, 0x8FB0,
02225     0xB900, 0x8FB1, 0xB901, 0x8FB2, 0xB902, 0x8FB3, 0xB903, 0x8FB4,
02226     0xB904, 0xB7EF, 0xB905, 0x8FB5, 0xB906, 0x8FB6, 0xB907, 0x8FB7,
02227     0xB908, 0x8FB8, 0xB909, 0x8FB9, 0xB90A, 0x8FBA, 0xB90B, 0x8FBB,
02228     0xB90C, 0x8FBC, 0xB90D, 0x8FBD, 0xB90E, 0x8FBE, 0xB90F, 0x8FBF,
02229     0xB910, 0x8FC0, 0xB911, 0x8FC1, 0xB912, 0x8FC2, 0xB913, 0x8FC3,
02230     0xB914, 0x8FC4, 0xB915, 0x8FC5, 0xB916, 0x8FC6, 0xB917, 0x8FC7,
02231     0xB918, 0xB7F0, 0xB919, 0x8FC8, 0xB91A, 0x8FC9, 0xB91B, 0x8FCA,
02232     0xB91C, 0x8FCB, 0xB91D, 0x8FCC, 0xB91E, 0x8FCD, 0xB91F, 0x8FCE,
02233     0xB920, 0xB7F1, 0xB921, 0x8FCF, 0xB922, 0x8FD0, 0xB923, 0x8FD1,
02234     0xB924, 0x8FD2, 0xB925, 0x8FD3, 0xB926, 0x8FD4, 0xB927, 0x8FD5,
02235     0xB928, 0x8FD6, 0xB929, 0x8FD7, 0xB92A, 0x8FD8, 0xB92B, 0x8FD9,
02236     0xB92C, 0x8FDA, 0xB92D, 0x8FDB, 0xB92E, 0x8FDC, 0xB92F, 0x8FDD,
02237     0xB930, 0x8FDE, 0xB931, 0x8FDF, 0xB932, 0x8FE0, 0xB933, 0x8FE1,
02238     0xB934, 0x8FE2, 0xB935, 0x8FE3, 0xB936, 0x8FE4, 0xB937, 0x8FE5,
02239     0xB938, 0x8FE6, 0xB939, 0x8FE7, 0xB93A, 0x8FE8, 0xB93B, 0x8FE9,
02240     0xB93C, 0xB7F2, 0xB93D, 0xB7F3, 0xB93E, 0x8FEA, 0xB93F, 0x8FEB,
02241     0xB940, 0xB7F4, 0xB941, 0x8FEC, 0xB942, 0x8FED, 0xB943, 0x8FEE,
02242     0xB944, 0xB7F5, 0xB945, 0x8FEF, 0xB946, 0x8FF0, 0xB947, 0x8FF1,
02243     0xB948, 0x8FF2, 0xB949, 0x8FF3, 0xB94A, 0x8FF4, 0xB94B, 0x8FF5,
02244     0xB94C, 0xB7F6, 0xB94D, 0x8FF6, 0xB94E, 0x8FF7, 0xB94F, 0xB7F7,
02245     0xB950, 0x8FF8, 0xB951, 0xB7F8, 0xB952, 0x8FF9, 0xB953, 0x8FFA,
02246     0xB954, 0x8FFB, 0xB955, 0x8FFC, 0xB956, 0x8FFD, 0xB957, 0x8FFE,
02247     0xB958, 0xB7F9, 0xB959, 0xB7FA, 0xB95A, 0x9041, 0xB95B, 0x9042,
02248     0xB95C, 0xB7FB, 0xB95D, 0x9043, 0xB95E, 0x9044, 0xB95F, 0x9045,
02249     0xB960, 0xB7FC, 0xB961, 0x9046, 0xB962, 0x9047, 0xB963, 0x9048,
02250     0xB964, 0x9049, 0xB965, 0x904A, 0xB966, 0x904B, 0xB967, 0x904C,
02251     0xB968, 0xB7FD, 0xB969, 0xB7FE, 0xB96A, 0x904D, 0xB96B, 0xB8A1,
02252     0xB96C, 0x904E, 0xB96D, 0xB8A2, 0xB96E, 0x904F, 0xB96F, 0x9050,
02253     0xB970, 0x9051, 0xB971, 0x9052, 0xB972, 0x9053, 0xB973, 0x9054,
02254     0xB974, 0xB8A3, 0xB975, 0xB8A4, 0xB976, 0x9055, 0xB977, 0x9056,
02255     0xB978, 0xB8A5, 0xB979, 0x9057, 0xB97A, 0x9058, 0xB97B, 0x9059,
02256     0xB97C, 0xB8A6, 0xB97D, 0x905A, 0xB97E, 0x9061, 0xB97F, 0x9062,
02257     0xB980, 0x9063, 0xB981, 0x9064, 0xB982, 0x9065, 0xB983, 0x9066,
02258     0xB984, 0xB8A7, 0xB985, 0xB8A8, 0xB986, 0x9067, 0xB987, 0xB8A9,
02259     0xB988, 0x9068, 0xB989, 0xB8AA, 0xB98A, 0xB8AB, 0xB98B, 0x9069,
02260     0xB98C, 0x906A, 0xB98D, 0xB8AC, 0xB98E, 0xB8AD, 0xB98F, 0x906B,
02261     0xB990, 0x906C, 0xB991, 0x906D, 0xB992, 0x906E, 0xB993, 0x906F,
02262     0xB994, 0x9070, 0xB995, 0x9071, 0xB996, 0x9072, 0xB997, 0x9073,
02263     0xB998, 0x9074, 0xB999, 0x9075, 0xB99A, 0x9076, 0xB99B, 0x9077,
02264     0xB99C, 0x9078, 0xB99D, 0x9079, 0xB99E, 0x907A, 0xB99F, 0x9081,
02265     0xB9A0, 0x9082, 0xB9A1, 0x9083, 0xB9A2, 0x9084, 0xB9A3, 0x9085,
02266     0xB9A4, 0x9086, 0xB9A5, 0x9087, 0xB9A6, 0x9088, 0xB9A7, 0x9089,
02267     0xB9A8, 0x908A, 0xB9A9, 0x908B, 0xB9AA, 0x908C, 0xB9AB, 0x908D,
02268     0xB9AC, 0xB8AE, 0xB9AD, 0xB8AF, 0xB9AE, 0x908E, 0xB9AF, 0x908F,
02269     0xB9B0, 0xB8B0, 0xB9B1, 0x9090, 0xB9B2, 0x9091, 0xB9B3, 0x9092,
02270     0xB9B4, 0xB8B1, 0xB9B5, 0x9093, 0xB9B6, 0x9094, 0xB9B7, 0x9095,
02271     0xB9B8, 0x9096, 0xB9B9, 0x9097, 0xB9BA, 0x9098, 0xB9BB, 0x9099,
02272     0xB9BC, 0xB8B2, 0xB9BD, 0xB8B3, 0xB9BE, 0x909A, 0xB9BF, 0xB8B4,
02273     0xB9C0, 0x909B, 0xB9C1, 0xB8B5, 0xB9C2, 0x909C, 0xB9C3, 0x909D,
02274     0xB9C4, 0x909E, 0xB9C5, 0x909F, 0xB9C6, 0x90A0, 0xB9C7, 0x90A1,
02275     0xB9C8, 0xB8B6, 0xB9C9, 0xB8B7, 0xB9CA, 0x90A2, 0xB9CB, 0x90A3,
02276     0xB9CC, 0xB8B8, 0xB9CD, 0x90A4, 0xB9CE, 0xB8B9, 0xB9CF, 0xB8BA,
02277     0xB9D0, 0xB8BB, 0xB9D1, 0xB8BC, 0xB9D2, 0xB8BD, 0xB9D3, 0x90A5,
02278     0xB9D4, 0x90A6, 0xB9D5, 0x90A7, 0xB9D6, 0x90A8, 0xB9D7, 0x90A9,
02279     0xB9D8, 0xB8BE, 0xB9D9, 0xB8BF, 0xB9DA, 0x90AA, 0xB9DB, 0xB8C0,
02280     0xB9DC, 0x90AB, 0xB9DD, 0xB8C1, 0xB9DE, 0xB8C2, 0xB9DF, 0x90AC,
02281     0xB9E0, 0x90AD, 0xB9E1, 0xB8C3, 0xB9E2, 0x90AE, 0xB9E3, 0xB8C4,
02282     0xB9E4, 0xB8C5, 0xB9E5, 0xB8C6, 0xB9E6, 0x90AF, 0xB9E7, 0x90B0,
02283     0xB9E8, 0xB8C7, 0xB9E9, 0x90B1, 0xB9EA, 0x90B2, 0xB9EB, 0x90B3,
02284     0xB9EC, 0xB8C8, 0xB9ED, 0x90B4, 0xB9EE, 0x90B5, 0xB9EF, 0x90B6,
02285     0xB9F0, 0x90B7, 0xB9F1, 0x90B8, 0xB9F2, 0x90B9, 0xB9F3, 0x90BA,
02286     0xB9F4, 0xB8C9, 0xB9F5, 0xB8CA, 0xB9F6, 0x90BB, 0xB9F7, 0xB8CB,
02287     0xB9F8, 0xB8CC, 0xB9F9, 0xB8CD, 0xB9FA, 0xB8CE, 0xB9FB, 0x90BC,
02288     0xB9FC, 0x90BD, 0xB9FD, 0x90BE, 0xB9FE, 0x90BF, 0xB9FF, 0x90C0,
02289     0xBA00, 0xB8CF, 0xBA01, 0xB8D0, 0xBA02, 0x90C1, 0xBA03, 0x90C2,
02290     0xBA04, 0x90C3, 0xBA05, 0x90C4, 0xBA06, 0x90C5, 0xBA07, 0x90C6,
02291     0xBA08, 0xB8D1, 0xBA09, 0x90C7, 0xBA0A, 0x90C8, 0xBA0B, 0x90C9,
02292     0xBA0C, 0x90CA, 0xBA0D, 0x90CB, 0xBA0E, 0x90CC, 0xBA0F, 0x90CD,
02293     0xBA10, 0x90CE, 0xBA11, 0x90CF, 0xBA12, 0x90D0, 0xBA13, 0x90D1,
02294     0xBA14, 0x90D2, 0xBA15, 0xB8D2, 0xBA16, 0x90D3, 0xBA17, 0x90D4,
02295     0xBA18, 0x90D5, 0xBA19, 0x90D6, 0xBA1A, 0x90D7, 0xBA1B, 0x90D8,
02296     0xBA1C, 0x90D9, 0xBA1D, 0x90DA, 0xBA1E, 0x90DB, 0xBA1F, 0x90DC,
02297     0xBA20, 0x90DD, 0xBA21, 0x90DE, 0xBA22, 0x90DF, 0xBA23, 0x90E0,
02298     0xBA24, 0x90E1, 0xBA25, 0x90E2, 0xBA26, 0x90E3, 0xBA27, 0x90E4,
02299     0xBA28, 0x90E5, 0xBA29, 0x90E6, 0xBA2A, 0x90E7, 0xBA2B, 0x90E8,
02300     0xBA2C, 0x90E9, 0xBA2D, 0x90EA, 0xBA2E, 0x90EB, 0xBA2F, 0x90EC,
02301     0xBA30, 0x90ED, 0xBA31, 0x90EE, 0xBA32, 0x90EF, 0xBA33, 0x90F0,
02302     0xBA34, 0x90F1, 0xBA35, 0x90F2, 0xBA36, 0x90F3, 0xBA37, 0x90F4,
02303     0xBA38, 0xB8D3, 0xBA39, 0xB8D4, 0xBA3A, 0x90F5, 0xBA3B, 0x90F6,
02304     0xBA3C, 0xB8D5, 0xBA3D, 0x90F7, 0xBA3E, 0x90F8, 0xBA3F, 0x90F9,
02305     0xBA40, 0xB8D6, 0xBA41, 0x90FA, 0xBA42, 0xB8D7, 0xBA43, 0x90FB,
02306     0xBA44, 0x90FC, 0xBA45, 0x90FD, 0xBA46, 0x90FE, 0xBA47, 0x9141,
02307     0xBA48, 0xB8D8, 0xBA49, 0xB8D9, 0xBA4A, 0x9142, 0xBA4B, 0xB8DA,
02308     0xBA4C, 0x9143, 0xBA4D, 0xB8DB, 0xBA4E, 0xB8DC, 0xBA4F, 0x9144,
02309     0xBA50, 0x9145, 0xBA51, 0x9146, 0xBA52, 0x9147, 0xBA53, 0xB8DD,
02310     0xBA54, 0xB8DE, 0xBA55, 0xB8DF, 0xBA56, 0x9148, 0xBA57, 0x9149,
02311     0xBA58, 0xB8E0, 0xBA59, 0x914A, 0xBA5A, 0x914B, 0xBA5B, 0x914C,
02312     0xBA5C, 0xB8E1, 0xBA5D, 0x914D, 0xBA5E, 0x914E, 0xBA5F, 0x914F,
02313     0xBA60, 0x9150, 0xBA61, 0x9151, 0xBA62, 0x9152, 0xBA63, 0x9153,
02314     0xBA64, 0xB8E2, 0xBA65, 0xB8E3, 0xBA66, 0x9154, 0xBA67, 0xB8E4,
02315     0xBA68, 0xB8E5, 0xBA69, 0xB8E6, 0xBA6A, 0x9155, 0xBA6B, 0x9156,
02316     0xBA6C, 0x9157, 0xBA6D, 0x9158, 0xBA6E, 0x9159, 0xBA6F, 0x915A,
02317     0xBA70, 0xB8E7, 0xBA71, 0xB8E8, 0xBA72, 0x9161, 0xBA73, 0x9162,
02318     0xBA74, 0xB8E9, 0xBA75, 0x9163, 0xBA76, 0x9164, 0xBA77, 0x9165,
02319     0xBA78, 0xB8EA, 0xBA79, 0x9166, 0xBA7A, 0x9167, 0xBA7B, 0x9168,
02320     0xBA7C, 0x9169, 0xBA7D, 0x916A, 0xBA7E, 0x916B, 0xBA7F, 0x916C,
02321     0xBA80, 0x916D, 0xBA81, 0x916E, 0xBA82, 0x916F, 0xBA83, 0xB8EB,
02322     0xBA84, 0xB8EC, 0xBA85, 0xB8ED, 0xBA86, 0x9170, 0xBA87, 0xB8EE,
02323     0xBA88, 0x9171, 0xBA89, 0x9172, 0xBA8A, 0x9173, 0xBA8B, 0x9174,
02324     0xBA8C, 0xB8EF, 0xBA8D, 0x9175, 0xBA8E, 0x9176, 0xBA8F, 0x9177,
02325     0xBA90, 0x9178, 0xBA91, 0x9179, 0xBA92, 0x917A, 0xBA93, 0x9181,
02326     0xBA94, 0x9182, 0xBA95, 0x9183, 0xBA96, 0x9184, 0xBA97, 0x9185,
02327     0xBA98, 0x9186, 0xBA99, 0x9187, 0xBA9A, 0x9188, 0xBA9B, 0x9189,
02328     0xBA9C, 0x918A, 0xBA9D, 0x918B, 0xBA9E, 0x918C, 0xBA9F, 0x918D,
02329     0xBAA0, 0x918E, 0xBAA1, 0x918F, 0xBAA2, 0x9190, 0xBAA3, 0x9191,
02330     0xBAA4, 0x9192, 0xBAA5, 0x9193, 0xBAA6, 0x9194, 0xBAA7, 0x9195,
02331     0xBAA8, 0xB8F0, 0xBAA9, 0xB8F1, 0xBAAA, 0x9196, 0xBAAB, 0xB8F2,
02332     0xBAAC, 0xB8F3, 0xBAAD, 0x9197, 0xBAAE, 0x9198, 0xBAAF, 0x9199,
02333     0xBAB0, 0xB8F4, 0xBAB1, 0x919A, 0xBAB2, 0xB8F5, 0xBAB3, 0x919B,
02334     0xBAB4, 0x919C, 0xBAB5, 0x919D, 0xBAB6, 0x919E, 0xBAB7, 0x919F,
02335     0xBAB8, 0xB8F6, 0xBAB9, 0xB8F7, 0xBABA, 0x91A0, 0xBABB, 0xB8F8,
02336     0xBABC, 0x91A1, 0xBABD, 0xB8F9, 0xBABE, 0x91A2, 0xBABF, 0x91A3,
02337     0xBAC0, 0x91A4, 0xBAC1, 0x91A5, 0xBAC2, 0x91A6, 0xBAC3, 0x91A7,
02338     0xBAC4, 0xB8FA, 0xBAC5, 0x91A8, 0xBAC6, 0x91A9, 0xBAC7, 0x91AA,
02339     0xBAC8, 0xB8FB, 0xBAC9, 0x91AB, 0xBACA, 0x91AC, 0xBACB, 0x91AD,
02340     0xBACC, 0x91AE, 0xBACD, 0x91AF, 0xBACE, 0x91B0, 0xBACF, 0x91B1,
02341     0xBAD0, 0x91B2, 0xBAD1, 0x91B3, 0xBAD2, 0x91B4, 0xBAD3, 0x91B5,
02342     0xBAD4, 0x91B6, 0xBAD5, 0x91B7, 0xBAD6, 0x91B8, 0xBAD7, 0x91B9,
02343     0xBAD8, 0xB8FC, 0xBAD9, 0xB8FD, 0xBADA, 0x91BA, 0xBADB, 0x91BB,
02344     0xBADC, 0x91BC, 0xBADD, 0x91BD, 0xBADE, 0x91BE, 0xBADF, 0x91BF,
02345     0xBAE0, 0x91C0, 0xBAE1, 0x91C1, 0xBAE2, 0x91C2, 0xBAE3, 0x91C3,
02346     0xBAE4, 0x91C4, 0xBAE5, 0x91C5, 0xBAE6, 0x91C6, 0xBAE7, 0x91C7,
02347     0xBAE8, 0x91C8, 0xBAE9, 0x91C9, 0xBAEA, 0x91CA, 0xBAEB, 0x91CB,
02348     0xBAEC, 0x91CC, 0xBAED, 0x91CD, 0xBAEE, 0x91CE, 0xBAEF, 0x91CF,
02349     0xBAF0, 0x91D0, 0xBAF1, 0x91D1, 0xBAF2, 0x91D2, 0xBAF3, 0x91D3,
02350     0xBAF4, 0x91D4, 0xBAF5, 0x91D5, 0xBAF6, 0x91D6, 0xBAF7, 0x91D7,
02351     0xBAF8, 0x91D8, 0xBAF9, 0x91D9, 0xBAFA, 0x91DA, 0xBAFB, 0x91DB,
02352     0xBAFC, 0xB8FE, 0xBAFD, 0x91DC, 0xBAFE, 0x91DD, 0xBAFF, 0x91DE,
02353     0xBB00, 0xB9A1, 0xBB01, 0x91DF, 0xBB02, 0x91E0, 0xBB03, 0x91E1,
02354     0xBB04, 0xB9A2, 0xBB05, 0x91E2, 0xBB06, 0x91E3, 0xBB07, 0x91E4,
02355     0xBB08, 0x91E5, 0xBB09, 0x91E6, 0xBB0A, 0x91E7, 0xBB0B, 0x91E8,
02356     0xBB0C, 0x91E9, 0xBB0D, 0xB9A3, 0xBB0E, 0x91EA, 0xBB0F, 0xB9A4,
02357     0xBB10, 0x91EB, 0xBB11, 0xB9A5, 0xBB12, 0x91EC, 0xBB13, 0x91ED,
02358     0xBB14, 0x91EE, 0xBB15, 0x91EF, 0xBB16, 0x91F0, 0xBB17, 0x91F1,
02359     0xBB18, 0xB9A6, 0xBB19, 0x91F2, 0xBB1A, 0x91F3, 0xBB1B, 0x91F4,
02360     0xBB1C, 0xB9A7, 0xBB1D, 0x91F5, 0xBB1E, 0x91F6, 0xBB1F, 0x91F7,
02361     0xBB20, 0xB9A8, 0xBB21, 0x91F8, 0xBB22, 0x91F9, 0xBB23, 0x91FA,
02362     0xBB24, 0x91FB, 0xBB25, 0x91FC, 0xBB26, 0x91FD, 0xBB27, 0x91FE,
02363     0xBB28, 0x9241, 0xBB29, 0xB9A9, 0xBB2A, 0x9242, 0xBB2B, 0xB9AA,
02364     0xBB2C, 0x9243, 0xBB2D, 0x9244, 0xBB2E, 0x9245, 0xBB2F, 0x9246,
02365     0xBB30, 0x9247, 0xBB31, 0x9248, 0xBB32, 0x9249, 0xBB33, 0x924A,
02366     0xBB34, 0xB9AB, 0xBB35, 0xB9AC, 0xBB36, 0xB9AD, 0xBB37, 0x924B,
02367     0xBB38, 0xB9AE, 0xBB39, 0x924C, 0xBB3A, 0x924D, 0xBB3B, 0xB9AF,
02368     0xBB3C, 0xB9B0, 0xBB3D, 0xB9B1, 0xBB3E, 0xB9B2, 0xBB3F, 0x924E,
02369     0xBB40, 0x924F, 0xBB41, 0x9250, 0xBB42, 0x9251, 0xBB43, 0x9252,
02370     0xBB44, 0xB9B3, 0xBB45, 0xB9B4, 0xBB46, 0x9253, 0xBB47, 0xB9B5,
02371     0xBB48, 0x9254, 0xBB49, 0xB9B6, 0xBB4A, 0x9255, 0xBB4B, 0x9256,
02372     0xBB4C, 0x9257, 0xBB4D, 0xB9B7, 0xBB4E, 0x9258, 0xBB4F, 0xB9B8,
02373     0xBB50, 0xB9B9, 0xBB51, 0x9259, 0xBB52, 0x925A, 0xBB53, 0x9261,
02374     0xBB54, 0xB9BA, 0xBB55, 0x9262, 0xBB56, 0x9263, 0xBB57, 0x9264,
02375     0xBB58, 0xB9BB, 0xBB59, 0x9265, 0xBB5A, 0x9266, 0xBB5B, 0x9267,
02376     0xBB5C, 0x9268, 0xBB5D, 0x9269, 0xBB5E, 0x926A, 0xBB5F, 0x926B,
02377     0xBB60, 0x926C, 0xBB61, 0xB9BC, 0xBB62, 0x926D, 0xBB63, 0xB9BD,
02378     0xBB64, 0x926E, 0xBB65, 0x926F, 0xBB66, 0x9270, 0xBB67, 0x9271,
02379     0xBB68, 0x9272, 0xBB69, 0x9273, 0xBB6A, 0x9274, 0xBB6B, 0x9275,
02380     0xBB6C, 0xB9BE, 0xBB6D, 0x9276, 0xBB6E, 0x9277, 0xBB6F, 0x9278,
02381     0xBB70, 0x9279, 0xBB71, 0x927A, 0xBB72, 0x9281, 0xBB73, 0x9282,
02382     0xBB74, 0x9283, 0xBB75, 0x9284, 0xBB76, 0x9285, 0xBB77, 0x9286,
02383     0xBB78, 0x9287, 0xBB79, 0x9288, 0xBB7A, 0x9289, 0xBB7B, 0x928A,
02384     0xBB7C, 0x928B, 0xBB7D, 0x928C, 0xBB7E, 0x928D, 0xBB7F, 0x928E,
02385     0xBB80, 0x928F, 0xBB81, 0x9290, 0xBB82, 0x9291, 0xBB83, 0x9292,
02386     0xBB84, 0x9293, 0xBB85, 0x9294, 0xBB86, 0x9295, 0xBB87, 0x9296,
02387     0xBB88, 0xB9BF, 0xBB89, 0x9297, 0xBB8A, 0x9298, 0xBB8B, 0x9299,
02388     0xBB8C, 0xB9C0, 0xBB8D, 0x929A, 0xBB8E, 0x929B, 0xBB8F, 0x929C,
02389     0xBB90, 0xB9C1, 0xBB91, 0x929D, 0xBB92, 0x929E, 0xBB93, 0x929F,
02390     0xBB94, 0x92A0, 0xBB95, 0x92A1, 0xBB96, 0x92A2, 0xBB97, 0x92A3,
02391     0xBB98, 0x92A4, 0xBB99, 0x92A5, 0xBB9A, 0x92A6, 0xBB9B, 0x92A7,
02392     0xBB9C, 0x92A8, 0xBB9D, 0x92A9, 0xBB9E, 0x92AA, 0xBB9F, 0x92AB,
02393     0xBBA0, 0x92AC, 0xBBA1, 0x92AD, 0xBBA2, 0x92AE, 0xBBA3, 0x92AF,
02394     0xBBA4, 0xB9C2, 0xBBA5, 0x92B0, 0xBBA6, 0x92B1, 0xBBA7, 0x92B2,
02395     0xBBA8, 0xB9C3, 0xBBA9, 0x92B3, 0xBBAA, 0x92B4, 0xBBAB, 0x92B5,
02396     0xBBAC, 0xB9C4, 0xBBAD, 0x92B6, 0xBBAE, 0x92B7, 0xBBAF, 0x92B8,
02397     0xBBB0, 0x92B9, 0xBBB1, 0x92BA, 0xBBB2, 0x92BB, 0xBBB3, 0x92BC,
02398     0xBBB4, 0xB9C5, 0xBBB5, 0x92BD, 0xBBB6, 0x92BE, 0xBBB7, 0xB9C6,
02399     0xBBB8, 0x92BF, 0xBBB9, 0x92C0, 0xBBBA, 0x92C1, 0xBBBB, 0x92C2,
02400     0xBBBC, 0x92C3, 0xBBBD, 0x92C4, 0xBBBE, 0x92C5, 0xBBBF, 0x92C6,
02401     0xBBC0, 0xB9C7, 0xBBC1, 0x92C7, 0xBBC2, 0x92C8, 0xBBC3, 0x92C9,
02402     0xBBC4, 0xB9C8, 0xBBC5, 0x92CA, 0xBBC6, 0x92CB, 0xBBC7, 0x92CC,
02403     0xBBC8, 0xB9C9, 0xBBC9, 0x92CD, 0xBBCA, 0x92CE, 0xBBCB, 0x92CF,
02404     0xBBCC, 0x92D0, 0xBBCD, 0x92D1, 0xBBCE, 0x92D2, 0xBBCF, 0x92D3,
02405     0xBBD0, 0xB9CA, 0xBBD1, 0x92D4, 0xBBD2, 0x92D5, 0xBBD3, 0xB9CB,
02406     0xBBD4, 0x92D6, 0xBBD5, 0x92D7, 0xBBD6, 0x92D8, 0xBBD7, 0x92D9,
02407     0xBBD8, 0x92DA, 0xBBD9, 0x92DB, 0xBBDA, 0x92DC, 0xBBDB, 0x92DD,
02408     0xBBDC, 0x92DE, 0xBBDD, 0x92DF, 0xBBDE, 0x92E0, 0xBBDF, 0x92E1,
02409     0xBBE0, 0x92E2, 0xBBE1, 0x92E3, 0xBBE2, 0x92E4, 0xBBE3, 0x92E5,
02410     0xBBE4, 0x92E6, 0xBBE5, 0x92E7, 0xBBE6, 0x92E8, 0xBBE7, 0x92E9,
02411     0xBBE8, 0x92EA, 0xBBE9, 0x92EB, 0xBBEA, 0x92EC, 0xBBEB, 0x92ED,
02412     0xBBEC, 0x92EE, 0xBBED, 0x92EF, 0xBBEE, 0x92F0, 0xBBEF, 0x92F1,
02413     0xBBF0, 0x92F2, 0xBBF1, 0x92F3, 0xBBF2, 0x92F4, 0xBBF3, 0x92F5,
02414     0xBBF4, 0x92F6, 0xBBF5, 0x92F7, 0xBBF6, 0x92F8, 0xBBF7, 0x92F9,
02415     0xBBF8, 0xB9CC, 0xBBF9, 0xB9CD, 0xBBFA, 0x92FA, 0xBBFB, 0x92FB,
02416     0xBBFC, 0xB9CE, 0xBBFD, 0x92FC, 0xBBFE, 0x92FD, 0xBBFF, 0xB9CF,
02417     0xBC00, 0xB9D0, 0xBC01, 0x92FE, 0xBC02, 0xB9D1, 0xBC03, 0x9341,
02418     0xBC04, 0x9342, 0xBC05, 0x9343, 0xBC06, 0x9344, 0xBC07, 0x9345,
02419     0xBC08, 0xB9D2, 0xBC09, 0xB9D3, 0xBC0A, 0x9346, 0xBC0B, 0xB9D4,
02420     0xBC0C, 0xB9D5, 0xBC0D, 0xB9D6, 0xBC0E, 0x9347, 0xBC0F, 0xB9D7,
02421     0xBC10, 0x9348, 0xBC11, 0xB9D8, 0xBC12, 0x9349, 0xBC13, 0x934A,
02422     0xBC14, 0xB9D9, 0xBC15, 0xB9DA, 0xBC16, 0xB9DB, 0xBC17, 0xB9DC,
02423     0xBC18, 0xB9DD, 0xBC19, 0x934B, 0xBC1A, 0x934C, 0xBC1B, 0xB9DE,
02424     0xBC1C, 0xB9DF, 0xBC1D, 0xB9E0, 0xBC1E, 0xB9E1, 0xBC1F, 0xB9E2,
02425     0xBC20, 0x934D, 0xBC21, 0x934E, 0xBC22, 0x934F, 0xBC23, 0x9350,
02426     0xBC24, 0xB9E3, 0xBC25, 0xB9E4, 0xBC26, 0x9351, 0xBC27, 0xB9E5,
02427     0xBC28, 0x9352, 0xBC29, 0xB9E6, 0xBC2A, 0x9353, 0xBC2B, 0x9354,
02428     0xBC2C, 0x9355, 0xBC2D, 0xB9E7, 0xBC2E, 0x9356, 0xBC2F, 0x9357,
02429     0xBC30, 0xB9E8, 0xBC31, 0xB9E9, 0xBC32, 0x9358, 0xBC33, 0x9359,
02430     0xBC34, 0xB9EA, 0xBC35, 0x935A, 0xBC36, 0x9361, 0xBC37, 0x9362,
02431     0xBC38, 0xB9EB, 0xBC39, 0x9363, 0xBC3A, 0x9364, 0xBC3B, 0x9365,
02432     0xBC3C, 0x9366, 0xBC3D, 0x9367, 0xBC3E, 0x9368, 0xBC3F, 0x9369,
02433     0xBC40, 0xB9EC, 0xBC41, 0xB9ED, 0xBC42, 0x936A, 0xBC43, 0xB9EE,
02434     0xBC44, 0xB9EF, 0xBC45, 0xB9F0, 0xBC46, 0x936B, 0xBC47, 0x936C,
02435     0xBC48, 0x936D, 0xBC49, 0xB9F1, 0xBC4A, 0x936E, 0xBC4B, 0x936F,
02436     0xBC4C, 0xB9F2, 0xBC4D, 0xB9F3, 0xBC4E, 0x9370, 0xBC4F, 0x9371,
02437     0xBC50, 0xB9F4, 0xBC51, 0x9372, 0xBC52, 0x9373, 0xBC53, 0x9374,
02438     0xBC54, 0x9375, 0xBC55, 0x9376, 0xBC56, 0x9377, 0xBC57, 0x9378,
02439     0xBC58, 0x9379, 0xBC59, 0x937A, 0xBC5A, 0x9381, 0xBC5B, 0x9382,
02440     0xBC5C, 0x9383, 0xBC5D, 0xB9F5, 0xBC5E, 0x9384, 0xBC5F, 0x9385,
02441     0xBC60, 0x9386, 0xBC61, 0x9387, 0xBC62, 0x9388, 0xBC63, 0x9389,
02442     0xBC64, 0x938A, 0xBC65, 0x938B, 0xBC66, 0x938C, 0xBC67, 0x938D,
02443     0xBC68, 0x938E, 0xBC69, 0x938F, 0xBC6A, 0x9390, 0xBC6B, 0x9391,
02444     0xBC6C, 0x9392, 0xBC6D, 0x9393, 0xBC6E, 0x9394, 0xBC6F, 0x9395,
02445     0xBC70, 0x9396, 0xBC71, 0x9397, 0xBC72, 0x9398, 0xBC73, 0x9399,
02446     0xBC74, 0x939A, 0xBC75, 0x939B, 0xBC76, 0x939C, 0xBC77, 0x939D,
02447     0xBC78, 0x939E, 0xBC79, 0x939F, 0xBC7A, 0x93A0, 0xBC7B, 0x93A1,
02448     0xBC7C, 0x93A2, 0xBC7D, 0x93A3, 0xBC7E, 0x93A4, 0xBC7F, 0x93A5,
02449     0xBC80, 0x93A6, 0xBC81, 0x93A7, 0xBC82, 0x93A8, 0xBC83, 0x93A9,
02450     0xBC84, 0xB9F6, 0xBC85, 0xB9F7, 0xBC86, 0x93AA, 0xBC87, 0x93AB,
02451     0xBC88, 0xB9F8, 0xBC89, 0x93AC, 0xBC8A, 0x93AD, 0xBC8B, 0xB9F9,
02452     0xBC8C, 0xB9FA, 0xBC8D, 0x93AE, 0xBC8E, 0xB9FB, 0xBC8F, 0x93AF,
02453     0xBC90, 0x93B0, 0xBC91, 0x93B1, 0xBC92, 0x93B2, 0xBC93, 0x93B3,
02454     0xBC94, 0xB9FC, 0xBC95, 0xB9FD, 0xBC96, 0x93B4, 0xBC97, 0xB9FE,
02455     0xBC98, 0x93B5, 0xBC99, 0xBAA1, 0xBC9A, 0xBAA2, 0xBC9B, 0x93B6,
02456     0xBC9C, 0x93B7, 0xBC9D, 0x93B8, 0xBC9E, 0x93B9, 0xBC9F, 0x93BA,
02457     0xBCA0, 0xBAA3, 0xBCA1, 0xBAA4, 0xBCA2, 0x93BB, 0xBCA3, 0x93BC,
02458     0xBCA4, 0xBAA5, 0xBCA5, 0x93BD, 0xBCA6, 0x93BE, 0xBCA7, 0xBAA6,
02459     0xBCA8, 0xBAA7, 0xBCA9, 0x93BF, 0xBCAA, 0x93C0, 0xBCAB, 0x93C1,
02460     0xBCAC, 0x93C2, 0xBCAD, 0x93C3, 0xBCAE, 0x93C4, 0xBCAF, 0x93C5,
02461     0xBCB0, 0xBAA8, 0xBCB1, 0xBAA9, 0xBCB2, 0x93C6, 0xBCB3, 0xBAAA,
02462     0xBCB4, 0xBAAB, 0xBCB5, 0xBAAC, 0xBCB6, 0x93C7, 0xBCB7, 0x93C8,
02463     0xBCB8, 0x93C9, 0xBCB9, 0x93CA, 0xBCBA, 0x93CB, 0xBCBB, 0x93CC,
02464     0xBCBC, 0xBAAD, 0xBCBD, 0xBAAE, 0xBCBE, 0x93CD, 0xBCBF, 0x93CE,
02465     0xBCC0, 0xBAAF, 0xBCC1, 0x93CF, 0xBCC2, 0x93D0, 0xBCC3, 0x93D1,
02466     0xBCC4, 0xBAB0, 0xBCC5, 0x93D2, 0xBCC6, 0x93D3, 0xBCC7, 0x93D4,
02467     0xBCC8, 0x93D5, 0xBCC9, 0x93D6, 0xBCCA, 0x93D7, 0xBCCB, 0x93D8,
02468     0xBCCC, 0x93D9, 0xBCCD, 0xBAB1, 0xBCCE, 0x93DA, 0xBCCF, 0xBAB2,
02469     0xBCD0, 0xBAB3, 0xBCD1, 0xBAB4, 0xBCD2, 0x93DB, 0xBCD3, 0x93DC,
02470     0xBCD4, 0x93DD, 0xBCD5, 0xBAB5, 0xBCD6, 0x93DE, 0xBCD7, 0x93DF,
02471     0xBCD8, 0xBAB6, 0xBCD9, 0x93E0, 0xBCDA, 0x93E1, 0xBCDB, 0x93E2,
02472     0xBCDC, 0xBAB7, 0xBCDD, 0x93E3, 0xBCDE, 0x93E4, 0xBCDF, 0x93E5,
02473     0xBCE0, 0x93E6, 0xBCE1, 0x93E7, 0xBCE2, 0x93E8, 0xBCE3, 0x93E9,
02474     0xBCE4, 0x93EA, 0xBCE5, 0x93EB, 0xBCE6, 0x93EC, 0xBCE7, 0x93ED,
02475     0xBCE8, 0x93EE, 0xBCE9, 0x93EF, 0xBCEA, 0x93F0, 0xBCEB, 0x93F1,
02476     0xBCEC, 0x93F2, 0xBCED, 0x93F3, 0xBCEE, 0x93F4, 0xBCEF, 0x93F5,
02477     0xBCF0, 0x93F6, 0xBCF1, 0x93F7, 0xBCF2, 0x93F8, 0xBCF3, 0x93F9,
02478     0xBCF4, 0xBAB8, 0xBCF5, 0xBAB9, 0xBCF6, 0xBABA, 0xBCF7, 0x93FA,
02479     0xBCF8, 0xBABB, 0xBCF9, 0x93FB, 0xBCFA, 0x93FC, 0xBCFB, 0x93FD,
02480     0xBCFC, 0xBABC, 0xBCFD, 0x93FE, 0xBCFE, 0x9441, 0xBCFF, 0x9442,
02481     0xBD00, 0x9443, 0xBD01, 0x9444, 0xBD02, 0x9445, 0xBD03, 0x9446,
02482     0xBD04, 0xBABD, 0xBD05, 0xBABE, 0xBD06, 0x9447, 0xBD07, 0xBABF,
02483     0xBD08, 0x9448, 0xBD09, 0xBAC0, 0xBD0A, 0x9449, 0xBD0B, 0x944A,
02484     0xBD0C, 0x944B, 0xBD0D, 0x944C, 0xBD0E, 0x944D, 0xBD0F, 0x944E,
02485     0xBD10, 0xBAC1, 0xBD11, 0x944F, 0xBD12, 0x9450, 0xBD13, 0x9451,
02486     0xBD14, 0xBAC2, 0xBD15, 0x9452, 0xBD16, 0x9453, 0xBD17, 0x9454,
02487     0xBD18, 0x9455, 0xBD19, 0x9456, 0xBD1A, 0x9457, 0xBD1B, 0x9458,
02488     0xBD1C, 0x9459, 0xBD1D, 0x945A, 0xBD1E, 0x9461, 0xBD1F, 0x9462,
02489     0xBD20, 0x9463, 0xBD21, 0x9464, 0xBD22, 0x9465, 0xBD23, 0x9466,
02490     0xBD24, 0xBAC3, 0xBD25, 0x9467, 0xBD26, 0x9468, 0xBD27, 0x9469,
02491     0xBD28, 0x946A, 0xBD29, 0x946B, 0xBD2A, 0x946C, 0xBD2B, 0x946D,
02492     0xBD2C, 0xBAC4, 0xBD2D, 0x946E, 0xBD2E, 0x946F, 0xBD2F, 0x9470,
02493     0xBD30, 0x9471, 0xBD31, 0x9472, 0xBD32, 0x9473, 0xBD33, 0x9474,
02494     0xBD34, 0x9475, 0xBD35, 0x9476, 0xBD36, 0x9477, 0xBD37, 0x9478,
02495     0xBD38, 0x9479, 0xBD39, 0x947A, 0xBD3A, 0x9481, 0xBD3B, 0x9482,
02496     0xBD3C, 0x9483, 0xBD3D, 0x9484, 0xBD3E, 0x9485, 0xBD3F, 0x9486,
02497     0xBD40, 0xBAC5, 0xBD41, 0x9487, 0xBD42, 0x9488, 0xBD43, 0x9489,
02498     0xBD44, 0x948A, 0xBD45, 0x948B, 0xBD46, 0x948C, 0xBD47, 0x948D,
02499     0xBD48, 0xBAC6, 0xBD49, 0xBAC7, 0xBD4A, 0x948E, 0xBD4B, 0x948F,
02500     0xBD4C, 0xBAC8, 0xBD4D, 0x9490, 0xBD4E, 0x9491, 0xBD4F, 0x9492,
02501     0xBD50, 0xBAC9, 0xBD51, 0x9493, 0xBD52, 0x9494, 0xBD53, 0x9495,
02502     0xBD54, 0x9496, 0xBD55, 0x9497, 0xBD56, 0x9498, 0xBD57, 0x9499,
02503     0xBD58, 0xBACA, 0xBD59, 0xBACB, 0xBD5A, 0x949A, 0xBD5B, 0x949B,
02504     0xBD5C, 0x949C, 0xBD5D, 0x949D, 0xBD5E, 0x949E, 0xBD5F, 0x949F,
02505     0xBD60, 0x94A0, 0xBD61, 0x94A1, 0xBD62, 0x94A2, 0xBD63, 0x94A3,
02506     0xBD64, 0xBACC, 0xBD65, 0x94A4, 0xBD66, 0x94A5, 0xBD67, 0x94A6,
02507     0xBD68, 0xBACD, 0xBD69, 0x94A7, 0xBD6A, 0x94A8, 0xBD6B, 0x94A9,
02508     0xBD6C, 0x94AA, 0xBD6D, 0x94AB, 0xBD6E, 0x94AC, 0xBD6F, 0x94AD,
02509     0xBD70, 0x94AE, 0xBD71, 0x94AF, 0xBD72, 0x94B0, 0xBD73, 0x94B1,
02510     0xBD74, 0x94B2, 0xBD75, 0x94B3, 0xBD76, 0x94B4, 0xBD77, 0x94B5,
02511     0xBD78, 0x94B6, 0xBD79, 0x94B7, 0xBD7A, 0x94B8, 0xBD7B, 0x94B9,
02512     0xBD7C, 0x94BA, 0xBD7D, 0x94BB, 0xBD7E, 0x94BC, 0xBD7F, 0x94BD,
02513     0xBD80, 0xBACE, 0xBD81, 0xBACF, 0xBD82, 0x94BE, 0xBD83, 0x94BF,
02514     0xBD84, 0xBAD0, 0xBD85, 0x94C0, 0xBD86, 0x94C1, 0xBD87, 0xBAD1,
02515     0xBD88, 0xBAD2, 0xBD89, 0xBAD3, 0xBD8A, 0xBAD4, 0xBD8B, 0x94C2,
02516     0xBD8C, 0x94C3, 0xBD8D, 0x94C4, 0xBD8E, 0x94C5, 0xBD8F, 0x94C6,
02517     0xBD90, 0xBAD5, 0xBD91, 0xBAD6, 0xBD92, 0x94C7, 0xBD93, 0xBAD7,
02518     0xBD94, 0x94C8, 0xBD95, 0xBAD8, 0xBD96, 0x94C9, 0xBD97, 0x94CA,
02519     0xBD98, 0x94CB, 0xBD99, 0xBAD9, 0xBD9A, 0xBADA, 0xBD9B, 0x94CC,
02520     0xBD9C, 0xBADB, 0xBD9D, 0x94CD, 0xBD9E, 0x94CE, 0xBD9F, 0x94CF,
02521     0xBDA0, 0x94D0, 0xBDA1, 0x94D1, 0xBDA2, 0x94D2, 0xBDA3, 0x94D3,
02522     0xBDA4, 0xBADC, 0xBDA5, 0x94D4, 0xBDA6, 0x94D5, 0xBDA7, 0x94D6,
02523     0xBDA8, 0x94D7, 0xBDA9, 0x94D8, 0xBDAA, 0x94D9, 0xBDAB, 0x94DA,
02524     0xBDAC, 0x94DB, 0xBDAD, 0x94DC, 0xBDAE, 0x94DD, 0xBDAF, 0x94DE,
02525     0xBDB0, 0xBADD, 0xBDB1, 0x94DF, 0xBDB2, 0x94E0, 0xBDB3, 0x94E1,
02526     0xBDB4, 0x94E2, 0xBDB5, 0x94E3, 0xBDB6, 0x94E4, 0xBDB7, 0x94E5,
02527     0xBDB8, 0xBADE, 0xBDB9, 0x94E6, 0xBDBA, 0x94E7, 0xBDBB, 0x94E8,
02528     0xBDBC, 0x94E9, 0xBDBD, 0x94EA, 0xBDBE, 0x94EB, 0xBDBF, 0x94EC,
02529     0xBDC0, 0x94ED, 0xBDC1, 0x94EE, 0xBDC2, 0x94EF, 0xBDC3, 0x94F0,
02530     0xBDC4, 0x94F1, 0xBDC5, 0x94F2, 0xBDC6, 0x94F3, 0xBDC7, 0x94F4,
02531     0xBDC8, 0x94F5, 0xBDC9, 0x94F6, 0xBDCA, 0x94F7, 0xBDCB, 0x94F8,
02532     0xBDCC, 0x94F9, 0xBDCD, 0x94FA, 0xBDCE, 0x94FB, 0xBDCF, 0x94FC,
02533     0xBDD0, 0x94FD, 0xBDD1, 0x94FE, 0xBDD2, 0x9541, 0xBDD3, 0x9542,
02534     0xBDD4, 0xBADF, 0xBDD5, 0xBAE0, 0xBDD6, 0x9543, 0xBDD7, 0x9544,
02535     0xBDD8, 0xBAE1, 0xBDD9, 0x9545, 0xBDDA, 0x9546, 0xBDDB, 0x9547,
02536     0xBDDC, 0xBAE2, 0xBDDD, 0x9548, 0xBDDE, 0x9549, 0xBDDF, 0x954A,
02537     0xBDE0, 0x954B, 0xBDE1, 0x954C, 0xBDE2, 0x954D, 0xBDE3, 0x954E,
02538     0xBDE4, 0x954F, 0xBDE5, 0x9550, 0xBDE6, 0x9551, 0xBDE7, 0x9552,
02539     0xBDE8, 0x9553, 0xBDE9, 0xBAE3, 0xBDEA, 0x9554, 0xBDEB, 0x9555,
02540     0xBDEC, 0x9556, 0xBDED, 0x9557, 0xBDEE, 0x9558, 0xBDEF, 0x9559,
02541     0xBDF0, 0xBAE4, 0xBDF1, 0x955A, 0xBDF2, 0x9561, 0xBDF3, 0x9562,
02542     0xBDF4, 0xBAE5, 0xBDF5, 0x9563, 0xBDF6, 0x9564, 0xBDF7, 0x9565,
02543     0xBDF8, 0xBAE6, 0xBDF9, 0x9566, 0xBDFA, 0x9567, 0xBDFB, 0x9568,
02544     0xBDFC, 0x9569, 0xBDFD, 0x956A, 0xBDFE, 0x956B, 0xBDFF, 0x956C,
02545     0xBE00, 0xBAE7, 0xBE01, 0x956D, 0xBE02, 0x956E, 0xBE03, 0xBAE8,
02546     0xBE04, 0x956F, 0xBE05, 0xBAE9, 0xBE06, 0x9570, 0xBE07, 0x9571,
02547     0xBE08, 0x9572, 0xBE09, 0x9573, 0xBE0A, 0x9574, 0xBE0B, 0x9575,
02548     0xBE0C, 0xBAEA, 0xBE0D, 0xBAEB, 0xBE0E, 0x9576, 0xBE0F, 0x9577,
02549     0xBE10, 0xBAEC, 0xBE11, 0x9578, 0xBE12, 0x9579, 0xBE13, 0x957A,
02550     0xBE14, 0xBAED, 0xBE15, 0x9581, 0xBE16, 0x9582, 0xBE17, 0x9583,
02551     0xBE18, 0x9584, 0xBE19, 0x9585, 0xBE1A, 0x9586, 0xBE1B, 0x9587,
02552     0xBE1C, 0xBAEE, 0xBE1D, 0xBAEF, 0xBE1E, 0x9588, 0xBE1F, 0xBAF0,
02553     0xBE20, 0x9589, 0xBE21, 0x958A, 0xBE22, 0x958B, 0xBE23, 0x958C,
02554     0xBE24, 0x958D, 0xBE25, 0x958E, 0xBE26, 0x958F, 0xBE27, 0x9590,
02555     0xBE28, 0x9591, 0xBE29, 0x9592, 0xBE2A, 0x9593, 0xBE2B, 0x9594,
02556     0xBE2C, 0x9595, 0xBE2D, 0x9596, 0xBE2E, 0x9597, 0xBE2F, 0x9598,
02557     0xBE30, 0x9599, 0xBE31, 0x959A, 0xBE32, 0x959B, 0xBE33, 0x959C,
02558     0xBE34, 0x959D, 0xBE35, 0x959E, 0xBE36, 0x959F, 0xBE37, 0x95A0,
02559     0xBE38, 0x95A1, 0xBE39, 0x95A2, 0xBE3A, 0x95A3, 0xBE3B, 0x95A4,
02560     0xBE3C, 0x95A5, 0xBE3D, 0x95A6, 0xBE3E, 0x95A7, 0xBE3F, 0x95A8,
02561     0xBE40, 0x95A9, 0xBE41, 0x95AA, 0xBE42, 0x95AB, 0xBE43, 0x95AC,
02562     0xBE44, 0xBAF1, 0xBE45, 0xBAF2, 0xBE46, 0x95AD, 0xBE47, 0x95AE,
02563     0xBE48, 0xBAF3, 0xBE49, 0x95AF, 0xBE4A, 0x95B0, 0xBE4B, 0x95B1,
02564     0xBE4C, 0xBAF4, 0xBE4D, 0x95B2, 0xBE4E, 0xBAF5, 0xBE4F, 0x95B3,
02565     0xBE50, 0x95B4, 0xBE51, 0x95B5, 0xBE52, 0x95B6, 0xBE53, 0x95B7,
02566     0xBE54, 0xBAF6, 0xBE55, 0xBAF7, 0xBE56, 0x95B8, 0xBE57, 0xBAF8,
02567     0xBE58, 0x95B9, 0xBE59, 0xBAF9, 0xBE5A, 0xBAFA, 0xBE5B, 0xBAFB,
02568     0xBE5C, 0x95BA, 0xBE5D, 0x95BB, 0xBE5E, 0x95BC, 0xBE5F, 0x95BD,
02569     0xBE60, 0xBAFC, 0xBE61, 0xBAFD, 0xBE62, 0x95BE, 0xBE63, 0x95BF,
02570     0xBE64, 0xBAFE, 0xBE65, 0x95C0, 0xBE66, 0x95C1, 0xBE67, 0x95C2,
02571     0xBE68, 0xBBA1, 0xBE69, 0x95C3, 0xBE6A, 0xBBA2, 0xBE6B, 0x95C4,
02572     0xBE6C, 0x95C5, 0xBE6D, 0x95C6, 0xBE6E, 0x95C7, 0xBE6F, 0x95C8,
02573     0xBE70, 0xBBA3, 0xBE71, 0xBBA4, 0xBE72, 0x95C9, 0xBE73, 0xBBA5,
02574     0xBE74, 0xBBA6, 0xBE75, 0xBBA7, 0xBE76, 0x95CA, 0xBE77, 0x95CB,
02575     0xBE78, 0x95CC, 0xBE79, 0x95CD, 0xBE7A, 0x95CE, 0xBE7B, 0xBBA8,
02576     0xBE7C, 0xBBA9, 0xBE7D, 0xBBAA, 0xBE7E, 0x95CF, 0xBE7F, 0x95D0,
02577     0xBE80, 0xBBAB, 0xBE81, 0x95D1, 0xBE82, 0x95D2, 0xBE83, 0x95D3,
02578     0xBE84, 0xBBAC, 0xBE85, 0x95D4, 0xBE86, 0x95D5, 0xBE87, 0x95D6,
02579     0xBE88, 0x95D7, 0xBE89, 0x95D8, 0xBE8A, 0x95D9, 0xBE8B, 0x95DA,
02580     0xBE8C, 0xBBAD, 0xBE8D, 0xBBAE, 0xBE8E, 0x95DB, 0xBE8F, 0xBBAF,
02581     0xBE90, 0xBBB0, 0xBE91, 0xBBB1, 0xBE92, 0x95DC, 0xBE93, 0x95DD,
02582     0xBE94, 0x95DE, 0xBE95, 0x95DF, 0xBE96, 0x95E0, 0xBE97, 0x95E1,
02583     0xBE98, 0xBBB2, 0xBE99, 0xBBB3, 0xBE9A, 0x95E2, 0xBE9B, 0x95E3,
02584     0xBE9C, 0x95E4, 0xBE9D, 0x95E5, 0xBE9E, 0x95E6, 0xBE9F, 0x95E7,
02585     0xBEA0, 0x95E8, 0xBEA1, 0x95E9, 0xBEA2, 0x95EA, 0xBEA3, 0x95EB,
02586     0xBEA4, 0x95EC, 0xBEA5, 0x95ED, 0xBEA6, 0x95EE, 0xBEA7, 0x95EF,
02587     0xBEA8, 0xBBB4, 0xBEA9, 0x95F0, 0xBEAA, 0x95F1, 0xBEAB, 0x95F2,
02588     0xBEAC, 0x95F3, 0xBEAD, 0x95F4, 0xBEAE, 0x95F5, 0xBEAF, 0x95F6,
02589     0xBEB0, 0x95F7, 0xBEB1, 0x95F8, 0xBEB2, 0x95F9, 0xBEB3, 0x95FA,
02590     0xBEB4, 0x95FB, 0xBEB5, 0x95FC, 0xBEB6, 0x95FD, 0xBEB7, 0x95FE,
02591     0xBEB8, 0x9641, 0xBEB9, 0x9642, 0xBEBA, 0x9643, 0xBEBB, 0x9644,
02592     0xBEBC, 0x9645, 0xBEBD, 0x9646, 0xBEBE, 0x9647, 0xBEBF, 0x9648,
02593     0xBEC0, 0x9649, 0xBEC1, 0x964A, 0xBEC2, 0x964B, 0xBEC3, 0x964C,
02594     0xBEC4, 0x964D, 0xBEC5, 0x964E, 0xBEC6, 0x964F, 0xBEC7, 0x9650,
02595     0xBEC8, 0x9651, 0xBEC9, 0x9652, 0xBECA, 0x9653, 0xBECB, 0x9654,
02596     0xBECC, 0x9655, 0xBECD, 0x9656, 0xBECE, 0x9657, 0xBECF, 0x9658,
02597     0xBED0, 0xBBB5, 0xBED1, 0xBBB6, 0xBED2, 0x9659, 0xBED3, 0x965A,
02598     0xBED4, 0xBBB7, 0xBED5, 0x9661, 0xBED6, 0x9662, 0xBED7, 0xBBB8,
02599     0xBED8, 0xBBB9, 0xBED9, 0x9663, 0xBEDA, 0x9664, 0xBEDB, 0x9665,
02600     0xBEDC, 0x9666, 0xBEDD, 0x9667, 0xBEDE, 0x9668, 0xBEDF, 0x9669,
02601     0xBEE0, 0xBBBA, 0xBEE1, 0x966A, 0xBEE2, 0x966B, 0xBEE3, 0xBBBB,
02602     0xBEE4, 0xBBBC, 0xBEE5, 0xBBBD, 0xBEE6, 0x966C, 0xBEE7, 0x966D,
02603     0xBEE8, 0x966E, 0xBEE9, 0x966F, 0xBEEA, 0x9670, 0xBEEB, 0x9671,
02604     0xBEEC, 0xBBBE, 0xBEED, 0x9672, 0xBEEE, 0x9673, 0xBEEF, 0x9674,
02605     0xBEF0, 0x9675, 0xBEF1, 0x9676, 0xBEF2, 0x9677, 0xBEF3, 0x9678,
02606     0xBEF4, 0x9679, 0xBEF5, 0x967A, 0xBEF6, 0x9681, 0xBEF7, 0x9682,
02607     0xBEF8, 0x9683, 0xBEF9, 0x9684, 0xBEFA, 0x9685, 0xBEFB, 0x9686,
02608     0xBEFC, 0x9687, 0xBEFD, 0x9688, 0xBEFE, 0x9689, 0xBEFF, 0x968A,
02609     0xBF00, 0x968B, 0xBF01, 0xBBBF, 0xBF02, 0x968C, 0xBF03, 0x968D,
02610     0xBF04, 0x968E, 0xBF05, 0x968F, 0xBF06, 0x9690, 0xBF07, 0x9691,
02611     0xBF08, 0xBBC0, 0xBF09, 0xBBC1, 0xBF0A, 0x9692, 0xBF0B, 0x9693,
02612     0xBF0C, 0x9694, 0xBF0D, 0x9695, 0xBF0E, 0x9696, 0xBF0F, 0x9697,
02613     0xBF10, 0x9698, 0xBF11, 0x9699, 0xBF12, 0x969A, 0xBF13, 0x969B,
02614     0xBF14, 0x969C, 0xBF15, 0x969D, 0xBF16, 0x969E, 0xBF17, 0x969F,
02615     0xBF18, 0xBBC2, 0xBF19, 0xBBC3, 0xBF1A, 0x96A0, 0xBF1B, 0xBBC4,
02616     0xBF1C, 0xBBC5, 0xBF1D, 0xBBC6, 0xBF1E, 0x96A1, 0xBF1F, 0x96A2,
02617     0xBF20, 0x96A3, 0xBF21, 0x96A4, 0xBF22, 0x96A5, 0xBF23, 0x96A6,
02618     0xBF24, 0x96A7, 0xBF25, 0x96A8, 0xBF26, 0x96A9, 0xBF27, 0x96AA,
02619     0xBF28, 0x96AB, 0xBF29, 0x96AC, 0xBF2A, 0x96AD, 0xBF2B, 0x96AE,
02620     0xBF2C, 0x96AF, 0xBF2D, 0x96B0, 0xBF2E, 0x96B1, 0xBF2F, 0x96B2,
02621     0xBF30, 0x96B3, 0xBF31, 0x96B4, 0xBF32, 0x96B5, 0xBF33, 0x96B6,
02622     0xBF34, 0x96B7, 0xBF35, 0x96B8, 0xBF36, 0x96B9, 0xBF37, 0x96BA,
02623     0xBF38, 0x96BB, 0xBF39, 0x96BC, 0xBF3A, 0x96BD, 0xBF3B, 0x96BE,
02624     0xBF3C, 0x96BF, 0xBF3D, 0x96C0, 0xBF3E, 0x96C1, 0xBF3F, 0x96C2,
02625     0xBF40, 0xBBC7, 0xBF41, 0xBBC8, 0xBF42, 0x96C3, 0xBF43, 0x96C4,
02626     0xBF44, 0xBBC9, 0xBF45, 0x96C5, 0xBF46, 0x96C6, 0xBF47, 0x96C7,
02627     0xBF48, 0xBBCA, 0xBF49, 0x96C8, 0xBF4A, 0x96C9, 0xBF4B, 0x96CA,
02628     0xBF4C, 0x96CB, 0xBF4D, 0x96CC, 0xBF4E, 0x96CD, 0xBF4F, 0x96CE,
02629     0xBF50, 0xBBCB, 0xBF51, 0xBBCC, 0xBF52, 0x96CF, 0xBF53, 0x96D0,
02630     0xBF54, 0x96D1, 0xBF55, 0xBBCD, 0xBF56, 0x96D2, 0xBF57, 0x96D3,
02631     0xBF58, 0x96D4, 0xBF59, 0x96D5, 0xBF5A, 0x96D6, 0xBF5B, 0x96D7,
02632     0xBF5C, 0x96D8, 0xBF5D, 0x96D9, 0xBF5E, 0x96DA, 0xBF5F, 0x96DB,
02633     0xBF60, 0x96DC, 0xBF61, 0x96DD, 0xBF62, 0x96DE, 0xBF63, 0x96DF,
02634     0xBF64, 0x96E0, 0xBF65, 0x96E1, 0xBF66, 0x96E2, 0xBF67, 0x96E3,
02635     0xBF68, 0x96E4, 0xBF69, 0x96E5, 0xBF6A, 0x96E6, 0xBF6B, 0x96E7,
02636     0xBF6C, 0x96E8, 0xBF6D, 0x96E9, 0xBF6E, 0x96EA, 0xBF6F, 0x96EB,
02637     0xBF70, 0x96EC, 0xBF71, 0x96ED, 0xBF72, 0x96EE, 0xBF73, 0x96EF,
02638     0xBF74, 0x96F0, 0xBF75, 0x96F1, 0xBF76, 0x96F2, 0xBF77, 0x96F3,
02639     0xBF78, 0x96F4, 0xBF79, 0x96F5, 0xBF7A, 0x96F6, 0xBF7B, 0x96F7,
02640     0xBF7C, 0x96F8, 0xBF7D, 0x96F9, 0xBF7E, 0x96FA, 0xBF7F, 0x96FB,
02641     0xBF80, 0x96FC, 0xBF81, 0x96FD, 0xBF82, 0x96FE, 0xBF83, 0x9741,
02642     0xBF84, 0x9742, 0xBF85, 0x9743, 0xBF86, 0x9744, 0xBF87, 0x9745,
02643     0xBF88, 0x9746, 0xBF89, 0x9747, 0xBF8A, 0x9748, 0xBF8B, 0x9749,
02644     0xBF8C, 0x974A, 0xBF8D, 0x974B, 0xBF8E, 0x974C, 0xBF8F, 0x974D,
02645     0xBF90, 0x974E, 0xBF91, 0x974F, 0xBF92, 0x9750, 0xBF93, 0x9751,
02646     0xBF94, 0xBBCE, 0xBF95, 0x9752, 0xBF96, 0x9753, 0xBF97, 0x9754,
02647     0xBF98, 0x9755, 0xBF99, 0x9756, 0xBF9A, 0x9757, 0xBF9B, 0x9758,
02648     0xBF9C, 0x9759, 0xBF9D, 0x975A, 0xBF9E, 0x9761, 0xBF9F, 0x9762,
02649     0xBFA0, 0x9763, 0xBFA1, 0x9764, 0xBFA2, 0x9765, 0xBFA3, 0x9766,
02650     0xBFA4, 0x9767, 0xBFA5, 0x9768, 0xBFA6, 0x9769, 0xBFA7, 0x976A,
02651     0xBFA8, 0x976B, 0xBFA9, 0x976C, 0xBFAA, 0x976D, 0xBFAB, 0x976E,
02652     0xBFAC, 0x976F, 0xBFAD, 0x9770, 0xBFAE, 0x9771, 0xBFAF, 0x9772,
02653     0xBFB0, 0xBBCF, 0xBFB1, 0x9773, 0xBFB2, 0x9774, 0xBFB3, 0x9775,
02654     0xBFB4, 0x9776, 0xBFB5, 0x9777, 0xBFB6, 0x9778, 0xBFB7, 0x9779,
02655     0xBFB8, 0x977A, 0xBFB9, 0x9781, 0xBFBA, 0x9782, 0xBFBB, 0x9783,
02656     0xBFBC, 0x9784, 0xBFBD, 0x9785, 0xBFBE, 0x9786, 0xBFBF, 0x9787,
02657     0xBFC0, 0x9788, 0xBFC1, 0x9789, 0xBFC2, 0x978A, 0xBFC3, 0x978B,
02658     0xBFC4, 0x978C, 0xBFC5, 0xBBD0, 0xBFC6, 0x978D, 0xBFC7, 0x978E,
02659     0xBFC8, 0x978F, 0xBFC9, 0x9790, 0xBFCA, 0x9791, 0xBFCB, 0x9792,
02660     0xBFCC, 0xBBD1, 0xBFCD, 0xBBD2, 0xBFCE, 0x9793, 0xBFCF, 0x9794,
02661     0xBFD0, 0xBBD3, 0xBFD1, 0x9795, 0xBFD2, 0x9796, 0xBFD3, 0x9797,
02662     0xBFD4, 0xBBD4, 0xBFD5, 0x9798, 0xBFD6, 0x9799, 0xBFD7, 0x979A,
02663     0xBFD8, 0x979B, 0xBFD9, 0x979C, 0xBFDA, 0x979D, 0xBFDB, 0x979E,
02664     0xBFDC, 0xBBD5, 0xBFDD, 0x979F, 0xBFDE, 0x97A0, 0xBFDF, 0xBBD6,
02665     0xBFE0, 0x97A1, 0xBFE1, 0xBBD7, 0xBFE2, 0x97A2, 0xBFE3, 0x97A3,
02666     0xBFE4, 0x97A4, 0xBFE5, 0x97A5, 0xBFE6, 0x97A6, 0xBFE7, 0x97A7,
02667     0xBFE8, 0x97A8, 0xBFE9, 0x97A9, 0xBFEA, 0x97AA, 0xBFEB, 0x97AB,
02668     0xBFEC, 0x97AC, 0xBFED, 0x97AD, 0xBFEE, 0x97AE, 0xBFEF, 0x97AF,
02669     0xBFF0, 0x97B0, 0xBFF1, 0x97B1, 0xBFF2, 0x97B2, 0xBFF3, 0x97B3,
02670     0xBFF4, 0x97B4, 0xBFF5, 0x97B5, 0xBFF6, 0x97B6, 0xBFF7, 0x97B7,
02671     0xBFF8, 0x97B8, 0xBFF9, 0x97B9, 0xBFFA, 0x97BA, 0xBFFB, 0x97BB,
02672     0xBFFC, 0x97BC, 0xBFFD, 0x97BD, 0xBFFE, 0x97BE, 0xBFFF, 0x97BF,
02673     0xC000, 0x97C0, 0xC001, 0x97C1, 0xC002, 0x97C2, 0xC003, 0x97C3,
02674     0xC004, 0x97C4, 0xC005, 0x97C5, 0xC006, 0x97C6, 0xC007, 0x97C7,
02675     0xC008, 0x97C8, 0xC009, 0x97C9, 0xC00A, 0x97CA, 0xC00B, 0x97CB,
02676     0xC00C, 0x97CC, 0xC00D, 0x97CD, 0xC00E, 0x97CE, 0xC00F, 0x97CF,
02677     0xC010, 0x97D0, 0xC011, 0x97D1, 0xC012, 0x97D2, 0xC013, 0x97D3,
02678     0xC014, 0x97D4, 0xC015, 0x97D5, 0xC016, 0x97D6, 0xC017, 0x97D7,
02679     0xC018, 0x97D8, 0xC019, 0x97D9, 0xC01A, 0x97DA, 0xC01B, 0x97DB,
02680     0xC01C, 0x97DC, 0xC01D, 0x97DD, 0xC01E, 0x97DE, 0xC01F, 0x97DF,
02681     0xC020, 0x97E0, 0xC021, 0x97E1, 0xC022, 0x97E2, 0xC023, 0x97E3,
02682     0xC024, 0x97E4, 0xC025, 0x97E5, 0xC026, 0x97E6, 0xC027, 0x97E7,
02683     0xC028, 0x97E8, 0xC029, 0x97E9, 0xC02A, 0x97EA, 0xC02B, 0x97EB,
02684     0xC02C, 0x97EC, 0xC02D, 0x97ED, 0xC02E, 0x97EE, 0xC02F, 0x97EF,
02685     0xC030, 0x97F0, 0xC031, 0x97F1, 0xC032, 0x97F2, 0xC033, 0x97F3,
02686     0xC034, 0x97F4, 0xC035, 0x97F5, 0xC036, 0x97F6, 0xC037, 0x97F7,
02687     0xC038, 0x97F8, 0xC039, 0x97F9, 0xC03A, 0x97FA, 0xC03B, 0x97FB,
02688     0xC03C, 0xBBD8, 0xC03D, 0x97FC, 0xC03E, 0x97FD, 0xC03F, 0x97FE,
02689     0xC040, 0x9841, 0xC041, 0x9842, 0xC042, 0x9843, 0xC043, 0x9844,
02690     0xC044, 0x9845, 0xC045, 0x9846, 0xC046, 0x9847, 0xC047, 0x9848,
02691     0xC048, 0x9849, 0xC049, 0x984A, 0xC04A, 0x984B, 0xC04B, 0x984C,
02692     0xC04C, 0x984D, 0xC04D, 0x984E, 0xC04E, 0x984F, 0xC04F, 0x9850,
02693     0xC050, 0x9851, 0xC051, 0xBBD9, 0xC052, 0x9852, 0xC053, 0x9853,
02694     0xC054, 0x9854, 0xC055, 0x9855, 0xC056, 0x9856, 0xC057, 0x9857,
02695     0xC058, 0xBBDA, 0xC059, 0x9858, 0xC05A, 0x9859, 0xC05B, 0x985A,
02696     0xC05C, 0xBBDB, 0xC05D, 0x9861, 0xC05E, 0x9862, 0xC05F, 0x9863,
02697     0xC060, 0xBBDC, 0xC061, 0x9864, 0xC062, 0x9865, 0xC063, 0x9866,
02698     0xC064, 0x9867, 0xC065, 0x9868, 0xC066, 0x9869, 0xC067, 0x986A,
02699     0xC068, 0xBBDD, 0xC069, 0xBBDE, 0xC06A, 0x986B, 0xC06B, 0x986C,
02700     0xC06C, 0x986D, 0xC06D, 0x986E, 0xC06E, 0x986F, 0xC06F, 0x9870,
02701     0xC070, 0x9871, 0xC071, 0x9872, 0xC072, 0x9873, 0xC073, 0x9874,
02702     0xC074, 0x9875, 0xC075, 0x9876, 0xC076, 0x9877, 0xC077, 0x9878,
02703     0xC078, 0x9879, 0xC079, 0x987A, 0xC07A, 0x9881, 0xC07B, 0x9882,
02704     0xC07C, 0x9883, 0xC07D, 0x9884, 0xC07E, 0x9885, 0xC07F, 0x9886,
02705     0xC080, 0x9887, 0xC081, 0x9888, 0xC082, 0x9889, 0xC083, 0x988A,
02706     0xC084, 0x988B, 0xC085, 0x988C, 0xC086, 0x988D, 0xC087, 0x988E,
02707     0xC088, 0x988F, 0xC089, 0x9890, 0xC08A, 0x9891, 0xC08B, 0x9892,
02708     0xC08C, 0x9893, 0xC08D, 0x9894, 0xC08E, 0x9895, 0xC08F, 0x9896,
02709     0xC090, 0xBBDF, 0xC091, 0xBBE0, 0xC092, 0x9897, 0xC093, 0x9898,
02710     0xC094, 0xBBE1, 0xC095, 0x9899, 0xC096, 0x989A, 0xC097, 0x989B,
02711     0xC098, 0xBBE2, 0xC099, 0x989C, 0xC09A, 0x989D, 0xC09B, 0x989E,
02712     0xC09C, 0x989F, 0xC09D, 0x98A0, 0xC09E, 0x98A1, 0xC09F, 0x98A2,
02713     0xC0A0, 0xBBE3, 0xC0A1, 0xBBE4, 0xC0A2, 0x98A3, 0xC0A3, 0xBBE5,
02714     0xC0A4, 0x98A4, 0xC0A5, 0xBBE6, 0xC0A6, 0x98A5, 0xC0A7, 0x98A6,
02715     0xC0A8, 0x98A7, 0xC0A9, 0x98A8, 0xC0AA, 0x98A9, 0xC0AB, 0x98AA,
02716     0xC0AC, 0xBBE7, 0xC0AD, 0xBBE8, 0xC0AE, 0x98AB, 0xC0AF, 0xBBE9,
02717     0xC0B0, 0xBBEA, 0xC0B1, 0x98AC, 0xC0B2, 0x98AD, 0xC0B3, 0xBBEB,
02718     0xC0B4, 0xBBEC, 0xC0B5, 0xBBED, 0xC0B6, 0xBBEE, 0xC0B7, 0x98AE,
02719     0xC0B8, 0x98AF, 0xC0B9, 0x98B0, 0xC0BA, 0x98B1, 0xC0BB, 0x98B2,
02720     0xC0BC, 0xBBEF, 0xC0BD, 0xBBF0, 0xC0BE, 0x98B3, 0xC0BF, 0xBBF1,
02721     0xC0C0, 0xBBF2, 0xC0C1, 0xBBF3, 0xC0C2, 0x98B4, 0xC0C3, 0x98B5,
02722     0xC0C4, 0x98B6, 0xC0C5, 0xBBF4, 0xC0C6, 0x98B7, 0xC0C7, 0x98B8,
02723     0xC0C8, 0xBBF5, 0xC0C9, 0xBBF6, 0xC0CA, 0x98B9, 0xC0CB, 0x98BA,
02724     0xC0CC, 0xBBF7, 0xC0CD, 0x98BB, 0xC0CE, 0x98BC, 0xC0CF, 0x98BD,
02725     0xC0D0, 0xBBF8, 0xC0D1, 0x98BE, 0xC0D2, 0x98BF, 0xC0D3, 0x98C0,
02726     0xC0D4, 0x98C1, 0xC0D5, 0x98C2, 0xC0D6, 0x98C3, 0xC0D7, 0x98C4,
02727     0xC0D8, 0xBBF9, 0xC0D9, 0xBBFA, 0xC0DA, 0x98C5, 0xC0DB, 0xBBFB,
02728     0xC0DC, 0xBBFC, 0xC0DD, 0xBBFD, 0xC0DE, 0x98C6, 0xC0DF, 0x98C7,
02729     0xC0E0, 0x98C8, 0xC0E1, 0x98C9, 0xC0E2, 0x98CA, 0xC0E3, 0x98CB,
02730     0xC0E4, 0xBBFE, 0xC0E5, 0xBCA1, 0xC0E6, 0x98CC, 0xC0E7, 0x98CD,
02731     0xC0E8, 0xBCA2, 0xC0E9, 0x98CE, 0xC0EA, 0x98CF, 0xC0EB, 0x98D0,
02732     0xC0EC, 0xBCA3, 0xC0ED, 0x98D1, 0xC0EE, 0x98D2, 0xC0EF, 0x98D3,
02733     0xC0F0, 0x98D4, 0xC0F1, 0x98D5, 0xC0F2, 0x98D6, 0xC0F3, 0x98D7,
02734     0xC0F4, 0xBCA4, 0xC0F5, 0xBCA5, 0xC0F6, 0x98D8, 0xC0F7, 0xBCA6,
02735     0xC0F8, 0x98D9, 0xC0F9, 0xBCA7, 0xC0FA, 0x98DA, 0xC0FB, 0x98DB,
02736     0xC0FC, 0x98DC, 0xC0FD, 0x98DD, 0xC0FE, 0x98DE, 0xC0FF, 0x98DF,
02737     0xC100, 0xBCA8, 0xC101, 0x98E0, 0xC102, 0x98E1, 0xC103, 0x98E2,
02738     0xC104, 0xBCA9, 0xC105, 0x98E3, 0xC106, 0x98E4, 0xC107, 0x98E5,
02739     0xC108, 0xBCAA, 0xC109, 0x98E6, 0xC10A, 0x98E7, 0xC10B, 0x98E8,
02740     0xC10C, 0x98E9, 0xC10D, 0x98EA, 0xC10E, 0x98EB, 0xC10F, 0x98EC,
02741     0xC110, 0xBCAB, 0xC111, 0x98ED, 0xC112, 0x98EE, 0xC113, 0x98EF,
02742     0xC114, 0x98F0, 0xC115, 0xBCAC, 0xC116, 0x98F1, 0xC117, 0x98F2,
02743     0xC118, 0x98F3, 0xC119, 0x98F4, 0xC11A, 0x98F5, 0xC11B, 0x98F6,
02744     0xC11C, 0xBCAD, 0xC11D, 0xBCAE, 0xC11E, 0xBCAF, 0xC11F, 0xBCB0,
02745     0xC120, 0xBCB1, 0xC121, 0x98F7, 0xC122, 0x98F8, 0xC123, 0xBCB2,
02746     0xC124, 0xBCB3, 0xC125, 0x98F9, 0xC126, 0xBCB4, 0xC127, 0xBCB5,
02747     0xC128, 0x98FA, 0xC129, 0x98FB, 0xC12A, 0x98FC, 0xC12B, 0x98FD,
02748     0xC12C, 0xBCB6, 0xC12D, 0xBCB7, 0xC12E, 0x98FE, 0xC12F, 0xBCB8,
02749     0xC130, 0xBCB9, 0xC131, 0xBCBA, 0xC132, 0x9941, 0xC133, 0x9942,
02750     0xC134, 0x9943, 0xC135, 0x9944, 0xC136, 0xBCBB, 0xC137, 0x9945,
02751     0xC138, 0xBCBC, 0xC139, 0xBCBD, 0xC13A, 0x9946, 0xC13B, 0x9947,
02752     0xC13C, 0xBCBE, 0xC13D, 0x9948, 0xC13E, 0x9949, 0xC13F, 0x994A,
02753     0xC140, 0xBCBF, 0xC141, 0x994B, 0xC142, 0x994C, 0xC143, 0x994D,
02754     0xC144, 0x994E, 0xC145, 0x994F, 0xC146, 0x9950, 0xC147, 0x9951,
02755     0xC148, 0xBCC0, 0xC149, 0xBCC1, 0xC14A, 0x9952, 0xC14B, 0xBCC2,
02756     0xC14C, 0xBCC3, 0xC14D, 0xBCC4, 0xC14E, 0x9953, 0xC14F, 0x9954,
02757     0xC150, 0x9955, 0xC151, 0x9956, 0xC152, 0x9957, 0xC153, 0x9958,
02758     0xC154, 0xBCC5, 0xC155, 0xBCC6, 0xC156, 0x9959, 0xC157, 0x995A,
02759     0xC158, 0xBCC7, 0xC159, 0x9961, 0xC15A, 0x9962, 0xC15B, 0x9963,
02760     0xC15C, 0xBCC8, 0xC15D, 0x9964, 0xC15E, 0x9965, 0xC15F, 0x9966,
02761     0xC160, 0x9967, 0xC161, 0x9968, 0xC162, 0x9969, 0xC163, 0x996A,
02762     0xC164, 0xBCC9, 0xC165, 0xBCCA, 0xC166, 0x996B, 0xC167, 0xBCCB,
02763     0xC168, 0xBCCC, 0xC169, 0xBCCD, 0xC16A, 0x996C, 0xC16B, 0x996D,
02764     0xC16C, 0x996E, 0xC16D, 0x996F, 0xC16E, 0x9970, 0xC16F, 0x9971,
02765     0xC170, 0xBCCE, 0xC171, 0x9972, 0xC172, 0x9973, 0xC173, 0x9974,
02766     0xC174, 0xBCCF, 0xC175, 0x9975, 0xC176, 0x9976, 0xC177, 0x9977,
02767     0xC178, 0xBCD0, 0xC179, 0x9978, 0xC17A, 0x9979, 0xC17B, 0x997A,
02768     0xC17C, 0x9981, 0xC17D, 0x9982, 0xC17E, 0x9983, 0xC17F, 0x9984,
02769     0xC180, 0x9985, 0xC181, 0x9986, 0xC182, 0x9987, 0xC183, 0x9988,
02770     0xC184, 0x9989, 0xC185, 0xBCD1, 0xC186, 0x998A, 0xC187, 0x998B,
02771     0xC188, 0x998C, 0xC189, 0x998D, 0xC18A, 0x998E, 0xC18B, 0x998F,
02772     0xC18C, 0xBCD2, 0xC18D, 0xBCD3, 0xC18E, 0xBCD4, 0xC18F, 0x9990,
02773     0xC190, 0xBCD5, 0xC191, 0x9991, 0xC192, 0x9992, 0xC193, 0x9993,
02774     0xC194, 0xBCD6, 0xC195, 0x9994, 0xC196, 0xBCD7, 0xC197, 0x9995,
02775     0xC198, 0x9996, 0xC199, 0x9997, 0xC19A, 0x9998, 0xC19B, 0x9999,
02776     0xC19C, 0xBCD8, 0xC19D, 0xBCD9, 0xC19E, 0x999A, 0xC19F, 0xBCDA,
02777     0xC1A0, 0x999B, 0xC1A1, 0xBCDB, 0xC1A2, 0x999C, 0xC1A3, 0x999D,
02778     0xC1A4, 0x999E, 0xC1A5, 0xBCDC, 0xC1A6, 0x999F, 0xC1A7, 0x99A0,
02779     0xC1A8, 0xBCDD, 0xC1A9, 0xBCDE, 0xC1AA, 0x99A1, 0xC1AB, 0x99A2,
02780     0xC1AC, 0xBCDF, 0xC1AD, 0x99A3, 0xC1AE, 0x99A4, 0xC1AF, 0x99A5,
02781     0xC1B0, 0xBCE0, 0xC1B1, 0x99A6, 0xC1B2, 0x99A7, 0xC1B3, 0x99A8,
02782     0xC1B4, 0x99A9, 0xC1B5, 0x99AA, 0xC1B6, 0x99AB, 0xC1B7, 0x99AC,
02783     0xC1B8, 0x99AD, 0xC1B9, 0x99AE, 0xC1BA, 0x99AF, 0xC1BB, 0x99B0,
02784     0xC1BC, 0x99B1, 0xC1BD, 0xBCE1, 0xC1BE, 0x99B2, 0xC1BF, 0x99B3,
02785     0xC1C0, 0x99B4, 0xC1C1, 0x99B5, 0xC1C2, 0x99B6, 0xC1C3, 0x99B7,
02786     0xC1C4, 0xBCE2, 0xC1C5, 0x99B8, 0xC1C6, 0x99B9, 0xC1C7, 0x99BA,
02787     0xC1C8, 0xBCE3, 0xC1C9, 0x99BB, 0xC1CA, 0x99BC, 0xC1CB, 0x99BD,
02788     0xC1CC, 0xBCE4, 0xC1CD, 0x99BE, 0xC1CE, 0x99BF, 0xC1CF, 0x99C0,
02789     0xC1D0, 0x99C1, 0xC1D1, 0x99C2, 0xC1D2, 0x99C3, 0xC1D3, 0x99C4,
02790     0xC1D4, 0xBCE5, 0xC1D5, 0x99C5, 0xC1D6, 0x99C6, 0xC1D7, 0xBCE6,
02791     0xC1D8, 0xBCE7, 0xC1D9, 0x99C7, 0xC1DA, 0x99C8, 0xC1DB, 0x99C9,
02792     0xC1DC, 0x99CA, 0xC1DD, 0x99CB, 0xC1DE, 0x99CC, 0xC1DF, 0x99CD,
02793     0xC1E0, 0xBCE8, 0xC1E1, 0x99CE, 0xC1E2, 0x99CF, 0xC1E3, 0x99D0,
02794     0xC1E4, 0xBCE9, 0xC1E5, 0x99D1, 0xC1E6, 0x99D2, 0xC1E7, 0x99D3,
02795     0xC1E8, 0xBCEA, 0xC1E9, 0x99D4, 0xC1EA, 0x99D5, 0xC1EB, 0x99D6,
02796     0xC1EC, 0x99D7, 0xC1ED, 0x99D8, 0xC1EE, 0x99D9, 0xC1EF, 0x99DA,
02797     0xC1F0, 0xBCEB, 0xC1F1, 0xBCEC, 0xC1F2, 0x99DB, 0xC1F3, 0xBCED,
02798     0xC1F4, 0x99DC, 0xC1F5, 0x99DD, 0xC1F6, 0x99DE, 0xC1F7, 0x99DF,
02799     0xC1F8, 0x99E0, 0xC1F9, 0x99E1, 0xC1FA, 0x99E2, 0xC1FB, 0x99E3,
02800     0xC1FC, 0xBCEE, 0xC1FD, 0xBCEF, 0xC1FE, 0x99E4, 0xC1FF, 0x99E5,
02801     0xC200, 0xBCF0, 0xC201, 0x99E6, 0xC202, 0x99E7, 0xC203, 0x99E8,
02802     0xC204, 0xBCF1, 0xC205, 0x99E9, 0xC206, 0x99EA, 0xC207, 0x99EB,
02803     0xC208, 0x99EC, 0xC209, 0x99ED, 0xC20A, 0x99EE, 0xC20B, 0x99EF,
02804     0xC20C, 0xBCF2, 0xC20D, 0xBCF3, 0xC20E, 0x99F0, 0xC20F, 0xBCF4,
02805     0xC210, 0x99F1, 0xC211, 0xBCF5, 0xC212, 0x99F2, 0xC213, 0x99F3,
02806     0xC214, 0x99F4, 0xC215, 0x99F5, 0xC216, 0x99F6, 0xC217, 0x99F7,
02807     0xC218, 0xBCF6, 0xC219, 0xBCF7, 0xC21A, 0x99F8, 0xC21B, 0x99F9,
02808     0xC21C, 0xBCF8, 0xC21D, 0x99FA, 0xC21E, 0x99FB, 0xC21F, 0xBCF9,
02809     0xC220, 0xBCFA, 0xC221, 0x99FC, 0xC222, 0x99FD, 0xC223, 0x99FE,
02810     0xC224, 0x9A41, 0xC225, 0x9A42, 0xC226, 0x9A43, 0xC227, 0x9A44,
02811     0xC228, 0xBCFB, 0xC229, 0xBCFC, 0xC22A, 0x9A45, 0xC22B, 0xBCFD,
02812     0xC22C, 0x9A46, 0xC22D, 0xBCFE, 0xC22E, 0x9A47, 0xC22F, 0xBDA1,
02813     0xC230, 0x9A48, 0xC231, 0xBDA2, 0xC232, 0xBDA3, 0xC233, 0x9A49,
02814     0xC234, 0xBDA4, 0xC235, 0x9A4A, 0xC236, 0x9A4B, 0xC237, 0x9A4C,
02815     0xC238, 0x9A4D, 0xC239, 0x9A4E, 0xC23A, 0x9A4F, 0xC23B, 0x9A50,
02816     0xC23C, 0x9A51, 0xC23D, 0x9A52, 0xC23E, 0x9A53, 0xC23F, 0x9A54,
02817     0xC240, 0x9A55, 0xC241, 0x9A56, 0xC242, 0x9A57, 0xC243, 0x9A58,
02818     0xC244, 0x9A59, 0xC245, 0x9A5A, 0xC246, 0x9A61, 0xC247, 0x9A62,
02819     0xC248, 0xBDA5, 0xC249, 0x9A63, 0xC24A, 0x9A64, 0xC24B, 0x9A65,
02820     0xC24C, 0x9A66, 0xC24D, 0x9A67, 0xC24E, 0x9A68, 0xC24F, 0x9A69,
02821     0xC250, 0xBDA6, 0xC251, 0xBDA7, 0xC252, 0x9A6A, 0xC253, 0x9A6B,
02822     0xC254, 0xBDA8, 0xC255, 0x9A6C, 0xC256, 0x9A6D, 0xC257, 0x9A6E,
02823     0xC258, 0xBDA9, 0xC259, 0x9A6F, 0xC25A, 0x9A70, 0xC25B, 0x9A71,
02824     0xC25C, 0x9A72, 0xC25D, 0x9A73, 0xC25E, 0x9A74, 0xC25F, 0x9A75,
02825     0xC260, 0xBDAA, 0xC261, 0x9A76, 0xC262, 0x9A77, 0xC263, 0x9A78,
02826     0xC264, 0x9A79, 0xC265, 0xBDAB, 0xC266, 0x9A7A, 0xC267, 0x9A81,
02827     0xC268, 0x9A82, 0xC269, 0x9A83, 0xC26A, 0x9A84, 0xC26B, 0x9A85,
02828     0xC26C, 0xBDAC, 0xC26D, 0xBDAD, 0xC26E, 0x9A86, 0xC26F, 0x9A87,
02829     0xC270, 0xBDAE, 0xC271, 0x9A88, 0xC272, 0x9A89, 0xC273, 0x9A8A,
02830     0xC274, 0xBDAF, 0xC275, 0x9A8B, 0xC276, 0x9A8C, 0xC277, 0x9A8D,
02831     0xC278, 0x9A8E, 0xC279, 0x9A8F, 0xC27A, 0x9A90, 0xC27B, 0x9A91,
02832     0xC27C, 0xBDB0, 0xC27D, 0xBDB1, 0xC27E, 0x9A92, 0xC27F, 0xBDB2,
02833     0xC280, 0x9A93, 0xC281, 0xBDB3, 0xC282, 0x9A94, 0xC283, 0x9A95,
02834     0xC284, 0x9A96, 0xC285, 0x9A97, 0xC286, 0x9A98, 0xC287, 0x9A99,
02835     0xC288, 0xBDB4, 0xC289, 0xBDB5, 0xC28A, 0x9A9A, 0xC28B, 0x9A9B,
02836     0xC28C, 0x9A9C, 0xC28D, 0x9A9D, 0xC28E, 0x9A9E, 0xC28F, 0x9A9F,
02837     0xC290, 0xBDB6, 0xC291, 0x9AA0, 0xC292, 0x9AA1, 0xC293, 0x9AA2,
02838     0xC294, 0x9AA3, 0xC295, 0x9AA4, 0xC296, 0x9AA5, 0xC297, 0x9AA6,
02839     0xC298, 0xBDB7, 0xC299, 0x9AA7, 0xC29A, 0x9AA8, 0xC29B, 0xBDB8,
02840     0xC29C, 0x9AA9, 0xC29D, 0xBDB9, 0xC29E, 0x9AAA, 0xC29F, 0x9AAB,
02841     0xC2A0, 0x9AAC, 0xC2A1, 0x9AAD, 0xC2A2, 0x9AAE, 0xC2A3, 0x9AAF,
02842     0xC2A4, 0xBDBA, 0xC2A5, 0xBDBB, 0xC2A6, 0x9AB0, 0xC2A7, 0x9AB1,
02843     0xC2A8, 0xBDBC, 0xC2A9, 0x9AB2, 0xC2AA, 0x9AB3, 0xC2AB, 0x9AB4,
02844     0xC2AC, 0xBDBD, 0xC2AD, 0xBDBE, 0xC2AE, 0x9AB5, 0xC2AF, 0x9AB6,
02845     0xC2B0, 0x9AB7, 0xC2B1, 0x9AB8, 0xC2B2, 0x9AB9, 0xC2B3, 0x9ABA,
02846     0xC2B4, 0xBDBF, 0xC2B5, 0xBDC0, 0xC2B6, 0x9ABB, 0xC2B7, 0xBDC1,
02847     0xC2B8, 0x9ABC, 0xC2B9, 0xBDC2, 0xC2BA, 0x9ABD, 0xC2BB, 0x9ABE,
02848     0xC2BC, 0x9ABF, 0xC2BD, 0x9AC0, 0xC2BE, 0x9AC1, 0xC2BF, 0x9AC2,
02849     0xC2C0, 0x9AC3, 0xC2C1, 0x9AC4, 0xC2C2, 0x9AC5, 0xC2C3, 0x9AC6,
02850     0xC2C4, 0x9AC7, 0xC2C5, 0x9AC8, 0xC2C6, 0x9AC9, 0xC2C7, 0x9ACA,
02851     0xC2C8, 0x9ACB, 0xC2C9, 0x9ACC, 0xC2CA, 0x9ACD, 0xC2CB, 0x9ACE,
02852     0xC2CC, 0x9ACF, 0xC2CD, 0x9AD0, 0xC2CE, 0x9AD1, 0xC2CF, 0x9AD2,
02853     0xC2D0, 0x9AD3, 0xC2D1, 0x9AD4, 0xC2D2, 0x9AD5, 0xC2D3, 0x9AD6,
02854     0xC2D4, 0x9AD7, 0xC2D5, 0x9AD8, 0xC2D6, 0x9AD9, 0xC2D7, 0x9ADA,
02855     0xC2D8, 0x9ADB, 0xC2D9, 0x9ADC, 0xC2DA, 0x9ADD, 0xC2DB, 0x9ADE,
02856     0xC2DC, 0xBDC3, 0xC2DD, 0xBDC4, 0xC2DE, 0x9ADF, 0xC2DF, 0x9AE0,
02857     0xC2E0, 0xBDC5, 0xC2E1, 0x9AE1, 0xC2E2, 0x9AE2, 0xC2E3, 0xBDC6,
02858     0xC2E4, 0xBDC7, 0xC2E5, 0x9AE3, 0xC2E6, 0x9AE4, 0xC2E7, 0x9AE5,
02859     0xC2E8, 0x9AE6, 0xC2E9, 0x9AE7, 0xC2EA, 0x9AE8, 0xC2EB, 0xBDC8,
02860     0xC2EC, 0xBDC9, 0xC2ED, 0xBDCA, 0xC2EE, 0x9AE9, 0xC2EF, 0xBDCB,
02861     0xC2F0, 0x9AEA, 0xC2F1, 0xBDCC, 0xC2F2, 0x9AEB, 0xC2F3, 0x9AEC,
02862     0xC2F4, 0x9AED, 0xC2F5, 0x9AEE, 0xC2F6, 0xBDCD, 0xC2F7, 0x9AEF,
02863     0xC2F8, 0xBDCE, 0xC2F9, 0xBDCF, 0xC2FA, 0x9AF0, 0xC2FB, 0xBDD0,
02864     0xC2FC, 0xBDD1, 0xC2FD, 0x9AF1, 0xC2FE, 0x9AF2, 0xC2FF, 0x9AF3,
02865     0xC300, 0xBDD2, 0xC301, 0x9AF4, 0xC302, 0x9AF5, 0xC303, 0x9AF6,
02866     0xC304, 0x9AF7, 0xC305, 0x9AF8, 0xC306, 0x9AF9, 0xC307, 0x9AFA,
02867     0xC308, 0xBDD3, 0xC309, 0xBDD4, 0xC30A, 0x9AFB, 0xC30B, 0x9AFC,
02868     0xC30C, 0xBDD5, 0xC30D, 0xBDD6, 0xC30E, 0x9AFD, 0xC30F, 0x9AFE,
02869     0xC310, 0x9B41, 0xC311, 0x9B42, 0xC312, 0x9B43, 0xC313, 0xBDD7,
02870     0xC314, 0xBDD8, 0xC315, 0xBDD9, 0xC316, 0x9B44, 0xC317, 0x9B45,
02871     0xC318, 0xBDDA, 0xC319, 0x9B46, 0xC31A, 0x9B47, 0xC31B, 0x9B48,
02872     0xC31C, 0xBDDB, 0xC31D, 0x9B49, 0xC31E, 0x9B4A, 0xC31F, 0x9B4B,
02873     0xC320, 0x9B4C, 0xC321, 0x9B4D, 0xC322, 0x9B4E, 0xC323, 0x9B4F,
02874     0xC324, 0xBDDC, 0xC325, 0xBDDD, 0xC326, 0x9B50, 0xC327, 0x9B51,
02875     0xC328, 0xBDDE, 0xC329, 0xBDDF, 0xC32A, 0x9B52, 0xC32B, 0x9B53,
02876     0xC32C, 0x9B54, 0xC32D, 0x9B55, 0xC32E, 0x9B56, 0xC32F, 0x9B57,
02877     0xC330, 0x9B58, 0xC331, 0x9B59, 0xC332, 0x9B5A, 0xC333, 0x9B61,
02878     0xC334, 0x9B62, 0xC335, 0x9B63, 0xC336, 0x9B64, 0xC337, 0x9B65,
02879     0xC338, 0x9B66, 0xC339, 0x9B67, 0xC33A, 0x9B68, 0xC33B, 0x9B69,
02880     0xC33C, 0x9B6A, 0xC33D, 0x9B6B, 0xC33E, 0x9B6C, 0xC33F, 0x9B6D,
02881     0xC340, 0x9B6E, 0xC341, 0x9B6F, 0xC342, 0x9B70, 0xC343, 0x9B71,
02882     0xC344, 0x9B72, 0xC345, 0xBDE0, 0xC346, 0x9B73, 0xC347, 0x9B74,
02883     0xC348, 0x9B75, 0xC349, 0x9B76, 0xC34A, 0x9B77, 0xC34B, 0x9B78,
02884     0xC34C, 0x9B79, 0xC34D, 0x9B7A, 0xC34E, 0x9B81, 0xC34F, 0x9B82,
02885     0xC350, 0x9B83, 0xC351, 0x9B84, 0xC352, 0x9B85, 0xC353, 0x9B86,
02886     0xC354, 0x9B87, 0xC355, 0x9B88, 0xC356, 0x9B89, 0xC357, 0x9B8A,
02887     0xC358, 0x9B8B, 0xC359, 0x9B8C, 0xC35A, 0x9B8D, 0xC35B, 0x9B8E,
02888     0xC35C, 0x9B8F, 0xC35D, 0x9B90, 0xC35E, 0x9B91, 0xC35F, 0x9B92,
02889     0xC360, 0x9B93, 0xC361, 0x9B94, 0xC362, 0x9B95, 0xC363, 0x9B96,
02890     0xC364, 0x9B97, 0xC365, 0x9B98, 0xC366, 0x9B99, 0xC367, 0x9B9A,
02891     0xC368, 0xBDE1, 0xC369, 0xBDE2, 0xC36A, 0x9B9B, 0xC36B, 0x9B9C,
02892     0xC36C, 0xBDE3, 0xC36D, 0x9B9D, 0xC36E, 0x9B9E, 0xC36F, 0x9B9F,
02893     0xC370, 0xBDE4, 0xC371, 0x9BA0, 0xC372, 0xBDE5, 0xC373, 0x9BA1,
02894     0xC374, 0x9BA2, 0xC375, 0x9BA3, 0xC376, 0x9BA4, 0xC377, 0x9BA5,
02895     0xC378, 0xBDE6, 0xC379, 0xBDE7, 0xC37A, 0x9BA6, 0xC37B, 0x9BA7,
02896     0xC37C, 0xBDE8, 0xC37D, 0xBDE9, 0xC37E, 0x9BA8, 0xC37F, 0x9BA9,
02897     0xC380, 0x9BAA, 0xC381, 0x9BAB, 0xC382, 0x9BAC, 0xC383, 0x9BAD,
02898     0xC384, 0xBDEA, 0xC385, 0x9BAE, 0xC386, 0x9BAF, 0xC387, 0x9BB0,
02899     0xC388, 0xBDEB, 0xC389, 0x9BB1, 0xC38A, 0x9BB2, 0xC38B, 0x9BB3,
02900     0xC38C, 0xBDEC, 0xC38D, 0x9BB4, 0xC38E, 0x9BB5, 0xC38F, 0x9BB6,
02901     0xC390, 0x9BB7, 0xC391, 0x9BB8, 0xC392, 0x9BB9, 0xC393, 0x9BBA,
02902     0xC394, 0x9BBB, 0xC395, 0x9BBC, 0xC396, 0x9BBD, 0xC397, 0x9BBE,
02903     0xC398, 0x9BBF, 0xC399, 0x9BC0, 0xC39A, 0x9BC1, 0xC39B, 0x9BC2,
02904     0xC39C, 0x9BC3, 0xC39D, 0x9BC4, 0xC39E, 0x9BC5, 0xC39F, 0x9BC6,
02905     0xC3A0, 0x9BC7, 0xC3A1, 0x9BC8, 0xC3A2, 0x9BC9, 0xC3A3, 0x9BCA,
02906     0xC3A4, 0x9BCB, 0xC3A5, 0x9BCC, 0xC3A6, 0x9BCD, 0xC3A7, 0x9BCE,
02907     0xC3A8, 0x9BCF, 0xC3A9, 0x9BD0, 0xC3AA, 0x9BD1, 0xC3AB, 0x9BD2,
02908     0xC3AC, 0x9BD3, 0xC3AD, 0x9BD4, 0xC3AE, 0x9BD5, 0xC3AF, 0x9BD6,
02909     0xC3B0, 0x9BD7, 0xC3B1, 0x9BD8, 0xC3B2, 0x9BD9, 0xC3B3, 0x9BDA,
02910     0xC3B4, 0x9BDB, 0xC3B5, 0x9BDC, 0xC3B6, 0x9BDD, 0xC3B7, 0x9BDE,
02911     0xC3B8, 0x9BDF, 0xC3B9, 0x9BE0, 0xC3BA, 0x9BE1, 0xC3BB, 0x9BE2,
02912     0xC3BC, 0x9BE3, 0xC3BD, 0x9BE4, 0xC3BE, 0x9BE5, 0xC3BF, 0x9BE6,
02913     0xC3C0, 0xBDED, 0xC3C1, 0x9BE7, 0xC3C2, 0x9BE8, 0xC3C3, 0x9BE9,
02914     0xC3C4, 0x9BEA, 0xC3C5, 0x9BEB, 0xC3C6, 0x9BEC, 0xC3C7, 0x9BED,
02915     0xC3C8, 0x9BEE, 0xC3C9, 0x9BEF, 0xC3CA, 0x9BF0, 0xC3CB, 0x9BF1,
02916     0xC3CC, 0x9BF2, 0xC3CD, 0x9BF3, 0xC3CE, 0x9BF4, 0xC3CF, 0x9BF5,
02917     0xC3D0, 0x9BF6, 0xC3D1, 0x9BF7, 0xC3D2, 0x9BF8, 0xC3D3, 0x9BF9,
02918     0xC3D4, 0x9BFA, 0xC3D5, 0x9BFB, 0xC3D6, 0x9BFC, 0xC3D7, 0x9BFD,
02919     0xC3D8, 0xBDEE, 0xC3D9, 0xBDEF, 0xC3DA, 0x9BFE, 0xC3DB, 0x9C41,
02920     0xC3DC, 0xBDF0, 0xC3DD, 0x9C42, 0xC3DE, 0x9C43, 0xC3DF, 0xBDF1,
02921     0xC3E0, 0xBDF2, 0xC3E1, 0x9C44, 0xC3E2, 0xBDF3, 0xC3E3, 0x9C45,
02922     0xC3E4, 0x9C46, 0xC3E5, 0x9C47, 0xC3E6, 0x9C48, 0xC3E7, 0x9C49,
02923     0xC3E8, 0xBDF4, 0xC3E9, 0xBDF5, 0xC3EA, 0x9C4A, 0xC3EB, 0x9C4B,
02924     0xC3EC, 0x9C4C, 0xC3ED, 0xBDF6, 0xC3EE, 0x9C4D, 0xC3EF, 0x9C4E,
02925     0xC3F0, 0x9C4F, 0xC3F1, 0x9C50, 0xC3F2, 0x9C51, 0xC3F3, 0x9C52,
02926     0xC3F4, 0xBDF7, 0xC3F5, 0xBDF8, 0xC3F6, 0x9C53, 0xC3F7, 0x9C54,
02927     0xC3F8, 0xBDF9, 0xC3F9, 0x9C55, 0xC3FA, 0x9C56, 0xC3FB, 0x9C57,
02928     0xC3FC, 0x9C58, 0xC3FD, 0x9C59, 0xC3FE, 0x9C5A, 0xC3FF, 0x9C61,
02929     0xC400, 0x9C62, 0xC401, 0x9C63, 0xC402, 0x9C64, 0xC403, 0x9C65,
02930     0xC404, 0x9C66, 0xC405, 0x9C67, 0xC406, 0x9C68, 0xC407, 0x9C69,
02931     0xC408, 0xBDFA, 0xC409, 0x9C6A, 0xC40A, 0x9C6B, 0xC40B, 0x9C6C,
02932     0xC40C, 0x9C6D, 0xC40D, 0x9C6E, 0xC40E, 0x9C6F, 0xC40F, 0x9C70,
02933     0xC410, 0xBDFB, 0xC411, 0x9C71, 0xC412, 0x9C72, 0xC413, 0x9C73,
02934     0xC414, 0x9C74, 0xC415, 0x9C75, 0xC416, 0x9C76, 0xC417, 0x9C77,
02935     0xC418, 0x9C78, 0xC419, 0x9C79, 0xC41A, 0x9C7A, 0xC41B, 0x9C81,
02936     0xC41C, 0x9C82, 0xC41D, 0x9C83, 0xC41E, 0x9C84, 0xC41F, 0x9C85,
02937     0xC420, 0x9C86, 0xC421, 0x9C87, 0xC422, 0x9C88, 0xC423, 0x9C89,
02938     0xC424, 0xBDFC, 0xC425, 0x9C8A, 0xC426, 0x9C8B, 0xC427, 0x9C8C,
02939     0xC428, 0x9C8D, 0xC429, 0x9C8E, 0xC42A, 0x9C8F, 0xC42B, 0x9C90,
02940     0xC42C, 0xBDFD, 0xC42D, 0x9C91, 0xC42E, 0x9C92, 0xC42F, 0x9C93,
02941     0xC430, 0xBDFE, 0xC431, 0x9C94, 0xC432, 0x9C95, 0xC433, 0x9C96,
02942     0xC434, 0xBEA1, 0xC435, 0x9C97, 0xC436, 0x9C98, 0xC437, 0x9C99,
02943     0xC438, 0x9C9A, 0xC439, 0x9C9B, 0xC43A, 0x9C9C, 0xC43B, 0x9C9D,
02944     0xC43C, 0xBEA2, 0xC43D, 0xBEA3, 0xC43E, 0x9C9E, 0xC43F, 0x9C9F,
02945     0xC440, 0x9CA0, 0xC441, 0x9CA1, 0xC442, 0x9CA2, 0xC443, 0x9CA3,
02946     0xC444, 0x9CA4, 0xC445, 0x9CA5, 0xC446, 0x9CA6, 0xC447, 0x9CA7,
02947     0xC448, 0xBEA4, 0xC449, 0x9CA8, 0xC44A, 0x9CA9, 0xC44B, 0x9CAA,
02948     0xC44C, 0x9CAB, 0xC44D, 0x9CAC, 0xC44E, 0x9CAD, 0xC44F, 0x9CAE,
02949     0xC450, 0x9CAF, 0xC451, 0x9CB0, 0xC452, 0x9CB1, 0xC453, 0x9CB2,
02950     0xC454, 0x9CB3, 0xC455, 0x9CB4, 0xC456, 0x9CB5, 0xC457, 0x9CB6,
02951     0xC458, 0x9CB7, 0xC459, 0x9CB8, 0xC45A, 0x9CB9, 0xC45B, 0x9CBA,
02952     0xC45C, 0x9CBB, 0xC45D, 0x9CBC, 0xC45E, 0x9CBD, 0xC45F, 0x9CBE,
02953     0xC460, 0x9CBF, 0xC461, 0x9CC0, 0xC462, 0x9CC1, 0xC463, 0x9CC2,
02954     0xC464, 0xBEA5, 0xC465, 0xBEA6, 0xC466, 0x9CC3, 0xC467, 0x9CC4,
02955     0xC468, 0xBEA7, 0xC469, 0x9CC5, 0xC46A, 0x9CC6, 0xC46B, 0x9CC7,
02956     0xC46C, 0xBEA8, 0xC46D, 0x9CC8, 0xC46E, 0x9CC9, 0xC46F, 0x9CCA,
02957     0xC470, 0x9CCB, 0xC471, 0x9CCC, 0xC472, 0x9CCD, 0xC473, 0x9CCE,
02958     0xC474, 0xBEA9, 0xC475, 0xBEAA, 0xC476, 0x9CCF, 0xC477, 0x9CD0,
02959     0xC478, 0x9CD1, 0xC479, 0xBEAB, 0xC47A, 0x9CD2, 0xC47B, 0x9CD3,
02960     0xC47C, 0x9CD4, 0xC47D, 0x9CD5, 0xC47E, 0x9CD6, 0xC47F, 0x9CD7,
02961     0xC480, 0xBEAC, 0xC481, 0x9CD8, 0xC482, 0x9CD9, 0xC483, 0x9CDA,
02962     0xC484, 0x9CDB, 0xC485, 0x9CDC, 0xC486, 0x9CDD, 0xC487, 0x9CDE,
02963     0xC488, 0x9CDF, 0xC489, 0x9CE0, 0xC48A, 0x9CE1, 0xC48B, 0x9CE2,
02964     0xC48C, 0x9CE3, 0xC48D, 0x9CE4, 0xC48E, 0x9CE5, 0xC48F, 0x9CE6,
02965     0xC490, 0x9CE7, 0xC491, 0x9CE8, 0xC492, 0x9CE9, 0xC493, 0x9CEA,
02966     0xC494, 0xBEAD, 0xC495, 0x9CEB, 0xC496, 0x9CEC, 0xC497, 0x9CED,
02967     0xC498, 0x9CEE, 0xC499, 0x9CEF, 0xC49A, 0x9CF0, 0xC49B, 0x9CF1,
02968     0xC49C, 0xBEAE, 0xC49D, 0x9CF2, 0xC49E, 0x9CF3, 0xC49F, 0x9CF4,
02969     0xC4A0, 0x9CF5, 0xC4A1, 0x9CF6, 0xC4A2, 0x9CF7, 0xC4A3, 0x9CF8,
02970     0xC4A4, 0x9CF9, 0xC4A5, 0x9CFA, 0xC4A6, 0x9CFB, 0xC4A7, 0x9CFC,
02971     0xC4A8, 0x9CFD, 0xC4A9, 0x9CFE, 0xC4AA, 0x9D41, 0xC4AB, 0x9D42,
02972     0xC4AC, 0x9D43, 0xC4AD, 0x9D44, 0xC4AE, 0x9D45, 0xC4AF, 0x9D46,
02973     0xC4B0, 0x9D47, 0xC4B1, 0x9D48, 0xC4B2, 0x9D49, 0xC4B3, 0x9D4A,
02974     0xC4B4, 0x9D4B, 0xC4B5, 0x9D4C, 0xC4B6, 0x9D4D, 0xC4B7, 0x9D4E,
02975     0xC4B8, 0xBEAF, 0xC4B9, 0x9D4F, 0xC4BA, 0x9D50, 0xC4BB, 0x9D51,
02976     0xC4BC, 0xBEB0, 0xC4BD, 0x9D52, 0xC4BE, 0x9D53, 0xC4BF, 0x9D54,
02977     0xC4C0, 0x9D55, 0xC4C1, 0x9D56, 0xC4C2, 0x9D57, 0xC4C3, 0x9D58,
02978     0xC4C4, 0x9D59, 0xC4C5, 0x9D5A, 0xC4C6, 0x9D61, 0xC4C7, 0x9D62,
02979     0xC4C8, 0x9D63, 0xC4C9, 0x9D64, 0xC4CA, 0x9D65, 0xC4CB, 0x9D66,
02980     0xC4CC, 0x9D67, 0xC4CD, 0x9D68, 0xC4CE, 0x9D69, 0xC4CF, 0x9D6A,
02981     0xC4D0, 0x9D6B, 0xC4D1, 0x9D6C, 0xC4D2, 0x9D6D, 0xC4D3, 0x9D6E,
02982     0xC4D4, 0x9D6F, 0xC4D5, 0x9D70, 0xC4D6, 0x9D71, 0xC4D7, 0x9D72,
02983     0xC4D8, 0x9D73, 0xC4D9, 0x9D74, 0xC4DA, 0x9D75, 0xC4DB, 0x9D76,
02984     0xC4DC, 0x9D77, 0xC4DD, 0x9D78, 0xC4DE, 0x9D79, 0xC4DF, 0x9D7A,
02985     0xC4E0, 0x9D81, 0xC4E1, 0x9D82, 0xC4E2, 0x9D83, 0xC4E3, 0x9D84,
02986     0xC4E4, 0x9D85, 0xC4E5, 0x9D86, 0xC4E6, 0x9D87, 0xC4E7, 0x9D88,
02987     0xC4E8, 0x9D89, 0xC4E9, 0xBEB1, 0xC4EA, 0x9D8A, 0xC4EB, 0x9D8B,
02988     0xC4EC, 0x9D8C, 0xC4ED, 0x9D8D, 0xC4EE, 0x9D8E, 0xC4EF, 0x9D8F,
02989     0xC4F0, 0xBEB2, 0xC4F1, 0xBEB3, 0xC4F2, 0x9D90, 0xC4F3, 0x9D91,
02990     0xC4F4, 0xBEB4, 0xC4F5, 0x9D92, 0xC4F6, 0x9D93, 0xC4F7, 0x9D94,
02991     0xC4F8, 0xBEB5, 0xC4F9, 0x9D95, 0xC4FA, 0xBEB6, 0xC4FB, 0x9D96,
02992     0xC4FC, 0x9D97, 0xC4FD, 0x9D98, 0xC4FE, 0x9D99, 0xC4FF, 0xBEB7,
02993     0xC500, 0xBEB8, 0xC501, 0xBEB9, 0xC502, 0x9D9A, 0xC503, 0x9D9B,
02994     0xC504, 0x9D9C, 0xC505, 0x9D9D, 0xC506, 0x9D9E, 0xC507, 0x9D9F,
02995     0xC508, 0x9DA0, 0xC509, 0x9DA1, 0xC50A, 0x9DA2, 0xC50B, 0x9DA3,
02996     0xC50C, 0xBEBA, 0xC50D, 0x9DA4, 0xC50E, 0x9DA5, 0xC50F, 0x9DA6,
02997     0xC510, 0xBEBB, 0xC511, 0x9DA7, 0xC512, 0x9DA8, 0xC513, 0x9DA9,
02998     0xC514, 0xBEBC, 0xC515, 0x9DAA, 0xC516, 0x9DAB, 0xC517, 0x9DAC,
02999     0xC518, 0x9DAD, 0xC519, 0x9DAE, 0xC51A, 0x9DAF, 0xC51B, 0x9DB0,
03000     0xC51C, 0xBEBD, 0xC51D, 0x9DB1, 0xC51E, 0x9DB2, 0xC51F, 0x9DB3,
03001     0xC520, 0x9DB4, 0xC521, 0x9DB5, 0xC522, 0x9DB6, 0xC523, 0x9DB7,
03002     0xC524, 0x9DB8, 0xC525, 0x9DB9, 0xC526, 0x9DBA, 0xC527, 0x9DBB,
03003     0xC528, 0xBEBE, 0xC529, 0xBEBF, 0xC52A, 0x9DBC, 0xC52B, 0x9DBD,
03004     0xC52C, 0xBEC0, 0xC52D, 0x9DBE, 0xC52E, 0x9DBF, 0xC52F, 0x9DC0,
03005     0xC530, 0xBEC1, 0xC531, 0x9DC1, 0xC532, 0x9DC2, 0xC533, 0x9DC3,
03006     0xC534, 0x9DC4, 0xC535, 0x9DC5, 0xC536, 0x9DC6, 0xC537, 0x9DC7,
03007     0xC538, 0xBEC2, 0xC539, 0xBEC3, 0xC53A, 0x9DC8, 0xC53B, 0xBEC4,
03008     0xC53C, 0x9DC9, 0xC53D, 0xBEC5, 0xC53E, 0x9DCA, 0xC53F, 0x9DCB,
03009     0xC540, 0x9DCC, 0xC541, 0x9DCD, 0xC542, 0x9DCE, 0xC543, 0x9DCF,
03010     0xC544, 0xBEC6, 0xC545, 0xBEC7, 0xC546, 0x9DD0, 0xC547, 0x9DD1,
03011     0xC548, 0xBEC8, 0xC549, 0xBEC9, 0xC54A, 0xBECA, 0xC54B, 0x9DD2,
03012     0xC54C, 0xBECB, 0xC54D, 0xBECC, 0xC54E, 0xBECD, 0xC54F, 0x9DD3,
03013     0xC550, 0x9DD4, 0xC551, 0x9DD5, 0xC552, 0x9DD6, 0xC553, 0xBECE,
03014     0xC554, 0xBECF, 0xC555, 0xBED0, 0xC556, 0x9DD7, 0xC557, 0xBED1,
03015     0xC558, 0xBED2, 0xC559, 0xBED3, 0xC55A, 0x9DD8, 0xC55B, 0x9DD9,
03016     0xC55C, 0x9DDA, 0xC55D, 0xBED4, 0xC55E, 0xBED5, 0xC55F, 0x9DDB,
03017     0xC560, 0xBED6, 0xC561, 0xBED7, 0xC562, 0x9DDC, 0xC563, 0x9DDD,
03018     0xC564, 0xBED8, 0xC565, 0x9DDE, 0xC566, 0x9DDF, 0xC567, 0x9DE0,
03019     0xC568, 0xBED9, 0xC569, 0x9DE1, 0xC56A, 0x9DE2, 0xC56B, 0x9DE3,
03020     0xC56C, 0x9DE4, 0xC56D, 0x9DE5, 0xC56E, 0x9DE6, 0xC56F, 0x9DE7,
03021     0xC570, 0xBEDA, 0xC571, 0xBEDB, 0xC572, 0x9DE8, 0xC573, 0xBEDC,
03022     0xC574, 0xBEDD, 0xC575, 0xBEDE, 0xC576, 0x9DE9, 0xC577, 0x9DEA,
03023     0xC578, 0x9DEB, 0xC579, 0x9DEC, 0xC57A, 0x9DED, 0xC57B, 0x9DEE,
03024     0xC57C, 0xBEDF, 0xC57D, 0xBEE0, 0xC57E, 0x9DEF, 0xC57F, 0x9DF0,
03025     0xC580, 0xBEE1, 0xC581, 0x9DF1, 0xC582, 0x9DF2, 0xC583, 0x9DF3,
03026     0xC584, 0xBEE2, 0xC585, 0x9DF4, 0xC586, 0x9DF5, 0xC587, 0xBEE3,
03027     0xC588, 0x9DF6, 0xC589, 0x9DF7, 0xC58A, 0x9DF8, 0xC58B, 0x9DF9,
03028     0xC58C, 0xBEE4, 0xC58D, 0xBEE5, 0xC58E, 0x9DFA, 0xC58F, 0xBEE6,
03029     0xC590, 0x9DFB, 0xC591, 0xBEE7, 0xC592, 0x9DFC, 0xC593, 0x9DFD,
03030     0xC594, 0x9DFE, 0xC595, 0xBEE8, 0xC596, 0x9E41, 0xC597, 0xBEE9,
03031     0xC598, 0xBEEA, 0xC599, 0x9E42, 0xC59A, 0x9E43, 0xC59B, 0x9E44,
03032     0xC59C, 0xBEEB, 0xC59D, 0x9E45, 0xC59E, 0x9E46, 0xC59F, 0x9E47,
03033     0xC5A0, 0xBEEC, 0xC5A1, 0x9E48, 0xC5A2, 0x9E49, 0xC5A3, 0x9E4A,
03034     0xC5A4, 0x9E4B, 0xC5A5, 0x9E4C, 0xC5A6, 0x9E4D, 0xC5A7, 0x9E4E,
03035     0xC5A8, 0x9E4F, 0xC5A9, 0xBEED, 0xC5AA, 0x9E50, 0xC5AB, 0x9E51,
03036     0xC5AC, 0x9E52, 0xC5AD, 0x9E53, 0xC5AE, 0x9E54, 0xC5AF, 0x9E55,
03037     0xC5B0, 0x9E56, 0xC5B1, 0x9E57, 0xC5B2, 0x9E58, 0xC5B3, 0x9E59,
03038     0xC5B4, 0xBEEE, 0xC5B5, 0xBEEF, 0xC5B6, 0x9E5A, 0xC5B7, 0x9E61,
03039     0xC5B8, 0xBEF0, 0xC5B9, 0xBEF1, 0xC5BA, 0x9E62, 0xC5BB, 0xBEF2,
03040     0xC5BC, 0xBEF3, 0xC5BD, 0xBEF4, 0xC5BE, 0xBEF5, 0xC5BF, 0x9E63,
03041     0xC5C0, 0x9E64, 0xC5C1, 0x9E65, 0xC5C2, 0x9E66, 0xC5C3, 0x9E67,
03042     0xC5C4, 0xBEF6, 0xC5C5, 0xBEF7, 0xC5C6, 0xBEF8, 0xC5C7, 0xBEF9,
03043     0xC5C8, 0xBEFA, 0xC5C9, 0xBEFB, 0xC5CA, 0xBEFC, 0xC5CB, 0x9E68,
03044     0xC5CC, 0xBEFD, 0xC5CD, 0x9E69, 0xC5CE, 0xBEFE, 0xC5CF, 0x9E6A,
03045     0xC5D0, 0xBFA1, 0xC5D1, 0xBFA2, 0xC5D2, 0x9E6B, 0xC5D3, 0x9E6C,
03046     0xC5D4, 0xBFA3, 0xC5D5, 0x9E6D, 0xC5D6, 0x9E6E, 0xC5D7, 0x9E6F,
03047     0xC5D8, 0xBFA4, 0xC5D9, 0x9E70, 0xC5DA, 0x9E71, 0xC5DB, 0x9E72,
03048     0xC5DC, 0x9E73, 0xC5DD, 0x9E74, 0xC5DE, 0x9E75, 0xC5DF, 0x9E76,
03049     0xC5E0, 0xBFA5, 0xC5E1, 0xBFA6, 0xC5E2, 0x9E77, 0xC5E3, 0xBFA7,
03050     0xC5E4, 0x9E78, 0xC5E5, 0xBFA8, 0xC5E6, 0x9E79, 0xC5E7, 0x9E7A,
03051     0xC5E8, 0x9E81, 0xC5E9, 0x9E82, 0xC5EA, 0x9E83, 0xC5EB, 0x9E84,
03052     0xC5EC, 0xBFA9, 0xC5ED, 0xBFAA, 0xC5EE, 0xBFAB, 0xC5EF, 0x9E85,
03053     0xC5F0, 0xBFAC, 0xC5F1, 0x9E86, 0xC5F2, 0x9E87, 0xC5F3, 0x9E88,
03054     0xC5F4, 0xBFAD, 0xC5F5, 0x9E89, 0xC5F6, 0xBFAE, 0xC5F7, 0xBFAF,
03055     0xC5F8, 0x9E8A, 0xC5F9, 0x9E8B, 0xC5FA, 0x9E8C, 0xC5FB, 0x9E8D,
03056     0xC5FC, 0xBFB0, 0xC5FD, 0xBFB1, 0xC5FE, 0xBFB2, 0xC5FF, 0xBFB3,
03057     0xC600, 0xBFB4, 0xC601, 0xBFB5, 0xC602, 0x9E8E, 0xC603, 0x9E8F,
03058     0xC604, 0x9E90, 0xC605, 0xBFB6, 0xC606, 0xBFB7, 0xC607, 0xBFB8,
03059     0xC608, 0xBFB9, 0xC609, 0x9E91, 0xC60A, 0x9E92, 0xC60B, 0x9E93,
03060     0xC60C, 0xBFBA, 0xC60D, 0x9E94, 0xC60E, 0x9E95, 0xC60F, 0x9E96,
03061     0xC610, 0xBFBB, 0xC611, 0x9E97, 0xC612, 0x9E98, 0xC613, 0x9E99,
03062     0xC614, 0x9E9A, 0xC615, 0x9E9B, 0xC616, 0x9E9C, 0xC617, 0x9E9D,
03063     0xC618, 0xBFBC, 0xC619, 0xBFBD, 0xC61A, 0x9E9E, 0xC61B, 0xBFBE,
03064     0xC61C, 0xBFBF, 0xC61D, 0x9E9F, 0xC61E, 0x9EA0, 0xC61F, 0x9EA1,
03065     0xC620, 0x9EA2, 0xC621, 0x9EA3, 0xC622, 0x9EA4, 0xC623, 0x9EA5,
03066     0xC624, 0xBFC0, 0xC625, 0xBFC1, 0xC626, 0x9EA6, 0xC627, 0x9EA7,
03067     0xC628, 0xBFC2, 0xC629, 0x9EA8, 0xC62A, 0x9EA9, 0xC62B, 0x9EAA,
03068     0xC62C, 0xBFC3, 0xC62D, 0xBFC4, 0xC62E, 0xBFC5, 0xC62F, 0x9EAB,
03069     0xC630, 0xBFC6, 0xC631, 0x9EAC, 0xC632, 0x9EAD, 0xC633, 0xBFC7,
03070     0xC634, 0xBFC8, 0xC635, 0xBFC9, 0xC636, 0x9EAE, 0xC637, 0xBFCA,
03071     0xC638, 0x9EAF, 0xC639, 0xBFCB, 0xC63A, 0x9EB0, 0xC63B, 0xBFCC,
03072     0xC63C, 0x9EB1, 0xC63D, 0x9EB2, 0xC63E, 0x9EB3, 0xC63F, 0x9EB4,
03073     0xC640, 0xBFCD, 0xC641, 0xBFCE, 0xC642, 0x9EB5, 0xC643, 0x9EB6,
03074     0xC644, 0xBFCF, 0xC645, 0x9EB7, 0xC646, 0x9EB8, 0xC647, 0x9EB9,
03075     0xC648, 0xBFD0, 0xC649, 0x9EBA, 0xC64A, 0x9EBB, 0xC64B, 0x9EBC,
03076     0xC64C, 0x9EBD, 0xC64D, 0x9EBE, 0xC64E, 0x9EBF, 0xC64F, 0x9EC0,
03077     0xC650, 0xBFD1, 0xC651, 0xBFD2, 0xC652, 0x9EC1, 0xC653, 0xBFD3,
03078     0xC654, 0xBFD4, 0xC655, 0xBFD5, 0xC656, 0x9EC2, 0xC657, 0x9EC3,
03079     0xC658, 0x9EC4, 0xC659, 0x9EC5, 0xC65A, 0x9EC6, 0xC65B, 0x9EC7,
03080     0xC65C, 0xBFD6, 0xC65D, 0xBFD7, 0xC65E, 0x9EC8, 0xC65F, 0x9EC9,
03081     0xC660, 0xBFD8, 0xC661, 0x9ECA, 0xC662, 0x9ECB, 0xC663, 0x9ECC,
03082     0xC664, 0x9ECD, 0xC665, 0x9ECE, 0xC666, 0x9ECF, 0xC667, 0x9ED0,
03083     0xC668, 0x9ED1, 0xC669, 0x9ED2, 0xC66A, 0x9ED3, 0xC66B, 0x9ED4,
03084     0xC66C, 0xBFD9, 0xC66D, 0x9ED5, 0xC66E, 0x9ED6, 0xC66F, 0xBFDA,
03085     0xC670, 0x9ED7, 0xC671, 0xBFDB, 0xC672, 0x9ED8, 0xC673, 0x9ED9,
03086     0xC674, 0x9EDA, 0xC675, 0x9EDB, 0xC676, 0x9EDC, 0xC677, 0x9EDD,
03087     0xC678, 0xBFDC, 0xC679, 0xBFDD, 0xC67A, 0x9EDE, 0xC67B, 0x9EDF,
03088     0xC67C, 0xBFDE, 0xC67D, 0x9EE0, 0xC67E, 0x9EE1, 0xC67F, 0x9EE2,
03089     0xC680, 0xBFDF, 0xC681, 0x9EE3, 0xC682, 0x9EE4, 0xC683, 0x9EE5,
03090     0xC684, 0x9EE6, 0xC685, 0x9EE7, 0xC686, 0x9EE8, 0xC687, 0x9EE9,
03091     0xC688, 0xBFE0, 0xC689, 0xBFE1, 0xC68A, 0x9EEA, 0xC68B, 0xBFE2,
03092     0xC68C, 0x9EEB, 0xC68D, 0xBFE3, 0xC68E, 0x9EEC, 0xC68F, 0x9EED,
03093     0xC690, 0x9EEE, 0xC691, 0x9EEF, 0xC692, 0x9EF0, 0xC693, 0x9EF1,
03094     0xC694, 0xBFE4, 0xC695, 0xBFE5, 0xC696, 0x9EF2, 0xC697, 0x9EF3,
03095     0xC698, 0xBFE6, 0xC699, 0x9EF4, 0xC69A, 0x9EF5, 0xC69B, 0x9EF6,
03096     0xC69C, 0xBFE7, 0xC69D, 0x9EF7, 0xC69E, 0x9EF8, 0xC69F, 0x9EF9,
03097     0xC6A0, 0x9EFA, 0xC6A1, 0x9EFB, 0xC6A2, 0x9EFC, 0xC6A3, 0x9EFD,
03098     0xC6A4, 0xBFE8, 0xC6A5, 0xBFE9, 0xC6A6, 0x9EFE, 0xC6A7, 0xBFEA,
03099     0xC6A8, 0x9F41, 0xC6A9, 0xBFEB, 0xC6AA, 0x9F42, 0xC6AB, 0x9F43,
03100     0xC6AC, 0x9F44, 0xC6AD, 0x9F45, 0xC6AE, 0x9F46, 0xC6AF, 0x9F47,
03101     0xC6B0, 0xBFEC, 0xC6B1, 0xBFED, 0xC6B2, 0x9F48, 0xC6B3, 0x9F49,
03102     0xC6B4, 0xBFEE, 0xC6B5, 0x9F4A, 0xC6B6, 0x9F4B, 0xC6B7, 0x9F4C,
03103     0xC6B8, 0xBFEF, 0xC6B9, 0xBFF0, 0xC6BA, 0xBFF1, 0xC6BB, 0x9F4D,
03104     0xC6BC, 0x9F4E, 0xC6BD, 0x9F4F, 0xC6BE, 0x9F50, 0xC6BF, 0x9F51,
03105     0xC6C0, 0xBFF2, 0xC6C1, 0xBFF3, 0xC6C2, 0x9F52, 0xC6C3, 0xBFF4,
03106     0xC6C4, 0x9F53, 0xC6C5, 0xBFF5, 0xC6C6, 0x9F54, 0xC6C7, 0x9F55,
03107     0xC6C8, 0x9F56, 0xC6C9, 0x9F57, 0xC6CA, 0x9F58, 0xC6CB, 0x9F59,
03108     0xC6CC, 0xBFF6, 0xC6CD, 0xBFF7, 0xC6CE, 0x9F5A, 0xC6CF, 0x9F61,
03109     0xC6D0, 0xBFF8, 0xC6D1, 0x9F62, 0xC6D2, 0x9F63, 0xC6D3, 0x9F64,
03110     0xC6D4, 0xBFF9, 0xC6D5, 0x9F65, 0xC6D6, 0x9F66, 0xC6D7, 0x9F67,
03111     0xC6D8, 0x9F68, 0xC6D9, 0x9F69, 0xC6DA, 0x9F6A, 0xC6DB, 0x9F6B,
03112     0xC6DC, 0xBFFA, 0xC6DD, 0xBFFB, 0xC6DE, 0x9F6C, 0xC6DF, 0x9F6D,
03113     0xC6E0, 0xBFFC, 0xC6E1, 0xBFFD, 0xC6E2, 0x9F6E, 0xC6E3, 0x9F6F,
03114     0xC6E4, 0x9F70, 0xC6E5, 0x9F71, 0xC6E6, 0x9F72, 0xC6E7, 0x9F73,
03115     0xC6E8, 0xBFFE, 0xC6E9, 0xC0A1, 0xC6EA, 0x9F74, 0xC6EB, 0x9F75,
03116     0xC6EC, 0xC0A2, 0xC6ED, 0x9F76, 0xC6EE, 0x9F77, 0xC6EF, 0x9F78,
03117     0xC6F0, 0xC0A3, 0xC6F1, 0x9F79, 0xC6F2, 0x9F7A, 0xC6F3, 0x9F81,
03118     0xC6F4, 0x9F82, 0xC6F5, 0x9F83, 0xC6F6, 0x9F84, 0xC6F7, 0x9F85,
03119     0xC6F8, 0xC0A4, 0xC6F9, 0xC0A5, 0xC6FA, 0x9F86, 0xC6FB, 0x9F87,
03120     0xC6FC, 0x9F88, 0xC6FD, 0xC0A6, 0xC6FE, 0x9F89, 0xC6FF, 0x9F8A,
03121     0xC700, 0x9F8B, 0xC701, 0x9F8C, 0xC702, 0x9F8D, 0xC703, 0x9F8E,
03122     0xC704, 0xC0A7, 0xC705, 0xC0A8, 0xC706, 0x9F8F, 0xC707, 0x9F90,
03123     0xC708, 0xC0A9, 0xC709, 0x9F91, 0xC70A, 0x9F92, 0xC70B, 0x9F93,
03124     0xC70C, 0xC0AA, 0xC70D, 0x9F94, 0xC70E, 0x9F95, 0xC70F, 0x9F96,
03125     0xC710, 0x9F97, 0xC711, 0x9F98, 0xC712, 0x9F99, 0xC713, 0x9F9A,
03126     0xC714, 0xC0AB, 0xC715, 0xC0AC, 0xC716, 0x9F9B, 0xC717, 0xC0AD,
03127     0xC718, 0x9F9C, 0xC719, 0xC0AE, 0xC71A, 0x9F9D, 0xC71B, 0x9F9E,
03128     0xC71C, 0x9F9F, 0xC71D, 0x9FA0, 0xC71E, 0x9FA1, 0xC71F, 0x9FA2,
03129     0xC720, 0xC0AF, 0xC721, 0xC0B0, 0xC722, 0x9FA3, 0xC723, 0x9FA4,
03130     0xC724, 0xC0B1, 0xC725, 0x9FA5, 0xC726, 0x9FA6, 0xC727, 0x9FA7,
03131     0xC728, 0xC0B2, 0xC729, 0x9FA8, 0xC72A, 0x9FA9, 0xC72B, 0x9FAA,
03132     0xC72C, 0x9FAB, 0xC72D, 0x9FAC, 0xC72E, 0x9FAD, 0xC72F, 0x9FAE,
03133     0xC730, 0xC0B3, 0xC731, 0xC0B4, 0xC732, 0x9FAF, 0xC733, 0xC0B5,
03134     0xC734, 0x9FB0, 0xC735, 0xC0B6, 0xC736, 0x9FB1, 0xC737, 0xC0B7,
03135     0xC738, 0x9FB2, 0xC739, 0x9FB3, 0xC73A, 0x9FB4, 0xC73B, 0x9FB5,
03136     0xC73C, 0xC0B8, 0xC73D, 0xC0B9, 0xC73E, 0x9FB6, 0xC73F, 0x9FB7,
03137     0xC740, 0xC0BA, 0xC741, 0x9FB8, 0xC742, 0x9FB9, 0xC743, 0x9FBA,
03138     0xC744, 0xC0BB, 0xC745, 0x9FBB, 0xC746, 0x9FBC, 0xC747, 0x9FBD,
03139     0xC748, 0x9FBE, 0xC749, 0x9FBF, 0xC74A, 0xC0BC, 0xC74B, 0x9FC0,
03140     0xC74C, 0xC0BD, 0xC74D, 0xC0BE, 0xC74E, 0x9FC1, 0xC74F, 0xC0BF,
03141     0xC750, 0x9FC2, 0xC751, 0xC0C0, 0xC752, 0xC0C1, 0xC753, 0xC0C2,
03142     0xC754, 0xC0C3, 0xC755, 0xC0C4, 0xC756, 0xC0C5, 0xC757, 0xC0C6,
03143     0xC758, 0xC0C7, 0xC759, 0x9FC3, 0xC75A, 0x9FC4, 0xC75B, 0x9FC5,
03144     0xC75C, 0xC0C8, 0xC75D, 0x9FC6, 0xC75E, 0x9FC7, 0xC75F, 0x9FC8,
03145     0xC760, 0xC0C9, 0xC761, 0x9FC9, 0xC762, 0x9FCA, 0xC763, 0x9FCB,
03146     0xC764, 0x9FCC, 0xC765, 0x9FCD, 0xC766, 0x9FCE, 0xC767, 0x9FCF,
03147     0xC768, 0xC0CA, 0xC769, 0x9FD0, 0xC76A, 0x9FD1, 0xC76B, 0xC0CB,
03148     0xC76C, 0x9FD2, 0xC76D, 0x9FD3, 0xC76E, 0x9FD4, 0xC76F, 0x9FD5,
03149     0xC770, 0x9FD6, 0xC771, 0x9FD7, 0xC772, 0x9FD8, 0xC773, 0x9FD9,
03150     0xC774, 0xC0CC, 0xC775, 0xC0CD, 0xC776, 0x9FDA, 0xC777, 0x9FDB,
03151     0xC778, 0xC0CE, 0xC779, 0x9FDC, 0xC77A, 0x9FDD, 0xC77B, 0x9FDE,
03152     0xC77C, 0xC0CF, 0xC77D, 0xC0D0, 0xC77E, 0xC0D1, 0xC77F, 0x9FDF,
03153     0xC780, 0x9FE0, 0xC781, 0x9FE1, 0xC782, 0x9FE2, 0xC783, 0xC0D2,
03154     0xC784, 0xC0D3, 0xC785, 0xC0D4, 0xC786, 0x9FE3, 0xC787, 0xC0D5,
03155     0xC788, 0xC0D6, 0xC789, 0xC0D7, 0xC78A, 0xC0D8, 0xC78B, 0x9FE4,
03156     0xC78C, 0x9FE5, 0xC78D, 0x9FE6, 0xC78E, 0xC0D9, 0xC78F, 0x9FE7,
03157     0xC790, 0xC0DA, 0xC791, 0xC0DB, 0xC792, 0x9FE8, 0xC793, 0x9FE9,
03158     0xC794, 0xC0DC, 0xC795, 0x9FEA, 0xC796, 0xC0DD, 0xC797, 0xC0DE,
03159     0xC798, 0xC0DF, 0xC799, 0x9FEB, 0xC79A, 0xC0E0, 0xC79B, 0x9FEC,
03160     0xC79C, 0x9FED, 0xC79D, 0x9FEE, 0xC79E, 0x9FEF, 0xC79F, 0x9FF0,
03161     0xC7A0, 0xC0E1, 0xC7A1, 0xC0E2, 0xC7A2, 0x9FF1, 0xC7A3, 0xC0E3,
03162     0xC7A4, 0xC0E4, 0xC7A5, 0xC0E5, 0xC7A6, 0xC0E6, 0xC7A7, 0x9FF2,
03163     0xC7A8, 0x9FF3, 0xC7A9, 0x9FF4, 0xC7AA, 0x9FF5, 0xC7AB, 0x9FF6,
03164     0xC7AC, 0xC0E7, 0xC7AD, 0xC0E8, 0xC7AE, 0x9FF7, 0xC7AF, 0x9FF8,
03165     0xC7B0, 0xC0E9, 0xC7B1, 0x9FF9, 0xC7B2, 0x9FFA, 0xC7B3, 0x9FFB,
03166     0xC7B4, 0xC0EA, 0xC7B5, 0x9FFC, 0xC7B6, 0x9FFD, 0xC7B7, 0x9FFE,
03167     0xC7B8, 0xA041, 0xC7B9, 0xA042, 0xC7BA, 0xA043, 0xC7BB, 0xA044,
03168     0xC7BC, 0xC0EB, 0xC7BD, 0xC0EC, 0xC7BE, 0xA045, 0xC7BF, 0xC0ED,
03169     0xC7C0, 0xC0EE, 0xC7C1, 0xC0EF, 0xC7C2, 0xA046, 0xC7C3, 0xA047,
03170     0xC7C4, 0xA048, 0xC7C5, 0xA049, 0xC7C6, 0xA04A, 0xC7C7, 0xA04B,
03171     0xC7C8, 0xC0F0, 0xC7C9, 0xC0F1, 0xC7CA, 0xA04C, 0xC7CB, 0xA04D,
03172     0xC7CC, 0xC0F2, 0xC7CD, 0xA04E, 0xC7CE, 0xC0F3, 0xC7CF, 0xA04F,
03173     0xC7D0, 0xC0F4, 0xC7D1, 0xA050, 0xC7D2, 0xA051, 0xC7D3, 0xA052,
03174     0xC7D4, 0xA053, 0xC7D5, 0xA054, 0xC7D6, 0xA055, 0xC7D7, 0xA056,
03175     0xC7D8, 0xC0F5, 0xC7D9, 0xA057, 0xC7DA, 0xA058, 0xC7DB, 0xA059,
03176     0xC7DC, 0xA05A, 0xC7DD, 0xC0F6, 0xC7DE, 0xA061, 0xC7DF, 0xA062,
03177     0xC7E0, 0xA063, 0xC7E1, 0xA064, 0xC7E2, 0xA065, 0xC7E3, 0xA066,
03178     0xC7E4, 0xC0F7, 0xC7E5, 0xA067, 0xC7E6, 0xA068, 0xC7E7, 0xA069,
03179     0xC7E8, 0xC0F8, 0xC7E9, 0xA06A, 0xC7EA, 0xA06B, 0xC7EB, 0xA06C,
03180     0xC7EC, 0xC0F9, 0xC7ED, 0xA06D, 0xC7EE, 0xA06E, 0xC7EF, 0xA06F,
03181     0xC7F0, 0xA070, 0xC7F1, 0xA071, 0xC7F2, 0xA072, 0xC7F3, 0xA073,
03182     0xC7F4, 0xA074, 0xC7F5, 0xA075, 0xC7F6, 0xA076, 0xC7F7, 0xA077,
03183     0xC7F8, 0xA078, 0xC7F9, 0xA079, 0xC7FA, 0xA07A, 0xC7FB, 0xA081,
03184     0xC7FC, 0xA082, 0xC7FD, 0xA083, 0xC7FE, 0xA084, 0xC7FF, 0xA085,
03185     0xC800, 0xC0FA, 0xC801, 0xC0FB, 0xC802, 0xA086, 0xC803, 0xA087,
03186     0xC804, 0xC0FC, 0xC805, 0xA088, 0xC806, 0xA089, 0xC807, 0xA08A,
03187     0xC808, 0xC0FD, 0xC809, 0xA08B, 0xC80A, 0xC0FE, 0xC80B, 0xA08C,
03188     0xC80C, 0xA08D, 0xC80D, 0xA08E, 0xC80E, 0xA08F, 0xC80F, 0xA090,
03189     0xC810, 0xC1A1, 0xC811, 0xC1A2, 0xC812, 0xA091, 0xC813, 0xC1A3,
03190     0xC814, 0xA092, 0xC815, 0xC1A4, 0xC816, 0xC1A5, 0xC817, 0xA093,
03191     0xC818, 0xA094, 0xC819, 0xA095, 0xC81A, 0xA096, 0xC81B, 0xA097,
03192     0xC81C, 0xC1A6, 0xC81D, 0xC1A7, 0xC81E, 0xA098, 0xC81F, 0xA099,
03193     0xC820, 0xC1A8, 0xC821, 0xA09A, 0xC822, 0xA09B, 0xC823, 0xA09C,
03194     0xC824, 0xC1A9, 0xC825, 0xA09D, 0xC826, 0xA09E, 0xC827, 0xA09F,
03195     0xC828, 0xA0A0, 0xC829, 0xA0A1, 0xC82A, 0xA0A2, 0xC82B, 0xA0A3,
03196     0xC82C, 0xC1AA, 0xC82D, 0xC1AB, 0xC82E, 0xA0A4, 0xC82F, 0xC1AC,
03197     0xC830, 0xA0A5, 0xC831, 0xC1AD, 0xC832, 0xA0A6, 0xC833, 0xA0A7,
03198     0xC834, 0xA0A8, 0xC835, 0xA0A9, 0xC836, 0xA0AA, 0xC837, 0xA0AB,
03199     0xC838, 0xC1AE, 0xC839, 0xA0AC, 0xC83A, 0xA0AD, 0xC83B, 0xA0AE,
03200     0xC83C, 0xC1AF, 0xC83D, 0xA0AF, 0xC83E, 0xA0B0, 0xC83F, 0xA0B1,
03201     0xC840, 0xC1B0, 0xC841, 0xA0B2, 0xC842, 0xA0B3, 0xC843, 0xA0B4,
03202     0xC844, 0xA0B5, 0xC845, 0xA0B6, 0xC846, 0xA0B7, 0xC847, 0xA0B8,
03203     0xC848, 0xC1B1, 0xC849, 0xC1B2, 0xC84A, 0xA0B9, 0xC84B, 0xA0BA,
03204     0xC84C, 0xC1B3, 0xC84D, 0xC1B4, 0xC84E, 0xA0BB, 0xC84F, 0xA0BC,
03205     0xC850, 0xA0BD, 0xC851, 0xA0BE, 0xC852, 0xA0BF, 0xC853, 0xA0C0,
03206     0xC854, 0xC1B5, 0xC855, 0xA0C1, 0xC856, 0xA0C2, 0xC857, 0xA0C3,
03207     0xC858, 0xA0C4, 0xC859, 0xA0C5, 0xC85A, 0xA0C6, 0xC85B, 0xA0C7,
03208     0xC85C, 0xA0C8, 0xC85D, 0xA0C9, 0xC85E, 0xA0CA, 0xC85F, 0xA0CB,
03209     0xC860, 0xA0CC, 0xC861, 0xA0CD, 0xC862, 0xA0CE, 0xC863, 0xA0CF,
03210     0xC864, 0xA0D0, 0xC865, 0xA0D1, 0xC866, 0xA0D2, 0xC867, 0xA0D3,
03211     0xC868, 0xA0D4, 0xC869, 0xA0D5, 0xC86A, 0xA0D6, 0xC86B, 0xA0D7,
03212     0xC86C, 0xA0D8, 0xC86D, 0xA0D9, 0xC86E, 0xA0DA, 0xC86F, 0xA0DB,
03213     0xC870, 0xC1B6, 0xC871, 0xC1B7, 0xC872, 0xA0DC, 0xC873, 0xA0DD,
03214     0xC874, 0xC1B8, 0xC875, 0xA0DE, 0xC876, 0xA0DF, 0xC877, 0xA0E0,
03215     0xC878, 0xC1B9, 0xC879, 0xA0E1, 0xC87A, 0xC1BA, 0xC87B, 0xA0E2,
03216     0xC87C, 0xA0E3, 0xC87D, 0xA0E4, 0xC87E, 0xA0E5, 0xC87F, 0xA0E6,
03217     0xC880, 0xC1BB, 0xC881, 0xC1BC, 0xC882, 0xA0E7, 0xC883, 0xC1BD,
03218     0xC884, 0xA0E8, 0xC885, 0xC1BE, 0xC886, 0xC1BF, 0xC887, 0xC1C0,
03219     0xC888, 0xA0E9, 0xC889, 0xA0EA, 0xC88A, 0xA0EB, 0xC88B, 0xC1C1,
03220     0xC88C, 0xC1C2, 0xC88D, 0xC1C3, 0xC88E, 0xA0EC, 0xC88F, 0xA0ED,
03221     0xC890, 0xA0EE, 0xC891, 0xA0EF, 0xC892, 0xA0F0, 0xC893, 0xA0F1,
03222     0xC894, 0xC1C4, 0xC895, 0xA0F2, 0xC896, 0xA0F3, 0xC897, 0xA0F4,
03223     0xC898, 0xA0F5, 0xC899, 0xA0F6, 0xC89A, 0xA0F7, 0xC89B, 0xA0F8,
03224     0xC89C, 0xA0F9, 0xC89D, 0xC1C5, 0xC89E, 0xA0FA, 0xC89F, 0xC1C6,
03225     0xC8A0, 0xA0FB, 0xC8A1, 0xC1C7, 0xC8A2, 0xA0FC, 0xC8A3, 0xA0FD,
03226     0xC8A4, 0xA0FE, 0xC8A5, 0xA141, 0xC8A6, 0xA142, 0xC8A7, 0xA143,
03227     0xC8A8, 0xC1C8, 0xC8A9, 0xA144, 0xC8AA, 0xA145, 0xC8AB, 0xA146,
03228     0xC8AC, 0xA147, 0xC8AD, 0xA148, 0xC8AE, 0xA149, 0xC8AF, 0xA14A,
03229     0xC8B0, 0xA14B, 0xC8B1, 0xA14C, 0xC8B2, 0xA14D, 0xC8B3, 0xA14E,
03230     0xC8B4, 0xA14F, 0xC8B5, 0xA150, 0xC8B6, 0xA151, 0xC8B7, 0xA152,
03231     0xC8B8, 0xA153, 0xC8B9, 0xA154, 0xC8BA, 0xA155, 0xC8BB, 0xA156,
03232     0xC8BC, 0xC1C9, 0xC8BD, 0xC1CA, 0xC8BE, 0xA157, 0xC8BF, 0xA158,
03233     0xC8C0, 0xA159, 0xC8C1, 0xA15A, 0xC8C2, 0xA161, 0xC8C3, 0xA162,
03234     0xC8C4, 0xC1CB, 0xC8C5, 0xA163, 0xC8C6, 0xA164, 0xC8C7, 0xA165,
03235     0xC8C8, 0xC1CC, 0xC8C9, 0xA166, 0xC8CA, 0xA167, 0xC8CB, 0xA168,
03236     0xC8CC, 0xC1CD, 0xC8CD, 0xA169, 0xC8CE, 0xA16A, 0xC8CF, 0xA16B,
03237     0xC8D0, 0xA16C, 0xC8D1, 0xA16D, 0xC8D2, 0xA16E, 0xC8D3, 0xA16F,
03238     0xC8D4, 0xC1CE, 0xC8D5, 0xC1CF, 0xC8D6, 0xA170, 0xC8D7, 0xC1D0,
03239     0xC8D8, 0xA171, 0xC8D9, 0xC1D1, 0xC8DA, 0xA172, 0xC8DB, 0xA173,
03240     0xC8DC, 0xA174, 0xC8DD, 0xA175, 0xC8DE, 0xA176, 0xC8DF, 0xA177,
03241     0xC8E0, 0xC1D2, 0xC8E1, 0xC1D3, 0xC8E2, 0xA178, 0xC8E3, 0xA179,
03242     0xC8E4, 0xC1D4, 0xC8E5, 0xA17A, 0xC8E6, 0xA181, 0xC8E7, 0xA182,
03243     0xC8E8, 0xA183, 0xC8E9, 0xA184, 0xC8EA, 0xA185, 0xC8EB, 0xA186,
03244     0xC8EC, 0xA187, 0xC8ED, 0xA188, 0xC8EE, 0xA189, 0xC8EF, 0xA18A,
03245     0xC8F0, 0xA18B, 0xC8F1, 0xA18C, 0xC8F2, 0xA18D, 0xC8F3, 0xA18E,
03246     0xC8F4, 0xA18F, 0xC8F5, 0xC1D5, 0xC8F6, 0xA190, 0xC8F7, 0xA191,
03247     0xC8F8, 0xA192, 0xC8F9, 0xA193, 0xC8FA, 0xA194, 0xC8FB, 0xA195,
03248     0xC8FC, 0xC1D6, 0xC8FD, 0xC1D7, 0xC8FE, 0xA196, 0xC8FF, 0xA197,
03249     0xC900, 0xC1D8, 0xC901, 0xA198, 0xC902, 0xA199, 0xC903, 0xA19A,
03250     0xC904, 0xC1D9, 0xC905, 0xC1DA, 0xC906, 0xC1DB, 0xC907, 0xA19B,
03251     0xC908, 0xA19C, 0xC909, 0xA19D, 0xC90A, 0xA19E, 0xC90B, 0xA19F,
03252     0xC90C, 0xC1DC, 0xC90D, 0xC1DD, 0xC90E, 0xA1A0, 0xC90F, 0xC1DE,
03253     0xC910, 0xA241, 0xC911, 0xC1DF, 0xC912, 0xA242, 0xC913, 0xA243,
03254     0xC914, 0xA244, 0xC915, 0xA245, 0xC916, 0xA246, 0xC917, 0xA247,
03255     0xC918, 0xC1E0, 0xC919, 0xA248, 0xC91A, 0xA249, 0xC91B, 0xA24A,
03256     0xC91C, 0xA24B, 0xC91D, 0xA24C, 0xC91E, 0xA24D, 0xC91F, 0xA24E,
03257     0xC920, 0xA24F, 0xC921, 0xA250, 0xC922, 0xA251, 0xC923, 0xA252,
03258     0xC924, 0xA253, 0xC925, 0xA254, 0xC926, 0xA255, 0xC927, 0xA256,
03259     0xC928, 0xA257, 0xC929, 0xA258, 0xC92A, 0xA259, 0xC92B, 0xA25A,
03260     0xC92C, 0xC1E1, 0xC92D, 0xA261, 0xC92E, 0xA262, 0xC92F, 0xA263,
03261     0xC930, 0xA264, 0xC931, 0xA265, 0xC932, 0xA266, 0xC933, 0xA267,
03262     0xC934, 0xC1E2, 0xC935, 0xA268, 0xC936, 0xA269, 0xC937, 0xA26A,
03263     0xC938, 0xA26B, 0xC939, 0xA26C, 0xC93A, 0xA26D, 0xC93B, 0xA26E,
03264     0xC93C, 0xA26F, 0xC93D, 0xA270, 0xC93E, 0xA271, 0xC93F, 0xA272,
03265     0xC940, 0xA273, 0xC941, 0xA274, 0xC942, 0xA275, 0xC943, 0xA276,
03266     0xC944, 0xA277, 0xC945, 0xA278, 0xC946, 0xA279, 0xC947, 0xA27A,
03267     0xC948, 0xA281, 0xC949, 0xA282, 0xC94A, 0xA283, 0xC94B, 0xA284,
03268     0xC94C, 0xA285, 0xC94D, 0xA286, 0xC94E, 0xA287, 0xC94F, 0xA288,
03269     0xC950, 0xC1E3, 0xC951, 0xC1E4, 0xC952, 0xA289, 0xC953, 0xA28A,
03270     0xC954, 0xC1E5, 0xC955, 0xA28B, 0xC956, 0xA28C, 0xC957, 0xA28D,
03271     0xC958, 0xC1E6, 0xC959, 0xA28E, 0xC95A, 0xA28F, 0xC95B, 0xA290,
03272     0xC95C, 0xA291, 0xC95D, 0xA292, 0xC95E, 0xA293, 0xC95F, 0xA294,
03273     0xC960, 0xC1E7, 0xC961, 0xC1E8, 0xC962, 0xA295, 0xC963, 0xC1E9,
03274     0xC964, 0xA296, 0xC965, 0xA297, 0xC966, 0xA298, 0xC967, 0xA299,
03275     0xC968, 0xA29A, 0xC969, 0xA29B, 0xC96A, 0xA29C, 0xC96B, 0xA29D,
03276     0xC96C, 0xC1EA, 0xC96D, 0xA29E, 0xC96E, 0xA29F, 0xC96F, 0xA2A0,
03277     0xC970, 0xC1EB, 0xC971, 0xA341, 0xC972, 0xA342, 0xC973, 0xA343,
03278     0xC974, 0xC1EC, 0xC975, 0xA344, 0xC976, 0xA345, 0xC977, 0xA346,
03279     0xC978, 0xA347, 0xC979, 0xA348, 0xC97A, 0xA349, 0xC97B, 0xA34A,
03280     0xC97C, 0xC1ED, 0xC97D, 0xA34B, 0xC97E, 0xA34C, 0xC97F, 0xA34D,
03281     0xC980, 0xA34E, 0xC981, 0xA34F, 0xC982, 0xA350, 0xC983, 0xA351,
03282     0xC984, 0xA352, 0xC985, 0xA353, 0xC986, 0xA354, 0xC987, 0xA355,
03283     0xC988, 0xC1EE, 0xC989, 0xC1EF, 0xC98A, 0xA356, 0xC98B, 0xA357,
03284     0xC98C, 0xC1F0, 0xC98D, 0xA358, 0xC98E, 0xA359, 0xC98F, 0xA35A,
03285     0xC990, 0xC1F1, 0xC991, 0xA361, 0xC992, 0xA362, 0xC993, 0xA363,
03286     0xC994, 0xA364, 0xC995, 0xA365, 0xC996, 0xA366, 0xC997, 0xA367,
03287     0xC998, 0xC1F2, 0xC999, 0xC1F3, 0xC99A, 0xA368, 0xC99B, 0xC1F4,
03288     0xC99C, 0xA369, 0xC99D, 0xC1F5, 0xC99E, 0xA36A, 0xC99F, 0xA36B,
03289     0xC9A0, 0xA36C, 0xC9A1, 0xA36D, 0xC9A2, 0xA36E, 0xC9A3, 0xA36F,
03290     0xC9A4, 0xA370, 0xC9A5, 0xA371, 0xC9A6, 0xA372, 0xC9A7, 0xA373,
03291     0xC9A8, 0xA374, 0xC9A9, 0xA375, 0xC9AA, 0xA376, 0xC9AB, 0xA377,
03292     0xC9AC, 0xA378, 0xC9AD, 0xA379, 0xC9AE, 0xA37A, 0xC9AF, 0xA381,
03293     0xC9B0, 0xA382, 0xC9B1, 0xA383, 0xC9B2, 0xA384, 0xC9B3, 0xA385,
03294     0xC9B4, 0xA386, 0xC9B5, 0xA387, 0xC9B6, 0xA388, 0xC9B7, 0xA389,
03295     0xC9B8, 0xA38A, 0xC9B9, 0xA38B, 0xC9BA, 0xA38C, 0xC9BB, 0xA38D,
03296     0xC9BC, 0xA38E, 0xC9BD, 0xA38F, 0xC9BE, 0xA390, 0xC9BF, 0xA391,
03297     0xC9C0, 0xC1F6, 0xC9C1, 0xC1F7, 0xC9C2, 0xA392, 0xC9C3, 0xA393,
03298     0xC9C4, 0xC1F8, 0xC9C5, 0xA394, 0xC9C6, 0xA395, 0xC9C7, 0xC1F9,
03299     0xC9C8, 0xC1FA, 0xC9C9, 0xA396, 0xC9CA, 0xC1FB, 0xC9CB, 0xA397,
03300     0xC9CC, 0xA398, 0xC9CD, 0xA399, 0xC9CE, 0xA39A, 0xC9CF, 0xA39B,
03301     0xC9D0, 0xC1FC, 0xC9D1, 0xC1FD, 0xC9D2, 0xA39C, 0xC9D3, 0xC1FE,
03302     0xC9D4, 0xA39D, 0xC9D5, 0xC2A1, 0xC9D6, 0xC2A2, 0xC9D7, 0xA39E,
03303     0xC9D8, 0xA39F, 0xC9D9, 0xC2A3, 0xC9DA, 0xC2A4, 0xC9DB, 0xA3A0,
03304     0xC9DC, 0xC2A5, 0xC9DD, 0xC2A6, 0xC9DE, 0xA441, 0xC9DF, 0xA442,
03305     0xC9E0, 0xC2A7, 0xC9E1, 0xA443, 0xC9E2, 0xC2A8, 0xC9E3, 0xA444,
03306     0xC9E4, 0xC2A9, 0xC9E5, 0xA445, 0xC9E6, 0xA446, 0xC9E7, 0xC2AA,
03307     0xC9E8, 0xA447, 0xC9E9, 0xA448, 0xC9EA, 0xA449, 0xC9EB, 0xA44A,
03308     0xC9EC, 0xC2AB, 0xC9ED, 0xC2AC, 0xC9EE, 0xA44B, 0xC9EF, 0xC2AD,
03309     0xC9F0, 0xC2AE, 0xC9F1, 0xC2AF, 0xC9F2, 0xA44C, 0xC9F3, 0xA44D,
03310     0xC9F4, 0xA44E, 0xC9F5, 0xA44F, 0xC9F6, 0xA450, 0xC9F7, 0xA451,
03311     0xC9F8, 0xC2B0, 0xC9F9, 0xC2B1, 0xC9FA, 0xA452, 0xC9FB, 0xA453,
03312     0xC9FC, 0xC2B2, 0xC9FD, 0xA454, 0xC9FE, 0xA455, 0xC9FF, 0xA456,
03313     0xCA00, 0xC2B3, 0xCA01, 0xA457, 0xCA02, 0xA458, 0xCA03, 0xA459,
03314     0xCA04, 0xA45A, 0xCA05, 0xA461, 0xCA06, 0xA462, 0xCA07, 0xA463,
03315     0xCA08, 0xC2B4, 0xCA09, 0xC2B5, 0xCA0A, 0xA464, 0xCA0B, 0xC2B6,
03316     0xCA0C, 0xC2B7, 0xCA0D, 0xC2B8, 0xCA0E, 0xA465, 0xCA0F, 0xA466,
03317     0xCA10, 0xA467, 0xCA11, 0xA468, 0xCA12, 0xA469, 0xCA13, 0xA46A,
03318     0xCA14, 0xC2B9, 0xCA15, 0xA46B, 0xCA16, 0xA46C, 0xCA17, 0xA46D,
03319     0xCA18, 0xC2BA, 0xCA19, 0xA46E, 0xCA1A, 0xA46F, 0xCA1B, 0xA470,
03320     0xCA1C, 0xA471, 0xCA1D, 0xA472, 0xCA1E, 0xA473, 0xCA1F, 0xA474,
03321     0xCA20, 0xA475, 0xCA21, 0xA476, 0xCA22, 0xA477, 0xCA23, 0xA478,
03322     0xCA24, 0xA479, 0xCA25, 0xA47A, 0xCA26, 0xA481, 0xCA27, 0xA482,
03323     0xCA28, 0xA483, 0xCA29, 0xC2BB, 0xCA2A, 0xA484, 0xCA2B, 0xA485,
03324     0xCA2C, 0xA486, 0xCA2D, 0xA487, 0xCA2E, 0xA488, 0xCA2F, 0xA489,
03325     0xCA30, 0xA48A, 0xCA31, 0xA48B, 0xCA32, 0xA48C, 0xCA33, 0xA48D,
03326     0xCA34, 0xA48E, 0xCA35, 0xA48F, 0xCA36, 0xA490, 0xCA37, 0xA491,
03327     0xCA38, 0xA492, 0xCA39, 0xA493, 0xCA3A, 0xA494, 0xCA3B, 0xA495,
03328     0xCA3C, 0xA496, 0xCA3D, 0xA497, 0xCA3E, 0xA498, 0xCA3F, 0xA499,
03329     0xCA40, 0xA49A, 0xCA41, 0xA49B, 0xCA42, 0xA49C, 0xCA43, 0xA49D,
03330     0xCA44, 0xA49E, 0xCA45, 0xA49F, 0xCA46, 0xA4A0, 0xCA47, 0xA541,
03331     0xCA48, 0xA542, 0xCA49, 0xA543, 0xCA4A, 0xA544, 0xCA4B, 0xA545,
03332     0xCA4C, 0xC2BC, 0xCA4D, 0xC2BD, 0xCA4E, 0xA546, 0xCA4F, 0xA547,
03333     0xCA50, 0xC2BE, 0xCA51, 0xA548, 0xCA52, 0xA549, 0xCA53, 0xA54A,
03334     0xCA54, 0xC2BF, 0xCA55, 0xA54B, 0xCA56, 0xA54C, 0xCA57, 0xA54D,
03335     0xCA58, 0xA54E, 0xCA59, 0xA54F, 0xCA5A, 0xA550, 0xCA5B, 0xA551,
03336     0xCA5C, 0xC2C0, 0xCA5D, 0xC2C1, 0xCA5E, 0xA552, 0xCA5F, 0xC2C2,
03337     0xCA60, 0xC2C3, 0xCA61, 0xC2C4, 0xCA62, 0xA553, 0xCA63, 0xA554,
03338     0xCA64, 0xA555, 0xCA65, 0xA556, 0xCA66, 0xA557, 0xCA67, 0xA558,
03339     0xCA68, 0xC2C5, 0xCA69, 0xA559, 0xCA6A, 0xA55A, 0xCA6B, 0xA561,
03340     0xCA6C, 0xA562, 0xCA6D, 0xA563, 0xCA6E, 0xA564, 0xCA6F, 0xA565,
03341     0xCA70, 0xA566, 0xCA71, 0xA567, 0xCA72, 0xA568, 0xCA73, 0xA569,
03342     0xCA74, 0xA56A, 0xCA75, 0xA56B, 0xCA76, 0xA56C, 0xCA77, 0xA56D,
03343     0xCA78, 0xA56E, 0xCA79, 0xA56F, 0xCA7A, 0xA570, 0xCA7B, 0xA571,
03344     0xCA7C, 0xA572, 0xCA7D, 0xC2C6, 0xCA7E, 0xA573, 0xCA7F, 0xA574,
03345     0xCA80, 0xA575, 0xCA81, 0xA576, 0xCA82, 0xA577, 0xCA83, 0xA578,
03346     0xCA84, 0xC2C7, 0xCA85, 0xA579, 0xCA86, 0xA57A, 0xCA87, 0xA581,
03347     0xCA88, 0xA582, 0xCA89, 0xA583, 0xCA8A, 0xA584, 0xCA8B, 0xA585,
03348     0xCA8C, 0xA586, 0xCA8D, 0xA587, 0xCA8E, 0xA588, 0xCA8F, 0xA589,
03349     0xCA90, 0xA58A, 0xCA91, 0xA58B, 0xCA92, 0xA58C, 0xCA93, 0xA58D,
03350     0xCA94, 0xA58E, 0xCA95, 0xA58F, 0xCA96, 0xA590, 0xCA97, 0xA591,
03351     0xCA98, 0xC2C8, 0xCA99, 0xA592, 0xCA9A, 0xA593, 0xCA9B, 0xA594,
03352     0xCA9C, 0xA595, 0xCA9D, 0xA596, 0xCA9E, 0xA597, 0xCA9F, 0xA598,
03353     0xCAA0, 0xA599, 0xCAA1, 0xA59A, 0xCAA2, 0xA59B, 0xCAA3, 0xA59C,
03354     0xCAA4, 0xA59D, 0xCAA5, 0xA59E, 0xCAA6, 0xA59F, 0xCAA7, 0xA5A0,
03355     0xCAA8, 0xA641, 0xCAA9, 0xA642, 0xCAAA, 0xA643, 0xCAAB, 0xA644,
03356     0xCAAC, 0xA645, 0xCAAD, 0xA646, 0xCAAE, 0xA647, 0xCAAF, 0xA648,
03357     0xCAB0, 0xA649, 0xCAB1, 0xA64A, 0xCAB2, 0xA64B, 0xCAB3, 0xA64C,
03358     0xCAB4, 0xA64D, 0xCAB5, 0xA64E, 0xCAB6, 0xA64F, 0xCAB7, 0xA650,
03359     0xCAB8, 0xA651, 0xCAB9, 0xA652, 0xCABA, 0xA653, 0xCABB, 0xA654,
03360     0xCABC, 0xC2C9, 0xCABD, 0xC2CA, 0xCABE, 0xA655, 0xCABF, 0xA656,
03361     0xCAC0, 0xC2CB, 0xCAC1, 0xA657, 0xCAC2, 0xA658, 0xCAC3, 0xA659,
03362     0xCAC4, 0xC2CC, 0xCAC5, 0xA65A, 0xCAC6, 0xA661, 0xCAC7, 0xA662,
03363     0xCAC8, 0xA663, 0xCAC9, 0xA664, 0xCACA, 0xA665, 0xCACB, 0xA666,
03364     0xCACC, 0xC2CD, 0xCACD, 0xC2CE, 0xCACE, 0xA667, 0xCACF, 0xC2CF,
03365     0xCAD0, 0xA668, 0xCAD1, 0xC2D0, 0xCAD2, 0xA669, 0xCAD3, 0xC2D1,
03366     0xCAD4, 0xA66A, 0xCAD5, 0xA66B, 0xCAD6, 0xA66C, 0xCAD7, 0xA66D,
03367     0xCAD8, 0xC2D2, 0xCAD9, 0xC2D3, 0xCADA, 0xA66E, 0xCADB, 0xA66F,
03368     0xCADC, 0xA670, 0xCADD, 0xA671, 0xCADE, 0xA672, 0xCADF, 0xA673,
03369     0xCAE0, 0xC2D4, 0xCAE1, 0xA674, 0xCAE2, 0xA675, 0xCAE3, 0xA676,
03370     0xCAE4, 0xA677, 0xCAE5, 0xA678, 0xCAE6, 0xA679, 0xCAE7, 0xA67A,
03371     0xCAE8, 0xA681, 0xCAE9, 0xA682, 0xCAEA, 0xA683, 0xCAEB, 0xA684,
03372     0xCAEC, 0xC2D5, 0xCAED, 0xA685, 0xCAEE, 0xA686, 0xCAEF, 0xA687,
03373     0xCAF0, 0xA688, 0xCAF1, 0xA689, 0xCAF2, 0xA68A, 0xCAF3, 0xA68B,
03374     0xCAF4, 0xC2D6, 0xCAF5, 0xA68C, 0xCAF6, 0xA68D, 0xCAF7, 0xA68E,
03375     0xCAF8, 0xA68F, 0xCAF9, 0xA690, 0xCAFA, 0xA691, 0xCAFB, 0xA692,
03376     0xCAFC, 0xA693, 0xCAFD, 0xA694, 0xCAFE, 0xA695, 0xCAFF, 0xA696,
03377     0xCB00, 0xA697, 0xCB01, 0xA698, 0xCB02, 0xA699, 0xCB03, 0xA69A,
03378     0xCB04, 0xA69B, 0xCB05, 0xA69C, 0xCB06, 0xA69D, 0xCB07, 0xA69E,
03379     0xCB08, 0xC2D7, 0xCB09, 0xA69F, 0xCB0A, 0xA6A0, 0xCB0B, 0xA741,
03380     0xCB0C, 0xA742, 0xCB0D, 0xA743, 0xCB0E, 0xA744, 0xCB0F, 0xA745,
03381     0xCB10, 0xC2D8, 0xCB11, 0xA746, 0xCB12, 0xA747, 0xCB13, 0xA748,
03382     0xCB14, 0xC2D9, 0xCB15, 0xA749, 0xCB16, 0xA74A, 0xCB17, 0xA74B,
03383     0xCB18, 0xC2DA, 0xCB19, 0xA74C, 0xCB1A, 0xA74D, 0xCB1B, 0xA74E,
03384     0xCB1C, 0xA74F, 0xCB1D, 0xA750, 0xCB1E, 0xA751, 0xCB1F, 0xA752,
03385     0xCB20, 0xC2DB, 0xCB21, 0xC2DC, 0xCB22, 0xA753, 0xCB23, 0xA754,
03386     0xCB24, 0xA755, 0xCB25, 0xA756, 0xCB26, 0xA757, 0xCB27, 0xA758,
03387     0xCB28, 0xA759, 0xCB29, 0xA75A, 0xCB2A, 0xA761, 0xCB2B, 0xA762,
03388     0xCB2C, 0xA763, 0xCB2D, 0xA764, 0xCB2E, 0xA765, 0xCB2F, 0xA766,
03389     0xCB30, 0xA767, 0xCB31, 0xA768, 0xCB32, 0xA769, 0xCB33, 0xA76A,
03390     0xCB34, 0xA76B, 0xCB35, 0xA76C, 0xCB36, 0xA76D, 0xCB37, 0xA76E,
03391     0xCB38, 0xA76F, 0xCB39, 0xA770, 0xCB3A, 0xA771, 0xCB3B, 0xA772,
03392     0xCB3C, 0xA773, 0xCB3D, 0xA774, 0xCB3E, 0xA775, 0xCB3F, 0xA776,
03393     0xCB40, 0xA777, 0xCB41, 0xC2DD, 0xCB42, 0xA778, 0xCB43, 0xA779,
03394     0xCB44, 0xA77A, 0xCB45, 0xA781, 0xCB46, 0xA782, 0xCB47, 0xA783,
03395     0xCB48, 0xC2DE, 0xCB49, 0xC2DF, 0xCB4A, 0xA784, 0xCB4B, 0xA785,
03396     0xCB4C, 0xC2E0, 0xCB4D, 0xA786, 0xCB4E, 0xA787, 0xCB4F, 0xA788,
03397     0xCB50, 0xC2E1, 0xCB51, 0xA789, 0xCB52, 0xA78A, 0xCB53, 0xA78B,
03398     0xCB54, 0xA78C, 0xCB55, 0xA78D, 0xCB56, 0xA78E, 0xCB57, 0xA78F,
03399     0xCB58, 0xC2E2, 0xCB59, 0xC2E3, 0xCB5A, 0xA790, 0xCB5B, 0xA791,
03400     0xCB5C, 0xA792, 0xCB5D, 0xC2E4, 0xCB5E, 0xA793, 0xCB5F, 0xA794,
03401     0xCB60, 0xA795, 0xCB61, 0xA796, 0xCB62, 0xA797, 0xCB63, 0xA798,
03402     0xCB64, 0xC2E5, 0xCB65, 0xA799, 0xCB66, 0xA79A, 0xCB67, 0xA79B,
03403     0xCB68, 0xA79C, 0xCB69, 0xA79D, 0xCB6A, 0xA79E, 0xCB6B, 0xA79F,
03404     0xCB6C, 0xA7A0, 0xCB6D, 0xA841, 0xCB6E, 0xA842, 0xCB6F, 0xA843,
03405     0xCB70, 0xA844, 0xCB71, 0xA845, 0xCB72, 0xA846, 0xCB73, 0xA847,
03406     0xCB74, 0xA848, 0xCB75, 0xA849, 0xCB76, 0xA84A, 0xCB77, 0xA84B,
03407     0xCB78, 0xC2E6, 0xCB79, 0xC2E7, 0xCB7A, 0xA84C, 0xCB7B, 0xA84D,
03408     0xCB7C, 0xA84E, 0xCB7D, 0xA84F, 0xCB7E, 0xA850, 0xCB7F, 0xA851,
03409     0xCB80, 0xA852, 0xCB81, 0xA853, 0xCB82, 0xA854, 0xCB83, 0xA855,
03410     0xCB84, 0xA856, 0xCB85, 0xA857, 0xCB86, 0xA858, 0xCB87, 0xA859,
03411     0xCB88, 0xA85A, 0xCB89, 0xA861, 0xCB8A, 0xA862, 0xCB8B, 0xA863,
03412     0xCB8C, 0xA864, 0xCB8D, 0xA865, 0xCB8E, 0xA866, 0xCB8F, 0xA867,
03413     0xCB90, 0xA868, 0xCB91, 0xA869, 0xCB92, 0xA86A, 0xCB93, 0xA86B,
03414     0xCB94, 0xA86C, 0xCB95, 0xA86D, 0xCB96, 0xA86E, 0xCB97, 0xA86F,
03415     0xCB98, 0xA870, 0xCB99, 0xA871, 0xCB9A, 0xA872, 0xCB9B, 0xA873,
03416     0xCB9C, 0xC2E8, 0xCB9D, 0xA874, 0xCB9E, 0xA875, 0xCB9F, 0xA876,
03417     0xCBA0, 0xA877, 0xCBA1, 0xA878, 0xCBA2, 0xA879, 0xCBA3, 0xA87A,
03418     0xCBA4, 0xA881, 0xCBA5, 0xA882, 0xCBA6, 0xA883, 0xCBA7, 0xA884,
03419     0xCBA8, 0xA885, 0xCBA9, 0xA886, 0xCBAA, 0xA887, 0xCBAB, 0xA888,
03420     0xCBAC, 0xA889, 0xCBAD, 0xA88A, 0xCBAE, 0xA88B, 0xCBAF, 0xA88C,
03421     0xCBB0, 0xA88D, 0xCBB1, 0xA88E, 0xCBB2, 0xA88F, 0xCBB3, 0xA890,
03422     0xCBB4, 0xA891, 0xCBB5, 0xA892, 0xCBB6, 0xA893, 0xCBB7, 0xA894,
03423     0xCBB8, 0xC2E9, 0xCBB9, 0xA895, 0xCBBA, 0xA896, 0xCBBB, 0xA897,
03424     0xCBBC, 0xA898, 0xCBBD, 0xA899, 0xCBBE, 0xA89A, 0xCBBF, 0xA89B,
03425     0xCBC0, 0xA89C, 0xCBC1, 0xA89D, 0xCBC2, 0xA89E, 0xCBC3, 0xA89F,
03426     0xCBC4, 0xA8A0, 0xCBC5, 0xA941, 0xCBC6, 0xA942, 0xCBC7, 0xA943,
03427     0xCBC8, 0xA944, 0xCBC9, 0xA945, 0xCBCA, 0xA946, 0xCBCB, 0xA947,
03428     0xCBCC, 0xA948, 0xCBCD, 0xA949, 0xCBCE, 0xA94A, 0xCBCF, 0xA94B,
03429     0xCBD0, 0xA94C, 0xCBD1, 0xA94D, 0xCBD2, 0xA94E, 0xCBD3, 0xA94F,
03430     0xCBD4, 0xC2EA, 0xCBD5, 0xA950, 0xCBD6, 0xA951, 0xCBD7, 0xA952,
03431     0xCBD8, 0xA953, 0xCBD9, 0xA954, 0xCBDA, 0xA955, 0xCBDB, 0xA956,
03432     0xCBDC, 0xA957, 0xCBDD, 0xA958, 0xCBDE, 0xA959, 0xCBDF, 0xA95A,
03433     0xCBE0, 0xA961, 0xCBE1, 0xA962, 0xCBE2, 0xA963, 0xCBE3, 0xA964,
03434     0xCBE4, 0xC2EB, 0xCBE5, 0xA965, 0xCBE6, 0xA966, 0xCBE7, 0xC2EC,
03435     0xCBE8, 0xA967, 0xCBE9, 0xC2ED, 0xCBEA, 0xA968, 0xCBEB, 0xA969,
03436     0xCBEC, 0xA96A, 0xCBED, 0xA96B, 0xCBEE, 0xA96C, 0xCBEF, 0xA96D,
03437     0xCBF0, 0xA96E, 0xCBF1, 0xA96F, 0xCBF2, 0xA970, 0xCBF3, 0xA971,
03438     0xCBF4, 0xA972, 0xCBF5, 0xA973, 0xCBF6, 0xA974, 0xCBF7, 0xA975,
03439     0xCBF8, 0xA976, 0xCBF9, 0xA977, 0xCBFA, 0xA978, 0xCBFB, 0xA979,
03440     0xCBFC, 0xA97A, 0xCBFD, 0xA981, 0xCBFE, 0xA982, 0xCBFF, 0xA983,
03441     0xCC00, 0xA984, 0xCC01, 0xA985, 0xCC02, 0xA986, 0xCC03, 0xA987,
03442     0xCC04, 0xA988, 0xCC05, 0xA989, 0xCC06, 0xA98A, 0xCC07, 0xA98B,
03443     0xCC08, 0xA98C, 0xCC09, 0xA98D, 0xCC0A, 0xA98E, 0xCC0B, 0xA98F,
03444     0xCC0C, 0xC2EE, 0xCC0D, 0xC2EF, 0xCC0E, 0xA990, 0xCC0F, 0xA991,
03445     0xCC10, 0xC2F0, 0xCC11, 0xA992, 0xCC12, 0xA993, 0xCC13, 0xA994,
03446     0xCC14, 0xC2F1, 0xCC15, 0xA995, 0xCC16, 0xA996, 0xCC17, 0xA997,
03447     0xCC18, 0xA998, 0xCC19, 0xA999, 0xCC1A, 0xA99A, 0xCC1B, 0xA99B,
03448     0xCC1C, 0xC2F2, 0xCC1D, 0xC2F3, 0xCC1E, 0xA99C, 0xCC1F, 0xA99D,
03449     0xCC20, 0xA99E, 0xCC21, 0xC2F4, 0xCC22, 0xC2F5, 0xCC23, 0xA99F,
03450     0xCC24, 0xA9A0, 0xCC25, 0xAA41, 0xCC26, 0xAA42, 0xCC27, 0xC2F6,
03451     0xCC28, 0xC2F7, 0xCC29, 0xC2F8, 0xCC2A, 0xAA43, 0xCC2B, 0xAA44,
03452     0xCC2C, 0xC2F9, 0xCC2D, 0xAA45, 0xCC2E, 0xC2FA, 0xCC2F, 0xAA46,
03453     0xCC30, 0xC2FB, 0xCC31, 0xAA47, 0xCC32, 0xAA48, 0xCC33, 0xAA49,
03454     0xCC34, 0xAA4A, 0xCC35, 0xAA4B, 0xCC36, 0xAA4C, 0xCC37, 0xAA4D,
03455     0xCC38, 0xC2FC, 0xCC39, 0xC2FD, 0xCC3A, 0xAA4E, 0xCC3B, 0xC2FE,
03456     0xCC3C, 0xC3A1, 0xCC3D, 0xC3A2, 0xCC3E, 0xC3A3, 0xCC3F, 0xAA4F,
03457     0xCC40, 0xAA50, 0xCC41, 0xAA51, 0xCC42, 0xAA52, 0xCC43, 0xAA53,
03458     0xCC44, 0xC3A4, 0xCC45, 0xC3A5, 0xCC46, 0xAA54, 0xCC47, 0xAA55,
03459     0xCC48, 0xC3A6, 0xCC49, 0xAA56, 0xCC4A, 0xAA57, 0xCC4B, 0xAA58,
03460     0xCC4C, 0xC3A7, 0xCC4D, 0xAA59, 0xCC4E, 0xAA5A, 0xCC4F, 0xAA61,
03461     0xCC50, 0xAA62, 0xCC51, 0xAA63, 0xCC52, 0xAA64, 0xCC53, 0xAA65,
03462     0xCC54, 0xC3A8, 0xCC55, 0xC3A9, 0xCC56, 0xAA66, 0xCC57, 0xC3AA,
03463     0xCC58, 0xC3AB, 0xCC59, 0xC3AC, 0xCC5A, 0xAA67, 0xCC5B, 0xAA68,
03464     0xCC5C, 0xAA69, 0xCC5D, 0xAA6A, 0xCC5E, 0xAA6B, 0xCC5F, 0xAA6C,
03465     0xCC60, 0xC3AD, 0xCC61, 0xAA6D, 0xCC62, 0xAA6E, 0xCC63, 0xAA6F,
03466     0xCC64, 0xC3AE, 0xCC65, 0xAA70, 0xCC66, 0xC3AF, 0xCC67, 0xAA71,
03467     0xCC68, 0xC3B0, 0xCC69, 0xAA72, 0xCC6A, 0xAA73, 0xCC6B, 0xAA74,
03468     0xCC6C, 0xAA75, 0xCC6D, 0xAA76, 0xCC6E, 0xAA77, 0xCC6F, 0xAA78,
03469     0xCC70, 0xC3B1, 0xCC71, 0xAA79, 0xCC72, 0xAA7A, 0xCC73, 0xAA81,
03470     0xCC74, 0xAA82, 0xCC75, 0xC3B2, 0xCC76, 0xAA83, 0xCC77, 0xAA84,
03471     0xCC78, 0xAA85, 0xCC79, 0xAA86, 0xCC7A, 0xAA87, 0xCC7B, 0xAA88,
03472     0xCC7C, 0xAA89, 0xCC7D, 0xAA8A, 0xCC7E, 0xAA8B, 0xCC7F, 0xAA8C,
03473     0xCC80, 0xAA8D, 0xCC81, 0xAA8E, 0xCC82, 0xAA8F, 0xCC83, 0xAA90,
03474     0xCC84, 0xAA91, 0xCC85, 0xAA92, 0xCC86, 0xAA93, 0xCC87, 0xAA94,
03475     0xCC88, 0xAA95, 0xCC89, 0xAA96, 0xCC8A, 0xAA97, 0xCC8B, 0xAA98,
03476     0xCC8C, 0xAA99, 0xCC8D, 0xAA9A, 0xCC8E, 0xAA9B, 0xCC8F, 0xAA9C,
03477     0xCC90, 0xAA9D, 0xCC91, 0xAA9E, 0xCC92, 0xAA9F, 0xCC93, 0xAAA0,
03478     0xCC94, 0xAB41, 0xCC95, 0xAB42, 0xCC96, 0xAB43, 0xCC97, 0xAB44,
03479     0xCC98, 0xC3B3, 0xCC99, 0xC3B4, 0xCC9A, 0xAB45, 0xCC9B, 0xAB46,
03480     0xCC9C, 0xC3B5, 0xCC9D, 0xAB47, 0xCC9E, 0xAB48, 0xCC9F, 0xAB49,
03481     0xCCA0, 0xC3B6, 0xCCA1, 0xAB4A, 0xCCA2, 0xAB4B, 0xCCA3, 0xAB4C,
03482     0xCCA4, 0xAB4D, 0xCCA5, 0xAB4E, 0xCCA6, 0xAB4F, 0xCCA7, 0xAB50,
03483     0xCCA8, 0xC3B7, 0xCCA9, 0xC3B8, 0xCCAA, 0xAB51, 0xCCAB, 0xC3B9,
03484     0xCCAC, 0xC3BA, 0xCCAD, 0xC3BB, 0xCCAE, 0xAB52, 0xCCAF, 0xAB53,
03485     0xCCB0, 0xAB54, 0xCCB1, 0xAB55, 0xCCB2, 0xAB56, 0xCCB3, 0xAB57,
03486     0xCCB4, 0xC3BC, 0xCCB5, 0xC3BD, 0xCCB6, 0xAB58, 0xCCB7, 0xAB59,
03487     0xCCB8, 0xC3BE, 0xCCB9, 0xAB5A, 0xCCBA, 0xAB61, 0xCCBB, 0xAB62,
03488     0xCCBC, 0xC3BF, 0xCCBD, 0xAB63, 0xCCBE, 0xAB64, 0xCCBF, 0xAB65,
03489     0xCCC0, 0xAB66, 0xCCC1, 0xAB67, 0xCCC2, 0xAB68, 0xCCC3, 0xAB69,
03490     0xCCC4, 0xC3C0, 0xCCC5, 0xC3C1, 0xCCC6, 0xAB6A, 0xCCC7, 0xC3C2,
03491     0xCCC8, 0xAB6B, 0xCCC9, 0xC3C3, 0xCCCA, 0xAB6C, 0xCCCB, 0xAB6D,
03492     0xCCCC, 0xAB6E, 0xCCCD, 0xAB6F, 0xCCCE, 0xAB70, 0xCCCF, 0xAB71,
03493     0xCCD0, 0xC3C4, 0xCCD1, 0xAB72, 0xCCD2, 0xAB73, 0xCCD3, 0xAB74,
03494     0xCCD4, 0xC3C5, 0xCCD5, 0xAB75, 0xCCD6, 0xAB76, 0xCCD7, 0xAB77,
03495     0xCCD8, 0xAB78, 0xCCD9, 0xAB79, 0xCCDA, 0xAB7A, 0xCCDB, 0xAB81,
03496     0xCCDC, 0xAB82, 0xCCDD, 0xAB83, 0xCCDE, 0xAB84, 0xCCDF, 0xAB85,
03497     0xCCE0, 0xAB86, 0xCCE1, 0xAB87, 0xCCE2, 0xAB88, 0xCCE3, 0xAB89,
03498     0xCCE4, 0xC3C6, 0xCCE5, 0xAB8A, 0xCCE6, 0xAB8B, 0xCCE7, 0xAB8C,
03499     0xCCE8, 0xAB8D, 0xCCE9, 0xAB8E, 0xCCEA, 0xAB8F, 0xCCEB, 0xAB90,
03500     0xCCEC, 0xC3C7, 0xCCED, 0xAB91, 0xCCEE, 0xAB92, 0xCCEF, 0xAB93,
03501     0xCCF0, 0xC3C8, 0xCCF1, 0xAB94, 0xCCF2, 0xAB95, 0xCCF3, 0xAB96,
03502     0xCCF4, 0xAB97, 0xCCF5, 0xAB98, 0xCCF6, 0xAB99, 0xCCF7, 0xAB9A,
03503     0xCCF8, 0xAB9B, 0xCCF9, 0xAB9C, 0xCCFA, 0xAB9D, 0xCCFB, 0xAB9E,
03504     0xCCFC, 0xAB9F, 0xCCFD, 0xABA0, 0xCCFE, 0xAC41, 0xCCFF, 0xAC42,
03505     0xCD00, 0xAC43, 0xCD01, 0xC3C9, 0xCD02, 0xAC44, 0xCD03, 0xAC45,
03506     0xCD04, 0xAC46, 0xCD05, 0xAC47, 0xCD06, 0xAC48, 0xCD07, 0xAC49,
03507     0xCD08, 0xC3CA, 0xCD09, 0xC3CB, 0xCD0A, 0xAC4A, 0xCD0B, 0xAC4B,
03508     0xCD0C, 0xC3CC, 0xCD0D, 0xAC4C, 0xCD0E, 0xAC4D, 0xCD0F, 0xAC4E,
03509     0xCD10, 0xC3CD, 0xCD11, 0xAC4F, 0xCD12, 0xAC50, 0xCD13, 0xAC51,
03510     0xCD14, 0xAC52, 0xCD15, 0xAC53, 0xCD16, 0xAC54, 0xCD17, 0xAC55,
03511     0xCD18, 0xC3CE, 0xCD19, 0xC3CF, 0xCD1A, 0xAC56, 0xCD1B, 0xC3D0,
03512     0xCD1C, 0xAC57, 0xCD1D, 0xC3D1, 0xCD1E, 0xAC58, 0xCD1F, 0xAC59,
03513     0xCD20, 0xAC5A, 0xCD21, 0xAC61, 0xCD22, 0xAC62, 0xCD23, 0xAC63,
03514     0xCD24, 0xC3D2, 0xCD25, 0xAC64, 0xCD26, 0xAC65, 0xCD27, 0xAC66,
03515     0xCD28, 0xC3D3, 0xCD29, 0xAC67, 0xCD2A, 0xAC68, 0xCD2B, 0xAC69,
03516     0xCD2C, 0xC3D4, 0xCD2D, 0xAC6A, 0xCD2E, 0xAC6B, 0xCD2F, 0xAC6C,
03517     0xCD30, 0xAC6D, 0xCD31, 0xAC6E, 0xCD32, 0xAC6F, 0xCD33, 0xAC70,
03518     0xCD34, 0xAC71, 0xCD35, 0xAC72, 0xCD36, 0xAC73, 0xCD37, 0xAC74,
03519     0xCD38, 0xAC75, 0xCD39, 0xC3D5, 0xCD3A, 0xAC76, 0xCD3B, 0xAC77,
03520     0xCD3C, 0xAC78, 0xCD3D, 0xAC79, 0xCD3E, 0xAC7A, 0xCD3F, 0xAC81,
03521     0xCD40, 0xAC82, 0xCD41, 0xAC83, 0xCD42, 0xAC84, 0xCD43, 0xAC85,
03522     0xCD44, 0xAC86, 0xCD45, 0xAC87, 0xCD46, 0xAC88, 0xCD47, 0xAC89,
03523     0xCD48, 0xAC8A, 0xCD49, 0xAC8B, 0xCD4A, 0xAC8C, 0xCD4B, 0xAC8D,
03524     0xCD4C, 0xAC8E, 0xCD4D, 0xAC8F, 0xCD4E, 0xAC90, 0xCD4F, 0xAC91,
03525     0xCD50, 0xAC92, 0xCD51, 0xAC93, 0xCD52, 0xAC94, 0xCD53, 0xAC95,
03526     0xCD54, 0xAC96, 0xCD55, 0xAC97, 0xCD56, 0xAC98, 0xCD57, 0xAC99,
03527     0xCD58, 0xAC9A, 0xCD59, 0xAC9B, 0xCD5A, 0xAC9C, 0xCD5B, 0xAC9D,
03528     0xCD5C, 0xC3D6, 0xCD5D, 0xAC9E, 0xCD5E, 0xAC9F, 0xCD5F, 0xACA0,
03529     0xCD60, 0xC3D7, 0xCD61, 0xAD41, 0xCD62, 0xAD42, 0xCD63, 0xAD43,
03530     0xCD64, 0xC3D8, 0xCD65, 0xAD44, 0xCD66, 0xAD45, 0xCD67, 0xAD46,
03531     0xCD68, 0xAD47, 0xCD69, 0xAD48, 0xCD6A, 0xAD49, 0xCD6B, 0xAD4A,
03532     0xCD6C, 0xC3D9, 0xCD6D, 0xC3DA, 0xCD6E, 0xAD4B, 0xCD6F, 0xC3DB,
03533     0xCD70, 0xAD4C, 0xCD71, 0xC3DC, 0xCD72, 0xAD4D, 0xCD73, 0xAD4E,
03534     0xCD74, 0xAD4F, 0xCD75, 0xAD50, 0xCD76, 0xAD51, 0xCD77, 0xAD52,
03535     0xCD78, 0xC3DD, 0xCD79, 0xAD53, 0xCD7A, 0xAD54, 0xCD7B, 0xAD55,
03536     0xCD7C, 0xAD56, 0xCD7D, 0xAD57, 0xCD7E, 0xAD58, 0xCD7F, 0xAD59,
03537     0xCD80, 0xAD5A, 0xCD81, 0xAD61, 0xCD82, 0xAD62, 0xCD83, 0xAD63,
03538     0xCD84, 0xAD64, 0xCD85, 0xAD65, 0xCD86, 0xAD66, 0xCD87, 0xAD67,
03539     0xCD88, 0xC3DE, 0xCD89, 0xAD68, 0xCD8A, 0xAD69, 0xCD8B, 0xAD6A,
03540     0xCD8C, 0xAD6B, 0xCD8D, 0xAD6C, 0xCD8E, 0xAD6D, 0xCD8F, 0xAD6E,
03541     0xCD90, 0xAD6F, 0xCD91, 0xAD70, 0xCD92, 0xAD71, 0xCD93, 0xAD72,
03542     0xCD94, 0xC3DF, 0xCD95, 0xC3E0, 0xCD96, 0xAD73, 0xCD97, 0xAD74,
03543     0xCD98, 0xC3E1, 0xCD99, 0xAD75, 0xCD9A, 0xAD76, 0xCD9B, 0xAD77,
03544     0xCD9C, 0xC3E2, 0xCD9D, 0xAD78, 0xCD9E, 0xAD79, 0xCD9F, 0xAD7A,
03545     0xCDA0, 0xAD81, 0xCDA1, 0xAD82, 0xCDA2, 0xAD83, 0xCDA3, 0xAD84,
03546     0xCDA4, 0xC3E3, 0xCDA5, 0xC3E4, 0xCDA6, 0xAD85, 0xCDA7, 0xC3E5,
03547     0xCDA8, 0xAD86, 0xCDA9, 0xC3E6, 0xCDAA, 0xAD87, 0xCDAB, 0xAD88,
03548     0xCDAC, 0xAD89, 0xCDAD, 0xAD8A, 0xCDAE, 0xAD8B, 0xCDAF, 0xAD8C,
03549     0xCDB0, 0xC3E7, 0xCDB1, 0xAD8D, 0xCDB2, 0xAD8E, 0xCDB3, 0xAD8F,
03550     0xCDB4, 0xAD90, 0xCDB5, 0xAD91, 0xCDB6, 0xAD92, 0xCDB7, 0xAD93,
03551     0xCDB8, 0xAD94, 0xCDB9, 0xAD95, 0xCDBA, 0xAD96, 0xCDBB, 0xAD97,
03552     0xCDBC, 0xAD98, 0xCDBD, 0xAD99, 0xCDBE, 0xAD9A, 0xCDBF, 0xAD9B,
03553     0xCDC0, 0xAD9C, 0xCDC1, 0xAD9D, 0xCDC2, 0xAD9E, 0xCDC3, 0xAD9F,
03554     0xCDC4, 0xC3E8, 0xCDC5, 0xADA0, 0xCDC6, 0xAE41, 0xCDC7, 0xAE42,
03555     0xCDC8, 0xAE43, 0xCDC9, 0xAE44, 0xCDCA, 0xAE45, 0xCDCB, 0xAE46,
03556     0xCDCC, 0xC3E9, 0xCDCD, 0xAE47, 0xCDCE, 0xAE48, 0xCDCF, 0xAE49,
03557     0xCDD0, 0xC3EA, 0xCDD1, 0xAE4A, 0xCDD2, 0xAE4B, 0xCDD3, 0xAE4C,
03558     0xCDD4, 0xAE4D, 0xCDD5, 0xAE4E, 0xCDD6, 0xAE4F, 0xCDD7, 0xAE50,
03559     0xCDD8, 0xAE51, 0xCDD9, 0xAE52, 0xCDDA, 0xAE53, 0xCDDB, 0xAE54,
03560     0xCDDC, 0xAE55, 0xCDDD, 0xAE56, 0xCDDE, 0xAE57, 0xCDDF, 0xAE58,
03561     0xCDE0, 0xAE59, 0xCDE1, 0xAE5A, 0xCDE2, 0xAE61, 0xCDE3, 0xAE62,
03562     0xCDE4, 0xAE63, 0xCDE5, 0xAE64, 0xCDE6, 0xAE65, 0xCDE7, 0xAE66,
03563     0xCDE8, 0xC3EB, 0xCDE9, 0xAE67, 0xCDEA, 0xAE68, 0xCDEB, 0xAE69,
03564     0xCDEC, 0xC3EC, 0xCDED, 0xAE6A, 0xCDEE, 0xAE6B, 0xCDEF, 0xAE6C,
03565     0xCDF0, 0xC3ED, 0xCDF1, 0xAE6D, 0xCDF2, 0xAE6E, 0xCDF3, 0xAE6F,
03566     0xCDF4, 0xAE70, 0xCDF5, 0xAE71, 0xCDF6, 0xAE72, 0xCDF7, 0xAE73,
03567     0xCDF8, 0xC3EE, 0xCDF9, 0xC3EF, 0xCDFA, 0xAE74, 0xCDFB, 0xC3F0,
03568     0xCDFC, 0xAE75, 0xCDFD, 0xC3F1, 0xCDFE, 0xAE76, 0xCDFF, 0xAE77,
03569     0xCE00, 0xAE78, 0xCE01, 0xAE79, 0xCE02, 0xAE7A, 0xCE03, 0xAE81,
03570     0xCE04, 0xC3F2, 0xCE05, 0xAE82, 0xCE06, 0xAE83, 0xCE07, 0xAE84,
03571     0xCE08, 0xC3F3, 0xCE09, 0xAE85, 0xCE0A, 0xAE86, 0xCE0B, 0xAE87,
03572     0xCE0C, 0xC3F4, 0xCE0D, 0xAE88, 0xCE0E, 0xAE89, 0xCE0F, 0xAE8A,
03573     0xCE10, 0xAE8B, 0xCE11, 0xAE8C, 0xCE12, 0xAE8D, 0xCE13, 0xAE8E,
03574     0xCE14, 0xC3F5, 0xCE15, 0xAE8F, 0xCE16, 0xAE90, 0xCE17, 0xAE91,
03575     0xCE18, 0xAE92, 0xCE19, 0xC3F6, 0xCE1A, 0xAE93, 0xCE1B, 0xAE94,
03576     0xCE1C, 0xAE95, 0xCE1D, 0xAE96, 0xCE1E, 0xAE97, 0xCE1F, 0xAE98,
03577     0xCE20, 0xC3F7, 0xCE21, 0xC3F8, 0xCE22, 0xAE99, 0xCE23, 0xAE9A,
03578     0xCE24, 0xC3F9, 0xCE25, 0xAE9B, 0xCE26, 0xAE9C, 0xCE27, 0xAE9D,
03579     0xCE28, 0xC3FA, 0xCE29, 0xAE9E, 0xCE2A, 0xAE9F, 0xCE2B, 0xAEA0,
03580     0xCE2C, 0xAF41, 0xCE2D, 0xAF42, 0xCE2E, 0xAF43, 0xCE2F, 0xAF44,
03581     0xCE30, 0xC3FB, 0xCE31, 0xC3FC, 0xCE32, 0xAF45, 0xCE33, 0xC3FD,
03582     0xCE34, 0xAF46, 0xCE35, 0xC3FE, 0xCE36, 0xAF47, 0xCE37, 0xAF48,
03583     0xCE38, 0xAF49, 0xCE39, 0xAF4A, 0xCE3A, 0xAF4B, 0xCE3B, 0xAF4C,
03584     0xCE3C, 0xAF4D, 0xCE3D, 0xAF4E, 0xCE3E, 0xAF4F, 0xCE3F, 0xAF50,
03585     0xCE40, 0xAF51, 0xCE41, 0xAF52, 0xCE42, 0xAF53, 0xCE43, 0xAF54,
03586     0xCE44, 0xAF55, 0xCE45, 0xAF56, 0xCE46, 0xAF57, 0xCE47, 0xAF58,
03587     0xCE48, 0xAF59, 0xCE49, 0xAF5A, 0xCE4A, 0xAF61, 0xCE4B, 0xAF62,
03588     0xCE4C, 0xAF63, 0xCE4D, 0xAF64, 0xCE4E, 0xAF65, 0xCE4F, 0xAF66,
03589     0xCE50, 0xAF67, 0xCE51, 0xAF68, 0xCE52, 0xAF69, 0xCE53, 0xAF6A,
03590     0xCE54, 0xAF6B, 0xCE55, 0xAF6C, 0xCE56, 0xAF6D, 0xCE57, 0xAF6E,
03591     0xCE58, 0xC4A1, 0xCE59, 0xC4A2, 0xCE5A, 0xAF6F, 0xCE5B, 0xAF70,
03592     0xCE5C, 0xC4A3, 0xCE5D, 0xAF71, 0xCE5E, 0xAF72, 0xCE5F, 0xC4A4,
03593     0xCE60, 0xC4A5, 0xCE61, 0xC4A6, 0xCE62, 0xAF73, 0xCE63, 0xAF74,
03594     0xCE64, 0xAF75, 0xCE65, 0xAF76, 0xCE66, 0xAF77, 0xCE67, 0xAF78,
03595     0xCE68, 0xC4A7, 0xCE69, 0xC4A8, 0xCE6A, 0xAF79, 0xCE6B, 0xC4A9,
03596     0xCE6C, 0xAF7A, 0xCE6D, 0xC4AA, 0xCE6E, 0xAF81, 0xCE6F, 0xAF82,
03597     0xCE70, 0xAF83, 0xCE71, 0xAF84, 0xCE72, 0xAF85, 0xCE73, 0xAF86,
03598     0xCE74, 0xC4AB, 0xCE75, 0xC4AC, 0xCE76, 0xAF87, 0xCE77, 0xAF88,
03599     0xCE78, 0xC4AD, 0xCE79, 0xAF89, 0xCE7A, 0xAF8A, 0xCE7B, 0xAF8B,
03600     0xCE7C, 0xC4AE, 0xCE7D, 0xAF8C, 0xCE7E, 0xAF8D, 0xCE7F, 0xAF8E,
03601     0xCE80, 0xAF8F, 0xCE81, 0xAF90, 0xCE82, 0xAF91, 0xCE83, 0xAF92,
03602     0xCE84, 0xC4AF, 0xCE85, 0xC4B0, 0xCE86, 0xAF93, 0xCE87, 0xC4B1,
03603     0xCE88, 0xAF94, 0xCE89, 0xC4B2, 0xCE8A, 0xAF95, 0xCE8B, 0xAF96,
03604     0xCE8C, 0xAF97, 0xCE8D, 0xAF98, 0xCE8E, 0xAF99, 0xCE8F, 0xAF9A,
03605     0xCE90, 0xC4B3, 0xCE91, 0xC4B4, 0xCE92, 0xAF9B, 0xCE93, 0xAF9C,
03606     0xCE94, 0xC4B5, 0xCE95, 0xAF9D, 0xCE96, 0xAF9E, 0xCE97, 0xAF9F,
03607     0xCE98, 0xC4B6, 0xCE99, 0xAFA0, 0xCE9A, 0xB041, 0xCE9B, 0xB042,
03608     0xCE9C, 0xB043, 0xCE9D, 0xB044, 0xCE9E, 0xB045, 0xCE9F, 0xB046,
03609     0xCEA0, 0xC4B7, 0xCEA1, 0xC4B8, 0xCEA2, 0xB047, 0xCEA3, 0xC4B9,
03610     0xCEA4, 0xC4BA, 0xCEA5, 0xC4BB, 0xCEA6, 0xB048, 0xCEA7, 0xB049,
03611     0xCEA8, 0xB04A, 0xCEA9, 0xB04B, 0xCEAA, 0xB04C, 0xCEAB, 0xB04D,
03612     0xCEAC, 0xC4BC, 0xCEAD, 0xC4BD, 0xCEAE, 0xB04E, 0xCEAF, 0xB04F,
03613     0xCEB0, 0xB050, 0xCEB1, 0xB051, 0xCEB2, 0xB052, 0xCEB3, 0xB053,
03614     0xCEB4, 0xB054, 0xCEB5, 0xB055, 0xCEB6, 0xB056, 0xCEB7, 0xB057,
03615     0xCEB8, 0xB058, 0xCEB9, 0xB059, 0xCEBA, 0xB05A, 0xCEBB, 0xB061,
03616     0xCEBC, 0xB062, 0xCEBD, 0xB063, 0xCEBE, 0xB064, 0xCEBF, 0xB065,
03617     0xCEC0, 0xB066, 0xCEC1, 0xC4BE, 0xCEC2, 0xB067, 0xCEC3, 0xB068,
03618     0xCEC4, 0xB069, 0xCEC5, 0xB06A, 0xCEC6, 0xB06B, 0xCEC7, 0xB06C,
03619     0xCEC8, 0xB06D, 0xCEC9, 0xB06E, 0xCECA, 0xB06F, 0xCECB, 0xB070,
03620     0xCECC, 0xB071, 0xCECD, 0xB072, 0xCECE, 0xB073, 0xCECF, 0xB074,
03621     0xCED0, 0xB075, 0xCED1, 0xB076, 0xCED2, 0xB077, 0xCED3, 0xB078,
03622     0xCED4, 0xB079, 0xCED5, 0xB07A, 0xCED6, 0xB081, 0xCED7, 0xB082,
03623     0xCED8, 0xB083, 0xCED9, 0xB084, 0xCEDA, 0xB085, 0xCEDB, 0xB086,
03624     0xCEDC, 0xB087, 0xCEDD, 0xB088, 0xCEDE, 0xB089, 0xCEDF, 0xB08A,
03625     0xCEE0, 0xB08B, 0xCEE1, 0xB08C, 0xCEE2, 0xB08D, 0xCEE3, 0xB08E,
03626     0xCEE4, 0xC4BF, 0xCEE5, 0xC4C0, 0xCEE6, 0xB08F, 0xCEE7, 0xB090,
03627     0xCEE8, 0xC4C1, 0xCEE9, 0xB091, 0xCEEA, 0xB092, 0xCEEB, 0xC4C2,
03628     0xCEEC, 0xC4C3, 0xCEED, 0xB093, 0xCEEE, 0xB094, 0xCEEF, 0xB095,
03629     0xCEF0, 0xB096, 0xCEF1, 0xB097, 0xCEF2, 0xB098, 0xCEF3, 0xB099,
03630     0xCEF4, 0xC4C4, 0xCEF5, 0xC4C5, 0xCEF6, 0xB09A, 0xCEF7, 0xC4C6,
03631     0xCEF8, 0xC4C7, 0xCEF9, 0xC4C8, 0xCEFA, 0xB09B, 0xCEFB, 0xB09C,
03632     0xCEFC, 0xB09D, 0xCEFD, 0xB09E, 0xCEFE, 0xB09F, 0xCEFF, 0xB0A0,
03633     0xCF00, 0xC4C9, 0xCF01, 0xC4CA, 0xCF02, 0xB141, 0xCF03, 0xB142,
03634     0xCF04, 0xC4CB, 0xCF05, 0xB143, 0xCF06, 0xB144, 0xCF07, 0xB145,
03635     0xCF08, 0xC4CC, 0xCF09, 0xB146, 0xCF0A, 0xB147, 0xCF0B, 0xB148,
03636     0xCF0C, 0xB149, 0xCF0D, 0xB14A, 0xCF0E, 0xB14B, 0xCF0F, 0xB14C,
03637     0xCF10, 0xC4CD, 0xCF11, 0xC4CE, 0xCF12, 0xB14D, 0xCF13, 0xC4CF,
03638     0xCF14, 0xB14E, 0xCF15, 0xC4D0, 0xCF16, 0xB14F, 0xCF17, 0xB150,
03639     0xCF18, 0xB151, 0xCF19, 0xB152, 0xCF1A, 0xB153, 0xCF1B, 0xB154,
03640     0xCF1C, 0xC4D1, 0xCF1D, 0xB155, 0xCF1E, 0xB156, 0xCF1F, 0xB157,
03641     0xCF20, 0xC4D2, 0xCF21, 0xB158, 0xCF22, 0xB159, 0xCF23, 0xB15A,
03642     0xCF24, 0xC4D3, 0xCF25, 0xB161, 0xCF26, 0xB162, 0xCF27, 0xB163,
03643     0xCF28, 0xB164, 0xCF29, 0xB165, 0xCF2A, 0xB166, 0xCF2B, 0xB167,
03644     0xCF2C, 0xC4D4, 0xCF2D, 0xC4D5, 0xCF2E, 0xB168, 0xCF2F, 0xC4D6,
03645     0xCF30, 0xC4D7, 0xCF31, 0xC4D8, 0xCF32, 0xB169, 0xCF33, 0xB16A,
03646     0xCF34, 0xB16B, 0xCF35, 0xB16C, 0xCF36, 0xB16D, 0xCF37, 0xB16E,
03647     0xCF38, 0xC4D9, 0xCF39, 0xB16F, 0xCF3A, 0xB170, 0xCF3B, 0xB171,
03648     0xCF3C, 0xB172, 0xCF3D, 0xB173, 0xCF3E, 0xB174, 0xCF3F, 0xB175,
03649     0xCF40, 0xB176, 0xCF41, 0xB177, 0xCF42, 0xB178, 0xCF43, 0xB179,
03650     0xCF44, 0xB17A, 0xCF45, 0xB181, 0xCF46, 0xB182, 0xCF47, 0xB183,
03651     0xCF48, 0xB184, 0xCF49, 0xB185, 0xCF4A, 0xB186, 0xCF4B, 0xB187,
03652     0xCF4C, 0xB188, 0xCF4D, 0xB189, 0xCF4E, 0xB18A, 0xCF4F, 0xB18B,
03653     0xCF50, 0xB18C, 0xCF51, 0xB18D, 0xCF52, 0xB18E, 0xCF53, 0xB18F,
03654     0xCF54, 0xC4DA, 0xCF55, 0xC4DB, 0xCF56, 0xB190, 0xCF57, 0xB191,
03655     0xCF58, 0xC4DC, 0xCF59, 0xB192, 0xCF5A, 0xB193, 0xCF5B, 0xB194,
03656     0xCF5C, 0xC4DD, 0xCF5D, 0xB195, 0xCF5E, 0xB196, 0xCF5F, 0xB197,
03657     0xCF60, 0xB198, 0xCF61, 0xB199, 0xCF62, 0xB19A, 0xCF63, 0xB19B,
03658     0xCF64, 0xC4DE, 0xCF65, 0xC4DF, 0xCF66, 0xB19C, 0xCF67, 0xC4E0,
03659     0xCF68, 0xB19D, 0xCF69, 0xC4E1, 0xCF6A, 0xB19E, 0xCF6B, 0xB19F,
03660     0xCF6C, 0xB1A0, 0xCF6D, 0xB241, 0xCF6E, 0xB242, 0xCF6F, 0xB243,
03661     0xCF70, 0xC4E2, 0xCF71, 0xC4E3, 0xCF72, 0xB244, 0xCF73, 0xB245,
03662     0xCF74, 0xC4E4, 0xCF75, 0xB246, 0xCF76, 0xB247, 0xCF77, 0xB248,
03663     0xCF78, 0xC4E5, 0xCF79, 0xB249, 0xCF7A, 0xB24A, 0xCF7B, 0xB24B,
03664     0xCF7C, 0xB24C, 0xCF7D, 0xB24D, 0xCF7E, 0xB24E, 0xCF7F, 0xB24F,
03665     0xCF80, 0xC4E6, 0xCF81, 0xB250, 0xCF82, 0xB251, 0xCF83, 0xB252,
03666     0xCF84, 0xB253, 0xCF85, 0xC4E7, 0xCF86, 0xB254, 0xCF87, 0xB255,
03667     0xCF88, 0xB256, 0xCF89, 0xB257, 0xCF8A, 0xB258, 0xCF8B, 0xB259,
03668     0xCF8C, 0xC4E8, 0xCF8D, 0xB25A, 0xCF8E, 0xB261, 0xCF8F, 0xB262,
03669     0xCF90, 0xB263, 0xCF91, 0xB264, 0xCF92, 0xB265, 0xCF93, 0xB266,
03670     0xCF94, 0xB267, 0xCF95, 0xB268, 0xCF96, 0xB269, 0xCF97, 0xB26A,
03671     0xCF98, 0xB26B, 0xCF99, 0xB26C, 0xCF9A, 0xB26D, 0xCF9B, 0xB26E,
03672     0xCF9C, 0xB26F, 0xCF9D, 0xB270, 0xCF9E, 0xB271, 0xCF9F, 0xB272,
03673     0xCFA0, 0xB273, 0xCFA1, 0xC4E9, 0xCFA2, 0xB274, 0xCFA3, 0xB275,
03674     0xCFA4, 0xB276, 0xCFA5, 0xB277, 0xCFA6, 0xB278, 0xCFA7, 0xB279,
03675     0xCFA8, 0xC4EA, 0xCFA9, 0xB27A, 0xCFAA, 0xB281, 0xCFAB, 0xB282,
03676     0xCFAC, 0xB283, 0xCFAD, 0xB284, 0xCFAE, 0xB285, 0xCFAF, 0xB286,
03677     0xCFB0, 0xC4EB, 0xCFB1, 0xB287, 0xCFB2, 0xB288, 0xCFB3, 0xB289,
03678     0xCFB4, 0xB28A, 0xCFB5, 0xB28B, 0xCFB6, 0xB28C, 0xCFB7, 0xB28D,
03679     0xCFB8, 0xB28E, 0xCFB9, 0xB28F, 0xCFBA, 0xB290, 0xCFBB, 0xB291,
03680     0xCFBC, 0xB292, 0xCFBD, 0xB293, 0xCFBE, 0xB294, 0xCFBF, 0xB295,
03681     0xCFC0, 0xB296, 0xCFC1, 0xB297, 0xCFC2, 0xB298, 0xCFC3, 0xB299,
03682     0xCFC4, 0xC4EC, 0xCFC5, 0xB29A, 0xCFC6, 0xB29B, 0xCFC7, 0xB29C,
03683     0xCFC8, 0xB29D, 0xCFC9, 0xB29E, 0xCFCA, 0xB29F, 0xCFCB, 0xB2A0,
03684     0xCFCC, 0xB341, 0xCFCD, 0xB342, 0xCFCE, 0xB343, 0xCFCF, 0xB344,
03685     0xCFD0, 0xB345, 0xCFD1, 0xB346, 0xCFD2, 0xB347, 0xCFD3, 0xB348,
03686     0xCFD4, 0xB349, 0xCFD5, 0xB34A, 0xCFD6, 0xB34B, 0xCFD7, 0xB34C,
03687     0xCFD8, 0xB34D, 0xCFD9, 0xB34E, 0xCFDA, 0xB34F, 0xCFDB, 0xB350,
03688     0xCFDC, 0xB351, 0xCFDD, 0xB352, 0xCFDE, 0xB353, 0xCFDF, 0xB354,
03689     0xCFE0, 0xC4ED, 0xCFE1, 0xC4EE, 0xCFE2, 0xB355, 0xCFE3, 0xB356,
03690     0xCFE4, 0xC4EF, 0xCFE5, 0xB357, 0xCFE6, 0xB358, 0xCFE7, 0xB359,
03691     0xCFE8, 0xC4F0, 0xCFE9, 0xB35A, 0xCFEA, 0xB361, 0xCFEB, 0xB362,
03692     0xCFEC, 0xB363, 0xCFED, 0xB364, 0xCFEE, 0xB365, 0xCFEF, 0xB366,
03693     0xCFF0, 0xC4F1, 0xCFF1, 0xC4F2, 0xCFF2, 0xB367, 0xCFF3, 0xC4F3,
03694     0xCFF4, 0xB368, 0xCFF5, 0xC4F4, 0xCFF6, 0xB369, 0xCFF7, 0xB36A,
03695     0xCFF8, 0xB36B, 0xCFF9, 0xB36C, 0xCFFA, 0xB36D, 0xCFFB, 0xB36E,
03696     0xCFFC, 0xC4F5, 0xCFFD, 0xB36F, 0xCFFE, 0xB370, 0xCFFF, 0xB371,
03697     0xD000, 0xC4F6, 0xD001, 0xB372, 0xD002, 0xB373, 0xD003, 0xB374,
03698     0xD004, 0xC4F7, 0xD005, 0xB375, 0xD006, 0xB376, 0xD007, 0xB377,
03699     0xD008, 0xB378, 0xD009, 0xB379, 0xD00A, 0xB37A, 0xD00B, 0xB381,
03700     0xD00C, 0xB382, 0xD00D, 0xB383, 0xD00E, 0xB384, 0xD00F, 0xB385,
03701     0xD010, 0xB386, 0xD011, 0xC4F8, 0xD012, 0xB387, 0xD013, 0xB388,
03702     0xD014, 0xB389, 0xD015, 0xB38A, 0xD016, 0xB38B, 0xD017, 0xB38C,
03703     0xD018, 0xC4F9, 0xD019, 0xB38D, 0xD01A, 0xB38E, 0xD01B, 0xB38F,
03704     0xD01C, 0xB390, 0xD01D, 0xB391, 0xD01E, 0xB392, 0xD01F, 0xB393,
03705     0xD020, 0xB394, 0xD021, 0xB395, 0xD022, 0xB396, 0xD023, 0xB397,
03706     0xD024, 0xB398, 0xD025, 0xB399, 0xD026, 0xB39A, 0xD027, 0xB39B,
03707     0xD028, 0xB39C, 0xD029, 0xB39D, 0xD02A, 0xB39E, 0xD02B, 0xB39F,
03708     0xD02C, 0xB3A0, 0xD02D, 0xC4FA, 0xD02E, 0xB441, 0xD02F, 0xB442,
03709     0xD030, 0xB443, 0xD031, 0xB444, 0xD032, 0xB445, 0xD033, 0xB446,
03710     0xD034, 0xC4FB, 0xD035, 0xC4FC, 0xD036, 0xB447, 0xD037, 0xB448,
03711     0xD038, 0xC4FD, 0xD039, 0xB449, 0xD03A, 0xB44A, 0xD03B, 0xB44B,
03712     0xD03C, 0xC4FE, 0xD03D, 0xB44C, 0xD03E, 0xB44D, 0xD03F, 0xB44E,
03713     0xD040, 0xB44F, 0xD041, 0xB450, 0xD042, 0xB451, 0xD043, 0xB452,
03714     0xD044, 0xC5A1, 0xD045, 0xC5A2, 0xD046, 0xB453, 0xD047, 0xC5A3,
03715     0xD048, 0xB454, 0xD049, 0xC5A4, 0xD04A, 0xB455, 0xD04B, 0xB456,
03716     0xD04C, 0xB457, 0xD04D, 0xB458, 0xD04E, 0xB459, 0xD04F, 0xB45A,
03717     0xD050, 0xC5A5, 0xD051, 0xB461, 0xD052, 0xB462, 0xD053, 0xB463,
03718     0xD054, 0xC5A6, 0xD055, 0xB464, 0xD056, 0xB465, 0xD057, 0xB466,
03719     0xD058, 0xC5A7, 0xD059, 0xB467, 0xD05A, 0xB468, 0xD05B, 0xB469,
03720     0xD05C, 0xB46A, 0xD05D, 0xB46B, 0xD05E, 0xB46C, 0xD05F, 0xB46D,
03721     0xD060, 0xC5A8, 0xD061, 0xB46E, 0xD062, 0xB46F, 0xD063, 0xB470,
03722     0xD064, 0xB471, 0xD065, 0xB472, 0xD066, 0xB473, 0xD067, 0xB474,
03723     0xD068, 0xB475, 0xD069, 0xB476, 0xD06A, 0xB477, 0xD06B, 0xB478,
03724     0xD06C, 0xC5A9, 0xD06D, 0xC5AA, 0xD06E, 0xB479, 0xD06F, 0xB47A,
03725     0xD070, 0xC5AB, 0xD071, 0xB481, 0xD072, 0xB482, 0xD073, 0xB483,
03726     0xD074, 0xC5AC, 0xD075, 0xB484, 0xD076, 0xB485, 0xD077, 0xB486,
03727     0xD078, 0xB487, 0xD079, 0xB488, 0xD07A, 0xB489, 0xD07B, 0xB48A,
03728     0xD07C, 0xC5AD, 0xD07D, 0xC5AE, 0xD07E, 0xB48B, 0xD07F, 0xB48C,
03729     0xD080, 0xB48D, 0xD081, 0xC5AF, 0xD082, 0xB48E, 0xD083, 0xB48F,
03730     0xD084, 0xB490, 0xD085, 0xB491, 0xD086, 0xB492, 0xD087, 0xB493,
03731     0xD088, 0xB494, 0xD089, 0xB495, 0xD08A, 0xB496, 0xD08B, 0xB497,
03732     0xD08C, 0xB498, 0xD08D, 0xB499, 0xD08E, 0xB49A, 0xD08F, 0xB49B,
03733     0xD090, 0xB49C, 0xD091, 0xB49D, 0xD092, 0xB49E, 0xD093, 0xB49F,
03734     0xD094, 0xB4A0, 0xD095, 0xB541, 0xD096, 0xB542, 0xD097, 0xB543,
03735     0xD098, 0xB544, 0xD099, 0xB545, 0xD09A, 0xB546, 0xD09B, 0xB547,
03736     0xD09C, 0xB548, 0xD09D, 0xB549, 0xD09E, 0xB54A, 0xD09F, 0xB54B,
03737     0xD0A0, 0xB54C, 0xD0A1, 0xB54D, 0xD0A2, 0xB54E, 0xD0A3, 0xB54F,
03738     0xD0A4, 0xC5B0, 0xD0A5, 0xC5B1, 0xD0A6, 0xB550, 0xD0A7, 0xB551,
03739     0xD0A8, 0xC5B2, 0xD0A9, 0xB552, 0xD0AA, 0xB553, 0xD0AB, 0xB554,
03740     0xD0AC, 0xC5B3, 0xD0AD, 0xB555, 0xD0AE, 0xB556, 0xD0AF, 0xB557,
03741     0xD0B0, 0xB558, 0xD0B1, 0xB559, 0xD0B2, 0xB55A, 0xD0B3, 0xB561,
03742     0xD0B4, 0xC5B4, 0xD0B5, 0xC5B5, 0xD0B6, 0xB562, 0xD0B7, 0xC5B6,
03743     0xD0B8, 0xB563, 0xD0B9, 0xC5B7, 0xD0BA, 0xB564, 0xD0BB, 0xB565,
03744     0xD0BC, 0xB566, 0xD0BD, 0xB567, 0xD0BE, 0xB568, 0xD0BF, 0xB569,
03745     0xD0C0, 0xC5B8, 0xD0C1, 0xC5B9, 0xD0C2, 0xB56A, 0xD0C3, 0xB56B,
03746     0xD0C4, 0xC5BA, 0xD0C5, 0xB56C, 0xD0C6, 0xB56D, 0xD0C7, 0xB56E,
03747     0xD0C8, 0xC5BB, 0xD0C9, 0xC5BC, 0xD0CA, 0xB56F, 0xD0CB, 0xB570,
03748     0xD0CC, 0xB571, 0xD0CD, 0xB572, 0xD0CE, 0xB573, 0xD0CF, 0xB574,
03749     0xD0D0, 0xC5BD, 0xD0D1, 0xC5BE, 0xD0D2, 0xB575, 0xD0D3, 0xC5BF,
03750     0xD0D4, 0xC5C0, 0xD0D5, 0xC5C1, 0xD0D6, 0xB576, 0xD0D7, 0xB577,
03751     0xD0D8, 0xB578, 0xD0D9, 0xB579, 0xD0DA, 0xB57A, 0xD0DB, 0xB581,
03752     0xD0DC, 0xC5C2, 0xD0DD, 0xC5C3, 0xD0DE, 0xB582, 0xD0DF, 0xB583,
03753     0xD0E0, 0xC5C4, 0xD0E1, 0xB584, 0xD0E2, 0xB585, 0xD0E3, 0xB586,
03754     0xD0E4, 0xC5C5, 0xD0E5, 0xB587, 0xD0E6, 0xB588, 0xD0E7, 0xB589,
03755     0xD0E8, 0xB58A, 0xD0E9, 0xB58B, 0xD0EA, 0xB58C, 0xD0EB, 0xB58D,
03756     0xD0EC, 0xC5C6, 0xD0ED, 0xC5C7, 0xD0EE, 0xB58E, 0xD0EF, 0xC5C8,
03757     0xD0F0, 0xC5C9, 0xD0F1, 0xC5CA, 0xD0F2, 0xB58F, 0xD0F3, 0xB590,
03758     0xD0F4, 0xB591, 0xD0F5, 0xB592, 0xD0F6, 0xB593, 0xD0F7, 0xB594,
03759     0xD0F8, 0xC5CB, 0xD0F9, 0xB595, 0xD0FA, 0xB596, 0xD0FB, 0xB597,
03760     0xD0FC, 0xB598, 0xD0FD, 0xB599, 0xD0FE, 0xB59A, 0xD0FF, 0xB59B,
03761     0xD100, 0xB59C, 0xD101, 0xB59D, 0xD102, 0xB59E, 0xD103, 0xB59F,
03762     0xD104, 0xB5A0, 0xD105, 0xB641, 0xD106, 0xB642, 0xD107, 0xB643,
03763     0xD108, 0xB644, 0xD109, 0xB645, 0xD10A, 0xB646, 0xD10B, 0xB647,
03764     0xD10C, 0xB648, 0xD10D, 0xC5CC, 0xD10E, 0xB649, 0xD10F, 0xB64A,
03765     0xD110, 0xB64B, 0xD111, 0xB64C, 0xD112, 0xB64D, 0xD113, 0xB64E,
03766     0xD114, 0xB64F, 0xD115, 0xB650, 0xD116, 0xB651, 0xD117, 0xB652,
03767     0xD118, 0xB653, 0xD119, 0xB654, 0xD11A, 0xB655, 0xD11B, 0xB656,
03768     0xD11C, 0xB657, 0xD11D, 0xB658, 0xD11E, 0xB659, 0xD11F, 0xB65A,
03769     0xD120, 0xB661, 0xD121, 0xB662, 0xD122, 0xB663, 0xD123, 0xB664,
03770     0xD124, 0xB665, 0xD125, 0xB666, 0xD126, 0xB667, 0xD127, 0xB668,
03771     0xD128, 0xB669, 0xD129, 0xB66A, 0xD12A, 0xB66B, 0xD12B, 0xB66C,
03772     0xD12C, 0xB66D, 0xD12D, 0xB66E, 0xD12E, 0xB66F, 0xD12F, 0xB670,
03773     0xD130, 0xC5CD, 0xD131, 0xC5CE, 0xD132, 0xB671, 0xD133, 0xB672,
03774     0xD134, 0xC5CF, 0xD135, 0xB673, 0xD136, 0xB674, 0xD137, 0xB675,
03775     0xD138, 0xC5D0, 0xD139, 0xB676, 0xD13A, 0xC5D1, 0xD13B, 0xB677,
03776     0xD13C, 0xB678, 0xD13D, 0xB679, 0xD13E, 0xB67A, 0xD13F, 0xB681,
03777     0xD140, 0xC5D2, 0xD141, 0xC5D3, 0xD142, 0xB682, 0xD143, 0xC5D4,
03778     0xD144, 0xC5D5, 0xD145, 0xC5D6, 0xD146, 0xB683, 0xD147, 0xB684,
03779     0xD148, 0xB685, 0xD149, 0xB686, 0xD14A, 0xB687, 0xD14B, 0xB688,
03780     0xD14C, 0xC5D7, 0xD14D, 0xC5D8, 0xD14E, 0xB689, 0xD14F, 0xB68A,
03781     0xD150, 0xC5D9, 0xD151, 0xB68B, 0xD152, 0xB68C, 0xD153, 0xB68D,
03782     0xD154, 0xC5DA, 0xD155, 0xB68E, 0xD156, 0xB68F, 0xD157, 0xB690,
03783     0xD158, 0xB691, 0xD159, 0xB692, 0xD15A, 0xB693, 0xD15B, 0xB694,
03784     0xD15C, 0xC5DB, 0xD15D, 0xC5DC, 0xD15E, 0xB695, 0xD15F, 0xC5DD,
03785     0xD160, 0xB696, 0xD161, 0xC5DE, 0xD162, 0xB697, 0xD163, 0xB698,
03786     0xD164, 0xB699, 0xD165, 0xB69A, 0xD166, 0xB69B, 0xD167, 0xB69C,
03787     0xD168, 0xC5DF, 0xD169, 0xB69D, 0xD16A, 0xB69E, 0xD16B, 0xB69F,
03788     0xD16C, 0xC5E0, 0xD16D, 0xB6A0, 0xD16E, 0xB741, 0xD16F, 0xB742,
03789     0xD170, 0xB743, 0xD171, 0xB744, 0xD172, 0xB745, 0xD173, 0xB746,
03790     0xD174, 0xB747, 0xD175, 0xB748, 0xD176, 0xB749, 0xD177, 0xB74A,
03791     0xD178, 0xB74B, 0xD179, 0xB74C, 0xD17A, 0xB74D, 0xD17B, 0xB74E,
03792     0xD17C, 0xC5E1, 0xD17D, 0xB74F, 0xD17E, 0xB750, 0xD17F, 0xB751,
03793     0xD180, 0xB752, 0xD181, 0xB753, 0xD182, 0xB754, 0xD183, 0xB755,
03794     0xD184, 0xC5E2, 0xD185, 0xB756, 0xD186, 0xB757, 0xD187, 0xB758,
03795     0xD188, 0xC5E3, 0xD189, 0xB759, 0xD18A, 0xB75A, 0xD18B, 0xB761,
03796     0xD18C, 0xB762, 0xD18D, 0xB763, 0xD18E, 0xB764, 0xD18F, 0xB765,
03797     0xD190, 0xB766, 0xD191, 0xB767, 0xD192, 0xB768, 0xD193, 0xB769,
03798     0xD194, 0xB76A, 0xD195, 0xB76B, 0xD196, 0xB76C, 0xD197, 0xB76D,
03799     0xD198, 0xB76E, 0xD199, 0xB76F, 0xD19A, 0xB770, 0xD19B, 0xB771,
03800     0xD19C, 0xB772, 0xD19D, 0xB773, 0xD19E, 0xB774, 0xD19F, 0xB775,
03801     0xD1A0, 0xC5E4, 0xD1A1, 0xC5E5, 0xD1A2, 0xB776, 0xD1A3, 0xB777,
03802     0xD1A4, 0xC5E6, 0xD1A5, 0xB778, 0xD1A6, 0xB779, 0xD1A7, 0xB77A,
03803     0xD1A8, 0xC5E7, 0xD1A9, 0xB781, 0xD1AA, 0xB782, 0xD1AB, 0xB783,
03804     0xD1AC, 0xB784, 0xD1AD, 0xB785, 0xD1AE, 0xB786, 0xD1AF, 0xB787,
03805     0xD1B0, 0xC5E8, 0xD1B1, 0xC5E9, 0xD1B2, 0xB788, 0xD1B3, 0xC5EA,
03806     0xD1B4, 0xB789, 0xD1B5, 0xC5EB, 0xD1B6, 0xB78A, 0xD1B7, 0xB78B,
03807     0xD1B8, 0xB78C, 0xD1B9, 0xB78D, 0xD1BA, 0xC5EC, 0xD1BB, 0xB78E,
03808     0xD1BC, 0xC5ED, 0xD1BD, 0xB78F, 0xD1BE, 0xB790, 0xD1BF, 0xB791,
03809     0xD1C0, 0xC5EE, 0xD1C1, 0xB792, 0xD1C2, 0xB793, 0xD1C3, 0xB794,
03810     0xD1C4, 0xB795, 0xD1C5, 0xB796, 0xD1C6, 0xB797, 0xD1C7, 0xB798,
03811     0xD1C8, 0xB799, 0xD1C9, 0xB79A, 0xD1CA, 0xB79B, 0xD1CB, 0xB79C,
03812     0xD1CC, 0xB79D, 0xD1CD, 0xB79E, 0xD1CE, 0xB79F, 0xD1CF, 0xB7A0,
03813     0xD1D0, 0xB841, 0xD1D1, 0xB842, 0xD1D2, 0xB843, 0xD1D3, 0xB844,
03814     0xD1D4, 0xB845, 0xD1D5, 0xB846, 0xD1D6, 0xB847, 0xD1D7, 0xB848,
03815     0xD1D8, 0xC5EF, 0xD1D9, 0xB849, 0xD1DA, 0xB84A, 0xD1DB, 0xB84B,
03816     0xD1DC, 0xB84C, 0xD1DD, 0xB84D, 0xD1DE, 0xB84E, 0xD1DF, 0xB84F,
03817     0xD1E0, 0xB850, 0xD1E1, 0xB851, 0xD1E2, 0xB852, 0xD1E3, 0xB853,
03818     0xD1E4, 0xB854, 0xD1E5, 0xB855, 0xD1E6, 0xB856, 0xD1E7, 0xB857,
03819     0xD1E8, 0xB858, 0xD1E9, 0xB859, 0xD1EA, 0xB85A, 0xD1EB, 0xB861,
03820     0xD1EC, 0xB862, 0xD1ED, 0xB863, 0xD1EE, 0xB864, 0xD1EF, 0xB865,
03821     0xD1F0, 0xB866, 0xD1F1, 0xB867, 0xD1F2, 0xB868, 0xD1F3, 0xB869,
03822     0xD1F4, 0xC5F0, 0xD1F5, 0xB86A, 0xD1F6, 0xB86B, 0xD1F7, 0xB86C,
03823     0xD1F8, 0xC5F1, 0xD1F9, 0xB86D, 0xD1FA, 0xB86E, 0xD1FB, 0xB86F,
03824     0xD1FC, 0xB870, 0xD1FD, 0xB871, 0xD1FE, 0xB872, 0xD1FF, 0xB873,
03825     0xD200, 0xB874, 0xD201, 0xB875, 0xD202, 0xB876, 0xD203, 0xB877,
03826     0xD204, 0xB878, 0xD205, 0xB879, 0xD206, 0xB87A, 0xD207, 0xC5F2,
03827     0xD208, 0xB881, 0xD209, 0xC5F3, 0xD20A, 0xB882, 0xD20B, 0xB883,
03828     0xD20C, 0xB884, 0xD20D, 0xB885, 0xD20E, 0xB886, 0xD20F, 0xB887,
03829     0xD210, 0xC5F4, 0xD211, 0xB888, 0xD212, 0xB889, 0xD213, 0xB88A,
03830     0xD214, 0xB88B, 0xD215, 0xB88C, 0xD216, 0xB88D, 0xD217, 0xB88E,
03831     0xD218, 0xB88F, 0xD219, 0xB890, 0xD21A, 0xB891, 0xD21B, 0xB892,
03832     0xD21C, 0xB893, 0xD21D, 0xB894, 0xD21E, 0xB895, 0xD21F, 0xB896,
03833     0xD220, 0xB897, 0xD221, 0xB898, 0xD222, 0xB899, 0xD223, 0xB89A,
03834     0xD224, 0xB89B, 0xD225, 0xB89C, 0xD226, 0xB89D, 0xD227, 0xB89E,
03835     0xD228, 0xB89F, 0xD229, 0xB8A0, 0xD22A, 0xB941, 0xD22B, 0xB942,
03836     0xD22C, 0xC5F5, 0xD22D, 0xC5F6, 0xD22E, 0xB943, 0xD22F, 0xB944,
03837     0xD230, 0xC5F7, 0xD231, 0xB945, 0xD232, 0xB946, 0xD233, 0xB947,
03838     0xD234, 0xC5F8, 0xD235, 0xB948, 0xD236, 0xB949, 0xD237, 0xB94A,
03839     0xD238, 0xB94B, 0xD239, 0xB94C, 0xD23A, 0xB94D, 0xD23B, 0xB94E,
03840     0xD23C, 0xC5F9, 0xD23D, 0xC5FA, 0xD23E, 0xB94F, 0xD23F, 0xC5FB,
03841     0xD240, 0xB950, 0xD241, 0xC5FC, 0xD242, 0xB951, 0xD243, 0xB952,
03842     0xD244, 0xB953, 0xD245, 0xB954, 0xD246, 0xB955, 0xD247, 0xB956,
03843     0xD248, 0xC5FD, 0xD249, 0xB957, 0xD24A, 0xB958, 0xD24B, 0xB959,
03844     0xD24C, 0xB95A, 0xD24D, 0xB961, 0xD24E, 0xB962, 0xD24F, 0xB963,
03845     0xD250, 0xB964, 0xD251, 0xB965, 0xD252, 0xB966, 0xD253, 0xB967,
03846     0xD254, 0xB968, 0xD255, 0xB969, 0xD256, 0xB96A, 0xD257, 0xB96B,
03847     0xD258, 0xB96C, 0xD259, 0xB96D, 0xD25A, 0xB96E, 0xD25B, 0xB96F,
03848     0xD25C, 0xC5FE, 0xD25D, 0xB970, 0xD25E, 0xB971, 0xD25F, 0xB972,
03849     0xD260, 0xB973, 0xD261, 0xB974, 0xD262, 0xB975, 0xD263, 0xB976,
03850     0xD264, 0xC6A1, 0xD265, 0xB977, 0xD266, 0xB978, 0xD267, 0xB979,
03851     0xD268, 0xB97A, 0xD269, 0xB981, 0xD26A, 0xB982, 0xD26B, 0xB983,
03852     0xD26C, 0xB984, 0xD26D, 0xB985, 0xD26E, 0xB986, 0xD26F, 0xB987,
03853     0xD270, 0xB988, 0xD271, 0xB989, 0xD272, 0xB98A, 0xD273, 0xB98B,
03854     0xD274, 0xB98C, 0xD275, 0xB98D, 0xD276, 0xB98E, 0xD277, 0xB98F,
03855     0xD278, 0xB990, 0xD279, 0xB991, 0xD27A, 0xB992, 0xD27B, 0xB993,
03856     0xD27C, 0xB994, 0xD27D, 0xB995, 0xD27E, 0xB996, 0xD27F, 0xB997,
03857     0xD280, 0xC6A2, 0xD281, 0xC6A3, 0xD282, 0xB998, 0xD283, 0xB999,
03858     0xD284, 0xC6A4, 0xD285, 0xB99A, 0xD286, 0xB99B, 0xD287, 0xB99C,
03859     0xD288, 0xC6A5, 0xD289, 0xB99D, 0xD28A, 0xB99E, 0xD28B, 0xB99F,
03860     0xD28C, 0xB9A0, 0xD28D, 0xBA41, 0xD28E, 0xBA42, 0xD28F, 0xBA43,
03861     0xD290, 0xC6A6, 0xD291, 0xC6A7, 0xD292, 0xBA44, 0xD293, 0xBA45,
03862     0xD294, 0xBA46, 0xD295, 0xC6A8, 0xD296, 0xBA47, 0xD297, 0xBA48,
03863     0xD298, 0xBA49, 0xD299, 0xBA4A, 0xD29A, 0xBA4B, 0xD29B, 0xBA4C,
03864     0xD29C, 0xC6A9, 0xD29D, 0xBA4D, 0xD29E, 0xBA4E, 0xD29F, 0xBA4F,
03865     0xD2A0, 0xC6AA, 0xD2A1, 0xBA50, 0xD2A2, 0xBA51, 0xD2A3, 0xBA52,
03866     0xD2A4, 0xC6AB, 0xD2A5, 0xBA53, 0xD2A6, 0xBA54, 0xD2A7, 0xBA55,
03867     0xD2A8, 0xBA56, 0xD2A9, 0xBA57, 0xD2AA, 0xBA58, 0xD2AB, 0xBA59,
03868     0xD2AC, 0xC6AC, 0xD2AD, 0xBA5A, 0xD2AE, 0xBA61, 0xD2AF, 0xBA62,
03869     0xD2B0, 0xBA63, 0xD2B1, 0xC6AD, 0xD2B2, 0xBA64, 0xD2B3, 0xBA65,
03870     0xD2B4, 0xBA66, 0xD2B5, 0xBA67, 0xD2B6, 0xBA68, 0xD2B7, 0xBA69,
03871     0xD2B8, 0xC6AE, 0xD2B9, 0xC6AF, 0xD2BA, 0xBA6A, 0xD2BB, 0xBA6B,
03872     0xD2BC, 0xC6B0, 0xD2BD, 0xBA6C, 0xD2BE, 0xBA6D, 0xD2BF, 0xC6B1,
03873     0xD2C0, 0xC6B2, 0xD2C1, 0xBA6E, 0xD2C2, 0xC6B3, 0xD2C3, 0xBA6F,
03874     0xD2C4, 0xBA70, 0xD2C5, 0xBA71, 0xD2C6, 0xBA72, 0xD2C7, 0xBA73,
03875     0xD2C8, 0xC6B4, 0xD2C9, 0xC6B5, 0xD2CA, 0xBA74, 0xD2CB, 0xC6B6,
03876     0xD2CC, 0xBA75, 0xD2CD, 0xBA76, 0xD2CE, 0xBA77, 0xD2CF, 0xBA78,
03877     0xD2D0, 0xBA79, 0xD2D1, 0xBA7A, 0xD2D2, 0xBA81, 0xD2D3, 0xBA82,
03878     0xD2D4, 0xC6B7, 0xD2D5, 0xBA83, 0xD2D6, 0xBA84, 0xD2D7, 0xBA85,
03879     0xD2D8, 0xC6B8, 0xD2D9, 0xBA86, 0xD2DA, 0xBA87, 0xD2DB, 0xBA88,
03880     0xD2DC, 0xC6B9, 0xD2DD, 0xBA89, 0xD2DE, 0xBA8A, 0xD2DF, 0xBA8B,
03881     0xD2E0, 0xBA8C, 0xD2E1, 0xBA8D, 0xD2E2, 0xBA8E, 0xD2E3, 0xBA8F,
03882     0xD2E4, 0xC6BA, 0xD2E5, 0xC6BB, 0xD2E6, 0xBA90, 0xD2E7, 0xBA91,
03883     0xD2E8, 0xBA92, 0xD2E9, 0xBA93, 0xD2EA, 0xBA94, 0xD2EB, 0xBA95,
03884     0xD2EC, 0xBA96, 0xD2ED, 0xBA97, 0xD2EE, 0xBA98, 0xD2EF, 0xBA99,
03885     0xD2F0, 0xC6BC, 0xD2F1, 0xC6BD, 0xD2F2, 0xBA9A, 0xD2F3, 0xBA9B,
03886     0xD2F4, 0xC6BE, 0xD2F5, 0xBA9C, 0xD2F6, 0xBA9D, 0xD2F7, 0xBA9E,
03887     0xD2F8, 0xC6BF, 0xD2F9, 0xBA9F, 0xD2FA, 0xBAA0, 0xD2FB, 0xBB41,
03888     0xD2FC, 0xBB42, 0xD2FD, 0xBB43, 0xD2FE, 0xBB44, 0xD2FF, 0xBB45,
03889     0xD300, 0xC6C0, 0xD301, 0xC6C1, 0xD302, 0xBB46, 0xD303, 0xC6C2,
03890     0xD304, 0xBB47, 0xD305, 0xC6C3, 0xD306, 0xBB48, 0xD307, 0xBB49,
03891     0xD308, 0xBB4A, 0xD309, 0xBB4B, 0xD30A, 0xBB4C, 0xD30B, 0xBB4D,
03892     0xD30C, 0xC6C4, 0xD30D, 0xC6C5, 0xD30E, 0xC6C6, 0xD30F, 0xBB4E,
03893     0xD310, 0xC6C7, 0xD311, 0xBB4F, 0xD312, 0xBB50, 0xD313, 0xBB51,
03894     0xD314, 0xC6C8, 0xD315, 0xBB52, 0xD316, 0xC6C9, 0xD317, 0xBB53,
03895     0xD318, 0xBB54, 0xD319, 0xBB55, 0xD31A, 0xBB56, 0xD31B, 0xBB57,
03896     0xD31C, 0xC6CA, 0xD31D, 0xC6CB, 0xD31E, 0xBB58, 0xD31F, 0xC6CC,
03897     0xD320, 0xC6CD, 0xD321, 0xC6CE, 0xD322, 0xBB59, 0xD323, 0xBB5A,
03898     0xD324, 0xBB61, 0xD325, 0xC6CF, 0xD326, 0xBB62, 0xD327, 0xBB63,
03899     0xD328, 0xC6D0, 0xD329, 0xC6D1, 0xD32A, 0xBB64, 0xD32B, 0xBB65,
03900     0xD32C, 0xC6D2, 0xD32D, 0xBB66, 0xD32E, 0xBB67, 0xD32F, 0xBB68,
03901     0xD330, 0xC6D3, 0xD331, 0xBB69, 0xD332, 0xBB6A, 0xD333, 0xBB6B,
03902     0xD334, 0xBB6C, 0xD335, 0xBB6D, 0xD336, 0xBB6E, 0xD337, 0xBB6F,
03903     0xD338, 0xC6D4, 0xD339, 0xC6D5, 0xD33A, 0xBB70, 0xD33B, 0xC6D6,
03904     0xD33C, 0xC6D7, 0xD33D, 0xC6D8, 0xD33E, 0xBB71, 0xD33F, 0xBB72,
03905     0xD340, 0xBB73, 0xD341, 0xBB74, 0xD342, 0xBB75, 0xD343, 0xBB76,
03906     0xD344, 0xC6D9, 0xD345, 0xC6DA, 0xD346, 0xBB77, 0xD347, 0xBB78,
03907     0xD348, 0xBB79, 0xD349, 0xBB7A, 0xD34A, 0xBB81, 0xD34B, 0xBB82,
03908     0xD34C, 0xBB83, 0xD34D, 0xBB84, 0xD34E, 0xBB85, 0xD34F, 0xBB86,
03909     0xD350, 0xBB87, 0xD351, 0xBB88, 0xD352, 0xBB89, 0xD353, 0xBB8A,
03910     0xD354, 0xBB8B, 0xD355, 0xBB8C, 0xD356, 0xBB8D, 0xD357, 0xBB8E,
03911     0xD358, 0xBB8F, 0xD359, 0xBB90, 0xD35A, 0xBB91, 0xD35B, 0xBB92,
03912     0xD35C, 0xBB93, 0xD35D, 0xBB94, 0xD35E, 0xBB95, 0xD35F, 0xBB96,
03913     0xD360, 0xBB97, 0xD361, 0xBB98, 0xD362, 0xBB99, 0xD363, 0xBB9A,
03914     0xD364, 0xBB9B, 0xD365, 0xBB9C, 0xD366, 0xBB9D, 0xD367, 0xBB9E,
03915     0xD368, 0xBB9F, 0xD369, 0xBBA0, 0xD36A, 0xBC41, 0xD36B, 0xBC42,
03916     0xD36C, 0xBC43, 0xD36D, 0xBC44, 0xD36E, 0xBC45, 0xD36F, 0xBC46,
03917     0xD370, 0xBC47, 0xD371, 0xBC48, 0xD372, 0xBC49, 0xD373, 0xBC4A,
03918     0xD374, 0xBC4B, 0xD375, 0xBC4C, 0xD376, 0xBC4D, 0xD377, 0xBC4E,
03919     0xD378, 0xBC4F, 0xD379, 0xBC50, 0xD37A, 0xBC51, 0xD37B, 0xBC52,
03920     0xD37C, 0xC6DB, 0xD37D, 0xC6DC, 0xD37E, 0xBC53, 0xD37F, 0xBC54,
03921     0xD380, 0xC6DD, 0xD381, 0xBC55, 0xD382, 0xBC56, 0xD383, 0xBC57,
03922     0xD384, 0xC6DE, 0xD385, 0xBC58, 0xD386, 0xBC59, 0xD387, 0xBC5A,
03923     0xD388, 0xBC61, 0xD389, 0xBC62, 0xD38A, 0xBC63, 0xD38B, 0xBC64,
03924     0xD38C, 0xC6DF, 0xD38D, 0xC6E0, 0xD38E, 0xBC65, 0xD38F, 0xC6E1,
03925     0xD390, 0xC6E2, 0xD391, 0xC6E3, 0xD392, 0xBC66, 0xD393, 0xBC67,
03926     0xD394, 0xBC68, 0xD395, 0xBC69, 0xD396, 0xBC6A, 0xD397, 0xBC6B,
03927     0xD398, 0xC6E4, 0xD399, 0xC6E5, 0xD39A, 0xBC6C, 0xD39B, 0xBC6D,
03928     0xD39C, 0xC6E6, 0xD39D, 0xBC6E, 0xD39E, 0xBC6F, 0xD39F, 0xBC70,
03929     0xD3A0, 0xC6E7, 0xD3A1, 0xBC71, 0xD3A2, 0xBC72, 0xD3A3, 0xBC73,
03930     0xD3A4, 0xBC74, 0xD3A5, 0xBC75, 0xD3A6, 0xBC76, 0xD3A7, 0xBC77,
03931     0xD3A8, 0xC6E8, 0xD3A9, 0xC6E9, 0xD3AA, 0xBC78, 0xD3AB, 0xC6EA,
03932     0xD3AC, 0xBC79, 0xD3AD, 0xC6EB, 0xD3AE, 0xBC7A, 0xD3AF, 0xBC81,
03933     0xD3B0, 0xBC82, 0xD3B1, 0xBC83, 0xD3B2, 0xBC84, 0xD3B3, 0xBC85,
03934     0xD3B4, 0xC6EC, 0xD3B5, 0xBC86, 0xD3B6, 0xBC87, 0xD3B7, 0xBC88,
03935     0xD3B8, 0xC6ED, 0xD3B9, 0xBC89, 0xD3BA, 0xBC8A, 0xD3BB, 0xBC8B,
03936     0xD3BC, 0xC6EE, 0xD3BD, 0xBC8C, 0xD3BE, 0xBC8D, 0xD3BF, 0xBC8E,
03937     0xD3C0, 0xBC8F, 0xD3C1, 0xBC90, 0xD3C2, 0xBC91, 0xD3C3, 0xBC92,
03938     0xD3C4, 0xC6EF, 0xD3C5, 0xC6F0, 0xD3C6, 0xBC93, 0xD3C7, 0xBC94,
03939     0xD3C8, 0xC6F1, 0xD3C9, 0xC6F2, 0xD3CA, 0xBC95, 0xD3CB, 0xBC96,
03940     0xD3CC, 0xBC97, 0xD3CD, 0xBC98, 0xD3CE, 0xBC99, 0xD3CF, 0xBC9A,
03941     0xD3D0, 0xC6F3, 0xD3D1, 0xBC9B, 0xD3D2, 0xBC9C, 0xD3D3, 0xBC9D,
03942     0xD3D4, 0xBC9E, 0xD3D5, 0xBC9F, 0xD3D6, 0xBCA0, 0xD3D7, 0xBD41,
03943     0xD3D8, 0xC6F4, 0xD3D9, 0xBD42, 0xD3DA, 0xBD43, 0xD3DB, 0xBD44,
03944     0xD3DC, 0xBD45, 0xD3DD, 0xBD46, 0xD3DE, 0xBD47, 0xD3DF, 0xBD48,
03945     0xD3E0, 0xBD49, 0xD3E1, 0xC6F5, 0xD3E2, 0xBD4A, 0xD3E3, 0xC6F6,
03946     0xD3E4, 0xBD4B, 0xD3E5, 0xBD4C, 0xD3E6, 0xBD4D, 0xD3E7, 0xBD4E,
03947     0xD3E8, 0xBD4F, 0xD3E9, 0xBD50, 0xD3EA, 0xBD51, 0xD3EB, 0xBD52,
03948     0xD3EC, 0xC6F7, 0xD3ED, 0xC6F8, 0xD3EE, 0xBD53, 0xD3EF, 0xBD54,
03949     0xD3F0, 0xC6F9, 0xD3F1, 0xBD55, 0xD3F2, 0xBD56, 0xD3F3, 0xBD57,
03950     0xD3F4, 0xC6FA, 0xD3F5, 0xBD58, 0xD3F6, 0xBD59, 0xD3F7, 0xBD5A,
03951     0xD3F8, 0xBD61, 0xD3F9, 0xBD62, 0xD3FA, 0xBD63, 0xD3FB, 0xBD64,
03952     0xD3FC, 0xC6FB, 0xD3FD, 0xC6FC, 0xD3FE, 0xBD65, 0xD3FF, 0xC6FD,
03953     0xD400, 0xBD66, 0xD401, 0xC6FE, 0xD402, 0xBD67, 0xD403, 0xBD68,
03954     0xD404, 0xBD69, 0xD405, 0xBD6A, 0xD406, 0xBD6B, 0xD407, 0xBD6C,
03955     0xD408, 0xC7A1, 0xD409, 0xBD6D, 0xD40A, 0xBD6E, 0xD40B, 0xBD6F,
03956     0xD40C, 0xBD70, 0xD40D, 0xBD71, 0xD40E, 0xBD72, 0xD40F, 0xBD73,
03957     0xD410, 0xBD74, 0xD411, 0xBD75, 0xD412, 0xBD76, 0xD413, 0xBD77,
03958     0xD414, 0xBD78, 0xD415, 0xBD79, 0xD416, 0xBD7A, 0xD417, 0xBD81,
03959     0xD418, 0xBD82, 0xD419, 0xBD83, 0xD41A, 0xBD84, 0xD41B, 0xBD85,
03960     0xD41C, 0xBD86, 0xD41D, 0xC7A2, 0xD41E, 0xBD87, 0xD41F, 0xBD88,
03961     0xD420, 0xBD89, 0xD421, 0xBD8A, 0xD422, 0xBD8B, 0xD423, 0xBD8C,
03962     0xD424, 0xBD8D, 0xD425, 0xBD8E, 0xD426, 0xBD8F, 0xD427, 0xBD90,
03963     0xD428, 0xBD91, 0xD429, 0xBD92, 0xD42A, 0xBD93, 0xD42B, 0xBD94,
03964     0xD42C, 0xBD95, 0xD42D, 0xBD96, 0xD42E, 0xBD97, 0xD42F, 0xBD98,
03965     0xD430, 0xBD99, 0xD431, 0xBD9A, 0xD432, 0xBD9B, 0xD433, 0xBD9C,
03966     0xD434, 0xBD9D, 0xD435, 0xBD9E, 0xD436, 0xBD9F, 0xD437, 0xBDA0,
03967     0xD438, 0xBE41, 0xD439, 0xBE42, 0xD43A, 0xBE43, 0xD43B, 0xBE44,
03968     0xD43C, 0xBE45, 0xD43D, 0xBE46, 0xD43E, 0xBE47, 0xD43F, 0xBE48,
03969     0xD440, 0xC7A3, 0xD441, 0xBE49, 0xD442, 0xBE4A, 0xD443, 0xBE4B,
03970     0xD444, 0xC7A4, 0xD445, 0xBE4C, 0xD446, 0xBE4D, 0xD447, 0xBE4E,
03971     0xD448, 0xBE4F, 0xD449, 0xBE50, 0xD44A, 0xBE51, 0xD44B, 0xBE52,
03972     0xD44C, 0xBE53, 0xD44D, 0xBE54, 0xD44E, 0xBE55, 0xD44F, 0xBE56,
03973     0xD450, 0xBE57, 0xD451, 0xBE58, 0xD452, 0xBE59, 0xD453, 0xBE5A,
03974     0xD454, 0xBE61, 0xD455, 0xBE62, 0xD456, 0xBE63, 0xD457, 0xBE64,
03975     0xD458, 0xBE65, 0xD459, 0xBE66, 0xD45A, 0xBE67, 0xD45B, 0xBE68,
03976     0xD45C, 0xC7A5, 0xD45D, 0xBE69, 0xD45E, 0xBE6A, 0xD45F, 0xBE6B,
03977     0xD460, 0xC7A6, 0xD461, 0xBE6C, 0xD462, 0xBE6D, 0xD463, 0xBE6E,
03978     0xD464, 0xC7A7, 0xD465, 0xBE6F, 0xD466, 0xBE70, 0xD467, 0xBE71,
03979     0xD468, 0xBE72, 0xD469, 0xBE73, 0xD46A, 0xBE74, 0xD46B, 0xBE75,
03980     0xD46C, 0xBE76, 0xD46D, 0xC7A8, 0xD46E, 0xBE77, 0xD46F, 0xC7A9,
03981     0xD470, 0xBE78, 0xD471, 0xBE79, 0xD472, 0xBE7A, 0xD473, 0xBE81,
03982     0xD474, 0xBE82, 0xD475, 0xBE83, 0xD476, 0xBE84, 0xD477, 0xBE85,
03983     0xD478, 0xC7AA, 0xD479, 0xC7AB, 0xD47A, 0xBE86, 0xD47B, 0xBE87,
03984     0xD47C, 0xC7AC, 0xD47D, 0xBE88, 0xD47E, 0xBE89, 0xD47F, 0xC7AD,
03985     0xD480, 0xC7AE, 0xD481, 0xBE8A, 0xD482, 0xC7AF, 0xD483, 0xBE8B,
03986     0xD484, 0xBE8C, 0xD485, 0xBE8D, 0xD486, 0xBE8E, 0xD487, 0xBE8F,
03987     0xD488, 0xC7B0, 0xD489, 0xC7B1, 0xD48A, 0xBE90, 0xD48B, 0xC7B2,
03988     0xD48C, 0xBE91, 0xD48D, 0xC7B3, 0xD48E, 0xBE92, 0xD48F, 0xBE93,
03989     0xD490, 0xBE94, 0xD491, 0xBE95, 0xD492, 0xBE96, 0xD493, 0xBE97,
03990     0xD494, 0xC7B4, 0xD495, 0xBE98, 0xD496, 0xBE99, 0xD497, 0xBE9A,
03991     0xD498, 0xBE9B, 0xD499, 0xBE9C, 0xD49A, 0xBE9D, 0xD49B, 0xBE9E,
03992     0xD49C, 0xBE9F, 0xD49D, 0xBEA0, 0xD49E, 0xBF41, 0xD49F, 0xBF42,
03993     0xD4A0, 0xBF43, 0xD4A1, 0xBF44, 0xD4A2, 0xBF45, 0xD4A3, 0xBF46,
03994     0xD4A4, 0xBF47, 0xD4A5, 0xBF48, 0xD4A6, 0xBF49, 0xD4A7, 0xBF4A,
03995     0xD4A8, 0xBF4B, 0xD4A9, 0xC7B5, 0xD4AA, 0xBF4C, 0xD4AB, 0xBF4D,
03996     0xD4AC, 0xBF4E, 0xD4AD, 0xBF4F, 0xD4AE, 0xBF50, 0xD4AF, 0xBF51,
03997     0xD4B0, 0xBF52, 0xD4B1, 0xBF53, 0xD4B2, 0xBF54, 0xD4B3, 0xBF55,
03998     0xD4B4, 0xBF56, 0xD4B5, 0xBF57, 0xD4B6, 0xBF58, 0xD4B7, 0xBF59,
03999     0xD4B8, 0xBF5A, 0xD4B9, 0xBF61, 0xD4BA, 0xBF62, 0xD4BB, 0xBF63,
04000     0xD4BC, 0xBF64, 0xD4BD, 0xBF65, 0xD4BE, 0xBF66, 0xD4BF, 0xBF67,
04001     0xD4C0, 0xBF68, 0xD4C1, 0xBF69, 0xD4C2, 0xBF6A, 0xD4C3, 0xBF6B,
04002     0xD4C4, 0xBF6C, 0xD4C5, 0xBF6D, 0xD4C6, 0xBF6E, 0xD4C7, 0xBF6F,
04003     0xD4C8, 0xBF70, 0xD4C9, 0xBF71, 0xD4CA, 0xBF72, 0xD4CB, 0xBF73,
04004     0xD4CC, 0xC7B6, 0xD4CD, 0xBF74, 0xD4CE, 0xBF75, 0xD4CF, 0xBF76,
04005     0xD4D0, 0xC7B7, 0xD4D1, 0xBF77, 0xD4D2, 0xBF78, 0xD4D3, 0xBF79,
04006     0xD4D4, 0xC7B8, 0xD4D5, 0xBF7A, 0xD4D6, 0xBF81, 0xD4D7, 0xBF82,
04007     0xD4D8, 0xBF83, 0xD4D9, 0xBF84, 0xD4DA, 0xBF85, 0xD4DB, 0xBF86,
04008     0xD4DC, 0xC7B9, 0xD4DD, 0xBF87, 0xD4DE, 0xBF88, 0xD4DF, 0xC7BA,
04009     0xD4E0, 0xBF89, 0xD4E1, 0xBF8A, 0xD4E2, 0xBF8B, 0xD4E3, 0xBF8C,
04010     0xD4E4, 0xBF8D, 0xD4E5, 0xBF8E, 0xD4E6, 0xBF8F, 0xD4E7, 0xBF90,
04011     0xD4E8, 0xC7BB, 0xD4E9, 0xBF91, 0xD4EA, 0xBF92, 0xD4EB, 0xBF93,
04012     0xD4EC, 0xC7BC, 0xD4ED, 0xBF94, 0xD4EE, 0xBF95, 0xD4EF, 0xBF96,
04013     0xD4F0, 0xC7BD, 0xD4F1, 0xBF97, 0xD4F2, 0xBF98, 0xD4F3, 0xBF99,
04014     0xD4F4, 0xBF9A, 0xD4F5, 0xBF9B, 0xD4F6, 0xBF9C, 0xD4F7, 0xBF9D,
04015     0xD4F8, 0xC7BE, 0xD4F9, 0xBF9E, 0xD4FA, 0xBF9F, 0xD4FB, 0xC7BF,
04016     0xD4FC, 0xBFA0, 0xD4FD, 0xC7C0, 0xD4FE, 0xC041, 0xD4FF, 0xC042,
04017     0xD500, 0xC043, 0xD501, 0xC044, 0xD502, 0xC045, 0xD503, 0xC046,
04018     0xD504, 0xC7C1, 0xD505, 0xC047, 0xD506, 0xC048, 0xD507, 0xC049,
04019     0xD508, 0xC7C2, 0xD509, 0xC04A, 0xD50A, 0xC04B, 0xD50B, 0xC04C,
04020     0xD50C, 0xC7C3, 0xD50D, 0xC04D, 0xD50E, 0xC04E, 0xD50F, 0xC04F,
04021     0xD510, 0xC050, 0xD511, 0xC051, 0xD512, 0xC052, 0xD513, 0xC053,
04022     0xD514, 0xC7C4, 0xD515, 0xC7C5, 0xD516, 0xC054, 0xD517, 0xC7C6,
04023     0xD518, 0xC055, 0xD519, 0xC056, 0xD51A, 0xC057, 0xD51B, 0xC058,
04024     0xD51C, 0xC059, 0xD51D, 0xC05A, 0xD51E, 0xC061, 0xD51F, 0xC062,
04025     0xD520, 0xC063, 0xD521, 0xC064, 0xD522, 0xC065, 0xD523, 0xC066,
04026     0xD524, 0xC067, 0xD525, 0xC068, 0xD526, 0xC069, 0xD527, 0xC06A,
04027     0xD528, 0xC06B, 0xD529, 0xC06C, 0xD52A, 0xC06D, 0xD52B, 0xC06E,
04028     0xD52C, 0xC06F, 0xD52D, 0xC070, 0xD52E, 0xC071, 0xD52F, 0xC072,
04029     0xD530, 0xC073, 0xD531, 0xC074, 0xD532, 0xC075, 0xD533, 0xC076,
04030     0xD534, 0xC077, 0xD535, 0xC078, 0xD536, 0xC079, 0xD537, 0xC07A,
04031     0xD538, 0xC081, 0xD539, 0xC082, 0xD53A, 0xC083, 0xD53B, 0xC084,
04032     0xD53C, 0xC7C7, 0xD53D, 0xC7C8, 0xD53E, 0xC085, 0xD53F, 0xC086,
04033     0xD540, 0xC7C9, 0xD541, 0xC087, 0xD542, 0xC088, 0xD543, 0xC089,
04034     0xD544, 0xC7CA, 0xD545, 0xC08A, 0xD546, 0xC08B, 0xD547, 0xC08C,
04035     0xD548, 0xC08D, 0xD549, 0xC08E, 0xD54A, 0xC08F, 0xD54B, 0xC090,
04036     0xD54C, 0xC7CB, 0xD54D, 0xC7CC, 0xD54E, 0xC091, 0xD54F, 0xC7CD,
04037     0xD550, 0xC092, 0xD551, 0xC7CE, 0xD552, 0xC093, 0xD553, 0xC094,
04038     0xD554, 0xC095, 0xD555, 0xC096, 0xD556, 0xC097, 0xD557, 0xC098,
04039     0xD558, 0xC7CF, 0xD559, 0xC7D0, 0xD55A, 0xC099, 0xD55B, 0xC09A,
04040     0xD55C, 0xC7D1, 0xD55D, 0xC09B, 0xD55E, 0xC09C, 0xD55F, 0xC09D,
04041     0xD560, 0xC7D2, 0xD561, 0xC09E, 0xD562, 0xC09F, 0xD563, 0xC0A0,
04042     0xD564, 0xC141, 0xD565, 0xC7D3, 0xD566, 0xC142, 0xD567, 0xC143,
04043     0xD568, 0xC7D4, 0xD569, 0xC7D5, 0xD56A, 0xC144, 0xD56B, 0xC7D6,
04044     0xD56C, 0xC145, 0xD56D, 0xC7D7, 0xD56E, 0xC146, 0xD56F, 0xC147,
04045     0xD570, 0xC148, 0xD571, 0xC149, 0xD572, 0xC14A, 0xD573, 0xC14B,
04046     0xD574, 0xC7D8, 0xD575, 0xC7D9, 0xD576, 0xC14C, 0xD577, 0xC14D,
04047     0xD578, 0xC7DA, 0xD579, 0xC14E, 0xD57A, 0xC14F, 0xD57B, 0xC150,
04048     0xD57C, 0xC7DB, 0xD57D, 0xC151, 0xD57E, 0xC152, 0xD57F, 0xC153,
04049     0xD580, 0xC154, 0xD581, 0xC155, 0xD582, 0xC156, 0xD583, 0xC157,
04050     0xD584, 0xC7DC, 0xD585, 0xC7DD, 0xD586, 0xC158, 0xD587, 0xC7DE,
04051     0xD588, 0xC7DF, 0xD589, 0xC7E0, 0xD58A, 0xC159, 0xD58B, 0xC15A,
04052     0xD58C, 0xC161, 0xD58D, 0xC162, 0xD58E, 0xC163, 0xD58F, 0xC164,
04053     0xD590, 0xC7E1, 0xD591, 0xC165, 0xD592, 0xC166, 0xD593, 0xC167,
04054     0xD594, 0xC168, 0xD595, 0xC169, 0xD596, 0xC16A, 0xD597, 0xC16B,
04055     0xD598, 0xC16C, 0xD599, 0xC16D, 0xD59A, 0xC16E, 0xD59B, 0xC16F,
04056     0xD59C, 0xC170, 0xD59D, 0xC171, 0xD59E, 0xC172, 0xD59F, 0xC173,
04057     0xD5A0, 0xC174, 0xD5A1, 0xC175, 0xD5A2, 0xC176, 0xD5A3, 0xC177,
04058     0xD5A4, 0xC178, 0xD5A5, 0xC7E2, 0xD5A6, 0xC179, 0xD5A7, 0xC17A,
04059     0xD5A8, 0xC181, 0xD5A9, 0xC182, 0xD5AA, 0xC183, 0xD5AB, 0xC184,
04060     0xD5AC, 0xC185, 0xD5AD, 0xC186, 0xD5AE, 0xC187, 0xD5AF, 0xC188,
04061     0xD5B0, 0xC189, 0xD5B1, 0xC18A, 0xD5B2, 0xC18B, 0xD5B3, 0xC18C,
04062     0xD5B4, 0xC18D, 0xD5B5, 0xC18E, 0xD5B6, 0xC18F, 0xD5B7, 0xC190,
04063     0xD5B8, 0xC191, 0xD5B9, 0xC192, 0xD5BA, 0xC193, 0xD5BB, 0xC194,
04064     0xD5BC, 0xC195, 0xD5BD, 0xC196, 0xD5BE, 0xC197, 0xD5BF, 0xC198,
04065     0xD5C0, 0xC199, 0xD5C1, 0xC19A, 0xD5C2, 0xC19B, 0xD5C3, 0xC19C,
04066     0xD5C4, 0xC19D, 0xD5C5, 0xC19E, 0xD5C6, 0xC19F, 0xD5C7, 0xC1A0,
04067     0xD5C8, 0xC7E3, 0xD5C9, 0xC7E4, 0xD5CA, 0xC241, 0xD5CB, 0xC242,
04068     0xD5CC, 0xC7E5, 0xD5CD, 0xC243, 0xD5CE, 0xC244, 0xD5CF, 0xC245,
04069     0xD5D0, 0xC7E6, 0xD5D1, 0xC246, 0xD5D2, 0xC7E7, 0xD5D3, 0xC247,
04070     0xD5D4, 0xC248, 0xD5D5, 0xC249, 0xD5D6, 0xC24A, 0xD5D7, 0xC24B,
04071     0xD5D8, 0xC7E8, 0xD5D9, 0xC7E9, 0xD5DA, 0xC24C, 0xD5DB, 0xC7EA,
04072     0xD5DC, 0xC24D, 0xD5DD, 0xC7EB, 0xD5DE, 0xC24E, 0xD5DF, 0xC24F,
04073     0xD5E0, 0xC250, 0xD5E1, 0xC251, 0xD5E2, 0xC252, 0xD5E3, 0xC253,
04074     0xD5E4, 0xC7EC, 0xD5E5, 0xC7ED, 0xD5E6, 0xC254, 0xD5E7, 0xC255,
04075     0xD5E8, 0xC7EE, 0xD5E9, 0xC256, 0xD5EA, 0xC257, 0xD5EB, 0xC258,
04076     0xD5EC, 0xC7EF, 0xD5ED, 0xC259, 0xD5EE, 0xC25A, 0xD5EF, 0xC261,
04077     0xD5F0, 0xC262, 0xD5F1, 0xC263, 0xD5F2, 0xC264, 0xD5F3, 0xC265,
04078     0xD5F4, 0xC7F0, 0xD5F5, 0xC7F1, 0xD5F6, 0xC266, 0xD5F7, 0xC7F2,
04079     0xD5F8, 0xC267, 0xD5F9, 0xC7F3, 0xD5FA, 0xC268, 0xD5FB, 0xC269,
04080     0xD5FC, 0xC26A, 0xD5FD, 0xC26B, 0xD5FE, 0xC26C, 0xD5FF, 0xC26D,
04081     0xD600, 0xC7F4, 0xD601, 0xC7F5, 0xD602, 0xC26E, 0xD603, 0xC26F,
04082     0xD604, 0xC7F6, 0xD605, 0xC270, 0xD606, 0xC271, 0xD607, 0xC272,
04083     0xD608, 0xC7F7, 0xD609, 0xC273, 0xD60A, 0xC274, 0xD60B, 0xC275,
04084     0xD60C, 0xC276, 0xD60D, 0xC277, 0xD60E, 0xC278, 0xD60F, 0xC279,
04085     0xD610, 0xC7F8, 0xD611, 0xC7F9, 0xD612, 0xC27A, 0xD613, 0xC7FA,
04086     0xD614, 0xC7FB, 0xD615, 0xC7FC, 0xD616, 0xC281, 0xD617, 0xC282,
04087     0xD618, 0xC283, 0xD619, 0xC284, 0xD61A, 0xC285, 0xD61B, 0xC286,
04088     0xD61C, 0xC7FD, 0xD61D, 0xC287, 0xD61E, 0xC288, 0xD61F, 0xC289,
04089     0xD620, 0xC7FE, 0xD621, 0xC28A, 0xD622, 0xC28B, 0xD623, 0xC28C,
04090     0xD624, 0xC8A1, 0xD625, 0xC28D, 0xD626, 0xC28E, 0xD627, 0xC28F,
04091     0xD628, 0xC290, 0xD629, 0xC291, 0xD62A, 0xC292, 0xD62B, 0xC293,
04092     0xD62C, 0xC294, 0xD62D, 0xC8A2, 0xD62E, 0xC295, 0xD62F, 0xC296,
04093     0xD630, 0xC297, 0xD631, 0xC298, 0xD632, 0xC299, 0xD633, 0xC29A,
04094     0xD634, 0xC29B, 0xD635, 0xC29C, 0xD636, 0xC29D, 0xD637, 0xC29E,
04095     0xD638, 0xC8A3, 0xD639, 0xC8A4, 0xD63A, 0xC29F, 0xD63B, 0xC2A0,
04096     0xD63C, 0xC8A5, 0xD63D, 0xC341, 0xD63E, 0xC342, 0xD63F, 0xC343,
04097     0xD640, 0xC8A6, 0xD641, 0xC344, 0xD642, 0xC345, 0xD643, 0xC346,
04098     0xD644, 0xC347, 0xD645, 0xC8A7, 0xD646, 0xC348, 0xD647, 0xC349,
04099     0xD648, 0xC8A8, 0xD649, 0xC8A9, 0xD64A, 0xC34A, 0xD64B, 0xC8AA,
04100     0xD64C, 0xC34B, 0xD64D, 0xC8AB, 0xD64E, 0xC34C, 0xD64F, 0xC34D,
04101     0xD650, 0xC34E, 0xD651, 0xC8AC, 0xD652, 0xC34F, 0xD653, 0xC350,
04102     0xD654, 0xC8AD, 0xD655, 0xC8AE, 0xD656, 0xC351, 0xD657, 0xC352,
04103     0xD658, 0xC8AF, 0xD659, 0xC353, 0xD65A, 0xC354, 0xD65B, 0xC355,
04104     0xD65C, 0xC8B0, 0xD65D, 0xC356, 0xD65E, 0xC357, 0xD65F, 0xC358,
04105     0xD660, 0xC359, 0xD661, 0xC35A, 0xD662, 0xC361, 0xD663, 0xC362,
04106     0xD664, 0xC363, 0xD665, 0xC364, 0xD666, 0xC365, 0xD667, 0xC8B1,
04107     0xD668, 0xC366, 0xD669, 0xC8B2, 0xD66A, 0xC367, 0xD66B, 0xC368,
04108     0xD66C, 0xC369, 0xD66D, 0xC36A, 0xD66E, 0xC36B, 0xD66F, 0xC36C,
04109     0xD670, 0xC8B3, 0xD671, 0xC8B4, 0xD672, 0xC36D, 0xD673, 0xC36E,
04110     0xD674, 0xC8B5, 0xD675, 0xC36F, 0xD676, 0xC370, 0xD677, 0xC371,
04111     0xD678, 0xC372, 0xD679, 0xC373, 0xD67A, 0xC374, 0xD67B, 0xC375,
04112     0xD67C, 0xC376, 0xD67D, 0xC377, 0xD67E, 0xC378, 0xD67F, 0xC379,
04113     0xD680, 0xC37A, 0xD681, 0xC381, 0xD682, 0xC382, 0xD683, 0xC8B6,
04114     0xD684, 0xC383, 0xD685, 0xC8B7, 0xD686, 0xC384, 0xD687, 0xC385,
04115     0xD688, 0xC386, 0xD689, 0xC387, 0xD68A, 0xC388, 0xD68B, 0xC389,
04116     0xD68C, 0xC8B8, 0xD68D, 0xC8B9, 0xD68E, 0xC38A, 0xD68F, 0xC38B,
04117     0xD690, 0xC8BA, 0xD691, 0xC38C, 0xD692, 0xC38D, 0xD693, 0xC38E,
04118     0xD694, 0xC8BB, 0xD695, 0xC38F, 0xD696, 0xC390, 0xD697, 0xC391,
04119     0xD698, 0xC392, 0xD699, 0xC393, 0xD69A, 0xC394, 0xD69B, 0xC395,
04120     0xD69C, 0xC396, 0xD69D, 0xC8BC, 0xD69E, 0xC397, 0xD69F, 0xC8BD,
04121     0xD6A0, 0xC398, 0xD6A1, 0xC8BE, 0xD6A2, 0xC399, 0xD6A3, 0xC39A,
04122     0xD6A4, 0xC39B, 0xD6A5, 0xC39C, 0xD6A6, 0xC39D, 0xD6A7, 0xC39E,
04123     0xD6A8, 0xC8BF, 0xD6A9, 0xC39F, 0xD6AA, 0xC3A0, 0xD6AB, 0xC441,
04124     0xD6AC, 0xC8C0, 0xD6AD, 0xC442, 0xD6AE, 0xC443, 0xD6AF, 0xC444,
04125     0xD6B0, 0xC8C1, 0xD6B1, 0xC445, 0xD6B2, 0xC446, 0xD6B3, 0xC447,
04126     0xD6B4, 0xC448, 0xD6B5, 0xC449, 0xD6B6, 0xC44A, 0xD6B7, 0xC44B,
04127     0xD6B8, 0xC44C, 0xD6B9, 0xC8C2, 0xD6BA, 0xC44D, 0xD6BB, 0xC8C3,
04128     0xD6BC, 0xC44E, 0xD6BD, 0xC44F, 0xD6BE, 0xC450, 0xD6BF, 0xC451,
04129     0xD6C0, 0xC452, 0xD6C1, 0xC453, 0xD6C2, 0xC454, 0xD6C3, 0xC455,
04130     0xD6C4, 0xC8C4, 0xD6C5, 0xC8C5, 0xD6C6, 0xC456, 0xD6C7, 0xC457,
04131     0xD6C8, 0xC8C6, 0xD6C9, 0xC458, 0xD6CA, 0xC459, 0xD6CB, 0xC45A,
04132     0xD6CC, 0xC8C7, 0xD6CD, 0xC461, 0xD6CE, 0xC462, 0xD6CF, 0xC463,
04133     0xD6D0, 0xC464, 0xD6D1, 0xC8C8, 0xD6D2, 0xC465, 0xD6D3, 0xC466,
04134     0xD6D4, 0xC8C9, 0xD6D5, 0xC467, 0xD6D6, 0xC468, 0xD6D7, 0xC8CA,
04135     0xD6D8, 0xC469, 0xD6D9, 0xC8CB, 0xD6DA, 0xC46A, 0xD6DB, 0xC46B,
04136     0xD6DC, 0xC46C, 0xD6DD, 0xC46D, 0xD6DE, 0xC46E, 0xD6DF, 0xC46F,
04137     0xD6E0, 0xC8CC, 0xD6E1, 0xC470, 0xD6E2, 0xC471, 0xD6E3, 0xC472,
04138     0xD6E4, 0xC8CD, 0xD6E5, 0xC473, 0xD6E6, 0xC474, 0xD6E7, 0xC475,
04139     0xD6E8, 0xC8CE, 0xD6E9, 0xC476, 0xD6EA, 0xC477, 0xD6EB, 0xC478,
04140     0xD6EC, 0xC479, 0xD6ED, 0xC47A, 0xD6EE, 0xC481, 0xD6EF, 0xC482,
04141     0xD6F0, 0xC8CF, 0xD6F1, 0xC483, 0xD6F2, 0xC484, 0xD6F3, 0xC485,
04142     0xD6F4, 0xC486, 0xD6F5, 0xC8D0, 0xD6F6, 0xC487, 0xD6F7, 0xC488,
04143     0xD6F8, 0xC489, 0xD6F9, 0xC48A, 0xD6FA, 0xC48B, 0xD6FB, 0xC48C,
04144     0xD6FC, 0xC8D1, 0xD6FD, 0xC8D2, 0xD6FE, 0xC48D, 0xD6FF, 0xC48E,
04145     0xD700, 0xC8D3, 0xD701, 0xC48F, 0xD702, 0xC490, 0xD703, 0xC491,
04146     0xD704, 0xC8D4, 0xD705, 0xC492, 0xD706, 0xC493, 0xD707, 0xC494,
04147     0xD708, 0xC495, 0xD709, 0xC496, 0xD70A, 0xC497, 0xD70B, 0xC498,
04148     0xD70C, 0xC499, 0xD70D, 0xC49A, 0xD70E, 0xC49B, 0xD70F, 0xC49C,
04149     0xD710, 0xC49D, 0xD711, 0xC8D5, 0xD712, 0xC49E, 0xD713, 0xC49F,
04150     0xD714, 0xC4A0, 0xD715, 0xC541, 0xD716, 0xC542, 0xD717, 0xC543,
04151     0xD718, 0xC8D6, 0xD719, 0xC8D7, 0xD71A, 0xC544, 0xD71B, 0xC545,
04152     0xD71C, 0xC8D8, 0xD71D, 0xC546, 0xD71E, 0xC547, 0xD71F, 0xC548,
04153     0xD720, 0xC8D9, 0xD721, 0xC549, 0xD722, 0xC54A, 0xD723, 0xC54B,
04154     0xD724, 0xC54C, 0xD725, 0xC54D, 0xD726, 0xC54E, 0xD727, 0xC54F,
04155     0xD728, 0xC8DA, 0xD729, 0xC8DB, 0xD72A, 0xC550, 0xD72B, 0xC8DC,
04156     0xD72C, 0xC551, 0xD72D, 0xC8DD, 0xD72E, 0xC552, 0xD72F, 0xC553,
04157     0xD730, 0xC554, 0xD731, 0xC555, 0xD732, 0xC556, 0xD733, 0xC557,
04158     0xD734, 0xC8DE, 0xD735, 0xC8DF, 0xD736, 0xC558, 0xD737, 0xC559,
04159     0xD738, 0xC8E0, 0xD739, 0xC55A, 0xD73A, 0xC561, 0xD73B, 0xC562,
04160     0xD73C, 0xC8E1, 0xD73D, 0xC563, 0xD73E, 0xC564, 0xD73F, 0xC565,
04161     0xD740, 0xC566, 0xD741, 0xC567, 0xD742, 0xC568, 0xD743, 0xC569,
04162     0xD744, 0xC8E2, 0xD745, 0xC56A, 0xD746, 0xC56B, 0xD747, 0xC8E3,
04163     0xD748, 0xC56C, 0xD749, 0xC8E4, 0xD74A, 0xC56D, 0xD74B, 0xC56E,
04164     0xD74C, 0xC56F, 0xD74D, 0xC570, 0xD74E, 0xC571, 0xD74F, 0xC572,
04165     0xD750, 0xC8E5, 0xD751, 0xC8E6, 0xD752, 0xC573, 0xD753, 0xC574,
04166     0xD754, 0xC8E7, 0xD755, 0xC575, 0xD756, 0xC8E8, 0xD757, 0xC8E9,
04167     0xD758, 0xC8EA, 0xD759, 0xC8EB, 0xD75A, 0xC576, 0xD75B, 0xC577,
04168     0xD75C, 0xC578, 0xD75D, 0xC579, 0xD75E, 0xC57A, 0xD75F, 0xC581,
04169     0xD760, 0xC8EC, 0xD761, 0xC8ED, 0xD762, 0xC582, 0xD763, 0xC8EE,
04170     0xD764, 0xC583, 0xD765, 0xC8EF, 0xD766, 0xC584, 0xD767, 0xC585,
04171     0xD768, 0xC586, 0xD769, 0xC8F0, 0xD76A, 0xC587, 0xD76B, 0xC588,
04172     0xD76C, 0xC8F1, 0xD76D, 0xC589, 0xD76E, 0xC58A, 0xD76F, 0xC58B,
04173     0xD770, 0xC8F2, 0xD771, 0xC58C, 0xD772, 0xC58D, 0xD773, 0xC58E,
04174     0xD774, 0xC8F3, 0xD775, 0xC58F, 0xD776, 0xC590, 0xD777, 0xC591,
04175     0xD778, 0xC592, 0xD779, 0xC593, 0xD77A, 0xC594, 0xD77B, 0xC595,
04176     0xD77C, 0xC8F4, 0xD77D, 0xC8F5, 0xD77E, 0xC596, 0xD77F, 0xC597,
04177     0xD780, 0xC598, 0xD781, 0xC8F6, 0xD782, 0xC599, 0xD783, 0xC59A,
04178     0xD784, 0xC59B, 0xD785, 0xC59C, 0xD786, 0xC59D, 0xD787, 0xC59E,
04179     0xD788, 0xC8F7, 0xD789, 0xC8F8, 0xD78A, 0xC59F, 0xD78B, 0xC5A0,
04180     0xD78C, 0xC8F9, 0xD78D, 0xC641, 0xD78E, 0xC642, 0xD78F, 0xC643,
04181     0xD790, 0xC8FA, 0xD791, 0xC644, 0xD792, 0xC645, 0xD793, 0xC646,
04182     0xD794, 0xC647, 0xD795, 0xC648, 0xD796, 0xC649, 0xD797, 0xC64A,
04183     0xD798, 0xC8FB, 0xD799, 0xC8FC, 0xD79A, 0xC64B, 0xD79B, 0xC8FD,
04184     0xD79C, 0xC64C, 0xD79D, 0xC8FE, 0xD79E, 0xC64D, 0xD79F, 0xC64E,
04185     0xD7A0, 0xC64F, 0xD7A1, 0xC650, 0xD7A2, 0xC651, 0xD7A3, 0xC652,
04186     0xF900, 0xCBD0, 0xF901, 0xCBD6, 0xF902, 0xCBE7, 0xF903, 0xCDCF,
04187     0xF904, 0xCDE8, 0xF905, 0xCEAD, 0xF906, 0xCFFB, 0xF907, 0xD0A2,
04188     0xF908, 0xD0B8, 0xF909, 0xD0D0, 0xF90A, 0xD0DD, 0xF90B, 0xD1D4,
04189     0xF90C, 0xD1D5, 0xF90D, 0xD1D8, 0xF90E, 0xD1DB, 0xF90F, 0xD1DC,
04190     0xF910, 0xD1DD, 0xF911, 0xD1DE, 0xF912, 0xD1DF, 0xF913, 0xD1E0,
04191     0xF914, 0xD1E2, 0xF915, 0xD1E3, 0xF916, 0xD1E4, 0xF917, 0xD1E5,
04192     0xF918, 0xD1E6, 0xF919, 0xD1E8, 0xF91A, 0xD1E9, 0xF91B, 0xD1EA,
04193     0xF91C, 0xD1EB, 0xF91D, 0xD1ED, 0xF91E, 0xD1EF, 0xF91F, 0xD1F0,
04194     0xF920, 0xD1F2, 0xF921, 0xD1F6, 0xF922, 0xD1FA, 0xF923, 0xD1FC,
04195     0xF924, 0xD1FD, 0xF925, 0xD1FE, 0xF926, 0xD2A2, 0xF927, 0xD2A3,
04196     0xF928, 0xD2A7, 0xF929, 0xD2A8, 0xF92A, 0xD2A9, 0xF92B, 0xD2AA,
04197     0xF92C, 0xD2AB, 0xF92D, 0xD2AD, 0xF92E, 0xD2B2, 0xF92F, 0xD2BE,
04198     0xF930, 0xD2C2, 0xF931, 0xD2C3, 0xF932, 0xD2C4, 0xF933, 0xD2C6,
04199     0xF934, 0xD2C7, 0xF935, 0xD2C8, 0xF936, 0xD2C9, 0xF937, 0xD2CA,
04200     0xF938, 0xD2CB, 0xF939, 0xD2CD, 0xF93A, 0xD2CE, 0xF93B, 0xD2CF,
04201     0xF93C, 0xD2D0, 0xF93D, 0xD2D1, 0xF93E, 0xD2D2, 0xF93F, 0xD2D3,
04202     0xF940, 0xD2D4, 0xF941, 0xD2D5, 0xF942, 0xD2D6, 0xF943, 0xD2D7,
04203     0xF944, 0xD2D9, 0xF945, 0xD2DA, 0xF946, 0xD2DE, 0xF947, 0xD2DF,
04204     0xF948, 0xD2E1, 0xF949, 0xD2E2, 0xF94A, 0xD2E4, 0xF94B, 0xD2E5,
04205     0xF94C, 0xD2E6, 0xF94D, 0xD2E7, 0xF94E, 0xD2E8, 0xF94F, 0xD2E9,
04206     0xF950, 0xD2EA, 0xF951, 0xD2EB, 0xF952, 0xD2F0, 0xF953, 0xD2F1,
04207     0xF954, 0xD2F2, 0xF955, 0xD2F3, 0xF956, 0xD2F4, 0xF957, 0xD2F5,
04208     0xF958, 0xD2F7, 0xF959, 0xD2F8, 0xF95A, 0xD4E6, 0xF95B, 0xD4FC,
04209     0xF95C, 0xD5A5, 0xF95D, 0xD5AB, 0xF95E, 0xD5AE, 0xF95F, 0xD6B8,
04210     0xF960, 0xD6CD, 0xF961, 0xD7CB, 0xF962, 0xD7E4, 0xF963, 0xDBC5,
04211     0xF964, 0xDBE4, 0xF965, 0xDCA5, 0xF966, 0xDDA5, 0xF967, 0xDDD5,
04212     0xF968, 0xDDF4, 0xF969, 0xDEFC, 0xF96A, 0xDEFE, 0xF96B, 0xDFB3,
04213     0xF96C, 0xDFE1, 0xF96D, 0xDFE8, 0xF96E, 0xE0F1, 0xF96F, 0xE1AD,
04214     0xF970, 0xE1ED, 0xF971, 0xE3F5, 0xF972, 0xE4A1, 0xF973, 0xE4A9,
04215     0xF974, 0xE5AE, 0xF975, 0xE5B1, 0xF976, 0xE5B2, 0xF977, 0xE5B9,
04216     0xF978, 0xE5BB, 0xF979, 0xE5BC, 0xF97A, 0xE5C4, 0xF97B, 0xE5CE,
04217     0xF97C, 0xE5D0, 0xF97D, 0xE5D2, 0xF97E, 0xE5D6, 0xF97F, 0xE5FA,
04218     0xF980, 0xE5FB, 0xF981, 0xE5FC, 0xF982, 0xE5FE, 0xF983, 0xE6A1,
04219     0xF984, 0xE6A4, 0xF985, 0xE6A7, 0xF986, 0xE6AD, 0xF987, 0xE6AF,
04220     0xF988, 0xE6B0, 0xF989, 0xE6B1, 0xF98A, 0xE6B3, 0xF98B, 0xE6B7,
04221     0xF98C, 0xE6B8, 0xF98D, 0xE6BC, 0xF98E, 0xE6C4, 0xF98F, 0xE6C6,
04222     0xF990, 0xE6C7, 0xF991, 0xE6CA, 0xF992, 0xE6D2, 0xF993, 0xE6D6,
04223     0xF994, 0xE6D9, 0xF995, 0xE6DC, 0xF996, 0xE6DF, 0xF997, 0xE6E1,
04224     0xF998, 0xE6E4, 0xF999, 0xE6E5, 0xF99A, 0xE6E6, 0xF99B, 0xE6E8,
04225     0xF99C, 0xE6EA, 0xF99D, 0xE6EB, 0xF99E, 0xE6EC, 0xF99F, 0xE6EF,
04226     0xF9A0, 0xE6F1, 0xF9A1, 0xE6F2, 0xF9A2, 0xE6F5, 0xF9A3, 0xE6F6,
04227     0xF9A4, 0xE6F7, 0xF9A5, 0xE6F9, 0xF9A6, 0xE7A1, 0xF9A7, 0xE7A6,
04228     0xF9A8, 0xE7A9, 0xF9A9, 0xE7AA, 0xF9AA, 0xE7AC, 0xF9AB, 0xE7AD,
04229     0xF9AC, 0xE7B0, 0xF9AD, 0xE7BF, 0xF9AE, 0xE7C1, 0xF9AF, 0xE7C6,
04230     0xF9B0, 0xE7C7, 0xF9B1, 0xE7CB, 0xF9B2, 0xE7CD, 0xF9B3, 0xE7CF,
04231     0xF9B4, 0xE7D0, 0xF9B5, 0xE7D3, 0xF9B6, 0xE7DF, 0xF9B7, 0xE7E4,
04232     0xF9B8, 0xE7E6, 0xF9B9, 0xE7F7, 0xF9BA, 0xE8E7, 0xF9BB, 0xE8E8,
04233     0xF9BC, 0xE8F0, 0xF9BD, 0xE8F1, 0xF9BE, 0xE8F7, 0xF9BF, 0xE8F9,
04234     0xF9C0, 0xE8FB, 0xF9C1, 0xE8FE, 0xF9C2, 0xE9A7, 0xF9C3, 0xE9AC,
04235     0xF9C4, 0xE9CC, 0xF9C5, 0xE9F7, 0xF9C6, 0xEAC1, 0xF9C7, 0xEAE5,
04236     0xF9C8, 0xEAF4, 0xF9C9, 0xEAF7, 0xF9CA, 0xEAFC, 0xF9CB, 0xEAFE,
04237     0xF9CC, 0xEBA4, 0xF9CD, 0xEBA7, 0xF9CE, 0xEBA9, 0xF9CF, 0xEBAA,
04238     0xF9D0, 0xEBBA, 0xF9D1, 0xEBBB, 0xF9D2, 0xEBBD, 0xF9D3, 0xEBC1,
04239     0xF9D4, 0xEBC2, 0xF9D5, 0xEBC6, 0xF9D6, 0xEBC7, 0xF9D7, 0xEBCC,
04240     0xF9D8, 0xEBCF, 0xF9D9, 0xEBD0, 0xF9DA, 0xEBD1, 0xF9DB, 0xEBD2,
04241     0xF9DC, 0xEBD8, 0xF9DD, 0xECA6, 0xF9DE, 0xECA7, 0xF9DF, 0xECAA,
04242     0xF9E0, 0xECAF, 0xF9E1, 0xECB0, 0xF9E2, 0xECB1, 0xF9E3, 0xECB2,
04243     0xF9E4, 0xECB5, 0xF9E5, 0xECB8, 0xF9E6, 0xECBA, 0xF9E7, 0xECC0,
04244     0xF9E8, 0xECC1, 0xF9E9, 0xECC5, 0xF9EA, 0xECC6, 0xF9EB, 0xECC9,
04245     0xF9EC, 0xECCA, 0xF9ED, 0xECD5, 0xF9EE, 0xECDD, 0xF9EF, 0xECDE,
04246     0xF9F0, 0xECE1, 0xF9F1, 0xECE4, 0xF9F2, 0xECE7, 0xF9F3, 0xECE8,
04247     0xF9F4, 0xECF7, 0xF9F5, 0xECF8, 0xF9F6, 0xECFA, 0xF9F7, 0xEDA1,
04248     0xF9F8, 0xEDA2, 0xF9F9, 0xEDA3, 0xF9FA, 0xEDEE, 0xF9FB, 0xEEDB,
04249     0xF9FC, 0xF2BD, 0xF9FD, 0xF2FA, 0xF9FE, 0xF3B1, 0xF9FF, 0xF4A7,
04250     0xFA00, 0xF4EE, 0xFA01, 0xF6F4, 0xFA02, 0xF6F6, 0xFA03, 0xF7B8,
04251     0xFA04, 0xF7C8, 0xFA05, 0xF7D3, 0xFA06, 0xF8DB, 0xFA07, 0xF8F0,
04252     0xFA08, 0xFAA1, 0xFA09, 0xFAA2, 0xFA0A, 0xFAE6, 0xFA0B, 0xFCA9,
04253     0xFF01, 0xA3A1, 0xFF02, 0xA3A2, 0xFF03, 0xA3A3, 0xFF04, 0xA3A4,
04254     0xFF05, 0xA3A5, 0xFF06, 0xA3A6, 0xFF07, 0xA3A7, 0xFF08, 0xA3A8,
04255     0xFF09, 0xA3A9, 0xFF0A, 0xA3AA, 0xFF0B, 0xA3AB, 0xFF0C, 0xA3AC,
04256     0xFF0D, 0xA3AD, 0xFF0E, 0xA3AE, 0xFF0F, 0xA3AF, 0xFF10, 0xA3B0,
04257     0xFF11, 0xA3B1, 0xFF12, 0xA3B2, 0xFF13, 0xA3B3, 0xFF14, 0xA3B4,
04258     0xFF15, 0xA3B5, 0xFF16, 0xA3B6, 0xFF17, 0xA3B7, 0xFF18, 0xA3B8,
04259     0xFF19, 0xA3B9, 0xFF1A, 0xA3BA, 0xFF1B, 0xA3BB, 0xFF1C, 0xA3BC,
04260     0xFF1D, 0xA3BD, 0xFF1E, 0xA3BE, 0xFF1F, 0xA3BF, 0xFF20, 0xA3C0,
04261     0xFF21, 0xA3C1, 0xFF22, 0xA3C2, 0xFF23, 0xA3C3, 0xFF24, 0xA3C4,
04262     0xFF25, 0xA3C5, 0xFF26, 0xA3C6, 0xFF27, 0xA3C7, 0xFF28, 0xA3C8,
04263     0xFF29, 0xA3C9, 0xFF2A, 0xA3CA, 0xFF2B, 0xA3CB, 0xFF2C, 0xA3CC,
04264     0xFF2D, 0xA3CD, 0xFF2E, 0xA3CE, 0xFF2F, 0xA3CF, 0xFF30, 0xA3D0,
04265     0xFF31, 0xA3D1, 0xFF32, 0xA3D2, 0xFF33, 0xA3D3, 0xFF34, 0xA3D4,
04266     0xFF35, 0xA3D5, 0xFF36, 0xA3D6, 0xFF37, 0xA3D7, 0xFF38, 0xA3D8,
04267     0xFF39, 0xA3D9, 0xFF3A, 0xA3DA, 0xFF3B, 0xA3DB, 0xFF3C, 0xA1AC,
04268     0xFF3D, 0xA3DD, 0xFF3E, 0xA3DE, 0xFF3F, 0xA3DF, 0xFF40, 0xA3E0,
04269     0xFF41, 0xA3E1, 0xFF42, 0xA3E2, 0xFF43, 0xA3E3, 0xFF44, 0xA3E4,
04270     0xFF45, 0xA3E5, 0xFF46, 0xA3E6, 0xFF47, 0xA3E7, 0xFF48, 0xA3E8,
04271     0xFF49, 0xA3E9, 0xFF4A, 0xA3EA, 0xFF4B, 0xA3EB, 0xFF4C, 0xA3EC,
04272     0xFF4D, 0xA3ED, 0xFF4E, 0xA3EE, 0xFF4F, 0xA3EF, 0xFF50, 0xA3F0,
04273     0xFF51, 0xA3F1, 0xFF52, 0xA3F2, 0xFF53, 0xA3F3, 0xFF54, 0xA3F4,
04274     0xFF55, 0xA3F5, 0xFF56, 0xA3F6, 0xFF57, 0xA3F7, 0xFF58, 0xA3F8,
04275     0xFF59, 0xA3F9, 0xFF5A, 0xA3FA, 0xFF5B, 0xA3FB, 0xFF5C, 0xA3FC,
04276     0xFF5D, 0xA3FD, 0xFF5E, 0xA2A6, 0xFFE0, 0xA1CB, 0xFFE1, 0xA1CC,
04277     0xFFE2, 0xA1FE, 0xFFE3, 0xA3FE, 0xFFE5, 0xA1CD, 0xFFE6, 0xA3DC,
04278     0, 0
04279 };
04280
04281 static
04282 const WCHAR oem2uni[] = {
04283 /*  OEM - Unicode,  OEM - Unicode,  OEM - Unicode,  OEM - Unicode */
04284     0x8141, 0xAC02, 0x8142, 0xAC03, 0x8143, 0xAC05, 0x8144, 0xAC06,
04285     0x8145, 0xAC0B, 0x8146, 0xAC0C, 0x8147, 0xAC0D, 0x8148, 0xAC0E,
04286     0x8149, 0xAC0F, 0x814A, 0xAC18, 0x814B, 0xAC1E, 0x814C, 0xAC1F,
04287     0x814D, 0xAC21, 0x814E, 0xAC22, 0x814F, 0xAC23, 0x8150, 0xAC25,
04288     0x8151, 0xAC26, 0x8152, 0xAC27, 0x8153, 0xAC28, 0x8154, 0xAC29,
04289     0x8155, 0xAC2A, 0x8156, 0xAC2B, 0x8157, 0xAC2E, 0x8158, 0xAC32,
04290     0x8159, 0xAC33, 0x815A, 0xAC34, 0x8161, 0xAC35, 0x8162, 0xAC36,
04291     0x8163, 0xAC37, 0x8164, 0xAC3A, 0x8165, 0xAC3B, 0x8166, 0xAC3D,
04292     0x8167, 0xAC3E, 0x8168, 0xAC3F, 0x8169, 0xAC41, 0x816A, 0xAC42,
04293     0x816B, 0xAC43, 0x816C, 0xAC44, 0x816D, 0xAC45, 0x816E, 0xAC46,
04294     0x816F, 0xAC47, 0x8170, 0xAC48, 0x8171, 0xAC49, 0x8172, 0xAC4A,
04295     0x8173, 0xAC4C, 0x8174, 0xAC4E, 0x8175, 0xAC4F, 0x8176, 0xAC50,
04296     0x8177, 0xAC51, 0x8178, 0xAC52, 0x8179, 0xAC53, 0x817A, 0xAC55,
04297     0x8181, 0xAC56, 0x8182, 0xAC57, 0x8183, 0xAC59, 0x8184, 0xAC5A,
04298     0x8185, 0xAC5B, 0x8186, 0xAC5D, 0x8187, 0xAC5E, 0x8188, 0xAC5F,
04299     0x8189, 0xAC60, 0x818A, 0xAC61, 0x818B, 0xAC62, 0x818C, 0xAC63,
04300     0x818D, 0xAC64, 0x818E, 0xAC65, 0x818F, 0xAC66, 0x8190, 0xAC67,
04301     0x8191, 0xAC68, 0x8192, 0xAC69, 0x8193, 0xAC6A, 0x8194, 0xAC6B,
04302     0x8195, 0xAC6C, 0x8196, 0xAC6D, 0x8197, 0xAC6E, 0x8198, 0xAC6F,
04303     0x8199, 0xAC72, 0x819A, 0xAC73, 0x819B, 0xAC75, 0x819C, 0xAC76,
04304     0x819D, 0xAC79, 0x819E, 0xAC7B, 0x819F, 0xAC7C, 0x81A0, 0xAC7D,
04305     0x81A1, 0xAC7E, 0x81A2, 0xAC7F, 0x81A3, 0xAC82, 0x81A4, 0xAC87,
04306     0x81A5, 0xAC88, 0x81A6, 0xAC8D, 0x81A7, 0xAC8E, 0x81A8, 0xAC8F,
04307     0x81A9, 0xAC91, 0x81AA, 0xAC92, 0x81AB, 0xAC93, 0x81AC, 0xAC95,
04308     0x81AD, 0xAC96, 0x81AE, 0xAC97, 0x81AF, 0xAC98, 0x81B0, 0xAC99,
04309     0x81B1, 0xAC9A, 0x81B2, 0xAC9B, 0x81B3, 0xAC9E, 0x81B4, 0xACA2,
04310     0x81B5, 0xACA3, 0x81B6, 0xACA4, 0x81B7, 0xACA5, 0x81B8, 0xACA6,
04311     0x81B9, 0xACA7, 0x81BA, 0xACAB, 0x81BB, 0xACAD, 0x81BC, 0xACAE,
04312     0x81BD, 0xACB1, 0x81BE, 0xACB2, 0x81BF, 0xACB3, 0x81C0, 0xACB4,
04313     0x81C1, 0xACB5, 0x81C2, 0xACB6, 0x81C3, 0xACB7, 0x81C4, 0xACBA,
04314     0x81C5, 0xACBE, 0x81C6, 0xACBF, 0x81C7, 0xACC0, 0x81C8, 0xACC2,
04315     0x81C9, 0xACC3, 0x81CA, 0xACC5, 0x81CB, 0xACC6, 0x81CC, 0xACC7,
04316     0x81CD, 0xACC9, 0x81CE, 0xACCA, 0x81CF, 0xACCB, 0x81D0, 0xACCD,
04317     0x81D1, 0xACCE, 0x81D2, 0xACCF, 0x81D3, 0xACD0, 0x81D4, 0xACD1,
04318     0x81D5, 0xACD2, 0x81D6, 0xACD3, 0x81D7, 0xACD4, 0x81D8, 0xACD6,
04319     0x81D9, 0xACD8, 0x81DA, 0xACD9, 0x81DB, 0xACDA, 0x81DC, 0xACDB,
04320     0x81DD, 0xACDC, 0x81DE, 0xACDD, 0x81DF, 0xACDE, 0x81E0, 0xACDF,
04321     0x81E1, 0xACE2, 0x81E2, 0xACE3, 0x81E3, 0xACE5, 0x81E4, 0xACE6,
04322     0x81E5, 0xACE9, 0x81E6, 0xACEB, 0x81E7, 0xACED, 0x81E8, 0xACEE,
04323     0x81E9, 0xACF2, 0x81EA, 0xACF4, 0x81EB, 0xACF7, 0x81EC, 0xACF8,
04324     0x81ED, 0xACF9, 0x81EE, 0xACFA, 0x81EF, 0xACFB, 0x81F0, 0xACFE,
04325     0x81F1, 0xACFF, 0x81F2, 0xAD01, 0x81F3, 0xAD02, 0x81F4, 0xAD03,
04326     0x81F5, 0xAD05, 0x81F6, 0xAD07, 0x81F7, 0xAD08, 0x81F8, 0xAD09,
04327     0x81F9, 0xAD0A, 0x81FA, 0xAD0B, 0x81FB, 0xAD0E, 0x81FC, 0xAD10,
04328     0x81FD, 0xAD12, 0x81FE, 0xAD13, 0x8241, 0xAD14, 0x8242, 0xAD15,
04329     0x8243, 0xAD16, 0x8244, 0xAD17, 0x8245, 0xAD19, 0x8246, 0xAD1A,
04330     0x8247, 0xAD1B, 0x8248, 0xAD1D, 0x8249, 0xAD1E, 0x824A, 0xAD1F,
04331     0x824B, 0xAD21, 0x824C, 0xAD22, 0x824D, 0xAD23, 0x824E, 0xAD24,
04332     0x824F, 0xAD25, 0x8250, 0xAD26, 0x8251, 0xAD27, 0x8252, 0xAD28,
04333     0x8253, 0xAD2A, 0x8254, 0xAD2B, 0x8255, 0xAD2E, 0x8256, 0xAD2F,
04334     0x8257, 0xAD30, 0x8258, 0xAD31, 0x8259, 0xAD32, 0x825A, 0xAD33,
04335     0x8261, 0xAD36, 0x8262, 0xAD37, 0x8263, 0xAD39, 0x8264, 0xAD3A,
04336     0x8265, 0xAD3B, 0x8266, 0xAD3D, 0x8267, 0xAD3E, 0x8268, 0xAD3F,
04337     0x8269, 0xAD40, 0x826A, 0xAD41, 0x826B, 0xAD42, 0x826C, 0xAD43,
04338     0x826D, 0xAD46, 0x826E, 0xAD48, 0x826F, 0xAD4A, 0x8270, 0xAD4B,
04339     0x8271, 0xAD4C, 0x8272, 0xAD4D, 0x8273, 0xAD4E, 0x8274, 0xAD4F,
04340     0x8275, 0xAD51, 0x8276, 0xAD52, 0x8277, 0xAD53, 0x8278, 0xAD55,
04341     0x8279, 0xAD56, 0x827A, 0xAD57, 0x8281, 0xAD59, 0x8282, 0xAD5A,
04342     0x8283, 0xAD5B, 0x8284, 0xAD5C, 0x8285, 0xAD5D, 0x8286, 0xAD5E,
04343     0x8287, 0xAD5F, 0x8288, 0xAD60, 0x8289, 0xAD62, 0x828A, 0xAD64,
04344     0x828B, 0xAD65, 0x828C, 0xAD66, 0x828D, 0xAD67, 0x828E, 0xAD68,
04345     0x828F, 0xAD69, 0x8290, 0xAD6A, 0x8291, 0xAD6B, 0x8292, 0xAD6E,
04346     0x8293, 0xAD6F, 0x8294, 0xAD71, 0x8295, 0xAD72, 0x8296, 0xAD77,
04347     0x8297, 0xAD78, 0x8298, 0xAD79, 0x8299, 0xAD7A, 0x829A, 0xAD7E,
04348     0x829B, 0xAD80, 0x829C, 0xAD83, 0x829D, 0xAD84, 0x829E, 0xAD85,
04349     0x829F, 0xAD86, 0x82A0, 0xAD87, 0x82A1, 0xAD8A, 0x82A2, 0xAD8B,
04350     0x82A3, 0xAD8D, 0x82A4, 0xAD8E, 0x82A5, 0xAD8F, 0x82A6, 0xAD91,
04351     0x82A7, 0xAD92, 0x82A8, 0xAD93, 0x82A9, 0xAD94, 0x82AA, 0xAD95,
04352     0x82AB, 0xAD96, 0x82AC, 0xAD97, 0x82AD, 0xAD98, 0x82AE, 0xAD99,
04353     0x82AF, 0xAD9A, 0x82B0, 0xAD9B, 0x82B1, 0xAD9E, 0x82B2, 0xAD9F,
04354     0x82B3, 0xADA0, 0x82B4, 0xADA1, 0x82B5, 0xADA2, 0x82B6, 0xADA3,
04355     0x82B7, 0xADA5, 0x82B8, 0xADA6, 0x82B9, 0xADA7, 0x82BA, 0xADA8,
04356     0x82BB, 0xADA9, 0x82BC, 0xADAA, 0x82BD, 0xADAB, 0x82BE, 0xADAC,
04357     0x82BF, 0xADAD, 0x82C0, 0xADAE, 0x82C1, 0xADAF, 0x82C2, 0xADB0,
04358     0x82C3, 0xADB1, 0x82C4, 0xADB2, 0x82C5, 0xADB3, 0x82C6, 0xADB4,
04359     0x82C7, 0xADB5, 0x82C8, 0xADB6, 0x82C9, 0xADB8, 0x82CA, 0xADB9,
04360     0x82CB, 0xADBA, 0x82CC, 0xADBB, 0x82CD, 0xADBC, 0x82CE, 0xADBD,
04361     0x82CF, 0xADBE, 0x82D0, 0xADBF, 0x82D1, 0xADC2, 0x82D2, 0xADC3,
04362     0x82D3, 0xADC5, 0x82D4, 0xADC6, 0x82D5, 0xADC7, 0x82D6, 0xADC9,
04363     0x82D7, 0xADCA, 0x82D8, 0xADCB, 0x82D9, 0xADCC, 0x82DA, 0xADCD,
04364     0x82DB, 0xADCE, 0x82DC, 0xADCF, 0x82DD, 0xADD2, 0x82DE, 0xADD4,
04365     0x82DF, 0xADD5, 0x82E0, 0xADD6, 0x82E1, 0xADD7, 0x82E2, 0xADD8,
04366     0x82E3, 0xADD9, 0x82E4, 0xADDA, 0x82E5, 0xADDB, 0x82E6, 0xADDD,
04367     0x82E7, 0xADDE, 0x82E8, 0xADDF, 0x82E9, 0xADE1, 0x82EA, 0xADE2,
04368     0x82EB, 0xADE3, 0x82EC, 0xADE5, 0x82ED, 0xADE6, 0x82EE, 0xADE7,
04369     0x82EF, 0xADE8, 0x82F0, 0xADE9, 0x82F1, 0xADEA, 0x82F2, 0xADEB,
04370     0x82F3, 0xADEC, 0x82F4, 0xADED, 0x82F5, 0xADEE, 0x82F6, 0xADEF,
04371     0x82F7, 0xADF0, 0x82F8, 0xADF1, 0x82F9, 0xADF2, 0x82FA, 0xADF3,
04372     0x82FB, 0xADF4, 0x82FC, 0xADF5, 0x82FD, 0xADF6, 0x82FE, 0xADF7,
04373     0x8341, 0xADFA, 0x8342, 0xADFB, 0x8343, 0xADFD, 0x8344, 0xADFE,
04374     0x8345, 0xAE02, 0x8346, 0xAE03, 0x8347, 0xAE04, 0x8348, 0xAE05,
04375     0x8349, 0xAE06, 0x834A, 0xAE07, 0x834B, 0xAE0A, 0x834C, 0xAE0C,
04376     0x834D, 0xAE0E, 0x834E, 0xAE0F, 0x834F, 0xAE10, 0x8350, 0xAE11,
04377     0x8351, 0xAE12, 0x8352, 0xAE13, 0x8353, 0xAE15, 0x8354, 0xAE16,
04378     0x8355, 0xAE17, 0x8356, 0xAE18, 0x8357, 0xAE19, 0x8358, 0xAE1A,
04379     0x8359, 0xAE1B, 0x835A, 0xAE1C, 0x8361, 0xAE1D, 0x8362, 0xAE1E,
04380     0x8363, 0xAE1F, 0x8364, 0xAE20, 0x8365, 0xAE21, 0x8366, 0xAE22,
04381     0x8367, 0xAE23, 0x8368, 0xAE24, 0x8369, 0xAE25, 0x836A, 0xAE26,
04382     0x836B, 0xAE27, 0x836C, 0xAE28, 0x836D, 0xAE29, 0x836E, 0xAE2A,
04383     0x836F, 0xAE2B, 0x8370, 0xAE2C, 0x8371, 0xAE2D, 0x8372, 0xAE2E,
04384     0x8373, 0xAE2F, 0x8374, 0xAE32, 0x8375, 0xAE33, 0x8376, 0xAE35,
04385     0x8377, 0xAE36, 0x8378, 0xAE39, 0x8379, 0xAE3B, 0x837A, 0xAE3C,
04386     0x8381, 0xAE3D, 0x8382, 0xAE3E, 0x8383, 0xAE3F, 0x8384, 0xAE42,
04387     0x8385, 0xAE44, 0x8386, 0xAE47, 0x8387, 0xAE48, 0x8388, 0xAE49,
04388     0x8389, 0xAE4B, 0x838A, 0xAE4F, 0x838B, 0xAE51, 0x838C, 0xAE52,
04389     0x838D, 0xAE53, 0x838E, 0xAE55, 0x838F, 0xAE57, 0x8390, 0xAE58,
04390     0x8391, 0xAE59, 0x8392, 0xAE5A, 0x8393, 0xAE5B, 0x8394, 0xAE5E,
04391     0x8395, 0xAE62, 0x8396, 0xAE63, 0x8397, 0xAE64, 0x8398, 0xAE66,
04392     0x8399, 0xAE67, 0x839A, 0xAE6A, 0x839B, 0xAE6B, 0x839C, 0xAE6D,
04393     0x839D, 0xAE6E, 0x839E, 0xAE6F, 0x839F, 0xAE71, 0x83A0, 0xAE72,
04394     0x83A1, 0xAE73, 0x83A2, 0xAE74, 0x83A3, 0xAE75, 0x83A4, 0xAE76,
04395     0x83A5, 0xAE77, 0x83A6, 0xAE7A, 0x83A7, 0xAE7E, 0x83A8, 0xAE7F,
04396     0x83A9, 0xAE80, 0x83AA, 0xAE81, 0x83AB, 0xAE82, 0x83AC, 0xAE83,
04397     0x83AD, 0xAE86, 0x83AE, 0xAE87, 0x83AF, 0xAE88, 0x83B0, 0xAE89,
04398     0x83B1, 0xAE8A, 0x83B2, 0xAE8B, 0x83B3, 0xAE8D, 0x83B4, 0xAE8E,
04399     0x83B5, 0xAE8F, 0x83B6, 0xAE90, 0x83B7, 0xAE91, 0x83B8, 0xAE92,
04400     0x83B9, 0xAE93, 0x83BA, 0xAE94, 0x83BB, 0xAE95, 0x83BC, 0xAE96,
04401     0x83BD, 0xAE97, 0x83BE, 0xAE98, 0x83BF, 0xAE99, 0x83C0, 0xAE9A,
04402     0x83C1, 0xAE9B, 0x83C2, 0xAE9C, 0x83C3, 0xAE9D, 0x83C4, 0xAE9E,
04403     0x83C5, 0xAE9F, 0x83C6, 0xAEA0, 0x83C7, 0xAEA1, 0x83C8, 0xAEA2,
04404     0x83C9, 0xAEA3, 0x83CA, 0xAEA4, 0x83CB, 0xAEA5, 0x83CC, 0xAEA6,
04405     0x83CD, 0xAEA7, 0x83CE, 0xAEA8, 0x83CF, 0xAEA9, 0x83D0, 0xAEAA,
04406     0x83D1, 0xAEAB, 0x83D2, 0xAEAC, 0x83D3, 0xAEAD, 0x83D4, 0xAEAE,
04407     0x83D5, 0xAEAF, 0x83D6, 0xAEB0, 0x83D7, 0xAEB1, 0x83D8, 0xAEB2,
04408     0x83D9, 0xAEB3, 0x83DA, 0xAEB4, 0x83DB, 0xAEB5, 0x83DC, 0xAEB6,
04409     0x83DD, 0xAEB7, 0x83DE, 0xAEB8, 0x83DF, 0xAEB9, 0x83E0, 0xAEBA,
04410     0x83E1, 0xAEBB, 0x83E2, 0xAEBF, 0x83E3, 0xAEC1, 0x83E4, 0xAEC2,
04411     0x83E5, 0xAEC3, 0x83E6, 0xAEC5, 0x83E7, 0xAEC6, 0x83E8, 0xAEC7,
04412     0x83E9, 0xAEC8, 0x83EA, 0xAEC9, 0x83EB, 0xAECA, 0x83EC, 0xAECB,
04413     0x83ED, 0xAECE, 0x83EE, 0xAED2, 0x83EF, 0xAED3, 0x83F0, 0xAED4,
04414     0x83F1, 0xAED5, 0x83F2, 0xAED6, 0x83F3, 0xAED7, 0x83F4, 0xAEDA,
04415     0x83F5, 0xAEDB, 0x83F6, 0xAEDD, 0x83F7, 0xAEDE, 0x83F8, 0xAEDF,
04416     0x83F9, 0xAEE0, 0x83FA, 0xAEE1, 0x83FB, 0xAEE2, 0x83FC, 0xAEE3,
04417     0x83FD, 0xAEE4, 0x83FE, 0xAEE5, 0x8441, 0xAEE6, 0x8442, 0xAEE7,
04418     0x8443, 0xAEE9, 0x8444, 0xAEEA, 0x8445, 0xAEEC, 0x8446, 0xAEEE,
04419     0x8447, 0xAEEF, 0x8448, 0xAEF0, 0x8449, 0xAEF1, 0x844A, 0xAEF2,
04420     0x844B, 0xAEF3, 0x844C, 0xAEF5, 0x844D, 0xAEF6, 0x844E, 0xAEF7,
04421     0x844F, 0xAEF9, 0x8450, 0xAEFA, 0x8451, 0xAEFB, 0x8452, 0xAEFD,
04422     0x8453, 0xAEFE, 0x8454, 0xAEFF, 0x8455, 0xAF00, 0x8456, 0xAF01,
04423     0x8457, 0xAF02, 0x8458, 0xAF03, 0x8459, 0xAF04, 0x845A, 0xAF05,
04424     0x8461, 0xAF06, 0x8462, 0xAF09, 0x8463, 0xAF0A, 0x8464, 0xAF0B,
04425     0x8465, 0xAF0C, 0x8466, 0xAF0E, 0x8467, 0xAF0F, 0x8468, 0xAF11,
04426     0x8469, 0xAF12, 0x846A, 0xAF13, 0x846B, 0xAF14, 0x846C, 0xAF15,
04427     0x846D, 0xAF16, 0x846E, 0xAF17, 0x846F, 0xAF18, 0x8470, 0xAF19,
04428     0x8471, 0xAF1A, 0x8472, 0xAF1B, 0x8473, 0xAF1C, 0x8474, 0xAF1D,
04429     0x8475, 0xAF1E, 0x8476, 0xAF1F, 0x8477, 0xAF20, 0x8478, 0xAF21,
04430     0x8479, 0xAF22, 0x847A, 0xAF23, 0x8481, 0xAF24, 0x8482, 0xAF25,
04431     0x8483, 0xAF26, 0x8484, 0xAF27, 0x8485, 0xAF28, 0x8486, 0xAF29,
04432     0x8487, 0xAF2A, 0x8488, 0xAF2B, 0x8489, 0xAF2E, 0x848A, 0xAF2F,
04433     0x848B, 0xAF31, 0x848C, 0xAF33, 0x848D, 0xAF35, 0x848E, 0xAF36,
04434     0x848F, 0xAF37, 0x8490, 0xAF38, 0x8491, 0xAF39, 0x8492, 0xAF3A,
04435     0x8493, 0xAF3B, 0x8494, 0xAF3E, 0x8495, 0xAF40, 0x8496, 0xAF44,
04436     0x8497, 0xAF45, 0x8498, 0xAF46, 0x8499, 0xAF47, 0x849A, 0xAF4A,
04437     0x849B, 0xAF4B, 0x849C, 0xAF4C, 0x849D, 0xAF4D, 0x849E, 0xAF4E,
04438     0x849F, 0xAF4F, 0x84A0, 0xAF51, 0x84A1, 0xAF52, 0x84A2, 0xAF53,
04439     0x84A3, 0xAF54, 0x84A4, 0xAF55, 0x84A5, 0xAF56, 0x84A6, 0xAF57,
04440     0x84A7, 0xAF58, 0x84A8, 0xAF59, 0x84A9, 0xAF5A, 0x84AA, 0xAF5B,
04441     0x84AB, 0xAF5E, 0x84AC, 0xAF5F, 0x84AD, 0xAF60, 0x84AE, 0xAF61,
04442     0x84AF, 0xAF62, 0x84B0, 0xAF63, 0x84B1, 0xAF66, 0x84B2, 0xAF67,
04443     0x84B3, 0xAF68, 0x84B4, 0xAF69, 0x84B5, 0xAF6A, 0x84B6, 0xAF6B,
04444     0x84B7, 0xAF6C, 0x84B8, 0xAF6D, 0x84B9, 0xAF6E, 0x84BA, 0xAF6F,
04445     0x84BB, 0xAF70, 0x84BC, 0xAF71, 0x84BD, 0xAF72, 0x84BE, 0xAF73,
04446     0x84BF, 0xAF74, 0x84C0, 0xAF75, 0x84C1, 0xAF76, 0x84C2, 0xAF77,
04447     0x84C3, 0xAF78, 0x84C4, 0xAF7A, 0x84C5, 0xAF7B, 0x84C6, 0xAF7C,
04448     0x84C7, 0xAF7D, 0x84C8, 0xAF7E, 0x84C9, 0xAF7F, 0x84CA, 0xAF81,
04449     0x84CB, 0xAF82, 0x84CC, 0xAF83, 0x84CD, 0xAF85, 0x84CE, 0xAF86,
04450     0x84CF, 0xAF87, 0x84D0, 0xAF89, 0x84D1, 0xAF8A, 0x84D2, 0xAF8B,
04451     0x84D3, 0xAF8C, 0x84D4, 0xAF8D, 0x84D5, 0xAF8E, 0x84D6, 0xAF8F,
04452     0x84D7, 0xAF92, 0x84D8, 0xAF93, 0x84D9, 0xAF94, 0x84DA, 0xAF96,
04453     0x84DB, 0xAF97, 0x84DC, 0xAF98, 0x84DD, 0xAF99, 0x84DE, 0xAF9A,
04454     0x84DF, 0xAF9B, 0x84E0, 0xAF9D, 0x84E1, 0xAF9E, 0x84E2, 0xAF9F,
04455     0x84E3, 0xAFA0, 0x84E4, 0xAFA1, 0x84E5, 0xAFA2, 0x84E6, 0xAFA3,
04456     0x84E7, 0xAFA4, 0x84E8, 0xAFA5, 0x84E9, 0xAFA6, 0x84EA, 0xAFA7,
04457     0x84EB, 0xAFA8, 0x84EC, 0xAFA9, 0x84ED, 0xAFAA, 0x84EE, 0xAFAB,
04458     0x84EF, 0xAFAC, 0x84F0, 0xAFAD, 0x84F1, 0xAFAE, 0x84F2, 0xAFAF,
04459     0x84F3, 0xAFB0, 0x84F4, 0xAFB1, 0x84F5, 0xAFB2, 0x84F6, 0xAFB3,
04460     0x84F7, 0xAFB4, 0x84F8, 0xAFB5, 0x84F9, 0xAFB6, 0x84FA, 0xAFB7,
04461     0x84FB, 0xAFBA, 0x84FC, 0xAFBB, 0x84FD, 0xAFBD, 0x84FE, 0xAFBE,
04462     0x8541, 0xAFBF, 0x8542, 0xAFC1, 0x8543, 0xAFC2, 0x8544, 0xAFC3,
04463     0x8545, 0xAFC4, 0x8546, 0xAFC5, 0x8547, 0xAFC6, 0x8548, 0xAFCA,
04464     0x8549, 0xAFCC, 0x854A, 0xAFCF, 0x854B, 0xAFD0, 0x854C, 0xAFD1,
04465     0x854D, 0xAFD2, 0x854E, 0xAFD3, 0x854F, 0xAFD5, 0x8550, 0xAFD6,
04466     0x8551, 0xAFD7, 0x8552, 0xAFD8, 0x8553, 0xAFD9, 0x8554, 0xAFDA,
04467     0x8555, 0xAFDB, 0x8556, 0xAFDD, 0x8557, 0xAFDE, 0x8558, 0xAFDF,
04468     0x8559, 0xAFE0, 0x855A, 0xAFE1, 0x8561, 0xAFE2, 0x8562, 0xAFE3,
04469     0x8563, 0xAFE4, 0x8564, 0xAFE5, 0x8565, 0xAFE6, 0x8566, 0xAFE7,
04470     0x8567, 0xAFEA, 0x8568, 0xAFEB, 0x8569, 0xAFEC, 0x856A, 0xAFED,
04471     0x856B, 0xAFEE, 0x856C, 0xAFEF, 0x856D, 0xAFF2, 0x856E, 0xAFF3,
04472     0x856F, 0xAFF5, 0x8570, 0xAFF6, 0x8571, 0xAFF7, 0x8572, 0xAFF9,
04473     0x8573, 0xAFFA, 0x8574, 0xAFFB, 0x8575, 0xAFFC, 0x8576, 0xAFFD,
04474     0x8577, 0xAFFE, 0x8578, 0xAFFF, 0x8579, 0xB002, 0x857A, 0xB003,
04475     0x8581, 0xB005, 0x8582, 0xB006, 0x8583, 0xB007, 0x8584, 0xB008,
04476     0x8585, 0xB009, 0x8586, 0xB00A, 0x8587, 0xB00B, 0x8588, 0xB00D,
04477     0x8589, 0xB00E, 0x858A, 0xB00F, 0x858B, 0xB011, 0x858C, 0xB012,
04478     0x858D, 0xB013, 0x858E, 0xB015, 0x858F, 0xB016, 0x8590, 0xB017,
04479     0x8591, 0xB018, 0x8592, 0xB019, 0x8593, 0xB01A, 0x8594, 0xB01B,
04480     0x8595, 0xB01E, 0x8596, 0xB01F, 0x8597, 0xB020, 0x8598, 0xB021,
04481     0x8599, 0xB022, 0x859A, 0xB023, 0x859B, 0xB024, 0x859C, 0xB025,
04482     0x859D, 0xB026, 0x859E, 0xB027, 0x859F, 0xB029, 0x85A0, 0xB02A,
04483     0x85A1, 0xB02B, 0x85A2, 0xB02C, 0x85A3, 0xB02D, 0x85A4, 0xB02E,
04484     0x85A5, 0xB02F, 0x85A6, 0xB030, 0x85A7, 0xB031, 0x85A8, 0xB032,
04485     0x85A9, 0xB033, 0x85AA, 0xB034, 0x85AB, 0xB035, 0x85AC, 0xB036,
04486     0x85AD, 0xB037, 0x85AE, 0xB038, 0x85AF, 0xB039, 0x85B0, 0xB03A,
04487     0x85B1, 0xB03B, 0x85B2, 0xB03C, 0x85B3, 0xB03D, 0x85B4, 0xB03E,
04488     0x85B5, 0xB03F, 0x85B6, 0xB040, 0x85B7, 0xB041, 0x85B8, 0xB042,
04489     0x85B9, 0xB043, 0x85BA, 0xB046, 0x85BB, 0xB047, 0x85BC, 0xB049,
04490     0x85BD, 0xB04B, 0x85BE, 0xB04D, 0x85BF, 0xB04F, 0x85C0, 0xB050,
04491     0x85C1, 0xB051, 0x85C2, 0xB052, 0x85C3, 0xB056, 0x85C4, 0xB058,
04492     0x85C5, 0xB05A, 0x85C6, 0xB05B, 0x85C7, 0xB05C, 0x85C8, 0xB05E,
04493     0x85C9, 0xB05F, 0x85CA, 0xB060, 0x85CB, 0xB061, 0x85CC, 0xB062,
04494     0x85CD, 0xB063, 0x85CE, 0xB064, 0x85CF, 0xB065, 0x85D0, 0xB066,
04495     0x85D1, 0xB067, 0x85D2, 0xB068, 0x85D3, 0xB069, 0x85D4, 0xB06A,
04496     0x85D5, 0xB06B, 0x85D6, 0xB06C, 0x85D7, 0xB06D, 0x85D8, 0xB06E,
04497     0x85D9, 0xB06F, 0x85DA, 0xB070, 0x85DB, 0xB071, 0x85DC, 0xB072,
04498     0x85DD, 0xB073, 0x85DE, 0xB074, 0x85DF, 0xB075, 0x85E0, 0xB076,
04499     0x85E1, 0xB077, 0x85E2, 0xB078, 0x85E3, 0xB079, 0x85E4, 0xB07A,
04500     0x85E5, 0xB07B, 0x85E6, 0xB07E, 0x85E7, 0xB07F, 0x85E8, 0xB081,
04501     0x85E9, 0xB082, 0x85EA, 0xB083, 0x85EB, 0xB085, 0x85EC, 0xB086,
04502     0x85ED, 0xB087, 0x85EE, 0xB088, 0x85EF, 0xB089, 0x85F0, 0xB08A,
04503     0x85F1, 0xB08B, 0x85F2, 0xB08E, 0x85F3, 0xB090, 0x85F4, 0xB092,
04504     0x85F5, 0xB093, 0x85F6, 0xB094, 0x85F7, 0xB095, 0x85F8, 0xB096,
04505     0x85F9, 0xB097, 0x85FA, 0xB09B, 0x85FB, 0xB09D, 0x85FC, 0xB09E,
04506     0x85FD, 0xB0A3, 0x85FE, 0xB0A4, 0x8641, 0xB0A5, 0x8642, 0xB0A6,
04507     0x8643, 0xB0A7, 0x8644, 0xB0AA, 0x8645, 0xB0B0, 0x8646, 0xB0B2,
04508     0x8647, 0xB0B6, 0x8648, 0xB0B7, 0x8649, 0xB0B9, 0x864A, 0xB0BA,
04509     0x864B, 0xB0BB, 0x864C, 0xB0BD, 0x864D, 0xB0BE, 0x864E, 0xB0BF,
04510     0x864F, 0xB0C0, 0x8650, 0xB0C1, 0x8651, 0xB0C2, 0x8652, 0xB0C3,
04511     0x8653, 0xB0C6, 0x8654, 0xB0CA, 0x8655, 0xB0CB, 0x8656, 0xB0CC,
04512     0x8657, 0xB0CD, 0x8658, 0xB0CE, 0x8659, 0xB0CF, 0x865A, 0xB0D2,
04513     0x8661, 0xB0D3, 0x8662, 0xB0D5, 0x8663, 0xB0D6, 0x8664, 0xB0D7,
04514     0x8665, 0xB0D9, 0x8666, 0xB0DA, 0x8667, 0xB0DB, 0x8668, 0xB0DC,
04515     0x8669, 0xB0DD, 0x866A, 0xB0DE, 0x866B, 0xB0DF, 0x866C, 0xB0E1,
04516     0x866D, 0xB0E2, 0x866E, 0xB0E3, 0x866F, 0xB0E4, 0x8670, 0xB0E6,
04517     0x8671, 0xB0E7, 0x8672, 0xB0E8, 0x8673, 0xB0E9, 0x8674, 0xB0EA,
04518     0x8675, 0xB0EB, 0x8676, 0xB0EC, 0x8677, 0xB0ED, 0x8678, 0xB0EE,
04519     0x8679, 0xB0EF, 0x867A, 0xB0F0, 0x8681, 0xB0F1, 0x8682, 0xB0F2,
04520     0x8683, 0xB0F3, 0x8684, 0xB0F4, 0x8685, 0xB0F5, 0x8686, 0xB0F6,
04521     0x8687, 0xB0F7, 0x8688, 0xB0F8, 0x8689, 0xB0F9, 0x868A, 0xB0FA,
04522     0x868B, 0xB0FB, 0x868C, 0xB0FC, 0x868D, 0xB0FD, 0x868E, 0xB0FE,
04523     0x868F, 0xB0FF, 0x8690, 0xB100, 0x8691, 0xB101, 0x8692, 0xB102,
04524     0x8693, 0xB103, 0x8694, 0xB104, 0x8695, 0xB105, 0x8696, 0xB106,
04525     0x8697, 0xB107, 0x8698, 0xB10A, 0x8699, 0xB10D, 0x869A, 0xB10E,
04526     0x869B, 0xB10F, 0x869C, 0xB111, 0x869D, 0xB114, 0x869E, 0xB115,
04527     0x869F, 0xB116, 0x86A0, 0xB117, 0x86A1, 0xB11A, 0x86A2, 0xB11E,
04528     0x86A3, 0xB11F, 0x86A4, 0xB120, 0x86A5, 0xB121, 0x86A6, 0xB122,
04529     0x86A7, 0xB126, 0x86A8, 0xB127, 0x86A9, 0xB129, 0x86AA, 0xB12A,
04530     0x86AB, 0xB12B, 0x86AC, 0xB12D, 0x86AD, 0xB12E, 0x86AE, 0xB12F,
04531     0x86AF, 0xB130, 0x86B0, 0xB131, 0x86B1, 0xB132, 0x86B2, 0xB133,
04532     0x86B3, 0xB136, 0x86B4, 0xB13A, 0x86B5, 0xB13B, 0x86B6, 0xB13C,
04533     0x86B7, 0xB13D, 0x86B8, 0xB13E, 0x86B9, 0xB13F, 0x86BA, 0xB142,
04534     0x86BB, 0xB143, 0x86BC, 0xB145, 0x86BD, 0xB146, 0x86BE, 0xB147,
04535     0x86BF, 0xB149, 0x86C0, 0xB14A, 0x86C1, 0xB14B, 0x86C2, 0xB14C,
04536     0x86C3, 0xB14D, 0x86C4, 0xB14E, 0x86C5, 0xB14F, 0x86C6, 0xB152,
04537     0x86C7, 0xB153, 0x86C8, 0xB156, 0x86C9, 0xB157, 0x86CA, 0xB159,
04538     0x86CB, 0xB15A, 0x86CC, 0xB15B, 0x86CD, 0xB15D, 0x86CE, 0xB15E,
04539     0x86CF, 0xB15F, 0x86D0, 0xB161, 0x86D1, 0xB162, 0x86D2, 0xB163,
04540     0x86D3, 0xB164, 0x86D4, 0xB165, 0x86D5, 0xB166, 0x86D6, 0xB167,
04541     0x86D7, 0xB168, 0x86D8, 0xB169, 0x86D9, 0xB16A, 0x86DA, 0xB16B,
04542     0x86DB, 0xB16C, 0x86DC, 0xB16D, 0x86DD, 0xB16E, 0x86DE, 0xB16F,
04543     0x86DF, 0xB170, 0x86E0, 0xB171, 0x86E1, 0xB172, 0x86E2, 0xB173,
04544     0x86E3, 0xB174, 0x86E4, 0xB175, 0x86E5, 0xB176, 0x86E6, 0xB177,
04545     0x86E7, 0xB17A, 0x86E8, 0xB17B, 0x86E9, 0xB17D, 0x86EA, 0xB17E,
04546     0x86EB, 0xB17F, 0x86EC, 0xB181, 0x86ED, 0xB183, 0x86EE, 0xB184,
04547     0x86EF, 0xB185, 0x86F0, 0xB186, 0x86F1, 0xB187, 0x86F2, 0xB18A,
04548     0x86F3, 0xB18C, 0x86F4, 0xB18E, 0x86F5, 0xB18F, 0x86F6, 0xB190,
04549     0x86F7, 0xB191, 0x86F8, 0xB195, 0x86F9, 0xB196, 0x86FA, 0xB197,
04550     0x86FB, 0xB199, 0x86FC, 0xB19A, 0x86FD, 0xB19B, 0x86FE, 0xB19D,
04551     0x8741, 0xB19E, 0x8742, 0xB19F, 0x8743, 0xB1A0, 0x8744, 0xB1A1,
04552     0x8745, 0xB1A2, 0x8746, 0xB1A3, 0x8747, 0xB1A4, 0x8748, 0xB1A5,
04553     0x8749, 0xB1A6, 0x874A, 0xB1A7, 0x874B, 0xB1A9, 0x874C, 0xB1AA,
04554     0x874D, 0xB1AB, 0x874E, 0xB1AC, 0x874F, 0xB1AD, 0x8750, 0xB1AE,
04555     0x8751, 0xB1AF, 0x8752, 0xB1B0, 0x8753, 0xB1B1, 0x8754, 0xB1B2,
04556     0x8755, 0xB1B3, 0x8756, 0xB1B4, 0x8757, 0xB1B5, 0x8758, 0xB1B6,
04557     0x8759, 0xB1B7, 0x875A, 0xB1B8, 0x8761, 0xB1B9, 0x8762, 0xB1BA,
04558     0x8763, 0xB1BB, 0x8764, 0xB1BC, 0x8765, 0xB1BD, 0x8766, 0xB1BE,
04559     0x8767, 0xB1BF, 0x8768, 0xB1C0, 0x8769, 0xB1C1, 0x876A, 0xB1C2,
04560     0x876B, 0xB1C3, 0x876C, 0xB1C4, 0x876D, 0xB1C5, 0x876E, 0xB1C6,
04561     0x876F, 0xB1C7, 0x8770, 0xB1C8, 0x8771, 0xB1C9, 0x8772, 0xB1CA,
04562     0x8773, 0xB1CB, 0x8774, 0xB1CD, 0x8775, 0xB1CE, 0x8776, 0xB1CF,
04563     0x8777, 0xB1D1, 0x8778, 0xB1D2, 0x8779, 0xB1D3, 0x877A, 0xB1D5,
04564     0x8781, 0xB1D6, 0x8782, 0xB1D7, 0x8783, 0xB1D8, 0x8784, 0xB1D9,
04565     0x8785, 0xB1DA, 0x8786, 0xB1DB, 0x8787, 0xB1DE, 0x8788, 0xB1E0,
04566     0x8789, 0xB1E1, 0x878A, 0xB1E2, 0x878B, 0xB1E3, 0x878C, 0xB1E4,
04567     0x878D, 0xB1E5, 0x878E, 0xB1E6, 0x878F, 0xB1E7, 0x8790, 0xB1EA,
04568     0x8791, 0xB1EB, 0x8792, 0xB1ED, 0x8793, 0xB1EE, 0x8794, 0xB1EF,
04569     0x8795, 0xB1F1, 0x8796, 0xB1F2, 0x8797, 0xB1F3, 0x8798, 0xB1F4,
04570     0x8799, 0xB1F5, 0x879A, 0xB1F6, 0x879B, 0xB1F7, 0x879C, 0xB1F8,
04571     0x879D, 0xB1FA, 0x879E, 0xB1FC, 0x879F, 0xB1FE, 0x87A0, 0xB1FF,
04572     0x87A1, 0xB200, 0x87A2, 0xB201, 0x87A3, 0xB202, 0x87A4, 0xB203,
04573     0x87A5, 0xB206, 0x87A6, 0xB207, 0x87A7, 0xB209, 0x87A8, 0xB20A,
04574     0x87A9, 0xB20D, 0x87AA, 0xB20E, 0x87AB, 0xB20F, 0x87AC, 0xB210,
04575     0x87AD, 0xB211, 0x87AE, 0xB212, 0x87AF, 0xB213, 0x87B0, 0xB216,
04576     0x87B1, 0xB218, 0x87B2, 0xB21A, 0x87B3, 0xB21B, 0x87B4, 0xB21C,
04577     0x87B5, 0xB21D, 0x87B6, 0xB21E, 0x87B7, 0xB21F, 0x87B8, 0xB221,
04578     0x87B9, 0xB222, 0x87BA, 0xB223, 0x87BB, 0xB224, 0x87BC, 0xB225,
04579     0x87BD, 0xB226, 0x87BE, 0xB227, 0x87BF, 0xB228, 0x87C0, 0xB229,
04580     0x87C1, 0xB22A, 0x87C2, 0xB22B, 0x87C3, 0xB22C, 0x87C4, 0xB22D,
04581     0x87C5, 0xB22E, 0x87C6, 0xB22F, 0x87C7, 0xB230, 0x87C8, 0xB231,
04582     0x87C9, 0xB232, 0x87CA, 0xB233, 0x87CB, 0xB235, 0x87CC, 0xB236,
04583     0x87CD, 0xB237, 0x87CE, 0xB238, 0x87CF, 0xB239, 0x87D0, 0xB23A,
04584     0x87D1, 0xB23B, 0x87D2, 0xB23D, 0x87D3, 0xB23E, 0x87D4, 0xB23F,
04585     0x87D5, 0xB240, 0x87D6, 0xB241, 0x87D7, 0xB242, 0x87D8, 0xB243,
04586     0x87D9, 0xB244, 0x87DA, 0xB245, 0x87DB, 0xB246, 0x87DC, 0xB247,
04587     0x87DD, 0xB248, 0x87DE, 0xB249, 0x87DF, 0xB24A, 0x87E0, 0xB24B,
04588     0x87E1, 0xB24C, 0x87E2, 0xB24D, 0x87E3, 0xB24E, 0x87E4, 0xB24F,
04589     0x87E5, 0xB250, 0x87E6, 0xB251, 0x87E7, 0xB252, 0x87E8, 0xB253,
04590     0x87E9, 0xB254, 0x87EA, 0xB255, 0x87EB, 0xB256, 0x87EC, 0xB257,
04591     0x87ED, 0xB259, 0x87EE, 0xB25A, 0x87EF, 0xB25B, 0x87F0, 0xB25D,
04592     0x87F1, 0xB25E, 0x87F2, 0xB25F, 0x87F3, 0xB261, 0x87F4, 0xB262,
04593     0x87F5, 0xB263, 0x87F6, 0xB264, 0x87F7, 0xB265, 0x87F8, 0xB266,
04594     0x87F9, 0xB267, 0x87FA, 0xB26A, 0x87FB, 0xB26B, 0x87FC, 0xB26C,
04595     0x87FD, 0xB26D, 0x87FE, 0xB26E, 0x8841, 0xB26F, 0x8842, 0xB270,
04596     0x8843, 0xB271, 0x8844, 0xB272, 0x8845, 0xB273, 0x8846, 0xB276,
04597     0x8847, 0xB277, 0x8848, 0xB278, 0x8849, 0xB279, 0x884A, 0xB27A,
04598     0x884B, 0xB27B, 0x884C, 0xB27D, 0x884D, 0xB27E, 0x884E, 0xB27F,
04599     0x884F, 0xB280, 0x8850, 0xB281, 0x8851, 0xB282, 0x8852, 0xB283,
04600     0x8853, 0xB286, 0x8854, 0xB287, 0x8855, 0xB288, 0x8856, 0xB28A,
04601     0x8857, 0xB28B, 0x8858, 0xB28C, 0x8859, 0xB28D, 0x885A, 0xB28E,
04602     0x8861, 0xB28F, 0x8862, 0xB292, 0x8863, 0xB293, 0x8864, 0xB295,
04603     0x8865, 0xB296, 0x8866, 0xB297, 0x8867, 0xB29B, 0x8868, 0xB29C,
04604     0x8869, 0xB29D, 0x886A, 0xB29E, 0x886B, 0xB29F, 0x886C, 0xB2A2,
04605     0x886D, 0xB2A4, 0x886E, 0xB2A7, 0x886F, 0xB2A8, 0x8870, 0xB2A9,
04606     0x8871, 0xB2AB, 0x8872, 0xB2AD, 0x8873, 0xB2AE, 0x8874, 0xB2AF,
04607     0x8875, 0xB2B1, 0x8876, 0xB2B2, 0x8877, 0xB2B3, 0x8878, 0xB2B5,
04608     0x8879, 0xB2B6, 0x887A, 0xB2B7, 0x8881, 0xB2B8, 0x8882, 0xB2B9,
04609     0x8883, 0xB2BA, 0x8884, 0xB2BB, 0x8885, 0xB2BC, 0x8886, 0xB2BD,
04610     0x8887, 0xB2BE, 0x8888, 0xB2BF, 0x8889, 0xB2C0, 0x888A, 0xB2C1,
04611     0x888B, 0xB2C2, 0x888C, 0xB2C3, 0x888D, 0xB2C4, 0x888E, 0xB2C5,
04612     0x888F, 0xB2C6, 0x8890, 0xB2C7, 0x8891, 0xB2CA, 0x8892, 0xB2CB,
04613     0x8893, 0xB2CD, 0x8894, 0xB2CE, 0x8895, 0xB2CF, 0x8896, 0xB2D1,
04614     0x8897, 0xB2D3, 0x8898, 0xB2D4, 0x8899, 0xB2D5, 0x889A, 0xB2D6,
04615     0x889B, 0xB2D7, 0x889C, 0xB2DA, 0x889D, 0xB2DC, 0x889E, 0xB2DE,
04616     0x889F, 0xB2DF, 0x88A0, 0xB2E0, 0x88A1, 0xB2E1, 0x88A2, 0xB2E3,
04617     0x88A3, 0xB2E7, 0x88A4, 0xB2E9, 0x88A5, 0xB2EA, 0x88A6, 0xB2F0,
04618     0x88A7, 0xB2F1, 0x88A8, 0xB2F2, 0x88A9, 0xB2F6, 0x88AA, 0xB2FC,
04619     0x88AB, 0xB2FD, 0x88AC, 0xB2FE, 0x88AD, 0xB302, 0x88AE, 0xB303,
04620     0x88AF, 0xB305, 0x88B0, 0xB306, 0x88B1, 0xB307, 0x88B2, 0xB309,
04621     0x88B3, 0xB30A, 0x88B4, 0xB30B, 0x88B5, 0xB30C, 0x88B6, 0xB30D,
04622     0x88B7, 0xB30E, 0x88B8, 0xB30F, 0x88B9, 0xB312, 0x88BA, 0xB316,
04623     0x88BB, 0xB317, 0x88BC, 0xB318, 0x88BD, 0xB319, 0x88BE, 0xB31A,
04624     0x88BF, 0xB31B, 0x88C0, 0xB31D, 0x88C1, 0xB31E, 0x88C2, 0xB31F,
04625     0x88C3, 0xB320, 0x88C4, 0xB321, 0x88C5, 0xB322, 0x88C6, 0xB323,
04626     0x88C7, 0xB324, 0x88C8, 0xB325, 0x88C9, 0xB326, 0x88CA, 0xB327,
04627     0x88CB, 0xB328, 0x88CC, 0xB329, 0x88CD, 0xB32A, 0x88CE, 0xB32B,
04628     0x88CF, 0xB32C, 0x88D0, 0xB32D, 0x88D1, 0xB32E, 0x88D2, 0xB32F,
04629     0x88D3, 0xB330, 0x88D4, 0xB331, 0x88D5, 0xB332, 0x88D6, 0xB333,
04630     0x88D7, 0xB334, 0x88D8, 0xB335, 0x88D9, 0xB336, 0x88DA, 0xB337,
04631     0x88DB, 0xB338, 0x88DC, 0xB339, 0x88DD, 0xB33A, 0x88DE, 0xB33B,
04632     0x88DF, 0xB33C, 0x88E0, 0xB33D, 0x88E1, 0xB33E, 0x88E2, 0xB33F,
04633     0x88E3, 0xB340, 0x88E4, 0xB341, 0x88E5, 0xB342, 0x88E6, 0xB343,
04634     0x88E7, 0xB344, 0x88E8, 0xB345, 0x88E9, 0xB346, 0x88EA, 0xB347,
04635     0x88EB, 0xB348, 0x88EC, 0xB349, 0x88ED, 0xB34A, 0x88EE, 0xB34B,
04636     0x88EF, 0xB34C, 0x88F0, 0xB34D, 0x88F1, 0xB34E, 0x88F2, 0xB34F,
04637     0x88F3, 0xB350, 0x88F4, 0xB351, 0x88F5, 0xB352, 0x88F6, 0xB353,
04638     0x88F7, 0xB357, 0x88F8, 0xB359, 0x88F9, 0xB35A, 0x88FA, 0xB35D,
04639     0x88FB, 0xB360, 0x88FC, 0xB361, 0x88FD, 0xB362, 0x88FE, 0xB363,
04640     0x8941, 0xB366, 0x8942, 0xB368, 0x8943, 0xB36A, 0x8944, 0xB36C,
04641     0x8945, 0xB36D, 0x8946, 0xB36F, 0x8947, 0xB372, 0x8948, 0xB373,
04642     0x8949, 0xB375, 0x894A, 0xB376, 0x894B, 0xB377, 0x894C, 0xB379,
04643     0x894D, 0xB37A, 0x894E, 0xB37B, 0x894F, 0xB37C, 0x8950, 0xB37D,
04644     0x8951, 0xB37E, 0x8952, 0xB37F, 0x8953, 0xB382, 0x8954, 0xB386,
04645     0x8955, 0xB387, 0x8956, 0xB388, 0x8957, 0xB389, 0x8958, 0xB38A,
04646     0x8959, 0xB38B, 0x895A, 0xB38D, 0x8961, 0xB38E, 0x8962, 0xB38F,
04647     0x8963, 0xB391, 0x8964, 0xB392, 0x8965, 0xB393, 0x8966, 0xB395,
04648     0x8967, 0xB396, 0x8968, 0xB397, 0x8969, 0xB398, 0x896A, 0xB399,
04649     0x896B, 0xB39A, 0x896C, 0xB39B, 0x896D, 0xB39C, 0x896E, 0xB39D,
04650     0x896F, 0xB39E, 0x8970, 0xB39F, 0x8971, 0xB3A2, 0x8972, 0xB3A3,
04651     0x8973, 0xB3A4, 0x8974, 0xB3A5, 0x8975, 0xB3A6, 0x8976, 0xB3A7,
04652     0x8977, 0xB3A9, 0x8978, 0xB3AA, 0x8979, 0xB3AB, 0x897A, 0xB3AD,
04653     0x8981, 0xB3AE, 0x8982, 0xB3AF, 0x8983, 0xB3B0, 0x8984, 0xB3B1,
04654     0x8985, 0xB3B2, 0x8986, 0xB3B3, 0x8987, 0xB3B4, 0x8988, 0xB3B5,
04655     0x8989, 0xB3B6, 0x898A, 0xB3B7, 0x898B, 0xB3B8, 0x898C, 0xB3B9,
04656     0x898D, 0xB3BA, 0x898E, 0xB3BB, 0x898F, 0xB3BC, 0x8990, 0xB3BD,
04657     0x8991, 0xB3BE, 0x8992, 0xB3BF, 0x8993, 0xB3C0, 0x8994, 0xB3C1,
04658     0x8995, 0xB3C2, 0x8996, 0xB3C3, 0x8997, 0xB3C6, 0x8998, 0xB3C7,
04659     0x8999, 0xB3C9, 0x899A, 0xB3CA, 0x899B, 0xB3CD, 0x899C, 0xB3CF,
04660     0x899D, 0xB3D1, 0x899E, 0xB3D2, 0x899F, 0xB3D3, 0x89A0, 0xB3D6,
04661     0x89A1, 0xB3D8, 0x89A2, 0xB3DA, 0x89A3, 0xB3DC, 0x89A4, 0xB3DE,
04662     0x89A5, 0xB3DF, 0x89A6, 0xB3E1, 0x89A7, 0xB3E2, 0x89A8, 0xB3E3,
04663     0x89A9, 0xB3E5, 0x89AA, 0xB3E6, 0x89AB, 0xB3E7, 0x89AC, 0xB3E9,
04664     0x89AD, 0xB3EA, 0x89AE, 0xB3EB, 0x89AF, 0xB3EC, 0x89B0, 0xB3ED,
04665     0x89B1, 0xB3EE, 0x89B2, 0xB3EF, 0x89B3, 0xB3F0, 0x89B4, 0xB3F1,
04666     0x89B5, 0xB3F2, 0x89B6, 0xB3F3, 0x89B7, 0xB3F4, 0x89B8, 0xB3F5,
04667     0x89B9, 0xB3F6, 0x89BA, 0xB3F7, 0x89BB, 0xB3F8, 0x89BC, 0xB3F9,
04668     0x89BD, 0xB3FA, 0x89BE, 0xB3FB, 0x89BF, 0xB3FD, 0x89C0, 0xB3FE,
04669     0x89C1, 0xB3FF, 0x89C2, 0xB400, 0x89C3, 0xB401, 0x89C4, 0xB402,
04670     0x89C5, 0xB403, 0x89C6, 0xB404, 0x89C7, 0xB405, 0x89C8, 0xB406,
04671     0x89C9, 0xB407, 0x89CA, 0xB408, 0x89CB, 0xB409, 0x89CC, 0xB40A,
04672     0x89CD, 0xB40B, 0x89CE, 0xB40C, 0x89CF, 0xB40D, 0x89D0, 0xB40E,
04673     0x89D1, 0xB40F, 0x89D2, 0xB411, 0x89D3, 0xB412, 0x89D4, 0xB413,
04674     0x89D5, 0xB414, 0x89D6, 0xB415, 0x89D7, 0xB416, 0x89D8, 0xB417,
04675     0x89D9, 0xB419, 0x89DA, 0xB41A, 0x89DB, 0xB41B, 0x89DC, 0xB41D,
04676     0x89DD, 0xB41E, 0x89DE, 0xB41F, 0x89DF, 0xB421, 0x89E0, 0xB422,
04677     0x89E1, 0xB423, 0x89E2, 0xB424, 0x89E3, 0xB425, 0x89E4, 0xB426,
04678     0x89E5, 0xB427, 0x89E6, 0xB42A, 0x89E7, 0xB42C, 0x89E8, 0xB42D,
04679     0x89E9, 0xB42E, 0x89EA, 0xB42F, 0x89EB, 0xB430, 0x89EC, 0xB431,
04680     0x89ED, 0xB432, 0x89EE, 0xB433, 0x89EF, 0xB435, 0x89F0, 0xB436,
04681     0x89F1, 0xB437, 0x89F2, 0xB438, 0x89F3, 0xB439, 0x89F4, 0xB43A,
04682     0x89F5, 0xB43B, 0x89F6, 0xB43C, 0x89F7, 0xB43D, 0x89F8, 0xB43E,
04683     0x89F9, 0xB43F, 0x89FA, 0xB440, 0x89FB, 0xB441, 0x89FC, 0xB442,
04684     0x89FD, 0xB443, 0x89FE, 0xB444, 0x8A41, 0xB445, 0x8A42, 0xB446,
04685     0x8A43, 0xB447, 0x8A44, 0xB448, 0x8A45, 0xB449, 0x8A46, 0xB44A,
04686     0x8A47, 0xB44B, 0x8A48, 0xB44C, 0x8A49, 0xB44D, 0x8A4A, 0xB44E,
04687     0x8A4B, 0xB44F, 0x8A4C, 0xB452, 0x8A4D, 0xB453, 0x8A4E, 0xB455,
04688     0x8A4F, 0xB456, 0x8A50, 0xB457, 0x8A51, 0xB459, 0x8A52, 0xB45A,
04689     0x8A53, 0xB45B, 0x8A54, 0xB45C, 0x8A55, 0xB45D, 0x8A56, 0xB45E,
04690     0x8A57, 0xB45F, 0x8A58, 0xB462, 0x8A59, 0xB464, 0x8A5A, 0xB466,
04691     0x8A61, 0xB467, 0x8A62, 0xB468, 0x8A63, 0xB469, 0x8A64, 0xB46A,
04692     0x8A65, 0xB46B, 0x8A66, 0xB46D, 0x8A67, 0xB46E, 0x8A68, 0xB46F,
04693     0x8A69, 0xB470, 0x8A6A, 0xB471, 0x8A6B, 0xB472, 0x8A6C, 0xB473,
04694     0x8A6D, 0xB474, 0x8A6E, 0xB475, 0x8A6F, 0xB476, 0x8A70, 0xB477,
04695     0x8A71, 0xB478, 0x8A72, 0xB479, 0x8A73, 0xB47A, 0x8A74, 0xB47B,
04696     0x8A75, 0xB47C, 0x8A76, 0xB47D, 0x8A77, 0xB47E, 0x8A78, 0xB47F,
04697     0x8A79, 0xB481, 0x8A7A, 0xB482, 0x8A81, 0xB483, 0x8A82, 0xB484,
04698     0x8A83, 0xB485, 0x8A84, 0xB486, 0x8A85, 0xB487, 0x8A86, 0xB489,
04699     0x8A87, 0xB48A, 0x8A88, 0xB48B, 0x8A89, 0xB48C, 0x8A8A, 0xB48D,
04700     0x8A8B, 0xB48E, 0x8A8C, 0xB48F, 0x8A8D, 0xB490, 0x8A8E, 0xB491,
04701     0x8A8F, 0xB492, 0x8A90, 0xB493, 0x8A91, 0xB494, 0x8A92, 0xB495,
04702     0x8A93, 0xB496, 0x8A94, 0xB497, 0x8A95, 0xB498, 0x8A96, 0xB499,
04703     0x8A97, 0xB49A, 0x8A98, 0xB49B, 0x8A99, 0xB49C, 0x8A9A, 0xB49E,
04704     0x8A9B, 0xB49F, 0x8A9C, 0xB4A0, 0x8A9D, 0xB4A1, 0x8A9E, 0xB4A2,
04705     0x8A9F, 0xB4A3, 0x8AA0, 0xB4A5, 0x8AA1, 0xB4A6, 0x8AA2, 0xB4A7,
04706     0x8AA3, 0xB4A9, 0x8AA4, 0xB4AA, 0x8AA5, 0xB4AB, 0x8AA6, 0xB4AD,
04707     0x8AA7, 0xB4AE, 0x8AA8, 0xB4AF, 0x8AA9, 0xB4B0, 0x8AAA, 0xB4B1,
04708     0x8AAB, 0xB4B2, 0x8AAC, 0xB4B3, 0x8AAD, 0xB4B4, 0x8AAE, 0xB4B6,
04709     0x8AAF, 0xB4B8, 0x8AB0, 0xB4BA, 0x8AB1, 0xB4BB, 0x8AB2, 0xB4BC,
04710     0x8AB3, 0xB4BD, 0x8AB4, 0xB4BE, 0x8AB5, 0xB4BF, 0x8AB6, 0xB4C1,
04711     0x8AB7, 0xB4C2, 0x8AB8, 0xB4C3, 0x8AB9, 0xB4C5, 0x8ABA, 0xB4C6,
04712     0x8ABB, 0xB4C7, 0x8ABC, 0xB4C9, 0x8ABD, 0xB4CA, 0x8ABE, 0xB4CB,
04713     0x8ABF, 0xB4CC, 0x8AC0, 0xB4CD, 0x8AC1, 0xB4CE, 0x8AC2, 0xB4CF,
04714     0x8AC3, 0xB4D1, 0x8AC4, 0xB4D2, 0x8AC5, 0xB4D3, 0x8AC6, 0xB4D4,
04715     0x8AC7, 0xB4D6, 0x8AC8, 0xB4D7, 0x8AC9, 0xB4D8, 0x8ACA, 0xB4D9,
04716     0x8ACB, 0xB4DA, 0x8ACC, 0xB4DB, 0x8ACD, 0xB4DE, 0x8ACE, 0xB4DF,
04717     0x8ACF, 0xB4E1, 0x8AD0, 0xB4E2, 0x8AD1, 0xB4E5, 0x8AD2, 0xB4E7,
04718     0x8AD3, 0xB4E8, 0x8AD4, 0xB4E9, 0x8AD5, 0xB4EA, 0x8AD6, 0xB4EB,
04719     0x8AD7, 0xB4EE, 0x8AD8, 0xB4F0, 0x8AD9, 0xB4F2, 0x8ADA, 0xB4F3,
04720     0x8ADB, 0xB4F4, 0x8ADC, 0xB4F5, 0x8ADD, 0xB4F6, 0x8ADE, 0xB4F7,
04721     0x8ADF, 0xB4F9, 0x8AE0, 0xB4FA, 0x8AE1, 0xB4FB, 0x8AE2, 0xB4FC,
04722     0x8AE3, 0xB4FD, 0x8AE4, 0xB4FE, 0x8AE5, 0xB4FF, 0x8AE6, 0xB500,
04723     0x8AE7, 0xB501, 0x8AE8, 0xB502, 0x8AE9, 0xB503, 0x8AEA, 0xB504,
04724     0x8AEB, 0xB505, 0x8AEC, 0xB506, 0x8AED, 0xB507, 0x8AEE, 0xB508,
04725     0x8AEF, 0xB509, 0x8AF0, 0xB50A, 0x8AF1, 0xB50B, 0x8AF2, 0xB50C,
04726     0x8AF3, 0xB50D, 0x8AF4, 0xB50E, 0x8AF5, 0xB50F, 0x8AF6, 0xB510,
04727     0x8AF7, 0xB511, 0x8AF8, 0xB512, 0x8AF9, 0xB513, 0x8AFA, 0xB516,
04728     0x8AFB, 0xB517, 0x8AFC, 0xB519, 0x8AFD, 0xB51A, 0x8AFE, 0xB51D,
04729     0x8B41, 0xB51E, 0x8B42, 0xB51F, 0x8B43, 0xB520, 0x8B44, 0xB521,
04730     0x8B45, 0xB522, 0x8B46, 0xB523, 0x8B47, 0xB526, 0x8B48, 0xB52B,
04731     0x8B49, 0xB52C, 0x8B4A, 0xB52D, 0x8B4B, 0xB52E, 0x8B4C, 0xB52F,
04732     0x8B4D, 0xB532, 0x8B4E, 0xB533, 0x8B4F, 0xB535, 0x8B50, 0xB536,
04733     0x8B51, 0xB537, 0x8B52, 0xB539, 0x8B53, 0xB53A, 0x8B54, 0xB53B,
04734     0x8B55, 0xB53C, 0x8B56, 0xB53D, 0x8B57, 0xB53E, 0x8B58, 0xB53F,
04735     0x8B59, 0xB542, 0x8B5A, 0xB546, 0x8B61, 0xB547, 0x8B62, 0xB548,
04736     0x8B63, 0xB549, 0x8B64, 0xB54A, 0x8B65, 0xB54E, 0x8B66, 0xB54F,
04737     0x8B67, 0xB551, 0x8B68, 0xB552, 0x8B69, 0xB553, 0x8B6A, 0xB555,
04738     0x8B6B, 0xB556, 0x8B6C, 0xB557, 0x8B6D, 0xB558, 0x8B6E, 0xB559,
04739     0x8B6F, 0xB55A, 0x8B70, 0xB55B, 0x8B71, 0xB55E, 0x8B72, 0xB562,
04740     0x8B73, 0xB563, 0x8B74, 0xB564, 0x8B75, 0xB565, 0x8B76, 0xB566,
04741     0x8B77, 0xB567, 0x8B78, 0xB568, 0x8B79, 0xB569, 0x8B7A, 0xB56A,
04742     0x8B81, 0xB56B, 0x8B82, 0xB56C, 0x8B83, 0xB56D, 0x8B84, 0xB56E,
04743     0x8B85, 0xB56F, 0x8B86, 0xB570, 0x8B87, 0xB571, 0x8B88, 0xB572,
04744     0x8B89, 0xB573, 0x8B8A, 0xB574, 0x8B8B, 0xB575, 0x8B8C, 0xB576,
04745     0x8B8D, 0xB577, 0x8B8E, 0xB578, 0x8B8F, 0xB579, 0x8B90, 0xB57A,
04746     0x8B91, 0xB57B, 0x8B92, 0xB57C, 0x8B93, 0xB57D, 0x8B94, 0xB57E,
04747     0x8B95, 0xB57F, 0x8B96, 0xB580, 0x8B97, 0xB581, 0x8B98, 0xB582,
04748     0x8B99, 0xB583, 0x8B9A, 0xB584, 0x8B9B, 0xB585, 0x8B9C, 0xB586,
04749     0x8B9D, 0xB587, 0x8B9E, 0xB588, 0x8B9F, 0xB589, 0x8BA0, 0xB58A,
04750     0x8BA1, 0xB58B, 0x8BA2, 0xB58C, 0x8BA3, 0xB58D, 0x8BA4, 0xB58E,
04751     0x8BA5, 0xB58F, 0x8BA6, 0xB590, 0x8BA7, 0xB591, 0x8BA8, 0xB592,
04752     0x8BA9, 0xB593, 0x8BAA, 0xB594, 0x8BAB, 0xB595, 0x8BAC, 0xB596,
04753     0x8BAD, 0xB597, 0x8BAE, 0xB598, 0x8BAF, 0xB599, 0x8BB0, 0xB59A,
04754     0x8BB1, 0xB59B, 0x8BB2, 0xB59C, 0x8BB3, 0xB59D, 0x8BB4, 0xB59E,
04755     0x8BB5, 0xB59F, 0x8BB6, 0xB5A2, 0x8BB7, 0xB5A3, 0x8BB8, 0xB5A5,
04756     0x8BB9, 0xB5A6, 0x8BBA, 0xB5A7, 0x8BBB, 0xB5A9, 0x8BBC, 0xB5AC,
04757     0x8BBD, 0xB5AD, 0x8BBE, 0xB5AE, 0x8BBF, 0xB5AF, 0x8BC0, 0xB5B2,
04758     0x8BC1, 0xB5B6, 0x8BC2, 0xB5B7, 0x8BC3, 0xB5B8, 0x8BC4, 0xB5B9,
04759     0x8BC5, 0xB5BA, 0x8BC6, 0xB5BE, 0x8BC7, 0xB5BF, 0x8BC8, 0xB5C1,
04760     0x8BC9, 0xB5C2, 0x8BCA, 0xB5C3, 0x8BCB, 0xB5C5, 0x8BCC, 0xB5C6,
04761     0x8BCD, 0xB5C7, 0x8BCE, 0xB5C8, 0x8BCF, 0xB5C9, 0x8BD0, 0xB5CA,
04762     0x8BD1, 0xB5CB, 0x8BD2, 0xB5CE, 0x8BD3, 0xB5D2, 0x8BD4, 0xB5D3,
04763     0x8BD5, 0xB5D4, 0x8BD6, 0xB5D5, 0x8BD7, 0xB5D6, 0x8BD8, 0xB5D7,
04764     0x8BD9, 0xB5D9, 0x8BDA, 0xB5DA, 0x8BDB, 0xB5DB, 0x8BDC, 0xB5DC,
04765     0x8BDD, 0xB5DD, 0x8BDE, 0xB5DE, 0x8BDF, 0xB5DF, 0x8BE0, 0xB5E0,
04766     0x8BE1, 0xB5E1, 0x8BE2, 0xB5E2, 0x8BE3, 0xB5E3, 0x8BE4, 0xB5E4,
04767     0x8BE5, 0xB5E5, 0x8BE6, 0xB5E6, 0x8BE7, 0xB5E7, 0x8BE8, 0xB5E8,
04768     0x8BE9, 0xB5E9, 0x8BEA, 0xB5EA, 0x8BEB, 0xB5EB, 0x8BEC, 0xB5ED,
04769     0x8BED, 0xB5EE, 0x8BEE, 0xB5EF, 0x8BEF, 0xB5F0, 0x8BF0, 0xB5F1,
04770     0x8BF1, 0xB5F2, 0x8BF2, 0xB5F3, 0x8BF3, 0xB5F4, 0x8BF4, 0xB5F5,
04771     0x8BF5, 0xB5F6, 0x8BF6, 0xB5F7, 0x8BF7, 0xB5F8, 0x8BF8, 0xB5F9,
04772     0x8BF9, 0xB5FA, 0x8BFA, 0xB5FB, 0x8BFB, 0xB5FC, 0x8BFC, 0xB5FD,
04773     0x8BFD, 0xB5FE, 0x8BFE, 0xB5FF, 0x8C41, 0xB600, 0x8C42, 0xB601,
04774     0x8C43, 0xB602, 0x8C44, 0xB603, 0x8C45, 0xB604, 0x8C46, 0xB605,
04775     0x8C47, 0xB606, 0x8C48, 0xB607, 0x8C49, 0xB608, 0x8C4A, 0xB609,
04776     0x8C4B, 0xB60A, 0x8C4C, 0xB60B, 0x8C4D, 0xB60C, 0x8C4E, 0xB60D,
04777     0x8C4F, 0xB60E, 0x8C50, 0xB60F, 0x8C51, 0xB612, 0x8C52, 0xB613,
04778     0x8C53, 0xB615, 0x8C54, 0xB616, 0x8C55, 0xB617, 0x8C56, 0xB619,
04779     0x8C57, 0xB61A, 0x8C58, 0xB61B, 0x8C59, 0xB61C, 0x8C5A, 0xB61D,
04780     0x8C61, 0xB61E, 0x8C62, 0xB61F, 0x8C63, 0xB620, 0x8C64, 0xB621,
04781     0x8C65, 0xB622, 0x8C66, 0xB623, 0x8C67, 0xB624, 0x8C68, 0xB626,
04782     0x8C69, 0xB627, 0x8C6A, 0xB628, 0x8C6B, 0xB629, 0x8C6C, 0xB62A,
04783     0x8C6D, 0xB62B, 0x8C6E, 0xB62D, 0x8C6F, 0xB62E, 0x8C70, 0xB62F,
04784     0x8C71, 0xB630, 0x8C72, 0xB631, 0x8C73, 0xB632, 0x8C74, 0xB633,
04785     0x8C75, 0xB635, 0x8C76, 0xB636, 0x8C77, 0xB637, 0x8C78, 0xB638,
04786     0x8C79, 0xB639, 0x8C7A, 0xB63A, 0x8C81, 0xB63B, 0x8C82, 0xB63C,
04787     0x8C83, 0xB63D, 0x8C84, 0xB63E, 0x8C85, 0xB63F, 0x8C86, 0xB640,
04788     0x8C87, 0xB641, 0x8C88, 0xB642, 0x8C89, 0xB643, 0x8C8A, 0xB644,
04789     0x8C8B, 0xB645, 0x8C8C, 0xB646, 0x8C8D, 0xB647, 0x8C8E, 0xB649,
04790     0x8C8F, 0xB64A, 0x8C90, 0xB64B, 0x8C91, 0xB64C, 0x8C92, 0xB64D,
04791     0x8C93, 0xB64E, 0x8C94, 0xB64F, 0x8C95, 0xB650, 0x8C96, 0xB651,
04792     0x8C97, 0xB652, 0x8C98, 0xB653, 0x8C99, 0xB654, 0x8C9A, 0xB655,
04793     0x8C9B, 0xB656, 0x8C9C, 0xB657, 0x8C9D, 0xB658, 0x8C9E, 0xB659,
04794     0x8C9F, 0xB65A, 0x8CA0, 0xB65B, 0x8CA1, 0xB65C, 0x8CA2, 0xB65D,
04795     0x8CA3, 0xB65E, 0x8CA4, 0xB65F, 0x8CA5, 0xB660, 0x8CA6, 0xB661,
04796     0x8CA7, 0xB662, 0x8CA8, 0xB663, 0x8CA9, 0xB665, 0x8CAA, 0xB666,
04797     0x8CAB, 0xB667, 0x8CAC, 0xB669, 0x8CAD, 0xB66A, 0x8CAE, 0xB66B,
04798     0x8CAF, 0xB66C, 0x8CB0, 0xB66D, 0x8CB1, 0xB66E, 0x8CB2, 0xB66F,
04799     0x8CB3, 0xB670, 0x8CB4, 0xB671, 0x8CB5, 0xB672, 0x8CB6, 0xB673,
04800     0x8CB7, 0xB674, 0x8CB8, 0xB675, 0x8CB9, 0xB676, 0x8CBA, 0xB677,
04801     0x8CBB, 0xB678, 0x8CBC, 0xB679, 0x8CBD, 0xB67A, 0x8CBE, 0xB67B,
04802     0x8CBF, 0xB67C, 0x8CC0, 0xB67D, 0x8CC1, 0xB67E, 0x8CC2, 0xB67F,
04803     0x8CC3, 0xB680, 0x8CC4, 0xB681, 0x8CC5, 0xB682, 0x8CC6, 0xB683,
04804     0x8CC7, 0xB684, 0x8CC8, 0xB685, 0x8CC9, 0xB686, 0x8CCA, 0xB687,
04805     0x8CCB, 0xB688, 0x8CCC, 0xB689, 0x8CCD, 0xB68A, 0x8CCE, 0xB68B,
04806     0x8CCF, 0xB68C, 0x8CD0, 0xB68D, 0x8CD1, 0xB68E, 0x8CD2, 0xB68F,
04807     0x8CD3, 0xB690, 0x8CD4, 0xB691, 0x8CD5, 0xB692, 0x8CD6, 0xB693,
04808     0x8CD7, 0xB694, 0x8CD8, 0xB695, 0x8CD9, 0xB696, 0x8CDA, 0xB697,
04809     0x8CDB, 0xB698, 0x8CDC, 0xB699, 0x8CDD, 0xB69A, 0x8CDE, 0xB69B,
04810     0x8CDF, 0xB69E, 0x8CE0, 0xB69F, 0x8CE1, 0xB6A1, 0x8CE2, 0xB6A2,
04811     0x8CE3, 0xB6A3, 0x8CE4, 0xB6A5, 0x8CE5, 0xB6A6, 0x8CE6, 0xB6A7,
04812     0x8CE7, 0xB6A8, 0x8CE8, 0xB6A9, 0x8CE9, 0xB6AA, 0x8CEA, 0xB6AD,
04813     0x8CEB, 0xB6AE, 0x8CEC, 0xB6AF, 0x8CED, 0xB6B0, 0x8CEE, 0xB6B2,
04814     0x8CEF, 0xB6B3, 0x8CF0, 0xB6B4, 0x8CF1, 0xB6B5, 0x8CF2, 0xB6B6,
04815     0x8CF3, 0xB6B7, 0x8CF4, 0xB6B8, 0x8CF5, 0xB6B9, 0x8CF6, 0xB6BA,
04816     0x8CF7, 0xB6BB, 0x8CF8, 0xB6BC, 0x8CF9, 0xB6BD, 0x8CFA, 0xB6BE,
04817     0x8CFB, 0xB6BF, 0x8CFC, 0xB6C0, 0x8CFD, 0xB6C1, 0x8CFE, 0xB6C2,
04818     0x8D41, 0xB6C3, 0x8D42, 0xB6C4, 0x8D43, 0xB6C5, 0x8D44, 0xB6C6,
04819     0x8D45, 0xB6C7, 0x8D46, 0xB6C8, 0x8D47, 0xB6C9, 0x8D48, 0xB6CA,
04820     0x8D49, 0xB6CB, 0x8D4A, 0xB6CC, 0x8D4B, 0xB6CD, 0x8D4C, 0xB6CE,
04821     0x8D4D, 0xB6CF, 0x8D4E, 0xB6D0, 0x8D4F, 0xB6D1, 0x8D50, 0xB6D2,
04822     0x8D51, 0xB6D3, 0x8D52, 0xB6D5, 0x8D53, 0xB6D6, 0x8D54, 0xB6D7,
04823     0x8D55, 0xB6D8, 0x8D56, 0xB6D9, 0x8D57, 0xB6DA, 0x8D58, 0xB6DB,
04824     0x8D59, 0xB6DC, 0x8D5A, 0xB6DD, 0x8D61, 0xB6DE, 0x8D62, 0xB6DF,
04825     0x8D63, 0xB6E0, 0x8D64, 0xB6E1, 0x8D65, 0xB6E2, 0x8D66, 0xB6E3,
04826     0x8D67, 0xB6E4, 0x8D68, 0xB6E5, 0x8D69, 0xB6E6, 0x8D6A, 0xB6E7,
04827     0x8D6B, 0xB6E8, 0x8D6C, 0xB6E9, 0x8D6D, 0xB6EA, 0x8D6E, 0xB6EB,
04828     0x8D6F, 0xB6EC, 0x8D70, 0xB6ED, 0x8D71, 0xB6EE, 0x8D72, 0xB6EF,
04829     0x8D73, 0xB6F1, 0x8D74, 0xB6F2, 0x8D75, 0xB6F3, 0x8D76, 0xB6F5,
04830     0x8D77, 0xB6F6, 0x8D78, 0xB6F7, 0x8D79, 0xB6F9, 0x8D7A, 0xB6FA,
04831     0x8D81, 0xB6FB, 0x8D82, 0xB6FC, 0x8D83, 0xB6FD, 0x8D84, 0xB6FE,
04832     0x8D85, 0xB6FF, 0x8D86, 0xB702, 0x8D87, 0xB703, 0x8D88, 0xB704,
04833     0x8D89, 0xB706, 0x8D8A, 0xB707, 0x8D8B, 0xB708, 0x8D8C, 0xB709,
04834     0x8D8D, 0xB70A, 0x8D8E, 0xB70B, 0x8D8F, 0xB70C, 0x8D90, 0xB70D,
04835     0x8D91, 0xB70E, 0x8D92, 0xB70F, 0x8D93, 0xB710, 0x8D94, 0xB711,
04836     0x8D95, 0xB712, 0x8D96, 0xB713, 0x8D97, 0xB714, 0x8D98, 0xB715,
04837     0x8D99, 0xB716, 0x8D9A, 0xB717, 0x8D9B, 0xB718, 0x8D9C, 0xB719,
04838     0x8D9D, 0xB71A, 0x8D9E, 0xB71B, 0x8D9F, 0xB71C, 0x8DA0, 0xB71D,
04839     0x8DA1, 0xB71E, 0x8DA2, 0xB71F, 0x8DA3, 0xB720, 0x8DA4, 0xB721,
04840     0x8DA5, 0xB722, 0x8DA6, 0xB723, 0x8DA7, 0xB724, 0x8DA8, 0xB725,
04841     0x8DA9, 0xB726, 0x8DAA, 0xB727, 0x8DAB, 0xB72A, 0x8DAC, 0xB72B,
04842     0x8DAD, 0xB72D, 0x8DAE, 0xB72E, 0x8DAF, 0xB731, 0x8DB0, 0xB732,
04843     0x8DB1, 0xB733, 0x8DB2, 0xB734, 0x8DB3, 0xB735, 0x8DB4, 0xB736,
04844     0x8DB5, 0xB737, 0x8DB6, 0xB73A, 0x8DB7, 0xB73C, 0x8DB8, 0xB73D,
04845     0x8DB9, 0xB73E, 0x8DBA, 0xB73F, 0x8DBB, 0xB740, 0x8DBC, 0xB741,
04846     0x8DBD, 0xB742, 0x8DBE, 0xB743, 0x8DBF, 0xB745, 0x8DC0, 0xB746,
04847     0x8DC1, 0xB747, 0x8DC2, 0xB749, 0x8DC3, 0xB74A, 0x8DC4, 0xB74B,
04848     0x8DC5, 0xB74D, 0x8DC6, 0xB74E, 0x8DC7, 0xB74F, 0x8DC8, 0xB750,
04849     0x8DC9, 0xB751, 0x8DCA, 0xB752, 0x8DCB, 0xB753, 0x8DCC, 0xB756,
04850     0x8DCD, 0xB757, 0x8DCE, 0xB758, 0x8DCF, 0xB759, 0x8DD0, 0xB75A,
04851     0x8DD1, 0xB75B, 0x8DD2, 0xB75C, 0x8DD3, 0xB75D, 0x8DD4, 0xB75E,
04852     0x8DD5, 0xB75F, 0x8DD6, 0xB761, 0x8DD7, 0xB762, 0x8DD8, 0xB763,
04853     0x8DD9, 0xB765, 0x8DDA, 0xB766, 0x8DDB, 0xB767, 0x8DDC, 0xB769,
04854     0x8DDD, 0xB76A, 0x8DDE, 0xB76B, 0x8DDF, 0xB76C, 0x8DE0, 0xB76D,
04855     0x8DE1, 0xB76E, 0x8DE2, 0xB76F, 0x8DE3, 0xB772, 0x8DE4, 0xB774,
04856     0x8DE5, 0xB776, 0x8DE6, 0xB777, 0x8DE7, 0xB778, 0x8DE8, 0xB779,
04857     0x8DE9, 0xB77A, 0x8DEA, 0xB77B, 0x8DEB, 0xB77E, 0x8DEC, 0xB77F,
04858     0x8DED, 0xB781, 0x8DEE, 0xB782, 0x8DEF, 0xB783, 0x8DF0, 0xB785,
04859     0x8DF1, 0xB786, 0x8DF2, 0xB787, 0x8DF3, 0xB788, 0x8DF4, 0xB789,
04860     0x8DF5, 0xB78A, 0x8DF6, 0xB78B, 0x8DF7, 0xB78E, 0x8DF8, 0xB793,
04861     0x8DF9, 0xB794, 0x8DFA, 0xB795, 0x8DFB, 0xB79A, 0x8DFC, 0xB79B,
04862     0x8DFD, 0xB79D, 0x8DFE, 0xB79E, 0x8E41, 0xB79F, 0x8E42, 0xB7A1,
04863     0x8E43, 0xB7A2, 0x8E44, 0xB7A3, 0x8E45, 0xB7A4, 0x8E46, 0xB7A5,
04864     0x8E47, 0xB7A6, 0x8E48, 0xB7A7, 0x8E49, 0xB7AA, 0x8E4A, 0xB7AE,
04865     0x8E4B, 0xB7AF, 0x8E4C, 0xB7B0, 0x8E4D, 0xB7B1, 0x8E4E, 0xB7B2,
04866     0x8E4F, 0xB7B3, 0x8E50, 0xB7B6, 0x8E51, 0xB7B7, 0x8E52, 0xB7B9,
04867     0x8E53, 0xB7BA, 0x8E54, 0xB7BB, 0x8E55, 0xB7BC, 0x8E56, 0xB7BD,
04868     0x8E57, 0xB7BE, 0x8E58, 0xB7BF, 0x8E59, 0xB7C0, 0x8E5A, 0xB7C1,
04869     0x8E61, 0xB7C2, 0x8E62, 0xB7C3, 0x8E63, 0xB7C4, 0x8E64, 0xB7C5,
04870     0x8E65, 0xB7C6, 0x8E66, 0xB7C8, 0x8E67, 0xB7CA, 0x8E68, 0xB7CB,
04871     0x8E69, 0xB7CC, 0x8E6A, 0xB7CD, 0x8E6B, 0xB7CE, 0x8E6C, 0xB7CF,
04872     0x8E6D, 0xB7D0, 0x8E6E, 0xB7D1, 0x8E6F, 0xB7D2, 0x8E70, 0xB7D3,
04873     0x8E71, 0xB7D4, 0x8E72, 0xB7D5, 0x8E73, 0xB7D6, 0x8E74, 0xB7D7,
04874     0x8E75, 0xB7D8, 0x8E76, 0xB7D9, 0x8E77, 0xB7DA, 0x8E78, 0xB7DB,
04875     0x8E79, 0xB7DC, 0x8E7A, 0xB7DD, 0x8E81, 0xB7DE, 0x8E82, 0xB7DF,
04876     0x8E83, 0xB7E0, 0x8E84, 0xB7E1, 0x8E85, 0xB7E2, 0x8E86, 0xB7E3,
04877     0x8E87, 0xB7E4, 0x8E88, 0xB7E5, 0x8E89, 0xB7E6, 0x8E8A, 0xB7E7,
04878     0x8E8B, 0xB7E8, 0x8E8C, 0xB7E9, 0x8E8D, 0xB7EA, 0x8E8E, 0xB7EB,
04879     0x8E8F, 0xB7EE, 0x8E90, 0xB7EF, 0x8E91, 0xB7F1, 0x8E92, 0xB7F2,
04880     0x8E93, 0xB7F3, 0x8E94, 0xB7F5, 0x8E95, 0xB7F6, 0x8E96, 0xB7F7,
04881     0x8E97, 0xB7F8, 0x8E98, 0xB7F9, 0x8E99, 0xB7FA, 0x8E9A, 0xB7FB,
04882     0x8E9B, 0xB7FE, 0x8E9C, 0xB802, 0x8E9D, 0xB803, 0x8E9E, 0xB804,
04883     0x8E9F, 0xB805, 0x8EA0, 0xB806, 0x8EA1, 0xB80A, 0x8EA2, 0xB80B,
04884     0x8EA3, 0xB80D, 0x8EA4, 0xB80E, 0x8EA5, 0xB80F, 0x8EA6, 0xB811,
04885     0x8EA7, 0xB812, 0x8EA8, 0xB813, 0x8EA9, 0xB814, 0x8EAA, 0xB815,
04886     0x8EAB, 0xB816, 0x8EAC, 0xB817, 0x8EAD, 0xB81A, 0x8EAE, 0xB81C,
04887     0x8EAF, 0xB81E, 0x8EB0, 0xB81F, 0x8EB1, 0xB820, 0x8EB2, 0xB821,
04888     0x8EB3, 0xB822, 0x8EB4, 0xB823, 0x8EB5, 0xB826, 0x8EB6, 0xB827,
04889     0x8EB7, 0xB829, 0x8EB8, 0xB82A, 0x8EB9, 0xB82B, 0x8EBA, 0xB82D,
04890     0x8EBB, 0xB82E, 0x8EBC, 0xB82F, 0x8EBD, 0xB830, 0x8EBE, 0xB831,
04891     0x8EBF, 0xB832, 0x8EC0, 0xB833, 0x8EC1, 0xB836, 0x8EC2, 0xB83A,
04892     0x8EC3, 0xB83B, 0x8EC4, 0xB83C, 0x8EC5, 0xB83D, 0x8EC6, 0xB83E,
04893     0x8EC7, 0xB83F, 0x8EC8, 0xB841, 0x8EC9, 0xB842, 0x8ECA, 0xB843,
04894     0x8ECB, 0xB845, 0x8ECC, 0xB846, 0x8ECD, 0xB847, 0x8ECE, 0xB848,
04895     0x8ECF, 0xB849, 0x8ED0, 0xB84A, 0x8ED1, 0xB84B, 0x8ED2, 0xB84C,
04896     0x8ED3, 0xB84D, 0x8ED4, 0xB84E, 0x8ED5, 0xB84F, 0x8ED6, 0xB850,
04897     0x8ED7, 0xB852, 0x8ED8, 0xB854, 0x8ED9, 0xB855, 0x8EDA, 0xB856,
04898     0x8EDB, 0xB857, 0x8EDC, 0xB858, 0x8EDD, 0xB859, 0x8EDE, 0xB85A,
04899     0x8EDF, 0xB85B, 0x8EE0, 0xB85E, 0x8EE1, 0xB85F, 0x8EE2, 0xB861,
04900     0x8EE3, 0xB862, 0x8EE4, 0xB863, 0x8EE5, 0xB865, 0x8EE6, 0xB866,
04901     0x8EE7, 0xB867, 0x8EE8, 0xB868, 0x8EE9, 0xB869, 0x8EEA, 0xB86A,
04902     0x8EEB, 0xB86B, 0x8EEC, 0xB86E, 0x8EED, 0xB870, 0x8EEE, 0xB872,
04903     0x8EEF, 0xB873, 0x8EF0, 0xB874, 0x8EF1, 0xB875, 0x8EF2, 0xB876,
04904     0x8EF3, 0xB877, 0x8EF4, 0xB879, 0x8EF5, 0xB87A, 0x8EF6, 0xB87B,
04905     0x8EF7, 0xB87D, 0x8EF8, 0xB87E, 0x8EF9, 0xB87F, 0x8EFA, 0xB880,
04906     0x8EFB, 0xB881, 0x8EFC, 0xB882, 0x8EFD, 0xB883, 0x8EFE, 0xB884,
04907     0x8F41, 0xB885, 0x8F42, 0xB886, 0x8F43, 0xB887, 0x8F44, 0xB888,
04908     0x8F45, 0xB889, 0x8F46, 0xB88A, 0x8F47, 0xB88B, 0x8F48, 0xB88C,
04909     0x8F49, 0xB88E, 0x8F4A, 0xB88F, 0x8F4B, 0xB890, 0x8F4C, 0xB891,
04910     0x8F4D, 0xB892, 0x8F4E, 0xB893, 0x8F4F, 0xB894, 0x8F50, 0xB895,
04911     0x8F51, 0xB896, 0x8F52, 0xB897, 0x8F53, 0xB898, 0x8F54, 0xB899,
04912     0x8F55, 0xB89A, 0x8F56, 0xB89B, 0x8F57, 0xB89C, 0x8F58, 0xB89D,
04913     0x8F59, 0xB89E, 0x8F5A, 0xB89F, 0x8F61, 0xB8A0, 0x8F62, 0xB8A1,
04914     0x8F63, 0xB8A2, 0x8F64, 0xB8A3, 0x8F65, 0xB8A4, 0x8F66, 0xB8A5,
04915     0x8F67, 0xB8A6, 0x8F68, 0xB8A7, 0x8F69, 0xB8A9, 0x8F6A, 0xB8AA,
04916     0x8F6B, 0xB8AB, 0x8F6C, 0xB8AC, 0x8F6D, 0xB8AD, 0x8F6E, 0xB8AE,
04917     0x8F6F, 0xB8AF, 0x8F70, 0xB8B1, 0x8F71, 0xB8B2, 0x8F72, 0xB8B3,
04918     0x8F73, 0xB8B5, 0x8F74, 0xB8B6, 0x8F75, 0xB8B7, 0x8F76, 0xB8B9,
04919     0x8F77, 0xB8BA, 0x8F78, 0xB8BB, 0x8F79, 0xB8BC, 0x8F7A, 0xB8BD,
04920     0x8F81, 0xB8BE, 0x8F82, 0xB8BF, 0x8F83, 0xB8C2, 0x8F84, 0xB8C4,
04921     0x8F85, 0xB8C6, 0x8F86, 0xB8C7, 0x8F87, 0xB8C8, 0x8F88, 0xB8C9,
04922     0x8F89, 0xB8CA, 0x8F8A, 0xB8CB, 0x8F8B, 0xB8CD, 0x8F8C, 0xB8CE,
04923     0x8F8D, 0xB8CF, 0x8F8E, 0xB8D1, 0x8F8F, 0xB8D2, 0x8F90, 0xB8D3,
04924     0x8F91, 0xB8D5, 0x8F92, 0xB8D6, 0x8F93, 0xB8D7, 0x8F94, 0xB8D8,
04925     0x8F95, 0xB8D9, 0x8F96, 0xB8DA, 0x8F97, 0xB8DB, 0x8F98, 0xB8DC,
04926     0x8F99, 0xB8DE, 0x8F9A, 0xB8E0, 0x8F9B, 0xB8E2, 0x8F9C, 0xB8E3,
04927     0x8F9D, 0xB8E4, 0x8F9E, 0xB8E5, 0x8F9F, 0xB8E6, 0x8FA0, 0xB8E7,
04928     0x8FA1, 0xB8EA, 0x8FA2, 0xB8EB, 0x8FA3, 0xB8ED, 0x8FA4, 0xB8EE,
04929     0x8FA5, 0xB8EF, 0x8FA6, 0xB8F1, 0x8FA7, 0xB8F2, 0x8FA8, 0xB8F3,
04930     0x8FA9, 0xB8F4, 0x8FAA, 0xB8F5, 0x8FAB, 0xB8F6, 0x8FAC, 0xB8F7,
04931     0x8FAD, 0xB8FA, 0x8FAE, 0xB8FC, 0x8FAF, 0xB8FE, 0x8FB0, 0xB8FF,
04932     0x8FB1, 0xB900, 0x8FB2, 0xB901, 0x8FB3, 0xB902, 0x8FB4, 0xB903,
04933     0x8FB5, 0xB905, 0x8FB6, 0xB906, 0x8FB7, 0xB907, 0x8FB8, 0xB908,
04934     0x8FB9, 0xB909, 0x8FBA, 0xB90A, 0x8FBB, 0xB90B, 0x8FBC, 0xB90C,
04935     0x8FBD, 0xB90D, 0x8FBE, 0xB90E, 0x8FBF, 0xB90F, 0x8FC0, 0xB910,
04936     0x8FC1, 0xB911, 0x8FC2, 0xB912, 0x8FC3, 0xB913, 0x8FC4, 0xB914,
04937     0x8FC5, 0xB915, 0x8FC6, 0xB916, 0x8FC7, 0xB917, 0x8FC8, 0xB919,
04938     0x8FC9, 0xB91A, 0x8FCA, 0xB91B, 0x8FCB, 0xB91C, 0x8FCC, 0xB91D,
04939     0x8FCD, 0xB91E, 0x8FCE, 0xB91F, 0x8FCF, 0xB921, 0x8FD0, 0xB922,
04940     0x8FD1, 0xB923, 0x8FD2, 0xB924, 0x8FD3, 0xB925, 0x8FD4, 0xB926,
04941     0x8FD5, 0xB927, 0x8FD6, 0xB928, 0x8FD7, 0xB929, 0x8FD8, 0xB92A,
04942     0x8FD9, 0xB92B, 0x8FDA, 0xB92C, 0x8FDB, 0xB92D, 0x8FDC, 0xB92E,
04943     0x8FDD, 0xB92F, 0x8FDE, 0xB930, 0x8FDF, 0xB931, 0x8FE0, 0xB932,
04944     0x8FE1, 0xB933, 0x8FE2, 0xB934, 0x8FE3, 0xB935, 0x8FE4, 0xB936,
04945     0x8FE5, 0xB937, 0x8FE6, 0xB938, 0x8FE7, 0xB939, 0x8FE8, 0xB93A,
04946     0x8FE9, 0xB93B, 0x8FEA, 0xB93E, 0x8FEB, 0xB93F, 0x8FEC, 0xB941,
04947     0x8FED, 0xB942, 0x8FEE, 0xB943, 0x8FEF, 0xB945, 0x8FF0, 0xB946,
04948     0x8FF1, 0xB947, 0x8FF2, 0xB948, 0x8FF3, 0xB949, 0x8FF4, 0xB94A,
04949     0x8FF5, 0xB94B, 0x8FF6, 0xB94D, 0x8FF7, 0xB94E, 0x8FF8, 0xB950,
04950     0x8FF9, 0xB952, 0x8FFA, 0xB953, 0x8FFB, 0xB954, 0x8FFC, 0xB955,
04951     0x8FFD, 0xB956, 0x8FFE, 0xB957, 0x9041, 0xB95A, 0x9042, 0xB95B,
04952     0x9043, 0xB95D, 0x9044, 0xB95E, 0x9045, 0xB95F, 0x9046, 0xB961,
04953     0x9047, 0xB962, 0x9048, 0xB963, 0x9049, 0xB964, 0x904A, 0xB965,
04954     0x904B, 0xB966, 0x904C, 0xB967, 0x904D, 0xB96A, 0x904E, 0xB96C,
04955     0x904F, 0xB96E, 0x9050, 0xB96F, 0x9051, 0xB970, 0x9052, 0xB971,
04956     0x9053, 0xB972, 0x9054, 0xB973, 0x9055, 0xB976, 0x9056, 0xB977,
04957     0x9057, 0xB979, 0x9058, 0xB97A, 0x9059, 0xB97B, 0x905A, 0xB97D,
04958     0x9061, 0xB97E, 0x9062, 0xB97F, 0x9063, 0xB980, 0x9064, 0xB981,
04959     0x9065, 0xB982, 0x9066, 0xB983, 0x9067, 0xB986, 0x9068, 0xB988,
04960     0x9069, 0xB98B, 0x906A, 0xB98C, 0x906B, 0xB98F, 0x906C, 0xB990,
04961     0x906D, 0xB991, 0x906E, 0xB992, 0x906F, 0xB993, 0x9070, 0xB994,
04962     0x9071, 0xB995, 0x9072, 0xB996, 0x9073, 0xB997, 0x9074, 0xB998,
04963     0x9075, 0xB999, 0x9076, 0xB99A, 0x9077, 0xB99B, 0x9078, 0xB99C,
04964     0x9079, 0xB99D, 0x907A, 0xB99E, 0x9081, 0xB99F, 0x9082, 0xB9A0,
04965     0x9083, 0xB9A1, 0x9084, 0xB9A2, 0x9085, 0xB9A3, 0x9086, 0xB9A4,
04966     0x9087, 0xB9A5, 0x9088, 0xB9A6, 0x9089, 0xB9A7, 0x908A, 0xB9A8,
04967     0x908B, 0xB9A9, 0x908C, 0xB9AA, 0x908D, 0xB9AB, 0x908E, 0xB9AE,
04968     0x908F, 0xB9AF, 0x9090, 0xB9B1, 0x9091, 0xB9B2, 0x9092, 0xB9B3,
04969     0x9093, 0xB9B5, 0x9094, 0xB9B6, 0x9095, 0xB9B7, 0x9096, 0xB9B8,
04970     0x9097, 0xB9B9, 0x9098, 0xB9BA, 0x9099, 0xB9BB, 0x909A, 0xB9BE,
04971     0x909B, 0xB9C0, 0x909C, 0xB9C2, 0x909D, 0xB9C3, 0x909E, 0xB9C4,
04972     0x909F, 0xB9C5, 0x90A0, 0xB9C6, 0x90A1, 0xB9C7, 0x90A2, 0xB9CA,
04973     0x90A3, 0xB9CB, 0x90A4, 0xB9CD, 0x90A5, 0xB9D3, 0x90A6, 0xB9D4,
04974     0x90A7, 0xB9D5, 0x90A8, 0xB9D6, 0x90A9, 0xB9D7, 0x90AA, 0xB9DA,
04975     0x90AB, 0xB9DC, 0x90AC, 0xB9DF, 0x90AD, 0xB9E0, 0x90AE, 0xB9E2,
04976     0x90AF, 0xB9E6, 0x90B0, 0xB9E7, 0x90B1, 0xB9E9, 0x90B2, 0xB9EA,
04977     0x90B3, 0xB9EB, 0x90B4, 0xB9ED, 0x90B5, 0xB9EE, 0x90B6, 0xB9EF,
04978     0x90B7, 0xB9F0, 0x90B8, 0xB9F1, 0x90B9, 0xB9F2, 0x90BA, 0xB9F3,
04979     0x90BB, 0xB9F6, 0x90BC, 0xB9FB, 0x90BD, 0xB9FC, 0x90BE, 0xB9FD,
04980     0x90BF, 0xB9FE, 0x90C0, 0xB9FF, 0x90C1, 0xBA02, 0x90C2, 0xBA03,
04981     0x90C3, 0xBA04, 0x90C4, 0xBA05, 0x90C5, 0xBA06, 0x90C6, 0xBA07,
04982     0x90C7, 0xBA09, 0x90C8, 0xBA0A, 0x90C9, 0xBA0B, 0x90CA, 0xBA0C,
04983     0x90CB, 0xBA0D, 0x90CC, 0xBA0E, 0x90CD, 0xBA0F, 0x90CE, 0xBA10,
04984     0x90CF, 0xBA11, 0x90D0, 0xBA12, 0x90D1, 0xBA13, 0x90D2, 0xBA14,
04985     0x90D3, 0xBA16, 0x90D4, 0xBA17, 0x90D5, 0xBA18, 0x90D6, 0xBA19,
04986     0x90D7, 0xBA1A, 0x90D8, 0xBA1B, 0x90D9, 0xBA1C, 0x90DA, 0xBA1D,
04987     0x90DB, 0xBA1E, 0x90DC, 0xBA1F, 0x90DD, 0xBA20, 0x90DE, 0xBA21,
04988     0x90DF, 0xBA22, 0x90E0, 0xBA23, 0x90E1, 0xBA24, 0x90E2, 0xBA25,
04989     0x90E3, 0xBA26, 0x90E4, 0xBA27, 0x90E5, 0xBA28, 0x90E6, 0xBA29,
04990     0x90E7, 0xBA2A, 0x90E8, 0xBA2B, 0x90E9, 0xBA2C, 0x90EA, 0xBA2D,
04991     0x90EB, 0xBA2E, 0x90EC, 0xBA2F, 0x90ED, 0xBA30, 0x90EE, 0xBA31,
04992     0x90EF, 0xBA32, 0x90F0, 0xBA33, 0x90F1, 0xBA34, 0x90F2, 0xBA35,
04993     0x90F3, 0xBA36, 0x90F4, 0xBA37, 0x90F5, 0xBA3A, 0x90F6, 0xBA3B,
04994     0x90F7, 0xBA3D, 0x90F8, 0xBA3E, 0x90F9, 0xBA3F, 0x90FA, 0xBA41,
04995     0x90FB, 0xBA43, 0x90FC, 0xBA44, 0x90FD, 0xBA45, 0x90FE, 0xBA46,
04996     0x9141, 0xBA47, 0x9142, 0xBA4A, 0x9143, 0xBA4C, 0x9144, 0xBA4F,
04997     0x9145, 0xBA50, 0x9146, 0xBA51, 0x9147, 0xBA52, 0x9148, 0xBA56,
04998     0x9149, 0xBA57, 0x914A, 0xBA59, 0x914B, 0xBA5A, 0x914C, 0xBA5B,
04999     0x914D, 0xBA5D, 0x914E, 0xBA5E, 0x914F, 0xBA5F, 0x9150, 0xBA60,
05000     0x9151, 0xBA61, 0x9152, 0xBA62, 0x9153, 0xBA63, 0x9154, 0xBA66,
05001     0x9155, 0xBA6A, 0x9156, 0xBA6B, 0x9157, 0xBA6C, 0x9158, 0xBA6D,
05002     0x9159, 0xBA6E, 0x915A, 0xBA6F, 0x9161, 0xBA72, 0x9162, 0xBA73,
05003     0x9163, 0xBA75, 0x9164, 0xBA76, 0x9165, 0xBA77, 0x9166, 0xBA79,
05004     0x9167, 0xBA7A, 0x9168, 0xBA7B, 0x9169, 0xBA7C, 0x916A, 0xBA7D,
05005     0x916B, 0xBA7E, 0x916C, 0xBA7F, 0x916D, 0xBA80, 0x916E, 0xBA81,
05006     0x916F, 0xBA82, 0x9170, 0xBA86, 0x9171, 0xBA88, 0x9172, 0xBA89,
05007     0x9173, 0xBA8A, 0x9174, 0xBA8B, 0x9175, 0xBA8D, 0x9176, 0xBA8E,
05008     0x9177, 0xBA8F, 0x9178, 0xBA90, 0x9179, 0xBA91, 0x917A, 0xBA92,
05009     0x9181, 0xBA93, 0x9182, 0xBA94, 0x9183, 0xBA95, 0x9184, 0xBA96,
05010     0x9185, 0xBA97, 0x9186, 0xBA98, 0x9187, 0xBA99, 0x9188, 0xBA9A,
05011     0x9189, 0xBA9B, 0x918A, 0xBA9C, 0x918B, 0xBA9D, 0x918C, 0xBA9E,
05012     0x918D, 0xBA9F, 0x918E, 0xBAA0, 0x918F, 0xBAA1, 0x9190, 0xBAA2,
05013     0x9191, 0xBAA3, 0x9192, 0xBAA4, 0x9193, 0xBAA5, 0x9194, 0xBAA6,
05014     0x9195, 0xBAA7, 0x9196, 0xBAAA, 0x9197, 0xBAAD, 0x9198, 0xBAAE,
05015     0x9199, 0xBAAF, 0x919A, 0xBAB1, 0x919B, 0xBAB3, 0x919C, 0xBAB4,
05016     0x919D, 0xBAB5, 0x919E, 0xBAB6, 0x919F, 0xBAB7, 0x91A0, 0xBABA,
05017     0x91A1, 0xBABC, 0x91A2, 0xBABE, 0x91A3, 0xBABF, 0x91A4, 0xBAC0,
05018     0x91A5, 0xBAC1, 0x91A6, 0xBAC2, 0x91A7, 0xBAC3, 0x91A8, 0xBAC5,
05019     0x91A9, 0xBAC6, 0x91AA, 0xBAC7, 0x91AB, 0xBAC9, 0x91AC, 0xBACA,
05020     0x91AD, 0xBACB, 0x91AE, 0xBACC, 0x91AF, 0xBACD, 0x91B0, 0xBACE,
05021     0x91B1, 0xBACF, 0x91B2, 0xBAD0, 0x91B3, 0xBAD1, 0x91B4, 0xBAD2,
05022     0x91B5, 0xBAD3, 0x91B6, 0xBAD4, 0x91B7, 0xBAD5, 0x91B8, 0xBAD6,
05023     0x91B9, 0xBAD7, 0x91BA, 0xBADA, 0x91BB, 0xBADB, 0x91BC, 0xBADC,
05024     0x91BD, 0xBADD, 0x91BE, 0xBADE, 0x91BF, 0xBADF, 0x91C0, 0xBAE0,
05025     0x91C1, 0xBAE1, 0x91C2, 0xBAE2, 0x91C3, 0xBAE3, 0x91C4, 0xBAE4,
05026     0x91C5, 0xBAE5, 0x91C6, 0xBAE6, 0x91C7, 0xBAE7, 0x91C8, 0xBAE8,
05027     0x91C9, 0xBAE9, 0x91CA, 0xBAEA, 0x91CB, 0xBAEB, 0x91CC, 0xBAEC,
05028     0x91CD, 0xBAED, 0x91CE, 0xBAEE, 0x91CF, 0xBAEF, 0x91D0, 0xBAF0,
05029     0x91D1, 0xBAF1, 0x91D2, 0xBAF2, 0x91D3, 0xBAF3, 0x91D4, 0xBAF4,
05030     0x91D5, 0xBAF5, 0x91D6, 0xBAF6, 0x91D7, 0xBAF7, 0x91D8, 0xBAF8,
05031     0x91D9, 0xBAF9, 0x91DA, 0xBAFA, 0x91DB, 0xBAFB, 0x91DC, 0xBAFD,
05032     0x91DD, 0xBAFE, 0x91DE, 0xBAFF, 0x91DF, 0xBB01, 0x91E0, 0xBB02,
05033     0x91E1, 0xBB03, 0x91E2, 0xBB05, 0x91E3, 0xBB06, 0x91E4, 0xBB07,
05034     0x91E5, 0xBB08, 0x91E6, 0xBB09, 0x91E7, 0xBB0A, 0x91E8, 0xBB0B,
05035     0x91E9, 0xBB0C, 0x91EA, 0xBB0E, 0x91EB, 0xBB10, 0x91EC, 0xBB12,
05036     0x91ED, 0xBB13, 0x91EE, 0xBB14, 0x91EF, 0xBB15, 0x91F0, 0xBB16,
05037     0x91F1, 0xBB17, 0x91F2, 0xBB19, 0x91F3, 0xBB1A, 0x91F4, 0xBB1B,
05038     0x91F5, 0xBB1D, 0x91F6, 0xBB1E, 0x91F7, 0xBB1F, 0x91F8, 0xBB21,
05039     0x91F9, 0xBB22, 0x91FA, 0xBB23, 0x91FB, 0xBB24, 0x91FC, 0xBB25,
05040     0x91FD, 0xBB26, 0x91FE, 0xBB27, 0x9241, 0xBB28, 0x9242, 0xBB2A,
05041     0x9243, 0xBB2C, 0x9244, 0xBB2D, 0x9245, 0xBB2E, 0x9246, 0xBB2F,
05042     0x9247, 0xBB30, 0x9248, 0xBB31, 0x9249, 0xBB32, 0x924A, 0xBB33,
05043     0x924B, 0xBB37, 0x924C, 0xBB39, 0x924D, 0xBB3A, 0x924E, 0xBB3F,
05044     0x924F, 0xBB40, 0x9250, 0xBB41, 0x9251, 0xBB42, 0x9252, 0xBB43,
05045     0x9253, 0xBB46, 0x9254, 0xBB48, 0x9255, 0xBB4A, 0x9256, 0xBB4B,
05046     0x9257, 0xBB4C, 0x9258, 0xBB4E, 0x9259, 0xBB51, 0x925A, 0xBB52,
05047     0x9261, 0xBB53, 0x9262, 0xBB55, 0x9263, 0xBB56, 0x9264, 0xBB57,
05048     0x9265, 0xBB59, 0x9266, 0xBB5A, 0x9267, 0xBB5B, 0x9268, 0xBB5C,
05049     0x9269, 0xBB5D, 0x926A, 0xBB5E, 0x926B, 0xBB5F, 0x926C, 0xBB60,
05050     0x926D, 0xBB62, 0x926E, 0xBB64, 0x926F, 0xBB65, 0x9270, 0xBB66,
05051     0x9271, 0xBB67, 0x9272, 0xBB68, 0x9273, 0xBB69, 0x9274, 0xBB6A,
05052     0x9275, 0xBB6B, 0x9276, 0xBB6D, 0x9277, 0xBB6E, 0x9278, 0xBB6F,
05053     0x9279, 0xBB70, 0x927A, 0xBB71, 0x9281, 0xBB72, 0x9282, 0xBB73,
05054     0x9283, 0xBB74, 0x9284, 0xBB75, 0x9285, 0xBB76, 0x9286, 0xBB77,
05055     0x9287, 0xBB78, 0x9288, 0xBB79, 0x9289, 0xBB7A, 0x928A, 0xBB7B,
05056     0x928B, 0xBB7C, 0x928C, 0xBB7D, 0x928D, 0xBB7E, 0x928E, 0xBB7F,
05057     0x928F, 0xBB80, 0x9290, 0xBB81, 0x9291, 0xBB82, 0x9292, 0xBB83,
05058     0x9293, 0xBB84, 0x9294, 0xBB85, 0x9295, 0xBB86, 0x9296, 0xBB87,
05059     0x9297, 0xBB89, 0x9298, 0xBB8A, 0x9299, 0xBB8B, 0x929A, 0xBB8D,
05060     0x929B, 0xBB8E, 0x929C, 0xBB8F, 0x929D, 0xBB91, 0x929E, 0xBB92,
05061     0x929F, 0xBB93, 0x92A0, 0xBB94, 0x92A1, 0xBB95, 0x92A2, 0xBB96,
05062     0x92A3, 0xBB97, 0x92A4, 0xBB98, 0x92A5, 0xBB99, 0x92A6, 0xBB9A,
05063     0x92A7, 0xBB9B, 0x92A8, 0xBB9C, 0x92A9, 0xBB9D, 0x92AA, 0xBB9E,
05064     0x92AB, 0xBB9F, 0x92AC, 0xBBA0, 0x92AD, 0xBBA1, 0x92AE, 0xBBA2,
05065     0x92AF, 0xBBA3, 0x92B0, 0xBBA5, 0x92B1, 0xBBA6, 0x92B2, 0xBBA7,
05066     0x92B3, 0xBBA9, 0x92B4, 0xBBAA, 0x92B5, 0xBBAB, 0x92B6, 0xBBAD,
05067     0x92B7, 0xBBAE, 0x92B8, 0xBBAF, 0x92B9, 0xBBB0, 0x92BA, 0xBBB1,
05068     0x92BB, 0xBBB2, 0x92BC, 0xBBB3, 0x92BD, 0xBBB5, 0x92BE, 0xBBB6,
05069     0x92BF, 0xBBB8, 0x92C0, 0xBBB9, 0x92C1, 0xBBBA, 0x92C2, 0xBBBB,
05070     0x92C3, 0xBBBC, 0x92C4, 0xBBBD, 0x92C5, 0xBBBE, 0x92C6, 0xBBBF,
05071     0x92C7, 0xBBC1, 0x92C8, 0xBBC2, 0x92C9, 0xBBC3, 0x92CA, 0xBBC5,
05072     0x92CB, 0xBBC6, 0x92CC, 0xBBC7, 0x92CD, 0xBBC9, 0x92CE, 0xBBCA,
05073     0x92CF, 0xBBCB, 0x92D0, 0xBBCC, 0x92D1, 0xBBCD, 0x92D2, 0xBBCE,
05074     0x92D3, 0xBBCF, 0x92D4, 0xBBD1, 0x92D5, 0xBBD2, 0x92D6, 0xBBD4,
05075     0x92D7, 0xBBD5, 0x92D8, 0xBBD6, 0x92D9, 0xBBD7, 0x92DA, 0xBBD8,
05076     0x92DB, 0xBBD9, 0x92DC, 0xBBDA, 0x92DD, 0xBBDB, 0x92DE, 0xBBDC,
05077     0x92DF, 0xBBDD, 0x92E0, 0xBBDE, 0x92E1, 0xBBDF, 0x92E2, 0xBBE0,
05078     0x92E3, 0xBBE1, 0x92E4, 0xBBE2, 0x92E5, 0xBBE3, 0x92E6, 0xBBE4,
05079     0x92E7, 0xBBE5, 0x92E8, 0xBBE6, 0x92E9, 0xBBE7, 0x92EA, 0xBBE8,
05080     0x92EB, 0xBBE9, 0x92EC, 0xBBEA, 0x92ED, 0xBBEB, 0x92EE, 0xBBEC,
05081     0x92EF, 0xBBED, 0x92F0, 0xBBEE, 0x92F1, 0xBBEF, 0x92F2, 0xBBF0,
05082     0x92F3, 0xBBF1, 0x92F4, 0xBBF2, 0x92F5, 0xBBF3, 0x92F6, 0xBBF4,
05083     0x92F7, 0xBBF5, 0x92F8, 0xBBF6, 0x92F9, 0xBBF7, 0x92FA, 0xBBFA,
05084     0x92FB, 0xBBFB, 0x92FC, 0xBBFD, 0x92FD, 0xBBFE, 0x92FE, 0xBC01,
05085     0x9341, 0xBC03, 0x9342, 0xBC04, 0x9343, 0xBC05, 0x9344, 0xBC06,
05086     0x9345, 0xBC07, 0x9346, 0xBC0A, 0x9347, 0xBC0E, 0x9348, 0xBC10,
05087     0x9349, 0xBC12, 0x934A, 0xBC13, 0x934B, 0xBC19, 0x934C, 0xBC1A,
05088     0x934D, 0xBC20, 0x934E, 0xBC21, 0x934F, 0xBC22, 0x9350, 0xBC23,
05089     0x9351, 0xBC26, 0x9352, 0xBC28, 0x9353, 0xBC2A, 0x9354, 0xBC2B,
05090     0x9355, 0xBC2C, 0x9356, 0xBC2E, 0x9357, 0xBC2F, 0x9358, 0xBC32,
05091     0x9359, 0xBC33, 0x935A, 0xBC35, 0x9361, 0xBC36, 0x9362, 0xBC37,
05092     0x9363, 0xBC39, 0x9364, 0xBC3A, 0x9365, 0xBC3B, 0x9366, 0xBC3C,
05093     0x9367, 0xBC3D, 0x9368, 0xBC3E, 0x9369, 0xBC3F, 0x936A, 0xBC42,
05094     0x936B, 0xBC46, 0x936C, 0xBC47, 0x936D, 0xBC48, 0x936E, 0xBC4A,
05095     0x936F, 0xBC4B, 0x9370, 0xBC4E, 0x9371, 0xBC4F, 0x9372, 0xBC51,
05096     0x9373, 0xBC52, 0x9374, 0xBC53, 0x9375, 0xBC54, 0x9376, 0xBC55,
05097     0x9377, 0xBC56, 0x9378, 0xBC57, 0x9379, 0xBC58, 0x937A, 0xBC59,
05098     0x9381, 0xBC5A, 0x9382, 0xBC5B, 0x9383, 0xBC5C, 0x9384, 0xBC5E,
05099     0x9385, 0xBC5F, 0x9386, 0xBC60, 0x9387, 0xBC61, 0x9388, 0xBC62,
05100     0x9389, 0xBC63, 0x938A, 0xBC64, 0x938B, 0xBC65, 0x938C, 0xBC66,
05101     0x938D, 0xBC67, 0x938E, 0xBC68, 0x938F, 0xBC69, 0x9390, 0xBC6A,
05102     0x9391, 0xBC6B, 0x9392, 0xBC6C, 0x9393, 0xBC6D, 0x9394, 0xBC6E,
05103     0x9395, 0xBC6F, 0x9396, 0xBC70, 0x9397, 0xBC71, 0x9398, 0xBC72,
05104     0x9399, 0xBC73, 0x939A, 0xBC74, 0x939B, 0xBC75, 0x939C, 0xBC76,
05105     0x939D, 0xBC77, 0x939E, 0xBC78, 0x939F, 0xBC79, 0x93A0, 0xBC7A,
05106     0x93A1, 0xBC7B, 0x93A2, 0xBC7C, 0x93A3, 0xBC7D, 0x93A4, 0xBC7E,
05107     0x93A5, 0xBC7F, 0x93A6, 0xBC80, 0x93A7, 0xBC81, 0x93A8, 0xBC82,
05108     0x93A9, 0xBC83, 0x93AA, 0xBC86, 0x93AB, 0xBC87, 0x93AC, 0xBC89,
05109     0x93AD, 0xBC8A, 0x93AE, 0xBC8D, 0x93AF, 0xBC8F, 0x93B0, 0xBC90,
05110     0x93B1, 0xBC91, 0x93B2, 0xBC92, 0x93B3, 0xBC93, 0x93B4, 0xBC96,
05111     0x93B5, 0xBC98, 0x93B6, 0xBC9B, 0x93B7, 0xBC9C, 0x93B8, 0xBC9D,
05112     0x93B9, 0xBC9E, 0x93BA, 0xBC9F, 0x93BB, 0xBCA2, 0x93BC, 0xBCA3,
05113     0x93BD, 0xBCA5, 0x93BE, 0xBCA6, 0x93BF, 0xBCA9, 0x93C0, 0xBCAA,
05114     0x93C1, 0xBCAB, 0x93C2, 0xBCAC, 0x93C3, 0xBCAD, 0x93C4, 0xBCAE,
05115     0x93C5, 0xBCAF, 0x93C6, 0xBCB2, 0x93C7, 0xBCB6, 0x93C8, 0xBCB7,
05116     0x93C9, 0xBCB8, 0x93CA, 0xBCB9, 0x93CB, 0xBCBA, 0x93CC, 0xBCBB,
05117     0x93CD, 0xBCBE, 0x93CE, 0xBCBF, 0x93CF, 0xBCC1, 0x93D0, 0xBCC2,
05118     0x93D1, 0xBCC3, 0x93D2, 0xBCC5, 0x93D3, 0xBCC6, 0x93D4, 0xBCC7,
05119     0x93D5, 0xBCC8, 0x93D6, 0xBCC9, 0x93D7, 0xBCCA, 0x93D8, 0xBCCB,
05120     0x93D9, 0xBCCC, 0x93DA, 0xBCCE, 0x93DB, 0xBCD2, 0x93DC, 0xBCD3,
05121     0x93DD, 0xBCD4, 0x93DE, 0xBCD6, 0x93DF, 0xBCD7, 0x93E0, 0xBCD9,
05122     0x93E1, 0xBCDA, 0x93E2, 0xBCDB, 0x93E3, 0xBCDD, 0x93E4, 0xBCDE,
05123     0x93E5, 0xBCDF, 0x93E6, 0xBCE0, 0x93E7, 0xBCE1, 0x93E8, 0xBCE2,
05124     0x93E9, 0xBCE3, 0x93EA, 0xBCE4, 0x93EB, 0xBCE5, 0x93EC, 0xBCE6,
05125     0x93ED, 0xBCE7, 0x93EE, 0xBCE8, 0x93EF, 0xBCE9, 0x93F0, 0xBCEA,
05126     0x93F1, 0xBCEB, 0x93F2, 0xBCEC, 0x93F3, 0xBCED, 0x93F4, 0xBCEE,
05127     0x93F5, 0xBCEF, 0x93F6, 0xBCF0, 0x93F7, 0xBCF1, 0x93F8, 0xBCF2,
05128     0x93F9, 0xBCF3, 0x93FA, 0xBCF7, 0x93FB, 0xBCF9, 0x93FC, 0xBCFA,
05129     0x93FD, 0xBCFB, 0x93FE, 0xBCFD, 0x9441, 0xBCFE, 0x9442, 0xBCFF,
05130     0x9443, 0xBD00, 0x9444, 0xBD01, 0x9445, 0xBD02, 0x9446, 0xBD03,
05131     0x9447, 0xBD06, 0x9448, 0xBD08, 0x9449, 0xBD0A, 0x944A, 0xBD0B,
05132     0x944B, 0xBD0C, 0x944C, 0xBD0D, 0x944D, 0xBD0E, 0x944E, 0xBD0F,
05133     0x944F, 0xBD11, 0x9450, 0xBD12, 0x9451, 0xBD13, 0x9452, 0xBD15,
05134     0x9453, 0xBD16, 0x9454, 0xBD17, 0x9455, 0xBD18, 0x9456, 0xBD19,
05135     0x9457, 0xBD1A, 0x9458, 0xBD1B, 0x9459, 0xBD1C, 0x945A, 0xBD1D,
05136     0x9461, 0xBD1E, 0x9462, 0xBD1F, 0x9463, 0xBD20, 0x9464, 0xBD21,
05137     0x9465, 0xBD22, 0x9466, 0xBD23, 0x9467, 0xBD25, 0x9468, 0xBD26,
05138     0x9469, 0xBD27, 0x946A, 0xBD28, 0x946B, 0xBD29, 0x946C, 0xBD2A,
05139     0x946D, 0xBD2B, 0x946E, 0xBD2D, 0x946F, 0xBD2E, 0x9470, 0xBD2F,
05140     0x9471, 0xBD30, 0x9472, 0xBD31, 0x9473, 0xBD32, 0x9474, 0xBD33,
05141     0x9475, 0xBD34, 0x9476, 0xBD35, 0x9477, 0xBD36, 0x9478, 0xBD37,
05142     0x9479, 0xBD38, 0x947A, 0xBD39, 0x9481, 0xBD3A, 0x9482, 0xBD3B,
05143     0x9483, 0xBD3C, 0x9484, 0xBD3D, 0x9485, 0xBD3E, 0x9486, 0xBD3F,
05144     0x9487, 0xBD41, 0x9488, 0xBD42, 0x9489, 0xBD43, 0x948A, 0xBD44,
05145     0x948B, 0xBD45, 0x948C, 0xBD46, 0x948D, 0xBD47, 0x948E, 0xBD4A,
05146     0x948F, 0xBD4B, 0x9490, 0xBD4D, 0x9491, 0xBD4E, 0x9492, 0xBD4F,
05147     0x9493, 0xBD51, 0x9494, 0xBD52, 0x9495, 0xBD53, 0x9496, 0xBD54,
05148     0x9497, 0xBD55, 0x9498, 0xBD56, 0x9499, 0xBD57, 0x949A, 0xBD5A,
05149     0x949B, 0xBD5B, 0x949C, 0xBD5C, 0x949D, 0xBD5D, 0x949E, 0xBD5E,
05150     0x949F, 0xBD5F, 0x94A0, 0xBD60, 0x94A1, 0xBD61, 0x94A2, 0xBD62,
05151     0x94A3, 0xBD63, 0x94A4, 0xBD65, 0x94A5, 0xBD66, 0x94A6, 0xBD67,
05152     0x94A7, 0xBD69, 0x94A8, 0xBD6A, 0x94A9, 0xBD6B, 0x94AA, 0xBD6C,
05153     0x94AB, 0xBD6D, 0x94AC, 0xBD6E, 0x94AD, 0xBD6F, 0x94AE, 0xBD70,
05154     0x94AF, 0xBD71, 0x94B0, 0xBD72, 0x94B1, 0xBD73, 0x94B2, 0xBD74,
05155     0x94B3, 0xBD75, 0x94B4, 0xBD76, 0x94B5, 0xBD77, 0x94B6, 0xBD78,
05156     0x94B7, 0xBD79, 0x94B8, 0xBD7A, 0x94B9, 0xBD7B, 0x94BA, 0xBD7C,
05157     0x94BB, 0xBD7D, 0x94BC, 0xBD7E, 0x94BD, 0xBD7F, 0x94BE, 0xBD82,
05158     0x94BF, 0xBD83, 0x94C0, 0xBD85, 0x94C1, 0xBD86, 0x94C2, 0xBD8B,
05159     0x94C3, 0xBD8C, 0x94C4, 0xBD8D, 0x94C5, 0xBD8E, 0x94C6, 0xBD8F,
05160     0x94C7, 0xBD92, 0x94C8, 0xBD94, 0x94C9, 0xBD96, 0x94CA, 0xBD97,
05161     0x94CB, 0xBD98, 0x94CC, 0xBD9B, 0x94CD, 0xBD9D, 0x94CE, 0xBD9E,
05162     0x94CF, 0xBD9F, 0x94D0, 0xBDA0, 0x94D1, 0xBDA1, 0x94D2, 0xBDA2,
05163     0x94D3, 0xBDA3, 0x94D4, 0xBDA5, 0x94D5, 0xBDA6, 0x94D6, 0xBDA7,
05164     0x94D7, 0xBDA8, 0x94D8, 0xBDA9, 0x94D9, 0xBDAA, 0x94DA, 0xBDAB,
05165     0x94DB, 0xBDAC, 0x94DC, 0xBDAD, 0x94DD, 0xBDAE, 0x94DE, 0xBDAF,
05166     0x94DF, 0xBDB1, 0x94E0, 0xBDB2, 0x94E1, 0xBDB3, 0x94E2, 0xBDB4,
05167     0x94E3, 0xBDB5, 0x94E4, 0xBDB6, 0x94E5, 0xBDB7, 0x94E6, 0xBDB9,
05168     0x94E7, 0xBDBA, 0x94E8, 0xBDBB, 0x94E9, 0xBDBC, 0x94EA, 0xBDBD,
05169     0x94EB, 0xBDBE, 0x94EC, 0xBDBF, 0x94ED, 0xBDC0, 0x94EE, 0xBDC1,
05170     0x94EF, 0xBDC2, 0x94F0, 0xBDC3, 0x94F1, 0xBDC4, 0x94F2, 0xBDC5,
05171     0x94F3, 0xBDC6, 0x94F4, 0xBDC7, 0x94F5, 0xBDC8, 0x94F6, 0xBDC9,
05172     0x94F7, 0xBDCA, 0x94F8, 0xBDCB, 0x94F9, 0xBDCC, 0x94FA, 0xBDCD,
05173     0x94FB, 0xBDCE, 0x94FC, 0xBDCF, 0x94FD, 0xBDD0, 0x94FE, 0xBDD1,
05174     0x9541, 0xBDD2, 0x9542, 0xBDD3, 0x9543, 0xBDD6, 0x9544, 0xBDD7,
05175     0x9545, 0xBDD9, 0x9546, 0xBDDA, 0x9547, 0xBDDB, 0x9548, 0xBDDD,
05176     0x9549, 0xBDDE, 0x954A, 0xBDDF, 0x954B, 0xBDE0, 0x954C, 0xBDE1,
05177     0x954D, 0xBDE2, 0x954E, 0xBDE3, 0x954F, 0xBDE4, 0x9550, 0xBDE5,
05178     0x9551, 0xBDE6, 0x9552, 0xBDE7, 0x9553, 0xBDE8, 0x9554, 0xBDEA,
05179     0x9555, 0xBDEB, 0x9556, 0xBDEC, 0x9557, 0xBDED, 0x9558, 0xBDEE,
05180     0x9559, 0xBDEF, 0x955A, 0xBDF1, 0x9561, 0xBDF2, 0x9562, 0xBDF3,
05181     0x9563, 0xBDF5, 0x9564, 0xBDF6, 0x9565, 0xBDF7, 0x9566, 0xBDF9,
05182     0x9567, 0xBDFA, 0x9568, 0xBDFB, 0x9569, 0xBDFC, 0x956A, 0xBDFD,
05183     0x956B, 0xBDFE, 0x956C, 0xBDFF, 0x956D, 0xBE01, 0x956E, 0xBE02,
05184     0x956F, 0xBE04, 0x9570, 0xBE06, 0x9571, 0xBE07, 0x9572, 0xBE08,
05185     0x9573, 0xBE09, 0x9574, 0xBE0A, 0x9575, 0xBE0B, 0x9576, 0xBE0E,
05186     0x9577, 0xBE0F, 0x9578, 0xBE11, 0x9579, 0xBE12, 0x957A, 0xBE13,
05187     0x9581, 0xBE15, 0x9582, 0xBE16, 0x9583, 0xBE17, 0x9584, 0xBE18,
05188     0x9585, 0xBE19, 0x9586, 0xBE1A, 0x9587, 0xBE1B, 0x9588, 0xBE1E,
05189     0x9589, 0xBE20, 0x958A, 0xBE21, 0x958B, 0xBE22, 0x958C, 0xBE23,
05190     0x958D, 0xBE24, 0x958E, 0xBE25, 0x958F, 0xBE26, 0x9590, 0xBE27,
05191     0x9591, 0xBE28, 0x9592, 0xBE29, 0x9593, 0xBE2A, 0x9594, 0xBE2B,
05192     0x9595, 0xBE2C, 0x9596, 0xBE2D, 0x9597, 0xBE2E, 0x9598, 0xBE2F,
05193     0x9599, 0xBE30, 0x959A, 0xBE31, 0x959B, 0xBE32, 0x959C, 0xBE33,
05194     0x959D, 0xBE34, 0x959E, 0xBE35, 0x959F, 0xBE36, 0x95A0, 0xBE37,
05195     0x95A1, 0xBE38, 0x95A2, 0xBE39, 0x95A3, 0xBE3A, 0x95A4, 0xBE3B,
05196     0x95A5, 0xBE3C, 0x95A6, 0xBE3D, 0x95A7, 0xBE3E, 0x95A8, 0xBE3F,
05197     0x95A9, 0xBE40, 0x95AA, 0xBE41, 0x95AB, 0xBE42, 0x95AC, 0xBE43,
05198     0x95AD, 0xBE46, 0x95AE, 0xBE47, 0x95AF, 0xBE49, 0x95B0, 0xBE4A,
05199     0x95B1, 0xBE4B, 0x95B2, 0xBE4D, 0x95B3, 0xBE4F, 0x95B4, 0xBE50,
05200     0x95B5, 0xBE51, 0x95B6, 0xBE52, 0x95B7, 0xBE53, 0x95B8, 0xBE56,
05201     0x95B9, 0xBE58, 0x95BA, 0xBE5C, 0x95BB, 0xBE5D, 0x95BC, 0xBE5E,
05202     0x95BD, 0xBE5F, 0x95BE, 0xBE62, 0x95BF, 0xBE63, 0x95C0, 0xBE65,
05203     0x95C1, 0xBE66, 0x95C2, 0xBE67, 0x95C3, 0xBE69, 0x95C4, 0xBE6B,
05204     0x95C5, 0xBE6C, 0x95C6, 0xBE6D, 0x95C7, 0xBE6E, 0x95C8, 0xBE6F,
05205     0x95C9, 0xBE72, 0x95CA, 0xBE76, 0x95CB, 0xBE77, 0x95CC, 0xBE78,
05206     0x95CD, 0xBE79, 0x95CE, 0xBE7A, 0x95CF, 0xBE7E, 0x95D0, 0xBE7F,
05207     0x95D1, 0xBE81, 0x95D2, 0xBE82, 0x95D3, 0xBE83, 0x95D4, 0xBE85,
05208     0x95D5, 0xBE86, 0x95D6, 0xBE87, 0x95D7, 0xBE88, 0x95D8, 0xBE89,
05209     0x95D9, 0xBE8A, 0x95DA, 0xBE8B, 0x95DB, 0xBE8E, 0x95DC, 0xBE92,
05210     0x95DD, 0xBE93, 0x95DE, 0xBE94, 0x95DF, 0xBE95, 0x95E0, 0xBE96,
05211     0x95E1, 0xBE97, 0x95E2, 0xBE9A, 0x95E3, 0xBE9B, 0x95E4, 0xBE9C,
05212     0x95E5, 0xBE9D, 0x95E6, 0xBE9E, 0x95E7, 0xBE9F, 0x95E8, 0xBEA0,
05213     0x95E9, 0xBEA1, 0x95EA, 0xBEA2, 0x95EB, 0xBEA3, 0x95EC, 0xBEA4,
05214     0x95ED, 0xBEA5, 0x95EE, 0xBEA6, 0x95EF, 0xBEA7, 0x95F0, 0xBEA9,
05215     0x95F1, 0xBEAA, 0x95F2, 0xBEAB, 0x95F3, 0xBEAC, 0x95F4, 0xBEAD,
05216     0x95F5, 0xBEAE, 0x95F6, 0xBEAF, 0x95F7, 0xBEB0, 0x95F8, 0xBEB1,
05217     0x95F9, 0xBEB2, 0x95FA, 0xBEB3, 0x95FB, 0xBEB4, 0x95FC, 0xBEB5,
05218     0x95FD, 0xBEB6, 0x95FE, 0xBEB7, 0x9641, 0xBEB8, 0x9642, 0xBEB9,
05219     0x9643, 0xBEBA, 0x9644, 0xBEBB, 0x9645, 0xBEBC, 0x9646, 0xBEBD,
05220     0x9647, 0xBEBE, 0x9648, 0xBEBF, 0x9649, 0xBEC0, 0x964A, 0xBEC1,
05221     0x964B, 0xBEC2, 0x964C, 0xBEC3, 0x964D, 0xBEC4, 0x964E, 0xBEC5,
05222     0x964F, 0xBEC6, 0x9650, 0xBEC7, 0x9651, 0xBEC8, 0x9652, 0xBEC9,
05223     0x9653, 0xBECA, 0x9654, 0xBECB, 0x9655, 0xBECC, 0x9656, 0xBECD,
05224     0x9657, 0xBECE, 0x9658, 0xBECF, 0x9659, 0xBED2, 0x965A, 0xBED3,
05225     0x9661, 0xBED5, 0x9662, 0xBED6, 0x9663, 0xBED9, 0x9664, 0xBEDA,
05226     0x9665, 0xBEDB, 0x9666, 0xBEDC, 0x9667, 0xBEDD, 0x9668, 0xBEDE,
05227     0x9669, 0xBEDF, 0x966A, 0xBEE1, 0x966B, 0xBEE2, 0x966C, 0xBEE6,
05228     0x966D, 0xBEE7, 0x966E, 0xBEE8, 0x966F, 0xBEE9, 0x9670, 0xBEEA,
05229     0x9671, 0xBEEB, 0x9672, 0xBEED, 0x9673, 0xBEEE, 0x9674, 0xBEEF,
05230     0x9675, 0xBEF0, 0x9676, 0xBEF1, 0x9677, 0xBEF2, 0x9678, 0xBEF3,
05231     0x9679, 0xBEF4, 0x967A, 0xBEF5, 0x9681, 0xBEF6, 0x9682, 0xBEF7,
05232     0x9683, 0xBEF8, 0x9684, 0xBEF9, 0x9685, 0xBEFA, 0x9686, 0xBEFB,
05233     0x9687, 0xBEFC, 0x9688, 0xBEFD, 0x9689, 0xBEFE, 0x968A, 0xBEFF,
05234     0x968B, 0xBF00, 0x968C, 0xBF02, 0x968D, 0xBF03, 0x968E, 0xBF04,
05235     0x968F, 0xBF05, 0x9690, 0xBF06, 0x9691, 0xBF07, 0x9692, 0xBF0A,
05236     0x9693, 0xBF0B, 0x9694, 0xBF0C, 0x9695, 0xBF0D, 0x9696, 0xBF0E,
05237     0x9697, 0xBF0F, 0x9698, 0xBF10, 0x9699, 0xBF11, 0x969A, 0xBF12,
05238     0x969B, 0xBF13, 0x969C, 0xBF14, 0x969D, 0xBF15, 0x969E, 0xBF16,
05239     0x969F, 0xBF17, 0x96A0, 0xBF1A, 0x96A1, 0xBF1E, 0x96A2, 0xBF1F,
05240     0x96A3, 0xBF20, 0x96A4, 0xBF21, 0x96A5, 0xBF22, 0x96A6, 0xBF23,
05241     0x96A7, 0xBF24, 0x96A8, 0xBF25, 0x96A9, 0xBF26, 0x96AA, 0xBF27,
05242     0x96AB, 0xBF28, 0x96AC, 0xBF29, 0x96AD, 0xBF2A, 0x96AE, 0xBF2B,
05243     0x96AF, 0xBF2C, 0x96B0, 0xBF2D, 0x96B1, 0xBF2E, 0x96B2, 0xBF2F,
05244     0x96B3, 0xBF30, 0x96B4, 0xBF31, 0x96B5, 0xBF32, 0x96B6, 0xBF33,
05245     0x96B7, 0xBF34, 0x96B8, 0xBF35, 0x96B9, 0xBF36, 0x96BA, 0xBF37,
05246     0x96BB, 0xBF38, 0x96BC, 0xBF39, 0x96BD, 0xBF3A, 0x96BE, 0xBF3B,
05247     0x96BF, 0xBF3C, 0x96C0, 0xBF3D, 0x96C1, 0xBF3E, 0x96C2, 0xBF3F,
05248     0x96C3, 0xBF42, 0x96C4, 0xBF43, 0x96C5, 0xBF45, 0x96C6, 0xBF46,
05249     0x96C7, 0xBF47, 0x96C8, 0xBF49, 0x96C9, 0xBF4A, 0x96CA, 0xBF4B,
05250     0x96CB, 0xBF4C, 0x96CC, 0xBF4D, 0x96CD, 0xBF4E, 0x96CE, 0xBF4F,
05251     0x96CF, 0xBF52, 0x96D0, 0xBF53, 0x96D1, 0xBF54, 0x96D2, 0xBF56,
05252     0x96D3, 0xBF57, 0x96D4, 0xBF58, 0x96D5, 0xBF59, 0x96D6, 0xBF5A,
05253     0x96D7, 0xBF5B, 0x96D8, 0xBF5C, 0x96D9, 0xBF5D, 0x96DA, 0xBF5E,
05254     0x96DB, 0xBF5F, 0x96DC, 0xBF60, 0x96DD, 0xBF61, 0x96DE, 0xBF62,
05255     0x96DF, 0xBF63, 0x96E0, 0xBF64, 0x96E1, 0xBF65, 0x96E2, 0xBF66,
05256     0x96E3, 0xBF67, 0x96E4, 0xBF68, 0x96E5, 0xBF69, 0x96E6, 0xBF6A,
05257     0x96E7, 0xBF6B, 0x96E8, 0xBF6C, 0x96E9, 0xBF6D, 0x96EA, 0xBF6E,
05258     0x96EB, 0xBF6F, 0x96EC, 0xBF70, 0x96ED, 0xBF71, 0x96EE, 0xBF72,
05259     0x96EF, 0xBF73, 0x96F0, 0xBF74, 0x96F1, 0xBF75, 0x96F2, 0xBF76,
05260     0x96F3, 0xBF77, 0x96F4, 0xBF78, 0x96F5, 0xBF79, 0x96F6, 0xBF7A,
05261     0x96F7, 0xBF7B, 0x96F8, 0xBF7C, 0x96F9, 0xBF7D, 0x96FA, 0xBF7E,
05262     0x96FB, 0xBF7F, 0x96FC, 0xBF80, 0x96FD, 0xBF81, 0x96FE, 0xBF82,
05263     0x9741, 0xBF83, 0x9742, 0xBF84, 0x9743, 0xBF85, 0x9744, 0xBF86,
05264     0x9745, 0xBF87, 0x9746, 0xBF88, 0x9747, 0xBF89, 0x9748, 0xBF8A,
05265     0x9749, 0xBF8B, 0x974A, 0xBF8C, 0x974B, 0xBF8D, 0x974C, 0xBF8E,
05266     0x974D, 0xBF8F, 0x974E, 0xBF90, 0x974F, 0xBF91, 0x9750, 0xBF92,
05267     0x9751, 0xBF93, 0x9752, 0xBF95, 0x9753, 0xBF96, 0x9754, 0xBF97,
05268     0x9755, 0xBF98, 0x9756, 0xBF99, 0x9757, 0xBF9A, 0x9758, 0xBF9B,
05269     0x9759, 0xBF9C, 0x975A, 0xBF9D, 0x9761, 0xBF9E, 0x9762, 0xBF9F,
05270     0x9763, 0xBFA0, 0x9764, 0xBFA1, 0x9765, 0xBFA2, 0x9766, 0xBFA3,
05271     0x9767, 0xBFA4, 0x9768, 0xBFA5, 0x9769, 0xBFA6, 0x976A, 0xBFA7,
05272     0x976B, 0xBFA8, 0x976C, 0xBFA9, 0x976D, 0xBFAA, 0x976E, 0xBFAB,
05273     0x976F, 0xBFAC, 0x9770, 0xBFAD, 0x9771, 0xBFAE, 0x9772, 0xBFAF,
05274     0x9773, 0xBFB1, 0x9774, 0xBFB2, 0x9775, 0xBFB3, 0x9776, 0xBFB4,
05275     0x9777, 0xBFB5, 0x9778, 0xBFB6, 0x9779, 0xBFB7, 0x977A, 0xBFB8,
05276     0x9781, 0xBFB9, 0x9782, 0xBFBA, 0x9783, 0xBFBB, 0x9784, 0xBFBC,
05277     0x9785, 0xBFBD, 0x9786, 0xBFBE, 0x9787, 0xBFBF, 0x9788, 0xBFC0,
05278     0x9789, 0xBFC1, 0x978A, 0xBFC2, 0x978B, 0xBFC3, 0x978C, 0xBFC4,
05279     0x978D, 0xBFC6, 0x978E, 0xBFC7, 0x978F, 0xBFC8, 0x9790, 0xBFC9,
05280     0x9791, 0xBFCA, 0x9792, 0xBFCB, 0x9793, 0xBFCE, 0x9794, 0xBFCF,
05281     0x9795, 0xBFD1, 0x9796, 0xBFD2, 0x9797, 0xBFD3, 0x9798, 0xBFD5,
05282     0x9799, 0xBFD6, 0x979A, 0xBFD7, 0x979B, 0xBFD8, 0x979C, 0xBFD9,
05283     0x979D, 0xBFDA, 0x979E, 0xBFDB, 0x979F, 0xBFDD, 0x97A0, 0xBFDE,
05284     0x97A1, 0xBFE0, 0x97A2, 0xBFE2, 0x97A3, 0xBFE3, 0x97A4, 0xBFE4,
05285     0x97A5, 0xBFE5, 0x97A6, 0xBFE6, 0x97A7, 0xBFE7, 0x97A8, 0xBFE8,
05286     0x97A9, 0xBFE9, 0x97AA, 0xBFEA, 0x97AB, 0xBFEB, 0x97AC, 0xBFEC,
05287     0x97AD, 0xBFED, 0x97AE, 0xBFEE, 0x97AF, 0xBFEF, 0x97B0, 0xBFF0,
05288     0x97B1, 0xBFF1, 0x97B2, 0xBFF2, 0x97B3, 0xBFF3, 0x97B4, 0xBFF4,
05289     0x97B5, 0xBFF5, 0x97B6, 0xBFF6, 0x97B7, 0xBFF7, 0x97B8, 0xBFF8,
05290     0x97B9, 0xBFF9, 0x97BA, 0xBFFA, 0x97BB, 0xBFFB, 0x97BC, 0xBFFC,
05291     0x97BD, 0xBFFD, 0x97BE, 0xBFFE, 0x97BF, 0xBFFF, 0x97C0, 0xC000,
05292     0x97C1, 0xC001, 0x97C2, 0xC002, 0x97C3, 0xC003, 0x97C4, 0xC004,
05293     0x97C5, 0xC005, 0x97C6, 0xC006, 0x97C7, 0xC007, 0x97C8, 0xC008,
05294     0x97C9, 0xC009, 0x97CA, 0xC00A, 0x97CB, 0xC00B, 0x97CC, 0xC00C,
05295     0x97CD, 0xC00D, 0x97CE, 0xC00E, 0x97CF, 0xC00F, 0x97D0, 0xC010,
05296     0x97D1, 0xC011, 0x97D2, 0xC012, 0x97D3, 0xC013, 0x97D4, 0xC014,
05297     0x97D5, 0xC015, 0x97D6, 0xC016, 0x97D7, 0xC017, 0x97D8, 0xC018,
05298     0x97D9, 0xC019, 0x97DA, 0xC01A, 0x97DB, 0xC01B, 0x97DC, 0xC01C,
05299     0x97DD, 0xC01D, 0x97DE, 0xC01E, 0x97DF, 0xC01F, 0x97E0, 0xC020,
05300     0x97E1, 0xC021, 0x97E2, 0xC022, 0x97E3, 0xC023, 0x97E4, 0xC024,
05301     0x97E5, 0xC025, 0x97E6, 0xC026, 0x97E7, 0xC027, 0x97E8, 0xC028,
05302     0x97E9, 0xC029, 0x97EA, 0xC02A, 0x97EB, 0xC02B, 0x97EC, 0xC02C,
05303     0x97ED, 0xC02D, 0x97EE, 0xC02E, 0x97EF, 0xC02F, 0x97F0, 0xC030,
05304     0x97F1, 0xC031, 0x97F2, 0xC032, 0x97F3, 0xC033, 0x97F4, 0xC034,
05305     0x97F5, 0xC035, 0x97F6, 0xC036, 0x97F7, 0xC037, 0x97F8, 0xC038,
05306     0x97F9, 0xC039, 0x97FA, 0xC03A, 0x97FB, 0xC03B, 0x97FC, 0xC03D,
05307     0x97FD, 0xC03E, 0x97FE, 0xC03F, 0x9841, 0xC040, 0x9842, 0xC041,
05308     0x9843, 0xC042, 0x9844, 0xC043, 0x9845, 0xC044, 0x9846, 0xC045,
05309     0x9847, 0xC046, 0x9848, 0xC047, 0x9849, 0xC048, 0x984A, 0xC049,
05310     0x984B, 0xC04A, 0x984C, 0xC04B, 0x984D, 0xC04C, 0x984E, 0xC04D,
05311     0x984F, 0xC04E, 0x9850, 0xC04F, 0x9851, 0xC050, 0x9852, 0xC052,
05312     0x9853, 0xC053, 0x9854, 0xC054, 0x9855, 0xC055, 0x9856, 0xC056,
05313     0x9857, 0xC057, 0x9858, 0xC059, 0x9859, 0xC05A, 0x985A, 0xC05B,
05314     0x9861, 0xC05D, 0x9862, 0xC05E, 0x9863, 0xC05F, 0x9864, 0xC061,
05315     0x9865, 0xC062, 0x9866, 0xC063, 0x9867, 0xC064, 0x9868, 0xC065,
05316     0x9869, 0xC066, 0x986A, 0xC067, 0x986B, 0xC06A, 0x986C, 0xC06B,
05317     0x986D, 0xC06C, 0x986E, 0xC06D, 0x986F, 0xC06E, 0x9870, 0xC06F,
05318     0x9871, 0xC070, 0x9872, 0xC071, 0x9873, 0xC072, 0x9874, 0xC073,
05319     0x9875, 0xC074, 0x9876, 0xC075, 0x9877, 0xC076, 0x9878, 0xC077,
05320     0x9879, 0xC078, 0x987A, 0xC079, 0x9881, 0xC07A, 0x9882, 0xC07B,
05321     0x9883, 0xC07C, 0x9884, 0xC07D, 0x9885, 0xC07E, 0x9886, 0xC07F,
05322     0x9887, 0xC080, 0x9888, 0xC081, 0x9889, 0xC082, 0x988A, 0xC083,
05323     0x988B, 0xC084, 0x988C, 0xC085, 0x988D, 0xC086, 0x988E, 0xC087,
05324     0x988F, 0xC088, 0x9890, 0xC089, 0x9891, 0xC08A, 0x9892, 0xC08B,
05325     0x9893, 0xC08C, 0x9894, 0xC08D, 0x9895, 0xC08E, 0x9896, 0xC08F,
05326     0x9897, 0xC092, 0x9898, 0xC093, 0x9899, 0xC095, 0x989A, 0xC096,
05327     0x989B, 0xC097, 0x989C, 0xC099, 0x989D, 0xC09A, 0x989E, 0xC09B,
05328     0x989F, 0xC09C, 0x98A0, 0xC09D, 0x98A1, 0xC09E, 0x98A2, 0xC09F,
05329     0x98A3, 0xC0A2, 0x98A4, 0xC0A4, 0x98A5, 0xC0A6, 0x98A6, 0xC0A7,
05330     0x98A7, 0xC0A8, 0x98A8, 0xC0A9, 0x98A9, 0xC0AA, 0x98AA, 0xC0AB,
05331     0x98AB, 0xC0AE, 0x98AC, 0xC0B1, 0x98AD, 0xC0B2, 0x98AE, 0xC0B7,
05332     0x98AF, 0xC0B8, 0x98B0, 0xC0B9, 0x98B1, 0xC0BA, 0x98B2, 0xC0BB,
05333     0x98B3, 0xC0BE, 0x98B4, 0xC0C2, 0x98B5, 0xC0C3, 0x98B6, 0xC0C4,
05334     0x98B7, 0xC0C6, 0x98B8, 0xC0C7, 0x98B9, 0xC0CA, 0x98BA, 0xC0CB,
05335     0x98BB, 0xC0CD, 0x98BC, 0xC0CE, 0x98BD, 0xC0CF, 0x98BE, 0xC0D1,
05336     0x98BF, 0xC0D2, 0x98C0, 0xC0D3, 0x98C1, 0xC0D4, 0x98C2, 0xC0D5,
05337     0x98C3, 0xC0D6, 0x98C4, 0xC0D7, 0x98C5, 0xC0DA, 0x98C6, 0xC0DE,
05338     0x98C7, 0xC0DF, 0x98C8, 0xC0E0, 0x98C9, 0xC0E1, 0x98CA, 0xC0E2,
05339     0x98CB, 0xC0E3, 0x98CC, 0xC0E6, 0x98CD, 0xC0E7, 0x98CE, 0xC0E9,
05340     0x98CF, 0xC0EA, 0x98D0, 0xC0EB, 0x98D1, 0xC0ED, 0x98D2, 0xC0EE,
05341     0x98D3, 0xC0EF, 0x98D4, 0xC0F0, 0x98D5, 0xC0F1, 0x98D6, 0xC0F2,
05342     0x98D7, 0xC0F3, 0x98D8, 0xC0F6, 0x98D9, 0xC0F8, 0x98DA, 0xC0FA,
05343     0x98DB, 0xC0FB, 0x98DC, 0xC0FC, 0x98DD, 0xC0FD, 0x98DE, 0xC0FE,
05344     0x98DF, 0xC0FF, 0x98E0, 0xC101, 0x98E1, 0xC102, 0x98E2, 0xC103,
05345     0x98E3, 0xC105, 0x98E4, 0xC106, 0x98E5, 0xC107, 0x98E6, 0xC109,
05346     0x98E7, 0xC10A, 0x98E8, 0xC10B, 0x98E9, 0xC10C, 0x98EA, 0xC10D,
05347     0x98EB, 0xC10E, 0x98EC, 0xC10F, 0x98ED, 0xC111, 0x98EE, 0xC112,
05348     0x98EF, 0xC113, 0x98F0, 0xC114, 0x98F1, 0xC116, 0x98F2, 0xC117,
05349     0x98F3, 0xC118, 0x98F4, 0xC119, 0x98F5, 0xC11A, 0x98F6, 0xC11B,
05350     0x98F7, 0xC121, 0x98F8, 0xC122, 0x98F9, 0xC125, 0x98FA, 0xC128,
05351     0x98FB, 0xC129, 0x98FC, 0xC12A, 0x98FD, 0xC12B, 0x98FE, 0xC12E,
05352     0x9941, 0xC132, 0x9942, 0xC133, 0x9943, 0xC134, 0x9944, 0xC135,
05353     0x9945, 0xC137, 0x9946, 0xC13A, 0x9947, 0xC13B, 0x9948, 0xC13D,
05354     0x9949, 0xC13E, 0x994A, 0xC13F, 0x994B, 0xC141, 0x994C, 0xC142,
05355     0x994D, 0xC143, 0x994E, 0xC144, 0x994F, 0xC145, 0x9950, 0xC146,
05356     0x9951, 0xC147, 0x9952, 0xC14A, 0x9953, 0xC14E, 0x9954, 0xC14F,
05357     0x9955, 0xC150, 0x9956, 0xC151, 0x9957, 0xC152, 0x9958, 0xC153,
05358     0x9959, 0xC156, 0x995A, 0xC157, 0x9961, 0xC159, 0x9962, 0xC15A,
05359     0x9963, 0xC15B, 0x9964, 0xC15D, 0x9965, 0xC15E, 0x9966, 0xC15F,
05360     0x9967, 0xC160, 0x9968, 0xC161, 0x9969, 0xC162, 0x996A, 0xC163,
05361     0x996B, 0xC166, 0x996C, 0xC16A, 0x996D, 0xC16B, 0x996E, 0xC16C,
05362     0x996F, 0xC16D, 0x9970, 0xC16E, 0x9971, 0xC16F, 0x9972, 0xC171,
05363     0x9973, 0xC172, 0x9974, 0xC173, 0x9975, 0xC175, 0x9976, 0xC176,
05364     0x9977, 0xC177, 0x9978, 0xC179, 0x9979, 0xC17A, 0x997A, 0xC17B,
05365     0x9981, 0xC17C, 0x9982, 0xC17D, 0x9983, 0xC17E, 0x9984, 0xC17F,
05366     0x9985, 0xC180, 0x9986, 0xC181, 0x9987, 0xC182, 0x9988, 0xC183,
05367     0x9989, 0xC184, 0x998A, 0xC186, 0x998B, 0xC187, 0x998C, 0xC188,
05368     0x998D, 0xC189, 0x998E, 0xC18A, 0x998F, 0xC18B, 0x9990, 0xC18F,
05369     0x9991, 0xC191, 0x9992, 0xC192, 0x9993, 0xC193, 0x9994, 0xC195,
05370     0x9995, 0xC197, 0x9996, 0xC198, 0x9997, 0xC199, 0x9998, 0xC19A,
05371     0x9999, 0xC19B, 0x999A, 0xC19E, 0x999B, 0xC1A0, 0x999C, 0xC1A2,
05372     0x999D, 0xC1A3, 0x999E, 0xC1A4, 0x999F, 0xC1A6, 0x99A0, 0xC1A7,
05373     0x99A1, 0xC1AA, 0x99A2, 0xC1AB, 0x99A3, 0xC1AD, 0x99A4, 0xC1AE,
05374     0x99A5, 0xC1AF, 0x99A6, 0xC1B1, 0x99A7, 0xC1B2, 0x99A8, 0xC1B3,
05375     0x99A9, 0xC1B4, 0x99AA, 0xC1B5, 0x99AB, 0xC1B6, 0x99AC, 0xC1B7,
05376     0x99AD, 0xC1B8, 0x99AE, 0xC1B9, 0x99AF, 0xC1BA, 0x99B0, 0xC1BB,
05377     0x99B1, 0xC1BC, 0x99B2, 0xC1BE, 0x99B3, 0xC1BF, 0x99B4, 0xC1C0,
05378     0x99B5, 0xC1C1, 0x99B6, 0xC1C2, 0x99B7, 0xC1C3, 0x99B8, 0xC1C5,
05379     0x99B9, 0xC1C6, 0x99BA, 0xC1C7, 0x99BB, 0xC1C9, 0x99BC, 0xC1CA,
05380     0x99BD, 0xC1CB, 0x99BE, 0xC1CD, 0x99BF, 0xC1CE, 0x99C0, 0xC1CF,
05381     0x99C1, 0xC1D0, 0x99C2, 0xC1D1, 0x99C3, 0xC1D2, 0x99C4, 0xC1D3,
05382     0x99C5, 0xC1D5, 0x99C6, 0xC1D6, 0x99C7, 0xC1D9, 0x99C8, 0xC1DA,
05383     0x99C9, 0xC1DB, 0x99CA, 0xC1DC, 0x99CB, 0xC1DD, 0x99CC, 0xC1DE,
05384     0x99CD, 0xC1DF, 0x99CE, 0xC1E1, 0x99CF, 0xC1E2, 0x99D0, 0xC1E3,
05385     0x99D1, 0xC1E5, 0x99D2, 0xC1E6, 0x99D3, 0xC1E7, 0x99D4, 0xC1E9,
05386     0x99D5, 0xC1EA, 0x99D6, 0xC1EB, 0x99D7, 0xC1EC, 0x99D8, 0xC1ED,
05387     0x99D9, 0xC1EE, 0x99DA, 0xC1EF, 0x99DB, 0xC1F2, 0x99DC, 0xC1F4,
05388     0x99DD, 0xC1F5, 0x99DE, 0xC1F6, 0x99DF, 0xC1F7, 0x99E0, 0xC1F8,
05389     0x99E1, 0xC1F9, 0x99E2, 0xC1FA, 0x99E3, 0xC1FB, 0x99E4, 0xC1FE,
05390     0x99E5, 0xC1FF, 0x99E6, 0xC201, 0x99E7, 0xC202, 0x99E8, 0xC203,
05391     0x99E9, 0xC205, 0x99EA, 0xC206, 0x99EB, 0xC207, 0x99EC, 0xC208,
05392     0x99ED, 0xC209, 0x99EE, 0xC20A, 0x99EF, 0xC20B, 0x99F0, 0xC20E,
05393     0x99F1, 0xC210, 0x99F2, 0xC212, 0x99F3, 0xC213, 0x99F4, 0xC214,
05394     0x99F5, 0xC215, 0x99F6, 0xC216, 0x99F7, 0xC217, 0x99F8, 0xC21A,
05395     0x99F9, 0xC21B, 0x99FA, 0xC21D, 0x99FB, 0xC21E, 0x99FC, 0xC221,
05396     0x99FD, 0xC222, 0x99FE, 0xC223, 0x9A41, 0xC224, 0x9A42, 0xC225,
05397     0x9A43, 0xC226, 0x9A44, 0xC227, 0x9A45, 0xC22A, 0x9A46, 0xC22C,
05398     0x9A47, 0xC22E, 0x9A48, 0xC230, 0x9A49, 0xC233, 0x9A4A, 0xC235,
05399     0x9A4B, 0xC236, 0x9A4C, 0xC237, 0x9A4D, 0xC238, 0x9A4E, 0xC239,
05400     0x9A4F, 0xC23A, 0x9A50, 0xC23B, 0x9A51, 0xC23C, 0x9A52, 0xC23D,
05401     0x9A53, 0xC23E, 0x9A54, 0xC23F, 0x9A55, 0xC240, 0x9A56, 0xC241,
05402     0x9A57, 0xC242, 0x9A58, 0xC243, 0x9A59, 0xC244, 0x9A5A, 0xC245,
05403     0x9A61, 0xC246, 0x9A62, 0xC247, 0x9A63, 0xC249, 0x9A64, 0xC24A,
05404     0x9A65, 0xC24B, 0x9A66, 0xC24C, 0x9A67, 0xC24D, 0x9A68, 0xC24E,
05405     0x9A69, 0xC24F, 0x9A6A, 0xC252, 0x9A6B, 0xC253, 0x9A6C, 0xC255,
05406     0x9A6D, 0xC256, 0x9A6E, 0xC257, 0x9A6F, 0xC259, 0x9A70, 0xC25A,
05407     0x9A71, 0xC25B, 0x9A72, 0xC25C, 0x9A73, 0xC25D, 0x9A74, 0xC25E,
05408     0x9A75, 0xC25F, 0x9A76, 0xC261, 0x9A77, 0xC262, 0x9A78, 0xC263,
05409     0x9A79, 0xC264, 0x9A7A, 0xC266, 0x9A81, 0xC267, 0x9A82, 0xC268,
05410     0x9A83, 0xC269, 0x9A84, 0xC26A, 0x9A85, 0xC26B, 0x9A86, 0xC26E,
05411     0x9A87, 0xC26F, 0x9A88, 0xC271, 0x9A89, 0xC272, 0x9A8A, 0xC273,
05412     0x9A8B, 0xC275, 0x9A8C, 0xC276, 0x9A8D, 0xC277, 0x9A8E, 0xC278,
05413     0x9A8F, 0xC279, 0x9A90, 0xC27A, 0x9A91, 0xC27B, 0x9A92, 0xC27E,
05414     0x9A93, 0xC280, 0x9A94, 0xC282, 0x9A95, 0xC283, 0x9A96, 0xC284,
05415     0x9A97, 0xC285, 0x9A98, 0xC286, 0x9A99, 0xC287, 0x9A9A, 0xC28A,
05416     0x9A9B, 0xC28B, 0x9A9C, 0xC28C, 0x9A9D, 0xC28D, 0x9A9E, 0xC28E,
05417     0x9A9F, 0xC28F, 0x9AA0, 0xC291, 0x9AA1, 0xC292, 0x9AA2, 0xC293,
05418     0x9AA3, 0xC294, 0x9AA4, 0xC295, 0x9AA5, 0xC296, 0x9AA6, 0xC297,
05419     0x9AA7, 0xC299, 0x9AA8, 0xC29A, 0x9AA9, 0xC29C, 0x9AAA, 0xC29E,
05420     0x9AAB, 0xC29F, 0x9AAC, 0xC2A0, 0x9AAD, 0xC2A1, 0x9AAE, 0xC2A2,
05421     0x9AAF, 0xC2A3, 0x9AB0, 0xC2A6, 0x9AB1, 0xC2A7, 0x9AB2, 0xC2A9,
05422     0x9AB3, 0xC2AA, 0x9AB4, 0xC2AB, 0x9AB5, 0xC2AE, 0x9AB6, 0xC2AF,
05423     0x9AB7, 0xC2B0, 0x9AB8, 0xC2B1, 0x9AB9, 0xC2B2, 0x9ABA, 0xC2B3,
05424     0x9ABB, 0xC2B6, 0x9ABC, 0xC2B8, 0x9ABD, 0xC2BA, 0x9ABE, 0xC2BB,
05425     0x9ABF, 0xC2BC, 0x9AC0, 0xC2BD, 0x9AC1, 0xC2BE, 0x9AC2, 0xC2BF,
05426     0x9AC3, 0xC2C0, 0x9AC4, 0xC2C1, 0x9AC5, 0xC2C2, 0x9AC6, 0xC2C3,
05427     0x9AC7, 0xC2C4, 0x9AC8, 0xC2C5, 0x9AC9, 0xC2C6, 0x9ACA, 0xC2C7,
05428     0x9ACB, 0xC2C8, 0x9ACC, 0xC2C9, 0x9ACD, 0xC2CA, 0x9ACE, 0xC2CB,
05429     0x9ACF, 0xC2CC, 0x9AD0, 0xC2CD, 0x9AD1, 0xC2CE, 0x9AD2, 0xC2CF,
05430     0x9AD3, 0xC2D0, 0x9AD4, 0xC2D1, 0x9AD5, 0xC2D2, 0x9AD6, 0xC2D3,
05431     0x9AD7, 0xC2D4, 0x9AD8, 0xC2D5, 0x9AD9, 0xC2D6, 0x9ADA, 0xC2D7,
05432     0x9ADB, 0xC2D8, 0x9ADC, 0xC2D9, 0x9ADD, 0xC2DA, 0x9ADE, 0xC2DB,
05433     0x9ADF, 0xC2DE, 0x9AE0, 0xC2DF, 0x9AE1, 0xC2E1, 0x9AE2, 0xC2E2,
05434     0x9AE3, 0xC2E5, 0x9AE4, 0xC2E6, 0x9AE5, 0xC2E7, 0x9AE6, 0xC2E8,
05435     0x9AE7, 0xC2E9, 0x9AE8, 0xC2EA, 0x9AE9, 0xC2EE, 0x9AEA, 0xC2F0,
05436     0x9AEB, 0xC2F2, 0x9AEC, 0xC2F3, 0x9AED, 0xC2F4, 0x9AEE, 0xC2F5,
05437     0x9AEF, 0xC2F7, 0x9AF0, 0xC2FA, 0x9AF1, 0xC2FD, 0x9AF2, 0xC2FE,
05438     0x9AF3, 0xC2FF, 0x9AF4, 0xC301, 0x9AF5, 0xC302, 0x9AF6, 0xC303,
05439     0x9AF7, 0xC304, 0x9AF8, 0xC305, 0x9AF9, 0xC306, 0x9AFA, 0xC307,
05440     0x9AFB, 0xC30A, 0x9AFC, 0xC30B, 0x9AFD, 0xC30E, 0x9AFE, 0xC30F,
05441     0x9B41, 0xC310, 0x9B42, 0xC311, 0x9B43, 0xC312, 0x9B44, 0xC316,
05442     0x9B45, 0xC317, 0x9B46, 0xC319, 0x9B47, 0xC31A, 0x9B48, 0xC31B,
05443     0x9B49, 0xC31D, 0x9B4A, 0xC31E, 0x9B4B, 0xC31F, 0x9B4C, 0xC320,
05444     0x9B4D, 0xC321, 0x9B4E, 0xC322, 0x9B4F, 0xC323, 0x9B50, 0xC326,
05445     0x9B51, 0xC327, 0x9B52, 0xC32A, 0x9B53, 0xC32B, 0x9B54, 0xC32C,
05446     0x9B55, 0xC32D, 0x9B56, 0xC32E, 0x9B57, 0xC32F, 0x9B58, 0xC330,
05447     0x9B59, 0xC331, 0x9B5A, 0xC332, 0x9B61, 0xC333, 0x9B62, 0xC334,
05448     0x9B63, 0xC335, 0x9B64, 0xC336, 0x9B65, 0xC337, 0x9B66, 0xC338,
05449     0x9B67, 0xC339, 0x9B68, 0xC33A, 0x9B69, 0xC33B, 0x9B6A, 0xC33C,
05450     0x9B6B, 0xC33D, 0x9B6C, 0xC33E, 0x9B6D, 0xC33F, 0x9B6E, 0xC340,
05451     0x9B6F, 0xC341, 0x9B70, 0xC342, 0x9B71, 0xC343, 0x9B72, 0xC344,
05452     0x9B73, 0xC346, 0x9B74, 0xC347, 0x9B75, 0xC348, 0x9B76, 0xC349,
05453     0x9B77, 0xC34A, 0x9B78, 0xC34B, 0x9B79, 0xC34C, 0x9B7A, 0xC34D,
05454     0x9B81, 0xC34E, 0x9B82, 0xC34F, 0x9B83, 0xC350, 0x9B84, 0xC351,
05455     0x9B85, 0xC352, 0x9B86, 0xC353, 0x9B87, 0xC354, 0x9B88, 0xC355,
05456     0x9B89, 0xC356, 0x9B8A, 0xC357, 0x9B8B, 0xC358, 0x9B8C, 0xC359,
05457     0x9B8D, 0xC35A, 0x9B8E, 0xC35B, 0x9B8F, 0xC35C, 0x9B90, 0xC35D,
05458     0x9B91, 0xC35E, 0x9B92, 0xC35F, 0x9B93, 0xC360, 0x9B94, 0xC361,
05459     0x9B95, 0xC362, 0x9B96, 0xC363, 0x9B97, 0xC364, 0x9B98, 0xC365,
05460     0x9B99, 0xC366, 0x9B9A, 0xC367, 0x9B9B, 0xC36A, 0x9B9C, 0xC36B,
05461     0x9B9D, 0xC36D, 0x9B9E, 0xC36E, 0x9B9F, 0xC36F, 0x9BA0, 0xC371,
05462     0x9BA1, 0xC373, 0x9BA2, 0xC374, 0x9BA3, 0xC375, 0x9BA4, 0xC376,
05463     0x9BA5, 0xC377, 0x9BA6, 0xC37A, 0x9BA7, 0xC37B, 0x9BA8, 0xC37E,
05464     0x9BA9, 0xC37F, 0x9BAA, 0xC380, 0x9BAB, 0xC381, 0x9BAC, 0xC382,
05465     0x9BAD, 0xC383, 0x9BAE, 0xC385, 0x9BAF, 0xC386, 0x9BB0, 0xC387,
05466     0x9BB1, 0xC389, 0x9BB2, 0xC38A, 0x9BB3, 0xC38B, 0x9BB4, 0xC38D,
05467     0x9BB5, 0xC38E, 0x9BB6, 0xC38F, 0x9BB7, 0xC390, 0x9BB8, 0xC391,
05468     0x9BB9, 0xC392, 0x9BBA, 0xC393, 0x9BBB, 0xC394, 0x9BBC, 0xC395,
05469     0x9BBD, 0xC396, 0x9BBE, 0xC397, 0x9BBF, 0xC398, 0x9BC0, 0xC399,
05470     0x9BC1, 0xC39A, 0x9BC2, 0xC39B, 0x9BC3, 0xC39C, 0x9BC4, 0xC39D,
05471     0x9BC5, 0xC39E, 0x9BC6, 0xC39F, 0x9BC7, 0xC3A0, 0x9BC8, 0xC3A1,
05472     0x9BC9, 0xC3A2, 0x9BCA, 0xC3A3, 0x9BCB, 0xC3A4, 0x9BCC, 0xC3A5,
05473     0x9BCD, 0xC3A6, 0x9BCE, 0xC3A7, 0x9BCF, 0xC3A8, 0x9BD0, 0xC3A9,
05474     0x9BD1, 0xC3AA, 0x9BD2, 0xC3AB, 0x9BD3, 0xC3AC, 0x9BD4, 0xC3AD,
05475     0x9BD5, 0xC3AE, 0x9BD6, 0xC3AF, 0x9BD7, 0xC3B0, 0x9BD8, 0xC3B1,
05476     0x9BD9, 0xC3B2, 0x9BDA, 0xC3B3, 0x9BDB, 0xC3B4, 0x9BDC, 0xC3B5,
05477     0x9BDD, 0xC3B6, 0x9BDE, 0xC3B7, 0x9BDF, 0xC3B8, 0x9BE0, 0xC3B9,
05478     0x9BE1, 0xC3BA, 0x9BE2, 0xC3BB, 0x9BE3, 0xC3BC, 0x9BE4, 0xC3BD,
05479     0x9BE5, 0xC3BE, 0x9BE6, 0xC3BF, 0x9BE7, 0xC3C1, 0x9BE8, 0xC3C2,
05480     0x9BE9, 0xC3C3, 0x9BEA, 0xC3C4, 0x9BEB, 0xC3C5, 0x9BEC, 0xC3C6,
05481     0x9BED, 0xC3C7, 0x9BEE, 0xC3C8, 0x9BEF, 0xC3C9, 0x9BF0, 0xC3CA,
05482     0x9BF1, 0xC3CB, 0x9BF2, 0xC3CC, 0x9BF3, 0xC3CD, 0x9BF4, 0xC3CE,
05483     0x9BF5, 0xC3CF, 0x9BF6, 0xC3D0, 0x9BF7, 0xC3D1, 0x9BF8, 0xC3D2,
05484     0x9BF9, 0xC3D3, 0x9BFA, 0xC3D4, 0x9BFB, 0xC3D5, 0x9BFC, 0xC3D6,
05485     0x9BFD, 0xC3D7, 0x9BFE, 0xC3DA, 0x9C41, 0xC3DB, 0x9C42, 0xC3DD,
05486     0x9C43, 0xC3DE, 0x9C44, 0xC3E1, 0x9C45, 0xC3E3, 0x9C46, 0xC3E4,
05487     0x9C47, 0xC3E5, 0x9C48, 0xC3E6, 0x9C49, 0xC3E7, 0x9C4A, 0xC3EA,
05488     0x9C4B, 0xC3EB, 0x9C4C, 0xC3EC, 0x9C4D, 0xC3EE, 0x9C4E, 0xC3EF,
05489     0x9C4F, 0xC3F0, 0x9C50, 0xC3F1, 0x9C51, 0xC3F2, 0x9C52, 0xC3F3,
05490     0x9C53, 0xC3F6, 0x9C54, 0xC3F7, 0x9C55, 0xC3F9, 0x9C56, 0xC3FA,
05491     0x9C57, 0xC3FB, 0x9C58, 0xC3FC, 0x9C59, 0xC3FD, 0x9C5A, 0xC3FE,
05492     0x9C61, 0xC3FF, 0x9C62, 0xC400, 0x9C63, 0xC401, 0x9C64, 0xC402,
05493     0x9C65, 0xC403, 0x9C66, 0xC404, 0x9C67, 0xC405, 0x9C68, 0xC406,
05494     0x9C69, 0xC407, 0x9C6A, 0xC409, 0x9C6B, 0xC40A, 0x9C6C, 0xC40B,
05495     0x9C6D, 0xC40C, 0x9C6E, 0xC40D, 0x9C6F, 0xC40E, 0x9C70, 0xC40F,
05496     0x9C71, 0xC411, 0x9C72, 0xC412, 0x9C73, 0xC413, 0x9C74, 0xC414,
05497     0x9C75, 0xC415, 0x9C76, 0xC416, 0x9C77, 0xC417, 0x9C78, 0xC418,
05498     0x9C79, 0xC419, 0x9C7A, 0xC41A, 0x9C81, 0xC41B, 0x9C82, 0xC41C,
05499     0x9C83, 0xC41D, 0x9C84, 0xC41E, 0x9C85, 0xC41F, 0x9C86, 0xC420,
05500     0x9C87, 0xC421, 0x9C88, 0xC422, 0x9C89, 0xC423, 0x9C8A, 0xC425,
05501     0x9C8B, 0xC426, 0x9C8C, 0xC427, 0x9C8D, 0xC428, 0x9C8E, 0xC429,
05502     0x9C8F, 0xC42A, 0x9C90, 0xC42B, 0x9C91, 0xC42D, 0x9C92, 0xC42E,
05503     0x9C93, 0xC42F, 0x9C94, 0xC431, 0x9C95, 0xC432, 0x9C96, 0xC433,
05504     0x9C97, 0xC435, 0x9C98, 0xC436, 0x9C99, 0xC437, 0x9C9A, 0xC438,
05505     0x9C9B, 0xC439, 0x9C9C, 0xC43A, 0x9C9D, 0xC43B, 0x9C9E, 0xC43E,
05506     0x9C9F, 0xC43F, 0x9CA0, 0xC440, 0x9CA1, 0xC441, 0x9CA2, 0xC442,
05507     0x9CA3, 0xC443, 0x9CA4, 0xC444, 0x9CA5, 0xC445, 0x9CA6, 0xC446,
05508     0x9CA7, 0xC447, 0x9CA8, 0xC449, 0x9CA9, 0xC44A, 0x9CAA, 0xC44B,
05509     0x9CAB, 0xC44C, 0x9CAC, 0xC44D, 0x9CAD, 0xC44E, 0x9CAE, 0xC44F,
05510     0x9CAF, 0xC450, 0x9CB0, 0xC451, 0x9CB1, 0xC452, 0x9CB2, 0xC453,
05511     0x9CB3, 0xC454, 0x9CB4, 0xC455, 0x9CB5, 0xC456, 0x9CB6, 0xC457,
05512     0x9CB7, 0xC458, 0x9CB8, 0xC459, 0x9CB9, 0xC45A, 0x9CBA, 0xC45B,
05513     0x9CBB, 0xC45C, 0x9CBC, 0xC45D, 0x9CBD, 0xC45E, 0x9CBE, 0xC45F,
05514     0x9CBF, 0xC460, 0x9CC0, 0xC461, 0x9CC1, 0xC462, 0x9CC2, 0xC463,
05515     0x9CC3, 0xC466, 0x9CC4, 0xC467, 0x9CC5, 0xC469, 0x9CC6, 0xC46A,
05516     0x9CC7, 0xC46B, 0x9CC8, 0xC46D, 0x9CC9, 0xC46E, 0x9CCA, 0xC46F,
05517     0x9CCB, 0xC470, 0x9CCC, 0xC471, 0x9CCD, 0xC472, 0x9CCE, 0xC473,
05518     0x9CCF, 0xC476, 0x9CD0, 0xC477, 0x9CD1, 0xC478, 0x9CD2, 0xC47A,
05519     0x9CD3, 0xC47B, 0x9CD4, 0xC47C, 0x9CD5, 0xC47D, 0x9CD6, 0xC47E,
05520     0x9CD7, 0xC47F, 0x9CD8, 0xC481, 0x9CD9, 0xC482, 0x9CDA, 0xC483,
05521     0x9CDB, 0xC484, 0x9CDC, 0xC485, 0x9CDD, 0xC486, 0x9CDE, 0xC487,
05522     0x9CDF, 0xC488, 0x9CE0, 0xC489, 0x9CE1, 0xC48A, 0x9CE2, 0xC48B,
05523     0x9CE3, 0xC48C, 0x9CE4, 0xC48D, 0x9CE5, 0xC48E, 0x9CE6, 0xC48F,
05524     0x9CE7, 0xC490, 0x9CE8, 0xC491, 0x9CE9, 0xC492, 0x9CEA, 0xC493,
05525     0x9CEB, 0xC495, 0x9CEC, 0xC496, 0x9CED, 0xC497, 0x9CEE, 0xC498,
05526     0x9CEF, 0xC499, 0x9CF0, 0xC49A, 0x9CF1, 0xC49B, 0x9CF2, 0xC49D,
05527     0x9CF3, 0xC49E, 0x9CF4, 0xC49F, 0x9CF5, 0xC4A0, 0x9CF6, 0xC4A1,
05528     0x9CF7, 0xC4A2, 0x9CF8, 0xC4A3, 0x9CF9, 0xC4A4, 0x9CFA, 0xC4A5,
05529     0x9CFB, 0xC4A6, 0x9CFC, 0xC4A7, 0x9CFD, 0xC4A8, 0x9CFE, 0xC4A9,
05530     0x9D41, 0xC4AA, 0x9D42, 0xC4AB, 0x9D43, 0xC4AC, 0x9D44, 0xC4AD,
05531     0x9D45, 0xC4AE, 0x9D46, 0xC4AF, 0x9D47, 0xC4B0, 0x9D48, 0xC4B1,
05532     0x9D49, 0xC4B2, 0x9D4A, 0xC4B3, 0x9D4B, 0xC4B4, 0x9D4C, 0xC4B5,
05533     0x9D4D, 0xC4B6, 0x9D4E, 0xC4B7, 0x9D4F, 0xC4B9, 0x9D50, 0xC4BA,
05534     0x9D51, 0xC4BB, 0x9D52, 0xC4BD, 0x9D53, 0xC4BE, 0x9D54, 0xC4BF,
05535     0x9D55, 0xC4C0, 0x9D56, 0xC4C1, 0x9D57, 0xC4C2, 0x9D58, 0xC4C3,
05536     0x9D59, 0xC4C4, 0x9D5A, 0xC4C5, 0x9D61, 0xC4C6, 0x9D62, 0xC4C7,
05537     0x9D63, 0xC4C8, 0x9D64, 0xC4C9, 0x9D65, 0xC4CA, 0x9D66, 0xC4CB,
05538     0x9D67, 0xC4CC, 0x9D68, 0xC4CD, 0x9D69, 0xC4CE, 0x9D6A, 0xC4CF,
05539     0x9D6B, 0xC4D0, 0x9D6C, 0xC4D1, 0x9D6D, 0xC4D2, 0x9D6E, 0xC4D3,
05540     0x9D6F, 0xC4D4, 0x9D70, 0xC4D5, 0x9D71, 0xC4D6, 0x9D72, 0xC4D7,
05541     0x9D73, 0xC4D8, 0x9D74, 0xC4D9, 0x9D75, 0xC4DA, 0x9D76, 0xC4DB,
05542     0x9D77, 0xC4DC, 0x9D78, 0xC4DD, 0x9D79, 0xC4DE, 0x9D7A, 0xC4DF,
05543     0x9D81, 0xC4E0, 0x9D82, 0xC4E1, 0x9D83, 0xC4E2, 0x9D84, 0xC4E3,
05544     0x9D85, 0xC4E4, 0x9D86, 0xC4E5, 0x9D87, 0xC4E6, 0x9D88, 0xC4E7,
05545     0x9D89, 0xC4E8, 0x9D8A, 0xC4EA, 0x9D8B, 0xC4EB, 0x9D8C, 0xC4EC,
05546     0x9D8D, 0xC4ED, 0x9D8E, 0xC4EE, 0x9D8F, 0xC4EF, 0x9D90, 0xC4F2,
05547     0x9D91, 0xC4F3, 0x9D92, 0xC4F5, 0x9D93, 0xC4F6, 0x9D94, 0xC4F7,
05548     0x9D95, 0xC4F9, 0x9D96, 0xC4FB, 0x9D97, 0xC4FC, 0x9D98, 0xC4FD,
05549     0x9D99, 0xC4FE, 0x9D9A, 0xC502, 0x9D9B, 0xC503, 0x9D9C, 0xC504,
05550     0x9D9D, 0xC505, 0x9D9E, 0xC506, 0x9D9F, 0xC507, 0x9DA0, 0xC508,
05551     0x9DA1, 0xC509, 0x9DA2, 0xC50A, 0x9DA3, 0xC50B, 0x9DA4, 0xC50D,
05552     0x9DA5, 0xC50E, 0x9DA6, 0xC50F, 0x9DA7, 0xC511, 0x9DA8, 0xC512,
05553     0x9DA9, 0xC513, 0x9DAA, 0xC515, 0x9DAB, 0xC516, 0x9DAC, 0xC517,
05554     0x9DAD, 0xC518, 0x9DAE, 0xC519, 0x9DAF, 0xC51A, 0x9DB0, 0xC51B,
05555     0x9DB1, 0xC51D, 0x9DB2, 0xC51E, 0x9DB3, 0xC51F, 0x9DB4, 0xC520,
05556     0x9DB5, 0xC521, 0x9DB6, 0xC522, 0x9DB7, 0xC523, 0x9DB8, 0xC524,
05557     0x9DB9, 0xC525, 0x9DBA, 0xC526, 0x9DBB, 0xC527, 0x9DBC, 0xC52A,
05558     0x9DBD, 0xC52B, 0x9DBE, 0xC52D, 0x9DBF, 0xC52E, 0x9DC0, 0xC52F,
05559     0x9DC1, 0xC531, 0x9DC2, 0xC532, 0x9DC3, 0xC533, 0x9DC4, 0xC534,
05560     0x9DC5, 0xC535, 0x9DC6, 0xC536, 0x9DC7, 0xC537, 0x9DC8, 0xC53A,
05561     0x9DC9, 0xC53C, 0x9DCA, 0xC53E, 0x9DCB, 0xC53F, 0x9DCC, 0xC540,
05562     0x9DCD, 0xC541, 0x9DCE, 0xC542, 0x9DCF, 0xC543, 0x9DD0, 0xC546,
05563     0x9DD1, 0xC547, 0x9DD2, 0xC54B, 0x9DD3, 0xC54F, 0x9DD4, 0xC550,
05564     0x9DD5, 0xC551, 0x9DD6, 0xC552, 0x9DD7, 0xC556, 0x9DD8, 0xC55A,
05565     0x9DD9, 0xC55B, 0x9DDA, 0xC55C, 0x9DDB, 0xC55F, 0x9DDC, 0xC562,
05566     0x9DDD, 0xC563, 0x9DDE, 0xC565, 0x9DDF, 0xC566, 0x9DE0, 0xC567,
05567     0x9DE1, 0xC569, 0x9DE2, 0xC56A, 0x9DE3, 0xC56B, 0x9DE4, 0xC56C,
05568     0x9DE5, 0xC56D, 0x9DE6, 0xC56E, 0x9DE7, 0xC56F, 0x9DE8, 0xC572,
05569     0x9DE9, 0xC576, 0x9DEA, 0xC577, 0x9DEB, 0xC578, 0x9DEC, 0xC579,
05570     0x9DED, 0xC57A, 0x9DEE, 0xC57B, 0x9DEF, 0xC57E, 0x9DF0, 0xC57F,
05571     0x9DF1, 0xC581, 0x9DF2, 0xC582, 0x9DF3, 0xC583, 0x9DF4, 0xC585,
05572     0x9DF5, 0xC586, 0x9DF6, 0xC588, 0x9DF7, 0xC589, 0x9DF8, 0xC58A,
05573     0x9DF9, 0xC58B, 0x9DFA, 0xC58E, 0x9DFB, 0xC590, 0x9DFC, 0xC592,
05574     0x9DFD, 0xC593, 0x9DFE, 0xC594, 0x9E41, 0xC596, 0x9E42, 0xC599,
05575     0x9E43, 0xC59A, 0x9E44, 0xC59B, 0x9E45, 0xC59D, 0x9E46, 0xC59E,
05576     0x9E47, 0xC59F, 0x9E48, 0xC5A1, 0x9E49, 0xC5A2, 0x9E4A, 0xC5A3,
05577     0x9E4B, 0xC5A4, 0x9E4C, 0xC5A5, 0x9E4D, 0xC5A6, 0x9E4E, 0xC5A7,
05578     0x9E4F, 0xC5A8, 0x9E50, 0xC5AA, 0x9E51, 0xC5AB, 0x9E52, 0xC5AC,
05579     0x9E53, 0xC5AD, 0x9E54, 0xC5AE, 0x9E55, 0xC5AF, 0x9E56, 0xC5B0,
05580     0x9E57, 0xC5B1, 0x9E58, 0xC5B2, 0x9E59, 0xC5B3, 0x9E5A, 0xC5B6,
05581     0x9E61, 0xC5B7, 0x9E62, 0xC5BA, 0x9E63, 0xC5BF, 0x9E64, 0xC5C0,
05582     0x9E65, 0xC5C1, 0x9E66, 0xC5C2, 0x9E67, 0xC5C3, 0x9E68, 0xC5CB,
05583     0x9E69, 0xC5CD, 0x9E6A, 0xC5CF, 0x9E6B, 0xC5D2, 0x9E6C, 0xC5D3,
05584     0x9E6D, 0xC5D5, 0x9E6E, 0xC5D6, 0x9E6F, 0xC5D7, 0x9E70, 0xC5D9,
05585     0x9E71, 0xC5DA, 0x9E72, 0xC5DB, 0x9E73, 0xC5DC, 0x9E74, 0xC5DD,
05586     0x9E75, 0xC5DE, 0x9E76, 0xC5DF, 0x9E77, 0xC5E2, 0x9E78, 0xC5E4,
05587     0x9E79, 0xC5E6, 0x9E7A, 0xC5E7, 0x9E81, 0xC5E8, 0x9E82, 0xC5E9,
05588     0x9E83, 0xC5EA, 0x9E84, 0xC5EB, 0x9E85, 0xC5EF, 0x9E86, 0xC5F1,
05589     0x9E87, 0xC5F2, 0x9E88, 0xC5F3, 0x9E89, 0xC5F5, 0x9E8A, 0xC5F8,
05590     0x9E8B, 0xC5F9, 0x9E8C, 0xC5FA, 0x9E8D, 0xC5FB, 0x9E8E, 0xC602,
05591     0x9E8F, 0xC603, 0x9E90, 0xC604, 0x9E91, 0xC609, 0x9E92, 0xC60A,
05592     0x9E93, 0xC60B, 0x9E94, 0xC60D, 0x9E95, 0xC60E, 0x9E96, 0xC60F,
05593     0x9E97, 0xC611, 0x9E98, 0xC612, 0x9E99, 0xC613, 0x9E9A, 0xC614,
05594     0x9E9B, 0xC615, 0x9E9C, 0xC616, 0x9E9D, 0xC617, 0x9E9E, 0xC61A,
05595     0x9E9F, 0xC61D, 0x9EA0, 0xC61E, 0x9EA1, 0xC61F, 0x9EA2, 0xC620,
05596     0x9EA3, 0xC621, 0x9EA4, 0xC622, 0x9EA5, 0xC623, 0x9EA6, 0xC626,
05597     0x9EA7, 0xC627, 0x9EA8, 0xC629, 0x9EA9, 0xC62A, 0x9EAA, 0xC62B,
05598     0x9EAB, 0xC62F, 0x9EAC, 0xC631, 0x9EAD, 0xC632, 0x9EAE, 0xC636,
05599     0x9EAF, 0xC638, 0x9EB0, 0xC63A, 0x9EB1, 0xC63C, 0x9EB2, 0xC63D,
05600     0x9EB3, 0xC63E, 0x9EB4, 0xC63F, 0x9EB5, 0xC642, 0x9EB6, 0xC643,
05601     0x9EB7, 0xC645, 0x9EB8, 0xC646, 0x9EB9, 0xC647, 0x9EBA, 0xC649,
05602     0x9EBB, 0xC64A, 0x9EBC, 0xC64B, 0x9EBD, 0xC64C, 0x9EBE, 0xC64D,
05603     0x9EBF, 0xC64E, 0x9EC0, 0xC64F, 0x9EC1, 0xC652, 0x9EC2, 0xC656,
05604     0x9EC3, 0xC657, 0x9EC4, 0xC658, 0x9EC5, 0xC659, 0x9EC6, 0xC65A,
05605     0x9EC7, 0xC65B, 0x9EC8, 0xC65E, 0x9EC9, 0xC65F, 0x9ECA, 0xC661,
05606     0x9ECB, 0xC662, 0x9ECC, 0xC663, 0x9ECD, 0xC664, 0x9ECE, 0xC665,
05607     0x9ECF, 0xC666, 0x9ED0, 0xC667, 0x9ED1, 0xC668, 0x9ED2, 0xC669,
05608     0x9ED3, 0xC66A, 0x9ED4, 0xC66B, 0x9ED5, 0xC66D, 0x9ED6, 0xC66E,
05609     0x9ED7, 0xC670, 0x9ED8, 0xC672, 0x9ED9, 0xC673, 0x9EDA, 0xC674,
05610     0x9EDB, 0xC675, 0x9EDC, 0xC676, 0x9EDD, 0xC677, 0x9EDE, 0xC67A,
05611     0x9EDF, 0xC67B, 0x9EE0, 0xC67D, 0x9EE1, 0xC67E, 0x9EE2, 0xC67F,
05612     0x9EE3, 0xC681, 0x9EE4, 0xC682, 0x9EE5, 0xC683, 0x9EE6, 0xC684,
05613     0x9EE7, 0xC685, 0x9EE8, 0xC686, 0x9EE9, 0xC687, 0x9EEA, 0xC68A,
05614     0x9EEB, 0xC68C, 0x9EEC, 0xC68E, 0x9EED, 0xC68F, 0x9EEE, 0xC690,
05615     0x9EEF, 0xC691, 0x9EF0, 0xC692, 0x9EF1, 0xC693, 0x9EF2, 0xC696,
05616     0x9EF3, 0xC697, 0x9EF4, 0xC699, 0x9EF5, 0xC69A, 0x9EF6, 0xC69B,
05617     0x9EF7, 0xC69D, 0x9EF8, 0xC69E, 0x9EF9, 0xC69F, 0x9EFA, 0xC6A0,
05618     0x9EFB, 0xC6A1, 0x9EFC, 0xC6A2, 0x9EFD, 0xC6A3, 0x9EFE, 0xC6A6,
05619     0x9F41, 0xC6A8, 0x9F42, 0xC6AA, 0x9F43, 0xC6AB, 0x9F44, 0xC6AC,
05620     0x9F45, 0xC6AD, 0x9F46, 0xC6AE, 0x9F47, 0xC6AF, 0x9F48, 0xC6B2,
05621     0x9F49, 0xC6B3, 0x9F4A, 0xC6B5, 0x9F4B, 0xC6B6, 0x9F4C, 0xC6B7,
05622     0x9F4D, 0xC6BB, 0x9F4E, 0xC6BC, 0x9F4F, 0xC6BD, 0x9F50, 0xC6BE,
05623     0x9F51, 0xC6BF, 0x9F52, 0xC6C2, 0x9F53, 0xC6C4, 0x9F54, 0xC6C6,
05624     0x9F55, 0xC6C7, 0x9F56, 0xC6C8, 0x9F57, 0xC6C9, 0x9F58, 0xC6CA,
05625     0x9F59, 0xC6CB, 0x9F5A, 0xC6CE, 0x9F61, 0xC6CF, 0x9F62, 0xC6D1,
05626     0x9F63, 0xC6D2, 0x9F64, 0xC6D3, 0x9F65, 0xC6D5, 0x9F66, 0xC6D6,
05627     0x9F67, 0xC6D7, 0x9F68, 0xC6D8, 0x9F69, 0xC6D9, 0x9F6A, 0xC6DA,
05628     0x9F6B, 0xC6DB, 0x9F6C, 0xC6DE, 0x9F6D, 0xC6DF, 0x9F6E, 0xC6E2,
05629     0x9F6F, 0xC6E3, 0x9F70, 0xC6E4, 0x9F71, 0xC6E5, 0x9F72, 0xC6E6,
05630     0x9F73, 0xC6E7, 0x9F74, 0xC6EA, 0x9F75, 0xC6EB, 0x9F76, 0xC6ED,
05631     0x9F77, 0xC6EE, 0x9F78, 0xC6EF, 0x9F79, 0xC6F1, 0x9F7A, 0xC6F2,
05632     0x9F81, 0xC6F3, 0x9F82, 0xC6F4, 0x9F83, 0xC6F5, 0x9F84, 0xC6F6,
05633     0x9F85, 0xC6F7, 0x9F86, 0xC6FA, 0x9F87, 0xC6FB, 0x9F88, 0xC6FC,
05634     0x9F89, 0xC6FE, 0x9F8A, 0xC6FF, 0x9F8B, 0xC700, 0x9F8C, 0xC701,
05635     0x9F8D, 0xC702, 0x9F8E, 0xC703, 0x9F8F, 0xC706, 0x9F90, 0xC707,
05636     0x9F91, 0xC709, 0x9F92, 0xC70A, 0x9F93, 0xC70B, 0x9F94, 0xC70D,
05637     0x9F95, 0xC70E, 0x9F96, 0xC70F, 0x9F97, 0xC710, 0x9F98, 0xC711,
05638     0x9F99, 0xC712, 0x9F9A, 0xC713, 0x9F9B, 0xC716, 0x9F9C, 0xC718,
05639     0x9F9D, 0xC71A, 0x9F9E, 0xC71B, 0x9F9F, 0xC71C, 0x9FA0, 0xC71D,
05640     0x9FA1, 0xC71E, 0x9FA2, 0xC71F, 0x9FA3, 0xC722, 0x9FA4, 0xC723,
05641     0x9FA5, 0xC725, 0x9FA6, 0xC726, 0x9FA7, 0xC727, 0x9FA8, 0xC729,
05642     0x9FA9, 0xC72A, 0x9FAA, 0xC72B, 0x9FAB, 0xC72C, 0x9FAC, 0xC72D,
05643     0x9FAD, 0xC72E, 0x9FAE, 0xC72F, 0x9FAF, 0xC732, 0x9FB0, 0xC734,
05644     0x9FB1, 0xC736, 0x9FB2, 0xC738, 0x9FB3, 0xC739, 0x9FB4, 0xC73A,
05645     0x9FB5, 0xC73B, 0x9FB6, 0xC73E, 0x9FB7, 0xC73F, 0x9FB8, 0xC741,
05646     0x9FB9, 0xC742, 0x9FBA, 0xC743, 0x9FBB, 0xC745, 0x9FBC, 0xC746,
05647     0x9FBD, 0xC747, 0x9FBE, 0xC748, 0x9FBF, 0xC749, 0x9FC0, 0xC74B,
05648     0x9FC1, 0xC74E, 0x9FC2, 0xC750, 0x9FC3, 0xC759, 0x9FC4, 0xC75A,
05649     0x9FC5, 0xC75B, 0x9FC6, 0xC75D, 0x9FC7, 0xC75E, 0x9FC8, 0xC75F,
05650     0x9FC9, 0xC761, 0x9FCA, 0xC762, 0x9FCB, 0xC763, 0x9FCC, 0xC764,
05651     0x9FCD, 0xC765, 0x9FCE, 0xC766, 0x9FCF, 0xC767, 0x9FD0, 0xC769,
05652     0x9FD1, 0xC76A, 0x9FD2, 0xC76C, 0x9FD3, 0xC76D, 0x9FD4, 0xC76E,
05653     0x9FD5, 0xC76F, 0x9FD6, 0xC770, 0x9FD7, 0xC771, 0x9FD8, 0xC772,
05654     0x9FD9, 0xC773, 0x9FDA, 0xC776, 0x9FDB, 0xC777, 0x9FDC, 0xC779,
05655     0x9FDD, 0xC77A, 0x9FDE, 0xC77B, 0x9FDF, 0xC77F, 0x9FE0, 0xC780,
05656     0x9FE1, 0xC781, 0x9FE2, 0xC782, 0x9FE3, 0xC786, 0x9FE4, 0xC78B,
05657     0x9FE5, 0xC78C, 0x9FE6, 0xC78D, 0x9FE7, 0xC78F, 0x9FE8, 0xC792,
05658     0x9FE9, 0xC793, 0x9FEA, 0xC795, 0x9FEB, 0xC799, 0x9FEC, 0xC79B,
05659     0x9FED, 0xC79C, 0x9FEE, 0xC79D, 0x9FEF, 0xC79E, 0x9FF0, 0xC79F,
05660     0x9FF1, 0xC7A2, 0x9FF2, 0xC7A7, 0x9FF3, 0xC7A8, 0x9FF4, 0xC7A9,
05661     0x9FF5, 0xC7AA, 0x9FF6, 0xC7AB, 0x9FF7, 0xC7AE, 0x9FF8, 0xC7AF,
05662     0x9FF9, 0xC7B1, 0x9FFA, 0xC7B2, 0x9FFB, 0xC7B3, 0x9FFC, 0xC7B5,
05663     0x9FFD, 0xC7B6, 0x9FFE, 0xC7B7, 0xA041, 0xC7B8, 0xA042, 0xC7B9,
05664     0xA043, 0xC7BA, 0xA044, 0xC7BB, 0xA045, 0xC7BE, 0xA046, 0xC7C2,
05665     0xA047, 0xC7C3, 0xA048, 0xC7C4, 0xA049, 0xC7C5, 0xA04A, 0xC7C6,
05666     0xA04B, 0xC7C7, 0xA04C, 0xC7CA, 0xA04D, 0xC7CB, 0xA04E, 0xC7CD,
05667     0xA04F, 0xC7CF, 0xA050, 0xC7D1, 0xA051, 0xC7D2, 0xA052, 0xC7D3,
05668     0xA053, 0xC7D4, 0xA054, 0xC7D5, 0xA055, 0xC7D6, 0xA056, 0xC7D7,
05669     0xA057, 0xC7D9, 0xA058, 0xC7DA, 0xA059, 0xC7DB, 0xA05A, 0xC7DC,
05670     0xA061, 0xC7DE, 0xA062, 0xC7DF, 0xA063, 0xC7E0, 0xA064, 0xC7E1,
05671     0xA065, 0xC7E2, 0xA066, 0xC7E3, 0xA067, 0xC7E5, 0xA068, 0xC7E6,
05672     0xA069, 0xC7E7, 0xA06A, 0xC7E9, 0xA06B, 0xC7EA, 0xA06C, 0xC7EB,
05673     0xA06D, 0xC7ED, 0xA06E, 0xC7EE, 0xA06F, 0xC7EF, 0xA070, 0xC7F0,
05674     0xA071, 0xC7F1, 0xA072, 0xC7F2, 0xA073, 0xC7F3, 0xA074, 0xC7F4,
05675     0xA075, 0xC7F5, 0xA076, 0xC7F6, 0xA077, 0xC7F7, 0xA078, 0xC7F8,
05676     0xA079, 0xC7F9, 0xA07A, 0xC7FA, 0xA081, 0xC7FB, 0xA082, 0xC7FC,
05677     0xA083, 0xC7FD, 0xA084, 0xC7FE, 0xA085, 0xC7FF, 0xA086, 0xC802,
05678     0xA087, 0xC803, 0xA088, 0xC805, 0xA089, 0xC806, 0xA08A, 0xC807,
05679     0xA08B, 0xC809, 0xA08C, 0xC80B, 0xA08D, 0xC80C, 0xA08E, 0xC80D,
05680     0xA08F, 0xC80E, 0xA090, 0xC80F, 0xA091, 0xC812, 0xA092, 0xC814,
05681     0xA093, 0xC817, 0xA094, 0xC818, 0xA095, 0xC819, 0xA096, 0xC81A,
05682     0xA097, 0xC81B, 0xA098, 0xC81E, 0xA099, 0xC81F, 0xA09A, 0xC821,
05683     0xA09B, 0xC822, 0xA09C, 0xC823, 0xA09D, 0xC825, 0xA09E, 0xC826,
05684     0xA09F, 0xC827, 0xA0A0, 0xC828, 0xA0A1, 0xC829, 0xA0A2, 0xC82A,
05685     0xA0A3, 0xC82B, 0xA0A4, 0xC82E, 0xA0A5, 0xC830, 0xA0A6, 0xC832,
05686     0xA0A7, 0xC833, 0xA0A8, 0xC834, 0xA0A9, 0xC835, 0xA0AA, 0xC836,
05687     0xA0AB, 0xC837, 0xA0AC, 0xC839, 0xA0AD, 0xC83A, 0xA0AE, 0xC83B,
05688     0xA0AF, 0xC83D, 0xA0B0, 0xC83E, 0xA0B1, 0xC83F, 0xA0B2, 0xC841,
05689     0xA0B3, 0xC842, 0xA0B4, 0xC843, 0xA0B5, 0xC844, 0xA0B6, 0xC845,
05690     0xA0B7, 0xC846, 0xA0B8, 0xC847, 0xA0B9, 0xC84A, 0xA0BA, 0xC84B,
05691     0xA0BB, 0xC84E, 0xA0BC, 0xC84F, 0xA0BD, 0xC850, 0xA0BE, 0xC851,
05692     0xA0BF, 0xC852, 0xA0C0, 0xC853, 0xA0C1, 0xC855, 0xA0C2, 0xC856,
05693     0xA0C3, 0xC857, 0xA0C4, 0xC858, 0xA0C5, 0xC859, 0xA0C6, 0xC85A,
05694     0xA0C7, 0xC85B, 0xA0C8, 0xC85C, 0xA0C9, 0xC85D, 0xA0CA, 0xC85E,
05695     0xA0CB, 0xC85F, 0xA0CC, 0xC860, 0xA0CD, 0xC861, 0xA0CE, 0xC862,
05696     0xA0CF, 0xC863, 0xA0D0, 0xC864, 0xA0D1, 0xC865, 0xA0D2, 0xC866,
05697     0xA0D3, 0xC867, 0xA0D4, 0xC868, 0xA0D5, 0xC869, 0xA0D6, 0xC86A,
05698     0xA0D7, 0xC86B, 0xA0D8, 0xC86C, 0xA0D9, 0xC86D, 0xA0DA, 0xC86E,
05699     0xA0DB, 0xC86F, 0xA0DC, 0xC872, 0xA0DD, 0xC873, 0xA0DE, 0xC875,
05700     0xA0DF, 0xC876, 0xA0E0, 0xC877, 0xA0E1, 0xC879, 0xA0E2, 0xC87B,
05701     0xA0E3, 0xC87C, 0xA0E4, 0xC87D, 0xA0E5, 0xC87E, 0xA0E6, 0xC87F,
05702     0xA0E7, 0xC882, 0xA0E8, 0xC884, 0xA0E9, 0xC888, 0xA0EA, 0xC889,
05703     0xA0EB, 0xC88A, 0xA0EC, 0xC88E, 0xA0ED, 0xC88F, 0xA0EE, 0xC890,
05704     0xA0EF, 0xC891, 0xA0F0, 0xC892, 0xA0F1, 0xC893, 0xA0F2, 0xC895,
05705     0xA0F3, 0xC896, 0xA0F4, 0xC897, 0xA0F5, 0xC898, 0xA0F6, 0xC899,
05706     0xA0F7, 0xC89A, 0xA0F8, 0xC89B, 0xA0F9, 0xC89C, 0xA0FA, 0xC89E,
05707     0xA0FB, 0xC8A0, 0xA0FC, 0xC8A2, 0xA0FD, 0xC8A3, 0xA0FE, 0xC8A4,
05708     0xA141, 0xC8A5, 0xA142, 0xC8A6, 0xA143, 0xC8A7, 0xA144, 0xC8A9,
05709     0xA145, 0xC8AA, 0xA146, 0xC8AB, 0xA147, 0xC8AC, 0xA148, 0xC8AD,
05710     0xA149, 0xC8AE, 0xA14A, 0xC8AF, 0xA14B, 0xC8B0, 0xA14C, 0xC8B1,
05711     0xA14D, 0xC8B2, 0xA14E, 0xC8B3, 0xA14F, 0xC8B4, 0xA150, 0xC8B5,
05712     0xA151, 0xC8B6, 0xA152, 0xC8B7, 0xA153, 0xC8B8, 0xA154, 0xC8B9,
05713     0xA155, 0xC8BA, 0xA156, 0xC8BB, 0xA157, 0xC8BE, 0xA158, 0xC8BF,
05714     0xA159, 0xC8C0, 0xA15A, 0xC8C1, 0xA161, 0xC8C2, 0xA162, 0xC8C3,
05715     0xA163, 0xC8C5, 0xA164, 0xC8C6, 0xA165, 0xC8C7, 0xA166, 0xC8C9,
05716     0xA167, 0xC8CA, 0xA168, 0xC8CB, 0xA169, 0xC8CD, 0xA16A, 0xC8CE,
05717     0xA16B, 0xC8CF, 0xA16C, 0xC8D0, 0xA16D, 0xC8D1, 0xA16E, 0xC8D2,
05718     0xA16F, 0xC8D3, 0xA170, 0xC8D6, 0xA171, 0xC8D8, 0xA172, 0xC8DA,
05719     0xA173, 0xC8DB, 0xA174, 0xC8DC, 0xA175, 0xC8DD, 0xA176, 0xC8DE,
05720     0xA177, 0xC8DF, 0xA178, 0xC8E2, 0xA179, 0xC8E3, 0xA17A, 0xC8E5,
05721     0xA181, 0xC8E6, 0xA182, 0xC8E7, 0xA183, 0xC8E8, 0xA184, 0xC8E9,
05722     0xA185, 0xC8EA, 0xA186, 0xC8EB, 0xA187, 0xC8EC, 0xA188, 0xC8ED,
05723     0xA189, 0xC8EE, 0xA18A, 0xC8EF, 0xA18B, 0xC8F0, 0xA18C, 0xC8F1,
05724     0xA18D, 0xC8F2, 0xA18E, 0xC8F3, 0xA18F, 0xC8F4, 0xA190, 0xC8F6,
05725     0xA191, 0xC8F7, 0xA192, 0xC8F8, 0xA193, 0xC8F9, 0xA194, 0xC8FA,
05726     0xA195, 0xC8FB, 0xA196, 0xC8FE, 0xA197, 0xC8FF, 0xA198, 0xC901,
05727     0xA199, 0xC902, 0xA19A, 0xC903, 0xA19B, 0xC907, 0xA19C, 0xC908,
05728     0xA19D, 0xC909, 0xA19E, 0xC90A, 0xA19F, 0xC90B, 0xA1A0, 0xC90E,
05729     0xA1A1, 0x3000, 0xA1A2, 0x3001, 0xA1A3, 0x3002, 0xA1A4, 0x00B7,
05730     0xA1A5, 0x2025, 0xA1A6, 0x2026, 0xA1A7, 0x00A8, 0xA1A8, 0x3003,
05731     0xA1A9, 0x00AD, 0xA1AA, 0x2015, 0xA1AB, 0x2225, 0xA1AC, 0xFF3C,
05732     0xA1AD, 0x223C, 0xA1AE, 0x2018, 0xA1AF, 0x2019, 0xA1B0, 0x201C,
05733     0xA1B1, 0x201D, 0xA1B2, 0x3014, 0xA1B3, 0x3015, 0xA1B4, 0x3008,
05734     0xA1B5, 0x3009, 0xA1B6, 0x300A, 0xA1B7, 0x300B, 0xA1B8, 0x300C,
05735     0xA1B9, 0x300D, 0xA1BA, 0x300E, 0xA1BB, 0x300F, 0xA1BC, 0x3010,
05736     0xA1BD, 0x3011, 0xA1BE, 0x00B1, 0xA1BF, 0x00D7, 0xA1C0, 0x00F7,
05737     0xA1C1, 0x2260, 0xA1C2, 0x2264, 0xA1C3, 0x2265, 0xA1C4, 0x221E,
05738     0xA1C5, 0x2234, 0xA1C6, 0x00B0, 0xA1C7, 0x2032, 0xA1C8, 0x2033,
05739     0xA1C9, 0x2103, 0xA1CA, 0x212B, 0xA1CB, 0xFFE0, 0xA1CC, 0xFFE1,
05740     0xA1CD, 0xFFE5, 0xA1CE, 0x2642, 0xA1CF, 0x2640, 0xA1D0, 0x2220,
05741     0xA1D1, 0x22A5, 0xA1D2, 0x2312, 0xA1D3, 0x2202, 0xA1D4, 0x2207,
05742     0xA1D5, 0x2261, 0xA1D6, 0x2252, 0xA1D7, 0x00A7, 0xA1D8, 0x203B,
05743     0xA1D9, 0x2606, 0xA1DA, 0x2605, 0xA1DB, 0x25CB, 0xA1DC, 0x25CF,
05744     0xA1DD, 0x25CE, 0xA1DE, 0x25C7, 0xA1DF, 0x25C6, 0xA1E0, 0x25A1,
05745     0xA1E1, 0x25A0, 0xA1E2, 0x25B3, 0xA1E3, 0x25B2, 0xA1E4, 0x25BD,
05746     0xA1E5, 0x25BC, 0xA1E6, 0x2192, 0xA1E7, 0x2190, 0xA1E8, 0x2191,
05747     0xA1E9, 0x2193, 0xA1EA, 0x2194, 0xA1EB, 0x3013, 0xA1EC, 0x226A,
05748     0xA1ED, 0x226B, 0xA1EE, 0x221A, 0xA1EF, 0x223D, 0xA1F0, 0x221D,
05749     0xA1F1, 0x2235, 0xA1F2, 0x222B, 0xA1F3, 0x222C, 0xA1F4, 0x2208,
05750     0xA1F5, 0x220B, 0xA1F6, 0x2286, 0xA1F7, 0x2287, 0xA1F8, 0x2282,
05751     0xA1F9, 0x2283, 0xA1FA, 0x222A, 0xA1FB, 0x2229, 0xA1FC, 0x2227,
05752     0xA1FD, 0x2228, 0xA1FE, 0xFFE2, 0xA241, 0xC910, 0xA242, 0xC912,
05753     0xA243, 0xC913, 0xA244, 0xC914, 0xA245, 0xC915, 0xA246, 0xC916,
05754     0xA247, 0xC917, 0xA248, 0xC919, 0xA249, 0xC91A, 0xA24A, 0xC91B,
05755     0xA24B, 0xC91C, 0xA24C, 0xC91D, 0xA24D, 0xC91E, 0xA24E, 0xC91F,
05756     0xA24F, 0xC920, 0xA250, 0xC921, 0xA251, 0xC922, 0xA252, 0xC923,
05757     0xA253, 0xC924, 0xA254, 0xC925, 0xA255, 0xC926, 0xA256, 0xC927,
05758     0xA257, 0xC928, 0xA258, 0xC929, 0xA259, 0xC92A, 0xA25A, 0xC92B,
05759     0xA261, 0xC92D, 0xA262, 0xC92E, 0xA263, 0xC92F, 0xA264, 0xC930,
05760     0xA265, 0xC931, 0xA266, 0xC932, 0xA267, 0xC933, 0xA268, 0xC935,
05761     0xA269, 0xC936, 0xA26A, 0xC937, 0xA26B, 0xC938, 0xA26C, 0xC939,
05762     0xA26D, 0xC93A, 0xA26E, 0xC93B, 0xA26F, 0xC93C, 0xA270, 0xC93D,
05763     0xA271, 0xC93E, 0xA272, 0xC93F, 0xA273, 0xC940, 0xA274, 0xC941,
05764     0xA275, 0xC942, 0xA276, 0xC943, 0xA277, 0xC944, 0xA278, 0xC945,
05765     0xA279, 0xC946, 0xA27A, 0xC947, 0xA281, 0xC948, 0xA282, 0xC949,
05766     0xA283, 0xC94A, 0xA284, 0xC94B, 0xA285, 0xC94C, 0xA286, 0xC94D,
05767     0xA287, 0xC94E, 0xA288, 0xC94F, 0xA289, 0xC952, 0xA28A, 0xC953,
05768     0xA28B, 0xC955, 0xA28C, 0xC956, 0xA28D, 0xC957, 0xA28E, 0xC959,
05769     0xA28F, 0xC95A, 0xA290, 0xC95B, 0xA291, 0xC95C, 0xA292, 0xC95D,
05770     0xA293, 0xC95E, 0xA294, 0xC95F, 0xA295, 0xC962, 0xA296, 0xC964,
05771     0xA297, 0xC965, 0xA298, 0xC966, 0xA299, 0xC967, 0xA29A, 0xC968,
05772     0xA29B, 0xC969, 0xA29C, 0xC96A, 0xA29D, 0xC96B, 0xA29E, 0xC96D,
05773     0xA29F, 0xC96E, 0xA2A0, 0xC96F, 0xA2A1, 0x21D2, 0xA2A2, 0x21D4,
05774     0xA2A3, 0x2200, 0xA2A4, 0x2203, 0xA2A5, 0x00B4, 0xA2A6, 0xFF5E,
05775     0xA2A7, 0x02C7, 0xA2A8, 0x02D8, 0xA2A9, 0x02DD, 0xA2AA, 0x02DA,
05776     0xA2AB, 0x02D9, 0xA2AC, 0x00B8, 0xA2AD, 0x02DB, 0xA2AE, 0x00A1,
05777     0xA2AF, 0x00BF, 0xA2B0, 0x02D0, 0xA2B1, 0x222E, 0xA2B2, 0x2211,
05778     0xA2B3, 0x220F, 0xA2B4, 0x00A4, 0xA2B5, 0x2109, 0xA2B6, 0x2030,
05779     0xA2B7, 0x25C1, 0xA2B8, 0x25C0, 0xA2B9, 0x25B7, 0xA2BA, 0x25B6,
05780     0xA2BB, 0x2664, 0xA2BC, 0x2660, 0xA2BD, 0x2661, 0xA2BE, 0x2665,
05781     0xA2BF, 0x2667, 0xA2C0, 0x2663, 0xA2C1, 0x2299, 0xA2C2, 0x25C8,
05782     0xA2C3, 0x25A3, 0xA2C4, 0x25D0, 0xA2C5, 0x25D1, 0xA2C6, 0x2592,
05783     0xA2C7, 0x25A4, 0xA2C8, 0x25A5, 0xA2C9, 0x25A8, 0xA2CA, 0x25A7,
05784     0xA2CB, 0x25A6, 0xA2CC, 0x25A9, 0xA2CD, 0x2668, 0xA2CE, 0x260F,
05785     0xA2CF, 0x260E, 0xA2D0, 0x261C, 0xA2D1, 0x261E, 0xA2D2, 0x00B6,
05786     0xA2D3, 0x2020, 0xA2D4, 0x2021, 0xA2D5, 0x2195, 0xA2D6, 0x2197,
05787     0xA2D7, 0x2199, 0xA2D8, 0x2196, 0xA2D9, 0x2198, 0xA2DA, 0x266D,
05788     0xA2DB, 0x2669, 0xA2DC, 0x266A, 0xA2DD, 0x266C, 0xA2DE, 0x327F,
05789     0xA2DF, 0x321C, 0xA2E0, 0x2116, 0xA2E1, 0x33C7, 0xA2E2, 0x2122,
05790     0xA2E3, 0x33C2, 0xA2E4, 0x33D8, 0xA2E5, 0x2121, 0xA2E6, 0x20AC,
05791     0xA2E7, 0x00AE, 0xA341, 0xC971, 0xA342, 0xC972, 0xA343, 0xC973,
05792     0xA344, 0xC975, 0xA345, 0xC976, 0xA346, 0xC977, 0xA347, 0xC978,
05793     0xA348, 0xC979, 0xA349, 0xC97A, 0xA34A, 0xC97B, 0xA34B, 0xC97D,
05794     0xA34C, 0xC97E, 0xA34D, 0xC97F, 0xA34E, 0xC980, 0xA34F, 0xC981,
05795     0xA350, 0xC982, 0xA351, 0xC983, 0xA352, 0xC984, 0xA353, 0xC985,
05796     0xA354, 0xC986, 0xA355, 0xC987, 0xA356, 0xC98A, 0xA357, 0xC98B,
05797     0xA358, 0xC98D, 0xA359, 0xC98E, 0xA35A, 0xC98F, 0xA361, 0xC991,
05798     0xA362, 0xC992, 0xA363, 0xC993, 0xA364, 0xC994, 0xA365, 0xC995,
05799     0xA366, 0xC996, 0xA367, 0xC997, 0xA368, 0xC99A, 0xA369, 0xC99C,
05800     0xA36A, 0xC99E, 0xA36B, 0xC99F, 0xA36C, 0xC9A0, 0xA36D, 0xC9A1,
05801     0xA36E, 0xC9A2, 0xA36F, 0xC9A3, 0xA370, 0xC9A4, 0xA371, 0xC9A5,
05802     0xA372, 0xC9A6, 0xA373, 0xC9A7, 0xA374, 0xC9A8, 0xA375, 0xC9A9,
05803     0xA376, 0xC9AA, 0xA377, 0xC9AB, 0xA378, 0xC9AC, 0xA379, 0xC9AD,
05804     0xA37A, 0xC9AE, 0xA381, 0xC9AF, 0xA382, 0xC9B0, 0xA383, 0xC9B1,
05805     0xA384, 0xC9B2, 0xA385, 0xC9B3, 0xA386, 0xC9B4, 0xA387, 0xC9B5,
05806     0xA388, 0xC9B6, 0xA389, 0xC9B7, 0xA38A, 0xC9B8, 0xA38B, 0xC9B9,
05807     0xA38C, 0xC9BA, 0xA38D, 0xC9BB, 0xA38E, 0xC9BC, 0xA38F, 0xC9BD,
05808     0xA390, 0xC9BE, 0xA391, 0xC9BF, 0xA392, 0xC9C2, 0xA393, 0xC9C3,
05809     0xA394, 0xC9C5, 0xA395, 0xC9C6, 0xA396, 0xC9C9, 0xA397, 0xC9CB,
05810     0xA398, 0xC9CC, 0xA399, 0xC9CD, 0xA39A, 0xC9CE, 0xA39B, 0xC9CF,
05811     0xA39C, 0xC9D2, 0xA39D, 0xC9D4, 0xA39E, 0xC9D7, 0xA39F, 0xC9D8,
05812     0xA3A0, 0xC9DB, 0xA3A1, 0xFF01, 0xA3A2, 0xFF02, 0xA3A3, 0xFF03,
05813     0xA3A4, 0xFF04, 0xA3A5, 0xFF05, 0xA3A6, 0xFF06, 0xA3A7, 0xFF07,
05814     0xA3A8, 0xFF08, 0xA3A9, 0xFF09, 0xA3AA, 0xFF0A, 0xA3AB, 0xFF0B,
05815     0xA3AC, 0xFF0C, 0xA3AD, 0xFF0D, 0xA3AE, 0xFF0E, 0xA3AF, 0xFF0F,
05816     0xA3B0, 0xFF10, 0xA3B1, 0xFF11, 0xA3B2, 0xFF12, 0xA3B3, 0xFF13,
05817     0xA3B4, 0xFF14, 0xA3B5, 0xFF15, 0xA3B6, 0xFF16, 0xA3B7, 0xFF17,
05818     0xA3B8, 0xFF18, 0xA3B9, 0xFF19, 0xA3BA, 0xFF1A, 0xA3BB, 0xFF1B,
05819     0xA3BC, 0xFF1C, 0xA3BD, 0xFF1D, 0xA3BE, 0xFF1E, 0xA3BF, 0xFF1F,
05820     0xA3C0, 0xFF20, 0xA3C1, 0xFF21, 0xA3C2, 0xFF22, 0xA3C3, 0xFF23,
05821     0xA3C4, 0xFF24, 0xA3C5, 0xFF25, 0xA3C6, 0xFF26, 0xA3C7, 0xFF27,
05822     0xA3C8, 0xFF28, 0xA3C9, 0xFF29, 0xA3CA, 0xFF2A, 0xA3CB, 0xFF2B,
05823     0xA3CC, 0xFF2C, 0xA3CD, 0xFF2D, 0xA3CE, 0xFF2E, 0xA3CF, 0xFF2F,
05824     0xA3D0, 0xFF30, 0xA3D1, 0xFF31, 0xA3D2, 0xFF32, 0xA3D3, 0xFF33,
05825     0xA3D4, 0xFF34, 0xA3D5, 0xFF35, 0xA3D6, 0xFF36, 0xA3D7, 0xFF37,
05826     0xA3D8, 0xFF38, 0xA3D9, 0xFF39, 0xA3DA, 0xFF3A, 0xA3DB, 0xFF3B,
05827     0xA3DC, 0xFFE6, 0xA3DD, 0xFF3D, 0xA3DE, 0xFF3E, 0xA3DF, 0xFF3F,
05828     0xA3E0, 0xFF40, 0xA3E1, 0xFF41, 0xA3E2, 0xFF42, 0xA3E3, 0xFF43,
05829     0xA3E4, 0xFF44, 0xA3E5, 0xFF45, 0xA3E6, 0xFF46, 0xA3E7, 0xFF47,
05830     0xA3E8, 0xFF48, 0xA3E9, 0xFF49, 0xA3EA, 0xFF4A, 0xA3EB, 0xFF4B,
05831     0xA3EC, 0xFF4C, 0xA3ED, 0xFF4D, 0xA3EE, 0xFF4E, 0xA3EF, 0xFF4F,
05832     0xA3F0, 0xFF50, 0xA3F1, 0xFF51, 0xA3F2, 0xFF52, 0xA3F3, 0xFF53,
05833     0xA3F4, 0xFF54, 0xA3F5, 0xFF55, 0xA3F6, 0xFF56, 0xA3F7, 0xFF57,
05834     0xA3F8, 0xFF58, 0xA3F9, 0xFF59, 0xA3FA, 0xFF5A, 0xA3FB, 0xFF5B,
05835     0xA3FC, 0xFF5C, 0xA3FD, 0xFF5D, 0xA3FE, 0xFFE3, 0xA441, 0xC9DE,
05836     0xA442, 0xC9DF, 0xA443, 0xC9E1, 0xA444, 0xC9E3, 0xA445, 0xC9E5,
05837     0xA446, 0xC9E6, 0xA447, 0xC9E8, 0xA448, 0xC9E9, 0xA449, 0xC9EA,
05838     0xA44A, 0xC9EB, 0xA44B, 0xC9EE, 0xA44C, 0xC9F2, 0xA44D, 0xC9F3,
05839     0xA44E, 0xC9F4, 0xA44F, 0xC9F5, 0xA450, 0xC9F6, 0xA451, 0xC9F7,
05840     0xA452, 0xC9FA, 0xA453, 0xC9FB, 0xA454, 0xC9FD, 0xA455, 0xC9FE,
05841     0xA456, 0xC9FF, 0xA457, 0xCA01, 0xA458, 0xCA02, 0xA459, 0xCA03,
05842     0xA45A, 0xCA04, 0xA461, 0xCA05, 0xA462, 0xCA06, 0xA463, 0xCA07,
05843     0xA464, 0xCA0A, 0xA465, 0xCA0E, 0xA466, 0xCA0F, 0xA467, 0xCA10,
05844     0xA468, 0xCA11, 0xA469, 0xCA12, 0xA46A, 0xCA13, 0xA46B, 0xCA15,
05845     0xA46C, 0xCA16, 0xA46D, 0xCA17, 0xA46E, 0xCA19, 0xA46F, 0xCA1A,
05846     0xA470, 0xCA1B, 0xA471, 0xCA1C, 0xA472, 0xCA1D, 0xA473, 0xCA1E,
05847     0xA474, 0xCA1F, 0xA475, 0xCA20, 0xA476, 0xCA21, 0xA477, 0xCA22,
05848     0xA478, 0xCA23, 0xA479, 0xCA24, 0xA47A, 0xCA25, 0xA481, 0xCA26,
05849     0xA482, 0xCA27, 0xA483, 0xCA28, 0xA484, 0xCA2A, 0xA485, 0xCA2B,
05850     0xA486, 0xCA2C, 0xA487, 0xCA2D, 0xA488, 0xCA2E, 0xA489, 0xCA2F,
05851     0xA48A, 0xCA30, 0xA48B, 0xCA31, 0xA48C, 0xCA32, 0xA48D, 0xCA33,
05852     0xA48E, 0xCA34, 0xA48F, 0xCA35, 0xA490, 0xCA36, 0xA491, 0xCA37,
05853     0xA492, 0xCA38, 0xA493, 0xCA39, 0xA494, 0xCA3A, 0xA495, 0xCA3B,
05854     0xA496, 0xCA3C, 0xA497, 0xCA3D, 0xA498, 0xCA3E, 0xA499, 0xCA3F,
05855     0xA49A, 0xCA40, 0xA49B, 0xCA41, 0xA49C, 0xCA42, 0xA49D, 0xCA43,
05856     0xA49E, 0xCA44, 0xA49F, 0xCA45, 0xA4A0, 0xCA46, 0xA4A1, 0x3131,
05857     0xA4A2, 0x3132, 0xA4A3, 0x3133, 0xA4A4, 0x3134, 0xA4A5, 0x3135,
05858     0xA4A6, 0x3136, 0xA4A7, 0x3137, 0xA4A8, 0x3138, 0xA4A9, 0x3139,
05859     0xA4AA, 0x313A, 0xA4AB, 0x313B, 0xA4AC, 0x313C, 0xA4AD, 0x313D,
05860     0xA4AE, 0x313E, 0xA4AF, 0x313F, 0xA4B0, 0x3140, 0xA4B1, 0x3141,
05861     0xA4B2, 0x3142, 0xA4B3, 0x3143, 0xA4B4, 0x3144, 0xA4B5, 0x3145,
05862     0xA4B6, 0x3146, 0xA4B7, 0x3147, 0xA4B8, 0x3148, 0xA4B9, 0x3149,
05863     0xA4BA, 0x314A, 0xA4BB, 0x314B, 0xA4BC, 0x314C, 0xA4BD, 0x314D,
05864     0xA4BE, 0x314E, 0xA4BF, 0x314F, 0xA4C0, 0x3150, 0xA4C1, 0x3151,
05865     0xA4C2, 0x3152, 0xA4C3, 0x3153, 0xA4C4, 0x3154, 0xA4C5, 0x3155,
05866     0xA4C6, 0x3156, 0xA4C7, 0x3157, 0xA4C8, 0x3158, 0xA4C9, 0x3159,
05867     0xA4CA, 0x315A, 0xA4CB, 0x315B, 0xA4CC, 0x315C, 0xA4CD, 0x315D,
05868     0xA4CE, 0x315E, 0xA4CF, 0x315F, 0xA4D0, 0x3160, 0xA4D1, 0x3161,
05869     0xA4D2, 0x3162, 0xA4D3, 0x3163, 0xA4D4, 0x3164, 0xA4D5, 0x3165,
05870     0xA4D6, 0x3166, 0xA4D7, 0x3167, 0xA4D8, 0x3168, 0xA4D9, 0x3169,
05871     0xA4DA, 0x316A, 0xA4DB, 0x316B, 0xA4DC, 0x316C, 0xA4DD, 0x316D,
05872     0xA4DE, 0x316E, 0xA4DF, 0x316F, 0xA4E0, 0x3170, 0xA4E1, 0x3171,
05873     0xA4E2, 0x3172, 0xA4E3, 0x3173, 0xA4E4, 0x3174, 0xA4E5, 0x3175,
05874     0xA4E6, 0x3176, 0xA4E7, 0x3177, 0xA4E8, 0x3178, 0xA4E9, 0x3179,
05875     0xA4EA, 0x317A, 0xA4EB, 0x317B, 0xA4EC, 0x317C, 0xA4ED, 0x317D,
05876     0xA4EE, 0x317E, 0xA4EF, 0x317F, 0xA4F0, 0x3180, 0xA4F1, 0x3181,
05877     0xA4F2, 0x3182, 0xA4F3, 0x3183, 0xA4F4, 0x3184, 0xA4F5, 0x3185,
05878     0xA4F6, 0x3186, 0xA4F7, 0x3187, 0xA4F8, 0x3188, 0xA4F9, 0x3189,
05879     0xA4FA, 0x318A, 0xA4FB, 0x318B, 0xA4FC, 0x318C, 0xA4FD, 0x318D,
05880     0xA4FE, 0x318E, 0xA541, 0xCA47, 0xA542, 0xCA48, 0xA543, 0xCA49,
05881     0xA544, 0xCA4A, 0xA545, 0xCA4B, 0xA546, 0xCA4E, 0xA547, 0xCA4F,
05882     0xA548, 0xCA51, 0xA549, 0xCA52, 0xA54A, 0xCA53, 0xA54B, 0xCA55,
05883     0xA54C, 0xCA56, 0xA54D, 0xCA57, 0xA54E, 0xCA58, 0xA54F, 0xCA59,
05884     0xA550, 0xCA5A, 0xA551, 0xCA5B, 0xA552, 0xCA5E, 0xA553, 0xCA62,
05885     0xA554, 0xCA63, 0xA555, 0xCA64, 0xA556, 0xCA65, 0xA557, 0xCA66,
05886     0xA558, 0xCA67, 0xA559, 0xCA69, 0xA55A, 0xCA6A, 0xA561, 0xCA6B,
05887     0xA562, 0xCA6C, 0xA563, 0xCA6D, 0xA564, 0xCA6E, 0xA565, 0xCA6F,
05888     0xA566, 0xCA70, 0xA567, 0xCA71, 0xA568, 0xCA72, 0xA569, 0xCA73,
05889     0xA56A, 0xCA74, 0xA56B, 0xCA75, 0xA56C, 0xCA76, 0xA56D, 0xCA77,
05890     0xA56E, 0xCA78, 0xA56F, 0xCA79, 0xA570, 0xCA7A, 0xA571, 0xCA7B,
05891     0xA572, 0xCA7C, 0xA573, 0xCA7E, 0xA574, 0xCA7F, 0xA575, 0xCA80,
05892     0xA576, 0xCA81, 0xA577, 0xCA82, 0xA578, 0xCA83, 0xA579, 0xCA85,
05893     0xA57A, 0xCA86, 0xA581, 0xCA87, 0xA582, 0xCA88, 0xA583, 0xCA89,
05894     0xA584, 0xCA8A, 0xA585, 0xCA8B, 0xA586, 0xCA8C, 0xA587, 0xCA8D,
05895     0xA588, 0xCA8E, 0xA589, 0xCA8F, 0xA58A, 0xCA90, 0xA58B, 0xCA91,
05896     0xA58C, 0xCA92, 0xA58D, 0xCA93, 0xA58E, 0xCA94, 0xA58F, 0xCA95,
05897     0xA590, 0xCA96, 0xA591, 0xCA97, 0xA592, 0xCA99, 0xA593, 0xCA9A,
05898     0xA594, 0xCA9B, 0xA595, 0xCA9C, 0xA596, 0xCA9D, 0xA597, 0xCA9E,
05899     0xA598, 0xCA9F, 0xA599, 0xCAA0, 0xA59A, 0xCAA1, 0xA59B, 0xCAA2,
05900     0xA59C, 0xCAA3, 0xA59D, 0xCAA4, 0xA59E, 0xCAA5, 0xA59F, 0xCAA6,
05901     0xA5A0, 0xCAA7, 0xA5A1, 0x2170, 0xA5A2, 0x2171, 0xA5A3, 0x2172,
05902     0xA5A4, 0x2173, 0xA5A5, 0x2174, 0xA5A6, 0x2175, 0xA5A7, 0x2176,
05903     0xA5A8, 0x2177, 0xA5A9, 0x2178, 0xA5AA, 0x2179, 0xA5B0, 0x2160,
05904     0xA5B1, 0x2161, 0xA5B2, 0x2162, 0xA5B3, 0x2163, 0xA5B4, 0x2164,
05905     0xA5B5, 0x2165, 0xA5B6, 0x2166, 0xA5B7, 0x2167, 0xA5B8, 0x2168,
05906     0xA5B9, 0x2169, 0xA5C1, 0x0391, 0xA5C2, 0x0392, 0xA5C3, 0x0393,
05907     0xA5C4, 0x0394, 0xA5C5, 0x0395, 0xA5C6, 0x0396, 0xA5C7, 0x0397,
05908     0xA5C8, 0x0398, 0xA5C9, 0x0399, 0xA5CA, 0x039A, 0xA5CB, 0x039B,
05909     0xA5CC, 0x039C, 0xA5CD, 0x039D, 0xA5CE, 0x039E, 0xA5CF, 0x039F,
05910     0xA5D0, 0x03A0, 0xA5D1, 0x03A1, 0xA5D2, 0x03A3, 0xA5D3, 0x03A4,
05911     0xA5D4, 0x03A5, 0xA5D5, 0x03A6, 0xA5D6, 0x03A7, 0xA5D7, 0x03A8,
05912     0xA5D8, 0x03A9, 0xA5E1, 0x03B1, 0xA5E2, 0x03B2, 0xA5E3, 0x03B3,
05913     0xA5E4, 0x03B4, 0xA5E5, 0x03B5, 0xA5E6, 0x03B6, 0xA5E7, 0x03B7,
05914     0xA5E8, 0x03B8, 0xA5E9, 0x03B9, 0xA5EA, 0x03BA, 0xA5EB, 0x03BB,
05915     0xA5EC, 0x03BC, 0xA5ED, 0x03BD, 0xA5EE, 0x03BE, 0xA5EF, 0x03BF,
05916     0xA5F0, 0x03C0, 0xA5F1, 0x03C1, 0xA5F2, 0x03C3, 0xA5F3, 0x03C4,
05917     0xA5F4, 0x03C5, 0xA5F5, 0x03C6, 0xA5F6, 0x03C7, 0xA5F7, 0x03C8,
05918     0xA5F8, 0x03C9, 0xA641, 0xCAA8, 0xA642, 0xCAA9, 0xA643, 0xCAAA,
05919     0xA644, 0xCAAB, 0xA645, 0xCAAC, 0xA646, 0xCAAD, 0xA647, 0xCAAE,
05920     0xA648, 0xCAAF, 0xA649, 0xCAB0, 0xA64A, 0xCAB1, 0xA64B, 0xCAB2,
05921     0xA64C, 0xCAB3, 0xA64D, 0xCAB4, 0xA64E, 0xCAB5, 0xA64F, 0xCAB6,
05922     0xA650, 0xCAB7, 0xA651, 0xCAB8, 0xA652, 0xCAB9, 0xA653, 0xCABA,
05923     0xA654, 0xCABB, 0xA655, 0xCABE, 0xA656, 0xCABF, 0xA657, 0xCAC1,
05924     0xA658, 0xCAC2, 0xA659, 0xCAC3, 0xA65A, 0xCAC5, 0xA661, 0xCAC6,
05925     0xA662, 0xCAC7, 0xA663, 0xCAC8, 0xA664, 0xCAC9, 0xA665, 0xCACA,
05926     0xA666, 0xCACB, 0xA667, 0xCACE, 0xA668, 0xCAD0, 0xA669, 0xCAD2,
05927     0xA66A, 0xCAD4, 0xA66B, 0xCAD5, 0xA66C, 0xCAD6, 0xA66D, 0xCAD7,
05928     0xA66E, 0xCADA, 0xA66F, 0xCADB, 0xA670, 0xCADC, 0xA671, 0xCADD,
05929     0xA672, 0xCADE, 0xA673, 0xCADF, 0xA674, 0xCAE1, 0xA675, 0xCAE2,
05930     0xA676, 0xCAE3, 0xA677, 0xCAE4, 0xA678, 0xCAE5, 0xA679, 0xCAE6,
05931     0xA67A, 0xCAE7, 0xA681, 0xCAE8, 0xA682, 0xCAE9, 0xA683, 0xCAEA,
05932     0xA684, 0xCAEB, 0xA685, 0xCAED, 0xA686, 0xCAEE, 0xA687, 0xCAEF,
05933     0xA688, 0xCAF0, 0xA689, 0xCAF1, 0xA68A, 0xCAF2, 0xA68B, 0xCAF3,
05934     0xA68C, 0xCAF5, 0xA68D, 0xCAF6, 0xA68E, 0xCAF7, 0xA68F, 0xCAF8,
05935     0xA690, 0xCAF9, 0xA691, 0xCAFA, 0xA692, 0xCAFB, 0xA693, 0xCAFC,
05936     0xA694, 0xCAFD, 0xA695, 0xCAFE, 0xA696, 0xCAFF, 0xA697, 0xCB00,
05937     0xA698, 0xCB01, 0xA699, 0xCB02, 0xA69A, 0xCB03, 0xA69B, 0xCB04,
05938     0xA69C, 0xCB05, 0xA69D, 0xCB06, 0xA69E, 0xCB07, 0xA69F, 0xCB09,
05939     0xA6A0, 0xCB0A, 0xA6A1, 0x2500, 0xA6A2, 0x2502, 0xA6A3, 0x250C,
05940     0xA6A4, 0x2510, 0xA6A5, 0x2518, 0xA6A6, 0x2514, 0xA6A7, 0x251C,
05941     0xA6A8, 0x252C, 0xA6A9, 0x2524, 0xA6AA, 0x2534, 0xA6AB, 0x253C,
05942     0xA6AC, 0x2501, 0xA6AD, 0x2503, 0xA6AE, 0x250F, 0xA6AF, 0x2513,
05943     0xA6B0, 0x251B, 0xA6B1, 0x2517, 0xA6B2, 0x2523, 0xA6B3, 0x2533,
05944     0xA6B4, 0x252B, 0xA6B5, 0x253B, 0xA6B6, 0x254B, 0xA6B7, 0x2520,
05945     0xA6B8, 0x252F, 0xA6B9, 0x2528, 0xA6BA, 0x2537, 0xA6BB, 0x253F,
05946     0xA6BC, 0x251D, 0xA6BD, 0x2530, 0xA6BE, 0x2525, 0xA6BF, 0x2538,
05947     0xA6C0, 0x2542, 0xA6C1, 0x2512, 0xA6C2, 0x2511, 0xA6C3, 0x251A,
05948     0xA6C4, 0x2519, 0xA6C5, 0x2516, 0xA6C6, 0x2515, 0xA6C7, 0x250E,
05949     0xA6C8, 0x250D, 0xA6C9, 0x251E, 0xA6CA, 0x251F, 0xA6CB, 0x2521,
05950     0xA6CC, 0x2522, 0xA6CD, 0x2526, 0xA6CE, 0x2527, 0xA6CF, 0x2529,
05951     0xA6D0, 0x252A, 0xA6D1, 0x252D, 0xA6D2, 0x252E, 0xA6D3, 0x2531,
05952     0xA6D4, 0x2532, 0xA6D5, 0x2535, 0xA6D6, 0x2536, 0xA6D7, 0x2539,
05953     0xA6D8, 0x253A, 0xA6D9, 0x253D, 0xA6DA, 0x253E, 0xA6DB, 0x2540,
05954     0xA6DC, 0x2541, 0xA6DD, 0x2543, 0xA6DE, 0x2544, 0xA6DF, 0x2545,
05955     0xA6E0, 0x2546, 0xA6E1, 0x2547, 0xA6E2, 0x2548, 0xA6E3, 0x2549,
05956     0xA6E4, 0x254A, 0xA741, 0xCB0B, 0xA742, 0xCB0C, 0xA743, 0xCB0D,
05957     0xA744, 0xCB0E, 0xA745, 0xCB0F, 0xA746, 0xCB11, 0xA747, 0xCB12,
05958     0xA748, 0xCB13, 0xA749, 0xCB15, 0xA74A, 0xCB16, 0xA74B, 0xCB17,
05959     0xA74C, 0xCB19, 0xA74D, 0xCB1A, 0xA74E, 0xCB1B, 0xA74F, 0xCB1C,
05960     0xA750, 0xCB1D, 0xA751, 0xCB1E, 0xA752, 0xCB1F, 0xA753, 0xCB22,
05961     0xA754, 0xCB23, 0xA755, 0xCB24, 0xA756, 0xCB25, 0xA757, 0xCB26,
05962     0xA758, 0xCB27, 0xA759, 0xCB28, 0xA75A, 0xCB29, 0xA761, 0xCB2A,
05963     0xA762, 0xCB2B, 0xA763, 0xCB2C, 0xA764, 0xCB2D, 0xA765, 0xCB2E,
05964     0xA766, 0xCB2F, 0xA767, 0xCB30, 0xA768, 0xCB31, 0xA769, 0xCB32,
05965     0xA76A, 0xCB33, 0xA76B, 0xCB34, 0xA76C, 0xCB35, 0xA76D, 0xCB36,
05966     0xA76E, 0xCB37, 0xA76F, 0xCB38, 0xA770, 0xCB39, 0xA771, 0xCB3A,
05967     0xA772, 0xCB3B, 0xA773, 0xCB3C, 0xA774, 0xCB3D, 0xA775, 0xCB3E,
05968     0xA776, 0xCB3F, 0xA777, 0xCB40, 0xA778, 0xCB42, 0xA779, 0xCB43,
05969     0xA77A, 0xCB44, 0xA781, 0xCB45, 0xA782, 0xCB46, 0xA783, 0xCB47,
05970     0xA784, 0xCB4A, 0xA785, 0xCB4B, 0xA786, 0xCB4D, 0xA787, 0xCB4E,
05971     0xA788, 0xCB4F, 0xA789, 0xCB51, 0xA78A, 0xCB52, 0xA78B, 0xCB53,
05972     0xA78C, 0xCB54, 0xA78D, 0xCB55, 0xA78E, 0xCB56, 0xA78F, 0xCB57,
05973     0xA790, 0xCB5A, 0xA791, 0xCB5B, 0xA792, 0xCB5C, 0xA793, 0xCB5E,
05974     0xA794, 0xCB5F, 0xA795, 0xCB60, 0xA796, 0xCB61, 0xA797, 0xCB62,
05975     0xA798, 0xCB63, 0xA799, 0xCB65, 0xA79A, 0xCB66, 0xA79B, 0xCB67,
05976     0xA79C, 0xCB68, 0xA79D, 0xCB69, 0xA79E, 0xCB6A, 0xA79F, 0xCB6B,
05977     0xA7A0, 0xCB6C, 0xA7A1, 0x3395, 0xA7A2, 0x3396, 0xA7A3, 0x3397,
05978     0xA7A4, 0x2113, 0xA7A5, 0x3398, 0xA7A6, 0x33C4, 0xA7A7, 0x33A3,
05979     0xA7A8, 0x33A4, 0xA7A9, 0x33A5, 0xA7AA, 0x33A6, 0xA7AB, 0x3399,
05980     0xA7AC, 0x339A, 0xA7AD, 0x339B, 0xA7AE, 0x339C, 0xA7AF, 0x339D,
05981     0xA7B0, 0x339E, 0xA7B1, 0x339F, 0xA7B2, 0x33A0, 0xA7B3, 0x33A1,
05982     0xA7B4, 0x33A2, 0xA7B5, 0x33CA, 0xA7B6, 0x338D, 0xA7B7, 0x338E,
05983     0xA7B8, 0x338F, 0xA7B9, 0x33CF, 0xA7BA, 0x3388, 0xA7BB, 0x3389,
05984     0xA7BC, 0x33C8, 0xA7BD, 0x33A7, 0xA7BE, 0x33A8, 0xA7BF, 0x33B0,
05985     0xA7C0, 0x33B1, 0xA7C1, 0x33B2, 0xA7C2, 0x33B3, 0xA7C3, 0x33B4,
05986     0xA7C4, 0x33B5, 0xA7C5, 0x33B6, 0xA7C6, 0x33B7, 0xA7C7, 0x33B8,
05987     0xA7C8, 0x33B9, 0xA7C9, 0x3380, 0xA7CA, 0x3381, 0xA7CB, 0x3382,
05988     0xA7CC, 0x3383, 0xA7CD, 0x3384, 0xA7CE, 0x33BA, 0xA7CF, 0x33BB,
05989     0xA7D0, 0x33BC, 0xA7D1, 0x33BD, 0xA7D2, 0x33BE, 0xA7D3, 0x33BF,
05990     0xA7D4, 0x3390, 0xA7D5, 0x3391, 0xA7D6, 0x3392, 0xA7D7, 0x3393,
05991     0xA7D8, 0x3394, 0xA7D9, 0x2126, 0xA7DA, 0x33C0, 0xA7DB, 0x33C1,
05992     0xA7DC, 0x338A, 0xA7DD, 0x338B, 0xA7DE, 0x338C, 0xA7DF, 0x33D6,
05993     0xA7E0, 0x33C5, 0xA7E1, 0x33AD, 0xA7E2, 0x33AE, 0xA7E3, 0x33AF,
05994     0xA7E4, 0x33DB, 0xA7E5, 0x33A9, 0xA7E6, 0x33AA, 0xA7E7, 0x33AB,
05995     0xA7E8, 0x33AC, 0xA7E9, 0x33DD, 0xA7EA, 0x33D0, 0xA7EB, 0x33D3,
05996     0xA7EC, 0x33C3, 0xA7ED, 0x33C9, 0xA7EE, 0x33DC, 0xA7EF, 0x33C6,
05997     0xA841, 0xCB6D, 0xA842, 0xCB6E, 0xA843, 0xCB6F, 0xA844, 0xCB70,
05998     0xA845, 0xCB71, 0xA846, 0xCB72, 0xA847, 0xCB73, 0xA848, 0xCB74,
05999     0xA849, 0xCB75, 0xA84A, 0xCB76, 0xA84B, 0xCB77, 0xA84C, 0xCB7A,
06000     0xA84D, 0xCB7B, 0xA84E, 0xCB7C, 0xA84F, 0xCB7D, 0xA850, 0xCB7E,
06001     0xA851, 0xCB7F, 0xA852, 0xCB80, 0xA853, 0xCB81, 0xA854, 0xCB82,
06002     0xA855, 0xCB83, 0xA856, 0xCB84, 0xA857, 0xCB85, 0xA858, 0xCB86,
06003     0xA859, 0xCB87, 0xA85A, 0xCB88, 0xA861, 0xCB89, 0xA862, 0xCB8A,
06004     0xA863, 0xCB8B, 0xA864, 0xCB8C, 0xA865, 0xCB8D, 0xA866, 0xCB8E,
06005     0xA867, 0xCB8F, 0xA868, 0xCB90, 0xA869, 0xCB91, 0xA86A, 0xCB92,
06006     0xA86B, 0xCB93, 0xA86C, 0xCB94, 0xA86D, 0xCB95, 0xA86E, 0xCB96,
06007     0xA86F, 0xCB97, 0xA870, 0xCB98, 0xA871, 0xCB99, 0xA872, 0xCB9A,
06008     0xA873, 0xCB9B, 0xA874, 0xCB9D, 0xA875, 0xCB9E, 0xA876, 0xCB9F,
06009     0xA877, 0xCBA0, 0xA878, 0xCBA1, 0xA879, 0xCBA2, 0xA87A, 0xCBA3,
06010     0xA881, 0xCBA4, 0xA882, 0xCBA5, 0xA883, 0xCBA6, 0xA884, 0xCBA7,
06011     0xA885, 0xCBA8, 0xA886, 0xCBA9, 0xA887, 0xCBAA, 0xA888, 0xCBAB,
06012     0xA889, 0xCBAC, 0xA88A, 0xCBAD, 0xA88B, 0xCBAE, 0xA88C, 0xCBAF,
06013     0xA88D, 0xCBB0, 0xA88E, 0xCBB1, 0xA88F, 0xCBB2, 0xA890, 0xCBB3,
06014     0xA891, 0xCBB4, 0xA892, 0xCBB5, 0xA893, 0xCBB6, 0xA894, 0xCBB7,
06015     0xA895, 0xCBB9, 0xA896, 0xCBBA, 0xA897, 0xCBBB, 0xA898, 0xCBBC,
06016     0xA899, 0xCBBD, 0xA89A, 0xCBBE, 0xA89B, 0xCBBF, 0xA89C, 0xCBC0,
06017     0xA89D, 0xCBC1, 0xA89E, 0xCBC2, 0xA89F, 0xCBC3, 0xA8A0, 0xCBC4,
06018     0xA8A1, 0x00C6, 0xA8A2, 0x00D0, 0xA8A3, 0x00AA, 0xA8A4, 0x0126,
06019     0xA8A6, 0x0132, 0xA8A8, 0x013F, 0xA8A9, 0x0141, 0xA8AA, 0x00D8,
06020     0xA8AB, 0x0152, 0xA8AC, 0x00BA, 0xA8AD, 0x00DE, 0xA8AE, 0x0166,
06021     0xA8AF, 0x014A, 0xA8B1, 0x3260, 0xA8B2, 0x3261, 0xA8B3, 0x3262,
06022     0xA8B4, 0x3263, 0xA8B5, 0x3264, 0xA8B6, 0x3265, 0xA8B7, 0x3266,
06023     0xA8B8, 0x3267, 0xA8B9, 0x3268, 0xA8BA, 0x3269, 0xA8BB, 0x326A,
06024     0xA8BC, 0x326B, 0xA8BD, 0x326C, 0xA8BE, 0x326D, 0xA8BF, 0x326E,
06025     0xA8C0, 0x326F, 0xA8C1, 0x3270, 0xA8C2, 0x3271, 0xA8C3, 0x3272,
06026     0xA8C4, 0x3273, 0xA8C5, 0x3274, 0xA8C6, 0x3275, 0xA8C7, 0x3276,
06027     0xA8C8, 0x3277, 0xA8C9, 0x3278, 0xA8CA, 0x3279, 0xA8CB, 0x327A,
06028     0xA8CC, 0x327B, 0xA8CD, 0x24D0, 0xA8CE, 0x24D1, 0xA8CF, 0x24D2,
06029     0xA8D0, 0x24D3, 0xA8D1, 0x24D4, 0xA8D2, 0x24D5, 0xA8D3, 0x24D6,
06030     0xA8D4, 0x24D7, 0xA8D5, 0x24D8, 0xA8D6, 0x24D9, 0xA8D7, 0x24DA,
06031     0xA8D8, 0x24DB, 0xA8D9, 0x24DC, 0xA8DA, 0x24DD, 0xA8DB, 0x24DE,
06032     0xA8DC, 0x24DF, 0xA8DD, 0x24E0, 0xA8DE, 0x24E1, 0xA8DF, 0x24E2,
06033     0xA8E0, 0x24E3, 0xA8E1, 0x24E4, 0xA8E2, 0x24E5, 0xA8E3, 0x24E6,
06034     0xA8E4, 0x24E7, 0xA8E5, 0x24E8, 0xA8E6, 0x24E9, 0xA8E7, 0x2460,
06035     0xA8E8, 0x2461, 0xA8E9, 0x2462, 0xA8EA, 0x2463, 0xA8EB, 0x2464,
06036     0xA8EC, 0x2465, 0xA8ED, 0x2466, 0xA8EE, 0x2467, 0xA8EF, 0x2468,
06037     0xA8F0, 0x2469, 0xA8F1, 0x246A, 0xA8F2, 0x246B, 0xA8F3, 0x246C,
06038     0xA8F4, 0x246D, 0xA8F5, 0x246E, 0xA8F6, 0x00BD, 0xA8F7, 0x2153,
06039     0xA8F8, 0x2154, 0xA8F9, 0x00BC, 0xA8FA, 0x00BE, 0xA8FB, 0x215B,
06040     0xA8FC, 0x215C, 0xA8FD, 0x215D, 0xA8FE, 0x215E, 0xA941, 0xCBC5,
06041     0xA942, 0xCBC6, 0xA943, 0xCBC7, 0xA944, 0xCBC8, 0xA945, 0xCBC9,
06042     0xA946, 0xCBCA, 0xA947, 0xCBCB, 0xA948, 0xCBCC, 0xA949, 0xCBCD,
06043     0xA94A, 0xCBCE, 0xA94B, 0xCBCF, 0xA94C, 0xCBD0, 0xA94D, 0xCBD1,
06044     0xA94E, 0xCBD2, 0xA94F, 0xCBD3, 0xA950, 0xCBD5, 0xA951, 0xCBD6,
06045     0xA952, 0xCBD7, 0xA953, 0xCBD8, 0xA954, 0xCBD9, 0xA955, 0xCBDA,
06046     0xA956, 0xCBDB, 0xA957, 0xCBDC, 0xA958, 0xCBDD, 0xA959, 0xCBDE,
06047     0xA95A, 0xCBDF, 0xA961, 0xCBE0, 0xA962, 0xCBE1, 0xA963, 0xCBE2,
06048     0xA964, 0xCBE3, 0xA965, 0xCBE5, 0xA966, 0xCBE6, 0xA967, 0xCBE8,
06049     0xA968, 0xCBEA, 0xA969, 0xCBEB, 0xA96A, 0xCBEC, 0xA96B, 0xCBED,
06050     0xA96C, 0xCBEE, 0xA96D, 0xCBEF, 0xA96E, 0xCBF0, 0xA96F, 0xCBF1,
06051     0xA970, 0xCBF2, 0xA971, 0xCBF3, 0xA972, 0xCBF4, 0xA973, 0xCBF5,
06052     0xA974, 0xCBF6, 0xA975, 0xCBF7, 0xA976, 0xCBF8, 0xA977, 0xCBF9,
06053     0xA978, 0xCBFA, 0xA979, 0xCBFB, 0xA97A, 0xCBFC, 0xA981, 0xCBFD,
06054     0xA982, 0xCBFE, 0xA983, 0xCBFF, 0xA984, 0xCC00, 0xA985, 0xCC01,
06055     0xA986, 0xCC02, 0xA987, 0xCC03, 0xA988, 0xCC04, 0xA989, 0xCC05,
06056     0xA98A, 0xCC06, 0xA98B, 0xCC07, 0xA98C, 0xCC08, 0xA98D, 0xCC09,
06057     0xA98E, 0xCC0A, 0xA98F, 0xCC0B, 0xA990, 0xCC0E, 0xA991, 0xCC0F,
06058     0xA992, 0xCC11, 0xA993, 0xCC12, 0xA994, 0xCC13, 0xA995, 0xCC15,
06059     0xA996, 0xCC16, 0xA997, 0xCC17, 0xA998, 0xCC18, 0xA999, 0xCC19,
06060     0xA99A, 0xCC1A, 0xA99B, 0xCC1B, 0xA99C, 0xCC1E, 0xA99D, 0xCC1F,
06061     0xA99E, 0xCC20, 0xA99F, 0xCC23, 0xA9A0, 0xCC24, 0xA9A1, 0x00E6,
06062     0xA9A2, 0x0111, 0xA9A3, 0x00F0, 0xA9A4, 0x0127, 0xA9A5, 0x0131,
06063     0xA9A6, 0x0133, 0xA9A7, 0x0138, 0xA9A8, 0x0140, 0xA9A9, 0x0142,
06064     0xA9AA, 0x00F8, 0xA9AB, 0x0153, 0xA9AC, 0x00DF, 0xA9AD, 0x00FE,
06065     0xA9AE, 0x0167, 0xA9AF, 0x014B, 0xA9B0, 0x0149, 0xA9B1, 0x3200,
06066     0xA9B2, 0x3201, 0xA9B3, 0x3202, 0xA9B4, 0x3203, 0xA9B5, 0x3204,
06067     0xA9B6, 0x3205, 0xA9B7, 0x3206, 0xA9B8, 0x3207, 0xA9B9, 0x3208,
06068     0xA9BA, 0x3209, 0xA9BB, 0x320A, 0xA9BC, 0x320B, 0xA9BD, 0x320C,
06069     0xA9BE, 0x320D, 0xA9BF, 0x320E, 0xA9C0, 0x320F, 0xA9C1, 0x3210,
06070     0xA9C2, 0x3211, 0xA9C3, 0x3212, 0xA9C4, 0x3213, 0xA9C5, 0x3214,
06071     0xA9C6, 0x3215, 0xA9C7, 0x3216, 0xA9C8, 0x3217, 0xA9C9, 0x3218,
06072     0xA9CA, 0x3219, 0xA9CB, 0x321A, 0xA9CC, 0x321B, 0xA9CD, 0x249C,
06073     0xA9CE, 0x249D, 0xA9CF, 0x249E, 0xA9D0, 0x249F, 0xA9D1, 0x24A0,
06074     0xA9D2, 0x24A1, 0xA9D3, 0x24A2, 0xA9D4, 0x24A3, 0xA9D5, 0x24A4,
06075     0xA9D6, 0x24A5, 0xA9D7, 0x24A6, 0xA9D8, 0x24A7, 0xA9D9, 0x24A8,
06076     0xA9DA, 0x24A9, 0xA9DB, 0x24AA, 0xA9DC, 0x24AB, 0xA9DD, 0x24AC,
06077     0xA9DE, 0x24AD, 0xA9DF, 0x24AE, 0xA9E0, 0x24AF, 0xA9E1, 0x24B0,
06078     0xA9E2, 0x24B1, 0xA9E3, 0x24B2, 0xA9E4, 0x24B3, 0xA9E5, 0x24B4,
06079     0xA9E6, 0x24B5, 0xA9E7, 0x2474, 0xA9E8, 0x2475, 0xA9E9, 0x2476,
06080     0xA9EA, 0x2477, 0xA9EB, 0x2478, 0xA9EC, 0x2479, 0xA9ED, 0x247A,
06081     0xA9EE, 0x247B, 0xA9EF, 0x247C, 0xA9F0, 0x247D, 0xA9F1, 0x247E,
06082     0xA9F2, 0x247F, 0xA9F3, 0x2480, 0xA9F4, 0x2481, 0xA9F5, 0x2482,
06083     0xA9F6, 0x00B9, 0xA9F7, 0x00B2, 0xA9F8, 0x00B3, 0xA9F9, 0x2074,
06084     0xA9FA, 0x207F, 0xA9FB, 0x2081, 0xA9FC, 0x2082, 0xA9FD, 0x2083,
06085     0xA9FE, 0x2084, 0xAA41, 0xCC25, 0xAA42, 0xCC26, 0xAA43, 0xCC2A,
06086     0xAA44, 0xCC2B, 0xAA45, 0xCC2D, 0xAA46, 0xCC2F, 0xAA47, 0xCC31,
06087     0xAA48, 0xCC32, 0xAA49, 0xCC33, 0xAA4A, 0xCC34, 0xAA4B, 0xCC35,
06088     0xAA4C, 0xCC36, 0xAA4D, 0xCC37, 0xAA4E, 0xCC3A, 0xAA4F, 0xCC3F,
06089     0xAA50, 0xCC40, 0xAA51, 0xCC41, 0xAA52, 0xCC42, 0xAA53, 0xCC43,
06090     0xAA54, 0xCC46, 0xAA55, 0xCC47, 0xAA56, 0xCC49, 0xAA57, 0xCC4A,
06091     0xAA58, 0xCC4B, 0xAA59, 0xCC4D, 0xAA5A, 0xCC4E, 0xAA61, 0xCC4F,
06092     0xAA62, 0xCC50, 0xAA63, 0xCC51, 0xAA64, 0xCC52, 0xAA65, 0xCC53,
06093     0xAA66, 0xCC56, 0xAA67, 0xCC5A, 0xAA68, 0xCC5B, 0xAA69, 0xCC5C,
06094     0xAA6A, 0xCC5D, 0xAA6B, 0xCC5E, 0xAA6C, 0xCC5F, 0xAA6D, 0xCC61,
06095     0xAA6E, 0xCC62, 0xAA6F, 0xCC63, 0xAA70, 0xCC65, 0xAA71, 0xCC67,
06096     0xAA72, 0xCC69, 0xAA73, 0xCC6A, 0xAA74, 0xCC6B, 0xAA75, 0xCC6C,
06097     0xAA76, 0xCC6D, 0xAA77, 0xCC6E, 0xAA78, 0xCC6F, 0xAA79, 0xCC71,
06098     0xAA7A, 0xCC72, 0xAA81, 0xCC73, 0xAA82, 0xCC74, 0xAA83, 0xCC76,
06099     0xAA84, 0xCC77, 0xAA85, 0xCC78, 0xAA86, 0xCC79, 0xAA87, 0xCC7A,
06100     0xAA88, 0xCC7B, 0xAA89, 0xCC7C, 0xAA8A, 0xCC7D, 0xAA8B, 0xCC7E,
06101     0xAA8C, 0xCC7F, 0xAA8D, 0xCC80, 0xAA8E, 0xCC81, 0xAA8F, 0xCC82,
06102     0xAA90, 0xCC83, 0xAA91, 0xCC84, 0xAA92, 0xCC85, 0xAA93, 0xCC86,
06103     0xAA94, 0xCC87, 0xAA95, 0xCC88, 0xAA96, 0xCC89, 0xAA97, 0xCC8A,
06104     0xAA98, 0xCC8B, 0xAA99, 0xCC8C, 0xAA9A, 0xCC8D, 0xAA9B, 0xCC8E,
06105     0xAA9C, 0xCC8F, 0xAA9D, 0xCC90, 0xAA9E, 0xCC91, 0xAA9F, 0xCC92,
06106     0xAAA0, 0xCC93, 0xAAA1, 0x3041, 0xAAA2, 0x3042, 0xAAA3, 0x3043,
06107     0xAAA4, 0x3044, 0xAAA5, 0x3045, 0xAAA6, 0x3046, 0xAAA7, 0x3047,
06108     0xAAA8, 0x3048, 0xAAA9, 0x3049, 0xAAAA, 0x304A, 0xAAAB, 0x304B,
06109     0xAAAC, 0x304C, 0xAAAD, 0x304D, 0xAAAE, 0x304E, 0xAAAF, 0x304F,
06110     0xAAB0, 0x3050, 0xAAB1, 0x3051, 0xAAB2, 0x3052, 0xAAB3, 0x3053,
06111     0xAAB4, 0x3054, 0xAAB5, 0x3055, 0xAAB6, 0x3056, 0xAAB7, 0x3057,
06112     0xAAB8, 0x3058, 0xAAB9, 0x3059, 0xAABA, 0x305A, 0xAABB, 0x305B,
06113     0xAABC, 0x305C, 0xAABD, 0x305D, 0xAABE, 0x305E, 0xAABF, 0x305F,
06114     0xAAC0, 0x3060, 0xAAC1, 0x3061, 0xAAC2, 0x3062, 0xAAC3, 0x3063,
06115     0xAAC4, 0x3064, 0xAAC5, 0x3065, 0xAAC6, 0x3066, 0xAAC7, 0x3067,
06116     0xAAC8, 0x3068, 0xAAC9, 0x3069, 0xAACA, 0x306A, 0xAACB, 0x306B,
06117     0xAACC, 0x306C, 0xAACD, 0x306D, 0xAACE, 0x306E, 0xAACF, 0x306F,
06118     0xAAD0, 0x3070, 0xAAD1, 0x3071, 0xAAD2, 0x3072, 0xAAD3, 0x3073,
06119     0xAAD4, 0x3074, 0xAAD5, 0x3075, 0xAAD6, 0x3076, 0xAAD7, 0x3077,
06120     0xAAD8, 0x3078, 0xAAD9, 0x3079, 0xAADA, 0x307A, 0xAADB, 0x307B,
06121     0xAADC, 0x307C, 0xAADD, 0x307D, 0xAADE, 0x307E, 0xAADF, 0x307F,
06122     0xAAE0, 0x3080, 0xAAE1, 0x3081, 0xAAE2, 0x3082, 0xAAE3, 0x3083,
06123     0xAAE4, 0x3084, 0xAAE5, 0x3085, 0xAAE6, 0x3086, 0xAAE7, 0x3087,
06124     0xAAE8, 0x3088, 0xAAE9, 0x3089, 0xAAEA, 0x308A, 0xAAEB, 0x308B,
06125     0xAAEC, 0x308C, 0xAAED, 0x308D, 0xAAEE, 0x308E, 0xAAEF, 0x308F,
06126     0xAAF0, 0x3090, 0xAAF1, 0x3091, 0xAAF2, 0x3092, 0xAAF3, 0x3093,
06127     0xAB41, 0xCC94, 0xAB42, 0xCC95, 0xAB43, 0xCC96, 0xAB44, 0xCC97,
06128     0xAB45, 0xCC9A, 0xAB46, 0xCC9B, 0xAB47, 0xCC9D, 0xAB48, 0xCC9E,
06129     0xAB49, 0xCC9F, 0xAB4A, 0xCCA1, 0xAB4B, 0xCCA2, 0xAB4C, 0xCCA3,
06130     0xAB4D, 0xCCA4, 0xAB4E, 0xCCA5, 0xAB4F, 0xCCA6, 0xAB50, 0xCCA7,
06131     0xAB51, 0xCCAA, 0xAB52, 0xCCAE, 0xAB53, 0xCCAF, 0xAB54, 0xCCB0,
06132     0xAB55, 0xCCB1, 0xAB56, 0xCCB2, 0xAB57, 0xCCB3, 0xAB58, 0xCCB6,
06133     0xAB59, 0xCCB7, 0xAB5A, 0xCCB9, 0xAB61, 0xCCBA, 0xAB62, 0xCCBB,
06134     0xAB63, 0xCCBD, 0xAB64, 0xCCBE, 0xAB65, 0xCCBF, 0xAB66, 0xCCC0,
06135     0xAB67, 0xCCC1, 0xAB68, 0xCCC2, 0xAB69, 0xCCC3, 0xAB6A, 0xCCC6,
06136     0xAB6B, 0xCCC8, 0xAB6C, 0xCCCA, 0xAB6D, 0xCCCB, 0xAB6E, 0xCCCC,
06137     0xAB6F, 0xCCCD, 0xAB70, 0xCCCE, 0xAB71, 0xCCCF, 0xAB72, 0xCCD1,
06138     0xAB73, 0xCCD2, 0xAB74, 0xCCD3, 0xAB75, 0xCCD5, 0xAB76, 0xCCD6,
06139     0xAB77, 0xCCD7, 0xAB78, 0xCCD8, 0xAB79, 0xCCD9, 0xAB7A, 0xCCDA,
06140     0xAB81, 0xCCDB, 0xAB82, 0xCCDC, 0xAB83, 0xCCDD, 0xAB84, 0xCCDE,
06141     0xAB85, 0xCCDF, 0xAB86, 0xCCE0, 0xAB87, 0xCCE1, 0xAB88, 0xCCE2,
06142     0xAB89, 0xCCE3, 0xAB8A, 0xCCE5, 0xAB8B, 0xCCE6, 0xAB8C, 0xCCE7,
06143     0xAB8D, 0xCCE8, 0xAB8E, 0xCCE9, 0xAB8F, 0xCCEA, 0xAB90, 0xCCEB,
06144     0xAB91, 0xCCED, 0xAB92, 0xCCEE, 0xAB93, 0xCCEF, 0xAB94, 0xCCF1,
06145     0xAB95, 0xCCF2, 0xAB96, 0xCCF3, 0xAB97, 0xCCF4, 0xAB98, 0xCCF5,
06146     0xAB99, 0xCCF6, 0xAB9A, 0xCCF7, 0xAB9B, 0xCCF8, 0xAB9C, 0xCCF9,
06147     0xAB9D, 0xCCFA, 0xAB9E, 0xCCFB, 0xAB9F, 0xCCFC, 0xABA0, 0xCCFD,
06148     0xABA1, 0x30A1, 0xABA2, 0x30A2, 0xABA3, 0x30A3, 0xABA4, 0x30A4,
06149     0xABA5, 0x30A5, 0xABA6, 0x30A6, 0xABA7, 0x30A7, 0xABA8, 0x30A8,
06150     0xABA9, 0x30A9, 0xABAA, 0x30AA, 0xABAB, 0x30AB, 0xABAC, 0x30AC,
06151     0xABAD, 0x30AD, 0xABAE, 0x30AE, 0xABAF, 0x30AF, 0xABB0, 0x30B0,
06152     0xABB1, 0x30B1, 0xABB2, 0x30B2, 0xABB3, 0x30B3, 0xABB4, 0x30B4,
06153     0xABB5, 0x30B5, 0xABB6, 0x30B6, 0xABB7, 0x30B7, 0xABB8, 0x30B8,
06154     0xABB9, 0x30B9, 0xABBA, 0x30BA, 0xABBB, 0x30BB, 0xABBC, 0x30BC,
06155     0xABBD, 0x30BD, 0xABBE, 0x30BE, 0xABBF, 0x30BF, 0xABC0, 0x30C0,
06156     0xABC1, 0x30C1, 0xABC2, 0x30C2, 0xABC3, 0x30C3, 0xABC4, 0x30C4,
06157     0xABC5, 0x30C5, 0xABC6, 0x30C6, 0xABC7, 0x30C7, 0xABC8, 0x30C8,
06158     0xABC9, 0x30C9, 0xABCA, 0x30CA, 0xABCB, 0x30CB, 0xABCC, 0x30CC,
06159     0xABCD, 0x30CD, 0xABCE, 0x30CE, 0xABCF, 0x30CF, 0xABD0, 0x30D0,
06160     0xABD1, 0x30D1, 0xABD2, 0x30D2, 0xABD3, 0x30D3, 0xABD4, 0x30D4,
06161     0xABD5, 0x30D5, 0xABD6, 0x30D6, 0xABD7, 0x30D7, 0xABD8, 0x30D8,
06162     0xABD9, 0x30D9, 0xABDA, 0x30DA, 0xABDB, 0x30DB, 0xABDC, 0x30DC,
06163     0xABDD, 0x30DD, 0xABDE, 0x30DE, 0xABDF, 0x30DF, 0xABE0, 0x30E0,
06164     0xABE1, 0x30E1, 0xABE2, 0x30E2, 0xABE3, 0x30E3, 0xABE4, 0x30E4,
06165     0xABE5, 0x30E5, 0xABE6, 0x30E6, 0xABE7, 0x30E7, 0xABE8, 0x30E8,
06166     0xABE9, 0x30E9, 0xABEA, 0x30EA, 0xABEB, 0x30EB, 0xABEC, 0x30EC,
06167     0xABED, 0x30ED, 0xABEE, 0x30EE, 0xABEF, 0x30EF, 0xABF0, 0x30F0,
06168     0xABF1, 0x30F1, 0xABF2, 0x30F2, 0xABF3, 0x30F3, 0xABF4, 0x30F4,
06169     0xABF5, 0x30F5, 0xABF6, 0x30F6, 0xAC41, 0xCCFE, 0xAC42, 0xCCFF,
06170     0xAC43, 0xCD00, 0xAC44, 0xCD02, 0xAC45, 0xCD03, 0xAC46, 0xCD04,
06171     0xAC47, 0xCD05, 0xAC48, 0xCD06, 0xAC49, 0xCD07, 0xAC4A, 0xCD0A,
06172     0xAC4B, 0xCD0B, 0xAC4C, 0xCD0D, 0xAC4D, 0xCD0E, 0xAC4E, 0xCD0F,
06173     0xAC4F, 0xCD11, 0xAC50, 0xCD12, 0xAC51, 0xCD13, 0xAC52, 0xCD14,
06174     0xAC53, 0xCD15, 0xAC54, 0xCD16, 0xAC55, 0xCD17, 0xAC56, 0xCD1A,
06175     0xAC57, 0xCD1C, 0xAC58, 0xCD1E, 0xAC59, 0xCD1F, 0xAC5A, 0xCD20,
06176     0xAC61, 0xCD21, 0xAC62, 0xCD22, 0xAC63, 0xCD23, 0xAC64, 0xCD25,
06177     0xAC65, 0xCD26, 0xAC66, 0xCD27, 0xAC67, 0xCD29, 0xAC68, 0xCD2A,
06178     0xAC69, 0xCD2B, 0xAC6A, 0xCD2D, 0xAC6B, 0xCD2E, 0xAC6C, 0xCD2F,
06179     0xAC6D, 0xCD30, 0xAC6E, 0xCD31, 0xAC6F, 0xCD32, 0xAC70, 0xCD33,
06180     0xAC71, 0xCD34, 0xAC72, 0xCD35, 0xAC73, 0xCD36, 0xAC74, 0xCD37,
06181     0xAC75, 0xCD38, 0xAC76, 0xCD3A, 0xAC77, 0xCD3B, 0xAC78, 0xCD3C,
06182     0xAC79, 0xCD3D, 0xAC7A, 0xCD3E, 0xAC81, 0xCD3F, 0xAC82, 0xCD40,
06183     0xAC83, 0xCD41, 0xAC84, 0xCD42, 0xAC85, 0xCD43, 0xAC86, 0xCD44,
06184     0xAC87, 0xCD45, 0xAC88, 0xCD46, 0xAC89, 0xCD47, 0xAC8A, 0xCD48,
06185     0xAC8B, 0xCD49, 0xAC8C, 0xCD4A, 0xAC8D, 0xCD4B, 0xAC8E, 0xCD4C,
06186     0xAC8F, 0xCD4D, 0xAC90, 0xCD4E, 0xAC91, 0xCD4F, 0xAC92, 0xCD50,
06187     0xAC93, 0xCD51, 0xAC94, 0xCD52, 0xAC95, 0xCD53, 0xAC96, 0xCD54,
06188     0xAC97, 0xCD55, 0xAC98, 0xCD56, 0xAC99, 0xCD57, 0xAC9A, 0xCD58,
06189     0xAC9B, 0xCD59, 0xAC9C, 0xCD5A, 0xAC9D, 0xCD5B, 0xAC9E, 0xCD5D,
06190     0xAC9F, 0xCD5E, 0xACA0, 0xCD5F, 0xACA1, 0x0410, 0xACA2, 0x0411,
06191     0xACA3, 0x0412, 0xACA4, 0x0413, 0xACA5, 0x0414, 0xACA6, 0x0415,
06192     0xACA7, 0x0401, 0xACA8, 0x0416, 0xACA9, 0x0417, 0xACAA, 0x0418,
06193     0xACAB, 0x0419, 0xACAC, 0x041A, 0xACAD, 0x041B, 0xACAE, 0x041C,
06194     0xACAF, 0x041D, 0xACB0, 0x041E, 0xACB1, 0x041F, 0xACB2, 0x0420,
06195     0xACB3, 0x0421, 0xACB4, 0x0422, 0xACB5, 0x0423, 0xACB6, 0x0424,
06196     0xACB7, 0x0425, 0xACB8, 0x0426, 0xACB9, 0x0427, 0xACBA, 0x0428,
06197     0xACBB, 0x0429, 0xACBC, 0x042A, 0xACBD, 0x042B, 0xACBE, 0x042C,
06198     0xACBF, 0x042D, 0xACC0, 0x042E, 0xACC1, 0x042F, 0xACD1, 0x0430,
06199     0xACD2, 0x0431, 0xACD3, 0x0432, 0xACD4, 0x0433, 0xACD5, 0x0434,
06200     0xACD6, 0x0435, 0xACD7, 0x0451, 0xACD8, 0x0436, 0xACD9, 0x0437,
06201     0xACDA, 0x0438, 0xACDB, 0x0439, 0xACDC, 0x043A, 0xACDD, 0x043B,
06202     0xACDE, 0x043C, 0xACDF, 0x043D, 0xACE0, 0x043E, 0xACE1, 0x043F,
06203     0xACE2, 0x0440, 0xACE3, 0x0441, 0xACE4, 0x0442, 0xACE5, 0x0443,
06204     0xACE6, 0x0444, 0xACE7, 0x0445, 0xACE8, 0x0446, 0xACE9, 0x0447,
06205     0xACEA, 0x0448, 0xACEB, 0x0449, 0xACEC, 0x044A, 0xACED, 0x044B,
06206     0xACEE, 0x044C, 0xACEF, 0x044D, 0xACF0, 0x044E, 0xACF1, 0x044F,
06207     0xAD41, 0xCD61, 0xAD42, 0xCD62, 0xAD43, 0xCD63, 0xAD44, 0xCD65,
06208     0xAD45, 0xCD66, 0xAD46, 0xCD67, 0xAD47, 0xCD68, 0xAD48, 0xCD69,
06209     0xAD49, 0xCD6A, 0xAD4A, 0xCD6B, 0xAD4B, 0xCD6E, 0xAD4C, 0xCD70,
06210     0xAD4D, 0xCD72, 0xAD4E, 0xCD73, 0xAD4F, 0xCD74, 0xAD50, 0xCD75,
06211     0xAD51, 0xCD76, 0xAD52, 0xCD77, 0xAD53, 0xCD79, 0xAD54, 0xCD7A,
06212     0xAD55, 0xCD7B, 0xAD56, 0xCD7C, 0xAD57, 0xCD7D, 0xAD58, 0xCD7E,
06213     0xAD59, 0xCD7F, 0xAD5A, 0xCD80, 0xAD61, 0xCD81, 0xAD62, 0xCD82,
06214     0xAD63, 0xCD83, 0xAD64, 0xCD84, 0xAD65, 0xCD85, 0xAD66, 0xCD86,
06215     0xAD67, 0xCD87, 0xAD68, 0xCD89, 0xAD69, 0xCD8A, 0xAD6A, 0xCD8B,
06216     0xAD6B, 0xCD8C, 0xAD6C, 0xCD8D, 0xAD6D, 0xCD8E, 0xAD6E, 0xCD8F,
06217     0xAD6F, 0xCD90, 0xAD70, 0xCD91, 0xAD71, 0xCD92, 0xAD72, 0xCD93,
06218     0xAD73, 0xCD96, 0xAD74, 0xCD97, 0xAD75, 0xCD99, 0xAD76, 0xCD9A,
06219     0xAD77, 0xCD9B, 0xAD78, 0xCD9D, 0xAD79, 0xCD9E, 0xAD7A, 0xCD9F,
06220     0xAD81, 0xCDA0, 0xAD82, 0xCDA1, 0xAD83, 0xCDA2, 0xAD84, 0xCDA3,
06221     0xAD85, 0xCDA6, 0xAD86, 0xCDA8, 0xAD87, 0xCDAA, 0xAD88, 0xCDAB,
06222     0xAD89, 0xCDAC, 0xAD8A, 0xCDAD, 0xAD8B, 0xCDAE, 0xAD8C, 0xCDAF,
06223     0xAD8D, 0xCDB1, 0xAD8E, 0xCDB2, 0xAD8F, 0xCDB3, 0xAD90, 0xCDB4,
06224     0xAD91, 0xCDB5, 0xAD92, 0xCDB6, 0xAD93, 0xCDB7, 0xAD94, 0xCDB8,
06225     0xAD95, 0xCDB9, 0xAD96, 0xCDBA, 0xAD97, 0xCDBB, 0xAD98, 0xCDBC,
06226     0xAD99, 0xCDBD, 0xAD9A, 0xCDBE, 0xAD9B, 0xCDBF, 0xAD9C, 0xCDC0,
06227     0xAD9D, 0xCDC1, 0xAD9E, 0xCDC2, 0xAD9F, 0xCDC3, 0xADA0, 0xCDC5,
06228     0xAE41, 0xCDC6, 0xAE42, 0xCDC7, 0xAE43, 0xCDC8, 0xAE44, 0xCDC9,
06229     0xAE45, 0xCDCA, 0xAE46, 0xCDCB, 0xAE47, 0xCDCD, 0xAE48, 0xCDCE,
06230     0xAE49, 0xCDCF, 0xAE4A, 0xCDD1, 0xAE4B, 0xCDD2, 0xAE4C, 0xCDD3,
06231     0xAE4D, 0xCDD4, 0xAE4E, 0xCDD5, 0xAE4F, 0xCDD6, 0xAE50, 0xCDD7,
06232     0xAE51, 0xCDD8, 0xAE52, 0xCDD9, 0xAE53, 0xCDDA, 0xAE54, 0xCDDB,
06233     0xAE55, 0xCDDC, 0xAE56, 0xCDDD, 0xAE57, 0xCDDE, 0xAE58, 0xCDDF,
06234     0xAE59, 0xCDE0, 0xAE5A, 0xCDE1, 0xAE61, 0xCDE2, 0xAE62, 0xCDE3,
06235     0xAE63, 0xCDE4, 0xAE64, 0xCDE5, 0xAE65, 0xCDE6, 0xAE66, 0xCDE7,
06236     0xAE67, 0xCDE9, 0xAE68, 0xCDEA, 0xAE69, 0xCDEB, 0xAE6A, 0xCDED,
06237     0xAE6B, 0xCDEE, 0xAE6C, 0xCDEF, 0xAE6D, 0xCDF1, 0xAE6E, 0xCDF2,
06238     0xAE6F, 0xCDF3, 0xAE70, 0xCDF4, 0xAE71, 0xCDF5, 0xAE72, 0xCDF6,
06239     0xAE73, 0xCDF7, 0xAE74, 0xCDFA, 0xAE75, 0xCDFC, 0xAE76, 0xCDFE,
06240     0xAE77, 0xCDFF, 0xAE78, 0xCE00, 0xAE79, 0xCE01, 0xAE7A, 0xCE02,
06241     0xAE81, 0xCE03, 0xAE82, 0xCE05, 0xAE83, 0xCE06, 0xAE84, 0xCE07,
06242     0xAE85, 0xCE09, 0xAE86, 0xCE0A, 0xAE87, 0xCE0B, 0xAE88, 0xCE0D,
06243     0xAE89, 0xCE0E, 0xAE8A, 0xCE0F, 0xAE8B, 0xCE10, 0xAE8C, 0xCE11,
06244     0xAE8D, 0xCE12, 0xAE8E, 0xCE13, 0xAE8F, 0xCE15, 0xAE90, 0xCE16,
06245     0xAE91, 0xCE17, 0xAE92, 0xCE18, 0xAE93, 0xCE1A, 0xAE94, 0xCE1B,
06246     0xAE95, 0xCE1C, 0xAE96, 0xCE1D, 0xAE97, 0xCE1E, 0xAE98, 0xCE1F,
06247     0xAE99, 0xCE22, 0xAE9A, 0xCE23, 0xAE9B, 0xCE25, 0xAE9C, 0xCE26,
06248     0xAE9D, 0xCE27, 0xAE9E, 0xCE29, 0xAE9F, 0xCE2A, 0xAEA0, 0xCE2B,
06249     0xAF41, 0xCE2C, 0xAF42, 0xCE2D, 0xAF43, 0xCE2E, 0xAF44, 0xCE2F,
06250     0xAF45, 0xCE32, 0xAF46, 0xCE34, 0xAF47, 0xCE36, 0xAF48, 0xCE37,
06251     0xAF49, 0xCE38, 0xAF4A, 0xCE39, 0xAF4B, 0xCE3A, 0xAF4C, 0xCE3B,
06252     0xAF4D, 0xCE3C, 0xAF4E, 0xCE3D, 0xAF4F, 0xCE3E, 0xAF50, 0xCE3F,
06253     0xAF51, 0xCE40, 0xAF52, 0xCE41, 0xAF53, 0xCE42, 0xAF54, 0xCE43,
06254     0xAF55, 0xCE44, 0xAF56, 0xCE45, 0xAF57, 0xCE46, 0xAF58, 0xCE47,
06255     0xAF59, 0xCE48, 0xAF5A, 0xCE49, 0xAF61, 0xCE4A, 0xAF62, 0xCE4B,
06256     0xAF63, 0xCE4C, 0xAF64, 0xCE4D, 0xAF65, 0xCE4E, 0xAF66, 0xCE4F,
06257     0xAF67, 0xCE50, 0xAF68, 0xCE51, 0xAF69, 0xCE52, 0xAF6A, 0xCE53,
06258     0xAF6B, 0xCE54, 0xAF6C, 0xCE55, 0xAF6D, 0xCE56, 0xAF6E, 0xCE57,
06259     0xAF6F, 0xCE5A, 0xAF70, 0xCE5B, 0xAF71, 0xCE5D, 0xAF72, 0xCE5E,
06260     0xAF73, 0xCE62, 0xAF74, 0xCE63, 0xAF75, 0xCE64, 0xAF76, 0xCE65,
06261     0xAF77, 0xCE66, 0xAF78, 0xCE67, 0xAF79, 0xCE6A, 0xAF7A, 0xCE6C,
06262     0xAF81, 0xCE6E, 0xAF82, 0xCE6F, 0xAF83, 0xCE70, 0xAF84, 0xCE71,
06263     0xAF85, 0xCE72, 0xAF86, 0xCE73, 0xAF87, 0xCE76, 0xAF88, 0xCE77,
06264     0xAF89, 0xCE79, 0xAF8A, 0xCE7A, 0xAF8B, 0xCE7B, 0xAF8C, 0xCE7D,
06265     0xAF8D, 0xCE7E, 0xAF8E, 0xCE7F, 0xAF8F, 0xCE80, 0xAF90, 0xCE81,
06266     0xAF91, 0xCE82, 0xAF92, 0xCE83, 0xAF93, 0xCE86, 0xAF94, 0xCE88,
06267     0xAF95, 0xCE8A, 0xAF96, 0xCE8B, 0xAF97, 0xCE8C, 0xAF98, 0xCE8D,
06268     0xAF99, 0xCE8E, 0xAF9A, 0xCE8F, 0xAF9B, 0xCE92, 0xAF9C, 0xCE93,
06269     0xAF9D, 0xCE95, 0xAF9E, 0xCE96, 0xAF9F, 0xCE97, 0xAFA0, 0xCE99,
06270     0xB041, 0xCE9A, 0xB042, 0xCE9B, 0xB043, 0xCE9C, 0xB044, 0xCE9D,
06271     0xB045, 0xCE9E, 0xB046, 0xCE9F, 0xB047, 0xCEA2, 0xB048, 0xCEA6,
06272     0xB049, 0xCEA7, 0xB04A, 0xCEA8, 0xB04B, 0xCEA9, 0xB04C, 0xCEAA,
06273     0xB04D, 0xCEAB, 0xB04E, 0xCEAE, 0xB04F, 0xCEAF, 0xB050, 0xCEB0,
06274     0xB051, 0xCEB1, 0xB052, 0xCEB2, 0xB053, 0xCEB3, 0xB054, 0xCEB4,
06275     0xB055, 0xCEB5, 0xB056, 0xCEB6, 0xB057, 0xCEB7, 0xB058, 0xCEB8,
06276     0xB059, 0xCEB9, 0xB05A, 0xCEBA, 0xB061, 0xCEBB, 0xB062, 0xCEBC,
06277     0xB063, 0xCEBD, 0xB064, 0xCEBE, 0xB065, 0xCEBF, 0xB066, 0xCEC0,
06278     0xB067, 0xCEC2, 0xB068, 0xCEC3, 0xB069, 0xCEC4, 0xB06A, 0xCEC5,
06279     0xB06B, 0xCEC6, 0xB06C, 0xCEC7, 0xB06D, 0xCEC8, 0xB06E, 0xCEC9,
06280     0xB06F, 0xCECA, 0xB070, 0xCECB, 0xB071, 0xCECC, 0xB072, 0xCECD,
06281     0xB073, 0xCECE, 0xB074, 0xCECF, 0xB075, 0xCED0, 0xB076, 0xCED1,
06282     0xB077, 0xCED2, 0xB078, 0xCED3, 0xB079, 0xCED4, 0xB07A, 0xCED5,
06283     0xB081, 0xCED6, 0xB082, 0xCED7, 0xB083, 0xCED8, 0xB084, 0xCED9,
06284     0xB085, 0xCEDA, 0xB086, 0xCEDB, 0xB087, 0xCEDC, 0xB088, 0xCEDD,
06285     0xB089, 0xCEDE, 0xB08A, 0xCEDF, 0xB08B, 0xCEE0, 0xB08C, 0xCEE1,
06286     0xB08D, 0xCEE2, 0xB08E, 0xCEE3, 0xB08F, 0xCEE6, 0xB090, 0xCEE7,
06287     0xB091, 0xCEE9, 0xB092, 0xCEEA, 0xB093, 0xCEED, 0xB094, 0xCEEE,
06288     0xB095, 0xCEEF, 0xB096, 0xCEF0, 0xB097, 0xCEF1, 0xB098, 0xCEF2,
06289     0xB099, 0xCEF3, 0xB09A, 0xCEF6, 0xB09B, 0xCEFA, 0xB09C, 0xCEFB,
06290     0xB09D, 0xCEFC, 0xB09E, 0xCEFD, 0xB09F, 0xCEFE, 0xB0A0, 0xCEFF,
06291     0xB0A1, 0xAC00, 0xB0A2, 0xAC01, 0xB0A3, 0xAC04, 0xB0A4, 0xAC07,
06292     0xB0A5, 0xAC08, 0xB0A6, 0xAC09, 0xB0A7, 0xAC0A, 0xB0A8, 0xAC10,
06293     0xB0A9, 0xAC11, 0xB0AA, 0xAC12, 0xB0AB, 0xAC13, 0xB0AC, 0xAC14,
06294     0xB0AD, 0xAC15, 0xB0AE, 0xAC16, 0xB0AF, 0xAC17, 0xB0B0, 0xAC19,
06295     0xB0B1, 0xAC1A, 0xB0B2, 0xAC1B, 0xB0B3, 0xAC1C, 0xB0B4, 0xAC1D,
06296     0xB0B5, 0xAC20, 0xB0B6, 0xAC24, 0xB0B7, 0xAC2C, 0xB0B8, 0xAC2D,
06297     0xB0B9, 0xAC2F, 0xB0BA, 0xAC30, 0xB0BB, 0xAC31, 0xB0BC, 0xAC38,
06298     0xB0BD, 0xAC39, 0xB0BE, 0xAC3C, 0xB0BF, 0xAC40, 0xB0C0, 0xAC4B,
06299     0xB0C1, 0xAC4D, 0xB0C2, 0xAC54, 0xB0C3, 0xAC58, 0xB0C4, 0xAC5C,
06300     0xB0C5, 0xAC70, 0xB0C6, 0xAC71, 0xB0C7, 0xAC74, 0xB0C8, 0xAC77,
06301     0xB0C9, 0xAC78, 0xB0CA, 0xAC7A, 0xB0CB, 0xAC80, 0xB0CC, 0xAC81,
06302     0xB0CD, 0xAC83, 0xB0CE, 0xAC84, 0xB0CF, 0xAC85, 0xB0D0, 0xAC86,
06303     0xB0D1, 0xAC89, 0xB0D2, 0xAC8A, 0xB0D3, 0xAC8B, 0xB0D4, 0xAC8C,
06304     0xB0D5, 0xAC90, 0xB0D6, 0xAC94, 0xB0D7, 0xAC9C, 0xB0D8, 0xAC9D,
06305     0xB0D9, 0xAC9F, 0xB0DA, 0xACA0, 0xB0DB, 0xACA1, 0xB0DC, 0xACA8,
06306     0xB0DD, 0xACA9, 0xB0DE, 0xACAA, 0xB0DF, 0xACAC, 0xB0E0, 0xACAF,
06307     0xB0E1, 0xACB0, 0xB0E2, 0xACB8, 0xB0E3, 0xACB9, 0xB0E4, 0xACBB,
06308     0xB0E5, 0xACBC, 0xB0E6, 0xACBD, 0xB0E7, 0xACC1, 0xB0E8, 0xACC4,
06309     0xB0E9, 0xACC8, 0xB0EA, 0xACCC, 0xB0EB, 0xACD5, 0xB0EC, 0xACD7,
06310     0xB0ED, 0xACE0, 0xB0EE, 0xACE1, 0xB0EF, 0xACE4, 0xB0F0, 0xACE7,
06311     0xB0F1, 0xACE8, 0xB0F2, 0xACEA, 0xB0F3, 0xACEC, 0xB0F4, 0xACEF,
06312     0xB0F5, 0xACF0, 0xB0F6, 0xACF1, 0xB0F7, 0xACF3, 0xB0F8, 0xACF5,
06313     0xB0F9, 0xACF6, 0xB0FA, 0xACFC, 0xB0FB, 0xACFD, 0xB0FC, 0xAD00,
06314     0xB0FD, 0xAD04, 0xB0FE, 0xAD06, 0xB141, 0xCF02, 0xB142, 0xCF03,
06315     0xB143, 0xCF05, 0xB144, 0xCF06, 0xB145, 0xCF07, 0xB146, 0xCF09,
06316     0xB147, 0xCF0A, 0xB148, 0xCF0B, 0xB149, 0xCF0C, 0xB14A, 0xCF0D,
06317     0xB14B, 0xCF0E, 0xB14C, 0xCF0F, 0xB14D, 0xCF12, 0xB14E, 0xCF14,
06318     0xB14F, 0xCF16, 0xB150, 0xCF17, 0xB151, 0xCF18, 0xB152, 0xCF19,
06319     0xB153, 0xCF1A, 0xB154, 0xCF1B, 0xB155, 0xCF1D, 0xB156, 0xCF1E,
06320     0xB157, 0xCF1F, 0xB158, 0xCF21, 0xB159, 0xCF22, 0xB15A, 0xCF23,
06321     0xB161, 0xCF25, 0xB162, 0xCF26, 0xB163, 0xCF27, 0xB164, 0xCF28,
06322     0xB165, 0xCF29, 0xB166, 0xCF2A, 0xB167, 0xCF2B, 0xB168, 0xCF2E,
06323     0xB169, 0xCF32, 0xB16A, 0xCF33, 0xB16B, 0xCF34, 0xB16C, 0xCF35,
06324     0xB16D, 0xCF36, 0xB16E, 0xCF37, 0xB16F, 0xCF39, 0xB170, 0xCF3A,
06325     0xB171, 0xCF3B, 0xB172, 0xCF3C, 0xB173, 0xCF3D, 0xB174, 0xCF3E,
06326     0xB175, 0xCF3F, 0xB176, 0xCF40, 0xB177, 0xCF41, 0xB178, 0xCF42,
06327     0xB179, 0xCF43, 0xB17A, 0xCF44, 0xB181, 0xCF45, 0xB182, 0xCF46,
06328     0xB183, 0xCF47, 0xB184, 0xCF48, 0xB185, 0xCF49, 0xB186, 0xCF4A,
06329     0xB187, 0xCF4B, 0xB188, 0xCF4C, 0xB189, 0xCF4D, 0xB18A, 0xCF4E,
06330     0xB18B, 0xCF4F, 0xB18C, 0xCF50, 0xB18D, 0xCF51, 0xB18E, 0xCF52,
06331     0xB18F, 0xCF53, 0xB190, 0xCF56, 0xB191, 0xCF57, 0xB192, 0xCF59,
06332     0xB193, 0xCF5A, 0xB194, 0xCF5B, 0xB195, 0xCF5D, 0xB196, 0xCF5E,
06333     0xB197, 0xCF5F, 0xB198, 0xCF60, 0xB199, 0xCF61, 0xB19A, 0xCF62,
06334     0xB19B, 0xCF63, 0xB19C, 0xCF66, 0xB19D, 0xCF68, 0xB19E, 0xCF6A,
06335     0xB19F, 0xCF6B, 0xB1A0, 0xCF6C, 0xB1A1, 0xAD0C, 0xB1A2, 0xAD0D,
06336     0xB1A3, 0xAD0F, 0xB1A4, 0xAD11, 0xB1A5, 0xAD18, 0xB1A6, 0xAD1C,
06337     0xB1A7, 0xAD20, 0xB1A8, 0xAD29, 0xB1A9, 0xAD2C, 0xB1AA, 0xAD2D,
06338     0xB1AB, 0xAD34, 0xB1AC, 0xAD35, 0xB1AD, 0xAD38, 0xB1AE, 0xAD3C,
06339     0xB1AF, 0xAD44, 0xB1B0, 0xAD45, 0xB1B1, 0xAD47, 0xB1B2, 0xAD49,
06340     0xB1B3, 0xAD50, 0xB1B4, 0xAD54, 0xB1B5, 0xAD58, 0xB1B6, 0xAD61,
06341     0xB1B7, 0xAD63, 0xB1B8, 0xAD6C, 0xB1B9, 0xAD6D, 0xB1BA, 0xAD70,
06342     0xB1BB, 0xAD73, 0xB1BC, 0xAD74, 0xB1BD, 0xAD75, 0xB1BE, 0xAD76,
06343     0xB1BF, 0xAD7B, 0xB1C0, 0xAD7C, 0xB1C1, 0xAD7D, 0xB1C2, 0xAD7F,
06344     0xB1C3, 0xAD81, 0xB1C4, 0xAD82, 0xB1C5, 0xAD88, 0xB1C6, 0xAD89,
06345     0xB1C7, 0xAD8C, 0xB1C8, 0xAD90, 0xB1C9, 0xAD9C, 0xB1CA, 0xAD9D,
06346     0xB1CB, 0xADA4, 0xB1CC, 0xADB7, 0xB1CD, 0xADC0, 0xB1CE, 0xADC1,
06347     0xB1CF, 0xADC4, 0xB1D0, 0xADC8, 0xB1D1, 0xADD0, 0xB1D2, 0xADD1,
06348     0xB1D3, 0xADD3, 0xB1D4, 0xADDC, 0xB1D5, 0xADE0, 0xB1D6, 0xADE4,
06349     0xB1D7, 0xADF8, 0xB1D8, 0xADF9, 0xB1D9, 0xADFC, 0xB1DA, 0xADFF,
06350     0xB1DB, 0xAE00, 0xB1DC, 0xAE01, 0xB1DD, 0xAE08, 0xB1DE, 0xAE09,
06351     0xB1DF, 0xAE0B, 0xB1E0, 0xAE0D, 0xB1E1, 0xAE14, 0xB1E2, 0xAE30,
06352     0xB1E3, 0xAE31, 0xB1E4, 0xAE34, 0xB1E5, 0xAE37, 0xB1E6, 0xAE38,
06353     0xB1E7, 0xAE3A, 0xB1E8, 0xAE40, 0xB1E9, 0xAE41, 0xB1EA, 0xAE43,
06354     0xB1EB, 0xAE45, 0xB1EC, 0xAE46, 0xB1ED, 0xAE4A, 0xB1EE, 0xAE4C,
06355     0xB1EF, 0xAE4D, 0xB1F0, 0xAE4E, 0xB1F1, 0xAE50, 0xB1F2, 0xAE54,
06356     0xB1F3, 0xAE56, 0xB1F4, 0xAE5C, 0xB1F5, 0xAE5D, 0xB1F6, 0xAE5F,
06357     0xB1F7, 0xAE60, 0xB1F8, 0xAE61, 0xB1F9, 0xAE65, 0xB1FA, 0xAE68,
06358     0xB1FB, 0xAE69, 0xB1FC, 0xAE6C, 0xB1FD, 0xAE70, 0xB1FE, 0xAE78,
06359     0xB241, 0xCF6D, 0xB242, 0xCF6E, 0xB243, 0xCF6F, 0xB244, 0xCF72,
06360     0xB245, 0xCF73, 0xB246, 0xCF75, 0xB247, 0xCF76, 0xB248, 0xCF77,
06361     0xB249, 0xCF79, 0xB24A, 0xCF7A, 0xB24B, 0xCF7B, 0xB24C, 0xCF7C,
06362     0xB24D, 0xCF7D, 0xB24E, 0xCF7E, 0xB24F, 0xCF7F, 0xB250, 0xCF81,
06363     0xB251, 0xCF82, 0xB252, 0xCF83, 0xB253, 0xCF84, 0xB254, 0xCF86,
06364     0xB255, 0xCF87, 0xB256, 0xCF88, 0xB257, 0xCF89, 0xB258, 0xCF8A,
06365     0xB259, 0xCF8B, 0xB25A, 0xCF8D, 0xB261, 0xCF8E, 0xB262, 0xCF8F,
06366     0xB263, 0xCF90, 0xB264, 0xCF91, 0xB265, 0xCF92, 0xB266, 0xCF93,
06367     0xB267, 0xCF94, 0xB268, 0xCF95, 0xB269, 0xCF96, 0xB26A, 0xCF97,
06368     0xB26B, 0xCF98, 0xB26C, 0xCF99, 0xB26D, 0xCF9A, 0xB26E, 0xCF9B,
06369     0xB26F, 0xCF9C, 0xB270, 0xCF9D, 0xB271, 0xCF9E, 0xB272, 0xCF9F,
06370     0xB273, 0xCFA0, 0xB274, 0xCFA2, 0xB275, 0xCFA3, 0xB276, 0xCFA4,
06371     0xB277, 0xCFA5, 0xB278, 0xCFA6, 0xB279, 0xCFA7, 0xB27A, 0xCFA9,
06372     0xB281, 0xCFAA, 0xB282, 0xCFAB, 0xB283, 0xCFAC, 0xB284, 0xCFAD,
06373     0xB285, 0xCFAE, 0xB286, 0xCFAF, 0xB287, 0xCFB1, 0xB288, 0xCFB2,
06374     0xB289, 0xCFB3, 0xB28A, 0xCFB4, 0xB28B, 0xCFB5, 0xB28C, 0xCFB6,
06375     0xB28D, 0xCFB7, 0xB28E, 0xCFB8, 0xB28F, 0xCFB9, 0xB290, 0xCFBA,
06376     0xB291, 0xCFBB, 0xB292, 0xCFBC, 0xB293, 0xCFBD, 0xB294, 0xCFBE,
06377     0xB295, 0xCFBF, 0xB296, 0xCFC0, 0xB297, 0xCFC1, 0xB298, 0xCFC2,
06378     0xB299, 0xCFC3, 0xB29A, 0xCFC5, 0xB29B, 0xCFC6, 0xB29C, 0xCFC7,
06379     0xB29D, 0xCFC8, 0xB29E, 0xCFC9, 0xB29F, 0xCFCA, 0xB2A0, 0xCFCB,
06380     0xB2A1, 0xAE79, 0xB2A2, 0xAE7B, 0xB2A3, 0xAE7C, 0xB2A4, 0xAE7D,
06381     0xB2A5, 0xAE84, 0xB2A6, 0xAE85, 0xB2A7, 0xAE8C, 0xB2A8, 0xAEBC,
06382     0xB2A9, 0xAEBD, 0xB2AA, 0xAEBE, 0xB2AB, 0xAEC0, 0xB2AC, 0xAEC4,
06383     0xB2AD, 0xAECC, 0xB2AE, 0xAECD, 0xB2AF, 0xAECF, 0xB2B0, 0xAED0,
06384     0xB2B1, 0xAED1, 0xB2B2, 0xAED8, 0xB2B3, 0xAED9, 0xB2B4, 0xAEDC,
06385     0xB2B5, 0xAEE8, 0xB2B6, 0xAEEB, 0xB2B7, 0xAEED, 0xB2B8, 0xAEF4,
06386     0xB2B9, 0xAEF8, 0xB2BA, 0xAEFC, 0xB2BB, 0xAF07, 0xB2BC, 0xAF08,
06387     0xB2BD, 0xAF0D, 0xB2BE, 0xAF10, 0xB2BF, 0xAF2C, 0xB2C0, 0xAF2D,
06388     0xB2C1, 0xAF30, 0xB2C2, 0xAF32, 0xB2C3, 0xAF34, 0xB2C4, 0xAF3C,
06389     0xB2C5, 0xAF3D, 0xB2C6, 0xAF3F, 0xB2C7, 0xAF41, 0xB2C8, 0xAF42,
06390     0xB2C9, 0xAF43, 0xB2CA, 0xAF48, 0xB2CB, 0xAF49, 0xB2CC, 0xAF50,
06391     0xB2CD, 0xAF5C, 0xB2CE, 0xAF5D, 0xB2CF, 0xAF64, 0xB2D0, 0xAF65,
06392     0xB2D1, 0xAF79, 0xB2D2, 0xAF80, 0xB2D3, 0xAF84, 0xB2D4, 0xAF88,
06393     0xB2D5, 0xAF90, 0xB2D6, 0xAF91, 0xB2D7, 0xAF95, 0xB2D8, 0xAF9C,
06394     0xB2D9, 0xAFB8, 0xB2DA, 0xAFB9, 0xB2DB, 0xAFBC, 0xB2DC, 0xAFC0,
06395     0xB2DD, 0xAFC7, 0xB2DE, 0xAFC8, 0xB2DF, 0xAFC9, 0xB2E0, 0xAFCB,
06396     0xB2E1, 0xAFCD, 0xB2E2, 0xAFCE, 0xB2E3, 0xAFD4, 0xB2E4, 0xAFDC,
06397     0xB2E5, 0xAFE8, 0xB2E6, 0xAFE9, 0xB2E7, 0xAFF0, 0xB2E8, 0xAFF1,
06398     0xB2E9, 0xAFF4, 0xB2EA, 0xAFF8, 0xB2EB, 0xB000, 0xB2EC, 0xB001,
06399     0xB2ED, 0xB004, 0xB2EE, 0xB00C, 0xB2EF, 0xB010, 0xB2F0, 0xB014,
06400     0xB2F1, 0xB01C, 0xB2F2, 0xB01D, 0xB2F3, 0xB028, 0xB2F4, 0xB044,
06401     0xB2F5, 0xB045, 0xB2F6, 0xB048, 0xB2F7, 0xB04A, 0xB2F8, 0xB04C,
06402     0xB2F9, 0xB04E, 0xB2FA, 0xB053, 0xB2FB, 0xB054, 0xB2FC, 0xB055,
06403     0xB2FD, 0xB057, 0xB2FE, 0xB059, 0xB341, 0xCFCC, 0xB342, 0xCFCD,
06404     0xB343, 0xCFCE, 0xB344, 0xCFCF, 0xB345, 0xCFD0, 0xB346, 0xCFD1,
06405     0xB347, 0xCFD2, 0xB348, 0xCFD3, 0xB349, 0xCFD4, 0xB34A, 0xCFD5,
06406     0xB34B, 0xCFD6, 0xB34C, 0xCFD7, 0xB34D, 0xCFD8, 0xB34E, 0xCFD9,
06407     0xB34F, 0xCFDA, 0xB350, 0xCFDB, 0xB351, 0xCFDC, 0xB352, 0xCFDD,
06408     0xB353, 0xCFDE, 0xB354, 0xCFDF, 0xB355, 0xCFE2, 0xB356, 0xCFE3,
06409     0xB357, 0xCFE5, 0xB358, 0xCFE6, 0xB359, 0xCFE7, 0xB35A, 0xCFE9,
06410     0xB361, 0xCFEA, 0xB362, 0xCFEB, 0xB363, 0xCFEC, 0xB364, 0xCFED,
06411     0xB365, 0xCFEE, 0xB366, 0xCFEF, 0xB367, 0xCFF2, 0xB368, 0xCFF4,
06412     0xB369, 0xCFF6, 0xB36A, 0xCFF7, 0xB36B, 0xCFF8, 0xB36C, 0xCFF9,
06413     0xB36D, 0xCFFA, 0xB36E, 0xCFFB, 0xB36F, 0xCFFD, 0xB370, 0xCFFE,
06414     0xB371, 0xCFFF, 0xB372, 0xD001, 0xB373, 0xD002, 0xB374, 0xD003,
06415     0xB375, 0xD005, 0xB376, 0xD006, 0xB377, 0xD007, 0xB378, 0xD008,
06416     0xB379, 0xD009, 0xB37A, 0xD00A, 0xB381, 0xD00B, 0xB382, 0xD00C,
06417     0xB383, 0xD00D, 0xB384, 0xD00E, 0xB385, 0xD00F, 0xB386, 0xD010,
06418     0xB387, 0xD012, 0xB388, 0xD013, 0xB389, 0xD014, 0xB38A, 0xD015,
06419     0xB38B, 0xD016, 0xB38C, 0xD017, 0xB38D, 0xD019, 0xB38E, 0xD01A,
06420     0xB38F, 0xD01B, 0xB390, 0xD01C, 0xB391, 0xD01D, 0xB392, 0xD01E,
06421     0xB393, 0xD01F, 0xB394, 0xD020, 0xB395, 0xD021, 0xB396, 0xD022,
06422     0xB397, 0xD023, 0xB398, 0xD024, 0xB399, 0xD025, 0xB39A, 0xD026,
06423     0xB39B, 0xD027, 0xB39C, 0xD028, 0xB39D, 0xD029, 0xB39E, 0xD02A,
06424     0xB39F, 0xD02B, 0xB3A0, 0xD02C, 0xB3A1, 0xB05D, 0xB3A2, 0xB07C,
06425     0xB3A3, 0xB07D, 0xB3A4, 0xB080, 0xB3A5, 0xB084, 0xB3A6, 0xB08C,
06426     0xB3A7, 0xB08D, 0xB3A8, 0xB08F, 0xB3A9, 0xB091, 0xB3AA, 0xB098,
06427     0xB3AB, 0xB099, 0xB3AC, 0xB09A, 0xB3AD, 0xB09C, 0xB3AE, 0xB09F,
06428     0xB3AF, 0xB0A0, 0xB3B0, 0xB0A1, 0xB3B1, 0xB0A2, 0xB3B2, 0xB0A8,
06429     0xB3B3, 0xB0A9, 0xB3B4, 0xB0AB, 0xB3B5, 0xB0AC, 0xB3B6, 0xB0AD,
06430     0xB3B7, 0xB0AE, 0xB3B8, 0xB0AF, 0xB3B9, 0xB0B1, 0xB3BA, 0xB0B3,
06431     0xB3BB, 0xB0B4, 0xB3BC, 0xB0B5, 0xB3BD, 0xB0B8, 0xB3BE, 0xB0BC,
06432     0xB3BF, 0xB0C4, 0xB3C0, 0xB0C5, 0xB3C1, 0xB0C7, 0xB3C2, 0xB0C8,
06433     0xB3C3, 0xB0C9, 0xB3C4, 0xB0D0, 0xB3C5, 0xB0D1, 0xB3C6, 0xB0D4,
06434     0xB3C7, 0xB0D8, 0xB3C8, 0xB0E0, 0xB3C9, 0xB0E5, 0xB3CA, 0xB108,
06435     0xB3CB, 0xB109, 0xB3CC, 0xB10B, 0xB3CD, 0xB10C, 0xB3CE, 0xB110,
06436     0xB3CF, 0xB112, 0xB3D0, 0xB113, 0xB3D1, 0xB118, 0xB3D2, 0xB119,
06437     0xB3D3, 0xB11B, 0xB3D4, 0xB11C, 0xB3D5, 0xB11D, 0xB3D6, 0xB123,
06438     0xB3D7, 0xB124, 0xB3D8, 0xB125, 0xB3D9, 0xB128, 0xB3DA, 0xB12C,
06439     0xB3DB, 0xB134, 0xB3DC, 0xB135, 0xB3DD, 0xB137, 0xB3DE, 0xB138,
06440     0xB3DF, 0xB139, 0xB3E0, 0xB140, 0xB3E1, 0xB141, 0xB3E2, 0xB144,
06441     0xB3E3, 0xB148, 0xB3E4, 0xB150, 0xB3E5, 0xB151, 0xB3E6, 0xB154,
06442     0xB3E7, 0xB155, 0xB3E8, 0xB158, 0xB3E9, 0xB15C, 0xB3EA, 0xB160,
06443     0xB3EB, 0xB178, 0xB3EC, 0xB179, 0xB3ED, 0xB17C, 0xB3EE, 0xB180,
06444     0xB3EF, 0xB182, 0xB3F0, 0xB188, 0xB3F1, 0xB189, 0xB3F2, 0xB18B,
06445     0xB3F3, 0xB18D, 0xB3F4, 0xB192, 0xB3F5, 0xB193, 0xB3F6, 0xB194,
06446     0xB3F7, 0xB198, 0xB3F8, 0xB19C, 0xB3F9, 0xB1A8, 0xB3FA, 0xB1CC,
06447     0xB3FB, 0xB1D0, 0xB3FC, 0xB1D4, 0xB3FD, 0xB1DC, 0xB3FE, 0xB1DD,
06448     0xB441, 0xD02E, 0xB442, 0xD02F, 0xB443, 0xD030, 0xB444, 0xD031,
06449     0xB445, 0xD032, 0xB446, 0xD033, 0xB447, 0xD036, 0xB448, 0xD037,
06450     0xB449, 0xD039, 0xB44A, 0xD03A, 0xB44B, 0xD03B, 0xB44C, 0xD03D,
06451     0xB44D, 0xD03E, 0xB44E, 0xD03F, 0xB44F, 0xD040, 0xB450, 0xD041,
06452     0xB451, 0xD042, 0xB452, 0xD043, 0xB453, 0xD046, 0xB454, 0xD048,
06453     0xB455, 0xD04A, 0xB456, 0xD04B, 0xB457, 0xD04C, 0xB458, 0xD04D,
06454     0xB459, 0xD04E, 0xB45A, 0xD04F, 0xB461, 0xD051, 0xB462, 0xD052,
06455     0xB463, 0xD053, 0xB464, 0xD055, 0xB465, 0xD056, 0xB466, 0xD057,
06456     0xB467, 0xD059, 0xB468, 0xD05A, 0xB469, 0xD05B, 0xB46A, 0xD05C,
06457     0xB46B, 0xD05D, 0xB46C, 0xD05E, 0xB46D, 0xD05F, 0xB46E, 0xD061,
06458     0xB46F, 0xD062, 0xB470, 0xD063, 0xB471, 0xD064, 0xB472, 0xD065,
06459     0xB473, 0xD066, 0xB474, 0xD067, 0xB475, 0xD068, 0xB476, 0xD069,
06460     0xB477, 0xD06A, 0xB478, 0xD06B, 0xB479, 0xD06E, 0xB47A, 0xD06F,
06461     0xB481, 0xD071, 0xB482, 0xD072, 0xB483, 0xD073, 0xB484, 0xD075,
06462     0xB485, 0xD076, 0xB486, 0xD077, 0xB487, 0xD078, 0xB488, 0xD079,
06463     0xB489, 0xD07A, 0xB48A, 0xD07B, 0xB48B, 0xD07E, 0xB48C, 0xD07F,
06464     0xB48D, 0xD080, 0xB48E, 0xD082, 0xB48F, 0xD083, 0xB490, 0xD084,
06465     0xB491, 0xD085, 0xB492, 0xD086, 0xB493, 0xD087, 0xB494, 0xD088,
06466     0xB495, 0xD089, 0xB496, 0xD08A, 0xB497, 0xD08B, 0xB498, 0xD08C,
06467     0xB499, 0xD08D, 0xB49A, 0xD08E, 0xB49B, 0xD08F, 0xB49C, 0xD090,
06468     0xB49D, 0xD091, 0xB49E, 0xD092, 0xB49F, 0xD093, 0xB4A0, 0xD094,
06469     0xB4A1, 0xB1DF, 0xB4A2, 0xB1E8, 0xB4A3, 0xB1E9, 0xB4A4, 0xB1EC,
06470     0xB4A5, 0xB1F0, 0xB4A6, 0xB1F9, 0xB4A7, 0xB1FB, 0xB4A8, 0xB1FD,
06471     0xB4A9, 0xB204, 0xB4AA, 0xB205, 0xB4AB, 0xB208, 0xB4AC, 0xB20B,
06472     0xB4AD, 0xB20C, 0xB4AE, 0xB214, 0xB4AF, 0xB215, 0xB4B0, 0xB217,
06473     0xB4B1, 0xB219, 0xB4B2, 0xB220, 0xB4B3, 0xB234, 0xB4B4, 0xB23C,
06474     0xB4B5, 0xB258, 0xB4B6, 0xB25C, 0xB4B7, 0xB260, 0xB4B8, 0xB268,
06475     0xB4B9, 0xB269, 0xB4BA, 0xB274, 0xB4BB, 0xB275, 0xB4BC, 0xB27C,
06476     0xB4BD, 0xB284, 0xB4BE, 0xB285, 0xB4BF, 0xB289, 0xB4C0, 0xB290,
06477     0xB4C1, 0xB291, 0xB4C2, 0xB294, 0xB4C3, 0xB298, 0xB4C4, 0xB299,
06478     0xB4C5, 0xB29A, 0xB4C6, 0xB2A0, 0xB4C7, 0xB2A1, 0xB4C8, 0xB2A3,
06479     0xB4C9, 0xB2A5, 0xB4CA, 0xB2A6, 0xB4CB, 0xB2AA, 0xB4CC, 0xB2AC,
06480     0xB4CD, 0xB2B0, 0xB4CE, 0xB2B4, 0xB4CF, 0xB2C8, 0xB4D0, 0xB2C9,
06481     0xB4D1, 0xB2CC, 0xB4D2, 0xB2D0, 0xB4D3, 0xB2D2, 0xB4D4, 0xB2D8,
06482     0xB4D5, 0xB2D9, 0xB4D6, 0xB2DB, 0xB4D7, 0xB2DD, 0xB4D8, 0xB2E2,
06483     0xB4D9, 0xB2E4, 0xB4DA, 0xB2E5, 0xB4DB, 0xB2E6, 0xB4DC, 0xB2E8,
06484     0xB4DD, 0xB2EB, 0xB4DE, 0xB2EC, 0xB4DF, 0xB2ED, 0xB4E0, 0xB2EE,
06485     0xB4E1, 0xB2EF, 0xB4E2, 0xB2F3, 0xB4E3, 0xB2F4, 0xB4E4, 0xB2F5,
06486     0xB4E5, 0xB2F7, 0xB4E6, 0xB2F8, 0xB4E7, 0xB2F9, 0xB4E8, 0xB2FA,
06487     0xB4E9, 0xB2FB, 0xB4EA, 0xB2FF, 0xB4EB, 0xB300, 0xB4EC, 0xB301,
06488     0xB4ED, 0xB304, 0xB4EE, 0xB308, 0xB4EF, 0xB310, 0xB4F0, 0xB311,
06489     0xB4F1, 0xB313, 0xB4F2, 0xB314, 0xB4F3, 0xB315, 0xB4F4, 0xB31C,
06490     0xB4F5, 0xB354, 0xB4F6, 0xB355, 0xB4F7, 0xB356, 0xB4F8, 0xB358,
06491     0xB4F9, 0xB35B, 0xB4FA, 0xB35C, 0xB4FB, 0xB35E, 0xB4FC, 0xB35F,
06492     0xB4FD, 0xB364, 0xB4FE, 0xB365, 0xB541, 0xD095, 0xB542, 0xD096,
06493     0xB543, 0xD097, 0xB544, 0xD098, 0xB545, 0xD099, 0xB546, 0xD09A,
06494     0xB547, 0xD09B, 0xB548, 0xD09C, 0xB549, 0xD09D, 0xB54A, 0xD09E,
06495     0xB54B, 0xD09F, 0xB54C, 0xD0A0, 0xB54D, 0xD0A1, 0xB54E, 0xD0A2,
06496     0xB54F, 0xD0A3, 0xB550, 0xD0A6, 0xB551, 0xD0A7, 0xB552, 0xD0A9,
06497     0xB553, 0xD0AA, 0xB554, 0xD0AB, 0xB555, 0xD0AD, 0xB556, 0xD0AE,
06498     0xB557, 0xD0AF, 0xB558, 0xD0B0, 0xB559, 0xD0B1, 0xB55A, 0xD0B2,
06499     0xB561, 0xD0B3, 0xB562, 0xD0B6, 0xB563, 0xD0B8, 0xB564, 0xD0BA,
06500     0xB565, 0xD0BB, 0xB566, 0xD0BC, 0xB567, 0xD0BD, 0xB568, 0xD0BE,
06501     0xB569, 0xD0BF, 0xB56A, 0xD0C2, 0xB56B, 0xD0C3, 0xB56C, 0xD0C5,
06502     0xB56D, 0xD0C6, 0xB56E, 0xD0C7, 0xB56F, 0xD0CA, 0xB570, 0xD0CB,
06503     0xB571, 0xD0CC, 0xB572, 0xD0CD, 0xB573, 0xD0CE, 0xB574, 0xD0CF,
06504     0xB575, 0xD0D2, 0xB576, 0xD0D6, 0xB577, 0xD0D7, 0xB578, 0xD0D8,
06505     0xB579, 0xD0D9, 0xB57A, 0xD0DA, 0xB581, 0xD0DB, 0xB582, 0xD0DE,
06506     0xB583, 0xD0DF, 0xB584, 0xD0E1, 0xB585, 0xD0E2, 0xB586, 0xD0E3,
06507     0xB587, 0xD0E5, 0xB588, 0xD0E6, 0xB589, 0xD0E7, 0xB58A, 0xD0E8,
06508     0xB58B, 0xD0E9, 0xB58C, 0xD0EA, 0xB58D, 0xD0EB, 0xB58E, 0xD0EE,
06509     0xB58F, 0xD0F2, 0xB590, 0xD0F3, 0xB591, 0xD0F4, 0xB592, 0xD0F5,
06510     0xB593, 0xD0F6, 0xB594, 0xD0F7, 0xB595, 0xD0F9, 0xB596, 0xD0FA,
06511     0xB597, 0xD0FB, 0xB598, 0xD0FC, 0xB599, 0xD0FD, 0xB59A, 0xD0FE,
06512     0xB59B, 0xD0FF, 0xB59C, 0xD100, 0xB59D, 0xD101, 0xB59E, 0xD102,
06513     0xB59F, 0xD103, 0xB5A0, 0xD104, 0xB5A1, 0xB367, 0xB5A2, 0xB369,
06514     0xB5A3, 0xB36B, 0xB5A4, 0xB36E, 0xB5A5, 0xB370, 0xB5A6, 0xB371,
06515     0xB5A7, 0xB374, 0xB5A8, 0xB378, 0xB5A9, 0xB380, 0xB5AA, 0xB381,
06516     0xB5AB, 0xB383, 0xB5AC, 0xB384, 0xB5AD, 0xB385, 0xB5AE, 0xB38C,
06517     0xB5AF, 0xB390, 0xB5B0, 0xB394, 0xB5B1, 0xB3A0, 0xB5B2, 0xB3A1,
06518     0xB5B3, 0xB3A8, 0xB5B4, 0xB3AC, 0xB5B5, 0xB3C4, 0xB5B6, 0xB3C5,
06519     0xB5B7, 0xB3C8, 0xB5B8, 0xB3CB, 0xB5B9, 0xB3CC, 0xB5BA, 0xB3CE,
06520     0xB5BB, 0xB3D0, 0xB5BC, 0xB3D4, 0xB5BD, 0xB3D5, 0xB5BE, 0xB3D7,
06521     0xB5BF, 0xB3D9, 0xB5C0, 0xB3DB, 0xB5C1, 0xB3DD, 0xB5C2, 0xB3E0,
06522     0xB5C3, 0xB3E4, 0xB5C4, 0xB3E8, 0xB5C5, 0xB3FC, 0xB5C6, 0xB410,
06523     0xB5C7, 0xB418, 0xB5C8, 0xB41C, 0xB5C9, 0xB420, 0xB5CA, 0xB428,
06524     0xB5CB, 0xB429, 0xB5CC, 0xB42B, 0xB5CD, 0xB434, 0xB5CE, 0xB450,
06525     0xB5CF, 0xB451, 0xB5D0, 0xB454, 0xB5D1, 0xB458, 0xB5D2, 0xB460,
06526     0xB5D3, 0xB461, 0xB5D4, 0xB463, 0xB5D5, 0xB465, 0xB5D6, 0xB46C,
06527     0xB5D7, 0xB480, 0xB5D8, 0xB488, 0xB5D9, 0xB49D, 0xB5DA, 0xB4A4,
06528     0xB5DB, 0xB4A8, 0xB5DC, 0xB4AC, 0xB5DD, 0xB4B5, 0xB5DE, 0xB4B7,
06529     0xB5DF, 0xB4B9, 0xB5E0, 0xB4C0, 0xB5E1, 0xB4C4, 0xB5E2, 0xB4C8,
06530     0xB5E3, 0xB4D0, 0xB5E4, 0xB4D5, 0xB5E5, 0xB4DC, 0xB5E6, 0xB4DD,
06531     0xB5E7, 0xB4E0, 0xB5E8, 0xB4E3, 0xB5E9, 0xB4E4, 0xB5EA, 0xB4E6,
06532     0xB5EB, 0xB4EC, 0xB5EC, 0xB4ED, 0xB5ED, 0xB4EF, 0xB5EE, 0xB4F1,
06533     0xB5EF, 0xB4F8, 0xB5F0, 0xB514, 0xB5F1, 0xB515, 0xB5F2, 0xB518,
06534     0xB5F3, 0xB51B, 0xB5F4, 0xB51C, 0xB5F5, 0xB524, 0xB5F6, 0xB525,
06535     0xB5F7, 0xB527, 0xB5F8, 0xB528, 0xB5F9, 0xB529, 0xB5FA, 0xB52A,
06536     0xB5FB, 0xB530, 0xB5FC, 0xB531, 0xB5FD, 0xB534, 0xB5FE, 0xB538,
06537     0xB641, 0xD105, 0xB642, 0xD106, 0xB643, 0xD107, 0xB644, 0xD108,
06538     0xB645, 0xD109, 0xB646, 0xD10A, 0xB647, 0xD10B, 0xB648, 0xD10C,
06539     0xB649, 0xD10E, 0xB64A, 0xD10F, 0xB64B, 0xD110, 0xB64C, 0xD111,
06540     0xB64D, 0xD112, 0xB64E, 0xD113, 0xB64F, 0xD114, 0xB650, 0xD115,
06541     0xB651, 0xD116, 0xB652, 0xD117, 0xB653, 0xD118, 0xB654, 0xD119,
06542     0xB655, 0xD11A, 0xB656, 0xD11B, 0xB657, 0xD11C, 0xB658, 0xD11D,
06543     0xB659, 0xD11E, 0xB65A, 0xD11F, 0xB661, 0xD120, 0xB662, 0xD121,
06544     0xB663, 0xD122, 0xB664, 0xD123, 0xB665, 0xD124, 0xB666, 0xD125,
06545     0xB667, 0xD126, 0xB668, 0xD127, 0xB669, 0xD128, 0xB66A, 0xD129,
06546     0xB66B, 0xD12A, 0xB66C, 0xD12B, 0xB66D, 0xD12C, 0xB66E, 0xD12D,
06547     0xB66F, 0xD12E, 0xB670, 0xD12F, 0xB671, 0xD132, 0xB672, 0xD133,
06548     0xB673, 0xD135, 0xB674, 0xD136, 0xB675, 0xD137, 0xB676, 0xD139,
06549     0xB677, 0xD13B, 0xB678, 0xD13C, 0xB679, 0xD13D, 0xB67A, 0xD13E,
06550     0xB681, 0xD13F, 0xB682, 0xD142, 0xB683, 0xD146, 0xB684, 0xD147,
06551     0xB685, 0xD148, 0xB686, 0xD149, 0xB687, 0xD14A, 0xB688, 0xD14B,
06552     0xB689, 0xD14E, 0xB68A, 0xD14F, 0xB68B, 0xD151, 0xB68C, 0xD152,
06553     0xB68D, 0xD153, 0xB68E, 0xD155, 0xB68F, 0xD156, 0xB690, 0xD157,
06554     0xB691, 0xD158, 0xB692, 0xD159, 0xB693, 0xD15A, 0xB694, 0xD15B,
06555     0xB695, 0xD15E, 0xB696, 0xD160, 0xB697, 0xD162, 0xB698, 0xD163,
06556     0xB699, 0xD164, 0xB69A, 0xD165, 0xB69B, 0xD166, 0xB69C, 0xD167,
06557     0xB69D, 0xD169, 0xB69E, 0xD16A, 0xB69F, 0xD16B, 0xB6A0, 0xD16D,
06558     0xB6A1, 0xB540, 0xB6A2, 0xB541, 0xB6A3, 0xB543, 0xB6A4, 0xB544,
06559     0xB6A5, 0xB545, 0xB6A6, 0xB54B, 0xB6A7, 0xB54C, 0xB6A8, 0xB54D,
06560     0xB6A9, 0xB550, 0xB6AA, 0xB554, 0xB6AB, 0xB55C, 0xB6AC, 0xB55D,
06561     0xB6AD, 0xB55F, 0xB6AE, 0xB560, 0xB6AF, 0xB561, 0xB6B0, 0xB5A0,
06562     0xB6B1, 0xB5A1, 0xB6B2, 0xB5A4, 0xB6B3, 0xB5A8, 0xB6B4, 0xB5AA,
06563     0xB6B5, 0xB5AB, 0xB6B6, 0xB5B0, 0xB6B7, 0xB5B1, 0xB6B8, 0xB5B3,
06564     0xB6B9, 0xB5B4, 0xB6BA, 0xB5B5, 0xB6BB, 0xB5BB, 0xB6BC, 0xB5BC,
06565     0xB6BD, 0xB5BD, 0xB6BE, 0xB5C0, 0xB6BF, 0xB5C4, 0xB6C0, 0xB5CC,
06566     0xB6C1, 0xB5CD, 0xB6C2, 0xB5CF, 0xB6C3, 0xB5D0, 0xB6C4, 0xB5D1,
06567     0xB6C5, 0xB5D8, 0xB6C6, 0xB5EC, 0xB6C7, 0xB610, 0xB6C8, 0xB611,
06568     0xB6C9, 0xB614, 0xB6CA, 0xB618, 0xB6CB, 0xB625, 0xB6CC, 0xB62C,
06569     0xB6CD, 0xB634, 0xB6CE, 0xB648, 0xB6CF, 0xB664, 0xB6D0, 0xB668,
06570     0xB6D1, 0xB69C, 0xB6D2, 0xB69D, 0xB6D3, 0xB6A0, 0xB6D4, 0xB6A4,
06571     0xB6D5, 0xB6AB, 0xB6D6, 0xB6AC, 0xB6D7, 0xB6B1, 0xB6D8, 0xB6D4,
06572     0xB6D9, 0xB6F0, 0xB6DA, 0xB6F4, 0xB6DB, 0xB6F8, 0xB6DC, 0xB700,
06573     0xB6DD, 0xB701, 0xB6DE, 0xB705, 0xB6DF, 0xB728, 0xB6E0, 0xB729,
06574     0xB6E1, 0xB72C, 0xB6E2, 0xB72F, 0xB6E3, 0xB730, 0xB6E4, 0xB738,
06575     0xB6E5, 0xB739, 0xB6E6, 0xB73B, 0xB6E7, 0xB744, 0xB6E8, 0xB748,
06576     0xB6E9, 0xB74C, 0xB6EA, 0xB754, 0xB6EB, 0xB755, 0xB6EC, 0xB760,
06577     0xB6ED, 0xB764, 0xB6EE, 0xB768, 0xB6EF, 0xB770, 0xB6F0, 0xB771,
06578     0xB6F1, 0xB773, 0xB6F2, 0xB775, 0xB6F3, 0xB77C, 0xB6F4, 0xB77D,
06579     0xB6F5, 0xB780, 0xB6F6, 0xB784, 0xB6F7, 0xB78C, 0xB6F8, 0xB78D,
06580     0xB6F9, 0xB78F, 0xB6FA, 0xB790, 0xB6FB, 0xB791, 0xB6FC, 0xB792,
06581     0xB6FD, 0xB796, 0xB6FE, 0xB797, 0xB741, 0xD16E, 0xB742, 0xD16F,
06582     0xB743, 0xD170, 0xB744, 0xD171, 0xB745, 0xD172, 0xB746, 0xD173,
06583     0xB747, 0xD174, 0xB748, 0xD175, 0xB749, 0xD176, 0xB74A, 0xD177,
06584     0xB74B, 0xD178, 0xB74C, 0xD179, 0xB74D, 0xD17A, 0xB74E, 0xD17B,
06585     0xB74F, 0xD17D, 0xB750, 0xD17E, 0xB751, 0xD17F, 0xB752, 0xD180,
06586     0xB753, 0xD181, 0xB754, 0xD182, 0xB755, 0xD183, 0xB756, 0xD185,
06587     0xB757, 0xD186, 0xB758, 0xD187, 0xB759, 0xD189, 0xB75A, 0xD18A,
06588     0xB761, 0xD18B, 0xB762, 0xD18C, 0xB763, 0xD18D, 0xB764, 0xD18E,
06589     0xB765, 0xD18F, 0xB766, 0xD190, 0xB767, 0xD191, 0xB768, 0xD192,
06590     0xB769, 0xD193, 0xB76A, 0xD194, 0xB76B, 0xD195, 0xB76C, 0xD196,
06591     0xB76D, 0xD197, 0xB76E, 0xD198, 0xB76F, 0xD199, 0xB770, 0xD19A,
06592     0xB771, 0xD19B, 0xB772, 0xD19C, 0xB773, 0xD19D, 0xB774, 0xD19E,
06593     0xB775, 0xD19F, 0xB776, 0xD1A2, 0xB777, 0xD1A3, 0xB778, 0xD1A5,
06594     0xB779, 0xD1A6, 0xB77A, 0xD1A7, 0xB781, 0xD1A9, 0xB782, 0xD1AA,
06595     0xB783, 0xD1AB, 0xB784, 0xD1AC, 0xB785, 0xD1AD, 0xB786, 0xD1AE,
06596     0xB787, 0xD1AF, 0xB788, 0xD1B2, 0xB789, 0xD1B4, 0xB78A, 0xD1B6,
06597     0xB78B, 0xD1B7, 0xB78C, 0xD1B8, 0xB78D, 0xD1B9, 0xB78E, 0xD1BB,
06598     0xB78F, 0xD1BD, 0xB790, 0xD1BE, 0xB791, 0xD1BF, 0xB792, 0xD1C1,
06599     0xB793, 0xD1C2, 0xB794, 0xD1C3, 0xB795, 0xD1C4, 0xB796, 0xD1C5,
06600     0xB797, 0xD1C6, 0xB798, 0xD1C7, 0xB799, 0xD1C8, 0xB79A, 0xD1C9,
06601     0xB79B, 0xD1CA, 0xB79C, 0xD1CB, 0xB79D, 0xD1CC, 0xB79E, 0xD1CD,
06602     0xB79F, 0xD1CE, 0xB7A0, 0xD1CF, 0xB7A1, 0xB798, 0xB7A2, 0xB799,
06603     0xB7A3, 0xB79C, 0xB7A4, 0xB7A0, 0xB7A5, 0xB7A8, 0xB7A6, 0xB7A9,
06604     0xB7A7, 0xB7AB, 0xB7A8, 0xB7AC, 0xB7A9, 0xB7AD, 0xB7AA, 0xB7B4,
06605     0xB7AB, 0xB7B5, 0xB7AC, 0xB7B8, 0xB7AD, 0xB7C7, 0xB7AE, 0xB7C9,
06606     0xB7AF, 0xB7EC, 0xB7B0, 0xB7ED, 0xB7B1, 0xB7F0, 0xB7B2, 0xB7F4,
06607     0xB7B3, 0xB7FC, 0xB7B4, 0xB7FD, 0xB7B5, 0xB7FF, 0xB7B6, 0xB800,
06608     0xB7B7, 0xB801, 0xB7B8, 0xB807, 0xB7B9, 0xB808, 0xB7BA, 0xB809,
06609     0xB7BB, 0xB80C, 0xB7BC, 0xB810, 0xB7BD, 0xB818, 0xB7BE, 0xB819,
06610     0xB7BF, 0xB81B, 0xB7C0, 0xB81D, 0xB7C1, 0xB824, 0xB7C2, 0xB825,
06611     0xB7C3, 0xB828, 0xB7C4, 0xB82C, 0xB7C5, 0xB834, 0xB7C6, 0xB835,
06612     0xB7C7, 0xB837, 0xB7C8, 0xB838, 0xB7C9, 0xB839, 0xB7CA, 0xB840,
06613     0xB7CB, 0xB844, 0xB7CC, 0xB851, 0xB7CD, 0xB853, 0xB7CE, 0xB85C,
06614     0xB7CF, 0xB85D, 0xB7D0, 0xB860, 0xB7D1, 0xB864, 0xB7D2, 0xB86C,
06615     0xB7D3, 0xB86D, 0xB7D4, 0xB86F, 0xB7D5, 0xB871, 0xB7D6, 0xB878,
06616     0xB7D7, 0xB87C, 0xB7D8, 0xB88D, 0xB7D9, 0xB8A8, 0xB7DA, 0xB8B0,
06617     0xB7DB, 0xB8B4, 0xB7DC, 0xB8B8, 0xB7DD, 0xB8C0, 0xB7DE, 0xB8C1,
06618     0xB7DF, 0xB8C3, 0xB7E0, 0xB8C5, 0xB7E1, 0xB8CC, 0xB7E2, 0xB8D0,
06619     0xB7E3, 0xB8D4, 0xB7E4, 0xB8DD, 0xB7E5, 0xB8DF, 0xB7E6, 0xB8E1,
06620     0xB7E7, 0xB8E8, 0xB7E8, 0xB8E9, 0xB7E9, 0xB8EC, 0xB7EA, 0xB8F0,
06621     0xB7EB, 0xB8F8, 0xB7EC, 0xB8F9, 0xB7ED, 0xB8FB, 0xB7EE, 0xB8FD,
06622     0xB7EF, 0xB904, 0xB7F0, 0xB918, 0xB7F1, 0xB920, 0xB7F2, 0xB93C,
06623     0xB7F3, 0xB93D, 0xB7F4, 0xB940, 0xB7F5, 0xB944, 0xB7F6, 0xB94C,
06624     0xB7F7, 0xB94F, 0xB7F8, 0xB951, 0xB7F9, 0xB958, 0xB7FA, 0xB959,
06625     0xB7FB, 0xB95C, 0xB7FC, 0xB960, 0xB7FD, 0xB968, 0xB7FE, 0xB969,
06626     0xB841, 0xD1D0, 0xB842, 0xD1D1, 0xB843, 0xD1D2, 0xB844, 0xD1D3,
06627     0xB845, 0xD1D4, 0xB846, 0xD1D5, 0xB847, 0xD1D6, 0xB848, 0xD1D7,
06628     0xB849, 0xD1D9, 0xB84A, 0xD1DA, 0xB84B, 0xD1DB, 0xB84C, 0xD1DC,
06629     0xB84D, 0xD1DD, 0xB84E, 0xD1DE, 0xB84F, 0xD1DF, 0xB850, 0xD1E0,
06630     0xB851, 0xD1E1, 0xB852, 0xD1E2, 0xB853, 0xD1E3, 0xB854, 0xD1E4,
06631     0xB855, 0xD1E5, 0xB856, 0xD1E6, 0xB857, 0xD1E7, 0xB858, 0xD1E8,
06632     0xB859, 0xD1E9, 0xB85A, 0xD1EA, 0xB861, 0xD1EB, 0xB862, 0xD1EC,
06633     0xB863, 0xD1ED, 0xB864, 0xD1EE, 0xB865, 0xD1EF, 0xB866, 0xD1F0,
06634     0xB867, 0xD1F1, 0xB868, 0xD1F2, 0xB869, 0xD1F3, 0xB86A, 0xD1F5,
06635     0xB86B, 0xD1F6, 0xB86C, 0xD1F7, 0xB86D, 0xD1F9, 0xB86E, 0xD1FA,
06636     0xB86F, 0xD1FB, 0xB870, 0xD1FC, 0xB871, 0xD1FD, 0xB872, 0xD1FE,
06637     0xB873, 0xD1FF, 0xB874, 0xD200, 0xB875, 0xD201, 0xB876, 0xD202,
06638     0xB877, 0xD203, 0xB878, 0xD204, 0xB879, 0xD205, 0xB87A, 0xD206,
06639     0xB881, 0xD208, 0xB882, 0xD20A, 0xB883, 0xD20B, 0xB884, 0xD20C,
06640     0xB885, 0xD20D, 0xB886, 0xD20E, 0xB887, 0xD20F, 0xB888, 0xD211,
06641     0xB889, 0xD212, 0xB88A, 0xD213, 0xB88B, 0xD214, 0xB88C, 0xD215,
06642     0xB88D, 0xD216, 0xB88E, 0xD217, 0xB88F, 0xD218, 0xB890, 0xD219,
06643     0xB891, 0xD21A, 0xB892, 0xD21B, 0xB893, 0xD21C, 0xB894, 0xD21D,
06644     0xB895, 0xD21E, 0xB896, 0xD21F, 0xB897, 0xD220, 0xB898, 0xD221,
06645     0xB899, 0xD222, 0xB89A, 0xD223, 0xB89B, 0xD224, 0xB89C, 0xD225,
06646     0xB89D, 0xD226, 0xB89E, 0xD227, 0xB89F, 0xD228, 0xB8A0, 0xD229,
06647     0xB8A1, 0xB96B, 0xB8A2, 0xB96D, 0xB8A3, 0xB974, 0xB8A4, 0xB975,
06648     0xB8A5, 0xB978, 0xB8A6, 0xB97C, 0xB8A7, 0xB984, 0xB8A8, 0xB985,
06649     0xB8A9, 0xB987, 0xB8AA, 0xB989, 0xB8AB, 0xB98A, 0xB8AC, 0xB98D,
06650     0xB8AD, 0xB98E, 0xB8AE, 0xB9AC, 0xB8AF, 0xB9AD, 0xB8B0, 0xB9B0,
06651     0xB8B1, 0xB9B4, 0xB8B2, 0xB9BC, 0xB8B3, 0xB9BD, 0xB8B4, 0xB9BF,
06652     0xB8B5, 0xB9C1, 0xB8B6, 0xB9C8, 0xB8B7, 0xB9C9, 0xB8B8, 0xB9CC,
06653     0xB8B9, 0xB9CE, 0xB8BA, 0xB9CF, 0xB8BB, 0xB9D0, 0xB8BC, 0xB9D1,
06654     0xB8BD, 0xB9D2, 0xB8BE, 0xB9D8, 0xB8BF, 0xB9D9, 0xB8C0, 0xB9DB,
06655     0xB8C1, 0xB9DD, 0xB8C2, 0xB9DE, 0xB8C3, 0xB9E1, 0xB8C4, 0xB9E3,
06656     0xB8C5, 0xB9E4, 0xB8C6, 0xB9E5, 0xB8C7, 0xB9E8, 0xB8C8, 0xB9EC,
06657     0xB8C9, 0xB9F4, 0xB8CA, 0xB9F5, 0xB8CB, 0xB9F7, 0xB8CC, 0xB9F8,
06658     0xB8CD, 0xB9F9, 0xB8CE, 0xB9FA, 0xB8CF, 0xBA00, 0xB8D0, 0xBA01,
06659     0xB8D1, 0xBA08, 0xB8D2, 0xBA15, 0xB8D3, 0xBA38, 0xB8D4, 0xBA39,
06660     0xB8D5, 0xBA3C, 0xB8D6, 0xBA40, 0xB8D7, 0xBA42, 0xB8D8, 0xBA48,
06661     0xB8D9, 0xBA49, 0xB8DA, 0xBA4B, 0xB8DB, 0xBA4D, 0xB8DC, 0xBA4E,
06662     0xB8DD, 0xBA53, 0xB8DE, 0xBA54, 0xB8DF, 0xBA55, 0xB8E0, 0xBA58,
06663     0xB8E1, 0xBA5C, 0xB8E2, 0xBA64, 0xB8E3, 0xBA65, 0xB8E4, 0xBA67,
06664     0xB8E5, 0xBA68, 0xB8E6, 0xBA69, 0xB8E7, 0xBA70, 0xB8E8, 0xBA71,
06665     0xB8E9, 0xBA74, 0xB8EA, 0xBA78, 0xB8EB, 0xBA83, 0xB8EC, 0xBA84,
06666     0xB8ED, 0xBA85, 0xB8EE, 0xBA87, 0xB8EF, 0xBA8C, 0xB8F0, 0xBAA8,
06667     0xB8F1, 0xBAA9, 0xB8F2, 0xBAAB, 0xB8F3, 0xBAAC, 0xB8F4, 0xBAB0,
06668     0xB8F5, 0xBAB2, 0xB8F6, 0xBAB8, 0xB8F7, 0xBAB9, 0xB8F8, 0xBABB,
06669     0xB8F9, 0xBABD, 0xB8FA, 0xBAC4, 0xB8FB, 0xBAC8, 0xB8FC, 0xBAD8,
06670     0xB8FD, 0xBAD9, 0xB8FE, 0xBAFC, 0xB941, 0xD22A, 0xB942, 0xD22B,
06671     0xB943, 0xD22E, 0xB944, 0xD22F, 0xB945, 0xD231, 0xB946, 0xD232,
06672     0xB947, 0xD233, 0xB948, 0xD235, 0xB949, 0xD236, 0xB94A, 0xD237,
06673     0xB94B, 0xD238, 0xB94C, 0xD239, 0xB94D, 0xD23A, 0xB94E, 0xD23B,
06674     0xB94F, 0xD23E, 0xB950, 0xD240, 0xB951, 0xD242, 0xB952, 0xD243,
06675     0xB953, 0xD244, 0xB954, 0xD245, 0xB955, 0xD246, 0xB956, 0xD247,
06676     0xB957, 0xD249, 0xB958, 0xD24A, 0xB959, 0xD24B, 0xB95A, 0xD24C,
06677     0xB961, 0xD24D, 0xB962, 0xD24E, 0xB963, 0xD24F, 0xB964, 0xD250,
06678     0xB965, 0xD251, 0xB966, 0xD252, 0xB967, 0xD253, 0xB968, 0xD254,
06679     0xB969, 0xD255, 0xB96A, 0xD256, 0xB96B, 0xD257, 0xB96C, 0xD258,
06680     0xB96D, 0xD259, 0xB96E, 0xD25A, 0xB96F, 0xD25B, 0xB970, 0xD25D,
06681     0xB971, 0xD25E, 0xB972, 0xD25F, 0xB973, 0xD260, 0xB974, 0xD261,
06682     0xB975, 0xD262, 0xB976, 0xD263, 0xB977, 0xD265, 0xB978, 0xD266,
06683     0xB979, 0xD267, 0xB97A, 0xD268, 0xB981, 0xD269, 0xB982, 0xD26A,
06684     0xB983, 0xD26B, 0xB984, 0xD26C, 0xB985, 0xD26D, 0xB986, 0xD26E,
06685     0xB987, 0xD26F, 0xB988, 0xD270, 0xB989, 0xD271, 0xB98A, 0xD272,
06686     0xB98B, 0xD273, 0xB98C, 0xD274, 0xB98D, 0xD275, 0xB98E, 0xD276,
06687     0xB98F, 0xD277, 0xB990, 0xD278, 0xB991, 0xD279, 0xB992, 0xD27A,
06688     0xB993, 0xD27B, 0xB994, 0xD27C, 0xB995, 0xD27D, 0xB996, 0xD27E,
06689     0xB997, 0xD27F, 0xB998, 0xD282, 0xB999, 0xD283, 0xB99A, 0xD285,
06690     0xB99B, 0xD286, 0xB99C, 0xD287, 0xB99D, 0xD289, 0xB99E, 0xD28A,
06691     0xB99F, 0xD28B, 0xB9A0, 0xD28C, 0xB9A1, 0xBB00, 0xB9A2, 0xBB04,
06692     0xB9A3, 0xBB0D, 0xB9A4, 0xBB0F, 0xB9A5, 0xBB11, 0xB9A6, 0xBB18,
06693     0xB9A7, 0xBB1C, 0xB9A8, 0xBB20, 0xB9A9, 0xBB29, 0xB9AA, 0xBB2B,
06694     0xB9AB, 0xBB34, 0xB9AC, 0xBB35, 0xB9AD, 0xBB36, 0xB9AE, 0xBB38,
06695     0xB9AF, 0xBB3B, 0xB9B0, 0xBB3C, 0xB9B1, 0xBB3D, 0xB9B2, 0xBB3E,
06696     0xB9B3, 0xBB44, 0xB9B4, 0xBB45, 0xB9B5, 0xBB47, 0xB9B6, 0xBB49,
06697     0xB9B7, 0xBB4D, 0xB9B8, 0xBB4F, 0xB9B9, 0xBB50, 0xB9BA, 0xBB54,
06698     0xB9BB, 0xBB58, 0xB9BC, 0xBB61, 0xB9BD, 0xBB63, 0xB9BE, 0xBB6C,
06699     0xB9BF, 0xBB88, 0xB9C0, 0xBB8C, 0xB9C1, 0xBB90, 0xB9C2, 0xBBA4,
06700     0xB9C3, 0xBBA8, 0xB9C4, 0xBBAC, 0xB9C5, 0xBBB4, 0xB9C6, 0xBBB7,
06701     0xB9C7, 0xBBC0, 0xB9C8, 0xBBC4, 0xB9C9, 0xBBC8, 0xB9CA, 0xBBD0,
06702     0xB9CB, 0xBBD3, 0xB9CC, 0xBBF8, 0xB9CD, 0xBBF9, 0xB9CE, 0xBBFC,
06703     0xB9CF, 0xBBFF, 0xB9D0, 0xBC00, 0xB9D1, 0xBC02, 0xB9D2, 0xBC08,
06704     0xB9D3, 0xBC09, 0xB9D4, 0xBC0B, 0xB9D5, 0xBC0C, 0xB9D6, 0xBC0D,
06705     0xB9D7, 0xBC0F, 0xB9D8, 0xBC11, 0xB9D9, 0xBC14, 0xB9DA, 0xBC15,
06706     0xB9DB, 0xBC16, 0xB9DC, 0xBC17, 0xB9DD, 0xBC18, 0xB9DE, 0xBC1B,
06707     0xB9DF, 0xBC1C, 0xB9E0, 0xBC1D, 0xB9E1, 0xBC1E, 0xB9E2, 0xBC1F,
06708     0xB9E3, 0xBC24, 0xB9E4, 0xBC25, 0xB9E5, 0xBC27, 0xB9E6, 0xBC29,
06709     0xB9E7, 0xBC2D, 0xB9E8, 0xBC30, 0xB9E9, 0xBC31, 0xB9EA, 0xBC34,
06710     0xB9EB, 0xBC38, 0xB9EC, 0xBC40, 0xB9ED, 0xBC41, 0xB9EE, 0xBC43,
06711     0xB9EF, 0xBC44, 0xB9F0, 0xBC45, 0xB9F1, 0xBC49, 0xB9F2, 0xBC4C,
06712     0xB9F3, 0xBC4D, 0xB9F4, 0xBC50, 0xB9F5, 0xBC5D, 0xB9F6, 0xBC84,
06713     0xB9F7, 0xBC85, 0xB9F8, 0xBC88, 0xB9F9, 0xBC8B, 0xB9FA, 0xBC8C,
06714     0xB9FB, 0xBC8E, 0xB9FC, 0xBC94, 0xB9FD, 0xBC95, 0xB9FE, 0xBC97,
06715     0xBA41, 0xD28D, 0xBA42, 0xD28E, 0xBA43, 0xD28F, 0xBA44, 0xD292,
06716     0xBA45, 0xD293, 0xBA46, 0xD294, 0xBA47, 0xD296, 0xBA48, 0xD297,
06717     0xBA49, 0xD298, 0xBA4A, 0xD299, 0xBA4B, 0xD29A, 0xBA4C, 0xD29B,
06718     0xBA4D, 0xD29D, 0xBA4E, 0xD29E, 0xBA4F, 0xD29F, 0xBA50, 0xD2A1,
06719     0xBA51, 0xD2A2, 0xBA52, 0xD2A3, 0xBA53, 0xD2A5, 0xBA54, 0xD2A6,
06720     0xBA55, 0xD2A7, 0xBA56, 0xD2A8, 0xBA57, 0xD2A9, 0xBA58, 0xD2AA,
06721     0xBA59, 0xD2AB, 0xBA5A, 0xD2AD, 0xBA61, 0xD2AE, 0xBA62, 0xD2AF,
06722     0xBA63, 0xD2B0, 0xBA64, 0xD2B2, 0xBA65, 0xD2B3, 0xBA66, 0xD2B4,
06723     0xBA67, 0xD2B5, 0xBA68, 0xD2B6, 0xBA69, 0xD2B7, 0xBA6A, 0xD2BA,
06724     0xBA6B, 0xD2BB, 0xBA6C, 0xD2BD, 0xBA6D, 0xD2BE, 0xBA6E, 0xD2C1,
06725     0xBA6F, 0xD2C3, 0xBA70, 0xD2C4, 0xBA71, 0xD2C5, 0xBA72, 0xD2C6,
06726     0xBA73, 0xD2C7, 0xBA74, 0xD2CA, 0xBA75, 0xD2CC, 0xBA76, 0xD2CD,
06727     0xBA77, 0xD2CE, 0xBA78, 0xD2CF, 0xBA79, 0xD2D0, 0xBA7A, 0xD2D1,
06728     0xBA81, 0xD2D2, 0xBA82, 0xD2D3, 0xBA83, 0xD2D5, 0xBA84, 0xD2D6,
06729     0xBA85, 0xD2D7, 0xBA86, 0xD2D9, 0xBA87, 0xD2DA, 0xBA88, 0xD2DB,
06730     0xBA89, 0xD2DD, 0xBA8A, 0xD2DE, 0xBA8B, 0xD2DF, 0xBA8C, 0xD2E0,
06731     0xBA8D, 0xD2E1, 0xBA8E, 0xD2E2, 0xBA8F, 0xD2E3, 0xBA90, 0xD2E6,
06732     0xBA91, 0xD2E7, 0xBA92, 0xD2E8, 0xBA93, 0xD2E9, 0xBA94, 0xD2EA,
06733     0xBA95, 0xD2EB, 0xBA96, 0xD2EC, 0xBA97, 0xD2ED, 0xBA98, 0xD2EE,
06734     0xBA99, 0xD2EF, 0xBA9A, 0xD2F2, 0xBA9B, 0xD2F3, 0xBA9C, 0xD2F5,
06735     0xBA9D, 0xD2F6, 0xBA9E, 0xD2F7, 0xBA9F, 0xD2F9, 0xBAA0, 0xD2FA,
06736     0xBAA1, 0xBC99, 0xBAA2, 0xBC9A, 0xBAA3, 0xBCA0, 0xBAA4, 0xBCA1,
06737     0xBAA5, 0xBCA4, 0xBAA6, 0xBCA7, 0xBAA7, 0xBCA8, 0xBAA8, 0xBCB0,
06738     0xBAA9, 0xBCB1, 0xBAAA, 0xBCB3, 0xBAAB, 0xBCB4, 0xBAAC, 0xBCB5,
06739     0xBAAD, 0xBCBC, 0xBAAE, 0xBCBD, 0xBAAF, 0xBCC0, 0xBAB0, 0xBCC4,
06740     0xBAB1, 0xBCCD, 0xBAB2, 0xBCCF, 0xBAB3, 0xBCD0, 0xBAB4, 0xBCD1,
06741     0xBAB5, 0xBCD5, 0xBAB6, 0xBCD8, 0xBAB7, 0xBCDC, 0xBAB8, 0xBCF4,
06742     0xBAB9, 0xBCF5, 0xBABA, 0xBCF6, 0xBABB, 0xBCF8, 0xBABC, 0xBCFC,
06743     0xBABD, 0xBD04, 0xBABE, 0xBD05, 0xBABF, 0xBD07, 0xBAC0, 0xBD09,
06744     0xBAC1, 0xBD10, 0xBAC2, 0xBD14, 0xBAC3, 0xBD24, 0xBAC4, 0xBD2C,
06745     0xBAC5, 0xBD40, 0xBAC6, 0xBD48, 0xBAC7, 0xBD49, 0xBAC8, 0xBD4C,
06746     0xBAC9, 0xBD50, 0xBACA, 0xBD58, 0xBACB, 0xBD59, 0xBACC, 0xBD64,
06747     0xBACD, 0xBD68, 0xBACE, 0xBD80, 0xBACF, 0xBD81, 0xBAD0, 0xBD84,
06748     0xBAD1, 0xBD87, 0xBAD2, 0xBD88, 0xBAD3, 0xBD89, 0xBAD4, 0xBD8A,
06749     0xBAD5, 0xBD90, 0xBAD6, 0xBD91, 0xBAD7, 0xBD93, 0xBAD8, 0xBD95,
06750     0xBAD9, 0xBD99, 0xBADA, 0xBD9A, 0xBADB, 0xBD9C, 0xBADC, 0xBDA4,
06751     0xBADD, 0xBDB0, 0xBADE, 0xBDB8, 0xBADF, 0xBDD4, 0xBAE0, 0xBDD5,
06752     0xBAE1, 0xBDD8, 0xBAE2, 0xBDDC, 0xBAE3, 0xBDE9, 0xBAE4, 0xBDF0,
06753     0xBAE5, 0xBDF4, 0xBAE6, 0xBDF8, 0xBAE7, 0xBE00, 0xBAE8, 0xBE03,
06754     0xBAE9, 0xBE05, 0xBAEA, 0xBE0C, 0xBAEB, 0xBE0D, 0xBAEC, 0xBE10,
06755     0xBAED, 0xBE14, 0xBAEE, 0xBE1C, 0xBAEF, 0xBE1D, 0xBAF0, 0xBE1F,
06756     0xBAF1, 0xBE44, 0xBAF2, 0xBE45, 0xBAF3, 0xBE48, 0xBAF4, 0xBE4C,
06757     0xBAF5, 0xBE4E, 0xBAF6, 0xBE54, 0xBAF7, 0xBE55, 0xBAF8, 0xBE57,
06758     0xBAF9, 0xBE59, 0xBAFA, 0xBE5A, 0xBAFB, 0xBE5B, 0xBAFC, 0xBE60,
06759     0xBAFD, 0xBE61, 0xBAFE, 0xBE64, 0xBB41, 0xD2FB, 0xBB42, 0xD2FC,
06760     0xBB43, 0xD2FD, 0xBB44, 0xD2FE, 0xBB45, 0xD2FF, 0xBB46, 0xD302,
06761     0xBB47, 0xD304, 0xBB48, 0xD306, 0xBB49, 0xD307, 0xBB4A, 0xD308,
06762     0xBB4B, 0xD309, 0xBB4C, 0xD30A, 0xBB4D, 0xD30B, 0xBB4E, 0xD30F,
06763     0xBB4F, 0xD311, 0xBB50, 0xD312, 0xBB51, 0xD313, 0xBB52, 0xD315,
06764     0xBB53, 0xD317, 0xBB54, 0xD318, 0xBB55, 0xD319, 0xBB56, 0xD31A,
06765     0xBB57, 0xD31B, 0xBB58, 0xD31E, 0xBB59, 0xD322, 0xBB5A, 0xD323,
06766     0xBB61, 0xD324, 0xBB62, 0xD326, 0xBB63, 0xD327, 0xBB64, 0xD32A,
06767     0xBB65, 0xD32B, 0xBB66, 0xD32D, 0xBB67, 0xD32E, 0xBB68, 0xD32F,
06768     0xBB69, 0xD331, 0xBB6A, 0xD332, 0xBB6B, 0xD333, 0xBB6C, 0xD334,
06769     0xBB6D, 0xD335, 0xBB6E, 0xD336, 0xBB6F, 0xD337, 0xBB70, 0xD33A,
06770     0xBB71, 0xD33E, 0xBB72, 0xD33F, 0xBB73, 0xD340, 0xBB74, 0xD341,
06771     0xBB75, 0xD342, 0xBB76, 0xD343, 0xBB77, 0xD346, 0xBB78, 0xD347,
06772     0xBB79, 0xD348, 0xBB7A, 0xD349, 0xBB81, 0xD34A, 0xBB82, 0xD34B,
06773     0xBB83, 0xD34C, 0xBB84, 0xD34D, 0xBB85, 0xD34E, 0xBB86, 0xD34F,
06774     0xBB87, 0xD350, 0xBB88, 0xD351, 0xBB89, 0xD352, 0xBB8A, 0xD353,
06775     0xBB8B, 0xD354, 0xBB8C, 0xD355, 0xBB8D, 0xD356, 0xBB8E, 0xD357,
06776     0xBB8F, 0xD358, 0xBB90, 0xD359, 0xBB91, 0xD35A, 0xBB92, 0xD35B,
06777     0xBB93, 0xD35C, 0xBB94, 0xD35D, 0xBB95, 0xD35E, 0xBB96, 0xD35F,
06778     0xBB97, 0xD360, 0xBB98, 0xD361, 0xBB99, 0xD362, 0xBB9A, 0xD363,
06779     0xBB9B, 0xD364, 0xBB9C, 0xD365, 0xBB9D, 0xD366, 0xBB9E, 0xD367,
06780     0xBB9F, 0xD368, 0xBBA0, 0xD369, 0xBBA1, 0xBE68, 0xBBA2, 0xBE6A,
06781     0xBBA3, 0xBE70, 0xBBA4, 0xBE71, 0xBBA5, 0xBE73, 0xBBA6, 0xBE74,
06782     0xBBA7, 0xBE75, 0xBBA8, 0xBE7B, 0xBBA9, 0xBE7C, 0xBBAA, 0xBE7D,
06783     0xBBAB, 0xBE80, 0xBBAC, 0xBE84, 0xBBAD, 0xBE8C, 0xBBAE, 0xBE8D,
06784     0xBBAF, 0xBE8F, 0xBBB0, 0xBE90, 0xBBB1, 0xBE91, 0xBBB2, 0xBE98,
06785     0xBBB3, 0xBE99, 0xBBB4, 0xBEA8, 0xBBB5, 0xBED0, 0xBBB6, 0xBED1,
06786     0xBBB7, 0xBED4, 0xBBB8, 0xBED7, 0xBBB9, 0xBED8, 0xBBBA, 0xBEE0,
06787     0xBBBB, 0xBEE3, 0xBBBC, 0xBEE4, 0xBBBD, 0xBEE5, 0xBBBE, 0xBEEC,
06788     0xBBBF, 0xBF01, 0xBBC0, 0xBF08, 0xBBC1, 0xBF09, 0xBBC2, 0xBF18,
06789     0xBBC3, 0xBF19, 0xBBC4, 0xBF1B, 0xBBC5, 0xBF1C, 0xBBC6, 0xBF1D,
06790     0xBBC7, 0xBF40, 0xBBC8, 0xBF41, 0xBBC9, 0xBF44, 0xBBCA, 0xBF48,
06791     0xBBCB, 0xBF50, 0xBBCC, 0xBF51, 0xBBCD, 0xBF55, 0xBBCE, 0xBF94,
06792     0xBBCF, 0xBFB0, 0xBBD0, 0xBFC5, 0xBBD1, 0xBFCC, 0xBBD2, 0xBFCD,
06793     0xBBD3, 0xBFD0, 0xBBD4, 0xBFD4, 0xBBD5, 0xBFDC, 0xBBD6, 0xBFDF,
06794     0xBBD7, 0xBFE1, 0xBBD8, 0xC03C, 0xBBD9, 0xC051, 0xBBDA, 0xC058,
06795     0xBBDB, 0xC05C, 0xBBDC, 0xC060, 0xBBDD, 0xC068, 0xBBDE, 0xC069,
06796     0xBBDF, 0xC090, 0xBBE0, 0xC091, 0xBBE1, 0xC094, 0xBBE2, 0xC098,
06797     0xBBE3, 0xC0A0, 0xBBE4, 0xC0A1, 0xBBE5, 0xC0A3, 0xBBE6, 0xC0A5,
06798     0xBBE7, 0xC0AC, 0xBBE8, 0xC0AD, 0xBBE9, 0xC0AF, 0xBBEA, 0xC0B0,
06799     0xBBEB, 0xC0B3, 0xBBEC, 0xC0B4, 0xBBED, 0xC0B5, 0xBBEE, 0xC0B6,
06800     0xBBEF, 0xC0BC, 0xBBF0, 0xC0BD, 0xBBF1, 0xC0BF, 0xBBF2, 0xC0C0,
06801     0xBBF3, 0xC0C1, 0xBBF4, 0xC0C5, 0xBBF5, 0xC0C8, 0xBBF6, 0xC0C9,
06802     0xBBF7, 0xC0CC, 0xBBF8, 0xC0D0, 0xBBF9, 0xC0D8, 0xBBFA, 0xC0D9,
06803     0xBBFB, 0xC0DB, 0xBBFC, 0xC0DC, 0xBBFD, 0xC0DD, 0xBBFE, 0xC0E4,
06804     0xBC41, 0xD36A, 0xBC42, 0xD36B, 0xBC43, 0xD36C, 0xBC44, 0xD36D,
06805     0xBC45, 0xD36E, 0xBC46, 0xD36F, 0xBC47, 0xD370, 0xBC48, 0xD371,
06806     0xBC49, 0xD372, 0xBC4A, 0xD373, 0xBC4B, 0xD374, 0xBC4C, 0xD375,
06807     0xBC4D, 0xD376, 0xBC4E, 0xD377, 0xBC4F, 0xD378, 0xBC50, 0xD379,
06808     0xBC51, 0xD37A, 0xBC52, 0xD37B, 0xBC53, 0xD37E, 0xBC54, 0xD37F,
06809     0xBC55, 0xD381, 0xBC56, 0xD382, 0xBC57, 0xD383, 0xBC58, 0xD385,
06810     0xBC59, 0xD386, 0xBC5A, 0xD387, 0xBC61, 0xD388, 0xBC62, 0xD389,
06811     0xBC63, 0xD38A, 0xBC64, 0xD38B, 0xBC65, 0xD38E, 0xBC66, 0xD392,
06812     0xBC67, 0xD393, 0xBC68, 0xD394, 0xBC69, 0xD395, 0xBC6A, 0xD396,
06813     0xBC6B, 0xD397, 0xBC6C, 0xD39A, 0xBC6D, 0xD39B, 0xBC6E, 0xD39D,
06814     0xBC6F, 0xD39E, 0xBC70, 0xD39F, 0xBC71, 0xD3A1, 0xBC72, 0xD3A2,
06815     0xBC73, 0xD3A3, 0xBC74, 0xD3A4, 0xBC75, 0xD3A5, 0xBC76, 0xD3A6,
06816     0xBC77, 0xD3A7, 0xBC78, 0xD3AA, 0xBC79, 0xD3AC, 0xBC7A, 0xD3AE,
06817     0xBC81, 0xD3AF, 0xBC82, 0xD3B0, 0xBC83, 0xD3B1, 0xBC84, 0xD3B2,
06818     0xBC85, 0xD3B3, 0xBC86, 0xD3B5, 0xBC87, 0xD3B6, 0xBC88, 0xD3B7,
06819     0xBC89, 0xD3B9, 0xBC8A, 0xD3BA, 0xBC8B, 0xD3BB, 0xBC8C, 0xD3BD,
06820     0xBC8D, 0xD3BE, 0xBC8E, 0xD3BF, 0xBC8F, 0xD3C0, 0xBC90, 0xD3C1,
06821     0xBC91, 0xD3C2, 0xBC92, 0xD3C3, 0xBC93, 0xD3C6, 0xBC94, 0xD3C7,
06822     0xBC95, 0xD3CA, 0xBC96, 0xD3CB, 0xBC97, 0xD3CC, 0xBC98, 0xD3CD,
06823     0xBC99, 0xD3CE, 0xBC9A, 0xD3CF, 0xBC9B, 0xD3D1, 0xBC9C, 0xD3D2,
06824     0xBC9D, 0xD3D3, 0xBC9E, 0xD3D4, 0xBC9F, 0xD3D5, 0xBCA0, 0xD3D6,
06825     0xBCA1, 0xC0E5, 0xBCA2, 0xC0E8, 0xBCA3, 0xC0EC, 0xBCA4, 0xC0F4,
06826     0xBCA5, 0xC0F5, 0xBCA6, 0xC0F7, 0xBCA7, 0xC0F9, 0xBCA8, 0xC100,
06827     0xBCA9, 0xC104, 0xBCAA, 0xC108, 0xBCAB, 0xC110, 0xBCAC, 0xC115,
06828     0xBCAD, 0xC11C, 0xBCAE, 0xC11D, 0xBCAF, 0xC11E, 0xBCB0, 0xC11F,
06829     0xBCB1, 0xC120, 0xBCB2, 0xC123, 0xBCB3, 0xC124, 0xBCB4, 0xC126,
06830     0xBCB5, 0xC127, 0xBCB6, 0xC12C, 0xBCB7, 0xC12D, 0xBCB8, 0xC12F,
06831     0xBCB9, 0xC130, 0xBCBA, 0xC131, 0xBCBB, 0xC136, 0xBCBC, 0xC138,
06832     0xBCBD, 0xC139, 0xBCBE, 0xC13C, 0xBCBF, 0xC140, 0xBCC0, 0xC148,
06833     0xBCC1, 0xC149, 0xBCC2, 0xC14B, 0xBCC3, 0xC14C, 0xBCC4, 0xC14D,
06834     0xBCC5, 0xC154, 0xBCC6, 0xC155, 0xBCC7, 0xC158, 0xBCC8, 0xC15C,
06835     0xBCC9, 0xC164, 0xBCCA, 0xC165, 0xBCCB, 0xC167, 0xBCCC, 0xC168,
06836     0xBCCD, 0xC169, 0xBCCE, 0xC170, 0xBCCF, 0xC174, 0xBCD0, 0xC178,
06837     0xBCD1, 0xC185, 0xBCD2, 0xC18C, 0xBCD3, 0xC18D, 0xBCD4, 0xC18E,
06838     0xBCD5, 0xC190, 0xBCD6, 0xC194, 0xBCD7, 0xC196, 0xBCD8, 0xC19C,
06839     0xBCD9, 0xC19D, 0xBCDA, 0xC19F, 0xBCDB, 0xC1A1, 0xBCDC, 0xC1A5,
06840     0xBCDD, 0xC1A8, 0xBCDE, 0xC1A9, 0xBCDF, 0xC1AC, 0xBCE0, 0xC1B0,
06841     0xBCE1, 0xC1BD, 0xBCE2, 0xC1C4, 0xBCE3, 0xC1C8, 0xBCE4, 0xC1CC,
06842     0xBCE5, 0xC1D4, 0xBCE6, 0xC1D7, 0xBCE7, 0xC1D8, 0xBCE8, 0xC1E0,
06843     0xBCE9, 0xC1E4, 0xBCEA, 0xC1E8, 0xBCEB, 0xC1F0, 0xBCEC, 0xC1F1,
06844     0xBCED, 0xC1F3, 0xBCEE, 0xC1FC, 0xBCEF, 0xC1FD, 0xBCF0, 0xC200,
06845     0xBCF1, 0xC204, 0xBCF2, 0xC20C, 0xBCF3, 0xC20D, 0xBCF4, 0xC20F,
06846     0xBCF5, 0xC211, 0xBCF6, 0xC218, 0xBCF7, 0xC219, 0xBCF8, 0xC21C,
06847     0xBCF9, 0xC21F, 0xBCFA, 0xC220, 0xBCFB, 0xC228, 0xBCFC, 0xC229,
06848     0xBCFD, 0xC22B, 0xBCFE, 0xC22D, 0xBD41, 0xD3D7, 0xBD42, 0xD3D9,
06849     0xBD43, 0xD3DA, 0xBD44, 0xD3DB, 0xBD45, 0xD3DC, 0xBD46, 0xD3DD,
06850     0xBD47, 0xD3DE, 0xBD48, 0xD3DF, 0xBD49, 0xD3E0, 0xBD4A, 0xD3E2,
06851     0xBD4B, 0xD3E4, 0xBD4C, 0xD3E5, 0xBD4D, 0xD3E6, 0xBD4E, 0xD3E7,
06852     0xBD4F, 0xD3E8, 0xBD50, 0xD3E9, 0xBD51, 0xD3EA, 0xBD52, 0xD3EB,
06853     0xBD53, 0xD3EE, 0xBD54, 0xD3EF, 0xBD55, 0xD3F1, 0xBD56, 0xD3F2,
06854     0xBD57, 0xD3F3, 0xBD58, 0xD3F5, 0xBD59, 0xD3F6, 0xBD5A, 0xD3F7,
06855     0xBD61, 0xD3F8, 0xBD62, 0xD3F9, 0xBD63, 0xD3FA, 0xBD64, 0xD3FB,
06856     0xBD65, 0xD3FE, 0xBD66, 0xD400, 0xBD67, 0xD402, 0xBD68, 0xD403,
06857     0xBD69, 0xD404, 0xBD6A, 0xD405, 0xBD6B, 0xD406, 0xBD6C, 0xD407,
06858     0xBD6D, 0xD409, 0xBD6E, 0xD40A, 0xBD6F, 0xD40B, 0xBD70, 0xD40C,
06859     0xBD71, 0xD40D, 0xBD72, 0xD40E, 0xBD73, 0xD40F, 0xBD74, 0xD410,
06860     0xBD75, 0xD411, 0xBD76, 0xD412, 0xBD77, 0xD413, 0xBD78, 0xD414,
06861     0xBD79, 0xD415, 0xBD7A, 0xD416, 0xBD81, 0xD417, 0xBD82, 0xD418,
06862     0xBD83, 0xD419, 0xBD84, 0xD41A, 0xBD85, 0xD41B, 0xBD86, 0xD41C,
06863     0xBD87, 0xD41E, 0xBD88, 0xD41F, 0xBD89, 0xD420, 0xBD8A, 0xD421,
06864     0xBD8B, 0xD422, 0xBD8C, 0xD423, 0xBD8D, 0xD424, 0xBD8E, 0xD425,
06865     0xBD8F, 0xD426, 0xBD90, 0xD427, 0xBD91, 0xD428, 0xBD92, 0xD429,
06866     0xBD93, 0xD42A, 0xBD94, 0xD42B, 0xBD95, 0xD42C, 0xBD96, 0xD42D,
06867     0xBD97, 0xD42E, 0xBD98, 0xD42F, 0xBD99, 0xD430, 0xBD9A, 0xD431,
06868     0xBD9B, 0xD432, 0xBD9C, 0xD433, 0xBD9D, 0xD434, 0xBD9E, 0xD435,
06869     0xBD9F, 0xD436, 0xBDA0, 0xD437, 0xBDA1, 0xC22F, 0xBDA2, 0xC231,
06870     0xBDA3, 0xC232, 0xBDA4, 0xC234, 0xBDA5, 0xC248, 0xBDA6, 0xC250,
06871     0xBDA7, 0xC251, 0xBDA8, 0xC254, 0xBDA9, 0xC258, 0xBDAA, 0xC260,
06872     0xBDAB, 0xC265, 0xBDAC, 0xC26C, 0xBDAD, 0xC26D, 0xBDAE, 0xC270,
06873     0xBDAF, 0xC274, 0xBDB0, 0xC27C, 0xBDB1, 0xC27D, 0xBDB2, 0xC27F,
06874     0xBDB3, 0xC281, 0xBDB4, 0xC288, 0xBDB5, 0xC289, 0xBDB6, 0xC290,
06875     0xBDB7, 0xC298, 0xBDB8, 0xC29B, 0xBDB9, 0xC29D, 0xBDBA, 0xC2A4,
06876     0xBDBB, 0xC2A5, 0xBDBC, 0xC2A8, 0xBDBD, 0xC2AC, 0xBDBE, 0xC2AD,
06877     0xBDBF, 0xC2B4, 0xBDC0, 0xC2B5, 0xBDC1, 0xC2B7, 0xBDC2, 0xC2B9,
06878     0xBDC3, 0xC2DC, 0xBDC4, 0xC2DD, 0xBDC5, 0xC2E0, 0xBDC6, 0xC2E3,
06879     0xBDC7, 0xC2E4, 0xBDC8, 0xC2EB, 0xBDC9, 0xC2EC, 0xBDCA, 0xC2ED,
06880     0xBDCB, 0xC2EF, 0xBDCC, 0xC2F1, 0xBDCD, 0xC2F6, 0xBDCE, 0xC2F8,
06881     0xBDCF, 0xC2F9, 0xBDD0, 0xC2FB, 0xBDD1, 0xC2FC, 0xBDD2, 0xC300,
06882     0xBDD3, 0xC308, 0xBDD4, 0xC309, 0xBDD5, 0xC30C, 0xBDD6, 0xC30D,
06883     0xBDD7, 0xC313, 0xBDD8, 0xC314, 0xBDD9, 0xC315, 0xBDDA, 0xC318,
06884     0xBDDB, 0xC31C, 0xBDDC, 0xC324, 0xBDDD, 0xC325, 0xBDDE, 0xC328,
06885     0xBDDF, 0xC329, 0xBDE0, 0xC345, 0xBDE1, 0xC368, 0xBDE2, 0xC369,
06886     0xBDE3, 0xC36C, 0xBDE4, 0xC370, 0xBDE5, 0xC372, 0xBDE6, 0xC378,
06887     0xBDE7, 0xC379, 0xBDE8, 0xC37C, 0xBDE9, 0xC37D, 0xBDEA, 0xC384,
06888     0xBDEB, 0xC388, 0xBDEC, 0xC38C, 0xBDED, 0xC3C0, 0xBDEE, 0xC3D8,
06889     0xBDEF, 0xC3D9, 0xBDF0, 0xC3DC, 0xBDF1, 0xC3DF, 0xBDF2, 0xC3E0,
06890     0xBDF3, 0xC3E2, 0xBDF4, 0xC3E8, 0xBDF5, 0xC3E9, 0xBDF6, 0xC3ED,
06891     0xBDF7, 0xC3F4, 0xBDF8, 0xC3F5, 0xBDF9, 0xC3F8, 0xBDFA, 0xC408,
06892     0xBDFB, 0xC410, 0xBDFC, 0xC424, 0xBDFD, 0xC42C, 0xBDFE, 0xC430,
06893     0xBE41, 0xD438, 0xBE42, 0xD439, 0xBE43, 0xD43A, 0xBE44, 0xD43B,
06894     0xBE45, 0xD43C, 0xBE46, 0xD43D, 0xBE47, 0xD43E, 0xBE48, 0xD43F,
06895     0xBE49, 0xD441, 0xBE4A, 0xD442, 0xBE4B, 0xD443, 0xBE4C, 0xD445,
06896     0xBE4D, 0xD446, 0xBE4E, 0xD447, 0xBE4F, 0xD448, 0xBE50, 0xD449,
06897     0xBE51, 0xD44A, 0xBE52, 0xD44B, 0xBE53, 0xD44C, 0xBE54, 0xD44D,
06898     0xBE55, 0xD44E, 0xBE56, 0xD44F, 0xBE57, 0xD450, 0xBE58, 0xD451,
06899     0xBE59, 0xD452, 0xBE5A, 0xD453, 0xBE61, 0xD454, 0xBE62, 0xD455,
06900     0xBE63, 0xD456, 0xBE64, 0xD457, 0xBE65, 0xD458, 0xBE66, 0xD459,
06901     0xBE67, 0xD45A, 0xBE68, 0xD45B, 0xBE69, 0xD45D, 0xBE6A, 0xD45E,
06902     0xBE6B, 0xD45F, 0xBE6C, 0xD461, 0xBE6D, 0xD462, 0xBE6E, 0xD463,
06903     0xBE6F, 0xD465, 0xBE70, 0xD466, 0xBE71, 0xD467, 0xBE72, 0xD468,
06904     0xBE73, 0xD469, 0xBE74, 0xD46A, 0xBE75, 0xD46B, 0xBE76, 0xD46C,
06905     0xBE77, 0xD46E, 0xBE78, 0xD470, 0xBE79, 0xD471, 0xBE7A, 0xD472,
06906     0xBE81, 0xD473, 0xBE82, 0xD474, 0xBE83, 0xD475, 0xBE84, 0xD476,
06907     0xBE85, 0xD477, 0xBE86, 0xD47A, 0xBE87, 0xD47B, 0xBE88, 0xD47D,
06908     0xBE89, 0xD47E, 0xBE8A, 0xD481, 0xBE8B, 0xD483, 0xBE8C, 0xD484,
06909     0xBE8D, 0xD485, 0xBE8E, 0xD486, 0xBE8F, 0xD487, 0xBE90, 0xD48A,
06910     0xBE91, 0xD48C, 0xBE92, 0xD48E, 0xBE93, 0xD48F, 0xBE94, 0xD490,
06911     0xBE95, 0xD491, 0xBE96, 0xD492, 0xBE97, 0xD493, 0xBE98, 0xD495,
06912     0xBE99, 0xD496, 0xBE9A, 0xD497, 0xBE9B, 0xD498, 0xBE9C, 0xD499,
06913     0xBE9D, 0xD49A, 0xBE9E, 0xD49B, 0xBE9F, 0xD49C, 0xBEA0, 0xD49D,
06914     0xBEA1, 0xC434, 0xBEA2, 0xC43C, 0xBEA3, 0xC43D, 0xBEA4, 0xC448,
06915     0xBEA5, 0xC464, 0xBEA6, 0xC465, 0xBEA7, 0xC468, 0xBEA8, 0xC46C,
06916     0xBEA9, 0xC474, 0xBEAA, 0xC475, 0xBEAB, 0xC479, 0xBEAC, 0xC480,
06917     0xBEAD, 0xC494, 0xBEAE, 0xC49C, 0xBEAF, 0xC4B8, 0xBEB0, 0xC4BC,
06918     0xBEB1, 0xC4E9, 0xBEB2, 0xC4F0, 0xBEB3, 0xC4F1, 0xBEB4, 0xC4F4,
06919     0xBEB5, 0xC4F8, 0xBEB6, 0xC4FA, 0xBEB7, 0xC4FF, 0xBEB8, 0xC500,
06920     0xBEB9, 0xC501, 0xBEBA, 0xC50C, 0xBEBB, 0xC510, 0xBEBC, 0xC514,
06921     0xBEBD, 0xC51C, 0xBEBE, 0xC528, 0xBEBF, 0xC529, 0xBEC0, 0xC52C,
06922     0xBEC1, 0xC530, 0xBEC2, 0xC538, 0xBEC3, 0xC539, 0xBEC4, 0xC53B,
06923     0xBEC5, 0xC53D, 0xBEC6, 0xC544, 0xBEC7, 0xC545, 0xBEC8, 0xC548,
06924     0xBEC9, 0xC549, 0xBECA, 0xC54A, 0xBECB, 0xC54C, 0xBECC, 0xC54D,
06925     0xBECD, 0xC54E, 0xBECE, 0xC553, 0xBECF, 0xC554, 0xBED0, 0xC555,
06926     0xBED1, 0xC557, 0xBED2, 0xC558, 0xBED3, 0xC559, 0xBED4, 0xC55D,
06927     0xBED5, 0xC55E, 0xBED6, 0xC560, 0xBED7, 0xC561, 0xBED8, 0xC564,
06928     0xBED9, 0xC568, 0xBEDA, 0xC570, 0xBEDB, 0xC571, 0xBEDC, 0xC573,
06929     0xBEDD, 0xC574, 0xBEDE, 0xC575, 0xBEDF, 0xC57C, 0xBEE0, 0xC57D,
06930     0xBEE1, 0xC580, 0xBEE2, 0xC584, 0xBEE3, 0xC587, 0xBEE4, 0xC58C,
06931     0xBEE5, 0xC58D, 0xBEE6, 0xC58F, 0xBEE7, 0xC591, 0xBEE8, 0xC595,
06932     0xBEE9, 0xC597, 0xBEEA, 0xC598, 0xBEEB, 0xC59C, 0xBEEC, 0xC5A0,
06933     0xBEED, 0xC5A9, 0xBEEE, 0xC5B4, 0xBEEF, 0xC5B5, 0xBEF0, 0xC5B8,
06934     0xBEF1, 0xC5B9, 0xBEF2, 0xC5BB, 0xBEF3, 0xC5BC, 0xBEF4, 0xC5BD,
06935     0xBEF5, 0xC5BE, 0xBEF6, 0xC5C4, 0xBEF7, 0xC5C5, 0xBEF8, 0xC5C6,
06936     0xBEF9, 0xC5C7, 0xBEFA, 0xC5C8, 0xBEFB, 0xC5C9, 0xBEFC, 0xC5CA,
06937     0xBEFD, 0xC5CC, 0xBEFE, 0xC5CE, 0xBF41, 0xD49E, 0xBF42, 0xD49F,
06938     0xBF43, 0xD4A0, 0xBF44, 0xD4A1, 0xBF45, 0xD4A2, 0xBF46, 0xD4A3,
06939     0xBF47, 0xD4A4, 0xBF48, 0xD4A5, 0xBF49, 0xD4A6, 0xBF4A, 0xD4A7,
06940     0xBF4B, 0xD4A8, 0xBF4C, 0xD4AA, 0xBF4D, 0xD4AB, 0xBF4E, 0xD4AC,
06941     0xBF4F, 0xD4AD, 0xBF50, 0xD4AE, 0xBF51, 0xD4AF, 0xBF52, 0xD4B0,
06942     0xBF53, 0xD4B1, 0xBF54, 0xD4B2, 0xBF55, 0xD4B3, 0xBF56, 0xD4B4,
06943     0xBF57, 0xD4B5, 0xBF58, 0xD4B6, 0xBF59, 0xD4B7, 0xBF5A, 0xD4B8,
06944     0xBF61, 0xD4B9, 0xBF62, 0xD4BA, 0xBF63, 0xD4BB, 0xBF64, 0xD4BC,
06945     0xBF65, 0xD4BD, 0xBF66, 0xD4BE, 0xBF67, 0xD4BF, 0xBF68, 0xD4C0,
06946     0xBF69, 0xD4C1, 0xBF6A, 0xD4C2, 0xBF6B, 0xD4C3, 0xBF6C, 0xD4C4,
06947     0xBF6D, 0xD4C5, 0xBF6E, 0xD4C6, 0xBF6F, 0xD4C7, 0xBF70, 0xD4C8,
06948     0xBF71, 0xD4C9, 0xBF72, 0xD4CA, 0xBF73, 0xD4CB, 0xBF74, 0xD4CD,
06949     0xBF75, 0xD4CE, 0xBF76, 0xD4CF, 0xBF77, 0xD4D1, 0xBF78, 0xD4D2,
06950     0xBF79, 0xD4D3, 0xBF7A, 0xD4D5, 0xBF81, 0xD4D6, 0xBF82, 0xD4D7,
06951     0xBF83, 0xD4D8, 0xBF84, 0xD4D9, 0xBF85, 0xD4DA, 0xBF86, 0xD4DB,
06952     0xBF87, 0xD4DD, 0xBF88, 0xD4DE, 0xBF89, 0xD4E0, 0xBF8A, 0xD4E1,
06953     0xBF8B, 0xD4E2, 0xBF8C, 0xD4E3, 0xBF8D, 0xD4E4, 0xBF8E, 0xD4E5,
06954     0xBF8F, 0xD4E6, 0xBF90, 0xD4E7, 0xBF91, 0xD4E9, 0xBF92, 0xD4EA,
06955     0xBF93, 0xD4EB, 0xBF94, 0xD4ED, 0xBF95, 0xD4EE, 0xBF96, 0xD4EF,
06956     0xBF97, 0xD4F1, 0xBF98, 0xD4F2, 0xBF99, 0xD4F3, 0xBF9A, 0xD4F4,
06957     0xBF9B, 0xD4F5, 0xBF9C, 0xD4F6, 0xBF9D, 0xD4F7, 0xBF9E, 0xD4F9,
06958     0xBF9F, 0xD4FA, 0xBFA0, 0xD4FC, 0xBFA1, 0xC5D0, 0xBFA2, 0xC5D1,
06959     0xBFA3, 0xC5D4, 0xBFA4, 0xC5D8, 0xBFA5, 0xC5E0, 0xBFA6, 0xC5E1,
06960     0xBFA7, 0xC5E3, 0xBFA8, 0xC5E5, 0xBFA9, 0xC5EC, 0xBFAA, 0xC5ED,
06961     0xBFAB, 0xC5EE, 0xBFAC, 0xC5F0, 0xBFAD, 0xC5F4, 0xBFAE, 0xC5F6,
06962     0xBFAF, 0xC5F7, 0xBFB0, 0xC5FC, 0xBFB1, 0xC5FD, 0xBFB2, 0xC5FE,
06963     0xBFB3, 0xC5FF, 0xBFB4, 0xC600, 0xBFB5, 0xC601, 0xBFB6, 0xC605,
06964     0xBFB7, 0xC606, 0xBFB8, 0xC607, 0xBFB9, 0xC608, 0xBFBA, 0xC60C,
06965     0xBFBB, 0xC610, 0xBFBC, 0xC618, 0xBFBD, 0xC619, 0xBFBE, 0xC61B,
06966     0xBFBF, 0xC61C, 0xBFC0, 0xC624, 0xBFC1, 0xC625, 0xBFC2, 0xC628,
06967     0xBFC3, 0xC62C, 0xBFC4, 0xC62D, 0xBFC5, 0xC62E, 0xBFC6, 0xC630,
06968     0xBFC7, 0xC633, 0xBFC8, 0xC634, 0xBFC9, 0xC635, 0xBFCA, 0xC637,
06969     0xBFCB, 0xC639, 0xBFCC, 0xC63B, 0xBFCD, 0xC640, 0xBFCE, 0xC641,
06970     0xBFCF, 0xC644, 0xBFD0, 0xC648, 0xBFD1, 0xC650, 0xBFD2, 0xC651,
06971     0xBFD3, 0xC653, 0xBFD4, 0xC654, 0xBFD5, 0xC655, 0xBFD6, 0xC65C,
06972     0xBFD7, 0xC65D, 0xBFD8, 0xC660, 0xBFD9, 0xC66C, 0xBFDA, 0xC66F,
06973     0xBFDB, 0xC671, 0xBFDC, 0xC678, 0xBFDD, 0xC679, 0xBFDE, 0xC67C,
06974     0xBFDF, 0xC680, 0xBFE0, 0xC688, 0xBFE1, 0xC689, 0xBFE2, 0xC68B,
06975     0xBFE3, 0xC68D, 0xBFE4, 0xC694, 0xBFE5, 0xC695, 0xBFE6, 0xC698,
06976     0xBFE7, 0xC69C, 0xBFE8, 0xC6A4, 0xBFE9, 0xC6A5, 0xBFEA, 0xC6A7,
06977     0xBFEB, 0xC6A9, 0xBFEC, 0xC6B0, 0xBFED, 0xC6B1, 0xBFEE, 0xC6B4,
06978     0xBFEF, 0xC6B8, 0xBFF0, 0xC6B9, 0xBFF1, 0xC6BA, 0xBFF2, 0xC6C0,
06979     0xBFF3, 0xC6C1, 0xBFF4, 0xC6C3, 0xBFF5, 0xC6C5, 0xBFF6, 0xC6CC,
06980     0xBFF7, 0xC6CD, 0xBFF8, 0xC6D0, 0xBFF9, 0xC6D4, 0xBFFA, 0xC6DC,
06981     0xBFFB, 0xC6DD, 0xBFFC, 0xC6E0, 0xBFFD, 0xC6E1, 0xBFFE, 0xC6E8,
06982     0xC041, 0xD4FE, 0xC042, 0xD4FF, 0xC043, 0xD500, 0xC044, 0xD501,
06983     0xC045, 0xD502, 0xC046, 0xD503, 0xC047, 0xD505, 0xC048, 0xD506,
06984     0xC049, 0xD507, 0xC04A, 0xD509, 0xC04B, 0xD50A, 0xC04C, 0xD50B,
06985     0xC04D, 0xD50D, 0xC04E, 0xD50E, 0xC04F, 0xD50F, 0xC050, 0xD510,
06986     0xC051, 0xD511, 0xC052, 0xD512, 0xC053, 0xD513, 0xC054, 0xD516,
06987     0xC055, 0xD518, 0xC056, 0xD519, 0xC057, 0xD51A, 0xC058, 0xD51B,
06988     0xC059, 0xD51C, 0xC05A, 0xD51D, 0xC061, 0xD51E, 0xC062, 0xD51F,
06989     0xC063, 0xD520, 0xC064, 0xD521, 0xC065, 0xD522, 0xC066, 0xD523,
06990     0xC067, 0xD524, 0xC068, 0xD525, 0xC069, 0xD526, 0xC06A, 0xD527,
06991     0xC06B, 0xD528, 0xC06C, 0xD529, 0xC06D, 0xD52A, 0xC06E, 0xD52B,
06992     0xC06F, 0xD52C, 0xC070, 0xD52D, 0xC071, 0xD52E, 0xC072, 0xD52F,
06993     0xC073, 0xD530, 0xC074, 0xD531, 0xC075, 0xD532, 0xC076, 0xD533,
06994     0xC077, 0xD534, 0xC078, 0xD535, 0xC079, 0xD536, 0xC07A, 0xD537,
06995     0xC081, 0xD538, 0xC082, 0xD539, 0xC083, 0xD53A, 0xC084, 0xD53B,
06996     0xC085, 0xD53E, 0xC086, 0xD53F, 0xC087, 0xD541, 0xC088, 0xD542,
06997     0xC089, 0xD543, 0xC08A, 0xD545, 0xC08B, 0xD546, 0xC08C, 0xD547,
06998     0xC08D, 0xD548, 0xC08E, 0xD549, 0xC08F, 0xD54A, 0xC090, 0xD54B,
06999     0xC091, 0xD54E, 0xC092, 0xD550, 0xC093, 0xD552, 0xC094, 0xD553,
07000     0xC095, 0xD554, 0xC096, 0xD555, 0xC097, 0xD556, 0xC098, 0xD557,
07001     0xC099, 0xD55A, 0xC09A, 0xD55B, 0xC09B, 0xD55D, 0xC09C, 0xD55E,
07002     0xC09D, 0xD55F, 0xC09E, 0xD561, 0xC09F, 0xD562, 0xC0A0, 0xD563,
07003     0xC0A1, 0xC6E9, 0xC0A2, 0xC6EC, 0xC0A3, 0xC6F0, 0xC0A4, 0xC6F8,
07004     0xC0A5, 0xC6F9, 0xC0A6, 0xC6FD, 0xC0A7, 0xC704, 0xC0A8, 0xC705,
07005     0xC0A9, 0xC708, 0xC0AA, 0xC70C, 0xC0AB, 0xC714, 0xC0AC, 0xC715,
07006     0xC0AD, 0xC717, 0xC0AE, 0xC719, 0xC0AF, 0xC720, 0xC0B0, 0xC721,
07007     0xC0B1, 0xC724, 0xC0B2, 0xC728, 0xC0B3, 0xC730, 0xC0B4, 0xC731,
07008     0xC0B5, 0xC733, 0xC0B6, 0xC735, 0xC0B7, 0xC737, 0xC0B8, 0xC73C,
07009     0xC0B9, 0xC73D, 0xC0BA, 0xC740, 0xC0BB, 0xC744, 0xC0BC, 0xC74A,
07010     0xC0BD, 0xC74C, 0xC0BE, 0xC74D, 0xC0BF, 0xC74F, 0xC0C0, 0xC751,
07011     0xC0C1, 0xC752, 0xC0C2, 0xC753, 0xC0C3, 0xC754, 0xC0C4, 0xC755,
07012     0xC0C5, 0xC756, 0xC0C6, 0xC757, 0xC0C7, 0xC758, 0xC0C8, 0xC75C,
07013     0xC0C9, 0xC760, 0xC0CA, 0xC768, 0xC0CB, 0xC76B, 0xC0CC, 0xC774,
07014     0xC0CD, 0xC775, 0xC0CE, 0xC778, 0xC0CF, 0xC77C, 0xC0D0, 0xC77D,
07015     0xC0D1, 0xC77E, 0xC0D2, 0xC783, 0xC0D3, 0xC784, 0xC0D4, 0xC785,
07016     0xC0D5, 0xC787, 0xC0D6, 0xC788, 0xC0D7, 0xC789, 0xC0D8, 0xC78A,
07017     0xC0D9, 0xC78E, 0xC0DA, 0xC790, 0xC0DB, 0xC791, 0xC0DC, 0xC794,
07018     0xC0DD, 0xC796, 0xC0DE, 0xC797, 0xC0DF, 0xC798, 0xC0E0, 0xC79A,
07019     0xC0E1, 0xC7A0, 0xC0E2, 0xC7A1, 0xC0E3, 0xC7A3, 0xC0E4, 0xC7A4,
07020     0xC0E5, 0xC7A5, 0xC0E6, 0xC7A6, 0xC0E7, 0xC7AC, 0xC0E8, 0xC7AD,
07021     0xC0E9, 0xC7B0, 0xC0EA, 0xC7B4, 0xC0EB, 0xC7BC, 0xC0EC, 0xC7BD,
07022     0xC0ED, 0xC7BF, 0xC0EE, 0xC7C0, 0xC0EF, 0xC7C1, 0xC0F0, 0xC7C8,
07023     0xC0F1, 0xC7C9, 0xC0F2, 0xC7CC, 0xC0F3, 0xC7CE, 0xC0F4, 0xC7D0,
07024     0xC0F5, 0xC7D8, 0xC0F6, 0xC7DD, 0xC0F7, 0xC7E4, 0xC0F8, 0xC7E8,
07025     0xC0F9, 0xC7EC, 0xC0FA, 0xC800, 0xC0FB, 0xC801, 0xC0FC, 0xC804,
07026     0xC0FD, 0xC808, 0xC0FE, 0xC80A, 0xC141, 0xD564, 0xC142, 0xD566,
07027     0xC143, 0xD567, 0xC144, 0xD56A, 0xC145, 0xD56C, 0xC146, 0xD56E,
07028     0xC147, 0xD56F, 0xC148, 0xD570, 0xC149, 0xD571, 0xC14A, 0xD572,
07029     0xC14B, 0xD573, 0xC14C, 0xD576, 0xC14D, 0xD577, 0xC14E, 0xD579,
07030     0xC14F, 0xD57A, 0xC150, 0xD57B, 0xC151, 0xD57D, 0xC152, 0xD57E,
07031     0xC153, 0xD57F, 0xC154, 0xD580, 0xC155, 0xD581, 0xC156, 0xD582,
07032     0xC157, 0xD583, 0xC158, 0xD586, 0xC159, 0xD58A, 0xC15A, 0xD58B,
07033     0xC161, 0xD58C, 0xC162, 0xD58D, 0xC163, 0xD58E, 0xC164, 0xD58F,
07034     0xC165, 0xD591, 0xC166, 0xD592, 0xC167, 0xD593, 0xC168, 0xD594,
07035     0xC169, 0xD595, 0xC16A, 0xD596, 0xC16B, 0xD597, 0xC16C, 0xD598,
07036     0xC16D, 0xD599, 0xC16E, 0xD59A, 0xC16F, 0xD59B, 0xC170, 0xD59C,
07037     0xC171, 0xD59D, 0xC172, 0xD59E, 0xC173, 0xD59F, 0xC174, 0xD5A0,
07038     0xC175, 0xD5A1, 0xC176, 0xD5A2, 0xC177, 0xD5A3, 0xC178, 0xD5A4,
07039     0xC179, 0xD5A6, 0xC17A, 0xD5A7, 0xC181, 0xD5A8, 0xC182, 0xD5A9,
07040     0xC183, 0xD5AA, 0xC184, 0xD5AB, 0xC185, 0xD5AC, 0xC186, 0xD5AD,
07041     0xC187, 0xD5AE, 0xC188, 0xD5AF, 0xC189, 0xD5B0, 0xC18A, 0xD5B1,
07042     0xC18B, 0xD5B2, 0xC18C, 0xD5B3, 0xC18D, 0xD5B4, 0xC18E, 0xD5B5,
07043     0xC18F, 0xD5B6, 0xC190, 0xD5B7, 0xC191, 0xD5B8, 0xC192, 0xD5B9,
07044     0xC193, 0xD5BA, 0xC194, 0xD5BB, 0xC195, 0xD5BC, 0xC196, 0xD5BD,
07045     0xC197, 0xD5BE, 0xC198, 0xD5BF, 0xC199, 0xD5C0, 0xC19A, 0xD5C1,
07046     0xC19B, 0xD5C2, 0xC19C, 0xD5C3, 0xC19D, 0xD5C4, 0xC19E, 0xD5C5,
07047     0xC19F, 0xD5C6, 0xC1A0, 0xD5C7, 0xC1A1, 0xC810, 0xC1A2, 0xC811,
07048     0xC1A3, 0xC813, 0xC1A4, 0xC815, 0xC1A5, 0xC816, 0xC1A6, 0xC81C,
07049     0xC1A7, 0xC81D, 0xC1A8, 0xC820, 0xC1A9, 0xC824, 0xC1AA, 0xC82C,
07050     0xC1AB, 0xC82D, 0xC1AC, 0xC82F, 0xC1AD, 0xC831, 0xC1AE, 0xC838,
07051     0xC1AF, 0xC83C, 0xC1B0, 0xC840, 0xC1B1, 0xC848, 0xC1B2, 0xC849,
07052     0xC1B3, 0xC84C, 0xC1B4, 0xC84D, 0xC1B5, 0xC854, 0xC1B6, 0xC870,
07053     0xC1B7, 0xC871, 0xC1B8, 0xC874, 0xC1B9, 0xC878, 0xC1BA, 0xC87A,
07054     0xC1BB, 0xC880, 0xC1BC, 0xC881, 0xC1BD, 0xC883, 0xC1BE, 0xC885,
07055     0xC1BF, 0xC886, 0xC1C0, 0xC887, 0xC1C1, 0xC88B, 0xC1C2, 0xC88C,
07056     0xC1C3, 0xC88D, 0xC1C4, 0xC894, 0xC1C5, 0xC89D, 0xC1C6, 0xC89F,
07057     0xC1C7, 0xC8A1, 0xC1C8, 0xC8A8, 0xC1C9, 0xC8BC, 0xC1CA, 0xC8BD,
07058     0xC1CB, 0xC8C4, 0xC1CC, 0xC8C8, 0xC1CD, 0xC8CC, 0xC1CE, 0xC8D4,
07059     0xC1CF, 0xC8D5, 0xC1D0, 0xC8D7, 0xC1D1, 0xC8D9, 0xC1D2, 0xC8E0,
07060     0xC1D3, 0xC8E1, 0xC1D4, 0xC8E4, 0xC1D5, 0xC8F5, 0xC1D6, 0xC8FC,
07061     0xC1D7, 0xC8FD, 0xC1D8, 0xC900, 0xC1D9, 0xC904, 0xC1DA, 0xC905,
07062     0xC1DB, 0xC906, 0xC1DC, 0xC90C, 0xC1DD, 0xC90D, 0xC1DE, 0xC90F,
07063     0xC1DF, 0xC911, 0xC1E0, 0xC918, 0xC1E1, 0xC92C, 0xC1E2, 0xC934,
07064     0xC1E3, 0xC950, 0xC1E4, 0xC951, 0xC1E5, 0xC954, 0xC1E6, 0xC958,
07065     0xC1E7, 0xC960, 0xC1E8, 0xC961, 0xC1E9, 0xC963, 0xC1EA, 0xC96C,
07066     0xC1EB, 0xC970, 0xC1EC, 0xC974, 0xC1ED, 0xC97C, 0xC1EE, 0xC988,
07067     0xC1EF, 0xC989, 0xC1F0, 0xC98C, 0xC1F1, 0xC990, 0xC1F2, 0xC998,
07068     0xC1F3, 0xC999, 0xC1F4, 0xC99B, 0xC1F5, 0xC99D, 0xC1F6, 0xC9C0,
07069     0xC1F7, 0xC9C1, 0xC1F8, 0xC9C4, 0xC1F9, 0xC9C7, 0xC1FA, 0xC9C8,
07070     0xC1FB, 0xC9CA, 0xC1FC, 0xC9D0, 0xC1FD, 0xC9D1, 0xC1FE, 0xC9D3,
07071     0xC241, 0xD5CA, 0xC242, 0xD5CB, 0xC243, 0xD5CD, 0xC244, 0xD5CE,
07072     0xC245, 0xD5CF, 0xC246, 0xD5D1, 0xC247, 0xD5D3, 0xC248, 0xD5D4,
07073     0xC249, 0xD5D5, 0xC24A, 0xD5D6, 0xC24B, 0xD5D7, 0xC24C, 0xD5DA,
07074     0xC24D, 0xD5DC, 0xC24E, 0xD5DE, 0xC24F, 0xD5DF, 0xC250, 0xD5E0,
07075     0xC251, 0xD5E1, 0xC252, 0xD5E2, 0xC253, 0xD5E3, 0xC254, 0xD5E6,
07076     0xC255, 0xD5E7, 0xC256, 0xD5E9, 0xC257, 0xD5EA, 0xC258, 0xD5EB,
07077     0xC259, 0xD5ED, 0xC25A, 0xD5EE, 0xC261, 0xD5EF, 0xC262, 0xD5F0,
07078     0xC263, 0xD5F1, 0xC264, 0xD5F2, 0xC265, 0xD5F3, 0xC266, 0xD5F6,
07079     0xC267, 0xD5F8, 0xC268, 0xD5FA, 0xC269, 0xD5FB, 0xC26A, 0xD5FC,
07080     0xC26B, 0xD5FD, 0xC26C, 0xD5FE, 0xC26D, 0xD5FF, 0xC26E, 0xD602,
07081     0xC26F, 0xD603, 0xC270, 0xD605, 0xC271, 0xD606, 0xC272, 0xD607,
07082     0xC273, 0xD609, 0xC274, 0xD60A, 0xC275, 0xD60B, 0xC276, 0xD60C,
07083     0xC277, 0xD60D, 0xC278, 0xD60E, 0xC279, 0xD60F, 0xC27A, 0xD612,
07084     0xC281, 0xD616, 0xC282, 0xD617, 0xC283, 0xD618, 0xC284, 0xD619,
07085     0xC285, 0xD61A, 0xC286, 0xD61B, 0xC287, 0xD61D, 0xC288, 0xD61E,
07086     0xC289, 0xD61F, 0xC28A, 0xD621, 0xC28B, 0xD622, 0xC28C, 0xD623,
07087     0xC28D, 0xD625, 0xC28E, 0xD626, 0xC28F, 0xD627, 0xC290, 0xD628,
07088     0xC291, 0xD629, 0xC292, 0xD62A, 0xC293, 0xD62B, 0xC294, 0xD62C,
07089     0xC295, 0xD62E, 0xC296, 0xD62F, 0xC297, 0xD630, 0xC298, 0xD631,
07090     0xC299, 0xD632, 0xC29A, 0xD633, 0xC29B, 0xD634, 0xC29C, 0xD635,
07091     0xC29D, 0xD636, 0xC29E, 0xD637, 0xC29F, 0xD63A, 0xC2A0, 0xD63B,
07092     0xC2A1, 0xC9D5, 0xC2A2, 0xC9D6, 0xC2A3, 0xC9D9, 0xC2A4, 0xC9DA,
07093     0xC2A5, 0xC9DC, 0xC2A6, 0xC9DD, 0xC2A7, 0xC9E0, 0xC2A8, 0xC9E2,
07094     0xC2A9, 0xC9E4, 0xC2AA, 0xC9E7, 0xC2AB, 0xC9EC, 0xC2AC, 0xC9ED,
07095     0xC2AD, 0xC9EF, 0xC2AE, 0xC9F0, 0xC2AF, 0xC9F1, 0xC2B0, 0xC9F8,
07096     0xC2B1, 0xC9F9, 0xC2B2, 0xC9FC, 0xC2B3, 0xCA00, 0xC2B4, 0xCA08,
07097     0xC2B5, 0xCA09, 0xC2B6, 0xCA0B, 0xC2B7, 0xCA0C, 0xC2B8, 0xCA0D,
07098     0xC2B9, 0xCA14, 0xC2BA, 0xCA18, 0xC2BB, 0xCA29, 0xC2BC, 0xCA4C,
07099     0xC2BD, 0xCA4D, 0xC2BE, 0xCA50, 0xC2BF, 0xCA54, 0xC2C0, 0xCA5C,
07100     0xC2C1, 0xCA5D, 0xC2C2, 0xCA5F, 0xC2C3, 0xCA60, 0xC2C4, 0xCA61,
07101     0xC2C5, 0xCA68, 0xC2C6, 0xCA7D, 0xC2C7, 0xCA84, 0xC2C8, 0xCA98,
07102     0xC2C9, 0xCABC, 0xC2CA, 0xCABD, 0xC2CB, 0xCAC0, 0xC2CC, 0xCAC4,
07103     0xC2CD, 0xCACC, 0xC2CE, 0xCACD, 0xC2CF, 0xCACF, 0xC2D0, 0xCAD1,
07104     0xC2D1, 0xCAD3, 0xC2D2, 0xCAD8, 0xC2D3, 0xCAD9, 0xC2D4, 0xCAE0,
07105     0xC2D5, 0xCAEC, 0xC2D6, 0xCAF4, 0xC2D7, 0xCB08, 0xC2D8, 0xCB10,
07106     0xC2D9, 0xCB14, 0xC2DA, 0xCB18, 0xC2DB, 0xCB20, 0xC2DC, 0xCB21,
07107     0xC2DD, 0xCB41, 0xC2DE, 0xCB48, 0xC2DF, 0xCB49, 0xC2E0, 0xCB4C,
07108     0xC2E1, 0xCB50, 0xC2E2, 0xCB58, 0xC2E3, 0xCB59, 0xC2E4, 0xCB5D,
07109     0xC2E5, 0xCB64, 0xC2E6, 0xCB78, 0xC2E7, 0xCB79, 0xC2E8, 0xCB9C,
07110     0xC2E9, 0xCBB8, 0xC2EA, 0xCBD4, 0xC2EB, 0xCBE4, 0xC2EC, 0xCBE7,
07111     0xC2ED, 0xCBE9, 0xC2EE, 0xCC0C, 0xC2EF, 0xCC0D, 0xC2F0, 0xCC10,
07112     0xC2F1, 0xCC14, 0xC2F2, 0xCC1C, 0xC2F3, 0xCC1D, 0xC2F4, 0xCC21,
07113     0xC2F5, 0xCC22, 0xC2F6, 0xCC27, 0xC2F7, 0xCC28, 0xC2F8, 0xCC29,
07114     0xC2F9, 0xCC2C, 0xC2FA, 0xCC2E, 0xC2FB, 0xCC30, 0xC2FC, 0xCC38,
07115     0xC2FD, 0xCC39, 0xC2FE, 0xCC3B, 0xC341, 0xD63D, 0xC342, 0xD63E,
07116     0xC343, 0xD63F, 0xC344, 0xD641, 0xC345, 0xD642, 0xC346, 0xD643,
07117     0xC347, 0xD644, 0xC348, 0xD646, 0xC349, 0xD647, 0xC34A, 0xD64A,
07118     0xC34B, 0xD64C, 0xC34C, 0xD64E, 0xC34D, 0xD64F, 0xC34E, 0xD650,
07119     0xC34F, 0xD652, 0xC350, 0xD653, 0xC351, 0xD656, 0xC352, 0xD657,
07120     0xC353, 0xD659, 0xC354, 0xD65A, 0xC355, 0xD65B, 0xC356, 0xD65D,
07121     0xC357, 0xD65E, 0xC358, 0xD65F, 0xC359, 0xD660, 0xC35A, 0xD661,
07122     0xC361, 0xD662, 0xC362, 0xD663, 0xC363, 0xD664, 0xC364, 0xD665,
07123     0xC365, 0xD666, 0xC366, 0xD668, 0xC367, 0xD66A, 0xC368, 0xD66B,
07124     0xC369, 0xD66C, 0xC36A, 0xD66D, 0xC36B, 0xD66E, 0xC36C, 0xD66F,
07125     0xC36D, 0xD672, 0xC36E, 0xD673, 0xC36F, 0xD675, 0xC370, 0xD676,
07126     0xC371, 0xD677, 0xC372, 0xD678, 0xC373, 0xD679, 0xC374, 0xD67A,
07127     0xC375, 0xD67B, 0xC376, 0xD67C, 0xC377, 0xD67D, 0xC378, 0xD67E,
07128     0xC379, 0xD67F, 0xC37A, 0xD680, 0xC381, 0xD681, 0xC382, 0xD682,
07129     0xC383, 0xD684, 0xC384, 0xD686, 0xC385, 0xD687, 0xC386, 0xD688,
07130     0xC387, 0xD689, 0xC388, 0xD68A, 0xC389, 0xD68B, 0xC38A, 0xD68E,
07131     0xC38B, 0xD68F, 0xC38C, 0xD691, 0xC38D, 0xD692, 0xC38E, 0xD693,
07132     0xC38F, 0xD695, 0xC390, 0xD696, 0xC391, 0xD697, 0xC392, 0xD698,
07133     0xC393, 0xD699, 0xC394, 0xD69A, 0xC395, 0xD69B, 0xC396, 0xD69C,
07134     0xC397, 0xD69E, 0xC398, 0xD6A0, 0xC399, 0xD6A2, 0xC39A, 0xD6A3,
07135     0xC39B, 0xD6A4, 0xC39C, 0xD6A5, 0xC39D, 0xD6A6, 0xC39E, 0xD6A7,
07136     0xC39F, 0xD6A9, 0xC3A0, 0xD6AA, 0xC3A1, 0xCC3C, 0xC3A2, 0xCC3D,
07137     0xC3A3, 0xCC3E, 0xC3A4, 0xCC44, 0xC3A5, 0xCC45, 0xC3A6, 0xCC48,
07138     0xC3A7, 0xCC4C, 0xC3A8, 0xCC54, 0xC3A9, 0xCC55, 0xC3AA, 0xCC57,
07139     0xC3AB, 0xCC58, 0xC3AC, 0xCC59, 0xC3AD, 0xCC60, 0xC3AE, 0xCC64,
07140     0xC3AF, 0xCC66, 0xC3B0, 0xCC68, 0xC3B1, 0xCC70, 0xC3B2, 0xCC75,
07141     0xC3B3, 0xCC98, 0xC3B4, 0xCC99, 0xC3B5, 0xCC9C, 0xC3B6, 0xCCA0,
07142     0xC3B7, 0xCCA8, 0xC3B8, 0xCCA9, 0xC3B9, 0xCCAB, 0xC3BA, 0xCCAC,
07143     0xC3BB, 0xCCAD, 0xC3BC, 0xCCB4, 0xC3BD, 0xCCB5, 0xC3BE, 0xCCB8,
07144     0xC3BF, 0xCCBC, 0xC3C0, 0xCCC4, 0xC3C1, 0xCCC5, 0xC3C2, 0xCCC7,
07145     0xC3C3, 0xCCC9, 0xC3C4, 0xCCD0, 0xC3C5, 0xCCD4, 0xC3C6, 0xCCE4,
07146     0xC3C7, 0xCCEC, 0xC3C8, 0xCCF0, 0xC3C9, 0xCD01, 0xC3CA, 0xCD08,
07147     0xC3CB, 0xCD09, 0xC3CC, 0xCD0C, 0xC3CD, 0xCD10, 0xC3CE, 0xCD18,
07148     0xC3CF, 0xCD19, 0xC3D0, 0xCD1B, 0xC3D1, 0xCD1D, 0xC3D2, 0xCD24,
07149     0xC3D3, 0xCD28, 0xC3D4, 0xCD2C, 0xC3D5, 0xCD39, 0xC3D6, 0xCD5C,
07150     0xC3D7, 0xCD60, 0xC3D8, 0xCD64, 0xC3D9, 0xCD6C, 0xC3DA, 0xCD6D,
07151     0xC3DB, 0xCD6F, 0xC3DC, 0xCD71, 0xC3DD, 0xCD78, 0xC3DE, 0xCD88,
07152     0xC3DF, 0xCD94, 0xC3E0, 0xCD95, 0xC3E1, 0xCD98, 0xC3E2, 0xCD9C,
07153     0xC3E3, 0xCDA4, 0xC3E4, 0xCDA5, 0xC3E5, 0xCDA7, 0xC3E6, 0xCDA9,
07154     0xC3E7, 0xCDB0, 0xC3E8, 0xCDC4, 0xC3E9, 0xCDCC, 0xC3EA, 0xCDD0,
07155     0xC3EB, 0xCDE8, 0xC3EC, 0xCDEC, 0xC3ED, 0xCDF0, 0xC3EE, 0xCDF8,
07156     0xC3EF, 0xCDF9, 0xC3F0, 0xCDFB, 0xC3F1, 0xCDFD, 0xC3F2, 0xCE04,
07157     0xC3F3, 0xCE08, 0xC3F4, 0xCE0C, 0xC3F5, 0xCE14, 0xC3F6, 0xCE19,
07158     0xC3F7, 0xCE20, 0xC3F8, 0xCE21, 0xC3F9, 0xCE24, 0xC3FA, 0xCE28,
07159     0xC3FB, 0xCE30, 0xC3FC, 0xCE31, 0xC3FD, 0xCE33, 0xC3FE, 0xCE35,
07160     0xC441, 0xD6AB, 0xC442, 0xD6AD, 0xC443, 0xD6AE, 0xC444, 0xD6AF,
07161     0xC445, 0xD6B1, 0xC446, 0xD6B2, 0xC447, 0xD6B3, 0xC448, 0xD6B4,
07162     0xC449, 0xD6B5, 0xC44A, 0xD6B6, 0xC44B, 0xD6B7, 0xC44C, 0xD6B8,
07163     0xC44D, 0xD6BA, 0xC44E, 0xD6BC, 0xC44F, 0xD6BD, 0xC450, 0xD6BE,
07164     0xC451, 0xD6BF, 0xC452, 0xD6C0, 0xC453, 0xD6C1, 0xC454, 0xD6C2,
07165     0xC455, 0xD6C3, 0xC456, 0xD6C6, 0xC457, 0xD6C7, 0xC458, 0xD6C9,
07166     0xC459, 0xD6CA, 0xC45A, 0xD6CB, 0xC461, 0xD6CD, 0xC462, 0xD6CE,
07167     0xC463, 0xD6CF, 0xC464, 0xD6D0, 0xC465, 0xD6D2, 0xC466, 0xD6D3,
07168     0xC467, 0xD6D5, 0xC468, 0xD6D6, 0xC469, 0xD6D8, 0xC46A, 0xD6DA,
07169     0xC46B, 0xD6DB, 0xC46C, 0xD6DC, 0xC46D, 0xD6DD, 0xC46E, 0xD6DE,
07170     0xC46F, 0xD6DF, 0xC470, 0xD6E1, 0xC471, 0xD6E2, 0xC472, 0xD6E3,
07171     0xC473, 0xD6E5, 0xC474, 0xD6E6, 0xC475, 0xD6E7, 0xC476, 0xD6E9,
07172     0xC477, 0xD6EA, 0xC478, 0xD6EB, 0xC479, 0xD6EC, 0xC47A, 0xD6ED,
07173     0xC481, 0xD6EE, 0xC482, 0xD6EF, 0xC483, 0xD6F1, 0xC484, 0xD6F2,
07174     0xC485, 0xD6F3, 0xC486, 0xD6F4, 0xC487, 0xD6F6, 0xC488, 0xD6F7,
07175     0xC489, 0xD6F8, 0xC48A, 0xD6F9, 0xC48B, 0xD6FA, 0xC48C, 0xD6FB,
07176     0xC48D, 0xD6FE, 0xC48E, 0xD6FF, 0xC48F, 0xD701, 0xC490, 0xD702,
07177     0xC491, 0xD703, 0xC492, 0xD705, 0xC493, 0xD706, 0xC494, 0xD707,
07178     0xC495, 0xD708, 0xC496, 0xD709, 0xC497, 0xD70A, 0xC498, 0xD70B,
07179     0xC499, 0xD70C, 0xC49A, 0xD70D, 0xC49B, 0xD70E, 0xC49C, 0xD70F,
07180     0xC49D, 0xD710, 0xC49E, 0xD712, 0xC49F, 0xD713, 0xC4A0, 0xD714,
07181     0xC4A1, 0xCE58, 0xC4A2, 0xCE59, 0xC4A3, 0xCE5C, 0xC4A4, 0xCE5F,
07182     0xC4A5, 0xCE60, 0xC4A6, 0xCE61, 0xC4A7, 0xCE68, 0xC4A8, 0xCE69,
07183     0xC4A9, 0xCE6B, 0xC4AA, 0xCE6D, 0xC4AB, 0xCE74, 0xC4AC, 0xCE75,
07184     0xC4AD, 0xCE78, 0xC4AE, 0xCE7C, 0xC4AF, 0xCE84, 0xC4B0, 0xCE85,
07185     0xC4B1, 0xCE87, 0xC4B2, 0xCE89, 0xC4B3, 0xCE90, 0xC4B4, 0xCE91,
07186     0xC4B5, 0xCE94, 0xC4B6, 0xCE98, 0xC4B7, 0xCEA0, 0xC4B8, 0xCEA1,
07187     0xC4B9, 0xCEA3, 0xC4BA, 0xCEA4, 0xC4BB, 0xCEA5, 0xC4BC, 0xCEAC,
07188     0xC4BD, 0xCEAD, 0xC4BE, 0xCEC1, 0xC4BF, 0xCEE4, 0xC4C0, 0xCEE5,
07189     0xC4C1, 0xCEE8, 0xC4C2, 0xCEEB, 0xC4C3, 0xCEEC, 0xC4C4, 0xCEF4,
07190     0xC4C5, 0xCEF5, 0xC4C6, 0xCEF7, 0xC4C7, 0xCEF8, 0xC4C8, 0xCEF9,
07191     0xC4C9, 0xCF00, 0xC4CA, 0xCF01, 0xC4CB, 0xCF04, 0xC4CC, 0xCF08,
07192     0xC4CD, 0xCF10, 0xC4CE, 0xCF11, 0xC4CF, 0xCF13, 0xC4D0, 0xCF15,
07193     0xC4D1, 0xCF1C, 0xC4D2, 0xCF20, 0xC4D3, 0xCF24, 0xC4D4, 0xCF2C,
07194     0xC4D5, 0xCF2D, 0xC4D6, 0xCF2F, 0xC4D7, 0xCF30, 0xC4D8, 0xCF31,
07195     0xC4D9, 0xCF38, 0xC4DA, 0xCF54, 0xC4DB, 0xCF55, 0xC4DC, 0xCF58,
07196     0xC4DD, 0xCF5C, 0xC4DE, 0xCF64, 0xC4DF, 0xCF65, 0xC4E0, 0xCF67,
07197     0xC4E1, 0xCF69, 0xC4E2, 0xCF70, 0xC4E3, 0xCF71, 0xC4E4, 0xCF74,
07198     0xC4E5, 0xCF78, 0xC4E6, 0xCF80, 0xC4E7, 0xCF85, 0xC4E8, 0xCF8C,
07199     0xC4E9, 0xCFA1, 0xC4EA, 0xCFA8, 0xC4EB, 0xCFB0, 0xC4EC, 0xCFC4,
07200     0xC4ED, 0xCFE0, 0xC4EE, 0xCFE1, 0xC4EF, 0xCFE4, 0xC4F0, 0xCFE8,
07201     0xC4F1, 0xCFF0, 0xC4F2, 0xCFF1, 0xC4F3, 0xCFF3, 0xC4F4, 0xCFF5,
07202     0xC4F5, 0xCFFC, 0xC4F6, 0xD000, 0xC4F7, 0xD004, 0xC4F8, 0xD011,
07203     0xC4F9, 0xD018, 0xC4FA, 0xD02D, 0xC4FB, 0xD034, 0xC4FC, 0xD035,
07204     0xC4FD, 0xD038, 0xC4FE, 0xD03C, 0xC541, 0xD715, 0xC542, 0xD716,
07205     0xC543, 0xD717, 0xC544, 0xD71A, 0xC545, 0xD71B, 0xC546, 0xD71D,
07206     0xC547, 0xD71E, 0xC548, 0xD71F, 0xC549, 0xD721, 0xC54A, 0xD722,
07207     0xC54B, 0xD723, 0xC54C, 0xD724, 0xC54D, 0xD725, 0xC54E, 0xD726,
07208     0xC54F, 0xD727, 0xC550, 0xD72A, 0xC551, 0xD72C, 0xC552, 0xD72E,
07209     0xC553, 0xD72F, 0xC554, 0xD730, 0xC555, 0xD731, 0xC556, 0xD732,
07210     0xC557, 0xD733, 0xC558, 0xD736, 0xC559, 0xD737, 0xC55A, 0xD739,
07211     0xC561, 0xD73A, 0xC562, 0xD73B, 0xC563, 0xD73D, 0xC564, 0xD73E,
07212     0xC565, 0xD73F, 0xC566, 0xD740, 0xC567, 0xD741, 0xC568, 0xD742,
07213     0xC569, 0xD743, 0xC56A, 0xD745, 0xC56B, 0xD746, 0xC56C, 0xD748,
07214     0xC56D, 0xD74A, 0xC56E, 0xD74B, 0xC56F, 0xD74C, 0xC570, 0xD74D,
07215     0xC571, 0xD74E, 0xC572, 0xD74F, 0xC573, 0xD752, 0xC574, 0xD753,
07216     0xC575, 0xD755, 0xC576, 0xD75A, 0xC577, 0xD75B, 0xC578, 0xD75C,
07217     0xC579, 0xD75D, 0xC57A, 0xD75E, 0xC581, 0xD75F, 0xC582, 0xD762,
07218     0xC583, 0xD764, 0xC584, 0xD766, 0xC585, 0xD767, 0xC586, 0xD768,
07219     0xC587, 0xD76A, 0xC588, 0xD76B, 0xC589, 0xD76D, 0xC58A, 0xD76E,
07220     0xC58B, 0xD76F, 0xC58C, 0xD771, 0xC58D, 0xD772, 0xC58E, 0xD773,
07221     0xC58F, 0xD775, 0xC590, 0xD776, 0xC591, 0xD777, 0xC592, 0xD778,
07222     0xC593, 0xD779, 0xC594, 0xD77A, 0xC595, 0xD77B, 0xC596, 0xD77E,
07223     0xC597, 0xD77F, 0xC598, 0xD780, 0xC599, 0xD782, 0xC59A, 0xD783,
07224     0xC59B, 0xD784, 0xC59C, 0xD785, 0xC59D, 0xD786, 0xC59E, 0xD787,
07225     0xC59F, 0xD78A, 0xC5A0, 0xD78B, 0xC5A1, 0xD044, 0xC5A2, 0xD045,
07226     0xC5A3, 0xD047, 0xC5A4, 0xD049, 0xC5A5, 0xD050, 0xC5A6, 0xD054,
07227     0xC5A7, 0xD058, 0xC5A8, 0xD060, 0xC5A9, 0xD06C, 0xC5AA, 0xD06D,
07228     0xC5AB, 0xD070, 0xC5AC, 0xD074, 0xC5AD, 0xD07C, 0xC5AE, 0xD07D,
07229     0xC5AF, 0xD081, 0xC5B0, 0xD0A4, 0xC5B1, 0xD0A5, 0xC5B2, 0xD0A8,
07230     0xC5B3, 0xD0AC, 0xC5B4, 0xD0B4, 0xC5B5, 0xD0B5, 0xC5B6, 0xD0B7,
07231     0xC5B7, 0xD0B9, 0xC5B8, 0xD0C0, 0xC5B9, 0xD0C1, 0xC5BA, 0xD0C4,
07232     0xC5BB, 0xD0C8, 0xC5BC, 0xD0C9, 0xC5BD, 0xD0D0, 0xC5BE, 0xD0D1,
07233     0xC5BF, 0xD0D3, 0xC5C0, 0xD0D4, 0xC5C1, 0xD0D5, 0xC5C2, 0xD0DC,
07234     0xC5C3, 0xD0DD, 0xC5C4, 0xD0E0, 0xC5C5, 0xD0E4, 0xC5C6, 0xD0EC,
07235     0xC5C7, 0xD0ED, 0xC5C8, 0xD0EF, 0xC5C9, 0xD0F0, 0xC5CA, 0xD0F1,
07236     0xC5CB, 0xD0F8, 0xC5CC, 0xD10D, 0xC5CD, 0xD130, 0xC5CE, 0xD131,
07237     0xC5CF, 0xD134, 0xC5D0, 0xD138, 0xC5D1, 0xD13A, 0xC5D2, 0xD140,
07238     0xC5D3, 0xD141, 0xC5D4, 0xD143, 0xC5D5, 0xD144, 0xC5D6, 0xD145,
07239     0xC5D7, 0xD14C, 0xC5D8, 0xD14D, 0xC5D9, 0xD150, 0xC5DA, 0xD154,
07240     0xC5DB, 0xD15C, 0xC5DC, 0xD15D, 0xC5DD, 0xD15F, 0xC5DE, 0xD161,
07241     0xC5DF, 0xD168, 0xC5E0, 0xD16C, 0xC5E1, 0xD17C, 0xC5E2, 0xD184,
07242     0xC5E3, 0xD188, 0xC5E4, 0xD1A0, 0xC5E5, 0xD1A1, 0xC5E6, 0xD1A4,
07243     0xC5E7, 0xD1A8, 0xC5E8, 0xD1B0, 0xC5E9, 0xD1B1, 0xC5EA, 0xD1B3,
07244     0xC5EB, 0xD1B5, 0xC5EC, 0xD1BA, 0xC5ED, 0xD1BC, 0xC5EE, 0xD1C0,
07245     0xC5EF, 0xD1D8, 0xC5F0, 0xD1F4, 0xC5F1, 0xD1F8, 0xC5F2, 0xD207,
07246     0xC5F3, 0xD209, 0xC5F4, 0xD210, 0xC5F5, 0xD22C, 0xC5F6, 0xD22D,
07247     0xC5F7, 0xD230, 0xC5F8, 0xD234, 0xC5F9, 0xD23C, 0xC5FA, 0xD23D,
07248     0xC5FB, 0xD23F, 0xC5FC, 0xD241, 0xC5FD, 0xD248, 0xC5FE, 0xD25C,
07249     0xC641, 0xD78D, 0xC642, 0xD78E, 0xC643, 0xD78F, 0xC644, 0xD791,
07250     0xC645, 0xD792, 0xC646, 0xD793, 0xC647, 0xD794, 0xC648, 0xD795,
07251     0xC649, 0xD796, 0xC64A, 0xD797, 0xC64B, 0xD79A, 0xC64C, 0xD79C,
07252     0xC64D, 0xD79E, 0xC64E, 0xD79F, 0xC64F, 0xD7A0, 0xC650, 0xD7A1,
07253     0xC651, 0xD7A2, 0xC652, 0xD7A3, 0xC6A1, 0xD264, 0xC6A2, 0xD280,
07254     0xC6A3, 0xD281, 0xC6A4, 0xD284, 0xC6A5, 0xD288, 0xC6A6, 0xD290,
07255     0xC6A7, 0xD291, 0xC6A8, 0xD295, 0xC6A9, 0xD29C, 0xC6AA, 0xD2A0,
07256     0xC6AB, 0xD2A4, 0xC6AC, 0xD2AC, 0xC6AD, 0xD2B1, 0xC6AE, 0xD2B8,
07257     0xC6AF, 0xD2B9, 0xC6B0, 0xD2BC, 0xC6B1, 0xD2BF, 0xC6B2, 0xD2C0,
07258     0xC6B3, 0xD2C2, 0xC6B4, 0xD2C8, 0xC6B5, 0xD2C9, 0xC6B6, 0xD2CB,
07259     0xC6B7, 0xD2D4, 0xC6B8, 0xD2D8, 0xC6B9, 0xD2DC, 0xC6BA, 0xD2E4,
07260     0xC6BB, 0xD2E5, 0xC6BC, 0xD2F0, 0xC6BD, 0xD2F1, 0xC6BE, 0xD2F4,
07261     0xC6BF, 0xD2F8, 0xC6C0, 0xD300, 0xC6C1, 0xD301, 0xC6C2, 0xD303,
07262     0xC6C3, 0xD305, 0xC6C4, 0xD30C, 0xC6C5, 0xD30D, 0xC6C6, 0xD30E,
07263     0xC6C7, 0xD310, 0xC6C8, 0xD314, 0xC6C9, 0xD316, 0xC6CA, 0xD31C,
07264     0xC6CB, 0xD31D, 0xC6CC, 0xD31F, 0xC6CD, 0xD320, 0xC6CE, 0xD321,
07265     0xC6CF, 0xD325, 0xC6D0, 0xD328, 0xC6D1, 0xD329, 0xC6D2, 0xD32C,
07266     0xC6D3, 0xD330, 0xC6D4, 0xD338, 0xC6D5, 0xD339, 0xC6D6, 0xD33B,
07267     0xC6D7, 0xD33C, 0xC6D8, 0xD33D, 0xC6D9, 0xD344, 0xC6DA, 0xD345,
07268     0xC6DB, 0xD37C, 0xC6DC, 0xD37D, 0xC6DD, 0xD380, 0xC6DE, 0xD384,
07269     0xC6DF, 0xD38C, 0xC6E0, 0xD38D, 0xC6E1, 0xD38F, 0xC6E2, 0xD390,
07270     0xC6E3, 0xD391, 0xC6E4, 0xD398, 0xC6E5, 0xD399, 0xC6E6, 0xD39C,
07271     0xC6E7, 0xD3A0, 0xC6E8, 0xD3A8, 0xC6E9, 0xD3A9, 0xC6EA, 0xD3AB,
07272     0xC6EB, 0xD3AD, 0xC6EC, 0xD3B4, 0xC6ED, 0xD3B8, 0xC6EE, 0xD3BC,
07273     0xC6EF, 0xD3C4, 0xC6F0, 0xD3C5, 0xC6F1, 0xD3C8, 0xC6F2, 0xD3C9,
07274     0xC6F3, 0xD3D0, 0xC6F4, 0xD3D8, 0xC6F5, 0xD3E1, 0xC6F6, 0xD3E3,
07275     0xC6F7, 0xD3EC, 0xC6F8, 0xD3ED, 0xC6F9, 0xD3F0, 0xC6FA, 0xD3F4,
07276     0xC6FB, 0xD3FC, 0xC6FC, 0xD3FD, 0xC6FD, 0xD3FF, 0xC6FE, 0xD401,
07277     0xC7A1, 0xD408, 0xC7A2, 0xD41D, 0xC7A3, 0xD440, 0xC7A4, 0xD444,
07278     0xC7A5, 0xD45C, 0xC7A6, 0xD460, 0xC7A7, 0xD464, 0xC7A8, 0xD46D,
07279     0xC7A9, 0xD46F, 0xC7AA, 0xD478, 0xC7AB, 0xD479, 0xC7AC, 0xD47C,
07280     0xC7AD, 0xD47F, 0xC7AE, 0xD480, 0xC7AF, 0xD482, 0xC7B0, 0xD488,
07281     0xC7B1, 0xD489, 0xC7B2, 0xD48B, 0xC7B3, 0xD48D, 0xC7B4, 0xD494,
07282     0xC7B5, 0xD4A9, 0xC7B6, 0xD4CC, 0xC7B7, 0xD4D0, 0xC7B8, 0xD4D4,
07283     0xC7B9, 0xD4DC, 0xC7BA, 0xD4DF, 0xC7BB, 0xD4E8, 0xC7BC, 0xD4EC,
07284     0xC7BD, 0xD4F0, 0xC7BE, 0xD4F8, 0xC7BF, 0xD4FB, 0xC7C0, 0xD4FD,
07285     0xC7C1, 0xD504, 0xC7C2, 0xD508, 0xC7C3, 0xD50C, 0xC7C4, 0xD514,
07286     0xC7C5, 0xD515, 0xC7C6, 0xD517, 0xC7C7, 0xD53C, 0xC7C8, 0xD53D,
07287     0xC7C9, 0xD540, 0xC7CA, 0xD544, 0xC7CB, 0xD54C, 0xC7CC, 0xD54D,
07288     0xC7CD, 0xD54F, 0xC7CE, 0xD551, 0xC7CF, 0xD558, 0xC7D0, 0xD559,
07289     0xC7D1, 0xD55C, 0xC7D2, 0xD560, 0xC7D3, 0xD565, 0xC7D4, 0xD568,
07290     0xC7D5, 0xD569, 0xC7D6, 0xD56B, 0xC7D7, 0xD56D, 0xC7D8, 0xD574,
07291     0xC7D9, 0xD575, 0xC7DA, 0xD578, 0xC7DB, 0xD57C, 0xC7DC, 0xD584,
07292     0xC7DD, 0xD585, 0xC7DE, 0xD587, 0xC7DF, 0xD588, 0xC7E0, 0xD589,
07293     0xC7E1, 0xD590, 0xC7E2, 0xD5A5, 0xC7E3, 0xD5C8, 0xC7E4, 0xD5C9,
07294     0xC7E5, 0xD5CC, 0xC7E6, 0xD5D0, 0xC7E7, 0xD5D2, 0xC7E8, 0xD5D8,
07295     0xC7E9, 0xD5D9, 0xC7EA, 0xD5DB, 0xC7EB, 0xD5DD, 0xC7EC, 0xD5E4,
07296     0xC7ED, 0xD5E5, 0xC7EE, 0xD5E8, 0xC7EF, 0xD5EC, 0xC7F0, 0xD5F4,
07297     0xC7F1, 0xD5F5, 0xC7F2, 0xD5F7, 0xC7F3, 0xD5F9, 0xC7F4, 0xD600,
07298     0xC7F5, 0xD601, 0xC7F6, 0xD604, 0xC7F7, 0xD608, 0xC7F8, 0xD610,
07299     0xC7F9, 0xD611, 0xC7FA, 0xD613, 0xC7FB, 0xD614, 0xC7FC, 0xD615,
07300     0xC7FD, 0xD61C, 0xC7FE, 0xD620, 0xC8A1, 0xD624, 0xC8A2, 0xD62D,
07301     0xC8A3, 0xD638, 0xC8A4, 0xD639, 0xC8A5, 0xD63C, 0xC8A6, 0xD640,
07302     0xC8A7, 0xD645, 0xC8A8, 0xD648, 0xC8A9, 0xD649, 0xC8AA, 0xD64B,
07303     0xC8AB, 0xD64D, 0xC8AC, 0xD651, 0xC8AD, 0xD654, 0xC8AE, 0xD655,
07304     0xC8AF, 0xD658, 0xC8B0, 0xD65C, 0xC8B1, 0xD667, 0xC8B2, 0xD669,
07305     0xC8B3, 0xD670, 0xC8B4, 0xD671, 0xC8B5, 0xD674, 0xC8B6, 0xD683,
07306     0xC8B7, 0xD685, 0xC8B8, 0xD68C, 0xC8B9, 0xD68D, 0xC8BA, 0xD690,
07307     0xC8BB, 0xD694, 0xC8BC, 0xD69D, 0xC8BD, 0xD69F, 0xC8BE, 0xD6A1,
07308     0xC8BF, 0xD6A8, 0xC8C0, 0xD6AC, 0xC8C1, 0xD6B0, 0xC8C2, 0xD6B9,
07309     0xC8C3, 0xD6BB, 0xC8C4, 0xD6C4, 0xC8C5, 0xD6C5, 0xC8C6, 0xD6C8,
07310     0xC8C7, 0xD6CC, 0xC8C8, 0xD6D1, 0xC8C9, 0xD6D4, 0xC8CA, 0xD6D7,
07311     0xC8CB, 0xD6D9, 0xC8CC, 0xD6E0, 0xC8CD, 0xD6E4, 0xC8CE, 0xD6E8,
07312     0xC8CF, 0xD6F0, 0xC8D0, 0xD6F5, 0xC8D1, 0xD6FC, 0xC8D2, 0xD6FD,
07313     0xC8D3, 0xD700, 0xC8D4, 0xD704, 0xC8D5, 0xD711, 0xC8D6, 0xD718,
07314     0xC8D7, 0xD719, 0xC8D8, 0xD71C, 0xC8D9, 0xD720, 0xC8DA, 0xD728,
07315     0xC8DB, 0xD729, 0xC8DC, 0xD72B, 0xC8DD, 0xD72D, 0xC8DE, 0xD734,
07316     0xC8DF, 0xD735, 0xC8E0, 0xD738, 0xC8E1, 0xD73C, 0xC8E2, 0xD744,
07317     0xC8E3, 0xD747, 0xC8E4, 0xD749, 0xC8E5, 0xD750, 0xC8E6, 0xD751,
07318     0xC8E7, 0xD754, 0xC8E8, 0xD756, 0xC8E9, 0xD757, 0xC8EA, 0xD758,
07319     0xC8EB, 0xD759, 0xC8EC, 0xD760, 0xC8ED, 0xD761, 0xC8EE, 0xD763,
07320     0xC8EF, 0xD765, 0xC8F0, 0xD769, 0xC8F1, 0xD76C, 0xC8F2, 0xD770,
07321     0xC8F3, 0xD774, 0xC8F4, 0xD77C, 0xC8F5, 0xD77D, 0xC8F6, 0xD781,
07322     0xC8F7, 0xD788, 0xC8F8, 0xD789, 0xC8F9, 0xD78C, 0xC8FA, 0xD790,
07323     0xC8FB, 0xD798, 0xC8FC, 0xD799, 0xC8FD, 0xD79B, 0xC8FE, 0xD79D,
07324     0xCAA1, 0x4F3D, 0xCAA2, 0x4F73, 0xCAA3, 0x5047, 0xCAA4, 0x50F9,
07325     0xCAA5, 0x52A0, 0xCAA6, 0x53EF, 0xCAA7, 0x5475, 0xCAA8, 0x54E5,
07326     0xCAA9, 0x5609, 0xCAAA, 0x5AC1, 0xCAAB, 0x5BB6, 0xCAAC, 0x6687,
07327     0xCAAD, 0x67B6, 0xCAAE, 0x67B7, 0xCAAF, 0x67EF, 0xCAB0, 0x6B4C,
07328     0xCAB1, 0x73C2, 0xCAB2, 0x75C2, 0xCAB3, 0x7A3C, 0xCAB4, 0x82DB,
07329     0xCAB5, 0x8304, 0xCAB6, 0x8857, 0xCAB7, 0x8888, 0xCAB8, 0x8A36,
07330     0xCAB9, 0x8CC8, 0xCABA, 0x8DCF, 0xCABB, 0x8EFB, 0xCABC, 0x8FE6,
07331     0xCABD, 0x99D5, 0xCABE, 0x523B, 0xCABF, 0x5374, 0xCAC0, 0x5404,
07332     0xCAC1, 0x606A, 0xCAC2, 0x6164, 0xCAC3, 0x6BBC, 0xCAC4, 0x73CF,
07333     0xCAC5, 0x811A, 0xCAC6, 0x89BA, 0xCAC7, 0x89D2, 0xCAC8, 0x95A3,
07334     0xCAC9, 0x4F83, 0xCACA, 0x520A, 0xCACB, 0x58BE, 0xCACC, 0x5978,
07335     0xCACD, 0x59E6, 0xCACE, 0x5E72, 0xCACF, 0x5E79, 0xCAD0, 0x61C7,
07336     0xCAD1, 0x63C0, 0xCAD2, 0x6746, 0xCAD3, 0x67EC, 0xCAD4, 0x687F,
07337     0xCAD5, 0x6F97, 0xCAD6, 0x764E, 0xCAD7, 0x770B, 0xCAD8, 0x78F5,
07338     0xCAD9, 0x7A08, 0xCADA, 0x7AFF, 0xCADB, 0x7C21, 0xCADC, 0x809D,
07339     0xCADD, 0x826E, 0xCADE, 0x8271, 0xCADF, 0x8AEB, 0xCAE0, 0x9593,
07340     0xCAE1, 0x4E6B, 0xCAE2, 0x559D, 0xCAE3, 0x66F7, 0xCAE4, 0x6E34,
07341     0xCAE5, 0x78A3, 0xCAE6, 0x7AED, 0xCAE7, 0x845B, 0xCAE8, 0x8910,
07342     0xCAE9, 0x874E, 0xCAEA, 0x97A8, 0xCAEB, 0x52D8, 0xCAEC, 0x574E,
07343     0xCAED, 0x582A, 0xCAEE, 0x5D4C, 0xCAEF, 0x611F, 0xCAF0, 0x61BE,
07344     0xCAF1, 0x6221, 0xCAF2, 0x6562, 0xCAF3, 0x67D1, 0xCAF4, 0x6A44,
07345     0xCAF5, 0x6E1B, 0xCAF6, 0x7518, 0xCAF7, 0x75B3, 0xCAF8, 0x76E3,
07346     0xCAF9, 0x77B0, 0xCAFA, 0x7D3A, 0xCAFB, 0x90AF, 0xCAFC, 0x9451,
07347     0xCAFD, 0x9452, 0xCAFE, 0x9F95, 0xCBA1, 0x5323, 0xCBA2, 0x5CAC,
07348     0xCBA3, 0x7532, 0xCBA4, 0x80DB, 0xCBA5, 0x9240, 0xCBA6, 0x9598,
07349     0xCBA7, 0x525B, 0xCBA8, 0x5808, 0xCBA9, 0x59DC, 0xCBAA, 0x5CA1,
07350     0xCBAB, 0x5D17, 0xCBAC, 0x5EB7, 0xCBAD, 0x5F3A, 0xCBAE, 0x5F4A,
07351     0xCBAF, 0x6177, 0xCBB0, 0x6C5F, 0xCBB1, 0x757A, 0xCBB2, 0x7586,
07352     0xCBB3, 0x7CE0, 0xCBB4, 0x7D73, 0xCBB5, 0x7DB1, 0xCBB6, 0x7F8C,
07353     0xCBB7, 0x8154, 0xCBB8, 0x8221, 0xCBB9, 0x8591, 0xCBBA, 0x8941,
07354     0xCBBB, 0x8B1B, 0xCBBC, 0x92FC, 0xCBBD, 0x964D, 0xCBBE, 0x9C47,
07355     0xCBBF, 0x4ECB, 0xCBC0, 0x4EF7, 0xCBC1, 0x500B, 0xCBC2, 0x51F1,
07356     0xCBC3, 0x584F, 0xCBC4, 0x6137, 0xCBC5, 0x613E, 0xCBC6, 0x6168,
07357     0xCBC7, 0x6539, 0xCBC8, 0x69EA, 0xCBC9, 0x6F11, 0xCBCA, 0x75A5,
07358     0xCBCB, 0x7686, 0xCBCC, 0x76D6, 0xCBCD, 0x7B87, 0xCBCE, 0x82A5,
07359     0xCBCF, 0x84CB, 0xCBD0, 0xF900, 0xCBD1, 0x93A7, 0xCBD2, 0x958B,
07360     0xCBD3, 0x5580, 0xCBD4, 0x5BA2, 0xCBD5, 0x5751, 0xCBD6, 0xF901,
07361     0xCBD7, 0x7CB3, 0xCBD8, 0x7FB9, 0xCBD9, 0x91B5, 0xCBDA, 0x5028,
07362     0xCBDB, 0x53BB, 0xCBDC, 0x5C45, 0xCBDD, 0x5DE8, 0xCBDE, 0x62D2,
07363     0xCBDF, 0x636E, 0xCBE0, 0x64DA, 0xCBE1, 0x64E7, 0xCBE2, 0x6E20,
07364     0xCBE3, 0x70AC, 0xCBE4, 0x795B, 0xCBE5, 0x8DDD, 0xCBE6, 0x8E1E,
07365     0xCBE7, 0xF902, 0xCBE8, 0x907D, 0xCBE9, 0x9245, 0xCBEA, 0x92F8,
07366     0xCBEB, 0x4E7E, 0xCBEC, 0x4EF6, 0xCBED, 0x5065, 0xCBEE, 0x5DFE,
07367     0xCBEF, 0x5EFA, 0xCBF0, 0x6106, 0xCBF1, 0x6957, 0xCBF2, 0x8171,
07368     0xCBF3, 0x8654, 0xCBF4, 0x8E47, 0xCBF5, 0x9375, 0xCBF6, 0x9A2B,
07369     0xCBF7, 0x4E5E, 0xCBF8, 0x5091, 0xCBF9, 0x6770, 0xCBFA, 0x6840,
07370     0xCBFB, 0x5109, 0xCBFC, 0x528D, 0xCBFD, 0x5292, 0xCBFE, 0x6AA2,
07371     0xCCA1, 0x77BC, 0xCCA2, 0x9210, 0xCCA3, 0x9ED4, 0xCCA4, 0x52AB,
07372     0xCCA5, 0x602F, 0xCCA6, 0x8FF2, 0xCCA7, 0x5048, 0xCCA8, 0x61A9,
07373     0xCCA9, 0x63ED, 0xCCAA, 0x64CA, 0xCCAB, 0x683C, 0xCCAC, 0x6A84,
07374     0xCCAD, 0x6FC0, 0xCCAE, 0x8188, 0xCCAF, 0x89A1, 0xCCB0, 0x9694,
07375     0xCCB1, 0x5805, 0xCCB2, 0x727D, 0xCCB3, 0x72AC, 0xCCB4, 0x7504,
07376     0xCCB5, 0x7D79, 0xCCB6, 0x7E6D, 0xCCB7, 0x80A9, 0xCCB8, 0x898B,
07377     0xCCB9, 0x8B74, 0xCCBA, 0x9063, 0xCCBB, 0x9D51, 0xCCBC, 0x6289,
07378     0xCCBD, 0x6C7A, 0xCCBE, 0x6F54, 0xCCBF, 0x7D50, 0xCCC0, 0x7F3A,
07379     0xCCC1, 0x8A23, 0xCCC2, 0x517C, 0xCCC3, 0x614A, 0xCCC4, 0x7B9D,
07380     0xCCC5, 0x8B19, 0xCCC6, 0x9257, 0xCCC7, 0x938C, 0xCCC8, 0x4EAC,
07381     0xCCC9, 0x4FD3, 0xCCCA, 0x501E, 0xCCCB, 0x50BE, 0xCCCC, 0x5106,
07382     0xCCCD, 0x52C1, 0xCCCE, 0x52CD, 0xCCCF, 0x537F, 0xCCD0, 0x5770,
07383     0xCCD1, 0x5883, 0xCCD2, 0x5E9A, 0xCCD3, 0x5F91, 0xCCD4, 0x6176,
07384     0xCCD5, 0x61AC, 0xCCD6, 0x64CE, 0xCCD7, 0x656C, 0xCCD8, 0x666F,
07385     0xCCD9, 0x66BB, 0xCCDA, 0x66F4, 0xCCDB, 0x6897, 0xCCDC, 0x6D87,
07386     0xCCDD, 0x7085, 0xCCDE, 0x70F1, 0xCCDF, 0x749F, 0xCCE0, 0x74A5,
07387     0xCCE1, 0x74CA, 0xCCE2, 0x75D9, 0xCCE3, 0x786C, 0xCCE4, 0x78EC,
07388     0xCCE5, 0x7ADF, 0xCCE6, 0x7AF6, 0xCCE7, 0x7D45, 0xCCE8, 0x7D93,
07389     0xCCE9, 0x8015, 0xCCEA, 0x803F, 0xCCEB, 0x811B, 0xCCEC, 0x8396,
07390     0xCCED, 0x8B66, 0xCCEE, 0x8F15, 0xCCEF, 0x9015, 0xCCF0, 0x93E1,
07391     0xCCF1, 0x9803, 0xCCF2, 0x9838, 0xCCF3, 0x9A5A, 0xCCF4, 0x9BE8,
07392     0xCCF5, 0x4FC2, 0xCCF6, 0x5553, 0xCCF7, 0x583A, 0xCCF8, 0x5951,
07393     0xCCF9, 0x5B63, 0xCCFA, 0x5C46, 0xCCFB, 0x60B8, 0xCCFC, 0x6212,
07394     0xCCFD, 0x6842, 0xCCFE, 0x68B0, 0xCDA1, 0x68E8, 0xCDA2, 0x6EAA,
07395     0xCDA3, 0x754C, 0xCDA4, 0x7678, 0xCDA5, 0x78CE, 0xCDA6, 0x7A3D,
07396     0xCDA7, 0x7CFB, 0xCDA8, 0x7E6B, 0xCDA9, 0x7E7C, 0xCDAA, 0x8A08,
07397     0xCDAB, 0x8AA1, 0xCDAC, 0x8C3F, 0xCDAD, 0x968E, 0xCDAE, 0x9DC4,
07398     0xCDAF, 0x53E4, 0xCDB0, 0x53E9, 0xCDB1, 0x544A, 0xCDB2, 0x5471,
07399     0xCDB3, 0x56FA, 0xCDB4, 0x59D1, 0xCDB5, 0x5B64, 0xCDB6, 0x5C3B,
07400     0xCDB7, 0x5EAB, 0xCDB8, 0x62F7, 0xCDB9, 0x6537, 0xCDBA, 0x6545,
07401     0xCDBB, 0x6572, 0xCDBC, 0x66A0, 0xCDBD, 0x67AF, 0xCDBE, 0x69C1,
07402     0xCDBF, 0x6CBD, 0xCDC0, 0x75FC, 0xCDC1, 0x7690, 0xCDC2, 0x777E,
07403     0xCDC3, 0x7A3F, 0xCDC4, 0x7F94, 0xCDC5, 0x8003, 0xCDC6, 0x80A1,
07404     0xCDC7, 0x818F, 0xCDC8, 0x82E6, 0xCDC9, 0x82FD, 0xCDCA, 0x83F0,
07405     0xCDCB, 0x85C1, 0xCDCC, 0x8831, 0xCDCD, 0x88B4, 0xCDCE, 0x8AA5,
07406     0xCDCF, 0xF903, 0xCDD0, 0x8F9C, 0xCDD1, 0x932E, 0xCDD2, 0x96C7,
07407     0xCDD3, 0x9867, 0xCDD4, 0x9AD8, 0xCDD5, 0x9F13, 0xCDD6, 0x54ED,
07408     0xCDD7, 0x659B, 0xCDD8, 0x66F2, 0xCDD9, 0x688F, 0xCDDA, 0x7A40,
07409     0xCDDB, 0x8C37, 0xCDDC, 0x9D60, 0xCDDD, 0x56F0, 0xCDDE, 0x5764,
07410     0xCDDF, 0x5D11, 0xCDE0, 0x6606, 0xCDE1, 0x68B1, 0xCDE2, 0x68CD,
07411     0xCDE3, 0x6EFE, 0xCDE4, 0x7428, 0xCDE5, 0x889E, 0xCDE6, 0x9BE4,
07412     0xCDE7, 0x6C68, 0xCDE8, 0xF904, 0xCDE9, 0x9AA8, 0xCDEA, 0x4F9B,
07413     0xCDEB, 0x516C, 0xCDEC, 0x5171, 0xCDED, 0x529F, 0xCDEE, 0x5B54,
07414     0xCDEF, 0x5DE5, 0xCDF0, 0x6050, 0xCDF1, 0x606D, 0xCDF2, 0x62F1,
07415     0xCDF3, 0x63A7, 0xCDF4, 0x653B, 0xCDF5, 0x73D9, 0xCDF6, 0x7A7A,
07416     0xCDF7, 0x86A3, 0xCDF8, 0x8CA2, 0xCDF9, 0x978F, 0xCDFA, 0x4E32,
07417     0xCDFB, 0x5BE1, 0xCDFC, 0x6208, 0xCDFD, 0x679C, 0xCDFE, 0x74DC,
07418     0xCEA1, 0x79D1, 0xCEA2, 0x83D3, 0xCEA3, 0x8A87, 0xCEA4, 0x8AB2,
07419     0xCEA5, 0x8DE8, 0xCEA6, 0x904E, 0xCEA7, 0x934B, 0xCEA8, 0x9846,
07420     0xCEA9, 0x5ED3, 0xCEAA, 0x69E8, 0xCEAB, 0x85FF, 0xCEAC, 0x90ED,
07421     0xCEAD, 0xF905, 0xCEAE, 0x51A0, 0xCEAF, 0x5B98, 0xCEB0, 0x5BEC,
07422     0xCEB1, 0x6163, 0xCEB2, 0x68FA, 0xCEB3, 0x6B3E, 0xCEB4, 0x704C,
07423     0xCEB5, 0x742F, 0xCEB6, 0x74D8, 0xCEB7, 0x7BA1, 0xCEB8, 0x7F50,
07424     0xCEB9, 0x83C5, 0xCEBA, 0x89C0, 0xCEBB, 0x8CAB, 0xCEBC, 0x95DC,
07425     0xCEBD, 0x9928, 0xCEBE, 0x522E, 0xCEBF, 0x605D, 0xCEC0, 0x62EC,
07426     0xCEC1, 0x9002, 0xCEC2, 0x4F8A, 0xCEC3, 0x5149, 0xCEC4, 0x5321,
07427     0xCEC5, 0x58D9, 0xCEC6, 0x5EE3, 0xCEC7, 0x66E0, 0xCEC8, 0x6D38,
07428     0xCEC9, 0x709A, 0xCECA, 0x72C2, 0xCECB, 0x73D6, 0xCECC, 0x7B50,
07429     0xCECD, 0x80F1, 0xCECE, 0x945B, 0xCECF, 0x5366, 0xCED0, 0x639B,
07430     0xCED1, 0x7F6B, 0xCED2, 0x4E56, 0xCED3, 0x5080, 0xCED4, 0x584A,
07431     0xCED5, 0x58DE, 0xCED6, 0x602A, 0xCED7, 0x6127, 0xCED8, 0x62D0,
07432     0xCED9, 0x69D0, 0xCEDA, 0x9B41, 0xCEDB, 0x5B8F, 0xCEDC, 0x7D18,
07433     0xCEDD, 0x80B1, 0xCEDE, 0x8F5F, 0xCEDF, 0x4EA4, 0xCEE0, 0x50D1,
07434     0xCEE1, 0x54AC, 0xCEE2, 0x55AC, 0xCEE3, 0x5B0C, 0xCEE4, 0x5DA0,
07435     0xCEE5, 0x5DE7, 0xCEE6, 0x652A, 0xCEE7, 0x654E, 0xCEE8, 0x6821,
07436     0xCEE9, 0x6A4B, 0xCEEA, 0x72E1, 0xCEEB, 0x768E, 0xCEEC, 0x77EF,
07437     0xCEED, 0x7D5E, 0xCEEE, 0x7FF9, 0xCEEF, 0x81A0, 0xCEF0, 0x854E,
07438     0xCEF1, 0x86DF, 0xCEF2, 0x8F03, 0xCEF3, 0x8F4E, 0xCEF4, 0x90CA,
07439     0xCEF5, 0x9903, 0xCEF6, 0x9A55, 0xCEF7, 0x9BAB, 0xCEF8, 0x4E18,
07440     0xCEF9, 0x4E45, 0xCEFA, 0x4E5D, 0xCEFB, 0x4EC7, 0xCEFC, 0x4FF1,
07441     0xCEFD, 0x5177, 0xCEFE, 0x52FE, 0xCFA1, 0x5340, 0xCFA2, 0x53E3,
07442     0xCFA3, 0x53E5, 0xCFA4, 0x548E, 0xCFA5, 0x5614, 0xCFA6, 0x5775,
07443     0xCFA7, 0x57A2, 0xCFA8, 0x5BC7, 0xCFA9, 0x5D87, 0xCFAA, 0x5ED0,
07444     0xCFAB, 0x61FC, 0xCFAC, 0x62D8, 0xCFAD, 0x6551, 0xCFAE, 0x67B8,
07445     0xCFAF, 0x67E9, 0xCFB0, 0x69CB, 0xCFB1, 0x6B50, 0xCFB2, 0x6BC6,
07446     0xCFB3, 0x6BEC, 0xCFB4, 0x6C42, 0xCFB5, 0x6E9D, 0xCFB6, 0x7078,
07447     0xCFB7, 0x72D7, 0xCFB8, 0x7396, 0xCFB9, 0x7403, 0xCFBA, 0x77BF,
07448     0xCFBB, 0x77E9, 0xCFBC, 0x7A76, 0xCFBD, 0x7D7F, 0xCFBE, 0x8009,
07449     0xCFBF, 0x81FC, 0xCFC0, 0x8205, 0xCFC1, 0x820A, 0xCFC2, 0x82DF,
07450     0xCFC3, 0x8862, 0xCFC4, 0x8B33, 0xCFC5, 0x8CFC, 0xCFC6, 0x8EC0,
07451     0xCFC7, 0x9011, 0xCFC8, 0x90B1, 0xCFC9, 0x9264, 0xCFCA, 0x92B6,
07452     0xCFCB, 0x99D2, 0xCFCC, 0x9A45, 0xCFCD, 0x9CE9, 0xCFCE, 0x9DD7,
07453     0xCFCF, 0x9F9C, 0xCFD0, 0x570B, 0xCFD1, 0x5C40, 0xCFD2, 0x83CA,
07454     0xCFD3, 0x97A0, 0xCFD4, 0x97AB, 0xCFD5, 0x9EB4, 0xCFD6, 0x541B,
07455     0xCFD7, 0x7A98, 0xCFD8, 0x7FA4, 0xCFD9, 0x88D9, 0xCFDA, 0x8ECD,
07456     0xCFDB, 0x90E1, 0xCFDC, 0x5800, 0xCFDD, 0x5C48, 0xCFDE, 0x6398,
07457     0xCFDF, 0x7A9F, 0xCFE0, 0x5BAE, 0xCFE1, 0x5F13, 0xCFE2, 0x7A79,
07458     0xCFE3, 0x7AAE, 0xCFE4, 0x828E, 0xCFE5, 0x8EAC, 0xCFE6, 0x5026,
07459     0xCFE7, 0x5238, 0xCFE8, 0x52F8, 0xCFE9, 0x5377, 0xCFEA, 0x5708,
07460     0xCFEB, 0x62F3, 0xCFEC, 0x6372, 0xCFED, 0x6B0A, 0xCFEE, 0x6DC3,
07461     0xCFEF, 0x7737, 0xCFF0, 0x53A5, 0xCFF1, 0x7357, 0xCFF2, 0x8568,
07462     0xCFF3, 0x8E76, 0xCFF4, 0x95D5, 0xCFF5, 0x673A, 0xCFF6, 0x6AC3,
07463     0xCFF7, 0x6F70, 0xCFF8, 0x8A6D, 0xCFF9, 0x8ECC, 0xCFFA, 0x994B,
07464     0xCFFB, 0xF906, 0xCFFC, 0x6677, 0xCFFD, 0x6B78, 0xCFFE, 0x8CB4,
07465     0xD0A1, 0x9B3C, 0xD0A2, 0xF907, 0xD0A3, 0x53EB, 0xD0A4, 0x572D,
07466     0xD0A5, 0x594E, 0xD0A6, 0x63C6, 0xD0A7, 0x69FB, 0xD0A8, 0x73EA,
07467     0xD0A9, 0x7845, 0xD0AA, 0x7ABA, 0xD0AB, 0x7AC5, 0xD0AC, 0x7CFE,
07468     0xD0AD, 0x8475, 0xD0AE, 0x898F, 0xD0AF, 0x8D73, 0xD0B0, 0x9035,
07469     0xD0B1, 0x95A8, 0xD0B2, 0x52FB, 0xD0B3, 0x5747, 0xD0B4, 0x7547,
07470     0xD0B5, 0x7B60, 0xD0B6, 0x83CC, 0xD0B7, 0x921E, 0xD0B8, 0xF908,
07471     0xD0B9, 0x6A58, 0xD0BA, 0x514B, 0xD0BB, 0x524B, 0xD0BC, 0x5287,
07472     0xD0BD, 0x621F, 0xD0BE, 0x68D8, 0xD0BF, 0x6975, 0xD0C0, 0x9699,
07473     0xD0C1, 0x50C5, 0xD0C2, 0x52A4, 0xD0C3, 0x52E4, 0xD0C4, 0x61C3,
07474     0xD0C5, 0x65A4, 0xD0C6, 0x6839, 0xD0C7, 0x69FF, 0xD0C8, 0x747E,
07475     0xD0C9, 0x7B4B, 0xD0CA, 0x82B9, 0xD0CB, 0x83EB, 0xD0CC, 0x89B2,
07476     0xD0CD, 0x8B39, 0xD0CE, 0x8FD1, 0xD0CF, 0x9949, 0xD0D0, 0xF909,
07477     0xD0D1, 0x4ECA, 0xD0D2, 0x5997, 0xD0D3, 0x64D2, 0xD0D4, 0x6611,
07478     0xD0D5, 0x6A8E, 0xD0D6, 0x7434, 0xD0D7, 0x7981, 0xD0D8, 0x79BD,
07479     0xD0D9, 0x82A9, 0xD0DA, 0x887E, 0xD0DB, 0x887F, 0xD0DC, 0x895F,
07480     0xD0DD, 0xF90A, 0xD0DE, 0x9326, 0xD0DF, 0x4F0B, 0xD0E0, 0x53CA,
07481     0xD0E1, 0x6025, 0xD0E2, 0x6271, 0xD0E3, 0x6C72, 0xD0E4, 0x7D1A,
07482     0xD0E5, 0x7D66, 0xD0E6, 0x4E98, 0xD0E7, 0x5162, 0xD0E8, 0x77DC,
07483     0xD0E9, 0x80AF, 0xD0EA, 0x4F01, 0xD0EB, 0x4F0E, 0xD0EC, 0x5176,
07484     0xD0ED, 0x5180, 0xD0EE, 0x55DC, 0xD0EF, 0x5668, 0xD0F0, 0x573B,
07485     0xD0F1, 0x57FA, 0xD0F2, 0x57FC, 0xD0F3, 0x5914, 0xD0F4, 0x5947,
07486     0xD0F5, 0x5993, 0xD0F6, 0x5BC4, 0xD0F7, 0x5C90, 0xD0F8, 0x5D0E,
07487     0xD0F9, 0x5DF1, 0xD0FA, 0x5E7E, 0xD0FB, 0x5FCC, 0xD0FC, 0x6280,
07488     0xD0FD, 0x65D7, 0xD0FE, 0x65E3, 0xD1A1, 0x671E, 0xD1A2, 0x671F,
07489     0xD1A3, 0x675E, 0xD1A4, 0x68CB, 0xD1A5, 0x68C4, 0xD1A6, 0x6A5F,
07490     0xD1A7, 0x6B3A, 0xD1A8, 0x6C23, 0xD1A9, 0x6C7D, 0xD1AA, 0x6C82,
07491     0xD1AB, 0x6DC7, 0xD1AC, 0x7398, 0xD1AD, 0x7426, 0xD1AE, 0x742A,
07492     0xD1AF, 0x7482, 0xD1B0, 0x74A3, 0xD1B1, 0x7578, 0xD1B2, 0x757F,
07493     0xD1B3, 0x7881, 0xD1B4, 0x78EF, 0xD1B5, 0x7941, 0xD1B6, 0x7947,
07494     0xD1B7, 0x7948, 0xD1B8, 0x797A, 0xD1B9, 0x7B95, 0xD1BA, 0x7D00,
07495     0xD1BB, 0x7DBA, 0xD1BC, 0x7F88, 0xD1BD, 0x8006, 0xD1BE, 0x802D,
07496     0xD1BF, 0x808C, 0xD1C0, 0x8A18, 0xD1C1, 0x8B4F, 0xD1C2, 0x8C48,
07497     0xD1C3, 0x8D77, 0xD1C4, 0x9321, 0xD1C5, 0x9324, 0xD1C6, 0x98E2,
07498     0xD1C7, 0x9951, 0xD1C8, 0x9A0E, 0xD1C9, 0x9A0F, 0xD1CA, 0x9A65,
07499     0xD1CB, 0x9E92, 0xD1CC, 0x7DCA, 0xD1CD, 0x4F76, 0xD1CE, 0x5409,
07500     0xD1CF, 0x62EE, 0xD1D0, 0x6854, 0xD1D1, 0x91D1, 0xD1D2, 0x55AB,
07501     0xD1D3, 0x513A, 0xD1D4, 0xF90B, 0xD1D5, 0xF90C, 0xD1D6, 0x5A1C,
07502     0xD1D7, 0x61E6, 0xD1D8, 0xF90D, 0xD1D9, 0x62CF, 0xD1DA, 0x62FF,
07503     0xD1DB, 0xF90E, 0xD1DC, 0xF90F, 0xD1DD, 0xF910, 0xD1DE, 0xF911,
07504     0xD1DF, 0xF912, 0xD1E0, 0xF913, 0xD1E1, 0x90A3, 0xD1E2, 0xF914,
07505     0xD1E3, 0xF915, 0xD1E4, 0xF916, 0xD1E5, 0xF917, 0xD1E6, 0xF918,
07506     0xD1E7, 0x8AFE, 0xD1E8, 0xF919, 0xD1E9, 0xF91A, 0xD1EA, 0xF91B,
07507     0xD1EB, 0xF91C, 0xD1EC, 0x6696, 0xD1ED, 0xF91D, 0xD1EE, 0x7156,
07508     0xD1EF, 0xF91E, 0xD1F0, 0xF91F, 0xD1F1, 0x96E3, 0xD1F2, 0xF920,
07509     0xD1F3, 0x634F, 0xD1F4, 0x637A, 0xD1F5, 0x5357, 0xD1F6, 0xF921,
07510     0xD1F7, 0x678F, 0xD1F8, 0x6960, 0xD1F9, 0x6E73, 0xD1FA, 0xF922,
07511     0xD1FB, 0x7537, 0xD1FC, 0xF923, 0xD1FD, 0xF924, 0xD1FE, 0xF925,
07512     0xD2A1, 0x7D0D, 0xD2A2, 0xF926, 0xD2A3, 0xF927, 0xD2A4, 0x8872,
07513     0xD2A5, 0x56CA, 0xD2A6, 0x5A18, 0xD2A7, 0xF928, 0xD2A8, 0xF929,
07514     0xD2A9, 0xF92A, 0xD2AA, 0xF92B, 0xD2AB, 0xF92C, 0xD2AC, 0x4E43,
07515     0xD2AD, 0xF92D, 0xD2AE, 0x5167, 0xD2AF, 0x5948, 0xD2B0, 0x67F0,
07516     0xD2B1, 0x8010, 0xD2B2, 0xF92E, 0xD2B3, 0x5973, 0xD2B4, 0x5E74,
07517     0xD2B5, 0x649A, 0xD2B6, 0x79CA, 0xD2B7, 0x5FF5, 0xD2B8, 0x606C,
07518     0xD2B9, 0x62C8, 0xD2BA, 0x637B, 0xD2BB, 0x5BE7, 0xD2BC, 0x5BD7,
07519     0xD2BD, 0x52AA, 0xD2BE, 0xF92F, 0xD2BF, 0x5974, 0xD2C0, 0x5F29,
07520     0xD2C1, 0x6012, 0xD2C2, 0xF930, 0xD2C3, 0xF931, 0xD2C4, 0xF932,
07521     0xD2C5, 0x7459, 0xD2C6, 0xF933, 0xD2C7, 0xF934, 0xD2C8, 0xF935,
07522     0xD2C9, 0xF936, 0xD2CA, 0xF937, 0xD2CB, 0xF938, 0xD2CC, 0x99D1,
07523     0xD2CD, 0xF939, 0xD2CE, 0xF93A, 0xD2CF, 0xF93B, 0xD2D0, 0xF93C,
07524     0xD2D1, 0xF93D, 0xD2D2, 0xF93E, 0xD2D3, 0xF93F, 0xD2D4, 0xF940,
07525     0xD2D5, 0xF941, 0xD2D6, 0xF942, 0xD2D7, 0xF943, 0xD2D8, 0x6FC3,
07526     0xD2D9, 0xF944, 0xD2DA, 0xF945, 0xD2DB, 0x81BF, 0xD2DC, 0x8FB2,
07527     0xD2DD, 0x60F1, 0xD2DE, 0xF946, 0xD2DF, 0xF947, 0xD2E0, 0x8166,
07528     0xD2E1, 0xF948, 0xD2E2, 0xF949, 0xD2E3, 0x5C3F, 0xD2E4, 0xF94A,
07529     0xD2E5, 0xF94B, 0xD2E6, 0xF94C, 0xD2E7, 0xF94D, 0xD2E8, 0xF94E,
07530     0xD2E9, 0xF94F, 0xD2EA, 0xF950, 0xD2EB, 0xF951, 0xD2EC, 0x5AE9,
07531     0xD2ED, 0x8A25, 0xD2EE, 0x677B, 0xD2EF, 0x7D10, 0xD2F0, 0xF952,
07532     0xD2F1, 0xF953, 0xD2F2, 0xF954, 0xD2F3, 0xF955, 0xD2F4, 0xF956,
07533     0xD2F5, 0xF957, 0xD2F6, 0x80FD, 0xD2F7, 0xF958, 0xD2F8, 0xF959,
07534     0xD2F9, 0x5C3C, 0xD2FA, 0x6CE5, 0xD2FB, 0x533F, 0xD2FC, 0x6EBA,
07535     0xD2FD, 0x591A, 0xD2FE, 0x8336, 0xD3A1, 0x4E39, 0xD3A2, 0x4EB6,
07536     0xD3A3, 0x4F46, 0xD3A4, 0x55AE, 0xD3A5, 0x5718, 0xD3A6, 0x58C7,
07537     0xD3A7, 0x5F56, 0xD3A8, 0x65B7, 0xD3A9, 0x65E6, 0xD3AA, 0x6A80,
07538     0xD3AB, 0x6BB5, 0xD3AC, 0x6E4D, 0xD3AD, 0x77ED, 0xD3AE, 0x7AEF,
07539     0xD3AF, 0x7C1E, 0xD3B0, 0x7DDE, 0xD3B1, 0x86CB, 0xD3B2, 0x8892,
07540     0xD3B3, 0x9132, 0xD3B4, 0x935B, 0xD3B5, 0x64BB, 0xD3B6, 0x6FBE,
07541     0xD3B7, 0x737A, 0xD3B8, 0x75B8, 0xD3B9, 0x9054, 0xD3BA, 0x5556,
07542     0xD3BB, 0x574D, 0xD3BC, 0x61BA, 0xD3BD, 0x64D4, 0xD3BE, 0x66C7,
07543     0xD3BF, 0x6DE1, 0xD3C0, 0x6E5B, 0xD3C1, 0x6F6D, 0xD3C2, 0x6FB9,
07544     0xD3C3, 0x75F0, 0xD3C4, 0x8043, 0xD3C5, 0x81BD, 0xD3C6, 0x8541,
07545     0xD3C7, 0x8983, 0xD3C8, 0x8AC7, 0xD3C9, 0x8B5A, 0xD3CA, 0x931F,
07546     0xD3CB, 0x6C93, 0xD3CC, 0x7553, 0xD3CD, 0x7B54, 0xD3CE, 0x8E0F,
07547     0xD3CF, 0x905D, 0xD3D0, 0x5510, 0xD3D1, 0x5802, 0xD3D2, 0x5858,
07548     0xD3D3, 0x5E62, 0xD3D4, 0x6207, 0xD3D5, 0x649E, 0xD3D6, 0x68E0,
07549     0xD3D7, 0x7576, 0xD3D8, 0x7CD6, 0xD3D9, 0x87B3, 0xD3DA, 0x9EE8,
07550     0xD3DB, 0x4EE3, 0xD3DC, 0x5788, 0xD3DD, 0x576E, 0xD3DE, 0x5927,
07551     0xD3DF, 0x5C0D, 0xD3E0, 0x5CB1, 0xD3E1, 0x5E36, 0xD3E2, 0x5F85,
07552     0xD3E3, 0x6234, 0xD3E4, 0x64E1, 0xD3E5, 0x73B3, 0xD3E6, 0x81FA,
07553     0xD3E7, 0x888B, 0xD3E8, 0x8CB8, 0xD3E9, 0x968A, 0xD3EA, 0x9EDB,
07554     0xD3EB, 0x5B85, 0xD3EC, 0x5FB7, 0xD3ED, 0x60B3, 0xD3EE, 0x5012,
07555     0xD3EF, 0x5200, 0xD3F0, 0x5230, 0xD3F1, 0x5716, 0xD3F2, 0x5835,
07556     0xD3F3, 0x5857, 0xD3F4, 0x5C0E, 0xD3F5, 0x5C60, 0xD3F6, 0x5CF6,
07557     0xD3F7, 0x5D8B, 0xD3F8, 0x5EA6, 0xD3F9, 0x5F92, 0xD3FA, 0x60BC,
07558     0xD3FB, 0x6311, 0xD3FC, 0x6389, 0xD3FD, 0x6417, 0xD3FE, 0x6843,
07559     0xD4A1, 0x68F9, 0xD4A2, 0x6AC2, 0xD4A3, 0x6DD8, 0xD4A4, 0x6E21,
07560     0xD4A5, 0x6ED4, 0xD4A6, 0x6FE4, 0xD4A7, 0x71FE, 0xD4A8, 0x76DC,
07561     0xD4A9, 0x7779, 0xD4AA, 0x79B1, 0xD4AB, 0x7A3B, 0xD4AC, 0x8404,
07562     0xD4AD, 0x89A9, 0xD4AE, 0x8CED, 0xD4AF, 0x8DF3, 0xD4B0, 0x8E48,
07563     0xD4B1, 0x9003, 0xD4B2, 0x9014, 0xD4B3, 0x9053, 0xD4B4, 0x90FD,
07564     0xD4B5, 0x934D, 0xD4B6, 0x9676, 0xD4B7, 0x97DC, 0xD4B8, 0x6BD2,
07565     0xD4B9, 0x7006, 0xD4BA, 0x7258, 0xD4BB, 0x72A2, 0xD4BC, 0x7368,
07566     0xD4BD, 0x7763, 0xD4BE, 0x79BF, 0xD4BF, 0x7BE4, 0xD4C0, 0x7E9B,
07567     0xD4C1, 0x8B80, 0xD4C2, 0x58A9, 0xD4C3, 0x60C7, 0xD4C4, 0x6566,
07568     0xD4C5, 0x65FD, 0xD4C6, 0x66BE, 0xD4C7, 0x6C8C, 0xD4C8, 0x711E,
07569     0xD4C9, 0x71C9, 0xD4CA, 0x8C5A, 0xD4CB, 0x9813, 0xD4CC, 0x4E6D,
07570     0xD4CD, 0x7A81, 0xD4CE, 0x4EDD, 0xD4CF, 0x51AC, 0xD4D0, 0x51CD,
07571     0xD4D1, 0x52D5, 0xD4D2, 0x540C, 0xD4D3, 0x61A7, 0xD4D4, 0x6771,
07572     0xD4D5, 0x6850, 0xD4D6, 0x68DF, 0xD4D7, 0x6D1E, 0xD4D8, 0x6F7C,
07573     0xD4D9, 0x75BC, 0xD4DA, 0x77B3, 0xD4DB, 0x7AE5, 0xD4DC, 0x80F4,
07574     0xD4DD, 0x8463, 0xD4DE, 0x9285, 0xD4DF, 0x515C, 0xD4E0, 0x6597,
07575     0xD4E1, 0x675C, 0xD4E2, 0x6793, 0xD4E3, 0x75D8, 0xD4E4, 0x7AC7,
07576     0xD4E5, 0x8373, 0xD4E6, 0xF95A, 0xD4E7, 0x8C46, 0xD4E8, 0x9017,
07577     0xD4E9, 0x982D, 0xD4EA, 0x5C6F, 0xD4EB, 0x81C0, 0xD4EC, 0x829A,
07578     0xD4ED, 0x9041, 0xD4EE, 0x906F, 0xD4EF, 0x920D, 0xD4F0, 0x5F97,
07579     0xD4F1, 0x5D9D, 0xD4F2, 0x6A59, 0xD4F3, 0x71C8, 0xD4F4, 0x767B,
07580     0xD4F5, 0x7B49, 0xD4F6, 0x85E4, 0xD4F7, 0x8B04, 0xD4F8, 0x9127,
07581     0xD4F9, 0x9A30, 0xD4FA, 0x5587, 0xD4FB, 0x61F6, 0xD4FC, 0xF95B,
07582     0xD4FD, 0x7669, 0xD4FE, 0x7F85, 0xD5A1, 0x863F, 0xD5A2, 0x87BA,
07583     0xD5A3, 0x88F8, 0xD5A4, 0x908F, 0xD5A5, 0xF95C, 0xD5A6, 0x6D1B,
07584     0xD5A7, 0x70D9, 0xD5A8, 0x73DE, 0xD5A9, 0x7D61, 0xD5AA, 0x843D,
07585     0xD5AB, 0xF95D, 0xD5AC, 0x916A, 0xD5AD, 0x99F1, 0xD5AE, 0xF95E,
07586     0xD5AF, 0x4E82, 0xD5B0, 0x5375, 0xD5B1, 0x6B04, 0xD5B2, 0x6B12,
07587     0xD5B3, 0x703E, 0xD5B4, 0x721B, 0xD5B5, 0x862D, 0xD5B6, 0x9E1E,
07588     0xD5B7, 0x524C, 0xD5B8, 0x8FA3, 0xD5B9, 0x5D50, 0xD5BA, 0x64E5,
07589     0xD5BB, 0x652C, 0xD5BC, 0x6B16, 0xD5BD, 0x6FEB, 0xD5BE, 0x7C43,
07590     0xD5BF, 0x7E9C, 0xD5C0, 0x85CD, 0xD5C1, 0x8964, 0xD5C2, 0x89BD,
07591     0xD5C3, 0x62C9, 0xD5C4, 0x81D8, 0xD5C5, 0x881F, 0xD5C6, 0x5ECA,
07592     0xD5C7, 0x6717, 0xD5C8, 0x6D6A, 0xD5C9, 0x72FC, 0xD5CA, 0x7405,
07593     0xD5CB, 0x746F, 0xD5CC, 0x8782, 0xD5CD, 0x90DE, 0xD5CE, 0x4F86,
07594     0xD5CF, 0x5D0D, 0xD5D0, 0x5FA0, 0xD5D1, 0x840A, 0xD5D2, 0x51B7,
07595     0xD5D3, 0x63A0, 0xD5D4, 0x7565, 0xD5D5, 0x4EAE, 0xD5D6, 0x5006,
07596     0xD5D7, 0x5169, 0xD5D8, 0x51C9, 0xD5D9, 0x6881, 0xD5DA, 0x6A11,
07597     0xD5DB, 0x7CAE, 0xD5DC, 0x7CB1, 0xD5DD, 0x7CE7, 0xD5DE, 0x826F,
07598     0xD5DF, 0x8AD2, 0xD5E0, 0x8F1B, 0xD5E1, 0x91CF, 0xD5E2, 0x4FB6,
07599     0xD5E3, 0x5137, 0xD5E4, 0x52F5, 0xD5E5, 0x5442, 0xD5E6, 0x5EEC,
07600     0xD5E7, 0x616E, 0xD5E8, 0x623E, 0xD5E9, 0x65C5, 0xD5EA, 0x6ADA,
07601     0xD5EB, 0x6FFE, 0xD5EC, 0x792A, 0xD5ED, 0x85DC, 0xD5EE, 0x8823,
07602     0xD5EF, 0x95AD, 0xD5F0, 0x9A62, 0xD5F1, 0x9A6A, 0xD5F2, 0x9E97,
07603     0xD5F3, 0x9ECE, 0xD5F4, 0x529B, 0xD5F5, 0x66C6, 0xD5F6, 0x6B77,
07604     0xD5F7, 0x701D, 0xD5F8, 0x792B, 0xD5F9, 0x8F62, 0xD5FA, 0x9742,
07605     0xD5FB, 0x6190, 0xD5FC, 0x6200, 0xD5FD, 0x6523, 0xD5FE, 0x6F23,
07606     0xD6A1, 0x7149, 0xD6A2, 0x7489, 0xD6A3, 0x7DF4, 0xD6A4, 0x806F,
07607     0xD6A5, 0x84EE, 0xD6A6, 0x8F26, 0xD6A7, 0x9023, 0xD6A8, 0x934A,
07608     0xD6A9, 0x51BD, 0xD6AA, 0x5217, 0xD6AB, 0x52A3, 0xD6AC, 0x6D0C,
07609     0xD6AD, 0x70C8, 0xD6AE, 0x88C2, 0xD6AF, 0x5EC9, 0xD6B0, 0x6582,
07610     0xD6B1, 0x6BAE, 0xD6B2, 0x6FC2, 0xD6B3, 0x7C3E, 0xD6B4, 0x7375,
07611     0xD6B5, 0x4EE4, 0xD6B6, 0x4F36, 0xD6B7, 0x56F9, 0xD6B8, 0xF95F,
07612     0xD6B9, 0x5CBA, 0xD6BA, 0x5DBA, 0xD6BB, 0x601C, 0xD6BC, 0x73B2,
07613     0xD6BD, 0x7B2D, 0xD6BE, 0x7F9A, 0xD6BF, 0x7FCE, 0xD6C0, 0x8046,
07614     0xD6C1, 0x901E, 0xD6C2, 0x9234, 0xD6C3, 0x96F6, 0xD6C4, 0x9748,
07615     0xD6C5, 0x9818, 0xD6C6, 0x9F61, 0xD6C7, 0x4F8B, 0xD6C8, 0x6FA7,
07616     0xD6C9, 0x79AE, 0xD6CA, 0x91B4, 0xD6CB, 0x96B7, 0xD6CC, 0x52DE,
07617     0xD6CD, 0xF960, 0xD6CE, 0x6488, 0xD6CF, 0x64C4, 0xD6D0, 0x6AD3,
07618     0xD6D1, 0x6F5E, 0xD6D2, 0x7018, 0xD6D3, 0x7210, 0xD6D4, 0x76E7,
07619     0xD6D5, 0x8001, 0xD6D6, 0x8606, 0xD6D7, 0x865C, 0xD6D8, 0x8DEF,
07620     0xD6D9, 0x8F05, 0xD6DA, 0x9732, 0xD6DB, 0x9B6F, 0xD6DC, 0x9DFA,
07621     0xD6DD, 0x9E75, 0xD6DE, 0x788C, 0xD6DF, 0x797F, 0xD6E0, 0x7DA0,
07622     0xD6E1, 0x83C9, 0xD6E2, 0x9304, 0xD6E3, 0x9E7F, 0xD6E4, 0x9E93,
07623     0xD6E5, 0x8AD6, 0xD6E6, 0x58DF, 0xD6E7, 0x5F04, 0xD6E8, 0x6727,
07624     0xD6E9, 0x7027, 0xD6EA, 0x74CF, 0xD6EB, 0x7C60, 0xD6EC, 0x807E,
07625     0xD6ED, 0x5121, 0xD6EE, 0x7028, 0xD6EF, 0x7262, 0xD6F0, 0x78CA,
07626     0xD6F1, 0x8CC2, 0xD6F2, 0x8CDA, 0xD6F3, 0x8CF4, 0xD6F4, 0x96F7,
07627     0xD6F5, 0x4E86, 0xD6F6, 0x50DA, 0xD6F7, 0x5BEE, 0xD6F8, 0x5ED6,
07628     0xD6F9, 0x6599, 0xD6FA, 0x71CE, 0xD6FB, 0x7642, 0xD6FC, 0x77AD,
07629     0xD6FD, 0x804A, 0xD6FE, 0x84FC, 0xD7A1, 0x907C, 0xD7A2, 0x9B27,
07630     0xD7A3, 0x9F8D, 0xD7A4, 0x58D8, 0xD7A5, 0x5A41, 0xD7A6, 0x5C62,
07631     0xD7A7, 0x6A13, 0xD7A8, 0x6DDA, 0xD7A9, 0x6F0F, 0xD7AA, 0x763B,
07632     0xD7AB, 0x7D2F, 0xD7AC, 0x7E37, 0xD7AD, 0x851E, 0xD7AE, 0x8938,
07633     0xD7AF, 0x93E4, 0xD7B0, 0x964B, 0xD7B1, 0x5289, 0xD7B2, 0x65D2,
07634     0xD7B3, 0x67F3, 0xD7B4, 0x69B4, 0xD7B5, 0x6D41, 0xD7B6, 0x6E9C,
07635     0xD7B7, 0x700F, 0xD7B8, 0x7409, 0xD7B9, 0x7460, 0xD7BA, 0x7559,
07636     0xD7BB, 0x7624, 0xD7BC, 0x786B, 0xD7BD, 0x8B2C, 0xD7BE, 0x985E,
07637     0xD7BF, 0x516D, 0xD7C0, 0x622E, 0xD7C1, 0x9678, 0xD7C2, 0x4F96,
07638     0xD7C3, 0x502B, 0xD7C4, 0x5D19, 0xD7C5, 0x6DEA, 0xD7C6, 0x7DB8,
07639     0xD7C7, 0x8F2A, 0xD7C8, 0x5F8B, 0xD7C9, 0x6144, 0xD7CA, 0x6817,
07640     0xD7CB, 0xF961, 0xD7CC, 0x9686, 0xD7CD, 0x52D2, 0xD7CE, 0x808B,
07641     0xD7CF, 0x51DC, 0xD7D0, 0x51CC, 0xD7D1, 0x695E, 0xD7D2, 0x7A1C,
07642     0xD7D3, 0x7DBE, 0xD7D4, 0x83F1, 0xD7D5, 0x9675, 0xD7D6, 0x4FDA,
07643     0xD7D7, 0x5229, 0xD7D8, 0x5398, 0xD7D9, 0x540F, 0xD7DA, 0x550E,
07644     0xD7DB, 0x5C65, 0xD7DC, 0x60A7, 0xD7DD, 0x674E, 0xD7DE, 0x68A8,
07645     0xD7DF, 0x6D6C, 0xD7E0, 0x7281, 0xD7E1, 0x72F8, 0xD7E2, 0x7406,
07646     0xD7E3, 0x7483, 0xD7E4, 0xF962, 0xD7E5, 0x75E2, 0xD7E6, 0x7C6C,
07647     0xD7E7, 0x7F79, 0xD7E8, 0x7FB8, 0xD7E9, 0x8389, 0xD7EA, 0x88CF,
07648     0xD7EB, 0x88E1, 0xD7EC, 0x91CC, 0xD7ED, 0x91D0, 0xD7EE, 0x96E2,
07649     0xD7EF, 0x9BC9, 0xD7F0, 0x541D, 0xD7F1, 0x6F7E, 0xD7F2, 0x71D0,
07650     0xD7F3, 0x7498, 0xD7F4, 0x85FA, 0xD7F5, 0x8EAA, 0xD7F6, 0x96A3,
07651     0xD7F7, 0x9C57, 0xD7F8, 0x9E9F, 0xD7F9, 0x6797, 0xD7FA, 0x6DCB,
07652     0xD7FB, 0x7433, 0xD7FC, 0x81E8, 0xD7FD, 0x9716, 0xD7FE, 0x782C,
07653     0xD8A1, 0x7ACB, 0xD8A2, 0x7B20, 0xD8A3, 0x7C92, 0xD8A4, 0x6469,
07654     0xD8A5, 0x746A, 0xD8A6, 0x75F2, 0xD8A7, 0x78BC, 0xD8A8, 0x78E8,
07655     0xD8A9, 0x99AC, 0xD8AA, 0x9B54, 0xD8AB, 0x9EBB, 0xD8AC, 0x5BDE,
07656     0xD8AD, 0x5E55, 0xD8AE, 0x6F20, 0xD8AF, 0x819C, 0xD8B0, 0x83AB,
07657     0xD8B1, 0x9088, 0xD8B2, 0x4E07, 0xD8B3, 0x534D, 0xD8B4, 0x5A29,
07658     0xD8B5, 0x5DD2, 0xD8B6, 0x5F4E, 0xD8B7, 0x6162, 0xD8B8, 0x633D,
07659     0xD8B9, 0x6669, 0xD8BA, 0x66FC, 0xD8BB, 0x6EFF, 0xD8BC, 0x6F2B,
07660     0xD8BD, 0x7063, 0xD8BE, 0x779E, 0xD8BF, 0x842C, 0xD8C0, 0x8513,
07661     0xD8C1, 0x883B, 0xD8C2, 0x8F13, 0xD8C3, 0x9945, 0xD8C4, 0x9C3B,
07662     0xD8C5, 0x551C, 0xD8C6, 0x62B9, 0xD8C7, 0x672B, 0xD8C8, 0x6CAB,
07663     0xD8C9, 0x8309, 0xD8CA, 0x896A, 0xD8CB, 0x977A, 0xD8CC, 0x4EA1,
07664     0xD8CD, 0x5984, 0xD8CE, 0x5FD8, 0xD8CF, 0x5FD9, 0xD8D0, 0x671B,
07665     0xD8D1, 0x7DB2, 0xD8D2, 0x7F54, 0xD8D3, 0x8292, 0xD8D4, 0x832B,
07666     0xD8D5, 0x83BD, 0xD8D6, 0x8F1E, 0xD8D7, 0x9099, 0xD8D8, 0x57CB,
07667     0xD8D9, 0x59B9, 0xD8DA, 0x5A92, 0xD8DB, 0x5BD0, 0xD8DC, 0x6627,
07668     0xD8DD, 0x679A, 0xD8DE, 0x6885, 0xD8DF, 0x6BCF, 0xD8E0, 0x7164,
07669     0xD8E1, 0x7F75, 0xD8E2, 0x8CB7, 0xD8E3, 0x8CE3, 0xD8E4, 0x9081,
07670     0xD8E5, 0x9B45, 0xD8E6, 0x8108, 0xD8E7, 0x8C8A, 0xD8E8, 0x964C,
07671     0xD8E9, 0x9A40, 0xD8EA, 0x9EA5, 0xD8EB, 0x5B5F, 0xD8EC, 0x6C13,
07672     0xD8ED, 0x731B, 0xD8EE, 0x76F2, 0xD8EF, 0x76DF, 0xD8F0, 0x840C,
07673     0xD8F1, 0x51AA, 0xD8F2, 0x8993, 0xD8F3, 0x514D, 0xD8F4, 0x5195,
07674     0xD8F5, 0x52C9, 0xD8F6, 0x68C9, 0xD8F7, 0x6C94, 0xD8F8, 0x7704,
07675     0xD8F9, 0x7720, 0xD8FA, 0x7DBF, 0xD8FB, 0x7DEC, 0xD8FC, 0x9762,
07676     0xD8FD, 0x9EB5, 0xD8FE, 0x6EC5, 0xD9A1, 0x8511, 0xD9A2, 0x51A5,
07677     0xD9A3, 0x540D, 0xD9A4, 0x547D, 0xD9A5, 0x660E, 0xD9A6, 0x669D,
07678     0xD9A7, 0x6927, 0xD9A8, 0x6E9F, 0xD9A9, 0x76BF, 0xD9AA, 0x7791,
07679     0xD9AB, 0x8317, 0xD9AC, 0x84C2, 0xD9AD, 0x879F, 0xD9AE, 0x9169,
07680     0xD9AF, 0x9298, 0xD9B0, 0x9CF4, 0xD9B1, 0x8882, 0xD9B2, 0x4FAE,
07681     0xD9B3, 0x5192, 0xD9B4, 0x52DF, 0xD9B5, 0x59C6, 0xD9B6, 0x5E3D,
07682     0xD9B7, 0x6155, 0xD9B8, 0x6478, 0xD9B9, 0x6479, 0xD9BA, 0x66AE,
07683     0xD9BB, 0x67D0, 0xD9BC, 0x6A21, 0xD9BD, 0x6BCD, 0xD9BE, 0x6BDB,
07684     0xD9BF, 0x725F, 0xD9C0, 0x7261, 0xD9C1, 0x7441, 0xD9C2, 0x7738,
07685     0xD9C3, 0x77DB, 0xD9C4, 0x8017, 0xD9C5, 0x82BC, 0xD9C6, 0x8305,
07686     0xD9C7, 0x8B00, 0xD9C8, 0x8B28, 0xD9C9, 0x8C8C, 0xD9CA, 0x6728,
07687     0xD9CB, 0x6C90, 0xD9CC, 0x7267, 0xD9CD, 0x76EE, 0xD9CE, 0x7766,
07688     0xD9CF, 0x7A46, 0xD9D0, 0x9DA9, 0xD9D1, 0x6B7F, 0xD9D2, 0x6C92,
07689     0xD9D3, 0x5922, 0xD9D4, 0x6726, 0xD9D5, 0x8499, 0xD9D6, 0x536F,
07690     0xD9D7, 0x5893, 0xD9D8, 0x5999, 0xD9D9, 0x5EDF, 0xD9DA, 0x63CF,
07691     0xD9DB, 0x6634, 0xD9DC, 0x6773, 0xD9DD, 0x6E3A, 0xD9DE, 0x732B,
07692     0xD9DF, 0x7AD7, 0xD9E0, 0x82D7, 0xD9E1, 0x9328, 0xD9E2, 0x52D9,
07693     0xD9E3, 0x5DEB, 0xD9E4, 0x61AE, 0xD9E5, 0x61CB, 0xD9E6, 0x620A,
07694     0xD9E7, 0x62C7, 0xD9E8, 0x64AB, 0xD9E9, 0x65E0, 0xD9EA, 0x6959,
07695     0xD9EB, 0x6B66, 0xD9EC, 0x6BCB, 0xD9ED, 0x7121, 0xD9EE, 0x73F7,
07696     0xD9EF, 0x755D, 0xD9F0, 0x7E46, 0xD9F1, 0x821E, 0xD9F2, 0x8302,
07697     0xD9F3, 0x856A, 0xD9F4, 0x8AA3, 0xD9F5, 0x8CBF, 0xD9F6, 0x9727,
07698     0xD9F7, 0x9D61, 0xD9F8, 0x58A8, 0xD9F9, 0x9ED8, 0xD9FA, 0x5011,
07699     0xD9FB, 0x520E, 0xD9FC, 0x543B, 0xD9FD, 0x554F, 0xD9FE, 0x6587,
07700     0xDAA1, 0x6C76, 0xDAA2, 0x7D0A, 0xDAA3, 0x7D0B, 0xDAA4, 0x805E,
07701     0xDAA5, 0x868A, 0xDAA6, 0x9580, 0xDAA7, 0x96EF, 0xDAA8, 0x52FF,
07702     0xDAA9, 0x6C95, 0xDAAA, 0x7269, 0xDAAB, 0x5473, 0xDAAC, 0x5A9A,
07703     0xDAAD, 0x5C3E, 0xDAAE, 0x5D4B, 0xDAAF, 0x5F4C, 0xDAB0, 0x5FAE,
07704     0xDAB1, 0x672A, 0xDAB2, 0x68B6, 0xDAB3, 0x6963, 0xDAB4, 0x6E3C,
07705     0xDAB5, 0x6E44, 0xDAB6, 0x7709, 0xDAB7, 0x7C73, 0xDAB8, 0x7F8E,
07706     0xDAB9, 0x8587, 0xDABA, 0x8B0E, 0xDABB, 0x8FF7, 0xDABC, 0x9761,
07707     0xDABD, 0x9EF4, 0xDABE, 0x5CB7, 0xDABF, 0x60B6, 0xDAC0, 0x610D,
07708     0xDAC1, 0x61AB, 0xDAC2, 0x654F, 0xDAC3, 0x65FB, 0xDAC4, 0x65FC,
07709     0xDAC5, 0x6C11, 0xDAC6, 0x6CEF, 0xDAC7, 0x739F, 0xDAC8, 0x73C9,
07710     0xDAC9, 0x7DE1, 0xDACA, 0x9594, 0xDACB, 0x5BC6, 0xDACC, 0x871C,
07711     0xDACD, 0x8B10, 0xDACE, 0x525D, 0xDACF, 0x535A, 0xDAD0, 0x62CD,
07712     0xDAD1, 0x640F, 0xDAD2, 0x64B2, 0xDAD3, 0x6734, 0xDAD4, 0x6A38,
07713     0xDAD5, 0x6CCA, 0xDAD6, 0x73C0, 0xDAD7, 0x749E, 0xDAD8, 0x7B94,
07714     0xDAD9, 0x7C95, 0xDADA, 0x7E1B, 0xDADB, 0x818A, 0xDADC, 0x8236,
07715     0xDADD, 0x8584, 0xDADE, 0x8FEB, 0xDADF, 0x96F9, 0xDAE0, 0x99C1,
07716     0xDAE1, 0x4F34, 0xDAE2, 0x534A, 0xDAE3, 0x53CD, 0xDAE4, 0x53DB,
07717     0xDAE5, 0x62CC, 0xDAE6, 0x642C, 0xDAE7, 0x6500, 0xDAE8, 0x6591,
07718     0xDAE9, 0x69C3, 0xDAEA, 0x6CEE, 0xDAEB, 0x6F58, 0xDAEC, 0x73ED,
07719     0xDAED, 0x7554, 0xDAEE, 0x7622, 0xDAEF, 0x76E4, 0xDAF0, 0x76FC,
07720     0xDAF1, 0x78D0, 0xDAF2, 0x78FB, 0xDAF3, 0x792C, 0xDAF4, 0x7D46,
07721     0xDAF5, 0x822C, 0xDAF6, 0x87E0, 0xDAF7, 0x8FD4, 0xDAF8, 0x9812,
07722     0xDAF9, 0x98EF, 0xDAFA, 0x52C3, 0xDAFB, 0x62D4, 0xDAFC, 0x64A5,
07723     0xDAFD, 0x6E24, 0xDAFE, 0x6F51, 0xDBA1, 0x767C, 0xDBA2, 0x8DCB,
07724     0xDBA3, 0x91B1, 0xDBA4, 0x9262, 0xDBA5, 0x9AEE, 0xDBA6, 0x9B43,
07725     0xDBA7, 0x5023, 0xDBA8, 0x508D, 0xDBA9, 0x574A, 0xDBAA, 0x59A8,
07726     0xDBAB, 0x5C28, 0xDBAC, 0x5E47, 0xDBAD, 0x5F77, 0xDBAE, 0x623F,
07727     0xDBAF, 0x653E, 0xDBB0, 0x65B9, 0xDBB1, 0x65C1, 0xDBB2, 0x6609,
07728     0xDBB3, 0x678B, 0xDBB4, 0x699C, 0xDBB5, 0x6EC2, 0xDBB6, 0x78C5,
07729     0xDBB7, 0x7D21, 0xDBB8, 0x80AA, 0xDBB9, 0x8180, 0xDBBA, 0x822B,
07730     0xDBBB, 0x82B3, 0xDBBC, 0x84A1, 0xDBBD, 0x868C, 0xDBBE, 0x8A2A,
07731     0xDBBF, 0x8B17, 0xDBC0, 0x90A6, 0xDBC1, 0x9632, 0xDBC2, 0x9F90,
07732     0xDBC3, 0x500D, 0xDBC4, 0x4FF3, 0xDBC5, 0xF963, 0xDBC6, 0x57F9,
07733     0xDBC7, 0x5F98, 0xDBC8, 0x62DC, 0xDBC9, 0x6392, 0xDBCA, 0x676F,
07734     0xDBCB, 0x6E43, 0xDBCC, 0x7119, 0xDBCD, 0x76C3, 0xDBCE, 0x80CC,
07735     0xDBCF, 0x80DA, 0xDBD0, 0x88F4, 0xDBD1, 0x88F5, 0xDBD2, 0x8919,
07736     0xDBD3, 0x8CE0, 0xDBD4, 0x8F29, 0xDBD5, 0x914D, 0xDBD6, 0x966A,
07737     0xDBD7, 0x4F2F, 0xDBD8, 0x4F70, 0xDBD9, 0x5E1B, 0xDBDA, 0x67CF,
07738     0xDBDB, 0x6822, 0xDBDC, 0x767D, 0xDBDD, 0x767E, 0xDBDE, 0x9B44,
07739     0xDBDF, 0x5E61, 0xDBE0, 0x6A0A, 0xDBE1, 0x7169, 0xDBE2, 0x71D4,
07740     0xDBE3, 0x756A, 0xDBE4, 0xF964, 0xDBE5, 0x7E41, 0xDBE6, 0x8543,
07741     0xDBE7, 0x85E9, 0xDBE8, 0x98DC, 0xDBE9, 0x4F10, 0xDBEA, 0x7B4F,
07742     0xDBEB, 0x7F70, 0xDBEC, 0x95A5, 0xDBED, 0x51E1, 0xDBEE, 0x5E06,
07743     0xDBEF, 0x68B5, 0xDBF0, 0x6C3E, 0xDBF1, 0x6C4E, 0xDBF2, 0x6CDB,
07744     0xDBF3, 0x72AF, 0xDBF4, 0x7BC4, 0xDBF5, 0x8303, 0xDBF6, 0x6CD5,
07745     0xDBF7, 0x743A, 0xDBF8, 0x50FB, 0xDBF9, 0x5288, 0xDBFA, 0x58C1,
07746     0xDBFB, 0x64D8, 0xDBFC, 0x6A97, 0xDBFD, 0x74A7, 0xDBFE, 0x7656,
07747     0xDCA1, 0x78A7, 0xDCA2, 0x8617, 0xDCA3, 0x95E2, 0xDCA4, 0x9739,
07748     0xDCA5, 0xF965, 0xDCA6, 0x535E, 0xDCA7, 0x5F01, 0xDCA8, 0x8B8A,
07749     0xDCA9, 0x8FA8, 0xDCAA, 0x8FAF, 0xDCAB, 0x908A, 0xDCAC, 0x5225,
07750     0xDCAD, 0x77A5, 0xDCAE, 0x9C49, 0xDCAF, 0x9F08, 0xDCB0, 0x4E19,
07751     0xDCB1, 0x5002, 0xDCB2, 0x5175, 0xDCB3, 0x5C5B, 0xDCB4, 0x5E77,
07752     0xDCB5, 0x661E, 0xDCB6, 0x663A, 0xDCB7, 0x67C4, 0xDCB8, 0x68C5,
07753     0xDCB9, 0x70B3, 0xDCBA, 0x7501, 0xDCBB, 0x75C5, 0xDCBC, 0x79C9,
07754     0xDCBD, 0x7ADD, 0xDCBE, 0x8F27, 0xDCBF, 0x9920, 0xDCC0, 0x9A08,
07755     0xDCC1, 0x4FDD, 0xDCC2, 0x5821, 0xDCC3, 0x5831, 0xDCC4, 0x5BF6,
07756     0xDCC5, 0x666E, 0xDCC6, 0x6B65, 0xDCC7, 0x6D11, 0xDCC8, 0x6E7A,
07757     0xDCC9, 0x6F7D, 0xDCCA, 0x73E4, 0xDCCB, 0x752B, 0xDCCC, 0x83E9,
07758     0xDCCD, 0x88DC, 0xDCCE, 0x8913, 0xDCCF, 0x8B5C, 0xDCD0, 0x8F14,
07759     0xDCD1, 0x4F0F, 0xDCD2, 0x50D5, 0xDCD3, 0x5310, 0xDCD4, 0x535C,
07760     0xDCD5, 0x5B93, 0xDCD6, 0x5FA9, 0xDCD7, 0x670D, 0xDCD8, 0x798F,
07761     0xDCD9, 0x8179, 0xDCDA, 0x832F, 0xDCDB, 0x8514, 0xDCDC, 0x8907,
07762     0xDCDD, 0x8986, 0xDCDE, 0x8F39, 0xDCDF, 0x8F3B, 0xDCE0, 0x99A5,
07763     0xDCE1, 0x9C12, 0xDCE2, 0x672C, 0xDCE3, 0x4E76, 0xDCE4, 0x4FF8,
07764     0xDCE5, 0x5949, 0xDCE6, 0x5C01, 0xDCE7, 0x5CEF, 0xDCE8, 0x5CF0,
07765     0xDCE9, 0x6367, 0xDCEA, 0x68D2, 0xDCEB, 0x70FD, 0xDCEC, 0x71A2,
07766     0xDCED, 0x742B, 0xDCEE, 0x7E2B, 0xDCEF, 0x84EC, 0xDCF0, 0x8702,
07767     0xDCF1, 0x9022, 0xDCF2, 0x92D2, 0xDCF3, 0x9CF3, 0xDCF4, 0x4E0D,
07768     0xDCF5, 0x4ED8, 0xDCF6, 0x4FEF, 0xDCF7, 0x5085, 0xDCF8, 0x5256,
07769     0xDCF9, 0x526F, 0xDCFA, 0x5426, 0xDCFB, 0x5490, 0xDCFC, 0x57E0,
07770     0xDCFD, 0x592B, 0xDCFE, 0x5A66, 0xDDA1, 0x5B5A, 0xDDA2, 0x5B75,
07771     0xDDA3, 0x5BCC, 0xDDA4, 0x5E9C, 0xDDA5, 0xF966, 0xDDA6, 0x6276,
07772     0xDDA7, 0x6577, 0xDDA8, 0x65A7, 0xDDA9, 0x6D6E, 0xDDAA, 0x6EA5,
07773     0xDDAB, 0x7236, 0xDDAC, 0x7B26, 0xDDAD, 0x7C3F, 0xDDAE, 0x7F36,
07774     0xDDAF, 0x8150, 0xDDB0, 0x8151, 0xDDB1, 0x819A, 0xDDB2, 0x8240,
07775     0xDDB3, 0x8299, 0xDDB4, 0x83A9, 0xDDB5, 0x8A03, 0xDDB6, 0x8CA0,
07776     0xDDB7, 0x8CE6, 0xDDB8, 0x8CFB, 0xDDB9, 0x8D74, 0xDDBA, 0x8DBA,
07777     0xDDBB, 0x90E8, 0xDDBC, 0x91DC, 0xDDBD, 0x961C, 0xDDBE, 0x9644,
07778     0xDDBF, 0x99D9, 0xDDC0, 0x9CE7, 0xDDC1, 0x5317, 0xDDC2, 0x5206,
07779     0xDDC3, 0x5429, 0xDDC4, 0x5674, 0xDDC5, 0x58B3, 0xDDC6, 0x5954,
07780     0xDDC7, 0x596E, 0xDDC8, 0x5FFF, 0xDDC9, 0x61A4, 0xDDCA, 0x626E,
07781     0xDDCB, 0x6610, 0xDDCC, 0x6C7E, 0xDDCD, 0x711A, 0xDDCE, 0x76C6,
07782     0xDDCF, 0x7C89, 0xDDD0, 0x7CDE, 0xDDD1, 0x7D1B, 0xDDD2, 0x82AC,
07783     0xDDD3, 0x8CC1, 0xDDD4, 0x96F0, 0xDDD5, 0xF967, 0xDDD6, 0x4F5B,
07784     0xDDD7, 0x5F17, 0xDDD8, 0x5F7F, 0xDDD9, 0x62C2, 0xDDDA, 0x5D29,
07785     0xDDDB, 0x670B, 0xDDDC, 0x68DA, 0xDDDD, 0x787C, 0xDDDE, 0x7E43,
07786     0xDDDF, 0x9D6C, 0xDDE0, 0x4E15, 0xDDE1, 0x5099, 0xDDE2, 0x5315,
07787     0xDDE3, 0x532A, 0xDDE4, 0x5351, 0xDDE5, 0x5983, 0xDDE6, 0x5A62,
07788     0xDDE7, 0x5E87, 0xDDE8, 0x60B2, 0xDDE9, 0x618A, 0xDDEA, 0x6249,
07789     0xDDEB, 0x6279, 0xDDEC, 0x6590, 0xDDED, 0x6787, 0xDDEE, 0x69A7,
07790     0xDDEF, 0x6BD4, 0xDDF0, 0x6BD6, 0xDDF1, 0x6BD7, 0xDDF2, 0x6BD8,
07791     0xDDF3, 0x6CB8, 0xDDF4, 0xF968, 0xDDF5, 0x7435, 0xDDF6, 0x75FA,
07792     0xDDF7, 0x7812, 0xDDF8, 0x7891, 0xDDF9, 0x79D5, 0xDDFA, 0x79D8,
07793     0xDDFB, 0x7C83, 0xDDFC, 0x7DCB, 0xDDFD, 0x7FE1, 0xDDFE, 0x80A5,
07794     0xDEA1, 0x813E, 0xDEA2, 0x81C2, 0xDEA3, 0x83F2, 0xDEA4, 0x871A,
07795     0xDEA5, 0x88E8, 0xDEA6, 0x8AB9, 0xDEA7, 0x8B6C, 0xDEA8, 0x8CBB,
07796     0xDEA9, 0x9119, 0xDEAA, 0x975E, 0xDEAB, 0x98DB, 0xDEAC, 0x9F3B,
07797     0xDEAD, 0x56AC, 0xDEAE, 0x5B2A, 0xDEAF, 0x5F6C, 0xDEB0, 0x658C,
07798     0xDEB1, 0x6AB3, 0xDEB2, 0x6BAF, 0xDEB3, 0x6D5C, 0xDEB4, 0x6FF1,
07799     0xDEB5, 0x7015, 0xDEB6, 0x725D, 0xDEB7, 0x73AD, 0xDEB8, 0x8CA7,
07800     0xDEB9, 0x8CD3, 0xDEBA, 0x983B, 0xDEBB, 0x6191, 0xDEBC, 0x6C37,
07801     0xDEBD, 0x8058, 0xDEBE, 0x9A01, 0xDEBF, 0x4E4D, 0xDEC0, 0x4E8B,
07802     0xDEC1, 0x4E9B, 0xDEC2, 0x4ED5, 0xDEC3, 0x4F3A, 0xDEC4, 0x4F3C,
07803     0xDEC5, 0x4F7F, 0xDEC6, 0x4FDF, 0xDEC7, 0x50FF, 0xDEC8, 0x53F2,
07804     0xDEC9, 0x53F8, 0xDECA, 0x5506, 0xDECB, 0x55E3, 0xDECC, 0x56DB,
07805     0xDECD, 0x58EB, 0xDECE, 0x5962, 0xDECF, 0x5A11, 0xDED0, 0x5BEB,
07806     0xDED1, 0x5BFA, 0xDED2, 0x5C04, 0xDED3, 0x5DF3, 0xDED4, 0x5E2B,
07807     0xDED5, 0x5F99, 0xDED6, 0x601D, 0xDED7, 0x6368, 0xDED8, 0x659C,
07808     0xDED9, 0x65AF, 0xDEDA, 0x67F6, 0xDEDB, 0x67FB, 0xDEDC, 0x68AD,
07809     0xDEDD, 0x6B7B, 0xDEDE, 0x6C99, 0xDEDF, 0x6CD7, 0xDEE0, 0x6E23,
07810     0xDEE1, 0x7009, 0xDEE2, 0x7345, 0xDEE3, 0x7802, 0xDEE4, 0x793E,
07811     0xDEE5, 0x7940, 0xDEE6, 0x7960, 0xDEE7, 0x79C1, 0xDEE8, 0x7BE9,
07812     0xDEE9, 0x7D17, 0xDEEA, 0x7D72, 0xDEEB, 0x8086, 0xDEEC, 0x820D,
07813     0xDEED, 0x838E, 0xDEEE, 0x84D1, 0xDEEF, 0x86C7, 0xDEF0, 0x88DF,
07814     0xDEF1, 0x8A50, 0xDEF2, 0x8A5E, 0xDEF3, 0x8B1D, 0xDEF4, 0x8CDC,
07815     0xDEF5, 0x8D66, 0xDEF6, 0x8FAD, 0xDEF7, 0x90AA, 0xDEF8, 0x98FC,
07816     0xDEF9, 0x99DF, 0xDEFA, 0x9E9D, 0xDEFB, 0x524A, 0xDEFC, 0xF969,
07817     0xDEFD, 0x6714, 0xDEFE, 0xF96A, 0xDFA1, 0x5098, 0xDFA2, 0x522A,
07818     0xDFA3, 0x5C71, 0xDFA4, 0x6563, 0xDFA5, 0x6C55, 0xDFA6, 0x73CA,
07819     0xDFA7, 0x7523, 0xDFA8, 0x759D, 0xDFA9, 0x7B97, 0xDFAA, 0x849C,
07820     0xDFAB, 0x9178, 0xDFAC, 0x9730, 0xDFAD, 0x4E77, 0xDFAE, 0x6492,
07821     0xDFAF, 0x6BBA, 0xDFB0, 0x715E, 0xDFB1, 0x85A9, 0xDFB2, 0x4E09,
07822     0xDFB3, 0xF96B, 0xDFB4, 0x6749, 0xDFB5, 0x68EE, 0xDFB6, 0x6E17,
07823     0xDFB7, 0x829F, 0xDFB8, 0x8518, 0xDFB9, 0x886B, 0xDFBA, 0x63F7,
07824     0xDFBB, 0x6F81, 0xDFBC, 0x9212, 0xDFBD, 0x98AF, 0xDFBE, 0x4E0A,
07825     0xDFBF, 0x50B7, 0xDFC0, 0x50CF, 0xDFC1, 0x511F, 0xDFC2, 0x5546,
07826     0xDFC3, 0x55AA, 0xDFC4, 0x5617, 0xDFC5, 0x5B40, 0xDFC6, 0x5C19,
07827     0xDFC7, 0x5CE0, 0xDFC8, 0x5E38, 0xDFC9, 0x5E8A, 0xDFCA, 0x5EA0,
07828     0xDFCB, 0x5EC2, 0xDFCC, 0x60F3, 0xDFCD, 0x6851, 0xDFCE, 0x6A61,
07829     0xDFCF, 0x6E58, 0xDFD0, 0x723D, 0xDFD1, 0x7240, 0xDFD2, 0x72C0,
07830     0xDFD3, 0x76F8, 0xDFD4, 0x7965, 0xDFD5, 0x7BB1, 0xDFD6, 0x7FD4,
07831     0xDFD7, 0x88F3, 0xDFD8, 0x89F4, 0xDFD9, 0x8A73, 0xDFDA, 0x8C61,
07832     0xDFDB, 0x8CDE, 0xDFDC, 0x971C, 0xDFDD, 0x585E, 0xDFDE, 0x74BD,
07833     0xDFDF, 0x8CFD, 0xDFE0, 0x55C7, 0xDFE1, 0xF96C, 0xDFE2, 0x7A61,
07834     0xDFE3, 0x7D22, 0xDFE4, 0x8272, 0xDFE5, 0x7272, 0xDFE6, 0x751F,
07835     0xDFE7, 0x7525, 0xDFE8, 0xF96D, 0xDFE9, 0x7B19, 0xDFEA, 0x5885,
07836     0xDFEB, 0x58FB, 0xDFEC, 0x5DBC, 0xDFED, 0x5E8F, 0xDFEE, 0x5EB6,
07837     0xDFEF, 0x5F90, 0xDFF0, 0x6055, 0xDFF1, 0x6292, 0xDFF2, 0x637F,
07838     0xDFF3, 0x654D, 0xDFF4, 0x6691, 0xDFF5, 0x66D9, 0xDFF6, 0x66F8,
07839     0xDFF7, 0x6816, 0xDFF8, 0x68F2, 0xDFF9, 0x7280, 0xDFFA, 0x745E,
07840     0xDFFB, 0x7B6E, 0xDFFC, 0x7D6E, 0xDFFD, 0x7DD6, 0xDFFE, 0x7F72,
07841     0xE0A1, 0x80E5, 0xE0A2, 0x8212, 0xE0A3, 0x85AF, 0xE0A4, 0x897F,
07842     0xE0A5, 0x8A93, 0xE0A6, 0x901D, 0xE0A7, 0x92E4, 0xE0A8, 0x9ECD,
07843     0xE0A9, 0x9F20, 0xE0AA, 0x5915, 0xE0AB, 0x596D, 0xE0AC, 0x5E2D,
07844     0xE0AD, 0x60DC, 0xE0AE, 0x6614, 0xE0AF, 0x6673, 0xE0B0, 0x6790,
07845     0xE0B1, 0x6C50, 0xE0B2, 0x6DC5, 0xE0B3, 0x6F5F, 0xE0B4, 0x77F3,
07846     0xE0B5, 0x78A9, 0xE0B6, 0x84C6, 0xE0B7, 0x91CB, 0xE0B8, 0x932B,
07847     0xE0B9, 0x4ED9, 0xE0BA, 0x50CA, 0xE0BB, 0x5148, 0xE0BC, 0x5584,
07848     0xE0BD, 0x5B0B, 0xE0BE, 0x5BA3, 0xE0BF, 0x6247, 0xE0C0, 0x657E,
07849     0xE0C1, 0x65CB, 0xE0C2, 0x6E32, 0xE0C3, 0x717D, 0xE0C4, 0x7401,
07850     0xE0C5, 0x7444, 0xE0C6, 0x7487, 0xE0C7, 0x74BF, 0xE0C8, 0x766C,
07851     0xE0C9, 0x79AA, 0xE0CA, 0x7DDA, 0xE0CB, 0x7E55, 0xE0CC, 0x7FA8,
07852     0xE0CD, 0x817A, 0xE0CE, 0x81B3, 0xE0CF, 0x8239, 0xE0D0, 0x861A,
07853     0xE0D1, 0x87EC, 0xE0D2, 0x8A75, 0xE0D3, 0x8DE3, 0xE0D4, 0x9078,
07854     0xE0D5, 0x9291, 0xE0D6, 0x9425, 0xE0D7, 0x994D, 0xE0D8, 0x9BAE,
07855     0xE0D9, 0x5368, 0xE0DA, 0x5C51, 0xE0DB, 0x6954, 0xE0DC, 0x6CC4,
07856     0xE0DD, 0x6D29, 0xE0DE, 0x6E2B, 0xE0DF, 0x820C, 0xE0E0, 0x859B,
07857     0xE0E1, 0x893B, 0xE0E2, 0x8A2D, 0xE0E3, 0x8AAA, 0xE0E4, 0x96EA,
07858     0xE0E5, 0x9F67, 0xE0E6, 0x5261, 0xE0E7, 0x66B9, 0xE0E8, 0x6BB2,
07859     0xE0E9, 0x7E96, 0xE0EA, 0x87FE, 0xE0EB, 0x8D0D, 0xE0EC, 0x9583,
07860     0xE0ED, 0x965D, 0xE0EE, 0x651D, 0xE0EF, 0x6D89, 0xE0F0, 0x71EE,
07861     0xE0F1, 0xF96E, 0xE0F2, 0x57CE, 0xE0F3, 0x59D3, 0xE0F4, 0x5BAC,
07862     0xE0F5, 0x6027, 0xE0F6, 0x60FA, 0xE0F7, 0x6210, 0xE0F8, 0x661F,
07863     0xE0F9, 0x665F, 0xE0FA, 0x7329, 0xE0FB, 0x73F9, 0xE0FC, 0x76DB,
07864     0xE0FD, 0x7701, 0xE0FE, 0x7B6C, 0xE1A1, 0x8056, 0xE1A2, 0x8072,
07865     0xE1A3, 0x8165, 0xE1A4, 0x8AA0, 0xE1A5, 0x9192, 0xE1A6, 0x4E16,
07866     0xE1A7, 0x52E2, 0xE1A8, 0x6B72, 0xE1A9, 0x6D17, 0xE1AA, 0x7A05,
07867     0xE1AB, 0x7B39, 0xE1AC, 0x7D30, 0xE1AD, 0xF96F, 0xE1AE, 0x8CB0,
07868     0xE1AF, 0x53EC, 0xE1B0, 0x562F, 0xE1B1, 0x5851, 0xE1B2, 0x5BB5,
07869     0xE1B3, 0x5C0F, 0xE1B4, 0x5C11, 0xE1B5, 0x5DE2, 0xE1B6, 0x6240,
07870     0xE1B7, 0x6383, 0xE1B8, 0x6414, 0xE1B9, 0x662D, 0xE1BA, 0x68B3,
07871     0xE1BB, 0x6CBC, 0xE1BC, 0x6D88, 0xE1BD, 0x6EAF, 0xE1BE, 0x701F,
07872     0xE1BF, 0x70A4, 0xE1C0, 0x71D2, 0xE1C1, 0x7526, 0xE1C2, 0x758F,
07873     0xE1C3, 0x758E, 0xE1C4, 0x7619, 0xE1C5, 0x7B11, 0xE1C6, 0x7BE0,
07874     0xE1C7, 0x7C2B, 0xE1C8, 0x7D20, 0xE1C9, 0x7D39, 0xE1CA, 0x852C,
07875     0xE1CB, 0x856D, 0xE1CC, 0x8607, 0xE1CD, 0x8A34, 0xE1CE, 0x900D,
07876     0xE1CF, 0x9061, 0xE1D0, 0x90B5, 0xE1D1, 0x92B7, 0xE1D2, 0x97F6,
07877     0xE1D3, 0x9A37, 0xE1D4, 0x4FD7, 0xE1D5, 0x5C6C, 0xE1D6, 0x675F,
07878     0xE1D7, 0x6D91, 0xE1D8, 0x7C9F, 0xE1D9, 0x7E8C, 0xE1DA, 0x8B16,
07879     0xE1DB, 0x8D16, 0xE1DC, 0x901F, 0xE1DD, 0x5B6B, 0xE1DE, 0x5DFD,
07880     0xE1DF, 0x640D, 0xE1E0, 0x84C0, 0xE1E1, 0x905C, 0xE1E2, 0x98E1,
07881     0xE1E3, 0x7387, 0xE1E4, 0x5B8B, 0xE1E5, 0x609A, 0xE1E6, 0x677E,
07882     0xE1E7, 0x6DDE, 0xE1E8, 0x8A1F, 0xE1E9, 0x8AA6, 0xE1EA, 0x9001,
07883     0xE1EB, 0x980C, 0xE1EC, 0x5237, 0xE1ED, 0xF970, 0xE1EE, 0x7051,
07884     0xE1EF, 0x788E, 0xE1F0, 0x9396, 0xE1F1, 0x8870, 0xE1F2, 0x91D7,
07885     0xE1F3, 0x4FEE, 0xE1F4, 0x53D7, 0xE1F5, 0x55FD, 0xE1F6, 0x56DA,
07886     0xE1F7, 0x5782, 0xE1F8, 0x58FD, 0xE1F9, 0x5AC2, 0xE1FA, 0x5B88,
07887     0xE1FB, 0x5CAB, 0xE1FC, 0x5CC0, 0xE1FD, 0x5E25, 0xE1FE, 0x6101,
07888     0xE2A1, 0x620D, 0xE2A2, 0x624B, 0xE2A3, 0x6388, 0xE2A4, 0x641C,
07889     0xE2A5, 0x6536, 0xE2A6, 0x6578, 0xE2A7, 0x6A39, 0xE2A8, 0x6B8A,
07890     0xE2A9, 0x6C34, 0xE2AA, 0x6D19, 0xE2AB, 0x6F31, 0xE2AC, 0x71E7,
07891     0xE2AD, 0x72E9, 0xE2AE, 0x7378, 0xE2AF, 0x7407, 0xE2B0, 0x74B2,
07892     0xE2B1, 0x7626, 0xE2B2, 0x7761, 0xE2B3, 0x79C0, 0xE2B4, 0x7A57,
07893     0xE2B5, 0x7AEA, 0xE2B6, 0x7CB9, 0xE2B7, 0x7D8F, 0xE2B8, 0x7DAC,
07894     0xE2B9, 0x7E61, 0xE2BA, 0x7F9E, 0xE2BB, 0x8129, 0xE2BC, 0x8331,
07895     0xE2BD, 0x8490, 0xE2BE, 0x84DA, 0xE2BF, 0x85EA, 0xE2C0, 0x8896,
07896     0xE2C1, 0x8AB0, 0xE2C2, 0x8B90, 0xE2C3, 0x8F38, 0xE2C4, 0x9042,
07897     0xE2C5, 0x9083, 0xE2C6, 0x916C, 0xE2C7, 0x9296, 0xE2C8, 0x92B9,
07898     0xE2C9, 0x968B, 0xE2CA, 0x96A7, 0xE2CB, 0x96A8, 0xE2CC, 0x96D6,
07899     0xE2CD, 0x9700, 0xE2CE, 0x9808, 0xE2CF, 0x9996, 0xE2D0, 0x9AD3,
07900     0xE2D1, 0x9B1A, 0xE2D2, 0x53D4, 0xE2D3, 0x587E, 0xE2D4, 0x5919,
07901     0xE2D5, 0x5B70, 0xE2D6, 0x5BBF, 0xE2D7, 0x6DD1, 0xE2D8, 0x6F5A,
07902     0xE2D9, 0x719F, 0xE2DA, 0x7421, 0xE2DB, 0x74B9, 0xE2DC, 0x8085,
07903     0xE2DD, 0x83FD, 0xE2DE, 0x5DE1, 0xE2DF, 0x5F87, 0xE2E0, 0x5FAA,
07904     0xE2E1, 0x6042, 0xE2E2, 0x65EC, 0xE2E3, 0x6812, 0xE2E4, 0x696F,
07905     0xE2E5, 0x6A53, 0xE2E6, 0x6B89, 0xE2E7, 0x6D35, 0xE2E8, 0x6DF3,
07906     0xE2E9, 0x73E3, 0xE2EA, 0x76FE, 0xE2EB, 0x77AC, 0xE2EC, 0x7B4D,
07907     0xE2ED, 0x7D14, 0xE2EE, 0x8123, 0xE2EF, 0x821C, 0xE2F0, 0x8340,
07908     0xE2F1, 0x84F4, 0xE2F2, 0x8563, 0xE2F3, 0x8A62, 0xE2F4, 0x8AC4,
07909     0xE2F5, 0x9187, 0xE2F6, 0x931E, 0xE2F7, 0x9806, 0xE2F8, 0x99B4,
07910     0xE2F9, 0x620C, 0xE2FA, 0x8853, 0xE2FB, 0x8FF0, 0xE2FC, 0x9265,
07911     0xE2FD, 0x5D07, 0xE2FE, 0x5D27, 0xE3A1, 0x5D69, 0xE3A2, 0x745F,
07912     0xE3A3, 0x819D, 0xE3A4, 0x8768, 0xE3A5, 0x6FD5, 0xE3A6, 0x62FE,
07913     0xE3A7, 0x7FD2, 0xE3A8, 0x8936, 0xE3A9, 0x8972, 0xE3AA, 0x4E1E,
07914     0xE3AB, 0x4E58, 0xE3AC, 0x50E7, 0xE3AD, 0x52DD, 0xE3AE, 0x5347,
07915     0xE3AF, 0x627F, 0xE3B0, 0x6607, 0xE3B1, 0x7E69, 0xE3B2, 0x8805,
07916     0xE3B3, 0x965E, 0xE3B4, 0x4F8D, 0xE3B5, 0x5319, 0xE3B6, 0x5636,
07917     0xE3B7, 0x59CB, 0xE3B8, 0x5AA4, 0xE3B9, 0x5C38, 0xE3BA, 0x5C4E,
07918     0xE3BB, 0x5C4D, 0xE3BC, 0x5E02, 0xE3BD, 0x5F11, 0xE3BE, 0x6043,
07919     0xE3BF, 0x65BD, 0xE3C0, 0x662F, 0xE3C1, 0x6642, 0xE3C2, 0x67BE,
07920     0xE3C3, 0x67F4, 0xE3C4, 0x731C, 0xE3C5, 0x77E2, 0xE3C6, 0x793A,
07921     0xE3C7, 0x7FC5, 0xE3C8, 0x8494, 0xE3C9, 0x84CD, 0xE3CA, 0x8996,
07922     0xE3CB, 0x8A66, 0xE3CC, 0x8A69, 0xE3CD, 0x8AE1, 0xE3CE, 0x8C55,
07923     0xE3CF, 0x8C7A, 0xE3D0, 0x57F4, 0xE3D1, 0x5BD4, 0xE3D2, 0x5F0F,
07924     0xE3D3, 0x606F, 0xE3D4, 0x62ED, 0xE3D5, 0x690D, 0xE3D6, 0x6B96,
07925     0xE3D7, 0x6E5C, 0xE3D8, 0x7184, 0xE3D9, 0x7BD2, 0xE3DA, 0x8755,
07926     0xE3DB, 0x8B58, 0xE3DC, 0x8EFE, 0xE3DD, 0x98DF, 0xE3DE, 0x98FE,
07927     0xE3DF, 0x4F38, 0xE3E0, 0x4F81, 0xE3E1, 0x4FE1, 0xE3E2, 0x547B,
07928     0xE3E3, 0x5A20, 0xE3E4, 0x5BB8, 0xE3E5, 0x613C, 0xE3E6, 0x65B0,
07929     0xE3E7, 0x6668, 0xE3E8, 0x71FC, 0xE3E9, 0x7533, 0xE3EA, 0x795E,
07930     0xE3EB, 0x7D33, 0xE3EC, 0x814E, 0xE3ED, 0x81E3, 0xE3EE, 0x8398,
07931     0xE3EF, 0x85AA, 0xE3F0, 0x85CE, 0xE3F1, 0x8703, 0xE3F2, 0x8A0A,
07932     0xE3F3, 0x8EAB, 0xE3F4, 0x8F9B, 0xE3F5, 0xF971, 0xE3F6, 0x8FC5,
07933     0xE3F7, 0x5931, 0xE3F8, 0x5BA4, 0xE3F9, 0x5BE6, 0xE3FA, 0x6089,
07934     0xE3FB, 0x5BE9, 0xE3FC, 0x5C0B, 0xE3FD, 0x5FC3, 0xE3FE, 0x6C81,
07935     0xE4A1, 0xF972, 0xE4A2, 0x6DF1, 0xE4A3, 0x700B, 0xE4A4, 0x751A,
07936     0xE4A5, 0x82AF, 0xE4A6, 0x8AF6, 0xE4A7, 0x4EC0, 0xE4A8, 0x5341,
07937     0xE4A9, 0xF973, 0xE4AA, 0x96D9, 0xE4AB, 0x6C0F, 0xE4AC, 0x4E9E,
07938     0xE4AD, 0x4FC4, 0xE4AE, 0x5152, 0xE4AF, 0x555E, 0xE4B0, 0x5A25,
07939     0xE4B1, 0x5CE8, 0xE4B2, 0x6211, 0xE4B3, 0x7259, 0xE4B4, 0x82BD,
07940     0xE4B5, 0x83AA, 0xE4B6, 0x86FE, 0xE4B7, 0x8859, 0xE4B8, 0x8A1D,
07941     0xE4B9, 0x963F, 0xE4BA, 0x96C5, 0xE4BB, 0x9913, 0xE4BC, 0x9D09,
07942     0xE4BD, 0x9D5D, 0xE4BE, 0x580A, 0xE4BF, 0x5CB3, 0xE4C0, 0x5DBD,
07943     0xE4C1, 0x5E44, 0xE4C2, 0x60E1, 0xE4C3, 0x6115, 0xE4C4, 0x63E1,
07944     0xE4C5, 0x6A02, 0xE4C6, 0x6E25, 0xE4C7, 0x9102, 0xE4C8, 0x9354,
07945     0xE4C9, 0x984E, 0xE4CA, 0x9C10, 0xE4CB, 0x9F77, 0xE4CC, 0x5B89,
07946     0xE4CD, 0x5CB8, 0xE4CE, 0x6309, 0xE4CF, 0x664F, 0xE4D0, 0x6848,
07947     0xE4D1, 0x773C, 0xE4D2, 0x96C1, 0xE4D3, 0x978D, 0xE4D4, 0x9854,
07948     0xE4D5, 0x9B9F, 0xE4D6, 0x65A1, 0xE4D7, 0x8B01, 0xE4D8, 0x8ECB,
07949     0xE4D9, 0x95BC, 0xE4DA, 0x5535, 0xE4DB, 0x5CA9, 0xE4DC, 0x5DD6,
07950     0xE4DD, 0x5EB5, 0xE4DE, 0x6697, 0xE4DF, 0x764C, 0xE4E0, 0x83F4,
07951     0xE4E1, 0x95C7, 0xE4E2, 0x58D3, 0xE4E3, 0x62BC, 0xE4E4, 0x72CE,
07952     0xE4E5, 0x9D28, 0xE4E6, 0x4EF0, 0xE4E7, 0x592E, 0xE4E8, 0x600F,
07953     0xE4E9, 0x663B, 0xE4EA, 0x6B83, 0xE4EB, 0x79E7, 0xE4EC, 0x9D26,
07954     0xE4ED, 0x5393, 0xE4EE, 0x54C0, 0xE4EF, 0x57C3, 0xE4F0, 0x5D16,
07955     0xE4F1, 0x611B, 0xE4F2, 0x66D6, 0xE4F3, 0x6DAF, 0xE4F4, 0x788D,
07956     0xE4F5, 0x827E, 0xE4F6, 0x9698, 0xE4F7, 0x9744, 0xE4F8, 0x5384,
07957     0xE4F9, 0x627C, 0xE4FA, 0x6396, 0xE4FB, 0x6DB2, 0xE4FC, 0x7E0A,
07958     0xE4FD, 0x814B, 0xE4FE, 0x984D, 0xE5A1, 0x6AFB, 0xE5A2, 0x7F4C,
07959     0xE5A3, 0x9DAF, 0xE5A4, 0x9E1A, 0xE5A5, 0x4E5F, 0xE5A6, 0x503B,
07960     0xE5A7, 0x51B6, 0xE5A8, 0x591C, 0xE5A9, 0x60F9, 0xE5AA, 0x63F6,
07961     0xE5AB, 0x6930, 0xE5AC, 0x723A, 0xE5AD, 0x8036, 0xE5AE, 0xF974,
07962     0xE5AF, 0x91CE, 0xE5B0, 0x5F31, 0xE5B1, 0xF975, 0xE5B2, 0xF976,
07963     0xE5B3, 0x7D04, 0xE5B4, 0x82E5, 0xE5B5, 0x846F, 0xE5B6, 0x84BB,
07964     0xE5B7, 0x85E5, 0xE5B8, 0x8E8D, 0xE5B9, 0xF977, 0xE5BA, 0x4F6F,
07965     0xE5BB, 0xF978, 0xE5BC, 0xF979, 0xE5BD, 0x58E4, 0xE5BE, 0x5B43,
07966     0xE5BF, 0x6059, 0xE5C0, 0x63DA, 0xE5C1, 0x6518, 0xE5C2, 0x656D,
07967     0xE5C3, 0x6698, 0xE5C4, 0xF97A, 0xE5C5, 0x694A, 0xE5C6, 0x6A23,
07968     0xE5C7, 0x6D0B, 0xE5C8, 0x7001, 0xE5C9, 0x716C, 0xE5CA, 0x75D2,
07969     0xE5CB, 0x760D, 0xE5CC, 0x79B3, 0xE5CD, 0x7A70, 0xE5CE, 0xF97B,
07970     0xE5CF, 0x7F8A, 0xE5D0, 0xF97C, 0xE5D1, 0x8944, 0xE5D2, 0xF97D,
07971     0xE5D3, 0x8B93, 0xE5D4, 0x91C0, 0xE5D5, 0x967D, 0xE5D6, 0xF97E,
07972     0xE5D7, 0x990A, 0xE5D8, 0x5704, 0xE5D9, 0x5FA1, 0xE5DA, 0x65BC,
07973     0xE5DB, 0x6F01, 0xE5DC, 0x7600, 0xE5DD, 0x79A6, 0xE5DE, 0x8A9E,
07974     0xE5DF, 0x99AD, 0xE5E0, 0x9B5A, 0xE5E1, 0x9F6C, 0xE5E2, 0x5104,
07975     0xE5E3, 0x61B6, 0xE5E4, 0x6291, 0xE5E5, 0x6A8D, 0xE5E6, 0x81C6,
07976     0xE5E7, 0x5043, 0xE5E8, 0x5830, 0xE5E9, 0x5F66, 0xE5EA, 0x7109,
07977     0xE5EB, 0x8A00, 0xE5EC, 0x8AFA, 0xE5ED, 0x5B7C, 0xE5EE, 0x8616,
07978     0xE5EF, 0x4FFA, 0xE5F0, 0x513C, 0xE5F1, 0x56B4, 0xE5F2, 0x5944,
07979     0xE5F3, 0x63A9, 0xE5F4, 0x6DF9, 0xE5F5, 0x5DAA, 0xE5F6, 0x696D,
07980     0xE5F7, 0x5186, 0xE5F8, 0x4E88, 0xE5F9, 0x4F59, 0xE5FA, 0xF97F,
07981     0xE5FB, 0xF980, 0xE5FC, 0xF981, 0xE5FD, 0x5982, 0xE5FE, 0xF982,
07982     0xE6A1, 0xF983, 0xE6A2, 0x6B5F, 0xE6A3, 0x6C5D, 0xE6A4, 0xF984,
07983     0xE6A5, 0x74B5, 0xE6A6, 0x7916, 0xE6A7, 0xF985, 0xE6A8, 0x8207,
07984     0xE6A9, 0x8245, 0xE6AA, 0x8339, 0xE6AB, 0x8F3F, 0xE6AC, 0x8F5D,
07985     0xE6AD, 0xF986, 0xE6AE, 0x9918, 0xE6AF, 0xF987, 0xE6B0, 0xF988,
07986     0xE6B1, 0xF989, 0xE6B2, 0x4EA6, 0xE6B3, 0xF98A, 0xE6B4, 0x57DF,
07987     0xE6B5, 0x5F79, 0xE6B6, 0x6613, 0xE6B7, 0xF98B, 0xE6B8, 0xF98C,
07988     0xE6B9, 0x75AB, 0xE6BA, 0x7E79, 0xE6BB, 0x8B6F, 0xE6BC, 0xF98D,
07989     0xE6BD, 0x9006, 0xE6BE, 0x9A5B, 0xE6BF, 0x56A5, 0xE6C0, 0x5827,
07990     0xE6C1, 0x59F8, 0xE6C2, 0x5A1F, 0xE6C3, 0x5BB4, 0xE6C4, 0xF98E,
07991     0xE6C5, 0x5EF6, 0xE6C6, 0xF98F, 0xE6C7, 0xF990, 0xE6C8, 0x6350,
07992     0xE6C9, 0x633B, 0xE6CA, 0xF991, 0xE6CB, 0x693D, 0xE6CC, 0x6C87,
07993     0xE6CD, 0x6CBF, 0xE6CE, 0x6D8E, 0xE6CF, 0x6D93, 0xE6D0, 0x6DF5,
07994     0xE6D1, 0x6F14, 0xE6D2, 0xF992, 0xE6D3, 0x70DF, 0xE6D4, 0x7136,
07995     0xE6D5, 0x7159, 0xE6D6, 0xF993, 0xE6D7, 0x71C3, 0xE6D8, 0x71D5,
07996     0xE6D9, 0xF994, 0xE6DA, 0x784F, 0xE6DB, 0x786F, 0xE6DC, 0xF995,
07997     0xE6DD, 0x7B75, 0xE6DE, 0x7DE3, 0xE6DF, 0xF996, 0xE6E0, 0x7E2F,
07998     0xE6E1, 0xF997, 0xE6E2, 0x884D, 0xE6E3, 0x8EDF, 0xE6E4, 0xF998,
07999     0xE6E5, 0xF999, 0xE6E6, 0xF99A, 0xE6E7, 0x925B, 0xE6E8, 0xF99B,
08000     0xE6E9, 0x9CF6, 0xE6EA, 0xF99C, 0xE6EB, 0xF99D, 0xE6EC, 0xF99E,
08001     0xE6ED, 0x6085, 0xE6EE, 0x6D85, 0xE6EF, 0xF99F, 0xE6F0, 0x71B1,
08002     0xE6F1, 0xF9A0, 0xE6F2, 0xF9A1, 0xE6F3, 0x95B1, 0xE6F4, 0x53AD,
08003     0xE6F5, 0xF9A2, 0xE6F6, 0xF9A3, 0xE6F7, 0xF9A4, 0xE6F8, 0x67D3,
08004     0xE6F9, 0xF9A5, 0xE6FA, 0x708E, 0xE6FB, 0x7130, 0xE6FC, 0x7430,
08005     0xE6FD, 0x8276, 0xE6FE, 0x82D2, 0xE7A1, 0xF9A6, 0xE7A2, 0x95BB,
08006     0xE7A3, 0x9AE5, 0xE7A4, 0x9E7D, 0xE7A5, 0x66C4, 0xE7A6, 0xF9A7,
08007     0xE7A7, 0x71C1, 0xE7A8, 0x8449, 0xE7A9, 0xF9A8, 0xE7AA, 0xF9A9,
08008     0xE7AB, 0x584B, 0xE7AC, 0xF9AA, 0xE7AD, 0xF9AB, 0xE7AE, 0x5DB8,
08009     0xE7AF, 0x5F71, 0xE7B0, 0xF9AC, 0xE7B1, 0x6620, 0xE7B2, 0x668E,
08010     0xE7B3, 0x6979, 0xE7B4, 0x69AE, 0xE7B5, 0x6C38, 0xE7B6, 0x6CF3,
08011     0xE7B7, 0x6E36, 0xE7B8, 0x6F41, 0xE7B9, 0x6FDA, 0xE7BA, 0x701B,
08012     0xE7BB, 0x702F, 0xE7BC, 0x7150, 0xE7BD, 0x71DF, 0xE7BE, 0x7370,
08013     0xE7BF, 0xF9AD, 0xE7C0, 0x745B, 0xE7C1, 0xF9AE, 0xE7C2, 0x74D4,
08014     0xE7C3, 0x76C8, 0xE7C4, 0x7A4E, 0xE7C5, 0x7E93, 0xE7C6, 0xF9AF,
08015     0xE7C7, 0xF9B0, 0xE7C8, 0x82F1, 0xE7C9, 0x8A60, 0xE7CA, 0x8FCE,
08016     0xE7CB, 0xF9B1, 0xE7CC, 0x9348, 0xE7CD, 0xF9B2, 0xE7CE, 0x9719,
08017     0xE7CF, 0xF9B3, 0xE7D0, 0xF9B4, 0xE7D1, 0x4E42, 0xE7D2, 0x502A,
08018     0xE7D3, 0xF9B5, 0xE7D4, 0x5208, 0xE7D5, 0x53E1, 0xE7D6, 0x66F3,
08019     0xE7D7, 0x6C6D, 0xE7D8, 0x6FCA, 0xE7D9, 0x730A, 0xE7DA, 0x777F,
08020     0xE7DB, 0x7A62, 0xE7DC, 0x82AE, 0xE7DD, 0x85DD, 0xE7DE, 0x8602,
08021     0xE7DF, 0xF9B6, 0xE7E0, 0x88D4, 0xE7E1, 0x8A63, 0xE7E2, 0x8B7D,
08022     0xE7E3, 0x8C6B, 0xE7E4, 0xF9B7, 0xE7E5, 0x92B3, 0xE7E6, 0xF9B8,
08023     0xE7E7, 0x9713, 0xE7E8, 0x9810, 0xE7E9, 0x4E94, 0xE7EA, 0x4F0D,
08024     0xE7EB, 0x4FC9, 0xE7EC, 0x50B2, 0xE7ED, 0x5348, 0xE7EE, 0x543E,
08025     0xE7EF, 0x5433, 0xE7F0, 0x55DA, 0xE7F1, 0x5862, 0xE7F2, 0x58BA,
08026     0xE7F3, 0x5967, 0xE7F4, 0x5A1B, 0xE7F5, 0x5BE4, 0xE7F6, 0x609F,
08027     0xE7F7, 0xF9B9, 0xE7F8, 0x61CA, 0xE7F9, 0x6556, 0xE7FA, 0x65FF,
08028     0xE7FB, 0x6664, 0xE7FC, 0x68A7, 0xE7FD, 0x6C5A, 0xE7FE, 0x6FB3,
08029     0xE8A1, 0x70CF, 0xE8A2, 0x71AC, 0xE8A3, 0x7352, 0xE8A4, 0x7B7D,
08030     0xE8A5, 0x8708, 0xE8A6, 0x8AA4, 0xE8A7, 0x9C32, 0xE8A8, 0x9F07,
08031     0xE8A9, 0x5C4B, 0xE8AA, 0x6C83, 0xE8AB, 0x7344, 0xE8AC, 0x7389,
08032     0xE8AD, 0x923A, 0xE8AE, 0x6EAB, 0xE8AF, 0x7465, 0xE8B0, 0x761F,
08033     0xE8B1, 0x7A69, 0xE8B2, 0x7E15, 0xE8B3, 0x860A, 0xE8B4, 0x5140,
08034     0xE8B5, 0x58C5, 0xE8B6, 0x64C1, 0xE8B7, 0x74EE, 0xE8B8, 0x7515,
08035     0xE8B9, 0x7670, 0xE8BA, 0x7FC1, 0xE8BB, 0x9095, 0xE8BC, 0x96CD,
08036     0xE8BD, 0x9954, 0xE8BE, 0x6E26, 0xE8BF, 0x74E6, 0xE8C0, 0x7AA9,
08037     0xE8C1, 0x7AAA, 0xE8C2, 0x81E5, 0xE8C3, 0x86D9, 0xE8C4, 0x8778,
08038     0xE8C5, 0x8A1B, 0xE8C6, 0x5A49, 0xE8C7, 0x5B8C, 0xE8C8, 0x5B9B,
08039     0xE8C9, 0x68A1, 0xE8CA, 0x6900, 0xE8CB, 0x6D63, 0xE8CC, 0x73A9,
08040     0xE8CD, 0x7413, 0xE8CE, 0x742C, 0xE8CF, 0x7897, 0xE8D0, 0x7DE9,
08041     0xE8D1, 0x7FEB, 0xE8D2, 0x8118, 0xE8D3, 0x8155, 0xE8D4, 0x839E,
08042     0xE8D5, 0x8C4C, 0xE8D6, 0x962E, 0xE8D7, 0x9811, 0xE8D8, 0x66F0,
08043     0xE8D9, 0x5F80, 0xE8DA, 0x65FA, 0xE8DB, 0x6789, 0xE8DC, 0x6C6A,
08044     0xE8DD, 0x738B, 0xE8DE, 0x502D, 0xE8DF, 0x5A03, 0xE8E0, 0x6B6A,
08045     0xE8E1, 0x77EE, 0xE8E2, 0x5916, 0xE8E3, 0x5D6C, 0xE8E4, 0x5DCD,
08046     0xE8E5, 0x7325, 0xE8E6, 0x754F, 0xE8E7, 0xF9BA, 0xE8E8, 0xF9BB,
08047     0xE8E9, 0x50E5, 0xE8EA, 0x51F9, 0xE8EB, 0x582F, 0xE8EC, 0x592D,
08048     0xE8ED, 0x5996, 0xE8EE, 0x59DA, 0xE8EF, 0x5BE5, 0xE8F0, 0xF9BC,
08049     0xE8F1, 0xF9BD, 0xE8F2, 0x5DA2, 0xE8F3, 0x62D7, 0xE8F4, 0x6416,
08050     0xE8F5, 0x6493, 0xE8F6, 0x64FE, 0xE8F7, 0xF9BE, 0xE8F8, 0x66DC,
08051     0xE8F9, 0xF9BF, 0xE8FA, 0x6A48, 0xE8FB, 0xF9C0, 0xE8FC, 0x71FF,
08052     0xE8FD, 0x7464, 0xE8FE, 0xF9C1, 0xE9A1, 0x7A88, 0xE9A2, 0x7AAF,
08053     0xE9A3, 0x7E47, 0xE9A4, 0x7E5E, 0xE9A5, 0x8000, 0xE9A6, 0x8170,
08054     0xE9A7, 0xF9C2, 0xE9A8, 0x87EF, 0xE9A9, 0x8981, 0xE9AA, 0x8B20,
08055     0xE9AB, 0x9059, 0xE9AC, 0xF9C3, 0xE9AD, 0x9080, 0xE9AE, 0x9952,
08056     0xE9AF, 0x617E, 0xE9B0, 0x6B32, 0xE9B1, 0x6D74, 0xE9B2, 0x7E1F,
08057     0xE9B3, 0x8925, 0xE9B4, 0x8FB1, 0xE9B5, 0x4FD1, 0xE9B6, 0x50AD,
08058     0xE9B7, 0x5197, 0xE9B8, 0x52C7, 0xE9B9, 0x57C7, 0xE9BA, 0x5889,
08059     0xE9BB, 0x5BB9, 0xE9BC, 0x5EB8, 0xE9BD, 0x6142, 0xE9BE, 0x6995,
08060     0xE9BF, 0x6D8C, 0xE9C0, 0x6E67, 0xE9C1, 0x6EB6, 0xE9C2, 0x7194,
08061     0xE9C3, 0x7462, 0xE9C4, 0x7528, 0xE9C5, 0x752C, 0xE9C6, 0x8073,
08062     0xE9C7, 0x8338, 0xE9C8, 0x84C9, 0xE9C9, 0x8E0A, 0xE9CA, 0x9394,
08063     0xE9CB, 0x93DE, 0xE9CC, 0xF9C4, 0xE9CD, 0x4E8E, 0xE9CE, 0x4F51,
08064     0xE9CF, 0x5076, 0xE9D0, 0x512A, 0xE9D1, 0x53C8, 0xE9D2, 0x53CB,
08065     0xE9D3, 0x53F3, 0xE9D4, 0x5B87, 0xE9D5, 0x5BD3, 0xE9D6, 0x5C24,
08066     0xE9D7, 0x611A, 0xE9D8, 0x6182, 0xE9D9, 0x65F4, 0xE9DA, 0x725B,
08067     0xE9DB, 0x7397, 0xE9DC, 0x7440, 0xE9DD, 0x76C2, 0xE9DE, 0x7950,
08068     0xE9DF, 0x7991, 0xE9E0, 0x79B9, 0xE9E1, 0x7D06, 0xE9E2, 0x7FBD,
08069     0xE9E3, 0x828B, 0xE9E4, 0x85D5, 0xE9E5, 0x865E, 0xE9E6, 0x8FC2,
08070     0xE9E7, 0x9047, 0xE9E8, 0x90F5, 0xE9E9, 0x91EA, 0xE9EA, 0x9685,
08071     0xE9EB, 0x96E8, 0xE9EC, 0x96E9, 0xE9ED, 0x52D6, 0xE9EE, 0x5F67,
08072     0xE9EF, 0x65ED, 0xE9F0, 0x6631, 0xE9F1, 0x682F, 0xE9F2, 0x715C,
08073     0xE9F3, 0x7A36, 0xE9F4, 0x90C1, 0xE9F5, 0x980A, 0xE9F6, 0x4E91,
08074     0xE9F7, 0xF9C5, 0xE9F8, 0x6A52, 0xE9F9, 0x6B9E, 0xE9FA, 0x6F90,
08075     0xE9FB, 0x7189, 0xE9FC, 0x8018, 0xE9FD, 0x82B8, 0xE9FE, 0x8553,
08076     0xEAA1, 0x904B, 0xEAA2, 0x9695, 0xEAA3, 0x96F2, 0xEAA4, 0x97FB,
08077     0xEAA5, 0x851A, 0xEAA6, 0x9B31, 0xEAA7, 0x4E90, 0xEAA8, 0x718A,
08078     0xEAA9, 0x96C4, 0xEAAA, 0x5143, 0xEAAB, 0x539F, 0xEAAC, 0x54E1,
08079     0xEAAD, 0x5713, 0xEAAE, 0x5712, 0xEAAF, 0x57A3, 0xEAB0, 0x5A9B,
08080     0xEAB1, 0x5AC4, 0xEAB2, 0x5BC3, 0xEAB3, 0x6028, 0xEAB4, 0x613F,
08081     0xEAB5, 0x63F4, 0xEAB6, 0x6C85, 0xEAB7, 0x6D39, 0xEAB8, 0x6E72,
08082     0xEAB9, 0x6E90, 0xEABA, 0x7230, 0xEABB, 0x733F, 0xEABC, 0x7457,
08083     0xEABD, 0x82D1, 0xEABE, 0x8881, 0xEABF, 0x8F45, 0xEAC0, 0x9060,
08084     0xEAC1, 0xF9C6, 0xEAC2, 0x9662, 0xEAC3, 0x9858, 0xEAC4, 0x9D1B,
08085     0xEAC5, 0x6708, 0xEAC6, 0x8D8A, 0xEAC7, 0x925E, 0xEAC8, 0x4F4D,
08086     0xEAC9, 0x5049, 0xEACA, 0x50DE, 0xEACB, 0x5371, 0xEACC, 0x570D,
08087     0xEACD, 0x59D4, 0xEACE, 0x5A01, 0xEACF, 0x5C09, 0xEAD0, 0x6170,
08088     0xEAD1, 0x6690, 0xEAD2, 0x6E2D, 0xEAD3, 0x7232, 0xEAD4, 0x744B,
08089     0xEAD5, 0x7DEF, 0xEAD6, 0x80C3, 0xEAD7, 0x840E, 0xEAD8, 0x8466,
08090     0xEAD9, 0x853F, 0xEADA, 0x875F, 0xEADB, 0x885B, 0xEADC, 0x8918,
08091     0xEADD, 0x8B02, 0xEADE, 0x9055, 0xEADF, 0x97CB, 0xEAE0, 0x9B4F,
08092     0xEAE1, 0x4E73, 0xEAE2, 0x4F91, 0xEAE3, 0x5112, 0xEAE4, 0x516A,
08093     0xEAE5, 0xF9C7, 0xEAE6, 0x552F, 0xEAE7, 0x55A9, 0xEAE8, 0x5B7A,
08094     0xEAE9, 0x5BA5, 0xEAEA, 0x5E7C, 0xEAEB, 0x5E7D, 0xEAEC, 0x5EBE,
08095     0xEAED, 0x60A0, 0xEAEE, 0x60DF, 0xEAEF, 0x6108, 0xEAF0, 0x6109,
08096     0xEAF1, 0x63C4, 0xEAF2, 0x6538, 0xEAF3, 0x6709, 0xEAF4, 0xF9C8,
08097     0xEAF5, 0x67D4, 0xEAF6, 0x67DA, 0xEAF7, 0xF9C9, 0xEAF8, 0x6961,
08098     0xEAF9, 0x6962, 0xEAFA, 0x6CB9, 0xEAFB, 0x6D27, 0xEAFC, 0xF9CA,
08099     0xEAFD, 0x6E38, 0xEAFE, 0xF9CB, 0xEBA1, 0x6FE1, 0xEBA2, 0x7336,
08100     0xEBA3, 0x7337, 0xEBA4, 0xF9CC, 0xEBA5, 0x745C, 0xEBA6, 0x7531,
08101     0xEBA7, 0xF9CD, 0xEBA8, 0x7652, 0xEBA9, 0xF9CE, 0xEBAA, 0xF9CF,
08102     0xEBAB, 0x7DAD, 0xEBAC, 0x81FE, 0xEBAD, 0x8438, 0xEBAE, 0x88D5,
08103     0xEBAF, 0x8A98, 0xEBB0, 0x8ADB, 0xEBB1, 0x8AED, 0xEBB2, 0x8E30,
08104     0xEBB3, 0x8E42, 0xEBB4, 0x904A, 0xEBB5, 0x903E, 0xEBB6, 0x907A,
08105     0xEBB7, 0x9149, 0xEBB8, 0x91C9, 0xEBB9, 0x936E, 0xEBBA, 0xF9D0,
08106     0xEBBB, 0xF9D1, 0xEBBC, 0x5809, 0xEBBD, 0xF9D2, 0xEBBE, 0x6BD3,
08107     0xEBBF, 0x8089, 0xEBC0, 0x80B2, 0xEBC1, 0xF9D3, 0xEBC2, 0xF9D4,
08108     0xEBC3, 0x5141, 0xEBC4, 0x596B, 0xEBC5, 0x5C39, 0xEBC6, 0xF9D5,
08109     0xEBC7, 0xF9D6, 0xEBC8, 0x6F64, 0xEBC9, 0x73A7, 0xEBCA, 0x80E4,
08110     0xEBCB, 0x8D07, 0xEBCC, 0xF9D7, 0xEBCD, 0x9217, 0xEBCE, 0x958F,
08111     0xEBCF, 0xF9D8, 0xEBD0, 0xF9D9, 0xEBD1, 0xF9DA, 0xEBD2, 0xF9DB,
08112     0xEBD3, 0x807F, 0xEBD4, 0x620E, 0xEBD5, 0x701C, 0xEBD6, 0x7D68,
08113     0xEBD7, 0x878D, 0xEBD8, 0xF9DC, 0xEBD9, 0x57A0, 0xEBDA, 0x6069,
08114     0xEBDB, 0x6147, 0xEBDC, 0x6BB7, 0xEBDD, 0x8ABE, 0xEBDE, 0x9280,
08115     0xEBDF, 0x96B1, 0xEBE0, 0x4E59, 0xEBE1, 0x541F, 0xEBE2, 0x6DEB,
08116     0xEBE3, 0x852D, 0xEBE4, 0x9670, 0xEBE5, 0x97F3, 0xEBE6, 0x98EE,
08117     0xEBE7, 0x63D6, 0xEBE8, 0x6CE3, 0xEBE9, 0x9091, 0xEBEA, 0x51DD,
08118     0xEBEB, 0x61C9, 0xEBEC, 0x81BA, 0xEBED, 0x9DF9, 0xEBEE, 0x4F9D,
08119     0xEBEF, 0x501A, 0xEBF0, 0x5100, 0xEBF1, 0x5B9C, 0xEBF2, 0x610F,
08120     0xEBF3, 0x61FF, 0xEBF4, 0x64EC, 0xEBF5, 0x6905, 0xEBF6, 0x6BC5,
08121     0xEBF7, 0x7591, 0xEBF8, 0x77E3, 0xEBF9, 0x7FA9, 0xEBFA, 0x8264,
08122     0xEBFB, 0x858F, 0xEBFC, 0x87FB, 0xEBFD, 0x8863, 0xEBFE, 0x8ABC,
08123     0xECA1, 0x8B70, 0xECA2, 0x91AB, 0xECA3, 0x4E8C, 0xECA4, 0x4EE5,
08124     0xECA5, 0x4F0A, 0xECA6, 0xF9DD, 0xECA7, 0xF9DE, 0xECA8, 0x5937,
08125     0xECA9, 0x59E8, 0xECAA, 0xF9DF, 0xECAB, 0x5DF2, 0xECAC, 0x5F1B,
08126     0xECAD, 0x5F5B, 0xECAE, 0x6021, 0xECAF, 0xF9E0, 0xECB0, 0xF9E1,
08127     0xECB1, 0xF9E2, 0xECB2, 0xF9E3, 0xECB3, 0x723E, 0xECB4, 0x73E5,
08128     0xECB5, 0xF9E4, 0xECB6, 0x7570, 0xECB7, 0x75CD, 0xECB8, 0xF9E5,
08129     0xECB9, 0x79FB, 0xECBA, 0xF9E6, 0xECBB, 0x800C, 0xECBC, 0x8033,
08130     0xECBD, 0x8084, 0xECBE, 0x82E1, 0xECBF, 0x8351, 0xECC0, 0xF9E7,
08131     0xECC1, 0xF9E8, 0xECC2, 0x8CBD, 0xECC3, 0x8CB3, 0xECC4, 0x9087,
08132     0xECC5, 0xF9E9, 0xECC6, 0xF9EA, 0xECC7, 0x98F4, 0xECC8, 0x990C,
08133     0xECC9, 0xF9EB, 0xECCA, 0xF9EC, 0xECCB, 0x7037, 0xECCC, 0x76CA,
08134     0xECCD, 0x7FCA, 0xECCE, 0x7FCC, 0xECCF, 0x7FFC, 0xECD0, 0x8B1A,
08135     0xECD1, 0x4EBA, 0xECD2, 0x4EC1, 0xECD3, 0x5203, 0xECD4, 0x5370,
08136     0xECD5, 0xF9ED, 0xECD6, 0x54BD, 0xECD7, 0x56E0, 0xECD8, 0x59FB,
08137     0xECD9, 0x5BC5, 0xECDA, 0x5F15, 0xECDB, 0x5FCD, 0xECDC, 0x6E6E,
08138     0xECDD, 0xF9EE, 0xECDE, 0xF9EF, 0xECDF, 0x7D6A, 0xECE0, 0x8335,
08139     0xECE1, 0xF9F0, 0xECE2, 0x8693, 0xECE3, 0x8A8D, 0xECE4, 0xF9F1,
08140     0xECE5, 0x976D, 0xECE6, 0x9777, 0xECE7, 0xF9F2, 0xECE8, 0xF9F3,
08141     0xECE9, 0x4E00, 0xECEA, 0x4F5A, 0xECEB, 0x4F7E, 0xECEC, 0x58F9,
08142     0xECED, 0x65E5, 0xECEE, 0x6EA2, 0xECEF, 0x9038, 0xECF0, 0x93B0,
08143     0xECF1, 0x99B9, 0xECF2, 0x4EFB, 0xECF3, 0x58EC, 0xECF4, 0x598A,
08144     0xECF5, 0x59D9, 0xECF6, 0x6041, 0xECF7, 0xF9F4, 0xECF8, 0xF9F5,
08145     0xECF9, 0x7A14, 0xECFA, 0xF9F6, 0xECFB, 0x834F, 0xECFC, 0x8CC3,
08146     0xECFD, 0x5165, 0xECFE, 0x5344, 0xEDA1, 0xF9F7, 0xEDA2, 0xF9F8,
08147     0xEDA3, 0xF9F9, 0xEDA4, 0x4ECD, 0xEDA5, 0x5269, 0xEDA6, 0x5B55,
08148     0xEDA7, 0x82BF, 0xEDA8, 0x4ED4, 0xEDA9, 0x523A, 0xEDAA, 0x54A8,
08149     0xEDAB, 0x59C9, 0xEDAC, 0x59FF, 0xEDAD, 0x5B50, 0xEDAE, 0x5B57,
08150     0xEDAF, 0x5B5C, 0xEDB0, 0x6063, 0xEDB1, 0x6148, 0xEDB2, 0x6ECB,
08151     0xEDB3, 0x7099, 0xEDB4, 0x716E, 0xEDB5, 0x7386, 0xEDB6, 0x74F7,
08152     0xEDB7, 0x75B5, 0xEDB8, 0x78C1, 0xEDB9, 0x7D2B, 0xEDBA, 0x8005,
08153     0xEDBB, 0x81EA, 0xEDBC, 0x8328, 0xEDBD, 0x8517, 0xEDBE, 0x85C9,
08154     0xEDBF, 0x8AEE, 0xEDC0, 0x8CC7, 0xEDC1, 0x96CC, 0xEDC2, 0x4F5C,
08155     0xEDC3, 0x52FA, 0xEDC4, 0x56BC, 0xEDC5, 0x65AB, 0xEDC6, 0x6628,
08156     0xEDC7, 0x707C, 0xEDC8, 0x70B8, 0xEDC9, 0x7235, 0xEDCA, 0x7DBD,
08157     0xEDCB, 0x828D, 0xEDCC, 0x914C, 0xEDCD, 0x96C0, 0xEDCE, 0x9D72,
08158     0xEDCF, 0x5B71, 0xEDD0, 0x68E7, 0xEDD1, 0x6B98, 0xEDD2, 0x6F7A,
08159     0xEDD3, 0x76DE, 0xEDD4, 0x5C91, 0xEDD5, 0x66AB, 0xEDD6, 0x6F5B,
08160     0xEDD7, 0x7BB4, 0xEDD8, 0x7C2A, 0xEDD9, 0x8836, 0xEDDA, 0x96DC,
08161     0xEDDB, 0x4E08, 0xEDDC, 0x4ED7, 0xEDDD, 0x5320, 0xEDDE, 0x5834,
08162     0xEDDF, 0x58BB, 0xEDE0, 0x58EF, 0xEDE1, 0x596C, 0xEDE2, 0x5C07,
08163     0xEDE3, 0x5E33, 0xEDE4, 0x5E84, 0xEDE5, 0x5F35, 0xEDE6, 0x638C,
08164     0xEDE7, 0x66B2, 0xEDE8, 0x6756, 0xEDE9, 0x6A1F, 0xEDEA, 0x6AA3,
08165     0xEDEB, 0x6B0C, 0xEDEC, 0x6F3F, 0xEDED, 0x7246, 0xEDEE, 0xF9FA,
08166     0xEDEF, 0x7350, 0xEDF0, 0x748B, 0xEDF1, 0x7AE0, 0xEDF2, 0x7CA7,
08167     0xEDF3, 0x8178, 0xEDF4, 0x81DF, 0xEDF5, 0x81E7, 0xEDF6, 0x838A,
08168     0xEDF7, 0x846C, 0xEDF8, 0x8523, 0xEDF9, 0x8594, 0xEDFA, 0x85CF,
08169     0xEDFB, 0x88DD, 0xEDFC, 0x8D13, 0xEDFD, 0x91AC, 0xEDFE, 0x9577,
08170     0xEEA1, 0x969C, 0xEEA2, 0x518D, 0xEEA3, 0x54C9, 0xEEA4, 0x5728,
08171     0xEEA5, 0x5BB0, 0xEEA6, 0x624D, 0xEEA7, 0x6750, 0xEEA8, 0x683D,
08172     0xEEA9, 0x6893, 0xEEAA, 0x6E3D, 0xEEAB, 0x6ED3, 0xEEAC, 0x707D,
08173     0xEEAD, 0x7E21, 0xEEAE, 0x88C1, 0xEEAF, 0x8CA1, 0xEEB0, 0x8F09,
08174     0xEEB1, 0x9F4B, 0xEEB2, 0x9F4E, 0xEEB3, 0x722D, 0xEEB4, 0x7B8F,
08175     0xEEB5, 0x8ACD, 0xEEB6, 0x931A, 0xEEB7, 0x4F47, 0xEEB8, 0x4F4E,
08176     0xEEB9, 0x5132, 0xEEBA, 0x5480, 0xEEBB, 0x59D0, 0xEEBC, 0x5E95,
08177     0xEEBD, 0x62B5, 0xEEBE, 0x6775, 0xEEBF, 0x696E, 0xEEC0, 0x6A17,
08178     0xEEC1, 0x6CAE, 0xEEC2, 0x6E1A, 0xEEC3, 0x72D9, 0xEEC4, 0x732A,
08179     0xEEC5, 0x75BD, 0xEEC6, 0x7BB8, 0xEEC7, 0x7D35, 0xEEC8, 0x82E7,
08180     0xEEC9, 0x83F9, 0xEECA, 0x8457, 0xEECB, 0x85F7, 0xEECC, 0x8A5B,
08181     0xEECD, 0x8CAF, 0xEECE, 0x8E87, 0xEECF, 0x9019, 0xEED0, 0x90B8,
08182     0xEED1, 0x96CE, 0xEED2, 0x9F5F, 0xEED3, 0x52E3, 0xEED4, 0x540A,
08183     0xEED5, 0x5AE1, 0xEED6, 0x5BC2, 0xEED7, 0x6458, 0xEED8, 0x6575,
08184     0xEED9, 0x6EF4, 0xEEDA, 0x72C4, 0xEEDB, 0xF9FB, 0xEEDC, 0x7684,
08185     0xEEDD, 0x7A4D, 0xEEDE, 0x7B1B, 0xEEDF, 0x7C4D, 0xEEE0, 0x7E3E,
08186     0xEEE1, 0x7FDF, 0xEEE2, 0x837B, 0xEEE3, 0x8B2B, 0xEEE4, 0x8CCA,
08187     0xEEE5, 0x8D64, 0xEEE6, 0x8DE1, 0xEEE7, 0x8E5F, 0xEEE8, 0x8FEA,
08188     0xEEE9, 0x8FF9, 0xEEEA, 0x9069, 0xEEEB, 0x93D1, 0xEEEC, 0x4F43,
08189     0xEEED, 0x4F7A, 0xEEEE, 0x50B3, 0xEEEF, 0x5168, 0xEEF0, 0x5178,
08190     0xEEF1, 0x524D, 0xEEF2, 0x526A, 0xEEF3, 0x5861, 0xEEF4, 0x587C,
08191     0xEEF5, 0x5960, 0xEEF6, 0x5C08, 0xEEF7, 0x5C55, 0xEEF8, 0x5EDB,
08192     0xEEF9, 0x609B, 0xEEFA, 0x6230, 0xEEFB, 0x6813, 0xEEFC, 0x6BBF,
08193     0xEEFD, 0x6C08, 0xEEFE, 0x6FB1, 0xEFA1, 0x714E, 0xEFA2, 0x7420,
08194     0xEFA3, 0x7530, 0xEFA4, 0x7538, 0xEFA5, 0x7551, 0xEFA6, 0x7672,
08195     0xEFA7, 0x7B4C, 0xEFA8, 0x7B8B, 0xEFA9, 0x7BAD, 0xEFAA, 0x7BC6,
08196     0xEFAB, 0x7E8F, 0xEFAC, 0x8A6E, 0xEFAD, 0x8F3E, 0xEFAE, 0x8F49,
08197     0xEFAF, 0x923F, 0xEFB0, 0x9293, 0xEFB1, 0x9322, 0xEFB2, 0x942B,
08198     0xEFB3, 0x96FB, 0xEFB4, 0x985A, 0xEFB5, 0x986B, 0xEFB6, 0x991E,
08199     0xEFB7, 0x5207, 0xEFB8, 0x622A, 0xEFB9, 0x6298, 0xEFBA, 0x6D59,
08200     0xEFBB, 0x7664, 0xEFBC, 0x7ACA, 0xEFBD, 0x7BC0, 0xEFBE, 0x7D76,
08201     0xEFBF, 0x5360, 0xEFC0, 0x5CBE, 0xEFC1, 0x5E97, 0xEFC2, 0x6F38,
08202     0xEFC3, 0x70B9, 0xEFC4, 0x7C98, 0xEFC5, 0x9711, 0xEFC6, 0x9B8E,
08203     0xEFC7, 0x9EDE, 0xEFC8, 0x63A5, 0xEFC9, 0x647A, 0xEFCA, 0x8776,
08204     0xEFCB, 0x4E01, 0xEFCC, 0x4E95, 0xEFCD, 0x4EAD, 0xEFCE, 0x505C,
08205     0xEFCF, 0x5075, 0xEFD0, 0x5448, 0xEFD1, 0x59C3, 0xEFD2, 0x5B9A,
08206     0xEFD3, 0x5E40, 0xEFD4, 0x5EAD, 0xEFD5, 0x5EF7, 0xEFD6, 0x5F81,
08207     0xEFD7, 0x60C5, 0xEFD8, 0x633A, 0xEFD9, 0x653F, 0xEFDA, 0x6574,
08208     0xEFDB, 0x65CC, 0xEFDC, 0x6676, 0xEFDD, 0x6678, 0xEFDE, 0x67FE,
08209     0xEFDF, 0x6968, 0xEFE0, 0x6A89, 0xEFE1, 0x6B63, 0xEFE2, 0x6C40,
08210     0xEFE3, 0x6DC0, 0xEFE4, 0x6DE8, 0xEFE5, 0x6E1F, 0xEFE6, 0x6E5E,
08211     0xEFE7, 0x701E, 0xEFE8, 0x70A1, 0xEFE9, 0x738E, 0xEFEA, 0x73FD,
08212     0xEFEB, 0x753A, 0xEFEC, 0x775B, 0xEFED, 0x7887, 0xEFEE, 0x798E,
08213     0xEFEF, 0x7A0B, 0xEFF0, 0x7A7D, 0xEFF1, 0x7CBE, 0xEFF2, 0x7D8E,
08214     0xEFF3, 0x8247, 0xEFF4, 0x8A02, 0xEFF5, 0x8AEA, 0xEFF6, 0x8C9E,
08215     0xEFF7, 0x912D, 0xEFF8, 0x914A, 0xEFF9, 0x91D8, 0xEFFA, 0x9266,
08216     0xEFFB, 0x92CC, 0xEFFC, 0x9320, 0xEFFD, 0x9706, 0xEFFE, 0x9756,
08217     0xF0A1, 0x975C, 0xF0A2, 0x9802, 0xF0A3, 0x9F0E, 0xF0A4, 0x5236,
08218     0xF0A5, 0x5291, 0xF0A6, 0x557C, 0xF0A7, 0x5824, 0xF0A8, 0x5E1D,
08219     0xF0A9, 0x5F1F, 0xF0AA, 0x608C, 0xF0AB, 0x63D0, 0xF0AC, 0x68AF,
08220     0xF0AD, 0x6FDF, 0xF0AE, 0x796D, 0xF0AF, 0x7B2C, 0xF0B0, 0x81CD,
08221     0xF0B1, 0x85BA, 0xF0B2, 0x88FD, 0xF0B3, 0x8AF8, 0xF0B4, 0x8E44,
08222     0xF0B5, 0x918D, 0xF0B6, 0x9664, 0xF0B7, 0x969B, 0xF0B8, 0x973D,
08223     0xF0B9, 0x984C, 0xF0BA, 0x9F4A, 0xF0BB, 0x4FCE, 0xF0BC, 0x5146,
08224     0xF0BD, 0x51CB, 0xF0BE, 0x52A9, 0xF0BF, 0x5632, 0xF0C0, 0x5F14,
08225     0xF0C1, 0x5F6B, 0xF0C2, 0x63AA, 0xF0C3, 0x64CD, 0xF0C4, 0x65E9,
08226     0xF0C5, 0x6641, 0xF0C6, 0x66FA, 0xF0C7, 0x66F9, 0xF0C8, 0x671D,
08227     0xF0C9, 0x689D, 0xF0CA, 0x68D7, 0xF0CB, 0x69FD, 0xF0CC, 0x6F15,
08228     0xF0CD, 0x6F6E, 0xF0CE, 0x7167, 0xF0CF, 0x71E5, 0xF0D0, 0x722A,
08229     0xF0D1, 0x74AA, 0xF0D2, 0x773A, 0xF0D3, 0x7956, 0xF0D4, 0x795A,
08230     0xF0D5, 0x79DF, 0xF0D6, 0x7A20, 0xF0D7, 0x7A95, 0xF0D8, 0x7C97,
08231     0xF0D9, 0x7CDF, 0xF0DA, 0x7D44, 0xF0DB, 0x7E70, 0xF0DC, 0x8087,
08232     0xF0DD, 0x85FB, 0xF0DE, 0x86A4, 0xF0DF, 0x8A54, 0xF0E0, 0x8ABF,
08233     0xF0E1, 0x8D99, 0xF0E2, 0x8E81, 0xF0E3, 0x9020, 0xF0E4, 0x906D,
08234     0xF0E5, 0x91E3, 0xF0E6, 0x963B, 0xF0E7, 0x96D5, 0xF0E8, 0x9CE5,
08235     0xF0E9, 0x65CF, 0xF0EA, 0x7C07, 0xF0EB, 0x8DB3, 0xF0EC, 0x93C3,
08236     0xF0ED, 0x5B58, 0xF0EE, 0x5C0A, 0xF0EF, 0x5352, 0xF0F0, 0x62D9,
08237     0xF0F1, 0x731D, 0xF0F2, 0x5027, 0xF0F3, 0x5B97, 0xF0F4, 0x5F9E,
08238     0xF0F5, 0x60B0, 0xF0F6, 0x616B, 0xF0F7, 0x68D5, 0xF0F8, 0x6DD9,
08239     0xF0F9, 0x742E, 0xF0FA, 0x7A2E, 0xF0FB, 0x7D42, 0xF0FC, 0x7D9C,
08240     0xF0FD, 0x7E31, 0xF0FE, 0x816B, 0xF1A1, 0x8E2A, 0xF1A2, 0x8E35,
08241     0xF1A3, 0x937E, 0xF1A4, 0x9418, 0xF1A5, 0x4F50, 0xF1A6, 0x5750,
08242     0xF1A7, 0x5DE6, 0xF1A8, 0x5EA7, 0xF1A9, 0x632B, 0xF1AA, 0x7F6A,
08243     0xF1AB, 0x4E3B, 0xF1AC, 0x4F4F, 0xF1AD, 0x4F8F, 0xF1AE, 0x505A,
08244     0xF1AF, 0x59DD, 0xF1B0, 0x80C4, 0xF1B1, 0x546A, 0xF1B2, 0x5468,
08245     0xF1B3, 0x55FE, 0xF1B4, 0x594F, 0xF1B5, 0x5B99, 0xF1B6, 0x5DDE,
08246     0xF1B7, 0x5EDA, 0xF1B8, 0x665D, 0xF1B9, 0x6731, 0xF1BA, 0x67F1,
08247     0xF1BB, 0x682A, 0xF1BC, 0x6CE8, 0xF1BD, 0x6D32, 0xF1BE, 0x6E4A,
08248     0xF1BF, 0x6F8D, 0xF1C0, 0x70B7, 0xF1C1, 0x73E0, 0xF1C2, 0x7587,
08249     0xF1C3, 0x7C4C, 0xF1C4, 0x7D02, 0xF1C5, 0x7D2C, 0xF1C6, 0x7DA2,
08250     0xF1C7, 0x821F, 0xF1C8, 0x86DB, 0xF1C9, 0x8A3B, 0xF1CA, 0x8A85,
08251     0xF1CB, 0x8D70, 0xF1CC, 0x8E8A, 0xF1CD, 0x8F33, 0xF1CE, 0x9031,
08252     0xF1CF, 0x914E, 0xF1D0, 0x9152, 0xF1D1, 0x9444, 0xF1D2, 0x99D0,
08253     0xF1D3, 0x7AF9, 0xF1D4, 0x7CA5, 0xF1D5, 0x4FCA, 0xF1D6, 0x5101,
08254     0xF1D7, 0x51C6, 0xF1D8, 0x57C8, 0xF1D9, 0x5BEF, 0xF1DA, 0x5CFB,
08255     0xF1DB, 0x6659, 0xF1DC, 0x6A3D, 0xF1DD, 0x6D5A, 0xF1DE, 0x6E96,
08256     0xF1DF, 0x6FEC, 0xF1E0, 0x710C, 0xF1E1, 0x756F, 0xF1E2, 0x7AE3,
08257     0xF1E3, 0x8822, 0xF1E4, 0x9021, 0xF1E5, 0x9075, 0xF1E6, 0x96CB,
08258     0xF1E7, 0x99FF, 0xF1E8, 0x8301, 0xF1E9, 0x4E2D, 0xF1EA, 0x4EF2,
08259     0xF1EB, 0x8846, 0xF1EC, 0x91CD, 0xF1ED, 0x537D, 0xF1EE, 0x6ADB,
08260     0xF1EF, 0x696B, 0xF1F0, 0x6C41, 0xF1F1, 0x847A, 0xF1F2, 0x589E,
08261     0xF1F3, 0x618E, 0xF1F4, 0x66FE, 0xF1F5, 0x62EF, 0xF1F6, 0x70DD,
08262     0xF1F7, 0x7511, 0xF1F8, 0x75C7, 0xF1F9, 0x7E52, 0xF1FA, 0x84B8,
08263     0xF1FB, 0x8B49, 0xF1FC, 0x8D08, 0xF1FD, 0x4E4B, 0xF1FE, 0x53EA,
08264     0xF2A1, 0x54AB, 0xF2A2, 0x5730, 0xF2A3, 0x5740, 0xF2A4, 0x5FD7,
08265     0xF2A5, 0x6301, 0xF2A6, 0x6307, 0xF2A7, 0x646F, 0xF2A8, 0x652F,
08266     0xF2A9, 0x65E8, 0xF2AA, 0x667A, 0xF2AB, 0x679D, 0xF2AC, 0x67B3,
08267     0xF2AD, 0x6B62, 0xF2AE, 0x6C60, 0xF2AF, 0x6C9A, 0xF2B0, 0x6F2C,
08268     0xF2B1, 0x77E5, 0xF2B2, 0x7825, 0xF2B3, 0x7949, 0xF2B4, 0x7957,
08269     0xF2B5, 0x7D19, 0xF2B6, 0x80A2, 0xF2B7, 0x8102, 0xF2B8, 0x81F3,
08270     0xF2B9, 0x829D, 0xF2BA, 0x82B7, 0xF2BB, 0x8718, 0xF2BC, 0x8A8C,
08271     0xF2BD, 0xF9FC, 0xF2BE, 0x8D04, 0xF2BF, 0x8DBE, 0xF2C0, 0x9072,
08272     0xF2C1, 0x76F4, 0xF2C2, 0x7A19, 0xF2C3, 0x7A37, 0xF2C4, 0x7E54,
08273     0xF2C5, 0x8077, 0xF2C6, 0x5507, 0xF2C7, 0x55D4, 0xF2C8, 0x5875,
08274     0xF2C9, 0x632F, 0xF2CA, 0x6422, 0xF2CB, 0x6649, 0xF2CC, 0x664B,
08275     0xF2CD, 0x686D, 0xF2CE, 0x699B, 0xF2CF, 0x6B84, 0xF2D0, 0x6D25,
08276     0xF2D1, 0x6EB1, 0xF2D2, 0x73CD, 0xF2D3, 0x7468, 0xF2D4, 0x74A1,
08277     0xF2D5, 0x755B, 0xF2D6, 0x75B9, 0xF2D7, 0x76E1, 0xF2D8, 0x771E,
08278     0xF2D9, 0x778B, 0xF2DA, 0x79E6, 0xF2DB, 0x7E09, 0xF2DC, 0x7E1D,
08279     0xF2DD, 0x81FB, 0xF2DE, 0x852F, 0xF2DF, 0x8897, 0xF2E0, 0x8A3A,
08280     0xF2E1, 0x8CD1, 0xF2E2, 0x8EEB, 0xF2E3, 0x8FB0, 0xF2E4, 0x9032,
08281     0xF2E5, 0x93AD, 0xF2E6, 0x9663, 0xF2E7, 0x9673, 0xF2E8, 0x9707,
08282     0xF2E9, 0x4F84, 0xF2EA, 0x53F1, 0xF2EB, 0x59EA, 0xF2EC, 0x5AC9,
08283     0xF2ED, 0x5E19, 0xF2EE, 0x684E, 0xF2EF, 0x74C6, 0xF2F0, 0x75BE,
08284     0xF2F1, 0x79E9, 0xF2F2, 0x7A92, 0xF2F3, 0x81A3, 0xF2F4, 0x86ED,
08285     0xF2F5, 0x8CEA, 0xF2F6, 0x8DCC, 0xF2F7, 0x8FED, 0xF2F8, 0x659F,
08286     0xF2F9, 0x6715, 0xF2FA, 0xF9FD, 0xF2FB, 0x57F7, 0xF2FC, 0x6F57,
08287     0xF2FD, 0x7DDD, 0xF2FE, 0x8F2F, 0xF3A1, 0x93F6, 0xF3A2, 0x96C6,
08288     0xF3A3, 0x5FB5, 0xF3A4, 0x61F2, 0xF3A5, 0x6F84, 0xF3A6, 0x4E14,
08289     0xF3A7, 0x4F98, 0xF3A8, 0x501F, 0xF3A9, 0x53C9, 0xF3AA, 0x55DF,
08290     0xF3AB, 0x5D6F, 0xF3AC, 0x5DEE, 0xF3AD, 0x6B21, 0xF3AE, 0x6B64,
08291     0xF3AF, 0x78CB, 0xF3B0, 0x7B9A, 0xF3B1, 0xF9FE, 0xF3B2, 0x8E49,
08292     0xF3B3, 0x8ECA, 0xF3B4, 0x906E, 0xF3B5, 0x6349, 0xF3B6, 0x643E,
08293     0xF3B7, 0x7740, 0xF3B8, 0x7A84, 0xF3B9, 0x932F, 0xF3BA, 0x947F,
08294     0xF3BB, 0x9F6A, 0xF3BC, 0x64B0, 0xF3BD, 0x6FAF, 0xF3BE, 0x71E6,
08295     0xF3BF, 0x74A8, 0xF3C0, 0x74DA, 0xF3C1, 0x7AC4, 0xF3C2, 0x7C12,
08296     0xF3C3, 0x7E82, 0xF3C4, 0x7CB2, 0xF3C5, 0x7E98, 0xF3C6, 0x8B9A,
08297     0xF3C7, 0x8D0A, 0xF3C8, 0x947D, 0xF3C9, 0x9910, 0xF3CA, 0x994C,
08298     0xF3CB, 0x5239, 0xF3CC, 0x5BDF, 0xF3CD, 0x64E6, 0xF3CE, 0x672D,
08299     0xF3CF, 0x7D2E, 0xF3D0, 0x50ED, 0xF3D1, 0x53C3, 0xF3D2, 0x5879,
08300     0xF3D3, 0x6158, 0xF3D4, 0x6159, 0xF3D5, 0x61FA, 0xF3D6, 0x65AC,
08301     0xF3D7, 0x7AD9, 0xF3D8, 0x8B92, 0xF3D9, 0x8B96, 0xF3DA, 0x5009,
08302     0xF3DB, 0x5021, 0xF3DC, 0x5275, 0xF3DD, 0x5531, 0xF3DE, 0x5A3C,
08303     0xF3DF, 0x5EE0, 0xF3E0, 0x5F70, 0xF3E1, 0x6134, 0xF3E2, 0x655E,
08304     0xF3E3, 0x660C, 0xF3E4, 0x6636, 0xF3E5, 0x66A2, 0xF3E6, 0x69CD,
08305     0xF3E7, 0x6EC4, 0xF3E8, 0x6F32, 0xF3E9, 0x7316, 0xF3EA, 0x7621,
08306     0xF3EB, 0x7A93, 0xF3EC, 0x8139, 0xF3ED, 0x8259, 0xF3EE, 0x83D6,
08307     0xF3EF, 0x84BC, 0xF3F0, 0x50B5, 0xF3F1, 0x57F0, 0xF3F2, 0x5BC0,
08308     0xF3F3, 0x5BE8, 0xF3F4, 0x5F69, 0xF3F5, 0x63A1, 0xF3F6, 0x7826,
08309     0xF3F7, 0x7DB5, 0xF3F8, 0x83DC, 0xF3F9, 0x8521, 0xF3FA, 0x91C7,
08310     0xF3FB, 0x91F5, 0xF3FC, 0x518A, 0xF3FD, 0x67F5, 0xF3FE, 0x7B56,
08311     0xF4A1, 0x8CAC, 0xF4A2, 0x51C4, 0xF4A3, 0x59BB, 0xF4A4, 0x60BD,
08312     0xF4A5, 0x8655, 0xF4A6, 0x501C, 0xF4A7, 0xF9FF, 0xF4A8, 0x5254,
08313     0xF4A9, 0x5C3A, 0xF4AA, 0x617D, 0xF4AB, 0x621A, 0xF4AC, 0x62D3,
08314     0xF4AD, 0x64F2, 0xF4AE, 0x65A5, 0xF4AF, 0x6ECC, 0xF4B0, 0x7620,
08315     0xF4B1, 0x810A, 0xF4B2, 0x8E60, 0xF4B3, 0x965F, 0xF4B4, 0x96BB,
08316     0xF4B5, 0x4EDF, 0xF4B6, 0x5343, 0xF4B7, 0x5598, 0xF4B8, 0x5929,
08317     0xF4B9, 0x5DDD, 0xF4BA, 0x64C5, 0xF4BB, 0x6CC9, 0xF4BC, 0x6DFA,
08318     0xF4BD, 0x7394, 0xF4BE, 0x7A7F, 0xF4BF, 0x821B, 0xF4C0, 0x85A6,
08319     0xF4C1, 0x8CE4, 0xF4C2, 0x8E10, 0xF4C3, 0x9077, 0xF4C4, 0x91E7,
08320     0xF4C5, 0x95E1, 0xF4C6, 0x9621, 0xF4C7, 0x97C6, 0xF4C8, 0x51F8,
08321     0xF4C9, 0x54F2, 0xF4CA, 0x5586, 0xF4CB, 0x5FB9, 0xF4CC, 0x64A4,
08322     0xF4CD, 0x6F88, 0xF4CE, 0x7DB4, 0xF4CF, 0x8F1F, 0xF4D0, 0x8F4D,
08323     0xF4D1, 0x9435, 0xF4D2, 0x50C9, 0xF4D3, 0x5C16, 0xF4D4, 0x6CBE,
08324     0xF4D5, 0x6DFB, 0xF4D6, 0x751B, 0xF4D7, 0x77BB, 0xF4D8, 0x7C3D,
08325     0xF4D9, 0x7C64, 0xF4DA, 0x8A79, 0xF4DB, 0x8AC2, 0xF4DC, 0x581E,
08326     0xF4DD, 0x59BE, 0xF4DE, 0x5E16, 0xF4DF, 0x6377, 0xF4E0, 0x7252,
08327     0xF4E1, 0x758A, 0xF4E2, 0x776B, 0xF4E3, 0x8ADC, 0xF4E4, 0x8CBC,
08328     0xF4E5, 0x8F12, 0xF4E6, 0x5EF3, 0xF4E7, 0x6674, 0xF4E8, 0x6DF8,
08329     0xF4E9, 0x807D, 0xF4EA, 0x83C1, 0xF4EB, 0x8ACB, 0xF4EC, 0x9751,
08330     0xF4ED, 0x9BD6, 0xF4EE, 0xFA00, 0xF4EF, 0x5243, 0xF4F0, 0x66FF,
08331     0xF4F1, 0x6D95, 0xF4F2, 0x6EEF, 0xF4F3, 0x7DE0, 0xF4F4, 0x8AE6,
08332     0xF4F5, 0x902E, 0xF4F6, 0x905E, 0xF4F7, 0x9AD4, 0xF4F8, 0x521D,
08333     0xF4F9, 0x527F, 0xF4FA, 0x54E8, 0xF4FB, 0x6194, 0xF4FC, 0x6284,
08334     0xF4FD, 0x62DB, 0xF4FE, 0x68A2, 0xF5A1, 0x6912, 0xF5A2, 0x695A,
08335     0xF5A3, 0x6A35, 0xF5A4, 0x7092, 0xF5A5, 0x7126, 0xF5A6, 0x785D,
08336     0xF5A7, 0x7901, 0xF5A8, 0x790E, 0xF5A9, 0x79D2, 0xF5AA, 0x7A0D,
08337     0xF5AB, 0x8096, 0xF5AC, 0x8278, 0xF5AD, 0x82D5, 0xF5AE, 0x8349,
08338     0xF5AF, 0x8549, 0xF5B0, 0x8C82, 0xF5B1, 0x8D85, 0xF5B2, 0x9162,
08339     0xF5B3, 0x918B, 0xF5B4, 0x91AE, 0xF5B5, 0x4FC3, 0xF5B6, 0x56D1,
08340     0xF5B7, 0x71ED, 0xF5B8, 0x77D7, 0xF5B9, 0x8700, 0xF5BA, 0x89F8,
08341     0xF5BB, 0x5BF8, 0xF5BC, 0x5FD6, 0xF5BD, 0x6751, 0xF5BE, 0x90A8,
08342     0xF5BF, 0x53E2, 0xF5C0, 0x585A, 0xF5C1, 0x5BF5, 0xF5C2, 0x60A4,
08343     0xF5C3, 0x6181, 0xF5C4, 0x6460, 0xF5C5, 0x7E3D, 0xF5C6, 0x8070,
08344     0xF5C7, 0x8525, 0xF5C8, 0x9283, 0xF5C9, 0x64AE, 0xF5CA, 0x50AC,
08345     0xF5CB, 0x5D14, 0xF5CC, 0x6700, 0xF5CD, 0x589C, 0xF5CE, 0x62BD,
08346     0xF5CF, 0x63A8, 0xF5D0, 0x690E, 0xF5D1, 0x6978, 0xF5D2, 0x6A1E,
08347     0xF5D3, 0x6E6B, 0xF5D4, 0x76BA, 0xF5D5, 0x79CB, 0xF5D6, 0x82BB,
08348     0xF5D7, 0x8429, 0xF5D8, 0x8ACF, 0xF5D9, 0x8DA8, 0xF5DA, 0x8FFD,
08349     0xF5DB, 0x9112, 0xF5DC, 0x914B, 0xF5DD, 0x919C, 0xF5DE, 0x9310,
08350     0xF5DF, 0x9318, 0xF5E0, 0x939A, 0xF5E1, 0x96DB, 0xF5E2, 0x9A36,
08351     0xF5E3, 0x9C0D, 0xF5E4, 0x4E11, 0xF5E5, 0x755C, 0xF5E6, 0x795D,
08352     0xF5E7, 0x7AFA, 0xF5E8, 0x7B51, 0xF5E9, 0x7BC9, 0xF5EA, 0x7E2E,
08353     0xF5EB, 0x84C4, 0xF5EC, 0x8E59, 0xF5ED, 0x8E74, 0xF5EE, 0x8EF8,
08354     0xF5EF, 0x9010, 0xF5F0, 0x6625, 0xF5F1, 0x693F, 0xF5F2, 0x7443,
08355     0xF5F3, 0x51FA, 0xF5F4, 0x672E, 0xF5F5, 0x9EDC, 0xF5F6, 0x5145,
08356     0xF5F7, 0x5FE0, 0xF5F8, 0x6C96, 0xF5F9, 0x87F2, 0xF5FA, 0x885D,
08357     0xF5FB, 0x8877, 0xF5FC, 0x60B4, 0xF5FD, 0x81B5, 0xF5FE, 0x8403,
08358     0xF6A1, 0x8D05, 0xF6A2, 0x53D6, 0xF6A3, 0x5439, 0xF6A4, 0x5634,
08359     0xF6A5, 0x5A36, 0xF6A6, 0x5C31, 0xF6A7, 0x708A, 0xF6A8, 0x7FE0,
08360     0xF6A9, 0x805A, 0xF6AA, 0x8106, 0xF6AB, 0x81ED, 0xF6AC, 0x8DA3,
08361     0xF6AD, 0x9189, 0xF6AE, 0x9A5F, 0xF6AF, 0x9DF2, 0xF6B0, 0x5074,
08362     0xF6B1, 0x4EC4, 0xF6B2, 0x53A0, 0xF6B3, 0x60FB, 0xF6B4, 0x6E2C,
08363     0xF6B5, 0x5C64, 0xF6B6, 0x4F88, 0xF6B7, 0x5024, 0xF6B8, 0x55E4,
08364     0xF6B9, 0x5CD9, 0xF6BA, 0x5E5F, 0xF6BB, 0x6065, 0xF6BC, 0x6894,
08365     0xF6BD, 0x6CBB, 0xF6BE, 0x6DC4, 0xF6BF, 0x71BE, 0xF6C0, 0x75D4,
08366     0xF6C1, 0x75F4, 0xF6C2, 0x7661, 0xF6C3, 0x7A1A, 0xF6C4, 0x7A49,
08367     0xF6C5, 0x7DC7, 0xF6C6, 0x7DFB, 0xF6C7, 0x7F6E, 0xF6C8, 0x81F4,
08368     0xF6C9, 0x86A9, 0xF6CA, 0x8F1C, 0xF6CB, 0x96C9, 0xF6CC, 0x99B3,
08369     0xF6CD, 0x9F52, 0xF6CE, 0x5247, 0xF6CF, 0x52C5, 0xF6D0, 0x98ED,
08370     0xF6D1, 0x89AA, 0xF6D2, 0x4E03, 0xF6D3, 0x67D2, 0xF6D4, 0x6F06,
08371     0xF6D5, 0x4FB5, 0xF6D6, 0x5BE2, 0xF6D7, 0x6795, 0xF6D8, 0x6C88,
08372     0xF6D9, 0x6D78, 0xF6DA, 0x741B, 0xF6DB, 0x7827, 0xF6DC, 0x91DD,
08373     0xF6DD, 0x937C, 0xF6DE, 0x87C4, 0xF6DF, 0x79E4, 0xF6E0, 0x7A31,
08374     0xF6E1, 0x5FEB, 0xF6E2, 0x4ED6, 0xF6E3, 0x54A4, 0xF6E4, 0x553E,
08375     0xF6E5, 0x58AE, 0xF6E6, 0x59A5, 0xF6E7, 0x60F0, 0xF6E8, 0x6253,
08376     0xF6E9, 0x62D6, 0xF6EA, 0x6736, 0xF6EB, 0x6955, 0xF6EC, 0x8235,
08377     0xF6ED, 0x9640, 0xF6EE, 0x99B1, 0xF6EF, 0x99DD, 0xF6F0, 0x502C,
08378     0xF6F1, 0x5353, 0xF6F2, 0x5544, 0xF6F3, 0x577C, 0xF6F4, 0xFA01,
08379     0xF6F5, 0x6258, 0xF6F6, 0xFA02, 0xF6F7, 0x64E2, 0xF6F8, 0x666B,
08380     0xF6F9, 0x67DD, 0xF6FA, 0x6FC1, 0xF6FB, 0x6FEF, 0xF6FC, 0x7422,
08381     0xF6FD, 0x7438, 0xF6FE, 0x8A17, 0xF7A1, 0x9438, 0xF7A2, 0x5451,
08382     0xF7A3, 0x5606, 0xF7A4, 0x5766, 0xF7A5, 0x5F48, 0xF7A6, 0x619A,
08383     0xF7A7, 0x6B4E, 0xF7A8, 0x7058, 0xF7A9, 0x70AD, 0xF7AA, 0x7DBB,
08384     0xF7AB, 0x8A95, 0xF7AC, 0x596A, 0xF7AD, 0x812B, 0xF7AE, 0x63A2,
08385     0xF7AF, 0x7708, 0xF7B0, 0x803D, 0xF7B1, 0x8CAA, 0xF7B2, 0x5854,
08386     0xF7B3, 0x642D, 0xF7B4, 0x69BB, 0xF7B5, 0x5B95, 0xF7B6, 0x5E11,
08387     0xF7B7, 0x6E6F, 0xF7B8, 0xFA03, 0xF7B9, 0x8569, 0xF7BA, 0x514C,
08388     0xF7BB, 0x53F0, 0xF7BC, 0x592A, 0xF7BD, 0x6020, 0xF7BE, 0x614B,
08389     0xF7BF, 0x6B86, 0xF7C0, 0x6C70, 0xF7C1, 0x6CF0, 0xF7C2, 0x7B1E,
08390     0xF7C3, 0x80CE, 0xF7C4, 0x82D4, 0xF7C5, 0x8DC6, 0xF7C6, 0x90B0,
08391     0xF7C7, 0x98B1, 0xF7C8, 0xFA04, 0xF7C9, 0x64C7, 0xF7CA, 0x6FA4,
08392     0xF7CB, 0x6491, 0xF7CC, 0x6504, 0xF7CD, 0x514E, 0xF7CE, 0x5410,
08393     0xF7CF, 0x571F, 0xF7D0, 0x8A0E, 0xF7D1, 0x615F, 0xF7D2, 0x6876,
08394     0xF7D3, 0xFA05, 0xF7D4, 0x75DB, 0xF7D5, 0x7B52, 0xF7D6, 0x7D71,
08395     0xF7D7, 0x901A, 0xF7D8, 0x5806, 0xF7D9, 0x69CC, 0xF7DA, 0x817F,
08396     0xF7DB, 0x892A, 0xF7DC, 0x9000, 0xF7DD, 0x9839, 0xF7DE, 0x5078,
08397     0xF7DF, 0x5957, 0xF7E0, 0x59AC, 0xF7E1, 0x6295, 0xF7E2, 0x900F,
08398     0xF7E3, 0x9B2A, 0xF7E4, 0x615D, 0xF7E5, 0x7279, 0xF7E6, 0x95D6,
08399     0xF7E7, 0x5761, 0xF7E8, 0x5A46, 0xF7E9, 0x5DF4, 0xF7EA, 0x628A,
08400     0xF7EB, 0x64AD, 0xF7EC, 0x64FA, 0xF7ED, 0x6777, 0xF7EE, 0x6CE2,
08401     0xF7EF, 0x6D3E, 0xF7F0, 0x722C, 0xF7F1, 0x7436, 0xF7F2, 0x7834,
08402     0xF7F3, 0x7F77, 0xF7F4, 0x82AD, 0xF7F5, 0x8DDB, 0xF7F6, 0x9817,
08403     0xF7F7, 0x5224, 0xF7F8, 0x5742, 0xF7F9, 0x677F, 0xF7FA, 0x7248,
08404     0xF7FB, 0x74E3, 0xF7FC, 0x8CA9, 0xF7FD, 0x8FA6, 0xF7FE, 0x9211,
08405     0xF8A1, 0x962A, 0xF8A2, 0x516B, 0xF8A3, 0x53ED, 0xF8A4, 0x634C,
08406     0xF8A5, 0x4F69, 0xF8A6, 0x5504, 0xF8A7, 0x6096, 0xF8A8, 0x6557,
08407     0xF8A9, 0x6C9B, 0xF8AA, 0x6D7F, 0xF8AB, 0x724C, 0xF8AC, 0x72FD,
08408     0xF8AD, 0x7A17, 0xF8AE, 0x8987, 0xF8AF, 0x8C9D, 0xF8B0, 0x5F6D,
08409     0xF8B1, 0x6F8E, 0xF8B2, 0x70F9, 0xF8B3, 0x81A8, 0xF8B4, 0x610E,
08410     0xF8B5, 0x4FBF, 0xF8B6, 0x504F, 0xF8B7, 0x6241, 0xF8B8, 0x7247,
08411     0xF8B9, 0x7BC7, 0xF8BA, 0x7DE8, 0xF8BB, 0x7FE9, 0xF8BC, 0x904D,
08412     0xF8BD, 0x97AD, 0xF8BE, 0x9A19, 0xF8BF, 0x8CB6, 0xF8C0, 0x576A,
08413     0xF8C1, 0x5E73, 0xF8C2, 0x67B0, 0xF8C3, 0x840D, 0xF8C4, 0x8A55,
08414     0xF8C5, 0x5420, 0xF8C6, 0x5B16, 0xF8C7, 0x5E63, 0xF8C8, 0x5EE2,
08415     0xF8C9, 0x5F0A, 0xF8CA, 0x6583, 0xF8CB, 0x80BA, 0xF8CC, 0x853D,
08416     0xF8CD, 0x9589, 0xF8CE, 0x965B, 0xF8CF, 0x4F48, 0xF8D0, 0x5305,
08417     0xF8D1, 0x530D, 0xF8D2, 0x530F, 0xF8D3, 0x5486, 0xF8D4, 0x54FA,
08418     0xF8D5, 0x5703, 0xF8D6, 0x5E03, 0xF8D7, 0x6016, 0xF8D8, 0x629B,
08419     0xF8D9, 0x62B1, 0xF8DA, 0x6355, 0xF8DB, 0xFA06, 0xF8DC, 0x6CE1,
08420     0xF8DD, 0x6D66, 0xF8DE, 0x75B1, 0xF8DF, 0x7832, 0xF8E0, 0x80DE,
08421     0xF8E1, 0x812F, 0xF8E2, 0x82DE, 0xF8E3, 0x8461, 0xF8E4, 0x84B2,
08422     0xF8E5, 0x888D, 0xF8E6, 0x8912, 0xF8E7, 0x900B, 0xF8E8, 0x92EA,
08423     0xF8E9, 0x98FD, 0xF8EA, 0x9B91, 0xF8EB, 0x5E45, 0xF8EC, 0x66B4,
08424     0xF8ED, 0x66DD, 0xF8EE, 0x7011, 0xF8EF, 0x7206, 0xF8F0, 0xFA07,
08425     0xF8F1, 0x4FF5, 0xF8F2, 0x527D, 0xF8F3, 0x5F6A, 0xF8F4, 0x6153,
08426     0xF8F5, 0x6753, 0xF8F6, 0x6A19, 0xF8F7, 0x6F02, 0xF8F8, 0x74E2,
08427     0xF8F9, 0x7968, 0xF8FA, 0x8868, 0xF8FB, 0x8C79, 0xF8FC, 0x98C7,
08428     0xF8FD, 0x98C4, 0xF8FE, 0x9A43, 0xF9A1, 0x54C1, 0xF9A2, 0x7A1F,
08429     0xF9A3, 0x6953, 0xF9A4, 0x8AF7, 0xF9A5, 0x8C4A, 0xF9A6, 0x98A8,
08430     0xF9A7, 0x99AE, 0xF9A8, 0x5F7C, 0xF9A9, 0x62AB, 0xF9AA, 0x75B2,
08431     0xF9AB, 0x76AE, 0xF9AC, 0x88AB, 0xF9AD, 0x907F, 0xF9AE, 0x9642,
08432     0xF9AF, 0x5339, 0xF9B0, 0x5F3C, 0xF9B1, 0x5FC5, 0xF9B2, 0x6CCC,
08433     0xF9B3, 0x73CC, 0xF9B4, 0x7562, 0xF9B5, 0x758B, 0xF9B6, 0x7B46,
08434     0xF9B7, 0x82FE, 0xF9B8, 0x999D, 0xF9B9, 0x4E4F, 0xF9BA, 0x903C,
08435     0xF9BB, 0x4E0B, 0xF9BC, 0x4F55, 0xF9BD, 0x53A6, 0xF9BE, 0x590F,
08436     0xF9BF, 0x5EC8, 0xF9C0, 0x6630, 0xF9C1, 0x6CB3, 0xF9C2, 0x7455,
08437     0xF9C3, 0x8377, 0xF9C4, 0x8766, 0xF9C5, 0x8CC0, 0xF9C6, 0x9050,
08438     0xF9C7, 0x971E, 0xF9C8, 0x9C15, 0xF9C9, 0x58D1, 0xF9CA, 0x5B78,
08439     0xF9CB, 0x8650, 0xF9CC, 0x8B14, 0xF9CD, 0x9DB4, 0xF9CE, 0x5BD2,
08440     0xF9CF, 0x6068, 0xF9D0, 0x608D, 0xF9D1, 0x65F1, 0xF9D2, 0x6C57,
08441     0xF9D3, 0x6F22, 0xF9D4, 0x6FA3, 0xF9D5, 0x701A, 0xF9D6, 0x7F55,
08442     0xF9D7, 0x7FF0, 0xF9D8, 0x9591, 0xF9D9, 0x9592, 0xF9DA, 0x9650,
08443     0xF9DB, 0x97D3, 0xF9DC, 0x5272, 0xF9DD, 0x8F44, 0xF9DE, 0x51FD,
08444     0xF9DF, 0x542B, 0xF9E0, 0x54B8, 0xF9E1, 0x5563, 0xF9E2, 0x558A,
08445     0xF9E3, 0x6ABB, 0xF9E4, 0x6DB5, 0xF9E5, 0x7DD8, 0xF9E6, 0x8266,
08446     0xF9E7, 0x929C, 0xF9E8, 0x9677, 0xF9E9, 0x9E79, 0xF9EA, 0x5408,
08447     0xF9EB, 0x54C8, 0xF9EC, 0x76D2, 0xF9ED, 0x86E4, 0xF9EE, 0x95A4,
08448     0xF9EF, 0x95D4, 0xF9F0, 0x965C, 0xF9F1, 0x4EA2, 0xF9F2, 0x4F09,
08449     0xF9F3, 0x59EE, 0xF9F4, 0x5AE6, 0xF9F5, 0x5DF7, 0xF9F6, 0x6052,
08450     0xF9F7, 0x6297, 0xF9F8, 0x676D, 0xF9F9, 0x6841, 0xF9FA, 0x6C86,
08451     0xF9FB, 0x6E2F, 0xF9FC, 0x7F38, 0xF9FD, 0x809B, 0xF9FE, 0x822A,
08452     0xFAA1, 0xFA08, 0xFAA2, 0xFA09, 0xFAA3, 0x9805, 0xFAA4, 0x4EA5,
08453     0xFAA5, 0x5055, 0xFAA6, 0x54B3, 0xFAA7, 0x5793, 0xFAA8, 0x595A,
08454     0xFAA9, 0x5B69, 0xFAAA, 0x5BB3, 0xFAAB, 0x61C8, 0xFAAC, 0x6977,
08455     0xFAAD, 0x6D77, 0xFAAE, 0x7023, 0xFAAF, 0x87F9, 0xFAB0, 0x89E3,
08456     0xFAB1, 0x8A72, 0xFAB2, 0x8AE7, 0xFAB3, 0x9082, 0xFAB4, 0x99ED,
08457     0xFAB5, 0x9AB8, 0xFAB6, 0x52BE, 0xFAB7, 0x6838, 0xFAB8, 0x5016,
08458     0xFAB9, 0x5E78, 0xFABA, 0x674F, 0xFABB, 0x8347, 0xFABC, 0x884C,
08459     0xFABD, 0x4EAB, 0xFABE, 0x5411, 0xFABF, 0x56AE, 0xFAC0, 0x73E6,
08460     0xFAC1, 0x9115, 0xFAC2, 0x97FF, 0xFAC3, 0x9909, 0xFAC4, 0x9957,
08461     0xFAC5, 0x9999, 0xFAC6, 0x5653, 0xFAC7, 0x589F, 0xFAC8, 0x865B,
08462     0xFAC9, 0x8A31, 0xFACA, 0x61B2, 0xFACB, 0x6AF6, 0xFACC, 0x737B,
08463     0xFACD, 0x8ED2, 0xFACE, 0x6B47, 0xFACF, 0x96AA, 0xFAD0, 0x9A57,
08464     0xFAD1, 0x5955, 0xFAD2, 0x7200, 0xFAD3, 0x8D6B, 0xFAD4, 0x9769,
08465     0xFAD5, 0x4FD4, 0xFAD6, 0x5CF4, 0xFAD7, 0x5F26, 0xFAD8, 0x61F8,
08466     0xFAD9, 0x665B, 0xFADA, 0x6CEB, 0xFADB, 0x70AB, 0xFADC, 0x7384,
08467     0xFADD, 0x73B9, 0xFADE, 0x73FE, 0xFADF, 0x7729, 0xFAE0, 0x774D,
08468     0xFAE1, 0x7D43, 0xFAE2, 0x7D62, 0xFAE3, 0x7E23, 0xFAE4, 0x8237,
08469     0xFAE5, 0x8852, 0xFAE6, 0xFA0A, 0xFAE7, 0x8CE2, 0xFAE8, 0x9249,
08470     0xFAE9, 0x986F, 0xFAEA, 0x5B51, 0xFAEB, 0x7A74, 0xFAEC, 0x8840,
08471     0xFAED, 0x9801, 0xFAEE, 0x5ACC, 0xFAEF, 0x4FE0, 0xFAF0, 0x5354,
08472     0xFAF1, 0x593E, 0xFAF2, 0x5CFD, 0xFAF3, 0x633E, 0xFAF4, 0x6D79,
08473     0xFAF5, 0x72F9, 0xFAF6, 0x8105, 0xFAF7, 0x8107, 0xFAF8, 0x83A2,
08474     0xFAF9, 0x92CF, 0xFAFA, 0x9830, 0xFAFB, 0x4EA8, 0xFAFC, 0x5144,
08475     0xFAFD, 0x5211, 0xFAFE, 0x578B, 0xFBA1, 0x5F62, 0xFBA2, 0x6CC2,
08476     0xFBA3, 0x6ECE, 0xFBA4, 0x7005, 0xFBA5, 0x7050, 0xFBA6, 0x70AF,
08477     0xFBA7, 0x7192, 0xFBA8, 0x73E9, 0xFBA9, 0x7469, 0xFBAA, 0x834A,
08478     0xFBAB, 0x87A2, 0xFBAC, 0x8861, 0xFBAD, 0x9008, 0xFBAE, 0x90A2,
08479     0xFBAF, 0x93A3, 0xFBB0, 0x99A8, 0xFBB1, 0x516E, 0xFBB2, 0x5F57,
08480     0xFBB3, 0x60E0, 0xFBB4, 0x6167, 0xFBB5, 0x66B3, 0xFBB6, 0x8559,
08481     0xFBB7, 0x8E4A, 0xFBB8, 0x91AF, 0xFBB9, 0x978B, 0xFBBA, 0x4E4E,
08482     0xFBBB, 0x4E92, 0xFBBC, 0x547C, 0xFBBD, 0x58D5, 0xFBBE, 0x58FA,
08483     0xFBBF, 0x597D, 0xFBC0, 0x5CB5, 0xFBC1, 0x5F27, 0xFBC2, 0x6236,
08484     0xFBC3, 0x6248, 0xFBC4, 0x660A, 0xFBC5, 0x6667, 0xFBC6, 0x6BEB,
08485     0xFBC7, 0x6D69, 0xFBC8, 0x6DCF, 0xFBC9, 0x6E56, 0xFBCA, 0x6EF8,
08486     0xFBCB, 0x6F94, 0xFBCC, 0x6FE0, 0xFBCD, 0x6FE9, 0xFBCE, 0x705D,
08487     0xFBCF, 0x72D0, 0xFBD0, 0x7425, 0xFBD1, 0x745A, 0xFBD2, 0x74E0,
08488     0xFBD3, 0x7693, 0xFBD4, 0x795C, 0xFBD5, 0x7CCA, 0xFBD6, 0x7E1E,
08489     0xFBD7, 0x80E1, 0xFBD8, 0x82A6, 0xFBD9, 0x846B, 0xFBDA, 0x84BF,
08490     0xFBDB, 0x864E, 0xFBDC, 0x865F, 0xFBDD, 0x8774, 0xFBDE, 0x8B77,
08491     0xFBDF, 0x8C6A, 0xFBE0, 0x93AC, 0xFBE1, 0x9800, 0xFBE2, 0x9865,
08492     0xFBE3, 0x60D1, 0xFBE4, 0x6216, 0xFBE5, 0x9177, 0xFBE6, 0x5A5A,
08493     0xFBE7, 0x660F, 0xFBE8, 0x6DF7, 0xFBE9, 0x6E3E, 0xFBEA, 0x743F,
08494     0xFBEB, 0x9B42, 0xFBEC, 0x5FFD, 0xFBED, 0x60DA, 0xFBEE, 0x7B0F,
08495     0xFBEF, 0x54C4, 0xFBF0, 0x5F18, 0xFBF1, 0x6C5E, 0xFBF2, 0x6CD3,
08496     0xFBF3, 0x6D2A, 0xFBF4, 0x70D8, 0xFBF5, 0x7D05, 0xFBF6, 0x8679,
08497     0xFBF7, 0x8A0C, 0xFBF8, 0x9D3B, 0xFBF9, 0x5316, 0xFBFA, 0x548C,
08498     0xFBFB, 0x5B05, 0xFBFC, 0x6A3A, 0xFBFD, 0x706B, 0xFBFE, 0x7575,
08499     0xFCA1, 0x798D, 0xFCA2, 0x79BE, 0xFCA3, 0x82B1, 0xFCA4, 0x83EF,
08500     0xFCA5, 0x8A71, 0xFCA6, 0x8B41, 0xFCA7, 0x8CA8, 0xFCA8, 0x9774,
08501     0xFCA9, 0xFA0B, 0xFCAA, 0x64F4, 0xFCAB, 0x652B, 0xFCAC, 0x78BA,
08502     0xFCAD, 0x78BB, 0xFCAE, 0x7A6B, 0xFCAF, 0x4E38, 0xFCB0, 0x559A,
08503     0xFCB1, 0x5950, 0xFCB2, 0x5BA6, 0xFCB3, 0x5E7B, 0xFCB4, 0x60A3,
08504     0xFCB5, 0x63DB, 0xFCB6, 0x6B61, 0xFCB7, 0x6665, 0xFCB8, 0x6853,
08505     0xFCB9, 0x6E19, 0xFCBA, 0x7165, 0xFCBB, 0x74B0, 0xFCBC, 0x7D08,
08506     0xFCBD, 0x9084, 0xFCBE, 0x9A69, 0xFCBF, 0x9C25, 0xFCC0, 0x6D3B,
08507     0xFCC1, 0x6ED1, 0xFCC2, 0x733E, 0xFCC3, 0x8C41, 0xFCC4, 0x95CA,
08508     0xFCC5, 0x51F0, 0xFCC6, 0x5E4C, 0xFCC7, 0x5FA8, 0xFCC8, 0x604D,
08509     0xFCC9, 0x60F6, 0xFCCA, 0x6130, 0xFCCB, 0x614C, 0xFCCC, 0x6643,
08510     0xFCCD, 0x6644, 0xFCCE, 0x69A5, 0xFCCF, 0x6CC1, 0xFCD0, 0x6E5F,
08511     0xFCD1, 0x6EC9, 0xFCD2, 0x6F62, 0xFCD3, 0x714C, 0xFCD4, 0x749C,
08512     0xFCD5, 0x7687, 0xFCD6, 0x7BC1, 0xFCD7, 0x7C27, 0xFCD8, 0x8352,
08513     0xFCD9, 0x8757, 0xFCDA, 0x9051, 0xFCDB, 0x968D, 0xFCDC, 0x9EC3,
08514     0xFCDD, 0x532F, 0xFCDE, 0x56DE, 0xFCDF, 0x5EFB, 0xFCE0, 0x5F8A,
08515     0xFCE1, 0x6062, 0xFCE2, 0x6094, 0xFCE3, 0x61F7, 0xFCE4, 0x6666,
08516     0xFCE5, 0x6703, 0xFCE6, 0x6A9C, 0xFCE7, 0x6DEE, 0xFCE8, 0x6FAE,
08517     0xFCE9, 0x7070, 0xFCEA, 0x736A, 0xFCEB, 0x7E6A, 0xFCEC, 0x81BE,
08518     0xFCED, 0x8334, 0xFCEE, 0x86D4, 0xFCEF, 0x8AA8, 0xFCF0, 0x8CC4,
08519     0xFCF1, 0x5283, 0xFCF2, 0x7372, 0xFCF3, 0x5B96, 0xFCF4, 0x6A6B,
08520     0xFCF5, 0x9404, 0xFCF6, 0x54EE, 0xFCF7, 0x5686, 0xFCF8, 0x5B5D,
08521     0xFCF9, 0x6548, 0xFCFA, 0x6585, 0xFCFB, 0x66C9, 0xFCFC, 0x689F,
08522     0xFCFD, 0x6D8D, 0xFCFE, 0x6DC6, 0xFDA1, 0x723B, 0xFDA2, 0x80B4,
08523     0xFDA3, 0x9175, 0xFDA4, 0x9A4D, 0xFDA5, 0x4FAF, 0xFDA6, 0x5019,
08524     0xFDA7, 0x539A, 0xFDA8, 0x540E, 0xFDA9, 0x543C, 0xFDAA, 0x5589,
08525     0xFDAB, 0x55C5, 0xFDAC, 0x5E3F, 0xFDAD, 0x5F8C, 0xFDAE, 0x673D,
08526     0xFDAF, 0x7166, 0xFDB0, 0x73DD, 0xFDB1, 0x9005, 0xFDB2, 0x52DB,
08527     0xFDB3, 0x52F3, 0xFDB4, 0x5864, 0xFDB5, 0x58CE, 0xFDB6, 0x7104,
08528     0xFDB7, 0x718F, 0xFDB8, 0x71FB, 0xFDB9, 0x85B0, 0xFDBA, 0x8A13,
08529     0xFDBB, 0x6688, 0xFDBC, 0x85A8, 0xFDBD, 0x55A7, 0xFDBE, 0x6684,
08530     0xFDBF, 0x714A, 0xFDC0, 0x8431, 0xFDC1, 0x5349, 0xFDC2, 0x5599,
08531     0xFDC3, 0x6BC1, 0xFDC4, 0x5F59, 0xFDC5, 0x5FBD, 0xFDC6, 0x63EE,
08532     0xFDC7, 0x6689, 0xFDC8, 0x7147, 0xFDC9, 0x8AF1, 0xFDCA, 0x8F1D,
08533     0xFDCB, 0x9EBE, 0xFDCC, 0x4F11, 0xFDCD, 0x643A, 0xFDCE, 0x70CB,
08534     0xFDCF, 0x7566, 0xFDD0, 0x8667, 0xFDD1, 0x6064, 0xFDD2, 0x8B4E,
08535     0xFDD3, 0x9DF8, 0xFDD4, 0x5147, 0xFDD5, 0x51F6, 0xFDD6, 0x5308,
08536     0xFDD7, 0x6D36, 0xFDD8, 0x80F8, 0xFDD9, 0x9ED1, 0xFDDA, 0x6615,
08537     0xFDDB, 0x6B23, 0xFDDC, 0x7098, 0xFDDD, 0x75D5, 0xFDDE, 0x5403,
08538     0xFDDF, 0x5C79, 0xFDE0, 0x7D07, 0xFDE1, 0x8A16, 0xFDE2, 0x6B20,
08539     0xFDE3, 0x6B3D, 0xFDE4, 0x6B46, 0xFDE5, 0x5438, 0xFDE6, 0x6070,
08540     0xFDE7, 0x6D3D, 0xFDE8, 0x7FD5, 0xFDE9, 0x8208, 0xFDEA, 0x50D6,
08541     0xFDEB, 0x51DE, 0xFDEC, 0x559C, 0xFDED, 0x566B, 0xFDEE, 0x56CD,
08542     0xFDEF, 0x59EC, 0xFDF0, 0x5B09, 0xFDF1, 0x5E0C, 0xFDF2, 0x6199,
08543     0xFDF3, 0x6198, 0xFDF4, 0x6231, 0xFDF5, 0x665E, 0xFDF6, 0x66E6,
08544     0xFDF7, 0x7199, 0xFDF8, 0x71B9, 0xFDF9, 0x71BA, 0xFDFA, 0x72A7,
08545     0xFDFB, 0x79A7, 0xFDFC, 0x7A00, 0xFDFD, 0x7FB2, 0xFDFE, 0x8A70,
08546     0, 0
08547 };
08548
08549
08550
08551 WCHAR ff_convert (  /* Converted code, 0 means conversion error */
08552     WCHAR   src,    /* Character code to be converted */
08553     UINT    dir     /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */
08554 )
08555 {
08556     const WCHAR *p;
08557     WCHAR c;
08558     int i, n, li, hi;
08559
08560
08561     if (src < 0x80) {   /* ASCII */
08562         c = src;
08563     } else {
08564         if (dir) {      /* OEMCP to unicode */
08565             p = oem2uni;
08566             hi = sizeof(oem2uni) / 4 - 1;
08567         } else {        /* Unicode to OEMCP */
08568             p = uni2oem;
08569             hi = sizeof(uni2oem) / 4 - 1;
08570         }
08571         li = 0;
08572         for (n = 16; n; n--) {
08573             i = li + (hi - li) / 2;
08574             if (src == p[i * 2]) break;
08575             if (src > p[i * 2])
08576                 li = i;
08577             else
08578                 hi = i;
08579         }
08580         c = n ? p[i * 2 + 1] : 0;
08581     }
08582
08583     return c;
08584 }
08585 #else
08586 #error This file is not needed in current configuration.
08587
08588 #endif


BeRTOS: cc950.c Source File

  • fs
  • fatfs
  • option
cc950.c
00001 /*------------------------------------------------------------------------*/
00002 /* Unicode - OEM code bidirectional converter  (C)ChaN, 2009              */
00003 /*                                                                        */
00004 /* CP950 (Traditional Chinese Big5)                                       */
00005 /*------------------------------------------------------------------------*/
00006
00007 #include "../ff.h"
00008
00009
00010 #if _USE_LFN && _CODE_PAGE == 950
00011
00012
00013 static
00014 const WCHAR uni2oem[] = {
00015 /*  Unicode - OEM,  Unicode - OEM,  Unicode - OEM,  Unicode - OEM */
00016     0x00A7, 0xA1B1, 0x00AF, 0xA1C2, 0x00B0, 0xA258, 0x00B1, 0xA1D3,
00017     0x00B7, 0xA150, 0x00D7, 0xA1D1, 0x00F7, 0xA1D2, 0x02C7, 0xA3BE,
00018     0x02C9, 0xA3BC, 0x02CA, 0xA3BD, 0x02CB, 0xA3BF, 0x02CD, 0xA1C5,
00019     0x02D9, 0xA3BB, 0x0391, 0xA344, 0x0392, 0xA345, 0x0393, 0xA346,
00020     0x0394, 0xA347, 0x0395, 0xA348, 0x0396, 0xA349, 0x0397, 0xA34A,
00021     0x0398, 0xA34B, 0x0399, 0xA34C, 0x039A, 0xA34D, 0x039B, 0xA34E,
00022     0x039C, 0xA34F, 0x039D, 0xA350, 0x039E, 0xA351, 0x039F, 0xA352,
00023     0x03A0, 0xA353, 0x03A1, 0xA354, 0x03A3, 0xA355, 0x03A4, 0xA356,
00024     0x03A5, 0xA357, 0x03A6, 0xA358, 0x03A7, 0xA359, 0x03A8, 0xA35A,
00025     0x03A9, 0xA35B, 0x03B1, 0xA35C, 0x03B2, 0xA35D, 0x03B3, 0xA35E,
00026     0x03B4, 0xA35F, 0x03B5, 0xA360, 0x03B6, 0xA361, 0x03B7, 0xA362,
00027     0x03B8, 0xA363, 0x03B9, 0xA364, 0x03BA, 0xA365, 0x03BB, 0xA366,
00028     0x03BC, 0xA367, 0x03BD, 0xA368, 0x03BE, 0xA369, 0x03BF, 0xA36A,
00029     0x03C0, 0xA36B, 0x03C1, 0xA36C, 0x03C3, 0xA36D, 0x03C4, 0xA36E,
00030     0x03C5, 0xA36F, 0x03C6, 0xA370, 0x03C7, 0xA371, 0x03C8, 0xA372,
00031     0x03C9, 0xA373, 0x2013, 0xA156, 0x2014, 0xA158, 0x2018, 0xA1A5,
00032     0x2019, 0xA1A6, 0x201C, 0xA1A7, 0x201D, 0xA1A8, 0x2025, 0xA14C,
00033     0x2026, 0xA14B, 0x2027, 0xA145, 0x2032, 0xA1AC, 0x2035, 0xA1AB,
00034     0x203B, 0xA1B0, 0x20AC, 0xA3E1, 0x2103, 0xA24A, 0x2105, 0xA1C1,
00035     0x2109, 0xA24B, 0x2160, 0xA2B9, 0x2161, 0xA2BA, 0x2162, 0xA2BB,
00036     0x2163, 0xA2BC, 0x2164, 0xA2BD, 0x2165, 0xA2BE, 0x2166, 0xA2BF,
00037     0x2167, 0xA2C0, 0x2168, 0xA2C1, 0x2169, 0xA2C2, 0x2190, 0xA1F6,
00038     0x2191, 0xA1F4, 0x2192, 0xA1F7, 0x2193, 0xA1F5, 0x2196, 0xA1F8,
00039     0x2197, 0xA1F9, 0x2198, 0xA1FB, 0x2199, 0xA1FA, 0x2215, 0xA241,
00040     0x221A, 0xA1D4, 0x221E, 0xA1DB, 0x221F, 0xA1E8, 0x2220, 0xA1E7,
00041     0x2223, 0xA1FD, 0x2225, 0xA1FC, 0x2229, 0xA1E4, 0x222A, 0xA1E5,
00042     0x222B, 0xA1EC, 0x222E, 0xA1ED, 0x2234, 0xA1EF, 0x2235, 0xA1EE,
00043     0x2252, 0xA1DC, 0x2260, 0xA1DA, 0x2261, 0xA1DD, 0x2266, 0xA1D8,
00044     0x2267, 0xA1D9, 0x2295, 0xA1F2, 0x2299, 0xA1F3, 0x22A5, 0xA1E6,
00045     0x22BF, 0xA1E9, 0x2500, 0xA277, 0x2502, 0xA278, 0x250C, 0xA27A,
00046     0x2510, 0xA27B, 0x2514, 0xA27C, 0x2518, 0xA27D, 0x251C, 0xA275,
00047     0x2524, 0xA274, 0x252C, 0xA273, 0x2534, 0xA272, 0x253C, 0xA271,
00048     0x2550, 0xA2A4, 0x2550, 0xF9F9, 0x2551, 0xF9F8, 0x2552, 0xF9E6,
00049     0x2553, 0xF9EF, 0x2554, 0xF9DD, 0x2555, 0xF9E8, 0x2556, 0xF9F1,
00050     0x2557, 0xF9DF, 0x2558, 0xF9EC, 0x2559, 0xF9F5, 0x255A, 0xF9E3,
00051     0x255B, 0xF9EE, 0x255C, 0xF9F7, 0x255D, 0xF9E5, 0x255E, 0xA2A5,
00052     0x255E, 0xF9E9, 0x255F, 0xF9F2, 0x2560, 0xF9E0, 0x2561, 0xA2A7,
00053     0x2561, 0xF9EB, 0x2562, 0xF9F4, 0x2563, 0xF9E2, 0x2564, 0xF9E7,
00054     0x2565, 0xF9F0, 0x2566, 0xF9DE, 0x2567, 0xF9ED, 0x2568, 0xF9F6,
00055     0x2569, 0xF9E4, 0x256A, 0xA2A6, 0x256A, 0xF9EA, 0x256B, 0xF9F3,
00056     0x256C, 0xF9E1, 0x256D, 0xA27E, 0x256D, 0xF9FA, 0x256E, 0xA2A1,
00057     0x256E, 0xF9FB, 0x256F, 0xA2A3, 0x256F, 0xF9FD, 0x2570, 0xA2A2,
00058     0x2570, 0xF9FC, 0x2571, 0xA2AC, 0x2572, 0xA2AD, 0x2573, 0xA2AE,
00059     0x2574, 0xA15A, 0x2581, 0xA262, 0x2582, 0xA263, 0x2583, 0xA264,
00060     0x2584, 0xA265, 0x2585, 0xA266, 0x2586, 0xA267, 0x2587, 0xA268,
00061     0x2588, 0xA269, 0x2589, 0xA270, 0x258A, 0xA26F, 0x258B, 0xA26E,
00062     0x258C, 0xA26D, 0x258D, 0xA26C, 0x258E, 0xA26B, 0x258F, 0xA26A,
00063     0x2593, 0xF9FE, 0x2594, 0xA276, 0x2595, 0xA279, 0x25A0, 0xA1BD,
00064     0x25A1, 0xA1BC, 0x25B2, 0xA1B6, 0x25B3, 0xA1B5, 0x25BC, 0xA1BF,
00065     0x25BD, 0xA1BE, 0x25C6, 0xA1BB, 0x25C7, 0xA1BA, 0x25CB, 0xA1B3,
00066     0x25CE, 0xA1B7, 0x25CF, 0xA1B4, 0x25E2, 0xA2A8, 0x25E3, 0xA2A9,
00067     0x25E4, 0xA2AB, 0x25E5, 0xA2AA, 0x2605, 0xA1B9, 0x2606, 0xA1B8,
00068     0x2640, 0xA1F0, 0x2642, 0xA1F1, 0x3000, 0xA140, 0x3001, 0xA142,
00069     0x3002, 0xA143, 0x3003, 0xA1B2, 0x3008, 0xA171, 0x3009, 0xA172,
00070     0x300A, 0xA16D, 0x300B, 0xA16E, 0x300C, 0xA175, 0x300D, 0xA176,
00071     0x300E, 0xA179, 0x300F, 0xA17A, 0x3010, 0xA169, 0x3011, 0xA16A,
00072     0x3012, 0xA245, 0x3014, 0xA165, 0x3015, 0xA166, 0x301D, 0xA1A9,
00073     0x301E, 0xA1AA, 0x3021, 0xA2C3, 0x3022, 0xA2C4, 0x3023, 0xA2C5,
00074     0x3024, 0xA2C6, 0x3025, 0xA2C7, 0x3026, 0xA2C8, 0x3027, 0xA2C9,
00075     0x3028, 0xA2CA, 0x3029, 0xA2CB, 0x3105, 0xA374, 0x3106, 0xA375,
00076     0x3107, 0xA376, 0x3108, 0xA377, 0x3109, 0xA378, 0x310A, 0xA379,
00077     0x310B, 0xA37A, 0x310C, 0xA37B, 0x310D, 0xA37C, 0x310E, 0xA37D,
00078     0x310F, 0xA37E, 0x3110, 0xA3A1, 0x3111, 0xA3A2, 0x3112, 0xA3A3,
00079     0x3113, 0xA3A4, 0x3114, 0xA3A5, 0x3115, 0xA3A6, 0x3116, 0xA3A7,
00080     0x3117, 0xA3A8, 0x3118, 0xA3A9, 0x3119, 0xA3AA, 0x311A, 0xA3AB,
00081     0x311B, 0xA3AC, 0x311C, 0xA3AD, 0x311D, 0xA3AE, 0x311E, 0xA3AF,
00082     0x311F, 0xA3B0, 0x3120, 0xA3B1, 0x3121, 0xA3B2, 0x3122, 0xA3B3,
00083     0x3123, 0xA3B4, 0x3124, 0xA3B5, 0x3125, 0xA3B6, 0x3126, 0xA3B7,
00084     0x3127, 0xA3B8, 0x3128, 0xA3B9, 0x3129, 0xA3BA, 0x32A3, 0xA1C0,
00085     0x338E, 0xA255, 0x338F, 0xA256, 0x339C, 0xA250, 0x339D, 0xA251,
00086     0x339E, 0xA252, 0x33A1, 0xA254, 0x33C4, 0xA257, 0x33CE, 0xA253,
00087     0x33D1, 0xA1EB, 0x33D2, 0xA1EA, 0x33D5, 0xA24F, 0x4E00, 0xA440,
00088     0x4E01, 0xA442, 0x4E03, 0xA443, 0x4E07, 0xC945, 0x4E08, 0xA456,
00089     0x4E09, 0xA454, 0x4E0A, 0xA457, 0x4E0B, 0xA455, 0x4E0C, 0xC946,
00090     0x4E0D, 0xA4A3, 0x4E0E, 0xC94F, 0x4E0F, 0xC94D, 0x4E10, 0xA4A2,
00091     0x4E11, 0xA4A1, 0x4E14, 0xA542, 0x4E15, 0xA541, 0x4E16, 0xA540,
00092     0x4E18, 0xA543, 0x4E19, 0xA4FE, 0x4E1E, 0xA5E0, 0x4E1F, 0xA5E1,
00093     0x4E26, 0xA8C3, 0x4E2B, 0xA458, 0x4E2D, 0xA4A4, 0x4E2E, 0xC950,
00094     0x4E30, 0xA4A5, 0x4E31, 0xC963, 0x4E32, 0xA6EA, 0x4E33, 0xCBB1,
00095     0x4E38, 0xA459, 0x4E39, 0xA4A6, 0x4E3B, 0xA544, 0x4E3C, 0xC964,
00096     0x4E42, 0xC940, 0x4E43, 0xA444, 0x4E45, 0xA45B, 0x4E47, 0xC947,
00097     0x4E48, 0xA45C, 0x4E4B, 0xA4A7, 0x4E4D, 0xA545, 0x4E4E, 0xA547,
00098     0x4E4F, 0xA546, 0x4E52, 0xA5E2, 0x4E53, 0xA5E3, 0x4E56, 0xA8C4,
00099     0x4E58, 0xADBC, 0x4E59, 0xA441, 0x4E5C, 0xC941, 0x4E5D, 0xA445,
00100     0x4E5E, 0xA45E, 0x4E5F, 0xA45D, 0x4E69, 0xA5E4, 0x4E73, 0xA8C5,
00101     0x4E7E, 0xB0AE, 0x4E7F, 0xD44B, 0x4E82, 0xB6C3, 0x4E83, 0xDCB1,
00102     0x4E84, 0xDCB2, 0x4E86, 0xA446, 0x4E88, 0xA4A9, 0x4E8B, 0xA8C6,
00103     0x4E8C, 0xA447, 0x4E8D, 0xC948, 0x4E8E, 0xA45F, 0x4E91, 0xA4AA,
00104     0x4E92, 0xA4AC, 0x4E93, 0xC951, 0x4E94, 0xA4AD, 0x4E95, 0xA4AB,
00105     0x4E99, 0xA5E5, 0x4E9B, 0xA8C7, 0x4E9E, 0xA8C8, 0x4E9F, 0xAB45,
00106     0x4EA1, 0xA460, 0x4EA2, 0xA4AE, 0x4EA4, 0xA5E6, 0x4EA5, 0xA5E8,
00107     0x4EA6, 0xA5E7, 0x4EA8, 0xA6EB, 0x4EAB, 0xA8C9, 0x4EAC, 0xA8CA,
00108     0x4EAD, 0xAB46, 0x4EAE, 0xAB47, 0x4EB3, 0xADBD, 0x4EB6, 0xDCB3,
00109     0x4EB9, 0xF6D6, 0x4EBA, 0xA448, 0x4EC0, 0xA4B0, 0x4EC1, 0xA4AF,
00110     0x4EC2, 0xC952, 0x4EC3, 0xA4B1, 0x4EC4, 0xA4B7, 0x4EC6, 0xA4B2,
00111     0x4EC7, 0xA4B3, 0x4EC8, 0xC954, 0x4EC9, 0xC953, 0x4ECA, 0xA4B5,
00112     0x4ECB, 0xA4B6, 0x4ECD, 0xA4B4, 0x4ED4, 0xA54A, 0x4ED5, 0xA54B,
00113     0x4ED6, 0xA54C, 0x4ED7, 0xA54D, 0x4ED8, 0xA549, 0x4ED9, 0xA550,
00114     0x4EDA, 0xC96A, 0x4EDC, 0xC966, 0x4EDD, 0xC969, 0x4EDE, 0xA551,
00115     0x4EDF, 0xA561, 0x4EE1, 0xC968, 0x4EE3, 0xA54E, 0x4EE4, 0xA54F,
00116     0x4EE5, 0xA548, 0x4EE8, 0xC965, 0x4EE9, 0xC967, 0x4EF0, 0xA5F5,
00117     0x4EF1, 0xC9B0, 0x4EF2, 0xA5F2, 0x4EF3, 0xA5F6, 0x4EF4, 0xC9BA,
00118     0x4EF5, 0xC9AE, 0x4EF6, 0xA5F3, 0x4EF7, 0xC9B2, 0x4EFB, 0xA5F4,
00119     0x4EFD, 0xA5F7, 0x4EFF, 0xA5E9, 0x4F00, 0xC9B1, 0x4F01, 0xA5F8,
00120     0x4F02, 0xC9B5, 0x4F04, 0xC9B9, 0x4F05, 0xC9B6, 0x4F08, 0xC9B3,
00121     0x4F09, 0xA5EA, 0x4F0A, 0xA5EC, 0x4F0B, 0xA5F9, 0x4F0D, 0xA5EE,
00122     0x4F0E, 0xC9AB, 0x4F0F, 0xA5F1, 0x4F10, 0xA5EF, 0x4F11, 0xA5F0,
00123     0x4F12, 0xC9BB, 0x4F13, 0xC9B8, 0x4F14, 0xC9AF, 0x4F15, 0xA5ED,
00124     0x4F18, 0xC9AC, 0x4F19, 0xA5EB, 0x4F1D, 0xC9B4, 0x4F22, 0xC9B7,
00125     0x4F2C, 0xC9AD, 0x4F2D, 0xCA66, 0x4F2F, 0xA742, 0x4F30, 0xA6F4,
00126     0x4F33, 0xCA67, 0x4F34, 0xA6F1, 0x4F36, 0xA744, 0x4F38, 0xA6F9,
00127     0x4F3A, 0xA6F8, 0x4F3B, 0xCA5B, 0x4F3C, 0xA6FC, 0x4F3D, 0xA6F7,
00128     0x4F3E, 0xCA60, 0x4F3F, 0xCA68, 0x4F41, 0xCA64, 0x4F43, 0xA6FA,
00129     0x4F46, 0xA6FD, 0x4F47, 0xA6EE, 0x4F48, 0xA747, 0x4F49, 0xCA5D,
00130     0x4F4C, 0xCBBD, 0x4F4D, 0xA6EC, 0x4F4E, 0xA743, 0x4F4F, 0xA6ED,
00131     0x4F50, 0xA6F5, 0x4F51, 0xA6F6, 0x4F52, 0xCA62, 0x4F53, 0xCA5E,
00132     0x4F54, 0xA6FB, 0x4F55, 0xA6F3, 0x4F56, 0xCA5A, 0x4F57, 0xA6EF,
00133     0x4F58, 0xCA65, 0x4F59, 0xA745, 0x4F5A, 0xA748, 0x4F5B, 0xA6F2,
00134     0x4F5C, 0xA740, 0x4F5D, 0xA746, 0x4F5E, 0xA6F0, 0x4F5F, 0xCA63,
00135     0x4F60, 0xA741, 0x4F61, 0xCA69, 0x4F62, 0xCA5C, 0x4F63, 0xA6FE,
00136     0x4F64, 0xCA5F, 0x4F67, 0xCA61, 0x4F69, 0xA8D8, 0x4F6A, 0xCBBF,
00137     0x4F6B, 0xCBCB, 0x4F6C, 0xA8D0, 0x4F6E, 0xCBCC, 0x4F6F, 0xA8CB,
00138     0x4F70, 0xA8D5, 0x4F73, 0xA8CE, 0x4F74, 0xCBB9, 0x4F75, 0xA8D6,
00139     0x4F76, 0xCBB8, 0x4F77, 0xCBBC, 0x4F78, 0xCBC3, 0x4F79, 0xCBC1,
00140     0x4F7A, 0xA8DE, 0x4F7B, 0xA8D9, 0x4F7C, 0xCBB3, 0x4F7D, 0xCBB5,
00141     0x4F7E, 0xA8DB, 0x4F7F, 0xA8CF, 0x4F80, 0xCBB6, 0x4F81, 0xCBC2,
00142     0x4F82, 0xCBC9, 0x4F83, 0xA8D4, 0x4F84, 0xCBBB, 0x4F85, 0xCBB4,
00143     0x4F86, 0xA8D3, 0x4F87, 0xCBB7, 0x4F88, 0xA8D7, 0x4F89, 0xCBBA,
00144     0x4F8B, 0xA8D2, 0x4F8D, 0xA8CD, 0x4F8F, 0xA8DC, 0x4F90, 0xCBC4,
00145     0x4F91, 0xA8DD, 0x4F92, 0xCBC8, 0x4F94, 0xCBC6, 0x4F95, 0xCBCA,
00146     0x4F96, 0xA8DA, 0x4F97, 0xCBBE, 0x4F98, 0xCBB2, 0x4F9A, 0xCBC0,
00147     0x4F9B, 0xA8D1, 0x4F9C, 0xCBC5, 0x4F9D, 0xA8CC, 0x4F9E, 0xCBC7,
00148     0x4FAE, 0xAB56, 0x4FAF, 0xAB4A, 0x4FB2, 0xCDE0, 0x4FB3, 0xCDE8,
00149     0x4FB5, 0xAB49, 0x4FB6, 0xAB51, 0x4FB7, 0xAB5D, 0x4FB9, 0xCDEE,
00150     0x4FBA, 0xCDEC, 0x4FBB, 0xCDE7, 0x4FBF, 0xAB4B, 0x4FC0, 0xCDED,
00151     0x4FC1, 0xCDE3, 0x4FC2, 0xAB59, 0x4FC3, 0xAB50, 0x4FC4, 0xAB58,
00152     0x4FC5, 0xCDDE, 0x4FC7, 0xCDEA, 0x4FC9, 0xCDE1, 0x4FCA, 0xAB54,
00153     0x4FCB, 0xCDE2, 0x4FCD, 0xCDDD, 0x4FCE, 0xAB5B, 0x4FCF, 0xAB4E,
00154     0x4FD0, 0xAB57, 0x4FD1, 0xAB4D, 0x4FD3, 0xCDDF, 0x4FD4, 0xCDE4,
00155     0x4FD6, 0xCDEB, 0x4FD7, 0xAB55, 0x4FD8, 0xAB52, 0x4FD9, 0xCDE6,
00156     0x4FDA, 0xAB5A, 0x4FDB, 0xCDE9, 0x4FDC, 0xCDE5, 0x4FDD, 0xAB4F,
00157     0x4FDE, 0xAB5C, 0x4FDF, 0xAB53, 0x4FE0, 0xAB4C, 0x4FE1, 0xAB48,
00158     0x4FEC, 0xCDEF, 0x4FEE, 0xADD7, 0x4FEF, 0xADC1, 0x4FF1, 0xADD1,
00159     0x4FF3, 0xADD6, 0x4FF4, 0xD0D0, 0x4FF5, 0xD0CF, 0x4FF6, 0xD0D4,
00160     0x4FF7, 0xD0D5, 0x4FF8, 0xADC4, 0x4FFA, 0xADCD, 0x4FFE, 0xADDA,
00161     0x5000, 0xADCE, 0x5005, 0xD0C9, 0x5006, 0xADC7, 0x5007, 0xD0CA,
00162     0x5009, 0xADDC, 0x500B, 0xADD3, 0x500C, 0xADBE, 0x500D, 0xADBF,
00163     0x500E, 0xD0DD, 0x500F, 0xB0BF, 0x5011, 0xADCC, 0x5012, 0xADCB,
00164     0x5013, 0xD0CB, 0x5014, 0xADCF, 0x5015, 0xD45B, 0x5016, 0xADC6,
00165     0x5017, 0xD0D6, 0x5018, 0xADD5, 0x5019, 0xADD4, 0x501A, 0xADCA,
00166     0x501B, 0xD0CE, 0x501C, 0xD0D7, 0x501E, 0xD0C8, 0x501F, 0xADC9,
00167     0x5020, 0xD0D8, 0x5021, 0xADD2, 0x5022, 0xD0CC, 0x5023, 0xADC0,
00168     0x5025, 0xADC3, 0x5026, 0xADC2, 0x5027, 0xD0D9, 0x5028, 0xADD0,
00169     0x5029, 0xADC5, 0x502A, 0xADD9, 0x502B, 0xADDB, 0x502C, 0xD0D3,
00170     0x502D, 0xADD8, 0x502F, 0xD0DB, 0x5030, 0xD0CD, 0x5031, 0xD0DC,
00171     0x5033, 0xD0D1, 0x5035, 0xD0DA, 0x5037, 0xD0D2, 0x503C, 0xADC8,
00172     0x5040, 0xD463, 0x5041, 0xD457, 0x5043, 0xB0B3, 0x5045, 0xD45C,
00173     0x5046, 0xD462, 0x5047, 0xB0B2, 0x5048, 0xD455, 0x5049, 0xB0B6,
00174     0x504A, 0xD459, 0x504B, 0xD452, 0x504C, 0xB0B4, 0x504D, 0xD456,
00175     0x504E, 0xB0B9, 0x504F, 0xB0BE, 0x5051, 0xD467, 0x5053, 0xD451,
00176     0x5055, 0xB0BA, 0x5057, 0xD466, 0x505A, 0xB0B5, 0x505B, 0xD458,
00177     0x505C, 0xB0B1, 0x505D, 0xD453, 0x505E, 0xD44F, 0x505F, 0xD45D,
00178     0x5060, 0xD450, 0x5061, 0xD44E, 0x5062, 0xD45A, 0x5063, 0xD460,
00179     0x5064, 0xD461, 0x5065, 0xB0B7, 0x5068, 0xD85B, 0x5069, 0xD45E,
00180     0x506A, 0xD44D, 0x506B, 0xD45F, 0x506D, 0xB0C1, 0x506E, 0xD464,
00181     0x506F, 0xB0C0, 0x5070, 0xD44C, 0x5072, 0xD454, 0x5073, 0xD465,
00182     0x5074, 0xB0BC, 0x5075, 0xB0BB, 0x5076, 0xB0B8, 0x5077, 0xB0BD,
00183     0x507A, 0xB0AF, 0x507D, 0xB0B0, 0x5080, 0xB3C8, 0x5082, 0xD85E,
00184     0x5083, 0xD857, 0x5085, 0xB3C5, 0x5087, 0xD85F, 0x508B, 0xD855,
00185     0x508C, 0xD858, 0x508D, 0xB3C4, 0x508E, 0xD859, 0x5091, 0xB3C7,
00186     0x5092, 0xD85D, 0x5094, 0xD853, 0x5095, 0xD852, 0x5096, 0xB3C9,
00187     0x5098, 0xB3CA, 0x5099, 0xB3C6, 0x509A, 0xB3CB, 0x509B, 0xD851,
00188     0x509C, 0xD85C, 0x509D, 0xD85A, 0x509E, 0xD854, 0x50A2, 0xB3C3,
00189     0x50A3, 0xD856, 0x50AC, 0xB6CA, 0x50AD, 0xB6C4, 0x50AE, 0xDCB7,
00190     0x50AF, 0xB6CD, 0x50B0, 0xDCBD, 0x50B1, 0xDCC0, 0x50B2, 0xB6C6,
00191     0x50B3, 0xB6C7, 0x50B4, 0xDCBA, 0x50B5, 0xB6C5, 0x50B6, 0xDCC3,
00192     0x50B7, 0xB6CB, 0x50B8, 0xDCC4, 0x50BA, 0xDCBF, 0x50BB, 0xB6CC,
00193     0x50BD, 0xDCB4, 0x50BE, 0xB6C9, 0x50BF, 0xDCB5, 0x50C1, 0xDCBE,
00194     0x50C2, 0xDCBC, 0x50C4, 0xDCB8, 0x50C5, 0xB6C8, 0x50C6, 0xDCB6,
00195     0x50C7, 0xB6CE, 0x50C8, 0xDCBB, 0x50C9, 0xDCC2, 0x50CA, 0xDCB9,
00196     0x50CB, 0xDCC1, 0x50CE, 0xB9B6, 0x50CF, 0xB9B3, 0x50D1, 0xB9B4,
00197     0x50D3, 0xE0F9, 0x50D4, 0xE0F1, 0x50D5, 0xB9B2, 0x50D6, 0xB9AF,
00198     0x50D7, 0xE0F2, 0x50DA, 0xB9B1, 0x50DB, 0xE0F5, 0x50DD, 0xE0F7,
00199     0x50E0, 0xE0FE, 0x50E3, 0xE0FD, 0x50E4, 0xE0F8, 0x50E5, 0xB9AE,
00200     0x50E6, 0xE0F0, 0x50E7, 0xB9AC, 0x50E8, 0xE0F3, 0x50E9, 0xB9B7,
00201     0x50EA, 0xE0F6, 0x50EC, 0xE0FA, 0x50ED, 0xB9B0, 0x50EE, 0xB9AD,
00202     0x50EF, 0xE0FC, 0x50F0, 0xE0FB, 0x50F1, 0xB9B5, 0x50F3, 0xE0F4,
00203     0x50F5, 0xBBF8, 0x50F6, 0xE4EC, 0x50F8, 0xE4E9, 0x50F9, 0xBBF9,
00204     0x50FB, 0xBBF7, 0x50FD, 0xE4F0, 0x50FE, 0xE4ED, 0x50FF, 0xE4E6,
00205     0x5100, 0xBBF6, 0x5102, 0xBBFA, 0x5103, 0xE4E7, 0x5104, 0xBBF5,
00206     0x5105, 0xBBFD, 0x5106, 0xE4EA, 0x5107, 0xE4EB, 0x5108, 0xBBFB,
00207     0x5109, 0xBBFC, 0x510A, 0xE4F1, 0x510B, 0xE4EE, 0x510C, 0xE4EF,
00208     0x5110, 0xBEAA, 0x5111, 0xE8F8, 0x5112, 0xBEA7, 0x5113, 0xE8F5,
00209     0x5114, 0xBEA9, 0x5115, 0xBEAB, 0x5117, 0xE8F6, 0x5118, 0xBEA8,
00210     0x511A, 0xE8F7, 0x511C, 0xE8F4, 0x511F, 0xC076, 0x5120, 0xECBD,
00211     0x5121, 0xC077, 0x5122, 0xECBB, 0x5124, 0xECBC, 0x5125, 0xECBA,
00212     0x5126, 0xECB9, 0x5129, 0xECBE, 0x512A, 0xC075, 0x512D, 0xEFB8,
00213     0x512E, 0xEFB9, 0x5130, 0xE4E8, 0x5131, 0xEFB7, 0x5132, 0xC078,
00214     0x5133, 0xC35F, 0x5134, 0xF1EB, 0x5135, 0xF1EC, 0x5137, 0xC4D7,
00215     0x5138, 0xC4D8, 0x5139, 0xF5C1, 0x513A, 0xF5C0, 0x513B, 0xC56C,
00216     0x513C, 0xC56B, 0x513D, 0xF7D0, 0x513F, 0xA449, 0x5140, 0xA461,
00217     0x5141, 0xA4B9, 0x5143, 0xA4B8, 0x5144, 0xA553, 0x5145, 0xA552,
00218     0x5146, 0xA5FC, 0x5147, 0xA5FB, 0x5148, 0xA5FD, 0x5149, 0xA5FA,
00219     0x514B, 0xA74A, 0x514C, 0xA749, 0x514D, 0xA74B, 0x5152, 0xA8E0,
00220     0x5154, 0xA8DF, 0x5155, 0xA8E1, 0x5157, 0xAB5E, 0x5159, 0xA259,
00221     0x515A, 0xD0DE, 0x515B, 0xA25A, 0x515C, 0xB0C2, 0x515D, 0xA25C,
00222     0x515E, 0xA25B, 0x515F, 0xD860, 0x5161, 0xA25D, 0x5162, 0xB9B8,
00223     0x5163, 0xA25E, 0x5165, 0xA44A, 0x5167, 0xA4BA, 0x5168, 0xA5FE,
00224     0x5169, 0xA8E2, 0x516B, 0xA44B, 0x516C, 0xA4BD, 0x516D, 0xA4BB,
00225     0x516E, 0xA4BC, 0x5171, 0xA640, 0x5175, 0xA74C, 0x5176, 0xA8E4,
00226     0x5177, 0xA8E3, 0x5178, 0xA8E5, 0x517C, 0xADDD, 0x5180, 0xBEAC,
00227     0x5187, 0xC94E, 0x5189, 0xA554, 0x518A, 0xA555, 0x518D, 0xA641,
00228     0x518F, 0xCA6A, 0x5191, 0xAB60, 0x5192, 0xAB5F, 0x5193, 0xD0E0,
00229     0x5194, 0xD0DF, 0x5195, 0xB0C3, 0x5197, 0xA4BE, 0x5198, 0xC955,
00230     0x519E, 0xCBCD, 0x51A0, 0xAB61, 0x51A2, 0xADE0, 0x51A4, 0xADDE,
00231     0x51A5, 0xADDF, 0x51AA, 0xBEAD, 0x51AC, 0xA556, 0x51B0, 0xA642,
00232     0x51B1, 0xC9BC, 0x51B6, 0xA74D, 0x51B7, 0xA74E, 0x51B9, 0xCA6B,
00233     0x51BC, 0xCBCE, 0x51BD, 0xA8E6, 0x51BE, 0xCBCF, 0x51C4, 0xD0E2,
00234     0x51C5, 0xD0E3, 0x51C6, 0xADE3, 0x51C8, 0xD0E4, 0x51CA, 0xD0E1,
00235     0x51CB, 0xADE4, 0x51CC, 0xADE2, 0x51CD, 0xADE1, 0x51CE, 0xD0E5,
00236     0x51D0, 0xD468, 0x51D4, 0xD861, 0x51D7, 0xDCC5, 0x51D8, 0xE140,
00237     0x51DC, 0xBBFE, 0x51DD, 0xBEAE, 0x51DE, 0xE8F9, 0x51E0, 0xA44C,
00238     0x51E1, 0xA45A, 0x51F0, 0xB0C4, 0x51F1, 0xB3CD, 0x51F3, 0xB9B9,
00239     0x51F5, 0xC942, 0x51F6, 0xA4BF, 0x51F8, 0xA559, 0x51F9, 0xA557,
00240     0x51FA, 0xA558, 0x51FD, 0xA8E7, 0x5200, 0xA44D, 0x5201, 0xA44E,
00241     0x5203, 0xA462, 0x5206, 0xA4C0, 0x5207, 0xA4C1, 0x5208, 0xA4C2,
00242     0x5209, 0xC9BE, 0x520A, 0xA55A, 0x520C, 0xC96B, 0x520E, 0xA646,
00243     0x5210, 0xC9BF, 0x5211, 0xA644, 0x5212, 0xA645, 0x5213, 0xC9BD,
00244     0x5216, 0xA647, 0x5217, 0xA643, 0x521C, 0xCA6C, 0x521D, 0xAAEC,
00245     0x521E, 0xCA6D, 0x5221, 0xCA6E, 0x5224, 0xA750, 0x5225, 0xA74F,
00246     0x5228, 0xA753, 0x5229, 0xA751, 0x522A, 0xA752, 0x522E, 0xA8ED,
00247     0x5230, 0xA8EC, 0x5231, 0xCBD4, 0x5232, 0xCBD1, 0x5233, 0xCBD2,
00248     0x5235, 0xCBD0, 0x5236, 0xA8EE, 0x5237, 0xA8EA, 0x5238, 0xA8E9,
00249     0x523A, 0xA8EB, 0x523B, 0xA8E8, 0x5241, 0xA8EF, 0x5243, 0xAB63,
00250     0x5244, 0xCDF0, 0x5246, 0xCBD3, 0x5247, 0xAB68, 0x5249, 0xCDF1,
00251     0x524A, 0xAB64, 0x524B, 0xAB67, 0x524C, 0xAB66, 0x524D, 0xAB65,
00252     0x524E, 0xAB62, 0x5252, 0xD0E8, 0x5254, 0xADE7, 0x5255, 0xD0EB,
00253     0x5256, 0xADE5, 0x525A, 0xD0E7, 0x525B, 0xADE8, 0x525C, 0xADE6,
00254     0x525D, 0xADE9, 0x525E, 0xD0E9, 0x525F, 0xD0EA, 0x5261, 0xD0E6,
00255     0x5262, 0xD0EC, 0x5269, 0xB3D1, 0x526A, 0xB0C5, 0x526B, 0xD469,
00256     0x526C, 0xD46B, 0x526D, 0xD46A, 0x526E, 0xD46C, 0x526F, 0xB0C6,
00257     0x5272, 0xB3CE, 0x5274, 0xB3CF, 0x5275, 0xB3D0, 0x5277, 0xB6D0,
00258     0x5278, 0xDCC7, 0x527A, 0xDCC6, 0x527B, 0xDCC8, 0x527C, 0xDCC9,
00259     0x527D, 0xB6D1, 0x527F, 0xB6CF, 0x5280, 0xE141, 0x5281, 0xE142,
00260     0x5282, 0xB9BB, 0x5283, 0xB9BA, 0x5284, 0xE35A, 0x5287, 0xBC40,
00261     0x5288, 0xBC41, 0x5289, 0xBC42, 0x528A, 0xBC44, 0x528B, 0xE4F2,
00262     0x528C, 0xE4F3, 0x528D, 0xBC43, 0x5291, 0xBEAF, 0x5293, 0xBEB0,
00263     0x5296, 0xF1ED, 0x5297, 0xF5C3, 0x5298, 0xF5C2, 0x5299, 0xF7D1,
00264     0x529B, 0xA44F, 0x529F, 0xA55C, 0x52A0, 0xA55B, 0x52A3, 0xA648,
00265     0x52A6, 0xC9C0, 0x52A9, 0xA755, 0x52AA, 0xA756, 0x52AB, 0xA754,
00266     0x52AC, 0xA757, 0x52AD, 0xCA6F, 0x52AE, 0xCA70, 0x52BB, 0xA8F1,
00267     0x52BC, 0xCBD5, 0x52BE, 0xA8F0, 0x52C0, 0xCDF2, 0x52C1, 0xAB6C,
00268     0x52C2, 0xCDF3, 0x52C3, 0xAB6B, 0x52C7, 0xAB69, 0x52C9, 0xAB6A,
00269     0x52CD, 0xD0ED, 0x52D2, 0xB0C7, 0x52D3, 0xD46E, 0x52D5, 0xB0CA,
00270     0x52D6, 0xD46D, 0x52D7, 0xB1E5, 0x52D8, 0xB0C9, 0x52D9, 0xB0C8,
00271     0x52DB, 0xB3D4, 0x52DD, 0xB3D3, 0x52DE, 0xB3D2, 0x52DF, 0xB6D2,
00272     0x52E2, 0xB6D5, 0x52E3, 0xB6D6, 0x52E4, 0xB6D4, 0x52E6, 0xB6D3,
00273     0x52E9, 0xE143, 0x52EB, 0xE144, 0x52EF, 0xE4F5, 0x52F0, 0xBC45,
00274     0x52F1, 0xE4F4, 0x52F3, 0xBEB1, 0x52F4, 0xECBF, 0x52F5, 0xC079,
00275     0x52F7, 0xF1EE, 0x52F8, 0xC455, 0x52FA, 0xA463, 0x52FB, 0xA4C3,
00276     0x52FC, 0xC956, 0x52FE, 0xA4C4, 0x52FF, 0xA4C5, 0x5305, 0xA55D,
00277     0x5306, 0xA55E, 0x5308, 0xA649, 0x5309, 0xCA71, 0x530A, 0xCBD6,
00278     0x530B, 0xCBD7, 0x530D, 0xAB6D, 0x530E, 0xD0EE, 0x530F, 0xB0CC,
00279     0x5310, 0xB0CB, 0x5311, 0xD863, 0x5312, 0xD862, 0x5315, 0xA450,
00280     0x5316, 0xA4C6, 0x5317, 0xA55F, 0x5319, 0xB0CD, 0x531A, 0xC943,
00281     0x531C, 0xC96C, 0x531D, 0xA560, 0x531F, 0xC9C2, 0x5320, 0xA64B,
00282     0x5321, 0xA64A, 0x5322, 0xC9C1, 0x5323, 0xA758, 0x532A, 0xADEA,
00283     0x532D, 0xD46F, 0x532F, 0xB6D7, 0x5330, 0xE145, 0x5331, 0xB9BC,
00284     0x5334, 0xE8FA, 0x5337, 0xF3FD, 0x5339, 0xA4C7, 0x533C, 0xCBD8,
00285     0x533D, 0xCDF4, 0x533E, 0xB0D0, 0x533F, 0xB0CE, 0x5340, 0xB0CF,
00286     0x5341, 0xA2CC, 0x5341, 0xA451, 0x5343, 0xA464, 0x5344, 0xA2CD,
00287     0x5345, 0xA2CE, 0x5345, 0xA4CA, 0x5347, 0xA4C9, 0x5348, 0xA4C8,
00288     0x5349, 0xA563, 0x534A, 0xA562, 0x534C, 0xC96D, 0x534D, 0xC9C3,
00289     0x5351, 0xA8F5, 0x5352, 0xA8F2, 0x5353, 0xA8F4, 0x5354, 0xA8F3,
00290     0x5357, 0xAB6E, 0x535A, 0xB3D5, 0x535C, 0xA452, 0x535E, 0xA4CB,
00291     0x5360, 0xA565, 0x5361, 0xA564, 0x5363, 0xCA72, 0x5366, 0xA8F6,
00292     0x536C, 0xC957, 0x536E, 0xA567, 0x536F, 0xA566, 0x5370, 0xA64C,
00293     0x5371, 0xA64D, 0x5372, 0xCA73, 0x5373, 0xA759, 0x5375, 0xA75A,
00294     0x5377, 0xA8F7, 0x5378, 0xA8F8, 0x5379, 0xA8F9, 0x537B, 0xAB6F,
00295     0x537C, 0xCDF5, 0x537F, 0xADEB, 0x5382, 0xC944, 0x5384, 0xA4CC,
00296     0x538A, 0xC9C4, 0x538E, 0xCA74, 0x538F, 0xCA75, 0x5392, 0xCBD9,
00297     0x5394, 0xCBDA, 0x5396, 0xCDF7, 0x5397, 0xCDF6, 0x5398, 0xCDF9,
00298     0x5399, 0xCDF8, 0x539A, 0xAB70, 0x539C, 0xD470, 0x539D, 0xADED,
00299     0x539E, 0xD0EF, 0x539F, 0xADEC, 0x53A4, 0xD864, 0x53A5, 0xB3D6,
00300     0x53A7, 0xD865, 0x53AC, 0xE146, 0x53AD, 0xB9BD, 0x53B2, 0xBC46,
00301     0x53B4, 0xF1EF, 0x53B9, 0xC958, 0x53BB, 0xA568, 0x53C3, 0xB0D1,
00302     0x53C8, 0xA453, 0x53C9, 0xA465, 0x53CA, 0xA4CE, 0x53CB, 0xA4CD,
00303     0x53CD, 0xA4CF, 0x53D4, 0xA8FB, 0x53D6, 0xA8FA, 0x53D7, 0xA8FC,
00304     0x53DB, 0xAB71, 0x53DF, 0xADEE, 0x53E1, 0xE8FB, 0x53E2, 0xC24F,
00305     0x53E3, 0xA466, 0x53E4, 0xA56A, 0x53E5, 0xA579, 0x53E6, 0xA574,
00306     0x53E8, 0xA56F, 0x53E9, 0xA56E, 0x53EA, 0xA575, 0x53EB, 0xA573,
00307     0x53EC, 0xA56C, 0x53ED, 0xA57A, 0x53EE, 0xA56D, 0x53EF, 0xA569,
00308     0x53F0, 0xA578, 0x53F1, 0xA577, 0x53F2, 0xA576, 0x53F3, 0xA56B,
00309     0x53F5, 0xA572, 0x53F8, 0xA571, 0x53FB, 0xA57B, 0x53FC, 0xA570,
00310     0x5401, 0xA653, 0x5403, 0xA659, 0x5404, 0xA655, 0x5406, 0xA65B,
00311     0x5407, 0xC9C5, 0x5408, 0xA658, 0x5409, 0xA64E, 0x540A, 0xA651,
00312     0x540B, 0xA654, 0x540C, 0xA650, 0x540D, 0xA657, 0x540E, 0xA65A,
00313     0x540F, 0xA64F, 0x5410, 0xA652, 0x5411, 0xA656, 0x5412, 0xA65C,
00314     0x5418, 0xCA7E, 0x5419, 0xCA7B, 0x541B, 0xA767, 0x541C, 0xCA7C,
00315     0x541D, 0xA75B, 0x541E, 0xA75D, 0x541F, 0xA775, 0x5420, 0xA770,
00316     0x5424, 0xCAA5, 0x5425, 0xCA7D, 0x5426, 0xA75F, 0x5427, 0xA761,
00317     0x5428, 0xCAA4, 0x5429, 0xA768, 0x542A, 0xCA78, 0x542B, 0xA774,
00318     0x542C, 0xA776, 0x542D, 0xA75C, 0x542E, 0xA76D, 0x5430, 0xCA76,
00319     0x5431, 0xA773, 0x5433, 0xA764, 0x5435, 0xA76E, 0x5436, 0xA76F,
00320     0x5437, 0xCA77, 0x5438, 0xA76C, 0x5439, 0xA76A, 0x543B, 0xA76B,
00321     0x543C, 0xA771, 0x543D, 0xCAA1, 0x543E, 0xA75E, 0x5440, 0xA772,
00322     0x5441, 0xCAA3, 0x5442, 0xA766, 0x5443, 0xA763, 0x5445, 0xCA7A,
00323     0x5446, 0xA762, 0x5447, 0xCAA6, 0x5448, 0xA765, 0x544A, 0xA769,
00324     0x544E, 0xA760, 0x544F, 0xCAA2, 0x5454, 0xCA79, 0x5460, 0xCBEB,
00325     0x5461, 0xCBEA, 0x5462, 0xA94F, 0x5463, 0xCBED, 0x5464, 0xCBEF,
00326     0x5465, 0xCBE4, 0x5466, 0xCBE7, 0x5467, 0xCBEE, 0x5468, 0xA950,
00327     0x546B, 0xCBE1, 0x546C, 0xCBE5, 0x546F, 0xCBE9, 0x5470, 0xCE49,
00328     0x5471, 0xA94B, 0x5472, 0xCE4D, 0x5473, 0xA8FD, 0x5474, 0xCBE6,
00329     0x5475, 0xA8FE, 0x5476, 0xA94C, 0x5477, 0xA945, 0x5478, 0xA941,
00330     0x547A, 0xCBE2, 0x547B, 0xA944, 0x547C, 0xA949, 0x547D, 0xA952,
00331     0x547E, 0xCBE3, 0x547F, 0xCBDC, 0x5480, 0xA943, 0x5481, 0xCBDD,
00332     0x5482, 0xCBDF, 0x5484, 0xA946, 0x5486, 0xA948, 0x5487, 0xCBDB,
00333     0x5488, 0xCBE0, 0x548B, 0xA951, 0x548C, 0xA94D, 0x548D, 0xCBE8,
00334     0x548E, 0xA953, 0x5490, 0xA94A, 0x5491, 0xCBDE, 0x5492, 0xA947,
00335     0x5495, 0xA942, 0x5496, 0xA940, 0x5498, 0xCBEC, 0x549A, 0xA94E,
00336     0x54A0, 0xCE48, 0x54A1, 0xCDFB, 0x54A2, 0xCE4B, 0x54A5, 0xCDFD,
00337     0x54A6, 0xAB78, 0x54A7, 0xABA8, 0x54A8, 0xAB74, 0x54A9, 0xABA7,
00338     0x54AA, 0xAB7D, 0x54AB, 0xABA4, 0x54AC, 0xAB72, 0x54AD, 0xCDFC,
00339     0x54AE, 0xCE43, 0x54AF, 0xABA3, 0x54B0, 0xCE4F, 0x54B1, 0xABA5,
00340     0x54B3, 0xAB79, 0x54B6, 0xCE45, 0x54B7, 0xCE42, 0x54B8, 0xAB77,
00341     0x54BA, 0xCDFA, 0x54BB, 0xABA6, 0x54BC, 0xCE4A, 0x54BD, 0xAB7C,
00342     0x54BE, 0xCE4C, 0x54BF, 0xABA9, 0x54C0, 0xAB73, 0x54C1, 0xAB7E,
00343     0x54C2, 0xAB7B, 0x54C3, 0xCE40, 0x54C4, 0xABA1, 0x54C5, 0xCE46,
00344     0x54C6, 0xCE47, 0x54C7, 0xAB7A, 0x54C8, 0xABA2, 0x54C9, 0xAB76,
00345     0x54CE, 0xAB75, 0x54CF, 0xCDFE, 0x54D6, 0xCE44, 0x54DE, 0xCE4E,
00346     0x54E0, 0xD144, 0x54E1, 0xADFB, 0x54E2, 0xD0F1, 0x54E4, 0xD0F6,
00347     0x54E5, 0xADF4, 0x54E6, 0xAE40, 0x54E7, 0xD0F4, 0x54E8, 0xADEF,
00348     0x54E9, 0xADF9, 0x54EA, 0xADFE, 0x54EB, 0xD0FB, 0x54ED, 0xADFA,
00349     0x54EE, 0xADFD, 0x54F1, 0xD0FE, 0x54F2, 0xADF5, 0x54F3, 0xD0F5,
00350     0x54F7, 0xD142, 0x54F8, 0xD143, 0x54FA, 0xADF7, 0x54FB, 0xD141,
00351     0x54FC, 0xADF3, 0x54FD, 0xAE43, 0x54FF, 0xD0F8, 0x5501, 0xADF1,
00352     0x5503, 0xD146, 0x5504, 0xD0F9, 0x5505, 0xD0FD, 0x5506, 0xADF6,
00353     0x5507, 0xAE42, 0x5508, 0xD0FA, 0x5509, 0xADFC, 0x550A, 0xD140,
00354     0x550B, 0xD147, 0x550C, 0xD4A1, 0x550E, 0xD145, 0x550F, 0xAE44,
00355     0x5510, 0xADF0, 0x5511, 0xD0FC, 0x5512, 0xD0F3, 0x5514, 0xADF8,
00356     0x5517, 0xD0F2, 0x551A, 0xD0F7, 0x5526, 0xD0F0, 0x5527, 0xAE41,
00357     0x552A, 0xD477, 0x552C, 0xB0E4, 0x552D, 0xD4A7, 0x552E, 0xB0E2,
00358     0x552F, 0xB0DF, 0x5530, 0xD47C, 0x5531, 0xB0DB, 0x5532, 0xD4A2,
00359     0x5533, 0xB0E6, 0x5534, 0xD476, 0x5535, 0xD47B, 0x5536, 0xD47A,
00360     0x5537, 0xADF2, 0x5538, 0xB0E1, 0x5539, 0xD4A5, 0x553B, 0xD4A8,
00361     0x553C, 0xD473, 0x553E, 0xB3E8, 0x5540, 0xD4A9, 0x5541, 0xB0E7,
00362     0x5543, 0xB0D9, 0x5544, 0xB0D6, 0x5545, 0xD47E, 0x5546, 0xB0D3,
00363     0x5548, 0xD4A6, 0x554A, 0xB0DA, 0x554B, 0xD4AA, 0x554D, 0xD474,
00364     0x554E, 0xD4A4, 0x554F, 0xB0DD, 0x5550, 0xD475, 0x5551, 0xD478,
00365     0x5552, 0xD47D, 0x5555, 0xB0DE, 0x5556, 0xB0DC, 0x5557, 0xB0E8,
00366     0x555C, 0xB0E3, 0x555E, 0xB0D7, 0x555F, 0xB1D2, 0x5561, 0xB0D8,
00367     0x5562, 0xD479, 0x5563, 0xB0E5, 0x5564, 0xB0E0, 0x5565, 0xD4A3,
00368     0x5566, 0xB0D5, 0x556A, 0xB0D4, 0x5575, 0xD471, 0x5576, 0xD472,
00369     0x5577, 0xD86A, 0x557B, 0xB3D7, 0x557C, 0xB3DA, 0x557D, 0xD875,
00370     0x557E, 0xB3EE, 0x557F, 0xD878, 0x5580, 0xB3D8, 0x5581, 0xD871,
00371     0x5582, 0xB3DE, 0x5583, 0xB3E4, 0x5584, 0xB5BD, 0x5587, 0xB3E2,
00372     0x5588, 0xD86E, 0x5589, 0xB3EF, 0x558A, 0xB3DB, 0x558B, 0xB3E3,
00373     0x558C, 0xD876, 0x558D, 0xDCD7, 0x558E, 0xD87B, 0x558F, 0xD86F,
00374     0x5591, 0xD866, 0x5592, 0xD873, 0x5593, 0xD86D, 0x5594, 0xB3E1,
00375     0x5595, 0xD879, 0x5598, 0xB3DD, 0x5599, 0xB3F1, 0x559A, 0xB3EA,
00376     0x559C, 0xB3DF, 0x559D, 0xB3DC, 0x559F, 0xB3E7, 0x55A1, 0xD87A,
00377     0x55A2, 0xD86C, 0x55A3, 0xD872, 0x55A4, 0xD874, 0x55A5, 0xD868,
00378     0x55A6, 0xD877, 0x55A7, 0xB3D9, 0x55A8, 0xD867, 0x55AA, 0xB3E0,
00379     0x55AB, 0xB3F0, 0x55AC, 0xB3EC, 0x55AD, 0xD869, 0x55AE, 0xB3E6,
00380     0x55B1, 0xB3ED, 0x55B2, 0xB3E9, 0x55B3, 0xB3E5, 0x55B5, 0xD870,
00381     0x55BB, 0xB3EB, 0x55BF, 0xDCD5, 0x55C0, 0xDCD1, 0x55C2, 0xDCE0,
00382     0x55C3, 0xDCCA, 0x55C4, 0xDCD3, 0x55C5, 0xB6E5, 0x55C6, 0xB6E6,
00383     0x55C7, 0xB6DE, 0x55C8, 0xDCDC, 0x55C9, 0xB6E8, 0x55CA, 0xDCCF,
00384     0x55CB, 0xDCCE, 0x55CC, 0xDCCC, 0x55CD, 0xDCDE, 0x55CE, 0xB6DC,
00385     0x55CF, 0xDCD8, 0x55D0, 0xDCCD, 0x55D1, 0xB6DF, 0x55D2, 0xDCD6,
00386     0x55D3, 0xB6DA, 0x55D4, 0xDCD2, 0x55D5, 0xDCD9, 0x55D6, 0xDCDB,
00387     0x55D9, 0xDCDF, 0x55DA, 0xB6E3, 0x55DB, 0xDCCB, 0x55DC, 0xB6DD,
00388     0x55DD, 0xDCD0, 0x55DF, 0xB6D8, 0x55E1, 0xB6E4, 0x55E2, 0xDCDA,
00389     0x55E3, 0xB6E0, 0x55E4, 0xB6E1, 0x55E5, 0xB6E7, 0x55E6, 0xB6DB,
00390     0x55E7, 0xA25F, 0x55E8, 0xB6D9, 0x55E9, 0xDCD4, 0x55EF, 0xB6E2,
00391     0x55F2, 0xDCDD, 0x55F6, 0xB9CD, 0x55F7, 0xB9C8, 0x55F9, 0xE155,
00392     0x55FA, 0xE151, 0x55FC, 0xE14B, 0x55FD, 0xB9C2, 0x55FE, 0xB9BE,
00393     0x55FF, 0xE154, 0x5600, 0xB9BF, 0x5601, 0xE14E, 0x5602, 0xE150,
00394     0x5604, 0xE153, 0x5606, 0xB9C4, 0x5608, 0xB9CB, 0x5609, 0xB9C5,
00395     0x560C, 0xE149, 0x560D, 0xB9C6, 0x560E, 0xB9C7, 0x560F, 0xE14C,
00396     0x5610, 0xB9CC, 0x5612, 0xE14A, 0x5613, 0xE14F, 0x5614, 0xB9C3,
00397     0x5615, 0xE148, 0x5616, 0xB9C9, 0x5617, 0xB9C1, 0x561B, 0xB9C0,
00398     0x561C, 0xE14D, 0x561D, 0xE152, 0x561F, 0xB9CA, 0x5627, 0xE147,
00399     0x5629, 0xBC4D, 0x562A, 0xE547, 0x562C, 0xE544, 0x562E, 0xBC47,
00400     0x562F, 0xBC53, 0x5630, 0xBC54, 0x5632, 0xBC4A, 0x5633, 0xE542,
00401     0x5634, 0xBC4C, 0x5635, 0xE4F9, 0x5636, 0xBC52, 0x5638, 0xE546,
00402     0x5639, 0xBC49, 0x563A, 0xE548, 0x563B, 0xBC48, 0x563D, 0xE543,
00403     0x563E, 0xE545, 0x563F, 0xBC4B, 0x5640, 0xE541, 0x5641, 0xE4FA,
00404     0x5642, 0xE4F7, 0x5645, 0xD86B, 0x5646, 0xE4FD, 0x5648, 0xE4F6,
00405     0x5649, 0xE4FC, 0x564A, 0xE4FB, 0x564C, 0xE4F8, 0x564E, 0xBC4F,
00406     0x5653, 0xBC4E, 0x5657, 0xBC50, 0x5658, 0xE4FE, 0x5659, 0xBEB2,
00407     0x565A, 0xE540, 0x565E, 0xE945, 0x5660, 0xE8FD, 0x5662, 0xBEBE,
00408     0x5663, 0xE942, 0x5664, 0xBEB6, 0x5665, 0xBEBA, 0x5666, 0xE941,
00409     0x5668, 0xBEB9, 0x5669, 0xBEB5, 0x566A, 0xBEB8, 0x566B, 0xBEB3,
00410     0x566C, 0xBEBD, 0x566D, 0xE943, 0x566E, 0xE8FE, 0x566F, 0xBEBC,
00411     0x5670, 0xE8FC, 0x5671, 0xBEBB, 0x5672, 0xE944, 0x5673, 0xE940,
00412     0x5674, 0xBC51, 0x5676, 0xBEBF, 0x5677, 0xE946, 0x5678, 0xBEB7,
00413     0x5679, 0xBEB4, 0x567E, 0xECC6, 0x567F, 0xECC8, 0x5680, 0xC07B,
00414     0x5681, 0xECC9, 0x5682, 0xECC7, 0x5683, 0xECC5, 0x5684, 0xECC4,
00415     0x5685, 0xC07D, 0x5686, 0xECC3, 0x5687, 0xC07E, 0x568C, 0xECC1,
00416     0x568D, 0xECC2, 0x568E, 0xC07A, 0x568F, 0xC0A1, 0x5690, 0xC07C,
00417     0x5693, 0xECC0, 0x5695, 0xC250, 0x5697, 0xEFBC, 0x5698, 0xEFBA,
00418     0x5699, 0xEFBF, 0x569A, 0xEFBD, 0x569C, 0xEFBB, 0x569D, 0xEFBE,
00419     0x56A5, 0xC360, 0x56A6, 0xF1F2, 0x56A7, 0xF1F3, 0x56A8, 0xC456,
00420     0x56AA, 0xF1F4, 0x56AB, 0xF1F0, 0x56AC, 0xF1F5, 0x56AD, 0xF1F1,
00421     0x56AE, 0xC251, 0x56B2, 0xF3FE, 0x56B3, 0xF441, 0x56B4, 0xC459,
00422     0x56B5, 0xF440, 0x56B6, 0xC458, 0x56B7, 0xC457, 0x56BC, 0xC45A,
00423     0x56BD, 0xF5C5, 0x56BE, 0xF5C6, 0x56C0, 0xC4DA, 0x56C1, 0xC4D9,
00424     0x56C2, 0xC4DB, 0x56C3, 0xF5C4, 0x56C5, 0xF6D8, 0x56C6, 0xF6D7,
00425     0x56C8, 0xC56D, 0x56C9, 0xC56F, 0x56CA, 0xC56E, 0x56CB, 0xF6D9,
00426     0x56CC, 0xC5C8, 0x56CD, 0xF8A6, 0x56D1, 0xC5F1, 0x56D3, 0xF8A5,
00427     0x56D4, 0xF8EE, 0x56D7, 0xC949, 0x56DA, 0xA57D, 0x56DB, 0xA57C,
00428     0x56DD, 0xA65F, 0x56DE, 0xA65E, 0x56DF, 0xC9C7, 0x56E0, 0xA65D,
00429     0x56E1, 0xC9C6, 0x56E4, 0xA779, 0x56E5, 0xCAA9, 0x56E7, 0xCAA8,
00430     0x56EA, 0xA777, 0x56EB, 0xA77A, 0x56EE, 0xCAA7, 0x56F0, 0xA778,
00431     0x56F7, 0xCBF0, 0x56F9, 0xCBF1, 0x56FA, 0xA954, 0x56FF, 0xABAA,
00432     0x5701, 0xD148, 0x5702, 0xD149, 0x5703, 0xAE45, 0x5704, 0xAE46,
00433     0x5707, 0xD4AC, 0x5708, 0xB0E9, 0x5709, 0xB0EB, 0x570A, 0xD4AB,
00434     0x570B, 0xB0EA, 0x570C, 0xD87C, 0x570D, 0xB3F2, 0x5712, 0xB6E9,
00435     0x5713, 0xB6EA, 0x5714, 0xDCE1, 0x5716, 0xB9CF, 0x5718, 0xB9CE,
00436     0x571A, 0xE549, 0x571B, 0xE948, 0x571C, 0xE947, 0x571E, 0xF96B,
00437     0x571F, 0xA467, 0x5720, 0xC959, 0x5722, 0xC96E, 0x5723, 0xC96F,
00438     0x5728, 0xA662, 0x5729, 0xA666, 0x572A, 0xC9C9, 0x572C, 0xA664,
00439     0x572D, 0xA663, 0x572E, 0xC9C8, 0x572F, 0xA665, 0x5730, 0xA661,
00440     0x5733, 0xA660, 0x5734, 0xC9CA, 0x573B, 0xA7A6, 0x573E, 0xA7A3,
00441     0x5740, 0xA77D, 0x5741, 0xCAAA, 0x5745, 0xCAAB, 0x5747, 0xA7A1,
00442     0x5749, 0xCAAD, 0x574A, 0xA77B, 0x574B, 0xCAAE, 0x574C, 0xCAAC,
00443     0x574D, 0xA77E, 0x574E, 0xA7A2, 0x574F, 0xA7A5, 0x5750, 0xA7A4,
00444     0x5751, 0xA77C, 0x5752, 0xCAAF, 0x5761, 0xA959, 0x5762, 0xCBFE,
00445     0x5764, 0xA95B, 0x5766, 0xA95A, 0x5768, 0xCC40, 0x5769, 0xA958,
00446     0x576A, 0xA957, 0x576B, 0xCBF5, 0x576D, 0xCBF4, 0x576F, 0xCBF2,
00447     0x5770, 0xCBF7, 0x5771, 0xCBF6, 0x5772, 0xCBF3, 0x5773, 0xCBFC,
00448     0x5774, 0xCBFD, 0x5775, 0xCBFA, 0x5776, 0xCBF8, 0x5777, 0xA956,
00449     0x577B, 0xCBFB, 0x577C, 0xA95C, 0x577D, 0xCC41, 0x5780, 0xCBF9,
00450     0x5782, 0xABAB, 0x5783, 0xA955, 0x578B, 0xABAC, 0x578C, 0xCE54,
00451     0x578F, 0xCE5A, 0x5793, 0xABB2, 0x5794, 0xCE58, 0x5795, 0xCE5E,
00452     0x5797, 0xCE55, 0x5798, 0xCE59, 0x5799, 0xCE5B, 0x579A, 0xCE5D,
00453     0x579B, 0xCE57, 0x579D, 0xCE56, 0x579E, 0xCE51, 0x579F, 0xCE52,
00454     0x57A0, 0xABAD, 0x57A2, 0xABAF, 0x57A3, 0xABAE, 0x57A4, 0xCE53,
00455     0x57A5, 0xCE5C, 0x57AE, 0xABB1, 0x57B5, 0xCE50, 0x57B6, 0xD153,
00456     0x57B8, 0xD152, 0x57B9, 0xD157, 0x57BA, 0xD14E, 0x57BC, 0xD151,
00457     0x57BD, 0xD150, 0x57BF, 0xD154, 0x57C1, 0xD158, 0x57C2, 0xAE47,
00458     0x57C3, 0xAE4A, 0x57C6, 0xD14F, 0x57C7, 0xD155, 0x57CB, 0xAE49,
00459     0x57CC, 0xD14A, 0x57CE, 0xABB0, 0x57CF, 0xD4BA, 0x57D0, 0xD156,
00460     0x57D2, 0xD14D, 0x57D4, 0xAE48, 0x57D5, 0xD14C, 0x57DC, 0xD4B1,
00461     0x57DF, 0xB0EC, 0x57E0, 0xB0F0, 0x57E1, 0xD4C1, 0x57E2, 0xD4AF,
00462     0x57E3, 0xD4BD, 0x57E4, 0xB0F1, 0x57E5, 0xD4BF, 0x57E7, 0xD4C5,
00463     0x57E9, 0xD4C9, 0x57EC, 0xD4C0, 0x57ED, 0xD4B4, 0x57EE, 0xD4BC,
00464     0x57F0, 0xD4CA, 0x57F1, 0xD4C8, 0x57F2, 0xD4BE, 0x57F3, 0xD4B9,
00465     0x57F4, 0xD4B2, 0x57F5, 0xD8A6, 0x57F6, 0xD4B0, 0x57F7, 0xB0F5,
00466     0x57F8, 0xD4B7, 0x57F9, 0xB0F6, 0x57FA, 0xB0F2, 0x57FB, 0xD4AD,
00467     0x57FC, 0xD4C3, 0x57FD, 0xD4B5, 0x5800, 0xD4B3, 0x5801, 0xD4C6,
00468     0x5802, 0xB0F3, 0x5804, 0xD4CC, 0x5805, 0xB0ED, 0x5806, 0xB0EF,
00469     0x5807, 0xD4BB, 0x5808, 0xD4B6, 0x5809, 0xAE4B, 0x580A, 0xB0EE,
00470     0x580B, 0xD4B8, 0x580C, 0xD4C7, 0x580D, 0xD4CB, 0x580E, 0xD4C2,
00471     0x5810, 0xD4C4, 0x5814, 0xD4AE, 0x5819, 0xD8A1, 0x581B, 0xD8AA,
00472     0x581C, 0xD8A9, 0x581D, 0xB3FA, 0x581E, 0xD8A2, 0x5820, 0xB3FB,
00473     0x5821, 0xB3F9, 0x5823, 0xD8A4, 0x5824, 0xB3F6, 0x5825, 0xD8A8,
00474     0x5827, 0xD8A3, 0x5828, 0xD8A5, 0x5829, 0xD87D, 0x582A, 0xB3F4,
00475     0x582C, 0xD8B2, 0x582D, 0xD8B1, 0x582E, 0xD8AE, 0x582F, 0xB3F3,
00476     0x5830, 0xB3F7, 0x5831, 0xB3F8, 0x5832, 0xD14B, 0x5833, 0xD8AB,
00477     0x5834, 0xB3F5, 0x5835, 0xB0F4, 0x5836, 0xD8AD, 0x5837, 0xD87E,
00478     0x5838, 0xD8B0, 0x5839, 0xD8AF, 0x583B, 0xD8B3, 0x583D, 0xDCEF,
00479     0x583F, 0xD8AC, 0x5848, 0xD8A7, 0x5849, 0xDCE7, 0x584A, 0xB6F4,
00480     0x584B, 0xB6F7, 0x584C, 0xB6F2, 0x584D, 0xDCE6, 0x584E, 0xDCEA,
00481     0x584F, 0xDCE5, 0x5851, 0xB6EC, 0x5852, 0xB6F6, 0x5853, 0xDCE2,
00482     0x5854, 0xB6F0, 0x5855, 0xDCE9, 0x5857, 0xB6EE, 0x5858, 0xB6ED,
00483     0x5859, 0xDCEC, 0x585A, 0xB6EF, 0x585B, 0xDCEE, 0x585D, 0xDCEB,
00484     0x585E, 0xB6EB, 0x5862, 0xB6F5, 0x5863, 0xDCF0, 0x5864, 0xDCE4,
00485     0x5865, 0xDCED, 0x5868, 0xDCE3, 0x586B, 0xB6F1, 0x586D, 0xB6F3,
00486     0x586F, 0xDCE8, 0x5871, 0xDCF1, 0x5874, 0xE15D, 0x5875, 0xB9D0,
00487     0x5876, 0xE163, 0x5879, 0xB9D5, 0x587A, 0xE15F, 0x587B, 0xE166,
00488     0x587C, 0xE157, 0x587D, 0xB9D7, 0x587E, 0xB9D1, 0x587F, 0xE15C,
00489     0x5880, 0xBC55, 0x5881, 0xE15B, 0x5882, 0xE164, 0x5883, 0xB9D2,
00490     0x5885, 0xB9D6, 0x5886, 0xE15A, 0x5887, 0xE160, 0x5888, 0xE165,
00491     0x5889, 0xE156, 0x588A, 0xB9D4, 0x588B, 0xE15E, 0x588E, 0xE162,
00492     0x588F, 0xE168, 0x5890, 0xE158, 0x5891, 0xE161, 0x5893, 0xB9D3,
00493     0x5894, 0xE167, 0x5898, 0xE159, 0x589C, 0xBC59, 0x589D, 0xE54B,
00494     0x589E, 0xBC57, 0x589F, 0xBC56, 0x58A0, 0xE54D, 0x58A1, 0xE552,
00495     0x58A3, 0xE54E, 0x58A5, 0xE551, 0x58A6, 0xBC5C, 0x58A8, 0xBEA5,
00496     0x58A9, 0xBC5B, 0x58AB, 0xE54A, 0x58AC, 0xE550, 0x58AE, 0xBC5A,
00497     0x58AF, 0xE54F, 0x58B1, 0xE54C, 0x58B3, 0xBC58, 0x58BA, 0xE94D,
00498     0x58BB, 0xF9D9, 0x58BC, 0xE94F, 0x58BD, 0xE94A, 0x58BE, 0xBEC1,
00499     0x58BF, 0xE94C, 0x58C1, 0xBEC0, 0x58C2, 0xE94E, 0x58C5, 0xBEC3,
00500     0x58C6, 0xE950, 0x58C7, 0xBEC2, 0x58C8, 0xE949, 0x58C9, 0xE94B,
00501     0x58CE, 0xC0A5, 0x58CF, 0xECCC, 0x58D1, 0xC0A4, 0x58D2, 0xECCD,
00502     0x58D3, 0xC0A3, 0x58D4, 0xECCB, 0x58D5, 0xC0A2, 0x58D6, 0xECCA,
00503     0x58D8, 0xC253, 0x58D9, 0xC252, 0x58DA, 0xF1F6, 0x58DB, 0xF1F8,
00504     0x58DD, 0xF1F7, 0x58DE, 0xC361, 0x58DF, 0xC362, 0x58E2, 0xC363,
00505     0x58E3, 0xF442, 0x58E4, 0xC45B, 0x58E7, 0xF7D3, 0x58E8, 0xF7D2,
00506     0x58E9, 0xC5F2, 0x58EB, 0xA468, 0x58EC, 0xA4D0, 0x58EF, 0xA7A7,
00507     0x58F4, 0xCE5F, 0x58F9, 0xB3FC, 0x58FA, 0xB3FD, 0x58FC, 0xDCF2,
00508     0x58FD, 0xB9D8, 0x58FE, 0xE169, 0x58FF, 0xE553, 0x5903, 0xC95A,
00509     0x5906, 0xCAB0, 0x590C, 0xCC42, 0x590D, 0xCE60, 0x590E, 0xD159,
00510     0x590F, 0xAE4C, 0x5912, 0xF1F9, 0x5914, 0xC4DC, 0x5915, 0xA469,
00511     0x5916, 0xA57E, 0x5917, 0xC970, 0x5919, 0xA667, 0x591A, 0xA668,
00512     0x591C, 0xA95D, 0x5920, 0xB0F7, 0x5922, 0xB9DA, 0x5924, 0xB9DB,
00513     0x5925, 0xB9D9, 0x5927, 0xA46A, 0x5929, 0xA4D1, 0x592A, 0xA4D3,
00514     0x592B, 0xA4D2, 0x592C, 0xC95B, 0x592D, 0xA4D4, 0x592E, 0xA5A1,
00515     0x592F, 0xC971, 0x5931, 0xA5A2, 0x5937, 0xA669, 0x5938, 0xA66A,
00516     0x593C, 0xC9CB, 0x593E, 0xA7A8, 0x5940, 0xCAB1, 0x5944, 0xA961,
00517     0x5945, 0xCC43, 0x5947, 0xA95F, 0x5948, 0xA960, 0x5949, 0xA95E,
00518     0x594A, 0xD15A, 0x594E, 0xABB6, 0x594F, 0xABB5, 0x5950, 0xABB7,
00519     0x5951, 0xABB4, 0x5953, 0xCE61, 0x5954, 0xA962, 0x5955, 0xABB3,
00520     0x5957, 0xAE4D, 0x5958, 0xAE4E, 0x595A, 0xAE4F, 0x595C, 0xD4CD,
00521     0x5960, 0xB3FE, 0x5961, 0xD8B4, 0x5962, 0xB0F8, 0x5967, 0xB6F8,
00522     0x5969, 0xB9DD, 0x596A, 0xB9DC, 0x596B, 0xE16A, 0x596D, 0xBC5D,
00523     0x596E, 0xBEC4, 0x5970, 0xEFC0, 0x5971, 0xF6DA, 0x5972, 0xF7D4,
00524     0x5973, 0xA46B, 0x5974, 0xA5A3, 0x5976, 0xA5A4, 0x5977, 0xC9D1,
00525     0x5978, 0xA66C, 0x5979, 0xA66F, 0x597B, 0xC9CF, 0x597C, 0xC9CD,
00526     0x597D, 0xA66E, 0x597E, 0xC9D0, 0x597F, 0xC9D2, 0x5980, 0xC9CC,
00527     0x5981, 0xA671, 0x5982, 0xA670, 0x5983, 0xA66D, 0x5984, 0xA66B,
00528     0x5985, 0xC9CE, 0x598A, 0xA7B3, 0x598D, 0xA7B0, 0x598E, 0xCAB6,
00529     0x598F, 0xCAB9, 0x5990, 0xCAB8, 0x5992, 0xA7AA, 0x5993, 0xA7B2,
00530     0x5996, 0xA7AF, 0x5997, 0xCAB5, 0x5998, 0xCAB3, 0x5999, 0xA7AE,
00531     0x599D, 0xA7A9, 0x599E, 0xA7AC, 0x59A0, 0xCAB4, 0x59A1, 0xCABB,
00532     0x59A2, 0xCAB7, 0x59A3, 0xA7AD, 0x59A4, 0xA7B1, 0x59A5, 0xA7B4,
00533     0x59A6, 0xCAB2, 0x59A7, 0xCABA, 0x59A8, 0xA7AB, 0x59AE, 0xA967,
00534     0x59AF, 0xA96F, 0x59B1, 0xCC4F, 0x59B2, 0xCC48, 0x59B3, 0xA970,
00535     0x59B4, 0xCC53, 0x59B5, 0xCC44, 0x59B6, 0xCC4B, 0x59B9, 0xA966,
00536     0x59BA, 0xCC45, 0x59BB, 0xA964, 0x59BC, 0xCC4C, 0x59BD, 0xCC50,
00537     0x59BE, 0xA963, 0x59C0, 0xCC51, 0x59C1, 0xCC4A, 0x59C3, 0xCC4D,
00538     0x59C5, 0xA972, 0x59C6, 0xA969, 0x59C7, 0xCC54, 0x59C8, 0xCC52,
00539     0x59CA, 0xA96E, 0x59CB, 0xA96C, 0x59CC, 0xCC49, 0x59CD, 0xA96B,
00540     0x59CE, 0xCC47, 0x59CF, 0xCC46, 0x59D0, 0xA96A, 0x59D1, 0xA968,
00541     0x59D2, 0xA971, 0x59D3, 0xA96D, 0x59D4, 0xA965, 0x59D6, 0xCC4E,
00542     0x59D8, 0xABB9, 0x59DA, 0xABC0, 0x59DB, 0xCE6F, 0x59DC, 0xABB8,
00543     0x59DD, 0xCE67, 0x59DE, 0xCE63, 0x59E0, 0xCE73, 0x59E1, 0xCE62,
00544     0x59E3, 0xABBB, 0x59E4, 0xCE6C, 0x59E5, 0xABBE, 0x59E6, 0xABC1,
00545     0x59E8, 0xABBC, 0x59E9, 0xCE70, 0x59EA, 0xABBF, 0x59EC, 0xAE56,
00546     0x59ED, 0xCE76, 0x59EE, 0xCE64, 0x59F1, 0xCE66, 0x59F2, 0xCE6D,
00547     0x59F3, 0xCE71, 0x59F4, 0xCE75, 0x59F5, 0xCE72, 0x59F6, 0xCE6B,
00548     0x59F7, 0xCE6E, 0x59FA, 0xCE68, 0x59FB, 0xABC3, 0x59FC, 0xCE6A,
00549     0x59FD, 0xCE69, 0x59FE, 0xCE74, 0x59FF, 0xABBA, 0x5A00, 0xCE65,
00550     0x5A01, 0xABC2, 0x5A03, 0xABBD, 0x5A09, 0xAE5C, 0x5A0A, 0xD162,
00551     0x5A0C, 0xAE5B, 0x5A0F, 0xD160, 0x5A11, 0xAE50, 0x5A13, 0xAE55,
00552     0x5A15, 0xD15F, 0x5A16, 0xD15C, 0x5A17, 0xD161, 0x5A18, 0xAE51,
00553     0x5A19, 0xD15B, 0x5A1B, 0xAE54, 0x5A1C, 0xAE52, 0x5A1E, 0xD163,
00554     0x5A1F, 0xAE53, 0x5A20, 0xAE57, 0x5A23, 0xAE58, 0x5A25, 0xAE5A,
00555     0x5A29, 0xAE59, 0x5A2D, 0xD15D, 0x5A2E, 0xD15E, 0x5A33, 0xD164,
00556     0x5A35, 0xD4D4, 0x5A36, 0xB0F9, 0x5A37, 0xD8C2, 0x5A38, 0xD4D3,
00557     0x5A39, 0xD4E6, 0x5A3C, 0xB140, 0x5A3E, 0xD4E4, 0x5A40, 0xB0FE,
00558     0x5A41, 0xB0FA, 0x5A42, 0xD4ED, 0x5A43, 0xD4DD, 0x5A44, 0xD4E0,
00559     0x5A46, 0xB143, 0x5A47, 0xD4EA, 0x5A48, 0xD4E2, 0x5A49, 0xB0FB,
00560     0x5A4A, 0xB144, 0x5A4C, 0xD4E7, 0x5A4D, 0xD4E5, 0x5A50, 0xD4D6,
00561     0x5A51, 0xD4EB, 0x5A52, 0xD4DF, 0x5A53, 0xD4DA, 0x5A55, 0xD4D0,
00562     0x5A56, 0xD4EC, 0x5A57, 0xD4DC, 0x5A58, 0xD4CF, 0x5A5A, 0xB142,
00563     0x5A5B, 0xD4E1, 0x5A5C, 0xD4EE, 0x5A5D, 0xD4DE, 0x5A5E, 0xD4D2,
00564     0x5A5F, 0xD4D7, 0x5A60, 0xD4CE, 0x5A62, 0xB141, 0x5A64, 0xD4DB,
00565     0x5A65, 0xD4D8, 0x5A66, 0xB0FC, 0x5A67, 0xD4D1, 0x5A69, 0xD4E9,
00566     0x5A6A, 0xB0FD, 0x5A6C, 0xD4D9, 0x5A6D, 0xD4D5, 0x5A70, 0xD4E8,
00567     0x5A77, 0xB440, 0x5A78, 0xD8BB, 0x5A7A, 0xD8B8, 0x5A7B, 0xD8C9,
00568     0x5A7C, 0xD8BD, 0x5A7D, 0xD8CA, 0x5A7F, 0xB442, 0x5A83, 0xD8C6,
00569     0x5A84, 0xD8C3, 0x5A8A, 0xD8C4, 0x5A8B, 0xD8C7, 0x5A8C, 0xD8CB,
00570     0x5A8E, 0xD4E3, 0x5A8F, 0xD8CD, 0x5A90, 0xDD47, 0x5A92, 0xB443,
00571     0x5A93, 0xD8CE, 0x5A94, 0xD8B6, 0x5A95, 0xD8C0, 0x5A97, 0xD8C5,
00572     0x5A9A, 0xB441, 0x5A9B, 0xB444, 0x5A9C, 0xD8CC, 0x5A9D, 0xD8CF,
00573     0x5A9E, 0xD8BA, 0x5A9F, 0xD8B7, 0x5AA2, 0xD8B9, 0x5AA5, 0xD8BE,
00574     0x5AA6, 0xD8BC, 0x5AA7, 0xB445, 0x5AA9, 0xD8C8, 0x5AAC, 0xD8BF,
00575     0x5AAE, 0xD8C1, 0x5AAF, 0xD8B5, 0x5AB0, 0xDCFA, 0x5AB1, 0xDCF8,
00576     0x5AB2, 0xB742, 0x5AB3, 0xB740, 0x5AB4, 0xDD43, 0x5AB5, 0xDCF9,
00577     0x5AB6, 0xDD44, 0x5AB7, 0xDD40, 0x5AB8, 0xDCF7, 0x5AB9, 0xDD46,
00578     0x5ABA, 0xDCF6, 0x5ABB, 0xDCFD, 0x5ABC, 0xB6FE, 0x5ABD, 0xB6FD,
00579     0x5ABE, 0xB6FC, 0x5ABF, 0xDCFB, 0x5AC0, 0xDD41, 0x5AC1, 0xB6F9,
00580     0x5AC2, 0xB741, 0x5AC4, 0xDCF4, 0x5AC6, 0xDCFE, 0x5AC7, 0xDCF3,
00581     0x5AC8, 0xDCFC, 0x5AC9, 0xB6FA, 0x5ACA, 0xDD42, 0x5ACB, 0xDCF5,
00582     0x5ACC, 0xB6FB, 0x5ACD, 0xDD45, 0x5AD5, 0xE16E, 0x5AD6, 0xB9E2,
00583     0x5AD7, 0xB9E1, 0x5AD8, 0xB9E3, 0x5AD9, 0xE17A, 0x5ADA, 0xE170,
00584     0x5ADB, 0xE176, 0x5ADC, 0xE16B, 0x5ADD, 0xE179, 0x5ADE, 0xE178,
00585     0x5ADF, 0xE17C, 0x5AE0, 0xE175, 0x5AE1, 0xB9DE, 0x5AE2, 0xE174,
00586     0x5AE3, 0xB9E4, 0x5AE5, 0xE16D, 0x5AE6, 0xB9DF, 0x5AE8, 0xE17B,
00587     0x5AE9, 0xB9E0, 0x5AEA, 0xE16F, 0x5AEB, 0xE172, 0x5AEC, 0xE177,
00588     0x5AED, 0xE171, 0x5AEE, 0xE16C, 0x5AF3, 0xE173, 0x5AF4, 0xE555,
00589     0x5AF5, 0xBC61, 0x5AF6, 0xE558, 0x5AF7, 0xE557, 0x5AF8, 0xE55A,
00590     0x5AF9, 0xE55C, 0x5AFA, 0xF9DC, 0x5AFB, 0xBC5F, 0x5AFD, 0xE556,
00591     0x5AFF, 0xE554, 0x5B01, 0xE55D, 0x5B02, 0xE55B, 0x5B03, 0xE559,
00592     0x5B05, 0xE55F, 0x5B07, 0xE55E, 0x5B08, 0xBC63, 0x5B09, 0xBC5E,
00593     0x5B0B, 0xBC60, 0x5B0C, 0xBC62, 0x5B0F, 0xE560, 0x5B10, 0xE957,
00594     0x5B13, 0xE956, 0x5B14, 0xE955, 0x5B16, 0xE958, 0x5B17, 0xE951,
00595     0x5B19, 0xE952, 0x5B1A, 0xE95A, 0x5B1B, 0xE953, 0x5B1D, 0xBEC5,
00596     0x5B1E, 0xE95C, 0x5B20, 0xE95B, 0x5B21, 0xE954, 0x5B23, 0xECD1,
00597     0x5B24, 0xC0A8, 0x5B25, 0xECCF, 0x5B26, 0xECD4, 0x5B27, 0xECD3,
00598     0x5B28, 0xE959, 0x5B2A, 0xC0A7, 0x5B2C, 0xECD2, 0x5B2D, 0xECCE,
00599     0x5B2E, 0xECD6, 0x5B2F, 0xECD5, 0x5B30, 0xC0A6, 0x5B32, 0xECD0,
00600     0x5B34, 0xBEC6, 0x5B38, 0xC254, 0x5B3C, 0xEFC1, 0x5B3D, 0xF1FA,
00601     0x5B3E, 0xF1FB, 0x5B3F, 0xF1FC, 0x5B40, 0xC45C, 0x5B43, 0xC45D,
00602     0x5B45, 0xF443, 0x5B47, 0xF5C8, 0x5B48, 0xF5C7, 0x5B4B, 0xF6DB,
00603     0x5B4C, 0xF6DC, 0x5B4D, 0xF7D5, 0x5B4E, 0xF8A7, 0x5B50, 0xA46C,
00604     0x5B51, 0xA46D, 0x5B53, 0xA46E, 0x5B54, 0xA4D5, 0x5B55, 0xA5A5,
00605     0x5B56, 0xC9D3, 0x5B57, 0xA672, 0x5B58, 0xA673, 0x5B5A, 0xA7B7,
00606     0x5B5B, 0xA7B8, 0x5B5C, 0xA7B6, 0x5B5D, 0xA7B5, 0x5B5F, 0xA973,
00607     0x5B62, 0xCC55, 0x5B63, 0xA975, 0x5B64, 0xA974, 0x5B65, 0xCC56,
00608     0x5B69, 0xABC4, 0x5B6B, 0xAE5D, 0x5B6C, 0xD165, 0x5B6E, 0xD4F0,
00609     0x5B70, 0xB145, 0x5B71, 0xB447, 0x5B72, 0xD4EF, 0x5B73, 0xB446,
00610     0x5B75, 0xB9E5, 0x5B77, 0xE17D, 0x5B78, 0xBEC7, 0x5B7A, 0xC0A9,
00611     0x5B7B, 0xECD7, 0x5B7D, 0xC45E, 0x5B7F, 0xC570, 0x5B81, 0xC972,
00612     0x5B83, 0xA5A6, 0x5B84, 0xC973, 0x5B85, 0xA676, 0x5B87, 0xA674,
00613     0x5B88, 0xA675, 0x5B89, 0xA677, 0x5B8B, 0xA7BA, 0x5B8C, 0xA7B9,
00614     0x5B8E, 0xCABC, 0x5B8F, 0xA7BB, 0x5B92, 0xCABD, 0x5B93, 0xCC57,
00615     0x5B95, 0xCC58, 0x5B97, 0xA976, 0x5B98, 0xA978, 0x5B99, 0xA97A,
00616     0x5B9A, 0xA977, 0x5B9B, 0xA97B, 0x5B9C, 0xA979, 0x5BA2, 0xABC8,
00617     0x5BA3, 0xABC5, 0x5BA4, 0xABC7, 0x5BA5, 0xABC9, 0x5BA6, 0xABC6,
00618     0x5BA7, 0xD166, 0x5BA8, 0xCE77, 0x5BAC, 0xD168, 0x5BAD, 0xD167,
00619     0x5BAE, 0xAE63, 0x5BB0, 0xAE5F, 0x5BB3, 0xAE60, 0x5BB4, 0xAE62,
00620     0x5BB5, 0xAE64, 0x5BB6, 0xAE61, 0x5BB8, 0xAE66, 0x5BB9, 0xAE65,
00621     0x5BBF, 0xB14A, 0x5BC0, 0xD4F2, 0x5BC1, 0xD4F1, 0x5BC2, 0xB149,
00622     0x5BC4, 0xB148, 0x5BC5, 0xB147, 0x5BC6, 0xB14B, 0x5BC7, 0xB146,
00623     0x5BCA, 0xD8D5, 0x5BCB, 0xD8D2, 0x5BCC, 0xB449, 0x5BCD, 0xD8D1,
00624     0x5BCE, 0xD8D6, 0x5BD0, 0xB44B, 0x5BD1, 0xD8D4, 0x5BD2, 0xB448,
00625     0x5BD3, 0xB44A, 0x5BD4, 0xD8D3, 0x5BD6, 0xDD48, 0x5BD8, 0xDD49,
00626     0x5BD9, 0xDD4A, 0x5BDE, 0xB9E6, 0x5BDF, 0xB9EE, 0x5BE0, 0xE17E,
00627     0x5BE1, 0xB9E8, 0x5BE2, 0xB9EC, 0x5BE3, 0xE1A1, 0x5BE4, 0xB9ED,
00628     0x5BE5, 0xB9E9, 0x5BE6, 0xB9EA, 0x5BE7, 0xB9E7, 0x5BE8, 0xB9EB,
00629     0x5BE9, 0xBC66, 0x5BEA, 0xD8D0, 0x5BEB, 0xBC67, 0x5BEC, 0xBC65,
00630     0x5BEE, 0xBC64, 0x5BEF, 0xE95D, 0x5BF0, 0xBEC8, 0x5BF1, 0xECD8,
00631     0x5BF2, 0xECD9, 0x5BF5, 0xC364, 0x5BF6, 0xC45F, 0x5BF8, 0xA46F,
00632     0x5BFA, 0xA678, 0x5C01, 0xABCA, 0x5C03, 0xD169, 0x5C04, 0xAE67,
00633     0x5C07, 0xB14E, 0x5C08, 0xB14D, 0x5C09, 0xB14C, 0x5C0A, 0xB44C,
00634     0x5C0B, 0xB44D, 0x5C0C, 0xD8D7, 0x5C0D, 0xB9EF, 0x5C0E, 0xBEC9,
00635     0x5C0F, 0xA470, 0x5C10, 0xC95C, 0x5C11, 0xA4D6, 0x5C12, 0xC974,
00636     0x5C15, 0xC9D4, 0x5C16, 0xA679, 0x5C1A, 0xA97C, 0x5C1F, 0xDD4B,
00637     0x5C22, 0xA471, 0x5C24, 0xA4D7, 0x5C25, 0xC9D5, 0x5C28, 0xCABE,
00638     0x5C2A, 0xCABF, 0x5C2C, 0xA7BC, 0x5C30, 0xD8D8, 0x5C31, 0xB44E,
00639     0x5C33, 0xDD4C, 0x5C37, 0xC0AA, 0x5C38, 0xA472, 0x5C39, 0xA4A8,
00640     0x5C3A, 0xA4D8, 0x5C3B, 0xC975, 0x5C3C, 0xA5A7, 0x5C3E, 0xA7C0,
00641     0x5C3F, 0xA7BF, 0x5C40, 0xA7BD, 0x5C41, 0xA7BE, 0x5C44, 0xCC59,
00642     0x5C45, 0xA97E, 0x5C46, 0xA9A1, 0x5C47, 0xCC5A, 0x5C48, 0xA97D,
00643     0x5C4B, 0xABCE, 0x5C4C, 0xCE78, 0x5C4D, 0xABCD, 0x5C4E, 0xABCB,
00644     0x5C4F, 0xABCC, 0x5C50, 0xAE6A, 0x5C51, 0xAE68, 0x5C54, 0xD16B,
00645     0x5C55, 0xAE69, 0x5C56, 0xD16A, 0x5C58, 0xAE5E, 0x5C59, 0xD4F3,
00646     0x5C5C, 0xB150, 0x5C5D, 0xB151, 0x5C60, 0xB14F, 0x5C62, 0xB9F0,
00647     0x5C63, 0xE1A2, 0x5C64, 0xBC68, 0x5C65, 0xBC69, 0x5C67, 0xE561,
00648     0x5C68, 0xC0AB, 0x5C69, 0xEFC2, 0x5C6A, 0xEFC3, 0x5C6C, 0xC4DD,
00649     0x5C6D, 0xF8A8, 0x5C6E, 0xC94B, 0x5C6F, 0xA4D9, 0x5C71, 0xA473,
00650     0x5C73, 0xC977, 0x5C74, 0xC976, 0x5C79, 0xA67A, 0x5C7A, 0xC9D7,
00651     0x5C7B, 0xC9D8, 0x5C7C, 0xC9D6, 0x5C7E, 0xC9D9, 0x5C86, 0xCAC7,
00652     0x5C88, 0xCAC2, 0x5C89, 0xCAC4, 0x5C8A, 0xCAC6, 0x5C8B, 0xCAC3,
00653     0x5C8C, 0xA7C4, 0x5C8D, 0xCAC0, 0x5C8F, 0xCAC1, 0x5C90, 0xA7C1,
00654     0x5C91, 0xA7C2, 0x5C92, 0xCAC5, 0x5C93, 0xCAC8, 0x5C94, 0xA7C3,
00655     0x5C95, 0xCAC9, 0x5C9D, 0xCC68, 0x5C9F, 0xCC62, 0x5CA0, 0xCC5D,
00656     0x5CA1, 0xA9A3, 0x5CA2, 0xCC65, 0x5CA3, 0xCC63, 0x5CA4, 0xCC5C,
00657     0x5CA5, 0xCC69, 0x5CA6, 0xCC6C, 0x5CA7, 0xCC67, 0x5CA8, 0xCC60,
00658     0x5CA9, 0xA9A5, 0x5CAA, 0xCC66, 0x5CAB, 0xA9A6, 0x5CAC, 0xCC61,
00659     0x5CAD, 0xCC64, 0x5CAE, 0xCC5B, 0x5CAF, 0xCC5F, 0x5CB0, 0xCC6B,
00660     0x5CB1, 0xA9A7, 0x5CB3, 0xA9A8, 0x5CB5, 0xCC5E, 0x5CB6, 0xCC6A,
00661     0x5CB7, 0xA9A2, 0x5CB8, 0xA9A4, 0x5CC6, 0xCEAB, 0x5CC7, 0xCEA4,
00662     0x5CC8, 0xCEAA, 0x5CC9, 0xCEA3, 0x5CCA, 0xCEA5, 0x5CCB, 0xCE7D,
00663     0x5CCC, 0xCE7B, 0x5CCE, 0xCEAC, 0x5CCF, 0xCEA9, 0x5CD0, 0xCE79,
00664     0x5CD2, 0xABD0, 0x5CD3, 0xCEA7, 0x5CD4, 0xCEA8, 0x5CD6, 0xCEA6,
00665     0x5CD7, 0xCE7C, 0x5CD8, 0xCE7A, 0x5CD9, 0xABCF, 0x5CDA, 0xCEA2,
00666     0x5CDB, 0xCE7E, 0x5CDE, 0xCEA1, 0x5CDF, 0xCEAD, 0x5CE8, 0xAE6F,
00667     0x5CEA, 0xAE6E, 0x5CEC, 0xD16C, 0x5CED, 0xAE6B, 0x5CEE, 0xD16E,
00668     0x5CF0, 0xAE70, 0x5CF1, 0xD16F, 0x5CF4, 0xAE73, 0x5CF6, 0xAE71,
00669     0x5CF7, 0xD170, 0x5CF8, 0xCEAE, 0x5CF9, 0xD172, 0x5CFB, 0xAE6D,
00670     0x5CFD, 0xAE6C, 0x5CFF, 0xD16D, 0x5D00, 0xD171, 0x5D01, 0xAE72,
00671     0x5D06, 0xB153, 0x5D07, 0xB152, 0x5D0B, 0xD4F5, 0x5D0C, 0xD4F9,
00672     0x5D0D, 0xD4FB, 0x5D0E, 0xB154, 0x5D0F, 0xD4FE, 0x5D11, 0xB158,
00673     0x5D12, 0xD541, 0x5D14, 0xB15A, 0x5D16, 0xB156, 0x5D17, 0xB15E,
00674     0x5D19, 0xB15B, 0x5D1A, 0xD4F7, 0x5D1B, 0xB155, 0x5D1D, 0xD4F6,
00675     0x5D1E, 0xD4F4, 0x5D1F, 0xD543, 0x5D20, 0xD4F8, 0x5D22, 0xB157,
00676     0x5D23, 0xD542, 0x5D24, 0xB15C, 0x5D25, 0xD4FD, 0x5D26, 0xD4FC,
00677     0x5D27, 0xB15D, 0x5D28, 0xD4FA, 0x5D29, 0xB159, 0x5D2E, 0xD544,
00678     0x5D30, 0xD540, 0x5D31, 0xD8E7, 0x5D32, 0xD8EE, 0x5D33, 0xD8E3,
00679     0x5D34, 0xB451, 0x5D35, 0xD8DF, 0x5D36, 0xD8EF, 0x5D37, 0xD8D9,
00680     0x5D38, 0xD8EC, 0x5D39, 0xD8EA, 0x5D3A, 0xD8E4, 0x5D3C, 0xD8ED,
00681     0x5D3D, 0xD8E6, 0x5D3F, 0xD8DE, 0x5D40, 0xD8F0, 0x5D41, 0xD8DC,
00682     0x5D42, 0xD8E9, 0x5D43, 0xD8DA, 0x5D45, 0xD8F1, 0x5D47, 0xB452,
00683     0x5D49, 0xD8EB, 0x5D4A, 0xDD4F, 0x5D4B, 0xD8DD, 0x5D4C, 0xB44F,
00684     0x5D4E, 0xD8E1, 0x5D50, 0xB450, 0x5D51, 0xD8E0, 0x5D52, 0xD8E5,
00685     0x5D55, 0xD8E2, 0x5D59, 0xD8E8, 0x5D5E, 0xDD53, 0x5D62, 0xDD56,
00686     0x5D63, 0xDD4E, 0x5D65, 0xDD50, 0x5D67, 0xDD55, 0x5D68, 0xDD54,
00687     0x5D69, 0xB743, 0x5D6B, 0xD8DB, 0x5D6C, 0xDD52, 0x5D6F, 0xB744,
00688     0x5D71, 0xDD4D, 0x5D72, 0xDD51, 0x5D77, 0xE1A9, 0x5D79, 0xE1B0,
00689     0x5D7A, 0xE1A7, 0x5D7C, 0xE1AE, 0x5D7D, 0xE1A5, 0x5D7E, 0xE1AD,
00690     0x5D7F, 0xE1B1, 0x5D80, 0xE1A4, 0x5D81, 0xE1A8, 0x5D82, 0xE1A3,
00691     0x5D84, 0xB9F1, 0x5D86, 0xE1A6, 0x5D87, 0xB9F2, 0x5D88, 0xE1AC,
00692     0x5D89, 0xE1AB, 0x5D8A, 0xE1AA, 0x5D8D, 0xE1AF, 0x5D92, 0xE565,
00693     0x5D93, 0xE567, 0x5D94, 0xBC6B, 0x5D95, 0xE568, 0x5D97, 0xE563,
00694     0x5D99, 0xE562, 0x5D9A, 0xE56C, 0x5D9C, 0xE56A, 0x5D9D, 0xBC6A,
00695     0x5D9E, 0xE56D, 0x5D9F, 0xE564, 0x5DA0, 0xE569, 0x5DA1, 0xE56B,
00696     0x5DA2, 0xE566, 0x5DA7, 0xE961, 0x5DA8, 0xE966, 0x5DA9, 0xE960,
00697     0x5DAA, 0xE965, 0x5DAC, 0xE95E, 0x5DAD, 0xE968, 0x5DAE, 0xE964,
00698     0x5DAF, 0xE969, 0x5DB0, 0xE963, 0x5DB1, 0xE95F, 0x5DB2, 0xE967,
00699     0x5DB4, 0xE96A, 0x5DB5, 0xE962, 0x5DB7, 0xECDA, 0x5DB8, 0xC0AF,
00700     0x5DBA, 0xC0AD, 0x5DBC, 0xC0AC, 0x5DBD, 0xC0AE, 0x5DC0, 0xEFC4,
00701     0x5DC2, 0xF172, 0x5DC3, 0xF1FD, 0x5DC6, 0xF444, 0x5DC7, 0xF445,
00702     0x5DC9, 0xC460, 0x5DCB, 0xF5C9, 0x5DCD, 0xC4DE, 0x5DCF, 0xF5CA,
00703     0x5DD1, 0xF6DE, 0x5DD2, 0xC572, 0x5DD4, 0xC571, 0x5DD5, 0xF6DD,
00704     0x5DD6, 0xC5C9, 0x5DD8, 0xF7D6, 0x5DDD, 0xA474, 0x5DDE, 0xA67B,
00705     0x5DDF, 0xC9DA, 0x5DE0, 0xCACA, 0x5DE1, 0xA8B5, 0x5DE2, 0xB15F,
00706     0x5DE5, 0xA475, 0x5DE6, 0xA5AA, 0x5DE7, 0xA5A9, 0x5DE8, 0xA5A8,
00707     0x5DEB, 0xA7C5, 0x5DEE, 0xAE74, 0x5DF0, 0xDD57, 0x5DF1, 0xA476,
00708     0x5DF2, 0xA477, 0x5DF3, 0xA478, 0x5DF4, 0xA4DA, 0x5DF7, 0xABD1,
00709     0x5DF9, 0xCEAF, 0x5DFD, 0xB453, 0x5DFE, 0xA479, 0x5DFF, 0xC95D,
00710     0x5E02, 0xA5AB, 0x5E03, 0xA5AC, 0x5E04, 0xC978, 0x5E06, 0xA67C,
00711     0x5E0A, 0xCACB, 0x5E0C, 0xA7C6, 0x5E0E, 0xCACC, 0x5E11, 0xA9AE,
00712     0x5E14, 0xCC6E, 0x5E15, 0xA9AC, 0x5E16, 0xA9AB, 0x5E17, 0xCC6D,
00713     0x5E18, 0xA9A9, 0x5E19, 0xCC6F, 0x5E1A, 0xA9AA, 0x5E1B, 0xA9AD,
00714     0x5E1D, 0xABD2, 0x5E1F, 0xABD4, 0x5E20, 0xCEB3, 0x5E21, 0xCEB0,
00715     0x5E22, 0xCEB1, 0x5E23, 0xCEB2, 0x5E24, 0xCEB4, 0x5E25, 0xABD3,
00716     0x5E28, 0xD174, 0x5E29, 0xD173, 0x5E2B, 0xAE76, 0x5E2D, 0xAE75,
00717     0x5E33, 0xB162, 0x5E34, 0xD546, 0x5E36, 0xB161, 0x5E37, 0xB163,
00718     0x5E38, 0xB160, 0x5E3D, 0xB455, 0x5E3E, 0xD545, 0x5E40, 0xB456,
00719     0x5E41, 0xD8F3, 0x5E43, 0xB457, 0x5E44, 0xD8F2, 0x5E45, 0xB454,
00720     0x5E4A, 0xDD5A, 0x5E4B, 0xDD5C, 0x5E4C, 0xB745, 0x5E4D, 0xDD5B,
00721     0x5E4E, 0xDD59, 0x5E4F, 0xDD58, 0x5E53, 0xE1B4, 0x5E54, 0xB9F7,
00722     0x5E55, 0xB9F5, 0x5E57, 0xB9F6, 0x5E58, 0xE1B2, 0x5E59, 0xE1B3,
00723     0x5E5B, 0xB9F3, 0x5E5C, 0xE571, 0x5E5D, 0xE56F, 0x5E5F, 0xBC6D,
00724     0x5E60, 0xE570, 0x5E61, 0xBC6E, 0x5E62, 0xBC6C, 0x5E63, 0xB9F4,
00725     0x5E66, 0xE96D, 0x5E67, 0xE96B, 0x5E68, 0xE96C, 0x5E69, 0xE56E,
00726     0x5E6A, 0xECDC, 0x5E6B, 0xC0B0, 0x5E6C, 0xECDB, 0x5E6D, 0xEFC5,
00727     0x5E6E, 0xEFC6, 0x5E6F, 0xE96E, 0x5E70, 0xF1FE, 0x5E72, 0xA47A,
00728     0x5E73, 0xA5AD, 0x5E74, 0xA67E, 0x5E75, 0xC9DB, 0x5E76, 0xA67D,
00729     0x5E78, 0xA9AF, 0x5E79, 0xB746, 0x5E7B, 0xA4DB, 0x5E7C, 0xA5AE,
00730     0x5E7D, 0xABD5, 0x5E7E, 0xB458, 0x5E80, 0xC979, 0x5E82, 0xC97A,
00731     0x5E84, 0xC9DC, 0x5E87, 0xA7C8, 0x5E88, 0xCAD0, 0x5E89, 0xCACE,
00732     0x5E8A, 0xA7C9, 0x5E8B, 0xCACD, 0x5E8C, 0xCACF, 0x5E8D, 0xCAD1,
00733     0x5E8F, 0xA7C7, 0x5E95, 0xA9B3, 0x5E96, 0xA9B4, 0x5E97, 0xA9B1,
00734     0x5E9A, 0xA9B0, 0x5E9B, 0xCEB8, 0x5E9C, 0xA9B2, 0x5EA0, 0xABD6,
00735     0x5EA2, 0xCEB7, 0x5EA3, 0xCEB9, 0x5EA4, 0xCEB6, 0x5EA5, 0xCEBA,
00736     0x5EA6, 0xABD7, 0x5EA7, 0xAE79, 0x5EA8, 0xD175, 0x5EAA, 0xD177,
00737     0x5EAB, 0xAE77, 0x5EAC, 0xD178, 0x5EAD, 0xAE78, 0x5EAE, 0xD176,
00738     0x5EB0, 0xCEB5, 0x5EB1, 0xD547, 0x5EB2, 0xD54A, 0x5EB3, 0xD54B,
00739     0x5EB4, 0xD548, 0x5EB5, 0xB167, 0x5EB6, 0xB166, 0x5EB7, 0xB164,
00740     0x5EB8, 0xB165, 0x5EB9, 0xD549, 0x5EBE, 0xB168, 0x5EC1, 0xB45A,
00741     0x5EC2, 0xB45B, 0x5EC4, 0xB45C, 0x5EC5, 0xDD5D, 0x5EC6, 0xDD5F,
00742     0x5EC7, 0xDD61, 0x5EC8, 0xB748, 0x5EC9, 0xB747, 0x5ECA, 0xB459,
00743     0x5ECB, 0xDD60, 0x5ECC, 0xDD5E, 0x5ECE, 0xE1B8, 0x5ED1, 0xE1B6,
00744     0x5ED2, 0xE1BC, 0x5ED3, 0xB9F8, 0x5ED4, 0xE1BD, 0x5ED5, 0xE1BA,
00745     0x5ED6, 0xB9F9, 0x5ED7, 0xE1B7, 0x5ED8, 0xE1B5, 0x5ED9, 0xE1BB,
00746     0x5EDA, 0xBC70, 0x5EDB, 0xE573, 0x5EDC, 0xE1B9, 0x5EDD, 0xBC72,
00747     0x5EDE, 0xE574, 0x5EDF, 0xBC71, 0x5EE0, 0xBC74, 0x5EE1, 0xE575,
00748     0x5EE2, 0xBC6F, 0x5EE3, 0xBC73, 0x5EE5, 0xE973, 0x5EE6, 0xE971,
00749     0x5EE7, 0xE970, 0x5EE8, 0xE972, 0x5EE9, 0xE96F, 0x5EEC, 0xC366,
00750     0x5EEE, 0xF446, 0x5EEF, 0xF447, 0x5EF1, 0xF5CB, 0x5EF2, 0xF6DF,
00751     0x5EF3, 0xC655, 0x5EF6, 0xA9B5, 0x5EF7, 0xA7CA, 0x5EFA, 0xABD8,
00752     0x5EFE, 0xA47B, 0x5EFF, 0xA4DC, 0x5F01, 0xA5AF, 0x5F02, 0xC9DD,
00753     0x5F04, 0xA7CB, 0x5F05, 0xCAD2, 0x5F07, 0xCEBB, 0x5F08, 0xABD9,
00754     0x5F0A, 0xB9FA, 0x5F0B, 0xA47C, 0x5F0F, 0xA6A1, 0x5F12, 0xB749,
00755     0x5F13, 0xA47D, 0x5F14, 0xA4DD, 0x5F15, 0xA4DE, 0x5F17, 0xA5B1,
00756     0x5F18, 0xA5B0, 0x5F1A, 0xC9DE, 0x5F1B, 0xA6A2, 0x5F1D, 0xCAD3,
00757     0x5F1F, 0xA7CC, 0x5F22, 0xCC71, 0x5F23, 0xCC72, 0x5F24, 0xCC73,
00758     0x5F26, 0xA9B6, 0x5F27, 0xA9B7, 0x5F28, 0xCC70, 0x5F29, 0xA9B8,
00759     0x5F2D, 0xABDA, 0x5F2E, 0xCEBC, 0x5F30, 0xD17A, 0x5F31, 0xAE7A,
00760     0x5F33, 0xD179, 0x5F35, 0xB169, 0x5F36, 0xD54C, 0x5F37, 0xB16A,
00761     0x5F38, 0xD54D, 0x5F3C, 0xB45D, 0x5F40, 0xDD62, 0x5F43, 0xE1BF,
00762     0x5F44, 0xE1BE, 0x5F46, 0xB9FB, 0x5F48, 0xBC75, 0x5F49, 0xE576,
00763     0x5F4A, 0xBECA, 0x5F4B, 0xE974, 0x5F4C, 0xC0B1, 0x5F4E, 0xC573,
00764     0x5F4F, 0xF7D8, 0x5F54, 0xCC74, 0x5F56, 0xCEBD, 0x5F57, 0xB16B,
00765     0x5F58, 0xD8F4, 0x5F59, 0xB74A, 0x5F5D, 0xC255, 0x5F62, 0xA7CE,
00766     0x5F64, 0xA7CD, 0x5F65, 0xABDB, 0x5F67, 0xD17B, 0x5F69, 0xB16D,
00767     0x5F6A, 0xB343, 0x5F6B, 0xB16E, 0x5F6C, 0xB16C, 0x5F6D, 0xB45E,
00768     0x5F6F, 0xE1C0, 0x5F70, 0xB9FC, 0x5F71, 0xBC76, 0x5F73, 0xC94C,
00769     0x5F74, 0xC9DF, 0x5F76, 0xCAD5, 0x5F77, 0xA7CF, 0x5F78, 0xCAD4,
00770     0x5F79, 0xA7D0, 0x5F7C, 0xA9BC, 0x5F7D, 0xCC77, 0x5F7E, 0xCC76,
00771     0x5F7F, 0xA9BB, 0x5F80, 0xA9B9, 0x5F81, 0xA9BA, 0x5F82, 0xCC75,
00772     0x5F85, 0xABDD, 0x5F86, 0xCEBE, 0x5F87, 0xABE0, 0x5F88, 0xABDC,
00773     0x5F89, 0xABE2, 0x5F8A, 0xABDE, 0x5F8B, 0xABDF, 0x5F8C, 0xABE1,
00774     0x5F90, 0xAE7D, 0x5F91, 0xAE7C, 0x5F92, 0xAE7B, 0x5F96, 0xD54F,
00775     0x5F97, 0xB16F, 0x5F98, 0xB172, 0x5F99, 0xB170, 0x5F9B, 0xD54E,
00776     0x5F9C, 0xB175, 0x5F9E, 0xB171, 0x5F9F, 0xD550, 0x5FA0, 0xB174,
00777     0x5FA1, 0xB173, 0x5FA5, 0xD8F6, 0x5FA6, 0xD8F5, 0x5FA8, 0xB461,
00778     0x5FA9, 0xB45F, 0x5FAA, 0xB460, 0x5FAB, 0xD8F7, 0x5FAC, 0xB74B,
00779     0x5FAD, 0xDD64, 0x5FAE, 0xB74C, 0x5FAF, 0xDD63, 0x5FB2, 0xE577,
00780     0x5FB5, 0xBC78, 0x5FB6, 0xE1C1, 0x5FB7, 0xBC77, 0x5FB9, 0xB9FD,
00781     0x5FBB, 0xECDE, 0x5FBC, 0xE975, 0x5FBD, 0xC0B2, 0x5FBE, 0xECDD,
00782     0x5FBF, 0xF240, 0x5FC0, 0xF448, 0x5FC1, 0xF449, 0x5FC3, 0xA4DF,
00783     0x5FC5, 0xA5B2, 0x5FC9, 0xC97B, 0x5FCC, 0xA7D2, 0x5FCD, 0xA7D4,
00784     0x5FCF, 0xC9E2, 0x5FD0, 0xCAD8, 0x5FD1, 0xCAD7, 0x5FD2, 0xCAD6,
00785     0x5FD4, 0xC9E1, 0x5FD5, 0xC9E0, 0x5FD6, 0xA6A4, 0x5FD7, 0xA7D3,
00786     0x5FD8, 0xA7D1, 0x5FD9, 0xA6A3, 0x5FDD, 0xA9BD, 0x5FDE, 0xCC78,
00787     0x5FE0, 0xA9BE, 0x5FE1, 0xCADD, 0x5FE3, 0xCADF, 0x5FE4, 0xCADE,
00788     0x5FE5, 0xCC79, 0x5FE8, 0xCADA, 0x5FEA, 0xA7D8, 0x5FEB, 0xA7D6,
00789     0x5FED, 0xCAD9, 0x5FEE, 0xCADB, 0x5FEF, 0xCAE1, 0x5FF1, 0xA7D5,
00790     0x5FF3, 0xCADC, 0x5FF4, 0xCAE5, 0x5FF5, 0xA9C0, 0x5FF7, 0xCAE2,
00791     0x5FF8, 0xA7D7, 0x5FFA, 0xCAE0, 0x5FFB, 0xCAE3, 0x5FFD, 0xA9BF,
00792     0x5FFF, 0xA9C1, 0x6000, 0xCAE4, 0x6009, 0xCCAF, 0x600A, 0xCCA2,
00793     0x600B, 0xCC7E, 0x600C, 0xCCAE, 0x600D, 0xCCA9, 0x600E, 0xABE7,
00794     0x600F, 0xA9C2, 0x6010, 0xCCAA, 0x6011, 0xCCAD, 0x6012, 0xABE3,
00795     0x6013, 0xCCAC, 0x6014, 0xA9C3, 0x6015, 0xA9C8, 0x6016, 0xA9C6,
00796     0x6017, 0xCCA3, 0x6019, 0xCC7C, 0x601A, 0xCCA5, 0x601B, 0xA9CD,
00797     0x601C, 0xCCB0, 0x601D, 0xABE4, 0x601E, 0xCCA6, 0x6020, 0xABE5,
00798     0x6021, 0xA9C9, 0x6022, 0xCCA8, 0x6024, 0xCECD, 0x6025, 0xABE6,
00799     0x6026, 0xCC7B, 0x6027, 0xA9CA, 0x6028, 0xABE8, 0x6029, 0xA9CB,
00800     0x602A, 0xA9C7, 0x602B, 0xA9CC, 0x602C, 0xCCA7, 0x602D, 0xCC7A,
00801     0x602E, 0xCCAB, 0x602F, 0xA9C4, 0x6032, 0xCC7D, 0x6033, 0xCCA4,
00802     0x6034, 0xCCA1, 0x6035, 0xA9C5, 0x6037, 0xCEBF, 0x6039, 0xCEC0,
00803     0x6040, 0xCECA, 0x6041, 0xD1A1, 0x6042, 0xCECB, 0x6043, 0xABEE,
00804     0x6044, 0xCECE, 0x6045, 0xCEC4, 0x6046, 0xABED, 0x6047, 0xCEC6,
00805     0x6049, 0xCEC7, 0x604C, 0xCEC9, 0x604D, 0xABE9, 0x6050, 0xAEA3,
00806     0x6052, 0xF9DA, 0x6053, 0xCEC5, 0x6054, 0xCEC1, 0x6055, 0xAEA4,
00807     0x6058, 0xCECF, 0x6059, 0xAE7E, 0x605A, 0xD17D, 0x605B, 0xCEC8,
00808     0x605D, 0xD17C, 0x605E, 0xCEC3, 0x605F, 0xCECC, 0x6062, 0xABEC,
00809     0x6063, 0xAEA1, 0x6064, 0xABF2, 0x6065, 0xAEA2, 0x6066, 0xCED0,
00810     0x6067, 0xD17E, 0x6068, 0xABEB, 0x6069, 0xAEA6, 0x606A, 0xABF1,
00811     0x606B, 0xABF0, 0x606C, 0xABEF, 0x606D, 0xAEA5, 0x606E, 0xCED1,
00812     0x606F, 0xAEA7, 0x6070, 0xABEA, 0x6072, 0xCEC2, 0x607F, 0xB176,
00813     0x6080, 0xD1A4, 0x6081, 0xD1A6, 0x6083, 0xD1A8, 0x6084, 0xAEA8,
00814     0x6085, 0xAEAE, 0x6086, 0xD553, 0x6087, 0xD1AC, 0x6088, 0xD1A3,
00815     0x6089, 0xB178, 0x608A, 0xD551, 0x608C, 0xAEAD, 0x608D, 0xAEAB,
00816     0x608E, 0xD1AE, 0x6090, 0xD552, 0x6092, 0xD1A5, 0x6094, 0xAEAC,
00817     0x6095, 0xD1A9, 0x6096, 0xAEAF, 0x6097, 0xD1AB, 0x609A, 0xAEAA,
00818     0x609B, 0xD1AA, 0x609C, 0xD1AD, 0x609D, 0xD1A7, 0x609F, 0xAEA9,
00819     0x60A0, 0xB179, 0x60A2, 0xD1A2, 0x60A3, 0xB177, 0x60A8, 0xB17A,
00820     0x60B0, 0xD555, 0x60B1, 0xD55E, 0x60B2, 0xB464, 0x60B4, 0xB17C,
00821     0x60B5, 0xB1A3, 0x60B6, 0xB465, 0x60B7, 0xD560, 0x60B8, 0xB1AA,
00822     0x60B9, 0xD8F9, 0x60BA, 0xD556, 0x60BB, 0xB1A2, 0x60BC, 0xB1A5,
00823     0x60BD, 0xB17E, 0x60BE, 0xD554, 0x60BF, 0xD562, 0x60C0, 0xD565,
00824     0x60C1, 0xD949, 0x60C3, 0xD563, 0x60C4, 0xD8FD, 0x60C5, 0xB1A1,
00825     0x60C6, 0xB1A8, 0x60C7, 0xB1AC, 0x60C8, 0xD55D, 0x60C9, 0xD8F8,
00826     0x60CA, 0xD561, 0x60CB, 0xB17B, 0x60CC, 0xD8FA, 0x60CD, 0xD564,
00827     0x60CE, 0xD8FC, 0x60CF, 0xD559, 0x60D1, 0xB462, 0x60D3, 0xD557,
00828     0x60D4, 0xD558, 0x60D5, 0xB1A7, 0x60D8, 0xB1A6, 0x60D9, 0xD55B,
00829     0x60DA, 0xB1AB, 0x60DB, 0xD55F, 0x60DC, 0xB1A4, 0x60DD, 0xD55C,
00830     0x60DF, 0xB1A9, 0x60E0, 0xB466, 0x60E1, 0xB463, 0x60E2, 0xD8FB,
00831     0x60E4, 0xD55A, 0x60E6, 0xB17D, 0x60F0, 0xB46B, 0x60F1, 0xB46F,
00832     0x60F2, 0xD940, 0x60F3, 0xB751, 0x60F4, 0xB46D, 0x60F5, 0xD944,
00833     0x60F6, 0xB471, 0x60F7, 0xDD65, 0x60F8, 0xD946, 0x60F9, 0xB753,
00834     0x60FA, 0xB469, 0x60FB, 0xB46C, 0x60FC, 0xD947, 0x60FE, 0xD948,
00835     0x60FF, 0xD94E, 0x6100, 0xB473, 0x6101, 0xB754, 0x6103, 0xD94A,
00836     0x6104, 0xD94F, 0x6105, 0xD943, 0x6106, 0xB75E, 0x6108, 0xB755,
00837     0x6109, 0xB472, 0x610A, 0xD941, 0x610B, 0xD950, 0x610D, 0xB75D,
00838     0x610E, 0xB470, 0x610F, 0xB74E, 0x6110, 0xD94D, 0x6112, 0xB474,
00839     0x6113, 0xD945, 0x6114, 0xD8FE, 0x6115, 0xB46A, 0x6116, 0xD942,
00840     0x6118, 0xD94B, 0x611A, 0xB74D, 0x611B, 0xB752, 0x611C, 0xB467,
00841     0x611D, 0xD94C, 0x611F, 0xB750, 0x6123, 0xB468, 0x6127, 0xB75C,
00842     0x6128, 0xE1C3, 0x6129, 0xDD70, 0x612B, 0xDD68, 0x612C, 0xE1C2,
00843     0x612E, 0xDD6C, 0x612F, 0xDD6E, 0x6132, 0xDD6B, 0x6134, 0xB75B,
00844     0x6136, 0xDD6A, 0x6137, 0xB75F, 0x613B, 0xE1D2, 0x613E, 0xB75A,
00845     0x613F, 0xBA40, 0x6140, 0xDD71, 0x6141, 0xE1C4, 0x6144, 0xB758,
00846     0x6145, 0xDD69, 0x6146, 0xDD6D, 0x6147, 0xB9FE, 0x6148, 0xB74F,
00847     0x6149, 0xDD66, 0x614A, 0xDD67, 0x614B, 0xBA41, 0x614C, 0xB757,
00848     0x614D, 0xB759, 0x614E, 0xB756, 0x614F, 0xDD6F, 0x6152, 0xE1C8,
00849     0x6153, 0xE1C9, 0x6154, 0xE1CE, 0x6155, 0xBC7D, 0x6156, 0xE1D5,
00850     0x6158, 0xBA47, 0x615A, 0xBA46, 0x615B, 0xE1D0, 0x615D, 0xBC7C,
00851     0x615E, 0xE1C5, 0x615F, 0xBA45, 0x6161, 0xE1D4, 0x6162, 0xBA43,
00852     0x6163, 0xBA44, 0x6165, 0xE1D1, 0x6166, 0xE5AA, 0x6167, 0xBC7A,
00853     0x6168, 0xB46E, 0x616A, 0xE1D3, 0x616B, 0xBCA3, 0x616C, 0xE1CB,
00854     0x616E, 0xBC7B, 0x6170, 0xBCA2, 0x6171, 0xE1C6, 0x6172, 0xE1CA,
00855     0x6173, 0xE1C7, 0x6174, 0xE1CD, 0x6175, 0xBA48, 0x6176, 0xBC79,
00856     0x6177, 0xBA42, 0x6179, 0xE57A, 0x617A, 0xE1CF, 0x617C, 0xBCA1,
00857     0x617E, 0xBCA4, 0x6180, 0xE1CC, 0x6182, 0xBC7E, 0x6183, 0xE579,
00858     0x6189, 0xE57E, 0x618A, 0xBECE, 0x618B, 0xE578, 0x618C, 0xE9A3,
00859     0x618D, 0xE5A9, 0x618E, 0xBCA8, 0x6190, 0xBCA6, 0x6191, 0xBECC,
00860     0x6192, 0xE5A6, 0x6193, 0xE5A2, 0x6194, 0xBCAC, 0x6196, 0xE978,
00861     0x619A, 0xBCAA, 0x619B, 0xE5A1, 0x619D, 0xE976, 0x619F, 0xE5A5,
00862     0x61A1, 0xE5A8, 0x61A2, 0xE57D, 0x61A4, 0xBCAB, 0x61A7, 0xBCA5,
00863     0x61A8, 0xE977, 0x61A9, 0xBECD, 0x61AA, 0xE5A7, 0x61AB, 0xBCA7,
00864     0x61AC, 0xBCA9, 0x61AD, 0xE5A4, 0x61AE, 0xBCAD, 0x61AF, 0xE5A3,
00865     0x61B0, 0xE57C, 0x61B1, 0xE57B, 0x61B2, 0xBECB, 0x61B3, 0xE5AB,
00866     0x61B4, 0xE97A, 0x61B5, 0xECE0, 0x61B6, 0xBED0, 0x61B8, 0xE9A2,
00867     0x61BA, 0xE97E, 0x61BC, 0xECE1, 0x61BE, 0xBED1, 0x61BF, 0xE9A1,
00868     0x61C1, 0xE97C, 0x61C2, 0xC0B4, 0x61C3, 0xECDF, 0x61C5, 0xE979,
00869     0x61C6, 0xE97B, 0x61C7, 0xC0B5, 0x61C8, 0xBED3, 0x61C9, 0xC0B3,
00870     0x61CA, 0xBED2, 0x61CB, 0xC0B7, 0x61CC, 0xE97D, 0x61CD, 0xBECF,
00871     0x61D6, 0xEFCF, 0x61D8, 0xEFC7, 0x61DE, 0xECE7, 0x61DF, 0xEFC8,
00872     0x61E0, 0xECE3, 0x61E3, 0xC256, 0x61E4, 0xECE5, 0x61E5, 0xECE4,
00873     0x61E6, 0xC0B6, 0x61E7, 0xECE2, 0x61E8, 0xECE6, 0x61E9, 0xEFD0,
00874     0x61EA, 0xEFCC, 0x61EB, 0xEFCE, 0x61ED, 0xEFC9, 0x61EE, 0xEFCA,
00875     0x61F0, 0xEFCD, 0x61F1, 0xEFCB, 0x61F2, 0xC367, 0x61F5, 0xC36A,
00876     0x61F6, 0xC369, 0x61F7, 0xC368, 0x61F8, 0xC461, 0x61F9, 0xF44A,
00877     0x61FA, 0xC462, 0x61FB, 0xF241, 0x61FC, 0xC4DF, 0x61FD, 0xF5CC,
00878     0x61FE, 0xC4E0, 0x61FF, 0xC574, 0x6200, 0xC5CA, 0x6201, 0xF7D9,
00879     0x6203, 0xF7DA, 0x6204, 0xF7DB, 0x6207, 0xF9BA, 0x6208, 0xA4E0,
00880     0x6209, 0xC97C, 0x620A, 0xA5B3, 0x620C, 0xA6A6, 0x620D, 0xA6A7,
00881     0x620E, 0xA6A5, 0x6210, 0xA6A8, 0x6211, 0xA7DA, 0x6212, 0xA7D9,
00882     0x6214, 0xCCB1, 0x6215, 0xA9CF, 0x6216, 0xA9CE, 0x6219, 0xD1AF,
00883     0x621A, 0xB1AD, 0x621B, 0xB1AE, 0x621F, 0xB475, 0x6220, 0xDD72,
00884     0x6221, 0xB760, 0x6222, 0xB761, 0x6223, 0xDD74, 0x6224, 0xDD76,
00885     0x6225, 0xDD75, 0x6227, 0xE1D7, 0x6229, 0xE1D6, 0x622A, 0xBA49,
00886     0x622B, 0xE1D8, 0x622D, 0xE5AC, 0x622E, 0xBCAE, 0x6230, 0xBED4,
00887     0x6232, 0xC0B8, 0x6233, 0xC257, 0x6234, 0xC0B9, 0x6236, 0xA4E1,
00888     0x623A, 0xCAE6, 0x623D, 0xCCB2, 0x623E, 0xA9D1, 0x623F, 0xA9D0,
00889     0x6240, 0xA9D2, 0x6241, 0xABF3, 0x6242, 0xCED2, 0x6243, 0xCED3,
00890     0x6246, 0xD1B0, 0x6247, 0xAEB0, 0x6248, 0xB1AF, 0x6249, 0xB476,
00891     0x624A, 0xD951, 0x624B, 0xA4E2, 0x624D, 0xA47E, 0x624E, 0xA4E3,
00892     0x6250, 0xC97D, 0x6251, 0xA5B7, 0x6252, 0xA5B6, 0x6253, 0xA5B4,
00893     0x6254, 0xA5B5, 0x6258, 0xA6AB, 0x6259, 0xC9E9, 0x625A, 0xC9EB,
00894     0x625B, 0xA6AA, 0x625C, 0xC9E3, 0x625E, 0xC9E4, 0x6260, 0xC9EA,
00895     0x6261, 0xC9E6, 0x6262, 0xC9E8, 0x6263, 0xA6A9, 0x6264, 0xC9E5,
00896     0x6265, 0xC9EC, 0x6266, 0xC9E7, 0x626D, 0xA7E1, 0x626E, 0xA7EA,
00897     0x626F, 0xA7E8, 0x6270, 0xCAF0, 0x6271, 0xCAED, 0x6272, 0xCAF5,
00898     0x6273, 0xA7E6, 0x6274, 0xCAF6, 0x6276, 0xA7DF, 0x6277, 0xCAF3,
00899     0x6279, 0xA7E5, 0x627A, 0xCAEF, 0x627B, 0xCAEE, 0x627C, 0xA7E3,
00900     0x627D, 0xCAF4, 0x627E, 0xA7E4, 0x627F, 0xA9D3, 0x6280, 0xA7DE,
00901     0x6281, 0xCAF1, 0x6283, 0xCAE7, 0x6284, 0xA7DB, 0x6286, 0xA7EE,
00902     0x6287, 0xCAEC, 0x6288, 0xCAF2, 0x6289, 0xA7E0, 0x628A, 0xA7E2,
00903     0x628C, 0xCAE8, 0x628E, 0xCAE9, 0x628F, 0xCAEA, 0x6291, 0xA7ED,
00904     0x6292, 0xA7E7, 0x6293, 0xA7EC, 0x6294, 0xCAEB, 0x6295, 0xA7EB,
00905     0x6296, 0xA7DD, 0x6297, 0xA7DC, 0x6298, 0xA7E9, 0x62A8, 0xA9E1,
00906     0x62A9, 0xCCBE, 0x62AA, 0xCCB7, 0x62AB, 0xA9DC, 0x62AC, 0xA9EF,
00907     0x62AD, 0xCCB3, 0x62AE, 0xCCBA, 0x62AF, 0xCCBC, 0x62B0, 0xCCBF,
00908     0x62B1, 0xA9EA, 0x62B3, 0xCCBB, 0x62B4, 0xCCB4, 0x62B5, 0xA9E8,
00909     0x62B6, 0xCCB8, 0x62B8, 0xCCC0, 0x62B9, 0xA9D9, 0x62BB, 0xCCBD,
00910     0x62BC, 0xA9E3, 0x62BD, 0xA9E2, 0x62BE, 0xCCB6, 0x62BF, 0xA9D7,
00911     0x62C2, 0xA9D8, 0x62C4, 0xA9D6, 0x62C6, 0xA9EE, 0x62C7, 0xA9E6,
00912     0x62C8, 0xA9E0, 0x62C9, 0xA9D4, 0x62CA, 0xCCB9, 0x62CB, 0xA9DF,
00913     0x62CC, 0xA9D5, 0x62CD, 0xA9E7, 0x62CE, 0xA9F0, 0x62CF, 0xCED4,
00914     0x62D0, 0xA9E4, 0x62D1, 0xCCB5, 0x62D2, 0xA9DA, 0x62D3, 0xA9DD,
00915     0x62D4, 0xA9DE, 0x62D6, 0xA9EC, 0x62D7, 0xA9ED, 0x62D8, 0xA9EB,
00916     0x62D9, 0xA9E5, 0x62DA, 0xA9E9, 0x62DB, 0xA9DB, 0x62DC, 0xABF4,
00917     0x62EB, 0xCEDA, 0x62EC, 0xAC41, 0x62ED, 0xABF8, 0x62EE, 0xABFA,
00918     0x62EF, 0xAC40, 0x62F0, 0xCEE6, 0x62F1, 0xABFD, 0x62F2, 0xD1B1,
00919     0x62F3, 0xAEB1, 0x62F4, 0xAC43, 0x62F5, 0xCED7, 0x62F6, 0xCEDF,
00920     0x62F7, 0xABFE, 0x62F8, 0xCEDE, 0x62F9, 0xCEDB, 0x62FA, 0xCEE3,
00921     0x62FB, 0xCEE5, 0x62FC, 0xABF7, 0x62FD, 0xABFB, 0x62FE, 0xAC42,
00922     0x62FF, 0xAEB3, 0x6300, 0xCEE0, 0x6301, 0xABF9, 0x6302, 0xAC45,
00923     0x6303, 0xCED9, 0x6307, 0xABFC, 0x6308, 0xAEB2, 0x6309, 0xABF6,
00924     0x630B, 0xCED6, 0x630C, 0xCEDD, 0x630D, 0xCED5, 0x630E, 0xCED8,
00925     0x630F, 0xCEDC, 0x6310, 0xD1B2, 0x6311, 0xAC44, 0x6313, 0xCEE1,
00926     0x6314, 0xCEE2, 0x6315, 0xCEE4, 0x6316, 0xABF5, 0x6328, 0xAEC1,
00927     0x6329, 0xD1BE, 0x632A, 0xAEBF, 0x632B, 0xAEC0, 0x632C, 0xD1B4,
00928     0x632D, 0xD1C4, 0x632F, 0xAEB6, 0x6332, 0xD566, 0x6333, 0xD1C6,
00929     0x6334, 0xD1C0, 0x6336, 0xD1B7, 0x6338, 0xD1C9, 0x6339, 0xD1BA,
00930     0x633A, 0xAEBC, 0x633B, 0xD57D, 0x633C, 0xD1BD, 0x633D, 0xAEBE,
00931     0x633E, 0xAEB5, 0x6340, 0xD1CB, 0x6341, 0xD1BF, 0x6342, 0xAEB8,
00932     0x6343, 0xD1B8, 0x6344, 0xD1B5, 0x6345, 0xD1B6, 0x6346, 0xAEB9,
00933     0x6347, 0xD1C5, 0x6348, 0xD1CC, 0x6349, 0xAEBB, 0x634A, 0xD1BC,
00934     0x634B, 0xD1BB, 0x634C, 0xAEC3, 0x634D, 0xAEC2, 0x634E, 0xAEB4,
00935     0x634F, 0xAEBA, 0x6350, 0xAEBD, 0x6351, 0xD1C8, 0x6354, 0xD1C2,
00936     0x6355, 0xAEB7, 0x6356, 0xD1B3, 0x6357, 0xD1CA, 0x6358, 0xD1C1,
00937     0x6359, 0xD1C3, 0x635A, 0xD1C7, 0x6365, 0xD567, 0x6367, 0xB1B7,
00938     0x6368, 0xB1CB, 0x6369, 0xB1CA, 0x636B, 0xB1BF, 0x636D, 0xD579,
00939     0x636E, 0xD575, 0x636F, 0xD572, 0x6370, 0xD5A6, 0x6371, 0xB1BA,
00940     0x6372, 0xB1B2, 0x6375, 0xD577, 0x6376, 0xB4A8, 0x6377, 0xB1B6,
00941     0x6378, 0xD5A1, 0x637A, 0xB1CC, 0x637B, 0xB1C9, 0x637C, 0xD57B,
00942     0x637D, 0xD56A, 0x6380, 0xB1C8, 0x6381, 0xD5A3, 0x6382, 0xD569,
00943     0x6383, 0xB1BD, 0x6384, 0xB1C1, 0x6385, 0xD5A2, 0x6387, 0xD573,
00944     0x6388, 0xB1C2, 0x6389, 0xB1BC, 0x638A, 0xD568, 0x638C, 0xB478,
00945     0x638D, 0xD5A5, 0x638E, 0xD571, 0x638F, 0xB1C7, 0x6390, 0xD574,
00946     0x6391, 0xD5A4, 0x6392, 0xB1C6, 0x6394, 0xD952, 0x6396, 0xB1B3,
00947     0x6397, 0xD56F, 0x6398, 0xB1B8, 0x6399, 0xB1C3, 0x639B, 0xB1BE,
00948     0x639C, 0xD578, 0x639D, 0xD56E, 0x639E, 0xD56C, 0x639F, 0xD57E,
00949     0x63A0, 0xB1B0, 0x63A1, 0xB1C4, 0x63A2, 0xB1B4, 0x63A3, 0xB477,
00950     0x63A4, 0xD57C, 0x63A5, 0xB1B5, 0x63A7, 0xB1B1, 0x63A8, 0xB1C0,
00951     0x63A9, 0xB1BB, 0x63AA, 0xB1B9, 0x63AB, 0xD570, 0x63AC, 0xB1C5,
00952     0x63AD, 0xD56D, 0x63AE, 0xD57A, 0x63AF, 0xD576, 0x63B0, 0xD954,
00953     0x63B1, 0xD953, 0x63BD, 0xD56B, 0x63BE, 0xD964, 0x63C0, 0xB47A,
00954     0x63C2, 0xD96A, 0x63C3, 0xD959, 0x63C4, 0xD967, 0x63C5, 0xDD77,
00955     0x63C6, 0xB47D, 0x63C7, 0xD96B, 0x63C8, 0xD96E, 0x63C9, 0xB47C,
00956     0x63CA, 0xD95C, 0x63CB, 0xD96D, 0x63CC, 0xD96C, 0x63CD, 0xB47E,
00957     0x63CE, 0xD955, 0x63CF, 0xB479, 0x63D0, 0xB4A3, 0x63D2, 0xB4A1,
00958     0x63D3, 0xD969, 0x63D5, 0xD95F, 0x63D6, 0xB4A5, 0x63D7, 0xD970,
00959     0x63D8, 0xD968, 0x63D9, 0xD971, 0x63DA, 0xB4AD, 0x63DB, 0xB4AB,
00960     0x63DC, 0xD966, 0x63DD, 0xD965, 0x63DF, 0xD963, 0x63E0, 0xD95D,
00961     0x63E1, 0xB4A4, 0x63E3, 0xB4A2, 0x63E4, 0xD1B9, 0x63E5, 0xD956,
00962     0x63E7, 0xDDB7, 0x63E8, 0xD957, 0x63E9, 0xB47B, 0x63EA, 0xB4AA,
00963     0x63EB, 0xDD79, 0x63ED, 0xB4A6, 0x63EE, 0xB4A7, 0x63EF, 0xD958,
00964     0x63F0, 0xD96F, 0x63F1, 0xDD78, 0x63F2, 0xD960, 0x63F3, 0xD95B,
00965     0x63F4, 0xB4A9, 0x63F5, 0xD961, 0x63F6, 0xD95E, 0x63F9, 0xB4AE,
00966     0x6406, 0xB770, 0x6409, 0xDD7C, 0x640A, 0xDDB1, 0x640B, 0xDDB6,
00967     0x640C, 0xDDAA, 0x640D, 0xB76C, 0x640E, 0xDDBB, 0x640F, 0xB769,
00968     0x6410, 0xDD7A, 0x6412, 0xDD7B, 0x6413, 0xB762, 0x6414, 0xB76B,
00969     0x6415, 0xDDA4, 0x6416, 0xB76E, 0x6417, 0xB76F, 0x6418, 0xDDA5,
00970     0x641A, 0xDDB2, 0x641B, 0xDDB8, 0x641C, 0xB76A, 0x641E, 0xB764,
00971     0x641F, 0xDDA3, 0x6420, 0xDD7D, 0x6421, 0xDDBA, 0x6422, 0xDDA8,
00972     0x6423, 0xDDA9, 0x6424, 0xDD7E, 0x6425, 0xDDB4, 0x6426, 0xDDAB,
00973     0x6427, 0xDDB5, 0x6428, 0xDDAD, 0x642A, 0xB765, 0x642B, 0xE1D9,
00974     0x642C, 0xB768, 0x642D, 0xB766, 0x642E, 0xDDB9, 0x642F, 0xDDB0,
00975     0x6430, 0xDDAC, 0x6433, 0xDDA1, 0x6434, 0xBA53, 0x6435, 0xDDAF,
00976     0x6436, 0xB76D, 0x6437, 0xDDA7, 0x6439, 0xDDA6, 0x643D, 0xB767,
00977     0x643E, 0xB763, 0x643F, 0xE1EE, 0x6440, 0xDDB3, 0x6441, 0xDDAE,
00978     0x6443, 0xDDA2, 0x644B, 0xE1E9, 0x644D, 0xE1DA, 0x644E, 0xE1E5,
00979     0x6450, 0xE1EC, 0x6451, 0xBA51, 0x6452, 0xB4AC, 0x6453, 0xE1EA,
00980     0x6454, 0xBA4C, 0x6458, 0xBA4B, 0x6459, 0xE1F1, 0x645B, 0xE1DB,
00981     0x645C, 0xE1E8, 0x645D, 0xE1DC, 0x645E, 0xE1E7, 0x645F, 0xBA4F,
00982     0x6460, 0xE1EB, 0x6461, 0xD962, 0x6465, 0xE1F2, 0x6466, 0xE1E3,
00983     0x6467, 0xBA52, 0x6468, 0xE5BA, 0x6469, 0xBCAF, 0x646B, 0xE1F0,
00984     0x646C, 0xE1EF, 0x646D, 0xBA54, 0x646E, 0xE5AD, 0x646F, 0xBCB0,
00985     0x6470, 0xE5AE, 0x6472, 0xE1DF, 0x6473, 0xE1E0, 0x6474, 0xE1DD,
00986     0x6475, 0xE1E2, 0x6476, 0xE1DE, 0x6477, 0xE1F3, 0x6478, 0xBA4E,
00987     0x6479, 0xBCB1, 0x647A, 0xBA50, 0x647B, 0xBA55, 0x647D, 0xE1E1,
00988     0x647F, 0xE1ED, 0x6482, 0xE1E6, 0x6485, 0xE5B1, 0x6487, 0xBA4A,
00989     0x6488, 0xBCB4, 0x6489, 0xE9AA, 0x648A, 0xE5B6, 0x648B, 0xE5B5,
00990     0x648C, 0xE5B7, 0x648F, 0xE5B4, 0x6490, 0xBCB5, 0x6492, 0xBCBB,
00991     0x6493, 0xBCB8, 0x6495, 0xBCB9, 0x6496, 0xE5AF, 0x6497, 0xE5B2,
00992     0x6498, 0xE5BC, 0x6499, 0xBCC1, 0x649A, 0xBCBF, 0x649C, 0xE5B3,
00993     0x649D, 0xD95A, 0x649E, 0xBCB2, 0x649F, 0xE5B9, 0x64A0, 0xE5B0,
00994     0x64A2, 0xBCC2, 0x64A3, 0xE5B8, 0x64A4, 0xBA4D, 0x64A5, 0xBCB7,
00995     0x64A6, 0xE1E4, 0x64A9, 0xBCBA, 0x64AB, 0xBCBE, 0x64AC, 0xBCC0,
00996     0x64AD, 0xBCBD, 0x64AE, 0xBCBC, 0x64B0, 0xBCB6, 0x64B1, 0xE5BB,
00997     0x64B2, 0xBCB3, 0x64B3, 0xBCC3, 0x64BB, 0xBED8, 0x64BC, 0xBED9,
00998     0x64BD, 0xE9A9, 0x64BE, 0xBEE2, 0x64BF, 0xBEDF, 0x64C1, 0xBED6,
00999     0x64C2, 0xBEDD, 0x64C3, 0xE9AB, 0x64C4, 0xBEDB, 0x64C5, 0xBED5,
01000     0x64C7, 0xBEDC, 0x64C9, 0xE9A8, 0x64CA, 0xC0BB, 0x64CB, 0xBED7,
01001     0x64CD, 0xBEDE, 0x64CE, 0xC0BA, 0x64CF, 0xE9A7, 0x64D0, 0xE9A6,
01002     0x64D2, 0xBEE0, 0x64D4, 0xBEE1, 0x64D6, 0xE9A5, 0x64D7, 0xE9A4,
01003     0x64D8, 0xC0BC, 0x64D9, 0xE9AE, 0x64DA, 0xBEDA, 0x64DB, 0xE9AC,
01004     0x64E0, 0xC0BD, 0x64E2, 0xC0C2, 0x64E3, 0xECEA, 0x64E4, 0xECEC,
01005     0x64E6, 0xC0BF, 0x64E8, 0xECED, 0x64E9, 0xECE9, 0x64EB, 0xECEB,
01006     0x64EC, 0xC0C0, 0x64ED, 0xC0C3, 0x64EF, 0xECE8, 0x64F0, 0xC0BE,
01007     0x64F1, 0xC0C1, 0x64F2, 0xC259, 0x64F3, 0xE9AD, 0x64F4, 0xC258,
01008     0x64F7, 0xC25E, 0x64F8, 0xEFD4, 0x64FA, 0xC25C, 0x64FB, 0xC25D,
01009     0x64FC, 0xEFD7, 0x64FD, 0xEFD3, 0x64FE, 0xC25A, 0x64FF, 0xEFD1,
01010     0x6500, 0xC36B, 0x6501, 0xEFD5, 0x6503, 0xEFD6, 0x6504, 0xEFD2,
01011     0x6506, 0xC25B, 0x6507, 0xF242, 0x6509, 0xF245, 0x650C, 0xF246,
01012     0x650D, 0xF244, 0x650E, 0xF247, 0x650F, 0xC36C, 0x6510, 0xF243,
01013     0x6513, 0xF44E, 0x6514, 0xC464, 0x6515, 0xF44D, 0x6516, 0xF44C,
01014     0x6517, 0xF44B, 0x6518, 0xC463, 0x6519, 0xC465, 0x651B, 0xF5CD,
01015     0x651C, 0xC4E2, 0x651D, 0xC4E1, 0x6520, 0xF6E1, 0x6521, 0xF6E0,
01016     0x6522, 0xF6E3, 0x6523, 0xC5CB, 0x6524, 0xC575, 0x6525, 0xF7DD,
01017     0x6526, 0xF6E2, 0x6529, 0xF7DC, 0x652A, 0xC5CD, 0x652B, 0xC5CC,
01018     0x652C, 0xC5F3, 0x652D, 0xF8A9, 0x652E, 0xF8EF, 0x652F, 0xA4E4,
01019     0x6532, 0xD972, 0x6533, 0xE9AF, 0x6536, 0xA6AC, 0x6537, 0xCAF7,
01020     0x6538, 0xA7F1, 0x6539, 0xA7EF, 0x653B, 0xA7F0, 0x653D, 0xCCC1,
01021     0x653E, 0xA9F1, 0x653F, 0xAC46, 0x6541, 0xCEE7, 0x6543, 0xCEE8,
01022     0x6545, 0xAC47, 0x6546, 0xD1CE, 0x6548, 0xAEC4, 0x6549, 0xAEC5,
01023     0x654A, 0xD1CD, 0x654F, 0xB1D3, 0x6551, 0xB1CF, 0x6553, 0xD5A7,
01024     0x6554, 0xB1D6, 0x6555, 0xB1D5, 0x6556, 0xB1CE, 0x6557, 0xB1D1,
01025     0x6558, 0xB1D4, 0x6559, 0xB1D0, 0x655C, 0xD976, 0x655D, 0xB1CD,
01026     0x655E, 0xB4AF, 0x6562, 0xB4B1, 0x6563, 0xB4B2, 0x6564, 0xD975,
01027     0x6565, 0xD978, 0x6566, 0xB4B0, 0x6567, 0xD973, 0x6568, 0xD977,
01028     0x656A, 0xD974, 0x656C, 0xB771, 0x656F, 0xDDBC, 0x6572, 0xBA56,
01029     0x6573, 0xE1F4, 0x6574, 0xBEE3, 0x6575, 0xBCC4, 0x6576, 0xE5BD,
01030     0x6577, 0xBCC5, 0x6578, 0xBCC6, 0x6579, 0xE5BF, 0x657A, 0xE5BE,
01031     0x657B, 0xE5C0, 0x657C, 0xE9B1, 0x657F, 0xE9B0, 0x6580, 0xECEF,
01032     0x6581, 0xECEE, 0x6582, 0xC0C4, 0x6583, 0xC0C5, 0x6584, 0xF248,
01033     0x6587, 0xA4E5, 0x658C, 0xD979, 0x6590, 0xB4B4, 0x6591, 0xB4B3,
01034     0x6592, 0xDDBD, 0x6594, 0xEFD8, 0x6595, 0xC4E3, 0x6596, 0xF7DE,
01035     0x6597, 0xA4E6, 0x6599, 0xAEC6, 0x659B, 0xB1D8, 0x659C, 0xB1D7,
01036     0x659D, 0xD97A, 0x659E, 0xD97B, 0x659F, 0xB772, 0x65A0, 0xE1F5,
01037     0x65A1, 0xBA57, 0x65A2, 0xE9B2, 0x65A4, 0xA4E7, 0x65A5, 0xA5B8,
01038     0x65A7, 0xA9F2, 0x65A8, 0xCCC2, 0x65AA, 0xCEE9, 0x65AB, 0xAC48,
01039     0x65AC, 0xB1D9, 0x65AE, 0xD97C, 0x65AF, 0xB4B5, 0x65B0, 0xB773,
01040     0x65B2, 0xE5C1, 0x65B3, 0xE5C2, 0x65B6, 0xECF0, 0x65B7, 0xC25F,
01041     0x65B8, 0xF8F0, 0x65B9, 0xA4E8, 0x65BB, 0xCCC3, 0x65BC, 0xA9F3,
01042     0x65BD, 0xAC49, 0x65BF, 0xCEEA, 0x65C1, 0xAEC7, 0x65C2, 0xD1D2,
01043     0x65C3, 0xD1D0, 0x65C4, 0xD1D1, 0x65C5, 0xAEC8, 0x65C6, 0xD1CF,
01044     0x65CB, 0xB1DB, 0x65CC, 0xB1DC, 0x65CD, 0xD5A8, 0x65CE, 0xB1DD,
01045     0x65CF, 0xB1DA, 0x65D0, 0xD97D, 0x65D2, 0xD97E, 0x65D3, 0xDDBE,
01046     0x65D6, 0xBA59, 0x65D7, 0xBA58, 0x65DA, 0xECF1, 0x65DB, 0xEFD9,
01047     0x65DD, 0xF24A, 0x65DE, 0xF249, 0x65DF, 0xF44F, 0x65E1, 0xC95E,
01048     0x65E2, 0xAC4A, 0x65E5, 0xA4E9, 0x65E6, 0xA5B9, 0x65E8, 0xA6AE,
01049     0x65E9, 0xA6AD, 0x65EC, 0xA6AF, 0x65ED, 0xA6B0, 0x65EE, 0xC9EE,
01050     0x65EF, 0xC9ED, 0x65F0, 0xCAF8, 0x65F1, 0xA7F2, 0x65F2, 0xCAFB,
01051     0x65F3, 0xCAFA, 0x65F4, 0xCAF9, 0x65F5, 0xCAFC, 0x65FA, 0xA9F4,
01052     0x65FB, 0xCCC9, 0x65FC, 0xCCC5, 0x65FD, 0xCCCE, 0x6600, 0xA9FB,
01053     0x6602, 0xA9F9, 0x6603, 0xCCCA, 0x6604, 0xCCC6, 0x6605, 0xCCCD,
01054     0x6606, 0xA9F8, 0x6607, 0xAA40, 0x6608, 0xCCC8, 0x6609, 0xCCC4,
01055     0x660A, 0xA9FE, 0x660B, 0xCCCB, 0x660C, 0xA9F7, 0x660D, 0xCCCC,
01056     0x660E, 0xA9FA, 0x660F, 0xA9FC, 0x6610, 0xCCD0, 0x6611, 0xCCCF,
01057     0x6612, 0xCCC7, 0x6613, 0xA9F6, 0x6614, 0xA9F5, 0x6615, 0xA9FD,
01058     0x661C, 0xCEEF, 0x661D, 0xCEF5, 0x661F, 0xAC50, 0x6620, 0xAC4D,
01059     0x6621, 0xCEEC, 0x6622, 0xCEF1, 0x6624, 0xAC53, 0x6625, 0xAC4B,
01060     0x6626, 0xCEF0, 0x6627, 0xAC4E, 0x6628, 0xAC51, 0x662B, 0xCEF3,
01061     0x662D, 0xAC4C, 0x662E, 0xCEF8, 0x662F, 0xAC4F, 0x6631, 0xAC52,
01062     0x6632, 0xCEED, 0x6633, 0xCEF2, 0x6634, 0xCEF6, 0x6635, 0xCEEE,
01063     0x6636, 0xCEEB, 0x6639, 0xCEF7, 0x663A, 0xCEF4, 0x6641, 0xAED0,
01064     0x6642, 0xAEC9, 0x6643, 0xAECC, 0x6645, 0xAECF, 0x6647, 0xD1D5,
01065     0x6649, 0xAECA, 0x664A, 0xD1D3, 0x664C, 0xAECE, 0x664F, 0xAECB,
01066     0x6651, 0xD1D6, 0x6652, 0xAECD, 0x6659, 0xD5AC, 0x665A, 0xB1DF,
01067     0x665B, 0xD5AB, 0x665C, 0xD5AD, 0x665D, 0xB1DE, 0x665E, 0xB1E3,
01068     0x665F, 0xD1D4, 0x6661, 0xD5AA, 0x6662, 0xD5AE, 0x6664, 0xB1E0,
01069     0x6665, 0xD5A9, 0x6666, 0xB1E2, 0x6668, 0xB1E1, 0x666A, 0xD9A7,
01070     0x666C, 0xD9A2, 0x666E, 0xB4B6, 0x666F, 0xB4BA, 0x6670, 0xB4B7,
01071     0x6671, 0xD9A5, 0x6672, 0xD9A8, 0x6674, 0xB4B8, 0x6676, 0xB4B9,
01072     0x6677, 0xB4BE, 0x6678, 0xDDC7, 0x6679, 0xD9A6, 0x667A, 0xB4BC,
01073     0x667B, 0xD9A3, 0x667C, 0xD9A1, 0x667E, 0xB4BD, 0x6680, 0xD9A4,
01074     0x6684, 0xB779, 0x6686, 0xDDBF, 0x6687, 0xB776, 0x6688, 0xB777,
01075     0x6689, 0xB775, 0x668A, 0xDDC4, 0x668B, 0xDDC3, 0x668C, 0xDDC0,
01076     0x668D, 0xB77B, 0x6690, 0xDDC2, 0x6691, 0xB4BB, 0x6694, 0xDDC6,
01077     0x6695, 0xDDC1, 0x6696, 0xB778, 0x6697, 0xB774, 0x6698, 0xB77A,
01078     0x6699, 0xDDC5, 0x669D, 0xBA5C, 0x669F, 0xE1F8, 0x66A0, 0xE1F7,
01079     0x66A1, 0xE1F6, 0x66A2, 0xBA5A, 0x66A8, 0xBA5B, 0x66A9, 0xE5C5,
01080     0x66AA, 0xE5C8, 0x66AB, 0xBCC8, 0x66AE, 0xBCC7, 0x66AF, 0xE5C9,
01081     0x66B0, 0xE5C4, 0x66B1, 0xBCCA, 0x66B2, 0xE5C6, 0x66B4, 0xBCC9,
01082     0x66B5, 0xE5C3, 0x66B7, 0xE5C7, 0x66B8, 0xBEE9, 0x66B9, 0xBEE6,
01083     0x66BA, 0xE9BB, 0x66BB, 0xE9BA, 0x66BD, 0xE9B9, 0x66BE, 0xE9B4,
01084     0x66C0, 0xE9B5, 0x66C4, 0xBEE7, 0x66C6, 0xBEE4, 0x66C7, 0xBEE8,
01085     0x66C8, 0xE9B3, 0x66C9, 0xBEE5, 0x66CA, 0xE9B6, 0x66CB, 0xE9B7,
01086     0x66CC, 0xE9BC, 0x66CF, 0xE9B8, 0x66D2, 0xECF2, 0x66D6, 0xC0C7,
01087     0x66D8, 0xEFDC, 0x66D9, 0xC0C6, 0x66DA, 0xEFDA, 0x66DB, 0xEFDB,
01088     0x66DC, 0xC260, 0x66DD, 0xC36E, 0x66DE, 0xF24B, 0x66E0, 0xC36D,
01089     0x66E3, 0xF451, 0x66E4, 0xF452, 0x66E6, 0xC466, 0x66E8, 0xF450,
01090     0x66E9, 0xC4E4, 0x66EB, 0xF7DF, 0x66EC, 0xC5CE, 0x66ED, 0xF8AA,
01091     0x66EE, 0xF8AB, 0x66F0, 0xA4EA, 0x66F2, 0xA6B1, 0x66F3, 0xA6B2,
01092     0x66F4, 0xA7F3, 0x66F6, 0xCCD1, 0x66F7, 0xAC54, 0x66F8, 0xAED1,
01093     0x66F9, 0xB1E4, 0x66FC, 0xB0D2, 0x66FE, 0xB4BF, 0x66FF, 0xB4C0,
01094     0x6700, 0xB3CC, 0x6701, 0xD9A9, 0x6703, 0xB77C, 0x6704, 0xE1FA,
01095     0x6705, 0xE1F9, 0x6708, 0xA4EB, 0x6709, 0xA6B3, 0x670A, 0xCCD2,
01096     0x670B, 0xAA42, 0x670D, 0xAA41, 0x670F, 0xCEF9, 0x6710, 0xCEFA,
01097     0x6712, 0xD1D7, 0x6713, 0xD1D8, 0x6714, 0xAED2, 0x6715, 0xAED3,
01098     0x6717, 0xAED4, 0x6718, 0xD5AF, 0x671B, 0xB1E6, 0x671D, 0xB4C2,
01099     0x671F, 0xB4C1, 0x6720, 0xDDC8, 0x6721, 0xDF7A, 0x6722, 0xE1FB,
01100     0x6723, 0xE9BD, 0x6726, 0xC261, 0x6727, 0xC467, 0x6728, 0xA4EC,
01101     0x672A, 0xA5BC, 0x672B, 0xA5BD, 0x672C, 0xA5BB, 0x672D, 0xA5BE,
01102     0x672E, 0xA5BA, 0x6731, 0xA6B6, 0x6733, 0xC9F6, 0x6734, 0xA6B5,
01103     0x6735, 0xA6B7, 0x6738, 0xC9F1, 0x6739, 0xC9F0, 0x673A, 0xC9F3,
01104     0x673B, 0xC9F2, 0x673C, 0xC9F5, 0x673D, 0xA6B4, 0x673E, 0xC9EF,
01105     0x673F, 0xC9F4, 0x6745, 0xCAFD, 0x6746, 0xA7FD, 0x6747, 0xCAFE,
01106     0x6748, 0xCB43, 0x6749, 0xA7FC, 0x674B, 0xCB47, 0x674C, 0xCB42,
01107     0x674D, 0xCB45, 0x674E, 0xA7F5, 0x674F, 0xA7F6, 0x6750, 0xA7F7,
01108     0x6751, 0xA7F8, 0x6753, 0xA840, 0x6755, 0xCB41, 0x6756, 0xA7FA,
01109     0x6757, 0xA841, 0x6759, 0xCB40, 0x675A, 0xCB46, 0x675C, 0xA7F9,
01110     0x675D, 0xCB44, 0x675E, 0xA7FB, 0x675F, 0xA7F4, 0x6760, 0xA7FE,
01111     0x676A, 0xAA57, 0x676C, 0xCCD4, 0x676D, 0xAA43, 0x676F, 0xAA4D,
01112     0x6770, 0xAA4E, 0x6771, 0xAA46, 0x6772, 0xAA58, 0x6773, 0xAA48,
01113     0x6774, 0xCCDC, 0x6775, 0xAA53, 0x6776, 0xCCD7, 0x6777, 0xAA49,
01114     0x6778, 0xCCE6, 0x6779, 0xCCE7, 0x677A, 0xCCDF, 0x677B, 0xCCD8,
01115     0x677C, 0xAA56, 0x677D, 0xCCE4, 0x677E, 0xAA51, 0x677F, 0xAA4F,
01116     0x6781, 0xCCE5, 0x6783, 0xCCE3, 0x6784, 0xCCDB, 0x6785, 0xCCD3,
01117     0x6786, 0xCCDA, 0x6787, 0xAA4A, 0x6789, 0xAA50, 0x678B, 0xAA44,
01118     0x678C, 0xCCDE, 0x678D, 0xCCDD, 0x678E, 0xCCD5, 0x6790, 0xAA52,
01119     0x6791, 0xCCE1, 0x6792, 0xCCD6, 0x6793, 0xAA55, 0x6794, 0xCCE8,
01120     0x6795, 0xAA45, 0x6797, 0xAA4C, 0x6798, 0xCCD9, 0x6799, 0xCCE2,
01121     0x679A, 0xAA54, 0x679C, 0xAA47, 0x679D, 0xAA4B, 0x679F, 0xCCE0,
01122     0x67AE, 0xCF5B, 0x67AF, 0xAC5C, 0x67B0, 0xAC69, 0x67B2, 0xCF56,
01123     0x67B3, 0xCF4C, 0x67B4, 0xAC62, 0x67B5, 0xCF4A, 0x67B6, 0xAC5B,
01124     0x67B7, 0xCF45, 0x67B8, 0xAC65, 0x67B9, 0xCF52, 0x67BA, 0xCEFE,
01125     0x67BB, 0xCF41, 0x67C0, 0xCF44, 0x67C1, 0xCEFB, 0x67C2, 0xCF51,
01126     0x67C3, 0xCF61, 0x67C4, 0xAC60, 0x67C5, 0xCF46, 0x67C6, 0xCF58,
01127     0x67C8, 0xCEFD, 0x67C9, 0xCF5F, 0x67CA, 0xCF60, 0x67CB, 0xCF63,
01128     0x67CC, 0xCF5A, 0x67CD, 0xCF4B, 0x67CE, 0xCF53, 0x67CF, 0xAC66,
01129     0x67D0, 0xAC59, 0x67D1, 0xAC61, 0x67D2, 0xAC6D, 0x67D3, 0xAC56,
01130     0x67D4, 0xAC58, 0x67D8, 0xCF43, 0x67D9, 0xAC6A, 0x67DA, 0xAC63,
01131     0x67DB, 0xCF5D, 0x67DC, 0xCF40, 0x67DD, 0xAC6C, 0x67DE, 0xAC67,
01132     0x67DF, 0xCF49, 0x67E2, 0xAC6B, 0x67E3, 0xCF50, 0x67E4, 0xCF48,
01133     0x67E5, 0xAC64, 0x67E6, 0xCF5C, 0x67E7, 0xCF54, 0x67E9, 0xAC5E,
01134     0x67EA, 0xCF62, 0x67EB, 0xCF47, 0x67EC, 0xAC5A, 0x67ED, 0xCF59,
01135     0x67EE, 0xCF4F, 0x67EF, 0xAC5F, 0x67F0, 0xCF55, 0x67F1, 0xAC57,
01136     0x67F2, 0xCEFC, 0x67F3, 0xAC68, 0x67F4, 0xAEE3, 0x67F5, 0xAC5D,
01137     0x67F6, 0xCF4E, 0x67F7, 0xCF4D, 0x67F8, 0xCF42, 0x67FA, 0xCF5E,
01138     0x67FC, 0xCF57, 0x67FF, 0xAC55, 0x6812, 0xD1EC, 0x6813, 0xAEEA,
01139     0x6814, 0xD1ED, 0x6816, 0xD1E1, 0x6817, 0xAEDF, 0x6818, 0xAEEB,
01140     0x681A, 0xD1DA, 0x681C, 0xD1E3, 0x681D, 0xD1EB, 0x681F, 0xD1D9,
01141     0x6820, 0xD1F4, 0x6821, 0xAED5, 0x6825, 0xD1F3, 0x6826, 0xD1EE,
01142     0x6828, 0xD1EF, 0x6829, 0xAEDD, 0x682A, 0xAEE8, 0x682B, 0xD1E5,
01143     0x682D, 0xD1E6, 0x682E, 0xD1F0, 0x682F, 0xD1E7, 0x6831, 0xD1E2,
01144     0x6832, 0xD1DC, 0x6833, 0xD1DD, 0x6834, 0xD1EA, 0x6835, 0xD1E4,
01145     0x6838, 0xAED6, 0x6839, 0xAEDA, 0x683A, 0xD1F2, 0x683B, 0xD1DE,
01146     0x683C, 0xAEE6, 0x683D, 0xAEE2, 0x6840, 0xAEE5, 0x6841, 0xAEEC,
01147     0x6842, 0xAEDB, 0x6843, 0xAEE7, 0x6844, 0xD1E9, 0x6845, 0xAEE9,
01148     0x6846, 0xAED8, 0x6848, 0xAED7, 0x6849, 0xD1DB, 0x684B, 0xD1DF,
01149     0x684C, 0xAEE0, 0x684D, 0xD1F1, 0x684E, 0xD1E8, 0x684F, 0xD1E0,
01150     0x6850, 0xAEE4, 0x6851, 0xAEE1, 0x6853, 0xAED9, 0x6854, 0xAEDC,
01151     0x686B, 0xD5C4, 0x686D, 0xD5B4, 0x686E, 0xD5B5, 0x686F, 0xD5B9,
01152     0x6871, 0xD5C8, 0x6872, 0xD5C5, 0x6874, 0xD5BE, 0x6875, 0xD5BD,
01153     0x6876, 0xB1ED, 0x6877, 0xD5C1, 0x6878, 0xD5D0, 0x6879, 0xD5B0,
01154     0x687B, 0xD5D1, 0x687C, 0xD5C3, 0x687D, 0xD5D5, 0x687E, 0xD5C9,
01155     0x687F, 0xB1EC, 0x6880, 0xD5C7, 0x6881, 0xB1E7, 0x6882, 0xB1FC,
01156     0x6883, 0xB1F2, 0x6885, 0xB1F6, 0x6886, 0xB1F5, 0x6887, 0xD5B1,
01157     0x6889, 0xD5CE, 0x688A, 0xD5D4, 0x688B, 0xD5CC, 0x688C, 0xD5D3,
01158     0x688F, 0xD5C0, 0x6890, 0xD5B2, 0x6891, 0xD5D2, 0x6892, 0xD5C2,
01159     0x6893, 0xB1EA, 0x6894, 0xB1F7, 0x6896, 0xD5CB, 0x6897, 0xB1F0,
01160     0x689B, 0xD5CA, 0x689C, 0xD5B3, 0x689D, 0xB1F8, 0x689F, 0xB1FA,
01161     0x68A0, 0xD5CD, 0x68A1, 0xB1FB, 0x68A2, 0xB1E9, 0x68A3, 0xD5BA,
01162     0x68A4, 0xD5CF, 0x68A7, 0xB1EF, 0x68A8, 0xB1F9, 0x68A9, 0xD5BC,
01163     0x68AA, 0xD5C6, 0x68AB, 0xD5B7, 0x68AC, 0xD5BB, 0x68AD, 0xB1F4,
01164     0x68AE, 0xD5B6, 0x68AF, 0xB1E8, 0x68B0, 0xB1F1, 0x68B1, 0xB1EE,
01165     0x68B2, 0xD5BF, 0x68B3, 0xAEDE, 0x68B4, 0xD9C0, 0x68B5, 0xB1EB,
01166     0x68C4, 0xB1F3, 0x68C6, 0xD9C3, 0x68C7, 0xD9D9, 0x68C8, 0xD9CE,
01167     0x68C9, 0xB4D6, 0x68CB, 0xB4D1, 0x68CC, 0xD9BD, 0x68CD, 0xB4D2,
01168     0x68CE, 0xD9CD, 0x68D0, 0xD9C6, 0x68D1, 0xD9D3, 0x68D2, 0xB4CE,
01169     0x68D3, 0xD9AB, 0x68D4, 0xD9D5, 0x68D5, 0xB4C4, 0x68D6, 0xD9B3,
01170     0x68D7, 0xB4C7, 0x68D8, 0xB4C6, 0x68DA, 0xB4D7, 0x68DC, 0xD9AD,
01171     0x68DD, 0xD9CF, 0x68DE, 0xD9D0, 0x68DF, 0xB4C9, 0x68E0, 0xB4C5,
01172     0x68E1, 0xD9BB, 0x68E3, 0xB4D0, 0x68E4, 0xD9B6, 0x68E6, 0xD9D1,
01173     0x68E7, 0xB4CC, 0x68E8, 0xD9C9, 0x68E9, 0xD9D6, 0x68EA, 0xD9B0,
01174     0x68EB, 0xD9B5, 0x68EC, 0xD9AF, 0x68EE, 0xB4CB, 0x68EF, 0xD9C2,
01175     0x68F0, 0xDDDE, 0x68F1, 0xD9B1, 0x68F2, 0xB4CF, 0x68F3, 0xD9BA,
01176     0x68F4, 0xD9D2, 0x68F5, 0xB4CA, 0x68F6, 0xD9B7, 0x68F7, 0xD9B4,
01177     0x68F8, 0xD9C5, 0x68F9, 0xB4CD, 0x68FA, 0xB4C3, 0x68FB, 0xB4D9,
01178     0x68FC, 0xD9C8, 0x68FD, 0xD9C7, 0x6904, 0xD9AC, 0x6905, 0xB4C8,
01179     0x6906, 0xD9D4, 0x6907, 0xD9BC, 0x6908, 0xD9BE, 0x690A, 0xD9CB,
01180     0x690B, 0xD9CA, 0x690C, 0xD9AA, 0x690D, 0xB4D3, 0x690E, 0xB4D5,
01181     0x690F, 0xD9B2, 0x6910, 0xD9B9, 0x6911, 0xD9C1, 0x6912, 0xB4D4,
01182     0x6913, 0xD9B8, 0x6914, 0xD9C4, 0x6915, 0xD9D7, 0x6917, 0xD9CC,
01183     0x6925, 0xD9D8, 0x692A, 0xD9AE, 0x692F, 0xDDF2, 0x6930, 0xB7A6,
01184     0x6932, 0xDDF0, 0x6933, 0xDDDB, 0x6934, 0xDDE0, 0x6935, 0xDDD9,
01185     0x6937, 0xDDEC, 0x6938, 0xDDCB, 0x6939, 0xDDD2, 0x693B, 0xDDEA,
01186     0x693C, 0xDDF4, 0x693D, 0xDDDC, 0x693F, 0xDDCF, 0x6940, 0xDDE2,
01187     0x6941, 0xDDE7, 0x6942, 0xDDD3, 0x6944, 0xDDE4, 0x6945, 0xDDD0,
01188     0x6948, 0xDDD7, 0x6949, 0xDDD8, 0x694A, 0xB7A8, 0x694B, 0xDDEB,
01189     0x694C, 0xDDE9, 0x694E, 0xDDCC, 0x694F, 0xDDEE, 0x6951, 0xDDEF,
01190     0x6952, 0xDDF1, 0x6953, 0xB7AC, 0x6954, 0xB7A4, 0x6956, 0xD5B8,
01191     0x6957, 0xDDD4, 0x6958, 0xDDE6, 0x6959, 0xDDD5, 0x695A, 0xB7A1,
01192     0x695B, 0xB7B1, 0x695C, 0xDDED, 0x695D, 0xB7AF, 0x695E, 0xB7AB,
01193     0x695F, 0xDDCA, 0x6960, 0xB7A3, 0x6962, 0xDDCD, 0x6963, 0xB7B0,
01194     0x6965, 0xDDDD, 0x6966, 0xDDC9, 0x6968, 0xB7A9, 0x6969, 0xDDE1,
01195     0x696A, 0xDDD1, 0x696B, 0xB7AA, 0x696C, 0xDDDA, 0x696D, 0xB77E,
01196     0x696E, 0xB4D8, 0x696F, 0xDDE3, 0x6970, 0xD9BF, 0x6971, 0xDDCE,
01197     0x6974, 0xDDE8, 0x6975, 0xB7A5, 0x6976, 0xDDE5, 0x6977, 0xB7A2,
01198     0x6978, 0xDDDF, 0x6979, 0xB7AD, 0x697A, 0xDDD6, 0x697B, 0xDDF3,
01199     0x6982, 0xB7A7, 0x6983, 0xDEC6, 0x6986, 0xB7AE, 0x698D, 0xE24A,
01200     0x698E, 0xE248, 0x6990, 0xE25E, 0x6991, 0xE246, 0x6993, 0xE258,
01201     0x6994, 0xB77D, 0x6995, 0xBA5F, 0x6996, 0xE242, 0x6997, 0xE25D,
01202     0x6999, 0xE247, 0x699A, 0xE255, 0x699B, 0xBA64, 0x699C, 0xBA5D,
01203     0x699E, 0xE25B, 0x69A0, 0xE240, 0x69A1, 0xE25A, 0x69A3, 0xBA6F,
01204     0x69A4, 0xE251, 0x69A5, 0xE261, 0x69A6, 0xBA6D, 0x69A7, 0xE249,
01205     0x69A8, 0xBA5E, 0x69A9, 0xE24B, 0x69AA, 0xE259, 0x69AB, 0xBA67,
01206     0x69AC, 0xE244, 0x69AD, 0xBA6B, 0x69AE, 0xBA61, 0x69AF, 0xE24D,
01207     0x69B0, 0xE243, 0x69B1, 0xE1FC, 0x69B3, 0xE257, 0x69B4, 0xBA68,
01208     0x69B5, 0xE260, 0x69B6, 0xE1FD, 0x69B7, 0xBA65, 0x69B9, 0xE253,
01209     0x69BB, 0xBA66, 0x69BC, 0xE245, 0x69BD, 0xE250, 0x69BE, 0xE24C,
01210     0x69BF, 0xE24E, 0x69C1, 0xBA60, 0x69C2, 0xE25F, 0x69C3, 0xBA6E,
01211     0x69C4, 0xE24F, 0x69C6, 0xE262, 0x69C9, 0xE1FE, 0x69CA, 0xE254,
01212     0x69CB, 0xBA63, 0x69CC, 0xBA6C, 0x69CD, 0xBA6A, 0x69CE, 0xE241,
01213     0x69CF, 0xE256, 0x69D0, 0xBA69, 0x69D3, 0xBA62, 0x69D4, 0xE252,
01214     0x69D9, 0xE25C, 0x69E2, 0xE5D5, 0x69E4, 0xE5D1, 0x69E5, 0xE5CD,
01215     0x69E6, 0xE5E1, 0x69E7, 0xE5DE, 0x69E8, 0xBCCD, 0x69EB, 0xE5E5,
01216     0x69EC, 0xE5D4, 0x69ED, 0xBCD8, 0x69EE, 0xE5DB, 0x69F1, 0xE5D0,
01217     0x69F2, 0xE5DA, 0x69F3, 0xBCD5, 0x69F4, 0xE5EE, 0x69F6, 0xE5EB,
01218     0x69F7, 0xE5DD, 0x69F8, 0xE5CE, 0x69FB, 0xE5E2, 0x69FC, 0xE5E4,
01219     0x69FD, 0xBCD1, 0x69FE, 0xE5D8, 0x69FF, 0xE5D3, 0x6A00, 0xE5CA,
01220     0x6A01, 0xBCCE, 0x6A02, 0xBCD6, 0x6A04, 0xE5E7, 0x6A05, 0xBCD7,
01221     0x6A06, 0xE5CB, 0x6A07, 0xE5ED, 0x6A08, 0xE5E0, 0x6A09, 0xE5E6,
01222     0x6A0A, 0xBCD4, 0x6A0D, 0xE5E3, 0x6A0F, 0xE5EA, 0x6A11, 0xBCD9,
01223     0x6A13, 0xBCD3, 0x6A14, 0xE5DC, 0x6A15, 0xE5CF, 0x6A16, 0xE5EF,
01224     0x6A17, 0xE5CC, 0x6A18, 0xE5E8, 0x6A19, 0xBCD0, 0x6A1B, 0xE5D6,
01225     0x6A1D, 0xE5D7, 0x6A1E, 0xBCCF, 0x6A1F, 0xBCCC, 0x6A20, 0xE5D2,
01226     0x6A21, 0xBCD2, 0x6A23, 0xBCCB, 0x6A25, 0xE5E9, 0x6A26, 0xE5EC,
01227     0x6A27, 0xE5D9, 0x6A28, 0xE9CA, 0x6A32, 0xE9C2, 0x6A34, 0xE9BE,
01228     0x6A35, 0xBEF6, 0x6A38, 0xBEEB, 0x6A39, 0xBEF0, 0x6A3A, 0xBEEC,
01229     0x6A3B, 0xE9CC, 0x6A3C, 0xE9D7, 0x6A3D, 0xBEEA, 0x6A3E, 0xE9C4,
01230     0x6A3F, 0xE9CD, 0x6A40, 0xE5DF, 0x6A41, 0xE9CE, 0x6A44, 0xBEF1,
01231     0x6A46, 0xE9DD, 0x6A47, 0xBEF5, 0x6A48, 0xBEF8, 0x6A49, 0xE9C0,
01232     0x6A4B, 0xBEF4, 0x6A4D, 0xE9DB, 0x6A4E, 0xE9DC, 0x6A4F, 0xE9D2,
01233     0x6A50, 0xE9D1, 0x6A51, 0xE9C9, 0x6A54, 0xE9D3, 0x6A55, 0xE9DA,
01234     0x6A56, 0xE9D9, 0x6A58, 0xBEEF, 0x6A59, 0xBEED, 0x6A5A, 0xE9CB,
01235     0x6A5B, 0xE9C8, 0x6A5D, 0xE9C5, 0x6A5E, 0xE9D8, 0x6A5F, 0xBEF7,
01236     0x6A60, 0xE9D6, 0x6A61, 0xBEF3, 0x6A62, 0xBEF2, 0x6A64, 0xE9D0,
01237     0x6A66, 0xE9BF, 0x6A67, 0xE9C1, 0x6A68, 0xE9C3, 0x6A69, 0xE9D5,
01238     0x6A6A, 0xE9CF, 0x6A6B, 0xBEEE, 0x6A6D, 0xE9C6, 0x6A6F, 0xE9D4,
01239     0x6A76, 0xE9C7, 0x6A7E, 0xC0CF, 0x6A7F, 0xED45, 0x6A80, 0xC0C8,
01240     0x6A81, 0xECF5, 0x6A83, 0xED41, 0x6A84, 0xC0CA, 0x6A85, 0xED48,
01241     0x6A87, 0xECFC, 0x6A89, 0xECF7, 0x6A8C, 0xED49, 0x6A8D, 0xECF3,
01242     0x6A8E, 0xECFE, 0x6A90, 0xC0D1, 0x6A91, 0xED44, 0x6A92, 0xED4A,
01243     0x6A93, 0xECFD, 0x6A94, 0xC0C9, 0x6A95, 0xED40, 0x6A96, 0xECF4,
01244     0x6A97, 0xC0D0, 0x6A9A, 0xED47, 0x6A9B, 0xECF9, 0x6A9C, 0xC0CC,
01245     0x6A9E, 0xECFB, 0x6A9F, 0xECF8, 0x6AA0, 0xC0D2, 0x6AA1, 0xECFA,
01246     0x6AA2, 0xC0CB, 0x6AA3, 0xC0CE, 0x6AA4, 0xED43, 0x6AA5, 0xECF6,
01247     0x6AA6, 0xED46, 0x6AA8, 0xED42, 0x6AAC, 0xC263, 0x6AAD, 0xEFE7,
01248     0x6AAE, 0xC268, 0x6AAF, 0xC269, 0x6AB3, 0xC262, 0x6AB4, 0xEFE6,
01249     0x6AB6, 0xEFE3, 0x6AB7, 0xEFE4, 0x6AB8, 0xC266, 0x6AB9, 0xEFDE,
01250     0x6ABA, 0xEFE2, 0x6ABB, 0xC265, 0x6ABD, 0xEFDF, 0x6AC2, 0xC267,
01251     0x6AC3, 0xC264, 0x6AC5, 0xEFDD, 0x6AC6, 0xEFE1, 0x6AC7, 0xEFE5,
01252     0x6ACB, 0xF251, 0x6ACC, 0xF24E, 0x6ACD, 0xF257, 0x6ACF, 0xF256,
01253     0x6AD0, 0xF254, 0x6AD1, 0xF24F, 0x6AD3, 0xC372, 0x6AD9, 0xF250,
01254     0x6ADA, 0xC371, 0x6ADB, 0xC0CD, 0x6ADC, 0xF253, 0x6ADD, 0xC370,
01255     0x6ADE, 0xF258, 0x6ADF, 0xF252, 0x6AE0, 0xF24D, 0x6AE1, 0xEFE0,
01256     0x6AE5, 0xC36F, 0x6AE7, 0xF24C, 0x6AE8, 0xF456, 0x6AEA, 0xF455,
01257     0x6AEB, 0xF255, 0x6AEC, 0xC468, 0x6AEE, 0xF459, 0x6AEF, 0xF45A,
01258     0x6AF0, 0xF454, 0x6AF1, 0xF458, 0x6AF3, 0xF453, 0x6AF8, 0xF5D1,
01259     0x6AF9, 0xF457, 0x6AFA, 0xC4E7, 0x6AFB, 0xC4E5, 0x6AFC, 0xF5CF,
01260     0x6B00, 0xF5D2, 0x6B02, 0xF5CE, 0x6B03, 0xF5D0, 0x6B04, 0xC4E6,
01261     0x6B08, 0xF6E5, 0x6B09, 0xF6E6, 0x6B0A, 0xC576, 0x6B0B, 0xF6E4,
01262     0x6B0F, 0xF7E2, 0x6B10, 0xC5CF, 0x6B11, 0xF7E0, 0x6B12, 0xF7E1,
01263     0x6B13, 0xF8AC, 0x6B16, 0xC656, 0x6B17, 0xF8F3, 0x6B18, 0xF8F1,
01264     0x6B19, 0xF8F2, 0x6B1A, 0xF8F4, 0x6B1E, 0xF9BB, 0x6B20, 0xA4ED,
01265     0x6B21, 0xA6B8, 0x6B23, 0xAA59, 0x6B25, 0xCCE9, 0x6B28, 0xCF64,
01266     0x6B2C, 0xD1F5, 0x6B2D, 0xD1F7, 0x6B2F, 0xD1F6, 0x6B31, 0xD1F8,
01267     0x6B32, 0xB1FD, 0x6B33, 0xD5D7, 0x6B34, 0xD1F9, 0x6B36, 0xD5D6,
01268     0x6B37, 0xD5D8, 0x6B38, 0xD5D9, 0x6B39, 0xD9DA, 0x6B3A, 0xB4DB,
01269     0x6B3B, 0xD9DB, 0x6B3C, 0xD9DD, 0x6B3D, 0xB4DC, 0x6B3E, 0xB4DA,
01270     0x6B3F, 0xD9DC, 0x6B41, 0xDDFA, 0x6B42, 0xDDF8, 0x6B43, 0xDDF7,
01271     0x6B45, 0xDDF6, 0x6B46, 0xDDF5, 0x6B47, 0xB7B2, 0x6B48, 0xDDF9,
01272     0x6B49, 0xBA70, 0x6B4A, 0xE263, 0x6B4B, 0xE265, 0x6B4C, 0xBA71,
01273     0x6B4D, 0xE264, 0x6B4E, 0xBCDB, 0x6B50, 0xBCDA, 0x6B51, 0xE5F0,
01274     0x6B54, 0xE9DF, 0x6B55, 0xE9DE, 0x6B56, 0xE9E0, 0x6B59, 0xBEF9,
01275     0x6B5B, 0xED4B, 0x6B5C, 0xC0D3, 0x6B5E, 0xEFE8, 0x6B5F, 0xC26A,
01276     0x6B60, 0xF259, 0x6B61, 0xC577, 0x6B62, 0xA4EE, 0x6B63, 0xA5BF,
01277     0x6B64, 0xA6B9, 0x6B65, 0xA842, 0x6B66, 0xAA5A, 0x6B67, 0xAA5B,
01278     0x6B6A, 0xAC6E, 0x6B6D, 0xD1FA, 0x6B72, 0xB7B3, 0x6B76, 0xE6D1,
01279     0x6B77, 0xBEFA, 0x6B78, 0xC26B, 0x6B79, 0xA4EF, 0x6B7B, 0xA6BA,
01280     0x6B7E, 0xCCEB, 0x6B7F, 0xAA5C, 0x6B80, 0xCCEA, 0x6B82, 0xCF65,
01281     0x6B83, 0xAC6F, 0x6B84, 0xCF66, 0x6B86, 0xAC70, 0x6B88, 0xD1FC,
01282     0x6B89, 0xAEEE, 0x6B8A, 0xAEED, 0x6B8C, 0xD5DE, 0x6B8D, 0xD5DC,
01283     0x6B8E, 0xD5DD, 0x6B8F, 0xD5DB, 0x6B91, 0xD5DA, 0x6B94, 0xD9DE,
01284     0x6B95, 0xD9E1, 0x6B96, 0xB4DE, 0x6B97, 0xD9DF, 0x6B98, 0xB4DD,
01285     0x6B99, 0xD9E0, 0x6B9B, 0xDDFB, 0x6B9E, 0xE266, 0x6B9F, 0xE267,
01286     0x6BA0, 0xE268, 0x6BA2, 0xE5F3, 0x6BA3, 0xE5F2, 0x6BA4, 0xBCDC,
01287     0x6BA5, 0xE5F1, 0x6BA6, 0xE5F4, 0x6BA7, 0xE9E1, 0x6BAA, 0xE9E2,
01288     0x6BAB, 0xE9E3, 0x6BAD, 0xED4C, 0x6BAE, 0xC0D4, 0x6BAF, 0xC26C,
01289     0x6BB0, 0xF25A, 0x6BB2, 0xC4E8, 0x6BB3, 0xC95F, 0x6BB5, 0xAC71,
01290     0x6BB6, 0xCF67, 0x6BB7, 0xAEEF, 0x6BBA, 0xB1FE, 0x6BBC, 0xB4DF,
01291     0x6BBD, 0xD9E2, 0x6BBF, 0xB7B5, 0x6BC0, 0xB7B4, 0x6BC3, 0xE269,
01292     0x6BC4, 0xE26A, 0x6BC5, 0xBCDD, 0x6BC6, 0xBCDE, 0x6BC7, 0xE9E5,
01293     0x6BC8, 0xE9E4, 0x6BC9, 0xEFE9, 0x6BCA, 0xF7E3, 0x6BCB, 0xA4F0,
01294     0x6BCC, 0xC960, 0x6BCD, 0xA5C0, 0x6BCF, 0xA843, 0x6BD0, 0xCB48,
01295     0x6BD2, 0xAC72, 0x6BD3, 0xB7B6, 0x6BD4, 0xA4F1, 0x6BD6, 0xCF68,
01296     0x6BD7, 0xAC73, 0x6BD8, 0xCF69, 0x6BDA, 0xC0D5, 0x6BDB, 0xA4F2,
01297     0x6BDE, 0xCCEC, 0x6BE0, 0xCF6A, 0x6BE2, 0xD242, 0x6BE3, 0xD241,
01298     0x6BE4, 0xD1FE, 0x6BE6, 0xD1FD, 0x6BE7, 0xD243, 0x6BE8, 0xD240,
01299     0x6BEB, 0xB240, 0x6BEC, 0xB241, 0x6BEF, 0xB4E0, 0x6BF0, 0xD9E3,
01300     0x6BF2, 0xD9E4, 0x6BF3, 0xD9E5, 0x6BF7, 0xDE41, 0x6BF8, 0xDE42,
01301     0x6BF9, 0xDE40, 0x6BFB, 0xDDFD, 0x6BFC, 0xDDFE, 0x6BFD, 0xB7B7,
01302     0x6BFE, 0xE26B, 0x6BFF, 0xE5F7, 0x6C00, 0xE5F6, 0x6C01, 0xE5F5,
01303     0x6C02, 0xE5F8, 0x6C03, 0xE9E7, 0x6C04, 0xE9E6, 0x6C05, 0xBEFB,
01304     0x6C06, 0xE9E8, 0x6C08, 0xC0D6, 0x6C09, 0xED4D, 0x6C0B, 0xEFEA,
01305     0x6C0C, 0xF25B, 0x6C0D, 0xF6E7, 0x6C0F, 0xA4F3, 0x6C10, 0xA5C2,
01306     0x6C11, 0xA5C1, 0x6C13, 0xAA5D, 0x6C14, 0xC961, 0x6C15, 0xC97E,
01307     0x6C16, 0xA6BB, 0x6C18, 0xC9F7, 0x6C19, 0xCB49, 0x6C1A, 0xCB4A,
01308     0x6C1B, 0xAA5E, 0x6C1D, 0xCCED, 0x6C1F, 0xAC74, 0x6C20, 0xCF6B,
01309     0x6C21, 0xCF6C, 0x6C23, 0xAEF0, 0x6C24, 0xAEF4, 0x6C25, 0xD244,
01310     0x6C26, 0xAEF3, 0x6C27, 0xAEF1, 0x6C28, 0xAEF2, 0x6C2A, 0xD5DF,
01311     0x6C2B, 0xB242, 0x6C2C, 0xB4E3, 0x6C2E, 0xB4E1, 0x6C2F, 0xB4E2,
01312     0x6C30, 0xD9E6, 0x6C33, 0xBA72, 0x6C34, 0xA4F4, 0x6C36, 0xC9A1,
01313     0x6C38, 0xA5C3, 0x6C3B, 0xC9A4, 0x6C3E, 0xA5C6, 0x6C3F, 0xC9A3,
01314     0x6C40, 0xA5C5, 0x6C41, 0xA5C4, 0x6C42, 0xA844, 0x6C43, 0xC9A2,
01315     0x6C46, 0xC9F8, 0x6C4A, 0xC9FC, 0x6C4B, 0xC9FE, 0x6C4C, 0xCA40,
01316     0x6C4D, 0xA6C5, 0x6C4E, 0xA6C6, 0x6C4F, 0xC9FB, 0x6C50, 0xA6C1,
01317     0x6C52, 0xC9F9, 0x6C54, 0xC9FD, 0x6C55, 0xA6C2, 0x6C57, 0xA6BD,
01318     0x6C59, 0xA6BE, 0x6C5B, 0xA6C4, 0x6C5C, 0xC9FA, 0x6C5D, 0xA6BC,
01319     0x6C5E, 0xA845, 0x6C5F, 0xA6BF, 0x6C60, 0xA6C0, 0x6C61, 0xA6C3,
01320     0x6C65, 0xCB5B, 0x6C66, 0xCB59, 0x6C67, 0xCB4C, 0x6C68, 0xA851,
01321     0x6C69, 0xCB53, 0x6C6A, 0xA84C, 0x6C6B, 0xCB4D, 0x6C6D, 0xCB55,
01322     0x6C6F, 0xCB52, 0x6C70, 0xA84F, 0x6C71, 0xCB51, 0x6C72, 0xA856,
01323     0x6C73, 0xCB5A, 0x6C74, 0xA858, 0x6C76, 0xA85A, 0x6C78, 0xCB4B,
01324     0x6C7A, 0xA84D, 0x6C7B, 0xCB5C, 0x6C7D, 0xA854, 0x6C7E, 0xA857,
01325     0x6C80, 0xCD45, 0x6C81, 0xA847, 0x6C82, 0xA85E, 0x6C83, 0xA855,
01326     0x6C84, 0xCB4E, 0x6C85, 0xA84A, 0x6C86, 0xA859, 0x6C87, 0xCB56,
01327     0x6C88, 0xA848, 0x6C89, 0xA849, 0x6C8A, 0xCD43, 0x6C8B, 0xCB4F,
01328     0x6C8C, 0xA850, 0x6C8D, 0xA85B, 0x6C8E, 0xCB5D, 0x6C8F, 0xCB50,
01329     0x6C90, 0xA84E, 0x6C92, 0xA853, 0x6C93, 0xCCEE, 0x6C94, 0xA85C,
01330     0x6C95, 0xCB57, 0x6C96, 0xA852, 0x6C98, 0xA85D, 0x6C99, 0xA846,
01331     0x6C9A, 0xCB54, 0x6C9B, 0xA84B, 0x6C9C, 0xCB58, 0x6C9D, 0xCD44,
01332     0x6CAB, 0xAA6A, 0x6CAC, 0xAA7A, 0x6CAD, 0xCCF5, 0x6CAE, 0xAA71,
01333     0x6CB0, 0xCD4B, 0x6CB1, 0xAA62, 0x6CB3, 0xAA65, 0x6CB4, 0xCD42,
01334     0x6CB6, 0xCCF3, 0x6CB7, 0xCCF7, 0x6CB8, 0xAA6D, 0x6CB9, 0xAA6F,
01335     0x6CBA, 0xCCFA, 0x6CBB, 0xAA76, 0x6CBC, 0xAA68, 0x6CBD, 0xAA66,
01336     0x6CBE, 0xAA67, 0x6CBF, 0xAA75, 0x6CC0, 0xCD47, 0x6CC1, 0xAA70,
01337     0x6CC2, 0xCCF9, 0x6CC3, 0xCCFB, 0x6CC4, 0xAA6E, 0x6CC5, 0xAA73,
01338     0x6CC6, 0xCCFC, 0x6CC7, 0xCD4A, 0x6CC9, 0xAC75, 0x6CCA, 0xAA79,
01339     0x6CCC, 0xAA63, 0x6CCD, 0xCD49, 0x6CCF, 0xCD4D, 0x6CD0, 0xCCF8,
01340     0x6CD1, 0xCD4F, 0x6CD2, 0xCD40, 0x6CD3, 0xAA6C, 0x6CD4, 0xCCF4,
01341     0x6CD5, 0xAA6B, 0x6CD6, 0xAA7D, 0x6CD7, 0xAA72, 0x6CD9, 0xCCF2,
01342     0x6CDA, 0xCF75, 0x6CDB, 0xAA78, 0x6CDC, 0xAA7C, 0x6CDD, 0xCD41,
01343     0x6CDE, 0xCD46, 0x6CE0, 0xAA7E, 0x6CE1, 0xAA77, 0x6CE2, 0xAA69,
01344     0x6CE3, 0xAA5F, 0x6CE5, 0xAA64, 0x6CE7, 0xCCF6, 0x6CE8, 0xAA60,
01345     0x6CE9, 0xCD4E, 0x6CEB, 0xCCF0, 0x6CEC, 0xCCEF, 0x6CED, 0xCCFD,
01346     0x6CEE, 0xCCF1, 0x6CEF, 0xAA7B, 0x6CF0, 0xAEF5, 0x6CF1, 0xAA74,
01347     0x6CF2, 0xCCFE, 0x6CF3, 0xAA61, 0x6CF5, 0xACA6, 0x6CF9, 0xCD4C,
01348     0x6D00, 0xCF7C, 0x6D01, 0xCFA1, 0x6D03, 0xCFA4, 0x6D04, 0xCF77,
01349     0x6D07, 0xCFA7, 0x6D08, 0xCFAA, 0x6D09, 0xCFAC, 0x6D0A, 0xCF74,
01350     0x6D0B, 0xAC76, 0x6D0C, 0xAC7B, 0x6D0D, 0xD249, 0x6D0E, 0xACAD,
01351     0x6D0F, 0xCFA5, 0x6D10, 0xCFAD, 0x6D11, 0xCF7B, 0x6D12, 0xCF73,
01352     0x6D16, 0xD264, 0x6D17, 0xAC7E, 0x6D18, 0xCFA2, 0x6D19, 0xCF78,
01353     0x6D1A, 0xCF7A, 0x6D1B, 0xACA5, 0x6D1D, 0xCF7D, 0x6D1E, 0xAC7D,
01354     0x6D1F, 0xCF70, 0x6D20, 0xCFA8, 0x6D22, 0xCFAB, 0x6D25, 0xAC7A,
01355     0x6D27, 0xACA8, 0x6D28, 0xCF6D, 0x6D29, 0xACAA, 0x6D2A, 0xAC78,
01356     0x6D2B, 0xACAE, 0x6D2C, 0xCFA9, 0x6D2D, 0xCF6F, 0x6D2E, 0xACAB,
01357     0x6D2F, 0xD25E, 0x6D30, 0xCD48, 0x6D31, 0xAC7C, 0x6D32, 0xAC77,
01358     0x6D33, 0xCF76, 0x6D34, 0xCF6E, 0x6D35, 0xACAC, 0x6D36, 0xACA4,
01359     0x6D37, 0xCFA3, 0x6D38, 0xACA9, 0x6D39, 0xACA7, 0x6D3A, 0xCF79,
01360     0x6D3B, 0xACA1, 0x6D3C, 0xCF71, 0x6D3D, 0xACA2, 0x6D3E, 0xACA3,
01361     0x6D3F, 0xCF72, 0x6D40, 0xCFA6, 0x6D41, 0xAC79, 0x6D42, 0xCF7E,
01362     0x6D58, 0xD24C, 0x6D59, 0xAEFD, 0x6D5A, 0xAF43, 0x6D5E, 0xD255,
01363     0x6D5F, 0xD25B, 0x6D60, 0xD257, 0x6D61, 0xD24A, 0x6D62, 0xD24D,
01364     0x6D63, 0xD246, 0x6D64, 0xD247, 0x6D65, 0xAF4A, 0x6D66, 0xAEFA,
01365     0x6D67, 0xD256, 0x6D68, 0xD25F, 0x6D69, 0xAF45, 0x6D6A, 0xAEF6,
01366     0x6D6C, 0xAF40, 0x6D6D, 0xD24E, 0x6D6E, 0xAF42, 0x6D6F, 0xD24F,
01367     0x6D70, 0xD259, 0x6D74, 0xAF44, 0x6D75, 0xD268, 0x6D76, 0xD248,
01368     0x6D77, 0xAEFC, 0x6D78, 0xAEFB, 0x6D79, 0xAF48, 0x6D7A, 0xD245,
01369     0x6D7B, 0xD266, 0x6D7C, 0xD25A, 0x6D7D, 0xD267, 0x6D7E, 0xD261,
01370     0x6D7F, 0xD253, 0x6D80, 0xD262, 0x6D82, 0xD25C, 0x6D83, 0xD265,
01371     0x6D84, 0xD263, 0x6D85, 0xAF49, 0x6D86, 0xD254, 0x6D87, 0xAEF9,
01372     0x6D88, 0xAEF8, 0x6D89, 0xAF41, 0x6D8A, 0xAF47, 0x6D8B, 0xD260,
01373     0x6D8C, 0xAF46, 0x6D8D, 0xD251, 0x6D8E, 0xB243, 0x6D90, 0xD269,
01374     0x6D91, 0xD250, 0x6D92, 0xD24B, 0x6D93, 0xAEFE, 0x6D94, 0xAF4B,
01375     0x6D95, 0xAEF7, 0x6D97, 0xD258, 0x6D98, 0xD25D, 0x6DAA, 0xB265,
01376     0x6DAB, 0xD5E1, 0x6DAC, 0xD5E5, 0x6DAE, 0xB252, 0x6DAF, 0xB250,
01377     0x6DB2, 0xB247, 0x6DB3, 0xD5E3, 0x6DB4, 0xD5E2, 0x6DB5, 0xB25B,
01378     0x6DB7, 0xD5E8, 0x6DB8, 0xB255, 0x6DBA, 0xD5FA, 0x6DBB, 0xD647,
01379     0x6DBC, 0xB244, 0x6DBD, 0xD5F7, 0x6DBE, 0xD5F0, 0x6DBF, 0xB267,
01380     0x6DC0, 0xD5E0, 0x6DC2, 0xD5FC, 0x6DC4, 0xB264, 0x6DC5, 0xB258,
01381     0x6DC6, 0xB263, 0x6DC7, 0xB24E, 0x6DC8, 0xD5EC, 0x6DC9, 0xD5FE,
01382     0x6DCA, 0xD5F6, 0x6DCB, 0xB24F, 0x6DCC, 0xB249, 0x6DCD, 0xD645,
01383     0x6DCF, 0xD5FD, 0x6DD0, 0xD640, 0x6DD1, 0xB251, 0x6DD2, 0xB259,
01384     0x6DD3, 0xD642, 0x6DD4, 0xD5EA, 0x6DD5, 0xD5FB, 0x6DD6, 0xD5EF,
01385     0x6DD7, 0xD644, 0x6DD8, 0xB25E, 0x6DD9, 0xB246, 0x6DDA, 0xB25C,
01386     0x6DDB, 0xD5F4, 0x6DDC, 0xD5F2, 0x6DDD, 0xD5F3, 0x6DDE, 0xB253,
01387     0x6DDF, 0xD5EE, 0x6DE0, 0xD5ED, 0x6DE1, 0xB248, 0x6DE2, 0xD5E7,
01388     0x6DE3, 0xD646, 0x6DE4, 0xB24A, 0x6DE5, 0xD5F1, 0x6DE6, 0xB268,
01389     0x6DE8, 0xB262, 0x6DE9, 0xD5E6, 0x6DEA, 0xB25F, 0x6DEB, 0xB25D,
01390     0x6DEC, 0xB266, 0x6DED, 0xD5F8, 0x6DEE, 0xB261, 0x6DEF, 0xD252,
01391     0x6DF0, 0xD5F9, 0x6DF1, 0xB260, 0x6DF2, 0xD641, 0x6DF3, 0xB245,
01392     0x6DF4, 0xD5F5, 0x6DF5, 0xB257, 0x6DF6, 0xD5E9, 0x6DF7, 0xB256,
01393     0x6DF9, 0xB254, 0x6DFA, 0xB24C, 0x6DFB, 0xB24B, 0x6DFC, 0xD9E7,
01394     0x6DFD, 0xD643, 0x6E00, 0xD5EB, 0x6E03, 0xD9FC, 0x6E05, 0xB24D,
01395     0x6E19, 0xB541, 0x6E1A, 0xB25A, 0x6E1B, 0xB4EE, 0x6E1C, 0xD9F6,
01396     0x6E1D, 0xB4FC, 0x6E1F, 0xD9EA, 0x6E20, 0xB4EB, 0x6E21, 0xB4E7,
01397     0x6E22, 0xDA49, 0x6E23, 0xB4ED, 0x6E24, 0xB4F1, 0x6E25, 0xB4EC,
01398     0x6E26, 0xB4F5, 0x6E27, 0xDA4D, 0x6E28, 0xDA44, 0x6E2B, 0xD9F1,
01399     0x6E2C, 0xB4FA, 0x6E2D, 0xB4F4, 0x6E2E, 0xD9FD, 0x6E2F, 0xB4E4,
01400     0x6E30, 0xDA4A, 0x6E31, 0xDA43, 0x6E32, 0xB4E8, 0x6E33, 0xD9F7,
01401     0x6E34, 0xB4F7, 0x6E35, 0xDA55, 0x6E36, 0xDA56, 0x6E38, 0xB4E5,
01402     0x6E39, 0xDA48, 0x6E3A, 0xB4F9, 0x6E3B, 0xD9FB, 0x6E3C, 0xD9ED,
01403     0x6E3D, 0xD9EE, 0x6E3E, 0xB4FD, 0x6E3F, 0xD9F2, 0x6E40, 0xD9F9,
01404     0x6E41, 0xD9F3, 0x6E43, 0xB4FB, 0x6E44, 0xB544, 0x6E45, 0xD9EF,
01405     0x6E46, 0xD9E8, 0x6E47, 0xD9E9, 0x6E49, 0xD9EB, 0x6E4A, 0xB4EA,
01406     0x6E4B, 0xD9F8, 0x6E4D, 0xB4F8, 0x6E4E, 0xB542, 0x6E51, 0xD9FA,
01407     0x6E52, 0xDA53, 0x6E53, 0xDA4B, 0x6E54, 0xB4E6, 0x6E55, 0xDA51,
01408     0x6E56, 0xB4F2, 0x6E58, 0xB4F0, 0x6E5A, 0xDA57, 0x6E5B, 0xB4EF,
01409     0x6E5C, 0xDA41, 0x6E5D, 0xD9F4, 0x6E5E, 0xD9FE, 0x6E5F, 0xB547,
01410     0x6E60, 0xDA45, 0x6E61, 0xDA42, 0x6E62, 0xD9F0, 0x6E63, 0xB543,
01411     0x6E64, 0xDA4F, 0x6E65, 0xDA4C, 0x6E66, 0xDA54, 0x6E67, 0xB4E9,
01412     0x6E68, 0xDA40, 0x6E69, 0xB546, 0x6E6B, 0xDA47, 0x6E6E, 0xB4F3,
01413     0x6E6F, 0xB4F6, 0x6E71, 0xDA46, 0x6E72, 0xB545, 0x6E73, 0xD9F5,
01414     0x6E74, 0xD5E4, 0x6E77, 0xDA50, 0x6E78, 0xDA4E, 0x6E79, 0xDA52,
01415     0x6E88, 0xD9EC, 0x6E89, 0xB540, 0x6E8D, 0xDE61, 0x6E8E, 0xDE60,
01416     0x6E8F, 0xDE46, 0x6E90, 0xB7BD, 0x6E92, 0xDE5F, 0x6E93, 0xDE49,
01417     0x6E94, 0xDE4A, 0x6E96, 0xB7C7, 0x6E97, 0xDE68, 0x6E98, 0xB7C2,
01418     0x6E99, 0xDE5E, 0x6E9B, 0xDE43, 0x6E9C, 0xB7C8, 0x6E9D, 0xB7BE,
01419     0x6E9E, 0xDE52, 0x6E9F, 0xDE48, 0x6EA0, 0xDE4B, 0x6EA1, 0xDE63,
01420     0x6EA2, 0xB7B8, 0x6EA3, 0xDE6A, 0x6EA4, 0xDE62, 0x6EA5, 0xB7C1,
01421     0x6EA6, 0xDE57, 0x6EA7, 0xB7CC, 0x6EAA, 0xB7CB, 0x6EAB, 0xB7C5,
01422     0x6EAE, 0xDE69, 0x6EAF, 0xB7B9, 0x6EB0, 0xDE55, 0x6EB1, 0xDE4C,
01423     0x6EB2, 0xDE59, 0x6EB3, 0xDE65, 0x6EB4, 0xB7CD, 0x6EB6, 0xB7BB,
01424     0x6EB7, 0xDE54, 0x6EB9, 0xDE4D, 0x6EBA, 0xB7C4, 0x6EBC, 0xB7C3,
01425     0x6EBD, 0xDE50, 0x6EBE, 0xDE5A, 0x6EBF, 0xDE64, 0x6EC0, 0xDE47,
01426     0x6EC1, 0xDE51, 0x6EC2, 0xB7BC, 0x6EC3, 0xDE5B, 0x6EC4, 0xB7C9,
01427     0x6EC5, 0xB7C0, 0x6EC6, 0xDE4E, 0x6EC7, 0xB7BF, 0x6EC8, 0xDE45,
01428     0x6EC9, 0xDE53, 0x6ECA, 0xDE67, 0x6ECB, 0xB4FE, 0x6ECC, 0xBAB0,
01429     0x6ECD, 0xDE56, 0x6ECE, 0xE26C, 0x6ECF, 0xDE58, 0x6ED0, 0xDE66,
01430     0x6ED1, 0xB7C6, 0x6ED2, 0xDE4F, 0x6ED3, 0xB7BA, 0x6ED4, 0xB7CA,
01431     0x6ED5, 0xBCF0, 0x6ED6, 0xDE44, 0x6ED8, 0xDE5D, 0x6EDC, 0xDE5C,
01432     0x6EEB, 0xE2AA, 0x6EEC, 0xBAAD, 0x6EED, 0xE27D, 0x6EEE, 0xE2A4,
01433     0x6EEF, 0xBAA2, 0x6EF1, 0xE26E, 0x6EF2, 0xBAAF, 0x6EF4, 0xBA77,
01434     0x6EF5, 0xE26D, 0x6EF6, 0xE2B0, 0x6EF7, 0xBAB1, 0x6EF8, 0xE271,
01435     0x6EF9, 0xE2A3, 0x6EFB, 0xE273, 0x6EFC, 0xE2B3, 0x6EFD, 0xE2AF,
01436     0x6EFE, 0xBA75, 0x6EFF, 0xBAA1, 0x6F00, 0xE653, 0x6F01, 0xBAAE,
01437     0x6F02, 0xBA7D, 0x6F03, 0xE26F, 0x6F05, 0xE2AE, 0x6F06, 0xBAA3,
01438     0x6F07, 0xE2AB, 0x6F08, 0xE2B8, 0x6F09, 0xE275, 0x6F0A, 0xE27E,
01439     0x6F0D, 0xE2B6, 0x6F0E, 0xE2AC, 0x6F0F, 0xBA7C, 0x6F12, 0xE27C,
01440     0x6F13, 0xBA76, 0x6F14, 0xBA74, 0x6F15, 0xBAA8, 0x6F18, 0xE27A,
01441     0x6F19, 0xE277, 0x6F1A, 0xE278, 0x6F1C, 0xE2B2, 0x6F1E, 0xE2B7,
01442     0x6F1F, 0xE2B5, 0x6F20, 0xBA7A, 0x6F21, 0xE2B9, 0x6F22, 0xBA7E,
01443     0x6F23, 0xBAA7, 0x6F25, 0xE270, 0x6F26, 0xE5FA, 0x6F27, 0xE279,
01444     0x6F29, 0xBA78, 0x6F2A, 0xBAAC, 0x6F2B, 0xBAA9, 0x6F2C, 0xBA7B,
01445     0x6F2D, 0xE2A5, 0x6F2E, 0xE274, 0x6F2F, 0xBAAA, 0x6F30, 0xE2A7,
01446     0x6F31, 0xBAA4, 0x6F32, 0xBAA6, 0x6F33, 0xBA73, 0x6F35, 0xE2A9,
01447     0x6F36, 0xE2A1, 0x6F37, 0xE272, 0x6F38, 0xBAA5, 0x6F39, 0xE2B1,
01448     0x6F3A, 0xE2B4, 0x6F3B, 0xE27B, 0x6F3C, 0xE2A8, 0x6F3E, 0xBA79,
01449     0x6F3F, 0xBCDF, 0x6F40, 0xE2A6, 0x6F41, 0xE5F9, 0x6F43, 0xE2AD,
01450     0x6F4E, 0xE276, 0x6F4F, 0xE644, 0x6F50, 0xE64E, 0x6F51, 0xBCE2,
01451     0x6F52, 0xE64D, 0x6F53, 0xE659, 0x6F54, 0xBCE4, 0x6F55, 0xE64B,
01452     0x6F57, 0xE64F, 0x6F58, 0xBCEF, 0x6F5A, 0xE646, 0x6F5B, 0xBCE7,
01453     0x6F5D, 0xE652, 0x6F5E, 0xE9F0, 0x6F5F, 0xBCF3, 0x6F60, 0xBCF2,
01454     0x6F61, 0xE654, 0x6F62, 0xE643, 0x6F63, 0xE65E, 0x6F64, 0xBCED,
01455     0x6F66, 0xBCE3, 0x6F67, 0xE657, 0x6F69, 0xE65B, 0x6F6A, 0xE660,
01456     0x6F6B, 0xE655, 0x6F6C, 0xE649, 0x6F6D, 0xBCE6, 0x6F6E, 0xBCE9,
01457     0x6F6F, 0xBCF1, 0x6F70, 0xBCEC, 0x6F72, 0xE64C, 0x6F73, 0xE2A2,
01458     0x6F76, 0xE648, 0x6F77, 0xE65F, 0x6F78, 0xBCE8, 0x6F7A, 0xBCEB,
01459     0x6F7B, 0xE661, 0x6F7C, 0xBCE0, 0x6F7D, 0xE656, 0x6F7E, 0xE5FB,
01460     0x6F7F, 0xE65C, 0x6F80, 0xC0DF, 0x6F82, 0xE64A, 0x6F84, 0xBCE1,
01461     0x6F85, 0xE645, 0x6F86, 0xBCE5, 0x6F87, 0xE5FC, 0x6F88, 0xBAAB,
01462     0x6F89, 0xE641, 0x6F8B, 0xE65A, 0x6F8C, 0xE642, 0x6F8D, 0xE640,
01463     0x6F8E, 0xBCEA, 0x6F90, 0xE658, 0x6F92, 0xE5FE, 0x6F93, 0xE651,
01464     0x6F94, 0xE650, 0x6F95, 0xE65D, 0x6F96, 0xE647, 0x6F97, 0xBCEE,
01465     0x6F9E, 0xE9F3, 0x6FA0, 0xBF49, 0x6FA1, 0xBEFE, 0x6FA2, 0xEA40,
01466     0x6FA3, 0xE9EB, 0x6FA4, 0xBF41, 0x6FA5, 0xE9F7, 0x6FA6, 0xBF48,
01467     0x6FA7, 0xBF43, 0x6FA8, 0xE9F5, 0x6FA9, 0xED4F, 0x6FAA, 0xE9FB,
01468     0x6FAB, 0xEA42, 0x6FAC, 0xE9FA, 0x6FAD, 0xE9E9, 0x6FAE, 0xE9F8,
01469     0x6FAF, 0xEA44, 0x6FB0, 0xEA46, 0x6FB1, 0xBEFD, 0x6FB2, 0xEA45,
01470     0x6FB3, 0xBF44, 0x6FB4, 0xBF4A, 0x6FB6, 0xBF47, 0x6FB8, 0xE9FE,
01471     0x6FB9, 0xBF46, 0x6FBA, 0xE9F9, 0x6FBC, 0xE9ED, 0x6FBD, 0xE9F2,
01472     0x6FBF, 0xE9FD, 0x6FC0, 0xBF45, 0x6FC1, 0xBF42, 0x6FC2, 0xBEFC,
01473     0x6FC3, 0xBF40, 0x6FC4, 0xE9F1, 0x6FC6, 0xE5FD, 0x6FC7, 0xE9EC,
01474     0x6FC8, 0xE9EF, 0x6FC9, 0xEA41, 0x6FCA, 0xE9F4, 0x6FCB, 0xE9EA,
01475     0x6FCC, 0xED4E, 0x6FCD, 0xEA43, 0x6FCE, 0xE9EE, 0x6FCF, 0xE9FC,
01476     0x6FD4, 0xED51, 0x6FD5, 0xC0E3, 0x6FD8, 0xC0D7, 0x6FDB, 0xC0DB,
01477     0x6FDC, 0xED53, 0x6FDD, 0xED59, 0x6FDE, 0xED57, 0x6FDF, 0xC0D9,
01478     0x6FE0, 0xC0DA, 0x6FE1, 0xC0E1, 0x6FE2, 0xED5A, 0x6FE3, 0xED52,
01479     0x6FE4, 0xC0DC, 0x6FE6, 0xED56, 0x6FE7, 0xED55, 0x6FE8, 0xED5B,
01480     0x6FE9, 0xC0E2, 0x6FEB, 0xC0DD, 0x6FEC, 0xC0E0, 0x6FED, 0xED54,
01481     0x6FEE, 0xC0E4, 0x6FEF, 0xC0DE, 0x6FF0, 0xC0E5, 0x6FF1, 0xC0D8,
01482     0x6FF2, 0xED58, 0x6FF4, 0xED50, 0x6FF7, 0xEFF7, 0x6FFA, 0xC271,
01483     0x6FFB, 0xEFF4, 0x6FFC, 0xEFF6, 0x6FFE, 0xC26F, 0x6FFF, 0xEFF2,
01484     0x7000, 0xEFF3, 0x7001, 0xEFEE, 0x7004, 0xE9F6, 0x7005, 0xEFEF,
01485     0x7006, 0xC270, 0x7007, 0xEFEB, 0x7009, 0xC26D, 0x700A, 0xEFF8,
01486     0x700B, 0xC26E, 0x700C, 0xEFEC, 0x700D, 0xEFED, 0x700E, 0xEFF1,
01487     0x700F, 0xC273, 0x7011, 0xC272, 0x7014, 0xEFF0, 0x7015, 0xC378,
01488     0x7016, 0xF25F, 0x7017, 0xF265, 0x7018, 0xC379, 0x7019, 0xF25C,
01489     0x701A, 0xC376, 0x701B, 0xC373, 0x701C, 0xF267, 0x701D, 0xC377,
01490     0x701F, 0xC374, 0x7020, 0xF25E, 0x7021, 0xF261, 0x7022, 0xF262,
01491     0x7023, 0xF263, 0x7024, 0xF266, 0x7026, 0xEFF5, 0x7027, 0xF25D,
01492     0x7028, 0xC375, 0x7029, 0xF264, 0x702A, 0xF268, 0x702B, 0xF260,
01493     0x702F, 0xF45D, 0x7030, 0xC46A, 0x7031, 0xF460, 0x7032, 0xC46B,
01494     0x7033, 0xF468, 0x7034, 0xF45F, 0x7035, 0xF45C, 0x7037, 0xF45E,
01495     0x7038, 0xF462, 0x7039, 0xF465, 0x703A, 0xF464, 0x703B, 0xF467,
01496     0x703C, 0xF45B, 0x703E, 0xC469, 0x703F, 0xF463, 0x7040, 0xF466,
01497     0x7041, 0xF469, 0x7042, 0xF461, 0x7043, 0xF5D3, 0x7044, 0xF5D4,
01498     0x7045, 0xF5D8, 0x7046, 0xF5D9, 0x7048, 0xF5D6, 0x7049, 0xF5D7,
01499     0x704A, 0xF5D5, 0x704C, 0xC4E9, 0x7051, 0xC578, 0x7052, 0xF6EB,
01500     0x7055, 0xF6E8, 0x7056, 0xF6E9, 0x7057, 0xF6EA, 0x7058, 0xC579,
01501     0x705A, 0xF7E5, 0x705B, 0xF7E4, 0x705D, 0xF8AF, 0x705E, 0xC5F4,
01502     0x705F, 0xF8AD, 0x7060, 0xF8B0, 0x7061, 0xF8AE, 0x7062, 0xF8F5,
01503     0x7063, 0xC657, 0x7064, 0xC665, 0x7065, 0xF9A3, 0x7066, 0xF96C,
01504     0x7068, 0xF9A2, 0x7069, 0xF9D0, 0x706A, 0xF9D1, 0x706B, 0xA4F5,
01505     0x7070, 0xA6C7, 0x7071, 0xCA41, 0x7074, 0xCB5E, 0x7076, 0xA85F,
01506     0x7078, 0xA862, 0x707A, 0xCB5F, 0x707C, 0xA860, 0x707D, 0xA861,
01507     0x7082, 0xCD58, 0x7083, 0xCD5A, 0x7084, 0xCD55, 0x7085, 0xCD52,
01508     0x7086, 0xCD54, 0x708A, 0xAAA4, 0x708E, 0xAAA2, 0x7091, 0xCD56,
01509     0x7092, 0xAAA3, 0x7093, 0xCD53, 0x7094, 0xCD50, 0x7095, 0xAAA1,
01510     0x7096, 0xCD57, 0x7098, 0xCD51, 0x7099, 0xAAA5, 0x709A, 0xCD59,
01511     0x709F, 0xCFAF, 0x70A1, 0xCFB3, 0x70A4, 0xACB7, 0x70A9, 0xCFB6,
01512     0x70AB, 0xACAF, 0x70AC, 0xACB2, 0x70AD, 0xACB4, 0x70AE, 0xACB6,
01513     0x70AF, 0xACB3, 0x70B0, 0xCFB2, 0x70B1, 0xCFB1, 0x70B3, 0xACB1,
01514     0x70B4, 0xCFB4, 0x70B5, 0xCFB5, 0x70B7, 0xCFAE, 0x70B8, 0xACB5,
01515     0x70BA, 0xACB0, 0x70BE, 0xCFB0, 0x70C5, 0xD277, 0x70C6, 0xD278,
01516     0x70C7, 0xD279, 0x70C8, 0xAF50, 0x70CA, 0xAF4C, 0x70CB, 0xD26E,
01517     0x70CD, 0xD276, 0x70CE, 0xD27B, 0x70CF, 0xAF51, 0x70D1, 0xD26C,
01518     0x70D2, 0xD272, 0x70D3, 0xD26B, 0x70D4, 0xD275, 0x70D7, 0xD271,
01519     0x70D8, 0xAF4D, 0x70D9, 0xAF4F, 0x70DA, 0xD27A, 0x70DC, 0xD26A,
01520     0x70DD, 0xD26D, 0x70DE, 0xD273, 0x70E0, 0xD274, 0x70E1, 0xD27C,
01521     0x70E2, 0xD270, 0x70E4, 0xAF4E, 0x70EF, 0xB26D, 0x70F0, 0xD64E,
01522     0x70F3, 0xD650, 0x70F4, 0xD64C, 0x70F6, 0xD658, 0x70F7, 0xD64A,
01523     0x70F8, 0xD657, 0x70F9, 0xB269, 0x70FA, 0xD648, 0x70FB, 0xDA5B,
01524     0x70FC, 0xD652, 0x70FD, 0xB26C, 0x70FF, 0xD653, 0x7100, 0xD656,
01525     0x7102, 0xD65A, 0x7104, 0xD64F, 0x7106, 0xD654, 0x7109, 0xB26A,
01526     0x710A, 0xB26B, 0x710B, 0xD659, 0x710C, 0xD64D, 0x710D, 0xD649,
01527     0x710E, 0xD65B, 0x7110, 0xD651, 0x7113, 0xD655, 0x7117, 0xD64B,
01528     0x7119, 0xB548, 0x711A, 0xB549, 0x711B, 0xDA65, 0x711C, 0xB54F,
01529     0x711E, 0xDA59, 0x711F, 0xDA62, 0x7120, 0xDA58, 0x7121, 0xB54C,
01530     0x7122, 0xDA60, 0x7123, 0xDA5E, 0x7125, 0xDA5F, 0x7126, 0xB54A,
01531     0x7128, 0xDA63, 0x712E, 0xDA5C, 0x712F, 0xDA5A, 0x7130, 0xB54B,
01532     0x7131, 0xDA5D, 0x7132, 0xDA61, 0x7136, 0xB54D, 0x713A, 0xDA64,
01533     0x7141, 0xDE70, 0x7142, 0xDE77, 0x7143, 0xDE79, 0x7144, 0xDEA1,
01534     0x7146, 0xB7DA, 0x7147, 0xDE6B, 0x7149, 0xB7D2, 0x714B, 0xDE7A,
01535     0x714C, 0xB7D7, 0x714D, 0xDEA2, 0x714E, 0xB7CE, 0x7150, 0xDE7D,
01536     0x7152, 0xDE6D, 0x7153, 0xDE7E, 0x7154, 0xDE6C, 0x7156, 0xB7DC,
01537     0x7158, 0xDE78, 0x7159, 0xB7CF, 0x715A, 0xDEA3, 0x715C, 0xB7D4,
01538     0x715D, 0xDE71, 0x715E, 0xB7D9, 0x715F, 0xDE7C, 0x7160, 0xDE6F,
01539     0x7161, 0xDE76, 0x7162, 0xDE72, 0x7163, 0xDE6E, 0x7164, 0xB7D1,
01540     0x7165, 0xB7D8, 0x7166, 0xB7D6, 0x7167, 0xB7D3, 0x7168, 0xB7DB,
01541     0x7169, 0xB7D0, 0x716A, 0xDE75, 0x716C, 0xB7D5, 0x716E, 0xB54E,
01542     0x7170, 0xDE7B, 0x7172, 0xDE73, 0x7178, 0xDE74, 0x717B, 0xE2C1,
01543     0x717D, 0xBAB4, 0x7180, 0xE2BD, 0x7181, 0xE2C3, 0x7182, 0xE2BF,
01544     0x7184, 0xBAB6, 0x7185, 0xE2BE, 0x7186, 0xE2C2, 0x7187, 0xE2BA,
01545     0x7189, 0xE2BC, 0x718A, 0xBAB5, 0x718F, 0xE2C0, 0x7190, 0xE2BB,
01546     0x7192, 0xBAB7, 0x7194, 0xBAB2, 0x7197, 0xE2C4, 0x7199, 0xBAB3,
01547     0x719A, 0xE667, 0x719B, 0xE664, 0x719C, 0xE670, 0x719D, 0xE66A,
01548     0x719E, 0xE66C, 0x719F, 0xBCF4, 0x71A0, 0xE666, 0x71A1, 0xE66E,
01549     0x71A4, 0xE66D, 0x71A5, 0xE66B, 0x71A7, 0xE671, 0x71A8, 0xBCF7,
01550     0x71A9, 0xE668, 0x71AA, 0xE66F, 0x71AC, 0xBCF5, 0x71AF, 0xE663,
01551     0x71B0, 0xE665, 0x71B1, 0xBCF6, 0x71B2, 0xE662, 0x71B3, 0xE672,
01552     0x71B5, 0xE669, 0x71B8, 0xEA4A, 0x71B9, 0xBF51, 0x71BC, 0xEA55,
01553     0x71BD, 0xEA53, 0x71BE, 0xBF4B, 0x71BF, 0xEA49, 0x71C0, 0xEA4C,
01554     0x71C1, 0xEA4D, 0x71C2, 0xEA48, 0x71C3, 0xBF55, 0x71C4, 0xBF56,
01555     0x71C5, 0xEA47, 0x71C6, 0xEA56, 0x71C7, 0xEA51, 0x71C8, 0xBF4F,
01556     0x71C9, 0xBF4C, 0x71CA, 0xEA50, 0x71CB, 0xEA4E, 0x71CE, 0xBF52,
01557     0x71CF, 0xEA52, 0x71D0, 0xBF4D, 0x71D2, 0xBF4E, 0x71D4, 0xEA4F,
01558     0x71D5, 0xBF50, 0x71D6, 0xEA4B, 0x71D8, 0xEA54, 0x71D9, 0xBF53,
01559     0x71DA, 0xEA57, 0x71DB, 0xEA58, 0x71DC, 0xBF54, 0x71DF, 0xC0E7,
01560     0x71E0, 0xC0EE, 0x71E1, 0xED5C, 0x71E2, 0xED62, 0x71E4, 0xED60,
01561     0x71E5, 0xC0EA, 0x71E6, 0xC0E9, 0x71E7, 0xC0E6, 0x71E8, 0xED5E,
01562     0x71EC, 0xC0EC, 0x71ED, 0xC0EB, 0x71EE, 0xC0E8, 0x71F0, 0xED61,
01563     0x71F1, 0xED5D, 0x71F2, 0xED5F, 0x71F4, 0xC0ED, 0x71F8, 0xC277,
01564     0x71F9, 0xEFFB, 0x71FB, 0xC274, 0x71FC, 0xC275, 0x71FD, 0xEFFD,
01565     0x71FE, 0xC276, 0x71FF, 0xEFFA, 0x7201, 0xEFF9, 0x7202, 0xF26C,
01566     0x7203, 0xEFFC, 0x7205, 0xF26D, 0x7206, 0xC37A, 0x7207, 0xF26B,
01567     0x720A, 0xF26A, 0x720C, 0xF269, 0x720D, 0xC37B, 0x7210, 0xC46C,
01568     0x7213, 0xF46A, 0x7214, 0xF46B, 0x7219, 0xF5DC, 0x721A, 0xF5DB,
01569     0x721B, 0xC4EA, 0x721D, 0xF5DA, 0x721E, 0xF6EC, 0x721F, 0xF6ED,
01570     0x7222, 0xF7E6, 0x7223, 0xF8B1, 0x7226, 0xF8F6, 0x7227, 0xF9BC,
01571     0x7228, 0xC679, 0x7229, 0xF9C6, 0x722A, 0xA4F6, 0x722C, 0xAAA6,
01572     0x722D, 0xAAA7, 0x7230, 0xACB8, 0x7235, 0xC0EF, 0x7236, 0xA4F7,
01573     0x7238, 0xAAA8, 0x7239, 0xAF52, 0x723A, 0xB7DD, 0x723B, 0xA4F8,
01574     0x723D, 0xB26E, 0x723E, 0xBAB8, 0x723F, 0xC962, 0x7241, 0xCFB7,
01575     0x7242, 0xD27D, 0x7244, 0xE2C5, 0x7246, 0xC0F0, 0x7247, 0xA4F9,
01576     0x7248, 0xAAA9, 0x7249, 0xCFB8, 0x724A, 0xCFB9, 0x724B, 0xDA66,
01577     0x724C, 0xB550, 0x724F, 0xDEA4, 0x7252, 0xB7DE, 0x7253, 0xE2C6,
01578     0x7256, 0xBCF8, 0x7258, 0xC37C, 0x7259, 0xA4FA, 0x725A, 0xDA67,
01579     0x725B, 0xA4FB, 0x725D, 0xA6C9, 0x725E, 0xCA42, 0x725F, 0xA6C8,
01580     0x7260, 0xA865, 0x7261, 0xA864, 0x7262, 0xA863, 0x7263, 0xCB60,
01581     0x7267, 0xAAAA, 0x7269, 0xAAAB, 0x726A, 0xCD5B, 0x726C, 0xCFBA,
01582     0x726E, 0xCFBD, 0x726F, 0xACBA, 0x7270, 0xCFBB, 0x7272, 0xACB9,
01583     0x7273, 0xCFBC, 0x7274, 0xACBB, 0x7276, 0xD2A2, 0x7277, 0xD2A1,
01584     0x7278, 0xD27E, 0x7279, 0xAF53, 0x727B, 0xD65D, 0x727C, 0xD65E,
01585     0x727D, 0xB26F, 0x727E, 0xD65C, 0x727F, 0xD65F, 0x7280, 0xB552,
01586     0x7281, 0xB270, 0x7284, 0xB551, 0x7285, 0xDA6B, 0x7286, 0xDA6A,
01587     0x7288, 0xDA68, 0x7289, 0xDA69, 0x728B, 0xDA6C, 0x728C, 0xDEA6,
01588     0x728D, 0xDEA5, 0x728E, 0xDEA9, 0x7290, 0xDEA8, 0x7291, 0xDEA7,
01589     0x7292, 0xBAB9, 0x7293, 0xE2C9, 0x7295, 0xE2C8, 0x7296, 0xBABA,
01590     0x7297, 0xE2C7, 0x7298, 0xE673, 0x729A, 0xE674, 0x729B, 0xBCF9,
01591     0x729D, 0xEA59, 0x729E, 0xEA5A, 0x72A1, 0xF272, 0x72A2, 0xC37D,
01592     0x72A3, 0xF271, 0x72A4, 0xF270, 0x72A5, 0xF26E, 0x72A6, 0xF26F,
01593     0x72A7, 0xC4EB, 0x72A8, 0xF46C, 0x72A9, 0xF6EE, 0x72AA, 0xF8F7,
01594     0x72AC, 0xA4FC, 0x72AE, 0xC9A5, 0x72AF, 0xA5C7, 0x72B0, 0xC9A6,
01595     0x72B4, 0xCA43, 0x72B5, 0xCA44, 0x72BA, 0xCB66, 0x72BD, 0xCB62,
01596     0x72BF, 0xCB61, 0x72C0, 0xAAAC, 0x72C1, 0xCB65, 0x72C2, 0xA867,
01597     0x72C3, 0xCB63, 0x72C4, 0xA866, 0x72C5, 0xCB67, 0x72C6, 0xCB64,
01598     0x72C9, 0xCD5F, 0x72CA, 0xCFBE, 0x72CB, 0xCD5D, 0x72CC, 0xCD64,
01599     0x72CE, 0xAAAD, 0x72D0, 0xAAB0, 0x72D1, 0xCD65, 0x72D2, 0xCD61,
01600     0x72D4, 0xCD62, 0x72D6, 0xCD5C, 0x72D7, 0xAAAF, 0x72D8, 0xCD5E,
01601     0x72D9, 0xAAAE, 0x72DA, 0xCD63, 0x72DC, 0xCD60, 0x72DF, 0xCFC2,
01602     0x72E0, 0xACBD, 0x72E1, 0xACBE, 0x72E3, 0xCFC5, 0x72E4, 0xCFBF,
01603     0x72E6, 0xCFC4, 0x72E8, 0xCFC0, 0x72E9, 0xACBC, 0x72EA, 0xCFC3,
01604     0x72EB, 0xCFC1, 0x72F3, 0xD2A8, 0x72F4, 0xD2A5, 0x72F6, 0xD2A7,
01605     0x72F7, 0xAF58, 0x72F8, 0xAF57, 0x72F9, 0xAF55, 0x72FA, 0xD2A4,
01606     0x72FB, 0xD2A9, 0x72FC, 0xAF54, 0x72FD, 0xAF56, 0x72FE, 0xD2A6,
01607     0x72FF, 0xD667, 0x7300, 0xD2A3, 0x7301, 0xD2AA, 0x7307, 0xD662,
01608     0x7308, 0xD666, 0x730A, 0xD665, 0x730B, 0xDA6E, 0x730C, 0xDA79,
01609     0x730F, 0xD668, 0x7311, 0xD663, 0x7312, 0xDA6D, 0x7313, 0xB274,
01610     0x7316, 0xB273, 0x7317, 0xD661, 0x7318, 0xD664, 0x7319, 0xB275,
01611     0x731B, 0xB272, 0x731C, 0xB271, 0x731D, 0xD660, 0x731E, 0xD669,
01612     0x7322, 0xDA70, 0x7323, 0xDA77, 0x7325, 0xB554, 0x7326, 0xDA76,
01613     0x7327, 0xDA73, 0x7329, 0xB556, 0x732D, 0xDA75, 0x7330, 0xDA6F,
01614     0x7331, 0xDA71, 0x7332, 0xDA74, 0x7333, 0xDA72, 0x7334, 0xB555,
01615     0x7335, 0xDA78, 0x7336, 0xB553, 0x7337, 0xB7DF, 0x733A, 0xDEAD,
01616     0x733B, 0xDEAC, 0x733C, 0xDEAA, 0x733E, 0xB7E2, 0x733F, 0xB7E1,
01617     0x7340, 0xDEAE, 0x7342, 0xDEAB, 0x7343, 0xE2CA, 0x7344, 0xBABB,
01618     0x7345, 0xB7E0, 0x7349, 0xDEB0, 0x734A, 0xDEAF, 0x734C, 0xE2CD,
01619     0x734D, 0xE2CB, 0x734E, 0xBCFA, 0x7350, 0xBABC, 0x7351, 0xE2CC,
01620     0x7352, 0xE676, 0x7357, 0xBCFB, 0x7358, 0xE675, 0x7359, 0xE67E,
01621     0x735A, 0xE67D, 0x735B, 0xE67B, 0x735D, 0xE67A, 0x735E, 0xE677,
01622     0x735F, 0xE678, 0x7360, 0xE679, 0x7361, 0xE67C, 0x7362, 0xE6A1,
01623     0x7365, 0xEA5F, 0x7366, 0xEA5C, 0x7367, 0xEA5D, 0x7368, 0xBF57,
01624     0x7369, 0xEA5B, 0x736A, 0xEA61, 0x736B, 0xEA60, 0x736C, 0xEA5E,
01625     0x736E, 0xED64, 0x736F, 0xED65, 0x7370, 0xC0F1, 0x7372, 0xC0F2,
01626     0x7373, 0xED63, 0x7375, 0xC279, 0x7376, 0xEFFE, 0x7377, 0xC278,
01627     0x7378, 0xC37E, 0x737A, 0xC3A1, 0x737B, 0xC46D, 0x737C, 0xF46E,
01628     0x737D, 0xF46D, 0x737E, 0xF5DD, 0x737F, 0xF6EF, 0x7380, 0xC57A,
01629     0x7381, 0xF7E8, 0x7382, 0xF7E7, 0x7383, 0xF7E9, 0x7384, 0xA5C8,
01630     0x7385, 0xCFC6, 0x7386, 0xAF59, 0x7387, 0xB276, 0x7388, 0xD66A,
01631     0x7389, 0xA5C9, 0x738A, 0xC9A7, 0x738B, 0xA4FD, 0x738E, 0xCA45,
01632     0x7392, 0xCB6C, 0x7393, 0xCB6A, 0x7394, 0xCB6B, 0x7395, 0xCB68,
01633     0x7396, 0xA868, 0x7397, 0xCB69, 0x739D, 0xCD6D, 0x739F, 0xAAB3,
01634     0x73A0, 0xCD6B, 0x73A1, 0xCD67, 0x73A2, 0xCD6A, 0x73A4, 0xCD66,
01635     0x73A5, 0xAAB5, 0x73A6, 0xCD69, 0x73A8, 0xAAB2, 0x73A9, 0xAAB1,
01636     0x73AB, 0xAAB4, 0x73AC, 0xCD6C, 0x73AD, 0xCD68, 0x73B2, 0xACC2,
01637     0x73B3, 0xACC5, 0x73B4, 0xCFCE, 0x73B5, 0xCFCD, 0x73B6, 0xCFCC,
01638     0x73B7, 0xACBF, 0x73B8, 0xCFD5, 0x73B9, 0xCFCB, 0x73BB, 0xACC1,
01639     0x73BC, 0xD2AF, 0x73BE, 0xCFD2, 0x73BF, 0xCFD0, 0x73C0, 0xACC4,
01640     0x73C2, 0xCFC8, 0x73C3, 0xCFD3, 0x73C5, 0xCFCA, 0x73C6, 0xCFD4,
01641     0x73C7, 0xCFD1, 0x73C8, 0xCFC9, 0x73CA, 0xACC0, 0x73CB, 0xCFD6,
01642     0x73CC, 0xCFC7, 0x73CD, 0xACC3, 0x73D2, 0xD2B4, 0x73D3, 0xD2AB,
01643     0x73D4, 0xD2B6, 0x73D6, 0xD2AE, 0x73D7, 0xD2B9, 0x73D8, 0xD2BA,
01644     0x73D9, 0xD2AC, 0x73DA, 0xD2B8, 0x73DB, 0xD2B5, 0x73DC, 0xD2B3,
01645     0x73DD, 0xD2B7, 0x73DE, 0xAF5F, 0x73E0, 0xAF5D, 0x73E3, 0xD2B1,
01646     0x73E5, 0xD2AD, 0x73E7, 0xD2B0, 0x73E8, 0xD2BB, 0x73E9, 0xD2B2,
01647     0x73EA, 0xAF5E, 0x73EB, 0xCFCF, 0x73ED, 0xAF5A, 0x73EE, 0xAF5C,
01648     0x73F4, 0xD678, 0x73F5, 0xD66D, 0x73F6, 0xD66B, 0x73F8, 0xD66C,
01649     0x73FA, 0xD673, 0x73FC, 0xD674, 0x73FD, 0xD670, 0x73FE, 0xB27B,
01650     0x73FF, 0xD675, 0x7400, 0xD672, 0x7401, 0xD66F, 0x7403, 0xB279,
01651     0x7404, 0xD66E, 0x7405, 0xB277, 0x7406, 0xB27A, 0x7407, 0xD671,
01652     0x7408, 0xD679, 0x7409, 0xAF5B, 0x740A, 0xB278, 0x740B, 0xD677,
01653     0x740C, 0xD676, 0x740D, 0xB27C, 0x7416, 0xDA7E, 0x741A, 0xDAA1,
01654     0x741B, 0xB560, 0x741D, 0xDAA7, 0x7420, 0xDAA9, 0x7421, 0xDAA2,
01655     0x7422, 0xB55A, 0x7423, 0xDAA6, 0x7424, 0xDAA5, 0x7425, 0xB55B,
01656     0x7426, 0xB561, 0x7428, 0xB562, 0x7429, 0xDAA8, 0x742A, 0xB558,
01657     0x742B, 0xDA7D, 0x742C, 0xDA7B, 0x742D, 0xDAA3, 0x742E, 0xDA7A,
01658     0x742F, 0xB55F, 0x7430, 0xDA7C, 0x7431, 0xDAA4, 0x7432, 0xDAAA,
01659     0x7433, 0xB559, 0x7434, 0xB55E, 0x7435, 0xB55C, 0x7436, 0xB55D,
01660     0x743A, 0xB557, 0x743F, 0xB7E9, 0x7440, 0xDEB7, 0x7441, 0xB7E8,
01661     0x7442, 0xDEBB, 0x7444, 0xDEB1, 0x7446, 0xDEBC, 0x744A, 0xDEB2,
01662     0x744B, 0xDEB3, 0x744D, 0xDEBD, 0x744E, 0xDEBA, 0x744F, 0xDEB8,
01663     0x7450, 0xDEB9, 0x7451, 0xDEB5, 0x7452, 0xDEB4, 0x7454, 0xDEBE,
01664     0x7455, 0xB7E5, 0x7457, 0xDEB6, 0x7459, 0xB7EA, 0x745A, 0xB7E4,
01665     0x745B, 0xB7EB, 0x745C, 0xB7EC, 0x745E, 0xB7E7, 0x745F, 0xB7E6,
01666     0x7462, 0xE2CE, 0x7463, 0xBABE, 0x7464, 0xBABD, 0x7467, 0xE2D3,
01667     0x7469, 0xBCFC, 0x746A, 0xBABF, 0x746D, 0xBAC1, 0x746E, 0xE2D4,
01668     0x746F, 0xB7E3, 0x7470, 0xBAC0, 0x7471, 0xE2D0, 0x7472, 0xE2D2,
01669     0x7473, 0xE2CF, 0x7475, 0xE2D1, 0x7479, 0xE6AB, 0x747C, 0xE6AA,
01670     0x747D, 0xE6A7, 0x747E, 0xBD40, 0x747F, 0xEA62, 0x7480, 0xBD41,
01671     0x7481, 0xE6A6, 0x7483, 0xBCFE, 0x7485, 0xE6A8, 0x7486, 0xE6A5,
01672     0x7487, 0xE6A2, 0x7488, 0xE6A9, 0x7489, 0xE6A3, 0x748A, 0xE6A4,
01673     0x748B, 0xBCFD, 0x7490, 0xED69, 0x7492, 0xEA66, 0x7494, 0xEA65,
01674     0x7495, 0xEA67, 0x7497, 0xED66, 0x7498, 0xBF5A, 0x749A, 0xEA63,
01675     0x749C, 0xBF58, 0x749E, 0xBF5C, 0x749F, 0xBF5B, 0x74A0, 0xEA64,
01676     0x74A1, 0xEA68, 0x74A3, 0xBF59, 0x74A5, 0xED6D, 0x74A6, 0xC0F5,
01677     0x74A7, 0xC27A, 0x74A8, 0xC0F6, 0x74A9, 0xC0F3, 0x74AA, 0xED6A,
01678     0x74AB, 0xED68, 0x74AD, 0xED6B, 0x74AF, 0xED6E, 0x74B0, 0xC0F4,
01679     0x74B1, 0xED6C, 0x74B2, 0xED67, 0x74B5, 0xF042, 0x74B6, 0xF045,
01680     0x74B7, 0xF275, 0x74B8, 0xF040, 0x74BA, 0xF46F, 0x74BB, 0xF046,
01681     0x74BD, 0xC3A2, 0x74BE, 0xF044, 0x74BF, 0xC27B, 0x74C0, 0xF041,
01682     0x74C1, 0xF043, 0x74C2, 0xF047, 0x74C3, 0xF276, 0x74C5, 0xF274,
01683     0x74CA, 0xC3A3, 0x74CB, 0xF273, 0x74CF, 0xC46E, 0x74D4, 0xC4ED,
01684     0x74D5, 0xF6F1, 0x74D6, 0xC4EC, 0x74D7, 0xF6F3, 0x74D8, 0xF6F0,
01685     0x74D9, 0xF6F2, 0x74DA, 0xC5D0, 0x74DB, 0xF8B2, 0x74DC, 0xA5CA,
01686     0x74DD, 0xCD6E, 0x74DE, 0xD2BC, 0x74DF, 0xD2BD, 0x74E0, 0xB27D,
01687     0x74E1, 0xDEBF, 0x74E2, 0xBF5D, 0x74E3, 0xC3A4, 0x74E4, 0xC57B,
01688     0x74E5, 0xF8B3, 0x74E6, 0xA5CB, 0x74E8, 0xCD6F, 0x74E9, 0xA260,
01689     0x74EC, 0xCFD7, 0x74EE, 0xCFD8, 0x74F4, 0xD2BE, 0x74F5, 0xD2BF,
01690     0x74F6, 0xB27E, 0x74F7, 0xB2A1, 0x74FB, 0xDAAB, 0x74FD, 0xDEC2,
01691     0x74FE, 0xDEC1, 0x74FF, 0xDEC0, 0x7500, 0xE2D5, 0x7502, 0xE2D6,
01692     0x7503, 0xE2D7, 0x7504, 0xBAC2, 0x7507, 0xE6AD, 0x7508, 0xE6AC,
01693     0x750B, 0xEA69, 0x750C, 0xBF5E, 0x750D, 0xBF5F, 0x750F, 0xED72,
01694     0x7510, 0xED6F, 0x7511, 0xED70, 0x7512, 0xED71, 0x7513, 0xF049,
01695     0x7514, 0xF048, 0x7515, 0xC27C, 0x7516, 0xF277, 0x7517, 0xF5DE,
01696     0x7518, 0xA5CC, 0x751A, 0xACC6, 0x751C, 0xB2A2, 0x751D, 0xDEC3,
01697     0x751F, 0xA5CD, 0x7521, 0xD2C0, 0x7522, 0xB2A3, 0x7525, 0xB563,
01698     0x7526, 0xB564, 0x7528, 0xA5CE, 0x7529, 0xA5CF, 0x752A, 0xCA46,
01699     0x752B, 0xA86A, 0x752C, 0xA869, 0x752D, 0xACC7, 0x752E, 0xCFD9,
01700     0x752F, 0xDAAC, 0x7530, 0xA5D0, 0x7531, 0xA5D1, 0x7532, 0xA5D2,
01701     0x7533, 0xA5D3, 0x7537, 0xA86B, 0x7538, 0xA86C, 0x7539, 0xCB6E,
01702     0x753A, 0xCB6D, 0x753D, 0xAAB6, 0x753E, 0xCD72, 0x753F, 0xCD70,
01703     0x7540, 0xCD71, 0x7547, 0xCFDA, 0x7548, 0xCFDB, 0x754B, 0xACCB,
01704     0x754C, 0xACC9, 0x754E, 0xACCA, 0x754F, 0xACC8, 0x7554, 0xAF60,
01705     0x7559, 0xAF64, 0x755A, 0xAF63, 0x755B, 0xD2C1, 0x755C, 0xAF62,
01706     0x755D, 0xAF61, 0x755F, 0xD2C2, 0x7562, 0xB2A6, 0x7563, 0xD67B,
01707     0x7564, 0xD67A, 0x7565, 0xB2A4, 0x7566, 0xB2A5, 0x756A, 0xB566,
01708     0x756B, 0xB565, 0x756C, 0xDAAE, 0x756F, 0xDAAD, 0x7570, 0xB2A7,
01709     0x7576, 0xB7ED, 0x7577, 0xDEC5, 0x7578, 0xB7EE, 0x7579, 0xDEC4,
01710     0x757D, 0xE2D8, 0x757E, 0xE6AE, 0x757F, 0xBD42, 0x7580, 0xEA6A,
01711     0x7584, 0xED73, 0x7586, 0xC3A6, 0x7587, 0xC3A5, 0x758A, 0xC57C,
01712     0x758B, 0xA5D4, 0x758C, 0xCD73, 0x758F, 0xB2A8, 0x7590, 0xE2D9,
01713     0x7591, 0xBAC3, 0x7594, 0xCB6F, 0x7595, 0xCB70, 0x7598, 0xCD74,
01714     0x7599, 0xAAB8, 0x759A, 0xAAB9, 0x759D, 0xAAB7, 0x75A2, 0xACCF,
01715     0x75A3, 0xACD0, 0x75A4, 0xACCD, 0x75A5, 0xACCE, 0x75A7, 0xCFDC,
01716     0x75AA, 0xCFDD, 0x75AB, 0xACCC, 0x75B0, 0xD2C3, 0x75B2, 0xAF68,
01717     0x75B3, 0xAF69, 0x75B5, 0xB2AB, 0x75B6, 0xD2C9, 0x75B8, 0xAF6E,
01718     0x75B9, 0xAF6C, 0x75BA, 0xD2CA, 0x75BB, 0xD2C5, 0x75BC, 0xAF6B,
01719     0x75BD, 0xAF6A, 0x75BE, 0xAF65, 0x75BF, 0xD2C8, 0x75C0, 0xD2C7,
01720     0x75C1, 0xD2C4, 0x75C2, 0xAF6D, 0x75C4, 0xD2C6, 0x75C5, 0xAF66,
01721     0x75C7, 0xAF67, 0x75CA, 0xB2AC, 0x75CB, 0xD6A1, 0x75CC, 0xD6A2,
01722     0x75CD, 0xB2AD, 0x75CE, 0xD67C, 0x75CF, 0xD67E, 0x75D0, 0xD6A4,
01723     0x75D1, 0xD6A3, 0x75D2, 0xD67D, 0x75D4, 0xB2A9, 0x75D5, 0xB2AA,
01724     0x75D7, 0xDAB6, 0x75D8, 0xB56B, 0x75D9, 0xB56A, 0x75DA, 0xDAB0,
01725     0x75DB, 0xB568, 0x75DD, 0xDAB3, 0x75DE, 0xB56C, 0x75DF, 0xDAB4,
01726     0x75E0, 0xB56D, 0x75E1, 0xDAB1, 0x75E2, 0xB567, 0x75E3, 0xB569,
01727     0x75E4, 0xDAB5, 0x75E6, 0xDAB2, 0x75E7, 0xDAAF, 0x75ED, 0xDED2,
01728     0x75EF, 0xDEC7, 0x75F0, 0xB7F0, 0x75F1, 0xB7F3, 0x75F2, 0xB7F2,
01729     0x75F3, 0xB7F7, 0x75F4, 0xB7F6, 0x75F5, 0xDED3, 0x75F6, 0xDED1,
01730     0x75F7, 0xDECA, 0x75F8, 0xDECE, 0x75F9, 0xDECD, 0x75FA, 0xB7F4,
01731     0x75FB, 0xDED0, 0x75FC, 0xDECC, 0x75FD, 0xDED4, 0x75FE, 0xDECB,
01732     0x75FF, 0xB7F5, 0x7600, 0xB7EF, 0x7601, 0xB7F1, 0x7603, 0xDEC9,
01733     0x7608, 0xE2DB, 0x7609, 0xBAC7, 0x760A, 0xE2DF, 0x760B, 0xBAC6,
01734     0x760C, 0xE2DC, 0x760D, 0xBAC5, 0x760F, 0xDEC8, 0x7610, 0xDECF,
01735     0x7611, 0xE2DE, 0x7613, 0xBAC8, 0x7614, 0xE2E0, 0x7615, 0xE2DD,
01736     0x7616, 0xE2DA, 0x7619, 0xE6B1, 0x761A, 0xE6B5, 0x761B, 0xE6B7,
01737     0x761C, 0xE6B3, 0x761D, 0xE6B2, 0x761E, 0xE6B0, 0x761F, 0xBD45,
01738     0x7620, 0xBD43, 0x7621, 0xBD48, 0x7622, 0xBD49, 0x7623, 0xE6B4,
01739     0x7624, 0xBD46, 0x7625, 0xE6AF, 0x7626, 0xBD47, 0x7627, 0xBAC4,
01740     0x7628, 0xE6B6, 0x7629, 0xBD44, 0x762D, 0xEA6C, 0x762F, 0xEA6B,
01741     0x7630, 0xEA73, 0x7631, 0xEA6D, 0x7632, 0xEA72, 0x7633, 0xEA6F,
01742     0x7634, 0xBF60, 0x7635, 0xEA71, 0x7638, 0xBF61, 0x763A, 0xBF62,
01743     0x763C, 0xEA70, 0x763D, 0xEA6E, 0x7642, 0xC0F8, 0x7643, 0xED74,
01744     0x7646, 0xC0F7, 0x7647, 0xED77, 0x7648, 0xED75, 0x7649, 0xED76,
01745     0x764C, 0xC0F9, 0x7650, 0xF04D, 0x7652, 0xC2A1, 0x7653, 0xF04E,
01746     0x7656, 0xC27D, 0x7657, 0xF04F, 0x7658, 0xC27E, 0x7659, 0xF04C,
01747     0x765A, 0xF050, 0x765C, 0xF04A, 0x765F, 0xC3A7, 0x7660, 0xF278,
01748     0x7661, 0xC3A8, 0x7662, 0xC46F, 0x7664, 0xF04B, 0x7665, 0xC470,
01749     0x7669, 0xC4EE, 0x766A, 0xF5DF, 0x766C, 0xC57E, 0x766D, 0xF6F4,
01750     0x766E, 0xC57D, 0x7670, 0xF7EA, 0x7671, 0xC5F5, 0x7672, 0xC5F6,
01751     0x7675, 0xF9CC, 0x7678, 0xACD1, 0x7679, 0xCFDE, 0x767B, 0xB56E,
01752     0x767C, 0xB56F, 0x767D, 0xA5D5, 0x767E, 0xA6CA, 0x767F, 0xCA47,
01753     0x7681, 0xCB71, 0x7682, 0xA86D, 0x7684, 0xAABA, 0x7686, 0xACD2,
01754     0x7687, 0xACD3, 0x7688, 0xACD4, 0x7689, 0xD6A6, 0x768A, 0xD2CB,
01755     0x768B, 0xAF6F, 0x768E, 0xB2AE, 0x768F, 0xD6A5, 0x7692, 0xDAB8,
01756     0x7693, 0xB571, 0x7695, 0xDAB7, 0x7696, 0xB570, 0x7699, 0xDED5,
01757     0x769A, 0xBD4A, 0x769B, 0xE6BB, 0x769C, 0xE6B8, 0x769D, 0xE6B9,
01758     0x769E, 0xE6BA, 0x76A4, 0xED78, 0x76A6, 0xF051, 0x76AA, 0xF471,
01759     0x76AB, 0xF470, 0x76AD, 0xF6F5, 0x76AE, 0xA5D6, 0x76AF, 0xCD75,
01760     0x76B0, 0xAF70, 0x76B4, 0xB572, 0x76B5, 0xDED6, 0x76B8, 0xE2E1,
01761     0x76BA, 0xBD4B, 0x76BB, 0xEA74, 0x76BD, 0xF052, 0x76BE, 0xF472,
01762     0x76BF, 0xA5D7, 0x76C2, 0xAABB, 0x76C3, 0xACD7, 0x76C4, 0xCFDF,
01763     0x76C5, 0xACD8, 0x76C6, 0xACD6, 0x76C8, 0xACD5, 0x76C9, 0xD2CC,
01764     0x76CA, 0xAF71, 0x76CD, 0xAF72, 0x76CE, 0xAF73, 0x76D2, 0xB2B0,
01765     0x76D3, 0xD6A7, 0x76D4, 0xB2AF, 0x76DA, 0xDAB9, 0x76DB, 0xB2B1,
01766     0x76DC, 0xB573, 0x76DD, 0xDED7, 0x76DE, 0xB7F8, 0x76DF, 0xB7F9,
01767     0x76E1, 0xBAC9, 0x76E3, 0xBACA, 0x76E4, 0xBD4C, 0x76E5, 0xBF64,
01768     0x76E6, 0xEA75, 0x76E7, 0xBF63, 0x76E9, 0xED79, 0x76EA, 0xC0FA,
01769     0x76EC, 0xF053, 0x76ED, 0xF473, 0x76EE, 0xA5D8, 0x76EF, 0xA86E,
01770     0x76F0, 0xCD78, 0x76F1, 0xCD77, 0x76F2, 0xAABC, 0x76F3, 0xCD76,
01771     0x76F4, 0xAABD, 0x76F5, 0xCD79, 0x76F7, 0xCFE5, 0x76F8, 0xACDB,
01772     0x76F9, 0xACDA, 0x76FA, 0xCFE7, 0x76FB, 0xCFE6, 0x76FC, 0xACDF,
01773     0x76FE, 0xACDE, 0x7701, 0xACD9, 0x7703, 0xCFE1, 0x7704, 0xCFE2,
01774     0x7705, 0xCFE3, 0x7707, 0xACE0, 0x7708, 0xCFE0, 0x7709, 0xACDC,
01775     0x770A, 0xCFE4, 0x770B, 0xACDD, 0x7710, 0xD2CF, 0x7711, 0xD2D3,
01776     0x7712, 0xD2D1, 0x7713, 0xD2D0, 0x7715, 0xD2D4, 0x7719, 0xD2D5,
01777     0x771A, 0xD2D6, 0x771B, 0xD2CE, 0x771D, 0xD2CD, 0x771F, 0xAF75,
01778     0x7720, 0xAF76, 0x7722, 0xD2D7, 0x7723, 0xD2D2, 0x7725, 0xD6B0,
01779     0x7727, 0xD2D8, 0x7728, 0xAF77, 0x7729, 0xAF74, 0x772D, 0xD6AA,
01780     0x772F, 0xD6A9, 0x7731, 0xD6AB, 0x7732, 0xD6AC, 0x7733, 0xD6AE,
01781     0x7734, 0xD6AD, 0x7735, 0xD6B2, 0x7736, 0xB2B5, 0x7737, 0xB2B2,
01782     0x7738, 0xB2B6, 0x7739, 0xD6A8, 0x773A, 0xB2B7, 0x773B, 0xD6B1,
01783     0x773C, 0xB2B4, 0x773D, 0xD6AF, 0x773E, 0xB2B3, 0x7744, 0xDABC,
01784     0x7745, 0xDABE, 0x7746, 0xDABA, 0x7747, 0xDABB, 0x774A, 0xDABF,
01785     0x774B, 0xDAC1, 0x774C, 0xDAC2, 0x774D, 0xDABD, 0x774E, 0xDAC0,
01786     0x774F, 0xB574, 0x7752, 0xDEDB, 0x7754, 0xDEE0, 0x7755, 0xDED8,
01787     0x7756, 0xDEDC, 0x7759, 0xDEE1, 0x775A, 0xDEDD, 0x775B, 0xB7FA,
01788     0x775C, 0xB843, 0x775E, 0xB7FD, 0x775F, 0xDED9, 0x7760, 0xDEDA,
01789     0x7761, 0xBACE, 0x7762, 0xB846, 0x7763, 0xB7FE, 0x7765, 0xB844,
01790     0x7766, 0xB7FC, 0x7767, 0xDEDF, 0x7768, 0xB845, 0x7769, 0xDEDE,
01791     0x776A, 0xB841, 0x776B, 0xB7FB, 0x776C, 0xB842, 0x776D, 0xDEE2,
01792     0x776E, 0xE2E6, 0x776F, 0xE2E8, 0x7779, 0xB840, 0x777C, 0xE2E3,
01793     0x777D, 0xBACC, 0x777E, 0xE2E9, 0x777F, 0xBACD, 0x7780, 0xE2E7,
01794     0x7781, 0xE2E2, 0x7782, 0xE2E5, 0x7783, 0xE2EA, 0x7784, 0xBACB,
01795     0x7785, 0xE2E4, 0x7787, 0xBD4E, 0x7788, 0xE6BF, 0x7789, 0xE6BE,
01796     0x778B, 0xBD51, 0x778C, 0xBD4F, 0x778D, 0xE6BC, 0x778E, 0xBD4D,
01797     0x778F, 0xE6BD, 0x7791, 0xBD50, 0x7795, 0xEA7D, 0x7797, 0xEAA1,
01798     0x7799, 0xEA7E, 0x779A, 0xEA76, 0x779B, 0xEA7A, 0x779C, 0xEA79,
01799     0x779D, 0xEA77, 0x779E, 0xBF66, 0x779F, 0xBF67, 0x77A0, 0xBF65,
01800     0x77A1, 0xEA78, 0x77A2, 0xEA7B, 0x77A3, 0xEA7C, 0x77A5, 0xBF68,
01801     0x77A7, 0xC140, 0x77A8, 0xEDA3, 0x77AA, 0xC0FC, 0x77AB, 0xED7B,
01802     0x77AC, 0xC0FE, 0x77AD, 0xC141, 0x77B0, 0xC0FD, 0x77B1, 0xEDA2,
01803     0x77B2, 0xED7C, 0x77B3, 0xC0FB, 0x77B4, 0xEDA1, 0x77B5, 0xED7A,
01804     0x77B6, 0xED7E, 0x77B7, 0xED7D, 0x77BA, 0xF055, 0x77BB, 0xC2A4,
01805     0x77BC, 0xC2A5, 0x77BD, 0xC2A2, 0x77BF, 0xC2A3, 0x77C2, 0xF054,
01806     0x77C4, 0xF27B, 0x77C7, 0xC3A9, 0x77C9, 0xF279, 0x77CA, 0xF27A,
01807     0x77CC, 0xF474, 0x77CD, 0xF477, 0x77CE, 0xF475, 0x77CF, 0xF476,
01808     0x77D0, 0xF5E0, 0x77D3, 0xC4EF, 0x77D4, 0xF7EB, 0x77D5, 0xF8B4,
01809     0x77D7, 0xC5F7, 0x77D8, 0xF8F8, 0x77D9, 0xF8F9, 0x77DA, 0xC666,
01810     0x77DB, 0xA5D9, 0x77DC, 0xACE1, 0x77DE, 0xDAC3, 0x77E0, 0xDEE3,
01811     0x77E2, 0xA5DA, 0x77E3, 0xA86F, 0x77E5, 0xAABE, 0x77E7, 0xCFE8,
01812     0x77E8, 0xCFE9, 0x77E9, 0xAF78, 0x77EC, 0xDAC4, 0x77ED, 0xB575,
01813     0x77EE, 0xB847, 0x77EF, 0xC142, 0x77F0, 0xEDA4, 0x77F1, 0xF27C,
01814     0x77F2, 0xF478, 0x77F3, 0xA5DB, 0x77F7, 0xCDA1, 0x77F8, 0xCD7A,
01815     0x77F9, 0xCD7C, 0x77FA, 0xCD7E, 0x77FB, 0xCD7D, 0x77FC, 0xCD7B,
01816     0x77FD, 0xAABF, 0x7802, 0xACE2, 0x7803, 0xCFF2, 0x7805, 0xCFED,
01817     0x7806, 0xCFEA, 0x7809, 0xCFF1, 0x780C, 0xACE4, 0x780D, 0xACE5,
01818     0x780E, 0xCFF0, 0x780F, 0xCFEF, 0x7810, 0xCFEE, 0x7811, 0xCFEB,
01819     0x7812, 0xCFEC, 0x7813, 0xCFF3, 0x7814, 0xACE3, 0x781D, 0xAF7C,
01820     0x781F, 0xAFA4, 0x7820, 0xAFA3, 0x7821, 0xD2E1, 0x7822, 0xD2DB,
01821     0x7823, 0xD2D9, 0x7825, 0xAFA1, 0x7826, 0xD6B9, 0x7827, 0xAF7A,
01822     0x7828, 0xD2DE, 0x7829, 0xD2E2, 0x782A, 0xD2E4, 0x782B, 0xD2E0,
01823     0x782C, 0xD2DA, 0x782D, 0xAFA2, 0x782E, 0xD2DF, 0x782F, 0xD2DD,
01824     0x7830, 0xAF79, 0x7831, 0xD2E5, 0x7832, 0xAFA5, 0x7833, 0xD2E3,
01825     0x7834, 0xAF7D, 0x7835, 0xD2DC, 0x7837, 0xAF7E, 0x7838, 0xAF7B,
01826     0x7843, 0xB2B9, 0x7845, 0xD6BA, 0x7848, 0xD6B3, 0x7849, 0xD6B5,
01827     0x784A, 0xD6B7, 0x784C, 0xD6B8, 0x784D, 0xD6B6, 0x784E, 0xB2BA,
01828     0x7850, 0xD6BB, 0x7852, 0xD6B4, 0x785C, 0xDAC8, 0x785D, 0xB576,
01829     0x785E, 0xDAD0, 0x7860, 0xDAC5, 0x7862, 0xDAD1, 0x7864, 0xDAC6,
01830     0x7865, 0xDAC7, 0x7868, 0xDACF, 0x7869, 0xDACE, 0x786A, 0xDACB,
01831     0x786B, 0xB2B8, 0x786C, 0xB577, 0x786D, 0xDAC9, 0x786E, 0xDACC,
01832     0x786F, 0xB578, 0x7870, 0xDACD, 0x7871, 0xDACA, 0x7879, 0xDEEE,
01833     0x787B, 0xDEF2, 0x787C, 0xB84E, 0x787E, 0xE2F0, 0x787F, 0xB851,
01834     0x7880, 0xDEF0, 0x7881, 0xF9D6, 0x7883, 0xDEED, 0x7884, 0xDEE8,
01835     0x7885, 0xDEEA, 0x7886, 0xDEEB, 0x7887, 0xDEE4, 0x7889, 0xB84D,
01836     0x788C, 0xB84C, 0x788E, 0xB848, 0x788F, 0xDEE7, 0x7891, 0xB84F,
01837     0x7893, 0xB850, 0x7894, 0xDEE6, 0x7895, 0xDEE9, 0x7896, 0xDEF1,
01838     0x7897, 0xB84A, 0x7898, 0xB84B, 0x7899, 0xDEEF, 0x789A, 0xDEE5,
01839     0x789E, 0xE2F2, 0x789F, 0xBAD0, 0x78A0, 0xE2F4, 0x78A1, 0xDEEC,
01840     0x78A2, 0xE2F6, 0x78A3, 0xBAD4, 0x78A4, 0xE2F7, 0x78A5, 0xE2F3,
01841     0x78A7, 0xBAD1, 0x78A8, 0xE2EF, 0x78A9, 0xBAD3, 0x78AA, 0xE2EC,
01842     0x78AB, 0xE2F1, 0x78AC, 0xE2F5, 0x78AD, 0xE2EE, 0x78B0, 0xB849,
01843     0x78B2, 0xE2EB, 0x78B3, 0xBAD2, 0x78B4, 0xE2ED, 0x78BA, 0xBD54,
01844     0x78BB, 0xE6C1, 0x78BC, 0xBD58, 0x78BE, 0xBD56, 0x78C1, 0xBACF,
01845     0x78C3, 0xE6C8, 0x78C4, 0xE6C9, 0x78C5, 0xBD53, 0x78C8, 0xE6C7,
01846     0x78C9, 0xE6CA, 0x78CA, 0xBD55, 0x78CB, 0xBD52, 0x78CC, 0xE6C3,
01847     0x78CD, 0xE6C0, 0x78CE, 0xE6C5, 0x78CF, 0xE6C2, 0x78D0, 0xBD59,
01848     0x78D1, 0xE6C4, 0x78D4, 0xE6C6, 0x78D5, 0xBD57, 0x78DA, 0xBF6A,
01849     0x78DB, 0xEAA8, 0x78DD, 0xEAA2, 0x78DE, 0xEAA6, 0x78DF, 0xEAAC,
01850     0x78E0, 0xEAAD, 0x78E1, 0xEAA9, 0x78E2, 0xEAAA, 0x78E3, 0xEAA7,
01851     0x78E5, 0xEAA4, 0x78E7, 0xBF6C, 0x78E8, 0xBF69, 0x78E9, 0xEAA3,
01852     0x78EA, 0xEAA5, 0x78EC, 0xBF6B, 0x78ED, 0xEAAB, 0x78EF, 0xC146,
01853     0x78F2, 0xEDAA, 0x78F3, 0xEDA5, 0x78F4, 0xC145, 0x78F7, 0xC143,
01854     0x78F9, 0xEDAC, 0x78FA, 0xC144, 0x78FB, 0xEDA8, 0x78FC, 0xEDA9,
01855     0x78FD, 0xEDA6, 0x78FE, 0xEDAD, 0x78FF, 0xF056, 0x7901, 0xC147,
01856     0x7902, 0xEDA7, 0x7904, 0xEDAE, 0x7905, 0xEDAB, 0x7909, 0xF05A,
01857     0x790C, 0xF057, 0x790E, 0xC2A6, 0x7910, 0xF05B, 0x7911, 0xF05D,
01858     0x7912, 0xF05C, 0x7913, 0xF058, 0x7914, 0xF059, 0x7917, 0xF2A3,
01859     0x7919, 0xC3AA, 0x791B, 0xF27E, 0x791C, 0xF2A2, 0x791D, 0xF27D,
01860     0x791E, 0xF2A4, 0x7921, 0xF2A1, 0x7923, 0xF47A, 0x7924, 0xF47D,
01861     0x7925, 0xF479, 0x7926, 0xC471, 0x7927, 0xF47B, 0x7928, 0xF47C,
01862     0x7929, 0xF47E, 0x792A, 0xC472, 0x792B, 0xC474, 0x792C, 0xC473,
01863     0x792D, 0xF5E1, 0x792F, 0xF5E3, 0x7931, 0xF5E2, 0x7935, 0xF6F6,
01864     0x7938, 0xF8B5, 0x7939, 0xF8FA, 0x793A, 0xA5DC, 0x793D, 0xCB72,
01865     0x793E, 0xAAC0, 0x793F, 0xCDA3, 0x7940, 0xAAC1, 0x7941, 0xAAC2,
01866     0x7942, 0xCDA2, 0x7944, 0xCFF8, 0x7945, 0xCFF7, 0x7946, 0xACE6,
01867     0x7947, 0xACE9, 0x7948, 0xACE8, 0x7949, 0xACE7, 0x794A, 0xCFF4,
01868     0x794B, 0xCFF6, 0x794C, 0xCFF5, 0x794F, 0xD2E8, 0x7950, 0xAFA7,
01869     0x7951, 0xD2EC, 0x7952, 0xD2EB, 0x7953, 0xD2EA, 0x7954, 0xD2E6,
01870     0x7955, 0xAFA6, 0x7956, 0xAFAA, 0x7957, 0xAFAD, 0x795A, 0xAFAE,
01871     0x795B, 0xD2E7, 0x795C, 0xD2E9, 0x795D, 0xAFAC, 0x795E, 0xAFAB,
01872     0x795F, 0xAFA9, 0x7960, 0xAFA8, 0x7961, 0xD6C2, 0x7963, 0xD6C0,
01873     0x7964, 0xD6BC, 0x7965, 0xB2BB, 0x7967, 0xD6BD, 0x7968, 0xB2BC,
01874     0x7969, 0xD6BE, 0x796A, 0xD6BF, 0x796B, 0xD6C1, 0x796D, 0xB2BD,
01875     0x7970, 0xDAD5, 0x7972, 0xDAD4, 0x7973, 0xDAD3, 0x7974, 0xDAD2,
01876     0x7979, 0xDEF6, 0x797A, 0xB852, 0x797C, 0xDEF3, 0x797D, 0xDEF5,
01877     0x797F, 0xB853, 0x7981, 0xB854, 0x7982, 0xDEF4, 0x7988, 0xE341,
01878     0x798A, 0xE2F9, 0x798B, 0xE2FA, 0x798D, 0xBAD7, 0x798E, 0xBAD5,
01879     0x798F, 0xBAD6, 0x7990, 0xE343, 0x7992, 0xE342, 0x7993, 0xE2FE,
01880     0x7994, 0xE2FD, 0x7995, 0xE2FC, 0x7996, 0xE2FB, 0x7997, 0xE340,
01881     0x7998, 0xE2F8, 0x799A, 0xE6CB, 0x799B, 0xE6D0, 0x799C, 0xE6CE,
01882     0x79A0, 0xE6CD, 0x79A1, 0xE6CC, 0x79A2, 0xE6CF, 0x79A4, 0xEAAE,
01883     0x79A6, 0xBF6D, 0x79A7, 0xC148, 0x79A8, 0xEDB0, 0x79AA, 0xC149,
01884     0x79AB, 0xEDAF, 0x79AC, 0xF05F, 0x79AD, 0xF05E, 0x79AE, 0xC2A7,
01885     0x79B0, 0xF2A5, 0x79B1, 0xC3AB, 0x79B2, 0xF4A1, 0x79B3, 0xC5A1,
01886     0x79B4, 0xF6F7, 0x79B6, 0xF8B7, 0x79B7, 0xF8B6, 0x79B8, 0xC9A8,
01887     0x79B9, 0xACEA, 0x79BA, 0xACEB, 0x79BB, 0xD6C3, 0x79BD, 0xB856,
01888     0x79BE, 0xA5DD, 0x79BF, 0xA872, 0x79C0, 0xA871, 0x79C1, 0xA870,
01889     0x79C5, 0xCDA4, 0x79C8, 0xAAC4, 0x79C9, 0xAAC3, 0x79CB, 0xACEE,
01890     0x79CD, 0xCFFA, 0x79CE, 0xCFFD, 0x79CF, 0xCFFB, 0x79D1, 0xACEC,
01891     0x79D2, 0xACED, 0x79D5, 0xCFF9, 0x79D6, 0xCFFC, 0x79D8, 0xAFB5,
01892     0x79DC, 0xD2F3, 0x79DD, 0xD2F5, 0x79DE, 0xD2F4, 0x79DF, 0xAFB2,
01893     0x79E0, 0xD2EF, 0x79E3, 0xAFB0, 0x79E4, 0xAFAF, 0x79E6, 0xAFB3,
01894     0x79E7, 0xAFB1, 0x79E9, 0xAFB4, 0x79EA, 0xD2F2, 0x79EB, 0xD2ED,
01895     0x79EC, 0xD2EE, 0x79ED, 0xD2F1, 0x79EE, 0xD2F0, 0x79F6, 0xD6C6,
01896     0x79F7, 0xD6C7, 0x79F8, 0xD6C5, 0x79FA, 0xD6C4, 0x79FB, 0xB2BE,
01897     0x7A00, 0xB57D, 0x7A02, 0xDAD6, 0x7A03, 0xDAD8, 0x7A04, 0xDADA,
01898     0x7A05, 0xB57C, 0x7A08, 0xB57A, 0x7A0A, 0xDAD7, 0x7A0B, 0xB57B,
01899     0x7A0C, 0xDAD9, 0x7A0D, 0xB579, 0x7A10, 0xDF41, 0x7A11, 0xDEF7,
01900     0x7A12, 0xDEFA, 0x7A13, 0xDEFE, 0x7A14, 0xB85A, 0x7A15, 0xDEFC,
01901     0x7A17, 0xDEFB, 0x7A18, 0xDEF8, 0x7A19, 0xDEF9, 0x7A1A, 0xB858,
01902     0x7A1B, 0xDF40, 0x7A1C, 0xB857, 0x7A1E, 0xB85C, 0x7A1F, 0xB85B,
01903     0x7A20, 0xB859, 0x7A22, 0xDEFD, 0x7A26, 0xE349, 0x7A28, 0xE348,
01904     0x7A2B, 0xE344, 0x7A2E, 0xBAD8, 0x7A2F, 0xE347, 0x7A30, 0xE346,
01905     0x7A31, 0xBAD9, 0x7A37, 0xBD5E, 0x7A39, 0xE6D2, 0x7A3B, 0xBD5F,
01906     0x7A3C, 0xBD5B, 0x7A3D, 0xBD5D, 0x7A3F, 0xBD5A, 0x7A40, 0xBD5C,
01907     0x7A44, 0xEAAF, 0x7A46, 0xBF70, 0x7A47, 0xEAB1, 0x7A48, 0xEAB0,
01908     0x7A4A, 0xE345, 0x7A4B, 0xBF72, 0x7A4C, 0xBF71, 0x7A4D, 0xBF6E,
01909     0x7A4E, 0xBF6F, 0x7A54, 0xEDB5, 0x7A56, 0xEDB3, 0x7A57, 0xC14A,
01910     0x7A58, 0xEDB4, 0x7A5A, 0xEDB6, 0x7A5B, 0xEDB2, 0x7A5C, 0xEDB1,
01911     0x7A5F, 0xF060, 0x7A60, 0xC2AA, 0x7A61, 0xC2A8, 0x7A62, 0xC2A9,
01912     0x7A67, 0xF2A6, 0x7A68, 0xF2A7, 0x7A69, 0xC3AD, 0x7A6B, 0xC3AC,
01913     0x7A6C, 0xF4A3, 0x7A6D, 0xF4A4, 0x7A6E, 0xF4A2, 0x7A70, 0xF6F8,
01914     0x7A71, 0xF6F9, 0x7A74, 0xA5DE, 0x7A75, 0xCA48, 0x7A76, 0xA873,
01915     0x7A78, 0xCDA5, 0x7A79, 0xAAC6, 0x7A7A, 0xAAC5, 0x7A7B, 0xCDA6,
01916     0x7A7E, 0xD040, 0x7A7F, 0xACEF, 0x7A80, 0xCFFE, 0x7A81, 0xACF0,
01917     0x7A84, 0xAFB6, 0x7A85, 0xD2F8, 0x7A86, 0xD2F6, 0x7A87, 0xD2FC,
01918     0x7A88, 0xAFB7, 0x7A89, 0xD2F7, 0x7A8A, 0xD2FB, 0x7A8B, 0xD2F9,
01919     0x7A8C, 0xD2FA, 0x7A8F, 0xD6C8, 0x7A90, 0xD6CA, 0x7A92, 0xB2BF,
01920     0x7A94, 0xD6C9, 0x7A95, 0xB2C0, 0x7A96, 0xB5A2, 0x7A97, 0xB5A1,
01921     0x7A98, 0xB57E, 0x7A99, 0xDADB, 0x7A9E, 0xDF44, 0x7A9F, 0xB85D,
01922     0x7AA0, 0xB85E, 0x7AA2, 0xDF43, 0x7AA3, 0xDF42, 0x7AA8, 0xE34A,
01923     0x7AA9, 0xBADB, 0x7AAA, 0xBADA, 0x7AAB, 0xE34B, 0x7AAC, 0xE34C,
01924     0x7AAE, 0xBD61, 0x7AAF, 0xBD60, 0x7AB1, 0xEAB5, 0x7AB2, 0xE6D3,
01925     0x7AB3, 0xE6D5, 0x7AB4, 0xE6D4, 0x7AB5, 0xEAB4, 0x7AB6, 0xEAB2,
01926     0x7AB7, 0xEAB6, 0x7AB8, 0xEAB3, 0x7ABA, 0xBF73, 0x7ABE, 0xEDB7,
01927     0x7ABF, 0xC14B, 0x7AC0, 0xEDB8, 0x7AC1, 0xEDB9, 0x7AC4, 0xC2AB,
01928     0x7AC5, 0xC2AC, 0x7AC7, 0xC475, 0x7ACA, 0xC5D1, 0x7ACB, 0xA5DF,
01929     0x7AD1, 0xD041, 0x7AD8, 0xD2FD, 0x7AD9, 0xAFB8, 0x7ADF, 0xB3BA,
01930     0x7AE0, 0xB3B9, 0x7AE3, 0xB5A4, 0x7AE4, 0xDADD, 0x7AE5, 0xB5A3,
01931     0x7AE6, 0xDADC, 0x7AEB, 0xDF45, 0x7AED, 0xBADC, 0x7AEE, 0xE34D,
01932     0x7AEF, 0xBADD, 0x7AF6, 0xC476, 0x7AF7, 0xF4A5, 0x7AF9, 0xA6CB,
01933     0x7AFA, 0xAAC7, 0x7AFB, 0xCDA7, 0x7AFD, 0xACF2, 0x7AFF, 0xACF1,
01934     0x7B00, 0xD042, 0x7B01, 0xD043, 0x7B04, 0xD340, 0x7B05, 0xD342,
01935     0x7B06, 0xAFB9, 0x7B08, 0xD344, 0x7B09, 0xD347, 0x7B0A, 0xD345,
01936     0x7B0E, 0xD346, 0x7B0F, 0xD343, 0x7B10, 0xD2FE, 0x7B11, 0xAFBA,
01937     0x7B12, 0xD348, 0x7B13, 0xD341, 0x7B18, 0xD6D3, 0x7B19, 0xB2C6,
01938     0x7B1A, 0xD6DC, 0x7B1B, 0xB2C3, 0x7B1D, 0xD6D5, 0x7B1E, 0xB2C7,
01939     0x7B20, 0xB2C1, 0x7B22, 0xD6D0, 0x7B23, 0xD6DD, 0x7B24, 0xD6D1,
01940     0x7B25, 0xD6CE, 0x7B26, 0xB2C5, 0x7B28, 0xB2C2, 0x7B2A, 0xD6D4,
01941     0x7B2B, 0xD6D7, 0x7B2C, 0xB2C4, 0x7B2D, 0xD6D8, 0x7B2E, 0xB2C8,
01942     0x7B2F, 0xD6D9, 0x7B30, 0xD6CF, 0x7B31, 0xD6D6, 0x7B32, 0xD6DA,
01943     0x7B33, 0xD6D2, 0x7B34, 0xD6CD, 0x7B35, 0xD6CB, 0x7B38, 0xD6DB,
01944     0x7B3B, 0xDADF, 0x7B40, 0xDAE4, 0x7B44, 0xDAE0, 0x7B45, 0xDAE6,
01945     0x7B46, 0xB5A7, 0x7B47, 0xD6CC, 0x7B48, 0xDAE1, 0x7B49, 0xB5A5,
01946     0x7B4A, 0xDADE, 0x7B4B, 0xB5AC, 0x7B4C, 0xDAE2, 0x7B4D, 0xB5AB,
01947     0x7B4E, 0xDAE3, 0x7B4F, 0xB5AD, 0x7B50, 0xB5A8, 0x7B51, 0xB5AE,
01948     0x7B52, 0xB5A9, 0x7B54, 0xB5AA, 0x7B56, 0xB5A6, 0x7B58, 0xDAE5,
01949     0x7B60, 0xB861, 0x7B61, 0xDF50, 0x7B63, 0xDF53, 0x7B64, 0xDF47,
01950     0x7B65, 0xDF4C, 0x7B66, 0xDF46, 0x7B67, 0xB863, 0x7B69, 0xDF4A,
01951     0x7B6D, 0xDF48, 0x7B6E, 0xB862, 0x7B70, 0xDF4F, 0x7B71, 0xDF4E,
01952     0x7B72, 0xDF4B, 0x7B73, 0xDF4D, 0x7B74, 0xDF49, 0x7B75, 0xBAE1,
01953     0x7B76, 0xDF52, 0x7B77, 0xB85F, 0x7B78, 0xDF51, 0x7B82, 0xE35D,
01954     0x7B84, 0xBAE8, 0x7B85, 0xE358, 0x7B87, 0xBAE7, 0x7B88, 0xE34E,
01955     0x7B8A, 0xE350, 0x7B8B, 0xBAE0, 0x7B8C, 0xE355, 0x7B8D, 0xE354,
01956     0x7B8E, 0xE357, 0x7B8F, 0xBAE5, 0x7B90, 0xE352, 0x7B91, 0xE351,
01957     0x7B94, 0xBAE4, 0x7B95, 0xBADF, 0x7B96, 0xE353, 0x7B97, 0xBAE2,
01958     0x7B98, 0xE359, 0x7B99, 0xE35B, 0x7B9B, 0xE356, 0x7B9C, 0xE34F,
01959     0x7B9D, 0xBAE3, 0x7BA0, 0xBD69, 0x7BA1, 0xBADE, 0x7BA4, 0xE35C,
01960     0x7BAC, 0xE6D9, 0x7BAD, 0xBD62, 0x7BAF, 0xE6DB, 0x7BB1, 0xBD63,
01961     0x7BB4, 0xBD65, 0x7BB5, 0xE6DE, 0x7BB7, 0xE6D6, 0x7BB8, 0xBAE6,
01962     0x7BB9, 0xE6DC, 0x7BBE, 0xE6D8, 0x7BC0, 0xB860, 0x7BC1, 0xBD68,
01963     0x7BC4, 0xBD64, 0x7BC6, 0xBD66, 0x7BC7, 0xBD67, 0x7BC9, 0xBF76,
01964     0x7BCA, 0xE6DD, 0x7BCB, 0xE6D7, 0x7BCC, 0xBD6A, 0x7BCE, 0xE6DA,
01965     0x7BD4, 0xEAC0, 0x7BD5, 0xEABB, 0x7BD8, 0xEAC5, 0x7BD9, 0xBF74,
01966     0x7BDA, 0xEABD, 0x7BDB, 0xBF78, 0x7BDC, 0xEAC3, 0x7BDD, 0xEABA,
01967     0x7BDE, 0xEAB7, 0x7BDF, 0xEAC6, 0x7BE0, 0xC151, 0x7BE1, 0xBF79,
01968     0x7BE2, 0xEAC2, 0x7BE3, 0xEAB8, 0x7BE4, 0xBF77, 0x7BE5, 0xEABC,
01969     0x7BE6, 0xBF7B, 0x7BE7, 0xEAB9, 0x7BE8, 0xEABE, 0x7BE9, 0xBF7A,
01970     0x7BEA, 0xEAC1, 0x7BEB, 0xEAC4, 0x7BF0, 0xEDCB, 0x7BF1, 0xEDCC,
01971     0x7BF2, 0xEDBC, 0x7BF3, 0xEDC3, 0x7BF4, 0xEDC1, 0x7BF7, 0xC14F,
01972     0x7BF8, 0xEDC8, 0x7BF9, 0xEABF, 0x7BFB, 0xEDBF, 0x7BFD, 0xEDC9,
01973     0x7BFE, 0xC14E, 0x7BFF, 0xEDBE, 0x7C00, 0xEDBD, 0x7C01, 0xEDC7,
01974     0x7C02, 0xEDC4, 0x7C03, 0xEDC6, 0x7C05, 0xEDBA, 0x7C06, 0xEDCA,
01975     0x7C07, 0xC14C, 0x7C09, 0xEDC5, 0x7C0A, 0xEDCE, 0x7C0B, 0xEDC2,
01976     0x7C0C, 0xC150, 0x7C0D, 0xC14D, 0x7C0E, 0xEDC0, 0x7C0F, 0xEDBB,
01977     0x7C10, 0xEDCD, 0x7C11, 0xBF75, 0x7C19, 0xF063, 0x7C1C, 0xF061,
01978     0x7C1D, 0xF067, 0x7C1E, 0xC2B0, 0x7C1F, 0xF065, 0x7C20, 0xF064,
01979     0x7C21, 0xC2B2, 0x7C22, 0xF06A, 0x7C23, 0xC2B1, 0x7C25, 0xF06B,
01980     0x7C26, 0xF068, 0x7C27, 0xC2AE, 0x7C28, 0xF069, 0x7C29, 0xF062,
01981     0x7C2A, 0xC2AF, 0x7C2B, 0xC2AD, 0x7C2C, 0xF2AB, 0x7C2D, 0xF066,
01982     0x7C30, 0xF06C, 0x7C33, 0xF2A8, 0x7C37, 0xC3B2, 0x7C38, 0xC3B0,
01983     0x7C39, 0xF2AA, 0x7C3B, 0xF2AC, 0x7C3C, 0xF2A9, 0x7C3D, 0xC3B1,
01984     0x7C3E, 0xC3AE, 0x7C3F, 0xC3AF, 0x7C40, 0xC3B3, 0x7C43, 0xC478,
01985     0x7C45, 0xF4AA, 0x7C47, 0xF4A9, 0x7C48, 0xF4A7, 0x7C49, 0xF4A6,
01986     0x7C4A, 0xF4A8, 0x7C4C, 0xC477, 0x7C4D, 0xC479, 0x7C50, 0xC4F0,
01987     0x7C53, 0xF5E5, 0x7C54, 0xF5E4, 0x7C57, 0xF6FA, 0x7C59, 0xF6FC,
01988     0x7C5A, 0xF6FE, 0x7C5B, 0xF6FD, 0x7C5C, 0xF6FB, 0x7C5F, 0xC5A3,
01989     0x7C60, 0xC5A2, 0x7C63, 0xC5D3, 0x7C64, 0xC5D2, 0x7C65, 0xC5D4,
01990     0x7C66, 0xF7ED, 0x7C67, 0xF7EC, 0x7C69, 0xF8FB, 0x7C6A, 0xF8B8,
01991     0x7C6B, 0xF8FC, 0x7C6C, 0xC658, 0x7C6E, 0xC659, 0x7C6F, 0xF96D,
01992     0x7C72, 0xC67E, 0x7C73, 0xA6CC, 0x7C75, 0xCDA8, 0x7C78, 0xD045,
01993     0x7C79, 0xD046, 0x7C7A, 0xD044, 0x7C7D, 0xACF3, 0x7C7F, 0xD047,
01994     0x7C80, 0xD048, 0x7C81, 0xD049, 0x7C84, 0xD349, 0x7C85, 0xD34F,
01995     0x7C88, 0xD34D, 0x7C89, 0xAFBB, 0x7C8A, 0xD34B, 0x7C8C, 0xD34C,
01996     0x7C8D, 0xD34E, 0x7C91, 0xD34A, 0x7C92, 0xB2C9, 0x7C94, 0xD6DE,
01997     0x7C95, 0xB2CB, 0x7C96, 0xD6E0, 0x7C97, 0xB2CA, 0x7C98, 0xD6DF,
01998     0x7C9E, 0xDAE8, 0x7C9F, 0xB5AF, 0x7CA1, 0xDAEA, 0x7CA2, 0xDAE7,
01999     0x7CA3, 0xD6E1, 0x7CA5, 0xB5B0, 0x7CA7, 0xF9DB, 0x7CA8, 0xDAE9,
02000     0x7CAF, 0xDF56, 0x7CB1, 0xB864, 0x7CB2, 0xDF54, 0x7CB3, 0xB865,
02001     0x7CB4, 0xDF55, 0x7CB5, 0xB866, 0x7CB9, 0xBAE9, 0x7CBA, 0xE361,
02002     0x7CBB, 0xE35E, 0x7CBC, 0xE360, 0x7CBD, 0xBAEA, 0x7CBE, 0xBAEB,
02003     0x7CBF, 0xE35F, 0x7CC5, 0xE6DF, 0x7CC8, 0xE6E0, 0x7CCA, 0xBD6B,
02004     0x7CCB, 0xE6E2, 0x7CCC, 0xE6E1, 0x7CCE, 0xA261, 0x7CD0, 0xEACA,
02005     0x7CD1, 0xEACB, 0x7CD2, 0xEAC7, 0x7CD4, 0xEAC8, 0x7CD5, 0xBF7C,
02006     0x7CD6, 0xBF7D, 0x7CD7, 0xEAC9, 0x7CD9, 0xC157, 0x7CDC, 0xC153,
02007     0x7CDD, 0xC158, 0x7CDE, 0xC154, 0x7CDF, 0xC156, 0x7CE0, 0xC152,
02008     0x7CE2, 0xC155, 0x7CE7, 0xC2B3, 0x7CE8, 0xEDCF, 0x7CEA, 0xF2AE,
02009     0x7CEC, 0xF2AD, 0x7CEE, 0xF4AB, 0x7CEF, 0xC47A, 0x7CF0, 0xC47B,
02010     0x7CF1, 0xF741, 0x7CF2, 0xF5E6, 0x7CF4, 0xF740, 0x7CF6, 0xF8FD,
02011     0x7CF7, 0xF9A4, 0x7CF8, 0xA6CD, 0x7CFB, 0xA874, 0x7CFD, 0xCDA9,
02012     0x7CFE, 0xAAC8, 0x7D00, 0xACF6, 0x7D01, 0xD04C, 0x7D02, 0xACF4,
02013     0x7D03, 0xD04A, 0x7D04, 0xACF9, 0x7D05, 0xACF5, 0x7D06, 0xACFA,
02014     0x7D07, 0xACF8, 0x7D08, 0xD04B, 0x7D09, 0xACF7, 0x7D0A, 0xAFBF,
02015     0x7D0B, 0xAFBE, 0x7D0C, 0xD35A, 0x7D0D, 0xAFC7, 0x7D0E, 0xD353,
02016     0x7D0F, 0xD359, 0x7D10, 0xAFC3, 0x7D11, 0xD352, 0x7D12, 0xD358,
02017     0x7D13, 0xD356, 0x7D14, 0xAFC2, 0x7D15, 0xAFC4, 0x7D16, 0xD355,
02018     0x7D17, 0xAFBD, 0x7D18, 0xD354, 0x7D19, 0xAFC8, 0x7D1A, 0xAFC5,
02019     0x7D1B, 0xAFC9, 0x7D1C, 0xAFC6, 0x7D1D, 0xD351, 0x7D1E, 0xD350,
02020     0x7D1F, 0xD357, 0x7D20, 0xAFC0, 0x7D21, 0xAFBC, 0x7D22, 0xAFC1,
02021     0x7D28, 0xD6F0, 0x7D29, 0xD6E9, 0x7D2B, 0xB5B5, 0x7D2C, 0xD6E8,
02022     0x7D2E, 0xB2CF, 0x7D2F, 0xB2D6, 0x7D30, 0xB2D3, 0x7D31, 0xB2D9,
02023     0x7D32, 0xB2D8, 0x7D33, 0xB2D4, 0x7D35, 0xD6E2, 0x7D36, 0xD6E5,
02024     0x7D38, 0xD6E4, 0x7D39, 0xB2D0, 0x7D3A, 0xD6E6, 0x7D3B, 0xD6EF,
02025     0x7D3C, 0xB2D1, 0x7D3D, 0xD6E3, 0x7D3E, 0xD6EC, 0x7D3F, 0xD6ED,
02026     0x7D40, 0xB2D2, 0x7D41, 0xD6EA, 0x7D42, 0xB2D7, 0x7D43, 0xB2CD,
02027     0x7D44, 0xB2D5, 0x7D45, 0xD6E7, 0x7D46, 0xB2CC, 0x7D47, 0xD6EB,
02028     0x7D4A, 0xD6EE, 0x7D4E, 0xDAFB, 0x7D4F, 0xDAF2, 0x7D50, 0xB5B2,
02029     0x7D51, 0xDAF9, 0x7D52, 0xDAF6, 0x7D53, 0xDAEE, 0x7D54, 0xDAF7,
02030     0x7D55, 0xB5B4, 0x7D56, 0xDAEF, 0x7D58, 0xDAEB, 0x7D5B, 0xB86C,
02031     0x7D5C, 0xDAF4, 0x7D5E, 0xB5B1, 0x7D5F, 0xDAFA, 0x7D61, 0xB5B8,
02032     0x7D62, 0xB5BA, 0x7D63, 0xDAED, 0x7D66, 0xB5B9, 0x7D67, 0xDAF0,
02033     0x7D68, 0xB5B3, 0x7D69, 0xDAF8, 0x7D6A, 0xDAF1, 0x7D6B, 0xDAF5,
02034     0x7D6D, 0xDAF3, 0x7D6E, 0xB5B6, 0x7D6F, 0xDAEC, 0x7D70, 0xB5BB,
02035     0x7D71, 0xB2CE, 0x7D72, 0xB5B7, 0x7D73, 0xB5BC, 0x7D79, 0xB868,
02036     0x7D7A, 0xDF5D, 0x7D7B, 0xDF5F, 0x7D7C, 0xDF61, 0x7D7D, 0xDF65,
02037     0x7D7F, 0xDF5B, 0x7D80, 0xDF59, 0x7D81, 0xB86A, 0x7D83, 0xDF60,
02038     0x7D84, 0xDF64, 0x7D85, 0xDF5C, 0x7D86, 0xDF58, 0x7D88, 0xDF57,
02039     0x7D8C, 0xDF62, 0x7D8D, 0xDF5A, 0x7D8E, 0xDF5E, 0x7D8F, 0xB86B,
02040     0x7D91, 0xB869, 0x7D92, 0xDF66, 0x7D93, 0xB867, 0x7D94, 0xDF63,
02041     0x7D96, 0xE372, 0x7D9C, 0xBAEE, 0x7D9D, 0xE36A, 0x7D9E, 0xBD78,
02042     0x7D9F, 0xE374, 0x7DA0, 0xBAF1, 0x7DA1, 0xE378, 0x7DA2, 0xBAF7,
02043     0x7DA3, 0xE365, 0x7DA6, 0xE375, 0x7DA7, 0xE362, 0x7DA9, 0xE377,
02044     0x7DAA, 0xE366, 0x7DAC, 0xBAFE, 0x7DAD, 0xBAFB, 0x7DAE, 0xE376,
02045     0x7DAF, 0xE370, 0x7DB0, 0xBAED, 0x7DB1, 0xBAF5, 0x7DB2, 0xBAF4,
02046     0x7DB4, 0xBAF3, 0x7DB5, 0xBAF9, 0x7DB7, 0xE363, 0x7DB8, 0xBAFA,
02047     0x7DB9, 0xE371, 0x7DBA, 0xBAF6, 0x7DBB, 0xBAEC, 0x7DBC, 0xE373,
02048     0x7DBD, 0xBAEF, 0x7DBE, 0xBAF0, 0x7DBF, 0xBAF8, 0x7DC0, 0xE368,
02049     0x7DC1, 0xE367, 0x7DC2, 0xE364, 0x7DC4, 0xE36C, 0x7DC5, 0xE369,
02050     0x7DC6, 0xE36D, 0x7DC7, 0xBAFD, 0x7DC9, 0xE379, 0x7DCA, 0xBAF2,
02051     0x7DCB, 0xE36E, 0x7DCC, 0xE36F, 0x7DCE, 0xE36B, 0x7DD2, 0xBAFC,
02052     0x7DD7, 0xE6E7, 0x7DD8, 0xBD70, 0x7DD9, 0xBD79, 0x7DDA, 0xBD75,
02053     0x7DDB, 0xE6E4, 0x7DDD, 0xBD72, 0x7DDE, 0xBD76, 0x7DDF, 0xE6F0,
02054     0x7DE0, 0xBD6C, 0x7DE1, 0xE6E8, 0x7DE3, 0xBD74, 0x7DE6, 0xE6EB,
02055     0x7DE7, 0xE6E6, 0x7DE8, 0xBD73, 0x7DE9, 0xBD77, 0x7DEA, 0xE6E5,
02056     0x7DEC, 0xBD71, 0x7DEE, 0xE6EF, 0x7DEF, 0xBD6E, 0x7DF0, 0xE6EE,
02057     0x7DF1, 0xE6ED, 0x7DF2, 0xBD7A, 0x7DF3, 0xE572, 0x7DF4, 0xBD6D,
02058     0x7DF6, 0xE6EC, 0x7DF7, 0xE6E3, 0x7DF9, 0xBD7B, 0x7DFA, 0xE6EA,
02059     0x7DFB, 0xBD6F, 0x7E03, 0xE6E9, 0x7E08, 0xBFA2, 0x7E09, 0xBFA7,
02060     0x7E0A, 0xBF7E, 0x7E0B, 0xEAD8, 0x7E0C, 0xEACF, 0x7E0D, 0xEADB,
02061     0x7E0E, 0xEAD3, 0x7E0F, 0xEAD9, 0x7E10, 0xBFA8, 0x7E11, 0xBFA1,
02062     0x7E12, 0xEACC, 0x7E13, 0xEAD2, 0x7E14, 0xEADC, 0x7E15, 0xEAD5,
02063     0x7E16, 0xEADA, 0x7E17, 0xEACE, 0x7E1A, 0xEAD6, 0x7E1B, 0xBFA3,
02064     0x7E1C, 0xEAD4, 0x7E1D, 0xBFA6, 0x7E1E, 0xBFA5, 0x7E1F, 0xEAD0,
02065     0x7E20, 0xEAD1, 0x7E21, 0xEACD, 0x7E22, 0xEAD7, 0x7E23, 0xBFA4,
02066     0x7E24, 0xEADE, 0x7E25, 0xEADD, 0x7E29, 0xEDDA, 0x7E2A, 0xEDD6,
02067     0x7E2B, 0xC15F, 0x7E2D, 0xEDD0, 0x7E2E, 0xC159, 0x7E2F, 0xC169,
02068     0x7E30, 0xEDDC, 0x7E31, 0xC161, 0x7E32, 0xC15D, 0x7E33, 0xEDD3,
02069     0x7E34, 0xC164, 0x7E35, 0xC167, 0x7E36, 0xEDDE, 0x7E37, 0xC15C,
02070     0x7E38, 0xEDD5, 0x7E39, 0xC165, 0x7E3A, 0xEDE0, 0x7E3B, 0xEDDD,
02071     0x7E3C, 0xEDD1, 0x7E3D, 0xC160, 0x7E3E, 0xC15A, 0x7E3F, 0xC168,
02072     0x7E40, 0xEDD8, 0x7E41, 0xC163, 0x7E42, 0xEDD2, 0x7E43, 0xC15E,
02073     0x7E44, 0xEDDF, 0x7E45, 0xC162, 0x7E46, 0xC15B, 0x7E47, 0xEDD9,
02074     0x7E48, 0xC166, 0x7E49, 0xEDD7, 0x7E4C, 0xEDDB, 0x7E50, 0xF06E,
02075     0x7E51, 0xF074, 0x7E52, 0xC2B9, 0x7E53, 0xF077, 0x7E54, 0xC2B4,
02076     0x7E55, 0xC2B5, 0x7E56, 0xF06F, 0x7E57, 0xF076, 0x7E58, 0xF071,
02077     0x7E59, 0xC2BA, 0x7E5A, 0xC2B7, 0x7E5C, 0xF06D, 0x7E5E, 0xC2B6,
02078     0x7E5F, 0xF073, 0x7E60, 0xF075, 0x7E61, 0xC2B8, 0x7E62, 0xF072,
02079     0x7E63, 0xF070, 0x7E68, 0xF2B8, 0x7E69, 0xC3B7, 0x7E6A, 0xC3B8,
02080     0x7E6B, 0xC3B4, 0x7E6D, 0xC3B5, 0x7E6F, 0xF2B4, 0x7E70, 0xF2B2,
02081     0x7E72, 0xF2B6, 0x7E73, 0xC3BA, 0x7E74, 0xF2B7, 0x7E75, 0xF2B0,
02082     0x7E76, 0xF2AF, 0x7E77, 0xF2B3, 0x7E78, 0xF2B1, 0x7E79, 0xC3B6,
02083     0x7E7A, 0xF2B5, 0x7E7B, 0xF4AC, 0x7E7C, 0xC47E, 0x7E7D, 0xC47D,
02084     0x7E7E, 0xF4AD, 0x7E80, 0xF4AF, 0x7E81, 0xF4AE, 0x7E82, 0xC4A1,
02085     0x7E86, 0xF5EB, 0x7E87, 0xF5E8, 0x7E88, 0xF5E9, 0x7E8A, 0xF5E7,
02086     0x7E8B, 0xF5EA, 0x7E8C, 0xC4F2, 0x7E8D, 0xF5EC, 0x7E8F, 0xC4F1,
02087     0x7E91, 0xF742, 0x7E93, 0xC5D5, 0x7E94, 0xC5D7, 0x7E95, 0xF7EE,
02088     0x7E96, 0xC5D6, 0x7E97, 0xF8B9, 0x7E98, 0xF940, 0x7E99, 0xF942,
02089     0x7E9A, 0xF8FE, 0x7E9B, 0xF941, 0x7E9C, 0xC66C, 0x7F36, 0xA6CE,
02090     0x7F38, 0xACFB, 0x7F39, 0xD26F, 0x7F3A, 0xAFCA, 0x7F3D, 0xB2DA,
02091     0x7F3E, 0xDAFC, 0x7F3F, 0xDAFD, 0x7F43, 0xEADF, 0x7F44, 0xC16A,
02092     0x7F45, 0xEDE1, 0x7F48, 0xC2BB, 0x7F4A, 0xF2BA, 0x7F4B, 0xF2B9,
02093     0x7F4C, 0xC4A2, 0x7F4D, 0xF5ED, 0x7F4F, 0xF743, 0x7F50, 0xC5F8,
02094     0x7F51, 0xCA49, 0x7F54, 0xAAC9, 0x7F55, 0xA875, 0x7F58, 0xD04D,
02095     0x7F5B, 0xD360, 0x7F5C, 0xD35B, 0x7F5D, 0xD35F, 0x7F5E, 0xD35D,
02096     0x7F5F, 0xAFCB, 0x7F60, 0xD35E, 0x7F61, 0xD35C, 0x7F63, 0xD6F1,
02097     0x7F65, 0xDAFE, 0x7F66, 0xDB40, 0x7F67, 0xDF69, 0x7F68, 0xDF6A,
02098     0x7F69, 0xB86E, 0x7F6A, 0xB86F, 0x7F6B, 0xDF68, 0x7F6C, 0xDF6B,
02099     0x7F6D, 0xDF67, 0x7F6E, 0xB86D, 0x7F70, 0xBB40, 0x7F72, 0xB870,
02100     0x7F73, 0xE37A, 0x7F75, 0xBD7C, 0x7F76, 0xE6F1, 0x7F77, 0xBD7D,
02101     0x7F79, 0xBFA9, 0x7F7A, 0xEAE2, 0x7F7B, 0xEAE0, 0x7F7C, 0xEAE1,
02102     0x7F7D, 0xEDE4, 0x7F7E, 0xEDE3, 0x7F7F, 0xEDE2, 0x7F83, 0xF2BB,
02103     0x7F85, 0xC3B9, 0x7F86, 0xF2BC, 0x7F87, 0xF744, 0x7F88, 0xC5F9,
02104     0x7F89, 0xF8BA, 0x7F8A, 0xA6CF, 0x7F8B, 0xAACB, 0x7F8C, 0xAACA,
02105     0x7F8D, 0xD04F, 0x7F8E, 0xACFC, 0x7F91, 0xD04E, 0x7F92, 0xD362,
02106     0x7F94, 0xAFCC, 0x7F95, 0xD6F2, 0x7F96, 0xD361, 0x7F9A, 0xB2DC,
02107     0x7F9B, 0xD6F5, 0x7F9C, 0xD6F3, 0x7F9D, 0xD6F4, 0x7F9E, 0xB2DB,
02108     0x7FA0, 0xDB42, 0x7FA1, 0xDB43, 0x7FA2, 0xDB41, 0x7FA4, 0xB873,
02109     0x7FA5, 0xDF6D, 0x7FA6, 0xDF6C, 0x7FA7, 0xDF6E, 0x7FA8, 0xB872,
02110     0x7FA9, 0xB871, 0x7FAC, 0xE6F2, 0x7FAD, 0xE6F4, 0x7FAF, 0xBD7E,
02111     0x7FB0, 0xE6F3, 0x7FB1, 0xEAE3, 0x7FB2, 0xBFAA, 0x7FB3, 0xF079,
02112     0x7FB5, 0xF078, 0x7FB6, 0xC3BB, 0x7FB7, 0xF2BD, 0x7FB8, 0xC3BD,
02113     0x7FB9, 0xC3BC, 0x7FBA, 0xF4B0, 0x7FBB, 0xF5EE, 0x7FBC, 0xC4F3,
02114     0x7FBD, 0xA6D0, 0x7FBE, 0xD050, 0x7FBF, 0xACFD, 0x7FC0, 0xD365,
02115     0x7FC1, 0xAFCE, 0x7FC2, 0xD364, 0x7FC3, 0xD363, 0x7FC5, 0xAFCD,
02116     0x7FC7, 0xD6FB, 0x7FC9, 0xD6FD, 0x7FCA, 0xD6F6, 0x7FCB, 0xD6F7,
02117     0x7FCC, 0xB2DD, 0x7FCD, 0xD6F8, 0x7FCE, 0xB2DE, 0x7FCF, 0xD6FC,
02118     0x7FD0, 0xD6F9, 0x7FD1, 0xD6FA, 0x7FD2, 0xB2DF, 0x7FD4, 0xB5BE,
02119     0x7FD5, 0xB5BF, 0x7FD7, 0xDB44, 0x7FDB, 0xDF6F, 0x7FDC, 0xDF70,
02120     0x7FDE, 0xE37E, 0x7FDF, 0xBB43, 0x7FE0, 0xBB41, 0x7FE1, 0xBB42,
02121     0x7FE2, 0xE37B, 0x7FE3, 0xE37C, 0x7FE5, 0xE37D, 0x7FE6, 0xE6F9,
02122     0x7FE8, 0xE6FA, 0x7FE9, 0xBDA1, 0x7FEA, 0xE6F7, 0x7FEB, 0xE6F6,
02123     0x7FEC, 0xE6F8, 0x7FED, 0xE6F5, 0x7FEE, 0xBFAD, 0x7FEF, 0xEAE4,
02124     0x7FF0, 0xBFAB, 0x7FF1, 0xBFAC, 0x7FF2, 0xEDE6, 0x7FF3, 0xC16B,
02125     0x7FF4, 0xEDE5, 0x7FF5, 0xEFA8, 0x7FF7, 0xF07A, 0x7FF8, 0xF07B,
02126     0x7FF9, 0xC2BC, 0x7FFB, 0xC2BD, 0x7FFC, 0xC16C, 0x7FFD, 0xF2BE,
02127     0x7FFE, 0xF2BF, 0x7FFF, 0xF4B1, 0x8000, 0xC4A3, 0x8001, 0xA6D1,
02128     0x8003, 0xA6D2, 0x8004, 0xACFE, 0x8005, 0xAACC, 0x8006, 0xAFCF,
02129     0x8007, 0xD051, 0x800B, 0xB5C0, 0x800C, 0xA6D3, 0x800D, 0xAD41,
02130     0x800E, 0xD052, 0x800F, 0xD053, 0x8010, 0xAD40, 0x8011, 0xAD42,
02131     0x8012, 0xA6D4, 0x8014, 0xD054, 0x8015, 0xAFD1, 0x8016, 0xD366,
02132     0x8017, 0xAFD3, 0x8018, 0xAFD0, 0x8019, 0xAFD2, 0x801B, 0xD741,
02133     0x801C, 0xB2E0, 0x801E, 0xD740, 0x801F, 0xD6FE, 0x8021, 0xDF71,
02134     0x8024, 0xE3A1, 0x8026, 0xBDA2, 0x8028, 0xBFAE, 0x8029, 0xEAE6,
02135     0x802A, 0xEAE5, 0x802C, 0xEDE7, 0x8030, 0xF5EF, 0x8033, 0xA6D5,
02136     0x8034, 0xCB73, 0x8035, 0xCDAA, 0x8036, 0xAD43, 0x8037, 0xD055,
02137     0x8039, 0xD368, 0x803D, 0xAFD4, 0x803E, 0xD367, 0x803F, 0xAFD5,
02138     0x8043, 0xD743, 0x8046, 0xB2E2, 0x8047, 0xD742, 0x8048, 0xD744,
02139     0x804A, 0xB2E1, 0x804F, 0xDB46, 0x8050, 0xDB47, 0x8051, 0xDB45,
02140     0x8052, 0xB5C1, 0x8056, 0xB874, 0x8058, 0xB875, 0x805A, 0xBB45,
02141     0x805C, 0xE3A3, 0x805D, 0xE3A2, 0x805E, 0xBB44, 0x8064, 0xE6FB,
02142     0x8067, 0xE6FC, 0x806C, 0xEAE7, 0x806F, 0xC170, 0x8070, 0xC16F,
02143     0x8071, 0xC16D, 0x8072, 0xC16E, 0x8073, 0xC171, 0x8075, 0xF07C,
02144     0x8076, 0xC2BF, 0x8077, 0xC2BE, 0x8078, 0xF2C0, 0x8079, 0xF4B2,
02145     0x807D, 0xC5A5, 0x807E, 0xC5A4, 0x807F, 0xA6D6, 0x8082, 0xD1FB,
02146     0x8084, 0xB877, 0x8085, 0xB5C2, 0x8086, 0xB876, 0x8087, 0xBB46,
02147     0x8089, 0xA6D7, 0x808A, 0xC9A9, 0x808B, 0xA6D8, 0x808C, 0xA6D9,
02148     0x808F, 0xCDAB, 0x8090, 0xCB76, 0x8092, 0xCB77, 0x8093, 0xA877,
02149     0x8095, 0xCB74, 0x8096, 0xA876, 0x8098, 0xA879, 0x8099, 0xCB75,
02150     0x809A, 0xA87B, 0x809B, 0xA87A, 0x809C, 0xCB78, 0x809D, 0xA878,
02151     0x80A1, 0xAAD1, 0x80A2, 0xAACF, 0x80A3, 0xCDAD, 0x80A5, 0xAACE,
02152     0x80A9, 0xAAD3, 0x80AA, 0xAAD5, 0x80AB, 0xAAD2, 0x80AD, 0xCDB0,
02153     0x80AE, 0xCDAC, 0x80AF, 0xAAD6, 0x80B1, 0xAAD0, 0x80B2, 0xA87C,
02154     0x80B4, 0xAAD4, 0x80B5, 0xCDAF, 0x80B8, 0xCDAE, 0x80BA, 0xAACD,
02155     0x80C2, 0xD05B, 0x80C3, 0xAD47, 0x80C4, 0xAD48, 0x80C5, 0xD05D,
02156     0x80C7, 0xD057, 0x80C8, 0xD05A, 0x80C9, 0xD063, 0x80CA, 0xD061,
02157     0x80CC, 0xAD49, 0x80CD, 0xD067, 0x80CE, 0xAD4C, 0x80CF, 0xD064,
02158     0x80D0, 0xD05C, 0x80D1, 0xD059, 0x80D4, 0xDB49, 0x80D5, 0xD062,
02159     0x80D6, 0xAD44, 0x80D7, 0xD065, 0x80D8, 0xD056, 0x80D9, 0xD05F,
02160     0x80DA, 0xAD46, 0x80DB, 0xAD4B, 0x80DC, 0xD060, 0x80DD, 0xAD4F,
02161     0x80DE, 0xAD4D, 0x80E0, 0xD058, 0x80E1, 0xAD4A, 0x80E3, 0xD05E,
02162     0x80E4, 0xAD4E, 0x80E5, 0xAD45, 0x80E6, 0xD066, 0x80ED, 0xAFDA,
02163     0x80EF, 0xAFE3, 0x80F0, 0xAFD8, 0x80F1, 0xAFD6, 0x80F2, 0xD36A,
02164     0x80F3, 0xAFDE, 0x80F4, 0xAFDB, 0x80F5, 0xD36C, 0x80F8, 0xAFDD,
02165     0x80F9, 0xD36B, 0x80FA, 0xD369, 0x80FB, 0xD36E, 0x80FC, 0xAFE2,
02166     0x80FD, 0xAFE0, 0x80FE, 0xDB48, 0x8100, 0xD36F, 0x8101, 0xD36D,
02167     0x8102, 0xAFD7, 0x8105, 0xAFD9, 0x8106, 0xAFDC, 0x8108, 0xAFDF,
02168     0x810A, 0xAFE1, 0x8115, 0xD74E, 0x8116, 0xB2E4, 0x8118, 0xD745,
02169     0x8119, 0xD747, 0x811B, 0xD748, 0x811D, 0xD750, 0x811E, 0xD74C,
02170     0x811F, 0xD74A, 0x8121, 0xD74D, 0x8122, 0xD751, 0x8123, 0xB2E5,
02171     0x8124, 0xB2E9, 0x8125, 0xD746, 0x8127, 0xD74F, 0x8129, 0xB2E7,
02172     0x812B, 0xB2E6, 0x812C, 0xD74B, 0x812D, 0xD749, 0x812F, 0xB2E3,
02173     0x8130, 0xB2E8, 0x8139, 0xB5C8, 0x813A, 0xDB51, 0x813D, 0xDB4F,
02174     0x813E, 0xB5CA, 0x8143, 0xDB4A, 0x8144, 0xDFA1, 0x8146, 0xB5C9,
02175     0x8147, 0xDB4E, 0x814A, 0xDB4B, 0x814B, 0xB5C5, 0x814C, 0xB5CB,
02176     0x814D, 0xDB50, 0x814E, 0xB5C7, 0x814F, 0xDB4D, 0x8150, 0xBB47,
02177     0x8151, 0xB5C6, 0x8152, 0xDB4C, 0x8153, 0xB5CC, 0x8154, 0xB5C4,
02178     0x8155, 0xB5C3, 0x815B, 0xDF77, 0x815C, 0xDF75, 0x815E, 0xDF7B,
02179     0x8160, 0xDF73, 0x8161, 0xDFA2, 0x8162, 0xDF78, 0x8164, 0xDF72,
02180     0x8165, 0xB87B, 0x8166, 0xB8A3, 0x8167, 0xDF7D, 0x8169, 0xDF76,
02181     0x816B, 0xB87E, 0x816E, 0xB87C, 0x816F, 0xDF7E, 0x8170, 0xB879,
02182     0x8171, 0xB878, 0x8172, 0xDF79, 0x8173, 0xB87D, 0x8174, 0xB5CD,
02183     0x8176, 0xDF7C, 0x8177, 0xDF74, 0x8178, 0xB87A, 0x8179, 0xB8A1,
02184     0x817A, 0xB8A2, 0x817F, 0xBB4C, 0x8180, 0xBB48, 0x8182, 0xBB4D,
02185     0x8183, 0xE3A6, 0x8186, 0xE3A5, 0x8187, 0xE3A7, 0x8188, 0xBB4A,
02186     0x8189, 0xE3A4, 0x818A, 0xBB4B, 0x818B, 0xE3AA, 0x818C, 0xE3A9,
02187     0x818D, 0xE3A8, 0x818F, 0xBB49, 0x8195, 0xE741, 0x8197, 0xE744,
02188     0x8198, 0xBDA8, 0x8199, 0xE743, 0x819A, 0xBDA7, 0x819B, 0xBDA3,
02189     0x819C, 0xBDA4, 0x819D, 0xBDA5, 0x819E, 0xE740, 0x819F, 0xE6FE,
02190     0x81A0, 0xBDA6, 0x81A2, 0xE742, 0x81A3, 0xE6FD, 0x81A6, 0xEAE9,
02191     0x81A7, 0xEAF3, 0x81A8, 0xBFB1, 0x81A9, 0xBFB0, 0x81AB, 0xEAED,
02192     0x81AC, 0xEAEF, 0x81AE, 0xEAEA, 0x81B0, 0xEAEE, 0x81B1, 0xEAE8,
02193     0x81B2, 0xEAF1, 0x81B3, 0xBFAF, 0x81B4, 0xEAF0, 0x81B5, 0xEAEC,
02194     0x81B7, 0xEAF2, 0x81B9, 0xEAEB, 0x81BA, 0xC174, 0x81BB, 0xEDE8,
02195     0x81BC, 0xEDEE, 0x81BD, 0xC178, 0x81BE, 0xC17A, 0x81BF, 0xC177,
02196     0x81C0, 0xC176, 0x81C2, 0xC175, 0x81C3, 0xC173, 0x81C4, 0xEDE9,
02197     0x81C5, 0xEDEC, 0x81C6, 0xC172, 0x81C7, 0xEDED, 0x81C9, 0xC179,
02198     0x81CA, 0xEDEB, 0x81CC, 0xEDEA, 0x81CD, 0xC2C0, 0x81CF, 0xC2C1,
02199     0x81D0, 0xF0A1, 0x81D1, 0xF07D, 0x81D2, 0xF07E, 0x81D5, 0xF2C2,
02200     0x81D7, 0xF2C1, 0x81D8, 0xC3BE, 0x81D9, 0xF4B4, 0x81DA, 0xC4A4,
02201     0x81DB, 0xF4B3, 0x81DD, 0xF5F0, 0x81DE, 0xF745, 0x81DF, 0xC5A6,
02202     0x81E0, 0xF943, 0x81E1, 0xF944, 0x81E2, 0xC5D8, 0x81E3, 0xA6DA,
02203     0x81E5, 0xAAD7, 0x81E6, 0xDB52, 0x81E7, 0xBB4E, 0x81E8, 0xC17B,
02204     0x81E9, 0xEDEF, 0x81EA, 0xA6DB, 0x81EC, 0xAFE5, 0x81ED, 0xAFE4,
02205     0x81EE, 0xDB53, 0x81F2, 0xEAF4, 0x81F3, 0xA6DC, 0x81F4, 0xAD50,
02206     0x81F7, 0xDB54, 0x81F8, 0xDB55, 0x81F9, 0xDB56, 0x81FA, 0xBB4F,
02207     0x81FB, 0xBFB2, 0x81FC, 0xA6DD, 0x81FE, 0xAAD8, 0x81FF, 0xD068,
02208     0x8200, 0xAFE6, 0x8201, 0xD370, 0x8202, 0xB2EA, 0x8204, 0xDB57,
02209     0x8205, 0xB8A4, 0x8207, 0xBB50, 0x8208, 0xBFB3, 0x8209, 0xC17C,
02210     0x820A, 0xC2C2, 0x820B, 0xF4B5, 0x820C, 0xA6DE, 0x820D, 0xAAD9,
02211     0x8210, 0xAFE7, 0x8211, 0xD752, 0x8212, 0xB5CE, 0x8214, 0xBB51,
02212     0x8215, 0xE3AB, 0x8216, 0xE745, 0x821B, 0xA6DF, 0x821C, 0xB5CF,
02213     0x821D, 0xDFA3, 0x821E, 0xBB52, 0x821F, 0xA6E0, 0x8220, 0xCDB1,
02214     0x8221, 0xD069, 0x8222, 0xAD51, 0x8225, 0xD372, 0x8228, 0xAFEA,
02215     0x822A, 0xAFE8, 0x822B, 0xAFE9, 0x822C, 0xAFEB, 0x822F, 0xD371,
02216     0x8232, 0xD757, 0x8233, 0xD754, 0x8234, 0xD756, 0x8235, 0xB2EB,
02217     0x8236, 0xB2ED, 0x8237, 0xB2EC, 0x8238, 0xD753, 0x8239, 0xB2EE,
02218     0x823A, 0xD755, 0x823C, 0xDB58, 0x823D, 0xDB59, 0x823F, 0xDB5A,
02219     0x8240, 0xDFA6, 0x8242, 0xDFA7, 0x8244, 0xDFA5, 0x8245, 0xDFA8,
02220     0x8247, 0xB8A5, 0x8249, 0xDFA4, 0x824B, 0xBB53, 0x824E, 0xE74A,
02221     0x824F, 0xE746, 0x8250, 0xE749, 0x8251, 0xE74B, 0x8252, 0xE748,
02222     0x8253, 0xE747, 0x8255, 0xEAF5, 0x8256, 0xEAF6, 0x8257, 0xEAF7,
02223     0x8258, 0xBFB4, 0x8259, 0xBFB5, 0x825A, 0xEDF1, 0x825B, 0xEDF0,
02224     0x825C, 0xEDF2, 0x825E, 0xF0A3, 0x825F, 0xF0A2, 0x8261, 0xF2C4,
02225     0x8263, 0xF2C5, 0x8264, 0xF2C3, 0x8266, 0xC4A5, 0x8268, 0xF4B6,
02226     0x8269, 0xF4B7, 0x826B, 0xF746, 0x826C, 0xF7EF, 0x826D, 0xF8BB,
02227     0x826E, 0xA6E1, 0x826F, 0xA87D, 0x8271, 0xC17D, 0x8272, 0xA6E2,
02228     0x8274, 0xD758, 0x8275, 0xDB5B, 0x8277, 0xC641, 0x8278, 0xCA4A,
02229     0x827C, 0xCA4B, 0x827D, 0xCA4D, 0x827E, 0xA6E3, 0x827F, 0xCA4E,
02230     0x8280, 0xCA4C, 0x8283, 0xCBA2, 0x8284, 0xCBA3, 0x8285, 0xCB7B,
02231     0x828A, 0xCBA1, 0x828B, 0xA8A1, 0x828D, 0xA8A2, 0x828E, 0xCB7C,
02232     0x828F, 0xCB7A, 0x8290, 0xCB79, 0x8291, 0xCB7D, 0x8292, 0xA87E,
02233     0x8293, 0xCB7E, 0x8294, 0xD06A, 0x8298, 0xCDB6, 0x8299, 0xAADC,
02234     0x829A, 0xCDB5, 0x829B, 0xCDB7, 0x829D, 0xAADB, 0x829E, 0xCDBC,
02235     0x829F, 0xAADF, 0x82A0, 0xCDB2, 0x82A1, 0xCDC0, 0x82A2, 0xCDC6,
02236     0x82A3, 0xAAE6, 0x82A4, 0xCDC3, 0x82A5, 0xAAE3, 0x82A7, 0xCDB9,
02237     0x82A8, 0xCDBF, 0x82A9, 0xCDC1, 0x82AB, 0xCDB4, 0x82AC, 0xAAE2,
02238     0x82AD, 0xAADD, 0x82AE, 0xCDBA, 0x82AF, 0xAAE4, 0x82B0, 0xAAE7,
02239     0x82B1, 0xAAE1, 0x82B3, 0xAADA, 0x82B4, 0xCDBE, 0x82B5, 0xCDB8,
02240     0x82B6, 0xCDC5, 0x82B7, 0xAAE9, 0x82B8, 0xAAE5, 0x82B9, 0xAAE0,
02241     0x82BA, 0xCDBD, 0x82BB, 0xAFEC, 0x82BC, 0xCDBB, 0x82BD, 0xAADE,
02242     0x82BE, 0xAAE8, 0x82C0, 0xCDB3, 0x82C2, 0xCDC2, 0x82C3, 0xCDC4,
02243     0x82D1, 0xAD62, 0x82D2, 0xAD5C, 0x82D3, 0xAD64, 0x82D4, 0xAD61,
02244     0x82D5, 0xD071, 0x82D6, 0xD074, 0x82D7, 0xAD5D, 0x82D9, 0xD06B,
02245     0x82DB, 0xAD56, 0x82DC, 0xAD60, 0x82DE, 0xAD63, 0x82DF, 0xAD65,
02246     0x82E0, 0xD0A2, 0x82E1, 0xD077, 0x82E3, 0xAD55, 0x82E4, 0xD0A1,
02247     0x82E5, 0xAD59, 0x82E6, 0xAD57, 0x82E7, 0xAD52, 0x82E8, 0xD06F,
02248     0x82EA, 0xD07E, 0x82EB, 0xD073, 0x82EC, 0xD076, 0x82ED, 0xD0A5,
02249     0x82EF, 0xAD66, 0x82F0, 0xD07D, 0x82F1, 0xAD5E, 0x82F2, 0xD078,
02250     0x82F3, 0xD0A4, 0x82F4, 0xD075, 0x82F5, 0xD079, 0x82F6, 0xD07C,
02251     0x82F9, 0xD06D, 0x82FA, 0xD0A3, 0x82FB, 0xD07B, 0x82FE, 0xD06C,
02252     0x8300, 0xD070, 0x8301, 0xAD5F, 0x8302, 0xAD5A, 0x8303, 0xAD53,
02253     0x8304, 0xAD58, 0x8305, 0xAD54, 0x8306, 0xAD67, 0x8307, 0xD06E,
02254     0x8308, 0xD3A5, 0x8309, 0xAD5B, 0x830C, 0xD07A, 0x830D, 0xCE41,
02255     0x8316, 0xD3A8, 0x8317, 0xAFFA, 0x8319, 0xD376, 0x831B, 0xD3A3,
02256     0x831C, 0xD37D, 0x831E, 0xD3B2, 0x8320, 0xD3AA, 0x8322, 0xD37E,
02257     0x8324, 0xD3A9, 0x8325, 0xD378, 0x8326, 0xD37C, 0x8327, 0xD3B5,
02258     0x8328, 0xAFFD, 0x8329, 0xD3AD, 0x832A, 0xD3A4, 0x832B, 0xAFED,
02259     0x832C, 0xD3B3, 0x832D, 0xD374, 0x832F, 0xD3AC, 0x8331, 0xAFFC,
02260     0x8332, 0xAFF7, 0x8333, 0xD373, 0x8334, 0xAFF5, 0x8335, 0xAFF4,
02261     0x8336, 0xAFF9, 0x8337, 0xD3AB, 0x8338, 0xAFF1, 0x8339, 0xAFF8,
02262     0x833A, 0xD072, 0x833B, 0xDB5C, 0x833C, 0xD3A6, 0x833F, 0xD37A,
02263     0x8340, 0xAFFB, 0x8341, 0xD37B, 0x8342, 0xD3A1, 0x8343, 0xAFFE,
02264     0x8344, 0xD375, 0x8345, 0xD3AF, 0x8347, 0xD3AE, 0x8348, 0xD3B6,
02265     0x8349, 0xAFF3, 0x834A, 0xAFF0, 0x834B, 0xD3B4, 0x834C, 0xD3B0,
02266     0x834D, 0xD3A7, 0x834E, 0xD3A2, 0x834F, 0xAFF6, 0x8350, 0xAFF2,
02267     0x8351, 0xD377, 0x8352, 0xAFEE, 0x8353, 0xD3B1, 0x8354, 0xAFEF,
02268     0x8356, 0xD379, 0x8373, 0xD75E, 0x8374, 0xD760, 0x8375, 0xD765,
02269     0x8376, 0xD779, 0x8377, 0xB2FC, 0x8378, 0xB2F2, 0x837A, 0xD75D,
02270     0x837B, 0xB2FD, 0x837C, 0xB2FE, 0x837D, 0xD768, 0x837E, 0xD76F,
02271     0x837F, 0xD775, 0x8381, 0xD762, 0x8383, 0xD769, 0x8386, 0xB340,
02272     0x8387, 0xD777, 0x8388, 0xD772, 0x8389, 0xB2FA, 0x838A, 0xB2F8,
02273     0x838B, 0xD76E, 0x838C, 0xD76A, 0x838D, 0xD75C, 0x838E, 0xB2EF,
02274     0x838F, 0xD761, 0x8390, 0xD759, 0x8392, 0xB2F7, 0x8393, 0xB2F9,
02275     0x8394, 0xD766, 0x8395, 0xD763, 0x8396, 0xB2F4, 0x8397, 0xD773,
02276     0x8398, 0xB2F1, 0x8399, 0xD764, 0x839A, 0xD77A, 0x839B, 0xD76C,
02277     0x839D, 0xD76B, 0x839E, 0xB2F0, 0x83A0, 0xB2FB, 0x83A2, 0xB2F3,
02278     0x83A3, 0xD75A, 0x83A4, 0xD75F, 0x83A5, 0xD770, 0x83A6, 0xD776,
02279     0x83A7, 0xB341, 0x83A8, 0xD75B, 0x83A9, 0xD767, 0x83AA, 0xD76D,
02280     0x83AB, 0xB2F6, 0x83AE, 0xD778, 0x83AF, 0xD771, 0x83B0, 0xD774,
02281     0x83BD, 0xB2F5, 0x83BF, 0xDB6C, 0x83C0, 0xDB60, 0x83C1, 0xB5D7,
02282     0x83C2, 0xDB7D, 0x83C3, 0xDBA7, 0x83C4, 0xDBAA, 0x83C5, 0xB5D5,
02283     0x83C6, 0xDB68, 0x83C7, 0xDBA3, 0x83C8, 0xDB69, 0x83C9, 0xDB77,
02284     0x83CA, 0xB5E2, 0x83CB, 0xDB73, 0x83CC, 0xB5DF, 0x83CE, 0xDB74,
02285     0x83CF, 0xDB5D, 0x83D1, 0xDBA4, 0x83D4, 0xB5E8, 0x83D5, 0xDBA1,
02286     0x83D6, 0xDB75, 0x83D7, 0xDBAC, 0x83D8, 0xDB70, 0x83D9, 0xDFC8,
02287     0x83DB, 0xDBAF, 0x83DC, 0xB5E6, 0x83DD, 0xDB6E, 0x83DE, 0xDB7A,
02288     0x83DF, 0xB5E9, 0x83E0, 0xB5D4, 0x83E1, 0xDB72, 0x83E2, 0xDBAD,
02289     0x83E3, 0xDB6B, 0x83E4, 0xDB64, 0x83E5, 0xDB6F, 0x83E7, 0xDB63,
02290     0x83E8, 0xDB61, 0x83E9, 0xB5D0, 0x83EA, 0xDBA5, 0x83EB, 0xDB6A,
02291     0x83EC, 0xDBA8, 0x83EE, 0xDBA9, 0x83EF, 0xB5D8, 0x83F0, 0xB5DD,
02292     0x83F1, 0xB5D9, 0x83F2, 0xB5E1, 0x83F3, 0xDB7E, 0x83F4, 0xB5DA,
02293     0x83F5, 0xDB76, 0x83F6, 0xDB66, 0x83F8, 0xB5D2, 0x83F9, 0xDB5E,
02294     0x83FA, 0xDBA2, 0x83FB, 0xDBAB, 0x83FC, 0xDB65, 0x83FD, 0xB5E0,
02295     0x83FE, 0xDBB0, 0x83FF, 0xDB71, 0x8401, 0xDB6D, 0x8403, 0xB5D1,
02296     0x8404, 0xB5E5, 0x8406, 0xDB7C, 0x8407, 0xB5E7, 0x8409, 0xDB78,
02297     0x840A, 0xB5DC, 0x840B, 0xB5D6, 0x840C, 0xB5DE, 0x840D, 0xB5D3,
02298     0x840E, 0xB5E4, 0x840F, 0xDB79, 0x8410, 0xDB67, 0x8411, 0xDB7B,
02299     0x8412, 0xDB62, 0x8413, 0xDBA6, 0x841B, 0xDBAE, 0x8423, 0xDB5F,
02300     0x8429, 0xDFC7, 0x842B, 0xDFDD, 0x842C, 0xB855, 0x842D, 0xDFCC,
02301     0x842F, 0xDFCA, 0x8430, 0xDFB5, 0x8431, 0xB8A9, 0x8432, 0xDFC5,
02302     0x8433, 0xDFD9, 0x8434, 0xDFC1, 0x8435, 0xB8B1, 0x8436, 0xDFD8,
02303     0x8437, 0xDFBF, 0x8438, 0xB5E3, 0x8439, 0xDFCF, 0x843A, 0xDFC0,
02304     0x843B, 0xDFD6, 0x843C, 0xB8B0, 0x843D, 0xB8A8, 0x843F, 0xDFAA,
02305     0x8440, 0xDFB2, 0x8442, 0xDFCB, 0x8443, 0xDFC3, 0x8444, 0xDFDC,
02306     0x8445, 0xDFC6, 0x8446, 0xB8B6, 0x8447, 0xDFD7, 0x8449, 0xB8AD,
02307     0x844B, 0xDFC9, 0x844C, 0xDFD1, 0x844D, 0xDFB6, 0x844E, 0xDFD0,
02308     0x8450, 0xDFE1, 0x8451, 0xDFB1, 0x8452, 0xDFD2, 0x8454, 0xDFDF,
02309     0x8456, 0xDFAB, 0x8457, 0xB5DB, 0x8459, 0xDFB9, 0x845A, 0xDFB8,
02310     0x845B, 0xB8AF, 0x845D, 0xDFBC, 0x845E, 0xDFBE, 0x845F, 0xDFCD,
02311     0x8460, 0xDFDE, 0x8461, 0xB8B2, 0x8463, 0xB8B3, 0x8465, 0xDFB0,
02312     0x8466, 0xB8AB, 0x8467, 0xDFB4, 0x8468, 0xDFDA, 0x8469, 0xB8B4,
02313     0x846B, 0xB8AC, 0x846C, 0xB8AE, 0x846D, 0xB8B5, 0x846E, 0xDFE0,
02314     0x846F, 0xDFD3, 0x8470, 0xDFCE, 0x8473, 0xDFBB, 0x8474, 0xDFBA,
02315     0x8475, 0xB8AA, 0x8476, 0xDFAC, 0x8477, 0xB8A7, 0x8478, 0xDFC4,
02316     0x8479, 0xDFAD, 0x847A, 0xDFC2, 0x847D, 0xDFB7, 0x847E, 0xDFDB,
02317     0x8482, 0xB8A6, 0x8486, 0xDFB3, 0x848D, 0xDFAF, 0x848E, 0xDFD5,
02318     0x848F, 0xDFAE, 0x8490, 0xBB60, 0x8491, 0xE3D3, 0x8494, 0xE3C2,
02319     0x8497, 0xE3AC, 0x8498, 0xE3CA, 0x8499, 0xBB58, 0x849A, 0xE3BB,
02320     0x849B, 0xE3C5, 0x849C, 0xBB5B, 0x849D, 0xE3BE, 0x849E, 0xBB59,
02321     0x849F, 0xE3AF, 0x84A0, 0xE3CD, 0x84A1, 0xE3AE, 0x84A2, 0xE3C1,
02322     0x84A4, 0xE3AD, 0x84A7, 0xE3BF, 0x84A8, 0xE3C8, 0x84A9, 0xE3C6,
02323     0x84AA, 0xE3BA, 0x84AB, 0xE3B5, 0x84AC, 0xE3B3, 0x84AE, 0xE3B4,
02324     0x84AF, 0xE3C7, 0x84B0, 0xE3D2, 0x84B1, 0xE3BC, 0x84B2, 0xBB5A,
02325     0x84B4, 0xE3B7, 0x84B6, 0xE3CB, 0x84B8, 0xBB5D, 0x84B9, 0xE3B6,
02326     0x84BA, 0xE3B0, 0x84BB, 0xE3C0, 0x84BC, 0xBB61, 0x84BF, 0xBB55,
02327     0x84C0, 0xBB5E, 0x84C1, 0xE3B8, 0x84C2, 0xE3B2, 0x84C4, 0xBB57,
02328     0x84C5, 0xDFD4, 0x84C6, 0xBB56, 0x84C7, 0xE3C3, 0x84C9, 0xBB54,
02329     0x84CA, 0xBB63, 0x84CB, 0xBB5C, 0x84CC, 0xE3C4, 0x84CD, 0xE3B9,
02330     0x84CE, 0xE3B1, 0x84CF, 0xE3CC, 0x84D0, 0xE3BD, 0x84D1, 0xBB62,
02331     0x84D2, 0xE3D0, 0x84D3, 0xBB5F, 0x84D4, 0xE3CF, 0x84D6, 0xE3C9,
02332     0x84D7, 0xE3CE, 0x84DB, 0xE3D1, 0x84E7, 0xE773, 0x84E8, 0xE774,
02333     0x84E9, 0xE767, 0x84EA, 0xE766, 0x84EB, 0xE762, 0x84EC, 0xBDB4,
02334     0x84EE, 0xBDAC, 0x84EF, 0xE776, 0x84F0, 0xE775, 0x84F1, 0xDFA9,
02335     0x84F2, 0xE75F, 0x84F3, 0xE763, 0x84F4, 0xE75D, 0x84F6, 0xE770,
02336     0x84F7, 0xE761, 0x84F9, 0xE777, 0x84FA, 0xE75A, 0x84FB, 0xE758,
02337     0x84FC, 0xE764, 0x84FD, 0xE76E, 0x84FE, 0xE769, 0x84FF, 0xBDB6,
02338     0x8500, 0xE74F, 0x8502, 0xE76D, 0x8506, 0xBDB7, 0x8507, 0xDFBD,
02339     0x8508, 0xE75B, 0x8509, 0xE752, 0x850A, 0xE755, 0x850B, 0xE77B,
02340     0x850C, 0xE75C, 0x850D, 0xE753, 0x850E, 0xE751, 0x850F, 0xE74E,
02341     0x8511, 0xBDB0, 0x8512, 0xE765, 0x8513, 0xBDAF, 0x8514, 0xBDB3,
02342     0x8515, 0xE760, 0x8516, 0xE768, 0x8517, 0xBDA9, 0x8518, 0xE778,
02343     0x8519, 0xE77C, 0x851A, 0xBDAB, 0x851C, 0xE757, 0x851D, 0xE76B,
02344     0x851E, 0xE76F, 0x851F, 0xE754, 0x8520, 0xE779, 0x8521, 0xBDB2,
02345     0x8523, 0xBDB1, 0x8524, 0xE74C, 0x8525, 0xBDB5, 0x8526, 0xE772,
02346     0x8527, 0xE756, 0x8528, 0xE76A, 0x8529, 0xE750, 0x852A, 0xE75E,
02347     0x852B, 0xE759, 0x852C, 0xBDAD, 0x852D, 0xBDAE, 0x852E, 0xE76C,
02348     0x852F, 0xE77D, 0x8530, 0xE77A, 0x8531, 0xE771, 0x853B, 0xE74D,
02349     0x853D, 0xBDAA, 0x853E, 0xEB49, 0x8540, 0xEB40, 0x8541, 0xEB43,
02350     0x8543, 0xBFBB, 0x8544, 0xEB45, 0x8545, 0xEAF9, 0x8546, 0xEB41,
02351     0x8547, 0xEB47, 0x8548, 0xBFB8, 0x8549, 0xBFBC, 0x854A, 0xBFB6,
02352     0x854D, 0xEAFB, 0x854E, 0xEB4C, 0x8551, 0xEB46, 0x8553, 0xEAFC,
02353     0x8554, 0xEB55, 0x8555, 0xEB4F, 0x8556, 0xEAF8, 0x8557, 0xEE46,
02354     0x8558, 0xEAFE, 0x8559, 0xBFB7, 0x855B, 0xEB4A, 0x855D, 0xEB54,
02355     0x855E, 0xBFBF, 0x8560, 0xEB51, 0x8561, 0xEAFD, 0x8562, 0xEB44,
02356     0x8563, 0xEB48, 0x8564, 0xEB42, 0x8565, 0xEB56, 0x8566, 0xEB53,
02357     0x8567, 0xEB50, 0x8568, 0xBFB9, 0x8569, 0xBFBA, 0x856A, 0xBFBE,
02358     0x856B, 0xEAFA, 0x856C, 0xEB57, 0x856D, 0xBFBD, 0x856E, 0xEB4D,
02359     0x8571, 0xEB4B, 0x8575, 0xEB4E, 0x8576, 0xEE53, 0x8577, 0xEE40,
02360     0x8578, 0xEE45, 0x8579, 0xEE52, 0x857A, 0xEE44, 0x857B, 0xEDFB,
02361     0x857C, 0xEE41, 0x857E, 0xC1A2, 0x8580, 0xEDF4, 0x8581, 0xEE4D,
02362     0x8582, 0xEE4F, 0x8583, 0xEDF3, 0x8584, 0xC1A1, 0x8585, 0xEE51,
02363     0x8586, 0xEE49, 0x8587, 0xC1A8, 0x8588, 0xEE50, 0x8589, 0xEE42,
02364     0x858A, 0xC1AA, 0x858B, 0xEDF9, 0x858C, 0xEB52, 0x858D, 0xEE4A,
02365     0x858E, 0xEE47, 0x858F, 0xEDF5, 0x8590, 0xEE55, 0x8591, 0xC1A4,
02366     0x8594, 0xC1A5, 0x8595, 0xEDF7, 0x8596, 0xEE48, 0x8598, 0xEE54,
02367     0x8599, 0xEE4B, 0x859A, 0xEDFD, 0x859B, 0xC1A7, 0x859C, 0xC1A3,
02368     0x859D, 0xEE4C, 0x859E, 0xEDFE, 0x859F, 0xEE56, 0x85A0, 0xEDF8,
02369     0x85A1, 0xEE43, 0x85A2, 0xEE4E, 0x85A3, 0xEDFA, 0x85A4, 0xEDFC,
02370     0x85A6, 0xC2CB, 0x85A7, 0xEDF6, 0x85A8, 0xC1A9, 0x85A9, 0xC2C4,
02371     0x85AA, 0xC17E, 0x85AF, 0xC1A6, 0x85B0, 0xC2C8, 0x85B1, 0xF0B3,
02372     0x85B3, 0xF0A9, 0x85B4, 0xF0A4, 0x85B5, 0xF0AA, 0x85B6, 0xF0B4,
02373     0x85B7, 0xF0B8, 0x85B8, 0xF0B7, 0x85B9, 0xC2CA, 0x85BA, 0xC2C9,
02374     0x85BD, 0xF0AB, 0x85BE, 0xF0B9, 0x85BF, 0xF0AE, 0x85C0, 0xF0A6,
02375     0x85C2, 0xF0A8, 0x85C3, 0xF0A7, 0x85C4, 0xF0AD, 0x85C5, 0xF0B2,
02376     0x85C6, 0xF0A5, 0x85C7, 0xF0AC, 0x85C8, 0xF0B1, 0x85C9, 0xC2C7,
02377     0x85CB, 0xF0AF, 0x85CD, 0xC2C5, 0x85CE, 0xF0B0, 0x85CF, 0xC2C3,
02378     0x85D0, 0xC2C6, 0x85D1, 0xF2D5, 0x85D2, 0xF0B5, 0x85D5, 0xC3C2,
02379     0x85D7, 0xF2CD, 0x85D8, 0xF2D1, 0x85D9, 0xF2C9, 0x85DA, 0xF2CC,
02380     0x85DC, 0xF2D4, 0x85DD, 0xC3C0, 0x85DE, 0xF2D9, 0x85DF, 0xF2D2,
02381     0x85E1, 0xF2CA, 0x85E2, 0xF2DA, 0x85E3, 0xF2D3, 0x85E4, 0xC3C3,
02382     0x85E5, 0xC3C4, 0x85E6, 0xF2D7, 0x85E8, 0xF2CB, 0x85E9, 0xC3BF,
02383     0x85EA, 0xC3C1, 0x85EB, 0xF2C6, 0x85EC, 0xF2CE, 0x85ED, 0xF2C8,
02384     0x85EF, 0xF2D8, 0x85F0, 0xF2D6, 0x85F1, 0xF2C7, 0x85F2, 0xF2CF,
02385     0x85F6, 0xF4BE, 0x85F7, 0xC3C5, 0x85F8, 0xF2D0, 0x85F9, 0xC4A7,
02386     0x85FA, 0xC4A9, 0x85FB, 0xC4A6, 0x85FD, 0xF4C3, 0x85FE, 0xF4BB,
02387     0x85FF, 0xF4B9, 0x8600, 0xF4BD, 0x8601, 0xF4BA, 0x8604, 0xF4BF,
02388     0x8605, 0xF4C1, 0x8606, 0xC4AA, 0x8607, 0xC4AC, 0x8609, 0xF4C0,
02389     0x860A, 0xC4AD, 0x860B, 0xC4AB, 0x860C, 0xF4C2, 0x8611, 0xC4A8,
02390     0x8617, 0xC4F4, 0x8618, 0xF5F1, 0x8619, 0xF5F7, 0x861A, 0xC4F6,
02391     0x861B, 0xF4BC, 0x861C, 0xF5F6, 0x861E, 0xF5FD, 0x861F, 0xF5F4,
02392     0x8620, 0xF5FB, 0x8621, 0xF5FA, 0x8622, 0xF4B8, 0x8623, 0xF5F5,
02393     0x8624, 0xF0B6, 0x8625, 0xF5FE, 0x8626, 0xF5F3, 0x8627, 0xF5F8,
02394     0x8629, 0xF5FC, 0x862A, 0xF5F2, 0x862C, 0xF74A, 0x862D, 0xC4F5,
02395     0x862E, 0xF5F9, 0x8631, 0xF7F4, 0x8632, 0xF74B, 0x8633, 0xF749,
02396     0x8634, 0xF747, 0x8635, 0xF748, 0x8636, 0xF74C, 0x8638, 0xC5D9,
02397     0x8639, 0xF7F2, 0x863A, 0xF7F0, 0x863B, 0xF7F5, 0x863C, 0xF7F3,
02398     0x863E, 0xF7F6, 0x863F, 0xC5DA, 0x8640, 0xF7F1, 0x8643, 0xF8BC,
02399     0x8646, 0xF945, 0x8647, 0xF946, 0x8648, 0xF947, 0x864B, 0xF9C7,
02400     0x864C, 0xF9BD, 0x864D, 0xCA4F, 0x864E, 0xAAEA, 0x8650, 0xAD68,
02401     0x8652, 0xD3B8, 0x8653, 0xD3B7, 0x8654, 0xB040, 0x8655, 0xB342,
02402     0x8656, 0xD77C, 0x8659, 0xD77B, 0x865B, 0xB5EA, 0x865C, 0xB8B8,
02403     0x865E, 0xB8B7, 0x865F, 0xB8B9, 0x8661, 0xE3D4, 0x8662, 0xE77E,
02404     0x8663, 0xEB58, 0x8664, 0xEB5A, 0x8665, 0xEB59, 0x8667, 0xC1AB,
02405     0x8668, 0xEE57, 0x8669, 0xF0BA, 0x866A, 0xF9A5, 0x866B, 0xA6E4,
02406     0x866D, 0xCDC9, 0x866E, 0xCDCA, 0x866F, 0xCDC8, 0x8670, 0xCDC7,
02407     0x8671, 0xAAEB, 0x8673, 0xD0A9, 0x8674, 0xD0A7, 0x8677, 0xD0A6,
02408     0x8679, 0xAD69, 0x867A, 0xAD6B, 0x867B, 0xAD6A, 0x867C, 0xD0A8,
02409     0x8685, 0xD3C4, 0x8686, 0xD3C1, 0x8687, 0xD3BF, 0x868A, 0xB041,
02410     0x868B, 0xD3C2, 0x868C, 0xB046, 0x868D, 0xD3BC, 0x868E, 0xD3CB,
02411     0x8690, 0xD3CD, 0x8691, 0xD3BD, 0x8693, 0xB043, 0x8694, 0xD3CE,
02412     0x8695, 0xD3C9, 0x8696, 0xD3BB, 0x8697, 0xD3C0, 0x8698, 0xD3CA,
02413     0x8699, 0xD3C6, 0x869A, 0xD3C3, 0x869C, 0xB048, 0x869D, 0xD3CC,
02414     0x869E, 0xD3BE, 0x86A1, 0xD3C7, 0x86A2, 0xD3B9, 0x86A3, 0xB047,
02415     0x86A4, 0xB044, 0x86A5, 0xD3C5, 0x86A7, 0xD3C8, 0x86A8, 0xD3BA,
02416     0x86A9, 0xB045, 0x86AA, 0xB042, 0x86AF, 0xB34C, 0x86B0, 0xD7A5,
02417     0x86B1, 0xB34B, 0x86B3, 0xD7A8, 0x86B4, 0xD7AB, 0x86B5, 0xB348,
02418     0x86B6, 0xB346, 0x86B7, 0xD77E, 0x86B8, 0xD7A9, 0x86B9, 0xD7A7,
02419     0x86BA, 0xD7A4, 0x86BB, 0xD7AC, 0x86BC, 0xD7AD, 0x86BD, 0xD7AF,
02420     0x86BE, 0xD7B0, 0x86BF, 0xD77D, 0x86C0, 0xB345, 0x86C1, 0xD7A2,
02421     0x86C2, 0xD7A1, 0x86C3, 0xD7AE, 0x86C4, 0xB347, 0x86C5, 0xD7A3,
02422     0x86C6, 0xB349, 0x86C7, 0xB344, 0x86C8, 0xD7A6, 0x86C9, 0xB34D,
02423     0x86CB, 0xB34A, 0x86CC, 0xD7AA, 0x86D0, 0xB5F1, 0x86D1, 0xDBBF,
02424     0x86D3, 0xDBB4, 0x86D4, 0xB5EE, 0x86D6, 0xDFE7, 0x86D7, 0xDBBD,
02425     0x86D8, 0xDBB1, 0x86D9, 0xB5EC, 0x86DA, 0xDBB6, 0x86DB, 0xB5EF,
02426     0x86DC, 0xDBBA, 0x86DD, 0xDBB8, 0x86DE, 0xB5F2, 0x86DF, 0xB5EB,
02427     0x86E2, 0xDBB2, 0x86E3, 0xDBB5, 0x86E4, 0xB5F0, 0x86E6, 0xDBB3,
02428     0x86E8, 0xDBBE, 0x86E9, 0xDBBC, 0x86EA, 0xDBB7, 0x86EB, 0xDBB9,
02429     0x86EC, 0xDBBB, 0x86ED, 0xB5ED, 0x86F5, 0xDFE8, 0x86F6, 0xDFEE,
02430     0x86F7, 0xDFE4, 0x86F8, 0xDFEA, 0x86F9, 0xB8BA, 0x86FA, 0xDFE6,
02431     0x86FB, 0xB8C0, 0x86FE, 0xB8BF, 0x8700, 0xB8BE, 0x8701, 0xDFED,
02432     0x8702, 0xB8C1, 0x8703, 0xB8C2, 0x8704, 0xDFE3, 0x8705, 0xDFF0,
02433     0x8706, 0xB8C3, 0x8707, 0xB8BD, 0x8708, 0xB8BC, 0x8709, 0xDFEC,
02434     0x870A, 0xB8C4, 0x870B, 0xDFE2, 0x870C, 0xDFE5, 0x870D, 0xDFEF,
02435     0x870E, 0xDFEB, 0x8711, 0xE3F4, 0x8712, 0xE3E9, 0x8713, 0xB8BB,
02436     0x8718, 0xBB6A, 0x8719, 0xE3DD, 0x871A, 0xE3F2, 0x871B, 0xE3DE,
02437     0x871C, 0xBB65, 0x871E, 0xE3DB, 0x8720, 0xE3E4, 0x8721, 0xE3DC,
02438     0x8722, 0xBB67, 0x8723, 0xE3D6, 0x8724, 0xE3F1, 0x8725, 0xBB68,
02439     0x8726, 0xE3EE, 0x8727, 0xE3EF, 0x8728, 0xE3D7, 0x8729, 0xBB6D,
02440     0x872A, 0xE3E6, 0x872C, 0xE3E0, 0x872D, 0xE3E7, 0x872E, 0xE3DA,
02441     0x8730, 0xE3F3, 0x8731, 0xE3EB, 0x8732, 0xE3E5, 0x8733, 0xE3D5,
02442     0x8734, 0xBB69, 0x8735, 0xE3EC, 0x8737, 0xBB6C, 0x8738, 0xE3F0,
02443     0x873A, 0xE3EA, 0x873B, 0xBB66, 0x873C, 0xE3E8, 0x873E, 0xE3E2,
02444     0x873F, 0xBB64, 0x8740, 0xE3D9, 0x8741, 0xE3E1, 0x8742, 0xE3ED,
02445     0x8743, 0xE3DF, 0x8746, 0xE3E3, 0x874C, 0xBDC1, 0x874D, 0xDFE9,
02446     0x874E, 0xE7B2, 0x874F, 0xE7BB, 0x8750, 0xE7B1, 0x8751, 0xE7AD,
02447     0x8752, 0xE7AA, 0x8753, 0xBDC2, 0x8754, 0xE7A8, 0x8755, 0xBB6B,
02448     0x8756, 0xE7A1, 0x8757, 0xBDC0, 0x8758, 0xE7A7, 0x8759, 0xBDBF,
02449     0x875A, 0xE7AC, 0x875B, 0xE7A9, 0x875C, 0xE7B9, 0x875D, 0xE7B4,
02450     0x875E, 0xE7AE, 0x875F, 0xE7B3, 0x8760, 0xBDBB, 0x8761, 0xE7AB,
02451     0x8762, 0xE7BE, 0x8763, 0xE7A2, 0x8764, 0xE7A3, 0x8765, 0xE7BA,
02452     0x8766, 0xBDBC, 0x8767, 0xE7BF, 0x8768, 0xBDBE, 0x8769, 0xE7C0,
02453     0x876A, 0xE7B0, 0x876B, 0xE3D8, 0x876C, 0xE7B6, 0x876D, 0xE7AF,
02454     0x876E, 0xE7B8, 0x876F, 0xE7B5, 0x8773, 0xE7A6, 0x8774, 0xBDB9,
02455     0x8775, 0xE7BD, 0x8776, 0xBDBA, 0x8777, 0xE7A4, 0x8778, 0xBDBD,
02456     0x8779, 0xEB64, 0x877A, 0xE7B7, 0x877B, 0xE7BC, 0x8781, 0xEB61,
02457     0x8782, 0xBDB8, 0x8783, 0xBFC0, 0x8784, 0xEB6B, 0x8785, 0xEB67,
02458     0x8787, 0xEB65, 0x8788, 0xEB60, 0x8789, 0xEB6F, 0x878D, 0xBFC4,
02459     0x878F, 0xEB5C, 0x8790, 0xEB68, 0x8791, 0xEB69, 0x8792, 0xEB5F,
02460     0x8793, 0xEB5E, 0x8794, 0xEB6C, 0x8796, 0xEB62, 0x8797, 0xEB5D,
02461     0x8798, 0xEB63, 0x879A, 0xEB6E, 0x879B, 0xEB5B, 0x879C, 0xEB6D,
02462     0x879D, 0xEB6A, 0x879E, 0xBFC2, 0x879F, 0xBFC1, 0x87A2, 0xBFC3,
02463     0x87A3, 0xEB66, 0x87A4, 0xF0CB, 0x87AA, 0xEE59, 0x87AB, 0xC1B1,
02464     0x87AC, 0xEE5D, 0x87AD, 0xEE5A, 0x87AE, 0xEE61, 0x87AF, 0xEE67,
02465     0x87B0, 0xEE5C, 0x87B2, 0xEE70, 0x87B3, 0xC1AE, 0x87B4, 0xEE6A,
02466     0x87B5, 0xEE5F, 0x87B6, 0xEE6B, 0x87B7, 0xEE66, 0x87B8, 0xEE6D,
02467     0x87B9, 0xEE5E, 0x87BA, 0xC1B3, 0x87BB, 0xC1B2, 0x87BC, 0xEE60,
02468     0x87BD, 0xEE6E, 0x87BE, 0xEE58, 0x87BF, 0xEE6C, 0x87C0, 0xC1AC,
02469     0x87C2, 0xEE64, 0x87C3, 0xEE63, 0x87C4, 0xEE68, 0x87C5, 0xEE5B,
02470     0x87C6, 0xC1B0, 0x87C8, 0xC1B4, 0x87C9, 0xEE62, 0x87CA, 0xEE69,
02471     0x87CB, 0xC1B5, 0x87CC, 0xEE65, 0x87D1, 0xC1AD, 0x87D2, 0xC1AF,
02472     0x87D3, 0xF0C7, 0x87D4, 0xF0C5, 0x87D7, 0xF0CC, 0x87D8, 0xF0C9,
02473     0x87D9, 0xF0CD, 0x87DB, 0xF0BE, 0x87DC, 0xF0C6, 0x87DD, 0xF0D1,
02474     0x87DE, 0xEE6F, 0x87DF, 0xF0C2, 0x87E0, 0xC2CF, 0x87E1, 0xE7A5,
02475     0x87E2, 0xF0BD, 0x87E3, 0xF0CA, 0x87E4, 0xF0C4, 0x87E5, 0xF0C1,
02476     0x87E6, 0xF0BC, 0x87E7, 0xF0BB, 0x87E8, 0xF0D0, 0x87EA, 0xF0C0,
02477     0x87EB, 0xF0BF, 0x87EC, 0xC2CD, 0x87ED, 0xF0C8, 0x87EF, 0xC2CC,
02478     0x87F2, 0xC2CE, 0x87F3, 0xF0C3, 0x87F4, 0xF0CF, 0x87F6, 0xF2DE,
02479     0x87F7, 0xF2DF, 0x87F9, 0xC3C9, 0x87FA, 0xF2DC, 0x87FB, 0xC3C6,
02480     0x87FC, 0xF2E4, 0x87FE, 0xC3CA, 0x87FF, 0xF2E6, 0x8800, 0xF2DB,
02481     0x8801, 0xF0CE, 0x8802, 0xF2E8, 0x8803, 0xF2DD, 0x8805, 0xC3C7,
02482     0x8806, 0xF2E3, 0x8808, 0xF2E5, 0x8809, 0xF2E0, 0x880A, 0xF2E7,
02483     0x880B, 0xF2E2, 0x880C, 0xF2E1, 0x880D, 0xC3C8, 0x8810, 0xF4C5,
02484     0x8811, 0xF4C6, 0x8813, 0xF4C8, 0x8814, 0xC4AE, 0x8815, 0xC4AF,
02485     0x8816, 0xF4C9, 0x8817, 0xF4C7, 0x8819, 0xF4C4, 0x881B, 0xF642,
02486     0x881C, 0xF645, 0x881D, 0xF641, 0x881F, 0xC4FA, 0x8820, 0xF643,
02487     0x8821, 0xC4F9, 0x8822, 0xC4F8, 0x8823, 0xC4F7, 0x8824, 0xF644,
02488     0x8825, 0xF751, 0x8826, 0xF74F, 0x8828, 0xF74E, 0x8829, 0xF640,
02489     0x882A, 0xF750, 0x882B, 0xF646, 0x882C, 0xF74D, 0x882E, 0xF7F9,
02490     0x882F, 0xF7D7, 0x8830, 0xF7F7, 0x8831, 0xC5DB, 0x8832, 0xF7F8,
02491     0x8833, 0xF7FA, 0x8835, 0xF8BF, 0x8836, 0xC5FA, 0x8837, 0xF8BE,
02492     0x8838, 0xF8BD, 0x8839, 0xC5FB, 0x883B, 0xC65A, 0x883C, 0xF96E,
02493     0x883D, 0xF9A7, 0x883E, 0xF9A6, 0x883F, 0xF9A8, 0x8840, 0xA6E5,
02494     0x8841, 0xD0AA, 0x8843, 0xD3CF, 0x8844, 0xD3D0, 0x8848, 0xDBC0,
02495     0x884A, 0xF647, 0x884B, 0xF8C0, 0x884C, 0xA6E6, 0x884D, 0xAD6C,
02496     0x884E, 0xD0AB, 0x8852, 0xD7B1, 0x8853, 0xB34E, 0x8855, 0xDBC2,
02497     0x8856, 0xDBC1, 0x8857, 0xB5F3, 0x8859, 0xB8C5, 0x885A, 0xE7C1,
02498     0x885B, 0xBDC3, 0x885D, 0xBDC4, 0x8861, 0xBFC5, 0x8862, 0xC5FC,
02499     0x8863, 0xA6E7, 0x8867, 0xD0AC, 0x8868, 0xAAED, 0x8869, 0xD0AE,
02500     0x886A, 0xD0AD, 0x886B, 0xAD6D, 0x886D, 0xD3D1, 0x886F, 0xD3D8,
02501     0x8870, 0xB049, 0x8871, 0xD3D6, 0x8872, 0xD3D4, 0x8874, 0xD3DB,
02502     0x8875, 0xD3D2, 0x8876, 0xD3D3, 0x8877, 0xB04A, 0x8879, 0xB04E,
02503     0x887C, 0xD3DC, 0x887D, 0xB04D, 0x887E, 0xD3DA, 0x887F, 0xD3D7,
02504     0x8880, 0xD3D5, 0x8881, 0xB04B, 0x8882, 0xB04C, 0x8883, 0xD3D9,
02505     0x8888, 0xB350, 0x8889, 0xD7B2, 0x888B, 0xB355, 0x888C, 0xD7C2,
02506     0x888D, 0xB354, 0x888E, 0xD7C4, 0x8891, 0xD7B8, 0x8892, 0xB352,
02507     0x8893, 0xD7C3, 0x8895, 0xD7B3, 0x8896, 0xB353, 0x8897, 0xD7BF,
02508     0x8898, 0xD7BB, 0x8899, 0xD7BD, 0x889A, 0xD7B7, 0x889B, 0xD7BE,
02509     0x889E, 0xB34F, 0x889F, 0xD7BA, 0x88A1, 0xD7B9, 0x88A2, 0xD7B5,
02510     0x88A4, 0xD7C0, 0x88A7, 0xD7BC, 0x88A8, 0xD7B4, 0x88AA, 0xD7B6,
02511     0x88AB, 0xB351, 0x88AC, 0xD7C1, 0x88B1, 0xB5F6, 0x88B2, 0xDBCD,
02512     0x88B6, 0xDBC9, 0x88B7, 0xDBCB, 0x88B8, 0xDBC6, 0x88B9, 0xDBC5,
02513     0x88BA, 0xDBC3, 0x88BC, 0xDBCA, 0x88BD, 0xDBCC, 0x88BE, 0xDBC8,
02514     0x88C0, 0xDBC7, 0x88C1, 0xB5F4, 0x88C2, 0xB5F5, 0x88C9, 0xDBCF,
02515     0x88CA, 0xB8CD, 0x88CB, 0xDFF2, 0x88CC, 0xDFF8, 0x88CD, 0xDFF3,
02516     0x88CE, 0xDFF4, 0x88CF, 0xF9D8, 0x88D0, 0xDFF9, 0x88D2, 0xB8CF,
02517     0x88D4, 0xB8C7, 0x88D5, 0xB8CE, 0x88D6, 0xDFF1, 0x88D7, 0xDBC4,
02518     0x88D8, 0xB8CA, 0x88D9, 0xB8C8, 0x88DA, 0xDFF7, 0x88DB, 0xDFF6,
02519     0x88DC, 0xB8C9, 0x88DD, 0xB8CB, 0x88DE, 0xDFF5, 0x88DF, 0xB8C6,
02520     0x88E1, 0xB8CC, 0x88E7, 0xE3F6, 0x88E8, 0xBB74, 0x88EB, 0xE442,
02521     0x88EC, 0xE441, 0x88EE, 0xE3FB, 0x88EF, 0xBB76, 0x88F0, 0xE440,
02522     0x88F1, 0xE3F7, 0x88F2, 0xE3F8, 0x88F3, 0xBB6E, 0x88F4, 0xBB70,
02523     0x88F6, 0xE3FD, 0x88F7, 0xE3F5, 0x88F8, 0xBB72, 0x88F9, 0xBB71,
02524     0x88FA, 0xE3F9, 0x88FB, 0xE3FE, 0x88FC, 0xE3FC, 0x88FD, 0xBB73,
02525     0x88FE, 0xE3FA, 0x8901, 0xDBCE, 0x8902, 0xBB6F, 0x8905, 0xE7C2,
02526     0x8906, 0xE7C9, 0x8907, 0xBDC6, 0x8909, 0xE7CD, 0x890A, 0xBDCA,
02527     0x890B, 0xE7C5, 0x890C, 0xE7C3, 0x890E, 0xE7CC, 0x8910, 0xBDC5,
02528     0x8911, 0xE7CB, 0x8912, 0xBDC7, 0x8913, 0xBDC8, 0x8914, 0xE7C4,
02529     0x8915, 0xBDC9, 0x8916, 0xE7CA, 0x8917, 0xE7C6, 0x8918, 0xE7C7,
02530     0x8919, 0xE7C8, 0x891A, 0xBB75, 0x891E, 0xEB70, 0x891F, 0xEB7C,
02531     0x8921, 0xBFCA, 0x8922, 0xEB77, 0x8923, 0xEB79, 0x8925, 0xBFC8,
02532     0x8926, 0xEB71, 0x8927, 0xEB75, 0x8929, 0xEB78, 0x892A, 0xBFC6,
02533     0x892B, 0xBFC9, 0x892C, 0xEB7B, 0x892D, 0xEB73, 0x892E, 0xEB74,
02534     0x892F, 0xEB7A, 0x8930, 0xEB72, 0x8931, 0xEB76, 0x8932, 0xBFC7,
02535     0x8933, 0xEE72, 0x8935, 0xEE71, 0x8936, 0xC1B7, 0x8937, 0xEE77,
02536     0x8938, 0xC1B9, 0x893B, 0xC1B6, 0x893C, 0xEE73, 0x893D, 0xC1BA,
02537     0x893E, 0xEE74, 0x8941, 0xEE75, 0x8942, 0xEE78, 0x8944, 0xC1B8,
02538     0x8946, 0xF0D6, 0x8949, 0xF0D9, 0x894B, 0xF0D3, 0x894C, 0xF0D5,
02539     0x894F, 0xF0D4, 0x8950, 0xF0D7, 0x8951, 0xF0D8, 0x8952, 0xEE76,
02540     0x8953, 0xF0D2, 0x8956, 0xC3CD, 0x8957, 0xF2EC, 0x8958, 0xF2EF,
02541     0x8959, 0xF2F1, 0x895A, 0xF2EA, 0x895B, 0xF2EB, 0x895C, 0xF2EE,
02542     0x895D, 0xF2F0, 0x895E, 0xC3CE, 0x895F, 0xC3CC, 0x8960, 0xC3CB,
02543     0x8961, 0xF2ED, 0x8962, 0xF2E9, 0x8963, 0xF4CA, 0x8964, 0xC4B0,
02544     0x8966, 0xF4CB, 0x8969, 0xF649, 0x896A, 0xC4FB, 0x896B, 0xF64B,
02545     0x896C, 0xC4FC, 0x896D, 0xF648, 0x896E, 0xF64A, 0x896F, 0xC5A8,
02546     0x8971, 0xF752, 0x8972, 0xC5A7, 0x8973, 0xF7FD, 0x8974, 0xF7FC,
02547     0x8976, 0xF7FB, 0x8979, 0xF948, 0x897A, 0xF949, 0x897B, 0xF94B,
02548     0x897C, 0xF94A, 0x897E, 0xCA50, 0x897F, 0xA6E8, 0x8981, 0xAD6E,
02549     0x8982, 0xD7C5, 0x8983, 0xB5F7, 0x8985, 0xDFFA, 0x8986, 0xC2D0,
02550     0x8988, 0xF2F2, 0x898B, 0xA8A3, 0x898F, 0xB357, 0x8993, 0xB356,
02551     0x8995, 0xDBD0, 0x8996, 0xB5F8, 0x8997, 0xDBD2, 0x8998, 0xDBD1,
02552     0x899B, 0xDFFB, 0x899C, 0xB8D0, 0x899D, 0xE443, 0x899E, 0xE446,
02553     0x899F, 0xE445, 0x89A1, 0xE444, 0x89A2, 0xE7CE, 0x89A3, 0xE7D0,
02554     0x89A4, 0xE7CF, 0x89A6, 0xBFCC, 0x89AA, 0xBFCB, 0x89AC, 0xC1BB,
02555     0x89AD, 0xEE79, 0x89AE, 0xEE7B, 0x89AF, 0xEE7A, 0x89B2, 0xC2D1,
02556     0x89B6, 0xF2F4, 0x89B7, 0xF2F3, 0x89B9, 0xF4CC, 0x89BA, 0xC4B1,
02557     0x89BD, 0xC4FD, 0x89BE, 0xF754, 0x89BF, 0xF753, 0x89C0, 0xC65B,
02558     0x89D2, 0xA8A4, 0x89D3, 0xD0AF, 0x89D4, 0xAD6F, 0x89D5, 0xD7C8,
02559     0x89D6, 0xD7C6, 0x89D9, 0xD7C7, 0x89DA, 0xDBD4, 0x89DB, 0xDBD5,
02560     0x89DC, 0xE043, 0x89DD, 0xDBD3, 0x89DF, 0xDFFC, 0x89E0, 0xE041,
02561     0x89E1, 0xE040, 0x89E2, 0xE042, 0x89E3, 0xB8D1, 0x89E4, 0xDFFE,
02562     0x89E5, 0xDFFD, 0x89E6, 0xE044, 0x89E8, 0xE449, 0x89E9, 0xE447,
02563     0x89EB, 0xE448, 0x89EC, 0xE7D3, 0x89ED, 0xE7D1, 0x89F0, 0xE7D2,
02564     0x89F1, 0xEB7D, 0x89F2, 0xEE7C, 0x89F3, 0xEE7D, 0x89F4, 0xC2D2,
02565     0x89F6, 0xF2F5, 0x89F7, 0xF4CD, 0x89F8, 0xC4B2, 0x89FA, 0xF64C,
02566     0x89FB, 0xF755, 0x89FC, 0xC5A9, 0x89FE, 0xF7FE, 0x89FF, 0xF94C,
02567     0x8A00, 0xA8A5, 0x8A02, 0xAD71, 0x8A03, 0xAD72, 0x8A04, 0xD0B0,
02568     0x8A07, 0xD0B1, 0x8A08, 0xAD70, 0x8A0A, 0xB054, 0x8A0C, 0xB052,
02569     0x8A0E, 0xB051, 0x8A0F, 0xB058, 0x8A10, 0xB050, 0x8A11, 0xB059,
02570     0x8A12, 0xD3DD, 0x8A13, 0xB056, 0x8A15, 0xB053, 0x8A16, 0xB057,
02571     0x8A17, 0xB055, 0x8A18, 0xB04F, 0x8A1B, 0xB35F, 0x8A1D, 0xB359,
02572     0x8A1E, 0xD7CC, 0x8A1F, 0xB35E, 0x8A22, 0xB360, 0x8A23, 0xB35A,
02573     0x8A25, 0xB35B, 0x8A27, 0xD7CA, 0x8A2A, 0xB358, 0x8A2C, 0xD7CB,
02574     0x8A2D, 0xB35D, 0x8A30, 0xD7C9, 0x8A31, 0xB35C, 0x8A34, 0xB644,
02575     0x8A36, 0xB646, 0x8A39, 0xDBD8, 0x8A3A, 0xB645, 0x8A3B, 0xB5F9,
02576     0x8A3C, 0xB5FD, 0x8A3E, 0xB8E4, 0x8A3F, 0xE049, 0x8A40, 0xDBDA,
02577     0x8A41, 0xB5FE, 0x8A44, 0xDBDD, 0x8A45, 0xDBDE, 0x8A46, 0xB643,
02578     0x8A48, 0xDBE0, 0x8A4A, 0xDBE2, 0x8A4C, 0xDBE3, 0x8A4D, 0xDBD7,
02579     0x8A4E, 0xDBD6, 0x8A4F, 0xDBE4, 0x8A50, 0xB642, 0x8A51, 0xDBE1,
02580     0x8A52, 0xDBDF, 0x8A54, 0xB640, 0x8A55, 0xB5FB, 0x8A56, 0xB647,
02581     0x8A57, 0xDBDB, 0x8A58, 0xDBDC, 0x8A59, 0xDBD9, 0x8A5B, 0xB641,
02582     0x8A5E, 0xB5FC, 0x8A60, 0xB5FA, 0x8A61, 0xE048, 0x8A62, 0xB8DF,
02583     0x8A63, 0xB8DA, 0x8A66, 0xB8D5, 0x8A68, 0xB8E5, 0x8A69, 0xB8D6,
02584     0x8A6B, 0xB8D2, 0x8A6C, 0xB8E1, 0x8A6D, 0xB8DE, 0x8A6E, 0xB8E0,
02585     0x8A70, 0xB8D7, 0x8A71, 0xB8DC, 0x8A72, 0xB8D3, 0x8A73, 0xB8D4,
02586     0x8A74, 0xE050, 0x8A75, 0xE04D, 0x8A76, 0xE045, 0x8A77, 0xE04A,
02587     0x8A79, 0xB8E2, 0x8A7A, 0xE051, 0x8A7B, 0xB8E3, 0x8A7C, 0xB8D9,
02588     0x8A7F, 0xE047, 0x8A81, 0xE04F, 0x8A82, 0xE04B, 0x8A83, 0xE04E,
02589     0x8A84, 0xE04C, 0x8A85, 0xB8DD, 0x8A86, 0xE046, 0x8A87, 0xB8D8,
02590     0x8A8B, 0xE44C, 0x8A8C, 0xBB78, 0x8A8D, 0xBB7B, 0x8A8F, 0xE44E,
02591     0x8A91, 0xBBA5, 0x8A92, 0xE44D, 0x8A93, 0xBB7D, 0x8A95, 0xBDCF,
02592     0x8A96, 0xE44F, 0x8A98, 0xBBA4, 0x8A99, 0xE44B, 0x8A9A, 0xBBA6,
02593     0x8A9E, 0xBB79, 0x8AA0, 0xB8DB, 0x8AA1, 0xBB7C, 0x8AA3, 0xBB7A,
02594     0x8AA4, 0xBB7E, 0x8AA5, 0xBBA2, 0x8AA6, 0xBB77, 0x8AA7, 0xBBA7,
02595     0x8AA8, 0xBBA3, 0x8AAA, 0xBBA1, 0x8AAB, 0xE44A, 0x8AB0, 0xBDD6,
02596     0x8AB2, 0xBDD2, 0x8AB6, 0xBDD9, 0x8AB8, 0xE7D6, 0x8AB9, 0xBDDA,
02597     0x8ABA, 0xE7E2, 0x8ABB, 0xE7DB, 0x8ABC, 0xBDCB, 0x8ABD, 0xE7E3,
02598     0x8ABE, 0xE7DD, 0x8ABF, 0xBDD5, 0x8AC0, 0xE7DE, 0x8AC2, 0xBDD4,
02599     0x8AC3, 0xE7E1, 0x8AC4, 0xBDCE, 0x8AC5, 0xE7DF, 0x8AC6, 0xE7D5,
02600     0x8AC7, 0xBDCD, 0x8AC8, 0xEBAA, 0x8AC9, 0xBDD3, 0x8ACB, 0xBDD0,
02601     0x8ACD, 0xBDD8, 0x8ACF, 0xE7D4, 0x8AD1, 0xE7D8, 0x8AD2, 0xBDCC,
02602     0x8AD3, 0xE7D7, 0x8AD4, 0xE7D9, 0x8AD5, 0xE7DA, 0x8AD6, 0xBDD7,
02603     0x8AD7, 0xE7DC, 0x8AD8, 0xE7E0, 0x8AD9, 0xE7E4, 0x8ADB, 0xBDDB,
02604     0x8ADC, 0xBFD2, 0x8ADD, 0xEBA5, 0x8ADE, 0xEBAB, 0x8ADF, 0xEBA8,
02605     0x8AE0, 0xEB7E, 0x8AE1, 0xEBAC, 0x8AE2, 0xEBA1, 0x8AE4, 0xEBA7,
02606     0x8AE6, 0xBFCD, 0x8AE7, 0xBFD3, 0x8AE8, 0xEBAD, 0x8AEB, 0xBFCF,
02607     0x8AED, 0xBFD9, 0x8AEE, 0xBFD4, 0x8AEF, 0xEBAF, 0x8AF0, 0xEBA9,
02608     0x8AF1, 0xBFD0, 0x8AF2, 0xEBA2, 0x8AF3, 0xBFDA, 0x8AF4, 0xEBA3,
02609     0x8AF5, 0xEBA4, 0x8AF6, 0xBFDB, 0x8AF7, 0xBFD8, 0x8AF8, 0xBDD1,
02610     0x8AFA, 0xBFCE, 0x8AFB, 0xEBB0, 0x8AFC, 0xBFDC, 0x8AFE, 0xBFD5,
02611     0x8AFF, 0xEBAE, 0x8B00, 0xBFD1, 0x8B01, 0xBFD6, 0x8B02, 0xBFD7,
02612     0x8B04, 0xC1C3, 0x8B05, 0xEEA4, 0x8B06, 0xEEAD, 0x8B07, 0xEEAA,
02613     0x8B08, 0xEEAC, 0x8B0A, 0xC1C0, 0x8B0B, 0xEEA5, 0x8B0D, 0xEEAB,
02614     0x8B0E, 0xC1BC, 0x8B0F, 0xEEA7, 0x8B10, 0xC1C4, 0x8B11, 0xEEA3,
02615     0x8B12, 0xEEA8, 0x8B13, 0xEEAF, 0x8B14, 0xEBA6, 0x8B15, 0xEEA9,
02616     0x8B16, 0xEEA2, 0x8B17, 0xC1BD, 0x8B18, 0xEEA1, 0x8B19, 0xC1BE,
02617     0x8B1A, 0xEEB0, 0x8B1B, 0xC1BF, 0x8B1C, 0xEEAE, 0x8B1D, 0xC1C2,
02618     0x8B1E, 0xEE7E, 0x8B20, 0xC1C1, 0x8B22, 0xEEA6, 0x8B23, 0xF0DC,
02619     0x8B24, 0xF0EA, 0x8B25, 0xF0E5, 0x8B26, 0xF0E7, 0x8B27, 0xF0DB,
02620     0x8B28, 0xC2D3, 0x8B2A, 0xF0DA, 0x8B2B, 0xC2D6, 0x8B2C, 0xC2D5,
02621     0x8B2E, 0xF0E9, 0x8B2F, 0xF0E1, 0x8B30, 0xF0DE, 0x8B31, 0xF0E4,
02622     0x8B33, 0xF0DD, 0x8B35, 0xF0DF, 0x8B36, 0xF0E8, 0x8B37, 0xF0E6,
02623     0x8B39, 0xC2D4, 0x8B3A, 0xF0ED, 0x8B3B, 0xF0EB, 0x8B3C, 0xF0E2,
02624     0x8B3D, 0xF0EC, 0x8B3E, 0xF0E3, 0x8B40, 0xF2F9, 0x8B41, 0xC3CF,
02625     0x8B42, 0xF341, 0x8B45, 0xF64F, 0x8B46, 0xC3D6, 0x8B47, 0xF0E0,
02626     0x8B48, 0xF2F7, 0x8B49, 0xC3D2, 0x8B4A, 0xF2F8, 0x8B4B, 0xF2FD,
02627     0x8B4E, 0xC3D4, 0x8B4F, 0xC3D5, 0x8B50, 0xF2F6, 0x8B51, 0xF340,
02628     0x8B52, 0xF342, 0x8B53, 0xF2FA, 0x8B54, 0xF2FC, 0x8B55, 0xF2FE,
02629     0x8B56, 0xF2FB, 0x8B57, 0xF343, 0x8B58, 0xC3D1, 0x8B59, 0xC3D7,
02630     0x8B5A, 0xC3D3, 0x8B5C, 0xC3D0, 0x8B5D, 0xF4D0, 0x8B5F, 0xC4B7,
02631     0x8B60, 0xF4CE, 0x8B63, 0xF4D2, 0x8B65, 0xF4D3, 0x8B66, 0xC4B5,
02632     0x8B67, 0xF4D4, 0x8B68, 0xF4D1, 0x8B6A, 0xF4CF, 0x8B6B, 0xC4B8,
02633     0x8B6C, 0xC4B4, 0x8B6D, 0xF4D5, 0x8B6F, 0xC4B6, 0x8B70, 0xC4B3,
02634     0x8B74, 0xC4FE, 0x8B77, 0xC540, 0x8B78, 0xF64E, 0x8B79, 0xF64D,
02635     0x8B7A, 0xF650, 0x8B7B, 0xF651, 0x8B7D, 0xC541, 0x8B7E, 0xF756,
02636     0x8B7F, 0xF75B, 0x8B80, 0xC5AA, 0x8B82, 0xF758, 0x8B84, 0xF757,
02637     0x8B85, 0xF75A, 0x8B86, 0xF759, 0x8B88, 0xF843, 0x8B8A, 0xC5DC,
02638     0x8B8B, 0xF842, 0x8B8C, 0xF840, 0x8B8E, 0xF841, 0x8B92, 0xC5FE,
02639     0x8B93, 0xC5FD, 0x8B94, 0xF8C1, 0x8B95, 0xF8C2, 0x8B96, 0xC640,
02640     0x8B98, 0xF94D, 0x8B99, 0xF94E, 0x8B9A, 0xC667, 0x8B9C, 0xC66D,
02641     0x8B9E, 0xF9A9, 0x8B9F, 0xF9C8, 0x8C37, 0xA8A6, 0x8C39, 0xD7CD,
02642     0x8C3B, 0xD7CE, 0x8C3C, 0xE052, 0x8C3D, 0xE450, 0x8C3E, 0xE7E5,
02643     0x8C3F, 0xC1C6, 0x8C41, 0xC1C5, 0x8C42, 0xF0EE, 0x8C43, 0xF344,
02644     0x8C45, 0xF844, 0x8C46, 0xA8A7, 0x8C47, 0xD3DE, 0x8C48, 0xB05A,
02645     0x8C49, 0xB361, 0x8C4A, 0xE054, 0x8C4B, 0xE053, 0x8C4C, 0xBDDC,
02646     0x8C4D, 0xE7E6, 0x8C4E, 0xBDDD, 0x8C4F, 0xEEB1, 0x8C50, 0xC2D7,
02647     0x8C54, 0xC676, 0x8C55, 0xA8A8, 0x8C56, 0xCDCB, 0x8C57, 0xD3DF,
02648     0x8C5A, 0xB362, 0x8C5C, 0xD7CF, 0x8C5D, 0xD7D0, 0x8C5F, 0xDBE5,
02649     0x8C61, 0xB648, 0x8C62, 0xB8E6, 0x8C64, 0xE056, 0x8C65, 0xE055,
02650     0x8C66, 0xE057, 0x8C68, 0xE451, 0x8C69, 0xE452, 0x8C6A, 0xBBA8,
02651     0x8C6B, 0xBFDD, 0x8C6C, 0xBDDE, 0x8C6D, 0xBFDE, 0x8C6F, 0xEEB5,
02652     0x8C70, 0xEEB2, 0x8C71, 0xEEB4, 0x8C72, 0xEEB3, 0x8C73, 0xC1C7,
02653     0x8C75, 0xF0EF, 0x8C76, 0xF346, 0x8C77, 0xF345, 0x8C78, 0xCBA4,
02654     0x8C79, 0xB05C, 0x8C7A, 0xB05B, 0x8C7B, 0xD3E0, 0x8C7D, 0xD7D1,
02655     0x8C80, 0xDBE7, 0x8C81, 0xDBE6, 0x8C82, 0xB649, 0x8C84, 0xE059,
02656     0x8C85, 0xE05A, 0x8C86, 0xE058, 0x8C89, 0xB8E8, 0x8C8A, 0xB8E7,
02657     0x8C8C, 0xBBAA, 0x8C8D, 0xBBA9, 0x8C8F, 0xE7E7, 0x8C90, 0xEBB3,
02658     0x8C91, 0xEBB1, 0x8C92, 0xEBB2, 0x8C93, 0xBFDF, 0x8C94, 0xEEB7,
02659     0x8C95, 0xEEB6, 0x8C97, 0xF0F2, 0x8C98, 0xF0F1, 0x8C99, 0xF0F0,
02660     0x8C9A, 0xF347, 0x8C9C, 0xF9AA, 0x8C9D, 0xA8A9, 0x8C9E, 0xAD73,
02661     0x8CA0, 0xAD74, 0x8CA1, 0xB05D, 0x8CA2, 0xB05E, 0x8CA3, 0xD3E2,
02662     0x8CA4, 0xD3E1, 0x8CA5, 0xD7D2, 0x8CA7, 0xB368, 0x8CA8, 0xB366,
02663     0x8CA9, 0xB363, 0x8CAA, 0xB367, 0x8CAB, 0xB365, 0x8CAC, 0xB364,
02664     0x8CAF, 0xB64A, 0x8CB0, 0xDBEA, 0x8CB2, 0xB8ED, 0x8CB3, 0xB64C,
02665     0x8CB4, 0xB651, 0x8CB5, 0xDBEC, 0x8CB6, 0xB653, 0x8CB7, 0xB652,
02666     0x8CB8, 0xB655, 0x8CB9, 0xDBEB, 0x8CBA, 0xDBE8, 0x8CBB, 0xB64F,
02667     0x8CBC, 0xB64B, 0x8CBD, 0xB64D, 0x8CBE, 0xDBE9, 0x8CBF, 0xB654,
02668     0x8CC0, 0xB650, 0x8CC1, 0xB64E, 0x8CC2, 0xB8EF, 0x8CC3, 0xB8EE,
02669     0x8CC4, 0xB8EC, 0x8CC5, 0xB8F0, 0x8CC7, 0xB8EA, 0x8CC8, 0xB8EB,
02670     0x8CCA, 0xB8E9, 0x8CCC, 0xE05B, 0x8CCF, 0xE454, 0x8CD1, 0xBBAC,
02671     0x8CD2, 0xBBAD, 0x8CD3, 0xBBAB, 0x8CD5, 0xE453, 0x8CD7, 0xE455,
02672     0x8CD9, 0xE7EA, 0x8CDA, 0xE7EC, 0x8CDC, 0xBDE7, 0x8CDD, 0xE7ED,
02673     0x8CDE, 0xBDE0, 0x8CDF, 0xE7E9, 0x8CE0, 0xBDDF, 0x8CE1, 0xBDE9,
02674     0x8CE2, 0xBDE5, 0x8CE3, 0xBDE6, 0x8CE4, 0xBDE2, 0x8CE5, 0xE7E8,
02675     0x8CE6, 0xBDE1, 0x8CE7, 0xE7EE, 0x8CE8, 0xE7EB, 0x8CEA, 0xBDE8,
02676     0x8CEC, 0xBDE3, 0x8CED, 0xBDE4, 0x8CEE, 0xEBB5, 0x8CF0, 0xEBB7,
02677     0x8CF1, 0xEBB6, 0x8CF3, 0xEBB8, 0x8CF4, 0xBFE0, 0x8CF5, 0xEBB4,
02678     0x8CF8, 0xC1CB, 0x8CF9, 0xEEB8, 0x8CFA, 0xC1C8, 0x8CFB, 0xC1CC,
02679     0x8CFC, 0xC1CA, 0x8CFD, 0xC1C9, 0x8CFE, 0xF0F3, 0x8D00, 0xF0F6,
02680     0x8D02, 0xF0F5, 0x8D04, 0xF0F4, 0x8D05, 0xC2D8, 0x8D06, 0xF348,
02681     0x8D07, 0xF349, 0x8D08, 0xC3D8, 0x8D09, 0xF34A, 0x8D0A, 0xC3D9,
02682     0x8D0D, 0xC4BA, 0x8D0F, 0xC4B9, 0x8D10, 0xF652, 0x8D13, 0xC542,
02683     0x8D14, 0xF653, 0x8D15, 0xF75C, 0x8D16, 0xC5AB, 0x8D17, 0xC5AC,
02684     0x8D19, 0xF845, 0x8D1B, 0xC642, 0x8D64, 0xA8AA, 0x8D66, 0xB36A,
02685     0x8D67, 0xB369, 0x8D68, 0xE05C, 0x8D69, 0xE05D, 0x8D6B, 0xBBAE,
02686     0x8D6C, 0xEBB9, 0x8D6D, 0xBDEA, 0x8D6E, 0xEBBA, 0x8D6F, 0xEEB9,
02687     0x8D70, 0xA8AB, 0x8D72, 0xD0B2, 0x8D73, 0xAD76, 0x8D74, 0xAD75,
02688     0x8D76, 0xD3E3, 0x8D77, 0xB05F, 0x8D78, 0xD3E4, 0x8D79, 0xD7D5,
02689     0x8D7B, 0xD7D4, 0x8D7D, 0xD7D3, 0x8D80, 0xDBEE, 0x8D81, 0xB658,
02690     0x8D84, 0xDBED, 0x8D85, 0xB657, 0x8D89, 0xDBEF, 0x8D8A, 0xB656,
02691     0x8D8C, 0xE05F, 0x8D8D, 0xE062, 0x8D8E, 0xE060, 0x8D8F, 0xE061,
02692     0x8D90, 0xE065, 0x8D91, 0xE05E, 0x8D92, 0xE066, 0x8D93, 0xE063,
02693     0x8D94, 0xE064, 0x8D95, 0xBBB0, 0x8D96, 0xE456, 0x8D99, 0xBBAF,
02694     0x8D9B, 0xE7F2, 0x8D9C, 0xE7F0, 0x8D9F, 0xBDEB, 0x8DA0, 0xE7EF,
02695     0x8DA1, 0xE7F1, 0x8DA3, 0xBDEC, 0x8DA5, 0xEBBB, 0x8DA7, 0xEBBC,
02696     0x8DA8, 0xC1CD, 0x8DAA, 0xF34C, 0x8DAB, 0xF34E, 0x8DAC, 0xF34B,
02697     0x8DAD, 0xF34D, 0x8DAE, 0xF4D6, 0x8DAF, 0xF654, 0x8DB2, 0xF96F,
02698     0x8DB3, 0xA8AC, 0x8DB4, 0xAD77, 0x8DB5, 0xD3E5, 0x8DB6, 0xD3E7,
02699     0x8DB7, 0xD3E6, 0x8DB9, 0xD7D8, 0x8DBA, 0xB36C, 0x8DBC, 0xD7D6,
02700     0x8DBE, 0xB36B, 0x8DBF, 0xD7D9, 0x8DC1, 0xD7DA, 0x8DC2, 0xD7D7,
02701     0x8DC5, 0xDBFB, 0x8DC6, 0xB660, 0x8DC7, 0xDBF3, 0x8DC8, 0xDBF9,
02702     0x8DCB, 0xB65B, 0x8DCC, 0xB65E, 0x8DCD, 0xDBF2, 0x8DCE, 0xB659,
02703     0x8DCF, 0xDBF6, 0x8DD0, 0xE06C, 0x8DD1, 0xB65D, 0x8DD3, 0xDBF1,
02704     0x8DD5, 0xDBF7, 0x8DD6, 0xDBF4, 0x8DD7, 0xDBFA, 0x8DD8, 0xDBF0,
02705     0x8DD9, 0xDBF8, 0x8DDA, 0xB65C, 0x8DDB, 0xB65F, 0x8DDC, 0xDBF5,
02706     0x8DDD, 0xB65A, 0x8DDF, 0xB8F2, 0x8DE0, 0xE068, 0x8DE1, 0xB8F1,
02707     0x8DE2, 0xE06F, 0x8DE3, 0xE06E, 0x8DE4, 0xB8F8, 0x8DE6, 0xB8F9,
02708     0x8DE7, 0xE070, 0x8DE8, 0xB8F3, 0x8DE9, 0xE06D, 0x8DEA, 0xB8F7,
02709     0x8DEB, 0xE072, 0x8DEC, 0xE069, 0x8DEE, 0xE06B, 0x8DEF, 0xB8F4,
02710     0x8DF0, 0xE067, 0x8DF1, 0xE06A, 0x8DF2, 0xE071, 0x8DF3, 0xB8F5,
02711     0x8DF4, 0xE073, 0x8DFA, 0xB8F6, 0x8DFC, 0xBBB1, 0x8DFD, 0xE45B,
02712     0x8DFE, 0xE461, 0x8DFF, 0xE459, 0x8E00, 0xE462, 0x8E02, 0xE458,
02713     0x8E03, 0xE45D, 0x8E04, 0xE463, 0x8E05, 0xE460, 0x8E06, 0xE45F,
02714     0x8E07, 0xE45E, 0x8E09, 0xE457, 0x8E0A, 0xE45C, 0x8E0D, 0xE45A,
02715     0x8E0F, 0xBDF1, 0x8E10, 0xBDEE, 0x8E11, 0xE7FB, 0x8E12, 0xE841,
02716     0x8E13, 0xE843, 0x8E14, 0xE840, 0x8E15, 0xE7F8, 0x8E16, 0xE7FA,
02717     0x8E17, 0xE845, 0x8E18, 0xE842, 0x8E19, 0xE7FC, 0x8E1A, 0xE846,
02718     0x8E1B, 0xE7F9, 0x8E1C, 0xE844, 0x8E1D, 0xBDEF, 0x8E1E, 0xBDF5,
02719     0x8E1F, 0xBDF3, 0x8E20, 0xE7F3, 0x8E21, 0xBDF4, 0x8E22, 0xBDF0,
02720     0x8E23, 0xE7F4, 0x8E24, 0xE7F6, 0x8E25, 0xE7F5, 0x8E26, 0xE7FD,
02721     0x8E27, 0xE7FE, 0x8E29, 0xBDF2, 0x8E2B, 0xBDED, 0x8E2E, 0xE7F7,
02722     0x8E30, 0xEBC6, 0x8E31, 0xBFE2, 0x8E33, 0xEBBD, 0x8E34, 0xBFE3,
02723     0x8E35, 0xBFE6, 0x8E36, 0xEBC2, 0x8E38, 0xEBBF, 0x8E39, 0xBFE5,
02724     0x8E3C, 0xEBC3, 0x8E3D, 0xEBC4, 0x8E3E, 0xEBBE, 0x8E3F, 0xEBC7,
02725     0x8E40, 0xEBC0, 0x8E41, 0xEBC5, 0x8E42, 0xBFE4, 0x8E44, 0xBFE1,
02726     0x8E45, 0xEBC1, 0x8E47, 0xEEBF, 0x8E48, 0xC1D0, 0x8E49, 0xC1CE,
02727     0x8E4A, 0xC1D1, 0x8E4B, 0xC1CF, 0x8E4C, 0xEEBE, 0x8E4D, 0xEEBB,
02728     0x8E4E, 0xEEBA, 0x8E50, 0xEEBD, 0x8E53, 0xEEBC, 0x8E54, 0xF145,
02729     0x8E55, 0xC2DE, 0x8E56, 0xF0FB, 0x8E57, 0xF0FA, 0x8E59, 0xC2D9,
02730     0x8E5A, 0xF141, 0x8E5B, 0xF140, 0x8E5C, 0xF0F7, 0x8E5D, 0xF143,
02731     0x8E5E, 0xF0FC, 0x8E5F, 0xC2DD, 0x8E60, 0xF0F9, 0x8E61, 0xF142,
02732     0x8E62, 0xF0F8, 0x8E63, 0xC2DA, 0x8E64, 0xC2DC, 0x8E65, 0xF0FD,
02733     0x8E66, 0xC2DB, 0x8E67, 0xF0FE, 0x8E69, 0xF144, 0x8E6A, 0xF352,
02734     0x8E6C, 0xC3DE, 0x8E6D, 0xF34F, 0x8E6F, 0xF353, 0x8E72, 0xC3DB,
02735     0x8E73, 0xF351, 0x8E74, 0xC3E0, 0x8E76, 0xC3DD, 0x8E78, 0xF350,
02736     0x8E7A, 0xC3DF, 0x8E7B, 0xF354, 0x8E7C, 0xC3DA, 0x8E81, 0xC4BC,
02737     0x8E82, 0xC4BE, 0x8E84, 0xF4D9, 0x8E85, 0xC4BD, 0x8E86, 0xF4D7,
02738     0x8E87, 0xC3DC, 0x8E88, 0xF4D8, 0x8E89, 0xC4BB, 0x8E8A, 0xC543,
02739     0x8E8B, 0xC545, 0x8E8C, 0xF656, 0x8E8D, 0xC544, 0x8E8E, 0xF655,
02740     0x8E90, 0xF761, 0x8E91, 0xC5AD, 0x8E92, 0xF760, 0x8E93, 0xC5AE,
02741     0x8E94, 0xF75E, 0x8E95, 0xF75D, 0x8E96, 0xF762, 0x8E97, 0xF763,
02742     0x8E98, 0xF846, 0x8E9A, 0xF75F, 0x8E9D, 0xF8C6, 0x8E9E, 0xF8C3,
02743     0x8E9F, 0xF8C4, 0x8EA0, 0xF8C5, 0x8EA1, 0xC65C, 0x8EA3, 0xF951,
02744     0x8EA4, 0xF950, 0x8EA5, 0xF94F, 0x8EA6, 0xF970, 0x8EA8, 0xF9BE,
02745     0x8EA9, 0xF9AB, 0x8EAA, 0xC66E, 0x8EAB, 0xA8AD, 0x8EAC, 0xB060,
02746     0x8EB2, 0xB8FA, 0x8EBA, 0xBDF6, 0x8EBD, 0xEBC8, 0x8EC0, 0xC2DF,
02747     0x8EC2, 0xF355, 0x8EC9, 0xF9AC, 0x8ECA, 0xA8AE, 0x8ECB, 0xAAEE,
02748     0x8ECC, 0xAD79, 0x8ECD, 0xAD78, 0x8ECF, 0xB063, 0x8ED1, 0xD3E8,
02749     0x8ED2, 0xB061, 0x8ED3, 0xD3E9, 0x8ED4, 0xB062, 0x8ED7, 0xD7DF,
02750     0x8ED8, 0xD7DB, 0x8EDB, 0xB36D, 0x8EDC, 0xD7DE, 0x8EDD, 0xD7DD,
02751     0x8EDE, 0xD7DC, 0x8EDF, 0xB36E, 0x8EE0, 0xD7E0, 0x8EE1, 0xD7E1,
02752     0x8EE5, 0xDC43, 0x8EE6, 0xDC41, 0x8EE7, 0xDC45, 0x8EE8, 0xDC46,
02753     0x8EE9, 0xDC4C, 0x8EEB, 0xDC48, 0x8EEC, 0xDC4A, 0x8EEE, 0xDC42,
02754     0x8EEF, 0xDBFC, 0x8EF1, 0xDC49, 0x8EF4, 0xDC4B, 0x8EF5, 0xDC44,
02755     0x8EF6, 0xDC47, 0x8EF7, 0xDBFD, 0x8EF8, 0xB662, 0x8EF9, 0xDC40,
02756     0x8EFA, 0xDBFE, 0x8EFB, 0xB661, 0x8EFC, 0xB663, 0x8EFE, 0xB8FD,
02757     0x8EFF, 0xE075, 0x8F00, 0xE077, 0x8F01, 0xE076, 0x8F02, 0xE07B,
02758     0x8F03, 0xB8FB, 0x8F05, 0xE078, 0x8F06, 0xE074, 0x8F07, 0xE079,
02759     0x8F08, 0xE07A, 0x8F09, 0xB8FC, 0x8F0A, 0xB8FE, 0x8F0B, 0xE07C,
02760     0x8F0D, 0xE467, 0x8F0E, 0xE466, 0x8F10, 0xE464, 0x8F11, 0xE465,
02761     0x8F12, 0xBBB3, 0x8F13, 0xBBB5, 0x8F14, 0xBBB2, 0x8F15, 0xBBB4,
02762     0x8F16, 0xE84D, 0x8F17, 0xE84E, 0x8F18, 0xE849, 0x8F1A, 0xE84A,
02763     0x8F1B, 0xBDF8, 0x8F1C, 0xBDFD, 0x8F1D, 0xBDF7, 0x8F1E, 0xBDFE,
02764     0x8F1F, 0xBDF9, 0x8F20, 0xE84B, 0x8F23, 0xE84C, 0x8F24, 0xE848,
02765     0x8F25, 0xBE40, 0x8F26, 0xBDFB, 0x8F29, 0xBDFA, 0x8F2A, 0xBDFC,
02766     0x8F2C, 0xE847, 0x8F2E, 0xEBCA, 0x8F2F, 0xBFE8, 0x8F32, 0xEBCC,
02767     0x8F33, 0xBFEA, 0x8F34, 0xEBCF, 0x8F35, 0xEBCB, 0x8F36, 0xEBC9,
02768     0x8F37, 0xEBCE, 0x8F38, 0xBFE9, 0x8F39, 0xEBCD, 0x8F3B, 0xBFE7,
02769     0x8F3E, 0xC1D3, 0x8F3F, 0xC1D6, 0x8F40, 0xEEC1, 0x8F42, 0xC1D4,
02770     0x8F43, 0xEEC0, 0x8F44, 0xC1D2, 0x8F45, 0xC1D5, 0x8F46, 0xF146,
02771     0x8F47, 0xF147, 0x8F48, 0xF148, 0x8F49, 0xC2E0, 0x8F4B, 0xF149,
02772     0x8F4D, 0xC2E1, 0x8F4E, 0xC3E2, 0x8F4F, 0xF358, 0x8F50, 0xF359,
02773     0x8F51, 0xF357, 0x8F52, 0xF356, 0x8F53, 0xF35A, 0x8F54, 0xC3E1,
02774     0x8F55, 0xF4DD, 0x8F56, 0xF4DB, 0x8F57, 0xF4DC, 0x8F58, 0xF4DE,
02775     0x8F59, 0xF4DA, 0x8F5A, 0xF4DF, 0x8F5B, 0xF658, 0x8F5D, 0xF659,
02776     0x8F5E, 0xF657, 0x8F5F, 0xC546, 0x8F60, 0xF764, 0x8F61, 0xC5AF,
02777     0x8F62, 0xF765, 0x8F63, 0xF848, 0x8F64, 0xF847, 0x8F9B, 0xA8AF,
02778     0x8F9C, 0xB664, 0x8F9F, 0xB940, 0x8FA3, 0xBBB6, 0x8FA6, 0xBFEC,
02779     0x8FA8, 0xBFEB, 0x8FAD, 0xC3E3, 0x8FAE, 0xC47C, 0x8FAF, 0xC547,
02780     0x8FB0, 0xA8B0, 0x8FB1, 0xB064, 0x8FB2, 0xB941, 0x8FB4, 0xF35B,
02781     0x8FBF, 0xCBA6, 0x8FC2, 0xA8B1, 0x8FC4, 0xA8B4, 0x8FC5, 0xA8B3,
02782     0x8FC6, 0xA8B2, 0x8FC9, 0xCBA5, 0x8FCB, 0xCDCD, 0x8FCD, 0xCDCF,
02783     0x8FCE, 0xAAEF, 0x8FD1, 0xAAF1, 0x8FD2, 0xCDCC, 0x8FD3, 0xCDCE,
02784     0x8FD4, 0xAAF0, 0x8FD5, 0xCDD1, 0x8FD6, 0xCDD0, 0x8FD7, 0xCDD2,
02785     0x8FE0, 0xD0B6, 0x8FE1, 0xD0B4, 0x8FE2, 0xAD7C, 0x8FE3, 0xD0B3,
02786     0x8FE4, 0xADA3, 0x8FE5, 0xAD7E, 0x8FE6, 0xAD7B, 0x8FE8, 0xADA4,
02787     0x8FEA, 0xAD7D, 0x8FEB, 0xADA2, 0x8FED, 0xADA1, 0x8FEE, 0xD0B5,
02788     0x8FF0, 0xAD7A, 0x8FF4, 0xB06A, 0x8FF5, 0xD3EB, 0x8FF6, 0xD3F1,
02789     0x8FF7, 0xB067, 0x8FF8, 0xB06E, 0x8FFA, 0xB069, 0x8FFB, 0xD3EE,
02790     0x8FFC, 0xD3F0, 0x8FFD, 0xB06C, 0x8FFE, 0xD3EA, 0x8FFF, 0xD3ED,
02791     0x9000, 0xB068, 0x9001, 0xB065, 0x9002, 0xD3EC, 0x9003, 0xB06B,
02792     0x9004, 0xD3EF, 0x9005, 0xB06D, 0x9006, 0xB066, 0x900B, 0xD7E3,
02793     0x900C, 0xD7E6, 0x900D, 0xB370, 0x900F, 0xB37A, 0x9010, 0xB376,
02794     0x9011, 0xD7E4, 0x9014, 0xB37E, 0x9015, 0xB377, 0x9016, 0xB37C,
02795     0x9017, 0xB372, 0x9019, 0xB36F, 0x901A, 0xB371, 0x901B, 0xB37D,
02796     0x901C, 0xD7E5, 0x901D, 0xB375, 0x901E, 0xB378, 0x901F, 0xB374,
02797     0x9020, 0xB379, 0x9021, 0xD7E7, 0x9022, 0xB37B, 0x9023, 0xB373,
02798     0x9024, 0xD7E2, 0x902D, 0xDC4D, 0x902E, 0xB665, 0x902F, 0xDC4F,
02799     0x9031, 0xB667, 0x9032, 0xB669, 0x9034, 0xDC4E, 0x9035, 0xB666,
02800     0x9036, 0xB66A, 0x9038, 0xB668, 0x903C, 0xB947, 0x903D, 0xE0A3,
02801     0x903E, 0xB94F, 0x903F, 0xE07E, 0x9041, 0xB950, 0x9042, 0xB945,
02802     0x9044, 0xE0A1, 0x9047, 0xB94A, 0x9049, 0xE0A2, 0x904A, 0xB943,
02803     0x904B, 0xB942, 0x904D, 0xB94D, 0x904E, 0xB94C, 0x904F, 0xB94B,
02804     0x9050, 0xB949, 0x9051, 0xB94E, 0x9052, 0xE07D, 0x9053, 0xB944,
02805     0x9054, 0xB946, 0x9055, 0xB948, 0x9058, 0xBBB8, 0x9059, 0xBBBB,
02806     0x905B, 0xBBBF, 0x905C, 0xBBB9, 0x905D, 0xBBBE, 0x905E, 0xBBBC,
02807     0x9060, 0xBBB7, 0x9062, 0xBBBD, 0x9063, 0xBBBA, 0x9067, 0xE852,
02808     0x9068, 0xBE43, 0x9069, 0xBE41, 0x906B, 0xE853, 0x906D, 0xBE44,
02809     0x906E, 0xBE42, 0x906F, 0xE851, 0x9070, 0xE850, 0x9072, 0xBFF0,
02810     0x9073, 0xE84F, 0x9074, 0xBFEE, 0x9075, 0xBFED, 0x9076, 0xEBD0,
02811     0x9077, 0xBE45, 0x9078, 0xBFEF, 0x9079, 0xEBD1, 0x907A, 0xBFF2,
02812     0x907B, 0xEBD2, 0x907C, 0xBFF1, 0x907D, 0xC1D8, 0x907E, 0xEEC3,
02813     0x907F, 0xC1D7, 0x9080, 0xC1DC, 0x9081, 0xC1DA, 0x9082, 0xC1DB,
02814     0x9083, 0xC2E3, 0x9084, 0xC1D9, 0x9085, 0xEEC2, 0x9086, 0xEBD3,
02815     0x9087, 0xC2E2, 0x9088, 0xC2E4, 0x908A, 0xC3E4, 0x908B, 0xC3E5,
02816     0x908D, 0xF4E0, 0x908F, 0xC5DE, 0x9090, 0xC5DD, 0x9091, 0xA8B6,
02817     0x9094, 0xCA55, 0x9095, 0xB06F, 0x9097, 0xCA52, 0x9098, 0xCA53,
02818     0x9099, 0xCA51, 0x909B, 0xCA54, 0x909E, 0xCBAA, 0x909F, 0xCBA7,
02819     0x90A0, 0xCBAC, 0x90A1, 0xCBA8, 0x90A2, 0xA8B7, 0x90A3, 0xA8BA,
02820     0x90A5, 0xCBA9, 0x90A6, 0xA8B9, 0x90A7, 0xCBAB, 0x90AA, 0xA8B8,
02821     0x90AF, 0xCDD5, 0x90B0, 0xCDD7, 0x90B1, 0xAAF4, 0x90B2, 0xCDD3,
02822     0x90B3, 0xCDD6, 0x90B4, 0xCDD4, 0x90B5, 0xAAF2, 0x90B6, 0xAAF5,
02823     0x90B8, 0xAAF3, 0x90BD, 0xD0B8, 0x90BE, 0xD0BC, 0x90BF, 0xD0B9,
02824     0x90C1, 0xADA7, 0x90C3, 0xADA8, 0x90C5, 0xD0BB, 0x90C7, 0xD0BD,
02825     0x90C8, 0xD0BF, 0x90CA, 0xADA5, 0x90CB, 0xD0BE, 0x90CE, 0xADA6,
02826     0x90D4, 0xD7EE, 0x90D5, 0xD0BA, 0x90D6, 0xD3F2, 0x90D7, 0xD3FB,
02827     0x90D8, 0xD3F9, 0x90D9, 0xD3F4, 0x90DA, 0xD3F5, 0x90DB, 0xD3FA,
02828     0x90DC, 0xD3FC, 0x90DD, 0xB071, 0x90DF, 0xD3F7, 0x90E0, 0xD3F3,
02829     0x90E1, 0xB070, 0x90E2, 0xB072, 0x90E3, 0xD3F6, 0x90E4, 0xD3FD,
02830     0x90E5, 0xD3F8, 0x90E8, 0xB3A1, 0x90E9, 0xD7F1, 0x90EA, 0xD7E9,
02831     0x90EB, 0xD7EF, 0x90EC, 0xD7F0, 0x90ED, 0xB3A2, 0x90EF, 0xD7E8,
02832     0x90F0, 0xD7EA, 0x90F1, 0xD0B7, 0x90F2, 0xD7EC, 0x90F3, 0xD7ED,
02833     0x90F4, 0xD7EB, 0x90F5, 0xB66C, 0x90F9, 0xDC56, 0x90FA, 0xEBD4,
02834     0x90FB, 0xDC57, 0x90FC, 0xDC54, 0x90FD, 0xB3A3, 0x90FE, 0xB66E,
02835     0x90FF, 0xDC53, 0x9100, 0xDC59, 0x9101, 0xDC58, 0x9102, 0xB66B,
02836     0x9103, 0xDC5C, 0x9104, 0xDC52, 0x9105, 0xDC5B, 0x9106, 0xDC50,
02837     0x9107, 0xDC5A, 0x9108, 0xDC55, 0x9109, 0xB66D, 0x910B, 0xE0AA,
02838     0x910D, 0xE0A5, 0x910E, 0xE0AB, 0x910F, 0xE0A6, 0x9110, 0xE0A4,
02839     0x9111, 0xE0A7, 0x9112, 0xB951, 0x9114, 0xE0A9, 0x9116, 0xE0A8,
02840     0x9117, 0xB952, 0x9118, 0xBBC1, 0x9119, 0xBBC0, 0x911A, 0xE46E,
02841     0x911B, 0xE471, 0x911C, 0xE469, 0x911D, 0xE46D, 0x911E, 0xBBC2,
02842     0x911F, 0xE46C, 0x9120, 0xE46A, 0x9121, 0xE470, 0x9122, 0xE46B,
02843     0x9123, 0xE468, 0x9124, 0xE46F, 0x9126, 0xE859, 0x9127, 0xBE48,
02844     0x9128, 0xF14A, 0x9129, 0xE856, 0x912A, 0xE857, 0x912B, 0xE855,
02845     0x912C, 0xDC51, 0x912D, 0xBE47, 0x912E, 0xE85A, 0x912F, 0xE854,
02846     0x9130, 0xBE46, 0x9131, 0xBE49, 0x9132, 0xE858, 0x9133, 0xEBD5,
02847     0x9134, 0xBFF3, 0x9135, 0xEBD6, 0x9136, 0xEBD7, 0x9138, 0xEEC4,
02848     0x9139, 0xC1DD, 0x913A, 0xF14B, 0x913B, 0xF14C, 0x913E, 0xF14D,
02849     0x913F, 0xF35D, 0x9140, 0xF35C, 0x9141, 0xF4E2, 0x9143, 0xF4E1,
02850     0x9144, 0xF65B, 0x9145, 0xF65C, 0x9146, 0xF65A, 0x9147, 0xF766,
02851     0x9148, 0xC5B0, 0x9149, 0xA8BB, 0x914A, 0xADAA, 0x914B, 0xADA9,
02852     0x914C, 0xB075, 0x914D, 0xB074, 0x914E, 0xD440, 0x914F, 0xD441,
02853     0x9150, 0xD3FE, 0x9152, 0xB073, 0x9153, 0xD7F5, 0x9155, 0xD7F6,
02854     0x9156, 0xD7F2, 0x9157, 0xB3A4, 0x9158, 0xD7F3, 0x915A, 0xD7F4,
02855     0x915F, 0xDC5F, 0x9160, 0xDC61, 0x9161, 0xDC5D, 0x9162, 0xDC60,
02856     0x9163, 0xB66F, 0x9164, 0xDC5E, 0x9165, 0xB670, 0x9168, 0xDD73,
02857     0x9169, 0xB955, 0x916A, 0xB954, 0x916C, 0xB953, 0x916E, 0xE0AC,
02858     0x916F, 0xE0AD, 0x9172, 0xE473, 0x9173, 0xE475, 0x9174, 0xBBC6,
02859     0x9175, 0xBBC3, 0x9177, 0xBBC5, 0x9178, 0xBBC4, 0x9179, 0xE474,
02860     0x917A, 0xE472, 0x9180, 0xE861, 0x9181, 0xE85E, 0x9182, 0xE85F,
02861     0x9183, 0xBE4D, 0x9184, 0xE860, 0x9185, 0xE85B, 0x9186, 0xE85C,
02862     0x9187, 0xBE4A, 0x9189, 0xBE4B, 0x918A, 0xE85D, 0x918B, 0xBE4C,
02863     0x918D, 0xEBDB, 0x918F, 0xEBDC, 0x9190, 0xEBD9, 0x9191, 0xEBDA,
02864     0x9192, 0xBFF4, 0x9193, 0xEBD8, 0x9199, 0xEEC8, 0x919A, 0xEEC5,
02865     0x919B, 0xEEC7, 0x919C, 0xC1E0, 0x919D, 0xEECB, 0x919E, 0xC1DF,
02866     0x919F, 0xEEC9, 0x91A0, 0xEECC, 0x91A1, 0xEECA, 0x91A2, 0xEEC6,
02867     0x91A3, 0xC1DE, 0x91A5, 0xF14F, 0x91A7, 0xF150, 0x91A8, 0xF14E,
02868     0x91AA, 0xF152, 0x91AB, 0xC2E5, 0x91AC, 0xC2E6, 0x91AD, 0xF35F,
02869     0x91AE, 0xC3E7, 0x91AF, 0xF151, 0x91B0, 0xF35E, 0x91B1, 0xC3E6,
02870     0x91B2, 0xF4E5, 0x91B3, 0xF4E6, 0x91B4, 0xC4BF, 0x91B5, 0xF4E4,
02871     0x91B7, 0xF4E3, 0x91B9, 0xF65D, 0x91BA, 0xC548, 0x91BC, 0xF849,
02872     0x91BD, 0xF8C8, 0x91BE, 0xF8C7, 0x91C0, 0xC643, 0x91C1, 0xC65D,
02873     0x91C2, 0xF8C9, 0x91C3, 0xF971, 0x91C5, 0xC66F, 0x91C6, 0xA8BC,
02874     0x91C7, 0xAAF6, 0x91C9, 0xB956, 0x91CB, 0xC4C0, 0x91CC, 0xA8BD,
02875     0x91CD, 0xADAB, 0x91CE, 0xB3A5, 0x91CF, 0xB671, 0x91D0, 0xC2E7,
02876     0x91D1, 0xAAF7, 0x91D3, 0xD0C1, 0x91D4, 0xD0C0, 0x91D5, 0xD442,
02877     0x91D7, 0xB078, 0x91D8, 0xB076, 0x91D9, 0xB07A, 0x91DA, 0xD444,
02878     0x91DC, 0xB079, 0x91DD, 0xB077, 0x91E2, 0xD443, 0x91E3, 0xB3A8,
02879     0x91E4, 0xD7FC, 0x91E6, 0xB3A7, 0x91E7, 0xB3A9, 0x91E8, 0xD842,
02880     0x91E9, 0xB3AB, 0x91EA, 0xD7FE, 0x91EB, 0xD840, 0x91EC, 0xD7F7,
02881     0x91ED, 0xB3AA, 0x91EE, 0xD843, 0x91F1, 0xD7F9, 0x91F3, 0xD7FA,
02882     0x91F4, 0xD7F8, 0x91F5, 0xB3A6, 0x91F7, 0xD841, 0x91F8, 0xD7FB,
02883     0x91F9, 0xD7FD, 0x91FD, 0xDC6D, 0x91FF, 0xDC6C, 0x9200, 0xDC6A,
02884     0x9201, 0xDC62, 0x9202, 0xDC71, 0x9203, 0xDC65, 0x9204, 0xDC6F,
02885     0x9205, 0xDC76, 0x9206, 0xDC6E, 0x9207, 0xB679, 0x9209, 0xB675,
02886     0x920A, 0xDC63, 0x920C, 0xDC69, 0x920D, 0xB677, 0x920F, 0xDC68,
02887     0x9210, 0xB678, 0x9211, 0xB67A, 0x9212, 0xDC6B, 0x9214, 0xB672,
02888     0x9215, 0xB673, 0x9216, 0xDC77, 0x9217, 0xDC75, 0x9219, 0xDC74,
02889     0x921A, 0xDC66, 0x921C, 0xDC72, 0x921E, 0xB676, 0x9223, 0xB674,
02890     0x9224, 0xDC73, 0x9225, 0xDC64, 0x9226, 0xDC67, 0x9227, 0xDC70,
02891     0x922D, 0xE4BA, 0x922E, 0xE0B7, 0x9230, 0xE0B0, 0x9231, 0xE0C3,
02892     0x9232, 0xE0CC, 0x9233, 0xE0B3, 0x9234, 0xB961, 0x9236, 0xE0C0,
02893     0x9237, 0xB957, 0x9238, 0xB959, 0x9239, 0xB965, 0x923A, 0xE0B1,
02894     0x923D, 0xB95A, 0x923E, 0xB95C, 0x923F, 0xB966, 0x9240, 0xB95B,
02895     0x9245, 0xB964, 0x9246, 0xE0B9, 0x9248, 0xE0AE, 0x9249, 0xB962,
02896     0x924A, 0xE0B8, 0x924B, 0xB95E, 0x924C, 0xE0CA, 0x924D, 0xB963,
02897     0x924E, 0xE0C8, 0x924F, 0xE0BC, 0x9250, 0xE0C6, 0x9251, 0xB960,
02898     0x9252, 0xE0AF, 0x9253, 0xE0C9, 0x9254, 0xE0C4, 0x9256, 0xE0CB,
02899     0x9257, 0xB958, 0x925A, 0xB967, 0x925B, 0xB95D, 0x925E, 0xE0B5,
02900     0x9260, 0xE0BD, 0x9261, 0xE0C1, 0x9263, 0xE0C5, 0x9264, 0xB95F,
02901     0x9265, 0xE0B4, 0x9266, 0xE0B2, 0x9267, 0xE0BE, 0x926C, 0xE0BB,
02902     0x926D, 0xE0BA, 0x926F, 0xE0BF, 0x9270, 0xE0C2, 0x9272, 0xE0C7,
02903     0x9276, 0xE478, 0x9278, 0xBBC7, 0x9279, 0xE4A4, 0x927A, 0xE47A,
02904     0x927B, 0xBBCC, 0x927C, 0xBBD0, 0x927D, 0xE4AD, 0x927E, 0xE4B5,
02905     0x927F, 0xE4A6, 0x9280, 0xBBC8, 0x9282, 0xE4AA, 0x9283, 0xE0B6,
02906     0x9285, 0xBBC9, 0x9286, 0xE4B1, 0x9287, 0xE4B6, 0x9288, 0xE4AE,
02907     0x928A, 0xE4B0, 0x928B, 0xE4B9, 0x928C, 0xE4B2, 0x928D, 0xE47E,
02908     0x928E, 0xE4A9, 0x9291, 0xBBD1, 0x9293, 0xBBCD, 0x9294, 0xE47C,
02909     0x9295, 0xE4AB, 0x9296, 0xBBCB, 0x9297, 0xE4A5, 0x9298, 0xBBCA,
02910     0x9299, 0xE4B3, 0x929A, 0xE4A2, 0x929B, 0xE479, 0x929C, 0xBBCE,
02911     0x929D, 0xE4B8, 0x92A0, 0xE47B, 0x92A1, 0xE4AF, 0x92A2, 0xE4AC,
02912     0x92A3, 0xE4A7, 0x92A4, 0xE477, 0x92A5, 0xE476, 0x92A6, 0xE4A1,
02913     0x92A7, 0xE4B4, 0x92A8, 0xBBCF, 0x92A9, 0xE4B7, 0x92AA, 0xE47D,
02914     0x92AB, 0xE4A3, 0x92AC, 0xBE52, 0x92B2, 0xBE5A, 0x92B3, 0xBE55,
02915     0x92B4, 0xE8A4, 0x92B5, 0xE8A1, 0x92B6, 0xE867, 0x92B7, 0xBE50,
02916     0x92B9, 0xF9D7, 0x92BB, 0xBE4F, 0x92BC, 0xBE56, 0x92C0, 0xE865,
02917     0x92C1, 0xBE54, 0x92C2, 0xE871, 0x92C3, 0xE863, 0x92C4, 0xE864,
02918     0x92C5, 0xBE4E, 0x92C6, 0xE8A3, 0x92C7, 0xBE58, 0x92C8, 0xE874,
02919     0x92C9, 0xE879, 0x92CA, 0xE873, 0x92CB, 0xEBEE, 0x92CC, 0xE86F,
02920     0x92CD, 0xE877, 0x92CE, 0xE875, 0x92CF, 0xE868, 0x92D0, 0xE862,
02921     0x92D1, 0xE87D, 0x92D2, 0xBE57, 0x92D3, 0xE87E, 0x92D5, 0xE878,
02922     0x92D7, 0xE86D, 0x92D8, 0xE86B, 0x92D9, 0xE866, 0x92DD, 0xE86E,
02923     0x92DE, 0xE87B, 0x92DF, 0xE86A, 0x92E0, 0xE87A, 0x92E1, 0xE8A2,
02924     0x92E4, 0xBE53, 0x92E6, 0xE876, 0x92E7, 0xE87C, 0x92E8, 0xE872,
02925     0x92E9, 0xE86C, 0x92EA, 0xBE51, 0x92EE, 0xE4A8, 0x92EF, 0xE870,
02926     0x92F0, 0xBE59, 0x92F1, 0xE869, 0x92F7, 0xEBF4, 0x92F8, 0xBFF7,
02927     0x92F9, 0xEBF3, 0x92FA, 0xEBF0, 0x92FB, 0xEC44, 0x92FC, 0xBFFB,
02928     0x92FE, 0xEC41, 0x92FF, 0xEBF8, 0x9300, 0xEC43, 0x9301, 0xEBE9,
02929     0x9302, 0xEBF6, 0x9304, 0xBFFD, 0x9306, 0xEBE1, 0x9308, 0xEBDF,
02930     0x9309, 0xEC42, 0x930B, 0xEC40, 0x930C, 0xEBFE, 0x930D, 0xEBED,
02931     0x930E, 0xEBEC, 0x930F, 0xEBE2, 0x9310, 0xC040, 0x9312, 0xEBE8,
02932     0x9313, 0xEBF2, 0x9314, 0xEBFD, 0x9315, 0xC043, 0x9316, 0xEC45,
02933     0x9318, 0xC1E8, 0x9319, 0xC045, 0x931A, 0xBFFE, 0x931B, 0xEBE6,
02934     0x931D, 0xEBEF, 0x931E, 0xEBDE, 0x931F, 0xEBE0, 0x9320, 0xBFF5,
02935     0x9321, 0xC042, 0x9322, 0xBFFA, 0x9323, 0xEBE7, 0x9324, 0xEBF7,
02936     0x9325, 0xEBF1, 0x9326, 0xC041, 0x9327, 0xEBDD, 0x9328, 0xC1E3,
02937     0x9329, 0xEBF9, 0x932A, 0xEBFC, 0x932B, 0xBFFC, 0x932D, 0xEBEB,
02938     0x932E, 0xC044, 0x932F, 0xBFF9, 0x9333, 0xBFF8, 0x9334, 0xEBF5,
02939     0x9335, 0xEBFB, 0x9336, 0xBFF6, 0x9338, 0xEBE4, 0x9339, 0xEBFA,
02940     0x933C, 0xEBE5, 0x9346, 0xEBEA, 0x9347, 0xEED2, 0x9349, 0xEED7,
02941     0x934A, 0xC1E5, 0x934B, 0xC1E7, 0x934C, 0xEEDD, 0x934D, 0xC1E1,
02942     0x934E, 0xEEEC, 0x934F, 0xEEE3, 0x9350, 0xEED8, 0x9351, 0xEED9,
02943     0x9352, 0xEEE2, 0x9354, 0xC1EE, 0x9355, 0xEEE1, 0x9356, 0xEED1,
02944     0x9357, 0xEEE0, 0x9358, 0xEED4, 0x9359, 0xEEED, 0x935A, 0xC1ED,
02945     0x935B, 0xC1EB, 0x935C, 0xEED5, 0x935E, 0xEEE8, 0x9360, 0xEEDA,
02946     0x9361, 0xEEE7, 0x9363, 0xEEE9, 0x9364, 0xEED0, 0x9365, 0xC1E6,
02947     0x9367, 0xEEEA, 0x936A, 0xEEDE, 0x936C, 0xC1EA, 0x936D, 0xEEDB,
02948     0x9370, 0xC1EC, 0x9371, 0xEEE4, 0x9375, 0xC1E4, 0x9376, 0xEED6,
02949     0x9377, 0xEEE5, 0x9379, 0xEEDF, 0x937A, 0xEBE3, 0x937B, 0xEEE6,
02950     0x937C, 0xEED3, 0x937E, 0xC1E9, 0x9380, 0xEEEB, 0x9382, 0xC1E2,
02951     0x9383, 0xEECE, 0x9388, 0xF160, 0x9389, 0xF159, 0x938A, 0xC2E9,
02952     0x938C, 0xF154, 0x938D, 0xF163, 0x938E, 0xF15B, 0x938F, 0xEEDC,
02953     0x9391, 0xF165, 0x9392, 0xF155, 0x9394, 0xC2E8, 0x9395, 0xF15F,
02954     0x9396, 0xC2EA, 0x9397, 0xC2F2, 0x9398, 0xC2F0, 0x9399, 0xF161,
02955     0x939A, 0xC2F1, 0x939B, 0xF157, 0x939D, 0xF158, 0x939E, 0xF15D,
02956     0x939F, 0xF162, 0x93A1, 0xEECD, 0x93A2, 0xC2EB, 0x93A3, 0xF16A,
02957     0x93A4, 0xF167, 0x93A5, 0xF16B, 0x93A6, 0xF15E, 0x93A7, 0xF15A,
02958     0x93A8, 0xF168, 0x93A9, 0xF36A, 0x93AA, 0xF15C, 0x93AC, 0xC2EE,
02959     0x93AE, 0xC2ED, 0x93AF, 0xEECF, 0x93B0, 0xC2EF, 0x93B1, 0xF164,
02960     0x93B2, 0xF166, 0x93B3, 0xC2EC, 0x93B4, 0xF169, 0x93B5, 0xF153,
02961     0x93B7, 0xF156, 0x93C0, 0xF373, 0x93C2, 0xF363, 0x93C3, 0xC3EB,
02962     0x93C4, 0xF371, 0x93C7, 0xF361, 0x93C8, 0xC3EC, 0x93CA, 0xF36C,
02963     0x93CC, 0xF368, 0x93CD, 0xC3F1, 0x93CE, 0xF372, 0x93CF, 0xF362,
02964     0x93D0, 0xF365, 0x93D1, 0xC3E9, 0x93D2, 0xF374, 0x93D4, 0xF36D,
02965     0x93D5, 0xF370, 0x93D6, 0xC3EF, 0x93D7, 0xC3F4, 0x93D8, 0xC3F2,
02966     0x93D9, 0xF369, 0x93DA, 0xF364, 0x93DC, 0xC3ED, 0x93DD, 0xC3EE,
02967     0x93DE, 0xF360, 0x93DF, 0xC3EA, 0x93E1, 0xC3E8, 0x93E2, 0xC3F0,
02968     0x93E3, 0xF36F, 0x93E4, 0xC3F3, 0x93E6, 0xF36B, 0x93E7, 0xF375,
02969     0x93E8, 0xC3F5, 0x93EC, 0xF367, 0x93EE, 0xF36E, 0x93F5, 0xF4F3,
02970     0x93F6, 0xF542, 0x93F7, 0xF4F5, 0x93F8, 0xF4FC, 0x93F9, 0xF366,
02971     0x93FA, 0xF4FA, 0x93FB, 0xF4E9, 0x93FC, 0xF540, 0x93FD, 0xC4C3,
02972     0x93FE, 0xF4ED, 0x93FF, 0xF4FE, 0x9400, 0xF4F4, 0x9403, 0xC4C2,
02973     0x9406, 0xF544, 0x9407, 0xF4F6, 0x9409, 0xF4FB, 0x940A, 0xF4FD,
02974     0x940B, 0xF4E7, 0x940C, 0xF541, 0x940D, 0xF4F2, 0x940E, 0xF4F7,
02975     0x940F, 0xF4EB, 0x9410, 0xF4EF, 0x9411, 0xF543, 0x9412, 0xF4F9,
02976     0x9413, 0xF4E8, 0x9414, 0xF4EC, 0x9415, 0xF4EE, 0x9416, 0xF4F8,
02977     0x9418, 0xC4C1, 0x9419, 0xF4F1, 0x9420, 0xF4EA, 0x9428, 0xF4F0,
02978     0x9429, 0xF661, 0x942A, 0xF666, 0x942B, 0xC54F, 0x942C, 0xF668,
02979     0x942E, 0xC549, 0x9430, 0xF664, 0x9431, 0xF66A, 0x9432, 0xC54E,
02980     0x9433, 0xC54A, 0x9435, 0xC54B, 0x9436, 0xF660, 0x9437, 0xF667,
02981     0x9438, 0xC54D, 0x9439, 0xF665, 0x943A, 0xC54C, 0x943B, 0xF65F,
02982     0x943C, 0xF663, 0x943D, 0xF662, 0x943F, 0xF65E, 0x9440, 0xF669,
02983     0x9444, 0xC5B1, 0x9445, 0xF76D, 0x9446, 0xF770, 0x9447, 0xF76C,
02984     0x9448, 0xF76E, 0x9449, 0xF76F, 0x944A, 0xF769, 0x944B, 0xF76A,
02985     0x944C, 0xF767, 0x944F, 0xF76B, 0x9450, 0xF768, 0x9451, 0xC5B2,
02986     0x9452, 0xC5B3, 0x9455, 0xF84B, 0x9457, 0xF84D, 0x945D, 0xF84C,
02987     0x945E, 0xF84E, 0x9460, 0xC5E0, 0x9462, 0xF84A, 0x9463, 0xC5DF,
02988     0x9464, 0xC5E1, 0x9468, 0xF8CB, 0x9469, 0xF8CC, 0x946A, 0xC644,
02989     0x946B, 0xF8CA, 0x946D, 0xF953, 0x946E, 0xF952, 0x946F, 0xF954,
02990     0x9470, 0xC65F, 0x9471, 0xF955, 0x9472, 0xC65E, 0x9473, 0xF956,
02991     0x9474, 0xF972, 0x9475, 0xF975, 0x9476, 0xF974, 0x9477, 0xC668,
02992     0x9478, 0xF973, 0x947C, 0xC672, 0x947D, 0xC670, 0x947E, 0xC671,
02993     0x947F, 0xC677, 0x9480, 0xF9C0, 0x9481, 0xF9C1, 0x9482, 0xF9BF,
02994     0x9483, 0xF9C9, 0x9577, 0xAAF8, 0x957A, 0xD844, 0x957B, 0xDC78,
02995     0x957C, 0xE8A5, 0x957D, 0xF376, 0x9580, 0xAAF9, 0x9582, 0xADAC,
02996     0x9583, 0xB07B, 0x9586, 0xD845, 0x9588, 0xD846, 0x9589, 0xB3AC,
02997     0x958B, 0xB67D, 0x958C, 0xDC7A, 0x958D, 0xDC79, 0x958E, 0xB6A3,
02998     0x958F, 0xB67C, 0x9590, 0xDC7B, 0x9591, 0xB67E, 0x9592, 0xB6A2,
02999     0x9593, 0xB6A1, 0x9594, 0xB67B, 0x9598, 0xB968, 0x959B, 0xE0D0,
03000     0x959C, 0xE0CE, 0x959E, 0xE0CF, 0x959F, 0xE0CD, 0x95A1, 0xBBD2,
03001     0x95A3, 0xBBD5, 0x95A4, 0xBBD7, 0x95A5, 0xBBD6, 0x95A8, 0xBBD3,
03002     0x95A9, 0xBBD4, 0x95AB, 0xE8A7, 0x95AC, 0xE8A6, 0x95AD, 0xBE5B,
03003     0x95AE, 0xE8A8, 0x95B0, 0xE8A9, 0x95B1, 0xBE5C, 0x95B5, 0xEC4D,
03004     0x95B6, 0xEC4B, 0x95B7, 0xEEF3, 0x95B9, 0xEC49, 0x95BA, 0xEC4A,
03005     0x95BB, 0xC046, 0x95BC, 0xEC46, 0x95BD, 0xEC4E, 0x95BE, 0xEC48,
03006     0x95BF, 0xEC4C, 0x95C0, 0xEEEF, 0x95C3, 0xEEF1, 0x95C5, 0xEEF2,
03007     0x95C6, 0xC1F3, 0x95C7, 0xEEEE, 0x95C8, 0xC1F2, 0x95C9, 0xEEF0,
03008     0x95CA, 0xC1EF, 0x95CB, 0xC1F0, 0x95CC, 0xC1F1, 0x95CD, 0xEC47,
03009     0x95D0, 0xC2F5, 0x95D1, 0xF16E, 0x95D2, 0xF16C, 0x95D3, 0xF16D,
03010     0x95D4, 0xC2F3, 0x95D5, 0xC2F6, 0x95D6, 0xC2F4, 0x95DA, 0xF377,
03011     0x95DB, 0xF378, 0x95DC, 0xC3F6, 0x95DE, 0xF545, 0x95DF, 0xF547,
03012     0x95E0, 0xF546, 0x95E1, 0xC4C4, 0x95E2, 0xC550, 0x95E3, 0xF66D,
03013     0x95E4, 0xF66C, 0x95E5, 0xF66B, 0x961C, 0xAAFA, 0x961E, 0xC9AA,
03014     0x9620, 0xCA58, 0x9621, 0xA6E9, 0x9622, 0xCA56, 0x9623, 0xCA59,
03015     0x9624, 0xCA57, 0x9628, 0xCBAE, 0x962A, 0xA8C1, 0x962C, 0xA8C2,
03016     0x962D, 0xCBB0, 0x962E, 0xA8BF, 0x962F, 0xCBAF, 0x9630, 0xCBAD,
03017     0x9631, 0xA8C0, 0x9632, 0xA8BE, 0x9639, 0xCDD8, 0x963A, 0xCDDB,
03018     0x963B, 0xAAFD, 0x963C, 0xCDDA, 0x963D, 0xCDD9, 0x963F, 0xAAFC,
03019     0x9640, 0xAAFB, 0x9642, 0xAB40, 0x9643, 0xCDDC, 0x9644, 0xAAFE,
03020     0x964A, 0xD0C6, 0x964B, 0xADAE, 0x964C, 0xADAF, 0x964D, 0xADB0,
03021     0x964E, 0xD0C7, 0x964F, 0xD0C3, 0x9650, 0xADAD, 0x9651, 0xD0C4,
03022     0x9653, 0xD0C5, 0x9654, 0xD0C2, 0x9658, 0xB0A4, 0x965B, 0xB0A1,
03023     0x965C, 0xD445, 0x965D, 0xB0A2, 0x965E, 0xB0A5, 0x965F, 0xD446,
03024     0x9661, 0xB07E, 0x9662, 0xB07C, 0x9663, 0xB07D, 0x9664, 0xB0A3,
03025     0x966A, 0xB3AD, 0x966B, 0xD849, 0x966C, 0xB3B5, 0x966D, 0xD848,
03026     0x966F, 0xD84B, 0x9670, 0xB3B1, 0x9671, 0xD84A, 0x9672, 0xB6AB,
03027     0x9673, 0xB3AF, 0x9674, 0xB3B2, 0x9675, 0xB3AE, 0x9676, 0xB3B3,
03028     0x9677, 0xB3B4, 0x9678, 0xB3B0, 0x967C, 0xD847, 0x967D, 0xB6A7,
03029     0x967E, 0xDC7D, 0x9680, 0xDCA3, 0x9683, 0xDCA2, 0x9684, 0xB6AC,
03030     0x9685, 0xB6A8, 0x9686, 0xB6A9, 0x9687, 0xDC7C, 0x9688, 0xDC7E,
03031     0x9689, 0xDCA1, 0x968A, 0xB6A4, 0x968B, 0xB6A6, 0x968D, 0xB6AA,
03032     0x968E, 0xB6A5, 0x9691, 0xE0D3, 0x9692, 0xE0D1, 0x9693, 0xE0D2,
03033     0x9694, 0xB96A, 0x9695, 0xB96B, 0x9697, 0xE0D4, 0x9698, 0xB969,
03034     0x9699, 0xBBD8, 0x969B, 0xBBDA, 0x969C, 0xBBD9, 0x969E, 0xE4BB,
03035     0x96A1, 0xE4BC, 0x96A2, 0xE8AB, 0x96A4, 0xE8AA, 0x96A7, 0xC047,
03036     0x96A8, 0xC048, 0x96A9, 0xEC4F, 0x96AA, 0xC049, 0x96AC, 0xEEF6,
03037     0x96AE, 0xEEF4, 0x96B0, 0xEEF5, 0x96B1, 0xC1F4, 0x96B3, 0xF16F,
03038     0x96B4, 0xC3F7, 0x96B8, 0xC1F5, 0x96B9, 0xAB41, 0x96BB, 0xB0A6,
03039     0x96BC, 0xD447, 0x96BF, 0xD84C, 0x96C0, 0xB3B6, 0x96C1, 0xB6AD,
03040     0x96C2, 0xDCA4, 0x96C3, 0xDCA6, 0x96C4, 0xB6AF, 0x96C5, 0xB6AE,
03041     0x96C6, 0xB6B0, 0x96C7, 0xB6B1, 0x96C8, 0xDCA5, 0x96C9, 0xB96E,
03042     0x96CA, 0xB96F, 0x96CB, 0xB96D, 0x96CC, 0xBBDB, 0x96CD, 0xB96C,
03043     0x96CE, 0xE0D5, 0x96D2, 0xBBDC, 0x96D3, 0xE8AC, 0x96D4, 0xEC50,
03044     0x96D5, 0xC04A, 0x96D6, 0xC1F6, 0x96D7, 0xF170, 0x96D8, 0xF174,
03045     0x96D9, 0xC2F9, 0x96DA, 0xF171, 0x96DB, 0xC2FA, 0x96DC, 0xC2F8,
03046     0x96DD, 0xF175, 0x96DE, 0xC2FB, 0x96DF, 0xF173, 0x96E1, 0xF379,
03047     0x96E2, 0xC2F7, 0x96E3, 0xC3F8, 0x96E5, 0xF8CD, 0x96E8, 0xAB42,
03048     0x96E9, 0xB3B8, 0x96EA, 0xB3B7, 0x96EF, 0xB6B2, 0x96F0, 0xDCA8,
03049     0x96F1, 0xDCA7, 0x96F2, 0xB6B3, 0x96F5, 0xE0D9, 0x96F6, 0xB973,
03050     0x96F7, 0xB970, 0x96F8, 0xE0D8, 0x96F9, 0xB972, 0x96FA, 0xE0D6,
03051     0x96FB, 0xB971, 0x96FD, 0xE0D7, 0x96FF, 0xE4BD, 0x9700, 0xBBDD,
03052     0x9702, 0xE8AF, 0x9704, 0xBE5D, 0x9705, 0xE8AD, 0x9706, 0xBE5E,
03053     0x9707, 0xBE5F, 0x9708, 0xE8AE, 0x9709, 0xBE60, 0x970B, 0xEC51,
03054     0x970D, 0xC04E, 0x970E, 0xC04B, 0x970F, 0xC050, 0x9710, 0xEC53,
03055     0x9711, 0xC04C, 0x9712, 0xEC52, 0x9713, 0xC04F, 0x9716, 0xC04D,
03056     0x9718, 0xEEF9, 0x9719, 0xEEFB, 0x971C, 0xC1F7, 0x971D, 0xEEFA,
03057     0x971E, 0xC1F8, 0x971F, 0xEEF8, 0x9720, 0xEEF7, 0x9722, 0xF177,
03058     0x9723, 0xF176, 0x9724, 0xC2FC, 0x9725, 0xF178, 0x9726, 0xF37E,
03059     0x9727, 0xC3FA, 0x9728, 0xF37D, 0x9729, 0xF37A, 0x972A, 0xC3F9,
03060     0x972B, 0xF37B, 0x972C, 0xF37C, 0x972E, 0xF548, 0x972F, 0xF549,
03061     0x9730, 0xC4C5, 0x9732, 0xC553, 0x9735, 0xF66E, 0x9738, 0xC551,
03062     0x9739, 0xC552, 0x973A, 0xF66F, 0x973D, 0xC5B4, 0x973E, 0xC5B5,
03063     0x973F, 0xF771, 0x9742, 0xC645, 0x9743, 0xF8CF, 0x9744, 0xC647,
03064     0x9746, 0xF8CE, 0x9747, 0xF8D0, 0x9748, 0xC646, 0x9749, 0xF957,
03065     0x974B, 0xF9AD, 0x9752, 0xAB43, 0x9756, 0xB974, 0x9758, 0xE4BE,
03066     0x975A, 0xE8B0, 0x975B, 0xC051, 0x975C, 0xC052, 0x975E, 0xAB44,
03067     0x9760, 0xBE61, 0x9761, 0xC3FB, 0x9762, 0xADB1, 0x9766, 0xC053,
03068     0x9768, 0xC5E2, 0x9769, 0xADB2, 0x976A, 0xD84D, 0x976C, 0xDCA9,
03069     0x976E, 0xDCAB, 0x9770, 0xDCAA, 0x9772, 0xE0DD, 0x9773, 0xE0DA,
03070     0x9774, 0xB975, 0x9776, 0xB976, 0x9777, 0xE0DB, 0x9778, 0xE0DC,
03071     0x977A, 0xE4C0, 0x977B, 0xE4C5, 0x977C, 0xBBDE, 0x977D, 0xE4BF,
03072     0x977E, 0xE4C1, 0x977F, 0xE4C8, 0x9780, 0xE4C3, 0x9781, 0xE4C7,
03073     0x9782, 0xE4C4, 0x9783, 0xE4C2, 0x9784, 0xE4C6, 0x9785, 0xBBDF,
03074     0x9788, 0xE8B3, 0x978A, 0xE8B1, 0x978B, 0xBE63, 0x978D, 0xBE62,
03075     0x978E, 0xE8B2, 0x978F, 0xBE64, 0x9794, 0xEC56, 0x9797, 0xEC55,
03076     0x9798, 0xC054, 0x9799, 0xEC54, 0x979A, 0xEEFC, 0x979C, 0xEEFE,
03077     0x979D, 0xEF41, 0x979E, 0xEF40, 0x97A0, 0xC1F9, 0x97A1, 0xEEFD,
03078     0x97A2, 0xF1A1, 0x97A3, 0xC2FD, 0x97A4, 0xF17D, 0x97A5, 0xF1A2,
03079     0x97A6, 0xC2FE, 0x97A8, 0xF17B, 0x97AA, 0xF17E, 0x97AB, 0xF17C,
03080     0x97AC, 0xF179, 0x97AD, 0xC340, 0x97AE, 0xF17A, 0x97B3, 0xF3A1,
03081     0x97B6, 0xF3A3, 0x97B7, 0xF3A2, 0x97B9, 0xF54A, 0x97BB, 0xF54B,
03082     0x97BF, 0xF670, 0x97C1, 0xC5B7, 0x97C3, 0xC5B6, 0x97C4, 0xF84F,
03083     0x97C5, 0xF850, 0x97C6, 0xC648, 0x97C7, 0xF8D1, 0x97C9, 0xC669,
03084     0x97CB, 0xADB3, 0x97CC, 0xB6B4, 0x97CD, 0xE4CA, 0x97CE, 0xE4C9,
03085     0x97CF, 0xE8B5, 0x97D0, 0xE8B4, 0x97D3, 0xC1FA, 0x97D4, 0xEF43,
03086     0x97D5, 0xEF42, 0x97D6, 0xF1A5, 0x97D7, 0xF1A3, 0x97D8, 0xF1A6,
03087     0x97D9, 0xF1A4, 0x97DC, 0xC3FC, 0x97DD, 0xF3A4, 0x97DE, 0xF3A5,
03088     0x97DF, 0xF3A6, 0x97E1, 0xF671, 0x97E3, 0xF772, 0x97E5, 0xF8D2,
03089     0x97ED, 0xADB4, 0x97F0, 0xEC57, 0x97F1, 0xEF44, 0x97F3, 0xADB5,
03090     0x97F6, 0xBBE0, 0x97F8, 0xEC58, 0x97F9, 0xC341, 0x97FA, 0xF1A7,
03091     0x97FB, 0xC3FD, 0x97FD, 0xF54C, 0x97FE, 0xF54D, 0x97FF, 0xC554,
03092     0x9800, 0xF851, 0x9801, 0xADB6, 0x9802, 0xB3BB, 0x9803, 0xB3BC,
03093     0x9804, 0xD84E, 0x9805, 0xB6B5, 0x9806, 0xB6B6, 0x9807, 0xDCAC,
03094     0x9808, 0xB6B7, 0x980A, 0xB97A, 0x980C, 0xB97C, 0x980D, 0xE0DF,
03095     0x980E, 0xE0E0, 0x980F, 0xE0DE, 0x9810, 0xB977, 0x9811, 0xB978,
03096     0x9812, 0xB97B, 0x9813, 0xB979, 0x9816, 0xE4CB, 0x9817, 0xBBE1,
03097     0x9818, 0xBBE2, 0x981B, 0xE8BC, 0x981C, 0xBE67, 0x981D, 0xE8B7,
03098     0x981E, 0xE8B6, 0x9820, 0xE8BB, 0x9821, 0xBE65, 0x9824, 0xC05B,
03099     0x9826, 0xE8B8, 0x9827, 0xE8BD, 0x9828, 0xE8BA, 0x9829, 0xE8B9,
03100     0x982B, 0xBE66, 0x982D, 0xC059, 0x982F, 0xEC5A, 0x9830, 0xC055,
03101     0x9832, 0xEC5B, 0x9835, 0xEC59, 0x9837, 0xC058, 0x9838, 0xC056,
03102     0x9839, 0xC05A, 0x983B, 0xC057, 0x9841, 0xEF45, 0x9843, 0xEF4A,
03103     0x9844, 0xEF46, 0x9845, 0xEF49, 0x9846, 0xC1FB, 0x9848, 0xEDD4,
03104     0x9849, 0xEF48, 0x984A, 0xEF47, 0x984C, 0xC344, 0x984D, 0xC342,
03105     0x984E, 0xC345, 0x984F, 0xC343, 0x9850, 0xF1A8, 0x9851, 0xF1A9,
03106     0x9852, 0xF1AA, 0x9853, 0xC346, 0x9857, 0xF3AA, 0x9858, 0xC440,
03107     0x9859, 0xF3A8, 0x985B, 0xC441, 0x985C, 0xF3A7, 0x985D, 0xF3A9,
03108     0x985E, 0xC3FE, 0x985F, 0xF551, 0x9860, 0xF54E, 0x9862, 0xF54F,
03109     0x9863, 0xF550, 0x9864, 0xF672, 0x9865, 0xC556, 0x9867, 0xC555,
03110     0x9869, 0xF774, 0x986A, 0xF773, 0x986B, 0xC5B8, 0x986F, 0xC5E3,
03111     0x9870, 0xC649, 0x9871, 0xC660, 0x9872, 0xF958, 0x9873, 0xF9AE,
03112     0x9874, 0xF9AF, 0x98A8, 0xADB7, 0x98A9, 0xDCAD, 0x98AC, 0xE0E1,
03113     0x98AD, 0xE4CC, 0x98AE, 0xE4CD, 0x98AF, 0xBBE3, 0x98B1, 0xBBE4,
03114     0x98B2, 0xE8BE, 0x98B3, 0xBE68, 0x98B6, 0xC1FC, 0x98B8, 0xF1AB,
03115     0x98BA, 0xC347, 0x98BB, 0xF3AD, 0x98BC, 0xC442, 0x98BD, 0xF3AC,
03116     0x98BE, 0xF3AE, 0x98BF, 0xF3AB, 0x98C0, 0xF675, 0x98C1, 0xF552,
03117     0x98C2, 0xF553, 0x98C4, 0xC4C6, 0x98C6, 0xF674, 0x98C9, 0xF673,
03118     0x98CB, 0xF775, 0x98CC, 0xF9B0, 0x98DB, 0xADB8, 0x98DF, 0xADB9,
03119     0x98E2, 0xB0A7, 0x98E3, 0xD448, 0x98E5, 0xD84F, 0x98E7, 0xB6B8,
03120     0x98E9, 0xB6BB, 0x98EA, 0xB6B9, 0x98EB, 0xDCAE, 0x98ED, 0xB6BD,
03121     0x98EF, 0xB6BA, 0x98F2, 0xB6BC, 0x98F4, 0xB97E, 0x98F6, 0xE0E2,
03122     0x98F9, 0xE0E3, 0x98FA, 0xE8C0, 0x98FC, 0xB97D, 0x98FD, 0xB9A1,
03123     0x98FE, 0xB9A2, 0x9900, 0xE4CF, 0x9902, 0xE4CE, 0x9903, 0xBBE5,
03124     0x9905, 0xBBE6, 0x9907, 0xE4D0, 0x9908, 0xE8BF, 0x9909, 0xBBE8,
03125     0x990A, 0xBE69, 0x990C, 0xBBE7, 0x9910, 0xC05C, 0x9911, 0xE8C1,
03126     0x9912, 0xBE6B, 0x9913, 0xBE6A, 0x9914, 0xE8C2, 0x9915, 0xE8C5,
03127     0x9916, 0xE8C3, 0x9917, 0xE8C4, 0x9918, 0xBE6C, 0x991A, 0xC061,
03128     0x991B, 0xC05F, 0x991E, 0xC05E, 0x991F, 0xEC5D, 0x9921, 0xC060,
03129     0x9924, 0xEC5C, 0x9925, 0xEF4B, 0x9927, 0xEC5E, 0x9928, 0xC05D,
03130     0x9929, 0xEC5F, 0x992A, 0xEF4E, 0x992B, 0xEF4C, 0x992C, 0xEF4D,
03131     0x992D, 0xEF52, 0x992E, 0xC34B, 0x992F, 0xEF51, 0x9930, 0xEF54,
03132     0x9931, 0xEF53, 0x9932, 0xEF50, 0x9933, 0xEF4F, 0x9935, 0xC1FD,
03133     0x993A, 0xF1AE, 0x993C, 0xF1AD, 0x993D, 0xC34A, 0x993E, 0xC348,
03134     0x993F, 0xC349, 0x9941, 0xF1AC, 0x9943, 0xF3B1, 0x9945, 0xC443,
03135     0x9947, 0xF3B0, 0x9948, 0xF3AF, 0x9949, 0xC444, 0x994B, 0xF558,
03136     0x994C, 0xF557, 0x994E, 0xF555, 0x9950, 0xF554, 0x9951, 0xC4C8,
03137     0x9952, 0xC4C7, 0x9953, 0xF559, 0x9954, 0xF776, 0x9955, 0xC5B9,
03138     0x9956, 0xF677, 0x9957, 0xC557, 0x9958, 0xF676, 0x9959, 0xF556,
03139     0x995B, 0xF777, 0x995C, 0xC5E4, 0x995E, 0xC661, 0x995F, 0xF959,
03140     0x9961, 0xF9B1, 0x9996, 0xADBA, 0x9997, 0xD850, 0x9998, 0xEF55,
03141     0x9999, 0xADBB, 0x999C, 0xE4D2, 0x999D, 0xE4D1, 0x999E, 0xEC60,
03142     0x99A1, 0xEF57, 0x99A3, 0xEF56, 0x99A5, 0xC34C, 0x99A6, 0xF3B2,
03143     0x99A7, 0xF3B3, 0x99A8, 0xC4C9, 0x99AB, 0xF9B2, 0x99AC, 0xB0A8,
03144     0x99AD, 0xB6BF, 0x99AE, 0xB6BE, 0x99AF, 0xE0E4, 0x99B0, 0xE0E6,
03145     0x99B1, 0xB9A4, 0x99B2, 0xE0E5, 0x99B3, 0xB9A3, 0x99B4, 0xB9A5,
03146     0x99B5, 0xE0E7, 0x99B9, 0xE4D4, 0x99BA, 0xE4D6, 0x99BB, 0xE4D5,
03147     0x99BD, 0xE4D8, 0x99C1, 0xBBE9, 0x99C2, 0xE4D7, 0x99C3, 0xE4D3,
03148     0x99C7, 0xE4D9, 0x99C9, 0xE8CC, 0x99CB, 0xE8CF, 0x99CC, 0xE8D1,
03149     0x99CD, 0xE8C7, 0x99CE, 0xE8CB, 0x99CF, 0xE8C8, 0x99D0, 0xBE6E,
03150     0x99D1, 0xBE71, 0x99D2, 0xBE73, 0x99D3, 0xE8C9, 0x99D4, 0xE8CA,
03151     0x99D5, 0xBE72, 0x99D6, 0xE8CD, 0x99D7, 0xE8D0, 0x99D8, 0xE8CE,
03152     0x99D9, 0xBE74, 0x99DB, 0xBE70, 0x99DC, 0xE8C6, 0x99DD, 0xBE6D,
03153     0x99DF, 0xBE6F, 0x99E2, 0xC063, 0x99E3, 0xEC66, 0x99E4, 0xEC64,
03154     0x99E5, 0xEC63, 0x99E7, 0xEC69, 0x99E9, 0xEC68, 0x99EA, 0xEC67,
03155     0x99EC, 0xEC62, 0x99ED, 0xC062, 0x99EE, 0xEC61, 0x99F0, 0xEC65,
03156     0x99F1, 0xC064, 0x99F4, 0xEF5A, 0x99F6, 0xEF5E, 0x99F7, 0xEF5B,
03157     0x99F8, 0xEF5D, 0x99F9, 0xEF5C, 0x99FA, 0xEF59, 0x99FB, 0xEF5F,
03158     0x99FC, 0xEF62, 0x99FD, 0xEF60, 0x99FE, 0xEF61, 0x99FF, 0xC240,
03159     0x9A01, 0xC1FE, 0x9A02, 0xEF58, 0x9A03, 0xEF63, 0x9A04, 0xF1B3,
03160     0x9A05, 0xF1B6, 0x9A06, 0xF1B8, 0x9A07, 0xF1B7, 0x9A09, 0xF1B1,
03161     0x9A0A, 0xF1B5, 0x9A0B, 0xF1B0, 0x9A0D, 0xF1B2, 0x9A0E, 0xC34D,
03162     0x9A0F, 0xF1AF, 0x9A11, 0xF1B4, 0x9A14, 0xF3C0, 0x9A15, 0xF3B5,
03163     0x9A16, 0xC445, 0x9A19, 0xC446, 0x9A1A, 0xF3B4, 0x9A1B, 0xF3B9,
03164     0x9A1C, 0xF3BF, 0x9A1D, 0xF3B7, 0x9A1E, 0xF3BE, 0x9A20, 0xF3BB,
03165     0x9A22, 0xF3BA, 0x9A23, 0xF3BD, 0x9A24, 0xF3B8, 0x9A25, 0xF3B6,
03166     0x9A27, 0xF3BC, 0x9A29, 0xF560, 0x9A2A, 0xF55E, 0x9A2B, 0xC4CA,
03167     0x9A2C, 0xF55D, 0x9A2D, 0xF563, 0x9A2E, 0xF561, 0x9A30, 0xC4CB,
03168     0x9A31, 0xF55C, 0x9A32, 0xF55A, 0x9A34, 0xF55B, 0x9A35, 0xC4CD,
03169     0x9A36, 0xF55F, 0x9A37, 0xC4CC, 0x9A38, 0xF562, 0x9A39, 0xF678,
03170     0x9A3A, 0xF67E, 0x9A3D, 0xF679, 0x9A3E, 0xC55B, 0x9A3F, 0xF6A1,
03171     0x9A40, 0xC55A, 0x9A41, 0xF67D, 0x9A42, 0xF67C, 0x9A43, 0xC559,
03172     0x9A44, 0xF67B, 0x9A45, 0xC558, 0x9A46, 0xF67A, 0x9A48, 0xF77D,
03173     0x9A49, 0xF7A1, 0x9A4A, 0xF77E, 0x9A4C, 0xF77B, 0x9A4D, 0xC5BB,
03174     0x9A4E, 0xF778, 0x9A4F, 0xF77C, 0x9A50, 0xF7A3, 0x9A52, 0xF7A2,
03175     0x9A53, 0xF779, 0x9A54, 0xF77A, 0x9A55, 0xC5BA, 0x9A56, 0xF852,
03176     0x9A57, 0xC5E7, 0x9A59, 0xF853, 0x9A5A, 0xC5E5, 0x9A5B, 0xC5E6,
03177     0x9A5E, 0xF8D3, 0x9A5F, 0xC64A, 0x9A60, 0xF976, 0x9A62, 0xC66A,
03178     0x9A64, 0xF9B3, 0x9A65, 0xC66B, 0x9A66, 0xF9B4, 0x9A67, 0xF9B5,
03179     0x9A68, 0xF9C3, 0x9A69, 0xF9C2, 0x9A6A, 0xC67A, 0x9A6B, 0xF9CD,
03180     0x9AA8, 0xB0A9, 0x9AAB, 0xE0E9, 0x9AAD, 0xE0E8, 0x9AAF, 0xBBEA,
03181     0x9AB0, 0xBBEB, 0x9AB1, 0xE4DA, 0x9AB3, 0xE8D2, 0x9AB4, 0xEC6C,
03182     0x9AB7, 0xBE75, 0x9AB8, 0xC065, 0x9AB9, 0xEC6A, 0x9ABB, 0xEC6D,
03183     0x9ABC, 0xC066, 0x9ABE, 0xEF64, 0x9ABF, 0xEC6B, 0x9AC0, 0xF1B9,
03184     0x9AC1, 0xC34E, 0x9AC2, 0xF3C1, 0x9AC6, 0xF566, 0x9AC7, 0xF564,
03185     0x9ACA, 0xF565, 0x9ACD, 0xF6A2, 0x9ACF, 0xC55C, 0x9AD0, 0xF7A4,
03186     0x9AD1, 0xC5EA, 0x9AD2, 0xC5BC, 0x9AD3, 0xC5E8, 0x9AD4, 0xC5E9,
03187     0x9AD5, 0xF8D4, 0x9AD6, 0xC662, 0x9AD8, 0xB0AA, 0x9ADC, 0xF1BA,
03188     0x9ADF, 0xD449, 0x9AE1, 0xB9A6, 0x9AE3, 0xE4DB, 0x9AE6, 0xBBEC,
03189     0x9AE7, 0xE4DC, 0x9AEB, 0xE8D4, 0x9AEC, 0xE8D3, 0x9AED, 0xC068,
03190     0x9AEE, 0xBE76, 0x9AEF, 0xBE77, 0x9AF1, 0xE8D7, 0x9AF2, 0xE8D6,
03191     0x9AF3, 0xE8D5, 0x9AF6, 0xEC6E, 0x9AF7, 0xEC71, 0x9AF9, 0xEC70,
03192     0x9AFA, 0xEC6F, 0x9AFB, 0xC067, 0x9AFC, 0xEF68, 0x9AFD, 0xEF66,
03193     0x9AFE, 0xEF65, 0x9B01, 0xEF67, 0x9B03, 0xC34F, 0x9B04, 0xF1BC,
03194     0x9B05, 0xF1BD, 0x9B06, 0xC350, 0x9B08, 0xF1BB, 0x9B0A, 0xF3C3,
03195     0x9B0B, 0xF3C2, 0x9B0C, 0xF3C5, 0x9B0D, 0xC447, 0x9B0E, 0xF3C4,
03196     0x9B10, 0xF567, 0x9B11, 0xF569, 0x9B12, 0xF568, 0x9B15, 0xF6A3,
03197     0x9B16, 0xF6A6, 0x9B17, 0xF6A4, 0x9B18, 0xF6A5, 0x9B19, 0xF7A5,
03198     0x9B1A, 0xC5BD, 0x9B1E, 0xF854, 0x9B1F, 0xF855, 0x9B20, 0xF856,
03199     0x9B22, 0xC64B, 0x9B23, 0xC663, 0x9B24, 0xF9B6, 0x9B25, 0xB0AB,
03200     0x9B27, 0xBE78, 0x9B28, 0xC069, 0x9B29, 0xF1BE, 0x9B2B, 0xF7A6,
03201     0x9B2E, 0xF9C4, 0x9B2F, 0xD44A, 0x9B31, 0xC67B, 0x9B32, 0xB0AC,
03202     0x9B33, 0xEC72, 0x9B35, 0xF1BF, 0x9B37, 0xF3C6, 0x9B3A, 0xF6A7,
03203     0x9B3B, 0xF7A7, 0x9B3C, 0xB0AD, 0x9B3E, 0xE4DD, 0x9B3F, 0xE4DE,
03204     0x9B41, 0xBBED, 0x9B42, 0xBBEE, 0x9B43, 0xE8D9, 0x9B44, 0xBE7A,
03205     0x9B45, 0xBE79, 0x9B46, 0xE8D8, 0x9B48, 0xEF69, 0x9B4A, 0xF1C0,
03206     0x9B4B, 0xF1C2, 0x9B4C, 0xF1C1, 0x9B4D, 0xC353, 0x9B4E, 0xC352,
03207     0x9B4F, 0xC351, 0x9B51, 0xC55E, 0x9B52, 0xF6A8, 0x9B54, 0xC55D,
03208     0x9B55, 0xF7A9, 0x9B56, 0xF7A8, 0x9B58, 0xC64C, 0x9B59, 0xF8D5,
03209     0x9B5A, 0xB3BD, 0x9B5B, 0xE0EA, 0x9B5F, 0xE4E1, 0x9B60, 0xE4DF,
03210     0x9B61, 0xE4E0, 0x9B64, 0xE8E2, 0x9B66, 0xE8DD, 0x9B67, 0xE8DA,
03211     0x9B68, 0xE8E1, 0x9B6C, 0xE8E3, 0x9B6F, 0xBE7C, 0x9B70, 0xE8E0,
03212     0x9B71, 0xE8DC, 0x9B74, 0xE8DB, 0x9B75, 0xE8DF, 0x9B76, 0xE8DE,
03213     0x9B77, 0xBE7B, 0x9B7A, 0xEC7D, 0x9B7B, 0xEC78, 0x9B7C, 0xEC76,
03214     0x9B7D, 0xECA1, 0x9B7E, 0xEC77, 0x9B80, 0xEC73, 0x9B82, 0xEC79,
03215     0x9B85, 0xEC74, 0x9B86, 0xEF72, 0x9B87, 0xEC75, 0x9B88, 0xECA2,
03216     0x9B90, 0xEC7C, 0x9B91, 0xC06A, 0x9B92, 0xEC7B, 0x9B93, 0xEC7A,
03217     0x9B95, 0xEC7E, 0x9B9A, 0xEF6A, 0x9B9B, 0xEF6D, 0x9B9E, 0xEF6C,
03218     0x9BA0, 0xEF74, 0x9BA1, 0xEF6F, 0x9BA2, 0xEF73, 0x9BA4, 0xEF71,
03219     0x9BA5, 0xEF70, 0x9BA6, 0xEF6E, 0x9BA8, 0xEF6B, 0x9BAA, 0xC243,
03220     0x9BAB, 0xC242, 0x9BAD, 0xC244, 0x9BAE, 0xC241, 0x9BAF, 0xEF75,
03221     0x9BB5, 0xF1C8, 0x9BB6, 0xF1CB, 0x9BB8, 0xF1C9, 0x9BB9, 0xF1CD,
03222     0x9BBD, 0xF1CE, 0x9BBF, 0xF1C6, 0x9BC0, 0xC358, 0x9BC1, 0xF1C7,
03223     0x9BC3, 0xF1C5, 0x9BC4, 0xF1CC, 0x9BC6, 0xF1C4, 0x9BC7, 0xF1C3,
03224     0x9BC8, 0xC357, 0x9BC9, 0xC355, 0x9BCA, 0xC354, 0x9BD3, 0xF1CA,
03225     0x9BD4, 0xF3CF, 0x9BD5, 0xF3D5, 0x9BD6, 0xC44A, 0x9BD7, 0xF3D0,
03226     0x9BD9, 0xF3D3, 0x9BDA, 0xF3D7, 0x9BDB, 0xC44B, 0x9BDC, 0xF3D2,
03227     0x9BDE, 0xF3CA, 0x9BE0, 0xF3C9, 0x9BE1, 0xF3D6, 0x9BE2, 0xF3CD,
03228     0x9BE4, 0xF3CB, 0x9BE5, 0xF3D4, 0x9BE6, 0xF3CC, 0x9BE7, 0xC449,
03229     0x9BE8, 0xC448, 0x9BEA, 0xF3C7, 0x9BEB, 0xF3C8, 0x9BEC, 0xF3D1,
03230     0x9BF0, 0xF3CE, 0x9BF7, 0xF56C, 0x9BF8, 0xF56F, 0x9BFD, 0xC356,
03231     0x9C05, 0xF56D, 0x9C06, 0xF573, 0x9C07, 0xF571, 0x9C08, 0xF56B,
03232     0x9C09, 0xF576, 0x9C0B, 0xF56A, 0x9C0D, 0xC4CF, 0x9C0E, 0xF572,
03233     0x9C12, 0xF56E, 0x9C13, 0xC4CE, 0x9C14, 0xF575, 0x9C17, 0xF574,
03234     0x9C1C, 0xF6AB, 0x9C1D, 0xF6AA, 0x9C21, 0xF6B1, 0x9C23, 0xF6AD,
03235     0x9C24, 0xF6B0, 0x9C25, 0xC560, 0x9C28, 0xF6AE, 0x9C29, 0xF6AF,
03236     0x9C2B, 0xF6A9, 0x9C2C, 0xF6AC, 0x9C2D, 0xC55F, 0x9C31, 0xC5BF,
03237     0x9C32, 0xF7B4, 0x9C33, 0xF7AF, 0x9C34, 0xF7B3, 0x9C36, 0xF7B6,
03238     0x9C37, 0xF7B2, 0x9C39, 0xF7AE, 0x9C3B, 0xC5C1, 0x9C3C, 0xF7B1,
03239     0x9C3D, 0xF7B5, 0x9C3E, 0xC5C0, 0x9C3F, 0xF7AC, 0x9C40, 0xF570,
03240     0x9C41, 0xF7B0, 0x9C44, 0xF7AD, 0x9C46, 0xF7AA, 0x9C48, 0xF7AB,
03241     0x9C49, 0xC5BE, 0x9C4A, 0xF85A, 0x9C4B, 0xF85C, 0x9C4C, 0xF85F,
03242     0x9C4D, 0xF85B, 0x9C4E, 0xF860, 0x9C50, 0xF859, 0x9C52, 0xF857,
03243     0x9C54, 0xC5EB, 0x9C55, 0xF85D, 0x9C56, 0xC5ED, 0x9C57, 0xC5EC,
03244     0x9C58, 0xF858, 0x9C59, 0xF85E, 0x9C5E, 0xF8DA, 0x9C5F, 0xC64D,
03245     0x9C60, 0xF8DB, 0x9C62, 0xF8D9, 0x9C63, 0xF8D6, 0x9C66, 0xF8D8,
03246     0x9C67, 0xF8D7, 0x9C68, 0xF95A, 0x9C6D, 0xF95C, 0x9C6E, 0xF95B,
03247     0x9C71, 0xF979, 0x9C73, 0xF978, 0x9C74, 0xF977, 0x9C75, 0xF97A,
03248     0x9C77, 0xC673, 0x9C78, 0xC674, 0x9C79, 0xF9CA, 0x9C7A, 0xF9CE,
03249     0x9CE5, 0xB3BE, 0x9CE6, 0xDCAF, 0x9CE7, 0xE0ED, 0x9CE9, 0xB9A7,
03250     0x9CEA, 0xE0EB, 0x9CED, 0xE0EC, 0x9CF1, 0xE4E2, 0x9CF2, 0xE4E3,
03251     0x9CF3, 0xBBF1, 0x9CF4, 0xBBEF, 0x9CF5, 0xE4E4, 0x9CF6, 0xBBF0,
03252     0x9CF7, 0xE8E8, 0x9CF9, 0xE8EB, 0x9CFA, 0xE8E5, 0x9CFB, 0xE8EC,
03253     0x9CFC, 0xE8E4, 0x9CFD, 0xE8E6, 0x9CFF, 0xE8E7, 0x9D00, 0xE8EA,
03254     0x9D03, 0xBEA1, 0x9D04, 0xE8EF, 0x9D05, 0xE8EE, 0x9D06, 0xBE7D,
03255     0x9D07, 0xE8E9, 0x9D08, 0xE8ED, 0x9D09, 0xBE7E, 0x9D10, 0xECAC,
03256     0x9D12, 0xC06F, 0x9D14, 0xECA7, 0x9D15, 0xC06B, 0x9D17, 0xECA4,
03257     0x9D18, 0xECAA, 0x9D19, 0xECAD, 0x9D1B, 0xC070, 0x9D1D, 0xECA9,
03258     0x9D1E, 0xECA6, 0x9D1F, 0xECAE, 0x9D20, 0xECA5, 0x9D22, 0xECAB,
03259     0x9D23, 0xC06C, 0x9D25, 0xECA3, 0x9D26, 0xC06D, 0x9D28, 0xC06E,
03260     0x9D29, 0xECA8, 0x9D2D, 0xEFA9, 0x9D2E, 0xEF7A, 0x9D2F, 0xEF7B,
03261     0x9D30, 0xEF7E, 0x9D31, 0xEF7C, 0x9D33, 0xEF76, 0x9D36, 0xEF79,
03262     0x9D37, 0xEFA5, 0x9D38, 0xEF7D, 0x9D3B, 0xC245, 0x9D3D, 0xEFA7,
03263     0x9D3E, 0xEFA4, 0x9D3F, 0xC246, 0x9D40, 0xEFA6, 0x9D41, 0xEF77,
03264     0x9D42, 0xEFA2, 0x9D43, 0xEFA3, 0x9D45, 0xEFA1, 0x9D4A, 0xF1D2,
03265     0x9D4B, 0xF1D4, 0x9D4C, 0xF1D7, 0x9D4F, 0xF1D1, 0x9D51, 0xC359,
03266     0x9D52, 0xF1D9, 0x9D53, 0xF1D0, 0x9D54, 0xF1DA, 0x9D56, 0xF1D6,
03267     0x9D57, 0xF1D8, 0x9D58, 0xF1DC, 0x9D59, 0xF1D5, 0x9D5A, 0xF1DD,
03268     0x9D5B, 0xF1D3, 0x9D5C, 0xF1CF, 0x9D5D, 0xC35A, 0x9D5F, 0xF1DB,
03269     0x9D60, 0xC35B, 0x9D61, 0xC44D, 0x9D67, 0xEF78, 0x9D68, 0xF3F1,
03270     0x9D69, 0xF3E8, 0x9D6A, 0xC44F, 0x9D6B, 0xF3E4, 0x9D6C, 0xC450,
03271     0x9D6F, 0xF3ED, 0x9D70, 0xF3E7, 0x9D71, 0xF3DD, 0x9D72, 0xC44E,
03272     0x9D73, 0xF3EA, 0x9D74, 0xF3E5, 0x9D75, 0xF3E6, 0x9D77, 0xF3D8,
03273     0x9D78, 0xF3DF, 0x9D79, 0xF3EE, 0x9D7B, 0xF3EB, 0x9D7D, 0xF3E3,
03274     0x9D7F, 0xF3EF, 0x9D80, 0xF3DE, 0x9D81, 0xF3D9, 0x9D82, 0xF3EC,
03275     0x9D84, 0xF3DB, 0x9D85, 0xF3E9, 0x9D86, 0xF3E0, 0x9D87, 0xF3F0,
03276     0x9D88, 0xF3DC, 0x9D89, 0xC44C, 0x9D8A, 0xF3DA, 0x9D8B, 0xF3E1,
03277     0x9D8C, 0xF3E2, 0x9D90, 0xF57D, 0x9D92, 0xF57B, 0x9D94, 0xF5A2,
03278     0x9D96, 0xF5AE, 0x9D97, 0xF5A5, 0x9D98, 0xF57C, 0x9D99, 0xF578,
03279     0x9D9A, 0xF5A7, 0x9D9B, 0xF57E, 0x9D9C, 0xF5A3, 0x9D9D, 0xF57A,
03280     0x9D9E, 0xF5AA, 0x9D9F, 0xF577, 0x9DA0, 0xF5A1, 0x9DA1, 0xF5A6,
03281     0x9DA2, 0xF5A8, 0x9DA3, 0xF5AB, 0x9DA4, 0xF579, 0x9DA6, 0xF5AF,
03282     0x9DA7, 0xF5B0, 0x9DA8, 0xF5A9, 0x9DA9, 0xF5AD, 0x9DAA, 0xF5A4,
03283     0x9DAC, 0xF6C1, 0x9DAD, 0xF6C4, 0x9DAF, 0xC561, 0x9DB1, 0xF6C3,
03284     0x9DB2, 0xF6C8, 0x9DB3, 0xF6C6, 0x9DB4, 0xC562, 0x9DB5, 0xF6BD,
03285     0x9DB6, 0xF6B3, 0x9DB7, 0xF6B2, 0x9DB8, 0xC564, 0x9DB9, 0xF6BF,
03286     0x9DBA, 0xF6C0, 0x9DBB, 0xF6BC, 0x9DBC, 0xF6B4, 0x9DBE, 0xF6B9,
03287     0x9DBF, 0xF5AC, 0x9DC1, 0xF6B5, 0x9DC2, 0xC563, 0x9DC3, 0xF6BB,
03288     0x9DC5, 0xF6BA, 0x9DC7, 0xF6B6, 0x9DC8, 0xF6C2, 0x9DCA, 0xF6B7,
03289     0x9DCB, 0xF7BB, 0x9DCC, 0xF6C5, 0x9DCD, 0xF6C7, 0x9DCE, 0xF6BE,
03290     0x9DCF, 0xF6B8, 0x9DD0, 0xF7BC, 0x9DD1, 0xF7BE, 0x9DD2, 0xF7B8,
03291     0x9DD3, 0xC5C2, 0x9DD5, 0xF7C5, 0x9DD6, 0xF7C3, 0x9DD7, 0xC5C3,
03292     0x9DD8, 0xF7C2, 0x9DD9, 0xF7C1, 0x9DDA, 0xF7BA, 0x9DDB, 0xF7B7,
03293     0x9DDC, 0xF7BD, 0x9DDD, 0xF7C6, 0x9DDE, 0xF7B9, 0x9DDF, 0xF7BF,
03294     0x9DE1, 0xF869, 0x9DE2, 0xF86E, 0x9DE3, 0xF864, 0x9DE4, 0xF867,
03295     0x9DE5, 0xC5EE, 0x9DE6, 0xF86B, 0x9DE8, 0xF872, 0x9DE9, 0xF7C0,
03296     0x9DEB, 0xF865, 0x9DEC, 0xF86F, 0x9DED, 0xF873, 0x9DEE, 0xF86A,
03297     0x9DEF, 0xF863, 0x9DF0, 0xF86D, 0x9DF2, 0xF86C, 0x9DF3, 0xF871,
03298     0x9DF4, 0xF870, 0x9DF5, 0xF7C4, 0x9DF6, 0xF868, 0x9DF7, 0xF862,
03299     0x9DF8, 0xF866, 0x9DF9, 0xC64E, 0x9DFA, 0xC64F, 0x9DFB, 0xF861,
03300     0x9DFD, 0xF8E6, 0x9DFE, 0xF8DD, 0x9DFF, 0xF8E5, 0x9E00, 0xF8E2,
03301     0x9E01, 0xF8E3, 0x9E02, 0xF8DC, 0x9E03, 0xF8DF, 0x9E04, 0xF8E7,
03302     0x9E05, 0xF8E1, 0x9E06, 0xF8E0, 0x9E07, 0xF8DE, 0x9E09, 0xF8E4,
03303     0x9E0B, 0xF95D, 0x9E0D, 0xF95E, 0x9E0F, 0xF960, 0x9E10, 0xF95F,
03304     0x9E11, 0xF962, 0x9E12, 0xF961, 0x9E13, 0xF97C, 0x9E14, 0xF97B,
03305     0x9E15, 0xF9B7, 0x9E17, 0xF9B8, 0x9E19, 0xF9C5, 0x9E1A, 0xC678,
03306     0x9E1B, 0xC67C, 0x9E1D, 0xF9CF, 0x9E1E, 0xC67D, 0x9E75, 0xB3BF,
03307     0x9E79, 0xC4D0, 0x9E7A, 0xF6C9, 0x9E7C, 0xC650, 0x9E7D, 0xC651,
03308     0x9E7F, 0xB3C0, 0x9E80, 0xE0EE, 0x9E82, 0xB9A8, 0x9E83, 0xE8F0,
03309     0x9E86, 0xECB0, 0x9E87, 0xECB1, 0x9E88, 0xECAF, 0x9E89, 0xEFAB,
03310     0x9E8A, 0xEFAA, 0x9E8B, 0xC247, 0x9E8C, 0xF1DF, 0x9E8D, 0xEFAC,
03311     0x9E8E, 0xF1DE, 0x9E91, 0xF3F3, 0x9E92, 0xC451, 0x9E93, 0xC453,
03312     0x9E94, 0xF3F2, 0x9E97, 0xC452, 0x9E99, 0xF5B1, 0x9E9A, 0xF5B3,
03313     0x9E9B, 0xF5B2, 0x9E9C, 0xF6CA, 0x9E9D, 0xC565, 0x9E9F, 0xC5EF,
03314     0x9EA0, 0xF8E8, 0x9EA1, 0xF963, 0x9EA4, 0xF9D2, 0x9EA5, 0xB3C1,
03315     0x9EA7, 0xE4E5, 0x9EA9, 0xBEA2, 0x9EAD, 0xECB3, 0x9EAE, 0xECB2,
03316     0x9EB0, 0xEFAD, 0x9EB4, 0xC454, 0x9EB5, 0xC4D1, 0x9EB6, 0xF7C7,
03317     0x9EB7, 0xF9CB, 0x9EBB, 0xB3C2, 0x9EBC, 0xBBF2, 0x9EBE, 0xBEA3,
03318     0x9EC0, 0xF3F4, 0x9EC2, 0xF874, 0x9EC3, 0xB6C0, 0x9EC8, 0xEFAE,
03319     0x9ECC, 0xC664, 0x9ECD, 0xB6C1, 0x9ECE, 0xBEA4, 0x9ECF, 0xC248,
03320     0x9ED0, 0xF875, 0x9ED1, 0xB6C2, 0x9ED3, 0xE8F1, 0x9ED4, 0xC072,
03321     0x9ED5, 0xECB4, 0x9ED6, 0xECB5, 0x9ED8, 0xC071, 0x9EDA, 0xEFAF,
03322     0x9EDB, 0xC24C, 0x9EDC, 0xC24A, 0x9EDD, 0xC24B, 0x9EDE, 0xC249,
03323     0x9EDF, 0xF1E0, 0x9EE0, 0xC35C, 0x9EE4, 0xF5B5, 0x9EE5, 0xF5B4,
03324     0x9EE6, 0xF5B7, 0x9EE7, 0xF5B6, 0x9EE8, 0xC4D2, 0x9EEB, 0xF6CB,
03325     0x9EED, 0xF6CD, 0x9EEE, 0xF6CC, 0x9EEF, 0xC566, 0x9EF0, 0xF7C8,
03326     0x9EF2, 0xF876, 0x9EF3, 0xF877, 0x9EF4, 0xC5F0, 0x9EF5, 0xF964,
03327     0x9EF6, 0xF97D, 0x9EF7, 0xC675, 0x9EF9, 0xDCB0, 0x9EFA, 0xECB6,
03328     0x9EFB, 0xEFB0, 0x9EFC, 0xF3F5, 0x9EFD, 0xE0EF, 0x9EFF, 0xEFB1,
03329     0x9F00, 0xF1E2, 0x9F01, 0xF1E1, 0x9F06, 0xF878, 0x9F07, 0xC652,
03330     0x9F09, 0xF965, 0x9F0A, 0xF97E, 0x9F0E, 0xB9A9, 0x9F0F, 0xE8F2,
03331     0x9F10, 0xE8F3, 0x9F12, 0xECB7, 0x9F13, 0xB9AA, 0x9F15, 0xC35D,
03332     0x9F16, 0xF1E3, 0x9F18, 0xF6CF, 0x9F19, 0xC567, 0x9F1A, 0xF6D0,
03333     0x9F1B, 0xF6CE, 0x9F1C, 0xF879, 0x9F1E, 0xF8E9, 0x9F20, 0xB9AB,
03334     0x9F22, 0xEFB4, 0x9F23, 0xEFB3, 0x9F24, 0xEFB2, 0x9F25, 0xF1E4,
03335     0x9F28, 0xF1E8, 0x9F29, 0xF1E7, 0x9F2A, 0xF1E6, 0x9F2B, 0xF1E5,
03336     0x9F2C, 0xC35E, 0x9F2D, 0xF3F6, 0x9F2E, 0xF5B9, 0x9F2F, 0xC4D3,
03337     0x9F30, 0xF5B8, 0x9F31, 0xF6D1, 0x9F32, 0xF7CB, 0x9F33, 0xF7CA,
03338     0x9F34, 0xC5C4, 0x9F35, 0xF7C9, 0x9F36, 0xF87C, 0x9F37, 0xF87B,
03339     0x9F38, 0xF87A, 0x9F3B, 0xBBF3, 0x9F3D, 0xECB8, 0x9F3E, 0xC24D,
03340     0x9F40, 0xF3F7, 0x9F41, 0xF3F8, 0x9F42, 0xF7CC, 0x9F43, 0xF87D,
03341     0x9F46, 0xF8EA, 0x9F47, 0xF966, 0x9F48, 0xF9B9, 0x9F49, 0xF9D4,
03342     0x9F4A, 0xBBF4, 0x9F4B, 0xC24E, 0x9F4C, 0xF1E9, 0x9F4D, 0xF3F9,
03343     0x9F4E, 0xF6D2, 0x9F4F, 0xF87E, 0x9F52, 0xBEA6, 0x9F54, 0xEFB5,
03344     0x9F55, 0xF1EA, 0x9F56, 0xF3FA, 0x9F57, 0xF3FB, 0x9F58, 0xF3FC,
03345     0x9F59, 0xF5BE, 0x9F5B, 0xF5BA, 0x9F5C, 0xC568, 0x9F5D, 0xF5BD,
03346     0x9F5E, 0xF5BC, 0x9F5F, 0xC4D4, 0x9F60, 0xF5BB, 0x9F61, 0xC4D6,
03347     0x9F63, 0xC4D5, 0x9F64, 0xF6D4, 0x9F65, 0xF6D3, 0x9F66, 0xC569,
03348     0x9F67, 0xC56A, 0x9F6A, 0xC5C6, 0x9F6B, 0xF7CD, 0x9F6C, 0xC5C5,
03349     0x9F6E, 0xF8A3, 0x9F6F, 0xF8A4, 0x9F70, 0xF8A2, 0x9F71, 0xF8A1,
03350     0x9F72, 0xC654, 0x9F74, 0xF8EB, 0x9F75, 0xF8EC, 0x9F76, 0xF8ED,
03351     0x9F77, 0xC653, 0x9F78, 0xF967, 0x9F79, 0xF96A, 0x9F7A, 0xF969,
03352     0x9F7B, 0xF968, 0x9F7E, 0xF9D3, 0x9F8D, 0xC073, 0x9F90, 0xC365,
03353     0x9F91, 0xF5BF, 0x9F92, 0xF6D5, 0x9F94, 0xC5C7, 0x9F95, 0xF7CE,
03354     0x9F98, 0xF9D5, 0x9F9C, 0xC074, 0x9FA0, 0xEFB6, 0x9FA2, 0xF7CF,
03355     0x9FA4, 0xF9A1, 0xFA0C, 0xC94A, 0xFA0D, 0xDDFC, 0xFE30, 0xA14A,
03356     0xFE31, 0xA157, 0xFE33, 0xA159, 0xFE34, 0xA15B, 0xFE35, 0xA15F,
03357     0xFE36, 0xA160, 0xFE37, 0xA163, 0xFE38, 0xA164, 0xFE39, 0xA167,
03358     0xFE3A, 0xA168, 0xFE3B, 0xA16B, 0xFE3C, 0xA16C, 0xFE3D, 0xA16F,
03359     0xFE3E, 0xA170, 0xFE3F, 0xA173, 0xFE40, 0xA174, 0xFE41, 0xA177,
03360     0xFE42, 0xA178, 0xFE43, 0xA17B, 0xFE44, 0xA17C, 0xFE49, 0xA1C6,
03361     0xFE4A, 0xA1C7, 0xFE4B, 0xA1CA, 0xFE4C, 0xA1CB, 0xFE4D, 0xA1C8,
03362     0xFE4E, 0xA1C9, 0xFE4F, 0xA15C, 0xFE50, 0xA14D, 0xFE51, 0xA14E,
03363     0xFE52, 0xA14F, 0xFE54, 0xA151, 0xFE55, 0xA152, 0xFE56, 0xA153,
03364     0xFE57, 0xA154, 0xFE59, 0xA17D, 0xFE5A, 0xA17E, 0xFE5B, 0xA1A1,
03365     0xFE5C, 0xA1A2, 0xFE5D, 0xA1A3, 0xFE5E, 0xA1A4, 0xFE5F, 0xA1CC,
03366     0xFE60, 0xA1CD, 0xFE61, 0xA1CE, 0xFE62, 0xA1DE, 0xFE63, 0xA1DF,
03367     0xFE64, 0xA1E0, 0xFE65, 0xA1E1, 0xFE66, 0xA1E2, 0xFE68, 0xA242,
03368     0xFE69, 0xA24C, 0xFE6A, 0xA24D, 0xFE6B, 0xA24E, 0xFF01, 0xA149,
03369     0xFF03, 0xA1AD, 0xFF04, 0xA243, 0xFF05, 0xA248, 0xFF06, 0xA1AE,
03370     0xFF08, 0xA15D, 0xFF09, 0xA15E, 0xFF0A, 0xA1AF, 0xFF0B, 0xA1CF,
03371     0xFF0C, 0xA141, 0xFF0D, 0xA1D0, 0xFF0E, 0xA144, 0xFF0F, 0xA1FE,
03372     0xFF10, 0xA2AF, 0xFF11, 0xA2B0, 0xFF12, 0xA2B1, 0xFF13, 0xA2B2,
03373     0xFF14, 0xA2B3, 0xFF15, 0xA2B4, 0xFF16, 0xA2B5, 0xFF17, 0xA2B6,
03374     0xFF18, 0xA2B7, 0xFF19, 0xA2B8, 0xFF1A, 0xA147, 0xFF1B, 0xA146,
03375     0xFF1C, 0xA1D5, 0xFF1D, 0xA1D7, 0xFF1E, 0xA1D6, 0xFF1F, 0xA148,
03376     0xFF20, 0xA249, 0xFF21, 0xA2CF, 0xFF22, 0xA2D0, 0xFF23, 0xA2D1,
03377     0xFF24, 0xA2D2, 0xFF25, 0xA2D3, 0xFF26, 0xA2D4, 0xFF27, 0xA2D5,
03378     0xFF28, 0xA2D6, 0xFF29, 0xA2D7, 0xFF2A, 0xA2D8, 0xFF2B, 0xA2D9,
03379     0xFF2C, 0xA2DA, 0xFF2D, 0xA2DB, 0xFF2E, 0xA2DC, 0xFF2F, 0xA2DD,
03380     0xFF30, 0xA2DE, 0xFF31, 0xA2DF, 0xFF32, 0xA2E0, 0xFF33, 0xA2E1,
03381     0xFF34, 0xA2E2, 0xFF35, 0xA2E3, 0xFF36, 0xA2E4, 0xFF37, 0xA2E5,
03382     0xFF38, 0xA2E6, 0xFF39, 0xA2E7, 0xFF3A, 0xA2E8, 0xFF3C, 0xA240,
03383     0xFF3F, 0xA1C4, 0xFF41, 0xA2E9, 0xFF42, 0xA2EA, 0xFF43, 0xA2EB,
03384     0xFF44, 0xA2EC, 0xFF45, 0xA2ED, 0xFF46, 0xA2EE, 0xFF47, 0xA2EF,
03385     0xFF48, 0xA2F0, 0xFF49, 0xA2F1, 0xFF4A, 0xA2F2, 0xFF4B, 0xA2F3,
03386     0xFF4C, 0xA2F4, 0xFF4D, 0xA2F5, 0xFF4E, 0xA2F6, 0xFF4F, 0xA2F7,
03387     0xFF50, 0xA2F8, 0xFF51, 0xA2F9, 0xFF52, 0xA2FA, 0xFF53, 0xA2FB,
03388     0xFF54, 0xA2FC, 0xFF55, 0xA2FD, 0xFF56, 0xA2FE, 0xFF57, 0xA340,
03389     0xFF58, 0xA341, 0xFF59, 0xA342, 0xFF5A, 0xA343, 0xFF5B, 0xA161,
03390     0xFF5C, 0xA155, 0xFF5D, 0xA162, 0xFF5E, 0xA1E3, 0xFFE0, 0xA246,
03391     0xFFE1, 0xA247, 0xFFE3, 0xA1C3, 0xFFE5, 0xA244, 0, 0
03392 };
03393
03394 static
03395 const WCHAR oem2uni[] = {
03396 /*  OEM - Unicode,  OEM - Unicode,  OEM - Unicode,  OEM - Unicode */
03397     0xA140, 0x3000, 0xA141, 0xFF0C, 0xA142, 0x3001, 0xA143, 0x3002,
03398     0xA144, 0xFF0E, 0xA145, 0x2027, 0xA146, 0xFF1B, 0xA147, 0xFF1A,
03399     0xA148, 0xFF1F, 0xA149, 0xFF01, 0xA14A, 0xFE30, 0xA14B, 0x2026,
03400     0xA14C, 0x2025, 0xA14D, 0xFE50, 0xA14E, 0xFE51, 0xA14F, 0xFE52,
03401     0xA150, 0x00B7, 0xA151, 0xFE54, 0xA152, 0xFE55, 0xA153, 0xFE56,
03402     0xA154, 0xFE57, 0xA155, 0xFF5C, 0xA156, 0x2013, 0xA157, 0xFE31,
03403     0xA158, 0x2014, 0xA159, 0xFE33, 0xA15A, 0x2574, 0xA15B, 0xFE34,
03404     0xA15C, 0xFE4F, 0xA15D, 0xFF08, 0xA15E, 0xFF09, 0xA15F, 0xFE35,
03405     0xA160, 0xFE36, 0xA161, 0xFF5B, 0xA162, 0xFF5D, 0xA163, 0xFE37,
03406     0xA164, 0xFE38, 0xA165, 0x3014, 0xA166, 0x3015, 0xA167, 0xFE39,
03407     0xA168, 0xFE3A, 0xA169, 0x3010, 0xA16A, 0x3011, 0xA16B, 0xFE3B,
03408     0xA16C, 0xFE3C, 0xA16D, 0x300A, 0xA16E, 0x300B, 0xA16F, 0xFE3D,
03409     0xA170, 0xFE3E, 0xA171, 0x3008, 0xA172, 0x3009, 0xA173, 0xFE3F,
03410     0xA174, 0xFE40, 0xA175, 0x300C, 0xA176, 0x300D, 0xA177, 0xFE41,
03411     0xA178, 0xFE42, 0xA179, 0x300E, 0xA17A, 0x300F, 0xA17B, 0xFE43,
03412     0xA17C, 0xFE44, 0xA17D, 0xFE59, 0xA17E, 0xFE5A, 0xA1A1, 0xFE5B,
03413     0xA1A2, 0xFE5C, 0xA1A3, 0xFE5D, 0xA1A4, 0xFE5E, 0xA1A5, 0x2018,
03414     0xA1A6, 0x2019, 0xA1A7, 0x201C, 0xA1A8, 0x201D, 0xA1A9, 0x301D,
03415     0xA1AA, 0x301E, 0xA1AB, 0x2035, 0xA1AC, 0x2032, 0xA1AD, 0xFF03,
03416     0xA1AE, 0xFF06, 0xA1AF, 0xFF0A, 0xA1B0, 0x203B, 0xA1B1, 0x00A7,
03417     0xA1B2, 0x3003, 0xA1B3, 0x25CB, 0xA1B4, 0x25CF, 0xA1B5, 0x25B3,
03418     0xA1B6, 0x25B2, 0xA1B7, 0x25CE, 0xA1B8, 0x2606, 0xA1B9, 0x2605,
03419     0xA1BA, 0x25C7, 0xA1BB, 0x25C6, 0xA1BC, 0x25A1, 0xA1BD, 0x25A0,
03420     0xA1BE, 0x25BD, 0xA1BF, 0x25BC, 0xA1C0, 0x32A3, 0xA1C1, 0x2105,
03421     0xA1C2, 0x00AF, 0xA1C3, 0xFFE3, 0xA1C4, 0xFF3F, 0xA1C5, 0x02CD,
03422     0xA1C6, 0xFE49, 0xA1C7, 0xFE4A, 0xA1C8, 0xFE4D, 0xA1C9, 0xFE4E,
03423     0xA1CA, 0xFE4B, 0xA1CB, 0xFE4C, 0xA1CC, 0xFE5F, 0xA1CD, 0xFE60,
03424     0xA1CE, 0xFE61, 0xA1CF, 0xFF0B, 0xA1D0, 0xFF0D, 0xA1D1, 0x00D7,
03425     0xA1D2, 0x00F7, 0xA1D3, 0x00B1, 0xA1D4, 0x221A, 0xA1D5, 0xFF1C,
03426     0xA1D6, 0xFF1E, 0xA1D7, 0xFF1D, 0xA1D8, 0x2266, 0xA1D9, 0x2267,
03427     0xA1DA, 0x2260, 0xA1DB, 0x221E, 0xA1DC, 0x2252, 0xA1DD, 0x2261,
03428     0xA1DE, 0xFE62, 0xA1DF, 0xFE63, 0xA1E0, 0xFE64, 0xA1E1, 0xFE65,
03429     0xA1E2, 0xFE66, 0xA1E3, 0xFF5E, 0xA1E4, 0x2229, 0xA1E5, 0x222A,
03430     0xA1E6, 0x22A5, 0xA1E7, 0x2220, 0xA1E8, 0x221F, 0xA1E9, 0x22BF,
03431     0xA1EA, 0x33D2, 0xA1EB, 0x33D1, 0xA1EC, 0x222B, 0xA1ED, 0x222E,
03432     0xA1EE, 0x2235, 0xA1EF, 0x2234, 0xA1F0, 0x2640, 0xA1F1, 0x2642,
03433     0xA1F2, 0x2295, 0xA1F3, 0x2299, 0xA1F4, 0x2191, 0xA1F5, 0x2193,
03434     0xA1F6, 0x2190, 0xA1F7, 0x2192, 0xA1F8, 0x2196, 0xA1F9, 0x2197,
03435     0xA1FA, 0x2199, 0xA1FB, 0x2198, 0xA1FC, 0x2225, 0xA1FD, 0x2223,
03436     0xA1FE, 0xFF0F, 0xA240, 0xFF3C, 0xA241, 0x2215, 0xA242, 0xFE68,
03437     0xA243, 0xFF04, 0xA244, 0xFFE5, 0xA245, 0x3012, 0xA246, 0xFFE0,
03438     0xA247, 0xFFE1, 0xA248, 0xFF05, 0xA249, 0xFF20, 0xA24A, 0x2103,
03439     0xA24B, 0x2109, 0xA24C, 0xFE69, 0xA24D, 0xFE6A, 0xA24E, 0xFE6B,
03440     0xA24F, 0x33D5, 0xA250, 0x339C, 0xA251, 0x339D, 0xA252, 0x339E,
03441     0xA253, 0x33CE, 0xA254, 0x33A1, 0xA255, 0x338E, 0xA256, 0x338F,
03442     0xA257, 0x33C4, 0xA258, 0x00B0, 0xA259, 0x5159, 0xA25A, 0x515B,
03443     0xA25B, 0x515E, 0xA25C, 0x515D, 0xA25D, 0x5161, 0xA25E, 0x5163,
03444     0xA25F, 0x55E7, 0xA260, 0x74E9, 0xA261, 0x7CCE, 0xA262, 0x2581,
03445     0xA263, 0x2582, 0xA264, 0x2583, 0xA265, 0x2584, 0xA266, 0x2585,
03446     0xA267, 0x2586, 0xA268, 0x2587, 0xA269, 0x2588, 0xA26A, 0x258F,
03447     0xA26B, 0x258E, 0xA26C, 0x258D, 0xA26D, 0x258C, 0xA26E, 0x258B,
03448     0xA26F, 0x258A, 0xA270, 0x2589, 0xA271, 0x253C, 0xA272, 0x2534,
03449     0xA273, 0x252C, 0xA274, 0x2524, 0xA275, 0x251C, 0xA276, 0x2594,
03450     0xA277, 0x2500, 0xA278, 0x2502, 0xA279, 0x2595, 0xA27A, 0x250C,
03451     0xA27B, 0x2510, 0xA27C, 0x2514, 0xA27D, 0x2518, 0xA27E, 0x256D,
03452     0xA2A1, 0x256E, 0xA2A2, 0x2570, 0xA2A3, 0x256F, 0xA2A4, 0x2550,
03453     0xA2A5, 0x255E, 0xA2A6, 0x256A, 0xA2A7, 0x2561, 0xA2A8, 0x25E2,
03454     0xA2A9, 0x25E3, 0xA2AA, 0x25E5, 0xA2AB, 0x25E4, 0xA2AC, 0x2571,
03455     0xA2AD, 0x2572, 0xA2AE, 0x2573, 0xA2AF, 0xFF10, 0xA2B0, 0xFF11,
03456     0xA2B1, 0xFF12, 0xA2B2, 0xFF13, 0xA2B3, 0xFF14, 0xA2B4, 0xFF15,
03457     0xA2B5, 0xFF16, 0xA2B6, 0xFF17, 0xA2B7, 0xFF18, 0xA2B8, 0xFF19,
03458     0xA2B9, 0x2160, 0xA2BA, 0x2161, 0xA2BB, 0x2162, 0xA2BC, 0x2163,
03459     0xA2BD, 0x2164, 0xA2BE, 0x2165, 0xA2BF, 0x2166, 0xA2C0, 0x2167,
03460     0xA2C1, 0x2168, 0xA2C2, 0x2169, 0xA2C3, 0x3021, 0xA2C4, 0x3022,
03461     0xA2C5, 0x3023, 0xA2C6, 0x3024, 0xA2C7, 0x3025, 0xA2C8, 0x3026,
03462     0xA2C9, 0x3027, 0xA2CA, 0x3028, 0xA2CB, 0x3029, 0xA2CC, 0x5341,
03463     0xA2CD, 0x5344, 0xA2CE, 0x5345, 0xA2CF, 0xFF21, 0xA2D0, 0xFF22,
03464     0xA2D1, 0xFF23, 0xA2D2, 0xFF24, 0xA2D3, 0xFF25, 0xA2D4, 0xFF26,
03465     0xA2D5, 0xFF27, 0xA2D6, 0xFF28, 0xA2D7, 0xFF29, 0xA2D8, 0xFF2A,
03466     0xA2D9, 0xFF2B, 0xA2DA, 0xFF2C, 0xA2DB, 0xFF2D, 0xA2DC, 0xFF2E,
03467     0xA2DD, 0xFF2F, 0xA2DE, 0xFF30, 0xA2DF, 0xFF31, 0xA2E0, 0xFF32,
03468     0xA2E1, 0xFF33, 0xA2E2, 0xFF34, 0xA2E3, 0xFF35, 0xA2E4, 0xFF36,
03469     0xA2E5, 0xFF37, 0xA2E6, 0xFF38, 0xA2E7, 0xFF39, 0xA2E8, 0xFF3A,
03470     0xA2E9, 0xFF41, 0xA2EA, 0xFF42, 0xA2EB, 0xFF43, 0xA2EC, 0xFF44,
03471     0xA2ED, 0xFF45, 0xA2EE, 0xFF46, 0xA2EF, 0xFF47, 0xA2F0, 0xFF48,
03472     0xA2F1, 0xFF49, 0xA2F2, 0xFF4A, 0xA2F3, 0xFF4B, 0xA2F4, 0xFF4C,
03473     0xA2F5, 0xFF4D, 0xA2F6, 0xFF4E, 0xA2F7, 0xFF4F, 0xA2F8, 0xFF50,
03474     0xA2F9, 0xFF51, 0xA2FA, 0xFF52, 0xA2FB, 0xFF53, 0xA2FC, 0xFF54,
03475     0xA2FD, 0xFF55, 0xA2FE, 0xFF56, 0xA340, 0xFF57, 0xA341, 0xFF58,
03476     0xA342, 0xFF59, 0xA343, 0xFF5A, 0xA344, 0x0391, 0xA345, 0x0392,
03477     0xA346, 0x0393, 0xA347, 0x0394, 0xA348, 0x0395, 0xA349, 0x0396,
03478     0xA34A, 0x0397, 0xA34B, 0x0398, 0xA34C, 0x0399, 0xA34D, 0x039A,
03479     0xA34E, 0x039B, 0xA34F, 0x039C, 0xA350, 0x039D, 0xA351, 0x039E,
03480     0xA352, 0x039F, 0xA353, 0x03A0, 0xA354, 0x03A1, 0xA355, 0x03A3,
03481     0xA356, 0x03A4, 0xA357, 0x03A5, 0xA358, 0x03A6, 0xA359, 0x03A7,
03482     0xA35A, 0x03A8, 0xA35B, 0x03A9, 0xA35C, 0x03B1, 0xA35D, 0x03B2,
03483     0xA35E, 0x03B3, 0xA35F, 0x03B4, 0xA360, 0x03B5, 0xA361, 0x03B6,
03484     0xA362, 0x03B7, 0xA363, 0x03B8, 0xA364, 0x03B9, 0xA365, 0x03BA,
03485     0xA366, 0x03BB, 0xA367, 0x03BC, 0xA368, 0x03BD, 0xA369, 0x03BE,
03486     0xA36A, 0x03BF, 0xA36B, 0x03C0, 0xA36C, 0x03C1, 0xA36D, 0x03C3,
03487     0xA36E, 0x03C4, 0xA36F, 0x03C5, 0xA370, 0x03C6, 0xA371, 0x03C7,
03488     0xA372, 0x03C8, 0xA373, 0x03C9, 0xA374, 0x3105, 0xA375, 0x3106,
03489     0xA376, 0x3107, 0xA377, 0x3108, 0xA378, 0x3109, 0xA379, 0x310A,
03490     0xA37A, 0x310B, 0xA37B, 0x310C, 0xA37C, 0x310D, 0xA37D, 0x310E,
03491     0xA37E, 0x310F, 0xA3A1, 0x3110, 0xA3A2, 0x3111, 0xA3A3, 0x3112,
03492     0xA3A4, 0x3113, 0xA3A5, 0x3114, 0xA3A6, 0x3115, 0xA3A7, 0x3116,
03493     0xA3A8, 0x3117, 0xA3A9, 0x3118, 0xA3AA, 0x3119, 0xA3AB, 0x311A,
03494     0xA3AC, 0x311B, 0xA3AD, 0x311C, 0xA3AE, 0x311D, 0xA3AF, 0x311E,
03495     0xA3B0, 0x311F, 0xA3B1, 0x3120, 0xA3B2, 0x3121, 0xA3B3, 0x3122,
03496     0xA3B4, 0x3123, 0xA3B5, 0x3124, 0xA3B6, 0x3125, 0xA3B7, 0x3126,
03497     0xA3B8, 0x3127, 0xA3B9, 0x3128, 0xA3BA, 0x3129, 0xA3BB, 0x02D9,
03498     0xA3BC, 0x02C9, 0xA3BD, 0x02CA, 0xA3BE, 0x02C7, 0xA3BF, 0x02CB,
03499     0xA3E1, 0x20AC, 0xA440, 0x4E00, 0xA441, 0x4E59, 0xA442, 0x4E01,
03500     0xA443, 0x4E03, 0xA444, 0x4E43, 0xA445, 0x4E5D, 0xA446, 0x4E86,
03501     0xA447, 0x4E8C, 0xA448, 0x4EBA, 0xA449, 0x513F, 0xA44A, 0x5165,
03502     0xA44B, 0x516B, 0xA44C, 0x51E0, 0xA44D, 0x5200, 0xA44E, 0x5201,
03503     0xA44F, 0x529B, 0xA450, 0x5315, 0xA451, 0x5341, 0xA452, 0x535C,
03504     0xA453, 0x53C8, 0xA454, 0x4E09, 0xA455, 0x4E0B, 0xA456, 0x4E08,
03505     0xA457, 0x4E0A, 0xA458, 0x4E2B, 0xA459, 0x4E38, 0xA45A, 0x51E1,
03506     0xA45B, 0x4E45, 0xA45C, 0x4E48, 0xA45D, 0x4E5F, 0xA45E, 0x4E5E,
03507     0xA45F, 0x4E8E, 0xA460, 0x4EA1, 0xA461, 0x5140, 0xA462, 0x5203,
03508     0xA463, 0x52FA, 0xA464, 0x5343, 0xA465, 0x53C9, 0xA466, 0x53E3,
03509     0xA467, 0x571F, 0xA468, 0x58EB, 0xA469, 0x5915, 0xA46A, 0x5927,
03510     0xA46B, 0x5973, 0xA46C, 0x5B50, 0xA46D, 0x5B51, 0xA46E, 0x5B53,
03511     0xA46F, 0x5BF8, 0xA470, 0x5C0F, 0xA471, 0x5C22, 0xA472, 0x5C38,
03512     0xA473, 0x5C71, 0xA474, 0x5DDD, 0xA475, 0x5DE5, 0xA476, 0x5DF1,
03513     0xA477, 0x5DF2, 0xA478, 0x5DF3, 0xA479, 0x5DFE, 0xA47A, 0x5E72,
03514     0xA47B, 0x5EFE, 0xA47C, 0x5F0B, 0xA47D, 0x5F13, 0xA47E, 0x624D,
03515     0xA4A1, 0x4E11, 0xA4A2, 0x4E10, 0xA4A3, 0x4E0D, 0xA4A4, 0x4E2D,
03516     0xA4A5, 0x4E30, 0xA4A6, 0x4E39, 0xA4A7, 0x4E4B, 0xA4A8, 0x5C39,
03517     0xA4A9, 0x4E88, 0xA4AA, 0x4E91, 0xA4AB, 0x4E95, 0xA4AC, 0x4E92,
03518     0xA4AD, 0x4E94, 0xA4AE, 0x4EA2, 0xA4AF, 0x4EC1, 0xA4B0, 0x4EC0,
03519     0xA4B1, 0x4EC3, 0xA4B2, 0x4EC6, 0xA4B3, 0x4EC7, 0xA4B4, 0x4ECD,
03520     0xA4B5, 0x4ECA, 0xA4B6, 0x4ECB, 0xA4B7, 0x4EC4, 0xA4B8, 0x5143,
03521     0xA4B9, 0x5141, 0xA4BA, 0x5167, 0xA4BB, 0x516D, 0xA4BC, 0x516E,
03522     0xA4BD, 0x516C, 0xA4BE, 0x5197, 0xA4BF, 0x51F6, 0xA4C0, 0x5206,
03523     0xA4C1, 0x5207, 0xA4C2, 0x5208, 0xA4C3, 0x52FB, 0xA4C4, 0x52FE,
03524     0xA4C5, 0x52FF, 0xA4C6, 0x5316, 0xA4C7, 0x5339, 0xA4C8, 0x5348,
03525     0xA4C9, 0x5347, 0xA4CA, 0x5345, 0xA4CB, 0x535E, 0xA4CC, 0x5384,
03526     0xA4CD, 0x53CB, 0xA4CE, 0x53CA, 0xA4CF, 0x53CD, 0xA4D0, 0x58EC,
03527     0xA4D1, 0x5929, 0xA4D2, 0x592B, 0xA4D3, 0x592A, 0xA4D4, 0x592D,
03528     0xA4D5, 0x5B54, 0xA4D6, 0x5C11, 0xA4D7, 0x5C24, 0xA4D8, 0x5C3A,
03529     0xA4D9, 0x5C6F, 0xA4DA, 0x5DF4, 0xA4DB, 0x5E7B, 0xA4DC, 0x5EFF,
03530     0xA4DD, 0x5F14, 0xA4DE, 0x5F15, 0xA4DF, 0x5FC3, 0xA4E0, 0x6208,
03531     0xA4E1, 0x6236, 0xA4E2, 0x624B, 0xA4E3, 0x624E, 0xA4E4, 0x652F,
03532     0xA4E5, 0x6587, 0xA4E6, 0x6597, 0xA4E7, 0x65A4, 0xA4E8, 0x65B9,
03533     0xA4E9, 0x65E5, 0xA4EA, 0x66F0, 0xA4EB, 0x6708, 0xA4EC, 0x6728,
03534     0xA4ED, 0x6B20, 0xA4EE, 0x6B62, 0xA4EF, 0x6B79, 0xA4F0, 0x6BCB,
03535     0xA4F1, 0x6BD4, 0xA4F2, 0x6BDB, 0xA4F3, 0x6C0F, 0xA4F4, 0x6C34,
03536     0xA4F5, 0x706B, 0xA4F6, 0x722A, 0xA4F7, 0x7236, 0xA4F8, 0x723B,
03537     0xA4F9, 0x7247, 0xA4FA, 0x7259, 0xA4FB, 0x725B, 0xA4FC, 0x72AC,
03538     0xA4FD, 0x738B, 0xA4FE, 0x4E19, 0xA540, 0x4E16, 0xA541, 0x4E15,
03539     0xA542, 0x4E14, 0xA543, 0x4E18, 0xA544, 0x4E3B, 0xA545, 0x4E4D,
03540     0xA546, 0x4E4F, 0xA547, 0x4E4E, 0xA548, 0x4EE5, 0xA549, 0x4ED8,
03541     0xA54A, 0x4ED4, 0xA54B, 0x4ED5, 0xA54C, 0x4ED6, 0xA54D, 0x4ED7,
03542     0xA54E, 0x4EE3, 0xA54F, 0x4EE4, 0xA550, 0x4ED9, 0xA551, 0x4EDE,
03543     0xA552, 0x5145, 0xA553, 0x5144, 0xA554, 0x5189, 0xA555, 0x518A,
03544     0xA556, 0x51AC, 0xA557, 0x51F9, 0xA558, 0x51FA, 0xA559, 0x51F8,
03545     0xA55A, 0x520A, 0xA55B, 0x52A0, 0xA55C, 0x529F, 0xA55D, 0x5305,
03546     0xA55E, 0x5306, 0xA55F, 0x5317, 0xA560, 0x531D, 0xA561, 0x4EDF,
03547     0xA562, 0x534A, 0xA563, 0x5349, 0xA564, 0x5361, 0xA565, 0x5360,
03548     0xA566, 0x536F, 0xA567, 0x536E, 0xA568, 0x53BB, 0xA569, 0x53EF,
03549     0xA56A, 0x53E4, 0xA56B, 0x53F3, 0xA56C, 0x53EC, 0xA56D, 0x53EE,
03550     0xA56E, 0x53E9, 0xA56F, 0x53E8, 0xA570, 0x53FC, 0xA571, 0x53F8,
03551     0xA572, 0x53F5, 0xA573, 0x53EB, 0xA574, 0x53E6, 0xA575, 0x53EA,
03552     0xA576, 0x53F2, 0xA577, 0x53F1, 0xA578, 0x53F0, 0xA579, 0x53E5,
03553     0xA57A, 0x53ED, 0xA57B, 0x53FB, 0xA57C, 0x56DB, 0xA57D, 0x56DA,
03554     0xA57E, 0x5916, 0xA5A1, 0x592E, 0xA5A2, 0x5931, 0xA5A3, 0x5974,
03555     0xA5A4, 0x5976, 0xA5A5, 0x5B55, 0xA5A6, 0x5B83, 0xA5A7, 0x5C3C,
03556     0xA5A8, 0x5DE8, 0xA5A9, 0x5DE7, 0xA5AA, 0x5DE6, 0xA5AB, 0x5E02,
03557     0xA5AC, 0x5E03, 0xA5AD, 0x5E73, 0xA5AE, 0x5E7C, 0xA5AF, 0x5F01,
03558     0xA5B0, 0x5F18, 0xA5B1, 0x5F17, 0xA5B2, 0x5FC5, 0xA5B3, 0x620A,
03559     0xA5B4, 0x6253, 0xA5B5, 0x6254, 0xA5B6, 0x6252, 0xA5B7, 0x6251,
03560     0xA5B8, 0x65A5, 0xA5B9, 0x65E6, 0xA5BA, 0x672E, 0xA5BB, 0x672C,
03561     0xA5BC, 0x672A, 0xA5BD, 0x672B, 0xA5BE, 0x672D, 0xA5BF, 0x6B63,
03562     0xA5C0, 0x6BCD, 0xA5C1, 0x6C11, 0xA5C2, 0x6C10, 0xA5C3, 0x6C38,
03563     0xA5C4, 0x6C41, 0xA5C5, 0x6C40, 0xA5C6, 0x6C3E, 0xA5C7, 0x72AF,
03564     0xA5C8, 0x7384, 0xA5C9, 0x7389, 0xA5CA, 0x74DC, 0xA5CB, 0x74E6,
03565     0xA5CC, 0x7518, 0xA5CD, 0x751F, 0xA5CE, 0x7528, 0xA5CF, 0x7529,
03566     0xA5D0, 0x7530, 0xA5D1, 0x7531, 0xA5D2, 0x7532, 0xA5D3, 0x7533,
03567     0xA5D4, 0x758B, 0xA5D5, 0x767D, 0xA5D6, 0x76AE, 0xA5D7, 0x76BF,
03568     0xA5D8, 0x76EE, 0xA5D9, 0x77DB, 0xA5DA, 0x77E2, 0xA5DB, 0x77F3,
03569     0xA5DC, 0x793A, 0xA5DD, 0x79BE, 0xA5DE, 0x7A74, 0xA5DF, 0x7ACB,
03570     0xA5E0, 0x4E1E, 0xA5E1, 0x4E1F, 0xA5E2, 0x4E52, 0xA5E3, 0x4E53,
03571     0xA5E4, 0x4E69, 0xA5E5, 0x4E99, 0xA5E6, 0x4EA4, 0xA5E7, 0x4EA6,
03572     0xA5E8, 0x4EA5, 0xA5E9, 0x4EFF, 0xA5EA, 0x4F09, 0xA5EB, 0x4F19,
03573     0xA5EC, 0x4F0A, 0xA5ED, 0x4F15, 0xA5EE, 0x4F0D, 0xA5EF, 0x4F10,
03574     0xA5F0, 0x4F11, 0xA5F1, 0x4F0F, 0xA5F2, 0x4EF2, 0xA5F3, 0x4EF6,
03575     0xA5F4, 0x4EFB, 0xA5F5, 0x4EF0, 0xA5F6, 0x4EF3, 0xA5F7, 0x4EFD,
03576     0xA5F8, 0x4F01, 0xA5F9, 0x4F0B, 0xA5FA, 0x5149, 0xA5FB, 0x5147,
03577     0xA5FC, 0x5146, 0xA5FD, 0x5148, 0xA5FE, 0x5168, 0xA640, 0x5171,
03578     0xA641, 0x518D, 0xA642, 0x51B0, 0xA643, 0x5217, 0xA644, 0x5211,
03579     0xA645, 0x5212, 0xA646, 0x520E, 0xA647, 0x5216, 0xA648, 0x52A3,
03580     0xA649, 0x5308, 0xA64A, 0x5321, 0xA64B, 0x5320, 0xA64C, 0x5370,
03581     0xA64D, 0x5371, 0xA64E, 0x5409, 0xA64F, 0x540F, 0xA650, 0x540C,
03582     0xA651, 0x540A, 0xA652, 0x5410, 0xA653, 0x5401, 0xA654, 0x540B,
03583     0xA655, 0x5404, 0xA656, 0x5411, 0xA657, 0x540D, 0xA658, 0x5408,
03584     0xA659, 0x5403, 0xA65A, 0x540E, 0xA65B, 0x5406, 0xA65C, 0x5412,
03585     0xA65D, 0x56E0, 0xA65E, 0x56DE, 0xA65F, 0x56DD, 0xA660, 0x5733,
03586     0xA661, 0x5730, 0xA662, 0x5728, 0xA663, 0x572D, 0xA664, 0x572C,
03587     0xA665, 0x572F, 0xA666, 0x5729, 0xA667, 0x5919, 0xA668, 0x591A,
03588     0xA669, 0x5937, 0xA66A, 0x5938, 0xA66B, 0x5984, 0xA66C, 0x5978,
03589     0xA66D, 0x5983, 0xA66E, 0x597D, 0xA66F, 0x5979, 0xA670, 0x5982,
03590     0xA671, 0x5981, 0xA672, 0x5B57, 0xA673, 0x5B58, 0xA674, 0x5B87,
03591     0xA675, 0x5B88, 0xA676, 0x5B85, 0xA677, 0x5B89, 0xA678, 0x5BFA,
03592     0xA679, 0x5C16, 0xA67A, 0x5C79, 0xA67B, 0x5DDE, 0xA67C, 0x5E06,
03593     0xA67D, 0x5E76, 0xA67E, 0x5E74, 0xA6A1, 0x5F0F, 0xA6A2, 0x5F1B,
03594     0xA6A3, 0x5FD9, 0xA6A4, 0x5FD6, 0xA6A5, 0x620E, 0xA6A6, 0x620C,
03595     0xA6A7, 0x620D, 0xA6A8, 0x6210, 0xA6A9, 0x6263, 0xA6AA, 0x625B,
03596     0xA6AB, 0x6258, 0xA6AC, 0x6536, 0xA6AD, 0x65E9, 0xA6AE, 0x65E8,
03597     0xA6AF, 0x65EC, 0xA6B0, 0x65ED, 0xA6B1, 0x66F2, 0xA6B2, 0x66F3,
03598     0xA6B3, 0x6709, 0xA6B4, 0x673D, 0xA6B5, 0x6734, 0xA6B6, 0x6731,
03599     0xA6B7, 0x6735, 0xA6B8, 0x6B21, 0xA6B9, 0x6B64, 0xA6BA, 0x6B7B,
03600     0xA6BB, 0x6C16, 0xA6BC, 0x6C5D, 0xA6BD, 0x6C57, 0xA6BE, 0x6C59,
03601     0xA6BF, 0x6C5F, 0xA6C0, 0x6C60, 0xA6C1, 0x6C50, 0xA6C2, 0x6C55,
03602     0xA6C3, 0x6C61, 0xA6C4, 0x6C5B, 0xA6C5, 0x6C4D, 0xA6C6, 0x6C4E,
03603     0xA6C7, 0x7070, 0xA6C8, 0x725F, 0xA6C9, 0x725D, 0xA6CA, 0x767E,
03604     0xA6CB, 0x7AF9, 0xA6CC, 0x7C73, 0xA6CD, 0x7CF8, 0xA6CE, 0x7F36,
03605     0xA6CF, 0x7F8A, 0xA6D0, 0x7FBD, 0xA6D1, 0x8001, 0xA6D2, 0x8003,
03606     0xA6D3, 0x800C, 0xA6D4, 0x8012, 0xA6D5, 0x8033, 0xA6D6, 0x807F,
03607     0xA6D7, 0x8089, 0xA6D8, 0x808B, 0xA6D9, 0x808C, 0xA6DA, 0x81E3,
03608     0xA6DB, 0x81EA, 0xA6DC, 0x81F3, 0xA6DD, 0x81FC, 0xA6DE, 0x820C,
03609     0xA6DF, 0x821B, 0xA6E0, 0x821F, 0xA6E1, 0x826E, 0xA6E2, 0x8272,
03610     0xA6E3, 0x827E, 0xA6E4, 0x866B, 0xA6E5, 0x8840, 0xA6E6, 0x884C,
03611     0xA6E7, 0x8863, 0xA6E8, 0x897F, 0xA6E9, 0x9621, 0xA6EA, 0x4E32,
03612     0xA6EB, 0x4EA8, 0xA6EC, 0x4F4D, 0xA6ED, 0x4F4F, 0xA6EE, 0x4F47,
03613     0xA6EF, 0x4F57, 0xA6F0, 0x4F5E, 0xA6F1, 0x4F34, 0xA6F2, 0x4F5B,
03614     0xA6F3, 0x4F55, 0xA6F4, 0x4F30, 0xA6F5, 0x4F50, 0xA6F6, 0x4F51,
03615     0xA6F7, 0x4F3D, 0xA6F8, 0x4F3A, 0xA6F9, 0x4F38, 0xA6FA, 0x4F43,
03616     0xA6FB, 0x4F54, 0xA6FC, 0x4F3C, 0xA6FD, 0x4F46, 0xA6FE, 0x4F63,
03617     0xA740, 0x4F5C, 0xA741, 0x4F60, 0xA742, 0x4F2F, 0xA743, 0x4F4E,
03618     0xA744, 0x4F36, 0xA745, 0x4F59, 0xA746, 0x4F5D, 0xA747, 0x4F48,
03619     0xA748, 0x4F5A, 0xA749, 0x514C, 0xA74A, 0x514B, 0xA74B, 0x514D,
03620     0xA74C, 0x5175, 0xA74D, 0x51B6, 0xA74E, 0x51B7, 0xA74F, 0x5225,
03621     0xA750, 0x5224, 0xA751, 0x5229, 0xA752, 0x522A, 0xA753, 0x5228,
03622     0xA754, 0x52AB, 0xA755, 0x52A9, 0xA756, 0x52AA, 0xA757, 0x52AC,
03623     0xA758, 0x5323, 0xA759, 0x5373, 0xA75A, 0x5375, 0xA75B, 0x541D,
03624     0xA75C, 0x542D, 0xA75D, 0x541E, 0xA75E, 0x543E, 0xA75F, 0x5426,
03625     0xA760, 0x544E, 0xA761, 0x5427, 0xA762, 0x5446, 0xA763, 0x5443,
03626     0xA764, 0x5433, 0xA765, 0x5448, 0xA766, 0x5442, 0xA767, 0x541B,
03627     0xA768, 0x5429, 0xA769, 0x544A, 0xA76A, 0x5439, 0xA76B, 0x543B,
03628     0xA76C, 0x5438, 0xA76D, 0x542E, 0xA76E, 0x5435, 0xA76F, 0x5436,
03629     0xA770, 0x5420, 0xA771, 0x543C, 0xA772, 0x5440, 0xA773, 0x5431,
03630     0xA774, 0x542B, 0xA775, 0x541F, 0xA776, 0x542C, 0xA777, 0x56EA,
03631     0xA778, 0x56F0, 0xA779, 0x56E4, 0xA77A, 0x56EB, 0xA77B, 0x574A,
03632     0xA77C, 0x5751, 0xA77D, 0x5740, 0xA77E, 0x574D, 0xA7A1, 0x5747,
03633     0xA7A2, 0x574E, 0xA7A3, 0x573E, 0xA7A4, 0x5750, 0xA7A5, 0x574F,
03634     0xA7A6, 0x573B, 0xA7A7, 0x58EF, 0xA7A8, 0x593E, 0xA7A9, 0x599D,
03635     0xA7AA, 0x5992, 0xA7AB, 0x59A8, 0xA7AC, 0x599E, 0xA7AD, 0x59A3,
03636     0xA7AE, 0x5999, 0xA7AF, 0x5996, 0xA7B0, 0x598D, 0xA7B1, 0x59A4,
03637     0xA7B2, 0x5993, 0xA7B3, 0x598A, 0xA7B4, 0x59A5, 0xA7B5, 0x5B5D,
03638     0xA7B6, 0x5B5C, 0xA7B7, 0x5B5A, 0xA7B8, 0x5B5B, 0xA7B9, 0x5B8C,
03639     0xA7BA, 0x5B8B, 0xA7BB, 0x5B8F, 0xA7BC, 0x5C2C, 0xA7BD, 0x5C40,
03640     0xA7BE, 0x5C41, 0xA7BF, 0x5C3F, 0xA7C0, 0x5C3E, 0xA7C1, 0x5C90,
03641     0xA7C2, 0x5C91, 0xA7C3, 0x5C94, 0xA7C4, 0x5C8C, 0xA7C5, 0x5DEB,
03642     0xA7C6, 0x5E0C, 0xA7C7, 0x5E8F, 0xA7C8, 0x5E87, 0xA7C9, 0x5E8A,
03643     0xA7CA, 0x5EF7, 0xA7CB, 0x5F04, 0xA7CC, 0x5F1F, 0xA7CD, 0x5F64,
03644     0xA7CE, 0x5F62, 0xA7CF, 0x5F77, 0xA7D0, 0x5F79, 0xA7D1, 0x5FD8,
03645     0xA7D2, 0x5FCC, 0xA7D3, 0x5FD7, 0xA7D4, 0x5FCD, 0xA7D5, 0x5FF1,
03646     0xA7D6, 0x5FEB, 0xA7D7, 0x5FF8, 0xA7D8, 0x5FEA, 0xA7D9, 0x6212,
03647     0xA7DA, 0x6211, 0xA7DB, 0x6284, 0xA7DC, 0x6297, 0xA7DD, 0x6296,
03648     0xA7DE, 0x6280, 0xA7DF, 0x6276, 0xA7E0, 0x6289, 0xA7E1, 0x626D,
03649     0xA7E2, 0x628A, 0xA7E3, 0x627C, 0xA7E4, 0x627E, 0xA7E5, 0x6279,
03650     0xA7E6, 0x6273, 0xA7E7, 0x6292, 0xA7E8, 0x626F, 0xA7E9, 0x6298,
03651     0xA7EA, 0x626E, 0xA7EB, 0x6295, 0xA7EC, 0x6293, 0xA7ED, 0x6291,
03652     0xA7EE, 0x6286, 0xA7EF, 0x6539, 0xA7F0, 0x653B, 0xA7F1, 0x6538,
03653     0xA7F2, 0x65F1, 0xA7F3, 0x66F4, 0xA7F4, 0x675F, 0xA7F5, 0x674E,
03654     0xA7F6, 0x674F, 0xA7F7, 0x6750, 0xA7F8, 0x6751, 0xA7F9, 0x675C,
03655     0xA7FA, 0x6756, 0xA7FB, 0x675E, 0xA7FC, 0x6749, 0xA7FD, 0x6746,
03656     0xA7FE, 0x6760, 0xA840, 0x6753, 0xA841, 0x6757, 0xA842, 0x6B65,
03657     0xA843, 0x6BCF, 0xA844, 0x6C42, 0xA845, 0x6C5E, 0xA846, 0x6C99,
03658     0xA847, 0x6C81, 0xA848, 0x6C88, 0xA849, 0x6C89, 0xA84A, 0x6C85,
03659     0xA84B, 0x6C9B, 0xA84C, 0x6C6A, 0xA84D, 0x6C7A, 0xA84E, 0x6C90,
03660     0xA84F, 0x6C70, 0xA850, 0x6C8C, 0xA851, 0x6C68, 0xA852, 0x6C96,
03661     0xA853, 0x6C92, 0xA854, 0x6C7D, 0xA855, 0x6C83, 0xA856, 0x6C72,
03662     0xA857, 0x6C7E, 0xA858, 0x6C74, 0xA859, 0x6C86, 0xA85A, 0x6C76,
03663     0xA85B, 0x6C8D, 0xA85C, 0x6C94, 0xA85D, 0x6C98, 0xA85E, 0x6C82,
03664     0xA85F, 0x7076, 0xA860, 0x707C, 0xA861, 0x707D, 0xA862, 0x7078,
03665     0xA863, 0x7262, 0xA864, 0x7261, 0xA865, 0x7260, 0xA866, 0x72C4,
03666     0xA867, 0x72C2, 0xA868, 0x7396, 0xA869, 0x752C, 0xA86A, 0x752B,
03667     0xA86B, 0x7537, 0xA86C, 0x7538, 0xA86D, 0x7682, 0xA86E, 0x76EF,
03668     0xA86F, 0x77E3, 0xA870, 0x79C1, 0xA871, 0x79C0, 0xA872, 0x79BF,
03669     0xA873, 0x7A76, 0xA874, 0x7CFB, 0xA875, 0x7F55, 0xA876, 0x8096,
03670     0xA877, 0x8093, 0xA878, 0x809D, 0xA879, 0x8098, 0xA87A, 0x809B,
03671     0xA87B, 0x809A, 0xA87C, 0x80B2, 0xA87D, 0x826F, 0xA87E, 0x8292,
03672     0xA8A1, 0x828B, 0xA8A2, 0x828D, 0xA8A3, 0x898B, 0xA8A4, 0x89D2,
03673     0xA8A5, 0x8A00, 0xA8A6, 0x8C37, 0xA8A7, 0x8C46, 0xA8A8, 0x8C55,
03674     0xA8A9, 0x8C9D, 0xA8AA, 0x8D64, 0xA8AB, 0x8D70, 0xA8AC, 0x8DB3,
03675     0xA8AD, 0x8EAB, 0xA8AE, 0x8ECA, 0xA8AF, 0x8F9B, 0xA8B0, 0x8FB0,
03676     0xA8B1, 0x8FC2, 0xA8B2, 0x8FC6, 0xA8B3, 0x8FC5, 0xA8B4, 0x8FC4,
03677     0xA8B5, 0x5DE1, 0xA8B6, 0x9091, 0xA8B7, 0x90A2, 0xA8B8, 0x90AA,
03678     0xA8B9, 0x90A6, 0xA8BA, 0x90A3, 0xA8BB, 0x9149, 0xA8BC, 0x91C6,
03679     0xA8BD, 0x91CC, 0xA8BE, 0x9632, 0xA8BF, 0x962E, 0xA8C0, 0x9631,
03680     0xA8C1, 0x962A, 0xA8C2, 0x962C, 0xA8C3, 0x4E26, 0xA8C4, 0x4E56,
03681     0xA8C5, 0x4E73, 0xA8C6, 0x4E8B, 0xA8C7, 0x4E9B, 0xA8C8, 0x4E9E,
03682     0xA8C9, 0x4EAB, 0xA8CA, 0x4EAC, 0xA8CB, 0x4F6F, 0xA8CC, 0x4F9D,
03683     0xA8CD, 0x4F8D, 0xA8CE, 0x4F73, 0xA8CF, 0x4F7F, 0xA8D0, 0x4F6C,
03684     0xA8D1, 0x4F9B, 0xA8D2, 0x4F8B, 0xA8D3, 0x4F86, 0xA8D4, 0x4F83,
03685     0xA8D5, 0x4F70, 0xA8D6, 0x4F75, 0xA8D7, 0x4F88, 0xA8D8, 0x4F69,
03686     0xA8D9, 0x4F7B, 0xA8DA, 0x4F96, 0xA8DB, 0x4F7E, 0xA8DC, 0x4F8F,
03687     0xA8DD, 0x4F91, 0xA8DE, 0x4F7A, 0xA8DF, 0x5154, 0xA8E0, 0x5152,
03688     0xA8E1, 0x5155, 0xA8E2, 0x5169, 0xA8E3, 0x5177, 0xA8E4, 0x5176,
03689     0xA8E5, 0x5178, 0xA8E6, 0x51BD, 0xA8E7, 0x51FD, 0xA8E8, 0x523B,
03690     0xA8E9, 0x5238, 0xA8EA, 0x5237, 0xA8EB, 0x523A, 0xA8EC, 0x5230,
03691     0xA8ED, 0x522E, 0xA8EE, 0x5236, 0xA8EF, 0x5241, 0xA8F0, 0x52BE,
03692     0xA8F1, 0x52BB, 0xA8F2, 0x5352, 0xA8F3, 0x5354, 0xA8F4, 0x5353,
03693     0xA8F5, 0x5351, 0xA8F6, 0x5366, 0xA8F7, 0x5377, 0xA8F8, 0x5378,
03694     0xA8F9, 0x5379, 0xA8FA, 0x53D6, 0xA8FB, 0x53D4, 0xA8FC, 0x53D7,
03695     0xA8FD, 0x5473, 0xA8FE, 0x5475, 0xA940, 0x5496, 0xA941, 0x5478,
03696     0xA942, 0x5495, 0xA943, 0x5480, 0xA944, 0x547B, 0xA945, 0x5477,
03697     0xA946, 0x5484, 0xA947, 0x5492, 0xA948, 0x5486, 0xA949, 0x547C,
03698     0xA94A, 0x5490, 0xA94B, 0x5471, 0xA94C, 0x5476, 0xA94D, 0x548C,
03699     0xA94E, 0x549A, 0xA94F, 0x5462, 0xA950, 0x5468, 0xA951, 0x548B,
03700     0xA952, 0x547D, 0xA953, 0x548E, 0xA954, 0x56FA, 0xA955, 0x5783,
03701     0xA956, 0x5777, 0xA957, 0x576A, 0xA958, 0x5769, 0xA959, 0x5761,
03702     0xA95A, 0x5766, 0xA95B, 0x5764, 0xA95C, 0x577C, 0xA95D, 0x591C,
03703     0xA95E, 0x5949, 0xA95F, 0x5947, 0xA960, 0x5948, 0xA961, 0x5944,
03704     0xA962, 0x5954, 0xA963, 0x59BE, 0xA964, 0x59BB, 0xA965, 0x59D4,
03705     0xA966, 0x59B9, 0xA967, 0x59AE, 0xA968, 0x59D1, 0xA969, 0x59C6,
03706     0xA96A, 0x59D0, 0xA96B, 0x59CD, 0xA96C, 0x59CB, 0xA96D, 0x59D3,
03707     0xA96E, 0x59CA, 0xA96F, 0x59AF, 0xA970, 0x59B3, 0xA971, 0x59D2,
03708     0xA972, 0x59C5, 0xA973, 0x5B5F, 0xA974, 0x5B64, 0xA975, 0x5B63,
03709     0xA976, 0x5B97, 0xA977, 0x5B9A, 0xA978, 0x5B98, 0xA979, 0x5B9C,
03710     0xA97A, 0x5B99, 0xA97B, 0x5B9B, 0xA97C, 0x5C1A, 0xA97D, 0x5C48,
03711     0xA97E, 0x5C45, 0xA9A1, 0x5C46, 0xA9A2, 0x5CB7, 0xA9A3, 0x5CA1,
03712     0xA9A4, 0x5CB8, 0xA9A5, 0x5CA9, 0xA9A6, 0x5CAB, 0xA9A7, 0x5CB1,
03713     0xA9A8, 0x5CB3, 0xA9A9, 0x5E18, 0xA9AA, 0x5E1A, 0xA9AB, 0x5E16,
03714     0xA9AC, 0x5E15, 0xA9AD, 0x5E1B, 0xA9AE, 0x5E11, 0xA9AF, 0x5E78,
03715     0xA9B0, 0x5E9A, 0xA9B1, 0x5E97, 0xA9B2, 0x5E9C, 0xA9B3, 0x5E95,
03716     0xA9B4, 0x5E96, 0xA9B5, 0x5EF6, 0xA9B6, 0x5F26, 0xA9B7, 0x5F27,
03717     0xA9B8, 0x5F29, 0xA9B9, 0x5F80, 0xA9BA, 0x5F81, 0xA9BB, 0x5F7F,
03718     0xA9BC, 0x5F7C, 0xA9BD, 0x5FDD, 0xA9BE, 0x5FE0, 0xA9BF, 0x5FFD,
03719     0xA9C0, 0x5FF5, 0xA9C1, 0x5FFF, 0xA9C2, 0x600F, 0xA9C3, 0x6014,
03720     0xA9C4, 0x602F, 0xA9C5, 0x6035, 0xA9C6, 0x6016, 0xA9C7, 0x602A,
03721     0xA9C8, 0x6015, 0xA9C9, 0x6021, 0xA9CA, 0x6027, 0xA9CB, 0x6029,
03722     0xA9CC, 0x602B, 0xA9CD, 0x601B, 0xA9CE, 0x6216, 0xA9CF, 0x6215,
03723     0xA9D0, 0x623F, 0xA9D1, 0x623E, 0xA9D2, 0x6240, 0xA9D3, 0x627F,
03724     0xA9D4, 0x62C9, 0xA9D5, 0x62CC, 0xA9D6, 0x62C4, 0xA9D7, 0x62BF,
03725     0xA9D8, 0x62C2, 0xA9D9, 0x62B9, 0xA9DA, 0x62D2, 0xA9DB, 0x62DB,
03726     0xA9DC, 0x62AB, 0xA9DD, 0x62D3, 0xA9DE, 0x62D4, 0xA9DF, 0x62CB,
03727     0xA9E0, 0x62C8, 0xA9E1, 0x62A8, 0xA9E2, 0x62BD, 0xA9E3, 0x62BC,
03728     0xA9E4, 0x62D0, 0xA9E5, 0x62D9, 0xA9E6, 0x62C7, 0xA9E7, 0x62CD,
03729     0xA9E8, 0x62B5, 0xA9E9, 0x62DA, 0xA9EA, 0x62B1, 0xA9EB, 0x62D8,
03730     0xA9EC, 0x62D6, 0xA9ED, 0x62D7, 0xA9EE, 0x62C6, 0xA9EF, 0x62AC,
03731     0xA9F0, 0x62CE, 0xA9F1, 0x653E, 0xA9F2, 0x65A7, 0xA9F3, 0x65BC,
03732     0xA9F4, 0x65FA, 0xA9F5, 0x6614, 0xA9F6, 0x6613, 0xA9F7, 0x660C,
03733     0xA9F8, 0x6606, 0xA9F9, 0x6602, 0xA9FA, 0x660E, 0xA9FB, 0x6600,
03734     0xA9FC, 0x660F, 0xA9FD, 0x6615, 0xA9FE, 0x660A, 0xAA40, 0x6607,
03735     0xAA41, 0x670D, 0xAA42, 0x670B, 0xAA43, 0x676D, 0xAA44, 0x678B,
03736     0xAA45, 0x6795, 0xAA46, 0x6771, 0xAA47, 0x679C, 0xAA48, 0x6773,
03737     0xAA49, 0x6777, 0xAA4A, 0x6787, 0xAA4B, 0x679D, 0xAA4C, 0x6797,
03738     0xAA4D, 0x676F, 0xAA4E, 0x6770, 0xAA4F, 0x677F, 0xAA50, 0x6789,
03739     0xAA51, 0x677E, 0xAA52, 0x6790, 0xAA53, 0x6775, 0xAA54, 0x679A,
03740     0xAA55, 0x6793, 0xAA56, 0x677C, 0xAA57, 0x676A, 0xAA58, 0x6772,
03741     0xAA59, 0x6B23, 0xAA5A, 0x6B66, 0xAA5B, 0x6B67, 0xAA5C, 0x6B7F,
03742     0xAA5D, 0x6C13, 0xAA5E, 0x6C1B, 0xAA5F, 0x6CE3, 0xAA60, 0x6CE8,
03743     0xAA61, 0x6CF3, 0xAA62, 0x6CB1, 0xAA63, 0x6CCC, 0xAA64, 0x6CE5,
03744     0xAA65, 0x6CB3, 0xAA66, 0x6CBD, 0xAA67, 0x6CBE, 0xAA68, 0x6CBC,
03745     0xAA69, 0x6CE2, 0xAA6A, 0x6CAB, 0xAA6B, 0x6CD5, 0xAA6C, 0x6CD3,
03746     0xAA6D, 0x6CB8, 0xAA6E, 0x6CC4, 0xAA6F, 0x6CB9, 0xAA70, 0x6CC1,
03747     0xAA71, 0x6CAE, 0xAA72, 0x6CD7, 0xAA73, 0x6CC5, 0xAA74, 0x6CF1,
03748     0xAA75, 0x6CBF, 0xAA76, 0x6CBB, 0xAA77, 0x6CE1, 0xAA78, 0x6CDB,
03749     0xAA79, 0x6CCA, 0xAA7A, 0x6CAC, 0xAA7B, 0x6CEF, 0xAA7C, 0x6CDC,
03750     0xAA7D, 0x6CD6, 0xAA7E, 0x6CE0, 0xAAA1, 0x7095, 0xAAA2, 0x708E,
03751     0xAAA3, 0x7092, 0xAAA4, 0x708A, 0xAAA5, 0x7099, 0xAAA6, 0x722C,
03752     0xAAA7, 0x722D, 0xAAA8, 0x7238, 0xAAA9, 0x7248, 0xAAAA, 0x7267,
03753     0xAAAB, 0x7269, 0xAAAC, 0x72C0, 0xAAAD, 0x72CE, 0xAAAE, 0x72D9,
03754     0xAAAF, 0x72D7, 0xAAB0, 0x72D0, 0xAAB1, 0x73A9, 0xAAB2, 0x73A8,
03755     0xAAB3, 0x739F, 0xAAB4, 0x73AB, 0xAAB5, 0x73A5, 0xAAB6, 0x753D,
03756     0xAAB7, 0x759D, 0xAAB8, 0x7599, 0xAAB9, 0x759A, 0xAABA, 0x7684,
03757     0xAABB, 0x76C2, 0xAABC, 0x76F2, 0xAABD, 0x76F4, 0xAABE, 0x77E5,
03758     0xAABF, 0x77FD, 0xAAC0, 0x793E, 0xAAC1, 0x7940, 0xAAC2, 0x7941,
03759     0xAAC3, 0x79C9, 0xAAC4, 0x79C8, 0xAAC5, 0x7A7A, 0xAAC6, 0x7A79,
03760     0xAAC7, 0x7AFA, 0xAAC8, 0x7CFE, 0xAAC9, 0x7F54, 0xAACA, 0x7F8C,
03761     0xAACB, 0x7F8B, 0xAACC, 0x8005, 0xAACD, 0x80BA, 0xAACE, 0x80A5,
03762     0xAACF, 0x80A2, 0xAAD0, 0x80B1, 0xAAD1, 0x80A1, 0xAAD2, 0x80AB,
03763     0xAAD3, 0x80A9, 0xAAD4, 0x80B4, 0xAAD5, 0x80AA, 0xAAD6, 0x80AF,
03764     0xAAD7, 0x81E5, 0xAAD8, 0x81FE, 0xAAD9, 0x820D, 0xAADA, 0x82B3,
03765     0xAADB, 0x829D, 0xAADC, 0x8299, 0xAADD, 0x82AD, 0xAADE, 0x82BD,
03766     0xAADF, 0x829F, 0xAAE0, 0x82B9, 0xAAE1, 0x82B1, 0xAAE2, 0x82AC,
03767     0xAAE3, 0x82A5, 0xAAE4, 0x82AF, 0xAAE5, 0x82B8, 0xAAE6, 0x82A3,
03768     0xAAE7, 0x82B0, 0xAAE8, 0x82BE, 0xAAE9, 0x82B7, 0xAAEA, 0x864E,
03769     0xAAEB, 0x8671, 0xAAEC, 0x521D, 0xAAED, 0x8868, 0xAAEE, 0x8ECB,
03770     0xAAEF, 0x8FCE, 0xAAF0, 0x8FD4, 0xAAF1, 0x8FD1, 0xAAF2, 0x90B5,
03771     0xAAF3, 0x90B8, 0xAAF4, 0x90B1, 0xAAF5, 0x90B6, 0xAAF6, 0x91C7,
03772     0xAAF7, 0x91D1, 0xAAF8, 0x9577, 0xAAF9, 0x9580, 0xAAFA, 0x961C,
03773     0xAAFB, 0x9640, 0xAAFC, 0x963F, 0xAAFD, 0x963B, 0xAAFE, 0x9644,
03774     0xAB40, 0x9642, 0xAB41, 0x96B9, 0xAB42, 0x96E8, 0xAB43, 0x9752,
03775     0xAB44, 0x975E, 0xAB45, 0x4E9F, 0xAB46, 0x4EAD, 0xAB47, 0x4EAE,
03776     0xAB48, 0x4FE1, 0xAB49, 0x4FB5, 0xAB4A, 0x4FAF, 0xAB4B, 0x4FBF,
03777     0xAB4C, 0x4FE0, 0xAB4D, 0x4FD1, 0xAB4E, 0x4FCF, 0xAB4F, 0x4FDD,
03778     0xAB50, 0x4FC3, 0xAB51, 0x4FB6, 0xAB52, 0x4FD8, 0xAB53, 0x4FDF,
03779     0xAB54, 0x4FCA, 0xAB55, 0x4FD7, 0xAB56, 0x4FAE, 0xAB57, 0x4FD0,
03780     0xAB58, 0x4FC4, 0xAB59, 0x4FC2, 0xAB5A, 0x4FDA, 0xAB5B, 0x4FCE,
03781     0xAB5C, 0x4FDE, 0xAB5D, 0x4FB7, 0xAB5E, 0x5157, 0xAB5F, 0x5192,
03782     0xAB60, 0x5191, 0xAB61, 0x51A0, 0xAB62, 0x524E, 0xAB63, 0x5243,
03783     0xAB64, 0x524A, 0xAB65, 0x524D, 0xAB66, 0x524C, 0xAB67, 0x524B,
03784     0xAB68, 0x5247, 0xAB69, 0x52C7, 0xAB6A, 0x52C9, 0xAB6B, 0x52C3,
03785     0xAB6C, 0x52C1, 0xAB6D, 0x530D, 0xAB6E, 0x5357, 0xAB6F, 0x537B,
03786     0xAB70, 0x539A, 0xAB71, 0x53DB, 0xAB72, 0x54AC, 0xAB73, 0x54C0,
03787     0xAB74, 0x54A8, 0xAB75, 0x54CE, 0xAB76, 0x54C9, 0xAB77, 0x54B8,
03788     0xAB78, 0x54A6, 0xAB79, 0x54B3, 0xAB7A, 0x54C7, 0xAB7B, 0x54C2,
03789     0xAB7C, 0x54BD, 0xAB7D, 0x54AA, 0xAB7E, 0x54C1, 0xABA1, 0x54C4,
03790     0xABA2, 0x54C8, 0xABA3, 0x54AF, 0xABA4, 0x54AB, 0xABA5, 0x54B1,
03791     0xABA6, 0x54BB, 0xABA7, 0x54A9, 0xABA8, 0x54A7, 0xABA9, 0x54BF,
03792     0xABAA, 0x56FF, 0xABAB, 0x5782, 0xABAC, 0x578B, 0xABAD, 0x57A0,
03793     0xABAE, 0x57A3, 0xABAF, 0x57A2, 0xABB0, 0x57CE, 0xABB1, 0x57AE,
03794     0xABB2, 0x5793, 0xABB3, 0x5955, 0xABB4, 0x5951, 0xABB5, 0x594F,
03795     0xABB6, 0x594E, 0xABB7, 0x5950, 0xABB8, 0x59DC, 0xABB9, 0x59D8,
03796     0xABBA, 0x59FF, 0xABBB, 0x59E3, 0xABBC, 0x59E8, 0xABBD, 0x5A03,
03797     0xABBE, 0x59E5, 0xABBF, 0x59EA, 0xABC0, 0x59DA, 0xABC1, 0x59E6,
03798     0xABC2, 0x5A01, 0xABC3, 0x59FB, 0xABC4, 0x5B69, 0xABC5, 0x5BA3,
03799     0xABC6, 0x5BA6, 0xABC7, 0x5BA4, 0xABC8, 0x5BA2, 0xABC9, 0x5BA5,
03800     0xABCA, 0x5C01, 0xABCB, 0x5C4E, 0xABCC, 0x5C4F, 0xABCD, 0x5C4D,
03801     0xABCE, 0x5C4B, 0xABCF, 0x5CD9, 0xABD0, 0x5CD2, 0xABD1, 0x5DF7,
03802     0xABD2, 0x5E1D, 0xABD3, 0x5E25, 0xABD4, 0x5E1F, 0xABD5, 0x5E7D,
03803     0xABD6, 0x5EA0, 0xABD7, 0x5EA6, 0xABD8, 0x5EFA, 0xABD9, 0x5F08,
03804     0xABDA, 0x5F2D, 0xABDB, 0x5F65, 0xABDC, 0x5F88, 0xABDD, 0x5F85,
03805     0xABDE, 0x5F8A, 0xABDF, 0x5F8B, 0xABE0, 0x5F87, 0xABE1, 0x5F8C,
03806     0xABE2, 0x5F89, 0xABE3, 0x6012, 0xABE4, 0x601D, 0xABE5, 0x6020,
03807     0xABE6, 0x6025, 0xABE7, 0x600E, 0xABE8, 0x6028, 0xABE9, 0x604D,
03808     0xABEA, 0x6070, 0xABEB, 0x6068, 0xABEC, 0x6062, 0xABED, 0x6046,
03809     0xABEE, 0x6043, 0xABEF, 0x606C, 0xABF0, 0x606B, 0xABF1, 0x606A,
03810     0xABF2, 0x6064, 0xABF3, 0x6241, 0xABF4, 0x62DC, 0xABF5, 0x6316,
03811     0xABF6, 0x6309, 0xABF7, 0x62FC, 0xABF8, 0x62ED, 0xABF9, 0x6301,
03812     0xABFA, 0x62EE, 0xABFB, 0x62FD, 0xABFC, 0x6307, 0xABFD, 0x62F1,
03813     0xABFE, 0x62F7, 0xAC40, 0x62EF, 0xAC41, 0x62EC, 0xAC42, 0x62FE,
03814     0xAC43, 0x62F4, 0xAC44, 0x6311, 0xAC45, 0x6302, 0xAC46, 0x653F,
03815     0xAC47, 0x6545, 0xAC48, 0x65AB, 0xAC49, 0x65BD, 0xAC4A, 0x65E2,
03816     0xAC4B, 0x6625, 0xAC4C, 0x662D, 0xAC4D, 0x6620, 0xAC4E, 0x6627,
03817     0xAC4F, 0x662F, 0xAC50, 0x661F, 0xAC51, 0x6628, 0xAC52, 0x6631,
03818     0xAC53, 0x6624, 0xAC54, 0x66F7, 0xAC55, 0x67FF, 0xAC56, 0x67D3,
03819     0xAC57, 0x67F1, 0xAC58, 0x67D4, 0xAC59, 0x67D0, 0xAC5A, 0x67EC,
03820     0xAC5B, 0x67B6, 0xAC5C, 0x67AF, 0xAC5D, 0x67F5, 0xAC5E, 0x67E9,
03821     0xAC5F, 0x67EF, 0xAC60, 0x67C4, 0xAC61, 0x67D1, 0xAC62, 0x67B4,
03822     0xAC63, 0x67DA, 0xAC64, 0x67E5, 0xAC65, 0x67B8, 0xAC66, 0x67CF,
03823     0xAC67, 0x67DE, 0xAC68, 0x67F3, 0xAC69, 0x67B0, 0xAC6A, 0x67D9,
03824     0xAC6B, 0x67E2, 0xAC6C, 0x67DD, 0xAC6D, 0x67D2, 0xAC6E, 0x6B6A,
03825     0xAC6F, 0x6B83, 0xAC70, 0x6B86, 0xAC71, 0x6BB5, 0xAC72, 0x6BD2,
03826     0xAC73, 0x6BD7, 0xAC74, 0x6C1F, 0xAC75, 0x6CC9, 0xAC76, 0x6D0B,
03827     0xAC77, 0x6D32, 0xAC78, 0x6D2A, 0xAC79, 0x6D41, 0xAC7A, 0x6D25,
03828     0xAC7B, 0x6D0C, 0xAC7C, 0x6D31, 0xAC7D, 0x6D1E, 0xAC7E, 0x6D17,
03829     0xACA1, 0x6D3B, 0xACA2, 0x6D3D, 0xACA3, 0x6D3E, 0xACA4, 0x6D36,
03830     0xACA5, 0x6D1B, 0xACA6, 0x6CF5, 0xACA7, 0x6D39, 0xACA8, 0x6D27,
03831     0xACA9, 0x6D38, 0xACAA, 0x6D29, 0xACAB, 0x6D2E, 0xACAC, 0x6D35,
03832     0xACAD, 0x6D0E, 0xACAE, 0x6D2B, 0xACAF, 0x70AB, 0xACB0, 0x70BA,
03833     0xACB1, 0x70B3, 0xACB2, 0x70AC, 0xACB3, 0x70AF, 0xACB4, 0x70AD,
03834     0xACB5, 0x70B8, 0xACB6, 0x70AE, 0xACB7, 0x70A4, 0xACB8, 0x7230,
03835     0xACB9, 0x7272, 0xACBA, 0x726F, 0xACBB, 0x7274, 0xACBC, 0x72E9,
03836     0xACBD, 0x72E0, 0xACBE, 0x72E1, 0xACBF, 0x73B7, 0xACC0, 0x73CA,
03837     0xACC1, 0x73BB, 0xACC2, 0x73B2, 0xACC3, 0x73CD, 0xACC4, 0x73C0,
03838     0xACC5, 0x73B3, 0xACC6, 0x751A, 0xACC7, 0x752D, 0xACC8, 0x754F,
03839     0xACC9, 0x754C, 0xACCA, 0x754E, 0xACCB, 0x754B, 0xACCC, 0x75AB,
03840     0xACCD, 0x75A4, 0xACCE, 0x75A5, 0xACCF, 0x75A2, 0xACD0, 0x75A3,
03841     0xACD1, 0x7678, 0xACD2, 0x7686, 0xACD3, 0x7687, 0xACD4, 0x7688,
03842     0xACD5, 0x76C8, 0xACD6, 0x76C6, 0xACD7, 0x76C3, 0xACD8, 0x76C5,
03843     0xACD9, 0x7701, 0xACDA, 0x76F9, 0xACDB, 0x76F8, 0xACDC, 0x7709,
03844     0xACDD, 0x770B, 0xACDE, 0x76FE, 0xACDF, 0x76FC, 0xACE0, 0x7707,
03845     0xACE1, 0x77DC, 0xACE2, 0x7802, 0xACE3, 0x7814, 0xACE4, 0x780C,
03846     0xACE5, 0x780D, 0xACE6, 0x7946, 0xACE7, 0x7949, 0xACE8, 0x7948,
03847     0xACE9, 0x7947, 0xACEA, 0x79B9, 0xACEB, 0x79BA, 0xACEC, 0x79D1,
03848     0xACED, 0x79D2, 0xACEE, 0x79CB, 0xACEF, 0x7A7F, 0xACF0, 0x7A81,
03849     0xACF1, 0x7AFF, 0xACF2, 0x7AFD, 0xACF3, 0x7C7D, 0xACF4, 0x7D02,
03850     0xACF5, 0x7D05, 0xACF6, 0x7D00, 0xACF7, 0x7D09, 0xACF8, 0x7D07,
03851     0xACF9, 0x7D04, 0xACFA, 0x7D06, 0xACFB, 0x7F38, 0xACFC, 0x7F8E,
03852     0xACFD, 0x7FBF, 0xACFE, 0x8004, 0xAD40, 0x8010, 0xAD41, 0x800D,
03853     0xAD42, 0x8011, 0xAD43, 0x8036, 0xAD44, 0x80D6, 0xAD45, 0x80E5,
03854     0xAD46, 0x80DA, 0xAD47, 0x80C3, 0xAD48, 0x80C4, 0xAD49, 0x80CC,
03855     0xAD4A, 0x80E1, 0xAD4B, 0x80DB, 0xAD4C, 0x80CE, 0xAD4D, 0x80DE,
03856     0xAD4E, 0x80E4, 0xAD4F, 0x80DD, 0xAD50, 0x81F4, 0xAD51, 0x8222,
03857     0xAD52, 0x82E7, 0xAD53, 0x8303, 0xAD54, 0x8305, 0xAD55, 0x82E3,
03858     0xAD56, 0x82DB, 0xAD57, 0x82E6, 0xAD58, 0x8304, 0xAD59, 0x82E5,
03859     0xAD5A, 0x8302, 0xAD5B, 0x8309, 0xAD5C, 0x82D2, 0xAD5D, 0x82D7,
03860     0xAD5E, 0x82F1, 0xAD5F, 0x8301, 0xAD60, 0x82DC, 0xAD61, 0x82D4,
03861     0xAD62, 0x82D1, 0xAD63, 0x82DE, 0xAD64, 0x82D3, 0xAD65, 0x82DF,
03862     0xAD66, 0x82EF, 0xAD67, 0x8306, 0xAD68, 0x8650, 0xAD69, 0x8679,
03863     0xAD6A, 0x867B, 0xAD6B, 0x867A, 0xAD6C, 0x884D, 0xAD6D, 0x886B,
03864     0xAD6E, 0x8981, 0xAD6F, 0x89D4, 0xAD70, 0x8A08, 0xAD71, 0x8A02,
03865     0xAD72, 0x8A03, 0xAD73, 0x8C9E, 0xAD74, 0x8CA0, 0xAD75, 0x8D74,
03866     0xAD76, 0x8D73, 0xAD77, 0x8DB4, 0xAD78, 0x8ECD, 0xAD79, 0x8ECC,
03867     0xAD7A, 0x8FF0, 0xAD7B, 0x8FE6, 0xAD7C, 0x8FE2, 0xAD7D, 0x8FEA,
03868     0xAD7E, 0x8FE5, 0xADA1, 0x8FED, 0xADA2, 0x8FEB, 0xADA3, 0x8FE4,
03869     0xADA4, 0x8FE8, 0xADA5, 0x90CA, 0xADA6, 0x90CE, 0xADA7, 0x90C1,
03870     0xADA8, 0x90C3, 0xADA9, 0x914B, 0xADAA, 0x914A, 0xADAB, 0x91CD,
03871     0xADAC, 0x9582, 0xADAD, 0x9650, 0xADAE, 0x964B, 0xADAF, 0x964C,
03872     0xADB0, 0x964D, 0xADB1, 0x9762, 0xADB2, 0x9769, 0xADB3, 0x97CB,
03873     0xADB4, 0x97ED, 0xADB5, 0x97F3, 0xADB6, 0x9801, 0xADB7, 0x98A8,
03874     0xADB8, 0x98DB, 0xADB9, 0x98DF, 0xADBA, 0x9996, 0xADBB, 0x9999,
03875     0xADBC, 0x4E58, 0xADBD, 0x4EB3, 0xADBE, 0x500C, 0xADBF, 0x500D,
03876     0xADC0, 0x5023, 0xADC1, 0x4FEF, 0xADC2, 0x5026, 0xADC3, 0x5025,
03877     0xADC4, 0x4FF8, 0xADC5, 0x5029, 0xADC6, 0x5016, 0xADC7, 0x5006,
03878     0xADC8, 0x503C, 0xADC9, 0x501F, 0xADCA, 0x501A, 0xADCB, 0x5012,
03879     0xADCC, 0x5011, 0xADCD, 0x4FFA, 0xADCE, 0x5000, 0xADCF, 0x5014,
03880     0xADD0, 0x5028, 0xADD1, 0x4FF1, 0xADD2, 0x5021, 0xADD3, 0x500B,
03881     0xADD4, 0x5019, 0xADD5, 0x5018, 0xADD6, 0x4FF3, 0xADD7, 0x4FEE,
03882     0xADD8, 0x502D, 0xADD9, 0x502A, 0xADDA, 0x4FFE, 0xADDB, 0x502B,
03883     0xADDC, 0x5009, 0xADDD, 0x517C, 0xADDE, 0x51A4, 0xADDF, 0x51A5,
03884     0xADE0, 0x51A2, 0xADE1, 0x51CD, 0xADE2, 0x51CC, 0xADE3, 0x51C6,
03885     0xADE4, 0x51CB, 0xADE5, 0x5256, 0xADE6, 0x525C, 0xADE7, 0x5254,
03886     0xADE8, 0x525B, 0xADE9, 0x525D, 0xADEA, 0x532A, 0xADEB, 0x537F,
03887     0xADEC, 0x539F, 0xADED, 0x539D, 0xADEE, 0x53DF, 0xADEF, 0x54E8,
03888     0xADF0, 0x5510, 0xADF1, 0x5501, 0xADF2, 0x5537, 0xADF3, 0x54FC,
03889     0xADF4, 0x54E5, 0xADF5, 0x54F2, 0xADF6, 0x5506, 0xADF7, 0x54FA,
03890     0xADF8, 0x5514, 0xADF9, 0x54E9, 0xADFA, 0x54ED, 0xADFB, 0x54E1,
03891     0xADFC, 0x5509, 0xADFD, 0x54EE, 0xADFE, 0x54EA, 0xAE40, 0x54E6,
03892     0xAE41, 0x5527, 0xAE42, 0x5507, 0xAE43, 0x54FD, 0xAE44, 0x550F,
03893     0xAE45, 0x5703, 0xAE46, 0x5704, 0xAE47, 0x57C2, 0xAE48, 0x57D4,
03894     0xAE49, 0x57CB, 0xAE4A, 0x57C3, 0xAE4B, 0x5809, 0xAE4C, 0x590F,
03895     0xAE4D, 0x5957, 0xAE4E, 0x5958, 0xAE4F, 0x595A, 0xAE50, 0x5A11,
03896     0xAE51, 0x5A18, 0xAE52, 0x5A1C, 0xAE53, 0x5A1F, 0xAE54, 0x5A1B,
03897     0xAE55, 0x5A13, 0xAE56, 0x59EC, 0xAE57, 0x5A20, 0xAE58, 0x5A23,
03898     0xAE59, 0x5A29, 0xAE5A, 0x5A25, 0xAE5B, 0x5A0C, 0xAE5C, 0x5A09,
03899     0xAE5D, 0x5B6B, 0xAE5E, 0x5C58, 0xAE5F, 0x5BB0, 0xAE60, 0x5BB3,
03900     0xAE61, 0x5BB6, 0xAE62, 0x5BB4, 0xAE63, 0x5BAE, 0xAE64, 0x5BB5,
03901     0xAE65, 0x5BB9, 0xAE66, 0x5BB8, 0xAE67, 0x5C04, 0xAE68, 0x5C51,
03902     0xAE69, 0x5C55, 0xAE6A, 0x5C50, 0xAE6B, 0x5CED, 0xAE6C, 0x5CFD,
03903     0xAE6D, 0x5CFB, 0xAE6E, 0x5CEA, 0xAE6F, 0x5CE8, 0xAE70, 0x5CF0,
03904     0xAE71, 0x5CF6, 0xAE72, 0x5D01, 0xAE73, 0x5CF4, 0xAE74, 0x5DEE,
03905     0xAE75, 0x5E2D, 0xAE76, 0x5E2B, 0xAE77, 0x5EAB, 0xAE78, 0x5EAD,
03906     0xAE79, 0x5EA7, 0xAE7A, 0x5F31, 0xAE7B, 0x5F92, 0xAE7C, 0x5F91,
03907     0xAE7D, 0x5F90, 0xAE7E, 0x6059, 0xAEA1, 0x6063, 0xAEA2, 0x6065,
03908     0xAEA3, 0x6050, 0xAEA4, 0x6055, 0xAEA5, 0x606D, 0xAEA6, 0x6069,
03909     0xAEA7, 0x606F, 0xAEA8, 0x6084, 0xAEA9, 0x609F, 0xAEAA, 0x609A,
03910     0xAEAB, 0x608D, 0xAEAC, 0x6094, 0xAEAD, 0x608C, 0xAEAE, 0x6085,
03911     0xAEAF, 0x6096, 0xAEB0, 0x6247, 0xAEB1, 0x62F3, 0xAEB2, 0x6308,
03912     0xAEB3, 0x62FF, 0xAEB4, 0x634E, 0xAEB5, 0x633E, 0xAEB6, 0x632F,
03913     0xAEB7, 0x6355, 0xAEB8, 0x6342, 0xAEB9, 0x6346, 0xAEBA, 0x634F,
03914     0xAEBB, 0x6349, 0xAEBC, 0x633A, 0xAEBD, 0x6350, 0xAEBE, 0x633D,
03915     0xAEBF, 0x632A, 0xAEC0, 0x632B, 0xAEC1, 0x6328, 0xAEC2, 0x634D,
03916     0xAEC3, 0x634C, 0xAEC4, 0x6548, 0xAEC5, 0x6549, 0xAEC6, 0x6599,
03917     0xAEC7, 0x65C1, 0xAEC8, 0x65C5, 0xAEC9, 0x6642, 0xAECA, 0x6649,
03918     0xAECB, 0x664F, 0xAECC, 0x6643, 0xAECD, 0x6652, 0xAECE, 0x664C,
03919     0xAECF, 0x6645, 0xAED0, 0x6641, 0xAED1, 0x66F8, 0xAED2, 0x6714,
03920     0xAED3, 0x6715, 0xAED4, 0x6717, 0xAED5, 0x6821, 0xAED6, 0x6838,
03921     0xAED7, 0x6848, 0xAED8, 0x6846, 0xAED9, 0x6853, 0xAEDA, 0x6839,
03922     0xAEDB, 0x6842, 0xAEDC, 0x6854, 0xAEDD, 0x6829, 0xAEDE, 0x68B3,
03923     0xAEDF, 0x6817, 0xAEE0, 0x684C, 0xAEE1, 0x6851, 0xAEE2, 0x683D,
03924     0xAEE3, 0x67F4, 0xAEE4, 0x6850, 0xAEE5, 0x6840, 0xAEE6, 0x683C,
03925     0xAEE7, 0x6843, 0xAEE8, 0x682A, 0xAEE9, 0x6845, 0xAEEA, 0x6813,
03926     0xAEEB, 0x6818, 0xAEEC, 0x6841, 0xAEED, 0x6B8A, 0xAEEE, 0x6B89,
03927     0xAEEF, 0x6BB7, 0xAEF0, 0x6C23, 0xAEF1, 0x6C27, 0xAEF2, 0x6C28,
03928     0xAEF3, 0x6C26, 0xAEF4, 0x6C24, 0xAEF5, 0x6CF0, 0xAEF6, 0x6D6A,
03929     0xAEF7, 0x6D95, 0xAEF8, 0x6D88, 0xAEF9, 0x6D87, 0xAEFA, 0x6D66,
03930     0xAEFB, 0x6D78, 0xAEFC, 0x6D77, 0xAEFD, 0x6D59, 0xAEFE, 0x6D93,
03931     0xAF40, 0x6D6C, 0xAF41, 0x6D89, 0xAF42, 0x6D6E, 0xAF43, 0x6D5A,
03932     0xAF44, 0x6D74, 0xAF45, 0x6D69, 0xAF46, 0x6D8C, 0xAF47, 0x6D8A,
03933     0xAF48, 0x6D79, 0xAF49, 0x6D85, 0xAF4A, 0x6D65, 0xAF4B, 0x6D94,
03934     0xAF4C, 0x70CA, 0xAF4D, 0x70D8, 0xAF4E, 0x70E4, 0xAF4F, 0x70D9,
03935     0xAF50, 0x70C8, 0xAF51, 0x70CF, 0xAF52, 0x7239, 0xAF53, 0x7279,
03936     0xAF54, 0x72FC, 0xAF55, 0x72F9, 0xAF56, 0x72FD, 0xAF57, 0x72F8,
03937     0xAF58, 0x72F7, 0xAF59, 0x7386, 0xAF5A, 0x73ED, 0xAF5B, 0x7409,
03938     0xAF5C, 0x73EE, 0xAF5D, 0x73E0, 0xAF5E, 0x73EA, 0xAF5F, 0x73DE,
03939     0xAF60, 0x7554, 0xAF61, 0x755D, 0xAF62, 0x755C, 0xAF63, 0x755A,
03940     0xAF64, 0x7559, 0xAF65, 0x75BE, 0xAF66, 0x75C5, 0xAF67, 0x75C7,
03941     0xAF68, 0x75B2, 0xAF69, 0x75B3, 0xAF6A, 0x75BD, 0xAF6B, 0x75BC,
03942     0xAF6C, 0x75B9, 0xAF6D, 0x75C2, 0xAF6E, 0x75B8, 0xAF6F, 0x768B,
03943     0xAF70, 0x76B0, 0xAF71, 0x76CA, 0xAF72, 0x76CD, 0xAF73, 0x76CE,
03944     0xAF74, 0x7729, 0xAF75, 0x771F, 0xAF76, 0x7720, 0xAF77, 0x7728,
03945     0xAF78, 0x77E9, 0xAF79, 0x7830, 0xAF7A, 0x7827, 0xAF7B, 0x7838,
03946     0xAF7C, 0x781D, 0xAF7D, 0x7834, 0xAF7E, 0x7837, 0xAFA1, 0x7825,
03947     0xAFA2, 0x782D, 0xAFA3, 0x7820, 0xAFA4, 0x781F, 0xAFA5, 0x7832,
03948     0xAFA6, 0x7955, 0xAFA7, 0x7950, 0xAFA8, 0x7960, 0xAFA9, 0x795F,
03949     0xAFAA, 0x7956, 0xAFAB, 0x795E, 0xAFAC, 0x795D, 0xAFAD, 0x7957,
03950     0xAFAE, 0x795A, 0xAFAF, 0x79E4, 0xAFB0, 0x79E3, 0xAFB1, 0x79E7,
03951     0xAFB2, 0x79DF, 0xAFB3, 0x79E6, 0xAFB4, 0x79E9, 0xAFB5, 0x79D8,
03952     0xAFB6, 0x7A84, 0xAFB7, 0x7A88, 0xAFB8, 0x7AD9, 0xAFB9, 0x7B06,
03953     0xAFBA, 0x7B11, 0xAFBB, 0x7C89, 0xAFBC, 0x7D21, 0xAFBD, 0x7D17,
03954     0xAFBE, 0x7D0B, 0xAFBF, 0x7D0A, 0xAFC0, 0x7D20, 0xAFC1, 0x7D22,
03955     0xAFC2, 0x7D14, 0xAFC3, 0x7D10, 0xAFC4, 0x7D15, 0xAFC5, 0x7D1A,
03956     0xAFC6, 0x7D1C, 0xAFC7, 0x7D0D, 0xAFC8, 0x7D19, 0xAFC9, 0x7D1B,
03957     0xAFCA, 0x7F3A, 0xAFCB, 0x7F5F, 0xAFCC, 0x7F94, 0xAFCD, 0x7FC5,
03958     0xAFCE, 0x7FC1, 0xAFCF, 0x8006, 0xAFD0, 0x8018, 0xAFD1, 0x8015,
03959     0xAFD2, 0x8019, 0xAFD3, 0x8017, 0xAFD4, 0x803D, 0xAFD5, 0x803F,
03960     0xAFD6, 0x80F1, 0xAFD7, 0x8102, 0xAFD8, 0x80F0, 0xAFD9, 0x8105,
03961     0xAFDA, 0x80ED, 0xAFDB, 0x80F4, 0xAFDC, 0x8106, 0xAFDD, 0x80F8,
03962     0xAFDE, 0x80F3, 0xAFDF, 0x8108, 0xAFE0, 0x80FD, 0xAFE1, 0x810A,
03963     0xAFE2, 0x80FC, 0xAFE3, 0x80EF, 0xAFE4, 0x81ED, 0xAFE5, 0x81EC,
03964     0xAFE6, 0x8200, 0xAFE7, 0x8210, 0xAFE8, 0x822A, 0xAFE9, 0x822B,
03965     0xAFEA, 0x8228, 0xAFEB, 0x822C, 0xAFEC, 0x82BB, 0xAFED, 0x832B,
03966     0xAFEE, 0x8352, 0xAFEF, 0x8354, 0xAFF0, 0x834A, 0xAFF1, 0x8338,
03967     0xAFF2, 0x8350, 0xAFF3, 0x8349, 0xAFF4, 0x8335, 0xAFF5, 0x8334,
03968     0xAFF6, 0x834F, 0xAFF7, 0x8332, 0xAFF8, 0x8339, 0xAFF9, 0x8336,
03969     0xAFFA, 0x8317, 0xAFFB, 0x8340, 0xAFFC, 0x8331, 0xAFFD, 0x8328,
03970     0xAFFE, 0x8343, 0xB040, 0x8654, 0xB041, 0x868A, 0xB042, 0x86AA,
03971     0xB043, 0x8693, 0xB044, 0x86A4, 0xB045, 0x86A9, 0xB046, 0x868C,
03972     0xB047, 0x86A3, 0xB048, 0x869C, 0xB049, 0x8870, 0xB04A, 0x8877,
03973     0xB04B, 0x8881, 0xB04C, 0x8882, 0xB04D, 0x887D, 0xB04E, 0x8879,
03974     0xB04F, 0x8A18, 0xB050, 0x8A10, 0xB051, 0x8A0E, 0xB052, 0x8A0C,
03975     0xB053, 0x8A15, 0xB054, 0x8A0A, 0xB055, 0x8A17, 0xB056, 0x8A13,
03976     0xB057, 0x8A16, 0xB058, 0x8A0F, 0xB059, 0x8A11, 0xB05A, 0x8C48,
03977     0xB05B, 0x8C7A, 0xB05C, 0x8C79, 0xB05D, 0x8CA1, 0xB05E, 0x8CA2,
03978     0xB05F, 0x8D77, 0xB060, 0x8EAC, 0xB061, 0x8ED2, 0xB062, 0x8ED4,
03979     0xB063, 0x8ECF, 0xB064, 0x8FB1, 0xB065, 0x9001, 0xB066, 0x9006,
03980     0xB067, 0x8FF7, 0xB068, 0x9000, 0xB069, 0x8FFA, 0xB06A, 0x8FF4,
03981     0xB06B, 0x9003, 0xB06C, 0x8FFD, 0xB06D, 0x9005, 0xB06E, 0x8FF8,
03982     0xB06F, 0x9095, 0xB070, 0x90E1, 0xB071, 0x90DD, 0xB072, 0x90E2,
03983     0xB073, 0x9152, 0xB074, 0x914D, 0xB075, 0x914C, 0xB076, 0x91D8,
03984     0xB077, 0x91DD, 0xB078, 0x91D7, 0xB079, 0x91DC, 0xB07A, 0x91D9,
03985     0xB07B, 0x9583, 0xB07C, 0x9662, 0xB07D, 0x9663, 0xB07E, 0x9661,
03986     0xB0A1, 0x965B, 0xB0A2, 0x965D, 0xB0A3, 0x9664, 0xB0A4, 0x9658,
03987     0xB0A5, 0x965E, 0xB0A6, 0x96BB, 0xB0A7, 0x98E2, 0xB0A8, 0x99AC,
03988     0xB0A9, 0x9AA8, 0xB0AA, 0x9AD8, 0xB0AB, 0x9B25, 0xB0AC, 0x9B32,
03989     0xB0AD, 0x9B3C, 0xB0AE, 0x4E7E, 0xB0AF, 0x507A, 0xB0B0, 0x507D,
03990     0xB0B1, 0x505C, 0xB0B2, 0x5047, 0xB0B3, 0x5043, 0xB0B4, 0x504C,
03991     0xB0B5, 0x505A, 0xB0B6, 0x5049, 0xB0B7, 0x5065, 0xB0B8, 0x5076,
03992     0xB0B9, 0x504E, 0xB0BA, 0x5055, 0xB0BB, 0x5075, 0xB0BC, 0x5074,
03993     0xB0BD, 0x5077, 0xB0BE, 0x504F, 0xB0BF, 0x500F, 0xB0C0, 0x506F,
03994     0xB0C1, 0x506D, 0xB0C2, 0x515C, 0xB0C3, 0x5195, 0xB0C4, 0x51F0,
03995     0xB0C5, 0x526A, 0xB0C6, 0x526F, 0xB0C7, 0x52D2, 0xB0C8, 0x52D9,
03996     0xB0C9, 0x52D8, 0xB0CA, 0x52D5, 0xB0CB, 0x5310, 0xB0CC, 0x530F,
03997     0xB0CD, 0x5319, 0xB0CE, 0x533F, 0xB0CF, 0x5340, 0xB0D0, 0x533E,
03998     0xB0D1, 0x53C3, 0xB0D2, 0x66FC, 0xB0D3, 0x5546, 0xB0D4, 0x556A,
03999     0xB0D5, 0x5566, 0xB0D6, 0x5544, 0xB0D7, 0x555E, 0xB0D8, 0x5561,
04000     0xB0D9, 0x5543, 0xB0DA, 0x554A, 0xB0DB, 0x5531, 0xB0DC, 0x5556,
04001     0xB0DD, 0x554F, 0xB0DE, 0x5555, 0xB0DF, 0x552F, 0xB0E0, 0x5564,
04002     0xB0E1, 0x5538, 0xB0E2, 0x552E, 0xB0E3, 0x555C, 0xB0E4, 0x552C,
04003     0xB0E5, 0x5563, 0xB0E6, 0x5533, 0xB0E7, 0x5541, 0xB0E8, 0x5557,
04004     0xB0E9, 0x5708, 0xB0EA, 0x570B, 0xB0EB, 0x5709, 0xB0EC, 0x57DF,
04005     0xB0ED, 0x5805, 0xB0EE, 0x580A, 0xB0EF, 0x5806, 0xB0F0, 0x57E0,
04006     0xB0F1, 0x57E4, 0xB0F2, 0x57FA, 0xB0F3, 0x5802, 0xB0F4, 0x5835,
04007     0xB0F5, 0x57F7, 0xB0F6, 0x57F9, 0xB0F7, 0x5920, 0xB0F8, 0x5962,
04008     0xB0F9, 0x5A36, 0xB0FA, 0x5A41, 0xB0FB, 0x5A49, 0xB0FC, 0x5A66,
04009     0xB0FD, 0x5A6A, 0xB0FE, 0x5A40, 0xB140, 0x5A3C, 0xB141, 0x5A62,
04010     0xB142, 0x5A5A, 0xB143, 0x5A46, 0xB144, 0x5A4A, 0xB145, 0x5B70,
04011     0xB146, 0x5BC7, 0xB147, 0x5BC5, 0xB148, 0x5BC4, 0xB149, 0x5BC2,
04012     0xB14A, 0x5BBF, 0xB14B, 0x5BC6, 0xB14C, 0x5C09, 0xB14D, 0x5C08,
04013     0xB14E, 0x5C07, 0xB14F, 0x5C60, 0xB150, 0x5C5C, 0xB151, 0x5C5D,
04014     0xB152, 0x5D07, 0xB153, 0x5D06, 0xB154, 0x5D0E, 0xB155, 0x5D1B,
04015     0xB156, 0x5D16, 0xB157, 0x5D22, 0xB158, 0x5D11, 0xB159, 0x5D29,
04016     0xB15A, 0x5D14, 0xB15B, 0x5D19, 0xB15C, 0x5D24, 0xB15D, 0x5D27,
04017     0xB15E, 0x5D17, 0xB15F, 0x5DE2, 0xB160, 0x5E38, 0xB161, 0x5E36,
04018     0xB162, 0x5E33, 0xB163, 0x5E37, 0xB164, 0x5EB7, 0xB165, 0x5EB8,
04019     0xB166, 0x5EB6, 0xB167, 0x5EB5, 0xB168, 0x5EBE, 0xB169, 0x5F35,
04020     0xB16A, 0x5F37, 0xB16B, 0x5F57, 0xB16C, 0x5F6C, 0xB16D, 0x5F69,
04021     0xB16E, 0x5F6B, 0xB16F, 0x5F97, 0xB170, 0x5F99, 0xB171, 0x5F9E,
04022     0xB172, 0x5F98, 0xB173, 0x5FA1, 0xB174, 0x5FA0, 0xB175, 0x5F9C,
04023     0xB176, 0x607F, 0xB177, 0x60A3, 0xB178, 0x6089, 0xB179, 0x60A0,
04024     0xB17A, 0x60A8, 0xB17B, 0x60CB, 0xB17C, 0x60B4, 0xB17D, 0x60E6,
04025     0xB17E, 0x60BD, 0xB1A1, 0x60C5, 0xB1A2, 0x60BB, 0xB1A3, 0x60B5,
04026     0xB1A4, 0x60DC, 0xB1A5, 0x60BC, 0xB1A6, 0x60D8, 0xB1A7, 0x60D5,
04027     0xB1A8, 0x60C6, 0xB1A9, 0x60DF, 0xB1AA, 0x60B8, 0xB1AB, 0x60DA,
04028     0xB1AC, 0x60C7, 0xB1AD, 0x621A, 0xB1AE, 0x621B, 0xB1AF, 0x6248,
04029     0xB1B0, 0x63A0, 0xB1B1, 0x63A7, 0xB1B2, 0x6372, 0xB1B3, 0x6396,
04030     0xB1B4, 0x63A2, 0xB1B5, 0x63A5, 0xB1B6, 0x6377, 0xB1B7, 0x6367,
04031     0xB1B8, 0x6398, 0xB1B9, 0x63AA, 0xB1BA, 0x6371, 0xB1BB, 0x63A9,
04032     0xB1BC, 0x6389, 0xB1BD, 0x6383, 0xB1BE, 0x639B, 0xB1BF, 0x636B,
04033     0xB1C0, 0x63A8, 0xB1C1, 0x6384, 0xB1C2, 0x6388, 0xB1C3, 0x6399,
04034     0xB1C4, 0x63A1, 0xB1C5, 0x63AC, 0xB1C6, 0x6392, 0xB1C7, 0x638F,
04035     0xB1C8, 0x6380, 0xB1C9, 0x637B, 0xB1CA, 0x6369, 0xB1CB, 0x6368,
04036     0xB1CC, 0x637A, 0xB1CD, 0x655D, 0xB1CE, 0x6556, 0xB1CF, 0x6551,
04037     0xB1D0, 0x6559, 0xB1D1, 0x6557, 0xB1D2, 0x555F, 0xB1D3, 0x654F,
04038     0xB1D4, 0x6558, 0xB1D5, 0x6555, 0xB1D6, 0x6554, 0xB1D7, 0x659C,
04039     0xB1D8, 0x659B, 0xB1D9, 0x65AC, 0xB1DA, 0x65CF, 0xB1DB, 0x65CB,
04040     0xB1DC, 0x65CC, 0xB1DD, 0x65CE, 0xB1DE, 0x665D, 0xB1DF, 0x665A,
04041     0xB1E0, 0x6664, 0xB1E1, 0x6668, 0xB1E2, 0x6666, 0xB1E3, 0x665E,
04042     0xB1E4, 0x66F9, 0xB1E5, 0x52D7, 0xB1E6, 0x671B, 0xB1E7, 0x6881,
04043     0xB1E8, 0x68AF, 0xB1E9, 0x68A2, 0xB1EA, 0x6893, 0xB1EB, 0x68B5,
04044     0xB1EC, 0x687F, 0xB1ED, 0x6876, 0xB1EE, 0x68B1, 0xB1EF, 0x68A7,
04045     0xB1F0, 0x6897, 0xB1F1, 0x68B0, 0xB1F2, 0x6883, 0xB1F3, 0x68C4,
04046     0xB1F4, 0x68AD, 0xB1F5, 0x6886, 0xB1F6, 0x6885, 0xB1F7, 0x6894,
04047     0xB1F8, 0x689D, 0xB1F9, 0x68A8, 0xB1FA, 0x689F, 0xB1FB, 0x68A1,
04048     0xB1FC, 0x6882, 0xB1FD, 0x6B32, 0xB1FE, 0x6BBA, 0xB240, 0x6BEB,
04049     0xB241, 0x6BEC, 0xB242, 0x6C2B, 0xB243, 0x6D8E, 0xB244, 0x6DBC,
04050     0xB245, 0x6DF3, 0xB246, 0x6DD9, 0xB247, 0x6DB2, 0xB248, 0x6DE1,
04051     0xB249, 0x6DCC, 0xB24A, 0x6DE4, 0xB24B, 0x6DFB, 0xB24C, 0x6DFA,
04052     0xB24D, 0x6E05, 0xB24E, 0x6DC7, 0xB24F, 0x6DCB, 0xB250, 0x6DAF,
04053     0xB251, 0x6DD1, 0xB252, 0x6DAE, 0xB253, 0x6DDE, 0xB254, 0x6DF9,
04054     0xB255, 0x6DB8, 0xB256, 0x6DF7, 0xB257, 0x6DF5, 0xB258, 0x6DC5,
04055     0xB259, 0x6DD2, 0xB25A, 0x6E1A, 0xB25B, 0x6DB5, 0xB25C, 0x6DDA,
04056     0xB25D, 0x6DEB, 0xB25E, 0x6DD8, 0xB25F, 0x6DEA, 0xB260, 0x6DF1,
04057     0xB261, 0x6DEE, 0xB262, 0x6DE8, 0xB263, 0x6DC6, 0xB264, 0x6DC4,
04058     0xB265, 0x6DAA, 0xB266, 0x6DEC, 0xB267, 0x6DBF, 0xB268, 0x6DE6,
04059     0xB269, 0x70F9, 0xB26A, 0x7109, 0xB26B, 0x710A, 0xB26C, 0x70FD,
04060     0xB26D, 0x70EF, 0xB26E, 0x723D, 0xB26F, 0x727D, 0xB270, 0x7281,
04061     0xB271, 0x731C, 0xB272, 0x731B, 0xB273, 0x7316, 0xB274, 0x7313,
04062     0xB275, 0x7319, 0xB276, 0x7387, 0xB277, 0x7405, 0xB278, 0x740A,
04063     0xB279, 0x7403, 0xB27A, 0x7406, 0xB27B, 0x73FE, 0xB27C, 0x740D,
04064     0xB27D, 0x74E0, 0xB27E, 0x74F6, 0xB2A1, 0x74F7, 0xB2A2, 0x751C,
04065     0xB2A3, 0x7522, 0xB2A4, 0x7565, 0xB2A5, 0x7566, 0xB2A6, 0x7562,
04066     0xB2A7, 0x7570, 0xB2A8, 0x758F, 0xB2A9, 0x75D4, 0xB2AA, 0x75D5,
04067     0xB2AB, 0x75B5, 0xB2AC, 0x75CA, 0xB2AD, 0x75CD, 0xB2AE, 0x768E,
04068     0xB2AF, 0x76D4, 0xB2B0, 0x76D2, 0xB2B1, 0x76DB, 0xB2B2, 0x7737,
04069     0xB2B3, 0x773E, 0xB2B4, 0x773C, 0xB2B5, 0x7736, 0xB2B6, 0x7738,
04070     0xB2B7, 0x773A, 0xB2B8, 0x786B, 0xB2B9, 0x7843, 0xB2BA, 0x784E,
04071     0xB2BB, 0x7965, 0xB2BC, 0x7968, 0xB2BD, 0x796D, 0xB2BE, 0x79FB,
04072     0xB2BF, 0x7A92, 0xB2C0, 0x7A95, 0xB2C1, 0x7B20, 0xB2C2, 0x7B28,
04073     0xB2C3, 0x7B1B, 0xB2C4, 0x7B2C, 0xB2C5, 0x7B26, 0xB2C6, 0x7B19,
04074     0xB2C7, 0x7B1E, 0xB2C8, 0x7B2E, 0xB2C9, 0x7C92, 0xB2CA, 0x7C97,
04075     0xB2CB, 0x7C95, 0xB2CC, 0x7D46, 0xB2CD, 0x7D43, 0xB2CE, 0x7D71,
04076     0xB2CF, 0x7D2E, 0xB2D0, 0x7D39, 0xB2D1, 0x7D3C, 0xB2D2, 0x7D40,
04077     0xB2D3, 0x7D30, 0xB2D4, 0x7D33, 0xB2D5, 0x7D44, 0xB2D6, 0x7D2F,
04078     0xB2D7, 0x7D42, 0xB2D8, 0x7D32, 0xB2D9, 0x7D31, 0xB2DA, 0x7F3D,
04079     0xB2DB, 0x7F9E, 0xB2DC, 0x7F9A, 0xB2DD, 0x7FCC, 0xB2DE, 0x7FCE,
04080     0xB2DF, 0x7FD2, 0xB2E0, 0x801C, 0xB2E1, 0x804A, 0xB2E2, 0x8046,
04081     0xB2E3, 0x812F, 0xB2E4, 0x8116, 0xB2E5, 0x8123, 0xB2E6, 0x812B,
04082     0xB2E7, 0x8129, 0xB2E8, 0x8130, 0xB2E9, 0x8124, 0xB2EA, 0x8202,
04083     0xB2EB, 0x8235, 0xB2EC, 0x8237, 0xB2ED, 0x8236, 0xB2EE, 0x8239,
04084     0xB2EF, 0x838E, 0xB2F0, 0x839E, 0xB2F1, 0x8398, 0xB2F2, 0x8378,
04085     0xB2F3, 0x83A2, 0xB2F4, 0x8396, 0xB2F5, 0x83BD, 0xB2F6, 0x83AB,
04086     0xB2F7, 0x8392, 0xB2F8, 0x838A, 0xB2F9, 0x8393, 0xB2FA, 0x8389,
04087     0xB2FB, 0x83A0, 0xB2FC, 0x8377, 0xB2FD, 0x837B, 0xB2FE, 0x837C,
04088     0xB340, 0x8386, 0xB341, 0x83A7, 0xB342, 0x8655, 0xB343, 0x5F6A,
04089     0xB344, 0x86C7, 0xB345, 0x86C0, 0xB346, 0x86B6, 0xB347, 0x86C4,
04090     0xB348, 0x86B5, 0xB349, 0x86C6, 0xB34A, 0x86CB, 0xB34B, 0x86B1,
04091     0xB34C, 0x86AF, 0xB34D, 0x86C9, 0xB34E, 0x8853, 0xB34F, 0x889E,
04092     0xB350, 0x8888, 0xB351, 0x88AB, 0xB352, 0x8892, 0xB353, 0x8896,
04093     0xB354, 0x888D, 0xB355, 0x888B, 0xB356, 0x8993, 0xB357, 0x898F,
04094     0xB358, 0x8A2A, 0xB359, 0x8A1D, 0xB35A, 0x8A23, 0xB35B, 0x8A25,
04095     0xB35C, 0x8A31, 0xB35D, 0x8A2D, 0xB35E, 0x8A1F, 0xB35F, 0x8A1B,
04096     0xB360, 0x8A22, 0xB361, 0x8C49, 0xB362, 0x8C5A, 0xB363, 0x8CA9,
04097     0xB364, 0x8CAC, 0xB365, 0x8CAB, 0xB366, 0x8CA8, 0xB367, 0x8CAA,
04098     0xB368, 0x8CA7, 0xB369, 0x8D67, 0xB36A, 0x8D66, 0xB36B, 0x8DBE,
04099     0xB36C, 0x8DBA, 0xB36D, 0x8EDB, 0xB36E, 0x8EDF, 0xB36F, 0x9019,
04100     0xB370, 0x900D, 0xB371, 0x901A, 0xB372, 0x9017, 0xB373, 0x9023,
04101     0xB374, 0x901F, 0xB375, 0x901D, 0xB376, 0x9010, 0xB377, 0x9015,
04102     0xB378, 0x901E, 0xB379, 0x9020, 0xB37A, 0x900F, 0xB37B, 0x9022,
04103     0xB37C, 0x9016, 0xB37D, 0x901B, 0xB37E, 0x9014, 0xB3A1, 0x90E8,
04104     0xB3A2, 0x90ED, 0xB3A3, 0x90FD, 0xB3A4, 0x9157, 0xB3A5, 0x91CE,
04105     0xB3A6, 0x91F5, 0xB3A7, 0x91E6, 0xB3A8, 0x91E3, 0xB3A9, 0x91E7,
04106     0xB3AA, 0x91ED, 0xB3AB, 0x91E9, 0xB3AC, 0x9589, 0xB3AD, 0x966A,
04107     0xB3AE, 0x9675, 0xB3AF, 0x9673, 0xB3B0, 0x9678, 0xB3B1, 0x9670,
04108     0xB3B2, 0x9674, 0xB3B3, 0x9676, 0xB3B4, 0x9677, 0xB3B5, 0x966C,
04109     0xB3B6, 0x96C0, 0xB3B7, 0x96EA, 0xB3B8, 0x96E9, 0xB3B9, 0x7AE0,
04110     0xB3BA, 0x7ADF, 0xB3BB, 0x9802, 0xB3BC, 0x9803, 0xB3BD, 0x9B5A,
04111     0xB3BE, 0x9CE5, 0xB3BF, 0x9E75, 0xB3C0, 0x9E7F, 0xB3C1, 0x9EA5,
04112     0xB3C2, 0x9EBB, 0xB3C3, 0x50A2, 0xB3C4, 0x508D, 0xB3C5, 0x5085,
04113     0xB3C6, 0x5099, 0xB3C7, 0x5091, 0xB3C8, 0x5080, 0xB3C9, 0x5096,
04114     0xB3CA, 0x5098, 0xB3CB, 0x509A, 0xB3CC, 0x6700, 0xB3CD, 0x51F1,
04115     0xB3CE, 0x5272, 0xB3CF, 0x5274, 0xB3D0, 0x5275, 0xB3D1, 0x5269,
04116     0xB3D2, 0x52DE, 0xB3D3, 0x52DD, 0xB3D4, 0x52DB, 0xB3D5, 0x535A,
04117     0xB3D6, 0x53A5, 0xB3D7, 0x557B, 0xB3D8, 0x5580, 0xB3D9, 0x55A7,
04118     0xB3DA, 0x557C, 0xB3DB, 0x558A, 0xB3DC, 0x559D, 0xB3DD, 0x5598,
04119     0xB3DE, 0x5582, 0xB3DF, 0x559C, 0xB3E0, 0x55AA, 0xB3E1, 0x5594,
04120     0xB3E2, 0x5587, 0xB3E3, 0x558B, 0xB3E4, 0x5583, 0xB3E5, 0x55B3,
04121     0xB3E6, 0x55AE, 0xB3E7, 0x559F, 0xB3E8, 0x553E, 0xB3E9, 0x55B2,
04122     0xB3EA, 0x559A, 0xB3EB, 0x55BB, 0xB3EC, 0x55AC, 0xB3ED, 0x55B1,
04123     0xB3EE, 0x557E, 0xB3EF, 0x5589, 0xB3F0, 0x55AB, 0xB3F1, 0x5599,
04124     0xB3F2, 0x570D, 0xB3F3, 0x582F, 0xB3F4, 0x582A, 0xB3F5, 0x5834,
04125     0xB3F6, 0x5824, 0xB3F7, 0x5830, 0xB3F8, 0x5831, 0xB3F9, 0x5821,
04126     0xB3FA, 0x581D, 0xB3FB, 0x5820, 0xB3FC, 0x58F9, 0xB3FD, 0x58FA,
04127     0xB3FE, 0x5960, 0xB440, 0x5A77, 0xB441, 0x5A9A, 0xB442, 0x5A7F,
04128     0xB443, 0x5A92, 0xB444, 0x5A9B, 0xB445, 0x5AA7, 0xB446, 0x5B73,
04129     0xB447, 0x5B71, 0xB448, 0x5BD2, 0xB449, 0x5BCC, 0xB44A, 0x5BD3,
04130     0xB44B, 0x5BD0, 0xB44C, 0x5C0A, 0xB44D, 0x5C0B, 0xB44E, 0x5C31,
04131     0xB44F, 0x5D4C, 0xB450, 0x5D50, 0xB451, 0x5D34, 0xB452, 0x5D47,
04132     0xB453, 0x5DFD, 0xB454, 0x5E45, 0xB455, 0x5E3D, 0xB456, 0x5E40,
04133     0xB457, 0x5E43, 0xB458, 0x5E7E, 0xB459, 0x5ECA, 0xB45A, 0x5EC1,
04134     0xB45B, 0x5EC2, 0xB45C, 0x5EC4, 0xB45D, 0x5F3C, 0xB45E, 0x5F6D,
04135     0xB45F, 0x5FA9, 0xB460, 0x5FAA, 0xB461, 0x5FA8, 0xB462, 0x60D1,
04136     0xB463, 0x60E1, 0xB464, 0x60B2, 0xB465, 0x60B6, 0xB466, 0x60E0,
04137     0xB467, 0x611C, 0xB468, 0x6123, 0xB469, 0x60FA, 0xB46A, 0x6115,
04138     0xB46B, 0x60F0, 0xB46C, 0x60FB, 0xB46D, 0x60F4, 0xB46E, 0x6168,
04139     0xB46F, 0x60F1, 0xB470, 0x610E, 0xB471, 0x60F6, 0xB472, 0x6109,
04140     0xB473, 0x6100, 0xB474, 0x6112, 0xB475, 0x621F, 0xB476, 0x6249,
04141     0xB477, 0x63A3, 0xB478, 0x638C, 0xB479, 0x63CF, 0xB47A, 0x63C0,
04142     0xB47B, 0x63E9, 0xB47C, 0x63C9, 0xB47D, 0x63C6, 0xB47E, 0x63CD,
04143     0xB4A1, 0x63D2, 0xB4A2, 0x63E3, 0xB4A3, 0x63D0, 0xB4A4, 0x63E1,
04144     0xB4A5, 0x63D6, 0xB4A6, 0x63ED, 0xB4A7, 0x63EE, 0xB4A8, 0x6376,
04145     0xB4A9, 0x63F4, 0xB4AA, 0x63EA, 0xB4AB, 0x63DB, 0xB4AC, 0x6452,
04146     0xB4AD, 0x63DA, 0xB4AE, 0x63F9, 0xB4AF, 0x655E, 0xB4B0, 0x6566,
04147     0xB4B1, 0x6562, 0xB4B2, 0x6563, 0xB4B3, 0x6591, 0xB4B4, 0x6590,
04148     0xB4B5, 0x65AF, 0xB4B6, 0x666E, 0xB4B7, 0x6670, 0xB4B8, 0x6674,
04149     0xB4B9, 0x6676, 0xB4BA, 0x666F, 0xB4BB, 0x6691, 0xB4BC, 0x667A,
04150     0xB4BD, 0x667E, 0xB4BE, 0x6677, 0xB4BF, 0x66FE, 0xB4C0, 0x66FF,
04151     0xB4C1, 0x671F, 0xB4C2, 0x671D, 0xB4C3, 0x68FA, 0xB4C4, 0x68D5,
04152     0xB4C5, 0x68E0, 0xB4C6, 0x68D8, 0xB4C7, 0x68D7, 0xB4C8, 0x6905,
04153     0xB4C9, 0x68DF, 0xB4CA, 0x68F5, 0xB4CB, 0x68EE, 0xB4CC, 0x68E7,
04154     0xB4CD, 0x68F9, 0xB4CE, 0x68D2, 0xB4CF, 0x68F2, 0xB4D0, 0x68E3,
04155     0xB4D1, 0x68CB, 0xB4D2, 0x68CD, 0xB4D3, 0x690D, 0xB4D4, 0x6912,
04156     0xB4D5, 0x690E, 0xB4D6, 0x68C9, 0xB4D7, 0x68DA, 0xB4D8, 0x696E,
04157     0xB4D9, 0x68FB, 0xB4DA, 0x6B3E, 0xB4DB, 0x6B3A, 0xB4DC, 0x6B3D,
04158     0xB4DD, 0x6B98, 0xB4DE, 0x6B96, 0xB4DF, 0x6BBC, 0xB4E0, 0x6BEF,
04159     0xB4E1, 0x6C2E, 0xB4E2, 0x6C2F, 0xB4E3, 0x6C2C, 0xB4E4, 0x6E2F,
04160     0xB4E5, 0x6E38, 0xB4E6, 0x6E54, 0xB4E7, 0x6E21, 0xB4E8, 0x6E32,
04161     0xB4E9, 0x6E67, 0xB4EA, 0x6E4A, 0xB4EB, 0x6E20, 0xB4EC, 0x6E25,
04162     0xB4ED, 0x6E23, 0xB4EE, 0x6E1B, 0xB4EF, 0x6E5B, 0xB4F0, 0x6E58,
04163     0xB4F1, 0x6E24, 0xB4F2, 0x6E56, 0xB4F3, 0x6E6E, 0xB4F4, 0x6E2D,
04164     0xB4F5, 0x6E26, 0xB4F6, 0x6E6F, 0xB4F7, 0x6E34, 0xB4F8, 0x6E4D,
04165     0xB4F9, 0x6E3A, 0xB4FA, 0x6E2C, 0xB4FB, 0x6E43, 0xB4FC, 0x6E1D,
04166     0xB4FD, 0x6E3E, 0xB4FE, 0x6ECB, 0xB540, 0x6E89, 0xB541, 0x6E19,
04167     0xB542, 0x6E4E, 0xB543, 0x6E63, 0xB544, 0x6E44, 0xB545, 0x6E72,
04168     0xB546, 0x6E69, 0xB547, 0x6E5F, 0xB548, 0x7119, 0xB549, 0x711A,
04169     0xB54A, 0x7126, 0xB54B, 0x7130, 0xB54C, 0x7121, 0xB54D, 0x7136,
04170     0xB54E, 0x716E, 0xB54F, 0x711C, 0xB550, 0x724C, 0xB551, 0x7284,
04171     0xB552, 0x7280, 0xB553, 0x7336, 0xB554, 0x7325, 0xB555, 0x7334,
04172     0xB556, 0x7329, 0xB557, 0x743A, 0xB558, 0x742A, 0xB559, 0x7433,
04173     0xB55A, 0x7422, 0xB55B, 0x7425, 0xB55C, 0x7435, 0xB55D, 0x7436,
04174     0xB55E, 0x7434, 0xB55F, 0x742F, 0xB560, 0x741B, 0xB561, 0x7426,
04175     0xB562, 0x7428, 0xB563, 0x7525, 0xB564, 0x7526, 0xB565, 0x756B,
04176     0xB566, 0x756A, 0xB567, 0x75E2, 0xB568, 0x75DB, 0xB569, 0x75E3,
04177     0xB56A, 0x75D9, 0xB56B, 0x75D8, 0xB56C, 0x75DE, 0xB56D, 0x75E0,
04178     0xB56E, 0x767B, 0xB56F, 0x767C, 0xB570, 0x7696, 0xB571, 0x7693,
04179     0xB572, 0x76B4, 0xB573, 0x76DC, 0xB574, 0x774F, 0xB575, 0x77ED,
04180     0xB576, 0x785D, 0xB577, 0x786C, 0xB578, 0x786F, 0xB579, 0x7A0D,
04181     0xB57A, 0x7A08, 0xB57B, 0x7A0B, 0xB57C, 0x7A05, 0xB57D, 0x7A00,
04182     0xB57E, 0x7A98, 0xB5A1, 0x7A97, 0xB5A2, 0x7A96, 0xB5A3, 0x7AE5,
04183     0xB5A4, 0x7AE3, 0xB5A5, 0x7B49, 0xB5A6, 0x7B56, 0xB5A7, 0x7B46,
04184     0xB5A8, 0x7B50, 0xB5A9, 0x7B52, 0xB5AA, 0x7B54, 0xB5AB, 0x7B4D,
04185     0xB5AC, 0x7B4B, 0xB5AD, 0x7B4F, 0xB5AE, 0x7B51, 0xB5AF, 0x7C9F,
04186     0xB5B0, 0x7CA5, 0xB5B1, 0x7D5E, 0xB5B2, 0x7D50, 0xB5B3, 0x7D68,
04187     0xB5B4, 0x7D55, 0xB5B5, 0x7D2B, 0xB5B6, 0x7D6E, 0xB5B7, 0x7D72,
04188     0xB5B8, 0x7D61, 0xB5B9, 0x7D66, 0xB5BA, 0x7D62, 0xB5BB, 0x7D70,
04189     0xB5BC, 0x7D73, 0xB5BD, 0x5584, 0xB5BE, 0x7FD4, 0xB5BF, 0x7FD5,
04190     0xB5C0, 0x800B, 0xB5C1, 0x8052, 0xB5C2, 0x8085, 0xB5C3, 0x8155,
04191     0xB5C4, 0x8154, 0xB5C5, 0x814B, 0xB5C6, 0x8151, 0xB5C7, 0x814E,
04192     0xB5C8, 0x8139, 0xB5C9, 0x8146, 0xB5CA, 0x813E, 0xB5CB, 0x814C,
04193     0xB5CC, 0x8153, 0xB5CD, 0x8174, 0xB5CE, 0x8212, 0xB5CF, 0x821C,
04194     0xB5D0, 0x83E9, 0xB5D1, 0x8403, 0xB5D2, 0x83F8, 0xB5D3, 0x840D,
04195     0xB5D4, 0x83E0, 0xB5D5, 0x83C5, 0xB5D6, 0x840B, 0xB5D7, 0x83C1,
04196     0xB5D8, 0x83EF, 0xB5D9, 0x83F1, 0xB5DA, 0x83F4, 0xB5DB, 0x8457,
04197     0xB5DC, 0x840A, 0xB5DD, 0x83F0, 0xB5DE, 0x840C, 0xB5DF, 0x83CC,
04198     0xB5E0, 0x83FD, 0xB5E1, 0x83F2, 0xB5E2, 0x83CA, 0xB5E3, 0x8438,
04199     0xB5E4, 0x840E, 0xB5E5, 0x8404, 0xB5E6, 0x83DC, 0xB5E7, 0x8407,
04200     0xB5E8, 0x83D4, 0xB5E9, 0x83DF, 0xB5EA, 0x865B, 0xB5EB, 0x86DF,
04201     0xB5EC, 0x86D9, 0xB5ED, 0x86ED, 0xB5EE, 0x86D4, 0xB5EF, 0x86DB,
04202     0xB5F0, 0x86E4, 0xB5F1, 0x86D0, 0xB5F2, 0x86DE, 0xB5F3, 0x8857,
04203     0xB5F4, 0x88C1, 0xB5F5, 0x88C2, 0xB5F6, 0x88B1, 0xB5F7, 0x8983,
04204     0xB5F8, 0x8996, 0xB5F9, 0x8A3B, 0xB5FA, 0x8A60, 0xB5FB, 0x8A55,
04205     0xB5FC, 0x8A5E, 0xB5FD, 0x8A3C, 0xB5FE, 0x8A41, 0xB640, 0x8A54,
04206     0xB641, 0x8A5B, 0xB642, 0x8A50, 0xB643, 0x8A46, 0xB644, 0x8A34,
04207     0xB645, 0x8A3A, 0xB646, 0x8A36, 0xB647, 0x8A56, 0xB648, 0x8C61,
04208     0xB649, 0x8C82, 0xB64A, 0x8CAF, 0xB64B, 0x8CBC, 0xB64C, 0x8CB3,
04209     0xB64D, 0x8CBD, 0xB64E, 0x8CC1, 0xB64F, 0x8CBB, 0xB650, 0x8CC0,
04210     0xB651, 0x8CB4, 0xB652, 0x8CB7, 0xB653, 0x8CB6, 0xB654, 0x8CBF,
04211     0xB655, 0x8CB8, 0xB656, 0x8D8A, 0xB657, 0x8D85, 0xB658, 0x8D81,
04212     0xB659, 0x8DCE, 0xB65A, 0x8DDD, 0xB65B, 0x8DCB, 0xB65C, 0x8DDA,
04213     0xB65D, 0x8DD1, 0xB65E, 0x8DCC, 0xB65F, 0x8DDB, 0xB660, 0x8DC6,
04214     0xB661, 0x8EFB, 0xB662, 0x8EF8, 0xB663, 0x8EFC, 0xB664, 0x8F9C,
04215     0xB665, 0x902E, 0xB666, 0x9035, 0xB667, 0x9031, 0xB668, 0x9038,
04216     0xB669, 0x9032, 0xB66A, 0x9036, 0xB66B, 0x9102, 0xB66C, 0x90F5,
04217     0xB66D, 0x9109, 0xB66E, 0x90FE, 0xB66F, 0x9163, 0xB670, 0x9165,
04218     0xB671, 0x91CF, 0xB672, 0x9214, 0xB673, 0x9215, 0xB674, 0x9223,
04219     0xB675, 0x9209, 0xB676, 0x921E, 0xB677, 0x920D, 0xB678, 0x9210,
04220     0xB679, 0x9207, 0xB67A, 0x9211, 0xB67B, 0x9594, 0xB67C, 0x958F,
04221     0xB67D, 0x958B, 0xB67E, 0x9591, 0xB6A1, 0x9593, 0xB6A2, 0x9592,
04222     0xB6A3, 0x958E, 0xB6A4, 0x968A, 0xB6A5, 0x968E, 0xB6A6, 0x968B,
04223     0xB6A7, 0x967D, 0xB6A8, 0x9685, 0xB6A9, 0x9686, 0xB6AA, 0x968D,
04224     0xB6AB, 0x9672, 0xB6AC, 0x9684, 0xB6AD, 0x96C1, 0xB6AE, 0x96C5,
04225     0xB6AF, 0x96C4, 0xB6B0, 0x96C6, 0xB6B1, 0x96C7, 0xB6B2, 0x96EF,
04226     0xB6B3, 0x96F2, 0xB6B4, 0x97CC, 0xB6B5, 0x9805, 0xB6B6, 0x9806,
04227     0xB6B7, 0x9808, 0xB6B8, 0x98E7, 0xB6B9, 0x98EA, 0xB6BA, 0x98EF,
04228     0xB6BB, 0x98E9, 0xB6BC, 0x98F2, 0xB6BD, 0x98ED, 0xB6BE, 0x99AE,
04229     0xB6BF, 0x99AD, 0xB6C0, 0x9EC3, 0xB6C1, 0x9ECD, 0xB6C2, 0x9ED1,
04230     0xB6C3, 0x4E82, 0xB6C4, 0x50AD, 0xB6C5, 0x50B5, 0xB6C6, 0x50B2,
04231     0xB6C7, 0x50B3, 0xB6C8, 0x50C5, 0xB6C9, 0x50BE, 0xB6CA, 0x50AC,
04232     0xB6CB, 0x50B7, 0xB6CC, 0x50BB, 0xB6CD, 0x50AF, 0xB6CE, 0x50C7,
04233     0xB6CF, 0x527F, 0xB6D0, 0x5277, 0xB6D1, 0x527D, 0xB6D2, 0x52DF,
04234     0xB6D3, 0x52E6, 0xB6D4, 0x52E4, 0xB6D5, 0x52E2, 0xB6D6, 0x52E3,
04235     0xB6D7, 0x532F, 0xB6D8, 0x55DF, 0xB6D9, 0x55E8, 0xB6DA, 0x55D3,
04236     0xB6DB, 0x55E6, 0xB6DC, 0x55CE, 0xB6DD, 0x55DC, 0xB6DE, 0x55C7,
04237     0xB6DF, 0x55D1, 0xB6E0, 0x55E3, 0xB6E1, 0x55E4, 0xB6E2, 0x55EF,
04238     0xB6E3, 0x55DA, 0xB6E4, 0x55E1, 0xB6E5, 0x55C5, 0xB6E6, 0x55C6,
04239     0xB6E7, 0x55E5, 0xB6E8, 0x55C9, 0xB6E9, 0x5712, 0xB6EA, 0x5713,
04240     0xB6EB, 0x585E, 0xB6EC, 0x5851, 0xB6ED, 0x5858, 0xB6EE, 0x5857,
04241     0xB6EF, 0x585A, 0xB6F0, 0x5854, 0xB6F1, 0x586B, 0xB6F2, 0x584C,
04242     0xB6F3, 0x586D, 0xB6F4, 0x584A, 0xB6F5, 0x5862, 0xB6F6, 0x5852,
04243     0xB6F7, 0x584B, 0xB6F8, 0x5967, 0xB6F9, 0x5AC1, 0xB6FA, 0x5AC9,
04244     0xB6FB, 0x5ACC, 0xB6FC, 0x5ABE, 0xB6FD, 0x5ABD, 0xB6FE, 0x5ABC,
04245     0xB740, 0x5AB3, 0xB741, 0x5AC2, 0xB742, 0x5AB2, 0xB743, 0x5D69,
04246     0xB744, 0x5D6F, 0xB745, 0x5E4C, 0xB746, 0x5E79, 0xB747, 0x5EC9,
04247     0xB748, 0x5EC8, 0xB749, 0x5F12, 0xB74A, 0x5F59, 0xB74B, 0x5FAC,
04248     0xB74C, 0x5FAE, 0xB74D, 0x611A, 0xB74E, 0x610F, 0xB74F, 0x6148,
04249     0xB750, 0x611F, 0xB751, 0x60F3, 0xB752, 0x611B, 0xB753, 0x60F9,
04250     0xB754, 0x6101, 0xB755, 0x6108, 0xB756, 0x614E, 0xB757, 0x614C,
04251     0xB758, 0x6144, 0xB759, 0x614D, 0xB75A, 0x613E, 0xB75B, 0x6134,
04252     0xB75C, 0x6127, 0xB75D, 0x610D, 0xB75E, 0x6106, 0xB75F, 0x6137,
04253     0xB760, 0x6221, 0xB761, 0x6222, 0xB762, 0x6413, 0xB763, 0x643E,
04254     0xB764, 0x641E, 0xB765, 0x642A, 0xB766, 0x642D, 0xB767, 0x643D,
04255     0xB768, 0x642C, 0xB769, 0x640F, 0xB76A, 0x641C, 0xB76B, 0x6414,
04256     0xB76C, 0x640D, 0xB76D, 0x6436, 0xB76E, 0x6416, 0xB76F, 0x6417,
04257     0xB770, 0x6406, 0xB771, 0x656C, 0xB772, 0x659F, 0xB773, 0x65B0,
04258     0xB774, 0x6697, 0xB775, 0x6689, 0xB776, 0x6687, 0xB777, 0x6688,
04259     0xB778, 0x6696, 0xB779, 0x6684, 0xB77A, 0x6698, 0xB77B, 0x668D,
04260     0xB77C, 0x6703, 0xB77D, 0x6994, 0xB77E, 0x696D, 0xB7A1, 0x695A,
04261     0xB7A2, 0x6977, 0xB7A3, 0x6960, 0xB7A4, 0x6954, 0xB7A5, 0x6975,
04262     0xB7A6, 0x6930, 0xB7A7, 0x6982, 0xB7A8, 0x694A, 0xB7A9, 0x6968,
04263     0xB7AA, 0x696B, 0xB7AB, 0x695E, 0xB7AC, 0x6953, 0xB7AD, 0x6979,
04264     0xB7AE, 0x6986, 0xB7AF, 0x695D, 0xB7B0, 0x6963, 0xB7B1, 0x695B,
04265     0xB7B2, 0x6B47, 0xB7B3, 0x6B72, 0xB7B4, 0x6BC0, 0xB7B5, 0x6BBF,
04266     0xB7B6, 0x6BD3, 0xB7B7, 0x6BFD, 0xB7B8, 0x6EA2, 0xB7B9, 0x6EAF,
04267     0xB7BA, 0x6ED3, 0xB7BB, 0x6EB6, 0xB7BC, 0x6EC2, 0xB7BD, 0x6E90,
04268     0xB7BE, 0x6E9D, 0xB7BF, 0x6EC7, 0xB7C0, 0x6EC5, 0xB7C1, 0x6EA5,
04269     0xB7C2, 0x6E98, 0xB7C3, 0x6EBC, 0xB7C4, 0x6EBA, 0xB7C5, 0x6EAB,
04270     0xB7C6, 0x6ED1, 0xB7C7, 0x6E96, 0xB7C8, 0x6E9C, 0xB7C9, 0x6EC4,
04271     0xB7CA, 0x6ED4, 0xB7CB, 0x6EAA, 0xB7CC, 0x6EA7, 0xB7CD, 0x6EB4,
04272     0xB7CE, 0x714E, 0xB7CF, 0x7159, 0xB7D0, 0x7169, 0xB7D1, 0x7164,
04273     0xB7D2, 0x7149, 0xB7D3, 0x7167, 0xB7D4, 0x715C, 0xB7D5, 0x716C,
04274     0xB7D6, 0x7166, 0xB7D7, 0x714C, 0xB7D8, 0x7165, 0xB7D9, 0x715E,
04275     0xB7DA, 0x7146, 0xB7DB, 0x7168, 0xB7DC, 0x7156, 0xB7DD, 0x723A,
04276     0xB7DE, 0x7252, 0xB7DF, 0x7337, 0xB7E0, 0x7345, 0xB7E1, 0x733F,
04277     0xB7E2, 0x733E, 0xB7E3, 0x746F, 0xB7E4, 0x745A, 0xB7E5, 0x7455,
04278     0xB7E6, 0x745F, 0xB7E7, 0x745E, 0xB7E8, 0x7441, 0xB7E9, 0x743F,
04279     0xB7EA, 0x7459, 0xB7EB, 0x745B, 0xB7EC, 0x745C, 0xB7ED, 0x7576,
04280     0xB7EE, 0x7578, 0xB7EF, 0x7600, 0xB7F0, 0x75F0, 0xB7F1, 0x7601,
04281     0xB7F2, 0x75F2, 0xB7F3, 0x75F1, 0xB7F4, 0x75FA, 0xB7F5, 0x75FF,
04282     0xB7F6, 0x75F4, 0xB7F7, 0x75F3, 0xB7F8, 0x76DE, 0xB7F9, 0x76DF,
04283     0xB7FA, 0x775B, 0xB7FB, 0x776B, 0xB7FC, 0x7766, 0xB7FD, 0x775E,
04284     0xB7FE, 0x7763, 0xB840, 0x7779, 0xB841, 0x776A, 0xB842, 0x776C,
04285     0xB843, 0x775C, 0xB844, 0x7765, 0xB845, 0x7768, 0xB846, 0x7762,
04286     0xB847, 0x77EE, 0xB848, 0x788E, 0xB849, 0x78B0, 0xB84A, 0x7897,
04287     0xB84B, 0x7898, 0xB84C, 0x788C, 0xB84D, 0x7889, 0xB84E, 0x787C,
04288     0xB84F, 0x7891, 0xB850, 0x7893, 0xB851, 0x787F, 0xB852, 0x797A,
04289     0xB853, 0x797F, 0xB854, 0x7981, 0xB855, 0x842C, 0xB856, 0x79BD,
04290     0xB857, 0x7A1C, 0xB858, 0x7A1A, 0xB859, 0x7A20, 0xB85A, 0x7A14,
04291     0xB85B, 0x7A1F, 0xB85C, 0x7A1E, 0xB85D, 0x7A9F, 0xB85E, 0x7AA0,
04292     0xB85F, 0x7B77, 0xB860, 0x7BC0, 0xB861, 0x7B60, 0xB862, 0x7B6E,
04293     0xB863, 0x7B67, 0xB864, 0x7CB1, 0xB865, 0x7CB3, 0xB866, 0x7CB5,
04294     0xB867, 0x7D93, 0xB868, 0x7D79, 0xB869, 0x7D91, 0xB86A, 0x7D81,
04295     0xB86B, 0x7D8F, 0xB86C, 0x7D5B, 0xB86D, 0x7F6E, 0xB86E, 0x7F69,
04296     0xB86F, 0x7F6A, 0xB870, 0x7F72, 0xB871, 0x7FA9, 0xB872, 0x7FA8,
04297     0xB873, 0x7FA4, 0xB874, 0x8056, 0xB875, 0x8058, 0xB876, 0x8086,
04298     0xB877, 0x8084, 0xB878, 0x8171, 0xB879, 0x8170, 0xB87A, 0x8178,
04299     0xB87B, 0x8165, 0xB87C, 0x816E, 0xB87D, 0x8173, 0xB87E, 0x816B,
04300     0xB8A1, 0x8179, 0xB8A2, 0x817A, 0xB8A3, 0x8166, 0xB8A4, 0x8205,
04301     0xB8A5, 0x8247, 0xB8A6, 0x8482, 0xB8A7, 0x8477, 0xB8A8, 0x843D,
04302     0xB8A9, 0x8431, 0xB8AA, 0x8475, 0xB8AB, 0x8466, 0xB8AC, 0x846B,
04303     0xB8AD, 0x8449, 0xB8AE, 0x846C, 0xB8AF, 0x845B, 0xB8B0, 0x843C,
04304     0xB8B1, 0x8435, 0xB8B2, 0x8461, 0xB8B3, 0x8463, 0xB8B4, 0x8469,
04305     0xB8B5, 0x846D, 0xB8B6, 0x8446, 0xB8B7, 0x865E, 0xB8B8, 0x865C,
04306     0xB8B9, 0x865F, 0xB8BA, 0x86F9, 0xB8BB, 0x8713, 0xB8BC, 0x8708,
04307     0xB8BD, 0x8707, 0xB8BE, 0x8700, 0xB8BF, 0x86FE, 0xB8C0, 0x86FB,
04308     0xB8C1, 0x8702, 0xB8C2, 0x8703, 0xB8C3, 0x8706, 0xB8C4, 0x870A,
04309     0xB8C5, 0x8859, 0xB8C6, 0x88DF, 0xB8C7, 0x88D4, 0xB8C8, 0x88D9,
04310     0xB8C9, 0x88DC, 0xB8CA, 0x88D8, 0xB8CB, 0x88DD, 0xB8CC, 0x88E1,
04311     0xB8CD, 0x88CA, 0xB8CE, 0x88D5, 0xB8CF, 0x88D2, 0xB8D0, 0x899C,
04312     0xB8D1, 0x89E3, 0xB8D2, 0x8A6B, 0xB8D3, 0x8A72, 0xB8D4, 0x8A73,
04313     0xB8D5, 0x8A66, 0xB8D6, 0x8A69, 0xB8D7, 0x8A70, 0xB8D8, 0x8A87,
04314     0xB8D9, 0x8A7C, 0xB8DA, 0x8A63, 0xB8DB, 0x8AA0, 0xB8DC, 0x8A71,
04315     0xB8DD, 0x8A85, 0xB8DE, 0x8A6D, 0xB8DF, 0x8A62, 0xB8E0, 0x8A6E,
04316     0xB8E1, 0x8A6C, 0xB8E2, 0x8A79, 0xB8E3, 0x8A7B, 0xB8E4, 0x8A3E,
04317     0xB8E5, 0x8A68, 0xB8E6, 0x8C62, 0xB8E7, 0x8C8A, 0xB8E8, 0x8C89,
04318     0xB8E9, 0x8CCA, 0xB8EA, 0x8CC7, 0xB8EB, 0x8CC8, 0xB8EC, 0x8CC4,
04319     0xB8ED, 0x8CB2, 0xB8EE, 0x8CC3, 0xB8EF, 0x8CC2, 0xB8F0, 0x8CC5,
04320     0xB8F1, 0x8DE1, 0xB8F2, 0x8DDF, 0xB8F3, 0x8DE8, 0xB8F4, 0x8DEF,
04321     0xB8F5, 0x8DF3, 0xB8F6, 0x8DFA, 0xB8F7, 0x8DEA, 0xB8F8, 0x8DE4,
04322     0xB8F9, 0x8DE6, 0xB8FA, 0x8EB2, 0xB8FB, 0x8F03, 0xB8FC, 0x8F09,
04323     0xB8FD, 0x8EFE, 0xB8FE, 0x8F0A, 0xB940, 0x8F9F, 0xB941, 0x8FB2,
04324     0xB942, 0x904B, 0xB943, 0x904A, 0xB944, 0x9053, 0xB945, 0x9042,
04325     0xB946, 0x9054, 0xB947, 0x903C, 0xB948, 0x9055, 0xB949, 0x9050,
04326     0xB94A, 0x9047, 0xB94B, 0x904F, 0xB94C, 0x904E, 0xB94D, 0x904D,
04327     0xB94E, 0x9051, 0xB94F, 0x903E, 0xB950, 0x9041, 0xB951, 0x9112,
04328     0xB952, 0x9117, 0xB953, 0x916C, 0xB954, 0x916A, 0xB955, 0x9169,
04329     0xB956, 0x91C9, 0xB957, 0x9237, 0xB958, 0x9257, 0xB959, 0x9238,
04330     0xB95A, 0x923D, 0xB95B, 0x9240, 0xB95C, 0x923E, 0xB95D, 0x925B,
04331     0xB95E, 0x924B, 0xB95F, 0x9264, 0xB960, 0x9251, 0xB961, 0x9234,
04332     0xB962, 0x9249, 0xB963, 0x924D, 0xB964, 0x9245, 0xB965, 0x9239,
04333     0xB966, 0x923F, 0xB967, 0x925A, 0xB968, 0x9598, 0xB969, 0x9698,
04334     0xB96A, 0x9694, 0xB96B, 0x9695, 0xB96C, 0x96CD, 0xB96D, 0x96CB,
04335     0xB96E, 0x96C9, 0xB96F, 0x96CA, 0xB970, 0x96F7, 0xB971, 0x96FB,
04336     0xB972, 0x96F9, 0xB973, 0x96F6, 0xB974, 0x9756, 0xB975, 0x9774,
04337     0xB976, 0x9776, 0xB977, 0x9810, 0xB978, 0x9811, 0xB979, 0x9813,
04338     0xB97A, 0x980A, 0xB97B, 0x9812, 0xB97C, 0x980C, 0xB97D, 0x98FC,
04339     0xB97E, 0x98F4, 0xB9A1, 0x98FD, 0xB9A2, 0x98FE, 0xB9A3, 0x99B3,
04340     0xB9A4, 0x99B1, 0xB9A5, 0x99B4, 0xB9A6, 0x9AE1, 0xB9A7, 0x9CE9,
04341     0xB9A8, 0x9E82, 0xB9A9, 0x9F0E, 0xB9AA, 0x9F13, 0xB9AB, 0x9F20,
04342     0xB9AC, 0x50E7, 0xB9AD, 0x50EE, 0xB9AE, 0x50E5, 0xB9AF, 0x50D6,
04343     0xB9B0, 0x50ED, 0xB9B1, 0x50DA, 0xB9B2, 0x50D5, 0xB9B3, 0x50CF,
04344     0xB9B4, 0x50D1, 0xB9B5, 0x50F1, 0xB9B6, 0x50CE, 0xB9B7, 0x50E9,
04345     0xB9B8, 0x5162, 0xB9B9, 0x51F3, 0xB9BA, 0x5283, 0xB9BB, 0x5282,
04346     0xB9BC, 0x5331, 0xB9BD, 0x53AD, 0xB9BE, 0x55FE, 0xB9BF, 0x5600,
04347     0xB9C0, 0x561B, 0xB9C1, 0x5617, 0xB9C2, 0x55FD, 0xB9C3, 0x5614,
04348     0xB9C4, 0x5606, 0xB9C5, 0x5609, 0xB9C6, 0x560D, 0xB9C7, 0x560E,
04349     0xB9C8, 0x55F7, 0xB9C9, 0x5616, 0xB9CA, 0x561F, 0xB9CB, 0x5608,
04350     0xB9CC, 0x5610, 0xB9CD, 0x55F6, 0xB9CE, 0x5718, 0xB9CF, 0x5716,
04351     0xB9D0, 0x5875, 0xB9D1, 0x587E, 0xB9D2, 0x5883, 0xB9D3, 0x5893,
04352     0xB9D4, 0x588A, 0xB9D5, 0x5879, 0xB9D6, 0x5885, 0xB9D7, 0x587D,
04353     0xB9D8, 0x58FD, 0xB9D9, 0x5925, 0xB9DA, 0x5922, 0xB9DB, 0x5924,
04354     0xB9DC, 0x596A, 0xB9DD, 0x5969, 0xB9DE, 0x5AE1, 0xB9DF, 0x5AE6,
04355     0xB9E0, 0x5AE9, 0xB9E1, 0x5AD7, 0xB9E2, 0x5AD6, 0xB9E3, 0x5AD8,
04356     0xB9E4, 0x5AE3, 0xB9E5, 0x5B75, 0xB9E6, 0x5BDE, 0xB9E7, 0x5BE7,
04357     0xB9E8, 0x5BE1, 0xB9E9, 0x5BE5, 0xB9EA, 0x5BE6, 0xB9EB, 0x5BE8,
04358     0xB9EC, 0x5BE2, 0xB9ED, 0x5BE4, 0xB9EE, 0x5BDF, 0xB9EF, 0x5C0D,
04359     0xB9F0, 0x5C62, 0xB9F1, 0x5D84, 0xB9F2, 0x5D87, 0xB9F3, 0x5E5B,
04360     0xB9F4, 0x5E63, 0xB9F5, 0x5E55, 0xB9F6, 0x5E57, 0xB9F7, 0x5E54,
04361     0xB9F8, 0x5ED3, 0xB9F9, 0x5ED6, 0xB9FA, 0x5F0A, 0xB9FB, 0x5F46,
04362     0xB9FC, 0x5F70, 0xB9FD, 0x5FB9, 0xB9FE, 0x6147, 0xBA40, 0x613F,
04363     0xBA41, 0x614B, 0xBA42, 0x6177, 0xBA43, 0x6162, 0xBA44, 0x6163,
04364     0xBA45, 0x615F, 0xBA46, 0x615A, 0xBA47, 0x6158, 0xBA48, 0x6175,
04365     0xBA49, 0x622A, 0xBA4A, 0x6487, 0xBA4B, 0x6458, 0xBA4C, 0x6454,
04366     0xBA4D, 0x64A4, 0xBA4E, 0x6478, 0xBA4F, 0x645F, 0xBA50, 0x647A,
04367     0xBA51, 0x6451, 0xBA52, 0x6467, 0xBA53, 0x6434, 0xBA54, 0x646D,
04368     0xBA55, 0x647B, 0xBA56, 0x6572, 0xBA57, 0x65A1, 0xBA58, 0x65D7,
04369     0xBA59, 0x65D6, 0xBA5A, 0x66A2, 0xBA5B, 0x66A8, 0xBA5C, 0x669D,
04370     0xBA5D, 0x699C, 0xBA5E, 0x69A8, 0xBA5F, 0x6995, 0xBA60, 0x69C1,
04371     0xBA61, 0x69AE, 0xBA62, 0x69D3, 0xBA63, 0x69CB, 0xBA64, 0x699B,
04372     0xBA65, 0x69B7, 0xBA66, 0x69BB, 0xBA67, 0x69AB, 0xBA68, 0x69B4,
04373     0xBA69, 0x69D0, 0xBA6A, 0x69CD, 0xBA6B, 0x69AD, 0xBA6C, 0x69CC,
04374     0xBA6D, 0x69A6, 0xBA6E, 0x69C3, 0xBA6F, 0x69A3, 0xBA70, 0x6B49,
04375     0xBA71, 0x6B4C, 0xBA72, 0x6C33, 0xBA73, 0x6F33, 0xBA74, 0x6F14,
04376     0xBA75, 0x6EFE, 0xBA76, 0x6F13, 0xBA77, 0x6EF4, 0xBA78, 0x6F29,
04377     0xBA79, 0x6F3E, 0xBA7A, 0x6F20, 0xBA7B, 0x6F2C, 0xBA7C, 0x6F0F,
04378     0xBA7D, 0x6F02, 0xBA7E, 0x6F22, 0xBAA1, 0x6EFF, 0xBAA2, 0x6EEF,
04379     0xBAA3, 0x6F06, 0xBAA4, 0x6F31, 0xBAA5, 0x6F38, 0xBAA6, 0x6F32,
04380     0xBAA7, 0x6F23, 0xBAA8, 0x6F15, 0xBAA9, 0x6F2B, 0xBAAA, 0x6F2F,
04381     0xBAAB, 0x6F88, 0xBAAC, 0x6F2A, 0xBAAD, 0x6EEC, 0xBAAE, 0x6F01,
04382     0xBAAF, 0x6EF2, 0xBAB0, 0x6ECC, 0xBAB1, 0x6EF7, 0xBAB2, 0x7194,
04383     0xBAB3, 0x7199, 0xBAB4, 0x717D, 0xBAB5, 0x718A, 0xBAB6, 0x7184,
04384     0xBAB7, 0x7192, 0xBAB8, 0x723E, 0xBAB9, 0x7292, 0xBABA, 0x7296,
04385     0xBABB, 0x7344, 0xBABC, 0x7350, 0xBABD, 0x7464, 0xBABE, 0x7463,
04386     0xBABF, 0x746A, 0xBAC0, 0x7470, 0xBAC1, 0x746D, 0xBAC2, 0x7504,
04387     0xBAC3, 0x7591, 0xBAC4, 0x7627, 0xBAC5, 0x760D, 0xBAC6, 0x760B,
04388     0xBAC7, 0x7609, 0xBAC8, 0x7613, 0xBAC9, 0x76E1, 0xBACA, 0x76E3,
04389     0xBACB, 0x7784, 0xBACC, 0x777D, 0xBACD, 0x777F, 0xBACE, 0x7761,
04390     0xBACF, 0x78C1, 0xBAD0, 0x789F, 0xBAD1, 0x78A7, 0xBAD2, 0x78B3,
04391     0xBAD3, 0x78A9, 0xBAD4, 0x78A3, 0xBAD5, 0x798E, 0xBAD6, 0x798F,
04392     0xBAD7, 0x798D, 0xBAD8, 0x7A2E, 0xBAD9, 0x7A31, 0xBADA, 0x7AAA,
04393     0xBADB, 0x7AA9, 0xBADC, 0x7AED, 0xBADD, 0x7AEF, 0xBADE, 0x7BA1,
04394     0xBADF, 0x7B95, 0xBAE0, 0x7B8B, 0xBAE1, 0x7B75, 0xBAE2, 0x7B97,
04395     0xBAE3, 0x7B9D, 0xBAE4, 0x7B94, 0xBAE5, 0x7B8F, 0xBAE6, 0x7BB8,
04396     0xBAE7, 0x7B87, 0xBAE8, 0x7B84, 0xBAE9, 0x7CB9, 0xBAEA, 0x7CBD,
04397     0xBAEB, 0x7CBE, 0xBAEC, 0x7DBB, 0xBAED, 0x7DB0, 0xBAEE, 0x7D9C,
04398     0xBAEF, 0x7DBD, 0xBAF0, 0x7DBE, 0xBAF1, 0x7DA0, 0xBAF2, 0x7DCA,
04399     0xBAF3, 0x7DB4, 0xBAF4, 0x7DB2, 0xBAF5, 0x7DB1, 0xBAF6, 0x7DBA,
04400     0xBAF7, 0x7DA2, 0xBAF8, 0x7DBF, 0xBAF9, 0x7DB5, 0xBAFA, 0x7DB8,
04401     0xBAFB, 0x7DAD, 0xBAFC, 0x7DD2, 0xBAFD, 0x7DC7, 0xBAFE, 0x7DAC,
04402     0xBB40, 0x7F70, 0xBB41, 0x7FE0, 0xBB42, 0x7FE1, 0xBB43, 0x7FDF,
04403     0xBB44, 0x805E, 0xBB45, 0x805A, 0xBB46, 0x8087, 0xBB47, 0x8150,
04404     0xBB48, 0x8180, 0xBB49, 0x818F, 0xBB4A, 0x8188, 0xBB4B, 0x818A,
04405     0xBB4C, 0x817F, 0xBB4D, 0x8182, 0xBB4E, 0x81E7, 0xBB4F, 0x81FA,
04406     0xBB50, 0x8207, 0xBB51, 0x8214, 0xBB52, 0x821E, 0xBB53, 0x824B,
04407     0xBB54, 0x84C9, 0xBB55, 0x84BF, 0xBB56, 0x84C6, 0xBB57, 0x84C4,
04408     0xBB58, 0x8499, 0xBB59, 0x849E, 0xBB5A, 0x84B2, 0xBB5B, 0x849C,
04409     0xBB5C, 0x84CB, 0xBB5D, 0x84B8, 0xBB5E, 0x84C0, 0xBB5F, 0x84D3,
04410     0xBB60, 0x8490, 0xBB61, 0x84BC, 0xBB62, 0x84D1, 0xBB63, 0x84CA,
04411     0xBB64, 0x873F, 0xBB65, 0x871C, 0xBB66, 0x873B, 0xBB67, 0x8722,
04412     0xBB68, 0x8725, 0xBB69, 0x8734, 0xBB6A, 0x8718, 0xBB6B, 0x8755,
04413     0xBB6C, 0x8737, 0xBB6D, 0x8729, 0xBB6E, 0x88F3, 0xBB6F, 0x8902,
04414     0xBB70, 0x88F4, 0xBB71, 0x88F9, 0xBB72, 0x88F8, 0xBB73, 0x88FD,
04415     0xBB74, 0x88E8, 0xBB75, 0x891A, 0xBB76, 0x88EF, 0xBB77, 0x8AA6,
04416     0xBB78, 0x8A8C, 0xBB79, 0x8A9E, 0xBB7A, 0x8AA3, 0xBB7B, 0x8A8D,
04417     0xBB7C, 0x8AA1, 0xBB7D, 0x8A93, 0xBB7E, 0x8AA4, 0xBBA1, 0x8AAA,
04418     0xBBA2, 0x8AA5, 0xBBA3, 0x8AA8, 0xBBA4, 0x8A98, 0xBBA5, 0x8A91,
04419     0xBBA6, 0x8A9A, 0xBBA7, 0x8AA7, 0xBBA8, 0x8C6A, 0xBBA9, 0x8C8D,
04420     0xBBAA, 0x8C8C, 0xBBAB, 0x8CD3, 0xBBAC, 0x8CD1, 0xBBAD, 0x8CD2,
04421     0xBBAE, 0x8D6B, 0xBBAF, 0x8D99, 0xBBB0, 0x8D95, 0xBBB1, 0x8DFC,
04422     0xBBB2, 0x8F14, 0xBBB3, 0x8F12, 0xBBB4, 0x8F15, 0xBBB5, 0x8F13,
04423     0xBBB6, 0x8FA3, 0xBBB7, 0x9060, 0xBBB8, 0x9058, 0xBBB9, 0x905C,
04424     0xBBBA, 0x9063, 0xBBBB, 0x9059, 0xBBBC, 0x905E, 0xBBBD, 0x9062,
04425     0xBBBE, 0x905D, 0xBBBF, 0x905B, 0xBBC0, 0x9119, 0xBBC1, 0x9118,
04426     0xBBC2, 0x911E, 0xBBC3, 0x9175, 0xBBC4, 0x9178, 0xBBC5, 0x9177,
04427     0xBBC6, 0x9174, 0xBBC7, 0x9278, 0xBBC8, 0x9280, 0xBBC9, 0x9285,
04428     0xBBCA, 0x9298, 0xBBCB, 0x9296, 0xBBCC, 0x927B, 0xBBCD, 0x9293,
04429     0xBBCE, 0x929C, 0xBBCF, 0x92A8, 0xBBD0, 0x927C, 0xBBD1, 0x9291,
04430     0xBBD2, 0x95A1, 0xBBD3, 0x95A8, 0xBBD4, 0x95A9, 0xBBD5, 0x95A3,
04431     0xBBD6, 0x95A5, 0xBBD7, 0x95A4, 0xBBD8, 0x9699, 0xBBD9, 0x969C,
04432     0xBBDA, 0x969B, 0xBBDB, 0x96CC, 0xBBDC, 0x96D2, 0xBBDD, 0x9700,
04433     0xBBDE, 0x977C, 0xBBDF, 0x9785, 0xBBE0, 0x97F6, 0xBBE1, 0x9817,
04434     0xBBE2, 0x9818, 0xBBE3, 0x98AF, 0xBBE4, 0x98B1, 0xBBE5, 0x9903,
04435     0xBBE6, 0x9905, 0xBBE7, 0x990C, 0xBBE8, 0x9909, 0xBBE9, 0x99C1,
04436     0xBBEA, 0x9AAF, 0xBBEB, 0x9AB0, 0xBBEC, 0x9AE6, 0xBBED, 0x9B41,
04437     0xBBEE, 0x9B42, 0xBBEF, 0x9CF4, 0xBBF0, 0x9CF6, 0xBBF1, 0x9CF3,
04438     0xBBF2, 0x9EBC, 0xBBF3, 0x9F3B, 0xBBF4, 0x9F4A, 0xBBF5, 0x5104,
04439     0xBBF6, 0x5100, 0xBBF7, 0x50FB, 0xBBF8, 0x50F5, 0xBBF9, 0x50F9,
04440     0xBBFA, 0x5102, 0xBBFB, 0x5108, 0xBBFC, 0x5109, 0xBBFD, 0x5105,
04441     0xBBFE, 0x51DC, 0xBC40, 0x5287, 0xBC41, 0x5288, 0xBC42, 0x5289,
04442     0xBC43, 0x528D, 0xBC44, 0x528A, 0xBC45, 0x52F0, 0xBC46, 0x53B2,
04443     0xBC47, 0x562E, 0xBC48, 0x563B, 0xBC49, 0x5639, 0xBC4A, 0x5632,
04444     0xBC4B, 0x563F, 0xBC4C, 0x5634, 0xBC4D, 0x5629, 0xBC4E, 0x5653,
04445     0xBC4F, 0x564E, 0xBC50, 0x5657, 0xBC51, 0x5674, 0xBC52, 0x5636,
04446     0xBC53, 0x562F, 0xBC54, 0x5630, 0xBC55, 0x5880, 0xBC56, 0x589F,
04447     0xBC57, 0x589E, 0xBC58, 0x58B3, 0xBC59, 0x589C, 0xBC5A, 0x58AE,
04448     0xBC5B, 0x58A9, 0xBC5C, 0x58A6, 0xBC5D, 0x596D, 0xBC5E, 0x5B09,
04449     0xBC5F, 0x5AFB, 0xBC60, 0x5B0B, 0xBC61, 0x5AF5, 0xBC62, 0x5B0C,
04450     0xBC63, 0x5B08, 0xBC64, 0x5BEE, 0xBC65, 0x5BEC, 0xBC66, 0x5BE9,
04451     0xBC67, 0x5BEB, 0xBC68, 0x5C64, 0xBC69, 0x5C65, 0xBC6A, 0x5D9D,
04452     0xBC6B, 0x5D94, 0xBC6C, 0x5E62, 0xBC6D, 0x5E5F, 0xBC6E, 0x5E61,
04453     0xBC6F, 0x5EE2, 0xBC70, 0x5EDA, 0xBC71, 0x5EDF, 0xBC72, 0x5EDD,
04454     0xBC73, 0x5EE3, 0xBC74, 0x5EE0, 0xBC75, 0x5F48, 0xBC76, 0x5F71,
04455     0xBC77, 0x5FB7, 0xBC78, 0x5FB5, 0xBC79, 0x6176, 0xBC7A, 0x6167,
04456     0xBC7B, 0x616E, 0xBC7C, 0x615D, 0xBC7D, 0x6155, 0xBC7E, 0x6182,
04457     0xBCA1, 0x617C, 0xBCA2, 0x6170, 0xBCA3, 0x616B, 0xBCA4, 0x617E,
04458     0xBCA5, 0x61A7, 0xBCA6, 0x6190, 0xBCA7, 0x61AB, 0xBCA8, 0x618E,
04459     0xBCA9, 0x61AC, 0xBCAA, 0x619A, 0xBCAB, 0x61A4, 0xBCAC, 0x6194,
04460     0xBCAD, 0x61AE, 0xBCAE, 0x622E, 0xBCAF, 0x6469, 0xBCB0, 0x646F,
04461     0xBCB1, 0x6479, 0xBCB2, 0x649E, 0xBCB3, 0x64B2, 0xBCB4, 0x6488,
04462     0xBCB5, 0x6490, 0xBCB6, 0x64B0, 0xBCB7, 0x64A5, 0xBCB8, 0x6493,
04463     0xBCB9, 0x6495, 0xBCBA, 0x64A9, 0xBCBB, 0x6492, 0xBCBC, 0x64AE,
04464     0xBCBD, 0x64AD, 0xBCBE, 0x64AB, 0xBCBF, 0x649A, 0xBCC0, 0x64AC,
04465     0xBCC1, 0x6499, 0xBCC2, 0x64A2, 0xBCC3, 0x64B3, 0xBCC4, 0x6575,
04466     0xBCC5, 0x6577, 0xBCC6, 0x6578, 0xBCC7, 0x66AE, 0xBCC8, 0x66AB,
04467     0xBCC9, 0x66B4, 0xBCCA, 0x66B1, 0xBCCB, 0x6A23, 0xBCCC, 0x6A1F,
04468     0xBCCD, 0x69E8, 0xBCCE, 0x6A01, 0xBCCF, 0x6A1E, 0xBCD0, 0x6A19,
04469     0xBCD1, 0x69FD, 0xBCD2, 0x6A21, 0xBCD3, 0x6A13, 0xBCD4, 0x6A0A,
04470     0xBCD5, 0x69F3, 0xBCD6, 0x6A02, 0xBCD7, 0x6A05, 0xBCD8, 0x69ED,
04471     0xBCD9, 0x6A11, 0xBCDA, 0x6B50, 0xBCDB, 0x6B4E, 0xBCDC, 0x6BA4,
04472     0xBCDD, 0x6BC5, 0xBCDE, 0x6BC6, 0xBCDF, 0x6F3F, 0xBCE0, 0x6F7C,
04473     0xBCE1, 0x6F84, 0xBCE2, 0x6F51, 0xBCE3, 0x6F66, 0xBCE4, 0x6F54,
04474     0xBCE5, 0x6F86, 0xBCE6, 0x6F6D, 0xBCE7, 0x6F5B, 0xBCE8, 0x6F78,
04475     0xBCE9, 0x6F6E, 0xBCEA, 0x6F8E, 0xBCEB, 0x6F7A, 0xBCEC, 0x6F70,
04476     0xBCED, 0x6F64, 0xBCEE, 0x6F97, 0xBCEF, 0x6F58, 0xBCF0, 0x6ED5,
04477     0xBCF1, 0x6F6F, 0xBCF2, 0x6F60, 0xBCF3, 0x6F5F, 0xBCF4, 0x719F,
04478     0xBCF5, 0x71AC, 0xBCF6, 0x71B1, 0xBCF7, 0x71A8, 0xBCF8, 0x7256,
04479     0xBCF9, 0x729B, 0xBCFA, 0x734E, 0xBCFB, 0x7357, 0xBCFC, 0x7469,
04480     0xBCFD, 0x748B, 0xBCFE, 0x7483, 0xBD40, 0x747E, 0xBD41, 0x7480,
04481     0xBD42, 0x757F, 0xBD43, 0x7620, 0xBD44, 0x7629, 0xBD45, 0x761F,
04482     0xBD46, 0x7624, 0xBD47, 0x7626, 0xBD48, 0x7621, 0xBD49, 0x7622,
04483     0xBD4A, 0x769A, 0xBD4B, 0x76BA, 0xBD4C, 0x76E4, 0xBD4D, 0x778E,
04484     0xBD4E, 0x7787, 0xBD4F, 0x778C, 0xBD50, 0x7791, 0xBD51, 0x778B,
04485     0xBD52, 0x78CB, 0xBD53, 0x78C5, 0xBD54, 0x78BA, 0xBD55, 0x78CA,
04486     0xBD56, 0x78BE, 0xBD57, 0x78D5, 0xBD58, 0x78BC, 0xBD59, 0x78D0,
04487     0xBD5A, 0x7A3F, 0xBD5B, 0x7A3C, 0xBD5C, 0x7A40, 0xBD5D, 0x7A3D,
04488     0xBD5E, 0x7A37, 0xBD5F, 0x7A3B, 0xBD60, 0x7AAF, 0xBD61, 0x7AAE,
04489     0xBD62, 0x7BAD, 0xBD63, 0x7BB1, 0xBD64, 0x7BC4, 0xBD65, 0x7BB4,
04490     0xBD66, 0x7BC6, 0xBD67, 0x7BC7, 0xBD68, 0x7BC1, 0xBD69, 0x7BA0,
04491     0xBD6A, 0x7BCC, 0xBD6B, 0x7CCA, 0xBD6C, 0x7DE0, 0xBD6D, 0x7DF4,
04492     0xBD6E, 0x7DEF, 0xBD6F, 0x7DFB, 0xBD70, 0x7DD8, 0xBD71, 0x7DEC,
04493     0xBD72, 0x7DDD, 0xBD73, 0x7DE8, 0xBD74, 0x7DE3, 0xBD75, 0x7DDA,
04494     0xBD76, 0x7DDE, 0xBD77, 0x7DE9, 0xBD78, 0x7D9E, 0xBD79, 0x7DD9,
04495     0xBD7A, 0x7DF2, 0xBD7B, 0x7DF9, 0xBD7C, 0x7F75, 0xBD7D, 0x7F77,
04496     0xBD7E, 0x7FAF, 0xBDA1, 0x7FE9, 0xBDA2, 0x8026, 0xBDA3, 0x819B,
04497     0xBDA4, 0x819C, 0xBDA5, 0x819D, 0xBDA6, 0x81A0, 0xBDA7, 0x819A,
04498     0xBDA8, 0x8198, 0xBDA9, 0x8517, 0xBDAA, 0x853D, 0xBDAB, 0x851A,
04499     0xBDAC, 0x84EE, 0xBDAD, 0x852C, 0xBDAE, 0x852D, 0xBDAF, 0x8513,
04500     0xBDB0, 0x8511, 0xBDB1, 0x8523, 0xBDB2, 0x8521, 0xBDB3, 0x8514,
04501     0xBDB4, 0x84EC, 0xBDB5, 0x8525, 0xBDB6, 0x84FF, 0xBDB7, 0x8506,
04502     0xBDB8, 0x8782, 0xBDB9, 0x8774, 0xBDBA, 0x8776, 0xBDBB, 0x8760,
04503     0xBDBC, 0x8766, 0xBDBD, 0x8778, 0xBDBE, 0x8768, 0xBDBF, 0x8759,
04504     0xBDC0, 0x8757, 0xBDC1, 0x874C, 0xBDC2, 0x8753, 0xBDC3, 0x885B,
04505     0xBDC4, 0x885D, 0xBDC5, 0x8910, 0xBDC6, 0x8907, 0xBDC7, 0x8912,
04506     0xBDC8, 0x8913, 0xBDC9, 0x8915, 0xBDCA, 0x890A, 0xBDCB, 0x8ABC,
04507     0xBDCC, 0x8AD2, 0xBDCD, 0x8AC7, 0xBDCE, 0x8AC4, 0xBDCF, 0x8A95,
04508     0xBDD0, 0x8ACB, 0xBDD1, 0x8AF8, 0xBDD2, 0x8AB2, 0xBDD3, 0x8AC9,
04509     0xBDD4, 0x8AC2, 0xBDD5, 0x8ABF, 0xBDD6, 0x8AB0, 0xBDD7, 0x8AD6,
04510     0xBDD8, 0x8ACD, 0xBDD9, 0x8AB6, 0xBDDA, 0x8AB9, 0xBDDB, 0x8ADB,
04511     0xBDDC, 0x8C4C, 0xBDDD, 0x8C4E, 0xBDDE, 0x8C6C, 0xBDDF, 0x8CE0,
04512     0xBDE0, 0x8CDE, 0xBDE1, 0x8CE6, 0xBDE2, 0x8CE4, 0xBDE3, 0x8CEC,
04513     0xBDE4, 0x8CED, 0xBDE5, 0x8CE2, 0xBDE6, 0x8CE3, 0xBDE7, 0x8CDC,
04514     0xBDE8, 0x8CEA, 0xBDE9, 0x8CE1, 0xBDEA, 0x8D6D, 0xBDEB, 0x8D9F,
04515     0xBDEC, 0x8DA3, 0xBDED, 0x8E2B, 0xBDEE, 0x8E10, 0xBDEF, 0x8E1D,
04516     0xBDF0, 0x8E22, 0xBDF1, 0x8E0F, 0xBDF2, 0x8E29, 0xBDF3, 0x8E1F,
04517     0xBDF4, 0x8E21, 0xBDF5, 0x8E1E, 0xBDF6, 0x8EBA, 0xBDF7, 0x8F1D,
04518     0xBDF8, 0x8F1B, 0xBDF9, 0x8F1F, 0xBDFA, 0x8F29, 0xBDFB, 0x8F26,
04519     0xBDFC, 0x8F2A, 0xBDFD, 0x8F1C, 0xBDFE, 0x8F1E, 0xBE40, 0x8F25,
04520     0xBE41, 0x9069, 0xBE42, 0x906E, 0xBE43, 0x9068, 0xBE44, 0x906D,
04521     0xBE45, 0x9077, 0xBE46, 0x9130, 0xBE47, 0x912D, 0xBE48, 0x9127,
04522     0xBE49, 0x9131, 0xBE4A, 0x9187, 0xBE4B, 0x9189, 0xBE4C, 0x918B,
04523     0xBE4D, 0x9183, 0xBE4E, 0x92C5, 0xBE4F, 0x92BB, 0xBE50, 0x92B7,
04524     0xBE51, 0x92EA, 0xBE52, 0x92AC, 0xBE53, 0x92E4, 0xBE54, 0x92C1,
04525     0xBE55, 0x92B3, 0xBE56, 0x92BC, 0xBE57, 0x92D2, 0xBE58, 0x92C7,
04526     0xBE59, 0x92F0, 0xBE5A, 0x92B2, 0xBE5B, 0x95AD, 0xBE5C, 0x95B1,
04527     0xBE5D, 0x9704, 0xBE5E, 0x9706, 0xBE5F, 0x9707, 0xBE60, 0x9709,
04528     0xBE61, 0x9760, 0xBE62, 0x978D, 0xBE63, 0x978B, 0xBE64, 0x978F,
04529     0xBE65, 0x9821, 0xBE66, 0x982B, 0xBE67, 0x981C, 0xBE68, 0x98B3,
04530     0xBE69, 0x990A, 0xBE6A, 0x9913, 0xBE6B, 0x9912, 0xBE6C, 0x9918,
04531     0xBE6D, 0x99DD, 0xBE6E, 0x99D0, 0xBE6F, 0x99DF, 0xBE70, 0x99DB,
04532     0xBE71, 0x99D1, 0xBE72, 0x99D5, 0xBE73, 0x99D2, 0xBE74, 0x99D9,
04533     0xBE75, 0x9AB7, 0xBE76, 0x9AEE, 0xBE77, 0x9AEF, 0xBE78, 0x9B27,
04534     0xBE79, 0x9B45, 0xBE7A, 0x9B44, 0xBE7B, 0x9B77, 0xBE7C, 0x9B6F,
04535     0xBE7D, 0x9D06, 0xBE7E, 0x9D09, 0xBEA1, 0x9D03, 0xBEA2, 0x9EA9,
04536     0xBEA3, 0x9EBE, 0xBEA4, 0x9ECE, 0xBEA5, 0x58A8, 0xBEA6, 0x9F52,
04537     0xBEA7, 0x5112, 0xBEA8, 0x5118, 0xBEA9, 0x5114, 0xBEAA, 0x5110,
04538     0xBEAB, 0x5115, 0xBEAC, 0x5180, 0xBEAD, 0x51AA, 0xBEAE, 0x51DD,
04539     0xBEAF, 0x5291, 0xBEB0, 0x5293, 0xBEB1, 0x52F3, 0xBEB2, 0x5659,
04540     0xBEB3, 0x566B, 0xBEB4, 0x5679, 0xBEB5, 0x5669, 0xBEB6, 0x5664,
04541     0xBEB7, 0x5678, 0xBEB8, 0x566A, 0xBEB9, 0x5668, 0xBEBA, 0x5665,
04542     0xBEBB, 0x5671, 0xBEBC, 0x566F, 0xBEBD, 0x566C, 0xBEBE, 0x5662,
04543     0xBEBF, 0x5676, 0xBEC0, 0x58C1, 0xBEC1, 0x58BE, 0xBEC2, 0x58C7,
04544     0xBEC3, 0x58C5, 0xBEC4, 0x596E, 0xBEC5, 0x5B1D, 0xBEC6, 0x5B34,
04545     0xBEC7, 0x5B78, 0xBEC8, 0x5BF0, 0xBEC9, 0x5C0E, 0xBECA, 0x5F4A,
04546     0xBECB, 0x61B2, 0xBECC, 0x6191, 0xBECD, 0x61A9, 0xBECE, 0x618A,
04547     0xBECF, 0x61CD, 0xBED0, 0x61B6, 0xBED1, 0x61BE, 0xBED2, 0x61CA,
04548     0xBED3, 0x61C8, 0xBED4, 0x6230, 0xBED5, 0x64C5, 0xBED6, 0x64C1,
04549     0xBED7, 0x64CB, 0xBED8, 0x64BB, 0xBED9, 0x64BC, 0xBEDA, 0x64DA,
04550     0xBEDB, 0x64C4, 0xBEDC, 0x64C7, 0xBEDD, 0x64C2, 0xBEDE, 0x64CD,
04551     0xBEDF, 0x64BF, 0xBEE0, 0x64D2, 0xBEE1, 0x64D4, 0xBEE2, 0x64BE,
04552     0xBEE3, 0x6574, 0xBEE4, 0x66C6, 0xBEE5, 0x66C9, 0xBEE6, 0x66B9,
04553     0xBEE7, 0x66C4, 0xBEE8, 0x66C7, 0xBEE9, 0x66B8, 0xBEEA, 0x6A3D,
04554     0xBEEB, 0x6A38, 0xBEEC, 0x6A3A, 0xBEED, 0x6A59, 0xBEEE, 0x6A6B,
04555     0xBEEF, 0x6A58, 0xBEF0, 0x6A39, 0xBEF1, 0x6A44, 0xBEF2, 0x6A62,
04556     0xBEF3, 0x6A61, 0xBEF4, 0x6A4B, 0xBEF5, 0x6A47, 0xBEF6, 0x6A35,
04557     0xBEF7, 0x6A5F, 0xBEF8, 0x6A48, 0xBEF9, 0x6B59, 0xBEFA, 0x6B77,
04558     0xBEFB, 0x6C05, 0xBEFC, 0x6FC2, 0xBEFD, 0x6FB1, 0xBEFE, 0x6FA1,
04559     0xBF40, 0x6FC3, 0xBF41, 0x6FA4, 0xBF42, 0x6FC1, 0xBF43, 0x6FA7,
04560     0xBF44, 0x6FB3, 0xBF45, 0x6FC0, 0xBF46, 0x6FB9, 0xBF47, 0x6FB6,
04561     0xBF48, 0x6FA6, 0xBF49, 0x6FA0, 0xBF4A, 0x6FB4, 0xBF4B, 0x71BE,
04562     0xBF4C, 0x71C9, 0xBF4D, 0x71D0, 0xBF4E, 0x71D2, 0xBF4F, 0x71C8,
04563     0xBF50, 0x71D5, 0xBF51, 0x71B9, 0xBF52, 0x71CE, 0xBF53, 0x71D9,
04564     0xBF54, 0x71DC, 0xBF55, 0x71C3, 0xBF56, 0x71C4, 0xBF57, 0x7368,
04565     0xBF58, 0x749C, 0xBF59, 0x74A3, 0xBF5A, 0x7498, 0xBF5B, 0x749F,
04566     0xBF5C, 0x749E, 0xBF5D, 0x74E2, 0xBF5E, 0x750C, 0xBF5F, 0x750D,
04567     0xBF60, 0x7634, 0xBF61, 0x7638, 0xBF62, 0x763A, 0xBF63, 0x76E7,
04568     0xBF64, 0x76E5, 0xBF65, 0x77A0, 0xBF66, 0x779E, 0xBF67, 0x779F,
04569     0xBF68, 0x77A5, 0xBF69, 0x78E8, 0xBF6A, 0x78DA, 0xBF6B, 0x78EC,
04570     0xBF6C, 0x78E7, 0xBF6D, 0x79A6, 0xBF6E, 0x7A4D, 0xBF6F, 0x7A4E,
04571     0xBF70, 0x7A46, 0xBF71, 0x7A4C, 0xBF72, 0x7A4B, 0xBF73, 0x7ABA,
04572     0xBF74, 0x7BD9, 0xBF75, 0x7C11, 0xBF76, 0x7BC9, 0xBF77, 0x7BE4,
04573     0xBF78, 0x7BDB, 0xBF79, 0x7BE1, 0xBF7A, 0x7BE9, 0xBF7B, 0x7BE6,
04574     0xBF7C, 0x7CD5, 0xBF7D, 0x7CD6, 0xBF7E, 0x7E0A, 0xBFA1, 0x7E11,
04575     0xBFA2, 0x7E08, 0xBFA3, 0x7E1B, 0xBFA4, 0x7E23, 0xBFA5, 0x7E1E,
04576     0xBFA6, 0x7E1D, 0xBFA7, 0x7E09, 0xBFA8, 0x7E10, 0xBFA9, 0x7F79,
04577     0xBFAA, 0x7FB2, 0xBFAB, 0x7FF0, 0xBFAC, 0x7FF1, 0xBFAD, 0x7FEE,
04578     0xBFAE, 0x8028, 0xBFAF, 0x81B3, 0xBFB0, 0x81A9, 0xBFB1, 0x81A8,
04579     0xBFB2, 0x81FB, 0xBFB3, 0x8208, 0xBFB4, 0x8258, 0xBFB5, 0x8259,
04580     0xBFB6, 0x854A, 0xBFB7, 0x8559, 0xBFB8, 0x8548, 0xBFB9, 0x8568,
04581     0xBFBA, 0x8569, 0xBFBB, 0x8543, 0xBFBC, 0x8549, 0xBFBD, 0x856D,
04582     0xBFBE, 0x856A, 0xBFBF, 0x855E, 0xBFC0, 0x8783, 0xBFC1, 0x879F,
04583     0xBFC2, 0x879E, 0xBFC3, 0x87A2, 0xBFC4, 0x878D, 0xBFC5, 0x8861,
04584     0xBFC6, 0x892A, 0xBFC7, 0x8932, 0xBFC8, 0x8925, 0xBFC9, 0x892B,
04585     0xBFCA, 0x8921, 0xBFCB, 0x89AA, 0xBFCC, 0x89A6, 0xBFCD, 0x8AE6,
04586     0xBFCE, 0x8AFA, 0xBFCF, 0x8AEB, 0xBFD0, 0x8AF1, 0xBFD1, 0x8B00,
04587     0xBFD2, 0x8ADC, 0xBFD3, 0x8AE7, 0xBFD4, 0x8AEE, 0xBFD5, 0x8AFE,
04588     0xBFD6, 0x8B01, 0xBFD7, 0x8B02, 0xBFD8, 0x8AF7, 0xBFD9, 0x8AED,
04589     0xBFDA, 0x8AF3, 0xBFDB, 0x8AF6, 0xBFDC, 0x8AFC, 0xBFDD, 0x8C6B,
04590     0xBFDE, 0x8C6D, 0xBFDF, 0x8C93, 0xBFE0, 0x8CF4, 0xBFE1, 0x8E44,
04591     0xBFE2, 0x8E31, 0xBFE3, 0x8E34, 0xBFE4, 0x8E42, 0xBFE5, 0x8E39,
04592     0xBFE6, 0x8E35, 0xBFE7, 0x8F3B, 0xBFE8, 0x8F2F, 0xBFE9, 0x8F38,
04593     0xBFEA, 0x8F33, 0xBFEB, 0x8FA8, 0xBFEC, 0x8FA6, 0xBFED, 0x9075,
04594     0xBFEE, 0x9074, 0xBFEF, 0x9078, 0xBFF0, 0x9072, 0xBFF1, 0x907C,
04595     0xBFF2, 0x907A, 0xBFF3, 0x9134, 0xBFF4, 0x9192, 0xBFF5, 0x9320,
04596     0xBFF6, 0x9336, 0xBFF7, 0x92F8, 0xBFF8, 0x9333, 0xBFF9, 0x932F,
04597     0xBFFA, 0x9322, 0xBFFB, 0x92FC, 0xBFFC, 0x932B, 0xBFFD, 0x9304,
04598     0xBFFE, 0x931A, 0xC040, 0x9310, 0xC041, 0x9326, 0xC042, 0x9321,
04599     0xC043, 0x9315, 0xC044, 0x932E, 0xC045, 0x9319, 0xC046, 0x95BB,
04600     0xC047, 0x96A7, 0xC048, 0x96A8, 0xC049, 0x96AA, 0xC04A, 0x96D5,
04601     0xC04B, 0x970E, 0xC04C, 0x9711, 0xC04D, 0x9716, 0xC04E, 0x970D,
04602     0xC04F, 0x9713, 0xC050, 0x970F, 0xC051, 0x975B, 0xC052, 0x975C,
04603     0xC053, 0x9766, 0xC054, 0x9798, 0xC055, 0x9830, 0xC056, 0x9838,
04604     0xC057, 0x983B, 0xC058, 0x9837, 0xC059, 0x982D, 0xC05A, 0x9839,
04605     0xC05B, 0x9824, 0xC05C, 0x9910, 0xC05D, 0x9928, 0xC05E, 0x991E,
04606     0xC05F, 0x991B, 0xC060, 0x9921, 0xC061, 0x991A, 0xC062, 0x99ED,
04607     0xC063, 0x99E2, 0xC064, 0x99F1, 0xC065, 0x9AB8, 0xC066, 0x9ABC,
04608     0xC067, 0x9AFB, 0xC068, 0x9AED, 0xC069, 0x9B28, 0xC06A, 0x9B91,
04609     0xC06B, 0x9D15, 0xC06C, 0x9D23, 0xC06D, 0x9D26, 0xC06E, 0x9D28,
04610     0xC06F, 0x9D12, 0xC070, 0x9D1B, 0xC071, 0x9ED8, 0xC072, 0x9ED4,
04611     0xC073, 0x9F8D, 0xC074, 0x9F9C, 0xC075, 0x512A, 0xC076, 0x511F,
04612     0xC077, 0x5121, 0xC078, 0x5132, 0xC079, 0x52F5, 0xC07A, 0x568E,
04613     0xC07B, 0x5680, 0xC07C, 0x5690, 0xC07D, 0x5685, 0xC07E, 0x5687,
04614     0xC0A1, 0x568F, 0xC0A2, 0x58D5, 0xC0A3, 0x58D3, 0xC0A4, 0x58D1,
04615     0xC0A5, 0x58CE, 0xC0A6, 0x5B30, 0xC0A7, 0x5B2A, 0xC0A8, 0x5B24,
04616     0xC0A9, 0x5B7A, 0xC0AA, 0x5C37, 0xC0AB, 0x5C68, 0xC0AC, 0x5DBC,
04617     0xC0AD, 0x5DBA, 0xC0AE, 0x5DBD, 0xC0AF, 0x5DB8, 0xC0B0, 0x5E6B,
04618     0xC0B1, 0x5F4C, 0xC0B2, 0x5FBD, 0xC0B3, 0x61C9, 0xC0B4, 0x61C2,
04619     0xC0B5, 0x61C7, 0xC0B6, 0x61E6, 0xC0B7, 0x61CB, 0xC0B8, 0x6232,
04620     0xC0B9, 0x6234, 0xC0BA, 0x64CE, 0xC0BB, 0x64CA, 0xC0BC, 0x64D8,
04621     0xC0BD, 0x64E0, 0xC0BE, 0x64F0, 0xC0BF, 0x64E6, 0xC0C0, 0x64EC,
04622     0xC0C1, 0x64F1, 0xC0C2, 0x64E2, 0xC0C3, 0x64ED, 0xC0C4, 0x6582,
04623     0xC0C5, 0x6583, 0xC0C6, 0x66D9, 0xC0C7, 0x66D6, 0xC0C8, 0x6A80,
04624     0xC0C9, 0x6A94, 0xC0CA, 0x6A84, 0xC0CB, 0x6AA2, 0xC0CC, 0x6A9C,
04625     0xC0CD, 0x6ADB, 0xC0CE, 0x6AA3, 0xC0CF, 0x6A7E, 0xC0D0, 0x6A97,
04626     0xC0D1, 0x6A90, 0xC0D2, 0x6AA0, 0xC0D3, 0x6B5C, 0xC0D4, 0x6BAE,
04627     0xC0D5, 0x6BDA, 0xC0D6, 0x6C08, 0xC0D7, 0x6FD8, 0xC0D8, 0x6FF1,
04628     0xC0D9, 0x6FDF, 0xC0DA, 0x6FE0, 0xC0DB, 0x6FDB, 0xC0DC, 0x6FE4,
04629     0xC0DD, 0x6FEB, 0xC0DE, 0x6FEF, 0xC0DF, 0x6F80, 0xC0E0, 0x6FEC,
04630     0xC0E1, 0x6FE1, 0xC0E2, 0x6FE9, 0xC0E3, 0x6FD5, 0xC0E4, 0x6FEE,
04631     0xC0E5, 0x6FF0, 0xC0E6, 0x71E7, 0xC0E7, 0x71DF, 0xC0E8, 0x71EE,
04632     0xC0E9, 0x71E6, 0xC0EA, 0x71E5, 0xC0EB, 0x71ED, 0xC0EC, 0x71EC,
04633     0xC0ED, 0x71F4, 0xC0EE, 0x71E0, 0xC0EF, 0x7235, 0xC0F0, 0x7246,
04634     0xC0F1, 0x7370, 0xC0F2, 0x7372, 0xC0F3, 0x74A9, 0xC0F4, 0x74B0,
04635     0xC0F5, 0x74A6, 0xC0F6, 0x74A8, 0xC0F7, 0x7646, 0xC0F8, 0x7642,
04636     0xC0F9, 0x764C, 0xC0FA, 0x76EA, 0xC0FB, 0x77B3, 0xC0FC, 0x77AA,
04637     0xC0FD, 0x77B0, 0xC0FE, 0x77AC, 0xC140, 0x77A7, 0xC141, 0x77AD,
04638     0xC142, 0x77EF, 0xC143, 0x78F7, 0xC144, 0x78FA, 0xC145, 0x78F4,
04639     0xC146, 0x78EF, 0xC147, 0x7901, 0xC148, 0x79A7, 0xC149, 0x79AA,
04640     0xC14A, 0x7A57, 0xC14B, 0x7ABF, 0xC14C, 0x7C07, 0xC14D, 0x7C0D,
04641     0xC14E, 0x7BFE, 0xC14F, 0x7BF7, 0xC150, 0x7C0C, 0xC151, 0x7BE0,
04642     0xC152, 0x7CE0, 0xC153, 0x7CDC, 0xC154, 0x7CDE, 0xC155, 0x7CE2,
04643     0xC156, 0x7CDF, 0xC157, 0x7CD9, 0xC158, 0x7CDD, 0xC159, 0x7E2E,
04644     0xC15A, 0x7E3E, 0xC15B, 0x7E46, 0xC15C, 0x7E37, 0xC15D, 0x7E32,
04645     0xC15E, 0x7E43, 0xC15F, 0x7E2B, 0xC160, 0x7E3D, 0xC161, 0x7E31,
04646     0xC162, 0x7E45, 0xC163, 0x7E41, 0xC164, 0x7E34, 0xC165, 0x7E39,
04647     0xC166, 0x7E48, 0xC167, 0x7E35, 0xC168, 0x7E3F, 0xC169, 0x7E2F,
04648     0xC16A, 0x7F44, 0xC16B, 0x7FF3, 0xC16C, 0x7FFC, 0xC16D, 0x8071,
04649     0xC16E, 0x8072, 0xC16F, 0x8070, 0xC170, 0x806F, 0xC171, 0x8073,
04650     0xC172, 0x81C6, 0xC173, 0x81C3, 0xC174, 0x81BA, 0xC175, 0x81C2,
04651     0xC176, 0x81C0, 0xC177, 0x81BF, 0xC178, 0x81BD, 0xC179, 0x81C9,
04652     0xC17A, 0x81BE, 0xC17B, 0x81E8, 0xC17C, 0x8209, 0xC17D, 0x8271,
04653     0xC17E, 0x85AA, 0xC1A1, 0x8584, 0xC1A2, 0x857E, 0xC1A3, 0x859C,
04654     0xC1A4, 0x8591, 0xC1A5, 0x8594, 0xC1A6, 0x85AF, 0xC1A7, 0x859B,
04655     0xC1A8, 0x8587, 0xC1A9, 0x85A8, 0xC1AA, 0x858A, 0xC1AB, 0x8667,
04656     0xC1AC, 0x87C0, 0xC1AD, 0x87D1, 0xC1AE, 0x87B3, 0xC1AF, 0x87D2,
04657     0xC1B0, 0x87C6, 0xC1B1, 0x87AB, 0xC1B2, 0x87BB, 0xC1B3, 0x87BA,
04658     0xC1B4, 0x87C8, 0xC1B5, 0x87CB, 0xC1B6, 0x893B, 0xC1B7, 0x8936,
04659     0xC1B8, 0x8944, 0xC1B9, 0x8938, 0xC1BA, 0x893D, 0xC1BB, 0x89AC,
04660     0xC1BC, 0x8B0E, 0xC1BD, 0x8B17, 0xC1BE, 0x8B19, 0xC1BF, 0x8B1B,
04661     0xC1C0, 0x8B0A, 0xC1C1, 0x8B20, 0xC1C2, 0x8B1D, 0xC1C3, 0x8B04,
04662     0xC1C4, 0x8B10, 0xC1C5, 0x8C41, 0xC1C6, 0x8C3F, 0xC1C7, 0x8C73,
04663     0xC1C8, 0x8CFA, 0xC1C9, 0x8CFD, 0xC1CA, 0x8CFC, 0xC1CB, 0x8CF8,
04664     0xC1CC, 0x8CFB, 0xC1CD, 0x8DA8, 0xC1CE, 0x8E49, 0xC1CF, 0x8E4B,
04665     0xC1D0, 0x8E48, 0xC1D1, 0x8E4A, 0xC1D2, 0x8F44, 0xC1D3, 0x8F3E,
04666     0xC1D4, 0x8F42, 0xC1D5, 0x8F45, 0xC1D6, 0x8F3F, 0xC1D7, 0x907F,
04667     0xC1D8, 0x907D, 0xC1D9, 0x9084, 0xC1DA, 0x9081, 0xC1DB, 0x9082,
04668     0xC1DC, 0x9080, 0xC1DD, 0x9139, 0xC1DE, 0x91A3, 0xC1DF, 0x919E,
04669     0xC1E0, 0x919C, 0xC1E1, 0x934D, 0xC1E2, 0x9382, 0xC1E3, 0x9328,
04670     0xC1E4, 0x9375, 0xC1E5, 0x934A, 0xC1E6, 0x9365, 0xC1E7, 0x934B,
04671     0xC1E8, 0x9318, 0xC1E9, 0x937E, 0xC1EA, 0x936C, 0xC1EB, 0x935B,
04672     0xC1EC, 0x9370, 0xC1ED, 0x935A, 0xC1EE, 0x9354, 0xC1EF, 0x95CA,
04673     0xC1F0, 0x95CB, 0xC1F1, 0x95CC, 0xC1F2, 0x95C8, 0xC1F3, 0x95C6,
04674     0xC1F4, 0x96B1, 0xC1F5, 0x96B8, 0xC1F6, 0x96D6, 0xC1F7, 0x971C,
04675     0xC1F8, 0x971E, 0xC1F9, 0x97A0, 0xC1FA, 0x97D3, 0xC1FB, 0x9846,
04676     0xC1FC, 0x98B6, 0xC1FD, 0x9935, 0xC1FE, 0x9A01, 0xC240, 0x99FF,
04677     0xC241, 0x9BAE, 0xC242, 0x9BAB, 0xC243, 0x9BAA, 0xC244, 0x9BAD,
04678     0xC245, 0x9D3B, 0xC246, 0x9D3F, 0xC247, 0x9E8B, 0xC248, 0x9ECF,
04679     0xC249, 0x9EDE, 0xC24A, 0x9EDC, 0xC24B, 0x9EDD, 0xC24C, 0x9EDB,
04680     0xC24D, 0x9F3E, 0xC24E, 0x9F4B, 0xC24F, 0x53E2, 0xC250, 0x5695,
04681     0xC251, 0x56AE, 0xC252, 0x58D9, 0xC253, 0x58D8, 0xC254, 0x5B38,
04682     0xC255, 0x5F5D, 0xC256, 0x61E3, 0xC257, 0x6233, 0xC258, 0x64F4,
04683     0xC259, 0x64F2, 0xC25A, 0x64FE, 0xC25B, 0x6506, 0xC25C, 0x64FA,
04684     0xC25D, 0x64FB, 0xC25E, 0x64F7, 0xC25F, 0x65B7, 0xC260, 0x66DC,
04685     0xC261, 0x6726, 0xC262, 0x6AB3, 0xC263, 0x6AAC, 0xC264, 0x6AC3,
04686     0xC265, 0x6ABB, 0xC266, 0x6AB8, 0xC267, 0x6AC2, 0xC268, 0x6AAE,
04687     0xC269, 0x6AAF, 0xC26A, 0x6B5F, 0xC26B, 0x6B78, 0xC26C, 0x6BAF,
04688     0xC26D, 0x7009, 0xC26E, 0x700B, 0xC26F, 0x6FFE, 0xC270, 0x7006,
04689     0xC271, 0x6FFA, 0xC272, 0x7011, 0xC273, 0x700F, 0xC274, 0x71FB,
04690     0xC275, 0x71FC, 0xC276, 0x71FE, 0xC277, 0x71F8, 0xC278, 0x7377,
04691     0xC279, 0x7375, 0xC27A, 0x74A7, 0xC27B, 0x74BF, 0xC27C, 0x7515,
04692     0xC27D, 0x7656, 0xC27E, 0x7658, 0xC2A1, 0x7652, 0xC2A2, 0x77BD,
04693     0xC2A3, 0x77BF, 0xC2A4, 0x77BB, 0xC2A5, 0x77BC, 0xC2A6, 0x790E,
04694     0xC2A7, 0x79AE, 0xC2A8, 0x7A61, 0xC2A9, 0x7A62, 0xC2AA, 0x7A60,
04695     0xC2AB, 0x7AC4, 0xC2AC, 0x7AC5, 0xC2AD, 0x7C2B, 0xC2AE, 0x7C27,
04696     0xC2AF, 0x7C2A, 0xC2B0, 0x7C1E, 0xC2B1, 0x7C23, 0xC2B2, 0x7C21,
04697     0xC2B3, 0x7CE7, 0xC2B4, 0x7E54, 0xC2B5, 0x7E55, 0xC2B6, 0x7E5E,
04698     0xC2B7, 0x7E5A, 0xC2B8, 0x7E61, 0xC2B9, 0x7E52, 0xC2BA, 0x7E59,
04699     0xC2BB, 0x7F48, 0xC2BC, 0x7FF9, 0xC2BD, 0x7FFB, 0xC2BE, 0x8077,
04700     0xC2BF, 0x8076, 0xC2C0, 0x81CD, 0xC2C1, 0x81CF, 0xC2C2, 0x820A,
04701     0xC2C3, 0x85CF, 0xC2C4, 0x85A9, 0xC2C5, 0x85CD, 0xC2C6, 0x85D0,
04702     0xC2C7, 0x85C9, 0xC2C8, 0x85B0, 0xC2C9, 0x85BA, 0xC2CA, 0x85B9,
04703     0xC2CB, 0x85A6, 0xC2CC, 0x87EF, 0xC2CD, 0x87EC, 0xC2CE, 0x87F2,
04704     0xC2CF, 0x87E0, 0xC2D0, 0x8986, 0xC2D1, 0x89B2, 0xC2D2, 0x89F4,
04705     0xC2D3, 0x8B28, 0xC2D4, 0x8B39, 0xC2D5, 0x8B2C, 0xC2D6, 0x8B2B,
04706     0xC2D7, 0x8C50, 0xC2D8, 0x8D05, 0xC2D9, 0x8E59, 0xC2DA, 0x8E63,
04707     0xC2DB, 0x8E66, 0xC2DC, 0x8E64, 0xC2DD, 0x8E5F, 0xC2DE, 0x8E55,
04708     0xC2DF, 0x8EC0, 0xC2E0, 0x8F49, 0xC2E1, 0x8F4D, 0xC2E2, 0x9087,
04709     0xC2E3, 0x9083, 0xC2E4, 0x9088, 0xC2E5, 0x91AB, 0xC2E6, 0x91AC,
04710     0xC2E7, 0x91D0, 0xC2E8, 0x9394, 0xC2E9, 0x938A, 0xC2EA, 0x9396,
04711     0xC2EB, 0x93A2, 0xC2EC, 0x93B3, 0xC2ED, 0x93AE, 0xC2EE, 0x93AC,
04712     0xC2EF, 0x93B0, 0xC2F0, 0x9398, 0xC2F1, 0x939A, 0xC2F2, 0x9397,
04713     0xC2F3, 0x95D4, 0xC2F4, 0x95D6, 0xC2F5, 0x95D0, 0xC2F6, 0x95D5,
04714     0xC2F7, 0x96E2, 0xC2F8, 0x96DC, 0xC2F9, 0x96D9, 0xC2FA, 0x96DB,
04715     0xC2FB, 0x96DE, 0xC2FC, 0x9724, 0xC2FD, 0x97A3, 0xC2FE, 0x97A6,
04716     0xC340, 0x97AD, 0xC341, 0x97F9, 0xC342, 0x984D, 0xC343, 0x984F,
04717     0xC344, 0x984C, 0xC345, 0x984E, 0xC346, 0x9853, 0xC347, 0x98BA,
04718     0xC348, 0x993E, 0xC349, 0x993F, 0xC34A, 0x993D, 0xC34B, 0x992E,
04719     0xC34C, 0x99A5, 0xC34D, 0x9A0E, 0xC34E, 0x9AC1, 0xC34F, 0x9B03,
04720     0xC350, 0x9B06, 0xC351, 0x9B4F, 0xC352, 0x9B4E, 0xC353, 0x9B4D,
04721     0xC354, 0x9BCA, 0xC355, 0x9BC9, 0xC356, 0x9BFD, 0xC357, 0x9BC8,
04722     0xC358, 0x9BC0, 0xC359, 0x9D51, 0xC35A, 0x9D5D, 0xC35B, 0x9D60,
04723     0xC35C, 0x9EE0, 0xC35D, 0x9F15, 0xC35E, 0x9F2C, 0xC35F, 0x5133,
04724     0xC360, 0x56A5, 0xC361, 0x58DE, 0xC362, 0x58DF, 0xC363, 0x58E2,
04725     0xC364, 0x5BF5, 0xC365, 0x9F90, 0xC366, 0x5EEC, 0xC367, 0x61F2,
04726     0xC368, 0x61F7, 0xC369, 0x61F6, 0xC36A, 0x61F5, 0xC36B, 0x6500,
04727     0xC36C, 0x650F, 0xC36D, 0x66E0, 0xC36E, 0x66DD, 0xC36F, 0x6AE5,
04728     0xC370, 0x6ADD, 0xC371, 0x6ADA, 0xC372, 0x6AD3, 0xC373, 0x701B,
04729     0xC374, 0x701F, 0xC375, 0x7028, 0xC376, 0x701A, 0xC377, 0x701D,
04730     0xC378, 0x7015, 0xC379, 0x7018, 0xC37A, 0x7206, 0xC37B, 0x720D,
04731     0xC37C, 0x7258, 0xC37D, 0x72A2, 0xC37E, 0x7378, 0xC3A1, 0x737A,
04732     0xC3A2, 0x74BD, 0xC3A3, 0x74CA, 0xC3A4, 0x74E3, 0xC3A5, 0x7587,
04733     0xC3A6, 0x7586, 0xC3A7, 0x765F, 0xC3A8, 0x7661, 0xC3A9, 0x77C7,
04734     0xC3AA, 0x7919, 0xC3AB, 0x79B1, 0xC3AC, 0x7A6B, 0xC3AD, 0x7A69,
04735     0xC3AE, 0x7C3E, 0xC3AF, 0x7C3F, 0xC3B0, 0x7C38, 0xC3B1, 0x7C3D,
04736     0xC3B2, 0x7C37, 0xC3B3, 0x7C40, 0xC3B4, 0x7E6B, 0xC3B5, 0x7E6D,
04737     0xC3B6, 0x7E79, 0xC3B7, 0x7E69, 0xC3B8, 0x7E6A, 0xC3B9, 0x7F85,
04738     0xC3BA, 0x7E73, 0xC3BB, 0x7FB6, 0xC3BC, 0x7FB9, 0xC3BD, 0x7FB8,
04739     0xC3BE, 0x81D8, 0xC3BF, 0x85E9, 0xC3C0, 0x85DD, 0xC3C1, 0x85EA,
04740     0xC3C2, 0x85D5, 0xC3C3, 0x85E4, 0xC3C4, 0x85E5, 0xC3C5, 0x85F7,
04741     0xC3C6, 0x87FB, 0xC3C7, 0x8805, 0xC3C8, 0x880D, 0xC3C9, 0x87F9,
04742     0xC3CA, 0x87FE, 0xC3CB, 0x8960, 0xC3CC, 0x895F, 0xC3CD, 0x8956,
04743     0xC3CE, 0x895E, 0xC3CF, 0x8B41, 0xC3D0, 0x8B5C, 0xC3D1, 0x8B58,
04744     0xC3D2, 0x8B49, 0xC3D3, 0x8B5A, 0xC3D4, 0x8B4E, 0xC3D5, 0x8B4F,
04745     0xC3D6, 0x8B46, 0xC3D7, 0x8B59, 0xC3D8, 0x8D08, 0xC3D9, 0x8D0A,
04746     0xC3DA, 0x8E7C, 0xC3DB, 0x8E72, 0xC3DC, 0x8E87, 0xC3DD, 0x8E76,
04747     0xC3DE, 0x8E6C, 0xC3DF, 0x8E7A, 0xC3E0, 0x8E74, 0xC3E1, 0x8F54,
04748     0xC3E2, 0x8F4E, 0xC3E3, 0x8FAD, 0xC3E4, 0x908A, 0xC3E5, 0x908B,
04749     0xC3E6, 0x91B1, 0xC3E7, 0x91AE, 0xC3E8, 0x93E1, 0xC3E9, 0x93D1,
04750     0xC3EA, 0x93DF, 0xC3EB, 0x93C3, 0xC3EC, 0x93C8, 0xC3ED, 0x93DC,
04751     0xC3EE, 0x93DD, 0xC3EF, 0x93D6, 0xC3F0, 0x93E2, 0xC3F1, 0x93CD,
04752     0xC3F2, 0x93D8, 0xC3F3, 0x93E4, 0xC3F4, 0x93D7, 0xC3F5, 0x93E8,
04753     0xC3F6, 0x95DC, 0xC3F7, 0x96B4, 0xC3F8, 0x96E3, 0xC3F9, 0x972A,
04754     0xC3FA, 0x9727, 0xC3FB, 0x9761, 0xC3FC, 0x97DC, 0xC3FD, 0x97FB,
04755     0xC3FE, 0x985E, 0xC440, 0x9858, 0xC441, 0x985B, 0xC442, 0x98BC,
04756     0xC443, 0x9945, 0xC444, 0x9949, 0xC445, 0x9A16, 0xC446, 0x9A19,
04757     0xC447, 0x9B0D, 0xC448, 0x9BE8, 0xC449, 0x9BE7, 0xC44A, 0x9BD6,
04758     0xC44B, 0x9BDB, 0xC44C, 0x9D89, 0xC44D, 0x9D61, 0xC44E, 0x9D72,
04759     0xC44F, 0x9D6A, 0xC450, 0x9D6C, 0xC451, 0x9E92, 0xC452, 0x9E97,
04760     0xC453, 0x9E93, 0xC454, 0x9EB4, 0xC455, 0x52F8, 0xC456, 0x56A8,
04761     0xC457, 0x56B7, 0xC458, 0x56B6, 0xC459, 0x56B4, 0xC45A, 0x56BC,
04762     0xC45B, 0x58E4, 0xC45C, 0x5B40, 0xC45D, 0x5B43, 0xC45E, 0x5B7D,
04763     0xC45F, 0x5BF6, 0xC460, 0x5DC9, 0xC461, 0x61F8, 0xC462, 0x61FA,
04764     0xC463, 0x6518, 0xC464, 0x6514, 0xC465, 0x6519, 0xC466, 0x66E6,
04765     0xC467, 0x6727, 0xC468, 0x6AEC, 0xC469, 0x703E, 0xC46A, 0x7030,
04766     0xC46B, 0x7032, 0xC46C, 0x7210, 0xC46D, 0x737B, 0xC46E, 0x74CF,
04767     0xC46F, 0x7662, 0xC470, 0x7665, 0xC471, 0x7926, 0xC472, 0x792A,
04768     0xC473, 0x792C, 0xC474, 0x792B, 0xC475, 0x7AC7, 0xC476, 0x7AF6,
04769     0xC477, 0x7C4C, 0xC478, 0x7C43, 0xC479, 0x7C4D, 0xC47A, 0x7CEF,
04770     0xC47B, 0x7CF0, 0xC47C, 0x8FAE, 0xC47D, 0x7E7D, 0xC47E, 0x7E7C,
04771     0xC4A1, 0x7E82, 0xC4A2, 0x7F4C, 0xC4A3, 0x8000, 0xC4A4, 0x81DA,
04772     0xC4A5, 0x8266, 0xC4A6, 0x85FB, 0xC4A7, 0x85F9, 0xC4A8, 0x8611,
04773     0xC4A9, 0x85FA, 0xC4AA, 0x8606, 0xC4AB, 0x860B, 0xC4AC, 0x8607,
04774     0xC4AD, 0x860A, 0xC4AE, 0x8814, 0xC4AF, 0x8815, 0xC4B0, 0x8964,
04775     0xC4B1, 0x89BA, 0xC4B2, 0x89F8, 0xC4B3, 0x8B70, 0xC4B4, 0x8B6C,
04776     0xC4B5, 0x8B66, 0xC4B6, 0x8B6F, 0xC4B7, 0x8B5F, 0xC4B8, 0x8B6B,
04777     0xC4B9, 0x8D0F, 0xC4BA, 0x8D0D, 0xC4BB, 0x8E89, 0xC4BC, 0x8E81,
04778     0xC4BD, 0x8E85, 0xC4BE, 0x8E82, 0xC4BF, 0x91B4, 0xC4C0, 0x91CB,
04779     0xC4C1, 0x9418, 0xC4C2, 0x9403, 0xC4C3, 0x93FD, 0xC4C4, 0x95E1,
04780     0xC4C5, 0x9730, 0xC4C6, 0x98C4, 0xC4C7, 0x9952, 0xC4C8, 0x9951,
04781     0xC4C9, 0x99A8, 0xC4CA, 0x9A2B, 0xC4CB, 0x9A30, 0xC4CC, 0x9A37,
04782     0xC4CD, 0x9A35, 0xC4CE, 0x9C13, 0xC4CF, 0x9C0D, 0xC4D0, 0x9E79,
04783     0xC4D1, 0x9EB5, 0xC4D2, 0x9EE8, 0xC4D3, 0x9F2F, 0xC4D4, 0x9F5F,
04784     0xC4D5, 0x9F63, 0xC4D6, 0x9F61, 0xC4D7, 0x5137, 0xC4D8, 0x5138,
04785     0xC4D9, 0x56C1, 0xC4DA, 0x56C0, 0xC4DB, 0x56C2, 0xC4DC, 0x5914,
04786     0xC4DD, 0x5C6C, 0xC4DE, 0x5DCD, 0xC4DF, 0x61FC, 0xC4E0, 0x61FE,
04787     0xC4E1, 0x651D, 0xC4E2, 0x651C, 0xC4E3, 0x6595, 0xC4E4, 0x66E9,
04788     0xC4E5, 0x6AFB, 0xC4E6, 0x6B04, 0xC4E7, 0x6AFA, 0xC4E8, 0x6BB2,
04789     0xC4E9, 0x704C, 0xC4EA, 0x721B, 0xC4EB, 0x72A7, 0xC4EC, 0x74D6,
04790     0xC4ED, 0x74D4, 0xC4EE, 0x7669, 0xC4EF, 0x77D3, 0xC4F0, 0x7C50,
04791     0xC4F1, 0x7E8F, 0xC4F2, 0x7E8C, 0xC4F3, 0x7FBC, 0xC4F4, 0x8617,
04792     0xC4F5, 0x862D, 0xC4F6, 0x861A, 0xC4F7, 0x8823, 0xC4F8, 0x8822,
04793     0xC4F9, 0x8821, 0xC4FA, 0x881F, 0xC4FB, 0x896A, 0xC4FC, 0x896C,
04794     0xC4FD, 0x89BD, 0xC4FE, 0x8B74, 0xC540, 0x8B77, 0xC541, 0x8B7D,
04795     0xC542, 0x8D13, 0xC543, 0x8E8A, 0xC544, 0x8E8D, 0xC545, 0x8E8B,
04796     0xC546, 0x8F5F, 0xC547, 0x8FAF, 0xC548, 0x91BA, 0xC549, 0x942E,
04797     0xC54A, 0x9433, 0xC54B, 0x9435, 0xC54C, 0x943A, 0xC54D, 0x9438,
04798     0xC54E, 0x9432, 0xC54F, 0x942B, 0xC550, 0x95E2, 0xC551, 0x9738,
04799     0xC552, 0x9739, 0xC553, 0x9732, 0xC554, 0x97FF, 0xC555, 0x9867,
04800     0xC556, 0x9865, 0xC557, 0x9957, 0xC558, 0x9A45, 0xC559, 0x9A43,
04801     0xC55A, 0x9A40, 0xC55B, 0x9A3E, 0xC55C, 0x9ACF, 0xC55D, 0x9B54,
04802     0xC55E, 0x9B51, 0xC55F, 0x9C2D, 0xC560, 0x9C25, 0xC561, 0x9DAF,
04803     0xC562, 0x9DB4, 0xC563, 0x9DC2, 0xC564, 0x9DB8, 0xC565, 0x9E9D,
04804     0xC566, 0x9EEF, 0xC567, 0x9F19, 0xC568, 0x9F5C, 0xC569, 0x9F66,
04805     0xC56A, 0x9F67, 0xC56B, 0x513C, 0xC56C, 0x513B, 0xC56D, 0x56C8,
04806     0xC56E, 0x56CA, 0xC56F, 0x56C9, 0xC570, 0x5B7F, 0xC571, 0x5DD4,
04807     0xC572, 0x5DD2, 0xC573, 0x5F4E, 0xC574, 0x61FF, 0xC575, 0x6524,
04808     0xC576, 0x6B0A, 0xC577, 0x6B61, 0xC578, 0x7051, 0xC579, 0x7058,
04809     0xC57A, 0x7380, 0xC57B, 0x74E4, 0xC57C, 0x758A, 0xC57D, 0x766E,
04810     0xC57E, 0x766C, 0xC5A1, 0x79B3, 0xC5A2, 0x7C60, 0xC5A3, 0x7C5F,
04811     0xC5A4, 0x807E, 0xC5A5, 0x807D, 0xC5A6, 0x81DF, 0xC5A7, 0x8972,
04812     0xC5A8, 0x896F, 0xC5A9, 0x89FC, 0xC5AA, 0x8B80, 0xC5AB, 0x8D16,
04813     0xC5AC, 0x8D17, 0xC5AD, 0x8E91, 0xC5AE, 0x8E93, 0xC5AF, 0x8F61,
04814     0xC5B0, 0x9148, 0xC5B1, 0x9444, 0xC5B2, 0x9451, 0xC5B3, 0x9452,
04815     0xC5B4, 0x973D, 0xC5B5, 0x973E, 0xC5B6, 0x97C3, 0xC5B7, 0x97C1,
04816     0xC5B8, 0x986B, 0xC5B9, 0x9955, 0xC5BA, 0x9A55, 0xC5BB, 0x9A4D,
04817     0xC5BC, 0x9AD2, 0xC5BD, 0x9B1A, 0xC5BE, 0x9C49, 0xC5BF, 0x9C31,
04818     0xC5C0, 0x9C3E, 0xC5C1, 0x9C3B, 0xC5C2, 0x9DD3, 0xC5C3, 0x9DD7,
04819     0xC5C4, 0x9F34, 0xC5C5, 0x9F6C, 0xC5C6, 0x9F6A, 0xC5C7, 0x9F94,
04820     0xC5C8, 0x56CC, 0xC5C9, 0x5DD6, 0xC5CA, 0x6200, 0xC5CB, 0x6523,
04821     0xC5CC, 0x652B, 0xC5CD, 0x652A, 0xC5CE, 0x66EC, 0xC5CF, 0x6B10,
04822     0xC5D0, 0x74DA, 0xC5D1, 0x7ACA, 0xC5D2, 0x7C64, 0xC5D3, 0x7C63,
04823     0xC5D4, 0x7C65, 0xC5D5, 0x7E93, 0xC5D6, 0x7E96, 0xC5D7, 0x7E94,
04824     0xC5D8, 0x81E2, 0xC5D9, 0x8638, 0xC5DA, 0x863F, 0xC5DB, 0x8831,
04825     0xC5DC, 0x8B8A, 0xC5DD, 0x9090, 0xC5DE, 0x908F, 0xC5DF, 0x9463,
04826     0xC5E0, 0x9460, 0xC5E1, 0x9464, 0xC5E2, 0x9768, 0xC5E3, 0x986F,
04827     0xC5E4, 0x995C, 0xC5E5, 0x9A5A, 0xC5E6, 0x9A5B, 0xC5E7, 0x9A57,
04828     0xC5E8, 0x9AD3, 0xC5E9, 0x9AD4, 0xC5EA, 0x9AD1, 0xC5EB, 0x9C54,
04829     0xC5EC, 0x9C57, 0xC5ED, 0x9C56, 0xC5EE, 0x9DE5, 0xC5EF, 0x9E9F,
04830     0xC5F0, 0x9EF4, 0xC5F1, 0x56D1, 0xC5F2, 0x58E9, 0xC5F3, 0x652C,
04831     0xC5F4, 0x705E, 0xC5F5, 0x7671, 0xC5F6, 0x7672, 0xC5F7, 0x77D7,
04832     0xC5F8, 0x7F50, 0xC5F9, 0x7F88, 0xC5FA, 0x8836, 0xC5FB, 0x8839,
04833     0xC5FC, 0x8862, 0xC5FD, 0x8B93, 0xC5FE, 0x8B92, 0xC640, 0x8B96,
04834     0xC641, 0x8277, 0xC642, 0x8D1B, 0xC643, 0x91C0, 0xC644, 0x946A,
04835     0xC645, 0x9742, 0xC646, 0x9748, 0xC647, 0x9744, 0xC648, 0x97C6,
04836     0xC649, 0x9870, 0xC64A, 0x9A5F, 0xC64B, 0x9B22, 0xC64C, 0x9B58,
04837     0xC64D, 0x9C5F, 0xC64E, 0x9DF9, 0xC64F, 0x9DFA, 0xC650, 0x9E7C,
04838     0xC651, 0x9E7D, 0xC652, 0x9F07, 0xC653, 0x9F77, 0xC654, 0x9F72,
04839     0xC655, 0x5EF3, 0xC656, 0x6B16, 0xC657, 0x7063, 0xC658, 0x7C6C,
04840     0xC659, 0x7C6E, 0xC65A, 0x883B, 0xC65B, 0x89C0, 0xC65C, 0x8EA1,
04841     0xC65D, 0x91C1, 0xC65E, 0x9472, 0xC65F, 0x9470, 0xC660, 0x9871,
04842     0xC661, 0x995E, 0xC662, 0x9AD6, 0xC663, 0x9B23, 0xC664, 0x9ECC,
04843     0xC665, 0x7064, 0xC666, 0x77DA, 0xC667, 0x8B9A, 0xC668, 0x9477,
04844     0xC669, 0x97C9, 0xC66A, 0x9A62, 0xC66B, 0x9A65, 0xC66C, 0x7E9C,
04845     0xC66D, 0x8B9C, 0xC66E, 0x8EAA, 0xC66F, 0x91C5, 0xC670, 0x947D,
04846     0xC671, 0x947E, 0xC672, 0x947C, 0xC673, 0x9C77, 0xC674, 0x9C78,
04847     0xC675, 0x9EF7, 0xC676, 0x8C54, 0xC677, 0x947F, 0xC678, 0x9E1A,
04848     0xC679, 0x7228, 0xC67A, 0x9A6A, 0xC67B, 0x9B31, 0xC67C, 0x9E1B,
04849     0xC67D, 0x9E1E, 0xC67E, 0x7C72, 0xC940, 0x4E42, 0xC941, 0x4E5C,
04850     0xC942, 0x51F5, 0xC943, 0x531A, 0xC944, 0x5382, 0xC945, 0x4E07,
04851     0xC946, 0x4E0C, 0xC947, 0x4E47, 0xC948, 0x4E8D, 0xC949, 0x56D7,
04852     0xC94A, 0xFA0C, 0xC94B, 0x5C6E, 0xC94C, 0x5F73, 0xC94D, 0x4E0F,
04853     0xC94E, 0x5187, 0xC94F, 0x4E0E, 0xC950, 0x4E2E, 0xC951, 0x4E93,
04854     0xC952, 0x4EC2, 0xC953, 0x4EC9, 0xC954, 0x4EC8, 0xC955, 0x5198,
04855     0xC956, 0x52FC, 0xC957, 0x536C, 0xC958, 0x53B9, 0xC959, 0x5720,
04856     0xC95A, 0x5903, 0xC95B, 0x592C, 0xC95C, 0x5C10, 0xC95D, 0x5DFF,
04857     0xC95E, 0x65E1, 0xC95F, 0x6BB3, 0xC960, 0x6BCC, 0xC961, 0x6C14,
04858     0xC962, 0x723F, 0xC963, 0x4E31, 0xC964, 0x4E3C, 0xC965, 0x4EE8,
04859     0xC966, 0x4EDC, 0xC967, 0x4EE9, 0xC968, 0x4EE1, 0xC969, 0x4EDD,
04860     0xC96A, 0x4EDA, 0xC96B, 0x520C, 0xC96C, 0x531C, 0xC96D, 0x534C,
04861     0xC96E, 0x5722, 0xC96F, 0x5723, 0xC970, 0x5917, 0xC971, 0x592F,
04862     0xC972, 0x5B81, 0xC973, 0x5B84, 0xC974, 0x5C12, 0xC975, 0x5C3B,
04863     0xC976, 0x5C74, 0xC977, 0x5C73, 0xC978, 0x5E04, 0xC979, 0x5E80,
04864     0xC97A, 0x5E82, 0xC97B, 0x5FC9, 0xC97C, 0x6209, 0xC97D, 0x6250,
04865     0xC97E, 0x6C15, 0xC9A1, 0x6C36, 0xC9A2, 0x6C43, 0xC9A3, 0x6C3F,
04866     0xC9A4, 0x6C3B, 0xC9A5, 0x72AE, 0xC9A6, 0x72B0, 0xC9A7, 0x738A,
04867     0xC9A8, 0x79B8, 0xC9A9, 0x808A, 0xC9AA, 0x961E, 0xC9AB, 0x4F0E,
04868     0xC9AC, 0x4F18, 0xC9AD, 0x4F2C, 0xC9AE, 0x4EF5, 0xC9AF, 0x4F14,
04869     0xC9B0, 0x4EF1, 0xC9B1, 0x4F00, 0xC9B2, 0x4EF7, 0xC9B3, 0x4F08,
04870     0xC9B4, 0x4F1D, 0xC9B5, 0x4F02, 0xC9B6, 0x4F05, 0xC9B7, 0x4F22,
04871     0xC9B8, 0x4F13, 0xC9B9, 0x4F04, 0xC9BA, 0x4EF4, 0xC9BB, 0x4F12,
04872     0xC9BC, 0x51B1, 0xC9BD, 0x5213, 0xC9BE, 0x5209, 0xC9BF, 0x5210,
04873     0xC9C0, 0x52A6, 0xC9C1, 0x5322, 0xC9C2, 0x531F, 0xC9C3, 0x534D,
04874     0xC9C4, 0x538A, 0xC9C5, 0x5407, 0xC9C6, 0x56E1, 0xC9C7, 0x56DF,
04875     0xC9C8, 0x572E, 0xC9C9, 0x572A, 0xC9CA, 0x5734, 0xC9CB, 0x593C,
04876     0xC9CC, 0x5980, 0xC9CD, 0x597C, 0xC9CE, 0x5985, 0xC9CF, 0x597B,
04877     0xC9D0, 0x597E, 0xC9D1, 0x5977, 0xC9D2, 0x597F, 0xC9D3, 0x5B56,
04878     0xC9D4, 0x5C15, 0xC9D5, 0x5C25, 0xC9D6, 0x5C7C, 0xC9D7, 0x5C7A,
04879     0xC9D8, 0x5C7B, 0xC9D9, 0x5C7E, 0xC9DA, 0x5DDF, 0xC9DB, 0x5E75,
04880     0xC9DC, 0x5E84, 0xC9DD, 0x5F02, 0xC9DE, 0x5F1A, 0xC9DF, 0x5F74,
04881     0xC9E0, 0x5FD5, 0xC9E1, 0x5FD4, 0xC9E2, 0x5FCF, 0xC9E3, 0x625C,
04882     0xC9E4, 0x625E, 0xC9E5, 0x6264, 0xC9E6, 0x6261, 0xC9E7, 0x6266,
04883     0xC9E8, 0x6262, 0xC9E9, 0x6259, 0xC9EA, 0x6260, 0xC9EB, 0x625A,
04884     0xC9EC, 0x6265, 0xC9ED, 0x65EF, 0xC9EE, 0x65EE, 0xC9EF, 0x673E,
04885     0xC9F0, 0x6739, 0xC9F1, 0x6738, 0xC9F2, 0x673B, 0xC9F3, 0x673A,
04886     0xC9F4, 0x673F, 0xC9F5, 0x673C, 0xC9F6, 0x6733, 0xC9F7, 0x6C18,
04887     0xC9F8, 0x6C46, 0xC9F9, 0x6C52, 0xC9FA, 0x6C5C, 0xC9FB, 0x6C4F,
04888     0xC9FC, 0x6C4A, 0xC9FD, 0x6C54, 0xC9FE, 0x6C4B, 0xCA40, 0x6C4C,
04889     0xCA41, 0x7071, 0xCA42, 0x725E, 0xCA43, 0x72B4, 0xCA44, 0x72B5,
04890     0xCA45, 0x738E, 0xCA46, 0x752A, 0xCA47, 0x767F, 0xCA48, 0x7A75,
04891     0xCA49, 0x7F51, 0xCA4A, 0x8278, 0xCA4B, 0x827C, 0xCA4C, 0x8280,
04892     0xCA4D, 0x827D, 0xCA4E, 0x827F, 0xCA4F, 0x864D, 0xCA50, 0x897E,
04893     0xCA51, 0x9099, 0xCA52, 0x9097, 0xCA53, 0x9098, 0xCA54, 0x909B,
04894     0xCA55, 0x9094, 0xCA56, 0x9622, 0xCA57, 0x9624, 0xCA58, 0x9620,
04895     0xCA59, 0x9623, 0xCA5A, 0x4F56, 0xCA5B, 0x4F3B, 0xCA5C, 0x4F62,
04896     0xCA5D, 0x4F49, 0xCA5E, 0x4F53, 0xCA5F, 0x4F64, 0xCA60, 0x4F3E,
04897     0xCA61, 0x4F67, 0xCA62, 0x4F52, 0xCA63, 0x4F5F, 0xCA64, 0x4F41,
04898     0xCA65, 0x4F58, 0xCA66, 0x4F2D, 0xCA67, 0x4F33, 0xCA68, 0x4F3F,
04899     0xCA69, 0x4F61, 0xCA6A, 0x518F, 0xCA6B, 0x51B9, 0xCA6C, 0x521C,
04900     0xCA6D, 0x521E, 0xCA6E, 0x5221, 0xCA6F, 0x52AD, 0xCA70, 0x52AE,
04901     0xCA71, 0x5309, 0xCA72, 0x5363, 0xCA73, 0x5372, 0xCA74, 0x538E,
04902     0xCA75, 0x538F, 0xCA76, 0x5430, 0xCA77, 0x5437, 0xCA78, 0x542A,
04903     0xCA79, 0x5454, 0xCA7A, 0x5445, 0xCA7B, 0x5419, 0xCA7C, 0x541C,
04904     0xCA7D, 0x5425, 0xCA7E, 0x5418, 0xCAA1, 0x543D, 0xCAA2, 0x544F,
04905     0xCAA3, 0x5441, 0xCAA4, 0x5428, 0xCAA5, 0x5424, 0xCAA6, 0x5447,
04906     0xCAA7, 0x56EE, 0xCAA8, 0x56E7, 0xCAA9, 0x56E5, 0xCAAA, 0x5741,
04907     0xCAAB, 0x5745, 0xCAAC, 0x574C, 0xCAAD, 0x5749, 0xCAAE, 0x574B,
04908     0xCAAF, 0x5752, 0xCAB0, 0x5906, 0xCAB1, 0x5940, 0xCAB2, 0x59A6,
04909     0xCAB3, 0x5998, 0xCAB4, 0x59A0, 0xCAB5, 0x5997, 0xCAB6, 0x598E,
04910     0xCAB7, 0x59A2, 0xCAB8, 0x5990, 0xCAB9, 0x598F, 0xCABA, 0x59A7,
04911     0xCABB, 0x59A1, 0xCABC, 0x5B8E, 0xCABD, 0x5B92, 0xCABE, 0x5C28,
04912     0xCABF, 0x5C2A, 0xCAC0, 0x5C8D, 0xCAC1, 0x5C8F, 0xCAC2, 0x5C88,
04913     0xCAC3, 0x5C8B, 0xCAC4, 0x5C89, 0xCAC5, 0x5C92, 0xCAC6, 0x5C8A,
04914     0xCAC7, 0x5C86, 0xCAC8, 0x5C93, 0xCAC9, 0x5C95, 0xCACA, 0x5DE0,
04915     0xCACB, 0x5E0A, 0xCACC, 0x5E0E, 0xCACD, 0x5E8B, 0xCACE, 0x5E89,
04916     0xCACF, 0x5E8C, 0xCAD0, 0x5E88, 0xCAD1, 0x5E8D, 0xCAD2, 0x5F05,
04917     0xCAD3, 0x5F1D, 0xCAD4, 0x5F78, 0xCAD5, 0x5F76, 0xCAD6, 0x5FD2,
04918     0xCAD7, 0x5FD1, 0xCAD8, 0x5FD0, 0xCAD9, 0x5FED, 0xCADA, 0x5FE8,
04919     0xCADB, 0x5FEE, 0xCADC, 0x5FF3, 0xCADD, 0x5FE1, 0xCADE, 0x5FE4,
04920     0xCADF, 0x5FE3, 0xCAE0, 0x5FFA, 0xCAE1, 0x5FEF, 0xCAE2, 0x5FF7,
04921     0xCAE3, 0x5FFB, 0xCAE4, 0x6000, 0xCAE5, 0x5FF4, 0xCAE6, 0x623A,
04922     0xCAE7, 0x6283, 0xCAE8, 0x628C, 0xCAE9, 0x628E, 0xCAEA, 0x628F,
04923     0xCAEB, 0x6294, 0xCAEC, 0x6287, 0xCAED, 0x6271, 0xCAEE, 0x627B,
04924     0xCAEF, 0x627A, 0xCAF0, 0x6270, 0xCAF1, 0x6281, 0xCAF2, 0x6288,
04925     0xCAF3, 0x6277, 0xCAF4, 0x627D, 0xCAF5, 0x6272, 0xCAF6, 0x6274,
04926     0xCAF7, 0x6537, 0xCAF8, 0x65F0, 0xCAF9, 0x65F4, 0xCAFA, 0x65F3,
04927     0xCAFB, 0x65F2, 0xCAFC, 0x65F5, 0xCAFD, 0x6745, 0xCAFE, 0x6747,
04928     0xCB40, 0x6759, 0xCB41, 0x6755, 0xCB42, 0x674C, 0xCB43, 0x6748,
04929     0xCB44, 0x675D, 0xCB45, 0x674D, 0xCB46, 0x675A, 0xCB47, 0x674B,
04930     0xCB48, 0x6BD0, 0xCB49, 0x6C19, 0xCB4A, 0x6C1A, 0xCB4B, 0x6C78,
04931     0xCB4C, 0x6C67, 0xCB4D, 0x6C6B, 0xCB4E, 0x6C84, 0xCB4F, 0x6C8B,
04932     0xCB50, 0x6C8F, 0xCB51, 0x6C71, 0xCB52, 0x6C6F, 0xCB53, 0x6C69,
04933     0xCB54, 0x6C9A, 0xCB55, 0x6C6D, 0xCB56, 0x6C87, 0xCB57, 0x6C95,
04934     0xCB58, 0x6C9C, 0xCB59, 0x6C66, 0xCB5A, 0x6C73, 0xCB5B, 0x6C65,
04935     0xCB5C, 0x6C7B, 0xCB5D, 0x6C8E, 0xCB5E, 0x7074, 0xCB5F, 0x707A,
04936     0xCB60, 0x7263, 0xCB61, 0x72BF, 0xCB62, 0x72BD, 0xCB63, 0x72C3,
04937     0xCB64, 0x72C6, 0xCB65, 0x72C1, 0xCB66, 0x72BA, 0xCB67, 0x72C5,
04938     0xCB68, 0x7395, 0xCB69, 0x7397, 0xCB6A, 0x7393, 0xCB6B, 0x7394,
04939     0xCB6C, 0x7392, 0xCB6D, 0x753A, 0xCB6E, 0x7539, 0xCB6F, 0x7594,
04940     0xCB70, 0x7595, 0xCB71, 0x7681, 0xCB72, 0x793D, 0xCB73, 0x8034,
04941     0xCB74, 0x8095, 0xCB75, 0x8099, 0xCB76, 0x8090, 0xCB77, 0x8092,
04942     0xCB78, 0x809C, 0xCB79, 0x8290, 0xCB7A, 0x828F, 0xCB7B, 0x8285,
04943     0xCB7C, 0x828E, 0xCB7D, 0x8291, 0xCB7E, 0x8293, 0xCBA1, 0x828A,
04944     0xCBA2, 0x8283, 0xCBA3, 0x8284, 0xCBA4, 0x8C78, 0xCBA5, 0x8FC9,
04945     0xCBA6, 0x8FBF, 0xCBA7, 0x909F, 0xCBA8, 0x90A1, 0xCBA9, 0x90A5,
04946     0xCBAA, 0x909E, 0xCBAB, 0x90A7, 0xCBAC, 0x90A0, 0xCBAD, 0x9630,
04947     0xCBAE, 0x9628, 0xCBAF, 0x962F, 0xCBB0, 0x962D, 0xCBB1, 0x4E33,
04948     0xCBB2, 0x4F98, 0xCBB3, 0x4F7C, 0xCBB4, 0x4F85, 0xCBB5, 0x4F7D,
04949     0xCBB6, 0x4F80, 0xCBB7, 0x4F87, 0xCBB8, 0x4F76, 0xCBB9, 0x4F74,
04950     0xCBBA, 0x4F89, 0xCBBB, 0x4F84, 0xCBBC, 0x4F77, 0xCBBD, 0x4F4C,
04951     0xCBBE, 0x4F97, 0xCBBF, 0x4F6A, 0xCBC0, 0x4F9A, 0xCBC1, 0x4F79,
04952     0xCBC2, 0x4F81, 0xCBC3, 0x4F78, 0xCBC4, 0x4F90, 0xCBC5, 0x4F9C,
04953     0xCBC6, 0x4F94, 0xCBC7, 0x4F9E, 0xCBC8, 0x4F92, 0xCBC9, 0x4F82,
04954     0xCBCA, 0x4F95, 0xCBCB, 0x4F6B, 0xCBCC, 0x4F6E, 0xCBCD, 0x519E,
04955     0xCBCE, 0x51BC, 0xCBCF, 0x51BE, 0xCBD0, 0x5235, 0xCBD1, 0x5232,
04956     0xCBD2, 0x5233, 0xCBD3, 0x5246, 0xCBD4, 0x5231, 0xCBD5, 0x52BC,
04957     0xCBD6, 0x530A, 0xCBD7, 0x530B, 0xCBD8, 0x533C, 0xCBD9, 0x5392,
04958     0xCBDA, 0x5394, 0xCBDB, 0x5487, 0xCBDC, 0x547F, 0xCBDD, 0x5481,
04959     0xCBDE, 0x5491, 0xCBDF, 0x5482, 0xCBE0, 0x5488, 0xCBE1, 0x546B,
04960     0xCBE2, 0x547A, 0xCBE3, 0x547E, 0xCBE4, 0x5465, 0xCBE5, 0x546C,
04961     0xCBE6, 0x5474, 0xCBE7, 0x5466, 0xCBE8, 0x548D, 0xCBE9, 0x546F,
04962     0xCBEA, 0x5461, 0xCBEB, 0x5460, 0xCBEC, 0x5498, 0xCBED, 0x5463,
04963     0xCBEE, 0x5467, 0xCBEF, 0x5464, 0xCBF0, 0x56F7, 0xCBF1, 0x56F9,
04964     0xCBF2, 0x576F, 0xCBF3, 0x5772, 0xCBF4, 0x576D, 0xCBF5, 0x576B,
04965     0xCBF6, 0x5771, 0xCBF7, 0x5770, 0xCBF8, 0x5776, 0xCBF9, 0x5780,
04966     0xCBFA, 0x5775, 0xCBFB, 0x577B, 0xCBFC, 0x5773, 0xCBFD, 0x5774,
04967     0xCBFE, 0x5762, 0xCC40, 0x5768, 0xCC41, 0x577D, 0xCC42, 0x590C,
04968     0xCC43, 0x5945, 0xCC44, 0x59B5, 0xCC45, 0x59BA, 0xCC46, 0x59CF,
04969     0xCC47, 0x59CE, 0xCC48, 0x59B2, 0xCC49, 0x59CC, 0xCC4A, 0x59C1,
04970     0xCC4B, 0x59B6, 0xCC4C, 0x59BC, 0xCC4D, 0x59C3, 0xCC4E, 0x59D6,
04971     0xCC4F, 0x59B1, 0xCC50, 0x59BD, 0xCC51, 0x59C0, 0xCC52, 0x59C8,
04972     0xCC53, 0x59B4, 0xCC54, 0x59C7, 0xCC55, 0x5B62, 0xCC56, 0x5B65,
04973     0xCC57, 0x5B93, 0xCC58, 0x5B95, 0xCC59, 0x5C44, 0xCC5A, 0x5C47,
04974     0xCC5B, 0x5CAE, 0xCC5C, 0x5CA4, 0xCC5D, 0x5CA0, 0xCC5E, 0x5CB5,
04975     0xCC5F, 0x5CAF, 0xCC60, 0x5CA8, 0xCC61, 0x5CAC, 0xCC62, 0x5C9F,
04976     0xCC63, 0x5CA3, 0xCC64, 0x5CAD, 0xCC65, 0x5CA2, 0xCC66, 0x5CAA,
04977     0xCC67, 0x5CA7, 0xCC68, 0x5C9D, 0xCC69, 0x5CA5, 0xCC6A, 0x5CB6,
04978     0xCC6B, 0x5CB0, 0xCC6C, 0x5CA6, 0xCC6D, 0x5E17, 0xCC6E, 0x5E14,
04979     0xCC6F, 0x5E19, 0xCC70, 0x5F28, 0xCC71, 0x5F22, 0xCC72, 0x5F23,
04980     0xCC73, 0x5F24, 0xCC74, 0x5F54, 0xCC75, 0x5F82, 0xCC76, 0x5F7E,
04981     0xCC77, 0x5F7D, 0xCC78, 0x5FDE, 0xCC79, 0x5FE5, 0xCC7A, 0x602D,
04982     0xCC7B, 0x6026, 0xCC7C, 0x6019, 0xCC7D, 0x6032, 0xCC7E, 0x600B,
04983     0xCCA1, 0x6034, 0xCCA2, 0x600A, 0xCCA3, 0x6017, 0xCCA4, 0x6033,
04984     0xCCA5, 0x601A, 0xCCA6, 0x601E, 0xCCA7, 0x602C, 0xCCA8, 0x6022,
04985     0xCCA9, 0x600D, 0xCCAA, 0x6010, 0xCCAB, 0x602E, 0xCCAC, 0x6013,
04986     0xCCAD, 0x6011, 0xCCAE, 0x600C, 0xCCAF, 0x6009, 0xCCB0, 0x601C,
04987     0xCCB1, 0x6214, 0xCCB2, 0x623D, 0xCCB3, 0x62AD, 0xCCB4, 0x62B4,
04988     0xCCB5, 0x62D1, 0xCCB6, 0x62BE, 0xCCB7, 0x62AA, 0xCCB8, 0x62B6,
04989     0xCCB9, 0x62CA, 0xCCBA, 0x62AE, 0xCCBB, 0x62B3, 0xCCBC, 0x62AF,
04990     0xCCBD, 0x62BB, 0xCCBE, 0x62A9, 0xCCBF, 0x62B0, 0xCCC0, 0x62B8,
04991     0xCCC1, 0x653D, 0xCCC2, 0x65A8, 0xCCC3, 0x65BB, 0xCCC4, 0x6609,
04992     0xCCC5, 0x65FC, 0xCCC6, 0x6604, 0xCCC7, 0x6612, 0xCCC8, 0x6608,
04993     0xCCC9, 0x65FB, 0xCCCA, 0x6603, 0xCCCB, 0x660B, 0xCCCC, 0x660D,
04994     0xCCCD, 0x6605, 0xCCCE, 0x65FD, 0xCCCF, 0x6611, 0xCCD0, 0x6610,
04995     0xCCD1, 0x66F6, 0xCCD2, 0x670A, 0xCCD3, 0x6785, 0xCCD4, 0x676C,
04996     0xCCD5, 0x678E, 0xCCD6, 0x6792, 0xCCD7, 0x6776, 0xCCD8, 0x677B,
04997     0xCCD9, 0x6798, 0xCCDA, 0x6786, 0xCCDB, 0x6784, 0xCCDC, 0x6774,
04998     0xCCDD, 0x678D, 0xCCDE, 0x678C, 0xCCDF, 0x677A, 0xCCE0, 0x679F,
04999     0xCCE1, 0x6791, 0xCCE2, 0x6799, 0xCCE3, 0x6783, 0xCCE4, 0x677D,
05000     0xCCE5, 0x6781, 0xCCE6, 0x6778, 0xCCE7, 0x6779, 0xCCE8, 0x6794,
05001     0xCCE9, 0x6B25, 0xCCEA, 0x6B80, 0xCCEB, 0x6B7E, 0xCCEC, 0x6BDE,
05002     0xCCED, 0x6C1D, 0xCCEE, 0x6C93, 0xCCEF, 0x6CEC, 0xCCF0, 0x6CEB,
05003     0xCCF1, 0x6CEE, 0xCCF2, 0x6CD9, 0xCCF3, 0x6CB6, 0xCCF4, 0x6CD4,
05004     0xCCF5, 0x6CAD, 0xCCF6, 0x6CE7, 0xCCF7, 0x6CB7, 0xCCF8, 0x6CD0,
05005     0xCCF9, 0x6CC2, 0xCCFA, 0x6CBA, 0xCCFB, 0x6CC3, 0xCCFC, 0x6CC6,
05006     0xCCFD, 0x6CED, 0xCCFE, 0x6CF2, 0xCD40, 0x6CD2, 0xCD41, 0x6CDD,
05007     0xCD42, 0x6CB4, 0xCD43, 0x6C8A, 0xCD44, 0x6C9D, 0xCD45, 0x6C80,
05008     0xCD46, 0x6CDE, 0xCD47, 0x6CC0, 0xCD48, 0x6D30, 0xCD49, 0x6CCD,
05009     0xCD4A, 0x6CC7, 0xCD4B, 0x6CB0, 0xCD4C, 0x6CF9, 0xCD4D, 0x6CCF,
05010     0xCD4E, 0x6CE9, 0xCD4F, 0x6CD1, 0xCD50, 0x7094, 0xCD51, 0x7098,
05011     0xCD52, 0x7085, 0xCD53, 0x7093, 0xCD54, 0x7086, 0xCD55, 0x7084,
05012     0xCD56, 0x7091, 0xCD57, 0x7096, 0xCD58, 0x7082, 0xCD59, 0x709A,
05013     0xCD5A, 0x7083, 0xCD5B, 0x726A, 0xCD5C, 0x72D6, 0xCD5D, 0x72CB,
05014     0xCD5E, 0x72D8, 0xCD5F, 0x72C9, 0xCD60, 0x72DC, 0xCD61, 0x72D2,
05015     0xCD62, 0x72D4, 0xCD63, 0x72DA, 0xCD64, 0x72CC, 0xCD65, 0x72D1,
05016     0xCD66, 0x73A4, 0xCD67, 0x73A1, 0xCD68, 0x73AD, 0xCD69, 0x73A6,
05017     0xCD6A, 0x73A2, 0xCD6B, 0x73A0, 0xCD6C, 0x73AC, 0xCD6D, 0x739D,
05018     0xCD6E, 0x74DD, 0xCD6F, 0x74E8, 0xCD70, 0x753F, 0xCD71, 0x7540,
05019     0xCD72, 0x753E, 0xCD73, 0x758C, 0xCD74, 0x7598, 0xCD75, 0x76AF,
05020     0xCD76, 0x76F3, 0xCD77, 0x76F1, 0xCD78, 0x76F0, 0xCD79, 0x76F5,
05021     0xCD7A, 0x77F8, 0xCD7B, 0x77FC, 0xCD7C, 0x77F9, 0xCD7D, 0x77FB,
05022     0xCD7E, 0x77FA, 0xCDA1, 0x77F7, 0xCDA2, 0x7942, 0xCDA3, 0x793F,
05023     0xCDA4, 0x79C5, 0xCDA5, 0x7A78, 0xCDA6, 0x7A7B, 0xCDA7, 0x7AFB,
05024     0xCDA8, 0x7C75, 0xCDA9, 0x7CFD, 0xCDAA, 0x8035, 0xCDAB, 0x808F,
05025     0xCDAC, 0x80AE, 0xCDAD, 0x80A3, 0xCDAE, 0x80B8, 0xCDAF, 0x80B5,
05026     0xCDB0, 0x80AD, 0xCDB1, 0x8220, 0xCDB2, 0x82A0, 0xCDB3, 0x82C0,
05027     0xCDB4, 0x82AB, 0xCDB5, 0x829A, 0xCDB6, 0x8298, 0xCDB7, 0x829B,
05028     0xCDB8, 0x82B5, 0xCDB9, 0x82A7, 0xCDBA, 0x82AE, 0xCDBB, 0x82BC,
05029     0xCDBC, 0x829E, 0xCDBD, 0x82BA, 0xCDBE, 0x82B4, 0xCDBF, 0x82A8,
05030     0xCDC0, 0x82A1, 0xCDC1, 0x82A9, 0xCDC2, 0x82C2, 0xCDC3, 0x82A4,
05031     0xCDC4, 0x82C3, 0xCDC5, 0x82B6, 0xCDC6, 0x82A2, 0xCDC7, 0x8670,
05032     0xCDC8, 0x866F, 0xCDC9, 0x866D, 0xCDCA, 0x866E, 0xCDCB, 0x8C56,
05033     0xCDCC, 0x8FD2, 0xCDCD, 0x8FCB, 0xCDCE, 0x8FD3, 0xCDCF, 0x8FCD,
05034     0xCDD0, 0x8FD6, 0xCDD1, 0x8FD5, 0xCDD2, 0x8FD7, 0xCDD3, 0x90B2,
05035     0xCDD4, 0x90B4, 0xCDD5, 0x90AF, 0xCDD6, 0x90B3, 0xCDD7, 0x90B0,
05036     0xCDD8, 0x9639, 0xCDD9, 0x963D, 0xCDDA, 0x963C, 0xCDDB, 0x963A,
05037     0xCDDC, 0x9643, 0xCDDD, 0x4FCD, 0xCDDE, 0x4FC5, 0xCDDF, 0x4FD3,
05038     0xCDE0, 0x4FB2, 0xCDE1, 0x4FC9, 0xCDE2, 0x4FCB, 0xCDE3, 0x4FC1,
05039     0xCDE4, 0x4FD4, 0xCDE5, 0x4FDC, 0xCDE6, 0x4FD9, 0xCDE7, 0x4FBB,
05040     0xCDE8, 0x4FB3, 0xCDE9, 0x4FDB, 0xCDEA, 0x4FC7, 0xCDEB, 0x4FD6,
05041     0xCDEC, 0x4FBA, 0xCDED, 0x4FC0, 0xCDEE, 0x4FB9, 0xCDEF, 0x4FEC,
05042     0xCDF0, 0x5244, 0xCDF1, 0x5249, 0xCDF2, 0x52C0, 0xCDF3, 0x52C2,
05043     0xCDF4, 0x533D, 0xCDF5, 0x537C, 0xCDF6, 0x5397, 0xCDF7, 0x5396,
05044     0xCDF8, 0x5399, 0xCDF9, 0x5398, 0xCDFA, 0x54BA, 0xCDFB, 0x54A1,
05045     0xCDFC, 0x54AD, 0xCDFD, 0x54A5, 0xCDFE, 0x54CF, 0xCE40, 0x54C3,
05046     0xCE41, 0x830D, 0xCE42, 0x54B7, 0xCE43, 0x54AE, 0xCE44, 0x54D6,
05047     0xCE45, 0x54B6, 0xCE46, 0x54C5, 0xCE47, 0x54C6, 0xCE48, 0x54A0,
05048     0xCE49, 0x5470, 0xCE4A, 0x54BC, 0xCE4B, 0x54A2, 0xCE4C, 0x54BE,
05049     0xCE4D, 0x5472, 0xCE4E, 0x54DE, 0xCE4F, 0x54B0, 0xCE50, 0x57B5,
05050     0xCE51, 0x579E, 0xCE52, 0x579F, 0xCE53, 0x57A4, 0xCE54, 0x578C,
05051     0xCE55, 0x5797, 0xCE56, 0x579D, 0xCE57, 0x579B, 0xCE58, 0x5794,
05052     0xCE59, 0x5798, 0xCE5A, 0x578F, 0xCE5B, 0x5799, 0xCE5C, 0x57A5,
05053     0xCE5D, 0x579A, 0xCE5E, 0x5795, 0xCE5F, 0x58F4, 0xCE60, 0x590D,
05054     0xCE61, 0x5953, 0xCE62, 0x59E1, 0xCE63, 0x59DE, 0xCE64, 0x59EE,
05055     0xCE65, 0x5A00, 0xCE66, 0x59F1, 0xCE67, 0x59DD, 0xCE68, 0x59FA,
05056     0xCE69, 0x59FD, 0xCE6A, 0x59FC, 0xCE6B, 0x59F6, 0xCE6C, 0x59E4,
05057     0xCE6D, 0x59F2, 0xCE6E, 0x59F7, 0xCE6F, 0x59DB, 0xCE70, 0x59E9,
05058     0xCE71, 0x59F3, 0xCE72, 0x59F5, 0xCE73, 0x59E0, 0xCE74, 0x59FE,
05059     0xCE75, 0x59F4, 0xCE76, 0x59ED, 0xCE77, 0x5BA8, 0xCE78, 0x5C4C,
05060     0xCE79, 0x5CD0, 0xCE7A, 0x5CD8, 0xCE7B, 0x5CCC, 0xCE7C, 0x5CD7,
05061     0xCE7D, 0x5CCB, 0xCE7E, 0x5CDB, 0xCEA1, 0x5CDE, 0xCEA2, 0x5CDA,
05062     0xCEA3, 0x5CC9, 0xCEA4, 0x5CC7, 0xCEA5, 0x5CCA, 0xCEA6, 0x5CD6,
05063     0xCEA7, 0x5CD3, 0xCEA8, 0x5CD4, 0xCEA9, 0x5CCF, 0xCEAA, 0x5CC8,
05064     0xCEAB, 0x5CC6, 0xCEAC, 0x5CCE, 0xCEAD, 0x5CDF, 0xCEAE, 0x5CF8,
05065     0xCEAF, 0x5DF9, 0xCEB0, 0x5E21, 0xCEB1, 0x5E22, 0xCEB2, 0x5E23,
05066     0xCEB3, 0x5E20, 0xCEB4, 0x5E24, 0xCEB5, 0x5EB0, 0xCEB6, 0x5EA4,
05067     0xCEB7, 0x5EA2, 0xCEB8, 0x5E9B, 0xCEB9, 0x5EA3, 0xCEBA, 0x5EA5,
05068     0xCEBB, 0x5F07, 0xCEBC, 0x5F2E, 0xCEBD, 0x5F56, 0xCEBE, 0x5F86,
05069     0xCEBF, 0x6037, 0xCEC0, 0x6039, 0xCEC1, 0x6054, 0xCEC2, 0x6072,
05070     0xCEC3, 0x605E, 0xCEC4, 0x6045, 0xCEC5, 0x6053, 0xCEC6, 0x6047,
05071     0xCEC7, 0x6049, 0xCEC8, 0x605B, 0xCEC9, 0x604C, 0xCECA, 0x6040,
05072     0xCECB, 0x6042, 0xCECC, 0x605F, 0xCECD, 0x6024, 0xCECE, 0x6044,
05073     0xCECF, 0x6058, 0xCED0, 0x6066, 0xCED1, 0x606E, 0xCED2, 0x6242,
05074     0xCED3, 0x6243, 0xCED4, 0x62CF, 0xCED5, 0x630D, 0xCED6, 0x630B,
05075     0xCED7, 0x62F5, 0xCED8, 0x630E, 0xCED9, 0x6303, 0xCEDA, 0x62EB,
05076     0xCEDB, 0x62F9, 0xCEDC, 0x630F, 0xCEDD, 0x630C, 0xCEDE, 0x62F8,
05077     0xCEDF, 0x62F6, 0xCEE0, 0x6300, 0xCEE1, 0x6313, 0xCEE2, 0x6314,
05078     0xCEE3, 0x62FA, 0xCEE4, 0x6315, 0xCEE5, 0x62FB, 0xCEE6, 0x62F0,
05079     0xCEE7, 0x6541, 0xCEE8, 0x6543, 0xCEE9, 0x65AA, 0xCEEA, 0x65BF,
05080     0xCEEB, 0x6636, 0xCEEC, 0x6621, 0xCEED, 0x6632, 0xCEEE, 0x6635,
05081     0xCEEF, 0x661C, 0xCEF0, 0x6626, 0xCEF1, 0x6622, 0xCEF2, 0x6633,
05082     0xCEF3, 0x662B, 0xCEF4, 0x663A, 0xCEF5, 0x661D, 0xCEF6, 0x6634,
05083     0xCEF7, 0x6639, 0xCEF8, 0x662E, 0xCEF9, 0x670F, 0xCEFA, 0x6710,
05084     0xCEFB, 0x67C1, 0xCEFC, 0x67F2, 0xCEFD, 0x67C8, 0xCEFE, 0x67BA,
05085     0xCF40, 0x67DC, 0xCF41, 0x67BB, 0xCF42, 0x67F8, 0xCF43, 0x67D8,
05086     0xCF44, 0x67C0, 0xCF45, 0x67B7, 0xCF46, 0x67C5, 0xCF47, 0x67EB,
05087     0xCF48, 0x67E4, 0xCF49, 0x67DF, 0xCF4A, 0x67B5, 0xCF4B, 0x67CD,
05088     0xCF4C, 0x67B3, 0xCF4D, 0x67F7, 0xCF4E, 0x67F6, 0xCF4F, 0x67EE,
05089     0xCF50, 0x67E3, 0xCF51, 0x67C2, 0xCF52, 0x67B9, 0xCF53, 0x67CE,
05090     0xCF54, 0x67E7, 0xCF55, 0x67F0, 0xCF56, 0x67B2, 0xCF57, 0x67FC,
05091     0xCF58, 0x67C6, 0xCF59, 0x67ED, 0xCF5A, 0x67CC, 0xCF5B, 0x67AE,
05092     0xCF5C, 0x67E6, 0xCF5D, 0x67DB, 0xCF5E, 0x67FA, 0xCF5F, 0x67C9,
05093     0xCF60, 0x67CA, 0xCF61, 0x67C3, 0xCF62, 0x67EA, 0xCF63, 0x67CB,
05094     0xCF64, 0x6B28, 0xCF65, 0x6B82, 0xCF66, 0x6B84, 0xCF67, 0x6BB6,
05095     0xCF68, 0x6BD6, 0xCF69, 0x6BD8, 0xCF6A, 0x6BE0, 0xCF6B, 0x6C20,
05096     0xCF6C, 0x6C21, 0xCF6D, 0x6D28, 0xCF6E, 0x6D34, 0xCF6F, 0x6D2D,
05097     0xCF70, 0x6D1F, 0xCF71, 0x6D3C, 0xCF72, 0x6D3F, 0xCF73, 0x6D12,
05098     0xCF74, 0x6D0A, 0xCF75, 0x6CDA, 0xCF76, 0x6D33, 0xCF77, 0x6D04,
05099     0xCF78, 0x6D19, 0xCF79, 0x6D3A, 0xCF7A, 0x6D1A, 0xCF7B, 0x6D11,
05100     0xCF7C, 0x6D00, 0xCF7D, 0x6D1D, 0xCF7E, 0x6D42, 0xCFA1, 0x6D01,
05101     0xCFA2, 0x6D18, 0xCFA3, 0x6D37, 0xCFA4, 0x6D03, 0xCFA5, 0x6D0F,
05102     0xCFA6, 0x6D40, 0xCFA7, 0x6D07, 0xCFA8, 0x6D20, 0xCFA9, 0x6D2C,
05103     0xCFAA, 0x6D08, 0xCFAB, 0x6D22, 0xCFAC, 0x6D09, 0xCFAD, 0x6D10,
05104     0xCFAE, 0x70B7, 0xCFAF, 0x709F, 0xCFB0, 0x70BE, 0xCFB1, 0x70B1,
05105     0xCFB2, 0x70B0, 0xCFB3, 0x70A1, 0xCFB4, 0x70B4, 0xCFB5, 0x70B5,
05106     0xCFB6, 0x70A9, 0xCFB7, 0x7241, 0xCFB8, 0x7249, 0xCFB9, 0x724A,
05107     0xCFBA, 0x726C, 0xCFBB, 0x7270, 0xCFBC, 0x7273, 0xCFBD, 0x726E,
05108     0xCFBE, 0x72CA, 0xCFBF, 0x72E4, 0xCFC0, 0x72E8, 0xCFC1, 0x72EB,
05109     0xCFC2, 0x72DF, 0xCFC3, 0x72EA, 0xCFC4, 0x72E6, 0xCFC5, 0x72E3,
05110     0xCFC6, 0x7385, 0xCFC7, 0x73CC, 0xCFC8, 0x73C2, 0xCFC9, 0x73C8,
05111     0xCFCA, 0x73C5, 0xCFCB, 0x73B9, 0xCFCC, 0x73B6, 0xCFCD, 0x73B5,
05112     0xCFCE, 0x73B4, 0xCFCF, 0x73EB, 0xCFD0, 0x73BF, 0xCFD1, 0x73C7,
05113     0xCFD2, 0x73BE, 0xCFD3, 0x73C3, 0xCFD4, 0x73C6, 0xCFD5, 0x73B8,
05114     0xCFD6, 0x73CB, 0xCFD7, 0x74EC, 0xCFD8, 0x74EE, 0xCFD9, 0x752E,
05115     0xCFDA, 0x7547, 0xCFDB, 0x7548, 0xCFDC, 0x75A7, 0xCFDD, 0x75AA,
05116     0xCFDE, 0x7679, 0xCFDF, 0x76C4, 0xCFE0, 0x7708, 0xCFE1, 0x7703,
05117     0xCFE2, 0x7704, 0xCFE3, 0x7705, 0xCFE4, 0x770A, 0xCFE5, 0x76F7,
05118     0xCFE6, 0x76FB, 0xCFE7, 0x76FA, 0xCFE8, 0x77E7, 0xCFE9, 0x77E8,
05119     0xCFEA, 0x7806, 0xCFEB, 0x7811, 0xCFEC, 0x7812, 0xCFED, 0x7805,
05120     0xCFEE, 0x7810, 0xCFEF, 0x780F, 0xCFF0, 0x780E, 0xCFF1, 0x7809,
05121     0xCFF2, 0x7803, 0xCFF3, 0x7813, 0xCFF4, 0x794A, 0xCFF5, 0x794C,
05122     0xCFF6, 0x794B, 0xCFF7, 0x7945, 0xCFF8, 0x7944, 0xCFF9, 0x79D5,
05123     0xCFFA, 0x79CD, 0xCFFB, 0x79CF, 0xCFFC, 0x79D6, 0xCFFD, 0x79CE,
05124     0xCFFE, 0x7A80, 0xD040, 0x7A7E, 0xD041, 0x7AD1, 0xD042, 0x7B00,
05125     0xD043, 0x7B01, 0xD044, 0x7C7A, 0xD045, 0x7C78, 0xD046, 0x7C79,
05126     0xD047, 0x7C7F, 0xD048, 0x7C80, 0xD049, 0x7C81, 0xD04A, 0x7D03,
05127     0xD04B, 0x7D08, 0xD04C, 0x7D01, 0xD04D, 0x7F58, 0xD04E, 0x7F91,
05128     0xD04F, 0x7F8D, 0xD050, 0x7FBE, 0xD051, 0x8007, 0xD052, 0x800E,
05129     0xD053, 0x800F, 0xD054, 0x8014, 0xD055, 0x8037, 0xD056, 0x80D8,
05130     0xD057, 0x80C7, 0xD058, 0x80E0, 0xD059, 0x80D1, 0xD05A, 0x80C8,
05131     0xD05B, 0x80C2, 0xD05C, 0x80D0, 0xD05D, 0x80C5, 0xD05E, 0x80E3,
05132     0xD05F, 0x80D9, 0xD060, 0x80DC, 0xD061, 0x80CA, 0xD062, 0x80D5,
05133     0xD063, 0x80C9, 0xD064, 0x80CF, 0xD065, 0x80D7, 0xD066, 0x80E6,
05134     0xD067, 0x80CD, 0xD068, 0x81FF, 0xD069, 0x8221, 0xD06A, 0x8294,
05135     0xD06B, 0x82D9, 0xD06C, 0x82FE, 0xD06D, 0x82F9, 0xD06E, 0x8307,
05136     0xD06F, 0x82E8, 0xD070, 0x8300, 0xD071, 0x82D5, 0xD072, 0x833A,
05137     0xD073, 0x82EB, 0xD074, 0x82D6, 0xD075, 0x82F4, 0xD076, 0x82EC,
05138     0xD077, 0x82E1, 0xD078, 0x82F2, 0xD079, 0x82F5, 0xD07A, 0x830C,
05139     0xD07B, 0x82FB, 0xD07C, 0x82F6, 0xD07D, 0x82F0, 0xD07E, 0x82EA,
05140     0xD0A1, 0x82E4, 0xD0A2, 0x82E0, 0xD0A3, 0x82FA, 0xD0A4, 0x82F3,
05141     0xD0A5, 0x82ED, 0xD0A6, 0x8677, 0xD0A7, 0x8674, 0xD0A8, 0x867C,
05142     0xD0A9, 0x8673, 0xD0AA, 0x8841, 0xD0AB, 0x884E, 0xD0AC, 0x8867,
05143     0xD0AD, 0x886A, 0xD0AE, 0x8869, 0xD0AF, 0x89D3, 0xD0B0, 0x8A04,
05144     0xD0B1, 0x8A07, 0xD0B2, 0x8D72, 0xD0B3, 0x8FE3, 0xD0B4, 0x8FE1,
05145     0xD0B5, 0x8FEE, 0xD0B6, 0x8FE0, 0xD0B7, 0x90F1, 0xD0B8, 0x90BD,
05146     0xD0B9, 0x90BF, 0xD0BA, 0x90D5, 0xD0BB, 0x90C5, 0xD0BC, 0x90BE,
05147     0xD0BD, 0x90C7, 0xD0BE, 0x90CB, 0xD0BF, 0x90C8, 0xD0C0, 0x91D4,
05148     0xD0C1, 0x91D3, 0xD0C2, 0x9654, 0xD0C3, 0x964F, 0xD0C4, 0x9651,
05149     0xD0C5, 0x9653, 0xD0C6, 0x964A, 0xD0C7, 0x964E, 0xD0C8, 0x501E,
05150     0xD0C9, 0x5005, 0xD0CA, 0x5007, 0xD0CB, 0x5013, 0xD0CC, 0x5022,
05151     0xD0CD, 0x5030, 0xD0CE, 0x501B, 0xD0CF, 0x4FF5, 0xD0D0, 0x4FF4,
05152     0xD0D1, 0x5033, 0xD0D2, 0x5037, 0xD0D3, 0x502C, 0xD0D4, 0x4FF6,
05153     0xD0D5, 0x4FF7, 0xD0D6, 0x5017, 0xD0D7, 0x501C, 0xD0D8, 0x5020,
05154     0xD0D9, 0x5027, 0xD0DA, 0x5035, 0xD0DB, 0x502F, 0xD0DC, 0x5031,
05155     0xD0DD, 0x500E, 0xD0DE, 0x515A, 0xD0DF, 0x5194, 0xD0E0, 0x5193,
05156     0xD0E1, 0x51CA, 0xD0E2, 0x51C4, 0xD0E3, 0x51C5, 0xD0E4, 0x51C8,
05157     0xD0E5, 0x51CE, 0xD0E6, 0x5261, 0xD0E7, 0x525A, 0xD0E8, 0x5252,
05158     0xD0E9, 0x525E, 0xD0EA, 0x525F, 0xD0EB, 0x5255, 0xD0EC, 0x5262,
05159     0xD0ED, 0x52CD, 0xD0EE, 0x530E, 0xD0EF, 0x539E, 0xD0F0, 0x5526,
05160     0xD0F1, 0x54E2, 0xD0F2, 0x5517, 0xD0F3, 0x5512, 0xD0F4, 0x54E7,
05161     0xD0F5, 0x54F3, 0xD0F6, 0x54E4, 0xD0F7, 0x551A, 0xD0F8, 0x54FF,
05162     0xD0F9, 0x5504, 0xD0FA, 0x5508, 0xD0FB, 0x54EB, 0xD0FC, 0x5511,
05163     0xD0FD, 0x5505, 0xD0FE, 0x54F1, 0xD140, 0x550A, 0xD141, 0x54FB,
05164     0xD142, 0x54F7, 0xD143, 0x54F8, 0xD144, 0x54E0, 0xD145, 0x550E,
05165     0xD146, 0x5503, 0xD147, 0x550B, 0xD148, 0x5701, 0xD149, 0x5702,
05166     0xD14A, 0x57CC, 0xD14B, 0x5832, 0xD14C, 0x57D5, 0xD14D, 0x57D2,
05167     0xD14E, 0x57BA, 0xD14F, 0x57C6, 0xD150, 0x57BD, 0xD151, 0x57BC,
05168     0xD152, 0x57B8, 0xD153, 0x57B6, 0xD154, 0x57BF, 0xD155, 0x57C7,
05169     0xD156, 0x57D0, 0xD157, 0x57B9, 0xD158, 0x57C1, 0xD159, 0x590E,
05170     0xD15A, 0x594A, 0xD15B, 0x5A19, 0xD15C, 0x5A16, 0xD15D, 0x5A2D,
05171     0xD15E, 0x5A2E, 0xD15F, 0x5A15, 0xD160, 0x5A0F, 0xD161, 0x5A17,
05172     0xD162, 0x5A0A, 0xD163, 0x5A1E, 0xD164, 0x5A33, 0xD165, 0x5B6C,
05173     0xD166, 0x5BA7, 0xD167, 0x5BAD, 0xD168, 0x5BAC, 0xD169, 0x5C03,
05174     0xD16A, 0x5C56, 0xD16B, 0x5C54, 0xD16C, 0x5CEC, 0xD16D, 0x5CFF,
05175     0xD16E, 0x5CEE, 0xD16F, 0x5CF1, 0xD170, 0x5CF7, 0xD171, 0x5D00,
05176     0xD172, 0x5CF9, 0xD173, 0x5E29, 0xD174, 0x5E28, 0xD175, 0x5EA8,
05177     0xD176, 0x5EAE, 0xD177, 0x5EAA, 0xD178, 0x5EAC, 0xD179, 0x5F33,
05178     0xD17A, 0x5F30, 0xD17B, 0x5F67, 0xD17C, 0x605D, 0xD17D, 0x605A,
05179     0xD17E, 0x6067, 0xD1A1, 0x6041, 0xD1A2, 0x60A2, 0xD1A3, 0x6088,
05180     0xD1A4, 0x6080, 0xD1A5, 0x6092, 0xD1A6, 0x6081, 0xD1A7, 0x609D,
05181     0xD1A8, 0x6083, 0xD1A9, 0x6095, 0xD1AA, 0x609B, 0xD1AB, 0x6097,
05182     0xD1AC, 0x6087, 0xD1AD, 0x609C, 0xD1AE, 0x608E, 0xD1AF, 0x6219,
05183     0xD1B0, 0x6246, 0xD1B1, 0x62F2, 0xD1B2, 0x6310, 0xD1B3, 0x6356,
05184     0xD1B4, 0x632C, 0xD1B5, 0x6344, 0xD1B6, 0x6345, 0xD1B7, 0x6336,
05185     0xD1B8, 0x6343, 0xD1B9, 0x63E4, 0xD1BA, 0x6339, 0xD1BB, 0x634B,
05186     0xD1BC, 0x634A, 0xD1BD, 0x633C, 0xD1BE, 0x6329, 0xD1BF, 0x6341,
05187     0xD1C0, 0x6334, 0xD1C1, 0x6358, 0xD1C2, 0x6354, 0xD1C3, 0x6359,
05188     0xD1C4, 0x632D, 0xD1C5, 0x6347, 0xD1C6, 0x6333, 0xD1C7, 0x635A,
05189     0xD1C8, 0x6351, 0xD1C9, 0x6338, 0xD1CA, 0x6357, 0xD1CB, 0x6340,
05190     0xD1CC, 0x6348, 0xD1CD, 0x654A, 0xD1CE, 0x6546, 0xD1CF, 0x65C6,
05191     0xD1D0, 0x65C3, 0xD1D1, 0x65C4, 0xD1D2, 0x65C2, 0xD1D3, 0x664A,
05192     0xD1D4, 0x665F, 0xD1D5, 0x6647, 0xD1D6, 0x6651, 0xD1D7, 0x6712,
05193     0xD1D8, 0x6713, 0xD1D9, 0x681F, 0xD1DA, 0x681A, 0xD1DB, 0x6849,
05194     0xD1DC, 0x6832, 0xD1DD, 0x6833, 0xD1DE, 0x683B, 0xD1DF, 0x684B,
05195     0xD1E0, 0x684F, 0xD1E1, 0x6816, 0xD1E2, 0x6831, 0xD1E3, 0x681C,
05196     0xD1E4, 0x6835, 0xD1E5, 0x682B, 0xD1E6, 0x682D, 0xD1E7, 0x682F,
05197     0xD1E8, 0x684E, 0xD1E9, 0x6844, 0xD1EA, 0x6834, 0xD1EB, 0x681D,
05198     0xD1EC, 0x6812, 0xD1ED, 0x6814, 0xD1EE, 0x6826, 0xD1EF, 0x6828,
05199     0xD1F0, 0x682E, 0xD1F1, 0x684D, 0xD1F2, 0x683A, 0xD1F3, 0x6825,
05200     0xD1F4, 0x6820, 0xD1F5, 0x6B2C, 0xD1F6, 0x6B2F, 0xD1F7, 0x6B2D,
05201     0xD1F8, 0x6B31, 0xD1F9, 0x6B34, 0xD1FA, 0x6B6D, 0xD1FB, 0x8082,
05202     0xD1FC, 0x6B88, 0xD1FD, 0x6BE6, 0xD1FE, 0x6BE4, 0xD240, 0x6BE8,
05203     0xD241, 0x6BE3, 0xD242, 0x6BE2, 0xD243, 0x6BE7, 0xD244, 0x6C25,
05204     0xD245, 0x6D7A, 0xD246, 0x6D63, 0xD247, 0x6D64, 0xD248, 0x6D76,
05205     0xD249, 0x6D0D, 0xD24A, 0x6D61, 0xD24B, 0x6D92, 0xD24C, 0x6D58,
05206     0xD24D, 0x6D62, 0xD24E, 0x6D6D, 0xD24F, 0x6D6F, 0xD250, 0x6D91,
05207     0xD251, 0x6D8D, 0xD252, 0x6DEF, 0xD253, 0x6D7F, 0xD254, 0x6D86,
05208     0xD255, 0x6D5E, 0xD256, 0x6D67, 0xD257, 0x6D60, 0xD258, 0x6D97,
05209     0xD259, 0x6D70, 0xD25A, 0x6D7C, 0xD25B, 0x6D5F, 0xD25C, 0x6D82,
05210     0xD25D, 0x6D98, 0xD25E, 0x6D2F, 0xD25F, 0x6D68, 0xD260, 0x6D8B,
05211     0xD261, 0x6D7E, 0xD262, 0x6D80, 0xD263, 0x6D84, 0xD264, 0x6D16,
05212     0xD265, 0x6D83, 0xD266, 0x6D7B, 0xD267, 0x6D7D, 0xD268, 0x6D75,
05213     0xD269, 0x6D90, 0xD26A, 0x70DC, 0xD26B, 0x70D3, 0xD26C, 0x70D1,
05214     0xD26D, 0x70DD, 0xD26E, 0x70CB, 0xD26F, 0x7F39, 0xD270, 0x70E2,
05215     0xD271, 0x70D7, 0xD272, 0x70D2, 0xD273, 0x70DE, 0xD274, 0x70E0,
05216     0xD275, 0x70D4, 0xD276, 0x70CD, 0xD277, 0x70C5, 0xD278, 0x70C6,
05217     0xD279, 0x70C7, 0xD27A, 0x70DA, 0xD27B, 0x70CE, 0xD27C, 0x70E1,
05218     0xD27D, 0x7242, 0xD27E, 0x7278, 0xD2A1, 0x7277, 0xD2A2, 0x7276,
05219     0xD2A3, 0x7300, 0xD2A4, 0x72FA, 0xD2A5, 0x72F4, 0xD2A6, 0x72FE,
05220     0xD2A7, 0x72F6, 0xD2A8, 0x72F3, 0xD2A9, 0x72FB, 0xD2AA, 0x7301,
05221     0xD2AB, 0x73D3, 0xD2AC, 0x73D9, 0xD2AD, 0x73E5, 0xD2AE, 0x73D6,
05222     0xD2AF, 0x73BC, 0xD2B0, 0x73E7, 0xD2B1, 0x73E3, 0xD2B2, 0x73E9,
05223     0xD2B3, 0x73DC, 0xD2B4, 0x73D2, 0xD2B5, 0x73DB, 0xD2B6, 0x73D4,
05224     0xD2B7, 0x73DD, 0xD2B8, 0x73DA, 0xD2B9, 0x73D7, 0xD2BA, 0x73D8,
05225     0xD2BB, 0x73E8, 0xD2BC, 0x74DE, 0xD2BD, 0x74DF, 0xD2BE, 0x74F4,
05226     0xD2BF, 0x74F5, 0xD2C0, 0x7521, 0xD2C1, 0x755B, 0xD2C2, 0x755F,
05227     0xD2C3, 0x75B0, 0xD2C4, 0x75C1, 0xD2C5, 0x75BB, 0xD2C6, 0x75C4,
05228     0xD2C7, 0x75C0, 0xD2C8, 0x75BF, 0xD2C9, 0x75B6, 0xD2CA, 0x75BA,
05229     0xD2CB, 0x768A, 0xD2CC, 0x76C9, 0xD2CD, 0x771D, 0xD2CE, 0x771B,
05230     0xD2CF, 0x7710, 0xD2D0, 0x7713, 0xD2D1, 0x7712, 0xD2D2, 0x7723,
05231     0xD2D3, 0x7711, 0xD2D4, 0x7715, 0xD2D5, 0x7719, 0xD2D6, 0x771A,
05232     0xD2D7, 0x7722, 0xD2D8, 0x7727, 0xD2D9, 0x7823, 0xD2DA, 0x782C,
05233     0xD2DB, 0x7822, 0xD2DC, 0x7835, 0xD2DD, 0x782F, 0xD2DE, 0x7828,
05234     0xD2DF, 0x782E, 0xD2E0, 0x782B, 0xD2E1, 0x7821, 0xD2E2, 0x7829,
05235     0xD2E3, 0x7833, 0xD2E4, 0x782A, 0xD2E5, 0x7831, 0xD2E6, 0x7954,
05236     0xD2E7, 0x795B, 0xD2E8, 0x794F, 0xD2E9, 0x795C, 0xD2EA, 0x7953,
05237     0xD2EB, 0x7952, 0xD2EC, 0x7951, 0xD2ED, 0x79EB, 0xD2EE, 0x79EC,
05238     0xD2EF, 0x79E0, 0xD2F0, 0x79EE, 0xD2F1, 0x79ED, 0xD2F2, 0x79EA,
05239     0xD2F3, 0x79DC, 0xD2F4, 0x79DE, 0xD2F5, 0x79DD, 0xD2F6, 0x7A86,
05240     0xD2F7, 0x7A89, 0xD2F8, 0x7A85, 0xD2F9, 0x7A8B, 0xD2FA, 0x7A8C,
05241     0xD2FB, 0x7A8A, 0xD2FC, 0x7A87, 0xD2FD, 0x7AD8, 0xD2FE, 0x7B10,
05242     0xD340, 0x7B04, 0xD341, 0x7B13, 0xD342, 0x7B05, 0xD343, 0x7B0F,
05243     0xD344, 0x7B08, 0xD345, 0x7B0A, 0xD346, 0x7B0E, 0xD347, 0x7B09,
05244     0xD348, 0x7B12, 0xD349, 0x7C84, 0xD34A, 0x7C91, 0xD34B, 0x7C8A,
05245     0xD34C, 0x7C8C, 0xD34D, 0x7C88, 0xD34E, 0x7C8D, 0xD34F, 0x7C85,
05246     0xD350, 0x7D1E, 0xD351, 0x7D1D, 0xD352, 0x7D11, 0xD353, 0x7D0E,
05247     0xD354, 0x7D18, 0xD355, 0x7D16, 0xD356, 0x7D13, 0xD357, 0x7D1F,
05248     0xD358, 0x7D12, 0xD359, 0x7D0F, 0xD35A, 0x7D0C, 0xD35B, 0x7F5C,
05249     0xD35C, 0x7F61, 0xD35D, 0x7F5E, 0xD35E, 0x7F60, 0xD35F, 0x7F5D,
05250     0xD360, 0x7F5B, 0xD361, 0x7F96, 0xD362, 0x7F92, 0xD363, 0x7FC3,
05251     0xD364, 0x7FC2, 0xD365, 0x7FC0, 0xD366, 0x8016, 0xD367, 0x803E,
05252     0xD368, 0x8039, 0xD369, 0x80FA, 0xD36A, 0x80F2, 0xD36B, 0x80F9,
05253     0xD36C, 0x80F5, 0xD36D, 0x8101, 0xD36E, 0x80FB, 0xD36F, 0x8100,
05254     0xD370, 0x8201, 0xD371, 0x822F, 0xD372, 0x8225, 0xD373, 0x8333,
05255     0xD374, 0x832D, 0xD375, 0x8344, 0xD376, 0x8319, 0xD377, 0x8351,
05256     0xD378, 0x8325, 0xD379, 0x8356, 0xD37A, 0x833F, 0xD37B, 0x8341,
05257     0xD37C, 0x8326, 0xD37D, 0x831C, 0xD37E, 0x8322, 0xD3A1, 0x8342,
05258     0xD3A2, 0x834E, 0xD3A3, 0x831B, 0xD3A4, 0x832A, 0xD3A5, 0x8308,
05259     0xD3A6, 0x833C, 0xD3A7, 0x834D, 0xD3A8, 0x8316, 0xD3A9, 0x8324,
05260     0xD3AA, 0x8320, 0xD3AB, 0x8337, 0xD3AC, 0x832F, 0xD3AD, 0x8329,
05261     0xD3AE, 0x8347, 0xD3AF, 0x8345, 0xD3B0, 0x834C, 0xD3B1, 0x8353,
05262     0xD3B2, 0x831E, 0xD3B3, 0x832C, 0xD3B4, 0x834B, 0xD3B5, 0x8327,
05263     0xD3B6, 0x8348, 0xD3B7, 0x8653, 0xD3B8, 0x8652, 0xD3B9, 0x86A2,
05264     0xD3BA, 0x86A8, 0xD3BB, 0x8696, 0xD3BC, 0x868D, 0xD3BD, 0x8691,
05265     0xD3BE, 0x869E, 0xD3BF, 0x8687, 0xD3C0, 0x8697, 0xD3C1, 0x8686,
05266     0xD3C2, 0x868B, 0xD3C3, 0x869A, 0xD3C4, 0x8685, 0xD3C5, 0x86A5,
05267     0xD3C6, 0x8699, 0xD3C7, 0x86A1, 0xD3C8, 0x86A7, 0xD3C9, 0x8695,
05268     0xD3CA, 0x8698, 0xD3CB, 0x868E, 0xD3CC, 0x869D, 0xD3CD, 0x8690,
05269     0xD3CE, 0x8694, 0xD3CF, 0x8843, 0xD3D0, 0x8844, 0xD3D1, 0x886D,
05270     0xD3D2, 0x8875, 0xD3D3, 0x8876, 0xD3D4, 0x8872, 0xD3D5, 0x8880,
05271     0xD3D6, 0x8871, 0xD3D7, 0x887F, 0xD3D8, 0x886F, 0xD3D9, 0x8883,
05272     0xD3DA, 0x887E, 0xD3DB, 0x8874, 0xD3DC, 0x887C, 0xD3DD, 0x8A12,
05273     0xD3DE, 0x8C47, 0xD3DF, 0x8C57, 0xD3E0, 0x8C7B, 0xD3E1, 0x8CA4,
05274     0xD3E2, 0x8CA3, 0xD3E3, 0x8D76, 0xD3E4, 0x8D78, 0xD3E5, 0x8DB5,
05275     0xD3E6, 0x8DB7, 0xD3E7, 0x8DB6, 0xD3E8, 0x8ED1, 0xD3E9, 0x8ED3,
05276     0xD3EA, 0x8FFE, 0xD3EB, 0x8FF5, 0xD3EC, 0x9002, 0xD3ED, 0x8FFF,
05277     0xD3EE, 0x8FFB, 0xD3EF, 0x9004, 0xD3F0, 0x8FFC, 0xD3F1, 0x8FF6,
05278     0xD3F2, 0x90D6, 0xD3F3, 0x90E0, 0xD3F4, 0x90D9, 0xD3F5, 0x90DA,
05279     0xD3F6, 0x90E3, 0xD3F7, 0x90DF, 0xD3F8, 0x90E5, 0xD3F9, 0x90D8,
05280     0xD3FA, 0x90DB, 0xD3FB, 0x90D7, 0xD3FC, 0x90DC, 0xD3FD, 0x90E4,
05281     0xD3FE, 0x9150, 0xD440, 0x914E, 0xD441, 0x914F, 0xD442, 0x91D5,
05282     0xD443, 0x91E2, 0xD444, 0x91DA, 0xD445, 0x965C, 0xD446, 0x965F,
05283     0xD447, 0x96BC, 0xD448, 0x98E3, 0xD449, 0x9ADF, 0xD44A, 0x9B2F,
05284     0xD44B, 0x4E7F, 0xD44C, 0x5070, 0xD44D, 0x506A, 0xD44E, 0x5061,
05285     0xD44F, 0x505E, 0xD450, 0x5060, 0xD451, 0x5053, 0xD452, 0x504B,
05286     0xD453, 0x505D, 0xD454, 0x5072, 0xD455, 0x5048, 0xD456, 0x504D,
05287     0xD457, 0x5041, 0xD458, 0x505B, 0xD459, 0x504A, 0xD45A, 0x5062,
05288     0xD45B, 0x5015, 0xD45C, 0x5045, 0xD45D, 0x505F, 0xD45E, 0x5069,
05289     0xD45F, 0x506B, 0xD460, 0x5063, 0xD461, 0x5064, 0xD462, 0x5046,
05290     0xD463, 0x5040, 0xD464, 0x506E, 0xD465, 0x5073, 0xD466, 0x5057,
05291     0xD467, 0x5051, 0xD468, 0x51D0, 0xD469, 0x526B, 0xD46A, 0x526D,
05292     0xD46B, 0x526C, 0xD46C, 0x526E, 0xD46D, 0x52D6, 0xD46E, 0x52D3,
05293     0xD46F, 0x532D, 0xD470, 0x539C, 0xD471, 0x5575, 0xD472, 0x5576,
05294     0xD473, 0x553C, 0xD474, 0x554D, 0xD475, 0x5550, 0xD476, 0x5534,
05295     0xD477, 0x552A, 0xD478, 0x5551, 0xD479, 0x5562, 0xD47A, 0x5536,
05296     0xD47B, 0x5535, 0xD47C, 0x5530, 0xD47D, 0x5552, 0xD47E, 0x5545,
05297     0xD4A1, 0x550C, 0xD4A2, 0x5532, 0xD4A3, 0x5565, 0xD4A4, 0x554E,
05298     0xD4A5, 0x5539, 0xD4A6, 0x5548, 0xD4A7, 0x552D, 0xD4A8, 0x553B,
05299     0xD4A9, 0x5540, 0xD4AA, 0x554B, 0xD4AB, 0x570A, 0xD4AC, 0x5707,
05300     0xD4AD, 0x57FB, 0xD4AE, 0x5814, 0xD4AF, 0x57E2, 0xD4B0, 0x57F6,
05301     0xD4B1, 0x57DC, 0xD4B2, 0x57F4, 0xD4B3, 0x5800, 0xD4B4, 0x57ED,
05302     0xD4B5, 0x57FD, 0xD4B6, 0x5808, 0xD4B7, 0x57F8, 0xD4B8, 0x580B,
05303     0xD4B9, 0x57F3, 0xD4BA, 0x57CF, 0xD4BB, 0x5807, 0xD4BC, 0x57EE,
05304     0xD4BD, 0x57E3, 0xD4BE, 0x57F2, 0xD4BF, 0x57E5, 0xD4C0, 0x57EC,
05305     0xD4C1, 0x57E1, 0xD4C2, 0x580E, 0xD4C3, 0x57FC, 0xD4C4, 0x5810,
05306     0xD4C5, 0x57E7, 0xD4C6, 0x5801, 0xD4C7, 0x580C, 0xD4C8, 0x57F1,
05307     0xD4C9, 0x57E9, 0xD4CA, 0x57F0, 0xD4CB, 0x580D, 0xD4CC, 0x5804,
05308     0xD4CD, 0x595C, 0xD4CE, 0x5A60, 0xD4CF, 0x5A58, 0xD4D0, 0x5A55,
05309     0xD4D1, 0x5A67, 0xD4D2, 0x5A5E, 0xD4D3, 0x5A38, 0xD4D4, 0x5A35,
05310     0xD4D5, 0x5A6D, 0xD4D6, 0x5A50, 0xD4D7, 0x5A5F, 0xD4D8, 0x5A65,
05311     0xD4D9, 0x5A6C, 0xD4DA, 0x5A53, 0xD4DB, 0x5A64, 0xD4DC, 0x5A57,
05312     0xD4DD, 0x5A43, 0xD4DE, 0x5A5D, 0xD4DF, 0x5A52, 0xD4E0, 0x5A44,
05313     0xD4E1, 0x5A5B, 0xD4E2, 0x5A48, 0xD4E3, 0x5A8E, 0xD4E4, 0x5A3E,
05314     0xD4E5, 0x5A4D, 0xD4E6, 0x5A39, 0xD4E7, 0x5A4C, 0xD4E8, 0x5A70,
05315     0xD4E9, 0x5A69, 0xD4EA, 0x5A47, 0xD4EB, 0x5A51, 0xD4EC, 0x5A56,
05316     0xD4ED, 0x5A42, 0xD4EE, 0x5A5C, 0xD4EF, 0x5B72, 0xD4F0, 0x5B6E,
05317     0xD4F1, 0x5BC1, 0xD4F2, 0x5BC0, 0xD4F3, 0x5C59, 0xD4F4, 0x5D1E,
05318     0xD4F5, 0x5D0B, 0xD4F6, 0x5D1D, 0xD4F7, 0x5D1A, 0xD4F8, 0x5D20,
05319     0xD4F9, 0x5D0C, 0xD4FA, 0x5D28, 0xD4FB, 0x5D0D, 0xD4FC, 0x5D26,
05320     0xD4FD, 0x5D25, 0xD4FE, 0x5D0F, 0xD540, 0x5D30, 0xD541, 0x5D12,
05321     0xD542, 0x5D23, 0xD543, 0x5D1F, 0xD544, 0x5D2E, 0xD545, 0x5E3E,
05322     0xD546, 0x5E34, 0xD547, 0x5EB1, 0xD548, 0x5EB4, 0xD549, 0x5EB9,
05323     0xD54A, 0x5EB2, 0xD54B, 0x5EB3, 0xD54C, 0x5F36, 0xD54D, 0x5F38,
05324     0xD54E, 0x5F9B, 0xD54F, 0x5F96, 0xD550, 0x5F9F, 0xD551, 0x608A,
05325     0xD552, 0x6090, 0xD553, 0x6086, 0xD554, 0x60BE, 0xD555, 0x60B0,
05326     0xD556, 0x60BA, 0xD557, 0x60D3, 0xD558, 0x60D4, 0xD559, 0x60CF,
05327     0xD55A, 0x60E4, 0xD55B, 0x60D9, 0xD55C, 0x60DD, 0xD55D, 0x60C8,
05328     0xD55E, 0x60B1, 0xD55F, 0x60DB, 0xD560, 0x60B7, 0xD561, 0x60CA,
05329     0xD562, 0x60BF, 0xD563, 0x60C3, 0xD564, 0x60CD, 0xD565, 0x60C0,
05330     0xD566, 0x6332, 0xD567, 0x6365, 0xD568, 0x638A, 0xD569, 0x6382,
05331     0xD56A, 0x637D, 0xD56B, 0x63BD, 0xD56C, 0x639E, 0xD56D, 0x63AD,
05332     0xD56E, 0x639D, 0xD56F, 0x6397, 0xD570, 0x63AB, 0xD571, 0x638E,
05333     0xD572, 0x636F, 0xD573, 0x6387, 0xD574, 0x6390, 0xD575, 0x636E,
05334     0xD576, 0x63AF, 0xD577, 0x6375, 0xD578, 0x639C, 0xD579, 0x636D,
05335     0xD57A, 0x63AE, 0xD57B, 0x637C, 0xD57C, 0x63A4, 0xD57D, 0x633B,
05336     0xD57E, 0x639F, 0xD5A1, 0x6378, 0xD5A2, 0x6385, 0xD5A3, 0x6381,
05337     0xD5A4, 0x6391, 0xD5A5, 0x638D, 0xD5A6, 0x6370, 0xD5A7, 0x6553,
05338     0xD5A8, 0x65CD, 0xD5A9, 0x6665, 0xD5AA, 0x6661, 0xD5AB, 0x665B,
05339     0xD5AC, 0x6659, 0xD5AD, 0x665C, 0xD5AE, 0x6662, 0xD5AF, 0x6718,
05340     0xD5B0, 0x6879, 0xD5B1, 0x6887, 0xD5B2, 0x6890, 0xD5B3, 0x689C,
05341     0xD5B4, 0x686D, 0xD5B5, 0x686E, 0xD5B6, 0x68AE, 0xD5B7, 0x68AB,
05342     0xD5B8, 0x6956, 0xD5B9, 0x686F, 0xD5BA, 0x68A3, 0xD5BB, 0x68AC,
05343     0xD5BC, 0x68A9, 0xD5BD, 0x6875, 0xD5BE, 0x6874, 0xD5BF, 0x68B2,
05344     0xD5C0, 0x688F, 0xD5C1, 0x6877, 0xD5C2, 0x6892, 0xD5C3, 0x687C,
05345     0xD5C4, 0x686B, 0xD5C5, 0x6872, 0xD5C6, 0x68AA, 0xD5C7, 0x6880,
05346     0xD5C8, 0x6871, 0xD5C9, 0x687E, 0xD5CA, 0x689B, 0xD5CB, 0x6896,
05347     0xD5CC, 0x688B, 0xD5CD, 0x68A0, 0xD5CE, 0x6889, 0xD5CF, 0x68A4,
05348     0xD5D0, 0x6878, 0xD5D1, 0x687B, 0xD5D2, 0x6891, 0xD5D3, 0x688C,
05349     0xD5D4, 0x688A, 0xD5D5, 0x687D, 0xD5D6, 0x6B36, 0xD5D7, 0x6B33,
05350     0xD5D8, 0x6B37, 0xD5D9, 0x6B38, 0xD5DA, 0x6B91, 0xD5DB, 0x6B8F,
05351     0xD5DC, 0x6B8D, 0xD5DD, 0x6B8E, 0xD5DE, 0x6B8C, 0xD5DF, 0x6C2A,
05352     0xD5E0, 0x6DC0, 0xD5E1, 0x6DAB, 0xD5E2, 0x6DB4, 0xD5E3, 0x6DB3,
05353     0xD5E4, 0x6E74, 0xD5E5, 0x6DAC, 0xD5E6, 0x6DE9, 0xD5E7, 0x6DE2,
05354     0xD5E8, 0x6DB7, 0xD5E9, 0x6DF6, 0xD5EA, 0x6DD4, 0xD5EB, 0x6E00,
05355     0xD5EC, 0x6DC8, 0xD5ED, 0x6DE0, 0xD5EE, 0x6DDF, 0xD5EF, 0x6DD6,
05356     0xD5F0, 0x6DBE, 0xD5F1, 0x6DE5, 0xD5F2, 0x6DDC, 0xD5F3, 0x6DDD,
05357     0xD5F4, 0x6DDB, 0xD5F5, 0x6DF4, 0xD5F6, 0x6DCA, 0xD5F7, 0x6DBD,
05358     0xD5F8, 0x6DED, 0xD5F9, 0x6DF0, 0xD5FA, 0x6DBA, 0xD5FB, 0x6DD5,
05359     0xD5FC, 0x6DC2, 0xD5FD, 0x6DCF, 0xD5FE, 0x6DC9, 0xD640, 0x6DD0,
05360     0xD641, 0x6DF2, 0xD642, 0x6DD3, 0xD643, 0x6DFD, 0xD644, 0x6DD7,
05361     0xD645, 0x6DCD, 0xD646, 0x6DE3, 0xD647, 0x6DBB, 0xD648, 0x70FA,
05362     0xD649, 0x710D, 0xD64A, 0x70F7, 0xD64B, 0x7117, 0xD64C, 0x70F4,
05363     0xD64D, 0x710C, 0xD64E, 0x70F0, 0xD64F, 0x7104, 0xD650, 0x70F3,
05364     0xD651, 0x7110, 0xD652, 0x70FC, 0xD653, 0x70FF, 0xD654, 0x7106,
05365     0xD655, 0x7113, 0xD656, 0x7100, 0xD657, 0x70F8, 0xD658, 0x70F6,
05366     0xD659, 0x710B, 0xD65A, 0x7102, 0xD65B, 0x710E, 0xD65C, 0x727E,
05367     0xD65D, 0x727B, 0xD65E, 0x727C, 0xD65F, 0x727F, 0xD660, 0x731D,
05368     0xD661, 0x7317, 0xD662, 0x7307, 0xD663, 0x7311, 0xD664, 0x7318,
05369     0xD665, 0x730A, 0xD666, 0x7308, 0xD667, 0x72FF, 0xD668, 0x730F,
05370     0xD669, 0x731E, 0xD66A, 0x7388, 0xD66B, 0x73F6, 0xD66C, 0x73F8,
05371     0xD66D, 0x73F5, 0xD66E, 0x7404, 0xD66F, 0x7401, 0xD670, 0x73FD,
05372     0xD671, 0x7407, 0xD672, 0x7400, 0xD673, 0x73FA, 0xD674, 0x73FC,
05373     0xD675, 0x73FF, 0xD676, 0x740C, 0xD677, 0x740B, 0xD678, 0x73F4,
05374     0xD679, 0x7408, 0xD67A, 0x7564, 0xD67B, 0x7563, 0xD67C, 0x75CE,
05375     0xD67D, 0x75D2, 0xD67E, 0x75CF, 0xD6A1, 0x75CB, 0xD6A2, 0x75CC,
05376     0xD6A3, 0x75D1, 0xD6A4, 0x75D0, 0xD6A5, 0x768F, 0xD6A6, 0x7689,
05377     0xD6A7, 0x76D3, 0xD6A8, 0x7739, 0xD6A9, 0x772F, 0xD6AA, 0x772D,
05378     0xD6AB, 0x7731, 0xD6AC, 0x7732, 0xD6AD, 0x7734, 0xD6AE, 0x7733,
05379     0xD6AF, 0x773D, 0xD6B0, 0x7725, 0xD6B1, 0x773B, 0xD6B2, 0x7735,
05380     0xD6B3, 0x7848, 0xD6B4, 0x7852, 0xD6B5, 0x7849, 0xD6B6, 0x784D,
05381     0xD6B7, 0x784A, 0xD6B8, 0x784C, 0xD6B9, 0x7826, 0xD6BA, 0x7845,
05382     0xD6BB, 0x7850, 0xD6BC, 0x7964, 0xD6BD, 0x7967, 0xD6BE, 0x7969,
05383     0xD6BF, 0x796A, 0xD6C0, 0x7963, 0xD6C1, 0x796B, 0xD6C2, 0x7961,
05384     0xD6C3, 0x79BB, 0xD6C4, 0x79FA, 0xD6C5, 0x79F8, 0xD6C6, 0x79F6,
05385     0xD6C7, 0x79F7, 0xD6C8, 0x7A8F, 0xD6C9, 0x7A94, 0xD6CA, 0x7A90,
05386     0xD6CB, 0x7B35, 0xD6CC, 0x7B47, 0xD6CD, 0x7B34, 0xD6CE, 0x7B25,
05387     0xD6CF, 0x7B30, 0xD6D0, 0x7B22, 0xD6D1, 0x7B24, 0xD6D2, 0x7B33,
05388     0xD6D3, 0x7B18, 0xD6D4, 0x7B2A, 0xD6D5, 0x7B1D, 0xD6D6, 0x7B31,
05389     0xD6D7, 0x7B2B, 0xD6D8, 0x7B2D, 0xD6D9, 0x7B2F, 0xD6DA, 0x7B32,
05390     0xD6DB, 0x7B38, 0xD6DC, 0x7B1A, 0xD6DD, 0x7B23, 0xD6DE, 0x7C94,
05391     0xD6DF, 0x7C98, 0xD6E0, 0x7C96, 0xD6E1, 0x7CA3, 0xD6E2, 0x7D35,
05392     0xD6E3, 0x7D3D, 0xD6E4, 0x7D38, 0xD6E5, 0x7D36, 0xD6E6, 0x7D3A,
05393     0xD6E7, 0x7D45, 0xD6E8, 0x7D2C, 0xD6E9, 0x7D29, 0xD6EA, 0x7D41,
05394     0xD6EB, 0x7D47, 0xD6EC, 0x7D3E, 0xD6ED, 0x7D3F, 0xD6EE, 0x7D4A,
05395     0xD6EF, 0x7D3B, 0xD6F0, 0x7D28, 0xD6F1, 0x7F63, 0xD6F2, 0x7F95,
05396     0xD6F3, 0x7F9C, 0xD6F4, 0x7F9D, 0xD6F5, 0x7F9B, 0xD6F6, 0x7FCA,
05397     0xD6F7, 0x7FCB, 0xD6F8, 0x7FCD, 0xD6F9, 0x7FD0, 0xD6FA, 0x7FD1,
05398     0xD6FB, 0x7FC7, 0xD6FC, 0x7FCF, 0xD6FD, 0x7FC9, 0xD6FE, 0x801F,
05399     0xD740, 0x801E, 0xD741, 0x801B, 0xD742, 0x8047, 0xD743, 0x8043,
05400     0xD744, 0x8048, 0xD745, 0x8118, 0xD746, 0x8125, 0xD747, 0x8119,
05401     0xD748, 0x811B, 0xD749, 0x812D, 0xD74A, 0x811F, 0xD74B, 0x812C,
05402     0xD74C, 0x811E, 0xD74D, 0x8121, 0xD74E, 0x8115, 0xD74F, 0x8127,
05403     0xD750, 0x811D, 0xD751, 0x8122, 0xD752, 0x8211, 0xD753, 0x8238,
05404     0xD754, 0x8233, 0xD755, 0x823A, 0xD756, 0x8234, 0xD757, 0x8232,
05405     0xD758, 0x8274, 0xD759, 0x8390, 0xD75A, 0x83A3, 0xD75B, 0x83A8,
05406     0xD75C, 0x838D, 0xD75D, 0x837A, 0xD75E, 0x8373, 0xD75F, 0x83A4,
05407     0xD760, 0x8374, 0xD761, 0x838F, 0xD762, 0x8381, 0xD763, 0x8395,
05408     0xD764, 0x8399, 0xD765, 0x8375, 0xD766, 0x8394, 0xD767, 0x83A9,
05409     0xD768, 0x837D, 0xD769, 0x8383, 0xD76A, 0x838C, 0xD76B, 0x839D,
05410     0xD76C, 0x839B, 0xD76D, 0x83AA, 0xD76E, 0x838B, 0xD76F, 0x837E,
05411     0xD770, 0x83A5, 0xD771, 0x83AF, 0xD772, 0x8388, 0xD773, 0x8397,
05412     0xD774, 0x83B0, 0xD775, 0x837F, 0xD776, 0x83A6, 0xD777, 0x8387,
05413     0xD778, 0x83AE, 0xD779, 0x8376, 0xD77A, 0x839A, 0xD77B, 0x8659,
05414     0xD77C, 0x8656, 0xD77D, 0x86BF, 0xD77E, 0x86B7, 0xD7A1, 0x86C2,
05415     0xD7A2, 0x86C1, 0xD7A3, 0x86C5, 0xD7A4, 0x86BA, 0xD7A5, 0x86B0,
05416     0xD7A6, 0x86C8, 0xD7A7, 0x86B9, 0xD7A8, 0x86B3, 0xD7A9, 0x86B8,
05417     0xD7AA, 0x86CC, 0xD7AB, 0x86B4, 0xD7AC, 0x86BB, 0xD7AD, 0x86BC,
05418     0xD7AE, 0x86C3, 0xD7AF, 0x86BD, 0xD7B0, 0x86BE, 0xD7B1, 0x8852,
05419     0xD7B2, 0x8889, 0xD7B3, 0x8895, 0xD7B4, 0x88A8, 0xD7B5, 0x88A2,
05420     0xD7B6, 0x88AA, 0xD7B7, 0x889A, 0xD7B8, 0x8891, 0xD7B9, 0x88A1,
05421     0xD7BA, 0x889F, 0xD7BB, 0x8898, 0xD7BC, 0x88A7, 0xD7BD, 0x8899,
05422     0xD7BE, 0x889B, 0xD7BF, 0x8897, 0xD7C0, 0x88A4, 0xD7C1, 0x88AC,
05423     0xD7C2, 0x888C, 0xD7C3, 0x8893, 0xD7C4, 0x888E, 0xD7C5, 0x8982,
05424     0xD7C6, 0x89D6, 0xD7C7, 0x89D9, 0xD7C8, 0x89D5, 0xD7C9, 0x8A30,
05425     0xD7CA, 0x8A27, 0xD7CB, 0x8A2C, 0xD7CC, 0x8A1E, 0xD7CD, 0x8C39,
05426     0xD7CE, 0x8C3B, 0xD7CF, 0x8C5C, 0xD7D0, 0x8C5D, 0xD7D1, 0x8C7D,
05427     0xD7D2, 0x8CA5, 0xD7D3, 0x8D7D, 0xD7D4, 0x8D7B, 0xD7D5, 0x8D79,
05428     0xD7D6, 0x8DBC, 0xD7D7, 0x8DC2, 0xD7D8, 0x8DB9, 0xD7D9, 0x8DBF,
05429     0xD7DA, 0x8DC1, 0xD7DB, 0x8ED8, 0xD7DC, 0x8EDE, 0xD7DD, 0x8EDD,
05430     0xD7DE, 0x8EDC, 0xD7DF, 0x8ED7, 0xD7E0, 0x8EE0, 0xD7E1, 0x8EE1,
05431     0xD7E2, 0x9024, 0xD7E3, 0x900B, 0xD7E4, 0x9011, 0xD7E5, 0x901C,
05432     0xD7E6, 0x900C, 0xD7E7, 0x9021, 0xD7E8, 0x90EF, 0xD7E9, 0x90EA,
05433     0xD7EA, 0x90F0, 0xD7EB, 0x90F4, 0xD7EC, 0x90F2, 0xD7ED, 0x90F3,
05434     0xD7EE, 0x90D4, 0xD7EF, 0x90EB, 0xD7F0, 0x90EC, 0xD7F1, 0x90E9,
05435     0xD7F2, 0x9156, 0xD7F3, 0x9158, 0xD7F4, 0x915A, 0xD7F5, 0x9153,
05436     0xD7F6, 0x9155, 0xD7F7, 0x91EC, 0xD7F8, 0x91F4, 0xD7F9, 0x91F1,
05437     0xD7FA, 0x91F3, 0xD7FB, 0x91F8, 0xD7FC, 0x91E4, 0xD7FD, 0x91F9,
05438     0xD7FE, 0x91EA, 0xD840, 0x91EB, 0xD841, 0x91F7, 0xD842, 0x91E8,
05439     0xD843, 0x91EE, 0xD844, 0x957A, 0xD845, 0x9586, 0xD846, 0x9588,
05440     0xD847, 0x967C, 0xD848, 0x966D, 0xD849, 0x966B, 0xD84A, 0x9671,
05441     0xD84B, 0x966F, 0xD84C, 0x96BF, 0xD84D, 0x976A, 0xD84E, 0x9804,
05442     0xD84F, 0x98E5, 0xD850, 0x9997, 0xD851, 0x509B, 0xD852, 0x5095,
05443     0xD853, 0x5094, 0xD854, 0x509E, 0xD855, 0x508B, 0xD856, 0x50A3,
05444     0xD857, 0x5083, 0xD858, 0x508C, 0xD859, 0x508E, 0xD85A, 0x509D,
05445     0xD85B, 0x5068, 0xD85C, 0x509C, 0xD85D, 0x5092, 0xD85E, 0x5082,
05446     0xD85F, 0x5087, 0xD860, 0x515F, 0xD861, 0x51D4, 0xD862, 0x5312,
05447     0xD863, 0x5311, 0xD864, 0x53A4, 0xD865, 0x53A7, 0xD866, 0x5591,
05448     0xD867, 0x55A8, 0xD868, 0x55A5, 0xD869, 0x55AD, 0xD86A, 0x5577,
05449     0xD86B, 0x5645, 0xD86C, 0x55A2, 0xD86D, 0x5593, 0xD86E, 0x5588,
05450     0xD86F, 0x558F, 0xD870, 0x55B5, 0xD871, 0x5581, 0xD872, 0x55A3,
05451     0xD873, 0x5592, 0xD874, 0x55A4, 0xD875, 0x557D, 0xD876, 0x558C,
05452     0xD877, 0x55A6, 0xD878, 0x557F, 0xD879, 0x5595, 0xD87A, 0x55A1,
05453     0xD87B, 0x558E, 0xD87C, 0x570C, 0xD87D, 0x5829, 0xD87E, 0x5837,
05454     0xD8A1, 0x5819, 0xD8A2, 0x581E, 0xD8A3, 0x5827, 0xD8A4, 0x5823,
05455     0xD8A5, 0x5828, 0xD8A6, 0x57F5, 0xD8A7, 0x5848, 0xD8A8, 0x5825,
05456     0xD8A9, 0x581C, 0xD8AA, 0x581B, 0xD8AB, 0x5833, 0xD8AC, 0x583F,
05457     0xD8AD, 0x5836, 0xD8AE, 0x582E, 0xD8AF, 0x5839, 0xD8B0, 0x5838,
05458     0xD8B1, 0x582D, 0xD8B2, 0x582C, 0xD8B3, 0x583B, 0xD8B4, 0x5961,
05459     0xD8B5, 0x5AAF, 0xD8B6, 0x5A94, 0xD8B7, 0x5A9F, 0xD8B8, 0x5A7A,
05460     0xD8B9, 0x5AA2, 0xD8BA, 0x5A9E, 0xD8BB, 0x5A78, 0xD8BC, 0x5AA6,
05461     0xD8BD, 0x5A7C, 0xD8BE, 0x5AA5, 0xD8BF, 0x5AAC, 0xD8C0, 0x5A95,
05462     0xD8C1, 0x5AAE, 0xD8C2, 0x5A37, 0xD8C3, 0x5A84, 0xD8C4, 0x5A8A,
05463     0xD8C5, 0x5A97, 0xD8C6, 0x5A83, 0xD8C7, 0x5A8B, 0xD8C8, 0x5AA9,
05464     0xD8C9, 0x5A7B, 0xD8CA, 0x5A7D, 0xD8CB, 0x5A8C, 0xD8CC, 0x5A9C,
05465     0xD8CD, 0x5A8F, 0xD8CE, 0x5A93, 0xD8CF, 0x5A9D, 0xD8D0, 0x5BEA,
05466     0xD8D1, 0x5BCD, 0xD8D2, 0x5BCB, 0xD8D3, 0x5BD4, 0xD8D4, 0x5BD1,
05467     0xD8D5, 0x5BCA, 0xD8D6, 0x5BCE, 0xD8D7, 0x5C0C, 0xD8D8, 0x5C30,
05468     0xD8D9, 0x5D37, 0xD8DA, 0x5D43, 0xD8DB, 0x5D6B, 0xD8DC, 0x5D41,
05469     0xD8DD, 0x5D4B, 0xD8DE, 0x5D3F, 0xD8DF, 0x5D35, 0xD8E0, 0x5D51,
05470     0xD8E1, 0x5D4E, 0xD8E2, 0x5D55, 0xD8E3, 0x5D33, 0xD8E4, 0x5D3A,
05471     0xD8E5, 0x5D52, 0xD8E6, 0x5D3D, 0xD8E7, 0x5D31, 0xD8E8, 0x5D59,
05472     0xD8E9, 0x5D42, 0xD8EA, 0x5D39, 0xD8EB, 0x5D49, 0xD8EC, 0x5D38,
05473     0xD8ED, 0x5D3C, 0xD8EE, 0x5D32, 0xD8EF, 0x5D36, 0xD8F0, 0x5D40,
05474     0xD8F1, 0x5D45, 0xD8F2, 0x5E44, 0xD8F3, 0x5E41, 0xD8F4, 0x5F58,
05475     0xD8F5, 0x5FA6, 0xD8F6, 0x5FA5, 0xD8F7, 0x5FAB, 0xD8F8, 0x60C9,
05476     0xD8F9, 0x60B9, 0xD8FA, 0x60CC, 0xD8FB, 0x60E2, 0xD8FC, 0x60CE,
05477     0xD8FD, 0x60C4, 0xD8FE, 0x6114, 0xD940, 0x60F2, 0xD941, 0x610A,
05478     0xD942, 0x6116, 0xD943, 0x6105, 0xD944, 0x60F5, 0xD945, 0x6113,
05479     0xD946, 0x60F8, 0xD947, 0x60FC, 0xD948, 0x60FE, 0xD949, 0x60C1,
05480     0xD94A, 0x6103, 0xD94B, 0x6118, 0xD94C, 0x611D, 0xD94D, 0x6110,
05481     0xD94E, 0x60FF, 0xD94F, 0x6104, 0xD950, 0x610B, 0xD951, 0x624A,
05482     0xD952, 0x6394, 0xD953, 0x63B1, 0xD954, 0x63B0, 0xD955, 0x63CE,
05483     0xD956, 0x63E5, 0xD957, 0x63E8, 0xD958, 0x63EF, 0xD959, 0x63C3,
05484     0xD95A, 0x649D, 0xD95B, 0x63F3, 0xD95C, 0x63CA, 0xD95D, 0x63E0,
05485     0xD95E, 0x63F6, 0xD95F, 0x63D5, 0xD960, 0x63F2, 0xD961, 0x63F5,
05486     0xD962, 0x6461, 0xD963, 0x63DF, 0xD964, 0x63BE, 0xD965, 0x63DD,
05487     0xD966, 0x63DC, 0xD967, 0x63C4, 0xD968, 0x63D8, 0xD969, 0x63D3,
05488     0xD96A, 0x63C2, 0xD96B, 0x63C7, 0xD96C, 0x63CC, 0xD96D, 0x63CB,
05489     0xD96E, 0x63C8, 0xD96F, 0x63F0, 0xD970, 0x63D7, 0xD971, 0x63D9,
05490     0xD972, 0x6532, 0xD973, 0x6567, 0xD974, 0x656A, 0xD975, 0x6564,
05491     0xD976, 0x655C, 0xD977, 0x6568, 0xD978, 0x6565, 0xD979, 0x658C,
05492     0xD97A, 0x659D, 0xD97B, 0x659E, 0xD97C, 0x65AE, 0xD97D, 0x65D0,
05493     0xD97E, 0x65D2, 0xD9A1, 0x667C, 0xD9A2, 0x666C, 0xD9A3, 0x667B,
05494     0xD9A4, 0x6680, 0xD9A5, 0x6671, 0xD9A6, 0x6679, 0xD9A7, 0x666A,
05495     0xD9A8, 0x6672, 0xD9A9, 0x6701, 0xD9AA, 0x690C, 0xD9AB, 0x68D3,
05496     0xD9AC, 0x6904, 0xD9AD, 0x68DC, 0xD9AE, 0x692A, 0xD9AF, 0x68EC,
05497     0xD9B0, 0x68EA, 0xD9B1, 0x68F1, 0xD9B2, 0x690F, 0xD9B3, 0x68D6,
05498     0xD9B4, 0x68F7, 0xD9B5, 0x68EB, 0xD9B6, 0x68E4, 0xD9B7, 0x68F6,
05499     0xD9B8, 0x6913, 0xD9B9, 0x6910, 0xD9BA, 0x68F3, 0xD9BB, 0x68E1,
05500     0xD9BC, 0x6907, 0xD9BD, 0x68CC, 0xD9BE, 0x6908, 0xD9BF, 0x6970,
05501     0xD9C0, 0x68B4, 0xD9C1, 0x6911, 0xD9C2, 0x68EF, 0xD9C3, 0x68C6,
05502     0xD9C4, 0x6914, 0xD9C5, 0x68F8, 0xD9C6, 0x68D0, 0xD9C7, 0x68FD,
05503     0xD9C8, 0x68FC, 0xD9C9, 0x68E8, 0xD9CA, 0x690B, 0xD9CB, 0x690A,
05504     0xD9CC, 0x6917, 0xD9CD, 0x68CE, 0xD9CE, 0x68C8, 0xD9CF, 0x68DD,
05505     0xD9D0, 0x68DE, 0xD9D1, 0x68E6, 0xD9D2, 0x68F4, 0xD9D3, 0x68D1,
05506     0xD9D4, 0x6906, 0xD9D5, 0x68D4, 0xD9D6, 0x68E9, 0xD9D7, 0x6915,
05507     0xD9D8, 0x6925, 0xD9D9, 0x68C7, 0xD9DA, 0x6B39, 0xD9DB, 0x6B3B,
05508     0xD9DC, 0x6B3F, 0xD9DD, 0x6B3C, 0xD9DE, 0x6B94, 0xD9DF, 0x6B97,
05509     0xD9E0, 0x6B99, 0xD9E1, 0x6B95, 0xD9E2, 0x6BBD, 0xD9E3, 0x6BF0,
05510     0xD9E4, 0x6BF2, 0xD9E5, 0x6BF3, 0xD9E6, 0x6C30, 0xD9E7, 0x6DFC,
05511     0xD9E8, 0x6E46, 0xD9E9, 0x6E47, 0xD9EA, 0x6E1F, 0xD9EB, 0x6E49,
05512     0xD9EC, 0x6E88, 0xD9ED, 0x6E3C, 0xD9EE, 0x6E3D, 0xD9EF, 0x6E45,
05513     0xD9F0, 0x6E62, 0xD9F1, 0x6E2B, 0xD9F2, 0x6E3F, 0xD9F3, 0x6E41,
05514     0xD9F4, 0x6E5D, 0xD9F5, 0x6E73, 0xD9F6, 0x6E1C, 0xD9F7, 0x6E33,
05515     0xD9F8, 0x6E4B, 0xD9F9, 0x6E40, 0xD9FA, 0x6E51, 0xD9FB, 0x6E3B,
05516     0xD9FC, 0x6E03, 0xD9FD, 0x6E2E, 0xD9FE, 0x6E5E, 0xDA40, 0x6E68,
05517     0xDA41, 0x6E5C, 0xDA42, 0x6E61, 0xDA43, 0x6E31, 0xDA44, 0x6E28,
05518     0xDA45, 0x6E60, 0xDA46, 0x6E71, 0xDA47, 0x6E6B, 0xDA48, 0x6E39,
05519     0xDA49, 0x6E22, 0xDA4A, 0x6E30, 0xDA4B, 0x6E53, 0xDA4C, 0x6E65,
05520     0xDA4D, 0x6E27, 0xDA4E, 0x6E78, 0xDA4F, 0x6E64, 0xDA50, 0x6E77,
05521     0xDA51, 0x6E55, 0xDA52, 0x6E79, 0xDA53, 0x6E52, 0xDA54, 0x6E66,
05522     0xDA55, 0x6E35, 0xDA56, 0x6E36, 0xDA57, 0x6E5A, 0xDA58, 0x7120,
05523     0xDA59, 0x711E, 0xDA5A, 0x712F, 0xDA5B, 0x70FB, 0xDA5C, 0x712E,
05524     0xDA5D, 0x7131, 0xDA5E, 0x7123, 0xDA5F, 0x7125, 0xDA60, 0x7122,
05525     0xDA61, 0x7132, 0xDA62, 0x711F, 0xDA63, 0x7128, 0xDA64, 0x713A,
05526     0xDA65, 0x711B, 0xDA66, 0x724B, 0xDA67, 0x725A, 0xDA68, 0x7288,
05527     0xDA69, 0x7289, 0xDA6A, 0x7286, 0xDA6B, 0x7285, 0xDA6C, 0x728B,
05528     0xDA6D, 0x7312, 0xDA6E, 0x730B, 0xDA6F, 0x7330, 0xDA70, 0x7322,
05529     0xDA71, 0x7331, 0xDA72, 0x7333, 0xDA73, 0x7327, 0xDA74, 0x7332,
05530     0xDA75, 0x732D, 0xDA76, 0x7326, 0xDA77, 0x7323, 0xDA78, 0x7335,
05531     0xDA79, 0x730C, 0xDA7A, 0x742E, 0xDA7B, 0x742C, 0xDA7C, 0x7430,
05532     0xDA7D, 0x742B, 0xDA7E, 0x7416, 0xDAA1, 0x741A, 0xDAA2, 0x7421,
05533     0xDAA3, 0x742D, 0xDAA4, 0x7431, 0xDAA5, 0x7424, 0xDAA6, 0x7423,
05534     0xDAA7, 0x741D, 0xDAA8, 0x7429, 0xDAA9, 0x7420, 0xDAAA, 0x7432,
05535     0xDAAB, 0x74FB, 0xDAAC, 0x752F, 0xDAAD, 0x756F, 0xDAAE, 0x756C,
05536     0xDAAF, 0x75E7, 0xDAB0, 0x75DA, 0xDAB1, 0x75E1, 0xDAB2, 0x75E6,
05537     0xDAB3, 0x75DD, 0xDAB4, 0x75DF, 0xDAB5, 0x75E4, 0xDAB6, 0x75D7,
05538     0xDAB7, 0x7695, 0xDAB8, 0x7692, 0xDAB9, 0x76DA, 0xDABA, 0x7746,
05539     0xDABB, 0x7747, 0xDABC, 0x7744, 0xDABD, 0x774D, 0xDABE, 0x7745,
05540     0xDABF, 0x774A, 0xDAC0, 0x774E, 0xDAC1, 0x774B, 0xDAC2, 0x774C,
05541     0xDAC3, 0x77DE, 0xDAC4, 0x77EC, 0xDAC5, 0x7860, 0xDAC6, 0x7864,
05542     0xDAC7, 0x7865, 0xDAC8, 0x785C, 0xDAC9, 0x786D, 0xDACA, 0x7871,
05543     0xDACB, 0x786A, 0xDACC, 0x786E, 0xDACD, 0x7870, 0xDACE, 0x7869,
05544     0xDACF, 0x7868, 0xDAD0, 0x785E, 0xDAD1, 0x7862, 0xDAD2, 0x7974,
05545     0xDAD3, 0x7973, 0xDAD4, 0x7972, 0xDAD5, 0x7970, 0xDAD6, 0x7A02,
05546     0xDAD7, 0x7A0A, 0xDAD8, 0x7A03, 0xDAD9, 0x7A0C, 0xDADA, 0x7A04,
05547     0xDADB, 0x7A99, 0xDADC, 0x7AE6, 0xDADD, 0x7AE4, 0xDADE, 0x7B4A,
05548     0xDADF, 0x7B3B, 0xDAE0, 0x7B44, 0xDAE1, 0x7B48, 0xDAE2, 0x7B4C,
05549     0xDAE3, 0x7B4E, 0xDAE4, 0x7B40, 0xDAE5, 0x7B58, 0xDAE6, 0x7B45,
05550     0xDAE7, 0x7CA2, 0xDAE8, 0x7C9E, 0xDAE9, 0x7CA8, 0xDAEA, 0x7CA1,
05551     0xDAEB, 0x7D58, 0xDAEC, 0x7D6F, 0xDAED, 0x7D63, 0xDAEE, 0x7D53,
05552     0xDAEF, 0x7D56, 0xDAF0, 0x7D67, 0xDAF1, 0x7D6A, 0xDAF2, 0x7D4F,
05553     0xDAF3, 0x7D6D, 0xDAF4, 0x7D5C, 0xDAF5, 0x7D6B, 0xDAF6, 0x7D52,
05554     0xDAF7, 0x7D54, 0xDAF8, 0x7D69, 0xDAF9, 0x7D51, 0xDAFA, 0x7D5F,
05555     0xDAFB, 0x7D4E, 0xDAFC, 0x7F3E, 0xDAFD, 0x7F3F, 0xDAFE, 0x7F65,
05556     0xDB40, 0x7F66, 0xDB41, 0x7FA2, 0xDB42, 0x7FA0, 0xDB43, 0x7FA1,
05557     0xDB44, 0x7FD7, 0xDB45, 0x8051, 0xDB46, 0x804F, 0xDB47, 0x8050,
05558     0xDB48, 0x80FE, 0xDB49, 0x80D4, 0xDB4A, 0x8143, 0xDB4B, 0x814A,
05559     0xDB4C, 0x8152, 0xDB4D, 0x814F, 0xDB4E, 0x8147, 0xDB4F, 0x813D,
05560     0xDB50, 0x814D, 0xDB51, 0x813A, 0xDB52, 0x81E6, 0xDB53, 0x81EE,
05561     0xDB54, 0x81F7, 0xDB55, 0x81F8, 0xDB56, 0x81F9, 0xDB57, 0x8204,
05562     0xDB58, 0x823C, 0xDB59, 0x823D, 0xDB5A, 0x823F, 0xDB5B, 0x8275,
05563     0xDB5C, 0x833B, 0xDB5D, 0x83CF, 0xDB5E, 0x83F9, 0xDB5F, 0x8423,
05564     0xDB60, 0x83C0, 0xDB61, 0x83E8, 0xDB62, 0x8412, 0xDB63, 0x83E7,
05565     0xDB64, 0x83E4, 0xDB65, 0x83FC, 0xDB66, 0x83F6, 0xDB67, 0x8410,
05566     0xDB68, 0x83C6, 0xDB69, 0x83C8, 0xDB6A, 0x83EB, 0xDB6B, 0x83E3,
05567     0xDB6C, 0x83BF, 0xDB6D, 0x8401, 0xDB6E, 0x83DD, 0xDB6F, 0x83E5,
05568     0xDB70, 0x83D8, 0xDB71, 0x83FF, 0xDB72, 0x83E1, 0xDB73, 0x83CB,
05569     0xDB74, 0x83CE, 0xDB75, 0x83D6, 0xDB76, 0x83F5, 0xDB77, 0x83C9,
05570     0xDB78, 0x8409, 0xDB79, 0x840F, 0xDB7A, 0x83DE, 0xDB7B, 0x8411,
05571     0xDB7C, 0x8406, 0xDB7D, 0x83C2, 0xDB7E, 0x83F3, 0xDBA1, 0x83D5,
05572     0xDBA2, 0x83FA, 0xDBA3, 0x83C7, 0xDBA4, 0x83D1, 0xDBA5, 0x83EA,
05573     0xDBA6, 0x8413, 0xDBA7, 0x83C3, 0xDBA8, 0x83EC, 0xDBA9, 0x83EE,
05574     0xDBAA, 0x83C4, 0xDBAB, 0x83FB, 0xDBAC, 0x83D7, 0xDBAD, 0x83E2,
05575     0xDBAE, 0x841B, 0xDBAF, 0x83DB, 0xDBB0, 0x83FE, 0xDBB1, 0x86D8,
05576     0xDBB2, 0x86E2, 0xDBB3, 0x86E6, 0xDBB4, 0x86D3, 0xDBB5, 0x86E3,
05577     0xDBB6, 0x86DA, 0xDBB7, 0x86EA, 0xDBB8, 0x86DD, 0xDBB9, 0x86EB,
05578     0xDBBA, 0x86DC, 0xDBBB, 0x86EC, 0xDBBC, 0x86E9, 0xDBBD, 0x86D7,
05579     0xDBBE, 0x86E8, 0xDBBF, 0x86D1, 0xDBC0, 0x8848, 0xDBC1, 0x8856,
05580     0xDBC2, 0x8855, 0xDBC3, 0x88BA, 0xDBC4, 0x88D7, 0xDBC5, 0x88B9,
05581     0xDBC6, 0x88B8, 0xDBC7, 0x88C0, 0xDBC8, 0x88BE, 0xDBC9, 0x88B6,
05582     0xDBCA, 0x88BC, 0xDBCB, 0x88B7, 0xDBCC, 0x88BD, 0xDBCD, 0x88B2,
05583     0xDBCE, 0x8901, 0xDBCF, 0x88C9, 0xDBD0, 0x8995, 0xDBD1, 0x8998,
05584     0xDBD2, 0x8997, 0xDBD3, 0x89DD, 0xDBD4, 0x89DA, 0xDBD5, 0x89DB,
05585     0xDBD6, 0x8A4E, 0xDBD7, 0x8A4D, 0xDBD8, 0x8A39, 0xDBD9, 0x8A59,
05586     0xDBDA, 0x8A40, 0xDBDB, 0x8A57, 0xDBDC, 0x8A58, 0xDBDD, 0x8A44,
05587     0xDBDE, 0x8A45, 0xDBDF, 0x8A52, 0xDBE0, 0x8A48, 0xDBE1, 0x8A51,
05588     0xDBE2, 0x8A4A, 0xDBE3, 0x8A4C, 0xDBE4, 0x8A4F, 0xDBE5, 0x8C5F,
05589     0xDBE6, 0x8C81, 0xDBE7, 0x8C80, 0xDBE8, 0x8CBA, 0xDBE9, 0x8CBE,
05590     0xDBEA, 0x8CB0, 0xDBEB, 0x8CB9, 0xDBEC, 0x8CB5, 0xDBED, 0x8D84,
05591     0xDBEE, 0x8D80, 0xDBEF, 0x8D89, 0xDBF0, 0x8DD8, 0xDBF1, 0x8DD3,
05592     0xDBF2, 0x8DCD, 0xDBF3, 0x8DC7, 0xDBF4, 0x8DD6, 0xDBF5, 0x8DDC,
05593     0xDBF6, 0x8DCF, 0xDBF7, 0x8DD5, 0xDBF8, 0x8DD9, 0xDBF9, 0x8DC8,
05594     0xDBFA, 0x8DD7, 0xDBFB, 0x8DC5, 0xDBFC, 0x8EEF, 0xDBFD, 0x8EF7,
05595     0xDBFE, 0x8EFA, 0xDC40, 0x8EF9, 0xDC41, 0x8EE6, 0xDC42, 0x8EEE,
05596     0xDC43, 0x8EE5, 0xDC44, 0x8EF5, 0xDC45, 0x8EE7, 0xDC46, 0x8EE8,
05597     0xDC47, 0x8EF6, 0xDC48, 0x8EEB, 0xDC49, 0x8EF1, 0xDC4A, 0x8EEC,
05598     0xDC4B, 0x8EF4, 0xDC4C, 0x8EE9, 0xDC4D, 0x902D, 0xDC4E, 0x9034,
05599     0xDC4F, 0x902F, 0xDC50, 0x9106, 0xDC51, 0x912C, 0xDC52, 0x9104,
05600     0xDC53, 0x90FF, 0xDC54, 0x90FC, 0xDC55, 0x9108, 0xDC56, 0x90F9,
05601     0xDC57, 0x90FB, 0xDC58, 0x9101, 0xDC59, 0x9100, 0xDC5A, 0x9107,
05602     0xDC5B, 0x9105, 0xDC5C, 0x9103, 0xDC5D, 0x9161, 0xDC5E, 0x9164,
05603     0xDC5F, 0x915F, 0xDC60, 0x9162, 0xDC61, 0x9160, 0xDC62, 0x9201,
05604     0xDC63, 0x920A, 0xDC64, 0x9225, 0xDC65, 0x9203, 0xDC66, 0x921A,
05605     0xDC67, 0x9226, 0xDC68, 0x920F, 0xDC69, 0x920C, 0xDC6A, 0x9200,
05606     0xDC6B, 0x9212, 0xDC6C, 0x91FF, 0xDC6D, 0x91FD, 0xDC6E, 0x9206,
05607     0xDC6F, 0x9204, 0xDC70, 0x9227, 0xDC71, 0x9202, 0xDC72, 0x921C,
05608     0xDC73, 0x9224, 0xDC74, 0x9219, 0xDC75, 0x9217, 0xDC76, 0x9205,
05609     0xDC77, 0x9216, 0xDC78, 0x957B, 0xDC79, 0x958D, 0xDC7A, 0x958C,
05610     0xDC7B, 0x9590, 0xDC7C, 0x9687, 0xDC7D, 0x967E, 0xDC7E, 0x9688,
05611     0xDCA1, 0x9689, 0xDCA2, 0x9683, 0xDCA3, 0x9680, 0xDCA4, 0x96C2,
05612     0xDCA5, 0x96C8, 0xDCA6, 0x96C3, 0xDCA7, 0x96F1, 0xDCA8, 0x96F0,
05613     0xDCA9, 0x976C, 0xDCAA, 0x9770, 0xDCAB, 0x976E, 0xDCAC, 0x9807,
05614     0xDCAD, 0x98A9, 0xDCAE, 0x98EB, 0xDCAF, 0x9CE6, 0xDCB0, 0x9EF9,
05615     0xDCB1, 0x4E83, 0xDCB2, 0x4E84, 0xDCB3, 0x4EB6, 0xDCB4, 0x50BD,
05616     0xDCB5, 0x50BF, 0xDCB6, 0x50C6, 0xDCB7, 0x50AE, 0xDCB8, 0x50C4,
05617     0xDCB9, 0x50CA, 0xDCBA, 0x50B4, 0xDCBB, 0x50C8, 0xDCBC, 0x50C2,
05618     0xDCBD, 0x50B0, 0xDCBE, 0x50C1, 0xDCBF, 0x50BA, 0xDCC0, 0x50B1,
05619     0xDCC1, 0x50CB, 0xDCC2, 0x50C9, 0xDCC3, 0x50B6, 0xDCC4, 0x50B8,
05620     0xDCC5, 0x51D7, 0xDCC6, 0x527A, 0xDCC7, 0x5278, 0xDCC8, 0x527B,
05621     0xDCC9, 0x527C, 0xDCCA, 0x55C3, 0xDCCB, 0x55DB, 0xDCCC, 0x55CC,
05622     0xDCCD, 0x55D0, 0xDCCE, 0x55CB, 0xDCCF, 0x55CA, 0xDCD0, 0x55DD,
05623     0xDCD1, 0x55C0, 0xDCD2, 0x55D4, 0xDCD3, 0x55C4, 0xDCD4, 0x55E9,
05624     0xDCD5, 0x55BF, 0xDCD6, 0x55D2, 0xDCD7, 0x558D, 0xDCD8, 0x55CF,
05625     0xDCD9, 0x55D5, 0xDCDA, 0x55E2, 0xDCDB, 0x55D6, 0xDCDC, 0x55C8,
05626     0xDCDD, 0x55F2, 0xDCDE, 0x55CD, 0xDCDF, 0x55D9, 0xDCE0, 0x55C2,
05627     0xDCE1, 0x5714, 0xDCE2, 0x5853, 0xDCE3, 0x5868, 0xDCE4, 0x5864,
05628     0xDCE5, 0x584F, 0xDCE6, 0x584D, 0xDCE7, 0x5849, 0xDCE8, 0x586F,
05629     0xDCE9, 0x5855, 0xDCEA, 0x584E, 0xDCEB, 0x585D, 0xDCEC, 0x5859,
05630     0xDCED, 0x5865, 0xDCEE, 0x585B, 0xDCEF, 0x583D, 0xDCF0, 0x5863,
05631     0xDCF1, 0x5871, 0xDCF2, 0x58FC, 0xDCF3, 0x5AC7, 0xDCF4, 0x5AC4,
05632     0xDCF5, 0x5ACB, 0xDCF6, 0x5ABA, 0xDCF7, 0x5AB8, 0xDCF8, 0x5AB1,
05633     0xDCF9, 0x5AB5, 0xDCFA, 0x5AB0, 0xDCFB, 0x5ABF, 0xDCFC, 0x5AC8,
05634     0xDCFD, 0x5ABB, 0xDCFE, 0x5AC6, 0xDD40, 0x5AB7, 0xDD41, 0x5AC0,
05635     0xDD42, 0x5ACA, 0xDD43, 0x5AB4, 0xDD44, 0x5AB6, 0xDD45, 0x5ACD,
05636     0xDD46, 0x5AB9, 0xDD47, 0x5A90, 0xDD48, 0x5BD6, 0xDD49, 0x5BD8,
05637     0xDD4A, 0x5BD9, 0xDD4B, 0x5C1F, 0xDD4C, 0x5C33, 0xDD4D, 0x5D71,
05638     0xDD4E, 0x5D63, 0xDD4F, 0x5D4A, 0xDD50, 0x5D65, 0xDD51, 0x5D72,
05639     0xDD52, 0x5D6C, 0xDD53, 0x5D5E, 0xDD54, 0x5D68, 0xDD55, 0x5D67,
05640     0xDD56, 0x5D62, 0xDD57, 0x5DF0, 0xDD58, 0x5E4F, 0xDD59, 0x5E4E,
05641     0xDD5A, 0x5E4A, 0xDD5B, 0x5E4D, 0xDD5C, 0x5E4B, 0xDD5D, 0x5EC5,
05642     0xDD5E, 0x5ECC, 0xDD5F, 0x5EC6, 0xDD60, 0x5ECB, 0xDD61, 0x5EC7,
05643     0xDD62, 0x5F40, 0xDD63, 0x5FAF, 0xDD64, 0x5FAD, 0xDD65, 0x60F7,
05644     0xDD66, 0x6149, 0xDD67, 0x614A, 0xDD68, 0x612B, 0xDD69, 0x6145,
05645     0xDD6A, 0x6136, 0xDD6B, 0x6132, 0xDD6C, 0x612E, 0xDD6D, 0x6146,
05646     0xDD6E, 0x612F, 0xDD6F, 0x614F, 0xDD70, 0x6129, 0xDD71, 0x6140,
05647     0xDD72, 0x6220, 0xDD73, 0x9168, 0xDD74, 0x6223, 0xDD75, 0x6225,
05648     0xDD76, 0x6224, 0xDD77, 0x63C5, 0xDD78, 0x63F1, 0xDD79, 0x63EB,
05649     0xDD7A, 0x6410, 0xDD7B, 0x6412, 0xDD7C, 0x6409, 0xDD7D, 0x6420,
05650     0xDD7E, 0x6424, 0xDDA1, 0x6433, 0xDDA2, 0x6443, 0xDDA3, 0x641F,
05651     0xDDA4, 0x6415, 0xDDA5, 0x6418, 0xDDA6, 0x6439, 0xDDA7, 0x6437,
05652     0xDDA8, 0x6422, 0xDDA9, 0x6423, 0xDDAA, 0x640C, 0xDDAB, 0x6426,
05653     0xDDAC, 0x6430, 0xDDAD, 0x6428, 0xDDAE, 0x6441, 0xDDAF, 0x6435,
05654     0xDDB0, 0x642F, 0xDDB1, 0x640A, 0xDDB2, 0x641A, 0xDDB3, 0x6440,
05655     0xDDB4, 0x6425, 0xDDB5, 0x6427, 0xDDB6, 0x640B, 0xDDB7, 0x63E7,
05656     0xDDB8, 0x641B, 0xDDB9, 0x642E, 0xDDBA, 0x6421, 0xDDBB, 0x640E,
05657     0xDDBC, 0x656F, 0xDDBD, 0x6592, 0xDDBE, 0x65D3, 0xDDBF, 0x6686,
05658     0xDDC0, 0x668C, 0xDDC1, 0x6695, 0xDDC2, 0x6690, 0xDDC3, 0x668B,
05659     0xDDC4, 0x668A, 0xDDC5, 0x6699, 0xDDC6, 0x6694, 0xDDC7, 0x6678,
05660     0xDDC8, 0x6720, 0xDDC9, 0x6966, 0xDDCA, 0x695F, 0xDDCB, 0x6938,
05661     0xDDCC, 0x694E, 0xDDCD, 0x6962, 0xDDCE, 0x6971, 0xDDCF, 0x693F,
05662     0xDDD0, 0x6945, 0xDDD1, 0x696A, 0xDDD2, 0x6939, 0xDDD3, 0x6942,
05663     0xDDD4, 0x6957, 0xDDD5, 0x6959, 0xDDD6, 0x697A, 0xDDD7, 0x6948,
05664     0xDDD8, 0x6949, 0xDDD9, 0x6935, 0xDDDA, 0x696C, 0xDDDB, 0x6933,
05665     0xDDDC, 0x693D, 0xDDDD, 0x6965, 0xDDDE, 0x68F0, 0xDDDF, 0x6978,
05666     0xDDE0, 0x6934, 0xDDE1, 0x6969, 0xDDE2, 0x6940, 0xDDE3, 0x696F,
05667     0xDDE4, 0x6944, 0xDDE5, 0x6976, 0xDDE6, 0x6958, 0xDDE7, 0x6941,
05668     0xDDE8, 0x6974, 0xDDE9, 0x694C, 0xDDEA, 0x693B, 0xDDEB, 0x694B,
05669     0xDDEC, 0x6937, 0xDDED, 0x695C, 0xDDEE, 0x694F, 0xDDEF, 0x6951,
05670     0xDDF0, 0x6932, 0xDDF1, 0x6952, 0xDDF2, 0x692F, 0xDDF3, 0x697B,
05671     0xDDF4, 0x693C, 0xDDF5, 0x6B46, 0xDDF6, 0x6B45, 0xDDF7, 0x6B43,
05672     0xDDF8, 0x6B42, 0xDDF9, 0x6B48, 0xDDFA, 0x6B41, 0xDDFB, 0x6B9B,
05673     0xDDFC, 0xFA0D, 0xDDFD, 0x6BFB, 0xDDFE, 0x6BFC, 0xDE40, 0x6BF9,
05674     0xDE41, 0x6BF7, 0xDE42, 0x6BF8, 0xDE43, 0x6E9B, 0xDE44, 0x6ED6,
05675     0xDE45, 0x6EC8, 0xDE46, 0x6E8F, 0xDE47, 0x6EC0, 0xDE48, 0x6E9F,
05676     0xDE49, 0x6E93, 0xDE4A, 0x6E94, 0xDE4B, 0x6EA0, 0xDE4C, 0x6EB1,
05677     0xDE4D, 0x6EB9, 0xDE4E, 0x6EC6, 0xDE4F, 0x6ED2, 0xDE50, 0x6EBD,
05678     0xDE51, 0x6EC1, 0xDE52, 0x6E9E, 0xDE53, 0x6EC9, 0xDE54, 0x6EB7,
05679     0xDE55, 0x6EB0, 0xDE56, 0x6ECD, 0xDE57, 0x6EA6, 0xDE58, 0x6ECF,
05680     0xDE59, 0x6EB2, 0xDE5A, 0x6EBE, 0xDE5B, 0x6EC3, 0xDE5C, 0x6EDC,
05681     0xDE5D, 0x6ED8, 0xDE5E, 0x6E99, 0xDE5F, 0x6E92, 0xDE60, 0x6E8E,
05682     0xDE61, 0x6E8D, 0xDE62, 0x6EA4, 0xDE63, 0x6EA1, 0xDE64, 0x6EBF,
05683     0xDE65, 0x6EB3, 0xDE66, 0x6ED0, 0xDE67, 0x6ECA, 0xDE68, 0x6E97,
05684     0xDE69, 0x6EAE, 0xDE6A, 0x6EA3, 0xDE6B, 0x7147, 0xDE6C, 0x7154,
05685     0xDE6D, 0x7152, 0xDE6E, 0x7163, 0xDE6F, 0x7160, 0xDE70, 0x7141,
05686     0xDE71, 0x715D, 0xDE72, 0x7162, 0xDE73, 0x7172, 0xDE74, 0x7178,
05687     0xDE75, 0x716A, 0xDE76, 0x7161, 0xDE77, 0x7142, 0xDE78, 0x7158,
05688     0xDE79, 0x7143, 0xDE7A, 0x714B, 0xDE7B, 0x7170, 0xDE7C, 0x715F,
05689     0xDE7D, 0x7150, 0xDE7E, 0x7153, 0xDEA1, 0x7144, 0xDEA2, 0x714D,
05690     0xDEA3, 0x715A, 0xDEA4, 0x724F, 0xDEA5, 0x728D, 0xDEA6, 0x728C,
05691     0xDEA7, 0x7291, 0xDEA8, 0x7290, 0xDEA9, 0x728E, 0xDEAA, 0x733C,
05692     0xDEAB, 0x7342, 0xDEAC, 0x733B, 0xDEAD, 0x733A, 0xDEAE, 0x7340,
05693     0xDEAF, 0x734A, 0xDEB0, 0x7349, 0xDEB1, 0x7444, 0xDEB2, 0x744A,
05694     0xDEB3, 0x744B, 0xDEB4, 0x7452, 0xDEB5, 0x7451, 0xDEB6, 0x7457,
05695     0xDEB7, 0x7440, 0xDEB8, 0x744F, 0xDEB9, 0x7450, 0xDEBA, 0x744E,
05696     0xDEBB, 0x7442, 0xDEBC, 0x7446, 0xDEBD, 0x744D, 0xDEBE, 0x7454,
05697     0xDEBF, 0x74E1, 0xDEC0, 0x74FF, 0xDEC1, 0x74FE, 0xDEC2, 0x74FD,
05698     0xDEC3, 0x751D, 0xDEC4, 0x7579, 0xDEC5, 0x7577, 0xDEC6, 0x6983,
05699     0xDEC7, 0x75EF, 0xDEC8, 0x760F, 0xDEC9, 0x7603, 0xDECA, 0x75F7,
05700     0xDECB, 0x75FE, 0xDECC, 0x75FC, 0xDECD, 0x75F9, 0xDECE, 0x75F8,
05701     0xDECF, 0x7610, 0xDED0, 0x75FB, 0xDED1, 0x75F6, 0xDED2, 0x75ED,
05702     0xDED3, 0x75F5, 0xDED4, 0x75FD, 0xDED5, 0x7699, 0xDED6, 0x76B5,
05703     0xDED7, 0x76DD, 0xDED8, 0x7755, 0xDED9, 0x775F, 0xDEDA, 0x7760,
05704     0xDEDB, 0x7752, 0xDEDC, 0x7756, 0xDEDD, 0x775A, 0xDEDE, 0x7769,
05705     0xDEDF, 0x7767, 0xDEE0, 0x7754, 0xDEE1, 0x7759, 0xDEE2, 0x776D,
05706     0xDEE3, 0x77E0, 0xDEE4, 0x7887, 0xDEE5, 0x789A, 0xDEE6, 0x7894,
05707     0xDEE7, 0x788F, 0xDEE8, 0x7884, 0xDEE9, 0x7895, 0xDEEA, 0x7885,
05708     0xDEEB, 0x7886, 0xDEEC, 0x78A1, 0xDEED, 0x7883, 0xDEEE, 0x7879,
05709     0xDEEF, 0x7899, 0xDEF0, 0x7880, 0xDEF1, 0x7896, 0xDEF2, 0x787B,
05710     0xDEF3, 0x797C, 0xDEF4, 0x7982, 0xDEF5, 0x797D, 0xDEF6, 0x7979,
05711     0xDEF7, 0x7A11, 0xDEF8, 0x7A18, 0xDEF9, 0x7A19, 0xDEFA, 0x7A12,
05712     0xDEFB, 0x7A17, 0xDEFC, 0x7A15, 0xDEFD, 0x7A22, 0xDEFE, 0x7A13,
05713     0xDF40, 0x7A1B, 0xDF41, 0x7A10, 0xDF42, 0x7AA3, 0xDF43, 0x7AA2,
05714     0xDF44, 0x7A9E, 0xDF45, 0x7AEB, 0xDF46, 0x7B66, 0xDF47, 0x7B64,
05715     0xDF48, 0x7B6D, 0xDF49, 0x7B74, 0xDF4A, 0x7B69, 0xDF4B, 0x7B72,
05716     0xDF4C, 0x7B65, 0xDF4D, 0x7B73, 0xDF4E, 0x7B71, 0xDF4F, 0x7B70,
05717     0xDF50, 0x7B61, 0xDF51, 0x7B78, 0xDF52, 0x7B76, 0xDF53, 0x7B63,
05718     0xDF54, 0x7CB2, 0xDF55, 0x7CB4, 0xDF56, 0x7CAF, 0xDF57, 0x7D88,
05719     0xDF58, 0x7D86, 0xDF59, 0x7D80, 0xDF5A, 0x7D8D, 0xDF5B, 0x7D7F,
05720     0xDF5C, 0x7D85, 0xDF5D, 0x7D7A, 0xDF5E, 0x7D8E, 0xDF5F, 0x7D7B,
05721     0xDF60, 0x7D83, 0xDF61, 0x7D7C, 0xDF62, 0x7D8C, 0xDF63, 0x7D94,
05722     0xDF64, 0x7D84, 0xDF65, 0x7D7D, 0xDF66, 0x7D92, 0xDF67, 0x7F6D,
05723     0xDF68, 0x7F6B, 0xDF69, 0x7F67, 0xDF6A, 0x7F68, 0xDF6B, 0x7F6C,
05724     0xDF6C, 0x7FA6, 0xDF6D, 0x7FA5, 0xDF6E, 0x7FA7, 0xDF6F, 0x7FDB,
05725     0xDF70, 0x7FDC, 0xDF71, 0x8021, 0xDF72, 0x8164, 0xDF73, 0x8160,
05726     0xDF74, 0x8177, 0xDF75, 0x815C, 0xDF76, 0x8169, 0xDF77, 0x815B,
05727     0xDF78, 0x8162, 0xDF79, 0x8172, 0xDF7A, 0x6721, 0xDF7B, 0x815E,
05728     0xDF7C, 0x8176, 0xDF7D, 0x8167, 0xDF7E, 0x816F, 0xDFA1, 0x8144,
05729     0xDFA2, 0x8161, 0xDFA3, 0x821D, 0xDFA4, 0x8249, 0xDFA5, 0x8244,
05730     0xDFA6, 0x8240, 0xDFA7, 0x8242, 0xDFA8, 0x8245, 0xDFA9, 0x84F1,
05731     0xDFAA, 0x843F, 0xDFAB, 0x8456, 0xDFAC, 0x8476, 0xDFAD, 0x8479,
05732     0xDFAE, 0x848F, 0xDFAF, 0x848D, 0xDFB0, 0x8465, 0xDFB1, 0x8451,
05733     0xDFB2, 0x8440, 0xDFB3, 0x8486, 0xDFB4, 0x8467, 0xDFB5, 0x8430,
05734     0xDFB6, 0x844D, 0xDFB7, 0x847D, 0xDFB8, 0x845A, 0xDFB9, 0x8459,
05735     0xDFBA, 0x8474, 0xDFBB, 0x8473, 0xDFBC, 0x845D, 0xDFBD, 0x8507,
05736     0xDFBE, 0x845E, 0xDFBF, 0x8437, 0xDFC0, 0x843A, 0xDFC1, 0x8434,
05737     0xDFC2, 0x847A, 0xDFC3, 0x8443, 0xDFC4, 0x8478, 0xDFC5, 0x8432,
05738     0xDFC6, 0x8445, 0xDFC7, 0x8429, 0xDFC8, 0x83D9, 0xDFC9, 0x844B,
05739     0xDFCA, 0x842F, 0xDFCB, 0x8442, 0xDFCC, 0x842D, 0xDFCD, 0x845F,
05740     0xDFCE, 0x8470, 0xDFCF, 0x8439, 0xDFD0, 0x844E, 0xDFD1, 0x844C,
05741     0xDFD2, 0x8452, 0xDFD3, 0x846F, 0xDFD4, 0x84C5, 0xDFD5, 0x848E,
05742     0xDFD6, 0x843B, 0xDFD7, 0x8447, 0xDFD8, 0x8436, 0xDFD9, 0x8433,
05743     0xDFDA, 0x8468, 0xDFDB, 0x847E, 0xDFDC, 0x8444, 0xDFDD, 0x842B,
05744     0xDFDE, 0x8460, 0xDFDF, 0x8454, 0xDFE0, 0x846E, 0xDFE1, 0x8450,
05745     0xDFE2, 0x870B, 0xDFE3, 0x8704, 0xDFE4, 0x86F7, 0xDFE5, 0x870C,
05746     0xDFE6, 0x86FA, 0xDFE7, 0x86D6, 0xDFE8, 0x86F5, 0xDFE9, 0x874D,
05747     0xDFEA, 0x86F8, 0xDFEB, 0x870E, 0xDFEC, 0x8709, 0xDFED, 0x8701,
05748     0xDFEE, 0x86F6, 0xDFEF, 0x870D, 0xDFF0, 0x8705, 0xDFF1, 0x88D6,
05749     0xDFF2, 0x88CB, 0xDFF3, 0x88CD, 0xDFF4, 0x88CE, 0xDFF5, 0x88DE,
05750     0xDFF6, 0x88DB, 0xDFF7, 0x88DA, 0xDFF8, 0x88CC, 0xDFF9, 0x88D0,
05751     0xDFFA, 0x8985, 0xDFFB, 0x899B, 0xDFFC, 0x89DF, 0xDFFD, 0x89E5,
05752     0xDFFE, 0x89E4, 0xE040, 0x89E1, 0xE041, 0x89E0, 0xE042, 0x89E2,
05753     0xE043, 0x89DC, 0xE044, 0x89E6, 0xE045, 0x8A76, 0xE046, 0x8A86,
05754     0xE047, 0x8A7F, 0xE048, 0x8A61, 0xE049, 0x8A3F, 0xE04A, 0x8A77,
05755     0xE04B, 0x8A82, 0xE04C, 0x8A84, 0xE04D, 0x8A75, 0xE04E, 0x8A83,
05756     0xE04F, 0x8A81, 0xE050, 0x8A74, 0xE051, 0x8A7A, 0xE052, 0x8C3C,
05757     0xE053, 0x8C4B, 0xE054, 0x8C4A, 0xE055, 0x8C65, 0xE056, 0x8C64,
05758     0xE057, 0x8C66, 0xE058, 0x8C86, 0xE059, 0x8C84, 0xE05A, 0x8C85,
05759     0xE05B, 0x8CCC, 0xE05C, 0x8D68, 0xE05D, 0x8D69, 0xE05E, 0x8D91,
05760     0xE05F, 0x8D8C, 0xE060, 0x8D8E, 0xE061, 0x8D8F, 0xE062, 0x8D8D,
05761     0xE063, 0x8D93, 0xE064, 0x8D94, 0xE065, 0x8D90, 0xE066, 0x8D92,
05762     0xE067, 0x8DF0, 0xE068, 0x8DE0, 0xE069, 0x8DEC, 0xE06A, 0x8DF1,
05763     0xE06B, 0x8DEE, 0xE06C, 0x8DD0, 0xE06D, 0x8DE9, 0xE06E, 0x8DE3,
05764     0xE06F, 0x8DE2, 0xE070, 0x8DE7, 0xE071, 0x8DF2, 0xE072, 0x8DEB,
05765     0xE073, 0x8DF4, 0xE074, 0x8F06, 0xE075, 0x8EFF, 0xE076, 0x8F01,
05766     0xE077, 0x8F00, 0xE078, 0x8F05, 0xE079, 0x8F07, 0xE07A, 0x8F08,
05767     0xE07B, 0x8F02, 0xE07C, 0x8F0B, 0xE07D, 0x9052, 0xE07E, 0x903F,
05768     0xE0A1, 0x9044, 0xE0A2, 0x9049, 0xE0A3, 0x903D, 0xE0A4, 0x9110,
05769     0xE0A5, 0x910D, 0xE0A6, 0x910F, 0xE0A7, 0x9111, 0xE0A8, 0x9116,
05770     0xE0A9, 0x9114, 0xE0AA, 0x910B, 0xE0AB, 0x910E, 0xE0AC, 0x916E,
05771     0xE0AD, 0x916F, 0xE0AE, 0x9248, 0xE0AF, 0x9252, 0xE0B0, 0x9230,
05772     0xE0B1, 0x923A, 0xE0B2, 0x9266, 0xE0B3, 0x9233, 0xE0B4, 0x9265,
05773     0xE0B5, 0x925E, 0xE0B6, 0x9283, 0xE0B7, 0x922E, 0xE0B8, 0x924A,
05774     0xE0B9, 0x9246, 0xE0BA, 0x926D, 0xE0BB, 0x926C, 0xE0BC, 0x924F,
05775     0xE0BD, 0x9260, 0xE0BE, 0x9267, 0xE0BF, 0x926F, 0xE0C0, 0x9236,
05776     0xE0C1, 0x9261, 0xE0C2, 0x9270, 0xE0C3, 0x9231, 0xE0C4, 0x9254,
05777     0xE0C5, 0x9263, 0xE0C6, 0x9250, 0xE0C7, 0x9272, 0xE0C8, 0x924E,
05778     0xE0C9, 0x9253, 0xE0CA, 0x924C, 0xE0CB, 0x9256, 0xE0CC, 0x9232,
05779     0xE0CD, 0x959F, 0xE0CE, 0x959C, 0xE0CF, 0x959E, 0xE0D0, 0x959B,
05780     0xE0D1, 0x9692, 0xE0D2, 0x9693, 0xE0D3, 0x9691, 0xE0D4, 0x9697,
05781     0xE0D5, 0x96CE, 0xE0D6, 0x96FA, 0xE0D7, 0x96FD, 0xE0D8, 0x96F8,
05782     0xE0D9, 0x96F5, 0xE0DA, 0x9773, 0xE0DB, 0x9777, 0xE0DC, 0x9778,
05783     0xE0DD, 0x9772, 0xE0DE, 0x980F, 0xE0DF, 0x980D, 0xE0E0, 0x980E,
05784     0xE0E1, 0x98AC, 0xE0E2, 0x98F6, 0xE0E3, 0x98F9, 0xE0E4, 0x99AF,
05785     0xE0E5, 0x99B2, 0xE0E6, 0x99B0, 0xE0E7, 0x99B5, 0xE0E8, 0x9AAD,
05786     0xE0E9, 0x9AAB, 0xE0EA, 0x9B5B, 0xE0EB, 0x9CEA, 0xE0EC, 0x9CED,
05787     0xE0ED, 0x9CE7, 0xE0EE, 0x9E80, 0xE0EF, 0x9EFD, 0xE0F0, 0x50E6,
05788     0xE0F1, 0x50D4, 0xE0F2, 0x50D7, 0xE0F3, 0x50E8, 0xE0F4, 0x50F3,
05789     0xE0F5, 0x50DB, 0xE0F6, 0x50EA, 0xE0F7, 0x50DD, 0xE0F8, 0x50E4,
05790     0xE0F9, 0x50D3, 0xE0FA, 0x50EC, 0xE0FB, 0x50F0, 0xE0FC, 0x50EF,
05791     0xE0FD, 0x50E3, 0xE0FE, 0x50E0, 0xE140, 0x51D8, 0xE141, 0x5280,
05792     0xE142, 0x5281, 0xE143, 0x52E9, 0xE144, 0x52EB, 0xE145, 0x5330,
05793     0xE146, 0x53AC, 0xE147, 0x5627, 0xE148, 0x5615, 0xE149, 0x560C,
05794     0xE14A, 0x5612, 0xE14B, 0x55FC, 0xE14C, 0x560F, 0xE14D, 0x561C,
05795     0xE14E, 0x5601, 0xE14F, 0x5613, 0xE150, 0x5602, 0xE151, 0x55FA,
05796     0xE152, 0x561D, 0xE153, 0x5604, 0xE154, 0x55FF, 0xE155, 0x55F9,
05797     0xE156, 0x5889, 0xE157, 0x587C, 0xE158, 0x5890, 0xE159, 0x5898,
05798     0xE15A, 0x5886, 0xE15B, 0x5881, 0xE15C, 0x587F, 0xE15D, 0x5874,
05799     0xE15E, 0x588B, 0xE15F, 0x587A, 0xE160, 0x5887, 0xE161, 0x5891,
05800     0xE162, 0x588E, 0xE163, 0x5876, 0xE164, 0x5882, 0xE165, 0x5888,
05801     0xE166, 0x587B, 0xE167, 0x5894, 0xE168, 0x588F, 0xE169, 0x58FE,
05802     0xE16A, 0x596B, 0xE16B, 0x5ADC, 0xE16C, 0x5AEE, 0xE16D, 0x5AE5,
05803     0xE16E, 0x5AD5, 0xE16F, 0x5AEA, 0xE170, 0x5ADA, 0xE171, 0x5AED,
05804     0xE172, 0x5AEB, 0xE173, 0x5AF3, 0xE174, 0x5AE2, 0xE175, 0x5AE0,
05805     0xE176, 0x5ADB, 0xE177, 0x5AEC, 0xE178, 0x5ADE, 0xE179, 0x5ADD,
05806     0xE17A, 0x5AD9, 0xE17B, 0x5AE8, 0xE17C, 0x5ADF, 0xE17D, 0x5B77,
05807     0xE17E, 0x5BE0, 0xE1A1, 0x5BE3, 0xE1A2, 0x5C63, 0xE1A3, 0x5D82,
05808     0xE1A4, 0x5D80, 0xE1A5, 0x5D7D, 0xE1A6, 0x5D86, 0xE1A7, 0x5D7A,
05809     0xE1A8, 0x5D81, 0xE1A9, 0x5D77, 0xE1AA, 0x5D8A, 0xE1AB, 0x5D89,
05810     0xE1AC, 0x5D88, 0xE1AD, 0x5D7E, 0xE1AE, 0x5D7C, 0xE1AF, 0x5D8D,
05811     0xE1B0, 0x5D79, 0xE1B1, 0x5D7F, 0xE1B2, 0x5E58, 0xE1B3, 0x5E59,
05812     0xE1B4, 0x5E53, 0xE1B5, 0x5ED8, 0xE1B6, 0x5ED1, 0xE1B7, 0x5ED7,
05813     0xE1B8, 0x5ECE, 0xE1B9, 0x5EDC, 0xE1BA, 0x5ED5, 0xE1BB, 0x5ED9,
05814     0xE1BC, 0x5ED2, 0xE1BD, 0x5ED4, 0xE1BE, 0x5F44, 0xE1BF, 0x5F43,
05815     0xE1C0, 0x5F6F, 0xE1C1, 0x5FB6, 0xE1C2, 0x612C, 0xE1C3, 0x6128,
05816     0xE1C4, 0x6141, 0xE1C5, 0x615E, 0xE1C6, 0x6171, 0xE1C7, 0x6173,
05817     0xE1C8, 0x6152, 0xE1C9, 0x6153, 0xE1CA, 0x6172, 0xE1CB, 0x616C,
05818     0xE1CC, 0x6180, 0xE1CD, 0x6174, 0xE1CE, 0x6154, 0xE1CF, 0x617A,
05819     0xE1D0, 0x615B, 0xE1D1, 0x6165, 0xE1D2, 0x613B, 0xE1D3, 0x616A,
05820     0xE1D4, 0x6161, 0xE1D5, 0x6156, 0xE1D6, 0x6229, 0xE1D7, 0x6227,
05821     0xE1D8, 0x622B, 0xE1D9, 0x642B, 0xE1DA, 0x644D, 0xE1DB, 0x645B,
05822     0xE1DC, 0x645D, 0xE1DD, 0x6474, 0xE1DE, 0x6476, 0xE1DF, 0x6472,
05823     0xE1E0, 0x6473, 0xE1E1, 0x647D, 0xE1E2, 0x6475, 0xE1E3, 0x6466,
05824     0xE1E4, 0x64A6, 0xE1E5, 0x644E, 0xE1E6, 0x6482, 0xE1E7, 0x645E,
05825     0xE1E8, 0x645C, 0xE1E9, 0x644B, 0xE1EA, 0x6453, 0xE1EB, 0x6460,
05826     0xE1EC, 0x6450, 0xE1ED, 0x647F, 0xE1EE, 0x643F, 0xE1EF, 0x646C,
05827     0xE1F0, 0x646B, 0xE1F1, 0x6459, 0xE1F2, 0x6465, 0xE1F3, 0x6477,
05828     0xE1F4, 0x6573, 0xE1F5, 0x65A0, 0xE1F6, 0x66A1, 0xE1F7, 0x66A0,
05829     0xE1F8, 0x669F, 0xE1F9, 0x6705, 0xE1FA, 0x6704, 0xE1FB, 0x6722,
05830     0xE1FC, 0x69B1, 0xE1FD, 0x69B6, 0xE1FE, 0x69C9, 0xE240, 0x69A0,
05831     0xE241, 0x69CE, 0xE242, 0x6996, 0xE243, 0x69B0, 0xE244, 0x69AC,
05832     0xE245, 0x69BC, 0xE246, 0x6991, 0xE247, 0x6999, 0xE248, 0x698E,
05833     0xE249, 0x69A7, 0xE24A, 0x698D, 0xE24B, 0x69A9, 0xE24C, 0x69BE,
05834     0xE24D, 0x69AF, 0xE24E, 0x69BF, 0xE24F, 0x69C4, 0xE250, 0x69BD,
05835     0xE251, 0x69A4, 0xE252, 0x69D4, 0xE253, 0x69B9, 0xE254, 0x69CA,
05836     0xE255, 0x699A, 0xE256, 0x69CF, 0xE257, 0x69B3, 0xE258, 0x6993,
05837     0xE259, 0x69AA, 0xE25A, 0x69A1, 0xE25B, 0x699E, 0xE25C, 0x69D9,
05838     0xE25D, 0x6997, 0xE25E, 0x6990, 0xE25F, 0x69C2, 0xE260, 0x69B5,
05839     0xE261, 0x69A5, 0xE262, 0x69C6, 0xE263, 0x6B4A, 0xE264, 0x6B4D,
05840     0xE265, 0x6B4B, 0xE266, 0x6B9E, 0xE267, 0x6B9F, 0xE268, 0x6BA0,
05841     0xE269, 0x6BC3, 0xE26A, 0x6BC4, 0xE26B, 0x6BFE, 0xE26C, 0x6ECE,
05842     0xE26D, 0x6EF5, 0xE26E, 0x6EF1, 0xE26F, 0x6F03, 0xE270, 0x6F25,
05843     0xE271, 0x6EF8, 0xE272, 0x6F37, 0xE273, 0x6EFB, 0xE274, 0x6F2E,
05844     0xE275, 0x6F09, 0xE276, 0x6F4E, 0xE277, 0x6F19, 0xE278, 0x6F1A,
05845     0xE279, 0x6F27, 0xE27A, 0x6F18, 0xE27B, 0x6F3B, 0xE27C, 0x6F12,
05846     0xE27D, 0x6EED, 0xE27E, 0x6F0A, 0xE2A1, 0x6F36, 0xE2A2, 0x6F73,
05847     0xE2A3, 0x6EF9, 0xE2A4, 0x6EEE, 0xE2A5, 0x6F2D, 0xE2A6, 0x6F40,
05848     0xE2A7, 0x6F30, 0xE2A8, 0x6F3C, 0xE2A9, 0x6F35, 0xE2AA, 0x6EEB,
05849     0xE2AB, 0x6F07, 0xE2AC, 0x6F0E, 0xE2AD, 0x6F43, 0xE2AE, 0x6F05,
05850     0xE2AF, 0x6EFD, 0xE2B0, 0x6EF6, 0xE2B1, 0x6F39, 0xE2B2, 0x6F1C,
05851     0xE2B3, 0x6EFC, 0xE2B4, 0x6F3A, 0xE2B5, 0x6F1F, 0xE2B6, 0x6F0D,
05852     0xE2B7, 0x6F1E, 0xE2B8, 0x6F08, 0xE2B9, 0x6F21, 0xE2BA, 0x7187,
05853     0xE2BB, 0x7190, 0xE2BC, 0x7189, 0xE2BD, 0x7180, 0xE2BE, 0x7185,
05854     0xE2BF, 0x7182, 0xE2C0, 0x718F, 0xE2C1, 0x717B, 0xE2C2, 0x7186,
05855     0xE2C3, 0x7181, 0xE2C4, 0x7197, 0xE2C5, 0x7244, 0xE2C6, 0x7253,
05856     0xE2C7, 0x7297, 0xE2C8, 0x7295, 0xE2C9, 0x7293, 0xE2CA, 0x7343,
05857     0xE2CB, 0x734D, 0xE2CC, 0x7351, 0xE2CD, 0x734C, 0xE2CE, 0x7462,
05858     0xE2CF, 0x7473, 0xE2D0, 0x7471, 0xE2D1, 0x7475, 0xE2D2, 0x7472,
05859     0xE2D3, 0x7467, 0xE2D4, 0x746E, 0xE2D5, 0x7500, 0xE2D6, 0x7502,
05860     0xE2D7, 0x7503, 0xE2D8, 0x757D, 0xE2D9, 0x7590, 0xE2DA, 0x7616,
05861     0xE2DB, 0x7608, 0xE2DC, 0x760C, 0xE2DD, 0x7615, 0xE2DE, 0x7611,
05862     0xE2DF, 0x760A, 0xE2E0, 0x7614, 0xE2E1, 0x76B8, 0xE2E2, 0x7781,
05863     0xE2E3, 0x777C, 0xE2E4, 0x7785, 0xE2E5, 0x7782, 0xE2E6, 0x776E,
05864     0xE2E7, 0x7780, 0xE2E8, 0x776F, 0xE2E9, 0x777E, 0xE2EA, 0x7783,
05865     0xE2EB, 0x78B2, 0xE2EC, 0x78AA, 0xE2ED, 0x78B4, 0xE2EE, 0x78AD,
05866     0xE2EF, 0x78A8, 0xE2F0, 0x787E, 0xE2F1, 0x78AB, 0xE2F2, 0x789E,
05867     0xE2F3, 0x78A5, 0xE2F4, 0x78A0, 0xE2F5, 0x78AC, 0xE2F6, 0x78A2,
05868     0xE2F7, 0x78A4, 0xE2F8, 0x7998, 0xE2F9, 0x798A, 0xE2FA, 0x798B,
05869     0xE2FB, 0x7996, 0xE2FC, 0x7995, 0xE2FD, 0x7994, 0xE2FE, 0x7993,
05870     0xE340, 0x7997, 0xE341, 0x7988, 0xE342, 0x7992, 0xE343, 0x7990,
05871     0xE344, 0x7A2B, 0xE345, 0x7A4A, 0xE346, 0x7A30, 0xE347, 0x7A2F,
05872     0xE348, 0x7A28, 0xE349, 0x7A26, 0xE34A, 0x7AA8, 0xE34B, 0x7AAB,
05873     0xE34C, 0x7AAC, 0xE34D, 0x7AEE, 0xE34E, 0x7B88, 0xE34F, 0x7B9C,
05874     0xE350, 0x7B8A, 0xE351, 0x7B91, 0xE352, 0x7B90, 0xE353, 0x7B96,
05875     0xE354, 0x7B8D, 0xE355, 0x7B8C, 0xE356, 0x7B9B, 0xE357, 0x7B8E,
05876     0xE358, 0x7B85, 0xE359, 0x7B98, 0xE35A, 0x5284, 0xE35B, 0x7B99,
05877     0xE35C, 0x7BA4, 0xE35D, 0x7B82, 0xE35E, 0x7CBB, 0xE35F, 0x7CBF,
05878     0xE360, 0x7CBC, 0xE361, 0x7CBA, 0xE362, 0x7DA7, 0xE363, 0x7DB7,
05879     0xE364, 0x7DC2, 0xE365, 0x7DA3, 0xE366, 0x7DAA, 0xE367, 0x7DC1,
05880     0xE368, 0x7DC0, 0xE369, 0x7DC5, 0xE36A, 0x7D9D, 0xE36B, 0x7DCE,
05881     0xE36C, 0x7DC4, 0xE36D, 0x7DC6, 0xE36E, 0x7DCB, 0xE36F, 0x7DCC,
05882     0xE370, 0x7DAF, 0xE371, 0x7DB9, 0xE372, 0x7D96, 0xE373, 0x7DBC,
05883     0xE374, 0x7D9F, 0xE375, 0x7DA6, 0xE376, 0x7DAE, 0xE377, 0x7DA9,
05884     0xE378, 0x7DA1, 0xE379, 0x7DC9, 0xE37A, 0x7F73, 0xE37B, 0x7FE2,
05885     0xE37C, 0x7FE3, 0xE37D, 0x7FE5, 0xE37E, 0x7FDE, 0xE3A1, 0x8024,
05886     0xE3A2, 0x805D, 0xE3A3, 0x805C, 0xE3A4, 0x8189, 0xE3A5, 0x8186,
05887     0xE3A6, 0x8183, 0xE3A7, 0x8187, 0xE3A8, 0x818D, 0xE3A9, 0x818C,
05888     0xE3AA, 0x818B, 0xE3AB, 0x8215, 0xE3AC, 0x8497, 0xE3AD, 0x84A4,
05889     0xE3AE, 0x84A1, 0xE3AF, 0x849F, 0xE3B0, 0x84BA, 0xE3B1, 0x84CE,
05890     0xE3B2, 0x84C2, 0xE3B3, 0x84AC, 0xE3B4, 0x84AE, 0xE3B5, 0x84AB,
05891     0xE3B6, 0x84B9, 0xE3B7, 0x84B4, 0xE3B8, 0x84C1, 0xE3B9, 0x84CD,
05892     0xE3BA, 0x84AA, 0xE3BB, 0x849A, 0xE3BC, 0x84B1, 0xE3BD, 0x84D0,
05893     0xE3BE, 0x849D, 0xE3BF, 0x84A7, 0xE3C0, 0x84BB, 0xE3C1, 0x84A2,
05894     0xE3C2, 0x8494, 0xE3C3, 0x84C7, 0xE3C4, 0x84CC, 0xE3C5, 0x849B,
05895     0xE3C6, 0x84A9, 0xE3C7, 0x84AF, 0xE3C8, 0x84A8, 0xE3C9, 0x84D6,
05896     0xE3CA, 0x8498, 0xE3CB, 0x84B6, 0xE3CC, 0x84CF, 0xE3CD, 0x84A0,
05897     0xE3CE, 0x84D7, 0xE3CF, 0x84D4, 0xE3D0, 0x84D2, 0xE3D1, 0x84DB,
05898     0xE3D2, 0x84B0, 0xE3D3, 0x8491, 0xE3D4, 0x8661, 0xE3D5, 0x8733,
05899     0xE3D6, 0x8723, 0xE3D7, 0x8728, 0xE3D8, 0x876B, 0xE3D9, 0x8740,
05900     0xE3DA, 0x872E, 0xE3DB, 0x871E, 0xE3DC, 0x8721, 0xE3DD, 0x8719,
05901     0xE3DE, 0x871B, 0xE3DF, 0x8743, 0xE3E0, 0x872C, 0xE3E1, 0x8741,
05902     0xE3E2, 0x873E, 0xE3E3, 0x8746, 0xE3E4, 0x8720, 0xE3E5, 0x8732,
05903     0xE3E6, 0x872A, 0xE3E7, 0x872D, 0xE3E8, 0x873C, 0xE3E9, 0x8712,
05904     0xE3EA, 0x873A, 0xE3EB, 0x8731, 0xE3EC, 0x8735, 0xE3ED, 0x8742,
05905     0xE3EE, 0x8726, 0xE3EF, 0x8727, 0xE3F0, 0x8738, 0xE3F1, 0x8724,
05906     0xE3F2, 0x871A, 0xE3F3, 0x8730, 0xE3F4, 0x8711, 0xE3F5, 0x88F7,
05907     0xE3F6, 0x88E7, 0xE3F7, 0x88F1, 0xE3F8, 0x88F2, 0xE3F9, 0x88FA,
05908     0xE3FA, 0x88FE, 0xE3FB, 0x88EE, 0xE3FC, 0x88FC, 0xE3FD, 0x88F6,
05909     0xE3FE, 0x88FB, 0xE440, 0x88F0, 0xE441, 0x88EC, 0xE442, 0x88EB,
05910     0xE443, 0x899D, 0xE444, 0x89A1, 0xE445, 0x899F, 0xE446, 0x899E,
05911     0xE447, 0x89E9, 0xE448, 0x89EB, 0xE449, 0x89E8, 0xE44A, 0x8AAB,
05912     0xE44B, 0x8A99, 0xE44C, 0x8A8B, 0xE44D, 0x8A92, 0xE44E, 0x8A8F,
05913     0xE44F, 0x8A96, 0xE450, 0x8C3D, 0xE451, 0x8C68, 0xE452, 0x8C69,
05914     0xE453, 0x8CD5, 0xE454, 0x8CCF, 0xE455, 0x8CD7, 0xE456, 0x8D96,
05915     0xE457, 0x8E09, 0xE458, 0x8E02, 0xE459, 0x8DFF, 0xE45A, 0x8E0D,
05916     0xE45B, 0x8DFD, 0xE45C, 0x8E0A, 0xE45D, 0x8E03, 0xE45E, 0x8E07,
05917     0xE45F, 0x8E06, 0xE460, 0x8E05, 0xE461, 0x8DFE, 0xE462, 0x8E00,
05918     0xE463, 0x8E04, 0xE464, 0x8F10, 0xE465, 0x8F11, 0xE466, 0x8F0E,
05919     0xE467, 0x8F0D, 0xE468, 0x9123, 0xE469, 0x911C, 0xE46A, 0x9120,
05920     0xE46B, 0x9122, 0xE46C, 0x911F, 0xE46D, 0x911D, 0xE46E, 0x911A,
05921     0xE46F, 0x9124, 0xE470, 0x9121, 0xE471, 0x911B, 0xE472, 0x917A,
05922     0xE473, 0x9172, 0xE474, 0x9179, 0xE475, 0x9173, 0xE476, 0x92A5,
05923     0xE477, 0x92A4, 0xE478, 0x9276, 0xE479, 0x929B, 0xE47A, 0x927A,
05924     0xE47B, 0x92A0, 0xE47C, 0x9294, 0xE47D, 0x92AA, 0xE47E, 0x928D,
05925     0xE4A1, 0x92A6, 0xE4A2, 0x929A, 0xE4A3, 0x92AB, 0xE4A4, 0x9279,
05926     0xE4A5, 0x9297, 0xE4A6, 0x927F, 0xE4A7, 0x92A3, 0xE4A8, 0x92EE,
05927     0xE4A9, 0x928E, 0xE4AA, 0x9282, 0xE4AB, 0x9295, 0xE4AC, 0x92A2,
05928     0xE4AD, 0x927D, 0xE4AE, 0x9288, 0xE4AF, 0x92A1, 0xE4B0, 0x928A,
05929     0xE4B1, 0x9286, 0xE4B2, 0x928C, 0xE4B3, 0x9299, 0xE4B4, 0x92A7,
05930     0xE4B5, 0x927E, 0xE4B6, 0x9287, 0xE4B7, 0x92A9, 0xE4B8, 0x929D,
05931     0xE4B9, 0x928B, 0xE4BA, 0x922D, 0xE4BB, 0x969E, 0xE4BC, 0x96A1,
05932     0xE4BD, 0x96FF, 0xE4BE, 0x9758, 0xE4BF, 0x977D, 0xE4C0, 0x977A,
05933     0xE4C1, 0x977E, 0xE4C2, 0x9783, 0xE4C3, 0x9780, 0xE4C4, 0x9782,
05934     0xE4C5, 0x977B, 0xE4C6, 0x9784, 0xE4C7, 0x9781, 0xE4C8, 0x977F,
05935     0xE4C9, 0x97CE, 0xE4CA, 0x97CD, 0xE4CB, 0x9816, 0xE4CC, 0x98AD,
05936     0xE4CD, 0x98AE, 0xE4CE, 0x9902, 0xE4CF, 0x9900, 0xE4D0, 0x9907,
05937     0xE4D1, 0x999D, 0xE4D2, 0x999C, 0xE4D3, 0x99C3, 0xE4D4, 0x99B9,
05938     0xE4D5, 0x99BB, 0xE4D6, 0x99BA, 0xE4D7, 0x99C2, 0xE4D8, 0x99BD,
05939     0xE4D9, 0x99C7, 0xE4DA, 0x9AB1, 0xE4DB, 0x9AE3, 0xE4DC, 0x9AE7,
05940     0xE4DD, 0x9B3E, 0xE4DE, 0x9B3F, 0xE4DF, 0x9B60, 0xE4E0, 0x9B61,
05941     0xE4E1, 0x9B5F, 0xE4E2, 0x9CF1, 0xE4E3, 0x9CF2, 0xE4E4, 0x9CF5,
05942     0xE4E5, 0x9EA7, 0xE4E6, 0x50FF, 0xE4E7, 0x5103, 0xE4E8, 0x5130,
05943     0xE4E9, 0x50F8, 0xE4EA, 0x5106, 0xE4EB, 0x5107, 0xE4EC, 0x50F6,
05944     0xE4ED, 0x50FE, 0xE4EE, 0x510B, 0xE4EF, 0x510C, 0xE4F0, 0x50FD,
05945     0xE4F1, 0x510A, 0xE4F2, 0x528B, 0xE4F3, 0x528C, 0xE4F4, 0x52F1,
05946     0xE4F5, 0x52EF, 0xE4F6, 0x5648, 0xE4F7, 0x5642, 0xE4F8, 0x564C,
05947     0xE4F9, 0x5635, 0xE4FA, 0x5641, 0xE4FB, 0x564A, 0xE4FC, 0x5649,
05948     0xE4FD, 0x5646, 0xE4FE, 0x5658, 0xE540, 0x565A, 0xE541, 0x5640,
05949     0xE542, 0x5633, 0xE543, 0x563D, 0xE544, 0x562C, 0xE545, 0x563E,
05950     0xE546, 0x5638, 0xE547, 0x562A, 0xE548, 0x563A, 0xE549, 0x571A,
05951     0xE54A, 0x58AB, 0xE54B, 0x589D, 0xE54C, 0x58B1, 0xE54D, 0x58A0,
05952     0xE54E, 0x58A3, 0xE54F, 0x58AF, 0xE550, 0x58AC, 0xE551, 0x58A5,
05953     0xE552, 0x58A1, 0xE553, 0x58FF, 0xE554, 0x5AFF, 0xE555, 0x5AF4,
05954     0xE556, 0x5AFD, 0xE557, 0x5AF7, 0xE558, 0x5AF6, 0xE559, 0x5B03,
05955     0xE55A, 0x5AF8, 0xE55B, 0x5B02, 0xE55C, 0x5AF9, 0xE55D, 0x5B01,
05956     0xE55E, 0x5B07, 0xE55F, 0x5B05, 0xE560, 0x5B0F, 0xE561, 0x5C67,
05957     0xE562, 0x5D99, 0xE563, 0x5D97, 0xE564, 0x5D9F, 0xE565, 0x5D92,
05958     0xE566, 0x5DA2, 0xE567, 0x5D93, 0xE568, 0x5D95, 0xE569, 0x5DA0,
05959     0xE56A, 0x5D9C, 0xE56B, 0x5DA1, 0xE56C, 0x5D9A, 0xE56D, 0x5D9E,
05960     0xE56E, 0x5E69, 0xE56F, 0x5E5D, 0xE570, 0x5E60, 0xE571, 0x5E5C,
05961     0xE572, 0x7DF3, 0xE573, 0x5EDB, 0xE574, 0x5EDE, 0xE575, 0x5EE1,
05962     0xE576, 0x5F49, 0xE577, 0x5FB2, 0xE578, 0x618B, 0xE579, 0x6183,
05963     0xE57A, 0x6179, 0xE57B, 0x61B1, 0xE57C, 0x61B0, 0xE57D, 0x61A2,
05964     0xE57E, 0x6189, 0xE5A1, 0x619B, 0xE5A2, 0x6193, 0xE5A3, 0x61AF,
05965     0xE5A4, 0x61AD, 0xE5A5, 0x619F, 0xE5A6, 0x6192, 0xE5A7, 0x61AA,
05966     0xE5A8, 0x61A1, 0xE5A9, 0x618D, 0xE5AA, 0x6166, 0xE5AB, 0x61B3,
05967     0xE5AC, 0x622D, 0xE5AD, 0x646E, 0xE5AE, 0x6470, 0xE5AF, 0x6496,
05968     0xE5B0, 0x64A0, 0xE5B1, 0x6485, 0xE5B2, 0x6497, 0xE5B3, 0x649C,
05969     0xE5B4, 0x648F, 0xE5B5, 0x648B, 0xE5B6, 0x648A, 0xE5B7, 0x648C,
05970     0xE5B8, 0x64A3, 0xE5B9, 0x649F, 0xE5BA, 0x6468, 0xE5BB, 0x64B1,
05971     0xE5BC, 0x6498, 0xE5BD, 0x6576, 0xE5BE, 0x657A, 0xE5BF, 0x6579,
05972     0xE5C0, 0x657B, 0xE5C1, 0x65B2, 0xE5C2, 0x65B3, 0xE5C3, 0x66B5,
05973     0xE5C4, 0x66B0, 0xE5C5, 0x66A9, 0xE5C6, 0x66B2, 0xE5C7, 0x66B7,
05974     0xE5C8, 0x66AA, 0xE5C9, 0x66AF, 0xE5CA, 0x6A00, 0xE5CB, 0x6A06,
05975     0xE5CC, 0x6A17, 0xE5CD, 0x69E5, 0xE5CE, 0x69F8, 0xE5CF, 0x6A15,
05976     0xE5D0, 0x69F1, 0xE5D1, 0x69E4, 0xE5D2, 0x6A20, 0xE5D3, 0x69FF,
05977     0xE5D4, 0x69EC, 0xE5D5, 0x69E2, 0xE5D6, 0x6A1B, 0xE5D7, 0x6A1D,
05978     0xE5D8, 0x69FE, 0xE5D9, 0x6A27, 0xE5DA, 0x69F2, 0xE5DB, 0x69EE,
05979     0xE5DC, 0x6A14, 0xE5DD, 0x69F7, 0xE5DE, 0x69E7, 0xE5DF, 0x6A40,
05980     0xE5E0, 0x6A08, 0xE5E1, 0x69E6, 0xE5E2, 0x69FB, 0xE5E3, 0x6A0D,
05981     0xE5E4, 0x69FC, 0xE5E5, 0x69EB, 0xE5E6, 0x6A09, 0xE5E7, 0x6A04,
05982     0xE5E8, 0x6A18, 0xE5E9, 0x6A25, 0xE5EA, 0x6A0F, 0xE5EB, 0x69F6,
05983     0xE5EC, 0x6A26, 0xE5ED, 0x6A07, 0xE5EE, 0x69F4, 0xE5EF, 0x6A16,
05984     0xE5F0, 0x6B51, 0xE5F1, 0x6BA5, 0xE5F2, 0x6BA3, 0xE5F3, 0x6BA2,
05985     0xE5F4, 0x6BA6, 0xE5F5, 0x6C01, 0xE5F6, 0x6C00, 0xE5F7, 0x6BFF,
05986     0xE5F8, 0x6C02, 0xE5F9, 0x6F41, 0xE5FA, 0x6F26, 0xE5FB, 0x6F7E,
05987     0xE5FC, 0x6F87, 0xE5FD, 0x6FC6, 0xE5FE, 0x6F92, 0xE640, 0x6F8D,
05988     0xE641, 0x6F89, 0xE642, 0x6F8C, 0xE643, 0x6F62, 0xE644, 0x6F4F,
05989     0xE645, 0x6F85, 0xE646, 0x6F5A, 0xE647, 0x6F96, 0xE648, 0x6F76,
05990     0xE649, 0x6F6C, 0xE64A, 0x6F82, 0xE64B, 0x6F55, 0xE64C, 0x6F72,
05991     0xE64D, 0x6F52, 0xE64E, 0x6F50, 0xE64F, 0x6F57, 0xE650, 0x6F94,
05992     0xE651, 0x6F93, 0xE652, 0x6F5D, 0xE653, 0x6F00, 0xE654, 0x6F61,
05993     0xE655, 0x6F6B, 0xE656, 0x6F7D, 0xE657, 0x6F67, 0xE658, 0x6F90,
05994     0xE659, 0x6F53, 0xE65A, 0x6F8B, 0xE65B, 0x6F69, 0xE65C, 0x6F7F,
05995     0xE65D, 0x6F95, 0xE65E, 0x6F63, 0xE65F, 0x6F77, 0xE660, 0x6F6A,
05996     0xE661, 0x6F7B, 0xE662, 0x71B2, 0xE663, 0x71AF, 0xE664, 0x719B,
05997     0xE665, 0x71B0, 0xE666, 0x71A0, 0xE667, 0x719A, 0xE668, 0x71A9,
05998     0xE669, 0x71B5, 0xE66A, 0x719D, 0xE66B, 0x71A5, 0xE66C, 0x719E,
05999     0xE66D, 0x71A4, 0xE66E, 0x71A1, 0xE66F, 0x71AA, 0xE670, 0x719C,
06000     0xE671, 0x71A7, 0xE672, 0x71B3, 0xE673, 0x7298, 0xE674, 0x729A,
06001     0xE675, 0x7358, 0xE676, 0x7352, 0xE677, 0x735E, 0xE678, 0x735F,
06002     0xE679, 0x7360, 0xE67A, 0x735D, 0xE67B, 0x735B, 0xE67C, 0x7361,
06003     0xE67D, 0x735A, 0xE67E, 0x7359, 0xE6A1, 0x7362, 0xE6A2, 0x7487,
06004     0xE6A3, 0x7489, 0xE6A4, 0x748A, 0xE6A5, 0x7486, 0xE6A6, 0x7481,
06005     0xE6A7, 0x747D, 0xE6A8, 0x7485, 0xE6A9, 0x7488, 0xE6AA, 0x747C,
06006     0xE6AB, 0x7479, 0xE6AC, 0x7508, 0xE6AD, 0x7507, 0xE6AE, 0x757E,
06007     0xE6AF, 0x7625, 0xE6B0, 0x761E, 0xE6B1, 0x7619, 0xE6B2, 0x761D,
06008     0xE6B3, 0x761C, 0xE6B4, 0x7623, 0xE6B5, 0x761A, 0xE6B6, 0x7628,
06009     0xE6B7, 0x761B, 0xE6B8, 0x769C, 0xE6B9, 0x769D, 0xE6BA, 0x769E,
06010     0xE6BB, 0x769B, 0xE6BC, 0x778D, 0xE6BD, 0x778F, 0xE6BE, 0x7789,
06011     0xE6BF, 0x7788, 0xE6C0, 0x78CD, 0xE6C1, 0x78BB, 0xE6C2, 0x78CF,
06012     0xE6C3, 0x78CC, 0xE6C4, 0x78D1, 0xE6C5, 0x78CE, 0xE6C6, 0x78D4,
06013     0xE6C7, 0x78C8, 0xE6C8, 0x78C3, 0xE6C9, 0x78C4, 0xE6CA, 0x78C9,
06014     0xE6CB, 0x799A, 0xE6CC, 0x79A1, 0xE6CD, 0x79A0, 0xE6CE, 0x799C,
06015     0xE6CF, 0x79A2, 0xE6D0, 0x799B, 0xE6D1, 0x6B76, 0xE6D2, 0x7A39,
06016     0xE6D3, 0x7AB2, 0xE6D4, 0x7AB4, 0xE6D5, 0x7AB3, 0xE6D6, 0x7BB7,
06017     0xE6D7, 0x7BCB, 0xE6D8, 0x7BBE, 0xE6D9, 0x7BAC, 0xE6DA, 0x7BCE,
06018     0xE6DB, 0x7BAF, 0xE6DC, 0x7BB9, 0xE6DD, 0x7BCA, 0xE6DE, 0x7BB5,
06019     0xE6DF, 0x7CC5, 0xE6E0, 0x7CC8, 0xE6E1, 0x7CCC, 0xE6E2, 0x7CCB,
06020     0xE6E3, 0x7DF7, 0xE6E4, 0x7DDB, 0xE6E5, 0x7DEA, 0xE6E6, 0x7DE7,
06021     0xE6E7, 0x7DD7, 0xE6E8, 0x7DE1, 0xE6E9, 0x7E03, 0xE6EA, 0x7DFA,
06022     0xE6EB, 0x7DE6, 0xE6EC, 0x7DF6, 0xE6ED, 0x7DF1, 0xE6EE, 0x7DF0,
06023     0xE6EF, 0x7DEE, 0xE6F0, 0x7DDF, 0xE6F1, 0x7F76, 0xE6F2, 0x7FAC,
06024     0xE6F3, 0x7FB0, 0xE6F4, 0x7FAD, 0xE6F5, 0x7FED, 0xE6F6, 0x7FEB,
06025     0xE6F7, 0x7FEA, 0xE6F8, 0x7FEC, 0xE6F9, 0x7FE6, 0xE6FA, 0x7FE8,
06026     0xE6FB, 0x8064, 0xE6FC, 0x8067, 0xE6FD, 0x81A3, 0xE6FE, 0x819F,
06027     0xE740, 0x819E, 0xE741, 0x8195, 0xE742, 0x81A2, 0xE743, 0x8199,
06028     0xE744, 0x8197, 0xE745, 0x8216, 0xE746, 0x824F, 0xE747, 0x8253,
06029     0xE748, 0x8252, 0xE749, 0x8250, 0xE74A, 0x824E, 0xE74B, 0x8251,
06030     0xE74C, 0x8524, 0xE74D, 0x853B, 0xE74E, 0x850F, 0xE74F, 0x8500,
06031     0xE750, 0x8529, 0xE751, 0x850E, 0xE752, 0x8509, 0xE753, 0x850D,
06032     0xE754, 0x851F, 0xE755, 0x850A, 0xE756, 0x8527, 0xE757, 0x851C,
06033     0xE758, 0x84FB, 0xE759, 0x852B, 0xE75A, 0x84FA, 0xE75B, 0x8508,
06034     0xE75C, 0x850C, 0xE75D, 0x84F4, 0xE75E, 0x852A, 0xE75F, 0x84F2,
06035     0xE760, 0x8515, 0xE761, 0x84F7, 0xE762, 0x84EB, 0xE763, 0x84F3,
06036     0xE764, 0x84FC, 0xE765, 0x8512, 0xE766, 0x84EA, 0xE767, 0x84E9,
06037     0xE768, 0x8516, 0xE769, 0x84FE, 0xE76A, 0x8528, 0xE76B, 0x851D,
06038     0xE76C, 0x852E, 0xE76D, 0x8502, 0xE76E, 0x84FD, 0xE76F, 0x851E,
06039     0xE770, 0x84F6, 0xE771, 0x8531, 0xE772, 0x8526, 0xE773, 0x84E7,
06040     0xE774, 0x84E8, 0xE775, 0x84F0, 0xE776, 0x84EF, 0xE777, 0x84F9,
06041     0xE778, 0x8518, 0xE779, 0x8520, 0xE77A, 0x8530, 0xE77B, 0x850B,
06042     0xE77C, 0x8519, 0xE77D, 0x852F, 0xE77E, 0x8662, 0xE7A1, 0x8756,
06043     0xE7A2, 0x8763, 0xE7A3, 0x8764, 0xE7A4, 0x8777, 0xE7A5, 0x87E1,
06044     0xE7A6, 0x8773, 0xE7A7, 0x8758, 0xE7A8, 0x8754, 0xE7A9, 0x875B,
06045     0xE7AA, 0x8752, 0xE7AB, 0x8761, 0xE7AC, 0x875A, 0xE7AD, 0x8751,
06046     0xE7AE, 0x875E, 0xE7AF, 0x876D, 0xE7B0, 0x876A, 0xE7B1, 0x8750,
06047     0xE7B2, 0x874E, 0xE7B3, 0x875F, 0xE7B4, 0x875D, 0xE7B5, 0x876F,
06048     0xE7B6, 0x876C, 0xE7B7, 0x877A, 0xE7B8, 0x876E, 0xE7B9, 0x875C,
06049     0xE7BA, 0x8765, 0xE7BB, 0x874F, 0xE7BC, 0x877B, 0xE7BD, 0x8775,
06050     0xE7BE, 0x8762, 0xE7BF, 0x8767, 0xE7C0, 0x8769, 0xE7C1, 0x885A,
06051     0xE7C2, 0x8905, 0xE7C3, 0x890C, 0xE7C4, 0x8914, 0xE7C5, 0x890B,
06052     0xE7C6, 0x8917, 0xE7C7, 0x8918, 0xE7C8, 0x8919, 0xE7C9, 0x8906,
06053     0xE7CA, 0x8916, 0xE7CB, 0x8911, 0xE7CC, 0x890E, 0xE7CD, 0x8909,
06054     0xE7CE, 0x89A2, 0xE7CF, 0x89A4, 0xE7D0, 0x89A3, 0xE7D1, 0x89ED,
06055     0xE7D2, 0x89F0, 0xE7D3, 0x89EC, 0xE7D4, 0x8ACF, 0xE7D5, 0x8AC6,
06056     0xE7D6, 0x8AB8, 0xE7D7, 0x8AD3, 0xE7D8, 0x8AD1, 0xE7D9, 0x8AD4,
06057     0xE7DA, 0x8AD5, 0xE7DB, 0x8ABB, 0xE7DC, 0x8AD7, 0xE7DD, 0x8ABE,
06058     0xE7DE, 0x8AC0, 0xE7DF, 0x8AC5, 0xE7E0, 0x8AD8, 0xE7E1, 0x8AC3,
06059     0xE7E2, 0x8ABA, 0xE7E3, 0x8ABD, 0xE7E4, 0x8AD9, 0xE7E5, 0x8C3E,
06060     0xE7E6, 0x8C4D, 0xE7E7, 0x8C8F, 0xE7E8, 0x8CE5, 0xE7E9, 0x8CDF,
06061     0xE7EA, 0x8CD9, 0xE7EB, 0x8CE8, 0xE7EC, 0x8CDA, 0xE7ED, 0x8CDD,
06062     0xE7EE, 0x8CE7, 0xE7EF, 0x8DA0, 0xE7F0, 0x8D9C, 0xE7F1, 0x8DA1,
06063     0xE7F2, 0x8D9B, 0xE7F3, 0x8E20, 0xE7F4, 0x8E23, 0xE7F5, 0x8E25,
06064     0xE7F6, 0x8E24, 0xE7F7, 0x8E2E, 0xE7F8, 0x8E15, 0xE7F9, 0x8E1B,
06065     0xE7FA, 0x8E16, 0xE7FB, 0x8E11, 0xE7FC, 0x8E19, 0xE7FD, 0x8E26,
06066     0xE7FE, 0x8E27, 0xE840, 0x8E14, 0xE841, 0x8E12, 0xE842, 0x8E18,
06067     0xE843, 0x8E13, 0xE844, 0x8E1C, 0xE845, 0x8E17, 0xE846, 0x8E1A,
06068     0xE847, 0x8F2C, 0xE848, 0x8F24, 0xE849, 0x8F18, 0xE84A, 0x8F1A,
06069     0xE84B, 0x8F20, 0xE84C, 0x8F23, 0xE84D, 0x8F16, 0xE84E, 0x8F17,
06070     0xE84F, 0x9073, 0xE850, 0x9070, 0xE851, 0x906F, 0xE852, 0x9067,
06071     0xE853, 0x906B, 0xE854, 0x912F, 0xE855, 0x912B, 0xE856, 0x9129,
06072     0xE857, 0x912A, 0xE858, 0x9132, 0xE859, 0x9126, 0xE85A, 0x912E,
06073     0xE85B, 0x9185, 0xE85C, 0x9186, 0xE85D, 0x918A, 0xE85E, 0x9181,
06074     0xE85F, 0x9182, 0xE860, 0x9184, 0xE861, 0x9180, 0xE862, 0x92D0,
06075     0xE863, 0x92C3, 0xE864, 0x92C4, 0xE865, 0x92C0, 0xE866, 0x92D9,
06076     0xE867, 0x92B6, 0xE868, 0x92CF, 0xE869, 0x92F1, 0xE86A, 0x92DF,
06077     0xE86B, 0x92D8, 0xE86C, 0x92E9, 0xE86D, 0x92D7, 0xE86E, 0x92DD,
06078     0xE86F, 0x92CC, 0xE870, 0x92EF, 0xE871, 0x92C2, 0xE872, 0x92E8,
06079     0xE873, 0x92CA, 0xE874, 0x92C8, 0xE875, 0x92CE, 0xE876, 0x92E6,
06080     0xE877, 0x92CD, 0xE878, 0x92D5, 0xE879, 0x92C9, 0xE87A, 0x92E0,
06081     0xE87B, 0x92DE, 0xE87C, 0x92E7, 0xE87D, 0x92D1, 0xE87E, 0x92D3,
06082     0xE8A1, 0x92B5, 0xE8A2, 0x92E1, 0xE8A3, 0x92C6, 0xE8A4, 0x92B4,
06083     0xE8A5, 0x957C, 0xE8A6, 0x95AC, 0xE8A7, 0x95AB, 0xE8A8, 0x95AE,
06084     0xE8A9, 0x95B0, 0xE8AA, 0x96A4, 0xE8AB, 0x96A2, 0xE8AC, 0x96D3,
06085     0xE8AD, 0x9705, 0xE8AE, 0x9708, 0xE8AF, 0x9702, 0xE8B0, 0x975A,
06086     0xE8B1, 0x978A, 0xE8B2, 0x978E, 0xE8B3, 0x9788, 0xE8B4, 0x97D0,
06087     0xE8B5, 0x97CF, 0xE8B6, 0x981E, 0xE8B7, 0x981D, 0xE8B8, 0x9826,
06088     0xE8B9, 0x9829, 0xE8BA, 0x9828, 0xE8BB, 0x9820, 0xE8BC, 0x981B,
06089     0xE8BD, 0x9827, 0xE8BE, 0x98B2, 0xE8BF, 0x9908, 0xE8C0, 0x98FA,
06090     0xE8C1, 0x9911, 0xE8C2, 0x9914, 0xE8C3, 0x9916, 0xE8C4, 0x9917,
06091     0xE8C5, 0x9915, 0xE8C6, 0x99DC, 0xE8C7, 0x99CD, 0xE8C8, 0x99CF,
06092     0xE8C9, 0x99D3, 0xE8CA, 0x99D4, 0xE8CB, 0x99CE, 0xE8CC, 0x99C9,
06093     0xE8CD, 0x99D6, 0xE8CE, 0x99D8, 0xE8CF, 0x99CB, 0xE8D0, 0x99D7,
06094     0xE8D1, 0x99CC, 0xE8D2, 0x9AB3, 0xE8D3, 0x9AEC, 0xE8D4, 0x9AEB,
06095     0xE8D5, 0x9AF3, 0xE8D6, 0x9AF2, 0xE8D7, 0x9AF1, 0xE8D8, 0x9B46,
06096     0xE8D9, 0x9B43, 0xE8DA, 0x9B67, 0xE8DB, 0x9B74, 0xE8DC, 0x9B71,
06097     0xE8DD, 0x9B66, 0xE8DE, 0x9B76, 0xE8DF, 0x9B75, 0xE8E0, 0x9B70,
06098     0xE8E1, 0x9B68, 0xE8E2, 0x9B64, 0xE8E3, 0x9B6C, 0xE8E4, 0x9CFC,
06099     0xE8E5, 0x9CFA, 0xE8E6, 0x9CFD, 0xE8E7, 0x9CFF, 0xE8E8, 0x9CF7,
06100     0xE8E9, 0x9D07, 0xE8EA, 0x9D00, 0xE8EB, 0x9CF9, 0xE8EC, 0x9CFB,
06101     0xE8ED, 0x9D08, 0xE8EE, 0x9D05, 0xE8EF, 0x9D04, 0xE8F0, 0x9E83,
06102     0xE8F1, 0x9ED3, 0xE8F2, 0x9F0F, 0xE8F3, 0x9F10, 0xE8F4, 0x511C,
06103     0xE8F5, 0x5113, 0xE8F6, 0x5117, 0xE8F7, 0x511A, 0xE8F8, 0x5111,
06104     0xE8F9, 0x51DE, 0xE8FA, 0x5334, 0xE8FB, 0x53E1, 0xE8FC, 0x5670,
06105     0xE8FD, 0x5660, 0xE8FE, 0x566E, 0xE940, 0x5673, 0xE941, 0x5666,
06106     0xE942, 0x5663, 0xE943, 0x566D, 0xE944, 0x5672, 0xE945, 0x565E,
06107     0xE946, 0x5677, 0xE947, 0x571C, 0xE948, 0x571B, 0xE949, 0x58C8,
06108     0xE94A, 0x58BD, 0xE94B, 0x58C9, 0xE94C, 0x58BF, 0xE94D, 0x58BA,
06109     0xE94E, 0x58C2, 0xE94F, 0x58BC, 0xE950, 0x58C6, 0xE951, 0x5B17,
06110     0xE952, 0x5B19, 0xE953, 0x5B1B, 0xE954, 0x5B21, 0xE955, 0x5B14,
06111     0xE956, 0x5B13, 0xE957, 0x5B10, 0xE958, 0x5B16, 0xE959, 0x5B28,
06112     0xE95A, 0x5B1A, 0xE95B, 0x5B20, 0xE95C, 0x5B1E, 0xE95D, 0x5BEF,
06113     0xE95E, 0x5DAC, 0xE95F, 0x5DB1, 0xE960, 0x5DA9, 0xE961, 0x5DA7,
06114     0xE962, 0x5DB5, 0xE963, 0x5DB0, 0xE964, 0x5DAE, 0xE965, 0x5DAA,
06115     0xE966, 0x5DA8, 0xE967, 0x5DB2, 0xE968, 0x5DAD, 0xE969, 0x5DAF,
06116     0xE96A, 0x5DB4, 0xE96B, 0x5E67, 0xE96C, 0x5E68, 0xE96D, 0x5E66,
06117     0xE96E, 0x5E6F, 0xE96F, 0x5EE9, 0xE970, 0x5EE7, 0xE971, 0x5EE6,
06118     0xE972, 0x5EE8, 0xE973, 0x5EE5, 0xE974, 0x5F4B, 0xE975, 0x5FBC,
06119     0xE976, 0x619D, 0xE977, 0x61A8, 0xE978, 0x6196, 0xE979, 0x61C5,
06120     0xE97A, 0x61B4, 0xE97B, 0x61C6, 0xE97C, 0x61C1, 0xE97D, 0x61CC,
06121     0xE97E, 0x61BA, 0xE9A1, 0x61BF, 0xE9A2, 0x61B8, 0xE9A3, 0x618C,
06122     0xE9A4, 0x64D7, 0xE9A5, 0x64D6, 0xE9A6, 0x64D0, 0xE9A7, 0x64CF,
06123     0xE9A8, 0x64C9, 0xE9A9, 0x64BD, 0xE9AA, 0x6489, 0xE9AB, 0x64C3,
06124     0xE9AC, 0x64DB, 0xE9AD, 0x64F3, 0xE9AE, 0x64D9, 0xE9AF, 0x6533,
06125     0xE9B0, 0x657F, 0xE9B1, 0x657C, 0xE9B2, 0x65A2, 0xE9B3, 0x66C8,
06126     0xE9B4, 0x66BE, 0xE9B5, 0x66C0, 0xE9B6, 0x66CA, 0xE9B7, 0x66CB,
06127     0xE9B8, 0x66CF, 0xE9B9, 0x66BD, 0xE9BA, 0x66BB, 0xE9BB, 0x66BA,
06128     0xE9BC, 0x66CC, 0xE9BD, 0x6723, 0xE9BE, 0x6A34, 0xE9BF, 0x6A66,
06129     0xE9C0, 0x6A49, 0xE9C1, 0x6A67, 0xE9C2, 0x6A32, 0xE9C3, 0x6A68,
06130     0xE9C4, 0x6A3E, 0xE9C5, 0x6A5D, 0xE9C6, 0x6A6D, 0xE9C7, 0x6A76,
06131     0xE9C8, 0x6A5B, 0xE9C9, 0x6A51, 0xE9CA, 0x6A28, 0xE9CB, 0x6A5A,
06132     0xE9CC, 0x6A3B, 0xE9CD, 0x6A3F, 0xE9CE, 0x6A41, 0xE9CF, 0x6A6A,
06133     0xE9D0, 0x6A64, 0xE9D1, 0x6A50, 0xE9D2, 0x6A4F, 0xE9D3, 0x6A54,
06134     0xE9D4, 0x6A6F, 0xE9D5, 0x6A69, 0xE9D6, 0x6A60, 0xE9D7, 0x6A3C,
06135     0xE9D8, 0x6A5E, 0xE9D9, 0x6A56, 0xE9DA, 0x6A55, 0xE9DB, 0x6A4D,
06136     0xE9DC, 0x6A4E, 0xE9DD, 0x6A46, 0xE9DE, 0x6B55, 0xE9DF, 0x6B54,
06137     0xE9E0, 0x6B56, 0xE9E1, 0x6BA7, 0xE9E2, 0x6BAA, 0xE9E3, 0x6BAB,
06138     0xE9E4, 0x6BC8, 0xE9E5, 0x6BC7, 0xE9E6, 0x6C04, 0xE9E7, 0x6C03,
06139     0xE9E8, 0x6C06, 0xE9E9, 0x6FAD, 0xE9EA, 0x6FCB, 0xE9EB, 0x6FA3,
06140     0xE9EC, 0x6FC7, 0xE9ED, 0x6FBC, 0xE9EE, 0x6FCE, 0xE9EF, 0x6FC8,
06141     0xE9F0, 0x6F5E, 0xE9F1, 0x6FC4, 0xE9F2, 0x6FBD, 0xE9F3, 0x6F9E,
06142     0xE9F4, 0x6FCA, 0xE9F5, 0x6FA8, 0xE9F6, 0x7004, 0xE9F7, 0x6FA5,
06143     0xE9F8, 0x6FAE, 0xE9F9, 0x6FBA, 0xE9FA, 0x6FAC, 0xE9FB, 0x6FAA,
06144     0xE9FC, 0x6FCF, 0xE9FD, 0x6FBF, 0xE9FE, 0x6FB8, 0xEA40, 0x6FA2,
06145     0xEA41, 0x6FC9, 0xEA42, 0x6FAB, 0xEA43, 0x6FCD, 0xEA44, 0x6FAF,
06146     0xEA45, 0x6FB2, 0xEA46, 0x6FB0, 0xEA47, 0x71C5, 0xEA48, 0x71C2,
06147     0xEA49, 0x71BF, 0xEA4A, 0x71B8, 0xEA4B, 0x71D6, 0xEA4C, 0x71C0,
06148     0xEA4D, 0x71C1, 0xEA4E, 0x71CB, 0xEA4F, 0x71D4, 0xEA50, 0x71CA,
06149     0xEA51, 0x71C7, 0xEA52, 0x71CF, 0xEA53, 0x71BD, 0xEA54, 0x71D8,
06150     0xEA55, 0x71BC, 0xEA56, 0x71C6, 0xEA57, 0x71DA, 0xEA58, 0x71DB,
06151     0xEA59, 0x729D, 0xEA5A, 0x729E, 0xEA5B, 0x7369, 0xEA5C, 0x7366,
06152     0xEA5D, 0x7367, 0xEA5E, 0x736C, 0xEA5F, 0x7365, 0xEA60, 0x736B,
06153     0xEA61, 0x736A, 0xEA62, 0x747F, 0xEA63, 0x749A, 0xEA64, 0x74A0,
06154     0xEA65, 0x7494, 0xEA66, 0x7492, 0xEA67, 0x7495, 0xEA68, 0x74A1,
06155     0xEA69, 0x750B, 0xEA6A, 0x7580, 0xEA6B, 0x762F, 0xEA6C, 0x762D,
06156     0xEA6D, 0x7631, 0xEA6E, 0x763D, 0xEA6F, 0x7633, 0xEA70, 0x763C,
06157     0xEA71, 0x7635, 0xEA72, 0x7632, 0xEA73, 0x7630, 0xEA74, 0x76BB,
06158     0xEA75, 0x76E6, 0xEA76, 0x779A, 0xEA77, 0x779D, 0xEA78, 0x77A1,
06159     0xEA79, 0x779C, 0xEA7A, 0x779B, 0xEA7B, 0x77A2, 0xEA7C, 0x77A3,
06160     0xEA7D, 0x7795, 0xEA7E, 0x7799, 0xEAA1, 0x7797, 0xEAA2, 0x78DD,
06161     0xEAA3, 0x78E9, 0xEAA4, 0x78E5, 0xEAA5, 0x78EA, 0xEAA6, 0x78DE,
06162     0xEAA7, 0x78E3, 0xEAA8, 0x78DB, 0xEAA9, 0x78E1, 0xEAAA, 0x78E2,
06163     0xEAAB, 0x78ED, 0xEAAC, 0x78DF, 0xEAAD, 0x78E0, 0xEAAE, 0x79A4,
06164     0xEAAF, 0x7A44, 0xEAB0, 0x7A48, 0xEAB1, 0x7A47, 0xEAB2, 0x7AB6,
06165     0xEAB3, 0x7AB8, 0xEAB4, 0x7AB5, 0xEAB5, 0x7AB1, 0xEAB6, 0x7AB7,
06166     0xEAB7, 0x7BDE, 0xEAB8, 0x7BE3, 0xEAB9, 0x7BE7, 0xEABA, 0x7BDD,
06167     0xEABB, 0x7BD5, 0xEABC, 0x7BE5, 0xEABD, 0x7BDA, 0xEABE, 0x7BE8,
06168     0xEABF, 0x7BF9, 0xEAC0, 0x7BD4, 0xEAC1, 0x7BEA, 0xEAC2, 0x7BE2,
06169     0xEAC3, 0x7BDC, 0xEAC4, 0x7BEB, 0xEAC5, 0x7BD8, 0xEAC6, 0x7BDF,
06170     0xEAC7, 0x7CD2, 0xEAC8, 0x7CD4, 0xEAC9, 0x7CD7, 0xEACA, 0x7CD0,
06171     0xEACB, 0x7CD1, 0xEACC, 0x7E12, 0xEACD, 0x7E21, 0xEACE, 0x7E17,
06172     0xEACF, 0x7E0C, 0xEAD0, 0x7E1F, 0xEAD1, 0x7E20, 0xEAD2, 0x7E13,
06173     0xEAD3, 0x7E0E, 0xEAD4, 0x7E1C, 0xEAD5, 0x7E15, 0xEAD6, 0x7E1A,
06174     0xEAD7, 0x7E22, 0xEAD8, 0x7E0B, 0xEAD9, 0x7E0F, 0xEADA, 0x7E16,
06175     0xEADB, 0x7E0D, 0xEADC, 0x7E14, 0xEADD, 0x7E25, 0xEADE, 0x7E24,
06176     0xEADF, 0x7F43, 0xEAE0, 0x7F7B, 0xEAE1, 0x7F7C, 0xEAE2, 0x7F7A,
06177     0xEAE3, 0x7FB1, 0xEAE4, 0x7FEF, 0xEAE5, 0x802A, 0xEAE6, 0x8029,
06178     0xEAE7, 0x806C, 0xEAE8, 0x81B1, 0xEAE9, 0x81A6, 0xEAEA, 0x81AE,
06179     0xEAEB, 0x81B9, 0xEAEC, 0x81B5, 0xEAED, 0x81AB, 0xEAEE, 0x81B0,
06180     0xEAEF, 0x81AC, 0xEAF0, 0x81B4, 0xEAF1, 0x81B2, 0xEAF2, 0x81B7,
06181     0xEAF3, 0x81A7, 0xEAF4, 0x81F2, 0xEAF5, 0x8255, 0xEAF6, 0x8256,
06182     0xEAF7, 0x8257, 0xEAF8, 0x8556, 0xEAF9, 0x8545, 0xEAFA, 0x856B,
06183     0xEAFB, 0x854D, 0xEAFC, 0x8553, 0xEAFD, 0x8561, 0xEAFE, 0x8558,
06184     0xEB40, 0x8540, 0xEB41, 0x8546, 0xEB42, 0x8564, 0xEB43, 0x8541,
06185     0xEB44, 0x8562, 0xEB45, 0x8544, 0xEB46, 0x8551, 0xEB47, 0x8547,
06186     0xEB48, 0x8563, 0xEB49, 0x853E, 0xEB4A, 0x855B, 0xEB4B, 0x8571,
06187     0xEB4C, 0x854E, 0xEB4D, 0x856E, 0xEB4E, 0x8575, 0xEB4F, 0x8555,
06188     0xEB50, 0x8567, 0xEB51, 0x8560, 0xEB52, 0x858C, 0xEB53, 0x8566,
06189     0xEB54, 0x855D, 0xEB55, 0x8554, 0xEB56, 0x8565, 0xEB57, 0x856C,
06190     0xEB58, 0x8663, 0xEB59, 0x8665, 0xEB5A, 0x8664, 0xEB5B, 0x879B,
06191     0xEB5C, 0x878F, 0xEB5D, 0x8797, 0xEB5E, 0x8793, 0xEB5F, 0x8792,
06192     0xEB60, 0x8788, 0xEB61, 0x8781, 0xEB62, 0x8796, 0xEB63, 0x8798,
06193     0xEB64, 0x8779, 0xEB65, 0x8787, 0xEB66, 0x87A3, 0xEB67, 0x8785,
06194     0xEB68, 0x8790, 0xEB69, 0x8791, 0xEB6A, 0x879D, 0xEB6B, 0x8784,
06195     0xEB6C, 0x8794, 0xEB6D, 0x879C, 0xEB6E, 0x879A, 0xEB6F, 0x8789,
06196     0xEB70, 0x891E, 0xEB71, 0x8926, 0xEB72, 0x8930, 0xEB73, 0x892D,
06197     0xEB74, 0x892E, 0xEB75, 0x8927, 0xEB76, 0x8931, 0xEB77, 0x8922,
06198     0xEB78, 0x8929, 0xEB79, 0x8923, 0xEB7A, 0x892F, 0xEB7B, 0x892C,
06199     0xEB7C, 0x891F, 0xEB7D, 0x89F1, 0xEB7E, 0x8AE0, 0xEBA1, 0x8AE2,
06200     0xEBA2, 0x8AF2, 0xEBA3, 0x8AF4, 0xEBA4, 0x8AF5, 0xEBA5, 0x8ADD,
06201     0xEBA6, 0x8B14, 0xEBA7, 0x8AE4, 0xEBA8, 0x8ADF, 0xEBA9, 0x8AF0,
06202     0xEBAA, 0x8AC8, 0xEBAB, 0x8ADE, 0xEBAC, 0x8AE1, 0xEBAD, 0x8AE8,
06203     0xEBAE, 0x8AFF, 0xEBAF, 0x8AEF, 0xEBB0, 0x8AFB, 0xEBB1, 0x8C91,
06204     0xEBB2, 0x8C92, 0xEBB3, 0x8C90, 0xEBB4, 0x8CF5, 0xEBB5, 0x8CEE,
06205     0xEBB6, 0x8CF1, 0xEBB7, 0x8CF0, 0xEBB8, 0x8CF3, 0xEBB9, 0x8D6C,
06206     0xEBBA, 0x8D6E, 0xEBBB, 0x8DA5, 0xEBBC, 0x8DA7, 0xEBBD, 0x8E33,
06207     0xEBBE, 0x8E3E, 0xEBBF, 0x8E38, 0xEBC0, 0x8E40, 0xEBC1, 0x8E45,
06208     0xEBC2, 0x8E36, 0xEBC3, 0x8E3C, 0xEBC4, 0x8E3D, 0xEBC5, 0x8E41,
06209     0xEBC6, 0x8E30, 0xEBC7, 0x8E3F, 0xEBC8, 0x8EBD, 0xEBC9, 0x8F36,
06210     0xEBCA, 0x8F2E, 0xEBCB, 0x8F35, 0xEBCC, 0x8F32, 0xEBCD, 0x8F39,
06211     0xEBCE, 0x8F37, 0xEBCF, 0x8F34, 0xEBD0, 0x9076, 0xEBD1, 0x9079,
06212     0xEBD2, 0x907B, 0xEBD3, 0x9086, 0xEBD4, 0x90FA, 0xEBD5, 0x9133,
06213     0xEBD6, 0x9135, 0xEBD7, 0x9136, 0xEBD8, 0x9193, 0xEBD9, 0x9190,
06214     0xEBDA, 0x9191, 0xEBDB, 0x918D, 0xEBDC, 0x918F, 0xEBDD, 0x9327,
06215     0xEBDE, 0x931E, 0xEBDF, 0x9308, 0xEBE0, 0x931F, 0xEBE1, 0x9306,
06216     0xEBE2, 0x930F, 0xEBE3, 0x937A, 0xEBE4, 0x9338, 0xEBE5, 0x933C,
06217     0xEBE6, 0x931B, 0xEBE7, 0x9323, 0xEBE8, 0x9312, 0xEBE9, 0x9301,
06218     0xEBEA, 0x9346, 0xEBEB, 0x932D, 0xEBEC, 0x930E, 0xEBED, 0x930D,
06219     0xEBEE, 0x92CB, 0xEBEF, 0x931D, 0xEBF0, 0x92FA, 0xEBF1, 0x9325,
06220     0xEBF2, 0x9313, 0xEBF3, 0x92F9, 0xEBF4, 0x92F7, 0xEBF5, 0x9334,
06221     0xEBF6, 0x9302, 0xEBF7, 0x9324, 0xEBF8, 0x92FF, 0xEBF9, 0x9329,
06222     0xEBFA, 0x9339, 0xEBFB, 0x9335, 0xEBFC, 0x932A, 0xEBFD, 0x9314,
06223     0xEBFE, 0x930C, 0xEC40, 0x930B, 0xEC41, 0x92FE, 0xEC42, 0x9309,
06224     0xEC43, 0x9300, 0xEC44, 0x92FB, 0xEC45, 0x9316, 0xEC46, 0x95BC,
06225     0xEC47, 0x95CD, 0xEC48, 0x95BE, 0xEC49, 0x95B9, 0xEC4A, 0x95BA,
06226     0xEC4B, 0x95B6, 0xEC4C, 0x95BF, 0xEC4D, 0x95B5, 0xEC4E, 0x95BD,
06227     0xEC4F, 0x96A9, 0xEC50, 0x96D4, 0xEC51, 0x970B, 0xEC52, 0x9712,
06228     0xEC53, 0x9710, 0xEC54, 0x9799, 0xEC55, 0x9797, 0xEC56, 0x9794,
06229     0xEC57, 0x97F0, 0xEC58, 0x97F8, 0xEC59, 0x9835, 0xEC5A, 0x982F,
06230     0xEC5B, 0x9832, 0xEC5C, 0x9924, 0xEC5D, 0x991F, 0xEC5E, 0x9927,
06231     0xEC5F, 0x9929, 0xEC60, 0x999E, 0xEC61, 0x99EE, 0xEC62, 0x99EC,
06232     0xEC63, 0x99E5, 0xEC64, 0x99E4, 0xEC65, 0x99F0, 0xEC66, 0x99E3,
06233     0xEC67, 0x99EA, 0xEC68, 0x99E9, 0xEC69, 0x99E7, 0xEC6A, 0x9AB9,
06234     0xEC6B, 0x9ABF, 0xEC6C, 0x9AB4, 0xEC6D, 0x9ABB, 0xEC6E, 0x9AF6,
06235     0xEC6F, 0x9AFA, 0xEC70, 0x9AF9, 0xEC71, 0x9AF7, 0xEC72, 0x9B33,
06236     0xEC73, 0x9B80, 0xEC74, 0x9B85, 0xEC75, 0x9B87, 0xEC76, 0x9B7C,
06237     0xEC77, 0x9B7E, 0xEC78, 0x9B7B, 0xEC79, 0x9B82, 0xEC7A, 0x9B93,
06238     0xEC7B, 0x9B92, 0xEC7C, 0x9B90, 0xEC7D, 0x9B7A, 0xEC7E, 0x9B95,
06239     0xECA1, 0x9B7D, 0xECA2, 0x9B88, 0xECA3, 0x9D25, 0xECA4, 0x9D17,
06240     0xECA5, 0x9D20, 0xECA6, 0x9D1E, 0xECA7, 0x9D14, 0xECA8, 0x9D29,
06241     0xECA9, 0x9D1D, 0xECAA, 0x9D18, 0xECAB, 0x9D22, 0xECAC, 0x9D10,
06242     0xECAD, 0x9D19, 0xECAE, 0x9D1F, 0xECAF, 0x9E88, 0xECB0, 0x9E86,
06243     0xECB1, 0x9E87, 0xECB2, 0x9EAE, 0xECB3, 0x9EAD, 0xECB4, 0x9ED5,
06244     0xECB5, 0x9ED6, 0xECB6, 0x9EFA, 0xECB7, 0x9F12, 0xECB8, 0x9F3D,
06245     0xECB9, 0x5126, 0xECBA, 0x5125, 0xECBB, 0x5122, 0xECBC, 0x5124,
06246     0xECBD, 0x5120, 0xECBE, 0x5129, 0xECBF, 0x52F4, 0xECC0, 0x5693,
06247     0xECC1, 0x568C, 0xECC2, 0x568D, 0xECC3, 0x5686, 0xECC4, 0x5684,
06248     0xECC5, 0x5683, 0xECC6, 0x567E, 0xECC7, 0x5682, 0xECC8, 0x567F,
06249     0xECC9, 0x5681, 0xECCA, 0x58D6, 0xECCB, 0x58D4, 0xECCC, 0x58CF,
06250     0xECCD, 0x58D2, 0xECCE, 0x5B2D, 0xECCF, 0x5B25, 0xECD0, 0x5B32,
06251     0xECD1, 0x5B23, 0xECD2, 0x5B2C, 0xECD3, 0x5B27, 0xECD4, 0x5B26,
06252     0xECD5, 0x5B2F, 0xECD6, 0x5B2E, 0xECD7, 0x5B7B, 0xECD8, 0x5BF1,
06253     0xECD9, 0x5BF2, 0xECDA, 0x5DB7, 0xECDB, 0x5E6C, 0xECDC, 0x5E6A,
06254     0xECDD, 0x5FBE, 0xECDE, 0x5FBB, 0xECDF, 0x61C3, 0xECE0, 0x61B5,
06255     0xECE1, 0x61BC, 0xECE2, 0x61E7, 0xECE3, 0x61E0, 0xECE4, 0x61E5,
06256     0xECE5, 0x61E4, 0xECE6, 0x61E8, 0xECE7, 0x61DE, 0xECE8, 0x64EF,
06257     0xECE9, 0x64E9, 0xECEA, 0x64E3, 0xECEB, 0x64EB, 0xECEC, 0x64E4,
06258     0xECED, 0x64E8, 0xECEE, 0x6581, 0xECEF, 0x6580, 0xECF0, 0x65B6,
06259     0xECF1, 0x65DA, 0xECF2, 0x66D2, 0xECF3, 0x6A8D, 0xECF4, 0x6A96,
06260     0xECF5, 0x6A81, 0xECF6, 0x6AA5, 0xECF7, 0x6A89, 0xECF8, 0x6A9F,
06261     0xECF9, 0x6A9B, 0xECFA, 0x6AA1, 0xECFB, 0x6A9E, 0xECFC, 0x6A87,
06262     0xECFD, 0x6A93, 0xECFE, 0x6A8E, 0xED40, 0x6A95, 0xED41, 0x6A83,
06263     0xED42, 0x6AA8, 0xED43, 0x6AA4, 0xED44, 0x6A91, 0xED45, 0x6A7F,
06264     0xED46, 0x6AA6, 0xED47, 0x6A9A, 0xED48, 0x6A85, 0xED49, 0x6A8C,
06265     0xED4A, 0x6A92, 0xED4B, 0x6B5B, 0xED4C, 0x6BAD, 0xED4D, 0x6C09,
06266     0xED4E, 0x6FCC, 0xED4F, 0x6FA9, 0xED50, 0x6FF4, 0xED51, 0x6FD4,
06267     0xED52, 0x6FE3, 0xED53, 0x6FDC, 0xED54, 0x6FED, 0xED55, 0x6FE7,
06268     0xED56, 0x6FE6, 0xED57, 0x6FDE, 0xED58, 0x6FF2, 0xED59, 0x6FDD,
06269     0xED5A, 0x6FE2, 0xED5B, 0x6FE8, 0xED5C, 0x71E1, 0xED5D, 0x71F1,
06270     0xED5E, 0x71E8, 0xED5F, 0x71F2, 0xED60, 0x71E4, 0xED61, 0x71F0,
06271     0xED62, 0x71E2, 0xED63, 0x7373, 0xED64, 0x736E, 0xED65, 0x736F,
06272     0xED66, 0x7497, 0xED67, 0x74B2, 0xED68, 0x74AB, 0xED69, 0x7490,
06273     0xED6A, 0x74AA, 0xED6B, 0x74AD, 0xED6C, 0x74B1, 0xED6D, 0x74A5,
06274     0xED6E, 0x74AF, 0xED6F, 0x7510, 0xED70, 0x7511, 0xED71, 0x7512,
06275     0xED72, 0x750F, 0xED73, 0x7584, 0xED74, 0x7643, 0xED75, 0x7648,
06276     0xED76, 0x7649, 0xED77, 0x7647, 0xED78, 0x76A4, 0xED79, 0x76E9,
06277     0xED7A, 0x77B5, 0xED7B, 0x77AB, 0xED7C, 0x77B2, 0xED7D, 0x77B7,
06278     0xED7E, 0x77B6, 0xEDA1, 0x77B4, 0xEDA2, 0x77B1, 0xEDA3, 0x77A8,
06279     0xEDA4, 0x77F0, 0xEDA5, 0x78F3, 0xEDA6, 0x78FD, 0xEDA7, 0x7902,
06280     0xEDA8, 0x78FB, 0xEDA9, 0x78FC, 0xEDAA, 0x78F2, 0xEDAB, 0x7905,
06281     0xEDAC, 0x78F9, 0xEDAD, 0x78FE, 0xEDAE, 0x7904, 0xEDAF, 0x79AB,
06282     0xEDB0, 0x79A8, 0xEDB1, 0x7A5C, 0xEDB2, 0x7A5B, 0xEDB3, 0x7A56,
06283     0xEDB4, 0x7A58, 0xEDB5, 0x7A54, 0xEDB6, 0x7A5A, 0xEDB7, 0x7ABE,
06284     0xEDB8, 0x7AC0, 0xEDB9, 0x7AC1, 0xEDBA, 0x7C05, 0xEDBB, 0x7C0F,
06285     0xEDBC, 0x7BF2, 0xEDBD, 0x7C00, 0xEDBE, 0x7BFF, 0xEDBF, 0x7BFB,
06286     0xEDC0, 0x7C0E, 0xEDC1, 0x7BF4, 0xEDC2, 0x7C0B, 0xEDC3, 0x7BF3,
06287     0xEDC4, 0x7C02, 0xEDC5, 0x7C09, 0xEDC6, 0x7C03, 0xEDC7, 0x7C01,
06288     0xEDC8, 0x7BF8, 0xEDC9, 0x7BFD, 0xEDCA, 0x7C06, 0xEDCB, 0x7BF0,
06289     0xEDCC, 0x7BF1, 0xEDCD, 0x7C10, 0xEDCE, 0x7C0A, 0xEDCF, 0x7CE8,
06290     0xEDD0, 0x7E2D, 0xEDD1, 0x7E3C, 0xEDD2, 0x7E42, 0xEDD3, 0x7E33,
06291     0xEDD4, 0x9848, 0xEDD5, 0x7E38, 0xEDD6, 0x7E2A, 0xEDD7, 0x7E49,
06292     0xEDD8, 0x7E40, 0xEDD9, 0x7E47, 0xEDDA, 0x7E29, 0xEDDB, 0x7E4C,
06293     0xEDDC, 0x7E30, 0xEDDD, 0x7E3B, 0xEDDE, 0x7E36, 0xEDDF, 0x7E44,
06294     0xEDE0, 0x7E3A, 0xEDE1, 0x7F45, 0xEDE2, 0x7F7F, 0xEDE3, 0x7F7E,
06295     0xEDE4, 0x7F7D, 0xEDE5, 0x7FF4, 0xEDE6, 0x7FF2, 0xEDE7, 0x802C,
06296     0xEDE8, 0x81BB, 0xEDE9, 0x81C4, 0xEDEA, 0x81CC, 0xEDEB, 0x81CA,
06297     0xEDEC, 0x81C5, 0xEDED, 0x81C7, 0xEDEE, 0x81BC, 0xEDEF, 0x81E9,
06298     0xEDF0, 0x825B, 0xEDF1, 0x825A, 0xEDF2, 0x825C, 0xEDF3, 0x8583,
06299     0xEDF4, 0x8580, 0xEDF5, 0x858F, 0xEDF6, 0x85A7, 0xEDF7, 0x8595,
06300     0xEDF8, 0x85A0, 0xEDF9, 0x858B, 0xEDFA, 0x85A3, 0xEDFB, 0x857B,
06301     0xEDFC, 0x85A4, 0xEDFD, 0x859A, 0xEDFE, 0x859E, 0xEE40, 0x8577,
06302     0xEE41, 0x857C, 0xEE42, 0x8589, 0xEE43, 0x85A1, 0xEE44, 0x857A,
06303     0xEE45, 0x8578, 0xEE46, 0x8557, 0xEE47, 0x858E, 0xEE48, 0x8596,
06304     0xEE49, 0x8586, 0xEE4A, 0x858D, 0xEE4B, 0x8599, 0xEE4C, 0x859D,
06305     0xEE4D, 0x8581, 0xEE4E, 0x85A2, 0xEE4F, 0x8582, 0xEE50, 0x8588,
06306     0xEE51, 0x8585, 0xEE52, 0x8579, 0xEE53, 0x8576, 0xEE54, 0x8598,
06307     0xEE55, 0x8590, 0xEE56, 0x859F, 0xEE57, 0x8668, 0xEE58, 0x87BE,
06308     0xEE59, 0x87AA, 0xEE5A, 0x87AD, 0xEE5B, 0x87C5, 0xEE5C, 0x87B0,
06309     0xEE5D, 0x87AC, 0xEE5E, 0x87B9, 0xEE5F, 0x87B5, 0xEE60, 0x87BC,
06310     0xEE61, 0x87AE, 0xEE62, 0x87C9, 0xEE63, 0x87C3, 0xEE64, 0x87C2,
06311     0xEE65, 0x87CC, 0xEE66, 0x87B7, 0xEE67, 0x87AF, 0xEE68, 0x87C4,
06312     0xEE69, 0x87CA, 0xEE6A, 0x87B4, 0xEE6B, 0x87B6, 0xEE6C, 0x87BF,
06313     0xEE6D, 0x87B8, 0xEE6E, 0x87BD, 0xEE6F, 0x87DE, 0xEE70, 0x87B2,
06314     0xEE71, 0x8935, 0xEE72, 0x8933, 0xEE73, 0x893C, 0xEE74, 0x893E,
06315     0xEE75, 0x8941, 0xEE76, 0x8952, 0xEE77, 0x8937, 0xEE78, 0x8942,
06316     0xEE79, 0x89AD, 0xEE7A, 0x89AF, 0xEE7B, 0x89AE, 0xEE7C, 0x89F2,
06317     0xEE7D, 0x89F3, 0xEE7E, 0x8B1E, 0xEEA1, 0x8B18, 0xEEA2, 0x8B16,
06318     0xEEA3, 0x8B11, 0xEEA4, 0x8B05, 0xEEA5, 0x8B0B, 0xEEA6, 0x8B22,
06319     0xEEA7, 0x8B0F, 0xEEA8, 0x8B12, 0xEEA9, 0x8B15, 0xEEAA, 0x8B07,
06320     0xEEAB, 0x8B0D, 0xEEAC, 0x8B08, 0xEEAD, 0x8B06, 0xEEAE, 0x8B1C,
06321     0xEEAF, 0x8B13, 0xEEB0, 0x8B1A, 0xEEB1, 0x8C4F, 0xEEB2, 0x8C70,
06322     0xEEB3, 0x8C72, 0xEEB4, 0x8C71, 0xEEB5, 0x8C6F, 0xEEB6, 0x8C95,
06323     0xEEB7, 0x8C94, 0xEEB8, 0x8CF9, 0xEEB9, 0x8D6F, 0xEEBA, 0x8E4E,
06324     0xEEBB, 0x8E4D, 0xEEBC, 0x8E53, 0xEEBD, 0x8E50, 0xEEBE, 0x8E4C,
06325     0xEEBF, 0x8E47, 0xEEC0, 0x8F43, 0xEEC1, 0x8F40, 0xEEC2, 0x9085,
06326     0xEEC3, 0x907E, 0xEEC4, 0x9138, 0xEEC5, 0x919A, 0xEEC6, 0x91A2,
06327     0xEEC7, 0x919B, 0xEEC8, 0x9199, 0xEEC9, 0x919F, 0xEECA, 0x91A1,
06328     0xEECB, 0x919D, 0xEECC, 0x91A0, 0xEECD, 0x93A1, 0xEECE, 0x9383,
06329     0xEECF, 0x93AF, 0xEED0, 0x9364, 0xEED1, 0x9356, 0xEED2, 0x9347,
06330     0xEED3, 0x937C, 0xEED4, 0x9358, 0xEED5, 0x935C, 0xEED6, 0x9376,
06331     0xEED7, 0x9349, 0xEED8, 0x9350, 0xEED9, 0x9351, 0xEEDA, 0x9360,
06332     0xEEDB, 0x936D, 0xEEDC, 0x938F, 0xEEDD, 0x934C, 0xEEDE, 0x936A,
06333     0xEEDF, 0x9379, 0xEEE0, 0x9357, 0xEEE1, 0x9355, 0xEEE2, 0x9352,
06334     0xEEE3, 0x934F, 0xEEE4, 0x9371, 0xEEE5, 0x9377, 0xEEE6, 0x937B,
06335     0xEEE7, 0x9361, 0xEEE8, 0x935E, 0xEEE9, 0x9363, 0xEEEA, 0x9367,
06336     0xEEEB, 0x9380, 0xEEEC, 0x934E, 0xEEED, 0x9359, 0xEEEE, 0x95C7,
06337     0xEEEF, 0x95C0, 0xEEF0, 0x95C9, 0xEEF1, 0x95C3, 0xEEF2, 0x95C5,
06338     0xEEF3, 0x95B7, 0xEEF4, 0x96AE, 0xEEF5, 0x96B0, 0xEEF6, 0x96AC,
06339     0xEEF7, 0x9720, 0xEEF8, 0x971F, 0xEEF9, 0x9718, 0xEEFA, 0x971D,
06340     0xEEFB, 0x9719, 0xEEFC, 0x979A, 0xEEFD, 0x97A1, 0xEEFE, 0x979C,
06341     0xEF40, 0x979E, 0xEF41, 0x979D, 0xEF42, 0x97D5, 0xEF43, 0x97D4,
06342     0xEF44, 0x97F1, 0xEF45, 0x9841, 0xEF46, 0x9844, 0xEF47, 0x984A,
06343     0xEF48, 0x9849, 0xEF49, 0x9845, 0xEF4A, 0x9843, 0xEF4B, 0x9925,
06344     0xEF4C, 0x992B, 0xEF4D, 0x992C, 0xEF4E, 0x992A, 0xEF4F, 0x9933,
06345     0xEF50, 0x9932, 0xEF51, 0x992F, 0xEF52, 0x992D, 0xEF53, 0x9931,
06346     0xEF54, 0x9930, 0xEF55, 0x9998, 0xEF56, 0x99A3, 0xEF57, 0x99A1,
06347     0xEF58, 0x9A02, 0xEF59, 0x99FA, 0xEF5A, 0x99F4, 0xEF5B, 0x99F7,
06348     0xEF5C, 0x99F9, 0xEF5D, 0x99F8, 0xEF5E, 0x99F6, 0xEF5F, 0x99FB,
06349     0xEF60, 0x99FD, 0xEF61, 0x99FE, 0xEF62, 0x99FC, 0xEF63, 0x9A03,
06350     0xEF64, 0x9ABE, 0xEF65, 0x9AFE, 0xEF66, 0x9AFD, 0xEF67, 0x9B01,
06351     0xEF68, 0x9AFC, 0xEF69, 0x9B48, 0xEF6A, 0x9B9A, 0xEF6B, 0x9BA8,
06352     0xEF6C, 0x9B9E, 0xEF6D, 0x9B9B, 0xEF6E, 0x9BA6, 0xEF6F, 0x9BA1,
06353     0xEF70, 0x9BA5, 0xEF71, 0x9BA4, 0xEF72, 0x9B86, 0xEF73, 0x9BA2,
06354     0xEF74, 0x9BA0, 0xEF75, 0x9BAF, 0xEF76, 0x9D33, 0xEF77, 0x9D41,
06355     0xEF78, 0x9D67, 0xEF79, 0x9D36, 0xEF7A, 0x9D2E, 0xEF7B, 0x9D2F,
06356     0xEF7C, 0x9D31, 0xEF7D, 0x9D38, 0xEF7E, 0x9D30, 0xEFA1, 0x9D45,
06357     0xEFA2, 0x9D42, 0xEFA3, 0x9D43, 0xEFA4, 0x9D3E, 0xEFA5, 0x9D37,
06358     0xEFA6, 0x9D40, 0xEFA7, 0x9D3D, 0xEFA8, 0x7FF5, 0xEFA9, 0x9D2D,
06359     0xEFAA, 0x9E8A, 0xEFAB, 0x9E89, 0xEFAC, 0x9E8D, 0xEFAD, 0x9EB0,
06360     0xEFAE, 0x9EC8, 0xEFAF, 0x9EDA, 0xEFB0, 0x9EFB, 0xEFB1, 0x9EFF,
06361     0xEFB2, 0x9F24, 0xEFB3, 0x9F23, 0xEFB4, 0x9F22, 0xEFB5, 0x9F54,
06362     0xEFB6, 0x9FA0, 0xEFB7, 0x5131, 0xEFB8, 0x512D, 0xEFB9, 0x512E,
06363     0xEFBA, 0x5698, 0xEFBB, 0x569C, 0xEFBC, 0x5697, 0xEFBD, 0x569A,
06364     0xEFBE, 0x569D, 0xEFBF, 0x5699, 0xEFC0, 0x5970, 0xEFC1, 0x5B3C,
06365     0xEFC2, 0x5C69, 0xEFC3, 0x5C6A, 0xEFC4, 0x5DC0, 0xEFC5, 0x5E6D,
06366     0xEFC6, 0x5E6E, 0xEFC7, 0x61D8, 0xEFC8, 0x61DF, 0xEFC9, 0x61ED,
06367     0xEFCA, 0x61EE, 0xEFCB, 0x61F1, 0xEFCC, 0x61EA, 0xEFCD, 0x61F0,
06368     0xEFCE, 0x61EB, 0xEFCF, 0x61D6, 0xEFD0, 0x61E9, 0xEFD1, 0x64FF,
06369     0xEFD2, 0x6504, 0xEFD3, 0x64FD, 0xEFD4, 0x64F8, 0xEFD5, 0x6501,
06370     0xEFD6, 0x6503, 0xEFD7, 0x64FC, 0xEFD8, 0x6594, 0xEFD9, 0x65DB,
06371     0xEFDA, 0x66DA, 0xEFDB, 0x66DB, 0xEFDC, 0x66D8, 0xEFDD, 0x6AC5,
06372     0xEFDE, 0x6AB9, 0xEFDF, 0x6ABD, 0xEFE0, 0x6AE1, 0xEFE1, 0x6AC6,
06373     0xEFE2, 0x6ABA, 0xEFE3, 0x6AB6, 0xEFE4, 0x6AB7, 0xEFE5, 0x6AC7,
06374     0xEFE6, 0x6AB4, 0xEFE7, 0x6AAD, 0xEFE8, 0x6B5E, 0xEFE9, 0x6BC9,
06375     0xEFEA, 0x6C0B, 0xEFEB, 0x7007, 0xEFEC, 0x700C, 0xEFED, 0x700D,
06376     0xEFEE, 0x7001, 0xEFEF, 0x7005, 0xEFF0, 0x7014, 0xEFF1, 0x700E,
06377     0xEFF2, 0x6FFF, 0xEFF3, 0x7000, 0xEFF4, 0x6FFB, 0xEFF5, 0x7026,
06378     0xEFF6, 0x6FFC, 0xEFF7, 0x6FF7, 0xEFF8, 0x700A, 0xEFF9, 0x7201,
06379     0xEFFA, 0x71FF, 0xEFFB, 0x71F9, 0xEFFC, 0x7203, 0xEFFD, 0x71FD,
06380     0xEFFE, 0x7376, 0xF040, 0x74B8, 0xF041, 0x74C0, 0xF042, 0x74B5,
06381     0xF043, 0x74C1, 0xF044, 0x74BE, 0xF045, 0x74B6, 0xF046, 0x74BB,
06382     0xF047, 0x74C2, 0xF048, 0x7514, 0xF049, 0x7513, 0xF04A, 0x765C,
06383     0xF04B, 0x7664, 0xF04C, 0x7659, 0xF04D, 0x7650, 0xF04E, 0x7653,
06384     0xF04F, 0x7657, 0xF050, 0x765A, 0xF051, 0x76A6, 0xF052, 0x76BD,
06385     0xF053, 0x76EC, 0xF054, 0x77C2, 0xF055, 0x77BA, 0xF056, 0x78FF,
06386     0xF057, 0x790C, 0xF058, 0x7913, 0xF059, 0x7914, 0xF05A, 0x7909,
06387     0xF05B, 0x7910, 0xF05C, 0x7912, 0xF05D, 0x7911, 0xF05E, 0x79AD,
06388     0xF05F, 0x79AC, 0xF060, 0x7A5F, 0xF061, 0x7C1C, 0xF062, 0x7C29,
06389     0xF063, 0x7C19, 0xF064, 0x7C20, 0xF065, 0x7C1F, 0xF066, 0x7C2D,
06390     0xF067, 0x7C1D, 0xF068, 0x7C26, 0xF069, 0x7C28, 0xF06A, 0x7C22,
06391     0xF06B, 0x7C25, 0xF06C, 0x7C30, 0xF06D, 0x7E5C, 0xF06E, 0x7E50,
06392     0xF06F, 0x7E56, 0xF070, 0x7E63, 0xF071, 0x7E58, 0xF072, 0x7E62,
06393     0xF073, 0x7E5F, 0xF074, 0x7E51, 0xF075, 0x7E60, 0xF076, 0x7E57,
06394     0xF077, 0x7E53, 0xF078, 0x7FB5, 0xF079, 0x7FB3, 0xF07A, 0x7FF7,
06395     0xF07B, 0x7FF8, 0xF07C, 0x8075, 0xF07D, 0x81D1, 0xF07E, 0x81D2,
06396     0xF0A1, 0x81D0, 0xF0A2, 0x825F, 0xF0A3, 0x825E, 0xF0A4, 0x85B4,
06397     0xF0A5, 0x85C6, 0xF0A6, 0x85C0, 0xF0A7, 0x85C3, 0xF0A8, 0x85C2,
06398     0xF0A9, 0x85B3, 0xF0AA, 0x85B5, 0xF0AB, 0x85BD, 0xF0AC, 0x85C7,
06399     0xF0AD, 0x85C4, 0xF0AE, 0x85BF, 0xF0AF, 0x85CB, 0xF0B0, 0x85CE,
06400     0xF0B1, 0x85C8, 0xF0B2, 0x85C5, 0xF0B3, 0x85B1, 0xF0B4, 0x85B6,
06401     0xF0B5, 0x85D2, 0xF0B6, 0x8624, 0xF0B7, 0x85B8, 0xF0B8, 0x85B7,
06402     0xF0B9, 0x85BE, 0xF0BA, 0x8669, 0xF0BB, 0x87E7, 0xF0BC, 0x87E6,
06403     0xF0BD, 0x87E2, 0xF0BE, 0x87DB, 0xF0BF, 0x87EB, 0xF0C0, 0x87EA,
06404     0xF0C1, 0x87E5, 0xF0C2, 0x87DF, 0xF0C3, 0x87F3, 0xF0C4, 0x87E4,
06405     0xF0C5, 0x87D4, 0xF0C6, 0x87DC, 0xF0C7, 0x87D3, 0xF0C8, 0x87ED,
06406     0xF0C9, 0x87D8, 0xF0CA, 0x87E3, 0xF0CB, 0x87A4, 0xF0CC, 0x87D7,
06407     0xF0CD, 0x87D9, 0xF0CE, 0x8801, 0xF0CF, 0x87F4, 0xF0D0, 0x87E8,
06408     0xF0D1, 0x87DD, 0xF0D2, 0x8953, 0xF0D3, 0x894B, 0xF0D4, 0x894F,
06409     0xF0D5, 0x894C, 0xF0D6, 0x8946, 0xF0D7, 0x8950, 0xF0D8, 0x8951,
06410     0xF0D9, 0x8949, 0xF0DA, 0x8B2A, 0xF0DB, 0x8B27, 0xF0DC, 0x8B23,
06411     0xF0DD, 0x8B33, 0xF0DE, 0x8B30, 0xF0DF, 0x8B35, 0xF0E0, 0x8B47,
06412     0xF0E1, 0x8B2F, 0xF0E2, 0x8B3C, 0xF0E3, 0x8B3E, 0xF0E4, 0x8B31,
06413     0xF0E5, 0x8B25, 0xF0E6, 0x8B37, 0xF0E7, 0x8B26, 0xF0E8, 0x8B36,
06414     0xF0E9, 0x8B2E, 0xF0EA, 0x8B24, 0xF0EB, 0x8B3B, 0xF0EC, 0x8B3D,
06415     0xF0ED, 0x8B3A, 0xF0EE, 0x8C42, 0xF0EF, 0x8C75, 0xF0F0, 0x8C99,
06416     0xF0F1, 0x8C98, 0xF0F2, 0x8C97, 0xF0F3, 0x8CFE, 0xF0F4, 0x8D04,
06417     0xF0F5, 0x8D02, 0xF0F6, 0x8D00, 0xF0F7, 0x8E5C, 0xF0F8, 0x8E62,
06418     0xF0F9, 0x8E60, 0xF0FA, 0x8E57, 0xF0FB, 0x8E56, 0xF0FC, 0x8E5E,
06419     0xF0FD, 0x8E65, 0xF0FE, 0x8E67, 0xF140, 0x8E5B, 0xF141, 0x8E5A,
06420     0xF142, 0x8E61, 0xF143, 0x8E5D, 0xF144, 0x8E69, 0xF145, 0x8E54,
06421     0xF146, 0x8F46, 0xF147, 0x8F47, 0xF148, 0x8F48, 0xF149, 0x8F4B,
06422     0xF14A, 0x9128, 0xF14B, 0x913A, 0xF14C, 0x913B, 0xF14D, 0x913E,
06423     0xF14E, 0x91A8, 0xF14F, 0x91A5, 0xF150, 0x91A7, 0xF151, 0x91AF,
06424     0xF152, 0x91AA, 0xF153, 0x93B5, 0xF154, 0x938C, 0xF155, 0x9392,
06425     0xF156, 0x93B7, 0xF157, 0x939B, 0xF158, 0x939D, 0xF159, 0x9389,
06426     0xF15A, 0x93A7, 0xF15B, 0x938E, 0xF15C, 0x93AA, 0xF15D, 0x939E,
06427     0xF15E, 0x93A6, 0xF15F, 0x9395, 0xF160, 0x9388, 0xF161, 0x9399,
06428     0xF162, 0x939F, 0xF163, 0x938D, 0xF164, 0x93B1, 0xF165, 0x9391,
06429     0xF166, 0x93B2, 0xF167, 0x93A4, 0xF168, 0x93A8, 0xF169, 0x93B4,
06430     0xF16A, 0x93A3, 0xF16B, 0x93A5, 0xF16C, 0x95D2, 0xF16D, 0x95D3,
06431     0xF16E, 0x95D1, 0xF16F, 0x96B3, 0xF170, 0x96D7, 0xF171, 0x96DA,
06432     0xF172, 0x5DC2, 0xF173, 0x96DF, 0xF174, 0x96D8, 0xF175, 0x96DD,
06433     0xF176, 0x9723, 0xF177, 0x9722, 0xF178, 0x9725, 0xF179, 0x97AC,
06434     0xF17A, 0x97AE, 0xF17B, 0x97A8, 0xF17C, 0x97AB, 0xF17D, 0x97A4,
06435     0xF17E, 0x97AA, 0xF1A1, 0x97A2, 0xF1A2, 0x97A5, 0xF1A3, 0x97D7,
06436     0xF1A4, 0x97D9, 0xF1A5, 0x97D6, 0xF1A6, 0x97D8, 0xF1A7, 0x97FA,
06437     0xF1A8, 0x9850, 0xF1A9, 0x9851, 0xF1AA, 0x9852, 0xF1AB, 0x98B8,
06438     0xF1AC, 0x9941, 0xF1AD, 0x993C, 0xF1AE, 0x993A, 0xF1AF, 0x9A0F,
06439     0xF1B0, 0x9A0B, 0xF1B1, 0x9A09, 0xF1B2, 0x9A0D, 0xF1B3, 0x9A04,
06440     0xF1B4, 0x9A11, 0xF1B5, 0x9A0A, 0xF1B6, 0x9A05, 0xF1B7, 0x9A07,
06441     0xF1B8, 0x9A06, 0xF1B9, 0x9AC0, 0xF1BA, 0x9ADC, 0xF1BB, 0x9B08,
06442     0xF1BC, 0x9B04, 0xF1BD, 0x9B05, 0xF1BE, 0x9B29, 0xF1BF, 0x9B35,
06443     0xF1C0, 0x9B4A, 0xF1C1, 0x9B4C, 0xF1C2, 0x9B4B, 0xF1C3, 0x9BC7,
06444     0xF1C4, 0x9BC6, 0xF1C5, 0x9BC3, 0xF1C6, 0x9BBF, 0xF1C7, 0x9BC1,
06445     0xF1C8, 0x9BB5, 0xF1C9, 0x9BB8, 0xF1CA, 0x9BD3, 0xF1CB, 0x9BB6,
06446     0xF1CC, 0x9BC4, 0xF1CD, 0x9BB9, 0xF1CE, 0x9BBD, 0xF1CF, 0x9D5C,
06447     0xF1D0, 0x9D53, 0xF1D1, 0x9D4F, 0xF1D2, 0x9D4A, 0xF1D3, 0x9D5B,
06448     0xF1D4, 0x9D4B, 0xF1D5, 0x9D59, 0xF1D6, 0x9D56, 0xF1D7, 0x9D4C,
06449     0xF1D8, 0x9D57, 0xF1D9, 0x9D52, 0xF1DA, 0x9D54, 0xF1DB, 0x9D5F,
06450     0xF1DC, 0x9D58, 0xF1DD, 0x9D5A, 0xF1DE, 0x9E8E, 0xF1DF, 0x9E8C,
06451     0xF1E0, 0x9EDF, 0xF1E1, 0x9F01, 0xF1E2, 0x9F00, 0xF1E3, 0x9F16,
06452     0xF1E4, 0x9F25, 0xF1E5, 0x9F2B, 0xF1E6, 0x9F2A, 0xF1E7, 0x9F29,
06453     0xF1E8, 0x9F28, 0xF1E9, 0x9F4C, 0xF1EA, 0x9F55, 0xF1EB, 0x5134,
06454     0xF1EC, 0x5135, 0xF1ED, 0x5296, 0xF1EE, 0x52F7, 0xF1EF, 0x53B4,
06455     0xF1F0, 0x56AB, 0xF1F1, 0x56AD, 0xF1F2, 0x56A6, 0xF1F3, 0x56A7,
06456     0xF1F4, 0x56AA, 0xF1F5, 0x56AC, 0xF1F6, 0x58DA, 0xF1F7, 0x58DD,
06457     0xF1F8, 0x58DB, 0xF1F9, 0x5912, 0xF1FA, 0x5B3D, 0xF1FB, 0x5B3E,
06458     0xF1FC, 0x5B3F, 0xF1FD, 0x5DC3, 0xF1FE, 0x5E70, 0xF240, 0x5FBF,
06459     0xF241, 0x61FB, 0xF242, 0x6507, 0xF243, 0x6510, 0xF244, 0x650D,
06460     0xF245, 0x6509, 0xF246, 0x650C, 0xF247, 0x650E, 0xF248, 0x6584,
06461     0xF249, 0x65DE, 0xF24A, 0x65DD, 0xF24B, 0x66DE, 0xF24C, 0x6AE7,
06462     0xF24D, 0x6AE0, 0xF24E, 0x6ACC, 0xF24F, 0x6AD1, 0xF250, 0x6AD9,
06463     0xF251, 0x6ACB, 0xF252, 0x6ADF, 0xF253, 0x6ADC, 0xF254, 0x6AD0,
06464     0xF255, 0x6AEB, 0xF256, 0x6ACF, 0xF257, 0x6ACD, 0xF258, 0x6ADE,
06465     0xF259, 0x6B60, 0xF25A, 0x6BB0, 0xF25B, 0x6C0C, 0xF25C, 0x7019,
06466     0xF25D, 0x7027, 0xF25E, 0x7020, 0xF25F, 0x7016, 0xF260, 0x702B,
06467     0xF261, 0x7021, 0xF262, 0x7022, 0xF263, 0x7023, 0xF264, 0x7029,
06468     0xF265, 0x7017, 0xF266, 0x7024, 0xF267, 0x701C, 0xF268, 0x702A,
06469     0xF269, 0x720C, 0xF26A, 0x720A, 0xF26B, 0x7207, 0xF26C, 0x7202,
06470     0xF26D, 0x7205, 0xF26E, 0x72A5, 0xF26F, 0x72A6, 0xF270, 0x72A4,
06471     0xF271, 0x72A3, 0xF272, 0x72A1, 0xF273, 0x74CB, 0xF274, 0x74C5,
06472     0xF275, 0x74B7, 0xF276, 0x74C3, 0xF277, 0x7516, 0xF278, 0x7660,
06473     0xF279, 0x77C9, 0xF27A, 0x77CA, 0xF27B, 0x77C4, 0xF27C, 0x77F1,
06474     0xF27D, 0x791D, 0xF27E, 0x791B, 0xF2A1, 0x7921, 0xF2A2, 0x791C,
06475     0xF2A3, 0x7917, 0xF2A4, 0x791E, 0xF2A5, 0x79B0, 0xF2A6, 0x7A67,
06476     0xF2A7, 0x7A68, 0xF2A8, 0x7C33, 0xF2A9, 0x7C3C, 0xF2AA, 0x7C39,
06477     0xF2AB, 0x7C2C, 0xF2AC, 0x7C3B, 0xF2AD, 0x7CEC, 0xF2AE, 0x7CEA,
06478     0xF2AF, 0x7E76, 0xF2B0, 0x7E75, 0xF2B1, 0x7E78, 0xF2B2, 0x7E70,
06479     0xF2B3, 0x7E77, 0xF2B4, 0x7E6F, 0xF2B5, 0x7E7A, 0xF2B6, 0x7E72,
06480     0xF2B7, 0x7E74, 0xF2B8, 0x7E68, 0xF2B9, 0x7F4B, 0xF2BA, 0x7F4A,
06481     0xF2BB, 0x7F83, 0xF2BC, 0x7F86, 0xF2BD, 0x7FB7, 0xF2BE, 0x7FFD,
06482     0xF2BF, 0x7FFE, 0xF2C0, 0x8078, 0xF2C1, 0x81D7, 0xF2C2, 0x81D5,
06483     0xF2C3, 0x8264, 0xF2C4, 0x8261, 0xF2C5, 0x8263, 0xF2C6, 0x85EB,
06484     0xF2C7, 0x85F1, 0xF2C8, 0x85ED, 0xF2C9, 0x85D9, 0xF2CA, 0x85E1,
06485     0xF2CB, 0x85E8, 0xF2CC, 0x85DA, 0xF2CD, 0x85D7, 0xF2CE, 0x85EC,
06486     0xF2CF, 0x85F2, 0xF2D0, 0x85F8, 0xF2D1, 0x85D8, 0xF2D2, 0x85DF,
06487     0xF2D3, 0x85E3, 0xF2D4, 0x85DC, 0xF2D5, 0x85D1, 0xF2D6, 0x85F0,
06488     0xF2D7, 0x85E6, 0xF2D8, 0x85EF, 0xF2D9, 0x85DE, 0xF2DA, 0x85E2,
06489     0xF2DB, 0x8800, 0xF2DC, 0x87FA, 0xF2DD, 0x8803, 0xF2DE, 0x87F6,
06490     0xF2DF, 0x87F7, 0xF2E0, 0x8809, 0xF2E1, 0x880C, 0xF2E2, 0x880B,
06491     0xF2E3, 0x8806, 0xF2E4, 0x87FC, 0xF2E5, 0x8808, 0xF2E6, 0x87FF,
06492     0xF2E7, 0x880A, 0xF2E8, 0x8802, 0xF2E9, 0x8962, 0xF2EA, 0x895A,
06493     0xF2EB, 0x895B, 0xF2EC, 0x8957, 0xF2ED, 0x8961, 0xF2EE, 0x895C,
06494     0xF2EF, 0x8958, 0xF2F0, 0x895D, 0xF2F1, 0x8959, 0xF2F2, 0x8988,
06495     0xF2F3, 0x89B7, 0xF2F4, 0x89B6, 0xF2F5, 0x89F6, 0xF2F6, 0x8B50,
06496     0xF2F7, 0x8B48, 0xF2F8, 0x8B4A, 0xF2F9, 0x8B40, 0xF2FA, 0x8B53,
06497     0xF2FB, 0x8B56, 0xF2FC, 0x8B54, 0xF2FD, 0x8B4B, 0xF2FE, 0x8B55,
06498     0xF340, 0x8B51, 0xF341, 0x8B42, 0xF342, 0x8B52, 0xF343, 0x8B57,
06499     0xF344, 0x8C43, 0xF345, 0x8C77, 0xF346, 0x8C76, 0xF347, 0x8C9A,
06500     0xF348, 0x8D06, 0xF349, 0x8D07, 0xF34A, 0x8D09, 0xF34B, 0x8DAC,
06501     0xF34C, 0x8DAA, 0xF34D, 0x8DAD, 0xF34E, 0x8DAB, 0xF34F, 0x8E6D,
06502     0xF350, 0x8E78, 0xF351, 0x8E73, 0xF352, 0x8E6A, 0xF353, 0x8E6F,
06503     0xF354, 0x8E7B, 0xF355, 0x8EC2, 0xF356, 0x8F52, 0xF357, 0x8F51,
06504     0xF358, 0x8F4F, 0xF359, 0x8F50, 0xF35A, 0x8F53, 0xF35B, 0x8FB4,
06505     0xF35C, 0x9140, 0xF35D, 0x913F, 0xF35E, 0x91B0, 0xF35F, 0x91AD,
06506     0xF360, 0x93DE, 0xF361, 0x93C7, 0xF362, 0x93CF, 0xF363, 0x93C2,
06507     0xF364, 0x93DA, 0xF365, 0x93D0, 0xF366, 0x93F9, 0xF367, 0x93EC,
06508     0xF368, 0x93CC, 0xF369, 0x93D9, 0xF36A, 0x93A9, 0xF36B, 0x93E6,
06509     0xF36C, 0x93CA, 0xF36D, 0x93D4, 0xF36E, 0x93EE, 0xF36F, 0x93E3,
06510     0xF370, 0x93D5, 0xF371, 0x93C4, 0xF372, 0x93CE, 0xF373, 0x93C0,
06511     0xF374, 0x93D2, 0xF375, 0x93E7, 0xF376, 0x957D, 0xF377, 0x95DA,
06512     0xF378, 0x95DB, 0xF379, 0x96E1, 0xF37A, 0x9729, 0xF37B, 0x972B,
06513     0xF37C, 0x972C, 0xF37D, 0x9728, 0xF37E, 0x9726, 0xF3A1, 0x97B3,
06514     0xF3A2, 0x97B7, 0xF3A3, 0x97B6, 0xF3A4, 0x97DD, 0xF3A5, 0x97DE,
06515     0xF3A6, 0x97DF, 0xF3A7, 0x985C, 0xF3A8, 0x9859, 0xF3A9, 0x985D,
06516     0xF3AA, 0x9857, 0xF3AB, 0x98BF, 0xF3AC, 0x98BD, 0xF3AD, 0x98BB,
06517     0xF3AE, 0x98BE, 0xF3AF, 0x9948, 0xF3B0, 0x9947, 0xF3B1, 0x9943,
06518     0xF3B2, 0x99A6, 0xF3B3, 0x99A7, 0xF3B4, 0x9A1A, 0xF3B5, 0x9A15,
06519     0xF3B6, 0x9A25, 0xF3B7, 0x9A1D, 0xF3B8, 0x9A24, 0xF3B9, 0x9A1B,
06520     0xF3BA, 0x9A22, 0xF3BB, 0x9A20, 0xF3BC, 0x9A27, 0xF3BD, 0x9A23,
06521     0xF3BE, 0x9A1E, 0xF3BF, 0x9A1C, 0xF3C0, 0x9A14, 0xF3C1, 0x9AC2,
06522     0xF3C2, 0x9B0B, 0xF3C3, 0x9B0A, 0xF3C4, 0x9B0E, 0xF3C5, 0x9B0C,
06523     0xF3C6, 0x9B37, 0xF3C7, 0x9BEA, 0xF3C8, 0x9BEB, 0xF3C9, 0x9BE0,
06524     0xF3CA, 0x9BDE, 0xF3CB, 0x9BE4, 0xF3CC, 0x9BE6, 0xF3CD, 0x9BE2,
06525     0xF3CE, 0x9BF0, 0xF3CF, 0x9BD4, 0xF3D0, 0x9BD7, 0xF3D1, 0x9BEC,
06526     0xF3D2, 0x9BDC, 0xF3D3, 0x9BD9, 0xF3D4, 0x9BE5, 0xF3D5, 0x9BD5,
06527     0xF3D6, 0x9BE1, 0xF3D7, 0x9BDA, 0xF3D8, 0x9D77, 0xF3D9, 0x9D81,
06528     0xF3DA, 0x9D8A, 0xF3DB, 0x9D84, 0xF3DC, 0x9D88, 0xF3DD, 0x9D71,
06529     0xF3DE, 0x9D80, 0xF3DF, 0x9D78, 0xF3E0, 0x9D86, 0xF3E1, 0x9D8B,
06530     0xF3E2, 0x9D8C, 0xF3E3, 0x9D7D, 0xF3E4, 0x9D6B, 0xF3E5, 0x9D74,
06531     0xF3E6, 0x9D75, 0xF3E7, 0x9D70, 0xF3E8, 0x9D69, 0xF3E9, 0x9D85,
06532     0xF3EA, 0x9D73, 0xF3EB, 0x9D7B, 0xF3EC, 0x9D82, 0xF3ED, 0x9D6F,
06533     0xF3EE, 0x9D79, 0xF3EF, 0x9D7F, 0xF3F0, 0x9D87, 0xF3F1, 0x9D68,
06534     0xF3F2, 0x9E94, 0xF3F3, 0x9E91, 0xF3F4, 0x9EC0, 0xF3F5, 0x9EFC,
06535     0xF3F6, 0x9F2D, 0xF3F7, 0x9F40, 0xF3F8, 0x9F41, 0xF3F9, 0x9F4D,
06536     0xF3FA, 0x9F56, 0xF3FB, 0x9F57, 0xF3FC, 0x9F58, 0xF3FD, 0x5337,
06537     0xF3FE, 0x56B2, 0xF440, 0x56B5, 0xF441, 0x56B3, 0xF442, 0x58E3,
06538     0xF443, 0x5B45, 0xF444, 0x5DC6, 0xF445, 0x5DC7, 0xF446, 0x5EEE,
06539     0xF447, 0x5EEF, 0xF448, 0x5FC0, 0xF449, 0x5FC1, 0xF44A, 0x61F9,
06540     0xF44B, 0x6517, 0xF44C, 0x6516, 0xF44D, 0x6515, 0xF44E, 0x6513,
06541     0xF44F, 0x65DF, 0xF450, 0x66E8, 0xF451, 0x66E3, 0xF452, 0x66E4,
06542     0xF453, 0x6AF3, 0xF454, 0x6AF0, 0xF455, 0x6AEA, 0xF456, 0x6AE8,
06543     0xF457, 0x6AF9, 0xF458, 0x6AF1, 0xF459, 0x6AEE, 0xF45A, 0x6AEF,
06544     0xF45B, 0x703C, 0xF45C, 0x7035, 0xF45D, 0x702F, 0xF45E, 0x7037,
06545     0xF45F, 0x7034, 0xF460, 0x7031, 0xF461, 0x7042, 0xF462, 0x7038,
06546     0xF463, 0x703F, 0xF464, 0x703A, 0xF465, 0x7039, 0xF466, 0x7040,
06547     0xF467, 0x703B, 0xF468, 0x7033, 0xF469, 0x7041, 0xF46A, 0x7213,
06548     0xF46B, 0x7214, 0xF46C, 0x72A8, 0xF46D, 0x737D, 0xF46E, 0x737C,
06549     0xF46F, 0x74BA, 0xF470, 0x76AB, 0xF471, 0x76AA, 0xF472, 0x76BE,
06550     0xF473, 0x76ED, 0xF474, 0x77CC, 0xF475, 0x77CE, 0xF476, 0x77CF,
06551     0xF477, 0x77CD, 0xF478, 0x77F2, 0xF479, 0x7925, 0xF47A, 0x7923,
06552     0xF47B, 0x7927, 0xF47C, 0x7928, 0xF47D, 0x7924, 0xF47E, 0x7929,
06553     0xF4A1, 0x79B2, 0xF4A2, 0x7A6E, 0xF4A3, 0x7A6C, 0xF4A4, 0x7A6D,
06554     0xF4A5, 0x7AF7, 0xF4A6, 0x7C49, 0xF4A7, 0x7C48, 0xF4A8, 0x7C4A,
06555     0xF4A9, 0x7C47, 0xF4AA, 0x7C45, 0xF4AB, 0x7CEE, 0xF4AC, 0x7E7B,
06556     0xF4AD, 0x7E7E, 0xF4AE, 0x7E81, 0xF4AF, 0x7E80, 0xF4B0, 0x7FBA,
06557     0xF4B1, 0x7FFF, 0xF4B2, 0x8079, 0xF4B3, 0x81DB, 0xF4B4, 0x81D9,
06558     0xF4B5, 0x820B, 0xF4B6, 0x8268, 0xF4B7, 0x8269, 0xF4B8, 0x8622,
06559     0xF4B9, 0x85FF, 0xF4BA, 0x8601, 0xF4BB, 0x85FE, 0xF4BC, 0x861B,
06560     0xF4BD, 0x8600, 0xF4BE, 0x85F6, 0xF4BF, 0x8604, 0xF4C0, 0x8609,
06561     0xF4C1, 0x8605, 0xF4C2, 0x860C, 0xF4C3, 0x85FD, 0xF4C4, 0x8819,
06562     0xF4C5, 0x8810, 0xF4C6, 0x8811, 0xF4C7, 0x8817, 0xF4C8, 0x8813,
06563     0xF4C9, 0x8816, 0xF4CA, 0x8963, 0xF4CB, 0x8966, 0xF4CC, 0x89B9,
06564     0xF4CD, 0x89F7, 0xF4CE, 0x8B60, 0xF4CF, 0x8B6A, 0xF4D0, 0x8B5D,
06565     0xF4D1, 0x8B68, 0xF4D2, 0x8B63, 0xF4D3, 0x8B65, 0xF4D4, 0x8B67,
06566     0xF4D5, 0x8B6D, 0xF4D6, 0x8DAE, 0xF4D7, 0x8E86, 0xF4D8, 0x8E88,
06567     0xF4D9, 0x8E84, 0xF4DA, 0x8F59, 0xF4DB, 0x8F56, 0xF4DC, 0x8F57,
06568     0xF4DD, 0x8F55, 0xF4DE, 0x8F58, 0xF4DF, 0x8F5A, 0xF4E0, 0x908D,
06569     0xF4E1, 0x9143, 0xF4E2, 0x9141, 0xF4E3, 0x91B7, 0xF4E4, 0x91B5,
06570     0xF4E5, 0x91B2, 0xF4E6, 0x91B3, 0xF4E7, 0x940B, 0xF4E8, 0x9413,
06571     0xF4E9, 0x93FB, 0xF4EA, 0x9420, 0xF4EB, 0x940F, 0xF4EC, 0x9414,
06572     0xF4ED, 0x93FE, 0xF4EE, 0x9415, 0xF4EF, 0x9410, 0xF4F0, 0x9428,
06573     0xF4F1, 0x9419, 0xF4F2, 0x940D, 0xF4F3, 0x93F5, 0xF4F4, 0x9400,
06574     0xF4F5, 0x93F7, 0xF4F6, 0x9407, 0xF4F7, 0x940E, 0xF4F8, 0x9416,
06575     0xF4F9, 0x9412, 0xF4FA, 0x93FA, 0xF4FB, 0x9409, 0xF4FC, 0x93F8,
06576     0xF4FD, 0x940A, 0xF4FE, 0x93FF, 0xF540, 0x93FC, 0xF541, 0x940C,
06577     0xF542, 0x93F6, 0xF543, 0x9411, 0xF544, 0x9406, 0xF545, 0x95DE,
06578     0xF546, 0x95E0, 0xF547, 0x95DF, 0xF548, 0x972E, 0xF549, 0x972F,
06579     0xF54A, 0x97B9, 0xF54B, 0x97BB, 0xF54C, 0x97FD, 0xF54D, 0x97FE,
06580     0xF54E, 0x9860, 0xF54F, 0x9862, 0xF550, 0x9863, 0xF551, 0x985F,
06581     0xF552, 0x98C1, 0xF553, 0x98C2, 0xF554, 0x9950, 0xF555, 0x994E,
06582     0xF556, 0x9959, 0xF557, 0x994C, 0xF558, 0x994B, 0xF559, 0x9953,
06583     0xF55A, 0x9A32, 0xF55B, 0x9A34, 0xF55C, 0x9A31, 0xF55D, 0x9A2C,
06584     0xF55E, 0x9A2A, 0xF55F, 0x9A36, 0xF560, 0x9A29, 0xF561, 0x9A2E,
06585     0xF562, 0x9A38, 0xF563, 0x9A2D, 0xF564, 0x9AC7, 0xF565, 0x9ACA,
06586     0xF566, 0x9AC6, 0xF567, 0x9B10, 0xF568, 0x9B12, 0xF569, 0x9B11,
06587     0xF56A, 0x9C0B, 0xF56B, 0x9C08, 0xF56C, 0x9BF7, 0xF56D, 0x9C05,
06588     0xF56E, 0x9C12, 0xF56F, 0x9BF8, 0xF570, 0x9C40, 0xF571, 0x9C07,
06589     0xF572, 0x9C0E, 0xF573, 0x9C06, 0xF574, 0x9C17, 0xF575, 0x9C14,
06590     0xF576, 0x9C09, 0xF577, 0x9D9F, 0xF578, 0x9D99, 0xF579, 0x9DA4,
06591     0xF57A, 0x9D9D, 0xF57B, 0x9D92, 0xF57C, 0x9D98, 0xF57D, 0x9D90,
06592     0xF57E, 0x9D9B, 0xF5A1, 0x9DA0, 0xF5A2, 0x9D94, 0xF5A3, 0x9D9C,
06593     0xF5A4, 0x9DAA, 0xF5A5, 0x9D97, 0xF5A6, 0x9DA1, 0xF5A7, 0x9D9A,
06594     0xF5A8, 0x9DA2, 0xF5A9, 0x9DA8, 0xF5AA, 0x9D9E, 0xF5AB, 0x9DA3,
06595     0xF5AC, 0x9DBF, 0xF5AD, 0x9DA9, 0xF5AE, 0x9D96, 0xF5AF, 0x9DA6,
06596     0xF5B0, 0x9DA7, 0xF5B1, 0x9E99, 0xF5B2, 0x9E9B, 0xF5B3, 0x9E9A,
06597     0xF5B4, 0x9EE5, 0xF5B5, 0x9EE4, 0xF5B6, 0x9EE7, 0xF5B7, 0x9EE6,
06598     0xF5B8, 0x9F30, 0xF5B9, 0x9F2E, 0xF5BA, 0x9F5B, 0xF5BB, 0x9F60,
06599     0xF5BC, 0x9F5E, 0xF5BD, 0x9F5D, 0xF5BE, 0x9F59, 0xF5BF, 0x9F91,
06600     0xF5C0, 0x513A, 0xF5C1, 0x5139, 0xF5C2, 0x5298, 0xF5C3, 0x5297,
06601     0xF5C4, 0x56C3, 0xF5C5, 0x56BD, 0xF5C6, 0x56BE, 0xF5C7, 0x5B48,
06602     0xF5C8, 0x5B47, 0xF5C9, 0x5DCB, 0xF5CA, 0x5DCF, 0xF5CB, 0x5EF1,
06603     0xF5CC, 0x61FD, 0xF5CD, 0x651B, 0xF5CE, 0x6B02, 0xF5CF, 0x6AFC,
06604     0xF5D0, 0x6B03, 0xF5D1, 0x6AF8, 0xF5D2, 0x6B00, 0xF5D3, 0x7043,
06605     0xF5D4, 0x7044, 0xF5D5, 0x704A, 0xF5D6, 0x7048, 0xF5D7, 0x7049,
06606     0xF5D8, 0x7045, 0xF5D9, 0x7046, 0xF5DA, 0x721D, 0xF5DB, 0x721A,
06607     0xF5DC, 0x7219, 0xF5DD, 0x737E, 0xF5DE, 0x7517, 0xF5DF, 0x766A,
06608     0xF5E0, 0x77D0, 0xF5E1, 0x792D, 0xF5E2, 0x7931, 0xF5E3, 0x792F,
06609     0xF5E4, 0x7C54, 0xF5E5, 0x7C53, 0xF5E6, 0x7CF2, 0xF5E7, 0x7E8A,
06610     0xF5E8, 0x7E87, 0xF5E9, 0x7E88, 0xF5EA, 0x7E8B, 0xF5EB, 0x7E86,
06611     0xF5EC, 0x7E8D, 0xF5ED, 0x7F4D, 0xF5EE, 0x7FBB, 0xF5EF, 0x8030,
06612     0xF5F0, 0x81DD, 0xF5F1, 0x8618, 0xF5F2, 0x862A, 0xF5F3, 0x8626,
06613     0xF5F4, 0x861F, 0xF5F5, 0x8623, 0xF5F6, 0x861C, 0xF5F7, 0x8619,
06614     0xF5F8, 0x8627, 0xF5F9, 0x862E, 0xF5FA, 0x8621, 0xF5FB, 0x8620,
06615     0xF5FC, 0x8629, 0xF5FD, 0x861E, 0xF5FE, 0x8625, 0xF640, 0x8829,
06616     0xF641, 0x881D, 0xF642, 0x881B, 0xF643, 0x8820, 0xF644, 0x8824,
06617     0xF645, 0x881C, 0xF646, 0x882B, 0xF647, 0x884A, 0xF648, 0x896D,
06618     0xF649, 0x8969, 0xF64A, 0x896E, 0xF64B, 0x896B, 0xF64C, 0x89FA,
06619     0xF64D, 0x8B79, 0xF64E, 0x8B78, 0xF64F, 0x8B45, 0xF650, 0x8B7A,
06620     0xF651, 0x8B7B, 0xF652, 0x8D10, 0xF653, 0x8D14, 0xF654, 0x8DAF,
06621     0xF655, 0x8E8E, 0xF656, 0x8E8C, 0xF657, 0x8F5E, 0xF658, 0x8F5B,
06622     0xF659, 0x8F5D, 0xF65A, 0x9146, 0xF65B, 0x9144, 0xF65C, 0x9145,
06623     0xF65D, 0x91B9, 0xF65E, 0x943F, 0xF65F, 0x943B, 0xF660, 0x9436,
06624     0xF661, 0x9429, 0xF662, 0x943D, 0xF663, 0x943C, 0xF664, 0x9430,
06625     0xF665, 0x9439, 0xF666, 0x942A, 0xF667, 0x9437, 0xF668, 0x942C,
06626     0xF669, 0x9440, 0xF66A, 0x9431, 0xF66B, 0x95E5, 0xF66C, 0x95E4,
06627     0xF66D, 0x95E3, 0xF66E, 0x9735, 0xF66F, 0x973A, 0xF670, 0x97BF,
06628     0xF671, 0x97E1, 0xF672, 0x9864, 0xF673, 0x98C9, 0xF674, 0x98C6,
06629     0xF675, 0x98C0, 0xF676, 0x9958, 0xF677, 0x9956, 0xF678, 0x9A39,
06630     0xF679, 0x9A3D, 0xF67A, 0x9A46, 0xF67B, 0x9A44, 0xF67C, 0x9A42,
06631     0xF67D, 0x9A41, 0xF67E, 0x9A3A, 0xF6A1, 0x9A3F, 0xF6A2, 0x9ACD,
06632     0xF6A3, 0x9B15, 0xF6A4, 0x9B17, 0xF6A5, 0x9B18, 0xF6A6, 0x9B16,
06633     0xF6A7, 0x9B3A, 0xF6A8, 0x9B52, 0xF6A9, 0x9C2B, 0xF6AA, 0x9C1D,
06634     0xF6AB, 0x9C1C, 0xF6AC, 0x9C2C, 0xF6AD, 0x9C23, 0xF6AE, 0x9C28,
06635     0xF6AF, 0x9C29, 0xF6B0, 0x9C24, 0xF6B1, 0x9C21, 0xF6B2, 0x9DB7,
06636     0xF6B3, 0x9DB6, 0xF6B4, 0x9DBC, 0xF6B5, 0x9DC1, 0xF6B6, 0x9DC7,
06637     0xF6B7, 0x9DCA, 0xF6B8, 0x9DCF, 0xF6B9, 0x9DBE, 0xF6BA, 0x9DC5,
06638     0xF6BB, 0x9DC3, 0xF6BC, 0x9DBB, 0xF6BD, 0x9DB5, 0xF6BE, 0x9DCE,
06639     0xF6BF, 0x9DB9, 0xF6C0, 0x9DBA, 0xF6C1, 0x9DAC, 0xF6C2, 0x9DC8,
06640     0xF6C3, 0x9DB1, 0xF6C4, 0x9DAD, 0xF6C5, 0x9DCC, 0xF6C6, 0x9DB3,
06641     0xF6C7, 0x9DCD, 0xF6C8, 0x9DB2, 0xF6C9, 0x9E7A, 0xF6CA, 0x9E9C,
06642     0xF6CB, 0x9EEB, 0xF6CC, 0x9EEE, 0xF6CD, 0x9EED, 0xF6CE, 0x9F1B,
06643     0xF6CF, 0x9F18, 0xF6D0, 0x9F1A, 0xF6D1, 0x9F31, 0xF6D2, 0x9F4E,
06644     0xF6D3, 0x9F65, 0xF6D4, 0x9F64, 0xF6D5, 0x9F92, 0xF6D6, 0x4EB9,
06645     0xF6D7, 0x56C6, 0xF6D8, 0x56C5, 0xF6D9, 0x56CB, 0xF6DA, 0x5971,
06646     0xF6DB, 0x5B4B, 0xF6DC, 0x5B4C, 0xF6DD, 0x5DD5, 0xF6DE, 0x5DD1,
06647     0xF6DF, 0x5EF2, 0xF6E0, 0x6521, 0xF6E1, 0x6520, 0xF6E2, 0x6526,
06648     0xF6E3, 0x6522, 0xF6E4, 0x6B0B, 0xF6E5, 0x6B08, 0xF6E6, 0x6B09,
06649     0xF6E7, 0x6C0D, 0xF6E8, 0x7055, 0xF6E9, 0x7056, 0xF6EA, 0x7057,
06650     0xF6EB, 0x7052, 0xF6EC, 0x721E, 0xF6ED, 0x721F, 0xF6EE, 0x72A9,
06651     0xF6EF, 0x737F, 0xF6F0, 0x74D8, 0xF6F1, 0x74D5, 0xF6F2, 0x74D9,
06652     0xF6F3, 0x74D7, 0xF6F4, 0x766D, 0xF6F5, 0x76AD, 0xF6F6, 0x7935,
06653     0xF6F7, 0x79B4, 0xF6F8, 0x7A70, 0xF6F9, 0x7A71, 0xF6FA, 0x7C57,
06654     0xF6FB, 0x7C5C, 0xF6FC, 0x7C59, 0xF6FD, 0x7C5B, 0xF6FE, 0x7C5A,
06655     0xF740, 0x7CF4, 0xF741, 0x7CF1, 0xF742, 0x7E91, 0xF743, 0x7F4F,
06656     0xF744, 0x7F87, 0xF745, 0x81DE, 0xF746, 0x826B, 0xF747, 0x8634,
06657     0xF748, 0x8635, 0xF749, 0x8633, 0xF74A, 0x862C, 0xF74B, 0x8632,
06658     0xF74C, 0x8636, 0xF74D, 0x882C, 0xF74E, 0x8828, 0xF74F, 0x8826,
06659     0xF750, 0x882A, 0xF751, 0x8825, 0xF752, 0x8971, 0xF753, 0x89BF,
06660     0xF754, 0x89BE, 0xF755, 0x89FB, 0xF756, 0x8B7E, 0xF757, 0x8B84,
06661     0xF758, 0x8B82, 0xF759, 0x8B86, 0xF75A, 0x8B85, 0xF75B, 0x8B7F,
06662     0xF75C, 0x8D15, 0xF75D, 0x8E95, 0xF75E, 0x8E94, 0xF75F, 0x8E9A,
06663     0xF760, 0x8E92, 0xF761, 0x8E90, 0xF762, 0x8E96, 0xF763, 0x8E97,
06664     0xF764, 0x8F60, 0xF765, 0x8F62, 0xF766, 0x9147, 0xF767, 0x944C,
06665     0xF768, 0x9450, 0xF769, 0x944A, 0xF76A, 0x944B, 0xF76B, 0x944F,
06666     0xF76C, 0x9447, 0xF76D, 0x9445, 0xF76E, 0x9448, 0xF76F, 0x9449,
06667     0xF770, 0x9446, 0xF771, 0x973F, 0xF772, 0x97E3, 0xF773, 0x986A,
06668     0xF774, 0x9869, 0xF775, 0x98CB, 0xF776, 0x9954, 0xF777, 0x995B,
06669     0xF778, 0x9A4E, 0xF779, 0x9A53, 0xF77A, 0x9A54, 0xF77B, 0x9A4C,
06670     0xF77C, 0x9A4F, 0xF77D, 0x9A48, 0xF77E, 0x9A4A, 0xF7A1, 0x9A49,
06671     0xF7A2, 0x9A52, 0xF7A3, 0x9A50, 0xF7A4, 0x9AD0, 0xF7A5, 0x9B19,
06672     0xF7A6, 0x9B2B, 0xF7A7, 0x9B3B, 0xF7A8, 0x9B56, 0xF7A9, 0x9B55,
06673     0xF7AA, 0x9C46, 0xF7AB, 0x9C48, 0xF7AC, 0x9C3F, 0xF7AD, 0x9C44,
06674     0xF7AE, 0x9C39, 0xF7AF, 0x9C33, 0xF7B0, 0x9C41, 0xF7B1, 0x9C3C,
06675     0xF7B2, 0x9C37, 0xF7B3, 0x9C34, 0xF7B4, 0x9C32, 0xF7B5, 0x9C3D,
06676     0xF7B6, 0x9C36, 0xF7B7, 0x9DDB, 0xF7B8, 0x9DD2, 0xF7B9, 0x9DDE,
06677     0xF7BA, 0x9DDA, 0xF7BB, 0x9DCB, 0xF7BC, 0x9DD0, 0xF7BD, 0x9DDC,
06678     0xF7BE, 0x9DD1, 0xF7BF, 0x9DDF, 0xF7C0, 0x9DE9, 0xF7C1, 0x9DD9,
06679     0xF7C2, 0x9DD8, 0xF7C3, 0x9DD6, 0xF7C4, 0x9DF5, 0xF7C5, 0x9DD5,
06680     0xF7C6, 0x9DDD, 0xF7C7, 0x9EB6, 0xF7C8, 0x9EF0, 0xF7C9, 0x9F35,
06681     0xF7CA, 0x9F33, 0xF7CB, 0x9F32, 0xF7CC, 0x9F42, 0xF7CD, 0x9F6B,
06682     0xF7CE, 0x9F95, 0xF7CF, 0x9FA2, 0xF7D0, 0x513D, 0xF7D1, 0x5299,
06683     0xF7D2, 0x58E8, 0xF7D3, 0x58E7, 0xF7D4, 0x5972, 0xF7D5, 0x5B4D,
06684     0xF7D6, 0x5DD8, 0xF7D7, 0x882F, 0xF7D8, 0x5F4F, 0xF7D9, 0x6201,
06685     0xF7DA, 0x6203, 0xF7DB, 0x6204, 0xF7DC, 0x6529, 0xF7DD, 0x6525,
06686     0xF7DE, 0x6596, 0xF7DF, 0x66EB, 0xF7E0, 0x6B11, 0xF7E1, 0x6B12,
06687     0xF7E2, 0x6B0F, 0xF7E3, 0x6BCA, 0xF7E4, 0x705B, 0xF7E5, 0x705A,
06688     0xF7E6, 0x7222, 0xF7E7, 0x7382, 0xF7E8, 0x7381, 0xF7E9, 0x7383,
06689     0xF7EA, 0x7670, 0xF7EB, 0x77D4, 0xF7EC, 0x7C67, 0xF7ED, 0x7C66,
06690     0xF7EE, 0x7E95, 0xF7EF, 0x826C, 0xF7F0, 0x863A, 0xF7F1, 0x8640,
06691     0xF7F2, 0x8639, 0xF7F3, 0x863C, 0xF7F4, 0x8631, 0xF7F5, 0x863B,
06692     0xF7F6, 0x863E, 0xF7F7, 0x8830, 0xF7F8, 0x8832, 0xF7F9, 0x882E,
06693     0xF7FA, 0x8833, 0xF7FB, 0x8976, 0xF7FC, 0x8974, 0xF7FD, 0x8973,
06694     0xF7FE, 0x89FE, 0xF840, 0x8B8C, 0xF841, 0x8B8E, 0xF842, 0x8B8B,
06695     0xF843, 0x8B88, 0xF844, 0x8C45, 0xF845, 0x8D19, 0xF846, 0x8E98,
06696     0xF847, 0x8F64, 0xF848, 0x8F63, 0xF849, 0x91BC, 0xF84A, 0x9462,
06697     0xF84B, 0x9455, 0xF84C, 0x945D, 0xF84D, 0x9457, 0xF84E, 0x945E,
06698     0xF84F, 0x97C4, 0xF850, 0x97C5, 0xF851, 0x9800, 0xF852, 0x9A56,
06699     0xF853, 0x9A59, 0xF854, 0x9B1E, 0xF855, 0x9B1F, 0xF856, 0x9B20,
06700     0xF857, 0x9C52, 0xF858, 0x9C58, 0xF859, 0x9C50, 0xF85A, 0x9C4A,
06701     0xF85B, 0x9C4D, 0xF85C, 0x9C4B, 0xF85D, 0x9C55, 0xF85E, 0x9C59,
06702     0xF85F, 0x9C4C, 0xF860, 0x9C4E, 0xF861, 0x9DFB, 0xF862, 0x9DF7,
06703     0xF863, 0x9DEF, 0xF864, 0x9DE3, 0xF865, 0x9DEB, 0xF866, 0x9DF8,
06704     0xF867, 0x9DE4, 0xF868, 0x9DF6, 0xF869, 0x9DE1, 0xF86A, 0x9DEE,
06705     0xF86B, 0x9DE6, 0xF86C, 0x9DF2, 0xF86D, 0x9DF0, 0xF86E, 0x9DE2,
06706     0xF86F, 0x9DEC, 0xF870, 0x9DF4, 0xF871, 0x9DF3, 0xF872, 0x9DE8,
06707     0xF873, 0x9DED, 0xF874, 0x9EC2, 0xF875, 0x9ED0, 0xF876, 0x9EF2,
06708     0xF877, 0x9EF3, 0xF878, 0x9F06, 0xF879, 0x9F1C, 0xF87A, 0x9F38,
06709     0xF87B, 0x9F37, 0xF87C, 0x9F36, 0xF87D, 0x9F43, 0xF87E, 0x9F4F,
06710     0xF8A1, 0x9F71, 0xF8A2, 0x9F70, 0xF8A3, 0x9F6E, 0xF8A4, 0x9F6F,
06711     0xF8A5, 0x56D3, 0xF8A6, 0x56CD, 0xF8A7, 0x5B4E, 0xF8A8, 0x5C6D,
06712     0xF8A9, 0x652D, 0xF8AA, 0x66ED, 0xF8AB, 0x66EE, 0xF8AC, 0x6B13,
06713     0xF8AD, 0x705F, 0xF8AE, 0x7061, 0xF8AF, 0x705D, 0xF8B0, 0x7060,
06714     0xF8B1, 0x7223, 0xF8B2, 0x74DB, 0xF8B3, 0x74E5, 0xF8B4, 0x77D5,
06715     0xF8B5, 0x7938, 0xF8B6, 0x79B7, 0xF8B7, 0x79B6, 0xF8B8, 0x7C6A,
06716     0xF8B9, 0x7E97, 0xF8BA, 0x7F89, 0xF8BB, 0x826D, 0xF8BC, 0x8643,
06717     0xF8BD, 0x8838, 0xF8BE, 0x8837, 0xF8BF, 0x8835, 0xF8C0, 0x884B,
06718     0xF8C1, 0x8B94, 0xF8C2, 0x8B95, 0xF8C3, 0x8E9E, 0xF8C4, 0x8E9F,
06719     0xF8C5, 0x8EA0, 0xF8C6, 0x8E9D, 0xF8C7, 0x91BE, 0xF8C8, 0x91BD,
06720     0xF8C9, 0x91C2, 0xF8CA, 0x946B, 0xF8CB, 0x9468, 0xF8CC, 0x9469,
06721     0xF8CD, 0x96E5, 0xF8CE, 0x9746, 0xF8CF, 0x9743, 0xF8D0, 0x9747,
06722     0xF8D1, 0x97C7, 0xF8D2, 0x97E5, 0xF8D3, 0x9A5E, 0xF8D4, 0x9AD5,
06723     0xF8D5, 0x9B59, 0xF8D6, 0x9C63, 0xF8D7, 0x9C67, 0xF8D8, 0x9C66,
06724     0xF8D9, 0x9C62, 0xF8DA, 0x9C5E, 0xF8DB, 0x9C60, 0xF8DC, 0x9E02,
06725     0xF8DD, 0x9DFE, 0xF8DE, 0x9E07, 0xF8DF, 0x9E03, 0xF8E0, 0x9E06,
06726     0xF8E1, 0x9E05, 0xF8E2, 0x9E00, 0xF8E3, 0x9E01, 0xF8E4, 0x9E09,
06727     0xF8E5, 0x9DFF, 0xF8E6, 0x9DFD, 0xF8E7, 0x9E04, 0xF8E8, 0x9EA0,
06728     0xF8E9, 0x9F1E, 0xF8EA, 0x9F46, 0xF8EB, 0x9F74, 0xF8EC, 0x9F75,
06729     0xF8ED, 0x9F76, 0xF8EE, 0x56D4, 0xF8EF, 0x652E, 0xF8F0, 0x65B8,
06730     0xF8F1, 0x6B18, 0xF8F2, 0x6B19, 0xF8F3, 0x6B17, 0xF8F4, 0x6B1A,
06731     0xF8F5, 0x7062, 0xF8F6, 0x7226, 0xF8F7, 0x72AA, 0xF8F8, 0x77D8,
06732     0xF8F9, 0x77D9, 0xF8FA, 0x7939, 0xF8FB, 0x7C69, 0xF8FC, 0x7C6B,
06733     0xF8FD, 0x7CF6, 0xF8FE, 0x7E9A, 0xF940, 0x7E98, 0xF941, 0x7E9B,
06734     0xF942, 0x7E99, 0xF943, 0x81E0, 0xF944, 0x81E1, 0xF945, 0x8646,
06735     0xF946, 0x8647, 0xF947, 0x8648, 0xF948, 0x8979, 0xF949, 0x897A,
06736     0xF94A, 0x897C, 0xF94B, 0x897B, 0xF94C, 0x89FF, 0xF94D, 0x8B98,
06737     0xF94E, 0x8B99, 0xF94F, 0x8EA5, 0xF950, 0x8EA4, 0xF951, 0x8EA3,
06738     0xF952, 0x946E, 0xF953, 0x946D, 0xF954, 0x946F, 0xF955, 0x9471,
06739     0xF956, 0x9473, 0xF957, 0x9749, 0xF958, 0x9872, 0xF959, 0x995F,
06740     0xF95A, 0x9C68, 0xF95B, 0x9C6E, 0xF95C, 0x9C6D, 0xF95D, 0x9E0B,
06741     0xF95E, 0x9E0D, 0xF95F, 0x9E10, 0xF960, 0x9E0F, 0xF961, 0x9E12,
06742     0xF962, 0x9E11, 0xF963, 0x9EA1, 0xF964, 0x9EF5, 0xF965, 0x9F09,
06743     0xF966, 0x9F47, 0xF967, 0x9F78, 0xF968, 0x9F7B, 0xF969, 0x9F7A,
06744     0xF96A, 0x9F79, 0xF96B, 0x571E, 0xF96C, 0x7066, 0xF96D, 0x7C6F,
06745     0xF96E, 0x883C, 0xF96F, 0x8DB2, 0xF970, 0x8EA6, 0xF971, 0x91C3,
06746     0xF972, 0x9474, 0xF973, 0x9478, 0xF974, 0x9476, 0xF975, 0x9475,
06747     0xF976, 0x9A60, 0xF977, 0x9C74, 0xF978, 0x9C73, 0xF979, 0x9C71,
06748     0xF97A, 0x9C75, 0xF97B, 0x9E14, 0xF97C, 0x9E13, 0xF97D, 0x9EF6,
06749     0xF97E, 0x9F0A, 0xF9A1, 0x9FA4, 0xF9A2, 0x7068, 0xF9A3, 0x7065,
06750     0xF9A4, 0x7CF7, 0xF9A5, 0x866A, 0xF9A6, 0x883E, 0xF9A7, 0x883D,
06751     0xF9A8, 0x883F, 0xF9A9, 0x8B9E, 0xF9AA, 0x8C9C, 0xF9AB, 0x8EA9,
06752     0xF9AC, 0x8EC9, 0xF9AD, 0x974B, 0xF9AE, 0x9873, 0xF9AF, 0x9874,
06753     0xF9B0, 0x98CC, 0xF9B1, 0x9961, 0xF9B2, 0x99AB, 0xF9B3, 0x9A64,
06754     0xF9B4, 0x9A66, 0xF9B5, 0x9A67, 0xF9B6, 0x9B24, 0xF9B7, 0x9E15,
06755     0xF9B8, 0x9E17, 0xF9B9, 0x9F48, 0xF9BA, 0x6207, 0xF9BB, 0x6B1E,
06756     0xF9BC, 0x7227, 0xF9BD, 0x864C, 0xF9BE, 0x8EA8, 0xF9BF, 0x9482,
06757     0xF9C0, 0x9480, 0xF9C1, 0x9481, 0xF9C2, 0x9A69, 0xF9C3, 0x9A68,
06758     0xF9C4, 0x9B2E, 0xF9C5, 0x9E19, 0xF9C6, 0x7229, 0xF9C7, 0x864B,
06759     0xF9C8, 0x8B9F, 0xF9C9, 0x9483, 0xF9CA, 0x9C79, 0xF9CB, 0x9EB7,
06760     0xF9CC, 0x7675, 0xF9CD, 0x9A6B, 0xF9CE, 0x9C7A, 0xF9CF, 0x9E1D,
06761     0xF9D0, 0x7069, 0xF9D1, 0x706A, 0xF9D2, 0x9EA4, 0xF9D3, 0x9F7E,
06762     0xF9D4, 0x9F49, 0xF9D5, 0x9F98, 0xF9D6, 0x7881, 0xF9D7, 0x92B9,
06763     0xF9D8, 0x88CF, 0xF9D9, 0x58BB, 0xF9DA, 0x6052, 0xF9DB, 0x7CA7,
06764     0xF9DC, 0x5AFA, 0xF9DD, 0x2554, 0xF9DE, 0x2566, 0xF9DF, 0x2557,
06765     0xF9E0, 0x2560, 0xF9E1, 0x256C, 0xF9E2, 0x2563, 0xF9E3, 0x255A,
06766     0xF9E4, 0x2569, 0xF9E5, 0x255D, 0xF9E6, 0x2552, 0xF9E7, 0x2564,
06767     0xF9E8, 0x2555, 0xF9E9, 0x255E, 0xF9EA, 0x256A, 0xF9EB, 0x2561,
06768     0xF9EC, 0x2558, 0xF9ED, 0x2567, 0xF9EE, 0x255B, 0xF9EF, 0x2553,
06769     0xF9F0, 0x2565, 0xF9F1, 0x2556, 0xF9F2, 0x255F, 0xF9F3, 0x256B,
06770     0xF9F4, 0x2562, 0xF9F5, 0x2559, 0xF9F6, 0x2568, 0xF9F7, 0x255C,
06771     0xF9F8, 0x2551, 0xF9F9, 0x2550, 0xF9FA, 0x256D, 0xF9FB, 0x256E,
06772     0xF9FC, 0x2570, 0xF9FD, 0x256F, 0xF9FE, 0x2593, 0, 0
06773 };
06774
06775
06776
06777 WCHAR ff_convert (  /* Converted code, 0 means conversion error */
06778     WCHAR   src,    /* Character code to be converted */
06779     UINT    dir     /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */
06780 )
06781 {
06782     const WCHAR *p;
06783     WCHAR c;
06784     int i, n, li, hi;
06785
06786
06787     if (src < 0x80) {   /* ASCII */
06788         c = src;
06789     } else {
06790         if (dir) {      /* OEMCP to unicode */
06791             p = oem2uni;
06792             hi = sizeof(oem2uni) / 4 - 1;
06793         } else {        /* Unicode to OEMCP */
06794             p = uni2oem;
06795             hi = sizeof(uni2oem) / 4 - 1;
06796         }
06797         li = 0;
06798         for (n = 16; n; n--) {
06799             i = li + (hi - li) / 2;
06800             if (src == p[i * 2]) break;
06801             if (src > p[i * 2])
06802                 li = i;
06803             else
06804                 hi = i;
06805         }
06806         c = n ? p[i * 2 + 1] : 0;
06807     }
06808
06809     return c;
06810 }
06811 #else
06812 #error This file is not needed in current configuration.
06813
06814 #endif


BeRTOS: ccsbcs.c Source File

  • fs
  • fatfs
  • option
ccsbcs.c
00001 /*------------------------------------------------------------------------*/
00002 /* Unicode - Local code bidirectional converter  (C)ChaN, 2009            */
00003 /* (SBCS code pages)                                                      */
00004 /*------------------------------------------------------------------------*/
00005 /*  437   U.S. (OEM)
00006 /   720   Arabic (OEM)
00007 /   1256  Arabic (Windows)
00008 /   737   Greek (OEM)
00009 /   1253  Greek (Windows)
00010 /   1250  Central Europe (Windows)
00011 /   775   Baltic (OEM)
00012 /   1257  Baltic (Windows)
00013 /   850   Multilingual Latin 1 (OEM)
00014 /   852   Latin 2 (OEM)
00015 /   1252  Latin 1 (Windows)
00016 /   855   Cyrillic (OEM)
00017 /   1251  Cyrillic (Windows)
00018 /   866   Russian (OEM)
00019 /   857   Turkish (OEM)
00020 /   1254  Turkish (Windows)
00021 /   858   Multilingual Latin 1 + Euro (OEM)
00022 /   862   Hebrew (OEM)
00023 /   1255  Hebrew (Windows)
00024 /   874   Thai (OEM, Windows)
00025 /   1258  Vietnam (OEM, Windows)
00026 */
00027
00028 #include "../ff.h"
00029
00030
00031 #if _USE_LFN && _CODE_PAGE == 437
00032 #define _TBLDEF 1
00033 static
00034 const WCHAR Tbl[] = {   /*  CP437(0x80-0xFF) to Unicode conversion table */
00035     0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
00036     0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
00037     0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
00038     0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
00039     0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
00040     0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
00041     0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
00042     0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
00043     0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
00044     0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
00045     0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
00046     0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
00047     0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
00048     0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
00049     0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
00050     0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
00051 };
00052
00053 #elif _CODE_PAGE == 720
00054 #define _TBLDEF 1
00055 static
00056 const WCHAR Tbl[] = {   /*  CP720(0x80-0xFF) to Unicode conversion table */
00057     0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7,
00058     0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000,
00059     0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9,
00060     0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627,
00061     0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
00062     0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB,
00063     0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
00064     0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
00065     0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
00066     0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
00067     0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
00068     0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
00069     0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642,
00070     0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A,
00071     0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0xO650, 0x2248,
00072     0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
00073 };
00074
00075 #elif _CODE_PAGE == 737
00076 #define _TBLDEF 1
00077 static
00078 const WCHAR Tbl[] = {   /*  CP737(0x80-0xFF) to Unicode conversion table */
00079     0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398,
00080     0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0,
00081     0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9,
00082     0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8,
00083     0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0,
00084     0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8,
00085     0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
00086     0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
00087     0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
00088     0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
00089     0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
00090     0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
00091     0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD,
00092     0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E,
00093     0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248,
00094     0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
00095 };
00096
00097 #elif _CODE_PAGE == 775
00098 #define _TBLDEF 1
00099 static
00100 const WCHAR Tbl[] = {   /*  CP775(0x80-0xFF) to Unicode conversion table */
00101     0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107,
00102     0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5,
00103     0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A,
00104     0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4,
00105     0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6,
00106     0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB,
00107     0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118,
00108     0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510,
00109     0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A,
00110     0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D,
00111     0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B,
00112     0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
00113     0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144,
00114     0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019,
00115     0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E,
00116     0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
00117 };
00118
00119 #elif _CODE_PAGE == 850
00120 #define _TBLDEF 1
00121 static
00122 const WCHAR Tbl[] = {   /*  CP850(0x80-0xFF) to Unicode conversion table */
00123     0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
00124     0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
00125     0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
00126     0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
00127     0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
00128     0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
00129     0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
00130     0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
00131     0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
00132     0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
00133     0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE,
00134     0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
00135     0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
00136     0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
00137     0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
00138     0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
00139 };
00140
00141 #elif _CODE_PAGE == 852
00142 #define _TBLDEF 1
00143 static
00144 const WCHAR Tbl[] = {   /*  CP852(0x80-0xFF) to Unicode conversion table */
00145     0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7,
00146     0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106,
00147     0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A,
00148     0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D,
00149     0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E,
00150     0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB,
00151     0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A,
00152     0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510,
00153     0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103,
00154     0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
00155     0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE,
00156     0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580,
00157     0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161,
00158     0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4,
00159     0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8,
00160     0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0
00161 };
00162
00163 #elif _CODE_PAGE == 855
00164 #define _TBLDEF 1
00165 static
00166 const WCHAR Tbl[] = {   /*  CP855(0x80-0xFF) to Unicode conversion table */
00167     0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404,
00168     0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408,
00169     0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C,
00170     0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A,
00171     0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414,
00172     0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB,
00173     0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438,
00174     0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510,
00175     0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A,
00176     0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
00177     0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E,
00178     0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580,
00179     0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443,
00180     0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116,
00181     0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D,
00182     0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0
00183 };
00184
00185 #elif _CODE_PAGE == 857
00186 #define _TBLDEF 1
00187 static
00188 const WCHAR Tbl[] = {   /*  CP857(0x80-0xFF) to Unicode conversion table */
00189     0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
00190     0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5,
00191     0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
00192     0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F,
00193     0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F,
00194     0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
00195     0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
00196     0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
00197     0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
00198     0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
00199     0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE,
00200     0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
00201     0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000,
00202     0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4,
00203     0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
00204     0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
00205 };
00206
00207 #elif _CODE_PAGE == 858
00208 #define _TBLDEF 1
00209 static
00210 const WCHAR Tbl[] = {   /*  CP858(0x80-0xFF) to Unicode conversion table */
00211     0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
00212     0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
00213     0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
00214     0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
00215     0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
00216     0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
00217     0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
00218     0x00A9, 0x2563, 0x2551, 0x2557, 0x2550, 0x00A2, 0x00A5, 0x2510,
00219     0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
00220     0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
00221     0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x20AC, 0x00CD, 0x00CE,
00222     0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00C6, 0x00CC, 0x2580,
00223     0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
00224     0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
00225     0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
00226     0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
00227 };
00228
00229 #elif _CODE_PAGE == 862
00230 #define _TBLDEF 1
00231 static
00232 const WCHAR Tbl[] = {   /*  CP862(0x80-0xFF) to Unicode conversion table */
00233     0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
00234     0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
00235     0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
00236     0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
00237     0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
00238     0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
00239     0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
00240     0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
00241     0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
00242     0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
00243     0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
00244     0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
00245     0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
00246     0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
00247     0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
00248     0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
00249 };
00250
00251 #elif _CODE_PAGE == 866
00252 #define _TBLDEF 1
00253 static
00254 const WCHAR Tbl[] = {   /*  CP866(0x80-0xFF) to Unicode conversion table */
00255     0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
00256     0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
00257     0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
00258     0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
00259     0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
00260     0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
00261     0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
00262     0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
00263     0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
00264     0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
00265     0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
00266     0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
00267     0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
00268     0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F,
00269     0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E,
00270     0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0
00271 };
00272
00273 #elif _CODE_PAGE == 874
00274 #define _TBLDEF 1
00275 static
00276 const WCHAR Tbl[] = {   /*  CP874(0x80-0xFF) to Unicode conversion table */
00277     0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000,
00278     0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00279     0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
00280     0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00281     0x00A0, 0x0E01, 0x0E02, 0x0E03, 0x0E04, 0x0E05, 0x0E06, 0x0E07,
00282     0x0E08, 0x0E09, 0x0E0A, 0x0E0B, 0x0E0C, 0x0E0D, 0x0E0E, 0x0E0F,
00283     0x0E10, 0x0E11, 0x0E12, 0x0E13, 0x0E14, 0x0E15, 0x0E16, 0x0E17,
00284     0x0E18, 0x0E19, 0x0E1A, 0x0E1B, 0x0E1C, 0x0E1D, 0x0E1E, 0x0E1F,
00285     0x0E20, 0x0E21, 0x0E22, 0x0E23, 0x0E24, 0x0E25, 0x0E26, 0x0E27,
00286     0x0E28, 0x0E29, 0x0E2A, 0x0E2B, 0x0E2C, 0x0E2D, 0x0E2E, 0x0E2F,
00287     0x0E30, 0x0E31, 0x0E32, 0x0E33, 0x0E34, 0x0E35, 0x0E36, 0x0E37,
00288     0x0E38, 0x0E39, 0x0E3A, 0x0000, 0x0000, 0x0000, 0x0000, 0x0E3F,
00289     0x0E40, 0x0E41, 0x0E42, 0x0E43, 0x0E44, 0x0E45, 0x0E46, 0x0E47,
00290     0x0E48, 0x0E49, 0x0E4A, 0x0E4B, 0x0E4C, 0x0E4D, 0x0E4E, 0x0E4F,
00291     0x0E50, 0x0E51, 0x0E52, 0x0E53, 0x0E54, 0x0E55, 0x0E56, 0x0E57,
00292     0x0E58, 0x0E59, 0x0E5A, 0x0E5B, 0x0000, 0x0000, 0x0000, 0x0000
00293 };
00294
00295 #elif _CODE_PAGE == 1250
00296 #define _TBLDEF 1
00297 static
00298 const WCHAR Tbl[] = {   /*  CP1250(0x80-0xFF) to Unicode conversion table */
00299     0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
00300     0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179,
00301     0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
00302     0x0000, 0x2122, 0x0161, 0x203A, 0x015B, 0x0165, 0x017E, 0x017A,
00303     0x00A0, 0x02C7, 0x02D8, 0x0141, 0x00A4, 0x0104, 0x00A6, 0x00A7,
00304     0x00A8, 0x00A9, 0x015E, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x017B,
00305     0x00B0, 0x00B1, 0x02DB, 0x0142, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
00306     0x00B8, 0x0105, 0x015F, 0x00BB, 0x013D, 0x02DD, 0x013E, 0x017C,
00307     0x0154, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x0139, 0x0106, 0x00C7,
00308     0x010C, 0x00C9, 0x0118, 0x00CB, 0x011A, 0x00CD, 0x00CE, 0x010E,
00309     0x0110, 0x0143, 0x0147, 0x00D3, 0x00D4, 0x0150, 0x00D6, 0x00D7,
00310     0x0158, 0x016E, 0x00DA, 0x0170, 0x00DC, 0x00DD, 0x0162, 0x00DF,
00311     0x0155, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x013A, 0x0107, 0x00E7,
00312     0x010D, 0x00E9, 0x0119, 0x00EB, 0x011B, 0x00ED, 0x00EE, 0x010F,
00313     0x0111, 0x0144, 0x0148, 0x00F3, 0x00F4, 0x0151, 0x00F6, 0x00F7,
00314     0x0159, 0x016F, 0x00FA, 0x0171, 0x00FC, 0x00FD, 0x0163, 0x02D9
00315 };
00316
00317 #elif _CODE_PAGE == 1251
00318 #define _TBLDEF 1
00319 static
00320 const WCHAR Tbl[] = {   /*  CP1251(0x80-0xFF) to Unicode conversion table */
00321     0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021,
00322     0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F,
00323     0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
00324     0x0000, 0x2111, 0x0459, 0x203A, 0x045A, 0x045C, 0x045B, 0x045F,
00325     0x00A0, 0x040E, 0x045E, 0x0408, 0x00A4, 0x0490, 0x00A6, 0x00A7,
00326     0x0401, 0x00A9, 0x0404, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x0407,
00327     0x00B0, 0x00B1, 0x0406, 0x0456, 0x0491, 0x00B5, 0x00B6, 0x00B7,
00328     0x0451, 0x2116, 0x0454, 0x00BB, 0x0458, 0x0405, 0x0455, 0x0457,
00329     0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
00330     0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
00331     0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
00332     0x0428, 0x0429, 0x042A, 0x042D, 0x042C, 0x042D, 0x042E, 0x042F,
00333     0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
00334     0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
00335     0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
00336     0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F
00337 };
00338
00339 #elif _CODE_PAGE == 1252
00340 #define _TBLDEF 1
00341 static
00342 const WCHAR Tbl[] = {   /*  CP1252(0x80-0xFF) to Unicode conversion table */
00343     0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
00344     0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000,
00345     0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
00346     0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x017E, 0x0178,
00347     0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
00348     0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
00349     0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
00350     0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
00351     0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
00352     0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
00353     0x00D0, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
00354     0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x00DD, 0x00DE, 0x00DF,
00355     0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
00356     0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
00357     0x00F0, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
00358     0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x00FD, 0x00FE, 0x00FF
00359 };
00360
00361 #elif _CODE_PAGE == 1253
00362 #define _TBLDEF 1
00363 static
00364 const WCHAR Tbl[] = {   /*  CP1253(0x80-0xFF) to Unicode conversion table */
00365     0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
00366     0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000,
00367     0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
00368     0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
00369     0x00A0, 0x0385, 0x0386, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
00370     0x00A8, 0x00A9, 0x0000, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x2015,
00371     0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x0384, 0x00B5, 0x00B6, 0x00B7,
00372     0x0388, 0x0389, 0x038A, 0x00BB, 0x038C, 0x00BD, 0x038E, 0x038F,
00373     0x0390, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397,
00374     0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F,
00375     0x03A0, 0x03A1, 0x0000, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7,
00376     0x03A8, 0x03A9, 0x03AA, 0x03AD, 0x03AC, 0x03AD, 0x03AE, 0x03AF,
00377     0x03B0, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7,
00378     0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF,
00379     0x03C0, 0x03C1, 0x03C2, 0x03C3, 0x03C4, 0x03C5, 0x03C6, 0x03C7,
00380     0x03C8, 0x03C9, 0x03CA, 0x03CB, 0x03CC, 0x03CD, 0x03CE, 0x0000
00381 };
00382
00383 #elif _CODE_PAGE == 1254
00384 #define _TBLDEF 1
00385 static
00386 const WCHAR Tbl[] = {   /*  CP1254(0x80-0xFF) to Unicode conversion table */
00387     0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
00388     0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
00389     0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
00390     0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
00391     0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
00392     0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
00393     0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
00394     0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
00395     0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
00396     0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
00397     0x011E, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
00398     0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x0130, 0x015E, 0x00DF,
00399     0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
00400     0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
00401     0x011F, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
00402     0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x0131, 0x015F, 0x00FF
00403 };
00404
00405 #elif _CODE_PAGE == 1255
00406 #define _TBLDEF 1
00407 static
00408 const WCHAR Tbl[] = {   /*  CP1255(0x80-0xFF) to Unicode conversion table */
00409     0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
00410     0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000,
00411     0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
00412     0x02DC, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
00413     0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
00414     0x00A8, 0x00A9, 0x00D7, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
00415     0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
00416     0x00B8, 0x00B9, 0x00F7, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
00417     0x05B0, 0x05B1, 0x05B2, 0x05B3, 0x05B4, 0x05B5, 0x05B6, 0x05B7,
00418     0x05B8, 0x05B9, 0x0000, 0x05BB, 0x05BC, 0x05BD, 0x05BE, 0x05BF,
00419     0x05C0, 0x05C1, 0x05C2, 0x05C3, 0x05F0, 0x05F1, 0x05F2, 0x05F3,
00420     0x05F4, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
00421     0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
00422     0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
00423     0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
00424     0x05E8, 0x05E9, 0x05EA, 0x0000, 0x0000, 0x200E, 0x200F, 0x0000
00425 };
00426
00427 #elif _CODE_PAGE == 1256
00428 #define _TBLDEF 1
00429 static
00430 const WCHAR Tbl[] = {   /*  CP1256(0x80-0xFF) to Unicode conversion table */
00431     0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
00432     0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688,
00433     0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
00434     0x06A9, 0x2122, 0x0691, 0x203A, 0x0153, 0x200C, 0x200D, 0x06BA,
00435     0x00A0, 0x060C, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
00436     0x00A8, 0x00A9, 0x06BE, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
00437     0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
00438     0x00B8, 0x00B9, 0x061B, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x061F,
00439     0x06C1, 0x0621, 0x0622, 0x0623, 0x0624, 0x0625, 0x0626, 0x0627,
00440     0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
00441     0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x0636, 0x00D7,
00442     0x0637, 0x0638, 0x0639, 0x063A, 0x0640, 0x0640, 0x0642, 0x0643,
00443     0x00E0, 0x0644, 0x00E2, 0x0645, 0x0646, 0x0647, 0x0648, 0x00E7,
00444     0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0649, 0x064A, 0x00EE, 0x00EF,
00445     0x064B, 0x064C, 0x064D, 0x064E, 0x00F4, 0x064F, 0x0650, 0x00F7,
00446     0x0651, 0x00F9, 0x0652, 0x00FB, 0x00FC, 0x200E, 0x200F, 0x06D2
00447 }
00448
00449 #elif _CODE_PAGE == 1257
00450 #define _TBLDEF 1
00451 static
00452 const WCHAR Tbl[] = {   /*  CP1257(0x80-0xFF) to Unicode conversion table */
00453     0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
00454     0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8,
00455     0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
00456     0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x00AF, 0x02DB, 0x0000,
00457     0x00A0, 0x0000, 0x00A2, 0x00A3, 0x00A4, 0x0000, 0x00A6, 0x00A7,
00458     0x00D8, 0x00A9, 0x0156, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
00459     0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
00460     0x00B8, 0x00B9, 0x0157, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00E6,
00461     0x0104, 0x012E, 0x0100, 0x0106, 0x00C4, 0x00C5, 0x0118, 0x0112,
00462     0x010C, 0x00C9, 0x0179, 0x0116, 0x0122, 0x0136, 0x012A, 0x013B,
00463     0x0160, 0x0143, 0x0145, 0x00D3, 0x014C, 0x00D5, 0x00D6, 0x00D7,
00464     0x0172, 0x0141, 0x015A, 0x016A, 0x00DC, 0x017B, 0x017D, 0x00DF,
00465     0x0105, 0x012F, 0x0101, 0x0107, 0x00E4, 0x00E5, 0x0119, 0x0113,
00466     0x010D, 0x00E9, 0x017A, 0x0117, 0x0123, 0x0137, 0x012B, 0x013C,
00467     0x0161, 0x0144, 0x0146, 0x00F3, 0x014D, 0x00F5, 0x00F6, 0x00F7,
00468     0x0173, 0x014E, 0x015B, 0x016B, 0x00FC, 0x017C, 0x017E, 0x02D9
00469 };
00470
00471 #elif _CODE_PAGE == 1258
00472 #define _TBLDEF 1
00473 static
00474 const WCHAR Tbl[] = {   /*  CP1258(0x80-0xFF) to Unicode conversion table */
00475     0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
00476     0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
00477     0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
00478     0x02DC, 0x2122, 0x0000, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
00479     0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
00480     0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
00481     0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
00482     0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
00483     0x00C0, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
00484     0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x0300, 0x00CD, 0x00CE, 0x00CF,
00485     0x0110, 0x00D1, 0x0309, 0x00D3, 0x00D4, 0x01A0, 0x00D6, 0x00D7,
00486     0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x01AF, 0x0303, 0x00DF,
00487     0x00E0, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
00488     0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0301, 0x00ED, 0x00EE, 0x00EF,
00489     0x0111, 0x00F1, 0x0323, 0x00F3, 0x00F4, 0x01A1, 0x00F6, 0x00F7,
00490     0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x01B0, 0x20AB, 0x00FF
00491 };
00492
00493 #endif
00494
00495
00496 #if _TBLDEF
00497
00498 WCHAR ff_convert (  /* Converted code, 0 means conversion error */
00499     WCHAR   src,    /* Character code to be converted */
00500     UINT    dir     /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */
00501 )
00502 {
00503     const WCHAR *p;
00504     WCHAR c;
00505
00506
00507     if (src < 0x80) {   /* ASCII */
00508         c = src;
00509
00510     } else {
00511         if (dir) {      /* OEMCP to Unicode */
00512             c = (src >= 0x100) ? 0 : Tbl[src - 0x80];
00513
00514         } else {        /* Unicode to OEMCP */
00515             for (c = 0; c < 0x80; c++) {
00516                 if (src == Tbl[c]) break;
00517             }
00518             c = (c + 0x80) & 0xFF;
00519         }
00520     }
00521
00522     return c;
00523 }
00524
00525 #else
00526 #error This file is not needed in current configuration
00527
00528 #endif


BeRTOS: cfg_adc.h File Reference

  • cfg
Defines
cfg_adc.h File Reference

Configuration file for the ADC module. More...

Go to the source code of this file.

Defines

#define | ADC_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | ADC_LOG_FORMAT LOG_FMT_VERBOSE
Module logging format.
#define | CONFIG_ADC_CLOCK 4800000UL
Clock Frequency for ADC conversion.
#define | CONFIG_ADC_STARTUP_TIME 20
Minimum time for starting up a conversion [us].
#define | CONFIG_ADC_SHTIME 834
Minimum time for sample and hold [ns].
#define | CONFIG_ADC_AVR_REF ADC_AVR_AVCC
ADC Voltage Reference.
#define | CONFIG_ADC_AVR_DIVISOR 2
ADC clock divisor from main crystal.
#define | CONFIG_ADC_STROBE 0
Enable ADC strobe for debugging ADC ISR.
#define | CONFIG_ADC_SUT ADC_SUT512
Start up timer[s] = startup value / ADCClock [Hz].
#define | CONFIG_ADC_STTLING ADC_AST17
Analog Settling Time[s] = settling value / ADCClock[Hz].
#define | CONFIG_ADC_TRACKTIM 0
Tracking Time[s] = (TRACKTIM + 1) / ADCClock[Hz].
#define | CONFIG_ADC_TRANSFER 1
Transfer Period[s] = (TRANSFER * 2 + 3) ADCClock[Hz].

Detailed Description

Configuration file for the ADC module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_adc.h.

Define Documentation

#define CONFIG_ADC_CLOCK 4800000UL

Clock Frequency for ADC conversion.

This frequency will be rounded down to an integer submultiple of CPU_FREQ.

Definition at line 66 of file cfg_adc.h.

#define CONFIG_ADC_STTLING ADC_AST17

Analog Settling Time[s] = settling value / ADCClock[Hz].

Definition at line 129 of file cfg_adc.h.

#define CONFIG_ADC_SUT ADC_SUT512

Start up timer[s] = startup value / ADCClock [Hz].

Definition at line 120 of file cfg_adc.h.

#define CONFIG_ADC_TRACKTIM 0

Tracking Time[s] = (TRACKTIM + 1) / ADCClock[Hz].

Definition at line 138 of file cfg_adc.h.

#define CONFIG_ADC_TRANSFER 1

Transfer Period[s] = (TRANSFER * 2 + 3) ADCClock[Hz].

Definition at line 147 of file cfg_adc.h.


BeRTOS: cfg_adc.h Source File

  • cfg
cfg_adc.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_ADC_H
00039 #define CFG_ADC_H
00040
00047 #define ADC_LOG_LEVEL      LOG_LVL_INFO
00048
00055 #define ADC_LOG_FORMAT     LOG_FMT_VERBOSE
00056
00066 #define CONFIG_ADC_CLOCK        4800000UL
00067
00075 #define CONFIG_ADC_STARTUP_TIME 20
00076
00084 #define CONFIG_ADC_SHTIME       834
00085
00093 #define CONFIG_ADC_AVR_REF      ADC_AVR_AVCC
00094
00103 #define CONFIG_ADC_AVR_DIVISOR  2
00104
00110 #define CONFIG_ADC_STROBE  0
00111
00112
00120 #define CONFIG_ADC_SUT         ADC_SUT512
00121
00129 #define CONFIG_ADC_STTLING     ADC_AST17
00130
00138 #define CONFIG_ADC_TRACKTIM    0
00139
00147 #define CONFIG_ADC_TRANSFER    1
00148
00149 #endif /* CFG_ADC_H */


BeRTOS: cfg_afsk.h File Reference

  • cfg
Defines
cfg_afsk.h File Reference

Configuration file for AFSK1200 modem. More...

Go to the source code of this file.

Defines

#define | AFSK_LOG_LEVEL LOG_LVL_WARN
Module logging level.
#define | AFSK_LOG_FORMAT LOG_FMT_TERSE
Module logging format.
#define | CONFIG_AFSK_FILTER AFSK_CHEBYSHEV
AFSK discriminator filter type.
#define | CONFIG_AFSK_RX_BUFLEN 32
AFSK receiver buffer length.
#define | CONFIG_AFSK_TX_BUFLEN 32
AFSK transimtter buffer length.
#define | CONFIG_AFSK_DAC_SAMPLERATE 9600
AFSK DAC sample rate for modem outout.
#define | CONFIG_AFSK_RXTIMEOUT 0
AFSK RX timeout in ms, set to -1 to disable.
#define | CONFIG_AFSK_PREAMBLE_LEN 300UL
AFSK Preamble length in [ms], before starting transmissions.
#define | CONFIG_AFSK_TRAILER_LEN 50UL
AFSK Trailer length in [ms], before stopping transmissions.

Detailed Description

Configuration file for AFSK1200 modem.

Author:
Francesco Sacchi <asterix@develer.com>

Definition in file cfg_afsk.h.


BeRTOS: cfg_afsk.h Source File

  • cfg
cfg_afsk.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_AFSK_H
00039 #define CFG_AFSK_H
00040
00047 #define AFSK_LOG_LEVEL      LOG_LVL_WARN
00048
00055 #define AFSK_LOG_FORMAT     LOG_FMT_TERSE
00056
00057
00063 #define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV
00064
00065
00072 #define CONFIG_AFSK_RX_BUFLEN 32
00073
00080 #define CONFIG_AFSK_TX_BUFLEN 32
00081
00087 #define CONFIG_AFSK_DAC_SAMPLERATE 9600
00088
00094 #define CONFIG_AFSK_RXTIMEOUT 0
00095
00096
00102 #define CONFIG_AFSK_PREAMBLE_LEN 300UL
00103
00104
00105
00111 #define CONFIG_AFSK_TRAILER_LEN 50UL
00112
00113 #endif /* CFG_AFSK_H */


BeRTOS: cfg_arch.h File Reference

  • cfg
Defines
cfg_arch.h File Reference

Set system configuration. More...

Go to the source code of this file.

Defines

#define | ARCH_DEFAULT (1<<0)
Default architecture.
#define | ARCH_EMUL (1<<2)
EMUL architecture.
#define | ARCH_QT (1<<3)
QT architecture.
#define | ARCH_UNITTEST (1<<4)
UNITTEST architecture.
#define | ARCH_NIGHTTEST (1<<5)
NIGHTTEST architecture.

Detailed Description

Set system configuration.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file cfg_arch.h.


BeRTOS: cfg_arch.h Source File

  • cfg
cfg_arch.h
Go to the documentation of this file.
00001
00042 #ifndef CFG_ARCH_CONFIG_H
00043 #define CFG_ARCH_CONFIG_H
00044
00045 #define ARCH_DEFAULT   (1<<0) ///< Default architecture
00046
00047 #define ARCH_EMUL      (1<<2) ///< EMUL architecture
00048 #define ARCH_QT        (1<<3) ///< QT architecture
00049 #define ARCH_UNITTEST  (1<<4) ///< UNITTEST architecture
00050 #define ARCH_NIGHTTEST (1<<5) ///< NIGHTTEST architecture
00051
00052 #endif /* CFG_ARCH_CONFIG_H */


BeRTOS: cfg_attr.h File Reference

  • cfg
Defines
cfg_attr.h File Reference

Configuration file for Debug module. More...

Go to the source code of this file.

Defines

#define CONFIG_FAST_MEM 0
Put a function or critical code in fast memory.

Detailed Description

Configuration file for Debug module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_attr.h.


BeRTOS: cfg_attr.h Source File

  • cfg
cfg_attr.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_ATTR_H
00040 #define CFG_ATTR_H
00041
00043 #define CONFIG_FAST_MEM 0
00044
00045
00046 #endif /* CFG_ATTR_H */


BeRTOS: cfg_ax25.h File Reference

  • cfg
Defines
cfg_ax25.h File Reference

Configuration file for the AX25 protocol module. More...

Go to the source code of this file.

Defines

#define | AX25_LOG_LEVEL LOG_LVL_WARN
Module logging level.
#define | AX25_LOG_FORMAT LOG_FMT_TERSE
Module logging format.
#define | CONFIG_AX25_FRAME_BUF_LEN 330
AX25 frame buffer lenght.
#define | CONFIG_AX25_RPT_LST 1
Enable repeaters listing in AX25 frames.

Detailed Description

Configuration file for the AX25 protocol module.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file cfg_ax25.h.

Define Documentation

#define CONFIG_AX25_RPT_LST 1

Enable repeaters listing in AX25 frames.

If enabled use 56 addtional bytes of RAM for each message received.

Definition at line 73 of file cfg_ax25.h.


BeRTOS: cfg_ax25.h Source File

  • cfg
cfg_ax25.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_AX25_H
00039 #define CFG_AX25_H
00040
00047 #define AX25_LOG_LEVEL      LOG_LVL_WARN
00048
00055 #define AX25_LOG_FORMAT     LOG_FMT_TERSE
00056
00063 #define CONFIG_AX25_FRAME_BUF_LEN 330
00064
00065
00073 #define CONFIG_AX25_RPT_LST 1
00074
00075 #endif /* CFG_AX25_H */


BeRTOS: cfg_battfs.h File Reference

  • cfg
Defines
cfg_battfs.h File Reference

Configuration file for BattFS module. More...

Go to the source code of this file.

Defines

#define | BATTFS_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | BATTFS_LOG_FORMAT LOG_FMT_VERBOSE
module logging format.
#define | CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0
Set to 1 to enable free page shuffling.

Detailed Description

Configuration file for BattFS module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_battfs.h.

Define Documentation

#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0

Set to 1 to enable free page shuffling.

This increase memories life but makes debugging more difficult due to its unrepeteable state.

Definition at line 64 of file cfg_battfs.h.


BeRTOS: cfg_battfs.h Source File

  • cfg
cfg_battfs.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_BATTFS_H
00039 #define CFG_BATTFS_H
00040
00041
00048 #define BATTFS_LOG_LEVEL      LOG_LVL_INFO
00049
00056 #define BATTFS_LOG_FORMAT     LOG_FMT_VERBOSE
00057
00064 #define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0
00065
00066
00067 #endif /* BATTFS */


BeRTOS: cfg_boot.h File Reference

  • cfg
Defines
cfg_boot.h File Reference

Configuration file for bootloader module. More...

Go to the source code of this file.

Defines

#define | CONFIG_BOOT_LOG_LEVEL LOG_LVL_INFO
Bootloader log level.
#define | CONFIG_BOOT_LOG_FORMAT LOG_FMT_TERSE
Bootoloader log format.

Detailed Description

Configuration file for bootloader module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_boot.h.


BeRTOS: cfg_boot.h Source File

  • cfg
cfg_boot.h
Go to the documentation of this file.
00001
00037 #ifndef CFG_BOOT_H
00038 #define CFG_BOOT_H
00039
00041 #define CONFIG_BOOT_LOG_LEVEL        LOG_LVL_INFO
00042
00044 #define CONFIG_BOOT_LOG_FORMAT       LOG_FMT_TERSE
00045
00046 #endif /* CFG_FLASH_AT91_H */


BeRTOS: cfg_buzzerled.h File Reference

  • cfg
Defines
cfg_buzzerled.h File Reference

Configuration file for buzzerled module. More...

Go to the source code of this file.

Defines

#define CONFIG_NUM_BLDS 1
TODO.

Detailed Description

Configuration file for buzzerled module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_buzzerled.h.


BeRTOS: cfg_buzzerled.h Source File

  • cfg
cfg_buzzerled.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_BUZZERLED_H
00040 #define CFG_BUZZERLED_H
00041
00043 #define CONFIG_NUM_BLDS     1
00044
00045
00046 #endif /* CFG_BUZZERLED_H */
00047


BeRTOS: cfg_context_switch.h File Reference

  • cfg
Defines
cfg_context_switch.h File Reference

Configuration file for the context switch benchmark. More...

Go to the source code of this file.

Defines

#define | CONFIG_USE_HP_TIMER 1
Use hp timer for the bechmark.
#define | CONFIG_USE_LED 1
Use board led for benchmark.
#define | CONFIG_CTX_DEBUG_PORT 0
Debug console port.
#define | CONFIG_CTX_DEBUG_BAUDRATE 115200UL
Baudrate for the debug console.

Detailed Description

Configuration file for the context switch benchmark.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_context_switch.h.


BeRTOS: cfg_context_switch.h Source File

  • cfg
cfg_context_switch.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_CONTEXT_SWITCH_H
00039 #define CFG_CONTEXT_SWITCH_H
00040
00048 #define CONFIG_USE_HP_TIMER       1
00049
00050
00056 #define CONFIG_USE_LED       1
00057
00058
00063 #define CONFIG_CTX_DEBUG_PORT 0
00064
00069 #define CONFIG_CTX_DEBUG_BAUDRATE  115200UL
00070
00071 #endif /* CFG_CONTEXT_SWITCH_H */


BeRTOS: cfg_dac.h File Reference

  • cfg
Defines
cfg_dac.h File Reference

Configuration file for DAC module. More...

Go to the source code of this file.

Defines

#define | DAC_LOG_LEVEL LOG_LVL_WARN
Module logging level.
#define | DAC_LOG_FORMAT LOG_FMT_TERSE
Module logging format.
#define | CONFIG_DAC_REFRESH 16
DAC Refresh Period = 1024*REFRESH/DACC Clock.
#define | CONFIG_DAC_STARTUP 0
DAC Startup Time Selection.
#define | CONFIG_DAC_TIMER DACC_TRGSEL_TIO_CH0
DAC Trigger Selection.

Detailed Description

Configuration file for DAC module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_dac.h.

Define Documentation

#define CONFIG_DAC_REFRESH 16

DAC Refresh Period = 1024*REFRESH/DACC Clock.

Definition at line 66 of file cfg_dac.h.

#define CONFIG_DAC_STARTUP 0

DAC Startup Time Selection.

see datasheet table.

Definition at line 77 of file cfg_dac.h.


BeRTOS: cfg_dac.h Source File

  • cfg
cfg_dac.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_DAC_H
00040 #define CFG_DAC_H
00041
00048 #define DAC_LOG_LEVEL      LOG_LVL_WARN
00049
00056 #define DAC_LOG_FORMAT     LOG_FMT_TERSE
00057
00066 #define CONFIG_DAC_REFRESH            16
00067
00077 #define CONFIG_DAC_STARTUP             0
00078
00086 #define CONFIG_DAC_TIMER  DACC_TRGSEL_TIO_CH0
00087
00088 #endif /* CFG_DAC_H */


BeRTOS: cfg_dataflash.h File Reference

  • cfg
Defines
cfg_dataflash.h File Reference

Configuration file for data flash memory module. More...

Go to the source code of this file.

Defines

#define | DATAFLASH_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | DATAFLASH_LOG_FORMAT LOG_FMT_TERSE
Module logging format.

Detailed Description

Configuration file for data flash memory module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_dataflash.h.


BeRTOS: cfg_dataflash.h Source File

  • cfg
cfg_dataflash.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_DATAFLASH_H
00039 #define CFG_DATAFLASH_H
00040
00046 #define DATAFLASH_LOG_LEVEL      LOG_LVL_INFO
00047
00053 #define DATAFLASH_LOG_FORMAT     LOG_FMT_TERSE
00054
00055 #endif /* CFG_DATAFLASH_H */


BeRTOS: cfg_dc_motor.h File Reference

  • cfg
Defines
cfg_dc_motor.h File Reference

Configuration file for DC motor module. More...

Go to the source code of this file.

Defines

#define | CONFIG_NUM_DC_MOTOR 4
Number of the DC motors to manage.
#define | DC_MOTOR_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE
Module logging format.
#define | CONFIG_DC_MOTOR_MIN_SPEED 0
Min value of DC motor speed.
#define | CONFIG_DC_MOTOR_MAX_SPEED 65535
Max value of DC motor speed.
#define | CONFIG_DC_MOTOR_SAMPLE_PERIOD 40
Sampling period in millisecond.
#define | CONFIG_DC_MOTOR_SAMPLE_DELAY 2
Amount of millisecond before to read sample.
#define | CONFIG_DC_MOTOR_USE_SEM 1
This control set which mode the driver use to lock share resources when we use the preempitive kernel.

Detailed Description

Configuration file for DC motor module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_dc_motor.h.

Define Documentation

#define CONFIG_DC_MOTOR_MAX_SPEED 65535

Max value of DC motor speed.

Note:
Generally this value is the max value of the ADC conversion, if you use it.

Definition at line 85 of file cfg_dc_motor.h.

#define CONFIG_DC_MOTOR_MIN_SPEED 0

Min value of DC motor speed.

Note:
Generally this value is the min value of the ADC conversion, if you use it.

Definition at line 74 of file cfg_dc_motor.h.

#define CONFIG_DC_MOTOR_USE_SEM 1

This control set which mode the driver use to lock share resources when we use the preempitive kernel.

If we set to 1 we use the semaphore module otherwise the driver disable the switch context every time we need to access to shared sources.

Definition at line 109 of file cfg_dc_motor.h.


BeRTOS: cfg_dc_motor.h Source File

  • cfg
cfg_dc_motor.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_DC_MOTOR_H
00040 #define CFG_DC_MOTOR_H
00041
00048 #define CONFIG_NUM_DC_MOTOR       4
00049
00056 #define DC_MOTOR_LOG_LEVEL      LOG_LVL_INFO
00057
00064 #define DC_MOTOR_LOG_FORMAT     LOG_FMT_VERBOSE
00065
00066
00074 #define CONFIG_DC_MOTOR_MIN_SPEED              0
00075
00076
00085 #define CONFIG_DC_MOTOR_MAX_SPEED         65535
00086
00087
00092 #define CONFIG_DC_MOTOR_SAMPLE_PERIOD     40
00093
00098 #define CONFIG_DC_MOTOR_SAMPLE_DELAY       2
00099
00109 #define CONFIG_DC_MOTOR_USE_SEM            1
00110
00111 #endif /* CFG_DC_MOTOR_H */


BeRTOS: cfg_debug.h File Reference

  • cfg
Defines
cfg_debug.h File Reference

Configuration file for Debug module. More...

Go to the source code of this file.

Defines

#define | CONFIG_KDEBUG_PORT 0
Debug console port.
#define | CONFIG_KDEBUG_BAUDRATE 115200UL
Baudrate for the debug console.
#define | CONFIG_KDEBUG_CLOCK_SOURCE KDBG_UART_SMCLK
Clock source for the UART module.
#define | CONFIG_KDEBUG_CLOCK_FREQ 0UL
Clock frequency.

Detailed Description

Configuration file for Debug module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_debug.h.

Define Documentation

#define CONFIG_KDEBUG_CLOCK_FREQ 0UL

Clock frequency.

(Only if different from MCLK's frequency, otherwise leave it zero)

Definition at line 68 of file cfg_debug.h.

#define CONFIG_KDEBUG_CLOCK_SOURCE KDBG_UART_SMCLK

Clock source for the UART module.

You need to write the code to reprogram the respective clock at the required frequency in your project before calling kdbg_init().

Definition at line 61 of file cfg_debug.h.


BeRTOS: cfg_debug.h Source File

  • cfg
cfg_debug.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_DEBUG_H
00040 #define CFG_DEBUG_H
00041
00046 #define CONFIG_KDEBUG_PORT 0
00047
00052 #define CONFIG_KDEBUG_BAUDRATE  115200UL
00053
00061 #define CONFIG_KDEBUG_CLOCK_SOURCE  KDBG_UART_SMCLK
00062
00068 #define CONFIG_KDEBUG_CLOCK_FREQ 0UL
00069
00070 #endif /* CFG_DEBUG_H */


BeRTOS: cfg_eeprom.h File Reference

  • cfg
Defines
cfg_eeprom.h File Reference

Configuration file for the Eeprom module. More...

Go to the source code of this file.

Defines

#define | EEPROM_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | EEPROM_LOG_FORMAT LOG_FMT_TERSE
Module logging format.
#define | CONFIG_EEPROM_DISABLE_OLD_API 0
Check this to disable Eeprom deprecated API support.

Detailed Description

Configuration file for the Eeprom module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_eeprom.h.


BeRTOS: cfg_eeprom.h Source File

  • cfg
cfg_eeprom.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_EEPROM_H
00039 #define CFG_EEPROM_H
00040
00047 #define EEPROM_LOG_LEVEL      LOG_LVL_INFO
00048
00055 #define EEPROM_LOG_FORMAT     LOG_FMT_TERSE
00056
00062 #define CONFIG_EEPROM_DISABLE_OLD_API  0
00063
00064 #endif /* CFG_EEPROM_H */


BeRTOS: cfg_emb_flash.h File Reference

  • cfg
Defines
cfg_emb_flash.h File Reference

Configuration file for embedded flash module. More...

Go to the source code of this file.

Defines

#define | CONFIG_FLASH_EMB_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | CONFIG_FLASH_EMB_LOG_FORMAT LOG_FMT_TERSE
module logging format.
#define | CONFIG_FLASH_WR_TIMEOUT 100
Write emb flash timeout.
#define | CONFIG_FLASH_DISABLE_OLD_API 0
Check this to disable embedded flash deprecated API support.

Detailed Description

Configuration file for embedded flash module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_emb_flash.h.

Define Documentation

#define CONFIG_FLASH_WR_TIMEOUT 100

Write emb flash timeout.

For how many milliseconds the cpu wait to complete write operation.

Definition at line 64 of file cfg_emb_flash.h.


BeRTOS: cfg_emb_flash.h Source File

  • cfg
cfg_emb_flash.h
Go to the documentation of this file.
00001
00037 #ifndef CFG_EMB_FLASH_H
00038 #define CFG_EMB_FLASH_H
00039
00046 #define CONFIG_FLASH_EMB_LOG_LEVEL      LOG_LVL_INFO
00047
00054 #define CONFIG_FLASH_EMB_LOG_FORMAT     LOG_FMT_TERSE
00055
00056
00064 #define CONFIG_FLASH_WR_TIMEOUT      100
00065
00071 #define CONFIG_FLASH_DISABLE_OLD_API       0
00072
00073 #endif /* CFG_FLASH_AT91_H */


BeRTOS: cfg_eth.h File Reference

  • cfg
Defines
cfg_eth.h File Reference

Configuration file for the generic ethernet driver module. More...

Go to the source code of this file.

Defines

#define | ETH_LOG_LEVEL LOG_LVL_WARN
Module logging level.
#define | ETH_LOG_FORMAT LOG_FMT_TERSE
module logging format.

Detailed Description

Configuration file for the generic ethernet driver module.

Author:
Andrea Righi <arighi@develer.com>

Definition in file cfg_eth.h.


BeRTOS: cfg_eth.h Source File

  • cfg
cfg_eth.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_ETH_H
00039 #define CFG_ETH_H
00040
00047 #define ETH_LOG_LEVEL      LOG_LVL_WARN
00048
00055 #define ETH_LOG_FORMAT     LOG_FMT_TERSE
00056
00057 #endif /* CFG_ETH_H */


BeRTOS: cfg_fat.h File Reference

  • cfg
Defines
cfg_fat.h File Reference

Configuration file for Fat module. More...

Go to the source code of this file.

Defines

#define | FAT_LOG_LEVEL LOG_LVL_ERR
Module logging level.
#define | FAT_LOG_FORMAT LOG_FMT_VERBOSE
Module logging format.
#define | CONFIG_FAT_WORD_ACCESS 0
Use word alignment to access FAT structure.
#define | CONFIG_FAT_FS_READONLY 0
Enable read functions only.
#define | CONFIG_FAT_FS_MINIMIZE 0
Minimization level to remove some functions.
#define | CONFIG_FAT_FS_TINY 1
If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer.
#define | CONFIG_FAT_USE_STRFUNC 0
To enable string functions, set _USE_STRFUNC to 1 or 2.
#define | CONFIG_FAT_USE_MKFS 0
Enable f_mkfs function.
#define | CONFIG_FAT_USE_FORWARD 0
Enable f_forward function.
#define | CONFIG_FAT_DRIVES 1
Number of volumes (logical drives) to be used.
#define | CONFIG_FAT_MAX_SS 512
Maximum sector size to be handled.
#define | CONFIG_FAT_MULTI_PARTITION 0
When _MULTI_PARTITION is set to 0, each volume is bound to the same physical drive number and can mount only first primaly partition.
#define | CONFIG_FAT_CODE_PAGE 850
Specifies the OEM code page to be used on the target system.
#define | CONFIG_FAT_USE_LFN 0
Support for long filenames.
#define | CONFIG_FAT_MAX_LFN 255
Maximum Long File Name length to handle.

Detailed Description

Configuration file for Fat module.

Author:
Luca Ottaviano <lottaviano@develer.com>
Francesco Sacchi <batt@develer.com>

Definition in file cfg_fat.h.

Define Documentation

#define CONFIG_FAT_MAX_SS 512

Maximum sector size to be handled.

(512/1024/2048/4096). 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk

Definition at line 122 of file cfg_fat.h.

#define CONFIG_FAT_MULTI_PARTITION 0

When _MULTI_PARTITION is set to 0, each volume is bound to the same physical drive number and can mount only first primaly partition.

When it is set to 1, each volume is tied to the partitions listed in Drives[].

Definition at line 132 of file cfg_fat.h.

#define CONFIG_FAT_USE_FORWARD 0

Enable f_forward function.

Requires CONFIG_FAT_FS_TINY.

Definition at line 107 of file cfg_fat.h.

#define CONFIG_FAT_USE_LFN 0

Support for long filenames.

Enable only if you have a valid Microsoft license.

Definition at line 146 of file cfg_fat.h.

#define CONFIG_FAT_USE_MKFS 0

Enable f_mkfs function.

Requires CONFIG_FAT_FS_READONLY = 0.

Definition at line 100 of file cfg_fat.h.


BeRTOS: cfg_fat.h Source File

  • cfg
cfg_fat.h
Go to the documentation of this file.
00001
00040 #ifndef CFG_FAT_H
00041 #define CFG_FAT_H
00042
00049 #define FAT_LOG_LEVEL      LOG_LVL_ERR
00050
00057 #define FAT_LOG_FORMAT     LOG_FMT_VERBOSE
00058
00059
00064 #define CONFIG_FAT_WORD_ACCESS   0
00065 #define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS
00066
00071 #define CONFIG_FAT_FS_READONLY   0
00072 #define _FS_READONLY CONFIG_FAT_FS_READONLY
00073
00078 #define CONFIG_FAT_FS_MINIMIZE 0
00079 #define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE
00080
00085 #define CONFIG_FAT_FS_TINY 1
00086 #define _FS_TINY CONFIG_FAT_FS_TINY
00087
00093 #define CONFIG_FAT_USE_STRFUNC 0
00094 #define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC
00095
00100 #define CONFIG_FAT_USE_MKFS 0
00101 #define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY)
00102
00107 #define CONFIG_FAT_USE_FORWARD 0
00108 #define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY)
00109
00114 #define CONFIG_FAT_DRIVES 1
00115 #define _DRIVES CONFIG_FAT_DRIVES
00116
00122 #define CONFIG_FAT_MAX_SS 512
00123 #define _MAX_SS CONFIG_FAT_MAX_SS
00124
00132 #define CONFIG_FAT_MULTI_PARTITION 0
00133 #define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION
00134
00139 #define CONFIG_FAT_CODE_PAGE 850
00140 #define _CODE_PAGE CONFIG_FAT_CODE_PAGE
00141
00146 #define CONFIG_FAT_USE_LFN 0
00147 #define _USE_LFN CONFIG_FAT_USE_LFN
00148
00153 #define CONFIG_FAT_MAX_LFN 255
00154 #define _MAX_LFN CONFIG_FAT_MAX_LFN
00155
00156 #endif /* CFG_FAT_H */


BeRTOS: cfg_flash25.h File Reference

  • cfg
Defines
cfg_flash25.h File Reference

Configuration file for flash25 module. More...

Go to the source code of this file.

Defines

#define CONFIG_FLASH25 FLASH25_AT25F2048
Eeprom memory type.

Detailed Description

Configuration file for flash25 module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_flash25.h.


BeRTOS: cfg_flash25.h Source File

  • cfg
cfg_flash25.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_FLASH25_H
00040 #define CFG_FLASH25_H
00041
00048 #define CONFIG_FLASH25 FLASH25_AT25F2048
00049
00050 #endif /* CFG_FALSH25_H */
00051


BeRTOS: cfg_formatwr.h File Reference

  • cfg
Defines
cfg_formatwr.h File Reference

Configuration file for formatted write module. More...

Go to the source code of this file.

Defines

#define | CONFIG_PRINTF PRINTF_FULL
printf()-style formatter configuration.
#define | CONFIG_FRMWRI_BUFSIZE 134
Size of buffer to format "%" sequences in printf.

Detailed Description

Configuration file for formatted write module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_formatwr.h.

Define Documentation

#define CONFIG_FRMWRI_BUFSIZE 134

Size of buffer to format "%" sequences in printf.

Warning: no check on buffer size is done when formatting, be careful especially with big numbers and f formatting.

Definition at line 62 of file cfg_formatwr.h.

#define CONFIG_PRINTF PRINTF_FULL

printf()-style formatter configuration.

See also:
PRINTF_DISABLED
PRINTF_NOMODIFIERS
PRINTF_REDUCED
PRINTF_NOFLOAT
PRINTF_FULL

Definition at line 51 of file cfg_formatwr.h.


BeRTOS: cfg_formatwr.h Source File

  • cfg
cfg_formatwr.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_FORMATWR_H
00039 #define CFG_FORMATWR_H
00040
00051 #define CONFIG_PRINTF PRINTF_FULL
00052
00062 #define CONFIG_FRMWRI_BUFSIZE  134
00063
00064 #endif /* CFG_FORMATWR_H */
00065


BeRTOS: cfg_gfx.h File Reference

  • cfg
Defines
cfg_gfx.h File Reference

Configuration file for GFX module. More...

Go to the source code of this file.

Defines

#define | CONFIG_GFX_CLIPPING 1
Enable line clipping algorithm.
#define | CONFIG_GFX_TEXT 1
Enable text rendering in bitmaps.
#define | CONFIG_GFX_VCOORDS 1
Enable virtual coordinate system.
#define | CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB
Select bitmap pixel format.

Detailed Description

Configuration file for GFX module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_gfx.h.


BeRTOS: cfg_gfx.h Source File

  • cfg
cfg_gfx.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_GFX_H
00039 #define CFG_GFX_H
00040
00045 #define CONFIG_GFX_CLIPPING  1
00046
00051 #define CONFIG_GFX_TEXT  1
00052
00057 #define CONFIG_GFX_VCOORDS  1
00058
00064 #define CONFIG_BITMAP_FMT  BITMAP_FMT_PLANAR_V_LSB
00065
00066 #endif /* CFG_GFX_H */
00067


BeRTOS: cfg_hashtable.h File Reference

  • cfg
Defines
cfg_hashtable.h File Reference

Configuration file for hashtable module. More...

Go to the source code of this file.

Defines

#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1
Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data.

Detailed Description

Configuration file for hashtable module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_hashtable.h.


BeRTOS: cfg_hashtable.h Source File

  • cfg
cfg_hashtable.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_HASHTABLE_H
00039 #define CFG_HASHTABLE_H
00040
00046 #define CONFIG_HT_OPTIONAL_INTERNAL_KEY      1
00047
00048 #endif /* CFG_HASHTABLE_H */
00049
00050
00051


BeRTOS: cfg_heap.h File Reference

  • cfg
Defines
cfg_heap.h File Reference

Configuration file for heap module. More...

Go to the source code of this file.

Defines

#define CONFIG_HEAP_MALLOC 1
Enable malloc/free like API.

Detailed Description

Configuration file for heap module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_heap.h.


BeRTOS: cfg_heap.h Source File

  • cfg
cfg_heap.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_HEAP_H
00040 #define CFG_HEAP_H
00041
00046 #define CONFIG_HEAP_MALLOC     1
00047
00048 #endif /* CFG_HEAP_H */
00049
00050


BeRTOS: cfg_i2c.h File Reference

  • cfg
Defines
cfg_i2c.h File Reference

Configuration file for I2C module. More...

Go to the source code of this file.

Defines

#define | CONFIG_I2C_FREQ 100000UL
Comunication frequency.
#define | CONFIG_I2C_START_TIMEOUT 100
I2C start timeout.
#define | CONFIG_I2C_DISABLE_OLD_API 0
Check this to disable I2c deprecated API support.
#define | I2C_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | I2C_LOG_FORMAT LOG_FMT_TERSE
module logging format.

Detailed Description

Configuration file for I2C module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_i2c.h.

Define Documentation

#define CONFIG_I2C_START_TIMEOUT 100

I2C start timeout.

For how many milliseconds the i2c_start should try to get an ACK before returning error.

Definition at line 56 of file cfg_i2c.h.


BeRTOS: cfg_i2c.h Source File

  • cfg
cfg_i2c.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_I2C_H
00039 #define CFG_I2C_H
00040
00046 #define CONFIG_I2C_FREQ  100000UL
00047
00056 #define CONFIG_I2C_START_TIMEOUT 100
00057
00063 #define CONFIG_I2C_DISABLE_OLD_API   0
00064
00071 #define I2C_LOG_LEVEL      LOG_LVL_INFO
00072
00079 #define I2C_LOG_FORMAT     LOG_FMT_TERSE
00080
00081 #endif /* CFG_I2C_H */
00082
00083


BeRTOS: cfg_i2s.h File Reference

  • cfg
Defines
cfg_i2s.h File Reference

Configuration file for I2S module. More...

Go to the source code of this file.

Defines

#define | CONFIG_PLAY_BUF_LEN 8192
Length of each play buffer.
#define | CONFIG_SAMPLE_FREQ 44100UL
Sampling frequency of the audio file.
#define | I2S_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | I2S_LOG_FORMAT LOG_FMT_TERSE
Module logging format.

Detailed Description

Configuration file for I2S module.

Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file cfg_i2s.h.


BeRTOS: cfg_i2s.h Source File

  • cfg
cfg_i2s.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_I2S_H
00040 #define CFG_I2S_H
00041
00047 #define CONFIG_PLAY_BUF_LEN    8192
00048
00056 #define CONFIG_SAMPLE_FREQ     44100UL
00057
00064 #define I2S_LOG_LEVEL      LOG_LVL_INFO
00065
00072 #define I2S_LOG_FORMAT     LOG_FMT_TERSE
00073
00074 #endif /* CFG_I2S_H */


BeRTOS: cfg_ini_reader.h File Reference

  • cfg
Defines
cfg_ini_reader.h File Reference

Configuration file for ini reader module. More...

Go to the source code of this file.

Defines

#define CONFIG_INI_MAX_LINE_LEN 64
Maximum ini file line length (chars).

Detailed Description

Configuration file for ini reader module.

Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file cfg_ini_reader.h.


BeRTOS: cfg_ini_reader.h Source File

  • cfg
cfg_ini_reader.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_INI_READER_H
00040 #define CFG_INI_READER_H
00041
00046 #define CONFIG_INI_MAX_LINE_LEN 64
00047
00048 #endif /* CFG_INI_READER_H */


BeRTOS: cfg_kbd.h File Reference

  • cfg
Defines
cfg_kbd.h File Reference

Configuration file for keyboard module. More...

Go to the source code of this file.

Defines

#define | CONFIG_KBD_POLL KBD_POLL_SOFTINT
Keyboard polling method.
#define | CONFIG_KBD_OBSERVER 0
Enable keyboard event delivery to observers.
#define | CONFIG_KBD_BEEP 0
Enable key beeps.
#define | CONFIG_KBD_LONGPRESS 0
Enable long pression handler for keys.
#define | CONFIG_KBD_SCHED 0
Enable calling poor man's scheduler to be called inside kbd_peek.

Detailed Description

Configuration file for keyboard module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_kbd.h.


BeRTOS: cfg_kbd.h Source File

  • cfg
cfg_kbd.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_KBD_H
00040 #define CFG_KBD_H
00041
00043 #define CONFIG_KBD_POLL  KBD_POLL_SOFTINT
00044
00046 #define CONFIG_KBD_OBSERVER  0
00047
00049 #define CONFIG_KBD_BEEP  0
00050
00052 #define CONFIG_KBD_LONGPRESS  0
00053
00055 #define CONFIG_KBD_SCHED 0
00056
00057 #endif /* CFG_KBD_H */
00058


BeRTOS: cfg_kern.h File Reference

  • cfg
Defines
cfg_kern.h File Reference

Kernel configuration parameters (deprecated) More...

#include "cfg_proc.h"
#include "cfg_sem.h"
#include "cfg_signal.h"
#include "cfg_monitor.h"

Go to the source code of this file.

Defines

#define CONFIG_KERN_SCHED CONFIG_KERN
Left for backwards compatibility.

Detailed Description

Kernel configuration parameters (deprecated)

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file cfg_kern.h.

Define Documentation

#define CONFIG_KERN_SCHED CONFIG_KERN

Left for backwards compatibility.

Do not use this anymore, will be deprecated soon.

Definition at line 52 of file cfg_kern.h.


BeRTOS: cfg_kern.h Source File

  • cfg
cfg_kern.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_KERN_H
00039 #define CFG_KERN_H
00040
00041 #warning This file is deprecated, you should use the correct combination of cfg_proc.h, cfg_sem.h, cfg_signal.h and cfg_monitor.h
00042 #include "cfg_proc.h"
00043 #include "cfg_sem.h"
00044 #include "cfg_signal.h"
00045 #include "cfg_monitor.h"
00046
00047
00052 #define CONFIG_KERN_SCHED CONFIG_KERN
00053
00054 #endif /*  CFG_KERN_H */


BeRTOS: cfg_keytag.h File Reference

  • cfg
Defines
cfg_keytag.h File Reference

Configuration file for keytag module. More...

Go to the source code of this file.

Defines

#define | CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR
Module logging level.
#define | CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE
Module logging format.
#define | CONFIG_TAG_MAX_LEN 14U
Max buffer lenght.

Detailed Description

Configuration file for keytag module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_keytag.h.

Define Documentation

#define CONFIG_TAG_MAX_LEN 14U

Max buffer lenght.

Definition at line 58 of file cfg_keytag.h.


BeRTOS: cfg_keytag.h Source File

  • cfg
cfg_keytag.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_KEYTAG_H
00039 #define CFG_KEYTAG_H
00040
00046 #define CONFIG_KEYTAG_LOG_LEVEL        LOG_LVL_ERR
00047
00052 #define CONFIG_KEYTAG_LOG_FORMAT       LOG_FMT_TERSE
00053
00058 #define CONFIG_TAG_MAX_LEN 14U
00059
00060 #endif /* CFG_KEYTAG_H */
00061


BeRTOS: cfg_kfile.h File Reference

  • cfg
Defines
cfg_kfile.h File Reference

Configuration file for KFile interface module. More...

Go to the source code of this file.

Defines

#define | KFILE_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | KFILE_LOG_FORMAT LOG_FMT_TERSE
Module logging format.
#define | CONFIG_KFILE_GETS 0
Enable the gets function with echo.

Detailed Description

Configuration file for KFile interface module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_kfile.h.


BeRTOS: cfg_kfile.h Source File

  • cfg
cfg_kfile.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_KFILE_H
00039 #define CFG_KFILE_H
00040
00046 #define KFILE_LOG_LEVEL        LOG_LVL_INFO
00047
00053 #define KFILE_LOG_FORMAT       LOG_FMT_TERSE
00054
00059 #define CONFIG_KFILE_GETS      0
00060
00061 #endif /* CFG_KFILE_H */


BeRTOS: cfg_lcd_32122a.h File Reference

  • cfg
Defines
cfg_lcd_32122a.h File Reference

Displaytech 32122A LCD driver configuration file. More...

Go to the source code of this file.

Defines

#define | CONFIG_LCD_SOFTINT_REFRESH 0
Enable soft interrupt to refresh the LCD.
#define | CONFIG_LCD_WAIT 0
Enable wait macro when display is busy.
#define | CONFIG_LCD_REFRESH 100
Display refresh time 32122a.

Detailed Description

Displaytech 32122A LCD driver configuration file.

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file cfg_lcd_32122a.h.


BeRTOS: cfg_lcd_32122a.h Source File

  • cfg
cfg_lcd_32122a.h
Go to the documentation of this file.
00001
00040 #ifndef CFG_LCD_32122A_H
00041 #define CFG_LCD_32122A_H
00042
00047 #define CONFIG_LCD_SOFTINT_REFRESH     0
00048
00053 #define CONFIG_LCD_WAIT                0
00054
00060 #define CONFIG_LCD_REFRESH           100
00061
00062 #endif /* CFG_LCD_32122A_H */
00063


BeRTOS: cfg_lcd_hd44.h File Reference

  • cfg
Defines
cfg_lcd_hd44.h File Reference

Configuration file for lcd display module. More...

Go to the source code of this file.

Defines

#define | CONFIG_LCD_4BIT 0
Use 4 bit addressing mode.
#define | CONFIG_LCD_ADDRESS_FAST 1
Use a table to speed up LCD memory addressing.
#define | CONFIG_LCD_COLS LCD_HD44_COLS_16
Number of columns in LCD display.
#define | CONFIG_LCD_ROWS LCD_HD44_ROWS_2
Number of rows in LCD display.

Detailed Description

Configuration file for lcd display module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_lcd_hd44.h.

Define Documentation

#define CONFIG_LCD_ADDRESS_FAST 1

Use a table to speed up LCD memory addressing.

This will use about 100 bytes of RAM.

Definition at line 52 of file cfg_lcd_hd44.h.


BeRTOS: cfg_lcd_hd44.h Source File

  • cfg
cfg_lcd_hd44.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_LCD_H
00039 #define CFG_LCD_H
00040
00045 #define CONFIG_LCD_4BIT            0
00046
00052 #define CONFIG_LCD_ADDRESS_FAST    1
00053
00059 #define CONFIG_LCD_COLS LCD_HD44_COLS_16
00060
00066 #define CONFIG_LCD_ROWS LCD_HD44_ROWS_2
00067
00068 #endif /* CFG_LCD_H */
00069


BeRTOS: cfg_led_7seg.h File Reference

  • cfg
Defines
cfg_led_7seg.h File Reference

Configuration file for led 7 segment display. More...

Go to the source code of this file.

Defines

#define | CONFIG_LED_7SEG_CCAT 0
Use a Common Cathode display.
#define | CONFIG_LED_7SEG_DIGIT 4
Number of digit present in the LED display.
#define | CONFIG_LED_7SEG_STRLEN 255
Max lenght of the string to be displayed.
#define | CONFIG_LED_7SEG_SSPEED 10
Default scrolling speed (ms * CONFIG_LED_7SEG_RTIME).
#define | CONFIG_LED_7SEG_RTIME 5
Default refresh time (ms).

Detailed Description

Configuration file for led 7 segment display.

Author:
Fabio Bizzi <fbizzi@bizzi.org>

Definition in file cfg_led_7seg.h.


BeRTOS: cfg_led_7seg.h Source File

  • cfg
cfg_led_7seg.h
Go to the documentation of this file.
00001
00041 #ifndef CFG_LED_7SEG_H
00042 #define CFG_LED_7SEG_H
00043
00048 #define CONFIG_LED_7SEG_CCAT       0
00049
00056 #define CONFIG_LED_7SEG_DIGIT      4
00057
00064 #define CONFIG_LED_7SEG_STRLEN     255
00065
00070 #define CONFIG_LED_7SEG_SSPEED      10
00071
00076 #define CONFIG_LED_7SEG_RTIME      5
00077
00078 #endif /* CFG_LED_7SEG_H */
00079  //defgroup drivers
00080


BeRTOS: cfg_lm75.h File Reference

  • cfg
Defines
cfg_lm75.h File Reference

Configuration file for the LM75 sensor temperature. More...

Go to the source code of this file.

Defines

#define | LM75_LOG_LEVEL LOG_LVL_WARN
Module logging level.
#define | LM75_LOG_FORMAT LOG_FMT_TERSE
Module logging format.

Detailed Description

Configuration file for the LM75 sensor temperature.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_lm75.h.


BeRTOS: cfg_lm75.h Source File

  • cfg
cfg_lm75.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_LM75_H
00039 #define CFG_LM75_H
00040
00047 #define LM75_LOG_LEVEL      LOG_LVL_WARN
00048
00055 #define LM75_LOG_FORMAT     LOG_FMT_TERSE
00056
00057 #endif /* CFG_AX25_H */


BeRTOS: cfg_lwip.h File Reference

  • cfg
Defines
cfg_lwip.h File Reference

Configuration file for the lwIP TCP/IP stack module. More...

Go to the source code of this file.

Defines

#define | SYS_LIGHTWEIGHT_PROT 1
SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection for certain critical regions during buffer allocation, deallocation and memory allocation and deallocation.
#define | NO_SYS 0
NO_SYS==1: Provides VERY minimal functionality.
#define | MEMCPY(dst, src, len) memcpy(dst,src,len)
MEMCPY: override this if you have a faster implementation at hand than the one included in your C library.
#define | SMEMCPY(dst, src, len) memcpy(dst,src,len)
SMEMCPY: override this with care! Some compilers (e.g.
#define | MEM_LIBC_MALLOC 0
MEM_LIBC_MALLOC==1: Use malloc/free/realloc provided by your C-library instead of the lwip internal allocator.
#define | MEMP_MEM_MALLOC 0
Use mem_malloc/mem_free instead of the lwip pool allocator.
#define | MEM_ALIGNMENT 4
MEM_ALIGNMENT: should be set to the alignment of the CPU.
#define | MEM_SIZE 1600
The size of the lwIP heap memory.
#define | MEMP_OVERFLOW_CHECK 0
Dynamic pool memory overflow protection check level.
#define | MEMP_SANITY_CHECK 0
Run a sanity check after each memp_free().
#define | MEM_USE_POOLS 0
MEM_USE_POOLS==1: Use an alternative to malloc() by allocating from a set of memory pools of various sizes.
#define | MEM_USE_POOLS_TRY_BIGGER_POOL 0
MEM_USE_POOLS_TRY_BIGGER_POOL==1: if one malloc-pool is empty, try the next bigger pool - WARNING: THIS MIGHT WASTE MEMORY but it can make a system more reliable.
#define | MEMP_USE_CUSTOM_POOLS 0
MEMP_USE_CUSTOM_POOLS==1: whether to include a user file lwippools.h that defines additional pools beyond the "standard" ones required by lwIP.
#define | LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT 0
Set this to 1 if you want to free PBUF_RAM pbufs (or call mem_free()) from interrupt context (or another context that doesn't allow waiting for a semaphore).
#define | MEMP_NUM_PBUF 16
MEMP_NUM_PBUF: the number of memp struct pbufs (used for PBUF_ROM and PBUF_REF).
#define | MEMP_NUM_RAW_PCB 4
MEMP_NUM_RAW_PCB: Number of raw connection PCBs (requires the LWIP_RAW option)
#define | MEMP_NUM_UDP_PCB 4
MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks.
#define | MEMP_NUM_TCP_PCB 5
MEMP_NUM_TCP_PCB: the number of simulatenously active TCP connections.
#define | MEMP_NUM_TCP_PCB_LISTEN 8
MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP connections.
#define | MEMP_NUM_TCP_SEG 16
MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP segments.
#define | MEMP_NUM_REASSDATA 5
MEMP_NUM_REASSDATA: the number of simultaneously IP packets queued for reassembly (whole packets, not fragments!)
#define | MEMP_NUM_ARP_QUEUE 30
MEMP_NUM_ARP_QUEUE: the number of simulateously queued outgoing packets (pbufs) that are waiting for an ARP request (to resolve their destination address) to finish.
#define | MEMP_NUM_IGMP_GROUP 8
MEMP_NUM_IGMP_GROUP: The number of multicast groups whose network interfaces can be members et the same time (one per netif - allsystems group -, plus one per netif membership).
#define | MEMP_NUM_SYS_TIMEOUT 8
MEMP_NUM_SYS_TIMEOUT: the number of simulateously active timeouts.
#define | MEMP_NUM_NETBUF 2
MEMP_NUM_NETBUF: the number of struct netbufs.
#define | MEMP_NUM_NETCONN 4
MEMP_NUM_NETCONN: the number of struct netconns.
#define | MEMP_NUM_TCPIP_MSG_API 8
MEMP_NUM_TCPIP_MSG_API: the number of struct tcpip_msg, which are used for callback/timeout API communication.
#define | MEMP_NUM_TCPIP_MSG_INPKT 8
MEMP_NUM_TCPIP_MSG_INPKT: the number of struct tcpip_msg, which are used for incoming packets.
#define | PBUF_POOL_SIZE 16
PBUF_POOL_SIZE: the number of buffers in the pbuf pool.
#define | LWIP_ARP 1
LWIP_ARP==1: Enable ARP functionality.
#define | ARP_TABLE_SIZE 10
ARP_TABLE_SIZE: Number of active MAC-IP address pairs cached.
#define | ARP_QUEUEING 1
ARP_QUEUEING==1: Outgoing packets are queued during hardware address resolution.
#define | ETHARP_TRUST_IP_MAC 1
ETHARP_TRUST_IP_MAC==1: Incoming IP packets cause the ARP table to be updated with the source MAC and IP addresses supplied in the packet.
#define | ETHARP_SUPPORT_VLAN 0
ETHARP_SUPPORT_VLAN==1: support receiving ethernet packets with VLAN header.
#define | IP_FORWARD 0
IP_FORWARD==1: Enables the ability to forward IP packets across network interfaces.
#define | IP_OPTIONS_ALLOWED 1
IP_OPTIONS_ALLOWED: Defines the behavior for IP options.
#define | IP_REASSEMBLY 1
Reassemble incoming fragmented IP packets.
#define | IP_FRAG 1
Fragment outgoing IP packets if their size exceeds MTU.
#define | IP_REASS_MAXAGE 3
IP_REASS_MAXAGE: Maximum time (in multiples of IP_TMR_INTERVAL - so seconds, normally) a fragmented IP packet waits for all fragments to arrive.
#define | IP_REASS_MAX_PBUFS 10
IP_REASS_MAX_PBUFS: Total maximum amount of pbufs waiting to be reassembled.
#define | IP_FRAG_USES_STATIC_BUF 1
IP_FRAG_USES_STATIC_BUF==1: Use a static MTU-sized buffer for IP fragmentation.
#define | IP_FRAG_MAX_MTU 1500
IP_FRAG_MAX_MTU: Assumed max MTU on any interface for IP frag buffer (requires IP_FRAG_USES_STATIC_BUF==1)
#define | IP_DEFAULT_TTL 255
IP_DEFAULT_TTL: Default value for Time-To-Live used by transport layers.
#define | IP_SOF_BROADCAST 0
IP_SOF_BROADCAST=1: Use the SOF_BROADCAST field to enable broadcast filter per pcb on udp and raw send operations.
#define | IP_SOF_BROADCAST_RECV 0
IP_SOF_BROADCAST_RECV (requires IP_SOF_BROADCAST=1) enable the broadcast filter on recv operations.
#define | LWIP_ICMP 1
Enable ICMP module inside the IP stack.
#define | ICMP_TTL (IP_DEFAULT_TTL)
ICMP_TTL: Default value for Time-To-Live used by ICMP packets.
#define | LWIP_BROADCAST_PING 0
LWIP_BROADCAST_PING==1: respond to broadcast pings (default is unicast only)
#define | LWIP_MULTICAST_PING 0
LWIP_MULTICAST_PING==1: respond to multicast pings (default is unicast only)
#define | LWIP_RAW 1
Enable application layer to hook into the IP layer itself.
#define | RAW_TTL (IP_DEFAULT_TTL)
LWIP_RAW==1: Enable application layer to hook into the IP layer itself.
#define | LWIP_DHCP 1
Enable DHCP module.
#define | DHCP_DOES_ARP_CHECK ((LWIP_DHCP) && (LWIP_ARP))
DHCP_DOES_ARP_CHECK==1: Do an ARP check on the offered address.
#define | LWIP_AUTOIP 0
LWIP_AUTOIP==1: Enable AUTOIP module.
#define | LWIP_DHCP_AUTOIP_COOP 0
LWIP_DHCP_AUTOIP_COOP==1: Allow DHCP and AUTOIP to be both enabled on the same interface at the same time.
#define | LWIP_DHCP_AUTOIP_COOP_TRIES 9
LWIP_DHCP_AUTOIP_COOP_TRIES: Set to the number of DHCP DISCOVER probes that should be sent before falling back on AUTOIP.
#define | LWIP_SNMP 0
Turn on SNMP module.
#define | SNMP_CONCURRENT_REQUESTS 1
SNMP_CONCURRENT_REQUESTS: Number of concurrent requests the module will allow.
#define | SNMP_TRAP_DESTINATIONS 1
SNMP_TRAP_DESTINATIONS: Number of trap destinations.
#define | SNMP_PRIVATE_MIB 0
SNMP_PRIVATE_MIB:
#define | SNMP_SAFE_REQUESTS 1
Only allow SNMP write actions that are 'safe' (e.g.
#define | LWIP_IGMP 0
Turn on IGMP module.
#define | LWIP_DNS 0
Turn on DNS module.
#define | DNS_TABLE_SIZE 4
DNS maximum number of entries to maintain locally.
#define | DNS_MAX_NAME_LENGTH 256
DNS maximum host name length supported in the name table.
#define | DNS_MAX_SERVERS 2
The maximum of DNS servers.
#define | DNS_DOES_NAME_CHECK 1
DNS do a name checking between the query and the response.
#define | DNS_USES_STATIC_BUF 1
DNS use a local buffer if DNS_USES_STATIC_BUF=0, a static one if DNS_USES_STATIC_BUF=1, or a dynamic one if DNS_USES_STATIC_BUF=2.
#define | DNS_MSG_SIZE 512
DNS message max.
#define | DNS_LOCAL_HOSTLIST 0
DNS_LOCAL_HOSTLIST: Implements a local host-to-address list.
#define | DNS_LOCAL_HOSTLIST_IS_DYNAMIC 0
If this is turned on, the local host-list can be dynamically changed at runtime.
#define | LWIP_UDP 1
Turn on UDP.
#define | LWIP_UDPLITE 0
LWIP_UDPLITE==1: Turn on UDP-Lite.
#define | UDP_TTL (IP_DEFAULT_TTL)
UDP_TTL: Default Time-To-Live value.
#define | LWIP_NETBUF_RECVINFO 0
LWIP_NETBUF_RECVINFO==1: append destination addr and port to every netbuf.
#define | LWIP_TCP 1
Turn on TCP.
#define | TCP_TTL (IP_DEFAULT_TTL)
TCP_TTL: Default Time-To-Live value.
#define | TCP_WND (4 * TCP_MSS)
TCP_WND: The size of a TCP window.
#define | TCP_MAXRTX 12
TCP_MAXRTX: Maximum number of retransmissions of data segments.
#define | TCP_SYNMAXRTX 6
TCP_SYNMAXRTX: Maximum number of retransmissions of SYN segments.
#define | TCP_QUEUE_OOSEQ (LWIP_TCP)
TCP_QUEUE_OOSEQ==1: TCP will queue segments that arrive out of order.
#define | TCP_MSS 536
TCP_MSS: TCP Maximum segment size.
#define | TCP_CALCULATE_EFF_SEND_MSS 1
TCP_CALCULATE_EFF_SEND_MSS: "The maximum size of a segment that TCP really sends, the 'effective send MSS,' MUST be the smaller of the send MSS (which reflects the available reassembly buffer size at the remote host) and the largest size permitted by the IP layer" (RFC 1122) Setting this to 1 enables code that checks TCP_MSS against the MTU of the netif used for a connection and limits the MSS if it would be too big otherwise.
#define | TCP_SND_BUF (2 * TCP_MSS)
TCP_SND_BUF: TCP sender buffer space (bytes).
#define | TCP_SND_QUEUELEN (4 * (TCP_SND_BUF)/(TCP_MSS))
TCP_SND_QUEUELEN: TCP sender buffer space (pbufs).
#define | TCP_SNDLOWAT ((TCP_SND_BUF)/2)
TCP_SNDLOWAT: TCP writable space (bytes).
#define | TCP_LISTEN_BACKLOG 0
TCP_LISTEN_BACKLOG: Enable the backlog option for tcp listen pcb.
#define | TCP_DEFAULT_LISTEN_BACKLOG 0xff
The maximum allowed backlog for TCP listen netconns.
#define | LWIP_TCP_TIMESTAMPS 0
LWIP_TCP_TIMESTAMPS==1: support the TCP timestamp option.
#define | TCP_WND_UPDATE_THRESHOLD (TCP_WND / 4)
TCP_WND_UPDATE_THRESHOLD: difference in window to trigger an explicit window update.
#define | PBUF_LINK_HLEN 14
PBUF_LINK_HLEN: the number of bytes that should be allocated for a link level header.
#define | PBUF_POOL_BUFSIZE LWIP_MEM_ALIGN_SIZE(TCP_MSS+40+PBUF_LINK_HLEN)
PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool.
#define | LWIP_NETIF_HOSTNAME 1
Use DHCP_OPTION_HOSTNAME with netif's hostname field.
#define | LWIP_NETIF_API 0
Support netif api (in netifapi.c)
#define | LWIP_NETIF_STATUS_CALLBACK 0
LWIP_NETIF_STATUS_CALLBACK==1: Support a callback function whenever an interface changes its up/down status (i.e., due to DHCP IP acquistion)
#define | LWIP_NETIF_LINK_CALLBACK 0
LWIP_NETIF_LINK_CALLBACK==1: Support a callback function from an interface whenever the link changes (i.e., link down)
#define | LWIP_NETIF_HWADDRHINT 0
LWIP_NETIF_HWADDRHINT==1: Cache link-layer-address hints (e.g.
#define | LWIP_NETIF_LOOPBACK 0
LWIP_NETIF_LOOPBACK==1: Support sending packets with a destination IP address equal to the netif IP address, looping them back up the stack.
#define | LWIP_LOOPBACK_MAX_PBUFS 0
LWIP_LOOPBACK_MAX_PBUFS: Maximum number of pbufs on queue for loopback sending for each netif (0 = disabled)
#define | LWIP_NETIF_LOOPBACK_MULTITHREADING (!NO_SYS)
LWIP_NETIF_LOOPBACK_MULTITHREADING: Indicates whether threading is enabled in the system, as netifs must change how they behave depending on this setting for the LWIP_NETIF_LOOPBACK option to work.
#define | LWIP_NETIF_TX_SINGLE_PBUF 0
LWIP_NETIF_TX_SINGLE_PBUF: if this is set to 1, lwIP tries to put all data to be sent into one single pbuf.
#define | LWIP_HAVE_LOOPIF 0
Support loop interface (127.0.0.1) and loopif.c.
#define | LWIP_HAVE_SLIPIF 0
Support slip interface and slipif.c.
#define | TCPIP_THREAD_NAME "tcpip_thread"
TCPIP_THREAD_NAME: The name assigned to the main tcpip thread.
#define | TCPIP_THREAD_STACKSIZE (KERN_MINSTACKSIZE * 3)
TCPIP_THREAD_STACKSIZE: The stack size used by the main tcpip thread.
#define | TCPIP_THREAD_PRIO 0
TCPIP_THREAD_PRIO: The priority assigned to the main tcpip thread.
#define | TCPIP_MBOX_SIZE 0
TCPIP_MBOX_SIZE: The mailbox size for the tcpip thread messages The queue size value itself is platform-dependent, but is passed to sys_mbox_new() when tcpip_init is called.
#define | SLIPIF_THREAD_NAME "slipif_loop"
SLIPIF_THREAD_NAME: The name assigned to the slipif_loop thread.
#define | SLIPIF_THREAD_STACKSIZE 0
SLIP_THREAD_STACKSIZE: The stack size used by the slipif_loop thread.
#define | SLIPIF_THREAD_PRIO 1
SLIPIF_THREAD_PRIO: The priority assigned to the slipif_loop thread.
#define | PPP_THREAD_NAME "pppMain"
PPP_THREAD_NAME: The name assigned to the pppMain thread.
#define | PPP_THREAD_STACKSIZE 0
PPP_THREAD_STACKSIZE: The stack size used by the pppMain thread.
#define | PPP_THREAD_PRIO 1
PPP_THREAD_PRIO: The priority assigned to the pppMain thread.
#define | DEFAULT_THREAD_NAME "lwIP"
DEFAULT_THREAD_NAME: The name assigned to any other lwIP thread.
#define | DEFAULT_THREAD_STACKSIZE (KERN_MINSTACKSIZE * 3)
DEFAULT_THREAD_STACKSIZE: The stack size used by any other lwIP thread.
#define | DEFAULT_THREAD_PRIO 1
DEFAULT_THREAD_PRIO: The priority assigned to any other lwIP thread.
#define | DEFAULT_RAW_RECVMBOX_SIZE 0
DEFAULT_RAW_RECVMBOX_SIZE: The mailbox size for the incoming packets on a NETCONN_RAW.
#define | DEFAULT_UDP_RECVMBOX_SIZE 0
DEFAULT_UDP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a NETCONN_UDP.
#define | DEFAULT_TCP_RECVMBOX_SIZE 0
DEFAULT_TCP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a NETCONN_TCP.
#define | DEFAULT_ACCEPTMBOX_SIZE 0
DEFAULT_ACCEPTMBOX_SIZE: The mailbox size for the incoming connections.
#define | LWIP_TCPIP_CORE_LOCKING 0
LWIP_TCPIP_CORE_LOCKING: (EXPERIMENTAL!) Don't use it if you're not an active lwIP project member.
#define | LWIP_NETCONN 1
Enable Netconn API (require to use api_lib.c)
#define | LWIP_SOCKET 1
Enable Socket API (require to use sockets.c)
#define | LWIP_COMPAT_SOCKETS 0
Enable BSD-style sockets functions names.
#define | LWIP_POSIX_SOCKETS_IO_NAMES 0
LWIP_POSIX_SOCKETS_IO_NAMES==1: Enable POSIX-style sockets functions names.
#define | LWIP_TCP_KEEPALIVE 0
LWIP_TCP_KEEPALIVE==1: Enable TCP_KEEPIDLE, TCP_KEEPINTVL and TCP_KEEPCNT options processing.
#define | LWIP_SO_RCVTIMEO 0
LWIP_SO_RCVTIMEO==1: Enable SO_RCVTIMEO processing.
#define | LWIP_SO_RCVBUF 0
LWIP_SO_RCVBUF==1: Enable SO_RCVBUF processing.
#define | RECV_BUFSIZE_DEFAULT INT_MAX
If LWIP_SO_RCVBUF is used, this is the default value for recv_bufsize.
#define | SO_REUSE 0
SO_REUSE==1: Enable SO_REUSEADDR and SO_REUSEPORT options.
#define | LWIP_STATS 0
LWIP_STATS==1: Enable statistics collection in lwip_stats.
#define | PPP_SUPPORT 0
Enable PPP.
#define | PPPOE_SUPPORT 0
Enable PPP Over Ethernet.
#define | PPPOS_SUPPORT PPP_SUPPORT
PPPOS_SUPPORT==1: Enable PPP Over Serial.
#define | CHECKSUM_GEN_IP 1
CHECKSUM_GEN_IP==1: Generate checksums in software for outgoing IP packets.
#define | CHECKSUM_GEN_UDP 1
CHECKSUM_GEN_UDP==1: Generate checksums in software for outgoing UDP packets.
#define | CHECKSUM_GEN_TCP 1
CHECKSUM_GEN_TCP==1: Generate checksums in software for outgoing TCP packets.
#define | CHECKSUM_CHECK_IP 1
CHECKSUM_CHECK_IP==1: Check checksums in software for incoming IP packets.
#define | CHECKSUM_CHECK_UDP 1
CHECKSUM_CHECK_UDP==1: Check checksums in software for incoming UDP packets.
#define | CHECKSUM_CHECK_TCP 1
CHECKSUM_CHECK_TCP==1: Check checksums in software for incoming TCP packets.
#define | LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_ALL
LWIP_DBG_MIN_LEVEL: After masking, the value of the debug is compared against this value.
#define | LWIP_DBG_TYPES_ON LWIP_DBG_ON
LWIP_DBG_TYPES_ON: A mask that can be used to globally enable/disable debug messages of certain types.
#define | ETHARP_DEBUG LWIP_DBG_OFF
ETHARP_DEBUG: Enable debugging in etharp.c.
#define | NETIF_DEBUG LWIP_DBG_OFF
NETIF_DEBUG: Enable debugging in netif.c.
#define | PBUF_DEBUG LWIP_DBG_OFF
PBUF_DEBUG: Enable debugging in pbuf.c.
#define | API_LIB_DEBUG LWIP_DBG_OFF
API_LIB_DEBUG: Enable debugging in api_lib.c.
#define | API_MSG_DEBUG LWIP_DBG_OFF
API_MSG_DEBUG: Enable debugging in api_msg.c.
#define | SOCKETS_DEBUG LWIP_DBG_OFF
SOCKETS_DEBUG: Enable debugging in sockets.c.
#define | ICMP_DEBUG LWIP_DBG_OFF
ICMP_DEBUG: Enable debugging in icmp.c.
#define | IGMP_DEBUG LWIP_DBG_OFF
IGMP_DEBUG: Enable debugging in igmp.c.
#define | INET_DEBUG LWIP_DBG_OFF
INET_DEBUG: Enable debugging in inet.c.
#define | IP_DEBUG LWIP_DBG_OFF
IP_DEBUG: Enable debugging for IP.
#define | IP_REASS_DEBUG LWIP_DBG_OFF
IP_REASS_DEBUG: Enable debugging in ip_frag.c for both frag & reass.
#define | RAW_DEBUG LWIP_DBG_OFF
RAW_DEBUG: Enable debugging in raw.c.
#define | MEM_DEBUG LWIP_DBG_OFF
MEM_DEBUG: Enable debugging in mem.c.
#define | MEMP_DEBUG LWIP_DBG_OFF
MEMP_DEBUG: Enable debugging in memp.c.
#define | SYS_DEBUG LWIP_DBG_OFF
SYS_DEBUG: Enable debugging in sys.c.
#define | TCP_DEBUG LWIP_DBG_OFF
TCP_DEBUG: Enable debugging for TCP.
#define | TCP_INPUT_DEBUG LWIP_DBG_OFF
TCP_INPUT_DEBUG: Enable debugging in tcp_in.c for incoming debug.
#define | TCP_FR_DEBUG LWIP_DBG_OFF
TCP_FR_DEBUG: Enable debugging in tcp_in.c for fast retransmit.
#define | TCP_RTO_DEBUG LWIP_DBG_OFF
TCP_RTO_DEBUG: Enable debugging in TCP for retransmit timeout.
#define | TCP_CWND_DEBUG LWIP_DBG_OFF
TCP_CWND_DEBUG: Enable debugging for TCP congestion window.
#define | TCP_WND_DEBUG LWIP_DBG_OFF
TCP_WND_DEBUG: Enable debugging in tcp_in.c for window updating.
#define | TCP_OUTPUT_DEBUG LWIP_DBG_OFF
TCP_OUTPUT_DEBUG: Enable debugging in tcp_out.c output functions.
#define | TCP_RST_DEBUG LWIP_DBG_OFF
TCP_RST_DEBUG: Enable debugging for TCP with the RST message.
#define | TCP_QLEN_DEBUG LWIP_DBG_OFF
TCP_QLEN_DEBUG: Enable debugging for TCP queue lengths.
#define | UDP_DEBUG LWIP_DBG_OFF
UDP_DEBUG: Enable debugging in UDP.
#define | TCPIP_DEBUG LWIP_DBG_OFF
TCPIP_DEBUG: Enable debugging in tcpip.c.
#define | PPP_DEBUG LWIP_DBG_OFF
PPP_DEBUG: Enable debugging for PPP.
#define | SLIP_DEBUG LWIP_DBG_OFF
SLIP_DEBUG: Enable debugging in slipif.c.
#define | DHCP_DEBUG LWIP_DBG_OFF
DHCP_DEBUG: Enable debugging in dhcp.c.
#define | AUTOIP_DEBUG LWIP_DBG_OFF
AUTOIP_DEBUG: Enable debugging in autoip.c.
#define | SNMP_MSG_DEBUG LWIP_DBG_OFF
SNMP_MSG_DEBUG: Enable debugging for SNMP messages.
#define | SNMP_MIB_DEBUG LWIP_DBG_OFF
SNMP_MIB_DEBUG: Enable debugging for SNMP MIBs.
#define | DNS_DEBUG LWIP_DBG_OFF
DNS_DEBUG: Enable debugging for DNS.

Detailed Description

Configuration file for the lwIP TCP/IP stack module.

Author:
Andrea Righi <arighi@develer.com>

Definition in file cfg_lwip.h.

Define Documentation

#define DEFAULT_ACCEPTMBOX_SIZE 0

DEFAULT_ACCEPTMBOX_SIZE: The mailbox size for the incoming connections.

The queue size value itself is platform-dependent, but is passed to sys_mbox_new() when the acceptmbox is created.

Definition at line 1175 of file cfg_lwip.h.

#define DEFAULT_RAW_RECVMBOX_SIZE 0

DEFAULT_RAW_RECVMBOX_SIZE: The mailbox size for the incoming packets on a NETCONN_RAW.

The queue size value itself is platform-dependent, but is passed to sys_mbox_new() when the recvmbox is created.

Definition at line 1148 of file cfg_lwip.h.

#define DEFAULT_TCP_RECVMBOX_SIZE 0

DEFAULT_TCP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a NETCONN_TCP.

The queue size value itself is platform-dependent, but is passed to sys_mbox_new() when the recvmbox is created.

Definition at line 1166 of file cfg_lwip.h.

#define DEFAULT_THREAD_PRIO 1

DEFAULT_THREAD_PRIO: The priority assigned to any other lwIP thread.

The priority value itself is platform-dependent, but is passed to sys_thread_new() when the thread is created.

Definition at line 1139 of file cfg_lwip.h.

#define DEFAULT_THREAD_STACKSIZE (KERN_MINSTACKSIZE * 3)

DEFAULT_THREAD_STACKSIZE: The stack size used by any other lwIP thread.

The stack size value itself is platform-dependent, but is passed to sys_thread_new() when the thread is created.

Definition at line 1130 of file cfg_lwip.h.

#define DEFAULT_UDP_RECVMBOX_SIZE 0

DEFAULT_UDP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a NETCONN_UDP.

The queue size value itself is platform-dependent, but is passed to sys_mbox_new() when the recvmbox is created.

Definition at line 1157 of file cfg_lwip.h.

#define DNS_DOES_NAME_CHECK 1

DNS do a name checking between the query and the response.

Definition at line 689 of file cfg_lwip.h.

#define DNS_LOCAL_HOSTLIST 0

DNS_LOCAL_HOSTLIST: Implements a local host-to-address list.

If enabled, you have to define

    #define DNS_LOCAL_HOSTLIST_INIT {{"host1", 0x123}, {"host2", 0x234}}

(an array of structs name/address, where address is an u32_t in network byte order).

Instead, you can also use an external function:

  #define DNS_LOOKUP_LOCAL_EXTERN(x) extern u32_t my_lookup_function(const char *name)

that returns the IP address or INADDR_NONE if not found.

Definition at line 719 of file cfg_lwip.h.

#define DNS_LOCAL_HOSTLIST_IS_DYNAMIC 0

If this is turned on, the local host-list can be dynamically changed at runtime.

Definition at line 725 of file cfg_lwip.h.

#define DNS_MAX_NAME_LENGTH 256

DNS maximum host name length supported in the name table.

Definition at line 679 of file cfg_lwip.h.

#define DNS_MSG_SIZE 512

DNS message max.

size. Default value is RFC compliant.

Definition at line 701 of file cfg_lwip.h.

#define DNS_TABLE_SIZE 4

DNS maximum number of entries to maintain locally.

Definition at line 674 of file cfg_lwip.h.

#define DNS_USES_STATIC_BUF 1

DNS use a local buffer if DNS_USES_STATIC_BUF=0, a static one if DNS_USES_STATIC_BUF=1, or a dynamic one if DNS_USES_STATIC_BUF=2.

The buffer will be of size DNS_MSG_SIZE

Definition at line 696 of file cfg_lwip.h.

#define ETHARP_SUPPORT_VLAN 0

ETHARP_SUPPORT_VLAN==1: support receiving ethernet packets with VLAN header.

Additionally, you can define ETHARP_VLAN_CHECK to an u16_t VLAN ID to check. If ETHARP_VLAN_CHECK is defined, only VLAN-traffic for this VLAN is accepted. If ETHARP_VLAN_CHECK is not defined, all traffic is accepted.

Definition at line 402 of file cfg_lwip.h.

#define ETHARP_TRUST_IP_MAC 1

ETHARP_TRUST_IP_MAC==1: Incoming IP packets cause the ARP table to be updated with the source MAC and IP addresses supplied in the packet.

You may want to disable this if you do not trust LAN peers to have the correct addresses, or as a limited approach to attempt to handle spoofing. If disabled, lwIP will need to make a new ARP request if the peer is not already in the ARP table, adding a little latency.

Definition at line 392 of file cfg_lwip.h.

#define IP_FORWARD 0

IP_FORWARD==1: Enables the ability to forward IP packets across network interfaces.

If you are going to run lwIP on a device with only one network interface, define this to 0.

Definition at line 416 of file cfg_lwip.h.

#define IP_FRAG_USES_STATIC_BUF 1

IP_FRAG_USES_STATIC_BUF==1: Use a static MTU-sized buffer for IP fragmentation.

Otherwise pbufs are allocated and reference the original packet data to be fragmented.

Definition at line 467 of file cfg_lwip.h.

#define IP_OPTIONS_ALLOWED 1

IP_OPTIONS_ALLOWED: Defines the behavior for IP options.

IP_OPTIONS_ALLOWED==0: All packets with IP options are dropped. IP_OPTIONS_ALLOWED==1: IP options are allowed (but not parsed).

Definition at line 425 of file cfg_lwip.h.

#define IP_REASS_MAX_PBUFS 10

IP_REASS_MAX_PBUFS: Total maximum amount of pbufs waiting to be reassembled.

Since the received pbufs are enqueued, be sure to configure PBUF_POOL_SIZE > IP_REASS_MAX_PBUFS so that the stack is still able to receive packets even if the maximum amount of fragments is enqueued for reassembly!

Definition at line 458 of file cfg_lwip.h.

#define IP_REASS_MAXAGE 3

IP_REASS_MAXAGE: Maximum time (in multiples of IP_TMR_INTERVAL - so seconds, normally) a fragmented IP packet waits for all fragments to arrive.

If not all fragments arrived in this time, the whole packet is discarded.

Definition at line 448 of file cfg_lwip.h.

#define IP_SOF_BROADCAST 0

IP_SOF_BROADCAST=1: Use the SOF_BROADCAST field to enable broadcast filter per pcb on udp and raw send operations.

To enable broadcast filter on recv operations, you also have to set IP_SOF_BROADCAST_RECV=1.

Definition at line 491 of file cfg_lwip.h.

#define LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT 0

Set this to 1 if you want to free PBUF_RAM pbufs (or call mem_free()) from interrupt context (or another context that doesn't allow waiting for a semaphore).

If set to 1, mem_malloc will be protected by a semaphore and SYS_ARCH_PROTECT, while mem_free will only use SYS_ARCH_PROTECT. mem_malloc SYS_ARCH_UNPROTECTs with each loop so that mem_free can run.

ATTENTION: As you can see from the above description, this leads to dis-/ enabling interrupts often, which can be slow! Also, on low memory, mem_malloc can need longer.

If you don't want that, at least for NO_SYS=0, you can still use the following functions to enqueue a deallocation call which then runs in the tcpip_thread context:

  • pbuf_free_callback(p);
  • mem_free_callback(m);

Definition at line 221 of file cfg_lwip.h.

#define LWIP_COMPAT_SOCKETS 0

Enable BSD-style sockets functions names.

NOTE: do not change this!!!

Definition at line 1223 of file cfg_lwip.h.

#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_ALL

LWIP_DBG_MIN_LEVEL: After masking, the value of the debug is compared against this value.

If it is smaller, then debugging messages are written.

Definition at line 1617 of file cfg_lwip.h.

#define LWIP_DHCP 1

Enable DHCP module.

UDP must be also available.

Definition at line 564 of file cfg_lwip.h.

#define LWIP_DHCP_AUTOIP_COOP_TRIES 9

LWIP_DHCP_AUTOIP_COOP_TRIES: Set to the number of DHCP DISCOVER probes that should be sent before falling back on AUTOIP.

This can be set as low as 1 to get an AutoIP address very quickly, but you should be prepared to handle a changing IP address when DHCP overrides AutoIP.

Definition at line 601 of file cfg_lwip.h.

#define LWIP_DNS 0

Turn on DNS module.

UDP must be available for DNS transport.

Definition at line 670 of file cfg_lwip.h.

#define LWIP_HAVE_LOOPIF 0

Support loop interface (127.0.0.1) and loopif.c.

Definition at line 1014 of file cfg_lwip.h.

#define LWIP_HAVE_SLIPIF 0

Support slip interface and slipif.c.

Definition at line 1026 of file cfg_lwip.h.

#define LWIP_NETCONN 1

Enable Netconn API (require to use api_lib.c)

Definition at line 1196 of file cfg_lwip.h.

#define LWIP_NETIF_API 0

Support netif api (in netifapi.c)

Definition at line 929 of file cfg_lwip.h.

#define LWIP_NETIF_HWADDRHINT 0

LWIP_NETIF_HWADDRHINT==1: Cache link-layer-address hints (e.g.

table indices) in struct netif. TCP and UDP can make use of this to prevent scanning the ARP table for every sent packet. While this is faster for big ARP tables or many concurrent connections, it might be counterproductive if you have a tiny ARP table or if there never are concurrent connections.

Definition at line 955 of file cfg_lwip.h.

#define LWIP_NETIF_LOOPBACK_MULTITHREADING (!NO_SYS)

LWIP_NETIF_LOOPBACK_MULTITHREADING: Indicates whether threading is enabled in the system, as netifs must change how they behave depending on this setting for the LWIP_NETIF_LOOPBACK option to work.

Setting this is needed to avoid reentering non-reentrant functions like tcp_input(). LWIP_NETIF_LOOPBACK_MULTITHREADING==1: Indicates that the user is using a multithreaded environment like tcpip.c. In this case, netif->input() is called directly. LWIP_NETIF_LOOPBACK_MULTITHREADING==0: Indicates a polling (or NO_SYS) setup. The packets are put on a list and netif_poll() must be called in the main application loop.

Definition at line 988 of file cfg_lwip.h.

#define LWIP_NETIF_TX_SINGLE_PBUF 0

LWIP_NETIF_TX_SINGLE_PBUF: if this is set to 1, lwIP tries to put all data to be sent into one single pbuf.

This is for compatibility with DMA-enabled MACs that do not support scatter-gather. Beware that this might involve CPU-memcpy before transmitting that would not be needed without this flag! Use this only if you need to!

Definition at line 1001 of file cfg_lwip.h.

#define LWIP_POSIX_SOCKETS_IO_NAMES 0

LWIP_POSIX_SOCKETS_IO_NAMES==1: Enable POSIX-style sockets functions names.

Disable this option if you use a POSIX operating system that uses the same names (read, write & close). (only used if you use sockets.c)

Definition at line 1232 of file cfg_lwip.h.

#define LWIP_SNMP 0

Turn on SNMP module.

UDP must be also available.

Definition at line 614 of file cfg_lwip.h.

#define LWIP_SOCKET 1

Enable Socket API (require to use sockets.c)

Definition at line 1208 of file cfg_lwip.h.

#define LWIP_TCP_KEEPALIVE 0

LWIP_TCP_KEEPALIVE==1: Enable TCP_KEEPIDLE, TCP_KEEPINTVL and TCP_KEEPCNT options processing.

Note that TCP_KEEPIDLE and TCP_KEEPINTVL have to be set in seconds. (does not require sockets.c, and will affect tcp.c)

Definition at line 1241 of file cfg_lwip.h.

#define LWIP_UDPLITE 0

LWIP_UDPLITE==1: Turn on UDP-Lite.

(Requires LWIP_UDP)

Definition at line 744 of file cfg_lwip.h.

#define MEM_ALIGNMENT 4

MEM_ALIGNMENT: should be set to the alignment of the CPU.

 *    4 byte alignment -> #define MEM_ALIGNMENT 4
 *    2 byte alignment -> #define MEM_ALIGNMENT 2
 *

Definition at line 142 of file cfg_lwip.h.

#define MEM_LIBC_MALLOC 0

MEM_LIBC_MALLOC==1: Use malloc/free/realloc provided by your C-library instead of the lwip internal allocator.

Can save code size if you already use it.

Definition at line 122 of file cfg_lwip.h.

#define MEM_SIZE 1600

The size of the lwIP heap memory.

If the application will send a lot of data that needs to be copied, this should be set high.

Definition at line 153 of file cfg_lwip.h.

#define MEM_USE_POOLS 0

MEM_USE_POOLS==1: Use an alternative to malloc() by allocating from a set of memory pools of various sizes.

When mem_malloc is called, an element of the smallest pool that can provide the length needed is returned. To use this, MEMP_USE_CUSTOM_POOLS also has to be enabled.

Definition at line 181 of file cfg_lwip.h.

#define MEM_USE_POOLS_TRY_BIGGER_POOL 0

MEM_USE_POOLS_TRY_BIGGER_POOL==1: if one malloc-pool is empty, try the next bigger pool - WARNING: THIS MIGHT WASTE MEMORY but it can make a system more reliable.

Definition at line 189 of file cfg_lwip.h.

#define MEMP_NUM_ARP_QUEUE 30

MEMP_NUM_ARP_QUEUE: the number of simulateously queued outgoing packets (pbufs) that are waiting for an ARP request (to resolve their destination address) to finish.

(requires the ARP_QUEUEING option)

Definition at line 294 of file cfg_lwip.h.

#define MEMP_NUM_IGMP_GROUP 8

MEMP_NUM_IGMP_GROUP: The number of multicast groups whose network interfaces can be members et the same time (one per netif - allsystems group -, plus one per netif membership).

(requires the LWIP_IGMP option)

Definition at line 304 of file cfg_lwip.h.

#define MEMP_NUM_NETBUF 2

MEMP_NUM_NETBUF: the number of struct netbufs.

(only needed if you use the sequential API, like api_lib.c)

Definition at line 320 of file cfg_lwip.h.

#define MEMP_NUM_NETCONN 4

MEMP_NUM_NETCONN: the number of struct netconns.

(only needed if you use the sequential API, like api_lib.c)

Definition at line 328 of file cfg_lwip.h.

#define MEMP_NUM_PBUF 16

MEMP_NUM_PBUF: the number of memp struct pbufs (used for PBUF_ROM and PBUF_REF).

If the application sends a lot of data out of ROM (or other static memory), this should be set high.

Definition at line 235 of file cfg_lwip.h.

#define MEMP_NUM_SYS_TIMEOUT 8

MEMP_NUM_SYS_TIMEOUT: the number of simulateously active timeouts.

(requires NO_SYS==0)

Definition at line 312 of file cfg_lwip.h.

#define MEMP_NUM_TCP_PCB 5

MEMP_NUM_TCP_PCB: the number of simulatenously active TCP connections.

(requires the LWIP_TCP option)

Definition at line 260 of file cfg_lwip.h.

#define MEMP_NUM_TCP_PCB_LISTEN 8

MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP connections.

(requires the LWIP_TCP option)

Definition at line 268 of file cfg_lwip.h.

#define MEMP_NUM_TCP_SEG 16

MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP segments.

(requires the LWIP_TCP option)

Definition at line 276 of file cfg_lwip.h.

#define MEMP_NUM_TCPIP_MSG_API 8

MEMP_NUM_TCPIP_MSG_API: the number of struct tcpip_msg, which are used for callback/timeout API communication.

(only needed if you use tcpip.c)

Definition at line 337 of file cfg_lwip.h.

#define MEMP_NUM_TCPIP_MSG_INPKT 8

MEMP_NUM_TCPIP_MSG_INPKT: the number of struct tcpip_msg, which are used for incoming packets.

(only needed if you use tcpip.c)

Definition at line 346 of file cfg_lwip.h.

#define MEMP_NUM_UDP_PCB 4

MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks.

One per active UDP "connection". (requires the LWIP_UDP option)

Definition at line 252 of file cfg_lwip.h.

#define MEMP_OVERFLOW_CHECK 0

Dynamic pool memory overflow protection check level.

MEMP_OVERFLOW_CHECK == 0 no checking MEMP_OVERFLOW_CHECK == 1 checks each element when it is freed MEMP_OVERFLOW_CHECK >= 2 checks each element in every pool every time memp_malloc() or memp_free() is called (useful but slow!)

Definition at line 165 of file cfg_lwip.h.

#define MEMP_USE_CUSTOM_POOLS 0

MEMP_USE_CUSTOM_POOLS==1: whether to include a user file lwippools.h that defines additional pools beyond the "standard" ones required by lwIP.

If you set this to 1, you must have lwippools.h in your inlude path somewhere.

Definition at line 199 of file cfg_lwip.h.

#define NO_SYS 0

NO_SYS==1: Provides VERY minimal functionality.

Otherwise, use lwIP facilities.

Definition at line 92 of file cfg_lwip.h.

#define PBUF_LINK_HLEN 14

PBUF_LINK_HLEN: the number of bytes that should be allocated for a link level header.

The default is 14, the standard value for Ethernet.

Definition at line 900 of file cfg_lwip.h.

#define PBUF_POOL_BUFSIZE LWIP_MEM_ALIGN_SIZE(TCP_MSS+40+PBUF_LINK_HLEN)

PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool.

The default is designed to accomodate single full size TCP frame in one pbuf, including TCP_MSS, IP header, and link header.

Definition at line 909 of file cfg_lwip.h.

#define PPP_THREAD_PRIO 1

PPP_THREAD_PRIO: The priority assigned to the pppMain thread.

The priority value itself is platform-dependent, but is passed to sys_thread_new() when the thread is created.

Definition at line 1114 of file cfg_lwip.h.

#define PPP_THREAD_STACKSIZE 0

PPP_THREAD_STACKSIZE: The stack size used by the pppMain thread.

The stack size value itself is platform-dependent, but is passed to sys_thread_new() when the thread is created.

Definition at line 1105 of file cfg_lwip.h.

#define SLIPIF_THREAD_PRIO 1

SLIPIF_THREAD_PRIO: The priority assigned to the slipif_loop thread.

The priority value itself is platform-dependent, but is passed to sys_thread_new() when the thread is created.

Definition at line 1089 of file cfg_lwip.h.

#define SLIPIF_THREAD_STACKSIZE 0

SLIP_THREAD_STACKSIZE: The stack size used by the slipif_loop thread.

The stack size value itself is platform-dependent, but is passed to sys_thread_new() when the thread is created.

Definition at line 1080 of file cfg_lwip.h.

#define SMEMCPY | ( | dst,
 |  | src,
 |  | len
 | ) | memcpy(dst,src,len)

SMEMCPY: override this with care! Some compilers (e.g.

gcc) can inline a call to memcpy() if the length is known at compile time and is small.

Definition at line 108 of file cfg_lwip.h.

#define SNMP_CONCURRENT_REQUESTS 1

SNMP_CONCURRENT_REQUESTS: Number of concurrent requests the module will allow.

At least one request buffer is required.

Definition at line 621 of file cfg_lwip.h.

#define SNMP_SAFE_REQUESTS 1

Only allow SNMP write actions that are 'safe' (e.g.

disabeling netifs is not a safe action and disabled when SNMP_SAFE_REQUESTS = 1). Unsafe requests are disabled by default!

Definition at line 645 of file cfg_lwip.h.

#define SNMP_TRAP_DESTINATIONS 1

SNMP_TRAP_DESTINATIONS: Number of trap destinations.

At least one trap destination is required

Definition at line 629 of file cfg_lwip.h.

#define SO_REUSE 0

SO_REUSE==1: Enable SO_REUSEADDR and SO_REUSEPORT options.

DO NOT USE!

Definition at line 1269 of file cfg_lwip.h.

#define TCP_DEFAULT_LISTEN_BACKLOG 0xff

The maximum allowed backlog for TCP listen netconns.

This backlog is used unless another is explicitly specified. 0xff is the maximum (u8_t).

Definition at line 871 of file cfg_lwip.h.

#define TCP_MSS 536

TCP_MSS: TCP Maximum segment size.

(default is 536, a conservative default, you might want to increase this.) For the receive side, this MSS is advertised to the remote side when opening a connection. For the transmit size, this MSS sets an upper limit on the MSS advertised by the remote host.

Definition at line 818 of file cfg_lwip.h.

#define TCP_QUEUE_OOSEQ (LWIP_TCP)

TCP_QUEUE_OOSEQ==1: TCP will queue segments that arrive out of order.

Define to 0 if your device is low on memory.

Definition at line 807 of file cfg_lwip.h.

#define TCP_SND_QUEUELEN (4 * (TCP_SND_BUF)/(TCP_MSS))

TCP_SND_QUEUELEN: TCP sender buffer space (pbufs).

This must be at least as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work.

Definition at line 846 of file cfg_lwip.h.

#define TCP_SNDLOWAT ((TCP_SND_BUF)/2)

TCP_SNDLOWAT: TCP writable space (bytes).

This must be less than or equal to TCP_SND_BUF. It is the amount of space which must be available in the TCP snd_buf for select to return writable.

Definition at line 855 of file cfg_lwip.h.

#define TCP_WND (4 * TCP_MSS)

TCP_WND: The size of a TCP window.

This must be at least (2 * TCP_MSS) for things to work well

Definition at line 785 of file cfg_lwip.h.

#define TCPIP_THREAD_PRIO 0

TCPIP_THREAD_PRIO: The priority assigned to the main tcpip thread.

The priority value itself is platform-dependent, but is passed to sys_thread_new() when the thread is created.

Definition at line 1055 of file cfg_lwip.h.

#define TCPIP_THREAD_STACKSIZE (KERN_MINSTACKSIZE * 3)

TCPIP_THREAD_STACKSIZE: The stack size used by the main tcpip thread.

The stack size value itself is platform-dependent, but is passed to sys_thread_new() when the thread is created.

Definition at line 1046 of file cfg_lwip.h.


BeRTOS: cfg_lwip.h Source File

  • cfg
cfg_lwip.h
Go to the documentation of this file.
00001
00038 /*
00039  * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
00040  * All rights reserved.
00041  *
00042  * Redistribution and use in source and binary forms, with or without modification,
00043  * are permitted provided that the following conditions are met:
00044  *
00045  * 1. Redistributions of source code must retain the above copyright notice,
00046  *    this list of conditions and the following disclaimer.
00047  * 2. Redistributions in binary form must reproduce the above copyright notice,
00048  *    this list of conditions and the following disclaimer in the documentation
00049  *    and/or other materials provided with the distribution.
00050  * 3. The name of the author may not be used to endorse or promote products
00051  *    derived from this software without specific prior written permission.
00052  *
00053  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
00054  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00055  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
00056  * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
00057  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
00058  * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00059  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
00060  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
00061  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
00062  * OF SUCH DAMAGE.
00063  *
00064  * This file is part of the lwIP TCP/IP stack.
00065  *
00066  * Author: Adam Dunkels <adam@sics.se>
00067  *
00068  */
00069 #ifndef CFG_LWIP_H
00070 #define CFG_LWIP_H
00071
00072 /*
00073    -----------------------------------------------
00074    ---------- Platform specific locking ----------
00075    -----------------------------------------------
00076 */
00077
00083 #ifndef SYS_LIGHTWEIGHT_PROT
00084 #define SYS_LIGHTWEIGHT_PROT            1
00085 #endif
00086
00091 #ifndef NO_SYS
00092 #define NO_SYS                          0
00093 #endif
00094
00099 #ifndef MEMCPY
00100 #define MEMCPY(dst,src,len)             memcpy(dst,src,len)
00101 #endif
00102
00107 #ifndef SMEMCPY
00108 #define SMEMCPY(dst,src,len)            memcpy(dst,src,len)
00109 #endif
00110
00111 /*
00112    ------------------------------------
00113    ---------- Memory options ----------
00114    ------------------------------------
00115 */
00121 #ifndef MEM_LIBC_MALLOC
00122 #define MEM_LIBC_MALLOC                 0
00123 #endif
00124
00130 #ifndef MEMP_MEM_MALLOC
00131 #define MEMP_MEM_MALLOC                 0
00132 #endif
00133
00141 #ifndef MEM_ALIGNMENT
00142 #define MEM_ALIGNMENT                   4
00143 #endif
00144
00153 #define MEM_SIZE                        1600
00154
00165 #define MEMP_OVERFLOW_CHECK             0
00166
00172 #define MEMP_SANITY_CHECK               0
00173
00180 #ifndef MEM_USE_POOLS
00181 #define MEM_USE_POOLS                   0
00182 #endif
00183
00188 #ifndef MEM_USE_POOLS_TRY_BIGGER_POOL
00189 #define MEM_USE_POOLS_TRY_BIGGER_POOL   0
00190 #endif
00191
00198 #ifndef MEMP_USE_CUSTOM_POOLS
00199 #define MEMP_USE_CUSTOM_POOLS           0
00200 #endif
00201
00220 #ifndef LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
00221 #define LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT 0
00222 #endif
00223
00224 /*
00225    ------------------------------------------------
00226    ---------- Internal Memory Pool Sizes ----------
00227    ------------------------------------------------
00228 */
00234 #ifndef MEMP_NUM_PBUF
00235 #define MEMP_NUM_PBUF                   16
00236 #endif
00237
00242 #ifndef MEMP_NUM_RAW_PCB
00243 #define MEMP_NUM_RAW_PCB                4
00244 #endif
00245
00251 #ifndef MEMP_NUM_UDP_PCB
00252 #define MEMP_NUM_UDP_PCB                4
00253 #endif
00254
00259 #ifndef MEMP_NUM_TCP_PCB
00260 #define MEMP_NUM_TCP_PCB                5
00261 #endif
00262
00267 #ifndef MEMP_NUM_TCP_PCB_LISTEN
00268 #define MEMP_NUM_TCP_PCB_LISTEN         8
00269 #endif
00270
00275 #ifndef MEMP_NUM_TCP_SEG
00276 #define MEMP_NUM_TCP_SEG                16
00277 #endif
00278
00283 #ifndef MEMP_NUM_REASSDATA
00284 #define MEMP_NUM_REASSDATA              5
00285 #endif
00286
00293 #ifndef MEMP_NUM_ARP_QUEUE
00294 #define MEMP_NUM_ARP_QUEUE              30
00295 #endif
00296
00303 #ifndef MEMP_NUM_IGMP_GROUP
00304 #define MEMP_NUM_IGMP_GROUP             8
00305 #endif
00306
00311 #ifndef MEMP_NUM_SYS_TIMEOUT
00312 #define MEMP_NUM_SYS_TIMEOUT            8
00313 #endif
00314
00319 #ifndef MEMP_NUM_NETBUF
00320 #define MEMP_NUM_NETBUF                 2
00321 #endif
00322
00327 #ifndef MEMP_NUM_NETCONN
00328 #define MEMP_NUM_NETCONN                4
00329 #endif
00330
00336 #ifndef MEMP_NUM_TCPIP_MSG_API
00337 #define MEMP_NUM_TCPIP_MSG_API          8
00338 #endif
00339
00345 #ifndef MEMP_NUM_TCPIP_MSG_INPKT
00346 #define MEMP_NUM_TCPIP_MSG_INPKT        8
00347 #endif
00348
00352 #ifndef PBUF_POOL_SIZE
00353 #define PBUF_POOL_SIZE                  16
00354 #endif
00355
00356 /*
00357    ---------------------------------
00358    ---------- ARP options ----------
00359    ---------------------------------
00360 */
00364 #ifndef LWIP_ARP
00365 #define LWIP_ARP                        1
00366 #endif
00367
00371 #ifndef ARP_TABLE_SIZE
00372 #define ARP_TABLE_SIZE                  10
00373 #endif
00374
00379 #ifndef ARP_QUEUEING
00380 #define ARP_QUEUEING                    1
00381 #endif
00382
00391 #ifndef ETHARP_TRUST_IP_MAC
00392 #define ETHARP_TRUST_IP_MAC             1
00393 #endif
00394
00401 #ifndef ETHARP_SUPPORT_VLAN
00402 #define ETHARP_SUPPORT_VLAN             0
00403 #endif
00404
00405 /*
00406    --------------------------------
00407    ---------- IP options ----------
00408    --------------------------------
00409 */
00415 #ifndef IP_FORWARD
00416 #define IP_FORWARD                      0
00417 #endif
00418
00424 #ifndef IP_OPTIONS_ALLOWED
00425 #define IP_OPTIONS_ALLOWED              1
00426 #endif
00427
00433 #define IP_REASSEMBLY                   1
00434
00440 #define IP_FRAG                         1
00441
00447 #ifndef IP_REASS_MAXAGE
00448 #define IP_REASS_MAXAGE                 3
00449 #endif
00450
00457 #ifndef IP_REASS_MAX_PBUFS
00458 #define IP_REASS_MAX_PBUFS              10
00459 #endif
00460
00466 #ifndef IP_FRAG_USES_STATIC_BUF
00467 #define IP_FRAG_USES_STATIC_BUF         1
00468 #endif
00469
00474 #if IP_FRAG_USES_STATIC_BUF && !defined(IP_FRAG_MAX_MTU)
00475 #define IP_FRAG_MAX_MTU                 1500
00476 #endif
00477
00481 #ifndef IP_DEFAULT_TTL
00482 #define IP_DEFAULT_TTL                  255
00483 #endif
00484
00490 #ifndef IP_SOF_BROADCAST
00491 #define IP_SOF_BROADCAST                0
00492 #endif
00493
00498 #ifndef IP_SOF_BROADCAST_RECV
00499 #define IP_SOF_BROADCAST_RECV           0
00500 #endif
00501
00502 /*
00503    ----------------------------------
00504    ---------- ICMP options ----------
00505    ----------------------------------
00506 */
00512 #define LWIP_ICMP                       1
00513
00517 #ifndef ICMP_TTL
00518 #define ICMP_TTL                       (IP_DEFAULT_TTL)
00519 #endif
00520
00524 #ifndef LWIP_BROADCAST_PING
00525 #define LWIP_BROADCAST_PING             0
00526 #endif
00527
00531 #ifndef LWIP_MULTICAST_PING
00532 #define LWIP_MULTICAST_PING             0
00533 #endif
00534
00535 /*
00536    ---------------------------------
00537    ---------- RAW options ----------
00538    ---------------------------------
00539 */
00545 #define LWIP_RAW                        1
00546
00550 #ifndef RAW_TTL
00551 #define RAW_TTL                        (IP_DEFAULT_TTL)
00552 #endif
00553
00554 /*
00555    ----------------------------------
00556    ---------- DHCP options ----------
00557    ----------------------------------
00558 */
00564 #define LWIP_DHCP                       1
00565
00569 #ifndef DHCP_DOES_ARP_CHECK
00570 #define DHCP_DOES_ARP_CHECK             ((LWIP_DHCP) && (LWIP_ARP))
00571 #endif
00572
00573 /*
00574    ------------------------------------
00575    ---------- AUTOIP options ----------
00576    ------------------------------------
00577 */
00581 #ifndef LWIP_AUTOIP
00582 #define LWIP_AUTOIP                     0
00583 #endif
00584
00589 #ifndef LWIP_DHCP_AUTOIP_COOP
00590 #define LWIP_DHCP_AUTOIP_COOP           0
00591 #endif
00592
00600 #ifndef LWIP_DHCP_AUTOIP_COOP_TRIES
00601 #define LWIP_DHCP_AUTOIP_COOP_TRIES     9
00602 #endif
00603
00604 /*
00605    ----------------------------------
00606    ---------- SNMP options ----------
00607    ----------------------------------
00608 */
00614 #define LWIP_SNMP                       0
00615
00620 #ifndef SNMP_CONCURRENT_REQUESTS
00621 #define SNMP_CONCURRENT_REQUESTS        1
00622 #endif
00623
00628 #ifndef SNMP_TRAP_DESTINATIONS
00629 #define SNMP_TRAP_DESTINATIONS          1
00630 #endif
00631
00635 #ifndef SNMP_PRIVATE_MIB
00636 #define SNMP_PRIVATE_MIB                0
00637 #endif
00638
00644 #ifndef SNMP_SAFE_REQUESTS
00645 #define SNMP_SAFE_REQUESTS              1
00646 #endif
00647
00648 /*
00649    ----------------------------------
00650    ---------- IGMP options ----------
00651    ----------------------------------
00652 */
00658 #define LWIP_IGMP                       0
00659
00660 /*
00661    ----------------------------------
00662    ---------- DNS options -----------
00663    ----------------------------------
00664 */
00670 #define LWIP_DNS                        0
00671
00673 #ifndef DNS_TABLE_SIZE
00674 #define DNS_TABLE_SIZE                  4
00675 #endif
00676
00678 #ifndef DNS_MAX_NAME_LENGTH
00679 #define DNS_MAX_NAME_LENGTH             256
00680 #endif
00681
00683 #ifndef DNS_MAX_SERVERS
00684 #define DNS_MAX_SERVERS                 2
00685 #endif
00686
00688 #ifndef DNS_DOES_NAME_CHECK
00689 #define DNS_DOES_NAME_CHECK             1
00690 #endif
00691
00695 #ifndef DNS_USES_STATIC_BUF
00696 #define DNS_USES_STATIC_BUF             1
00697 #endif
00698
00700 #ifndef DNS_MSG_SIZE
00701 #define DNS_MSG_SIZE                    512
00702 #endif
00703
00718 #ifndef DNS_LOCAL_HOSTLIST
00719 #define DNS_LOCAL_HOSTLIST              0
00720 #endif /* DNS_LOCAL_HOSTLIST */
00721
00724 #ifndef DNS_LOCAL_HOSTLIST_IS_DYNAMIC
00725 #define DNS_LOCAL_HOSTLIST_IS_DYNAMIC   0
00726 #endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */
00727
00728 /*
00729    ---------------------------------
00730    ---------- UDP options ----------
00731    ---------------------------------
00732 */
00738 #define LWIP_UDP                        1
00739
00743 #ifndef LWIP_UDPLITE
00744 #define LWIP_UDPLITE                    0
00745 #endif
00746
00750 #ifndef UDP_TTL
00751 #define UDP_TTL                         (IP_DEFAULT_TTL)
00752 #endif
00753
00757 #ifndef LWIP_NETBUF_RECVINFO
00758 #define LWIP_NETBUF_RECVINFO            0
00759 #endif
00760
00761 /*
00762    ---------------------------------
00763    ---------- TCP options ----------
00764    ---------------------------------
00765 */
00771 #define LWIP_TCP                        1
00772
00776 #ifndef TCP_TTL
00777 #define TCP_TTL                         (IP_DEFAULT_TTL)
00778 #endif
00779
00784 #ifndef TCP_WND
00785 #define TCP_WND                         (4 * TCP_MSS)
00786 #endif
00787
00791 #ifndef TCP_MAXRTX
00792 #define TCP_MAXRTX                      12
00793 #endif
00794
00798 #ifndef TCP_SYNMAXRTX
00799 #define TCP_SYNMAXRTX                   6
00800 #endif
00801
00806 #ifndef TCP_QUEUE_OOSEQ
00807 #define TCP_QUEUE_OOSEQ                 (LWIP_TCP)
00808 #endif
00809
00817 #ifndef TCP_MSS
00818 #define TCP_MSS                         536
00819 #endif
00820
00829 #ifndef TCP_CALCULATE_EFF_SEND_MSS
00830 #define TCP_CALCULATE_EFF_SEND_MSS      1
00831 #endif
00832
00833
00837 #ifndef TCP_SND_BUF
00838 #define TCP_SND_BUF                     (2 * TCP_MSS)
00839 #endif
00840
00845 #ifndef TCP_SND_QUEUELEN
00846 #define TCP_SND_QUEUELEN                (4 * (TCP_SND_BUF)/(TCP_MSS))
00847 #endif
00848
00854 #ifndef TCP_SNDLOWAT
00855 #define TCP_SNDLOWAT                    ((TCP_SND_BUF)/2)
00856 #endif
00857
00861 #ifndef TCP_LISTEN_BACKLOG
00862 #define TCP_LISTEN_BACKLOG              0
00863 #endif
00864
00870 #ifndef TCP_DEFAULT_LISTEN_BACKLOG
00871 #define TCP_DEFAULT_LISTEN_BACKLOG      0xff
00872 #endif
00873
00877 #ifndef LWIP_TCP_TIMESTAMPS
00878 #define LWIP_TCP_TIMESTAMPS             0
00879 #endif
00880
00885 #ifndef TCP_WND_UPDATE_THRESHOLD
00886 #define TCP_WND_UPDATE_THRESHOLD   (TCP_WND / 4)
00887 #endif
00888
00889 /*
00890    ----------------------------------
00891    ---------- Pbuf options ----------
00892    ----------------------------------
00893 */
00899 #ifndef PBUF_LINK_HLEN
00900 #define PBUF_LINK_HLEN                  14
00901 #endif
00902
00908 #ifndef PBUF_POOL_BUFSIZE
00909 #define PBUF_POOL_BUFSIZE               LWIP_MEM_ALIGN_SIZE(TCP_MSS+40+PBUF_LINK_HLEN)
00910 #endif
00911
00912 /*
00913    ------------------------------------------------
00914    ---------- Network Interfaces options ----------
00915    ------------------------------------------------
00916 */
00922 #define LWIP_NETIF_HOSTNAME             1
00923
00929 #define LWIP_NETIF_API                  0
00930
00935 #ifndef LWIP_NETIF_STATUS_CALLBACK
00936 #define LWIP_NETIF_STATUS_CALLBACK      0
00937 #endif
00938
00943 #ifndef LWIP_NETIF_LINK_CALLBACK
00944 #define LWIP_NETIF_LINK_CALLBACK        0
00945 #endif
00946
00954 #ifndef LWIP_NETIF_HWADDRHINT
00955 #define LWIP_NETIF_HWADDRHINT           0
00956 #endif
00957
00962 #ifndef LWIP_NETIF_LOOPBACK
00963 #define LWIP_NETIF_LOOPBACK             0
00964 #endif
00965
00970 #ifndef LWIP_LOOPBACK_MAX_PBUFS
00971 #define LWIP_LOOPBACK_MAX_PBUFS         0
00972 #endif
00973
00987 #ifndef LWIP_NETIF_LOOPBACK_MULTITHREADING
00988 #define LWIP_NETIF_LOOPBACK_MULTITHREADING    (!NO_SYS)
00989 #endif
00990
01000 #ifndef LWIP_NETIF_TX_SINGLE_PBUF
01001 #define LWIP_NETIF_TX_SINGLE_PBUF             0
01002 #endif /* LWIP_NETIF_TX_SINGLE_PBUF */
01003
01004 /*
01005    ------------------------------------
01006    ---------- LOOPIF options ----------
01007    ------------------------------------
01008 */
01014 #define LWIP_HAVE_LOOPIF                0
01015
01016 /*
01017    ------------------------------------
01018    ---------- SLIPIF options ----------
01019    ------------------------------------
01020 */
01026 #define LWIP_HAVE_SLIPIF                0
01027
01028 /*
01029    ------------------------------------
01030    ---------- Thread options ----------
01031    ------------------------------------
01032 */
01036 #ifndef TCPIP_THREAD_NAME
01037 #define TCPIP_THREAD_NAME              "tcpip_thread"
01038 #endif
01039
01045 #ifndef TCPIP_THREAD_STACKSIZE
01046 #define TCPIP_THREAD_STACKSIZE          (KERN_MINSTACKSIZE * 3)
01047 #endif
01048
01054 #ifndef TCPIP_THREAD_PRIO
01055 #define TCPIP_THREAD_PRIO               0
01056 #endif
01057
01063 #ifndef TCPIP_MBOX_SIZE
01064 #define TCPIP_MBOX_SIZE                 0
01065 #endif
01066
01070 #ifndef SLIPIF_THREAD_NAME
01071 #define SLIPIF_THREAD_NAME             "slipif_loop"
01072 #endif
01073
01079 #ifndef SLIPIF_THREAD_STACKSIZE
01080 #define SLIPIF_THREAD_STACKSIZE         0
01081 #endif
01082
01088 #ifndef SLIPIF_THREAD_PRIO
01089 #define SLIPIF_THREAD_PRIO              1
01090 #endif
01091
01095 #ifndef PPP_THREAD_NAME
01096 #define PPP_THREAD_NAME                "pppMain"
01097 #endif
01098
01104 #ifndef PPP_THREAD_STACKSIZE
01105 #define PPP_THREAD_STACKSIZE            0
01106 #endif
01107
01113 #ifndef PPP_THREAD_PRIO
01114 #define PPP_THREAD_PRIO                 1
01115 #endif
01116
01120 #ifndef DEFAULT_THREAD_NAME
01121 #define DEFAULT_THREAD_NAME            "lwIP"
01122 #endif
01123
01129 #ifndef DEFAULT_THREAD_STACKSIZE
01130 #define DEFAULT_THREAD_STACKSIZE        (KERN_MINSTACKSIZE * 3)
01131 #endif
01132
01138 #ifndef DEFAULT_THREAD_PRIO
01139 #define DEFAULT_THREAD_PRIO             1
01140 #endif
01141
01147 #ifndef DEFAULT_RAW_RECVMBOX_SIZE
01148 #define DEFAULT_RAW_RECVMBOX_SIZE       0
01149 #endif
01150
01156 #ifndef DEFAULT_UDP_RECVMBOX_SIZE
01157 #define DEFAULT_UDP_RECVMBOX_SIZE       0
01158 #endif
01159
01165 #ifndef DEFAULT_TCP_RECVMBOX_SIZE
01166 #define DEFAULT_TCP_RECVMBOX_SIZE       0
01167 #endif
01168
01174 #ifndef DEFAULT_ACCEPTMBOX_SIZE
01175 #define DEFAULT_ACCEPTMBOX_SIZE         0
01176 #endif
01177
01178 /*
01179    ----------------------------------------------
01180    ---------- Sequential layer options ----------
01181    ----------------------------------------------
01182 */
01187 #ifndef LWIP_TCPIP_CORE_LOCKING
01188 #define LWIP_TCPIP_CORE_LOCKING         0
01189 #endif
01190
01196 #define LWIP_NETCONN                    1
01197
01198 /*
01199    ------------------------------------
01200    ---------- Socket options ----------
01201    ------------------------------------
01202 */
01208 #define LWIP_SOCKET                     1
01209 #if LWIP_SOCKET
01210     /*
01211      * The sockets.c file requires this macro to be defined to really
01212      * set errno on errors.
01213      */
01214     #define ERRNO
01215 #endif
01216
01222 #ifndef LWIP_COMPAT_SOCKETS
01223 #define LWIP_COMPAT_SOCKETS             0
01224 #endif
01225
01231 #ifndef LWIP_POSIX_SOCKETS_IO_NAMES
01232 #define LWIP_POSIX_SOCKETS_IO_NAMES     0
01233 #endif
01234
01240 #ifndef LWIP_TCP_KEEPALIVE
01241 #define LWIP_TCP_KEEPALIVE              0
01242 #endif
01243
01247 #ifndef LWIP_SO_RCVTIMEO
01248 #define LWIP_SO_RCVTIMEO                0
01249 #endif
01250
01254 #ifndef LWIP_SO_RCVBUF
01255 #define LWIP_SO_RCVBUF                  0
01256 #endif
01257
01261 #ifndef RECV_BUFSIZE_DEFAULT
01262 #define RECV_BUFSIZE_DEFAULT            INT_MAX
01263 #endif
01264
01268 #ifndef SO_REUSE
01269 #define SO_REUSE                        0
01270 #endif
01271
01272 /*
01273    ----------------------------------------
01274    ---------- Statistics options ----------
01275    ----------------------------------------
01276 */
01280 #ifndef LWIP_STATS
01281 #define LWIP_STATS                      0
01282 #endif
01283
01284 #if LWIP_STATS
01285
01289 #ifndef LWIP_STATS_DISPLAY
01290 #define LWIP_STATS_DISPLAY              0
01291 #endif
01292
01296 #ifndef LINK_STATS
01297 #define LINK_STATS                      1
01298 #endif
01299
01303 #ifndef ETHARP_STATS
01304 #define ETHARP_STATS                    (LWIP_ARP)
01305 #endif
01306
01310 #ifndef IP_STATS
01311 #define IP_STATS                        1
01312 #endif
01313
01318 #ifndef IPFRAG_STATS
01319 #define IPFRAG_STATS                    (IP_REASSEMBLY || IP_FRAG)
01320 #endif
01321
01325 #ifndef ICMP_STATS
01326 #define ICMP_STATS                      1
01327 #endif
01328
01332 #ifndef IGMP_STATS
01333 #define IGMP_STATS                      (LWIP_IGMP)
01334 #endif
01335
01340 #ifndef UDP_STATS
01341 #define UDP_STATS                       (LWIP_UDP)
01342 #endif
01343
01348 #ifndef TCP_STATS
01349 #define TCP_STATS                       (LWIP_TCP)
01350 #endif
01351
01355 #ifndef MEM_STATS
01356 #define MEM_STATS                       ((MEM_LIBC_MALLOC == 0) && (MEM_USE_POOLS == 0))
01357 #endif
01358
01362 #ifndef MEMP_STATS
01363 #define MEMP_STATS                      (MEMP_MEM_MALLOC == 0)
01364 #endif
01365
01369 #ifndef SYS_STATS
01370 #define SYS_STATS                       (NO_SYS == 0)
01371 #endif
01372
01373 #else
01374
01375 #define LINK_STATS                      0
01376 #define ETHARP_STATS                    0
01377 #define IP_STATS                        0
01378 #define IPFRAG_STATS                    0
01379 #define ICMP_STATS                      0
01380 #define IGMP_STATS                      0
01381 #define UDP_STATS                       0
01382 #define TCP_STATS                       0
01383 #define MEM_STATS                       0
01384 #define MEMP_STATS                      0
01385 #define SYS_STATS                       0
01386 #define LWIP_STATS_DISPLAY              0
01387
01388 #endif /* LWIP_STATS */
01389
01390 /*
01391    ---------------------------------
01392    ---------- PPP options ----------
01393    ---------------------------------
01394 */
01400 #define PPP_SUPPORT                     0
01401
01407 #define PPPOE_SUPPORT                   0
01408
01412 #ifndef PPPOS_SUPPORT
01413 #define PPPOS_SUPPORT                   PPP_SUPPORT
01414 #endif
01415
01416 #if PPP_SUPPORT
01417
01421 #ifndef NUM_PPP
01422 #define NUM_PPP                         1
01423 #endif
01424
01428 #ifndef PAP_SUPPORT
01429 #define PAP_SUPPORT                     0
01430 #endif
01431
01435 #ifndef CHAP_SUPPORT
01436 #define CHAP_SUPPORT                    0
01437 #endif
01438
01442 #ifndef MSCHAP_SUPPORT
01443 #define MSCHAP_SUPPORT                  0
01444 #endif
01445
01449 #ifndef CBCP_SUPPORT
01450 #define CBCP_SUPPORT                    0
01451 #endif
01452
01456 #ifndef CCP_SUPPORT
01457 #define CCP_SUPPORT                     0
01458 #endif
01459
01463 #ifndef VJ_SUPPORT
01464 #define VJ_SUPPORT                      0
01465 #endif
01466
01470 #ifndef MD5_SUPPORT
01471 #define MD5_SUPPORT                     0
01472 #endif
01473
01474 /*
01475  * Timeouts
01476  */
01477 #ifndef FSM_DEFTIMEOUT
01478 #define FSM_DEFTIMEOUT                  6       /* Timeout time in seconds */
01479 #endif
01480
01481 #ifndef FSM_DEFMAXTERMREQS
01482 #define FSM_DEFMAXTERMREQS              2       /* Maximum Terminate-Request transmissions */
01483 #endif
01484
01485 #ifndef FSM_DEFMAXCONFREQS
01486 #define FSM_DEFMAXCONFREQS              10      /* Maximum Configure-Request transmissions */
01487 #endif
01488
01489 #ifndef FSM_DEFMAXNAKLOOPS
01490 #define FSM_DEFMAXNAKLOOPS              5       /* Maximum number of nak loops */
01491 #endif
01492
01493 #ifndef UPAP_DEFTIMEOUT
01494 #define UPAP_DEFTIMEOUT                 6       /* Timeout (seconds) for retransmitting req */
01495 #endif
01496
01497 #ifndef UPAP_DEFREQTIME
01498 #define UPAP_DEFREQTIME                 30      /* Time to wait for auth-req from peer */
01499 #endif
01500
01501 #ifndef CHAP_DEFTIMEOUT
01502 #define CHAP_DEFTIMEOUT                 6       /* Timeout time in seconds */
01503 #endif
01504
01505 #ifndef CHAP_DEFTRANSMITS
01506 #define CHAP_DEFTRANSMITS               10      /* max # times to send challenge */
01507 #endif
01508
01509 /* Interval in seconds between keepalive echo requests, 0 to disable. */
01510 #ifndef LCP_ECHOINTERVAL
01511 #define LCP_ECHOINTERVAL                0
01512 #endif
01513
01514 /* Number of unanswered echo requests before failure. */
01515 #ifndef LCP_MAXECHOFAILS
01516 #define LCP_MAXECHOFAILS                3
01517 #endif
01518
01519 /* Max Xmit idle time (in jiffies) before resend flag char. */
01520 #ifndef PPP_MAXIDLEFLAG
01521 #define PPP_MAXIDLEFLAG                 100
01522 #endif
01523
01524 /*
01525  * Packet sizes
01526  *
01527  * Note - lcp shouldn't be allowed to negotiate stuff outside these
01528  *    limits.  See lcp.h in the pppd directory.
01529  * (XXX - these constants should simply be shared by lcp.c instead
01530  *    of living in lcp.h)
01531  */
01532 #define PPP_MTU                         1500     /* Default MTU (size of Info field) */
01533 #ifndef PPP_MAXMTU
01534 /* #define PPP_MAXMTU  65535 - (PPP_HDRLEN + PPP_FCSLEN) */
01535 #define PPP_MAXMTU                      1500 /* Largest MTU we allow */
01536 #endif
01537 #define PPP_MINMTU                      64
01538 #define PPP_MRU                         1500     /* default MRU = max length of info field */
01539 #define PPP_MAXMRU                      1500     /* Largest MRU we allow */
01540 #ifndef PPP_DEFMRU
01541 #define PPP_DEFMRU                      296             /* Try for this */
01542 #endif
01543 #define PPP_MINMRU                      128             /* No MRUs below this */
01544
01545 #ifndef MAXNAMELEN
01546 #define MAXNAMELEN                      256     /* max length of hostname or name for auth */
01547 #endif
01548 #ifndef MAXSECRETLEN
01549 #define MAXSECRETLEN                    256     /* max length of password or secret */
01550 #endif
01551
01552 #endif /* PPP_SUPPORT */
01553
01554 /*
01555    --------------------------------------
01556    ---------- Checksum options ----------
01557    --------------------------------------
01558 */
01562 #ifndef CHECKSUM_GEN_IP
01563 #define CHECKSUM_GEN_IP                 1
01564 #endif
01565
01569 #ifndef CHECKSUM_GEN_UDP
01570 #define CHECKSUM_GEN_UDP                1
01571 #endif
01572
01576 #ifndef CHECKSUM_GEN_TCP
01577 #define CHECKSUM_GEN_TCP                1
01578 #endif
01579
01583 #ifndef CHECKSUM_CHECK_IP
01584 #define CHECKSUM_CHECK_IP               1
01585 #endif
01586
01590 #ifndef CHECKSUM_CHECK_UDP
01591 #define CHECKSUM_CHECK_UDP              1
01592 #endif
01593
01597 #ifndef CHECKSUM_CHECK_TCP
01598 #define CHECKSUM_CHECK_TCP              1
01599 #endif
01600
01601 /*
01602    ---------------------------------------
01603    ---------- Debugging options ----------
01604    ---------------------------------------
01605 */
01606
01607 #ifdef _DEBUG
01608 #define LWIP_DEBUG
01609 #endif
01610
01616 #ifndef LWIP_DBG_MIN_LEVEL
01617 #define LWIP_DBG_MIN_LEVEL              LWIP_DBG_LEVEL_ALL
01618 #endif
01619
01624 #ifndef LWIP_DBG_TYPES_ON
01625 #define LWIP_DBG_TYPES_ON               LWIP_DBG_ON
01626 #endif
01627
01631 #ifndef ETHARP_DEBUG
01632 #define ETHARP_DEBUG                    LWIP_DBG_OFF
01633 #endif
01634
01638 #ifndef NETIF_DEBUG
01639 #define NETIF_DEBUG                     LWIP_DBG_OFF
01640 #endif
01641
01645 #ifndef PBUF_DEBUG
01646 #define PBUF_DEBUG                      LWIP_DBG_OFF
01647 #endif
01648
01652 #ifndef API_LIB_DEBUG
01653 #define API_LIB_DEBUG                   LWIP_DBG_OFF
01654 #endif
01655
01659 #ifndef API_MSG_DEBUG
01660 #define API_MSG_DEBUG                   LWIP_DBG_OFF
01661 #endif
01662
01666 #ifndef SOCKETS_DEBUG
01667 #define SOCKETS_DEBUG                   LWIP_DBG_OFF
01668 #endif
01669
01673 #ifndef ICMP_DEBUG
01674 #define ICMP_DEBUG                      LWIP_DBG_OFF
01675 #endif
01676
01680 #ifndef IGMP_DEBUG
01681 #define IGMP_DEBUG                      LWIP_DBG_OFF
01682 #endif
01683
01687 #ifndef INET_DEBUG
01688 #define INET_DEBUG                      LWIP_DBG_OFF
01689 #endif
01690
01694 #ifndef IP_DEBUG
01695 #define IP_DEBUG                        LWIP_DBG_OFF
01696 #endif
01697
01701 #ifndef IP_REASS_DEBUG
01702 #define IP_REASS_DEBUG                  LWIP_DBG_OFF
01703 #endif
01704
01708 #ifndef RAW_DEBUG
01709 #define RAW_DEBUG                       LWIP_DBG_OFF
01710 #endif
01711
01715 #ifndef MEM_DEBUG
01716 #define MEM_DEBUG                       LWIP_DBG_OFF
01717 #endif
01718
01722 #ifndef MEMP_DEBUG
01723 #define MEMP_DEBUG                      LWIP_DBG_OFF
01724 #endif
01725
01729 #ifndef SYS_DEBUG
01730 #define SYS_DEBUG                       LWIP_DBG_OFF
01731 #endif
01732
01736 #ifndef TCP_DEBUG
01737 #define TCP_DEBUG                       LWIP_DBG_OFF
01738 #endif
01739
01743 #ifndef TCP_INPUT_DEBUG
01744 #define TCP_INPUT_DEBUG                 LWIP_DBG_OFF
01745 #endif
01746
01750 #ifndef TCP_FR_DEBUG
01751 #define TCP_FR_DEBUG                    LWIP_DBG_OFF
01752 #endif
01753
01758 #ifndef TCP_RTO_DEBUG
01759 #define TCP_RTO_DEBUG                   LWIP_DBG_OFF
01760 #endif
01761
01765 #ifndef TCP_CWND_DEBUG
01766 #define TCP_CWND_DEBUG                  LWIP_DBG_OFF
01767 #endif
01768
01772 #ifndef TCP_WND_DEBUG
01773 #define TCP_WND_DEBUG                   LWIP_DBG_OFF
01774 #endif
01775
01779 #ifndef TCP_OUTPUT_DEBUG
01780 #define TCP_OUTPUT_DEBUG                LWIP_DBG_OFF
01781 #endif
01782
01786 #ifndef TCP_RST_DEBUG
01787 #define TCP_RST_DEBUG                   LWIP_DBG_OFF
01788 #endif
01789
01793 #ifndef TCP_QLEN_DEBUG
01794 #define TCP_QLEN_DEBUG                  LWIP_DBG_OFF
01795 #endif
01796
01800 #ifndef UDP_DEBUG
01801 #define UDP_DEBUG                       LWIP_DBG_OFF
01802 #endif
01803
01807 #ifndef TCPIP_DEBUG
01808 #define TCPIP_DEBUG                     LWIP_DBG_OFF
01809 #endif
01810
01814 #ifndef PPP_DEBUG
01815 #define PPP_DEBUG                       LWIP_DBG_OFF
01816 #endif
01817
01821 #ifndef SLIP_DEBUG
01822 #define SLIP_DEBUG                      LWIP_DBG_OFF
01823 #endif
01824
01828 #ifndef DHCP_DEBUG
01829 #define DHCP_DEBUG                      LWIP_DBG_OFF
01830 #endif
01831
01835 #ifndef AUTOIP_DEBUG
01836 #define AUTOIP_DEBUG                    LWIP_DBG_OFF
01837 #endif
01838
01842 #ifndef SNMP_MSG_DEBUG
01843 #define SNMP_MSG_DEBUG                  LWIP_DBG_OFF
01844 #endif
01845
01849 #ifndef SNMP_MIB_DEBUG
01850 #define SNMP_MIB_DEBUG                  LWIP_DBG_OFF
01851 #endif
01852
01856 #ifndef DNS_DEBUG
01857 #define DNS_DEBUG                       LWIP_DBG_OFF
01858 #endif
01859
01860 /* Custom definitions: !!!DO NOT CHANGE THIS SECTION!!! */
01861 #define LWIP_TIMEVAL_PRIVATE            0
01862
01863 #endif /* CFG_LWIP_H */


BeRTOS: cfg_md2.h File Reference

  • cfg
Defines
cfg_md2.h File Reference

Configuration file for MD2 module. More...

Go to the source code of this file.

Defines

#define | CONFIG_MD2_BLOCK_LEN 16
Size of block for MD2 algorithm.
#define | CONFIG_MD2_STD_PERM 0
Use standard permutation in MD2 algorithm.

Detailed Description

Configuration file for MD2 module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_md2.h.


BeRTOS: cfg_md2.h Source File

  • cfg
cfg_md2.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_MD2_H
00040 #define CFG_MD2_H
00041
00047 #define CONFIG_MD2_BLOCK_LEN    16
00048
00050 #define CONFIG_MD2_STD_PERM     0
00051
00052 #endif /* CFG_MD2_H */
00053


BeRTOS: cfg_menu.h File Reference

  • cfg
Defines
cfg_menu.h File Reference

Configuration file for Menu module. More...

Go to the source code of this file.

Defines

#define | CONFIG_MENU_MENUBAR 0
Enable button bar behind menus.
#define | CONFIG_LEVELEDIT_TIMEOUT 0
Level Edit Timeout.
#define | CONFIG_MENU_TIMEOUT 0
Menu timeout.
#define | CONFIG_MENU_SMOOTH 1
Enable smooth scrolling in menus.

Detailed Description

Configuration file for Menu module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_menu.h.

Define Documentation

#define CONFIG_LEVELEDIT_TIMEOUT 0

Level Edit Timeout.

Definition at line 51 of file cfg_menu.h.

#define CONFIG_MENU_MENUBAR 0

Enable button bar behind menus.

Definition at line 45 of file cfg_menu.h.

#define CONFIG_MENU_SMOOTH 1

Enable smooth scrolling in menus.

Definition at line 63 of file cfg_menu.h.

#define CONFIG_MENU_TIMEOUT 0

Menu timeout.

Definition at line 57 of file cfg_menu.h.


BeRTOS: cfg_menu.h Source File

  • cfg
cfg_menu.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_MENU_H
00039 #define CFG_MENU_H
00040
00045 #define CONFIG_MENU_MENUBAR        0
00046
00051 #define CONFIG_LEVELEDIT_TIMEOUT   0
00052
00057 #define CONFIG_MENU_TIMEOUT        0
00058
00063 #define CONFIG_MENU_SMOOTH         1
00064
00065
00066 #endif /* CFG_MENU_H */
00067


BeRTOS: cfg_monitor.h File Reference

  • cfg
Defines
cfg_monitor.h File Reference

Kernel monitor configuration parameters. More...

Go to the source code of this file.

Defines

#define CONFIG_KERN_MONITOR 0
Process monitor.

Detailed Description

Kernel monitor configuration parameters.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file cfg_monitor.h.


BeRTOS: cfg_monitor.h Source File

  • cfg
cfg_monitor.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_MONITOR_H
00039 #define CFG_MONITOR_H
00040
00045 #define CONFIG_KERN_MONITOR 0
00046
00047 #endif /*  CFG_MONITOR_H */


BeRTOS: cfg_mt29f.h File Reference

  • cfg
Defines
cfg_mt29f.h File Reference

Configuration file for MT29F driver module. More...

Go to the source code of this file.

Defines

#define | CONFIG_MT29F_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | CONFIG_MT29F_LOG_FORMAT LOG_FMT_TERSE
module logging format.

Detailed Description

Configuration file for MT29F driver module.

Author:
Stefano Fedrigo <aleph@develer.com>

Definition in file cfg_mt29f.h.


BeRTOS: cfg_mt29f.h Source File

  • cfg
cfg_mt29f.h
Go to the documentation of this file.
00001
00037 #ifndef CFG_MT29F_H
00038 #define CFG_MT29F_H
00039
00046 #define CONFIG_MT29F_LOG_LEVEL      LOG_LVL_INFO
00047
00054 #define CONFIG_MT29F_LOG_FORMAT     LOG_FMT_TERSE
00055
00056 #if 0
00057
00064 #define CONFIG_FLASH_WR_TIMEOUT      100
00065 #endif
00066
00067 #endif /* CFG_MT29F_H */


BeRTOS: cfg_nmea.h File Reference

  • cfg
Defines
cfg_nmea.h File Reference

Configuration file for NMEA module. More...

Go to the source code of this file.

Defines

#define | NMEA_LOG_LEVEL LOG_LVL_ERR
Module logging level.
#define | NMEA_LOG_FORMAT LOG_FMT_TERSE
Module logging format.
#define | CONFIG_NMEAP_MAX_SENTENCES 8
Maximum number of sentence parsers supported.
#define | CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255
Max length of a complete sentence.
#define | CONFIG_NMEAP_MAX_TOKENS 24
Max tokens in one sentence.

Detailed Description

Configuration file for NMEA module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_nmea.h.

Define Documentation

#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255

Max length of a complete sentence.

The standard says 82 bytes, but its probably better to go at least 128 since some units don't adhere to the 82 bytes especially for proprietary sentences.

Definition at line 74 of file cfg_nmea.h.

#define CONFIG_NMEAP_MAX_TOKENS 24

Max tokens in one sentence.

24 is enough for any standard sentence.

Definition at line 82 of file cfg_nmea.h.


BeRTOS: cfg_nmea.h Source File

  • cfg
cfg_nmea.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_NMEA_H
00039 #define CFG_NMEA_H
00040
00047 #define NMEA_LOG_LEVEL      LOG_LVL_ERR
00048
00055 #define NMEA_LOG_FORMAT     LOG_FMT_TERSE
00056
00057
00064 #define CONFIG_NMEAP_MAX_SENTENCES         8
00065
00074 #define CONFIG_NMEAP_MAX_SENTENCE_LENGTH   255
00075
00082 #define CONFIG_NMEAP_MAX_TOKENS            24
00083
00084 #endif /* CFG_NMEA_H */
00085


BeRTOS: cfg_ntc.h File Reference

  • cfg
Defines
cfg_ntc.h File Reference

Configuration file for NTC module. More...

Go to the source code of this file.

Defines

#define | CONFIG_NTC_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | CONFIG_NTC_LOG_FORMAT LOG_FMT_TERSE
Module logging format.

Detailed Description

Configuration file for NTC module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_ntc.h.


BeRTOS: cfg_ntc.h Source File

  • cfg
cfg_ntc.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_NTC_H
00039 #define CFG_NTC_H
00040
00046 #define CONFIG_NTC_LOG_LEVEL        LOG_LVL_INFO
00047
00052 #define CONFIG_NTC_LOG_FORMAT       LOG_FMT_TERSE
00053
00054 #endif /* CFG_NTC_H */


BeRTOS: cfg_parser.h File Reference

  • cfg
Defines
cfg_parser.h File Reference

Configuration file for parser module. More...

Go to the source code of this file.

Defines

#define | CONFIG_PARSER_MAX_ARGS 4
Max number of arguments and results for each command.
#define | CONFIG_MAX_COMMANDS_NUMBER 16
Max number of commands.
#define | CONFIG_ENABLE_COMPAT_BEHAVIOUR 1
Enable compatibility behaviour.

Detailed Description

Configuration file for parser module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_parser.h.

Define Documentation

#define CONFIG_ENABLE_COMPAT_BEHAVIOUR 1

Enable compatibility behaviour.

Skip the first word from incoming commands. Don't enable in new projects.

Definition at line 61 of file cfg_parser.h.

#define CONFIG_MAX_COMMANDS_NUMBER 16

Max number of commands.

Definition at line 53 of file cfg_parser.h.

#define CONFIG_PARSER_MAX_ARGS 4

Max number of arguments and results for each command.

Definition at line 46 of file cfg_parser.h.


BeRTOS: cfg_parser.h Source File

  • cfg
cfg_parser.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_PARSER_H
00039 #define CFG_PARSER_H
00040
00046 #define CONFIG_PARSER_MAX_ARGS       4
00047
00053 #define CONFIG_MAX_COMMANDS_NUMBER  16
00054
00061 #define CONFIG_ENABLE_COMPAT_BEHAVIOUR 1
00062
00063 #endif /* CFG_PARSER_H */
00064
00065
00066


BeRTOS: cfg_phase.h File Reference

  • cfg
Defines
cfg_phase.h File Reference

Configuration file for phase module. More...

Go to the source code of this file.

Defines

#define | CONFIG_TRIAC_MAX_DUTY 100
Max value of the duty cycle on triac.
#define | CONFIG_TRIAC_MAX_POWER 100
Max value of the triac power.

Detailed Description

Configuration file for phase module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_phase.h.


BeRTOS: cfg_phase.h Source File

  • cfg
cfg_phase.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_PHASE_H
00039 #define CFG_PHASE_H
00040
00046 #define CONFIG_TRIAC_MAX_DUTY  100
00047
00053 #define CONFIG_TRIAC_MAX_POWER 100
00054
00055 #endif /* CFG_PHASE_H */


BeRTOS: cfg_pid.h File Reference

  • cfg
Defines
cfg_pid.h File Reference

Configuration file for PWM module. More...

Go to the source code of this file.

Defines

#define | PID_LOG_LEVEL LOG_LVL_WARN
Module logging level.
#define | PID_LOG_FORMAT LOG_FMT_VERBOSE
Module logging format.

Detailed Description

Configuration file for PWM module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_pid.h.


BeRTOS: cfg_pid.h Source File

  • cfg
cfg_pid.h
Go to the documentation of this file.
00001
00037 #ifndef CFG_PID_H
00038 #define CFG_PID_H
00039
00046 #define PID_LOG_LEVEL      LOG_LVL_WARN
00047
00054 #define PID_LOG_FORMAT     LOG_FMT_VERBOSE
00055
00056 #endif /* CFG_PID_H */


BeRTOS: cfg_pocketbus.h File Reference

  • cfg
Defines
cfg_pocketbus.h File Reference

Configuration file for pocketbus module. More...

Go to the source code of this file.

Defines

#define | POCKETBUS_LOG_LEVEL LOG_LVL_ERR
Module logging level.
#define | POCKETBUS_LOG_FORMAT LOG_FMT_TERSE
Module logging format.
#define | CONFIG_POCKETBUS_BUFLEN 128
Buffer len for pockebus protocol.
#define | CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50
Command replay timeout in milliseconds.

Detailed Description

Configuration file for pocketbus module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_pocketbus.h.


BeRTOS: cfg_pocketbus.h Source File

  • cfg
cfg_pocketbus.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_POCKETBUS_H
00039 #define CFG_POCKETBUS_H
00040
00047 #define POCKETBUS_LOG_LEVEL      LOG_LVL_ERR
00048
00055 #define POCKETBUS_LOG_FORMAT     LOG_FMT_TERSE
00056
00057
00063 #define CONFIG_POCKETBUS_BUFLEN     128
00064
00069 #define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT   50
00070
00071 #endif /* CFG_POCKETBUS_H */


BeRTOS: cfg_proc.h File Reference

  • cfg
Defines
cfg_proc.h File Reference

Kernel configuration parameters. More...

Go to the source code of this file.

Defines

#define | CONFIG_KERN 0
Enable the multithreading kernel.
#define | CONFIG_KERN_IRQ 0
Kernel interrupt supervisor.
#define | CONFIG_KERN_PREEMPT 0
Preemptive process scheduling.
#define | CONFIG_KERN_QUANTUM 11
Time sharing quantum (a prime number prevents interference effects) [ms].
#define | CONFIG_KERN_PRI 0
Priority-based scheduling policy.
#define | CONFIG_KERN_HEAP 0
Dynamic memory allocation for processes.
#define | CONFIG_KERN_HEAP_SIZE 2048L
Size of the dynamic memory pool used by processes.
#define | KERN_LOG_LEVEL LOG_LVL_ERR
Module logging level.
#define | KERN_LOG_FORMAT LOG_FMT_VERBOSE
Module logging format.

Detailed Description

Kernel configuration parameters.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file cfg_proc.h.

Define Documentation

#define CONFIG_KERN_IRQ 0

Kernel interrupt supervisor.

WARNING: Experimental, still incomplete!

Definition at line 53 of file cfg_proc.h.


BeRTOS: cfg_proc.h Source File

  • cfg
cfg_proc.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_PROC_H
00039 #define CFG_PROC_H
00040
00046 #define CONFIG_KERN 0
00047
00053 #define CONFIG_KERN_IRQ 0
00054
00061 #define CONFIG_KERN_PREEMPT 0
00062
00069 #define CONFIG_KERN_QUANTUM 11
00070
00075 #define CONFIG_KERN_PRI 0
00076
00082 #define CONFIG_KERN_HEAP 0
00083
00089 #define CONFIG_KERN_HEAP_SIZE 2048L
00090
00097 #define KERN_LOG_LEVEL LOG_LVL_ERR
00098
00105 #define KERN_LOG_FORMAT LOG_FMT_VERBOSE
00106
00107 #endif /*  CFG_PROC_H */


BeRTOS: cfg_pwm.h File Reference

  • cfg
Defines
cfg_pwm.h File Reference

Configuration file for PWM module. More...

Go to the source code of this file.

Defines

#define | PWM_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | PWM_LOG_FORMAT LOG_FMT_VERBOSE
Module logging format.
#define | CFG_PWM_ENABLE_OLD_API 1
Enable the OLD pwm API.

Detailed Description

Configuration file for PWM module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_pwm.h.

Define Documentation

#define CFG_PWM_ENABLE_OLD_API 1

Enable the OLD pwm API.

Not recommended for new projects.

Definition at line 62 of file cfg_pwm.h.


BeRTOS: cfg_pwm.h Source File

  • cfg
cfg_pwm.h
Go to the documentation of this file.
00001
00037 #ifndef CFG_PWM_H
00038 #define CFG_PWM_H
00039
00046 #define PWM_LOG_LEVEL      LOG_LVL_INFO
00047
00054 #define PWM_LOG_FORMAT     LOG_FMT_VERBOSE
00055
00062 #define CFG_PWM_ENABLE_OLD_API  1
00063
00064 #endif /* CFG_PWM_H */


BeRTOS: cfg_ramp.h File Reference

  • cfg
Defines
cfg_ramp.h File Reference

Configuration file Ramp algorithm module. More...

Go to the source code of this file.

Defines

#define | RAMP_USE_FLOATING_POINT 0
Define whether the ramp will use floating point calculation within ramp_evaluate().
#define | RAMP_CLOCK_SHIFT_PRECISION 2
Number of least-significant bits which are stripped away during ramp evaluation.
#define | RAMP_PULSE_WIDTH 50
Negative pulse width for ramp.
#define | RAMP_DEF_TIME 6000000UL
Default ramp time (microsecs).
#define | RAMP_DEF_MAXFREQ 5000
Default ramp maxfreq (Hz).
#define | RAMP_DEF_MINFREQ 200
Default ramp minfreq (Hz).
#define | RAMP_DEF_POWERRUN 10
Default ramp powerrun (deciampere).
#define | RAMP_DEF_POWERIDLE 1
Default ramp poweridle (Hz).

Detailed Description

Configuration file Ramp algorithm module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_ramp.h.

Define Documentation

#define RAMP_CLOCK_SHIFT_PRECISION 2

Number of least-significant bits which are stripped away during ramp evaluation.

This setting allows to specify larger ramps at the price of less precision.

The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 brings the maximum length to 13.4 secs, at the price of less precision.

ramp_compute() will check that the length is below the maximum allowed through a runtime assertion.

Note:
This macro is used only for the fixed-point version of the ramp.

Definition at line 73 of file cfg_ramp.h.

#define RAMP_USE_FLOATING_POINT 0

Define whether the ramp will use floating point calculation within ramp_evaluate().

Otherwise, a less precise fixed point version will be used, which is faster on platforms which do no support floating point operations.

Note:
Floating point operations will be always done within ramp_compute() to precalculate values, so there has to be at least a floating point emulation support.

Definition at line 51 of file cfg_ramp.h.


BeRTOS: cfg_ramp.h Source File

  • cfg
cfg_ramp.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_RAMP_H
00039 #define CFG_RAMP_H
00040
00051 #define RAMP_USE_FLOATING_POINT   0
00052
00053
00054 #if !RAMP_USE_FLOATING_POINT
00055
00073     #define RAMP_CLOCK_SHIFT_PRECISION 2
00074 #endif
00075
00076
00082 #define RAMP_PULSE_WIDTH    50
00083
00089 #define RAMP_DEF_TIME     6000000UL
00090
00095 #define RAMP_DEF_MAXFREQ       5000
00096
00101 #define RAMP_DEF_MINFREQ        200
00102
00107 #define RAMP_DEF_POWERRUN        10
00108
00113 #define RAMP_DEF_POWERIDLE        1
00114
00115 #endif /* CFG_RAMP_H */


BeRTOS: cfg_random.h File Reference

  • cfg
Defines
cfg_random.h File Reference

Configuration file for the "random" module. More...

Go to the source code of this file.

Defines

#define | RANDOM_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | RANDOM_LOG_FORMAT LOG_FMT_TERSE
module logging format.
#define | RANDOM_SECURITY_LEVEL RANDOM_SECURITY_MINIMUM
Random security level.

Detailed Description

Configuration file for the "random" module.

Author:
Andrea Righi <arighi@develer.com>

Definition in file cfg_random.h.


BeRTOS: cfg_random.h Source File

  • cfg
cfg_random.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_RANDOM_H
00039 #define CFG_RANDOM_H
00040
00047 #define RANDOM_LOG_LEVEL      LOG_LVL_INFO
00048
00055 #define RANDOM_LOG_FORMAT     LOG_FMT_TERSE
00056
00063 #define RANDOM_SECURITY_LEVEL          RANDOM_SECURITY_MINIMUM
00064
00065 #endif /* CFG_RANDOM_H */


BeRTOS: cfg_randpool.h File Reference

  • cfg
Defines
cfg_randpool.h File Reference

Configuration file for randpool module. More...

Go to the source code of this file.

Defines

#define | CONFIG_SIZE_ENTROPY_POOL 64
Define a size, in byte, of entropy pool.
#define | CONFIG_RANDPOOL_TIMER 1
Enable timer in randpool algo.

Detailed Description

Configuration file for randpool module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_randpool.h.


BeRTOS: cfg_randpool.h Source File

  • cfg
cfg_randpool.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_RANDPOOL_H
00040 #define CFG_RANDPOOL_H
00041
00042
00048 #define CONFIG_SIZE_ENTROPY_POOL   64
00049
00051 #define CONFIG_RANDPOOL_TIMER       1
00052
00053 #endif /* CFG_RANDPOOL_H */
00054
00055


BeRTOS: cfg_sd.h File Reference

  • cfg
Defines
cfg_sd.h File Reference

Configuration file Secure Digital module. More...

Go to the source code of this file.

Defines

#define | SD_LOG_LEVEL LOG_LVL_ERR
Module logging level.
#define | SD_LOG_FORMAT LOG_FMT_VERBOSE
Module logging format.
#define | CONFIG_SD_AUTOASSIGN_FAT 1
Enable autoassignment of SD driver to disk drive number 0 of FatFs module.
#define | CONFIG_SD_OLD_INIT 1
Enable backward compatibility for sd_init().

Detailed Description

Configuration file Secure Digital module.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file cfg_sd.h.

Define Documentation

#define CONFIG_SD_OLD_INIT 1

Enable backward compatibility for sd_init().

If enabled, sd_init() will allocate internally an Sd context, otherwise sd_init() will need the context to be passed explicitly.

Definition at line 73 of file cfg_sd.h.


BeRTOS: cfg_sd.h Source File

  • cfg
cfg_sd.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_SD_H
00040 #define CFG_SD_H
00041
00048 #define SD_LOG_LEVEL      LOG_LVL_ERR
00049
00056 #define SD_LOG_FORMAT     LOG_FMT_VERBOSE
00057
00058
00064 #define CONFIG_SD_AUTOASSIGN_FAT   1
00065
00073 #define CONFIG_SD_OLD_INIT   1
00074
00075 #endif /* CFG_SD_H */


BeRTOS: cfg_sem.h File Reference

  • cfg
Defines
cfg_sem.h File Reference

Kernel semaphores configuration parameters. More...

Go to the source code of this file.

Defines

#define CONFIG_KERN_SEMAPHORES 0
Re-entrant mutual exclusion primitives.

Detailed Description

Kernel semaphores configuration parameters.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file cfg_sem.h.


BeRTOS: cfg_sem.h Source File

  • cfg
cfg_sem.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_SEM_H
00039 #define CFG_SEM_H
00040
00045 #define CONFIG_KERN_SEMAPHORES  0
00046
00047 #endif /*  CFG_SEM_H */


BeRTOS: cfg_ser.h File Reference

  • cfg
Defines
cfg_ser.h File Reference

Configuration file for serial module. More...

Go to the source code of this file.

Defines

#define | CONFIG_UART0_TXBUFSIZE 32
Example of setting for serial port and spi port.
#define | CONFIG_UART0_RXBUFSIZE 32
Size of the inbound FIFO buffer for port 0 [bytes].
#define | CONFIG_UART1_TXBUFSIZE 32
Size of the outbound FIFO buffer for port 1 [bytes].
#define | CONFIG_UART1_RXBUFSIZE 32
Size of the inbound FIFO buffer for port 1 [bytes].
#define | CONFIG_UART2_TXBUFSIZE 32
Size of the outbound FIFO buffer for port 2 [bytes].
#define | CONFIG_UART2_RXBUFSIZE 32
Size of the inbound FIFO buffer for port 2 [bytes].
#define | CONFIG_UART3_TXBUFSIZE 32
Size of the outbound FIFO buffer for port 3 [bytes].
#define | CONFIG_UART3_RXBUFSIZE 32
Size of the inbound FIFO buffer for port 3 [bytes].
#define | CONFIG_SPI_TXBUFSIZE 32
Size of the outbound FIFO buffer for SPI port [bytes].
#define | CONFIG_SPI_RXBUFSIZE 32
Size of the inbound FIFO buffer for SPI port [bytes].
#define | CONFIG_SPI0_TXBUFSIZE 32
Size of the outbound FIFO buffer for SPI port 0 [bytes].
#define | CONFIG_SPI0_RXBUFSIZE 32
Size of the inbound FIFO buffer for SPI port 0 [bytes].
#define | CONFIG_SPI1_TXBUFSIZE 32
Size of the outbound FIFO buffer for SPI port 1 [bytes].
#define | CONFIG_SPI1_RXBUFSIZE 32
Size of the inbound FIFO buffer for SPI port 1 [bytes].
#define | CONFIG_SPI_DATA_ORDER SER_MSB_FIRST
SPI data order.
#define | CONFIG_SPI_CLOCK_DIV 16
SPI clock division factor.
#define | CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW
SPI clock polarity: normal low or normal high.
#define | CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE
SPI clock phase you can choose sample on first edge or sample on second clock edge.
#define | CONFIG_SER_TXTIMEOUT -1
Default transmit timeout (ms).
#define | CONFIG_SER_RXTIMEOUT -1
Default receive timeout (ms).
#define | CONFIG_SER_HWHANDSHAKE 0
Use RTS/CTS handshake.
#define | CONFIG_SER_DEFBAUDRATE 0UL
Default baudrate for all serial ports (set to 0 to disable).
#define | CONFIG_SER_STROBE 0
Enable strobe pin for debugging serial interrupt.

Detailed Description

Configuration file for serial module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_ser.h.

Define Documentation

#define CONFIG_SER_RXTIMEOUT -1

Default receive timeout (ms).

Set to -1 to disable timeout support.

Definition at line 203 of file cfg_ser.h.

#define CONFIG_SER_STROBE 0

Enable strobe pin for debugging serial interrupt.

This is a debug facility that can be used to monitor SER interrupt activity on an external pin.

To use strobes, redefine the macros SER_STROBE_ON, SER_STROBE_OFF and SER_STROBE_INIT and set CONFIG_SER_STROBE to 1.

#define CONFIG_SER_TXTIMEOUT -1

Default transmit timeout (ms).

Set to -1 to disable timeout support.

Definition at line 196 of file cfg_ser.h.

#define CONFIG_UART0_TXBUFSIZE 32

Example of setting for serial port and spi port.

Edit these define for your project. Size of the outbound FIFO buffer for port 0 [bytes].

Definition at line 52 of file cfg_ser.h.


BeRTOS: cfg_ser.h Source File

  • cfg
cfg_ser.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_SER_H
00039 #define CFG_SER_H
00040
00052 #define CONFIG_UART0_TXBUFSIZE  32
00053
00059 #define CONFIG_UART0_RXBUFSIZE  32
00060
00067 #define CONFIG_UART1_TXBUFSIZE  32
00068
00075 #define CONFIG_UART1_RXBUFSIZE  32
00076
00083 #define CONFIG_UART2_TXBUFSIZE  32
00084
00091 #define CONFIG_UART2_RXBUFSIZE  32
00092
00099 #define CONFIG_UART3_TXBUFSIZE  32
00100
00107 #define CONFIG_UART3_RXBUFSIZE  32
00108
00109
00116 #define CONFIG_SPI_TXBUFSIZE    32
00117
00124 #define CONFIG_SPI_RXBUFSIZE    32
00125
00132 #define CONFIG_SPI0_TXBUFSIZE   32
00133
00140 #define CONFIG_SPI0_RXBUFSIZE   32
00141
00148 #define CONFIG_SPI1_TXBUFSIZE   32
00149
00156 #define CONFIG_SPI1_RXBUFSIZE   32
00157
00165 #define CONFIG_SPI_DATA_ORDER   SER_MSB_FIRST
00166
00172 #define CONFIG_SPI_CLOCK_DIV    16
00173
00180 #define CONFIG_SPI_CLOCK_POL        SPI_NORMAL_LOW
00181
00189 #define CONFIG_SPI_CLOCK_PHASE      SPI_SAMPLE_ON_FIRST_EDGE
00190
00196 #define CONFIG_SER_TXTIMEOUT    -1
00197
00203 #define CONFIG_SER_RXTIMEOUT    -1
00204
00210 #define CONFIG_SER_HWHANDSHAKE   0
00211
00217 #define CONFIG_SER_DEFBAUDRATE   0UL
00218
00220 #define CONFIG_SER_STROBE        0
00221
00222 #endif /* CFG_SER_H */


BeRTOS: cfg_signal.h File Reference

  • cfg
Defines
cfg_signal.h File Reference

Kernel signals configuration parameters. More...

Go to the source code of this file.

Defines

#define CONFIG_KERN_SIGNALS 0
Inter-process signals.

Detailed Description

Kernel signals configuration parameters.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file cfg_signal.h.


BeRTOS: cfg_signal.h Source File

  • cfg
cfg_signal.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_SIGNAL_H
00039 #define CFG_SIGNAL_H
00040
00045 #define CONFIG_KERN_SIGNALS 0
00046
00047 #endif /*  CFG_SIGNAL_H */


BeRTOS: cfg_spi_bitbang.h File Reference

  • cfg
Defines
cfg_spi_bitbang.h File Reference

Configuration file for SPI bitbang module. More...

Go to the source code of this file.

Defines

#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST
Set data order for emulated SPI.

Detailed Description

Configuration file for SPI bitbang module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_spi_bitbang.h.


BeRTOS: cfg_spi_bitbang.h Source File

  • cfg
cfg_spi_bitbang.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_SPI_BITBANG_H
00040 #define CFG_SPI_BITBANG_H
00041
00048 #define CONFIG_SPI_DATAORDER  SPI_LSB_FIRST
00049
00050 #endif /* CFG_SPI_BITBANG_H */
00051


BeRTOS: cfg_spi_dma.h File Reference

  • cfg
Defines
cfg_spi_dma.h File Reference

Configuration file for spi dma module. More...

Go to the source code of this file.

Defines

#define | CONFIG_SPI_DMA_MAX_RX 512
Max size received for each DMA transfer [bytes].
#define | CONFIG_SPI_DMA_TX_TIMEOUT -1
Default transmit timeout (ms).

Detailed Description

Configuration file for spi dma module.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file cfg_spi_dma.h.

Define Documentation

#define CONFIG_SPI_DMA_MAX_RX 512

Max size received for each DMA transfer [bytes].

Longer buffers will be split in two or more transfers of this size.

Definition at line 49 of file cfg_spi_dma.h.

#define CONFIG_SPI_DMA_TX_TIMEOUT -1

Default transmit timeout (ms).

Set to -1 to disable timeout support.

Definition at line 57 of file cfg_spi_dma.h.


BeRTOS: cfg_spi_dma.h Source File

  • cfg
cfg_spi_dma.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_SPI_DMA_H
00040 #define CFG_SPI_DMA_H
00041
00042
00049 #define CONFIG_SPI_DMA_MAX_RX  512
00050
00051
00057 #define CONFIG_SPI_DMA_TX_TIMEOUT    -1
00058
00059
00060 #endif /* CFG_SER_H */


BeRTOS: cfg_stepper.h File Reference

  • cfg
Defines
cfg_stepper.h File Reference

Configuration file for stepper motor module. More...

Go to the source code of this file.

Defines

#define | STEPPER_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | STEPPER_LOG_FORMAT LOG_FMT_TERSE
Module logging format.
#define | CONFIG_NUM_STEPPER_MOTORS 6
Max number of the stepper motor.
#define | CONFIG_TC_STEPPER_MAX_NUM 6
Max number of the timer usable on target to drive stepper motor.

Detailed Description

Configuration file for stepper motor module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_stepper.h.


BeRTOS: cfg_stepper.h Source File

  • cfg
cfg_stepper.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_STEPPER_H
00039 #define CFG_STEPPER_H
00040
00046 #define STEPPER_LOG_LEVEL           LOG_LVL_INFO
00047
00053 #define STEPPER_LOG_FORMAT          LOG_FMT_TERSE
00054
00060 #define CONFIG_NUM_STEPPER_MOTORS    6
00061
00067 #define CONFIG_TC_STEPPER_MAX_NUM    6
00068
00069 #endif /* CFG_STEPPER_H */


BeRTOS: cfg_tas5706a.h File Reference

  • cfg
Defines
cfg_tas5706a.h File Reference

Configuration file for the TAS5706A module. More...

Go to the source code of this file.

Defines

#define CONFIG_TAS_MAX_VOL -39
Maximum output volume for TAS chip [dB].

Detailed Description

Configuration file for the TAS5706A module.

Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file cfg_tas5706a.h.


BeRTOS: cfg_tas5706a.h Source File

  • cfg
cfg_tas5706a.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_TAS5706A_H
00039 #define CFG_TAS5706A_H
00040
00048 #define CONFIG_TAS_MAX_VOL  -39
00049
00050 #endif /* CFG_TAS5706A_H */


BeRTOS: cfg_tftp.h Source File

  • cfg
cfg_tftp.h
00001 #ifndef CFG_TFTP_H
00002 #define CFG_TFTP_H
00003
00010 #define TFTP_LOG_LEVEL    LOG_LVL_WARN
00011
00018 #define TFTP_LOG_FORMAT   LOG_FMT_VERBOSE
00019
00020 #endif /* CFG_TFTP_H */


BeRTOS: cfg_thermo.h File Reference

  • cfg
Defines
cfg_thermo.h File Reference

Configuration file for thermo module. More...

Go to the source code of this file.

Defines

#define | CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR
Module logging level.
#define | CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE
Module logging format.
#define | CONFIG_THERMO_INTERVAL_MS 100
Interval at which thermo control is performed [ms].
#define | CONFIG_THERMO_HIFI_NUM_SAMPLES 10
Number of different samples we interpolate over to get the hifi temperature.

Detailed Description

Configuration file for thermo module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_thermo.h.


BeRTOS: cfg_thermo.h Source File

  • cfg
cfg_thermo.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_THERMO_H
00039 #define CFG_THERMO_H
00040
00046 #define CONFIG_THERMO_LOG_LEVEL        LOG_LVL_ERR
00047
00052 #define CONFIG_THERMO_LOG_FORMAT       LOG_FMT_TERSE
00053
00054
00061 #define CONFIG_THERMO_INTERVAL_MS        100
00062
00069 #define CONFIG_THERMO_HIFI_NUM_SAMPLES    10
00070
00071 #endif /* CFG_THERMO_H */


BeRTOS: cfg_timer.h File Reference

  • cfg
Defines
cfg_timer.h File Reference

Configuration file for timer module. More...

Go to the source code of this file.

Defines

#define | CONFIG_TIMER TIMER_DEFAULT
Hardware timer selection for drv/timer.c.
#define | CONFIG_TIMER_STROBE 0
Debug timer interrupt using a strobe pin.
#define | CONFIG_TIMER_EVENTS 1
Enable asynchronous timers.
#define | CONFIG_TIMER_UDELAY 1
Support hi-res timer_usleep().

Detailed Description

Configuration file for timer module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_timer.h.

Define Documentation

#define CONFIG_TIMER_STROBE 0

Debug timer interrupt using a strobe pin.

This is a debug facility that can be used to monitor timer interrupt activity on an external pin.

To use strobes, redefine the macros TIMER_STROBE_ON, TIMER_STROBE_OFF and TIMER_STROBE_INIT and set CONFIG_TIMER_STROBE to 1.


BeRTOS: cfg_timer.h Source File

  • cfg
cfg_timer.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_TIMER_H
00040 #define CFG_TIMER_H
00041
00047 #define CONFIG_TIMER TIMER_DEFAULT
00048
00053 #define CONFIG_TIMER_STROBE  0
00054
00059 #define CONFIG_TIMER_EVENTS  1
00060
00065 #define CONFIG_TIMER_UDELAY  1
00066
00067 #endif /* CFG_TIMER_H */


BeRTOS: cfg_usb.h File Reference

  • cfg
Defines
cfg_usb.h File Reference

Configuration file for the USB driver module. More...

Go to the source code of this file.

Defines

#define | USB_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | USB_LOG_FORMAT LOG_FMT_TERSE
module logging format.
#define | CONFIG_USB_BUFSIZE 64
Size of the USB buffer used for endpoint transfers [bytes].
#define | CONFIG_USB_INTERFACE_MAX 1
Maximum number of USB device interfaces (default = 1).
#define | CONFIG_USB_EP_MAX 0
Maximum number of allocated endpoints (0 = auto).
#define | CONFIG_EP0_MAX_SIZE 8
Maximum packet size of the control endpoint 0 [bytes].

Detailed Description

Configuration file for the USB driver module.

Author:
Andrea Righi <arighi@develer.com>

Definition in file cfg_usb.h.


BeRTOS: cfg_usb.h Source File

  • cfg
cfg_usb.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_USB_H
00039 #define CFG_USB_H
00040
00047 #define USB_LOG_LEVEL      LOG_LVL_INFO
00048
00055 #define USB_LOG_FORMAT     LOG_FMT_TERSE
00056
00062 #define CONFIG_USB_BUFSIZE  64
00063
00069 #define CONFIG_USB_INTERFACE_MAX  1
00070
00076 #define CONFIG_USB_EP_MAX  0
00077
00083 #define CONFIG_EP0_MAX_SIZE 8
00084
00085 #endif /* CFG_USB_H */


BeRTOS: cfg_usbkbd.h File Reference

  • cfg
Defines
cfg_usbkbd.h File Reference

Configuration file for the usbkbd driver module. More...

Go to the source code of this file.

Defines

#define | CONFIG_USBKBD 0
Enable the usbkbd module.
#define | USB_KEYBOARD_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | USB_KEYBOARD_LOG_FORMAT LOG_FMT_TERSE
module logging format.
#define | USB_KEYBOARD_VENDOR_ID 0x046d
USB vendor ID (please change this in your project, using a valid ID number!).
#define | USB_KEYBOARD_PRODUCT_ID 0xffff
USB product ID (please change this in your project, using a valid ID number!).

Detailed Description

Configuration file for the usbkbd driver module.

Author:
Andrea Righi <arighi@develer.com>

Definition in file cfg_usbkbd.h.


BeRTOS: cfg_usbkbd.h Source File

  • cfg
cfg_usbkbd.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_USBKBD_H
00039 #define CFG_USBKBD_H
00040
00046 #define CONFIG_USBKBD 0
00047
00054 #define USB_KEYBOARD_LOG_LEVEL      LOG_LVL_INFO
00055
00062 #define USB_KEYBOARD_LOG_FORMAT     LOG_FMT_TERSE
00063
00069 #define USB_KEYBOARD_VENDOR_ID      0x046d
00070
00076 #define USB_KEYBOARD_PRODUCT_ID     0xffff
00077
00078 #endif /* CFG_USB_KEYBOARD_H */


BeRTOS: cfg_usbmouse.h File Reference

  • cfg
Defines
cfg_usbmouse.h File Reference

Configuration file for the usbmouse driver module. More...

Go to the source code of this file.

Defines

#define | CONFIG_USBMOUSE 0
Enable the usbmouse module.
#define | USB_MOUSE_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | USB_MOUSE_LOG_FORMAT LOG_FMT_TERSE
module logging format.
#define | USB_MOUSE_VENDOR_ID 0xffff
USB vendor ID (please change this in your project, using a valid ID number!).
#define | USB_MOUSE_PRODUCT_ID 0x0000
USB product ID (please change this in your project, using a valid ID number!).

Detailed Description

Configuration file for the usbmouse driver module.

Author:
Andrea Righi <arighi@develer.com>

Definition in file cfg_usbmouse.h.


BeRTOS: cfg_usbmouse.h Source File

  • cfg
cfg_usbmouse.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_USBMOUSE_H
00039 #define CFG_USBMOUSE_H
00040
00046 #define CONFIG_USBMOUSE 0
00047
00054 #define USB_MOUSE_LOG_LEVEL      LOG_LVL_INFO
00055
00062 #define USB_MOUSE_LOG_FORMAT     LOG_FMT_TERSE
00063
00069 #define USB_MOUSE_VENDOR_ID      0xffff
00070
00076 #define USB_MOUSE_PRODUCT_ID     0x0000
00077
00078 #endif /* CFG_USBMOUSE_H */


BeRTOS: cfg_usbser.h File Reference

  • cfg
Defines
cfg_usbser.h File Reference

Configuration file for the USB serial driver module. More...

Go to the source code of this file.

Defines

#define | CONFIG_USBSER 0
Enable the usb-serial module.
#define | USB_SERIAL_LOG_LEVEL LOG_LVL_INFO
Module logging level.
#define | USB_SERIAL_LOG_FORMAT LOG_FMT_TERSE
module logging format.
#define | USB_SERIAL_VENDOR_ID 0x05f9
USB vendor ID (please change this in your project, using a valid ID number!).
#define | USB_SERIAL_PRODUCT_ID 0xffff
USB product ID (please change this in your project, using a valid ID number!).

Detailed Description

Configuration file for the USB serial driver module.

Author:
Andrea Righi <arighi@develer.com>

Definition in file cfg_usbser.h.


BeRTOS: cfg_usbser.h Source File

  • cfg
cfg_usbser.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_USBSER_H
00039 #define CFG_USBSER_H
00040
00046 #define CONFIG_USBSER 0
00047
00054 #define USB_SERIAL_LOG_LEVEL      LOG_LVL_INFO
00055
00062 #define USB_SERIAL_LOG_FORMAT     LOG_FMT_TERSE
00063
00069 #define USB_SERIAL_VENDOR_ID      0x05f9
00070
00076 #define USB_SERIAL_PRODUCT_ID     0xffff
00077
00078 #endif /* CFG_USBSER_H */


BeRTOS: cfg_wdt.h File Reference

  • cfg
Defines
cfg_wdt.h File Reference

Configuration file for watchdog module. More...

Go to the source code of this file.

Defines

#define CONFIG_WATCHDOG 0
Enable watchdog timer.

Detailed Description

Configuration file for watchdog module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_wdt.h.


BeRTOS: cfg_wdt.h Source File

  • cfg
cfg_wdt.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_WDT_H
00040 #define CFG_WDT_H
00041
00043 #define CONFIG_WATCHDOG      0
00044
00045 #endif /* CFG_WDT_H */
00046
00047


BeRTOS: cfg_xmodem.h File Reference

  • cfg
Defines
cfg_xmodem.h File Reference

Configuration file for xmodem module. More...

Go to the source code of this file.

Defines

#define | CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR
Module logging level.
#define | CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE
Module logging format.
#define | CONFIG_XMODEM_RECV 1
Enable Rx.
#define | CONFIG_XMODEM_SEND 1
Enable TX.
#define | CONFIG_XMODEM_1KCRC 1
Allow a Rx/Tx of 1Kbyte block.
#define | CONFIG_XMODEM_MAXRETRIES 15
Max retries before giving up.
#define | CONFIG_XMODEM_MAXCRCRETRIES 7
Max retries before switching to BCC.

Detailed Description

Configuration file for xmodem module.

Author:
Daniele Basile <asterix@develer.com>

Definition in file cfg_xmodem.h.


BeRTOS: cfg_xmodem.h Source File

  • cfg
cfg_xmodem.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_XMODEM_H
00039 #define CFG_XMODEM_H
00040
00046 #define CONFIG_XMODEM_LOG_LEVEL        LOG_LVL_ERR
00047
00052 #define CONFIG_XMODEM_LOG_FORMAT       LOG_FMT_TERSE
00053
00054
00056 #define CONFIG_XMODEM_RECV   1
00057
00059 #define CONFIG_XMODEM_SEND   1
00060
00062 #define CONFIG_XMODEM_1KCRC  1
00063
00069 #define CONFIG_XMODEM_MAXRETRIES     15
00070
00076 #define CONFIG_XMODEM_MAXCRCRETRIES   7
00077
00078 #endif /* CFG_XMODEM_H */
00079


BeRTOS: charts.c File Reference

  • gfx
Functions
charts.c File Reference

Simple charts on top of mware/gfx routines (implementation). More...

#include "charts.h"
#include <gfx/gfx.h>

Go to the source code of this file.

Functions

void | chart_drawAxis (Bitmap *bm)
Draw the chart axes.
void | chart_drawCurve (Bitmap *bm, const chart_y_t *curve_y, int curve_cnt)
Draw a set of curve_cnt connected segments, whose Y coordinates are identified by the curve_y array and X-coordinates are are evenly spaced by one virtual unit.
void | chart_drawDots (Bitmap *bm, const chart_x_t *dots_x, const chart_y_t *dots_y, int cnt)
Disegna dei dot in corrispondenza delle coppie (dotsx[i];dotsy[i]) Se dotsx e' NULL, i punti vengono disegnati ad intervalli regolari.

Detailed Description

Simple charts on top of mware/gfx routines (implementation).

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file charts.c.


BeRTOS: charts.c Source File

  • gfx
charts.c
Go to the documentation of this file.
00001
00040 #include "charts.h"
00041 #include <gfx/gfx.h>
00042
00043
00044 #ifndef CONFIG_CHART_ARROWS
00045 #define CONFIG_CHART_ARROWS 0
00046 #endif
00047
00048
00049 void chart_init(Bitmap *bm, coord_t xmin, coord_t ymin, coord_t xmax, coord_t ymax)
00050 {
00051     /* Clear the chart area */
00052     gfx_rectClear(bm, xmin, ymin, xmax, ymax);
00053
00054     gfx_setClipRect(bm, xmin + CHART_BORDERLEFT, ymin + CHART_BORDERTOP,
00055         xmax - CHART_BORDERRIGHT, ymax - CHART_BORDERBOTTOM);
00056
00057     chart_drawAxis(bm);
00058 }
00059
00060
00061 void chart_setScale(Bitmap *bm, chart_x_t xmin, chart_y_t ymin, chart_x_t xmax, chart_y_t ymax)
00062 {
00063     gfx_setViewRect(bm, xmin, ymin, xmax, ymax);
00064 }
00065
00066
00070 void chart_drawAxis(Bitmap *bm)
00071 {
00072 #if CONFIG_CHART_ARROWS
00073
00074     /* Draw axis */
00075     gfx_moveTo(bm, bm->cr.xmin, bm->cr.ymin + 4);
00076     gfx_lineTo(bm, bm->cr.xmin, bm->cr.ymax - 1);
00077     gfx_lineTo(bm, bm->cr.xmax - 4 - 1, bm->cr.ymax - 1);
00078
00079     /* Draw up arrow */
00080     gfx_moveTo(bm, bm->cr.xmin - 2, bm->cr.ymin + 3);
00081     gfx_lineTo(bm, bm->cr.xmin + 2, bm->cr.ymin + 3);
00082     gfx_lineTo(bm, bm->cr.xmin, bm->cr.ymin);
00083     gfx_lineTo(bm, bm->cr.xmin - 2, bm->cr.ymin + 3);
00084
00085     /* Draw right arrow */
00086     gfx_moveTo(bm, bm->cr.xmax - 4, bm->cr.ymax - 3);
00087     gfx_lineTo(bm, bm->cr.xmax - 4, bm->cr.ymax + 1);
00088     gfx_lineTo(bm, bm->cr.xmax - 1, bm->cr.ymax - 1);
00089     gfx_lineTo(bm, bm->cr.xmax - 4, bm->cr.ymax - 3);
00090
00091 #else /* CONFIG_CHART_ARROWS */
00092
00093     /* Draw a box around the chart */
00094     gfx_rectDraw(bm, bm->cr.xmin, bm->cr.ymin, bm->cr.xmax, bm->cr.ymax);
00095
00096 #endif /* CONFIG_CHART_ARROWS */
00097
00098     //CHECK_WALL(wall_before_raster, WALL_SIZE);
00099     //CHECK_WALL(wall_after_raster, WALL_SIZE);
00100 }
00101
00102
00108 void chart_drawCurve(Bitmap *bm, const chart_y_t *curve_y, int curve_cnt)
00109 {
00110     int i;
00111
00112     gfx_moveTo(bm, gfx_transformX(bm, 0), gfx_transformY(bm, curve_y[0]));
00113
00114     for (i = 1; i < curve_cnt; i++)
00115         gfx_lineTo(bm, gfx_transformX(bm, i), gfx_transformY(bm, curve_y[i]));
00116
00117     //CHECK_WALL(wall_before_raster, WALL_SIZE);
00118     //CHECK_WALL(wall_after_raster, WALL_SIZE);
00119 }
00120
00121
00126 void chart_drawDots(Bitmap *bm, const chart_x_t *dots_x, const chart_y_t *dots_y, int cnt)
00127 {
00128     int i;
00129     coord_t x, y;
00130
00131     for (i = 0; i < cnt; i++)
00132     {
00133         if (dots_x)
00134             x = gfx_transformX(bm, dots_x[i]);
00135         else
00136             x = gfx_transformX(bm, i);
00137
00138         y = gfx_transformY(bm, dots_y[i]);
00139
00140         /* Draw tick over the curve */
00141         gfx_rectFill(bm,
00142             x - TICKS_WIDTH / 2, y - TICKS_HEIGHT / 2,
00143             x + (TICKS_WIDTH + 1) / 2, y + (TICKS_HEIGHT + 1) / 2);
00144
00145         /* Draw vertical line from the curve to the X-axis */
00146         //gfx_drawLine(bm, x, y, x, bm->cr.ymax - 1);
00147     }
00148
00149     //CHECK_WALL(wall_before_raster, WALL_SIZE);
00150     //CHECK_WALL(wall_after_raster, WALL_SIZE);
00151 }
00152


BeRTOS: charts.h File Reference

  • gfx
Functions
charts.h File Reference
#include "cfg/cfg_gfx.h"
#include <gfx/gfx.h>

Go to the source code of this file.

Defines

Width/height of the small ticks drawn over the axes
#define | TICKS_HEIGHT 2
#define | TICKS_WIDTH 2
Chart frame dimensions
#define | CHART_BORDERTOP 0
#define | CHART_BORDERBOTTOM 0
#define | CHART_BORDERLEFT 0
#define | CHART_BORDERRIGHT 0

Functions

void | chart_drawAxis (Bitmap *bm)
Draw the chart axes.
void | chart_drawCurve (Bitmap *bm, const chart_y_t *curve_y, int curve_cnt)
Draw a set of curve_cnt connected segments, whose Y coordinates are identified by the curve_y array and X-coordinates are are evenly spaced by one virtual unit.
void | chart_drawDots (Bitmap *bm, const chart_x_t *dots_x, const chart_y_t *dots_y, int cnt)
Disegna dei dot in corrispondenza delle coppie (dotsx[i];dotsy[i]) Se dotsx e' NULL, i punti vengono disegnati ad intervalli regolari.

Detailed Description

Definition in file charts.h.


BeRTOS: charts.h Source File

  • gfx
charts.h
Go to the documentation of this file.
00001
00057 #ifndef GFX_CHARTS_H
00058 #define GFX_CHARTS_H
00059
00060 #include "cfg/cfg_gfx.h" /* CONFIG_ stuff */
00061
00062 #include <gfx/gfx.h>   /* vcoord_t */
00063
00068 #define TICKS_HEIGHT     2
00069 #define TICKS_WIDTH      2
00070 /*\}*/
00071
00076 #define CHART_BORDERTOP       0
00077 #define CHART_BORDERBOTTOM    0
00078 #define CHART_BORDERLEFT      0
00079 #define CHART_BORDERRIGHT     0
00080 /*\}*/
00081
00082 #ifndef CONFIG_CHART_TYPE_X
00083 #define CONFIG_CHART_TYPE_X vcoord_t
00084 #endif
00085 #ifndef CONFIG_CHART_TYPE_Y
00086 #define CONFIG_CHART_TYPE_Y vcoord_t
00087 #endif
00088
00089
00090 typedef CONFIG_CHART_TYPE_X chart_x_t;
00091 typedef CONFIG_CHART_TYPE_Y chart_y_t;
00092
00093
00094 /* Public function protos */
00095 void chart_init(Bitmap *bm, coord_t xmin, coord_t ymin, coord_t xmax, coord_t ymax);
00096 void chart_setScale(Bitmap *bm, chart_x_t xmin, chart_y_t ymin, chart_x_t xmax, chart_y_t ymax);
00097 void chart_drawAxis(Bitmap *bm);
00098 void chart_drawCurve(Bitmap *bm, const chart_y_t *curve_y, int curve_cnt);
00099 void chart_drawDots(Bitmap *bm, const chart_x_t *dots_x, const chart_y_t *dots_y, int cnt);
00100  //defgroup charts
00102 #endif /* GFX_CHARTS_H */


BeRTOS: cipher.c File Reference

  • sec
Functions
cipher.c File Reference

Generic interface for symmetric block ciphers. More...

#include "cipher.h"
#include <sec/util.h>

Go to the source code of this file.

Functions

void | cipher_cbc_encrypt (BlockCipher *c, void *block)
Encrypt a block (in-place) using the current key in CBC mode.
void | cipher_cbc_decrypt (BlockCipher *c, void *block)
Decrypt a block (in-place) using the current key in CBC mode.
void | cipher_ctr_step (BlockCipher *c, void *block)
Generate the crypted stream block in CTR mode for the current counter, and then bump it.
void | cipher_ctr_encrypt (BlockCipher *c, void *block)
Encrypt a block (in-place) using the current key in CTR mode.
void | cipher_ctr_decrypt (BlockCipher *c, void *block)
Decrypt a block (in-place) using the current key in CTR mode.
void | cipher_ofb_encrypt (BlockCipher *c, void *block)
Encrypt a block (in-place) using the current key in OFB mode.
void | cipher_ofb_decrypt (BlockCipher *c, void *block)
Decrypt a block (in-place) using the current key in OFB mode.

Detailed Description

Generic interface for symmetric block ciphers.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file cipher.c.

Function Documentation

void cipher_ctr_step | ( | BlockCipher * | c,
 |  | void * | block
 | ) |  |

Generate the crypted stream block in CTR mode for the current counter, and then bump it.

This function is basically the core CTR operation, without the final XOR pass with the plaintext or ciphertext. For normal CTR usage, you never need to call it.

Definition at line 67 of file cipher.c.


BeRTOS: cipher.c Source File

  • sec
cipher.c
Go to the documentation of this file.
00001
00038 #include "cipher.h"
00039 #include <sec/util.h>
00040
00041 void cipher_cbc_encrypt(BlockCipher *c, void *block)
00042 {
00043     xor_block(c->buf, c->buf, block, c->block_len);
00044     c->enc_block(c, c->buf);
00045     memcpy(block, c->buf, c->block_len);
00046 }
00047
00048 void cipher_cbc_decrypt(BlockCipher *c, void *block)
00049 {
00050     uint8_t temp[c->block_len];
00051     memcpy(temp, block, c->block_len);
00052
00053     c->dec_block(c, block);
00054     xor_block(block, block, c->buf, c->block_len);
00055
00056     memcpy(c->buf, temp, c->block_len);
00057 }
00058
00059 static void ctr_increment(void *buf, size_t len)
00060 {
00061     uint8_t *data = (uint8_t*)buf;
00062     while (len--)
00063         if (LIKELY(++data[len] != 0))
00064             return;
00065 }
00066
00067 void cipher_ctr_step(BlockCipher *c, void *block)
00068 {
00069     memcpy(block, c->buf, c->block_len);
00070     c->enc_block(c, block);
00071     ctr_increment(c->buf, c->block_len);
00072 }
00073
00074 void cipher_ctr_encrypt(BlockCipher *c, void *block)
00075 {
00076     uint8_t temp[c->block_len];
00077
00078     cipher_ctr_step(c, temp);
00079     xor_block(block, block, temp, c->block_len);
00080
00081     PURGE(temp);
00082 }
00083
00084 void cipher_ctr_decrypt(BlockCipher *c, void *block)
00085 {
00086     cipher_ctr_encrypt(c, block);
00087 }
00088
00089 static void ofb_step(BlockCipher *c)
00090 {
00091     c->enc_block(c, c->buf);
00092 }
00093
00094 void cipher_ofb_encrypt(BlockCipher *c, void *block)
00095 {
00096     ofb_step(c);
00097     xor_block(block, block, c->buf, c->block_len);
00098 }
00099
00100 void cipher_ofb_decrypt(BlockCipher *c, void *block)
00101 {
00102     cipher_ofb_encrypt(c, block);
00103 }


BeRTOS: cipher.h File Reference

  • sec
Functions
cipher.h File Reference

Generic interface for symmetric block ciphers. More...

#include <cfg/compiler.h>
#include <cfg/debug.h>

Go to the source code of this file.

Functions

size_t | cipher_key_len (BlockCipher *c)
Return the key length (in bytes).
size_t | cipher_block_len (BlockCipher *c)
Return the block length (in bytes)
void | cipher_set_key (BlockCipher *c, const void *key)
Set the current key used by the cipher.
void | cipher_set_vkey (BlockCipher *c, const void *key, size_t len)
Set the current key (of variable size) used by the cipher.
void | cipher_ecb_encrypt (BlockCipher *c, void *block)
Encrypt a block (in-place) using the current key in ECB mode.
void | cipher_ecb_decrypt (BlockCipher *c, void *block)
Decrypt a block (in-place) using the current key in ECB mode.
void | cipher_cbc_begin (BlockCipher *c, void *iv)
Initialize CBC by setting the IV.
void | cipher_cbc_encrypt (BlockCipher *c, void *block)
Encrypt a block (in-place) using the current key in CBC mode.
void | cipher_cbc_decrypt (BlockCipher *c, void *block)
Decrypt a block (in-place) using the current key in CBC mode.
void | cipher_ctr_begin (BlockCipher *c, void *counter)
Initialize CTR by setting the counter.
void | cipher_ctr_encrypt (BlockCipher *c, void *block)
Encrypt a block (in-place) using the current key in CTR mode.
void | cipher_ctr_decrypt (BlockCipher *c, void *block)
Decrypt a block (in-place) using the current key in CTR mode.
void | cipher_ctr_step (BlockCipher *c, void *block)
Generate the crypted stream block in CTR mode for the current counter, and then bump it.
void | cipher_ofb_begin (BlockCipher *c, void *iv)
Initialize OFB by setting the IV.
void | cipher_ofb_encrypt (BlockCipher *c, void *block)
Encrypt a block (in-place) using the current key in OFB mode.
void | cipher_ofb_decrypt (BlockCipher *c, void *block)
Decrypt a block (in-place) using the current key in OFB mode.

Detailed Description

Generic interface for symmetric block ciphers.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file cipher.h.

Function Documentation

void cipher_cbc_begin | ( | BlockCipher * | c,
 |  | void * | iv
 | ) |  | [inline]

Initialize CBC by setting the IV.

Note:
the memory pointed by iv will be used and modified by the CBC functions. It is caller's responsibility to keep it available until there is no more CBC work to do.

Definition at line 138 of file cipher.h.

void cipher_ctr_begin | ( | BlockCipher * | c,
 |  | void * | counter
 | ) |  | [inline]

Initialize CTR by setting the counter.

Note:
the memory pointed by counter will be used and modified (incremented) by the CTR functions. It is caller's responsibility to keep it available until there is no more CTR work to do.

Definition at line 166 of file cipher.h.

void cipher_ctr_step | ( | BlockCipher * | c,
 |  | void * | block
 | ) |  |

Generate the crypted stream block in CTR mode for the current counter, and then bump it.

This function is basically the core CTR operation, without the final XOR pass with the plaintext or ciphertext. For normal CTR usage, you never need to call it.

Definition at line 67 of file cipher.c.

size_t cipher_key_len ( BlockCipher * c ) [inline]

Return the key length (in bytes).

In case of ciphers that allow a variabile key size with a fixed state (eg: Blowfish), this returns the preferred key length.

Definition at line 62 of file cipher.h.

void cipher_ofb_begin | ( | BlockCipher * | c,
 |  | void * | iv
 | ) |  | [inline]

Initialize OFB by setting the IV.

Note:
the memory pointed by iv will be used and modified by the CBC functions. It is caller's responsibility to keep it available until there is no more OFB work to do.

Definition at line 203 of file cipher.h.

void cipher_set_key | ( | BlockCipher * | c,
 |  | const void * | key
 | ) |  | [inline]

Set the current key used by the cipher.

Note:
the buffer pointed by key is not modified and it is not needed anymore after this call returns. Its lenght must match the value returned by cipher_key_len().

Definition at line 82 of file cipher.h.

void cipher_set_vkey | ( | BlockCipher * | c,
 |  | const void * | key,
 |  | size_t | len
 | ) |  | [inline]

Set the current key (of variable size) used by the cipher.

This function is useful for ciphers that allow a variable size for the key (even with a fixed state). For all the other ciphers, the length must match the value returned by cipher_key_len().

Note:
the buffer pointed by key is not modified and it is not needed anymore after this call returns.

Definition at line 98 of file cipher.h.


BeRTOS: cipher.h Source File

  • sec
cipher.h
Go to the documentation of this file.
00001
00038 #ifndef SEC_CIPHER_H
00039 #define SEC_CIPHER_H
00040
00041 #include <cfg/compiler.h>
00042 #include <cfg/debug.h>
00043
00044 typedef struct BlockCipher
00045 {
00046     void (*set_key)(struct BlockCipher *c, const void *key, size_t len);
00047     void (*enc_block)(struct BlockCipher *c, void *block);
00048     void (*dec_block)(struct BlockCipher *c, void *block);
00049
00050     void *buf;
00051     uint8_t key_len;
00052     uint8_t block_len;
00053 } BlockCipher;
00054
00055
00062 INLINE size_t cipher_key_len(BlockCipher *c)
00063 {
00064     return c->key_len;
00065 }
00066
00070 INLINE size_t cipher_block_len(BlockCipher *c)
00071 {
00072     return c->block_len;
00073 }
00074
00082 INLINE void cipher_set_key(BlockCipher *c, const void *key)
00083 {
00084     ASSERT(c->set_key);
00085     c->set_key(c, key, c->key_len);
00086 }
00087
00098 INLINE void cipher_set_vkey(BlockCipher *c, const void *key, size_t len)
00099 {
00100     ASSERT(c->set_key);
00101     c->set_key(c, key, len);
00102 }
00103
00104 /*********************************************************************************/
00105 /* ECB mode                                                                      */
00106 /*********************************************************************************/
00107
00111 INLINE void cipher_ecb_encrypt(BlockCipher *c, void *block)
00112 {
00113     ASSERT(c->enc_block);
00114     c->enc_block(c, block);
00115 }
00116
00120 INLINE void cipher_ecb_decrypt(BlockCipher *c, void *block)
00121 {
00122     ASSERT(c->dec_block);
00123     c->dec_block(c, block);
00124 }
00125
00126
00127 /*********************************************************************************/
00128 /* CBC mode                                                                      */
00129 /*********************************************************************************/
00130
00138 INLINE void cipher_cbc_begin(BlockCipher *c, void *iv)
00139 {
00140     c->buf = iv;
00141 }
00142
00146 void cipher_cbc_encrypt(BlockCipher *c, void *block);
00147
00151 void cipher_cbc_decrypt(BlockCipher *c, void *block);
00152
00153
00154
00155 /*********************************************************************************/
00156 /* CTR mode                                                                      */
00157 /*********************************************************************************/
00158
00166 INLINE void cipher_ctr_begin(BlockCipher *c, void *counter)
00167 {
00168     c->buf = counter;
00169 }
00170
00174 void cipher_ctr_encrypt(BlockCipher *c, void *block);
00175
00179 void cipher_ctr_decrypt(BlockCipher *c, void *block);
00180
00189 void cipher_ctr_step(BlockCipher *c, void *block);
00190
00191
00192 /*********************************************************************************/
00193 /* OFB mode                                                                      */
00194 /*********************************************************************************/
00195
00203 INLINE void cipher_ofb_begin(BlockCipher *c, void *iv)
00204 {
00205     c->buf = iv;
00206 }
00207
00211 void cipher_ofb_encrypt(BlockCipher *c, void *block);
00212
00216 void cipher_ofb_decrypt(BlockCipher *c, void *block);
00217
00218
00219 #endif /* SEC_CIPHER_H */


BeRTOS: EmulLCD Class Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Protected Attributes
EmulLCD Class Reference

Qt widget to emulate a dot-matrix LCD display. More...

#include <lcd_lm44_qt.h>

Protected Attributes

int | frame_width
Frame thickness.
QColor | fg_color
Brushes for painting the LCD.
unsigned char | raster [(WIDTH+7/8)*HEIGHT]
Pixel storage.
QFont | lcd_font
Display character font.
QColor | bg_color
LCD colors.
int | font_height
Font dimensions.
int | cr_col
Cursor position.
int | cgramaddr
CGRAM Address (-1 disabled)
unsigned char | ddram [ROWS][COLS]
Display data RAM.
unsigned char | cgram [8 *8]
CGRAM.
bool | show_cursor
Cursor enabled?

Detailed Description

Qt widget to emulate a dot-matrix LCD display.

Definition at line 57 of file lcd_gfx_qt.h.

Field Documentation

int EmulLCD::frame_width [protected]

Frame thickness.

Frame width (and height)

Definition at line 84 of file lcd_gfx_qt.h.

The documentation for this class was generated from the following files:
  • lcd_gfx_qt.h
  • lcd_lm44_qt.h


BeRTOS: EmulTimer Class Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Public Member Functions | Static Public Member Functions | Private Member Functions | Private Attributes
EmulTimer Class Reference

Singleton class for Qt-based hardware timer emulation. More...

Public Member Functions

void | init ()
Start timer emulator.
hptime_t hpread ()
Return current time in high-precision format.

Static Public Member Functions

static EmulTimer & | instance ()
Return singleton instance.

Private Member Functions

EmulTimer ()
Private ctor (singleton)

Private Attributes

QTime | system_time
System timer (counts ms since application startup)
QTimer | timer
The 1ms "hardware" tick counter.
bool | initialized
We deliberately don't use RAII because the real hardware we're simulating needs to be initialized manually.

Detailed Description

Singleton class for Qt-based hardware timer emulation.

Definition at line 56 of file timer_qt.c.

The documentation for this class was generated from the following file:
  • timer_qt.c


BeRTOS: Data Structure Index

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Structure Index
A | B | C | D | E | F | H | I | K | L | M | N | O | P | R | S | T | U | W | _
A
Afsk
ArmSerial
AvrSerial
AX25Call
AX25Ctx
AX25Msg
B
BattFs
BattFsPageHeader
BattFsSuper
Bitmap
C
CardCSD
CmdTemplate
D
DataFlash
DataflashInfo
DCMotor
DCMotorConfig
DFilter
DFilterMap
DNotifier
DTagItem
DWidget
E
Eeprom
EepromInfo
EmulLCD
EmulSerial
EmulTimer
EntropyPool
F
Flash
Flash25
Ft245rl
H
HashIterator
HashTable
Hdlc
Heap
I
Image
K
KbdHandler
KBlock
KFileBlock
KFileDebug
KFileMem
L
Layer
LevelEdit
List
LM3SSSI
M
Md2Context
Menu
MenuItem
Mt29f
N
NmeaGga
nmeap_context
nmeap_gga
nmeap_rmc
nmeap_sentence_t
NmeaRmc
NmeaVtg
Node
NtcHwInfo
O
Observer
P
parms
Pcf8574
PidCfg
PidContext
PocketBusCtx
PocketBusHdr
PocketCmdCtx
PocketCmdHdr
PocketCmdMsg
PocketMsg
PriNode
Pwm
PwmChannel
R
Ramp
RampPrecalc
Rect
KFile
Resource
ResourceWaiter
S
Sd
Serial
SevenSeg
SHA1_Context
Signal
Sipo
Stepper
StepperConfig
stm32_flash
stm32_gpio
SvInfo
SysIrq
T
TagPacket
Timer
TimerCounter
U
UsbConfigDesc
UsbCtrlRequest
UsbDescHeader
UsbDevice
UsbDeviceDesc
UsbEndpointDesc
UsbInterfaceDesc
UsbStringDesc
W
Window
_
__sn_state


BeRTOS: clock_cm3.h File Reference

  • cpu
  • cortex-m3
  • drv
clock_cm3.h File Reference

Low-level Clock module for ARM Cortex-m3 (interface). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level Clock module for ARM Cortex-m3 (interface).

Author:
Daniele Basile <asterix@develer.com>

Definition in file clock_cm3.h.


BeRTOS: clock_cm3.h Source File

  • cpu
  • cortex-m3
  • drv
clock_cm3.h
Go to the documentation of this file.
00001
00039 #include <cpu/detect.h>
00040
00041 #if CPU_CM3_LM3S
00042     #include "clock_lm3s.h"
00043 #elif CPU_CM3_STM32
00044     #include "clock_stm32.h"
00045 #elif CPU_CM3_SAM3
00046     #include "clock_sam3.h"
00047 /*#elif  Add other Cortex-M3 CPUs here */
00048 #else
00049     #error Unknown CPU
00050 #endif
00051


BeRTOS: clock_lm3s.c File Reference

  • cpu
  • cortex-m3
  • drv
clock_lm3s.c File Reference

LM3S1968 Clocking driver. More...

#include "clock_lm3s.h"
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <io/lm3s.h>

Go to the source code of this file.

Detailed Description

LM3S1968 Clocking driver.

Author:
Andrea Righi <arighi@develer.com>

Definition in file clock_lm3s.c.


BeRTOS: clock_lm3s.c Source File

  • cpu
  • cortex-m3
  • drv
clock_lm3s.c
Go to the documentation of this file.
00001
00038 #include "clock_lm3s.h"
00039
00040 #include <cfg/compiler.h>
00041 #include <cfg/debug.h>
00042
00043 #include <io/lm3s.h>
00044
00045
00046 /* The PLL VCO frequency is 400 MHz */
00047 #define PLL_VCO 400000000UL
00048
00049 /* Extract the system clock divisor from the RCC register */
00050 #define RCC_TO_DIV(rcc)                     \
00051         (((rcc & SYSCTL_RCC_SYSDIV_MASK) >>     \
00052                 SYSCTL_RCC_SYSDIV_SHIFT) + 1)
00053
00054 /*
00055  * Very small delay: each loop takes 3 cycles.
00056  */
00057 void NAKED lm3s_busyWait(unsigned long iterations)
00058 {
00059     register uint32_t __n asm("r0") = iterations;
00060
00061     asm volatile (
00062         "1: subs r0, #1\n\t"
00063         "bne 1b\n\t"
00064         "bx lr\n\t"
00065         : : "r"(__n) : "memory", "cc");
00066 }
00067
00068 INLINE unsigned long clock_get_rate(void)
00069 {
00070     reg32_t rcc = HWREG(SYSCTL_RCC);
00071
00072     return rcc & SYSCTL_RCC_USESYSDIV ?
00073             PLL_VCO / 2 / RCC_TO_DIV(rcc) : PLL_VCO;
00074 }
00075
00076 /*
00077  * Try to evaluate the correct SYSDIV value depending on the desired CPU
00078  * frequency.
00079  */
00080 INLINE int evaluate_sysdiv(unsigned long freq)
00081 {
00082     int i;
00083
00084      /*
00085       * NOTE: with BYPASS=0, SYSDIV < 3 are reserved values (see LM3S1968
00086       * Microcontroller DATASHEET, p.78).
00087       */
00088     for (i = 3; i < 16; i++)
00089         if (freq >= (PLL_VCO / 2 / (i + 1)))
00090             break;
00091     return i;
00092 }
00093
00094 void clock_init(void)
00095 {
00096     reg32_t rcc, rcc2;
00097     unsigned long clk;
00098     int i;
00099
00100     /*
00101      * PLL may not function properly at default LDO setting.
00102      *
00103      * Description:
00104      *
00105      * In designs that enable and use the PLL module, unstable device
00106      * behavior may occur with the LDO set at its default of 2.5 volts or
00107      * below (minimum of 2.25 volts). Designs that do not use the PLL
00108      * module are not affected.
00109      *
00110      * Workaround: Prior to enabling the PLL module, it is recommended that
00111      * the default LDO voltage setting of 2.5 V be adjusted to 2.75 V using
00112      * the LDO Power Control (LDOPCTL) register.
00113      *
00114      * Silicon Revision Affected: A1, A2
00115      *
00116      * See also: Stellaris LM3S1968 A2 Errata documentation.
00117      */
00118     if (REVISION_IS_A1 | REVISION_IS_A2)
00119         HWREG(SYSCTL_LDOPCTL) = SYSCTL_LDOPCTL_2_75V;
00120
00121     rcc = HWREG(SYSCTL_RCC);
00122     rcc2 = HWREG(SYSCTL_RCC2);
00123
00124     /*
00125      * Step #1: bypass the PLL and system clock divider by setting the
00126      * BYPASS bit and clearing the USESYS bit in the RCC register. This
00127      * configures the system to run off a “raw” clock source (using the
00128      * main oscillator or internal oscillator) and allows for the new PLL
00129      * configuration to be validated before switching the system clock to
00130      * the PLL.
00131      */
00132     rcc |= SYSCTL_RCC_BYPASS;
00133     rcc &= ~SYSCTL_RCC_USESYSDIV;
00134     rcc2 |= SYSCTL_RCC2_BYPASS2;
00135
00136     /* Write back RCC/RCC2 registers */
00137     HWREG(SYSCTL_RCC) = rcc;
00138     HWREG(SYSCTL_RCC) = rcc2;
00139
00140     lm3s_busyWait(16);
00141
00142     /*
00143      * Step #2: select the crystal value (XTAL) and oscillator source
00144      * (OSCSRC), and clear the PWRDN bit in RCC/RCC2. Setting the XTAL
00145      * field automatically pulls valid PLL configuration data for the
00146      * appropriate crystal, and clearing the PWRDN bit powers and enables
00147      * the PLL and its output.
00148      */
00149
00150     /* Enable the main oscillator first. */
00151     rcc &= ~(SYSCTL_RCC_IOSCDIS | SYSCTL_RCC_MOSCDIS);
00152     rcc |= SYSCTL_RCC_IOSCDIS;
00153
00154     /* Do not override RCC register fields */
00155     rcc2 &= ~SYSCTL_RCC2_USERCC2;
00156
00157     rcc &= ~(SYSCTL_RCC_XTAL_M | SYSCTL_RCC_OSCSRC_M | SYSCTL_RCC_PWRDN);
00158     rcc |= XTAL_FREQ | SYSCTL_RCC_OSCSRC_MAIN;
00159
00160     /* Clear the PLL lock interrupt. */
00161     HWREG(SYSCTL_MISC) = SYSCTL_INT_PLL_LOCK;
00162
00163         HWREG(SYSCTL_RCC) = rcc;
00164     HWREG(SYSCTL_RCC) = rcc2;
00165
00166     lm3s_busyWait(16);
00167
00168     /*
00169      * Step #3: select the desired system divider (SYSDIV) in RCC/RCC2 and
00170      * set the USESYS bit in RCC. The SYSDIV field determines the system
00171      * frequency for the microcontroller.
00172      */
00173     rcc &= ~(SYSCTL_RCC_SYSDIV_M | SYSCTL_RCC_USESYSDIV);
00174
00175     clk = PLL_VCO / 2;
00176     for (i = 3; i < 16; i++)
00177         if (CPU_FREQ >= (clk / (i + 1)))
00178             break;
00179     rcc |= SYSCTL_RCC_USESYSDIV |
00180             (evaluate_sysdiv(CPU_FREQ) << SYSCTL_RCC_SYSDIV_SHIFT);
00181
00182     /*
00183      * Step #4: wait for the PLL to lock by polling the PLLLRIS bit in the
00184      * Raw Interrupt Status (RIS) register.
00185      */
00186         for (i = 0; i < 32768; i++)
00187         if (HWREG(SYSCTL_RIS) & SYSCTL_INT_PLL_LOCK)
00188             break;
00189
00190     /*
00191      * Step #5: enable use of the PLL by clearing the BYPASS bit in
00192      * RCC/RCC2.
00193      */
00194         rcc &= ~SYSCTL_RCC_BYPASS;
00195
00196     HWREG(SYSCTL_RCC) = rcc;
00197
00198     lm3s_busyWait(16);
00199 }


BeRTOS: clock_lm3s.h File Reference

  • cpu
  • cortex-m3
  • drv
clock_lm3s.h File Reference

Low-level clocking driver for LM3S1968. More...

Go to the source code of this file.

Detailed Description

Low-level clocking driver for LM3S1968.

Author:
Andrea Righi <arighi@develer.com>

Definition in file clock_lm3s.h.


BeRTOS: clock_lm3s.h Source File

  • cpu
  • cortex-m3
  • drv
clock_lm3s.h
Go to the documentation of this file.
00001
00038 #ifndef DRV_LM3S1968_CLOCK_H
00039 #define DRV_LM3S1968_CLOCK_H
00040
00041 /* Crystal frequency attached to the main oscillator. */
00042 #define XTAL_FREQ   SYSCTL_RCC_XTAL_8MHZ
00043
00044 extern void lm3s_busyWait(unsigned long iterations);
00045
00046 void clock_init(void);
00047
00048 #endif /* DRV_LM3S1968_CLOCK_H */


BeRTOS: clock_sam3.c File Reference

  • cpu
  • cortex-m3
  • drv
clock_sam3.c File Reference

Atmel SAM3 clock setup. More...

#include "clock_sam3.h"
#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <io/sam3.h>

Go to the source code of this file.

Detailed Description

Atmel SAM3 clock setup.

Author:
Stefano Fedrigo <aleph@develer.com>

Definition in file clock_sam3.c.


BeRTOS: clock_sam3.c Source File

  • cpu
  • cortex-m3
  • drv
clock_sam3.c
Go to the documentation of this file.
00001
00038 #include "clock_sam3.h"
00039 #include <cfg/compiler.h>
00040 #include <cfg/macros.h>
00041 #include <io/sam3.h>
00042
00043
00044 /* Frequency of board main oscillator */
00045 #define BOARDOSC_FREQ  12000000
00046
00047 /* Timer countdown timeout for clock initialization operations */
00048 #define CLOCK_TIMEOUT    0xFFFFFFFF
00049
00050
00051 #if CPU_FREQ == 84000000 || CPU_FREQ == 48000000
00052
00053 INLINE uint32_t evaluate_pll(void)
00054 {
00055     return CKGR_PLLR_MUL(CPU_FREQ / BOARDOSC_FREQ * 2 - 1) | CKGR_PLLR_DIV(2);
00056 }
00057
00058 #else
00059
00060 #warning CPU clock frequency non-standard setting: multiplier and divider values \
00061  will be computed at runtime: effective computed frequency could be different \
00062  from expected.
00063
00064 /*
00065  * Try to evaluate the correct divider and multiplier value depending
00066  * on the desired CPU frequency.
00067  *
00068  * We try all combinations in a certain range of divider and multiplier
00069  * values.  Start with higher multipliers and divisors, generally better.
00070  */
00071 INLINE uint32_t evaluate_pll(void)
00072 {
00073     int mul, div, best_mul, best_div;
00074     int best_delta = CPU_FREQ;
00075     int freq = 0;
00076
00077     for (mul = 13; mul > 0; mul--)
00078     {
00079         for (div = 24; div > 0; div--)
00080         {
00081             freq = BOARDOSC_FREQ / div * (1 + mul);
00082             if (ABS((int)CPU_FREQ - freq) < best_delta) {
00083                 best_delta = ABS((int)CPU_FREQ - freq);
00084                 best_mul = mul;
00085                 best_div = div;
00086             }
00087         }
00088     }
00089
00090     return CKGR_PLLR_DIV(best_div) | CKGR_PLLR_MUL(best_mul);
00091 }
00092
00093 #endif /* CPU_FREQ */
00094
00095 void clock_init(void)
00096 {
00097     uint32_t timeout;
00098
00099     /* Disable watchdog */
00100     WDT_MR = BV(WDT_WDDIS);
00101
00102     /* Set wait states for flash access, needed for higher CPU clock rates */
00103     EEFC0_FMR = EEFC_FMR_FWS(3);
00104 #ifdef EEFC1_FMR
00105     EEFC1_FMR = EEFC_FMR_FWS(3);
00106 #endif
00107
00108     // Initialize main oscillator
00109     if (!(CKGR_MOR & BV(CKGR_MOR_MOSCSEL)))
00110     {
00111         CKGR_MOR = CKGR_MOR_KEY(0x37) | CKGR_MOR_MOSCXTST(0x8)
00112             | BV(CKGR_MOR_MOSCRCEN) | BV(CKGR_MOR_MOSCXTEN);
00113         timeout = CLOCK_TIMEOUT;
00114         while (!(PMC_SR & BV(PMC_SR_MOSCXTS)) && --timeout);
00115     }
00116
00117     // Switch to external oscillator
00118     CKGR_MOR = CKGR_MOR_KEY(0x37) | CKGR_MOR_MOSCXTST(0x8)
00119         | BV(CKGR_MOR_MOSCRCEN) | BV(CKGR_MOR_MOSCXTEN) | BV(CKGR_MOR_MOSCSEL);
00120     timeout = CLOCK_TIMEOUT;
00121     while (!(PMC_SR & BV(PMC_SR_MOSCXTS)) && --timeout);
00122
00123     // Initialize and enable PLL clock
00124     CKGR_PLLR = evaluate_pll() | BV(CKGR_PLLR_STUCKTO1) | CKGR_PLLR_PLLCOUNT(0x2);
00125     timeout = CLOCK_TIMEOUT;
00126     while (!(PMC_SR & BV(PMC_SR_LOCK)) && --timeout);
00127
00128     PMC_MCKR = PMC_MCKR_CSS_MAIN_CLK;
00129     timeout = CLOCK_TIMEOUT;
00130     while (!(PMC_SR & BV(PMC_SR_MCKRDY)) && --timeout);
00131
00132     PMC_MCKR = PMC_MCKR_CSS_PLL_CLK;
00133     timeout = CLOCK_TIMEOUT;
00134     while (!(PMC_SR & BV(PMC_SR_MCKRDY)) && --timeout);
00135
00136     /* Enable clock on PIO for inputs */
00137     // TODO: move this in gpio_init() for better power management?
00138     pmc_periphEnable(PIOA_ID);
00139     pmc_periphEnable(PIOB_ID);
00140     pmc_periphEnable(PIOC_ID);
00141 #ifdef PIOF_ID
00142     pmc_periphEnable(PIOD_ID);
00143     pmc_periphEnable(PIOE_ID);
00144     pmc_periphEnable(PIOF_ID);
00145 #endif
00146 }


BeRTOS: clock_sam3.h File Reference

  • cpu
  • cortex-m3
  • drv
clock_sam3.h File Reference

Low-level clocking driver for SAM3. More...

Go to the source code of this file.

Detailed Description

Low-level clocking driver for SAM3.

Author:
Stefano Fedrigo <aleph@develer.com>

Definition in file clock_sam3.h.


BeRTOS: clock_sam3.h Source File

  • cpu
  • cortex-m3
  • drv
clock_sam3.h
Go to the documentation of this file.
00001
00038 #ifndef DRV_SAM3_CLOCK_H
00039 #define DRV_SAM3_CLOCK_H
00040
00041 void clock_init(void);
00042
00043 #endif /* DRV_SAM3_CLOCK_H */


BeRTOS: clock_stm32.c File Reference

  • cpu
  • cortex-m3
  • drv
clock_stm32.c File Reference

STM32 Clocking driver. More...

#include "clock_stm32.h"
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <io/stm32.h>

Go to the source code of this file.

Detailed Description

STM32 Clocking driver.

Author:
Andrea Righi <arighi@develer.com>

Definition in file clock_stm32.c.


BeRTOS: clock_stm32.c Source File

  • cpu
  • cortex-m3
  • drv
clock_stm32.c
Go to the documentation of this file.
00001
00038 #include "clock_stm32.h"
00039
00040 #include <cfg/compiler.h>
00041 #include <cfg/debug.h>
00042
00043 #include <io/stm32.h>
00044
00045 struct RCC *RCC;
00046
00047 INLINE int rcc_get_flag_status(uint32_t flag)
00048 {
00049     uint32_t id;
00050     reg32_t reg;
00051
00052     /* Get the RCC register index */
00053     id = flag >> 5;
00054     /* The flag to check is in CR register */
00055     if (id == 1)
00056         reg = RCC->CR;
00057     /* The flag to check is in BDCR register */
00058     else if (id == 2)
00059         reg = RCC->BDCR;
00060     /* The flag to check is in CSR register */
00061     else
00062         reg = RCC->CSR;
00063     /* Get the flag position */
00064     id = flag & FLAG_MASK;
00065
00066     return reg & (1 << id);
00067 }
00068
00069 INLINE uint16_t pll_clock(void)
00070 {
00071     unsigned int div, mul;
00072
00073     /* Hopefully this is evaluate at compile time... */
00074     for (div = 2; div; div--)
00075         for (mul = 2; mul <= 16; mul++)
00076             if (CPU_FREQ <= (PLL_VCO / div * mul))
00077                 break;
00078     return mul << 8 | div;
00079 }
00080
00081 INLINE void rcc_pll_config(void)
00082 {
00083     reg32_t reg = RCC->CFGR & CFGR_PLL_MASK;
00084
00085     /* Evaluate clock parameters */
00086     uint16_t clock = pll_clock();
00087     uint32_t pll_mul = ((clock >> 8) - 2) << 18;
00088     uint32_t pll_div = ((clock & 0xff) << 1 | 1) << 16;
00089
00090     /* Set the PLL configuration bits */
00091     reg |= pll_div | pll_mul;
00092
00093     /* Store the new value */
00094     RCC->CFGR = reg;
00095
00096     /* Enable PLL */
00097     *CR_PLLON_BB = 1;
00098 }
00099
00100 INLINE void rcc_set_clock_source(uint32_t source)
00101 {
00102     reg32_t reg;
00103
00104     reg = RCC->CFGR & CFGR_SW_MASK;
00105     reg |= source;
00106     RCC->CFGR = reg;
00107 }
00108
00109 void clock_init(void)
00110 {
00111     /* Initialize global RCC structure */
00112     RCC = (struct RCC *)RCC_BASE;
00113
00114     /* Enable the internal oscillator */
00115     *CR_HSION_BB = 1;
00116     while (!rcc_get_flag_status(RCC_FLAG_HSIRDY));
00117
00118     /* Clock the system from internal HSI RC (8 MHz) */
00119     rcc_set_clock_source(RCC_SYSCLK_HSI);
00120
00121     /* Enable external oscillator */
00122     RCC->CR &= CR_HSEON_RESET;
00123     RCC->CR &= CR_HSEBYP_RESET;
00124     RCC->CR |= CR_HSEON_SET;
00125     while (!rcc_get_flag_status(RCC_FLAG_HSERDY));
00126
00127     /* Initialize PLL according to CPU_FREQ */
00128     rcc_pll_config();
00129     while(!rcc_get_flag_status(RCC_FLAG_PLLRDY));
00130
00131     /* Configure USB clock (48MHz) */
00132     *CFGR_USBPRE_BB = RCC_USBCLK_PLLCLK_1DIV5;
00133     /* Configure ADC clock: PCLK2 (9MHz) */
00134     RCC->CFGR &= CFGR_ADCPRE_RESET_MASK;
00135     RCC->CFGR |= RCC_PCLK2_DIV8;
00136     /* Configure system clock dividers: PCLK2 (72MHz) */
00137     RCC->CFGR &= CFGR_PPRE2_RESET_MASK;
00138     RCC->CFGR |= RCC_HCLK_DIV1 << 3;
00139     /* Configure system clock dividers: PCLK1 (36MHz) */
00140     RCC->CFGR &= CFGR_PPRE1_RESET_MASK;
00141     RCC->CFGR |= RCC_HCLK_DIV2;
00142     /* Configure system clock dividers: HCLK */
00143     RCC->CFGR &= CFGR_HPRE_RESET_MASK;
00144     RCC->CFGR |= RCC_SYSCLK_DIV1;
00145
00146     /* Set 1 wait state for the flash memory */
00147     *(reg32_t *)FLASH_BASE = 0x12;
00148
00149     /* Clock the system from the PLL */
00150     rcc_set_clock_source(RCC_SYSCLK_PLLCLK);
00151 }


BeRTOS: clock_stm32.h File Reference

  • cpu
  • cortex-m3
  • drv
clock_stm32.h File Reference

Low-level clocking driver for Cortex-M3 STM32. More...

#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define | CR_OFFSET (RCC_OFFSET + 0x00)
CR Register.
#define | HSION_BITNUMBER 0x00
CR Register.
#define | CR_HSION_BB ((reg32_t *)(PERIPH_BB_BASE + (CR_OFFSET * 32) + (HSION_BITNUMBER * 4)))
CR Register.
#define | PLLON_BITNUMBER 0x18
CR Register.
#define | CR_PLLON_BB ((reg32_t *)(PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLLON_BITNUMBER * 4)))
CR Register.
#define | CSSON_BITNUMBER 0x13
CR Register.
#define | CR_CSSON_BB ((reg32_t *)(PERIPH_BB_BASE + (CR_OFFSET * 32) + (CSSON_BITNUMBER * 4)))
CR Register.
#define | CFGR_OFFSET (RCC_OFFSET + 0x04)
CFGR Register.
#define | USBPRE_BITNUMBER 0x16
CFGR Register.
#define | CFGR_USBPRE_BB ((reg32_t *)(PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (USBPRE_BITNUMBER * 4)))
CFGR Register.
#define | BDCR_OFFSET (RCC_OFFSET + 0x20)
BDCR Register.
#define | RTCEN_BITNUMBER 0x0F
BDCR Register.
#define | BDCR_RTCEN_BB ((reg32_t *)(PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (RTCEN_BITNUMBER * 4)))
BDCR Register.
#define | BDRST_BITNUMBER 0x10
BDCR Register.
#define | BDCR_BDRST_BB ((reg32_t *)(PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (BDRST_BITNUMBER * 4)))
BDCR Register.
#define | CSR_OFFSET (RCC_OFFSET + 0x24)
CSR Register.
#define | LSION_BITNUMBER 0x00
CSR Register.
#define | CSR_LSION_BB ((reg32_t *)(PERIPH_BB_BASE + (CSR_OFFSET * 32) + (LSION_BITNUMBER * 4)))
CSR Register.
#define | CR_HSEBYP_RESET (0xFFFBFFFF)
RCC registers bit mask.
#define | CR_HSEBYP_SET (0x00040000)
RCC registers bit mask.
#define | CR_HSEON_RESET (0xFFFEFFFF)
RCC registers bit mask.
#define | CR_HSEON_SET (0x00010000)
RCC registers bit mask.
#define | CR_HSITRIM_MASK (0xFFFFFF07)
RCC registers bit mask.
#define | CFGR_PLL_MASK (0xFFC0FFFF)
RCC registers bit mask.
#define | CFGR_PLLMull_MASK (0x003C0000)
RCC registers bit mask.
#define | CFGR_PLLSRC_MASK (0x00010000)
RCC registers bit mask.
#define | CFGR_PLLXTPRE_MASK (0x00020000)
RCC registers bit mask.
#define | CFGR_SWS_MASK (0x0000000C)
RCC registers bit mask.
#define | CFGR_SW_MASK (0xFFFFFFFC)
RCC registers bit mask.
#define | CFGR_HPRE_RESET_MASK (0xFFFFFF0F)
RCC registers bit mask.
#define | CFGR_HPRE_SET_MASK (0x000000F0)
RCC registers bit mask.
#define | CFGR_PPRE1_RESET_MASK (0xFFFFF8FF)
RCC registers bit mask.
#define | CFGR_PPRE1_SET_MASK (0x00000700)
RCC registers bit mask.
#define | CFGR_PPRE2_RESET_MASK (0xFFFFC7FF)
RCC registers bit mask.
#define | CFGR_PPRE2_SET_MASK (0x00003800)
RCC registers bit mask.
#define | CFGR_ADCPRE_RESET_MASK (0xFFFF3FFF)
RCC registers bit mask.
#define | CFGR_ADCPRE_SET_MASK (0x0000C000)
RCC registers bit mask.
#define | CSR_RVMF_SET (0x01000000)
RCC registers bit mask.
#define | FLAG_MASK (0x1F)
RCC registers bit mask.
#define | HSI_VALUE (8000000)
RCC registers bit mask.
#define | BDCR_BASE (PERIPH_BASE + BDCR_OFFSET)
RCC registers bit mask.
#define | RCC_FLAG_HSIRDY (0x20)
RCC registers bit mask.
#define | RCC_FLAG_HSERDY (0x31)
RCC registers bit mask.
#define | RCC_FLAG_PLLRDY (0x39)
RCC registers bit mask.
#define | RCC_FLAG_LSERDY (0x41)
RCC registers bit mask.
#define | RCC_FLAG_LSIRDY (0x61)
RCC registers bit mask.
#define | RCC_FLAG_PINRST (0x7A)
RCC registers bit mask.
#define | RCC_FLAG_PORRST (0x7B)
RCC registers bit mask.
#define | RCC_FLAG_SFTRST (0x7C)
RCC registers bit mask.
#define | RCC_FLAG_IWDGRST (0x7D)
RCC registers bit mask.
#define | RCC_FLAG_WWDGRST (0x7E)
RCC registers bit mask.
#define | RCC_FLAG_LPWRRST (0x7F)
RCC registers bit mask.
#define | RCC_SYSCLK_HSI (0x00000000)
RCC registers bit mask.
#define | RCC_SYSCLK_HSE (0x00000001)
RCC registers bit mask.
#define | RCC_SYSCLK_PLLCLK (0x00000002)
RCC registers bit mask.
#define | RCC_PLL_HSI_DIV2 (0x00000000)
RCC registers bit mask.
#define | RCC_PLL_HSE_DIV1 (0x00010000)
RCC registers bit mask.
#define | RCC_PLL_HSE_DIV2 (0x00030000)
RCC registers bit mask.
#define | RCC_PLLMUL_2 (0x00000000)
RCC registers bit mask.
#define | RCC_PLLMUL_3 (0x00040000)
RCC registers bit mask.
#define | RCC_PLLMUL_4 (0x00080000)
RCC registers bit mask.
#define | RCC_PLLMUL_5 (0x000C0000)
RCC registers bit mask.
#define | RCC_PLLMUL_6 (0x00100000)
RCC registers bit mask.
#define | RCC_PLLMUL_7 (0x00140000)
RCC registers bit mask.
#define | RCC_PLLMUL_8 (0x00180000)
RCC registers bit mask.
#define | RCC_PLLMUL_9 (0x001C0000)
RCC registers bit mask.
#define | RCC_PLLMUL_10 (0x00200000)
RCC registers bit mask.
#define | RCC_PLLMUL_11 (0x00240000)
RCC registers bit mask.
#define | RCC_PLLMUL_12 (0x00280000)
RCC registers bit mask.
#define | RCC_PLLMUL_13 (0x002C0000)
RCC registers bit mask.
#define | RCC_PLLMUL_14 (0x00300000)
RCC registers bit mask.
#define | RCC_PLLMUL_15 (0x00340000)
RCC registers bit mask.
#define | RCC_PLLMUL_16 (0x00380000)
RCC registers bit mask.
#define | RCC_HCLK_DIV1 (0x00000000)
RCC registers bit mask.
#define | RCC_HCLK_DIV2 (0x00000400)
RCC registers bit mask.
#define | RCC_HCLK_DIV4 (0x00000500)
RCC registers bit mask.
#define | RCC_HCLK_DIV8 (0x00000600)
RCC registers bit mask.
#define | RCC_HCLK_DIV16 (0x00000700)
RCC registers bit mask.
#define | RCC_USBCLK_PLLCLK_1DIV5 (0x00)
RCC registers bit mask.
#define | RCC_USBCLK_PLLCLK_DIV1 (0x01)
RCC registers bit mask.
#define | RCC_PCLK2_DIV2 (0x00000000)
RCC registers bit mask.
#define | RCC_PCLK2_DIV4 (0x00004000)
RCC registers bit mask.
#define | RCC_PCLK2_DIV6 (0x00008000)
RCC registers bit mask.
#define | RCC_PCLK2_DIV8 (0x0000C000)
RCC registers bit mask.
#define | RCC_SYSCLK_DIV1 (0x00000000)
RCC registers bit mask.
#define | RCC_SYSCLK_DIV2 (0x00000080)
RCC registers bit mask.
#define | RCC_SYSCLK_DIV4 (0x00000090)
RCC registers bit mask.
#define | RCC_SYSCLK_DIV8 (0x000000A0)
RCC registers bit mask.
#define | RCC_SYSCLK_DIV16 (0x000000B0)
RCC registers bit mask.
#define | RCC_SYSCLK_DIV64 (0x000000C0)
RCC registers bit mask.
#define | RCC_SYSCLK_DIV128 (0x000000D0)
RCC registers bit mask.
#define | RCC_SYSCLK_DIV256 (0x000000E0)
RCC registers bit mask.
#define | RCC_SYSCLK_DIV512 (0x000000F0)
RCC registers bit mask.
#define | RCC_APB1_TIM2 (0x00000001)
RCC register: APB1 peripheral.
#define | RCC_APB1_TIM3 (0x00000002)
RCC register: APB1 peripheral.
#define | RCC_APB1_TIM4 (0x00000004)
RCC register: APB1 peripheral.
#define | RCC_APB1_WWDG (0x00000800)
RCC register: APB1 peripheral.
#define | RCC_APB1_SPI2 (0x00004000)
RCC register: APB1 peripheral.
#define | RCC_APB1_USART2 (0x00020000)
RCC register: APB1 peripheral.
#define | RCC_APB1_USART3 (0x00040000)
RCC register: APB1 peripheral.
#define | RCC_APB1_I2C1 (0x00200000)
RCC register: APB1 peripheral.
#define | RCC_APB1_I2C2 (0x00400000)
RCC register: APB1 peripheral.
#define | RCC_APB1_USB (0x00800000)
RCC register: APB1 peripheral.
#define | RCC_APB1_CAN (0x02000000)
RCC register: APB1 peripheral.
#define | RCC_APB1_BKP (0x08000000)
RCC register: APB1 peripheral.
#define | RCC_APB1_PWR (0x10000000)
RCC register: APB1 peripheral.
#define | RCC_APB1_ALL (0x1AE64807)
RCC register: APB1 peripheral.
#define | RCC_APB2_AFIO (0x00000001)
RCC register: APB2 peripheral.
#define | RCC_APB2_GPIOA (0x00000004)
RCC register: APB2 peripheral.
#define | RCC_APB2_GPIOB (0x00000008)
RCC register: APB2 peripheral.
#define | RCC_APB2_GPIOC (0x00000010)
RCC register: APB2 peripheral.
#define | RCC_APB2_GPIOD (0x00000020)
RCC register: APB2 peripheral.
#define | RCC_APB2_GPIOE (0x00000040)
RCC register: APB2 peripheral.
#define | RCC_APB2_ADC1 (0x00000200)
RCC register: APB2 peripheral.
#define | RCC_APB2_ADC2 (0x00000400)
RCC register: APB2 peripheral.
#define | RCC_APB2_TIM1 (0x00000800)
RCC register: APB2 peripheral.
#define | RCC_APB2_SPI1 (0x00001000)
RCC register: APB2 peripheral.
#define | RCC_APB2_USART1 (0x00004000)
RCC register: APB2 peripheral.
#define | RCC_APB2_ALL (0x00005E7D)
RCC register: APB2 peripheral.
#define | RCC_BDCR_LSEON (0x00000001)
RCC register: BCDR.
#define | RCC_BDCR_LSERDY (0x00000002)
RCC register: APB2 peripheral.
#define | RCC_BDCR_RTCSEL (0x00000300)
RCC register: APB2 peripheral.
#define | RCC_BDCR_RTCEN (0x00008000)
RCC register: APB2 peripheral.

Detailed Description

Low-level clocking driver for Cortex-M3 STM32.

Author:
Andrea Righi <arighi@develer.com>

Definition in file clock_stm32.h.


BeRTOS: clock_stm32.h Source File

  • cpu
  • cortex-m3
  • drv
clock_stm32.h
Go to the documentation of this file.
00001
00038 #ifndef CLOCK_STM32_H
00039 #define CLOCK_STM32_H
00040
00041
00042 #include <cfg/compiler.h>
00043
00044 /* RCC registers bit address */
00045 #define RCC_OFFSET                (RCC_BASE - PERIPH_BASE)
00046
00050 /*\{*/
00051 /* Alias word address of HSION bit */
00052 #define CR_OFFSET                 (RCC_OFFSET + 0x00)
00053 #define HSION_BITNUMBER           0x00
00054 #define CR_HSION_BB               ((reg32_t *)(PERIPH_BB_BASE + (CR_OFFSET * 32) + (HSION_BITNUMBER * 4)))
00055
00056 /* Alias word address of PLLON bit */
00057 #define PLLON_BITNUMBER           0x18
00058 #define CR_PLLON_BB               ((reg32_t *)(PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLLON_BITNUMBER * 4)))
00059
00060 /* Alias word address of CSSON bit */
00061 #define CSSON_BITNUMBER           0x13
00062 #define CR_CSSON_BB               ((reg32_t *)(PERIPH_BB_BASE + (CR_OFFSET * 32) + (CSSON_BITNUMBER * 4)))
00063 /*\}*/
00064
00068 /*\{*/
00069 /* Alias word address of USBPRE bit */
00070 #define CFGR_OFFSET               (RCC_OFFSET + 0x04)
00071 #define USBPRE_BITNUMBER          0x16
00072 #define CFGR_USBPRE_BB            ((reg32_t *)(PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (USBPRE_BITNUMBER * 4)))
00073 /*\}*/
00074
00078 /*\{*/
00079 /* Alias word address of RTCEN bit */
00080 #define BDCR_OFFSET               (RCC_OFFSET + 0x20)
00081 #define RTCEN_BITNUMBER           0x0F
00082 #define BDCR_RTCEN_BB             ((reg32_t *)(PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (RTCEN_BITNUMBER * 4)))
00083
00084 /* Alias word address of BDRST bit */
00085 #define BDRST_BITNUMBER           0x10
00086 #define BDCR_BDRST_BB             ((reg32_t *)(PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (BDRST_BITNUMBER * 4)))
00087 /*\}*/
00088
00092 /*\{*/
00093 /* Alias word address of LSION bit */
00094 #define CSR_OFFSET                (RCC_OFFSET + 0x24)
00095 #define LSION_BITNUMBER           0x00
00096 #define CSR_LSION_BB              ((reg32_t *)(PERIPH_BB_BASE + (CSR_OFFSET * 32) + (LSION_BITNUMBER * 4)))
00097 /*\}*/
00098
00102 /*\{*/
00103 /* CR register bit mask */
00104 #define CR_HSEBYP_RESET           (0xFFFBFFFF)
00105 #define CR_HSEBYP_SET             (0x00040000)
00106 #define CR_HSEON_RESET            (0xFFFEFFFF)
00107 #define CR_HSEON_SET              (0x00010000)
00108 #define CR_HSITRIM_MASK           (0xFFFFFF07)
00109
00110 /* CFGR register bit mask */
00111 #define CFGR_PLL_MASK             (0xFFC0FFFF)
00112 #define CFGR_PLLMull_MASK         (0x003C0000)
00113 #define CFGR_PLLSRC_MASK          (0x00010000)
00114 #define CFGR_PLLXTPRE_MASK        (0x00020000)
00115 #define CFGR_SWS_MASK             (0x0000000C)
00116 #define CFGR_SW_MASK              (0xFFFFFFFC)
00117 #define CFGR_HPRE_RESET_MASK      (0xFFFFFF0F)
00118 #define CFGR_HPRE_SET_MASK        (0x000000F0)
00119 #define CFGR_PPRE1_RESET_MASK     (0xFFFFF8FF)
00120 #define CFGR_PPRE1_SET_MASK       (0x00000700)
00121 #define CFGR_PPRE2_RESET_MASK     (0xFFFFC7FF)
00122 #define CFGR_PPRE2_SET_MASK       (0x00003800)
00123 #define CFGR_ADCPRE_RESET_MASK    (0xFFFF3FFF)
00124 #define CFGR_ADCPRE_SET_MASK      (0x0000C000)
00125
00126 /* CSR register bit mask */
00127 #define CSR_RVMF_SET              (0x01000000)
00128
00129 /* RCC Flag MASK */
00130 #define FLAG_MASK                 (0x1F)
00131
00132 /* Typical VALUE of the HSI in Hz */
00133 #define HSI_VALUE                 (8000000)
00134
00135 /* BDCR register base address */
00136 #define BDCR_BASE                 (PERIPH_BASE + BDCR_OFFSET)
00137
00138 /* RCC Flag */
00139 #define RCC_FLAG_HSIRDY                  (0x20)
00140 #define RCC_FLAG_HSERDY                  (0x31)
00141 #define RCC_FLAG_PLLRDY                  (0x39)
00142 #define RCC_FLAG_LSERDY                  (0x41)
00143 #define RCC_FLAG_LSIRDY                  (0x61)
00144 #define RCC_FLAG_PINRST                  (0x7A)
00145 #define RCC_FLAG_PORRST                  (0x7B)
00146 #define RCC_FLAG_SFTRST                  (0x7C)
00147 #define RCC_FLAG_IWDGRST                 (0x7D)
00148 #define RCC_FLAG_WWDGRST                 (0x7E)
00149 #define RCC_FLAG_LPWRRST                 (0x7F)
00150
00151 /* System clock source */
00152 #define RCC_SYSCLK_HSI             (0x00000000)
00153 #define RCC_SYSCLK_HSE             (0x00000001)
00154 #define RCC_SYSCLK_PLLCLK          (0x00000002)
00155
00156 /* PLL entry clock source */
00157 #define RCC_PLL_HSI_DIV2           (0x00000000)
00158 #define RCC_PLL_HSE_DIV1           (0x00010000)
00159 #define RCC_PLL_HSE_DIV2           (0x00030000)
00160
00161 /* PLL multiplication factor */
00162 #define RCC_PLLMUL_2               (0x00000000)
00163 #define RCC_PLLMUL_3               (0x00040000)
00164 #define RCC_PLLMUL_4               (0x00080000)
00165 #define RCC_PLLMUL_5               (0x000C0000)
00166 #define RCC_PLLMUL_6               (0x00100000)
00167 #define RCC_PLLMUL_7               (0x00140000)
00168 #define RCC_PLLMUL_8               (0x00180000)
00169 #define RCC_PLLMUL_9               (0x001C0000)
00170 #define RCC_PLLMUL_10              (0x00200000)
00171 #define RCC_PLLMUL_11              (0x00240000)
00172 #define RCC_PLLMUL_12              (0x00280000)
00173 #define RCC_PLLMUL_13              (0x002C0000)
00174 #define RCC_PLLMUL_14              (0x00300000)
00175 #define RCC_PLLMUL_15              (0x00340000)
00176 #define RCC_PLLMUL_16              (0x00380000)
00177
00178 /* APB1/APB2 clock source */
00179 #define RCC_HCLK_DIV1              (0x00000000)
00180 #define RCC_HCLK_DIV2              (0x00000400)
00181 #define RCC_HCLK_DIV4              (0x00000500)
00182 #define RCC_HCLK_DIV8              (0x00000600)
00183 #define RCC_HCLK_DIV16             (0x00000700)
00184
00185 /* USB clock source */
00186 #define RCC_USBCLK_PLLCLK_1DIV5    (0x00)
00187 #define RCC_USBCLK_PLLCLK_DIV1     (0x01)
00188
00189 /* ADC clock source */
00190 #define RCC_PCLK2_DIV2             (0x00000000)
00191 #define RCC_PCLK2_DIV4             (0x00004000)
00192 #define RCC_PCLK2_DIV6             (0x00008000)
00193 #define RCC_PCLK2_DIV8             (0x0000C000)
00194
00195 /* AHB clock source */
00196 #define RCC_SYSCLK_DIV1            (0x00000000)
00197 #define RCC_SYSCLK_DIV2            (0x00000080)
00198 #define RCC_SYSCLK_DIV4            (0x00000090)
00199 #define RCC_SYSCLK_DIV8            (0x000000A0)
00200 #define RCC_SYSCLK_DIV16           (0x000000B0)
00201 #define RCC_SYSCLK_DIV64           (0x000000C0)
00202 #define RCC_SYSCLK_DIV128          (0x000000D0)
00203 #define RCC_SYSCLK_DIV256          (0x000000E0)
00204 #define RCC_SYSCLK_DIV512          (0x000000F0)
00205 /*\}*/
00206
00210 /*\{*/
00211 #define RCC_APB1_TIM2              (0x00000001)
00212 #define RCC_APB1_TIM3              (0x00000002)
00213 #define RCC_APB1_TIM4              (0x00000004)
00214 #define RCC_APB1_WWDG              (0x00000800)
00215 #define RCC_APB1_SPI2              (0x00004000)
00216 #define RCC_APB1_USART2            (0x00020000)
00217 #define RCC_APB1_USART3            (0x00040000)
00218 #define RCC_APB1_I2C1              (0x00200000)
00219 #define RCC_APB1_I2C2              (0x00400000)
00220 #define RCC_APB1_USB               (0x00800000)
00221 #define RCC_APB1_CAN               (0x02000000)
00222 #define RCC_APB1_BKP               (0x08000000)
00223 #define RCC_APB1_PWR               (0x10000000)
00224 #define RCC_APB1_ALL               (0x1AE64807)
00225 /*\}*/
00226
00230 /*\{*/
00231 #define RCC_APB2_AFIO              (0x00000001)
00232 #define RCC_APB2_GPIOA             (0x00000004)
00233 #define RCC_APB2_GPIOB             (0x00000008)
00234 #define RCC_APB2_GPIOC             (0x00000010)
00235 #define RCC_APB2_GPIOD             (0x00000020)
00236 #define RCC_APB2_GPIOE             (0x00000040)
00237 #define RCC_APB2_ADC1              (0x00000200)
00238 #define RCC_APB2_ADC2              (0x00000400)
00239 #define RCC_APB2_TIM1              (0x00000800)
00240 #define RCC_APB2_SPI1              (0x00001000)
00241 #define RCC_APB2_USART1            (0x00004000)
00242 #define RCC_APB2_ALL               (0x00005E7D)
00243
00247 #define RCC_BDCR_LSEON             (0x00000001)
00248 #define RCC_BDCR_LSERDY            (0x00000002)
00249 #define RCC_BDCR_RTCSEL            (0x00000300)
00250 #define RCC_BDCR_RTCEN             (0x00008000)
00251 /*\}*/
00252
00253 /* Crystal frequency of the main oscillator (8MHz) */
00254 #define PLL_VCO                    8000000
00255
00256 /* Reset and Clock Controller registers */
00257 struct RCC
00258 {
00259     reg32_t CR;
00260     reg32_t CFGR;
00261     reg32_t CIR;
00262     reg32_t APB2RSTR;
00263     reg32_t APB1RSTR;
00264     reg32_t AHBENR;
00265     reg32_t APB2ENR;
00266     reg32_t APB1ENR;
00267     reg32_t BDCR;
00268     reg32_t CSR;
00269 };
00270
00271 /* RCC registers base */
00272 extern struct RCC *RCC;
00273
00274 void clock_init(void);
00275
00276 #endif /* CLOCK_STM32_h */


BeRTOS: cm3.h File Reference

  • cpu
  • cortex-m3
  • io
cm3.h File Reference

Low-level Registry definition for ARM Cortex-m3 (interface). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level Registry definition for ARM Cortex-m3 (interface).

Author:
Daniele Basile <asterix@develer.com>

Definition in file cm3.h.


BeRTOS: cm3.h Source File

  • cpu
  • cortex-m3
  • io
cm3.h
Go to the documentation of this file.
00001
00039 #include <cpu/detect.h>
00040
00041 #if CPU_CM3_LM3S
00042     #include "lm3s.h"
00043 #elif CPU_CM3_STM32
00044     #include "stm32.h"
00045 #elif CPU_CM3_SAM3
00046     #include "sam3.h"
00047 /*#elif  Add other Cortex-M3 CPUs here */
00048 #else
00049     #error Unknown CPU
00050 #endif
00051


BeRTOS: cmd_hunk.h File Reference

  • mware
cmd_hunk.h File Reference

Preprocessor magic to create hunks for the commands executed from the parser. More...

#include "parser.h"
#include <boost/preprocessor/library.hpp>

Go to the source code of this file.

Detailed Description

Preprocessor magic to create hunks for the commands executed from the parser.

This module permits to create hunks for the functions that must be executed through RPC commands. For instance, given this code:

 ResultCode cmd_add(long a, long b, long* result);
 DECLARE_COMMAND_HUNK(add, (long)(long)(NIL), (long)(NIL));
 //                        ^ parameters       ^ return values

The macro is expanded to:

 ResultCode cmd_add_hunk(params argv[], params results[])
 {
    return cmd_add(argv[0].l, argv[1].l, &results[0].l);
 }

 const struct CmdTemplate cmd_add_template =
 {
    "add", "dd", "d", cmd_add_hunk
 };

which is all the boilerplate needed to make the function ready for the RPC. The implementation uses the Boost Preprocessor Library (part of the Boost library, available at http://www.boost.org). The version we developed the code with is 1.31.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file cmd_hunk.h.


BeRTOS: cmd_hunk.h Source File

  • mware
cmd_hunk.h
Go to the documentation of this file.
00001
00069 #ifndef CMD_HUNK_H
00070 #define CMD_HUNK_H
00071
00072 #include "parser.h"
00073
00074 // Bring in the Boost Preprocess Library
00075 #include <boost/preprocessor/library.hpp>
00076
00077 #define HUNK_INDEX_FOR_NIL      0
00078 #define HUNK_INDEX_FOR_string   1
00079 #define HUNK_INDEX_FOR_long     2
00080 #define HUNK_ARRAY_LETTERS      (3, (NIL, s, l))
00081 #define HUNK_ARRAY_STRINGS      (3, ("", "s", "d"))
00082
00083 // Transform int->l, float->f, etc.
00084 #define HUNK_TYPE_LETTER(s, _, type) \
00085     BOOST_PP_CAT(HUNK_INDEX_FOR_, type) \
00086
00087
00088 #define HUNK_TRANSFORMER(_, array, elem) \
00089     BOOST_PP_ARRAY_ELEM(elem, array) \
00090
00091
00092 #define HUNK_SEQ_TRANS_ARRAY(seq, array) \
00093     BOOST_PP_SEQ_TRANSFORM(HUNK_TRANSFORMER, array, seq) \
00094
00095
00096 #define HUNK_PARAM(_, n, seq)    \
00097     args_results[n+1]. BOOST_PP_SEQ_ELEM(n, seq) \
00098
00099
00100 #define HUNK_RESULT(_, n, seq)    \
00101     &args_results[n]. BOOST_PP_SEQ_ELEM(n, seq) \
00102
00103
00104 #define HUNK_IDENTITY(_, dummy, x)  x
00105 #define CMD_HUNK_TEMPLATE(func)         cmd_##func###_template
00106
00107 #define DECLARE_CMD_HUNK_2(func, name, param_types, result_types, flags)    \
00108     static ResultCode cmd_##name##_hunk(parms args_results[]) \
00109     { \
00110         return cmd_##func( \
00111                BOOST_PP_ENUM(BOOST_PP_DEC(BOOST_PP_SEQ_SIZE(param_types)),  HUNK_PARAM,  HUNK_SEQ_TRANS_ARRAY(param_types, HUNK_ARRAY_LETTERS)) \
00112                BOOST_PP_COMMA_IF(BOOST_PP_AND(BOOST_PP_DEC(BOOST_PP_SEQ_SIZE(param_types)), BOOST_PP_DEC(BOOST_PP_SEQ_SIZE(result_types)))) \
00113                BOOST_PP_ENUM(BOOST_PP_DEC(BOOST_PP_SEQ_SIZE(result_types)), HUNK_RESULT, HUNK_SEQ_TRANS_ARRAY(result_types, HUNK_ARRAY_LETTERS)) \
00114         ); \
00115     } \
00116     const struct CmdTemplate CMD_HUNK_TEMPLATE(name) = { \
00117         #name, \
00118         BOOST_PP_SEQ_FOR_EACH(HUNK_IDENTITY, _, HUNK_SEQ_TRANS_ARRAY(param_types, HUNK_ARRAY_STRINGS)),  \
00119         BOOST_PP_SEQ_FOR_EACH(HUNK_IDENTITY, _, HUNK_SEQ_TRANS_ARRAY(result_types, HUNK_ARRAY_STRINGS)), \
00120         cmd_##name##_hunk, \
00121         flags \
00122     } \
00123
00124
00125 #define DECLARE_CMD_HUNK(func, param_types, result_types)    \
00126     DECLARE_CMD_HUNK_2(func, func, \
00127                        BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, param_types), \
00128                        BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, result_types), \
00129                        0) \
00130
00131
00132 #define DECLARE_CMD_HUNK_NAME(func, name, param_types, result_types)    \
00133     DECLARE_CMD_HUNK_2(func, name, \
00134                        BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, param_types), \
00135                        BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, result_types), \
00136                        0) \
00137
00138
00139 #define DECLARE_CMD_HUNK_FLAGS(func, param_types, result_types, flags)    \
00140     DECLARE_CMD_HUNK_2(func, func, \
00141                        BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, param_types), \
00142                        BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, result_types), \
00143                        flags) \
00144
00145
00146 #endif


BeRTOS: compiler.h File Reference

  • cfg
Data Structures | Defines | Typedefs
compiler.h File Reference

Additional support macros for compiler independance. More...

#include <cpu/detect.h>
#include <stddef.h>
#include <stdint.h>
#include <stdbool.h>
#include <sys/types.h>

Go to the source code of this file.

Data Structures

struct | Signal
Signal structure. More...

Defines

#define | PP_CAT(x, y) PP_CAT__(x,y)
Concatenate two different preprocessor tokens (allowing macros to expand)
#define | PP_STRINGIZE(x) PP_STRINGIZE__(x)
String-ize a token (allowing macros to expand)
#define | COMPILER_VARIADIC_MACROS 1
usage:
#define | COMPILER_TYPEOF 1
Support for dynamic type identification.
#define | COMPILER_STATEMENT_EXPRESSIONS 1
Support for statement expressions.
#define | MEMORY_BARRIER asm volatile ("" : : : "memory")
Force compiler to reload context variable.
#define | offsetof(s, m) (size_t)&(((s *)0)->m)
Return the byte offset of the member m in struct s.
#define | countof(a)
Count the number of elements in the static array a.
#define | alignof(type) offsetof(struct { char c; type member; }, member)
Return the alignment in memory of a generic data type.
#define | containerof(ptr, type, member)
Cast a member of a structure out to the containing structure.
#define | STATIC_ASSERT(condition) UNUSED_VAR(extern char, STATIC_ASSERTION_FAILED__[(condition) ? 1 : -1])
Issue a compilation error if the condition is false.
#define | STATIC_ASSERT_EXPR(__cond) (sizeof(struct { int STATIC_ASSERTION_FAILED__:!!(__cond); }) * 0)
Issue a compilation error if __cond is false (this can be used inside an expression).
#define | ACCESS_SAFE(x) (*(volatile typeof(x) *)&(x))
Prevent the compiler from optimizing access to the variable x, enforcing a refetch from memory.

Typedefs

typedef int32_t | ticks_t
Type for time expressed in ticks.
typedef int32_t | utime_t
Type for time expressed in microseconds.
typedef int32_t | mtime_t
Type for time expressed in milliseconds.
typedef void(* | Hook )(void *)
User defined callback type.
typedef void * | iptr_t
Bulk storage large enough for both pointers or integers.
typedef const void * | const_iptr_t
Bulk storage large enough for both pointers to constants or integers.
typedef unsigned char | sigbit_t
Type for signal bits.
typedef unsigned char | sigmask_t
Type for signal masks.
Types for hardware registers.

Only use these types for registers whose contents can be changed asynchronously by external hardware.

typedef volatile uint8_t | reg8_t
typedef volatile uint16_t | reg16_t
typedef volatile uint32_t | reg32_t

Detailed Description

Additional support macros for compiler independance.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file compiler.h.

Define Documentation

#define ACCESS_SAFE ( x ) (*(volatile typeof(x) *)&(x))

Prevent the compiler from optimizing access to the variable x, enforcing a refetch from memory.

This also forbid from reordering successing instances of ACCESS_SAFE().

Definition at line 637 of file compiler.h.

#define alignof ( type ) offsetof(struct { char c; type member; }, member)

Return the alignment in memory of a generic data type.

Note:
We need to worry about alignment when allocating memory that will be used later by unknown objects (e.g., malloc()) or, more generally, whenever creating generic container types.

Definition at line 586 of file compiler.h.

#define COMPILER_VARIADIC_MACROS 1

usage:

Support for macros with variable arguments.

 #define foo_init(args...) PP_CAT(foo_init_, COUNT_PARMS(args)) (args)

#define containerof | ( | ptr,
 |  | type,
 |  | member
 | ) |
Value:
({ \
        typeof( ((type *)0)->member ) *_mptr = (ptr); /* type check */ \
        (type *)(void *)((char *)_mptr - offsetof(type, member)); \
    })

Cast a member of a structure out to the containing structure.

Parameters:
ptr | the pointer to the member.
type | the type of the container struct this is embedded in.
member | the name of the member within the struct.

Definition at line 597 of file compiler.h.

#define countof ( a )
Value:
(sizeof(a) / sizeof(*(a)) +     \
                STATIC_ASSERT_EXPR(         \
                    !__builtin_types_compatible_p(  \
                        typeof(a), typeof(&a[0]))))

Count the number of elements in the static array a.

Note:
This macro is non-standard, but implements a very common idiom

Definition at line 570 of file compiler.h.

#define offsetof | ( | s,
 |  | m
 | ) | (size_t)&(((s *)0)->m)

Return the byte offset of the member m in struct s.

Note:
This macro should be defined in "stddef.h" and is sometimes compiler-specific (g++ has a builtin for it).

Definition at line 553 of file compiler.h.

Typedef Documentation

typedef const void* const_iptr_t

Bulk storage large enough for both pointers to constants or integers.

Definition at line 472 of file compiler.h.

typedef void* iptr_t

Bulk storage large enough for both pointers or integers.

Definition at line 469 of file compiler.h.

typedef int32_t mtime_t

Type for time expressed in milliseconds.

Definition at line 459 of file compiler.h.

typedef unsigned char sigbit_t

Type for signal bits.

Definition at line 474 of file compiler.h.

typedef unsigned char sigmask_t

Type for signal masks.

Definition at line 475 of file compiler.h.

typedef int32_t ticks_t

Type for time expressed in ticks.

Definition at line 452 of file compiler.h.

typedef int32_t utime_t

Type for time expressed in microseconds.

Definition at line 454 of file compiler.h.


BeRTOS: compiler.h Source File

  • cfg
compiler.h
Go to the documentation of this file.
00001
00039 #ifndef BERTOS_COMPILER_H
00040 #define BERTOS_COMPILER_H
00041
00042 #include <cpu/detect.h>
00043
00044
00045 #if defined __GNUC__ && defined __GNUC_MINOR__
00046     #define GNUC_PREREQ(maj, min) \
00047         ((__GNUC__ << 16) + __GNUC_MINOR__ >= ((maj) << 16) + (min))
00048 #else
00049     #define GNUC_PREREQ(maj, min) 0
00050 #endif
00051
00052 /* Some CW versions do not allow enabling C99 from the settings panel. */
00053 #if defined(__MWERKS__)
00054     #pragma c99 on
00055 #endif
00056
00057 #if defined(__STDC_VERSION__)
00058     #if (__STDC_VERSION__ == 199409L) // IAR
00059         #define COMPILER_C99      1  // not true, because partial C99, avoid miscompilation
00060     #elif (__STDC_VERSION__ >= 199901L) // GCC
00061         #define COMPILER_C99      1
00062     #else
00063         #define COMPILER_C99      0
00064     #endif
00065 #endif
00066
00067
00069 #define PP_CAT(x,y)         PP_CAT__(x,y)
00070 #define PP_CAT__(x,y)       x ## y
00071 #define PP_CAT3(x,y,z)      PP_CAT(PP_CAT(x,y),z)
00072 #define PP_CAT4(x,y,z,w)    PP_CAT(PP_CAT3(x,y,z),w)
00073 #define PP_CAT5(x,y,z,w,j)  PP_CAT(PP_CAT4(x,y,z,w),j)
00074
00076 #define PP_STRINGIZE(x)     PP_STRINGIZE__(x)
00077 #define PP_STRINGIZE__(x)   #x
00078
00079
00082 #if COMPILER_C99
00083     #define COUNT_PARMS2(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _, ...) _
00084     #define COUNT_PARMS(...) \
00085             COUNT_PARMS2(11 , ## __VA_ARGS__, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
00086
00094 #else
00095     #define COUNT_PARMS2(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _, ...) _
00096     #define COUNT_PARMS(args...) \
00097             COUNT_PARMS2(11 , ## args, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
00098
00106 #endif
00107
00108 #if defined(__IAR_SYSTEMS_ICC) || defined(__IAR_SYSTEMS_ICC__)
00109
00110     #pragma language=extended
00111
00112     /* IAR iccarm specific functions */
00113     #include <intrinsics.h>
00114     #pragma diag_suppress=Pe940
00115     #pragma inline = forced
00116
00117     #define MEMORY_BARRIER      asm("")
00118
00119     #if CPU_ARM || CPU_CM3
00120
00121         #define COMPILER_VARIADIC_MACROS 1
00122
00123         #define INTERRUPT(x)  __irq __arm void x (void)
00124         #define INLINE        static inline
00125         #define NAKED
00126
00127         /* Include some standard C89/C99 stuff */
00128         #include <stddef.h>
00129         #include <stdint.h>
00130         #include <stdbool.h>
00131
00132     #elif CPU_I196
00133
00134         // IAR has size_t as built-in type, but does not define this symbol.
00135         #define _SIZE_T_DEFINED
00136
00137         #define INTERRUPT(x)  interrupt [x]
00138         #define REGISTER      shortad
00139         #define INLINE        /* unsupported */
00140
00141         /*
00142          * Imported from <longjmp.h>. Unfortunately, we can't just include
00143          * this header because it typedefs jmp_buf to be an array of chars.
00144          * This would allow the compiler to place the buffer on an odd address.
00145          * The CPU _should_ be able to perform word accesses to
00146          * unaligned data, but there are *BUGS* in the 80196KC with
00147          * some combinations of opcodes and addressing modes. One of
00148          * these, "ST SP,[?GR]+" is used in the longjmp() implementation
00149          * provided by the IAR compiler ANSI C library. When ?GR contains
00150          * an odd address, surprisingly the CPU will copy the high order
00151          * byte of the source operand (SP) in the low order byte of the
00152          * destination operand (the memory location pointed to by ?GR).
00153          *
00154          * We also need to replace the library setjmp()/longjmp() with
00155          * our own versions because the IAR implementation "forgets" to
00156          * save the contents of local registers (?LR).
00157          */
00158         struct _JMP_BUF
00159         {
00160             void *sp;           /* Stack pointer */
00161             void *return_addr;  /* Return address */
00162             int lr[6];          /* 6 local registers */
00163         };
00164
00165         typedef struct _JMP_BUF jmp_buf[1];
00166
00167         int setjmp(jmp_buf env);
00168         void longjmp(jmp_buf env, int val);
00169
00170         /* Fake bool support */
00171         #define true (1==1)
00172         #define false (1!=1)
00173         typedef unsigned char bool;
00174
00175     #else
00176         #error Unsupported CPU
00177     #endif
00178
00179 #elif defined(_MSC_VER) /* Win32 emulation support */
00180
00181     /* MSVC doesn't provide <stdbool.h>. */
00182     #ifndef __cplusplus
00183         #define true (1==1)
00184         #define false (1!=1)
00185         typedef int bool;
00186     #endif /* !__cplusplus */
00187
00188     /* These C99 functions are oddly named in MSVCRT32.lib */
00189     #define snprintf _snprintf
00190     #define vsnprintf _vsnprintf
00191
00192     /* MSVC doesn't support C99's __func__, but has a similar extension. */
00193     #define __func__ __FUNCTION__
00194
00195     /* MSVC doesn't support C99's inline keyword */
00196     #ifndef __cplusplus
00197         #define INLINE __inline
00198     #endif
00199
00200 #elif defined(__GNUC__)
00201
00202     /* Compiler features */
00203     #define COMPILER_VARIADIC_MACROS 1 /* Even in C++ */
00204     #define COMPILER_TYPEOF 1
00205     #define COMPILER_STATEMENT_EXPRESSIONS 1
00206
00207     /* GCC attributes */
00208     #define FORMAT(type,fmt,first)  __attribute__((__format__(type, fmt, first)))
00209     #define NORETURN                __attribute__((__noreturn__))
00210     #define UNUSED_ARG(type,arg)    __attribute__((__unused__)) type arg
00211     #define UNUSED_VAR(type,name)   __attribute__((__unused__)) type name
00212     #define USED_VAR(type,name)     __attribute__((__used__)) type name
00213     #define INLINE                  static inline __attribute__((__always_inline__))
00214     #define NOINLINE                __attribute__((noinline))
00215     #define LIKELY(x)               __builtin_expect(!!(x), 1)
00216     #define UNLIKELY(x)             __builtin_expect(!!(x), 0)
00217     #define PURE_FUNC               __attribute__((pure))
00218     #define CONST_FUNC              __attribute__((const))
00219     #define UNUSED_FUNC             __attribute__((unused))
00220     #define USED_FUNC               __attribute__((__used__))
00221     #define RESTRICT                __restrict__
00222     #define MUST_CHECK              __attribute__((warn_unused_result))
00223     #define PACKED                  __attribute__((packed))
00224     #define ALIGNED(x)              __attribute__ ((__aligned__(x)))
00225     #if CPU_ARM | CPU_CM3
00226         #define NAKED       __attribute__((naked))
00227     #else
00228         #define NAKED
00229     #endif
00230
00234     #define MEMORY_BARRIER           asm volatile ("" : : : "memory")
00235
00236     #if GNUC_PREREQ(3,1)
00237         #define DEPRECATED  __attribute__((__deprecated__))
00238     #endif
00239
00240     #if GNUC_PREREQ(4,5)
00241         #define UNREACHABLE() __builtin_unreachable()
00242     #endif
00243
00244     #ifndef __cplusplus
00245         #define ASSERT_TYPE_EQUAL(var1, var2) \
00246             STATIC_ASSERT(__builtin_types_compatible_p(typeof(var1), typeof(var2)))
00247         #define ASSERT_TYPE_IS(var, type) \
00248             STATIC_ASSERT(__builtin_types_compatible_p(typeof(var), type))
00249     #endif
00250
00251     /* Include some standard C89/C99 stuff */
00252     #include <stddef.h>
00253     #include <stdint.h>
00254     #include <stdbool.h>
00255     #if !CPU_AVR
00256     #include <sys/types.h> /* for ssize_t */
00257     #endif
00258
00259     #ifndef __cplusplus
00260         /*
00261          * Disallow some C++ keywords as identifiers in C programs,
00262          * for improved portability.
00263          */
00264         #pragma GCC poison new delete class template typename
00265         #pragma GCC poison private protected public operator
00266         #pragma GCC poison friend mutable using namespace
00267         #pragma GCC poison cin cout cerr clog
00268     #endif
00269
00270
00271
00272 #elif defined(__MWERKS__)
00273
00274     /* Compiler features */
00275     #define COMPILER_VARIADIC_MACROS 1
00276     #define COMPILER_TYPEOF 1
00277     #define COMPILER_STATEMENT_EXPRESSIONS 1
00278
00279     #define typeof __typeof__
00280
00281     #define UNUSED_ARG(type,arg)    type
00282
00283     #include <stddef.h>
00284     #include <stdint.h>
00285     #include <stdbool.h>
00286
00287     // CodeWarrior has size_t as built-in type, but does not define this symbol.
00288     #define _SIZE_T_DEFINED
00289
00290 #else
00291     #error unknown compiler
00292 #endif
00293
00294
00295 /* Defaults for compiler extensions. */
00296
00301 #ifndef COMPILER_VARIADIC_MACROS
00302 #define COMPILER_VARIADIC_MACROS (COMPILER_C99 != 0)
00303 #endif
00304
00309 #ifndef COMPILER_TYPEOF
00310 #define COMPILER_TYPEOF 0
00311 #endif
00312
00317 #ifndef COMPILER_STATEMENT_EXPRESSIONS
00318 #define COMPILER_STATEMENT_EXPRESSIONS 0
00319 #endif
00320
00321 /* A few defaults for missing compiler features. */
00322 #ifndef INLINE
00323 #define INLINE                 static inline
00324 #endif
00325 #ifndef NOINLINE
00326 #define NOINLINE               /* nothing */
00327 #endif
00328 #ifndef NORETURN
00329 #define NORETURN               /* nothing */
00330 #endif
00331 #ifndef FORMAT
00332 #define FORMAT(type,fmt,first) /* nothing */
00333 #endif
00334 #ifndef DEPRECATED
00335 #define DEPRECATED             /* nothing */
00336 #endif
00337 #ifndef UNUSED_ARG
00338 #define UNUSED_ARG(type,arg)   type arg
00339 #endif
00340 #ifndef UNUSED_VAR
00341 #define UNUSED_VAR(type,name)  type name
00342 #endif
00343 #ifndef USED_VAR
00344 #define USED_VAR(type,name)    type name
00345 #endif
00346 #ifndef REGISTER
00347 #define REGISTER               /* nothing */
00348 #endif
00349 #ifndef LIKELY
00350 #define LIKELY(x)              x
00351 #endif
00352 #ifndef UNLIKELY
00353 #define UNLIKELY(x)            x
00354 #endif
00355 #ifndef PURE_FUNC
00356 #define PURE_FUNC              /* nothing */
00357 #endif
00358 #ifndef CONST_FUNC
00359 #define CONST_FUNC             /* nothing */
00360 #endif
00361 #ifndef UNUSED_FUNC
00362 #define UNUSED_FUNC            /* nothing */
00363 #endif
00364 #ifndef USED_FUNC
00365 #define USED_FUNC              /* nothing */
00366 #endif
00367 #ifndef RESTRICT
00368 #define RESTRICT               /* nothing */
00369 #endif
00370 #ifndef MUST_CHECK
00371 #define MUST_CHECK             /* nothing */
00372 #endif
00373 #ifndef PACKED
00374 #define PACKED                 /* nothing */
00375 #endif
00376 #ifndef ALIGNED
00377 #define ALIGNED                /* nothing */
00378 #endif
00379 #ifndef MEMORY_BARRIER
00380 #define MEMORY_BARRIER         /* nothing */
00381 #warning No memory barrier defined for select compiler. If you use the kernel check it.
00382 #endif
00383 #ifndef UNREACHABLE
00384 #define UNREACHABLE() for (;;)
00385 #endif
00386
00387
00388 /* Misc definitions */
00389 #ifndef NULL
00390 #define NULL  (void *)0
00391 #endif
00392 #ifndef EOF
00393 #define EOF   (-1)
00394 #endif
00395
00396 /* Support for hybrid C/C++ applications. */
00397 #ifdef __cplusplus
00398     #define EXTERN_C        extern "C"
00399     #define EXTERN_C_BEGIN  extern "C" {
00400     #define EXTERN_C_END    }
00401     #define EXTERN_CONST    extern const
00402     #define CONST_CAST(TYPE,EXPR)   (const_cast<TYPE>(EXPR))
00403 #else
00404     #define EXTERN_C        extern
00405     #define EXTERN_C_BEGIN  /* nothing */
00406     #define EXTERN_C_END    /* nothing */
00407     #define EXTERN_CONST    const
00408     #define CONST_CAST(TYPE,EXPR)   ((TYPE)(EXPR)) /* FIXME: How can we suppress the warning in C? */
00409 #endif
00410
00411
00412 #if defined(_MSC_VER) \
00413     || ((defined(__IAR_SYSTEMS_ICC) || defined(__IAR_SYSTEMS_ICC__)) && CPU_I196)
00414
00420     typedef signed char         int8_t;
00421     typedef unsigned char       uint8_t;
00422     typedef short int           int16_t;
00423     typedef unsigned short int  uint16_t;
00424     typedef long int            int32_t; /* _WIN64 safe */
00425     typedef unsigned long int   uint32_t; /* _WIN64 safe */
00426
00427     #ifdef _MSC_VER
00428         typedef __int64              int64_t;
00429         typedef unsigned __int64     uint64_t;
00430     #else
00431         typedef long long            int64_t;
00432         typedef unsigned long long   uint64_t;
00433     #endif
00434     /* \} */
00435 #else
00436     /* This is the standard location. */
00437     #include <stdint.h>
00438 #endif
00439
00440 #if CPU_AVR_ATMEGA8
00441     /*
00442      * The ATmega8 has a very small Flash, so we can't afford
00443      * to link in support routines for 32bit integer arithmetic.
00444      */
00445     typedef int16_t ticks_t;
00446     typedef int16_t mtime_t;
00447     typedef int16_t utime_t;
00448     #define SIZEOF_MTIME_T (16 / CPU_BITS_PER_CHAR)
00449     #define SIZEOF_UTIME_T (16 / CPU_BITS_PER_CHAR)
00450     #define MTIME_INFINITE 0x7FFFL
00451 #else
00452     typedef int32_t ticks_t;
00454     typedef int32_t utime_t;
00455     #define SIZEOF_UTIME_T (32 / CPU_BITS_PER_CHAR)
00456
00457     #ifndef DEVLIB_MTIME_DEFINED
00458         #define DEVLIB_MTIME_DEFINED 1 /* Resolve conflict with <os/hptime.h> */
00459         typedef int32_t mtime_t;
00460         #define SIZEOF_MTIME_T (32 / CPU_BITS_PER_CHAR)
00461         #define MTIME_INFINITE 0x7FFFFFFFL
00462     #endif
00463 #endif
00464
00466 typedef void (*Hook)(void *);
00467
00469 typedef void * iptr_t;
00470
00472 typedef const void * const_iptr_t;
00473
00474 typedef unsigned char sigbit_t;
00475 typedef unsigned char sigmask_t;
00480 typedef struct Signal
00481 {
00482     sigmask_t    wait;
00483     sigmask_t    recv;
00484 } Signal;
00485
00500 #if !(defined(size_t) || defined(_SIZE_T_DEFINED) || defined(_BSD_SIZE_T_DEFINED_) \
00501     || defined(_SIZE_T))
00502     #if CPU_X86
00503         /* 32bit or 64bit (32bit for _WIN64). */
00504         typedef unsigned long size_t;
00505     #else
00506         #error Unknown CPU
00507     #endif
00508 #endif
00509
00510 #if !(defined(ssize_t) || defined(_SSIZE_T) || defined(__ssize_t_defined))
00511     #if CPU_X86
00512         /* 32bit or 64bit (32bit for _WIN64). */
00513         typedef long ssize_t;
00514     #elif CPU_ARM || CPU_CM3
00515         typedef int ssize_t;
00516     #elif CPU_AVR || CPU_MSP430
00517         /* 16bit (missing in avr-/msp430-libc's sys/types.h). */
00518         typedef int ssize_t;
00519     #else
00520         #error Unknown CPU
00521     #endif
00522 #endif
00523 /*\}*/
00524
00525
00534 #if CPU_DSP56K
00535     /* Registers can be accessed only through 16-bit pointers */
00536     typedef volatile uint16_t  reg16_t;
00537 #else
00538     typedef volatile uint8_t   reg8_t;
00539     typedef volatile uint16_t  reg16_t;
00540     typedef volatile uint32_t  reg32_t;
00541 #endif
00542 /*\}*/
00543
00544
00545 /* Quasi-ANSI macros */
00546 #ifndef offsetof
00547
00553     #define offsetof(s,m)  (size_t)&(((s *)0)->m)
00554 #endif
00555 #ifndef countof
00556
00561     #if defined(__GNUC__) && !defined(__cplusplus)
00562         /*
00563          * Perform a compile time type checking: countof() can only
00564          * work with static arrays, so throw a compile time error if a
00565          * pointer is passed as argument.
00566          *
00567          * NOTE: the construct __builtin_types_compatible_p() is only
00568          * available for C.
00569          */
00570         #define countof(a) (sizeof(a) / sizeof(*(a)) +      \
00571                 STATIC_ASSERT_EXPR(         \
00572                     !__builtin_types_compatible_p(  \
00573                         typeof(a), typeof(&a[0]))))
00574     #else
00575         #define countof(a)  (sizeof(a) / sizeof(*(a)))
00576     #endif
00577 #endif
00578 #ifndef alignof
00579
00586     #define alignof(type) offsetof(struct { char c; type member; }, member)
00587 #endif
00588
00596 #if COMPILER_TYPEOF && COMPILER_STATEMENT_EXPRESSIONS
00597     #define containerof(ptr, type, member) ({ \
00598         typeof( ((type *)0)->member ) *_mptr = (ptr); /* type check */ \
00599         (type *)(void *)((char *)_mptr - offsetof(type, member)); \
00600     })
00601 #else
00602     #define containerof(ptr, type, member) \
00603         ( (type *)(void *)((char *)(ptr) - offsetof(type, member)) )
00604 #endif
00605
00607 #define STATIC_ASSERT(condition)  \
00608     UNUSED_VAR(extern char, STATIC_ASSERTION_FAILED__[(condition) ? 1 : -1])
00609
00614 #define STATIC_ASSERT_EXPR(__cond) \
00615     (sizeof(struct { int STATIC_ASSERTION_FAILED__:!!(__cond); }) * 0)
00616
00617 #ifndef ASSERT_TYPE_EQUAL
00618
00619     #define ASSERT_TYPE_EQUAL(var1, var2)  \
00620             do { (void)(&(var1) == &(var2)); } while(0)
00621 #endif
00622
00623 #ifndef ASSERT_TYPE_IS
00624
00625     #define ASSERT_TYPE_IS(var, type)  \
00626             do { (void)(&(var) == (type *)0); } while(0)
00627 #endif
00628
00634 #ifdef __ICCARM__
00635 #define ACCESS_SAFE(x) x
00636 #else
00637 #define ACCESS_SAFE(x) (*(volatile typeof(x) *)&(x))
00638 #endif
00639
00640 #endif /* BERTOS_COMPILER_H */


BeRTOS: context_switch.c File Reference

  • benchmark
context_switch.c File Reference

Context switch benchmark. More...

#include "context_switch.h"
#include "hw/hw_led.h"
#include "cfg/cfg_context_switch.h"
#include <cfg/debug.h>
#include <cpu/irq.h>
#include <cpu/power.h>
#include <drv/timer.h>
#include <kern/proc.h>

Go to the source code of this file.

Detailed Description

Context switch benchmark.

Author:
Andrea Righi <arighi@develer.com>
Daniele Basiele <asterix@develer.com>

Definition in file context_switch.c.


BeRTOS: context_switch.c Source File

  • benchmark
context_switch.c
Go to the documentation of this file.
00001
00039 #include "context_switch.h"
00040
00041 #include "hw/hw_led.h"
00042
00043 #include "cfg/cfg_context_switch.h"
00044 #include <cfg/debug.h>
00045
00046 #include <cpu/irq.h>
00047 #include <cpu/power.h>
00048
00049 #include <drv/timer.h>
00050 #if CONFIG_USE_HP_TIMER
00051 #include <drv/ser.h>
00052 static Serial out;
00053 #endif
00054
00055 #include <kern/proc.h>
00056
00057 #define PROC_STACK_SIZE    KERN_MINSTACKSIZE
00058
00059 static PROC_DEFINE_STACK(hp_stack, PROC_STACK_SIZE);
00060 static PROC_DEFINE_STACK(lp_stack, PROC_STACK_SIZE);
00061
00062 static Process *hp_proc, *lp_proc, *main_proc;
00063 #if CONFIG_USE_HP_TIMER
00064 static hptime_t start, end;
00065 #endif
00066
00067 static void NORETURN hp_process(void)
00068 {
00069     while (1)
00070     {
00071         sig_wait(SIG_USER0);
00072         #if CONFIG_USE_LED
00073             LED_ON();
00074         #endif
00075         #if CONFIG_USE_HP_TIMER
00076             end = timer_hw_hpread();
00077         #endif
00078         sig_send(main_proc, SIG_USER0);
00079     }
00080 }
00081
00082 static void NORETURN lp_process(void)
00083 {
00084     while (1)
00085     {
00086         sig_wait(SIG_USER0);
00087         #if CONFIG_USE_LED
00088             LED_ON();
00089             LED_OFF();
00090         #endif
00091         #if CONFIG_USE_HP_TIMER
00092             start = timer_hw_hpread();
00093         #endif
00094         sig_send(hp_proc, SIG_USER0);
00095     }
00096 }
00097
00098
00099 void NORETURN context_switch(void)
00100 {
00101     IRQ_ENABLE;
00102     timer_init();
00103     proc_init();
00104
00105     #if CONFIG_USE_HP_TIMER
00106         ser_init(&out, CONFIG_CTX_DEBUG_PORT);
00107         ser_setbaudrate(&out, CONFIG_CTX_DEBUG_BAUDRATE);
00108     #endif
00109
00110     #if CONFIG_USE_LED
00111         LED_INIT();
00112     #endif
00113
00114     proc_forbid();
00115     hp_proc = proc_new(hp_process, NULL, PROC_STACK_SIZE, hp_stack);
00116     lp_proc = proc_new(lp_process, NULL, PROC_STACK_SIZE, lp_stack);
00117     main_proc = proc_current();
00118     proc_setPri(hp_proc, 2);
00119     proc_setPri(lp_proc, 1);
00120     proc_permit();
00121
00122     while (1)
00123     {
00124         timer_delay(100);
00125
00126         sig_send(lp_proc, SIG_USER0);
00127         sig_wait(SIG_USER0);
00128
00129         #if CONFIG_USE_HP_TIMER
00130             kfile_printf(&out.fd,
00131                 "Switch: %lu.%lu usec\n\r",
00132                 hptime_to_us((end - start)),
00133                 hptime_to_us((end - start) * 1000) % 1000);
00134         #endif
00135     }
00136 }


BeRTOS: context_switch.h File Reference

  • benchmark
context_switch.h File Reference

Context switch benchmark. More...

Go to the source code of this file.

Detailed Description

Context switch benchmark.

Author:
Andrea Righi <arighi@develer.com>
Daniele Basiele <asterix@develer.com>

Definition in file context_switch.h.


BeRTOS: context_switch.h Source File

  • benchmark
context_switch.h
Go to the documentation of this file.
00001
00044 #ifndef BENCHMARK_CONTEXT_SWITCH_H
00045 #define BENCHMARK_CONTEXT_SWITCH_H
00046
00047 void context_switch(void);
00048
00049 #endif /* BENCHMARK_CONTEXT_SWITCH_H */


BeRTOS: coop.c File Reference

  • kern
coop.c File Reference

Go to the source code of this file.

Detailed Description

Definition in file coop.c.


BeRTOS: coop.c Source File

  • kern
coop.c
Go to the documentation of this file.
00001


BeRTOS: byteorder.h File Reference

  • cpu
Defines | Functions
cpu/byteorder.h File Reference

Functions to convert integers to/from host byte-order. More...

#include <cfg/compiler.h>
#include <cpu/attr.h>
#include <cpu/detect.h>
#include <cpu/types.h>
#include <cfg/macros.h>
#include <cpu/irq.h>

Go to the source code of this file.

Defines

#define | SWAB16(x)
Swap upper and lower bytes in a 16-bit value.
#define | SWAB32(x)
Reverse bytes in a 32-bit value (e.g.
#define | SWAB64(x)
Reverse bytes in a 64-bit value.

Functions

float | swab_float (float x)
Reverse bytes in a float value.

Detailed Description

Functions to convert integers to/from host byte-order.

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file cpu/byteorder.h.

Define Documentation

#define SWAB32 ( x )
Value:
((uint32_t)(( \
    (ROTR(x, 8) & 0xFF00FF00) | \
    (ROTL(x, 8) & 0x00FF00FF))) + \
        STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint32_t)))

Reverse bytes in a 32-bit value (e.g.

: 0x12345678 -> 0x78563412).

Definition at line 64 of file cpu/byteorder.h.


BeRTOS: byteorder.h Source File

  • cpu
cpu/byteorder.h
Go to the documentation of this file.
00001
00038 #ifndef MWARE_BYTEORDER_H
00039 #define MWARE_BYTEORDER_H
00040
00041 #include <cfg/compiler.h>
00042 #include <cpu/attr.h>
00043 #include <cpu/detect.h>
00044 #include <cpu/types.h>
00045 #include <cfg/macros.h>
00046
00050 #define SWAB16(x) ((uint16_t)(ROTR((x), 8) + \
00051         STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint16_t))))
00052
00053 /*
00054  * On Cortex-M3, GCC 4.4 builtin implementation is slower than our own
00055  * rot-based implementation.
00056  */
00057 #if GNUC_PREREQ(4, 3) && !CPU_CM3
00058 #define SWAB32(x) ((uint32_t)(__builtin_bswap32((x) + \
00059         STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint32_t)))))
00060 #else
00061
00064 #define SWAB32(x) ((uint32_t)(( \
00065     (ROTR(x, 8) & 0xFF00FF00) | \
00066     (ROTL(x, 8) & 0x00FF00FF))) + \
00067         STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint32_t)))
00068 #endif
00069
00070 #if GNUC_PREREQ(4, 3)
00071 #define SWAB64(x) ((uint64_t)(__builtin_bswap64((x) + \
00072         STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint64_t)))))
00073 #else
00074
00077 #define SWAB64(x) ((uint64_t)(                      \
00078     (((uint64_t)(x) & (uint64_t)0x00000000000000ffULL) << 56) | \
00079     (((uint64_t)(x) & (uint64_t)0x000000000000ff00ULL) << 40) | \
00080     (((uint64_t)(x) & (uint64_t)0x0000000000ff0000ULL) << 24) | \
00081     (((uint64_t)(x) & (uint64_t)0x00000000ff000000ULL) <<  8) | \
00082     (((uint64_t)(x) & (uint64_t)0x000000ff00000000ULL) >>  8) | \
00083     (((uint64_t)(x) & (uint64_t)0x0000ff0000000000ULL) >> 24) | \
00084     (((uint64_t)(x) & (uint64_t)0x00ff000000000000ULL) >> 40) | \
00085     (((uint64_t)(x) & (uint64_t)0xff00000000000000ULL) >> 56) + \
00086         STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint64_t))))
00087 #endif
00088
00089 #if CPU_BYTE_ORDER == CPU_LITTLE_ENDIAN
00090 #define cpu_to_le16(x) ((uint16_t)(x + \
00091         STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint16_t))))
00092 #define cpu_to_le32(x) ((uint32_t)(x + \
00093         STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint32_t))))
00094 #define cpu_to_le64(x) ((uint64_t)(x + \
00095         STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint64_t))))
00096 #define cpu_to_be16(x) SWAB16(x)
00097 #define cpu_to_be32(x) SWAB32(x)
00098 #define cpu_to_be64(x) SWAB64(x)
00099 #elif CPU_BYTE_ORDER == CPU_BIG_ENDIAN
00100 #define cpu_to_le16(x) SWAB16(x)
00101 #define cpu_to_le32(x) SWAB32(x)
00102 #define cpu_to_le64(x) SWAB64(x)
00103 #define cpu_to_be16(x) ((uint16_t)(x + \
00104         STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint16_t))))
00105 #define cpu_to_be32(x) ((uint32_t)(x + \
00106         STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint32_t))))
00107 #define cpu_to_be64(x) ((uint64_t)(x + \
00108         STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint64_t))))
00109 #else
00110 #error "unrecognized CPU endianness"
00111 #endif
00112
00113 #define be16_to_cpu(x)      cpu_to_be16(x)
00114 #define le16_to_cpu(x)      cpu_to_le16(x)
00115 #define be32_to_cpu(x)      cpu_to_be32(x)
00116 #define le32_to_cpu(x)      cpu_to_le32(x)
00117 #define be64_to_cpu(x)      cpu_to_be64(x)
00118 #define le64_to_cpu(x)      cpu_to_le64(x)
00119
00120 #define host_to_net16(x)    cpu_to_be16(x)
00121 #define net_to_host16(x)    be16_to_cpu(x)
00122 #define host_to_net32(x)    cpu_to_be32(x)
00123 #define net_to_host32(x)    be32_to_cpu(x)
00124 #define host_to_net64(x)    cpu_to_be64(x)
00125 #define net_to_host64(x)    be64_to_cpu(x)
00126
00130 INLINE float swab_float(float x)
00131 {
00132     /* Avoid breaking strict aliasing rules.  */
00133     char *cx = (char *)(&x);
00134     STATIC_ASSERT(sizeof(float) == 4);
00135     #define BYTEORDER_SWAP(a, b) do { (a) ^= (b); (b) ^= (a); (a) ^= (b); } while(0)
00136     BYTEORDER_SWAP(cx[0], cx[3]);
00137     BYTEORDER_SWAP(cx[1], cx[2]);
00138     #undef BYTEORDER_SWAP
00139     return x;
00140 }
00141
00142 INLINE float cpu_to_be_float(float x)
00143 {
00144     return (CPU_BYTE_ORDER == CPU_LITTLE_ENDIAN) ? swab_float(x) : x;
00145 }
00146
00147 INLINE float cpu_to_le_float(float x)
00148 {
00149     return (CPU_BYTE_ORDER == CPU_BIG_ENDIAN) ? swab_float(x) : x;
00150 }
00151
00152 INLINE float be_float_to_cpu(float x)
00153 {
00154     return cpu_to_be_float(x);
00155 }
00156
00157 INLINE float le_float_to_cpu(float x)
00158 {
00159     return cpu_to_le_float(x);
00160 }
00161
00162 INLINE float host_to_net_float(float x)
00163 {
00164     return cpu_to_be_float(x);
00165 }
00166
00167 INLINE float net_to_host_float(float x)
00168 {
00169     return be_float_to_cpu(x);
00170 }
00171
00172 #if CPU_ARM
00173 INLINE cpu_atomic_t
00174 cpu_atomic_xchg(volatile cpu_atomic_t *ptr, cpu_atomic_t val)
00175 {
00176     cpu_atomic_t ret;
00177
00178     asm volatile(
00179         "swp     %0, %1, [%2]"
00180
00181         : "=&r" (ret)
00182         : "r" (val), "r" (ptr)
00183         : "memory", "cc");
00184
00185     return ret;
00186 }
00187 #else /* CPU_ARM */
00188 #include <cpu/irq.h>
00189
00190 INLINE cpu_atomic_t
00191 cpu_atomic_xchg(volatile cpu_atomic_t *ptr, cpu_atomic_t val)
00192 {
00193     cpu_atomic_t ret;
00194
00195     ATOMIC(
00196         ret = *ptr;
00197         *ptr = val;
00198     );
00199     return ret;
00200 }
00201 #endif /* CPU_ARM */
00202
00203 #ifdef __cplusplus
00204
00206 template<typename T>
00207 INLINE T swab(T x);
00208
00209 template<> INLINE uint16_t swab(uint16_t x) { return SWAB16(x); }
00210 template<> INLINE uint32_t swab(uint32_t x) { return SWAB32(x); }
00211 template<> INLINE uint64_t swab(uint64_t x) { return SWAB64(x); }
00212 template<> INLINE int16_t  swab(int16_t x)  { return static_cast<int16_t>(SWAB16(static_cast<uint16_t>(x))); }
00213 template<> INLINE int32_t  swab(int32_t x)  { return static_cast<int32_t>(SWAB32(static_cast<uint32_t>(x))); }
00214 template<> INLINE int64_t  swab(int64_t x)  { return static_cast<int64_t>(SWAB64(static_cast<uint64_t>(x))); }
00215 template<> INLINE float    swab(float x)    { return swab_float(x); }
00216
00218 template<typename T>
00219 INLINE T cpu_to_be(T x)
00220 {
00221     return (CPU_BYTE_ORDER == CPU_LITTLE_ENDIAN) ? swab(x) : x;
00222 }
00223
00225 template<typename T>
00226 INLINE T cpu_to_le(T x)
00227 {
00228     return (CPU_BYTE_ORDER == CPU_BIG_ENDIAN) ? swab(x) : x;
00229 }
00230
00232 template<typename T>
00233 INLINE T be_to_cpu(T x)
00234 {
00235     return cpu_to_be(x);
00236 }
00237
00239 template<typename T>
00240 INLINE T le_to_cpu(T x)
00241 {
00242     return cpu_to_le(x);
00243 }
00244
00246 template<typename T>
00247 INLINE T net_to_host(T x)
00248 {
00249     return be_to_cpu(x);
00250 }
00251
00253 template<typename T>
00254 INLINE T host_to_net(T x)
00255 {
00256     return net_to_host(x);
00257 }
00258
00259 #endif /* __cplusplus */
00260
00261 #endif /* MWARE_BYTEORDER_H */


BeRTOS: irq.h File Reference

  • cpu
Defines
cpu/irq.h File Reference

CPU-specific IRQ definitions. More...

#include "detect.h"
#include "types.h"
#include <kern/proc.h>
#include <cfg/compiler.h>
#include "cfg/cfg_proc.h"

Go to the source code of this file.

Defines

#define ATOMIC(CODE)
Execute CODE atomically with respect to interrupts.

Detailed Description

CPU-specific IRQ definitions.

Author:
Giovanni Bajo <rasky@develer.com>
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>
Francesco Sacchi <batt@develer.com>

Definition in file cpu/irq.h.

Define Documentation

#define ATOMIC ( CODE )
Value:
do { \
        cpu_flags_t __flags; \
        IRQ_SAVE_DISABLE(__flags); \
        CODE; \
        IRQ_RESTORE(__flags); \
    } while (0)

Execute CODE atomically with respect to interrupts.

See also:
IRQ_SAVE_DISABLE IRQ_RESTORE

Definition at line 616 of file cpu/irq.h.


BeRTOS: irq.h Source File

  • cpu
cpu/irq.h
Go to the documentation of this file.
00001
00041 #ifndef CPU_IRQ_H
00042 #define CPU_IRQ_H
00043
00044 #include "detect.h"
00045 #include "types.h"
00046
00047 #include <kern/proc.h> /* proc_needPreempt() / proc_preempt() */
00048
00049 #include <cfg/compiler.h> /* for uintXX_t */
00050 #include "cfg/cfg_proc.h" /* CONFIG_KERN_PREEMPT */
00051
00052 #if CPU_I196
00053     #define IRQ_DISABLE             disable_interrupt()
00054     #define IRQ_ENABLE              enable_interrupt()
00055 #elif CPU_X86
00056
00057     /* Get IRQ_* definitions from the hosting environment. */
00058     #include <cfg/os.h>
00059     #if OS_EMBEDDED
00060         #define IRQ_DISABLE             FIXME
00061         #define IRQ_ENABLE              FIXME
00062         #define IRQ_SAVE_DISABLE(x)     FIXME
00063         #define IRQ_RESTORE(x)          FIXME
00064     #endif /* OS_EMBEDDED */
00065
00066 #elif CPU_CM3
00067     /* Cortex-M3 */
00068
00069     /*
00070      * Interrupt priority.
00071      *
00072      * NOTE: 0 means that an interrupt is not affected by the global IRQ
00073      * priority settings.
00074      */
00075     #define IRQ_PRIO            0x80
00076     #define IRQ_PRIO_MIN        0xf0
00077     #define IRQ_PRIO_MAX        0
00078     /*
00079      * To disable interrupts we just raise the system base priority to a
00080      * number lower than the default IRQ priority. In this way, all the
00081      * "normal" interrupt can't be triggered. High-priority interrupt can
00082      * still happen (at the moment only the soft-interrupt svcall uses a
00083      * priority greater than the default IRQ priority).
00084      *
00085      * To enable interrupts we set the system base priority to 0, that
00086      * means IRQ priority mechanism is disabled, and any interrupt can
00087      * happen.
00088      */
00089     #define IRQ_PRIO_DISABLED   0x40
00090     #define IRQ_PRIO_ENABLED    0
00091
00092     #ifdef __IAR_SYSTEMS_ICC__
00093         INLINE cpu_flags_t CPU_READ_FLAGS(void)
00094         {
00095             return __get_BASEPRI();
00096         }
00097
00098         INLINE void CPU_WRITE_FLAGS(cpu_flags_t flags)
00099         {
00100             __set_BASEPRI(flags);
00101         }
00102
00103         extern uint32_t CPU_READ_IPSR(void);
00104         extern bool irq_running(void);
00105
00106         #define IRQ_DISABLE CPU_WRITE_FLAGS(IRQ_PRIO_DISABLED)
00107
00108         #define IRQ_ENABLE  CPU_WRITE_FLAGS(IRQ_PRIO_ENABLED)
00109
00110         #define IRQ_SAVE_DISABLE(x)                 \
00111         do {                                \
00112             x = CPU_READ_FLAGS();                   \
00113             IRQ_DISABLE;                        \
00114         } while (0)
00115
00116         #define IRQ_RESTORE(x)                      \
00117         do {                                \
00118             CPU_WRITE_FLAGS(x);                 \
00119         } while (0)
00120     #else /* !__IAR_SYSTEMS_ICC__ */
00121         #define IRQ_DISABLE                     \
00122         ({                              \
00123             register cpu_flags_t reg = IRQ_PRIO_DISABLED;       \
00124             asm volatile (                      \
00125                 "msr basepri, %0"               \
00126                 : : "r"(reg) : "memory", "cc");         \
00127         })
00128
00129         #define IRQ_ENABLE                      \
00130         ({                              \
00131             register cpu_flags_t reg = IRQ_PRIO_ENABLED;        \
00132             asm volatile (                      \
00133                 "msr basepri, %0"               \
00134                 : : "r"(reg) : "memory", "cc");         \
00135         })
00136
00137         #define CPU_READ_FLAGS()                    \
00138         ({                              \
00139             register cpu_flags_t reg;               \
00140             asm volatile (                      \
00141                 "mrs %0, basepri"               \
00142                  : "=r"(reg) : : "memory", "cc");       \
00143             reg;                            \
00144         })
00145
00146         #define IRQ_SAVE_DISABLE(x)                 \
00147         ({                              \
00148             x = CPU_READ_FLAGS();                   \
00149             IRQ_DISABLE;                        \
00150         })
00151
00152         #define IRQ_RESTORE(x)                      \
00153         ({                              \
00154             asm volatile (                      \
00155                 "msr basepri, %0"               \
00156                 : : "r"(x) : "memory", "cc");           \
00157         })
00158
00159         INLINE bool irq_running(void)
00160         {
00161             register uint32_t ret;
00162
00163             /*
00164              * Check if the current stack pointer is the main stack or
00165              * process stack: we use the main stack only in Handler mode,
00166              * so this means we're running inside an ISR.
00167              */
00168             asm volatile (
00169                 "mrs %0, msp\n\t"
00170                 "cmp sp, %0\n\t"
00171                 "ite ne\n\t"
00172                 "movne %0, #0\n\t"
00173                 "moveq %0, #1\n\t" : "=r"(ret) : : "cc");
00174             return ret;
00175         }
00176     #endif /* __IAR_SYSTEMS_ICC__ */
00177
00178     #define IRQ_ENABLED() (CPU_READ_FLAGS() == IRQ_PRIO_ENABLED)
00179
00180     #define IRQ_RUNNING() irq_running()
00181
00182     #if (CONFIG_KERN && CONFIG_KERN_PREEMPT)
00183
00184         #define DECLARE_ISR_CONTEXT_SWITCH(func)        \
00185         void func(void);                    \
00186         INLINE void __isr_##func(void);             \
00187         void func(void)                     \
00188         {                           \
00189             __isr_##func();                 \
00190             if (!proc_needPreempt())            \
00191                 return;                 \
00192             /*
00193              * Set a PendSV request.
00194              *
00195              * The preemption handler will be called immediately
00196              * after this ISR in tail-chaining mode (without the
00197              * overhead of hardware state saving and restoration
00198              * between interrupts).
00199              */                     \
00200             HWREG(NVIC_INT_CTRL) = NVIC_INT_CTRL_PEND_SV;   \
00201         }                           \
00202         INLINE void __isr_##func(void)
00203
00214         #if CONFIG_KERN_PRI
00215             #define DECLARE_ISR(func) \
00216                 DECLARE_ISR_CONTEXT_SWITCH(func)
00217
00221             #define ISR_PROTO(func) \
00222                 ISR_PROTO_CONTEXT_SWITCH(func)
00223         #endif /* !CONFIG_KERN_PRI */
00224     #endif
00225
00226     #ifndef ISR_PROTO
00227         #define ISR_PROTO(func) void func(void)
00228     #endif
00229     #ifndef DECLARE_ISR
00230         #define DECLARE_ISR(func) void func(void)
00231     #endif
00232     #ifndef DECLARE_ISR_CONTEXT_SWITCH
00233         #define DECLARE_ISR_CONTEXT_SWITCH(func) void func(void)
00234     #endif
00235     #ifndef ISR_PROTO_CONTEXT_SWITCH
00236         #define ISR_PROTO_CONTEXT_SWITCH(func) void func(void)
00237     #endif
00238
00239 #elif CPU_ARM
00240
00241     #ifdef __IAR_SYSTEMS_ICC__
00242
00243         #include <inarm.h>
00244
00245         #if __CPU_MODE__ == 1 /* Thumb */
00246             /* Use stubs */
00247             extern cpu_flags_t get_CPSR(void);
00248             extern void set_CPSR(cpu_flags_t flags);
00249         #else
00250             #define get_CPSR __get_CPSR
00251             #define set_CPSR __set_CPSR
00252         #endif
00253
00254         #define IRQ_DISABLE __disable_interrupt()
00255         #define IRQ_ENABLE  __enable_interrupt()
00256
00257         #define IRQ_SAVE_DISABLE(x) \
00258         do { \
00259             (x) = get_CPSR(); \
00260             __disable_interrupt(); \
00261         } while (0)
00262
00263         #define IRQ_RESTORE(x) \
00264         do { \
00265             set_CPSR(x); \
00266         } while (0)
00267
00268         #define IRQ_ENABLED() \
00269             ((bool)(get_CPSR() & 0xb0))
00270
00271     #else /* !__IAR_SYSTEMS_ICC__ */
00272
00273         #define IRQ_DISABLE                 \
00274         do {                            \
00275             cpu_flags_t sreg;               \
00276             asm volatile (                  \
00277                 "mrs %0, cpsr\n\t"          \
00278                 "orr %0, %0, #0xc0\n\t"         \
00279                 "msr cpsr_c, %0\n\t"            \
00280                 : "=r" (sreg) : : "memory", "cc");  \
00281         } while (0)
00282
00283         #define IRQ_ENABLE                  \
00284         do {                            \
00285             cpu_flags_t sreg;               \
00286             asm volatile (                  \
00287                 "mrs %0, cpsr\n\t"          \
00288                 "bic %0, %0, #0xc0\n\t"         \
00289                 "msr cpsr_c, %0\n\t"            \
00290                 : "=r" (sreg) : : "memory", "cc");  \
00291         } while (0)
00292
00293         #define IRQ_SAVE_DISABLE(x)             \
00294         do {                            \
00295             register cpu_flags_t sreg;          \
00296             asm volatile (                  \
00297                 "mrs %0, cpsr\n\t"          \
00298                 "orr %1, %0, #0xc0\n\t"         \
00299                 "msr cpsr_c, %1\n\t"            \
00300                 : "=r" (x), "=r" (sreg)         \
00301                 : : "memory", "cc");            \
00302         } while (0)
00303
00304         #define IRQ_RESTORE(x)                  \
00305         do {                            \
00306             asm volatile (                  \
00307                 "msr cpsr_c, %0\n\t"            \
00308                 : : "r" (x) : "memory", "cc");      \
00309         } while (0)
00310
00311         #define CPU_READ_FLAGS()                \
00312         ({                          \
00313             cpu_flags_t sreg;               \
00314             asm volatile (                  \
00315                 "mrs %0, cpsr\n\t"          \
00316                 : "=r" (sreg) : : "memory", "cc");  \
00317             sreg;                       \
00318         })
00319
00320         #define IRQ_ENABLED() ((CPU_READ_FLAGS() & 0xc0) != 0xc0)
00321
00322         #if (CONFIG_KERN && CONFIG_KERN_PREEMPT)
00323             EXTERN_C void asm_irq_switch_context(void);
00324
00331             #define IRQ_ENTRY() asm volatile ( \
00332                         "sub    lr, lr, #4\n\t" \
00333                         "stmfd  sp!, {r0-r3, ip, lr}\n\t")
00334             #define IRQ_EXIT()  asm volatile ( \
00335                         "b  asm_irq_switch_context\n\t")
00336
00346             #define ISR_FUNC __attribute__((naked))
00347
00374             #define DECLARE_ISR_CONTEXT_SWITCH(func)        \
00375                 void ISR_FUNC func(void);           \
00376                 static NOINLINE void __isr_##func(void);    \
00377                 void ISR_FUNC func(void)            \
00378                 {                       \
00379                     IRQ_ENTRY();                \
00380                     IRQ_DISABLE;                \
00381                     __isr_##func();             \
00382                     IRQ_EXIT();             \
00383                 }                       \
00384                 static NOINLINE void __isr_##func(void)
00385
00389             #define ISR_PROTO_CONTEXT_SWITCH(func)  \
00390                 void ISR_FUNC func(void)
00391
00401             #if CONFIG_KERN_PRI
00402                 #define DECLARE_ISR(func) \
00403                     DECLARE_ISR_CONTEXT_SWITCH(func)
00404
00405                 #define ISR_PROTO(func) \
00406                     ISR_PROTO_CONTEXT_SWITCH(func)
00407             #endif /* !CONFIG_KERN_PRI */
00408         #endif /* CONFIG_KERN_PREEMPT */
00409
00410         #ifndef ISR_FUNC
00411             #define ISR_FUNC __attribute__((naked))
00412         #endif
00413         #ifndef DECLARE_ISR
00414             #define DECLARE_ISR(func) \
00415                 void ISR_FUNC func(void);               \
00416                 /*                          \
00417                  * FIXME: avoid the inlining of this function.      \
00418                  *                          \
00419                  * This is terribly inefficient, but it's a     \
00420                  * reliable workaround to avoid gcc blowing     \
00421                  * away the stack (see the bug below):          \
00422                  *                          \
00423                  * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41999    \
00424                  */                         \
00425                 static NOINLINE void __isr_##func(void);        \
00426                 void ISR_FUNC func(void)                \
00427                 {                           \
00428                     asm volatile (                  \
00429                         "sub    lr, lr, #4\n\t"         \
00430                         "stmfd  sp!, {r0-r3, ip, lr}\n\t"); \
00431                     __isr_##func();                 \
00432                     asm volatile (                  \
00433                         "ldmfd sp!, {r0-r3, ip, pc}^\n\t"); \
00434                 }                           \
00435                 static NOINLINE void __isr_##func(void)
00436         #endif
00437         #ifndef DECLARE_ISR_CONTEXT_SWITCH
00438             #define DECLARE_ISR_CONTEXT_SWITCH(func) DECLARE_ISR(func)
00439         #endif
00440         #ifndef ISR_PROTO
00441             #define ISR_PROTO(func) void ISR_FUNC func(void)
00442         #endif
00443         #ifndef ISR_PROTO_CONTEXT_SWITCH
00444             #define ISR_PROTO_CONTEXT_SWITCH(func) ISR_PROTO(func)
00445         #endif
00446
00447     #endif /* !__IAR_SYSTEMS_ICC_ */
00448
00449 #elif CPU_PPC
00450
00451     /* Get IRQ_* definitions from the hosting environment. */
00452     #include <cfg/os.h>
00453     #if OS_EMBEDDED
00454         #define IRQ_DISABLE         FIXME
00455         #define IRQ_ENABLE          FIXME
00456         #define IRQ_SAVE_DISABLE(x) FIXME
00457         #define IRQ_RESTORE(x)      FIXME
00458         #define IRQ_ENABLED()       FIXME
00459     #endif /* OS_EMBEDDED */
00460
00461 #elif CPU_DSP56K
00462
00463     #define IRQ_DISABLE             do { asm(bfset #0x0200,SR); asm(nop); } while (0)
00464     #define IRQ_ENABLE              do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
00465
00466     #define IRQ_SAVE_DISABLE(x)  \
00467         do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
00468     #define IRQ_RESTORE(x)  \
00469         do { (void)x; asm(move x,SR); } while (0)
00470
00471     static inline bool irq_running(void)
00472     {
00473         extern void *user_sp;
00474         return !!user_sp;
00475     }
00476     #define IRQ_RUNNING() irq_running()
00477
00478     static inline bool irq_enabled(void)
00479     {
00480         uint16_t x;
00481         asm(move SR,x);
00482         return !(x & 0x0200);
00483     }
00484     #define IRQ_ENABLED() irq_enabled()
00485
00486 #elif CPU_AVR
00487
00488     #define IRQ_DISABLE   asm volatile ("cli" ::)
00489     #define IRQ_ENABLE    asm volatile ("sei" ::)
00490
00491     #define IRQ_SAVE_DISABLE(x) \
00492     do { \
00493         __asm__ __volatile__( \
00494             "in %0,__SREG__\n\t" \
00495             "cli" \
00496             : "=r" (x) : /* no inputs */ : "cc" \
00497         ); \
00498     } while (0)
00499
00500     #define IRQ_RESTORE(x) \
00501     do { \
00502         __asm__ __volatile__( \
00503             "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
00504         ); \
00505     } while (0)
00506
00507     #define IRQ_ENABLED() \
00508     ({ \
00509         uint8_t sreg; \
00510         __asm__ __volatile__( \
00511             "in %0,__SREG__\n\t" \
00512             : "=r" (sreg)  /* no inputs & no clobbers */ \
00513         ); \
00514         (bool)(sreg & 0x80); \
00515     })
00516     #if (CONFIG_KERN && CONFIG_KERN_PREEMPT)
00517         #define DECLARE_ISR_CONTEXT_SWITCH(vect)        \
00518             INLINE void __isr_##vect(void);         \
00519             ISR(vect)                   \
00520             {                       \
00521                 __isr_##vect();             \
00522                 IRQ_PREEMPT_HANDLER();          \
00523             }                       \
00524             INLINE void __isr_##vect(void)
00525
00536         #if CONFIG_KERN_PRI
00537             #define DECLARE_ISR(func) \
00538                 DECLARE_ISR_CONTEXT_SWITCH(func)
00539
00543             #define ISR_PROTO(func) \
00544                 ISR_PROTO_CONTEXT_SWITCH(func)
00545         #endif /* !CONFIG_KERN_PRI */
00546     #endif
00547
00548     #ifndef ISR_PROTO
00549         #define ISR_PROTO(vect) ISR(vect)
00550     #endif
00551     #ifndef DECLARE_ISR
00552         #define DECLARE_ISR(vect) ISR(vect)
00553     #endif
00554     #ifndef DECLARE_ISR_CONTEXT_SWITCH
00555         #define DECLARE_ISR_CONTEXT_SWITCH(vect) ISR(vect)
00556     #endif
00557     #ifndef ISR_PROTO_CONTEXT_SWITCH
00558         #define ISR_PROTO_CONTEXT_SWITCH(vect) ISR(vect)
00559     #endif
00560
00561 #elif CPU_MSP430
00562
00563     /* Get the compiler defined macros */
00564     #include <signal.h>
00565     #define IRQ_DISABLE         dint()
00566     #define IRQ_ENABLE          eint()
00567
00568 #else
00569     #error No CPU_... defined.
00570 #endif
00571
00572 #ifdef IRQ_RUNNING
00573
00574     #define ASSERT_IRQ_CONTEXT()  ASSERT(IRQ_RUNNING())
00575
00577     #define ASSERT_USER_CONTEXT() ASSERT(!IRQ_RUNNING())
00578 #else
00579     #define IRQ_RUNNING()   false
00580     #define ASSERT_USER_CONTEXT()  do {} while(0)
00581     #define ASSERT_IRQ_CONTEXT()   do {} while(0)
00582 #endif
00583
00584 #ifdef IRQ_ENABLED
00585
00586     #define IRQ_ASSERT_ENABLED()  ASSERT(IRQ_ENABLED())
00587
00589     #define IRQ_ASSERT_DISABLED() ASSERT(!IRQ_ENABLED())
00590 #else
00591     #define IRQ_ASSERT_ENABLED() do {} while(0)
00592     #define IRQ_ASSERT_DISABLED() do {} while(0)
00593 #endif
00594
00595
00596 #ifndef IRQ_PREEMPT_HANDLER
00597     #if (CONFIG_KERN && CONFIG_KERN_PREEMPT)
00598
00601         INLINE void IRQ_PREEMPT_HANDLER(void)
00602         {
00603             if (proc_needPreempt())
00604                 proc_preempt();
00605         }
00606     #else
00607         #define IRQ_PREEMPT_HANDLER() /* Nothing */
00608     #endif
00609 #endif
00610
00616 #define ATOMIC(CODE) \
00617     do { \
00618         cpu_flags_t __flags; \
00619         IRQ_SAVE_DISABLE(__flags); \
00620         CODE; \
00621         IRQ_RESTORE(__flags); \
00622     } while (0)
00623
00624 #endif /* CPU_IRQ_H */


BeRTOS: pgm.h File Reference

  • cpu
cpu/pgm.h File Reference

Support for reading program memory on Harvard architectures. More...

#include <cfg/compiler.h>
#include <cpu/detect.h>
#include <cpu/attr.h>
#include <cpu/types.h>

Go to the source code of this file.

Defines

PGM support macros.

These macros enable dual compilation of code for both program and data memory.

Such a function may be defined like this:

    void PGM_FUNC(lcd_puts)(PGM_ATTR const char *str)
    {
        char c;
        while ((c = PGM_READ_CHAR(str++))
            lcd_putchar(c);
    }

The above code can be compiled twice: once with the _PROGMEM preprocessor symbol defined, and once without. The two object modules can then be linked in the same application for use by client code:

    lcd_puts("Hello, world!");
    lcd_puts_P(PSTR("Hello, world!"));

    // To be used when invoking inside other PGM_FUNC functions:
    PGM_FUNC(lcd_puts)(some_string);
#define | PGM_READ8(a) (*(const uint8_t *)(a))
#define | PGM_READ16(a) (*(const uint16_t *)(a))
#define | PGM_READ32(a) (*(const uint32_t *)(a))
#define | PGM_FUNC(x) x
#define | PGM_STR(x) x
#define | PGM_ATTR
#define | PGM_READ_CHAR(addr) PGM_READ8(addr)

Typedefs

Types for variables stored in program memory (harvard processors).
typedef PROGMEM char | pgm_char
typedef PROGMEM int8_t | pgm_int8_t
typedef PROGMEM uint8_t | pgm_uint8_t
typedef PROGMEM int16_t | pgm_int16_t
typedef PROGMEM uint16_t | pgm_uint16_t
typedef PROGMEM int32_t | pgm_int32_t
typedef PROGMEM uint32_t | pgm_uint32_t

Detailed Description

Support for reading program memory on Harvard architectures.

Support is currently provided for AVR microcontrollers only.

These macros allow building code twice, with and without pgm support (e.g.: strcpy() and strcpy_P()).

Set the _PROGMEM predefine to compile in conditional program-memory support.

Note:
This module contains code ripped out from avr-libc, which is distributed under a 3-clause BSD license.
Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file cpu/pgm.h.


BeRTOS: pgm.h Source File

  • cpu
cpu/pgm.h
Go to the documentation of this file.
00001
00048 #ifndef MWARE_PGM_H
00049 #define MWARE_PGM_H
00050
00051 #include <cfg/compiler.h> /* For intXX_t */
00052 #include <cpu/detect.h>
00053 #include <cpu/attr.h>     /* For CPU_HARVARD */
00054 #include <cpu/types.h>    /* For SIZEOF_INT */
00055
00056 #if CPU_AVR
00057
00058     #ifdef __AVR_ENHANCED__
00059         #define pgm_read8(addr) \
00060         ({ \
00061             uint16_t __addr16 = (uint16_t)(addr); \
00062             uint8_t __result; \
00063             __asm__ \
00064             ( \
00065                 "lpm %0, Z" "\n\t" \
00066                 : "=r" (__result) \
00067                 : "z" (__addr16) \
00068             ); \
00069             __result; \
00070         })
00071         #define pgm_read16(addr) \
00072         ({ \
00073             uint16_t __addr16 = (uint16_t)(addr); \
00074             uint16_t __result; \
00075             __asm__ \
00076             ( \
00077                 "lpm %A0, Z+"   "\n\t" \
00078                 "lpm %B0, Z"    "\n\t" \
00079                 : "=r" (__result), "=z" (__addr16) \
00080                 : "1" (__addr16) \
00081             ); \
00082             __result; \
00083         })
00084
00085
00086     #else /* !__AVR_ENHANCED__ */
00087
00088         #define pgm_read8(addr) \
00089         ({ \
00090             uint16_t __addr16 = (uint16_t)(addr); \
00091             uint8_t __result; \
00092             __asm__ \
00093             ( \
00094                 "lpm" "\n\t" \
00095                 "mov %0, r0" "\n\t" \
00096                 : "=r" (__result) \
00097                 : "z" (__addr16) \
00098                 : "r0" \
00099             ); \
00100             __result; \
00101         })
00102         #define pgm_read16(addr) \
00103         ({ \
00104             uint16_t __addr16 = (uint16_t)(addr); \
00105             uint16_t __result; \
00106             __asm__ \
00107             ( \
00108                 "lpm"           "\n\t" \
00109                 "mov %A0, r0"   "\n\t" \
00110                 "adiw r30, 1"   "\n\t" \
00111                 "lpm"           "\n\t" \
00112                 "mov %B0, r0"   "\n\t" \
00113                 : "=r" (__result), "=z" (__addr16) \
00114                 : "1" (__addr16) \
00115                 : "r0" \
00116             ); \
00117             __result; \
00118         })
00119
00120     #endif /* !__AVR_ENHANCED__ */
00121
00122     #define pgm_read32(addr)    ((uint32_t)(pgm_read16(addr) | (((uint32_t)pgm_read16(((const uint8_t *)(addr)) + 2)) << 16)))
00123     #ifndef PROGMEM
00124     #define PROGMEM  __attribute__((__progmem__))
00125     #endif
00126     #ifndef PSTR
00127     #define PSTR(s) ({ static const char __c[] PROGMEM = (s); &__c[0]; })
00128     #endif
00129     #ifndef PFUNC
00130     #define PFUNC(x)      x ## _P
00131     #endif
00132
00133 #elif CPU_HARVARD
00134     #error Missing CPU support
00135 #endif
00136
00137
00138 #if !CPU_HARVARD
00139     #define pgm_read8(a)     (*(const uint8_t  *)(a))
00140     #define pgm_read16(a)    (*(const uint16_t *)(a))
00141     #define pgm_read32(a)    (*(const uint32_t *)(a))
00142 #endif
00143
00144 #define pgm_read_char(a)        pgm_read8(a)
00145 #define pgm_read_uint16_t(addr) pgm_read16(addr)
00146
00147
00148 #if SIZEOF_INT == 2
00149     #define pgm_read_int(addr) ((int)pgm_read16(addr))
00150 #elif SIZEOF_INT == 4
00151     #define pgm_read_int(addr) ((int)pgm_read32(addr))
00152 #else
00153     #error Missing support for CPU word size!
00154 #endif
00155
00156 #ifndef PSTR
00157 #define PSTR            /* nothing */
00158 #endif
00159
00160 #ifndef PFUNC
00161 #define PFUNC(x) x
00162 #endif
00163
00164 #ifndef PROGMEM
00165 #define PROGMEM         /* nothing */
00166 #endif
00167
00172 typedef PROGMEM char pgm_char;
00173 typedef PROGMEM int8_t pgm_int8_t;
00174 typedef PROGMEM uint8_t pgm_uint8_t;
00175 typedef PROGMEM int16_t pgm_int16_t;
00176 typedef PROGMEM uint16_t pgm_uint16_t;
00177 typedef PROGMEM int32_t pgm_int32_t;
00178 typedef PROGMEM uint32_t pgm_uint32_t;
00179 /*\}*/
00180
00212 #ifdef _PROGMEM
00213     #define PGM_READ8(a)     pgm_read8(a)
00214     #define PGM_READ16(a)    pgm_read16(a)
00215     #define PGM_READ32(a)    pgm_read32(a)
00216     #define PGM_FUNC(x)      PFUNC(x)
00217     #define PGM_STR(x)       PSTR(x)
00218     #define PGM_ATTR         PROGMEM
00219 #else
00220     #define PGM_READ8(a)     (*(const uint8_t  *)(a))
00221     #define PGM_READ16(a)    (*(const uint16_t *)(a))
00222     #define PGM_READ32(a)    (*(const uint32_t *)(a))
00223     #define PGM_FUNC(x)      x
00224     #define PGM_STR(x)       x
00225     #define PGM_ATTR         /* nothing */
00226 #endif
00227
00228 #define PGM_READ_CHAR(addr)      PGM_READ8(addr)
00229
00230 /* \} */
00231
00232
00233 #endif /* MWARE_PGM_H */


BeRTOS: crc.c File Reference

  • algo
Functions | Variables
crc.c File Reference

CRC table and support routines. More...

#include "crc.h"

Go to the source code of this file.

Functions

uint16_t crc16 (uint16_t crc, const void *buffer, size_t len)
This function implements the CRC 16 calculation on a buffer.

Variables

CRC_TABLE
crctab calculated by Mark G.

Detailed Description

CRC table and support routines.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file crc.c.

Function Documentation

uint16_t crc16 | ( | uint16_t | crc,
 |  | const void * | buf,
 |  | size_t | len
 | ) |  |

This function implements the CRC 16 calculation on a buffer.

Parameters:
crc | Current CRC16 value.
buf | The buffer to perform CRC calculation on.
len | The length of the Buffer.
Returns:
The updated CRC16 value.

Definition at line 94 of file crc.c.

Variable Documentation

CRC_TABLE

crctab calculated by Mark G.

Mendel, Network Systems Corporation

Definition at line 59 of file crc.c.


BeRTOS: crc.c Source File

  • algo
crc.c
Go to the documentation of this file.
00001
00039 #include "crc.h"
00040
00041 /*
00042  * The boot on AVR cpu is placed at the end of flash memory, but the avr
00043  * address memory by byte and the pointers are 16bits long, so we are able
00044  * to address 64Kbyte memory max. For this reason we can't read the crctab
00045  * from flash, because it is placed at the end of memory. This is true every
00046  * time we have an AVR cpu with more that 64Kbyte of flash. To fix this problem
00047  * we let the compiler copy the table in RAM at startup. Obviously this solution
00048  * is not efficent, but for now this is the only way.
00049  */
00050 #if CPU_HARVARD && !(defined(ARCH_BOOT) && (ARCH & ARCH_BOOT))
00051     #define CRC_TABLE const uint16_t PROGMEM crc16tab[256]
00052 #else
00053     #define CRC_TABLE const uint16_t crc16tab[256]
00054 #endif
00055
00059 CRC_TABLE = {
00060     0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
00061     0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
00062     0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
00063     0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
00064     0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
00065     0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
00066     0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
00067     0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
00068     0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
00069     0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
00070     0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
00071     0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
00072     0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
00073     0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
00074     0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
00075     0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
00076     0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
00077     0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
00078     0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
00079     0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
00080     0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
00081     0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
00082     0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
00083     0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
00084     0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
00085     0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
00086     0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
00087     0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
00088     0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
00089     0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
00090     0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
00091     0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
00092 };
00093
00094 uint16_t crc16(uint16_t crc, const void *buffer, size_t len)
00095 {
00096     const unsigned char *buf = (const unsigned char *)buffer;
00097     while(len--)
00098         crc = UPDCRC16(*buf++, crc);
00099
00100     return crc;
00101 }
00102


BeRTOS: crc.h File Reference

  • algo
Defines | Functions
crc.h File Reference

Cyclic Redundancy Check 16 (CRC). More...

#include "cfg/cfg_arch.h"
#include <cfg/compiler.h>
#include <cpu/pgm.h>

Go to the source code of this file.

Defines

#define | UPDCRC16(c, oldcrc) ((crc16tab[((oldcrc) >> 8) ^ ((unsigned char)(c))]) ^ ((oldcrc) << 8))
Compute the updated CRC16 value for one octet (macro version)
#define | CRC16_INIT_VAL ((uint16_t)0)
CRC-16 init value.

Functions

uint16_t | updcrc16 (uint8_t c, uint16_t oldcrc)
Compute the updated CRC16 value for one octet (inline version)
uint16_t | crc16 (uint16_t crc, const void *buf, size_t len)
This function implements the CRC 16 calculation on a buffer.

Detailed Description

Cyclic Redundancy Check 16 (CRC).

This algorithm is the one used by the XMODEM protocol.

Note:
This algorithm is incompatible with the CCITT-CRC16.

This code is based on the article Copyright 1986 Stephen Satchell.

Programmers may incorporate any or all code into their programs, giving proper credit within the source. Publication of the source routines is permitted so long as proper credit is given to Stephen Satchell, Satchell Evaluations and Chuck Forsberg, Omen Technology.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file crc.h.

Define Documentation

#define UPDCRC16 | ( | c,
 |  | oldcrc
 | ) | ((crc16tab[((oldcrc) >> 8) ^ ((unsigned char)(c))]) ^ ((oldcrc) << 8))

Compute the updated CRC16 value for one octet (macro version)

Note:
This version is only intended for old/broken compilers. Use the inline function in new code.
Parameters:
c | New octet (range 0-255)
oldcrc | Previous CRC16 value (referenced twice, beware of side effects)

Definition at line 77 of file crc.h.

Function Documentation

uint16_t crc16 | ( | uint16_t | crc,
 |  | const void * | buf,
 |  | size_t | len
 | ) |  |

This function implements the CRC 16 calculation on a buffer.

Parameters:
crc | Current CRC16 value.
buf | The buffer to perform CRC calculation on.
len | The length of the Buffer.
Returns:
The updated CRC16 value.

Definition at line 94 of file crc.c.


BeRTOS: crc.h Source File

  • algo
crc.h
Go to the documentation of this file.
00001
00051 #ifndef ALGO_CRC_H
00052 #define ALGO_CRC_H
00053
00054 #include "cfg/cfg_arch.h"
00055
00056 #include <cfg/compiler.h>
00057 #include <cpu/pgm.h>
00058
00059 EXTERN_C_BEGIN
00060
00061 /* CRC table */
00062 extern const uint16_t crc16tab[256];
00063
00064
00074 #if CPU_HARVARD && !(defined(ARCH_BOOT) && (ARCH & ARCH_BOOT))
00075     #define UPDCRC16(c, oldcrc) (pgm_read_uint16_t(&crc16tab[((oldcrc) >> 8) ^ ((unsigned char)(c))]) ^ ((oldcrc) << 8))
00076 #else
00077     #define UPDCRC16(c, oldcrc) ((crc16tab[((oldcrc) >> 8) ^ ((unsigned char)(c))]) ^ ((oldcrc) << 8))
00078 #endif
00079
00081 #define CRC16_INIT_VAL ((uint16_t)0)
00082
00083 #ifdef INLINE
00084
00087 INLINE uint16_t updcrc16(uint8_t c, uint16_t oldcrc)
00088 {
00089 #if CPU_HARVARD && !(defined(ARCH_BOOT) && (ARCH & ARCH_BOOT))
00090     return pgm_read_uint16_t(&crc16tab[(oldcrc >> 8) ^ c]) ^ (oldcrc << 8);
00091 #else
00092     return crc16tab[(oldcrc >> 8) ^ c] ^ (oldcrc << 8);
00093 #endif
00094 }
00095 #endif // INLINE
00096
00097
00107 extern uint16_t crc16(uint16_t crc, const void *buf, size_t len);
00108
00109 int crc_testSetup(void);
00110 int crc_testRun(void);
00111 int crc_testTearDown(void);
00112
00113 EXTERN_C_END
00114
00115 #endif /* ALGO_CRC_H */


BeRTOS: crc_ccitt.c File Reference

  • algo
Functions
crc_ccitt.c File Reference

CRC-CCITT table and support routines. More...

#include "crc_ccitt.h"

Go to the source code of this file.

Functions

uint16_t crc_ccitt (uint16_t crc, const void *buffer, size_t len)
This function implements the CRC-CCITT calculation on a buffer.

Detailed Description

CRC-CCITT table and support routines.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file crc_ccitt.c.

Function Documentation

uint16_t crc_ccitt | ( | uint16_t | crc,
 |  | const void * | buf,
 |  | size_t | len
 | ) |  |

This function implements the CRC-CCITT calculation on a buffer.

Parameters:
crc | Current CRC-CCITT value.
buf | The buffer to perform CRC calculation on.
len | The length of the Buffer.
Returns:
The updated CRC-CCITT value.

Definition at line 75 of file crc_ccitt.c.


BeRTOS: crc_ccitt.c Source File

  • algo
crc_ccitt.c
Go to the documentation of this file.
00001
00038 #include "crc_ccitt.h"
00039
00040 const uint16_t PROGMEM crc_ccitt_tab[256] = {
00041     0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
00042     0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
00043     0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
00044     0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
00045     0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
00046     0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
00047     0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
00048     0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
00049     0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
00050     0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
00051     0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
00052     0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
00053     0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
00054     0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
00055     0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
00056     0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
00057     0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
00058     0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
00059     0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
00060     0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
00061     0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
00062     0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
00063     0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
00064     0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
00065     0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
00066     0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
00067     0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
00068     0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
00069     0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
00070     0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
00071     0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
00072     0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78,
00073 };
00074
00075 uint16_t crc_ccitt(uint16_t crc, const void *buffer, size_t len)
00076 {
00077     const unsigned char *buf = (const unsigned char *)buffer;
00078     while (len--)
00079         crc = updcrc_ccitt(*buf++, crc);
00080
00081     return crc;
00082 }
00083


BeRTOS: crc_ccitt.h File Reference

  • algo
Defines | Functions
crc_ccitt.h File Reference

CCITT Cyclic Redundancy Check (CRC-CCITT). More...

#include <cfg/compiler.h>
#include <cpu/pgm.h>

Go to the source code of this file.

Defines

#define | CRC_CCITT_INIT_VAL ((uint16_t)0xFFFF)
CRC-CCITT init value.

Functions

uint16_t | updcrc_ccitt (uint8_t c, uint16_t oldcrc)
Compute the updated CRC-CCITT value for one octet (inline version)
uint16_t | crc_ccitt (uint16_t crc, const void *buf, size_t len)
This function implements the CRC-CCITT calculation on a buffer.

Detailed Description

CCITT Cyclic Redundancy Check (CRC-CCITT).

Note:
This algorithm is incompatible with the CRC16.
Author:
Francesco Sacchi <batt@develer.com>

Definition in file crc_ccitt.h.

Function Documentation

uint16_t crc_ccitt | ( | uint16_t | crc,
 |  | const void * | buf,
 |  | size_t | len
 | ) |  |

This function implements the CRC-CCITT calculation on a buffer.

Parameters:
crc | Current CRC-CCITT value.
buf | The buffer to perform CRC calculation on.
len | The length of the Buffer.
Returns:
The updated CRC-CCITT value.

Definition at line 75 of file crc_ccitt.c.


BeRTOS: crc_ccitt.h Source File

  • algo
crc_ccitt.h
Go to the documentation of this file.
00001
00042 #ifndef ALGO_CRC_CCITT_H
00043 #define ALGO_CRC_CCITT_H
00044
00045 #include <cfg/compiler.h>
00046 #include <cpu/pgm.h>
00047
00048 EXTERN_C_BEGIN
00049
00050 /* CRC table */
00051 extern const uint16_t crc_ccitt_tab[256];
00052
00056 INLINE uint16_t updcrc_ccitt(uint8_t c, uint16_t oldcrc)
00057 {
00058     return (oldcrc >> 8) ^ pgm_read16(&crc_ccitt_tab[(oldcrc ^ c) & 0xff]);
00059 }
00060
00062 #define CRC_CCITT_INIT_VAL ((uint16_t)0xFFFF)
00063
00064
00074 extern uint16_t crc_ccitt(uint16_t crc, const void *buf, size_t len);
00075
00076 EXTERN_C_END
00077
00078 #endif /* ALGO_CRC_CCITT_H */


BeRTOS: dac.h File Reference

  • drv
dac.h File Reference
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cpu/attr.h>
#include <PP_STRINGIZE(drv/PP_CAT3(dac, _, CPU_ID).h)>

Go to the source code of this file.

Detailed Description

Definition in file dac.h.


BeRTOS: dac.h Source File

  • drv
dac.h
Go to the documentation of this file.
00001
00048 #ifndef DRV_DAC_H
00049 #define DRV_DAC_H
00050
00051 #include <cfg/compiler.h>
00052 #include <cfg/debug.h>
00053 #include <cfg/macros.h>
00054
00055 #include <cpu/attr.h>
00056
00057 #include CPU_HEADER(dac)
00058
00059 struct DacContext;
00060 struct Dac;
00061
00062 typedef int (*DacWriteFunc_t) (struct Dac *dac, unsigned channel, uint16_t sample);
00063 typedef void (*SetChannelMaskFunc_t) (struct Dac *dac, uint32_t mask);
00064 typedef void (*SetSamplingRate_t) (struct Dac *dac, uint32_t rate);
00065 typedef void (*DmaConversionBufFunc_t) (struct Dac *dac, void *buf, size_t len);
00066 typedef bool (*DmaConversionIsFinished_t) (struct Dac *dac);
00067 typedef void (*DmaStartStreamingFunc_t) (struct Dac *dac, void *buf, size_t len, size_t slice_len);
00068 typedef void (*DmaStopFunc_t) (struct Dac *dac);
00069 typedef void (*DmaCallbackFunc_t) (struct Dac *dac);
00070
00071 typedef struct DacContext
00072 {
00073     DacWriteFunc_t write;
00074     SetChannelMaskFunc_t setCh;
00075     SetSamplingRate_t setSampleRate;
00076     DmaConversionBufFunc_t conversion;
00077     DmaConversionIsFinished_t isFinished;
00078     DmaStartStreamingFunc_t start;
00079     DmaStopFunc_t stop;
00080     DmaCallbackFunc_t *callback;
00081     size_t slice_len;
00082
00083     DB(id_t _type);
00084
00085 } DacContext;
00086
00087 typedef struct Dac
00088 {
00089     DacContext ctx;
00090     struct DacHardware *hw;
00091 } Dac;
00092
00093 INLINE int dac_write(Dac *dac, unsigned channel, uint16_t sample)
00094 {
00095     ASSERT(dac->ctx.write);
00096     return dac->ctx.write(dac, channel, sample);
00097 }
00098
00099 INLINE void dac_setChannelMask(struct Dac *dac, uint32_t mask)
00100 {
00101     ASSERT(dac->ctx.setCh);
00102     dac->ctx.setCh(dac, mask);
00103 }
00104
00105 INLINE void dac_setSamplingRate(Dac *dac, uint32_t rate)
00106 {
00107     ASSERT(dac->ctx.setSampleRate);
00108     dac->ctx.setSampleRate(dac, rate);
00109 }
00110
00111 /*
00112  * Convert \param len samples stored into \param buf.
00113  */
00114 INLINE void dac_dmaConversionBuffer(Dac *dac, void *buf, size_t len)
00115 {
00116     ASSERT(dac->ctx.conversion);
00117     dac->ctx.conversion(dac, buf, len);
00118 }
00119
00120 /*
00121  * Check if a dma transfer is finished.
00122  *
00123  * Useful for kernel-less applications.
00124  */
00125 INLINE bool dac_dmaIsFinished(Dac *dac)
00126 {
00127     ASSERT(dac->ctx.isFinished);
00128     return dac->ctx.isFinished(dac);
00129 }
00130
00131 /*
00132  * \param slicelen Must be a divisor of len, ie. len % slicelen == 0.
00133  */
00134 INLINE void dac_dmaStartStreaming(Dac *dac, void *buf, size_t len, size_t slice_len, DmaCallbackFunc_t *callback)
00135 {
00136     ASSERT(dac->ctx.start);
00137     ASSERT(len % slice_len == 0);
00138     ASSERT(callback);
00139
00140     dac->ctx.callback = callback;
00141     dac->ctx.slice_len = slice_len;
00142     dac->ctx.start(dac, buf, len, slice_len);
00143 }
00144
00145 INLINE void dac_dmaStop(Dac *dac)
00146 {
00147     ASSERT(dac->ctx.stop);
00148     dac->ctx.stop(dac);
00149 }
00150
00151 #define dac_bits() DAC_BITS
00152
00153 void dac_init(Dac *dac);
00154  //defgroup dac
00156 #endif /* DRV_DAC_H */


BeRTOS: dac_cm3.h File Reference

  • cpu
  • cortex-m3
  • drv
dac_cm3.h File Reference

Low-level DAC module for Cortex-m3. More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level DAC module for Cortex-m3.

Author:
Daniele Basile <asterix@develer.com>

Definition in file dac_cm3.h.


BeRTOS: dac_cm3.h Source File

  • cpu
  • cortex-m3
  • drv
dac_cm3.h
Go to the documentation of this file.
00001
00039 #include <cpu/detect.h>
00040
00041 #if CPU_CM3_SAM3X
00042     #include "adc_sam3.h"
00043 /*#elif  Add other ARM families here */
00044 #else
00045     #error Unknown CPU
00046 #endif


BeRTOS: dac_sam3.c File Reference

  • cpu
  • cortex-m3
  • drv
dac_sam3.c File Reference

DAC hardware-specific implementation. More...

#include "dac_sam3.h"
#include "cfg/cfg_dac.h"
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <cfg/log.h>
#include <drv/dac.h>
#include <drv/irq_cm3.h>
#include <cpu/types.h>
#include <io/cm3.h>
#include <string.h>

Go to the source code of this file.

Detailed Description

DAC hardware-specific implementation.

Author:
Daniele Basile <asterix@develer.com>

Definition in file dac_sam3.c.


BeRTOS: dac_sam3.c Source File

  • cpu
  • cortex-m3
  • drv
dac_sam3.c
Go to the documentation of this file.
00001
00038 #include "dac_sam3.h"
00039
00040 #include "cfg/cfg_dac.h"
00041
00042 #include <cfg/macros.h>
00043 #include <cfg/compiler.h>
00044
00045 // Define log settings for cfg/log.h.
00046 #define LOG_LEVEL         DAC_LOG_LEVEL
00047 #define LOG_FORMAT        DAC_LOG_FORMAT
00048 #include <cfg/log.h>
00049
00050 #include <drv/dac.h>
00051 #include <drv/irq_cm3.h>
00052
00053 #include <cpu/types.h>
00054
00055 #include <io/cm3.h>
00056
00057 #include <string.h>
00058
00059 struct DacHardware
00060 {
00061     uint16_t channels;
00062     uint32_t rate;
00063     bool end;
00064 };
00065
00066 struct DacHardware dac_hw;
00067
00068 #if CONFIG_DAC_TIMER == DACC_TRGSEL_TIO_CH0 /* Select Timer counter TIO Channel 0 */
00069     #define DAC_TC_ID         TC0_ID
00070     #define DAC_TC_CCR        TC0_CCR0
00071     #define DAC_TC_IDR        TC0_IDR0
00072     #define DAC_TC_CMR        TC0_CMR0
00073     #define DAC_TC_SR         TC0_SR0
00074     #define DAC_TC_RA         TC0_RA0
00075     #define DAC_TC_RC         TC0_RC0
00076 #elif CONFIG_DAC_TIMER == DACC_TRGSEL_TIO_CH1 /* Select Timer counter TIO Channel 1 */
00077     #define DAC_TC_ID         TC1_ID
00078     #define DAC_TC_CCR        TC0_CCR1
00079     #define DAC_TC_IDR        TC0_IDR1
00080     #define DAC_TC_CMR        TC0_CMR1
00081     #define DAC_TC_SR         TC0_SR1
00082     #define DAC_TC_RA         TC0_RA1
00083     #define DAC_TC_RC         TC0_RC1
00084 #elif CONFIG_DAC_TIMER == DACC_TRGSEL_TIO_CH2 /* Select Timer counter TIO Channel 2 */
00085     #define DAC_TC_ID         TC2_ID
00086     #define DAC_TC_CCR        TC0_CCR2
00087     #define DAC_TC_IDR        TC0_IDR2
00088     #define DAC_TC_CMR        TC0_CMR2
00089     #define DAC_TC_SR         TC0_SR2
00090     #define DAC_TC_RA         TC0_RA2
00091     #define DAC_TC_RC         TC0_RC2
00092 #elif CONFIG_DAC_TIMER == DACC_TRGSEL_PWM0 || CONFIG_DAC_TIMER == DACC_TRGSEL_PWM1
00093     #error unimplemented pwm triger select.
00094 #endif
00095
00096 INLINE void tc_setup(uint32_t freq, size_t n_sample)
00097 {
00098     pmc_periphEnable(DAC_TC_ID);
00099
00100     /*  Disable TC clock */
00101     DAC_TC_CCR = TC_CCR_CLKDIS;
00102     /*  Disable interrupts */
00103     DAC_TC_IDR = 0xFFFFFFFF;
00104     /*  Clear status register */
00105     volatile uint32_t dummy = DAC_TC_SR;
00106     (void)dummy;
00107
00108     /*
00109      * Setup the timer counter:
00110      * - select clock TCLK1 (MCK/2)
00111      * - enable wave form mode
00112      * - RA compare effect SET
00113      * - RC compare effect CLEAR
00114      * - UP mode with automatic trigger on RC Compare
00115      */
00116     DAC_TC_CMR = TC_TIMER_CLOCK1 | BV(TC_CMR_WAVE) | TC_CMR_ACPA_SET | TC_CMR_ACPC_CLEAR | BV(TC_CMR_CPCTRG);
00117
00118     /*
00119      * Compute the sample frequency
00120      * the RC counter will update every MCK/2 (see above)
00121      * so to convert one sample at the user freq we generate
00122      * the trigger every TC_CLK / (numer_of_sample * user_freq)
00123      * where TC_CLK = MCK / 2.
00124      */
00125     uint32_t rc = DIV_ROUND((CPU_FREQ / 2), n_sample * freq);
00126     DAC_TC_RC = rc;
00127     /* generate the square wave with duty = 50% */
00128     DAC_TC_RA = DIV_ROUND(50 * rc, 100);
00129
00130     PIOB_PDR = BV(25);
00131     PIO_PERIPH_SEL(PIOB_BASE, BV(25), PIO_PERIPH_B);
00132 }
00133
00134 INLINE void tc_start(void)
00135 {
00136     DAC_TC_CCR =  BV(TC_CCR_CLKEN)| BV(TC_CCR_SWTRG);
00137 }
00138
00139 INLINE void tc_stop(void)
00140 {
00141     DAC_TC_CCR =  BV(TC_CCR_CLKDIS);
00142 }
00143
00144 static int sam3x_dac_write(struct Dac *dac, unsigned channel, uint16_t sample)
00145 {
00146     (void)dac;
00147
00148     ASSERT(channel <= DAC_MAXCH);
00149
00150     DACC_MR |= (channel << DACC_USER_SEL_SHIFT) & DACC_USER_SEL_MASK;
00151     DACC_CHER |= BV(channel);
00152
00153     DACC_CDR = sample ;
00154
00155     return 0;
00156 }
00157
00158 static void sam3x_dac_setCh(struct Dac *dac, uint32_t mask)
00159 {
00160     /* we have only the ch0 and ch1 */
00161     ASSERT(mask < BV(3));
00162     dac->hw->channels = mask;
00163 }
00164
00165 static void sam3x_dac_setSampleRate(struct Dac *dac, uint32_t rate)
00166 {
00167     (void)dac;
00168
00169     /* Eneble hw trigger */
00170     DACC_MR |= BV(DACC_TRGEN) | (CONFIG_DAC_TIMER << DACC_TRGSEL_SHIFT);
00171     dac->hw->rate = rate;
00172 }
00173
00174 static void sam3x_dac_conversion(struct Dac *dac, void *buf, size_t len)
00175 {
00176     if (dac->hw->channels & BV(DACC_CH0))
00177         DACC_MR |= (DACC_CH0 << DACC_USER_SEL_SHIFT) & DACC_USER_SEL_MASK;
00178
00179     if (dac->hw->channels & BV(DACC_CH1))
00180         DACC_MR |= (DACC_CH1 << DACC_USER_SEL_SHIFT) & DACC_USER_SEL_MASK;
00181
00182     DACC_CHER |= dac->hw->channels;
00183
00184     /* setup timer and start it */
00185     tc_setup(dac->hw->rate, len);
00186     tc_start();
00187
00188     /* Setup dma and start it */
00189     DACC_TPR = (uint32_t)buf ;
00190     DACC_TCR = len;
00191     DACC_PTCR |= BV(DACC_PTCR_TXTEN);
00192 }
00193
00194 static bool sam3x_dac_isFinished(struct Dac *dac)
00195 {
00196     (void)dac;
00197     return 0;
00198 }
00199
00200 static void sam3x_dac_start(struct Dac *dac, void *buf, size_t len, size_t slice_len)
00201 {
00202     (void)dac;
00203     (void)buf;
00204     (void)len;
00205     (void)slice_len;
00206 }
00207
00208 static void sam3x_dac_stop(struct Dac *dac)
00209 {
00210     (void)dac;
00211 }
00212
00213
00214 void dac_init(struct Dac *dac)
00215 {
00216
00217     /* Fill the virtual table */
00218     dac->ctx.write = sam3x_dac_write;
00219     dac->ctx.setCh = sam3x_dac_setCh;
00220     dac->ctx.setSampleRate = sam3x_dac_setSampleRate;
00221     dac->ctx.conversion = sam3x_dac_conversion;
00222     dac->ctx.isFinished = sam3x_dac_isFinished;
00223     dac->ctx.start = sam3x_dac_start;
00224     dac->ctx.stop = sam3x_dac_stop;
00225     dac->ctx._type = DAC_SAM3X;
00226     dac->hw = &dac_hw;
00227
00228     /* Clock DAC peripheral */
00229     pmc_periphEnable(DACC_ID);
00230
00231     /* Reset hw */
00232     DACC_CR |= BV(DACC_SWRST);
00233     DACC_MR = 0;
00234
00235     /* Configure the dac */
00236     DACC_MR |= (CONFIG_DAC_REFRESH << DACC_REFRESH_SHIFT) & DACC_REFRESH_MASK;
00237     DACC_MR |= (CONFIG_DAC_STARTUP << DACC_STARTUP_SHIFT) & DACC_STARTUP_MASK;
00238 }


BeRTOS: dac_sam3.h File Reference

  • cpu
  • cortex-m3
  • drv
Defines
dac_sam3.h File Reference

DAC hardware-specific definition. More...

#include <drv/dac.h>

Go to the source code of this file.

Defines

#define DAC_MAXCH 2
DAC config define.

Detailed Description

DAC hardware-specific definition.

Author:
Daniele Basile <asterix@develer.com>

Definition in file dac_sam3.h.


BeRTOS: dac_sam3.h Source File

  • cpu
  • cortex-m3
  • drv
dac_sam3.h
Go to the documentation of this file.
00001
00038 #ifndef DRV_DAC_SAM3_H
00039 #define DRV_DAC_SAM3_H
00040
00041 #include <drv/dac.h>
00042
00046 #define DAC_MAXCH              2 //Max number of channel for ADC.
00047 #define DAC_BITS              12 //Bit resolution for ADC converter.
00048
00049 #define DAC_SAM3X MAKE_ID('S', 'D', '3', 'X')
00050
00051 #endif /* DRV_DAC_SAM3_H */


BeRTOS: dataflash.c File Reference

  • drv
Functions | Variables
dataflash.c File Reference

Function library for dataflash AT45DB family (implementation). More...

#include "dataflash.h"
#include "cfg/cfg_dataflash.h"
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <cfg/module.h>
#include <cfg/log.h>
#include <drv/timer.h>
#include <fs/battfs.h>
#include <io/kfile.h>
#include <cpu/power.h>
#include <string.h>

Go to the source code of this file.

Functions

void | CS_TOGGLE (DataFlash *fd)
Macro that toggle CS of dataflash.
static void | send_cmd (DataFlash *fd, dataflash_page_t page_addr, dataflash_offset_t byte_addr, DataFlashOpcode opcode)
Send a generic command to dataflash memory.
static void | dataflash_reset (DataFlash *fd)
Reset dataflash memory function.
static uint8_t | dataflash_stat (DataFlash *fd)
Read status register of dataflah memory.
static uint8_t | dataflash_cmd (DataFlash *fd, dataflash_page_t page_addr, dataflash_offset_t byte_addr, DataFlashOpcode opcode)
Send one command to data flash memory, and return status register value.
static void | dataflash_readBlock (DataFlash *fd, dataflash_page_t page_addr, dataflash_offset_t byte_addr, uint8_t *block, dataflash_size_t len)
Read len bytes from main data flash memory or buffer data flash memory, and put it in *block.
static void | dataflash_writeBlock (DataFlash *fd, dataflash_offset_t offset, const uint8_t *block, dataflash_size_t len)
Write len bytes in dataflash memory buffer.
static void | dataflash_loadPage (DataFlash *fd, dataflash_page_t page_addr)
Load selected page from dataflash memory to buffer.
static int | dataflash_flush (KFile *_fd)
Flush select page (stored in buffer) in data flash main memory page.
static int | dataflash_close (struct KFile *_fd)
Close file fd.
static KFile * | dataflash_reopen (KFile *_fd)
Reopen dataflash file fd.
static size_t | dataflash_read (struct KFile *_fd, void *buf, size_t size)
Read in buf size bytes from dataflash memmory.
static size_t | dataflash_write (struct KFile *_fd, const void *_buf, size_t size)
Write _buf in dataflash memory.
bool | dataflash_init (DataFlash *fd, KFile *ch, DataflashType dev, dataflash_setCS_t *setCS, dataflash_setReset_t *setReset)
Dataflash init function.

Variables

static const DataflashInfo | mem_info []
Array used to describe dataflash memory devices currently supported.

Detailed Description

Function library for dataflash AT45DB family (implementation).

Author:
Daniele Basile <asterix@develer.com>
Francesco Sacchi <batt@develer.com>

Definition in file dataflash.c.

Function Documentation

void CS_TOGGLE ( DataFlash * fd ) [inline]

Macro that toggle CS of dataflash.

Note:
This is equivalent to fd->setCS(false) immediately followed by fd->setCS(true).

Definition at line 106 of file dataflash.c.

bool dataflash_init | ( | DataFlash * | fd,
 |  | KFile * | ch,
 |  | DataflashType | dev,
 |  | dataflash_setCS_t * | setCS,
 |  | dataflash_setReset_t * | setReset
 | ) |  |

Dataflash init function.

This function initialize fd with SPI channel ch and test if data flash memory density is the same specified by device dev. setCS is a callback used to set/reset CS line. setReset is a callback used to set/reset the dataflash (can be NULL if reset is unconnected)

Returns:
true if ok, false if memory density read from dataflash is not compliant with the configured one.

Definition at line 545 of file dataflash.c.

static size_t dataflash_read | ( | struct KFile * | _fd,
 |  | void * | buf,
 |  | size_t | size
 | ) |  | [static]

Read in buf size bytes from dataflash memmory.

Note:
For reading data flash memory, we check flag page_dirty, if is true (that mean we have written a byte in buffer memory) we flush current page in main memory and then read from memory, else we read byte directly from data flash main memory.
Returns:
the number of bytes read.

Definition at line 429 of file dataflash.c.

static void dataflash_reset ( DataFlash * fd ) [static]

Reset dataflash memory function.

If fd->setReset function is not NULL, this function resets data flash memory with one pulse reset long about 10usec.

Definition at line 166 of file dataflash.c.

static size_t dataflash_write | ( | struct KFile * | _fd,
 |  | const void * | _buf,
 |  | size_t | size
 | ) |  | [static]

Write _buf in dataflash memory.

Note:
For writing _buf in dataflash memory, we must first write in buffer data flash memory. At the end of write, we can put page in dataflash main memory. If we write in two contiguous pages, we put in main memory current page and then reload the page which we want to write.
Returns:
the number of bytes write.

Definition at line 479 of file dataflash.c.

static void dataflash_writeBlock | ( | DataFlash * | fd,
 |  | dataflash_offset_t | offset,
 |  | const uint8_t * | block,
 |  | dataflash_size_t | len
 | ) |  | [static]

Write len bytes in dataflash memory buffer.

Note:
Is not possible to write directly in dataflash main memory. To perform a write in main memory you must first write in dataflash buffer memory and then send a command to write the page in main memory.

Definition at line 258 of file dataflash.c.

static void send_cmd | ( | DataFlash * | fd,
 |  | dataflash_page_t | page_addr,
 |  | dataflash_offset_t | byte_addr,
 |  | DataFlashOpcode | opcode
 | ) |  | [static]

Send a generic command to dataflash memory.

This function send only 4 byte: opcode, page address and byte address.

Definition at line 117 of file dataflash.c.


BeRTOS: dataflash.c Source File

  • drv
dataflash.c
Go to the documentation of this file.
00001
00038 #include "dataflash.h"
00039
00040 #include "cfg/cfg_dataflash.h"
00041 #include <cfg/macros.h>
00042 #include <cfg/debug.h>
00043 #include <cfg/module.h>
00044
00045 // Define logging setting (for cfg/log.h module).
00046 #define LOG_LEVEL   DATAFLASH_LOG_LEVEL
00047 #define LOG_FORMAT  DATAFLASH_LOG_FORMAT
00048 #include <cfg/log.h>
00049
00050 #include <drv/timer.h>
00051
00052 #include <fs/battfs.h>
00053
00054 #include <io/kfile.h>
00055
00056 #include <cpu/power.h> /* cpu_relax() */
00057
00058 #include <string.h>
00059
00063 static const DataflashInfo mem_info[] =
00064 {
00065     {
00066         /* AT45DB041B */
00067         .density_id = 0x07,
00068         .page_size = 264,
00069         .page_bits = 9,
00070         .page_cnt = 2048,
00071         .read_cmd = DFO_READ_FLASH_MEM_BYTE_B,
00072     },
00073     {
00074         /* AT45DB081D */
00075         .density_id = 0x09,
00076         .page_size = 264,
00077         .page_bits = 9,
00078         .page_cnt = 4096,
00079         .read_cmd = DFO_READ_FLASH_MEM_BYTE_D,
00080     },
00081     {
00082         /* AT45DB161D */
00083         .density_id = 0x0B,
00084         .page_size = 528,
00085         .page_bits = 10,
00086         .page_cnt = 4096,
00087         .read_cmd = DFO_READ_FLASH_MEM_BYTE_D,
00088     },
00089     {
00090         /* AT45DB642D */
00091         .density_id = 0x0F,
00092         .page_size = 1056,
00093         .page_bits = 11,
00094         .page_cnt = 8192,
00095         .read_cmd = DFO_READ_FLASH_MEM_BYTE_D,
00096     },
00097     /* Add other memories here */
00098 };
00099
00100 STATIC_ASSERT(countof(mem_info) == DFT_CNT);
00101
00106 INLINE void CS_TOGGLE(DataFlash *fd)
00107 {
00108     fd->setCS(false);
00109     fd->setCS(true);
00110 }
00111
00117 static void send_cmd(DataFlash *fd, dataflash_page_t page_addr, dataflash_offset_t byte_addr, DataFlashOpcode opcode)
00118 {
00119
00120     /*
00121      * Make sure to toggle CS signal in order,
00122      * and reset dataflash command decoder.
00123      */
00124     CS_TOGGLE(fd);
00125
00126
00127     /*
00128      * To send one command to data flash memory, we send 4 byte.
00129      * First byte is opcode command, second and third byte are
00130      * page address, in last byte we write a byte page address.
00131      * (see datasheet for more detail).
00132      *
00133      * \note Generally a default memory page size is more than 256 byte.
00134      *  In this case we need for addressing a byte in one page more than
00135      *  8 bit, so we put in fourth byte low part of address byte, and
00136      *  hight part of address byte in third byte togheter low par of page
00137      *  address.
00138      *
00139      */
00140
00141     /*
00142      * Send opcode.
00143      */
00144     kfile_putc(opcode, fd->channel);
00145
00146     /*
00147      *  Send page address.
00148      */
00149     kfile_putc((uint8_t)(page_addr >> (16 - mem_info[fd->dev].page_bits)), fd->channel);
00150     kfile_putc((uint8_t)((page_addr << (mem_info[fd->dev].page_bits - 8)) + (byte_addr >> 8)), fd->channel);
00151
00152     /*
00153      * Send byte page address.
00154      */
00155     kfile_putc((uint8_t)byte_addr, fd->channel);
00156 }
00157
00166 static void dataflash_reset(DataFlash *fd)
00167 {
00168     fd->setCS(false);
00169
00170     if (fd->setReset)
00171     {
00172         fd->setReset(true);
00173         timer_delayHp(us_to_hptime(RESET_PULSE_WIDTH));
00174         fd->setReset(false);
00175         timer_delayHp(us_to_hptime(RESET_PULSE_WIDTH));
00176     }
00177 }
00178
00179
00183 static uint8_t dataflash_stat(DataFlash *fd)
00184 {
00185     /*
00186      * Make sure to toggle CS signal
00187      * and reset dataflash command decoder.
00188      */
00189     CS_TOGGLE(fd);
00190     kfile_putc(DFO_READ_STATUS, fd->channel);
00191     return kfile_getc(fd->channel);
00192 }
00193
00194
00200 static uint8_t dataflash_cmd(DataFlash *fd, dataflash_page_t page_addr, dataflash_offset_t byte_addr, DataFlashOpcode opcode)
00201 {
00202     uint8_t stat;
00203
00204     send_cmd(fd, page_addr, byte_addr, opcode);
00205
00206     CS_TOGGLE(fd);
00207
00208     /*
00209      * We chech data flash memory state, and wait until busy-flag
00210      * is high.
00211      */
00212     while (!(dataflash_stat(fd) & BUSY_BIT))
00213         cpu_relax();
00214
00215     stat = dataflash_stat(fd);
00216
00217     kfile_flush(fd->channel); // Flush channel
00218     /*
00219      * Data flash has completed a bus cycle, so disable CS.
00220      */
00221     fd->setCS(false);
00222
00223     return stat;
00224 }
00225
00230 static void dataflash_readBlock(DataFlash *fd, dataflash_page_t page_addr, dataflash_offset_t byte_addr, uint8_t *block, dataflash_size_t len)
00231 {
00232     DataFlashOpcode opcode = mem_info[fd->dev].read_cmd;
00233     send_cmd(fd, page_addr, byte_addr, opcode);
00234
00235     if (opcode == DFO_READ_FLASH_MEM_BYTE_B)
00236     {
00237         /*
00238          * Send 24 don't care bits.
00239          */
00240         uint8_t dummy[] = { 0, 0, 0 };
00241         kfile_write(fd->channel, dummy, sizeof(dummy));
00242     }
00243
00244     kfile_putc(0, fd->channel); //Send 8 don't care bit.
00245     kfile_read(fd->channel, block, len); //Read len bytes ad put in block buffer.
00246     kfile_flush(fd->channel); // Flush channel
00247     fd->setCS(false);
00248 }
00249
00250
00258 static void dataflash_writeBlock(DataFlash *fd, dataflash_offset_t offset, const uint8_t *block, dataflash_size_t len)
00259 {
00260     ASSERT(offset + len <= mem_info[fd->dev].page_size);
00261
00262     send_cmd(fd, 0x00, offset, DFO_WRITE_BUFF1);
00263
00264     kfile_write(fd->channel, block, len); //Write len bytes.
00265     kfile_flush(fd->channel); // Flush channel
00266
00267     fd->setCS(false);
00268 }
00269
00270
00274 static void dataflash_loadPage(DataFlash *fd, dataflash_page_t page_addr)
00275 {
00276     dataflash_cmd(fd, page_addr, 0x00, DFO_MOV_MEM_TO_BUFF1);
00277 }
00278
00279 /* Battfs disk interface section */
00280 #if 0
00281 static size_t dataflash_disk_page_read(struct BattFsSuper *d, pgcnt_t page, pgaddr_t addr, void *buf, size_t len)
00282 {
00283     DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx);
00284     dataflash_readBlock(fd, page, addr, buf, len);
00285     return len;
00286 }
00287
00288 static bool dataflash_disk_page_load(struct BattFsSuper *d, pgcnt_t page)
00289 {
00290     DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx);
00291     dataflash_loadPage(fd, page);
00292     return true;
00293 }
00294
00295 static size_t dataflash_disk_buffer_write(struct BattFsSuper *d, pgaddr_t addr, const void *buf, size_t len)
00296 {
00297     DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx);
00298     dataflash_writeBlock(fd, addr, buf, len);
00299     return len;
00300 }
00301
00302 static size_t dataflash_disk_buffer_read(struct BattFsSuper *d, pgaddr_t addr, void *buf, size_t len)
00303 {
00304     DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx);
00305     ASSERT(addr + len <= mem_info[fd->dev].page_size);
00306
00307     CS_TOGGLE(fd);
00308
00309     kfile_putc(DFO_READ_BUFF1, fd->channel);
00310
00311     uint32_t byte_addr = addr;
00312
00313     kfile_putc((byte_addr >> 16) & 0xff, fd->channel);
00314     kfile_putc((byte_addr >> 8) & 0xff, fd->channel);
00315     kfile_putc(byte_addr & 0xff, fd->channel);
00316
00317     /* Send additional don't care byte to start read operation */
00318     kfile_putc(0, fd->channel);
00319
00320     kfile_read(fd->channel, buf, len); //Read len bytes ad put in buffer.
00321     kfile_flush(fd->channel); // Flush channel
00322     fd->setCS(false);
00323     return len;
00324 }
00325
00326 static bool dataflash_disk_page_save(struct BattFsSuper *d, pgcnt_t page)
00327 {
00328     DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx);
00329     dataflash_cmd(fd, page, 0x00, DFO_WRITE_BUFF1_TO_MEM);
00330     return true;
00331 }
00332
00333 static bool dataflash_disk_page_erase(struct BattFsSuper *d, pgcnt_t page)
00334 {
00335     DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx);
00336     dataflash_cmd(fd, page, 0x00, DFO_ERASE_PAGE);
00337     return true;
00338 }
00339
00340 static int dataflash_close(struct KFile *_fd);
00341
00342 static bool dataflash_disk_close(struct BattFsSuper *d)
00343 {
00344     DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx);
00345     return dataflash_close(&fd->fd) == 0;
00346 }
00347
00348 bool dataflash_diskInit(struct BattFsSuper *d, DataFlash *fd, pgcnt_t *page_array)
00349 {
00350     ASSERT(d);
00351     ASSERT(fd);
00352     d->read = dataflash_disk_page_read;
00353     d->load = dataflash_disk_page_load;
00354     d->bufferWrite = dataflash_disk_buffer_write;
00355     d->bufferRead = dataflash_disk_buffer_read;
00356     d->save = dataflash_disk_page_save;
00357     d->erase = dataflash_disk_page_erase;
00358     d->close = dataflash_disk_close;
00359     d->disk_ctx = fd;
00360     d->page_size = mem_info[fd->dev].page_size;
00361     d->page_count = mem_info[fd->dev].page_cnt;
00362     ASSERT(page_array);
00363     d->page_array = page_array;
00364     return d->page_array && fd;
00365 }
00366 #endif
00367
00368 /* Kfile interface section */
00369
00373 static int dataflash_flush(KFile *_fd)
00374 {
00375     DataFlash *fd = DATAFLASH_CAST(_fd);
00376     if (fd->page_dirty)
00377     {
00378         dataflash_cmd(fd, fd->current_page, 0x00, DFO_WRITE_BUFF1_TO_MEM_E);
00379
00380         fd->page_dirty = false;
00381
00382         LOG_INFO("Flushing page {%ld}\n", fd->current_page);
00383     }
00384     return 0;
00385 }
00386
00387
00391 static int dataflash_close(struct KFile *_fd)
00392 {
00393     dataflash_flush(_fd);
00394     LOG_INFO("Close.\n");
00395     return 0;
00396 }
00397
00401 static KFile *dataflash_reopen(KFile *_fd)
00402 {
00403     DataFlash *fd = DATAFLASH_CAST(_fd);
00404     dataflash_close(_fd);
00405
00406     fd->current_page = 0;
00407     fd->fd.seek_pos = 0;
00408
00409     /* Load selected page from dataflash memory */
00410     dataflash_loadPage(fd, fd->current_page);
00411
00412     LOG_INFO("Reopen.\n");
00413     return &fd->fd;
00414 }
00415
00416
00429 static size_t dataflash_read(struct KFile *_fd, void *buf, size_t size)
00430 {
00431     DataFlash *fd = DATAFLASH_CAST(_fd);
00432
00433     dataflash_offset_t byte_addr;
00434     dataflash_page_t page_addr;
00435     uint8_t *data = (uint8_t *)buf;
00436
00437
00438     ASSERT(fd->fd.seek_pos + (kfile_off_t)size <= fd->fd.size);
00439     size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos);
00440
00441     LOG_INFO("Reading at pos[%lu]\n", fd->fd.seek_pos);
00442
00443     /*
00444      * We select page and offest from absolute address.
00445      */
00446     page_addr = fd->fd.seek_pos / mem_info[fd->dev].page_size;
00447     byte_addr = fd->fd.seek_pos % mem_info[fd->dev].page_size;
00448
00449     LOG_INFO("[page-{%ld}, byte-{%ld}]\n", page_addr, byte_addr);
00450
00451     /*
00452      * Flush current page in main memory if
00453      * we had been written a byte in memory
00454      */
00455     dataflash_flush(&fd->fd);
00456
00457     /*
00458      * Read byte in main page data flash memory.
00459      */
00460     dataflash_readBlock(fd, page_addr, byte_addr, data, size);
00461
00462     fd->fd.seek_pos += size;
00463     LOG_INFO("Read %ld bytes\n", (long int)size);
00464
00465     return size;
00466 }
00467
00479 static size_t dataflash_write(struct KFile *_fd, const void *_buf, size_t size)
00480 {
00481     DataFlash *fd = DATAFLASH_CAST(_fd);
00482
00483     dataflash_offset_t offset;
00484     dataflash_page_t new_page;
00485     size_t total_write = 0;
00486
00487     const uint8_t *data = (const uint8_t *) _buf;
00488
00489     ASSERT(fd->fd.seek_pos + (kfile_off_t)size <= fd->fd.size);
00490     size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos);
00491
00492     LOG_INFO("Writing at pos[%lu]\n", fd->fd.seek_pos);
00493
00494     while (size)
00495     {
00496         /*
00497         * We select page and offest from absolute address.
00498         */
00499         new_page = fd->fd.seek_pos / mem_info[fd->dev].page_size;
00500         offset = fd->fd.seek_pos % mem_info[fd->dev].page_size;
00501
00502
00503         size_t wr_len = MIN((dataflash_size_t)size, mem_info[fd->dev].page_size - offset);
00504
00505         LOG_INFO("[page-{%ld}, byte-{%ld}]\n",new_page, offset);
00506
00507         if (new_page != fd->current_page)
00508         {
00509             /* Flush current page in main memory*/
00510             dataflash_flush(&fd->fd);
00511             /* Load select page memory from data flash memory*/
00512             dataflash_loadPage(fd, new_page);
00513
00514             fd->current_page = new_page;
00515             LOG_INFO(" >> Load page: {%ld}\n", new_page);
00516         }
00517         /*
00518         * Write byte in current page, and set true
00519         * page_dirty flag.
00520         */
00521         dataflash_writeBlock(fd, offset, data, wr_len);
00522         fd->page_dirty = true;
00523
00524         data += wr_len;
00525         fd->fd.seek_pos += wr_len;
00526         size -= wr_len;
00527         total_write += wr_len;
00528     }
00529
00530     LOG_INFO("written %lu bytes\n", (long unsigned)total_write);
00531     return total_write;
00532 }
00533
00534 MOD_DEFINE(dataflash);
00535
00545 bool dataflash_init(DataFlash *fd, KFile *ch, DataflashType dev, dataflash_setCS_t *setCS, dataflash_setReset_t *setReset)
00546 {
00547     uint8_t stat;
00548
00549     MOD_CHECK(hw_dataflash);
00550
00551     ASSERT(fd);
00552     ASSERT(ch);
00553     ASSERT(setCS);
00554     ASSERT(dev < DFT_CNT);
00555
00556     memset(fd, 0, sizeof(*fd));
00557     DB(fd->fd._type = KFT_DATAFLASH);
00558     fd->dev = dev;
00559     fd->channel = ch;
00560     fd->setReset = setReset;
00561     fd->setCS = setCS;
00562
00563     // Setup data flash programming functions.
00564     fd->fd.reopen = dataflash_reopen;
00565     fd->fd.close = dataflash_close;
00566     fd->fd.read = dataflash_read;
00567     fd->fd.write = dataflash_write;
00568     fd->fd.seek = kfile_genericSeek;
00569     fd->fd.flush = dataflash_flush;
00570
00571     dataflash_reset(fd);
00572     stat = dataflash_stat(fd);
00573
00574     /*
00575      * 2,3,4,5 bits of 1 byte status register
00576      * indicate a device density of dataflash memory
00577      * (see datasheet for more detail.)
00578      */
00579     if (GET_ID_DESITY_DEVICE(stat) != mem_info[fd->dev].density_id)
00580         return false;
00581
00582     fd->current_page = 0;
00583     fd->fd.seek_pos = 0;
00584     fd->fd.size = mem_info[fd->dev].page_size * mem_info[fd->dev].page_cnt;
00585
00586     /* Load selected page from dataflash memory */
00587     dataflash_loadPage(fd, fd->current_page);
00588     MOD_INIT(dataflash);
00589     return true;
00590 }


BeRTOS: dataflash.h File Reference

  • drv
Data Structures | Defines | Enumerations | Functions
dataflash.h File Reference

Function library for dataflash AT45DB family. More...

#include <cfg/compiler.h>
#include <io/kfile.h>
#include <fs/battfs.h>

Go to the source code of this file.

Data Structures

struct | DataFlash
Dataflash KFile context structure. More...
struct | DataflashInfo
Structure used to describe a dataflash memory. More...

Defines

#define | KFT_DATAFLASH MAKE_ID('D', 'F', 'L', 'H')
ID for dataflash.
#define | RESET_PULSE_WIDTH 10
Width of reset pulse in usec.
#define | BUSY_BIT 0x80
Select a busy bit in status register.
#define | CMP_BIT 0x40
Select a compare bit in status register.
#define | GET_ID_DESITY_DEVICE(reg_stat) (((reg_stat) & 0x3C) >> 2)
Select bits 2-5 of status register.

Typedefs

typedef uint32_t | dataflash_page_t
Type definitions for dflash memory.
typedef uint32_t | dataflash_offset_t
Type definitions for dflash memory.
typedef uint32_t | dataflash_size_t
Type definitions for dflash memory.

Enumerations

enum | DataflashType
Memory definitions. More...
enum DataFlashOpcode {
DFO_READ_FLASH_MEM_BYTE_D = 0x0B, DFO_READ_FLASH_MEM_BYTE_B = 0xE8, DFO_READ_FLASH_MEM = 0xD2, DFO_READ_BUFF1 = 0xD4,
DFO_READ_BUFF2 = 0xD6, DFO_WRITE_BUFF1 = 0x84, DFO_WRITE_BUFF2 = 0x87, DFO_WRITE_BUFF1_TO_MEM_E = 0x83,
DFO_WRITE_BUFF2_TO_MEM_E = 0x86, DFO_WRITE_BUFF1_TO_MEM = 0x88, DFO_WRITE_BUFF2_TO_MEM = 0x89, DFO_ERASE_PAGE = 0x81,
DFO_ERASE_BLOCK = 0x50, DFO_ERASE_SECTOR = 0x7C, DFO_WRITE_MEM_TR_BUFF1 = 0x82, DFO_WRITE_MEM_TR_BUFF2 = 0x85,
DFO_MOV_MEM_TO_BUFF1 = 0x53, DFO_MOV_MEM_TO_BUFF2 = 0x55, DFO_CMP_MEM_TO_BUFF1 = 0x60, DFO_CMP_MEM_TO_BUFF2 = 0x61,
DFO_ARW_MEM_TR_BUFF1 = 0x58, DFO_ARW_MEM_TR_BUFF2 = 0x59, DFO_PWR_DOWN = 0xB9, DFO_RESUME_PWR_DOWN = 0xAB,
DFO_READ_STATUS = 0xD7, DFO_ID_DEV = 0x9F
}
Data flash opcode commands. More...

Functions

DataFlash * | DATAFLASH_CAST (KFile *fd)
Convert + ASSERT from generic KFile to DataFlash.
bool | dataflash_init (DataFlash *fd, KFile *ch, DataflashType type, dataflash_setCS_t *setCS, dataflash_setReset_t *setReset)
Dataflash init function.
int | dataflash_testSetup (void)
To test data falsh drive you could use this functions.
int | dataflash_testRun (void)
Run dataflash test memory.
int | dataflash_testTearDown (void)
End a dataflash Test.

Detailed Description

Function library for dataflash AT45DB family.

Author:
Daniele Basile <asterix@develer.com>

Definition in file dataflash.h.

Define Documentation

#define GET_ID_DESITY_DEVICE ( reg_stat ) (((reg_stat) & 0x3C) >> 2)

Select bits 2-5 of status register.

These bits indicate device density (see datasheet for more details).

Definition at line 123 of file dataflash.h.

Enumeration Type Documentation

enum DataFlashOpcode

Data flash opcode commands.

Enumerator:
DFO_READ_FLASH_MEM_BYTE_D

Dataflash read commands.

Continuos array read for D type memories.

DFO_READ_FLASH_MEM_BYTE_B

Continuos array read for B type memories.

DFO_READ_FLASH_MEM

Main memory page read.

DFO_READ_BUFF1

SRAM buffer 1 read.

DFO_READ_BUFF2

SRAM buffer 2 read.

DFO_WRITE_BUFF1

Program and erase commands data flash.

SRAM buffer 1 write.

DFO_WRITE_BUFF2

SRAM buffer 2 write.

DFO_WRITE_BUFF1_TO_MEM_E

Buffer 1 to main memory page program with built-in erase.

DFO_WRITE_BUFF2_TO_MEM_E

Buffer 2 to main memory page program with built-in erase.

DFO_WRITE_BUFF1_TO_MEM

Buffer 1 to main memory page program without built-in erase.

DFO_WRITE_BUFF2_TO_MEM

Buffer 2 to main memory page program without built-in erase.

DFO_ERASE_PAGE

Erase page.

DFO_ERASE_BLOCK

Erase block.

DFO_ERASE_SECTOR

Erase sector.

DFO_WRITE_MEM_TR_BUFF1

Write main memory page through buffer 1.

DFO_WRITE_MEM_TR_BUFF2

Write main memory page through buffer 2.

DFO_MOV_MEM_TO_BUFF1

Additional dataflash commands.

Transfer main mmemory to buffer 1.

DFO_MOV_MEM_TO_BUFF2

Transfer main mmemory to buffer 2.

DFO_CMP_MEM_TO_BUFF1

Compare main mmemory with buffer 1.

DFO_CMP_MEM_TO_BUFF2

Compare main mmemory with buffer 2.

DFO_ARW_MEM_TR_BUFF1

Auto page rewrite through buffer 1.

DFO_ARW_MEM_TR_BUFF2

Auto page rewrite through buffer 2.

DFO_PWR_DOWN

Deep power-down.

DFO_RESUME_PWR_DOWN

Resume from deep power-down.

DFO_READ_STATUS

Read status register.

DFO_ID_DEV

Read manufacturer and device ID.

Definition at line 128 of file dataflash.h.

enum DataflashType

Memory definitions.

List of supported memory devices by this drive. Every time we call dataflash_init() we check device id to ensure we choose the right memory configuration. (see dataflash.c for more details).

Definition at line 76 of file dataflash.h.

Function Documentation

bool dataflash_init | ( | DataFlash * | fd,
 |  | KFile * | ch,
 |  | DataflashType | dev,
 |  | dataflash_setCS_t * | setCS,
 |  | dataflash_setReset_t * | setReset
 | ) |  |

Dataflash init function.

This function initialize fd with SPI channel ch and test if data flash memory density is the same specified by device dev. setCS is a callback used to set/reset CS line. setReset is a callback used to set/reset the dataflash (can be NULL if reset is unconnected)

Returns:
true if ok, false if memory density read from dataflash is not compliant with the configured one.

Definition at line 545 of file dataflash.c.

int dataflash_testRun ( void )

Run dataflash test memory.

Definition at line 170 of file dataflash_hwtest.c.

int dataflash_testSetup ( void )

To test data falsh drive you could use this functions.

To use these functions make sure to include in your make file the drv/datafalsh_test.c source.

(see drv/datafalsh_test.c for more detail)

Definition at line 110 of file dataflash_hwtest.c.

int dataflash_testTearDown ( void )

End a dataflash Test.

(Unused)

Definition at line 192 of file dataflash_hwtest.c.


BeRTOS: dataflash.h Source File

  • drv
dataflash.h
Go to the documentation of this file.
00001
00045 #ifndef DRV_DATAFLASH_H
00046 #define DRV_DATAFLASH_H
00047
00048 #include <cfg/compiler.h>
00049
00050 #include <io/kfile.h>
00051 #include <fs/battfs.h>
00052
00057 typedef uint32_t dataflash_page_t;
00058 typedef uint32_t dataflash_offset_t;
00059 typedef uint32_t dataflash_size_t;
00060 /*\}*/
00061
00065 typedef void (dataflash_setReset_t)(bool);
00066 typedef void (dataflash_setCS_t)(bool);
00067
00076 typedef enum DataflashType
00077 {
00078     DFT_AT45DB041B = 0,
00079     DFT_AT45DB081D,
00080     DFT_AT45DB161D,
00081     DFT_AT45DB642D,
00082     DFT_CNT
00083 } DataflashType;
00084
00085
00089 typedef struct DataFlash
00090 {
00091     KFile fd;
00092     KFile *channel;
00093     DataflashType dev;
00094     dataflash_page_t current_page;
00095     bool page_dirty;
00096     dataflash_setReset_t *setReset;
00097     dataflash_setCS_t *setCS;
00098 } DataFlash;
00099
00103 #define KFT_DATAFLASH MAKE_ID('D', 'F', 'L', 'H')
00104
00108 INLINE DataFlash * DATAFLASH_CAST(KFile *fd)
00109 {
00110     ASSERT(fd->_type == KFT_DATAFLASH);
00111     return (DataFlash *)fd;
00112 }
00113
00114 #define RESET_PULSE_WIDTH     10 ///< Width of reset pulse in usec.
00115 #define BUSY_BIT            0x80 ///< Select a busy bit in status register.
00116 #define CMP_BIT             0x40 ///< Select a compare bit in status register.
00117
00123 #define GET_ID_DESITY_DEVICE(reg_stat) (((reg_stat) & 0x3C) >> 2)
00124
00128 typedef enum DataFlashOpcode {
00133     DFO_READ_FLASH_MEM_BYTE_D  = 0x0B,
00134     DFO_READ_FLASH_MEM_BYTE_B  = 0xE8,
00135
00136     DFO_READ_FLASH_MEM       = 0xD2,
00137     DFO_READ_BUFF1           = 0xD4,
00138     DFO_READ_BUFF2           = 0xD6,
00139     /* \}*/
00140
00145     DFO_WRITE_BUFF1          =  0x84,
00146     DFO_WRITE_BUFF2          =  0x87,
00147     DFO_WRITE_BUFF1_TO_MEM_E =  0x83,
00148     DFO_WRITE_BUFF2_TO_MEM_E =  0x86,
00149     DFO_WRITE_BUFF1_TO_MEM   =  0x88,
00150     DFO_WRITE_BUFF2_TO_MEM   =  0x89,
00151     DFO_ERASE_PAGE           =  0x81,
00152     DFO_ERASE_BLOCK          =  0x50,
00153     DFO_ERASE_SECTOR         =  0x7C,
00154     DFO_WRITE_MEM_TR_BUFF1   =  0x82,
00155     DFO_WRITE_MEM_TR_BUFF2   =  0x85,
00156     /* \}*/
00157
00162     DFO_MOV_MEM_TO_BUFF1     =  0x53,
00163     DFO_MOV_MEM_TO_BUFF2     =  0x55,
00164     DFO_CMP_MEM_TO_BUFF1     =  0x60,
00165     DFO_CMP_MEM_TO_BUFF2     =  0x61,
00166     DFO_ARW_MEM_TR_BUFF1     =  0x58,
00167     DFO_ARW_MEM_TR_BUFF2     =  0x59,
00168     DFO_PWR_DOWN             =  0xB9,
00169     DFO_RESUME_PWR_DOWN      =  0xAB,
00170     DFO_READ_STATUS          =  0xD7,
00171     DFO_ID_DEV               =  0x9F
00172     /* \}*/
00173 } DataFlashOpcode;
00174
00175
00179 typedef struct DataflashInfo
00180 {
00181     uint8_t density_id;
00182     dataflash_size_t page_size;
00183     uint8_t page_bits;
00184     uint16_t page_cnt;
00185     DataFlashOpcode read_cmd;
00186 } DataflashInfo;
00187
00188
00189 bool dataflash_init(DataFlash *fd, KFile *ch, DataflashType type, dataflash_setCS_t *setCS, dataflash_setReset_t *setReset);
00190 bool dataflash_diskInit(struct BattFsSuper *d, DataFlash *fd, pgcnt_t *page_array);
00191
00199 int dataflash_testSetup(void);
00200 /* For backward compatibility */
00201 #define dataflash_testSetUp() dataflash_testSetup()
00202 int dataflash_testRun(void);
00203 int dataflash_testTearDown(void);
00204
00205 #endif /* DRV_DATAFLASH_H */


BeRTOS: dataflash_hwtest.c File Reference

  • drv
Functions
dataflash_hwtest.c File Reference

DataFlash test. More...

#include "hw/hw_dataflash.h"
#include "cfg/cfg_dataflash.h"
#include "cfg/cfg_proc.h"
#include <cfg/test.h>
#include <cfg/debug.h>
#include <cfg/module.h>
#include <cfg/log.h>
#include <drv/timer.h>
#include <drv/ser.h>
#include <drv/dataflash.h>
#include <kern/proc.h>
#include <io/kfile.h>
#include <string.h>

Go to the source code of this file.

Functions

int | dataflash_testSetup (void)
Setup all needed to test dataflash memory.
int | dataflash_testRun (void)
Run dataflash test memory.
int | dataflash_testTearDown (void)
End a dataflash Test.

Detailed Description

DataFlash test.

This module test the dataflash memory among the supported memory (see drv/dataflash.h for more detail). To test memory we fill one buffer with casual char, and write it in different part of memory. After every write we read the data that we have been write and compare this with test buffer, checking if write and read command work correclty. We also check if driver work properly when we make a write out the limit of memory size.

Note: dataflash driver use a kfile interface, so for write/read test we use a kfile_test module that perform some generic test.

Author:
Daniele Basile <asterix@develer.com>

Definition in file dataflash_hwtest.c.

Function Documentation

int dataflash_testRun ( void )

Run dataflash test memory.

Definition at line 170 of file dataflash_hwtest.c.

int dataflash_testSetup ( void )

Setup all needed to test dataflash memory.

To test data falsh drive you could use this functions.

Definition at line 110 of file dataflash_hwtest.c.

int dataflash_testTearDown ( void )

End a dataflash Test.

(Unused)

Definition at line 192 of file dataflash_hwtest.c.


BeRTOS: dataflash_hwtest.c Source File

  • drv
dataflash_hwtest.c
Go to the documentation of this file.
00001
00050 #include "hw/hw_dataflash.h"
00051 #include "cfg/cfg_dataflash.h"
00052 #include "cfg/cfg_proc.h"
00053
00054 #include <cfg/test.h>
00055 #include <cfg/debug.h>
00056 #include <cfg/module.h>
00057
00058 // Define logging setting (for cfg/log.h module).
00059 #define LOG_LEVEL      DATAFLASH_LOG_LEVEL
00060 #define LOG_FORMAT     DATAFLASH_LOG_FORMAT
00061 #include <cfg/log.h>   // for logging system
00062
00063 #include <drv/timer.h>
00064 #include <drv/ser.h>
00065 #include <drv/dataflash.h>
00066
00067 #include <kern/proc.h>
00068 #include <io/kfile.h>
00069
00070 #include <string.h>
00071
00072 /*
00073  * Settings for dataflash test
00074  *
00075  * \{
00076  */
00077 // Datafalsh type memory to test (see drv/dataflash.h for supported memory types)
00078 #define DATAFLASH_MEM_MODEL            DFT_AT45DB642D
00079
00080 // Function to set CS, this is typically implement in hw/hw_dataflash.{c, h}
00081 #define DATAFLASH_FUNC_CS_SET      dataflash_hw_setCS
00082
00083 // Function to reset memery, this is typically implement in hw/hw_dataflash.{c, h}
00084 #define DATAFLASH_FUNC_RESET                     NULL
00085
00086 // Buffer len to test dataflash
00087 #define DATAFLASH_TEST_STR_LEN                  12307
00088
00089 // If you want use a rand function of standard library set to 1.
00090 #define DATAFLASH_USE_RAND_FUNC                     0
00091 /* \} */
00092
00093 /*
00094  * Kfile structure to test a dataflash.
00095  */
00096 static Serial spi_fd;
00097 static DataFlash dflash_fd;
00098
00099 /*
00100  * Define tmp buffer to stora data for
00101  * write and read flash memory test.
00102  */
00103 static uint8_t test_buf[DATAFLASH_TEST_STR_LEN];
00104 static uint8_t save_buf[DATAFLASH_TEST_STR_LEN];
00105
00110 int dataflash_testSetup(void)
00111 {
00112         kfile_testSetup();
00113         LOG_INFO("KFILE setup..ok\n");
00114
00115         LOG_INFO("Check if kernel is enable (if enable you should see the assert message.)\n");
00116         SILENT_ASSERT("bertos/drv/dataflash_test.c:119: Assertion failed: !CONFIG_KERN");
00117         ASSERT(!CONFIG_KERN);
00118
00119         /*
00120          * This test use a kfile_test module,
00121          * so should include source in your makefile.
00122          */
00123         MOD_CHECK(kfile_test);
00124
00125         timer_init();
00126         LOG_INFO("Timer init..ok\n");
00127
00128         /*
00129          * Init SPI module and dataflash driver.
00130          */
00131         // Open SPI comunication channel
00132         spimaster_init(&spi_fd, 0);
00133         LOG_INFO("SPI0 init..ok\n");
00134
00135         ser_setbaudrate(&spi_fd, 5000000UL);
00136         LOG_INFO("SPI0 set baudrate..ok\n");
00137
00138         //Init dataflash memory
00139         dataflash_hw_init();
00140         LOG_INFO("DATAFLASH HW..ok\n");
00141
00142         if (dataflash_init(&dflash_fd, &spi_fd.fd, DATAFLASH_MEM_MODEL, DATAFLASH_FUNC_CS_SET, DATAFLASH_FUNC_RESET))
00143                 LOG_INFO("DATAFLASH init..ok\n");
00144         else
00145                 LOG_ERR("DATAFLASH init..fail\n");
00146
00147
00148         //Fill tmp buffer with rand chars.
00149         for (int i = 0; i < DATAFLASH_TEST_STR_LEN; i++)
00150         {
00151                 #if DATAFLASH_USE_RAND_FUNC
00152                         #include <stdlib.h> //Rand()
00153
00154                         test_buf[i] = (uint8_t)rand();
00155                 #else
00156                         test_buf[i] = (i & 0xff);
00157                 #endif
00158         }
00159
00160         LOG_INFO("Fill tmp buff..ok\n");
00161
00162     return 0;
00163 }
00164
00165
00170 int dataflash_testRun(void)
00171 {
00172         LOG_INFO("Run KFILE test.\n");
00173
00174         SILENT_ASSERT("bertos/drv/dataflash.c:405: Assertion failed: fd->fd.seek_pos + size <= fd->fd.size");
00175         if (kfile_testRunGeneric(&dflash_fd.fd, test_buf, save_buf, sizeof(test_buf)) != EOF)
00176         {
00177                 LOG_INFO("KFILE test..ok\n");
00178         }
00179         else
00180         {
00181                 LOG_ERR("KFILE test..fail!\n");
00182                 return EOF;
00183         }
00184
00185         return 0;
00186 }
00187
00192 int dataflash_testTearDown(void)
00193 {
00194     /*    */
00195     return 0;
00196 }
00197
00198 /*
00199  * Empty main.
00200  *
00201  * Look it as exmple, or use it if
00202  * you want test a data flash driver stand alone.
00203  */
00204 #if 0
00205 int main(void)
00206 {
00207     IRQ_ENABLE;
00208     kdbg_init();
00209
00210     #if CONFIG_KERN
00211     proc_init();
00212     #endif
00213
00214     if (!dataflash_testSetup())
00215     {
00216             LOG_INFO("DATAFLASH setup..ok\n");
00217     }
00218     else
00219     {
00220             LOG_ERR("DATAFLASH setup..fail!\n");
00221             return EOF;
00222     }
00223
00224     dataflash_testRun();
00225
00226     for(;;)
00227     {
00228     }
00229 }
00230 #endif


BeRTOS: dc_motor.c File Reference

  • drv
Defines | Functions | Variables
dc_motor.c File Reference

DC motor driver (implementation) More...

#include "dc_motor.h"
#include "hw/hw_dc_motor.h"
#include "cfg/cfg_pwm.h"
#include <cfg/log.h>
#include <cfg/debug.h>
#include <algo/pid_control.h>
#include <drv/timer.h>
#include <kern/proc.h>
#include <cpu/power.h>
#include <string.h>

Go to the source code of this file.

Defines

#define | DC_MOTOR_ACTIVE BV(0)
Define status bit for DC motor device.
#define | DC_MOTOR_DIR BV(1)
Spin direction of DC motor.

Functions

dc_speed_t | dc_motor_readTargetSpeed (int index)
Read the target speed from select device.
static void NORETURN | dc_motor_poll (void)
Process to poll DC motor status.
void | dc_motor_setDir (int index, bool dir)
Set spin direction of DC motor.
void | dc_motor_setSpeed (int index, dc_speed_t speed)
Set DC motor speed.
void | dc_motor_startTimer (int index, mtime_t on_time)
Set among of time that dc motor should run.
void | dc_motor_enable (int index, bool state)
Enable or disable dc motor.
void | dc_motor_setup (int index, DCMotorConfig *dcm_conf)
Apply a confinguration to select DC motor.
void | dc_motor_setPriority (int priority)
If we had enabled the priority scheduling, we can adjust the DC motor poll process priority.
void | dc_motor_init (void)
Init DC motor.

Variables

static DCMotor | dcm_all [CONFIG_NUM_DC_MOTOR]
DC motor definition.

Detailed Description

DC motor driver (implementation)

Thi module provide a simple api to controll a DC motor in direction and speed, to allow this we use a Back-EMF technique. This technique is based, on the capability of the DC motor to become a generator of voltage when we turn off its supply. This happen every time we turn off the DC motor supply, and it continues to rotate for a short time thanks to its mechanical energy. Using this idea we can turn off the motor for a very short time, and we read the volage value from DC motor supply pins. This voltage say to us the actual speed of the motor.

Author:
Daniele Basile <asterix@develer.com>

Definition in file dc_motor.c.

Define Documentation

#define DC_MOTOR_ACTIVE BV(0)

Define status bit for DC motor device.

DC motor enable or disable flag.

Definition at line 83 of file dc_motor.c.

Function Documentation

void dc_motor_init ( void )

Init DC motor.

priority: sets the dc motor process priority.

Definition at line 490 of file dc_motor.c.

static void NORETURN dc_motor_poll ( void ) [static]

Process to poll DC motor status.

To use a Back-EMF technique (see brief for more details), we turn off a motor for CONFIG_DC_MOTOR_SAMPLE_DELAY, that value are stored in each DC motor config. For this implementation we assume that have a common CONFIG_DC_MOTOR_SAMPLE_DELAY, choose among a max delay to all DC motor configuration. The DC motor off time is choose to allow the out signal to be stable, so we can read and process this value for feedback controll loop. The period (CONFIG_DC_MOTOR_SAMPLE_PERIOD - CONFIG_DC_MOTOR_SAMPLE_DELAY) that every time we turn off a DC motor is choose to have a feedback controll more responsive or less responsive.

Definition at line 289 of file dc_motor.c.

void dc_motor_setDir | ( | int | index,
 |  | bool | dir
 | ) |  |

Set spin direction of DC motor.

index number of DC motor dir direction of DC motor

Definition at line 347 of file dc_motor.c.


BeRTOS: dc_motor.c Source File

  • drv
dc_motor.c
Go to the documentation of this file.
00001
00047 #include "dc_motor.h"
00048 #include "hw/hw_dc_motor.h"
00049 #include "cfg/cfg_pwm.h"
00050
00051 // Define logging setting (for cfg/log.h module).
00052 #define LOG_LEVEL         DC_MOTOR_LOG_LEVEL
00053 #define LOG_FORMAT        DC_MOTOR_LOG_FORMAT
00054
00055 #include <cfg/log.h>
00056 #include <cfg/debug.h>
00057
00058 #include <algo/pid_control.h>
00059
00060 #include <drv/timer.h>
00061
00062 #include <kern/proc.h>
00063
00064 #include <cpu/power.h>
00065
00066 #include <string.h>
00067
00068 #if CFG_PWM_ENABLE_OLD_API
00069     #define PWM_ENABLE(dcm, en)    pwm_enable((dcm)->cfg->pwm_dev, (en))
00070     #define PWM_SETDUTY(dcm, duty) pwm_setDuty((dcm)->cfg->pwm_dev, (duty))
00071     #define PWM_SETFREQ(dcm, freq) pwm_setFrequency((dcm)->cfg->pwm_dev, (freq))
00072     #define PWM_SETPOL(dcm, pol)   pwm_setPolarity((dcm)->cfg->pwm_dev, (pol))
00073 #else
00074     #define PWM_ENABLE(dcm, en)    pwm_enable(&(dcm)->pwm, (en))
00075     #define PWM_SETDUTY(dcm, duty) pwm_setDuty(&(dcm)->pwm, (duty))
00076     #define PWM_SETFREQ(dcm, freq) pwm_setFrequency(&(dcm)->pwm, (freq))
00077     #define PWM_SETPOL(dcm, pol)   pwm_setPolarity(&(dcm)->pwm, (pol))
00078 #endif
00079
00083 #define DC_MOTOR_ACTIVE           BV(0)     ///< DC motor enable or disable flag.
00084 #define DC_MOTOR_DIR              BV(1)     ///< Spin direction of DC motor.
00085
00086 /*
00087  * Some utility macro for motor directions
00088  */
00089 #define POS_DIR                   1
00090 #define NEG_DIR                   0
00091 #define DC_MOTOR_POS_DIR(x)       ((x) |= DC_MOTOR_DIR)   // Set directions status positive
00092 #define DC_MOTOR_NEG_DIR(x)       ((x) &= ~DC_MOTOR_DIR)  // Set directions status negative
00093
00094 // Update the status with current direction
00095 #define DC_MOTOR_SET_STATUS_DIR(status, dir) \
00096         (dir == POS_DIR ? DC_MOTOR_POS_DIR(status) : DC_MOTOR_NEG_DIR(status))
00097
00098 #if (CONFIG_KERN && CONFIG_KERN_PREEMPT)
00099     #if CONFIG_DC_MOTOR_USE_SEM
00100         #include <kern/sem.h>
00101
00102         Semaphore dc_motor_sem;
00103         #define DC_MOTOR_LOCK        sem_obtain(&dc_motor_sem)
00104         #define DC_MOTOR_UNLOCK      sem_release(&dc_motor_sem)
00105     #else
00106         #define DC_MOTOR_LOCK        proc_forbid()
00107         #define DC_MOTOR_UNLOCK      proc_permit()
00108     #endif
00109 #else
00110     #define DC_MOTOR_LOCK        /* None */
00111     #define DC_MOTOR_UNLOCK      /* None */
00112 #endif
00113
00117 static DCMotor dcm_all[CONFIG_NUM_DC_MOTOR];
00118
00119 /*
00120  * Process to poll dc motor status
00121  */
00122 struct Process *dc_motor;
00123
00124
00125 // Stack process for DC motor poll.
00126 static PROC_DEFINE_STACK(dc_motor_poll_stack, 500);
00127
00128 // Only for Debug
00129 LOG_INFOB(static int debug_msg_delay = 0;);
00130
00131
00132 INLINE dc_speed_t dc_motor_readSpeed(int index)
00133 {
00134     DCMotor *dcm = &dcm_all[index];
00135     return HW_DC_MOTOR_READ_VALUE(dcm->cfg->adc_ch, dcm->cfg->adc_min, dcm->cfg->adc_max);
00136 }
00137
00141 dc_speed_t dc_motor_readTargetSpeed(int index)
00142 {
00143     DCMotor *dcm = &dcm_all[index];
00144     return HW_DC_MOTOR_READ_VALUE(dcm->cfg->speed_dev_id, CONFIG_DC_MOTOR_MIN_SPEED, CONFIG_DC_MOTOR_MAX_SPEED);
00145 }
00146
00147 static void dc_motor_start(int index)
00148 {
00149     DCMotor *dcm = &dcm_all[index];
00150
00151     DC_MOTOR_LOCK;
00152     /*
00153      * Clean all PID stutus variable, becouse
00154      * we start with new one.
00155      */
00156     pid_control_reset(&dcm->pid_ctx);
00157     dcm->status |= DC_MOTOR_ACTIVE;
00158     DC_MOTOR_UNLOCK;
00159 }
00160
00161 /*
00162  * There are two \a mode to stop the dc motor:
00163  *  - DC_MOTOR_DISABLE_MODE
00164  *  - DC_MOTOR_IDLE
00165  *
00166  * The DC_MOTOR_DISABLE_MODE shut down the DC motor and
00167  * leave it floating to rotate.
00168  * The DC_MOTOR_IDLE does not shut down DC motor, but put
00169  * its supply pin in short circuite, in this way the motor result
00170  * braked from intentional rotation.
00171  */
00172 static void dc_motor_stop(int index)
00173 {
00174     DCMotor *dcm = &dcm_all[index];
00175
00176     DC_MOTOR_LOCK;
00177
00178     dcm->status &= ~DC_MOTOR_ACTIVE;
00179     dcm->expire_time = DC_MOTOR_NO_EXPIRE;
00180     PWM_ENABLE(dcm, false);
00181
00182     if (dcm->cfg->braked)
00183     {
00184         DC_MOTOR_STOP_BRAKED(dcm->index);
00185     }
00186     else
00187     {
00188         DC_MOTOR_STOP_FLOAT(dcm->index);
00189     }
00190
00191     DC_MOTOR_UNLOCK;
00192 }
00193
00194 /*
00195  * Sampling a signal on DC motor and compute
00196  * a new value of speed according with PID control.
00197  */
00198 static void dc_motor_do(int index)
00199 {
00200     DCMotor *dcm = &dcm_all[index];
00201
00202     dc_speed_t curr_pos = 0;
00203     pwm_duty_t new_pid = 0;
00204
00205     DC_MOTOR_LOCK;
00206
00207     //If select DC motor is not active we return
00208     if (!(dcm->status & DC_MOTOR_ACTIVE))
00209     {
00210         DC_MOTOR_UNLOCK;
00211         return;
00212     }
00213
00214     /*
00215      * To set dc motor direction we must also set the
00216      * PWM polarity according with dc motor driver chip
00217      */
00218     PWM_SETPOL(dcm, dcm->status & DC_MOTOR_DIR);
00219     DC_MOTOR_SET_DIR(dcm->index, dcm->status & DC_MOTOR_DIR);
00220
00221     //Compute next value for reaching target speed from current position
00222     if (dcm->cfg->pid_enable)
00223     {
00224         /*
00225          * Here we cannot disable the switch context because the
00226          * driver, that read the speed could be need to use signal or
00227          * other thing that needs the kernel switch context, for this
00228          * reason we unlock before to read the speed.
00229          */
00230         DC_MOTOR_UNLOCK;
00231         curr_pos = dc_motor_readSpeed(index);
00232         DC_MOTOR_LOCK;
00233         new_pid = pid_control_update(&dcm->pid_ctx, dcm->tgt_speed, curr_pos);
00234     }
00235     else
00236     {
00237         new_pid = dcm->tgt_speed;
00238     }
00239
00240     LOG_INFOB(
00241         if (debug_msg_delay == 20)
00242         {
00243             LOG_INFO("DC Motor[%d]: curr_speed[%d],curr_pos[%d],tgt[%d]\n", dcm->index,
00244                                 curr_pos, new_pid, dcm->tgt_speed);
00245             debug_msg_delay = 0;
00246         }
00247         debug_msg_delay++;
00248     );
00249
00250     //Apply the compute duty value
00251     PWM_SETDUTY(dcm, new_pid);
00252
00253     //Restart dc motor
00254     PWM_ENABLE(dcm, true);
00255
00256     DC_MOTOR_ENABLE(dcm->index);
00257     DC_MOTOR_UNLOCK;
00258 }
00259
00260
00261 /*
00262  * Check if the DC motor run time is expired, if this happend
00263  * we turn off motor and reset status.
00264  */
00265 INLINE bool check_timerIsExpired(int index)
00266 {
00267
00268     DC_MOTOR_LOCK;
00269     bool check = ((dcm_all[index].expire_time - timer_clock()) < 0) &&
00270             (dcm_all[index].expire_time != DC_MOTOR_NO_EXPIRE);
00271     DC_MOTOR_UNLOCK;
00272
00273     return check;
00274 }
00275
00289 static void NORETURN dc_motor_poll(void)
00290 {
00291     for (;;)
00292     {
00293         /*
00294          * For all DC motor we read and process output singal,
00295          * and choose the max value to off time
00296          */
00297         for (int i = 0; i < CONFIG_NUM_DC_MOTOR; i++)
00298         {
00299             if (!dcm_all[i].cfg)
00300                 continue;
00301
00302             if (check_timerIsExpired(i))
00303                 dc_motor_stop(i);
00304             else
00305                 dc_motor_do(i);
00306
00307             /*
00308              * If we read speed from trimmer we update the target
00309              * speed value when motor is running so we can make
00310              * dc motor speed regulation.
00311              */
00312             if (dcm_all[i].cfg->speed_dev_id != DC_MOTOR_NO_DEV_SPEED)
00313                 dc_motor_setSpeed(i, dc_motor_readTargetSpeed(i));
00314         }
00315
00316         //Wait for next sampling
00317         timer_delay(CONFIG_DC_MOTOR_SAMPLE_PERIOD - CONFIG_DC_MOTOR_SAMPLE_DELAY);
00318
00319         for (int i = 0; i < CONFIG_NUM_DC_MOTOR; i++)
00320         {
00321             if (!dcm_all[i].cfg)
00322                 continue;
00323
00324             if (check_timerIsExpired(i))
00325                 dc_motor_stop(i);
00326
00327             DC_MOTOR_LOCK;
00328             if (dcm_all[i].status & DC_MOTOR_ACTIVE)
00329             {
00330                 DC_MOTOR_DISABLE(dcm_all[i].index);
00331                 PWM_ENABLE(&dcm_all[i], false);
00332             }
00333             DC_MOTOR_UNLOCK;
00334         }
00335
00336         //Wait some time to allow signal to stabilize before sampling
00337         timer_delay(CONFIG_DC_MOTOR_SAMPLE_DELAY);
00338     }
00339 }
00340
00347 void dc_motor_setDir(int index, bool dir)
00348 {
00349     DCMotor *dcm = &dcm_all[index];
00350     DC_MOTOR_LOCK;
00351     DC_MOTOR_SET_STATUS_DIR(dcm->status, dir);
00352     DC_MOTOR_UNLOCK;
00353 }
00354
00358 void dc_motor_setSpeed(int index, dc_speed_t speed)
00359 {
00360     DCMotor *dcm = &dcm_all[index];
00361
00362     DC_MOTOR_LOCK;
00363     dcm->tgt_speed = speed;
00364     DC_MOTOR_UNLOCK;
00365
00366     LOG_INFO("DC Motor[%d]: tgt_speed[%d]\n", index, dcm->tgt_speed);
00367 }
00368
00372 void dc_motor_startTimer(int index, mtime_t on_time)
00373 {
00374     DC_MOTOR_LOCK;
00375     dcm_all[index].expire_time = DC_MOTOR_NO_EXPIRE;
00376     if (on_time != DC_MOTOR_NO_EXPIRE)
00377     {
00378         dcm_all[index].expire_time = timer_clock() + ms_to_ticks(on_time);
00379         dc_motor_start(index);
00380     }
00381     DC_MOTOR_UNLOCK;
00382 }
00383
00384 void dc_motor_waitStop(int index)
00385 {
00386     DCMotor *dcm = &dcm_all[index];
00387     bool loop = true;
00388
00389     while (loop)
00390     {
00391         DC_MOTOR_LOCK;
00392         loop = dcm->status & DC_MOTOR_ACTIVE;
00393         DC_MOTOR_UNLOCK;
00394
00395         cpu_relax();
00396     }
00397 }
00398
00402 void dc_motor_enable(int index, bool state)
00403 {
00404     if (state)
00405         dc_motor_start(index);
00406     else
00407         dc_motor_stop(index);
00408 }
00409
00413 void dc_motor_setup(int index, DCMotorConfig *dcm_conf)
00414 {
00415     DCMotor *dcm = &dcm_all[index];
00416
00417     DC_MOTOR_LOCK;
00418     /*
00419      * We are using the same sample period for each
00420      * motor, and so we check if this value is the same
00421      * for all. The sample period time is defined in pid
00422      * configuration.
00423      *
00424      * TODO: Use a different sample period for each motor
00425      * and refactor a module to allow to use a timer interrupt,
00426      * in this way we can controll a DC motor also without a
00427      * kernel, increasing a portability on other target.
00428      */
00429     pid_control_setPeriod(&dcm_conf->pid_cfg, CONFIG_DC_MOTOR_SAMPLE_PERIOD);
00430
00431     //Init pid control
00432     pid_control_init(&dcm->pid_ctx, &dcm_conf->pid_cfg);
00433
00434
00435     dcm->cfg = dcm_conf;
00436
00437     /*
00438      * Apply config value.
00439      */
00440     dcm->index = index;
00441
00442     /*
00443      * By default the motor run forever..
00444      */
00445     dcm->expire_time = DC_MOTOR_NO_EXPIRE;
00446
00447     /*
00448      * By default set target speed.
00449      */
00450     dcm->tgt_speed = dcm_conf->speed;
00451
00452     /*
00453      * Clear the status.
00454      */
00455     dcm->status = 0;
00456 #if !CFG_PWM_ENABLE_OLD_API
00457     pwm_init(&dcm->pwm, dcm_conf->pwm_dev);
00458 #endif
00459     PWM_SETFREQ(dcm, dcm->cfg->freq);
00460     PWM_ENABLE(dcm, false);
00461
00462     //Set default direction for DC motor
00463     DC_MOTOR_SET_DIR(dcm->index, dcm->cfg->dir);
00464     DC_MOTOR_SET_STATUS_DIR(dcm->status, dcm->cfg->dir);
00465
00466     DC_MOTOR_UNLOCK;
00467
00468     LOG_INFO("DC motor[%d]:\n", dcm->index);
00469     LOG_INFO("> PID: kp[%f],ki[%f],kd[%f]\n", dcm->cfg->pid_cfg.kp, dcm->cfg->pid_cfg.ki, dcm->cfg->pid_cfg.kd);
00470     LOG_INFO("> PWM: pwm_dev[%d], freq[%ld], sample[%d]\n", dcm->cfg->pwm_dev, dcm->cfg->freq,CONFIG_DC_MOTOR_SAMPLE_DELAY);
00471     LOG_INFO("> ADC: adc_ch[%d], adc_max[%d], adc_min[%d]\n", dcm->cfg->adc_ch, dcm->cfg->adc_max, dcm->cfg->adc_min);
00472     LOG_INFO("> DC: dir[%d], speed[%d]\n", dcm->cfg->dir, dcm->cfg->speed);
00473 }
00474
00479 void dc_motor_setPriority(int priority)
00480 {
00481     ASSERT(CONFIG_KERN);
00482     ASSERT(dc_motor);
00483     proc_setPri(dc_motor, priority);
00484 }
00485
00490 void dc_motor_init(void)
00491 {
00492     ASSERT(CONFIG_KERN);
00493
00494     MOTOR_DC_INIT();
00495
00496     #if (CONFIG_KERN_PREEMPT && CONFIG_DC_MOTOR_USE_SEM)
00497         sem_init(&dc_motor_sem);
00498     #endif
00499
00500     //Create a dc motor poll process
00501     dc_motor = proc_new_with_name("DC_Motor", dc_motor_poll, NULL, sizeof(dc_motor_poll_stack), dc_motor_poll_stack);
00502 }
00503


BeRTOS: dc_motor.h File Reference

  • drv
Data Structures | Defines | Typedefs | Functions
dc_motor.h File Reference

DC motor driver. More...

#include "hw/hw_dc_motor.h"
#include "cfg/cfg_dc_motor.h"
#include "cfg/cfg_pwm.h"
#include <cfg/macros.h>
#include <algo/pid_control.h>
#include <drv/pwm.h>
#include <drv/timer.h>
#include <drv/adc.h>

Go to the source code of this file.

Data Structures

struct | DCMotorConfig
DC motor configuration stucture. More...
struct | DCMotor
Context structure for DC motor. More...

Defines

#define | DC_MOTOR_NO_EXPIRE -1
The DC motor runs do not expire, so it runs forever.
#define | DC_MOTOR_NO_DEV_SPEED -1
Disable the speed acquire from device (like trimmer, etc.).

Typedefs

typedef uint16_t | dc_speed_t
Type for DC motor.

Functions

void | dc_motor_setDir (int index, bool dir)
Set spin direction of DC motor.
void | dc_motor_enable (int index, bool state)
Enable or disable dc motor.
void | dc_motor_setSpeed (int index, dc_speed_t speed)
Set DC motor speed.
void | dc_motor_startTimer (int index, mtime_t on_time)
Set among of time that dc motor should run.
void | dc_motor_setup (int index, DCMotorConfig *dcm_conf)
Apply a confinguration to select DC motor.
dc_speed_t | dc_motor_readTargetSpeed (int index)
Read the target speed from select device.
void | dc_motor_setPriority (int priority)
If we had enabled the priority scheduling, we can adjust the DC motor poll process priority.
void | dc_motor_init (void)
Init DC motor.
int | dc_motor_testSetUp (void)
Test function prototypes.

Detailed Description

DC motor driver.

Author:
Daniele Basile <asterix@develer.com>

Definition in file dc_motor.h.

Function Documentation

void dc_motor_init ( void )

Init DC motor.

priority: sets the dc motor process priority.

Definition at line 490 of file dc_motor.c.

void dc_motor_setDir | ( | int | index,
 |  | bool | dir
 | ) |  |

Set spin direction of DC motor.

index number of DC motor dir direction of DC motor

Definition at line 347 of file dc_motor.c.

int dc_motor_testSetUp ( void )

Test function prototypes.

See dc_motor_hwtest.c file.

Definition at line 118 of file dc_motor_hwtest.c.


BeRTOS: dc_motor.h Source File

  • drv
dc_motor.h
Go to the documentation of this file.
00001
00043 #ifndef DRV_DC_MOTOR_H
00044 #define DRV_DC_MOTOR_H
00045
00046 #include "hw/hw_dc_motor.h"
00047
00048 #include "cfg/cfg_dc_motor.h"
00049 #include "cfg/cfg_pwm.h"
00050 #include <cfg/macros.h>
00051
00052 #include <algo/pid_control.h>
00053
00054 #include <drv/pwm.h>
00055 #include <drv/timer.h>
00056 #include <drv/adc.h>
00057
00058 #define DC_MOTOR_NO_EXPIRE        -1  ///< The DC motor runs do not expire, so it runs forever.
00059 #define DC_MOTOR_NO_DEV_SPEED     -1  ///< Disable the speed acquire from device (like trimmer, etc.).
00060
00064 typedef uint16_t dc_speed_t;
00065
00069 typedef struct DCMotorConfig
00070 {
00071     PidCfg pid_cfg;
00072     bool pid_enable;
00073
00074     unsigned pwm_dev;
00075     pwm_freq_t freq;
00076
00077     adc_ch_t adc_ch;
00078     adcread_t adc_max;
00079     adcread_t adc_min;
00080
00081     bool dir;
00082     bool braked;
00083
00084     dc_speed_t speed;
00085
00086     int speed_dev_id;
00087
00088 } DCMotorConfig;
00089
00090
00094 typedef struct DCMotor
00095 {
00096     const DCMotorConfig *cfg; // All configuration for select DC motor.
00097     PidContext pid_ctx;       // Pid control.
00098
00099 #if !CFG_PWM_ENABLE_OLD_API
00100     Pwm pwm;                  // Pwm context
00101 #endif
00102
00103     int index;                // DC motor id.
00104     uint32_t status;          // Status of select DC motor
00105     dc_speed_t tgt_speed;     // Target speed for select DC motor
00106
00107     ticks_t expire_time;      // Amount of time that  dc motor run
00108
00109 } DCMotor;
00110
00111 void dc_motor_setDir(int index, bool dir);
00112 void dc_motor_enable(int index, bool state);
00113 void dc_motor_setSpeed(int index, dc_speed_t speed);
00114 void dc_motor_startTimer(int index, mtime_t on_time);
00115 void dc_motor_waitStop(int index);
00116 void dc_motor_setup(int index, DCMotorConfig *dcm_conf);
00117 dc_speed_t dc_motor_readTargetSpeed(int index);
00118 void dc_motor_setPriority(int priority);
00119 void dc_motor_init(void);
00120
00121
00127 int dc_motor_testSetUp(void);
00128 void dc_motor_testRun(void);
00129 int dc_motor_testTearDown(void);
00130
00131 #endif /* DRV_DC_MOTOR_H */


BeRTOS: dc_motor_hwtest.c File Reference

  • drv
Functions
dc_motor_hwtest.c File Reference

Test for PWM driver (implementation) More...

#include <cfg/cfg_dc_motor.h>
#include <cfg/debug.h>
#include <cfg/log.h>
#include <algo/pid_control.h>
#include <drv/timer.h>
#include <drv/dc_motor.h>
#include <drv/adc.h>
#include <drv/pwm.h>
#include <kern/proc.h>
#include <cpu/irq.h>
#include <verstag.h>
#include <buildrev.h>

Go to the source code of this file.

Functions

int dc_motor_testSetUp (void)
Test function prototypes.

Detailed Description

Test for PWM driver (implementation)

This is a simple test for PWM driver. This module is target independent, so you can test all target that BeRTOS support. To use this test you should include a pwm_map.h header where are defined the PWM channels for your target. Then you should add or remove a test setting in pwm_test_cfg array, and edit a value for your specific test. Afther this, all is ready and you can test PWM driver.

The test check first if all PWM channel starts, and then try to change a PWM duty cicle for all channel. The change of duty cycle is operate when a PWM channel is enable, in this way you can see if a pwm signal is clean and work properly. The duty value is change incrementaly, and when it arrive to 100% or 0%, we reset the duty value and restart the test. Further the duty test, we check also a PWM polarity, infact when we reach a reset duty value, we invert a polary of PWM wavform. So you can see if the hardware manage correctly this situation.

Note: To be simple and target independently we not use a timer module, and so the delay is do with a for cycle.

Author:
Daniele Basile <asterix@develer.com>

HW test for DC Motor.

Definition in file dc_motor_hwtest.c.

Function Documentation

int dc_motor_testSetUp ( void )

Test function prototypes.

See dc_motor_hwtest.c file.

Definition at line 118 of file dc_motor_hwtest.c.


BeRTOS: dc_motor_hwtest.c Source File

  • drv
dc_motor_hwtest.c
Go to the documentation of this file.
00001
00062 #include <cfg/cfg_dc_motor.h>
00063
00064 #include <cfg/debug.h>
00065 // Define logging setting (for cfg/log.h module).
00066 #define LOG_LEVEL         DC_MOTOR_LOG_LEVEL
00067 #define LOG_VERBOSITY     DC_MOTOR_LOG_FORMAT
00068 #include <cfg/log.h>
00069
00070
00071 #include <algo/pid_control.h>
00072
00073 #include <drv/timer.h>
00074 #include <drv/dc_motor.h>
00075 #include <drv/adc.h>
00076 #include <drv/pwm.h>
00077 #include <drv/dc_motor.h>
00078
00079 #include <kern/proc.h>
00080
00081 #include <cpu/irq.h>
00082
00083 #include <verstag.h>
00084 #include <buildrev.h>
00085
00086 static DCMotorConfig motor =
00087 {
00088     /* PID */
00089     {
00090         .kp = 1,           /* Proportional coefficient */
00091         .ki = 4,           /* Integral coefficient */
00092         .kd = 0.008,         /* Derivate coefficient */
00093         .i_max = 2E33,       /* Integrale max error value */
00094         .i_min = -2E33,      /* Integrale min error value */
00095         .out_max = 65535,    /* Max output value */
00096         .out_min = 0,        /* Min output value */
00097         .sample_period = 0  /* Millisecod between 2 output singal sampling */
00098     },
00099     .pid_enable = true,      /* Enable or disable pid control */
00100
00101     /* PWM */
00102     .pwm_dev = 2,            /* PWM channel */
00103     .freq = 3000,            /* Frquency of PWM output waveform */
00104
00105     /* ADC */
00106     .adc_ch = 2,             /* ADC channel */
00107     .adc_max = 65535,        /* Max range value for ADC */
00108     .adc_min = 0,            /* Min range value for ADC */
00109
00110     /* DC Motor */
00111     .dir = 1,                 /* Default spin direction of DC motor */
00112     .braked = true,
00113
00114     .speed = 10000,          /* Fixed speed value for seldc_motor_enableect DC motor, if enable_dev_speed flag is false */
00115     .speed_dev_id = 7,        /* Index of the device where read speed */
00116 };
00117
00118 int dc_motor_testSetUp(void)
00119 {
00120     IRQ_ENABLE;
00121     kdbg_init();
00122     timer_init();
00123     proc_init();
00124 #if !CFG_PWM_ENABLE_OLD_API
00125     pwm_init();
00126 #endif
00127     adc_init();
00128
00129     return 0;
00130 }
00131
00132 #define MOTOR      2
00133
00134 void NORETURN dc_motor_testRun(void)
00135 {
00136     dc_motor_init();
00137
00138     /*
00139      * Assign the configuration to motor.
00140      */
00141     dc_motor_setup(MOTOR, &motor);
00142
00143     while (1)
00144     {
00145         /*
00146          * Using enable and disable
00147          */
00148         dc_motor_setDir(MOTOR, 1);
00149         dc_motor_setSpeed(MOTOR, 10000);
00150         dc_motor_enable(MOTOR, true);
00151         timer_delay(500);
00152         dc_motor_enable(MOTOR, false);
00153
00154
00155         dc_motor_setDir(MOTOR, 0);
00156         dc_motor_setSpeed(MOTOR, 60000);
00157         dc_motor_enable(MOTOR, true);
00158         timer_delay(150);
00159         dc_motor_enable(MOTOR, false);
00160
00161         /*
00162          * Using timer
00163          */
00164         dc_motor_setDir(MOTOR, 1);
00165         dc_motor_setSpeed(MOTOR, 60000);
00166         dc_motor_startTimer(MOTOR, 150);
00167         dc_motor_waitStop(MOTOR);
00168
00169         dc_motor_setDir(MOTOR, 0);
00170         dc_motor_setSpeed(MOTOR, 10000);
00171         dc_motor_startTimer(MOTOR, 500);
00172         dc_motor_waitStop(MOTOR);
00173     }
00174
00175 }
00176
00177 int dc_motor_testTearDown(void)
00178 {
00179     return 0;
00180 }


BeRTOS: debug.h File Reference

  • cfg
Defines | Functions
debug.h File Reference
#include <cfg/os.h>
#include <cfg/compiler.h>
#include "cfg/cfg_debug.h"
#include <cpu/attr.h>

Go to the source code of this file.

Defines

#define | _DEBUG 1
Preprocessor symbol defined only for debug builds.
#define | THIS_FILE __FILE__
This macro duplicates the old MSVC trick of redefining THIS_FILE locally to avoid the overhead of many duplicate strings in ASSERT().
#define | DB(x) x
This macro can be used to conditionally exclude one or more statements conditioned on _DEBUG, avoiding the clutter of ifdef/endif pairs.
#define | ASSERT(x) ((void)(LIKELY(x) ? 0 : __bassert(#x, THIS_FILE, __LINE__)))
Assert a pre-condition on code.
#define | ASSERT2(x, help) ((void)(LIKELY(x) ? 0 : __bassert(help " (" #x ")", THIS_FILE, __LINE__)))
Assert a pre-condition and give explanation message when assert fails.
#define | ASSERT_VALID_PTR(p)
Check that the given pointer is either NULL or pointing to valid memory.
#define | ASSERT_VALID_PTR_OR_NULL(p)
Check that the given pointer is not pointing to invalid memory.
#define | ASSERT_VALID_OBJ(_t, _o)
Check that the given pointer actually points to an object of the specified type.
Debug object creation and destruction.

These macros help track some kinds of leaks in C++ programs.

Usage is as follows:

   class Foo
   {
       DECLARE_INSTANCE_TRACKING(Foo)

       Foo()
       {
           NEW_INSTANCE(Foo);
           // ...
       }

       ~Foo()
       {
           DELETE_INSTANCE(Foo);
           // ...
       }
   };

   // Put this in the implementation file of the class
   IMPLEMENT_INSTANCE_TRACKING(Foo)

   // Client code
   int main(void)
   {
        Foo *foo = new Foo;
        cout << GET_INSTANCE_COUNT(Foo) << endl; // prints "1"
        delete foo;
        ASSERT_ZERO_INSTANCES(Foo); // OK
   }
#define | NEW_INSTANCE(CLASS) do { ++CLASS::__instances } while (0)
#define | DELETE_INSTANCE(CLASS) do { --CLASS::__instances } while (0)
#define | ASSERT_ZERO_INSTANCES(CLASS) ASSERT(CLASS::__instances == 0)
#define | GET_INSTANCE_COUNT(CLASS) (CLASS::__instances)
#define | DECLARE_INSTANCE_TRACKING(CLASS) static int __instances
#define | IMPLEMENT_INSTANCE_TRACKING(CLASS) int CLASS::__instances = 0
Walls to detect data corruption
#define | WALL_SIZE 8
#define | WALL_VALUE (long)0xABADCAFEL
#define | DECLARE_WALL(name, size) long name[(size) / sizeof(long)];
#define | FWD_DECLARE_WALL(name, size) extern long name[(size) / sizeof(long)];
#define | INIT_WALL(name) __init_wall((name), countof(name))
#define | CHECK_WALL(name) __check_wall((name), countof(name), #name, THIS_FILE, __LINE__)

Functions

int | kputnum (int num)
Cheap function to print small integers without using printf().
void | kdump (const void *buf, size_t len)
Dump binary data in hex.

Detailed Description

Definition in file debug.h.


BeRTOS: debug.h Source File

  • cfg
debug.h
Go to the documentation of this file.
00001
00052 #ifndef BERTOS_DEBUG_H
00053 #define BERTOS_DEBUG_H
00054
00055 #include <cfg/os.h>
00056 #include <cfg/compiler.h>
00057
00058 #include "cfg/cfg_debug.h"   /* CONFIG_KDEBUG_* */
00059
00060 /*
00061  * Defaults for rarely used config stuff.
00062  */
00063 #ifndef CONFIG_KDEBUG_TRACE
00064 #define CONFIG_KDEBUG_TRACE  1
00065 #endif
00066
00067 #ifndef CONFIG_KDEBUG_VERBOSE_ASSERT
00068 #define CONFIG_KDEBUG_VERBOSE_ASSERT  1
00069 #endif
00070
00071 #ifndef CONFIG_KDEBUG_WALLS
00072 #define CONFIG_KDEBUG_WALLS  1
00073 #endif
00074
00075 #if defined(__doxygen__)
00076
00085     #define _DEBUG 1
00086 #endif
00087
00088 #ifdef _DEBUG
00089     // STLport specific: enable extra checks
00090     #define __STL_DEBUG 1
00091
00092     // MSVC specific: Enable memory allocation debug
00093     #if defined(_MSC_VER)
00094         #include <crtdbg.h>
00095     #endif
00096
00097     /*
00098      * On UNIX systems the extabilished practice is to define
00099      * NDEBUG for release builds and nothing for debug builds.
00100      */
00101     #ifdef NDEBUG
00102     #undef NDEBUG
00103     #endif
00104
00110     #ifndef THIS_FILE
00111         #define THIS_FILE  __FILE__
00112     #endif
00113
00133     #define DB(x) x
00134
00135     #include <cpu/attr.h>        /* CPU_HARVARD */
00136
00137     /* These are implemented in drv/kdebug.c */
00138     void kdbg_init(void);
00139     void kputchar(char c);
00140     int kputnum(int num);
00141     void kdump(const void *buf, size_t len);
00142     void __init_wall(long *wall, int size);
00143
00144     #if CPU_HARVARD
00145         #include <cpu/pgm.h>
00146         void kputs_P(const char *PROGMEM str);
00147         void kprintf_P(const char *PROGMEM fmt, ...) FORMAT(__printf__, 1, 2);
00148         int __bassert_P(const char *PROGMEM cond, const char *PROGMEM file, int line);
00149         void __trace_P(const char *func);
00150         void __tracemsg_P(const char *func, const char *PROGMEM fmt, ...);
00151         int __invalid_ptr_P(void *p, const char *PROGMEM name, const char *PROGMEM file, int line);
00152         int __check_wall_P(long *wall, int size, const char * PGM_ATTR name, const char * PGM_ATTR file, int line);
00153         #define kputs(str)  kputs_P(PSTR(str))
00154         #define kprintf(fmt, ...)  kprintf_P(PSTR(fmt) ,## __VA_ARGS__)
00155         #define __bassert(cond, file, line)  __bassert_P(PSTR(cond), PSTR(file), (line))
00156         #define __trace(func)  __trace_P(func)
00157         #define __tracemsg(func, fmt, ...)  __tracemsg_P(func, PSTR(fmt), ## __VA_ARGS__)
00158         #define __invalid_ptr(p, name, file, line)  __invalid_ptr_P((p), PSTR(name), PSTR(file), (line))
00159         #define __check_wall(wall, size, name, file, line)  __check_wall_P(wall, size, PSTR(name), PSTR(file), (line))
00160     #else /* !CPU_HARVARD */
00161         void kputs(const char *str);
00162         void kprintf(const char *fmt, ...) FORMAT(__printf__, 1, 2);
00163         int __bassert(const char *cond, const char *file, int line);
00164         void __trace(const char *func);
00165         void __tracemsg(const char *func, const char *fmt, ...) FORMAT(__printf__, 2, 3);
00166         int __invalid_ptr(void *p, const char *name, const char *file, int line);
00167         int __check_wall(long *wall, int size, const char *name, const char *file, int line);
00168     #endif /* !CPU_HARVARD */
00169
00170     #if CONFIG_KDEBUG_VERBOSE_ASSERT
00171
00174         #define ASSERT(x)         ((void)(LIKELY(x) ? 0 : __bassert(#x, THIS_FILE, __LINE__)))
00175
00178         #define ASSERT2(x, help)  ((void)(LIKELY(x) ? 0 : __bassert(help " (" #x ")", THIS_FILE, __LINE__)))
00179     #else
00180         #define ASSERT(x)         ((void)(LIKELY(x) ? 0 : __bassert("", THIS_FILE, __LINE__)))
00181         #define ASSERT2(x, help)  ((void)ASSERT(x))
00182     #endif
00183
00184     #define IS_VALID_PTR(p) (LIKELY((void *)(p) >= (void *)CPU_RAM_START))
00185
00194     #define ASSERT_VALID_PTR(p) (IS_VALID_PTR(p) \
00195         ? 0 : __invalid_ptr(p, #p, THIS_FILE, __LINE__))
00196
00206     #define ASSERT_VALID_PTR_OR_NULL(p) ((void)(LIKELY((p == NULL) \
00207         || ((void *)(p) >= (void *)CPU_RAM_START)) \
00208         ? 0 : __invalid_ptr((p), #p, THIS_FILE, __LINE__)))
00209
00210     #if CONFIG_KDEBUG_TRACE
00211         #define TRACE  __trace(__func__)
00212         #define TRACEMSG(msg,...) __tracemsg(__func__, msg, ## __VA_ARGS__)
00213     #else
00214         #define TRACE  do {} while(0)
00215         #define TRACEMSG(...)  do {} while(0)
00216     #endif
00217
00222     #define ASSERT_VALID_OBJ(_t, _o) do { \
00223         ASSERT_VALID_PTR((_o)); \
00224         ASSERT(dynamic_cast<_t>((_o)) != NULL); \
00225     }
00226
00265     #define NEW_INSTANCE(CLASS)                do { ++CLASS::__instances } while (0)
00266     #define DELETE_INSTANCE(CLASS)             do { --CLASS::__instances } while (0)
00267     #define ASSERT_ZERO_INSTANCES(CLASS)       ASSERT(CLASS::__instances == 0)
00268     #define GET_INSTANCE_COUNT(CLASS)          (CLASS::__instances)
00269     #define DECLARE_INSTANCE_TRACKING(CLASS)   static int __instances
00270     #define IMPLEMENT_INSTANCE_TRACKING(CLASS) int CLASS::__instances = 0
00271     /*\}*/
00272
00273 #else /* !_DEBUG */
00274
00275     /*
00276      * On UNIX systems the extabilished practice is to define
00277      * NDEBUG for release builds and nothing for debug builds.
00278      */
00279     #ifndef NDEBUG
00280     #define NDEBUG 1
00281     #endif
00282
00283     #define DB(x)  /* nothing */
00284     #ifndef ASSERT
00285         #define ASSERT(x)  ((void)0)
00286     #endif /* ASSERT */
00287     #define ASSERT2(x, help)             ((void)0)
00288     #define IS_VALID_PTR(p)              (1)
00289     #define ASSERT_VALID_PTR(p)          ((void)0)
00290     #define ASSERT_VALID_PTR_OR_NULL(p)  ((void)0)
00291     #define ASSERT_VALID_OBJ(_t, _o)     ((void)0)
00292     #define TRACE                        do {} while (0)
00293     #if COMPILER_VARIADIC_MACROS
00294         #define TRACEMSG(x, ...)         do {} while (0)
00295     #else
00296         INLINE void TRACEMSG(UNUSED_ARG(const char *, msg), ...)
00297         {
00298             /* NOP */
00299         }
00300     #endif
00301
00302     #define NEW_INSTANCE(CLASS)                do {} while (0)
00303     #define DELETE_INSTANCE(CLASS)             do {} while (0)
00304     #define ASSERT_ZERO_INSTANCES(CLASS)       do {} while (0)
00305     #define GET_INSTANCE_COUNT(CLASS)          ERROR_ONLY_FOR_DEBUG
00306     #define DECLARE_INSTANCE_TRACKING(CLASS)
00307     #define IMPLEMENT_INSTANCE_TRACKING(CLASS)
00308
00309     INLINE void kdbg_init(void) { /* nop */ }
00310     INLINE void kputchar(UNUSED_ARG(char, c)) { /* nop */ }
00311     INLINE int kputnum(UNUSED_ARG(int, num)) { return 0; }
00312     INLINE void kputs(UNUSED_ARG(const char *, str)) { /* nop */ }
00313     INLINE void kdump(UNUSED_ARG(const void *, buf), UNUSED_ARG(size_t, len)) { /* nop */ }
00314
00315     #if defined(__cplusplus) && COMPILER_VARIADIC_MACROS
00316         /* G++ can't inline functions with variable arguments... */
00317         #define kprintf(fmt,...) do { (void)(fmt); } while(0)
00318     #else
00319         /* ...but GCC can. */
00320         INLINE void kprintf(UNUSED_ARG(const char *, fmt), ...) { /* nop */ }
00321     #endif
00322
00323 #endif /* _DEBUG */
00324
00325 #if CONFIG_KDEBUG_WALLS
00326
00330     #define WALL_SIZE                    8
00331     #define WALL_VALUE                   (long)0xABADCAFEL
00332     #define DECLARE_WALL(name,size)      long name[(size) / sizeof(long)];
00333     #define FWD_DECLARE_WALL(name,size)  extern long name[(size) / sizeof(long)];
00334     #define INIT_WALL(name)              __init_wall((name), countof(name))
00335     #define CHECK_WALL(name)             __check_wall((name), countof(name), #name, THIS_FILE, __LINE__)
00336     /*\}*/
00337 #else
00338     #define DECLARE_WALL(name, size)     /* nothing */
00339     #define FWD_DECLARE_WALL(name, size) /* nothing */
00340     #define INIT_WALL(name)              do {} while (0)
00341     #define CHECK_WALL(name)             do {} while (0)
00342 #endif
00343  // defgroup debug
00345
00346 #endif /* BERTOS_DEBUG_H */


BeRTOS: depend.h File Reference

  • cfg
Defines
depend.h File Reference

Depend module. More...

#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define CONFIG_DEPEND(FEATURE, DEPS) STATIC_ASSERT(!(FEATURE) || !!(DEPS))
Compile-time enforcement of dependencies between configuration options.

Detailed Description

Depend module.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file depend.h.


BeRTOS: depend.h Source File

  • cfg
depend.h
Go to the documentation of this file.
00001
00039 #ifndef CFG_DEPEND_H
00040 #define CFG_DEPEND_H
00041
00042 #include <cfg/compiler.h> // STATIC_ASSERT()
00043
00047 #define CONFIG_DEPEND(FEATURE, DEPS)  STATIC_ASSERT(!(FEATURE) || !!(DEPS))
00048
00049 #endif // CFG_DEPEND_H


BeRTOS: detect.h File Reference

  • cpu
detect.h File Reference

CPU detection through special preprocessor macros. More...

Go to the source code of this file.

Detailed Description

CPU detection through special preprocessor macros.

Definition in file detect.h.


BeRTOS: detect.h Source File

  • cpu
detect.h
Go to the documentation of this file.
00001
00036 #ifndef CPU_DETECT_H
00037 #define CPU_DETECT_H
00038
00039 #if defined(__ARM_ARCH_4T__) /* GCC */ \
00040     || (defined(__ICCARM__) && (__CORE__== __ARM4TM__)) /* IAR: defined for all cores == 4tm */
00041     #define CPU_ARM 1
00042     #define CPU_ID  arm
00043     #define CPU_CORE_NAME        "ARM7TDMI"
00044
00045     // AT91SAM7S products serie
00046     #if defined(__ARM_AT91SAM7S32__)
00047         #define CPU_ARM_AT91         1
00048         #define CPU_ARM_AT91SAM7S32  1
00049         #define CPU_NAME             "AT91SAM7S32"
00050     #else
00051         #define CPU_ARM_AT91SAM7S32  0
00052     #endif
00053
00054     #if defined(__ARM_AT91SAM7S64__)
00055         #define CPU_ARM_AT91         1
00056         #define CPU_ARM_SAM7S_LARGE  1
00057         #define CPU_ARM_AT91SAM7S64  1
00058         #define CPU_NAME             "AT91SAM7S64"
00059     #else
00060         #define CPU_ARM_AT91SAM7S64  0
00061     #endif
00062
00063     #if defined(__ARM_AT91SAM7S128__)
00064         #define CPU_ARM_AT91         1
00065         #define CPU_ARM_SAM7S_LARGE  1
00066         #define CPU_ARM_AT91SAM7S128 1
00067         #define CPU_NAME             "AT91SAM7S128"
00068     #else
00069         #define CPU_ARM_AT91SAM7S128 0
00070     #endif
00071
00072     #if defined(__ARM_AT91SAM7S256__)
00073         #define CPU_ARM_AT91         1
00074         #define CPU_ARM_SAM7S_LARGE  1
00075         #define CPU_ARM_AT91SAM7S256 1
00076         #define CPU_NAME             "AT91SAM7S256"
00077     #else
00078         #define CPU_ARM_AT91SAM7S256 0
00079     #endif
00080
00081     #if defined(__ARM_AT91SAM7S512__)
00082         #define CPU_ARM_AT91         1
00083         #define CPU_ARM_SAM7S_LARGE  1
00084         #define CPU_ARM_AT91SAM7S512 1
00085         #define CPU_NAME             "AT91SAM7S512"
00086     #else
00087         #define CPU_ARM_AT91SAM7S512 0
00088     #endif
00089
00090     // AT91SAM7X products serie
00091     #if defined(__ARM_AT91SAM7X128__)
00092         #define CPU_ARM_AT91         1
00093         #define CPU_ARM_SAM7X        1
00094         #define CPU_ARM_AT91SAM7X128 1
00095         #define CPU_NAME             "AT91SAM7X128"
00096     #else
00097         #define CPU_ARM_AT91SAM7X128 0
00098     #endif
00099
00100     #if defined(__ARM_AT91SAM7X256__)
00101         #define CPU_ARM_AT91         1
00102         #define CPU_ARM_SAM7X        1
00103         #define CPU_ARM_AT91SAM7X256 1
00104         #define CPU_NAME             "AT91SAM7X256"
00105     #else
00106         #define CPU_ARM_AT91SAM7X256 0
00107     #endif
00108
00109
00110     #if defined(__ARM_AT91SAM7X512__)
00111         #define CPU_ARM_AT91         1
00112         #define CPU_ARM_SAM7X        1
00113         #define CPU_ARM_AT91SAM7X512 1
00114         #define CPU_NAME             "AT91SAM7X512"
00115     #else
00116         #define CPU_ARM_AT91SAM7X512 0
00117     #endif
00118
00119     #if defined(__ARM_LPC2378__)
00120         #define CPU_ARM_LPC2        1
00121         #define CPU_ARM_LPC2378     1
00122         #define CPU_NAME             "LPC2378"
00123     #else
00124         #define CPU_ARM_LPC2378     0
00125     #endif
00126
00127     #if !defined(CPU_ARM_SAM7S_LARGE)
00128         #define CPU_ARM_SAM7S_LARGE 0
00129     #endif
00130
00131     #if !defined(CPU_ARM_SAM7X)
00132         #define CPU_ARM_SAM7X 0
00133     #endif
00134
00135
00136     #if defined(CPU_ARM_AT91)
00137         #if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \
00138         + CPU_ARM_AT91SAM7S128 + CPU_ARM_AT91SAM7S256 \
00139         + CPU_ARM_AT91SAM7S512 \
00140         + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 \
00141         + CPU_ARM_AT91SAM7X512 != 1
00142             #error ARM CPU configuration error
00143         #endif
00144         #define CPU_ARM_LPC2        0
00145
00146     #elif defined (CPU_ARM_LPC2)
00147
00148         #if CPU_ARM_LPC2378 + 0 != 1
00149             #error NXP LPC2xxx ARM CPU configuration error
00150         #endif
00151         #define CPU_ARM_AT91        0
00152     /* #elif Add other ARM families here */
00153     #else
00154         #define CPU_ARM_AT91        0
00155         #define CPU_ARM_LPC2        0
00156     #endif
00157
00158
00159     #if CPU_ARM_AT91 + CPU_ARM_LPC2 + 0 /* Add other ARM families here */ != 1
00160         #error ARM CPU configuration error
00161     #endif
00162 #else
00163     #define CPU_ARM                 0
00164
00165     /* ARM Families */
00166     #define CPU_ARM_AT91            0
00167     #define CPU_ARM_LPC2            0
00168
00169     /* SAM7 sub-families */
00170     #define CPU_ARM_SAM7S_LARGE     0
00171     #define CPU_ARM_SAM7X           0
00172
00173     /* ARM CPUs */
00174     #define CPU_ARM_AT91SAM7S32     0
00175     #define CPU_ARM_AT91SAM7S64     0
00176     #define CPU_ARM_AT91SAM7S128    0
00177     #define CPU_ARM_AT91SAM7S256    0
00178     #define CPU_ARM_AT91SAM7S512    0
00179     #define CPU_ARM_AT91SAM7X128    0
00180     #define CPU_ARM_AT91SAM7X256    0
00181     #define CPU_ARM_AT91SAM7X512    0
00182
00183     #define CPU_ARM_LPC2378         0
00184 #endif
00185
00186 #if defined(__ARM_ARCH_7M__) /* GCC */ \
00187     || (defined(__ICCARM__) && (__CORE__== __ARM7M__)) /* IAR: defined for all cores v7M */
00188     /* Cortex-M3 */
00189     #define CPU_CM3 1
00190     #define CPU_ID  cm3
00191     #define CPU_CORE_NAME "Cortex-M3"
00192
00193     #if defined (__ARM_LM3S1968__)
00194         #define CPU_CM3_LM3S        1
00195         #define CPU_CM3_LM3S1968    1
00196         #define CPU_NAME            "LM3S1968"
00197     #else
00198         #define CPU_CM3_LM3S1968    0
00199     #endif
00200
00201     #if defined (__ARM_LM3S8962__)
00202         #define CPU_CM3_LM3S        1
00203         #define CPU_CM3_LM3S8962    1
00204         #define CPU_NAME            "LM3S8962"
00205     #else
00206         #define CPU_CM3_LM3S8962    0
00207     #endif
00208
00209     #if defined (__ARM_STM32F101C4__)
00210         #define CPU_CM3_STM32       1
00211         #define CPU_CM3_STM32F101C4 1
00212         #define CPU_NAME            "STM32F101C4"
00213     #else
00214         #define CPU_CM3_STM32F101C4 0
00215     #endif
00216
00217     #if defined (__ARM_STM32F103RB__)
00218         #define CPU_CM3_STM32       1
00219         #define CPU_CM3_STM32F103RB 1
00220         #define CPU_NAME            "STM32F103RB"
00221     #else
00222         #define CPU_CM3_STM32F103RB 0
00223     #endif
00224
00225     #if defined (__ARM_STM32F103RE__)
00226         #define CPU_CM3_STM32       1
00227         #define CPU_CM3_STM32F103RE 1
00228         #define CPU_NAME            "STM32F103RE"
00229     #else
00230         #define CPU_CM3_STM32F103RE 0
00231     #endif
00232
00233     // AT91SAM3N products serie
00234     #if defined (__ARM_SAM3N4__)
00235         #define CPU_CM3_SAM3    1
00236         #define CPU_CM3_SAM3N   1
00237         #define CPU_CM3_SAM3N4  1
00238         #define CPU_NAME        "SAM3N4"
00239
00240         #define CPU_CM3_SAM3S   0
00241         #define CPU_CM3_SAM3U   0
00242         #define CPU_CM3_SAM3N2  0
00243         #define CPU_CM3_SAM3N1  0
00244         #define CPU_CM3_SAM3X   0
00245     #else
00246         #define CPU_CM3_SAM3N4  0
00247     #endif
00248
00249     // AT91SAM3S products serie
00250     #if defined (__ARM_SAM3S4__)
00251         #define CPU_CM3_SAM3    1
00252         #define CPU_CM3_SAM3S   1
00253         #define CPU_CM3_SAM3S4  1
00254         #define CPU_NAME        "SAM3S4"
00255
00256         #define CPU_CM3_SAM3N   0
00257         #define CPU_CM3_SAM3U   0
00258         #define CPU_CM3_SAM3X   0
00259     #else
00260         #define CPU_CM3_SAM3S4  0
00261     #endif
00262
00263     // AT91SAM3U products serie
00264     #if defined (__ARM_SAM3U4__)
00265         #define CPU_CM3_SAM3    1
00266         #define CPU_CM3_SAM3U   1
00267         #define CPU_CM3_SAM3U4  1
00268         #define CPU_NAME        "SAM3U4"
00269
00270         #define CPU_CM3_SAM3N   0
00271         #define CPU_CM3_SAM3S   0
00272         #define CPU_CM3_SAM3X   0
00273     #else
00274         #define CPU_CM3_SAM3U4  0
00275     #endif
00276
00277     // AT91SAM3X products serie
00278     #if defined (__ARM_SAM3X8__)
00279         #define CPU_CM3_SAM3    1
00280         #define CPU_CM3_SAM3X   1
00281         #define CPU_CM3_SAM3X8  1
00282         #define CPU_NAME        "SAM3X8"
00283
00284         #define CPU_CM3_SAM3N   0
00285         #define CPU_CM3_SAM3S   0
00286         #define CPU_CM3_SAM3U   0
00287     #else
00288         #define CPU_CM3_SAM3X8  0
00289     #endif
00290
00291     #if defined (CPU_CM3_LM3S)
00292         #if CPU_CM3_LM3S1968 + CPU_CM3_LM3S8962 + 0 != 1
00293             #error Luminary Cortex-M3 CPU configuration error
00294         #endif
00295         #define CPU_CM3_STM32       0
00296         #define CPU_CM3_SAM3        0
00297     #elif defined (CPU_CM3_STM32)
00298         #if CPU_CM3_STM32F101C4 + CPU_CM3_STM32F103RB + CPU_CM3_STM32F103RE + 0 != 1
00299             #error STM32 Cortex-M3 CPU configuration error
00300         #endif
00301         #define CPU_CM3_LM3S        0
00302         #define CPU_CM3_SAM3        0
00303     #elif defined (CPU_CM3_SAM3)
00304         #if CPU_CM3_SAM3N + CPU_CM3_SAM3U + CPU_CM3_SAM3S + CPU_CM3_SAM3X + 0 != 1
00305             #error SAM3 Cortex-M3 CPU configuration error
00306         #endif
00307         #if CPU_CM3_SAM3N4 + CPU_CM3_SAM3S4 + CPU_CM3_SAM3U4 + CPU_CM3_SAM3X8 + 0 != 1
00308             #error SAM3 Cortex-M3 CPU configuration error
00309         #endif
00310         #define CPU_CM3_LM3S        0
00311         #define CPU_CM3_STM32       0
00312     /* #elif Add other Cortex-M3 families here */
00313     #else
00314         #define CPU_CM3_LM3S        0
00315         #define CPU_CM3_STM32       0
00316         #define CPU_CM3_SAM3        0
00317     #endif
00318
00319
00320     #if CPU_CM3_LM3S + CPU_CM3_STM32 + CPU_CM3_SAM3 + 0 /* Add other Cortex-M3 families here */ != 1
00321         #error Cortex-M3 CPU configuration error
00322     #endif
00323
00324 #else
00325     #define CPU_CM3 0
00326     #define CPU_CM3_LM3S 0
00327     #define CPU_CM3_LM3S1968 0
00328     #define CPU_CM3_LM3S8962 0
00329
00330     #define CPU_CM3_STM32 0
00331     #define CPU_CM3_STM32F103RB 0
00332     #define CPU_CM3_STM32F101C4 0
00333     #define CPU_CM3_STM32F103RE 0
00334
00335     #define CPU_CM3_SAM3 0
00336     #define CPU_CM3_SAM3N 0
00337     #define CPU_CM3_SAM3N4 0
00338     #define CPU_CM3_SAM3X 0
00339     #define CPU_CM3_SAM3X8 0
00340 #endif
00341
00342 #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \
00343     && !defined(__ICCARM__) /* IAR: if not ARM assume I196 */
00344     #warning Assuming CPU is I196
00345     #define CPU_I196        1
00346     #define CPU_ID                  i196
00347 #else
00348     #define CPU_I196                0
00349 #endif
00350
00351 #if defined(__i386__) /* GCC */ \
00352     || (defined(_M_IX86) && !defined(_WIN64)) /* MSVC */
00353     #define CPU_X86                 1
00354     #define CPU_X86_32              1
00355     #define CPU_X86_64              0
00356     #define CPU_ID                  x86
00357     #define CPU_CORE_NAME           "x86"
00358     #define CPU_NAME                "generic"
00359 #elif defined(__x86_64__) /* GCC */ \
00360     || (defined(_M_IX86) && defined(_WIN64)) /* MSVC */
00361     #define CPU_X86                 1
00362     #define CPU_X86_32              0
00363     #define CPU_X86_64              1
00364     #define CPU_ID                  x86
00365     #define CPU_CORE_NAME           "x86_64"
00366     #define CPU_NAME                "generic"
00367 #else
00368     #define CPU_X86                 0
00369     #define CPU_I386                0
00370     #define CPU_X86_64              0
00371 #endif
00372
00373 #if defined (_ARCH_PPC) || defined(_ARCH_PPC64)
00374     #define CPU_PPC                 1
00375     #define CPU_ID                  ppc
00376     #if defined(_ARCH_PPC)
00377         #define CPU_PPC32       1
00378     #else
00379             #define CPU_PPC32       0
00380     #endif
00381     #if defined(_ARCH_PPC64)
00382         #define CPU_PPC64       1
00383     #else
00384             #define CPU_PPC64       0
00385     #endif
00386 #else
00387     #define CPU_PPC                 0
00388     #define CPU_PPC32               0
00389     #define CPU_PPC64               0
00390 #endif
00391
00392 #if defined(__m56800E__) || defined(__m56800__)
00393     #define CPU_DSP56K              1
00394     #define CPU_ID                  dsp56k
00395 #else
00396     #define CPU_DSP56K              0
00397 #endif
00398
00399 #if defined (__AVR__)
00400     #define CPU_AVR                 1
00401     #define CPU_ID                  avr
00402     #define CPU_CORE_NAME           "AVR"
00403
00404     #if defined(__AVR_ATmega32__)
00405         #define CPU_AVR_MEGA        1
00406         #define CPU_AVR_ATMEGA32    1
00407         #define CPU_NAME            "ATmega32"
00408     #else
00409         #define CPU_AVR_ATMEGA32    0
00410     #endif
00411
00412     #if defined(__AVR_ATmega64__)
00413         #define CPU_AVR_MEGA        1
00414         #define CPU_AVR_ATMEGA64    1
00415         #define CPU_NAME            "ATmega64"
00416     #else
00417         #define CPU_AVR_ATMEGA64    0
00418     #endif
00419
00420     #if defined(__AVR_ATmega103__)
00421         #define CPU_AVR_MEGA        1
00422         #define CPU_AVR_ATMEGA103   1
00423         #define CPU_NAME            "ATmega103"
00424     #else
00425         #define CPU_AVR_ATMEGA103   0
00426     #endif
00427
00428     #if defined(__AVR_ATmega128__)
00429         #define CPU_AVR_MEGA        1
00430         #define CPU_AVR_ATMEGA128   1
00431         #define CPU_NAME            "ATmega128"
00432     #else
00433         #define CPU_AVR_ATMEGA128   0
00434     #endif
00435
00436     #if defined(__AVR_ATmega8__)
00437         #define CPU_AVR_MEGA        1
00438         #define CPU_AVR_ATMEGA8     1
00439         #define CPU_NAME            "ATmega8"
00440     #else
00441         #define CPU_AVR_ATMEGA8     0
00442     #endif
00443
00444     #if defined(__AVR_ATmega168__)
00445         #define CPU_AVR_MEGA        1
00446         #define CPU_AVR_ATMEGA168   1
00447         #define CPU_NAME            "ATmega168"
00448     #else
00449         #define CPU_AVR_ATMEGA168   0
00450     #endif
00451
00452     #if defined(__AVR_ATmega328P__)
00453         #define CPU_AVR_MEGA        1
00454         #define CPU_AVR_ATMEGA328P   1
00455         #define CPU_NAME            "ATmega328P"
00456     #else
00457         #define CPU_AVR_ATMEGA328P   0
00458     #endif
00459
00460     #if defined(__AVR_ATmega1281__)
00461         #define CPU_AVR_MEGA        1
00462         #define CPU_AVR_ATMEGA1281  1
00463         #define CPU_NAME            "ATmega1281"
00464     #else
00465         #define CPU_AVR_ATMEGA1281  0
00466     #endif
00467
00468     #if defined(__AVR_ATmega1280__)
00469         #define CPU_AVR_MEGA        1
00470         #define CPU_AVR_ATMEGA1280  1
00471         #define CPU_NAME            "ATmega1280"
00472     #else
00473         #define CPU_AVR_ATMEGA1280  0
00474     #endif
00475
00476     #if defined(__AVR_ATmega2560__)
00477         #define CPU_AVR_MEGA        1
00478         #define CPU_AVR_ATMEGA2560  1
00479         #define CPU_NAME            "ATmega2560"
00480     #else
00481         #define CPU_AVR_ATMEGA2560  0
00482     #endif
00483
00484     #if defined(__AVR_ATxmega32D4__)
00485         #define CPU_AVR_XMEGA       1
00486         #define CPU_AVR_XMEGA_D     1
00487         #define CPU_AVR_ATXMEGA32D4 1
00488         #define CPU_NAME            "ATxmega32d4"
00489     #else
00490         #define CPU_AVR_ATXMEGA32D4 0
00491     #endif
00492
00493     #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
00494       + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA328P + CPU_AVR_ATMEGA1281 \
00495       + CPU_AVR_ATMEGA1280 + CPU_AVR_ATMEGA2560 + CPU_AVR_ATXMEGA32D4 != 1
00496         #error AVR CPU configuration error
00497     #endif
00498
00499     #if defined(CPU_AVR_XMEGA) && defined(CPU_AVR_MEGA)
00500         #error CPU cannot be MEGA and XMEGA
00501     #elif defined(CPU_AVR_MEGA)
00502         #define CPU_AVR_XMEGA       0
00503     #elif defined(CPU_AVR_XMEGA)
00504         #define CPU_AVR_MEGA        0
00505     #endif
00506
00507     #if CPU_AVR_MEGA + CPU_AVR_XMEGA != 1
00508         #error AVR CPU configuration error
00509     #endif
00510
00511 #else
00512     #define CPU_AVR                 0
00513     #define CPU_AVR_MEGA            0
00514     #define CPU_AVR_ATMEGA8         0
00515     #define CPU_AVR_ATMEGA168       0
00516     #define CPU_AVR_ATMEGA328P      0
00517     #define CPU_AVR_ATMEGA32        0
00518     #define CPU_AVR_ATMEGA64        0
00519     #define CPU_AVR_ATMEGA103       0
00520     #define CPU_AVR_ATMEGA128       0
00521     #define CPU_AVR_ATMEGA1281      0
00522     #define CPU_AVR_ATMEGA1280      0
00523     #define CPU_AVR_ATMEGA2560      0
00524     #define CPU_AVR_XMEGA           0
00525     #define CPU_AVR_XMEGA_D         0
00526 #endif
00527
00528 #if defined (__MSP430__)
00529     #define CPU_MSP430              1
00530     #define CPU_ID                  msp430
00531     #define CPU_CORE_NAME           "MSP430"
00532
00533     #if defined(__MSP430F2274__)
00534         #define CPU_MSP430F2274     1
00535         #define CPU_NAME            "MSP430F2274"
00536     #else
00537         #define CPU_MSP430F2274     0
00538     #endif
00539
00540     #if defined(__MSP430G2231__)
00541         #define CPU_MSP430G2231     1
00542         #define CPU_NAME            "MSP430G2231"
00543     #else
00544         #define CPU_MSP430G2231     0
00545     #endif
00546
00547     #if CPU_MSP430F2274 + CPU_MSP430G2231 != 1
00548         #error MSP430 CPU configuration error
00549     #endif
00550 #else
00551     #define CPU_MSP430                  0
00552     #define CPU_MSP430F2274             0
00553     #define CPU_MSP430G2231             0
00554 #endif
00555
00556
00557 /* Self-check for the detection: only one CPU must be detected */
00558 #if CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 == 0
00559     #error Unknown CPU
00560 #elif !defined(CPU_ID)
00561     #error CPU_ID not defined
00562 #elif CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 != 1
00563     #error Internal CPU configuration error
00564 #endif
00565
00566
00567 #endif /* CPU_DETECT_H */


BeRTOS: bertos/cpu/ Directory Reference

  • cpu
cpu Directory Reference

Directories

directory | arm
directory | avr
directory | cortex-m3
directory | dsp56k
directory | i196
directory | msp430

Files

file | attr.h [code]

CPU-specific attributes.

file | cpu/byteorder.h [code]

Functions to convert integers to/from host byte-order.

file | detect.h [code]

CPU detection through special preprocessor macros.

file | frame.h [code]

CPU-specific stack frame handling macros.

file | cpu/irq.h [code]

CPU-specific IRQ definitions.

file | cpu/pgm.h [code]

Support for reading program memory on Harvard architectures.

file | power.h [code]

CPU power management functions.

file | types.h [code]

CPU-specific type definitions.


BeRTOS: bertos/fs/fatfs/ Directory Reference

  • fs
  • fatfs
fatfs Directory Reference

Directories

directory | option

Files

file | diskio.c [code]
file | diskio.h [code]
file | ff.c [code]
file | ff.h [code]
file | integer.h [code]


BeRTOS: bertos/cpu/msp430/ Directory Reference

  • cpu
  • msp430
msp430 Directory Reference

Directories

directory drv


BeRTOS: bertos/net/ Directory Reference

  • net
net Directory Reference

Directories

directory | nmeap

Files

file | afsk.c [code]

AFSK1200 modem.

file | afsk.h [code]

AFSK1200 modem.

file | ax25.c [code]

Simple AX25 data link layer implementation.

file | ax25.h [code]

Simple AX25 data link layer implementation.

file | keytag.c [code]

KeyTAG parser.

file | keytag.h [code]

Tag protocol. (interface).

file | lwip.c [code]

lwIP TCP/IP stack module

file | lwip.h [code]

lwIP TCP/IP stack module

file | nmea.c [code]

NMEA parser implementation.

file | nmea.h [code]

NMEA Parser.

file | pocketbus.c [code]

pocketBus protocol implementation.

file | pocketbus.h [code]

Basical functions to use pocketBus protocol.

file | pocketcmd.c [code]

pocketBus protocol Command layer implementation.

file | pocketcmd.h [code]

PocketBus command abstraction layer.

file | tftp.c [code]

TFTP protocol implementation.

file | tftp.h [code]

TFTP protocol implementation.

file | xmodem.c [code]

X-Modem serial transmission protocol (implementation)

file | xmodem.h [code]

X-Modem serial transmission protocol.


BeRTOS: bertos/algo/ Directory Reference

  • algo
algo Directory Reference

Files

file | crc.c [code]

CRC table and support routines.

file | crc.h [code]

Cyclic Redundancy Check 16 (CRC).

file | crc_ccitt.c [code]

CRC-CCITT table and support routines.

file | crc_ccitt.h [code]

CCITT Cyclic Redundancy Check (CRC-CCITT).

file | md2.c [code]

MD2 Message-Digest algorithm.

file | md2.h [code]

MD2 Message-Digest algorithm.

file | mean.h [code]
file | pid_control.c [code]

Proportional, integral, derivative controller (PID controller) (implementation)

file | pid_control.h [code]

Proportional, integral, derivative controller (PID controller).

file | ramp.c [code]

Compute, save and load ramps for stepper motors (implementation)

file | ramp.h [code]

Compute, save and load ramps for stepper motors.

file | rand.c [code]

Very simple rand() algorithm.

file | rand.h [code]

Very simple rand() algorithm.

file | randpool.c [code]

API function for to manage entropy pool.

file | randpool.h [code]

Collection of functions to manage entropy pool.

file | rle.c [code]

General-purpose run-length {en,de}coding algorithm (implementation)

file | algo/rle.h [code]

General-purpose run-length {en,de}coding algorithm.

file | rotating_hash.h [code]

Rotating Hash algorithm.

file | tea.c [code]

TEA Tiny Encription Algorith functions (implementation).

file | tea.h [code]

TEA Tiny Encription Algorith functions.


BeRTOS: bertos/cfg/ Directory Reference

  • cfg
cfg Directory Reference

Files

file | cfg_adc.h [code]

Configuration file for the ADC module.

file | cfg_afsk.h [code]

Configuration file for AFSK1200 modem.

file | cfg_arch.h [code]

Set system configuration.

file | cfg_attr.h [code]

Configuration file for Debug module.

file | cfg_ax25.h [code]

Configuration file for the AX25 protocol module.

file | cfg_battfs.h [code]

Configuration file for BattFS module.

file | cfg_boot.h [code]

Configuration file for bootloader module.

file | cfg_buzzerled.h [code]

Configuration file for buzzerled module.

file | cfg_context_switch.h [code]

Configuration file for the context switch benchmark.

file | cfg_dac.h [code]

Configuration file for DAC module.

file | cfg_dataflash.h [code]

Configuration file for data flash memory module.

file | cfg_dc_motor.h [code]

Configuration file for DC motor module.

file | cfg_debug.h [code]

Configuration file for Debug module.

file | cfg_eeprom.h [code]

Configuration file for the Eeprom module.

file | cfg_emb_flash.h [code]

Configuration file for embedded flash module.

file | cfg_eth.h [code]

Configuration file for the generic ethernet driver module.

file | cfg_fat.h [code]

Configuration file for Fat module.

file | cfg_flash25.h [code]

Configuration file for flash25 module.

file | cfg_formatwr.h [code]

Configuration file for formatted write module.

file | cfg_gfx.h [code]

Configuration file for GFX module.

file | cfg_hashtable.h [code]

Configuration file for hashtable module.

file | cfg_heap.h [code]

Configuration file for heap module.

file | cfg_i2c.h [code]

Configuration file for I2C module.

file | cfg_i2s.h [code]

Configuration file for I2S module.

file | cfg_ini_reader.h [code]

Configuration file for ini reader module.

file | cfg_kbd.h [code]

Configuration file for keyboard module.

file | cfg_kern.h [code]

Kernel configuration parameters (deprecated)

file | cfg_keytag.h [code]

Configuration file for keytag module.

file | cfg_kfile.h [code]

Configuration file for KFile interface module.

file | cfg_lcd_32122a.h [code]

Displaytech 32122A LCD driver configuration file.

file | cfg_lcd_hd44.h [code]

Configuration file for lcd display module.

file | cfg_led_7seg.h [code]

Configuration file for led 7 segment display.

file | cfg_lm75.h [code]

Configuration file for the LM75 sensor temperature.

file | cfg_lwip.h [code]

Configuration file for the lwIP TCP/IP stack module.

file | cfg_md2.h [code]

Configuration file for MD2 module.

file | cfg_menu.h [code]

Configuration file for Menu module.

file | cfg_monitor.h [code]

Kernel monitor configuration parameters.

file | cfg_mt29f.h [code]

Configuration file for MT29F driver module.

file | cfg_nmea.h [code]

Configuration file for NMEA module.

file | cfg_ntc.h [code]

Configuration file for NTC module.

file | cfg_parser.h [code]

Configuration file for parser module.

file | cfg_phase.h [code]

Configuration file for phase module.

file | cfg_pid.h [code]

Configuration file for PWM module.

file | cfg_pocketbus.h [code]

Configuration file for pocketbus module.

file | cfg_proc.h [code]

Kernel configuration parameters.

file | cfg_pwm.h [code]

Configuration file for PWM module.

file | cfg_ramp.h [code]

Configuration file Ramp algorithm module.

file | cfg_random.h [code]

Configuration file for the "random" module.

file | cfg_randpool.h [code]

Configuration file for randpool module.

file | cfg_sd.h [code]

Configuration file Secure Digital module.

file | cfg_sem.h [code]

Kernel semaphores configuration parameters.

file | cfg_ser.h [code]

Configuration file for serial module.

file | cfg_signal.h [code]

Kernel signals configuration parameters.

file | cfg_spi_bitbang.h [code]

Configuration file for SPI bitbang module.

file | cfg_spi_dma.h [code]

Configuration file for spi dma module.

file | cfg_stepper.h [code]

Configuration file for stepper motor module.

file | cfg_tas5706a.h [code]

Configuration file for the TAS5706A module.

file | cfg_tftp.h [code]
file | cfg_thermo.h [code]

Configuration file for thermo module.

file | cfg_timer.h [code]

Configuration file for timer module.

file | cfg_usb.h [code]

Configuration file for the USB driver module.

file | cfg_usbkbd.h [code]

Configuration file for the usbkbd driver module.

file | cfg_usbmouse.h [code]

Configuration file for the usbmouse driver module.

file | cfg_usbser.h [code]

Configuration file for the USB serial driver module.

file | cfg_wdt.h [code]

Configuration file for watchdog module.

file | cfg_xmodem.h [code]

Configuration file for xmodem module.

file | compiler.h [code]

Additional support macros for compiler independance.

file | debug.h [code]
file | depend.h [code]

Depend module.

file | kfile_debug.c [code]

KFile interface over debug.

file | kfile_debug.h [code]

KFile interface over a debug console.

file | log.h [code]
file | macros.h [code]
file | module.h [code]

Debug macros for inter-module dependency checking.

file | os.h [code]

OS-specific definitions.

file | test.h [code]

Utility for the test suite.


BeRTOS: bertos/struct/ Directory Reference

  • struct
struct Directory Reference

Files

file | bitarray.h [code]

Bitarray module.

file | fifobuf.h [code]
file | hashtable.c [code]

Portable hash table implementation.

file | hashtable.h [code]

Portable hash table.

file | heap.c [code]

Heap subsystem (public interface).

file | heap.h [code]
file | kfile_fifo.c [code]

KFile interface over a FIFO buffer.

file | kfile_fifo.h [code]

KFile interface over a FIFO buffer.

file | kfile_mem.c [code]

KFile interface over a memory buffer.

file | kfile_mem.h [code]

KFile interface over a memory buffer.

file | list.h [code]
file | pool.h [code]


BeRTOS: bertos/sec/kdf/ Directory Reference

  • sec
  • kdf
kdf Directory Reference

Files

file | pbkdf1.c [code]

PBKDF1 implementation.

file | pbkdf1.h [code]

PBKDF1 implementation.

file | pbkdf2.c [code]

PBKDF2 implementation.

file | pbkdf2.h [code]

PBKDF2 implementation.


BeRTOS: bertos/ Directory Reference

  • bertos
bertos Directory Reference

Directories

directory | algo
directory | benchmark
directory | cfg
directory | cpu
directory | drv
directory | dt
directory | emul
directory | fonts
directory | fs
directory | gfx
directory | gui
directory | hw
directory | icons
directory | io
directory | kern
directory | mware
directory | net
directory | os
directory | sec
directory | struct

Files

file | verstag.c [code]

Define application version strings.

file | verstag.h [code]

Declare application version strings.


BeRTOS: bertos/cpu/cortex-m3/ Directory Reference

  • cpu
  • cortex-m3
cortex-m3 Directory Reference

Directories

directory | drv
directory | hw
directory | io


BeRTOS: bertos/cpu/cortex-m3/hw/ Directory Reference

  • cpu
  • cortex-m3
  • hw
hw Directory Reference

Files

file | init_cm3.c [code]

Cortex-M3 architecture's entry point.

file | switch_ctx_cm3.c [code]

Cortex-M3 context switch.

file | switch_ctx_cm3.h [code]

Cortex-M3 context switch.


BeRTOS: bertos/drv/ Directory Reference

  • drv
drv Directory Reference

Files

file | adc.c [code]

ADC driver (implementation)

file | adc.h [code]
file | buzzer.c [code]

Buzzer driver (implementation)

file | buzzer.h [code]

Buzzer driver.

file | buzzerled.c [code]

Generic library to handle buzzers and leds.

file | buzzerled.h [code]

Generic library to handle buzzers and leds.

file | dac.h [code]
file | dataflash.c [code]

Function library for dataflash AT45DB family (implementation).

file | dataflash.h [code]

Function library for dataflash AT45DB family.

file | dataflash_hwtest.c [code]

DataFlash test.

file | dc_motor.c [code]

DC motor driver (implementation)

file | dc_motor.h [code]

DC motor driver.

file | dc_motor_hwtest.c [code]

Test for PWM driver (implementation)

file | eeprom.c [code]

Driver for the 24xx16 and 24xx256 I2C EEPROMS (implementation)

file | eeprom.h [code]

Driver for the 24xx16 and 24xx256 I2C EEPROMS.

file | eth.h [code]

Ethernet standard descriptors.

file | flash.h [code]
file | flash25.c [code]

Function library for serial Flash memory.

file | flash25.h [code]

Function library for serial Flash memory.

file | flash25_hwtest.c [code]

Test function for serial Flash memory.

file | ft245rl.c [code]

Function library for Accessing FT245RL USB interface.

file | ft245rl.h [code]

Function library for Accessing FT245RL USB interface.

file | i2c.c [code]

I2C generic driver functions (implementation).

file | i2c.h [code]
file | i2c_bitbang.c [code]

I2C bitbang driver (implementation)

file | kbd.c [code]

Keyboard driver (implementation)

file | kbd.h [code]
file | kdebug.c [code]

General pourpose debug support for embedded systems (implementation).

file | lcd_32122a.c [code]

Displaytech 32122A LCD driver.

file | lcd_32122a.h [code]

Displaytech 32122A LCD driver.

file | lcd_gfx_hwtest.c [code]

dot-matrix LCD test.

file | lcd_gfx_qt.h [code]

Custom control for graphics LCD emulation (interface)

file | lcd_hd44.c [code]

LM044L type LCD hardware module (impl.)

file | lcd_hd44.h [code]

Hitachi HD44780 and clones LCD module.

file | lcd_hd44_hwtest.c [code]

LM044L type LCD hardware module (impl.)

file | lcd_hx8347.c [code]

Himax HX8347 LCD controller driver.

file | lcd_hx8347.h [code]

Himax HX8347 LCD controller driver.

file | lcd_ili9225.c [code]

ILI9225B 4 wire interface graphic driver.

file | lcd_ili9225.h [code]

ILI9225B 4 wire interface graphic driver.

file | lcd_lm44_qt.h [code]

Custom Qt widget for emulating a graphics LCD display (implementation)

file | lcd_rit128x96.c [code]

OLED-RIT-128x96 (P14201) graphic display driver.

file | lcd_rit128x96.h [code]

OLED-RIT-128x96 (P14201) graphic display driver.

file | lcd_text.c [code]

Generic text LCD driver (impl.).

file | lcd_text.h [code]

Generic text LCD driver (interface).

file | lcd_text_hwtest.c [code]

Generic text LCD driver (Test).

file | led_7seg.c [code]

7 segments LED displays (impl)

file | led_7seg.h [code]
file | lm75.c [code]

LM75 sensor temperature family.

file | lm75.h [code]

LM75 sensor temperature family.

file | mcp41.c [code]

MCP41xxx digital potentiomenter driver (implementation)

file | mcp41.h [code]

MCP41xxx digital potentiomenter driver.

file | mpxx6115a.h [code]

MPXX6115A Pressure Sensor convert formula.

file | mt29f.h [code]

Micron MT29F serial NAND driver.

file | ntc.c [code]

Driver for NTC (reads a temperature through an ADC)

file | ntc.h [code]

Driver for NTC sensors (reads a temperature through an ADC).

file | pcf8574.c [code]

PCF8574 i2c port expander driver.

file | pcf8574.h [code]

PCF8574 i2c port expander driver.

file | phase.c [code]

Phase control driver (implementation)

file | phase.h [code]

Phase partialization driver with TRIACs.

file | pwm.c [code]

PWM driver (implementation)

file | pwm.h [code]
file | pwm_hwtest.c [code]

Test for PWM driver (implementation)

file | rtc.h [code]

Real-time clock interface.

file | sd.c [code]

Function library for secure digital memory.

file | sd.h [code]

Function library for secure digital memory.

file | ser.c [code]

Buffered serial I/O driver.

file | ser.h [code]

High level serial I/O API.

file | ser_p.h [code]

Hardware dependent serial driver (interface)

file | sipo.c [code]

SIPO Module.

file | sipo.h [code]

Generic Serial-in, Parallel-out implementation (SIPO).

file | spi_bitbang.c [code]

Emulated SPI Master for DSP firmware download (impl.)

file | spi_bitbang.h [code]

Emulated SPI driver.

file | stepper.c [code]

Driver to control stepper motor.

file | stepper.h [code]

Driver to control stepper motor.

file | tas5706a.c [code]

TAS5706A Power DAC i2c driver.

file | tas5706a.h [code]

TAS5706A Power DAC i2c driver.

file | tc520.c [code]

TC520 ADC driver (implementation)

file | tc520.h [code]

TC520 ADC driver (intercace)

file | thermo.c [code]

Thermo-control driver.

file | thermo.h [code]

Thermo-control driver.

file | timer.c [code]

Hardware independent timer driver (implementation)

file | timer.h [code]
file | tlv5618.c [code]
file | tlv5618.h [code]

Texas instrument TLV5618 DAC driver.

file | tmp123.c [code]

TMP123 Texas Intrument sensor temperature.

file | tmp123.h [code]

TMP123 Texas Intrument sensor temperature.

file | usb.h [code]

USB 2.0 standard descriptors.

file | usb_endpoint.h [code]

USB endpoint allocations.

file | usb_hid.h [code]

Generic USB Human Interface Device (HID) driver.

file | usbkbd.c [code]

Generic USB keyboard device driver.

file | usbkbd.h [code]

Generic USB keyboard device driver.

file | usbmouse.c [code]

Generic USB mouse device driver.

file | usbmouse.h [code]

Generic USB mouse device driver.

file | usbser.c [code]

Generic USB serial device driver.

file | usbser.h [code]

Generic USB serial device driver.

file | wdt.h [code]

Watchdog module, supplies a simple API to manage wdt on supported target.


BeRTOS: bertos/sec/hash/ Directory Reference

  • sec
  • hash
hash Directory Reference

Files

file | md5.c [code]
file | md5.h [code]

MD5 Hashing algorithm.

file | ripemd.c [code]

RIPEMD-160 Hashing algorithm.

file | ripemd.h [code]
file | sha1.c [code]

SHA-1 Hashing algorithm.

file | sha1.h [code]

SHA-1 Hashing algorithm.


BeRTOS: bertos/os/ Directory Reference

  • os
os Directory Reference

Files

file | hptime.c [code]

Portable abstraction for high-resolution time handling (implementation)

file | hptime.h [code]

Portable abstraction for high-resolution time handling (interface)


BeRTOS: bertos/cpu/cortex-m3/io/ Directory Reference

  • cpu
  • cortex-m3
  • io
io Directory Reference

Files

file | cm3.h [code]

Low-level Registry definition for ARM Cortex-m3 (interface).

file | lm3s.h [code]
file | lm3s_adc.h [code]

LM3S ADC definition.

file | lm3s_com.h [code]

LM3S1968 registers definition.

file | lm3s_gpio.h [code]

LM3S1968 GPIO hardware definitions.

file | lm3s_i2c.h [code]

LM3S I2C definition.

file | lm3s_ints.h [code]

LM3S1968 interrupts definition.

file | lm3s_memmap.h [code]

LM3S1968 memory map.

file | lm3s_nvic.h [code]

LM3S1968 NVIC hardware.

file | lm3s_pwm.h [code]

LM3S1968 PWM hardware definitions.

file | lm3s_ssi.h [code]

LM3S1968 SSI hardware definitions.

file | lm3s_sysctl.h [code]

LM3S1968 system control hardware.

file | lm3s_types.h [code]

LM3S generic hardware macros.

file | lm3s_uart.h [code]

LM3S1968 UART hardware.

file | sam3.h [code]
file | sam3_adc.h [code]
file | sam3_dacc.h [code]
file | sam3_emac.h [code]

SAM3 EMAC definitions.

file | sam3_flash.h [code]

Atmel SAM3 enhanced embedded flash controller definitions.

file | sam3_ints.h [code]

SAM3 interrupt definitions.

file | sam3_nvic.h [code]

Atmel SAM3 NVIC hardware.

file | sam3_pio.h [code]
file | sam3_pmc.h [code]

SAM3 PMC hardware.

file | sam3_rstc.h [code]
file | sam3_sdramc.h [code]

SAM3 SDRAM controller definitions.

file | sam3_smc.h [code]

SAM3X/A/U Static Memory Controller definitions.

file | sam3_spi.h [code]
file | sam3_sysctl.h [code]

Atmel SAM3 system controller registers.

file | sam3_tc.h [code]
file | sam3_uart.h [code]

SAM3 UART hardware.

file | sam3_usart.h [code]
file | sam3_wdt.h [code]
file | sam3n.h [code]

Atmel's SAM3 registers definitions.

file | stm32.h [code]

STM32F10XX registers definition.

file | stm32_adc.h [code]

STM32F103xx adc definition.

file | stm32_flash.h [code]

STM32F103xx Embedded flash definition.

file | stm32_gpio.h [code]

STM32F103xx GPIO definition.

file | stm32_i2c.h [code]

STM32F103xx I2C definition.

file | stm32_ints.h [code]

STM32F10xx interrupts definition.

file | stm32_memmap.h [code]

STM32 memory map.

file | stm32_nvic.h [code]

NVIC STM32F10xx registers definition.

file | stm32_pwr.h [code]

STM32 Power Control.

file | stm32_uart.h [code]

UART STM32F10xx registers definition.


BeRTOS: bertos/dt/ Directory Reference

  • dt
dt Directory Reference

Files

file | dnotifier.c [code]

Notifier obj (implementation).

file | dnotifier.h [code]

Notifier obj (interface).

file | dtag.h [code]

Tags interface.

file | dwidget.c [code]

Widget (implementation).

file | dwidget.h [code]

Widget (interface).

file | editbool.c [code]

Edit bool widget (implementation).

file | editbool.h [code]

Edit bool widget (interface).

file | editint.c [code]

Integer edit widget (implementation).

file | editint.h [code]

Integer edit (interface).


BeRTOS: bertos/cpu/i196/ Directory Reference

  • cpu
  • i196
i196 Directory Reference

Directories

directory drv


BeRTOS: bertos/sec/prng/ Directory Reference

  • sec
  • prng
prng Directory Reference

Files

file | isaac.c [code]

ISAAC implementation.

file | isaac.h [code]

ISAAC implementation.

file | x917.c [code]

ANSI X9.17 PRNG implementation.

file | x917.h [code]

ANSI X9.17 PRNG implementation.

file | yarrow.c [code]

Yarrow implementation.

file | yarrow.h [code]

Yarrow implementation.


BeRTOS: bertos/cpu/cortex-m3/drv/ Directory Reference

  • cpu
  • cortex-m3
  • drv
drv Directory Reference

Files

file | adc_cm3.h [code]

Low-level ADC module for ARM (interface).

file | adc_lm3s.c [code]

ADC hardware-specific implementation.

file | adc_lm3s.h [code]

ADC hardware-specific definition.

file | adc_sam3.c [code]

ADC hardware-specific implementation.

file | adc_sam3.h [code]

ADC hardware-specific definition.

file | adc_stm32.c [code]

ADC hardware-specific implementation.

file | adc_stm32.h [code]

ADC hardware-specific definition.

file | clock_cm3.h [code]

Low-level Clock module for ARM Cortex-m3 (interface).

file | clock_lm3s.c [code]

LM3S1968 Clocking driver.

file | clock_lm3s.h [code]

Low-level clocking driver for LM3S1968.

file | clock_sam3.c [code]

Atmel SAM3 clock setup.

file | clock_sam3.h [code]

Low-level clocking driver for SAM3.

file | clock_stm32.c [code]

STM32 Clocking driver.

file | clock_stm32.h [code]

Low-level clocking driver for Cortex-M3 STM32.

file | dac_cm3.h [code]

Low-level DAC module for Cortex-m3.

file | dac_sam3.c [code]

DAC hardware-specific implementation.

file | dac_sam3.h [code]

DAC hardware-specific definition.

file | eth_sam3.c [code]

EMAC driver for AT91SAM family with Davicom 9161A phy.

file | eth_sam3.h [code]

EMAC driver for AT91SAM family with Davicom 9161A phy, interface.

file | flash_cm3.h [code]

Low-level flash module for Cortex-M3 (interface).

file | flash_lm3s.c [code]

LM3S1968 internal flash memory driver.

file | flash_lm3s.h [code]

LM3S1968 internal flash memory driver.

file | flash_stm32.c [code]

STM32F103xx internal flash memory driver.

file | flash_stm32.h [code]

STM32F103xx internal flash memory driver.

file | gpio_lm3s.c [code]

LM3S1968 GPIO control interface.

file | gpio_lm3s.h [code]

LM3S1968 GPIO control interface.

file | gpio_stm32.c [code]

STM32 GPIO control interface.

file | gpio_stm32.h [code]

STM32 GPIO control interface.

file | i2c_cm3.h [code]

Low-level I2C module for ARM Cortex-m3 (interface).

file | i2c_lm3s.c [code]

Driver for the LM3S I2C (implementation)

file | i2c_lm3s.h [code]

Driver for the LM3S I2C (interface)

file | i2c_stm32.c [code]

STM32F103xx I2C driver.

file | i2c_stm32.h [code]

Driver for the STM32F103xx I2C (interface)

file | irq_cm3.c [code]

Cortex-M3 IRQ management.

file | irq_cm3.h [code]

IRQ management for the Cortex-M3 processor.

file | kdebug_cm3.c [code]

Low-level kdebug module for Cortex-M3 (inplementation).

file | kdebug_lm3s.c [code]

LM3S debug support (implementation).

file | kdebug_lm3s.h [code]

LM3S debug support (interface).

file | kdebug_sam3.c [code]

SAM3 debug support (implementation).

file | kdebug_stm32.c [code]

STM32 debug support (implementation).

file | kdebug_stm32.h [code]

STM32 debug support (interface).

file | mt29f_sam3.c [code]

Micron MT29F serial NAND driver for SAM3's static memory controller.

file | mt29f_sam3.h [code]

Micron MT29F serial NAND driver for SAM3's static memory controller (interface).

file | random_lm3s.c [code]

LM3 backend implementation entropy pulling.

file | random_stm32.c [code]

STM32 backend implementation entropy pulling.

file | rtc_stm32.c [code]

STM32 RTC driver.

file | ser_cm3.h [code]

Low-level serial module for Cortex-M3 (interface).

file | ser_lm3s.c [code]

LM3S1968 UART interface driver.

file | ser_lm3s.h [code]

LM3S1968 UART interface driver.

file | ser_sam3.c [code]

ARM UART and SPI I/O driver.

file | ser_sam3.h [code]

High level serial I/O API.

file | ser_stm32.c [code]

STM32 UART interface driver.

file | ser_stm32.h [code]

STM32F10xx UART interface driver.

file | ssi_lm3s.c [code]

LM3S1968 Synchronous Serial Interface (SSI) driver.

file | ssi_lm3s.h [code]

LM3S1968 Synchronous Serial Interface (SSI) driver.

file | timer_cm3.c [code]

Low-level timer driver (SysTick) for LM3S1968.

file | timer_cm3.h [code]

Low-level timer driver (SysTick) for Cortex-M3.

file | usb_stm32.c [code]

STM32 USB driver.

file | usb_stm32.h [code]

STM32: USB full-speed device driver.


BeRTOS: doc/ Directory Reference

  • doc
doc Directory Reference

Files

file | general-introduction [code]
file | README.bertos [code]
file | STATUS [code]


BeRTOS: bertos/gfx/ Directory Reference

  • gfx
gfx Directory Reference

Files

file | bitmap.c [code]

Bitmap manipulation routines.

file | charts.c [code]

Simple charts on top of mware/gfx routines (implementation).

file | charts.h [code]
file | font.h [code]

Font 8x6 IBM-PC 8bit.

file | font_10x20.c [code]
file | gfx.h [code]
file | gfx_p.h [code]

Graphics private header.

file | line.c [code]

Line drawing graphics routines.

file | text.c [code]

Text graphic routines.

file | text.h [code]
file | text_format.c [code]

printf-family routines for text output

file | win.c [code]

Very simple hierarchical windowing system.

file | win.h [code]

Very simple hierarchical windowing system.


BeRTOS: bertos/cpu/msp430/drv/ Directory Reference

  • cpu
  • msp430
  • drv
drv Directory Reference

Files

file | kdebug_msp430.c [code]

MSP430 debug support (implementation).

file | kdebug_msp430.h [code]

MSP430 debug support (implementation).


BeRTOS: bertos/cpu/arm/drv/ Directory Reference

  • cpu
  • arm
  • drv
drv Directory Reference

Files

file | adc_arm.c [code]

Low-level ADC module for ARM (inplementation).

file | adc_arm.h [code]

Low-level ADC module for ARM (interface).

file | adc_at91.c [code]

ADC hardware-specific implementation.

file | adc_at91.h [code]

ADC hardware-specific definition.

file | eth_at91.c [code]

EMAC driver for AT91SAM7X Family.

file | eth_at91.h [code]

EMAC driver for AT91SAM7X Family, interface.

file | flash_arm.h [code]

Low-level flash module for ARM (interface).

file | flash_at91.c [code]

At91sam7 Internal flash read/write driver.

file | flash_at91.h [code]

At91sam7 Internal flash read/write driver.

file | flash_lpc2.c [code]

NPX lpc23xx embedded flash read/write driver.

file | flash_lpc2.h [code]

NPX lpc23xx embedded flash read/write driver.

file | i2c_arm.h [code]

Low-level I2C module for ARM (interface).

file | i2c_at91.h [code]

Driver for the AT91SAM7X I2C (interface)

file | i2c_lpc2.c [code]

Driver for the LPC23xx I2C (implementation)

file | i2c_lpc2.h [code]

Driver for the LPC23xx I2C (interface)

file | i2s_at91.c [code]

I2S driver implementation.

file | i2s_at91.h [code]

I2S driver functions.

file | kdebug_arm.c [code]

Low-level kdebug module for ARM (inplementation).

file | kdebug_at91.c [code]

ARM debug support (implementation).

file | kdebug_at91.h [code]

ARM debug support (interface).

file | kdebug_lpc2.c [code]

ARM debug support (implementation).

file | pwm_arm.c [code]

Low-level PWM module for ARM (inplementation).

file | pwm_arm.h [code]

Low-level PWM module for ARM (interface).

file | pwm_at91.c [code]

PWM hardware-specific implementation.

file | pwm_at91.h [code]

PWM hardware-specific definition.

file | ser_arm.c [code]

Low-level serial module for ARM (inplementation).

file | ser_arm.h [code]

Low-level serial module for ARM (interface).

file | ser_at91.c [code]

ARM UART and SPI I/O driver.

file | ser_at91.h [code]

High level serial I/O API.

file | ser_lpc2.c [code]

LPC23xx UART driver.

file | ser_lpc2.h [code]

LPC23xx UART driver.

file | spi_dma_at91.c [code]

SPI driver with DMA.

file | spi_dma_at91.h [code]

SPI driver with DMA.

file | stepper_arm.c [code]

Low-level stepper timer module for ARM (inplementation).

file | stepper_arm.h [code]

Low-level stepper timer module for ARM (inplementation).

file | stepper_at91.c [code]

Stepper driver interface implementation.

file | stepper_at91.h [code]

Stepper hardware-specific definitions.

file | stepper_at91_hwtest.c [code]

Low level test for stepper driver interface implementation.

file | sysirq_at91.c [code]

System IRQ handler for Atmel AT91 ARM7 processors.

file | sysirq_at91.h [code]

System irq handler for Atmel AT91 ARM7 processors (interface).

file | timer_arm.c [code]

Low-level timer module for ARM (inplementation).

file | timer_arm.h [code]

Low-level timer module for ARM (interface).

file | timer_at91.c [code]

Low-level timer module for Atmel AT91 (inplementation).

file | timer_at91.h [code]

Low-level timer module for Atmel AT91 (interface).

file | timer_lpc2.c [code]

Low-level timer module for LPC2xxx (implementation).

file | timer_lpc2.h [code]

Low-level timer module for NXP LPC2xxx (interface).

file | twi_arm.c [code]

Low-level TWI module for ARM (inplementation).

file | twi_arm.h [code]

Low-level TWI module for ARM (interface).

file | twi_at91.c [code]

Driver for the AT91 ARM TWI (implementation)

file | twi_at91.h [code]

Driver for the AT91 ARM TWI (implementation)

file | vic_lpc2.c [code]

Vectored Interrupt Controller VIC driver.

file | vic_lpc2.h [code]

Vectored Interrupt Controller VIC driver.

file | wdt_arm.h [code]

Watchdog interface for ARM architecture.


BeRTOS: bertos/cpu/arm/hw/ Directory Reference

  • cpu
  • arm
  • hw
hw Directory Reference

Files

file | init_at91.c [code]

AT91SAM7S256 CRT.

file | init_lpc2.c [code]

LPC2378 CRT.

file | pll_at91.h [code]

AT91SAM7S256 CRT.


BeRTOS: bertos/gui/ Directory Reference

  • gui
gui Directory Reference

Files

file | levelbar.c [code]

Copyright 2004, 2006 Develer S.r.l.

file | levelbar.h [code]

Copyright 2004, 2006 Develer S.r.l.

file | leveledit.c [code]

Generic editor for (volume/gain/contrast/...) setting.

file | leveledit.h [code]

Generic editor for (volume/gain/contrast/...) setting.

file | menu.c [code]

General pourpose menu handling functions.

file | menu.h [code]
file | menubar.c [code]

Graphics Menu bar widget.

file | menubar.h [code]

Graphic menu bar widget.


BeRTOS: bertos/cpu/dsp56k/drv/ Directory Reference

  • cpu
  • dsp56k
  • drv
drv Directory Reference

Files

file | buzzerled_dsp56k.h [code]

Hardware support for buzzers and leds in DSP56K-based boards.

file | kdebug_dsp56k.c [code]

General pourpose debug support for embedded systems (implementation).

file | ser_dsp56k.c [code]

DSP5680x CPU specific serial I/O driver.

file | ser_dsp56k.h [code]

Low-level serial module for ARM (interface).

file | timer_dsp56k.h [code]

Driver module for DSP56K.


BeRTOS: bertos/net/nmeap/ Directory Reference

  • net
  • nmeap
nmeap Directory Reference

Directories

directory | inc
directory | src
directory | tst


BeRTOS: bertos/sec/entropy/ Directory Reference

  • sec
  • entropy
entropy Directory Reference

Files

file | yarrow_pool.c [code]

Yarrow entropy pool.

file | yarrow_pool.h [code]

Yarrow pool implementation.


BeRTOS: bertos/fonts/ Directory Reference

  • fonts
fonts Directory Reference

Files

file | fixed6x8.c [code]

Font 8x6 IBM-PC 8bit.

file | gohu.c [code]
file | helvB10.c [code]
file | luBS14.c [code]
file | ncenB18.c [code]


BeRTOS: bertos/sec/mac/ Directory Reference

  • sec
  • mac
mac Directory Reference

Files

file | hmac.c [code]

HMAC implementation.

file | hmac.h [code]

HMAC (RFC 2104) implementation.

file | omac.c [code]

OMAC implementation.

file | omac.h [code]

OMAC implementation.


BeRTOS: bertos/cpu/dsp56k/ Directory Reference

  • cpu
  • dsp56k
dsp56k Directory Reference

Directories

directory | drv
directory | hw


BeRTOS: bertos/cpu/i196/drv/ Directory Reference

  • cpu
  • i196
  • drv
drv Directory Reference

Files

file | kdebug_i196.c [code]

General pourpose debug support for embedded systems (implementation).

file | ser_i196.c [code]

CPU specific serial I/O driver.

file | timer_i196.h [code]

Low-level timer module for AVR.


BeRTOS: bertos/emul/ Directory Reference

  • emul
emul Directory Reference

Files

file | diskio_emul.c [code]

Low level disk access for FatFs emulated.

file | emul.h [code]

Qt-based emulator framework for embedded applications (interface)

file | emulkbd.h [code]

QT-based widget for leyboard emulation (interface)

file | emulwin.h [code]

Main Qt window for embedded applications emulator (interface)

file | kfile_posix.c [code]

KFile interface implementation in Posix systems.

file | kfile_posix.h [code]

KFile interface implementation in Posix systems.

file | ser_posix.c [code]

Serial port emulator for hosted environments.

file | timer_posix.c [code]

Low-level timer module for Qt emulator (implementation).

file | timer_posix.h [code]

Low-level timer module for POSIX systems (interface).

file | timer_qt.c [code]

Low-level timer module for Qt emulator (implementation).

file | timer_qt.h [code]

Low-level timer module for Qt emulator (interface).


BeRTOS: bertos/sec/cipher/ Directory Reference

  • sec
  • cipher
cipher Directory Reference

Files

file | aes.c [code]

AES Advanced Encryption Standard implementation.

file | aes.h [code]

AES Advanced Encryption Standard implementation.

file | aes_f32.h [code]

AES Advanced Encryption Standard implementation.

file | aes_f8.h [code]

AES Advanced Encryption Standard implementation.

file | blowfish.c [code]

Blowfish implementation.

file | blowfish.h [code]

Blowfish implementation.


BeRTOS: bertos/icons/ Directory Reference

  • icons
icons Directory Reference

Files

file | logo.c [code]
file | logo.h [code]


BeRTOS: bertos/cpu/avr/ Directory Reference

  • cpu
  • avr
avr Directory Reference

Directories

directory | drv
directory | hw


BeRTOS: bertos/io/ Directory Reference

  • io
io Directory Reference

Files

file | kblock.c [code]

KBlock interface.

file | kblock.h [code]
file | kblock_posix.c [code]

KBlock interface over libc files.

file | kblock_posix.h [code]

KBlock interface on POSIX file.

file | kblock_ram.c [code]

KBlock interface on RAM memory.

file | kblock_ram.h [code]

KBlock interface.

file | kfile.c [code]

Virtual KFile I/O interface.

file | io/kfile.h [code]
file | kfile_block.c [code]

KFile interface over a KBlock.

file | kfile_block.h [code]


BeRTOS: bertos/fs/ Directory Reference

  • fs
fs Directory Reference

Directories

directory | fatfs

Files

file | battfs.c [code]

BattFS: a filesystem for embedded platforms (implementation).

file | battfs.h [code]

BattFS: a filesystem for embedded platforms (interface). TODO: Add detailed filesystem description.

file | fat.c [code]

FatFS: kfile interface for FatFS module by ChaN.

file | fat.h [code]

FatFS: kfile interface for FatFS module by ChaN.


BeRTOS: bertos/net/nmeap/src/ Directory Reference

  • net
  • nmeap
  • src
src Directory Reference

Files

file nmeap01.c [code]


BeRTOS: bertos/net/nmeap/tst/ Directory Reference

  • net
  • nmeap
  • tst
tst Directory Reference

Files

file | test1.c [code]
file | test2.c [code]
file | test3.c [code]
file | wingps.c [code]


BeRTOS: bertos/mware/ Directory Reference

  • mware
mware Directory Reference

Files

file | blanker.c [code]

Display Blanker (implementation).

file | blanker.h [code]

Display Blanker (implementation).

file | mware/byteorder.h [code]
file | cmd_hunk.h [code]

Preprocessor magic to create hunks for the commands executed from the parser.

file | event.c [code]

Events handling implementation.

file | event.h [code]
file | except.h [code]

C++-like structured exception handling for C programs.

file | formatwr.c [code]

Basic "printf", "sprintf" and "fprintf" formatter.

file | formatwr.h [code]

Basic "printf", "sprintf" and "fprintf" formatter.

file | hex.c [code]

Poor man's hex arrays (implementation).

file | hex.h [code]

Poor man's hex arrays (implementation).

file | ini_reader.c [code]

Ini file reader module.

file | ini_reader.h [code]

Ini file reader module.

file | messages.c [code]

Messages for LCD.

file | messages.h [code]

Definitions of constant string messages.

file | observer.c [code]

Simple notifier for the observer/subject pattern (implementation)

file | observer.h [code]

Simple notifier for the subject/observer pattern (interface)

file | parser.c [code]

Channel protocol parser and commands.

file | parser.h [code]
file | mware/pgm.h [code]
file | readline.c [code]

Line editing support with history.

file | readline.h [code]

Line editing support with history.

file | resource.c [code]
file | resource.h [code]

TODO:

file | mware/rle.h [code]
file | sprintf.c [code]

sprintf() implementation based on _formatted_write()

file | strtol10.c [code]

Poor man's hex arrays (implementation).

file | strtol10.h [code]

Poor man's hex arrays (implementation).


BeRTOS: bertos/hw/ Directory Reference

  • hw
hw Directory Reference

Files

file | hw_afsk.h [code]

AFSK modem hardware-specific definitions.

file | hw_blanker.h [code]

Hardware-specific definitions.

file | hw_boot.h [code]

Bootloader hardware specific definition.

file | hw_buzzer.h [code]

Buzzer hardware-specific definitions.

file | hw_buzzerled.h [code]

Buzzerled hardware-specific definitions.

file | hw_cpufreq.h [code]

Hardware-specific definitions.

file | hw_dataflash.c [code]

Dataflash HW control routines.

file | hw_dataflash.h [code]

Dataflash HW control routines (interface).

file | hw_dc_motor.h [code]

DC motor hardware-specific definitions.

file | hw_ft245rl.h [code]

FT245RL USB interface hardware-specific definitions.

file | hw_hx8347.h [code]

HX8347 low-level hardware macros for Atmel SAM3X-EK board.

file | hw_i2c_bitbang.h [code]

Macro for I2C bitbang operation.

file | hw_ili9225.h [code]

SAM3N-EK: ILI9225B low-level hardware macros.

file | hw_input.h [code]

Macro for HW_INPUT_H.

file | hw_kbd.h [code]

Keyboard hardware-specific definitions.

file | hw_lcd.h [code]

Atmel SAM3N-EK testcase.

file | hw_lcd_32122a.h [code]

Displaytech 32122A LCD driver.

file | hw_lcd_hd44.h [code]

LCD low-level hardware macros.

file | hw_led.h [code]

Led on/off macros.

file | hw_led_7seg.h [code]

led 7 segment display low-level

file | hw_lm75.h [code]

Hardware macro definition.

file | hw_mcp41.c [code]

MCP41 hardware-specific definitions.

file | hw_mcp41.h [code]

MCP41 hardware-specific definitions.

file | hw_ntc.c [code]

NTC hardware-specific definition.

file | hw_ntc.h [code]

NTC hardware-specific definition.

file | hw_phase.c [code]

Phase control hardware-specific definitions.

file | hw_phase.h [code]

Phase control hardware-specific definitions.

file | hw_rit128x96.h [code]

LM3S1986: OLED-RIT-128x96 (P14201) low-level hardware macros.

file | hw_sd.h [code]

SD driver hardware-specific definitions.

file | hw_sensor.h [code]

Sensor hardware-specific definitions.

file | hw_ser.h [code]

Serial hardware-specific definitions.

file | hw_sipo.h [code]

Macro for HW_SIPO_H.

file | hw_spi.h [code]

Hardware macro definition.

file | hw_spi_dma.h [code]

SPI DMA driver hardware-specific definitions.

file | hw_stepper.h [code]

Stepper hardware-specific definitions.

file | hw_tas5706a.h [code]

HW pin handling.

file | hw_tc520.h [code]

TC520 hardware-specific definitions.

file | hw_thermo.h [code]

thermo hardware-specific control functions.

file | hw_timer.h [code]

Timer hardware-specific definitions.

file | hw_tlv5618.h [code]

TLV5816 DAC hardware-specific definitions.

file | hw_tmp123.h [code]

Hardware macro definition.

file | kbd_map.h [code]

Keyboard map definitions.

file | mcp41_map.h [code]

MCP41 digital potentiometer map definitions.

file | ntc_map.h [code]

NTC map definitions.

file | phase_map.h [code]

Triac map definitions.

file | pwm_map.h [code]

PWM map device.

file | thermo_map.h [code]

Thermo regulation control map definitions.


BeRTOS: bertos/cpu/avr/hw/ Directory Reference

  • cpu
  • avr
  • hw
hw Directory Reference

Files

file init_xmega.c [code]

AVR XMega initialization routine.


BeRTOS: bertos/kern/ Directory Reference

  • kern
kern Directory Reference

Files

file | coop.c [code]
file | irq.c [code]

Process scheduler (public interface).

file | kern/irq.h [code]

Process scheduler (public interface).

file | kern/kfile.h [code]
file | monitor.c [code]

Monitor to check for stack overflows.

file | monitor.h [code]

Monitor to check for stack overflows.

file | msg.h [code]
file | preempt.c [code]
file | proc.c [code]

Simple cooperative and preemptive multitasking scheduler.

file | proc.h [code]
file | proc_p.h [code]

Internal scheduler structures and definitions for processes.

file | sem.c [code]

Semaphore based synchronization services.

file | sem.h [code]
file | signal.c [code]

IPC signals implementation.

file | signal.h [code]


BeRTOS: bertos/fs/fatfs/option/ Directory Reference

  • fs
  • fatfs
  • option
option Directory Reference

Files

file | cc932.c [code]
file | cc936.c [code]
file | cc949.c [code]
file | cc950.c [code]
file | ccsbcs.c [code]
file | syncobj.c [code]


BeRTOS: bertos/net/nmeap/inc/ Directory Reference

  • net
  • nmeap
  • inc
inc Directory Reference

Files

file | nmeap.h [code]
file | nmeap_def.h [code]


BeRTOS: bertos/cpu/arm/ Directory Reference

  • cpu
  • arm
arm Directory Reference

Directories

directory | drv
directory | hw
directory | io


BeRTOS: bertos/cpu/avr/drv/ Directory Reference

  • cpu
  • avr
  • drv
drv Directory Reference

Files

file | adc_avr.c [code]

ADC hardware-specific definition.

file | adc_avr.h [code]

ADC hardware-specific definition.

file | flash_avr.c [code]

Self programming routines.

file | flash_avr.h [code]

AVR Internal flash read/write driver.

file | i2c_avr.c [code]

Driver for the AVR ATMega TWI (implementation)

file | i2c_avr.h [code]

Driver for the AVR ATMega TWI (implementation)

file | kdebug_avr.c [code]

Low-level kdebug module for AVR (inplementation).

file | kdebug_mega.c [code]

AVR debug support (implementation).

file | kdebug_xmega.c [code]

AVR XMega debug support (implementation).

file | pwm_avr.c [code]

Low-level PWM module for AVR (inplementation).

file | pwm_avr.h [code]

Low-level PWM module for AVR (interface).

file | ser_avr.c [code]

AVR UART and SPI I/O driver (Implementation)

file | ser_avr.h [code]

Low-level serial module for AVR (interface).

file | ser_mega.c [code]

AVR MEGA UART and SPI I/O driver (Implementation)

file | ser_mega.h [code]

Low-level serial module for AVR MEGA(interface).

file | ser_simple_avr.c [code]

Simple serial I/O driver.

file | ser_simple_avr.h [code]

Simple serial I/O driver.

file | ser_xmega.c [code]

AVR XMEGA USART driver (Implementation)

file | ser_xmega.h [code]

Low-level serial module for AVR XMEGA (interface).

file | stepper_avr.c [code]

Low-level stepper timer module for AVR (inplementation).

file | stepper_avr.h [code]

Low-level stepper timer module for AVR (inplementation).

file | timer_avr.c [code]

Low-level timer module for AVR (implementation).

file | timer_avr.h [code]

Low-level timer module for AVR (interface).

file | timer_mega.c [code]

Low-level timer module for AVR MEGA (implementation).

file | timer_mega.h [code]

Low-level timer module for AVR MEGA (interface).

file | timer_simple_avr.c [code]

Some simple delay routines.

file | timer_simple_avr.h [code]

Simple delay routine.

file | timer_xmega.c [code]

Low-level timer module for AVR XMEGA (implementation).

file | timer_xmega.h [code]

Low-level timer module for AVR XMEGA (interface).

file | wdt_avr.h [code]

Watchdog interface for AVR architecture.


BeRTOS: bertos/benchmark/ Directory Reference

  • benchmark
benchmark Directory Reference

Files

file | context_switch.c [code]

Context switch benchmark.

file | context_switch.h [code]

Context switch benchmark.

file | kernel_footprint.c [code]

Kernel footprint benchmark.

file | kernel_footprint.h [code]

Kernel footprint benchmark.


BeRTOS: bertos/sec/ Directory Reference

  • sec
sec Directory Reference

Directories

directory | cipher
directory | entropy
directory | hash
directory | kdf
directory | mac
directory | prng

Files

file | benchmarks.c [code]
file | benchmarks.h [code]
file | cipher.c [code]

Generic interface for symmetric block ciphers.

file | cipher.h [code]

Generic interface for symmetric block ciphers.

file | entropy.h [code]

Entropy pool generic interface.

file | hash.h [code]

Generic interface for hashing algorithms.

file | kdf.h [code]

Generic interface for key derivation functions.

file | mac.h [code]

Generic interface for message authentication algorithms.

file | prng.h [code]

Generic interface for cryptographically-secure pseudo-RNG.

file | random.c [code]

High-level random number generation functions.

file | random.h [code]

High-level random number generation functions.

file | random_p.h [code]

Internal function definitions for random.

file | util.c [code]

Generic utilities.

file | util.h [code]


BeRTOS: bertos/cpu/dsp56k/hw/ Directory Reference

  • cpu
  • dsp56k
  • hw
hw Directory Reference

Files

file switch_dsp56k.c [code]

DSP5680x task switching support.


BeRTOS: bertos/cpu/arm/io/ Directory Reference

  • cpu
  • arm
  • io
io Directory Reference

Files

file | arm.h [code]
file | at91.h [code]
file | at91_adc.h [code]
file | at91_aic.h [code]
file | at91_dbgu.h [code]
file | at91_emac.h [code]
file | at91_mc.h [code]
file | at91_pio.h [code]
file | at91_pit.h [code]
file | at91_pmc.h [code]
file | at91_pwm.h [code]
file | at91_rstc.h [code]
file | at91_spi.h [code]
file | at91_ssc.h [code]
file | at91_tc.h [code]
file | at91_twi.h [code]
file | at91_us.h [code]
file | at91_wdt.h [code]
file | at91sam7.h [code]
file | lpc23xx.h [code]


BeRTOS: Directories

Directories
This directory hierarchy is sorted roughly, but not completely, alphabetically:
  • bertos
    • algo
    • benchmark
    • cfg
    • cpu
      • arm
        • drv
        • hw
        • io
      • avr
        • drv
        • hw
      • cortex-m3
        • drv
        • hw
        • io
      • dsp56k
        • drv
        • hw
      • i196
        • drv
      • msp430
        • drv
    • drv
    • dt
    • emul
    • fonts
    • fs
      • fatfs
        • option
    • gfx
    • gui
    • hw
    • icons
    • io
    • kern
    • mware
    • net
      • nmeap
        • inc
        • src
        • tst
    • os
    • sec
      • cipher
      • entropy
      • hash
      • kdf
      • mac
      • prng
    • struct
  • doc


BeRTOS: diskio.c Source File

  • fs
  • fatfs
diskio.c
00001 /*-----------------------------------------------------------------------*/
00002 /* Low level disk I/O module skeleton for FatFs     (C)ChaN, 2007        */
00003 /*-----------------------------------------------------------------------*/
00004 /* This is a stub disk I/O module that acts as front end of the existing */
00005 /* disk I/O modules and attach it to FatFs module with common interface. */
00006 /*-----------------------------------------------------------------------*/
00007
00008 #include "diskio.h"
00009 #include "ff.h"
00010
00011 #include <io/kblock.h>
00012
00013 #include "cfg/cfg_fat.h"
00014 #define LOG_LEVEL   FAT_LOG_LEVEL
00015 #define LOG_FORMAT  FAT_LOG_FORMAT
00016 #include <cfg/log.h>
00017
00018 static KBlock *devs[_DRIVES];
00019
00020 void disk_assignDrive(KBlock *dev, int dev_num)
00021 {
00022     ASSERT(dev_num < _DRIVES);
00023     devs[dev_num] = dev;
00024 }
00025
00026
00027 /*-----------------------------------------------------------------------*/
00028 /* Inidialize a Drive                                                    */
00029
00030 DSTATUS disk_initialize (
00031     BYTE drv                /* Physical drive nmuber (0..) */
00032 )
00033 {
00034     return disk_status(drv);
00035 }
00036
00037
00038
00039 /*-----------------------------------------------------------------------*/
00040 /* Return Disk Status                                                    */
00041
00042 DSTATUS disk_status (
00043     BYTE drv        /* Physical drive nmuber (0..) */
00044 )
00045 {
00046     KBlock *dev = devs[drv];
00047     ASSERT(dev);
00048
00049     if (kblock_error(dev) != 0)
00050         return STA_NOINIT;
00051     else
00052         return RES_OK;
00053 }
00054
00055
00056
00057 /*-----------------------------------------------------------------------*/
00058 /* Read Sector(s)                                                        */
00059
00060 DRESULT disk_read (
00061     BYTE drv,       /* Physical drive nmuber (0..) */
00062     BYTE *buff,     /* Data buffer to store read data */
00063     DWORD sector,   /* Sector address (LBA) */
00064     BYTE count      /* Number of sectors to read (1..255) */
00065 )
00066 {
00067     KBlock *dev = devs[drv];
00068     ASSERT(dev);
00069
00070
00071     while (count--)
00072     {
00073         if (kblock_read(dev, sector++, buff, 0, dev->blk_size) != dev->blk_size)
00074             return RES_ERROR;
00075         buff += dev->blk_size;
00076     }
00077     return RES_OK;
00078 }
00079
00080
00081
00082 /*-----------------------------------------------------------------------*/
00083 /* Write Sector(s)                                                       */
00084
00085 #if _READONLY == 0
00086 DRESULT disk_write (
00087     BYTE drv,           /* Physical drive nmuber (0..) */
00088     const BYTE *buff,   /* Data to be written */
00089     DWORD sector,       /* Sector address (LBA) */
00090     BYTE count          /* Number of sectors to write (1..255) */
00091 )
00092 {
00093     KBlock *dev = devs[drv];
00094     ASSERT(dev);
00095
00096     while (count--)
00097     {
00098         if (kblock_write(dev, sector++, buff, 0, dev->blk_size) != dev->blk_size)
00099             return RES_ERROR;
00100         buff += dev->blk_size;
00101     }
00102     return RES_OK;
00103 }
00104 #endif /* _READONLY */
00105
00106
00107
00108 /*-----------------------------------------------------------------------*/
00109 /* Miscellaneous Functions                                               */
00110
00111 DRESULT disk_ioctl (
00112     BYTE drv,       /* Physical drive nmuber (0..) */
00113     BYTE ctrl,      /* Control code */
00114     void *buff      /* Buffer to send/receive control data */
00115 )
00116 {
00117     KBlock *dev = devs[drv];
00118     ASSERT(dev);
00119
00120
00121     switch (ctrl)
00122     {
00123         case CTRL_SYNC:
00124             if (kblock_flush(dev) == 0)
00125                 return RES_OK;
00126             else
00127                 return RES_ERROR;
00128
00129         case GET_SECTOR_SIZE:
00130             *(WORD *)buff = dev->blk_size;
00131             return RES_OK;
00132
00133         case GET_SECTOR_COUNT:
00134             *(DWORD *)buff = dev->blk_cnt;
00135             return RES_OK;
00136
00137         case GET_BLOCK_SIZE:
00138             *(DWORD *)buff = 1;
00139             return RES_OK;
00140
00141         default:
00142             LOG_ERR("unknown command: [%d]\n", ctrl);
00143             return RES_PARERR;
00144     }
00145 }
00146
00147
00148 DWORD get_fattime(void)
00149 {
00150     return 0;
00151 }
00152
00153


BeRTOS: diskio.h Source File

  • fs
  • fatfs
diskio.h
00001 /*-----------------------------------------------------------------------
00002 /  Low level disk interface modlue include file  R0.07   (C)ChaN, 2009
00003 /-----------------------------------------------------------------------*/
00004
00005 #ifndef _DISKIO
00006
00007 #define _READONLY   0   /* 1: Read-only mode */
00008 #define _USE_IOCTL  1
00009
00010 #include "integer.h"
00011 #include <io/kblock.h>
00012
00013
00014 /* Status of Disk Functions */
00015 typedef BYTE    DSTATUS;
00016
00017 /* Results of Disk Functions */
00018 typedef enum {
00019     RES_OK = 0,     /* 0: Successful */
00020     RES_ERROR,      /* 1: R/W Error */
00021     RES_WRPRT,      /* 2: Write Protected */
00022     RES_NOTRDY,     /* 3: Not Ready */
00023     RES_PARERR      /* 4: Invalid Parameter */
00024 } DRESULT;
00025
00026
00027 /*---------------------------------------*/
00028 /* Prototypes for disk control functions */
00029 void disk_assignDrive(KBlock *dev, int dev_num);
00030 BOOL assign_drives (int argc, char *argv[]);
00031 DSTATUS disk_initialize (BYTE);
00032 DSTATUS disk_status (BYTE);
00033 DRESULT disk_read (BYTE, BYTE*, DWORD, BYTE);
00034 #if _READONLY == 0
00035 DRESULT disk_write (BYTE, const BYTE*, DWORD, BYTE);
00036 #endif
00037 DRESULT disk_ioctl (BYTE, BYTE, void*);
00038
00039
00040
00041
00042 /* Disk Status Bits (DSTATUS) */
00043
00044 #define STA_NOINIT      0x01    /* Drive not initialized */
00045 #define STA_NODISK      0x02    /* No medium in the drive */
00046 #define STA_PROTECT     0x04    /* Write protected */
00047
00048
00049 /* Command code for disk_ioctrl() */
00050
00051 /* Generic command */
00052 #define CTRL_SYNC           0   /* Mandatory for write functions */
00053 #define GET_SECTOR_COUNT    1   /* Mandatory for only f_mkfs() */
00054 #define GET_SECTOR_SIZE     2
00055 #define GET_BLOCK_SIZE      3   /* Mandatory for only f_mkfs() */
00056 #define CTRL_POWER          4
00057 #define CTRL_LOCK           5
00058 #define CTRL_EJECT          6
00059 /* MMC/SDC command */
00060 #define MMC_GET_TYPE        10
00061 #define MMC_GET_CSD         11
00062 #define MMC_GET_CID         12
00063 #define MMC_GET_OCR         13
00064 #define MMC_GET_SDSTAT      14
00065 /* ATA/CF command */
00066 #define ATA_GET_REV         20
00067 #define ATA_GET_MODEL       21
00068 #define ATA_GET_SN          22
00069
00070
00071 #define _DISKIO
00072 #endif


BeRTOS: diskio_emul.c File Reference

  • emul
Variables
diskio_emul.c File Reference

Low level disk access for FatFs emulated. More...

#include <fs/fatfs/diskio.h>
#include <stdio.h>
#include <errno.h>
#include <time.h>

Go to the source code of this file.

Variables

static FILE * fake_disk = 0
This is an example implementation, used to simulate the the calls to normal filesystem calls It only works for drive 0.

Detailed Description

Low level disk access for FatFs emulated.

Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file diskio_emul.c.


BeRTOS: diskio_emul.c Source File

  • emul
diskio_emul.c
Go to the documentation of this file.
00001
00038 /*-----------------------------------------------------------------------*/
00039 /* Low level disk I/O module skeleton for FatFs     (C)ChaN, 2007        */
00040 /*-----------------------------------------------------------------------*/
00041
00042 #include <fs/fatfs/diskio.h>
00043 #include <stdio.h>
00044 #include <errno.h>
00045 #include <time.h>
00046
00047 #define SECTOR_SIZE 512
00048
00049 static volatile DSTATUS Stat = STA_NOINIT;
00050
00057 /*-----------------------------------------------------------------------*/
00058 /* Inidialize a Drive                                                    */
00059
00060 static FILE *fake_disk = 0;
00061
00062 DSTATUS disk_initialize (
00063     BYTE drv                /* Physical drive nmuber (0..) */
00064 )
00065 {
00066     if (drv)
00067         return STA_NOINIT; /* Support only drive 0 */
00068     // XXX: pay attention here: some functions call disk_initialize *after* it has
00069     //  been initialized for the first time.
00070     //  Here we just return the status (that should always be ~STA_NOINIT after the first
00071     //  call)
00072     if (fake_disk)
00073         return Stat;
00074
00075     const char *path = "emuldisk.dsk";
00076     fake_disk = fopen(path, "w+");
00077     int err = errno;
00078     if (!fake_disk)
00079     {
00080         switch (err)
00081         {
00082         case EINVAL:
00083             fprintf(stderr, "invalid mode\n");
00084         default:
00085             return STA_NOINIT;
00086         }
00087     }
00088     Stat &= ~STA_NOINIT;
00089     return Stat;
00090 }
00091
00092
00093
00094 /*-----------------------------------------------------------------------*/
00095 /* Return Disk Status                                                    */
00096
00097 DSTATUS disk_status (
00098     BYTE drv        /* Physical drive nmuber (0..) */
00099 )
00100 {
00101     if (drv)
00102         return STA_NOINIT; /* Support only drive 0 */
00103     return Stat;
00104 }
00105
00106
00107
00108 /*-----------------------------------------------------------------------*/
00109 /* Read Sector(s)                                                        */
00110
00111 DRESULT disk_read (
00112     BYTE drv,       /* Physical drive nmuber (0..) */
00113     BYTE *buff,     /* Data buffer to store read data */
00114     DWORD sector,   /* Sector address (LBA) */
00115     BYTE count      /* Number of sectors to read (1..255) */
00116 )
00117 {
00118     if (drv || !count) return RES_PARERR;
00119     if (Stat & STA_NOINIT) return RES_NOTRDY;
00120
00121     fseek(fake_disk, sector * SECTOR_SIZE, SEEK_SET);
00122     size_t read_items = fread(buff, SECTOR_SIZE, count, fake_disk);
00123     if (read_items == count)
00124         return RES_OK;
00125     else
00126     {
00127         if (feof(fake_disk))
00128             fprintf(stderr, "end-of-file\n");
00129         if (ferror(fake_disk))
00130             fprintf(stderr, "error\n");
00131         return RES_ERROR;
00132     }
00133 }
00134
00135
00136 /*-----------------------------------------------------------------------*/
00137 /* Write Sector(s)                                                       */
00138
00139 #if _READONLY == 0
00140 DRESULT disk_write (
00141     BYTE drv,           /* Physical drive nmuber (0..) */
00142     const BYTE *buff,   /* Data to be written */
00143     DWORD sector,       /* Sector address (LBA) */
00144     BYTE count          /* Number of sectors to write (1..255) */
00145 )
00146 {
00147     if (drv || !count) return RES_PARERR;
00148     if (Stat & STA_NOINIT) return RES_NOTRDY;
00149     if (Stat & STA_PROTECT) return RES_WRPRT;
00150
00151     fseek(fake_disk, sector * SECTOR_SIZE, SEEK_SET);
00152     size_t write_items = fwrite(buff, SECTOR_SIZE, count, fake_disk);
00153     if (write_items == count)
00154         return RES_OK;
00155     else
00156     {
00157         if (feof(fake_disk))
00158             fprintf(stderr, "end-of-file\n");
00159         if (ferror(fake_disk))
00160             fprintf(stderr, "error\n");
00161         return RES_ERROR;
00162     }
00163 }
00164 #endif /* _READONLY */
00165
00166
00167
00168 /*-----------------------------------------------------------------------*/
00169 /* Miscellaneous Functions                                               */
00170
00171 DRESULT disk_ioctl (
00172     BYTE drv,       /* Physical drive nmuber (0..) */
00173     BYTE ctrl,      /* Control code */
00174     void *buff      /* Buffer to send/receive control data */
00175 )
00176 {
00177     if (drv) return RES_PARERR;
00178     if (Stat & STA_NOINIT) return RES_NOTRDY;
00179
00180     switch (ctrl)
00181     {
00182     case GET_SECTOR_SIZE:
00183         *(WORD*)buff = SECTOR_SIZE;
00184         break;
00185     case GET_SECTOR_COUNT:
00186         *(DWORD*)buff = 65536;
00187         break;
00188     case GET_BLOCK_SIZE:
00189         *(DWORD*)buff = 1;
00190         break;
00191     case CTRL_SYNC:
00192         fflush(fake_disk);
00193         break;
00194     default:
00195         return RES_PARERR;
00196     }
00197     return RES_OK;
00198 }
00199
00200 DWORD get_fattime(void)
00201 {
00202     time_t tmp = time(0);
00203     struct tm *t = localtime(&tmp);
00204     DWORD tim = 0;
00205     // seconds
00206     tim |= (t->tm_sec / 2);
00207     // min
00208     tim |= (t->tm_min << 5);
00209     // hour
00210     tim |= (t->tm_hour << 11);
00211     // month day (1..31)
00212     tim |= (t->tm_mday << 16);
00213     // month (1..12)
00214     tim |= ((t->tm_mon + 1) << 21);
00215     // year (0..127)
00216     tim |= ((t->tm_year - 80) << 25);
00217     return tim;
00218 }
00219


BeRTOS: dnotifier.c File Reference

  • dt
Functions
dnotifier.c File Reference

Notifier obj (implementation). More...

#include <cfg/debug.h>
#include <dt/dtag.h>
#include <dt/dnotifier.h>
#include <struct/list.h>

Go to the source code of this file.

Functions

static void | notifier_update (DNotifier *n, dtag_t tag, dval_t val)
Default update used to notify target: notify all trasparently all targets in the list.
void | notifier_init (DNotifier *n)
Init.
void | filter_update (DFilter *f, dtag_t tag, dval_t val)
Search in the map a tag and a val corresponding to the ones supplied.
void | filter_mask_update (DFilter *f, dtag_t tag, dval_t val)
Search in the table a tag corresponding to the one supplied and a val that has at least the mask map supplied bits to one.
void | filter_init (DFilter *f, const DFilterMap *map, bool masked, DNotifier *source, DNotifier *target)
Init filter.

Detailed Description

Notifier obj (implementation).

Author:
Bernie Innocenti <bernie@codewiz.org>
Francesco Sacchi <batt@develer.com>

Definition in file dnotifier.c.

Function Documentation

void filter_init | ( | DFilter * | f,
 |  | const DFilterMap * | map,
 |  | bool | masked,
 |  | DNotifier * | source,
 |  | DNotifier * | target
 | ) |  |

Init filter.

Filter init.

If masked is true, all the fields value in map must be interpreted as a mask of bits.

Definition at line 143 of file dnotifier.c.

void filter_mask_update | ( | DFilter * | f,
 |  | dtag_t | tag,
 |  | dval_t | val
 | ) |  |

Search in the table a tag corresponding to the one supplied and a val that has at least the mask map supplied bits to one.

Filter update function with masking capabilities.

If a match is found change them to the corresponding ones in the map. If map is NULL the filter is trasparent and all messages sent to filter will be forwarded to its target.

Definition at line 106 of file dnotifier.c.

void filter_update | ( | DFilter * | f,
 |  | dtag_t | tag,
 |  | dval_t | val
 | ) |  |

Search in the map a tag and a val corresponding to the ones supplied.

Filter update function without masking capabilities.

If a match is found change them to the corresponding ones in the map. If map is NULL the filter is trasparent and all messages sent to filter will be forwarded to its target.

Definition at line 70 of file dnotifier.c.

void notifier_init ( DNotifier * n )

Init.

Notifier init.

Definition at line 57 of file dnotifier.c.


BeRTOS: dnotifier.c Source File

  • dt
dnotifier.c
Go to the documentation of this file.
00001
00039 #include <cfg/debug.h>
00040
00041 #include <dt/dtag.h>
00042 #include <dt/dnotifier.h>
00043 #include <struct/list.h>
00044
00049 static void notifier_update(DNotifier *n, dtag_t tag, dval_t val)
00050 {
00051     dnotify_targets(n, tag, val);
00052 }
00053
00057 void notifier_init(DNotifier *n)
00058 {
00059     // Init instance
00060     n->update = notifier_update;
00061     LIST_INIT(&n->targets);
00062 }
00063
00070 void filter_update(DFilter *f, dtag_t tag, dval_t val)
00071 {
00072
00073     const DFilterMap *map = f->map;
00074
00075     if (map)
00076     {
00077         while (map->src.tag != TAG_END)
00078         {
00079             if ((map->src.tag == tag) && (map->src.val == val))
00080             {
00081                 tag = map->dst.tag;
00082                 val = map->dst.val;
00083                 break;
00084             }
00085             /* TAG_ANY matches anything */
00086             if (map->src.tag == TAG_ANY)
00087                 break;
00088             map++;
00089         }
00090
00091         if (map->src.tag != TAG_END)
00092             dnotify(f->target, tag, val);
00093     }
00094     else
00095         dnotify(f->target, tag, val);
00096 }
00097
00098
00106 void filter_mask_update(DFilter *f, dtag_t tag, dval_t val)
00107 {
00108
00109     const DFilterMap *map = f->map;
00110     dfilter_mask_t mask;
00111
00112     if (map)
00113     {
00114         while (map->src.tag != TAG_END)
00115         {
00116             mask = (dfilter_mask_t) map->src.val;
00117             if ((map->src.tag == tag) && ((mask & (dfilter_mask_t)val) == mask))
00118             {
00119                 tag = map->dst.tag;
00120                 val = map->dst.val;
00121                 break;
00122             }
00123             /* TAG_ANY matches anything */
00124             if (map->src.tag == TAG_ANY)
00125                 break;
00126             map++;
00127         }
00128
00129
00130         if (map->src.tag != TAG_END)
00131             dnotify(f->target, tag, val);
00132     }
00133     else
00134         dnotify(f->target, tag, val);
00135 }
00136
00137
00138 #define FILTER_MAGIC_ACTIVE 0xAA
00139
00143 void filter_init(DFilter *f, const DFilterMap *map, bool masked, DNotifier *source, DNotifier *target)
00144 {
00145     // Init instance
00146     if (masked)
00147         f->update = (update_filter_ptr)filter_mask_update;
00148     else
00149         f->update = (update_filter_ptr)filter_update;
00150
00151     /* set filter map and target */
00152     f->map = map;
00153     f->target = target;
00154
00155     /* these ensure that the filter is not inserted in more than one list */
00156     ASSERT(f->magic != FILTER_MAGIC_ACTIVE);
00157     DB(f->magic = FILTER_MAGIC_ACTIVE;)
00158
00159     /* Add the filter to source filter list */
00160     ADDTAIL(&source->targets, &f->link);
00161 }


BeRTOS: dnotifier.h File Reference

  • dt
Data Structures | Defines | Typedefs | Functions
dnotifier.h File Reference

Notifier obj (interface). More...

#include <cfg/debug.h>
#include <dt/dtag.h>
#include <struct/list.h>

Go to the source code of this file.

Data Structures

struct | DNotifier
Base object for receive and forward messages. More...
struct | DFilterMap
Map for messages. More...
struct | DFilter
A filter is an interface between two notifier. More...

Defines

#define | DCONNECT(src, tgt, map, opt)
Macro that connect src notifier to tgt using map and passing opt for filtering option.

Typedefs

typedef unsigned int | dfilter_mask_t
Type for filter-mask checking.

Functions

void | filter_init (DFilter *f, const DFilterMap *map, bool masked, DNotifier *source, DNotifier *target)
Filter init.
void | filter_update (DFilter *f, dtag_t tag, dval_t val)
Filter update function without masking capabilities.
void | filter_mask_update (DFilter *f, dtag_t tag, dval_t val)
Filter update function with masking capabilities.
void | notifier_init (DNotifier *n)
Notifier init.
void | dnotify (DNotifier *target, dtag_t tag, dval_t val)
Macro to notify the target object.
void | dnotify_targets (DNotifier *target, dtag_t tag, dval_t val)
Macro to notify all the targets of target object.

Detailed Description

Notifier obj (interface).

Author:
Bernie Innocenti <bernie@codewiz.org>
Francesco Sacchi <batt@develer.com>

Definition in file dnotifier.h.

Define Documentation

#define DCONNECT | ( | src,
 |  | tgt,
 |  | map,
 |  | opt
 | ) |
Value:
do { \
        static DFilter _filter_; /* Declare a filter */ \
        filter_init(&(_filter_), map, opt, src, tgt); /* Init it. */ \
    } while (0)

Macro that connect src notifier to tgt using map and passing opt for filtering option.

It declares a static filter to achieve connection and messages translation.

Note:
Due its static filter declaration, DCONNECT MUST NOT be used inside loops or in functions called multiple times. Failing to do so will lead to unpredictable connections between notifiers.

Definition at line 143 of file dnotifier.h.

Function Documentation

void filter_init | ( | DFilter * | f,
 |  | const DFilterMap * | map,
 |  | bool | masked,
 |  | DNotifier * | source,
 |  | DNotifier * | target
 | ) |  |

Filter init.

Filter init.

If masked is true, all the fields value in map must be interpreted as a mask of bits.

Definition at line 143 of file dnotifier.c.

void filter_mask_update | ( | DFilter * | f,
 |  | dtag_t | tag,
 |  | dval_t | val
 | ) |  |

Filter update function with masking capabilities.

Filter update function with masking capabilities.

If a match is found change them to the corresponding ones in the map. If map is NULL the filter is trasparent and all messages sent to filter will be forwarded to its target.

Definition at line 106 of file dnotifier.c.

void filter_update | ( | DFilter * | f,
 |  | dtag_t | tag,
 |  | dval_t | val
 | ) |  |

Filter update function without masking capabilities.

Filter update function without masking capabilities.

If a match is found change them to the corresponding ones in the map. If map is NULL the filter is trasparent and all messages sent to filter will be forwarded to its target.

Definition at line 70 of file dnotifier.c.


BeRTOS: dnotifier.h Source File

  • dt
dnotifier.h
Go to the documentation of this file.
00001
00038 #ifndef DT_DNOTIFIER_H
00039 #define DT_DNOTIFIER_H
00040
00041 #include <cfg/debug.h>
00042
00043 #include <dt/dtag.h>
00044 #include <struct/list.h>
00045
00046 //Fwd declaretion.
00047 struct DNotifier;
00048 struct DFilter;
00049
00050 typedef void (* update_func_ptr)(struct DNotifier *, dtag_t, dval_t);
00051 typedef void (* update_filter_ptr)(struct DFilter *, dtag_t, dval_t);
00052
00058 typedef struct DNotifier
00059 {
00061     update_func_ptr update;
00062
00064     List targets;
00065 } DNotifier;
00066
00071 typedef struct DFilterMap
00072 {
00073     DTagItem src;
00074     DTagItem dst;
00075 } DFilterMap;
00076
00077
00082 typedef struct DFilter
00083 {
00085     Node link;
00086
00088     DNotifier *target;
00089
00091     update_filter_ptr update;
00092
00094     const DFilterMap *map;
00095
00097     DB(uint8_t magic;)
00098 } DFilter;
00099
00101 typedef unsigned int dfilter_mask_t;
00102
00104 void filter_init(DFilter *f, const DFilterMap *map, bool masked, DNotifier *source, DNotifier *target);
00105
00107 void filter_update(DFilter *f, dtag_t tag, dval_t val);
00108
00110 void filter_mask_update(DFilter *f, dtag_t tag, dval_t val);
00111
00113 void notifier_init(DNotifier *n);
00114
00115
00119 INLINE void dnotify(DNotifier *target, dtag_t tag, dval_t val)
00120 {
00121     if (target)
00122         target->update(target, tag, val);
00123 }
00124
00128 INLINE void dnotify_targets(DNotifier *target, dtag_t tag, dval_t val)
00129 {
00130     DFilter *f;
00131     if (!LIST_EMPTY(&target->targets))
00132         FOREACH_NODE(f, &target->targets)
00133             f->update(f, tag, val);
00134 }
00135
00136
00143 #define DCONNECT(src, tgt, map, opt) \
00144     do { \
00145         static DFilter _filter_; /* Declare a filter */ \
00146         filter_init(&(_filter_), map, opt, src, tgt); /* Init it. */ \
00147     } while (0)
00148
00149
00150 #endif /* DT_DNOTIFIER_H */


BeRTOS: dtag.h File Reference

  • dt
Data Structures | Defines | Typedefs | Enumerations
dtag.h File Reference

Tags interface. More...

#include <cfg/macros.h>

Go to the source code of this file.

Data Structures

struct | DTagItem
This is the basic message structure used by all dnotifiers. More...

Defines

#define | TAG_END_MARKER {{TAG_END, 0}, {TAG_END, 0}}
Marker to indicate the end of a map for message filtering/translating.

Typedefs

typedef iptr_t | dval_t
Type for values associated with tags.
typedef const_iptr_t | const_dval_t
Type for constant values associated with tags.

Enumerations

enum | dtag_t
Type for tag.

Detailed Description

Tags interface.

This module contains the base message definitions and the list of all available tags.

Author:
Bernie Innocenti <bernie@codewiz.org>
Francesco Sacchi <batt@develer.com>

Definition in file dtag.h.

Typedef Documentation

typedef const_iptr_t const_dval_t

Type for constant values associated with tags.

Definition at line 83 of file dtag.h.

typedef iptr_t dval_t

Type for values associated with tags.

Definition at line 80 of file dtag.h.


BeRTOS: dtag.h Source File

  • dt
dtag.h
Go to the documentation of this file.
00001
00040 /*#*
00041  *#* $Log$
00042  *#* Revision 1.2  2006/07/19 12:56:26  bernie
00043  *#* Convert to new Doxygen style.
00044  *#*
00045  *#* Revision 1.1  2005/11/04 18:26:38  bernie
00046  *#* Import into DevLib.
00047  *#*
00048  *#* Revision 1.8  2005/06/07 15:22:29  batt
00049  *#* Add const_dval_t.
00050  *#*
00051  *#* Revision 1.7  2005/06/06 17:42:23  batt
00052  *#* Add error tag TAG_ERROR.
00053  *#*
00054  *#* Revision 1.6  2005/06/06 12:45:33  batt
00055  *#* Add TAG_NONE tag.
00056  *#*
00057  *#* Revision 1.5  2005/06/06 11:04:12  batt
00058  *#* Add some comments.
00059  *#*
00060  *#* Revision 1.4  2005/05/31 11:09:52  batt
00061  *#* Add some tags.
00062  *#*
00063  *#* Revision 1.3  2005/05/26 14:55:12  batt
00064  *#* Add form_processTime; change form_kbdProcess to form_processKey.
00065  *#*
00066  *#* Revision 1.2  2005/05/26 14:43:33  batt
00067  *#* Add new message filter interface.
00068  *#*
00069  *#* Revision 1.1  2005/05/26 08:32:53  batt
00070  *#* Add new Develer widget system :)
00071  *#*
00072  *#*/
00073
00074 #ifndef DT_DTAG_H
00075 #define DT_DTAG_H
00076
00077 #include <cfg/macros.h>
00078
00080 typedef iptr_t dval_t;
00081
00083 typedef const_iptr_t const_dval_t;
00084
00086 typedef enum dtag_t
00087 {
00088     TAG_END = 0,
00089     TAG_NONE,
00090     TAG_ANY,
00091     TAG_SETVALUE,
00092     TAG_UP,
00093     TAG_DOWN,
00094     TAG_START,
00095     TAG_STOP,
00096     TAG_TOGGLE,
00097     TAG_KEY,
00098     TAG_TIME,
00099     TAG_ERROR,
00100 } dtag_t;
00101
00103 typedef struct DTagItem
00104 {
00105     dtag_t tag;
00106     dval_t val;
00107 } DTagItem;
00108
00110 #define TAG_END_MARKER {{TAG_END, 0}, {TAG_END, 0}}
00111 #endif


BeRTOS: dwidget.c File Reference

  • dt
Functions
dwidget.c File Reference

Widget (implementation). More...

#include <dt/dwidget.h>
#include <dt/dnotifier.h>

Go to the source code of this file.

Functions

void widget_init (DWidget *w, dpos_t pos, dpos_t size, dcontext_t *context)
Init the widget of pos and size on the drawing context.

Detailed Description

Widget (implementation).

A widget is typically a graphic object on a device. Its proproperties are the position, the size and a context on which the widget is drawn.

Author:
Bernie Innocenti <bernie@codewiz.org>
Francesco Sacchi <batt@ðeveler.com>

Definition in file dwidget.c.


BeRTOS: dwidget.c Source File

  • dt
dwidget.c
Go to the documentation of this file.
00001
00041 /*#*
00042  *#* $Log$
00043  *#* Revision 1.2  2006/07/19 12:56:26  bernie
00044  *#* Convert to new Doxygen style.
00045  *#*
00046  *#* Revision 1.1  2005/11/04 18:26:38  bernie
00047  *#* Import into DevLib.
00048  *#*
00049  *#* Revision 1.3  2005/06/06 11:04:12  batt
00050  *#* Add some comments.
00051  *#*
00052  *#* Revision 1.2  2005/05/26 14:44:10  batt
00053  *#* Abstract widget from layer: use context.
00054  *#*
00055  *#* Revision 1.1  2005/05/26 08:32:53  batt
00056  *#* Add new Develer widget system :)
00057  *#*
00058  *#*/
00059
00060 #include <dt/dwidget.h>
00061 #include <dt/dnotifier.h>
00062
00066 void widget_init(DWidget *w, dpos_t pos, dpos_t size, dcontext_t *context)
00067 {
00068     // Init superclass
00069     notifier_init(&w->notifier);
00070
00071     // Init instance
00072     w->pos = pos;
00073     w->size = size;
00074     w->context = context;
00075 }


BeRTOS: dwidget.h File Reference

  • dt
Data Structures | Typedefs | Functions
dwidget.h File Reference

Widget (interface). More...

#include <dt/dnotifier.h>
#include <cfg/compiler.h>

Go to the source code of this file.

Data Structures

struct | DWidget
Widget definition. More...

Typedefs

typedef uint8_t | dpos_t
Widget position.
typedef iptr_t | dcontext_t
Widget drawing context.

Functions

void | widget_init (DWidget *w, dpos_t pos, dpos_t size, dcontext_t *context)
Init the widget of pos and size on the drawing context.

Detailed Description

Widget (interface).

Author:
Bernie Innocenti <bernie@codewiz.org>
Francesco Sacchi <batt@develer.com>

Definition in file dwidget.h.

Typedef Documentation

typedef iptr_t dcontext_t

Widget drawing context.

Definition at line 49 of file dwidget.h.

typedef uint8_t dpos_t

Widget position.

Definition at line 46 of file dwidget.h.


BeRTOS: dwidget.h Source File

  • dt
dwidget.h
Go to the documentation of this file.
00001
00039 #ifndef DT_DWIDGET_H
00040 #define DT_DWIDGET_H
00041
00042 #include <dt/dnotifier.h>
00043 #include <cfg/compiler.h>
00044
00046 typedef uint8_t dpos_t;
00047
00049 typedef iptr_t dcontext_t;
00050
00052 typedef struct DWidget
00053 {
00054     DNotifier notifier;
00055
00056     dpos_t pos;
00057     dpos_t size;
00058     dcontext_t *context;
00059 } DWidget;
00060
00061
00062 void widget_init(DWidget *w, dpos_t pos, dpos_t size, dcontext_t *context);
00063
00064 #endif


BeRTOS: editbool.c File Reference

  • dt
Functions
editbool.c File Reference

Edit bool widget (implementation). More...

#include "editbool.h"
#include <dt/dtag.h>
#include <drv/lcd_text.h>

Go to the source code of this file.

Functions

void | editbool_init (DEditBool *e, dpos_t pos, dpos_t size, dcontext_t *context, bool *value, const char *true_string, const char *false_string)
Init widget.
void | editbool_update (DEditBool *e, dtag_t tag, dval_t _val)
Handle the messages (edit the bool).
void | editbool_draw (DEditBool *e)
Draw the string on the context.

Detailed Description

Edit bool widget (implementation).

This widget handles boolean editing. The boolean value will be displayed using two strings: one when the bool is false and one when it's true.

Author:
Francesco Sacchi <batt@ðeveler.com>

Definition in file editbool.c.


BeRTOS: editbool.c Source File

  • dt
editbool.c
Go to the documentation of this file.
00001
00040 #include "editbool.h"
00041 #include <dt/dtag.h>
00042
00043 #include <drv/lcd_text.h>
00044
00048 void editbool_init(DEditBool *e, dpos_t pos, dpos_t size, dcontext_t *context, bool *value, const char *true_string, const char *false_string)
00049 {
00050     // Initialize superclass
00051     widget_init(&e->widget, pos, size, context);
00052
00053     // Override superclass methods
00054     e->widget.notifier.update = (update_func_ptr)editbool_update;
00055
00056     // Init instance
00057     e->value = value;
00058     e->true_string = true_string;
00059     e->false_string = false_string;
00060     e->draw = editbool_draw;
00061 }
00062
00066 void editbool_update(DEditBool *e, dtag_t tag, dval_t _val)
00067 {
00068     bool changed = false;
00069
00070     switch (tag)
00071     {
00072     case TAG_SETVALUE:
00073         *e->value = (bool)_val;
00074         changed = true;
00075         break;
00076
00077     case TAG_TOGGLE:
00078         *e->value = !*e->value;
00079         changed = true;
00080         break;
00081     default:
00082         break;
00083     }
00084
00085     if (changed)
00086     {
00087         e->draw(e);
00088         dnotify_targets(&e->widget.notifier, TAG_SETVALUE, (dval_t)*e->value);
00089     }
00090 }
00091
00095 void editbool_draw(DEditBool *e)
00096 {
00097     lcd_printf((Layer *)e->widget.context, (lcdpos_t)e->widget.pos, LCD_NORMAL, "%*s", (int)e->widget.size , *e->value? e->true_string: e->false_string);
00098 }


BeRTOS: editbool.h File Reference

  • dt
Functions
editbool.h File Reference

Edit bool widget (interface). More...

#include <dt/dwidget.h>
#include <dt/dtag.h>

Go to the source code of this file.

Functions

void | editbool_init (DEditBool *e, dpos_t pos, dpos_t size, dcontext_t *context, bool *val, const char *true_str, const char *false_str)
Init widget.
void | editbool_update (DEditBool *e, dtag_t tag, dval_t val)
Handle the messages (edit the bool).
void | editbool_draw (DEditBool *e)
Draw the string on the context.

Detailed Description

Edit bool widget (interface).

Author:
Francesco Sacchi <batt@develer.com>

Definition in file editbool.h.


BeRTOS: editbool.h Source File

  • dt
editbool.h
Go to the documentation of this file.
00001
00037 #ifndef DT_EDITBOOL_H
00038 #define DT_EDITBOOL_H
00039
00040 #include <dt/dwidget.h>
00041 #include <dt/dtag.h>
00042
00043 typedef struct DEditBool
00044 {
00045     DWidget widget;
00046     bool *value;
00047     const char *true_string;
00048     const char *false_string;
00049     void (*draw)(struct DEditBool *);
00050 } DEditBool;
00051
00052 void editbool_init(DEditBool *e, dpos_t pos, dpos_t size, dcontext_t *context, bool *val, const char *true_str, const char *false_str);
00053 void editbool_update(DEditBool *e, dtag_t tag, dval_t val);
00054 void editbool_draw(DEditBool *e);
00055
00056
00057 #endif /* DT_EDITBOOL_H */


BeRTOS: editint.c File Reference

  • dt
Functions
editint.c File Reference

Integer edit widget (implementation). More...

#include "editint.h"
#include <cfg/macros.h>
#include <dt/dwidget.h>
#include <dt/dtag.h>
#include <dt/dnotifier.h>
#include <drv/lcd_text.h>

Go to the source code of this file.

Functions

void | editint_init (DEditInt *e, dpos_t pos, dpos_t size, dcontext_t *context, int *value, int min, int max)
Init.
void | editint_update (DEditInt *e, dtag_t tag, dval_t _val)
Handle the messages (edit the int).
void | editint_draw (DEditInt *e)
Draw the integer on the context.

Detailed Description

Integer edit widget (implementation).

Author:
Bernie Innocenti <bernie@codewiz.org>
Francesco Sacchi <batt@develer.com>

Definition in file editint.c.


BeRTOS: editint.c Source File

  • dt
editint.c
Go to the documentation of this file.
00001
00038 #include "editint.h"
00039
00040 #include <cfg/macros.h>
00041
00042 #include <dt/dwidget.h>
00043 #include <dt/dtag.h>
00044 #include <dt/dnotifier.h>
00045
00046 #include <drv/lcd_text.h>
00047
00051 void editint_init(DEditInt *e, dpos_t pos, dpos_t size, dcontext_t *context, int *value, int min, int max)
00052 {
00053     // Initialize superclass
00054     widget_init(&e->widget, pos, size, context);
00055
00056     // Override superclass methods
00057     e->widget.notifier.update = (update_func_ptr)editint_update;
00058
00059     // Init instance
00060     e->value = value;
00061     e->min = min;
00062     e->max = max;
00063     e->style = EDIS_DEFAULT;
00064     e->draw = editint_draw;
00065 }
00066
00070 void editint_update(DEditInt *e, dtag_t tag, dval_t _val)
00071 {
00072     bool changed = false;
00073     int val = (int)_val;
00074
00075     switch (tag)
00076     {
00077     case TAG_SETVALUE:
00078         *e->value = MINMAX(e->min, val, e->max);
00079         changed = true;
00080         break;
00081
00082     /* Increments the integer by val */
00083     case TAG_UP:
00084         if (e->style & EDIS_WRAP)
00085         {
00086             if (*e->value + val > e->max)
00087                 *e->value = (*e->value + val - e->min) % (e->max - e->min + 1) + e->min;
00088             else
00089                 *e->value += val;
00090         }
00091         else
00092             *e->value = MIN(*e->value + val, e->max);
00093         changed = true;
00094         break;
00095     /* Decrements the integer by val */
00096     case TAG_DOWN:
00097         if (e->style & EDIS_WRAP)
00098         {
00099             if (*e->value - val < e->min)
00100                 *e->value = e->max - (e->max - (*e->value - val)) % (e->max - e->min + 1);
00101             else
00102                 *e->value -= val;
00103         }
00104         else
00105             *e->value = MAX(*e->value - val, e->min);
00106         changed = true;
00107         break;
00108
00109     default:
00110         break;
00111     }
00112
00113     if (changed)
00114     {
00115         e->draw(e);
00116         dnotify_targets(&e->widget.notifier, TAG_SETVALUE, (dval_t)*e->value);
00117     }
00118 }
00119
00123 void editint_draw(DEditInt *e)
00124 {
00125     lcd_printf((Layer *)e->widget.context, (lcdpos_t)e->widget.pos, LCD_NORMAL,"%*d", (int)e->widget.size, *e->value);
00126 }


BeRTOS: editint.h File Reference

  • dt
Typedefs | Functions
editint.h File Reference

Integer edit (interface). More...

#include <dt/dwidget.h>
#include <dt/dtag.h>
#include <drv/lcd_text.h>
#include <cfg/compiler.h>
#include <cfg/macros.h>

Go to the source code of this file.

Typedefs

typedef uint16_t | dstyle_t
Type for edit style.

Functions

void | editint_init (DEditInt *e, dpos_t pos, dpos_t size, dcontext_t *context, int *value, int min, int max)
Init.
void | editint_update (DEditInt *e, dtag_t tag, dval_t val)
Handle the messages (edit the int).
void | editint_draw (DEditInt *e)
Draw the integer on the context.

Detailed Description

Integer edit (interface).

Author:
Bernie Innocenti <bernie@codewiz.org>
Francesco Sacchi <batt@develer.com>

Definition in file editint.h.


BeRTOS: editint.h Source File

  • dt
editint.h
Go to the documentation of this file.
00001
00039 /*#*
00040  *#* $Log$
00041  *#* Revision 1.2  2006/07/19 12:56:26  bernie
00042  *#* Convert to new Doxygen style.
00043  *#*
00044  *#* Revision 1.1  2005/11/04 18:26:38  bernie
00045  *#* Import into DevLib.
00046  *#*
00047  *#* Revision 1.3  2005/06/10 15:46:09  batt
00048  *#* Add EDIS_WRAP style that wrap around min and max.
00049  *#*
00050  *#* Revision 1.2  2005/05/26 14:44:10  batt
00051  *#* Abstract widget from layer: use context.
00052  *#*
00053  *#* Revision 1.1  2005/05/26 08:32:53  batt
00054  *#* Add new Develer widget system :)
00055  *#*
00056  *#*/
00057
00058 #ifndef DT_EDITINT_H
00059 #define DT_EDITINT_H
00060
00061 #include <dt/dwidget.h>
00062 #include <dt/dtag.h>
00063 #include <drv/lcd_text.h>
00064
00065 #include <cfg/compiler.h>
00066 #include <cfg/macros.h>
00067
00068
00069 #define EDIS_DEFAULT        0
00070 #define EDIS_CURSORLEFT     BV(0)
00071 #define EDIS_WRAP           BV(1)
00072
00074 typedef uint16_t dstyle_t;
00075
00076 typedef struct DEditInt
00077 {
00078     DWidget widget;
00079
00080     int *value;
00081     int min;
00082     int max;
00083     dstyle_t style;
00084     void (*draw)(struct DEditInt *);
00085
00086 } DEditInt;
00087
00088 void editint_init(DEditInt *e, dpos_t pos, dpos_t size, dcontext_t *context, int *value, int min, int max);
00089 void editint_update(DEditInt *e, dtag_t tag, dval_t val);
00090 void editint_draw(DEditInt *e);
00091
00092 #endif


BeRTOS: eeprom.c File Reference

  • drv
Defines | Functions | Variables
eeprom.c File Reference

Driver for the 24xx16 and 24xx256 I2C EEPROMS (implementation) More...

#include "eeprom.h"
#include "cfg/cfg_i2c.h"
#include "cfg/cfg_eeprom.h"
#include <cfg/log.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cpu/attr.h>
#include <drv/i2c.h>
#include <string.h>

Go to the source code of this file.

Defines

#define | EEPROM_ID 0xA0
EEPROM ID code.
#define | EEPROM_ADDR(x) (EEPROM_ID | (((uint8_t)((x) & 0x07)) << 1))
This macros form the correct slave address for EEPROMs.

Functions

bool | eeprom_erase (Eeprom *eep, e2addr_t addr, e2_size_t size)
Erase EEPROM.
bool | eeprom_verify (Eeprom *eep, e2addr_t addr, const void *buf, size_t size)
Verify EEPROM.
void | eeprom_init_5 (Eeprom *eep, I2c *i2c, EepromType type, e2dev_addr_t addr, bool verify)
Initialize EEPROM module.

Variables

static const EepromInfo | mem_info []
Array used to describe EEPROM memory devices currently supported.

Detailed Description

Driver for the 24xx16 and 24xx256 I2C EEPROMS (implementation)

Author:
Stefano Fedrigo <aleph@develer.com>
Bernie Innocenti <bernie@codewiz.org>

Definition in file eeprom.c.

Function Documentation

bool eeprom_erase | ( | Eeprom * | eep,
 |  | e2addr_t | addr,
 |  | e2_size_t | size
 | ) |  |

Erase EEPROM.

Parameters:
eep | is the Kblock context.
addr | eeprom address where start to erase
size | number of byte to erase

Definition at line 117 of file eeprom.c.

void eeprom_init_5 | ( | Eeprom * | eep,
 |  | I2c * | i2c,
 |  | EepromType | type,
 |  | e2dev_addr_t | addr,
 |  | bool | verify
 | ) |  |

Initialize EEPROM module.

Parameters:
eep | is the Kblock context.
type | is the eeprom device we want to initialize (
See also:
EepromType)
Parameters:
i2c | context for i2c channel
addr | is the i2c devide address (usually pins A0, A1, A2).
verify | enable the write check.

Definition at line 334 of file eeprom.c.

bool eeprom_verify | ( | Eeprom * | eep,
 |  | e2addr_t | addr,
 |  | const void * | buf,
 |  | size_t | size
 | ) |  |

Verify EEPROM.

Parameters:
eep | is the Kblock context.
addr | eeprom address where start to verify.
buf | buffer of data to compare with eeprom data read.
size | number of byte to verify.

Definition at line 143 of file eeprom.c.


BeRTOS: eeprom.c Source File

  • drv
eeprom.c
Go to the documentation of this file.
00001
00039 #include "eeprom.h"
00040
00041 #include "cfg/cfg_i2c.h"
00042 #include "cfg/cfg_eeprom.h"
00043
00044 /* Define logging setting (for cfg/log.h module). */
00045 #define LOG_LEVEL         EEPROM_LOG_LEVEL
00046 #define LOG_FORMAT        EEPROM_LOG_FORMAT
00047 #include <cfg/log.h>
00048 #include <cfg/debug.h>
00049 #include <cfg/macros.h>  // MIN()
00050
00051 #include <cpu/attr.h>
00052
00053 #include <drv/i2c.h>
00054
00055 #include <string.h>  // memset()
00056
00060 #define EEPROM_ID  0xA0
00061
00065 #define EEPROM_ADDR(x) (EEPROM_ID | (((uint8_t)((x) & 0x07)) << 1))
00066
00067
00071 static const EepromInfo mem_info[] =
00072 {
00073     {
00074         /* 24XX08 */
00075         .has_dev_addr = false,
00076         .blk_size = 0x10,
00077         .e2_size = 0x400,
00078     },
00079     {
00080         /* 24XX16 */
00081         .has_dev_addr = false,
00082         .blk_size = 0x10,
00083         .e2_size = 0x800,
00084     },
00085     {
00086         /* 24XX256 */
00087         .has_dev_addr = true,
00088         .blk_size = 0x40,
00089         .e2_size = 0x8000,
00090     },
00091     {
00092         /* 24XX512 */
00093         .has_dev_addr = true,
00094         .blk_size = 0x80,
00095         .e2_size = 0x10000,
00096     },
00097     {
00098         /* 24XX1024 */
00099         .has_dev_addr = true,
00100         .blk_size = 0x100,
00101         .e2_size = 0x20000,
00102     },
00103
00104     /* Add other memories here */
00105 };
00106
00107 STATIC_ASSERT(countof(mem_info) == EEPROM_CNT);
00108
00109 #define CHUNCK_SIZE     16
00110
00117 bool eeprom_erase(Eeprom *eep, e2addr_t addr, e2_size_t size)
00118 {
00119     uint8_t tmp[CHUNCK_SIZE] = { [0 ... (CHUNCK_SIZE - 1)] = 0xFF };
00120
00121     while (size)
00122     {
00123         block_idx_t idx = addr / eep->blk.blk_size;
00124         size_t offset = addr % eep->blk.blk_size;
00125         size_t count = MIN(size, (e2_size_t)CHUNCK_SIZE);
00126         size_t ret_len = eep->blk.priv.vt->writeDirect((KBlock *)eep, idx, tmp, offset, count);
00127         size -= ret_len;
00128         addr += ret_len;
00129
00130         if (ret_len != count)
00131             return false;
00132     }
00133     return true;
00134 }
00135
00143 bool eeprom_verify(Eeprom *eep, e2addr_t addr, const void *buf, size_t size)
00144 {
00145     uint8_t verify_buf[CHUNCK_SIZE];
00146     while (size)
00147     {
00148         block_idx_t idx = addr / eep->blk.blk_size;
00149         size_t offset = addr % eep->blk.blk_size;
00150         size_t count = MIN(size, (size_t)CHUNCK_SIZE);
00151
00152         size_t ret_len = eep->blk.priv.vt->readDirect((KBlock *)eep, idx, verify_buf, offset, count);
00153
00154         if (ret_len != count)
00155         {
00156             LOG_ERR("Verify read fail.\n");
00157             return false;
00158         }
00159
00160         if (memcmp(buf, verify_buf, ret_len) != 0)
00161         {
00162             LOG_ERR("Data mismatch!\n");
00163             return false;
00164         }
00165
00166         size -= ret_len;
00167         addr += ret_len;
00168         buf = ((const char *)buf) + ret_len;
00169     }
00170     return true;
00171 }
00172
00173
00174 static size_t eeprom_write(KBlock *blk, block_idx_t idx, const void *buf, size_t offset, size_t size)
00175 {
00176     Eeprom *eep = EEPROM_CAST_KBLOCK(blk);
00177     e2dev_addr_t dev_addr;
00178     uint8_t addr_buf[2];
00179     uint8_t addr_len;
00180     uint32_t abs_addr = blk->blk_size * idx + offset;
00181
00182     STATIC_ASSERT(countof(addr_buf) <= sizeof(e2addr_t));
00183
00184     /* clamp size to memory limit (otherwise may roll back) */
00185     ASSERT(idx < blk->priv.blk_start + blk->blk_cnt);
00186     size = MIN(size, blk->blk_size - offset);
00187
00188     if (mem_info[eep->type].has_dev_addr)
00189     {
00190         dev_addr = eep->addr;
00191         addr_len = 2;
00192     }
00193     else
00194     {
00195         dev_addr = (e2dev_addr_t)((abs_addr >> 8) & 0x07);
00196         addr_len = 1;
00197     }
00198
00199     if (mem_info[eep->type].has_dev_addr)
00200     {
00201         addr_buf[0] = (abs_addr >> 8) & 0xFF;
00202         addr_buf[1] = (abs_addr & 0xFF);
00203     }
00204     else
00205     {
00206         dev_addr = (e2dev_addr_t)((abs_addr >> 8) & 0x07);
00207         addr_buf[0] = (abs_addr & 0xFF);
00208     }
00209
00210     i2c_start_w(eep->i2c, EEPROM_ADDR(dev_addr),  addr_len + size, I2C_STOP);
00211     i2c_write(eep->i2c, addr_buf, addr_len);
00212     i2c_write(eep->i2c, buf, size);
00213
00214     if (i2c_error(eep->i2c))
00215         return 0;
00216
00217     return size;
00218 }
00219
00220 static size_t eeprom_readDirect(struct KBlock *_blk, block_idx_t idx, void *_buf, size_t offset, size_t size)
00221 {
00222     Eeprom *blk = EEPROM_CAST_KBLOCK(_blk);
00223     uint8_t addr_buf[2];
00224     uint8_t addr_len;
00225     size_t rd_len = 0;
00226     uint8_t *buf = (uint8_t *)_buf;
00227     uint32_t abs_addr = mem_info[blk->type].blk_size * idx + offset;
00228
00229     STATIC_ASSERT(countof(addr_buf) <= sizeof(e2addr_t));
00230
00231     /* clamp size to memory limit (otherwise may roll back) */
00232     ASSERT(idx < blk->blk.priv.blk_start + blk->blk.blk_cnt);
00233     size = MIN(size, blk->blk.blk_size - offset);
00234
00235     e2dev_addr_t dev_addr;
00236     if (mem_info[blk->type].has_dev_addr)
00237     {
00238         dev_addr = blk->addr;
00239         addr_len = 2;
00240         addr_buf[0] = (abs_addr >> 8) & 0xFF;
00241         addr_buf[1] = (abs_addr & 0xFF);
00242     }
00243     else
00244     {
00245         dev_addr = (e2dev_addr_t)((abs_addr >> 8) & 0x07);
00246         addr_len = 1;
00247         addr_buf[0] = (abs_addr & 0xFF);
00248     }
00249
00250
00251     i2c_start_w(blk->i2c, EEPROM_ADDR(dev_addr),  addr_len, I2C_NOSTOP);
00252     i2c_write(blk->i2c, addr_buf, addr_len);
00253
00254     i2c_start_r(blk->i2c, EEPROM_ADDR(dev_addr), size, I2C_STOP);
00255     i2c_read(blk->i2c, buf, size);
00256
00257     if (i2c_error(blk->i2c))
00258            return rd_len;
00259
00260     rd_len += size;
00261
00262     return rd_len;
00263 }
00264
00265 static size_t eeprom_writeDirect(KBlock *blk, block_idx_t idx, const void *buf, size_t offset, size_t size)
00266 {
00267     Eeprom *eep = EEPROM_CAST_KBLOCK(blk);
00268     if (!eep->verify)
00269         return eeprom_write(blk, idx, buf, offset, size);
00270     else
00271     {
00272         int retries = 5;
00273         while (retries--)
00274         {
00275             uint8_t verify_buf[CHUNCK_SIZE];
00276             size_t wr_len = 0;
00277             size_t len = 0;
00278             while (size)
00279             {
00280                 /* Split read in smaller pieces */
00281                 size_t count = MIN(size, (size_t)CHUNCK_SIZE);
00282                 if ((wr_len = eeprom_write(blk, idx, buf, offset, count)) != 0)
00283                 {
00284                     if (eeprom_readDirect(blk, idx, verify_buf, offset, count) != wr_len)
00285                     {
00286                         LOG_ERR("Verify read fail.\n");
00287                         return 0;
00288                     }
00289                     else if (memcmp(buf, verify_buf, wr_len) != 0)
00290                     {
00291                         LOG_ERR("Data mismatch!\n");
00292                         continue;
00293                     }
00294                 }
00295                 else
00296                 {
00297                     LOG_ERR("Write fail.\n");
00298                     return 0;
00299                 }
00300                 size -= wr_len;
00301                 len += wr_len;
00302                 buf = ((const char *)buf) + wr_len;
00303             }
00304             return len;
00305         }
00306     }
00307
00308     return 0;
00309 }
00310
00311 static int kblockEeprom_dummy(UNUSED_ARG(struct KBlock *,b))
00312 {
00313     return 0;
00314 }
00315
00316
00317 static const KBlockVTable eeprom_unbuffered_vt =
00318 {
00319     .readDirect = eeprom_readDirect,
00320     .writeDirect = eeprom_writeDirect,
00321
00322     .error = kblockEeprom_dummy,
00323     .clearerr = (kblock_clearerr_t)kblockEeprom_dummy,
00324 };
00325
00334 void eeprom_init_5(Eeprom *eep, I2c *i2c, EepromType type, e2dev_addr_t addr, bool verify)
00335 {
00336     ASSERT(type < EEPROM_CNT);
00337
00338     memset(eep, 0, sizeof(*eep));
00339     DB(eep->blk.priv.type = KBT_EEPROM);
00340
00341     eep->type = type;
00342     eep->addr = addr;
00343     eep->i2c = i2c;
00344     eep->verify = verify;
00345
00346     eep->blk.blk_size = mem_info[type].blk_size;
00347     eep->blk.blk_cnt = mem_info[type].e2_size / mem_info[type].blk_size;
00348     eep->blk.priv.flags |= KB_PARTIAL_WRITE;
00349     eep->blk.priv.vt = &eeprom_unbuffered_vt;
00350 }
00351
00352


BeRTOS: eeprom.h File Reference

  • drv
Data Structures | Defines | Typedefs | Enumerations | Functions
eeprom.h File Reference

Driver for the 24xx16 and 24xx256 I2C EEPROMS. More...

#include "cfg/cfg_eeprom.h"
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <drv/i2c.h>
#include <io/kblock.h>
#include <io/kfile.h>
#include <io/kfile_block.h>
#include <cpu/attr.h>

Go to the source code of this file.

Data Structures

struct | Eeprom
Describe an EEPROM context, used by the driver to access the single device. More...
struct | EepromInfo
Descrive all EEPROM informations needed by the driver. More...

Defines

#define | KBT_EEPROM MAKE_ID('E', 'E', 'P', 'R')
ID for eeproms.
#define | e2addr(type, field) ((e2addr_t)&(((type *)0)->field))
Macro for E2Layout offset calculation.

Typedefs

typedef uint8_t | e2dev_addr_t
On the same I2C bus can live more than one EEPROM device.
typedef uint16_t | e2addr_t
Type for EEPROM addresses.
typedef uint16_t | e2blk_size_t
Type for EEPROM block size.
typedef uint32_t | e2_size_t
Type for accessing EEPROM whole size.

Enumerations

enum | EepromType
Values for Eeprom types.

Functions

Eeprom * | EEPROM_CAST_KBLOCK (KBlock *blk)
Convert + ASSERT from generic KFile to Eeprom.
bool | eeprom_erase (Eeprom *eep, e2addr_t addr, e2_size_t count)
Erase EEPROM.
void | eeprom_init_5 (Eeprom *eep, I2c *i2c, EepromType type, e2dev_addr_t addr, bool verify)
Initialize EEPROM module.

Detailed Description

Driver for the 24xx16 and 24xx256 I2C EEPROMS.

Author:
Stefano Fedrigo <aleph@develer.com>
Bernie Innocenti <bernie@codewiz.org>

Definition in file eeprom.h.

Define Documentation

#define e2addr | ( | type,
 |  | field
 | ) | ((e2addr_t)&(((type *)0)->field))

Macro for E2Layout offset calculation.

Note:
We can't just use offsetof() here because we could use non-constant expressions to access array elements.
'type' is the structure type holding eeprom layout and must be defined in user files.

Definition at line 137 of file eeprom.h.

Typedef Documentation

typedef uint8_t e2dev_addr_t

On the same I2C bus can live more than one EEPROM device.

Each device can be addressed by one or more pins.

Definition at line 86 of file eeprom.h.

Function Documentation

bool eeprom_erase | ( | Eeprom * | eep,
 |  | e2addr_t | addr,
 |  | e2_size_t | size
 | ) |  |

Erase EEPROM.

Parameters:
eep | is the Kblock context.
addr | eeprom address where start to erase
size | number of byte to erase

Definition at line 117 of file eeprom.c.

void eeprom_init_5 | ( | Eeprom * | eep,
 |  | I2c * | i2c,
 |  | EepromType | type,
 |  | e2dev_addr_t | addr,
 |  | bool | verify
 | ) |  |

Initialize EEPROM module.

Parameters:
eep | is the Kblock context.
type | is the eeprom device we want to initialize (
See also:
EepromType)
Parameters:
i2c | context for i2c channel
addr | is the i2c devide address (usually pins A0, A1, A2).
verify | enable the write check.

Definition at line 334 of file eeprom.c.


BeRTOS: eeprom.h Source File

  • drv
eeprom.h
Go to the documentation of this file.
00001
00043 #ifndef DRV_EEPROM_H
00044 #define DRV_EEPROM_H
00045
00046 #include "cfg/cfg_eeprom.h"
00047
00048 #include <cfg/compiler.h>
00049 #include <cfg/debug.h>
00050
00051 #include <drv/i2c.h>
00052
00053 #include <io/kblock.h>
00054 #include <io/kfile.h>
00055 #include <io/kfile_block.h>
00056
00057 #include <cpu/attr.h>
00058
00059 #if COMPILER_C99
00060     #define eeprom_init(...)          PP_CAT(eeprom_init ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__)
00061     #define eeprom_verify(...)        PP_CAT(eeprom_verify ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__)
00062 #else
00063     #define eeprom_init(args...)      PP_CAT(eeprom_init ## _, COUNT_PARMS(args)) (args)
00064     #define eeprom_verify(args...)    PP_CAT(eeprom_verify ## _, COUNT_PARMS(args)) (args)
00065 #endif
00066
00067
00071 typedef enum EepromType
00072 {
00073     EEPROM_24XX08,
00074     EEPROM_24XX16,
00075     EEPROM_24XX256,
00076     EEPROM_24XX512,
00077     EEPROM_24XX1024,
00078     EEPROM_CNT,
00079 } EepromType;
00080
00086 typedef uint8_t e2dev_addr_t;
00087
00092 typedef struct Eeprom
00093 {
00094     KBlock blk;
00095     I2c *i2c;
00096     EepromType type;
00097     e2dev_addr_t addr;
00098     bool verify;
00099 #if !CONFIG_EEPROM_DISABLE_OLD_API
00100     union {
00101         KFile fd;
00102         KFileBlock fdblk;
00103     } DEPRECATED;
00104 #endif /* !CONFIG_EEPROM_DISABLE_OLD_API */
00105 } Eeprom;
00106
00107 #if !CONFIG_EEPROM_DISABLE_OLD_API
00108     STATIC_ASSERT(offsetof(Eeprom, fd) == offsetof(Eeprom, fdblk.fd));
00109 #endif /* !CONFIG_EEPROM_DISABLE_OLD_API */
00110
00114 #define KBT_EEPROM MAKE_ID('E', 'E', 'P', 'R')
00115
00119 INLINE Eeprom * EEPROM_CAST_KBLOCK(KBlock *blk)
00120 {
00121     ASSERT(blk->priv.type == KBT_EEPROM);
00122     return (Eeprom *)blk;
00123 }
00124
00126 typedef uint16_t e2addr_t;
00127
00137 #define e2addr(type, field) ((e2addr_t)&(((type *)0)->field))
00138
00142 typedef uint16_t e2blk_size_t;
00143
00147 typedef uint32_t e2_size_t;
00148
00153 typedef struct EepromInfo
00154 {
00155     bool has_dev_addr;
00156     e2blk_size_t blk_size;
00157     e2_size_t e2_size;
00158 } EepromInfo;
00159
00160 bool eeprom_erase(Eeprom *eep, e2addr_t addr, e2_size_t count);
00161 bool eeprom_verify_4(Eeprom *eep, e2addr_t addr, const void *buf, size_t count);
00162 void eeprom_init_5(Eeprom *eep, I2c *i2c, EepromType type, e2dev_addr_t addr, bool verify);
00163
00164 #if !CONFIG_EEPROM_DISABLE_OLD_API
00165
00166 DEPRECATED INLINE bool eeprom_verify_3(Eeprom *eep, const void *buf, size_t count)
00167 {
00168     return eeprom_verify_4(eep, (e2addr_t)eep->fdblk.fd.seek_pos, buf, count);
00169 }
00170 DEPRECATED INLINE void eeprom_init_4(Eeprom *eep, EepromType type, e2dev_addr_t addr, bool verify)
00171 {
00172     eeprom_init_5(eep, &local_i2c_old_api, type, addr, verify);
00173     kfileblock_init(&eep->fdblk, &eep->blk);
00174 }
00175 #endif /* !CONFIG_EEPROM_DISABLE_OLD_API */
00176
00177 #endif /* DRV_EEPROM_H */


BeRTOS: emul.h File Reference

  • emul
emul.h File Reference

Qt-based emulator framework for embedded applications (interface) More...

#include <cfg/compiler.h>

Go to the source code of this file.

Detailed Description

Qt-based emulator framework for embedded applications (interface)

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file emul.h.


BeRTOS: emul.h Source File

  • emul
emul.h
Go to the documentation of this file.
00001
00040 /*#*
00041  *#* $Log$
00042  *#* Revision 1.4  2006/02/15 09:11:17  bernie
00043  *#* Add keyboard emulator.
00044  *#*
00045  *#* Revision 1.3  2006/01/23 23:12:08  bernie
00046  *#* Let Doxygen see through C++ protected section.
00047  *#*
00048  *#* Revision 1.2  2006/01/16 03:51:51  bernie
00049  *#* Fix boilerplate.
00050  *#*
00051  *#* Revision 1.1  2006/01/16 03:37:12  bernie
00052  *#* Add emulator skeleton.
00053  *#*
00054  *#*/
00055
00056 #ifndef EMUL_EMUL_H
00057 #define EMUL_EMUL_H
00058
00059 #include <cfg/compiler.h>
00060
00061 #if defined(__cplusplus) || defined(__doxygen__)
00062
00063 // fwd decls
00064 class QApplication;
00065 class EmulWin;
00066 class EmulPRT;
00067 class EmulLCD;
00068 class EmulKbd;
00069 class QCheckBox;
00070 class QSlider;
00071 class QLabel;
00072
00073 class Emulator
00074 {
00075 // data members
00076 public:
00077     QApplication  *emulApp;
00078     EmulWin       *emulWin;
00079
00080     EmulLCD       *emulLCD;
00081     EmulKbd       *emulKbd;
00082
00083 // construction
00084     Emulator(int &argc, char **argv);
00085     ~Emulator();
00086
00087 // public methods
00088     void quit();
00089 };
00090
00091 extern Emulator *emul;
00092
00093 #endif /* __cplusplus */
00094
00095 EXTERN_C void emul_init(int *argc, char *argv[]);
00096 EXTERN_C void emul_cleanup();
00097 EXTERN_C void emul_idle();
00098
00099 #endif /* EMUL_EMUL_H */
00100


BeRTOS: emulkbd.h File Reference

  • emul
emulkbd.h File Reference

QT-based widget for leyboard emulation (interface) More...

#include <QtGui/QFrame>
#include <QtGui/qpushbutton.h>

Go to the source code of this file.

Detailed Description

QT-based widget for leyboard emulation (interface)

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file emulkbd.h.


BeRTOS: emulkbd.h Source File

  • emul
emulkbd.h
Go to the documentation of this file.
00001
00040 #if !defined(EMULKBD_H)
00041 #define EMULKBD_H
00042
00043 #if defined (_MSC_VER) && (_MSC_VER > 1000)
00044 #pragma once
00045 #endif // _MSC_VER > 1000
00046
00047 #include <QtGui/QFrame>
00048
00049 // fwd decl
00050 class QGridLayout;
00051 class EmulKey;
00052
00053 class EmulKbd : public QFrame
00054 {
00055     Q_OBJECT
00056
00057 // Data members
00058 protected:
00059     QGridLayout *layout;
00060     int frame_width;
00061     int active_row;
00062
00063 // Construction
00064 public:
00065     EmulKbd(QWidget *parent = 0, Qt::WFlags f = 0);
00066     virtual ~EmulKbd();
00067
00068 // Public methods
00069     void addKey(const char *label, int keycode, int row, int col, int matrix_row = -1, int matrix_col = -1);
00070     void setRow(int row);
00071     int readCols(void);
00072
00073 // Protected methods
00074 protected:
00075     void setKey(int row, int col, bool on);
00076
00077 // Base class overrides
00078 protected:
00079     virtual QSizePolicy sizePolicy() const;
00080     virtual void resizeEvent(QResizeEvent *e);
00081     virtual bool event(QEvent *e);
00082
00083 // Friends
00084     friend class EmulKey;
00085 };
00086
00087
00088 // Private helper class for EmulKbd
00089 // NOTE: with protected inheritance, dynamic_cast<> does not work (gcc 2.96)
00090 #include <QtGui/qpushbutton.h>
00091 class EmulKey : public QPushButton
00092 {
00093     Q_OBJECT
00094
00095 // Data members
00096 protected:
00097     int row, col;
00098     int keycode;
00099
00100 // Construction
00101 public:
00102     EmulKey(EmulKbd *parent, const char *label, int keycode, int _row, int _col);
00103     virtual ~EmulKey();
00104
00105 // superclass overrides
00106     void setDown(bool enable);
00107
00108 protected slots:
00109     void keyPressed(void);
00110     void keyReleased(void);
00111
00112 // Friends
00113 public:
00114     friend class EmulKbd;
00115 };
00116
00117 #endif // !defined(EMULKBD_H)
00118


BeRTOS: emulwin.h File Reference

  • emul
emulwin.h File Reference

Main Qt window for embedded applications emulator (interface) More...

#include <QtGui/QMainWindow>

Go to the source code of this file.

Detailed Description

Main Qt window for embedded applications emulator (interface)

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file emulwin.h.


BeRTOS: emulwin.h Source File

  • emul
emulwin.h
Go to the documentation of this file.
00001
00040 /*#*
00041  *#* $Log$
00042  *#* Revision 1.4  2006/05/28 12:17:56  bernie
00043  *#* Drop almost all the Qt3 cruft.
00044  *#*
00045  *#* Revision 1.3  2006/02/20 02:00:39  bernie
00046  *#* Port to Qt 4.1.
00047  *#*
00048  *#* Revision 1.2  2006/01/16 03:51:51  bernie
00049  *#* Fix boilerplate.
00050  *#*
00051  *#* Revision 1.1  2006/01/16 03:37:12  bernie
00052  *#* Add emulator skeleton.
00053  *#*
00054  *#*/
00055
00056 #ifndef EMUL_EMULWIN_H
00057 #define EMUL_EMULWIN_H
00058
00059 #include <QtGui/QMainWindow>
00060
00061 // fwd decls
00062 class Emulator;
00063
00064 class EmulWin : public QMainWindow
00065 {
00066     Q_OBJECT
00067
00068 // construction
00069 public:
00070     EmulWin(Emulator *emul);
00071     ~EmulWin();
00072
00073 protected:
00074     void closeEvent(QCloseEvent *);
00075
00076 private slots:
00077     void about();
00078 };
00079
00080 #endif // EMUL_EMULWIN_H
00081


BeRTOS: entropy.h File Reference

  • sec
Data Structures | Defines | Functions
entropy.h File Reference

Entropy pool generic interface. More...

#include <cfg/compiler.h>
#include <cfg/debug.h>

Go to the source code of this file.

Data Structures

struct | EntropyPool
Sturct data of entropy pool. More...

Defines

#define | CONFIG_ENTROPY_NUM_SOURCES 8
Maximum number of different sources of entropy available in BeRTOS.

Functions

void | entropy_add (EntropyPool *e, int source_idx, const uint8_t *data, size_t len, int entropy)
Add some data samples containing entropy into the pool.
bool | entropy_seeding_ready (EntropyPool *ctx)
Check if the generator is ready to produce a new seed.
void | entropy_make_seed (EntropyPool *ctx, uint8_t *out, size_t len)
Generate a new seed of the specified length.

Detailed Description

Entropy pool generic interface.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file entropy.h.

Define Documentation

#define CONFIG_ENTROPY_NUM_SOURCES 8

Maximum number of different sources of entropy available in BeRTOS.

Increasing this value will likely make entropy pools use more RAM for their operations, so it should be kept to the minimum necessary for a given project.

Definition at line 50 of file entropy.h.

Function Documentation

void entropy_add | ( | EntropyPool * | e,
 |  | int | source_idx,
 |  | const uint8_t * | data,
 |  | size_t | len,
 |  | int | entropy
 | ) |  | [inline]

Add some data samples containing entropy into the pool.

the samples are in the buffer pointed by data for a total of len bytes. entropy is the number of bits of estimated entropy in the samples. source_idx is the index of the entropy source.

Definition at line 69 of file entropy.h.

void entropy_make_seed | ( | EntropyPool * | ctx,
 |  | uint8_t * | out,
 |  | size_t | len
 | ) |  | [inline]

Generate a new seed of the specified length.

Note:
This should not be abused to generate a very long seed, since the pool cannot hold lots of entropy.

Definition at line 92 of file entropy.h.


BeRTOS: entropy.h Source File

  • sec
entropy.h
Go to the documentation of this file.
00001
00038 #ifndef SEC_ENTROPY_H
00039 #define SEC_ENTROPY_H
00040
00041 #include <cfg/compiler.h>
00042 #include <cfg/debug.h>
00043
00050 #define CONFIG_ENTROPY_NUM_SOURCES   8
00051
00052 typedef struct EntropyPool
00053 {
00054     void (*add_entropy)(struct EntropyPool *ctx, int source_idx,
00055                         const uint8_t *data, size_t len,
00056                         int entropy);
00057     bool (*seeding_ready)(struct EntropyPool *ctx);
00058     void (*make_seed)(struct EntropyPool *ctx, uint8_t *out, size_t len);
00059
00060 } EntropyPool;
00061
00062
00069 INLINE void entropy_add(EntropyPool *e, int source_idx,
00070                  const uint8_t *data, size_t len,
00071                  int entropy)
00072 {
00073     ASSERT(e->add_entropy);
00074     e->add_entropy(e, source_idx, data, len, entropy);
00075 }
00076
00080 INLINE bool entropy_seeding_ready(EntropyPool *ctx)
00081 {
00082     ASSERT(ctx->seeding_ready);
00083     return ctx->seeding_ready(ctx);
00084 }
00085
00092 INLINE void entropy_make_seed(EntropyPool *ctx, uint8_t *out, size_t len)
00093 {
00094     ASSERT(ctx->make_seed);
00095     ctx->make_seed(ctx, out, len);
00096 }
00097
00098 #endif /* SEC_ENTROPY_H */


BeRTOS: eth.h File Reference

  • drv
Functions
eth.h File Reference

Ethernet standard descriptors. More...

#include <cpu/types.h>

Go to the source code of this file.

Functions

int | eth_addrIsZero (const uint8_t *addr)
Determine if ethernet address addr is a all zero.
int | eth_addrIsMcast (const uint8_t *addr)
Determine if ethernet address addr is a multicast address.
int | eth_addrIsLocal (const uint8_t *addr)
Determine if ethernet address addr is locally-assigned (IEEE 802).
bool | eth_addrIsBcast (const uint8_t *addr)
Determine if ethernet address addr is broadcast.
bool | eth_addrIsValid (const uint8_t *addr)
Check if the ethernet address addr is not all zero, is not a multicast address, and is not broadcast.
bool | eth_addrCmp (const uint8_t *addr1, const uint8_t *addr2)
Compare two ethernet addresses: addr1 and addr2, returns 0 if equal.

Detailed Description

Ethernet standard descriptors.

Author:
Andrea Righi <arighi@develer.com>

Definition in file eth.h.


BeRTOS: eth.h Source File

  • drv
eth.h
Go to the documentation of this file.
00001
00043 #ifndef DRV_ETH_H
00044 #define DRV_ETH_H
00045
00046 #include <cpu/types.h>
00047
00048 #define ETH_ADDR_LEN    6
00049 #define ETH_HEAD_LEN    14
00050 #define ETH_DATA_LEN    1500
00051 #define ETH_FRAME_LEN   (ETH_HEAD_LEN + ETH_DATA_LEN)
00052
00053 #define ETH_TYPE_IP 0x0800
00054
00055 typedef union Ethernet
00056 {
00057     struct
00058     {
00059         uint8_t  dst[ETH_ADDR_LEN];
00060         uint8_t  src[ETH_ADDR_LEN];
00061         uint16_t type;
00062         uint8_t data[0];
00063     };
00064     uint8_t raw[ETH_FRAME_LEN];
00065 } PACKED Ethernet;
00066
00070 INLINE int eth_addrIsZero(const uint8_t *addr)
00071 {
00072     return !(addr[0] | addr[1] | addr[2] |
00073          addr[3] | addr[4] | addr[5]);
00074 }
00075
00079 INLINE int eth_addrIsMcast(const uint8_t *addr)
00080 {
00081     return (0x01 & addr[0]);
00082 }
00083
00087 INLINE int eth_addrIsLocal(const uint8_t *addr)
00088 {
00089     return (0x02 & addr[0]);
00090 }
00091
00095 INLINE bool eth_addrIsBcast(const uint8_t *addr)
00096 {
00097     return (addr[0] & addr[1] & addr[2] &
00098         addr[3] & addr[4] & addr[5]) == 0xff;
00099 }
00100
00105 INLINE bool eth_addrIsValid(const uint8_t *addr)
00106 {
00107     return !eth_addrIsMcast(addr) && !eth_addrIsZero(addr);
00108 }
00109
00113 INLINE bool eth_addrCmp(const uint8_t *addr1, const uint8_t *addr2)
00114 {
00115     return !!((addr1[0] ^ addr2[0]) |
00116             (addr1[1] ^ addr2[1]) |
00117             (addr1[2] ^ addr2[2]) |
00118             (addr1[3] ^ addr2[3]) |
00119             (addr1[4] ^ addr2[4]) |
00120             (addr1[5] ^ addr2[5]));
00121 }
00122
00123 ssize_t eth_putFrame(const uint8_t *buf, size_t len);
00124 void eth_sendFrame(void);
00125
00126 size_t eth_getFrameLen(void);
00127 ssize_t eth_getFrame(uint8_t *buf, size_t len);
00128
00129 ssize_t eth_send(const uint8_t *buf, size_t len);
00130 ssize_t eth_recv(uint8_t *buf, size_t len);
00131
00132 int eth_init(void);
00133
00134 extern const uint8_t mac_addr[ETH_ADDR_LEN];
00135
00136 #endif /* DRV_ETH_H */


BeRTOS: eth_at91.c File Reference

  • cpu
  • arm
  • drv
eth_at91.c File Reference

EMAC driver for AT91SAM7X Family. More...

#include "cfg/cfg_eth.h"
#include <cfg/log.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <io/at91sam7.h>
#include <io/arm.h>
#include <cpu/power.h>
#include <cpu/types.h>
#include <cpu/irq.h>
#include <drv/timer.h>
#include <drv/eth.h>
#include <mware/event.h>
#include <string.h>
#include "eth_at91.h"

Go to the source code of this file.

Detailed Description

EMAC driver for AT91SAM7X Family.

Author:
Daniele Basile <asterix@develer.com>
Andrea Righi <arighi@develer.com>

Definition in file eth_at91.c.


BeRTOS: eth_at91.c Source File

  • cpu
  • arm
  • drv
eth_at91.c
Go to the documentation of this file.
00001
00039 #include "cfg/cfg_eth.h"
00040
00041 #define LOG_LEVEL  ETH_LOG_LEVEL
00042 #define LOG_FORMAT ETH_LOG_FORMAT
00043
00044 #include <cfg/log.h>
00045
00046 #include <cfg/debug.h>
00047 #include <cfg/log.h>
00048 #include <cfg/macros.h>
00049 #include <cfg/compiler.h>
00050
00051 #include <io/at91sam7.h>
00052 #include <io/arm.h>
00053
00054 #include <cpu/power.h>
00055 #include <cpu/types.h>
00056 #include <cpu/irq.h>
00057
00058 #include <drv/timer.h>
00059 #include <drv/eth.h>
00060
00061 #include <mware/event.h>
00062
00063 #include <string.h>
00064
00065 #include "eth_at91.h"
00066
00067 #define EMAC_RX_INTS    (BV(EMAC_RCOMP) | BV(EMAC_ROVR) | BV(EMAC_RXUBR))
00068 #define EMAC_TX_INTS    (BV(EMAC_TCOMP) | BV(EMAC_TXUBR) | BV(EMAC_RLEX))
00069
00070 /*
00071  * MAC address configuration (please change this in your project!).
00072  *
00073  * TODO: make this paramater user-configurable from the Wizard.
00074  */
00075 const uint8_t mac_addr[] = { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55 };
00076
00077 /* Silent Doxygen bug... */
00078 #ifndef __doxygen__
00079 /*
00080  * NOTE: this buffer should be declared as 'volatile' because it is read by the
00081  * hardware. However, this is accessed only via memcpy() that should guarantee
00082  * coherency when copying from/to buffers.
00083  */
00084 static uint8_t tx_buf[EMAC_TX_BUFFERS * EMAC_TX_BUFSIZ] ALIGNED(8);
00085 static volatile BufDescriptor tx_buf_tab[EMAC_TX_DESCRIPTORS] ALIGNED(8);
00086
00087 /*
00088  * NOTE: this buffer should be declared as 'volatile' because it is wrote by
00089  * the hardware. However, this is accessed only via memcpy() that should
00090  * guarantee coherency when copying from/to buffers.
00091  */
00092 static uint8_t rx_buf[EMAC_RX_BUFFERS * EMAC_RX_BUFSIZ] ALIGNED(8);
00093 static volatile BufDescriptor rx_buf_tab[EMAC_RX_DESCRIPTORS] ALIGNED(8);
00094 #endif
00095
00096 static int tx_buf_idx;
00097 static int tx_buf_offset;
00098 static int rx_buf_idx;
00099
00100 static Event recv_wait, send_wait;
00101
00102 static DECLARE_ISR(emac_irqHandler)
00103 {
00104     /* Read interrupt status and disable interrupts. */
00105     uint32_t isr = EMAC_ISR;
00106
00107     /* Receiver interrupt */
00108     if ((isr & EMAC_RX_INTS))
00109     {
00110         if (isr & BV(EMAC_RCOMP))
00111             event_do(&recv_wait);
00112         EMAC_RSR = EMAC_RX_INTS;
00113     }
00114     /* Transmitter interrupt */
00115     if (isr & EMAC_TX_INTS)
00116     {
00117         if (isr & BV(EMAC_TCOMP))
00118             event_do(&send_wait);
00119         EMAC_TSR = EMAC_TX_INTS;
00120     }
00121     AIC_EOICR = 0;
00122 }
00123
00124 /*
00125  * \brief Read contents of PHY register.
00126  *
00127  * \param reg PHY register number.
00128  *
00129  * \return Contents of the specified register.
00130  */
00131 static uint16_t phy_hw_read(reg8_t reg)
00132 {
00133     // PHY read command.
00134     EMAC_MAN = EMAC_SOF | EMAC_RW_READ | (NIC_PHY_ADDR << EMAC_PHYA_SHIFT)
00135             | ((reg  << EMAC_REGA_SHIFT) & EMAC_REGA) | EMAC_CODE;
00136
00137     // Wait until PHY logic completed.
00138     while (!(EMAC_NSR & BV(EMAC_IDLE)))
00139         cpu_relax();
00140
00141     // Get data from PHY maintenance register.
00142     return (uint16_t)(EMAC_MAN & EMAC_DATA);
00143 }
00144
00145 /*
00146  * \brief Write value to PHY register.
00147  *
00148  * \param reg PHY register number.
00149  * \param val Value to write.
00150  */
00151 static void phy_hw_write(reg8_t reg, uint16_t val)
00152 {
00153     // PHY write command.
00154     EMAC_MAN = EMAC_SOF | EMAC_RW_WRITE | (NIC_PHY_ADDR << EMAC_PHYA_SHIFT)
00155             | ((reg  << EMAC_REGA_SHIFT) & EMAC_REGA) | EMAC_CODE | val;
00156
00157     // Wait until PHY logic completed.
00158     while (!(EMAC_NSR & BV(EMAC_IDLE)))
00159         cpu_relax();
00160 }
00161
00162 static int emac_reset(void)
00163 {
00164     uint16_t phy_cr;
00165
00166     // Enable devices
00167     PMC_PCER = BV(PIOA_ID);
00168     PMC_PCER = BV(PIOB_ID);
00169     PMC_PCER = BV(EMAC_ID);
00170
00171     // Disable RMII and TESTMODE by disabling pull-ups.
00172     PIOB_PUDR = BV(PHY_COL_RMII_BIT) | BV(PHY_RXDV_TESTMODE_BIT);
00173
00174     // Disable PHY power down.
00175     PIOB_PER  = BV(PHY_PWRDN_BIT);
00176     PIOB_OER  = BV(PHY_PWRDN_BIT);
00177     PIOB_CODR = BV(PHY_PWRDN_BIT);
00178
00179     // Toggle external hardware reset pin.
00180     RSTC_MR = RSTC_KEY | (1 << RSTC_ERSTL_SHIFT) | BV(RSTC_URSTEN);
00181     RSTC_CR = RSTC_KEY | BV(RSTC_EXTRST);
00182
00183     while ((RSTC_SR & BV(RSTC_NRSTL)) == 0)
00184         cpu_relax();
00185
00186     // Configure MII port.
00187     PIOB_ASR = PHY_MII_PINS;
00188     PIOB_BSR = 0;
00189     PIOB_PDR = PHY_MII_PINS;
00190
00191     // Enable receive and transmit clocks.
00192     EMAC_USRIO = BV(EMAC_CLKEN);
00193
00194     // Enable management port.
00195     EMAC_NCR |= BV(EMAC_MPE);
00196     EMAC_NCFGR |= EMAC_CLK_HCLK_32;
00197
00198     // Set local MAC address.
00199     EMAC_SA1L = (mac_addr[3] << 24) | (mac_addr[2] << 16) |
00200                 (mac_addr[1] << 8) | mac_addr[0];
00201     EMAC_SA1H = (mac_addr[5] << 8) | mac_addr[4];
00202
00203     // Wait for PHY ready
00204     timer_delay(255);
00205
00206     // Clear MII isolate.
00207     phy_hw_read(NIC_PHY_BMCR);
00208     phy_cr = phy_hw_read(NIC_PHY_BMCR);
00209
00210     phy_cr &= ~NIC_PHY_BMCR_ISOLATE;
00211     phy_hw_write(NIC_PHY_BMCR, phy_cr);
00212
00213     phy_cr = phy_hw_read(NIC_PHY_BMCR);
00214
00215     LOG_INFO("%s: PHY ID %#04x %#04x\n",
00216         __func__,
00217         phy_hw_read(NIC_PHY_ID1), phy_hw_read(NIC_PHY_ID2));
00218
00219     // Wait for auto negotiation completed.
00220     phy_hw_read(NIC_PHY_BMSR);
00221     for (;;)
00222     {
00223         if (phy_hw_read(NIC_PHY_BMSR) & NIC_PHY_BMSR_ANCOMPL)
00224             break;
00225         cpu_relax();
00226     }
00227
00228     // Disable management port.
00229     EMAC_NCR &= ~BV(EMAC_MPE);
00230
00231     return 0;
00232 }
00233
00234 static int emac_start(void)
00235 {
00236     uint32_t addr;
00237     int i;
00238
00239     for (i = 0; i < EMAC_RX_DESCRIPTORS; i++)
00240     {
00241         addr = (uint32_t)(rx_buf + (i * EMAC_RX_BUFSIZ));
00242         rx_buf_tab[i].addr = addr & BUF_ADDRMASK;
00243     }
00244     rx_buf_tab[EMAC_RX_DESCRIPTORS - 1].addr |= RXBUF_WRAP;
00245
00246     for (i = 0; i < EMAC_TX_DESCRIPTORS; i++)
00247     {
00248         addr = (uint32_t)(tx_buf + (i * EMAC_TX_BUFSIZ));
00249         tx_buf_tab[i].addr = addr & BUF_ADDRMASK;
00250         tx_buf_tab[i].stat = TXS_USED;
00251     }
00252     tx_buf_tab[EMAC_TX_DESCRIPTORS - 1].stat = TXS_USED | TXS_WRAP;
00253
00254     /* Tell the EMAC where to find the descriptors. */
00255     EMAC_RBQP = (uint32_t)rx_buf_tab;
00256     EMAC_TBQP = (uint32_t)tx_buf_tab;
00257
00258     /* Clear receiver status. */
00259     EMAC_RSR = BV(EMAC_OVR) | BV(EMAC_REC) | BV(EMAC_BNA);
00260
00261     /* Copy all frames and discard FCS. */
00262     EMAC_NCFGR |= BV(EMAC_CAF) | BV(EMAC_DRFCS);
00263
00264     /* Enable receiver, transmitter and statistics. */
00265     EMAC_NCR |= BV(EMAC_TE) | BV(EMAC_RE) | BV(EMAC_WESTAT);
00266
00267     return 0;
00268 }
00269
00270 ssize_t eth_putFrame(const uint8_t *buf, size_t len)
00271 {
00272     size_t wr_len;
00273
00274     if (UNLIKELY(!len))
00275         return -1;
00276     ASSERT(len <= sizeof(tx_buf));
00277
00278         /* Check if the transmit buffer is available */
00279     while (!(tx_buf_tab[tx_buf_idx].stat & TXS_USED))
00280         event_wait(&send_wait);
00281
00282         /* Copy the data into the buffer and prepare descriptor */
00283         wr_len = MIN(len, (size_t)EMAC_TX_BUFSIZ - tx_buf_offset);
00284         memcpy((uint8_t *)tx_buf_tab[tx_buf_idx].addr + tx_buf_offset,
00285                 buf, wr_len);
00286     tx_buf_offset += wr_len;
00287
00288     return wr_len;
00289 }
00290
00291 void eth_sendFrame(void)
00292 {
00293         tx_buf_tab[tx_buf_idx].stat = (tx_buf_offset & TXS_LENGTH_FRAME) |
00294             TXS_LAST_BUFF |
00295             ((tx_buf_idx == EMAC_TX_DESCRIPTORS - 1) ?  TXS_WRAP : 0);
00296     EMAC_NCR |= BV(EMAC_TSTART);
00297
00298     tx_buf_offset = 0;
00299     if (++tx_buf_idx >= EMAC_TX_DESCRIPTORS)
00300         tx_buf_idx = 0;
00301 }
00302
00303 ssize_t eth_send(const uint8_t *buf, size_t len)
00304  {
00305     if (UNLIKELY(!len))
00306         return -1;
00307
00308     len = eth_putFrame(buf, len);
00309     eth_sendFrame();
00310
00311     return len;
00312 }
00313
00314 static void eth_buf_realign(int idx)
00315 {
00316     /* Empty buffer found. Realign. */
00317     do {
00318         rx_buf_tab[rx_buf_idx].addr &= ~RXBUF_OWNERSHIP;
00319         if (++rx_buf_idx >= EMAC_RX_BUFFERS)
00320             rx_buf_idx = 0;
00321     } while (idx != rx_buf_idx);
00322 }
00323
00324 static size_t __eth_getFrameLen(void)
00325 {
00326     int idx, n = EMAC_RX_BUFFERS;
00327
00328 skip:
00329     /* Skip empty buffers */
00330     while ((n > 0) && !(rx_buf_tab[rx_buf_idx].addr & RXBUF_OWNERSHIP))
00331     {
00332         if (++rx_buf_idx >= EMAC_RX_BUFFERS)
00333             rx_buf_idx = 0;
00334         n--;
00335     }
00336     if (UNLIKELY(!n))
00337     {
00338         LOG_INFO("no frame found\n");
00339         return 0;
00340     }
00341     /* Search the start of frame and cleanup fragments */
00342     while ((n > 0) && (rx_buf_tab[rx_buf_idx].addr & RXBUF_OWNERSHIP) &&
00343             !(rx_buf_tab[rx_buf_idx].stat & RXS_SOF))
00344     {
00345         rx_buf_tab[rx_buf_idx].addr &= ~RXBUF_OWNERSHIP;
00346         if (++rx_buf_idx >= EMAC_RX_BUFFERS)
00347             rx_buf_idx = 0;
00348         n--;
00349     }
00350     if (UNLIKELY(!n))
00351     {
00352         LOG_INFO("no SOF found\n");
00353         return 0;
00354     }
00355     /* Search end of frame to evaluate the total frame size */
00356     idx = rx_buf_idx;
00357 restart:
00358     while (n > 0)
00359     {
00360         if (UNLIKELY(!(rx_buf_tab[idx].addr & RXBUF_OWNERSHIP)))
00361         {
00362             /* Empty buffer found. Realign. */
00363             eth_buf_realign(idx);
00364             goto skip;
00365         }
00366         if (rx_buf_tab[idx].stat & RXS_EOF)
00367             return rx_buf_tab[idx].stat & RXS_LENGTH_FRAME;
00368         if (UNLIKELY((idx != rx_buf_idx) &&
00369                 (rx_buf_tab[idx].stat & RXS_SOF)))
00370         {
00371             /* Another start of frame found. Realign. */
00372             eth_buf_realign(idx);
00373             goto restart;
00374         }
00375         if (++idx >= EMAC_RX_BUFFERS)
00376             idx = 0;
00377         n--;
00378     }
00379     LOG_INFO("no EOF found\n");
00380     return 0;
00381 }
00382
00383 size_t eth_getFrameLen(void)
00384 {
00385     size_t len;
00386
00387     /* Check if there is at least one available frame in the buffer */
00388     while (1)
00389     {
00390         len = __eth_getFrameLen();
00391         if (LIKELY(len))
00392             break;
00393         /* Wait for RX interrupt */
00394         event_wait(&recv_wait);
00395     }
00396     return len;
00397 }
00398
00399 ssize_t eth_getFrame(uint8_t *buf, size_t len)
00400 {
00401     uint8_t *addr;
00402     size_t rd_len = 0;
00403
00404     if (UNLIKELY(!len))
00405         return -1;
00406     ASSERT(len <= sizeof(rx_buf));
00407
00408     /* Copy data from the RX buffer */
00409     addr = (uint8_t *)(rx_buf_tab[rx_buf_idx].addr & BUF_ADDRMASK);
00410     if (addr + len > &rx_buf[countof(rx_buf)])
00411     {
00412         size_t count = &rx_buf[countof(rx_buf)] - addr;
00413
00414         memcpy(buf, addr, count);
00415         memcpy(buf + count, rx_buf, len - count);
00416     }
00417     else
00418     {
00419         memcpy(buf, addr, len);
00420     }
00421     /* Update descriptors */
00422     while (rd_len < len)
00423     {
00424         if (len - rd_len >= EMAC_RX_BUFSIZ)
00425             rd_len += EMAC_RX_BUFSIZ;
00426         else
00427             rd_len += len - rd_len;
00428         if (UNLIKELY(!(rx_buf_tab[rx_buf_idx].addr & RXBUF_OWNERSHIP)))
00429         {
00430             LOG_INFO("bad frame found\n");
00431             return 0;
00432         }
00433         rx_buf_tab[rx_buf_idx].addr &= ~RXBUF_OWNERSHIP;
00434         if (++rx_buf_idx >= EMAC_RX_DESCRIPTORS)
00435             rx_buf_idx = 0;
00436     }
00437
00438     return rd_len;
00439 }
00440
00441 ssize_t eth_recv(uint8_t *buf, size_t len)
00442 {
00443     if (UNLIKELY(!len))
00444         return -1;
00445     len = MIN(len, eth_getFrameLen());
00446     return len ? eth_getFrame(buf, len) : 0;
00447 }
00448
00449 int eth_init()
00450 {
00451     cpu_flags_t flags;
00452
00453     emac_reset();
00454     emac_start();
00455
00456     event_initGeneric(&recv_wait);
00457     event_initGeneric(&send_wait);
00458
00459     // Register interrupt vector
00460     IRQ_SAVE_DISABLE(flags);
00461
00462     /* Disable all emac interrupts */
00463     EMAC_IDR = 0xFFFFFFFF;
00464
00465     /* Set the vector. */
00466     AIC_SVR(EMAC_ID) = emac_irqHandler;
00467     /* Initialize to edge triggered with defined priority. */
00468     AIC_SMR(EMAC_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED;
00469     /* Clear pending interrupt */
00470     AIC_ICCR = BV(EMAC_ID);
00471     /* Enable the system IRQ */
00472     AIC_IECR = BV(EMAC_ID);
00473
00474     /* Enable interrupts */
00475     EMAC_IER = EMAC_RX_INTS | EMAC_TX_INTS;
00476
00477     IRQ_RESTORE(flags);
00478
00479     return 0;
00480 }


BeRTOS: eth_at91.h File Reference

  • cpu
  • arm
  • drv
eth_at91.h File Reference

EMAC driver for AT91SAM7X Family, interface. More...

Go to the source code of this file.

Detailed Description

EMAC driver for AT91SAM7X Family, interface.

Author:
Daniele Basile <asterix@develer.com>
Andrea Righi <arighi@develer.com>

Definition in file eth_at91.h.


BeRTOS: eth_at91.h Source File

  • cpu
  • arm
  • drv
eth_at91.h
Go to the documentation of this file.
00001
00039 #ifndef ETH_AT91_H
00040 #define ETH_AT91_H
00041
00042 // Settings and definition for DAVICOM 9161A
00043 // \{
00044 #define NIC_PHY_ADDR            31
00045
00046 //Registry definition
00047 #define NIC_PHY_BMCR            0x00    //  Basic mode control register.
00048 #define NIC_PHY_BMCR_COLTEST    0x0080  //  Collision test.
00049 #define NIC_PHY_BMCR_FDUPLEX    0x0100  //  Full duplex mode.
00050 #define NIC_PHY_BMCR_ANEGSTART  0x0200  //  Restart auto negotiation.
00051 #define NIC_PHY_BMCR_ISOLATE    0x0400  //  Isolate from MII.
00052 #define NIC_PHY_BMCR_PWRDN      0x0800  //  Power-down.
00053 #define NIC_PHY_BMCR_ANEGENA    0x1000  //  Enable auto negotiation.
00054 #define NIC_PHY_BMCR_100MBPS    0x2000  //  Select 100 Mbps.
00055 #define NIC_PHY_BMCR_LOOPBACK   0x4000  //  Enable loopback mode.
00056 #define NIC_PHY_BMCR_RESET      0x8000  //  Software reset.
00057
00058 #define NIC_PHY_BMSR            0x01    //  Basic mode status register.
00059 #define NIC_PHY_BMSR_ANCOMPL    0x0020  //  Auto negotiation complete.
00060 #define NIC_PHY_BMSR_ANEGCAPABLE 0x0008  // Able to do auto-negotiation
00061 #define NIC_PHY_BMSR_LINKSTAT   0x0004  //  Link status.
00062
00063 #define NIC_PHY_ID1             0x02    //  PHY identifier register 1.
00064 #define NIC_PHY_ID2             0x03    //  PHY identifier register 2.
00065 #define NIC_PHY_ANAR            0x04    //  Auto negotiation advertisement register.
00066 #define NIC_PHY_ANLPAR          0x05    //  Auto negotiation link partner availability register.
00067 #define NIC_PHY_ANER            0x06    //  Auto negotiation expansion register.
00068
00069 // Pin definition for DAVICOM 9161A
00070 // See schematic for at91sam7x-ek evalution board
00071 #define PHY_TXCLK_ISOLATE_BIT   0
00072 #define PHY_REFCLK_XT2_BIT      0
00073 #define PHY_TXEN_BIT            1
00074 #define PHY_TXD0_BIT            2
00075 #define PHY_TXD1_BIT            3
00076 #define PHY_CRS_AD4_BIT         4
00077 #define PHY_RXD0_AD0_BIT        5
00078 #define PHY_RXD1_AD1_BIT        6
00079 #define PHY_RXER_RXD4_RPTR_BIT  7
00080 #define PHY_MDC_BIT             8
00081 #define PHY_MDIO_BIT            9
00082 #define PHY_TXD2_BIT            10
00083 #define PHY_TXD3_BIT            11
00084 #define PHY_TXER_TXD4_BIT       12
00085 #define PHY_RXD2_AD2_BIT        13
00086 #define PHY_RXD3_AD3_BIT        14
00087 #define PHY_RXDV_TESTMODE_BIT   15
00088 #define PHY_COL_RMII_BIT        16
00089 #define PHY_RXCLK_10BTSER_BIT   17
00090 #define PHY_PWRDN_BIT           18
00091 #define PHY_MDINTR_BIT          26
00092
00093 #define PHY_MII_PINS   BV(PHY_REFCLK_XT2_BIT) \
00094     | BV(PHY_TXEN_BIT) \
00095     | BV(PHY_TXD0_BIT) \
00096     | BV(PHY_TXD1_BIT) \
00097     | BV(PHY_CRS_AD4_BIT) \
00098     | BV(PHY_RXD0_AD0_BIT) \
00099     | BV(PHY_RXD1_AD1_BIT) \
00100     | BV(PHY_RXER_RXD4_RPTR_BIT) \
00101     | BV(PHY_MDC_BIT) \
00102     | BV(PHY_MDIO_BIT) \
00103     | BV(PHY_TXD2_BIT) \
00104     | BV(PHY_TXD3_BIT) \
00105     | BV(PHY_TXER_TXD4_BIT) \
00106     | BV(PHY_RXD2_AD2_BIT) \
00107     | BV(PHY_RXD3_AD3_BIT) \
00108     | BV(PHY_RXDV_TESTMODE_BIT) \
00109     | BV(PHY_COL_RMII_BIT) \
00110     | BV(PHY_RXCLK_10BTSER_BIT)
00111 // \}
00112
00113 #define EMAC_TX_BUFSIZ          1518  //!!! Don't change this
00114 #define EMAC_TX_BUFFERS         1     //!!! Don't change this
00115 #define EMAC_TX_DESCRIPTORS     EMAC_TX_BUFFERS
00116
00117 #define EMAC_RX_BUFFERS         32    //!!! Don't change this
00118 #define EMAC_RX_BUFSIZ          128   //!!! Don't change this
00119 #define EMAC_RX_DESCRIPTORS EMAC_RX_BUFFERS
00120
00121 // Flag to manage local tx buffer
00122 #define TXS_USED            0x80000000  //Used buffer.
00123 #define TXS_WRAP            0x40000000  //Last descriptor.
00124 #define TXS_ERROR           0x20000000  //Retry limit exceeded.
00125 #define TXS_UNDERRUN        0x10000000  //Transmit underrun.
00126 #define TXS_NO_BUFFER       0x08000000  //Buffer exhausted.
00127 #define TXS_NO_CRC          0x00010000  //CRC not appended.
00128 #define TXS_LAST_BUFF       0x00008000  //Last buffer of frame.
00129 #define TXS_LENGTH_FRAME    0x000007FF  // Length of frame including FCS.
00130
00131 // Flag to manage local rx buffer
00132 #define RXBUF_OWNERSHIP     0x00000001
00133 #define RXBUF_WRAP          0x00000002
00134
00135 #define BUF_ADDRMASK        0xFFFFFFFC
00136
00137 #define RXS_BROADCAST_ADDR  0x80000000  // Broadcast address detected.
00138 #define RXS_MULTICAST_HASH  0x40000000  // Multicast hash match.
00139 #define RXS_UNICAST_HASH    0x20000000  // Unicast hash match.
00140 #define RXS_EXTERNAL_ADDR   0x10000000  // External address match.
00141 #define RXS_SA1_ADDR        0x04000000  // Specific address register 1 match.
00142 #define RXS_SA2_ADDR        0x02000000  // Specific address register 2 match.
00143 #define RXS_SA3_ADDR        0x01000000  // Specific address register 3 match.
00144 #define RXS_SA4_ADDR        0x00800000  // Specific address register 4 match.
00145 #define RXS_TYPE_ID         0x00400000  // Type ID match.
00146 #define RXS_VLAN_TAG        0x00200000  // VLAN tag detected.
00147 #define RXS_PRIORITY_TAG    0x00100000  // Priority tag detected.
00148 #define RXS_VLAN_PRIORITY   0x000E0000  // VLAN priority.
00149 #define RXS_CFI_IND         0x00010000  // Concatenation format indicator.
00150 #define RXS_EOF             0x00008000  // End of frame.
00151 #define RXS_SOF             0x00004000  // Start of frame.
00152 #define RXS_RBF_OFFSET      0x00003000  // Receive buffer offset mask.
00153 #define RXS_LENGTH_FRAME    0x000007FF  // Length of frame including FCS.
00154
00155 #define EMAC_RSR_BITS   (BV(EMAC_BNA) | BV(EMAC_REC) | BV(EMAC_OVR))
00156 #define EMAC_TSR_BITS   (BV(EMAC_UBR) | BV(EMAC_COL) | BV(EMAC_RLES) | \
00157             BV(EMAC_BEX) | BV(EMAC_COMP) | BV(EMAC_UND))
00158
00159 typedef struct BufDescriptor
00160 {
00161     volatile uint32_t addr;
00162     volatile uint32_t stat;
00163 } BufDescriptor;
00164
00165 #endif /* ETH_AT91_H */


BeRTOS: eth_sam3.c File Reference

  • cpu
  • cortex-m3
  • drv
eth_sam3.c File Reference

EMAC driver for AT91SAM family with Davicom 9161A phy. More...

#include "cfg/cfg_eth.h"
#include <cfg/log.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <io/sam3.h>
#include <drv/irq_cm3.h>
#include <cpu/power.h>
#include <cpu/types.h>
#include <cpu/irq.h>
#include <drv/timer.h>
#include <drv/eth.h>
#include <mware/event.h>
#include <string.h>
#include "eth_sam3.h"

Go to the source code of this file.

Detailed Description

EMAC driver for AT91SAM family with Davicom 9161A phy.

Author:
Daniele Basile <asterix@develer.com>
Andrea Righi <arighi@develer.com>
Stefano Fedrigo <aleph@develer.com>

Definition in file eth_sam3.c.


BeRTOS: eth_sam3.c Source File

  • cpu
  • cortex-m3
  • drv
eth_sam3.c
Go to the documentation of this file.
00001
00040 #include "cfg/cfg_eth.h"
00041
00042 #define LOG_LEVEL  ETH_LOG_LEVEL
00043 #define LOG_FORMAT ETH_LOG_FORMAT
00044
00045 #include <cfg/log.h>
00046
00047 #include <cfg/debug.h>
00048 #include <cfg/log.h>
00049 #include <cfg/macros.h>
00050 #include <cfg/compiler.h>
00051
00052 // TODO: unify includes
00053 //#include <io/at91sam7.h>
00054 //#include <io/arm.h>
00055 //#include <io/include.h>
00056 #include <io/sam3.h>
00057 #include <drv/irq_cm3.h>
00058
00059 #include <cpu/power.h>
00060 #include <cpu/types.h>
00061 #include <cpu/irq.h>
00062
00063 #include <drv/timer.h>
00064 #include <drv/eth.h>
00065
00066 #include <mware/event.h>
00067
00068 #include <string.h>
00069
00070 #include "eth_sam3.h"
00071
00072 #define EMAC_RX_INTS    (BV(EMAC_RCOMP) | BV(EMAC_ROVR) | BV(EMAC_RXUBR))
00073 #define EMAC_TX_INTS    (BV(EMAC_TCOMP) | BV(EMAC_TXUBR) | BV(EMAC_RLEX))
00074
00075 /*
00076  * MAC address configuration (please change this in your project!).
00077  *
00078  * TODO: make this paramater user-configurable from the Wizard.
00079  */
00080 const uint8_t mac_addr[] = { 0x00, 0x45, 0x56, 0x78, 0x9a, 0xbc };
00081
00082 /* Silent Doxygen bug... */
00083 #ifndef __doxygen__
00084 /*
00085  * NOTE: this buffer should be declared as 'volatile' because it is read by the
00086  * hardware. However, this is accessed only via memcpy() that should guarantee
00087  * coherency when copying from/to buffers.
00088  */
00089 static uint8_t tx_buf[EMAC_TX_BUFFERS * EMAC_TX_BUFSIZ] ALIGNED(8);
00090 static volatile BufDescriptor tx_buf_tab[EMAC_TX_DESCRIPTORS] ALIGNED(8);
00091
00092 /*
00093  * NOTE: this buffer should be declared as 'volatile' because it is wrote by
00094  * the hardware. However, this is accessed only via memcpy() that should
00095  * guarantee coherency when copying from/to buffers.
00096  */
00097 static uint8_t rx_buf[EMAC_RX_BUFFERS * EMAC_RX_BUFSIZ] ALIGNED(8);
00098 static volatile BufDescriptor rx_buf_tab[EMAC_RX_DESCRIPTORS] ALIGNED(8);
00099 #endif
00100
00101 static int tx_buf_idx;
00102 static int tx_buf_offset;
00103 static int rx_buf_idx;
00104
00105 static Event recv_wait, send_wait;
00106
00107 static DECLARE_ISR(emac_irqHandler)
00108 {
00109     /* Read interrupt status and disable interrupts. */
00110     uint32_t isr = EMAC_ISR;
00111
00112     /* Receiver interrupt */
00113     if ((isr & EMAC_RX_INTS))
00114     {
00115         if (isr & BV(EMAC_RCOMP))
00116             event_do(&recv_wait);
00117         EMAC_RSR = EMAC_RX_INTS;
00118     }
00119     /* Transmitter interrupt */
00120     if (isr & EMAC_TX_INTS)
00121     {
00122         if (isr & BV(EMAC_TCOMP))
00123             event_do(&send_wait);
00124         EMAC_TSR = EMAC_TX_INTS;
00125     }
00126     //AIC_EOICR = 0;
00127 }
00128
00129 /*
00130  * \brief Read contents of PHY register.
00131  *
00132  * \param reg PHY register number.
00133  *
00134  * \return Contents of the specified register.
00135  */
00136 static uint16_t phy_hw_read(uint8_t phy_addr, reg8_t reg)
00137 {
00138     // PHY read command.
00139     EMAC_MAN = EMAC_SOF | EMAC_RW_READ
00140         | ((phy_addr << EMAC_PHYA_SHIFT) & EMAC_PHYA)
00141         | ((reg  << EMAC_REGA_SHIFT) & EMAC_REGA)
00142         | EMAC_CODE;
00143
00144     // Wait until PHY logic completed.
00145     while (!(EMAC_NSR & BV(EMAC_IDLE)))
00146         cpu_relax();
00147
00148     // Get data from PHY maintenance register.
00149     return (uint16_t)(EMAC_MAN & EMAC_DATA);
00150 }
00151
00152 #if 0
00153 /*
00154  * \brief Write value to PHY register.
00155  *
00156  * \param reg PHY register number.
00157  * \param val Value to write.
00158  */
00159 static void phy_hw_write(uint8_t phy_addr, reg8_t reg, uint16_t val)
00160 {
00161     // PHY write command.
00162     EMAC_MAN = EMAC_SOF | EMAC_RW_WRITE
00163         | ((phy_addr << EMAC_PHYA_SHIFT) & EMAC_PHYA)
00164         | ((reg  << EMAC_REGA_SHIFT) & EMAC_REGA)
00165         | EMAC_CODE | val;
00166
00167     // Wait until PHY logic completed.
00168     while (!(EMAC_NSR & BV(EMAC_IDLE)))
00169         cpu_relax();
00170 }
00171 #endif
00172
00173 /*
00174  * Check link speed and duplex as negotiated by the PHY
00175  * and configure CPU EMAC accordingly.
00176  * Requires active PHY maintenance mode.
00177  */
00178 static void emac_autoNegotiation(void)
00179 {
00180     uint16_t reg;
00181     time_t start;
00182
00183     // Wait for auto-negotation to complete
00184     start = timer_clock();
00185     do {
00186         reg = phy_hw_read(NIC_PHY_ADDR, NIC_PHY_BMSR);
00187         if (timer_clock() - start > 2000)
00188         {
00189             kprintf("eth error: auto-negotiation timeout\n");
00190             return;
00191         }
00192     }
00193     while (!(reg & NIC_PHY_BMSR_ANCOMPL));
00194
00195     reg = phy_hw_read(NIC_PHY_ADDR, NIC_PHY_ANLPAR);
00196
00197     if ((reg & NIC_PHY_ANLPAR_TX_FDX) || (reg & NIC_PHY_ANLPAR_TX_HDX))
00198     {
00199         LOG_INFO("eth: 100BASE-TX\n");
00200         EMAC_NCFGR |= BV(EMAC_SPD);
00201     }
00202     else
00203     {
00204         LOG_INFO("eth: 10BASE-T\n");
00205         EMAC_NCFGR &= ~BV(EMAC_SPD);
00206     }
00207
00208     if ((reg & NIC_PHY_ANLPAR_TX_FDX) || (reg & NIC_PHY_ANLPAR_10_FDX))
00209     {
00210         LOG_INFO("eth: full duplex\n");
00211         EMAC_NCFGR |= BV(EMAC_FD);
00212     }
00213     else
00214     {
00215         LOG_INFO("eth: half duplex\n");
00216         EMAC_NCFGR &= ~BV(EMAC_FD);
00217     }
00218 }
00219
00220
00221 static int emac_reset(void)
00222 {
00223 #if CPU_ARM_AT91
00224     // Enable devices
00225     PMC_PCER = BV(PIOA_ID);
00226     PMC_PCER = BV(PIOB_ID);
00227     PMC_PCER = BV(EMAC_ID);
00228
00229     // Disable TESTMODE and RMII
00230     PIOB_PUDR = BV(PHY_RXDV_TESTMODE_BIT);
00231     PIOB_PUDR = BV(PHY_COL_RMII_BIT);
00232
00233     // Disable PHY power down.
00234     PIOB_PER  = BV(PHY_PWRDN_BIT);
00235     PIOB_OER  = BV(PHY_PWRDN_BIT);
00236     PIOB_CODR = BV(PHY_PWRDN_BIT);
00237 #else
00238     pmc_periphEnable(PIOA_ID);
00239     pmc_periphEnable(PIOB_ID);
00240     pmc_periphEnable(PIOC_ID);
00241     pmc_periphEnable(PIOD_ID);
00242     pmc_periphEnable(EMAC_ID);
00243
00244     // Disable TESTMODE and RMII
00245     PIOC_PUDR = BV(PHY_RXDV_TESTMODE_BIT);
00246
00247     // Disable PHY power down.
00248     PIOD_PER  = BV(PHY_PWRDN_BIT);
00249     PIOD_OER  = BV(PHY_PWRDN_BIT);
00250     PIOD_CODR = BV(PHY_PWRDN_BIT);
00251 #endif
00252
00253     // Toggle external hardware reset pin.
00254     RSTC_MR = RSTC_KEY | (1 << RSTC_ERSTL_SHIFT) | BV(RSTC_URSTEN);
00255     RSTC_CR = RSTC_KEY | BV(RSTC_EXTRST);
00256
00257     while ((RSTC_SR & BV(RSTC_NRSTL)) == 0)
00258         cpu_relax();
00259
00260     // Configure MII ports.
00261 #if CPU_ARM_AT91
00262     PIOB_ASR = PHY_MII_PINS;
00263     PIOB_BSR = 0;
00264     PIOB_PDR = PHY_MII_PINS;
00265
00266     // Enable receive and transmit clocks.
00267     EMAC_USRIO = BV(EMAC_CLKEN);
00268 #else
00269     PIO_PERIPH_SEL(PIOB_BASE, PHY_MII_PINS_PORTB, PIO_PERIPH_A);
00270     PIOB_PDR = PHY_MII_PINS_PORTB;
00271
00272     PIO_PERIPH_SEL(PIOC_BASE, PHY_MII_PINS_PORTC, PIO_PERIPH_A);
00273     PIOC_PDR = PHY_MII_PINS_PORTC;
00274
00275     // Enable receive, transmit clocks and RMII mode.
00276     EMAC_USRIO = BV(EMAC_CLKEN) | BV(EMAC_RMII);
00277 #endif
00278
00279     // Enable management port.
00280     EMAC_NCR |= BV(EMAC_MPE);
00281     EMAC_NCFGR |= EMAC_CLK_HCLK_64;
00282
00283     // Set local MAC address.
00284     EMAC_SA1L = (mac_addr[3] << 24) | (mac_addr[2] << 16) |
00285                 (mac_addr[1] << 8) | mac_addr[0];
00286     EMAC_SA1H = (mac_addr[5] << 8) | mac_addr[4];
00287
00288     emac_autoNegotiation();
00289
00290     // Disable management port.
00291     EMAC_NCR &= ~BV(EMAC_MPE);
00292
00293     return 0;
00294 }
00295
00296
00297 static int emac_start(void)
00298 {
00299     uint32_t addr;
00300     int i;
00301
00302     for (i = 0; i < EMAC_RX_DESCRIPTORS; i++)
00303     {
00304         addr = (uint32_t)(rx_buf + (i * EMAC_RX_BUFSIZ));
00305         rx_buf_tab[i].addr = addr & BUF_ADDRMASK;
00306     }
00307     rx_buf_tab[EMAC_RX_DESCRIPTORS - 1].addr |= RXBUF_WRAP;
00308
00309     for (i = 0; i < EMAC_TX_DESCRIPTORS; i++)
00310     {
00311         addr = (uint32_t)(tx_buf + (i * EMAC_TX_BUFSIZ));
00312         tx_buf_tab[i].addr = addr & BUF_ADDRMASK;
00313         tx_buf_tab[i].stat = TXS_USED;
00314     }
00315     tx_buf_tab[EMAC_TX_DESCRIPTORS - 1].stat = TXS_USED | TXS_WRAP;
00316
00317     /* Tell the EMAC where to find the descriptors. */
00318     EMAC_RBQP = (uint32_t)rx_buf_tab;
00319     EMAC_TBQP = (uint32_t)tx_buf_tab;
00320
00321     /* Clear receiver status. */
00322     EMAC_RSR = BV(EMAC_OVR) | BV(EMAC_REC) | BV(EMAC_BNA);
00323
00324     /* Copy all frames and discard FCS. */
00325     EMAC_NCFGR |= BV(EMAC_CAF) | BV(EMAC_DRFCS);
00326
00327     /* Enable receiver, transmitter and statistics. */
00328     EMAC_NCR |= BV(EMAC_TE) | BV(EMAC_RE) | BV(EMAC_WESTAT);
00329
00330     return 0;
00331 }
00332
00333 ssize_t eth_putFrame(const uint8_t *buf, size_t len)
00334 {
00335     size_t wr_len;
00336
00337     if (UNLIKELY(!len))
00338         return -1;
00339     ASSERT(len <= sizeof(tx_buf));
00340
00341     /* Check if the transmit buffer is available */
00342     while (!(tx_buf_tab[tx_buf_idx].stat & TXS_USED))
00343         event_wait(&send_wait);
00344
00345     /* Copy the data into the buffer and prepare descriptor */
00346     wr_len = MIN(len, (size_t)EMAC_TX_BUFSIZ - tx_buf_offset);
00347     memcpy((uint8_t *)tx_buf_tab[tx_buf_idx].addr + tx_buf_offset,
00348             buf, wr_len);
00349     tx_buf_offset += wr_len;
00350
00351     return wr_len;
00352 }
00353
00354 void eth_sendFrame(void)
00355 {
00356     tx_buf_tab[tx_buf_idx].stat = (tx_buf_offset & TXS_LENGTH_FRAME) |
00357         TXS_LAST_BUFF |
00358         ((tx_buf_idx == EMAC_TX_DESCRIPTORS - 1) ?  TXS_WRAP : 0);
00359     EMAC_NCR |= BV(EMAC_TSTART);
00360
00361     tx_buf_offset = 0;
00362     if (++tx_buf_idx >= EMAC_TX_DESCRIPTORS)
00363         tx_buf_idx = 0;
00364 }
00365
00366 ssize_t eth_send(const uint8_t *buf, size_t len)
00367  {
00368     if (UNLIKELY(!len))
00369         return -1;
00370
00371     len = eth_putFrame(buf, len);
00372     eth_sendFrame();
00373
00374     return len;
00375 }
00376
00377 static void eth_buf_realign(int idx)
00378 {
00379     /* Empty buffer found. Realign. */
00380     do {
00381         rx_buf_tab[rx_buf_idx].addr &= ~RXBUF_OWNERSHIP;
00382         if (++rx_buf_idx >= EMAC_RX_BUFFERS)
00383             rx_buf_idx = 0;
00384     } while (idx != rx_buf_idx);
00385 }
00386
00387 static size_t __eth_getFrameLen(void)
00388 {
00389     int idx, n = EMAC_RX_BUFFERS;
00390
00391 skip:
00392     /* Skip empty buffers */
00393     while ((n > 0) && !(rx_buf_tab[rx_buf_idx].addr & RXBUF_OWNERSHIP))
00394     {
00395         if (++rx_buf_idx >= EMAC_RX_BUFFERS)
00396             rx_buf_idx = 0;
00397         n--;
00398     }
00399     if (UNLIKELY(!n))
00400     {
00401         LOG_INFO("no frame found\n");
00402         return 0;
00403     }
00404     /* Search the start of frame and cleanup fragments */
00405     while ((n > 0) && (rx_buf_tab[rx_buf_idx].addr & RXBUF_OWNERSHIP) &&
00406             !(rx_buf_tab[rx_buf_idx].stat & RXS_SOF))
00407     {
00408         rx_buf_tab[rx_buf_idx].addr &= ~RXBUF_OWNERSHIP;
00409         if (++rx_buf_idx >= EMAC_RX_BUFFERS)
00410             rx_buf_idx = 0;
00411         n--;
00412     }
00413     if (UNLIKELY(!n))
00414     {
00415         LOG_INFO("no SOF found\n");
00416         return 0;
00417     }
00418     /* Search end of frame to evaluate the total frame size */
00419     idx = rx_buf_idx;
00420 restart:
00421     while (n > 0)
00422     {
00423         if (UNLIKELY(!(rx_buf_tab[idx].addr & RXBUF_OWNERSHIP)))
00424         {
00425             /* Empty buffer found. Realign. */
00426             eth_buf_realign(idx);
00427             goto skip;
00428         }
00429         if (rx_buf_tab[idx].stat & RXS_EOF)
00430             return rx_buf_tab[idx].stat & RXS_LENGTH_FRAME;
00431         if (UNLIKELY((idx != rx_buf_idx) &&
00432                 (rx_buf_tab[idx].stat & RXS_SOF)))
00433         {
00434             /* Another start of frame found. Realign. */
00435             eth_buf_realign(idx);
00436             goto restart;
00437         }
00438         if (++idx >= EMAC_RX_BUFFERS)
00439             idx = 0;
00440         n--;
00441     }
00442     LOG_INFO("no EOF found\n");
00443     return 0;
00444 }
00445
00446 size_t eth_getFrameLen(void)
00447 {
00448     size_t len;
00449
00450     /* Check if there is at least one available frame in the buffer */
00451     while (1)
00452     {
00453         len = __eth_getFrameLen();
00454         if (LIKELY(len))
00455             break;
00456         /* Wait for RX interrupt */
00457         event_wait(&recv_wait);
00458     }
00459     return len;
00460 }
00461
00462 ssize_t eth_getFrame(uint8_t *buf, size_t len)
00463 {
00464     uint8_t *addr;
00465     size_t rd_len = 0;
00466
00467     if (UNLIKELY(!len))
00468         return -1;
00469     ASSERT(len <= sizeof(rx_buf));
00470
00471     /* Copy data from the RX buffer */
00472     addr = (uint8_t *)(rx_buf_tab[rx_buf_idx].addr & BUF_ADDRMASK);
00473     if (addr + len > &rx_buf[countof(rx_buf)])
00474     {
00475         size_t count = &rx_buf[countof(rx_buf)] - addr;
00476
00477         memcpy(buf, addr, count);
00478         memcpy(buf + count, rx_buf, len - count);
00479     }
00480     else
00481     {
00482         memcpy(buf, addr, len);
00483     }
00484     /* Update descriptors */
00485     while (rd_len < len)
00486     {
00487         if (len - rd_len >= EMAC_RX_BUFSIZ)
00488             rd_len += EMAC_RX_BUFSIZ;
00489         else
00490             rd_len += len - rd_len;
00491         if (UNLIKELY(!(rx_buf_tab[rx_buf_idx].addr & RXBUF_OWNERSHIP)))
00492         {
00493             LOG_INFO("bad frame found\n");
00494             return 0;
00495         }
00496         rx_buf_tab[rx_buf_idx].addr &= ~RXBUF_OWNERSHIP;
00497         if (++rx_buf_idx >= EMAC_RX_DESCRIPTORS)
00498             rx_buf_idx = 0;
00499     }
00500
00501     return rd_len;
00502 }
00503
00504 ssize_t eth_recv(uint8_t *buf, size_t len)
00505 {
00506     if (UNLIKELY(!len))
00507         return -1;
00508     len = MIN(len, eth_getFrameLen());
00509     return len ? eth_getFrame(buf, len) : 0;
00510 }
00511
00512 int eth_init()
00513 {
00514     cpu_flags_t flags;
00515
00516     emac_reset();
00517     emac_start();
00518
00519     event_initGeneric(&recv_wait);
00520     event_initGeneric(&send_wait);
00521
00522     // Register interrupt vector
00523     IRQ_SAVE_DISABLE(flags);
00524
00525     /* Disable all emac interrupts */
00526     EMAC_IDR = 0xFFFFFFFF;
00527
00528 #if CPU_ARM_AT91
00529     // TODO: define sysirq_set...
00530     /* Set the vector. */
00531     AIC_SVR(EMAC_ID) = emac_irqHandler;
00532     /* Initialize to edge triggered with defined priority. */
00533     AIC_SMR(EMAC_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED;
00534     /* Clear pending interrupt */
00535     AIC_ICCR = BV(EMAC_ID);
00536     /* Enable the system IRQ */
00537     AIC_IECR = BV(EMAC_ID);
00538 #else
00539     sysirq_setHandler(INT_EMAC, emac_irqHandler);
00540 #endif
00541
00542     /* Enable interrupts */
00543     EMAC_IER = EMAC_RX_INTS | EMAC_TX_INTS;
00544
00545     IRQ_RESTORE(flags);
00546
00547     return 0;
00548 }


BeRTOS: eth_sam3.h File Reference

  • cpu
  • cortex-m3
  • drv
eth_sam3.h File Reference

EMAC driver for AT91SAM family with Davicom 9161A phy, interface. More...

Go to the source code of this file.

Detailed Description

EMAC driver for AT91SAM family with Davicom 9161A phy, interface.

Author:
Daniele Basile <asterix@develer.com>
Andrea Righi <arighi@develer.com>
Stefano Fedrigo <aleph@develer.com>

Definition in file eth_sam3.h.


BeRTOS: eth_sam3.h Source File

  • cpu
  • cortex-m3
  • drv
eth_sam3.h
Go to the documentation of this file.
00001
00040 #ifndef ETH_SAM3_H
00041 #define ETH_SAM3_H
00042
00043 // Settings and definition for DAVICOM 9161A
00044 // \{
00045 #define NIC_PHY_ADDR            0
00046
00047 // Register bits definition
00048 #define NIC_PHY_BMCR            0x00    //  Basic mode control register.
00049 #define NIC_PHY_BMCR_COLTEST    0x0080  //  Collision test.
00050 #define NIC_PHY_BMCR_FDUPLEX    0x0100  //  Full duplex mode.
00051 #define NIC_PHY_BMCR_ANEGSTART  0x0200  //  Restart auto negotiation.
00052 #define NIC_PHY_BMCR_ISOLATE    0x0400  //  Isolate from MII.
00053 #define NIC_PHY_BMCR_PWRDN      0x0800  //  Power-down.
00054 #define NIC_PHY_BMCR_ANEGENA    0x1000  //  Enable auto negotiation.
00055 #define NIC_PHY_BMCR_100MBPS    0x2000  //  Select 100 Mbps.
00056 #define NIC_PHY_BMCR_LOOPBACK   0x4000  //  Enable loopback mode.
00057 #define NIC_PHY_BMCR_RESET      0x8000  //  Software reset.
00058
00059 #define NIC_PHY_BMSR            0x01    //  Basic mode status register.
00060 #define NIC_PHY_BMSR_ANCOMPL    0x0020  //  Auto negotiation complete.
00061 #define NIC_PHY_BMSR_ANEGCAPABLE 0x0008  // Able to do auto-negotiation
00062 #define NIC_PHY_BMSR_LINKSTAT   0x0004  //  Link status.
00063
00064 #define NIC_PHY_ANLPAR_10_HDX   BV(5)   //  10BASE-T half duplex
00065 #define NIC_PHY_ANLPAR_10_FDX   BV(6)   //  10BASE-T full duplex
00066 #define NIC_PHY_ANLPAR_TX_HDX   BV(7)   //  100BASE-TX half duplex
00067 #define NIC_PHY_ANLPAR_TX_FDX   BV(8)   //  100BASE-TX full duplex
00068
00069 #define NIC_PHY_ID1             0x02    //  PHY identifier register 1.
00070 #define NIC_PHY_ID2             0x03    //  PHY identifier register 2.
00071 #define NIC_PHY_ANAR            0x04    //  Auto negotiation advertisement register.
00072 #define NIC_PHY_ANLPAR          0x05    //  Auto negotiation link partner availability register.
00073 #define NIC_PHY_ANER            0x06    //  Auto negotiation expansion register.
00074
00075 #if CPU_ARM_AT91
00076
00077 /*
00078  * Pin definition for DAVICOM 9161A.
00079  * See schematics for AT91SAM7X-EK evalution board.
00080  */
00081 // All pins in port B
00082 #define PHY_REFCLK_XT2_BIT      0
00083 #define PHY_TXEN_BIT            1
00084 #define PHY_TXD0_BIT            2
00085 #define PHY_TXD1_BIT            3
00086 #define PHY_CRS_AD4_BIT         4
00087 #define PHY_RXD0_AD0_BIT        5
00088 #define PHY_RXD1_AD1_BIT        6
00089 #define PHY_RXER_RXD4_RPTR_BIT  7
00090 #define PHY_MDC_BIT             8
00091 #define PHY_MDIO_BIT            9
00092 #define PHY_TXD2_BIT            10
00093 #define PHY_TXD3_BIT            11
00094 #define PHY_TXER_TXD4_BIT       12
00095 #define PHY_RXD2_AD2_BIT        13
00096 #define PHY_RXD3_AD3_BIT        14
00097 #define PHY_RXDV_TESTMODE_BIT   15
00098 #define PHY_COL_RMII_BIT        16
00099 #define PHY_RXCLK_10BTSER_BIT   17
00100 #define PHY_PWRDN_BIT           18
00101 #define PHY_MDINTR_BIT          26
00102
00103 #define PHY_MII_PINS \
00104     BV(PHY_REFCLK_XT2_BIT) \
00105     | BV(PHY_TXEN_BIT) \
00106     | BV(PHY_TXD0_BIT) \
00107     | BV(PHY_TXD1_BIT) \
00108     | BV(PHY_CRS_AD4_BIT) \
00109     | BV(PHY_RXD0_AD0_BIT) \
00110     | BV(PHY_RXD1_AD1_BIT) \
00111     | BV(PHY_RXER_RXD4_RPTR_BIT) \
00112     | BV(PHY_MDC_BIT) \
00113     | BV(PHY_MDIO_BIT) \
00114     | BV(PHY_TXD2_BIT) \
00115     | BV(PHY_TXD3_BIT) \
00116     | BV(PHY_TXER_TXD4_BIT) \
00117     | BV(PHY_RXD2_AD2_BIT) \
00118     | BV(PHY_RXD3_AD3_BIT) \
00119     | BV(PHY_RXDV_TESTMODE_BIT) \
00120     | BV(PHY_COL_RMII_BIT) \
00121     | BV(PHY_RXCLK_10BTSER_BIT)
00122
00123 #else
00124
00125 /*
00126  * Pin definition for DAVICOM 9161A.
00127  * See schematics for SAM3X-EK evalution board.
00128  */
00129 // Port B
00130 #define PHY_REFCLK_XT2_BIT      0
00131 #define PHY_TXEN_BIT            1
00132 #define PHY_TXD0_BIT            2
00133 #define PHY_TXD1_BIT            3
00134 #define PHY_RXD0_AD0_BIT        5
00135 #define PHY_RXD1_AD1_BIT        6
00136 #define PHY_RXER_RXD4_RPTR_BIT  7
00137 #define PHY_MDC_BIT             8
00138 #define PHY_MDIO_BIT            9
00139 // Port C
00140 #define PHY_RXDV_TESTMODE_BIT   10
00141 // Port A
00142 #define PHY_MDINTR_BIT          5
00143 // Port D -- FIXME: Only on which revision?
00144 #define PHY_PWRDN_BIT           18
00145
00146 #define PHY_MII_PINS_PORTB \
00147     BV(PHY_REFCLK_XT2_BIT) \
00148     | BV(PHY_TXEN_BIT) \
00149     | BV(PHY_TXD0_BIT) \
00150     | BV(PHY_TXD1_BIT) \
00151     | BV(PHY_RXD0_AD0_BIT) \
00152     | BV(PHY_RXD1_AD1_BIT) \
00153     | BV(PHY_RXER_RXD4_RPTR_BIT) \
00154     | BV(PHY_MDC_BIT) \
00155     | BV(PHY_MDIO_BIT)
00156
00157 #define PHY_MII_PINS_PORTC \
00158     BV(PHY_RXDV_TESTMODE_BIT)
00159
00160 #endif /* CPU_ARM_AT91 */
00161 // \}
00162
00163
00164 #define EMAC_TX_BUFSIZ          1518  //!!! Don't change this
00165 #define EMAC_TX_BUFFERS         1     //!!! Don't change this
00166 #define EMAC_TX_DESCRIPTORS     EMAC_TX_BUFFERS
00167
00168 #define EMAC_RX_BUFFERS         32    //!!! Don't change this
00169 #define EMAC_RX_BUFSIZ          128   //!!! Don't change this
00170 #define EMAC_RX_DESCRIPTORS EMAC_RX_BUFFERS
00171
00172 // Flag to manage local tx buffer
00173 #define TXS_USED            0x80000000  //Used buffer.
00174 #define TXS_WRAP            0x40000000  //Last descriptor.
00175 #define TXS_ERROR           0x20000000  //Retry limit exceeded.
00176 #define TXS_UNDERRUN        0x10000000  //Transmit underrun.
00177 #define TXS_NO_BUFFER       0x08000000  //Buffer exhausted.
00178 #define TXS_NO_CRC          0x00010000  //CRC not appended.
00179 #define TXS_LAST_BUFF       0x00008000  //Last buffer of frame.
00180 #define TXS_LENGTH_FRAME    0x000007FF  // Length of frame including FCS.
00181
00182 // Flag to manage local rx buffer
00183 #define RXBUF_OWNERSHIP     0x00000001
00184 #define RXBUF_WRAP          0x00000002
00185
00186 #define BUF_ADDRMASK        0xFFFFFFFC
00187
00188 #define RXS_BROADCAST_ADDR  0x80000000  // Broadcast address detected.
00189 #define RXS_MULTICAST_HASH  0x40000000  // Multicast hash match.
00190 #define RXS_UNICAST_HASH    0x20000000  // Unicast hash match.
00191 #define RXS_EXTERNAL_ADDR   0x10000000  // External address match.
00192 #define RXS_SA1_ADDR        0x04000000  // Specific address register 1 match.
00193 #define RXS_SA2_ADDR        0x02000000  // Specific address register 2 match.
00194 #define RXS_SA3_ADDR        0x01000000  // Specific address register 3 match.
00195 #define RXS_SA4_ADDR        0x00800000  // Specific address register 4 match.
00196 #define RXS_TYPE_ID         0x00400000  // Type ID match.
00197 #define RXS_VLAN_TAG        0x00200000  // VLAN tag detected.
00198 #define RXS_PRIORITY_TAG    0x00100000  // Priority tag detected.
00199 #define RXS_VLAN_PRIORITY   0x000E0000  // VLAN priority.
00200 #define RXS_CFI_IND         0x00010000  // Concatenation format indicator.
00201 #define RXS_EOF             0x00008000  // End of frame.
00202 #define RXS_SOF             0x00004000  // Start of frame.
00203 #define RXS_RBF_OFFSET      0x00003000  // Receive buffer offset mask.
00204 #define RXS_LENGTH_FRAME    0x000007FF  // Length of frame including FCS.
00205
00206 #define EMAC_RSR_BITS   (BV(EMAC_BNA) | BV(EMAC_REC) | BV(EMAC_OVR))
00207 #define EMAC_TSR_BITS   (BV(EMAC_UBR) | BV(EMAC_COL) | BV(EMAC_RLES) | \
00208             BV(EMAC_BEX) | BV(EMAC_COMP) | BV(EMAC_UND))
00209
00210 typedef struct BufDescriptor
00211 {
00212     volatile uint32_t addr;
00213     volatile uint32_t stat;
00214 } BufDescriptor;
00215
00216 #endif /* ETH_SAM3_H */


BeRTOS: event.c File Reference

  • mware
Functions
event.c File Reference

Events handling implementation. More...

#include "event.h"
#include "cfg/cfg_signal.h"
#include "cfg/cfg_timer.h"
#include <drv/timer.h>

Go to the source code of this file.

Functions

bool | event_waitTimeout (Event *e, ticks_t timeout)
Wait the completion of event e or timeout elapses.
int | event_select (Event **evs, int n, ticks_t timeout)
Wait for multiple events.

Detailed Description

Events handling implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file event.c.


BeRTOS: event.c Source File

  • mware
event.c
Go to the documentation of this file.
00001
00040 #include "event.h"
00041 #include "cfg/cfg_signal.h"
00042 #include "cfg/cfg_timer.h"
00043
00044 #include <drv/timer.h> /* timer_clock() */
00045
00046 void event_hook_ignore(UNUSED_ARG(Event *, e))
00047 {
00048 }
00049
00050 void event_hook_softint(Event *e)
00051 {
00052     e->Ev.Int.func(e->Ev.Int.user_data);
00053 }
00054
00055 void event_hook_generic(Event *e)
00056 {
00057     e->Ev.Gen.completed = true;
00058     MEMORY_BARRIER;
00059 }
00060
00061 #if CONFIG_KERN && CONFIG_KERN_SIGNALS
00062 void event_hook_signal(Event *e)
00063 {
00064     sig_post((e)->Ev.Sig.sig_proc, (e)->Ev.Sig.sig_bit);
00065 }
00066
00067 void event_hook_generic_signal(Event *e)
00068 {
00069     sig_postSignal(&e->Ev.Sig.sig, e->Ev.Sig.sig_proc, e->Ev.Sig.sig_bit);
00070 }
00071
00072 /*
00073  * Custom event hook to notify the completion of a event monitored via
00074  * event_select().
00075  */
00076 static void event_hook_generic_multiple_signal(Event *e)
00077 {
00078     sig_post(e->Ev.Sig.sig_proc, e->Ev.Sig.sig_bit);
00079 }
00080
00081 /*
00082  * Custom timer hook to notify the timeout of a event_waitTimeout().
00083  */
00084 static void event_hook_generic_timeout_signal(void *arg)
00085 {
00086     Event *e = (Event *)arg;
00087
00088     sig_postSignal(&e->Ev.Sig.sig, e->Ev.Sig.sig_proc, SIG_TIMEOUT);
00089 }
00090
00091 /*
00092  * event_waitTimeout() slow path: this function put the current process to
00093  * sleep until the event is notified. The timeout is managed using the custom
00094  * timer hook event_hook_generic_timeout_signal(): if the timeout expires the
00095  * signal SIG_TIMEOUT is notified via sig_post() to the sigmask embedded in the
00096  * event.
00097  *
00098  * The custom timer hook is required because the default timer's behaviour is
00099  * to use the process's sigmask to notify the completion of an event, that is
00100  * not suitable for this case, because we're sleeping on the event's sigmask
00101  * instead.
00102  */
00103 static NOINLINE bool event_waitTimeoutSlowPath(Event *e, ticks_t timeout)
00104 {
00105     bool ret;
00106
00107     e->Ev.Sig.sig_proc = proc_current();
00108     ret = (sig_waitTimeoutSignal(&e->Ev.Sig.sig,
00109             EVENT_GENERIC_SIGNAL, timeout,
00110             event_hook_generic_timeout_signal, e) & SIG_TIMEOUT) ?
00111             false : true;
00112     return ret;
00113 }
00114
00115 bool event_waitTimeout(Event *e, ticks_t timeout)
00116 {
00117     /*
00118      * Fast path: check if the event already happened and return
00119      * immediately in this case.
00120      */
00121     if (sig_checkSignal(&e->Ev.Sig.sig,
00122             EVENT_GENERIC_SIGNAL) == EVENT_GENERIC_SIGNAL)
00123         return true;
00124     return event_waitTimeoutSlowPath(e, timeout);
00125 }
00126
00127 /*
00128  * event_select() slow path: this function handles the case when any event was
00129  * not yet notified, so it takes care of making the current process to sleep on
00130  * the list of events, mapping them to a different signal bit and issuing a
00131  * call to sig_waitTimeout() using the process's sigmask.
00132  */
00133 static NOINLINE int event_selectSlowPath(Event **evs, int n, ticks_t timeout)
00134 {
00135     sigmask_t mask = (1 << n) - 1;
00136     int i;
00137
00138     for (i = 0; i < n; i++)
00139     {
00140         Event *e = evs[i];
00141
00142         /* Map each event to a distinct signal bit */
00143         e->Ev.Sig.sig_proc = proc_current();
00144         e->Ev.Sig.sig_bit = 1 << i;
00145         e->action = event_hook_generic_multiple_signal;
00146     }
00147     IRQ_ENABLE;
00148
00149     mask = timeout ? sig_waitTimeout(mask, timeout) : sig_wait(mask);
00150     if (mask & SIG_TIMEOUT)
00151         return -1;
00152     return UINT8_LOG2(mask);
00153 }
00154
00155 int event_select(Event **evs, int n, ticks_t timeout)
00156 {
00157     int i;
00158
00159     ASSERT(n <= SIG_USER_MAX);
00160
00161     IRQ_DISABLE;
00162     /* Fast path: check if one of the event already happened */
00163     for (i = 0; i < n; i++)
00164     {
00165         Event *e = evs[i];
00166
00167         if (__sig_checkSignal(&e->Ev.Sig.sig,
00168                 EVENT_GENERIC_SIGNAL) == EVENT_GENERIC_SIGNAL)
00169         {
00170             IRQ_ENABLE;
00171             return i;
00172         }
00173     }
00174     /* Otherwise, fallback to the slow path */
00175     return event_selectSlowPath(evs, n, timeout);
00176 }
00177 #else /* !(CONFIG_KERN && CONFIG_KERN_SIGNALS) */
00178 bool event_waitTimeout(Event *e, ticks_t timeout)
00179 {
00180     ticks_t end = timer_clock() + timeout;
00181     bool ret;
00182
00183     while ((ACCESS_SAFE(e->Ev.Gen.completed) == false) ||
00184             TIMER_AFTER(timer_clock(), end))
00185         cpu_relax();
00186     ret = e->Ev.Gen.completed;
00187     e->Ev.Gen.completed = false;
00188     MEMORY_BARRIER;
00189
00190     return ret;
00191 }
00192
00193 int event_select(Event **evs, int n, ticks_t timeout)
00194 {
00195     ticks_t end = timer_clock() + timeout;
00196     int i;
00197
00198     while (1)
00199     {
00200         for (i = 0; i < n; i++)
00201         {
00202             Event *e = evs[i];
00203             if (ACCESS_SAFE(e->Ev.Gen.completed) == true)
00204             {
00205                 e->Ev.Gen.completed = false;
00206                 MEMORY_BARRIER;
00207                 return i;
00208             }
00209         }
00210         if (timeout && TIMER_AFTER(timer_clock(), end))
00211             break;
00212         cpu_relax();
00213     }
00214     return -1;
00215 }
00216 #endif /* CONFIG_KERN && CONFIG_KERN_SIGNALS */


BeRTOS: event.h File Reference

  • mware
Defines | Functions
event.h File Reference
#include <cfg/compiler.h>
#include "cfg/cfg_proc.h"
#include "cfg/cfg_signal.h"
#include "cfg/cfg_timer.h"
#include <cpu/power.h>

Go to the source code of this file.

Defines

#define | event_initNone(e) ((e)->action = event_hook_ignore)
Initialize the event e as a no-op.
#define | event_initSoftint(e, f, u) ((e)->action = event_hook_softint,(e)->Ev.Int.func = (f), (e)->Ev.Int.user_data = (u))
Initialize the event e with a software interrupt (call function f, with parameter u)

Functions

Event | event_createNone (void)
Same as event_initNone(), but returns the initialized event.
Event | event_createSoftint (Hook func, void *user_data)
Same as event_initSoftint(), but returns the initialized event.
Event | event_createGeneric (void)
Create a generic sleepable event.
void | event_wait (Event *e)
Wait the completion of event e.
int | event_select (Event **evs, int n, ticks_t timeout)
Wait for multiple events.
bool | event_waitTimeout (Event *e, ticks_t timeout)
Wait the completion of event e or timeout elapses.
void | event_do (struct Event *e)
Trigger an event.

Detailed Description

Definition in file event.h.


BeRTOS: event.h Source File

  • mware
event.h
Go to the documentation of this file.
00001
00137 #ifndef KERN_EVENT_H
00138 #define KERN_EVENT_H
00139
00140 #include <cfg/compiler.h>
00141 #include "cfg/cfg_proc.h"
00142 #include "cfg/cfg_signal.h"
00143 #include "cfg/cfg_timer.h"
00144
00145 #include <cpu/power.h> /* cpu_relax() */
00146
00147 #if CONFIG_KERN && CONFIG_KERN_SIGNALS
00148 #include <kern/signal.h>
00149 /* Forward decl */
00150 struct Process;
00151 #endif
00152
00153 typedef struct Event
00154 {
00155     void (*action)(struct Event *);
00156     union
00157     {
00158 #if CONFIG_KERN && CONFIG_KERN_SIGNALS
00159         struct
00160         {
00161             struct Process *sig_proc;  /* Process to be signalled */
00162             sigbit_t        sig_bit;   /* Signal to send */
00163             Signal          sig;       /* Local signal structure (used by generic event) */
00164         } Sig;
00165 #endif
00166         struct
00167         {
00168             Hook  func;         /* Pointer to softint hook */
00169             void *user_data;    /* Data to be passed back to user hook */
00170         } Int;
00171
00172         struct
00173         {
00174             bool completed;             /* Generic event completion */
00175         } Gen;
00176     } Ev;
00177 } Event;
00178
00179 void event_hook_ignore(Event *event);
00180 void event_hook_signal(Event *event);
00181 void event_hook_softint(Event *event);
00182 void event_hook_generic(Event *event);
00183 void event_hook_generic_signal(Event *event);
00184
00186 #define event_initNone(e) \
00187     ((e)->action = event_hook_ignore)
00188
00190 INLINE Event event_createNone(void)
00191 {
00192     Event e;
00193     e.action = event_hook_ignore;
00194     return e;
00195 }
00196
00198 #define event_initSoftint(e,f,u) \
00199     ((e)->action = event_hook_softint,(e)->Ev.Int.func = (f), (e)->Ev.Int.user_data = (u))
00200
00202 INLINE Event event_createSoftint(Hook func, void *user_data)
00203 {
00204     Event e;
00205     e.action = event_hook_softint;
00206     e.Ev.Int.func = func;
00207     e.Ev.Int.user_data = user_data;
00208     return e;
00209 }
00210
00211 #if CONFIG_KERN && CONFIG_KERN_SIGNALS
00212
00213 #define event_initSignal(e,p,s) \
00214     ((e)->action = event_hook_signal,(e)->Ev.Sig.sig_proc = (p), (e)->Ev.Sig.sig_bit = (s))
00215
00217 INLINE Event event_createSignal(struct Process *proc, sigbit_t bit)
00218 {
00219     Event e;
00220     e.action = event_hook_signal;
00221     e.Ev.Sig.sig_proc = proc;
00222     e.Ev.Sig.sig_bit = bit;
00223     return e;
00224 }
00225
00229 #define EVENT_GENERIC_SIGNAL    SIG_SYSTEM6
00230
00232 #define event_initGeneric(e)                    \
00233     ((e)->action = event_hook_generic_signal,       \
00234         (e)->Ev.Sig.sig_proc = proc_current(),      \
00235         (e)->Ev.Sig.sig_bit = EVENT_GENERIC_SIGNAL, \
00236         (e)->Ev.Sig.sig.wait = 0, (e)->Ev.Sig.sig.recv = 0)
00237 #else
00238 #define event_initGeneric(e) \
00239     ((e)->action = event_hook_generic, (e)->Ev.Gen.completed = false)
00240 #endif
00241
00247 INLINE Event event_createGeneric(void)
00248 {
00249     Event e;
00250     event_initGeneric(&e);
00251     return e;
00252 }
00253
00261 INLINE void event_wait(Event *e)
00262 {
00263 #if CONFIG_KERN_SIGNALS
00264     e->Ev.Sig.sig_proc = proc_current();
00265     sig_waitSignal(&e->Ev.Sig.sig, EVENT_GENERIC_SIGNAL);
00266 #else
00267     while (ACCESS_SAFE(e->Ev.Gen.completed) == false)
00268         cpu_relax();
00269     e->Ev.Gen.completed = false;
00270     MEMORY_BARRIER;
00271 #endif
00272 }
00273
00284 int event_select(Event **evs, int n, ticks_t timeout);
00285
00291 bool event_waitTimeout(Event *e, ticks_t timeout);
00292
00301 INLINE void event_do(struct Event *e)
00302 {
00303     e->action(e);
00304 }
00305
00308 #endif /* KERN_EVENT_H */


BeRTOS: except.h File Reference

  • mware
Defines | Variables
except.h File Reference

C++-like structured exception handling for C programs. More...

#include <cfg/debug.h>
#include <setjmp.h>

Go to the source code of this file.

Defines

#define | TRY if (PUSH_EXCEPT) { {
Jump buffer to use when throwing an exception or aborting an operation.

Variables

jmp_buf | except_stack [EXCEPT_CONTEXTS]
A stack of jump buffers used to record try sites so they can be reached from throw sites.

Detailed Description

C++-like structured exception handling for C programs.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file except.h.

Define Documentation

#define TRY if (PUSH_EXCEPT) { {

Jump buffer to use when throwing an exception or aborting an operation.

User code can throw exceptions like this:

   void a_function_throwing_exceptions(void)
   {
       if (some_error_condition)
          THROW;
   }

Catching exceptions (brackets are optional):

    EXCEPT_DEFINE;

    void a_function_catching_an_exception(void)
    {
        TRY
        {
            printf("Entered try block\n");
            a_function_throwing_exceptions();
            printf("Survived execution of critical code\n");
        }
        CATCH
        {
            printf("Exception caught!\n");
        }
        CATCH_END
    }

Simple syntax when you don't need to do anything when catching an excaption:

    TRY
        printf("Entered try block\n");
        a_function_throwing_exceptions();
        printf("Survived execution of critical code\n");
    TRY_END

You also need to declare the exception stack once in your global declarations:

    EXCEPT_DEFINE;

Definition at line 113 of file except.h.

Variable Documentation

jmp_buf except_stack[EXCEPT_CONTEXTS]

A stack of jump buffers used to record try sites so they can be reached from throw sites.

The stack contains return points for each nested context. jmp_buf's are pushed into the stack at try points and popped out when the try block ends normally or when an exception is thrown.


BeRTOS: except.h Source File

  • mware
except.h
Go to the documentation of this file.
00001
00038 #ifndef MWARE_EXCEPT_H
00039 #define MWARE_EXCEPT_H
00040
00041 #include <cfg/debug.h>
00042
00043 #include <setjmp.h>
00044
00045 #define EXCEPT_CONTEXTS 8
00046
00056 extern jmp_buf except_stack[EXCEPT_CONTEXTS];
00057 extern int except_top;
00058
00059 #define PUSH_EXCEPT (ASSERT(except_top < EXCEPT_CONTEXTS), setjmp(except_stack[except_top++]))
00060 #define POP_EXCEPT  (ASSERT(except_top > 0), --except_top)
00061 #define DO_EXCEPT   (ASSERT(except_top > 0), longjmp(except_stack[--except_top], true))
00062
00113 #define TRY          if (PUSH_EXCEPT) { {
00114 #define TRY_END      } POP_EXCEPT; }
00115 #define CATCH        } POP_EXCEPT; } else {
00116 #define CATCH_END    }
00117 #define THROW        DO_EXCEPT
00118
00119
00120 #define EXCEPT_DEFINE \
00121     jmp_buf except_stack[EXCEPT_CONTEXTS]; \
00122     int except_top;
00123
00124 #endif /* MWARE_EXCEPT_H */


BeRTOS: fat.c File Reference

  • fs
Functions
fat.c File Reference

FatFS: kfile interface for FatFS module by ChaN. More...

#include "fat.h"

Go to the source code of this file.

Functions

FRESULT fatfile_open (FatFile *file, const char *file_path, BYTE mode)
Initialize file and open file_path for reading.

Detailed Description

FatFS: kfile interface for FatFS module by ChaN.

Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file fat.c.

Function Documentation

FRESULT fatfile_open | ( | FatFile * | file,
 |  | const char * | file_path,
 |  | BYTE | mode
 | ) |  |

Initialize file and open file_path for reading.

mode is a OR combination of various flags, you can use FA_READ for read access or FA_WRITE for write access. The function returns FR_OK if success, other values (defined in ff.h) in case of failure.

Parameters:
file | A pointer to a FatFile structure.
file_path | The file path on the filesystem.
mode | Open mode for the file, which can be OR'ed together
See also:
ff.h for return code meaning and mode flags.

Definition at line 130 of file fat.c.


BeRTOS: fat.c Source File

  • fs
fat.c
Go to the documentation of this file.
00001
00040 #include "fat.h"
00041
00042 static size_t fatfile_read(struct KFile *_fd, void *buf, size_t size)
00043 {
00044     FatFile *fd = FATFILE_CAST(_fd);
00045     UINT count;
00046     fd->error_code = f_read(&fd->fat_file, buf, size, &count);
00047     return count;
00048 }
00049
00050 static size_t fatfile_write(struct KFile *_fd, const void *buf, size_t size)
00051 {
00052     FatFile *fd = FATFILE_CAST(_fd);
00053     UINT count;
00054     fd->error_code = f_write(&fd->fat_file, buf, size, &count);
00055     return count;
00056 }
00057
00058 static int fatfile_close(struct KFile *_fd)
00059 {
00060     FatFile *fd = FATFILE_CAST(_fd);
00061     fd->error_code = f_close(&fd->fat_file);
00062     if (fd->error_code)
00063         return EOF;
00064     else
00065         return 0;
00066 }
00067
00068 static kfile_off_t fatfile_seek(struct KFile *_fd, kfile_off_t offset, KSeekMode whence)
00069 {
00070     /* clip at start-of-file
00071      * don't clip at end-of-file when in write mode
00072      */
00073     FatFile *fd = FATFILE_CAST(_fd);
00074     DWORD lseek_offset = 0;
00075     switch (whence)
00076     {
00077     case KSM_SEEK_SET:
00078         if (offset > 0)
00079             lseek_offset = (DWORD) offset;
00080         break;
00081     case KSM_SEEK_CUR:
00082         if (offset > 0)
00083             lseek_offset = fd->fat_file.fptr + (DWORD) offset;
00084         else
00085         {
00086             if (fd->fat_file.fptr > (DWORD) (-offset))
00087                 lseek_offset = fd->fat_file.fptr - (DWORD)(-offset);
00088         }
00089         break;
00090     case KSM_SEEK_END:
00091         if (offset > 0)
00092             lseek_offset = fd->fat_file.fsize + (DWORD) offset;
00093         else
00094         {
00095             if (fd->fat_file.fsize > (DWORD) (-offset))
00096                 lseek_offset = fd->fat_file.fsize + (DWORD) offset;
00097         }
00098         break;
00099     }
00100     fd->error_code = f_lseek(&fd->fat_file, lseek_offset);
00101     if ((fd->error_code) || (fd->fat_file.fptr != lseek_offset))
00102         return EOF;
00103     else
00104         /* TODO: this conversion may overflow */
00105         return (kfile_off_t)fd->fat_file.fptr;
00106 }
00107
00108 static int fatfile_flush(struct KFile *_fd)
00109 {
00110     FatFile *fd = FATFILE_CAST(_fd);
00111     fd->error_code = f_sync(&fd->fat_file);
00112     if (fd->error_code)
00113         return EOF;
00114     else
00115         return 0;
00116 }
00117
00118 static int fatfile_error(struct KFile *_fd)
00119 {
00120     FatFile *fd = FATFILE_CAST(_fd);
00121     return (int)fd->error_code;
00122 }
00123
00124 static void fatfile_clearerr(struct KFile *_fd)
00125 {
00126     FatFile *fd = FATFILE_CAST(_fd);
00127     fd->error_code = FR_OK;
00128 }
00129
00130 FRESULT fatfile_open(FatFile *file, const char *file_path, BYTE mode)
00131 {
00132     DB(file->fd._type = KFT_FATFILE);
00133     file->fd.read = fatfile_read;
00134     file->fd.write = fatfile_write;
00135     file->fd.reopen = 0;
00136     file->fd.close = fatfile_close;
00137     file->fd.seek = fatfile_seek;
00138     file->fd.flush = fatfile_flush;
00139     file->fd.error = fatfile_error;
00140     file->fd.clearerr = fatfile_clearerr;
00141     return f_open(&file->fat_file, file_path, mode);
00142 }
00143


BeRTOS: fat.h File Reference

  • fs
Functions
fat.h File Reference

FatFS: kfile interface for FatFS module by ChaN. More...

#include <io/kfile.h>
#include "fatfs/ff.h"

Go to the source code of this file.

Functions

FRESULT fatfile_open (FatFile *file, const char *file_path, BYTE mode)
Initialize file and open file_path for reading.

Detailed Description

FatFS: kfile interface for FatFS module by ChaN.

This driver needs some low level hardware access functions. An example implementation is provided in sd.h.

Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file fat.h.

Function Documentation

FRESULT fatfile_open | ( | FatFile * | file,
 |  | const char * | file_path,
 |  | BYTE | mode
 | ) |  |

Initialize file and open file_path for reading.

mode is a OR combination of various flags, you can use FA_READ for read access or FA_WRITE for write access. The function returns FR_OK if success, other values (defined in ff.h) in case of failure.

Parameters:
file | A pointer to a FatFile structure.
file_path | The file path on the filesystem.
mode | Open mode for the file, which can be OR'ed together
See also:
ff.h for return code meaning and mode flags.

Definition at line 130 of file fat.c.


BeRTOS: fat.h Source File

  • fs
fat.h
Go to the documentation of this file.
00001
00047 #ifndef FS_FAT_H
00048 #define FS_FAT_H
00049
00050 #include <io/kfile.h>
00051 #include "fatfs/ff.h"
00052
00053 typedef struct FatFile
00054 {
00055     KFile fd;
00056     FIL fat_file;
00057     FRESULT error_code;
00058 } FatFile;
00059
00060 #define KFT_FATFILE MAKE_ID('F', 'A', 'T', 'F')
00061
00062 INLINE FatFile * FATFILE_CAST(KFile *fd)
00063 {
00064     ASSERT(fd->_type == KFT_FATFILE);
00065     return (FatFile *)fd;
00066 }
00067
00081 FRESULT fatfile_open(FatFile *file, const char *file_path, BYTE mode);
00082
00083 #endif /* FS_FAT_H */
00084


BeRTOS: ff.c Source File

  • fs
  • fatfs
ff.c
00001 /*----------------------------------------------------------------------------/
00002 /  FatFs - FAT file system module  R0.07a                    (C)ChaN, 2009
00003 /-----------------------------------------------------------------------------/
00004 / FatFs module is an open source software to implement FAT file system to
00005 / small embedded systems. This is a free software and is opened for education,
00006 / research and commercial developments under license policy of following trems.
00007 /
00008 /  Copyright (C) 2009, ChaN, all right reserved.
00009 /
00010 / * The FatFs module is a free software and there is NO WARRANTY.
00011 / * No restriction on use. You can use, modify and redistribute it for
00012 /   personal, non-profit or commercial use UNDER YOUR RESPONSIBILITY.
00013 / * Redistributions of source code must retain the above copyright notice.
00014 //-----------------------------------------------------------------------------/
00015 / Feb 26,'06 R0.00  Prototype.
00016 /
00017 / Apr 29,'06 R0.01  First stable version.
00018 /
00019 / Jun 01,'06 R0.02  Added FAT12 support.
00020 /                   Removed unbuffered mode.
00021 /                   Fixed a problem on small (<32M) patition.
00022 / Jun 10,'06 R0.02a Added a configuration option (_FS_MINIMUM).
00023 /
00024 / Sep 22,'06 R0.03  Added f_rename().
00025 /                   Changed option _FS_MINIMUM to _FS_MINIMIZE.
00026 / Dec 11,'06 R0.03a Improved cluster scan algolithm to write files fast.
00027 /                   Fixed f_mkdir() creates incorrect directory on FAT32.
00028 /
00029 / Feb 04,'07 R0.04  Supported multiple drive system.
00030 /                   Changed some interfaces for multiple drive system.
00031 /                   Changed f_mountdrv() to f_mount().
00032 /                   Added f_mkfs().
00033 / Apr 01,'07 R0.04a Supported multiple partitions on a plysical drive.
00034 /                   Added a capability of extending file size to f_lseek().
00035 /                   Added minimization level 3.
00036 /                   Fixed an endian sensitive code in f_mkfs().
00037 / May 05,'07 R0.04b Added a configuration option _USE_NTFLAG.
00038 /                   Added FSInfo support.
00039 /                   Fixed DBCS name can result FR_INVALID_NAME.
00040 /                   Fixed short seek (<= csize) collapses the file object.
00041 /
00042 / Aug 25,'07 R0.05  Changed arguments of f_read(), f_write() and f_mkfs().
00043 /                   Fixed f_mkfs() on FAT32 creates incorrect FSInfo.
00044 /                   Fixed f_mkdir() on FAT32 creates incorrect directory.
00045 / Feb 03,'08 R0.05a Added f_truncate() and f_utime().
00046 /                   Fixed off by one error at FAT sub-type determination.
00047 /                   Fixed btr in f_read() can be mistruncated.
00048 /                   Fixed cached sector is not flushed when create and close
00049 /                   without write.
00050 /
00051 / Apr 01,'08 R0.06  Added fputc(), fputs(), fprintf() and fgets().
00052 /                   Improved performance of f_lseek() on moving to the same
00053 /                   or following cluster.
00054 /
00055 / Apr 01,'09 R0.07  Merged Tiny-FatFs as a buffer configuration option.
00056 /                   Added long file name support.
00057 /                   Added multiple code page support.
00058 /                   Added re-entrancy for multitask operation.
00059 /                   Added auto cluster size selection to f_mkfs().
00060 /                   Added rewind option to f_readdir().
00061 /                   Changed result code of critical errors.
00062 /                   Renamed string functions to avoid name collision.
00063 / Apr 14,'09 R0.07a Separated out OS dependent code on reentrant cfg.
00064 /                   Added multiple sector size support.
00065 /---------------------------------------------------------------------------*/
00066
00067 #include "ff.h"         /* FatFs configurations and declarations */
00068 #include "diskio.h"     /* Declarations of low level disk I/O functions */
00069
00070
00071 /*--------------------------------------------------------------------------
00072
00073    Module Private Definitions
00074
00075 ---------------------------------------------------------------------------*/
00076
00077 #if _FS_REENTRANT
00078 #if _USE_LFN == 1
00079 #error Static LFN work area must not be used in re-entrant configuration.
00080 #endif
00081 #define ENTER_FF(fs)        { if (!lock_fs(fs)) return FR_TIMEOUT; }
00082 #define LEAVE_FF(fs, res)   { unlock_fs(fs, res); return res; }
00083
00084 #else
00085 #define ENTER_FF(fs)
00086 #define LEAVE_FF(fs, res)   return res
00087
00088 #endif
00089
00090 #define ABORT(fs, res)      { fp->flag |= FA__ERROR; LEAVE_FF(fs, res); }
00091
00092 #ifndef NULL
00093 #define NULL    0
00094 #endif
00095
00096
00097 /*--------------------------------------------------------------------------
00098
00099    Private Work Area
00100
00101 ---------------------------------------------------------------------------*/
00102
00103 static
00104 FATFS *FatFs[_DRIVES];  /* Pointer to the file system objects (logical drives) */
00105 static
00106 WORD Fsid;              /* File system mount ID */
00107
00108
00109 #if _USE_LFN == 1   /* LFN with static LFN working buffer */
00110 static
00111 WORD LfnBuf[_MAX_LFN + 1];
00112 #define NAMEBUF(sp,lp)  BYTE sp[12]; WCHAR *lp = LfnBuf
00113 #define INITBUF(dj,sp,lp)   dj.fn = sp; dj.lfn = lp
00114
00115 #elif _USE_LFN > 1  /* LFN with dynamic LFN working buffer */
00116 #define NAMEBUF(sp,lp)  BYTE sp[12]; WCHAR lbuf[_MAX_LFN + 1], *lp = lbuf
00117 #define INITBUF(dj,sp,lp)   dj.fn = sp; dj.lfn = lp
00118
00119 #else               /* No LFN */
00120 #define NAMEBUF(sp,lp)  BYTE sp[12]
00121 #define INITBUF(dj,sp,lp)   dj.fn = sp
00122
00123 #endif
00124
00125
00126
00127
00128 /*--------------------------------------------------------------------------
00129
00130    Private Functions
00131
00132 ---------------------------------------------------------------------------*/
00133
00134
00135 /*-----------------------------------------------------------------------*/
00136 /* String functions                                                      */
00137 /*-----------------------------------------------------------------------*/
00138
00139 /* Copy memory to memory */
00140 static
00141 void mem_cpy (void* dst, const void* src, int cnt) {
00142     char *d = (char*)dst;
00143     const char *s = (const char *)src;
00144     while (cnt--) *d++ = *s++;
00145 }
00146
00147 /* Fill memory */
00148 static
00149 void mem_set (void* dst, int val, int cnt) {
00150     char *d = (char*)dst;
00151     while (cnt--) *d++ = (char)val;
00152 }
00153
00154 /* Compare memory to memory */
00155 static
00156 int mem_cmp (const void* dst, const void* src, int cnt) {
00157     const char *d = (const char *)dst, *s = (const char *)src;
00158     int r = 0;
00159     while (cnt-- && (r = *d++ - *s++) == 0) ;
00160     return r;
00161 }
00162
00163 /* Check if chr is contained in the string */
00164 static
00165 int chk_chr (const char* str, int chr) {
00166     while (*str && *str != chr) str++;
00167     return *str;
00168 }
00169
00170
00171
00172 /*-----------------------------------------------------------------------*/
00173 /* Request/Release grant to access the volume                            */
00174 /*-----------------------------------------------------------------------*/
00175 #if _FS_REENTRANT
00176
00177 static
00178 BOOL lock_fs (
00179     FATFS *fs       /* File system object */
00180 )
00181 {
00182     return ff_req_grant(fs->sobj);
00183 }
00184
00185
00186 static
00187 void unlock_fs (
00188     FATFS *fs,      /* File system object */
00189     FRESULT res     /* Result code to be returned */
00190 )
00191 {
00192     if (res != FR_NOT_ENABLED &&
00193         res != FR_INVALID_DRIVE &&
00194         res != FR_INVALID_OBJECT &&
00195         res != FR_TIMEOUT) {
00196         ff_rel_grant(fs->sobj);
00197     }
00198 }
00199 #endif
00200
00201
00202
00203 /*-----------------------------------------------------------------------*/
00204 /* Change window offset                                                  */
00205 /*-----------------------------------------------------------------------*/
00206
00207 static
00208 FRESULT move_window (
00209     FATFS *fs,      /* File system object */
00210     DWORD sector    /* Sector number to make apperance in the fs->win[] */
00211 )                   /* Move to zero only writes back dirty window */
00212 {
00213     DWORD wsect;
00214
00215
00216     wsect = fs->winsect;
00217     if (wsect != sector) {  /* Changed current window */
00218 #if !_FS_READONLY
00219         if (fs->wflag) {    /* Write back dirty window if needed */
00220             if (disk_write(fs->drive, fs->win, wsect, 1) != RES_OK)
00221                 return FR_DISK_ERR;
00222             fs->wflag = 0;
00223             if (wsect < (fs->fatbase + fs->sects_fat)) {    /* In FAT area */
00224                 BYTE nf;
00225                 for (nf = fs->n_fats; nf >= 2; nf--) {  /* Refrect the change to FAT copy */
00226                     wsect += fs->sects_fat;
00227                     disk_write(fs->drive, fs->win, wsect, 1);
00228                 }
00229             }
00230         }
00231 #endif
00232         if (sector) {
00233             if (disk_read(fs->drive, fs->win, sector, 1) != RES_OK)
00234                 return FR_DISK_ERR;
00235             fs->winsect = sector;
00236         }
00237     }
00238
00239     return FR_OK;
00240 }
00241
00242
00243
00244
00245 /*-----------------------------------------------------------------------*/
00246 /* Clean-up cached data                                                  */
00247 /*-----------------------------------------------------------------------*/
00248 #if !_FS_READONLY
00249 static
00250 FRESULT sync (  /* FR_OK: successful, FR_DISK_ERR: failed */
00251     FATFS *fs   /* File system object */
00252 )
00253 {
00254     FRESULT res;
00255
00256
00257     res = move_window(fs, 0);
00258     if (res == FR_OK) {
00259         /* Update FSInfo sector if needed */
00260         if (fs->fs_type == FS_FAT32 && fs->fsi_flag) {
00261             fs->winsect = 0;
00262             mem_set(fs->win, 0, 512);
00263             ST_WORD(fs->win+BS_55AA, 0xAA55);
00264             ST_DWORD(fs->win+FSI_LeadSig, 0x41615252);
00265             ST_DWORD(fs->win+FSI_StrucSig, 0x61417272);
00266             ST_DWORD(fs->win+FSI_Free_Count, fs->free_clust);
00267             ST_DWORD(fs->win+FSI_Nxt_Free, fs->last_clust);
00268             disk_write(fs->drive, fs->win, fs->fsi_sector, 1);
00269             fs->fsi_flag = 0;
00270         }
00271         /* Make sure that no pending write process in the physical drive */
00272         if (disk_ioctl(fs->drive, CTRL_SYNC, (void*)NULL) != RES_OK)
00273             res = FR_DISK_ERR;
00274     }
00275
00276     return res;
00277 }
00278 #endif
00279
00280
00281
00282
00283 /*-----------------------------------------------------------------------*/
00284 /* Get a cluster status                                                  */
00285 /*-----------------------------------------------------------------------*/
00286
00287 static
00288 DWORD get_cluster ( /* 0xFFFFFFFF:Disk error, 1:Interal error, Else:Cluster status */
00289     FATFS *fs,      /* File system object */
00290     DWORD clst      /* Cluster# to get the link information */
00291 )
00292 {
00293     WORD wc, bc;
00294     DWORD fsect;
00295
00296
00297     if (clst < 2 || clst >= fs->max_clust)  /* Check cluster address range */
00298         return 1;
00299
00300     fsect = fs->fatbase;
00301     switch (fs->fs_type) {
00302     case FS_FAT12 :
00303         bc = (WORD)clst * 3 / 2;
00304         if (move_window(fs, fsect + (bc / SS(fs)))) break;
00305         wc = fs->win[bc & (SS(fs) - 1)]; bc++;
00306         if (move_window(fs, fsect + (bc / SS(fs)))) break;
00307         wc |= (WORD)fs->win[bc & (SS(fs) - 1)] << 8;
00308         return (clst & 1) ? (wc >> 4) : (wc & 0xFFF);
00309
00310     case FS_FAT16 :
00311         if (move_window(fs, fsect + (clst / (SS(fs) / 2)))) break;
00312         return LD_WORD(&fs->win[((WORD)clst * 2) & (SS(fs) - 1)]);
00313
00314     case FS_FAT32 :
00315         if (move_window(fs, fsect + (clst / (SS(fs) / 4)))) break;
00316         return LD_DWORD(&fs->win[((WORD)clst * 4) & (SS(fs) - 1)]) & 0x0FFFFFFF;
00317     }
00318
00319     return 0xFFFFFFFF;  /* An error occured at the disk I/O layer */
00320 }
00321
00322
00323
00324
00325 /*-----------------------------------------------------------------------*/
00326 /* Change a cluster status                                               */
00327 /*-----------------------------------------------------------------------*/
00328 #if !_FS_READONLY
00329 static
00330 FRESULT put_cluster (
00331     FATFS *fs,      /* File system object */
00332     DWORD clst,     /* Cluster# to be changed (must be 2 to fs->max_clust-1) */
00333     DWORD val       /* New value to mark the cluster */
00334 )
00335 {
00336     WORD bc;
00337     BYTE *p;
00338     DWORD fsect;
00339     FRESULT res;
00340
00341
00342     if (clst < 2 || clst >= fs->max_clust) {    /* Check cluster address range */
00343         res = FR_INT_ERR;
00344
00345     } else {
00346         fsect = fs->fatbase;
00347         switch (fs->fs_type) {
00348         case FS_FAT12 :
00349             bc = (WORD)clst * 3 / 2;
00350             res = move_window(fs, fsect + (bc / SS(fs)));
00351             if (res != FR_OK) break;
00352             p = &fs->win[bc & (SS(fs) - 1)];
00353             *p = (clst & 1) ? ((*p & 0x0F) | ((BYTE)val << 4)) : (BYTE)val;
00354             bc++;
00355             fs->wflag = 1;
00356             res = move_window(fs, fsect + (bc / SS(fs)));
00357             if (res != FR_OK) break;
00358             p = &fs->win[bc & (SS(fs) - 1)];
00359             *p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F));
00360             break;
00361
00362         case FS_FAT16 :
00363             res = move_window(fs, fsect + (clst / (SS(fs) / 2)));
00364             if (res != FR_OK) break;
00365             ST_WORD(&fs->win[((WORD)clst * 2) & (SS(fs) - 1)], (WORD)val);
00366             break;
00367
00368         case FS_FAT32 :
00369             res = move_window(fs, fsect + (clst / (SS(fs) / 4)));
00370             if (res != FR_OK) break;
00371             ST_DWORD(&fs->win[((WORD)clst * 4) & (SS(fs) - 1)], val);
00372             break;
00373
00374         default :
00375             res = FR_INT_ERR;
00376         }
00377         fs->wflag = 1;
00378     }
00379
00380     return res;
00381 }
00382 #endif /* !_FS_READONLY */
00383
00384
00385
00386
00387 /*-----------------------------------------------------------------------*/
00388 /* Remove a cluster chain                                                */
00389 /*-----------------------------------------------------------------------*/
00390 #if !_FS_READONLY
00391 static
00392 FRESULT remove_chain (
00393     FATFS *fs,          /* File system object */
00394     DWORD clst          /* Cluster# to remove chain from */
00395 )
00396 {
00397     FRESULT res;
00398     DWORD nxt;
00399
00400
00401     if (clst < 2 || clst >= fs->max_clust) {    /* Check cluster address range */
00402         res = FR_INT_ERR;
00403
00404     } else {
00405         res = FR_OK;
00406         while (clst < fs->max_clust) {          /* Not a last link? */
00407             nxt = get_cluster(fs, clst);        /* Get cluster status */
00408             if (nxt == 0) break;                /* Empty cluster? */
00409             if (nxt == 1) { res = FR_INT_ERR; break; }  /* Internal error? */
00410             if (nxt == 0xFFFFFFFF) { res = FR_DISK_ERR; break; }    /* Disk error? */
00411             res = put_cluster(fs, clst, 0);     /* Mark the cluster "empty" */
00412             if (res != FR_OK) break;
00413             if (fs->free_clust != 0xFFFFFFFF) { /* Update FSInfo */
00414                 fs->free_clust++;
00415                 fs->fsi_flag = 1;
00416             }
00417             clst = nxt; /* Next cluster */
00418         }
00419     }
00420
00421     return res;
00422 }
00423 #endif
00424
00425
00426
00427
00428 /*-----------------------------------------------------------------------*/
00429 /* Stretch or create a cluster chain                                     */
00430 /*-----------------------------------------------------------------------*/
00431 #if !_FS_READONLY
00432 static
00433 DWORD create_chain (    /* 0:No free cluster, 1:Internal error, 0xFFFFFFFF:Disk error, >=2:New cluster# */
00434     FATFS *fs,          /* File system object */
00435     DWORD clst          /* Cluster# to stretch. 0 means create a new chain. */
00436 )
00437 {
00438     DWORD cs, ncl, scl, mcl;
00439
00440
00441     mcl = fs->max_clust;
00442     if (clst == 0) {        /* Create new chain */
00443         scl = fs->last_clust;           /* Get suggested start point */
00444         if (scl == 0 || scl >= mcl) scl = 1;
00445     }
00446     else {                  /* Stretch existing chain */
00447         cs = get_cluster(fs, clst);     /* Check the cluster status */
00448         if (cs < 2) return 1;           /* It is an invalid cluster */
00449         if (cs < mcl) return cs;        /* It is already followed by next cluster */
00450         scl = clst;
00451     }
00452
00453     ncl = scl;              /* Start cluster */
00454     for (;;) {
00455         ncl++;                          /* Next cluster */
00456         if (ncl >= mcl) {               /* Wrap around */
00457             ncl = 2;
00458             if (ncl > scl) return 0;    /* No free custer */
00459         }
00460         cs = get_cluster(fs, ncl);      /* Get the cluster status */
00461         if (cs == 0) break;             /* Found a free cluster */
00462         if (cs == 0xFFFFFFFF || cs == 1)/* An error occured */
00463             return cs;
00464         if (ncl == scl) return 0;       /* No free custer */
00465     }
00466
00467     if (put_cluster(fs, ncl, 0x0FFFFFFF))   /* Mark the new cluster "in use" */
00468         return 0xFFFFFFFF;
00469     if (clst != 0) {                        /* Link it to previous one if needed */
00470         if (put_cluster(fs, clst, ncl))
00471             return 0xFFFFFFFF;
00472     }
00473
00474     fs->last_clust = ncl;               /* Update FSINFO */
00475     if (fs->free_clust != 0xFFFFFFFF) {
00476         fs->free_clust--;
00477         fs->fsi_flag = 1;
00478     }
00479
00480     return ncl;     /* Return new cluster number */
00481 }
00482 #endif /* !_FS_READONLY */
00483
00484
00485
00486
00487 /*-----------------------------------------------------------------------*/
00488 /* Get sector# from cluster#                                             */
00489 /*-----------------------------------------------------------------------*/
00490
00491 static
00492 DWORD clust2sect (  /* !=0: sector number, 0: failed - invalid cluster# */
00493     FATFS *fs,      /* File system object */
00494     DWORD clst      /* Cluster# to be converted */
00495 )
00496 {
00497     clst -= 2;
00498     if (clst >= (fs->max_clust - 2)) return 0;      /* Invalid cluster# */
00499     return clst * fs->csize + fs->database;
00500 }
00501
00502
00503
00504
00505 /*-----------------------------------------------------------------------*/
00506 /* Seek directory index                                                  */
00507 /*-----------------------------------------------------------------------*/
00508
00509 static
00510 FRESULT dir_seek (
00511     DIR *dj,        /* Pointer to directory object */
00512     WORD idx        /* Directory index number */
00513 )
00514 {
00515     DWORD clst;
00516     WORD ic;
00517
00518
00519     dj->index = idx;
00520     clst = dj->sclust;
00521     if (clst == 1 || clst >= dj->fs->max_clust) /* Check start cluster range */
00522         return FR_INT_ERR;
00523
00524     if (clst == 0) {    /* Static table */
00525         if (idx >= dj->fs->n_rootdir)       /* Index is out of range */
00526             return FR_INT_ERR;
00527         dj->sect = dj->fs->dirbase + idx / (SS(dj->fs) / 32);
00528     }
00529     else {              /* Dynamic table */
00530         ic = SS(dj->fs) / 32 * dj->fs->csize;   /* Indexes per cluster */
00531         while (idx >= ic) { /* Follow cluster chain */
00532             clst = get_cluster(dj->fs, clst);           /* Get next cluster */
00533             if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */
00534             if (clst < 2 || clst >= dj->fs->max_clust)  /* Reached to end of table or int error */
00535                 return FR_INT_ERR;
00536             idx -= ic;
00537         }
00538         dj->clust = clst;
00539         dj->sect = clust2sect(dj->fs, clst) + idx / (SS(dj->fs) / 32);
00540     }
00541     dj->dir = dj->fs->win + (idx % (SS(dj->fs) / 32)) * 32;
00542
00543     return FR_OK;   /* Seek succeeded */
00544 }
00545
00546
00547
00548
00549 /*-----------------------------------------------------------------------*/
00550 /* Move directory index next                                             */
00551 /*-----------------------------------------------------------------------*/
00552
00553 static
00554 FRESULT dir_next (  /* FR_OK:Succeeded, FR_NO_FILE:End of table, FR_DENIED:EOT and could not streach */
00555     DIR *dj,        /* Pointer to directory object */
00556     BOOL streach    /* FALSE: Do not streach table, TRUE: Streach table if needed */
00557 )
00558 {
00559     DWORD clst;
00560     WORD i;
00561
00562
00563     i = dj->index + 1;
00564     if (!i || !dj->sect)    /* Report EOT when index has reached 65535 */
00565         return FR_NO_FILE;
00566
00567     if (!(i % (SS(dj->fs) / 32))) { /* Sector changed? */
00568         dj->sect++;                 /* Next sector */
00569
00570         if (dj->sclust == 0) {  /* Static table */
00571             if (i >= dj->fs->n_rootdir) /* Report EOT when end of table */
00572                 return FR_NO_FILE;
00573         }
00574         else {                  /* Dynamic table */
00575             if (((i / (SS(dj->fs) / 32)) & (dj->fs->csize - 1)) == 0) { /* Cluster changed? */
00576                 clst = get_cluster(dj->fs, dj->clust);          /* Get next cluster */
00577                 if (clst <= 1) return FR_INT_ERR;
00578                 if (clst == 0xFFFFFFFF) return FR_DISK_ERR;
00579                 if (clst >= dj->fs->max_clust) {                /* When it reached end of dinamic table */
00580 #if !_FS_READONLY
00581                     BYTE c;
00582                     if (!streach) return FR_NO_FILE;            /* When do not streach, report EOT */
00583                     clst = create_chain(dj->fs, dj->clust);     /* Streach cluster chain */
00584                     if (clst == 0) return FR_DENIED;            /* No free cluster */
00585                     if (clst == 1) return FR_INT_ERR;
00586                     if (clst == 0xFFFFFFFF) return FR_DISK_ERR;
00587                     /* Clean-up streached table */
00588                     if (move_window(dj->fs, 0)) return FR_DISK_ERR; /* Flush active window */
00589                     mem_set(dj->fs->win, 0, SS(dj->fs));            /* Clear window buffer */
00590                     dj->fs->winsect = clust2sect(dj->fs, clst); /* Cluster start sector */
00591                     for (c = 0; c < dj->fs->csize; c++) {       /* Fill the new cluster with 0 */
00592                         dj->fs->wflag = 1;
00593                         if (move_window(dj->fs, 0)) return FR_DISK_ERR;
00594                         dj->fs->winsect++;
00595                     }
00596                     dj->fs->winsect -= c;                       /* Rewind window address */
00597 #else
00598                     return FR_NO_FILE;          /* Report EOT */
00599 #endif
00600                 }
00601                 dj->clust = clst;               /* Initialize data for new cluster */
00602                 dj->sect = clust2sect(dj->fs, clst);
00603             }
00604         }
00605     }
00606
00607     dj->index = i;
00608     dj->dir = dj->fs->win + (i % (SS(dj->fs) / 32)) * 32;
00609
00610     return FR_OK;
00611 }
00612
00613
00614
00615
00616 /*-----------------------------------------------------------------------*/
00617 /* Test/Pick/Fit an LFN segment from/to directory entry                  */
00618 /*-----------------------------------------------------------------------*/
00619 #if _USE_LFN
00620 static
00621 const BYTE LfnOfs[] = {1,3,5,7,9,14,16,18,20,22,24,28,30};  /* Offset of LFN chars in the directory entry */
00622
00623
00624 static
00625 BOOL test_lfn (         /* TRUE:Matched, FALSE:Not matched */
00626     WCHAR *lfnbuf,      /* Pointer to the LFN to be compared */
00627     BYTE *dir           /* Pointer to the directory entry containing a part of LFN */
00628 )
00629 {
00630     int i, s;
00631     WCHAR wc1, wc2;
00632
00633
00634     i = ((dir[LDIR_Ord] & 0xBF) - 1) * 13;  /* Offset in the LFN buffer */
00635     s = 0;
00636     do {
00637         if (i >= _MAX_LFN) return FALSE;    /* Out of buffer range? */
00638         wc1 = LD_WORD(dir+LfnOfs[s]);       /* Get both characters to compare */
00639         wc2 = lfnbuf[i++];
00640         if (IsLower(wc1)) wc1 -= 0x20;      /* Compare it (ignore case) */
00641         if (IsLower(wc2)) wc2 -= 0x20;
00642         if (wc1 != wc2) return FALSE;
00643     } while (++s < 13 && wc1);              /* Repeat until last char or a NUL char is processed */
00644
00645     return TRUE;                            /* The LFN entry matched */
00646 }
00647
00648
00649
00650 static
00651 BOOL pick_lfn (         /* TRUE:Succeeded, FALSE:Buffer overflow */
00652     WCHAR *lfnbuf,      /* Pointer to the Unicode-LFN buffer */
00653     BYTE *dir           /* Pointer to the directory entry */
00654 )
00655 {
00656     int i, s;
00657     WCHAR wchr;
00658
00659
00660     i = ((dir[LDIR_Ord] & 0xBF) - 1) * 13;  /* Offset in the LFN buffer */
00661     s = 0;
00662     do {
00663         wchr = LD_WORD(dir+LfnOfs[s]);      /* Get an LFN char */
00664         if (!wchr) break;                   /* End of LFN? */
00665         if (i >= _MAX_LFN) return FALSE;    /* Buffer overflow */
00666         lfnbuf[i++] = wchr;                 /* Store it */
00667     } while (++s < 13);                     /* Repeat until last char is copied */
00668     if (dir[LDIR_Ord] & 0x40) lfnbuf[i] = 0;    /* Put terminator if last LFN entry */
00669
00670     return TRUE;
00671 }
00672
00673
00674 #if !_FS_READONLY
00675 static
00676 void fit_lfn (
00677     const WCHAR *lfnbuf,    /* Pointer to the LFN buffer */
00678     BYTE *dir,              /* Pointer to the directory entry */
00679     BYTE ord,               /* LFN order (1-20) */
00680     BYTE sum                /* SFN sum */
00681 )
00682 {
00683     int i, s;
00684     WCHAR wchr;
00685
00686
00687     dir[LDIR_Chksum] = sum;         /* Set check sum */
00688     dir[LDIR_Attr] = AM_LFN;        /* Set attribute. LFN entry */
00689     dir[LDIR_Type] = 0;
00690     ST_WORD(dir+LDIR_FstClusLO, 0);
00691
00692     i = (ord - 1) * 13;             /* Offset in the LFN buffer */
00693     s = wchr = 0;
00694     do {
00695         if (wchr != 0xFFFF) wchr = lfnbuf[i++]; /* Get an effective char */
00696         ST_WORD(dir+LfnOfs[s], wchr);   /* Put it */
00697         if (!wchr) wchr = 0xFFFF;   /* Padding chars following last char */
00698     } while (++s < 13);
00699     if (wchr == 0xFFFF || !lfnbuf[i]) ord |= 0x40;/* Bottom LFN part is the start of LFN sequence */
00700     dir[LDIR_Ord] = ord;            /* Set the LFN order */
00701 }
00702
00703 #endif
00704 #endif
00705
00706
00707
00708 /*-----------------------------------------------------------------------*/
00709 /* Create numbered name                                                  */
00710 /*-----------------------------------------------------------------------*/
00711 #if _USE_LFN
00712 void gen_numname (
00713     BYTE *dst,          /* Pointer to genartated SFN */
00714     const BYTE *src,    /* Pointer to source SFN to be modified */
00715     const WCHAR *lfn,   /* Pointer to LFN */
00716     WORD num            /* Sequense number */
00717 )
00718 {
00719     char ns[8];
00720     int i, j;
00721
00722
00723     mem_cpy(dst, src, 11);
00724
00725     if (num > 5) {  /* On many collisions, generate a hash number instead of sequencial number */
00726         do num = (num >> 1) + (num << 15) + (WORD)*lfn++; while (*lfn);
00727     }
00728
00729     /* itoa */
00730     i = 7;
00731     do {
00732         ns[i--] = (num % 10) + '0';
00733         num /= 10;
00734     } while (num);
00735     ns[i] = '~';
00736
00737     /* Append the number */
00738     for (j = 0; j < i && dst[j] != ' '; j++) {
00739         if (IsDBCS1(dst[j])) {
00740             if (j == i - 1) break;
00741             j++;
00742         }
00743     }
00744     do {
00745         dst[j++] = (i < 8) ? ns[i++] : ' ';
00746     } while (j < 8);
00747 }
00748 #endif
00749
00750
00751
00752
00753 /*-----------------------------------------------------------------------*/
00754 /* Calculate sum of an SFN                                               */
00755 /*-----------------------------------------------------------------------*/
00756 #if _USE_LFN
00757 static
00758 BYTE sum_sfn (
00759     const BYTE *dir     /* Ptr to directory entry */
00760 )
00761 {
00762     BYTE sum = 0;
00763     int n = 11;
00764
00765     do sum = (sum >> 1) + (sum << 7) + *dir++; while (--n);
00766     return sum;
00767 }
00768 #endif
00769
00770
00771
00772
00773 /*-----------------------------------------------------------------------*/
00774 /* Find an object in the directory                                       */
00775 /*-----------------------------------------------------------------------*/
00776
00777 static
00778 FRESULT dir_find (
00779     DIR *dj         /* Pointer to the directory object linked to the file name */
00780 )
00781 {
00782     FRESULT res;
00783     BYTE a, c, lfen, ord, sum, *dir;
00784
00785
00786     res = dir_seek(dj, 0);          /* Rewind directory object */
00787     if (res != FR_OK) return res;
00788
00789     ord = sum = 0xFF; lfen = *(dj->fn+11) & 1;
00790     do {
00791         res = move_window(dj->fs, dj->sect);
00792         if (res != FR_OK) break;
00793         dir = dj->dir;                  /* Ptr to the directory entry of current index */
00794         c = dir[DIR_Name];
00795         if (c == 0) { res = FR_NO_FILE; break; }    /* Reached to end of table */
00796         a = dir[DIR_Attr] & AM_MASK;
00797 #if _USE_LFN    /* LFN configuration */
00798         if (c == 0xE5 || c == '.' || ((a & AM_VOL) && a != AM_LFN)) {   /* An entry without valid data */
00799             ord = 0xFF;
00800         } else {
00801             if (a == AM_LFN) {          /* An LFN entry is found */
00802                 if (dj->lfn) {
00803                     if (c & 0x40) {     /* Is it start of LFN sequence? */
00804                         sum = dir[LDIR_Chksum];
00805                         c &= 0xBF; ord = c;     /* LFN start order */
00806                         dj->lfn_idx = dj->index;
00807                     }
00808                     /* Check LFN validity. Compare LFN if it is out of 8.3 format */
00809                     ord = (c == ord && sum == dir[LDIR_Chksum] && (!lfen || test_lfn(dj->lfn, dir))) ? ord - 1 : 0xFF;
00810                 }
00811             } else {                    /* An SFN entry is found */
00812                 if (ord || sum != sum_sfn(dir)) {   /* Did not LFN match? */
00813                     dj->lfn_idx = 0xFFFF;
00814                     ord = 0xFF;
00815                 }
00816                 if (lfen) {             /* Match LFN if it is out of 8.3 format */
00817                     if (ord == 0) break;
00818                 } else {                /* Match SFN if LFN is in 8.3 format */
00819                     if (!mem_cmp(dir, dj->fn, 11)) break;
00820                 }
00821             }
00822         }
00823 #else   /* Non LFN configuration */
00824         if (c != 0xE5 && c != '.' && !(a & AM_VOL) && !mem_cmp(dir, dj->fn, 11)) /* Is it a valid entry? */
00825             break;
00826 #endif
00827         res = dir_next(dj, FALSE);              /* Next entry */
00828     } while (res == FR_OK);
00829
00830     return res;
00831 }
00832
00833
00834
00835
00836 /*-----------------------------------------------------------------------*/
00837 /* Read an object from the directory                                     */
00838 /*-----------------------------------------------------------------------*/
00839 #if _FS_MINIMIZE <= 2
00840 static
00841 FRESULT dir_read (
00842     DIR *dj         /* Pointer to the directory object to store read object name */
00843 )
00844 {
00845     FRESULT res;
00846     BYTE a, c, ord, sum, *dir;
00847
00848
00849     ord = sum = 0xFF;
00850     res = FR_NO_FILE;
00851     while (dj->sect) {
00852         res = move_window(dj->fs, dj->sect);
00853         if (res != FR_OK) break;
00854         dir = dj->dir;                  /* Ptr to the directory entry of current index */
00855         c = dir[DIR_Name];
00856         if (c == 0) { res = FR_NO_FILE; break; }    /* Reached to end of table */
00857         a = dir[DIR_Attr] & AM_MASK;
00858 #if _USE_LFN    /* LFN configuration */
00859         if (c == 0xE5 || c == '.' || ((a & AM_VOL) && a != AM_LFN)) {   /* An entry without valid data */
00860             ord = 0xFF;
00861         } else {
00862             if (a == AM_LFN) {          /* An LFN entry is found */
00863                 if (c & 0x40) {         /* Is it start of LFN sequence? */
00864                     sum = dir[LDIR_Chksum];
00865                     c &= 0xBF; ord = c;
00866                     dj->lfn_idx = dj->index;
00867                 }
00868                 /* Check LFN validity and capture it */
00869                 ord = (c == ord && sum == dir[LDIR_Chksum] && pick_lfn(dj->lfn, dir)) ? ord - 1 : 0xFF;
00870             } else {                    /* An SFN entry is found */
00871                 if (ord || sum != sum_sfn(dir)) /* Is there a valid LFN entry? */
00872                     dj->lfn_idx = 0xFFFF;       /* No LFN. */
00873                 break;
00874             }
00875         }
00876 #else   /* Non LFN configuration */
00877         if (c != 0xE5 && c != '.' && !(a & AM_VOL)) /* Is it a valid entry? */
00878             break;
00879 #endif
00880         res = dir_next(dj, FALSE);              /* Next entry */
00881         if (res != FR_OK) break;
00882     }
00883
00884     if (res != FR_OK) dj->sect = 0;
00885
00886     return res;
00887 }
00888 #endif
00889
00890
00891
00892 /*-----------------------------------------------------------------------*/
00893 /* Register an object to the directory                                   */
00894 /*-----------------------------------------------------------------------*/
00895 #if !_FS_READONLY
00896 static
00897 FRESULT dir_register (  /* FR_OK:Successful, FR_DENIED:No free entry or too many SFN collision, FR_DISK_ERR:Disk error */
00898     DIR *dj             /* Target directory with object name to be created */
00899 )
00900 {
00901     FRESULT res;
00902     BYTE c, *dir;
00903
00904 #if _USE_LFN    /* LFN configuration */
00905     WORD n, ne, is;
00906     BYTE sn[12], *fn, sum;
00907     WCHAR *lfn;
00908
00909     fn = dj->fn; lfn = dj->lfn;
00910     mem_cpy(sn, fn, 12);
00911     if (sn[11] & 1) {       /* When LFN is out of 8.3 format, generate a numbered name */
00912         fn[11] = 0; dj->lfn = NULL;         /* Find only SFN */
00913         for (n = 1; n < 100; n++) {
00914             gen_numname(fn, sn, lfn, n);    /* Generate a numbered name */
00915             res = dir_find(dj);             /* Check if the name collides with existing SFN */
00916             if (res != FR_OK) break;
00917         }
00918         if (n == 100) return FR_DENIED;     /* Abort if too many collisions */
00919         if (res != FR_NO_FILE) return res;  /* Abort if the result is other than 'not collided' */
00920         fn[11] = sn[11]; dj->lfn = lfn;
00921     }
00922     if (sn[11] & 2) {       /* When eliminate LFN, reserve only an SFN entry. */
00923         ne = 1;
00924     } else {                /* Otherwise reserve an SFN + LFN entries. */
00925         for (ne = 0; lfn[ne]; ne++) ;
00926         ne = (ne + 25) / 13;
00927     }
00928
00929     /* Reserve contiguous entries */
00930     res = dir_seek(dj, 0);
00931     if (res != FR_OK) return res;
00932     n = is = 0;
00933     do {
00934         res = move_window(dj->fs, dj->sect);
00935         if (res != FR_OK) break;
00936         c = *dj->dir;   /* Check the entry status */
00937         if (c == 0xE5 || c == 0) {  /* Is it a blank entry? */
00938             if (n == 0) is = dj->index; /* First index of the contigulus entry */
00939             if (++n == ne) break;   /* A contiguous entry that requiered count is found */
00940         } else {
00941             n = 0;                  /* Not a blank entry. Restart to search */
00942         }
00943         res = dir_next(dj, TRUE);   /* Next entry with table streach */
00944     } while (res == FR_OK);
00945
00946     if (res == FR_OK && ne > 1) {   /* Initialize LFN entry if needed */
00947         res = dir_seek(dj, is);
00948         if (res == FR_OK) {
00949             sum = sum_sfn(dj->fn);  /* Sum of the SFN tied to the LFN */
00950             ne--;
00951             do {                    /* Store LFN entries in bottom first */
00952                 res = move_window(dj->fs, dj->sect);
00953                 if (res != FR_OK) break;
00954                 fit_lfn(dj->lfn, dj->dir, (BYTE)ne, sum);
00955                 dj->fs->wflag = 1;
00956                 res = dir_next(dj, FALSE);  /* Next entry */
00957             } while (res == FR_OK && --ne);
00958         }
00959     }
00960
00961 #else   /* Non LFN configuration */
00962     res = dir_seek(dj, 0);
00963     if (res == FR_OK) {
00964         do {    /* Find a blank entry for the SFN */
00965             res = move_window(dj->fs, dj->sect);
00966             if (res != FR_OK) break;
00967             c = *dj->dir;
00968             if (c == 0xE5 || c == 0) break; /* Is it a blank entry? */
00969             res = dir_next(dj, TRUE);       /* Next entry with table streach */
00970         } while (res == FR_OK);
00971     }
00972 #endif
00973
00974     if (res == FR_OK) {     /* Initialize the SFN entry */
00975         res = move_window(dj->fs, dj->sect);
00976         if (res == FR_OK) {
00977             dir = dj->dir;
00978             mem_set(dir, 0, 32);            /* Clean the entry */
00979             mem_cpy(dir, dj->fn, 11);   /* Put SFN */
00980             dir[DIR_NTres] = *(dj->fn+11) & 0x18;   /* Put NT flag */
00981             dj->fs->wflag = 1;
00982         }
00983     }
00984
00985     return res;
00986 }
00987 #endif /* !_FS_READONLY */
00988
00989
00990
00991
00992 /*-----------------------------------------------------------------------*/
00993 /* Remove an object from the directory                                   */
00994 /*-----------------------------------------------------------------------*/
00995 #if !_FS_READONLY && !_FS_MINIMIZE
00996 static
00997 FRESULT dir_remove (    /* FR_OK: Successful, FR_DISK_ERR: A disk error */
00998     DIR *dj             /* Directory object pointing the entry to be removed */
00999 )
01000 {
01001     FRESULT res;
01002
01003 #if _USE_LFN    /* LFN configuration */
01004     WORD i;
01005
01006     i = dj->index;  /* SFN index */
01007     res = dir_seek(dj, (WORD)((dj->lfn_idx == 0xFFFF) ? i : dj->lfn_idx));  /* Goto the SFN or top of the LFN entries */
01008     if (res == FR_OK) {
01009         do {
01010             res = move_window(dj->fs, dj->sect);
01011             if (res != FR_OK) break;
01012             *dj->dir = 0xE5;                /* Mark the entry "deleted" */
01013             dj->fs->wflag = 1;
01014             if (dj->index >= i) break;      /* When SFN is deleted, all entries of the object is deleted. */
01015             res = dir_next(dj, FALSE);      /* Next entry */
01016         } while (res == FR_OK);
01017         if (res == FR_NO_FILE) res = FR_INT_ERR;
01018     }
01019
01020 #else           /* Non LFN configuration */
01021     res = dir_seek(dj, dj->index);
01022     if (res == FR_OK) {
01023         res = move_window(dj->fs, dj->sect);
01024         if (res == FR_OK) {
01025             *dj->dir = 0xE5;                /* Mark the entry "deleted" */
01026             dj->fs->wflag = 1;
01027         }
01028     }
01029 #endif
01030
01031     return res;
01032 }
01033 #endif /* !_FS_READONLY */
01034
01035
01036
01037
01038 /*-----------------------------------------------------------------------*/
01039 /* Pick a segment and create the object name in directory form           */
01040 /*-----------------------------------------------------------------------*/
01041
01042 static
01043 FRESULT create_name (
01044     DIR *dj,            /* Pointer to the directory object */
01045     const char **path   /* Pointer to pointer to the segment in the path string */
01046 )
01047 {
01048 #if _USE_LFN
01049     BYTE c, b, cf, *sfn;
01050     WCHAR w, *lfn;
01051     int i, ni, si, di;
01052     const char *p;
01053
01054     /* Create LFN in Unicode */
01055     si = di = 0;
01056     p = *path;
01057     lfn = dj->lfn;
01058     for (;;) {
01059         w = (BYTE)p[si++];              /* Get a character */
01060         if (w < ' ' || w == '/' || w == '\\') break;    /* Break on end of segment */
01061         if (IsDBCS1(w)) {               /* If it is DBC 1st byte */
01062             c = p[si++];                /* Get 2nd byte */
01063             if (!IsDBCS2(c))            /* Reject invalid DBC */
01064                 return FR_INVALID_NAME;
01065             w = (w << 8) + c;
01066         } else {
01067             if (chk_chr("\"*:<>\?|\x7F", w))    /* Reject unallowable chars for LFN */
01068                 return FR_INVALID_NAME;
01069         }
01070         w = ff_convert(w, 1);           /* Convert OEM to Unicode, store it */
01071         if (!w || di >= _MAX_LFN)       /* Reject invalid code or too long name */
01072             return FR_INVALID_NAME;
01073         lfn[di++] = w;
01074     }
01075     *path = &p[si];                     /* Rerurn pointer to the next segment */
01076     cf = (w < ' ') ? 4 : 0;             /* Set last segment flag if end of path */
01077
01078     while (di) {                        /* Strip trailing spaces and dots */
01079         w = lfn[di - 1];
01080         if (w != ' ' && w != '.') break;
01081         di--;
01082     }
01083     if (!di) return FR_INVALID_NAME;    /* Reject null string */
01084
01085     lfn[di] = 0;                        /* LFN is created */
01086
01087     /* Create SFN in directory form */
01088     sfn = dj->fn;
01089     mem_set(sfn, ' ', 11);
01090     for (si = 0; lfn[si] == ' ' || lfn[si] == '.'; si++) ;  /* Strip leading spaces and dots */
01091     if (si) cf |= 1;
01092     while (di && lfn[di - 1] != '.') di--;  /* Find extension (di<=si: no extension) */
01093
01094     b = i = 0; ni = 8;
01095     for (;;) {
01096         w = lfn[si++];                  /* Get an LFN char */
01097         if (w == 0) break;              /* Break when enf of the LFN */
01098         if (w == ' ' || (w == '.' && si != di)) {   /* Remove spaces and dots */
01099             cf |= 1; continue;
01100         }
01101         if (i >= ni || si == di) {      /* Here is extension or end of SFN */
01102             if (ni == 11) {             /* Extension is longer than 3 bytes */
01103                 cf |= 1; break;
01104             }
01105             if (si != di) cf |= 1;      /* File name is longer than 8 bytes */
01106             if (si > di) break;         /* No extension */
01107             si = di; i = 8; ni = 11;    /* Enter extension section */
01108             b <<= 2; continue;
01109         }
01110         w = ff_convert(w, 0);           /* Unicode -> OEM code */
01111         if (w >= 0x80) cf |= 0x20;      /* If there is any extended char, force create an LFN */
01112         if (w >= 0x100) {               /* Double byte char */
01113             if (i >= ni - 1) {
01114                 cf |= 1; i = ni; continue;
01115             }
01116             sfn[i++] = (BYTE)(w >> 8);
01117         } else {                        /* Single byte char */
01118             if (chk_chr("+,;[=]", w)) { /* Replace unallowable chars for SFN */
01119                 w = '_'; cf |= 1;
01120             } else {
01121                 if (IsUpper(w)) {       /* Large capital */
01122                     b |= 2;
01123                 } else {
01124                     if (IsLower(w)) {   /* Small capital */
01125                         b |= 1; w -= 0x20;
01126                     }
01127                 }
01128             }
01129         }
01130         sfn[i++] = (BYTE)w;
01131     }
01132     if (sfn[0] == 0xE5) sfn[0] = 0x05;  /* When first char collides with 0xE5, replace it with 0x05 */
01133
01134     if (ni == 8) b <<= 2;
01135     if ((cf & 0x21) == 0) { /* When LFN is in 8.3 format without extended char, NT flags are created */
01136         if ((b & 0x03) == 0x01) cf |= 0x10; /* NT flag (Extension has only small capital) */
01137         if ((b & 0x0C) == 0x04) cf |= 0x08; /* NT flag (Filename has only small capital) */
01138         if ((b & 0x0C) != 0x0C && (b & 0x03) != 0x03) cf |= 2;  /* Eliminate LFN when non composite capitals */
01139     }
01140
01141     sfn[11] = cf;       /* SFN is created */
01142
01143 #else
01144     BYTE c, d, b, *sfn;
01145     int ni, si, i;
01146     const char *p;
01147
01148     /* Create file name in directory form */
01149     sfn = dj->fn;
01150     mem_set(sfn, ' ', 11);
01151     si = i = b = 0; ni = 8;
01152     p = *path;
01153     for (;;) {
01154         c = p[si++];
01155         if (c < ' ' || c == '/' || c == '\\') break;    /* Break on end of segment */
01156         if (c == '.' || i >= ni) {
01157             if (ni != 8 || c != '.') return FR_INVALID_NAME;
01158             i = 8; ni = 11;
01159             b <<= 2; continue;
01160         }
01161         if (c >= 0x80) b |= 3;          /* If there is any extended char, eliminate NT flag */
01162         if (IsDBCS1(c)) {               /* If it is DBC 1st byte */
01163             d = p[si++];                /* Get 2nd byte */
01164             if (!IsDBCS2(d) || i >= ni - 1) /* Reject invalid DBC */
01165                 return FR_INVALID_NAME;
01166             sfn[i++] = c;
01167             sfn[i++] = d;
01168         } else {
01169             if (chk_chr(" +,;[=]\"*:<>\?|\x7F", c)) /* Reject unallowable chrs for SFN */
01170                 return FR_INVALID_NAME;
01171             if (IsUpper(c)) {
01172                 b |= 2;
01173             } else {
01174                 if (IsLower(c)) {
01175                     b |= 1; c -= 0x20;
01176                 }
01177             }
01178             sfn[i++] = c;
01179         }
01180     }
01181     *path = &p[si];                     /* Rerurn pointer to the next segment */
01182     c = (c < ' ') ? 4 : 0;              /* Set last segment flag if end of path */
01183
01184     if (!i) return FR_INVALID_NAME;     /* Reject null string */
01185     if (sfn[0] == 0xE5) sfn[0] = 0x05;  /* When first char collides with 0xE5, replace it with 0x05 */
01186
01187     if (ni == 8) b <<= 2;
01188     if ((b & 0x03) == 0x01) c |= 0x10;  /* NT flag (Extension has only small capital) */
01189     if ((b & 0x0C) == 0x04) c |= 0x08;  /* NT flag (Filename has only small capital) */
01190
01191     sfn[11] = c;        /* Store NT flag, File name is created */
01192 #endif
01193
01194     return FR_OK;
01195 }
01196
01197
01198
01199
01200 /*-----------------------------------------------------------------------*/
01201 /* Get file information from directory entry                             */
01202 /*-----------------------------------------------------------------------*/
01203 #if _FS_MINIMIZE <= 1
01204 static
01205 void get_fileinfo (     /* No return code */
01206     DIR *dj,            /* Pointer to the directory object */
01207     FILINFO *fno        /* Pointer to store the file information */
01208 )
01209 {
01210     int i;
01211     BYTE c, nt, *dir;
01212     char *p;
01213
01214
01215     p = fno->fname;
01216     if (dj->sect) {
01217         dir = dj->dir;
01218         nt = dir[DIR_NTres];        /* NT flag */
01219         for (i = 0; i < 8; i++) {   /* Copy file name body */
01220             c = dir[i];
01221             if (c == ' ') break;
01222             if (c == 0x05) c = 0xE5;
01223             if ((nt & 0x08) && IsUpper(c)) c += 0x20;
01224             *p++ = c;
01225         }
01226         if (dir[8] != ' ') {        /* Copy file name extension */
01227             *p++ = '.';
01228             for (i = 8; i < 11; i++) {
01229                 c = dir[i];
01230                 if (c == ' ') break;
01231                 if ((nt & 0x10) && IsUpper(c)) c += 0x20;
01232                 *p++ = c;
01233             }
01234         }
01235         fno->fattrib = dir[DIR_Attr];               /* Attribute */
01236         fno->fsize = LD_DWORD(dir+DIR_FileSize);    /* Size */
01237         fno->fdate = LD_WORD(dir+DIR_WrtDate);      /* Date */
01238         fno->ftime = LD_WORD(dir+DIR_WrtTime);      /* Time */
01239     }
01240     *p = 0;
01241
01242 #if _USE_LFN
01243     p = fno->lfname;
01244     if (p) {
01245         WCHAR wchr, *lfn;
01246
01247         i = 0;
01248         if (dj->sect && dj->lfn_idx != 0xFFFF) {/* Get LFN if available */
01249             lfn = dj->lfn;
01250             while ((wchr = *lfn++) != 0) {      /* Get an LFN char */
01251                 wchr = ff_convert(wchr, 0);     /* Unicode -> OEM code */
01252                 if (!wchr) { i = 0; break; }    /* Conversion error, no LFN */
01253                 if (_DF1S && wchr >= 0x100)     /* Put 1st byte if it is a DBC */
01254                     p[i++] = (char)(wchr >> 8);
01255                 p[i++] = (char)wchr;
01256                 if (i >= fno->lfsize) { i = 0; break; } /* Buffer overrun, no LFN */
01257             }
01258         }
01259         p[i] = 0;   /* Terminator */
01260     }
01261 #endif
01262 }
01263 #endif /* _FS_MINIMIZE <= 1 */
01264
01265
01266
01267
01268 /*-----------------------------------------------------------------------*/
01269 /* Follow a file path                                                    */
01270 /*-----------------------------------------------------------------------*/
01271
01272 static
01273 FRESULT follow_path (   /* FR_OK(0): successful, !=0: error code */
01274     DIR *dj,            /* Directory object to return last directory and found object */
01275     const char *path    /* Full-path string to find a file or directory */
01276 )
01277 {
01278     FRESULT res;
01279     BYTE *dir, last;
01280
01281
01282     if (*path == '/' || *path == '\\' ) path++; /* Strip heading separator */
01283
01284     dj->sclust =                        /* Set start directory (root dir) */
01285         (dj->fs->fs_type == FS_FAT32) ? dj->fs->dirbase : 0;
01286
01287     if ((BYTE)*path < ' ') {            /* Null path means the root directory */
01288         res = dir_seek(dj, 0);
01289         dj->dir = NULL;
01290
01291     } else {                            /* Follow path */
01292         for (;;) {
01293             res = create_name(dj, &path);   /* Get a segment */
01294             if (res != FR_OK) break;
01295             res = dir_find(dj);             /* Find it */
01296             last = *(dj->fn+11) & 4;
01297             if (res != FR_OK) {             /* Could not find the object */
01298                 if (res == FR_NO_FILE && !last)
01299                     res = FR_NO_PATH;
01300                 break;
01301             }
01302             if (last) break;                /* Last segment match. Function completed. */
01303             dir = dj->dir;                  /* There is next segment. Follow the sub directory */
01304             if (!(dir[DIR_Attr] & AM_DIR)) { /* Cannot follow because it is a file */
01305                 res = FR_NO_PATH; break;
01306             }
01307             dj->sclust = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO);
01308         }
01309     }
01310
01311     return res;
01312 }
01313
01314
01315
01316
01317 /*-----------------------------------------------------------------------*/
01318 /* Load boot record and check if it is an FAT boot record                */
01319 /*-----------------------------------------------------------------------*/
01320
01321 static
01322 BYTE check_fs ( /* 0:The FAT boot record, 1:Valid boot record but not an FAT, 2:Not a boot record, 3:Error */
01323     FATFS *fs,  /* File system object */
01324     DWORD sect  /* Sector# (lba) to check if it is an FAT boot record or not */
01325 )
01326 {
01327     if (disk_read(fs->drive, fs->win, sect, 1) != RES_OK)   /* Load boot record */
01328         return 3;
01329     if (LD_WORD(&fs->win[BS_55AA]) != 0xAA55)               /* Check record signature (always placed at offset 510 even if the sector size is >512) */
01330         return 2;
01331
01332     if (!mem_cmp(&fs->win[BS_FilSysType], "FAT", 3))        /* Check FAT signature */
01333         return 0;
01334     if (!mem_cmp(&fs->win[BS_FilSysType32], "FAT32", 5) && !(fs->win[BPB_ExtFlags] & 0x80))
01335         return 0;
01336
01337     return 1;
01338 }
01339
01340
01341
01342
01343 /*-----------------------------------------------------------------------*/
01344 /* Make sure that the file system is valid                               */
01345 /*-----------------------------------------------------------------------*/
01346
01347 static
01348 FRESULT auto_mount (    /* FR_OK(0): successful, !=0: any error occured */
01349     const char **path,  /* Pointer to pointer to the path name (drive number) */
01350     FATFS **rfs,        /* Pointer to pointer to the found file system object */
01351     BYTE chk_wp         /* !=0: Check media write protection for write access */
01352 )
01353 {
01354     FRESULT res;
01355     BYTE vol, fmt, *tbl;
01356     DSTATUS stat;
01357     DWORD bsect, fsize, tsect, mclst;
01358     const char *p = *path;
01359     FATFS *fs;
01360
01361
01362     /* Get logical drive number from the path name */
01363     vol = p[0] - '0';           /* Is there a drive number? */
01364     if (vol <= 9 && p[1] == ':') {
01365         p += 2;                 /* Found a drive number, get and strip it */
01366         *path = p;              /* Return pointer to the path name */
01367     } else {
01368         vol = 0;                /* No drive number is given, use drive number 0 as default */
01369     }
01370
01371     /* Check if the logical drive number is valid or not */
01372     if (vol >= _DRIVES) return FR_INVALID_DRIVE;    /* Is the drive number valid? */
01373     *rfs = fs = FatFs[vol];                 /* Returen pointer to the corresponding file system object */
01374     if (!fs) return FR_NOT_ENABLED;         /* Is the file system object registered? */
01375
01376     ENTER_FF(fs);               /* Lock file system */
01377
01378     if (fs->fs_type) {                      /* If the logical drive has been mounted */
01379         stat = disk_status(fs->drive);
01380         if (!(stat & STA_NOINIT)) {         /* and physical drive is kept initialized (has not been changed), */
01381 #if !_FS_READONLY
01382             if (chk_wp && (stat & STA_PROTECT)) /* Check write protection if needed */
01383                 return FR_WRITE_PROTECTED;
01384 #endif
01385             return FR_OK;                   /* The file system object is valid */
01386         }
01387     }
01388
01389     /* The logical drive must be re-mounted. Following code attempts to mount the volume */
01390
01391     fs->fs_type = 0;                    /* Clear the file system object */
01392     fs->drive = LD2PD(vol);             /* Bind the logical drive and a physical drive */
01393     stat = disk_initialize(fs->drive);  /* Initialize low level disk I/O layer */
01394     if (stat & STA_NOINIT)              /* Check if the drive is ready */
01395         return FR_NOT_READY;
01396 #if _MAX_SS != 512                      /* Get disk sector size if needed */
01397     if (disk_ioctl(fs->drive, GET_SECTOR_SIZE, &SS(fs)) != RES_OK || SS(fs) > _MAX_SS)
01398         return FR_NO_FILESYSTEM;
01399 #endif
01400 #if !_FS_READONLY
01401     if (chk_wp && (stat & STA_PROTECT)) /* Check write protection if needed */
01402         return FR_WRITE_PROTECTED;
01403 #endif
01404     /* Search FAT partition on the drive */
01405     fmt = check_fs(fs, bsect = 0);      /* Check sector 0 as an SFD format */
01406     if (fmt == 1) {                     /* Not an FAT boot record, it may be patitioned */
01407         /* Check a partition listed in top of the partition table */
01408         tbl = &fs->win[MBR_Table + LD2PT(vol) * 16];    /* Partition table */
01409         if (tbl[4]) {                                   /* Is the partition existing? */
01410             bsect = LD_DWORD(&tbl[8]);                  /* Partition offset in LBA */
01411             fmt = check_fs(fs, bsect);                  /* Check the partition */
01412         }
01413     }
01414     if (fmt == 3) return FR_DISK_ERR;
01415     if (fmt || LD_WORD(fs->win+BPB_BytsPerSec) != SS(fs))   /* No valid FAT patition is found */
01416         return FR_NO_FILESYSTEM;
01417
01418     /* Initialize the file system object */
01419     fsize = LD_WORD(fs->win+BPB_FATSz16);               /* Number of sectors per FAT */
01420     if (!fsize) fsize = LD_DWORD(fs->win+BPB_FATSz32);
01421     fs->sects_fat = fsize;
01422     fs->n_fats = fs->win[BPB_NumFATs];                  /* Number of FAT copies */
01423     fsize *= fs->n_fats;                                /* (Number of sectors in FAT area) */
01424     fs->fatbase = bsect + LD_WORD(fs->win+BPB_RsvdSecCnt); /* FAT start sector (lba) */
01425     fs->csize = fs->win[BPB_SecPerClus];                /* Number of sectors per cluster */
01426     fs->n_rootdir = LD_WORD(fs->win+BPB_RootEntCnt);    /* Nmuber of root directory entries */
01427     tsect = LD_WORD(fs->win+BPB_TotSec16);              /* Number of sectors on the file system */
01428     if (!tsect) tsect = LD_DWORD(fs->win+BPB_TotSec32);
01429     fs->max_clust = mclst = (tsect                      /* Last cluster# + 1 */
01430         - LD_WORD(fs->win+BPB_RsvdSecCnt) - fsize - fs->n_rootdir / (SS(fs)/32)
01431         ) / fs->csize + 2;
01432
01433     fmt = FS_FAT12;                                     /* Determine the FAT sub type */
01434     if (mclst >= 0xFF7) fmt = FS_FAT16;             /* Number of clusters >= 0xFF5 */
01435     if (mclst >= 0xFFF7) fmt = FS_FAT32;            /* Number of clusters >= 0xFFF5 */
01436
01437     if (fmt == FS_FAT32)
01438         fs->dirbase = LD_DWORD(fs->win+BPB_RootClus);   /* Root directory start cluster */
01439     else
01440         fs->dirbase = fs->fatbase + fsize;              /* Root directory start sector (lba) */
01441     fs->database = fs->fatbase + fsize + fs->n_rootdir / (SS(fs)/32);   /* Data start sector (lba) */
01442
01443 #if !_FS_READONLY
01444     /* Initialize allocation information */
01445     fs->free_clust = 0xFFFFFFFF;
01446     fs->wflag = 0;
01447     /* Get fsinfo if needed */
01448     if (fmt == FS_FAT32) {
01449         fs->fsi_sector = bsect + LD_WORD(fs->win+BPB_FSInfo);
01450         fs->fsi_flag = 0;
01451         if (disk_read(fs->drive, fs->win, fs->fsi_sector, 1) == RES_OK &&
01452             LD_WORD(fs->win+BS_55AA) == 0xAA55 &&
01453             LD_DWORD(fs->win+FSI_LeadSig) == 0x41615252 &&
01454             LD_DWORD(fs->win+FSI_StrucSig) == 0x61417272) {
01455             fs->last_clust = LD_DWORD(fs->win+FSI_Nxt_Free);
01456             fs->free_clust = LD_DWORD(fs->win+FSI_Free_Count);
01457         }
01458     }
01459 #endif
01460     fs->winsect = 0;
01461     fs->fs_type = fmt;          /* FAT syb-type */
01462     fs->id = ++Fsid;            /* File system mount ID */
01463     res = FR_OK;
01464
01465     return res;
01466 }
01467
01468
01469
01470
01471 /*-----------------------------------------------------------------------*/
01472 /* Check if the file/dir object is valid or not                          */
01473 /*-----------------------------------------------------------------------*/
01474
01475 static
01476 FRESULT validate (  /* FR_OK(0): The object is valid, !=0: Invalid */
01477     FATFS *fs,      /* Pointer to the file system object */
01478     WORD id         /* Member id of the target object to be checked */
01479 )
01480 {
01481     if (!fs || !fs->fs_type || fs->id != id)
01482         return FR_INVALID_OBJECT;
01483
01484     ENTER_FF(fs);       /* Lock file system */
01485
01486     if (disk_status(fs->drive) & STA_NOINIT)
01487         return FR_NOT_READY;
01488
01489     return FR_OK;
01490 }
01491
01492
01493
01494
01495 /*--------------------------------------------------------------------------
01496
01497    Public Functions
01498
01499 --------------------------------------------------------------------------*/
01500
01501
01502
01503 /*-----------------------------------------------------------------------*/
01504 /* Mount/Unmount a Locical Drive                                         */
01505 /*-----------------------------------------------------------------------*/
01506
01507 FRESULT f_mount (
01508     BYTE vol,       /* Logical drive number to be mounted/unmounted */
01509     FATFS *fs       /* Pointer to new file system object (NULL for unmount)*/
01510 )
01511 {
01512     FATFS *rfs;
01513
01514
01515     if (vol >= _DRIVES)             /* Check if the drive number is valid */
01516         return FR_INVALID_DRIVE;
01517     rfs = FatFs[vol];               /* Get current state */
01518
01519     if (rfs) {
01520 #if _FS_REENTRANT                   /* Discard sync object of the current volume */
01521         if (!ff_del_syncobj(fs->sobj)) return FR_INT_ERR;
01522 #endif
01523         rfs->fs_type = 0;           /* Clear old fs object */
01524     }
01525
01526     if (fs) {
01527         fs->fs_type = 0;            /* Clear new fs object */
01528 #if _FS_REENTRANT                   /* Create sync object for the new volume */
01529         if (!ff_cre_syncobj(vol, &fs->sobj)) return FR_INT_ERR;
01530 #endif
01531     }
01532     FatFs[vol] = fs;                /* Register new fs object */
01533
01534     return FR_OK;
01535 }
01536
01537
01538
01539
01540 /*-----------------------------------------------------------------------*/
01541 /* Open or Create a File                                                 */
01542 /*-----------------------------------------------------------------------*/
01543
01544 FRESULT f_open (
01545     FIL *fp,            /* Pointer to the blank file object */
01546     const char *path,   /* Pointer to the file name */
01547     BYTE mode           /* Access mode and file open mode flags */
01548 )
01549 {
01550     FRESULT res;
01551     DIR dj;
01552     NAMEBUF(sfn, lfn);
01553     BYTE *dir;
01554
01555
01556     fp->fs = NULL;      /* Clear file object */
01557 #if !_FS_READONLY
01558     mode &= (FA_READ | FA_WRITE | FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW);
01559     res = auto_mount(&path, &dj.fs, (BYTE)(mode & (FA_WRITE | FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)));
01560 #else
01561     mode &= FA_READ;
01562     res = auto_mount(&path, &dj.fs, 0);
01563 #endif
01564     if (res != FR_OK) LEAVE_FF(dj.fs, res);
01565     INITBUF(dj, sfn, lfn);
01566     res = follow_path(&dj, path);   /* Follow the file path */
01567
01568 #if !_FS_READONLY
01569     /* Create or Open a file */
01570     if (mode & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)) {
01571         DWORD ps, cl;
01572
01573         if (res != FR_OK) {     /* No file, create new */
01574             if (res == FR_NO_FILE)
01575                 res = dir_register(&dj);
01576             if (res != FR_OK) LEAVE_FF(dj.fs, res);
01577             mode |= FA_CREATE_ALWAYS;
01578             dir = dj.dir;
01579         }
01580         else {                  /* Any object is already existing */
01581             if (mode & FA_CREATE_NEW)           /* Cannot create new */
01582                 LEAVE_FF(dj.fs, FR_EXIST);
01583             dir = dj.dir;
01584             if (!dir || (dir[DIR_Attr] & (AM_RDO | AM_DIR)))    /* Cannot overwrite it (R/O or DIR) */
01585                 LEAVE_FF(dj.fs, FR_DENIED);
01586             if (mode & FA_CREATE_ALWAYS) {      /* Resize it to zero if needed */
01587                 cl = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO);    /* Get start cluster */
01588                 ST_WORD(dir+DIR_FstClusHI, 0);  /* cluster = 0 */
01589                 ST_WORD(dir+DIR_FstClusLO, 0);
01590                 ST_DWORD(dir+DIR_FileSize, 0);  /* size = 0 */
01591                 dj.fs->wflag = 1;
01592                 ps = dj.fs->winsect;            /* Remove the cluster chain */
01593                 if (cl) {
01594                     res = remove_chain(dj.fs, cl);
01595                     if (res) LEAVE_FF(dj.fs, res);
01596                     dj.fs->last_clust = cl - 1; /* Reuse the cluster hole */
01597                 }
01598                 res = move_window(dj.fs, ps);
01599                 if (res != FR_OK) LEAVE_FF(dj.fs, res);
01600             }
01601         }
01602         if (mode & FA_CREATE_ALWAYS) {
01603             dir[DIR_Attr] = 0;                  /* Reset attribute */
01604             ps = get_fattime();
01605             ST_DWORD(dir+DIR_CrtTime, ps);      /* Created time */
01606             dj.fs->wflag = 1;
01607             mode |= FA__WRITTEN;                /* Set file changed flag */
01608         }
01609     }
01610     /* Open an existing file */
01611     else {
01612 #endif /* !_FS_READONLY */
01613         if (res != FR_OK) LEAVE_FF(dj.fs, res); /* Follow failed */
01614         dir = dj.dir;
01615         if (!dir || (dir[DIR_Attr] & AM_DIR))   /* It is a directory */
01616             LEAVE_FF(dj.fs, FR_NO_FILE);
01617 #if !_FS_READONLY
01618         if ((mode & FA_WRITE) && (dir[DIR_Attr] & AM_RDO)) /* R/O violation */
01619             LEAVE_FF(dj.fs, FR_DENIED);
01620     }
01621     fp->dir_sect = dj.fs->winsect;      /* Pointer to the directory entry */
01622     fp->dir_ptr = dj.dir;
01623 #endif
01624     fp->flag = mode;                    /* File access mode */
01625     fp->org_clust =                     /* File start cluster */
01626         ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO);
01627     fp->fsize = LD_DWORD(dir+DIR_FileSize); /* File size */
01628     fp->fptr = 0; fp->csect = 255;      /* File pointer */
01629     fp->dsect = 0;
01630     fp->fs = dj.fs; fp->id = dj.fs->id; /* Owner file system object of the file */
01631
01632     LEAVE_FF(dj.fs, FR_OK);
01633 }
01634
01635
01636
01637
01638 /*-----------------------------------------------------------------------*/
01639 /* Read File                                                             */
01640 /*-----------------------------------------------------------------------*/
01641
01642 FRESULT f_read (
01643     FIL *fp,        /* Pointer to the file object */
01644     void *buff,     /* Pointer to data buffer */
01645     UINT btr,       /* Number of bytes to read */
01646     UINT *br        /* Pointer to number of bytes read */
01647 )
01648 {
01649     FRESULT res;
01650     DWORD clst, sect, remain;
01651     UINT rcnt, cc;
01652     BYTE *rbuff = buff;
01653
01654
01655     *br = 0;
01656
01657     res = validate(fp->fs, fp->id);                 /* Check validity of the object */
01658     if (res != FR_OK) LEAVE_FF(fp->fs, res);
01659     if (fp->flag & FA__ERROR)                       /* Check abort flag */
01660         LEAVE_FF(fp->fs, FR_INT_ERR);
01661     if (!(fp->flag & FA_READ))                      /* Check access mode */
01662         LEAVE_FF(fp->fs, FR_DENIED);
01663     remain = fp->fsize - fp->fptr;
01664     if (btr > remain) btr = (UINT)remain;           /* Truncate btr by remaining bytes */
01665
01666     for ( ;  btr;                                   /* Repeat until all data transferred */
01667         rbuff += rcnt, fp->fptr += rcnt, *br += rcnt, btr -= rcnt) {
01668         if ((fp->fptr % SS(fp->fs)) == 0) {         /* On the sector boundary? */
01669             if (fp->csect >= fp->fs->csize) {       /* On the cluster boundary? */
01670                 clst = (fp->fptr == 0) ?            /* On the top of the file? */
01671                     fp->org_clust : get_cluster(fp->fs, fp->curr_clust);
01672                 if (clst <= 1) ABORT(fp->fs, FR_INT_ERR);
01673                 if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);
01674                 fp->curr_clust = clst;              /* Update current cluster */
01675                 fp->csect = 0;                      /* Reset sector offset in the cluster */
01676             }
01677             sect = clust2sect(fp->fs, fp->curr_clust);  /* Get current sector */
01678             if (!sect) ABORT(fp->fs, FR_INT_ERR);
01679             sect += fp->csect;
01680             cc = btr / SS(fp->fs);                  /* When remaining bytes >= sector size, */
01681             if (cc) {                               /* Read maximum contiguous sectors directly */
01682                 if (fp->csect + cc > fp->fs->csize) /* Clip at cluster boundary */
01683                     cc = fp->fs->csize - fp->csect;
01684                 if (disk_read(fp->fs->drive, rbuff, sect, (BYTE)cc) != RES_OK)
01685                     ABORT(fp->fs, FR_DISK_ERR);
01686                 fp->csect += (BYTE)cc;              /* Next sector address in the cluster */
01687                 rcnt = SS(fp->fs) * cc;             /* Number of bytes transferred */
01688                 continue;
01689             }
01690 #if !_FS_TINY
01691 #if !_FS_READONLY
01692             if (fp->flag & FA__DIRTY) {         /* Write sector I/O buffer if needed */
01693                 if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK)
01694                     ABORT(fp->fs, FR_DISK_ERR);
01695                 fp->flag &= (BYTE)~FA__DIRTY;
01696             }
01697 #endif
01698             if (fp->dsect != sect) {            /* Fill sector buffer with file data */
01699                 if (disk_read(fp->fs->drive, fp->buf, sect, 1) != RES_OK)
01700                     ABORT(fp->fs, FR_DISK_ERR);
01701             }
01702 #endif
01703             fp->dsect = sect;
01704             fp->csect++;                            /* Next sector address in the cluster */
01705         }
01706         rcnt = SS(fp->fs) - (fp->fptr % SS(fp->fs));    /* Get partial sector data from sector buffer */
01707         if (rcnt > btr) rcnt = btr;
01708 #if _FS_TINY
01709         if (move_window(fp->fs, fp->dsect))         /* Move sector window */
01710             ABORT(fp->fs, FR_DISK_ERR);
01711         mem_cpy(rbuff, &fp->fs->win[fp->fptr % SS(fp->fs)], rcnt);  /* Pick partial sector */
01712 #else
01713         mem_cpy(rbuff, &fp->buf[fp->fptr % SS(fp->fs)], rcnt);  /* Pick partial sector */
01714 #endif
01715     }
01716
01717
01718     LEAVE_FF(fp->fs, FR_OK);
01719 }
01720
01721
01722
01723
01724 #if !_FS_READONLY
01725 /*-----------------------------------------------------------------------*/
01726 /* Write File                                                            */
01727 /*-----------------------------------------------------------------------*/
01728
01729 FRESULT f_write (
01730     FIL *fp,            /* Pointer to the file object */
01731     const void *buff,   /* Pointer to the data to be written */
01732     UINT btw,           /* Number of bytes to write */
01733     UINT *bw            /* Pointer to number of bytes written */
01734 )
01735 {
01736     FRESULT res;
01737     DWORD clst, sect;
01738     UINT wcnt, cc;
01739     const BYTE *wbuff = buff;
01740
01741
01742     *bw = 0;
01743
01744     res = validate(fp->fs, fp->id);                 /* Check validity of the object */
01745     if (res != FR_OK) LEAVE_FF(fp->fs, res);
01746     if (fp->flag & FA__ERROR)                       /* Check abort flag */
01747         LEAVE_FF(fp->fs, FR_INT_ERR);
01748     if (!(fp->flag & FA_WRITE))                     /* Check access mode */
01749         LEAVE_FF(fp->fs, FR_DENIED);
01750     if (fp->fsize + btw < fp->fsize) btw = 0;       /* File size cannot reach 4GB */
01751
01752     for ( ;  btw;                                   /* Repeat until all data transferred */
01753         wbuff += wcnt, fp->fptr += wcnt, *bw += wcnt, btw -= wcnt) {
01754         if ((fp->fptr % SS(fp->fs)) == 0) {         /* On the sector boundary? */
01755             if (fp->csect >= fp->fs->csize) {       /* On the cluster boundary? */
01756                 if (fp->fptr == 0) {                /* On the top of the file? */
01757                     clst = fp->org_clust;           /* Follow from the origin */
01758                     if (clst == 0)                  /* When there is no cluster chain, */
01759                         fp->org_clust = clst = create_chain(fp->fs, 0); /* Create a new cluster chain */
01760                 } else {                            /* Middle or end of the file */
01761                     clst = create_chain(fp->fs, fp->curr_clust);            /* Follow or streach cluster chain */
01762                 }
01763                 if (clst == 0) break;               /* Could not allocate a new cluster (disk full) */
01764                 if (clst == 1) ABORT(fp->fs, FR_INT_ERR);
01765                 if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);
01766                 fp->curr_clust = clst;              /* Update current cluster */
01767                 fp->csect = 0;                      /* Reset sector address in the cluster */
01768             }
01769 #if _FS_TINY
01770             if (fp->fs->winsect == fp->dsect && move_window(fp->fs, 0)) /* Write back data buffer prior to following direct transfer */
01771                 ABORT(fp->fs, FR_DISK_ERR);
01772 #else
01773             if (fp->flag & FA__DIRTY) {     /* Write back data buffer prior to following direct transfer */
01774                 if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK)
01775                     ABORT(fp->fs, FR_DISK_ERR);
01776                 fp->flag &= (BYTE)~FA__DIRTY;
01777             }
01778 #endif
01779             sect = clust2sect(fp->fs, fp->curr_clust);  /* Get current sector */
01780             if (!sect) ABORT(fp->fs, FR_INT_ERR);
01781             sect += fp->csect;
01782             cc = btw / SS(fp->fs);                  /* When remaining bytes >= sector size, */
01783             if (cc) {                               /* Write maximum contiguous sectors directly */
01784                 if (fp->csect + cc > fp->fs->csize) /* Clip at cluster boundary */
01785                     cc = fp->fs->csize - fp->csect;
01786                 if (disk_write(fp->fs->drive, wbuff, sect, (BYTE)cc) != RES_OK)
01787                     ABORT(fp->fs, FR_DISK_ERR);
01788 #if _FS_TINY
01789                 if (fp->fs->winsect - sect < cc) {  /* Refill sector cache if it gets dirty by the direct write */
01790                     mem_cpy(fp->fs->win, wbuff + ((fp->fs->winsect - sect) * SS(fp->fs)), SS(fp->fs));
01791                     fp->fs->wflag = 0;
01792                 }
01793 #else
01794                 if (fp->dsect - sect < cc) {  /* Refill sector cache if it gets dirty by the direct write */
01795                     mem_cpy(fp->buf, wbuff + ((fp->dsect - sect) * SS(fp->fs)), SS(fp->fs));
01796                     fp->flag &= ~FA__DIRTY;
01797                 }
01798 #endif
01799                 fp->csect += (BYTE)cc;              /* Next sector address in the cluster */
01800                 wcnt = SS(fp->fs) * cc;             /* Number of bytes transferred */
01801                 continue;
01802             }
01803 #if _FS_TINY
01804             if (fp->fptr >= fp->fsize) {            /* Avoid silly buffer filling at growing edge */
01805                 if (move_window(fp->fs, 0)) ABORT(fp->fs, FR_DISK_ERR);
01806                 fp->fs->winsect = sect;
01807             }
01808 #else
01809             if (fp->dsect != sect) {                /* Fill sector buffer with file data */
01810                 if (fp->fptr < fp->fsize &&
01811                     disk_read(fp->fs->drive, fp->buf, sect, 1) != RES_OK)
01812                         ABORT(fp->fs, FR_DISK_ERR);
01813             }
01814 #endif
01815             fp->dsect = sect;
01816             fp->csect++;                            /* Next sector address in the cluster */
01817         }
01818         wcnt = SS(fp->fs) - (fp->fptr % SS(fp->fs));    /* Put partial sector into file I/O buffer */
01819         if (wcnt > btw) wcnt = btw;
01820 #if _FS_TINY
01821         if (move_window(fp->fs, fp->dsect))         /* Move sector window */
01822             ABORT(fp->fs, FR_DISK_ERR);
01823         mem_cpy(&fp->fs->win[fp->fptr % SS(fp->fs)], wbuff, wcnt);  /* Fit partial sector */
01824         fp->fs->wflag = 1;
01825 #else
01826         mem_cpy(&fp->buf[fp->fptr % SS(fp->fs)], wbuff, wcnt);  /* Fit partial sector */
01827         fp->flag |= FA__DIRTY;
01828 #endif
01829     }
01830
01831     if (fp->fptr > fp->fsize) fp->fsize = fp->fptr; /* Update file size if needed */
01832     fp->flag |= FA__WRITTEN;                        /* Set file changed flag */
01833
01834     LEAVE_FF(fp->fs, FR_OK);
01835 }
01836
01837
01838
01839
01840 /*-----------------------------------------------------------------------*/
01841 /* Synchronize the File Object                                           */
01842 /*-----------------------------------------------------------------------*/
01843
01844 FRESULT f_sync (
01845     FIL *fp     /* Pointer to the file object */
01846 )
01847 {
01848     FRESULT res;
01849     DWORD tim;
01850     BYTE *dir;
01851
01852
01853     res = validate(fp->fs, fp->id);     /* Check validity of the object */
01854     if (res == FR_OK) {
01855         if (fp->flag & FA__WRITTEN) {   /* Has the file been written? */
01856 #if !_FS_TINY   /* Write-back dirty buffer */
01857             if (fp->flag & FA__DIRTY) {
01858                 if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK)
01859                     LEAVE_FF(fp->fs, FR_DISK_ERR);
01860                 fp->flag &= (BYTE)~FA__DIRTY;
01861             }
01862 #endif
01863             /* Update the directory entry */
01864             res = move_window(fp->fs, fp->dir_sect);
01865             if (res == FR_OK) {
01866                 dir = fp->dir_ptr;
01867                 dir[DIR_Attr] |= AM_ARC;                    /* Set archive bit */
01868                 ST_DWORD(dir+DIR_FileSize, fp->fsize);      /* Update file size */
01869                 ST_WORD(dir+DIR_FstClusLO, fp->org_clust);  /* Update start cluster */
01870                 ST_WORD(dir+DIR_FstClusHI, fp->org_clust >> 16);
01871                 tim = get_fattime();                    /* Updated time */
01872                 ST_DWORD(dir+DIR_WrtTime, tim);
01873                 fp->flag &= (BYTE)~FA__WRITTEN;
01874                 fp->fs->wflag = 1;
01875                 res = sync(fp->fs);
01876             }
01877         }
01878     }
01879
01880     LEAVE_FF(fp->fs, res);
01881 }
01882
01883 #endif /* !_FS_READONLY */
01884
01885
01886
01887
01888 /*-----------------------------------------------------------------------*/
01889 /* Close File                                                            */
01890 /*-----------------------------------------------------------------------*/
01891
01892 FRESULT f_close (
01893     FIL *fp     /* Pointer to the file object to be closed */
01894 )
01895 {
01896     FRESULT res;
01897
01898
01899 #if _FS_READONLY
01900     res = validate(fp->fs, fp->id);
01901     if (res == FR_OK) fp->fs = NULL;
01902     LEAVE_FF(fp->fs, res);
01903 #else
01904     res = f_sync(fp);
01905     if (res == FR_OK) fp->fs = NULL;
01906     return res;
01907 #endif
01908 }
01909
01910
01911
01912
01913 #if _FS_MINIMIZE <= 2
01914 /*-----------------------------------------------------------------------*/
01915 /* Seek File R/W Pointer                                                 */
01916 /*-----------------------------------------------------------------------*/
01917
01918 FRESULT f_lseek (
01919     FIL *fp,        /* Pointer to the file object */
01920     DWORD ofs       /* File pointer from top of file */
01921 )
01922 {
01923     FRESULT res;
01924     DWORD clst, bcs, nsect, ifptr;
01925
01926
01927     res = validate(fp->fs, fp->id);     /* Check validity of the object */
01928     if (res != FR_OK) LEAVE_FF(fp->fs, res);
01929     if (fp->flag & FA__ERROR)           /* Check abort flag */
01930         LEAVE_FF(fp->fs, FR_INT_ERR);
01931     if (ofs > fp->fsize                 /* In read-only mode, clip offset with the file size */
01932 #if !_FS_READONLY
01933          && !(fp->flag & FA_WRITE)
01934 #endif
01935         ) ofs = fp->fsize;
01936
01937     ifptr = fp->fptr;
01938     fp->fptr = 0; fp->csect = 255;
01939     nsect = 0;
01940     if (ofs > 0) {
01941         bcs = (DWORD)fp->fs->csize * SS(fp->fs);    /* Cluster size (byte) */
01942         if (ifptr > 0 &&
01943             (ofs - 1) / bcs >= (ifptr - 1) / bcs) { /* When seek to same or following cluster, */
01944             fp->fptr = (ifptr - 1) & ~(bcs - 1);    /* start from the current cluster */
01945             ofs -= fp->fptr;
01946             clst = fp->curr_clust;
01947         } else {                                    /* When seek to back cluster, */
01948             clst = fp->org_clust;                   /* start from the first cluster */
01949 #if !_FS_READONLY
01950             if (clst == 0) {                        /* If no cluster chain, create a new chain */
01951                 clst = create_chain(fp->fs, 0);
01952                 if (clst == 1) ABORT(fp->fs, FR_INT_ERR);
01953                 if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);
01954                 fp->org_clust = clst;
01955             }
01956 #endif
01957             fp->curr_clust = clst;
01958         }
01959         if (clst != 0) {
01960             while (ofs > bcs) {                     /* Cluster following loop */
01961 #if !_FS_READONLY
01962                 if (fp->flag & FA_WRITE) {          /* Check if in write mode or not */
01963                     clst = create_chain(fp->fs, clst);  /* Force streached if in write mode */
01964                     if (clst == 0) {                /* When disk gets full, clip file size */
01965                         ofs = bcs; break;
01966                     }
01967                 } else
01968 #endif
01969                     clst = get_cluster(fp->fs, clst);   /* Follow cluster chain if not in write mode */
01970                 if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);
01971                 if (clst <= 1 || clst >= fp->fs->max_clust) ABORT(fp->fs, FR_INT_ERR);
01972                 fp->curr_clust = clst;
01973                 fp->fptr += bcs;
01974                 ofs -= bcs;
01975             }
01976             fp->fptr += ofs;
01977             fp->csect = (BYTE)(ofs / SS(fp->fs));   /* Sector offset in the cluster */
01978             if (ofs % SS(fp->fs)) {
01979                 nsect = clust2sect(fp->fs, clst);   /* Current sector */
01980                 if (!nsect) ABORT(fp->fs, FR_INT_ERR);
01981                 nsect += fp->csect;
01982                 fp->csect++;
01983             }
01984         }
01985     }
01986     if (nsect && nsect != fp->dsect && fp->fptr % SS(fp->fs)) {
01987 #if !_FS_TINY
01988 #if !_FS_READONLY
01989         if (fp->flag & FA__DIRTY) {         /* Write-back dirty buffer if needed */
01990             if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK)
01991                 ABORT(fp->fs, FR_DISK_ERR);
01992             fp->flag &= (BYTE)~FA__DIRTY;
01993         }
01994 #endif
01995         if (disk_read(fp->fs->drive, fp->buf, nsect, 1) != RES_OK)
01996             ABORT(fp->fs, FR_DISK_ERR);
01997 #endif
01998         fp->dsect = nsect;
01999     }
02000 #if !_FS_READONLY
02001     if (fp->fptr > fp->fsize) {         /* Set changed flag if the file size is extended */
02002         fp->fsize = fp->fptr;
02003         fp->flag |= FA__WRITTEN;
02004     }
02005 #endif
02006
02007     LEAVE_FF(fp->fs, res);
02008 }
02009
02010
02011
02012
02013 #if _FS_MINIMIZE <= 1
02014 /*-----------------------------------------------------------------------*/
02015 /* Create a Directroy Object                                             */
02016 /*-----------------------------------------------------------------------*/
02017
02018 FRESULT f_opendir (
02019     DIR *dj,            /* Pointer to directory object to create */
02020     const char *path    /* Pointer to the directory path */
02021 )
02022 {
02023     FRESULT res;
02024     NAMEBUF(sfn, lfn);
02025     BYTE *dir;
02026
02027
02028     res = auto_mount(&path, &dj->fs, 0);
02029     if (res == FR_OK) {
02030         INITBUF((*dj), sfn, lfn);
02031         res = follow_path(dj, path);            /* Follow the path to the directory */
02032         if (res == FR_OK) {                     /* Follow completed */
02033             dir = dj->dir;
02034             if (dir) {                          /* It is not the root dir */
02035                 if (dir[DIR_Attr] & AM_DIR) {   /* The object is a directory */
02036                     dj->sclust = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO);
02037                 } else {                        /* The object is not a directory */
02038                     res = FR_NO_PATH;
02039                 }
02040             } else {                            /* It is the root dir */
02041                 dj->sclust = (dj->fs->fs_type == FS_FAT32) ? dj->fs->dirbase : 0;
02042             }
02043             if (res == FR_OK) res = dir_seek(dj, 0);
02044             dj->id = dj->fs->id;
02045         } else {
02046             if (res == FR_NO_FILE) res = FR_NO_PATH;
02047         }
02048     }
02049
02050     LEAVE_FF(dj->fs, res);
02051 }
02052
02053
02054
02055
02056 /*-----------------------------------------------------------------------*/
02057 /* Read Directory Entry in Sequense                                      */
02058 /*-----------------------------------------------------------------------*/
02059
02060 FRESULT f_readdir (
02061     DIR *dj,            /* Pointer to the open directory object */
02062     FILINFO *fno        /* Pointer to file information to return */
02063 )
02064 {
02065     FRESULT res;
02066     NAMEBUF(sfn, lfn);
02067
02068
02069     res = validate(dj->fs, dj->id);         /* Check validity of the object */
02070     if (res == FR_OK) {
02071         INITBUF((*dj), sfn, lfn);
02072         if (!fno) {
02073             res = dir_seek(dj, 0);
02074         } else {
02075             res = dir_read(dj);
02076             if (res == FR_NO_FILE) {
02077                 dj->sect = 0;
02078                 res = FR_OK;
02079             }
02080             if (res == FR_OK) {             /* A valid entry is found */
02081                 get_fileinfo(dj, fno);      /* Get the object information */
02082                 res = dir_next(dj, FALSE);  /* Increment index for next */
02083                 if (res == FR_NO_FILE) {
02084                     dj->sect = 0;
02085                     res = FR_OK;
02086                 }
02087             }
02088         }
02089     }
02090
02091     LEAVE_FF(dj->fs, res);
02092 }
02093
02094
02095
02096 #if _FS_MINIMIZE == 0
02097 /*-----------------------------------------------------------------------*/
02098 /* Get File Status                                                       */
02099 /*-----------------------------------------------------------------------*/
02100
02101 FRESULT f_stat (
02102     const char *path,   /* Pointer to the file path */
02103     FILINFO *fno        /* Pointer to file information to return */
02104 )
02105 {
02106     FRESULT res;
02107     DIR dj;
02108     NAMEBUF(sfn, lfn);
02109
02110
02111     res = auto_mount(&path, &dj.fs, 0);
02112     if (res == FR_OK) {
02113         INITBUF(dj, sfn, lfn);
02114         res = follow_path(&dj, path);   /* Follow the file path */
02115         if (res == FR_OK) {             /* Follwo completed */
02116             if (dj.dir) /* Found an object */
02117                 get_fileinfo(&dj, fno);
02118             else        /* It is root dir */
02119                 res = FR_INVALID_NAME;
02120         }
02121     }
02122
02123     LEAVE_FF(dj.fs, res);
02124 }
02125
02126
02127
02128 #if !_FS_READONLY
02129 /*-----------------------------------------------------------------------*/
02130 /* Truncate File                                                         */
02131 /*-----------------------------------------------------------------------*/
02132
02133 FRESULT f_truncate (
02134     FIL *fp     /* Pointer to the file object */
02135 )
02136 {
02137     FRESULT res;
02138     DWORD ncl;
02139
02140
02141     res = validate(fp->fs, fp->id);     /* Check validity of the object */
02142     if (res != FR_OK) LEAVE_FF(fp->fs, res);
02143     if (fp->flag & FA__ERROR)           /* Check abort flag */
02144         LEAVE_FF(fp->fs, FR_INT_ERR);
02145     if (!(fp->flag & FA_WRITE))         /* Check access mode */
02146         LEAVE_FF(fp->fs, FR_DENIED);
02147
02148     if (fp->fsize > fp->fptr) {
02149         fp->fsize = fp->fptr;   /* Set file size to current R/W point */
02150         fp->flag |= FA__WRITTEN;
02151         if (fp->fptr == 0) {    /* When set file size to zero, remove entire cluster chain */
02152             res = remove_chain(fp->fs, fp->org_clust);
02153             fp->org_clust = 0;
02154         } else {                /* When truncate a part of the file, remove remaining clusters */
02155             ncl = get_cluster(fp->fs, fp->curr_clust);
02156             res = FR_OK;
02157             if (ncl == 0xFFFFFFFF) res = FR_DISK_ERR;
02158             if (ncl == 1) res = FR_INT_ERR;
02159             if (res == FR_OK && ncl < fp->fs->max_clust) {
02160                 res = put_cluster(fp->fs, fp->curr_clust, 0x0FFFFFFF);
02161                 if (res == FR_OK) res = remove_chain(fp->fs, ncl);
02162             }
02163         }
02164     }
02165     if (res != FR_OK) fp->flag |= FA__ERROR;
02166
02167     LEAVE_FF(fp->fs, res);
02168 }
02169
02170
02171
02172
02173 /*-----------------------------------------------------------------------*/
02174 /* Get Number of Free Clusters                                           */
02175 /*-----------------------------------------------------------------------*/
02176
02177 FRESULT f_getfree (
02178     const char *path,   /* Pointer to the logical drive number (root dir) */
02179     DWORD *nclst,       /* Pointer to the variable to return number of free clusters */
02180     FATFS **fatfs       /* Pointer to pointer to corresponding file system object to return */
02181 )
02182 {
02183     FRESULT res;
02184     DWORD n, clst, sect;
02185     BYTE fat, f, *p;
02186
02187
02188     /* Get drive number */
02189     res = auto_mount(&path, fatfs, 0);
02190     if (res != FR_OK) LEAVE_FF(*fatfs, res);
02191
02192     /* If number of free cluster is valid, return it without cluster scan. */
02193     if ((*fatfs)->free_clust <= (*fatfs)->max_clust - 2) {
02194         *nclst = (*fatfs)->free_clust;
02195         LEAVE_FF(*fatfs, FR_OK);
02196     }
02197
02198     /* Get number of free clusters */
02199     fat = (*fatfs)->fs_type;
02200     n = 0;
02201     if (fat == FS_FAT12) {
02202         clst = 2;
02203         do {
02204             if ((WORD)get_cluster(*fatfs, clst) == 0) n++;
02205         } while (++clst < (*fatfs)->max_clust);
02206     } else {
02207         clst = (*fatfs)->max_clust;
02208         sect = (*fatfs)->fatbase;
02209         f = 0; p = 0;
02210         do {
02211             if (!f) {
02212                 res = move_window(*fatfs, sect++);
02213                 if (res != FR_OK)
02214                     LEAVE_FF(*fatfs, res);
02215                 p = (*fatfs)->win;
02216             }
02217             if (fat == FS_FAT16) {
02218                 if (LD_WORD(p) == 0) n++;
02219                 p += 2; f += 1;
02220             } else {
02221                 if (LD_DWORD(p) == 0) n++;
02222                 p += 4; f += 2;
02223             }
02224         } while (--clst);
02225     }
02226     (*fatfs)->free_clust = n;
02227     if (fat == FS_FAT32) (*fatfs)->fsi_flag = 1;
02228     *nclst = n;
02229
02230     LEAVE_FF(*fatfs, FR_OK);
02231 }
02232
02233
02234
02235
02236 /*-----------------------------------------------------------------------*/
02237 /* Delete a File or Directory                                            */
02238 /*-----------------------------------------------------------------------*/
02239
02240 FRESULT f_unlink (
02241     const char *path        /* Pointer to the file or directory path */
02242 )
02243 {
02244     FRESULT res;
02245     DIR dj, sdj;
02246     NAMEBUF(sfn, lfn);
02247     BYTE *dir;
02248     DWORD dclst;
02249
02250
02251     res = auto_mount(&path, &dj.fs, 1);
02252     if (res != FR_OK) LEAVE_FF(dj.fs, res);
02253
02254     INITBUF(dj, sfn, lfn);
02255     res = follow_path(&dj, path);           /* Follow the file path */
02256     if (res != FR_OK) LEAVE_FF(dj.fs, res); /* Follow failed */
02257
02258     dir = dj.dir;
02259     if (!dir)                               /* Is it the root directory? */
02260         LEAVE_FF(dj.fs, FR_INVALID_NAME);
02261     if (dir[DIR_Attr] & AM_RDO)             /* Is it a R/O object? */
02262         LEAVE_FF(dj.fs, FR_DENIED);
02263     dclst = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO);
02264
02265     if (dir[DIR_Attr] & AM_DIR) {           /* It is a sub-directory */
02266         if (dclst < 2) LEAVE_FF(dj.fs, FR_INT_ERR);
02267         mem_cpy(&sdj, &dj, sizeof(DIR));        /* Check if the sub-dir is empty or not */
02268         sdj.sclust = dclst;
02269         res = dir_seek(&sdj, 0);
02270         if (res != FR_OK) LEAVE_FF(dj.fs, res);
02271         res = dir_read(&sdj);
02272         if (res == FR_OK) res = FR_DENIED;  /* Not empty sub-dir */
02273         if (res != FR_NO_FILE) LEAVE_FF(dj.fs, res);
02274     }
02275
02276     res = dir_remove(&dj);                  /* Remove directory entry */
02277     if (res == FR_OK) {
02278         if (dclst)
02279             res = remove_chain(dj.fs, dclst);   /* Remove the cluster chain */
02280         if (res == FR_OK) res = sync(dj.fs);
02281     }
02282
02283     LEAVE_FF(dj.fs, res);
02284 }
02285
02286
02287
02288
02289 /*-----------------------------------------------------------------------*/
02290 /* Create a Directory                                                    */
02291 /*-----------------------------------------------------------------------*/
02292
02293 FRESULT f_mkdir (
02294     const char *path        /* Pointer to the directory path */
02295 )
02296 {
02297     FRESULT res;
02298     DIR dj;
02299     NAMEBUF(sfn, lfn);
02300     BYTE *dir, n;
02301     DWORD dsect, dclst, pclst, tim;
02302
02303
02304     res = auto_mount(&path, &dj.fs, 1);
02305     if (res != FR_OK) LEAVE_FF(dj.fs, res);
02306
02307     INITBUF(dj, sfn, lfn);
02308     res = follow_path(&dj, path);           /* Follow the file path */
02309     if (res == FR_OK) res = FR_EXIST;       /* Any file or directory is already existing */
02310     if (res != FR_NO_FILE)                  /* Any error occured */
02311         LEAVE_FF(dj.fs, res);
02312
02313     dclst = create_chain(dj.fs, 0);         /* Allocate a new cluster for new directory table */
02314     res = FR_OK;
02315     if (dclst == 0) res = FR_DENIED;
02316     if (dclst == 1) res = FR_INT_ERR;
02317     if (dclst == 0xFFFFFFFF) res = FR_DISK_ERR;
02318     if (res == FR_OK)
02319         res = move_window(dj.fs, 0);
02320     if (res != FR_OK) LEAVE_FF(dj.fs, res);
02321     dsect = clust2sect(dj.fs, dclst);
02322
02323     dir = dj.fs->win;                       /* Initialize the new directory table */
02324     mem_set(dir, 0, SS(dj.fs));
02325     mem_set(dir+DIR_Name, ' ', 8+3);        /* Create "." entry */
02326     dir[DIR_Name] = '.';
02327     dir[DIR_Attr] = AM_DIR;
02328     tim = get_fattime();
02329     ST_DWORD(dir+DIR_WrtTime, tim);
02330     ST_WORD(dir+DIR_FstClusLO, dclst);
02331     ST_WORD(dir+DIR_FstClusHI, dclst >> 16);
02332     mem_cpy(dir+32, dir, 32);           /* Create ".." entry */
02333     dir[33] = '.';
02334     pclst = dj.sclust;
02335     if (dj.fs->fs_type == FS_FAT32 && pclst == dj.fs->dirbase)
02336         pclst = 0;
02337     ST_WORD(dir+32+DIR_FstClusLO, pclst);
02338     ST_WORD(dir+32+DIR_FstClusHI, pclst >> 16);
02339     for (n = 0; n < dj.fs->csize; n++) {    /* Write dot entries and clear left sectors */
02340         dj.fs->winsect = dsect++;
02341         dj.fs->wflag = 1;
02342         res = move_window(dj.fs, 0);
02343         if (res) LEAVE_FF(dj.fs, res);
02344         mem_set(dir, 0, SS(dj.fs));
02345     }
02346
02347     res = dir_register(&dj);
02348     if (res != FR_OK) {
02349         remove_chain(dj.fs, dclst);
02350     } else {
02351         dir = dj.dir;
02352         dir[DIR_Attr] = AM_DIR;                 /* Attribute */
02353         ST_DWORD(dir+DIR_WrtTime, tim);         /* Crated time */
02354         ST_WORD(dir+DIR_FstClusLO, dclst);      /* Table start cluster */
02355         ST_WORD(dir+DIR_FstClusHI, dclst >> 16);
02356         dj.fs->wflag = 1;
02357         res = sync(dj.fs);
02358     }
02359
02360     LEAVE_FF(dj.fs, res);
02361 }
02362
02363
02364
02365
02366 /*-----------------------------------------------------------------------*/
02367 /* Change File Attribute                                                 */
02368 /*-----------------------------------------------------------------------*/
02369
02370 FRESULT f_chmod (
02371     const char *path,   /* Pointer to the file path */
02372     BYTE value,         /* Attribute bits */
02373     BYTE mask           /* Attribute mask to change */
02374 )
02375 {
02376     FRESULT res;
02377     DIR dj;
02378     NAMEBUF(sfn, lfn);
02379     BYTE *dir;
02380
02381
02382     res = auto_mount(&path, &dj.fs, 1);
02383     if (res == FR_OK) {
02384         INITBUF(dj, sfn, lfn);
02385         res = follow_path(&dj, path);       /* Follow the file path */
02386         if (res == FR_OK) {
02387             dir = dj.dir;
02388             if (!dir) {                     /* Is it a root directory? */
02389                 res = FR_INVALID_NAME;
02390             } else {                        /* File or sub directory */
02391                 mask &= AM_RDO|AM_HID|AM_SYS|AM_ARC;    /* Valid attribute mask */
02392                 dir[DIR_Attr] = (value & mask) | (dir[DIR_Attr] & (BYTE)~mask); /* Apply attribute change */
02393                 dj.fs->wflag = 1;
02394                 res = sync(dj.fs);
02395             }
02396         }
02397     }
02398
02399     LEAVE_FF(dj.fs, res);
02400 }
02401
02402
02403
02404
02405 /*-----------------------------------------------------------------------*/
02406 /* Change Timestamp                                                      */
02407 /*-----------------------------------------------------------------------*/
02408
02409 FRESULT f_utime (
02410     const char *path,   /* Pointer to the file/directory name */
02411     const FILINFO *fno  /* Pointer to the timestamp to be set */
02412 )
02413 {
02414     FRESULT res;
02415     DIR dj;
02416     NAMEBUF(sfn, lfn);
02417     BYTE *dir;
02418
02419
02420     res = auto_mount(&path, &dj.fs, 1);
02421     if (res == FR_OK) {
02422         INITBUF(dj, sfn, lfn);
02423         res = follow_path(&dj, path);   /* Follow the file path */
02424         if (res == FR_OK) {
02425             dir = dj.dir;
02426             if (!dir) {             /* Root directory */
02427                 res = FR_INVALID_NAME;
02428             } else {                /* File or sub-directory */
02429                 ST_WORD(dir+DIR_WrtTime, fno->ftime);
02430                 ST_WORD(dir+DIR_WrtDate, fno->fdate);
02431                 dj.fs->wflag = 1;
02432                 res = sync(dj.fs);
02433             }
02434         }
02435     }
02436
02437     LEAVE_FF(dj.fs, res);
02438 }
02439
02440
02441
02442
02443 /*-----------------------------------------------------------------------*/
02444 /* Rename File/Directory                                                 */
02445 /*-----------------------------------------------------------------------*/
02446
02447 FRESULT f_rename (
02448     const char *path_old,   /* Pointer to the old name */
02449     const char *path_new    /* Pointer to the new name */
02450 )
02451 {
02452     FRESULT res;
02453     DIR dj_old, dj_new;
02454     NAMEBUF(sfn, lfn);
02455     BYTE buf[21], *dir;
02456     DWORD dw;
02457
02458
02459     INITBUF(dj_old, sfn, lfn);
02460     res = auto_mount(&path_old, &dj_old.fs, 1);
02461     if (res == FR_OK) {
02462         dj_new.fs = dj_old.fs;
02463         res = follow_path(&dj_old, path_old);   /* Check old object */
02464     }
02465     if (res != FR_OK) LEAVE_FF(dj_old.fs, res); /* The old object is not found */
02466
02467     if (!dj_old.dir) LEAVE_FF(dj_old.fs, FR_NO_FILE);   /* Is root dir? */
02468     mem_cpy(buf, dj_old.dir+DIR_Attr, 21);      /* Save the object information */
02469
02470     mem_cpy(&dj_new, &dj_old, sizeof(DIR));
02471     res = follow_path(&dj_new, path_new);       /* Check new object */
02472     if (res == FR_OK) res = FR_EXIST;           /* The new object name is already existing */
02473     if (res == FR_NO_FILE) {                    /* Is it a valid path and no name collision? */
02474         res = dir_register(&dj_new);            /* Register the new object */
02475         if (res == FR_OK) {
02476             dir = dj_new.dir;                   /* Copy object information into new entry */
02477             mem_cpy(dir+13, buf+2, 19);
02478             dir[DIR_Attr] = buf[0];
02479             dj_old.fs->wflag = 1;
02480             if (dir[DIR_Attr] & AM_DIR) {       /* Update .. entry in the directory if needed */
02481                 dw = clust2sect(dj_new.fs, (DWORD)LD_WORD(dir+DIR_FstClusHI) | LD_WORD(dir+DIR_FstClusLO));
02482                 if (!dw) {
02483                     res = FR_INT_ERR;
02484                 } else {
02485                     res = move_window(dj_new.fs, dw);
02486                     dir = dj_new.fs->win+32;
02487                     if (res == FR_OK && dir[1] == '.') {
02488                         dw = (dj_new.fs->fs_type == FS_FAT32 && dj_new.sclust == dj_new.fs->dirbase) ? 0 : dj_new.sclust;
02489                         ST_WORD(dir+DIR_FstClusLO, dw);
02490                         ST_WORD(dir+DIR_FstClusHI, dw >> 16);
02491                         dj_new.fs->wflag = 1;
02492                     }
02493                 }
02494             }
02495             if (res == FR_OK) {
02496                 res = dir_remove(&dj_old);          /* Remove old entry */
02497                 if (res == FR_OK)
02498                     res = sync(dj_old.fs);
02499             }
02500         }
02501     }
02502
02503     LEAVE_FF(dj_old.fs, res);
02504 }
02505
02506 #endif /* !_FS_READONLY */
02507 #endif /* _FS_MINIMIZE == 0 */
02508 #endif /* _FS_MINIMIZE <= 1 */
02509 #endif /* _FS_MINIMIZE <= 2 */
02510
02511
02512
02513 /*-----------------------------------------------------------------------*/
02514 /* Forward data to the stream directly (Available on only _FS_TINY cfg)  */
02515 /*-----------------------------------------------------------------------*/
02516 #if _USE_FORWARD && _FS_TINY
02517
02518 FRESULT f_forward (
02519     FIL *fp,                        /* Pointer to the file object */
02520     UINT (*func)(const BYTE*,UINT), /* Pointer to the streaming function */
02521     UINT btr,                       /* Number of bytes to forward */
02522     UINT *bf                        /* Pointer to number of bytes forwarded */
02523 )
02524 {
02525     FRESULT res;
02526     DWORD remain, clst, sect;
02527     UINT rcnt;
02528
02529
02530     *bf = 0;
02531
02532     res = validate(fp->fs, fp->id);                 /* Check validity of the object */
02533     if (res != FR_OK) LEAVE_FF(fp->fs, res);
02534     if (fp->flag & FA__ERROR)                       /* Check error flag */
02535         LEAVE_FF(fp->fs, FR_INT_ERR);
02536     if (!(fp->flag & FA_READ))                      /* Check access mode */
02537         LEAVE_FF(fp->fs, FR_DENIED);
02538
02539     remain = fp->fsize - fp->fptr;
02540     if (btr > remain) btr = (UINT)remain;           /* Truncate btr by remaining bytes */
02541
02542     for ( ;  btr && (*func)(NULL, 0);               /* Repeat until all data transferred or stream becomes busy */
02543         fp->fptr += rcnt, *bf += rcnt, btr -= rcnt) {
02544         if ((fp->fptr % SS(fp->fs)) == 0) {         /* On the sector boundary? */
02545             if (fp->csect >= fp->fs->csize) {       /* On the cluster boundary? */
02546                 clst = (fp->fptr == 0) ?            /* On the top of the file? */
02547                     fp->org_clust : get_cluster(fp->fs, fp->curr_clust);
02548                 if (clst <= 1) ABORT(fp->fs, FR_INT_ERR);
02549                 if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);
02550                 fp->curr_clust = clst;              /* Update current cluster */
02551                 fp->csect = 0;                      /* Reset sector address in the cluster */
02552             }
02553             fp->csect++;                            /* Next sector address in the cluster */
02554         }
02555         sect = clust2sect(fp->fs, fp->curr_clust);  /* Get current data sector */
02556         if (!sect) ABORT(fp->fs, FR_INT_ERR);
02557         sect += fp->csect - 1;
02558         if (move_window(fp->fs, sect))              /* Move sector window */
02559             ABORT(fp->fs, FR_DISK_ERR);
02560         fp->dsect = sect;
02561         rcnt = SS(fp->fs) - (WORD)(fp->fptr % SS(fp->fs));  /* Forward data from sector window */
02562         if (rcnt > btr) rcnt = btr;
02563         rcnt = (*func)(&fp->fs->win[(WORD)fp->fptr % SS(fp->fs)], rcnt);
02564         if (!rcnt) ABORT(fp->fs, FR_INT_ERR);
02565     }
02566
02567     LEAVE_FF(fp->fs, FR_OK);
02568 }
02569 #endif /* _USE_FORWARD */
02570
02571
02572
02573 #if _USE_MKFS && !_FS_READONLY
02574 /*-----------------------------------------------------------------------*/
02575 /* Create File System on the Drive                                       */
02576 /*-----------------------------------------------------------------------*/
02577 #define N_ROOTDIR   512         /* Multiple of 32 and <= 2048 */
02578 #define N_FATS      1           /* 1 or 2 */
02579 #define MAX_SECTOR  131072000UL /* Maximum partition size */
02580 #define MIN_SECTOR  2000UL      /* Minimum partition size */
02581
02582
02583 FRESULT f_mkfs (
02584     BYTE drv,           /* Logical drive number */
02585     BYTE partition,     /* Partitioning rule 0:FDISK, 1:SFD */
02586     WORD allocsize      /* Allocation unit size [bytes] */
02587 )
02588 {
02589     static const DWORD sstbl[] = { 2048000, 1024000, 512000, 256000, 128000, 64000, 32000, 16000, 8000, 4000,   0 };
02590     static const WORD cstbl[] =  {   32768,   16384,   8192,   4096,   2048, 16384,  8192,  4096, 2048, 1024, 512 };
02591     BYTE fmt, m, *tbl;
02592     DWORD b_part, b_fat, b_dir, b_data;     /* Area offset (LBA) */
02593     DWORD n_part, n_rsv, n_fat, n_dir;      /* Area size */
02594     DWORD n_clst, n;
02595     WORD as;
02596     FATFS *fs;
02597     DSTATUS stat;
02598
02599
02600     /* Check validity of the parameters */
02601     if (drv >= _DRIVES) return FR_INVALID_DRIVE;
02602     if (partition >= 2) return FR_MKFS_ABORTED;
02603
02604     /* Check mounted drive and clear work area */
02605     fs = FatFs[drv];
02606     if (!fs) return FR_NOT_ENABLED;
02607     fs->fs_type = 0;
02608     drv = LD2PD(drv);
02609
02610     /* Get disk statics */
02611     stat = disk_initialize(drv);
02612     if (stat & STA_NOINIT) return FR_NOT_READY;
02613     if (stat & STA_PROTECT) return FR_WRITE_PROTECTED;
02614     if (disk_ioctl(drv, GET_SECTOR_COUNT, &n_part) != RES_OK || n_part < MIN_SECTOR)
02615         return FR_MKFS_ABORTED;
02616     if (n_part > MAX_SECTOR) n_part = MAX_SECTOR;
02617     b_part = (!partition) ? 63 : 0;     /* Boot sector */
02618     n_part -= b_part;
02619 #if _MAX_SS == 512
02620     if (!allocsize) {                   /* Auto selection of cluster size */
02621         for (n = 0; n_part < sstbl[n]; n++) ;
02622         allocsize = cstbl[n];
02623     }
02624 #endif
02625     for (as = 512; as <= 32768U && as != allocsize; as <<= 1);
02626     if (as != allocsize) return FR_MKFS_ABORTED;
02627 #if _MAX_SS != 512                      /* Check disk sector size */
02628     if (disk_ioctl(drv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK
02629         || SS(fs) > _MAX_SS
02630         || SS(fs) > allocsize)
02631         return FR_MKFS_ABORTED;
02632 #endif
02633     allocsize /= SS(fs);        /* Number of sectors per cluster */
02634
02635     /* Pre-compute number of clusters and FAT type */
02636     n_clst = n_part / allocsize;
02637     fmt = FS_FAT12;
02638     if (n_clst >= 0xFF5) fmt = FS_FAT16;
02639     if (n_clst >= 0xFFF5) fmt = FS_FAT32;
02640
02641     /* Determine offset and size of FAT structure */
02642     switch (fmt) {
02643     case FS_FAT12:
02644         n_fat = ((n_clst * 3 + 1) / 2 + 3 + SS(fs) - 1) / SS(fs);
02645         n_rsv = 1 + partition;
02646         n_dir = N_ROOTDIR * 32 / SS(fs);
02647         break;
02648     case FS_FAT16:
02649         n_fat = ((n_clst * 2) + 4 + SS(fs) - 1) / SS(fs);
02650         n_rsv = 1 + partition;
02651         n_dir = N_ROOTDIR * 32 / SS(fs);
02652         break;
02653     default:
02654         n_fat = ((n_clst * 4) + 8 + SS(fs) - 1) / SS(fs);
02655         n_rsv = 33 - partition;
02656         n_dir = 0;
02657     }
02658     b_fat = b_part + n_rsv;         /* FATs start sector */
02659     b_dir = b_fat + n_fat * N_FATS; /* Directory start sector */
02660     b_data = b_dir + n_dir;         /* Data start sector */
02661
02662     /* Align data start sector to erase block boundary (for flash memory media) */
02663     if (disk_ioctl(drv, GET_BLOCK_SIZE, &n) != RES_OK) return FR_MKFS_ABORTED;
02664     n = (b_data + n - 1) & ~(n - 1);
02665     n_fat += (n - b_data) / N_FATS;
02666     /* b_dir and b_data are no longer used below */
02667
02668     /* Determine number of cluster and final check of validity of the FAT type */
02669     n_clst = (n_part - n_rsv - n_fat * N_FATS - n_dir) / allocsize;
02670     if (   (fmt == FS_FAT16 && n_clst < 0xFF5)
02671         || (fmt == FS_FAT32 && n_clst < 0xFFF5))
02672         return FR_MKFS_ABORTED;
02673
02674     /* Create partition table if needed */
02675     if (!partition) {
02676         DWORD n_disk = b_part + n_part;
02677
02678         tbl = fs->win+MBR_Table;
02679         ST_DWORD(tbl, 0x00010180);      /* Partition start in CHS */
02680         if (n_disk < 63UL * 255 * 1024) {   /* Partition end in CHS */
02681             n_disk = n_disk / 63 / 255;
02682             tbl[7] = (BYTE)n_disk;
02683             tbl[6] = (BYTE)((n_disk >> 2) | 63);
02684         } else {
02685             ST_WORD(&tbl[6], 0xFFFF);
02686         }
02687         tbl[5] = 254;
02688         if (fmt != FS_FAT32)            /* System ID */
02689             tbl[4] = (n_part < 0x10000) ? 0x04 : 0x06;
02690         else
02691             tbl[4] = 0x0c;
02692         ST_DWORD(tbl+8, 63);            /* Partition start in LBA */
02693         ST_DWORD(tbl+12, n_part);       /* Partition size in LBA */
02694         ST_WORD(tbl+64, 0xAA55);        /* Signature */
02695         if (disk_write(drv, fs->win, 0, 1) != RES_OK)
02696             return FR_DISK_ERR;
02697     }
02698
02699     /* Create boot record */
02700     tbl = fs->win;                              /* Clear buffer */
02701     mem_set(tbl, 0, SS(fs));
02702     ST_DWORD(tbl+BS_jmpBoot, 0x90FEEB);         /* Boot code (jmp $, nop) */
02703     ST_WORD(tbl+BPB_BytsPerSec, SS(fs));        /* Sector size */
02704     tbl[BPB_SecPerClus] = (BYTE)allocsize;      /* Sectors per cluster */
02705     ST_WORD(tbl+BPB_RsvdSecCnt, n_rsv);         /* Reserved sectors */
02706     tbl[BPB_NumFATs] = N_FATS;                  /* Number of FATs */
02707     ST_WORD(tbl+BPB_RootEntCnt, SS(fs) / 32 * n_dir); /* Number of rootdir entries */
02708     if (n_part < 0x10000) {                     /* Number of total sectors */
02709         ST_WORD(tbl+BPB_TotSec16, n_part);
02710     } else {
02711         ST_DWORD(tbl+BPB_TotSec32, n_part);
02712     }
02713     tbl[BPB_Media] = 0xF8;                      /* Media descripter */
02714     ST_WORD(tbl+BPB_SecPerTrk, 63);             /* Number of sectors per track */
02715     ST_WORD(tbl+BPB_NumHeads, 255);             /* Number of heads */
02716     ST_DWORD(tbl+BPB_HiddSec, b_part);          /* Hidden sectors */
02717     n = get_fattime();                          /* Use current time as a VSN */
02718     if (fmt != FS_FAT32) {
02719         ST_DWORD(tbl+BS_VolID, n);              /* Volume serial number */
02720         ST_WORD(tbl+BPB_FATSz16, n_fat);        /* Number of secters per FAT */
02721         tbl[BS_DrvNum] = 0x80;                  /* Drive number */
02722         tbl[BS_BootSig] = 0x29;                 /* Extended boot signature */
02723         mem_cpy(tbl+BS_VolLab, "NO NAME    FAT     ", 19);  /* Volume lavel, FAT signature */
02724     } else {
02725         ST_DWORD(tbl+BS_VolID32, n);            /* Volume serial number */
02726         ST_DWORD(tbl+BPB_FATSz32, n_fat);       /* Number of secters per FAT */
02727         ST_DWORD(tbl+BPB_RootClus, 2);          /* Root directory cluster (2) */
02728         ST_WORD(tbl+BPB_FSInfo, 1);             /* FSInfo record offset (bs+1) */
02729         ST_WORD(tbl+BPB_BkBootSec, 6);          /* Backup boot record offset (bs+6) */
02730         tbl[BS_DrvNum32] = 0x80;                /* Drive number */
02731         tbl[BS_BootSig32] = 0x29;               /* Extended boot signature */
02732         mem_cpy(tbl+BS_VolLab32, "NO NAME    FAT32   ", 19);    /* Volume lavel, FAT signature */
02733     }
02734     ST_WORD(tbl+BS_55AA, 0xAA55);               /* Signature */
02735     if (disk_write(drv, tbl, b_part+0, 1) != RES_OK)
02736         return FR_DISK_ERR;
02737     if (fmt == FS_FAT32)
02738         disk_write(drv, tbl, b_part+6, 1);
02739
02740     /* Initialize FAT area */
02741     for (m = 0; m < N_FATS; m++) {
02742         mem_set(tbl, 0, SS(fs));        /* 1st sector of the FAT  */
02743         if (fmt != FS_FAT32) {
02744             n = (fmt == FS_FAT12) ? 0x00FFFFF8 : 0xFFFFFFF8;
02745             ST_DWORD(tbl, n);               /* Reserve cluster #0-1 (FAT12/16) */
02746         } else {
02747             ST_DWORD(tbl+0, 0xFFFFFFF8);    /* Reserve cluster #0-1 (FAT32) */
02748             ST_DWORD(tbl+4, 0xFFFFFFFF);
02749             ST_DWORD(tbl+8, 0x0FFFFFFF);    /* Reserve cluster #2 for root dir */
02750         }
02751         if (disk_write(drv, tbl, b_fat++, 1) != RES_OK)
02752             return FR_DISK_ERR;
02753         mem_set(tbl, 0, SS(fs));        /* Following FAT entries are filled by zero */
02754         for (n = 1; n < n_fat; n++) {
02755             if (disk_write(drv, tbl, b_fat++, 1) != RES_OK)
02756                 return FR_DISK_ERR;
02757         }
02758     }
02759
02760     /* Initialize Root directory */
02761     m = (BYTE)((fmt == FS_FAT32) ? allocsize : n_dir);
02762     do {
02763         if (disk_write(drv, tbl, b_fat++, 1) != RES_OK)
02764             return FR_DISK_ERR;
02765     } while (--m);
02766
02767     /* Create FSInfo record if needed */
02768     if (fmt == FS_FAT32) {
02769         ST_WORD(tbl+BS_55AA, 0xAA55);
02770         ST_DWORD(tbl+FSI_LeadSig, 0x41615252);
02771         ST_DWORD(tbl+FSI_StrucSig, 0x61417272);
02772         ST_DWORD(tbl+FSI_Free_Count, n_clst - 1);
02773         ST_DWORD(tbl+FSI_Nxt_Free, 0xFFFFFFFF);
02774         disk_write(drv, tbl, b_part+1, 1);
02775         disk_write(drv, tbl, b_part+7, 1);
02776     }
02777
02778     return (disk_ioctl(drv, CTRL_SYNC, (void*)NULL) == RES_OK) ? FR_OK : FR_DISK_ERR;
02779 }
02780
02781 #endif /* _USE_MKFS && !_FS_READONLY */
02782
02783
02784
02785
02786 #if _USE_STRFUNC
02787 /*-----------------------------------------------------------------------*/
02788 /* Get a string from the file                                            */
02789 /*-----------------------------------------------------------------------*/
02790 char* f_gets (
02791     char* buff, /* Pointer to the string buffer to read */
02792     int len,    /* Size of string buffer */
02793     FIL* fil    /* Pointer to the file object */
02794 )
02795 {
02796     int i = 0;
02797     char *p = buff;
02798     UINT rc;
02799
02800
02801     while (i < len - 1) {           /* Read bytes until buffer gets filled */
02802         f_read(fil, p, 1, &rc);
02803         if (rc != 1) break;         /* Break when no data to read */
02804 #if _USE_STRFUNC >= 2
02805         if (*p == '\r') continue;   /* Strip '\r' */
02806 #endif
02807         i++;
02808         if (*p++ == '\n') break;    /* Break when reached end of line */
02809     }
02810     *p = 0;
02811     return i ? buff : NULL;         /* When no data read (eof or error), return with error. */
02812 }
02813
02814
02815
02816 #if !_FS_READONLY
02817 #include <stdarg.h>
02818 /*-----------------------------------------------------------------------*/
02819 /* Put a character to the file                                           */
02820 /*-----------------------------------------------------------------------*/
02821 int f_putc (
02822     int chr,    /* A character to be output */
02823     FIL* fil    /* Ponter to the file object */
02824 )
02825 {
02826     UINT bw;
02827     char c;
02828
02829
02830 #if _USE_STRFUNC >= 2
02831     if (chr == '\n') f_putc ('\r', fil);    /* LF -> CRLF conversion */
02832 #endif
02833     if (!fil) { /* Special value may be used to switch the destination to any other device */
02834     /*  put_console(chr);   */
02835         return chr;
02836     }
02837     c = (char)chr;
02838     f_write(fil, &c, 1, &bw);   /* Write a byte to the file */
02839     return bw ? chr : EOF;      /* Return the result */
02840 }
02841
02842
02843
02844
02845 /*-----------------------------------------------------------------------*/
02846 /* Put a string to the file                                              */
02847 /*-----------------------------------------------------------------------*/
02848 int f_puts (
02849     const char* str,    /* Pointer to the string to be output */
02850     FIL* fil            /* Pointer to the file object */
02851 )
02852 {
02853     int n;
02854
02855
02856     for (n = 0; *str; str++, n++) {
02857         if (f_putc(*str, fil) == EOF) return EOF;
02858     }
02859     return n;
02860 }
02861
02862
02863
02864
02865 /*-----------------------------------------------------------------------*/
02866 /* Put a formatted string to the file                                    */
02867 /*-----------------------------------------------------------------------*/
02868 int f_printf (
02869     FIL* fil,           /* Pointer to the file object */
02870     const char* str,    /* Pointer to the format string */
02871     ...                 /* Optional arguments... */
02872 )
02873 {
02874     va_list arp;
02875     UCHAR c, f, r;
02876     ULONG val;
02877     char s[16];
02878     int i, w, res, cc;
02879
02880
02881     va_start(arp, str);
02882
02883     for (cc = res = 0; cc != EOF; res += cc) {
02884         c = *str++;
02885         if (c == 0) break;          /* End of string */
02886         if (c != '%') {             /* Non escape cahracter */
02887             cc = f_putc(c, fil);
02888             if (cc != EOF) cc = 1;
02889             continue;
02890         }
02891         w = f = 0;
02892         c = *str++;
02893         if (c == '0') {             /* Flag: '0' padding */
02894             f = 1; c = *str++;
02895         }
02896         while (c >= '0' && c <= '9') {  /* Precision */
02897             w = w * 10 + (c - '0');
02898             c = *str++;
02899         }
02900         if (c == 'l') {             /* Prefix: Size is long int */
02901             f |= 2; c = *str++;
02902         }
02903         if (c == 's') {             /* Type is string */
02904             cc = f_puts(va_arg(arp, char*), fil);
02905             continue;
02906         }
02907         if (c == 'c') {             /* Type is character */
02908             cc = f_putc(va_arg(arp, int), fil);
02909             if (cc != EOF) cc = 1;
02910             continue;
02911         }
02912         r = 0;
02913         if (c == 'd') r = 10;       /* Type is signed decimal */
02914         if (c == 'u') r = 10;       /* Type is unsigned decimal */
02915         if (c == 'X') r = 16;       /* Type is unsigned hexdecimal */
02916         if (r == 0) break;          /* Unknown type */
02917         if (f & 2) {                /* Get the value */
02918             val = (ULONG)va_arg(arp, long);
02919         } else {
02920             val = (c == 'd') ? (ULONG)(long)va_arg(arp, int) : (ULONG)va_arg(arp, unsigned int);
02921         }
02922         /* Put numeral string */
02923         if (c == 'd') {
02924             if (val & 0x80000000) {
02925                 val = 0 - val;
02926                 f |= 4;
02927             }
02928         }
02929         i = sizeof(s) - 1; s[i] = 0;
02930         do {
02931             c = (UCHAR)(val % r + '0');
02932             if (c > '9') c += 7;
02933             s[--i] = c;
02934             val /= r;
02935         } while (i && val);
02936         if (i && (f & 4)) s[--i] = '-';
02937         w = sizeof(s) - 1 - w;
02938         while (i && i > w) s[--i] = (f & 1) ? '0' : ' ';
02939         cc = f_puts(&s[i], fil);
02940     }
02941
02942     va_end(arp);
02943     return (cc == EOF) ? cc : res;
02944 }
02945
02946 #endif /* !_FS_READONLY */
02947 #endif /* _USE_STRFUNC */


BeRTOS: ff.h Source File

  • fs
  • fatfs
ff.h
00001 /*---------------------------------------------------------------------------/
00002 /  FatFs - FAT file system module include file  R0.07a       (C)ChaN, 2009
00003 /----------------------------------------------------------------------------/
00004 / FatFs module is an open source software to implement FAT file system to
00005 / small embedded systems. This is a free software and is opened for education,
00006 / research and commercial developments under license policy of following trems.
00007 /
00008 /  Copyright (C) 2009, ChaN, all right reserved.
00009 /
00010 / * The FatFs module is a free software and there is NO WARRANTY.
00011 / * No restriction on use. You can use, modify and redistribute it for
00012 /   personal, non-profit or commercial use UNDER YOUR RESPONSIBILITY.
00013 / * Redistributions of source code must retain the above copyright notice.
00014 /----------------------------------------------------------------------------*/
00015
00016 /*---------------------------------------------------------------------------/
00017 / FatFs Configuration Options
00018 /
00019 / CAUTION! Do not forget to make clean the project after any changes to
00020 / the configuration options.
00021 /
00022 /----------------------------------------------------------------------------*/
00023 #ifndef _FATFS
00024 #define _FATFS
00025
00026 #include "integer.h"
00027 #include "cfg/cfg_fat.h"
00028
00029 #ifndef _WORD_ACCESS
00030 #define _WORD_ACCESS    0
00031 #endif
00032 /* The _WORD_ACCESS option defines which access method is used to the word
00033 /  data in the FAT structure.
00034 /
00035 /   0: Byte-by-byte access. Always compatible with all platforms.
00036 /   1: Word access. Do not choose this unless following condition is met.
00037 /
00038 /  When the byte order on the memory is big-endian or address miss-aligned
00039 /  word access results incorrect behavior, the _WORD_ACCESS must be set to 0.
00040 /  If it is not the case, the value can also be set to 1 to improve the
00041 /  performance and code efficiency. */
00042
00043 #ifndef _FS_READONLY
00044 #define _FS_READONLY    0
00045 #endif
00046 /* Setting _FS_READONLY to 1 defines read only configuration. This removes
00047 /  writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename,
00048 /  f_truncate and useless f_getfree. */
00049
00050 #ifndef _FS_MINIMIZE
00051 #define _FS_MINIMIZE    0
00052 #endif
00053 /* The _FS_MINIMIZE option defines minimization level to remove some functions.
00054 /
00055 /   0: Full function.
00056 /   1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename
00057 /      are removed.
00058 /   2: f_opendir and f_readdir are removed in addition to level 1.
00059 /   3: f_lseek is removed in addition to level 2. */
00060
00061 #ifndef _FS_TINY
00062 #define _FS_TINY    0
00063 #endif
00064 /* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system
00065 /  object instead of the sector buffer in the individual file object for file
00066 /  data transfer. This reduces memory consumption 512 bytes each file object. */
00067
00068 #ifndef _USE_STRFUNC
00069 #define _USE_STRFUNC    0
00070 #endif
00071 /* To enable string functions, set _USE_STRFUNC to 1 or 2. */
00072
00073 #ifndef _USE_MKFS
00074 #define _USE_MKFS   0
00075 #endif
00076 /* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */
00077
00078
00079 #ifndef _USE_FORWARD
00080 #define _USE_FORWARD    0
00081 #endif
00082 /* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */
00083
00084
00085 #ifndef _DRIVES
00086 #define _DRIVES     1
00087 #endif
00088 /* Number of volumes (logical drives) to be used. */
00089
00090 #ifndef _MAX_SS
00091 #define _MAX_SS 512
00092 #endif
00093 /* Maximum sector size to be handled. (512/1024/2048/4096) */
00094 /* 512 for memroy card and hard disk, 1024 for floppy disk, 2048 for MO disk */
00095
00096 #ifndef _MULTI_PARTITION
00097 #define _MULTI_PARTITION    0
00098 #endif
00099 /* When _MULTI_PARTITION is set to 0, each volume is bound to the same physical
00100 / drive number and can mount only first primaly partition. When it is set to 1,
00101 / each volume is tied to the partitions listed in Drives[]. */
00102
00103 #ifndef _CODE_PAGE
00104 #define _CODE_PAGE  932
00105 #endif
00106 /* The _CODE_PAGE specifies the OEM code page to be used on the target system.
00107 /  When it is non LFN configuration, there is no difference between SBCS code
00108 /  pages. When LFN is enabled, the code page must always be set correctly.
00109 /   437 - U.S.
00110 /   720 - Arabic
00111 /   737 - Greek
00112 /   775 - Baltic
00113 /   850 - Multilingual Latin 1
00114 /   852 - Latin 2
00115 /   855 - Cyrillic
00116 /   857 - Turkish
00117 /   858 - Multilingual Latin 1 + Euro
00118 /   862 - Hebrew
00119 /   866 - Russian
00120 /   874 - Thai
00121 /   932 - Japanese Shift-JIS       (DBCS)
00122 /   936 - Simplified Chinese GBK   (DBCS)
00123 /   949 - Korean                   (DBCS)
00124 /   950 - Traditional Chinese Big5 (DBCS)
00125 /   1258 - Vietnam
00126 */
00127
00128 #ifndef _USE_LFN
00129 #define _USE_LFN    0
00130 #endif
00131 #ifndef _MAX_LFN
00132 #define _MAX_LFN    255     /* Maximum LFN length to handle (max:255) */
00133 #endif
00134 /* The _USE_LFN option switches the LFN support.
00135 /
00136 /   0: Disable LFN.
00137 /   1: Enable LFN with static working buffer on the bss. NOT REENTRANT.
00138 /   2: Enable LFN with dynamic working buffer on the caller's STACK.
00139 /
00140 /  The working buffer occupies (_MAX_LFN + 1) * 2 bytes. When enable LFN,
00141 /  a Unicode - OEM code conversion function ff_convert() must be added to
00142 /  the project. */
00143
00144 #ifndef _FS_REENTRANT
00145 #define _FS_REENTRANT   0
00146 #endif
00147 #ifndef _TIMEOUT
00148 #define _TIMEOUT        1000    /* Timeout period in unit of time ticks */
00149 #endif
00150 #ifndef _SYNC_t
00151 #define _SYNC_t         HANDLE  /* Type of sync object used on the OS. */
00152                                 /* e.g. HANDLE, OS_EVENT*, ID and etc.. */
00153 #endif
00154 /* To make the FatFs module re-entrant, set _FS_REENTRANT to 1 and add user
00155 /  provided synchronization handlers, ff_req_grant, ff_rel_grant,
00156 /  ff_del_syncobj and ff_cre_syncobj function to the project. */
00157
00158
00159
00160 /* End of configuration options. Do not change followings without care.     */
00161 /*--------------------------------------------------------------------------*/
00162
00163
00164
00165 /* Definitions corresponds to multiple sector size */
00166
00167 #if _MAX_SS == 512
00168 #define SS(fs)  512
00169 #else
00170 #if _MAX_SS == 1024 || _MAX_SS == 2048 || _MAX_SS == 4096
00171 #define SS(fs)  ((fs)->s_size)
00172 #else
00173 #error Sector size must be 512, 1024, 2048 or 4096.
00174 #endif
00175 #endif
00176
00177
00178
00179 /* File system object structure */
00180
00181 typedef struct _FATFS {
00182     BYTE    fs_type;    /* FAT sub type */
00183     BYTE    drive;      /* Physical drive number */
00184     BYTE    csize;      /* Number of sectors per cluster */
00185     BYTE    n_fats;     /* Number of FAT copies */
00186     BYTE    wflag;      /* win[] dirty flag (1:must be written back) */
00187     BYTE    pad1;
00188     WORD    id;         /* File system mount ID */
00189     WORD    n_rootdir;  /* Number of root directory entries (0 on FAT32) */
00190 #if _FS_REENTRANT
00191     _SYNC_t sobj;       /* Identifier of sync object */
00192 #endif
00193 #if _MAX_SS != 512U
00194     WORD    s_size;     /* Sector size */
00195 #endif
00196 #if !_FS_READONLY
00197     BYTE    fsi_flag;   /* fsinfo dirty flag (1:must be written back) */
00198     BYTE    pad2;
00199     DWORD   last_clust; /* Last allocated cluster */
00200     DWORD   free_clust; /* Number of free clusters */
00201     DWORD   fsi_sector; /* fsinfo sector */
00202 #endif
00203     DWORD   sects_fat;  /* Sectors per fat */
00204     DWORD   max_clust;  /* Maximum cluster# + 1. Number of clusters is max_clust - 2 */
00205     DWORD   fatbase;    /* FAT start sector */
00206     DWORD   dirbase;    /* Root directory start sector (Cluster# on FAT32) */
00207     DWORD   database;   /* Data start sector */
00208     DWORD   winsect;    /* Current sector appearing in the win[] */
00209     BYTE    win[_MAX_SS];/* Disk access window for Directory/FAT */
00210 } FATFS;
00211
00212
00213
00214 /* Directory object structure */
00215
00216 typedef struct _DIR {
00217     WORD    id;         /* Owner file system mount ID */
00218     WORD    index;      /* Current index number */
00219     FATFS*  fs;         /* Pointer to the owner file system object */
00220     DWORD   sclust;     /* Table start cluster (0:Static table) */
00221     DWORD   clust;      /* Current cluster */
00222     DWORD   sect;       /* Current sector */
00223     BYTE*   dir;        /* Pointer to the current SFN entry in the win[] */
00224     BYTE*   fn;         /* Pointer to the SFN (in/out) {file[8],ext[3],status[1]} */
00225 #if _USE_LFN
00226     WCHAR*  lfn;        /* Pointer to the LFN working buffer */
00227     WORD    lfn_idx;    /* Last matched LFN index (0xFFFF:No LFN) */
00228 #endif
00229 } DIR;
00230
00231
00232
00233 /* File object structure */
00234
00235 typedef struct _FIL {
00236     FATFS*  fs;         /* Pointer to the owner file system object */
00237     WORD    id;         /* Owner file system mount ID */
00238     BYTE    flag;       /* File status flags */
00239     BYTE    csect;      /* Sector address in the cluster */
00240     DWORD   fptr;       /* File R/W pointer */
00241     DWORD   fsize;      /* File size */
00242     DWORD   org_clust;  /* File start cluster */
00243     DWORD   curr_clust; /* Current cluster */
00244     DWORD   dsect;      /* Current data sector */
00245 #if !_FS_READONLY
00246     DWORD   dir_sect;   /* Sector containing the directory entry */
00247     BYTE*   dir_ptr;    /* Ponter to the directory entry in the window */
00248 #endif
00249 #if !_FS_TINY
00250     BYTE    buf[_MAX_SS];/* File R/W buffer */
00251 #endif
00252 } FIL;
00253
00254
00255
00256 /* File status structure */
00257
00258 typedef struct _FILINFO {
00259     DWORD fsize;        /* File size */
00260     WORD fdate;         /* Last modified date */
00261     WORD ftime;         /* Last modified time */
00262     BYTE fattrib;       /* Attribute */
00263     char fname[13];     /* Short file name (8.3 format) */
00264 #if _USE_LFN
00265     char *lfname;       /* Pointer to the LFN buffer */
00266     int lfsize;         /* Size of LFN buffer [bytes] */
00267 #endif
00268 } FILINFO;
00269
00270
00271
00272 /* DBCS code ranges */
00273
00274 #if _CODE_PAGE == 932   /* CP932 (Japanese Shift-JIS) */
00275 #define _DF1S   0x81    /* DBC 1st byte range 1 start */
00276 #define _DF1E   0x9F    /* DBC 1st byte range 1 end */
00277 #define _DF2S   0xE0    /* DBC 1st byte range 2 start */
00278 #define _DF2E   0xFC    /* DBC 1st byte range 2 end */
00279 #define _DS1S   0x40    /* DBC 2nd byte range 1 start */
00280 #define _DS1E   0x7E    /* DBC 2nd byte range 1 end */
00281 #define _DS2S   0x80    /* DBC 2nd byte range 2 start */
00282 #define _DS2E   0xFC    /* DBC 2nd byte range 2 end */
00283
00284 #elif _CODE_PAGE == 936 /* CP936 (Simplified Chinese GBK) */
00285 #define _DF1S   0x81
00286 #define _DF1E   0xFE
00287 #define _DS1S   0x40
00288 #define _DS1E   0x7E
00289 #define _DS2S   0x80
00290 #define _DS2E   0xFE
00291
00292 #elif _CODE_PAGE == 949 /* CP949 (Korean) */
00293 #define _DF1S   0x81
00294 #define _DF1E   0xFE
00295 #define _DS1S   0x41
00296 #define _DS1E   0x5A
00297 #define _DS2S   0x61
00298 #define _DS2E   0x7A
00299 #define _DS3S   0x81
00300 #define _DS3E   0xFE
00301
00302 #elif _CODE_PAGE == 950 /* CP950 (Traditional Chinese Big5) */
00303 #define _DF1S   0x81
00304 #define _DF1E   0xFE
00305 #define _DS1S   0x40
00306 #define _DS1E   0x7E
00307 #define _DS2S   0xA1
00308 #define _DS2E   0xFE
00309
00310 #else                   /* SBCS code pages */
00311 #define _DF1S   0
00312
00313 #endif
00314
00315
00316
00317 /* Character code support macros */
00318
00319 #define IsUpper(c)  (((c)>='A')&&((c)<='Z'))
00320 #define IsLower(c)  (((c)>='a')&&((c)<='z'))
00321 #define IsDigit(c)  (((c)>='0')&&((c)<='9'))
00322
00323 #if _DF1S   /* DBCS configuration */
00324
00325 #if _DF2S   /* Two 1st byte areas */
00326 #define IsDBCS1(c)  (((BYTE)(c) >= _DF1S && (BYTE)(c) <= _DF1E) || ((BYTE)(c) >= _DF2S && (BYTE)(c) <= _DF2E))
00327 #else       /* One 1st byte area */
00328 #define IsDBCS1(c)  ((BYTE)(c) >= _DF1S && (BYTE)(c) <= _DF1E)
00329 #endif
00330
00331 #if _DS3S   /* Three 2nd byte areas */
00332 #define IsDBCS2(c)  (((BYTE)(c) >= _DS1S && (BYTE)(c) <= _DS1E) || ((BYTE)(c) >= _DS2S && (BYTE)(c) <= _DS2E) || ((BYTE)(c) >= _DS3S && (BYTE)(c) <= _DS3E))
00333 #else       /* Two 2nd byte areas */
00334 #define IsDBCS2(c)  (((BYTE)(c) >= _DS1S && (BYTE)(c) <= _DS1E) || ((BYTE)(c) >= _DS2S && (BYTE)(c) <= _DS2E))
00335 #endif
00336
00337 #else       /* SBCS configuration */
00338
00339 #define IsDBCS1(c)  0
00340 #define IsDBCS2(c)  0
00341
00342 #endif /* _DF1S */
00343
00344
00345
00346 /* Definitions corresponds to multi partition */
00347
00348 #if _MULTI_PARTITION        /* Multiple partition configuration */
00349
00350 typedef struct _PARTITION {
00351     BYTE pd;    /* Physical drive# */
00352     BYTE pt;    /* Partition # (0-3) */
00353 } PARTITION;
00354
00355 extern
00356 const PARTITION Drives[];           /* Logical drive# to physical location conversion table */
00357 #define LD2PD(drv) (Drives[drv].pd) /* Get physical drive# */
00358 #define LD2PT(drv) (Drives[drv].pt) /* Get partition# */
00359
00360 #else                       /* Single partition configuration */
00361
00362 #define LD2PD(drv) (drv)    /* Physical drive# is equal to the logical drive# */
00363 #define LD2PT(drv) 0        /* Always mounts the 1st partition */
00364
00365 #endif
00366
00367
00368
00369 /* File function return code (FRESULT) */
00370
00371 typedef enum {
00372     FR_OK = 0,          /* 0 */
00373     FR_DISK_ERR,        /* 1 */
00374     FR_INT_ERR,         /* 2 */
00375     FR_NOT_READY,       /* 3 */
00376     FR_NO_FILE,         /* 4 */
00377     FR_NO_PATH,         /* 5 */
00378     FR_INVALID_NAME,    /* 6 */
00379     FR_DENIED,          /* 7 */
00380     FR_EXIST,           /* 8 */
00381     FR_INVALID_OBJECT,  /* 9 */
00382     FR_WRITE_PROTECTED, /* 10 */
00383     FR_INVALID_DRIVE,   /* 11 */
00384     FR_NOT_ENABLED,     /* 12 */
00385     FR_NO_FILESYSTEM,   /* 13 */
00386     FR_MKFS_ABORTED,    /* 14 */
00387     FR_TIMEOUT          /* 15 */
00388 } FRESULT;
00389
00390
00391
00392 /*--------------------------------------------------------------*/
00393 /* FatFs module application interface                           */
00394
00395 FRESULT f_mount (BYTE, FATFS*);                     /* Mount/Unmount a logical drive */
00396 FRESULT f_open (FIL*, const char*, BYTE);           /* Open or create a file */
00397 FRESULT f_read (FIL*, void*, UINT, UINT*);          /* Read data from a file */
00398 FRESULT f_write (FIL*, const void*, UINT, UINT*);   /* Write data to a file */
00399 FRESULT f_lseek (FIL*, DWORD);                      /* Move file pointer of a file object */
00400 FRESULT f_close (FIL*);                             /* Close an open file object */
00401 FRESULT f_opendir (DIR*, const char*);              /* Open an existing directory */
00402 FRESULT f_readdir (DIR*, FILINFO*);                 /* Read a directory item */
00403 FRESULT f_stat (const char*, FILINFO*);             /* Get file status */
00404 FRESULT f_getfree (const char*, DWORD*, FATFS**);   /* Get number of free clusters on the drive */
00405 FRESULT f_truncate (FIL*);                          /* Truncate file */
00406 FRESULT f_sync (FIL*);                              /* Flush cached data of a writing file */
00407 FRESULT f_unlink (const char*);                     /* Delete an existing file or directory */
00408 FRESULT f_mkdir (const char*);                      /* Create a new directory */
00409 FRESULT f_chmod (const char*, BYTE, BYTE);          /* Change attriburte of the file/dir */
00410 FRESULT f_utime (const char*, const FILINFO*);      /* Change timestamp of the file/dir */
00411 FRESULT f_rename (const char*, const char*);        /* Rename/Move a file or directory */
00412 FRESULT f_forward (FIL*, UINT(*)(const BYTE*,UINT), UINT, UINT*);   /* Forward data to the stream */
00413 FRESULT f_mkfs (BYTE, BYTE, WORD);                  /* Create a file system on the drive */
00414
00415 #if _USE_STRFUNC
00416 int f_putc (int, FIL*);                             /* Put a character to the file */
00417 int f_puts (const char*, FIL*);                     /* Put a string to the file */
00418 int f_printf (FIL*, const char*, ...);              /* Put a formatted string to the file */
00419 char* f_gets (char*, int, FIL*);                    /* Get a string from the file */
00420 #define f_eof(fp) (((fp)->fptr == (fp)->fsize) ? 1 : 0)
00421 #define f_error(fp) (((fp)->flag & FA__ERROR) ? 1 : 0)
00422 #ifndef EOF
00423 #define EOF -1
00424 #endif
00425 #endif
00426
00427
00428
00429 /*--------------------------------------------------------------*/
00430 /* User defined functions                                       */
00431
00432 /* Real time clock */
00433 #if !_FS_READONLY
00434 DWORD get_fattime (void);   /* 31-25: Year(0-127 org.1980), 24-21: Month(1-12), 20-16: Day(1-31) */
00435                             /* 15-11: Hour(0-23), 10-5: Minute(0-59), 4-0: Second(0-29 *2) */
00436 #endif
00437
00438 /* Unicode - OEM code conversion */
00439 #if _USE_LFN
00440 WCHAR ff_convert (WCHAR, UINT);
00441 #endif
00442
00443 /* Sync functions */
00444 #if _FS_REENTRANT
00445 BOOL ff_cre_syncobj(BYTE, _SYNC_t*);
00446 BOOL ff_del_syncobj(_SYNC_t);
00447 BOOL ff_req_grant(_SYNC_t);
00448 void ff_rel_grant(_SYNC_t);
00449 #endif
00450
00451
00452
00453 /*--------------------------------------------------------------*/
00454 /* Flags and offset address                                     */
00455
00456
00457 /* File access control and file status flags (FIL.flag) */
00458
00459 #define FA_READ             0x01
00460 #define FA_OPEN_EXISTING    0x00
00461 #if _FS_READONLY == 0
00462 #define FA_WRITE            0x02
00463 #define FA_CREATE_NEW       0x04
00464 #define FA_CREATE_ALWAYS    0x08
00465 #define FA_OPEN_ALWAYS      0x10
00466 #define FA__WRITTEN         0x20
00467 #define FA__DIRTY           0x40
00468 #endif
00469 #define FA__ERROR           0x80
00470
00471
00472 /* FAT sub type (FATFS.fs_type) */
00473
00474 #define FS_FAT12    1
00475 #define FS_FAT16    2
00476 #define FS_FAT32    3
00477
00478
00479 /* File attribute bits for directory entry */
00480
00481 #define AM_RDO  0x01    /* Read only */
00482 #define AM_HID  0x02    /* Hidden */
00483 #define AM_SYS  0x04    /* System */
00484 #define AM_VOL  0x08    /* Volume label */
00485 #define AM_LFN  0x0F    /* LFN entry */
00486 #define AM_DIR  0x10    /* Directory */
00487 #define AM_ARC  0x20    /* Archive */
00488 #define AM_MASK 0x3F    /* Mask of defined bits */
00489
00490
00491 /* FatFs refers the members in the FAT structures with byte offset instead
00492 / of structure member because there are incompatibility of the packing option
00493 / between various compilers. */
00494
00495 #define BS_jmpBoot          0
00496 #define BS_OEMName          3
00497 #define BPB_BytsPerSec      11
00498 #define BPB_SecPerClus      13
00499 #define BPB_RsvdSecCnt      14
00500 #define BPB_NumFATs         16
00501 #define BPB_RootEntCnt      17
00502 #define BPB_TotSec16        19
00503 #define BPB_Media           21
00504 #define BPB_FATSz16         22
00505 #define BPB_SecPerTrk       24
00506 #define BPB_NumHeads        26
00507 #define BPB_HiddSec         28
00508 #define BPB_TotSec32        32
00509 #define BS_55AA             510
00510
00511 #define BS_DrvNum           36
00512 #define BS_BootSig          38
00513 #define BS_VolID            39
00514 #define BS_VolLab           43
00515 #define BS_FilSysType       54
00516
00517 #define BPB_FATSz32         36
00518 #define BPB_ExtFlags        40
00519 #define BPB_FSVer           42
00520 #define BPB_RootClus        44
00521 #define BPB_FSInfo          48
00522 #define BPB_BkBootSec       50
00523 #define BS_DrvNum32         64
00524 #define BS_BootSig32        66
00525 #define BS_VolID32          67
00526 #define BS_VolLab32         71
00527 #define BS_FilSysType32     82
00528
00529 #define FSI_LeadSig         0
00530 #define FSI_StrucSig        484
00531 #define FSI_Free_Count      488
00532 #define FSI_Nxt_Free        492
00533
00534 #define MBR_Table           446
00535
00536 #define DIR_Name            0
00537 #define DIR_Attr            11
00538 #define DIR_NTres           12
00539 #define DIR_CrtTime         14
00540 #define DIR_CrtDate         16
00541 #define DIR_FstClusHI       20
00542 #define DIR_WrtTime         22
00543 #define DIR_WrtDate         24
00544 #define DIR_FstClusLO       26
00545 #define DIR_FileSize        28
00546 #define LDIR_Ord            0
00547 #define LDIR_Attr           11
00548 #define LDIR_Type           12
00549 #define LDIR_Chksum         13
00550 #define LDIR_FstClusLO      26
00551
00552
00553
00554 /*--------------------------------*/
00555 /* Multi-byte word access macros  */
00556
00557 #if _WORD_ACCESS == 1   /* Enable word access to the FAT structure */
00558 #define LD_WORD(ptr)        (WORD)(*(WORD*)(BYTE*)(ptr))
00559 #define LD_DWORD(ptr)       (DWORD)(*(DWORD*)(BYTE*)(ptr))
00560 #define ST_WORD(ptr,val)    *(WORD*)(BYTE*)(ptr)=(WORD)(val)
00561 #define ST_DWORD(ptr,val)   *(DWORD*)(BYTE*)(ptr)=(DWORD)(val)
00562 #else                   /* Use byte-by-byte access to the FAT structure */
00563 #define LD_WORD(ptr)        (WORD)(((WORD)*(BYTE*)((ptr)+1)<<8)|(WORD)*(BYTE*)(ptr))
00564 #define LD_DWORD(ptr)       (DWORD)(((DWORD)*(BYTE*)((ptr)+3)<<24)|((DWORD)*(BYTE*)((ptr)+2)<<16)|((WORD)*(BYTE*)((ptr)+1)<<8)|*(BYTE*)(ptr))
00565 #define ST_WORD(ptr,val)    *(BYTE*)(ptr)=(BYTE)(val); *(BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8)
00566 #define ST_DWORD(ptr,val)   *(BYTE*)(ptr)=(BYTE)(val); *(BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8); *(BYTE*)((ptr)+2)=(BYTE)((DWORD)(val)>>16); *(BYTE*)((ptr)+3)=(BYTE)((DWORD)(val)>>24)
00567 #endif
00568
00569
00570 #endif /* _FATFS */


BeRTOS: fifobuf.h File Reference

  • struct
Functions
fifobuf.h File Reference
#include <cpu/types.h>
#include <cpu/irq.h>
#include <cfg/debug.h>

Go to the source code of this file.

Functions

bool | fifo_isempty (const FIFOBuffer *fb)
Check whether the fifo is empty.
bool | fifo_isfull (const FIFOBuffer *fb)
Check whether the fifo is full.
void | fifo_push (FIFOBuffer *fb, unsigned char c)
Push a character on the fifo buffer.
unsigned char | fifo_pop (FIFOBuffer *fb)
Pop a character from the fifo buffer.
void | fifo_flush (FIFOBuffer *fb)
Make the fifo empty, discarding all its current contents.
bool | fifo_isempty_locked (const FIFOBuffer *fb)
Similar to fifo_isempty(), but with stronger guarantees for concurrent access between user and interrupt code.
void | fifo_push_locked (FIFOBuffer *fb, unsigned char c)
Similar to fifo_push(), but with stronger guarantees for concurrent access between user and interrupt code.
void | fifo_flush_locked (FIFOBuffer *fb)
Similar to fifo_flush(), but with stronger guarantees for concurrent access between user and interrupt code.
bool | fifo_isfull_locked (const FIFOBuffer *_fb)
Thread safe version of fifo_isfull()
void | fifo_init (FIFOBuffer *fb, unsigned char *buf, size_t size)
FIFO Initialization.
size_t | fifo_len (FIFOBuffer *fb)

Detailed Description

Definition in file fifobuf.h.


BeRTOS: fifobuf.h Source File

  • struct
fifobuf.h
Go to the documentation of this file.
00001
00070 #ifndef STRUCT_FIFO_H
00071 #define STRUCT_FIFO_H
00072
00073 #include <cpu/types.h>
00074 #include <cpu/irq.h>
00075 #include <cfg/debug.h>
00076
00077 typedef struct FIFOBuffer
00078 {
00079     unsigned char * volatile head;
00080     unsigned char * volatile tail;
00081     unsigned char *begin;
00082     unsigned char *end;
00083 } FIFOBuffer;
00084
00085
00086 #define ASSERT_VALID_FIFO(fifo) \
00087     ATOMIC( \
00088         ASSERT((fifo)->head >= (fifo)->begin); \
00089         ASSERT((fifo)->head <= (fifo)->end); \
00090         ASSERT((fifo)->tail >= (fifo)->begin); \
00091         ASSERT((fifo)->tail <= (fifo)->end); \
00092     )
00093
00094
00105 INLINE bool fifo_isempty(const FIFOBuffer *fb)
00106 {
00107     //ASSERT_VALID_FIFO(fb);
00108     return fb->head == fb->tail;
00109 }
00110
00111
00125 INLINE bool fifo_isfull(const FIFOBuffer *fb)
00126 {
00127     //ASSERT_VALID_FIFO(fb);
00128     return
00129         ((fb->head == fb->begin) && (fb->tail == fb->end))
00130         || (fb->tail == fb->head - 1);
00131 }
00132
00133
00148 INLINE void fifo_push(FIFOBuffer *fb, unsigned char c)
00149 {
00150 #ifdef __MWERKS__
00151 #pragma interrupt called
00152 #endif
00153     //ASSERT_VALID_FIFO(fb);
00154
00155     /* Write at tail position */
00156     *(fb->tail) = c;
00157
00158     if (UNLIKELY(fb->tail == fb->end))
00159         /* wrap tail around */
00160         fb->tail = fb->begin;
00161     else
00162         /* Move tail forward */
00163         fb->tail++;
00164 }
00165
00166
00177 INLINE unsigned char fifo_pop(FIFOBuffer *fb)
00178 {
00179 #ifdef __MWERKS__
00180 #pragma interrupt called
00181 #endif
00182     //ASSERT_VALID_FIFO(fb);
00183
00184     if (UNLIKELY(fb->head == fb->end))
00185     {
00186         /* wrap head around */
00187         fb->head = fb->begin;
00188         return *(fb->end);
00189     }
00190     else
00191         /* move head forward */
00192         return *(fb->head++);
00193 }
00194
00195
00199 INLINE void fifo_flush(FIFOBuffer *fb)
00200 {
00201     //ASSERT_VALID_FIFO(fb);
00202     fb->head = fb->tail;
00203 }
00204
00205
00206 #if CPU_REG_BITS >= CPU_BITS_PER_PTR
00207
00208     /*
00209      * 16/32bit CPUs that can update a pointer with a single write
00210      * operation, no need to disable interrupts.
00211      */
00212     #define fifo_isempty_locked(fb) fifo_isempty((fb))
00213     #define fifo_push_locked(fb, c) fifo_push((fb), (c))
00214     #define fifo_pop_locked(fb)     fifo_pop((fb))
00215     #define fifo_flush_locked(fb)   fifo_flush((fb))
00216
00217 #else /* CPU_REG_BITS < CPU_BITS_PER_PTR */
00218
00227     INLINE bool fifo_isempty_locked(const FIFOBuffer *fb)
00228     {
00229         bool result;
00230         ATOMIC(result = fifo_isempty(fb));
00231         return result;
00232     }
00233
00234
00243     INLINE void fifo_push_locked(FIFOBuffer *fb, unsigned char c)
00244     {
00245         ATOMIC(fifo_push(fb, c));
00246     }
00247
00248     /* Probably not really needed, but hard to prove. */
00249     INLINE unsigned char fifo_pop_locked(FIFOBuffer *fb)
00250     {
00251         unsigned char c;
00252         ATOMIC(c = fifo_pop(fb));
00253         return c;
00254     }
00255
00264     INLINE void fifo_flush_locked(FIFOBuffer *fb)
00265     {
00266         ATOMIC(fifo_flush(fb));
00267     }
00268
00269 #endif /* CPU_REG_BITS < BITS_PER_PTR */
00270
00271
00275 INLINE bool fifo_isfull_locked(const FIFOBuffer *_fb)
00276 {
00277     bool result;
00278     ATOMIC(result = fifo_isfull(_fb));
00279     return result;
00280 }
00281
00282
00286 INLINE void fifo_init(FIFOBuffer *fb, unsigned char *buf, size_t size)
00287 {
00288     /* FIFO buffers have a known bug with 1-byte buffers. */
00289     ASSERT(size > 1);
00290
00291     fb->head = fb->tail = fb->begin = buf;
00292     fb->end = buf + size - 1;
00293 }
00294
00298 INLINE size_t fifo_len(FIFOBuffer *fb)
00299 {
00300     return fb->end - fb->begin;
00301 }
00302
00303
00304 #if 0
00305
00306 /*
00307  * UNTESTED: if uncommented, to be moved in fifobuf.c
00308  */
00309 void fifo_pushblock(FIFOBuffer *fb, unsigned char *block, size_t len)
00310 {
00311     size_t freelen;
00312
00313     /* Se c'e' spazio da tail alla fine del buffer */
00314     if (fb->tail >= fb->head)
00315     {
00316         freelen = fb->end - fb->tail + 1;
00317
00318         /* C'e' abbastanza spazio per scrivere tutto il blocco? */
00319         if (freelen < len)
00320         {
00321             /* Scrivi quello che entra fino alla fine del buffer */
00322             memcpy(fb->tail, block, freelen);
00323             block += freelen;
00324             len -= freelen;
00325             fb->tail = fb->begin;
00326         }
00327         else
00328         {
00329             /* Scrivi tutto il blocco */
00330             memcpy(fb->tail, block, len);
00331             fb->tail += len;
00332             return;
00333         }
00334     }
00335
00336     for(;;)
00337     {
00338         while (!(freelen = fb->head - fb->tail - 1))
00339             Delay(FIFO_POLLDELAY);
00340
00341         /* C'e' abbastanza spazio per scrivere tutto il blocco? */
00342         if (freelen < len)
00343         {
00344             /* Scrivi quello che entra fino alla fine del buffer */
00345             memcpy(fb->tail, block, freelen);
00346             block += freelen;
00347             len -= freelen;
00348             fb->tail += freelen;
00349         }
00350         else
00351         {
00352             /* Scrivi tutto il blocco */
00353             memcpy(fb->tail, block, len);
00354             fb->tail += len;
00355             return;
00356         }
00357     }
00358 }
00359 #endif
00360  /* defgroup fifobuf */
00362
00363 #endif /* STRUCT_FIFO_H */


BeRTOS: File List

File List
Here is a list of all documented files with brief descriptions:
adc.c [code] | ADC driver (implementation)
adc.h [code] |
adc_arm.c [code] | Low-level ADC module for ARM (inplementation)
adc_arm.h [code] | Low-level ADC module for ARM (interface)
adc_at91.c [code] | ADC hardware-specific implementation
adc_at91.h [code] | ADC hardware-specific definition
adc_avr.c [code] | ADC hardware-specific definition
adc_avr.h [code] | ADC hardware-specific definition
adc_cm3.h [code] | Low-level ADC module for ARM (interface)
adc_lm3s.c [code] | ADC hardware-specific implementation
adc_lm3s.h [code] | ADC hardware-specific definition
adc_sam3.c [code] | ADC hardware-specific implementation
adc_sam3.h [code] | ADC hardware-specific definition
adc_stm32.c [code] | ADC hardware-specific implementation
adc_stm32.h [code] | ADC hardware-specific definition
aes.c [code] | AES Advanced Encryption Standard implementation
aes.h [code] | AES Advanced Encryption Standard implementation
aes_f32.h [code] | AES Advanced Encryption Standard implementation
aes_f8.h [code] | AES Advanced Encryption Standard implementation
afsk.c [code] | AFSK1200 modem
afsk.h [code] | AFSK1200 modem
arm.h [code] |
at91.h [code] |
at91_adc.h [code] |
at91_aic.h [code] |
at91_dbgu.h [code] |
at91_emac.h [code] |
at91_mc.h [code] |
at91_pio.h [code] |
at91_pit.h [code] |
at91_pmc.h [code] |
at91_pwm.h [code] |
at91_rstc.h [code] |
at91_spi.h [code] |
at91_ssc.h [code] |
at91_tc.h [code] |
at91_twi.h [code] |
at91_us.h [code] |
at91_wdt.h [code] |
at91sam7.h [code] |
attr.h [code] | CPU-specific attributes
ax25.c [code] | Simple AX25 data link layer implementation
ax25.h [code] | Simple AX25 data link layer implementation
battfs.c [code] | BattFS: a filesystem for embedded platforms (implementation)
battfs.h [code] | BattFS: a filesystem for embedded platforms (interface). TODO: Add detailed filesystem description
benchmarks.c [code] |
benchmarks.h [code] |
bitarray.h [code] | Bitarray module
bitmap.c [code] | Bitmap manipulation routines
blanker.c [code] | Display Blanker (implementation)
blanker.h [code] | Display Blanker (implementation)
blowfish.c [code] | Blowfish implementation
blowfish.h [code] | Blowfish implementation
buzzer.c [code] | Buzzer driver (implementation)
buzzer.h [code] | Buzzer driver
buzzerled.c [code] | Generic library to handle buzzers and leds
buzzerled.h [code] | Generic library to handle buzzers and leds
buzzerled_dsp56k.h [code] | Hardware support for buzzers and leds in DSP56K-based boards
cpu/byteorder.h [code] | Functions to convert integers to/from host byte-order
mware/byteorder.h [code] |
cc932.c [code] |
cc936.c [code] |
cc949.c [code] |
cc950.c [code] |
ccsbcs.c [code] |
cfg_adc.h [code] | Configuration file for the ADC module
cfg_afsk.h [code] | Configuration file for AFSK1200 modem
cfg_arch.h [code] | Set system configuration
cfg_attr.h [code] | Configuration file for Debug module
cfg_ax25.h [code] | Configuration file for the AX25 protocol module
cfg_battfs.h [code] | Configuration file for BattFS module
cfg_boot.h [code] | Configuration file for bootloader module
cfg_buzzerled.h [code] | Configuration file for buzzerled module
cfg_context_switch.h [code] | Configuration file for the context switch benchmark
cfg_dac.h [code] | Configuration file for DAC module
cfg_dataflash.h [code] | Configuration file for data flash memory module
cfg_dc_motor.h [code] | Configuration file for DC motor module
cfg_debug.h [code] | Configuration file for Debug module
cfg_eeprom.h [code] | Configuration file for the Eeprom module
cfg_emb_flash.h [code] | Configuration file for embedded flash module
cfg_eth.h [code] | Configuration file for the generic ethernet driver module
cfg_fat.h [code] | Configuration file for Fat module
cfg_flash25.h [code] | Configuration file for flash25 module
cfg_formatwr.h [code] | Configuration file for formatted write module
cfg_gfx.h [code] | Configuration file for GFX module
cfg_hashtable.h [code] | Configuration file for hashtable module
cfg_heap.h [code] | Configuration file for heap module
cfg_i2c.h [code] | Configuration file for I2C module
cfg_i2s.h [code] | Configuration file for I2S module
cfg_ini_reader.h [code] | Configuration file for ini reader module
cfg_kbd.h [code] | Configuration file for keyboard module
cfg_kern.h [code] | Kernel configuration parameters (deprecated)
cfg_keytag.h [code] | Configuration file for keytag module
cfg_kfile.h [code] | Configuration file for KFile interface module
cfg_lcd_32122a.h [code] | Displaytech 32122A LCD driver configuration file
cfg_lcd_hd44.h [code] | Configuration file for lcd display module
cfg_led_7seg.h [code] | Configuration file for led 7 segment display
cfg_lm75.h [code] | Configuration file for the LM75 sensor temperature
cfg_lwip.h [code] | Configuration file for the lwIP TCP/IP stack module
cfg_md2.h [code] | Configuration file for MD2 module
cfg_menu.h [code] | Configuration file for Menu module
cfg_monitor.h [code] | Kernel monitor configuration parameters
cfg_mt29f.h [code] | Configuration file for MT29F driver module
cfg_nmea.h [code] | Configuration file for NMEA module
cfg_ntc.h [code] | Configuration file for NTC module
cfg_parser.h [code] | Configuration file for parser module
cfg_phase.h [code] | Configuration file for phase module
cfg_pid.h [code] | Configuration file for PWM module
cfg_pocketbus.h [code] | Configuration file for pocketbus module
cfg_proc.h [code] | Kernel configuration parameters
cfg_pwm.h [code] | Configuration file for PWM module
cfg_ramp.h [code] | Configuration file Ramp algorithm module
cfg_random.h [code] | Configuration file for the "random" module
cfg_randpool.h [code] | Configuration file for randpool module
cfg_sd.h [code] | Configuration file Secure Digital module
cfg_sem.h [code] | Kernel semaphores configuration parameters
cfg_ser.h [code] | Configuration file for serial module
cfg_signal.h [code] | Kernel signals configuration parameters
cfg_spi_bitbang.h [code] | Configuration file for SPI bitbang module
cfg_spi_dma.h [code] | Configuration file for spi dma module
cfg_stepper.h [code] | Configuration file for stepper motor module
cfg_tas5706a.h [code] | Configuration file for the TAS5706A module
cfg_tftp.h [code] |
cfg_thermo.h [code] | Configuration file for thermo module
cfg_timer.h [code] | Configuration file for timer module
cfg_usb.h [code] | Configuration file for the USB driver module
cfg_usbkbd.h [code] | Configuration file for the usbkbd driver module
cfg_usbmouse.h [code] | Configuration file for the usbmouse driver module
cfg_usbser.h [code] | Configuration file for the USB serial driver module
cfg_wdt.h [code] | Configuration file for watchdog module
cfg_xmodem.h [code] | Configuration file for xmodem module
charts.c [code] | Simple charts on top of mware/gfx routines (implementation)
charts.h [code] |
cipher.c [code] | Generic interface for symmetric block ciphers
cipher.h [code] | Generic interface for symmetric block ciphers
clock_cm3.h [code] | Low-level Clock module for ARM Cortex-m3 (interface)
clock_lm3s.c [code] | LM3S1968 Clocking driver
clock_lm3s.h [code] | Low-level clocking driver for LM3S1968
clock_sam3.c [code] | Atmel SAM3 clock setup
clock_sam3.h [code] | Low-level clocking driver for SAM3
clock_stm32.c [code] | STM32 Clocking driver
clock_stm32.h [code] | Low-level clocking driver for Cortex-M3 STM32
cm3.h [code] | Low-level Registry definition for ARM Cortex-m3 (interface)
cmd_hunk.h [code] | Preprocessor magic to create hunks for the commands executed from the parser
compiler.h [code] | Additional support macros for compiler independance
context_switch.c [code] | Context switch benchmark
context_switch.h [code] | Context switch benchmark
coop.c [code] |
crc.c [code] | CRC table and support routines
crc.h [code] | Cyclic Redundancy Check 16 (CRC)
crc_ccitt.c [code] | CRC-CCITT table and support routines
crc_ccitt.h [code] | CCITT Cyclic Redundancy Check (CRC-CCITT)
dac.h [code] |
dac_cm3.h [code] | Low-level DAC module for Cortex-m3
dac_sam3.c [code] | DAC hardware-specific implementation
dac_sam3.h [code] | DAC hardware-specific definition
dataflash.c [code] | Function library for dataflash AT45DB family (implementation)
dataflash.h [code] | Function library for dataflash AT45DB family
dataflash_hwtest.c [code] | DataFlash test
dc_motor.c [code] | DC motor driver (implementation)
dc_motor.h [code] | DC motor driver
dc_motor_hwtest.c [code] | Test for PWM driver (implementation)
debug.h [code] |
depend.h [code] | Depend module
detect.h [code] | CPU detection through special preprocessor macros
diskio.c [code] |
diskio.h [code] |
diskio_emul.c [code] | Low level disk access for FatFs emulated
dnotifier.c [code] | Notifier obj (implementation)
dnotifier.h [code] | Notifier obj (interface)
dtag.h [code] | Tags interface
dwidget.c [code] | Widget (implementation)
dwidget.h [code] | Widget (interface)
editbool.c [code] | Edit bool widget (implementation)
editbool.h [code] | Edit bool widget (interface)
editint.c [code] | Integer edit widget (implementation)
editint.h [code] | Integer edit (interface)
eeprom.c [code] | Driver for the 24xx16 and 24xx256 I2C EEPROMS (implementation)
eeprom.h [code] | Driver for the 24xx16 and 24xx256 I2C EEPROMS
emul.h [code] | Qt-based emulator framework for embedded applications (interface)
emulkbd.h [code] | QT-based widget for leyboard emulation (interface)
emulwin.h [code] | Main Qt window for embedded applications emulator (interface)
entropy.h [code] | Entropy pool generic interface
eth.h [code] | Ethernet standard descriptors
eth_at91.c [code] | EMAC driver for AT91SAM7X Family
eth_at91.h [code] | EMAC driver for AT91SAM7X Family, interface
eth_sam3.c [code] | EMAC driver for AT91SAM family with Davicom 9161A phy
eth_sam3.h [code] | EMAC driver for AT91SAM family with Davicom 9161A phy, interface
event.c [code] | Events handling implementation
event.h [code] |
except.h [code] | C++-like structured exception handling for C programs
fat.c [code] | FatFS: kfile interface for FatFS module by ChaN
fat.h [code] | FatFS: kfile interface for FatFS module by ChaN
ff.c [code] |
ff.h [code] |
fifobuf.h [code] |
fixed6x8.c [code] | Font 8x6 IBM-PC 8bit
flash.h [code] |
flash25.c [code] | Function library for serial Flash memory
flash25.h [code] | Function library for serial Flash memory
flash25_hwtest.c [code] | Test function for serial Flash memory
flash_arm.h [code] | Low-level flash module for ARM (interface)
flash_at91.c [code] | At91sam7 Internal flash read/write driver
flash_at91.h [code] | At91sam7 Internal flash read/write driver
flash_avr.c [code] | Self programming routines
flash_avr.h [code] | AVR Internal flash read/write driver
flash_cm3.h [code] | Low-level flash module for Cortex-M3 (interface)
flash_lm3s.c [code] | LM3S1968 internal flash memory driver
flash_lm3s.h [code] | LM3S1968 internal flash memory driver
flash_lpc2.c [code] | NPX lpc23xx embedded flash read/write driver
flash_lpc2.h [code] | NPX lpc23xx embedded flash read/write driver
flash_stm32.c [code] | STM32F103xx internal flash memory driver
flash_stm32.h [code] | STM32F103xx internal flash memory driver
font.h [code] | Font 8x6 IBM-PC 8bit
font_10x20.c [code] |
formatwr.c [code] | Basic "printf", "sprintf" and "fprintf" formatter
formatwr.h [code] | Basic "printf", "sprintf" and "fprintf" formatter
frame.h [code] | CPU-specific stack frame handling macros
ft245rl.c [code] | Function library for Accessing FT245RL USB interface
ft245rl.h [code] | Function library for Accessing FT245RL USB interface
general-introduction [code] |
gfx.h [code] |
gfx_p.h [code] | Graphics private header
gohu.c [code] |
gpio_lm3s.c [code] | LM3S1968 GPIO control interface
gpio_lm3s.h [code] | LM3S1968 GPIO control interface
gpio_stm32.c [code] | STM32 GPIO control interface
gpio_stm32.h [code] | STM32 GPIO control interface
hash.h [code] | Generic interface for hashing algorithms
hashtable.c [code] | Portable hash table implementation
hashtable.h [code] | Portable hash table
heap.c [code] | Heap subsystem (public interface)
heap.h [code] |
helvB10.c [code] |
hex.c [code] | Poor man's hex arrays (implementation)
hex.h [code] | Poor man's hex arrays (implementation)
hmac.c [code] | HMAC implementation
hmac.h [code] | HMAC (RFC 2104) implementation
hptime.c [code] | Portable abstraction for high-resolution time handling (implementation)
hptime.h [code] | Portable abstraction for high-resolution time handling (interface)
hw_afsk.h [code] | AFSK modem hardware-specific definitions
hw_blanker.h [code] | Hardware-specific definitions
hw_boot.h [code] | Bootloader hardware specific definition
hw_buzzer.h [code] | Buzzer hardware-specific definitions
hw_buzzerled.h [code] | Buzzerled hardware-specific definitions
hw_cpufreq.h [code] | Hardware-specific definitions
hw_dataflash.c [code] | Dataflash HW control routines
hw_dataflash.h [code] | Dataflash HW control routines (interface)
hw_dc_motor.h [code] | DC motor hardware-specific definitions
hw_ft245rl.h [code] | FT245RL USB interface hardware-specific definitions
hw_hx8347.h [code] | HX8347 low-level hardware macros for Atmel SAM3X-EK board
hw_i2c_bitbang.h [code] | Macro for I2C bitbang operation
hw_ili9225.h [code] | SAM3N-EK: ILI9225B low-level hardware macros
hw_input.h [code] | Macro for HW_INPUT_H
hw_kbd.h [code] | Keyboard hardware-specific definitions
hw_lcd.h [code] | Atmel SAM3N-EK testcase
hw_lcd_32122a.h [code] | Displaytech 32122A LCD driver
hw_lcd_hd44.h [code] | LCD low-level hardware macros
hw_led.h [code] | Led on/off macros
hw_led_7seg.h [code] | Led 7 segment display low-level
hw_lm75.h [code] | Hardware macro definition
hw_mcp41.c [code] | MCP41 hardware-specific definitions
hw_mcp41.h [code] | MCP41 hardware-specific definitions
hw_ntc.c [code] | NTC hardware-specific definition
hw_ntc.h [code] | NTC hardware-specific definition
hw_phase.c [code] | Phase control hardware-specific definitions
hw_phase.h [code] | Phase control hardware-specific definitions
hw_rit128x96.h [code] | LM3S1986: OLED-RIT-128x96 (P14201) low-level hardware macros
hw_sd.h [code] | SD driver hardware-specific definitions
hw_sensor.h [code] | Sensor hardware-specific definitions
hw_ser.h [code] | Serial hardware-specific definitions
hw_sipo.h [code] | Macro for HW_SIPO_H
hw_spi.h [code] | Hardware macro definition
hw_spi_dma.h [code] | SPI DMA driver hardware-specific definitions
hw_stepper.h [code] | Stepper hardware-specific definitions
hw_tas5706a.h [code] | HW pin handling
hw_tc520.h [code] | TC520 hardware-specific definitions
hw_thermo.h [code] | Thermo hardware-specific control functions
hw_timer.h [code] | Timer hardware-specific definitions
hw_tlv5618.h [code] | TLV5816 DAC hardware-specific definitions
hw_tmp123.h [code] | Hardware macro definition
i2c.c [code] | I2C generic driver functions (implementation)
i2c.h [code] |
i2c_arm.h [code] | Low-level I2C module for ARM (interface)
i2c_at91.h [code] | Driver for the AT91SAM7X I2C (interface)
i2c_avr.c [code] | Driver for the AVR ATMega TWI (implementation)
i2c_avr.h [code] | Driver for the AVR ATMega TWI (implementation)
i2c_bitbang.c [code] | I2C bitbang driver (implementation)
i2c_cm3.h [code] | Low-level I2C module for ARM Cortex-m3 (interface)
i2c_lm3s.c [code] | Driver for the LM3S I2C (implementation)
i2c_lm3s.h [code] | Driver for the LM3S I2C (interface)
i2c_lpc2.c [code] | Driver for the LPC23xx I2C (implementation)
i2c_lpc2.h [code] | Driver for the LPC23xx I2C (interface)
i2c_stm32.c [code] | STM32F103xx I2C driver
i2c_stm32.h [code] | Driver for the STM32F103xx I2C (interface)
i2s_at91.c [code] | I2S driver implementation
i2s_at91.h [code] | I2S driver functions
ini_reader.c [code] | Ini file reader module
ini_reader.h [code] | Ini file reader module
init_at91.c [code] | AT91SAM7S256 CRT
init_cm3.c [code] | Cortex-M3 architecture's entry point
init_lpc2.c [code] | LPC2378 CRT
init_xmega.c [code] | AVR XMega initialization routine
integer.h [code] |
irq.c [code] | Process scheduler (public interface)
cpu/irq.h [code] | CPU-specific IRQ definitions
kern/irq.h [code] | Process scheduler (public interface)
irq_cm3.c [code] | Cortex-M3 IRQ management
irq_cm3.h [code] | IRQ management for the Cortex-M3 processor
isaac.c [code] | ISAAC implementation
isaac.h [code] | ISAAC implementation
kbd.c [code] | Keyboard driver (implementation)
kbd.h [code] |
kbd_map.h [code] | Keyboard map definitions
kblock.c [code] | KBlock interface
kblock.h [code] |
kblock_posix.c [code] | KBlock interface over libc files
kblock_posix.h [code] | KBlock interface on POSIX file
kblock_ram.c [code] | KBlock interface on RAM memory
kblock_ram.h [code] | KBlock interface
kdebug.c [code] | General pourpose debug support for embedded systems (implementation)
kdebug_arm.c [code] | Low-level kdebug module for ARM (inplementation)
kdebug_at91.c [code] | ARM debug support (implementation)
kdebug_at91.h [code] | ARM debug support (interface)
kdebug_avr.c [code] | Low-level kdebug module for AVR (inplementation)
kdebug_cm3.c [code] | Low-level kdebug module for Cortex-M3 (inplementation)
kdebug_dsp56k.c [code] | General pourpose debug support for embedded systems (implementation)
kdebug_i196.c [code] | General pourpose debug support for embedded systems (implementation)
kdebug_lm3s.c [code] | LM3S debug support (implementation)
kdebug_lm3s.h [code] | LM3S debug support (interface)
kdebug_lpc2.c [code] | ARM debug support (implementation)
kdebug_mega.c [code] | AVR debug support (implementation)
kdebug_msp430.c [code] | MSP430 debug support (implementation)
kdebug_msp430.h [code] | MSP430 debug support (implementation)
kdebug_sam3.c [code] | SAM3 debug support (implementation)
kdebug_stm32.c [code] | STM32 debug support (implementation)
kdebug_stm32.h [code] | STM32 debug support (interface)
kdebug_xmega.c [code] | AVR XMega debug support (implementation)
kdf.h [code] | Generic interface for key derivation functions
kernel_footprint.c [code] | Kernel footprint benchmark
kernel_footprint.h [code] | Kernel footprint benchmark
keytag.c [code] | KeyTAG parser
keytag.h [code] | Tag protocol. (interface)
kfile.c [code] | Virtual KFile I/O interface
io/kfile.h [code] |
kern/kfile.h [code] |
kfile_block.c [code] | KFile interface over a KBlock
kfile_block.h [code] |
kfile_debug.c [code] | KFile interface over debug
kfile_debug.h [code] | KFile interface over a debug console
kfile_fifo.c [code] | KFile interface over a FIFO buffer
kfile_fifo.h [code] | KFile interface over a FIFO buffer
kfile_mem.c [code] | KFile interface over a memory buffer
kfile_mem.h [code] | KFile interface over a memory buffer
kfile_posix.c [code] | KFile interface implementation in Posix systems
kfile_posix.h [code] | KFile interface implementation in Posix systems
lcd_32122a.c [code] | Displaytech 32122A LCD driver
lcd_32122a.h [code] | Displaytech 32122A LCD driver
lcd_gfx_hwtest.c [code] | Dot-matrix LCD test
lcd_gfx_qt.h [code] | Custom control for graphics LCD emulation (interface)
lcd_hd44.c [code] | LM044L type LCD hardware module (impl.)
lcd_hd44.h [code] | Hitachi HD44780 and clones LCD module
lcd_hd44_hwtest.c [code] | LM044L type LCD hardware module (impl.)
lcd_hx8347.c [code] | Himax HX8347 LCD controller driver
lcd_hx8347.h [code] | Himax HX8347 LCD controller driver
lcd_ili9225.c [code] | ILI9225B 4 wire interface graphic driver
lcd_ili9225.h [code] | ILI9225B 4 wire interface graphic driver
lcd_lm44_qt.h [code] | Custom Qt widget for emulating a graphics LCD display (implementation)
lcd_rit128x96.c [code] | OLED-RIT-128x96 (P14201) graphic display driver
lcd_rit128x96.h [code] | OLED-RIT-128x96 (P14201) graphic display driver
lcd_text.c [code] | Generic text LCD driver (impl.)
lcd_text.h [code] | Generic text LCD driver (interface)
lcd_text_hwtest.c [code] | Generic text LCD driver (Test)
led_7seg.c [code] | 7 segments LED displays (impl)
led_7seg.h [code] |
levelbar.c [code] | Copyright 2004, 2006 Develer S.r.l
levelbar.h [code] | Copyright 2004, 2006 Develer S.r.l
leveledit.c [code] | Generic editor for (volume/gain/contrast/...) setting
leveledit.h [code] | Generic editor for (volume/gain/contrast/...) setting
line.c [code] | Line drawing graphics routines
list.h [code] |
lm3s.h [code] |
lm3s_adc.h [code] | LM3S ADC definition
lm3s_com.h [code] | LM3S1968 registers definition
lm3s_gpio.h [code] | LM3S1968 GPIO hardware definitions
lm3s_i2c.h [code] | LM3S I2C definition
lm3s_ints.h [code] | LM3S1968 interrupts definition
lm3s_memmap.h [code] | LM3S1968 memory map
lm3s_nvic.h [code] | LM3S1968 NVIC hardware
lm3s_pwm.h [code] | LM3S1968 PWM hardware definitions
lm3s_ssi.h [code] | LM3S1968 SSI hardware definitions
lm3s_sysctl.h [code] | LM3S1968 system control hardware
lm3s_types.h [code] | LM3S generic hardware macros
lm3s_uart.h [code] | LM3S1968 UART hardware
lm75.c [code] | LM75 sensor temperature family
lm75.h [code] | LM75 sensor temperature family
log.h [code] |
logo.c [code] |
logo.h [code] |
lpc23xx.h [code] |
luBS14.c [code] |
lwip.c [code] | LwIP TCP/IP stack module
lwip.h [code] | LwIP TCP/IP stack module
mac.h [code] | Generic interface for message authentication algorithms
macros.h [code] |
mcp41.c [code] | MCP41xxx digital potentiomenter driver (implementation)
mcp41.h [code] | MCP41xxx digital potentiomenter driver
mcp41_map.h [code] | MCP41 digital potentiometer map definitions
md2.c [code] | MD2 Message-Digest algorithm
md2.h [code] | MD2 Message-Digest algorithm
md5.c [code] |
md5.h [code] | MD5 Hashing algorithm
mean.h [code] |
menu.c [code] | General pourpose menu handling functions
menu.h [code] |
menubar.c [code] | Graphics Menu bar widget
menubar.h [code] | Graphic menu bar widget
messages.c [code] | Messages for LCD
messages.h [code] | Definitions of constant string messages
module.h [code] | Debug macros for inter-module dependency checking
monitor.c [code] | Monitor to check for stack overflows
monitor.h [code] | Monitor to check for stack overflows
mpxx6115a.h [code] | MPXX6115A Pressure Sensor convert formula
msg.h [code] |
mt29f.h [code] | Micron MT29F serial NAND driver
mt29f_sam3.c [code] | Micron MT29F serial NAND driver for SAM3's static memory controller
mt29f_sam3.h [code] | Micron MT29F serial NAND driver for SAM3's static memory controller (interface)
ncenB18.c [code] |
nmea.c [code] | NMEA parser implementation
nmea.h [code] | NMEA Parser
nmeap.h [code] |
nmeap01.c [code] |
nmeap_def.h [code] |
ntc.c [code] | Driver for NTC (reads a temperature through an ADC)
ntc.h [code] | Driver for NTC sensors (reads a temperature through an ADC)
ntc_map.h [code] | NTC map definitions
observer.c [code] | Simple notifier for the observer/subject pattern (implementation)
observer.h [code] | Simple notifier for the subject/observer pattern (interface)
omac.c [code] | OMAC implementation
omac.h [code] | OMAC implementation
os.h [code] | OS-specific definitions
parser.c [code] | Channel protocol parser and commands
parser.h [code] |
pbkdf1.c [code] | PBKDF1 implementation
pbkdf1.h [code] | PBKDF1 implementation
pbkdf2.c [code] | PBKDF2 implementation
pbkdf2.h [code] | PBKDF2 implementation
pcf8574.c [code] | PCF8574 i2c port expander driver
pcf8574.h [code] | PCF8574 i2c port expander driver
cpu/pgm.h [code] | Support for reading program memory on Harvard architectures
mware/pgm.h [code] |
phase.c [code] | Phase control driver (implementation)
phase.h [code] | Phase partialization driver with TRIACs
phase_map.h [code] | Triac map definitions
pid_control.c [code] | Proportional, integral, derivative controller (PID controller) (implementation)
pid_control.h [code] | Proportional, integral, derivative controller (PID controller)
pll_at91.h [code] | AT91SAM7S256 CRT
pocketbus.c [code] | PocketBus protocol implementation
pocketbus.h [code] | Basical functions to use pocketBus protocol
pocketcmd.c [code] | PocketBus protocol Command layer implementation
pocketcmd.h [code] | PocketBus command abstraction layer
pool.h [code] |
power.h [code] | CPU power management functions
preempt.c [code] |
prng.h [code] | Generic interface for cryptographically-secure pseudo-RNG
proc.c [code] | Simple cooperative and preemptive multitasking scheduler
proc.h [code] |
proc_p.h [code] | Internal scheduler structures and definitions for processes
pwm.c [code] | PWM driver (implementation)
pwm.h [code] |
pwm_arm.c [code] | Low-level PWM module for ARM (inplementation)
pwm_arm.h [code] | Low-level PWM module for ARM (interface)
pwm_at91.c [code] | PWM hardware-specific implementation
pwm_at91.h [code] | PWM hardware-specific definition
pwm_avr.c [code] | Low-level PWM module for AVR (inplementation)
pwm_avr.h [code] | Low-level PWM module for AVR (interface)
pwm_hwtest.c [code] | Test for PWM driver (implementation)
pwm_map.h [code] | PWM map device
ramp.c [code] | Compute, save and load ramps for stepper motors (implementation)
ramp.h [code] | Compute, save and load ramps for stepper motors
rand.c [code] | Very simple rand() algorithm
rand.h [code] | Very simple rand() algorithm
random.c [code] | High-level random number generation functions
random.h [code] | High-level random number generation functions
random_lm3s.c [code] | LM3 backend implementation entropy pulling
random_p.h [code] | Internal function definitions for random
random_stm32.c [code] | STM32 backend implementation entropy pulling
randpool.c [code] | API function for to manage entropy pool
randpool.h [code] | Collection of functions to manage entropy pool
readline.c [code] | Line editing support with history
readline.h [code] | Line editing support with history
README.bertos [code] |
resource.c [code] |
resource.h [code] | TODO:
ripemd.c [code] | RIPEMD-160 Hashing algorithm
ripemd.h [code] |
rle.c [code] | General-purpose run-length {en,de}coding algorithm (implementation)
algo/rle.h [code] | General-purpose run-length {en,de}coding algorithm
mware/rle.h [code] |
rotating_hash.h [code] | Rotating Hash algorithm
rtc.h [code] | Real-time clock interface
rtc_stm32.c [code] | STM32 RTC driver
sam3.h [code] |
sam3_adc.h [code] |
sam3_dacc.h [code] |
sam3_emac.h [code] | SAM3 EMAC definitions
sam3_flash.h [code] | Atmel SAM3 enhanced embedded flash controller definitions
sam3_ints.h [code] | SAM3 interrupt definitions
sam3_nvic.h [code] | Atmel SAM3 NVIC hardware
sam3_pio.h [code] |
sam3_pmc.h [code] | SAM3 PMC hardware
sam3_rstc.h [code] |
sam3_sdramc.h [code] | SAM3 SDRAM controller definitions
sam3_smc.h [code] | SAM3X/A/U Static Memory Controller definitions
sam3_spi.h [code] |
sam3_sysctl.h [code] | Atmel SAM3 system controller registers
sam3_tc.h [code] |
sam3_uart.h [code] | SAM3 UART hardware
sam3_usart.h [code] |
sam3_wdt.h [code] |
sam3n.h [code] | Atmel's SAM3 registers definitions
sd.c [code] | Function library for secure digital memory
sd.h [code] | Function library for secure digital memory
sem.c [code] | Semaphore based synchronization services
sem.h [code] |
ser.c [code] | Buffered serial I/O driver
ser.h [code] | High level serial I/O API
ser_arm.c [code] | Low-level serial module for ARM (inplementation)
ser_arm.h [code] | Low-level serial module for ARM (interface)
ser_at91.c [code] | ARM UART and SPI I/O driver
ser_at91.h [code] | High level serial I/O API
ser_avr.c [code] | AVR UART and SPI I/O driver (Implementation)
ser_avr.h [code] | Low-level serial module for AVR (interface)
ser_cm3.h [code] | Low-level serial module for Cortex-M3 (interface)
ser_dsp56k.c [code] | DSP5680x CPU specific serial I/O driver
ser_dsp56k.h [code] | Low-level serial module for ARM (interface)
ser_i196.c [code] | CPU specific serial I/O driver
ser_lm3s.c [code] | LM3S1968 UART interface driver
ser_lm3s.h [code] | LM3S1968 UART interface driver
ser_lpc2.c [code] | LPC23xx UART driver
ser_lpc2.h [code] | LPC23xx UART driver
ser_mega.c [code] | AVR MEGA UART and SPI I/O driver (Implementation)
ser_mega.h [code] | Low-level serial module for AVR MEGA(interface)
ser_p.h [code] | Hardware dependent serial driver (interface)
ser_posix.c [code] | Serial port emulator for hosted environments
ser_sam3.c [code] | ARM UART and SPI I/O driver
ser_sam3.h [code] | High level serial I/O API
ser_simple_avr.c [code] | Simple serial I/O driver
ser_simple_avr.h [code] | Simple serial I/O driver
ser_stm32.c [code] | STM32 UART interface driver
ser_stm32.h [code] | STM32F10xx UART interface driver
ser_xmega.c [code] | AVR XMEGA USART driver (Implementation)
ser_xmega.h [code] | Low-level serial module for AVR XMEGA (interface)
sha1.c [code] | SHA-1 Hashing algorithm
sha1.h [code] | SHA-1 Hashing algorithm
signal.c [code] | IPC signals implementation
signal.h [code] |
sipo.c [code] | SIPO Module
sipo.h [code] | Generic Serial-in, Parallel-out implementation (SIPO)
spi_bitbang.c [code] | Emulated SPI Master for DSP firmware download (impl.)
spi_bitbang.h [code] | Emulated SPI driver
spi_dma_at91.c [code] | SPI driver with DMA
spi_dma_at91.h [code] | SPI driver with DMA
sprintf.c [code] | Sprintf() implementation based on _formatted_write()
ssi_lm3s.c [code] | LM3S1968 Synchronous Serial Interface (SSI) driver
ssi_lm3s.h [code] | LM3S1968 Synchronous Serial Interface (SSI) driver
STATUS [code] |
stepper.c [code] | Driver to control stepper motor
stepper.h [code] | Driver to control stepper motor
stepper_arm.c [code] | Low-level stepper timer module for ARM (inplementation)
stepper_arm.h [code] | Low-level stepper timer module for ARM (inplementation)
stepper_at91.c [code] | Stepper driver interface implementation
stepper_at91.h [code] | Stepper hardware-specific definitions
stepper_at91_hwtest.c [code] | Low level test for stepper driver interface implementation
stepper_avr.c [code] | Low-level stepper timer module for AVR (inplementation)
stepper_avr.h [code] | Low-level stepper timer module for AVR (inplementation)
stm32.h [code] | STM32F10XX registers definition
stm32_adc.h [code] | STM32F103xx adc definition
stm32_flash.h [code] | STM32F103xx Embedded flash definition
stm32_gpio.h [code] | STM32F103xx GPIO definition
stm32_i2c.h [code] | STM32F103xx I2C definition
stm32_ints.h [code] | STM32F10xx interrupts definition
stm32_memmap.h [code] | STM32 memory map
stm32_nvic.h [code] | NVIC STM32F10xx registers definition
stm32_pwr.h [code] | STM32 Power Control
stm32_uart.h [code] | UART STM32F10xx registers definition
strtol10.c [code] | Poor man's hex arrays (implementation)
strtol10.h [code] | Poor man's hex arrays (implementation)
switch_ctx_cm3.c [code] | Cortex-M3 context switch
switch_ctx_cm3.h [code] | Cortex-M3 context switch
switch_dsp56k.c [code] | DSP5680x task switching support
syncobj.c [code] |
sysirq_at91.c [code] | System IRQ handler for Atmel AT91 ARM7 processors
sysirq_at91.h [code] | System irq handler for Atmel AT91 ARM7 processors (interface)
tas5706a.c [code] | TAS5706A Power DAC i2c driver
tas5706a.h [code] | TAS5706A Power DAC i2c driver
tc520.c [code] | TC520 ADC driver (implementation)
tc520.h [code] | TC520 ADC driver (intercace)
tea.c [code] | TEA Tiny Encription Algorith functions (implementation)
tea.h [code] | TEA Tiny Encription Algorith functions
test.h [code] | Utility for the test suite
test1.c [code] |
test2.c [code] |
test3.c [code] |
text.c [code] | Text graphic routines
text.h [code] |
text_format.c [code] | Printf-family routines for text output
tftp.c [code] | TFTP protocol implementation
tftp.h [code] | TFTP protocol implementation
thermo.c [code] | Thermo-control driver
thermo.h [code] | Thermo-control driver
thermo_map.h [code] | Thermo regulation control map definitions
timer.c [code] | Hardware independent timer driver (implementation)
timer.h [code] |
timer_arm.c [code] | Low-level timer module for ARM (inplementation)
timer_arm.h [code] | Low-level timer module for ARM (interface)
timer_at91.c [code] | Low-level timer module for Atmel AT91 (inplementation)
timer_at91.h [code] | Low-level timer module for Atmel AT91 (interface)
timer_avr.c [code] | Low-level timer module for AVR (implementation)
timer_avr.h [code] | Low-level timer module for AVR (interface)
timer_cm3.c [code] | Low-level timer driver (SysTick) for LM3S1968
timer_cm3.h [code] | Low-level timer driver (SysTick) for Cortex-M3
timer_dsp56k.h [code] | Driver module for DSP56K
timer_i196.h [code] | Low-level timer module for AVR
timer_lpc2.c [code] | Low-level timer module for LPC2xxx (implementation)
timer_lpc2.h [code] | Low-level timer module for NXP LPC2xxx (interface)
timer_mega.c [code] | Low-level timer module for AVR MEGA (implementation)
timer_mega.h [code] | Low-level timer module for AVR MEGA (interface)
timer_posix.c [code] | Low-level timer module for Qt emulator (implementation)
timer_posix.h [code] | Low-level timer module for POSIX systems (interface)
timer_qt.c [code] | Low-level timer module for Qt emulator (implementation)
timer_qt.h [code] | Low-level timer module for Qt emulator (interface)
timer_simple_avr.c [code] | Some simple delay routines
timer_simple_avr.h [code] | Simple delay routine
timer_xmega.c [code] | Low-level timer module for AVR XMEGA (implementation)
timer_xmega.h [code] | Low-level timer module for AVR XMEGA (interface)
tlv5618.c [code] |
tlv5618.h [code] | Texas instrument TLV5618 DAC driver
tmp123.c [code] | TMP123 Texas Intrument sensor temperature
tmp123.h [code] | TMP123 Texas Intrument sensor temperature
twi_arm.c [code] | Low-level TWI module for ARM (inplementation)
twi_arm.h [code] | Low-level TWI module for ARM (interface)
twi_at91.c [code] | Driver for the AT91 ARM TWI (implementation)
twi_at91.h [code] | Driver for the AT91 ARM TWI (implementation)
types.h [code] | CPU-specific type definitions
usb.h [code] | USB 2.0 standard descriptors
usb_endpoint.h [code] | USB endpoint allocations
usb_hid.h [code] | Generic USB Human Interface Device (HID) driver
usb_stm32.c [code] | STM32 USB driver
usb_stm32.h [code] | STM32: USB full-speed device driver
usbkbd.c [code] | Generic USB keyboard device driver
usbkbd.h [code] | Generic USB keyboard device driver
usbmouse.c [code] | Generic USB mouse device driver
usbmouse.h [code] | Generic USB mouse device driver
usbser.c [code] | Generic USB serial device driver
usbser.h [code] | Generic USB serial device driver
util.c [code] | Generic utilities
util.h [code] |
verstag.c [code] | Define application version strings
verstag.h [code] | Declare application version strings
vic_lpc2.c [code] | Vectored Interrupt Controller VIC driver
vic_lpc2.h [code] | Vectored Interrupt Controller VIC driver
wdt.h [code] | Watchdog module, supplies a simple API to manage wdt on supported target
wdt_arm.h [code] | Watchdog interface for ARM architecture
wdt_avr.h [code] | Watchdog interface for AVR architecture
win.c [code] | Very simple hierarchical windowing system
win.h [code] | Very simple hierarchical windowing system
wingps.c [code] |
x917.c [code] | ANSI X9.17 PRNG implementation
x917.h [code] | ANSI X9.17 PRNG implementation
xmodem.c [code] | X-Modem serial transmission protocol (implementation)
xmodem.h [code] | X-Modem serial transmission protocol
yarrow.c [code] | Yarrow implementation
yarrow.h [code] | Yarrow implementation
yarrow_pool.c [code] | Yarrow entropy pool
yarrow_pool.h [code] | Yarrow pool implementation


BeRTOS: fixed6x8.c File Reference

  • fonts
fixed6x8.c File Reference

Font 8x6 IBM-PC 8bit. More...

#include <gfx/font.h>

Go to the source code of this file.

Detailed Description

Font 8x6 IBM-PC 8bit.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file fixed6x8.c.


BeRTOS: fixed6x8.c Source File

  • fonts
fixed6x8.c
Go to the documentation of this file.
00001
00041 #include <gfx/font.h>
00042
00043 static const PROGMEM uint8_t default_font_glyphs[256 * 6] =
00044 {
00045 /* 0x00 */
00046     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*   */
00047     0x3E, 0x45, 0x51, 0x45, 0x3E, 0x00, /*   */
00048     0x3E, 0x7B, 0x6F, 0x7B, 0x3E, 0x00, /*   */
00049     0x1C, 0x3E, 0x7C, 0x3E, 0x1C, 0x00, /*   */
00050     0x08, 0x1C, 0x3E, 0x1C, 0x08, 0x00, /*   */
00051     0x18, 0x5A, 0x67, 0x5A, 0x18, 0x00, /*   */
00052     0x0C, 0x5E, 0x6F, 0x5E, 0x0C, 0x00, /*   */
00053     0x08, 0x1C, 0x3E, 0x1C, 0x08, 0x00, /*   */
00054 /* 0x08 */
00055     0x77, 0x63, 0x41, 0x63, 0x77, 0x00, /*   */
00056     0x18, 0x3C, 0x66, 0x3C, 0x18, 0x00, /*   */
00057     0x77, 0x63, 0x41, 0x63, 0x77, 0x00, /*   */
00058     0x20, 0x50, 0x5A, 0x56, 0x2E, 0x00, /*   */
00059     0x06, 0x29, 0x79, 0x29, 0x06, 0x00, /*   */
00060     0x60, 0x60, 0x7F, 0x05, 0x07, 0x00, /*   */
00061     0x18, 0x1F, 0x01, 0x61, 0x7F, 0x00, /*   */
00062     0x15, 0x0E, 0x1B, 0x0E, 0x15, 0x00, /*   */
00063 /* 0x10 */
00064     0x00, 0x08, 0x1C, 0x3E, 0x08, 0x08, /*   */
00065     0x7F, 0x3E, 0x1C, 0x08, 0x00, 0x00, /*   */
00066     0x14, 0x36, 0x7F, 0x36, 0x14, 0x00, /*   */
00067     0x00, 0x5F, 0x00, 0x5F, 0x00, 0x00, /*   */
00068     0x02, 0x05, 0x7F, 0x01, 0x7F, 0x00, /*   */
00069     0x20, 0x4A, 0x55, 0x29, 0x02, 0x00, /*   */
00070     0x60, 0x60, 0x60, 0x60, 0x60, 0x00, /*   */
00071     0x54, 0x76, 0x7F, 0x76, 0x54, 0x00, /*   */
00072 /* 0x18 */
00073     0x08, 0x0C, 0x7E, 0x0C, 0x08, 0x00, /*   */
00074     0x10, 0x30, 0x7E, 0x30, 0x10, 0x00, /*   */
00075     0x08, 0x08, 0x3E, 0x1C, 0x08, 0x00, /*   */
00076     0x08, 0x1C, 0x3E, 0x08, 0x08, 0x00, /*   */
00077     0x1C, 0x10, 0x10, 0x10, 0x10, 0x00, /*   */
00078     0x08, 0x1C, 0x08, 0x1C, 0x08, 0x00, /*   */
00079     0x18, 0x1C, 0x1E, 0x1C, 0x18, 0x00, /*   */
00080     0x0C, 0x1C, 0x3C, 0x1C, 0x0C, 0x00, /*   */
00081 /* 0x20 */
00082     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*   */
00083     0x00, 0x00, 0x4F, 0x00, 0x00, 0x00, /* ! */
00084     0x00, 0x07, 0x00, 0x07, 0x00, 0x00, /* " */
00085     0x14, 0x7F, 0x14, 0x7F, 0x14, 0x00, /* # */
00086     0x24, 0x2A, 0x7F, 0x2A, 0x12, 0x00, /* $ */
00087     0x63, 0x13, 0x08, 0x64, 0x63, 0x00, /* % */
00088     0x36, 0x49, 0x55, 0x22, 0x50, 0x00, /* & */
00089     0x00, 0x05, 0x03, 0x00, 0x00, 0x00, /* ' */
00090 /* 0x28 */
00091     0x00, 0x1C, 0x22, 0x41, 0x00, 0x00, /* ( */
00092     0x00, 0x00, 0x41, 0x22, 0x1C, 0x00, /* ) */
00093     0x14, 0x08, 0x3E, 0x08, 0x14, 0x00, /* * */
00094     0x08, 0x08, 0x3E, 0x08, 0x08, 0x00, /* + */
00095     0x00, 0x50, 0x30, 0x00, 0x00, 0x00, /* , */
00096     0x08, 0x08, 0x08, 0x08, 0x08, 0x00, /* - */
00097     0x00, 0x60, 0x60, 0x00, 0x00, 0x00, /* . */
00098     0x20, 0x10, 0x08, 0x04, 0x02, 0x00, /* / */
00099 /* 0x30 */
00100     0x3E, 0x51, 0x49, 0x45, 0x3E, 0x00, /* 0 */
00101     0x00, 0x42, 0x7F, 0x40, 0x00, 0x00, /* 1 */
00102     0x62, 0x51, 0x49, 0x49, 0x46, 0x00, /* 2 */
00103     0x21, 0x41, 0x45, 0x4B, 0x31, 0x00, /* 3 */
00104     0x18, 0x14, 0x12, 0x7F, 0x10, 0x00, /* 4 */
00105     0x27, 0x45, 0x45, 0x45, 0x39, 0x00, /* 5 */
00106     0x3C, 0x4A, 0x49, 0x49, 0x30, 0x00, /* 6 */
00107     0x01, 0x71, 0x09, 0x05, 0x03, 0x00, /* 7 */
00108 /* 0x38 */
00109     0x36, 0x49, 0x49, 0x49, 0x36, 0x00, /* 8 */
00110     0x06, 0x49, 0x49, 0x29, 0x1E, 0x00, /* 9 */
00111     0x00, 0x36, 0x36, 0x00, 0x00, 0x00, /* : */
00112     0x00, 0x56, 0x36, 0x00, 0x00, 0x00, /* ; */
00113     0x08, 0x14, 0x22, 0x41, 0x00, 0x00, /* < */
00114     0x14, 0x14, 0x14, 0x14, 0x14, 0x00, /* = */
00115     0x00, 0x41, 0x22, 0x14, 0x08, 0x00, /* > */
00116     0x02, 0x01, 0x51, 0x09, 0x06, 0x00, /* ? */
00117 /* 0x40 */
00118     0x32, 0x49, 0x79, 0x41, 0x3E, 0x00, /* @ */
00119     0x7E, 0x09, 0x09, 0x09, 0x7E, 0x00, /* A */
00120     0x7F, 0x49, 0x49, 0x49, 0x36, 0x00, /* B */
00121     0x3E, 0x41, 0x41, 0x41, 0x22, 0x00, /* C */
00122     0x7F, 0x41, 0x41, 0x22, 0x1C, 0x00, /* D */
00123     0x7F, 0x49, 0x49, 0x49, 0x41, 0x00, /* E */
00124     0x7F, 0x09, 0x09, 0x09, 0x01, 0x00, /* F */
00125     0x3E, 0x41, 0x49, 0x49, 0x7A, 0x00, /* G */
00126 /* 0x48 */
00127     0x7F, 0x08, 0x08, 0x08, 0x7F, 0x00, /* H */
00128     0x00, 0x41, 0x7F, 0x41, 0x00, 0x00, /* I */
00129     0x20, 0x40, 0x41, 0x3F, 0x01, 0x00, /* J */
00130     0x7F, 0x08, 0x14, 0x22, 0x41, 0x00, /* K */
00131     0x7F, 0x40, 0x40, 0x40, 0x40, 0x00, /* L */
00132     0x7F, 0x02, 0x0C, 0x02, 0x7F, 0x00, /* M */
00133     0x7F, 0x04, 0x08, 0x10, 0x7F, 0x00, /* N */
00134     0x3E, 0x41, 0x41, 0x41, 0x3E, 0x00, /* O */
00135 /* 0x50 */
00136     0x7F, 0x09, 0x09, 0x09, 0x06, 0x00, /* P */
00137     0x3E, 0x41, 0x51, 0x21, 0x5E, 0x00, /* Q */
00138     0x7F, 0x09, 0x19, 0x29, 0x46, 0x00, /* R */
00139     0x26, 0x49, 0x49, 0x49, 0x32, 0x00, /* S */
00140     0x01, 0x01, 0x7F, 0x01, 0x01, 0x00, /* T */
00141     0x3F, 0x40, 0x40, 0x40, 0x3F, 0x00, /* U */
00142     0x1F, 0x20, 0x40, 0x20, 0x1F, 0x00, /* V */
00143     0x3F, 0x40, 0x38, 0x40, 0x3F, 0x00, /* W */
00144 /* 0x58 */
00145     0x63, 0x14, 0x08, 0x14, 0x63, 0x00, /* X */
00146     0x07, 0x08, 0x70, 0x08, 0x07, 0x00, /* Y */
00147     0x61, 0x51, 0x49, 0x45, 0x43, 0x00, /* Z */
00148     0x00, 0x7F, 0x41, 0x41, 0x00, 0x00, /* [ */
00149     0x02, 0x04, 0x08, 0x10, 0x20, 0x00, /* \ */
00150     0x00, 0x41, 0x41, 0x7F, 0x00, 0x00, /* ] */
00151     0x04, 0x02, 0x01, 0x02, 0x04, 0x00, /* ^ */
00152     0x40, 0x40, 0x40, 0x40, 0x40, 0x00, /* _ */
00153 /* 0x60 */
00154     0x00, 0x01, 0x02, 0x04, 0x00, 0x00, /* ` */
00155     0x00, 0x74, 0x54, 0x54, 0x78, 0x00, /* a */
00156     0x7F, 0x44, 0x44, 0x44, 0x38, 0x00, /* b */
00157     0x38, 0x44, 0x44, 0x44, 0x28, 0x00, /* c */
00158     0x38, 0x44, 0x44, 0x44, 0x7F, 0x00, /* d */
00159     0x38, 0x54, 0x54, 0x54, 0x18, 0x00, /* e */
00160     0x08, 0x7E, 0x09, 0x01, 0x02, 0x00, /* f */
00161     0x08, 0x54, 0x54, 0x54, 0x3C, 0x00, /* g */
00162 /* 0x68 */
00163     0x7F, 0x04, 0x04, 0x04, 0x78, 0x00, /* h */
00164     0x00, 0x44, 0x7D, 0x40, 0x00, 0x00, /* i */
00165     0x20, 0x40, 0x44, 0x3D, 0x00, 0x00, /* j */
00166     0x7F, 0x10, 0x28, 0x44, 0x00, 0x00, /* k */
00167     0x00, 0x41, 0x7F, 0x40, 0x00, 0x00, /* l */
00168     0x7C, 0x04, 0x18, 0x04, 0x78, 0x00, /* m */
00169     0x7C, 0x08, 0x04, 0x04, 0x78, 0x00, /* n */
00170     0x38, 0x44, 0x44, 0x44, 0x38, 0x00, /* o */
00171 /* 0x70 */
00172     0x7C, 0x14, 0x14, 0x14, 0x08, 0x00, /* p */
00173     0x08, 0x14, 0x14, 0x14, 0x7C, 0x00, /* q */
00174     0x7C, 0x08, 0x04, 0x04, 0x08, 0x00, /* r */
00175     0x48, 0x54, 0x54, 0x54, 0x24, 0x00, /* s */
00176     0x04, 0x3F, 0x44, 0x40, 0x20, 0x00, /* t */
00177     0x3C, 0x40, 0x40, 0x20, 0x7C, 0x00, /* u */
00178     0x1C, 0x20, 0x40, 0x20, 0x1C, 0x00, /* v */
00179     0x3C, 0x40, 0x30, 0x40, 0x3C, 0x00, /* w */
00180 /* 0x78 */
00181     0x44, 0x28, 0x10, 0x28, 0x44, 0x00, /* x */
00182     0x0C, 0x50, 0x50, 0x50, 0x3C, 0x00, /* y */
00183     0x44, 0x64, 0x54, 0x4C, 0x44, 0x00, /* z */
00184     0x00, 0x08, 0x36, 0x41, 0x00, 0x00, /* { */
00185     0x00, 0x00, 0x77, 0x00, 0x00, 0x00, /* | */
00186     0x00, 0x41, 0x36, 0x08, 0x00, 0x00, /* } */
00187     0x02, 0x01, 0x02, 0x01, 0x00, 0x00, /* ~ */
00188     0x70, 0x48, 0x44, 0x48, 0x70, 0x00, /*  */
00189 /* 0x80 */
00190     0x38, 0xC4, 0xC4, 0x44, 0x28, 0x00, /* € */
00191     0x3A, 0x40, 0x40, 0x20, 0x7A, 0x00, /*  */
00192     0x38, 0x54, 0x54, 0x55, 0x19, 0x00, /* ‚ */
00193     0x22, 0x55, 0x55, 0x55, 0x78, 0x00, /* ƒ */
00194     0x20, 0x55, 0x54, 0x54, 0x79, 0x00, /* „ */
00195     0x21, 0x75, 0x55, 0x54, 0x78, 0x00, /* … */
00196     0x20, 0x74, 0x57, 0x54, 0x78, 0x00, /* † */
00197     0x08, 0x54, 0x54, 0x74, 0x14, 0x00, /* ‡ */
00198 /* 0x88 */
00199     0x3A, 0x55, 0x55, 0x55, 0x1A, 0x00, /* ˆ */
00200     0x39, 0x54, 0x54, 0x55, 0x18, 0x00, /* ‰ */
00201     0x39, 0x55, 0x55, 0x54, 0x18, 0x00, /* Š */
00202     0x00, 0x45, 0x7C, 0x41, 0x00, 0x00, /* ‹ */
00203     0x02, 0x45, 0x7D, 0x42, 0x00, 0x00, /* Œ */
00204     0x01, 0x45, 0x7D, 0x40, 0x00, 0x00, /*  */
00205     0x79, 0x14, 0x12, 0x14, 0x79, 0x00, /* Ž */
00206     0x70, 0x2B, 0x2B, 0x2B, 0x70, 0x00, /*  */
00207 /* 0x90 */
00208     0x7C, 0x54, 0x55, 0x55, 0x45, 0x00, /*  */
00209     0x20, 0x54, 0x38, 0x54, 0x48, 0x00, /* ‘ */
00210     0x7E, 0x09, 0x7F, 0x49, 0x49, 0x00, /* ’ */
00211     0x32, 0x49, 0x49, 0x49, 0x32, 0x00, /* “ */
00212     0x32, 0x48, 0x48, 0x48, 0x32, 0x00, /* ” */
00213     0x32, 0x4A, 0x4A, 0x48, 0x30, 0x00, /* • */
00214     0x3A, 0x41, 0x41, 0x21, 0x7A, 0x00, /* – */
00215     0x3A, 0x42, 0x42, 0x20, 0x78, 0x00, /* — */
00216 /* 0x98 */
00217     0x0D, 0x50, 0x50, 0x50, 0x3D, 0x00, /* ˜ */
00218     0x19, 0x24, 0x42, 0x24, 0x19, 0x00, /* ™ */
00219     0x3D, 0x40, 0x40, 0x40, 0x3D, 0x00, /* š */
00220     0x18, 0x24, 0x7E, 0x24, 0x24, 0x00, /* › */
00221     0x28, 0x5E, 0x29, 0x42, 0x20, 0x00, /* œ */
00222     0x09, 0x2A, 0x7C, 0x2A, 0x09, 0x00, /*  */
00223     0x7F, 0x05, 0x15, 0x3D, 0x52, 0x00, /* ž */
00224     0x20, 0x48, 0x3E, 0x09, 0x02, 0x00, /* Ÿ */
00225 /* 0xa0 */
00226     0x20, 0x74, 0x55, 0x55, 0x79, 0x00, /*   */
00227     0x01, 0x45, 0x7D, 0x40, 0x00, 0x00, /* ¡ */
00228     0x30, 0x48, 0x4A, 0x4A, 0x32, 0x00, /* ¢ */
00229     0x38, 0x40, 0x42, 0x22, 0x7A, 0x00, /* £ */
00230     0x7A, 0x12, 0x0A, 0x0A, 0x72, 0x00, /* ¤ */
00231     0x7D, 0x09, 0x11, 0x21, 0x7D, 0x00, /* ¥ */
00232     0x02, 0x15, 0x15, 0x12, 0x04, 0x00, /* ¦ */
00233     0x02, 0x15, 0x15, 0x15, 0x02, 0x00, /* § */
00234 /* 0xa8 */
00235     0x30, 0x48, 0x45, 0x40, 0x20, 0x00, /* ¨ */
00236     0x00, 0x38, 0x08, 0x08, 0x08, 0x00, /* © */
00237     0x00, 0x08, 0x08, 0x08, 0x38, 0x00, /* ª */
00238     0x0B, 0x04, 0x6A, 0x55, 0x48, 0x00, /* « */
00239     0x0B, 0x24, 0x32, 0x79, 0x20, 0x00, /* ¬ */
00240     0x00, 0x00, 0x79, 0x00, 0x00, 0x00, /*  */
00241     0x08, 0x14, 0x2A, 0x14, 0x22, 0x00, /* ® */
00242     0x22, 0x14, 0x2A, 0x14, 0x08, 0x00, /* ¯ */
00243 /* 0xb0 */
00244     0x2A, 0x55, 0x00, 0x2A, 0x55, 0x00, /* ° */
00245     0x2A, 0x55, 0x2A, 0x55, 0x2A, 0x55, /* ± */
00246     0x55, 0x2A, 0x7F, 0x55, 0x2A, 0x7F, /* ² */
00247     0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, /* ³ */
00248     0x08, 0x08, 0xFF, 0x00, 0x00, 0x00, /* ´ */
00249     0x14, 0x14, 0xFF, 0x00, 0x00, 0x00, /* µ */
00250     0x08, 0xFF, 0x00, 0xFF, 0x00, 0x00, /* ¶ */
00251     0x08, 0xF8, 0x08, 0xF8, 0x00, 0x00, /* · */
00252 /* 0xb8 */
00253     0x14, 0x14, 0xFC, 0x00, 0x00, 0x00, /* ¸ */
00254     0x14, 0xF7, 0x00, 0xFF, 0x00, 0x00, /* ¹ */
00255     0x00, 0xFF, 0x00, 0xFF, 0x00, 0x00, /* º */
00256     0x14, 0xF4, 0x04, 0xFC, 0x00, 0x00, /* » */
00257     0x14, 0x17, 0x10, 0x1F, 0x00, 0x00, /* ¼ */
00258     0x08, 0x0F, 0x08, 0x0F, 0x00, 0x00, /* ½ */
00259     0x14, 0x14, 0x1F, 0x00, 0x00, 0x00, /* ¾ */
00260     0x08, 0x08, 0xF8, 0x00, 0x00, 0x00, /* ¿ */
00261 /* 0xc0 */
00262     0x00, 0x00, 0x0F, 0x08, 0x08, 0x08, /* À */
00263     0x08, 0x08, 0x0F, 0x08, 0x08, 0x08, /* Á */
00264     0x08, 0x08, 0xF8, 0x08, 0x08, 0x08, /* Â */
00265     0x00, 0x00, 0xFF, 0x08, 0x08, 0x08, /* Ã */
00266     0x08, 0x08, 0x08, 0x08, 0x08, 0x08, /* Ä */
00267     0x08, 0x08, 0xFF, 0x08, 0x08, 0x08, /* Å */
00268     0x00, 0x00, 0xFF, 0x14, 0x14, 0x14, /* Æ */
00269     0x00, 0xFF, 0x00, 0xFF, 0x08, 0x08, /* Ç */
00270 /* 0xc8 */
00271     0x00, 0x1F, 0x10, 0x17, 0x14, 0x14, /* È */
00272     0x00, 0xFC, 0x04, 0xF4, 0x14, 0x14, /* É */
00273     0x28, 0x2F, 0x20, 0x2F, 0x28, 0x28, /* Ê */
00274     0x14, 0xF4, 0x04, 0xF4, 0x14, 0x14, /* Ë */
00275     0x00, 0xFF, 0x00, 0xF7, 0x14, 0x14, /* Ì */
00276     0x14, 0x14, 0x14, 0x14, 0x14, 0x14, /* Í */
00277     0x14, 0xF7, 0x00, 0xF7, 0x14, 0x14, /* Î */
00278     0x14, 0x14, 0xF7, 0x14, 0x14, 0x14, /* Ï */
00279 /* 0xd0 */
00280     0x08, 0x0F, 0x08, 0x0F, 0x08, 0x08, /* Ð */
00281     0x14, 0x14, 0xF4, 0x14, 0x14, 0x14, /* Ñ */
00282     0x08, 0x08, 0xF8, 0x08, 0x08, 0x08, /* Ò */
00283     0x08, 0x0F, 0x08, 0x0F, 0x08, 0x08, /* Ó */
00284     0x00, 0x00, 0x1F, 0x14, 0x14, 0x14, /* Ô */
00285     0x00, 0x00, 0xFC, 0x14, 0x14, 0x14, /* Õ */
00286     0x00, 0xF8, 0x08, 0xF8, 0x08, 0x08, /* Ö */
00287     0x08, 0xFF, 0x08, 0xFF, 0x08, 0x08, /* × */
00288 /* 0xd8 */
00289     0x14, 0x14, 0xFF, 0x14, 0x14, 0x14, /* Ø */
00290     0x08, 0x08, 0x0F, 0x00, 0x00, 0x00, /* Ù */
00291     0x00, 0x00, 0xF8, 0x08, 0x08, 0x08, /* Ú */
00292     0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x00, /* Û */
00293     0x70, 0x70, 0x70, 0x70, 0x70, 0x00, /* Ü */
00294     0x7F, 0x7F, 0x7F, 0x00, 0x00, 0x00, /* Ý */
00295     0x00, 0x00, 0x00, 0x7F, 0x7F, 0x00, /* Þ */
00296     0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x00, /* ß */
00297 /* 0xe0 */
00298     0x30, 0x48, 0x48, 0x30, 0x48, 0x00, /* à */
00299     0x7E, 0x11, 0x25, 0x25, 0x1A, 0x00, /* á */
00300     0x7E, 0x02, 0x02, 0x02, 0x06, 0x00, /* â */
00301     0x04, 0x7C, 0x04, 0x7C, 0x04, 0x00, /* ã */
00302     0x41, 0x63, 0x55, 0x49, 0x63, 0x00, /* ä */
00303     0x3C, 0x42, 0x4A, 0x4A, 0x31, 0x00, /* å */
00304     0x40, 0x7C, 0x20, 0x20, 0x1C, 0x00, /* æ */
00305     0x08, 0x04, 0x7C, 0x08, 0x04, 0x00, /* ç */
00306 /* 0xe8 */
00307     0x49, 0x55, 0x77, 0x55, 0x49, 0x00, /* è */
00308     0x1C, 0x2A, 0x49, 0x2A, 0x1C, 0x00, /* é */
00309     0x4C, 0x72, 0x02, 0x72, 0x4C, 0x00, /* ê */
00310     0x30, 0x4A, 0x45, 0x49, 0x31, 0x00, /* ë */
00311     0x18, 0x24, 0x18, 0x24, 0x18, 0x00, /* ì */
00312     0x5C, 0x72, 0x2A, 0x27, 0x1D, 0x00, /* í */
00313     0x1C, 0x2A, 0x49, 0x49, 0x00, 0x00, /* î */
00314     0x7E, 0x01, 0x01, 0x01, 0x7E, 0x00, /* ï */
00315 /* 0xf0 */
00316     0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x00, /* ð */
00317     0x24, 0x24, 0x2E, 0x24, 0x24, 0x00, /* ñ */
00318     0x40, 0x51, 0x4A, 0x44, 0x00, 0x00, /* ò */
00319     0x44, 0x4A, 0x51, 0x40, 0x00, 0x00, /* ó */
00320     0x00, 0x00, 0xFE, 0x01, 0x02, 0x00, /* ô */
00321     0x20, 0x40, 0x3F, 0x00, 0x00, 0x00, /* õ */
00322     0x08, 0x08, 0x2A, 0x08, 0x08, 0x00, /* ö */
00323     0x24, 0x12, 0x24, 0x12, 0x00, 0x00, /* ÷ */
00324 /* 0xf8 */
00325     0x06, 0x09, 0x09, 0x09, 0x06, 0x00, /* ø */
00326     0x00, 0x18, 0x18, 0x00, 0x00, 0x00, /* ù */
00327     0x00, 0x10, 0x10, 0x00, 0x00, 0x00, /* ú */
00328     0x10, 0x30, 0x7F, 0x01, 0x01, 0x00, /* û */
00329     0x01, 0x0E, 0x01, 0x01, 0x0E, 0x00, /* ü */
00330     0x0A, 0x09, 0x0D, 0x0A, 0x00, 0x00, /* ý */
00331     0x1E, 0x1E, 0x1E, 0x1E, 0x1E, 0x00, /* þ */
00332     0x00, 0x00, 0x00, 0x00, 0x00, 0x00  /* ÿ */
00333 };
00334
00335
00336 #ifndef default_font
00337 struct Font default_font =
00338 {
00339     /* .glyph = */  default_font_glyphs,
00340     /* .width = */  6,
00341     /* .height = */ 8
00342 };
00343
00344 #endif


BeRTOS: flash25.c File Reference

  • drv
Functions
flash25.c File Reference

Function library for serial Flash memory. More...

#include "hw/hw_spi.h"
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <drv/timer.h>
#include <drv/flash25.h>
#include <io/kfile.h>
#include <cpu/power.h>

Go to the source code of this file.

Functions

static void | flash25_waitReady (Flash25 *fd)
Wait until flash memory is ready.
static void | flash25_sendCmd (Flash25 *fd, Flash25Opcode cmd)
Send a single command to serial flash memory.
static bool | flash25_pin_init (Flash25 *fd)
flash25 init function.
static KFile * | flash25_reopen (struct KFile *_fd)
Reopen a serial memory interface.
static int | flash25_close (UNUSED_ARG(struct KFile *, fd))
Close a serial memory interface.
static size_t | flash25_read (struct KFile *_fd, void *buf, size_t size)
Read _buf lenght size byte from serial flash memmory.
static size_t | flash25_write (struct KFile *_fd, const void *_buf, size_t size)
Write _buf in serial flash memory.
void | flash25_sectorErase (Flash25 *fd, Flash25Sector sector)
Sector erase function.
void | flash25_chipErase (Flash25 *fd)
Chip erase function.
void | flash25_init (Flash25 *fd, KFile *ch)
Init data flash memory interface.

Detailed Description

Function library for serial Flash memory.

Module provide a kfile interface, that ensure an abstraction from comunication channel and give a standard interface. Typicaly this kind of memory use an SPI bus, but you should use another comunication channel you have defined.

Author:
Daniele Basile <asterix@develer.com>

Definition in file flash25.c.

Function Documentation

void flash25_chipErase ( Flash25 * fd )

Chip erase function.

Erase all sector of serial flash memory.

Note:
This operation could take a while.

Definition at line 337 of file flash25.c.

static int flash25_close ( UNUSED_ARG(struct KFile *, fd) ) [static]

Close a serial memory interface.

For serial memory this funtion do nothing, and return always 0.

Definition at line 152 of file flash25.c.

static bool flash25_pin_init ( Flash25 * fd ) [static]

flash25 init function.

This function init a comunication channel and try to read manufacturer id of serial memory, then check if is equal to selected type.

Definition at line 101 of file flash25.c.

static size_t flash25_read | ( | struct KFile * | _fd,
 |  | void * | buf,
 |  | size_t | size
 | ) |  | [static]

Read _buf lenght size byte from serial flash memmory.

For read in serial flash memory we enble cs pin and send one byte of read opcode, and then 3 byte of address of memory cell we want to read. After the last byte of address we can read data from so pin.

Returns:
the number of bytes read.

Definition at line 169 of file flash25.c.

static KFile* flash25_reopen ( struct KFile * _fd ) [static]

Reopen a serial memory interface.

For serial memory this function reinit only the size and seek_pos in kfile stucture. Return a kfile pointer, after assert check.

Definition at line 135 of file flash25.c.

void flash25_sectorErase | ( | Flash25 * | fd,
 |  | Flash25Sector | sector
 | ) |  |

Sector erase function.

Erase a select sector of serial flash memory.

Note:
A sector size is FLASH25_SECTOR_SIZE. This operation could take a while.

Definition at line 291 of file flash25.c.

static size_t flash25_write | ( | struct KFile * | _fd,
 |  | const void * | _buf,
 |  | size_t | size
 | ) |  | [static]

Write _buf in serial flash memory.

Before to write data into flash we must enable memory writing. To do this we send a WRE command opcode. After this command the flash is ready to be write, and so we send a PROGRAM opcode followed to 3 byte of address memory, at the end of last address byte we can send the data. When we finish to send all data, we disable cs and flash write received data bytes on its memory.

Note:
: WARNING: you could write only on erased memory section! Each write time you could write max a memory page size, because if you write more than memory page size the address roll over to first byte of page.
Returns:
the number of bytes write.

Definition at line 219 of file flash25.c.


BeRTOS: flash25.c Source File

  • drv
flash25.c
Go to the documentation of this file.
00001
00042 /*
00043  * We use a spi bus, thus include hardware specific definition.
00044  * If you use another channel you must redefine this macros.
00045  */
00046 #include "hw/hw_spi.h"
00047
00048 #include <cfg/macros.h>
00049 #include <cfg/debug.h>
00050
00051 #include <drv/timer.h>
00052 #include <drv/flash25.h>
00053
00054 #include <io/kfile.h>
00055
00056 #include <cpu/power.h> /* cpu_relax() */
00057
00058 #warning FIXME:This file was changed, but is untested!
00059
00063 static void flash25_waitReady(Flash25 *fd)
00064 {
00065     uint8_t stat;
00066
00067     while (1)
00068     {
00069         CS_ENABLE();
00070
00071         kfile_putc(FLASH25_RDSR, fd->channel);
00072         stat = kfile_getc(fd->channel);
00073
00074         CS_DISABLE();
00075
00076         if (!(stat & RDY_BIT))
00077             break;
00078
00079         cpu_relax();
00080     }
00081 }
00082
00086 static void flash25_sendCmd(Flash25 *fd, Flash25Opcode cmd)
00087 {
00088     CS_ENABLE();
00089
00090     kfile_putc(cmd, fd->channel);
00091
00092     CS_DISABLE();
00093 }
00094
00101 static bool flash25_pin_init(Flash25 *fd)
00102 {
00103     uint8_t device_id;
00104     uint8_t manufacturer;
00105
00106     SPI_HW_INIT();
00107
00108     CS_ENABLE();
00109     /*
00110      * Send read id productor opcode on
00111      * comunication channel
00112      * TODO:controllare se ha senso
00113      */
00114     kfile_putc(FLASH25_RDID, fd->channel);
00115
00116     manufacturer = kfile_getc(fd->channel);
00117     device_id = kfile_getc(fd->channel);
00118
00119     CS_DISABLE();
00120
00121     if((FLASH25_MANUFACTURER_ID == manufacturer) &&
00122         (FLASH25_DEVICE_ID == device_id))
00123         return true;
00124     else
00125         return false;
00126 }
00127
00135 static KFile * flash25_reopen(struct KFile *_fd)
00136 {
00137     Flash25 *fd = FLASH25_CAST(_fd);
00138
00139     fd->fd.seek_pos = 0;
00140     fd->fd.size = FLASH25_MEM_SIZE;
00141
00142     kprintf("flash25 file opened\n");
00143     return &fd->fd;
00144 }
00145
00152 static int flash25_close(UNUSED_ARG(struct KFile *,fd))
00153 {
00154     kprintf("flash25 file closed\n");
00155     return 0;
00156 }
00157
00169 static size_t flash25_read(struct KFile *_fd, void *buf, size_t size)
00170 {
00171     uint8_t *data = (uint8_t *)buf;
00172
00173     Flash25 *fd = FLASH25_CAST(_fd);
00174
00175     ASSERT(fd->fd.seek_pos + (kfile_off_t)size <= fd->fd.size);
00176     size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos);
00177
00178     //kprintf("Reading at addr[%lu], size[%d]\n", fd->seek_pos, size);
00179     CS_ENABLE();
00180
00181     kfile_putc(FLASH25_READ, fd->channel);
00182
00183
00184     /*
00185      * Address that we want to read.
00186      */
00187     kfile_putc((fd->fd.seek_pos >> 16) & 0xFF, fd->channel);
00188     kfile_putc((fd->fd.seek_pos >> 8) & 0xFF, fd->channel);
00189     kfile_putc(fd->fd.seek_pos & 0xFF, fd->channel);
00190
00191     kfile_read(fd->channel, data, size);
00192
00193     CS_DISABLE();
00194
00195     fd->fd.seek_pos += size;
00196
00197     return size;
00198 }
00199
00219 static size_t flash25_write(struct KFile *_fd, const void *_buf, size_t size)
00220 {
00221     flash25Offset_t offset;
00222     flash25Size_t total_write = 0;
00223     flash25Size_t wr_len;
00224     const uint8_t *data = (const uint8_t *) _buf;
00225
00226     Flash25 *fd = FLASH25_CAST(_fd);
00227
00228     ASSERT(fd->fd.seek_pos + (kfile_off_t)size <= fd->fd.size);
00229
00230     size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos);
00231
00232     while (size)
00233     {
00234         offset = fd->fd.seek_pos % (flash25Size_t)FLASH25_PAGE_SIZE;
00235         wr_len = MIN((flash25Size_t)size, FLASH25_PAGE_SIZE - (flash25Size_t)offset);
00236
00237         kprintf("[seek_pos-<%lu>, offset-<%d>]\n", fd->fd.seek_pos, offset);
00238
00239         /*
00240          * We check serial flash memory state, and wait until ready-flag
00241          * is high.
00242          */
00243         flash25_waitReady(fd);
00244
00245         /*
00246          * Start write cycle.
00247          * We could write only data not more long than one
00248          * page size.
00249          *
00250          * To write on serial flash memory we must first
00251          * enable write with a WREN opcode command, before
00252          * the PROGRAM opcode.
00253          *
00254          * \note: the same byte cannot be reprogrammed without
00255          * erasing the whole sector first.
00256          */
00257         flash25_sendCmd(fd, FLASH25_WREN);
00258
00259         CS_ENABLE();
00260         kfile_putc(FLASH25_PROGRAM, fd->channel);
00261
00262         /*
00263          * Address that we want to write.
00264          */
00265         kfile_putc((fd->fd.seek_pos >> 16) & 0xFF, fd->channel);
00266         kfile_putc((fd->fd.seek_pos >> 8) & 0xFF, fd->channel);
00267         kfile_putc(fd->fd.seek_pos & 0xFF, fd->channel);
00268
00269         kfile_write(fd->channel, data, wr_len);
00270
00271         CS_DISABLE();
00272
00273         data += wr_len;
00274         fd->fd.seek_pos += wr_len;
00275         size -= wr_len;
00276         total_write += wr_len;
00277     }
00278
00279     kprintf("written %lu bytes\n", total_write);
00280     return total_write;
00281 }
00282
00291 void flash25_sectorErase(Flash25 *fd, Flash25Sector sector)
00292 {
00293
00294     /*
00295      * Erase a sector could take a while,
00296      * for debug we measure that time
00297      * see datasheet to compare this time.
00298      */
00299     DB(ticks_t start_time = timer_clock());
00300
00301     CS_ENABLE();
00302
00303     /*
00304      * To erase a sector of serial flash memory we must first
00305      * enable write with a WREN opcode command, before
00306      * the SECTOR_ERASE opcode. Sector is automatically
00307      * determinate if any address within the sector
00308      * is selected.
00309      */
00310     kfile_putc(FLASH25_WREN, fd->channel);
00311     kfile_putc(FLASH25_SECTORE_ERASE,fd-> channel);
00312
00313     /*
00314      * Address inside the sector that we want to
00315      * erase.
00316      */
00317     kfile_putc(sector, fd->channel);
00318
00319     CS_DISABLE();
00320
00321     /*
00322      * We check serial flash memory state, and wait until ready-flag
00323      * is hight.
00324      */
00325     flash25_waitReady(fd);
00326
00327     DB(kprintf("Erased sector [%ld] in %ld ms\n", (unsigned long)sector, (unsigned long)ticks_to_ms(timer_clock() - start_time)));
00328 }
00329
00337 void flash25_chipErase(Flash25 *fd)
00338 {
00339     /*
00340      * Erase all chip could take a while,
00341      * for debug we measure that time
00342      * see datasheet to compare this time.
00343      */
00344     DB(ticks_t start_time = timer_clock());
00345
00346     /*
00347      * To erase serial flash memory we must first
00348      * enable write with a WREN opcode command, before
00349      * the CHIP_ERASE opcode.
00350      */
00351     flash25_sendCmd(fd, FLASH25_WREN);
00352     flash25_sendCmd(fd, FLASH25_CHIP_ERASE);
00353
00354     /*
00355      * We check serial flash memory state, and wait until ready-flag
00356      * is high.
00357      */
00358     flash25_waitReady(fd);
00359
00360     DB(kprintf("Erased all memory in %ld ms\n", ticks_to_ms(timer_clock() - start_time)));
00361
00362 }
00363
00367 void flash25_init(Flash25 *fd, KFile *ch)
00368 {
00369
00370     ASSERT(fd);
00371     ASSERT(ch);
00372
00373      //Set kfile struct type as a generic kfile structure.
00374     DB(fd->fd._type = KFT_FLASH25);
00375
00376     // Set up data flash programming functions.
00377     fd->fd.reopen = flash25_reopen;
00378     fd->fd.close = flash25_close;
00379     fd->fd.read = flash25_read;
00380     fd->fd.write = flash25_write;
00381     fd->fd.seek = kfile_genericSeek;
00382
00383     /*
00384      * Init a local channel structure and flash kfile interface.
00385      */
00386     fd->channel = ch;
00387     flash25_reopen(&fd->fd);
00388
00389     /*
00390      * Init data flash memory and micro pin.
00391      */
00392     if (!flash25_pin_init(fd))
00393         ASSERT(0);
00394 }
00395
00396


BeRTOS: flash25.h File Reference

  • drv
Data Structures | Defines | Typedefs | Enumerations | Functions
flash25.h File Reference

Function library for serial Flash memory. More...

#include "cfg/cfg_flash25.h"
#include <cfg/compiler.h>
#include <io/kfile.h>

Go to the source code of this file.

Data Structures

struct | Flash25
Flash25 KFile context structure. More...

Defines

#define | KFT_FLASH25 MAKE_ID('F', 'L', '2', '5')
ID for dataflash.
#define | FLASH25_AT25F2048 1
Memory definition.

Typedefs

typedef uint32_t | flash25Addr_t
Type definition for serial flash memory.

Enumerations

enum Flash25Opcode {
FLASH25_WREN = 0x6, FLASH25_WRDI = 0x4, FLASH25_RDSR = 0x5, FLASH25_WRSR = 0x1,
FLASH25_READ = 0x3, FLASH25_PROGRAM = 0x2, FLASH25_SECTORE_ERASE = 0x52, FLASH25_CHIP_ERASE = 0x62,
FLASH25_RDID = 0x15
}
Serial flash opcode commands. More...
enum | Flash25Sector { FLASH25_SECT1 = 0x0, FLASH25_SECT2 = 0x10000, FLASH25_SECT3 = 0x20000, FLASH25_SECT4 = 0x30000 }
Serial flash sector memory address. More...

Functions

Flash25 * | FLASH25_CAST (KFile *fd)
Convert + ASSERT from generic KFile to Flash25.
void | flash25_init (Flash25 *fd, KFile *ch)
Init data flash memory interface.
void | flash25_chipErase (Flash25 *fd)
Chip erase function.
void | flash25_sectorErase (Flash25 *fd, Flash25Sector sector)
Sector erase function.
bool | flash25_test (KFile *channel)
Test function for flash25.

Detailed Description

Function library for serial Flash memory.

Author:
Daniele Basile <asterix@develer.com>

Definition in file flash25.h.

Define Documentation

#define FLASH25_AT25F2048 1

Memory definition.

Note:
Below are defined valid serial flash memory support to this drive. Every time we call flash25_init() function we check if memory defined are right (see flash25.c form more detail).

Definition at line 92 of file flash25.h.

Enumeration Type Documentation

enum Flash25Opcode

Serial flash opcode commands.

Enumerator:
FLASH25_WREN

Set write enable latch.

FLASH25_WRDI

Reset enable write latch.

FLASH25_RDSR

Read status register.

FLASH25_WRSR

Write status register.

FLASH25_READ

Read data from memory array.

FLASH25_PROGRAM

Program data into memory array.

FLASH25_SECTORE_ERASE

Erase one sector in memory array.

FLASH25_CHIP_ERASE

Erase all sector in memory array.

FLASH25_RDID

Read Manufacturer and product ID.

Definition at line 111 of file flash25.h.

enum Flash25Sector

Serial flash sector memory address.

Enumerator:
FLASH25_SECT1

Sector 1 (0x0 -0xFFFF)

FLASH25_SECT2

Sector 2 (0x10000 -0x1FFFF)

FLASH25_SECT3

Sector 3 (0x20000 -0x2FFFF)

FLASH25_SECT4

Sector 4 (0x30000 -0x3FFFF)

Definition at line 130 of file flash25.h.

Function Documentation

void flash25_chipErase ( Flash25 * fd )

Chip erase function.

Erase all sector of serial flash memory.

Note:
This operation could take a while.

Definition at line 337 of file flash25.c.

void flash25_sectorErase | ( | Flash25 * | fd,
 |  | Flash25Sector | sector
 | ) |  |

Sector erase function.

Erase a select sector of serial flash memory.

Note:
A sector size is FLASH25_SECTOR_SIZE. This operation could take a while.

Definition at line 291 of file flash25.c.

bool flash25_test ( KFile * channel )

Test function for flash25.

Note:
: This implentation use a SPI channel.

Definition at line 53 of file flash25_hwtest.c.


BeRTOS: flash25.h Source File

  • drv
flash25.h
Go to the documentation of this file.
00001
00044 #ifndef DRV_FLASH25_H
00045 #define DRV_FLASH25_H
00046
00047 #include "cfg/cfg_flash25.h"
00048 #include <cfg/compiler.h>
00049
00050 #include <io/kfile.h>
00051
00055 typedef uint32_t flash25Addr_t;
00056 typedef uint32_t flash25Size_t;
00057 typedef uint8_t flash25Offset_t;
00058
00062 typedef struct Flash25
00063 {
00064     KFile fd;
00065     KFile *channel;
00066 } Flash25;
00067
00071 #define KFT_FLASH25 MAKE_ID('F', 'L', '2', '5')
00072
00073
00077 INLINE Flash25 * FLASH25_CAST(KFile *fd)
00078 {
00079     ASSERT(fd->_type == KFT_FLASH25);
00080     return (Flash25 *)fd;
00081 }
00082
00092 #define FLASH25_AT25F2048         1
00093
00094 #if CONFIG_FLASH25 == FLASH25_AT25F2048
00095     #define FLASH25_MANUFACTURER_ID    0x1F  // ATMEL
00096     #define FLASH25_DEVICE_ID          0x63  // Device ID
00097     #define FLASH25_PAGE_SIZE          256   // Page size in byte
00098     #define FLASH25_NUM_SECTOR         4     // Number of section in serial memory
00099     #define FLASH25_SECTOR_SIZE        65536UL // Section size in byte
00100     #define FLASH25_MEM_SIZE           FLASH25_NUM_SECTOR * FLASH25_SECTOR_SIZE
00101     #define FLASH25_NUM_PAGE           FLASH25_MEM_SIZE / FLASH25_PAGE_SIZE
00102 #else
00103     #error Nothing memory defined in CONFIG_FLASH25 are support.
00104 #endif
00105
00106 #define RDY_BIT     0x1 // Statuts of write cycle
00107
00111 typedef enum {
00112     FLASH25_WREN            = 0x6,
00113     FLASH25_WRDI            = 0x4,
00114     FLASH25_RDSR            = 0x5,
00115     FLASH25_WRSR            = 0x1,
00116     FLASH25_READ            = 0x3,
00117     FLASH25_PROGRAM         = 0x2,
00118     FLASH25_SECTORE_ERASE   = 0x52,
00119     FLASH25_CHIP_ERASE      = 0x62,
00120     FLASH25_RDID            = 0x15
00121 } Flash25Opcode;
00122
00126 #if CONFIG_FLASH25 != FLASH25_AT25F2048
00127     #error Nothing memory defined in CONFIG_FLASH25 are support.
00128 #endif
00129
00130 typedef enum {
00131     FLASH25_SECT1            = 0x0,
00132     FLASH25_SECT2            = 0x10000,
00133     FLASH25_SECT3            = 0x20000,
00134     FLASH25_SECT4            = 0x30000,
00135 } Flash25Sector;
00136
00137 void flash25_init(Flash25 *fd, KFile *ch);
00138 void flash25_chipErase(Flash25 *fd);
00139 void flash25_sectorErase(Flash25 *fd, Flash25Sector sector);
00140 bool flash25_test(KFile *channel);
00141
00142 #endif /* DRV_FLASH25_H */
00143


BeRTOS: flash25_hwtest.c File Reference

  • drv
Functions
flash25_hwtest.c File Reference

Test function for serial Flash memory. More...

#include <io/kfile.h>
#include <drv/flash25.h>
#include <cfg/debug.h>

Go to the source code of this file.

Functions

bool flash25_test (KFile *channel)
Test function for flash25.

Detailed Description

Test function for serial Flash memory.

Author:
Daniele Basile <asterix@develer.com>

Definition in file flash25_hwtest.c.

Function Documentation

bool flash25_test ( KFile * channel )

Test function for flash25.

Note:
: This implentation use a SPI channel.

Definition at line 53 of file flash25_hwtest.c.


BeRTOS: flash25_hwtest.c Source File

  • drv
flash25_hwtest.c
Go to the documentation of this file.
00001
00045 #include <io/kfile.h>
00046
00047 #include <drv/flash25.h>
00048
00049 #include <cfg/debug.h>
00050
00051 #warning FIXME:Review and refactor this test..
00052
00053 bool flash25_test(KFile *channel)
00054 {
00055     Flash25 fd;
00056     uint8_t test_buf[256];
00057
00058     /*
00059      * Init a spi kfile interface and
00060      * flash driver.
00061      */
00062     flash25_init(&fd, channel);
00063
00064     kprintf("Init serial flash\n");
00065
00066     flash25_chipErase(&fd);
00067
00068     flash25_sectorErase(&fd, FLASH25_SECT1);
00069     flash25_sectorErase(&fd, FLASH25_SECT2);
00070     flash25_sectorErase(&fd, FLASH25_SECT3);
00071     flash25_sectorErase(&fd, FLASH25_SECT4);
00072
00073     /*
00074      * Launche a kfile test interface.
00075      */
00076     kprintf("Kfile test start..\n");
00077     if (!kfile_testRunGeneric(&fd.fd, test_buf, NULL, sizeof(test_buf)))
00078         return false;
00079
00080     return true;
00081 }
00082
00083


BeRTOS: flash.h File Reference

  • drv
Data Structures | Defines | Functions
flash.h File Reference
#include "cfg/cfg_emb_flash.h"
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <io/kblock.h>
#include <io/kfile.h>
#include <io/kfile_block.h>
#include <cpu/attr.h>
#include <PP_STRINGIZE(drv/PP_CAT3(flash, _, CPU_ID).h)>

Go to the source code of this file.

Data Structures

struct | Flash
EmbFlash KBlock context structure. More...

Defines

#define | flash_init(args...) PP_CAT(flash_init_, COUNT_PARMS(args)) (args)
Init function for flash driver.
#define | flash_init_2(fls, flags)
Initialize fls Flash context structure.
Embedded flash error values
#define | FLASH_WR_OK 0
Write ok.
#define | FLASH_NOT_ERASED BV(1)
Flash memory was not erased before to write it.
#define | FLASH_WR_PROTECT BV(2)
Write not allowed the flash memory was protected.
#define | FLASH_WR_TIMEOUT BV(3)
Timeout while writing.
#define | FLASH_WR_ERR BV(4)
Invalid command and/or a bad keywords.
Flash init flags
#define | FLASH_WRITE_ONCE BV(0)
Allow only one write per block.
#define | FLASH_UNBUFFERED BV(1)
Open flash memory disabling page caching, no modification and partial write are allowed.

Functions

Flash * | FLASH_CAST (KBlock *fls)
Convert + ASSERT from generic KBlock to Flash.

Detailed Description

Definition in file flash.h.


BeRTOS: flash.h Source File

  • drv
flash.h
Go to the documentation of this file.
00001
00066 #ifndef DRV_FLASH_H
00067 #define DRV_FLASH_H
00068
00069 #include "cfg/cfg_emb_flash.h"
00070
00071 #include <cfg/macros.h>
00072 #include <cfg/compiler.h>
00073
00074 #include <io/kblock.h>
00075 #include <io/kfile.h>
00076 #include <io/kfile_block.h>
00077
00078 #include <cpu/attr.h>
00079
00080 #if COMPILER_C99
00081     #define flash_init(...)           PP_CAT(flash_init_, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__)
00082 #else
00083
00095     #define flash_init(args...)       PP_CAT(flash_init_, COUNT_PARMS(args)) (args)
00096 #endif
00097
00102 #define FLASH_WR_OK             0     ///< Write ok.
00103 #define FLASH_NOT_ERASED     BV(1)    ///< Flash memory was not erased before to write it.
00104 #define FLASH_WR_PROTECT     BV(2)    ///< Write not allowed the flash memory was protected.
00105 #define FLASH_WR_TIMEOUT     BV(3)    ///< Timeout while writing
00106 #define FLASH_WR_ERR         BV(4)    ///< Invalid command and/or a bad keywords
00107
00109 struct FlashHardware;
00110
00114 typedef struct Flash
00115 {
00116     KBlock blk;
00117     struct FlashHardware *hw;
00118     #if !CONFIG_FLASH_DISABLE_OLD_API
00119     union {
00120         KFile fd;
00121         KFileBlock fdblk;
00122     } DEPRECATED;
00123     #endif /* !CONFIG_FLASH_DISABLE_OLD_API */
00124 } Flash;
00125
00126 /*
00127  * ID for FLASH
00128  */
00129 #define KBT_FLASH MAKE_ID('F', 'L', 'A', 'S')
00130
00134 INLINE Flash *FLASH_CAST(KBlock *fls)
00135 {
00136     ASSERT(fls->priv.type == KBT_FLASH);
00137     return (Flash *)fls;
00138 }
00139
00140 void flash_hw_init(Flash *fls, int flags);
00141 void flash_hw_initUnbuffered(Flash *fls, int flags);
00142
00143 #include CPU_HEADER(flash)
00144
00149 #define FLASH_WRITE_ONCE   BV(0) ///< Allow only one write per block.
00150 #define FLASH_UNBUFFERED   BV(1) ///< Open flash memory disabling page caching, no modification and partial write are allowed.
00151
00158 #define flash_init_2(fls, flags)    (flags & FLASH_UNBUFFERED) ? \
00159                                         flash_hw_initUnbuffered(fls, flags) : flash_hw_init(fls, flags)
00160
00161 #if !CONFIG_FLASH_DISABLE_OLD_API
00162 INLINE DEPRECATED void flash_init_1(Flash *fls)
00163 {
00164     flash_hw_init(fls, 0);
00165     kfileblock_init(&fls->fdblk, &fls->blk);
00166 }
00167 #endif /* !CONFIG_FLASH_DISABLE_OLD_API */
00168
00171 #endif /* DRV_FLASH_H */


BeRTOS: flash_arm.h File Reference

  • cpu
  • arm
  • drv
flash_arm.h File Reference

Low-level flash module for ARM (interface). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level flash module for ARM (interface).

Author:
Daniele Basile <asterix@develer.com>

Definition in file flash_arm.h.


BeRTOS: flash_arm.h Source File

  • cpu
  • arm
  • drv
flash_arm.h
Go to the documentation of this file.
00001
00039 #include <cpu/detect.h>
00040
00041 #if CPU_ARM_AT91
00042     #include "flash_at91.h"
00043 #elif CPU_ARM_LPC2
00044     #include "flash_lpc2.h"
00045 /*#elif  Add other ARM families here */
00046 #else
00047     #error Unknown CPU
00048 #endif


BeRTOS: flash_at91.c File Reference

  • cpu
  • arm
  • drv
Functions
flash_at91.c File Reference

At91sam7 Internal flash read/write driver. More...

#include "flash_at91.h"
#include "cfg/cfg_emb_flash.h"
#include <cfg/macros.h>
#include <cfg/log.h>
#include <cpu/irq.h>
#include <cpu/attr.h>
#include <cpu/power.h>
#include <io/kfile.h>
#include <io/kblock.h>
#include <io/arm.h>
#include <drv/timer.h>
#include <drv/flash.h>
#include <string.h>

Go to the source code of this file.

Functions

RAM_FUNC static NOINLINE void | write_page (uint32_t page)
Really send the flash write command.
void | flash_sendWRcmd (uint32_t page)
Send write command.
static bool | flash_getStatus (struct KBlock *blk)
Return true if no error are occurred after flash memory read or write operation, otherwise return error code.

Detailed Description

At91sam7 Internal flash read/write driver.

Author:
Daniele Basile <asterix@develer.com>

Definition in file flash_at91.c.

Function Documentation

void flash_sendWRcmd ( uint32_t page ) [inline]

Send write command.

After WR command cpu write bufferd page into flash memory.

Definition at line 95 of file flash_at91.c.

RAM_FUNC static NOINLINE void write_page ( uint32_t page ) [static]

Really send the flash write command.

Note:
This function has to be placed in RAM because executing code from flash while a writing process is in progress is forbidden.

Definition at line 76 of file flash_at91.c.


BeRTOS: flash_at91.c Source File

  • cpu
  • arm
  • drv
flash_at91.c
Go to the documentation of this file.
00001
00040 #include "flash_at91.h"
00041
00042 #include "cfg/cfg_emb_flash.h"
00043 #include <cfg/macros.h>
00044
00045 // Define log settings for cfg/log.h
00046 #define LOG_LEVEL    CONFIG_FLASH_EMB_LOG_LEVEL
00047 #define LOG_FORMAT   CONFIG_FLASH_EMB_LOG_FORMAT
00048 #include <cfg/log.h>
00049
00050 #include <cpu/irq.h>
00051 #include <cpu/attr.h>
00052 #include <cpu/power.h>
00053
00054 #include <io/kfile.h>
00055 #include <io/kblock.h>
00056 #include <io/arm.h>
00057
00058 #include <drv/timer.h>
00059 #include <drv/flash.h>
00060
00061 #include <string.h>
00062
00063 struct FlashHardware
00064 {
00065     uint8_t status;
00066 };
00067
00068
00076 RAM_FUNC NOINLINE static void write_page(uint32_t page)
00077 {
00078     // Send the 'write page' command
00079     MC_FCR = MC_KEY | MC_FCMD_WP | (MC_PAGEN_MASK & (page << 8));
00080
00081     // Wait for the end of command
00082     while(!(MC_FSR & BV(MC_FRDY)))
00083     {
00084         //NOP;
00085     }
00086 }
00087
00088
00095 INLINE void flash_sendWRcmd(uint32_t page)
00096 {
00097     cpu_flags_t flags;
00098
00099     LOG_INFO("Writing page %ld...\n", page);
00100
00101     IRQ_SAVE_DISABLE(flags);
00102     write_page(page);
00103
00104     IRQ_RESTORE(flags);
00105     LOG_INFO("Done\n");
00106 }
00107
00112 static bool flash_getStatus(struct KBlock *blk)
00113 {
00114     Flash *fls = FLASH_CAST(blk);
00115     /*
00116      * This bit is set to one if an invalid command and/or a bad keywords was/were
00117      * written in the Flash Command Register.
00118      */
00119     if(MC_FSR & BV(MC_PROGE))
00120     {
00121         fls->hw->status |= FLASH_WR_ERR;
00122         LOG_ERR("flash not erased..\n");
00123         return false;
00124     }
00125
00126     /*
00127      * This bit is set to one if we programming of at least one locked lock
00128      * region.
00129      */
00130     if(MC_FSR & BV(MC_LOCKE))
00131     {
00132         fls->hw->status |= FLASH_WR_PROTECT;
00133         LOG_ERR("wr protect..\n");
00134         return false;
00135     }
00136
00137     return true;
00138 }
00139
00140 static size_t at91_flash_readDirect(struct KBlock *blk, block_idx_t idx, void *buf, size_t offset, size_t size)
00141 {
00142     memcpy(buf, (void *)(idx * blk->blk_size +  FLASH_BASE + offset), size);
00143     return size;
00144 }
00145
00146 static size_t at91_flash_writeDirect(struct KBlock *blk, block_idx_t idx, const void *_buf, size_t offset, size_t size)
00147 {
00148     ASSERT(offset == 0);
00149     ASSERT(size == blk->blk_size);
00150
00151     uint32_t *addr = (uint32_t *)(idx * blk->blk_size +  FLASH_BASE);
00152     const uint8_t *buf = (const uint8_t *)_buf;
00153
00154     while (size)
00155     {
00156         uint32_t data = (*(buf + 3) << 24) |
00157                         (*(buf + 2) << 16) |
00158                         (*(buf + 1) << 8)  |
00159                         *buf;
00160         *addr = data;
00161
00162         size -= 4;
00163         buf += 4;
00164         addr++;
00165     }
00166
00167     flash_sendWRcmd(idx);
00168
00169     if (!flash_getStatus(blk))
00170         return 0;
00171
00172     return blk->blk_size;
00173 }
00174
00175
00176 static int at91_flash_error(struct KBlock *blk)
00177 {
00178     Flash *fls = FLASH_CAST(blk);
00179     return fls->hw->status;
00180 }
00181
00182 static void at91_flash_clearerror(struct KBlock *blk)
00183 {
00184     Flash *fls = FLASH_CAST(blk);
00185     fls->hw->status = 0;
00186 }
00187
00188 static const KBlockVTable flash_at91_buffered_vt =
00189 {
00190     .readDirect = at91_flash_readDirect,
00191     .writeDirect = at91_flash_writeDirect,
00192
00193     .readBuf = kblock_swReadBuf,
00194     .writeBuf = kblock_swWriteBuf,
00195     .load = kblock_swLoad,
00196     .store = kblock_swStore,
00197
00198     .error = at91_flash_error,
00199     .clearerr = at91_flash_clearerror,
00200 };
00201
00202 static const KBlockVTable flash_at91_unbuffered_vt =
00203 {
00204     .readDirect = at91_flash_readDirect,
00205     .writeDirect = at91_flash_writeDirect,
00206
00207     .error = at91_flash_error,
00208     .clearerr = at91_flash_clearerror,
00209 };
00210
00211 static struct FlashHardware flash_at91_hw;
00212 static uint8_t flash_buf[FLASH_PAGE_SIZE_BYTES];
00213
00214 static void common_init(Flash *fls)
00215 {
00216     memset(fls, 0, sizeof(*fls));
00217     DB(fls->blk.priv.type = KBT_FLASH);
00218
00219     fls->hw = &flash_at91_hw;
00220
00221     fls->blk.blk_size = FLASH_PAGE_SIZE_BYTES;
00222     fls->blk.blk_cnt = FLASH_MEM_SIZE / FLASH_PAGE_SIZE_BYTES;
00223 }
00224
00225 void flash_hw_init(Flash *fls, UNUSED_ARG(int, flags))
00226 {
00227     common_init(fls);
00228     fls->blk.priv.vt = &flash_at91_buffered_vt;
00229     fls->blk.priv.flags |= KB_BUFFERED | KB_PARTIAL_WRITE;
00230     fls->blk.priv.buf = flash_buf;
00231
00232     /* Load the first block in the cache */
00233     memcpy(fls->blk.priv.buf, (void *)(FLASH_BASE), fls->blk.blk_size);
00234 }
00235
00236 void flash_hw_initUnbuffered(Flash *fls, UNUSED_ARG(int, flags))
00237 {
00238     common_init(fls);
00239     fls->blk.priv.vt = &flash_at91_unbuffered_vt;
00240 }
00241


BeRTOS: flash_at91.h File Reference

  • cpu
  • arm
  • drv
flash_at91.h File Reference

At91sam7 Internal flash read/write driver. More...

#include "cfg/cfg_emb_flash.h"

Go to the source code of this file.

Detailed Description

At91sam7 Internal flash read/write driver.

Author:
Daniele Basile <asterix@develer.com>

Definition in file flash_at91.h.


BeRTOS: flash_at91.h Source File

  • cpu
  • arm
  • drv
flash_at91.h
Go to the documentation of this file.
00001
00040 #ifndef FLASH_AT91_H
00041 #define FLASH_AT91_H
00042
00043 #include "cfg/cfg_emb_flash.h"
00044
00045 #if !CONFIG_FLASH_DISABLE_OLD_API
00046
00047     /* For backwards compatibility */
00048     #define FlashAt91  Flash
00049     #define flash_at91_init(fls)   flash_init(fls);
00050 #endif /* !CONFIG_FLASH_DISABLE_OLD_API */
00051
00052 #endif /* DRV_FLASH_ARM_H */


BeRTOS: flash_avr.c File Reference

  • cpu
  • avr
  • drv
flash_avr.c File Reference

Self programming routines. More...

#include "flash_avr.h"
#include "cfg/cfg_emb_flash.h"
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <cpu/irq.h>
#include <cfg/log.h>
#include <drv/wdt.h>
#include <drv/flash.h>
#include <io/kfile.h>
#include <io/kfile_block.h>
#include <io/kblock.h>
#include <avr/io.h>
#include <avr/boot.h>
#include <avr/pgmspace.h>
#include <string.h>

Go to the source code of this file.

Detailed Description

Self programming routines.

Author:
Francesco Sacchi <batt@develer.com>
Daniele Basile <asterix@develer.com>

This module implements a kfile-like access for Atmel avr internal flash. Internal flash writing access is controlled by BOOTSZ fuses, check datasheet for details.

Definition in file flash_avr.c.


BeRTOS: flash_avr.c Source File

  • cpu
  • avr
  • drv
flash_avr.c
Go to the documentation of this file.
00001
00043 #include "flash_avr.h"
00044
00045 #include "cfg/cfg_emb_flash.h"
00046
00047 #include <cfg/macros.h> // MIN()
00048 #include <cfg/compiler.h>
00049 #include <cfg/debug.h>
00050 #include <cpu/irq.h>
00051
00052 // Define log settings for cfg/log.h
00053 #define LOG_LEVEL    CONFIG_FLASH_EMB_LOG_LEVEL
00054 #define LOG_FORMAT   CONFIG_FLASH_EMB_LOG_FORMAT
00055 #include <cfg/log.h>
00056
00057 #include <drv/wdt.h>
00058 #include <drv/flash.h>
00059
00060 #include <io/kfile.h>
00061 #include <io/kfile_block.h>
00062 #include <io/kblock.h>
00063
00064 #include <avr/io.h>
00065 #include <avr/boot.h>
00066 #include <avr/pgmspace.h>
00067
00068 #include <string.h>
00069
00070 struct FlashHardware;
00071
00072 static size_t avr_flash_readDirect(struct KBlock *blk, block_idx_t idx, void *buf, size_t offset, size_t size)
00073 {
00074     memcpy_P(buf, (const void *)(uint16_t)(idx * blk->blk_size + offset), size);
00075     return blk->blk_size;
00076 }
00077
00078 static size_t avr_flash_writeDirect(struct KBlock *blk, block_idx_t idx, const void *_buf, size_t offset, size_t size)
00079 {
00080     ASSERT(offset == 0);
00081     ASSERT(size == blk->blk_size);
00082
00083     uint32_t page_addr = idx * blk->blk_size;
00084     uint32_t addr = idx * blk->blk_size;
00085     const uint8_t *buf = (const uint8_t *)_buf;
00086
00087     /* Wait while the SPM instruction is busy. */
00088     boot_spm_busy_wait();
00089
00090     /* Fill the temporary buffer of the AVR */
00091     while (size)
00092     {
00093         uint16_t data = ((*buf + 1) << 8) | *buf;
00094         ATOMIC(boot_page_fill(addr, data));
00095
00096         buf += 2;
00097         size -= 2;
00098         addr += 2;
00099     }
00100
00101     wdt_reset();
00102
00103     /* Page erase */
00104     ATOMIC(boot_page_erase(page_addr));
00105
00106     /* Wait until the memory is erased. */
00107     boot_spm_busy_wait();
00108
00109     /* Store buffer in flash page. */
00110     ATOMIC(boot_page_write(page_addr));
00111
00112     /* Wait while the SPM instruction is busy. */
00113     boot_spm_busy_wait();
00114
00115     /*
00116     * Reenable RWW-section again. We need this if we want to jump back
00117     * to the application after bootloading.
00118     */
00119     ATOMIC(boot_rww_enable());
00120
00121     return blk->blk_size;
00122 }
00123
00124 static int avr_flash_dummy(UNUSED_ARG(struct KBlock, *blk))
00125 {
00126     return 0;
00127 }
00128
00129 static const KBlockVTable flash_avr_buffered_vt =
00130 {
00131     .readDirect = avr_flash_readDirect,
00132     .writeDirect = avr_flash_writeDirect,
00133
00134     .readBuf = kblock_swReadBuf,
00135     .writeBuf = kblock_swWriteBuf,
00136     .load = kblock_swLoad,
00137     .store = kblock_swStore,
00138
00139     .error = avr_flash_dummy,
00140     .clearerr = (kblock_clearerr_t)avr_flash_dummy,
00141 };
00142
00143 static const KBlockVTable flash_avr_unbuffered_vt =
00144 {
00145     .readDirect = avr_flash_readDirect,
00146     .writeDirect = avr_flash_writeDirect,
00147
00148     .error = avr_flash_dummy,
00149     .clearerr = (kblock_clearerr_t)avr_flash_dummy,
00150 };
00151
00152 static uint8_t flash_buf[SPM_PAGESIZE];
00153
00154 static void common_init(Flash *fls)
00155 {
00156     memset(fls, 0, sizeof(*fls));
00157     DB(fls->blk.priv.type = KBT_FLASH);
00158
00159     fls->blk.blk_size = SPM_PAGESIZE;
00160     fls->blk.blk_cnt =  (FLASHEND + 1) / SPM_PAGESIZE;
00161 }
00162
00163
00164 void flash_hw_init(Flash *fls, UNUSED_ARG(int, flags))
00165 {
00166     common_init(fls);
00167     fls->blk.priv.vt = &flash_avr_buffered_vt;
00168     fls->blk.priv.flags |= KB_BUFFERED | KB_PARTIAL_WRITE;
00169     fls->blk.priv.buf = flash_buf;
00170 }
00171
00172 void flash_hw_initUnbuffered(Flash *fls, UNUSED_ARG(int, flags))
00173 {
00174     common_init(fls);
00175     fls->blk.priv.vt = &flash_avr_unbuffered_vt;
00176 }
00177
00178


BeRTOS: flash_avr.h File Reference

  • cpu
  • avr
  • drv
flash_avr.h File Reference

AVR Internal flash read/write driver. More...

#include "cfg/cfg_emb_flash.h"

Go to the source code of this file.

Detailed Description

AVR Internal flash read/write driver.

Author:
Francesco Sacchi <batt@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file flash_avr.h.


BeRTOS: flash_avr.h Source File

  • cpu
  • avr
  • drv
flash_avr.h
Go to the documentation of this file.
00001
00039 #ifndef FLASH_AVR_H
00040 #define FLASH_AVR_H
00041
00042 #include "cfg/cfg_emb_flash.h"
00043
00044 #if !CONFIG_FLASH_DISABLE_OLD_API
00045
00046     /* For backwards compatibility */
00047     #define FlashAvr  Flash
00048     #define flash_avr_init(fls)   flash_init(fls);
00049 #endif /* !CONFIG_FLASH_DISABLE_OLD_API */
00050
00051 #endif /* DRV_FLASH_AVR_H */


BeRTOS: flash_cm3.h File Reference

  • cpu
  • cortex-m3
  • drv
flash_cm3.h File Reference

Low-level flash module for Cortex-M3 (interface). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level flash module for Cortex-M3 (interface).

Author:
Daniele Basile <asterix@develer.com>

Definition in file flash_cm3.h.


BeRTOS: flash_cm3.h Source File

  • cpu
  • cortex-m3
  • drv
flash_cm3.h
Go to the documentation of this file.
00001
00038 #include <cpu/detect.h>
00039
00040 #if CPU_CM3_LM3S
00041     #include "flash_lm3s.h"
00042 #elif CPU_CM3_STM32
00043     #include "flash_stm32.h"
00044 /*#elif  Add other Cortex-M3 CPUs here */
00045 #else
00046     #error Unknown CPU
00047 #endif


BeRTOS: flash_lm3s.c File Reference

  • cpu
  • cortex-m3
  • drv
flash_lm3s.c File Reference

LM3S1968 internal flash memory driver. More...

#include "flash_lm3s.h"
#include "cfg/cfg_emb_flash.h"
#include <cfg/log.h>
#include <cfg/macros.h>
#include <io/kblock.h>
#include <drv/timer.h>
#include <drv/flash.h>
#include <cpu/power.h>
#include <cpu/types.h>
#include <string.h>

Go to the source code of this file.

Detailed Description

LM3S1968 internal flash memory driver.

Author:
Andrea Righi <arighi@develer.com>

Definition in file flash_lm3s.c.


BeRTOS: flash_lm3s.c Source File

  • cpu
  • cortex-m3
  • drv
flash_lm3s.c
Go to the documentation of this file.
00001
00038 #include "flash_lm3s.h"
00039 #include "cfg/cfg_emb_flash.h"
00040
00041 // Define log settings for cfg/log.h
00042 #define LOG_LEVEL    CONFIG_FLASH_EMB_LOG_LEVEL
00043 #define LOG_FORMAT   CONFIG_FLASH_EMB_LOG_FORMAT
00044 #include <cfg/log.h>
00045 #include <cfg/macros.h>
00046
00047 #include <io/kblock.h>
00048
00049 #include <drv/timer.h>
00050 #include <drv/flash.h>
00051
00052 #include <cpu/power.h> /* cpu_relax() */
00053 #include <cpu/types.h>
00054
00055 #include <string.h> /* memcpy() */
00056
00057 struct FlashHardware
00058 {
00059     int status;
00060 };
00061
00062 static bool flash_wait(struct KBlock *blk, uint32_t event)
00063 {
00064     Flash *fls = FLASH_CAST(blk);
00065     ticks_t start = timer_clock();
00066     while (true)
00067     {
00068         if (!(FLASH_FMC_R & event))
00069             break;
00070
00071         if (FLASH_FCRIS_R & FLASH_FCRIS_ARIS)
00072         {
00073             fls->hw->status |= FLASH_WR_PROTECT;
00074             LOG_ERR("wr protect..\n");
00075             return false;
00076         }
00077
00078         if (timer_clock() - start > ms_to_ticks(CONFIG_FLASH_WR_TIMEOUT))
00079         {
00080             fls->hw->status |= FLASH_WR_TIMEOUT;
00081             LOG_ERR("Timeout..\n");
00082             return false;
00083         }
00084
00085         cpu_relax();
00086     }
00087
00088     return true;
00089 }
00090
00091 static int lm3s_erasePage(struct KBlock *blk, uint32_t addr)
00092 {
00093     FLASH_FCMISC_R = FLASH_FCMISC_AMISC;
00094
00095     FLASH_FMA_R = (volatile uint32_t)addr;
00096     FLASH_FMC_R = FLASH_FMC_WRKEY | FLASH_FMC_ERASE;
00097
00098     return flash_wait(blk, FLASH_FMC_ERASE);
00099 }
00100
00101 static int lm3s_writeWord(struct KBlock *blk, uint32_t addr, uint32_t data)
00102 {
00103     FLASH_FCMISC_R = FLASH_FCMISC_AMISC;
00104
00105     FLASH_FMA_R = (volatile uint32_t)addr;
00106     FLASH_FMD_R = (volatile uint32_t)data;
00107     FLASH_FMC_R = FLASH_FMC_WRKEY | FLASH_FMC_WRITE;
00108
00109     return flash_wait(blk, FLASH_FMC_WRITE);
00110 }
00111
00112 static size_t lm3s_flash_readDirect(struct KBlock *blk, block_idx_t idx, void *buf, size_t offset, size_t size)
00113 {
00114     memcpy(buf, (void *)(idx * blk->blk_size + offset), size);
00115     return size;
00116 }
00117
00118 static size_t lm3s_flash_writeDirect(struct KBlock *blk, block_idx_t idx, const void *_buf, size_t offset, size_t size)
00119 {
00120     (void)offset;
00121     ASSERT(offset == 0);
00122     ASSERT(size == blk->blk_size);
00123
00124     if (!lm3s_erasePage(blk, (idx * blk->blk_size)))
00125         return 0;
00126
00127     uint32_t addr = idx * blk->blk_size;
00128     const uint8_t *buf = (const uint8_t *)_buf;
00129
00130     while (size)
00131     {
00132         uint32_t data = (*(buf + 3) << 24) |
00133                         (*(buf + 2) << 16) |
00134                         (*(buf + 1) << 8)  |
00135                         *buf;
00136
00137         if (!lm3s_writeWord(blk, addr, data))
00138             return 0;
00139
00140         size -= 4;
00141         buf += 4;
00142         addr += 4;
00143     }
00144
00145     return blk->blk_size;
00146 }
00147
00148 static int lm3s_flash_error(struct KBlock *blk)
00149 {
00150     Flash *fls = FLASH_CAST(blk);
00151     return fls->hw->status;
00152 }
00153
00154 static void lm3s_flash_clearerror(struct KBlock *blk)
00155 {
00156     Flash *fls = FLASH_CAST(blk);
00157     fls->hw->status = 0;
00158 }
00159
00160 static const KBlockVTable flash_lm3s_buffered_vt =
00161 {
00162     .readDirect = lm3s_flash_readDirect,
00163     .writeDirect = lm3s_flash_writeDirect,
00164
00165     .readBuf = kblock_swReadBuf,
00166     .writeBuf = kblock_swWriteBuf,
00167     .load = kblock_swLoad,
00168     .store = kblock_swStore,
00169
00170     .close = kblock_swClose,
00171
00172     .error = lm3s_flash_error,
00173     .clearerr = lm3s_flash_clearerror,
00174 };
00175
00176 static const KBlockVTable flash_lm3s_unbuffered_vt =
00177 {
00178     .readDirect = lm3s_flash_readDirect,
00179     .writeDirect = lm3s_flash_writeDirect,
00180
00181     .close = kblock_swClose,
00182
00183     .error = lm3s_flash_error,
00184     .clearerr = lm3s_flash_clearerror,
00185 };
00186
00187 static struct FlashHardware flash_lm3s_hw;
00188 static uint8_t flash_buf[FLASH_PAGE_SIZE];
00189
00190 static void common_init(Flash *fls)
00191 {
00192     memset(fls, 0, sizeof(*fls));
00193     DB(fls->blk.priv.type = KBT_FLASH);
00194
00195     FLASH_USECRL_R = CPU_FREQ / 1000000 - 1;
00196
00197     fls->hw = &flash_lm3s_hw;
00198
00199     fls->blk.blk_size = FLASH_PAGE_SIZE;
00200     fls->blk.blk_cnt =  FLASH_SIZE / FLASH_PAGE_SIZE;
00201 }
00202
00203
00204 void flash_hw_init(Flash *fls, UNUSED_ARG(int, flags))
00205 {
00206     common_init(fls);
00207     fls->blk.priv.vt = &flash_lm3s_buffered_vt;
00208     fls->blk.priv.flags |= KB_BUFFERED | KB_PARTIAL_WRITE;
00209     fls->blk.priv.buf = flash_buf;
00210
00211     /* Load the first block in the cache */
00212     void *flash_start = 0x0;
00213     memcpy(fls->blk.priv.buf, flash_start, fls->blk.blk_size);
00214 }
00215
00216 void flash_hw_initUnbuffered(Flash *fls, UNUSED_ARG(int, flags))
00217 {
00218     common_init(fls);
00219     fls->blk.priv.vt = &flash_lm3s_unbuffered_vt;
00220 }
00221
00222
00223


BeRTOS: flash_lm3s.h File Reference

  • cpu
  • cortex-m3
  • drv
flash_lm3s.h File Reference

LM3S1968 internal flash memory driver. More...

Go to the source code of this file.

Detailed Description

LM3S1968 internal flash memory driver.

Author:
Andrea Righi <arighi@develer.com>

Definition in file flash_lm3s.h.


BeRTOS: flash_lm3s.h Source File

  • cpu
  • cortex-m3
  • drv
flash_lm3s.h
Go to the documentation of this file.
00001
00038 #ifndef FLASH_LM3S_H
00039 #define FLASH_LM3S_H
00040
00041 #endif /* FLASH_LM3S_H */


BeRTOS: flash_lpc2.c File Reference

  • cpu
  • arm
  • drv
flash_lpc2.c File Reference

NPX lpc23xx embedded flash read/write driver. More...

#include "flash_lpc2.h"
#include "cfg/cfg_emb_flash.h"
#include <cfg/log.h>
#include <cfg/macros.h>
#include <cpu/irq.h>
#include <cpu/attr.h>
#include <cpu/power.h>
#include <cpu/types.h>
#include <io/kblock.h>
#include <io/arm.h>
#include <drv/timer.h>
#include <drv/flash.h>
#include <struct/bitarray.h>
#include <string.h>

Go to the source code of this file.

Detailed Description

NPX lpc23xx embedded flash read/write driver.

Author:
Francesco Sacchi <batt@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file flash_lpc2.c.


BeRTOS: flash_lpc2.c Source File

  • cpu
  • arm
  • drv
flash_lpc2.c
Go to the documentation of this file.
00001
00041 #include "flash_lpc2.h"
00042 #include "cfg/cfg_emb_flash.h"
00043
00044 // Define log settings for cfg/log.h
00045 #define LOG_LEVEL    CONFIG_FLASH_EMB_LOG_LEVEL
00046 #define LOG_FORMAT   CONFIG_FLASH_EMB_LOG_FORMAT
00047 #include <cfg/log.h>
00048 #include <cfg/macros.h>
00049
00050 #include <cpu/irq.h>
00051 #include <cpu/attr.h>
00052 #include <cpu/power.h>
00053 #include <cpu/types.h>
00054
00055 #include <io/kblock.h>
00056 #include <io/arm.h>
00057
00058 #include <drv/timer.h>
00059 #include <drv/flash.h>
00060
00061 #include <struct/bitarray.h>
00062
00063 #include <string.h>
00064
00065 /* Embedded flash programming defines. */
00066 #define IAP_ADDRESS 0x7ffffff1
00067
00068 typedef enum IapCommands
00069 {
00070     PREPARE_SECTOR_FOR_WRITE = 50,
00071     COPY_RAM_TO_FLASH = 51,
00072     ERASE_SECTOR = 52,
00073     BLANK_CHECK_SECTOR = 53,
00074     READ_PART_ID = 54,
00075     READ_BOOT_VER = 55,
00076     COMPARE = 56,
00077     REINVOKE_ISP = 57,
00078 } IapCommands;
00079
00080 #if CPU_ARM_LPC2378
00081     #define FLASH_MEM_SIZE         (504 * 1024L)
00082     #define FLASH_PAGE_SIZE_BYTES          4096
00083     #define FLASH_REAL_PAGE_CNT              28
00084 #else
00085     #error Unknown CPU
00086 #endif
00087
00088 #define CMD_SUCCESS 0
00089
00090 struct FlashHardware
00091 {
00092     uint8_t status;
00093     int flags;
00094 };
00095
00096 #define FLASH_PAGE_CNT  FLASH_MEM_SIZE / FLASH_PAGE_SIZE_BYTES
00097
00098 BITARRAY_ALLOC(page_dirty, FLASH_PAGE_CNT);
00099 static BitArray lpc2_bitx;
00100
00101 uint8_t erase_group[] = {
00102
00103     4096 / FLASH_PAGE_SIZE_BYTES, 4096 / FLASH_PAGE_SIZE_BYTES,
00104     4096 / FLASH_PAGE_SIZE_BYTES, 4096 / FLASH_PAGE_SIZE_BYTES,
00105
00106     4096 / FLASH_PAGE_SIZE_BYTES, 4096 / FLASH_PAGE_SIZE_BYTES,
00107     4096 / FLASH_PAGE_SIZE_BYTES, 4096 / FLASH_PAGE_SIZE_BYTES,
00108
00109     32768 / FLASH_PAGE_SIZE_BYTES, 32768 / FLASH_PAGE_SIZE_BYTES,
00110     32768 / FLASH_PAGE_SIZE_BYTES, 32768 / FLASH_PAGE_SIZE_BYTES,
00111
00112     32768 / FLASH_PAGE_SIZE_BYTES, 32768 / FLASH_PAGE_SIZE_BYTES,
00113     32768 / FLASH_PAGE_SIZE_BYTES, 32768 / FLASH_PAGE_SIZE_BYTES,
00114
00115     32768 / FLASH_PAGE_SIZE_BYTES, 32768 / FLASH_PAGE_SIZE_BYTES,
00116     32768 / FLASH_PAGE_SIZE_BYTES, 32768 / FLASH_PAGE_SIZE_BYTES,
00117
00118     32768 / FLASH_PAGE_SIZE_BYTES, 32768 / FLASH_PAGE_SIZE_BYTES,
00119     4096 / FLASH_PAGE_SIZE_BYTES, 4096 / FLASH_PAGE_SIZE_BYTES,
00120
00121     4096 / FLASH_PAGE_SIZE_BYTES, 4096 / FLASH_PAGE_SIZE_BYTES,
00122     4096 / FLASH_PAGE_SIZE_BYTES, 4096 / FLASH_PAGE_SIZE_BYTES,
00123 };
00124
00125 typedef struct IapCmd
00126 {
00127     uint32_t cmd;
00128     uint32_t param[4];
00129 } IapCmd;
00130
00131 typedef struct IapRes
00132 {
00133     uint32_t status;
00134     uint32_t res[2];
00135 } IapRes;
00136
00137 typedef void (*iap_callback_t)(IapCmd *, IapRes *);
00138
00139 iap_callback_t iap = (iap_callback_t)IAP_ADDRESS;
00140
00141 static size_t sector_size(uint32_t page)
00142 {
00143     if (page < 8)
00144         return 4096;
00145     else if (page < 22)
00146         return 32768;
00147     else if (page < 28)
00148         return 4096;
00149
00150     ASSERT(0);
00151     return 0;
00152 }
00153
00154 static size_t sector_addr(uint32_t page)
00155 {
00156     if (page < 8)
00157         return page * 4096;
00158     else if (page < 22)
00159         return (page - 8) * 32768 + 4096 * 8;
00160     else if (page < 28)
00161         return (page - 22) * 4096 + 32768 * 14 + 4096 * 8;
00162
00163     ASSERT(0);
00164     return 0;
00165 }
00166
00167
00168 static uint32_t addr_to_sector(size_t addr)
00169 {
00170     if (addr < 4096 * 8)
00171         return addr / 4096;
00172     else if (addr < 4096 * 8 + 32768L * 14)
00173         return ((addr - 4096 * 8) / 32768) + 8;
00174     else if (addr < 4096 * 8 + 32768L * 14 + 4096 * 6)
00175         return ((addr - 4096 * 8 - 32768L * 14) / 4096) + 22;
00176
00177     ASSERT(0);
00178     return 0;
00179 }
00180
00181 static size_t lpc2_flash_readDirect(struct KBlock *blk, block_idx_t idx, void *buf, size_t offset, size_t size)
00182 {
00183     memcpy(buf, (void *)(idx * blk->blk_size + offset), size);
00184     return size;
00185 }
00186
00187 static size_t lpc2_flash_writeDirect(struct KBlock *blk, block_idx_t idx, const void *_buf, size_t offset, size_t size)
00188 {
00189     ASSERT(offset == 0);
00190     ASSERT(FLASH_PAGE_SIZE_BYTES == size);
00191
00192     Flash *fls = FLASH_CAST(blk);
00193     if (!(fls->hw->flags & FLASH_WRITE_ONCE))
00194         ASSERT(sector_size(idx) <= FLASH_PAGE_SIZE_BYTES);
00195
00196     const uint8_t *buf = (const uint8_t *)_buf;
00197     cpu_flags_t flags;
00198
00199     //Compute page address of current page.
00200     uint32_t addr = idx * blk->blk_size;
00201     uint32_t sector = addr_to_sector(addr);
00202     // Compute the first page index in the sector to manage the status
00203     int idx_sector = sector_addr(sector) /  blk->blk_size;
00204
00205     LOG_INFO("Writing page[%ld]sector[%ld]idx[%d]\n", idx, sector, idx_sector);
00206     IRQ_SAVE_DISABLE(flags);
00207
00208     IapCmd cmd;
00209     IapRes res;
00210     cmd.cmd = PREPARE_SECTOR_FOR_WRITE;
00211     cmd.param[0] = cmd.param[1] = sector;
00212     iap(&cmd, &res);
00213
00214     if (res.status != CMD_SUCCESS)
00215         goto flash_error;
00216
00217     if ((fls->hw->flags & FLASH_WRITE_ONCE) &&
00218             bitarray_isRangeFull(&lpc2_bitx, idx_sector, erase_group[sector]))
00219     {
00220         kputs("blocchi pieni\n");
00221         ASSERT(0);
00222         goto flash_error;
00223     }
00224
00225     bool erase = false;
00226     if ((fls->hw->flags & FLASH_WRITE_ONCE) &&
00227             bitarray_isRangeEmpty(&lpc2_bitx, idx_sector, erase_group[sector]))
00228         erase = true;
00229
00230     if (!(fls->hw->flags & FLASH_WRITE_ONCE))
00231         erase = true;
00232
00233     if (erase)
00234     {
00235         cmd.cmd = ERASE_SECTOR;
00236         cmd.param[0] = cmd.param[1] = sector;
00237         cmd.param[2] = CPU_FREQ / 1000;
00238         iap(&cmd, &res);
00239
00240         if (res.status != CMD_SUCCESS)
00241             goto flash_error;
00242     }
00243
00244     LOG_INFO("Writing page [%ld], addr [%ld] in sector[%ld]\n", idx, addr, sector);
00245     cmd.cmd = PREPARE_SECTOR_FOR_WRITE;
00246     cmd.param[0] = cmd.param[1] = sector;
00247     iap(&cmd, &res);
00248
00249     if (res.status != CMD_SUCCESS)
00250         goto flash_error;
00251
00252     if (fls->hw->flags & FLASH_WRITE_ONCE)
00253     {
00254         if (bitarray_test(&lpc2_bitx, idx))
00255         {
00256             ASSERT(0);
00257             goto flash_error;
00258         }
00259         else
00260             bitarray_set(&lpc2_bitx, idx);
00261     }
00262
00263     cmd.cmd = COPY_RAM_TO_FLASH;
00264     cmd.param[0] = addr;
00265     cmd.param[1] = (uint32_t)buf;
00266     cmd.param[2] = FLASH_PAGE_SIZE_BYTES;
00267     cmd.param[3] = CPU_FREQ / 1000;
00268     iap(&cmd, &res);
00269
00270     if (res.status != CMD_SUCCESS)
00271         goto flash_error;
00272
00273     IRQ_RESTORE(flags);
00274     LOG_INFO("Done\n");
00275
00276     return blk->blk_size;
00277
00278 flash_error:
00279     IRQ_RESTORE(flags);
00280     LOG_ERR("%ld\n", res.status);
00281     fls->hw->status |= FLASH_WR_ERR;
00282     return 0;
00283 }
00284
00285 static int lpc2_flash_close(UNUSED_ARG(struct KBlock, *blk))
00286 {
00287     memset(page_dirty, 0, sizeof(page_dirty));
00288     return 0;
00289 }
00290
00291
00292 static int lpc2_flash_error(struct KBlock *blk)
00293 {
00294     Flash *fls = FLASH_CAST(blk);
00295     return fls->hw->status;
00296 }
00297
00298 static void lpc2_flash_clearerror(struct KBlock *blk)
00299 {
00300     Flash *fls = FLASH_CAST(blk);
00301     fls->hw->status = 0;
00302 }
00303
00304 static const KBlockVTable flash_lpc2_buffered_vt =
00305 {
00306     .readDirect = lpc2_flash_readDirect,
00307     .writeDirect = lpc2_flash_writeDirect,
00308
00309     .readBuf = kblock_swReadBuf,
00310     .writeBuf = kblock_swWriteBuf,
00311     .load = kblock_swLoad,
00312     .store = kblock_swStore,
00313
00314     .close = lpc2_flash_close,
00315
00316     .error = lpc2_flash_error,
00317     .clearerr = lpc2_flash_clearerror,
00318 };
00319
00320 static const KBlockVTable flash_lpc2_unbuffered_vt =
00321 {
00322     .readDirect = lpc2_flash_readDirect,
00323     .writeDirect = lpc2_flash_writeDirect,
00324
00325     .close = lpc2_flash_close,
00326
00327     .error = lpc2_flash_error,
00328     .clearerr = lpc2_flash_clearerror,
00329 };
00330
00331 static struct FlashHardware flash_lpc2_hw;
00332 static uint8_t flash_buf[FLASH_PAGE_SIZE_BYTES];
00333
00334 static void common_init(Flash *fls, int flags)
00335 {
00336     memset(fls, 0, sizeof(*fls));
00337     DB(fls->blk.priv.type = KBT_FLASH);
00338
00339     fls->hw = &flash_lpc2_hw;
00340     fls->hw->flags = flags;
00341
00342     fls->blk.blk_size = FLASH_PAGE_SIZE_BYTES;
00343     fls->blk.blk_cnt = FLASH_MEM_SIZE / FLASH_PAGE_SIZE_BYTES;
00344
00345     bitarray_init(&lpc2_bitx, FLASH_PAGE_CNT, page_dirty, sizeof(page_dirty));
00346 }
00347
00348 void flash_hw_init(Flash *fls, int flags)
00349 {
00350     common_init(fls, flags);
00351     fls->blk.priv.vt = &flash_lpc2_buffered_vt;
00352     fls->blk.priv.flags |= KB_BUFFERED | KB_PARTIAL_WRITE;
00353     fls->blk.priv.buf = flash_buf;
00354
00355
00356     /* Load the first block in the cache */
00357     void *flash_start = 0x0;
00358     memcpy(fls->blk.priv.buf, flash_start, fls->blk.blk_size);
00359 }
00360
00361 void flash_hw_initUnbuffered(Flash *fls, int flags)
00362 {
00363     common_init(fls, flags);
00364     fls->blk.priv.vt = &flash_lpc2_unbuffered_vt;
00365 }


BeRTOS: flash_lpc2.h File Reference

  • cpu
  • arm
  • drv
flash_lpc2.h File Reference

NPX lpc23xx embedded flash read/write driver. More...

Go to the source code of this file.

Detailed Description

NPX lpc23xx embedded flash read/write driver.

Author:
Daniele Basile <asterix@develer.com>

Definition in file flash_lpc2.h.


BeRTOS: flash_lpc2.h Source File

  • cpu
  • arm
  • drv
flash_lpc2.h
Go to the documentation of this file.
00001
00040 #ifndef FLASH_LPC2_H
00041 #define FLASH_LPC2_H
00042
00043
00044 #endif /* DRV_FLASH_ARM_H */


BeRTOS: flash_stm32.c File Reference

  • cpu
  • cortex-m3
  • drv
flash_stm32.c File Reference

STM32F103xx internal flash memory driver. More...

#include "flash_stm32.h"
#include "cfg/cfg_emb_flash.h"
#include <cfg/log.h>
#include <drv/timer.h>
#include <drv/flash.h>
#include <cpu/power.h>
#include <cpu/detect.h>
#include <io/stm32.h>
#include <string.h>

Go to the source code of this file.

Detailed Description

STM32F103xx internal flash memory driver.

Author:
Daniele Basile <asterix@develer.com>

Definition in file flash_stm32.c.


BeRTOS: flash_stm32.c Source File

  • cpu
  • cortex-m3
  • drv
flash_stm32.c
Go to the documentation of this file.
00001
00038 #include "flash_stm32.h"
00039
00040 #include "cfg/cfg_emb_flash.h"
00041
00042 // Define log settings for cfg/log.h
00043 #define LOG_LEVEL    CONFIG_FLASH_EMB_LOG_LEVEL
00044 #define LOG_FORMAT   CONFIG_FLASH_EMB_LOG_FORMAT
00045 #include <cfg/log.h>
00046
00047 #include <drv/timer.h>
00048 #include <drv/flash.h>
00049
00050 #include <cpu/power.h>
00051 #include <cpu/detect.h>
00052
00053 #include <io/stm32.h>
00054
00055 #include <string.h>
00056
00057 #define EMB_FLASH                ((struct stm32_flash*)FLASH_R_BASE)
00058
00059 struct FlashHardware
00060 {
00061     uint8_t status;
00062 };
00063
00064 static bool flash_wait(struct KBlock *blk)
00065 {
00066     Flash *fls = FLASH_CAST(blk);
00067     ticks_t start = timer_clock();
00068     while (true)
00069     {
00070         cpu_relax();
00071         if (!(EMB_FLASH->SR & FLASH_FLAG_BSY))
00072             break;
00073
00074         if (EMB_FLASH->SR & FLASH_FLAG_PGERR)
00075         {
00076             fls->hw->status |= FLASH_NOT_ERASED;
00077             LOG_ERR("flash not erased..\n");
00078             return false;
00079         }
00080
00081         if (EMB_FLASH->SR & FLASH_FLAG_WRPRTERR)
00082         {
00083             fls->hw->status |= FLASH_WR_PROTECT;
00084             LOG_ERR("wr protect..\n");
00085             return false;
00086         }
00087
00088         if (timer_clock() - start > ms_to_ticks(CONFIG_FLASH_WR_TIMEOUT))
00089         {
00090             fls->hw->status |= FLASH_WR_TIMEOUT;
00091             LOG_ERR("Timeout..\n");
00092             return false;
00093         }
00094     }
00095
00096     return true;
00097 }
00098
00099 static bool stm32_erasePage(struct KBlock *blk, uint32_t page_add)
00100 {
00101
00102     EMB_FLASH->CR |= CR_PER_SET;
00103     EMB_FLASH->AR = page_add;
00104     EMB_FLASH->CR |= CR_STRT_SET;
00105
00106     if (!flash_wait(blk))
00107         return false;
00108
00109     EMB_FLASH->CR &= CR_PER_RESET;
00110
00111     return true;
00112 }
00113
00114 #if 0
00115 // not used for now
00116 static bool stm32_eraseAll(struct KBlock *blk)
00117 {
00118     EMB_FLASH->CR |= CR_MER_SET;
00119     EMB_FLASH->CR |= CR_STRT_SET;
00120
00121     if (!flash_wait(blk))
00122         return false;
00123
00124     EMB_FLASH->CR &= CR_MER_RESET;
00125
00126     return true;
00127 }
00128 #endif
00129
00130 static int stm32_flash_error(struct KBlock *blk)
00131 {
00132     Flash *fls = FLASH_CAST(blk);
00133     return fls->hw->status;
00134 }
00135
00136 static void stm32_flash_clearerror(struct KBlock *blk)
00137 {
00138     Flash *fls = FLASH_CAST(blk);
00139     fls->hw->status = 0;
00140 }
00141
00142 static size_t stm32_flash_readDirect(struct KBlock *blk, block_idx_t idx, void *buf, size_t offset, size_t size)
00143 {
00144     memcpy(buf, (void *)(idx * blk->blk_size + offset), size);
00145     return size;
00146 }
00147
00148
00149 INLINE bool stm32_writeWord(struct KBlock *blk, uint32_t addr, uint16_t data)
00150 {
00151     ASSERT(!(addr % 2));
00152
00153     EMB_FLASH->CR |= CR_PG_SET;
00154
00155     *(reg16_t *)addr = data;
00156
00157     if (!flash_wait(blk))
00158         return false;
00159
00160     EMB_FLASH->CR &= CR_PG_RESET;
00161
00162     return true;
00163 }
00164
00165 static size_t stm32_flash_writeDirect(struct KBlock *blk, block_idx_t idx, const void *_buf, size_t offset, size_t size)
00166 {
00167     ASSERT(offset == 0);
00168     ASSERT(size == blk->blk_size);
00169
00170     if (!stm32_erasePage(blk, (idx * blk->blk_size)))
00171         return 0;
00172
00173     uint32_t addr = idx * blk->blk_size;
00174     const uint8_t *buf = (const uint8_t *)_buf;
00175
00176     while (size)
00177     {
00178         uint16_t data = (*(buf + 1) << 8) | *buf;
00179         if (!stm32_writeWord(blk, addr, data))
00180             return 0;
00181
00182         buf += 2;
00183         size -= 2;
00184         addr += 2;
00185     }
00186
00187     return blk->blk_size;
00188 }
00189
00190 static const KBlockVTable flash_stm32_buffered_vt =
00191 {
00192     .readDirect = stm32_flash_readDirect,
00193     .writeDirect = stm32_flash_writeDirect,
00194
00195     .readBuf = kblock_swReadBuf,
00196     .writeBuf = kblock_swWriteBuf,
00197     .load = kblock_swLoad,
00198     .store = kblock_swStore,
00199
00200     .close = kblock_swClose,
00201
00202     .error = stm32_flash_error,
00203     .clearerr = stm32_flash_clearerror,
00204 };
00205
00206 static const KBlockVTable flash_stm32_unbuffered_vt =
00207 {
00208     .readDirect = stm32_flash_readDirect,
00209     .writeDirect = stm32_flash_writeDirect,
00210
00211     .close = kblock_swClose,
00212
00213     .error = stm32_flash_error,
00214     .clearerr = stm32_flash_clearerror,
00215 };
00216
00217 static struct FlashHardware flash_stm32_hw;
00218 static uint8_t flash_buf[FLASH_PAGE_SIZE];
00219
00220 static void common_init(Flash *fls)
00221 {
00222     memset(fls, 0, sizeof(*fls));
00223     DB(fls->blk.priv.type = KBT_FLASH);
00224
00225     fls->hw = &flash_stm32_hw;
00226
00227     fls->blk.blk_size = FLASH_PAGE_SIZE;
00228     fls->blk.blk_cnt = (F_SIZE * 1024) / FLASH_PAGE_SIZE;
00229
00230     /* Unlock flash memory for the FPEC Access */
00231     EMB_FLASH->KEYR = FLASH_KEY1;
00232     EMB_FLASH->KEYR = FLASH_KEY2;
00233 }
00234
00235
00236 void flash_hw_init(Flash *fls, UNUSED_ARG(int, flags))
00237 {
00238     common_init(fls);
00239     fls->blk.priv.vt = &flash_stm32_buffered_vt;
00240     fls->blk.priv.flags |= KB_BUFFERED | KB_PARTIAL_WRITE;
00241     fls->blk.priv.buf = flash_buf;
00242
00243     /* Load the first block in the cache */
00244     void *flash_start = 0x0;
00245     memcpy(fls->blk.priv.buf, flash_start, fls->blk.blk_size);
00246 }
00247
00248 void flash_hw_initUnbuffered(Flash *fls, UNUSED_ARG(int, flags))
00249 {
00250     common_init(fls);
00251     fls->blk.priv.vt = &flash_stm32_unbuffered_vt;
00252 }


BeRTOS: flash_stm32.h File Reference

  • cpu
  • cortex-m3
  • drv
flash_stm32.h File Reference

STM32F103xx internal flash memory driver. More...

Go to the source code of this file.

Detailed Description

STM32F103xx internal flash memory driver.

Author:
Daniele Basile <asterix@develer.com>

Definition in file flash_stm32.h.


BeRTOS: flash_stm32.h Source File

  • cpu
  • cortex-m3
  • drv
flash_stm32.h
Go to the documentation of this file.
00001
00038 #ifndef FLASH_STM32_H
00039 #define FLASH_STM32_H
00040
00041 #endif /* FLASH_STM32_H */


BeRTOS: font.h File Reference

  • gfx
Defines
font.h File Reference

Font 8x6 IBM-PC 8bit. More...

#include <cfg/compiler.h>
#include <cpu/pgm.h>

Go to the source code of this file.

Defines

#define | FONT_HAS_GLYPH(font, c) ((c) >= (font)->first && (c) <= (font)->last)
Return true if glyph c is available in font.
#define | default_font font_luBS14
The default font.

Detailed Description

Font 8x6 IBM-PC 8bit.

Author:
Stefano Fedrigo <aleph@develer.com>

Definition in file font.h.

Define Documentation

#define default_font font_luBS14

The default font.

Definition at line 74 of file font.h.

#define FONT_HAS_GLYPH | ( | font,
 |  | c
 | ) | ((c) >= (font)->first && (c) <= (font)->last)

Return true if glyph c is available in font.

Definition at line 70 of file font.h.


BeRTOS: font.h Source File

  • gfx
font.h
Go to the documentation of this file.
00001
00040 #ifndef GFX_FONT_H
00041 #define GFX_FONT_H
00042
00043 #include <cfg/compiler.h>  /* uint8_t */
00044 #include <cpu/pgm.h>     /* PROGMEM */
00045
00046 typedef struct Font
00047 {
00054     const pgm_uint8_t *glyph;
00055
00056     uint8_t width;
00057     uint8_t height;
00059     uint8_t first;
00060     uint8_t last;
00063     const pgm_uint16_t *offset;
00064     const pgm_uint8_t  *widths;
00065
00066 } Font;
00067
00068
00070 #define FONT_HAS_GLYPH(font, c) ((c) >= (font)->first && (c) <= (font)->last)
00071
00072
00074 #define default_font font_luBS14
00075 extern const struct Font default_font;
00076
00077 #endif /* GFX_FONT_H */


BeRTOS: font_10x20.c Source File

  • gfx
font_10x20.c
00001 /* Generated by convbdf on Fri Feb 10 01:05:15 CET 2006. */
00002 #include "font.h"
00003
00004 /* Font information:
00005
00006    name: -Misc-Fixed-Medium-R-Normal--20-200-75-75-C-100-ISO8859-1
00007    pixel size: 20
00008    ascent: 16
00009    descent: 4
00010 */
00011
00012 /* Font character bitmap data. */
00013 static const PROGMEM uint8_t font_10x20_glyphs[] = {
00014
00015 /* Character (0x00):
00016    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00017    +----------------+
00018    |                |
00019    |                |
00020    |                |
00021    | ***  ***       |
00022    | *      *       |
00023    | *      *       |
00024    |                |
00025    |                |
00026    | *      *       |
00027    | *      *       |
00028    | *      *       |
00029    |                |
00030    |                |
00031    | *      *       |
00032    | *      *       |
00033    | ***  ***       |
00034    |                |
00035    |                |
00036    |                |
00037    |                |
00038    +----------------+ */
00039 0x0000, 0x0000,
00040 0x0000, 0x0000,
00041 0x0000, 0x0000,
00042 0x0073, 0x0080,
00043 0x0040, 0x0080,
00044 0x0040, 0x0080,
00045 0x0000, 0x0000,
00046 0x0000, 0x0000,
00047 0x0040, 0x0080,
00048 0x0040, 0x0080,
00049 0x0040, 0x0080,
00050 0x0000, 0x0000,
00051 0x0000, 0x0000,
00052 0x0040, 0x0080,
00053 0x0040, 0x0080,
00054 0x0073, 0x0080,
00055 0x0000, 0x0000,
00056 0x0000, 0x0000,
00057 0x0000, 0x0000,
00058 0x0000, 0x0000,
00059
00060 /* Character (0x01):
00061    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00062    +----------------+
00063    |                |
00064    |                |
00065    |                |
00066    |                |
00067    |                |
00068    |                |
00069    |    **          |
00070    |   ****         |
00071    |  ******        |
00072    | ********       |
00073    | ********       |
00074    |  ******        |
00075    |   ****         |
00076    |    **          |
00077    |                |
00078    |                |
00079    |                |
00080    |                |
00081    |                |
00082    |                |
00083    +----------------+ */
00084 0x0000, 0x0000,
00085 0x0000, 0x0000,
00086 0x0000, 0x0000,
00087 0x0000, 0x0000,
00088 0x0000, 0x0000,
00089 0x0000, 0x0000,
00090 0x000c, 0x0000,
00091 0x001e, 0x0000,
00092 0x003f, 0x0000,
00093 0x007f, 0x0080,
00094 0x007f, 0x0080,
00095 0x003f, 0x0000,
00096 0x001e, 0x0000,
00097 0x000c, 0x0000,
00098 0x0000, 0x0000,
00099 0x0000, 0x0000,
00100 0x0000, 0x0000,
00101 0x0000, 0x0000,
00102 0x0000, 0x0000,
00103 0x0000, 0x0000,
00104
00105 /* Character (0x02):
00106    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00107    +----------------+
00108    | * * * * *      |
00109    |* * * * *       |
00110    | * * * * *      |
00111    |* * * * *       |
00112    | * * * * *      |
00113    |* * * * *       |
00114    | * * * * *      |
00115    |* * * * *       |
00116    | * * * * *      |
00117    |* * * * *       |
00118    | * * * * *      |
00119    |* * * * *       |
00120    | * * * * *      |
00121    |* * * * *       |
00122    | * * * * *      |
00123    |* * * * *       |
00124    | * * * * *      |
00125    |* * * * *       |
00126    | * * * * *      |
00127    |* * * * *       |
00128    +----------------+ */
00129 0x0055, 0x0040,
00130 0x00aa, 0x0080,
00131 0x0055, 0x0040,
00132 0x00aa, 0x0080,
00133 0x0055, 0x0040,
00134 0x00aa, 0x0080,
00135 0x0055, 0x0040,
00136 0x00aa, 0x0080,
00137 0x0055, 0x0040,
00138 0x00aa, 0x0080,
00139 0x0055, 0x0040,
00140 0x00aa, 0x0080,
00141 0x0055, 0x0040,
00142 0x00aa, 0x0080,
00143 0x0055, 0x0040,
00144 0x00aa, 0x0080,
00145 0x0055, 0x0040,
00146 0x00aa, 0x0080,
00147 0x0055, 0x0040,
00148 0x00aa, 0x0080,
00149
00150 /* Character (0x03):
00151    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00152    +----------------+
00153    |                |
00154    |                |
00155    | **  **         |
00156    | **  **         |
00157    | **  **         |
00158    | ******         |
00159    | **  **         |
00160    | **  **         |
00161    | **  **         |
00162    |                |
00163    |   ******       |
00164    |     **         |
00165    |     **         |
00166    |     **         |
00167    |     **         |
00168    |     **         |
00169    |                |
00170    |                |
00171    |                |
00172    |                |
00173    +----------------+ */
00174 0x0000, 0x0000,
00175 0x0000, 0x0000,
00176 0x0066, 0x0000,
00177 0x0066, 0x0000,
00178 0x0066, 0x0000,
00179 0x007e, 0x0000,
00180 0x0066, 0x0000,
00181 0x0066, 0x0000,
00182 0x0066, 0x0000,
00183 0x0000, 0x0000,
00184 0x001f, 0x0080,
00185 0x0006, 0x0000,
00186 0x0006, 0x0000,
00187 0x0006, 0x0000,
00188 0x0006, 0x0000,
00189 0x0006, 0x0000,
00190 0x0000, 0x0000,
00191 0x0000, 0x0000,
00192 0x0000, 0x0000,
00193 0x0000, 0x0000,
00194
00195 /* Character (0x04):
00196    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00197    +----------------+
00198    |                |
00199    |                |
00200    | *****          |
00201    | **             |
00202    | **             |
00203    | ****           |
00204    | **             |
00205    | **             |
00206    | **             |
00207    |    *****       |
00208    |    **          |
00209    |    **          |
00210    |    ****        |
00211    |    **          |
00212    |    **          |
00213    |    **          |
00214    |                |
00215    |                |
00216    |                |
00217    |                |
00218    +----------------+ */
00219 0x0000, 0x0000,
00220 0x0000, 0x0000,
00221 0x007c, 0x0000,
00222 0x0060, 0x0000,
00223 0x0060, 0x0000,
00224 0x0078, 0x0000,
00225 0x0060, 0x0000,
00226 0x0060, 0x0000,
00227 0x0060, 0x0000,
00228 0x000f, 0x0080,
00229 0x000c, 0x0000,
00230 0x000c, 0x0000,
00231 0x000f, 0x0000,
00232 0x000c, 0x0000,
00233 0x000c, 0x0000,
00234 0x000c, 0x0000,
00235 0x0000, 0x0000,
00236 0x0000, 0x0000,
00237 0x0000, 0x0000,
00238 0x0000, 0x0000,
00239
00240 /* Character (0x05):
00241    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00242    +----------------+
00243    |                |
00244    |                |
00245    |  ****          |
00246    | **  **         |
00247    | **             |
00248    | **             |
00249    | **  **         |
00250    |  ****          |
00251    |                |
00252    |   *****        |
00253    |   **  **       |
00254    |   **  **       |
00255    |   *****        |
00256    |   ****         |
00257    |   ** **        |
00258    |   **  **       |
00259    |                |
00260    |                |
00261    |                |
00262    |                |
00263    +----------------+ */
00264 0x0000, 0x0000,
00265 0x0000, 0x0000,
00266 0x003c, 0x0000,
00267 0x0066, 0x0000,
00268 0x0060, 0x0000,
00269 0x0060, 0x0000,
00270 0x0066, 0x0000,
00271 0x003c, 0x0000,
00272 0x0000, 0x0000,
00273 0x001f, 0x0000,
00274 0x0019, 0x0080,
00275 0x0019, 0x0080,
00276 0x001f, 0x0000,
00277 0x001e, 0x0000,
00278 0x001b, 0x0000,
00279 0x0019, 0x0080,
00280 0x0000, 0x0000,
00281 0x0000, 0x0000,
00282 0x0000, 0x0000,
00283 0x0000, 0x0000,
00284
00285 /* Character (0x06):
00286    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00287    +----------------+
00288    |                |
00289    |                |
00290    |  **            |
00291    |  **            |
00292    |  **            |
00293    |  **            |
00294    |  **            |
00295    |  *****         |
00296    |                |
00297    |    *****       |
00298    |    **          |
00299    |    **          |
00300    |    ****        |
00301    |    **          |
00302    |    **          |
00303    |    **          |
00304    |                |
00305    |                |
00306    |                |
00307    |                |
00308    +----------------+ */
00309 0x0000, 0x0000,
00310 0x0000, 0x0000,
00311 0x0030, 0x0000,
00312 0x0030, 0x0000,
00313 0x0030, 0x0000,
00314 0x0030, 0x0000,
00315 0x0030, 0x0000,
00316 0x003e, 0x0000,
00317 0x0000, 0x0000,
00318 0x000f, 0x0080,
00319 0x000c, 0x0000,
00320 0x000c, 0x0000,
00321 0x000f, 0x0000,
00322 0x000c, 0x0000,
00323 0x000c, 0x0000,
00324 0x000c, 0x0000,
00325 0x0000, 0x0000,
00326 0x0000, 0x0000,
00327 0x0000, 0x0000,
00328 0x0000, 0x0000,
00329
00330 /* Character (0x07):
00331    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00332    +----------------+
00333    |                |
00334    |                |
00335    |                |
00336    |    **          |
00337    |   ****         |
00338    |  **  **        |
00339    |  **  **        |
00340    |   ****         |
00341    |    **          |
00342    |                |
00343    |                |
00344    |                |
00345    |                |
00346    |                |
00347    |                |
00348    |                |
00349    |                |
00350    |                |
00351    |                |
00352    |                |
00353    +----------------+ */
00354 0x0000, 0x0000,
00355 0x0000, 0x0000,
00356 0x0000, 0x0000,
00357 0x000c, 0x0000,
00358 0x001e, 0x0000,
00359 0x0033, 0x0000,
00360 0x0033, 0x0000,
00361 0x001e, 0x0000,
00362 0x000c, 0x0000,
00363 0x0000, 0x0000,
00364 0x0000, 0x0000,
00365 0x0000, 0x0000,
00366 0x0000, 0x0000,
00367 0x0000, 0x0000,
00368 0x0000, 0x0000,
00369 0x0000, 0x0000,
00370 0x0000, 0x0000,
00371 0x0000, 0x0000,
00372 0x0000, 0x0000,
00373 0x0000, 0x0000,
00374
00375 /* Character (0x08):
00376    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00377    +----------------+
00378    |                |
00379    |                |
00380    |                |
00381    |                |
00382    |                |
00383    |                |
00384    |                |
00385    |    **          |
00386    |    **          |
00387    | ********       |
00388    |    **          |
00389    |    **          |
00390    |                |
00391    | ********       |
00392    |                |
00393    |                |
00394    |                |
00395    |                |
00396    |                |
00397    |                |
00398    +----------------+ */
00399 0x0000, 0x0000,
00400 0x0000, 0x0000,
00401 0x0000, 0x0000,
00402 0x0000, 0x0000,
00403 0x0000, 0x0000,
00404 0x0000, 0x0000,
00405 0x0000, 0x0000,
00406 0x000c, 0x0000,
00407 0x000c, 0x0000,
00408 0x007f, 0x0080,
00409 0x000c, 0x0000,
00410 0x000c, 0x0000,
00411 0x0000, 0x0000,
00412 0x007f, 0x0080,
00413 0x0000, 0x0000,
00414 0x0000, 0x0000,
00415 0x0000, 0x0000,
00416 0x0000, 0x0000,
00417 0x0000, 0x0000,
00418 0x0000, 0x0000,
00419
00420 /* Character (0x09):
00421    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00422    +----------------+
00423    |                |
00424    |                |
00425    | **  **         |
00426    | *** **         |
00427    | ******         |
00428    | ******         |
00429    | ** ***         |
00430    | **  **         |
00431    |                |
00432    |    **          |
00433    |    **          |
00434    |    **          |
00435    |    **          |
00436    |    **          |
00437    |    **          |
00438    |    *****       |
00439    |                |
00440    |                |
00441    |                |
00442    |                |
00443    +----------------+ */
00444 0x0000, 0x0000,
00445 0x0000, 0x0000,
00446 0x0066, 0x0000,
00447 0x0076, 0x0000,
00448 0x007e, 0x0000,
00449 0x007e, 0x0000,
00450 0x006e, 0x0000,
00451 0x0066, 0x0000,
00452 0x0000, 0x0000,
00453 0x000c, 0x0000,
00454 0x000c, 0x0000,
00455 0x000c, 0x0000,
00456 0x000c, 0x0000,
00457 0x000c, 0x0000,
00458 0x000c, 0x0000,
00459 0x000f, 0x0080,
00460 0x0000, 0x0000,
00461 0x0000, 0x0000,
00462 0x0000, 0x0000,
00463 0x0000, 0x0000,
00464
00465 /* Character (0x0a):
00466    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00467    +----------------+
00468    |                |
00469    |                |
00470    | **  **         |
00471    | **  **         |
00472    | **  **         |
00473    |  ****          |
00474    |  ****          |
00475    |   **           |
00476    |   **           |
00477    |                |
00478    |   ******       |
00479    |     **         |
00480    |     **         |
00481    |     **         |
00482    |     **         |
00483    |     **         |
00484    |                |
00485    |                |
00486    |                |
00487    |                |
00488    +----------------+ */
00489 0x0000, 0x0000,
00490 0x0000, 0x0000,
00491 0x0066, 0x0000,
00492 0x0066, 0x0000,
00493 0x0066, 0x0000,
00494 0x003c, 0x0000,
00495 0x003c, 0x0000,
00496 0x0018, 0x0000,
00497 0x0018, 0x0000,
00498 0x0000, 0x0000,
00499 0x001f, 0x0080,
00500 0x0006, 0x0000,
00501 0x0006, 0x0000,
00502 0x0006, 0x0000,
00503 0x0006, 0x0000,
00504 0x0006, 0x0000,
00505 0x0000, 0x0000,
00506 0x0000, 0x0000,
00507 0x0000, 0x0000,
00508 0x0000, 0x0000,
00509
00510 /* Character (0x0b):
00511    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00512    +----------------+
00513    |    *           |
00514    |    *           |
00515    |    *           |
00516    |    *           |
00517    |    *           |
00518    |    *           |
00519    |    *           |
00520    |    *           |
00521    |    *           |
00522    |*****           |
00523    |                |
00524    |                |
00525    |                |
00526    |                |
00527    |                |
00528    |                |
00529    |                |
00530    |                |
00531    |                |
00532    |                |
00533    +----------------+ */
00534 0x0008, 0x0000,
00535 0x0008, 0x0000,
00536 0x0008, 0x0000,
00537 0x0008, 0x0000,
00538 0x0008, 0x0000,
00539 0x0008, 0x0000,
00540 0x0008, 0x0000,
00541 0x0008, 0x0000,
00542 0x0008, 0x0000,
00543 0x00f8, 0x0000,
00544 0x0000, 0x0000,
00545 0x0000, 0x0000,
00546 0x0000, 0x0000,
00547 0x0000, 0x0000,
00548 0x0000, 0x0000,
00549 0x0000, 0x0000,
00550 0x0000, 0x0000,
00551 0x0000, 0x0000,
00552 0x0000, 0x0000,
00553 0x0000, 0x0000,
00554
00555 /* Character (0x0c):
00556    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00557    +----------------+
00558    |                |
00559    |                |
00560    |                |
00561    |                |
00562    |                |
00563    |                |
00564    |                |
00565    |                |
00566    |                |
00567    |*****           |
00568    |    *           |
00569    |    *           |
00570    |    *           |
00571    |    *           |
00572    |    *           |
00573    |    *           |
00574    |    *           |
00575    |    *           |
00576    |    *           |
00577    |    *           |
00578    +----------------+ */
00579 0x0000, 0x0000,
00580 0x0000, 0x0000,
00581 0x0000, 0x0000,
00582 0x0000, 0x0000,
00583 0x0000, 0x0000,
00584 0x0000, 0x0000,
00585 0x0000, 0x0000,
00586 0x0000, 0x0000,
00587 0x0000, 0x0000,
00588 0x00f8, 0x0000,
00589 0x0008, 0x0000,
00590 0x0008, 0x0000,
00591 0x0008, 0x0000,
00592 0x0008, 0x0000,
00593 0x0008, 0x0000,
00594 0x0008, 0x0000,
00595 0x0008, 0x0000,
00596 0x0008, 0x0000,
00597 0x0008, 0x0000,
00598 0x0008, 0x0000,
00599
00600 /* Character (0x0d):
00601    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00602    +----------------+
00603    |                |
00604    |                |
00605    |                |
00606    |                |
00607    |                |
00608    |                |
00609    |                |
00610    |                |
00611    |                |
00612    |    ******      |
00613    |    *           |
00614    |    *           |
00615    |    *           |
00616    |    *           |
00617    |    *           |
00618    |    *           |
00619    |    *           |
00620    |    *           |
00621    |    *           |
00622    |    *           |
00623    +----------------+ */
00624 0x0000, 0x0000,
00625 0x0000, 0x0000,
00626 0x0000, 0x0000,
00627 0x0000, 0x0000,
00628 0x0000, 0x0000,
00629 0x0000, 0x0000,
00630 0x0000, 0x0000,
00631 0x0000, 0x0000,
00632 0x0000, 0x0000,
00633 0x000f, 0x00c0,
00634 0x0008, 0x0000,
00635 0x0008, 0x0000,
00636 0x0008, 0x0000,
00637 0x0008, 0x0000,
00638 0x0008, 0x0000,
00639 0x0008, 0x0000,
00640 0x0008, 0x0000,
00641 0x0008, 0x0000,
00642 0x0008, 0x0000,
00643 0x0008, 0x0000,
00644
00645 /* Character (0x0e):
00646    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00647    +----------------+
00648    |    *           |
00649    |    *           |
00650    |    *           |
00651    |    *           |
00652    |    *           |
00653    |    *           |
00654    |    *           |
00655    |    *           |
00656    |    *           |
00657    |    ******      |
00658    |                |
00659    |                |
00660    |                |
00661    |                |
00662    |                |
00663    |                |
00664    |                |
00665    |                |
00666    |                |
00667    |                |
00668    +----------------+ */
00669 0x0008, 0x0000,
00670 0x0008, 0x0000,
00671 0x0008, 0x0000,
00672 0x0008, 0x0000,
00673 0x0008, 0x0000,
00674 0x0008, 0x0000,
00675 0x0008, 0x0000,
00676 0x0008, 0x0000,
00677 0x0008, 0x0000,
00678 0x000f, 0x00c0,
00679 0x0000, 0x0000,
00680 0x0000, 0x0000,
00681 0x0000, 0x0000,
00682 0x0000, 0x0000,
00683 0x0000, 0x0000,
00684 0x0000, 0x0000,
00685 0x0000, 0x0000,
00686 0x0000, 0x0000,
00687 0x0000, 0x0000,
00688 0x0000, 0x0000,
00689
00690 /* Character (0x0f):
00691    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00692    +----------------+
00693    |    *           |
00694    |    *           |
00695    |    *           |
00696    |    *           |
00697    |    *           |
00698    |    *           |
00699    |    *           |
00700    |    *           |
00701    |    *           |
00702    |**********      |
00703    |    *           |
00704    |    *           |
00705    |    *           |
00706    |    *           |
00707    |    *           |
00708    |    *           |
00709    |    *           |
00710    |    *           |
00711    |    *           |
00712    |    *           |
00713    +----------------+ */
00714 0x0008, 0x0000,
00715 0x0008, 0x0000,
00716 0x0008, 0x0000,
00717 0x0008, 0x0000,
00718 0x0008, 0x0000,
00719 0x0008, 0x0000,
00720 0x0008, 0x0000,
00721 0x0008, 0x0000,
00722 0x0008, 0x0000,
00723 0x00ff, 0x00c0,
00724 0x0008, 0x0000,
00725 0x0008, 0x0000,
00726 0x0008, 0x0000,
00727 0x0008, 0x0000,
00728 0x0008, 0x0000,
00729 0x0008, 0x0000,
00730 0x0008, 0x0000,
00731 0x0008, 0x0000,
00732 0x0008, 0x0000,
00733 0x0008, 0x0000,
00734
00735 /* Character (0x10):
00736    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00737    +----------------+
00738    |**********      |
00739    |                |
00740    |                |
00741    |                |
00742    |                |
00743    |                |
00744    |                |
00745    |                |
00746    |                |
00747    |                |
00748    |                |
00749    |                |
00750    |                |
00751    |                |
00752    |                |
00753    |                |
00754    |                |
00755    |                |
00756    |                |
00757    |                |
00758    +----------------+ */
00759 0x00ff, 0x00c0,
00760 0x0000, 0x0000,
00761 0x0000, 0x0000,
00762 0x0000, 0x0000,
00763 0x0000, 0x0000,
00764 0x0000, 0x0000,
00765 0x0000, 0x0000,
00766 0x0000, 0x0000,
00767 0x0000, 0x0000,
00768 0x0000, 0x0000,
00769 0x0000, 0x0000,
00770 0x0000, 0x0000,
00771 0x0000, 0x0000,
00772 0x0000, 0x0000,
00773 0x0000, 0x0000,
00774 0x0000, 0x0000,
00775 0x0000, 0x0000,
00776 0x0000, 0x0000,
00777 0x0000, 0x0000,
00778 0x0000, 0x0000,
00779
00780 /* Character (0x11):
00781    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00782    +----------------+
00783    |                |
00784    |                |
00785    |                |
00786    |                |
00787    |                |
00788    |**********      |
00789    |                |
00790    |                |
00791    |                |
00792    |                |
00793    |                |
00794    |                |
00795    |                |
00796    |                |
00797    |                |
00798    |                |
00799    |                |
00800    |                |
00801    |                |
00802    |                |
00803    +----------------+ */
00804 0x0000, 0x0000,
00805 0x0000, 0x0000,
00806 0x0000, 0x0000,
00807 0x0000, 0x0000,
00808 0x0000, 0x0000,
00809 0x00ff, 0x00c0,
00810 0x0000, 0x0000,
00811 0x0000, 0x0000,
00812 0x0000, 0x0000,
00813 0x0000, 0x0000,
00814 0x0000, 0x0000,
00815 0x0000, 0x0000,
00816 0x0000, 0x0000,
00817 0x0000, 0x0000,
00818 0x0000, 0x0000,
00819 0x0000, 0x0000,
00820 0x0000, 0x0000,
00821 0x0000, 0x0000,
00822 0x0000, 0x0000,
00823 0x0000, 0x0000,
00824
00825 /* Character (0x12):
00826    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00827    +----------------+
00828    |                |
00829    |                |
00830    |                |
00831    |                |
00832    |                |
00833    |                |
00834    |                |
00835    |                |
00836    |                |
00837    |**********      |
00838    |                |
00839    |                |
00840    |                |
00841    |                |
00842    |                |
00843    |                |
00844    |                |
00845    |                |
00846    |                |
00847    |                |
00848    +----------------+ */
00849 0x0000, 0x0000,
00850 0x0000, 0x0000,
00851 0x0000, 0x0000,
00852 0x0000, 0x0000,
00853 0x0000, 0x0000,
00854 0x0000, 0x0000,
00855 0x0000, 0x0000,
00856 0x0000, 0x0000,
00857 0x0000, 0x0000,
00858 0x00ff, 0x00c0,
00859 0x0000, 0x0000,
00860 0x0000, 0x0000,
00861 0x0000, 0x0000,
00862 0x0000, 0x0000,
00863 0x0000, 0x0000,
00864 0x0000, 0x0000,
00865 0x0000, 0x0000,
00866 0x0000, 0x0000,
00867 0x0000, 0x0000,
00868 0x0000, 0x0000,
00869
00870 /* Character (0x13):
00871    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00872    +----------------+
00873    |                |
00874    |                |
00875    |                |
00876    |                |
00877    |                |
00878    |                |
00879    |                |
00880    |                |
00881    |                |
00882    |                |
00883    |                |
00884    |                |
00885    |                |
00886    |                |
00887    |**********      |
00888    |                |
00889    |                |
00890    |                |
00891    |                |
00892    |                |
00893    +----------------+ */
00894 0x0000, 0x0000,
00895 0x0000, 0x0000,
00896 0x0000, 0x0000,
00897 0x0000, 0x0000,
00898 0x0000, 0x0000,
00899 0x0000, 0x0000,
00900 0x0000, 0x0000,
00901 0x0000, 0x0000,
00902 0x0000, 0x0000,
00903 0x0000, 0x0000,
00904 0x0000, 0x0000,
00905 0x0000, 0x0000,
00906 0x0000, 0x0000,
00907 0x0000, 0x0000,
00908 0x00ff, 0x00c0,
00909 0x0000, 0x0000,
00910 0x0000, 0x0000,
00911 0x0000, 0x0000,
00912 0x0000, 0x0000,
00913 0x0000, 0x0000,
00914
00915 /* Character (0x14):
00916    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00917    +----------------+
00918    |                |
00919    |                |
00920    |                |
00921    |                |
00922    |                |
00923    |                |
00924    |                |
00925    |                |
00926    |                |
00927    |                |
00928    |                |
00929    |                |
00930    |                |
00931    |                |
00932    |                |
00933    |                |
00934    |                |
00935    |                |
00936    |                |
00937    |**********      |
00938    +----------------+ */
00939 0x0000, 0x0000,
00940 0x0000, 0x0000,
00941 0x0000, 0x0000,
00942 0x0000, 0x0000,
00943 0x0000, 0x0000,
00944 0x0000, 0x0000,
00945 0x0000, 0x0000,
00946 0x0000, 0x0000,
00947 0x0000, 0x0000,
00948 0x0000, 0x0000,
00949 0x0000, 0x0000,
00950 0x0000, 0x0000,
00951 0x0000, 0x0000,
00952 0x0000, 0x0000,
00953 0x0000, 0x0000,
00954 0x0000, 0x0000,
00955 0x0000, 0x0000,
00956 0x0000, 0x0000,
00957 0x0000, 0x0000,
00958 0x00ff, 0x00c0,
00959
00960 /* Character (0x15):
00961    bbw=10, bbh=20, bbx=0, bby=-4, width=10
00962    +----------------+
00963    |    *           |
00964    |    *           |
00965    |    *           |
00966    |    *           |
00967    |    *           |
00968    |    *           |
00969    |    *           |
00970    |    *           |
00971    |    *           |
00972    |    ******      |
00973    |    *           |
00974    |    *           |
00975    |    *           |
00976    |    *           |
00977    |    *           |
00978    |    *           |
00979    |    *           |
00980    |    *           |
00981    |    *           |
00982    |    *           |
00983    +----------------+ */
00984 0x0008, 0x0000,
00985 0x0008, 0x0000,
00986 0x0008, 0x0000,
00987 0x0008, 0x0000,
00988 0x0008, 0x0000,
00989 0x0008, 0x0000,
00990 0x0008, 0x0000,
00991 0x0008, 0x0000,
00992 0x0008, 0x0000,
00993 0x000f, 0x00c0,
00994 0x0008, 0x0000,
00995 0x0008, 0x0000,
00996 0x0008, 0x0000,
00997 0x0008, 0x0000,
00998 0x0008, 0x0000,
00999 0x0008, 0x0000,
01000 0x0008, 0x0000,
01001 0x0008, 0x0000,
01002 0x0008, 0x0000,
01003 0x0008, 0x0000,
01004
01005 /* Character (0x16):
01006    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01007    +----------------+
01008    |    *           |
01009    |    *           |
01010    |    *           |
01011    |    *           |
01012    |    *           |
01013    |    *           |
01014    |    *           |
01015    |    *           |
01016    |    *           |
01017    |*****           |
01018    |    *           |
01019    |    *           |
01020    |    *           |
01021    |    *           |
01022    |    *           |
01023    |    *           |
01024    |    *           |
01025    |    *           |
01026    |    *           |
01027    |    *           |
01028    +----------------+ */
01029 0x0008, 0x0000,
01030 0x0008, 0x0000,
01031 0x0008, 0x0000,
01032 0x0008, 0x0000,
01033 0x0008, 0x0000,
01034 0x0008, 0x0000,
01035 0x0008, 0x0000,
01036 0x0008, 0x0000,
01037 0x0008, 0x0000,
01038 0x00f8, 0x0000,
01039 0x0008, 0x0000,
01040 0x0008, 0x0000,
01041 0x0008, 0x0000,
01042 0x0008, 0x0000,
01043 0x0008, 0x0000,
01044 0x0008, 0x0000,
01045 0x0008, 0x0000,
01046 0x0008, 0x0000,
01047 0x0008, 0x0000,
01048 0x0008, 0x0000,
01049
01050 /* Character (0x17):
01051    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01052    +----------------+
01053    |    *           |
01054    |    *           |
01055    |    *           |
01056    |    *           |
01057    |    *           |
01058    |    *           |
01059    |    *           |
01060    |    *           |
01061    |    *           |
01062    |**********      |
01063    |                |
01064    |                |
01065    |                |
01066    |                |
01067    |                |
01068    |                |
01069    |                |
01070    |                |
01071    |                |
01072    |                |
01073    +----------------+ */
01074 0x0008, 0x0000,
01075 0x0008, 0x0000,
01076 0x0008, 0x0000,
01077 0x0008, 0x0000,
01078 0x0008, 0x0000,
01079 0x0008, 0x0000,
01080 0x0008, 0x0000,
01081 0x0008, 0x0000,
01082 0x0008, 0x0000,
01083 0x00ff, 0x00c0,
01084 0x0000, 0x0000,
01085 0x0000, 0x0000,
01086 0x0000, 0x0000,
01087 0x0000, 0x0000,
01088 0x0000, 0x0000,
01089 0x0000, 0x0000,
01090 0x0000, 0x0000,
01091 0x0000, 0x0000,
01092 0x0000, 0x0000,
01093 0x0000, 0x0000,
01094
01095 /* Character (0x18):
01096    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01097    +----------------+
01098    |                |
01099    |                |
01100    |                |
01101    |                |
01102    |                |
01103    |                |
01104    |                |
01105    |                |
01106    |                |
01107    |**********      |
01108    |    *           |
01109    |    *           |
01110    |    *           |
01111    |    *           |
01112    |    *           |
01113    |    *           |
01114    |    *           |
01115    |    *           |
01116    |    *           |
01117    |    *           |
01118    +----------------+ */
01119 0x0000, 0x0000,
01120 0x0000, 0x0000,
01121 0x0000, 0x0000,
01122 0x0000, 0x0000,
01123 0x0000, 0x0000,
01124 0x0000, 0x0000,
01125 0x0000, 0x0000,
01126 0x0000, 0x0000,
01127 0x0000, 0x0000,
01128 0x00ff, 0x00c0,
01129 0x0008, 0x0000,
01130 0x0008, 0x0000,
01131 0x0008, 0x0000,
01132 0x0008, 0x0000,
01133 0x0008, 0x0000,
01134 0x0008, 0x0000,
01135 0x0008, 0x0000,
01136 0x0008, 0x0000,
01137 0x0008, 0x0000,
01138 0x0008, 0x0000,
01139
01140 /* Character (0x19):
01141    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01142    +----------------+
01143    |    *           |
01144    |    *           |
01145    |    *           |
01146    |    *           |
01147    |    *           |
01148    |    *           |
01149    |    *           |
01150    |    *           |
01151    |    *           |
01152    |    *           |
01153    |    *           |
01154    |    *           |
01155    |    *           |
01156    |    *           |
01157    |    *           |
01158    |    *           |
01159    |    *           |
01160    |    *           |
01161    |    *           |
01162    |    *           |
01163    +----------------+ */
01164 0x0008, 0x0000,
01165 0x0008, 0x0000,
01166 0x0008, 0x0000,
01167 0x0008, 0x0000,
01168 0x0008, 0x0000,
01169 0x0008, 0x0000,
01170 0x0008, 0x0000,
01171 0x0008, 0x0000,
01172 0x0008, 0x0000,
01173 0x0008, 0x0000,
01174 0x0008, 0x0000,
01175 0x0008, 0x0000,
01176 0x0008, 0x0000,
01177 0x0008, 0x0000,
01178 0x0008, 0x0000,
01179 0x0008, 0x0000,
01180 0x0008, 0x0000,
01181 0x0008, 0x0000,
01182 0x0008, 0x0000,
01183 0x0008, 0x0000,
01184
01185 /* Character (0x1a):
01186    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01187    +----------------+
01188    |                |
01189    |                |
01190    |                |
01191    |                |
01192    |                |
01193    |                |
01194    |      ***       |
01195    |    ***         |
01196    |  ***           |
01197    |***             |
01198    |  ***           |
01199    |    ***         |
01200    |      ***       |
01201    |                |
01202    |                |
01203    |*********       |
01204    |                |
01205    |                |
01206    |                |
01207    |                |
01208    +----------------+ */
01209 0x0000, 0x0000,
01210 0x0000, 0x0000,
01211 0x0000, 0x0000,
01212 0x0000, 0x0000,
01213 0x0000, 0x0000,
01214 0x0000, 0x0000,
01215 0x0003, 0x0080,
01216 0x000e, 0x0000,
01217 0x0038, 0x0000,
01218 0x00e0, 0x0000,
01219 0x0038, 0x0000,
01220 0x000e, 0x0000,
01221 0x0003, 0x0080,
01222 0x0000, 0x0000,
01223 0x0000, 0x0000,
01224 0x00ff, 0x0080,
01225 0x0000, 0x0000,
01226 0x0000, 0x0000,
01227 0x0000, 0x0000,
01228 0x0000, 0x0000,
01229
01230 /* Character (0x1b):
01231    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01232    +----------------+
01233    |                |
01234    |                |
01235    |                |
01236    |                |
01237    |                |
01238    |                |
01239    |***             |
01240    |  ***           |
01241    |    ***         |
01242    |      ***       |
01243    |    ***         |
01244    |  ***           |
01245    |***             |
01246    |                |
01247    |                |
01248    |*********       |
01249    |                |
01250    |                |
01251    |                |
01252    |                |
01253    +----------------+ */
01254 0x0000, 0x0000,
01255 0x0000, 0x0000,
01256 0x0000, 0x0000,
01257 0x0000, 0x0000,
01258 0x0000, 0x0000,
01259 0x0000, 0x0000,
01260 0x00e0, 0x0000,
01261 0x0038, 0x0000,
01262 0x000e, 0x0000,
01263 0x0003, 0x0080,
01264 0x000e, 0x0000,
01265 0x0038, 0x0000,
01266 0x00e0, 0x0000,
01267 0x0000, 0x0000,
01268 0x0000, 0x0000,
01269 0x00ff, 0x0080,
01270 0x0000, 0x0000,
01271 0x0000, 0x0000,
01272 0x0000, 0x0000,
01273 0x0000, 0x0000,
01274
01275 /* Character (0x1c):
01276    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01277    +----------------+
01278    |                |
01279    |                |
01280    |                |
01281    |                |
01282    |                |
01283    |                |
01284    |                |
01285    |                |
01286    | ********       |
01287    |  **  **        |
01288    |  **  **        |
01289    |  **  **        |
01290    |  **  **        |
01291    |  **  **        |
01292    |  **  **        |
01293    |  **  **        |
01294    |                |
01295    |                |
01296    |                |
01297    |                |
01298    +----------------+ */
01299 0x0000, 0x0000,
01300 0x0000, 0x0000,
01301 0x0000, 0x0000,
01302 0x0000, 0x0000,
01303 0x0000, 0x0000,
01304 0x0000, 0x0000,
01305 0x0000, 0x0000,
01306 0x0000, 0x0000,
01307 0x007f, 0x0080,
01308 0x0033, 0x0000,
01309 0x0033, 0x0000,
01310 0x0033, 0x0000,
01311 0x0033, 0x0000,
01312 0x0033, 0x0000,
01313 0x0033, 0x0000,
01314 0x0033, 0x0000,
01315 0x0000, 0x0000,
01316 0x0000, 0x0000,
01317 0x0000, 0x0000,
01318 0x0000, 0x0000,
01319
01320 /* Character (0x1d):
01321    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01322    +----------------+
01323    |                |
01324    |                |
01325    |                |
01326    |                |
01327    |                |
01328    |                |
01329    |      **        |
01330    |      **        |
01331    |     **         |
01332    | ********       |
01333    |    **          |
01334    |    **          |
01335    | ********       |
01336    |   **           |
01337    |  **            |
01338    |  **            |
01339    |                |
01340    |                |
01341    |                |
01342    |                |
01343    +----------------+ */
01344 0x0000, 0x0000,
01345 0x0000, 0x0000,
01346 0x0000, 0x0000,
01347 0x0000, 0x0000,
01348 0x0000, 0x0000,
01349 0x0000, 0x0000,
01350 0x0003, 0x0000,
01351 0x0003, 0x0000,
01352 0x0006, 0x0000,
01353 0x007f, 0x0080,
01354 0x000c, 0x0000,
01355 0x000c, 0x0000,
01356 0x007f, 0x0080,
01357 0x0018, 0x0000,
01358 0x0030, 0x0000,
01359 0x0030, 0x0000,
01360 0x0000, 0x0000,
01361 0x0000, 0x0000,
01362 0x0000, 0x0000,
01363 0x0000, 0x0000,
01364
01365 /* Character (0x1e):
01366    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01367    +----------------+
01368    |                |
01369    |                |
01370    |                |
01371    |                |
01372    |    ****        |
01373    |   **  **       |
01374    |   **  **       |
01375    |   **           |
01376    |   **           |
01377    | ******         |
01378    |   **           |
01379    |   **           |
01380    |   **           |
01381    | *****          |
01382    | * * ** **      |
01383    | ***  ***       |
01384    |                |
01385    |                |
01386    |                |
01387    |                |
01388    +----------------+ */
01389 0x0000, 0x0000,
01390 0x0000, 0x0000,
01391 0x0000, 0x0000,
01392 0x0000, 0x0000,
01393 0x000f, 0x0000,
01394 0x0019, 0x0080,
01395 0x0019, 0x0080,
01396 0x0018, 0x0000,
01397 0x0018, 0x0000,
01398 0x007e, 0x0000,
01399 0x0018, 0x0000,
01400 0x0018, 0x0000,
01401 0x0018, 0x0000,
01402 0x007c, 0x0000,
01403 0x0056, 0x00c0,
01404 0x0073, 0x0080,
01405 0x0000, 0x0000,
01406 0x0000, 0x0000,
01407 0x0000, 0x0000,
01408 0x0000, 0x0000,
01409
01410 /* Character (0x1f):
01411    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01412    +----------------+
01413    |                |
01414    |                |
01415    |                |
01416    |                |
01417    |                |
01418    |                |
01419    |                |
01420    |                |
01421    |    ***         |
01422    |    ***         |
01423    |    ***         |
01424    |                |
01425    |                |
01426    |                |
01427    |                |
01428    |                |
01429    |                |
01430    |                |
01431    |                |
01432    |                |
01433    +----------------+ */
01434 0x0000, 0x0000,
01435 0x0000, 0x0000,
01436 0x0000, 0x0000,
01437 0x0000, 0x0000,
01438 0x0000, 0x0000,
01439 0x0000, 0x0000,
01440 0x0000, 0x0000,
01441 0x0000, 0x0000,
01442 0x000e, 0x0000,
01443 0x000e, 0x0000,
01444 0x000e, 0x0000,
01445 0x0000, 0x0000,
01446 0x0000, 0x0000,
01447 0x0000, 0x0000,
01448 0x0000, 0x0000,
01449 0x0000, 0x0000,
01450 0x0000, 0x0000,
01451 0x0000, 0x0000,
01452 0x0000, 0x0000,
01453 0x0000, 0x0000,
01454
01455 /* Character (0x20):
01456    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01457    +----------------+
01458    |                |
01459    |                |
01460    |                |
01461    |                |
01462    |                |
01463    |                |
01464    |                |
01465    |                |
01466    |                |
01467    |                |
01468    |                |
01469    |                |
01470    |                |
01471    |                |
01472    |                |
01473    |                |
01474    |                |
01475    |                |
01476    |                |
01477    |                |
01478    +----------------+ */
01479 0x0000, 0x0000,
01480 0x0000, 0x0000,
01481 0x0000, 0x0000,
01482 0x0000, 0x0000,
01483 0x0000, 0x0000,
01484 0x0000, 0x0000,
01485 0x0000, 0x0000,
01486 0x0000, 0x0000,
01487 0x0000, 0x0000,
01488 0x0000, 0x0000,
01489 0x0000, 0x0000,
01490 0x0000, 0x0000,
01491 0x0000, 0x0000,
01492 0x0000, 0x0000,
01493 0x0000, 0x0000,
01494 0x0000, 0x0000,
01495 0x0000, 0x0000,
01496 0x0000, 0x0000,
01497 0x0000, 0x0000,
01498 0x0000, 0x0000,
01499
01500 /* Character (0x21):
01501    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01502    +----------------+
01503    |                |
01504    |                |
01505    |                |
01506    |    **          |
01507    |    **          |
01508    |    **          |
01509    |    **          |
01510    |    **          |
01511    |    **          |
01512    |    **          |
01513    |    **          |
01514    |    **          |
01515    |    **          |
01516    |                |
01517    |    **          |
01518    |    **          |
01519    |                |
01520    |                |
01521    |                |
01522    |                |
01523    +----------------+ */
01524 0x0000, 0x0000,
01525 0x0000, 0x0000,
01526 0x0000, 0x0000,
01527 0x000c, 0x0000,
01528 0x000c, 0x0000,
01529 0x000c, 0x0000,
01530 0x000c, 0x0000,
01531 0x000c, 0x0000,
01532 0x000c, 0x0000,
01533 0x000c, 0x0000,
01534 0x000c, 0x0000,
01535 0x000c, 0x0000,
01536 0x000c, 0x0000,
01537 0x0000, 0x0000,
01538 0x000c, 0x0000,
01539 0x000c, 0x0000,
01540 0x0000, 0x0000,
01541 0x0000, 0x0000,
01542 0x0000, 0x0000,
01543 0x0000, 0x0000,
01544
01545 /* Character (0x22):
01546    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01547    +----------------+
01548    |                |
01549    |                |
01550    |                |
01551    |  **  **        |
01552    |  **  **        |
01553    |  **  **        |
01554    |   *  *         |
01555    |                |
01556    |                |
01557    |                |
01558    |                |
01559    |                |
01560    |                |
01561    |                |
01562    |                |
01563    |                |
01564    |                |
01565    |                |
01566    |                |
01567    |                |
01568    +----------------+ */
01569 0x0000, 0x0000,
01570 0x0000, 0x0000,
01571 0x0000, 0x0000,
01572 0x0033, 0x0000,
01573 0x0033, 0x0000,
01574 0x0033, 0x0000,
01575 0x0012, 0x0000,
01576 0x0000, 0x0000,
01577 0x0000, 0x0000,
01578 0x0000, 0x0000,
01579 0x0000, 0x0000,
01580 0x0000, 0x0000,
01581 0x0000, 0x0000,
01582 0x0000, 0x0000,
01583 0x0000, 0x0000,
01584 0x0000, 0x0000,
01585 0x0000, 0x0000,
01586 0x0000, 0x0000,
01587 0x0000, 0x0000,
01588 0x0000, 0x0000,
01589
01590 /* Character (0x23):
01591    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01592    +----------------+
01593    |                |
01594    |                |
01595    |                |
01596    |                |
01597    |    ** **       |
01598    |    ** **       |
01599    |    ** **       |
01600    |  ********      |
01601    |   ** **        |
01602    |   ** **        |
01603    |   ** **        |
01604    | ********       |
01605    |  ** **         |
01606    |  ** **         |
01607    |  ** **         |
01608    |                |
01609    |                |
01610    |                |
01611    |                |
01612    |                |
01613    +----------------+ */
01614 0x0000, 0x0000,
01615 0x0000, 0x0000,
01616 0x0000, 0x0000,
01617 0x0000, 0x0000,
01618 0x000d, 0x0080,
01619 0x000d, 0x0080,
01620 0x000d, 0x0080,
01621 0x003f, 0x00c0,
01622 0x001b, 0x0000,
01623 0x001b, 0x0000,
01624 0x001b, 0x0000,
01625 0x007f, 0x0080,
01626 0x0036, 0x0000,
01627 0x0036, 0x0000,
01628 0x0036, 0x0000,
01629 0x0000, 0x0000,
01630 0x0000, 0x0000,
01631 0x0000, 0x0000,
01632 0x0000, 0x0000,
01633 0x0000, 0x0000,
01634
01635 /* Character (0x24):
01636    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01637    +----------------+
01638    |                |
01639    |                |
01640    |                |
01641    |    **          |
01642    |  ******        |
01643    | ** ** **       |
01644    | ** **          |
01645    | ** **          |
01646    | ** **          |
01647    |  ******        |
01648    |    ** **       |
01649    |    ** **       |
01650    |    ** **       |
01651    | ** ** **       |
01652    |  ******        |
01653    |    **          |
01654    |                |
01655    |                |
01656    |                |
01657    |                |
01658    +----------------+ */
01659 0x0000, 0x0000,
01660 0x0000, 0x0000,
01661 0x0000, 0x0000,
01662 0x000c, 0x0000,
01663 0x003f, 0x0000,
01664 0x006d, 0x0080,
01665 0x006c, 0x0000,
01666 0x006c, 0x0000,
01667 0x006c, 0x0000,
01668 0x003f, 0x0000,
01669 0x000d, 0x0080,
01670 0x000d, 0x0080,
01671 0x000d, 0x0080,
01672 0x006d, 0x0080,
01673 0x003f, 0x0000,
01674 0x000c, 0x0000,
01675 0x0000, 0x0000,
01676 0x0000, 0x0000,
01677 0x0000, 0x0000,
01678 0x0000, 0x0000,
01679
01680 /* Character (0x25):
01681    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01682    +----------------+
01683    |                |
01684    |                |
01685    |                |
01686    |                |
01687    |  ***  **       |
01688    | ** ** **       |
01689    | ** ****        |
01690    |  *** **        |
01691    |     **         |
01692    |     **         |
01693    |    **          |
01694    |    **          |
01695    |   ** ***       |
01696    |   **** **      |
01697    |  ** ** **      |
01698    |  **  ***       |
01699    |                |
01700    |                |
01701    |                |
01702    |                |
01703    +----------------+ */
01704 0x0000, 0x0000,
01705 0x0000, 0x0000,
01706 0x0000, 0x0000,
01707 0x0000, 0x0000,
01708 0x0039, 0x0080,
01709 0x006d, 0x0080,
01710 0x006f, 0x0000,
01711 0x003b, 0x0000,
01712 0x0006, 0x0000,
01713 0x0006, 0x0000,
01714 0x000c, 0x0000,
01715 0x000c, 0x0000,
01716 0x001b, 0x0080,
01717 0x001e, 0x00c0,
01718 0x0036, 0x00c0,
01719 0x0033, 0x0080,
01720 0x0000, 0x0000,
01721 0x0000, 0x0000,
01722 0x0000, 0x0000,
01723 0x0000, 0x0000,
01724
01725 /* Character (0x26):
01726    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01727    +----------------+
01728    |                |
01729    |                |
01730    |                |
01731    |   ***          |
01732    |  ** **         |
01733    |  ** **         |
01734    |  ** **         |
01735    |  ****          |
01736    |   **           |
01737    |  ***           |
01738    | ** **          |
01739    | **  ** **      |
01740    | **   ***       |
01741    | **   **        |
01742    | *** ****       |
01743    |  ****  **      |
01744    |                |
01745    |                |
01746    |                |
01747    |                |
01748    +----------------+ */
01749 0x0000, 0x0000,
01750 0x0000, 0x0000,
01751 0x0000, 0x0000,
01752 0x001c, 0x0000,
01753 0x0036, 0x0000,
01754 0x0036, 0x0000,
01755 0x0036, 0x0000,
01756 0x003c, 0x0000,
01757 0x0018, 0x0000,
01758 0x0038, 0x0000,
01759 0x006c, 0x0000,
01760 0x0066, 0x00c0,
01761 0x0063, 0x0080,
01762 0x0063, 0x0000,
01763 0x0077, 0x0080,
01764 0x003c, 0x00c0,
01765 0x0000, 0x0000,
01766 0x0000, 0x0000,
01767 0x0000, 0x0000,
01768 0x0000, 0x0000,
01769
01770 /* Character (0x27):
01771    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01772    +----------------+
01773    |                |
01774    |                |
01775    |                |
01776    |    **          |
01777    |    **          |
01778    |    **          |
01779    |    **          |
01780    |    *           |
01781    |                |
01782    |                |
01783    |                |
01784    |                |
01785    |                |
01786    |                |
01787    |                |
01788    |                |
01789    |                |
01790    |                |
01791    |                |
01792    |                |
01793    +----------------+ */
01794 0x0000, 0x0000,
01795 0x0000, 0x0000,
01796 0x0000, 0x0000,
01797 0x000c, 0x0000,
01798 0x000c, 0x0000,
01799 0x000c, 0x0000,
01800 0x000c, 0x0000,
01801 0x0008, 0x0000,
01802 0x0000, 0x0000,
01803 0x0000, 0x0000,
01804 0x0000, 0x0000,
01805 0x0000, 0x0000,
01806 0x0000, 0x0000,
01807 0x0000, 0x0000,
01808 0x0000, 0x0000,
01809 0x0000, 0x0000,
01810 0x0000, 0x0000,
01811 0x0000, 0x0000,
01812 0x0000, 0x0000,
01813 0x0000, 0x0000,
01814
01815 /* Character (0x28):
01816    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01817    +----------------+
01818    |                |
01819    |                |
01820    |                |
01821    |      **        |
01822    |     **         |
01823    |    **          |
01824    |    **          |
01825    |   **           |
01826    |   **           |
01827    |   **           |
01828    |   **           |
01829    |   **           |
01830    |    **          |
01831    |    **          |
01832    |     **         |
01833    |      **        |
01834    |                |
01835    |                |
01836    |                |
01837    |                |
01838    +----------------+ */
01839 0x0000, 0x0000,
01840 0x0000, 0x0000,
01841 0x0000, 0x0000,
01842 0x0003, 0x0000,
01843 0x0006, 0x0000,
01844 0x000c, 0x0000,
01845 0x000c, 0x0000,
01846 0x0018, 0x0000,
01847 0x0018, 0x0000,
01848 0x0018, 0x0000,
01849 0x0018, 0x0000,
01850 0x0018, 0x0000,
01851 0x000c, 0x0000,
01852 0x000c, 0x0000,
01853 0x0006, 0x0000,
01854 0x0003, 0x0000,
01855 0x0000, 0x0000,
01856 0x0000, 0x0000,
01857 0x0000, 0x0000,
01858 0x0000, 0x0000,
01859
01860 /* Character (0x29):
01861    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01862    +----------------+
01863    |                |
01864    |                |
01865    |                |
01866    |  **            |
01867    |   **           |
01868    |    **          |
01869    |    **          |
01870    |     **         |
01871    |     **         |
01872    |     **         |
01873    |     **         |
01874    |     **         |
01875    |    **          |
01876    |    **          |
01877    |   **           |
01878    |  **            |
01879    |                |
01880    |                |
01881    |                |
01882    |                |
01883    +----------------+ */
01884 0x0000, 0x0000,
01885 0x0000, 0x0000,
01886 0x0000, 0x0000,
01887 0x0030, 0x0000,
01888 0x0018, 0x0000,
01889 0x000c, 0x0000,
01890 0x000c, 0x0000,
01891 0x0006, 0x0000,
01892 0x0006, 0x0000,
01893 0x0006, 0x0000,
01894 0x0006, 0x0000,
01895 0x0006, 0x0000,
01896 0x000c, 0x0000,
01897 0x000c, 0x0000,
01898 0x0018, 0x0000,
01899 0x0030, 0x0000,
01900 0x0000, 0x0000,
01901 0x0000, 0x0000,
01902 0x0000, 0x0000,
01903 0x0000, 0x0000,
01904
01905 /* Character (0x2a):
01906    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01907    +----------------+
01908    |                |
01909    |                |
01910    |                |
01911    |                |
01912    |                |
01913    |                |
01914    |  **  **        |
01915    |  **  **        |
01916    |   ****         |
01917    | ********       |
01918    |   ****         |
01919    |  **  **        |
01920    |  **  **        |
01921    |                |
01922    |                |
01923    |                |
01924    |                |
01925    |                |
01926    |                |
01927    |                |
01928    +----------------+ */
01929 0x0000, 0x0000,
01930 0x0000, 0x0000,
01931 0x0000, 0x0000,
01932 0x0000, 0x0000,
01933 0x0000, 0x0000,
01934 0x0000, 0x0000,
01935 0x0033, 0x0000,
01936 0x0033, 0x0000,
01937 0x001e, 0x0000,
01938 0x007f, 0x0080,
01939 0x001e, 0x0000,
01940 0x0033, 0x0000,
01941 0x0033, 0x0000,
01942 0x0000, 0x0000,
01943 0x0000, 0x0000,
01944 0x0000, 0x0000,
01945 0x0000, 0x0000,
01946 0x0000, 0x0000,
01947 0x0000, 0x0000,
01948 0x0000, 0x0000,
01949
01950 /* Character (0x2b):
01951    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01952    +----------------+
01953    |                |
01954    |                |
01955    |                |
01956    |                |
01957    |                |
01958    |                |
01959    |    **          |
01960    |    **          |
01961    |    **          |
01962    | ********       |
01963    |    **          |
01964    |    **          |
01965    |    **          |
01966    |                |
01967    |                |
01968    |                |
01969    |                |
01970    |                |
01971    |                |
01972    |                |
01973    +----------------+ */
01974 0x0000, 0x0000,
01975 0x0000, 0x0000,
01976 0x0000, 0x0000,
01977 0x0000, 0x0000,
01978 0x0000, 0x0000,
01979 0x0000, 0x0000,
01980 0x000c, 0x0000,
01981 0x000c, 0x0000,
01982 0x000c, 0x0000,
01983 0x007f, 0x0080,
01984 0x000c, 0x0000,
01985 0x000c, 0x0000,
01986 0x000c, 0x0000,
01987 0x0000, 0x0000,
01988 0x0000, 0x0000,
01989 0x0000, 0x0000,
01990 0x0000, 0x0000,
01991 0x0000, 0x0000,
01992 0x0000, 0x0000,
01993 0x0000, 0x0000,
01994
01995 /* Character (0x2c):
01996    bbw=10, bbh=20, bbx=0, bby=-4, width=10
01997    +----------------+
01998    |                |
01999    |                |
02000    |                |
02001    |                |
02002    |                |
02003    |                |
02004    |                |
02005    |                |
02006    |                |
02007    |                |
02008    |                |
02009    |                |
02010    |                |
02011    |                |
02012    |    ***         |
02013    |    ***         |
02014    |   ***          |
02015    |                |
02016    |                |
02017    |                |
02018    +----------------+ */
02019 0x0000, 0x0000,
02020 0x0000, 0x0000,
02021 0x0000, 0x0000,
02022 0x0000, 0x0000,
02023 0x0000, 0x0000,
02024 0x0000, 0x0000,
02025 0x0000, 0x0000,
02026 0x0000, 0x0000,
02027 0x0000, 0x0000,
02028 0x0000, 0x0000,
02029 0x0000, 0x0000,
02030 0x0000, 0x0000,
02031 0x0000, 0x0000,
02032 0x0000, 0x0000,
02033 0x000e, 0x0000,
02034 0x000e, 0x0000,
02035 0x001c, 0x0000,
02036 0x0000, 0x0000,
02037 0x0000, 0x0000,
02038 0x0000, 0x0000,
02039
02040 /* Character (0x2d):
02041    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02042    +----------------+
02043    |                |
02044    |                |
02045    |                |
02046    |                |
02047    |                |
02048    |                |
02049    |                |
02050    |                |
02051    |                |
02052    | ********       |
02053    |                |
02054    |                |
02055    |                |
02056    |                |
02057    |                |
02058    |                |
02059    |                |
02060    |                |
02061    |                |
02062    |                |
02063    +----------------+ */
02064 0x0000, 0x0000,
02065 0x0000, 0x0000,
02066 0x0000, 0x0000,
02067 0x0000, 0x0000,
02068 0x0000, 0x0000,
02069 0x0000, 0x0000,
02070 0x0000, 0x0000,
02071 0x0000, 0x0000,
02072 0x0000, 0x0000,
02073 0x007f, 0x0080,
02074 0x0000, 0x0000,
02075 0x0000, 0x0000,
02076 0x0000, 0x0000,
02077 0x0000, 0x0000,
02078 0x0000, 0x0000,
02079 0x0000, 0x0000,
02080 0x0000, 0x0000,
02081 0x0000, 0x0000,
02082 0x0000, 0x0000,
02083 0x0000, 0x0000,
02084
02085 /* Character (0x2e):
02086    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02087    +----------------+
02088    |                |
02089    |                |
02090    |                |
02091    |                |
02092    |                |
02093    |                |
02094    |                |
02095    |                |
02096    |                |
02097    |                |
02098    |                |
02099    |                |
02100    |                |
02101    |    ***         |
02102    |    ***         |
02103    |    ***         |
02104    |                |
02105    |                |
02106    |                |
02107    |                |
02108    +----------------+ */
02109 0x0000, 0x0000,
02110 0x0000, 0x0000,
02111 0x0000, 0x0000,
02112 0x0000, 0x0000,
02113 0x0000, 0x0000,
02114 0x0000, 0x0000,
02115 0x0000, 0x0000,
02116 0x0000, 0x0000,
02117 0x0000, 0x0000,
02118 0x0000, 0x0000,
02119 0x0000, 0x0000,
02120 0x0000, 0x0000,
02121 0x0000, 0x0000,
02122 0x000e, 0x0000,
02123 0x000e, 0x0000,
02124 0x000e, 0x0000,
02125 0x0000, 0x0000,
02126 0x0000, 0x0000,
02127 0x0000, 0x0000,
02128 0x0000, 0x0000,
02129
02130 /* Character (0x2f):
02131    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02132    +----------------+
02133    |                |
02134    |                |
02135    |                |
02136    |                |
02137    |       **       |
02138    |       **       |
02139    |      **        |
02140    |      **        |
02141    |     **         |
02142    |     **         |
02143    |    **          |
02144    |    **          |
02145    |   **           |
02146    |   **           |
02147    |  **            |
02148    |  **            |
02149    |                |
02150    |                |
02151    |                |
02152    |                |
02153    +----------------+ */
02154 0x0000, 0x0000,
02155 0x0000, 0x0000,
02156 0x0000, 0x0000,
02157 0x0000, 0x0000,
02158 0x0001, 0x0080,
02159 0x0001, 0x0080,
02160 0x0003, 0x0000,
02161 0x0003, 0x0000,
02162 0x0006, 0x0000,
02163 0x0006, 0x0000,
02164 0x000c, 0x0000,
02165 0x000c, 0x0000,
02166 0x0018, 0x0000,
02167 0x0018, 0x0000,
02168 0x0030, 0x0000,
02169 0x0030, 0x0000,
02170 0x0000, 0x0000,
02171 0x0000, 0x0000,
02172 0x0000, 0x0000,
02173 0x0000, 0x0000,
02174
02175 /* Character (0x30):
02176    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02177    +----------------+
02178    |                |
02179    |                |
02180    |                |
02181    |    **          |
02182    |   ****         |
02183    |  **  **        |
02184    |  **  **        |
02185    | **    **       |
02186    | **    **       |
02187    | **    **       |
02188    | **    **       |
02189    | **    **       |
02190    |  **  **        |
02191    |  **  **        |
02192    |   ****         |
02193    |    **          |
02194    |                |
02195    |                |
02196    |                |
02197    |                |
02198    +----------------+ */
02199 0x0000, 0x0000,
02200 0x0000, 0x0000,
02201 0x0000, 0x0000,
02202 0x000c, 0x0000,
02203 0x001e, 0x0000,
02204 0x0033, 0x0000,
02205 0x0033, 0x0000,
02206 0x0061, 0x0080,
02207 0x0061, 0x0080,
02208 0x0061, 0x0080,
02209 0x0061, 0x0080,
02210 0x0061, 0x0080,
02211 0x0033, 0x0000,
02212 0x0033, 0x0000,
02213 0x001e, 0x0000,
02214 0x000c, 0x0000,
02215 0x0000, 0x0000,
02216 0x0000, 0x0000,
02217 0x0000, 0x0000,
02218 0x0000, 0x0000,
02219
02220 /* Character (0x31):
02221    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02222    +----------------+
02223    |                |
02224    |                |
02225    |                |
02226    |    **          |
02227    |   ***          |
02228    |  ****          |
02229    | ** **          |
02230    |    **          |
02231    |    **          |
02232    |    **          |
02233    |    **          |
02234    |    **          |
02235    |    **          |
02236    |    **          |
02237    |    **          |
02238    | ********       |
02239    |                |
02240    |                |
02241    |                |
02242    |                |
02243    +----------------+ */
02244 0x0000, 0x0000,
02245 0x0000, 0x0000,
02246 0x0000, 0x0000,
02247 0x000c, 0x0000,
02248 0x001c, 0x0000,
02249 0x003c, 0x0000,
02250 0x006c, 0x0000,
02251 0x000c, 0x0000,
02252 0x000c, 0x0000,
02253 0x000c, 0x0000,
02254 0x000c, 0x0000,
02255 0x000c, 0x0000,
02256 0x000c, 0x0000,
02257 0x000c, 0x0000,
02258 0x000c, 0x0000,
02259 0x007f, 0x0080,
02260 0x0000, 0x0000,
02261 0x0000, 0x0000,
02262 0x0000, 0x0000,
02263 0x0000, 0x0000,
02264
02265 /* Character (0x32):
02266    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02267    +----------------+
02268    |                |
02269    |                |
02270    |                |
02271    |   ****         |
02272    |  **  **        |
02273    | **    **       |
02274    | **    **       |
02275    |       **       |
02276    |       **       |
02277    |      **        |
02278    |    ***         |
02279    |   **           |
02280    |  **            |
02281    | **             |
02282    | **             |
02283    | ********       |
02284    |                |
02285    |                |
02286    |                |
02287    |                |
02288    +----------------+ */
02289 0x0000, 0x0000,
02290 0x0000, 0x0000,
02291 0x0000, 0x0000,
02292 0x001e, 0x0000,
02293 0x0033, 0x0000,
02294 0x0061, 0x0080,
02295 0x0061, 0x0080,
02296 0x0001, 0x0080,
02297 0x0001, 0x0080,
02298 0x0003, 0x0000,
02299 0x000e, 0x0000,
02300 0x0018, 0x0000,
02301 0x0030, 0x0000,
02302 0x0060, 0x0000,
02303 0x0060, 0x0000,
02304 0x007f, 0x0080,
02305 0x0000, 0x0000,
02306 0x0000, 0x0000,
02307 0x0000, 0x0000,
02308 0x0000, 0x0000,
02309
02310 /* Character (0x33):
02311    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02312    +----------------+
02313    |                |
02314    |                |
02315    |                |
02316    |   ****         |
02317    |  **  **        |
02318    | **    **       |
02319    | **    **       |
02320    |       **       |
02321    |      **        |
02322    |    ***         |
02323    |      **        |
02324    |       **       |
02325    | **    **       |
02326    | **    **       |
02327    |  **  **        |
02328    |   ****         |
02329    |                |
02330    |                |
02331    |                |
02332    |                |
02333    +----------------+ */
02334 0x0000, 0x0000,
02335 0x0000, 0x0000,
02336 0x0000, 0x0000,
02337 0x001e, 0x0000,
02338 0x0033, 0x0000,
02339 0x0061, 0x0080,
02340 0x0061, 0x0080,
02341 0x0001, 0x0080,
02342 0x0003, 0x0000,
02343 0x000e, 0x0000,
02344 0x0003, 0x0000,
02345 0x0001, 0x0080,
02346 0x0061, 0x0080,
02347 0x0061, 0x0080,
02348 0x0033, 0x0000,
02349 0x001e, 0x0000,
02350 0x0000, 0x0000,
02351 0x0000, 0x0000,
02352 0x0000, 0x0000,
02353 0x0000, 0x0000,
02354
02355 /* Character (0x34):
02356    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02357    +----------------+
02358    |                |
02359    |                |
02360    |                |
02361    |       *        |
02362    |      **        |
02363    |     ***        |
02364    |    ****        |
02365    |   ** **        |
02366    |  **  **        |
02367    | **   **        |
02368    | **   **        |
02369    | ********       |
02370    |      **        |
02371    |      **        |
02372    |      **        |
02373    |      **        |
02374    |                |
02375    |                |
02376    |                |
02377    |                |
02378    +----------------+ */
02379 0x0000, 0x0000,
02380 0x0000, 0x0000,
02381 0x0000, 0x0000,
02382 0x0001, 0x0000,
02383 0x0003, 0x0000,
02384 0x0007, 0x0000,
02385 0x000f, 0x0000,
02386 0x001b, 0x0000,
02387 0x0033, 0x0000,
02388 0x0063, 0x0000,
02389 0x0063, 0x0000,
02390 0x007f, 0x0080,
02391 0x0003, 0x0000,
02392 0x0003, 0x0000,
02393 0x0003, 0x0000,
02394 0x0003, 0x0000,
02395 0x0000, 0x0000,
02396 0x0000, 0x0000,
02397 0x0000, 0x0000,
02398 0x0000, 0x0000,
02399
02400 /* Character (0x35):
02401    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02402    +----------------+
02403    |                |
02404    |                |
02405    |                |
02406    | ********       |
02407    | **             |
02408    | **             |
02409    | **             |
02410    | **             |
02411    | ** ***         |
02412    | ***  **        |
02413    |       **       |
02414    |       **       |
02415    |       **       |
02416    | **    **       |
02417    |  **  **        |
02418    |   ****         |
02419    |                |
02420    |                |
02421    |                |
02422    |                |
02423    +----------------+ */
02424 0x0000, 0x0000,
02425 0x0000, 0x0000,
02426 0x0000, 0x0000,
02427 0x007f, 0x0080,
02428 0x0060, 0x0000,
02429 0x0060, 0x0000,
02430 0x0060, 0x0000,
02431 0x0060, 0x0000,
02432 0x006e, 0x0000,
02433 0x0073, 0x0000,
02434 0x0001, 0x0080,
02435 0x0001, 0x0080,
02436 0x0001, 0x0080,
02437 0x0061, 0x0080,
02438 0x0033, 0x0000,
02439 0x001e, 0x0000,
02440 0x0000, 0x0000,
02441 0x0000, 0x0000,
02442 0x0000, 0x0000,
02443 0x0000, 0x0000,
02444
02445 /* Character (0x36):
02446    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02447    +----------------+
02448    |                |
02449    |                |
02450    |                |
02451    |   ****         |
02452    |  **  **        |
02453    | **    *        |
02454    | **             |
02455    | **             |
02456    | ** ***         |
02457    | ***  **        |
02458    | **    **       |
02459    | **    **       |
02460    | **    **       |
02461    | **    **       |
02462    |  **  **        |
02463    |   ****         |
02464    |                |
02465    |                |
02466    |                |
02467    |                |
02468    +----------------+ */
02469 0x0000, 0x0000,
02470 0x0000, 0x0000,
02471 0x0000, 0x0000,
02472 0x001e, 0x0000,
02473 0x0033, 0x0000,
02474 0x0061, 0x0000,
02475 0x0060, 0x0000,
02476 0x0060, 0x0000,
02477 0x006e, 0x0000,
02478 0x0073, 0x0000,
02479 0x0061, 0x0080,
02480 0x0061, 0x0080,
02481 0x0061, 0x0080,
02482 0x0061, 0x0080,
02483 0x0033, 0x0000,
02484 0x001e, 0x0000,
02485 0x0000, 0x0000,
02486 0x0000, 0x0000,
02487 0x0000, 0x0000,
02488 0x0000, 0x0000,
02489
02490 /* Character (0x37):
02491    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02492    +----------------+
02493    |                |
02494    |                |
02495    |                |
02496    | ********       |
02497    |       **       |
02498    |       **       |
02499    |      **        |
02500    |      **        |
02501    |     **         |
02502    |     **         |
02503    |    **          |
02504    |    **          |
02505    |   **           |
02506    |   **           |
02507    |  **            |
02508    |  **            |
02509    |                |
02510    |                |
02511    |                |
02512    |                |
02513    +----------------+ */
02514 0x0000, 0x0000,
02515 0x0000, 0x0000,
02516 0x0000, 0x0000,
02517 0x007f, 0x0080,
02518 0x0001, 0x0080,
02519 0x0001, 0x0080,
02520 0x0003, 0x0000,
02521 0x0003, 0x0000,
02522 0x0006, 0x0000,
02523 0x0006, 0x0000,
02524 0x000c, 0x0000,
02525 0x000c, 0x0000,
02526 0x0018, 0x0000,
02527 0x0018, 0x0000,
02528 0x0030, 0x0000,
02529 0x0030, 0x0000,
02530 0x0000, 0x0000,
02531 0x0000, 0x0000,
02532 0x0000, 0x0000,
02533 0x0000, 0x0000,
02534
02535 /* Character (0x38):
02536    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02537    +----------------+
02538    |                |
02539    |                |
02540    |                |
02541    |   ****         |
02542    |  **  **        |
02543    | **    **       |
02544    | **    **       |
02545    | **    **       |
02546    |  **  **        |
02547    |   ****         |
02548    |  **  **        |
02549    | **    **       |
02550    | **    **       |
02551    | **    **       |
02552    |  **  **        |
02553    |   ****         |
02554    |                |
02555    |                |
02556    |                |
02557    |                |
02558    +----------------+ */
02559 0x0000, 0x0000,
02560 0x0000, 0x0000,
02561 0x0000, 0x0000,
02562 0x001e, 0x0000,
02563 0x0033, 0x0000,
02564 0x0061, 0x0080,
02565 0x0061, 0x0080,
02566 0x0061, 0x0080,
02567 0x0033, 0x0000,
02568 0x001e, 0x0000,
02569 0x0033, 0x0000,
02570 0x0061, 0x0080,
02571 0x0061, 0x0080,
02572 0x0061, 0x0080,
02573 0x0033, 0x0000,
02574 0x001e, 0x0000,
02575 0x0000, 0x0000,
02576 0x0000, 0x0000,
02577 0x0000, 0x0000,
02578 0x0000, 0x0000,
02579
02580 /* Character (0x39):
02581    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02582    +----------------+
02583    |                |
02584    |                |
02585    |                |
02586    |   ****         |
02587    |  **  **        |
02588    | **    **       |
02589    | **    **       |
02590    | **    **       |
02591    | **    **       |
02592    |  **  ***       |
02593    |   *** **       |
02594    |       **       |
02595    |       **       |
02596    |  *    **       |
02597    |  **  **        |
02598    |   ****         |
02599    |                |
02600    |                |
02601    |                |
02602    |                |
02603    +----------------+ */
02604 0x0000, 0x0000,
02605 0x0000, 0x0000,
02606 0x0000, 0x0000,
02607 0x001e, 0x0000,
02608 0x0033, 0x0000,
02609 0x0061, 0x0080,
02610 0x0061, 0x0080,
02611 0x0061, 0x0080,
02612 0x0061, 0x0080,
02613 0x0033, 0x0080,
02614 0x001d, 0x0080,
02615 0x0001, 0x0080,
02616 0x0001, 0x0080,
02617 0x0021, 0x0080,
02618 0x0033, 0x0000,
02619 0x001e, 0x0000,
02620 0x0000, 0x0000,
02621 0x0000, 0x0000,
02622 0x0000, 0x0000,
02623 0x0000, 0x0000,
02624
02625 /* Character (0x3a):
02626    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02627    +----------------+
02628    |                |
02629    |                |
02630    |                |
02631    |                |
02632    |                |
02633    |                |
02634    |                |
02635    |                |
02636    |    ***         |
02637    |    ***         |
02638    |                |
02639    |                |
02640    |                |
02641    |                |
02642    |    ***         |
02643    |    ***         |
02644    |                |
02645    |                |
02646    |                |
02647    |                |
02648    +----------------+ */
02649 0x0000, 0x0000,
02650 0x0000, 0x0000,
02651 0x0000, 0x0000,
02652 0x0000, 0x0000,
02653 0x0000, 0x0000,
02654 0x0000, 0x0000,
02655 0x0000, 0x0000,
02656 0x0000, 0x0000,
02657 0x000e, 0x0000,
02658 0x000e, 0x0000,
02659 0x0000, 0x0000,
02660 0x0000, 0x0000,
02661 0x0000, 0x0000,
02662 0x0000, 0x0000,
02663 0x000e, 0x0000,
02664 0x000e, 0x0000,
02665 0x0000, 0x0000,
02666 0x0000, 0x0000,
02667 0x0000, 0x0000,
02668 0x0000, 0x0000,
02669
02670 /* Character (0x3b):
02671    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02672    +----------------+
02673    |                |
02674    |                |
02675    |                |
02676    |                |
02677    |                |
02678    |                |
02679    |                |
02680    |                |
02681    |    ***         |
02682    |    ***         |
02683    |                |
02684    |                |
02685    |                |
02686    |                |
02687    |    ***         |
02688    |    ***         |
02689    |   ***          |
02690    |                |
02691    |                |
02692    |                |
02693    +----------------+ */
02694 0x0000, 0x0000,
02695 0x0000, 0x0000,
02696 0x0000, 0x0000,
02697 0x0000, 0x0000,
02698 0x0000, 0x0000,
02699 0x0000, 0x0000,
02700 0x0000, 0x0000,
02701 0x0000, 0x0000,
02702 0x000e, 0x0000,
02703 0x000e, 0x0000,
02704 0x0000, 0x0000,
02705 0x0000, 0x0000,
02706 0x0000, 0x0000,
02707 0x0000, 0x0000,
02708 0x000e, 0x0000,
02709 0x000e, 0x0000,
02710 0x001c, 0x0000,
02711 0x0000, 0x0000,
02712 0x0000, 0x0000,
02713 0x0000, 0x0000,
02714
02715 /* Character (0x3c):
02716    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02717    +----------------+
02718    |                |
02719    |                |
02720    |                |
02721    |       *        |
02722    |      **        |
02723    |     **         |
02724    |    **          |
02725    |   **           |
02726    |  **            |
02727    | **             |
02728    |  **            |
02729    |   **           |
02730    |    **          |
02731    |     **         |
02732    |      **        |
02733    |       *        |
02734    |                |
02735    |                |
02736    |                |
02737    |                |
02738    +----------------+ */
02739 0x0000, 0x0000,
02740 0x0000, 0x0000,
02741 0x0000, 0x0000,
02742 0x0001, 0x0000,
02743 0x0003, 0x0000,
02744 0x0006, 0x0000,
02745 0x000c, 0x0000,
02746 0x0018, 0x0000,
02747 0x0030, 0x0000,
02748 0x0060, 0x0000,
02749 0x0030, 0x0000,
02750 0x0018, 0x0000,
02751 0x000c, 0x0000,
02752 0x0006, 0x0000,
02753 0x0003, 0x0000,
02754 0x0001, 0x0000,
02755 0x0000, 0x0000,
02756 0x0000, 0x0000,
02757 0x0000, 0x0000,
02758 0x0000, 0x0000,
02759
02760 /* Character (0x3d):
02761    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02762    +----------------+
02763    |                |
02764    |                |
02765    |                |
02766    |                |
02767    |                |
02768    |                |
02769    |                |
02770    | ********       |
02771    |                |
02772    |                |
02773    |                |
02774    |                |
02775    | ********       |
02776    |                |
02777    |                |
02778    |                |
02779    |                |
02780    |                |
02781    |                |
02782    |                |
02783    +----------------+ */
02784 0x0000, 0x0000,
02785 0x0000, 0x0000,
02786 0x0000, 0x0000,
02787 0x0000, 0x0000,
02788 0x0000, 0x0000,
02789 0x0000, 0x0000,
02790 0x0000, 0x0000,
02791 0x007f, 0x0080,
02792 0x0000, 0x0000,
02793 0x0000, 0x0000,
02794 0x0000, 0x0000,
02795 0x0000, 0x0000,
02796 0x007f, 0x0080,
02797 0x0000, 0x0000,
02798 0x0000, 0x0000,
02799 0x0000, 0x0000,
02800 0x0000, 0x0000,
02801 0x0000, 0x0000,
02802 0x0000, 0x0000,
02803 0x0000, 0x0000,
02804
02805 /* Character (0x3e):
02806    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02807    +----------------+
02808    |                |
02809    |                |
02810    |                |
02811    |  *             |
02812    |  **            |
02813    |   **           |
02814    |    **          |
02815    |     **         |
02816    |      **        |
02817    |       **       |
02818    |      **        |
02819    |     **         |
02820    |    **          |
02821    |   **           |
02822    |  **            |
02823    |  *             |
02824    |                |
02825    |                |
02826    |                |
02827    |                |
02828    +----------------+ */
02829 0x0000, 0x0000,
02830 0x0000, 0x0000,
02831 0x0000, 0x0000,
02832 0x0020, 0x0000,
02833 0x0030, 0x0000,
02834 0x0018, 0x0000,
02835 0x000c, 0x0000,
02836 0x0006, 0x0000,
02837 0x0003, 0x0000,
02838 0x0001, 0x0080,
02839 0x0003, 0x0000,
02840 0x0006, 0x0000,
02841 0x000c, 0x0000,
02842 0x0018, 0x0000,
02843 0x0030, 0x0000,
02844 0x0020, 0x0000,
02845 0x0000, 0x0000,
02846 0x0000, 0x0000,
02847 0x0000, 0x0000,
02848 0x0000, 0x0000,
02849
02850 /* Character (0x3f):
02851    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02852    +----------------+
02853    |                |
02854    |                |
02855    |                |
02856    |   ****         |
02857    |  **  **        |
02858    | **    **       |
02859    | **    **       |
02860    | **    **       |
02861    |      **        |
02862    |     **         |
02863    |    **          |
02864    |    **          |
02865    |    **          |
02866    |                |
02867    |    **          |
02868    |    **          |
02869    |                |
02870    |                |
02871    |                |
02872    |                |
02873    +----------------+ */
02874 0x0000, 0x0000,
02875 0x0000, 0x0000,
02876 0x0000, 0x0000,
02877 0x001e, 0x0000,
02878 0x0033, 0x0000,
02879 0x0061, 0x0080,
02880 0x0061, 0x0080,
02881 0x0061, 0x0080,
02882 0x0003, 0x0000,
02883 0x0006, 0x0000,
02884 0x000c, 0x0000,
02885 0x000c, 0x0000,
02886 0x000c, 0x0000,
02887 0x0000, 0x0000,
02888 0x000c, 0x0000,
02889 0x000c, 0x0000,
02890 0x0000, 0x0000,
02891 0x0000, 0x0000,
02892 0x0000, 0x0000,
02893 0x0000, 0x0000,
02894
02895 /* Character (0x40):
02896    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02897    +----------------+
02898    |                |
02899    |                |
02900    |                |
02901    |   ****         |
02902    |  **  **        |
02903    | **    **       |
02904    | **  ****       |
02905    | ** *****       |
02906    | ** ** **       |
02907    | ** ** **       |
02908    | ** ** **       |
02909    | ** ****        |
02910    | **  **         |
02911    | **             |
02912    |  **   **       |
02913    |   *****        |
02914    |                |
02915    |                |
02916    |                |
02917    |                |
02918    +----------------+ */
02919 0x0000, 0x0000,
02920 0x0000, 0x0000,
02921 0x0000, 0x0000,
02922 0x001e, 0x0000,
02923 0x0033, 0x0000,
02924 0x0061, 0x0080,
02925 0x0067, 0x0080,
02926 0x006f, 0x0080,
02927 0x006d, 0x0080,
02928 0x006d, 0x0080,
02929 0x006d, 0x0080,
02930 0x006f, 0x0000,
02931 0x0066, 0x0000,
02932 0x0060, 0x0000,
02933 0x0031, 0x0080,
02934 0x001f, 0x0000,
02935 0x0000, 0x0000,
02936 0x0000, 0x0000,
02937 0x0000, 0x0000,
02938 0x0000, 0x0000,
02939
02940 /* Character (0x41):
02941    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02942    +----------------+
02943    |                |
02944    |                |
02945    |                |
02946    |    **          |
02947    |   ****         |
02948    |  **  **        |
02949    |  **  **        |
02950    | **    **       |
02951    | **    **       |
02952    | **    **       |
02953    | ********       |
02954    | **    **       |
02955    | **    **       |
02956    | **    **       |
02957    | **    **       |
02958    | **    **       |
02959    |                |
02960    |                |
02961    |                |
02962    |                |
02963    +----------------+ */
02964 0x0000, 0x0000,
02965 0x0000, 0x0000,
02966 0x0000, 0x0000,
02967 0x000c, 0x0000,
02968 0x001e, 0x0000,
02969 0x0033, 0x0000,
02970 0x0033, 0x0000,
02971 0x0061, 0x0080,
02972 0x0061, 0x0080,
02973 0x0061, 0x0080,
02974 0x007f, 0x0080,
02975 0x0061, 0x0080,
02976 0x0061, 0x0080,
02977 0x0061, 0x0080,
02978 0x0061, 0x0080,
02979 0x0061, 0x0080,
02980 0x0000, 0x0000,
02981 0x0000, 0x0000,
02982 0x0000, 0x0000,
02983 0x0000, 0x0000,
02984
02985 /* Character (0x42):
02986    bbw=10, bbh=20, bbx=0, bby=-4, width=10
02987    +----------------+
02988    |                |
02989    |                |
02990    |                |
02991    | *****          |
02992    | **  **         |
02993    | **   **        |
02994    | **   **        |
02995    | **   **        |
02996    | **  **         |
02997    | ******         |
02998    | **   **        |
02999    | **    **       |
03000    | **    **       |
03001    | **    **       |
03002    | **   **        |
03003    | ******         |
03004    |                |
03005    |                |
03006    |                |
03007    |                |
03008    +----------------+ */
03009 0x0000, 0x0000,
03010 0x0000, 0x0000,
03011 0x0000, 0x0000,
03012 0x007c, 0x0000,
03013 0x0066, 0x0000,
03014 0x0063, 0x0000,
03015 0x0063, 0x0000,
03016 0x0063, 0x0000,
03017 0x0066, 0x0000,
03018 0x007e, 0x0000,
03019 0x0063, 0x0000,
03020 0x0061, 0x0080,
03021 0x0061, 0x0080,
03022 0x0061, 0x0080,
03023 0x0063, 0x0000,
03024 0x007e, 0x0000,
03025 0x0000, 0x0000,
03026 0x0000, 0x0000,
03027 0x0000, 0x0000,
03028 0x0000, 0x0000,
03029
03030 /* Character (0x43):
03031    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03032    +----------------+
03033    |                |
03034    |                |
03035    |                |
03036    |   ****         |
03037    |  **  **        |
03038    | **    **       |
03039    | **             |
03040    | **             |
03041    | **             |
03042    | **             |
03043    | **             |
03044    | **             |
03045    | **             |
03046    | **    **       |
03047    |  **  **        |
03048    |   ****         |
03049    |                |
03050    |                |
03051    |                |
03052    |                |
03053    +----------------+ */
03054 0x0000, 0x0000,
03055 0x0000, 0x0000,
03056 0x0000, 0x0000,
03057 0x001e, 0x0000,
03058 0x0033, 0x0000,
03059 0x0061, 0x0080,
03060 0x0060, 0x0000,
03061 0x0060, 0x0000,
03062 0x0060, 0x0000,
03063 0x0060, 0x0000,
03064 0x0060, 0x0000,
03065 0x0060, 0x0000,
03066 0x0060, 0x0000,
03067 0x0061, 0x0080,
03068 0x0033, 0x0000,
03069 0x001e, 0x0000,
03070 0x0000, 0x0000,
03071 0x0000, 0x0000,
03072 0x0000, 0x0000,
03073 0x0000, 0x0000,
03074
03075 /* Character (0x44):
03076    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03077    +----------------+
03078    |                |
03079    |                |
03080    |                |
03081    | ******         |
03082    | **   **        |
03083    | **    **       |
03084    | **    **       |
03085    | **    **       |
03086    | **    **       |
03087    | **    **       |
03088    | **    **       |
03089    | **    **       |
03090    | **    **       |
03091    | **    **       |
03092    | **   **        |
03093    | ******         |
03094    |                |
03095    |                |
03096    |                |
03097    |                |
03098    +----------------+ */
03099 0x0000, 0x0000,
03100 0x0000, 0x0000,
03101 0x0000, 0x0000,
03102 0x007e, 0x0000,
03103 0x0063, 0x0000,
03104 0x0061, 0x0080,
03105 0x0061, 0x0080,
03106 0x0061, 0x0080,
03107 0x0061, 0x0080,
03108 0x0061, 0x0080,
03109 0x0061, 0x0080,
03110 0x0061, 0x0080,
03111 0x0061, 0x0080,
03112 0x0061, 0x0080,
03113 0x0063, 0x0000,
03114 0x007e, 0x0000,
03115 0x0000, 0x0000,
03116 0x0000, 0x0000,
03117 0x0000, 0x0000,
03118 0x0000, 0x0000,
03119
03120 /* Character (0x45):
03121    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03122    +----------------+
03123    |                |
03124    |                |
03125    |                |
03126    | ********       |
03127    | **             |
03128    | **             |
03129    | **             |
03130    | **             |
03131    | **             |
03132    | ******         |
03133    | **             |
03134    | **             |
03135    | **             |
03136    | **             |
03137    | **             |
03138    | ********       |
03139    |                |
03140    |                |
03141    |                |
03142    |                |
03143    +----------------+ */
03144 0x0000, 0x0000,
03145 0x0000, 0x0000,
03146 0x0000, 0x0000,
03147 0x007f, 0x0080,
03148 0x0060, 0x0000,
03149 0x0060, 0x0000,
03150 0x0060, 0x0000,
03151 0x0060, 0x0000,
03152 0x0060, 0x0000,
03153 0x007e, 0x0000,
03154 0x0060, 0x0000,
03155 0x0060, 0x0000,
03156 0x0060, 0x0000,
03157 0x0060, 0x0000,
03158 0x0060, 0x0000,
03159 0x007f, 0x0080,
03160 0x0000, 0x0000,
03161 0x0000, 0x0000,
03162 0x0000, 0x0000,
03163 0x0000, 0x0000,
03164
03165 /* Character (0x46):
03166    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03167    +----------------+
03168    |                |
03169    |                |
03170    |                |
03171    | ********       |
03172    | **             |
03173    | **             |
03174    | **             |
03175    | **             |
03176    | **             |
03177    | ******         |
03178    | **             |
03179    | **             |
03180    | **             |
03181    | **             |
03182    | **             |
03183    | **             |
03184    |                |
03185    |                |
03186    |                |
03187    |                |
03188    +----------------+ */
03189 0x0000, 0x0000,
03190 0x0000, 0x0000,
03191 0x0000, 0x0000,
03192 0x007f, 0x0080,
03193 0x0060, 0x0000,
03194 0x0060, 0x0000,
03195 0x0060, 0x0000,
03196 0x0060, 0x0000,
03197 0x0060, 0x0000,
03198 0x007e, 0x0000,
03199 0x0060, 0x0000,
03200 0x0060, 0x0000,
03201 0x0060, 0x0000,
03202 0x0060, 0x0000,
03203 0x0060, 0x0000,
03204 0x0060, 0x0000,
03205 0x0000, 0x0000,
03206 0x0000, 0x0000,
03207 0x0000, 0x0000,
03208 0x0000, 0x0000,
03209
03210 /* Character (0x47):
03211    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03212    +----------------+
03213    |                |
03214    |                |
03215    |                |
03216    |   ****         |
03217    |  **  **        |
03218    | **    **       |
03219    | **             |
03220    | **             |
03221    | **             |
03222    | **  ****       |
03223    | **    **       |
03224    | **    **       |
03225    | **    **       |
03226    | **    **       |
03227    |  **  ***       |
03228    |   **** *       |
03229    |                |
03230    |                |
03231    |                |
03232    |                |
03233    +----------------+ */
03234 0x0000, 0x0000,
03235 0x0000, 0x0000,
03236 0x0000, 0x0000,
03237 0x001e, 0x0000,
03238 0x0033, 0x0000,
03239 0x0061, 0x0080,
03240 0x0060, 0x0000,
03241 0x0060, 0x0000,
03242 0x0060, 0x0000,
03243 0x0067, 0x0080,
03244 0x0061, 0x0080,
03245 0x0061, 0x0080,
03246 0x0061, 0x0080,
03247 0x0061, 0x0080,
03248 0x0033, 0x0080,
03249 0x001e, 0x0080,
03250 0x0000, 0x0000,
03251 0x0000, 0x0000,
03252 0x0000, 0x0000,
03253 0x0000, 0x0000,
03254
03255 /* Character (0x48):
03256    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03257    +----------------+
03258    |                |
03259    |                |
03260    |                |
03261    | **    **       |
03262    | **    **       |
03263    | **    **       |
03264    | **    **       |
03265    | **    **       |
03266    | **    **       |
03267    | ********       |
03268    | **    **       |
03269    | **    **       |
03270    | **    **       |
03271    | **    **       |
03272    | **    **       |
03273    | **    **       |
03274    |                |
03275    |                |
03276    |                |
03277    |                |
03278    +----------------+ */
03279 0x0000, 0x0000,
03280 0x0000, 0x0000,
03281 0x0000, 0x0000,
03282 0x0061, 0x0080,
03283 0x0061, 0x0080,
03284 0x0061, 0x0080,
03285 0x0061, 0x0080,
03286 0x0061, 0x0080,
03287 0x0061, 0x0080,
03288 0x007f, 0x0080,
03289 0x0061, 0x0080,
03290 0x0061, 0x0080,
03291 0x0061, 0x0080,
03292 0x0061, 0x0080,
03293 0x0061, 0x0080,
03294 0x0061, 0x0080,
03295 0x0000, 0x0000,
03296 0x0000, 0x0000,
03297 0x0000, 0x0000,
03298 0x0000, 0x0000,
03299
03300 /* Character (0x49):
03301    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03302    +----------------+
03303    |                |
03304    |                |
03305    |                |
03306    | ********       |
03307    |    **          |
03308    |    **          |
03309    |    **          |
03310    |    **          |
03311    |    **          |
03312    |    **          |
03313    |    **          |
03314    |    **          |
03315    |    **          |
03316    |    **          |
03317    |    **          |
03318    | ********       |
03319    |                |
03320    |                |
03321    |                |
03322    |                |
03323    +----------------+ */
03324 0x0000, 0x0000,
03325 0x0000, 0x0000,
03326 0x0000, 0x0000,
03327 0x007f, 0x0080,
03328 0x000c, 0x0000,
03329 0x000c, 0x0000,
03330 0x000c, 0x0000,
03331 0x000c, 0x0000,
03332 0x000c, 0x0000,
03333 0x000c, 0x0000,
03334 0x000c, 0x0000,
03335 0x000c, 0x0000,
03336 0x000c, 0x0000,
03337 0x000c, 0x0000,
03338 0x000c, 0x0000,
03339 0x007f, 0x0080,
03340 0x0000, 0x0000,
03341 0x0000, 0x0000,
03342 0x0000, 0x0000,
03343 0x0000, 0x0000,
03344
03345 /* Character (0x4a):
03346    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03347    +----------------+
03348    |                |
03349    |                |
03350    |                |
03351    |    ******      |
03352    |      **        |
03353    |      **        |
03354    |      **        |
03355    |      **        |
03356    |      **        |
03357    |      **        |
03358    |      **        |
03359    |      **        |
03360    | **   **        |
03361    | **   **        |
03362    |  ** **         |
03363    |   ***          |
03364    |                |
03365    |                |
03366    |                |
03367    |                |
03368    +----------------+ */
03369 0x0000, 0x0000,
03370 0x0000, 0x0000,
03371 0x0000, 0x0000,
03372 0x000f, 0x00c0,
03373 0x0003, 0x0000,
03374 0x0003, 0x0000,
03375 0x0003, 0x0000,
03376 0x0003, 0x0000,
03377 0x0003, 0x0000,
03378 0x0003, 0x0000,
03379 0x0003, 0x0000,
03380 0x0003, 0x0000,
03381 0x0063, 0x0000,
03382 0x0063, 0x0000,
03383 0x0036, 0x0000,
03384 0x001c, 0x0000,
03385 0x0000, 0x0000,
03386 0x0000, 0x0000,
03387 0x0000, 0x0000,
03388 0x0000, 0x0000,
03389
03390 /* Character (0x4b):
03391    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03392    +----------------+
03393    |                |
03394    |                |
03395    |                |
03396    | **    **       |
03397    | **    **       |
03398    | **   **        |
03399    | **   **        |
03400    | **  **         |
03401    | **  **         |
03402    | *****          |
03403    | **  **         |
03404    | **  **         |
03405    | **   **        |
03406    | **   **        |
03407    | **    **       |
03408    | **    **       |
03409    |                |
03410    |                |
03411    |                |
03412    |                |
03413    +----------------+ */
03414 0x0000, 0x0000,
03415 0x0000, 0x0000,
03416 0x0000, 0x0000,
03417 0x0061, 0x0080,
03418 0x0061, 0x0080,
03419 0x0063, 0x0000,
03420 0x0063, 0x0000,
03421 0x0066, 0x0000,
03422 0x0066, 0x0000,
03423 0x007c, 0x0000,
03424 0x0066, 0x0000,
03425 0x0066, 0x0000,
03426 0x0063, 0x0000,
03427 0x0063, 0x0000,
03428 0x0061, 0x0080,
03429 0x0061, 0x0080,
03430 0x0000, 0x0000,
03431 0x0000, 0x0000,
03432 0x0000, 0x0000,
03433 0x0000, 0x0000,
03434
03435 /* Character (0x4c):
03436    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03437    +----------------+
03438    |                |
03439    |                |
03440    |                |
03441    | **             |
03442    | **             |
03443    | **             |
03444    | **             |
03445    | **             |
03446    | **             |
03447    | **             |
03448    | **             |
03449    | **             |
03450    | **             |
03451    | **             |
03452    | **             |
03453    | ********       |
03454    |                |
03455    |                |
03456    |                |
03457    |                |
03458    +----------------+ */
03459 0x0000, 0x0000,
03460 0x0000, 0x0000,
03461 0x0000, 0x0000,
03462 0x0060, 0x0000,
03463 0x0060, 0x0000,
03464 0x0060, 0x0000,
03465 0x0060, 0x0000,
03466 0x0060, 0x0000,
03467 0x0060, 0x0000,
03468 0x0060, 0x0000,
03469 0x0060, 0x0000,
03470 0x0060, 0x0000,
03471 0x0060, 0x0000,
03472 0x0060, 0x0000,
03473 0x0060, 0x0000,
03474 0x007f, 0x0080,
03475 0x0000, 0x0000,
03476 0x0000, 0x0000,
03477 0x0000, 0x0000,
03478 0x0000, 0x0000,
03479
03480 /* Character (0x4d):
03481    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03482    +----------------+
03483    |                |
03484    |                |
03485    |                |
03486    | **    **       |
03487    | **    **       |
03488    | ***  ***       |
03489    | ***  ***       |
03490    | ********       |
03491    | ** ** **       |
03492    | ** ** **       |
03493    | ** ** **       |
03494    | ** ** **       |
03495    | **    **       |
03496    | **    **       |
03497    | **    **       |
03498    | **    **       |
03499    |                |
03500    |                |
03501    |                |
03502    |                |
03503    +----------------+ */
03504 0x0000, 0x0000,
03505 0x0000, 0x0000,
03506 0x0000, 0x0000,
03507 0x0061, 0x0080,
03508 0x0061, 0x0080,
03509 0x0073, 0x0080,
03510 0x0073, 0x0080,
03511 0x007f, 0x0080,
03512 0x006d, 0x0080,
03513 0x006d, 0x0080,
03514 0x006d, 0x0080,
03515 0x006d, 0x0080,
03516 0x0061, 0x0080,
03517 0x0061, 0x0080,
03518 0x0061, 0x0080,
03519 0x0061, 0x0080,
03520 0x0000, 0x0000,
03521 0x0000, 0x0000,
03522 0x0000, 0x0000,
03523 0x0000, 0x0000,
03524
03525 /* Character (0x4e):
03526    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03527    +----------------+
03528    |                |
03529    |                |
03530    |                |
03531    | **    **       |
03532    | ***   **       |
03533    | ***   **       |
03534    | ****  **       |
03535    | ****  **       |
03536    | ** ** **       |
03537    | ** ** **       |
03538    | **  ****       |
03539    | **  ****       |
03540    | **   ***       |
03541    | **   ***       |
03542    | **    **       |
03543    | **    **       |
03544    |                |
03545    |                |
03546    |                |
03547    |                |
03548    +----------------+ */
03549 0x0000, 0x0000,
03550 0x0000, 0x0000,
03551 0x0000, 0x0000,
03552 0x0061, 0x0080,
03553 0x0071, 0x0080,
03554 0x0071, 0x0080,
03555 0x0079, 0x0080,
03556 0x0079, 0x0080,
03557 0x006d, 0x0080,
03558 0x006d, 0x0080,
03559 0x0067, 0x0080,
03560 0x0067, 0x0080,
03561 0x0063, 0x0080,
03562 0x0063, 0x0080,
03563 0x0061, 0x0080,
03564 0x0061, 0x0080,
03565 0x0000, 0x0000,
03566 0x0000, 0x0000,
03567 0x0000, 0x0000,
03568 0x0000, 0x0000,
03569
03570 /* Character (0x4f):
03571    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03572    +----------------+
03573    |                |
03574    |                |
03575    |                |
03576    |   ****         |
03577    |  **  **        |
03578    | **    **       |
03579    | **    **       |
03580    | **    **       |
03581    | **    **       |
03582    | **    **       |
03583    | **    **       |
03584    | **    **       |
03585    | **    **       |
03586    | **    **       |
03587    |  **  **        |
03588    |   ****         |
03589    |                |
03590    |                |
03591    |                |
03592    |                |
03593    +----------------+ */
03594 0x0000, 0x0000,
03595 0x0000, 0x0000,
03596 0x0000, 0x0000,
03597 0x001e, 0x0000,
03598 0x0033, 0x0000,
03599 0x0061, 0x0080,
03600 0x0061, 0x0080,
03601 0x0061, 0x0080,
03602 0x0061, 0x0080,
03603 0x0061, 0x0080,
03604 0x0061, 0x0080,
03605 0x0061, 0x0080,
03606 0x0061, 0x0080,
03607 0x0061, 0x0080,
03608 0x0033, 0x0000,
03609 0x001e, 0x0000,
03610 0x0000, 0x0000,
03611 0x0000, 0x0000,
03612 0x0000, 0x0000,
03613 0x0000, 0x0000,
03614
03615 /* Character (0x50):
03616    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03617    +----------------+
03618    |                |
03619    |                |
03620    |                |
03621    | ******         |
03622    | **   **        |
03623    | **    **       |
03624    | **    **       |
03625    | **    **       |
03626    | **    **       |
03627    | **   **        |
03628    | ******         |
03629    | **             |
03630    | **             |
03631    | **             |
03632    | **             |
03633    | **             |
03634    |                |
03635    |                |
03636    |                |
03637    |                |
03638    +----------------+ */
03639 0x0000, 0x0000,
03640 0x0000, 0x0000,
03641 0x0000, 0x0000,
03642 0x007e, 0x0000,
03643 0x0063, 0x0000,
03644 0x0061, 0x0080,
03645 0x0061, 0x0080,
03646 0x0061, 0x0080,
03647 0x0061, 0x0080,
03648 0x0063, 0x0000,
03649 0x007e, 0x0000,
03650 0x0060, 0x0000,
03651 0x0060, 0x0000,
03652 0x0060, 0x0000,
03653 0x0060, 0x0000,
03654 0x0060, 0x0000,
03655 0x0000, 0x0000,
03656 0x0000, 0x0000,
03657 0x0000, 0x0000,
03658 0x0000, 0x0000,
03659
03660 /* Character (0x51):
03661    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03662    +----------------+
03663    |                |
03664    |                |
03665    |                |
03666    |   ****         |
03667    |  **  **        |
03668    | **    **       |
03669    | **    **       |
03670    | **    **       |
03671    | **    **       |
03672    | **    **       |
03673    | **    **       |
03674    | **    **       |
03675    | ** ** **       |
03676    | **  ****       |
03677    |  **  **        |
03678    |   *****        |
03679    |       **       |
03680    |                |
03681    |                |
03682    |                |
03683    +----------------+ */
03684 0x0000, 0x0000,
03685 0x0000, 0x0000,
03686 0x0000, 0x0000,
03687 0x001e, 0x0000,
03688 0x0033, 0x0000,
03689 0x0061, 0x0080,
03690 0x0061, 0x0080,
03691 0x0061, 0x0080,
03692 0x0061, 0x0080,
03693 0x0061, 0x0080,
03694 0x0061, 0x0080,
03695 0x0061, 0x0080,
03696 0x006d, 0x0080,
03697 0x0067, 0x0080,
03698 0x0033, 0x0000,
03699 0x001f, 0x0000,
03700 0x0001, 0x0080,
03701 0x0000, 0x0000,
03702 0x0000, 0x0000,
03703 0x0000, 0x0000,
03704
03705 /* Character (0x52):
03706    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03707    +----------------+
03708    |                |
03709    |                |
03710    |                |
03711    | ******         |
03712    | **   **        |
03713    | **    **       |
03714    | **    **       |
03715    | **    **       |
03716    | **    **       |
03717    | **   **        |
03718    | ******         |
03719    | **  **         |
03720    | **   **        |
03721    | **   **        |
03722    | **    **       |
03723    | **    **       |
03724    |                |
03725    |                |
03726    |                |
03727    |                |
03728    +----------------+ */
03729 0x0000, 0x0000,
03730 0x0000, 0x0000,
03731 0x0000, 0x0000,
03732 0x007e, 0x0000,
03733 0x0063, 0x0000,
03734 0x0061, 0x0080,
03735 0x0061, 0x0080,
03736 0x0061, 0x0080,
03737 0x0061, 0x0080,
03738 0x0063, 0x0000,
03739 0x007e, 0x0000,
03740 0x0066, 0x0000,
03741 0x0063, 0x0000,
03742 0x0063, 0x0000,
03743 0x0061, 0x0080,
03744 0x0061, 0x0080,
03745 0x0000, 0x0000,
03746 0x0000, 0x0000,
03747 0x0000, 0x0000,
03748 0x0000, 0x0000,
03749
03750 /* Character (0x53):
03751    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03752    +----------------+
03753    |                |
03754    |                |
03755    |                |
03756    |   ****         |
03757    |  **  **        |
03758    | **    **       |
03759    | **             |
03760    | **             |
03761    |  **            |
03762    |   ****         |
03763    |      **        |
03764    |       **       |
03765    |       **       |
03766    | **    **       |
03767    |  **  **        |
03768    |   ****         |
03769    |                |
03770    |                |
03771    |                |
03772    |                |
03773    +----------------+ */
03774 0x0000, 0x0000,
03775 0x0000, 0x0000,
03776 0x0000, 0x0000,
03777 0x001e, 0x0000,
03778 0x0033, 0x0000,
03779 0x0061, 0x0080,
03780 0x0060, 0x0000,
03781 0x0060, 0x0000,
03782 0x0030, 0x0000,
03783 0x001e, 0x0000,
03784 0x0003, 0x0000,
03785 0x0001, 0x0080,
03786 0x0001, 0x0080,
03787 0x0061, 0x0080,
03788 0x0033, 0x0000,
03789 0x001e, 0x0000,
03790 0x0000, 0x0000,
03791 0x0000, 0x0000,
03792 0x0000, 0x0000,
03793 0x0000, 0x0000,
03794
03795 /* Character (0x54):
03796    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03797    +----------------+
03798    |                |
03799    |                |
03800    |                |
03801    | ********       |
03802    |    **          |
03803    |    **          |
03804    |    **          |
03805    |    **          |
03806    |    **          |
03807    |    **          |
03808    |    **          |
03809    |    **          |
03810    |    **          |
03811    |    **          |
03812    |    **          |
03813    |    **          |
03814    |                |
03815    |                |
03816    |                |
03817    |                |
03818    +----------------+ */
03819 0x0000, 0x0000,
03820 0x0000, 0x0000,
03821 0x0000, 0x0000,
03822 0x007f, 0x0080,
03823 0x000c, 0x0000,
03824 0x000c, 0x0000,
03825 0x000c, 0x0000,
03826 0x000c, 0x0000,
03827 0x000c, 0x0000,
03828 0x000c, 0x0000,
03829 0x000c, 0x0000,
03830 0x000c, 0x0000,
03831 0x000c, 0x0000,
03832 0x000c, 0x0000,
03833 0x000c, 0x0000,
03834 0x000c, 0x0000,
03835 0x0000, 0x0000,
03836 0x0000, 0x0000,
03837 0x0000, 0x0000,
03838 0x0000, 0x0000,
03839
03840 /* Character (0x55):
03841    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03842    +----------------+
03843    |                |
03844    |                |
03845    |                |
03846    | **    **       |
03847    | **    **       |
03848    | **    **       |
03849    | **    **       |
03850    | **    **       |
03851    | **    **       |
03852    | **    **       |
03853    | **    **       |
03854    | **    **       |
03855    | **    **       |
03856    | **    **       |
03857    |  **  **        |
03858    |   ****         |
03859    |                |
03860    |                |
03861    |                |
03862    |                |
03863    +----------------+ */
03864 0x0000, 0x0000,
03865 0x0000, 0x0000,
03866 0x0000, 0x0000,
03867 0x0061, 0x0080,
03868 0x0061, 0x0080,
03869 0x0061, 0x0080,
03870 0x0061, 0x0080,
03871 0x0061, 0x0080,
03872 0x0061, 0x0080,
03873 0x0061, 0x0080,
03874 0x0061, 0x0080,
03875 0x0061, 0x0080,
03876 0x0061, 0x0080,
03877 0x0061, 0x0080,
03878 0x0033, 0x0000,
03879 0x001e, 0x0000,
03880 0x0000, 0x0000,
03881 0x0000, 0x0000,
03882 0x0000, 0x0000,
03883 0x0000, 0x0000,
03884
03885 /* Character (0x56):
03886    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03887    +----------------+
03888    |                |
03889    |                |
03890    |                |
03891    | **    **       |
03892    | **    **       |
03893    | **    **       |
03894    | **    **       |
03895    |  **  **        |
03896    |  **  **        |
03897    |  **  **        |
03898    |   ****         |
03899    |   ****         |
03900    |   ****         |
03901    |    **          |
03902    |    **          |
03903    |    **          |
03904    |                |
03905    |                |
03906    |                |
03907    |                |
03908    +----------------+ */
03909 0x0000, 0x0000,
03910 0x0000, 0x0000,
03911 0x0000, 0x0000,
03912 0x0061, 0x0080,
03913 0x0061, 0x0080,
03914 0x0061, 0x0080,
03915 0x0061, 0x0080,
03916 0x0033, 0x0000,
03917 0x0033, 0x0000,
03918 0x0033, 0x0000,
03919 0x001e, 0x0000,
03920 0x001e, 0x0000,
03921 0x001e, 0x0000,
03922 0x000c, 0x0000,
03923 0x000c, 0x0000,
03924 0x000c, 0x0000,
03925 0x0000, 0x0000,
03926 0x0000, 0x0000,
03927 0x0000, 0x0000,
03928 0x0000, 0x0000,
03929
03930 /* Character (0x57):
03931    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03932    +----------------+
03933    |                |
03934    |                |
03935    |                |
03936    | **    **       |
03937    | **    **       |
03938    | **    **       |
03939    | **    **       |
03940    | **    **       |
03941    | ** ** **       |
03942    | ** ** **       |
03943    | ** ** **       |
03944    | ** ** **       |
03945    | ***  ***       |
03946    | ***  ***       |
03947    | **    **       |
03948    | **    **       |
03949    |                |
03950    |                |
03951    |                |
03952    |                |
03953    +----------------+ */
03954 0x0000, 0x0000,
03955 0x0000, 0x0000,
03956 0x0000, 0x0000,
03957 0x0061, 0x0080,
03958 0x0061, 0x0080,
03959 0x0061, 0x0080,
03960 0x0061, 0x0080,
03961 0x0061, 0x0080,
03962 0x006d, 0x0080,
03963 0x006d, 0x0080,
03964 0x006d, 0x0080,
03965 0x006d, 0x0080,
03966 0x0073, 0x0080,
03967 0x0073, 0x0080,
03968 0x0061, 0x0080,
03969 0x0061, 0x0080,
03970 0x0000, 0x0000,
03971 0x0000, 0x0000,
03972 0x0000, 0x0000,
03973 0x0000, 0x0000,
03974
03975 /* Character (0x58):
03976    bbw=10, bbh=20, bbx=0, bby=-4, width=10
03977    +----------------+
03978    |                |
03979    |                |
03980    |                |
03981    | **    **       |
03982    | **    **       |
03983    |  **  **        |
03984    |  **  **        |
03985    |   ****         |
03986    |   ****         |
03987    |    **          |
03988    |   ****         |
03989    |   ****         |
03990    |  **  **        |
03991    |  **  **        |
03992    | **    **       |
03993    | **    **       |
03994    |                |
03995    |                |
03996    |                |
03997    |                |
03998    +----------------+ */
03999 0x0000, 0x0000,
04000 0x0000, 0x0000,
04001 0x0000, 0x0000,
04002 0x0061, 0x0080,
04003 0x0061, 0x0080,
04004 0x0033, 0x0000,
04005 0x0033, 0x0000,
04006 0x001e, 0x0000,
04007 0x001e, 0x0000,
04008 0x000c, 0x0000,
04009 0x001e, 0x0000,
04010 0x001e, 0x0000,
04011 0x0033, 0x0000,
04012 0x0033, 0x0000,
04013 0x0061, 0x0080,
04014 0x0061, 0x0080,
04015 0x0000, 0x0000,
04016 0x0000, 0x0000,
04017 0x0000, 0x0000,
04018 0x0000, 0x0000,
04019
04020 /* Character (0x59):
04021    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04022    +----------------+
04023    |                |
04024    |                |
04025    |                |
04026    | **    **       |
04027    | **    **       |
04028    |  **  **        |
04029    |  **  **        |
04030    |   ****         |
04031    |   ****         |
04032    |    **          |
04033    |    **          |
04034    |    **          |
04035    |    **          |
04036    |    **          |
04037    |    **          |
04038    |    **          |
04039    |                |
04040    |                |
04041    |                |
04042    |                |
04043    +----------------+ */
04044 0x0000, 0x0000,
04045 0x0000, 0x0000,
04046 0x0000, 0x0000,
04047 0x0061, 0x0080,
04048 0x0061, 0x0080,
04049 0x0033, 0x0000,
04050 0x0033, 0x0000,
04051 0x001e, 0x0000,
04052 0x001e, 0x0000,
04053 0x000c, 0x0000,
04054 0x000c, 0x0000,
04055 0x000c, 0x0000,
04056 0x000c, 0x0000,
04057 0x000c, 0x0000,
04058 0x000c, 0x0000,
04059 0x000c, 0x0000,
04060 0x0000, 0x0000,
04061 0x0000, 0x0000,
04062 0x0000, 0x0000,
04063 0x0000, 0x0000,
04064
04065 /* Character (0x5a):
04066    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04067    +----------------+
04068    |                |
04069    |                |
04070    |                |
04071    | ********       |
04072    |       **       |
04073    |       **       |
04074    |      **        |
04075    |     **         |
04076    |     **         |
04077    |    **          |
04078    |   **           |
04079    |   **           |
04080    |  **            |
04081    | **             |
04082    | **             |
04083    | ********       |
04084    |                |
04085    |                |
04086    |                |
04087    |                |
04088    +----------------+ */
04089 0x0000, 0x0000,
04090 0x0000, 0x0000,
04091 0x0000, 0x0000,
04092 0x007f, 0x0080,
04093 0x0001, 0x0080,
04094 0x0001, 0x0080,
04095 0x0003, 0x0000,
04096 0x0006, 0x0000,
04097 0x0006, 0x0000,
04098 0x000c, 0x0000,
04099 0x0018, 0x0000,
04100 0x0018, 0x0000,
04101 0x0030, 0x0000,
04102 0x0060, 0x0000,
04103 0x0060, 0x0000,
04104 0x007f, 0x0080,
04105 0x0000, 0x0000,
04106 0x0000, 0x0000,
04107 0x0000, 0x0000,
04108 0x0000, 0x0000,
04109
04110 /* Character (0x5b):
04111    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04112    +----------------+
04113    |                |
04114    |                |
04115    |                |
04116    |  ******        |
04117    |  **            |
04118    |  **            |
04119    |  **            |
04120    |  **            |
04121    |  **            |
04122    |  **            |
04123    |  **            |
04124    |  **            |
04125    |  **            |
04126    |  **            |
04127    |  **            |
04128    |  ******        |
04129    |                |
04130    |                |
04131    |                |
04132    |                |
04133    +----------------+ */
04134 0x0000, 0x0000,
04135 0x0000, 0x0000,
04136 0x0000, 0x0000,
04137 0x003f, 0x0000,
04138 0x0030, 0x0000,
04139 0x0030, 0x0000,
04140 0x0030, 0x0000,
04141 0x0030, 0x0000,
04142 0x0030, 0x0000,
04143 0x0030, 0x0000,
04144 0x0030, 0x0000,
04145 0x0030, 0x0000,
04146 0x0030, 0x0000,
04147 0x0030, 0x0000,
04148 0x0030, 0x0000,
04149 0x003f, 0x0000,
04150 0x0000, 0x0000,
04151 0x0000, 0x0000,
04152 0x0000, 0x0000,
04153 0x0000, 0x0000,
04154
04155 /* Character (0x5c):
04156    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04157    +----------------+
04158    |                |
04159    |                |
04160    |                |
04161    |                |
04162    |  **            |
04163    |  **            |
04164    |   **           |
04165    |   **           |
04166    |    **          |
04167    |    **          |
04168    |     **         |
04169    |     **         |
04170    |      **        |
04171    |      **        |
04172    |       **       |
04173    |       **       |
04174    |                |
04175    |                |
04176    |                |
04177    |                |
04178    +----------------+ */
04179 0x0000, 0x0000,
04180 0x0000, 0x0000,
04181 0x0000, 0x0000,
04182 0x0000, 0x0000,
04183 0x0030, 0x0000,
04184 0x0030, 0x0000,
04185 0x0018, 0x0000,
04186 0x0018, 0x0000,
04187 0x000c, 0x0000,
04188 0x000c, 0x0000,
04189 0x0006, 0x0000,
04190 0x0006, 0x0000,
04191 0x0003, 0x0000,
04192 0x0003, 0x0000,
04193 0x0001, 0x0080,
04194 0x0001, 0x0080,
04195 0x0000, 0x0000,
04196 0x0000, 0x0000,
04197 0x0000, 0x0000,
04198 0x0000, 0x0000,
04199
04200 /* Character (0x5d):
04201    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04202    +----------------+
04203    |                |
04204    |                |
04205    |                |
04206    |  ******        |
04207    |      **        |
04208    |      **        |
04209    |      **        |
04210    |      **        |
04211    |      **        |
04212    |      **        |
04213    |      **        |
04214    |      **        |
04215    |      **        |
04216    |      **        |
04217    |      **        |
04218    |  ******        |
04219    |                |
04220    |                |
04221    |                |
04222    |                |
04223    +----------------+ */
04224 0x0000, 0x0000,
04225 0x0000, 0x0000,
04226 0x0000, 0x0000,
04227 0x003f, 0x0000,
04228 0x0003, 0x0000,
04229 0x0003, 0x0000,
04230 0x0003, 0x0000,
04231 0x0003, 0x0000,
04232 0x0003, 0x0000,
04233 0x0003, 0x0000,
04234 0x0003, 0x0000,
04235 0x0003, 0x0000,
04236 0x0003, 0x0000,
04237 0x0003, 0x0000,
04238 0x0003, 0x0000,
04239 0x003f, 0x0000,
04240 0x0000, 0x0000,
04241 0x0000, 0x0000,
04242 0x0000, 0x0000,
04243 0x0000, 0x0000,
04244
04245 /* Character (0x5e):
04246    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04247    +----------------+
04248    |                |
04249    |                |
04250    |                |
04251    |    **          |
04252    |   ****         |
04253    |  **  **        |
04254    | **    **       |
04255    |                |
04256    |                |
04257    |                |
04258    |                |
04259    |                |
04260    |                |
04261    |                |
04262    |                |
04263    |                |
04264    |                |
04265    |                |
04266    |                |
04267    |                |
04268    +----------------+ */
04269 0x0000, 0x0000,
04270 0x0000, 0x0000,
04271 0x0000, 0x0000,
04272 0x000c, 0x0000,
04273 0x001e, 0x0000,
04274 0x0033, 0x0000,
04275 0x0061, 0x0080,
04276 0x0000, 0x0000,
04277 0x0000, 0x0000,
04278 0x0000, 0x0000,
04279 0x0000, 0x0000,
04280 0x0000, 0x0000,
04281 0x0000, 0x0000,
04282 0x0000, 0x0000,
04283 0x0000, 0x0000,
04284 0x0000, 0x0000,
04285 0x0000, 0x0000,
04286 0x0000, 0x0000,
04287 0x0000, 0x0000,
04288 0x0000, 0x0000,
04289
04290 /* Character (0x5f):
04291    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04292    +----------------+
04293    |                |
04294    |                |
04295    |                |
04296    |                |
04297    |                |
04298    |                |
04299    |                |
04300    |                |
04301    |                |
04302    |                |
04303    |                |
04304    |                |
04305    |                |
04306    |                |
04307    |                |
04308    |                |
04309    | *********      |
04310    |                |
04311    |                |
04312    |                |
04313    +----------------+ */
04314 0x0000, 0x0000,
04315 0x0000, 0x0000,
04316 0x0000, 0x0000,
04317 0x0000, 0x0000,
04318 0x0000, 0x0000,
04319 0x0000, 0x0000,
04320 0x0000, 0x0000,
04321 0x0000, 0x0000,
04322 0x0000, 0x0000,
04323 0x0000, 0x0000,
04324 0x0000, 0x0000,
04325 0x0000, 0x0000,
04326 0x0000, 0x0000,
04327 0x0000, 0x0000,
04328 0x0000, 0x0000,
04329 0x0000, 0x0000,
04330 0x007f, 0x00c0,
04331 0x0000, 0x0000,
04332 0x0000, 0x0000,
04333 0x0000, 0x0000,
04334
04335 /* Character (0x60):
04336    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04337    +----------------+
04338    |                |
04339    |                |
04340    |                |
04341    |   **           |
04342    |    **          |
04343    |     **         |
04344    |                |
04345    |                |
04346    |                |
04347    |                |
04348    |                |
04349    |                |
04350    |                |
04351    |                |
04352    |                |
04353    |                |
04354    |                |
04355    |                |
04356    |                |
04357    |                |
04358    +----------------+ */
04359 0x0000, 0x0000,
04360 0x0000, 0x0000,
04361 0x0000, 0x0000,
04362 0x0018, 0x0000,
04363 0x000c, 0x0000,
04364 0x0006, 0x0000,
04365 0x0000, 0x0000,
04366 0x0000, 0x0000,
04367 0x0000, 0x0000,
04368 0x0000, 0x0000,
04369 0x0000, 0x0000,
04370 0x0000, 0x0000,
04371 0x0000, 0x0000,
04372 0x0000, 0x0000,
04373 0x0000, 0x0000,
04374 0x0000, 0x0000,
04375 0x0000, 0x0000,
04376 0x0000, 0x0000,
04377 0x0000, 0x0000,
04378 0x0000, 0x0000,
04379
04380 /* Character (0x61):
04381    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04382    +----------------+
04383    |                |
04384    |                |
04385    |                |
04386    |                |
04387    |                |
04388    |                |
04389    |                |
04390    |                |
04391    |   *****        |
04392    |  **   **       |
04393    |       **       |
04394    |  *******       |
04395    | **    **       |
04396    | **    **       |
04397    | **    **       |
04398    |  ***** *       |
04399    |                |
04400    |                |
04401    |                |
04402    |                |
04403    +----------------+ */
04404 0x0000, 0x0000,
04405 0x0000, 0x0000,
04406 0x0000, 0x0000,
04407 0x0000, 0x0000,
04408 0x0000, 0x0000,
04409 0x0000, 0x0000,
04410 0x0000, 0x0000,
04411 0x0000, 0x0000,
04412 0x001f, 0x0000,
04413 0x0031, 0x0080,
04414 0x0001, 0x0080,
04415 0x003f, 0x0080,
04416 0x0061, 0x0080,
04417 0x0061, 0x0080,
04418 0x0061, 0x0080,
04419 0x003e, 0x0080,
04420 0x0000, 0x0000,
04421 0x0000, 0x0000,
04422 0x0000, 0x0000,
04423 0x0000, 0x0000,
04424
04425 /* Character (0x62):
04426    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04427    +----------------+
04428    |                |
04429    |                |
04430    |                |
04431    | **             |
04432    | **             |
04433    | **             |
04434    | **             |
04435    | **             |
04436    | ** ***         |
04437    | ***  **        |
04438    | **    **       |
04439    | **    **       |
04440    | **    **       |
04441    | **    **       |
04442    | ***  **        |
04443    | ** ***         |
04444    |                |
04445    |                |
04446    |                |
04447    |                |
04448    +----------------+ */
04449 0x0000, 0x0000,
04450 0x0000, 0x0000,
04451 0x0000, 0x0000,
04452 0x0060, 0x0000,
04453 0x0060, 0x0000,
04454 0x0060, 0x0000,
04455 0x0060, 0x0000,
04456 0x0060, 0x0000,
04457 0x006e, 0x0000,
04458 0x0073, 0x0000,
04459 0x0061, 0x0080,
04460 0x0061, 0x0080,
04461 0x0061, 0x0080,
04462 0x0061, 0x0080,
04463 0x0073, 0x0000,
04464 0x006e, 0x0000,
04465 0x0000, 0x0000,
04466 0x0000, 0x0000,
04467 0x0000, 0x0000,
04468 0x0000, 0x0000,
04469
04470 /* Character (0x63):
04471    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04472    +----------------+
04473    |                |
04474    |                |
04475    |                |
04476    |                |
04477    |                |
04478    |                |
04479    |                |
04480    |                |
04481    |   *****        |
04482    |  **   **       |
04483    | **             |
04484    | **             |
04485    | **             |
04486    | **             |
04487    |  **   **       |
04488    |   *****        |
04489    |                |
04490    |                |
04491    |                |
04492    |                |
04493    +----------------+ */
04494 0x0000, 0x0000,
04495 0x0000, 0x0000,
04496 0x0000, 0x0000,
04497 0x0000, 0x0000,
04498 0x0000, 0x0000,
04499 0x0000, 0x0000,
04500 0x0000, 0x0000,
04501 0x0000, 0x0000,
04502 0x001f, 0x0000,
04503 0x0031, 0x0080,
04504 0x0060, 0x0000,
04505 0x0060, 0x0000,
04506 0x0060, 0x0000,
04507 0x0060, 0x0000,
04508 0x0031, 0x0080,
04509 0x001f, 0x0000,
04510 0x0000, 0x0000,
04511 0x0000, 0x0000,
04512 0x0000, 0x0000,
04513 0x0000, 0x0000,
04514
04515 /* Character (0x64):
04516    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04517    +----------------+
04518    |                |
04519    |                |
04520    |                |
04521    |       **       |
04522    |       **       |
04523    |       **       |
04524    |       **       |
04525    |       **       |
04526    |   *** **       |
04527    |  **  ***       |
04528    | **    **       |
04529    | **    **       |
04530    | **    **       |
04531    | **    **       |
04532    |  **  ***       |
04533    |   *** **       |
04534    |                |
04535    |                |
04536    |                |
04537    |                |
04538    +----------------+ */
04539 0x0000, 0x0000,
04540 0x0000, 0x0000,
04541 0x0000, 0x0000,
04542 0x0001, 0x0080,
04543 0x0001, 0x0080,
04544 0x0001, 0x0080,
04545 0x0001, 0x0080,
04546 0x0001, 0x0080,
04547 0x001d, 0x0080,
04548 0x0033, 0x0080,
04549 0x0061, 0x0080,
04550 0x0061, 0x0080,
04551 0x0061, 0x0080,
04552 0x0061, 0x0080,
04553 0x0033, 0x0080,
04554 0x001d, 0x0080,
04555 0x0000, 0x0000,
04556 0x0000, 0x0000,
04557 0x0000, 0x0000,
04558 0x0000, 0x0000,
04559
04560 /* Character (0x65):
04561    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04562    +----------------+
04563    |                |
04564    |                |
04565    |                |
04566    |                |
04567    |                |
04568    |                |
04569    |                |
04570    |                |
04571    |   ****         |
04572    |  **  **        |
04573    | **    **       |
04574    | ********       |
04575    | **             |
04576    | **             |
04577    |  **   **       |
04578    |   *****        |
04579    |                |
04580    |                |
04581    |                |
04582    |                |
04583    +----------------+ */
04584 0x0000, 0x0000,
04585 0x0000, 0x0000,
04586 0x0000, 0x0000,
04587 0x0000, 0x0000,
04588 0x0000, 0x0000,
04589 0x0000, 0x0000,
04590 0x0000, 0x0000,
04591 0x0000, 0x0000,
04592 0x001e, 0x0000,
04593 0x0033, 0x0000,
04594 0x0061, 0x0080,
04595 0x007f, 0x0080,
04596 0x0060, 0x0000,
04597 0x0060, 0x0000,
04598 0x0031, 0x0080,
04599 0x001f, 0x0000,
04600 0x0000, 0x0000,
04601 0x0000, 0x0000,
04602 0x0000, 0x0000,
04603 0x0000, 0x0000,
04604
04605 /* Character (0x66):
04606    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04607    +----------------+
04608    |                |
04609    |                |
04610    |                |
04611    |    ****        |
04612    |   **  **       |
04613    |   **  **       |
04614    |   **           |
04615    |   **           |
04616    | ******         |
04617    |   **           |
04618    |   **           |
04619    |   **           |
04620    |   **           |
04621    |   **           |
04622    |   **           |
04623    |   **           |
04624    |                |
04625    |                |
04626    |                |
04627    |                |
04628    +----------------+ */
04629 0x0000, 0x0000,
04630 0x0000, 0x0000,
04631 0x0000, 0x0000,
04632 0x000f, 0x0000,
04633 0x0019, 0x0080,
04634 0x0019, 0x0080,
04635 0x0018, 0x0000,
04636 0x0018, 0x0000,
04637 0x007e, 0x0000,
04638 0x0018, 0x0000,
04639 0x0018, 0x0000,
04640 0x0018, 0x0000,
04641 0x0018, 0x0000,
04642 0x0018, 0x0000,
04643 0x0018, 0x0000,
04644 0x0018, 0x0000,
04645 0x0000, 0x0000,
04646 0x0000, 0x0000,
04647 0x0000, 0x0000,
04648 0x0000, 0x0000,
04649
04650 /* Character (0x67):
04651    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04652    +----------------+
04653    |                |
04654    |                |
04655    |                |
04656    |                |
04657    |                |
04658    |                |
04659    |                |
04660    |                |
04661    |  ***** *       |
04662    | **   ***       |
04663    | **   **        |
04664    | **   **        |
04665    | **   **        |
04666    |  *****         |
04667    | **             |
04668    |  ******        |
04669    | **    **       |
04670    | **    **       |
04671    | **    **       |
04672    |  ******        |
04673    +----------------+ */
04674 0x0000, 0x0000,
04675 0x0000, 0x0000,
04676 0x0000, 0x0000,
04677 0x0000, 0x0000,
04678 0x0000, 0x0000,
04679 0x0000, 0x0000,
04680 0x0000, 0x0000,
04681 0x0000, 0x0000,
04682 0x003e, 0x0080,
04683 0x0063, 0x0080,
04684 0x0063, 0x0000,
04685 0x0063, 0x0000,
04686 0x0063, 0x0000,
04687 0x003e, 0x0000,
04688 0x0060, 0x0000,
04689 0x003f, 0x0000,
04690 0x0061, 0x0080,
04691 0x0061, 0x0080,
04692 0x0061, 0x0080,
04693 0x003f, 0x0000,
04694
04695 /* Character (0x68):
04696    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04697    +----------------+
04698    |                |
04699    |                |
04700    |                |
04701    | **             |
04702    | **             |
04703    | **             |
04704    | **             |
04705    | **             |
04706    | ** ***         |
04707    | ***  **        |
04708    | **    **       |
04709    | **    **       |
04710    | **    **       |
04711    | **    **       |
04712    | **    **       |
04713    | **    **       |
04714    |                |
04715    |                |
04716    |                |
04717    |                |
04718    +----------------+ */
04719 0x0000, 0x0000,
04720 0x0000, 0x0000,
04721 0x0000, 0x0000,
04722 0x0060, 0x0000,
04723 0x0060, 0x0000,
04724 0x0060, 0x0000,
04725 0x0060, 0x0000,
04726 0x0060, 0x0000,
04727 0x006e, 0x0000,
04728 0x0073, 0x0000,
04729 0x0061, 0x0080,
04730 0x0061, 0x0080,
04731 0x0061, 0x0080,
04732 0x0061, 0x0080,
04733 0x0061, 0x0080,
04734 0x0061, 0x0080,
04735 0x0000, 0x0000,
04736 0x0000, 0x0000,
04737 0x0000, 0x0000,
04738 0x0000, 0x0000,
04739
04740 /* Character (0x69):
04741    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04742    +----------------+
04743    |                |
04744    |                |
04745    |                |
04746    |                |
04747    |                |
04748    |    **          |
04749    |    **          |
04750    |                |
04751    |  ****          |
04752    |    **          |
04753    |    **          |
04754    |    **          |
04755    |    **          |
04756    |    **          |
04757    |    **          |
04758    | ********       |
04759    |                |
04760    |                |
04761    |                |
04762    |                |
04763    +----------------+ */
04764 0x0000, 0x0000,
04765 0x0000, 0x0000,
04766 0x0000, 0x0000,
04767 0x0000, 0x0000,
04768 0x0000, 0x0000,
04769 0x000c, 0x0000,
04770 0x000c, 0x0000,
04771 0x0000, 0x0000,
04772 0x003c, 0x0000,
04773 0x000c, 0x0000,
04774 0x000c, 0x0000,
04775 0x000c, 0x0000,
04776 0x000c, 0x0000,
04777 0x000c, 0x0000,
04778 0x000c, 0x0000,
04779 0x007f, 0x0080,
04780 0x0000, 0x0000,
04781 0x0000, 0x0000,
04782 0x0000, 0x0000,
04783 0x0000, 0x0000,
04784
04785 /* Character (0x6a):
04786    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04787    +----------------+
04788    |                |
04789    |                |
04790    |                |
04791    |                |
04792    |                |
04793    |       **       |
04794    |       **       |
04795    |                |
04796    |     ****       |
04797    |       **       |
04798    |       **       |
04799    |       **       |
04800    |       **       |
04801    |       **       |
04802    |       **       |
04803    |       **       |
04804    |  **   **       |
04805    |  **   **       |
04806    |  **   **       |
04807    |   *****        |
04808    +----------------+ */
04809 0x0000, 0x0000,
04810 0x0000, 0x0000,
04811 0x0000, 0x0000,
04812 0x0000, 0x0000,
04813 0x0000, 0x0000,
04814 0x0001, 0x0080,
04815 0x0001, 0x0080,
04816 0x0000, 0x0000,
04817 0x0007, 0x0080,
04818 0x0001, 0x0080,
04819 0x0001, 0x0080,
04820 0x0001, 0x0080,
04821 0x0001, 0x0080,
04822 0x0001, 0x0080,
04823 0x0001, 0x0080,
04824 0x0001, 0x0080,
04825 0x0031, 0x0080,
04826 0x0031, 0x0080,
04827 0x0031, 0x0080,
04828 0x001f, 0x0000,
04829
04830 /* Character (0x6b):
04831    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04832    +----------------+
04833    |                |
04834    |                |
04835    |                |
04836    | **             |
04837    | **             |
04838    | **             |
04839    | **             |
04840    | **             |
04841    | **   **        |
04842    | **  **         |
04843    | ** **          |
04844    | ****           |
04845    | *****          |
04846    | **  **         |
04847    | **   **        |
04848    | **    **       |
04849    |                |
04850    |                |
04851    |                |
04852    |                |
04853    +----------------+ */
04854 0x0000, 0x0000,
04855 0x0000, 0x0000,
04856 0x0000, 0x0000,
04857 0x0060, 0x0000,
04858 0x0060, 0x0000,
04859 0x0060, 0x0000,
04860 0x0060, 0x0000,
04861 0x0060, 0x0000,
04862 0x0063, 0x0000,
04863 0x0066, 0x0000,
04864 0x006c, 0x0000,
04865 0x0078, 0x0000,
04866 0x007c, 0x0000,
04867 0x0066, 0x0000,
04868 0x0063, 0x0000,
04869 0x0061, 0x0080,
04870 0x0000, 0x0000,
04871 0x0000, 0x0000,
04872 0x0000, 0x0000,
04873 0x0000, 0x0000,
04874
04875 /* Character (0x6c):
04876    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04877    +----------------+
04878    |                |
04879    |                |
04880    |                |
04881    |  ****          |
04882    |    **          |
04883    |    **          |
04884    |    **          |
04885    |    **          |
04886    |    **          |
04887    |    **          |
04888    |    **          |
04889    |    **          |
04890    |    **          |
04891    |    **          |
04892    |    **          |
04893    | ********       |
04894    |                |
04895    |                |
04896    |                |
04897    |                |
04898    +----------------+ */
04899 0x0000, 0x0000,
04900 0x0000, 0x0000,
04901 0x0000, 0x0000,
04902 0x003c, 0x0000,
04903 0x000c, 0x0000,
04904 0x000c, 0x0000,
04905 0x000c, 0x0000,
04906 0x000c, 0x0000,
04907 0x000c, 0x0000,
04908 0x000c, 0x0000,
04909 0x000c, 0x0000,
04910 0x000c, 0x0000,
04911 0x000c, 0x0000,
04912 0x000c, 0x0000,
04913 0x000c, 0x0000,
04914 0x007f, 0x0080,
04915 0x0000, 0x0000,
04916 0x0000, 0x0000,
04917 0x0000, 0x0000,
04918 0x0000, 0x0000,
04919
04920 /* Character (0x6d):
04921    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04922    +----------------+
04923    |                |
04924    |                |
04925    |                |
04926    |                |
04927    |                |
04928    |                |
04929    |                |
04930    |                |
04931    | * ** **        |
04932    | ********       |
04933    | ** ** **       |
04934    | ** ** **       |
04935    | ** ** **       |
04936    | ** ** **       |
04937    | ** ** **       |
04938    | ** ** **       |
04939    |                |
04940    |                |
04941    |                |
04942    |                |
04943    +----------------+ */
04944 0x0000, 0x0000,
04945 0x0000, 0x0000,
04946 0x0000, 0x0000,
04947 0x0000, 0x0000,
04948 0x0000, 0x0000,
04949 0x0000, 0x0000,
04950 0x0000, 0x0000,
04951 0x0000, 0x0000,
04952 0x005b, 0x0000,
04953 0x007f, 0x0080,
04954 0x006d, 0x0080,
04955 0x006d, 0x0080,
04956 0x006d, 0x0080,
04957 0x006d, 0x0080,
04958 0x006d, 0x0080,
04959 0x006d, 0x0080,
04960 0x0000, 0x0000,
04961 0x0000, 0x0000,
04962 0x0000, 0x0000,
04963 0x0000, 0x0000,
04964
04965 /* Character (0x6e):
04966    bbw=10, bbh=20, bbx=0, bby=-4, width=10
04967    +----------------+
04968    |                |
04969    |                |
04970    |                |
04971    |                |
04972    |                |
04973    |                |
04974    |                |
04975    |                |
04976    | ** ***         |
04977    | ***  **        |
04978    | **    **       |
04979    | **    **       |
04980    | **    **       |
04981    | **    **       |
04982    | **    **       |
04983    | **    **       |
04984    |                |
04985    |                |
04986    |                |
04987    |                |
04988    +----------------+ */
04989 0x0000, 0x0000,
04990 0x0000, 0x0000,
04991 0x0000, 0x0000,
04992 0x0000, 0x0000,
04993 0x0000, 0x0000,
04994 0x0000, 0x0000,
04995 0x0000, 0x0000,
04996 0x0000, 0x0000,
04997 0x006e, 0x0000,
04998 0x0073, 0x0000,
04999 0x0061, 0x0080,
05000 0x0061, 0x0080,
05001 0x0061, 0x0080,
05002 0x0061, 0x0080,
05003 0x0061, 0x0080,
05004 0x0061, 0x0080,
05005 0x0000, 0x0000,
05006 0x0000, 0x0000,
05007 0x0000, 0x0000,
05008 0x0000, 0x0000,
05009
05010 /* Character (0x6f):
05011    bbw=10, bbh=20, bbx=0, bby=-4, width=10
05012    +----------------+
05013    |                |
05014    |                |
05015    |                |
05016    |                |
05017    |                |
05018    |                |
05019    |                |
05020    |                |
05021    |   ****         |
05022    |  **  **        |
05023    | **    **       |
05024    | **    **       |
05025    | **    **       |
05026    | **    **       |
05027    |  **  **        |
05028    |   ****         |
05029    |                |
05030    |                |
05031    |                |
05032    |                |
05033    +----------------+ */
05034 0x0000, 0x0000,
05035 0x0000, 0x0000,
05036 0x0000, 0x0000,
05037 0x0000, 0x0000,
05038 0x0000, 0x0000,
05039 0x0000, 0x0000,
05040 0x0000, 0x0000,
05041 0x0000, 0x0000,
05042 0x001e, 0x0000,
05043 0x0033, 0x0000,
05044 0x0061, 0x0080,
05045 0x0061, 0x0080,
05046 0x0061, 0x0080,
05047 0x0061, 0x0080,
05048 0x0033, 0x0000,
05049 0x001e, 0x0000,
05050 0x0000, 0x0000,
05051 0x0000, 0x0000,
05052 0x0000, 0x0000,
05053 0x0000, 0x0000,
05054
05055 /* Character (0x70):
05056    bbw=10, bbh=20, bbx=0, bby=-4, width=10
05057    +----------------+
05058    |                |
05059    |                |
05060    |                |
05061    |                |
05062    |                |
05063    |                |
05064    |                |
05065    |                |
05066    | ** ***         |
05067    | ***  **        |
05068    | **    **       |
05069    | **    **       |
05070    | **    **       |
05071    | **    **       |
05072    | ***  **        |
05073    | ** ***         |
05074    | **             |
05075    | **             |
05076    | **             |
05077    | **             |
05078    +----------------+ */
05079 0x0000, 0x0000,
05080 0x0000, 0x0000,
05081 0x0000, 0x0000,
05082 0x0000, 0x0000,
05083 0x0000, 0x0000,
05084 0x0000, 0x0000,
05085 0x0000, 0x0000,
05086 0x0000, 0x0000,
05087 0x006e, 0x0000,
05088 0x0073, 0x0000,
05089 0x0061, 0x0080,
05090 0x0061, 0x0080,
05091 0x0061, 0x0080,
05092 0x0061, 0x0080,
05093 0x0073, 0x0000,
05094 0x006e, 0x0000,
05095 0x0060, 0x0000,
05096 0x0060, 0x0000,
05097 0x0060, 0x0000,
05098 0x0060, 0x0000,
05099
05100 /* Character (0x71):
05101    bbw=10, bbh=20, bbx=0, bby=-4, width=10
05102    +----------------+
05103    |                |
05104    |                |
05105    |                |
05106    |                |
05107    |                |
05108    |                |
05109    |                |
05110    |                |
05111    |   *** **       |
05112    |  **  ***       |
05113    | **    **       |
05114    | **    **       |
05115    | **    **       |
05116    | **    **       |
05117    |  **  ***       |
05118    |   *** **       |
05119    |       **       |
05120    |       **       |
05121    |       **       |
05122    |       **       |
05123    +----------------+ */
05124 0x0000, 0x0000,
05125 0x0000, 0x0000,
05126 0x0000, 0x0000,
05127 0x0000, 0x0000,
05128 0x0000, 0x0000,
05129 0x0000, 0x0000,
05130 0x0000, 0x0000,
05131 0x0000, 0x0000,
05132 0x001d, 0x0080,
05133 0x0033, 0x0080,
05134 0x0061, 0x0080,
05135 0x0061, 0x0080,
05136 0x0061, 0x0080,
05137 0x0061, 0x0080,
05138 0x0033, 0x0080,
05139 0x001d, 0x0080,
05140 0x0001, 0x0080,
05141 0x0001, 0x0080,
05142 0x0001, 0x0080,
05143 0x0001, 0x0080,
05144
05145 /* Character (0x72):
05146    bbw=10, bbh=20, bbx=0, bby=-4, width=10
05147    +----------------+
05148    |                |
05149    |                |
05150    |                |
05151    |                |
05152    |                |
05153    |                |
05154    |                |
05155    |                |
05156    | ** ****        |
05157    |  ***  **       |
05158    |  **            |
05159    |  **            |
05160    |  **            |
05161    |  **            |
05162    |  **            |
05163    |  **            |
05164    |                |
05165    |                |
05166    |                |
05167    |                |
05168    +----------------+ */
05169 0x0000, 0x0000,
05170 0x0000, 0x0000,
05171 0x0000, 0x0000,
05172 0x0000, 0x0000,
05173 0x0000, 0x0000,
05174 0x0000, 0x0000,
05175 0x0000, 0x0000,
05176 0x0000, 0x0000,
05177 0x006f, 0x0000,
05178 0x0039, 0x0080,
05179 0x0030, 0x0000,
05180 0x0030, 0x0000,
05181 0x0030, 0x0000,
05182 0x0030, 0x0000,
05183 0x0030, 0x0000,
05184 0x0030, 0x0000,
05185 0x0000, 0x0000,
05186 0x0000, 0x0000,
05187 0x0000, 0x0000,
05188 0x0000, 0x0000,
05189
05190 /* Character (0x73):
05191    bbw=10, bbh=20, bbx=0, bby=-4, width=10
05192    +----------------+
05193    |                |
05194    |                |
05195    |                |
05196    |                |
05197    |                |
05198    |                |
05199    |                |
05200    |                |
05201    |  ******        |
05202    | **    **       |
05203    | **             |
05204    |  ******        |
05205    |       **       |
05206    |       **       |
05207    | **    **       |
05208    |  ******        |
05209    |                |
05210    |                |
05211    |                |
05212    |                |
05213    +----------------+ */
05214 0x0000, 0x0000,
05215 0x0000, 0x0000,
05216 0x0000, 0x0000,
05217 0x0000, 0x0000,
05218 0x0000, 0x0000,
05219 0x0000, 0x0000,
05220 0x0000, 0x0000,
05221 0x0000, 0x0000,
05222 0x003f, 0x0000,
05223 0x0061, 0x0080,
05224 0x0060, 0x0000,
05225 0x003f, 0x0000,
05226 0x0001, 0x0080,
05227 0x0001, 0x0080,
05228 0x0061, 0x0080,
05229 0x003f, 0x0000,
05230 0x0000, 0x0000,
05231 0x0000, 0x0000,
05232 0x0000, 0x0000,
05233 0x0000, 0x0000,
05234
05235 /* Character (0x74):
05236    bbw=10, bbh=20, bbx=0, bby=-4, width=10
05237    +----------------+
05238    |                |
05239    |                |
05240    |                |
05241    |                |
05242    |                |
05243    |   **           |
05244    |   **           |
05245    |   **           |
05246    | ******         |
05247    |   **           |
05248    |   **           |
05249    |   **           |
05250    |   **           |
05251    |   **           |
05252    |   **  **       |
05253    |    ****        |
05254    |                |
05255    |                |
05256    |                |
05257    |                |
05258    +----------------+ */
05259 0x0000, 0x0000,
05260 0x0000, 0x0000,
05261 0x0000, 0x0000,
05262 0x0000, 0x0000,
05263 0x0000, 0x0000,
05264 0x0018, 0x0000,
05265 0x0018, 0x0000,
05266 0x0018, 0x0000,
05267 0x007e, 0x0000,
05268 0x0018, 0x0000,
05269 0x0018, 0x0000,
05270 0x0018, 0x0000,
05271 0x0018, 0x0000,
05272 0x0018, 0x0000,
05273 0x0019, 0x0080,
05274 0x000f, 0x0000,
05275 0x0000, 0x0000,
05276 0x0000, 0x0000,
05277 0x0000, 0x0000,
05278 0x0000, 0x0000,
05279
05280 /* Character (0x75):
05281    bbw=10, bbh=20, bbx=0, bby=-4, width=10
05282    +----------------+
05283    |                |
05284    |                |
05285    |                |
05286    |                |
05287    |                |
05288    |                |
05289    |                |
05290    |                |
05291    | **    **       |
05292    | **    **       |
05293    | **    **       |
05294    | **    **       |
05295    | **    **       |
05296    | **    **       |
05297    |  **  ***       |
05298    |   *** **       |
05299    |                |
05300    |                |
05301    |                |
05302    |                |
05303    +----------------+ */
05304 0x0000, 0x0000,
05305 0x0000, 0x0000,
05306 0x0000, 0x0000,
05307 0x0000, 0x0000,
05308 0x0000, 0x0000,
05309 0x0000, 0x0000,
05310 0x0000, 0x0000,
05311 0x0000, 0x0000,
05312 0x0061, 0x0080,
05313 0x0061, 0x0080,
05314 0x0061, 0x0080,
05315 0x0061, 0x0080,
05316 0x0061, 0x0080,
05317 0x0061, 0x0080,
05318 0x0033, 0x0080,
05319 0x001d, 0x0080,
05320 0x0000, 0x0000,
05321 0x0000, 0x0000,
05322 0x0000, 0x0000,
05323 0x0000, 0x0000,
05324
05325 /* Character (0x76):
05326    bbw=10, bbh=20, bbx=0, bby=-4, width=10
05327    +----------------+
05328    |                |
05329    |                |
05330    |                |
05331    |                |
05332    |                |
05333    |                |
05334    |                |
05335    |                |
05336    | **    **       |
05337    | **    **       |
05338    |  **  **        |
05339    |  **  **        |
05340    |   ****         |
05341    |   ****         |
05342    |    **          |
05343    |    **          |
05344    |                |
05345    |                |
05346    |                |
05347    |                |
05348    +----------------+ */
05349 0x0000, 0x0000,
05350 0x0000, 0x0000,
05351 0x0000, 0x0000,
05352 0x0000, 0x0000,
05353 0x0000, 0x0000,
05354 0x0000, 0x0000,
05355 0x0000, 0x0000,
05356 0x0000, 0x0000,
05357 0x0061, 0x0080,
05358 0x0061, 0x0080,
05359 0x0033, 0x0000,
05360 0x0033, 0x0000,
05361 0x001e, 0x0000,
05362 0x001e, 0x0000,
05363 0x000c, 0x0000,
05364 0x000c, 0x0000,
05365 0x0000, 0x0000,
05366 0x0000, 0x0000,
05367 0x0000, 0x0000,
05368 0x0000, 0x0000,
05369
05370 /* Character (0x77):
05371    bbw=10, bbh=20, bbx=0, bby=-4, width=10
05372    +----------------+
05373    |                |
05374    |                |
05375    |                |
05376    |                |
05377    |                |
05378    |                |
05379    |                |
05380    |                |
05381    | **    **       |
05382    | **    **       |
05383    | **    **       |
05384    | ** ** **       |
05385    | ** ** **       |
05386    | ** ** **       |
05387    | ********       |
05388    |  **  **        |
05389    |                |
05390    |                |
05391    |                |
05392    |                |
05393    +----------------+ */
05394 0x0000, 0x0000,
05395 0x0000, 0x0000,
05396 0x0000, 0x0000,
05397 0x0000, 0x0000,
05398 0x0000, 0x0000,
05399 0x0000, 0x0000,
05400 0x0000, 0x0000,
05401 0x0000, 0x0000,
05402 0x0061, 0x0080,
05403 0x0061, 0x0080,
05404 0x0061, 0x0080,
05405 0x006d, 0x0080,
05406 0x006d, 0x0080,
05407 0x006d, 0x0080,
05408 0x007f, 0x0080,
05409 0x0033, 0x0000,
05410 0x0000, 0x0000,
05411 0x0000, 0x0000,
05412 0x0000, 0x0000,
05413 0x0000, 0x0000,
05414
05415 /* Character (0x78):
05416    bbw=10, bbh=20, bbx=0, bby=-4, width=10
05417    +----------------+
05418    |                |
05419    |                |
05420    |                |
05421    |                |
05422    |                |
05423    |                |
05424    |                |
05425    |                |
05426    | **    **       |
05427    |  **  **        |
05428    |   ****         |
05429    |    **          |
05430    |    **          |
05431    |   ****         |
05432    |  **  **        |
05433    | **    **       |
05434    |                |
05435    |                |
05436    |                |
05437    |                |
05438    +----------------+ */
05439 0x0000, 0x0000,
05440 0x0000, 0x0000,
05441 0x0000, 0x0000,
05442 0x0000, 0x0000,
05443 0x0000, 0x0000,
05444 0x0000, 0x0000,
05445 0x0000, 0x0000,
05446 0x0000, 0x0000,
05447 0x0061, 0x0080,
05448 0x0033, 0x0000,
05449 0x001e, 0x0000,
05450 0x000c, 0x0000,
05451 0x000c, 0x0000,
05452 0x001e, 0x0000,
05453 0x0033, 0x0000,
05454 0x0061, 0x0080,
05455 0x0000, 0x0000,
05456 0x0000, 0x0000,
05457 0x0000, 0x0000,
05458 0x0000, 0x0000,
05459
05460 /* Character (0x79):
05461    bbw=10, bbh=20, bbx=0, bby=-4, width=10
05462    +----------------+
05463    |                |
05464    |                |
05465    |                |
05466    |                |
05467    |                |
05468    |                |
05469    |                |
05470    |                |
05471    | **    **       |
05472    | **    **       |
05473    | **    **       |
05474    | **    **       |
05475    | **    **       |
05476    | **    **       |
05477    |  **  ***       |
05478    |   *** **       |
05479    |       **       |
05480    | **    **       |
05481    |  **  **        |
05482    |   ****         |
05483    +----------------+ */
05484 0x0000, 0x0000,
05485 0x0000, 0x0000,
05486 0x0000, 0x0000,
05487 0x0000, 0x0000,
05488 0x0000, 0x0000,
05489 0x0000, 0x0000,
05490 0x0000, 0x0000,
05491 0x0000, 0x0000,
05492 0x0061, 0x0080,
05493 0x0061, 0x0080,
05494 0x0061, 0x0080,
05495 0x0061, 0x0080,
05496 0x0061, 0x0080,
05497 0x0061, 0x0080,
05498 0x0033, 0x0080,
05499 0x001d, 0x0080,
05500 0x0001, 0x0080,
05501 0x0061, 0x0080,
05502 0x0033, 0x0000,
05503 0x001e, 0x0000,
05504
05505 /* Character (0x7a):
05506    bbw=10, bbh=20, bbx=0, bby=-4, width=10
05507    +----------------+
05508    |                |
05509    |                |
05510    |                |
05511    |                |
05512    |                |
05513    |                |
05514    |                |
05515    |                |
05516    |  *******       |
05517    |       **       |
05518    |      **        |
05519    |     **         |
05520    |    **          |
05521    |   **           |
05522    |  **            |
05523    |  *******       |
05524    |                |
05525    |                |
05526    |                |
05527    |                |
05528    +----------------+ */
05529 0x0000, 0x0000,
05530 0x0000, 0x0000,
05531 0x0000, 0x0000,
05532 0x0000, 0x0000,
05533 0x0000, 0x0000,
05534 0x0000, 0x0000,
05535 0x0000, 0x0000,
05536 0x0000, 0x0000,
05537 0x003f, 0x0080,
05538 0x0001, 0x0080,
05539 0x0003, 0x0000,
05540 0x0006, 0x0000,
05541 0x000c, 0x0000,
05542 0x0018, 0x0000,
05543 0x0030, 0x0000,
05544 0x003f, 0x0080,
05545 0x0000, 0x0000,
05546 0x0000, 0x0000,
05547 0x0000, 0x0000,
05548 0x0000, 0x0000,
05549
05550 /* Character (0x7b):
05551    bbw=10, bbh=20, bbx=0, bby=-4, width=10
05552    +----------------+
05553    |                |
05554    |                |
05555    |                |
05556    |     ****       |
05557    |    **          |
05558    |    **          |
05559    |    **          |
05560    |    **          |
05561    |    **          |
05562    | ****           |
05563    |    **          |
05564    |    **          |
05565    |    **          |
05566    |    **          |
05567    |    **          |
05568    |     ****       |
05569    |                |
05570    |                |
05571    |                |
05572    |                |
05573    +----------------+ */
05574 0x0000, 0x0000,
05575 0x0000, 0x0000,
05576 0x0000, 0x0000,
05577 0x0007, 0x0080,
05578 0x000c, 0x0000,
05579 0x000c, 0x0000,
05580 0x000c, 0x0000,
05581 0x000c, 0x0000,
05582 0x000c, 0x0000,
05583 0x0078, 0x0000,
05584 0x000c, 0x0000,
05585 0x000c, 0x0000,
05586 0x000c, 0x0000,
05587 0x000c, 0x0000,
05588 0x000c, 0x0000,
05589 0x0007, 0x0080,
05590 0x0000, 0x0000,
05591 0x0000, 0x0000,
05592 0x0000, 0x0000,
05593 0x0000, 0x0000,
05594
05595 /* Character (0x7c):
05596    bbw=10, bbh=20, bbx=0, bby=-4, width=10
05597    +----------------+
05598    |                |
05599    |                |
05600    |                |
05601    |    **          |
05602    |    **          |
05603    |    **          |
05604    |    **          |
05605    |    **          |
05606    |    **          |
05607    |    **          |
05608    |    **          |
05609    |    **          |
05610    |    **          |
05611    |    **          |
05612    |    **          |
05613    |    **          |
05614    |                |
05615    |                |
05616    |                |
05617    |                |
05618    +----------------+ */
05619 0x0000, 0x0000,
05620 0x0000, 0x0000,
05621 0x0000, 0x0000,
05622 0x000c, 0x0000,
05623 0x000c, 0x0000,
05624 0x000c, 0x0000,
05625 0x000c, 0x0000,
05626 0x000c, 0x0000,
05627 0x000c, 0x0000,
05628 0x000c, 0x0000,
05629 0x000c, 0x0000,
05630 0x000c, 0x0000,
05631 0x000c, 0x0000,
05632 0x000c, 0x0000,
05633 0x000c, 0x0000,
05634 0x000c, 0x0000,
05635 0x0000, 0x0000,
05636 0x0000, 0x0000,
05637 0x0000, 0x0000,
05638 0x0000, 0x0000,
05639
05640 /* Character (0x7d):
05641    bbw=10, bbh=20, bbx=0, bby=-4, width=10
05642    +----------------+
05643    |                |
05644    |                |
05645    |                |
05646    | ****           |
05647    |    **          |
05648    |    **          |
05649    |    **          |
05650    |    **          |
05651    |    **          |
05652    |     ****       |
05653    |    **          |
05654    |    **          |
05655    |    **          |
05656    |    **          |
05657    |    **          |
05658    | ****           |
05659    |                |
05660    |                |
05661    |                |
05662    |                |
05663    +----------------+ */
05664 0x0000, 0x0000,
05665 0x0000, 0x0000,
05666 0x0000, 0x0000,
05667 0x0078, 0x0000,
05668 0x000c, 0x0000,
05669 0x000c, 0x0000,
05670 0x000c, 0x0000,
05671 0x000c, 0x0000,
05672 0x000c, 0x0000,
05673 0x0007, 0x0080,
05674 0x000c, 0x0000,
05675 0x000c, 0x0000,
05676 0x000c, 0x0000,
05677 0x000c, 0x0000,
05678 0x000c, 0x0000,
05679 0x0078, 0x0000,
05680 0x0000, 0x0000,
05681 0x0000, 0x0000,
05682 0x0000, 0x0000,
05683 0x0000, 0x0000,
05684
05685 /* Character (0x7e):
05686    bbw=10, bbh=20, bbx=0, bby=-4, width=10
05687    +----------------+
05688    |                |
05689    |                |
05690    |                |
05691    |  ***  **       |
05692    | ** ** **       |
05693    | **  ***        |
05694    |                |
05695    |                |
05696    |                |
05697    |                |
05698    |                |
05699    |                |
05700    |                |
05701    |                |
05702    |                |
05703    |                |
05704    |                |
05705    |                |
05706    |                |
05707    |                |
05708    +----------------+ */
05709 0x0000, 0x0000,
05710 0x0000, 0x0000,
05711 0x0000, 0x0000,
05712 0x0039, 0x0080,
05713 0x006d, 0x0080,
05714 0x0067, 0x0000,
05715 0x0000, 0x0000,
05716 0x0000, 0x0000,
05717 0x0000, 0x0000,
05718 0x0000, 0x0000,
05719 0x0000, 0x0000,
05720 0x0000, 0x0000,
05721 0x0000, 0x0000,
05722 0x0000, 0x0000,
05723 0x0000, 0x0000,
05724 0x0000, 0x0000,
05725 0x0000, 0x0000,
05726 0x0000, 0x0000,
05727 0x0000, 0x0000,
05728 0x0000, 0x0000,
05729 };
05730
05731 #warning TODO: Fill the structure with missing parameter (see font.h for more detail).
05732 /* Exported structure definition. */
05733 #if 0
05734 Font font_10x20 = {
05735   font_10x20_glyphs,
05736   10,
05737   20
05738 };
05739 #endif
05740


BeRTOS: formatwr.c File Reference

  • mware
Defines | Functions
formatwr.c File Reference

Basic "printf", "sprintf" and "fprintf" formatter. More...

#include "formatwr.h"
#include "cfg/cfg_formatwr.h"
#include <cfg/debug.h>
#include <cpu/pgm.h>
#include <mware/hex.h>
#include <float.h>

Go to the source code of this file.

Defines

#define | CONFIG_PRINTF_N_FORMATTER 0
Disable the arcane n formatter.
#define | CONFIG_PRINTF_OCTAL_FORMATTER 0
Disable the o formatter.

Functions

int | _formatted_write (const char *PGM_ATTR format, void put_one_char(char, void *), void *secret_pointer, va_list ap)
This routine forms the core and entry of the formatter.

Detailed Description

Basic "printf", "sprintf" and "fprintf" formatter.

This module is 100% reentrant and can be adapted to user-defined routines that needs formatters with special properties like different output channels or new format specifiers.

To reduce size in applications not using real numbers or long integers the formatter may be compiled to exclude certain parts. This is controlled by giving a -D option a compilation time:

  -D CONFIG_PRINTF=PRINTF_FULL         Full ANSI printf formatter, with some C99 extensions
  -D CONFIG_PRINTF=PRINTF_NOFLOAT      Exclude support for floats
  -D CONFIG_PRINTF=PRINTF_REDUCED      Simplified formatter (see below)
  -D CONFIG_PRINTF=PRINTF_NOMODIFIERS  Exclude "l", "z" and "h" modifiers in reduced version
  -D CONFIG_PRINTF=PRINTF_DISABLED     No formatter at all

Code size on AVR4 with GCC 3.4.1 (-O2):

  • PRINTF_FULL 2912byte (0xB60)
  • PRINTF_NOFLOAT 1684byte (0x694)
  • PRINTF_REDUCED 924byte (0x39C)
  • PRINTF_NOMODIFIERS 416byte (0x1A0)

Code/data size in words on DSP56K with CodeWarrior 6.0:

  • PRINTF_FULL 1493/45
  • PRINTF_NOFLOAT 795/45
  • PRINTF_REDUCED 482/0
  • PRINTF_NOMODIFIERS 301/0

The reduced version of formatter is suitable when program size is critical rather than formatting power. This routine uses less than 20 bytes of stack space which makes it practical even in systems with less than 256 bytes of user RAM.

The only formatting specifiers supported by the reduced formatter are:

    %% %c %s %d %o %x %X and %hd %ho %hx %hX %ld %lo %lx %lX

It means that real variables are not supported as well as field width and precision arguments.

Definition in file formatwr.c.

Define Documentation

#define CONFIG_PRINTF_N_FORMATTER 0

Disable the arcane n formatter.

Definition at line 89 of file formatwr.c.

#define CONFIG_PRINTF_OCTAL_FORMATTER 0

Disable the o formatter.

Definition at line 94 of file formatwr.c.

Function Documentation

int _formatted_write | ( | const char *PGM_ATTR | format,
 |  | void | put_one_charchar, void *,
 |  | void * | secret_pointer,
 |  | va_list | ap
 | ) |  |

This routine forms the core and entry of the formatter.

The conversion performed conforms to the ANSI specification for "printf".

Definition at line 333 of file formatwr.c.


BeRTOS: formatwr.c Source File

  • mware
formatwr.c
Go to the documentation of this file.
00001
00079 #include "formatwr.h"
00080
00081 #include "cfg/cfg_formatwr.h"  /* CONFIG_ macros */
00082 #include <cfg/debug.h>         /* ASSERT */
00083
00084 #include <cpu/pgm.h>
00085 #include <mware/hex.h>
00086
00087 #ifndef CONFIG_PRINTF_N_FORMATTER
00088
00089     #define CONFIG_PRINTF_N_FORMATTER 0
00090 #endif
00091
00092 #ifndef CONFIG_PRINTF_OCTAL_FORMATTER
00093
00094     #define CONFIG_PRINTF_OCTAL_FORMATTER 0
00095 #endif
00096
00097 /* True if we must keep a count of the number of characters we print. */
00098 #define CONFIG_PRINTF_COUNT_CHARS (CONFIG_PRINTF_RETURN_COUNT || CONFIG_PRINTF_N_FORMATTER)
00099
00100 #if CONFIG_PRINTF
00101
00102 #if CONFIG_PRINTF > PRINTF_NOFLOAT
00103     #include <float.h>
00104
00105     /* Maximum precision for floating point values */
00106     typedef long double max_float_t;
00107
00108     #if CONFIG_FRMWRI_BUFSIZE
00109         #define FRMWRI_BUFSIZE CONFIG_FRMWRI_BUFSIZE
00110     #else
00111         /* Conservative estimate. Max float is 3.40282e+038, so %f (but not %e or %g) must have
00112          * space for: sign + all 38 digits + '.' + 6 decimal digits (default)
00113          * Use a high value to avoid unexpected buffer overflows.
00114          */
00115         #define FRMWRI_BUFSIZE 134
00116     #endif
00117 #else
00118     #if CONFIG_FRMWRI_BUFSIZE
00119         #define FRMWRI_BUFSIZE CONFIG_FRMWRI_BUFSIZE
00120     #else
00121         /*
00122          * Conservative estimate. Should be (probably) 12 (which is the size necessary
00123          * to represent (2^32-1) in octal plus the sign bit.
00124          */
00125         #define FRMWRI_BUFSIZE 16
00126     #endif
00127 #endif
00128
00129 /* Probably useful for fancy microcontrollers such as the PIC, nobody knows. */
00130 #ifndef MEM_ATTRIBUTE
00131 #define MEM_ATTRIBUTE
00132 #endif
00133
00134 #if CONFIG_PRINTF > PRINTF_NOMODIFIERS
00135     #define IS_SHORT (h_modifier || (sizeof(int) == 2 && !l_modifier))
00136 #else
00137     #define IS_SHORT (sizeof(int) == 2)
00138 #endif /* CONFIG_PRINTF > PRINTF_NOMODIFIERS */
00139
00140
00141 #if CONFIG_PRINTF > PRINTF_NOFLOAT
00142
00143 static char *float_conversion(MEM_ATTRIBUTE max_float_t value,
00144         MEM_ATTRIBUTE short nr_of_digits,
00145         MEM_ATTRIBUTE char *buf,
00146         MEM_ATTRIBUTE char format_flag,
00147         MEM_ATTRIBUTE char g_flag,
00148         MEM_ATTRIBUTE bool alternate_flag)
00149 {
00150     MEM_ATTRIBUTE char *cp;
00151     MEM_ATTRIBUTE char *buf_pointer;
00152     MEM_ATTRIBUTE short n, i, dec_point_pos, integral_10_log;
00153
00154     buf_pointer = buf;
00155     integral_10_log = 0;
00156
00157     if (value >= 1)
00158     {
00159         while (value >= 1e11) /* To speed up things a bit */
00160         {
00161             value /= 1e10;
00162             integral_10_log += 10;
00163         }
00164         while (value >= 10)
00165         {
00166             value /= 10;
00167             integral_10_log++;
00168         }
00169     }
00170     else if (value) /* Not just 0.0 */
00171     {
00172         while (value <= 1e-10) /* To speed up things a bit */
00173         {
00174             value *= 1e10;
00175             integral_10_log -= 10;
00176         }
00177         while (value < 1)
00178         {
00179             value *= 10;
00180             integral_10_log--;
00181         }
00182     }
00183     if (g_flag)
00184     {
00185         if (integral_10_log < nr_of_digits && integral_10_log >= -4)
00186         {
00187             format_flag = 0;
00188             nr_of_digits -= integral_10_log;
00189         }
00190         nr_of_digits--;
00191         if (alternate_flag)
00192             /* %#G - No removal of trailing zeros */
00193             g_flag = 0;
00194         else
00195             /* %G - Removal of trailing zeros */
00196             alternate_flag = true;
00197     }
00198
00199     /* %e or %E */
00200     if (format_flag)
00201     {
00202         dec_point_pos = 0;
00203     }
00204     else
00205     {
00206         /* Less than one... */
00207         if (integral_10_log < 0)
00208         {
00209             *buf_pointer++ = '0';
00210             if ((n = nr_of_digits) || alternate_flag)
00211                 *buf_pointer++ = '.';
00212             i = 0;
00213             while (--i > integral_10_log && nr_of_digits)
00214             {
00215                 *buf_pointer++ = '0';
00216                 nr_of_digits--;
00217             }
00218             if (integral_10_log < (-n - 1))
00219                 /* Nothing more to do */
00220                 goto CLEAN_UP;
00221             dec_point_pos = 1;
00222         }
00223         else
00224         {
00225             dec_point_pos = - integral_10_log;
00226         }
00227     }
00228
00229     i = dec_point_pos;
00230     while (i <= nr_of_digits )
00231     {
00232         value -= (max_float_t)(n = (short)value); /* n=Digit value=Remainder */
00233         value *= 10; /* Prepare for next shot */
00234         *buf_pointer++ = n + '0';
00235         if ( ! i++ && (nr_of_digits || alternate_flag))
00236             *buf_pointer++ = '.';
00237     }
00238
00239     /* Rounding possible */
00240     if (value >= 5)
00241     {
00242         n = 1; /* Carry */
00243         cp = buf_pointer - 1;
00244         do
00245         {
00246             if (*cp != '.')
00247             {
00248                 if ( (*cp += n) == ('9' + 1) )
00249                 {
00250                     *cp = '0';
00251                     n = 1;
00252                 }
00253                 else
00254                     n = 0;
00255             }
00256         } while (cp-- > buf);
00257         if (n)
00258         {
00259             /* %e or %E */
00260             if (format_flag)
00261             {
00262                 cp = buf_pointer;
00263                 while (cp > buf)
00264                 {
00265                     if (*(cp - 1) == '.')
00266                     {
00267                         *cp = *(cp - 2);
00268                         cp--;
00269                     }
00270                     else
00271                         *cp = *(cp - 1);
00272                     cp--;
00273                 }
00274                 integral_10_log++;
00275             }
00276             else
00277             {
00278                 cp = ++buf_pointer;
00279                 while (cp > buf)
00280                 {
00281                     *cp = *(cp - 1);
00282                     cp--;
00283                 }
00284             }
00285             *buf = '1';
00286         }
00287     }
00288
00289 CLEAN_UP:
00290     /* %G - Remove trailing zeros */
00291     if (g_flag)
00292     {
00293         while (*(buf_pointer - 1) == '0')
00294             buf_pointer--;
00295         if (*(buf_pointer - 1) == '.')
00296             buf_pointer--;
00297     }
00298
00299     /* %e or %E */
00300     if (format_flag)
00301     {
00302         *buf_pointer++ = format_flag;
00303         if (integral_10_log < 0)
00304         {
00305             *buf_pointer++ = '-';
00306             integral_10_log = -integral_10_log;
00307         }
00308         else
00309             *buf_pointer++ = '+';
00310         n = 0;
00311         buf_pointer +=10;
00312         do
00313         {
00314             n++;
00315             *buf_pointer++ = (integral_10_log % 10) + '0';
00316             integral_10_log /= 10;
00317         } while ( integral_10_log || n < 2 );
00318         for ( i = n ; n > 0 ; n-- )
00319             *(buf_pointer - 11 - i + n) = *(buf_pointer - n);
00320         buf_pointer -= 10;
00321     }
00322     return (buf_pointer);
00323 }
00324
00325 #endif /* CONFIG_PRINTF > PRINTF_NOFLOAT */
00326
00332 int
00333 PGM_FUNC(_formatted_write)(const char * PGM_ATTR format,
00334         void put_one_char(char, void *),
00335         void *secret_pointer,
00336         va_list ap)
00337 {
00338 #if CONFIG_PRINTF > PRINTF_REDUCED
00339     MEM_ATTRIBUTE static char bad_conversion[] = "???";
00340     MEM_ATTRIBUTE static char null_pointer[] = "<NULL>";
00341
00342     MEM_ATTRIBUTE int precision;
00343     MEM_ATTRIBUTE int n;
00344 #if CONFIG_PRINTF_COUNT_CHARS
00345     MEM_ATTRIBUTE int nr_of_chars;
00346 #endif
00347     MEM_ATTRIBUTE int field_width;
00348     MEM_ATTRIBUTE char format_flag;
00349     enum PLUS_SPACE_FLAGS {
00350         PSF_NONE, PSF_PLUS, PSF_MINUS
00351     };
00352     enum DIV_FACTOR {
00353         DIV_DEC, DIV_HEX,
00354 #if CONFIG_PRINTF_OCTAL_FORMATTER
00355         DIV_OCT,
00356 #endif
00357     };
00358     MEM_ATTRIBUTE struct {
00359         enum PLUS_SPACE_FLAGS plus_space_flag : 2;
00360 #if CONFIG_PRINTF_OCTAL_FORMATTER
00361         enum DIV_FACTOR div_factor : 2;
00362 #else
00363         enum DIV_FACTOR div_factor : 1;
00364 #endif
00365         bool left_adjust : 1;
00366         bool l_L_modifier : 1;
00367         bool h_modifier : 1;
00368         bool alternate_flag : 1;
00369         bool nonzero_value : 1;
00370         bool zeropad : 1;
00371 #if CPU_HARVARD
00372         bool progmem : 1;
00373 #endif
00374     } flags;
00375     MEM_ATTRIBUTE unsigned long ulong;
00376
00377 #if CONFIG_PRINTF >  PRINTF_NOFLOAT
00378     MEM_ATTRIBUTE max_float_t fvalue;
00379 #endif
00380
00381     MEM_ATTRIBUTE char *buf_pointer;
00382     MEM_ATTRIBUTE char *ptr;
00383     MEM_ATTRIBUTE const char *hex;
00384     MEM_ATTRIBUTE char buf[FRMWRI_BUFSIZE];
00385
00386 #if CONFIG_PRINTF_COUNT_CHARS
00387     nr_of_chars = 0;
00388 #endif
00389     for (;;)    /* Until full format string read */
00390     {
00391         while ((format_flag = PGM_READ_CHAR(format++)) != '%')    /* Until '%' or '\0' */
00392         {
00393             if (!format_flag)
00394 #if CONFIG_PRINTF_RETURN_COUNT
00395                 return (nr_of_chars);
00396 #else
00397                 return 0;
00398 #endif
00399             put_one_char(format_flag, secret_pointer);
00400 #if CONFIG_PRINTF_COUNT_CHARS
00401             nr_of_chars++;
00402 #endif
00403         }
00404         if (PGM_READ_CHAR(format) == '%')    /* %% prints as % */
00405         {
00406             format++;
00407             put_one_char('%', secret_pointer);
00408 #if CONFIG_PRINTF_COUNT_CHARS
00409             nr_of_chars++;
00410 #endif
00411             continue;
00412         }
00413
00414         flags.left_adjust = false;
00415         flags.alternate_flag = false;
00416         flags.plus_space_flag = PSF_NONE;
00417         flags.zeropad = false;
00418 #if CPU_HARVARD
00419         flags.progmem = false;
00420 #endif
00421         ptr = buf_pointer = &buf[0];
00422         hex = HEX_tab;
00423
00424         /* check for leading '-', '+', ' ','#' or '0' flags  */
00425         for (;;)
00426         {
00427             switch (PGM_READ_CHAR(format))
00428             {
00429                 case ' ':
00430                     if (flags.plus_space_flag)
00431                         goto NEXT_FLAG;
00432                 case '+':
00433                     flags.plus_space_flag = PSF_PLUS;
00434                     goto NEXT_FLAG;
00435                 case '-':
00436                     flags.left_adjust = true;
00437                     goto NEXT_FLAG;
00438                 case '#':
00439                     flags.alternate_flag = true;
00440                     goto NEXT_FLAG;
00441                 case '0':
00442                     flags.zeropad = true;
00443                     goto NEXT_FLAG;
00444             }
00445             break;
00446 NEXT_FLAG:
00447             format++;
00448         }
00449
00450         /* Optional field width (may be '*') */
00451         if (PGM_READ_CHAR(format) == '*')
00452         {
00453             field_width = va_arg(ap, int);
00454             if (field_width < 0)
00455             {
00456                 field_width = -field_width;
00457                 flags.left_adjust = true;
00458             }
00459             format++;
00460         }
00461         else
00462         {
00463             field_width = 0;
00464             while (PGM_READ_CHAR(format) >= '0' && PGM_READ_CHAR(format) <= '9')
00465                 field_width = field_width * 10 + (PGM_READ_CHAR(format++) - '0');
00466         }
00467
00468         if (flags.left_adjust)
00469             flags.zeropad = false;
00470
00471         /* Optional precision (or '*') */
00472         if (PGM_READ_CHAR(format) == '.')
00473         {
00474             if (PGM_READ_CHAR(++format) == '*')
00475             {
00476                 precision = va_arg(ap, int);
00477                 format++;
00478             }
00479             else
00480             {
00481                 precision = 0;
00482                 while (PGM_READ_CHAR(format) >= '0' && PGM_READ_CHAR(format) <= '9')
00483                     precision = precision * 10 + (PGM_READ_CHAR(format++) - '0');
00484             }
00485         }
00486         else
00487             precision = -1;
00488
00489         /* At this point, "left_adjust" is nonzero if there was
00490          * a sign, "zeropad" is 1 if there was a leading zero
00491          * and 0 otherwise, "field_width" and "precision"
00492          * contain numbers corresponding to the digit strings
00493          * before and after the decimal point, respectively,
00494          * and "plus_space_flag" is either 0 (no flag) or
00495          * contains a plus or space character. If there was no
00496          * decimal point, "precision" will be -1.
00497          */
00498
00499         flags.l_L_modifier = false;
00500         flags.h_modifier = false;
00501
00502         /* Optional 'l','L','z' or 'h' modifier? */
00503         switch (PGM_READ_CHAR(format))
00504         {
00505             case 'l':
00506             case 'L':
00507         #if SIZEOF_SIZE_T == SIZEOF_LONG
00508             case 'z':
00509                 flags.l_L_modifier = true;
00510         #elif SIZEOF_SIZE_T == SIZEOF_INT
00511                 flags.l_L_modifier = true;
00512             case 'z':
00513         #endif
00514                 format++;
00515                 break;
00516
00517             case 'h':
00518                 flags.h_modifier = true;
00519                 format++;
00520                 break;
00521
00522         }
00523
00524         /*
00525          * At exit from the following switch, we will emit
00526          * the characters starting at "buf_pointer" and
00527          * ending at "ptr"-1
00528          */
00529         switch (format_flag = PGM_READ_CHAR(format++))
00530         {
00531 #if CONFIG_PRINTF_N_FORMATTER
00532             case 'n':
00533                 if (sizeof(short) != sizeof(int))
00534                 {
00535                     if (sizeof(int) != sizeof(long))
00536                     {
00537                         if (h_modifier)
00538                             *va_arg(ap, short *) = nr_of_chars;
00539                         else if (flags.l_L_modifier)
00540                             *va_arg(ap, long *) = nr_of_chars;
00541                         else
00542                             *va_arg(ap, int *) = nr_of_chars;
00543                     }
00544                     else
00545                     {
00546                         if (h_modifier)
00547                             *va_arg(ap, short *) = nr_of_chars;
00548                         else
00549                             *va_arg(ap, int *) = nr_of_chars;
00550                     }
00551                 }
00552                 else
00553                 {
00554                     if (flags.l_L_modifier)
00555                         *va_arg(ap, long *) = nr_of_chars;
00556                     else
00557                         *va_arg(ap, int *) = nr_of_chars;
00558                 }
00559                 continue;
00560 #endif
00561             case 'c':
00562                 buf[0] = va_arg(ap, int);
00563                 ptr++;
00564                 break;
00565
00566             /* Custom formatter for strings in program memory. */
00567             case 'S':
00568 #if CPU_HARVARD
00569                 flags.progmem = true;
00570 #endif
00571                 /* Fall trough */
00572
00573             case 's':
00574                 if ( !(buf_pointer = va_arg(ap, char *)) )
00575                     buf_pointer = null_pointer;
00576                 if (precision < 0)
00577                     precision = 10000;
00578
00579                 /*
00580                  * Move `ptr' to the last character of the
00581                  * string that will be actually printed.
00582                  */
00583                 ptr = buf_pointer;
00584 #if CPU_HARVARD
00585                 if (flags.progmem)
00586                 {
00587                     for (n=0; pgm_read_char(ptr) && n < precision; n++)
00588                         ++ptr;
00589                 }
00590                 else
00591 #endif
00592                 for (n=0; *ptr && n < precision; n++)
00593                     ++ptr;
00594                 break;
00595
00596 #if CONFIG_PRINTF_OCTAL_FORMATTER
00597             case 'o':
00598                 if (flags.alternate_flag && !precision)
00599                     precision++;
00600 #endif
00601             case 'x':
00602                 hex = hex_tab;
00603             case 'u':
00604             case 'p':
00605             case 'X':
00606                 if (format_flag == 'p')
00607 #if defined(__AVR__) || defined(__I196__) || defined(__MSP430__) /* 16bit pointers */
00608                     ulong = (unsigned long)(unsigned short)va_arg(ap, char *);
00609 #else /* 32bit pointers */
00610                     ulong = (unsigned long)va_arg(ap, char *);
00611 #endif /* 32bit pointers */
00612                 else if (flags.l_L_modifier)
00613                     ulong = va_arg(ap, unsigned long);
00614                 else if (flags.h_modifier)
00615                     ulong = (unsigned long)(unsigned short)va_arg(ap, unsigned int);
00616                 else
00617                     ulong = va_arg(ap, unsigned int);
00618
00619                 flags.div_factor =
00620 #if CONFIG_PRINTF_OCTAL_FORMATTER
00621                     (format_flag == 'o') ? DIV_OCT :
00622 #endif
00623                     (format_flag == 'u') ? DIV_DEC : DIV_HEX;
00624                 flags.plus_space_flag = PSF_NONE;
00625                 goto INTEGRAL_CONVERSION;
00626
00627             case 'd':
00628             case 'i':
00629                 if (flags.l_L_modifier)
00630                     ulong = (unsigned long)(long)va_arg(ap, long);
00631                 else
00632                     ulong = (unsigned long)(long)va_arg(ap, int);
00633
00634                 /* Extract sign */
00635                 if ((signed long)ulong < 0)
00636                 {
00637                     flags.plus_space_flag = PSF_MINUS;
00638                     ulong = (unsigned long)(-((signed long)ulong));
00639                 }
00640
00641                 flags.div_factor = DIV_DEC;
00642
00643                 /* Now convert to digits */
00644 INTEGRAL_CONVERSION:
00645                 ptr = buf_pointer = &buf[FRMWRI_BUFSIZE - 1];
00646                 flags.nonzero_value = (ulong != 0);
00647
00648                 /* No char if zero and zero precision */
00649                 if (precision != 0 || flags.nonzero_value)
00650                 {
00651                     switch (flags.div_factor)
00652                     {
00653                     case DIV_DEC:
00654                         do
00655                             *--buf_pointer = hex[ulong % 10];
00656                         while (ulong /= 10);
00657                         break;
00658
00659                     case DIV_HEX:
00660                         do
00661                             *--buf_pointer = hex[ulong % 16];
00662                         while (ulong /= 16);
00663                         break;
00664 #if CONFIG_PRINTF_OCTAL_FORMATTER
00665                     case DIV_OCT:
00666                         do
00667                             *--buf_pointer = hex[ulong % 8];
00668                         while (ulong /= 8);
00669                         break;
00670 #endif
00671                     }
00672                 }
00673
00674                 /* "precision" takes precedence */
00675                 if (precision < 0)
00676                     if (flags.zeropad)
00677                         precision = field_width - (flags.plus_space_flag != PSF_NONE);
00678                 while (precision > (int)(ptr - buf_pointer))
00679                     *--buf_pointer = '0';
00680
00681                 if (flags.alternate_flag && flags.nonzero_value)
00682                 {
00683                     if (format_flag == 'x' || format_flag == 'X')
00684                     {
00685                         *--buf_pointer = format_flag;
00686                         *--buf_pointer = '0';
00687                     }
00688 #if CONFIG_PRINTF_OCTAL_FORMATTER
00689                     else if ((format_flag == 'o') && (*buf_pointer != '0'))
00690                     {
00691                         *--buf_pointer = '0';
00692                     }
00693 #endif
00694                 }
00695                 ASSERT(buf_pointer >= buf);
00696                 break;
00697
00698 #if CONFIG_PRINTF > PRINTF_NOFLOAT
00699             case 'g':
00700             case 'G':
00701                 n = 1;
00702                 format_flag -= 2;
00703                 if (! precision)
00704                 {
00705                     precision = 1;
00706                 }
00707                 goto FLOATING_CONVERSION;
00708             case 'f':
00709                 format_flag = 0;
00710             case 'e':
00711             case 'E':
00712                 n = 0;
00713 FLOATING_CONVERSION:
00714                 if (precision < 0)
00715                 {
00716                     precision = 6;
00717                 }
00718
00719                 if (sizeof(double) != sizeof(max_float_t))
00720                 {
00721                     fvalue = flags.l_L_modifier ?
00722                         va_arg(ap,max_float_t) : va_arg(ap,double);
00723                 }
00724                 else
00725                     fvalue = va_arg(ap,max_float_t);
00726
00727                 if (fvalue < 0)
00728                 {
00729                     flags.plus_space_flag = PSF_MINUS;
00730                     fvalue = -fvalue;
00731                 }
00732                 ptr = float_conversion (fvalue,
00733                         (short)precision,
00734                         buf_pointer += field_width,
00735                         format_flag,
00736                         (char)n,
00737                         flags.alternate_flag);
00738                 if (flags.zeropad)
00739                 {
00740                     precision = field_width - (flags.plus_space_flag != PSF_NONE);
00741                     while (precision > ptr - buf_pointer)
00742                         *--buf_pointer = '0';
00743                 }
00744                 break;
00745
00746 #endif /* CONFIG_PRINTF <= PRINTF_NOFLOAT */
00747
00748             case '\0': /* Really bad place to find NUL in */
00749                 format--;
00750
00751             default:
00752                 /* Undefined conversion! */
00753                 ptr = buf_pointer = bad_conversion;
00754                 ptr += sizeof(bad_conversion) - 1;
00755                 break;
00756
00757         }
00758
00759         /*
00760          * This part emittes the formatted string to "put_one_char".
00761          */
00762
00763         /* If field_width == 0 then nothing should be written. */
00764         precision = ptr - buf_pointer;
00765
00766         if ( precision > field_width)
00767         {
00768             n = 0;
00769         }
00770         else
00771         {
00772             n = field_width - precision - (flags.plus_space_flag != PSF_NONE);
00773         }
00774
00775         /* emit any leading pad characters */
00776         if (!flags.left_adjust)
00777             while (--n >= 0)
00778             {
00779                 put_one_char(' ', secret_pointer);
00780 #if CONFIG_PRINTF_COUNT_CHARS
00781                 nr_of_chars++;
00782 #endif
00783             }
00784
00785         /* emit flag characters (if any) */
00786         if (flags.plus_space_flag)
00787         {
00788             put_one_char(flags.plus_space_flag == PSF_PLUS ? '+' : '-', secret_pointer);
00789 #if CONFIG_PRINTF_COUNT_CHARS
00790             nr_of_chars++;
00791 #endif
00792         }
00793
00794 #if CPU_HARVARD
00795         if (flags.progmem)
00796         {
00797             while (--precision >= 0)
00798             {
00799                 put_one_char(pgm_read_char(buf_pointer++), secret_pointer);
00800 #if CONFIG_PRINTF_COUNT_CHARS
00801                 nr_of_chars++;
00802 #endif
00803             }
00804         }
00805         else
00806 #endif /* CPU_HARVARD */
00807         {
00808             /* emit the string itself */
00809             while (--precision >= 0)
00810             {
00811                 put_one_char(*buf_pointer++, secret_pointer);
00812 #if CONFIG_PRINTF_COUNT_CHARS
00813                 nr_of_chars++;
00814 #endif
00815             }
00816         }
00817
00818         /* emit trailing space characters */
00819         if (flags.left_adjust)
00820             while (--n >= 0)
00821             {
00822                 put_one_char(' ', secret_pointer);
00823 #if CONFIG_PRINTF_COUNT_CHARS
00824                 nr_of_chars++;
00825 #endif
00826             }
00827     }
00828
00829 #else /* PRINTF_REDUCED starts here */
00830
00831 #if CONFIG_PRINTF > PRINTF_NOMODIFIERS
00832     bool l_modifier, h_modifier;
00833     unsigned long u_val, div_val;
00834 #else
00835     unsigned int u_val, div_val;
00836 #endif /* CONFIG_PRINTF > PRINTF_NOMODIFIERS */
00837
00838     char format_flag;
00839     unsigned int nr_of_chars, base;
00840     char outChar;
00841     char *ptr;
00842
00843     nr_of_chars = 0;
00844     for (;;)    /* Until full format string read */
00845     {
00846         while ((format_flag = PGM_READ_CHAR(format++)) != '%')    /* Until '%' or '\0' */
00847         {
00848             if (!format_flag)
00849                 return (nr_of_chars);
00850             put_one_char(format_flag, secret_pointer);
00851             nr_of_chars++;
00852         }
00853
00854 #if CONFIG_PRINTF > PRINTF_NOMODIFIERS
00855         /*
00856          * Optional 'l', 'z' or 'h' modifiers?
00857          */
00858         l_modifier = h_modifier = false;
00859         switch (PGM_READ_CHAR(format))
00860         {
00861             case 'l':
00862         #if SIZEOF_SIZE_T == SIZEOF_LONG
00863             case 'z':
00864                 l_modifier = true;
00865         #elif SIZEOF_SIZE_T == SIZEOF_INT
00866                 l_modifier = true;
00867             case 'z':
00868         #endif
00869                 format++;
00870                 break;
00871
00872             case 'h':
00873                 h_modifier = true;
00874                 format++;
00875                 break;
00876         }
00877 #endif /* CONFIG_PRINTF > PRINTF_NOMODIFIERS */
00878
00879         switch (format_flag = PGM_READ_CHAR(format++))
00880         {
00881             case 'c':
00882                 format_flag = va_arg(ap, int);
00883             default:
00884                 put_one_char(format_flag, secret_pointer);
00885                 nr_of_chars++;
00886                 continue;
00887
00888             case 's':
00889                 ptr = va_arg(ap, char *);
00890                 while ((format_flag = *ptr++))
00891                 {
00892                     put_one_char(format_flag, secret_pointer);
00893                     nr_of_chars++;
00894                 }
00895                 continue;
00896
00897             case 'o':
00898                 base = 8;
00899                 if (IS_SHORT)
00900                     div_val = 0x8000;
00901                 else
00902                     div_val = 0x40000000;
00903                 goto CONVERSION_LOOP;
00904
00905             case 'd':
00906                 base = 10;
00907                 if (IS_SHORT)
00908                     div_val = 10000;
00909                 else
00910                     div_val = 1000000000;
00911                 goto CONVERSION_LOOP;
00912
00913             case 'X':
00914             case 'x':
00915                 base = 16;
00916                 if (IS_SHORT)
00917                     div_val = 0x1000;
00918                 else
00919                     div_val = 0x10000000;
00920
00921 CONVERSION_LOOP:
00922 #if CONFIG_PRINTF > PRINTF_NOMODIFIERS
00923                 if (h_modifier)
00924                 {
00925                     if (format_flag == 'd')
00926                         u_val = (short)va_arg(ap, int);
00927                     else
00928                         u_val = (unsigned short)va_arg(ap, int);
00929                 }
00930                 else if (l_modifier)
00931                     u_val = va_arg(ap, long);
00932                 else
00933                 {
00934                     if (format_flag == 'd')
00935                         u_val = va_arg(ap, int);
00936                     else
00937                         u_val = va_arg(ap, unsigned int);
00938                 }
00939
00940 #else /* CONFIG_PRINTF > PRINTF_NOMODIFIERS */
00941                 u_val = va_arg(ap,int);
00942 #endif /* CONFIG_PRINTF > PRINTF_NOMODIFIERS */
00943                 if (format_flag == 'd')
00944                 {
00945                     if (((int)u_val) < 0)
00946                     {
00947                         u_val = - u_val;
00948                         put_one_char('-', secret_pointer);
00949                         nr_of_chars++;
00950                     }
00951                 }
00952                 while (div_val > 1 && div_val > u_val)
00953                 {
00954                     div_val /= base;
00955                 }
00956                 do
00957                 {
00958                     outChar = (u_val / div_val) + '0';
00959                     if (outChar > '9')
00960                     {
00961                         if (format_flag == 'x')
00962                             outChar += 'a'-'9'-1;
00963                         else
00964                             outChar += 'A'-'9'-1;
00965                     }
00966                     put_one_char(outChar, secret_pointer);
00967                     nr_of_chars++;
00968                     u_val %= div_val;
00969                     div_val /= base;
00970                 }
00971                 while (div_val);
00972
00973         } /* end switch(format_flag...) */
00974     }
00975 #endif /* CONFIG_PRINTF > PRINTF_REDUCED */
00976 }
00977
00978 #endif /* CONFIG_PRINTF */


BeRTOS: formatwr.h File Reference

  • mware
Defines
formatwr.h File Reference

Basic "printf", "sprintf" and "fprintf" formatter. More...

#include "cfg/cfg_formatwr.h"
#include <cpu/attr.h>
#include <stdarg.h>

Go to the source code of this file.

Defines

#define | CONFIG_PRINTF_RETURN_COUNT 1
Enable/disable _formatted_write return value.
_formatted_write() configuration
#define | PRINTF_DISABLED 0
#define | PRINTF_NOMODIFIERS 1
#define | PRINTF_REDUCED 2
#define | PRINTF_NOFLOAT 3
#define | PRINTF_FULL 4

Detailed Description

Basic "printf", "sprintf" and "fprintf" formatter.

Definition in file formatwr.h.


BeRTOS: formatwr.h Source File

  • mware
formatwr.h
Go to the documentation of this file.
00001
00042 #ifndef MWARE_FORMATWR_H
00043 #define MWARE_FORMATWR_H
00044
00045 #include "cfg/cfg_formatwr.h"
00046
00047 #include <cpu/attr.h>    /* CPU_HARVARD */
00048
00049 #include <stdarg.h>      /* va_list */
00050
00056 #define PRINTF_DISABLED    0
00057 #define PRINTF_NOMODIFIERS 1
00058 #define PRINTF_REDUCED     2
00059 #define PRINTF_NOFLOAT     3
00060 #define PRINTF_FULL        4
00061 /* \} */
00062
00063 #ifndef CONFIG_PRINTF_RETURN_COUNT
00064
00065     #define CONFIG_PRINTF_RETURN_COUNT 1
00066 #endif
00067
00068 int
00069 _formatted_write(
00070     const char *format,
00071     void put_char_func(char c, void *user_data),
00072     void *user_data,
00073     va_list ap);
00074
00075 #if CPU_HARVARD
00076     #include <cpu/pgm.h>
00077     int _formatted_write_P(
00078         const char * PROGMEM format,
00079         void put_char_func(char c, void *user_data),
00080         void *user_data,
00081         va_list ap);
00082 #endif /* CPU_HARVARD */
00083
00084 int sprintf_testSetup(void);
00085 int sprintf_testRun(void);
00086 int sprintf_testTearDown(void);
00087
00088 #endif /* MWARE_FORMATWR_H */
00089


BeRTOS: frame.h File Reference

  • cpu
Defines
frame.h File Reference

CPU-specific stack frame handling macros. More...

#include <cpu/detect.h>
#include "cfg/cfg_arch.h"
#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define | CPU_REG_INIT_VALUE(reg) (reg)
Default for macro not defined in the right arch section.
#define | CPU_IDLE PAUSE
Invoked by the scheduler to stop the CPU when idle.
#define | CPU_CREATE_NEW_STACK(stack)
Default macro for creating a new Process stack.

Detailed Description

CPU-specific stack frame handling macros.

These are mainly used by the portable part of the scheduler to work with the process stack frames.

Author:
Giovanni Bajo <rasky@develer.com>
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>
Francesco Sacchi <batt@develer.com>

Definition in file frame.h.

Define Documentation

#define CPU_IDLE PAUSE

Invoked by the scheduler to stop the CPU when idle.

This hook can be redefined to put the CPU in low-power mode, or to profile system load with an external strobe, or to save CPU cycles in hosted environments such as emulators.

Definition at line 260 of file frame.h.


BeRTOS: frame.h Source File

  • cpu
frame.h
Go to the documentation of this file.
00001
00045 #ifndef CPU_FRAME_H
00046 #define CPU_FRAME_H
00047
00048 #include <cpu/detect.h>
00049
00050 #include "cfg/cfg_arch.h"      /* ARCH_EMUL */
00051 #include <cfg/compiler.h>      /* for uintXX_t */
00052
00053 #if CPU_X86
00054     #if CPU_X86_32
00055         #define CPU_SAVED_REGS_CNT      2
00056     #elif CPU_X86_64
00057         #define CPU_SAVED_REGS_CNT      8
00058     #else
00059         #error "unknown CPU"
00060     #endif
00061     #define CPU_STACK_GROWS_UPWARD  0
00062     #define CPU_SP_ON_EMPTY_SLOT    0
00063
00064 #elif CPU_ARM
00065
00066     #define CPU_SAVED_REGS_CNT     8
00067     #define CPU_STACK_GROWS_UPWARD 0
00068     #define CPU_SP_ON_EMPTY_SLOT   0
00069
00070 #elif CPU_CM3
00071
00072     #define CPU_SAVED_REGS_CNT     8
00073     #define CPU_STACK_GROWS_UPWARD 0
00074     #define CPU_SP_ON_EMPTY_SLOT   0
00075
00076 #elif CPU_PPC
00077
00078     #define CPU_SAVED_REGS_CNT     1
00079     #define CPU_STACK_GROWS_UPWARD 0
00080     #define CPU_SP_ON_EMPTY_SLOT   1
00081
00082 #elif CPU_DSP56K
00083
00084     #define CPU_SAVED_REGS_CNT      8
00085     #define CPU_STACK_GROWS_UPWARD  1
00086     #define CPU_SP_ON_EMPTY_SLOT    0
00087
00088 #elif CPU_AVR
00089
00090     #define CPU_SAVED_REGS_CNT     18
00091     #define CPU_STACK_GROWS_UPWARD  0
00092     #define CPU_SP_ON_EMPTY_SLOT    1
00093
00094 #elif CPU_MSP430
00095
00096     #define CPU_SAVED_REGS_CNT     16
00097     #define CPU_STACK_GROWS_UPWARD  1
00098     #define CPU_SP_ON_EMPTY_SLOT    0
00099
00100 #else
00101     #error No CPU_... defined.
00102 #endif
00103
00104 #ifndef CPU_STACK_GROWS_UPWARD
00105     #error CPU_STACK_GROWS_UPWARD should have been defined to either 0 or 1
00106 #endif
00107
00108 #ifndef CPU_SP_ON_EMPTY_SLOT
00109     #error CPU_SP_ON_EMPTY_SLOT should have been defined to either 0 or 1
00110 #endif
00111
00113 #ifndef CPU_REG_INIT_VALUE
00114     #define CPU_REG_INIT_VALUE(reg)     (reg)
00115 #endif
00116
00117 /*
00118  * Support stack handling peculiarities of a few CPUs.
00119  *
00120  * Most processors let their stack grow downward and
00121  * keep SP pointing at the last pushed value.
00122  */
00123 #if !CPU_STACK_GROWS_UPWARD
00124     #if !CPU_SP_ON_EMPTY_SLOT
00125         /* Most microprocessors (x86, m68k...) */
00126         #define CPU_PUSH_WORD(sp, data) \
00127             do { *--(sp) = (data); } while (0)
00128         #define CPU_POP_WORD(sp) \
00129             (*(sp)++)
00130     #else
00131         /* AVR insanity */
00132         #define CPU_PUSH_WORD(sp, data) \
00133             do { *(sp)-- = (data); } while (0)
00134         #define CPU_POP_WORD(sp) \
00135             (*++(sp))
00136     #endif
00137
00138 #else /* CPU_STACK_GROWS_UPWARD */
00139
00140     #if !CPU_SP_ON_EMPTY_SLOT
00141         /* DSP56K and other weirdos */
00142         #define CPU_PUSH_WORD(sp, data) \
00143             do { *++(sp) = (cpu_stack_t)(data); } while (0)
00144         #define CPU_POP_WORD(sp) \
00145             (*(sp)--)
00146     #else
00147         #error I bet you cannot find a CPU like this
00148     #endif
00149 #endif
00150
00151
00152 #if CPU_DSP56K
00153     /*
00154      * DSP56k pushes both PC and SR to the stack in the JSR instruction, but
00155      * RTS discards SR while returning (it does not restore it). So we push
00156      * 0 to fake the same context.
00157      */
00158     #define CPU_PUSH_CALL_FRAME(sp, func) \
00159         do { \
00160             CPU_PUSH_WORD((sp), (func)); \
00161             CPU_PUSH_WORD((sp), 0x100); \
00162         } while (0);
00163
00164 #elif CPU_CM3
00165
00166     #if CONFIG_KERN_PREEMPT
00167         INLINE void cm3_preempt_switch_context(cpu_stack_t **new_sp, cpu_stack_t **old_sp)
00168         {
00169             register cpu_stack_t **__new_sp asm ("r0") = new_sp;
00170             register cpu_stack_t **__old_sp asm ("r1") = old_sp;
00171
00172             asm volatile ("svc #0"
00173                 : : "r"(__new_sp), "r"(__old_sp) : "memory", "cc");
00174         }
00175         #define asm_switch_context cm3_preempt_switch_context
00176
00177         #define CPU_CREATE_NEW_STACK(stack) \
00178             do { \
00179                 size_t i; \
00180                 /* Initialize process stack frame */ \
00181                 CPU_PUSH_WORD((stack), 0x01000000);     /* xPSR    */   \
00182                 CPU_PUSH_WORD((stack), (cpu_stack_t)proc_entry);    /* pc      */   \
00183                 CPU_PUSH_WORD((stack), 0);              /* lr      */   \
00184                 CPU_PUSH_WORD((stack), 0);              /* ip      */   \
00185                 CPU_PUSH_WORD((stack), 0);              /* r3      */   \
00186                 CPU_PUSH_WORD((stack), 0);              /* r2      */   \
00187                 CPU_PUSH_WORD((stack), 0);              /* r1      */   \
00188                 CPU_PUSH_WORD((stack), 0);              /* r0      */   \
00189                 CPU_PUSH_WORD((stack), 0xfffffffd);     /* lr_exc  */   \
00190                 /* Push a clean set of CPU registers for asm_switch_context() */ \
00191                 for (i = 0; i < CPU_SAVED_REGS_CNT; i++) \
00192                     CPU_PUSH_WORD(stack, CPU_REG_INIT_VALUE(i)); \
00193                 CPU_PUSH_WORD(stack, IRQ_PRIO_DISABLED); \
00194             } while (0)
00195
00196     #endif /* CONFIG_KERN_PREEMPT */
00197
00198 #elif CPU_AVR
00199     /*
00200      * On AVR, addresses are pushed into the stack as little-endian, while
00201      * memory accesses are big-endian (actually, it's a 8-bit CPU, so there is
00202      * no natural endianess).
00203      */
00204     #define CPU_PUSH_CALL_FRAME(sp, func) \
00205         do { \
00206             uint16_t funcaddr = (uint16_t)(func); \
00207             CPU_PUSH_WORD((sp), funcaddr); \
00208             CPU_PUSH_WORD((sp), funcaddr>>8); \
00209         } while (0)
00210
00211     /*
00212      * If the kernel is in idle-spinning, the processor executes:
00213      *
00214      * IRQ_ENABLE;
00215      * CPU_IDLE;
00216      * IRQ_DISABLE;
00217      *
00218      * IRQ_ENABLE is translated in asm as "sei" and IRQ_DISABLE as "cli".
00219      * We could define CPU_IDLE to expand to none, so the resulting
00220      * asm code would be:
00221      *
00222      * sei;
00223      * cli;
00224      *
00225      * But Atmel datasheet states:
00226      * "When using the SEI instruction to enable interrupts,
00227      * the instruction following SEI will be executed *before*
00228      * any pending interrupts", so "cli" is executed before any
00229      * pending interrupt with the result that IRQs will *NOT*
00230      * be enabled!
00231      * To ensure that IRQ will run a NOP is required.
00232      */
00233     #define CPU_IDLE NOP
00234
00235 #elif CPU_PPC
00236
00237     #define CPU_PUSH_CALL_FRAME(sp, func) \
00238         do { \
00239             CPU_PUSH_WORD((sp), (cpu_stack_t)(func)); /* LR -> 8(SP) */ \
00240             CPU_PUSH_WORD((sp), 0);                  /* CR -> 4(SP) */ \
00241         } while (0)
00242
00243 #endif
00244
00245 #ifndef CPU_PUSH_CALL_FRAME
00246     #define CPU_PUSH_CALL_FRAME(sp, func) \
00247         CPU_PUSH_WORD((sp), (cpu_stack_t)(func))
00248 #endif
00249
00259 #ifndef CPU_IDLE
00260     #define CPU_IDLE PAUSE
00261 #endif /* !CPU_IDLE */
00262
00266 #ifndef CPU_CREATE_NEW_STACK
00267
00268     #define CPU_CREATE_NEW_STACK(stack) \
00269         do { \
00270             size_t i; \
00271             /* Initialize process stack frame */ \
00272             CPU_PUSH_CALL_FRAME(stack, proc_entry); \
00273             /* Push a clean set of CPU registers for asm_switch_context() */ \
00274             for (i = 0; i < CPU_SAVED_REGS_CNT; i++) \
00275                 CPU_PUSH_WORD(stack, CPU_REG_INIT_VALUE(i)); \
00276         } while (0)
00277 #endif
00278
00279 #endif /* CPU_ATTR_H */


BeRTOS: ft245rl.c File Reference

  • drv
Functions
ft245rl.c File Reference

Function library for Accessing FT245RL USB interface. More...

#include "hw/hw_ft245rl.h"
#include "ft245rl.h"
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <cfg/module.h>
#include <drv/timer.h>
#include <io/kfile.h>
#include <string.h>

Go to the source code of this file.

Functions

static size_t | ft245rl_read (struct KFile *_fd, void *_buf, size_t size)
Read size bytes in buffer buf, from fid _fd.
static size_t | ft245rl_write (struct KFile *_fd, const void *_buf, size_t size)
Write size bytes from buffer buf, of fid _fd.
void | ft245rl_init (Ft245rl *fd)
Ft245rl init function.

Detailed Description

Function library for Accessing FT245RL USB interface.

This module handles USB communication with FT245RL chip. This chip is a parallel USB interface with data flow control. A kfile-like interface is supplied.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file ft245rl.c.


BeRTOS: ft245rl.c Source File

  • drv
ft245rl.c
Go to the documentation of this file.
00001
00042 #include "hw/hw_ft245rl.h"
00043 #include "ft245rl.h"
00044
00045 #include <cfg/macros.h>
00046 #include <cfg/debug.h>
00047 #include <cfg/module.h>
00048
00049 #include <drv/timer.h>
00050
00051 #include <io/kfile.h>
00052
00053 #include <string.h>
00054
00055
00056 MOD_DEFINE(ft245rl);
00057
00061 static size_t ft245rl_read(struct KFile *_fd, void *_buf, size_t size)
00062 {
00063     Ft245rl *fd = FT245RL_CAST(_fd);
00064     (void)fd; //unused
00065     uint8_t *buf = (uint8_t *)_buf;
00066     size_t total_read = 0;
00067
00068     while (size--)
00069     {
00070         while(!FT245RL_DATA_RDY())
00071             /* busy waiy */;
00072
00073         *buf++ = FT245RL_GETDATA();
00074         total_read++;
00075     }
00076
00077     return total_read;
00078 }
00079
00083 static size_t ft245rl_write(struct KFile *_fd, const void *_buf, size_t size)
00084 {
00085     Ft245rl *fd = FT245RL_CAST(_fd);
00086     (void)fd; //unused
00087     const uint8_t *buf = (const uint8_t *)_buf;
00088     size_t total_write = 0;
00089
00090     while (size--)
00091     {
00092         while(!FT245RL_TX_ALLOWED())
00093             /* busy waiy */;
00094
00095         FT245RL_SETDATA(*buf++);
00096         total_write++;
00097     }
00098
00099     return total_write;
00100 }
00101
00105 void ft245rl_init(Ft245rl *fd)
00106 {
00107     memset(fd, 0, sizeof(*fd));
00108     DB(fd->fd._type = KFT_FT245RL);
00109
00110     // Setup data ft245rl communication functions.
00111     fd->fd.read = ft245rl_read;
00112     fd->fd.write = ft245rl_write;
00113
00114     FT245RL_INIT();
00115     while (FT245RL_DATA_RDY())
00116         FT245RL_GETDATA();
00117
00118     MOD_INIT(ft245rl);
00119 }


BeRTOS: ft245rl.h File Reference

  • drv
Data Structures | Defines | Functions
ft245rl.h File Reference

Function library for Accessing FT245RL USB interface. More...

#include <io/kfile.h>
#include <cfg/compiler.h>

Go to the source code of this file.

Data Structures

struct | Ft245rl
Ft245rl KFile context structure. More...

Defines

#define | KFT_FT245RL MAKE_ID('F', '2', '4', '5')
ID for FT245RL KFiles.

Functions

Ft245rl * | FT245RL_CAST (KFile *fd)
Convert + ASSERT from generic KFile to KFileFt245rl.
void | ft245rl_init (Ft245rl *fd)
Ft245rl init function.

Detailed Description

Function library for Accessing FT245RL USB interface.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file ft245rl.h.


BeRTOS: ft245rl.h Source File

  • drv
ft245rl.h
Go to the documentation of this file.
00001
00044 #ifndef DRV_FT245RL_H
00045 #define DRV_FT245RL_H
00046
00047 #include <io/kfile.h>
00048 #include <cfg/compiler.h>
00049
00053 #define KFT_FT245RL MAKE_ID('F', '2', '4', '5')
00054
00058 typedef struct Ft245rl
00059 {
00060     KFile fd;
00061 } Ft245rl;
00062
00063
00067 INLINE Ft245rl * FT245RL_CAST(KFile *fd)
00068 {
00069     ASSERT(fd->_type == KFT_FT245RL);
00070     return (Ft245rl *)fd;
00071 }
00072
00073 void ft245rl_init(Ft245rl *fd);
00074
00075 #endif /* DRV_FT245RL_H */


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- _ -

  • _delay : Timer


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- k -

  • kd : PidCfg
  • key_internal : HashTable
  • ki : PidCfg
  • kp : PidCfg


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- l -

  • label : MenuItem
  • lcd_blitBitmap : Menu
  • lcd_font : EmulLCD
  • len : AX25Msg , PocketCmdMsg , TagPacket , PocketBusCtx , PocketMsg
  • levelInverted : StepperConfig
  • levelSensorIndex : StepperConfig
  • link : BattFs , Window , DFilter , Timer
  • load_device : Sipo
  • load_pol : Sipo
  • lock : Resource


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- m -

  • map : DFilter
  • max_elts_log2 : HashTable
  • max_off : BattFs
  • mem : HashTable , KFileMem
  • mode : BattFs
  • motor : TimerCounter
  • msgs : nmeap_context_t


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- n -

  • name : CmdTemplate
  • num_resistances : NtcHwInfo


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- o -

  • out_cks : PocketBusCtx
  • out_max : PidCfg
  • out_min : PidCfg
  • owner : Resource


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- a -

  • adc_ch : DCMotorConfig , Afsk
  • adc_max : DCMotorConfig
  • adc_min : DCMotorConfig
  • addr : PocketCmdCtx , PocketBusHdr , PocketMsg , Eeprom , Layer
  • arg_fmt : CmdTemplate
  • axisInverted : StepperConfig


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- b -

  • b : Sd
  • bdigit : SevenSeg
  • bg_color : EmulLCD
  • bit_idx : Hdlc
  • bit_order : Sipo
  • bit_stuff : Afsk
  • bitmap : Menu , Window
  • blink : SevenSeg
  • blk : Flash , KFileBlock
  • blk_cnt : KBlock
  • blk_ctrl_set : TimerCounter
  • blk_size : KBlock , EepromInfo
  • block_len : CardCSD
  • block_num : CardCSD
  • braked : DCMotorConfig
  • buf : AX25Ctx , Layer , TagPacket , PocketCmdMsg , PocketBusCtx
  • buffer : Md2Context
  • bus_ctx : PocketCmdCtx
  • busyedit : SevenSeg


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- c -

  • call : AX25Call
  • callback : TimerCounter
  • capacity : CardCSD
  • cfg : Stepper
  • cgram : EmulLCD
  • cgramaddr : EmulLCD
  • ch : AX25Ctx , Sd
  • changeCurrentIrqs : Stepper
  • channel : DataFlash , Flash25
  • checksum : Md2Context
  • children : Window
  • chl_ctrl_reg : TimerCounter
  • chl_mode_reg : TimerCounter
  • clock_pol : Sipo
  • clocksHome : StepperConfig
  • cmd : PocketCmdHdr , PocketCmdMsg
  • cmd_ctx : PocketCmdMsg
  • comp_c_reg : TimerCounter
  • comp_effect_c_clear : TimerCounter
  • comp_effect_c_mask : TimerCounter
  • comp_effect_clear : TimerCounter
  • comp_effect_mask : TimerCounter
  • comp_effect_set : TimerCounter
  • comp_reg : TimerCounter
  • config : UsbDevice
  • configured : UsbDevice
  • controlBit : StepperConfig
  • controlMoveBit : StepperConfig
  • count_val_reg : TimerCounter
  • counter : EntropyPool , Md2Context
  • cr_col : EmulLCD
  • crc_in : AX25Ctx
  • crc_out : AX25Ctx
  • ctrl : AX25Msg
  • ctx : PocketMsg
  • curdigit : SevenSeg
  • curpos : SevenSeg
  • curr_out : Afsk
  • curr_phase : Afsk
  • currchar : Hdlc
  • current_page : DataFlash
  • curspeed : SevenSeg


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- d -

  • dac_ch : Afsk
  • data_size : BattFsSuper
  • ddram : EmulLCD
  • degrees_min : NtcHwInfo
  • degrees_step : NtcHwInfo
  • delay_buf : Afsk
  • delay_fifo : Afsk
  • demod_bits : Hdlc
  • density_id : DataflashInfo
  • dev : BattFsSuper , DataFlash
  • device : UsbDevice
  • dir : Stepper , DCMotorConfig
  • disk : BattFs
  • disk_size : BattFsSuper
  • dst : AX25Msg


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- e -

  • e2_size : EepromInfo
  • EmulTimer() : EmulTimer
  • enableCheckHome : Stepper
  • enabled : SysIrq
  • entropy : EntropyPool
  • errors : BattFs
  • escape : PocketBusCtx , AX25Ctx
  • event_cb : UsbDevice
  • expire : Timer
  • ext_event_set : TimerCounter


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- f -

  • fcs : BattFsPageHeader
  • fd : KFileDebug , Flash25 , BattFs , KFileBlock , Ft245rl , Afsk , PocketBusCtx , DataFlash , Serial , KFileMem , Sipo
  • fg_color : EmulLCD
  • file_opened_list : BattFsSuper
  • fill : BattFsPageHeader
  • firstrun : SevenSeg
  • flags : KbdHandler , MenuItem , CmdTemplate , Menu
  • font_height : EmulLCD
  • found_bits : Afsk
  • frame_width : EmulLCD
  • free_bytes : BattFsSuper
  • free_page_start : BattFsSuper
  • FreeList : Heap
  • freq : DCMotorConfig
  • frm_len : AX25Ctx
  • func : CmdTemplate


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- g -

  • geom : Window


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- h -

  • halfStep : StepperConfig
  • handler : SysIrq
  • has_dev_addr : EepromInfo
  • hdlc : Afsk
  • height : Bitmap , Image
  • highcurrentBit : StepperConfig
  • homeInverted : StepperConfig
  • homeSensorIndex : StepperConfig
  • hook : HashTable , KbdHandler , AX25Ctx , MenuItem
  • host : TagPacket
  • hpread() : EmulTimer
  • hw : Serial


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- i -

  • i_max : PidCfg
  • i_min : PidCfg
  • i_state : PidContext
  • iir_x : Afsk
  • iir_y : Afsk
  • in_cks : PocketBusCtx
  • index : Stepper
  • info : AX25Msg
  • init() : EmulTimer
  • initialized : EmulTimer
  • inode : BattFsPageHeader , BattFs
  • input : nmeap_context_t
  • instance() : EmulTimer
  • irq_disable_reg : TimerCounter
  • irq_enable_reg : TimerCounter
  • irq_mask_reg : TimerCounter
  • irq_set_mask : TimerCounter
  • isr : TimerCounter
  • items : Menu


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- p -

  • page_array : BattFsSuper
  • page_bits : DataflashInfo
  • page_cnt : DataflashInfo
  • page_dirty : DataFlash
  • page_size : DataflashInfo
  • parent : Window
  • payload : PocketMsg
  • penY : Bitmap
  • pgoff : BattFsPageHeader
  • phase_acc : Afsk
  • phase_inc : Afsk
  • pid : AX25Msg
  • pid_cfg : DCMotorConfig
  • pid_enable : DCMotorConfig
  • pool_entropy : EntropyPool
  • pos_add : EntropyPool
  • pos_get : EntropyPool
  • power : Stepper
  • powerIdle : StepperConfig
  • powerRun : StepperConfig
  • preamble_len : Afsk
  • precalc : Ramp
  • prev_err : PidContext
  • pri : Layer , Resource , KbdHandler
  • priv : KBlock
  • pulse : StepperConfig
  • pwm_dev : DCMotorConfig


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- q -

  • queue : Resource


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- r -

  • r1 : Sd
  • ramp : StepperConfig
  • rampStep : Stepper
  • raster : EmulLCD , Bitmap , Image
  • read_cmd : DataflashInfo
  • recv : Signal
  • reply_timer : PocketCmdCtx
  • resistances : NtcHwInfo
  • result_fmt : CmdTemplate
  • runonce : SevenSeg
  • rx_buf : Afsk
  • rx_fifo : Afsk
  • rxstart : Hdlc


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- s -

  • sample_count : Afsk
  • sample_period : PidCfg
  • sampled_bits : Afsk
  • search : PocketCmdCtx
  • selected : Menu
  • sending : Afsk
  • sentence : nmeap_context_t
  • seq : BattFsPageHeader
  • setCS : DataFlash
  • setEnable : SysIrq
  • setReset : DataFlash
  • show_cursor : EmulLCD
  • skipIrqs : Stepper
  • speed : Stepper , DCMotorConfig , SevenSeg
  • speed_dev_id : DCMotorConfig
  • src : AX25Msg
  • ssid : AX25Call
  • start : BattFs
  • state : Md2Context , Stepper
  • states : StepperConfig
  • status : Serial , Afsk
  • status_reg : TimerCounter
  • step : Stepper
  • stepCircular : Stepper
  • stepsDeaf : Stepper
  • stepsErrorHome : Stepper
  • stepsInHome : StepperConfig
  • stepsLevel : Stepper
  • stepsOutHome : StepperConfig
  • stepsTollInHome : StepperConfig
  • stepsTollMax : Stepper
  • stepsTollMin : Stepper
  • stepsTollOutHome : StepperConfig
  • stepToReach : Stepper
  • stride : Bitmap , Image
  • string : SevenSeg
  • string_len : SevenSeg
  • strings : UsbDevice
  • stuff_cnt : Afsk
  • sync : PocketBusCtx , TagPacket , AX25Ctx
  • system_time : EmulTimer


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- t -

  • tag : TagPacket
  • target : DFilter
  • targets : DNotifier
  • tick : Timer
  • timeoutHome : StepperConfig
  • timer : Stepper , EmulTimer
  • timer_id : TimerCounter
  • tio_pin : TimerCounter
  • title : Menu
  • trailer_len : Afsk
  • tranfer_len : Sd
  • tx_bit : Afsk
  • tx_buf : Afsk
  • tx_fifo : Afsk
  • type : Eeprom


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- u -

  • unit : Serial
  • update : DNotifier , DFilter
  • user_data : nmeap_context_t
  • userdata : MenuItem


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- v -

  • ver : PocketBusHdr


BeRTOS: Data Fields

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:

- w -

  • wait : Signal
  • waiting : PocketCmdCtx
  • width : Image


BeRTOS: Data Fields - Functions

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • EmulTimer() : EmulTimer
  • hpread() : EmulTimer
  • init() : EmulTimer
  • instance() : EmulTimer


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- _ -

  • _delay : Timer


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- k -

  • kd : PidCfg
  • key_internal : HashTable
  • ki : PidCfg
  • kp : PidCfg


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- l -

  • label : MenuItem
  • lcd_blitBitmap : Menu
  • lcd_font : EmulLCD
  • len : AX25Msg , PocketCmdMsg , TagPacket , PocketBusCtx , PocketMsg
  • levelInverted : StepperConfig
  • levelSensorIndex : StepperConfig
  • link : BattFs , Window , DFilter , Timer
  • load_device : Sipo
  • load_pol : Sipo
  • lock : Resource


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- m -

  • map : DFilter
  • max_elts_log2 : HashTable
  • max_off : BattFs
  • mem : HashTable , KFileMem
  • mode : BattFs
  • motor : TimerCounter
  • msgs : nmeap_context_t


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- n -

  • name : CmdTemplate
  • num_resistances : NtcHwInfo


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- o -

  • out_cks : PocketBusCtx
  • out_max : PidCfg
  • out_min : PidCfg
  • owner : Resource


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- a -

  • adc_ch : DCMotorConfig , Afsk
  • adc_max : DCMotorConfig
  • adc_min : DCMotorConfig
  • addr : PocketCmdCtx , PocketBusHdr , PocketMsg , Eeprom , Layer
  • arg_fmt : CmdTemplate
  • axisInverted : StepperConfig


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- b -

  • b : Sd
  • bdigit : SevenSeg
  • bg_color : EmulLCD
  • bit_idx : Hdlc
  • bit_order : Sipo
  • bit_stuff : Afsk
  • bitmap : Menu , Window
  • blink : SevenSeg
  • blk : Flash , KFileBlock
  • blk_cnt : KBlock
  • blk_ctrl_set : TimerCounter
  • blk_size : KBlock , EepromInfo
  • block_len : CardCSD
  • block_num : CardCSD
  • braked : DCMotorConfig
  • buf : AX25Ctx , Layer , TagPacket , PocketCmdMsg , PocketBusCtx
  • buffer : Md2Context
  • bus_ctx : PocketCmdCtx
  • busyedit : SevenSeg


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- c -

  • call : AX25Call
  • callback : TimerCounter
  • capacity : CardCSD
  • cfg : Stepper
  • cgram : EmulLCD
  • cgramaddr : EmulLCD
  • ch : AX25Ctx , Sd
  • changeCurrentIrqs : Stepper
  • channel : DataFlash , Flash25
  • checksum : Md2Context
  • children : Window
  • chl_ctrl_reg : TimerCounter
  • chl_mode_reg : TimerCounter
  • clock_pol : Sipo
  • clocksHome : StepperConfig
  • cmd : PocketCmdHdr , PocketCmdMsg
  • cmd_ctx : PocketCmdMsg
  • comp_c_reg : TimerCounter
  • comp_effect_c_clear : TimerCounter
  • comp_effect_c_mask : TimerCounter
  • comp_effect_clear : TimerCounter
  • comp_effect_mask : TimerCounter
  • comp_effect_set : TimerCounter
  • comp_reg : TimerCounter
  • config : UsbDevice
  • configured : UsbDevice
  • controlBit : StepperConfig
  • controlMoveBit : StepperConfig
  • count_val_reg : TimerCounter
  • counter : EntropyPool , Md2Context
  • cr_col : EmulLCD
  • crc_in : AX25Ctx
  • crc_out : AX25Ctx
  • ctrl : AX25Msg
  • ctx : PocketMsg
  • curdigit : SevenSeg
  • curpos : SevenSeg
  • curr_out : Afsk
  • curr_phase : Afsk
  • currchar : Hdlc
  • current_page : DataFlash
  • curspeed : SevenSeg


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- d -

  • dac_ch : Afsk
  • data_size : BattFsSuper
  • ddram : EmulLCD
  • degrees_min : NtcHwInfo
  • degrees_step : NtcHwInfo
  • delay_buf : Afsk
  • delay_fifo : Afsk
  • demod_bits : Hdlc
  • density_id : DataflashInfo
  • dev : BattFsSuper , DataFlash
  • device : UsbDevice
  • dir : Stepper , DCMotorConfig
  • disk : BattFs
  • disk_size : BattFsSuper
  • dst : AX25Msg


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- e -

  • e2_size : EepromInfo
  • enableCheckHome : Stepper
  • enabled : SysIrq
  • entropy : EntropyPool
  • errors : BattFs
  • escape : PocketBusCtx , AX25Ctx
  • event_cb : UsbDevice
  • expire : Timer
  • ext_event_set : TimerCounter


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- f -

  • fcs : BattFsPageHeader
  • fd : KFileDebug , Flash25 , BattFs , KFileBlock , Ft245rl , Afsk , PocketBusCtx , DataFlash , Serial , KFileMem , Sipo
  • fg_color : EmulLCD
  • file_opened_list : BattFsSuper
  • fill : BattFsPageHeader
  • firstrun : SevenSeg
  • flags : KbdHandler , MenuItem , CmdTemplate , Menu
  • font_height : EmulLCD
  • found_bits : Afsk
  • frame_width : EmulLCD
  • free_bytes : BattFsSuper
  • free_page_start : BattFsSuper
  • FreeList : Heap
  • freq : DCMotorConfig
  • frm_len : AX25Ctx
  • func : CmdTemplate


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- g -

  • geom : Window


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- h -

  • halfStep : StepperConfig
  • handler : SysIrq
  • has_dev_addr : EepromInfo
  • hdlc : Afsk
  • height : Bitmap , Image
  • highcurrentBit : StepperConfig
  • homeInverted : StepperConfig
  • homeSensorIndex : StepperConfig
  • hook : MenuItem , AX25Ctx , HashTable , KbdHandler
  • host : TagPacket
  • hw : Serial


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- i -

  • i_max : PidCfg
  • i_min : PidCfg
  • i_state : PidContext
  • iir_x : Afsk
  • iir_y : Afsk
  • in_cks : PocketBusCtx
  • index : Stepper
  • info : AX25Msg
  • initialized : EmulTimer
  • inode : BattFs , BattFsPageHeader
  • input : nmeap_context_t
  • irq_disable_reg : TimerCounter
  • irq_enable_reg : TimerCounter
  • irq_mask_reg : TimerCounter
  • irq_set_mask : TimerCounter
  • isr : TimerCounter
  • items : Menu


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- p -

  • page_array : BattFsSuper
  • page_bits : DataflashInfo
  • page_cnt : DataflashInfo
  • page_dirty : DataFlash
  • page_size : DataflashInfo
  • parent : Window
  • payload : PocketMsg
  • penY : Bitmap
  • pgoff : BattFsPageHeader
  • phase_acc : Afsk
  • phase_inc : Afsk
  • pid : AX25Msg
  • pid_cfg : DCMotorConfig
  • pid_enable : DCMotorConfig
  • pool_entropy : EntropyPool
  • pos_add : EntropyPool
  • pos_get : EntropyPool
  • power : Stepper
  • powerIdle : StepperConfig
  • powerRun : StepperConfig
  • preamble_len : Afsk
  • precalc : Ramp
  • prev_err : PidContext
  • pri : Layer , Resource , KbdHandler
  • priv : KBlock
  • pulse : StepperConfig
  • pwm_dev : DCMotorConfig


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- q -

  • queue : Resource


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- r -

  • r1 : Sd
  • ramp : StepperConfig
  • rampStep : Stepper
  • raster : EmulLCD , Bitmap , Image
  • read_cmd : DataflashInfo
  • recv : Signal
  • reply_timer : PocketCmdCtx
  • resistances : NtcHwInfo
  • result_fmt : CmdTemplate
  • runonce : SevenSeg
  • rx_buf : Afsk
  • rx_fifo : Afsk
  • rxstart : Hdlc


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- s -

  • sample_count : Afsk
  • sample_period : PidCfg
  • sampled_bits : Afsk
  • search : PocketCmdCtx
  • selected : Menu
  • sending : Afsk
  • sentence : nmeap_context_t
  • seq : BattFsPageHeader
  • setCS : DataFlash
  • setEnable : SysIrq
  • setReset : DataFlash
  • show_cursor : EmulLCD
  • skipIrqs : Stepper
  • speed : Stepper , DCMotorConfig , SevenSeg
  • speed_dev_id : DCMotorConfig
  • src : AX25Msg
  • ssid : AX25Call
  • start : BattFs
  • state : Md2Context , Stepper
  • states : StepperConfig
  • status : Serial , Afsk
  • status_reg : TimerCounter
  • step : Stepper
  • stepCircular : Stepper
  • stepsDeaf : Stepper
  • stepsErrorHome : Stepper
  • stepsInHome : StepperConfig
  • stepsLevel : Stepper
  • stepsOutHome : StepperConfig
  • stepsTollInHome : StepperConfig
  • stepsTollMax : Stepper
  • stepsTollMin : Stepper
  • stepsTollOutHome : StepperConfig
  • stepToReach : Stepper
  • stride : Bitmap , Image
  • string : SevenSeg
  • string_len : SevenSeg
  • strings : UsbDevice
  • stuff_cnt : Afsk
  • sync : PocketBusCtx , TagPacket , AX25Ctx
  • system_time : EmulTimer


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- t -

  • tag : TagPacket
  • target : DFilter
  • targets : DNotifier
  • tick : Timer
  • timeoutHome : StepperConfig
  • timer : Stepper , EmulTimer
  • timer_id : TimerCounter
  • tio_pin : TimerCounter
  • title : Menu
  • trailer_len : Afsk
  • tranfer_len : Sd
  • tx_bit : Afsk
  • tx_buf : Afsk
  • tx_fifo : Afsk
  • type : Eeprom


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- u -

  • unit : Serial
  • update : DNotifier , DFilter
  • user_data : nmeap_context_t
  • userdata : MenuItem


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- v -

  • ver : PocketBusHdr


BeRTOS: Data Fields - Variables

  • Data Structures
  • Data Structure Index
  • Data Fields
  • All
  • Functions
  • Variables
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w

- w -

  • wait : Signal
  • waiting : PocketCmdCtx
  • width : Image


BeRTOS: general-introduction Source File

  • doc
general-introduction
00001


BeRTOS: gfx.h File Reference

  • gfx
Data Structures | Defines | Functions | Variables
gfx.h File Reference
#include "cfg/cfg_gfx.h"
#include <cfg/compiler.h>
#include <cpu/attr.h>

Go to the source code of this file.

Data Structures

struct | Rect
Describe a rectangular area with coordinates expressed in pixels. More...
struct | Bitmap
Control structure to draw in a bitmap. More...
struct | Image
Hold image pixels. More...

Defines

#define | CONFIG_CHART_TYPE_X uint8_t
Type for the chart dataset.
#define | CONFIG_CHART_TYPE_Y uint8_t
Type for the chart dataset.
#define | RECT_WIDTH(r) ((r)->xmax - (r)->xmin)
Return the width of a rectangle in pixels.
#define | RECT_HEIGHT(r) ((r)->ymax - (r)->ymin)
Return the height of a rectangle in pixels.
Known pixel formats for bitmap representation.
#define | BITMAP_FMT_PLANAR_H_MSB 1
Planar pixels, horizontal bytes, MSB left.
#define | BITMAP_FMT_PLANAR_V_LSB 2
Planar pixels, vertical bytes, LSB top.

Functions

void | gfx_bitmapInit (Bitmap *bm, uint8_t *raster, coord_t w, coord_t h)
Initialize a Bitmap structure with the provided parameters.
void | gfx_bitmapClear (Bitmap *bm)
Clear the whole bitmap surface to the background color.
void | gfx_blit (Bitmap *dst, const Rect *rect, const Bitmap *src, coord_t srcx, coord_t srcy)
Copy a rectangular area of a bitmap on another bitmap.
void | gfx_blitRaster (Bitmap *dst, coord_t dx, coord_t dy, const uint8_t *raster, coord_t w, coord_t h, coord_t stride)
Blit a raster to a Bitmap.
void | gfx_blitImage (Bitmap *dst, coord_t dx, coord_t dy, const Image *image)
Blit an Image to a Bitmap.
void | gfx_line (Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2)
Draw a sloped line segment.
void | gfx_rectDraw (Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2)
Draw the perimeter of an hollow rectangle.
void | gfx_rectFillC (Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2, uint8_t color)
Fill a rectangular area with color.
void | gfx_rectFill (Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2)
Draw a filled rectangle.
void | gfx_rectClear (Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2)
Clear a rectangular area.
void | gfx_moveTo (Bitmap *bm, coord_t x, coord_t y)
Move the current pen position to the specified coordinates.
void | gfx_lineTo (Bitmap *bm, coord_t x, coord_t y)
Draw a line from the current pen position to the new coordinates.

Variables

EXTERN_C_BEGIN typedef int | coord_t
Common type for coordinates expressed in pixel units.

Detailed Description

Definition in file gfx.h.

Define Documentation

#define BITMAP_FMT_PLANAR_H_MSB 1

Planar pixels, horizontal bytes, MSB left.

Definition at line 63 of file gfx.h.

#define BITMAP_FMT_PLANAR_V_LSB 2

Planar pixels, vertical bytes, LSB top.

Definition at line 64 of file gfx.h.

#define RECT_HEIGHT ( r ) ((r)->ymax - (r)->ymin)

Return the height of a rectangle in pixels.

Note:
The argument r is evaluated twice.

Definition at line 125 of file gfx.h.

#define RECT_WIDTH ( r ) ((r)->xmax - (r)->xmin)

Return the width of a rectangle in pixels.

Note:
The argument r is evaluated twice.

Definition at line 118 of file gfx.h.

Function Documentation

void gfx_bitmapClear ( Bitmap * bm )

Clear the whole bitmap surface to the background color.

Note:
This function does not update the current pen position.
This function bypasses the current clipping area.

Definition at line 97 of file bitmap.c.

void gfx_bitmapInit | ( | Bitmap * | bm,
 |  | uint8_t * | raster,
 |  | coord_t | w,
 |  | coord_t | h
 | ) |  |

Initialize a Bitmap structure with the provided parameters.

Note:
The pen position is reset to the origin.

Definition at line 62 of file bitmap.c.

void gfx_blit | ( | Bitmap * | dst,
 |  | const Rect * | rect,
 |  | const Bitmap * | src,
 |  | coord_t | srcx,
 |  | coord_t | srcy
 | ) |  |

Copy a rectangular area of a bitmap on another bitmap.

Blitting is a common copy operation involving two bitmaps. A rectangular area of the source bitmap is copied bit-wise to a different position in the destination bitmap.

Note:
Using the same bitmap for src and dst is unsupported.
Parameters:
dst | Bitmap where the operation writes.
rect | The (xmin;ymin) coordinates provide the top/left offset for drawing in the destination bitmap. If the source bitmap is larger than the rectangle, drawing is clipped.
src | Bitmap containing the source pixels.
srcx | Starting X offset in the source bitmap.
srcy | Starting Y offset in the source bitmap.

Definition at line 164 of file bitmap.c.

void gfx_blitImage | ( | Bitmap * | dst,
 |  | coord_t | dxmin,
 |  | coord_t | dymin,
 |  | const Image * | image
 | ) |  |

Blit an Image to a Bitmap.

See also:
gfx_blit()

Definition at line 222 of file bitmap.c.

void gfx_blitRaster | ( | Bitmap * | dst,
 |  | coord_t | dxmin,
 |  | coord_t | dymin,
 |  | const uint8_t * | raster,
 |  | coord_t | w,
 |  | coord_t | h,
 |  | coord_t | stride
 | ) |  |

Blit a raster to a Bitmap.

See also:
gfx_blit()

Definition at line 197 of file bitmap.c.

void gfx_line | ( | Bitmap * | bm,
 |  | coord_t | x1,
 |  | coord_t | y1,
 |  | coord_t | x2,
 |  | coord_t | y2
 | ) |  |

Draw a sloped line segment.

Draw a sloped line segment identified by the provided start and end coordinates on the bitmap bm.

The line endpoints are clipped inside the current bitmap clipping rectangle using the Cohen-Sutherland algorithm, which is very fast.

Note:
The point at coordinates x2 y2 is not drawn.
This function does not update the current pen position.

Definition at line 183 of file line.c.

void gfx_lineTo | ( | Bitmap * | bm,
 |  | coord_t | x,
 |  | coord_t | y
 | ) |  |

Draw a line from the current pen position to the new coordinates.

Note:
This function moves the current pen position to the new coordinates.
See also:
gfx_line()

Definition at line 263 of file line.c.

void gfx_moveTo | ( | Bitmap * | bm,
 |  | coord_t | x,
 |  | coord_t | y
 | ) |  |

Move the current pen position to the specified coordinates.

The pen position is used for drawing operations such as gfx_lineTo(), which can be used to draw polygons.

Definition at line 249 of file line.c.

void gfx_rectClear | ( | Bitmap * | bm,
 |  | coord_t | x1,
 |  | coord_t | y1,
 |  | coord_t | x2,
 |  | coord_t | y2
 | ) |  |

Clear a rectangular area.

Note:
The bottom-right border of the rectangle is not cleared.
This function does not update the current pen position.

Definition at line 353 of file line.c.

void gfx_rectDraw | ( | Bitmap * | bm,
 |  | coord_t | x1,
 |  | coord_t | y1,
 |  | coord_t | x2,
 |  | coord_t | y2
 | ) |  |

Draw the perimeter of an hollow rectangle.

Note:
The bottom-right corner of the rectangle is drawn at (x2-1;y2-1).
This function does not update the current pen position.

Definition at line 276 of file line.c.

void gfx_rectFill | ( | Bitmap * | bm,
 |  | coord_t | x1,
 |  | coord_t | y1,
 |  | coord_t | x2,
 |  | coord_t | y2
 | ) |  |

Draw a filled rectangle.

Note:
The bottom-right border of the rectangle is not drawn.
This function does not update the current pen position.

Definition at line 340 of file line.c.

void gfx_rectFillC | ( | Bitmap * | bm,
 |  | coord_t | x1,
 |  | coord_t | y1,
 |  | coord_t | x2,
 |  | coord_t | y2,
 |  | uint8_t | color
 | ) |  |

Fill a rectangular area with color.

Note:
The bottom-right border of the rectangle is not drawn.
This function does not update the current pen position.

Definition at line 297 of file line.c.


BeRTOS: gfx.h Source File

  • gfx
gfx.h
Go to the documentation of this file.
00001
00046 #ifndef GFX_GFX_H
00047 #define GFX_GFX_H
00048
00049 #include "cfg/cfg_gfx.h"    /* CONFIG_GFX_* */
00050 #include <cfg/compiler.h>
00051
00052 #include <cpu/attr.h>       /* CPU_HARVARD */
00053
00054
00055 #define CONFIG_CHART_TYPE_X uint8_t ///< Type for the chart dataset
00056 #define CONFIG_CHART_TYPE_Y uint8_t ///< Type for the chart dataset
00057
00063 #define BITMAP_FMT_PLANAR_H_MSB  1
00064 #define BITMAP_FMT_PLANAR_V_LSB  2
00065 /* \} */
00066
00067 #if !defined(CONFIG_BITMAP_FMT) || (CONFIG_BITMAP_FMT != BITMAP_FMT_PLANAR_H_MSB && CONFIG_BITMAP_FMT != BITMAP_FMT_PLANAR_V_LSB)
00068     #error CONFIG_BITMAP_FMT must be defined to either BITMAP_FMT_PLANAR_H_LSB or BITMAP_FMT_PLANAR_V_LSB
00069 #endif
00070 #if !defined(CONFIG_GFX_CLIPPING) || (CONFIG_GFX_CLIPPING != 0 && CONFIG_GFX_CLIPPING != 1)
00071     #error CONFIG_GFX_CLIPPING must be defined to either 0 or 1
00072 #endif
00073 #if !defined(CONFIG_GFX_TEXT) || (CONFIG_GFX_TEXT != 0 && CONFIG_GFX_TEXT != 1)
00074     #error CONFIG_GFX_TEXT must be defined to either 0 or 1
00075 #endif
00076
00077 EXTERN_C_BEGIN
00078
00080 typedef int coord_t;
00081 typedef unsigned int ucoord_t;
00082
00083 #if CONFIG_GFX_VCOORDS
00084
00085 typedef float vcoord_t;
00086 #endif /* CONFIG_GFX_VCOORDS */
00087
00088
00111 typedef struct Rect { coord_t xmin, ymin, xmax, ymax; } Rect;
00112
00118 #define RECT_WIDTH(r)   ((r)->xmax - (r)->xmin)
00119
00125 #define RECT_HEIGHT(r)  ((r)->ymax - (r)->ymin)
00126
00127 /* Fwd decl */
00128 struct Font;
00129
00136 typedef struct Bitmap
00137 {
00138     uint8_t *raster;
00139     coord_t width, height;
00140     coord_t stride;
00141     coord_t penX, penY;
00143 #if CONFIG_GFX_CLIPPING || CONFIG_GFX_VCOORDS
00144     Rect cr;
00145 #endif
00146
00147 #if CONFIG_GFX_TEXT
00148     const struct Font *font;
00159     uint8_t styles;
00160 #endif /* CONFIG_GFX_TEXT */
00161
00162 #if CONFIG_GFX_VCOORDS
00163
00167     vcoord_t orgX, orgY;
00168     vcoord_t scaleX, scaleY;
00169     /*\}*/
00170 #endif /* CONFIG_GFX_VCOORDS */
00171
00172 } Bitmap;
00173
00179 typedef struct Image
00180 {
00181     const uint8_t *raster;
00182     coord_t width;
00183     coord_t height;
00184     coord_t stride;
00185 } Image;
00186
00187 #if CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_H_MSB
00188
00192     #define RAST_SIZE(width, height) ( (((width) + 7) / 8) * (height) )
00193
00194 #elif CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_V_LSB
00195
00199     #define RAST_SIZE(width, height) ( (width) * (((height) + 7) / 8) )
00200 #else
00201     #error Unknown value of CONFIG_BITMAP_FMT
00202 #endif /* CONFIG_BITMAP_FMT */
00203
00204 /* Function prototypes */
00205 void gfx_bitmapInit (Bitmap *bm, uint8_t *raster, coord_t w, coord_t h);
00206 void gfx_bitmapClear(Bitmap *bm);
00207 void gfx_blit       (Bitmap *dst, const Rect *rect, const Bitmap *src, coord_t srcx, coord_t srcy);
00208 void gfx_blitRaster (Bitmap *dst, coord_t dx, coord_t dy, const uint8_t *raster, coord_t w, coord_t h, coord_t stride);
00209 void gfx_blitImage  (Bitmap *dst, coord_t dx, coord_t dy, const Image *image);
00210 void gfx_line       (Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2);
00211 void gfx_rectDraw   (Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2);
00212 void gfx_rectFillC  (Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2, uint8_t color);
00213 void gfx_rectFill   (Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2);
00214 void gfx_rectClear  (Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2);
00215 void gfx_moveTo     (Bitmap *bm, coord_t x,  coord_t y);
00216 void gfx_lineTo     (Bitmap *bm, coord_t x,  coord_t y);
00217 void gfx_setClipRect(Bitmap *bm, coord_t xmin, coord_t ymin, coord_t xmax, coord_t ymax);
00218
00219 #if CPU_HARVARD
00220     #include <cpu/pgm.h>
00221     void gfx_blit_P(Bitmap *bm, const pgm_uint8_t *raster);
00222 #endif
00223
00224 #if CONFIG_GFX_TEXT
00225 INLINE void gfx_setFont(Bitmap *bm, const struct Font *font)
00226 {
00227     bm->font = font;
00228 }
00229 #endif
00230
00231 #if CONFIG_GFX_VCOORDS
00232 void gfx_setViewRect(Bitmap *bm, vcoord_t x1, vcoord_t y1, vcoord_t x2, vcoord_t y2);
00233 coord_t gfx_transformX(Bitmap *bm, vcoord_t x);
00234 coord_t gfx_transformY(Bitmap *bm, vcoord_t y);
00235 void gfx_vline(Bitmap *bm, vcoord_t x1, vcoord_t y1, vcoord_t x2, vcoord_t y2);
00236 #endif /* CONFIG_GFX_VCOORDS */
00237
00238 EXTERN_C_END
00239  //defgroup gfx
00241 #endif /* GFX_GFX_H */


BeRTOS: gfx_p.h File Reference

  • gfx
Defines
gfx_p.h File Reference

Graphics private header. More...

#include <gfx/gfx.h>

Go to the source code of this file.

Defines

#define | BM_PLOT(bm, x, y) ( *BM_ADDR(bm, x, y) |= BM_MASK(bm, x, y) )
Plot a pixel in bitmap bm.
#define | BM_CLEAR(bm, x, y) ( *BM_ADDR(bm, x, y) &= ~BM_MASK(bm, x, y) )
Clear a pixel in bitmap bm.
#define | BM_DRAWPIXEL(bm, x, y, fg_pen)
Set a pixel in bitmap bm to the specified color.
#define | BM_READPIXEL(bm, x, y) ( *BM_ADDR(bm, x, y) & BM_MASK(bm, x, y) ? 1 : 0 )
Get the value of the pixel in bitmap bm.

Detailed Description

Graphics private header.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file gfx_p.h.

Define Documentation

#define BM_CLEAR | ( | bm,
 |  | x,
 |  | y
 | ) | ( *BM_ADDR(bm, x, y) &= ~BM_MASK(bm, x, y) )

Clear a pixel in bitmap bm.

Note:
bm is evaluated twice.
See also:
BM_PLOT BM_DRAWPIXEL

Definition at line 108 of file gfx_p.h.

#define BM_DRAWPIXEL | ( | bm,
 |  | x,
 |  | y,
 |  | fg_pen
 | ) |
Value:
do { \
        uint8_t *p = BM_ADDR(bm, x, y); \
        uint8_t mask = BM_MASK(bm, x, y); \
        *p = (*p & ~mask) | ((fg_pen) ? mask : 0); \
    } while (0)

Set a pixel in bitmap bm to the specified color.

Note:
bm is evaluated twice.
This macro is somewhat slower than BM_PLOT and BM_CLEAR.
See also:
BM_PLOT BM_CLEAR

Definition at line 118 of file gfx_p.h.

#define BM_PLOT | ( | bm,
 |  | x,
 |  | y
 | ) | ( *BM_ADDR(bm, x, y) |= BM_MASK(bm, x, y) )

Plot a pixel in bitmap bm.

Note:
bm is evaluated twice.
See also:
BM_CLEAR BM_DRAWPIXEL

Definition at line 99 of file gfx_p.h.

#define BM_READPIXEL | ( | bm,
 |  | x,
 |  | y
 | ) | ( *BM_ADDR(bm, x, y) & BM_MASK(bm, x, y) ? 1 : 0 )

Get the value of the pixel in bitmap bm.

Returns:
The returned value is either 0 or 1.
Note:
bm is evaluated twice.
See also:
BM_DRAWPIXEL

Definition at line 133 of file gfx_p.h.


BeRTOS: gfx_p.h Source File

  • gfx
gfx_p.h
Go to the documentation of this file.
00001
00040 /*#*
00041  *#* $Log$
00042  *#* Revision 1.7  2006/07/19 12:56:26  bernie
00043  *#* Convert to new Doxygen style.
00044  *#*
00045  *#* Revision 1.6  2006/05/27 17:17:34  bernie
00046  *#* Optimize away divisions in RAST_ADDR/MASK macros.
00047  *#*
00048  *#* Revision 1.5  2006/05/25 23:35:40  bernie
00049  *#* Cleanup.
00050  *#*
00051  *#* Revision 1.4  2006/03/22 09:50:37  bernie
00052  *#* Use the same format for fonts and rasters.
00053  *#*
00054  *#* Revision 1.3  2006/02/15 09:10:15  bernie
00055  *#* Implement prop fonts; Fix algo styles.
00056  *#*
00057  *#* Revision 1.2  2006/02/10 12:28:33  bernie
00058  *#* Add font support in bitmaps; Make bitmap formats public.
00059  *#*
00060  *#* Revision 1.1  2006/01/26 00:32:49  bernie
00061  *#* Graphics private header.
00062  *#*
00063  *#*/
00064
00065 #ifndef GFX_GFX_P_H
00066 #define GFX_GFX_P_H
00067
00068 #include <gfx/gfx.h>
00069
00070 #if CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_H_MSB
00071
00072     /* We use ucoord_t to let the compiler optimize away the division/modulo. */
00073     #define RAST_ADDR(raster, x, y, stride) \
00074             ((raster) + (ucoord_t)(y) * (ucoord_t)(stride) + (ucoord_t)(x) / 8)
00075     #define RAST_MASK(raster, x, y) \
00076             (1 << (7 - (ucoord_t)(x) % 8))
00077
00078 #elif CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_V_LSB
00079
00080     /* We use ucoord_t to let the compiler optimize away the division/modulo. */
00081     #define RAST_ADDR(raster, x, y, stride) \
00082             ((raster) + ((ucoord_t)(y) / 8) * (ucoord_t)(stride) + (ucoord_t)(x))
00083     #define RAST_MASK(raster, x, y) \
00084             (1 << ((ucoord_t)(y) % 8))
00085
00086 #else
00087     #error Unknown value of CONFIG_BITMAP_FMT
00088 #endif /* CONFIG_BITMAP_FMT */
00089
00090 #define BM_ADDR(bm, x, y)  RAST_ADDR((bm)->raster, (x), (y), (bm)->stride)
00091 #define BM_MASK(bm, x, y)  RAST_MASK((bm)->raster, (x), (y))
00092
00099 #define BM_PLOT(bm, x, y) \
00100     ( *BM_ADDR(bm, x, y) |= BM_MASK(bm, x, y) )
00101
00108 #define BM_CLEAR(bm, x, y) \
00109     ( *BM_ADDR(bm, x, y) &= ~BM_MASK(bm, x, y) )
00110
00118 #define BM_DRAWPIXEL(bm, x, y, fg_pen) \
00119     do { \
00120         uint8_t *p = BM_ADDR(bm, x, y); \
00121         uint8_t mask = BM_MASK(bm, x, y); \
00122         *p = (*p & ~mask) | ((fg_pen) ? mask : 0); \
00123     } while (0)
00124
00133 #define BM_READPIXEL(bm, x, y) \
00134     ( *BM_ADDR(bm, x, y) & BM_MASK(bm, x, y) ? 1 : 0 )
00135
00136 #define RAST_READPIXEL(raster, x, y, stride) \
00137         ( *RAST_ADDR(raster, x, y, stride) & RAST_MASK(raster, x, y) ? 1 : 0 )
00138
00139 #endif /* GFX_GFX_P_H */


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- _ -

  • __init1() : init_at91.c
  • __init2() : init_at91.c
  • __kputchar() : kdebug.c
  • __sn_put_char() : sprintf.c
  • _clock : timer.c , timer.h
  • _DEBUG : debug.h
  • _formatted_write() : formatwr.c
  • _SNAPSHOT : verstag.h
  • _thermo_hw_init() : hw_thermo.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- k -

  • K1 : md2.c
  • K2 : md2.c
  • K_CANCEL : kbd_map.h
  • K_DOWN : kbd_map.h
  • K_LONG : kbd_map.h
  • K_OK : kbd_map.h
  • K_REPEAT : kbd_map.h
  • K_TIMEOUT : kbd_map.h
  • K_UP : kbd_map.h
  • KB_BUFFERED : kblock.h
  • KB_CACHE_DIRTY : kblock.h
  • KB_PARTIAL_WRITE : kblock.h
  • KBD_BEEP_TIME : kbd.c
  • kbd_buf : kbd.c
  • KBD_CHECK_INTERVAL : kbd.c
  • kbd_cnt : kbd.c
  • kbd_debHandler : kbd.c
  • kbd_debHandlerFunc() : kbd.c
  • KBD_DEBOUNCE_TIME : kbd.c
  • kbd_defHandler : kbd.c
  • kbd_defHandlerFunc() : kbd.c
  • kbd_get() : kbd.c , kbd.h
  • kbd_get_timeout() : kbd.c , kbd.h
  • kbd_handlers : kbd.c
  • kbd_init() : kbd.c , kbd.h
  • KBD_LNG_DELAY : kbd.c
  • kbd_peek() : kbd.c , kbd.h
  • kbd_poll() : kbd.c
  • kbd_rawHandlers : kbd.c
  • kbd_readkeys() : hw_kbd.h
  • KBD_REPEAT_ACCEL : kbd.c
  • KBD_REPEAT_DELAY : kbd.c
  • KBD_REPEAT_MAXRATE : kbd.c
  • KBD_REPEAT_RATE : kbd.c
  • kbd_rpt_mask : kbd.c
  • kbd_rptHandler : kbd.c
  • kbd_rptHandlerFunc() : kbd.c
  • kbd_setRepeatMask() : kbd.c , kbd.h
  • kbd_softint() : kbd.c
  • kbd_timer : kbd.c
  • kblock_buffered() : kblock.h
  • kblock_cachedBlock() : kblock.h
  • kblock_cacheDirty() : kblock.h
  • kblock_clearerr() : kblock.h
  • kblock_close() : kblock.h
  • kblock_copy() : kblock.c , kblock.h
  • kblock_error() : kblock.h
  • kblock_flush() : kblock.c , kblock.h
  • kblock_partialWrite() : kblock.h
  • kblock_read() : kblock.c , kblock.h
  • kblock_trim() : kblock.c , kblock.h
  • kblock_write() : kblock.c , kblock.h
  • KBT_EEPROM : eeprom.h
  • KDBG_UART_ACLK : kdebug_msp430.h
  • KDEBUG_PORT_DBGU : kdebug_at91.h
  • KDEBUG_PORT_DEFAULT : kdebug_at91.h , kdebug_lm3s.h , kdebug_stm32.h
  • kdf_begin() : kdf.h
  • kdf_read() : kdf.h
  • kdump() : debug.h , kdebug.c
  • KERN_LOG_FORMAT : cfg_proc.h
  • KERN_LOG_LEVEL : cfg_proc.h
  • KERN_MINSTACKSIZE : proc.h
  • key_internal_get_ptr() : hashtable.c
  • key_pressed : kbd.c
  • keymask_t : kbd_map.h
  • keytag_init() : keytag.c , keytag.h
  • keytag_poll() : keytag.c , keytag.h
  • keytag_recv() : keytag.c , keytag.h
  • kfile_clearerr() : io/kfile.h
  • kfile_close() : io/kfile.h
  • kfile_copy() : kfile.c , io/kfile.h
  • kfile_error() : io/kfile.h
  • kfile_flush() : io/kfile.h
  • kfile_generic() : kfile.c
  • kfile_genericClose() : kfile.c , io/kfile.h
  • kfile_genericReopen() : kfile.c , io/kfile.h
  • kfile_genericSeek() : kfile.c , io/kfile.h
  • kfile_getc() : io/kfile.h , kfile.c
  • kfile_gets() : kfile.c , io/kfile.h
  • kfile_gets_echo() : kfile.c , io/kfile.h
  • kfile_init() : kfile.c , io/kfile.h
  • KFILE_LOG_FORMAT : cfg_kfile.h
  • KFILE_LOG_LEVEL : cfg_kfile.h
  • kfile_off_t : io/kfile.h
  • kfile_print() : kfile.c , io/kfile.h
  • kfile_printf() : kfile.c , io/kfile.h
  • kfile_putc() : io/kfile.h , kfile.c
  • kfile_read() : io/kfile.h
  • kfile_reopen() : io/kfile.h
  • kfile_resync() : kfile.c , io/kfile.h
  • kfile_seek() : io/kfile.h
  • kfile_write() : io/kfile.h
  • KFILEBLOCK_CAST() : kfile_block.c
  • kfileblock_init() : kfile_block.h , kfile_block.c
  • KFILEDEBUG_CAST() : kfile_debug.h
  • kfiledebug_init() : kfile_debug.h , kfile_debug.c
  • KFILEFIFO_CAST() : kfile_fifo.h
  • kfilefifo_init() : kfile_fifo.c , kfile_fifo.h
  • KFILEMEM_CAST() : kfile_mem.h
  • kfilemem_init() : kfile_mem.c , kfile_mem.h
  • KFT_BATTFS : battfs.h
  • KFT_DATAFLASH : dataflash.h
  • KFT_FLASH25 : flash25.h
  • KFT_FT245RL : ft245rl.h
  • KFT_KFILEBLOCK : kfile_block.c
  • KFT_KFILEDEBUG : kfile_debug.h
  • KFT_KFILEFIFO : kfile_fifo.h
  • KFT_KFILEMEM : kfile_mem.h
  • KFT_LM3SSSI : ssi_lm3s.h
  • KFT_SERIAL : ser.h
  • KFT_SIPO : sipo.h
  • KFT_USB_SERIAL : usbser.h
  • KHF_RAWKEYS : kbd.h
  • kputnum() : debug.h , kdebug.c
  • KSeekMode : io/kfile.h
  • KSM_SEEK_CUR : io/kfile.h
  • KSM_SEEK_END : io/kfile.h
  • KSM_SEEK_SET : io/kfile.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- l -

  • LabelId : menubar.h
  • LAYER_HIDDEN : lcd_text.h
  • lbar_changeLevel() : levelbar.h , levelbar.c
  • lbar_draw() : levelbar.c , levelbar.h
  • lbar_getLevel() : levelbar.h , levelbar.c
  • LBAR_HORIZONTAL : levelbar.h
  • lbar_init() : levelbar.c , levelbar.h
  • lbar_setLevel() : levelbar.c , levelbar.h
  • lbar_setMax() : levelbar.c , levelbar.h
  • lcd_32122_blitBitmap() : lcd_32122a.c , lcd_32122a.h
  • lcd_32122_init() : lcd_32122a.c , lcd_32122a.h
  • lcd_32122_read() : lcd_32122a.c
  • lcd_32122_setPwm() : lcd_32122a.c , lcd_32122a.h
  • lcd_32122_write() : lcd_32122a.c
  • lcd_address() : lcd_hd44.c
  • lcd_bitmap : lcd_32122a.c
  • LCD_CMD_CLEAR : lcd_hd44.h
  • LCD_CMD_CURSOR_BLOCK : lcd_hd44.h
  • LCD_CMD_CURSOR_LINE : lcd_hd44.h
  • LCD_CMD_CURSOR_OFF : lcd_hd44.h
  • LCD_CMD_DISPLAY_INI : lcd_hd44.h
  • LCD_CMD_DISPLAY_OFF : lcd_hd44.h
  • LCD_CMD_DISPLAY_ON : lcd_hd44.h
  • LCD_CMD_DISPLAY_SHIFT : lcd_hd44.h
  • LCD_CMD_DISPLAYMODE : lcd_hd44.h
  • LCD_CMD_MOVESHIFT_LEFT : lcd_hd44.h
  • LCD_CMD_MOVESHIFT_RIGHT : lcd_hd44.h
  • LCD_CMD_RESET_DDRAM : lcd_hd44.h
  • LCD_CMD_SET8BIT : lcd_hd44.h
  • LCD_CMD_SET_CGRAMADDR : lcd_hd44.h
  • LCD_CMD_SET_DDRAMADDR : lcd_hd44.h
  • LCD_CMD_SETFUNC : lcd_hd44.h
  • lcd_current_addr : lcd_hd44.c
  • lcd_dataWrite() : lcd_rit128x96.c
  • LCD_DB_IN : hw_lcd_32122a.h , hw_lcd_hd44.h
  • LCD_DB_OUT : hw_lcd_32122a.h , hw_lcd_hd44.h
  • LCD_DEF_PWM : hw_lcd_32122a.h
  • LCD_DELAY_READ : hw_lcd_32122a.h , hw_lcd_hd44.h
  • LCD_DELAY_WRITE : hw_lcd_32122a.h , hw_lcd_hd44.h
  • lcd_enqueueLayer() : lcd_text.c
  • lcd_hx8347_init() : lcd_hx8347.c , lcd_hx8347.h
  • lcd_hx8347_off() : lcd_hx8347.c , lcd_hx8347.h
  • lcd_hx8347_on() : lcd_hx8347.c , lcd_hx8347.h
  • lcd_ili9225_hw_bus_init() : hw_ili9225.h
  • lcd_ili9225_init() : lcd_ili9225.c , lcd_ili9225.h
  • lcd_ili9225_off() : lcd_ili9225.h , lcd_ili9225.c
  • lcd_ili9225_on() : lcd_ili9225.c , lcd_ili9225.h
  • LCD_LAYERS : lcd_text.c
  • lcd_moveTo() : lcd_hd44.c , lcd_hd44.h
  • LCD_PAGES : lcd_32122a.c
  • LCD_PAGESIZE : lcd_32122a.c
  • lcd_putc() : lcd_hd44.c , lcd_hd44.h
  • lcd_putCharUnlocked() : lcd_text.c
  • lcd_raster : lcd_32122a.c
  • LCD_READ : hw_lcd_32122a.h
  • lcd_refresh() : lcd_text.c
  • lcd_remapChar() : lcd_hd44.c , lcd_hd44.h
  • lcd_reset() : lcd_ili9225.c
  • lcd_setLayerDepth() : lcd_text.c , lcd_text.h
  • lcd_setReg() : lcd_hd44.c , lcd_hd44.h
  • lcd_waitBusy() : lcd_hd44.c , lcd_hd44.h
  • LCD_WRITE : hw_lcd_32122a.h
  • LCDF_BUSY : lcd_hd44.c
  • lcdpos_t : lcd_hd44.h
  • level_edit() : leveledit.h , leveledit.c
  • level_init() : leveledit.c , leveledit.h
  • level_set_callback : leveledit.h
  • LEVELEDIT_DOUBLE : leveledit.h
  • LEVELEDIT_NOBAR : leveledit.h
  • LEVELEDIT_SINGLE : leveledit.h
  • LIST_ASSERT_NOT_CONTAINS : list.h
  • LIST_ASSERT_VALID : list.h
  • LIST_EMPTY : list.h
  • LIST_ENQUEUE : list.h
  • LIST_ENQUEUE_HEAD : list.h
  • LIST_HEAD : list.h
  • LIST_INIT : list.h
  • list_remHead() : list.h
  • list_remTail() : list.h
  • LIST_TAIL : list.h
  • lm3s_gpioPinConfig() : gpio_lm3s.c , gpio_lm3s.h
  • lm3s_ssiInit() : ssi_lm3s.c , ssi_lm3s.h
  • LM75_LOG_FORMAT : cfg_lm75.h
  • LM75_LOG_LEVEL : cfg_lm75.h
  • LOG_ERR : log.h
  • LOG_ERRB : log.h
  • LOG_INFO : log.h
  • LOG_INFOB : log.h
  • LOG_WARN : log.h
  • LOG_WARNB : log.h
  • LSION_BITNUMBER : clock_stm32.h
  • LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT : cfg_lwip.h
  • LWIP_ARP : cfg_lwip.h
  • LWIP_AUTOIP : cfg_lwip.h
  • LWIP_BROADCAST_PING : cfg_lwip.h
  • LWIP_COMPAT_SOCKETS : cfg_lwip.h
  • LWIP_DBG_MIN_LEVEL : cfg_lwip.h
  • LWIP_DBG_TYPES_ON : cfg_lwip.h
  • LWIP_DHCP : cfg_lwip.h
  • LWIP_DHCP_AUTOIP_COOP : cfg_lwip.h
  • LWIP_DHCP_AUTOIP_COOP_TRIES : cfg_lwip.h
  • LWIP_DNS : cfg_lwip.h
  • LWIP_HAVE_LOOPIF : cfg_lwip.h
  • LWIP_HAVE_SLIPIF : cfg_lwip.h
  • LWIP_ICMP : cfg_lwip.h
  • LWIP_IGMP : cfg_lwip.h
  • LWIP_LOOPBACK_MAX_PBUFS : cfg_lwip.h
  • LWIP_MULTICAST_PING : cfg_lwip.h
  • LWIP_NETBUF_RECVINFO : cfg_lwip.h
  • LWIP_NETCONN : cfg_lwip.h
  • LWIP_NETIF_API : cfg_lwip.h
  • LWIP_NETIF_HOSTNAME : cfg_lwip.h
  • LWIP_NETIF_HWADDRHINT : cfg_lwip.h
  • LWIP_NETIF_LINK_CALLBACK : cfg_lwip.h
  • LWIP_NETIF_LOOPBACK : cfg_lwip.h
  • LWIP_NETIF_LOOPBACK_MULTITHREADING : cfg_lwip.h
  • LWIP_NETIF_STATUS_CALLBACK : cfg_lwip.h
  • LWIP_NETIF_TX_SINGLE_PBUF : cfg_lwip.h
  • LWIP_POSIX_SOCKETS_IO_NAMES : cfg_lwip.h
  • LWIP_RAW : cfg_lwip.h
  • LWIP_SNMP : cfg_lwip.h
  • LWIP_SO_RCVBUF : cfg_lwip.h
  • LWIP_SO_RCVTIMEO : cfg_lwip.h
  • LWIP_SOCKET : cfg_lwip.h
  • LWIP_STATS : cfg_lwip.h
  • LWIP_TCP : cfg_lwip.h
  • LWIP_TCP_KEEPALIVE : cfg_lwip.h
  • LWIP_TCP_TIMESTAMPS : cfg_lwip.h
  • LWIP_TCPIP_CORE_LOCKING : cfg_lwip.h
  • LWIP_UDP : cfg_lwip.h
  • LWIP_UDPLITE : cfg_lwip.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- m -

  • MAC_BASE : lm3s_memmap.h
  • main_process : proc.c
  • MAKE_CMD : parser.h
  • MAKE_ID : macros.h
  • MAKE_RCVERS : verstag.h
  • MAKE_TEMPLATE : parser.h
  • MAKE_VERS : verstag.h
  • MAX_PAGE_ADDR : battfs.h
  • MAX_STEPS : stepper.h
  • MC_AASR : at91_mc.h
  • MC_AASR_OFF : at91_mc.h
  • MC_ABTSZ_BYTE : at91_mc.h
  • MC_ABTSZ_HWORD : at91_mc.h
  • MC_ABTSZ_MASK : at91_mc.h
  • MC_ABTSZ_WORD : at91_mc.h
  • MC_ABTTYP_DATAR : at91_mc.h
  • MC_ABTTYP_DATAW : at91_mc.h
  • MC_ABTTYP_FETCH : at91_mc.h
  • MC_ABTTYP_MASK : at91_mc.h
  • MC_ASR : at91_mc.h
  • MC_ASR_OFF : at91_mc.h
  • MC_FCMD_CGPB : at91_mc.h
  • MC_FCMD_CLB : at91_mc.h
  • MC_FCMD_EA : at91_mc.h
  • MC_FCMD_MASK : at91_mc.h
  • MC_FCMD_NOP : at91_mc.h
  • MC_FCMD_SGPB : at91_mc.h
  • MC_FCMD_SLB : at91_mc.h
  • MC_FCMD_SSB : at91_mc.h
  • MC_FCMD_WP : at91_mc.h
  • MC_FCMD_WPL : at91_mc.h
  • MC_FCR : at91_mc.h
  • MC_FCR_OFF : at91_mc.h
  • MC_FMCN_MASK : at91_mc.h
  • MC_FMCN_SHIFT : at91_mc.h
  • MC_FMR : at91_mc.h
  • MC_FMR_OFF : at91_mc.h
  • MC_FRDY : at91_mc.h
  • MC_FSR : at91_mc.h
  • MC_FSR_OFF : at91_mc.h
  • MC_FWS_1R2W : at91_mc.h
  • MC_FWS_2R3W : at91_mc.h
  • MC_FWS_3R4W : at91_mc.h
  • MC_FWS_4R4W : at91_mc.h
  • MC_FWS_MASK : at91_mc.h
  • MC_GPNVM0 : at91_mc.h
  • MC_GPNVM1 : at91_mc.h
  • MC_GPNVM2 : at91_mc.h
  • MC_KEY : at91_mc.h
  • MC_LOCKE : at91_mc.h
  • MC_LOCKS0 : at91_mc.h
  • MC_LOCKS1 : at91_mc.h
  • MC_LOCKS10 : at91_mc.h
  • MC_LOCKS11 : at91_mc.h
  • MC_LOCKS12 : at91_mc.h
  • MC_LOCKS13 : at91_mc.h
  • MC_LOCKS14 : at91_mc.h
  • MC_LOCKS15 : at91_mc.h
  • MC_LOCKS2 : at91_mc.h
  • MC_LOCKS3 : at91_mc.h
  • MC_LOCKS4 : at91_mc.h
  • MC_LOCKS5 : at91_mc.h
  • MC_LOCKS6 : at91_mc.h
  • MC_LOCKS7 : at91_mc.h
  • MC_LOCKS8 : at91_mc.h
  • MC_LOCKS9 : at91_mc.h
  • MC_MISADD : at91_mc.h
  • MC_MST_ARM : at91_mc.h
  • MC_MST_PDC : at91_mc.h
  • MC_NEBP : at91_mc.h
  • MC_PAGEN_MASK : at91_mc.h
  • MC_PROGE : at91_mc.h
  • MC_RCB : at91_mc.h
  • MC_RCR : at91_mc.h
  • MC_RCR_OFF : at91_mc.h
  • MC_SECURITY : at91_mc.h
  • MC_SVMST_ARM : at91_mc.h
  • MC_SVMST_PDC : at91_mc.h
  • MC_UNDADD : at91_mc.h
  • mcp41_init() : mcp41.c , mcp41.h
  • mcp41_res_t : mcp41.h
  • mcp41_setResistance() : mcp41.c , mcp41.h
  • md2_end() : md2.c , md2.h
  • md2_init() : md2.c , md2.h
  • md2_pad() : md2.c
  • md2_test() : md2.c , md2.h
  • md2_update() : md2.c , md2.h
  • MEM_ALIGNMENT : cfg_lwip.h
  • MEM_DEBUG : cfg_lwip.h
  • mem_info : dataflash.c , eeprom.c
  • MEM_LIBC_MALLOC : cfg_lwip.h
  • MEM_SIZE : cfg_lwip.h
  • MEM_USE_POOLS : cfg_lwip.h
  • MEM_USE_POOLS_TRY_BIGGER_POOL : cfg_lwip.h
  • MEMCPY : cfg_lwip.h
  • MEMORY_BARRIER : compiler.h
  • MEMP_DEBUG : cfg_lwip.h
  • MEMP_MEM_MALLOC : cfg_lwip.h
  • MEMP_NUM_ARP_QUEUE : cfg_lwip.h
  • MEMP_NUM_IGMP_GROUP : cfg_lwip.h
  • MEMP_NUM_NETBUF : cfg_lwip.h
  • MEMP_NUM_NETCONN : cfg_lwip.h
  • MEMP_NUM_PBUF : cfg_lwip.h
  • MEMP_NUM_RAW_PCB : cfg_lwip.h
  • MEMP_NUM_REASSDATA : cfg_lwip.h
  • MEMP_NUM_SYS_TIMEOUT : cfg_lwip.h
  • MEMP_NUM_TCP_PCB : cfg_lwip.h
  • MEMP_NUM_TCP_PCB_LISTEN : cfg_lwip.h
  • MEMP_NUM_TCP_SEG : cfg_lwip.h
  • MEMP_NUM_TCPIP_MSG_API : cfg_lwip.h
  • MEMP_NUM_TCPIP_MSG_INPKT : cfg_lwip.h
  • MEMP_NUM_UDP_PCB : cfg_lwip.h
  • MEMP_OVERFLOW_CHECK : cfg_lwip.h
  • MEMP_SANITY_CHECK : cfg_lwip.h
  • MEMP_USE_CUSTOM_POOLS : cfg_lwip.h
  • menu_clearFlags() : menu.c , menu.h
  • menu_count() : menu.c
  • menu_doselect() : menu.c
  • menu_handle() : menu.h , menu.c
  • menu_layout() : menu.c
  • menu_next_visible_item() : menu.c
  • menu_prev_visible_item() : menu.c
  • menu_setFlags() : menu.c , menu.h
  • MenuHook : menu.h
  • MF_ROMITEMS : menu.h
  • MF_SAVESEL : menu.h
  • MF_STICKY : menu.h
  • MF_TOPLEVEL : menu.h
  • MICROS2FREQ : ramp.h
  • MIF_CHECKED : menu.h
  • MIF_CHECKIT : menu.h
  • MIF_DISABLED : menu.h
  • MIF_EXCLUDE_0 : menu.h
  • MIF_EXCLUDE_1 : menu.h
  • MIF_EXCLUDE_2 : menu.h
  • MIF_EXCLUDE_3 : menu.h
  • MIF_EXCLUDE_4 : menu.h
  • MIF_EXCLUDE_5 : menu.h
  • MIF_EXCLUDE_6 : menu.h
  • MIF_EXCLUDE_7 : menu.h
  • MIF_EXCLUDE_MASK : menu.h
  • MIF_HIDDEN : menu.h
  • MIF_PRI : menu.h
  • MIF_PRI_MASK : menu.h
  • MIF_RAMLABEL : menu.h
  • MIF_RENDERHOOK : menu.h
  • MIF_TOGGLE : menu.h
  • MINMAX : macros.h
  • MISO : hw_spi.h
  • MISO_HIGH : hw_spi.h
  • MISO_IN : hw_spi.h
  • MISO_OUT : hw_spi.h
  • MOD_CHECK : module.h
  • MOD_CLEANUP : module.h
  • MOD_DEFINE : module.h
  • MOD_INIT : module.h
  • monitor_checkStack() : monitor.h
  • monitor_report() : monitor.h
  • monitor_start() : monitor.h
  • MOSI : hw_spi.h
  • MOSI_HIGH : hw_spi.h
  • MOSI_IN : hw_spi.h
  • MOSI_LOW : hw_spi.h
  • MOSI_OUT : hw_spi.h
  • MOTOR_CURRENT_TICKS : stepper.c
  • MOTOR_HOME_MAX_STEPS : stepper.c
  • MOTOR_NO_HOME_SENSOR : stepper.h
  • MOTOR_NO_LEVEL_SENSOR : stepper.h
  • MOTOR_SWITCH_COUNT : stepper.c
  • MOTOR_SWITCH_TICKS : stepper.c
  • MotorDirection : stepper.h
  • movePages() : battfs.c
  • mpxx6115a_press() : mpxx6115a.h
  • ms_to_ticks() : timer.h
  • msg_get() : msg.h
  • msg_initPort() : msg.h
  • msg_lockPort() : msg.h
  • msg_peek() : msg.h
  • msg_put() : msg.h
  • msg_reply() : msg.h
  • msg_strings : messages.c
  • msg_unlockPort() : msg.h
  • MSTS_ENTERING : stepper.h
  • MSTS_ERROR : stepper.h
  • MSTS_IDLE : stepper.h
  • MSTS_INIT : stepper.h
  • MSTS_LEAVING : stepper.h
  • MSTS_OUTHOME : stepper.h
  • MSTS_PREIDLE : stepper.h
  • MSTS_PREINIT : stepper.h
  • MSTS_PRERUN : stepper.h
  • MSTS_RUN : stepper.h
  • MSTS_UNINIT : stepper.h
  • mt29f_blockErase() : mt29f.h , mt29f_sam3.c
  • MT29F_ERR_ERASE : mt29f.h
  • MT29F_ERR_RD_TMOUT : mt29f.h
  • MT29F_ERR_WR_TMOUT : mt29f.h
  • MT29F_ERR_WRITE : mt29f.h
  • mt29f_getDevId() : mt29f.h , mt29f_sam3.c
  • mtime_t : compiler.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- n -

  • NETIF_DEBUG : cfg_lwip.h
  • nmea_gpgga() : nmea.c , nmea.h
  • nmea_gpgsv() : nmea.c , nmea.h
  • nmea_gprmc() : nmea.c , nmea.h
  • nmea_gpvtg() : nmea.c , nmea.h
  • NMEA_LOG_FORMAT : cfg_nmea.h
  • NMEA_LOG_LEVEL : cfg_nmea.h
  • nmea_poll() : nmea.c , nmea.h
  • NO_SYS : cfg_lwip.h
  • notifier_init() : dnotifier.h , dnotifier.c
  • notifier_update() : dnotifier.c
  • ntc_hw_getInfo() : hw_ntc.h
  • ntc_hw_read() : hw_ntc.h
  • ntc_init() : ntc.c , ntc.h
  • ntc_read() : ntc.c , ntc.h
  • NUM_COMPUTE_ROUNDS : md2.h
  • NUM_INTERRUPTS : lm3s_ints.h
  • NUM_PRIORITY : lm3s_ints.h
  • NUM_PRIORITY_BITS : lm3s_ints.h
  • NVIC_ACTIVE0 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT0 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_ACTIVE0_INT1 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT10 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT11 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT12 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT13 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT14 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT15 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT16 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_ACTIVE0_INT17 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT18 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT19 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT2 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT20 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT21 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT22 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT23 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT24 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT25 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT26 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT27 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT28 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT29 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT3 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT30 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_ACTIVE0_INT31 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT4 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT5 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT6 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT7 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT8 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT9 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT32 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT33 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT34 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT35 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT36 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT37 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT38 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT39 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT40 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT41 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT42 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT43 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT44 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT45 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT46 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT47 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT48 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT49 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT50 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT51 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT52 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT53 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT54 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_ACTIVE1_INT55 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT56 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT57 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT58 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT59 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_ENDIANESS : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_0_8 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_1_7 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_2_6 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_3_5 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_4_4 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_5_3 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_6_2 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_7_1 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_SYSRESETREQ : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_VECT_CLR_ACT : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_VECT_RESET : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_VECTKEY : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_VECTKEY_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_BASE : lm3s_memmap.h
  • NVIC_CFG_CTRL : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CFG_CTRL_BASE_THR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CFG_CTRL_BFHFNMIGN : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CFG_CTRL_DEEP_PEND : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CFG_CTRL_DIV0 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CFG_CTRL_MAIN_PEND : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CFG_CTRL_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CFG_CTRL_UNALIGNED : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CPUID : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CPUID_IMP_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CPUID_PARTNO_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CPUID_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CPUID_REV_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CPUID_VAR_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_C_DEBUGEN : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_C_HALT : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_C_MASKINT : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_C_SNAPSTALL : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_C_STEP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_DBGKEY : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_DBGKEY_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_S_HALT : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_S_LOCKUP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_S_REGRDY : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_S_RESET_ST : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_S_RETIRE_ST : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_S_SLEEP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_DATA : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_DATA_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_DATA_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_DATA_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_BUSERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_CHKERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_HARDERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_INTERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_MMERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_NOCPERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_RESET : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_RSTPENDCLR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_RSTPENDING : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_DBG_INT_RSTVCATCH : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_STATERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_CFBP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_DSP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_FLAGS : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_MSP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_PSP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R0 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R1 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R10 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R11 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R12 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R13 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R14 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R15 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R2 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R3 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R4 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R5 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R6 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R7 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R8 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R9 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_SEL_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_WNR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DEBUG_STAT : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DEBUG_STAT_BKPT : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DEBUG_STAT_DWTTRAP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DEBUG_STAT_EXTRNL : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DEBUG_STAT_HALTED : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DEBUG_STAT_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DEBUG_STAT_VCATCH : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT0 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT1 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT10 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT11 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT12 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT13 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT14 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT15 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT16 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT17 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT18 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT19 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT2 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT20 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT21 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT22 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT23 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT24 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT25 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT26 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT27 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT28 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT29 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT3 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT30 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT31 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT4 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT5 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT6 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT7 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT8 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT9 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT32 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT33 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT34 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT35 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT36 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT37 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT38 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT39 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT40 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT41 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT42 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT43 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT44 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT45 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT46 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT47 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT48 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT49 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT50 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT51 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT52 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT53 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT54 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT55 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT56 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT57 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT58 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT59 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT0 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT1 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT10 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT11 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT12 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT13 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT14 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT15 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT16 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT17 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT18 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT19 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT2 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT20 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT21 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT22 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT23 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT24 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT25 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT26 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT27 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT28 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT29 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT3 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT30 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT31 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT4 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT5 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT6 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT7 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT8 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT9 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT32 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT33 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT34 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT35 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT36 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT37 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT38 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT39 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT40 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT41 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT42 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT43 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT44 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT45 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT46 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT47 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT48 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT49 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT50 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT51 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT52 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT53 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT54 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT55 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT56 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT57 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT58 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT59 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_ADDR : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_ADDR_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_ADDR_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_ADDR_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_BFARV : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_BSTKE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_BUSTKE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_DERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_DIV0 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_IBUS : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_IERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_IMPRE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_INVPC : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_INVSTAT : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_MMARV : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_MSTKE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_MUSTKE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_NOCP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_PRECISE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_UNALIGN : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_UNDEF : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_HFAULT_STAT : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_HFAULT_STAT_DBG : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_HFAULT_STAT_FORCED : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_HFAULT_STAT_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_HFAULT_STAT_VECT : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_ISR_PEND : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_ISR_PRE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_NMI_SET : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_PEND_SV : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_PENDSTCLR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_PENDSTSET : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_RET_BASE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_UNPEND_SV : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_VEC_ACT_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_VEC_ACT_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_VEC_PEN_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_VEC_PEN_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_TYPE : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_TYPE_LINES_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_TYPE_LINES_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_TYPE_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MM_ADDR : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MM_ADDR_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MM_ADDR_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MM_ADDR_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_AP_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_AP_NO_NO : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_AP_RO_NO : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_AP_RO_RO : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_AP_RW_NO : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_AP_RW_RO : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_AP_RW_RW : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_BUFFRABLE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_CACHEABLE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_ENABLE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SHAREABLE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_128B : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_128K : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_128M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_16K : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_16M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_1G : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_1K : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_1M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_256B : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_256K : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_256M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_2G : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_2K : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_2M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_32B : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_32K : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_32M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_4G : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_4K : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_4M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_512B : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_512K : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_512M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_64B : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_64K : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_64M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_8K : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_8M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SRD_0 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SRD_1 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SRD_2 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SRD_3 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SRD_4 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SRD_5 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SRD_6 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SRD_7 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SRD_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_TEX_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_XN : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_BASE : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_BASE_ADDR_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_BASE_ADDR_S : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_BASE_R : sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_MPU_BASE_REGION_M : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_MPU_BASE_REGION_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_BASE_VALID : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_MPU_CTRL : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_CTRL_ENABLE : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_CTRL_HFNMIENA : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_CTRL_PRIVDEFEN : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_CTRL_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_NUMBER : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_NUMBER_M : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_NUMBER_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_NUMBER_S : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_MPU_R : lm3s_com.h
  • NVIC_MPU_TYPE : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_MPU_TYPE_DREGION_M : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_MPU_TYPE_DREGION_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_TYPE_IREGION_M : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_MPU_TYPE_IREGION_S : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_MPU_TYPE_R : stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_MPU_TYPE_SEPARATE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT0 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT1 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT10 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT11 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT12 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT13 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT14 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT15 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT16 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT17 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT18 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT19 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT2 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT20 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT21 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT22 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT23 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT24 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT25 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT26 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT27 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT28 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT29 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT3 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT30 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT31 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT4 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT5 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT6 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT7 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT8 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT9 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1 : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT32 : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT33 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT34 : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT35 : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT36 : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT37 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT38 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT39 : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT40 : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT41 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT42 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PEND1_INT43 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PEND1_INT44 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PEND1_INT45 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT46 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PEND1_INT47 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PEND1_INT48 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PEND1_INT49 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT50 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PEND1_INT51 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PEND1_INT52 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PEND1_INT53 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT54 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PEND1_INT55 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PEND1_INT56 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PEND1_INT57 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT58 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PEND1_INT59 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PEND1_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI0 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI0_INT0_M : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PRI0_INT0_S : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_PRI0_INT1_M : sam3_nvic.h , lm3s_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI0_INT1_S : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI0_INT2_M : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI0_INT2_S : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_PRI0_INT3_M : sam3_nvic.h , lm3s_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI0_INT3_S : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_PRI0_R : lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI1 : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI10 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI10_INT40_M : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_PRI10_INT40_S : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PRI10_INT41_M : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_PRI10_INT41_S : stm32_nvic.h , lm3s_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI10_INT42_M : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_PRI10_INT42_S : stm32_nvic.h , sam3_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_PRI10_INT43_M : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI10_INT43_S : stm32_nvic.h , lm3s_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI10_R : stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI11 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI12 : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI13 : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PRI1_INT4_M : stm32_nvic.h , lm3s_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI1_INT4_S : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_PRI1_INT5_M : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PRI1_INT5_S : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_PRI1_INT6_M : stm32_nvic.h , lm3s_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI1_INT6_S : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_PRI1_INT7_M : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PRI1_INT7_S : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_PRI1_R : sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI2 : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI2_INT10_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI2_INT10_S : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI2_INT11_M : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI2_INT11_S : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI2_INT8_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI2_INT8_S : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI2_INT9_M : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI2_INT9_S : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI2_R : stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI3 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI3_INT12_M : lm3s_com.h , stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PRI3_INT12_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI3_INT13_M : stm32_nvic.h , lm3s_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI3_INT13_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI3_INT14_M : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PRI3_INT14_S : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PRI3_INT15_M : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PRI3_INT15_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI3_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI4 : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI4_INT16_M : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI4_INT16_S : sam3_nvic.h , stm32_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_PRI4_INT17_M : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI4_INT17_S : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI4_INT18_M : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI4_INT18_S : sam3_nvic.h , stm32_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_PRI4_INT19_M : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI4_INT19_S : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_PRI4_R : lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI5 : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PRI5_INT20_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI5_INT20_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI5_INT21_M : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI5_INT21_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI5_INT22_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI5_INT22_S : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI5_INT23_M : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI5_INT23_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI5_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI6 : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI6_INT24_M : sam3_nvic.h , stm32_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_PRI6_INT24_S : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PRI6_INT25_M : sam3_nvic.h , stm32_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_PRI6_INT25_S : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI6_INT26_M : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_PRI6_INT26_S : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PRI6_INT27_M : sam3_nvic.h , stm32_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_PRI6_INT27_S : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI6_R : stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI7 : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI7_INT28_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI7_INT28_S : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI7_INT29_M : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI7_INT29_S : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI7_INT30_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI7_INT30_S : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI7_INT31_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI7_INT31_S : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI7_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI8 : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PRI8_INT32_M : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI8_INT32_S : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_PRI8_INT33_M : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PRI8_INT33_S : sam3_nvic.h , stm32_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_PRI8_INT34_M : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PRI8_INT34_S : sam3_nvic.h , stm32_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_PRI8_INT35_M : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI8_INT35_S : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI8_R : stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI9 : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_PRI9_INT36_M : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_PRI9_INT36_S : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI9_INT37_M : lm3s_com.h , stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PRI9_INT37_S : lm3s_com.h , stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_PRI9_INT38_M : lm3s_com.h , stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_PRI9_INT38_S : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI9_INT39_M : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI9_INT39_S : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PRI9_R : stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_ST_CAL : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_ST_CAL_NOREF : sam3_nvic.h , lm3s_com.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_ST_CAL_ONEMS_M : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_ST_CAL_ONEMS_S : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_ST_CAL_R : sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_ST_CAL_SKEW : lm3s_com.h , stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_ST_CTRL : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_ST_CTRL_CLK_SRC : lm3s_com.h , stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_ST_CTRL_COUNT : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_ST_CTRL_ENABLE : lm3s_com.h , stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_ST_CTRL_INTEN : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ST_CTRL_R : lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_ST_CURRENT : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_ST_CURRENT_M : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_ST_CURRENT_R : stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_ST_CURRENT_S : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_ST_RELOAD : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_ST_RELOAD_M : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_ST_RELOAD_R : lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_ST_RELOAD_S : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_SW_TRIG : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_SW_TRIG_INTID_M : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_SW_TRIG_INTID_S : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_SW_TRIG_R : stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_SYS_CTRL : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_SYS_CTRL_R : sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_SYS_CTRL_SEVONPEND : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_SYS_CTRL_SLEEPDEEP : lm3s_com.h , stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_SYS_CTRL_SLEEPEXIT : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_SYS_HND_CTRL : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_SYS_HND_CTRL_BUS : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_SYS_HND_CTRL_BUSA : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_SYS_HND_CTRL_BUSP : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_SYS_HND_CTRL_MEM : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_SYS_HND_CTRL_MEMA : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_SYS_HND_CTRL_MON : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_SYS_HND_CTRL_PNDSV : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_SYS_HND_CTRL_R : stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_SYS_HND_CTRL_SVC : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_SYS_HND_CTRL_SVCA : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_SYS_HND_CTRL_TICK : stm32_nvic.h , sam3_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_SYS_HND_CTRL_USAGE : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_SYS_HND_CTRL_USGA : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_SYS_PRI1 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_SYS_PRI1_BUS_M : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_SYS_PRI1_BUS_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_SYS_PRI1_MEM_M : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_SYS_PRI1_MEM_S : sam3_nvic.h , stm32_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_SYS_PRI1_R : lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_SYS_PRI1_RES_M : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_SYS_PRI1_USAGE_M : lm3s_com.h , stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_SYS_PRI1_USAGE_S : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_SYS_PRI2 : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_SYS_PRI2_R : stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_SYS_PRI2_RES_M : stm32_nvic.h , sam3_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_SYS_PRI2_SVC_M : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_SYS_PRI2_SVC_S : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_SYS_PRI3 : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_SYS_PRI3_DEBUG_M : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_SYS_PRI3_DEBUG_S : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_SYS_PRI3_PENDSV_M : stm32_nvic.h , lm3s_com.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_SYS_PRI3_PENDSV_S : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_SYS_PRI3_R : sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_SYS_PRI3_RES_M : stm32_nvic.h , lm3s_com.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_SYS_PRI3_TICK_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_SYS_PRI3_TICK_S : lm3s_nvic.h , lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_UNPEND0 : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT0 : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_UNPEND0_INT1 : sam3_nvic.h , lm3s_com.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT10 : lm3s_nvic.h , lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_UNPEND0_INT11 : stm32_nvic.h , sam3_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT12 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_UNPEND0_INT13 : sam3_nvic.h , lm3s_com.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT14 : sam3_nvic.h , lm3s_com.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT15 : sam3_nvic.h , lm3s_com.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT16 : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_UNPEND0_INT17 : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_UNPEND0_INT18 : sam3_nvic.h , lm3s_com.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT19 : sam3_nvic.h , stm32_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT2 : sam3_nvic.h , stm32_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT20 : stm32_nvic.h , lm3s_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_UNPEND0_INT21 : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_UNPEND0_INT22 : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_UNPEND0_INT23 : stm32_nvic.h , sam3_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT24 : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_UNPEND0_INT25 : lm3s_com.h , stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT26 : stm32_nvic.h , lm3s_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_UNPEND0_INT27 : sam3_nvic.h , lm3s_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_UNPEND0_INT28 : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_UNPEND0_INT29 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_UNPEND0_INT3 : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_UNPEND0_INT30 : sam3_nvic.h , lm3s_com.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT31 : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_UNPEND0_INT4 : lm3s_com.h , stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT5 : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_UNPEND0_INT6 : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_UNPEND0_INT7 : sam3_nvic.h , lm3s_com.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT8 : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_UNPEND0_INT9 : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_UNPEND0_R : lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_UNPEND1 : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_UNPEND1_INT32 : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_UNPEND1_INT33 : stm32_nvic.h , sam3_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_UNPEND1_INT34 : sam3_nvic.h , stm32_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_UNPEND1_INT35 : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_UNPEND1_INT36 : lm3s_com.h , stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_UNPEND1_INT37 : stm32_nvic.h , sam3_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_UNPEND1_INT38 : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_UNPEND1_INT39 : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND1_INT40 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_UNPEND1_INT41 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_UNPEND1_INT42 : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_UNPEND1_INT43 : lm3s_com.h , stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND1_INT44 : sam3_nvic.h , lm3s_com.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND1_INT45 : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_UNPEND1_INT46 : sam3_nvic.h , stm32_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_UNPEND1_INT47 : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_UNPEND1_INT48 : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_UNPEND1_INT49 : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_UNPEND1_INT50 : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_UNPEND1_INT51 : lm3s_nvic.h , lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_UNPEND1_INT52 : sam3_nvic.h , lm3s_com.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND1_INT53 : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_UNPEND1_INT54 : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_UNPEND1_INT55 : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_UNPEND1_INT56 : sam3_nvic.h , lm3s_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_UNPEND1_INT57 : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND1_INT58 : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_UNPEND1_INT59 : stm32_nvic.h , lm3s_com.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND1_R : lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_VTABLE : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_VTABLE_BASE : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_VTABLE_OFFSET_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_VTABLE_OFFSET_S : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_VTABLE_R : sam3_nvic.h , lm3s_com.h , stm32_nvic.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- o -

  • observer_notify() : observer.c , observer.h
  • observer_Subscribe() : observer.h , observer.c
  • observer_Unsubscribe() : observer.h
  • OCR_DIVISOR : timer_mega.h
  • offsetof : compiler.h
  • OS_CSOURCE : os.h
  • OS_HEADER : os.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- a -

  • ACCESS_SAFE : compiler.h
  • ADC0_ACTSS_R : lm3s_com.h
  • ADC0_BASE : lm3s_memmap.h
  • ADC0_EMUX_R : lm3s_com.h
  • ADC0_IM_R : lm3s_com.h
  • ADC0_ISC_R : lm3s_com.h
  • ADC0_OSTAT_R : lm3s_com.h
  • ADC0_PSSI_R : lm3s_com.h
  • ADC0_RIS_R : lm3s_com.h
  • ADC0_SAC_R : lm3s_com.h
  • ADC0_SSCTL0_R : lm3s_com.h
  • ADC0_SSCTL1_R : lm3s_com.h
  • ADC0_SSCTL2_R : lm3s_com.h
  • ADC0_SSCTL3_R : lm3s_com.h
  • ADC0_SSFIFO0_R : lm3s_com.h
  • ADC0_SSFIFO1_R : lm3s_com.h
  • ADC0_SSFIFO2_R : lm3s_com.h
  • ADC0_SSFIFO3_R : lm3s_com.h
  • ADC0_SSFSTAT0_R : lm3s_com.h
  • ADC0_SSFSTAT1_R : lm3s_com.h
  • ADC0_SSFSTAT2_R : lm3s_com.h
  • ADC0_SSFSTAT3_R : lm3s_com.h
  • ADC0_SSMUX0_R : lm3s_com.h
  • ADC0_SSMUX1_R : lm3s_com.h
  • ADC0_SSMUX2_R : lm3s_com.h
  • ADC0_SSMUX3_R : lm3s_com.h
  • ADC0_SSPRI_R : lm3s_com.h
  • ADC0_TMLB_R : lm3s_com.h
  • ADC0_USTAT_R : lm3s_com.h
  • ADC1_BASE : lm3s_memmap.h
  • ADC_ACR : sam3_adc.h
  • ADC_ACR_OFF : sam3_adc.h
  • ADC_ACTSS_ASEN0 : lm3s_adc.h
  • ADC_ACTSS_ASEN1 : lm3s_adc.h
  • ADC_ACTSS_ASEN2 : lm3s_adc.h
  • ADC_ACTSS_ASEN3 : lm3s_adc.h
  • ADC_ACTSS_R : lm3s_com.h
  • ADC_AST17 : sam3_adc.h
  • ADC_AST3 : sam3_adc.h
  • ADC_AST5 : sam3_adc.h
  • ADC_AST9 : sam3_adc.h
  • ADC_AVR_AREF : adc_avr.c
  • ADC_AVR_AVCC : adc_avr.c
  • ADC_AVR_INT256 : adc_avr.c
  • ADC_BASE : sam3_adc.h
  • ADC_CDR : sam3_adc.h
  • ADC_CDR0 : at91_adc.h
  • ADC_CDR0_OFF : at91_adc.h
  • ADC_CDR1 : at91_adc.h
  • ADC_CDR1_OFF : at91_adc.h
  • ADC_CDR2 : at91_adc.h
  • ADC_CDR2_OFF : at91_adc.h
  • ADC_CDR3 : at91_adc.h
  • ADC_CDR3_OFF : at91_adc.h
  • ADC_CDR4 : at91_adc.h
  • ADC_CDR4_OFF : at91_adc.h
  • ADC_CDR5 : at91_adc.h
  • ADC_CDR5_OFF : at91_adc.h
  • ADC_CDR6 : at91_adc.h
  • ADC_CDR6_OFF : at91_adc.h
  • ADC_CDR7 : at91_adc.h
  • ADC_CDR7_OFF : at91_adc.h
  • ADC_CDR_OFF : sam3_adc.h
  • ADC_CH0 : at91_adc.h , sam3_adc.h
  • ADC_CH1 : at91_adc.h , sam3_adc.h
  • ADC_CH2 : at91_adc.h , sam3_adc.h
  • ADC_CH3 : at91_adc.h , sam3_adc.h
  • ADC_CH4 : at91_adc.h , sam3_adc.h
  • ADC_CH5 : at91_adc.h , sam3_adc.h
  • ADC_CH6 : at91_adc.h , sam3_adc.h
  • ADC_CH7 : at91_adc.h , sam3_adc.h
  • ADC_CH_MASK : at91_adc.h , sam3_adc.h
  • adc_ch_t : adc.h
  • ADC_CHDR : at91_adc.h , sam3_adc.h
  • ADC_CHDR_OFF : at91_adc.h , sam3_adc.h
  • ADC_CHER : at91_adc.h , sam3_adc.h
  • ADC_CHER_OFF : at91_adc.h , sam3_adc.h
  • ADC_CHNB : sam3_adc.h
  • ADC_CHSR : at91_adc.h , sam3_adc.h
  • ADC_CHSR_OFF : at91_adc.h , sam3_adc.h
  • ADC_COMPE : sam3_adc.h
  • ADC_COMPUTED_PRESCALER : adc_at91.h
  • ADC_CR : at91_adc.h , sam3_adc.h
  • ADC_CR_OFF : at91_adc.h , sam3_adc.h
  • ADC_CTL_VREF : lm3s_adc.h
  • ADC_DCCMP0_COMP0_M : lm3s_adc.h
  • ADC_DCCMP0_COMP1_M : lm3s_adc.h
  • ADC_DCCMP1_COMP0_M : lm3s_adc.h
  • ADC_DCCMP1_COMP1_M : lm3s_adc.h
  • ADC_DCCMP2_COMP0_M : lm3s_adc.h
  • ADC_DCCMP2_COMP1_M : lm3s_adc.h
  • ADC_DCCMP3_COMP0_M : lm3s_adc.h
  • ADC_DCCMP3_COMP1_M : lm3s_adc.h
  • ADC_DCCMP4_COMP0_M : lm3s_adc.h
  • ADC_DCCMP4_COMP1_M : lm3s_adc.h
  • ADC_DCCMP5_COMP0_M : lm3s_adc.h
  • ADC_DCCMP5_COMP1_M : lm3s_adc.h
  • ADC_DCCMP6_COMP0_M : lm3s_adc.h
  • ADC_DCCMP6_COMP1_M : lm3s_adc.h
  • ADC_DCCMP7_COMP0_M : lm3s_adc.h
  • ADC_DCCMP7_COMP1_M : lm3s_adc.h
  • ADC_DCCTL0_CIC_HIGH : lm3s_adc.h
  • ADC_DCCTL0_CIC_LOW : lm3s_adc.h
  • ADC_DCCTL0_CIC_M : lm3s_adc.h
  • ADC_DCCTL0_CIC_MID : lm3s_adc.h
  • ADC_DCCTL0_CIE : lm3s_adc.h
  • ADC_DCCTL0_CIM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL0_CIM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL0_CIM_HONCE : lm3s_adc.h
  • ADC_DCCTL0_CIM_M : lm3s_adc.h
  • ADC_DCCTL0_CIM_ONCE : lm3s_adc.h
  • ADC_DCCTL0_CTC_HIGH : lm3s_adc.h
  • ADC_DCCTL0_CTC_LOW : lm3s_adc.h
  • ADC_DCCTL0_CTC_M : lm3s_adc.h
  • ADC_DCCTL0_CTC_MID : lm3s_adc.h
  • ADC_DCCTL0_CTE : lm3s_adc.h
  • ADC_DCCTL0_CTM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL0_CTM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL0_CTM_HONCE : lm3s_adc.h
  • ADC_DCCTL0_CTM_M : lm3s_adc.h
  • ADC_DCCTL0_CTM_ONCE : lm3s_adc.h
  • ADC_DCCTL1_CIC_HIGH : lm3s_adc.h
  • ADC_DCCTL1_CIC_LOW : lm3s_adc.h
  • ADC_DCCTL1_CIC_M : lm3s_adc.h
  • ADC_DCCTL1_CIC_MID : lm3s_adc.h
  • ADC_DCCTL1_CIE : lm3s_adc.h
  • ADC_DCCTL1_CIM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL1_CIM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL1_CIM_HONCE : lm3s_adc.h
  • ADC_DCCTL1_CIM_M : lm3s_adc.h
  • ADC_DCCTL1_CIM_ONCE : lm3s_adc.h
  • ADC_DCCTL1_CTC_HIGH : lm3s_adc.h
  • ADC_DCCTL1_CTC_LOW : lm3s_adc.h
  • ADC_DCCTL1_CTC_M : lm3s_adc.h
  • ADC_DCCTL1_CTC_MID : lm3s_adc.h
  • ADC_DCCTL1_CTE : lm3s_adc.h
  • ADC_DCCTL1_CTM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL1_CTM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL1_CTM_HONCE : lm3s_adc.h
  • ADC_DCCTL1_CTM_M : lm3s_adc.h
  • ADC_DCCTL1_CTM_ONCE : lm3s_adc.h
  • ADC_DCCTL2_CIC_HIGH : lm3s_adc.h
  • ADC_DCCTL2_CIC_LOW : lm3s_adc.h
  • ADC_DCCTL2_CIC_M : lm3s_adc.h
  • ADC_DCCTL2_CIC_MID : lm3s_adc.h
  • ADC_DCCTL2_CIE : lm3s_adc.h
  • ADC_DCCTL2_CIM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL2_CIM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL2_CIM_HONCE : lm3s_adc.h
  • ADC_DCCTL2_CIM_M : lm3s_adc.h
  • ADC_DCCTL2_CIM_ONCE : lm3s_adc.h
  • ADC_DCCTL2_CTC_HIGH : lm3s_adc.h
  • ADC_DCCTL2_CTC_LOW : lm3s_adc.h
  • ADC_DCCTL2_CTC_M : lm3s_adc.h
  • ADC_DCCTL2_CTC_MID : lm3s_adc.h
  • ADC_DCCTL2_CTE : lm3s_adc.h
  • ADC_DCCTL2_CTM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL2_CTM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL2_CTM_HONCE : lm3s_adc.h
  • ADC_DCCTL2_CTM_M : lm3s_adc.h
  • ADC_DCCTL2_CTM_ONCE : lm3s_adc.h
  • ADC_DCCTL3_CIC_HIGH : lm3s_adc.h
  • ADC_DCCTL3_CIC_LOW : lm3s_adc.h
  • ADC_DCCTL3_CIC_M : lm3s_adc.h
  • ADC_DCCTL3_CIC_MID : lm3s_adc.h
  • ADC_DCCTL3_CIE : lm3s_adc.h
  • ADC_DCCTL3_CIM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL3_CIM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL3_CIM_HONCE : lm3s_adc.h
  • ADC_DCCTL3_CIM_M : lm3s_adc.h
  • ADC_DCCTL3_CIM_ONCE : lm3s_adc.h
  • ADC_DCCTL3_CTC_HIGH : lm3s_adc.h
  • ADC_DCCTL3_CTC_LOW : lm3s_adc.h
  • ADC_DCCTL3_CTC_M : lm3s_adc.h
  • ADC_DCCTL3_CTC_MID : lm3s_adc.h
  • ADC_DCCTL3_CTE : lm3s_adc.h
  • ADC_DCCTL3_CTM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL3_CTM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL3_CTM_HONCE : lm3s_adc.h
  • ADC_DCCTL3_CTM_M : lm3s_adc.h
  • ADC_DCCTL3_CTM_ONCE : lm3s_adc.h
  • ADC_DCCTL4_CIC_HIGH : lm3s_adc.h
  • ADC_DCCTL4_CIC_LOW : lm3s_adc.h
  • ADC_DCCTL4_CIC_M : lm3s_adc.h
  • ADC_DCCTL4_CIC_MID : lm3s_adc.h
  • ADC_DCCTL4_CIE : lm3s_adc.h
  • ADC_DCCTL4_CIM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL4_CIM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL4_CIM_HONCE : lm3s_adc.h
  • ADC_DCCTL4_CIM_M : lm3s_adc.h
  • ADC_DCCTL4_CIM_ONCE : lm3s_adc.h
  • ADC_DCCTL4_CTC_HIGH : lm3s_adc.h
  • ADC_DCCTL4_CTC_LOW : lm3s_adc.h
  • ADC_DCCTL4_CTC_M : lm3s_adc.h
  • ADC_DCCTL4_CTC_MID : lm3s_adc.h
  • ADC_DCCTL4_CTE : lm3s_adc.h
  • ADC_DCCTL4_CTM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL4_CTM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL4_CTM_HONCE : lm3s_adc.h
  • ADC_DCCTL4_CTM_M : lm3s_adc.h
  • ADC_DCCTL4_CTM_ONCE : lm3s_adc.h
  • ADC_DCCTL5_CIC_HIGH : lm3s_adc.h
  • ADC_DCCTL5_CIC_LOW : lm3s_adc.h
  • ADC_DCCTL5_CIC_M : lm3s_adc.h
  • ADC_DCCTL5_CIC_MID : lm3s_adc.h
  • ADC_DCCTL5_CIE : lm3s_adc.h
  • ADC_DCCTL5_CIM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL5_CIM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL5_CIM_HONCE : lm3s_adc.h
  • ADC_DCCTL5_CIM_M : lm3s_adc.h
  • ADC_DCCTL5_CIM_ONCE : lm3s_adc.h
  • ADC_DCCTL5_CTC_HIGH : lm3s_adc.h
  • ADC_DCCTL5_CTC_LOW : lm3s_adc.h
  • ADC_DCCTL5_CTC_M : lm3s_adc.h
  • ADC_DCCTL5_CTC_MID : lm3s_adc.h
  • ADC_DCCTL5_CTE : lm3s_adc.h
  • ADC_DCCTL5_CTM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL5_CTM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL5_CTM_HONCE : lm3s_adc.h
  • ADC_DCCTL5_CTM_M : lm3s_adc.h
  • ADC_DCCTL5_CTM_ONCE : lm3s_adc.h
  • ADC_DCCTL6_CIC_HIGH : lm3s_adc.h
  • ADC_DCCTL6_CIC_LOW : lm3s_adc.h
  • ADC_DCCTL6_CIC_M : lm3s_adc.h
  • ADC_DCCTL6_CIC_MID : lm3s_adc.h
  • ADC_DCCTL6_CIE : lm3s_adc.h
  • ADC_DCCTL6_CIM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL6_CIM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL6_CIM_HONCE : lm3s_adc.h
  • ADC_DCCTL6_CIM_M : lm3s_adc.h
  • ADC_DCCTL6_CIM_ONCE : lm3s_adc.h
  • ADC_DCCTL6_CTC_HIGH : lm3s_adc.h
  • ADC_DCCTL6_CTC_LOW : lm3s_adc.h
  • ADC_DCCTL6_CTC_M : lm3s_adc.h
  • ADC_DCCTL6_CTC_MID : lm3s_adc.h
  • ADC_DCCTL6_CTE : lm3s_adc.h
  • ADC_DCCTL6_CTM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL6_CTM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL6_CTM_HONCE : lm3s_adc.h
  • ADC_DCCTL6_CTM_M : lm3s_adc.h
  • ADC_DCCTL6_CTM_ONCE : lm3s_adc.h
  • ADC_DCCTL7_CIC_HIGH : lm3s_adc.h
  • ADC_DCCTL7_CIC_LOW : lm3s_adc.h
  • ADC_DCCTL7_CIC_M : lm3s_adc.h
  • ADC_DCCTL7_CIC_MID : lm3s_adc.h
  • ADC_DCCTL7_CIE : lm3s_adc.h
  • ADC_DCCTL7_CIM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL7_CIM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL7_CIM_HONCE : lm3s_adc.h
  • ADC_DCCTL7_CIM_M : lm3s_adc.h
  • ADC_DCCTL7_CIM_ONCE : lm3s_adc.h
  • ADC_DCCTL7_CTC_HIGH : lm3s_adc.h
  • ADC_DCCTL7_CTC_LOW : lm3s_adc.h
  • ADC_DCCTL7_CTC_M : lm3s_adc.h
  • ADC_DCCTL7_CTC_MID : lm3s_adc.h
  • ADC_DCCTL7_CTE : lm3s_adc.h
  • ADC_DCCTL7_CTM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL7_CTM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL7_CTM_HONCE : lm3s_adc.h
  • ADC_DCCTL7_CTM_M : lm3s_adc.h
  • ADC_DCCTL7_CTM_ONCE : lm3s_adc.h
  • ADC_DCISC_DCINT0 : lm3s_adc.h
  • ADC_DCISC_DCINT1 : lm3s_adc.h
  • ADC_DCISC_DCINT2 : lm3s_adc.h
  • ADC_DCISC_DCINT3 : lm3s_adc.h
  • ADC_DCISC_DCINT4 : lm3s_adc.h
  • ADC_DCISC_DCINT5 : lm3s_adc.h
  • ADC_DCISC_DCINT6 : lm3s_adc.h
  • ADC_DCISC_DCINT7 : lm3s_adc.h
  • ADC_DCRIC_DCINT0 : lm3s_adc.h
  • ADC_DCRIC_DCINT1 : lm3s_adc.h
  • ADC_DCRIC_DCINT2 : lm3s_adc.h
  • ADC_DCRIC_DCINT3 : lm3s_adc.h
  • ADC_DCRIC_DCINT4 : lm3s_adc.h
  • ADC_DCRIC_DCINT5 : lm3s_adc.h
  • ADC_DCRIC_DCINT6 : lm3s_adc.h
  • ADC_DCRIC_DCINT7 : lm3s_adc.h
  • ADC_DCRIC_DCTRIG0 : lm3s_adc.h
  • ADC_DCRIC_DCTRIG1 : lm3s_adc.h
  • ADC_DCRIC_DCTRIG2 : lm3s_adc.h
  • ADC_DCRIC_DCTRIG3 : lm3s_adc.h
  • ADC_DCRIC_DCTRIG4 : lm3s_adc.h
  • ADC_DCRIC_DCTRIG5 : lm3s_adc.h
  • ADC_DCRIC_DCTRIG6 : lm3s_adc.h
  • ADC_DCRIC_DCTRIG7 : lm3s_adc.h
  • ADC_DRDY : at91_adc.h , sam3_adc.h
  • ADC_EMUX_EM0_ALWAYS : lm3s_adc.h
  • ADC_EMUX_EM0_COMP0 : lm3s_adc.h
  • ADC_EMUX_EM0_COMP1 : lm3s_adc.h
  • ADC_EMUX_EM0_COMP2 : lm3s_adc.h
  • ADC_EMUX_EM0_EXTERNAL : lm3s_adc.h
  • ADC_EMUX_EM0_M : lm3s_adc.h
  • ADC_EMUX_EM0_PROCESSOR : lm3s_adc.h
  • ADC_EMUX_EM0_PWM0 : lm3s_adc.h
  • ADC_EMUX_EM0_PWM1 : lm3s_adc.h
  • ADC_EMUX_EM0_PWM2 : lm3s_adc.h
  • ADC_EMUX_EM0_PWM3 : lm3s_adc.h
  • ADC_EMUX_EM0_TIMER : lm3s_adc.h
  • ADC_EMUX_EM1_ALWAYS : lm3s_adc.h
  • ADC_EMUX_EM1_COMP0 : lm3s_adc.h
  • ADC_EMUX_EM1_COMP1 : lm3s_adc.h
  • ADC_EMUX_EM1_COMP2 : lm3s_adc.h
  • ADC_EMUX_EM1_EXTERNAL : lm3s_adc.h
  • ADC_EMUX_EM1_M : lm3s_adc.h
  • ADC_EMUX_EM1_PROCESSOR : lm3s_adc.h
  • ADC_EMUX_EM1_PWM0 : lm3s_adc.h
  • ADC_EMUX_EM1_PWM1 : lm3s_adc.h
  • ADC_EMUX_EM1_PWM2 : lm3s_adc.h
  • ADC_EMUX_EM1_PWM3 : lm3s_adc.h
  • ADC_EMUX_EM1_TIMER : lm3s_adc.h
  • ADC_EMUX_EM2_ALWAYS : lm3s_adc.h
  • ADC_EMUX_EM2_COMP0 : lm3s_adc.h
  • ADC_EMUX_EM2_COMP1 : lm3s_adc.h
  • ADC_EMUX_EM2_COMP2 : lm3s_adc.h
  • ADC_EMUX_EM2_EXTERNAL : lm3s_adc.h
  • ADC_EMUX_EM2_M : lm3s_adc.h
  • ADC_EMUX_EM2_PROCESSOR : lm3s_adc.h
  • ADC_EMUX_EM2_PWM0 : lm3s_adc.h
  • ADC_EMUX_EM2_PWM1 : lm3s_adc.h
  • ADC_EMUX_EM2_PWM2 : lm3s_adc.h
  • ADC_EMUX_EM2_PWM3 : lm3s_adc.h
  • ADC_EMUX_EM2_TIMER : lm3s_adc.h
  • ADC_EMUX_EM3_ALWAYS : lm3s_adc.h
  • ADC_EMUX_EM3_COMP0 : lm3s_adc.h
  • ADC_EMUX_EM3_COMP1 : lm3s_adc.h
  • ADC_EMUX_EM3_COMP2 : lm3s_adc.h
  • ADC_EMUX_EM3_EXTERNAL : lm3s_adc.h
  • ADC_EMUX_EM3_M : lm3s_adc.h
  • ADC_EMUX_EM3_PROCESSOR : lm3s_adc.h
  • ADC_EMUX_EM3_PWM0 : lm3s_adc.h
  • ADC_EMUX_EM3_PWM1 : lm3s_adc.h
  • ADC_EMUX_EM3_PWM2 : lm3s_adc.h
  • ADC_EMUX_EM3_PWM3 : lm3s_adc.h
  • ADC_EMUX_EM3_TIMER : lm3s_adc.h
  • ADC_EMUX_R : lm3s_com.h
  • ADC_ENDRX : at91_adc.h , sam3_adc.h
  • ADC_EOC0 : at91_adc.h , sam3_adc.h
  • ADC_EOC1 : at91_adc.h , sam3_adc.h
  • ADC_EOC2 : at91_adc.h , sam3_adc.h
  • ADC_EOC3 : at91_adc.h , sam3_adc.h
  • ADC_EOC4 : at91_adc.h , sam3_adc.h
  • ADC_EOC5 : at91_adc.h , sam3_adc.h
  • ADC_EOC6 : at91_adc.h , sam3_adc.h
  • ADC_EOC7 : at91_adc.h , sam3_adc.h
  • ADC_EOC_MASK : at91_adc.h , sam3_adc.h
  • ADC_FREERUN : sam3_adc.h
  • ADC_GOVRE : at91_adc.h , sam3_adc.h
  • adc_hw_init() : adc_at91.c , adc_at91.h , adc_avr.c , adc_avr.h , adc_lm3s.c , adc_lm3s.h , adc_sam3.c , adc_sam3.h , adc_stm32.c , adc_stm32.h
  • adc_hw_read() : adc_at91.c , adc_at91.h , adc_avr.c , adc_avr.h , adc_lm3s.c , adc_lm3s.h , adc_sam3.c , adc_sam3.h , adc_stm32.c , adc_stm32.h
  • adc_hw_select_ch() : adc_at91.c , adc_at91.h , adc_avr.c , adc_avr.h , adc_lm3s.c , adc_lm3s.h , adc_sam3.c , adc_sam3.h , adc_stm32.c , adc_stm32.h
  • ADC_IDR : at91_adc.h , sam3_adc.h
  • ADC_IDR_OFF : at91_adc.h , sam3_adc.h
  • ADC_IER : at91_adc.h , sam3_adc.h
  • ADC_IER_OFF : at91_adc.h , sam3_adc.h
  • ADC_IM_DCONSS0 : lm3s_adc.h
  • ADC_IM_DCONSS1 : lm3s_adc.h
  • ADC_IM_DCONSS2 : lm3s_adc.h
  • ADC_IM_DCONSS3 : lm3s_adc.h
  • ADC_IM_MASK0 : lm3s_adc.h
  • ADC_IM_MASK1 : lm3s_adc.h
  • ADC_IM_MASK2 : lm3s_adc.h
  • ADC_IM_MASK3 : lm3s_adc.h
  • ADC_IM_R : lm3s_com.h
  • ADC_IMR : at91_adc.h , sam3_adc.h
  • ADC_IMR_OFF : at91_adc.h , sam3_adc.h
  • adc_init() : adc.c , adc.h
  • ADC_INIT_PINS : adc_at91.h , adc_lm3s.h , adc_stm32.h
  • ADC_IRQHANDLER : stm32_ints.h
  • ADC_ISC_DCINSS0 : lm3s_adc.h
  • ADC_ISC_DCINSS1 : lm3s_adc.h
  • ADC_ISC_DCINSS2 : lm3s_adc.h
  • ADC_ISC_DCINSS3 : lm3s_adc.h
  • ADC_ISC_IN0 : lm3s_adc.h
  • ADC_ISC_IN1 : lm3s_adc.h
  • ADC_ISC_IN2 : lm3s_adc.h
  • ADC_ISC_IN3 : lm3s_adc.h
  • ADC_ISC_R : lm3s_com.h
  • ADC_ISR : sam3_adc.h
  • ADC_ISR_OFF : sam3_adc.h
  • ADC_LCDR : at91_adc.h , sam3_adc.h
  • ADC_LCDR_OFF : at91_adc.h , sam3_adc.h
  • ADC_LDATA : sam3_adc.h
  • ADC_LOG_FORMAT : cfg_adc.h
  • ADC_LOG_LEVEL : cfg_adc.h
  • ADC_LOWRES : at91_adc.h , sam3_adc.h
  • ADC_MR : at91_adc.h , sam3_adc.h
  • ADC_MR_OFF : at91_adc.h , sam3_adc.h
  • ADC_MUX_MAXCH : adc_at91.h , adc_sam3.h , adc_stm32.h
  • ADC_O_ACTSS : lm3s_adc.h
  • ADC_O_CTL : lm3s_adc.h
  • ADC_O_DCCMP0 : lm3s_adc.h
  • ADC_O_DCCMP1 : lm3s_adc.h
  • ADC_O_DCCMP2 : lm3s_adc.h
  • ADC_O_DCCMP3 : lm3s_adc.h
  • ADC_O_DCCMP4 : lm3s_adc.h
  • ADC_O_DCCMP5 : lm3s_adc.h
  • ADC_O_DCCMP6 : lm3s_adc.h
  • ADC_O_DCCMP7 : lm3s_adc.h
  • ADC_O_DCCTL0 : lm3s_adc.h
  • ADC_O_DCCTL1 : lm3s_adc.h
  • ADC_O_DCCTL2 : lm3s_adc.h
  • ADC_O_DCCTL3 : lm3s_adc.h
  • ADC_O_DCCTL4 : lm3s_adc.h
  • ADC_O_DCCTL5 : lm3s_adc.h
  • ADC_O_DCCTL6 : lm3s_adc.h
  • ADC_O_DCCTL7 : lm3s_adc.h
  • ADC_O_DCISC : lm3s_adc.h
  • ADC_O_DCRIC : lm3s_adc.h
  • ADC_O_EMUX : lm3s_adc.h
  • ADC_O_IM : lm3s_adc.h
  • ADC_O_ISC : lm3s_adc.h
  • ADC_O_OSTAT : lm3s_adc.h
  • ADC_O_PSSI : lm3s_adc.h
  • ADC_O_RIS : lm3s_adc.h
  • ADC_O_SAC : lm3s_adc.h
  • ADC_O_SPC : lm3s_adc.h
  • ADC_O_SSCTL0 : lm3s_adc.h
  • ADC_O_SSCTL1 : lm3s_adc.h
  • ADC_O_SSCTL2 : lm3s_adc.h
  • ADC_O_SSCTL3 : lm3s_adc.h
  • ADC_O_SSDC0 : lm3s_adc.h
  • ADC_O_SSDC1 : lm3s_adc.h
  • ADC_O_SSDC2 : lm3s_adc.h
  • ADC_O_SSDC3 : lm3s_adc.h
  • ADC_O_SSFIFO0 : lm3s_adc.h
  • ADC_O_SSFIFO1 : lm3s_adc.h
  • ADC_O_SSFIFO2 : lm3s_adc.h
  • ADC_O_SSFIFO3 : lm3s_adc.h
  • ADC_O_SSFSTAT0 : lm3s_adc.h
  • ADC_O_SSFSTAT1 : lm3s_adc.h
  • ADC_O_SSFSTAT2 : lm3s_adc.h
  • ADC_O_SSFSTAT3 : lm3s_adc.h
  • ADC_O_SSMUX0 : lm3s_adc.h
  • ADC_O_SSMUX1 : lm3s_adc.h
  • ADC_O_SSMUX2 : lm3s_adc.h
  • ADC_O_SSMUX3 : lm3s_adc.h
  • ADC_O_SSOP0 : lm3s_adc.h
  • ADC_O_SSOP1 : lm3s_adc.h
  • ADC_O_SSOP2 : lm3s_adc.h
  • ADC_O_SSOP3 : lm3s_adc.h
  • ADC_O_SSPRI : lm3s_adc.h
  • ADC_O_TMLB : lm3s_adc.h
  • ADC_O_USTAT : lm3s_adc.h
  • ADC_OSTAT_OV0 : lm3s_adc.h
  • ADC_OSTAT_OV1 : lm3s_adc.h
  • ADC_OSTAT_OV2 : lm3s_adc.h
  • ADC_OSTAT_OV3 : lm3s_adc.h
  • ADC_OSTAT_R : lm3s_com.h
  • ADC_OVRE0 : at91_adc.h , sam3_adc.h
  • ADC_OVRE1 : at91_adc.h , sam3_adc.h
  • ADC_OVRE2 : at91_adc.h , sam3_adc.h
  • ADC_OVRE3 : at91_adc.h , sam3_adc.h
  • ADC_OVRE4 : at91_adc.h , sam3_adc.h
  • ADC_OVRE5 : at91_adc.h , sam3_adc.h
  • ADC_OVRE6 : at91_adc.h , sam3_adc.h
  • ADC_OVRE7 : at91_adc.h , sam3_adc.h
  • ADC_PRESCALER : adc_sam3.h
  • ADC_PRESCALER_MASK : sam3_adc.h , at91_adc.h
  • ADC_PRESCALER_SHIFT : at91_adc.h , sam3_adc.h
  • ADC_PSSI_GSYNC : lm3s_adc.h
  • ADC_PSSI_R : lm3s_com.h
  • ADC_PSSI_SS0 : lm3s_adc.h
  • ADC_PSSI_SS1 : lm3s_adc.h
  • ADC_PSSI_SS2 : lm3s_adc.h
  • ADC_PSSI_SS3 : lm3s_adc.h
  • ADC_PSSI_SYNCWAIT : lm3s_adc.h
  • ADC_RANGECONV : adc.h
  • adc_read() : adc.h , adc.c
  • ADC_RIS_INR0 : lm3s_adc.h
  • ADC_RIS_INR1 : lm3s_adc.h
  • ADC_RIS_INR2 : lm3s_adc.h
  • ADC_RIS_INR3 : lm3s_adc.h
  • ADC_RIS_INRDC : lm3s_adc.h
  • ADC_RIS_R : lm3s_com.h
  • ADC_RXBUFF : at91_adc.h , sam3_adc.h
  • ADC_SAC_AVG_16X : lm3s_adc.h
  • ADC_SAC_AVG_2X : lm3s_adc.h
  • ADC_SAC_AVG_32X : lm3s_adc.h
  • ADC_SAC_AVG_4X : lm3s_adc.h
  • ADC_SAC_AVG_64X : lm3s_adc.h
  • ADC_SAC_AVG_8X : lm3s_adc.h
  • ADC_SAC_AVG_M : lm3s_adc.h
  • ADC_SAC_AVG_OFF : lm3s_adc.h
  • ADC_SAC_R : lm3s_com.h
  • ADC_SETTLING_MASK : sam3_adc.h
  • ADC_SETTLING_SHIFT : sam3_adc.h
  • ADC_SHTIME_MASK : at91_adc.h
  • ADC_SHTIME_SHIFT : at91_adc.h
  • ADC_SLEEP : at91_adc.h , sam3_adc.h
  • ADC_SPC_PHASE_0 : lm3s_adc.h
  • ADC_SPC_PHASE_112_5 : lm3s_adc.h
  • ADC_SPC_PHASE_135 : lm3s_adc.h
  • ADC_SPC_PHASE_157_5 : lm3s_adc.h
  • ADC_SPC_PHASE_180 : lm3s_adc.h
  • ADC_SPC_PHASE_202_5 : lm3s_adc.h
  • ADC_SPC_PHASE_225 : lm3s_adc.h
  • ADC_SPC_PHASE_22_5 : lm3s_adc.h
  • ADC_SPC_PHASE_247_5 : lm3s_adc.h
  • ADC_SPC_PHASE_270 : lm3s_adc.h
  • ADC_SPC_PHASE_292_5 : lm3s_adc.h
  • ADC_SPC_PHASE_315 : lm3s_adc.h
  • ADC_SPC_PHASE_337_5 : lm3s_adc.h
  • ADC_SPC_PHASE_45 : lm3s_adc.h
  • ADC_SPC_PHASE_67_5 : lm3s_adc.h
  • ADC_SPC_PHASE_90 : lm3s_adc.h
  • ADC_SPC_PHASE_M : lm3s_adc.h
  • ADC_SR : at91_adc.h , sam3_adc.h
  • ADC_SR_OFF : at91_adc.h , sam3_adc.h
  • ADC_SSCTL0_D0 : lm3s_adc.h
  • ADC_SSCTL0_D1 : lm3s_adc.h
  • ADC_SSCTL0_D2 : lm3s_adc.h
  • ADC_SSCTL0_D3 : lm3s_adc.h
  • ADC_SSCTL0_D4 : lm3s_adc.h
  • ADC_SSCTL0_D5 : lm3s_adc.h
  • ADC_SSCTL0_D6 : lm3s_adc.h
  • ADC_SSCTL0_D7 : lm3s_adc.h
  • ADC_SSCTL0_END0 : lm3s_adc.h
  • ADC_SSCTL0_END1 : lm3s_adc.h
  • ADC_SSCTL0_END2 : lm3s_adc.h
  • ADC_SSCTL0_END3 : lm3s_adc.h
  • ADC_SSCTL0_END4 : lm3s_adc.h
  • ADC_SSCTL0_END5 : lm3s_adc.h
  • ADC_SSCTL0_END6 : lm3s_adc.h
  • ADC_SSCTL0_END7 : lm3s_adc.h
  • ADC_SSCTL0_IE0 : lm3s_adc.h
  • ADC_SSCTL0_IE1 : lm3s_adc.h
  • ADC_SSCTL0_IE2 : lm3s_adc.h
  • ADC_SSCTL0_IE3 : lm3s_adc.h
  • ADC_SSCTL0_IE4 : lm3s_adc.h
  • ADC_SSCTL0_IE5 : lm3s_adc.h
  • ADC_SSCTL0_IE6 : lm3s_adc.h
  • ADC_SSCTL0_IE7 : lm3s_adc.h
  • ADC_SSCTL0_R : lm3s_com.h
  • ADC_SSCTL0_TS0 : lm3s_adc.h
  • ADC_SSCTL0_TS1 : lm3s_adc.h
  • ADC_SSCTL0_TS2 : lm3s_adc.h
  • ADC_SSCTL0_TS3 : lm3s_adc.h
  • ADC_SSCTL0_TS4 : lm3s_adc.h
  • ADC_SSCTL0_TS5 : lm3s_adc.h
  • ADC_SSCTL0_TS6 : lm3s_adc.h
  • ADC_SSCTL0_TS7 : lm3s_adc.h
  • ADC_SSCTL1_D0 : lm3s_adc.h
  • ADC_SSCTL1_D1 : lm3s_adc.h
  • ADC_SSCTL1_D2 : lm3s_adc.h
  • ADC_SSCTL1_D3 : lm3s_adc.h
  • ADC_SSCTL1_END0 : lm3s_adc.h
  • ADC_SSCTL1_END1 : lm3s_adc.h
  • ADC_SSCTL1_END2 : lm3s_adc.h
  • ADC_SSCTL1_END3 : lm3s_adc.h
  • ADC_SSCTL1_IE0 : lm3s_adc.h
  • ADC_SSCTL1_IE1 : lm3s_adc.h
  • ADC_SSCTL1_IE2 : lm3s_adc.h
  • ADC_SSCTL1_IE3 : lm3s_adc.h
  • ADC_SSCTL1_R : lm3s_com.h
  • ADC_SSCTL1_TS0 : lm3s_adc.h
  • ADC_SSCTL1_TS1 : lm3s_adc.h
  • ADC_SSCTL1_TS2 : lm3s_adc.h
  • ADC_SSCTL1_TS3 : lm3s_adc.h
  • ADC_SSCTL2_D0 : lm3s_adc.h
  • ADC_SSCTL2_D1 : lm3s_adc.h
  • ADC_SSCTL2_D2 : lm3s_adc.h
  • ADC_SSCTL2_D3 : lm3s_adc.h
  • ADC_SSCTL2_END0 : lm3s_adc.h
  • ADC_SSCTL2_END1 : lm3s_adc.h
  • ADC_SSCTL2_END2 : lm3s_adc.h
  • ADC_SSCTL2_END3 : lm3s_adc.h
  • ADC_SSCTL2_IE0 : lm3s_adc.h
  • ADC_SSCTL2_IE1 : lm3s_adc.h
  • ADC_SSCTL2_IE2 : lm3s_adc.h
  • ADC_SSCTL2_IE3 : lm3s_adc.h
  • ADC_SSCTL2_R : lm3s_com.h
  • ADC_SSCTL2_TS0 : lm3s_adc.h
  • ADC_SSCTL2_TS1 : lm3s_adc.h
  • ADC_SSCTL2_TS2 : lm3s_adc.h
  • ADC_SSCTL2_TS3 : lm3s_adc.h
  • ADC_SSCTL3_D0 : lm3s_adc.h
  • ADC_SSCTL3_END0 : lm3s_adc.h
  • ADC_SSCTL3_IE0 : lm3s_adc.h
  • ADC_SSCTL3_R : lm3s_com.h
  • ADC_SSCTL3_TS0 : lm3s_adc.h
  • ADC_SSDC0_S0DCSEL_M : lm3s_adc.h
  • ADC_SSDC0_S1DCSEL_M : lm3s_adc.h
  • ADC_SSDC0_S2DCSEL_M : lm3s_adc.h
  • ADC_SSDC0_S3DCSEL_M : lm3s_adc.h
  • ADC_SSDC0_S4DCSEL_M : lm3s_adc.h
  • ADC_SSDC0_S5DCSEL_M : lm3s_adc.h
  • ADC_SSDC0_S6DCSEL_M : lm3s_adc.h
  • ADC_SSDC0_S7DCSEL_M : lm3s_adc.h
  • ADC_SSDC1_S0DCSEL_M : lm3s_adc.h
  • ADC_SSDC1_S1DCSEL_M : lm3s_adc.h
  • ADC_SSDC1_S2DCSEL_M : lm3s_adc.h
  • ADC_SSDC1_S3DCSEL_M : lm3s_adc.h
  • ADC_SSDC2_S0DCSEL_M : lm3s_adc.h
  • ADC_SSDC2_S1DCSEL_M : lm3s_adc.h
  • ADC_SSDC2_S2DCSEL_M : lm3s_adc.h
  • ADC_SSDC2_S3DCSEL_M : lm3s_adc.h
  • ADC_SSDC3_S0DCSEL_M : lm3s_adc.h
  • ADC_SSFIFO0_DATA_M : lm3s_adc.h
  • ADC_SSFIFO0_DATA_S : lm3s_adc.h
  • ADC_SSFIFO0_R : lm3s_com.h
  • ADC_SSFIFO1_DATA_M : lm3s_adc.h
  • ADC_SSFIFO1_DATA_S : lm3s_adc.h
  • ADC_SSFIFO1_R : lm3s_com.h
  • ADC_SSFIFO2_DATA_M : lm3s_adc.h
  • ADC_SSFIFO2_DATA_S : lm3s_adc.h
  • ADC_SSFIFO2_R : lm3s_com.h
  • ADC_SSFIFO3_DATA_M : lm3s_adc.h
  • ADC_SSFIFO3_DATA_S : lm3s_adc.h
  • ADC_SSFIFO3_R : lm3s_com.h
  • ADC_SSFIFO_TMLB_CNT_M : lm3s_adc.h
  • ADC_SSFIFO_TMLB_CNT_S : lm3s_adc.h
  • ADC_SSFIFO_TMLB_CONT : lm3s_adc.h
  • ADC_SSFIFO_TMLB_DIFF : lm3s_adc.h
  • ADC_SSFIFO_TMLB_MUX_M : lm3s_adc.h
  • ADC_SSFIFO_TMLB_MUX_S : lm3s_adc.h
  • ADC_SSFIFO_TMLB_TS : lm3s_adc.h
  • ADC_SSFSTAT0_EMPTY : lm3s_adc.h
  • ADC_SSFSTAT0_FULL : lm3s_adc.h
  • ADC_SSFSTAT0_HPTR_M : lm3s_adc.h
  • ADC_SSFSTAT0_HPTR_S : lm3s_adc.h
  • ADC_SSFSTAT0_R : lm3s_com.h
  • ADC_SSFSTAT0_TPTR_M : lm3s_adc.h
  • ADC_SSFSTAT0_TPTR_S : lm3s_adc.h
  • ADC_SSFSTAT1_EMPTY : lm3s_adc.h
  • ADC_SSFSTAT1_FULL : lm3s_adc.h
  • ADC_SSFSTAT1_HPTR_M : lm3s_adc.h
  • ADC_SSFSTAT1_HPTR_S : lm3s_adc.h
  • ADC_SSFSTAT1_R : lm3s_com.h
  • ADC_SSFSTAT1_TPTR_M : lm3s_adc.h
  • ADC_SSFSTAT1_TPTR_S : lm3s_adc.h
  • ADC_SSFSTAT2_EMPTY : lm3s_adc.h
  • ADC_SSFSTAT2_FULL : lm3s_adc.h
  • ADC_SSFSTAT2_HPTR_M : lm3s_adc.h
  • ADC_SSFSTAT2_HPTR_S : lm3s_adc.h
  • ADC_SSFSTAT2_R : lm3s_com.h
  • ADC_SSFSTAT2_TPTR_M : lm3s_adc.h
  • ADC_SSFSTAT2_TPTR_S : lm3s_adc.h
  • ADC_SSFSTAT3_EMPTY : lm3s_adc.h
  • ADC_SSFSTAT3_FULL : lm3s_adc.h
  • ADC_SSFSTAT3_HPTR_M : lm3s_adc.h
  • ADC_SSFSTAT3_HPTR_S : lm3s_adc.h
  • ADC_SSFSTAT3_R : lm3s_com.h
  • ADC_SSFSTAT3_TPTR_M : lm3s_adc.h
  • ADC_SSFSTAT3_TPTR_S : lm3s_adc.h
  • ADC_SSMUX0_MUX0_M : lm3s_adc.h
  • ADC_SSMUX0_MUX0_S : lm3s_adc.h
  • ADC_SSMUX0_MUX1_M : lm3s_adc.h
  • ADC_SSMUX0_MUX1_S : lm3s_adc.h
  • ADC_SSMUX0_MUX2_M : lm3s_adc.h
  • ADC_SSMUX0_MUX2_S : lm3s_adc.h
  • ADC_SSMUX0_MUX3_M : lm3s_adc.h
  • ADC_SSMUX0_MUX3_S : lm3s_adc.h
  • ADC_SSMUX0_MUX4_M : lm3s_adc.h
  • ADC_SSMUX0_MUX4_S : lm3s_adc.h
  • ADC_SSMUX0_MUX5_M : lm3s_adc.h
  • ADC_SSMUX0_MUX5_S : lm3s_adc.h
  • ADC_SSMUX0_MUX6_M : lm3s_adc.h
  • ADC_SSMUX0_MUX6_S : lm3s_adc.h
  • ADC_SSMUX0_MUX7_M : lm3s_adc.h
  • ADC_SSMUX0_MUX7_S : lm3s_adc.h
  • ADC_SSMUX0_R : lm3s_com.h
  • ADC_SSMUX1_MUX0_M : lm3s_adc.h
  • ADC_SSMUX1_MUX0_S : lm3s_adc.h
  • ADC_SSMUX1_MUX1_M : lm3s_adc.h
  • ADC_SSMUX1_MUX1_S : lm3s_adc.h
  • ADC_SSMUX1_MUX2_M : lm3s_adc.h
  • ADC_SSMUX1_MUX2_S : lm3s_adc.h
  • ADC_SSMUX1_MUX3_M : lm3s_adc.h
  • ADC_SSMUX1_MUX3_S : lm3s_adc.h
  • ADC_SSMUX1_R : lm3s_com.h
  • ADC_SSMUX2_MUX0_M : lm3s_adc.h
  • ADC_SSMUX2_MUX1_M : lm3s_adc.h
  • ADC_SSMUX2_MUX2_M : lm3s_adc.h
  • ADC_SSMUX2_MUX3_M : lm3s_adc.h
  • ADC_SSMUX2_R : lm3s_com.h
  • ADC_SSMUX3_MUX0_M : lm3s_adc.h
  • ADC_SSMUX3_R : lm3s_com.h
  • ADC_SSOP0_S0DCOP : lm3s_adc.h
  • ADC_SSOP0_S1DCOP : lm3s_adc.h
  • ADC_SSOP0_S2DCOP : lm3s_adc.h
  • ADC_SSOP0_S3DCOP : lm3s_adc.h
  • ADC_SSOP0_S4DCOP : lm3s_adc.h
  • ADC_SSOP0_S5DCOP : lm3s_adc.h
  • ADC_SSOP0_S6DCOP : lm3s_adc.h
  • ADC_SSOP0_S7DCOP : lm3s_adc.h
  • ADC_SSOP1_S0DCOP : lm3s_adc.h
  • ADC_SSOP1_S1DCOP : lm3s_adc.h
  • ADC_SSOP1_S2DCOP : lm3s_adc.h
  • ADC_SSOP1_S3DCOP : lm3s_adc.h
  • ADC_SSOP2_S0DCOP : lm3s_adc.h
  • ADC_SSOP2_S1DCOP : lm3s_adc.h
  • ADC_SSOP2_S2DCOP : lm3s_adc.h
  • ADC_SSOP2_S3DCOP : lm3s_adc.h
  • ADC_SSOP3_S0DCOP : lm3s_adc.h
  • ADC_SSPRI_R : lm3s_com.h
  • ADC_SSPRI_SS0_1ST : lm3s_adc.h
  • ADC_SSPRI_SS0_2ND : lm3s_adc.h
  • ADC_SSPRI_SS0_3RD : lm3s_adc.h
  • ADC_SSPRI_SS0_4TH : lm3s_adc.h
  • ADC_SSPRI_SS0_M : lm3s_adc.h
  • ADC_SSPRI_SS1_1ST : lm3s_adc.h
  • ADC_SSPRI_SS1_2ND : lm3s_adc.h
  • ADC_SSPRI_SS1_3RD : lm3s_adc.h
  • ADC_SSPRI_SS1_4TH : lm3s_adc.h
  • ADC_SSPRI_SS1_M : lm3s_adc.h
  • ADC_SSPRI_SS2_1ST : lm3s_adc.h
  • ADC_SSPRI_SS2_2ND : lm3s_adc.h
  • ADC_SSPRI_SS2_3RD : lm3s_adc.h
  • ADC_SSPRI_SS2_4TH : lm3s_adc.h
  • ADC_SSPRI_SS2_M : lm3s_adc.h
  • ADC_SSPRI_SS3_1ST : lm3s_adc.h
  • ADC_SSPRI_SS3_2ND : lm3s_adc.h
  • ADC_SSPRI_SS3_3RD : lm3s_adc.h
  • ADC_SSPRI_SS3_4TH : lm3s_adc.h
  • ADC_SSPRI_SS3_M : lm3s_adc.h
  • ADC_START : sam3_adc.h , at91_adc.h
  • ADC_STARTUP_MASK : sam3_adc.h , at91_adc.h
  • ADC_STARTUP_SHIFT : at91_adc.h , sam3_adc.h
  • ADC_SUT0 : sam3_adc.h
  • ADC_SUT112 : sam3_adc.h
  • ADC_SUT16 : sam3_adc.h
  • ADC_SUT24 : sam3_adc.h
  • ADC_SUT512 : sam3_adc.h
  • ADC_SUT576 : sam3_adc.h
  • ADC_SUT64 : sam3_adc.h
  • ADC_SUT640 : sam3_adc.h
  • ADC_SUT704 : sam3_adc.h
  • ADC_SUT768 : sam3_adc.h
  • ADC_SUT8 : sam3_adc.h
  • ADC_SUT80 : sam3_adc.h
  • ADC_SUT832 : sam3_adc.h
  • ADC_SUT896 : sam3_adc.h
  • ADC_SUT96 : sam3_adc.h
  • ADC_SUT960 : sam3_adc.h
  • ADC_SWRST : at91_adc.h , sam3_adc.h
  • ADC_TEMPERATURE_CH : sam3_adc.h
  • ADC_TMLB_CNT_M : lm3s_com.h
  • ADC_TMLB_CNT_S : lm3s_com.h
  • ADC_TMLB_CONT : lm3s_com.h
  • ADC_TMLB_DIFF : lm3s_com.h
  • ADC_TMLB_LB : lm3s_adc.h
  • ADC_TMLB_MUX_M : lm3s_com.h
  • ADC_TMLB_MUX_S : lm3s_com.h
  • ADC_TMLB_R : lm3s_com.h
  • ADC_TMLB_TS : lm3s_com.h
  • ADC_TRACKTIM_MASK : sam3_adc.h
  • ADC_TRACKTIM_SHIFT : sam3_adc.h
  • ADC_TRANSFER_MASK : sam3_adc.h
  • ADC_TRANSFER_SHIFT : sam3_adc.h
  • ADC_TRGEN : at91_adc.h , sam3_adc.h
  • ADC_TRGSEL_EXT : at91_adc.h
  • ADC_TRGSEL_PWM0 : sam3_adc.h
  • ADC_TRGSEL_PWM1 : sam3_adc.h
  • ADC_TRGSEL_TIOA0 : at91_adc.h , sam3_adc.h
  • ADC_TRGSEL_TIOA1 : at91_adc.h , sam3_adc.h
  • ADC_TRGSEL_TIOA2 : at91_adc.h , sam3_adc.h
  • ADC_TSON : sam3_adc.h
  • ADC_USTAT_R : lm3s_com.h
  • ADC_USTAT_UV0 : lm3s_adc.h
  • ADC_USTAT_UV1 : lm3s_adc.h
  • ADC_USTAT_UV2 : lm3s_adc.h
  • ADC_USTAT_UV3 : lm3s_adc.h
  • adcread_t : adc.h
  • ADDHEAD : list.h
  • ADDTAIL : list.h
  • AFSK_ADC_INIT : hw_afsk.h
  • afsk_adc_isr() : afsk.c , afsk.h
  • AFSK_DAC_INIT : hw_afsk.h
  • AFSK_DAC_IRQ_START : hw_afsk.h
  • AFSK_DAC_IRQ_STOP : hw_afsk.h
  • afsk_dac_isr() : afsk.h , afsk.c
  • afsk_init() : afsk.h , afsk.c
  • AFSK_LOG_FORMAT : cfg_afsk.h
  • AFSK_LOG_LEVEL : cfg_afsk.h
  • AFSK_RXFIFO_OVERRUN : afsk.h
  • AIC_CISR : at91_aic.h
  • AIC_CISR_OFF : at91_aic.h
  • AIC_DCR : at91_aic.h
  • AIC_DCR_OFF : at91_aic.h
  • AIC_EOICR : at91_aic.h
  • AIC_EOICR_OFF : at91_aic.h
  • AIC_FFDR : at91_aic.h
  • AIC_FFDR_OFF : at91_aic.h
  • AIC_FFER : at91_aic.h
  • AIC_FFER_OFF : at91_aic.h
  • AIC_FFSR : at91_aic.h
  • AIC_FFSR_OFF : at91_aic.h
  • AIC_FVR : at91_aic.h
  • AIC_FVR_OFF : at91_aic.h
  • AIC_ICCR : at91_aic.h
  • AIC_ICCR_OFF : at91_aic.h
  • AIC_IDCR : at91_aic.h
  • AIC_IDCR_OFF : at91_aic.h
  • AIC_IECR : at91_aic.h
  • AIC_IECR_OFF : at91_aic.h
  • AIC_IMR : at91_aic.h
  • AIC_IMR_OFF : at91_aic.h
  • AIC_IPR : at91_aic.h
  • AIC_IPR_OFF : at91_aic.h
  • AIC_IRQID_MASK : at91_aic.h
  • AIC_ISCR : at91_aic.h
  • AIC_ISCR_OFF : at91_aic.h
  • AIC_ISR : at91_aic.h
  • AIC_ISR_OFF : at91_aic.h
  • AIC_IVR : at91_aic.h
  • AIC_IVR_OFF : at91_aic.h
  • AIC_NFIQ : at91_aic.h
  • AIC_NIRQ : at91_aic.h
  • AIC_PRIOR_MASK : at91_aic.h
  • AIC_SMR : at91_aic.h
  • AIC_SPU : at91_aic.h
  • AIC_SPU_OFF : at91_aic.h
  • AIC_SRCTYPE_EXT_HIGH_LEVEL : at91_aic.h
  • AIC_SRCTYPE_EXT_LOW_LEVEL : at91_aic.h
  • AIC_SRCTYPE_EXT_NEGATIVE_EDGE : at91_aic.h
  • AIC_SRCTYPE_EXT_POSITIVE_EDGE : at91_aic.h
  • AIC_SRCTYPE_INT_EDGE_TRIGGERED : at91_aic.h
  • AIC_SRCTYPE_INT_LEVEL_SENSITIVE : at91_aic.h
  • AIC_SRCTYPE_MASK : at91_aic.h
  • AIC_SVR : at91_aic.h
  • ALIGN_UP : macros.h
  • alignof : compiler.h
  • all_motors : stepper.c
  • amp_t : ntc.h
  • ANSI_ESC_CLEARSCREEN : text.h
  • ansi_mode : text.c
  • API_LIB_DEBUG : cfg_lwip.h
  • API_MSG_DEBUG : cfg_lwip.h
  • ARCH_DEFAULT : cfg_arch.h
  • ARCH_EMUL : cfg_arch.h
  • ARCH_NIGHTTEST : cfg_arch.h
  • ARCH_QT : cfg_arch.h
  • ARCH_UNITTEST : cfg_arch.h
  • ARP_QUEUEING : cfg_lwip.h
  • ARP_TABLE_SIZE : cfg_lwip.h
  • asm_switch_context() : proc_p.h
  • ASSERT : debug.h
  • ASSERT2 : debug.h
  • ASSERT_VALID_OBJ : debug.h
  • ASSERT_VALID_PTR : debug.h
  • ASSERT_VALID_PTR_OR_NULL : debug.h
  • atoi() : strtol10.h
  • atol() : strtol10.h
  • ATOMIC : cpu/irq.h
  • AUTOIP_DEBUG : cfg_lwip.h
  • AX25_CALL : ax25.h
  • ax25_callback_t : ax25.h
  • AX25_CRC_CORRECT : ax25.h
  • ax25_init() : ax25.c , ax25.h
  • AX25_LOG_FORMAT : cfg_ax25.h
  • AX25_LOG_LEVEL : cfg_ax25.h
  • AX25_MAX_RPT : ax25.h
  • AX25_MIN_FRAME_LEN : ax25.h
  • AX25_PATH : ax25.h
  • ax25_poll() : ax25.h , ax25.c
  • ax25_print() : ax25.c , ax25.h
  • ax25_send : ax25.h
  • ax25_sendVia() : ax25.h , ax25.c


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- b -

  • BATTFS_CAST() : battfs.h
  • BATTFS_CREATE : battfs.h
  • BATTFS_DISK_FLUSHBUF_ERR : battfs.h
  • BATTFS_DISK_READ_ERR : battfs.h
  • BATTFS_DISK_SPACEOVER_ERR : battfs.h
  • BATTFS_DISK_WRITE_ERR : battfs.h
  • battfs_eraseBlock() : battfs.h
  • BATTFS_FILE_NOT_FOUND_ERR : battfs.h
  • battfs_fileclose() : battfs.c
  • battfs_fileExists() : battfs.c , battfs.h
  • battfs_fileopen() : battfs.c , battfs.h
  • battfs_flush() : battfs.c
  • battfs_fsck() : battfs.h , battfs.c
  • BATTFS_HEADER_LEN : battfs.h
  • BATTFS_LOG_FORMAT : cfg_battfs.h
  • BATTFS_LOG_LEVEL : cfg_battfs.h
  • BATTFS_MAX_FILES : battfs.h
  • battfs_mount() : battfs.c , battfs.h
  • BATTFS_NEGATIVE_SEEK_ERR : battfs.h
  • BATTFS_RD : battfs.h
  • battfs_read() : battfs.c
  • battfs_to_disk() : battfs.c
  • battfs_umount() : battfs.c , battfs.h
  • BATTFS_WR : battfs.h
  • battfs_write() : battfs.c
  • battfs_writeTestBlock() : battfs.h
  • BDCR_BASE : clock_stm32.h
  • BDCR_BDRST_BB : clock_stm32.h
  • BDCR_OFFSET : clock_stm32.h
  • BDCR_RTCEN_BB : clock_stm32.h
  • BDRST_BITNUMBER : clock_stm32.h
  • BIT_CHANGE : macros.h
  • BIT_CHANGE_BV : macros.h
  • BITARRAY_ALLOC : bitarray.h
  • bitarray_clear() : bitarray.h
  • bitarray_clearRange() : bitarray.h
  • bitarray_dump() : bitarray.h
  • bitarray_init() : bitarray.h
  • bitarray_isFull() : bitarray.h
  • bitarray_isRangeEmpty() : bitarray.h
  • bitarray_isRangeFull() : bitarray.h
  • bitarray_set() : bitarray.h
  • bitarray_setRange() : bitarray.h
  • bitarray_test() : bitarray.h
  • BITMAP_FMT_PLANAR_H_MSB : gfx.h
  • BITMAP_FMT_PLANAR_V_LSB : gfx.h
  • BITRATE : afsk.h
  • blk_active : blanker.c
  • blk_enabled : blanker.c
  • blk_KbdHandler : blanker.c
  • blk_lastevent : blanker.c
  • block_idx_t : kblock.h
  • BM_CLEAR : gfx_p.h
  • BM_DRAWPIXEL : gfx_p.h
  • BM_PLOT : gfx_p.h
  • BM_READPIXEL : gfx_p.h
  • BUSY_BIT : dataflash.h
  • buz_beep() : buzzer.h , buzzer.c
  • buz_init() : buzzer.h , buzzer.c
  • buz_repeat_start() : buzzer.c , buzzer.h
  • buz_repeat_stop() : buzzer.c , buzzer.h
  • buz_softint() : buzzer.c
  • BV : macros.h
  • BV16 : macros.h
  • BV32 : macros.h
  • BV8 : macros.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- c -

  • CAN0_BASE : lm3s_memmap.h
  • CAN1_BASE : lm3s_memmap.h
  • CAN2_BASE : lm3s_memmap.h
  • CAN_RX1_IRQHANDLER : stm32_ints.h
  • CAN_SCE_IRQHANDLER : stm32_ints.h
  • CFG_PWM_ENABLE_OLD_API : cfg_pwm.h
  • CFGR_ADCPRE_RESET_MASK : clock_stm32.h
  • CFGR_ADCPRE_SET_MASK : clock_stm32.h
  • CFGR_HPRE_RESET_MASK : clock_stm32.h
  • CFGR_HPRE_SET_MASK : clock_stm32.h
  • CFGR_OFFSET : clock_stm32.h
  • CFGR_PLL_MASK : clock_stm32.h
  • CFGR_PLLMull_MASK : clock_stm32.h
  • CFGR_PLLSRC_MASK : clock_stm32.h
  • CFGR_PLLXTPRE_MASK : clock_stm32.h
  • CFGR_PPRE1_RESET_MASK : clock_stm32.h
  • CFGR_PPRE1_SET_MASK : clock_stm32.h
  • CFGR_PPRE2_RESET_MASK : clock_stm32.h
  • CFGR_PPRE2_SET_MASK : clock_stm32.h
  • CFGR_SW_MASK : clock_stm32.h
  • CFGR_SWS_MASK : clock_stm32.h
  • CFGR_USBPRE_BB : clock_stm32.h
  • chart_drawAxis() : charts.c , charts.h
  • chart_drawCurve() : charts.c , charts.h
  • chart_drawDots() : charts.c , charts.h
  • CHECKSUM_CHECK_IP : cfg_lwip.h
  • CHECKSUM_CHECK_TCP : cfg_lwip.h
  • CHECKSUM_CHECK_UDP : cfg_lwip.h
  • CHECKSUM_GEN_IP : cfg_lwip.h
  • CHECKSUM_GEN_TCP : cfg_lwip.h
  • CHECKSUM_GEN_UDP : cfg_lwip.h
  • cipher_block_len() : cipher.h
  • cipher_cbc_begin() : cipher.h
  • cipher_cbc_decrypt() : cipher.c , cipher.h
  • cipher_cbc_encrypt() : cipher.c , cipher.h
  • cipher_ctr_begin() : cipher.h
  • cipher_ctr_decrypt() : cipher.c , cipher.h
  • cipher_ctr_encrypt() : cipher.c , cipher.h
  • cipher_ctr_step() : cipher.c , cipher.h
  • cipher_ecb_decrypt() : cipher.h
  • cipher_ecb_encrypt() : cipher.h
  • cipher_key_len() : cipher.h
  • cipher_ofb_begin() : cipher.h
  • cipher_ofb_decrypt() : cipher.c , cipher.h
  • cipher_ofb_encrypt() : cipher.c , cipher.h
  • cipher_set_key() : cipher.h
  • cipher_set_vkey() : cipher.h
  • CKGR_DIV_0 : at91_pmc.h
  • CKGR_DIV_BYPASS : at91_pmc.h
  • CKGR_DIV_MASK : at91_pmc.h
  • CKGR_DIV_SHIFT : at91_pmc.h
  • CKGR_MAINF_MASK : at91_pmc.h
  • CKGR_MAINRDY : at91_pmc.h
  • CKGR_MCFR : at91_pmc.h , sam3_pmc.h
  • CKGR_MCFR_MAINF_MASK : sam3_pmc.h
  • CKGR_MCFR_MAINFRDY : sam3_pmc.h
  • CKGR_MCFR_OFF : at91_pmc.h
  • CKGR_MOR : at91_pmc.h , sam3_pmc.h
  • CKGR_MOR_CFDEN : sam3_pmc.h
  • CKGR_MOR_KEY : sam3_pmc.h
  • CKGR_MOR_KEY_MASK : sam3_pmc.h
  • CKGR_MOR_KEY_SHIFT : sam3_pmc.h
  • CKGR_MOR_MOSCRCEN : sam3_pmc.h
  • CKGR_MOR_MOSCRCF : sam3_pmc.h
  • CKGR_MOR_MOSCRCF_12MHZ : sam3_pmc.h
  • CKGR_MOR_MOSCRCF_4MHZ : sam3_pmc.h
  • CKGR_MOR_MOSCRCF_8MHZ : sam3_pmc.h
  • CKGR_MOR_MOSCRCF_MASK : sam3_pmc.h
  • CKGR_MOR_MOSCRCF_SHIFT : sam3_pmc.h
  • CKGR_MOR_MOSCSEL : sam3_pmc.h
  • CKGR_MOR_MOSCXTBY : sam3_pmc.h
  • CKGR_MOR_MOSCXTEN : sam3_pmc.h
  • CKGR_MOR_MOSCXTST : sam3_pmc.h
  • CKGR_MOR_MOSCXTST_MASK : sam3_pmc.h
  • CKGR_MOR_MOSCXTST_SHIFT : sam3_pmc.h
  • CKGR_MOR_OFF : at91_pmc.h
  • CKGR_MOR_WAITMODE : sam3_pmc.h
  • CKGR_MOSCEN : at91_pmc.h
  • CKGR_MUL_MASK : at91_pmc.h
  • CKGR_MUL_SHIFT : at91_pmc.h
  • CKGR_OSCBYPASS : at91_pmc.h
  • CKGR_OSCOUNT_MASK : at91_pmc.h
  • CKGR_OSCOUNT_SHIFT : at91_pmc.h
  • CKGR_OUT_0 : at91_pmc.h
  • CKGR_OUT_1 : at91_pmc.h
  • CKGR_OUT_2 : at91_pmc.h
  • CKGR_OUT_3 : at91_pmc.h
  • CKGR_OUT_MASK : at91_pmc.h
  • CKGR_PLLCOUNT_MASK : at91_pmc.h
  • CKGR_PLLCOUNT_SHIFT : at91_pmc.h
  • CKGR_PLLR : at91_pmc.h
  • CKGR_PLLR_DIV : sam3_pmc.h
  • CKGR_PLLR_DIV_MASK : sam3_pmc.h
  • CKGR_PLLR_MUL : sam3_pmc.h
  • CKGR_PLLR_MUL_MASK : sam3_pmc.h
  • CKGR_PLLR_MUL_SHIFT : sam3_pmc.h
  • CKGR_PLLR_OFF : at91_pmc.h
  • CKGR_PLLR_PLLCOUNT : sam3_pmc.h
  • CKGR_PLLR_PLLCOUNT_MASK : sam3_pmc.h
  • CKGR_PLLR_PLLCOUNT_SHIFT : sam3_pmc.h
  • CKGR_PLLR_STUCKTO1 : sam3_pmc.h
  • CKGR_USBDIV_1 : at91_pmc.h
  • CKGR_USBDIV_2 : at91_pmc.h
  • CKGR_USBDIV_4 : at91_pmc.h
  • CKGR_USBDIV_MASK : at91_pmc.h
  • CLASS_IS_DUSTDEVIL : lm3s_types.h
  • CLASS_IS_FURY : lm3s_types.h
  • CLASS_IS_SANDSTORM : lm3s_types.h
  • CLASS_IS_TEMPEST : lm3s_types.h
  • CLOCKS2TIME : ramp.h
  • CmdFuncPtr : parser.h
  • CMP_BIT : dataflash.h
  • COMP_ACCTL0_ASRCP_M : lm3s_com.h
  • COMP_ACCTL0_ASRCP_PIN : lm3s_com.h
  • COMP_ACCTL0_ASRCP_PIN0 : lm3s_com.h
  • COMP_ACCTL0_ASRCP_REF : lm3s_com.h
  • COMP_ACCTL0_CINV : lm3s_com.h
  • COMP_ACCTL0_ISEN_BOTH : lm3s_com.h
  • COMP_ACCTL0_ISEN_FALL : lm3s_com.h
  • COMP_ACCTL0_ISEN_LEVEL : lm3s_com.h
  • COMP_ACCTL0_ISEN_M : lm3s_com.h
  • COMP_ACCTL0_ISEN_RISE : lm3s_com.h
  • COMP_ACCTL0_ISLVAL : lm3s_com.h
  • COMP_ACCTL0_R : lm3s_com.h
  • COMP_ACCTL0_TOEN : lm3s_com.h
  • COMP_ACCTL0_TSEN_BOTH : lm3s_com.h
  • COMP_ACCTL0_TSEN_FALL : lm3s_com.h
  • COMP_ACCTL0_TSEN_LEVEL : lm3s_com.h
  • COMP_ACCTL0_TSEN_M : lm3s_com.h
  • COMP_ACCTL0_TSEN_RISE : lm3s_com.h
  • COMP_ACCTL0_TSLVAL : lm3s_com.h
  • COMP_ACCTL1_ASRCP_M : lm3s_com.h
  • COMP_ACCTL1_ASRCP_PIN : lm3s_com.h
  • COMP_ACCTL1_ASRCP_PIN0 : lm3s_com.h
  • COMP_ACCTL1_ASRCP_REF : lm3s_com.h
  • COMP_ACCTL1_CINV : lm3s_com.h
  • COMP_ACCTL1_ISEN_BOTH : lm3s_com.h
  • COMP_ACCTL1_ISEN_FALL : lm3s_com.h
  • COMP_ACCTL1_ISEN_LEVEL : lm3s_com.h
  • COMP_ACCTL1_ISEN_M : lm3s_com.h
  • COMP_ACCTL1_ISEN_RISE : lm3s_com.h
  • COMP_ACCTL1_ISLVAL : lm3s_com.h
  • COMP_ACCTL1_R : lm3s_com.h
  • COMP_ACCTL1_TOEN : lm3s_com.h
  • COMP_ACCTL1_TSEN_BOTH : lm3s_com.h
  • COMP_ACCTL1_TSEN_FALL : lm3s_com.h
  • COMP_ACCTL1_TSEN_LEVEL : lm3s_com.h
  • COMP_ACCTL1_TSEN_M : lm3s_com.h
  • COMP_ACCTL1_TSEN_RISE : lm3s_com.h
  • COMP_ACCTL1_TSLVAL : lm3s_com.h
  • COMP_ACCTL2_ASRCP_M : lm3s_com.h
  • COMP_ACCTL2_ASRCP_PIN : lm3s_com.h
  • COMP_ACCTL2_ASRCP_PIN0 : lm3s_com.h
  • COMP_ACCTL2_ASRCP_REF : lm3s_com.h
  • COMP_ACCTL2_CINV : lm3s_com.h
  • COMP_ACCTL2_ISEN_BOTH : lm3s_com.h
  • COMP_ACCTL2_ISEN_FALL : lm3s_com.h
  • COMP_ACCTL2_ISEN_LEVEL : lm3s_com.h
  • COMP_ACCTL2_ISEN_M : lm3s_com.h
  • COMP_ACCTL2_ISEN_RISE : lm3s_com.h
  • COMP_ACCTL2_ISLVAL : lm3s_com.h
  • COMP_ACCTL2_R : lm3s_com.h
  • COMP_ACCTL2_TOEN : lm3s_com.h
  • COMP_ACCTL2_TSEN_BOTH : lm3s_com.h
  • COMP_ACCTL2_TSEN_FALL : lm3s_com.h
  • COMP_ACCTL2_TSEN_LEVEL : lm3s_com.h
  • COMP_ACCTL2_TSEN_M : lm3s_com.h
  • COMP_ACCTL2_TSEN_RISE : lm3s_com.h
  • COMP_ACCTL2_TSLVAL : lm3s_com.h
  • COMP_ACINTEN_IN0 : lm3s_com.h
  • COMP_ACINTEN_IN1 : lm3s_com.h
  • COMP_ACINTEN_IN2 : lm3s_com.h
  • COMP_ACINTEN_R : lm3s_com.h
  • COMP_ACMIS_IN0 : lm3s_com.h
  • COMP_ACMIS_IN1 : lm3s_com.h
  • COMP_ACMIS_IN2 : lm3s_com.h
  • COMP_ACMIS_R : lm3s_com.h
  • COMP_ACREFCTL_EN : lm3s_com.h
  • COMP_ACREFCTL_R : lm3s_com.h
  • COMP_ACREFCTL_RNG : lm3s_com.h
  • COMP_ACREFCTL_VREF_M : lm3s_com.h
  • COMP_ACREFCTL_VREF_S : lm3s_com.h
  • COMP_ACRIS_IN0 : lm3s_com.h
  • COMP_ACRIS_IN1 : lm3s_com.h
  • COMP_ACRIS_IN2 : lm3s_com.h
  • COMP_ACRIS_R : lm3s_com.h
  • COMP_ACSTAT0_OVAL : lm3s_com.h
  • COMP_ACSTAT0_R : lm3s_com.h
  • COMP_ACSTAT1_OVAL : lm3s_com.h
  • COMP_ACSTAT1_R : lm3s_com.h
  • COMP_ACSTAT2_OVAL : lm3s_com.h
  • COMP_ACSTAT2_R : lm3s_com.h
  • COMP_BASE : lm3s_memmap.h
  • COMPILER_STATEMENT_EXPRESSIONS : compiler.h
  • COMPILER_TYPEOF : compiler.h
  • COMPILER_VARIADIC_MACROS : compiler.h
  • complete_word() : readline.c
  • COMPUTE_ARRAY_LEN : md2.h
  • computeFcs() : battfs.c
  • CONFIG_ADC_AVR_DIVISOR : cfg_adc.h
  • CONFIG_ADC_AVR_REF : cfg_adc.h
  • CONFIG_ADC_CLOCK : cfg_adc.h
  • CONFIG_ADC_SHTIME : cfg_adc.h
  • CONFIG_ADC_STARTUP_TIME : cfg_adc.h
  • CONFIG_ADC_STROBE : cfg_adc.h
  • CONFIG_ADC_STTLING : cfg_adc.h
  • CONFIG_ADC_SUT : cfg_adc.h
  • CONFIG_ADC_TRACKTIM : cfg_adc.h
  • CONFIG_ADC_TRANSFER : cfg_adc.h
  • CONFIG_AFSK_DAC_SAMPLERATE : cfg_afsk.h
  • CONFIG_AFSK_FILTER : cfg_afsk.h
  • CONFIG_AFSK_PREAMBLE_LEN : cfg_afsk.h
  • CONFIG_AFSK_RX_BUFLEN : cfg_afsk.h
  • CONFIG_AFSK_RXTIMEOUT : cfg_afsk.h
  • CONFIG_AFSK_TRAILER_LEN : cfg_afsk.h
  • CONFIG_AFSK_TX_BUFLEN : cfg_afsk.h
  • CONFIG_AX25_FRAME_BUF_LEN : cfg_ax25.h
  • CONFIG_AX25_RPT_LST : cfg_ax25.h
  • CONFIG_BATTFS_SHUFFLE_FREE_PAGES : cfg_battfs.h
  • CONFIG_BITMAP_FMT : cfg_gfx.h
  • CONFIG_BOOT_LOG_FORMAT : cfg_boot.h
  • CONFIG_BOOT_LOG_LEVEL : cfg_boot.h
  • CONFIG_CHART_TYPE_X : gfx.h
  • CONFIG_CHART_TYPE_Y : gfx.h
  • CONFIG_CTX_DEBUG_BAUDRATE : cfg_context_switch.h
  • CONFIG_CTX_DEBUG_PORT : cfg_context_switch.h
  • CONFIG_DAC_REFRESH : cfg_dac.h
  • CONFIG_DAC_STARTUP : cfg_dac.h
  • CONFIG_DAC_TIMER : cfg_dac.h
  • CONFIG_DC_MOTOR_MAX_SPEED : cfg_dc_motor.h
  • CONFIG_DC_MOTOR_MIN_SPEED : cfg_dc_motor.h
  • CONFIG_DC_MOTOR_SAMPLE_DELAY : cfg_dc_motor.h
  • CONFIG_DC_MOTOR_SAMPLE_PERIOD : cfg_dc_motor.h
  • CONFIG_DC_MOTOR_USE_SEM : cfg_dc_motor.h
  • CONFIG_DEPEND : depend.h
  • CONFIG_EEPROM_DISABLE_OLD_API : cfg_eeprom.h
  • CONFIG_ENABLE_COMPAT_BEHAVIOUR : cfg_parser.h
  • CONFIG_ENTROPY_NUM_SOURCES : entropy.h
  • CONFIG_EP0_MAX_SIZE : cfg_usb.h
  • CONFIG_FAST_MEM : cfg_attr.h
  • CONFIG_FAT_CODE_PAGE : cfg_fat.h
  • CONFIG_FAT_DRIVES : cfg_fat.h
  • CONFIG_FAT_FS_MINIMIZE : cfg_fat.h
  • CONFIG_FAT_FS_READONLY : cfg_fat.h
  • CONFIG_FAT_FS_TINY : cfg_fat.h
  • CONFIG_FAT_MAX_LFN : cfg_fat.h
  • CONFIG_FAT_MAX_SS : cfg_fat.h
  • CONFIG_FAT_MULTI_PARTITION : cfg_fat.h
  • CONFIG_FAT_USE_FORWARD : cfg_fat.h
  • CONFIG_FAT_USE_LFN : cfg_fat.h
  • CONFIG_FAT_USE_MKFS : cfg_fat.h
  • CONFIG_FAT_USE_STRFUNC : cfg_fat.h
  • CONFIG_FAT_WORD_ACCESS : cfg_fat.h
  • CONFIG_FLASH25 : cfg_flash25.h
  • CONFIG_FLASH_DISABLE_OLD_API : cfg_emb_flash.h
  • CONFIG_FLASH_EMB_LOG_FORMAT : cfg_emb_flash.h
  • CONFIG_FLASH_EMB_LOG_LEVEL : cfg_emb_flash.h
  • CONFIG_FLASH_WR_TIMEOUT : cfg_emb_flash.h
  • CONFIG_FRMWRI_BUFSIZE : cfg_formatwr.h
  • CONFIG_GFX_CLIPPING : cfg_gfx.h
  • CONFIG_GFX_TEXT : cfg_gfx.h
  • CONFIG_GFX_VCOORDS : cfg_gfx.h
  • CONFIG_HEAP_MALLOC : cfg_heap.h
  • CONFIG_HT_OPTIONAL_INTERNAL_KEY : cfg_hashtable.h
  • CONFIG_I2C_DISABLE_OLD_API : cfg_i2c.h
  • CONFIG_I2C_FREQ : cfg_i2c.h
  • CONFIG_I2C_START_TIMEOUT : cfg_i2c.h
  • CONFIG_INI_MAX_LINE_LEN : cfg_ini_reader.h
  • CONFIG_ISAAC_RANDSIZL : isaac.h
  • CONFIG_KBD_BEEP : cfg_kbd.h
  • CONFIG_KBD_LONGPRESS : cfg_kbd.h
  • CONFIG_KBD_OBSERVER : cfg_kbd.h
  • CONFIG_KBD_POLL : cfg_kbd.h
  • CONFIG_KBD_SCHED : cfg_kbd.h
  • CONFIG_KDEBUG_BAUDRATE : cfg_debug.h
  • CONFIG_KDEBUG_CLOCK_FREQ : cfg_debug.h
  • CONFIG_KDEBUG_CLOCK_SOURCE : cfg_debug.h
  • CONFIG_KDEBUG_PORT : cfg_debug.h
  • CONFIG_KERN : cfg_proc.h
  • CONFIG_KERN_HEAP : cfg_proc.h
  • CONFIG_KERN_HEAP_SIZE : cfg_proc.h
  • CONFIG_KERN_IRQ : cfg_proc.h
  • CONFIG_KERN_MONITOR : cfg_monitor.h
  • CONFIG_KERN_PREEMPT : cfg_proc.h
  • CONFIG_KERN_PRI : cfg_proc.h
  • CONFIG_KERN_QUANTUM : cfg_proc.h
  • CONFIG_KERN_SCHED : cfg_kern.h
  • CONFIG_KERN_SEMAPHORES : cfg_sem.h
  • CONFIG_KERN_SIGNALS : cfg_signal.h
  • CONFIG_KEYTAG_LOG_FORMAT : cfg_keytag.h
  • CONFIG_KEYTAG_LOG_LEVEL : cfg_keytag.h
  • CONFIG_KFILE_GETS : cfg_kfile.h
  • CONFIG_LCD_4BIT : cfg_lcd_hd44.h
  • CONFIG_LCD_ADDRESS_FAST : cfg_lcd_hd44.h
  • CONFIG_LCD_COLS : cfg_lcd_hd44.h
  • CONFIG_LCD_REFRESH : cfg_lcd_32122a.h
  • CONFIG_LCD_ROWS : cfg_lcd_hd44.h
  • CONFIG_LCD_SOFTINT_REFRESH : cfg_lcd_32122a.h
  • CONFIG_LCD_WAIT : cfg_lcd_32122a.h
  • CONFIG_LED_7SEG_CCAT : cfg_led_7seg.h
  • CONFIG_LED_7SEG_DIGIT : cfg_led_7seg.h
  • CONFIG_LED_7SEG_RTIME : cfg_led_7seg.h
  • CONFIG_LED_7SEG_SSPEED : cfg_led_7seg.h
  • CONFIG_LED_7SEG_STRLEN : cfg_led_7seg.h
  • CONFIG_LEVELEDIT_TIMEOUT : cfg_menu.h
  • CONFIG_MAX_COMMANDS_NUMBER : cfg_parser.h
  • CONFIG_MD2_BLOCK_LEN : cfg_md2.h
  • CONFIG_MD2_STD_PERM : cfg_md2.h
  • CONFIG_MENU_MENUBAR : cfg_menu.h
  • CONFIG_MENU_SMOOTH : cfg_menu.h
  • CONFIG_MENU_TIMEOUT : cfg_menu.h
  • CONFIG_MT29F_LOG_FORMAT : cfg_mt29f.h
  • CONFIG_MT29F_LOG_LEVEL : cfg_mt29f.h
  • CONFIG_NMEAP_MAX_SENTENCE_LENGTH : cfg_nmea.h
  • CONFIG_NMEAP_MAX_SENTENCES : cfg_nmea.h
  • CONFIG_NMEAP_MAX_TOKENS : cfg_nmea.h
  • CONFIG_NTC_LOG_FORMAT : cfg_ntc.h
  • CONFIG_NTC_LOG_LEVEL : cfg_ntc.h
  • CONFIG_NUM_BLDS : cfg_buzzerled.h
  • CONFIG_NUM_DC_MOTOR : cfg_dc_motor.h
  • CONFIG_NUM_STEPPER_MOTORS : cfg_stepper.h
  • CONFIG_PARSER_MAX_ARGS : cfg_parser.h
  • CONFIG_PLAY_BUF_LEN : cfg_i2s.h
  • CONFIG_POCKETBUS_BUFLEN : cfg_pocketbus.h
  • CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT : cfg_pocketbus.h
  • CONFIG_PRINTF : cfg_formatwr.h
  • CONFIG_PRINTF_N_FORMATTER : formatwr.c
  • CONFIG_PRINTF_OCTAL_FORMATTER : formatwr.c
  • CONFIG_PRINTF_RETURN_COUNT : formatwr.h
  • CONFIG_RANDPOOL_TIMER : cfg_randpool.h
  • CONFIG_SAMPLE_FREQ : cfg_i2s.h
  • CONFIG_SD_AUTOASSIGN_FAT : cfg_sd.h
  • CONFIG_SD_OLD_INIT : cfg_sd.h
  • CONFIG_SER_DEFBAUDRATE : cfg_ser.h
  • CONFIG_SER_HWHANDSHAKE : cfg_ser.h
  • CONFIG_SER_RXTIMEOUT : cfg_ser.h
  • CONFIG_SER_STROBE : cfg_ser.h
  • CONFIG_SER_TXTIMEOUT : cfg_ser.h
  • CONFIG_SIZE_ENTROPY_POOL : cfg_randpool.h
  • CONFIG_SPI0_RXBUFSIZE : cfg_ser.h
  • CONFIG_SPI0_TXBUFSIZE : cfg_ser.h
  • CONFIG_SPI1_RXBUFSIZE : cfg_ser.h
  • CONFIG_SPI1_TXBUFSIZE : cfg_ser.h
  • CONFIG_SPI_CLOCK_DIV : cfg_ser.h
  • CONFIG_SPI_CLOCK_PHASE : cfg_ser.h
  • CONFIG_SPI_CLOCK_POL : cfg_ser.h
  • CONFIG_SPI_DATA_ORDER : cfg_ser.h
  • CONFIG_SPI_DATAORDER : cfg_spi_bitbang.h
  • CONFIG_SPI_DMA_MAX_RX : cfg_spi_dma.h
  • CONFIG_SPI_DMA_TX_TIMEOUT : cfg_spi_dma.h
  • CONFIG_SPI_RXBUFSIZE : cfg_ser.h
  • CONFIG_SPI_TXBUFSIZE : cfg_ser.h
  • CONFIG_TAG_MAX_LEN : cfg_keytag.h
  • CONFIG_TAS_MAX_VOL : cfg_tas5706a.h
  • CONFIG_TC_STEPPER_MAX_NUM : cfg_stepper.h
  • CONFIG_THERMO_HIFI_NUM_SAMPLES : cfg_thermo.h
  • CONFIG_THERMO_INTERVAL_MS : cfg_thermo.h
  • CONFIG_THERMO_LOG_FORMAT : cfg_thermo.h
  • CONFIG_THERMO_LOG_LEVEL : cfg_thermo.h
  • CONFIG_TIMER : cfg_timer.h
  • CONFIG_TIMER_EVENTS : cfg_timer.h
  • CONFIG_TIMER_STROBE : cfg_timer.h
  • CONFIG_TIMER_UDELAY : cfg_timer.h
  • CONFIG_TRIAC_MAX_DUTY : cfg_phase.h
  • CONFIG_TRIAC_MAX_POWER : cfg_phase.h
  • CONFIG_UART0_RXBUFSIZE : cfg_ser.h
  • CONFIG_UART0_TXBUFSIZE : cfg_ser.h
  • CONFIG_UART1_RXBUFSIZE : cfg_ser.h
  • CONFIG_UART1_TXBUFSIZE : cfg_ser.h
  • CONFIG_UART2_RXBUFSIZE : cfg_ser.h
  • CONFIG_UART2_TXBUFSIZE : cfg_ser.h
  • CONFIG_UART3_RXBUFSIZE : cfg_ser.h
  • CONFIG_UART3_TXBUFSIZE : cfg_ser.h
  • CONFIG_USB_BUFSIZE : cfg_usb.h
  • CONFIG_USB_EP_MAX : cfg_usb.h
  • CONFIG_USB_INTERFACE_MAX : cfg_usb.h
  • CONFIG_USBKBD : cfg_usbkbd.h
  • CONFIG_USBMOUSE : cfg_usbmouse.h
  • CONFIG_USBSER : cfg_usbser.h
  • CONFIG_USE_HP_TIMER : cfg_context_switch.h
  • CONFIG_USE_LED : cfg_context_switch.h
  • CONFIG_WATCHDOG : cfg_wdt.h
  • CONFIG_XMODEM_1KCRC : cfg_xmodem.h
  • CONFIG_XMODEM_LOG_FORMAT : cfg_xmodem.h
  • CONFIG_XMODEM_LOG_LEVEL : cfg_xmodem.h
  • CONFIG_XMODEM_MAXCRCRETRIES : cfg_xmodem.h
  • CONFIG_XMODEM_MAXRETRIES : cfg_xmodem.h
  • CONFIG_XMODEM_RECV : cfg_xmodem.h
  • CONFIG_XMODEM_SEND : cfg_xmodem.h
  • const_dval_t : dtag.h
  • const_iptr_t : compiler.h
  • containerof : compiler.h
  • coord_t : gfx.h
  • countDiskFilePages() : battfs.c
  • countFileSize() : battfs.c
  • countof : compiler.h
  • countPages() : battfs.c
  • CPIV_MASK : at91_pit.h
  • CPIV_SHIFT : at91_pit.h
  • CPU_CREATE_NEW_STACK : frame.h
  • CPU_CSOURCE : attr.h
  • CPU_HEADER : attr.h
  • CPU_IDLE : frame.h
  • cpu_pause() : power.h
  • CPU_PAUSE_ON : power.h
  • CPU_REG_INIT_VALUE : frame.h
  • cpu_relax() : power.h
  • CR_CSSON_BB : clock_stm32.h
  • CR_HSEBYP_RESET : clock_stm32.h
  • CR_HSEBYP_SET : clock_stm32.h
  • CR_HSEON_RESET : clock_stm32.h
  • CR_HSEON_SET : clock_stm32.h
  • CR_HSION_BB : clock_stm32.h
  • CR_HSITRIM_MASK : clock_stm32.h
  • CR_OFFSET : clock_stm32.h
  • CR_PLLON_BB : clock_stm32.h
  • crc16() : crc.c , crc.h
  • CRC16_INIT_VAL : crc.h
  • crc_ccitt() : crc_ccitt.c , crc_ccitt.h
  • CRC_CCITT_INIT_VAL : crc_ccitt.h
  • CRC_TABLE : crc.c
  • CS : hw_spi.h
  • CS_DISABLE : hw_spi.h
  • CS_ENABLE : hw_spi.h
  • CS_HIGH : hw_spi.h
  • CS_LOW : hw_spi.h
  • CS_OUT : hw_spi.h
  • CS_TOGGLE() : dataflash.c
  • CSR_LSION_BB : clock_stm32.h
  • CSR_OFFSET : clock_stm32.h
  • CSR_RVMF_SET : clock_stm32.h
  • CSSON_BITNUMBER : clock_stm32.h
  • current_process : proc.c , proc_p.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- d -

  • DAC_LOG_FORMAT : cfg_dac.h
  • DAC_LOG_LEVEL : cfg_dac.h
  • DAC_MAXCH : dac_sam3.h
  • DACC_BASE : sam3_dacc.h
  • DACC_CDR : sam3_dacc.h
  • DACC_CDR_OFF : sam3_dacc.h
  • DACC_CH0 : sam3_dacc.h
  • DACC_CH1 : sam3_dacc.h
  • DACC_CHDR : sam3_dacc.h
  • DACC_CHDR_OFF : sam3_dacc.h
  • DACC_CHER : sam3_dacc.h
  • DACC_CHER_OFF : sam3_dacc.h
  • DACC_CHSR : sam3_dacc.h
  • DACC_CHSR_OFF : sam3_dacc.h
  • DACC_CR : sam3_dacc.h
  • DACC_CR_OFF : sam3_dacc.h
  • DACC_ENDTX : sam3_dacc.h
  • DACC_EOC : sam3_dacc.h
  • DACC_FASTWKUP : sam3_dacc.h
  • DACC_IDR : sam3_dacc.h
  • DACC_IDR_OFF : sam3_dacc.h
  • DACC_IER : sam3_dacc.h
  • DACC_IER_OFF : sam3_dacc.h
  • DACC_IMR : sam3_dacc.h
  • DACC_IMR_OFF : sam3_dacc.h
  • DACC_ISR : sam3_dacc.h
  • DACC_ISR_OFF : sam3_dacc.h
  • DACC_MAXS : sam3_dacc.h
  • DACC_MR : sam3_dacc.h
  • DACC_MR_OFF : sam3_dacc.h
  • DACC_MR_STARTUP_0 : sam3_dacc.h
  • DACC_MR_STARTUP_1024 : sam3_dacc.h
  • DACC_MR_STARTUP_1088 : sam3_dacc.h
  • DACC_MR_STARTUP_112 : sam3_dacc.h
  • DACC_MR_STARTUP_1152 : sam3_dacc.h
  • DACC_MR_STARTUP_1216 : sam3_dacc.h
  • DACC_MR_STARTUP_1280 : sam3_dacc.h
  • DACC_MR_STARTUP_1344 : sam3_dacc.h
  • DACC_MR_STARTUP_1408 : sam3_dacc.h
  • DACC_MR_STARTUP_1472 : sam3_dacc.h
  • DACC_MR_STARTUP_1536 : sam3_dacc.h
  • DACC_MR_STARTUP_16 : sam3_dacc.h
  • DACC_MR_STARTUP_1600 : sam3_dacc.h
  • DACC_MR_STARTUP_1664 : sam3_dacc.h
  • DACC_MR_STARTUP_1728 : sam3_dacc.h
  • DACC_MR_STARTUP_1792 : sam3_dacc.h
  • DACC_MR_STARTUP_1856 : sam3_dacc.h
  • DACC_MR_STARTUP_1920 : sam3_dacc.h
  • DACC_MR_STARTUP_1984 : sam3_dacc.h
  • DACC_MR_STARTUP_24 : sam3_dacc.h
  • DACC_MR_STARTUP_512 : sam3_dacc.h
  • DACC_MR_STARTUP_576 : sam3_dacc.h
  • DACC_MR_STARTUP_64 : sam3_dacc.h
  • DACC_MR_STARTUP_640 : sam3_dacc.h
  • DACC_MR_STARTUP_704 : sam3_dacc.h
  • DACC_MR_STARTUP_768 : sam3_dacc.h
  • DACC_MR_STARTUP_8 : sam3_dacc.h
  • DACC_MR_STARTUP_80 : sam3_dacc.h
  • DACC_MR_STARTUP_832 : sam3_dacc.h
  • DACC_MR_STARTUP_896 : sam3_dacc.h
  • DACC_MR_STARTUP_96 : sam3_dacc.h
  • DACC_MR_STARTUP_960 : sam3_dacc.h
  • DACC_PTCR : sam3_dacc.h
  • DACC_PTCR_OFF : sam3_dacc.h
  • DACC_PTCR_RXTDIS : sam3_dacc.h
  • DACC_PTCR_RXTEN : sam3_dacc.h
  • DACC_PTCR_TXTDIS : sam3_dacc.h
  • DACC_PTCR_TXTEN : sam3_dacc.h
  • DACC_PTSR : sam3_dacc.h
  • DACC_PTSR_OFF : sam3_dacc.h
  • DACC_PTSR_RXTEN : sam3_dacc.h
  • DACC_PTSR_TXTEN : sam3_dacc.h
  • DACC_RCR : sam3_dacc.h
  • DACC_RCR_OFF : sam3_dacc.h
  • DACC_REFRESH_MASK : sam3_dacc.h
  • DACC_REFRESH_SHIFT : sam3_dacc.h
  • DACC_RNCR : sam3_dacc.h
  • DACC_RNCR_OFF : sam3_dacc.h
  • DACC_RNPR : sam3_dacc.h
  • DACC_RNPR_OFF : sam3_dacc.h
  • DACC_RPR : sam3_dacc.h
  • DACC_RPR_OFF : sam3_dacc.h
  • DACC_SLEEP : sam3_dacc.h
  • DACC_STARTUP_MASK : sam3_dacc.h
  • DACC_STARTUP_SHIFT : sam3_dacc.h
  • DACC_SWRST : sam3_dacc.h
  • DACC_TAG : sam3_dacc.h
  • DACC_TCR : sam3_dacc.h
  • DACC_TCR_OFF : sam3_dacc.h
  • DACC_TNCR : sam3_dacc.h
  • DACC_TNCR_OFF : sam3_dacc.h
  • DACC_TNPR : sam3_dacc.h
  • DACC_TNPR_OFF : sam3_dacc.h
  • DACC_TPR : sam3_dacc.h
  • DACC_TPR_OFF : sam3_dacc.h
  • DACC_TRGEN : sam3_dacc.h
  • DACC_TRGSEL_MASK : sam3_dacc.h
  • DACC_TRGSEL_PWM0 : sam3_dacc.h
  • DACC_TRGSEL_PWM1 : sam3_dacc.h
  • DACC_TRGSEL_SHIFT : sam3_dacc.h
  • DACC_TRGSEL_TIO_CH0 : sam3_dacc.h
  • DACC_TRGSEL_TIO_CH1 : sam3_dacc.h
  • DACC_TRGSEL_TIO_CH2 : sam3_dacc.h
  • DACC_TXBUFE : sam3_dacc.h
  • DACC_TXRDY : sam3_dacc.h
  • DACC_USER_SEL_MASK : sam3_dacc.h
  • DACC_USER_SEL_SHIFT : sam3_dacc.h
  • DACC_WORD : sam3_dacc.h
  • DATAFLASH_CAST() : dataflash.h
  • dataflash_close() : dataflash.c
  • dataflash_cmd() : dataflash.c
  • dataflash_flush() : dataflash.c
  • dataflash_hw_init() : hw_dataflash.c , hw_dataflash.h
  • dataflash_hw_setCS() : hw_dataflash.c , hw_dataflash.h
  • dataflash_hw_setReset() : hw_dataflash.c , hw_dataflash.h
  • dataflash_init() : dataflash.c , dataflash.h
  • dataflash_loadPage() : dataflash.c
  • DATAFLASH_LOG_FORMAT : cfg_dataflash.h
  • DATAFLASH_LOG_LEVEL : cfg_dataflash.h
  • dataflash_offset_t : dataflash.h
  • dataflash_page_t : dataflash.h
  • dataflash_read() : dataflash.c
  • dataflash_readBlock() : dataflash.c
  • dataflash_reopen() : dataflash.c
  • dataflash_reset() : dataflash.c
  • dataflash_size_t : dataflash.h
  • dataflash_stat() : dataflash.c
  • dataflash_testRun() : dataflash.h , dataflash_hwtest.c
  • dataflash_testSetup() : dataflash.h , dataflash_hwtest.c
  • dataflash_testTearDown() : dataflash.h , dataflash_hwtest.c
  • dataflash_write() : dataflash.c
  • dataflash_writeBlock() : dataflash.c
  • DataFlashOpcode : dataflash.h
  • DataflashType : dataflash.h
  • DB : debug.h
  • DBGMCU_BASE : stm32_memmap.h
  • DBGU_BRGR : at91_dbgu.h
  • DBGU_CIDR : at91_dbgu.h
  • DBGU_CIDR_OFF : at91_dbgu.h
  • DBGU_CR : at91_dbgu.h
  • DBGU_EXID : at91_dbgu.h
  • DBGU_EXID_OFF : at91_dbgu.h
  • DBGU_FNR : at91_dbgu.h
  • DBGU_FNR_OFF : at91_dbgu.h
  • DBGU_IDR : at91_dbgu.h
  • DBGU_IER : at91_dbgu.h
  • DBGU_IMR : at91_dbgu.h
  • DBGU_MR : at91_dbgu.h
  • DBGU_RHR : at91_dbgu.h
  • DBGU_SR : at91_dbgu.h
  • DBGU_THR : at91_dbgu.h
  • DC_MOTOR_ACTIVE : dc_motor.c
  • DC_MOTOR_DIR : dc_motor.c
  • dc_motor_enable() : dc_motor.c , dc_motor.h
  • dc_motor_init() : dc_motor.c , dc_motor.h
  • DC_MOTOR_LOG_FORMAT : cfg_dc_motor.h
  • DC_MOTOR_LOG_LEVEL : cfg_dc_motor.h
  • DC_MOTOR_NO_DEV_SPEED : dc_motor.h
  • DC_MOTOR_NO_EXPIRE : dc_motor.h
  • dc_motor_poll() : dc_motor.c
  • dc_motor_readTargetSpeed() : dc_motor.c , dc_motor.h
  • dc_motor_setDir() : dc_motor.c , dc_motor.h
  • dc_motor_setPriority() : dc_motor.c , dc_motor.h
  • dc_motor_setSpeed() : dc_motor.c , dc_motor.h
  • dc_motor_setup() : dc_motor.c , dc_motor.h
  • dc_motor_startTimer() : dc_motor.c , dc_motor.h
  • dc_motor_testSetUp() : dc_motor.h , dc_motor_hwtest.c
  • dc_speed_t : dc_motor.h
  • dcm_all : dc_motor.c
  • DCONNECT : dnotifier.h
  • dcontext_t : dwidget.h
  • DEAFSTEPS_DEFAULT : stepper.h
  • DEBUG_DUMP_HISTORY : readline.c
  • DEBUG_UNIT_TEST : readline.c
  • DECLARE_HASHTABLE : hashtable.h
  • DECLARE_HASHTABLE_STATIC : hashtable.h , parser.c
  • DECLARE_ISR() : ser_mega.c , ser_sam3.c , ser_mega.c , ser_at91.c , ser_mega.c , ser_sam3.c , ser_at91.c , adc_sam3.c
  • DECLARE_ISR_CONTEXT_SWITCH() : sysirq_at91.c
  • DECLARE_LIST_TYPE : list.h
  • DECLARE_NODE_ANON : list.h
  • DECLARE_NODE_TYPE : list.h
  • DECLARE_POOL : pool.h
  • DECLARE_POOL_STATIC : pool.h
  • DEFAULT_ACCEPTMBOX_SIZE : cfg_lwip.h
  • default_font : font.h
  • DEFAULT_RAW_RECVMBOX_SIZE : cfg_lwip.h
  • DEFAULT_TCP_RECVMBOX_SIZE : cfg_lwip.h
  • DEFAULT_THREAD_NAME : cfg_lwip.h
  • DEFAULT_THREAD_PRIO : cfg_lwip.h
  • DEFAULT_THREAD_STACKSIZE : cfg_lwip.h
  • DEFAULT_UDP_RECVMBOX_SIZE : cfg_lwip.h
  • DEFINE_TIMER_ISR : timer_lpc2.h
  • DEFINE_USB_STRING : usb.h
  • DEFINE_ZEROCROSS_ISR() : phase.c
  • DEG_T_TO_DECIMALDEG : ntc.h
  • DEG_T_TO_FLOATDEG : ntc.h
  • DEG_T_TO_INTDEG : ntc.h
  • DEG_TO_DEG_T : ntc.h
  • DELTA : tea.h
  • devs : thermo.c
  • dfilter_mask_t : dnotifier.h
  • DFO_ARW_MEM_TR_BUFF1 : dataflash.h
  • DFO_ARW_MEM_TR_BUFF2 : dataflash.h
  • DFO_CMP_MEM_TO_BUFF1 : dataflash.h
  • DFO_CMP_MEM_TO_BUFF2 : dataflash.h
  • DFO_ERASE_BLOCK : dataflash.h
  • DFO_ERASE_PAGE : dataflash.h
  • DFO_ERASE_SECTOR : dataflash.h
  • DFO_ID_DEV : dataflash.h
  • DFO_MOV_MEM_TO_BUFF1 : dataflash.h
  • DFO_MOV_MEM_TO_BUFF2 : dataflash.h
  • DFO_PWR_DOWN : dataflash.h
  • DFO_READ_BUFF1 : dataflash.h
  • DFO_READ_BUFF2 : dataflash.h
  • DFO_READ_FLASH_MEM : dataflash.h
  • DFO_READ_FLASH_MEM_BYTE_B : dataflash.h
  • DFO_READ_FLASH_MEM_BYTE_D : dataflash.h
  • DFO_READ_STATUS : dataflash.h
  • DFO_RESUME_PWR_DOWN : dataflash.h
  • DFO_WRITE_BUFF1 : dataflash.h
  • DFO_WRITE_BUFF1_TO_MEM : dataflash.h
  • DFO_WRITE_BUFF1_TO_MEM_E : dataflash.h
  • DFO_WRITE_BUFF2 : dataflash.h
  • DFO_WRITE_BUFF2_TO_MEM : dataflash.h
  • DFO_WRITE_BUFF2_TO_MEM_E : dataflash.h
  • DFO_WRITE_MEM_TR_BUFF1 : dataflash.h
  • DFO_WRITE_MEM_TR_BUFF2 : dataflash.h
  • DHCP_DEBUG : cfg_lwip.h
  • DHCP_DOES_ARP_CHECK : cfg_lwip.h
  • DIR_NEGATIVE : stepper.h
  • DIR_NONE : stepper.h
  • DIR_POSITIVE : stepper.h
  • disk_size_t : battfs.h
  • disk_to_battfs() : battfs.c
  • display_callback : leveledit.h
  • DIV_ROUND : macros.h
  • DIV_ROUNDUP : macros.h
  • DMACHANNEL1_IRQHANDLER : stm32_ints.h
  • DMACHANNEL2_IRQHANDLER : stm32_ints.h
  • DMACHANNEL3_IRQHANDLER : stm32_ints.h
  • DMACHANNEL4_IRQHANDLER : stm32_ints.h
  • DMACHANNEL5_IRQHANDLER : stm32_ints.h
  • DMACHANNEL6_IRQHANDLER : stm32_ints.h
  • DMACHANNEL7_IRQHANDLER : stm32_ints.h
  • dnotify() : dnotifier.h
  • dnotify_targets() : dnotifier.h
  • DNS_DEBUG : cfg_lwip.h
  • DNS_DOES_NAME_CHECK : cfg_lwip.h
  • DNS_LOCAL_HOSTLIST : cfg_lwip.h
  • DNS_LOCAL_HOSTLIST_IS_DYNAMIC : cfg_lwip.h
  • DNS_MAX_NAME_LENGTH : cfg_lwip.h
  • DNS_MAX_SERVERS : cfg_lwip.h
  • DNS_MSG_SIZE : cfg_lwip.h
  • DNS_TABLE_SIZE : cfg_lwip.h
  • DNS_USES_STATIC_BUF : cfg_lwip.h
  • dpos_t : dwidget.h
  • dstyle_t : editint.h
  • dtag_t : dtag.h
  • dval_t : dtag.h
  • DWT_BASE : lm3s_memmap.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- e -

  • e2_size_t : eeprom.h
  • e2addr : eeprom.h
  • e2addr_t : eeprom.h
  • e2blk_size_t : eeprom.h
  • e2dev_addr_t : eeprom.h
  • editbool_draw() : editbool.c , editbool.h
  • editbool_init() : editbool.c , editbool.h
  • editbool_update() : editbool.c , editbool.h
  • editint_draw() : editint.c , editint.h
  • editint_init() : editint.c , editint.h
  • editint_update() : editint.c , editint.h
  • EEFC0_BASE : sam3_flash.h
  • EEFC0_FCR : sam3_flash.h
  • EEFC0_FMR : sam3_flash.h
  • EEFC0_FRR : sam3_flash.h
  • EEFC0_FSR : sam3_flash.h
  • EEFC_FCR_FARG : sam3_flash.h
  • EEFC_FCR_FARG_MASK : sam3_flash.h
  • EEFC_FCR_FARG_SHIFT : sam3_flash.h
  • EEFC_FCR_FCMD : sam3_flash.h
  • EEFC_FCR_FCMD_MASK : sam3_flash.h
  • EEFC_FCR_FKEY : sam3_flash.h
  • EEFC_FCR_FKEY_MASK : sam3_flash.h
  • EEFC_FCR_FKEY_SHIFT : sam3_flash.h
  • EEFC_FCR_OFF : sam3_flash.h
  • EEFC_FMR_FAM : sam3_flash.h
  • EEFC_FMR_FRDY : sam3_flash.h
  • EEFC_FMR_FWS : sam3_flash.h
  • EEFC_FMR_FWS_MASK : sam3_flash.h
  • EEFC_FMR_FWS_SHIFT : sam3_flash.h
  • EEFC_FMR_OFF : sam3_flash.h
  • EEFC_FRR_OFF : sam3_flash.h
  • EEFC_FSR_FCMDE : sam3_flash.h
  • EEFC_FSR_FLOCKE : sam3_flash.h
  • EEFC_FSR_FRDY : sam3_flash.h
  • EEFC_FSR_OFF : sam3_flash.h
  • EEPROM_ADDR : eeprom.c
  • EEPROM_CAST_KBLOCK() : eeprom.h
  • eeprom_erase() : eeprom.c , eeprom.h
  • EEPROM_ID : eeprom.c
  • eeprom_init_5() : eeprom.c , eeprom.h
  • EEPROM_LOG_FORMAT : cfg_eeprom.h
  • EEPROM_LOG_LEVEL : cfg_eeprom.h
  • eeprom_verify() : eeprom.c
  • EepromType : eeprom.h
  • EIMSKF_CTS : ser_mega.c , ser_xmega.c
  • EMAC_ALE : at91_emac.h
  • EMAC_ALE_OFF : at91_emac.h
  • EMAC_BEX : at91_emac.h
  • EMAC_BIG : at91_emac.h
  • EMAC_BNA : at91_emac.h
  • EMAC_BP : at91_emac.h
  • EMAC_CAF : at91_emac.h
  • EMAC_CLK : at91_emac.h
  • EMAC_CLK_HCLK_16 : at91_emac.h
  • EMAC_CLK_HCLK_32 : at91_emac.h
  • EMAC_CLK_HCLK_64 : at91_emac.h
  • EMAC_CLK_HCLK_8 : at91_emac.h
  • EMAC_CLKEN : at91_emac.h
  • EMAC_CLRSTAT : at91_emac.h
  • EMAC_CODE : at91_emac.h
  • EMAC_COL : at91_emac.h
  • EMAC_COMP : at91_emac.h
  • EMAC_CSE : at91_emac.h
  • EMAC_CSE_OFF : at91_emac.h
  • EMAC_DATA : at91_emac.h
  • EMAC_DRFCS : at91_emac.h
  • EMAC_DTF : at91_emac.h
  • EMAC_DTF_OFF : at91_emac.h
  • EMAC_ECOL : at91_emac.h
  • EMAC_ECOL_OFF : at91_emac.h
  • EMAC_EFRHD : at91_emac.h
  • EMAC_ELE : at91_emac.h
  • EMAC_ELE_OFF : at91_emac.h
  • EMAC_FCSE : at91_emac.h
  • EMAC_FCSE_OFF : at91_emac.h
  • EMAC_FD : at91_emac.h
  • EMAC_FRO : at91_emac.h
  • EMAC_FRO_OFF : at91_emac.h
  • EMAC_FTO : at91_emac.h
  • EMAC_FTO_OFF : at91_emac.h
  • EMAC_HRB : at91_emac.h
  • EMAC_HRB_OFF : at91_emac.h
  • EMAC_HRESP : at91_emac.h
  • EMAC_HRT : at91_emac.h
  • EMAC_HRT_OFF : at91_emac.h
  • EMAC_IDLE : at91_emac.h
  • EMAC_IDR : at91_emac.h
  • EMAC_IDR_OFF : at91_emac.h
  • EMAC_IER : at91_emac.h
  • EMAC_IER_OFF : at91_emac.h
  • EMAC_IMR : at91_emac.h
  • EMAC_IMR_OFF : at91_emac.h
  • EMAC_INCSTAT : at91_emac.h
  • EMAC_IRXFCS : at91_emac.h
  • EMAC_ISR : at91_emac.h
  • EMAC_ISR_OFF : at91_emac.h
  • EMAC_JFRAME : at91_emac.h
  • EMAC_LB : at91_emac.h
  • EMAC_LCOL : at91_emac.h
  • EMAC_LCOL_OFF : at91_emac.h
  • EMAC_LLB : at91_emac.h
  • EMAC_MAN : at91_emac.h
  • EMAC_MAN_OFF : at91_emac.h
  • EMAC_MCF : at91_emac.h
  • EMAC_MCF_OFF : at91_emac.h
  • EMAC_MDIO : at91_emac.h
  • EMAC_MFD : at91_emac.h
  • EMAC_MPE : at91_emac.h
  • EMAC_MTI : at91_emac.h
  • EMAC_NBC : at91_emac.h
  • EMAC_NCFGR : at91_emac.h
  • EMAC_NCFGR_OFF : at91_emac.h
  • EMAC_NCR : at91_emac.h
  • EMAC_NCR_OFF : at91_emac.h
  • EMAC_NSR : at91_emac.h
  • EMAC_NSR_OFF : at91_emac.h
  • EMAC_OVR : at91_emac.h
  • EMAC_PAE : at91_emac.h
  • EMAC_PFR : at91_emac.h
  • EMAC_PFRR : at91_emac.h
  • EMAC_PFRR_OFF : at91_emac.h
  • EMAC_PHYA : at91_emac.h
  • EMAC_PHYA_SHIFT : at91_emac.h
  • EMAC_PTIME : at91_emac.h
  • EMAC_PTR : at91_emac.h
  • EMAC_PTR_OFF : at91_emac.h
  • EMAC_PTZ : at91_emac.h
  • EMAC_RBOF : at91_emac.h
  • EMAC_RBOF_OFFSET_0 : at91_emac.h
  • EMAC_RBOF_OFFSET_1 : at91_emac.h
  • EMAC_RBOF_OFFSET_2 : at91_emac.h
  • EMAC_RBOF_OFFSET_3 : at91_emac.h
  • EMAC_RBQP : at91_emac.h
  • EMAC_RBQP_OFF : at91_emac.h
  • EMAC_RCOMP : at91_emac.h
  • EMAC_RE : at91_emac.h
  • EMAC_REC : at91_emac.h
  • EMAC_REGA : at91_emac.h
  • EMAC_REGA_SHIFT : at91_emac.h
  • EMAC_RJA : at91_emac.h
  • EMAC_RJA_OFF : at91_emac.h
  • EMAC_RLCE : at91_emac.h
  • EMAC_RLE : at91_emac.h
  • EMAC_RLE_OFF : at91_emac.h
  • EMAC_RLES : at91_emac.h
  • EMAC_RLEX : at91_emac.h
  • EMAC_RMII : at91_emac.h
  • EMAC_ROV : at91_emac.h
  • EMAC_ROV_OFF : at91_emac.h
  • EMAC_ROVR : at91_emac.h
  • EMAC_RRE : at91_emac.h
  • EMAC_RRE_OFF : at91_emac.h
  • EMAC_RSE : at91_emac.h
  • EMAC_RSE_OFF : at91_emac.h
  • EMAC_RSR : at91_emac.h
  • EMAC_RSR_OFF : at91_emac.h
  • EMAC_RTY : at91_emac.h
  • EMAC_RW : at91_emac.h
  • EMAC_RW_READ : at91_emac.h
  • EMAC_RW_WRITE : at91_emac.h
  • EMAC_RXUBR : at91_emac.h
  • EMAC_SA1H : at91_emac.h
  • EMAC_SA1H_OFF : at91_emac.h
  • EMAC_SA1L : at91_emac.h
  • EMAC_SA1L_OFF : at91_emac.h
  • EMAC_SA2H : at91_emac.h
  • EMAC_SA2H_OFF : at91_emac.h
  • EMAC_SA2L : at91_emac.h
  • EMAC_SA2L_OFF : at91_emac.h
  • EMAC_SA3H : at91_emac.h
  • EMAC_SA3H_OFF : at91_emac.h
  • EMAC_SA3L : at91_emac.h
  • EMAC_SA3L_OFF : at91_emac.h
  • EMAC_SA4H : at91_emac.h
  • EMAC_SA4H_OFF : at91_emac.h
  • EMAC_SA4L : at91_emac.h
  • EMAC_SA4L_OFF : at91_emac.h
  • EMAC_SCF : at91_emac.h
  • EMAC_SCF_OFF : at91_emac.h
  • EMAC_SOF : at91_emac.h
  • EMAC_SPD : at91_emac.h
  • EMAC_STE : at91_emac.h
  • EMAC_STE_OFF : at91_emac.h
  • EMAC_TBQP : at91_emac.h
  • EMAC_TBQP_OFF : at91_emac.h
  • EMAC_TCOMP : at91_emac.h
  • EMAC_TE : at91_emac.h
  • EMAC_TGO : at91_emac.h
  • EMAC_THALT : at91_emac.h
  • EMAC_TID : at91_emac.h
  • EMAC_TID_OFF : at91_emac.h
  • EMAC_TSR : at91_emac.h
  • EMAC_TSR_OFF : at91_emac.h
  • EMAC_TSTART : at91_emac.h
  • EMAC_TUND : at91_emac.h
  • EMAC_TUNDR : at91_emac.h
  • EMAC_TUNDR_OFF : at91_emac.h
  • EMAC_TXERR : at91_emac.h
  • EMAC_TXUBR : at91_emac.h
  • EMAC_UBR : at91_emac.h
  • EMAC_UND : at91_emac.h
  • EMAC_UNI : at91_emac.h
  • EMAC_USF : at91_emac.h
  • EMAC_USF_OFF : at91_emac.h
  • EMAC_USRIO : at91_emac.h
  • EMAC_USRIO_OFF : at91_emac.h
  • EMAC_WESTAT : at91_emac.h
  • entropy_add() : entropy.h
  • entropy_make_seed() : entropy.h
  • entropy_seeding_ready() : entropy.h
  • EPI0_BASE : lm3s_memmap.h
  • eth_addrCmp() : eth.h
  • eth_addrIsBcast() : eth.h
  • eth_addrIsLocal() : eth.h
  • eth_addrIsMcast() : eth.h
  • eth_addrIsValid() : eth.h
  • eth_addrIsZero() : eth.h
  • ETH_BASE : lm3s_memmap.h
  • ETH_LOG_FORMAT : cfg_eth.h
  • ETH_LOG_LEVEL : cfg_eth.h
  • ETHARP_DEBUG : cfg_lwip.h
  • ETHARP_SUPPORT_VLAN : cfg_lwip.h
  • ETHARP_TRUST_IP_MAC : cfg_lwip.h
  • event_createGeneric() : event.h
  • event_createNone() : event.h
  • event_createSoftint() : event.h
  • event_do() : event.h
  • event_initNone : event.h
  • event_initSoftint : event.h
  • event_select() : event.c , event.h
  • event_wait() : event.h
  • event_waitTimeout() : event.h , event.c
  • except_stack : except.h
  • EXTERN_POOL : pool.h
  • EXTI0_IRQHANDLER : stm32_ints.h
  • EXTI15_10_IRQHANDLER : stm32_ints.h
  • EXTI1_IRQHANDLER : stm32_ints.h
  • EXTI2_IRQHANDLER : stm32_ints.h
  • EXTI3_IRQHANDLER : stm32_ints.h
  • EXTI4_IRQHANDLER : stm32_ints.h
  • EXTI9_5_IRQHANDLER : stm32_ints.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- f -

  • F_SIZE : stm32_flash.h
  • fake_disk : diskio_emul.c
  • FAST_FUNC : attr.h
  • FAST_RODATA : attr.h
  • FAT_LOG_FORMAT : cfg_fat.h
  • FAT_LOG_LEVEL : cfg_fat.h
  • fatfile_open() : fat.h , fat.c
  • FAULT_BUS : lm3s_ints.h , sam3_ints.h , sam3_nvic.h , stm32_nvic.h
  • FAULT_DEBUG : stm32_nvic.h , lm3s_ints.h , sam3_ints.h , sam3_nvic.h
  • FAULT_HARD : lm3s_ints.h , sam3_ints.h , sam3_nvic.h , stm32_nvic.h
  • FAULT_MPU : lm3s_ints.h , sam3_ints.h , sam3_nvic.h , stm32_nvic.h
  • FAULT_NMI : lm3s_ints.h , sam3_ints.h , sam3_nvic.h , stm32_nvic.h
  • FAULT_PENDSV : stm32_nvic.h , lm3s_ints.h , sam3_ints.h , sam3_nvic.h
  • FAULT_SVCALL : lm3s_ints.h , sam3_ints.h , sam3_nvic.h , stm32_nvic.h
  • FAULT_SYSTICK : lm3s_ints.h , sam3_ints.h , sam3_nvic.h , stm32_nvic.h
  • FAULT_USAGE : lm3s_ints.h , sam3_ints.h , sam3_nvic.h , stm32_nvic.h
  • fcs_t : battfs.h
  • fifo_flush() : fifobuf.h
  • fifo_flush_locked() : fifobuf.h
  • fifo_init() : fifobuf.h
  • fifo_isempty() : fifobuf.h
  • fifo_isempty_locked() : fifobuf.h
  • fifo_isfull() : fifobuf.h
  • fifo_isfull_locked() : fifobuf.h
  • fifo_len() : fifobuf.h
  • fifo_pop() : fifobuf.h
  • fifo_push() : fifobuf.h
  • fifo_push_locked() : fifobuf.h
  • file_size_t : battfs.h
  • filemode_t : battfs.h
  • fill_t : battfs.h
  • fillPageArray() : battfs.c
  • filter_init() : dnotifier.c , dnotifier.h
  • filter_mask_update() : dnotifier.h , dnotifier.c
  • filter_update() : dnotifier.c , dnotifier.h
  • findFile() : battfs.c
  • findKey() : ini_reader.c
  • FIX_MULT32 : ramp.h
  • FLAG_MASK : clock_stm32.h
  • FLASH25_AT25F2048 : flash25.h
  • FLASH25_CAST() : flash25.h
  • FLASH25_CHIP_ERASE : flash25.h
  • flash25_chipErase() : flash25.c , flash25.h
  • flash25_close() : flash25.c
  • flash25_init() : flash25.c , flash25.h
  • flash25_pin_init() : flash25.c
  • FLASH25_PROGRAM : flash25.h
  • FLASH25_RDID : flash25.h
  • FLASH25_RDSR : flash25.h
  • FLASH25_READ : flash25.h
  • flash25_read() : flash25.c
  • flash25_reopen() : flash25.c
  • FLASH25_SECT1 : flash25.h
  • FLASH25_SECT2 : flash25.h
  • FLASH25_SECT3 : flash25.h
  • FLASH25_SECT4 : flash25.h
  • FLASH25_SECTORE_ERASE : flash25.h
  • flash25_sectorErase() : flash25.c , flash25.h
  • flash25_sendCmd() : flash25.c
  • flash25_test() : flash25.h , flash25_hwtest.c
  • flash25_waitReady() : flash25.c
  • FLASH25_WRDI : flash25.h
  • FLASH25_WREN : flash25.h
  • flash25_write() : flash25.c
  • FLASH25_WRSR : flash25.h
  • flash25Addr_t : flash25.h
  • Flash25Opcode : flash25.h
  • Flash25Sector : flash25.h
  • FLASH_BASE : lm3s_memmap.h
  • FLASH_BOOT_SIZE : hw_boot.h
  • FLASH_CAST() : flash.h
  • FLASH_CTRL_BASE : lm3s_memmap.h
  • FLASH_ERASE_SIZE : lm3s_com.h
  • FLASH_FCIM_AMASK : lm3s_com.h
  • FLASH_FCIM_PMASK : lm3s_com.h
  • FLASH_FCIM_R : lm3s_com.h
  • FLASH_FCMISC_AMISC : lm3s_com.h
  • FLASH_FCMISC_PMISC : lm3s_com.h
  • FLASH_FCMISC_R : lm3s_com.h
  • FLASH_FCRIS_ARIS : lm3s_com.h
  • FLASH_FCRIS_PRIS : lm3s_com.h
  • FLASH_FCRIS_R : lm3s_com.h
  • FLASH_FMA_OFFSET_M : lm3s_com.h
  • FLASH_FMA_OFFSET_S : lm3s_com.h
  • FLASH_FMA_R : lm3s_com.h
  • FLASH_FMC_COMT : lm3s_com.h
  • FLASH_FMC_ERASE : lm3s_com.h
  • FLASH_FMC_MERASE : lm3s_com.h
  • FLASH_FMC_R : lm3s_com.h
  • FLASH_FMC_WRITE : lm3s_com.h
  • FLASH_FMC_WRKEY : lm3s_com.h
  • FLASH_FMC_WRKEY_M : lm3s_com.h
  • FLASH_FMC_WRKEY_S : lm3s_com.h
  • FLASH_FMD_DATA_M : lm3s_com.h
  • FLASH_FMD_DATA_S : lm3s_com.h
  • FLASH_FMD_R : lm3s_com.h
  • FLASH_FMPPE0_R : lm3s_com.h
  • FLASH_FMPPE1_R : lm3s_com.h
  • FLASH_FMPPE2_R : lm3s_com.h
  • FLASH_FMPPE3_R : lm3s_com.h
  • FLASH_FMPRE0_R : lm3s_com.h
  • FLASH_FMPRE1_R : lm3s_com.h
  • FLASH_FMPRE2_R : lm3s_com.h
  • FLASH_FMPRE3_R : lm3s_com.h
  • flash_getStatus() : flash_at91.c
  • flash_init : flash.h
  • flash_init_2 : flash.h
  • FLASH_IRQHANDLER : stm32_ints.h
  • FLASH_NOT_ERASED : flash.h
  • FLASH_PROTECT_SIZE : lm3s_com.h
  • FLASH_R_BASE : stm32_memmap.h
  • flash_sendWRcmd() : flash_at91.c
  • FLASH_UNBUFFERED : flash.h
  • FLASH_USECRL_M : lm3s_com.h
  • FLASH_USECRL_R : lm3s_com.h
  • FLASH_USECRL_S : lm3s_com.h
  • FLASH_USERDBG_DATA_M : lm3s_com.h
  • FLASH_USERDBG_DATA_S : lm3s_com.h
  • FLASH_USERDBG_DBG0 : lm3s_com.h
  • FLASH_USERDBG_DBG1 : lm3s_com.h
  • FLASH_USERDBG_NW : lm3s_com.h
  • FLASH_USERDBG_R : lm3s_com.h
  • FLASH_USERREG0_DATA_M : lm3s_com.h
  • FLASH_USERREG0_DATA_S : lm3s_com.h
  • FLASH_USERREG0_NW : lm3s_com.h
  • FLASH_USERREG0_R : lm3s_com.h
  • FLASH_USERREG1_DATA_M : lm3s_com.h
  • FLASH_USERREG1_DATA_S : lm3s_com.h
  • FLASH_USERREG1_NW : lm3s_com.h
  • FLASH_USERREG1_R : lm3s_com.h
  • FLASH_WR_ERR : flash.h
  • FLASH_WR_OK : flash.h
  • FLASH_WR_PROTECT : flash.h
  • FLASH_WR_TIMEOUT : flash.h
  • FLASH_WRITE_ONCE : flash.h
  • FONT_HAS_GLYPH : font.h
  • FOREACH_NODE : list.h
  • FPB_BASE : lm3s_memmap.h
  • FREQ2MICROS : ramp.h
  • fsm_state : stepper.h
  • FSMC_BANK1_R_BASE : stm32_memmap.h
  • FSMC_BANK1E_R_BASE : stm32_memmap.h
  • FSMC_BANK2_R_BASE : stm32_memmap.h
  • FSMC_BANK3_R_BASE : stm32_memmap.h
  • FSMC_BANK4_R_BASE : stm32_memmap.h
  • FT245RL_CAST() : ft245rl.h
  • ft245rl_init() : ft245rl.c , ft245rl.h
  • ft245rl_read() : ft245rl.c
  • ft245rl_write() : ft245rl.c


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- g -

  • GET_ID_DESITY_DEVICE : dataflash.h
  • get_key_from_command() : parser.c
  • get_word() : parser.c
  • gfx_bitmapClear() : bitmap.c , gfx.h
  • gfx_bitmapInit() : bitmap.c , gfx.h
  • gfx_blit() : bitmap.c , gfx.h
  • gfx_blitImage() : bitmap.c , gfx.h
  • gfx_blitRaster() : bitmap.c , gfx.h
  • gfx_line() : gfx.h , line.c
  • gfx_lineTo() : gfx.h , line.c
  • gfx_lineUnclipped() : line.c
  • gfx_moveTo() : gfx.h , line.c
  • gfx_rectClear() : gfx.h , line.c
  • gfx_rectDraw() : gfx.h , line.c
  • gfx_rectFill() : gfx.h , line.c
  • gfx_rectFillC() : gfx.h , line.c
  • gpgga_callout() : nmea.c , nmea.h
  • gpgsv_callout() : nmea.h , nmea.c
  • GPIO_LOCK_KEY : lm3s_com.h , lm3s_gpio.h
  • GPIO_LOCK_KEY_DD : lm3s_gpio.h
  • GPIO_LOCK_LOCKED : lm3s_com.h , lm3s_gpio.h
  • GPIO_LOCK_M : lm3s_com.h , lm3s_gpio.h
  • GPIO_LOCK_UNLOCKED : lm3s_com.h , lm3s_gpio.h
  • GPIO_O_AFSEL : lm3s_gpio.h
  • GPIO_O_AMSEL : lm3s_gpio.h
  • GPIO_O_CR : lm3s_gpio.h
  • GPIO_O_DATA : lm3s_gpio.h
  • GPIO_O_DEN : lm3s_gpio.h
  • GPIO_O_DIR : lm3s_gpio.h
  • GPIO_O_DR2R : lm3s_gpio.h
  • GPIO_O_DR4R : lm3s_gpio.h
  • GPIO_O_DR8R : lm3s_gpio.h
  • GPIO_O_IBE : lm3s_gpio.h
  • GPIO_O_ICR : lm3s_gpio.h
  • GPIO_O_IEV : lm3s_gpio.h
  • GPIO_O_IM : lm3s_gpio.h
  • GPIO_O_IS : lm3s_gpio.h
  • GPIO_O_LOCK : lm3s_gpio.h
  • GPIO_O_MIS : lm3s_gpio.h
  • GPIO_O_ODR : lm3s_gpio.h
  • GPIO_O_PCellID0 : lm3s_gpio.h
  • GPIO_O_PCellID1 : lm3s_gpio.h
  • GPIO_O_PCellID2 : lm3s_gpio.h
  • GPIO_O_PCellID3 : lm3s_gpio.h
  • GPIO_O_PCTL : lm3s_gpio.h
  • GPIO_O_PDR : lm3s_gpio.h
  • GPIO_O_PeriphID0 : lm3s_gpio.h
  • GPIO_O_PeriphID1 : lm3s_gpio.h
  • GPIO_O_PeriphID2 : lm3s_gpio.h
  • GPIO_O_PeriphID3 : lm3s_gpio.h
  • GPIO_O_PeriphID4 : lm3s_gpio.h
  • GPIO_O_PeriphID5 : lm3s_gpio.h
  • GPIO_O_PeriphID6 : lm3s_gpio.h
  • GPIO_O_PeriphID7 : lm3s_gpio.h
  • GPIO_O_PUR : lm3s_gpio.h
  • GPIO_O_RIS : lm3s_gpio.h
  • GPIO_O_SLR : lm3s_gpio.h
  • GPIO_PCTL_PA0_I2C1SCL : lm3s_gpio.h
  • GPIO_PCTL_PA0_M : lm3s_gpio.h
  • GPIO_PCTL_PA0_U0RX : lm3s_gpio.h
  • GPIO_PCTL_PA0_U1RX : lm3s_gpio.h
  • GPIO_PCTL_PA1_I2C1SDA : lm3s_gpio.h
  • GPIO_PCTL_PA1_M : lm3s_gpio.h
  • GPIO_PCTL_PA1_U0TX : lm3s_gpio.h
  • GPIO_PCTL_PA1_U1TX : lm3s_gpio.h
  • GPIO_PCTL_PA2_I2S0RXSD : lm3s_gpio.h
  • GPIO_PCTL_PA2_M : lm3s_gpio.h
  • GPIO_PCTL_PA2_PWM4 : lm3s_gpio.h
  • GPIO_PCTL_PA2_SSI0CLK : lm3s_gpio.h
  • GPIO_PCTL_PA3_I2S0RXMCLK : lm3s_gpio.h
  • GPIO_PCTL_PA3_M : lm3s_gpio.h
  • GPIO_PCTL_PA3_PWM5 : lm3s_gpio.h
  • GPIO_PCTL_PA3_SSI0FSS : lm3s_gpio.h
  • GPIO_PCTL_PA4_CAN0RX : lm3s_gpio.h
  • GPIO_PCTL_PA4_I2S0TXSCK : lm3s_gpio.h
  • GPIO_PCTL_PA4_M : lm3s_gpio.h
  • GPIO_PCTL_PA4_PWM6 : lm3s_gpio.h
  • GPIO_PCTL_PA4_SSI0RX : lm3s_gpio.h
  • GPIO_PCTL_PA5_CAN0TX : lm3s_gpio.h
  • GPIO_PCTL_PA5_I2S0TXWS : lm3s_gpio.h
  • GPIO_PCTL_PA5_M : lm3s_gpio.h
  • GPIO_PCTL_PA5_PWM7 : lm3s_gpio.h
  • GPIO_PCTL_PA5_SSI0TX : lm3s_gpio.h
  • GPIO_PCTL_PA6_CAN0RX : lm3s_gpio.h
  • GPIO_PCTL_PA6_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PA6_I2C1SCL : lm3s_gpio.h
  • GPIO_PCTL_PA6_M : lm3s_gpio.h
  • GPIO_PCTL_PA6_PWM0 : lm3s_gpio.h
  • GPIO_PCTL_PA6_PWM4 : lm3s_gpio.h
  • GPIO_PCTL_PA6_U1CTS : lm3s_gpio.h
  • GPIO_PCTL_PA6_USB0EPEN : lm3s_gpio.h
  • GPIO_PCTL_PA7_CAN0TX : lm3s_gpio.h
  • GPIO_PCTL_PA7_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PA7_CCP4 : lm3s_gpio.h
  • GPIO_PCTL_PA7_I2C1SDA : lm3s_gpio.h
  • GPIO_PCTL_PA7_M : lm3s_gpio.h
  • GPIO_PCTL_PA7_PWM1 : lm3s_gpio.h
  • GPIO_PCTL_PA7_PWM5 : lm3s_gpio.h
  • GPIO_PCTL_PA7_U1DCD : lm3s_gpio.h
  • GPIO_PCTL_PA7_USB0PFLT : lm3s_gpio.h
  • GPIO_PCTL_PB0_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PB0_M : lm3s_gpio.h
  • GPIO_PCTL_PB0_PWM2 : lm3s_gpio.h
  • GPIO_PCTL_PB0_U1RX : lm3s_gpio.h
  • GPIO_PCTL_PB1_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PB1_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PB1_M : lm3s_gpio.h
  • GPIO_PCTL_PB1_PWM3 : lm3s_gpio.h
  • GPIO_PCTL_PB1_U1TX : lm3s_gpio.h
  • GPIO_PCTL_PB2_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PB2_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PB2_I2C0SCL : lm3s_gpio.h
  • GPIO_PCTL_PB2_IDX0 : lm3s_gpio.h
  • GPIO_PCTL_PB2_M : lm3s_gpio.h
  • GPIO_PCTL_PB2_USB0EPEN : lm3s_gpio.h
  • GPIO_PCTL_PB3_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PB3_FAULT3 : lm3s_gpio.h
  • GPIO_PCTL_PB3_I2C0SDA : lm3s_gpio.h
  • GPIO_PCTL_PB3_M : lm3s_gpio.h
  • GPIO_PCTL_PB3_USB0PFLT : lm3s_gpio.h
  • GPIO_PCTL_PB4_CAN0RX : lm3s_gpio.h
  • GPIO_PCTL_PB4_EPI0S23 : lm3s_gpio.h
  • GPIO_PCTL_PB4_IDX0 : lm3s_gpio.h
  • GPIO_PCTL_PB4_M : lm3s_gpio.h
  • GPIO_PCTL_PB4_U1RX : lm3s_gpio.h
  • GPIO_PCTL_PB4_U2RX : lm3s_gpio.h
  • GPIO_PCTL_PB5_C0O : lm3s_gpio.h
  • GPIO_PCTL_PB5_CAN0TX : lm3s_gpio.h
  • GPIO_PCTL_PB5_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PB5_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PB5_CCP5 : lm3s_gpio.h
  • GPIO_PCTL_PB5_CCP6 : lm3s_gpio.h
  • GPIO_PCTL_PB5_EPI0S22 : lm3s_gpio.h
  • GPIO_PCTL_PB5_M : lm3s_gpio.h
  • GPIO_PCTL_PB5_U1TX : lm3s_gpio.h
  • GPIO_PCTL_PB6_C0O : lm3s_gpio.h
  • GPIO_PCTL_PB6_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PB6_CCP5 : lm3s_gpio.h
  • GPIO_PCTL_PB6_CCP7 : lm3s_gpio.h
  • GPIO_PCTL_PB6_FAULT1 : lm3s_gpio.h
  • GPIO_PCTL_PB6_I2S0TXSCK : lm3s_gpio.h
  • GPIO_PCTL_PB6_IDX0 : lm3s_gpio.h
  • GPIO_PCTL_PB6_M : lm3s_gpio.h
  • GPIO_PCTL_PB7_M : lm3s_gpio.h
  • GPIO_PCTL_PB7_NMI : lm3s_gpio.h
  • GPIO_PCTL_PC0_M : lm3s_gpio.h
  • GPIO_PCTL_PC0_TCK : lm3s_gpio.h
  • GPIO_PCTL_PC1_M : lm3s_gpio.h
  • GPIO_PCTL_PC1_TMS : lm3s_gpio.h
  • GPIO_PCTL_PC2_M : lm3s_gpio.h
  • GPIO_PCTL_PC2_TDI : lm3s_gpio.h
  • GPIO_PCTL_PC3_M : lm3s_gpio.h
  • GPIO_PCTL_PC3_TDO : lm3s_gpio.h
  • GPIO_PCTL_PC4_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PC4_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PC4_CCP4 : lm3s_gpio.h
  • GPIO_PCTL_PC4_CCP5 : lm3s_gpio.h
  • GPIO_PCTL_PC4_EPI0S2 : lm3s_gpio.h
  • GPIO_PCTL_PC4_M : lm3s_gpio.h
  • GPIO_PCTL_PC4_PHA0 : lm3s_gpio.h
  • GPIO_PCTL_PC4_PWM6 : lm3s_gpio.h
  • GPIO_PCTL_PC5_C0O : lm3s_gpio.h
  • GPIO_PCTL_PC5_C1O : lm3s_gpio.h
  • GPIO_PCTL_PC5_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PC5_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PC5_EPI0S3 : lm3s_gpio.h
  • GPIO_PCTL_PC5_FAULT2 : lm3s_gpio.h
  • GPIO_PCTL_PC5_M : lm3s_gpio.h
  • GPIO_PCTL_PC5_USB0EPEN : lm3s_gpio.h
  • GPIO_PCTL_PC6_C2O : lm3s_gpio.h
  • GPIO_PCTL_PC6_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PC6_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PC6_EPI0S4 : lm3s_gpio.h
  • GPIO_PCTL_PC6_M : lm3s_gpio.h
  • GPIO_PCTL_PC6_PHB0 : lm3s_gpio.h
  • GPIO_PCTL_PC6_PWM7 : lm3s_gpio.h
  • GPIO_PCTL_PC6_U1RX : lm3s_gpio.h
  • GPIO_PCTL_PC6_USB0PFLT : lm3s_gpio.h
  • GPIO_PCTL_PC7_C1O : lm3s_gpio.h
  • GPIO_PCTL_PC7_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PC7_CCP4 : lm3s_gpio.h
  • GPIO_PCTL_PC7_EPI0S5 : lm3s_gpio.h
  • GPIO_PCTL_PC7_M : lm3s_gpio.h
  • GPIO_PCTL_PC7_PHB0 : lm3s_gpio.h
  • GPIO_PCTL_PC7_U1TX : lm3s_gpio.h
  • GPIO_PCTL_PC7_USB0PFLT : lm3s_gpio.h
  • GPIO_PCTL_PD0_CAN0RX : lm3s_gpio.h
  • GPIO_PCTL_PD0_CCP6 : lm3s_gpio.h
  • GPIO_PCTL_PD0_I2S0RXSCK : lm3s_gpio.h
  • GPIO_PCTL_PD0_IDX0 : lm3s_gpio.h
  • GPIO_PCTL_PD0_M : lm3s_gpio.h
  • GPIO_PCTL_PD0_PWM0 : lm3s_gpio.h
  • GPIO_PCTL_PD0_U1CTS : lm3s_gpio.h
  • GPIO_PCTL_PD0_U1RX : lm3s_gpio.h
  • GPIO_PCTL_PD0_U2RX : lm3s_gpio.h
  • GPIO_PCTL_PD1_CAN0TX : lm3s_gpio.h
  • GPIO_PCTL_PD1_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PD1_CCP7 : lm3s_gpio.h
  • GPIO_PCTL_PD1_I2S0RXWS : lm3s_gpio.h
  • GPIO_PCTL_PD1_M : lm3s_gpio.h
  • GPIO_PCTL_PD1_PHA0 : lm3s_gpio.h
  • GPIO_PCTL_PD1_PHB1 : lm3s_gpio.h
  • GPIO_PCTL_PD1_PWM1 : lm3s_gpio.h
  • GPIO_PCTL_PD1_U1DCD : lm3s_gpio.h
  • GPIO_PCTL_PD1_U1TX : lm3s_gpio.h
  • GPIO_PCTL_PD1_U2TX : lm3s_gpio.h
  • GPIO_PCTL_PD2_CCP5 : lm3s_gpio.h
  • GPIO_PCTL_PD2_CCP6 : lm3s_gpio.h
  • GPIO_PCTL_PD2_EPI0S20 : lm3s_gpio.h
  • GPIO_PCTL_PD2_M : lm3s_gpio.h
  • GPIO_PCTL_PD2_PWM2 : lm3s_gpio.h
  • GPIO_PCTL_PD2_U1RX : lm3s_gpio.h
  • GPIO_PCTL_PD3_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PD3_CCP7 : lm3s_gpio.h
  • GPIO_PCTL_PD3_EPI0S21 : lm3s_gpio.h
  • GPIO_PCTL_PD3_M : lm3s_gpio.h
  • GPIO_PCTL_PD3_PWM3 : lm3s_gpio.h
  • GPIO_PCTL_PD3_U1TX : lm3s_gpio.h
  • GPIO_PCTL_PD4_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PD4_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PD4_EPI0S19 : lm3s_gpio.h
  • GPIO_PCTL_PD4_I2S0RXSD : lm3s_gpio.h
  • GPIO_PCTL_PD4_M : lm3s_gpio.h
  • GPIO_PCTL_PD4_U1RI : lm3s_gpio.h
  • GPIO_PCTL_PD5_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PD5_CCP4 : lm3s_gpio.h
  • GPIO_PCTL_PD5_EPI0S28 : lm3s_gpio.h
  • GPIO_PCTL_PD5_I2S0RXMCLK : lm3s_gpio.h
  • GPIO_PCTL_PD5_M : lm3s_gpio.h
  • GPIO_PCTL_PD5_U2RX : lm3s_gpio.h
  • GPIO_PCTL_PD6_EPI0S29 : lm3s_gpio.h
  • GPIO_PCTL_PD6_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PD6_I2S0TXSCK : lm3s_gpio.h
  • GPIO_PCTL_PD6_M : lm3s_gpio.h
  • GPIO_PCTL_PD6_U2TX : lm3s_gpio.h
  • GPIO_PCTL_PD7_C0O : lm3s_gpio.h
  • GPIO_PCTL_PD7_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PD7_EPI0S30 : lm3s_gpio.h
  • GPIO_PCTL_PD7_I2S0TXWS : lm3s_gpio.h
  • GPIO_PCTL_PD7_IDX0 : lm3s_gpio.h
  • GPIO_PCTL_PD7_M : lm3s_gpio.h
  • GPIO_PCTL_PD7_U1DTR : lm3s_gpio.h
  • GPIO_PCTL_PE0_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PE0_EPI0S8 : lm3s_gpio.h
  • GPIO_PCTL_PE0_M : lm3s_gpio.h
  • GPIO_PCTL_PE0_PWM4 : lm3s_gpio.h
  • GPIO_PCTL_PE0_SSI1CLK : lm3s_gpio.h
  • GPIO_PCTL_PE0_USB0PFLT : lm3s_gpio.h
  • GPIO_PCTL_PE1_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PE1_CCP6 : lm3s_gpio.h
  • GPIO_PCTL_PE1_EPI0S9 : lm3s_gpio.h
  • GPIO_PCTL_PE1_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PE1_M : lm3s_gpio.h
  • GPIO_PCTL_PE1_PWM5 : lm3s_gpio.h
  • GPIO_PCTL_PE1_SSI1FSS : lm3s_gpio.h
  • GPIO_PCTL_PE2_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PE2_CCP4 : lm3s_gpio.h
  • GPIO_PCTL_PE2_EPI0S24 : lm3s_gpio.h
  • GPIO_PCTL_PE2_M : lm3s_gpio.h
  • GPIO_PCTL_PE2_PHA0 : lm3s_gpio.h
  • GPIO_PCTL_PE2_PHB1 : lm3s_gpio.h
  • GPIO_PCTL_PE2_SSI1RX : lm3s_gpio.h
  • GPIO_PCTL_PE3_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PE3_CCP7 : lm3s_gpio.h
  • GPIO_PCTL_PE3_EPI0S25 : lm3s_gpio.h
  • GPIO_PCTL_PE3_M : lm3s_gpio.h
  • GPIO_PCTL_PE3_PHA1 : lm3s_gpio.h
  • GPIO_PCTL_PE3_PHB0 : lm3s_gpio.h
  • GPIO_PCTL_PE3_SSI1TX : lm3s_gpio.h
  • GPIO_PCTL_PE4_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PE4_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PE4_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PE4_I2S0TXWS : lm3s_gpio.h
  • GPIO_PCTL_PE4_M : lm3s_gpio.h
  • GPIO_PCTL_PE4_U2TX : lm3s_gpio.h
  • GPIO_PCTL_PE5_CCP5 : lm3s_gpio.h
  • GPIO_PCTL_PE5_I2S0TXSD : lm3s_gpio.h
  • GPIO_PCTL_PE5_M : lm3s_gpio.h
  • GPIO_PCTL_PE6_C1O : lm3s_gpio.h
  • GPIO_PCTL_PE6_M : lm3s_gpio.h
  • GPIO_PCTL_PE6_PWM4 : lm3s_gpio.h
  • GPIO_PCTL_PE6_U1CTS : lm3s_gpio.h
  • GPIO_PCTL_PE7_C2O : lm3s_gpio.h
  • GPIO_PCTL_PE7_M : lm3s_gpio.h
  • GPIO_PCTL_PE7_PWM5 : lm3s_gpio.h
  • GPIO_PCTL_PE7_U1DCD : lm3s_gpio.h
  • GPIO_PCTL_PF0_CAN1RX : lm3s_gpio.h
  • GPIO_PCTL_PF0_I2S0TXSD : lm3s_gpio.h
  • GPIO_PCTL_PF0_M : lm3s_gpio.h
  • GPIO_PCTL_PF0_PHB0 : lm3s_gpio.h
  • GPIO_PCTL_PF0_PWM0 : lm3s_gpio.h
  • GPIO_PCTL_PF0_U1DSR : lm3s_gpio.h
  • GPIO_PCTL_PF1_CAN1TX : lm3s_gpio.h
  • GPIO_PCTL_PF1_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PF1_I2S0TXMCLK : lm3s_gpio.h
  • GPIO_PCTL_PF1_IDX1 : lm3s_gpio.h
  • GPIO_PCTL_PF1_M : lm3s_gpio.h
  • GPIO_PCTL_PF1_PWM1 : lm3s_gpio.h
  • GPIO_PCTL_PF1_U1RTS : lm3s_gpio.h
  • GPIO_PCTL_PF2_LED1 : lm3s_gpio.h
  • GPIO_PCTL_PF2_M : lm3s_gpio.h
  • GPIO_PCTL_PF2_PWM2 : lm3s_gpio.h
  • GPIO_PCTL_PF2_PWM4 : lm3s_gpio.h
  • GPIO_PCTL_PF2_SSI1CLK : lm3s_gpio.h
  • GPIO_PCTL_PF3_LED0 : lm3s_gpio.h
  • GPIO_PCTL_PF3_M : lm3s_gpio.h
  • GPIO_PCTL_PF3_PWM3 : lm3s_gpio.h
  • GPIO_PCTL_PF3_PWM5 : lm3s_gpio.h
  • GPIO_PCTL_PF3_SSI1FSS : lm3s_gpio.h
  • GPIO_PCTL_PF4_C0O : lm3s_gpio.h
  • GPIO_PCTL_PF4_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PF4_EPI0S12 : lm3s_gpio.h
  • GPIO_PCTL_PF4_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PF4_M : lm3s_gpio.h
  • GPIO_PCTL_PF4_SSI1RX : lm3s_gpio.h
  • GPIO_PCTL_PF5_C1O : lm3s_gpio.h
  • GPIO_PCTL_PF5_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PF5_EPI0S15 : lm3s_gpio.h
  • GPIO_PCTL_PF5_M : lm3s_gpio.h
  • GPIO_PCTL_PF5_SSI1TX : lm3s_gpio.h
  • GPIO_PCTL_PF6_C2O : lm3s_gpio.h
  • GPIO_PCTL_PF6_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PF6_I2S0TXMCLK : lm3s_gpio.h
  • GPIO_PCTL_PF6_M : lm3s_gpio.h
  • GPIO_PCTL_PF6_PHA0 : lm3s_gpio.h
  • GPIO_PCTL_PF6_U1RTS : lm3s_gpio.h
  • GPIO_PCTL_PF7_CCP4 : lm3s_gpio.h
  • GPIO_PCTL_PF7_EPI0S12 : lm3s_gpio.h
  • GPIO_PCTL_PF7_FAULT1 : lm3s_gpio.h
  • GPIO_PCTL_PF7_M : lm3s_gpio.h
  • GPIO_PCTL_PF7_PHB0 : lm3s_gpio.h
  • GPIO_PCTL_PG0_EPI0S13 : lm3s_gpio.h
  • GPIO_PCTL_PG0_I2C1SCL : lm3s_gpio.h
  • GPIO_PCTL_PG0_M : lm3s_gpio.h
  • GPIO_PCTL_PG0_PWM0 : lm3s_gpio.h
  • GPIO_PCTL_PG0_PWM4 : lm3s_gpio.h
  • GPIO_PCTL_PG0_U2RX : lm3s_gpio.h
  • GPIO_PCTL_PG0_USB0EPEN : lm3s_gpio.h
  • GPIO_PCTL_PG1_EPI0S14 : lm3s_gpio.h
  • GPIO_PCTL_PG1_I2C1SDA : lm3s_gpio.h
  • GPIO_PCTL_PG1_M : lm3s_gpio.h
  • GPIO_PCTL_PG1_PWM1 : lm3s_gpio.h
  • GPIO_PCTL_PG1_PWM5 : lm3s_gpio.h
  • GPIO_PCTL_PG1_U2TX : lm3s_gpio.h
  • GPIO_PCTL_PG2_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PG2_I2S0RXSD : lm3s_gpio.h
  • GPIO_PCTL_PG2_IDX1 : lm3s_gpio.h
  • GPIO_PCTL_PG2_M : lm3s_gpio.h
  • GPIO_PCTL_PG2_PWM0 : lm3s_gpio.h
  • GPIO_PCTL_PG3_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PG3_FAULT2 : lm3s_gpio.h
  • GPIO_PCTL_PG3_I2S0RXMCLK : lm3s_gpio.h
  • GPIO_PCTL_PG3_M : lm3s_gpio.h
  • GPIO_PCTL_PG3_PWM1 : lm3s_gpio.h
  • GPIO_PCTL_PG4_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PG4_EPI0S15 : lm3s_gpio.h
  • GPIO_PCTL_PG4_FAULT1 : lm3s_gpio.h
  • GPIO_PCTL_PG4_M : lm3s_gpio.h
  • GPIO_PCTL_PG4_PWM6 : lm3s_gpio.h
  • GPIO_PCTL_PG4_U1RI : lm3s_gpio.h
  • GPIO_PCTL_PG5_CCP5 : lm3s_gpio.h
  • GPIO_PCTL_PG5_FAULT1 : lm3s_gpio.h
  • GPIO_PCTL_PG5_I2S0RXSCK : lm3s_gpio.h
  • GPIO_PCTL_PG5_IDX0 : lm3s_gpio.h
  • GPIO_PCTL_PG5_M : lm3s_gpio.h
  • GPIO_PCTL_PG5_PWM7 : lm3s_gpio.h
  • GPIO_PCTL_PG5_U1DTR : lm3s_gpio.h
  • GPIO_PCTL_PG6_FAULT1 : lm3s_gpio.h
  • GPIO_PCTL_PG6_I2S0RXWS : lm3s_gpio.h
  • GPIO_PCTL_PG6_M : lm3s_gpio.h
  • GPIO_PCTL_PG6_PHA1 : lm3s_gpio.h
  • GPIO_PCTL_PG6_PWM6 : lm3s_gpio.h
  • GPIO_PCTL_PG6_U1RI : lm3s_gpio.h
  • GPIO_PCTL_PG7_CCP5 : lm3s_gpio.h
  • GPIO_PCTL_PG7_EPI0S31 : lm3s_gpio.h
  • GPIO_PCTL_PG7_M : lm3s_gpio.h
  • GPIO_PCTL_PG7_PHB1 : lm3s_gpio.h
  • GPIO_PCTL_PG7_PWM7 : lm3s_gpio.h
  • GPIO_PCTL_PH0_CCP6 : lm3s_gpio.h
  • GPIO_PCTL_PH0_EPI0S6 : lm3s_gpio.h
  • GPIO_PCTL_PH0_M : lm3s_gpio.h
  • GPIO_PCTL_PH0_PWM2 : lm3s_gpio.h
  • GPIO_PCTL_PH0_PWM4 : lm3s_gpio.h
  • GPIO_PCTL_PH1_CCP7 : lm3s_gpio.h
  • GPIO_PCTL_PH1_EPI0S7 : lm3s_gpio.h
  • GPIO_PCTL_PH1_M : lm3s_gpio.h
  • GPIO_PCTL_PH1_PWM3 : lm3s_gpio.h
  • GPIO_PCTL_PH1_PWM5 : lm3s_gpio.h
  • GPIO_PCTL_PH2_C1O : lm3s_gpio.h
  • GPIO_PCTL_PH2_EPI0S1 : lm3s_gpio.h
  • GPIO_PCTL_PH2_FAULT3 : lm3s_gpio.h
  • GPIO_PCTL_PH2_IDX1 : lm3s_gpio.h
  • GPIO_PCTL_PH2_M : lm3s_gpio.h
  • GPIO_PCTL_PH3_EPI0S0 : lm3s_gpio.h
  • GPIO_PCTL_PH3_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PH3_M : lm3s_gpio.h
  • GPIO_PCTL_PH3_PHB0 : lm3s_gpio.h
  • GPIO_PCTL_PH3_USB0EPEN : lm3s_gpio.h
  • GPIO_PCTL_PH4_EPI0S10 : lm3s_gpio.h
  • GPIO_PCTL_PH4_M : lm3s_gpio.h
  • GPIO_PCTL_PH4_SSI1CLK : lm3s_gpio.h
  • GPIO_PCTL_PH4_USB0PFLT : lm3s_gpio.h
  • GPIO_PCTL_PH5_EPI0S11 : lm3s_gpio.h
  • GPIO_PCTL_PH5_FAULT2 : lm3s_gpio.h
  • GPIO_PCTL_PH5_M : lm3s_gpio.h
  • GPIO_PCTL_PH5_SSI1FSS : lm3s_gpio.h
  • GPIO_PCTL_PH6_EPI0S26 : lm3s_gpio.h
  • GPIO_PCTL_PH6_M : lm3s_gpio.h
  • GPIO_PCTL_PH6_PWM4 : lm3s_gpio.h
  • GPIO_PCTL_PH6_SSI1RX : lm3s_gpio.h
  • GPIO_PCTL_PH7_EPI0S27 : lm3s_gpio.h
  • GPIO_PCTL_PH7_M : lm3s_gpio.h
  • GPIO_PCTL_PH7_PWM5 : lm3s_gpio.h
  • GPIO_PCTL_PH7_SSI1TX : lm3s_gpio.h
  • GPIO_PCTL_PJ0_EPI0S16 : lm3s_gpio.h
  • GPIO_PCTL_PJ0_I2C1SCL : lm3s_gpio.h
  • GPIO_PCTL_PJ0_M : lm3s_gpio.h
  • GPIO_PCTL_PJ0_PWM0 : lm3s_gpio.h
  • GPIO_PCTL_PJ1_EPI0S17 : lm3s_gpio.h
  • GPIO_PCTL_PJ1_I2C1SDA : lm3s_gpio.h
  • GPIO_PCTL_PJ1_M : lm3s_gpio.h
  • GPIO_PCTL_PJ1_PWM1 : lm3s_gpio.h
  • GPIO_PCTL_PJ1_USB0PFLT : lm3s_gpio.h
  • GPIO_PCTL_PJ2_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PJ2_EPI0S18 : lm3s_gpio.h
  • GPIO_PCTL_PJ2_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PJ2_M : lm3s_gpio.h
  • GPIO_PCTL_PJ3_CCP6 : lm3s_gpio.h
  • GPIO_PCTL_PJ3_EPI0S19 : lm3s_gpio.h
  • GPIO_PCTL_PJ3_M : lm3s_gpio.h
  • GPIO_PCTL_PJ3_U1CTS : lm3s_gpio.h
  • GPIO_PCTL_PJ4_CCP4 : lm3s_gpio.h
  • GPIO_PCTL_PJ4_EPI0S28 : lm3s_gpio.h
  • GPIO_PCTL_PJ4_M : lm3s_gpio.h
  • GPIO_PCTL_PJ4_U1DCD : lm3s_gpio.h
  • GPIO_PCTL_PJ5_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PJ5_EPI0S29 : lm3s_gpio.h
  • GPIO_PCTL_PJ5_M : lm3s_gpio.h
  • GPIO_PCTL_PJ5_U1DSR : lm3s_gpio.h
  • GPIO_PCTL_PJ6_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PJ6_EPI0S30 : lm3s_gpio.h
  • GPIO_PCTL_PJ6_M : lm3s_gpio.h
  • GPIO_PCTL_PJ6_U1RTS : lm3s_gpio.h
  • GPIO_PCTL_PJ7_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PJ7_M : lm3s_gpio.h
  • GPIO_PCTL_PJ7_U1DTR : lm3s_gpio.h
  • GPIO_PORTA_AFSEL_R : lm3s_com.h
  • GPIO_PORTA_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTA_BASE : lm3s_memmap.h
  • GPIO_PORTA_CR_R : lm3s_com.h
  • GPIO_PORTA_DATA_BITS_R : lm3s_com.h
  • GPIO_PORTA_DATA_R : lm3s_com.h
  • GPIO_PORTA_DEN_R : lm3s_com.h
  • GPIO_PORTA_DIR_R : lm3s_com.h
  • GPIO_PORTA_DR2R_R : lm3s_com.h
  • GPIO_PORTA_DR4R_R : lm3s_com.h
  • GPIO_PORTA_DR8R_R : lm3s_com.h
  • GPIO_PORTA_IBE_R : lm3s_com.h
  • GPIO_PORTA_ICR_R : lm3s_com.h
  • GPIO_PORTA_IEV_R : lm3s_com.h
  • GPIO_PORTA_IM_R : lm3s_com.h
  • GPIO_PORTA_IS_R : lm3s_com.h
  • GPIO_PORTA_LOCK_R : lm3s_com.h
  • GPIO_PORTA_MIS_R : lm3s_com.h
  • GPIO_PORTA_ODR_R : lm3s_com.h
  • GPIO_PORTA_PDR_R : lm3s_com.h
  • GPIO_PORTA_PUR_R : lm3s_com.h
  • GPIO_PORTA_RIS_R : lm3s_com.h
  • GPIO_PORTA_SLR_R : lm3s_com.h
  • GPIO_PORTB_AFSEL_R : lm3s_com.h
  • GPIO_PORTB_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTB_BASE : lm3s_memmap.h
  • GPIO_PORTB_CR_R : lm3s_com.h
  • GPIO_PORTB_DATA_BITS_R : lm3s_com.h
  • GPIO_PORTB_DATA_R : lm3s_com.h
  • GPIO_PORTB_DEN_R : lm3s_com.h
  • GPIO_PORTB_DIR_R : lm3s_com.h
  • GPIO_PORTB_DR2R_R : lm3s_com.h
  • GPIO_PORTB_DR4R_R : lm3s_com.h
  • GPIO_PORTB_DR8R_R : lm3s_com.h
  • GPIO_PORTB_IBE_R : lm3s_com.h
  • GPIO_PORTB_ICR_R : lm3s_com.h
  • GPIO_PORTB_IEV_R : lm3s_com.h
  • GPIO_PORTB_IM_R : lm3s_com.h
  • GPIO_PORTB_IS_R : lm3s_com.h
  • GPIO_PORTB_LOCK_R : lm3s_com.h
  • GPIO_PORTB_MIS_R : lm3s_com.h
  • GPIO_PORTB_ODR_R : lm3s_com.h
  • GPIO_PORTB_PDR_R : lm3s_com.h
  • GPIO_PORTB_PUR_R : lm3s_com.h
  • GPIO_PORTB_RIS_R : lm3s_com.h
  • GPIO_PORTB_SLR_R : lm3s_com.h
  • GPIO_PORTC_AFSEL_R : lm3s_com.h
  • GPIO_PORTC_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTC_BASE : lm3s_memmap.h
  • GPIO_PORTC_CR_R : lm3s_com.h
  • GPIO_PORTC_DATA_BITS_R : lm3s_com.h
  • GPIO_PORTC_DATA_R : lm3s_com.h
  • GPIO_PORTC_DEN_R : lm3s_com.h
  • GPIO_PORTC_DIR_R : lm3s_com.h
  • GPIO_PORTC_DR2R_R : lm3s_com.h
  • GPIO_PORTC_DR4R_R : lm3s_com.h
  • GPIO_PORTC_DR8R_R : lm3s_com.h
  • GPIO_PORTC_IBE_R : lm3s_com.h
  • GPIO_PORTC_ICR_R : lm3s_com.h
  • GPIO_PORTC_IEV_R : lm3s_com.h
  • GPIO_PORTC_IM_R : lm3s_com.h
  • GPIO_PORTC_IS_R : lm3s_com.h
  • GPIO_PORTC_LOCK_R : lm3s_com.h
  • GPIO_PORTC_MIS_R : lm3s_com.h
  • GPIO_PORTC_ODR_R : lm3s_com.h
  • GPIO_PORTC_PDR_R : lm3s_com.h
  • GPIO_PORTC_PUR_R : lm3s_com.h
  • GPIO_PORTC_RIS_R : lm3s_com.h
  • GPIO_PORTC_SLR_R : lm3s_com.h
  • GPIO_PORTD_AFSEL_R : lm3s_com.h
  • GPIO_PORTD_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTD_BASE : lm3s_memmap.h
  • GPIO_PORTD_CR_R : lm3s_com.h
  • GPIO_PORTD_DATA_BITS_R : lm3s_com.h
  • GPIO_PORTD_DATA_R : lm3s_com.h
  • GPIO_PORTD_DEN_R : lm3s_com.h
  • GPIO_PORTD_DIR_R : lm3s_com.h
  • GPIO_PORTD_DR2R_R : lm3s_com.h
  • GPIO_PORTD_DR4R_R : lm3s_com.h
  • GPIO_PORTD_DR8R_R : lm3s_com.h
  • GPIO_PORTD_IBE_R : lm3s_com.h
  • GPIO_PORTD_ICR_R : lm3s_com.h
  • GPIO_PORTD_IEV_R : lm3s_com.h
  • GPIO_PORTD_IM_R : lm3s_com.h
  • GPIO_PORTD_IS_R : lm3s_com.h
  • GPIO_PORTD_LOCK_R : lm3s_com.h
  • GPIO_PORTD_MIS_R : lm3s_com.h
  • GPIO_PORTD_ODR_R : lm3s_com.h
  • GPIO_PORTD_PDR_R : lm3s_com.h
  • GPIO_PORTD_PUR_R : lm3s_com.h
  • GPIO_PORTD_RIS_R : lm3s_com.h
  • GPIO_PORTD_SLR_R : lm3s_com.h
  • GPIO_PORTE_AFSEL_R : lm3s_com.h
  • GPIO_PORTE_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTE_BASE : lm3s_memmap.h
  • GPIO_PORTE_CR_R : lm3s_com.h
  • GPIO_PORTE_DATA_BITS_R : lm3s_com.h
  • GPIO_PORTE_DATA_R : lm3s_com.h
  • GPIO_PORTE_DEN_R : lm3s_com.h
  • GPIO_PORTE_DIR_R : lm3s_com.h
  • GPIO_PORTE_DR2R_R : lm3s_com.h
  • GPIO_PORTE_DR4R_R : lm3s_com.h
  • GPIO_PORTE_DR8R_R : lm3s_com.h
  • GPIO_PORTE_IBE_R : lm3s_com.h
  • GPIO_PORTE_ICR_R : lm3s_com.h
  • GPIO_PORTE_IEV_R : lm3s_com.h
  • GPIO_PORTE_IM_R : lm3s_com.h
  • GPIO_PORTE_IS_R : lm3s_com.h
  • GPIO_PORTE_LOCK_R : lm3s_com.h
  • GPIO_PORTE_MIS_R : lm3s_com.h
  • GPIO_PORTE_ODR_R : lm3s_com.h
  • GPIO_PORTE_PDR_R : lm3s_com.h
  • GPIO_PORTE_PUR_R : lm3s_com.h
  • GPIO_PORTE_RIS_R : lm3s_com.h
  • GPIO_PORTE_SLR_R : lm3s_com.h
  • GPIO_PORTF_AFSEL_R : lm3s_com.h
  • GPIO_PORTF_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTF_BASE : lm3s_memmap.h
  • GPIO_PORTF_CR_R : lm3s_com.h
  • GPIO_PORTF_DATA_BITS_R : lm3s_com.h
  • GPIO_PORTF_DATA_R : lm3s_com.h
  • GPIO_PORTF_DEN_R : lm3s_com.h
  • GPIO_PORTF_DIR_R : lm3s_com.h
  • GPIO_PORTF_DR2R_R : lm3s_com.h
  • GPIO_PORTF_DR4R_R : lm3s_com.h
  • GPIO_PORTF_DR8R_R : lm3s_com.h
  • GPIO_PORTF_IBE_R : lm3s_com.h
  • GPIO_PORTF_ICR_R : lm3s_com.h
  • GPIO_PORTF_IEV_R : lm3s_com.h
  • GPIO_PORTF_IM_R : lm3s_com.h
  • GPIO_PORTF_IS_R : lm3s_com.h
  • GPIO_PORTF_LOCK_R : lm3s_com.h
  • GPIO_PORTF_MIS_R : lm3s_com.h
  • GPIO_PORTF_ODR_R : lm3s_com.h
  • GPIO_PORTF_PDR_R : lm3s_com.h
  • GPIO_PORTF_PUR_R : lm3s_com.h
  • GPIO_PORTF_RIS_R : lm3s_com.h
  • GPIO_PORTF_SLR_R : lm3s_com.h
  • GPIO_PORTG_AFSEL_R : lm3s_com.h
  • GPIO_PORTG_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTG_BASE : lm3s_memmap.h
  • GPIO_PORTG_CR_R : lm3s_com.h
  • GPIO_PORTG_DATA_BITS_R : lm3s_com.h
  • GPIO_PORTG_DATA_R : lm3s_com.h
  • GPIO_PORTG_DEN_R : lm3s_com.h
  • GPIO_PORTG_DIR_R : lm3s_com.h
  • GPIO_PORTG_DR2R_R : lm3s_com.h
  • GPIO_PORTG_DR4R_R : lm3s_com.h
  • GPIO_PORTG_DR8R_R : lm3s_com.h
  • GPIO_PORTG_IBE_R : lm3s_com.h
  • GPIO_PORTG_ICR_R : lm3s_com.h
  • GPIO_PORTG_IEV_R : lm3s_com.h
  • GPIO_PORTG_IM_R : lm3s_com.h
  • GPIO_PORTG_IS_R : lm3s_com.h
  • GPIO_PORTG_LOCK_R : lm3s_com.h
  • GPIO_PORTG_MIS_R : lm3s_com.h
  • GPIO_PORTG_ODR_R : lm3s_com.h
  • GPIO_PORTG_PDR_R : lm3s_com.h
  • GPIO_PORTG_PUR_R : lm3s_com.h
  • GPIO_PORTG_RIS_R : lm3s_com.h
  • GPIO_PORTG_SLR_R : lm3s_com.h
  • GPIO_PORTH_AFSEL_R : lm3s_com.h
  • GPIO_PORTH_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTH_BASE : lm3s_memmap.h
  • GPIO_PORTH_CR_R : lm3s_com.h
  • GPIO_PORTH_DATA_BITS_R : lm3s_com.h
  • GPIO_PORTH_DATA_R : lm3s_com.h
  • GPIO_PORTH_DEN_R : lm3s_com.h
  • GPIO_PORTH_DIR_R : lm3s_com.h
  • GPIO_PORTH_DR2R_R : lm3s_com.h
  • GPIO_PORTH_DR4R_R : lm3s_com.h
  • GPIO_PORTH_DR8R_R : lm3s_com.h
  • GPIO_PORTH_IBE_R : lm3s_com.h
  • GPIO_PORTH_ICR_R : lm3s_com.h
  • GPIO_PORTH_IEV_R : lm3s_com.h
  • GPIO_PORTH_IM_R : lm3s_com.h
  • GPIO_PORTH_IS_R : lm3s_com.h
  • GPIO_PORTH_LOCK_R : lm3s_com.h
  • GPIO_PORTH_MIS_R : lm3s_com.h
  • GPIO_PORTH_ODR_R : lm3s_com.h
  • GPIO_PORTH_PDR_R : lm3s_com.h
  • GPIO_PORTH_PUR_R : lm3s_com.h
  • GPIO_PORTH_RIS_R : lm3s_com.h
  • GPIO_PORTH_SLR_R : lm3s_com.h
  • GPIO_PORTJ_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTJ_BASE : lm3s_memmap.h
  • GPIO_RV_AFSEL : lm3s_gpio.h
  • GPIO_RV_DATA : lm3s_gpio.h
  • GPIO_RV_DEN : lm3s_gpio.h
  • GPIO_RV_DIR : lm3s_gpio.h
  • GPIO_RV_DR2R : lm3s_gpio.h
  • GPIO_RV_DR4R : lm3s_gpio.h
  • GPIO_RV_DR8R : lm3s_gpio.h
  • GPIO_RV_IBE : lm3s_gpio.h
  • GPIO_RV_IC : lm3s_gpio.h
  • GPIO_RV_IEV : lm3s_gpio.h
  • GPIO_RV_IM : lm3s_gpio.h
  • GPIO_RV_IS : lm3s_gpio.h
  • GPIO_RV_LOCK : lm3s_gpio.h
  • GPIO_RV_MIS : lm3s_gpio.h
  • GPIO_RV_ODR : lm3s_gpio.h
  • GPIO_RV_PCellID0 : lm3s_gpio.h
  • GPIO_RV_PCellID1 : lm3s_gpio.h
  • GPIO_RV_PCellID2 : lm3s_gpio.h
  • GPIO_RV_PCellID3 : lm3s_gpio.h
  • GPIO_RV_PDR : lm3s_gpio.h
  • GPIO_RV_PeriphID0 : lm3s_gpio.h
  • GPIO_RV_PeriphID1 : lm3s_gpio.h
  • GPIO_RV_PeriphID2 : lm3s_gpio.h
  • GPIO_RV_PeriphID3 : lm3s_gpio.h
  • GPIO_RV_PeriphID4 : lm3s_gpio.h
  • GPIO_RV_PeriphID5 : lm3s_gpio.h
  • GPIO_RV_PeriphID6 : lm3s_gpio.h
  • GPIO_RV_PeriphID7 : lm3s_gpio.h
  • GPIO_RV_PUR : lm3s_gpio.h
  • GPIO_RV_RIS : lm3s_gpio.h
  • GPIO_RV_SLR : lm3s_gpio.h
  • gprmc_callout() : nmea.c , nmea.h
  • gpvtg_callout() : nmea.c , nmea.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- h -

  • hash_begin() : hash.h
  • hash_digest_len() : hash.h
  • hash_final() : hash.h
  • hash_update() : hash.h
  • hdlc_parse() : afsk.c
  • heap_allocmem() : heap.c , heap.h
  • heap_calloc() : heap.c , heap.h
  • HEAP_DEFINE_BUF : heap.h
  • heap_free() : heap.c , heap.h
  • heap_freemem() : heap.c , heap.h
  • heap_freeSpace() : heap.h , heap.c
  • heap_init() : heap.c , heap.h
  • heap_malloc() : heap.c , heap.h
  • HIB_BASE : lm3s_memmap.h
  • HIB_CTL_CLK32EN : lm3s_com.h
  • HIB_CTL_CLKSEL : lm3s_com.h
  • HIB_CTL_HIBREQ : lm3s_com.h
  • HIB_CTL_LOWBATEN : lm3s_com.h
  • HIB_CTL_PINWEN : lm3s_com.h
  • HIB_CTL_R : lm3s_com.h
  • HIB_CTL_RTCEN : lm3s_com.h
  • HIB_CTL_RTCWEN : lm3s_com.h
  • HIB_CTL_VABORT : lm3s_com.h
  • HIB_DATA_R : lm3s_com.h
  • HIB_DATA_RTD_M : lm3s_com.h
  • HIB_DATA_RTD_S : lm3s_com.h
  • HIB_IC_EXTW : lm3s_com.h
  • HIB_IC_LOWBAT : lm3s_com.h
  • HIB_IC_R : lm3s_com.h
  • HIB_IC_RTCALT0 : lm3s_com.h
  • HIB_IC_RTCALT1 : lm3s_com.h
  • HIB_IM_EXTW : lm3s_com.h
  • HIB_IM_LOWBAT : lm3s_com.h
  • HIB_IM_R : lm3s_com.h
  • HIB_IM_RTCALT0 : lm3s_com.h
  • HIB_IM_RTCALT1 : lm3s_com.h
  • HIB_MIS_EXTW : lm3s_com.h
  • HIB_MIS_LOWBAT : lm3s_com.h
  • HIB_MIS_R : lm3s_com.h
  • HIB_MIS_RTCALT0 : lm3s_com.h
  • HIB_MIS_RTCALT1 : lm3s_com.h
  • HIB_RIS_EXTW : lm3s_com.h
  • HIB_RIS_LOWBAT : lm3s_com.h
  • HIB_RIS_R : lm3s_com.h
  • HIB_RIS_RTCALT0 : lm3s_com.h
  • HIB_RIS_RTCALT1 : lm3s_com.h
  • HIB_RTCC_M : lm3s_com.h
  • HIB_RTCC_R : lm3s_com.h
  • HIB_RTCC_S : lm3s_com.h
  • HIB_RTCLD_M : lm3s_com.h
  • HIB_RTCLD_R : lm3s_com.h
  • HIB_RTCLD_S : lm3s_com.h
  • HIB_RTCM0_M : lm3s_com.h
  • HIB_RTCM0_R : lm3s_com.h
  • HIB_RTCM0_S : lm3s_com.h
  • HIB_RTCM1_M : lm3s_com.h
  • HIB_RTCM1_R : lm3s_com.h
  • HIB_RTCM1_S : lm3s_com.h
  • HIB_RTCT_R : lm3s_com.h
  • HIB_RTCT_TRIM_M : lm3s_com.h
  • HIB_RTCT_TRIM_S : lm3s_com.h
  • Hook : compiler.h
  • hook_get_key : hashtable.h
  • hptime_get() : hptime.c , hptime.h
  • hptime_t : timer_dsp56k.h , hptime.h , timer_qt.h , timer_lpc2.h
  • hptime_to_us() : timer.h
  • HSI_VALUE : clock_stm32.h
  • HSION_BITNUMBER : clock_stm32.h
  • ht_find() : hashtable.c , hashtable.h
  • ht_find_str : hashtable.h
  • ht_init() : hashtable.h , hashtable.c
  • ht_insert() : hashtable.c , hashtable.h
  • ht_insert_str : hashtable.h
  • ht_insert_with_key() : hashtable.h , hashtable.c
  • ht_iter_begin() : hashtable.h
  • ht_iter_cmp() : hashtable.h
  • ht_iter_end() : hashtable.h
  • ht_iter_get() : hashtable.h
  • ht_iter_next() : hashtable.h
  • HW_DC_MOTOR_READ_VALUE : hw_dc_motor.h
  • HWREG : types.h
  • HWREGB : types.h
  • HWREGH : types.h
  • hx8347_busInit() : hw_hx8347.h
  • hx8347_cmd() : hw_hx8347.h
  • hx8347_read() : hw_hx8347.h
  • hx8347_write() : hw_hx8347.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- i -

  • I2C0_MASTER_BASE : lm3s_memmap.h
  • I2C0_MASTER_MCR_R : lm3s_com.h
  • I2C0_MASTER_MCS_R : lm3s_com.h
  • I2C0_MASTER_MDR_R : lm3s_com.h
  • I2C0_MASTER_MICR_R : lm3s_com.h
  • I2C0_MASTER_MIMR_R : lm3s_com.h
  • I2C0_MASTER_MMIS_R : lm3s_com.h
  • I2C0_MASTER_MRIS_R : lm3s_com.h
  • I2C0_MASTER_MSA_R : lm3s_com.h
  • I2C0_MASTER_MTPR_R : lm3s_com.h
  • I2C0_MASTER_SCSR_R : lm3s_com.h
  • I2C0_MASTER_SDR_R : lm3s_com.h
  • I2C0_MASTER_SICR_R : lm3s_com.h
  • I2C0_MASTER_SIMR_R : lm3s_com.h
  • I2C0_MASTER_SMIS_R : lm3s_com.h
  • I2C0_MASTER_SOAR_R : lm3s_com.h
  • I2C0_MASTER_SRIS_R : lm3s_com.h
  • I2C0_SLAVE_BASE : lm3s_memmap.h
  • I2C0_SLAVE_MCR_R : lm3s_com.h
  • I2C0_SLAVE_MCS_R : lm3s_com.h
  • I2C0_SLAVE_MDR_R : lm3s_com.h
  • I2C0_SLAVE_MICR_R : lm3s_com.h
  • I2C0_SLAVE_MIMR_R : lm3s_com.h
  • I2C0_SLAVE_MMIS_R : lm3s_com.h
  • I2C0_SLAVE_MRIS_R : lm3s_com.h
  • I2C0_SLAVE_MSA_R : lm3s_com.h
  • I2C0_SLAVE_MTPR_R : lm3s_com.h
  • I2C0_SLAVE_SCSR_R : lm3s_com.h
  • I2C0_SLAVE_SDR_R : lm3s_com.h
  • I2C0_SLAVE_SICR_R : lm3s_com.h
  • I2C0_SLAVE_SIMR_R : lm3s_com.h
  • I2C0_SLAVE_SMIS_R : lm3s_com.h
  • I2C0_SLAVE_SOAR_R : lm3s_com.h
  • I2C0_SLAVE_SRIS_R : lm3s_com.h
  • I2C1_ER_IRQHANDLER : stm32_ints.h
  • I2C1_EV_IRQHANDLER : stm32_ints.h
  • I2C1_MASTER_BASE : lm3s_memmap.h
  • I2C1_MASTER_MCR_R : lm3s_com.h
  • I2C1_MASTER_MCS_R : lm3s_com.h
  • I2C1_MASTER_MDR_R : lm3s_com.h
  • I2C1_MASTER_MICR_R : lm3s_com.h
  • I2C1_MASTER_MIMR_R : lm3s_com.h
  • I2C1_MASTER_MMIS_R : lm3s_com.h
  • I2C1_MASTER_MRIS_R : lm3s_com.h
  • I2C1_MASTER_MSA_R : lm3s_com.h
  • I2C1_MASTER_MTPR_R : lm3s_com.h
  • I2C1_MASTER_SCSR_R : lm3s_com.h
  • I2C1_MASTER_SDR_R : lm3s_com.h
  • I2C1_MASTER_SICR_R : lm3s_com.h
  • I2C1_MASTER_SIMR_R : lm3s_com.h
  • I2C1_MASTER_SMIS_R : lm3s_com.h
  • I2C1_MASTER_SOAR_R : lm3s_com.h
  • I2C1_MASTER_SRIS_R : lm3s_com.h
  • I2C1_SLAVE_BASE : lm3s_memmap.h
  • I2C1_SLAVE_MCR_R : lm3s_com.h
  • I2C1_SLAVE_MCS_R : lm3s_com.h
  • I2C1_SLAVE_MDR_R : lm3s_com.h
  • I2C1_SLAVE_MICR_R : lm3s_com.h
  • I2C1_SLAVE_MIMR_R : lm3s_com.h
  • I2C1_SLAVE_MMIS_R : lm3s_com.h
  • I2C1_SLAVE_MRIS_R : lm3s_com.h
  • I2C1_SLAVE_MSA_R : lm3s_com.h
  • I2C1_SLAVE_MTPR_R : lm3s_com.h
  • I2C1_SLAVE_SCSR_R : lm3s_com.h
  • I2C1_SLAVE_SDR_R : lm3s_com.h
  • I2C1_SLAVE_SICR_R : lm3s_com.h
  • I2C1_SLAVE_SIMR_R : lm3s_com.h
  • I2C1_SLAVE_SMIS_R : lm3s_com.h
  • I2C1_SLAVE_SOAR_R : lm3s_com.h
  • I2C1_SLAVE_SRIS_R : lm3s_com.h
  • I2C2_ER_IRQHANDLER : stm32_ints.h
  • I2C2_EV_IRQHANDLER : stm32_ints.h
  • I2C_ARB_LOST : i2c.h
  • I2C_BACKEND_BITBANG : i2c.h
  • I2C_BACKEND_BUILTIN : i2c.h
  • I2C_BITBANG0 : i2c.h
  • I2C_BITBANG1 : i2c.h
  • I2C_BITBANG_CNT : i2c.h
  • I2C_BITBANG_HW_INIT : hw_i2c_bitbang.h
  • i2c_bitbangInit() : hw_i2c_bitbang.h
  • i2c_builtin_get() : i2c_avr.c , i2c.h
  • i2c_builtin_put() : i2c_avr.c , i2c.h
  • i2c_builtin_start() : i2c_avr.c
  • i2c_builtin_start_r() : i2c_avr.c , i2c.h
  • i2c_builtin_start_w() : i2c_avr.c , i2c.h
  • i2c_builtin_stop() : i2c_avr.c , i2c.h
  • I2C_CNT : i2c_at91.h , i2c_lpc2.h , i2c_avr.h , i2c_stm32.h
  • I2C_DATA_NACK : i2c.h
  • I2C_ERR : i2c.h
  • i2c_error() : i2c.h
  • i2c_getc() : i2c.h
  • I2C_HALFBIT_DELAY : hw_i2c_bitbang.h
  • i2c_halfbitDelay() : hw_i2c_bitbang.h
  • i2c_hw_bitbangInit() : i2c.h , i2c_bitbang.c
  • i2c_hw_init() : i2c_lpc2.c , i2c_avr.c , i2c_lm3s.c , i2c_stm32.c , i2c.h
  • i2c_hw_start() : i2c_avr.c
  • i2c_hw_stop() : i2c_avr.c
  • i2c_init : i2c.h
  • i2c_init_0() : i2c.h
  • i2c_init_3 : i2c.h
  • I2C_LOG_FORMAT : cfg_i2c.h
  • I2C_LOG_LEVEL : cfg_i2c.h
  • I2C_MASTER_CR_LPBK : lm3s_i2c.h
  • I2C_MASTER_CR_MFE : lm3s_i2c.h
  • I2C_MASTER_CR_SFE : lm3s_i2c.h
  • I2C_MASTER_CS_ACK : lm3s_i2c.h
  • I2C_MASTER_CS_ADDR_ACK : lm3s_i2c.h
  • I2C_MASTER_CS_ARB_LOST : lm3s_i2c.h
  • I2C_MASTER_CS_BUS_BUSY : lm3s_i2c.h
  • I2C_MASTER_CS_BUSY : lm3s_i2c.h
  • I2C_MASTER_CS_DATA_ACK : lm3s_i2c.h
  • I2C_MASTER_CS_ERROR : lm3s_i2c.h
  • I2C_MASTER_CS_IDLE : lm3s_i2c.h
  • I2C_MASTER_CS_RUN : lm3s_i2c.h
  • I2C_MASTER_CS_START : lm3s_i2c.h
  • I2C_MASTER_CS_STOP : lm3s_i2c.h
  • I2C_MASTER_IMR_IM : lm3s_i2c.h
  • I2C_MASTER_MICR_IC : lm3s_i2c.h
  • I2C_MASTER_MIS_MIS : lm3s_i2c.h
  • I2C_MASTER_O_CR : lm3s_i2c.h
  • I2C_MASTER_O_CS : lm3s_i2c.h
  • I2C_MASTER_O_DR : lm3s_i2c.h
  • I2C_MASTER_O_IMR : lm3s_i2c.h
  • I2C_MASTER_O_MICR : lm3s_i2c.h
  • I2C_MASTER_O_MIS : lm3s_i2c.h
  • I2C_MASTER_O_RIS : lm3s_i2c.h
  • I2C_MASTER_O_SA : lm3s_i2c.h
  • I2C_MASTER_O_TPR : lm3s_i2c.h
  • I2C_MASTER_RIS_RIS : lm3s_i2c.h
  • I2C_MASTER_SA_RS : lm3s_i2c.h
  • I2C_MASTER_SA_SA_MASK : lm3s_i2c.h
  • I2C_MASTER_TPR_SCL_HP : lm3s_i2c.h
  • I2C_MASTER_TPR_SCL_LP : lm3s_i2c.h
  • I2C_MCR_LPBK : lm3s_com.h , lm3s_i2c.h
  • I2C_MCR_MFE : lm3s_com.h , lm3s_i2c.h
  • I2C_MCR_SFE : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_ACK : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_ADRACK : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_ARBLST : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_BUSBSY : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_BUSY : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_DATACK : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_ERROR : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_IDLE : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_RUN : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_START : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_STOP : lm3s_com.h , lm3s_i2c.h
  • I2C_MDR_DATA_M : lm3s_com.h , lm3s_i2c.h
  • I2C_MDR_DATA_S : lm3s_com.h
  • I2C_MICR_IC : lm3s_com.h , lm3s_i2c.h
  • I2C_MIMR_IM : lm3s_com.h , lm3s_i2c.h
  • I2C_MMIS_MIS : lm3s_com.h , lm3s_i2c.h
  • I2C_MRIS_RIS : lm3s_com.h , lm3s_i2c.h
  • I2C_MSA_ADDR : lm3s_i2c.h
  • I2C_MSA_ADDS : lm3s_i2c.h
  • I2C_MSA_RS : lm3s_com.h , lm3s_i2c.h
  • I2C_MSA_SA_M : lm3s_com.h , lm3s_i2c.h
  • I2C_MSA_SA_S : lm3s_com.h
  • I2C_MTPR_TPR_M : lm3s_com.h , lm3s_i2c.h
  • I2C_MTPR_TPR_S : lm3s_com.h
  • I2C_NO_ACK : i2c.h
  • I2C_NOSTOP : i2c.h
  • I2C_O_MCR : lm3s_i2c.h
  • I2C_O_MCS : lm3s_i2c.h
  • I2C_O_MDR : lm3s_i2c.h
  • I2C_O_MICR : lm3s_i2c.h
  • I2C_O_MIMR : lm3s_i2c.h
  • I2C_O_MMIS : lm3s_i2c.h
  • I2C_O_MRIS : lm3s_i2c.h
  • I2C_O_MSA : lm3s_i2c.h
  • I2C_O_MTPR : lm3s_i2c.h
  • I2C_O_SCSR : lm3s_i2c.h
  • I2C_O_SDR : lm3s_i2c.h
  • I2C_O_SICR : lm3s_i2c.h
  • I2C_O_SIMR : lm3s_i2c.h
  • I2C_O_SLAVE : lm3s_i2c.h
  • I2C_O_SMIS : lm3s_i2c.h
  • I2C_O_SOAR : lm3s_i2c.h
  • I2C_O_SRIS : lm3s_i2c.h
  • I2C_OK : i2c.h
  • i2c_putc() : i2c.h
  • i2c_read() : i2c.h
  • i2c_recv() : i2c.h , i2c.c
  • I2C_SCL_FAST : lm3s_i2c.h
  • I2C_SCL_STANDARD : lm3s_i2c.h
  • I2C_SCSR_DA : lm3s_i2c.h , lm3s_com.h
  • I2C_SCSR_FBR : lm3s_com.h , lm3s_i2c.h
  • I2C_SCSR_RREQ : lm3s_com.h , lm3s_i2c.h
  • I2C_SCSR_TREQ : lm3s_com.h , lm3s_i2c.h
  • I2C_SDR_DATA_M : lm3s_i2c.h , lm3s_com.h
  • I2C_SDR_DATA_S : lm3s_com.h
  • i2c_send() : i2c.c , i2c.h
  • I2C_SICR_DATAIC : lm3s_com.h , lm3s_i2c.h
  • I2C_SICR_IC : lm3s_com.h , lm3s_i2c.h
  • I2C_SICR_STARTIC : lm3s_i2c.h
  • I2C_SICR_STOPIC : lm3s_i2c.h
  • I2C_SIMR_DATAIM : lm3s_com.h , lm3s_i2c.h
  • I2C_SIMR_IM : lm3s_com.h , lm3s_i2c.h
  • I2C_SIMR_STARTIM : lm3s_i2c.h
  • I2C_SIMR_STOPIM : lm3s_i2c.h
  • I2C_SLAVE_CSR_DA : lm3s_i2c.h
  • I2C_SLAVE_CSR_FBR : lm3s_i2c.h
  • I2C_SLAVE_CSR_RREQ : lm3s_i2c.h
  • I2C_SLAVE_CSR_TREQ : lm3s_i2c.h
  • I2C_SLAVE_IMR_IM : lm3s_i2c.h
  • I2C_SLAVE_MIS_MIS : lm3s_i2c.h
  • I2C_SLAVE_O_CSR : lm3s_i2c.h
  • I2C_SLAVE_O_DR : lm3s_i2c.h
  • I2C_SLAVE_O_IM : lm3s_i2c.h
  • I2C_SLAVE_O_MIS : lm3s_i2c.h
  • I2C_SLAVE_O_OAR : lm3s_i2c.h
  • I2C_SLAVE_O_RIS : lm3s_i2c.h
  • I2C_SLAVE_O_SICR : lm3s_i2c.h
  • I2C_SLAVE_RIS_RIS : lm3s_i2c.h
  • I2C_SLAVE_SICR_IC : lm3s_i2c.h
  • I2C_SLAVE_SOAR_OAR_MASK : lm3s_i2c.h
  • I2C_SMIS_DATAMIS : lm3s_i2c.h , lm3s_com.h
  • I2C_SMIS_MIS : lm3s_com.h , lm3s_i2c.h
  • I2C_SMIS_STARTMIS : lm3s_i2c.h
  • I2C_SMIS_STOPMIS : lm3s_i2c.h
  • I2C_SOAR_OAR_M : lm3s_com.h , lm3s_i2c.h
  • I2C_SOAR_OAR_S : lm3s_com.h
  • I2C_SRIS_DATARIS : lm3s_com.h , lm3s_i2c.h
  • I2C_SRIS_RIS : lm3s_com.h , lm3s_i2c.h
  • I2C_SRIS_STARTRIS : lm3s_i2c.h
  • I2C_SRIS_STOPRIS : lm3s_i2c.h
  • i2c_start_r : i2c.h
  • i2c_start_r_4() : i2c.h
  • I2C_START_TIMEOUT : i2c.h
  • i2c_start_w : i2c.h
  • i2c_start_w_4() : i2c.h
  • I2C_STOP : i2c.h
  • i2c_write() : i2c.h
  • I2S0_BASE : lm3s_memmap.h
  • I2S_FIRST_BUF : i2s_at91.h
  • i2s_getBuffer() : i2s_at91.h , i2s_at91.c
  • i2s_getFreeBuffer() : i2s_at91.c , i2s_at91.h
  • i2s_init() : i2s_at91.h , i2s_at91.c
  • I2S_LOG_FORMAT : cfg_i2s.h
  • I2S_LOG_LEVEL : cfg_i2s.h
  • I2S_SECOND_BUF : i2s_at91.h
  • i2s_start() : i2s_at91.c , i2s_at91.h
  • ICMP_DEBUG : cfg_lwip.h
  • ICMP_TTL : cfg_lwip.h
  • id_t : macros.h
  • IGMP_DEBUG : cfg_lwip.h
  • INET_DEBUG : cfg_lwip.h
  • ini_getString() : ini_reader.h , ini_reader.c
  • inode_t : battfs.h
  • INSERT_BEFORE : list.h
  • insert_char() : readline.c
  • insert_chars() : readline.c
  • INT_ADC0 : lm3s_ints.h
  • INT_ADC1 : lm3s_ints.h
  • INT_ADC1SS0 : lm3s_ints.h
  • INT_ADC1SS1 : lm3s_ints.h
  • INT_ADC1SS2 : lm3s_ints.h
  • INT_ADC1SS3 : lm3s_ints.h
  • INT_ADC2 : lm3s_ints.h
  • INT_ADC3 : lm3s_ints.h
  • INT_CAN0 : lm3s_ints.h
  • INT_CAN1 : lm3s_ints.h
  • INT_CAN2 : lm3s_ints.h
  • INT_COMP0 : lm3s_ints.h
  • INT_COMP1 : lm3s_ints.h
  • INT_COMP2 : lm3s_ints.h
  • INT_EPI0 : lm3s_ints.h
  • INT_ETH : lm3s_ints.h
  • INT_FLASH : lm3s_ints.h
  • INT_GPIOA : lm3s_ints.h
  • INT_GPIOB : lm3s_ints.h
  • INT_GPIOC : lm3s_ints.h
  • INT_GPIOD : lm3s_ints.h
  • INT_GPIOE : lm3s_ints.h
  • INT_GPIOF : lm3s_ints.h
  • INT_GPIOG : lm3s_ints.h
  • INT_GPIOH : lm3s_ints.h
  • INT_GPIOJ : lm3s_ints.h
  • INT_HIBERNATE : lm3s_ints.h
  • INT_I2C0 : lm3s_ints.h
  • INT_I2C1 : lm3s_ints.h
  • INT_I2S0 : lm3s_ints.h
  • INT_MULT : macros.h
  • INT_PERIPH_BASE : sam3_ints.h
  • INT_PWM0 : lm3s_ints.h
  • INT_PWM1 : lm3s_ints.h
  • INT_PWM2 : lm3s_ints.h
  • INT_PWM3 : lm3s_ints.h
  • INT_PWM_FAULT : lm3s_ints.h
  • INT_QEI0 : lm3s_ints.h
  • INT_QEI1 : lm3s_ints.h
  • INT_SSI0 : lm3s_ints.h
  • INT_SSI1 : lm3s_ints.h
  • INT_SYSCTL : lm3s_ints.h
  • INT_TIMER0A : lm3s_ints.h
  • INT_TIMER0B : lm3s_ints.h
  • INT_TIMER1A : lm3s_ints.h
  • INT_TIMER1B : lm3s_ints.h
  • INT_TIMER2A : lm3s_ints.h
  • INT_TIMER2B : lm3s_ints.h
  • INT_TIMER3A : lm3s_ints.h
  • INT_TIMER3B : lm3s_ints.h
  • INT_UART0 : lm3s_ints.h
  • INT_UART1 : lm3s_ints.h
  • INT_UART2 : lm3s_ints.h
  • INT_UDMA : lm3s_ints.h
  • INT_UDMAERR : lm3s_ints.h
  • INT_USB0 : lm3s_ints.h
  • INT_WATCHDOG : lm3s_ints.h
  • INTERNAL_KEY_MAX_LENGTH : hashtable.h
  • IP_DEBUG : cfg_lwip.h
  • IP_DEFAULT_TTL : cfg_lwip.h
  • IP_FORWARD : cfg_lwip.h
  • IP_FRAG : cfg_lwip.h
  • IP_FRAG_MAX_MTU : cfg_lwip.h
  • IP_FRAG_USES_STATIC_BUF : cfg_lwip.h
  • IP_OPTIONS_ALLOWED : cfg_lwip.h
  • IP_REASS_DEBUG : cfg_lwip.h
  • IP_REASS_MAX_PBUFS : cfg_lwip.h
  • IP_REASS_MAXAGE : cfg_lwip.h
  • IP_REASSEMBLY : cfg_lwip.h
  • IP_SOF_BROADCAST : cfg_lwip.h
  • IP_SOF_BROADCAST_RECV : cfg_lwip.h
  • iptr_t : compiler.h
  • irq_handler_t : at91_aic.h
  • irq_t : stepper_at91.h , stepper_avr.h
  • is_aligned() : macros.h
  • IS_CTS_ON : ser_mega.c , ser_xmega.c
  • is_history_begin() : readline.c
  • is_history_end() : readline.c
  • is_history_past_end() : readline.c
  • IS_MISO_HIGH : hw_spi.h
  • IS_POW2 : macros.h
  • IS_WORD_SEPARATOR : readline.c
  • ISR_PROTO() : stepper_at91.c
  • ISR_PROTO_CONTEXT_SWITCH() : timer_lpc2.h
  • ITM_BASE : lm3s_memmap.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- p -

  • PAGE_UNSET_SENTINEL : battfs.h
  • parseArgs() : parser.c
  • parser_execute_cmd() : parser.h
  • parser_get_cmd_arguments() : parser.c , parser.h
  • parser_get_cmd_template() : parser.c , parser.h
  • parser_init() : parser.c , parser.h
  • parser_process_line() : parser.c , parser.h
  • parser_register_cmd() : parser.c , parser.h
  • parser_rl_match() : parser.c , parser.h
  • password2key() : util.c
  • PAUSE : attr.h
  • PBUF_DEBUG : cfg_lwip.h
  • PBUF_LINK_HLEN : cfg_lwip.h
  • PBUF_POOL_BUFSIZE : cfg_lwip.h
  • PBUF_POOL_SIZE : cfg_lwip.h
  • pcf8574_get_2() : pcf8574.c , pcf8574.h
  • pcf8574_init_3() : pcf8574.c , pcf8574.h
  • pcf8574_put_3() : pcf8574.c , pcf8574.h
  • PCF8574ID : pcf8574.h
  • PF_FREESTACK : proc_p.h
  • pgaddr_t : battfs.h
  • pgcnt_t : battfs.h
  • pgoff_t : battfs.h
  • phase_init() : phase.c , phase.h
  • phase_setDuty() : phase.c , phase.h
  • phase_setDutyUnlock() : phase.c , phase.h
  • phase_setPower() : phase.c , phase.h
  • phase_softint() : phase.c
  • PICNT_MASK : at91_pit.h
  • PICNT_SHIFT : at91_pit.h
  • pid_control_init() : pid_control.c , pid_control.h
  • pid_control_reset() : pid_control.h
  • pid_control_setPeriod() : pid_control.h
  • pid_control_setPid() : pid_control.h
  • pid_control_update() : pid_control.c , pid_control.h
  • PID_LOG_FORMAT : cfg_pid.h
  • PID_LOG_LEVEL : cfg_pid.h
  • pidk_t : pid_control.h
  • PIIR : at91_pit.h
  • PIIR_OFF : at91_pit.h
  • PIO_CODR_OFF : at91_pio.h , sam3_pio.h
  • PIO_IDR_OFF : at91_pio.h , sam3_pio.h
  • PIO_IER_OFF : at91_pio.h , sam3_pio.h
  • PIO_IFDR_OFF : at91_pio.h , sam3_pio.h
  • PIO_IFER_OFF : at91_pio.h , sam3_pio.h
  • PIO_IFSR_OFF : at91_pio.h , sam3_pio.h
  • PIO_IMR_OFF : at91_pio.h , sam3_pio.h
  • PIO_ISR_OFF : at91_pio.h , sam3_pio.h
  • PIO_MDDR_OFF : sam3_pio.h
  • PIO_MDER_OFF : sam3_pio.h
  • PIO_MDSR_OFF : sam3_pio.h
  • PIO_ODR_OFF : at91_pio.h , sam3_pio.h
  • PIO_ODSR_OFF : at91_pio.h , sam3_pio.h
  • PIO_OER_OFF : at91_pio.h , sam3_pio.h
  • PIO_OSR_OFF : at91_pio.h , sam3_pio.h
  • PIO_OWDR_OFF : sam3_pio.h
  • PIO_OWER_OFF : sam3_pio.h
  • PIO_OWSR_OFF : sam3_pio.h
  • PIO_PDR_OFF : at91_pio.h , sam3_pio.h
  • PIO_PDSR_OFF : at91_pio.h , sam3_pio.h
  • PIO_PER_OFF : at91_pio.h , sam3_pio.h
  • PIO_PERIPH_SEL : sam3_pio.h
  • PIO_PSR_OFF : at91_pio.h , sam3_pio.h
  • PIO_PUDR_OFF : sam3_pio.h
  • PIO_PUER_OFF : sam3_pio.h
  • PIO_PUSR_OFF : sam3_pio.h
  • PIO_SODR_OFF : at91_pio.h , sam3_pio.h
  • PIOA_ABCDSR1 : sam3_pio.h
  • PIOA_ABCDSR2 : sam3_pio.h
  • PIOA_ACCESS : sam3_pio.h
  • PIOA_BASE : sam3_pio.h
  • PIOA_CODR : sam3_pio.h
  • PIOA_IDR : sam3_pio.h
  • PIOA_IER : sam3_pio.h
  • PIOA_IFDR : sam3_pio.h
  • PIOA_IFER : sam3_pio.h
  • PIOA_IFSR : sam3_pio.h
  • PIOA_IMR : sam3_pio.h
  • PIOA_ISR : sam3_pio.h
  • PIOA_MDDR : sam3_pio.h
  • PIOA_MDER : sam3_pio.h
  • PIOA_MDSR : sam3_pio.h
  • PIOA_ODR : sam3_pio.h
  • PIOA_ODSR : sam3_pio.h
  • PIOA_OER : sam3_pio.h
  • PIOA_OSR : sam3_pio.h
  • PIOA_OWDR : sam3_pio.h
  • PIOA_OWER : sam3_pio.h
  • PIOA_OWSR : sam3_pio.h
  • PIOA_PDR : sam3_pio.h
  • PIOA_PDSR : sam3_pio.h
  • PIOA_PER : sam3_pio.h
  • PIOA_PSR : sam3_pio.h
  • PIOA_PUDR : sam3_pio.h
  • PIOA_PUER : sam3_pio.h
  • PIOA_PUSR : sam3_pio.h
  • PIOA_SODR : sam3_pio.h
  • PIOB_ABCDSR1 : sam3_pio.h
  • PIOB_ABCDSR2 : sam3_pio.h
  • PIOB_ACCESS : sam3_pio.h
  • PIOB_BASE : sam3_pio.h
  • PIOB_CODR : sam3_pio.h
  • PIOB_IDR : sam3_pio.h
  • PIOB_IER : sam3_pio.h
  • PIOB_IFDR : sam3_pio.h
  • PIOB_IFER : sam3_pio.h
  • PIOB_IFSR : sam3_pio.h
  • PIOB_IMR : sam3_pio.h
  • PIOB_ISR : sam3_pio.h
  • PIOB_MDDR : sam3_pio.h
  • PIOB_MDER : sam3_pio.h
  • PIOB_MDSR : sam3_pio.h
  • PIOB_ODR : sam3_pio.h
  • PIOB_ODSR : sam3_pio.h
  • PIOB_OER : sam3_pio.h
  • PIOB_OSR : sam3_pio.h
  • PIOB_OWDR : sam3_pio.h
  • PIOB_OWER : sam3_pio.h
  • PIOB_OWSR : sam3_pio.h
  • PIOB_PDR : sam3_pio.h
  • PIOB_PDSR : sam3_pio.h
  • PIOB_PER : sam3_pio.h
  • PIOB_PSR : sam3_pio.h
  • PIOB_PUDR : sam3_pio.h
  • PIOB_PUER : sam3_pio.h
  • PIOB_PUSR : sam3_pio.h
  • PIOB_SODR : sam3_pio.h
  • PIOC_ABCDSR1 : sam3_pio.h
  • PIOC_ABCDSR2 : sam3_pio.h
  • PIOC_ACCESS : sam3_pio.h
  • PIOC_BASE : sam3_pio.h
  • PIOC_CODR : sam3_pio.h
  • PIOC_IDR : sam3_pio.h
  • PIOC_IER : sam3_pio.h
  • PIOC_IFDR : sam3_pio.h
  • PIOC_IFER : sam3_pio.h
  • PIOC_IFSR : sam3_pio.h
  • PIOC_IMR : sam3_pio.h
  • PIOC_ISR : sam3_pio.h
  • PIOC_MDDR : sam3_pio.h
  • PIOC_MDER : sam3_pio.h
  • PIOC_MDSR : sam3_pio.h
  • PIOC_ODR : sam3_pio.h
  • PIOC_ODSR : sam3_pio.h
  • PIOC_OER : sam3_pio.h
  • PIOC_OSR : sam3_pio.h
  • PIOC_OWDR : sam3_pio.h
  • PIOC_OWER : sam3_pio.h
  • PIOC_OWSR : sam3_pio.h
  • PIOC_PDR : sam3_pio.h
  • PIOC_PDSR : sam3_pio.h
  • PIOC_PER : sam3_pio.h
  • PIOC_PSR : sam3_pio.h
  • PIOC_PUDR : sam3_pio.h
  • PIOC_PUER : sam3_pio.h
  • PIOC_PUSR : sam3_pio.h
  • PIOC_SODR : sam3_pio.h
  • PIT_MR : at91_pit.h
  • PIT_MR_OFF : at91_pit.h
  • pit_setEnable() : sysirq_at91.c
  • PIT_SR : at91_pit.h
  • PIT_SR_OFF : at91_pit.h
  • PITEN : at91_pit.h
  • PITIEN : at91_pit.h
  • PITS : at91_pit.h
  • PIV_MASK : at91_pit.h
  • PIV_SHIFT : at91_pit.h
  • PIVR : at91_pit.h
  • PIVR_OFF : at91_pit.h
  • PKTCMD_NULL : pocketcmd.h
  • PLL_MUL_VAL : init_at91.c
  • PLLON_BITNUMBER : clock_stm32.h
  • PMC_BASE : sam3_pmc.h
  • PMC_CSS_MAIN_CLK : at91_pmc.h
  • PMC_CSS_MASK : at91_pmc.h
  • PMC_CSS_PLL_CLK : at91_pmc.h
  • PMC_CSS_SLOW_CLK : at91_pmc.h
  • PMC_FOCR : sam3_pmc.h
  • PMC_FOCR_FOCLR : sam3_pmc.h
  • PMC_FOCR_OFF : sam3_pmc.h
  • PMC_FSMR : sam3_pmc.h
  • PMC_FSMR_FSTT0 : sam3_pmc.h
  • PMC_FSMR_FSTT1 : sam3_pmc.h
  • PMC_FSMR_FSTT10 : sam3_pmc.h
  • PMC_FSMR_FSTT11 : sam3_pmc.h
  • PMC_FSMR_FSTT12 : sam3_pmc.h
  • PMC_FSMR_FSTT13 : sam3_pmc.h
  • PMC_FSMR_FSTT14 : sam3_pmc.h
  • PMC_FSMR_FSTT15 : sam3_pmc.h
  • PMC_FSMR_FSTT2 : sam3_pmc.h
  • PMC_FSMR_FSTT3 : sam3_pmc.h
  • PMC_FSMR_FSTT4 : sam3_pmc.h
  • PMC_FSMR_FSTT5 : sam3_pmc.h
  • PMC_FSMR_FSTT6 : sam3_pmc.h
  • PMC_FSMR_FSTT7 : sam3_pmc.h
  • PMC_FSMR_FSTT8 : sam3_pmc.h
  • PMC_FSMR_FSTT9 : sam3_pmc.h
  • PMC_FSMR_LPM : sam3_pmc.h
  • PMC_FSMR_OFF : sam3_pmc.h
  • PMC_FSMR_RTCAL : sam3_pmc.h
  • PMC_FSMR_RTTAL : sam3_pmc.h
  • PMC_FSPR : sam3_pmc.h
  • PMC_FSPR_FSTP0 : sam3_pmc.h
  • PMC_FSPR_FSTP1 : sam3_pmc.h
  • PMC_FSPR_FSTP10 : sam3_pmc.h
  • PMC_FSPR_FSTP11 : sam3_pmc.h
  • PMC_FSPR_FSTP12 : sam3_pmc.h
  • PMC_FSPR_FSTP13 : sam3_pmc.h
  • PMC_FSPR_FSTP14 : sam3_pmc.h
  • PMC_FSPR_FSTP15 : sam3_pmc.h
  • PMC_FSPR_FSTP2 : sam3_pmc.h
  • PMC_FSPR_FSTP3 : sam3_pmc.h
  • PMC_FSPR_FSTP4 : sam3_pmc.h
  • PMC_FSPR_FSTP5 : sam3_pmc.h
  • PMC_FSPR_FSTP6 : sam3_pmc.h
  • PMC_FSPR_FSTP7 : sam3_pmc.h
  • PMC_FSPR_FSTP8 : sam3_pmc.h
  • PMC_FSPR_FSTP9 : sam3_pmc.h
  • PMC_FSPR_OFF : sam3_pmc.h
  • PMC_IDR : at91_pmc.h , sam3_pmc.h
  • PMC_IDR_CFDEV : sam3_pmc.h
  • PMC_IDR_LOCK : sam3_pmc.h
  • PMC_IDR_MCKRDY : sam3_pmc.h
  • PMC_IDR_MOSCRCS : sam3_pmc.h
  • PMC_IDR_MOSCSELS : sam3_pmc.h
  • PMC_IDR_MOSCXTS : sam3_pmc.h
  • PMC_IDR_OFF : at91_pmc.h , sam3_pmc.h
  • PMC_IDR_PCKRDY0 : sam3_pmc.h
  • PMC_IDR_PCKRDY1 : sam3_pmc.h
  • PMC_IDR_PCKRDY2 : sam3_pmc.h
  • PMC_IER : at91_pmc.h , sam3_pmc.h
  • PMC_IER_CFDEV : sam3_pmc.h
  • PMC_IER_LOCK : sam3_pmc.h
  • PMC_IER_MCKRDY : sam3_pmc.h
  • PMC_IER_MOSCRCS : sam3_pmc.h
  • PMC_IER_MOSCSELS : sam3_pmc.h
  • PMC_IER_MOSCXTS : sam3_pmc.h
  • PMC_IER_OFF : at91_pmc.h , sam3_pmc.h
  • PMC_IER_PCKRDY0 : sam3_pmc.h
  • PMC_IER_PCKRDY1 : sam3_pmc.h
  • PMC_IER_PCKRDY2 : sam3_pmc.h
  • PMC_IMR : at91_pmc.h , sam3_pmc.h
  • PMC_IMR_CFDEV : sam3_pmc.h
  • PMC_IMR_LOCK : sam3_pmc.h
  • PMC_IMR_MCKRDY : sam3_pmc.h
  • PMC_IMR_MOSCRCS : sam3_pmc.h
  • PMC_IMR_MOSCSELS : sam3_pmc.h
  • PMC_IMR_MOSCXTS : sam3_pmc.h
  • PMC_IMR_OFF : at91_pmc.h , sam3_pmc.h
  • PMC_IMR_PCKRDY0 : sam3_pmc.h
  • PMC_IMR_PCKRDY1 : sam3_pmc.h
  • PMC_IMR_PCKRDY2 : sam3_pmc.h
  • PMC_LOCK : at91_pmc.h
  • PMC_MCFR_OFF : sam3_pmc.h
  • PMC_MCKR : at91_pmc.h , sam3_pmc.h
  • PMC_MCKR_CSS_MAIN_CLK : sam3_pmc.h
  • PMC_MCKR_CSS_MASK : sam3_pmc.h
  • PMC_MCKR_CSS_PLL_CLK : sam3_pmc.h
  • PMC_MCKR_CSS_SLOW_CLK : sam3_pmc.h
  • PMC_MCKR_OFF : at91_pmc.h , sam3_pmc.h
  • PMC_MCKR_PLLDIV2 : sam3_pmc.h
  • PMC_MCKR_PRES_CLK : sam3_pmc.h
  • PMC_MCKR_PRES_CLK_16 : sam3_pmc.h
  • PMC_MCKR_PRES_CLK_2 : sam3_pmc.h
  • PMC_MCKR_PRES_CLK_3 : sam3_pmc.h
  • PMC_MCKR_PRES_CLK_32 : sam3_pmc.h
  • PMC_MCKR_PRES_CLK_4 : sam3_pmc.h
  • PMC_MCKR_PRES_CLK_64 : sam3_pmc.h
  • PMC_MCKR_PRES_CLK_8 : sam3_pmc.h
  • PMC_MCKR_PRES_MASK : sam3_pmc.h
  • PMC_MCKR_PRES_SHIFT : sam3_pmc.h
  • PMC_MCKRDY : at91_pmc.h
  • PMC_MOR_OFF : sam3_pmc.h
  • PMC_MOSCS : at91_pmc.h
  • PMC_OCR_CAL12 : sam3_pmc.h
  • PMC_OCR_CAL12_MASK : sam3_pmc.h
  • PMC_OCR_CAL12_SHIFT : sam3_pmc.h
  • PMC_OCR_CAL4 : sam3_pmc.h
  • PMC_OCR_CAL4_MASK : sam3_pmc.h
  • PMC_OCR_CAL8 : sam3_pmc.h
  • PMC_OCR_CAL8_MASK : sam3_pmc.h
  • PMC_OCR_CAL8_SHIFT : sam3_pmc.h
  • PMC_OCR_SEL12 : sam3_pmc.h
  • PMC_OCR_SEL4 : sam3_pmc.h
  • PMC_OCR_SEL8 : sam3_pmc.h
  • PMC_PCDR : at91_pmc.h
  • PMC_PCDR_OFF : at91_pmc.h
  • PMC_PCER : at91_pmc.h
  • PMC_PCER_OFF : at91_pmc.h
  • PMC_PCK : at91_pmc.h
  • PMC_PCK0 : at91_pmc.h
  • PMC_PCK1 : at91_pmc.h
  • PMC_PCK2 : at91_pmc.h
  • PMC_PCK_CSS_MAIN : sam3_pmc.h
  • PMC_PCK_CSS_MASK : sam3_pmc.h
  • PMC_PCK_CSS_MCK : sam3_pmc.h
  • PMC_PCK_CSS_PLL : sam3_pmc.h
  • PMC_PCK_CSS_SLOW : sam3_pmc.h
  • PMC_PCK_PRES_CLK : sam3_pmc.h
  • PMC_PCK_PRES_CLK_16 : sam3_pmc.h
  • PMC_PCK_PRES_CLK_2 : sam3_pmc.h
  • PMC_PCK_PRES_CLK_32 : sam3_pmc.h
  • PMC_PCK_PRES_CLK_4 : sam3_pmc.h
  • PMC_PCK_PRES_CLK_64 : sam3_pmc.h
  • PMC_PCK_PRES_CLK_8 : sam3_pmc.h
  • PMC_PCK_PRES_MASK : sam3_pmc.h
  • PMC_PCK_PRES_SHIFT : sam3_pmc.h
  • PMC_PCKR0 : at91_pmc.h
  • PMC_PCKR0_OFF : at91_pmc.h
  • PMC_PCKR1 : at91_pmc.h
  • PMC_PCKR1_OFF : at91_pmc.h
  • PMC_PCKR2 : at91_pmc.h
  • PMC_PCKR2_OFF : at91_pmc.h
  • PMC_PCKRDY0 : at91_pmc.h
  • PMC_PCKRDY1 : at91_pmc.h
  • PMC_PCKRDY2 : at91_pmc.h
  • PMC_PCSR : at91_pmc.h
  • PMC_PCSR_OFF : at91_pmc.h
  • pmc_periphDisable() : sam3_pmc.h
  • pmc_periphEnable() : sam3_pmc.h
  • PMC_PRES_CLK : at91_pmc.h
  • PMC_PRES_CLK_16 : at91_pmc.h
  • PMC_PRES_CLK_2 : at91_pmc.h
  • PMC_PRES_CLK_32 : at91_pmc.h
  • PMC_PRES_CLK_4 : at91_pmc.h
  • PMC_PRES_CLK_64 : at91_pmc.h
  • PMC_PRES_CLK_8 : at91_pmc.h
  • PMC_PRES_MASK : at91_pmc.h
  • PMC_PRES_SHIFT : at91_pmc.h
  • PMC_SCDR : at91_pmc.h , sam3_pmc.h
  • PMC_SCDR_OFF : at91_pmc.h , sam3_pmc.h
  • PMC_SCDR_PCK0 : sam3_pmc.h
  • PMC_SCDR_PCK1 : sam3_pmc.h
  • PMC_SCDR_PCK2 : sam3_pmc.h
  • PMC_SCER : at91_pmc.h , sam3_pmc.h
  • PMC_SCER_OFF : at91_pmc.h , sam3_pmc.h
  • PMC_SCER_PCK0 : sam3_pmc.h
  • PMC_SCER_PCK1 : sam3_pmc.h
  • PMC_SCER_PCK2 : sam3_pmc.h
  • PMC_SCSR : at91_pmc.h , sam3_pmc.h
  • PMC_SCSR_OFF : at91_pmc.h , sam3_pmc.h
  • PMC_SCSR_PCK0 : sam3_pmc.h
  • PMC_SCSR_PCK1 : sam3_pmc.h
  • PMC_SCSR_PCK2 : sam3_pmc.h
  • PMC_SR : at91_pmc.h , sam3_pmc.h
  • PMC_SR_CFDEV : sam3_pmc.h
  • PMC_SR_CFDS : sam3_pmc.h
  • PMC_SR_FOS : sam3_pmc.h
  • PMC_SR_LOCK : sam3_pmc.h
  • PMC_SR_MCKRDY : sam3_pmc.h
  • PMC_SR_MOSCRCS : sam3_pmc.h
  • PMC_SR_MOSCSELS : sam3_pmc.h
  • PMC_SR_MOSCXTS : sam3_pmc.h
  • PMC_SR_OFF : at91_pmc.h , sam3_pmc.h
  • PMC_SR_OSCSELS : sam3_pmc.h
  • PMC_SR_PCKRDY0 : sam3_pmc.h
  • PMC_SR_PCKRDY1 : sam3_pmc.h
  • PMC_SR_PCKRDY2 : sam3_pmc.h
  • PMC_UDP : at91_pmc.h
  • PMC_WPMR : sam3_pmc.h
  • PMC_WPMR_OFF : sam3_pmc.h
  • PMC_WPMR_WPEN : sam3_pmc.h
  • PMC_WPMR_WPKEY : sam3_pmc.h
  • PMC_WPMR_WPKEY_MASK : sam3_pmc.h
  • PMC_WPMR_WPKEY_SHIFT : sam3_pmc.h
  • PMC_WPSR : sam3_pmc.h
  • PMC_WPSR_OFF : sam3_pmc.h
  • PMC_WPSR_WPVS : sam3_pmc.h
  • PMC_WPSR_WPVSRC_MASK : sam3_pmc.h
  • PMC_WPSR_WPVSRC_SHIFT : sam3_pmc.h
  • POCKETBUS_ACK : pocketbus.h
  • pocketbus_addr_t : pocketbus.h
  • pocketbus_begin() : pocketbus.c , pocketbus.h
  • POCKETBUS_BROADCAST_ADDR : pocketbus.h
  • pocketbus_end() : pocketbus.c , pocketbus.h
  • POCKETBUS_ESC : pocketbus.h
  • POCKETBUS_ETX : pocketbus.h
  • pocketbus_init() : pocketbus.c , pocketbus.h
  • pocketbus_len_t : pocketbus.h
  • POCKETBUS_LOG_FORMAT : cfg_pocketbus.h
  • POCKETBUS_LOG_LEVEL : cfg_pocketbus.h
  • POCKETBUS_NAK : pocketbus.h
  • pocketbus_putchar() : pocketbus.c , pocketbus.h
  • pocketbus_recv() : pocketbus.c , pocketbus.h
  • pocketbus_send() : pocketbus.h , pocketbus.c
  • POCKETBUS_STX : pocketbus.h
  • pocketbus_write() : pocketbus.c , pocketbus.h
  • pocketcmd_checkNak() : pocketcmd.h
  • pocketcmd_hook_t : pocketcmd.h
  • pocketcmd_init() : pocketcmd.c , pocketcmd.h
  • pocketcmd_lookup_t : pocketcmd.h
  • pocketcmd_masterSend() : pocketcmd.h
  • pocketcmd_poll() : pocketcmd.c , pocketcmd.h
  • pocketcmd_recv() : pocketcmd.c , pocketcmd.h
  • pocketcmd_replyAck() : pocketcmd.c , pocketcmd.h
  • pocketcmd_replyNak() : pocketcmd.c , pocketcmd.h
  • pocketcmd_send() : pocketcmd.c , pocketcmd.h
  • pocketcmd_setAddr() : pocketcmd.h
  • pocketcmd_slaveReply() : pocketcmd.h
  • pocketcmd_t : pocketcmd.h
  • pool_alloc : pool.h
  • pool_empty : pool.h
  • pool_free : pool.h
  • pool_init : pool.h
  • PP_CAT : compiler.h
  • PP_COUNT : macros.h
  • PP_STRINGIZE : compiler.h
  • PPP_DEBUG : cfg_lwip.h
  • PPP_SUPPORT : cfg_lwip.h
  • PPP_THREAD_NAME : cfg_lwip.h
  • PPP_THREAD_PRIO : cfg_lwip.h
  • PPP_THREAD_STACKSIZE : cfg_lwip.h
  • PPPOE_SUPPORT : cfg_lwip.h
  • PPPOS_SUPPORT : cfg_lwip.h
  • prng_generate() : prng.h
  • prng_reseed() : prng.h
  • prng_seed_len() : prng.h
  • proc_allowed : proc.h
  • PROC_ATOMIC : proc.h
  • proc_current() : proc.h
  • proc_currentName() : proc.c , proc.h
  • proc_currentUserData() : proc.h
  • PROC_DEFINE_STACK : proc.h
  • proc_entry() : proc_p.h , proc.c
  • proc_exit() : proc.c , proc.h
  • proc_forbid() : proc.h
  • proc_init() : proc.c , proc.h
  • proc_name() : proc.c , proc.h
  • proc_needPreempt() : proc.c , proc.h
  • proc_new : proc.h
  • proc_new_with_name() : proc.c
  • proc_permit() : proc.h
  • proc_preempt() : proc.c , proc.h
  • proc_preemptAllowed() : proc.h
  • proc_ready_list : proc.c , proc_p.h
  • proc_rename() : proc.c , proc.h
  • proc_schedule() : proc.c
  • proc_setPri() : proc.c , proc.h
  • proc_switch() : proc_p.h , proc.c
  • proc_wakeup() : proc.c , proc_p.h
  • proc_yield() : proc.c , proc.h
  • PULSE_HIGH : hw_sipo.h
  • PULSE_LOW : hw_sipo.h
  • PVD_IRQHANDLER : stm32_ints.h
  • PWM_0_CMPA_R : lm3s_com.h
  • PWM_0_CMPB_R : lm3s_com.h
  • PWM_0_COUNT_R : lm3s_com.h
  • PWM_0_CTL_R : lm3s_com.h
  • PWM_0_DBCTL_R : lm3s_com.h
  • PWM_0_DBFALL_R : lm3s_com.h
  • PWM_0_DBRISE_R : lm3s_com.h
  • PWM_0_GENA_R : lm3s_com.h
  • PWM_0_GENB_R : lm3s_com.h
  • PWM_0_INTEN_R : lm3s_com.h
  • PWM_0_ISC_R : lm3s_com.h
  • PWM_0_LOAD_R : lm3s_com.h
  • PWM_0_RIS_R : lm3s_com.h
  • PWM_1_CMPA_R : lm3s_com.h
  • PWM_1_CMPB_R : lm3s_com.h
  • PWM_1_COUNT_R : lm3s_com.h
  • PWM_1_CTL_R : lm3s_com.h
  • PWM_1_DBCTL_R : lm3s_com.h
  • PWM_1_DBFALL_R : lm3s_com.h
  • PWM_1_DBRISE_R : lm3s_com.h
  • PWM_1_GENA_R : lm3s_com.h
  • PWM_1_GENB_R : lm3s_com.h
  • PWM_1_INTEN_R : lm3s_com.h
  • PWM_1_ISC_R : lm3s_com.h
  • PWM_1_LOAD_R : lm3s_com.h
  • PWM_1_RIS_R : lm3s_com.h
  • PWM_2_CMPA_R : lm3s_com.h
  • PWM_2_CMPB_R : lm3s_com.h
  • PWM_2_COUNT_R : lm3s_com.h
  • PWM_2_CTL_R : lm3s_com.h
  • PWM_2_DBCTL_R : lm3s_com.h
  • PWM_2_DBFALL_R : lm3s_com.h
  • PWM_2_DBRISE_R : lm3s_com.h
  • PWM_2_GENA_R : lm3s_com.h
  • PWM_2_GENB_R : lm3s_com.h
  • PWM_2_INTEN_R : lm3s_com.h
  • PWM_2_ISC_R : lm3s_com.h
  • PWM_2_LOAD_R : lm3s_com.h
  • PWM_2_RIS_R : lm3s_com.h
  • PWM_BASE : lm3s_memmap.h
  • PWM_CALG : at91_pwm.h
  • PWM_CCNT0 : at91_pwm.h
  • PWM_CCNT1 : at91_pwm.h
  • PWM_CCNT2 : at91_pwm.h
  • PWM_CCNT3 : at91_pwm.h
  • PWM_CCNT_OFF : at91_pwm.h
  • PWM_CDTY0 : at91_pwm.h
  • PWM_CDTY1 : at91_pwm.h
  • PWM_CDTY2 : at91_pwm.h
  • PWM_CDTY3 : at91_pwm.h
  • PWM_CDTY_OFF : at91_pwm.h
  • PWM_CH0_OFF : at91_pwm.h
  • PWM_CH1_OFF : at91_pwm.h
  • PWM_CH2_OFF : at91_pwm.h
  • PWM_CH3_OFF : at91_pwm.h
  • PWM_CHID0 : at91_pwm.h
  • PWM_CHID1 : at91_pwm.h
  • PWM_CHID2 : at91_pwm.h
  • PWM_CHID3 : at91_pwm.h
  • PWM_CHID_MASK : at91_pwm.h
  • PWM_CMR0 : at91_pwm.h
  • PWM_CMR1 : at91_pwm.h
  • PWM_CMR2 : at91_pwm.h
  • PWM_CMR3 : at91_pwm.h
  • PWM_CMR_OFF : at91_pwm.h
  • PWM_CPD : at91_pwm.h
  • PWM_CPOL : at91_pwm.h
  • PWM_CPRD0 : at91_pwm.h
  • PWM_CPRD1 : at91_pwm.h
  • PWM_CPRD2 : at91_pwm.h
  • PWM_CPRD3 : at91_pwm.h
  • PWM_CPRD_OFF : at91_pwm.h
  • PWM_CPRE_CLKA : at91_pwm.h
  • PWM_CPRE_CLKB : at91_pwm.h
  • PWM_CPRE_MCK : at91_pwm.h
  • PWM_CPRE_MCK_DIV1024 : at91_pwm.h
  • PWM_CPRE_MCK_DIV128 : at91_pwm.h
  • PWM_CPRE_MCK_DIV16 : at91_pwm.h
  • PWM_CPRE_MCK_DIV2 : at91_pwm.h
  • PWM_CPRE_MCK_DIV256 : at91_pwm.h
  • PWM_CPRE_MCK_DIV32 : at91_pwm.h
  • PWM_CPRE_MCK_DIV4 : at91_pwm.h
  • PWM_CPRE_MCK_DIV512 : at91_pwm.h
  • PWM_CPRE_MCK_DIV64 : at91_pwm.h
  • PWM_CPRE_MCK_DIV8 : at91_pwm.h
  • PWM_CPRE_MCK_MASK : at91_pwm.h
  • PWM_CTL_GLOBALSYNC0 : lm3s_com.h
  • PWM_CTL_GLOBALSYNC1 : lm3s_com.h
  • PWM_CTL_GLOBALSYNC2 : lm3s_com.h
  • PWM_CTL_GLOBALSYNC3 : lm3s_pwm.h
  • PWM_CTL_R : lm3s_com.h
  • PWM_CUPD0 : at91_pwm.h
  • PWM_CUPD1 : at91_pwm.h
  • PWM_CUPD2 : at91_pwm.h
  • PWM_CUPD3 : at91_pwm.h
  • PWM_CUPD_OFF : at91_pwm.h
  • PWM_DIS : at91_pwm.h
  • PWM_DIS_OFF : at91_pwm.h
  • pwm_duty_t : pwm.h
  • PWM_ENA : at91_pwm.h
  • PWM_ENA_OFF : at91_pwm.h
  • pwm_enable() : pwm.c , pwm.h
  • PWM_ENABLE_PWM0EN : lm3s_com.h
  • PWM_ENABLE_PWM1EN : lm3s_com.h
  • PWM_ENABLE_PWM2EN : lm3s_com.h
  • PWM_ENABLE_PWM3EN : lm3s_com.h
  • PWM_ENABLE_PWM4EN : lm3s_com.h
  • PWM_ENABLE_PWM5EN : lm3s_com.h
  • PWM_ENABLE_PWM7EN : lm3s_pwm.h
  • PWM_ENABLE_R : lm3s_com.h
  • PWM_ENUPD_ENUPD7_M : lm3s_pwm.h
  • PWM_FAULT_FAULT0 : lm3s_com.h
  • PWM_FAULT_FAULT1 : lm3s_com.h
  • PWM_FAULT_FAULT2 : lm3s_com.h
  • PWM_FAULT_FAULT3 : lm3s_com.h
  • PWM_FAULT_FAULT4 : lm3s_com.h
  • PWM_FAULT_FAULT5 : lm3s_com.h
  • PWM_FAULT_FAULT7 : lm3s_pwm.h
  • PWM_FAULT_R : lm3s_com.h
  • PWM_FAULTVAL_PWM7 : lm3s_pwm.h
  • pwm_freq_t : pwm.h
  • pwm_hw_disable() : pwm_avr.c , pwm_avr.h
  • pwm_hw_enable() : pwm_avr.h , pwm_avr.c
  • pwm_hw_getPeriod() : pwm_avr.h , pwm_avr.c
  • pwm_hw_init() : pwm_avr.h , pwm_avr.c
  • pwm_hw_setDutyUnlock() : pwm_avr.h , pwm_avr.c
  • pwm_hw_setFrequency() : pwm_avr.h , pwm_avr.c
  • pwm_hw_setPolarity() : pwm_avr.c , pwm_avr.h
  • PWM_IDR : at91_pwm.h
  • PWM_IDR_OFF : at91_pwm.h
  • PWM_IER : at91_pwm.h
  • PWM_IER_OFF : at91_pwm.h
  • PWM_IMR : at91_pwm.h
  • PWM_IMR_OFF : at91_pwm.h
  • pwm_init() : pwm.c , pwm.h
  • PWM_INTEN_INTFAULT : lm3s_com.h
  • PWM_INTEN_INTFAULT3 : lm3s_pwm.h
  • PWM_INTEN_INTPWM0 : lm3s_com.h
  • PWM_INTEN_INTPWM1 : lm3s_com.h
  • PWM_INTEN_INTPWM2 : lm3s_com.h
  • PWM_INTEN_R : lm3s_com.h
  • PWM_INVERT_PWM0INV : lm3s_com.h
  • PWM_INVERT_PWM1INV : lm3s_com.h
  • PWM_INVERT_PWM2INV : lm3s_com.h
  • PWM_INVERT_PWM3INV : lm3s_com.h
  • PWM_INVERT_PWM4INV : lm3s_com.h
  • PWM_INVERT_PWM5INV : lm3s_com.h
  • PWM_INVERT_PWM7INV : lm3s_pwm.h
  • PWM_INVERT_R : lm3s_com.h
  • PWM_ISC_INTFAULT : lm3s_com.h
  • PWM_ISC_INTFAULT3 : lm3s_pwm.h
  • PWM_ISC_INTPWM0 : lm3s_com.h
  • PWM_ISC_INTPWM1 : lm3s_com.h
  • PWM_ISC_INTPWM2 : lm3s_com.h
  • PWM_ISC_R : lm3s_com.h
  • PWM_ISR : at91_pwm.h
  • PWM_ISR_OFF : at91_pwm.h
  • PWM_LOG_FORMAT : cfg_pwm.h
  • PWM_LOG_LEVEL : cfg_pwm.h
  • PWM_MAX_DUTY : pwm.h
  • PWM_MR : at91_pwm.h
  • PWM_MR_DIVA_MASK : at91_pwm.h
  • PWM_MR_DIVA_SHIFT : at91_pwm.h
  • PWM_MR_DIVB_MASK : at91_pwm.h
  • PWM_MR_DIVB_SHIFT : at91_pwm.h
  • PWM_MR_OFF : at91_pwm.h
  • PWM_MR_PRE_MCK : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV1024 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV128 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV16 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV2 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV256 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV32 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV4 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV512 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV64 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV8 : at91_pwm.h
  • PWM_MR_PREA_MASK : at91_pwm.h
  • PWM_MR_PREA_SHIFT : at91_pwm.h
  • PWM_MR_PREB_MASK : at91_pwm.h
  • PWM_MR_PREB_SHIFT : at91_pwm.h
  • PWM_O_CTL : lm3s_pwm.h
  • PWM_O_X_CTL : lm3s_pwm.h
  • PWM_O_X_FLTSEN : lm3s_pwm.h
  • pwm_period_t : pwm_avr.h
  • PWM_POL_HIGH_PULSE : pwm.h
  • PWM_POL_LOW_PULSE : pwm.h
  • PWM_POL_NEGATIVE : pwm.h
  • PWM_POL_POSITIVE : pwm.h
  • PWM_RIS_INTFAULT : lm3s_com.h
  • PWM_RIS_INTFAULT3 : lm3s_pwm.h
  • PWM_RIS_INTPWM0 : lm3s_com.h
  • PWM_RIS_INTPWM1 : lm3s_com.h
  • PWM_RIS_INTPWM2 : lm3s_com.h
  • PWM_RIS_R : lm3s_com.h
  • pwm_setDuty() : pwm.c , pwm.h
  • pwm_setFrequency() : pwm.h , pwm.c
  • pwm_setPolarity() : pwm.c , pwm.h
  • PWM_SR : at91_pwm.h
  • PWM_SR_OFF : at91_pwm.h
  • PWM_STATUS_FAULT : lm3s_com.h
  • PWM_STATUS_FAULT3 : lm3s_pwm.h
  • PWM_STATUS_R : lm3s_com.h
  • PWM_SYNC_R : lm3s_com.h
  • PWM_SYNC_SYNC0 : lm3s_com.h
  • PWM_SYNC_SYNC1 : lm3s_com.h
  • PWM_SYNC_SYNC2 : lm3s_com.h
  • PWM_SYNC_SYNC3 : lm3s_pwm.h
  • PWM_X_CMPA_M : lm3s_pwm.h , lm3s_com.h
  • PWM_X_CMPA_S : lm3s_com.h
  • PWM_X_CMPB_M : lm3s_com.h , lm3s_pwm.h
  • PWM_X_CMPB_S : lm3s_com.h
  • PWM_X_COUNT_M : lm3s_pwm.h , lm3s_com.h
  • PWM_X_COUNT_S : lm3s_com.h
  • PWM_X_CTL_CMPAUPD : lm3s_com.h
  • PWM_X_CTL_CMPBUPD : lm3s_com.h
  • PWM_X_CTL_DEBUG : lm3s_com.h
  • PWM_X_CTL_ENABLE : lm3s_com.h
  • PWM_X_CTL_LATCH : lm3s_pwm.h
  • PWM_X_CTL_LOADUPD : lm3s_com.h
  • PWM_X_CTL_MODE : lm3s_com.h
  • PWM_X_DBCTL_ENABLE : lm3s_com.h , lm3s_pwm.h
  • PWM_X_DBFALL_DELAY_M : lm3s_com.h , lm3s_pwm.h
  • PWM_X_DBFALL_DELAY_S : lm3s_com.h
  • PWM_X_DBRISE_DELAY_M : lm3s_com.h , lm3s_pwm.h
  • PWM_X_DBRISE_DELAY_S : lm3s_com.h
  • PWM_X_FLTSEN_FAULT3 : lm3s_pwm.h
  • PWM_X_FLTSRC0_FAULT3 : lm3s_pwm.h
  • PWM_X_FLTSRC1_DCMP7 : lm3s_pwm.h
  • PWM_X_FLTSTAT0_FAULT3 : lm3s_pwm.h
  • PWM_X_FLTSTAT1_DCMP7 : lm3s_pwm.h
  • PWM_X_GENA_ACTCMPAD_INV : lm3s_com.h
  • PWM_X_GENA_ACTCMPAD_M : lm3s_com.h
  • PWM_X_GENA_ACTCMPAD_NONE : lm3s_com.h
  • PWM_X_GENA_ACTCMPAD_ONE : lm3s_com.h
  • PWM_X_GENA_ACTCMPAD_ZERO : lm3s_com.h
  • PWM_X_GENA_ACTCMPAU_INV : lm3s_com.h
  • PWM_X_GENA_ACTCMPAU_M : lm3s_com.h
  • PWM_X_GENA_ACTCMPAU_NONE : lm3s_com.h
  • PWM_X_GENA_ACTCMPAU_ONE : lm3s_com.h
  • PWM_X_GENA_ACTCMPAU_ZERO : lm3s_com.h
  • PWM_X_GENA_ACTCMPBD_INV : lm3s_com.h
  • PWM_X_GENA_ACTCMPBD_M : lm3s_pwm.h , lm3s_com.h
  • PWM_X_GENA_ACTCMPBD_NONE : lm3s_com.h
  • PWM_X_GENA_ACTCMPBD_ONE : lm3s_com.h
  • PWM_X_GENA_ACTCMPBD_ZERO : lm3s_com.h
  • PWM_X_GENA_ACTCMPBU_INV : lm3s_com.h
  • PWM_X_GENA_ACTCMPBU_M : lm3s_com.h
  • PWM_X_GENA_ACTCMPBU_NONE : lm3s_com.h
  • PWM_X_GENA_ACTCMPBU_ONE : lm3s_com.h
  • PWM_X_GENA_ACTCMPBU_ZERO : lm3s_com.h
  • PWM_X_GENA_ACTLOAD_INV : lm3s_com.h
  • PWM_X_GENA_ACTLOAD_M : lm3s_com.h
  • PWM_X_GENA_ACTLOAD_NONE : lm3s_com.h
  • PWM_X_GENA_ACTLOAD_ONE : lm3s_com.h
  • PWM_X_GENA_ACTLOAD_ZERO : lm3s_com.h
  • PWM_X_GENA_ACTZERO_INV : lm3s_com.h
  • PWM_X_GENA_ACTZERO_M : lm3s_com.h
  • PWM_X_GENA_ACTZERO_NONE : lm3s_com.h
  • PWM_X_GENA_ACTZERO_ONE : lm3s_com.h
  • PWM_X_GENA_ACTZERO_ZERO : lm3s_com.h
  • PWM_X_GENB_ACTCMPAD_INV : lm3s_com.h
  • PWM_X_GENB_ACTCMPAD_M : lm3s_com.h
  • PWM_X_GENB_ACTCMPAD_NONE : lm3s_com.h
  • PWM_X_GENB_ACTCMPAD_ONE : lm3s_com.h
  • PWM_X_GENB_ACTCMPAD_ZERO : lm3s_com.h
  • PWM_X_GENB_ACTCMPAU_INV : lm3s_com.h
  • PWM_X_GENB_ACTCMPAU_M : lm3s_com.h
  • PWM_X_GENB_ACTCMPAU_NONE : lm3s_com.h
  • PWM_X_GENB_ACTCMPAU_ONE : lm3s_com.h
  • PWM_X_GENB_ACTCMPAU_ZERO : lm3s_com.h
  • PWM_X_GENB_ACTCMPBD_INV : lm3s_com.h
  • PWM_X_GENB_ACTCMPBD_M : lm3s_com.h , lm3s_pwm.h
  • PWM_X_GENB_ACTCMPBD_NONE : lm3s_com.h
  • PWM_X_GENB_ACTCMPBD_ONE : lm3s_com.h
  • PWM_X_GENB_ACTCMPBD_ZERO : lm3s_com.h
  • PWM_X_GENB_ACTCMPBU_INV : lm3s_com.h
  • PWM_X_GENB_ACTCMPBU_M : lm3s_com.h
  • PWM_X_GENB_ACTCMPBU_NONE : lm3s_com.h
  • PWM_X_GENB_ACTCMPBU_ONE : lm3s_com.h
  • PWM_X_GENB_ACTCMPBU_ZERO : lm3s_com.h
  • PWM_X_GENB_ACTLOAD_INV : lm3s_com.h
  • PWM_X_GENB_ACTLOAD_M : lm3s_com.h
  • PWM_X_GENB_ACTLOAD_NONE : lm3s_com.h
  • PWM_X_GENB_ACTLOAD_ONE : lm3s_com.h
  • PWM_X_GENB_ACTLOAD_ZERO : lm3s_com.h
  • PWM_X_GENB_ACTZERO_INV : lm3s_com.h
  • PWM_X_GENB_ACTZERO_M : lm3s_com.h
  • PWM_X_GENB_ACTZERO_NONE : lm3s_com.h
  • PWM_X_GENB_ACTZERO_ONE : lm3s_com.h
  • PWM_X_GENB_ACTZERO_ZERO : lm3s_com.h
  • PWM_X_INTEN_INTCMPAD : lm3s_com.h
  • PWM_X_INTEN_INTCMPAU : lm3s_com.h
  • PWM_X_INTEN_INTCMPBD : lm3s_com.h
  • PWM_X_INTEN_INTCMPBU : lm3s_com.h
  • PWM_X_INTEN_INTCNTLOAD : lm3s_com.h
  • PWM_X_INTEN_INTCNTZERO : lm3s_com.h
  • PWM_X_INTEN_TRCMPAD : lm3s_com.h
  • PWM_X_INTEN_TRCMPAU : lm3s_com.h
  • PWM_X_INTEN_TRCMPBD : lm3s_pwm.h , lm3s_com.h
  • PWM_X_INTEN_TRCMPBU : lm3s_com.h
  • PWM_X_INTEN_TRCNTLOAD : lm3s_com.h
  • PWM_X_INTEN_TRCNTZERO : lm3s_com.h
  • PWM_X_ISC_INTCMPAD : lm3s_com.h
  • PWM_X_ISC_INTCMPAU : lm3s_com.h
  • PWM_X_ISC_INTCMPBD : lm3s_pwm.h , lm3s_com.h
  • PWM_X_ISC_INTCMPBU : lm3s_com.h
  • PWM_X_ISC_INTCNTLOAD : lm3s_com.h
  • PWM_X_ISC_INTCNTZERO : lm3s_com.h
  • PWM_X_LOAD_M : lm3s_com.h , lm3s_pwm.h
  • PWM_X_LOAD_S : lm3s_com.h
  • PWM_X_MINFLTPER_M : lm3s_pwm.h
  • PWM_X_RIS_INTCMPAD : lm3s_com.h
  • PWM_X_RIS_INTCMPAU : lm3s_com.h
  • PWM_X_RIS_INTCMPBD : lm3s_pwm.h , lm3s_com.h
  • PWM_X_RIS_INTCMPBU : lm3s_com.h
  • PWM_X_RIS_INTCNTLOAD : lm3s_com.h
  • PWM_X_RIS_INTCNTZERO : lm3s_com.h
  • PwmPolarity : pwm.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- q -

  • QEI0_BASE : lm3s_memmap.h
  • QEI0_COUNT_R : lm3s_com.h
  • QEI0_CTL_R : lm3s_com.h
  • QEI0_INTEN_R : lm3s_com.h
  • QEI0_ISC_R : lm3s_com.h
  • QEI0_LOAD_R : lm3s_com.h
  • QEI0_MAXPOS_R : lm3s_com.h
  • QEI0_POS_R : lm3s_com.h
  • QEI0_RIS_R : lm3s_com.h
  • QEI0_SPEED_R : lm3s_com.h
  • QEI0_STAT_R : lm3s_com.h
  • QEI0_TIME_R : lm3s_com.h
  • QEI1_BASE : lm3s_memmap.h
  • QEI1_COUNT_R : lm3s_com.h
  • QEI1_CTL_R : lm3s_com.h
  • QEI1_INTEN_R : lm3s_com.h
  • QEI1_ISC_R : lm3s_com.h
  • QEI1_LOAD_R : lm3s_com.h
  • QEI1_MAXPOS_R : lm3s_com.h
  • QEI1_POS_R : lm3s_com.h
  • QEI1_RIS_R : lm3s_com.h
  • QEI1_SPEED_R : lm3s_com.h
  • QEI1_STAT_R : lm3s_com.h
  • QEI1_TIME_R : lm3s_com.h
  • QEI_COUNT_M : lm3s_com.h
  • QEI_COUNT_S : lm3s_com.h
  • QEI_CTL_CAPMODE : lm3s_com.h
  • QEI_CTL_ENABLE : lm3s_com.h
  • QEI_CTL_INVA : lm3s_com.h
  • QEI_CTL_INVB : lm3s_com.h
  • QEI_CTL_INVI : lm3s_com.h
  • QEI_CTL_RESMODE : lm3s_com.h
  • QEI_CTL_SIGMODE : lm3s_com.h
  • QEI_CTL_STALLEN : lm3s_com.h
  • QEI_CTL_SWAP : lm3s_com.h
  • QEI_CTL_VELDIV_1 : lm3s_com.h
  • QEI_CTL_VELDIV_128 : lm3s_com.h
  • QEI_CTL_VELDIV_16 : lm3s_com.h
  • QEI_CTL_VELDIV_2 : lm3s_com.h
  • QEI_CTL_VELDIV_32 : lm3s_com.h
  • QEI_CTL_VELDIV_4 : lm3s_com.h
  • QEI_CTL_VELDIV_64 : lm3s_com.h
  • QEI_CTL_VELDIV_8 : lm3s_com.h
  • QEI_CTL_VELDIV_M : lm3s_com.h
  • QEI_CTL_VELEN : lm3s_com.h
  • QEI_INTEN_DIR : lm3s_com.h
  • QEI_INTEN_ERROR : lm3s_com.h
  • QEI_INTEN_INDEX : lm3s_com.h
  • QEI_INTEN_TIMER : lm3s_com.h
  • QEI_ISC_DIR : lm3s_com.h
  • QEI_ISC_ERROR : lm3s_com.h
  • QEI_ISC_INDEX : lm3s_com.h
  • QEI_ISC_TIMER : lm3s_com.h
  • QEI_LOAD_M : lm3s_com.h
  • QEI_LOAD_S : lm3s_com.h
  • QEI_MAXPOS_M : lm3s_com.h
  • QEI_MAXPOS_S : lm3s_com.h
  • QEI_POS_M : lm3s_com.h
  • QEI_POS_S : lm3s_com.h
  • QEI_RIS_DIR : lm3s_com.h
  • QEI_RIS_ERROR : lm3s_com.h
  • QEI_RIS_INDEX : lm3s_com.h
  • QEI_RIS_TIMER : lm3s_com.h
  • QEI_SPEED_M : lm3s_com.h
  • QEI_SPEED_S : lm3s_com.h
  • QEI_STAT_DIRECTION : lm3s_com.h
  • QEI_STAT_ERROR : lm3s_com.h
  • QEI_TIME_M : lm3s_com.h
  • QEI_TIME_S : lm3s_com.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- r -

  • R : md2.c
  • RAMP_CLOCK_SHIFT_PRECISION : cfg_ramp.h
  • RAMP_DEF_MAXFREQ : cfg_ramp.h
  • RAMP_DEF_MINFREQ : cfg_ramp.h
  • RAMP_DEF_POWERIDLE : cfg_ramp.h
  • RAMP_DEF_POWERRUN : cfg_ramp.h
  • RAMP_DEF_TIME : cfg_ramp.h
  • ramp_default() : ramp.c , ramp.h
  • ramp_evaluate() : ramp.c , ramp.h
  • RAMP_PULSE_WIDTH : cfg_ramp.h
  • ramp_setup() : ramp.c , ramp.h
  • ramp_testSetup() : ramp.h
  • RAMP_USE_FLOATING_POINT : cfg_ramp.h
  • rand() : rand.c , rand.h
  • RANDOM_LOG_FORMAT : cfg_random.h
  • RANDOM_LOG_LEVEL : cfg_random.h
  • RANDOM_SECURITY_LEVEL : cfg_random.h
  • randpool_add() : randpool.c , randpool.h
  • randpool_get() : randpool.c , randpool.h
  • randpool_init() : randpool.c , randpool.h
  • randpool_pool() : randpool.c , randpool.h
  • randpool_size() : randpool.c , randpool.h
  • RAW_DEBUG : cfg_lwip.h
  • RAW_TTL : cfg_lwip.h
  • RC_ERROR : parser.h
  • RC_OK : parser.h
  • RC_REPLY : parser.h
  • RC_SKIP : parser.h
  • RCC_APB1_ALL : clock_stm32.h
  • RCC_APB1_BKP : clock_stm32.h
  • RCC_APB1_CAN : clock_stm32.h
  • RCC_APB1_I2C1 : clock_stm32.h
  • RCC_APB1_I2C2 : clock_stm32.h
  • RCC_APB1_PWR : clock_stm32.h
  • RCC_APB1_SPI2 : clock_stm32.h
  • RCC_APB1_TIM2 : clock_stm32.h
  • RCC_APB1_TIM3 : clock_stm32.h
  • RCC_APB1_TIM4 : clock_stm32.h
  • RCC_APB1_USART2 : clock_stm32.h
  • RCC_APB1_USART3 : clock_stm32.h
  • RCC_APB1_USB : clock_stm32.h
  • RCC_APB1_WWDG : clock_stm32.h
  • RCC_APB2_ADC1 : clock_stm32.h
  • RCC_APB2_ADC2 : clock_stm32.h
  • RCC_APB2_AFIO : clock_stm32.h
  • RCC_APB2_ALL : clock_stm32.h
  • RCC_APB2_GPIOA : clock_stm32.h
  • RCC_APB2_GPIOB : clock_stm32.h
  • RCC_APB2_GPIOC : clock_stm32.h
  • RCC_APB2_GPIOD : clock_stm32.h
  • RCC_APB2_GPIOE : clock_stm32.h
  • RCC_APB2_SPI1 : clock_stm32.h
  • RCC_APB2_TIM1 : clock_stm32.h
  • RCC_APB2_USART1 : clock_stm32.h
  • RCC_BDCR_LSEON : clock_stm32.h
  • RCC_BDCR_LSERDY : clock_stm32.h
  • RCC_BDCR_RTCEN : clock_stm32.h
  • RCC_BDCR_RTCSEL : clock_stm32.h
  • RCC_FLAG_HSERDY : clock_stm32.h
  • RCC_FLAG_HSIRDY : clock_stm32.h
  • RCC_FLAG_IWDGRST : clock_stm32.h
  • RCC_FLAG_LPWRRST : clock_stm32.h
  • RCC_FLAG_LSERDY : clock_stm32.h
  • RCC_FLAG_LSIRDY : clock_stm32.h
  • RCC_FLAG_PINRST : clock_stm32.h
  • RCC_FLAG_PLLRDY : clock_stm32.h
  • RCC_FLAG_PORRST : clock_stm32.h
  • RCC_FLAG_SFTRST : clock_stm32.h
  • RCC_FLAG_WWDGRST : clock_stm32.h
  • RCC_HCLK_DIV1 : clock_stm32.h
  • RCC_HCLK_DIV16 : clock_stm32.h
  • RCC_HCLK_DIV2 : clock_stm32.h
  • RCC_HCLK_DIV4 : clock_stm32.h
  • RCC_HCLK_DIV8 : clock_stm32.h
  • RCC_IRQHANDLER : stm32_ints.h
  • RCC_PCLK2_DIV2 : clock_stm32.h
  • RCC_PCLK2_DIV4 : clock_stm32.h
  • RCC_PCLK2_DIV6 : clock_stm32.h
  • RCC_PCLK2_DIV8 : clock_stm32.h
  • RCC_PLL_HSE_DIV1 : clock_stm32.h
  • RCC_PLL_HSE_DIV2 : clock_stm32.h
  • RCC_PLL_HSI_DIV2 : clock_stm32.h
  • RCC_PLLMUL_10 : clock_stm32.h
  • RCC_PLLMUL_11 : clock_stm32.h
  • RCC_PLLMUL_12 : clock_stm32.h
  • RCC_PLLMUL_13 : clock_stm32.h
  • RCC_PLLMUL_14 : clock_stm32.h
  • RCC_PLLMUL_15 : clock_stm32.h
  • RCC_PLLMUL_16 : clock_stm32.h
  • RCC_PLLMUL_2 : clock_stm32.h
  • RCC_PLLMUL_3 : clock_stm32.h
  • RCC_PLLMUL_4 : clock_stm32.h
  • RCC_PLLMUL_5 : clock_stm32.h
  • RCC_PLLMUL_6 : clock_stm32.h
  • RCC_PLLMUL_7 : clock_stm32.h
  • RCC_PLLMUL_8 : clock_stm32.h
  • RCC_PLLMUL_9 : clock_stm32.h
  • RCC_SYSCLK_DIV1 : clock_stm32.h
  • RCC_SYSCLK_DIV128 : clock_stm32.h
  • RCC_SYSCLK_DIV16 : clock_stm32.h
  • RCC_SYSCLK_DIV2 : clock_stm32.h
  • RCC_SYSCLK_DIV256 : clock_stm32.h
  • RCC_SYSCLK_DIV4 : clock_stm32.h
  • RCC_SYSCLK_DIV512 : clock_stm32.h
  • RCC_SYSCLK_DIV64 : clock_stm32.h
  • RCC_SYSCLK_DIV8 : clock_stm32.h
  • RCC_SYSCLK_HSE : clock_stm32.h
  • RCC_SYSCLK_HSI : clock_stm32.h
  • RCC_SYSCLK_PLLCLK : clock_stm32.h
  • RCC_USBCLK_PLLCLK_1DIV5 : clock_stm32.h
  • RCC_USBCLK_PLLCLK_DIV1 : clock_stm32.h
  • readHdr() : battfs.c
  • RECT_HEIGHT : gfx.h
  • RECT_WIDTH : gfx.h
  • RECV_BUFSIZE_DEFAULT : cfg_lwip.h
  • REGISTER_CMD : parser.h
  • REMOVE : list.h
  • RenderHook : menu.h
  • RESET_PULSE_WIDTH : dataflash.h
  • ResMan_Alloc() : resource.h
  • ResMan_Free() : resource.h
  • ResultCode : parser.h
  • REVERSE_FOREACH_NODE : list.h
  • REVERSE_UINT8 : macros.h
  • REVISION_IS_A0 : lm3s_types.h
  • REVISION_IS_A1 : lm3s_types.h
  • REVISION_IS_A2 : lm3s_types.h
  • REVISION_IS_B0 : lm3s_types.h
  • REVISION_IS_B1 : lm3s_types.h
  • REVISION_IS_C0 : lm3s_types.h
  • REVISION_IS_C1 : lm3s_types.h
  • REVISION_IS_C2 : lm3s_types.h
  • rl_getc() : readline.c
  • RL_KEYS : readline.c
  • rl_putc() : readline.c
  • rl_puts() : readline.c
  • rle() : rle.c , algo/rle.h
  • rotating_init() : rotating_hash.h
  • rotating_update() : rotating_hash.h
  • rotating_update1() : rotating_hash.h
  • ROTL : macros.h
  • ROTR : macros.h
  • ROUND_UP2 : macros.h
  • ROUNDS : tea.h
  • RSTC_BODIEN : sam3_rstc.h , at91_rstc.h
  • RSTC_BODSTS : at91_rstc.h , sam3_rstc.h
  • RSTC_CR : sam3_rstc.h , at91_rstc.h
  • RSTC_ERSTL_MASK : at91_rstc.h , sam3_rstc.h
  • RSTC_ERSTL_SHIFT : sam3_rstc.h , at91_rstc.h
  • RSTC_EXTRST : sam3_rstc.h , at91_rstc.h
  • RSTC_KEY : at91_rstc.h , sam3_rstc.h
  • RSTC_MR : sam3_rstc.h , at91_rstc.h
  • RSTC_NRSTL : at91_rstc.h , sam3_rstc.h
  • RSTC_PERRST : at91_rstc.h , sam3_rstc.h
  • RSTC_PROCRST : at91_rstc.h , sam3_rstc.h
  • RSTC_RSTTYP_BROWNOUT : at91_rstc.h , sam3_rstc.h
  • RSTC_RSTTYP_MASK : sam3_rstc.h , at91_rstc.h
  • RSTC_RSTTYP_POWERUP : at91_rstc.h , sam3_rstc.h
  • RSTC_RSTTYP_SOFTWARE : sam3_rstc.h , at91_rstc.h
  • RSTC_RSTTYP_USER : at91_rstc.h , sam3_rstc.h
  • RSTC_RSTTYP_WATCHDOG : sam3_rstc.h , at91_rstc.h
  • RSTC_SR : sam3_rstc.h , at91_rstc.h
  • RSTC_SRCMP : at91_rstc.h , sam3_rstc.h
  • RSTC_URSTEN : sam3_rstc.h , at91_rstc.h
  • RSTC_URSTIEN : at91_rstc.h , sam3_rstc.h
  • RSTC_URSTS : sam3_rstc.h , at91_rstc.h
  • RTC_IRQHANDLER : stm32_ints.h
  • RTCALARM_IRQHANDLER : stm32_ints.h
  • RTCEN_BITNUMBER : clock_stm32.h
  • RTS_OFF : ser_xmega.c , ser_mega.c
  • RTS_ON : ser_xmega.c , ser_mega.c
  • RX_FIFO_SIZE : lm3s_ssi.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- s -

  • SAMPLERATE : afsk.h
  • SCHED_ENQUEUE : proc_p.h
  • sched_reenqueue() : proc_p.h
  • SCK : hw_spi.h
  • SCK_ACTIVE : hw_spi.h
  • SCK_HIGH : hw_spi.h
  • SCK_INACTIVE : hw_spi.h
  • SCK_LOW : hw_spi.h
  • SCK_OUT : hw_spi.h
  • SCK_PULSE : hw_spi.h
  • sd_init : sd.h
  • SD_LOG_FORMAT : cfg_sd.h
  • SD_LOG_LEVEL : cfg_sd.h
  • SD_UNBUFFERED : sd.h
  • sem_attempt() : sem.h , sem.c
  • sem_init() : sem.c , sem.h
  • sem_obtain() : sem.c , sem.h
  • sem_release() : sem.c , sem.h
  • send_cmd() : dataflash.c
  • seq_t : battfs.h
  • ser_close() : ser.c
  • SER_CNT : ser_at91.h , ser_mega.h , ser_xmega.h , ser_sam3.h , ser_dsp56k.h
  • ser_flush() : ser.c
  • ser_getchar() : ser.c
  • ser_getchar_nowait() : ser.c , ser.h
  • ser_init() : ser.c , ser.h
  • ser_open() : ser.c
  • ser_purge() : ser.c , ser.h
  • ser_purgeRx() : ser.c , ser.h
  • ser_purgeTx() : ser.c , ser.h
  • ser_putchar() : ser.c
  • ser_read() : ser.c
  • ser_reopen() : ser.c
  • ser_setbaudrate() : ser.c , ser.h
  • ser_setparity() : ser.c , ser.h
  • SER_SPI0_BUS_TXCLOSE : ser_at91.c , ser_sam3.c
  • SER_SPI0_BUS_TXINIT : ser_at91.c , ser_sam3.c
  • SER_SPI_BUS_TXCLOSE : ser_mega.c
  • SER_SPI_BUS_TXINIT : ser_mega.c
  • SER_UART0_BUS_TXBEGIN : ser_at91.c , ser_mega.c , ser_sam3.c
  • SER_UART0_BUS_TXCHAR : ser_at91.c , ser_mega.c , ser_sam3.c
  • SER_UART0_BUS_TXEND : ser_mega.c , ser_sam3.c , ser_at91.c
  • SER_UART0_BUS_TXINIT : ser_at91.c , ser_mega.c , ser_sam3.c
  • SER_UART0_BUS_TXOFF : ser_mega.c
  • SER_UART1_BUS_TXBEGIN : ser_at91.c , ser_mega.c
  • SER_UART1_BUS_TXCHAR : ser_at91.c , ser_mega.c
  • SER_UART1_BUS_TXEND : ser_at91.c , ser_mega.c
  • SER_UART1_BUS_TXINIT : ser_at91.c , ser_mega.c
  • SER_UART1_BUS_TXOFF : ser_mega.c
  • SER_UART2_BUS_TXBEGIN : ser_mega.c
  • SER_UART2_BUS_TXCHAR : ser_mega.c
  • SER_UART2_BUS_TXEND : ser_mega.c
  • SER_UART2_BUS_TXINIT : ser_mega.c
  • SER_UART2_BUS_TXOFF : ser_mega.c
  • SER_UART3_BUS_TXBEGIN : ser_mega.c
  • SER_UART3_BUS_TXCHAR : ser_mega.c
  • SER_UART3_BUS_TXEND : ser_mega.c
  • SER_UART3_BUS_TXINIT : ser_mega.c
  • SER_UART3_BUS_TXOFF : ser_mega.c
  • ser_write() : ser.c
  • serial_errors : ser.h
  • SERIRQ_PRIORITY : ser_at91.c , ser_sam3.c
  • SERRF_FRAMEERROR : ser_at91.h , ser_mega.h , ser_xmega.h , ser_sam3.h , ser_dsp56k.h
  • SERRF_NOISEERROR : ser_at91.h , ser_mega.h , ser_xmega.h , ser_sam3.h , ser_dsp56k.h
  • SERRF_PARITYERROR : ser_at91.h , ser_mega.h , ser_xmega.h , ser_sam3.h , ser_dsp56k.h
  • SERRF_RX : ser.h
  • SERRF_RXFIFOOVERRUN : ser_at91.h , ser_mega.h , ser_xmega.h , ser_sam3.h , ser_dsp56k.h
  • SERRF_RXSROVERRUN : ser_at91.h , ser_mega.h , ser_xmega.h , ser_sam3.h , ser_dsp56k.h
  • SERRF_RXTIMEOUT : ser_at91.h , ser_mega.h , ser_xmega.h , ser_sam3.h , ser_dsp56k.h
  • SERRF_TX : ser.h
  • SERRF_TXTIMEOUT : ser_sam3.h , ser_dsp56k.h , ser_at91.h , ser_mega.h , ser_xmega.h
  • serstatus_t : ser_at91.h , ser_sam3.h
  • sevenseg_clear() : led_7seg.c
  • sevenseg_init() : led_7seg.c
  • sevenseg_isReady() : led_7seg.c
  • sevenseg_lock() : led_7seg.c
  • sevenseg_print() : led_7seg.c
  • sevenseg_setBlink() : led_7seg.c
  • sevenseg_setRunonce() : led_7seg.c
  • sevenseg_setRunspeed() : led_7seg.c
  • sevenseg_unlock() : led_7seg.c
  • SHUFFLE : macros.h
  • sig_check() : signal.h
  • sig_checkSignal() : signal.h
  • sig_post() : signal.h
  • sig_send() : signal.h
  • SIG_SINGLE : signal.h
  • SIG_SYSTEM5 : signal.h
  • SIG_SYSTEM6 : signal.h
  • SIG_TIMEOUT : signal.h
  • SIG_USER0 : signal.h
  • SIG_USER1 : signal.h
  • SIG_USER2 : signal.h
  • SIG_USER3 : signal.h
  • SIG_USER_MAX : signal.h
  • sig_wait() : signal.h
  • sig_waitTimeout() : signal.h
  • sigbit_t : compiler.h
  • sigmask_t : compiler.h
  • SILENT_ASSERT : test.h
  • SIN_LEN : afsk.c
  • sin_sample() : afsk.c
  • sin_table : afsk.c
  • SIPO_CAST() : sipo.h
  • SIPO_ENABLE : hw_sipo.h
  • sipo_init() : sipo.c , sipo.h
  • SIPO_INIT_PIN : hw_sipo.h
  • SIPO_LOAD : hw_sipo.h
  • sipo_putchar() : sipo.c
  • SIPO_SET_LD_LEVEL : hw_sipo.h
  • SIPO_SET_LEVEL_LOW : hw_sipo.h
  • SIPO_SI_CLOCK : hw_sipo.h
  • SIPO_SI_HIGH : hw_sipo.h
  • sipo_write() : sipo.c
  • SipoBitOrder : sipo.h
  • SipoClkPol : sipo.h
  • SipoLoadPol : sipo.h
  • SipoMap : hw_sipo.h
  • SIZEOF_HPTIME_T : timer_lpc2.h
  • SLIP_DEBUG : cfg_lwip.h
  • SLIPIF_THREAD_NAME : cfg_lwip.h
  • SLIPIF_THREAD_PRIO : cfg_lwip.h
  • SLIPIF_THREAD_STACKSIZE : cfg_lwip.h
  • SMEMCPY : cfg_lwip.h
  • SNMP_CONCURRENT_REQUESTS : cfg_lwip.h
  • SNMP_MIB_DEBUG : cfg_lwip.h
  • SNMP_MSG_DEBUG : cfg_lwip.h
  • SNMP_PRIVATE_MIB : cfg_lwip.h
  • SNMP_SAFE_REQUESTS : cfg_lwip.h
  • SNMP_TRAP_DESTINATIONS : cfg_lwip.h
  • SO_REUSE : cfg_lwip.h
  • SOCKETS_DEBUG : cfg_lwip.h
  • SPACE_OVER : battfs.h
  • SPEED_HOMING : stepper.h
  • SPEED_STOPPED : stepper.h
  • SPI0_BASE : sam3_spi.h
  • SPI0_CR : sam3_spi.h
  • SPI0_CSR0 : sam3_spi.h
  • SPI0_CSR1 : sam3_spi.h
  • SPI0_CSR2 : sam3_spi.h
  • SPI0_CSR3 : sam3_spi.h
  • SPI0_IDR : sam3_spi.h
  • SPI0_IER : sam3_spi.h
  • SPI0_IMR : sam3_spi.h
  • SPI0_MISO : sam3.h
  • SPI0_MOSI : sam3.h
  • SPI0_MR : sam3_spi.h
  • SPI0_RDR : sam3_spi.h
  • SPI0_SPCK : sam3.h
  • SPI0_SR : sam3_spi.h
  • SPI0_TDR : sam3_spi.h
  • SPI1_IRQHANDLER : stm32_ints.h
  • SPI2_IRQHANDLER : stm32_ints.h
  • SPI_BITS : at91_spi.h , sam3_spi.h
  • SPI_BITS_10 : at91_spi.h , sam3_spi.h
  • SPI_BITS_11 : at91_spi.h , sam3_spi.h
  • SPI_BITS_12 : at91_spi.h , sam3_spi.h
  • SPI_BITS_13 : at91_spi.h , sam3_spi.h
  • SPI_BITS_14 : at91_spi.h , sam3_spi.h
  • SPI_BITS_15 : at91_spi.h , sam3_spi.h
  • SPI_BITS_16 : at91_spi.h , sam3_spi.h
  • SPI_BITS_8 : at91_spi.h , sam3_spi.h
  • SPI_BITS_9 : at91_spi.h , sam3_spi.h
  • SPI_BITS_SHIFT : at91_spi.h , sam3_spi.h
  • SPI_CPOL : at91_spi.h , sam3_spi.h
  • SPI_CR_OFF : at91_spi.h , sam3_spi.h
  • SPI_CSAAT : at91_spi.h , sam3_spi.h
  • SPI_CSR0_OFF : at91_spi.h , sam3_spi.h
  • SPI_CSR1_OFF : at91_spi.h , sam3_spi.h
  • SPI_CSR2_OFF : at91_spi.h , sam3_spi.h
  • SPI_CSR3_OFF : at91_spi.h , sam3_spi.h
  • SPI_DDR : hw_spi.h
  • SPI_DLYBCS : at91_spi.h , sam3_spi.h
  • SPI_DLYBCS_SHIFT : at91_spi.h , sam3_spi.h
  • SPI_DLYBCT : sam3_spi.h , at91_spi.h
  • SPI_DLYBCT_SHIFT : at91_spi.h , sam3_spi.h
  • SPI_DLYBS : at91_spi.h , sam3_spi.h
  • SPI_DLYBS_SHIFT : at91_spi.h , sam3_spi.h
  • spi_dma_init() : spi_dma_at91.c , spi_dma_at91.h
  • spi_dma_setclock() : spi_dma_at91.c , spi_dma_at91.h
  • SPI_ENDRX : at91_spi.h , sam3_spi.h
  • SPI_ENDTX : at91_spi.h , sam3_spi.h
  • SPI_FDIV : at91_spi.h , sam3_spi.h
  • SPI_IDR_OFF : at91_spi.h , sam3_spi.h
  • SPI_IER_OFF : at91_spi.h , sam3_spi.h
  • SPI_IMR_OFF : at91_spi.h , sam3_spi.h
  • SPI_LASTXFER : at91_spi.h , sam3_spi.h
  • SPI_LLB : at91_spi.h , sam3_spi.h
  • SPI_LSB_FIRST : spi_bitbang.h
  • SPI_MODF : at91_spi.h , sam3_spi.h
  • SPI_MODFDIS : at91_spi.h , sam3_spi.h
  • SPI_MR_OFF : at91_spi.h , sam3_spi.h
  • SPI_MSTR : at91_spi.h , sam3_spi.h
  • SPI_NCPHA : at91_spi.h , sam3_spi.h
  • SPI_NORMAL_LOW : ser_mega.h
  • SPI_NSSR : at91_spi.h , sam3_spi.h
  • SPI_OVRES : at91_spi.h , sam3_spi.h
  • SPI_PCS : at91_spi.h , sam3_spi.h
  • SPI_PCS_0 : at91_spi.h , sam3_spi.h
  • SPI_PCS_1 : at91_spi.h , sam3_spi.h
  • SPI_PCS_2 : at91_spi.h , sam3_spi.h
  • SPI_PCS_3 : at91_spi.h , sam3_spi.h
  • SPI_PCS_SHIFT : at91_spi.h , sam3_spi.h
  • SPI_PCSDEC : at91_spi.h , sam3_spi.h
  • SPI_PIN : hw_spi.h
  • SPI_PORT : hw_spi.h
  • SPI_PS : at91_spi.h , sam3_spi.h
  • SPI_RD : at91_spi.h , sam3_spi.h
  • SPI_RD_SHIFT : at91_spi.h , sam3_spi.h
  • SPI_RDR_OFF : at91_spi.h , sam3_spi.h
  • SPI_RDRF : at91_spi.h , sam3_spi.h
  • spi_read() : spi_bitbang.c , spi_bitbang.h
  • SPI_RXBUFF : at91_spi.h , sam3_spi.h
  • SPI_SAMPLE_ON_FIRST_EDGE : ser_mega.h
  • SPI_SCBR : at91_spi.h , sam3_spi.h
  • SPI_SCBR_SHIFT : at91_spi.h , sam3_spi.h
  • spi_sendRecv() : spi_bitbang.c , spi_bitbang.h
  • SPI_SPIDIS : at91_spi.h , sam3_spi.h
  • SPI_SPIEN : at91_spi.h , sam3_spi.h
  • SPI_SPIENS : at91_spi.h , sam3_spi.h
  • SPI_SR_OFF : at91_spi.h , sam3_spi.h
  • SPI_SWRST : at91_spi.h , sam3_spi.h
  • SPI_TD : at91_spi.h , sam3_spi.h
  • SPI_TD_SHIFT : at91_spi.h , sam3_spi.h
  • SPI_TDR_OFF : at91_spi.h , sam3_spi.h
  • SPI_TDRE : at91_spi.h , sam3_spi.h
  • SPI_TXBUFE : at91_spi.h , sam3_spi.h
  • SPI_TXEMPTY : at91_spi.h , sam3_spi.h
  • spi_write() : spi_bitbang.c , spi_bitbang.h
  • spimaster_init() : ser.c , ser.h
  • spimaster_read() : ser.c
  • spimaster_write() : ser.c
  • SRAM_BASE : lm3s_memmap.h
  • SS_ACTIVE : hw_spi.h
  • SS_INACTIVE : hw_spi.h
  • SSC_CKG_FH : at91_ssc.h
  • SSC_CKG_FL : at91_ssc.h
  • SSC_CKG_MASK : at91_ssc.h
  • SSC_CKG_NONE : at91_ssc.h
  • SSC_CKI : at91_ssc.h
  • SSC_CKO_CONT : at91_ssc.h
  • SSC_CKO_MASK : at91_ssc.h
  • SSC_CKO_NONE : at91_ssc.h
  • SSC_CKO_TRAN : at91_ssc.h
  • SSC_CKS_CLK : at91_ssc.h
  • SSC_CKS_DIV : at91_ssc.h
  • SSC_CKS_MASK : at91_ssc.h
  • SSC_CKS_PIN : at91_ssc.h
  • SSC_CMR_OFF : at91_ssc.h
  • SSC_CP0 : at91_ssc.h
  • SSC_CP1 : at91_ssc.h
  • SSC_CR_OFF : at91_ssc.h
  • SSC_DATDEF : at91_ssc.h
  • SSC_DATLEN_MASK : at91_ssc.h
  • SSC_DATNB_MASK : at91_ssc.h
  • SSC_DATNB_SHIFT : at91_ssc.h
  • SSC_DIV_MASK : at91_ssc.h
  • SSC_ENDRX : at91_ssc.h
  • SSC_ENDTX : at91_ssc.h
  • SSC_FSDEN : at91_ssc.h
  • SSC_FSEDGE : at91_ssc.h
  • SSC_FSLEN_MASK : at91_ssc.h
  • SSC_FSLEN_SHIFT : at91_ssc.h
  • SSC_FSOS : at91_ssc.h
  • SSC_FSOS_HIGH : at91_ssc.h
  • SSC_FSOS_LOW : at91_ssc.h
  • SSC_FSOS_NEGATIVE : at91_ssc.h
  • SSC_FSOS_NONE : at91_ssc.h
  • SSC_FSOS_POSITIVE : at91_ssc.h
  • SSC_FSOS_TOGGLE : at91_ssc.h
  • SSC_IDR_OFF : at91_ssc.h
  • SSC_IER_OFF : at91_ssc.h
  • SSC_IMR_OFF : at91_ssc.h
  • SSC_LOOP : at91_ssc.h
  • SSC_MSBF : at91_ssc.h
  • SSC_OVRUN : at91_ssc.h
  • SSC_PERIOD_MASK : at91_ssc.h
  • SSC_PERIOD_SHIFT : at91_ssc.h
  • SSC_RC0R_OFF : at91_ssc.h
  • SSC_RC1R_OFF : at91_ssc.h
  • SSC_RCMR_OFF : at91_ssc.h
  • SSC_RFMR_OFF : at91_ssc.h
  • SSC_RHR_OFF : at91_ssc.h
  • SSC_RSHR_OFF : at91_ssc.h
  • SSC_RXBUFF : at91_ssc.h
  • SSC_RXDIS : at91_ssc.h
  • SSC_RXEN : at91_ssc.h
  • SSC_RXENA : at91_ssc.h
  • SSC_RXRDY : at91_ssc.h
  • SSC_RXSYN : at91_ssc.h
  • SSC_SR_OFF : at91_ssc.h
  • SSC_START_COMP0 : at91_ssc.h
  • SSC_START_CONT : at91_ssc.h
  • SSC_START_EDGE_F : at91_ssc.h
  • SSC_START_FALL_F : at91_ssc.h
  • SSC_START_HIGH_F : at91_ssc.h
  • SSC_START_LEVEL_F : at91_ssc.h
  • SSC_START_LOW_F : at91_ssc.h
  • SSC_START_MASK : at91_ssc.h
  • SSC_START_RISE_F : at91_ssc.h
  • SSC_START_RX : at91_ssc.h
  • SSC_START_TX : at91_ssc.h
  • SSC_STOP : at91_ssc.h
  • SSC_STTDLY_MASK : at91_ssc.h
  • SSC_STTDLY_SHIFT : at91_ssc.h
  • SSC_SWRST : at91_ssc.h
  • SSC_TCMR_OFF : at91_ssc.h
  • SSC_TFMR_OFF : at91_ssc.h
  • SSC_THR_OFF : at91_ssc.h
  • SSC_TSHR_OFF : at91_ssc.h
  • SSC_TXBUFE : at91_ssc.h
  • SSC_TXDIS : at91_ssc.h
  • SSC_TXEMPTY : at91_ssc.h
  • SSC_TXEN : at91_ssc.h
  • SSC_TXENA : at91_ssc.h
  • SSC_TXRDY : at91_ssc.h
  • SSC_TXSYN : at91_ssc.h
  • sseg_init() : hw_led_7seg.h
  • sseg_off() : hw_led_7seg.h
  • sseg_on() : hw_led_7seg.h
  • SSI0_BASE : lm3s_memmap.h
  • SSI0_CPSR_R : lm3s_com.h
  • SSI0_CR0_R : lm3s_com.h
  • SSI0_CR1_R : lm3s_com.h
  • SSI0_DR_R : lm3s_com.h
  • SSI0_ICR_R : lm3s_com.h
  • SSI0_IM_R : lm3s_com.h
  • SSI0_MIS_R : lm3s_com.h
  • SSI0_RIS_R : lm3s_com.h
  • SSI0_SR_R : lm3s_com.h
  • SSI1_BASE : lm3s_memmap.h
  • SSI1_CPSR_R : lm3s_com.h
  • SSI1_CR0_R : lm3s_com.h
  • SSI1_CR1_R : lm3s_com.h
  • SSI1_DR_R : lm3s_com.h
  • SSI1_ICR_R : lm3s_com.h
  • SSI1_IM_R : lm3s_com.h
  • SSI1_MIS_R : lm3s_com.h
  • SSI1_RIS_R : lm3s_com.h
  • SSI1_SR_R : lm3s_com.h
  • SSI_CPSR_CPSDVSR_M : lm3s_com.h , lm3s_ssi.h
  • SSI_CPSR_CPSDVSR_MASK : lm3s_ssi.h
  • SSI_CPSR_CPSDVSR_S : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS : lm3s_ssi.h
  • SSI_CR0_DSS_10 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_11 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_12 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_13 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_14 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_15 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_16 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_4 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_5 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_6 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_7 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_8 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_9 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_M : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_FRF_M : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_FRF_MASK : lm3s_ssi.h
  • SSI_CR0_FRF_MOTO : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_FRF_NMW : lm3s_ssi.h , lm3s_com.h
  • SSI_CR0_FRF_TI : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_SCR : lm3s_ssi.h
  • SSI_CR0_SCR_M : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_SCR_S : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_SPH : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_SPO : lm3s_com.h , lm3s_ssi.h
  • SSI_CR1_EOT : lm3s_ssi.h
  • SSI_CR1_LBM : lm3s_com.h , lm3s_ssi.h
  • SSI_CR1_MS : lm3s_com.h , lm3s_ssi.h
  • SSI_CR1_SOD : lm3s_com.h , lm3s_ssi.h
  • SSI_CR1_SSE : lm3s_com.h , lm3s_ssi.h
  • SSI_DMACTL_RXDMAE : lm3s_ssi.h
  • SSI_DMACTL_TXDMAE : lm3s_ssi.h
  • SSI_DR_DATA_M : lm3s_com.h , lm3s_ssi.h
  • SSI_DR_DATA_S : lm3s_com.h , lm3s_ssi.h
  • SSI_FRF_MOTO_MODE_0 : ssi_lm3s.h
  • SSI_FRF_MOTO_MODE_1 : ssi_lm3s.h
  • SSI_FRF_MOTO_MODE_2 : ssi_lm3s.h
  • SSI_FRF_MOTO_MODE_3 : ssi_lm3s.h
  • SSI_FRF_NMW : ssi_lm3s.h
  • SSI_FRF_TI : ssi_lm3s.h
  • SSI_ICR_RORIC : lm3s_com.h , lm3s_ssi.h
  • SSI_ICR_RTIC : lm3s_com.h , lm3s_ssi.h
  • SSI_IM_RORIM : lm3s_com.h , lm3s_ssi.h
  • SSI_IM_RTIM : lm3s_com.h , lm3s_ssi.h
  • SSI_IM_RXIM : lm3s_com.h , lm3s_ssi.h
  • SSI_IM_TXIM : lm3s_com.h , lm3s_ssi.h
  • SSI_INT_RXFF : lm3s_ssi.h
  • SSI_INT_RXOR : lm3s_ssi.h
  • SSI_INT_RXTO : lm3s_ssi.h
  • SSI_INT_TXFF : lm3s_ssi.h
  • SSI_MIS_RORMIS : lm3s_com.h , lm3s_ssi.h
  • SSI_MIS_RTMIS : lm3s_com.h , lm3s_ssi.h
  • SSI_MIS_RXMIS : lm3s_com.h , lm3s_ssi.h
  • SSI_MIS_TXMIS : lm3s_com.h , lm3s_ssi.h
  • SSI_MODE_MASTER : ssi_lm3s.h
  • SSI_MODE_SLAVE : ssi_lm3s.h
  • SSI_MODE_SLAVE_OD : ssi_lm3s.h
  • SSI_O_CPSR : lm3s_ssi.h
  • SSI_O_CR0 : lm3s_ssi.h
  • SSI_O_CR1 : lm3s_ssi.h
  • SSI_O_DMACTL : lm3s_ssi.h
  • SSI_O_DR : lm3s_ssi.h
  • SSI_O_ICR : lm3s_ssi.h
  • SSI_O_IM : lm3s_ssi.h
  • SSI_O_MIS : lm3s_ssi.h
  • SSI_O_RIS : lm3s_ssi.h
  • SSI_O_SR : lm3s_ssi.h
  • SSI_RIS_RORRIS : lm3s_com.h , lm3s_ssi.h
  • SSI_RIS_RTRIS : lm3s_com.h , lm3s_ssi.h
  • SSI_RIS_RXRIS : lm3s_com.h , lm3s_ssi.h
  • SSI_RIS_TXRIS : lm3s_com.h , lm3s_ssi.h
  • SSI_SR_BSY : lm3s_com.h , lm3s_ssi.h
  • SSI_SR_RFF : lm3s_com.h , lm3s_ssi.h
  • SSI_SR_RNE : lm3s_com.h , lm3s_ssi.h
  • SSI_SR_TFE : lm3s_com.h , lm3s_ssi.h
  • SSI_SR_TNF : lm3s_com.h , lm3s_ssi.h
  • STATIC_ASSERT : compiler.h , pocketbus.h , pocketcmd.h
  • STATIC_ASSERT_EXPR : compiler.h
  • stepper_break() : stepper.c , stepper.h
  • STEPPER_CLOCK : hw_stepper.h
  • stepper_disable() : stepper.c , stepper.h
  • stepper_error() : stepper.c , stepper.h
  • stepper_home() : stepper.c , stepper.h
  • stepper_idle() : stepper.c , stepper.h
  • stepper_init() : stepper.c , stepper.h
  • stepper_isr_t : stepper.h
  • STEPPER_LOG_FORMAT : cfg_stepper.h
  • STEPPER_LOG_LEVEL : cfg_stepper.h
  • stepper_move() : stepper.c , stepper.h
  • STEPPER_PRESCALER_LOG2 : hw_stepper.h
  • stepper_reset() : stepper.c , stepper.h
  • STEPPER_RESET_DELAY : hw_stepper.h
  • stepper_schedule_irq() : stepper.c
  • stepper_setup() : stepper.c , stepper.h
  • stepper_stop() : stepper.c , stepper.h
  • stepper_tc_doPulse() : stepper_at91.h , stepper_avr.h
  • stepper_tc_init() : stepper_at91.c , stepper_at91.h , stepper_avr.c , stepper_avr.h
  • stepper_tc_irq_disable() : stepper_at91.h , stepper_avr.h
  • stepper_tc_irq_enable() : stepper_at91.h , stepper_avr.h
  • stepper_tc_resetTimer() : stepper_at91.h , stepper_avr.h
  • stepper_tc_setDelay() : stepper_at91.h , stepper_avr.h
  • stepper_tc_setup() : stepper_at91.c , stepper_at91.h , stepper_avr.c , stepper_avr.h
  • stepper_tc_skipPulse() : stepper_at91.h , stepper_avr.h
  • stepper_tc_tio_irq() : stepper_at91.c
  • StepperState : stepper.h
  • STEPS_INFINITE_NEGATIVE : stepper.h
  • STEPS_INFINITE_POSITIVE : stepper.h
  • stm32_gpioPinConfig() : gpio_stm32.c , gpio_stm32.h
  • stm32_gpioPinRead() : gpio_stm32.h
  • stm32_gpioPinWrite() : gpio_stm32.h
  • str_empty : messages.c
  • strtol10() : strtol10.c , strtol10.h
  • strtoul10() : strtol10.c , strtol10.h
  • SUPC_BASE : sam3_sysctl.h
  • SUPC_CR : sam3_sysctl.h
  • SUPC_CR_KEY : sam3_sysctl.h
  • SUPC_CR_KEY_MASK : sam3_sysctl.h
  • SUPC_CR_KEY_P : sam3_sysctl.h
  • SUPC_CR_OFF : sam3_sysctl.h
  • SUPC_CR_VROFF : sam3_sysctl.h
  • SUPC_CR_XTALSEL : sam3_sysctl.h
  • SUPC_MR : sam3_sysctl.h
  • SUPC_MR_OFF : sam3_sysctl.h
  • SUPC_SMMR : sam3_sysctl.h
  • SUPC_SMMR_OFF : sam3_sysctl.h
  • SUPC_SR : sam3_sysctl.h
  • SUPC_SR_BODRSTS : sam3_sysctl.h
  • SUPC_SR_OFF : sam3_sysctl.h
  • SUPC_SR_OSCSEL : sam3_sysctl.h
  • SUPC_SR_SMOS : sam3_sysctl.h
  • SUPC_SR_SMRSTS : sam3_sysctl.h
  • SUPC_SR_SMS : sam3_sysctl.h
  • SUPC_SR_SMWS : sam3_sysctl.h
  • SUPC_SR_WKUPIS0 : sam3_sysctl.h
  • SUPC_SR_WKUPIS1 : sam3_sysctl.h
  • SUPC_SR_WKUPIS10 : sam3_sysctl.h
  • SUPC_SR_WKUPIS11 : sam3_sysctl.h
  • SUPC_SR_WKUPIS12 : sam3_sysctl.h
  • SUPC_SR_WKUPIS13 : sam3_sysctl.h
  • SUPC_SR_WKUPIS14 : sam3_sysctl.h
  • SUPC_SR_WKUPIS15 : sam3_sysctl.h
  • SUPC_SR_WKUPIS2 : sam3_sysctl.h
  • SUPC_SR_WKUPIS3 : sam3_sysctl.h
  • SUPC_SR_WKUPIS4 : sam3_sysctl.h
  • SUPC_SR_WKUPIS5 : sam3_sysctl.h
  • SUPC_SR_WKUPIS6 : sam3_sysctl.h
  • SUPC_SR_WKUPIS7 : sam3_sysctl.h
  • SUPC_SR_WKUPIS8 : sam3_sysctl.h
  • SUPC_SR_WKUPIS9 : sam3_sysctl.h
  • SUPC_SR_WKUPS : sam3_sysctl.h
  • SUPC_WUIR : sam3_sysctl.h
  • SUPC_WUIR_OFF : sam3_sysctl.h
  • SUPC_WUMR : sam3_sysctl.h
  • SUPC_WUMR_OFF : sam3_sysctl.h
  • SWAB16 : cpu/byteorder.h
  • SWAB32 : cpu/byteorder.h
  • SWAB64 : cpu/byteorder.h
  • swab_float() : cpu/byteorder.h
  • SWAP_T : macros.h
  • synctimer_abort : timer.h
  • synctimer_add() : timer.c , timer.h
  • synctimer_poll() : timer.c , timer.h
  • SYS_DEBUG : cfg_lwip.h
  • SYS_LIGHTWEIGHT_PROT : cfg_lwip.h
  • SYSCTL_BASE : lm3s_memmap.h
  • SYSCTL_CLKVCLR : lm3s_sysctl.h
  • SYSCTL_CLKVCLR_CLR : lm3s_sysctl.h
  • SYSCTL_CLKVCLR_VERCLR : lm3s_sysctl.h
  • SYSCTL_DC0 : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_128K : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_16KB : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_256K : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_32KB : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_64KB : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_8KB : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_96KB : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_M : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_MASK : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_S : lm3s_sysctl.h
  • SYSCTL_DC0_R : lm3s_com.h
  • SYSCTL_DC0_SRAMSZ_12KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_16KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_20KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_24KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_2KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_32KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_48KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_4KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_64KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_6KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_8KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_96KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_M : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_MASK : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_S : lm3s_sysctl.h
  • SYSCTL_DC1 : lm3s_sysctl.h
  • SYSCTL_DC1_ADC : lm3s_sysctl.h
  • SYSCTL_DC1_ADC0 : lm3s_sysctl.h
  • SYSCTL_DC1_ADC0SPD_1M : lm3s_sysctl.h
  • SYSCTL_DC1_ADC0SPD_M : lm3s_sysctl.h
  • SYSCTL_DC1_ADC1 : lm3s_sysctl.h
  • SYSCTL_DC1_ADC1SPD_1M : lm3s_sysctl.h
  • SYSCTL_DC1_ADC1SPD_M : lm3s_sysctl.h
  • SYSCTL_DC1_ADCSPD_125K : lm3s_sysctl.h
  • SYSCTL_DC1_ADCSPD_1M : lm3s_sysctl.h
  • SYSCTL_DC1_ADCSPD_250K : lm3s_sysctl.h
  • SYSCTL_DC1_ADCSPD_500K : lm3s_sysctl.h
  • SYSCTL_DC1_ADCSPD_M : lm3s_sysctl.h
  • SYSCTL_DC1_ADCSPD_MASK : lm3s_sysctl.h
  • SYSCTL_DC1_CAN0 : lm3s_sysctl.h
  • SYSCTL_DC1_CAN1 : lm3s_sysctl.h
  • SYSCTL_DC1_CAN2 : lm3s_sysctl.h
  • SYSCTL_DC1_HIB : lm3s_sysctl.h
  • SYSCTL_DC1_JTAG : lm3s_sysctl.h
  • SYSCTL_DC1_MINSYSDIV_100 : lm3s_sysctl.h
  • SYSCTL_DC1_MINSYSDIV_20 : lm3s_sysctl.h
  • SYSCTL_DC1_MINSYSDIV_25 : lm3s_sysctl.h
  • SYSCTL_DC1_MINSYSDIV_50 : lm3s_sysctl.h
  • SYSCTL_DC1_MINSYSDIV_66 : lm3s_sysctl.h
  • SYSCTL_DC1_MINSYSDIV_M : lm3s_sysctl.h
  • SYSCTL_DC1_MPU : lm3s_sysctl.h
  • SYSCTL_DC1_PLL : lm3s_sysctl.h
  • SYSCTL_DC1_PWM : lm3s_sysctl.h
  • SYSCTL_DC1_R : lm3s_com.h
  • SYSCTL_DC1_SWD : lm3s_sysctl.h
  • SYSCTL_DC1_SWO : lm3s_sysctl.h
  • SYSCTL_DC1_SYSDIV_MASK : lm3s_sysctl.h
  • SYSCTL_DC1_TEMP : lm3s_sysctl.h
  • SYSCTL_DC1_WDOG : lm3s_sysctl.h
  • SYSCTL_DC1_WDT : lm3s_sysctl.h
  • SYSCTL_DC1_WDT0 : lm3s_sysctl.h
  • SYSCTL_DC1_WDT1 : lm3s_sysctl.h
  • SYSCTL_DC2 : lm3s_sysctl.h
  • SYSCTL_DC2_COMP0 : lm3s_sysctl.h
  • SYSCTL_DC2_COMP1 : lm3s_sysctl.h
  • SYSCTL_DC2_COMP2 : lm3s_sysctl.h
  • SYSCTL_DC2_EPI0 : lm3s_sysctl.h
  • SYSCTL_DC2_I2C : lm3s_sysctl.h
  • SYSCTL_DC2_I2C0 : lm3s_sysctl.h
  • SYSCTL_DC2_I2C1 : lm3s_sysctl.h
  • SYSCTL_DC2_I2S0 : lm3s_sysctl.h
  • SYSCTL_DC2_QEI : lm3s_sysctl.h
  • SYSCTL_DC2_QEI0 : lm3s_sysctl.h
  • SYSCTL_DC2_QEI1 : lm3s_sysctl.h
  • SYSCTL_DC2_R : lm3s_com.h
  • SYSCTL_DC2_SSI : lm3s_sysctl.h
  • SYSCTL_DC2_SSI0 : lm3s_sysctl.h
  • SYSCTL_DC2_SSI1 : lm3s_sysctl.h
  • SYSCTL_DC2_TIMER0 : lm3s_sysctl.h
  • SYSCTL_DC2_TIMER1 : lm3s_sysctl.h
  • SYSCTL_DC2_TIMER2 : lm3s_sysctl.h
  • SYSCTL_DC2_TIMER3 : lm3s_sysctl.h
  • SYSCTL_DC2_UART0 : lm3s_sysctl.h
  • SYSCTL_DC2_UART1 : lm3s_sysctl.h
  • SYSCTL_DC2_UART2 : lm3s_sysctl.h
  • SYSCTL_DC3 : lm3s_sysctl.h
  • SYSCTL_DC3_32KHZ : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0AIN0 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0AIN1 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0AIN2 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0AIN3 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0AIN4 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0AIN5 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0AIN6 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0AIN7 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC1 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC2 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC3 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC4 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC5 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC6 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC7 : lm3s_sysctl.h
  • SYSCTL_DC3_C0MINUS : lm3s_sysctl.h
  • SYSCTL_DC3_C0O : lm3s_sysctl.h
  • SYSCTL_DC3_C0PLUS : lm3s_sysctl.h
  • SYSCTL_DC3_C1MINUS : lm3s_sysctl.h
  • SYSCTL_DC3_C1O : lm3s_sysctl.h
  • SYSCTL_DC3_C1PLUS : lm3s_sysctl.h
  • SYSCTL_DC3_C2MINUS : lm3s_sysctl.h
  • SYSCTL_DC3_C2O : lm3s_sysctl.h
  • SYSCTL_DC3_C2PLUS : lm3s_sysctl.h
  • SYSCTL_DC3_CCP0 : lm3s_sysctl.h
  • SYSCTL_DC3_CCP1 : lm3s_sysctl.h
  • SYSCTL_DC3_CCP2 : lm3s_sysctl.h
  • SYSCTL_DC3_CCP3 : lm3s_sysctl.h
  • SYSCTL_DC3_CCP4 : lm3s_sysctl.h
  • SYSCTL_DC3_CCP5 : lm3s_sysctl.h
  • SYSCTL_DC3_MC_FAULT0 : lm3s_sysctl.h
  • SYSCTL_DC3_PWM0 : lm3s_sysctl.h
  • SYSCTL_DC3_PWM1 : lm3s_sysctl.h
  • SYSCTL_DC3_PWM2 : lm3s_sysctl.h
  • SYSCTL_DC3_PWM3 : lm3s_sysctl.h
  • SYSCTL_DC3_PWM4 : lm3s_sysctl.h
  • SYSCTL_DC3_PWM5 : lm3s_sysctl.h
  • SYSCTL_DC3_PWMFAULT : lm3s_sysctl.h
  • SYSCTL_DC3_R : lm3s_com.h
  • SYSCTL_DC4 : lm3s_sysctl.h
  • SYSCTL_DC4_CCP6 : lm3s_sysctl.h
  • SYSCTL_DC4_CCP7 : lm3s_sysctl.h
  • SYSCTL_DC4_E1588 : lm3s_sysctl.h
  • SYSCTL_DC4_EMAC0 : lm3s_sysctl.h
  • SYSCTL_DC4_EPHY0 : lm3s_sysctl.h
  • SYSCTL_DC4_ETH : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOA : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOB : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOC : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOD : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOE : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOF : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOG : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOH : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOJ : lm3s_sysctl.h
  • SYSCTL_DC4_PICAL : lm3s_sysctl.h
  • SYSCTL_DC4_R : lm3s_com.h
  • SYSCTL_DC4_ROM : lm3s_sysctl.h
  • SYSCTL_DC4_UDMA : lm3s_sysctl.h
  • SYSCTL_DC5 : lm3s_sysctl.h
  • SYSCTL_DC5_PWM0 : lm3s_sysctl.h
  • SYSCTL_DC5_PWM1 : lm3s_sysctl.h
  • SYSCTL_DC5_PWM2 : lm3s_sysctl.h
  • SYSCTL_DC5_PWM3 : lm3s_sysctl.h
  • SYSCTL_DC5_PWM4 : lm3s_sysctl.h
  • SYSCTL_DC5_PWM5 : lm3s_sysctl.h
  • SYSCTL_DC5_PWM6 : lm3s_sysctl.h
  • SYSCTL_DC5_PWM7 : lm3s_sysctl.h
  • SYSCTL_DC5_PWMEFLT : lm3s_sysctl.h
  • SYSCTL_DC5_PWMESYNC : lm3s_sysctl.h
  • SYSCTL_DC5_PWMFAULT0 : lm3s_sysctl.h
  • SYSCTL_DC5_PWMFAULT1 : lm3s_sysctl.h
  • SYSCTL_DC5_PWMFAULT2 : lm3s_sysctl.h
  • SYSCTL_DC5_PWMFAULT3 : lm3s_sysctl.h
  • SYSCTL_DC6 : lm3s_sysctl.h
  • SYSCTL_DC6_USB0_DEV : lm3s_sysctl.h
  • SYSCTL_DC6_USB0_HOSTDEV : lm3s_sysctl.h
  • SYSCTL_DC6_USB0_M : lm3s_sysctl.h
  • SYSCTL_DC6_USB0_OTG : lm3s_sysctl.h
  • SYSCTL_DC6_USB0PHY : lm3s_sysctl.h
  • SYSCTL_DC7 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH0 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH1 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH10 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH11 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH12 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH13 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH14 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH15 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH16 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH17 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH18 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH19 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH2 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH20 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH21 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH22 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH23 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH24 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH25 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH26 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH27 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH28 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH29 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH3 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH30 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH4 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH5 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH6 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH7 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH8 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH9 : lm3s_sysctl.h
  • SYSCTL_DC7_SSI0_RX : lm3s_sysctl.h
  • SYSCTL_DC7_SSI0_TX : lm3s_sysctl.h
  • SYSCTL_DC7_SSI1_RX : lm3s_sysctl.h
  • SYSCTL_DC7_SSI1_TX : lm3s_sysctl.h
  • SYSCTL_DC7_UART0_RX : lm3s_sysctl.h
  • SYSCTL_DC7_UART0_TX : lm3s_sysctl.h
  • SYSCTL_DC7_UART1_RX : lm3s_sysctl.h
  • SYSCTL_DC7_UART1_TX : lm3s_sysctl.h
  • SYSCTL_DC7_USB_EP1_RX : lm3s_sysctl.h
  • SYSCTL_DC7_USB_EP1_TX : lm3s_sysctl.h
  • SYSCTL_DC7_USB_EP2_RX : lm3s_sysctl.h
  • SYSCTL_DC7_USB_EP2_TX : lm3s_sysctl.h
  • SYSCTL_DC7_USB_EP3_RX : lm3s_sysctl.h
  • SYSCTL_DC7_USB_EP3_TX : lm3s_sysctl.h
  • SYSCTL_DC8 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN0 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN1 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN10 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN11 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN12 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN13 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN14 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN15 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN2 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN3 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN4 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN5 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN6 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN7 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN8 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN9 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN0 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN1 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN10 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN11 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN12 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN13 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN14 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN15 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN2 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN3 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN4 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN5 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN6 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN7 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN8 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN9 : lm3s_sysctl.h
  • SYSCTL_DC9 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC0DC0 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC0DC1 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC0DC2 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC0DC3 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC0DC4 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC0DC5 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC0DC6 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC0DC7 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC1DC0 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC1DC1 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC1DC2 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC1DC3 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC1DC4 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC1DC5 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC1DC6 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC1DC7 : lm3s_sysctl.h
  • SYSCTL_DCGC0 : lm3s_sysctl.h
  • SYSCTL_DCGC0_ADC : lm3s_sysctl.h
  • SYSCTL_DCGC0_ADC0 : lm3s_sysctl.h
  • SYSCTL_DCGC0_ADC1 : lm3s_sysctl.h
  • SYSCTL_DCGC0_CAN0 : lm3s_sysctl.h
  • SYSCTL_DCGC0_CAN1 : lm3s_sysctl.h
  • SYSCTL_DCGC0_CAN2 : lm3s_sysctl.h
  • SYSCTL_DCGC0_HIB : lm3s_sysctl.h
  • SYSCTL_DCGC0_PWM : lm3s_sysctl.h
  • SYSCTL_DCGC0_R : lm3s_com.h
  • SYSCTL_DCGC0_WDT : lm3s_sysctl.h
  • SYSCTL_DCGC0_WDT0 : lm3s_sysctl.h
  • SYSCTL_DCGC0_WDT1 : lm3s_sysctl.h
  • SYSCTL_DCGC1 : lm3s_sysctl.h
  • SYSCTL_DCGC1_COMP0 : lm3s_sysctl.h
  • SYSCTL_DCGC1_COMP1 : lm3s_sysctl.h
  • SYSCTL_DCGC1_COMP2 : lm3s_sysctl.h
  • SYSCTL_DCGC1_EPI0 : lm3s_sysctl.h
  • SYSCTL_DCGC1_I2C0 : lm3s_sysctl.h
  • SYSCTL_DCGC1_I2C1 : lm3s_sysctl.h
  • SYSCTL_DCGC1_I2S0 : lm3s_sysctl.h
  • SYSCTL_DCGC1_QEI0 : lm3s_sysctl.h
  • SYSCTL_DCGC1_QEI1 : lm3s_sysctl.h
  • SYSCTL_DCGC1_R : lm3s_com.h
  • SYSCTL_DCGC1_SSI0 : lm3s_sysctl.h
  • SYSCTL_DCGC1_SSI1 : lm3s_sysctl.h
  • SYSCTL_DCGC1_TIMER0 : lm3s_sysctl.h
  • SYSCTL_DCGC1_TIMER1 : lm3s_sysctl.h
  • SYSCTL_DCGC1_TIMER2 : lm3s_sysctl.h
  • SYSCTL_DCGC1_TIMER3 : lm3s_sysctl.h
  • SYSCTL_DCGC1_UART0 : lm3s_sysctl.h
  • SYSCTL_DCGC1_UART1 : lm3s_sysctl.h
  • SYSCTL_DCGC1_UART2 : lm3s_sysctl.h
  • SYSCTL_DCGC2 : lm3s_sysctl.h
  • SYSCTL_DCGC2_EMAC0 : lm3s_sysctl.h
  • SYSCTL_DCGC2_EPHY0 : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOA : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOB : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOC : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOD : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOE : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOF : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOG : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOH : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOJ : lm3s_sysctl.h
  • SYSCTL_DCGC2_R : lm3s_com.h
  • SYSCTL_DCGC2_UDMA : lm3s_sysctl.h
  • SYSCTL_DCGC2_USB0 : lm3s_sysctl.h
  • SYSCTL_DID0 : lm3s_sysctl.h
  • SYSCTL_DID0_CLASS_DUSTDEVIL : lm3s_sysctl.h
  • SYSCTL_DID0_CLASS_FURY : lm3s_sysctl.h
  • SYSCTL_DID0_CLASS_M : lm3s_sysctl.h
  • SYSCTL_DID0_CLASS_MASK : lm3s_sysctl.h
  • SYSCTL_DID0_CLASS_SANDSTORM : lm3s_sysctl.h
  • SYSCTL_DID0_CLASS_TEMPEST : lm3s_sysctl.h
  • SYSCTL_DID0_MAJ_A : lm3s_sysctl.h
  • SYSCTL_DID0_MAJ_B : lm3s_sysctl.h
  • SYSCTL_DID0_MAJ_C : lm3s_sysctl.h
  • SYSCTL_DID0_MAJ_M : lm3s_sysctl.h
  • SYSCTL_DID0_MAJ_MASK : lm3s_sysctl.h
  • SYSCTL_DID0_MAJ_REVA : lm3s_sysctl.h
  • SYSCTL_DID0_MAJ_REVB : lm3s_sysctl.h
  • SYSCTL_DID0_MAJ_REVC : lm3s_sysctl.h
  • SYSCTL_DID0_MIN_0 : lm3s_sysctl.h
  • SYSCTL_DID0_MIN_1 : lm3s_sysctl.h
  • SYSCTL_DID0_MIN_2 : lm3s_sysctl.h
  • SYSCTL_DID0_MIN_3 : lm3s_sysctl.h
  • SYSCTL_DID0_MIN_4 : lm3s_sysctl.h
  • SYSCTL_DID0_MIN_5 : lm3s_sysctl.h
  • SYSCTL_DID0_MIN_M : lm3s_sysctl.h
  • SYSCTL_DID0_MIN_MASK : lm3s_sysctl.h
  • SYSCTL_DID0_R : lm3s_com.h
  • SYSCTL_DID0_VER_0 : lm3s_sysctl.h
  • SYSCTL_DID0_VER_1 : lm3s_sysctl.h
  • SYSCTL_DID0_VER_M : lm3s_sysctl.h
  • SYSCTL_DID0_VER_MASK : lm3s_sysctl.h
  • SYSCTL_DID1 : lm3s_sysctl.h
  • SYSCTL_DID1_FAM_M : lm3s_sysctl.h
  • SYSCTL_DID1_FAM_MASK : lm3s_sysctl.h
  • SYSCTL_DID1_FAM_S : lm3s_sysctl.h
  • SYSCTL_DID1_FAM_STELLARIS : lm3s_sysctl.h
  • SYSCTL_DID1_PINCNT_100 : lm3s_sysctl.h
  • SYSCTL_DID1_PINCNT_28 : lm3s_sysctl.h
  • SYSCTL_DID1_PINCNT_48 : lm3s_sysctl.h
  • SYSCTL_DID1_PINCNT_64 : lm3s_sysctl.h
  • SYSCTL_DID1_PINCNT_M : lm3s_sysctl.h
  • SYSCTL_DID1_PINCNT_MASK : lm3s_sysctl.h
  • SYSCTL_DID1_PKG_28SOIC : lm3s_com.h , lm3s_sysctl.h
  • SYSCTL_DID1_PKG_48QFP : lm3s_com.h , lm3s_sysctl.h
  • SYSCTL_DID1_PKG_BGA : lm3s_sysctl.h
  • SYSCTL_DID1_PKG_M : lm3s_sysctl.h
  • SYSCTL_DID1_PKG_MASK : lm3s_sysctl.h
  • SYSCTL_DID1_PKG_QFN : lm3s_sysctl.h
  • SYSCTL_DID1_PKG_QFP : lm3s_sysctl.h
  • SYSCTL_DID1_PKG_SOIC : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_101 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_102 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1110 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1133 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1138 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1150 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1162 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1165 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1332 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1435 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1439 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1512 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1538 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1601 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1607 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1608 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1620 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1625 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1626 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1627 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1635 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1637 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1751 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1776 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1811 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1816 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1850 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1911 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1918 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1937 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1958 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1960 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1968 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1J11 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1J16 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1N11 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1N16 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1W16 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1Z16 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2110 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2139 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2276 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2410 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2412 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2432 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2533 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2601 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2608 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2616 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2620 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2637 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2651 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2671 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2678 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2730 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2739 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2776 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2793 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2911 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2918 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2939 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2948 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2950 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2965 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2B93 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_300 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_301 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_308 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_310 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_315 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_316 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_317 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_328 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3651 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3739 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3748 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3749 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3826 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3J26 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3N26 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3W26 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3Z26 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5632 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5651 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5652 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5656 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5662 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5732 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5737 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5739 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5747 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5749 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5752 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5762 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5791 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5951 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5956 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5B91 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5K31 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5K36 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5P31 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5P36 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5P51 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5P56 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5R31 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5R36 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5T36 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5Y36 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_600 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_601 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_608 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_610 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6100 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_611 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6110 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_612 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_613 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_615 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_617 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_618 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_628 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6420 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6422 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6432 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6537 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6610 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6611 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6618 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6633 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6637 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6730 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6753 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6911 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6918 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6938 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6950 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6952 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6965 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_800 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_801 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_808 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_811 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_812 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_815 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_817 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_818 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_828 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8530 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8538 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8630 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8730 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8733 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8738 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8930 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8933 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8938 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8962 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8970 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8971 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_9790 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_9792 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_9997 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_9B90 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_9B92 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_9B95 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_9B96 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_9L97 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_M : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_MASK : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_S : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_SHIFT : lm3s_sysctl.h
  • SYSCTL_DID1_QUAL_ES : lm3s_sysctl.h
  • SYSCTL_DID1_QUAL_FQ : lm3s_sysctl.h
  • SYSCTL_DID1_QUAL_M : lm3s_sysctl.h
  • SYSCTL_DID1_QUAL_MASK : lm3s_sysctl.h
  • SYSCTL_DID1_QUAL_PP : lm3s_sysctl.h
  • SYSCTL_DID1_R : lm3s_com.h
  • SYSCTL_DID1_ROHS : lm3s_sysctl.h
  • SYSCTL_DID1_TEMP_C : lm3s_sysctl.h
  • SYSCTL_DID1_TEMP_E : lm3s_sysctl.h
  • SYSCTL_DID1_TEMP_I : lm3s_sysctl.h
  • SYSCTL_DID1_TEMP_M : lm3s_sysctl.h
  • SYSCTL_DID1_TEMP_MASK : lm3s_sysctl.h
  • SYSCTL_DID1_VER_0 : lm3s_sysctl.h
  • SYSCTL_DID1_VER_1 : lm3s_sysctl.h
  • SYSCTL_DID1_VER_M : lm3s_sysctl.h
  • SYSCTL_DID1_VER_MASK : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_1 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_10 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_11 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_12 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_13 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_14 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_15 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_16 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_17 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_18 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_19 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_2 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_20 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_21 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_22 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_23 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_24 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_25 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_26 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_27 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_28 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_29 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_3 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_30 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_31 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_32 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_33 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_34 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_35 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_36 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_37 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_38 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_39 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_4 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_40 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_41 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_42 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_43 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_44 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_45 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_46 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_47 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_48 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_49 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_5 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_50 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_51 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_52 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_53 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_54 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_55 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_56 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_57 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_58 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_59 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_6 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_60 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_61 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_62 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_63 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_64 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_7 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_8 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_9 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_M : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_MSK : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_S : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_IOSC : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_O_30 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_O_32 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_O_IGN : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_O_IO : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_O_M : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_O_MSK : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_R : lm3s_com.h
  • SYSCTL_GPIOHBCTL : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTA : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTB : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTC : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTD : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTE : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTF : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTG : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTH : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTJ : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL_PORTA : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL_PORTB : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL_PORTC : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL_PORTD : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL_PORTE : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL_PORTF : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL_PORTG : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL_PORTH : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_RXEN : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_RXF_M : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_RXF_S : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_RXI_M : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_RXI_S : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_TXEN : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_TXF_M : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_TXF_S : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_TXI_M : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_TXI_S : lm3s_sysctl.h
  • SYSCTL_IMC : lm3s_sysctl.h
  • SYSCTL_IMC_BORIM : lm3s_sysctl.h
  • SYSCTL_IMC_CLIM : lm3s_sysctl.h
  • SYSCTL_IMC_IOFIM : lm3s_sysctl.h
  • SYSCTL_IMC_LDOIM : lm3s_sysctl.h
  • SYSCTL_IMC_MOFIM : lm3s_sysctl.h
  • SYSCTL_IMC_MOSCPUPIM : lm3s_sysctl.h
  • SYSCTL_IMC_PLLFIM : lm3s_sysctl.h
  • SYSCTL_IMC_PLLLIM : lm3s_sysctl.h
  • SYSCTL_IMC_R : lm3s_com.h
  • SYSCTL_IMC_USBPLLLIM : lm3s_sysctl.h
  • SYSCTL_INT_BOR : lm3s_sysctl.h
  • SYSCTL_INT_CUR_LIMIT : lm3s_sysctl.h
  • SYSCTL_INT_IOSC_FAIL : lm3s_sysctl.h
  • SYSCTL_INT_MOSC_FAIL : lm3s_sysctl.h
  • SYSCTL_INT_PLL_FAIL : lm3s_sysctl.h
  • SYSCTL_INT_PLL_LOCK : lm3s_sysctl.h
  • SYSCTL_INT_POR : lm3s_sysctl.h
  • SYSCTL_LDOARST : lm3s_sysctl.h
  • SYSCTL_LDOARST_ARST : lm3s_sysctl.h
  • SYSCTL_LDOARST_LDOARST : lm3s_sysctl.h
  • SYSCTL_LDOPCTL : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_25V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_30V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_35V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_40V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_45V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_50V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_55V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_60V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_65V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_70V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_75V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_M : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_MASK : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_R : lm3s_com.h
  • SYSCTL_MISC : lm3s_sysctl.h
  • SYSCTL_MISC_BORMIS : lm3s_sysctl.h
  • SYSCTL_MISC_CLMIS : lm3s_sysctl.h
  • SYSCTL_MISC_IOFMIS : lm3s_sysctl.h
  • SYSCTL_MISC_LDOMIS : lm3s_sysctl.h
  • SYSCTL_MISC_MOFMIS : lm3s_sysctl.h
  • SYSCTL_MISC_MOSCPUPMIS : lm3s_sysctl.h
  • SYSCTL_MISC_PLLLMIS : lm3s_sysctl.h
  • SYSCTL_MISC_R : lm3s_com.h
  • SYSCTL_MISC_USBPLLLMIS : lm3s_sysctl.h
  • SYSCTL_MOSCCTL : lm3s_sysctl.h
  • SYSCTL_MOSCCTL_CVAL : lm3s_sysctl.h
  • SYSCTL_NVMSTAT : lm3s_sysctl.h
  • SYSCTL_NVMSTAT_FWB : lm3s_sysctl.h
  • SYSCTL_NVMSTAT_TPSW : lm3s_sysctl.h
  • SYSCTL_PBORCTL : lm3s_sysctl.h
  • SYSCTL_PBORCTL_BOR_MASK : lm3s_sysctl.h
  • SYSCTL_PBORCTL_BOR_SH : lm3s_sysctl.h
  • SYSCTL_PBORCTL_BORIOR : lm3s_sysctl.h
  • SYSCTL_PBORCTL_BORTIM_M : lm3s_sysctl.h
  • SYSCTL_PBORCTL_BORTIM_S : lm3s_sysctl.h
  • SYSCTL_PBORCTL_BORWT : lm3s_sysctl.h
  • SYSCTL_PBORCTL_R : lm3s_com.h
  • SYSCTL_PIOSCCAL : lm3s_sysctl.h
  • SYSCTL_PIOSCCAL_CAL : lm3s_sysctl.h
  • SYSCTL_PIOSCCAL_UPDATE : lm3s_sysctl.h
  • SYSCTL_PIOSCCAL_UT_M : lm3s_sysctl.h
  • SYSCTL_PIOSCCAL_UT_S : lm3s_sysctl.h
  • SYSCTL_PIOSCCAL_UTEN : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT_CR_M : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT_CRFAIL : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT_CRNONE : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT_CRPASS : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT_CT_M : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT_CT_S : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT_DT_M : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT_DT_S : lm3s_sysctl.h
  • SYSCTL_PLLCFG : lm3s_sysctl.h
  • SYSCTL_PLLCFG_F_M : lm3s_sysctl.h
  • SYSCTL_PLLCFG_F_MASK : lm3s_sysctl.h
  • SYSCTL_PLLCFG_F_S : lm3s_sysctl.h
  • SYSCTL_PLLCFG_F_SHIFT : lm3s_sysctl.h
  • SYSCTL_PLLCFG_OD_1 : lm3s_sysctl.h
  • SYSCTL_PLLCFG_OD_2 : lm3s_sysctl.h
  • SYSCTL_PLLCFG_OD_4 : lm3s_sysctl.h
  • SYSCTL_PLLCFG_OD_M : lm3s_sysctl.h
  • SYSCTL_PLLCFG_OD_MASK : lm3s_sysctl.h
  • SYSCTL_PLLCFG_R : lm3s_com.h
  • SYSCTL_PLLCFG_R_M : lm3s_sysctl.h
  • SYSCTL_PLLCFG_R_MASK : lm3s_sysctl.h
  • SYSCTL_PLLCFG_R_S : lm3s_sysctl.h
  • SYSCTL_PLLCFG_R_SHIFT : lm3s_sysctl.h
  • SYSCTL_RCC : lm3s_sysctl.h
  • SYSCTL_RCC2 : lm3s_sysctl.h
  • SYSCTL_RCC2_BYPASS2 : lm3s_sysctl.h
  • SYSCTL_RCC2_DIV400 : lm3s_sysctl.h
  • SYSCTL_RCC2_FRACT : lm3s_sysctl.h
  • SYSCTL_RCC2_OSCSRC2_30 : lm3s_sysctl.h
  • SYSCTL_RCC2_OSCSRC2_32 : lm3s_sysctl.h
  • SYSCTL_RCC2_OSCSRC2_419 : lm3s_sysctl.h
  • SYSCTL_RCC2_OSCSRC2_IO : lm3s_sysctl.h
  • SYSCTL_RCC2_OSCSRC2_IO4 : lm3s_sysctl.h
  • SYSCTL_RCC2_OSCSRC2_M : lm3s_sysctl.h
  • SYSCTL_RCC2_OSCSRC2_MO : lm3s_sysctl.h
  • SYSCTL_RCC2_OSCSRC2_MSK : lm3s_sysctl.h
  • SYSCTL_RCC2_PWRDN2 : lm3s_sysctl.h
  • SYSCTL_RCC2_R : lm3s_com.h
  • SYSCTL_RCC2_SYSDIV2_10 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_11 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_12 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_13 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_14 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_15 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_16 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_17 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_18 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_19 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_2 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_20 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_21 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_22 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_23 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_24 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_25 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_26 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_27 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_28 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_29 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_3 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_30 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_31 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_32 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_33 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_34 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_35 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_36 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_37 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_38 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_39 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_4 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_40 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_41 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_42 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_43 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_44 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_45 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_46 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_47 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_48 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_49 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_5 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_50 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_51 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_52 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_53 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_54 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_55 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_56 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_57 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_58 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_59 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_6 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_60 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_61 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_62 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_63 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_64 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_7 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_8 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_9 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_M : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_MSK : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_S : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2LSB : lm3s_sysctl.h
  • SYSCTL_RCC2_USBPWRDN : lm3s_sysctl.h
  • SYSCTL_RCC2_USEFRACT : lm3s_sysctl.h
  • SYSCTL_RCC2_USERCC2 : lm3s_sysctl.h
  • SYSCTL_RCC_ACG : lm3s_sysctl.h
  • SYSCTL_RCC_BYPASS : lm3s_sysctl.h
  • SYSCTL_RCC_IOSCDIS : lm3s_sysctl.h
  • SYSCTL_RCC_IOSCVER : lm3s_sysctl.h
  • SYSCTL_RCC_MOSCDIS : lm3s_sysctl.h
  • SYSCTL_RCC_MOSCVER : lm3s_sysctl.h
  • SYSCTL_RCC_OE : lm3s_sysctl.h
  • SYSCTL_RCC_OEN : lm3s_sysctl.h
  • SYSCTL_RCC_OSCSRC_30 : lm3s_sysctl.h
  • SYSCTL_RCC_OSCSRC_INT : lm3s_sysctl.h
  • SYSCTL_RCC_OSCSRC_INT4 : lm3s_sysctl.h
  • SYSCTL_RCC_OSCSRC_M : lm3s_sysctl.h
  • SYSCTL_RCC_OSCSRC_MAIN : lm3s_sysctl.h
  • SYSCTL_RCC_OSCSRC_MASK : lm3s_sysctl.h
  • SYSCTL_RCC_OSCSRC_S : lm3s_sysctl.h
  • SYSCTL_RCC_OSCSRC_SHIFT : lm3s_sysctl.h
  • SYSCTL_RCC_PLLVER : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_16 : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_2 : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_32 : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_4 : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_64 : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_8 : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_M : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_MASK : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_S : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_SHIFT : lm3s_sysctl.h
  • SYSCTL_RCC_PWRDN : lm3s_sysctl.h
  • SYSCTL_RCC_R : lm3s_com.h
  • SYSCTL_RCC_SYSDIV_10 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_11 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_12 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_13 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_14 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_15 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_16 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_2 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_3 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_4 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_5 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_6 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_7 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_8 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_9 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_M : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_MASK : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_S : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_SHIFT : lm3s_sysctl.h
  • SYSCTL_RCC_USE_PWMDIV : lm3s_sysctl.h
  • SYSCTL_RCC_USE_SYSDIV : lm3s_sysctl.h
  • SYSCTL_RCC_USEPWMDIV : lm3s_sysctl.h
  • SYSCTL_RCC_USESYSDIV : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_10MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_12_2MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_12MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_13_5MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_14_3MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_16_3MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_16MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_1_84MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_1MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_2_45MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_2MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_3_57MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_3_68MHz : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_3_68MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_4_09MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_4_91MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_4MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_4MHz : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_5_12MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_5MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_6_14MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_6MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_7_37MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_8_19MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_8MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_M : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_MASK : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_S : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_SHIFT : lm3s_sysctl.h
  • SYSCTL_RCGC0 : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC0 : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC0SPD_125K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC0SPD_1M : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC0SPD_250K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC0SPD_500K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC0SPD_M : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC1 : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC1SPD_125K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC1SPD_1M : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC1SPD_250K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC1SPD_500K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC1SPD_M : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADCSPD125K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADCSPD1M : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADCSPD250K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADCSPD500K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADCSPD_M : lm3s_sysctl.h
  • SYSCTL_RCGC0_CAN0 : lm3s_sysctl.h
  • SYSCTL_RCGC0_CAN1 : lm3s_sysctl.h
  • SYSCTL_RCGC0_CAN2 : lm3s_sysctl.h
  • SYSCTL_RCGC0_HIB : lm3s_sysctl.h
  • SYSCTL_RCGC0_PWM : lm3s_sysctl.h
  • SYSCTL_RCGC0_R : lm3s_com.h
  • SYSCTL_RCGC0_WDT : lm3s_sysctl.h
  • SYSCTL_RCGC0_WDT0 : lm3s_sysctl.h
  • SYSCTL_RCGC0_WDT1 : lm3s_sysctl.h
  • SYSCTL_RCGC1 : lm3s_sysctl.h
  • SYSCTL_RCGC1_COMP0 : lm3s_sysctl.h
  • SYSCTL_RCGC1_COMP1 : lm3s_sysctl.h
  • SYSCTL_RCGC1_COMP2 : lm3s_sysctl.h
  • SYSCTL_RCGC1_EPI0 : lm3s_sysctl.h
  • SYSCTL_RCGC1_I2C0 : lm3s_sysctl.h
  • SYSCTL_RCGC1_I2C1 : lm3s_sysctl.h
  • SYSCTL_RCGC1_I2S0 : lm3s_sysctl.h
  • SYSCTL_RCGC1_QEI0 : lm3s_sysctl.h
  • SYSCTL_RCGC1_QEI1 : lm3s_sysctl.h
  • SYSCTL_RCGC1_R : lm3s_com.h
  • SYSCTL_RCGC1_SSI0 : lm3s_sysctl.h
  • SYSCTL_RCGC1_SSI1 : lm3s_sysctl.h
  • SYSCTL_RCGC1_TIMER0 : lm3s_sysctl.h
  • SYSCTL_RCGC1_TIMER1 : lm3s_sysctl.h
  • SYSCTL_RCGC1_TIMER2 : lm3s_sysctl.h
  • SYSCTL_RCGC1_TIMER3 : lm3s_sysctl.h
  • SYSCTL_RCGC1_UART0 : lm3s_sysctl.h
  • SYSCTL_RCGC1_UART1 : lm3s_sysctl.h
  • SYSCTL_RCGC1_UART2 : lm3s_sysctl.h
  • SYSCTL_RCGC2 : lm3s_sysctl.h
  • SYSCTL_RCGC2_EMAC0 : lm3s_sysctl.h
  • SYSCTL_RCGC2_EPHY0 : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOA : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOB : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOC : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOD : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOE : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOF : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOG : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOH : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOJ : lm3s_sysctl.h
  • SYSCTL_RCGC2_R : lm3s_com.h
  • SYSCTL_RCGC2_UDMA : lm3s_sysctl.h
  • SYSCTL_RCGC2_USB0 : lm3s_sysctl.h
  • SYSCTL_RESC : lm3s_sysctl.h
  • SYSCTL_RESC_BOR : lm3s_sysctl.h
  • SYSCTL_RESC_EXT : lm3s_sysctl.h
  • SYSCTL_RESC_LDO : lm3s_sysctl.h
  • SYSCTL_RESC_MOSCFAIL : lm3s_sysctl.h
  • SYSCTL_RESC_POR : lm3s_sysctl.h
  • SYSCTL_RESC_R : lm3s_com.h
  • SYSCTL_RESC_SW : lm3s_sysctl.h
  • SYSCTL_RESC_WDOG : lm3s_sysctl.h
  • SYSCTL_RESC_WDT : lm3s_sysctl.h
  • SYSCTL_RESC_WDT0 : lm3s_sysctl.h
  • SYSCTL_RESC_WDT1 : lm3s_sysctl.h
  • SYSCTL_RIS : lm3s_sysctl.h
  • SYSCTL_RIS_BORRIS : lm3s_sysctl.h
  • SYSCTL_RIS_CLRIS : lm3s_sysctl.h
  • SYSCTL_RIS_IOFRIS : lm3s_sysctl.h
  • SYSCTL_RIS_LDORIS : lm3s_sysctl.h
  • SYSCTL_RIS_MOFRIS : lm3s_sysctl.h
  • SYSCTL_RIS_MOSCPUPRIS : lm3s_sysctl.h
  • SYSCTL_RIS_PLLFRIS : lm3s_sysctl.h
  • SYSCTL_RIS_PLLLRIS : lm3s_sysctl.h
  • SYSCTL_RIS_R : lm3s_com.h
  • SYSCTL_RIS_USBPLLLRIS : lm3s_sysctl.h
  • SYSCTL_SCGC0 : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC0 : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC0SPD_125K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC0SPD_1M : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC0SPD_250K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC0SPD_500K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC0SPD_M : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC1 : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC1SPD_125K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC1SPD_1M : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC1SPD_250K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC1SPD_500K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC1SPD_M : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADCSPD125K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADCSPD1M : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADCSPD250K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADCSPD500K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADCSPD_M : lm3s_sysctl.h
  • SYSCTL_SCGC0_CAN0 : lm3s_sysctl.h
  • SYSCTL_SCGC0_CAN1 : lm3s_sysctl.h
  • SYSCTL_SCGC0_CAN2 : lm3s_sysctl.h
  • SYSCTL_SCGC0_HIB : lm3s_sysctl.h
  • SYSCTL_SCGC0_PWM : lm3s_sysctl.h
  • SYSCTL_SCGC0_R : lm3s_com.h
  • SYSCTL_SCGC0_WDT : lm3s_sysctl.h
  • SYSCTL_SCGC0_WDT0 : lm3s_sysctl.h
  • SYSCTL_SCGC0_WDT1 : lm3s_sysctl.h
  • SYSCTL_SCGC1 : lm3s_sysctl.h
  • SYSCTL_SCGC1_COMP0 : lm3s_sysctl.h
  • SYSCTL_SCGC1_COMP1 : lm3s_sysctl.h
  • SYSCTL_SCGC1_COMP2 : lm3s_sysctl.h
  • SYSCTL_SCGC1_EPI0 : lm3s_sysctl.h
  • SYSCTL_SCGC1_I2C0 : lm3s_sysctl.h
  • SYSCTL_SCGC1_I2C1 : lm3s_sysctl.h
  • SYSCTL_SCGC1_I2S0 : lm3s_sysctl.h
  • SYSCTL_SCGC1_QEI0 : lm3s_sysctl.h
  • SYSCTL_SCGC1_QEI1 : lm3s_sysctl.h
  • SYSCTL_SCGC1_R : lm3s_com.h
  • SYSCTL_SCGC1_SSI0 : lm3s_sysctl.h
  • SYSCTL_SCGC1_SSI1 : lm3s_sysctl.h
  • SYSCTL_SCGC1_TIMER0 : lm3s_sysctl.h
  • SYSCTL_SCGC1_TIMER1 : lm3s_sysctl.h
  • SYSCTL_SCGC1_TIMER2 : lm3s_sysctl.h
  • SYSCTL_SCGC1_TIMER3 : lm3s_sysctl.h
  • SYSCTL_SCGC1_UART0 : lm3s_sysctl.h
  • SYSCTL_SCGC1_UART1 : lm3s_sysctl.h
  • SYSCTL_SCGC1_UART2 : lm3s_sysctl.h
  • SYSCTL_SCGC2 : lm3s_sysctl.h
  • SYSCTL_SCGC2_EMAC0 : lm3s_sysctl.h
  • SYSCTL_SCGC2_EPHY0 : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOA : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOB : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOC : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOD : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOE : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOF : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOG : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOH : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOJ : lm3s_sysctl.h
  • SYSCTL_SCGC2_R : lm3s_com.h
  • SYSCTL_SCGC2_UDMA : lm3s_sysctl.h
  • SYSCTL_SCGC2_USB0 : lm3s_sysctl.h
  • SYSCTL_SET0_ADC : lm3s_sysctl.h
  • SYSCTL_SET0_ADCSPD_125K : lm3s_sysctl.h
  • SYSCTL_SET0_ADCSPD_1M : lm3s_sysctl.h
  • SYSCTL_SET0_ADCSPD_250K : lm3s_sysctl.h
  • SYSCTL_SET0_ADCSPD_500K : lm3s_sysctl.h
  • SYSCTL_SET0_ADCSPD_MASK : lm3s_sysctl.h
  • SYSCTL_SET0_CAN0 : lm3s_sysctl.h
  • SYSCTL_SET0_CAN1 : lm3s_sysctl.h
  • SYSCTL_SET0_CAN2 : lm3s_sysctl.h
  • SYSCTL_SET0_HIB : lm3s_sysctl.h
  • SYSCTL_SET0_PWM : lm3s_sysctl.h
  • SYSCTL_SET0_WDOG : lm3s_sysctl.h
  • SYSCTL_SET1_COMP0 : lm3s_sysctl.h
  • SYSCTL_SET1_COMP1 : lm3s_sysctl.h
  • SYSCTL_SET1_COMP2 : lm3s_sysctl.h
  • SYSCTL_SET1_I2C : lm3s_sysctl.h
  • SYSCTL_SET1_I2C0 : lm3s_sysctl.h
  • SYSCTL_SET1_I2C1 : lm3s_sysctl.h
  • SYSCTL_SET1_QEI : lm3s_sysctl.h
  • SYSCTL_SET1_QEI0 : lm3s_sysctl.h
  • SYSCTL_SET1_QEI1 : lm3s_sysctl.h
  • SYSCTL_SET1_SSI : lm3s_sysctl.h
  • SYSCTL_SET1_SSI0 : lm3s_sysctl.h
  • SYSCTL_SET1_SSI1 : lm3s_sysctl.h
  • SYSCTL_SET1_TIMER0 : lm3s_sysctl.h
  • SYSCTL_SET1_TIMER1 : lm3s_sysctl.h
  • SYSCTL_SET1_TIMER2 : lm3s_sysctl.h
  • SYSCTL_SET1_TIMER3 : lm3s_sysctl.h
  • SYSCTL_SET1_UART0 : lm3s_sysctl.h
  • SYSCTL_SET1_UART1 : lm3s_sysctl.h
  • SYSCTL_SET1_UART2 : lm3s_sysctl.h
  • SYSCTL_SET2_ETH : lm3s_sysctl.h
  • SYSCTL_SET2_GPIOA : lm3s_sysctl.h
  • SYSCTL_SET2_GPIOB : lm3s_sysctl.h
  • SYSCTL_SET2_GPIOC : lm3s_sysctl.h
  • SYSCTL_SET2_GPIOD : lm3s_sysctl.h
  • SYSCTL_SET2_GPIOE : lm3s_sysctl.h
  • SYSCTL_SET2_GPIOF : lm3s_sysctl.h
  • SYSCTL_SET2_GPIOG : lm3s_sysctl.h
  • SYSCTL_SET2_GPIOH : lm3s_sysctl.h
  • SYSCTL_SRCR0 : lm3s_sysctl.h
  • SYSCTL_SRCR0_ADC : lm3s_sysctl.h
  • SYSCTL_SRCR0_ADC0 : lm3s_sysctl.h
  • SYSCTL_SRCR0_ADC1 : lm3s_sysctl.h
  • SYSCTL_SRCR0_CAN0 : lm3s_sysctl.h
  • SYSCTL_SRCR0_CAN1 : lm3s_sysctl.h
  • SYSCTL_SRCR0_CAN2 : lm3s_sysctl.h
  • SYSCTL_SRCR0_HIB : lm3s_sysctl.h
  • SYSCTL_SRCR0_PWM : lm3s_sysctl.h
  • SYSCTL_SRCR0_R : lm3s_com.h
  • SYSCTL_SRCR0_WDT : lm3s_sysctl.h
  • SYSCTL_SRCR0_WDT0 : lm3s_sysctl.h
  • SYSCTL_SRCR0_WDT1 : lm3s_sysctl.h
  • SYSCTL_SRCR1 : lm3s_sysctl.h
  • SYSCTL_SRCR1_COMP0 : lm3s_sysctl.h
  • SYSCTL_SRCR1_COMP1 : lm3s_sysctl.h
  • SYSCTL_SRCR1_COMP2 : lm3s_sysctl.h
  • SYSCTL_SRCR1_EPI0 : lm3s_sysctl.h
  • SYSCTL_SRCR1_I2C0 : lm3s_sysctl.h
  • SYSCTL_SRCR1_I2C1 : lm3s_sysctl.h
  • SYSCTL_SRCR1_I2S0 : lm3s_sysctl.h
  • SYSCTL_SRCR1_QEI0 : lm3s_sysctl.h
  • SYSCTL_SRCR1_QEI1 : lm3s_sysctl.h
  • SYSCTL_SRCR1_R : lm3s_com.h
  • SYSCTL_SRCR1_SSI0 : lm3s_sysctl.h
  • SYSCTL_SRCR1_SSI1 : lm3s_sysctl.h
  • SYSCTL_SRCR1_TIMER0 : lm3s_sysctl.h
  • SYSCTL_SRCR1_TIMER1 : lm3s_sysctl.h
  • SYSCTL_SRCR1_TIMER2 : lm3s_sysctl.h
  • SYSCTL_SRCR1_TIMER3 : lm3s_sysctl.h
  • SYSCTL_SRCR1_UART0 : lm3s_sysctl.h
  • SYSCTL_SRCR1_UART1 : lm3s_sysctl.h
  • SYSCTL_SRCR1_UART2 : lm3s_sysctl.h
  • SYSCTL_SRCR2 : lm3s_sysctl.h
  • SYSCTL_SRCR2_EMAC0 : lm3s_sysctl.h
  • SYSCTL_SRCR2_EPHY0 : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOA : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOB : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOC : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOD : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOE : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOF : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOG : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOH : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOJ : lm3s_sysctl.h
  • SYSCTL_SRCR2_R : lm3s_com.h
  • SYSCTL_SRCR2_UDMA : lm3s_sysctl.h
  • SYSCTL_SRCR2_USB0 : lm3s_sysctl.h
  • SYSCTL_USER0 : lm3s_sysctl.h
  • SYSCTL_USER1 : lm3s_sysctl.h
  • sysirq_enabled() : sysirq_at91.c , sysirq_at91.h
  • sysirq_handler_t : sysirq_at91.h
  • sysirq_init() : irq_cm3.c , irq_cm3.h , sysirq_at91.h , sysirq_at91.c
  • SYSIRQ_PIT : sysirq_at91.h
  • SYSIRQ_PRIORITY : sysirq_at91.c
  • sysirq_setEnable() : sysirq_at91.h , sysirq_at91.c
  • sysirq_setEnable_t : sysirq_at91.h
  • sysirq_setHandler() : sysirq_at91.h , sysirq_at91.c , irq_cm3.c , irq_cm3.h
  • sysirq_t : sysirq_at91.h
  • sysirq_tab : sysirq_at91.c


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- t -

  • TAG_END_MARKER : dtag.h
  • TAG_ETX : keytag.c
  • TAG_STX : keytag.c
  • TAMPER_IRQHANDLER : stm32_ints.h
  • tas5706a_init_1() : tas5706a.c , tas5706a.h
  • tas5706a_setLowPower_2() : tas5706a.h , tas5706a.c
  • tas5706a_setVolume_3() : tas5706a.c , tas5706a.h
  • TAS_VOL_MAX : tas5706a.h
  • TAS_VOL_MIN : tas5706a.h
  • TC0_BASE : sam3_tc.h
  • TC0_BCR : sam3_tc.h
  • TC0_BCR_OFF : sam3_tc.h
  • TC0_BMR : sam3_tc.h
  • TC0_BMR_OFF : sam3_tc.h
  • TC0_CCR : at91_tc.h
  • TC0_CCR0 : sam3_tc.h
  • TC0_CCR0_OFF : sam3_tc.h
  • TC0_CCR1 : sam3_tc.h
  • TC0_CCR1_OFF : sam3_tc.h
  • TC0_CCR2 : sam3_tc.h
  • TC0_CCR2_OFF : sam3_tc.h
  • TC0_CMR : at91_tc.h
  • TC0_CMR0 : sam3_tc.h
  • TC0_CMR0_OFF : sam3_tc.h
  • TC0_CMR1 : sam3_tc.h
  • TC0_CMR1_OFF : sam3_tc.h
  • TC0_CMR2 : sam3_tc.h
  • TC0_CMR2_OFF : sam3_tc.h
  • TC0_CV : at91_tc.h
  • TC0_CV0 : sam3_tc.h
  • TC0_CV0_OFF : sam3_tc.h
  • TC0_CV1 : sam3_tc.h
  • TC0_CV1_OFF : sam3_tc.h
  • TC0_CV2 : sam3_tc.h
  • TC0_CV2_OFF : sam3_tc.h
  • TC0_FMR : sam3_tc.h
  • TC0_FMR_OFF : sam3_tc.h
  • TC0_IDR : at91_tc.h
  • TC0_IDR0 : sam3_tc.h
  • TC0_IDR0_OFF : sam3_tc.h
  • TC0_IDR1 : sam3_tc.h
  • TC0_IDR1_OFF : sam3_tc.h
  • TC0_IDR2 : sam3_tc.h
  • TC0_IDR2_OFF : sam3_tc.h
  • TC0_IER : at91_tc.h
  • TC0_IER0 : sam3_tc.h
  • TC0_IER0_OFF : sam3_tc.h
  • TC0_IER1 : sam3_tc.h
  • TC0_IER1_OFF : sam3_tc.h
  • TC0_IER2 : sam3_tc.h
  • TC0_IER2_OFF : sam3_tc.h
  • TC0_IMR : at91_tc.h
  • TC0_IMR0 : sam3_tc.h
  • TC0_IMR0_OFF : sam3_tc.h
  • TC0_IMR1 : sam3_tc.h
  • TC0_IMR1_OFF : sam3_tc.h
  • TC0_IMR2 : sam3_tc.h
  • TC0_IMR2_OFF : sam3_tc.h
  • TC0_QIDR : sam3_tc.h
  • TC0_QIDR_OFF : sam3_tc.h
  • TC0_QIER : sam3_tc.h
  • TC0_QIER_OFF : sam3_tc.h
  • TC0_QIMR : sam3_tc.h
  • TC0_QIMR_OFF : sam3_tc.h
  • TC0_QISR : sam3_tc.h
  • TC0_QISR_OFF : sam3_tc.h
  • TC0_RA : at91_tc.h
  • TC0_RA0 : sam3_tc.h
  • TC0_RA0_OFF : sam3_tc.h
  • TC0_RA1 : sam3_tc.h
  • TC0_RA1_OFF : sam3_tc.h
  • TC0_RA2 : sam3_tc.h
  • TC0_RA2_OFF : sam3_tc.h
  • TC0_RB : at91_tc.h
  • TC0_RB0 : sam3_tc.h
  • TC0_RB0_OFF : sam3_tc.h
  • TC0_RB1 : sam3_tc.h
  • TC0_RB1_OFF : sam3_tc.h
  • TC0_RB2 : sam3_tc.h
  • TC0_RB2_OFF : sam3_tc.h
  • TC0_RC : at91_tc.h
  • TC0_RC0 : sam3_tc.h
  • TC0_RC0_OFF : sam3_tc.h
  • TC0_RC1 : sam3_tc.h
  • TC0_RC1_OFF : sam3_tc.h
  • TC0_RC2 : sam3_tc.h
  • TC0_RC2_OFF : sam3_tc.h
  • TC0_SMMR0 : sam3_tc.h
  • TC0_SMMR0_OFF : sam3_tc.h
  • TC0_SMMR1 : sam3_tc.h
  • TC0_SMMR1_OFF : sam3_tc.h
  • TC0_SMMR2 : sam3_tc.h
  • TC0_SMMR2_OFF : sam3_tc.h
  • TC0_SR : at91_tc.h
  • TC0_SR0 : sam3_tc.h
  • TC0_SR0_OFF : sam3_tc.h
  • TC0_SR1 : sam3_tc.h
  • TC0_SR1_OFF : sam3_tc.h
  • TC0_SR2 : sam3_tc.h
  • TC0_SR2_OFF : sam3_tc.h
  • TC0_WPMR : sam3_tc.h
  • TC0_WPMR_OFF : sam3_tc.h
  • TC1_BASE : sam3_tc.h
  • TC1_CCR : at91_tc.h
  • TC1_CMR : at91_tc.h
  • TC1_CV : at91_tc.h
  • TC1_IDR : at91_tc.h
  • TC1_IER : at91_tc.h
  • TC1_IMR : at91_tc.h
  • TC1_RA : at91_tc.h
  • TC1_RB : at91_tc.h
  • TC1_RC : at91_tc.h
  • TC1_SR : at91_tc.h
  • TC2_BASE : sam3_tc.h
  • TC2_CCR : at91_tc.h
  • TC2_CMR : at91_tc.h
  • TC2_CV : at91_tc.h
  • TC2_IDR : at91_tc.h
  • TC2_IER : at91_tc.h
  • TC2_IMR : at91_tc.h
  • TC2_RA : at91_tc.h
  • TC2_RB : at91_tc.h
  • TC2_RC : at91_tc.h
  • TC2_SR : at91_tc.h
  • TC_ABETRG_MASK : at91_tc.h
  • TC_ABETRG_TIOA : at91_tc.h
  • TC_ACPA_CLEAR_OUTPUT : at91_tc.h
  • TC_ACPA_MASK : at91_tc.h
  • TC_ACPA_SET_OUTPUT : at91_tc.h
  • TC_ACPA_TOGGLE_OUTPUT : at91_tc.h
  • TC_ACPC_CLEAR_OUTPUT : at91_tc.h
  • TC_ACPC_MASK : at91_tc.h
  • TC_ACPC_SET_OUTPUT : at91_tc.h
  • TC_ACPC_TOGGLE_OUTPUT : at91_tc.h
  • TC_AEEVT_CLEAR_OUTPUT : at91_tc.h
  • TC_AEEVT_MASK : at91_tc.h
  • TC_AEEVT_SET_OUTPUT : at91_tc.h
  • TC_AEEVT_TOGGLE_OUTPUT : at91_tc.h
  • TC_ASWTRG_CLEAR_OUTPUT : at91_tc.h
  • TC_ASWTRG_MASK : at91_tc.h
  • TC_ASWTRG_SET_OUTPUT : at91_tc.h
  • TC_ASWTRG_TOGGLE_OUTPUT : at91_tc.h
  • TC_BCPB_CLEAR_OUTPUT : at91_tc.h
  • TC_BCPB_MASK : at91_tc.h
  • TC_BCPB_SET_OUTPUT : at91_tc.h
  • TC_BCPB_TOGGLE_OUTPUT : at91_tc.h
  • TC_BCPC_CLEAR_OUTPUT : at91_tc.h
  • TC_BCPC_MASK : at91_tc.h
  • TC_BCPC_SET_OUTPUT : at91_tc.h
  • TC_BCPC_TOGGLE_OUTPUT : at91_tc.h
  • TC_BCR : at91_tc.h
  • TC_BCR_OFF : at91_tc.h
  • TC_BEEVT_CLEAR_OUTPUT : at91_tc.h
  • TC_BEEVT_MASK : at91_tc.h
  • TC_BEEVT_SET_OUTPUT : at91_tc.h
  • TC_BEEVT_TOGGLE_OUTPUT : at91_tc.h
  • TC_BMR : at91_tc.h
  • TC_BMR_OFF : at91_tc.h
  • TC_BSWTRG_CLEAR_OUTPUT : at91_tc.h
  • TC_BSWTRG_MASK : at91_tc.h
  • TC_BSWTRG_SET_OUTPUT : at91_tc.h
  • TC_BSWTRG_TOGGLE_OUTPUT : at91_tc.h
  • TC_BURST_MASK : at91_tc.h
  • TC_BURST_NONE : at91_tc.h
  • TC_BURST_XC1 : at91_tc.h
  • TC_BURST_XC2 : at91_tc.h
  • TC_BUSRT_XC0 : at91_tc.h
  • TC_CCR_CLKDIS : sam3_tc.h
  • TC_CCR_CLKEN : sam3_tc.h
  • TC_CCR_SWTRG : sam3_tc.h
  • TC_CLKDIS : at91_tc.h
  • TC_CLKEN : at91_tc.h
  • TC_CLKI : at91_tc.h
  • TC_CLKS_MASK : at91_tc.h
  • TC_CLKS_MCK1024 : at91_tc.h
  • TC_CLKS_MCK128 : at91_tc.h
  • TC_CLKS_MCK2 : at91_tc.h
  • TC_CLKS_MCK32 : at91_tc.h
  • TC_CLKS_MCK8 : at91_tc.h
  • TC_CLKS_XC0 : at91_tc.h
  • TC_CLKS_XC1 : at91_tc.h
  • TC_CLKS_XC2 : at91_tc.h
  • TC_CLKSTA : at91_tc.h
  • TC_CMR_ACPA_CLEAR : sam3_tc.h
  • TC_CMR_ACPA_SET : sam3_tc.h
  • TC_CMR_ACPA_TOGGLE : sam3_tc.h
  • TC_CMR_ACPC_CLEAR : sam3_tc.h
  • TC_CMR_ACPC_SET : sam3_tc.h
  • TC_CMR_ACPC_TOGGLE : sam3_tc.h
  • TC_CMR_CPCTRG : sam3_tc.h
  • TC_CMR_OFF : at91_tc.h
  • TC_CMR_WAVE : sam3_tc.h
  • TC_COVFS : at91_tc.h
  • TC_CPAS : at91_tc.h
  • TC_CPBS : at91_tc.h
  • TC_CPCDIS : at91_tc.h
  • TC_CPCS : at91_tc.h
  • TC_CPCSTOP : at91_tc.h
  • TC_CPCTRG : at91_tc.h
  • TC_CV_OFF : at91_tc.h
  • TC_EEVT_MASK : at91_tc.h
  • TC_EEVT_TIOB : at91_tc.h
  • TC_EEVT_XC0 : at91_tc.h
  • TC_EEVT_XC1 : at91_tc.h
  • TC_EEVT_XC2 : at91_tc.h
  • TC_EEVTEDG_BOTH_EDGE : at91_tc.h
  • TC_EEVTEDG_FALLING_EDGE : at91_tc.h
  • TC_EEVTEDG_MASK : at91_tc.h
  • TC_EEVTEDG_RISING_EDGE : at91_tc.h
  • TC_ENETRG : at91_tc.h
  • TC_ETRGEDG_BOTH_EDGE : at91_tc.h
  • TC_ETRGEDG_FALLING_EDGE : at91_tc.h
  • TC_ETRGEDG_MASK : at91_tc.h
  • TC_ETRGEDG_RISING_EDGE : at91_tc.h
  • TC_ETRGS : at91_tc.h
  • TC_IDR_OFF : at91_tc.h
  • TC_IER_OFF : at91_tc.h
  • TC_IMR_OFF : at91_tc.h
  • TC_LDBDIS : at91_tc.h
  • TC_LDBSTOP : at91_tc.h
  • TC_LDRA_BOTH_EDGE : at91_tc.h
  • TC_LDRA_FALLING_EDGE : at91_tc.h
  • TC_LDRA_MASK : at91_tc.h
  • TC_LDRA_RISING_EDGE : at91_tc.h
  • TC_LDRAS : at91_tc.h
  • TC_LDRB_BOTH_EDGE : at91_tc.h
  • TC_LDRB_FALLING_EDGE : at91_tc.h
  • TC_LDRB_MASK : at91_tc.h
  • TC_LDRB_RISING_EDGE : at91_tc.h
  • TC_LDRBS : at91_tc.h
  • TC_LOVRS : at91_tc.h
  • TC_MTIOA : at91_tc.h
  • TC_MTIOB : at91_tc.h
  • TC_NONEXC0 : at91_tc.h
  • TC_NONEXC1 : at91_tc.h
  • TC_NONEXC2 : at91_tc.h
  • TC_RA_OFF : at91_tc.h
  • TC_RB_OFF : at91_tc.h
  • TC_RC_OFF : at91_tc.h
  • TC_SR_OFF : at91_tc.h
  • TC_SWTRG : at91_tc.h
  • TC_SYNC : at91_tc.h
  • TC_TC0_OFF : at91_tc.h
  • TC_TC0XC0S : at91_tc.h
  • TC_TC1_OFF : at91_tc.h
  • TC_TC1XC1S : at91_tc.h
  • TC_TC2_OFF : at91_tc.h
  • TC_TC2XC2S : at91_tc.h
  • TC_TCLK0XC0 : at91_tc.h
  • TC_TCLK1XC1 : at91_tc.h
  • TC_TCLK2XC2 : at91_tc.h
  • TC_TIMER_CLOCK1 : sam3_tc.h
  • TC_TIMER_CLOCK2 : sam3_tc.h
  • TC_TIOA0XC1 : at91_tc.h
  • TC_TIOA0XC2 : at91_tc.h
  • TC_TIOA1XC0 : at91_tc.h
  • TC_TIOA1XC2 : at91_tc.h
  • TC_TIOA2XC0 : at91_tc.h
  • TC_TIOA2XC1 : at91_tc.h
  • TC_WAVE : at91_tc.h
  • TC_WAVSEL_MASK : at91_tc.h
  • TC_WAVSEL_UP : at91_tc.h
  • TC_WAVSEL_UP_RC_TRG : at91_tc.h
  • TC_WAVSEL_UPDOWN : at91_tc.h
  • TC_WAVSEL_UPDOWN_RC_TRG : at91_tc.h
  • TCP_CALCULATE_EFF_SEND_MSS : cfg_lwip.h
  • TCP_CWND_DEBUG : cfg_lwip.h
  • TCP_DEBUG : cfg_lwip.h
  • TCP_DEFAULT_LISTEN_BACKLOG : cfg_lwip.h
  • TCP_FR_DEBUG : cfg_lwip.h
  • TCP_INPUT_DEBUG : cfg_lwip.h
  • TCP_LISTEN_BACKLOG : cfg_lwip.h
  • TCP_MAXRTX : cfg_lwip.h
  • TCP_MSS : cfg_lwip.h
  • TCP_OUTPUT_DEBUG : cfg_lwip.h
  • TCP_QLEN_DEBUG : cfg_lwip.h
  • TCP_QUEUE_OOSEQ : cfg_lwip.h
  • TCP_RST_DEBUG : cfg_lwip.h
  • TCP_RTO_DEBUG : cfg_lwip.h
  • TCP_SND_BUF : cfg_lwip.h
  • TCP_SND_QUEUELEN : cfg_lwip.h
  • TCP_SNDLOWAT : cfg_lwip.h
  • TCP_SYNMAXRTX : cfg_lwip.h
  • TCP_TTL : cfg_lwip.h
  • TCP_WND : cfg_lwip.h
  • TCP_WND_DEBUG : cfg_lwip.h
  • TCP_WND_UPDATE_THRESHOLD : cfg_lwip.h
  • TCPIP_DEBUG : cfg_lwip.h
  • TCPIP_MBOX_SIZE : cfg_lwip.h
  • TCPIP_THREAD_NAME : cfg_lwip.h
  • TCPIP_THREAD_PRIO : cfg_lwip.h
  • TCPIP_THREAD_STACKSIZE : cfg_lwip.h
  • TEA_BLOCK_LEN : tea.h
  • tea_dec() : tea.c , tea.h
  • tea_enc() : tea.c , tea.h
  • TEA_KEY_LEN : tea.h
  • TEXT_CENTER : text.h
  • text_charWidth() : text_format.c
  • text_clear() : text.c , text.h
  • TEXT_FILL : text.h
  • text_moveTo() : text.c , text.h
  • TEXT_NORMAL : text.h
  • text_printf() : text_format.c
  • text_putchar() : text.c , text.h
  • text_putglyph() : text.c
  • text_puts() : text_format.c
  • TEXT_RIGHT : text.h
  • text_setCoord() : text.c , text.h
  • text_style() : text.c , text.h
  • text_vprintf() : text_format.c
  • text_vwidthf() : text_format.c
  • text_widthf() : text_format.c
  • text_xprintf() : text_format.c
  • text_xyprintf() : text_format.c
  • text_xyvprintf() : text_format.c
  • tftp_init() : tftp.c , tftp.h
  • tftp_listen() : tftp.c , tftp.h
  • thermo_clearErrors() : thermo.c , thermo.h
  • thermo_do() : thermo.c
  • thermo_hw_off() : hw_thermo.h
  • thermo_hw_read() : hw_thermo.h
  • thermo_hw_set() : hw_thermo.h
  • thermo_hw_tolerance() : hw_thermo.h
  • thermo_init() : thermo.c , thermo.h
  • thermo_readTemperature() : thermo.c , thermo.h
  • thermo_setTarget() : thermo.c , thermo.h
  • thermo_softint() : thermo.c
  • thermo_start() : thermo.c , thermo.h
  • thermo_status() : thermo.h , thermo.c
  • thermo_stop() : thermo.c , thermo.h
  • thermo_timer() : thermo.c , thermo.h
  • THIS_FILE : debug.h
  • ticks_t : compiler.h
  • ticks_to_ms() : timer.h
  • ticks_to_us() : timer.h
  • TIM1_BRK_IRQHANDLER : stm32_ints.h
  • TIM1_CC_IRQHANDLER : stm32_ints.h
  • TIM1_TRG_COM_IRQHANDLER : stm32_ints.h
  • TIM1_UP_IRQHANDLER : stm32_ints.h
  • TIM2_IRQHANDLER : stm32_ints.h
  • TIM3_IRQHANDLER : stm32_ints.h
  • TIM4_IRQHANDLER : stm32_ints.h
  • TIME2CLOCKS : ramp.h
  • TIMER0_BASE : lm3s_memmap.h
  • TIMER0_CFG_R : lm3s_com.h
  • TIMER0_COMPARE0 : timer_lpc2.h
  • TIMER0_CTL_R : lm3s_com.h
  • TIMER0_ICR_R : lm3s_com.h
  • TIMER0_ID : timer_lpc2.c
  • TIMER0_IMR_R : lm3s_com.h
  • TIMER0_MIS_R : lm3s_com.h
  • TIMER0_RIS_R : lm3s_com.h
  • TIMER0_TAILR_R : lm3s_com.h
  • TIMER0_TAMATCHR_R : lm3s_com.h
  • TIMER0_TAMR_R : lm3s_com.h
  • TIMER0_TAPMR_R : lm3s_com.h
  • TIMER0_TAPR_R : lm3s_com.h
  • TIMER0_TAR_R : lm3s_com.h
  • TIMER0_TBILR_R : lm3s_com.h
  • TIMER0_TBMATCHR_R : lm3s_com.h
  • TIMER0_TBMR_R : lm3s_com.h
  • TIMER0_TBPMR_R : lm3s_com.h
  • TIMER0_TBPR_R : lm3s_com.h
  • TIMER0_TBR_R : lm3s_com.h
  • TIMER1_BASE : lm3s_memmap.h
  • TIMER1_CFG_R : lm3s_com.h
  • TIMER1_CTL_R : lm3s_com.h
  • TIMER1_ICR_R : lm3s_com.h
  • TIMER1_IMR_R : lm3s_com.h
  • TIMER1_MIS_R : lm3s_com.h
  • TIMER1_RIS_R : lm3s_com.h
  • TIMER1_TAILR_R : lm3s_com.h
  • TIMER1_TAMATCHR_R : lm3s_com.h
  • TIMER1_TAMR_R : lm3s_com.h
  • TIMER1_TAPMR_R : lm3s_com.h
  • TIMER1_TAPR_R : lm3s_com.h
  • TIMER1_TAR_R : lm3s_com.h
  • TIMER1_TBILR_R : lm3s_com.h
  • TIMER1_TBMATCHR_R : lm3s_com.h
  • TIMER1_TBMR_R : lm3s_com.h
  • TIMER1_TBPMR_R : lm3s_com.h
  • TIMER1_TBPR_R : lm3s_com.h
  • TIMER1_TBR_R : lm3s_com.h
  • TIMER2_BASE : lm3s_memmap.h
  • TIMER2_CFG_R : lm3s_com.h
  • TIMER2_CTL_R : lm3s_com.h
  • TIMER2_ICR_R : lm3s_com.h
  • TIMER2_IMR_R : lm3s_com.h
  • TIMER2_MIS_R : lm3s_com.h
  • TIMER2_RIS_R : lm3s_com.h
  • TIMER2_TAILR_R : lm3s_com.h
  • TIMER2_TAMATCHR_R : lm3s_com.h
  • TIMER2_TAMR_R : lm3s_com.h
  • TIMER2_TAPMR_R : lm3s_com.h
  • TIMER2_TAPR_R : lm3s_com.h
  • TIMER2_TAR_R : lm3s_com.h
  • TIMER2_TBILR_R : lm3s_com.h
  • TIMER2_TBMATCHR_R : lm3s_com.h
  • TIMER2_TBMR_R : lm3s_com.h
  • TIMER2_TBPMR_R : lm3s_com.h
  • TIMER2_TBPR_R : lm3s_com.h
  • TIMER2_TBR_R : lm3s_com.h
  • TIMER3_BASE : lm3s_memmap.h
  • TIMER3_CFG_R : lm3s_com.h
  • TIMER3_CTL_R : lm3s_com.h
  • TIMER3_ICR_R : lm3s_com.h
  • TIMER3_IMR_R : lm3s_com.h
  • TIMER3_MIS_R : lm3s_com.h
  • TIMER3_RIS_R : lm3s_com.h
  • TIMER3_TAILR_R : lm3s_com.h
  • TIMER3_TAMATCHR_R : lm3s_com.h
  • TIMER3_TAMR_R : lm3s_com.h
  • TIMER3_TAPMR_R : lm3s_com.h
  • TIMER3_TAPR_R : lm3s_com.h
  • TIMER3_TAR_R : lm3s_com.h
  • TIMER3_TBILR_R : lm3s_com.h
  • TIMER3_TBMATCHR_R : lm3s_com.h
  • TIMER3_TBMR_R : lm3s_com.h
  • TIMER3_TBPMR_R : lm3s_com.h
  • TIMER3_TBPR_R : lm3s_com.h
  • TIMER3_TBR_R : lm3s_com.h
  • timer_abort() : timer.c , timer.h
  • timer_add() : timer.h , timer.c
  • timer_addToList() : timer.c
  • timer_busyWait() : timer.c , timer.h
  • TIMER_CFG_16_BIT : lm3s_com.h
  • TIMER_CFG_32_BIT_RTC : lm3s_com.h
  • TIMER_CFG_32_BIT_TIMER : lm3s_com.h
  • TIMER_CFG_M : lm3s_com.h
  • timer_clock() : timer.h
  • timer_clock_unlocked() : timer.h
  • TIMER_CTL_RTCEN : lm3s_com.h
  • TIMER_CTL_TAEN : lm3s_com.h
  • TIMER_CTL_TAEVENT_BOTH : lm3s_com.h
  • TIMER_CTL_TAEVENT_M : lm3s_com.h
  • TIMER_CTL_TAEVENT_NEG : lm3s_com.h
  • TIMER_CTL_TAEVENT_POS : lm3s_com.h
  • TIMER_CTL_TAOTE : lm3s_com.h
  • TIMER_CTL_TAPWML : lm3s_com.h
  • TIMER_CTL_TASTALL : lm3s_com.h
  • TIMER_CTL_TBEN : lm3s_com.h
  • TIMER_CTL_TBEVENT_BOTH : lm3s_com.h
  • TIMER_CTL_TBEVENT_M : lm3s_com.h
  • TIMER_CTL_TBEVENT_NEG : lm3s_com.h
  • TIMER_CTL_TBEVENT_POS : lm3s_com.h
  • TIMER_CTL_TBOTE : lm3s_com.h
  • TIMER_CTL_TBPWML : lm3s_com.h
  • TIMER_CTL_TBSTALL : lm3s_com.h
  • TIMER_DEFAULT : timer_mega.h , timer_at91.h , timer_cm3.h , timer_lpc2.h , timer_xmega.h
  • timer_delay() : timer.h
  • timer_delayHp() : timer.c , timer.h
  • timer_delayTicks() : timer.c , timer.h
  • TIMER_HW_CNT : timer_lpc2.h
  • timer_hw_exit() : timer_cm3.h
  • timer_hw_hpread() : timer_lpc2.h
  • TIMER_HW_HPTICKS_PER_SEC : timer_mega.h , timer_qt.h , timer_dsp56k.h , timer_lpc2.h , timer_xmega.h , timer_posix.h
  • timer_hw_init() : timer_mega.h , timer_qt.c , timer_cm3.h , timer_mega.c , timer_lpc2.h , timer_cm3.c , timer_at91.h , timer_xmega.c , timer_xmega.h , timer_posix.c
  • timer_hw_irq : timer_posix.h , timer_lpc2.h , timer_mega.h , timer_qt.h
  • timer_hw_triggered : timer_qt.c , timer_mega.h , timer_lpc2.h
  • TIMER_ICR_CAECINT : lm3s_com.h
  • TIMER_ICR_CAMCINT : lm3s_com.h
  • TIMER_ICR_CBECINT : lm3s_com.h
  • TIMER_ICR_CBMCINT : lm3s_com.h
  • TIMER_ICR_RTCCINT : lm3s_com.h
  • TIMER_ICR_TATOCINT : lm3s_com.h
  • TIMER_ICR_TBTOCINT : lm3s_com.h
  • TIMER_IMR_CAEIM : lm3s_com.h
  • TIMER_IMR_CAMIM : lm3s_com.h
  • TIMER_IMR_CBEIM : lm3s_com.h
  • TIMER_IMR_CBMIM : lm3s_com.h
  • TIMER_IMR_RTCIM : lm3s_com.h
  • TIMER_IMR_TATOIM : lm3s_com.h
  • TIMER_IMR_TBTOIM : lm3s_com.h
  • TIMER_MIS_CAEMIS : lm3s_com.h
  • TIMER_MIS_CAMMIS : lm3s_com.h
  • TIMER_MIS_CBEMIS : lm3s_com.h
  • TIMER_MIS_CBMMIS : lm3s_com.h
  • TIMER_MIS_RTCMIS : lm3s_com.h
  • TIMER_MIS_TATOMIS : lm3s_com.h
  • TIMER_MIS_TBTOMIS : lm3s_com.h
  • TIMER_ON_GPTM : timer_cm3.h
  • TIMER_ON_OUTPUT_COMPARE0 : timer_mega.h
  • TIMER_ON_OUTPUT_COMPARE2 : timer_mega.h
  • TIMER_ON_OVERFLOW1 : timer_mega.h
  • TIMER_ON_OVERFLOW3 : timer_mega.h
  • TIMER_ON_PIT : timer_at91.h
  • TIMER_PRESCALER : timer_dsp56k.h
  • TIMER_RETRIGGER : timer_i196.h
  • TIMER_RIS_CAERIS : lm3s_com.h
  • TIMER_RIS_CAMRIS : lm3s_com.h
  • TIMER_RIS_CBERIS : lm3s_com.h
  • TIMER_RIS_CBMRIS : lm3s_com.h
  • TIMER_RIS_RTCRIS : lm3s_com.h
  • TIMER_RIS_TATORIS : lm3s_com.h
  • TIMER_RIS_TBTORIS : lm3s_com.h
  • timer_setDelay() : timer.h
  • timer_setEvent() : timer.h
  • timer_setSignal() : timer.h
  • timer_setSoftint() : timer.h
  • TIMER_TAILR_TAILRH_M : lm3s_com.h
  • TIMER_TAILR_TAILRH_S : lm3s_com.h
  • TIMER_TAILR_TAILRL_M : lm3s_com.h
  • TIMER_TAILR_TAILRL_S : lm3s_com.h
  • TIMER_TAMATCHR_TAMRH_M : lm3s_com.h
  • TIMER_TAMATCHR_TAMRH_S : lm3s_com.h
  • TIMER_TAMATCHR_TAMRL_M : lm3s_com.h
  • TIMER_TAMATCHR_TAMRL_S : lm3s_com.h
  • TIMER_TAMR_TAAMS : lm3s_com.h
  • TIMER_TAMR_TACMR : lm3s_com.h
  • TIMER_TAMR_TAMR_1_SHOT : lm3s_com.h
  • TIMER_TAMR_TAMR_CAP : lm3s_com.h
  • TIMER_TAMR_TAMR_M : lm3s_com.h
  • TIMER_TAMR_TAMR_PERIOD : lm3s_com.h
  • TIMER_TAPMR_TAPSMR_M : lm3s_com.h
  • TIMER_TAPMR_TAPSMR_S : lm3s_com.h
  • TIMER_TAPR_TAPSR_M : lm3s_com.h
  • TIMER_TAPR_TAPSR_S : lm3s_com.h
  • TIMER_TAR_TARH_M : lm3s_com.h
  • TIMER_TAR_TARH_S : lm3s_com.h
  • TIMER_TAR_TARL_M : lm3s_com.h
  • TIMER_TAR_TARL_S : lm3s_com.h
  • TIMER_TBILR_TBILRL_M : lm3s_com.h
  • TIMER_TBILR_TBILRL_S : lm3s_com.h
  • TIMER_TBMATCHR_TBMRL_M : lm3s_com.h
  • TIMER_TBMATCHR_TBMRL_S : lm3s_com.h
  • TIMER_TBMR_TBAMS : lm3s_com.h
  • TIMER_TBMR_TBCMR : lm3s_com.h
  • TIMER_TBMR_TBMR_1_SHOT : lm3s_com.h
  • TIMER_TBMR_TBMR_CAP : lm3s_com.h
  • TIMER_TBMR_TBMR_M : lm3s_com.h
  • TIMER_TBMR_TBMR_PERIOD : lm3s_com.h
  • TIMER_TBPMR_TBPSMR_M : lm3s_com.h
  • TIMER_TBPMR_TBPSMR_S : lm3s_com.h
  • TIMER_TBPR_TBPSR_M : lm3s_com.h
  • TIMER_TBPR_TBPSR_S : lm3s_com.h
  • TIMER_TBR_TBRL_M : lm3s_com.h
  • TIMER_TBR_TBRL_S : lm3s_com.h
  • TIMER_TICKS_PER_SEC : timer_lpc2.h , timer_posix.h
  • timer_waitEvent() : timer.h
  • timers_queue : timer.c
  • tlv5618_init() : tlv5618.c , tlv5618.h
  • tlv5618_setOutA() : tlv5618.h , tlv5618.c
  • tlv5618_setOutB() : tlv5618.c , tlv5618.h
  • tlv5618_setPowerDown() : tlv5618.h , tlv5618.c
  • tmp123_init() : tmp123.h , tmp123.c
  • tmp123_read() : tmp123.c , tmp123.h
  • TPIU_BASE : lm3s_memmap.h
  • triacs : phase.c
  • TRY : except.h
  • TWI_CHDIV : at91_twi.h
  • TWI_CHDIV_SHIFT : at91_twi.h
  • TWI_CKDIV : at91_twi.h
  • TWI_CKDIV_SHIFT : at91_twi.h
  • TWI_CLDIV : at91_twi.h
  • TWI_CLDIV_SHIFT : at91_twi.h
  • TWI_CR : at91_twi.h
  • TWI_CR_OFF : at91_twi.h
  • TWI_CWGR : at91_twi.h
  • TWI_CWGR_OFF : at91_twi.h
  • TWI_DADR : at91_twi.h
  • TWI_DADR_SHIFT : at91_twi.h
  • TWI_IADR : at91_twi.h
  • TWI_IADR_MASK : at91_twi.h
  • TWI_IADR_OFF : at91_twi.h
  • TWI_IADR_SHIFT : at91_twi.h
  • TWI_IADRSZ : at91_twi.h
  • TWI_IADRSZ_1BYTE : at91_twi.h
  • TWI_IADRSZ_2BYTE : at91_twi.h
  • TWI_IADRSZ_3BYTE : at91_twi.h
  • TWI_IADRSZ_NONE : at91_twi.h
  • TWI_IADRSZ_SHIFT : at91_twi.h
  • TWI_IDR : at91_twi.h
  • TWI_IDR_OFF : at91_twi.h
  • TWI_IER : at91_twi.h
  • TWI_IER_OFF : at91_twi.h
  • TWI_IMR : at91_twi.h
  • TWI_IMR_OFF : at91_twi.h
  • twi_init() : twi_at91.h , twi_at91.c
  • TWI_MMR : at91_twi.h
  • TWI_MMR_OFF : at91_twi.h
  • TWI_MREAD : at91_twi.h
  • TWI_MSDIS : at91_twi.h
  • TWI_MSEN : at91_twi.h
  • TWI_NACK : at91_twi.h
  • twi_read() : twi_at91.h , twi_at91.c
  • TWI_RHR : at91_twi.h
  • TWI_RHR_OFF : at91_twi.h
  • TWI_RXRDY : at91_twi.h
  • TWI_SR : at91_twi.h
  • TWI_SR_OFF : at91_twi.h
  • TWI_START : at91_twi.h
  • TWI_STOP : at91_twi.h
  • TWI_SWRST : at91_twi.h
  • TWI_THR : at91_twi.h
  • TWI_THR_OFF : at91_twi.h
  • TWI_TIMEOUT : twi_at91.c
  • TWI_TXCOMP : at91_twi.h
  • TWI_TXRDY : at91_twi.h
  • twi_write() : twi_at91.h , twi_at91.c
  • TX_FIFO_SIZE : lm3s_ssi.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- u -

  • UART0_BASE : lm3s_memmap.h
  • UART0_CTL_R : lm3s_com.h
  • UART0_DR_R : lm3s_com.h
  • UART0_ECR_R : lm3s_com.h
  • UART0_FBRD_R : lm3s_com.h
  • UART0_FR_R : lm3s_com.h
  • UART0_IBRD_R : lm3s_com.h
  • UART0_ICR_R : lm3s_com.h
  • UART0_IFLS_R : lm3s_com.h
  • UART0_ILPR_R : lm3s_com.h
  • UART0_IM_R : lm3s_com.h
  • uart0_irq_rx() : ser_at91.c , ser_sam3.c
  • uart0_irq_tx() : ser_at91.c , ser_sam3.c
  • UART0_LCRH_R : lm3s_com.h
  • UART0_MIS_R : lm3s_com.h
  • UART0_RIS_R : lm3s_com.h
  • UART0_RSR_R : lm3s_com.h
  • UART1_BASE : lm3s_memmap.h
  • UART1_CTL_R : lm3s_com.h
  • UART1_DR_R : lm3s_com.h
  • UART1_ECR_R : lm3s_com.h
  • UART1_FBRD_R : lm3s_com.h
  • UART1_FR_R : lm3s_com.h
  • UART1_IBRD_R : lm3s_com.h
  • UART1_ICR_R : lm3s_com.h
  • UART1_IFLS_R : lm3s_com.h
  • UART1_ILPR_R : lm3s_com.h
  • UART1_IM_R : lm3s_com.h
  • uart1_irq_rx() : ser_at91.c
  • uart1_irq_tx() : ser_at91.c
  • UART1_LCRH_R : lm3s_com.h
  • UART1_MIS_R : lm3s_com.h
  • UART1_RIS_R : lm3s_com.h
  • UART1_RSR_R : lm3s_com.h
  • UART2_BASE : lm3s_memmap.h
  • UART2_CTL_R : lm3s_com.h
  • UART2_DR_R : lm3s_com.h
  • UART2_ECR_R : lm3s_com.h
  • UART2_FBRD_R : lm3s_com.h
  • UART2_FR_R : lm3s_com.h
  • UART2_IBRD_R : lm3s_com.h
  • UART2_ICR_R : lm3s_com.h
  • UART2_IFLS_R : lm3s_com.h
  • UART2_ILPR_R : lm3s_com.h
  • UART2_IM_R : lm3s_com.h
  • UART2_LCRH_R : lm3s_com.h
  • UART2_MIS_R : lm3s_com.h
  • UART2_RIS_R : lm3s_com.h
  • UART2_RSR_R : lm3s_com.h
  • UART_BRGR_CD_MASK : sam3_uart.h
  • UART_BRGR_CD_SHIFT : sam3_uart.h
  • UART_BRGR_OFF : sam3_uart.h
  • UART_CR_OFF : sam3_uart.h
  • UART_CR_RSTRX : sam3_uart.h
  • UART_CR_RSTSTA : sam3_uart.h
  • UART_CR_RSTTX : sam3_uart.h
  • UART_CR_RXDIS : sam3_uart.h
  • UART_CR_RXEN : sam3_uart.h
  • UART_CR_TXDIS : sam3_uart.h
  • UART_CR_TXEN : sam3_uart.h
  • UART_CTL_CTSEN : lm3s_uart.h
  • UART_CTL_DTR : lm3s_uart.h
  • UART_CTL_EOT : lm3s_uart.h
  • UART_CTL_HSE : lm3s_uart.h
  • UART_CTL_LBE : lm3s_com.h , lm3s_uart.h
  • UART_CTL_LIN : lm3s_uart.h
  • UART_CTL_RTS : lm3s_uart.h
  • UART_CTL_RTSEN : lm3s_uart.h
  • UART_CTL_RXE : lm3s_com.h , lm3s_uart.h
  • UART_CTL_SIREN : lm3s_com.h , lm3s_uart.h
  • UART_CTL_SIRLP : lm3s_com.h , lm3s_uart.h
  • UART_CTL_SMART : lm3s_uart.h
  • UART_CTL_TXE : lm3s_com.h , lm3s_uart.h
  • UART_CTL_UARTEN : lm3s_com.h , lm3s_uart.h
  • UART_DMACTL_DMAERR : lm3s_uart.h
  • UART_DMACTL_RXDMAE : lm3s_uart.h
  • UART_DMACTL_TXDMAE : lm3s_uart.h
  • UART_DR_BE : lm3s_com.h , lm3s_uart.h
  • UART_DR_DATA_M : lm3s_com.h , lm3s_uart.h
  • UART_DR_DATA_MASK : lm3s_uart.h
  • UART_DR_DATA_S : lm3s_com.h , lm3s_uart.h
  • UART_DR_FE : lm3s_com.h , lm3s_uart.h
  • UART_DR_OE : lm3s_com.h , lm3s_uart.h
  • UART_DR_PE : lm3s_com.h , lm3s_uart.h
  • UART_ECR_DATA_M : lm3s_com.h , lm3s_uart.h
  • UART_ECR_DATA_S : lm3s_com.h , lm3s_uart.h
  • UART_FBRD_DIVFRAC_M : lm3s_com.h , lm3s_uart.h
  • UART_FBRD_DIVFRAC_MASK : lm3s_uart.h
  • UART_FBRD_DIVFRAC_S : lm3s_com.h , lm3s_uart.h
  • UART_FR_BUSY : lm3s_com.h , lm3s_uart.h
  • UART_FR_CTS : lm3s_uart.h
  • UART_FR_DCD : lm3s_uart.h
  • UART_FR_DSR : lm3s_uart.h
  • UART_FR_RI : lm3s_uart.h
  • UART_FR_RXFE : lm3s_com.h , lm3s_uart.h
  • UART_FR_RXFF : lm3s_com.h , lm3s_uart.h
  • UART_FR_TXFE : lm3s_com.h , lm3s_uart.h
  • UART_FR_TXFF : lm3s_com.h , lm3s_uart.h
  • UART_IBRD_DIVINT_M : lm3s_com.h , lm3s_uart.h
  • UART_IBRD_DIVINT_MASK : lm3s_uart.h
  • UART_IBRD_DIVINT_S : lm3s_com.h , lm3s_uart.h
  • UART_ICR_BEIC : lm3s_uart.h , lm3s_com.h
  • UART_ICR_CTSMIC : lm3s_uart.h
  • UART_ICR_DCDMIC : lm3s_uart.h
  • UART_ICR_DSRMIC : lm3s_uart.h
  • UART_ICR_FEIC : lm3s_com.h , lm3s_uart.h
  • UART_ICR_LME1MIC : lm3s_uart.h
  • UART_ICR_LME5MIC : lm3s_uart.h
  • UART_ICR_LMSBMIC : lm3s_uart.h
  • UART_ICR_OEIC : lm3s_com.h , lm3s_uart.h
  • UART_ICR_PEIC : lm3s_com.h , lm3s_uart.h
  • UART_ICR_RIMIC : lm3s_uart.h
  • UART_ICR_RTIC : lm3s_com.h , lm3s_uart.h
  • UART_ICR_RXIC : lm3s_com.h , lm3s_uart.h
  • UART_ICR_TXIC : lm3s_com.h , lm3s_uart.h
  • UART_IDR_ENDRX : sam3_uart.h
  • UART_IDR_ENDTX : sam3_uart.h
  • UART_IDR_FRAME : sam3_uart.h
  • UART_IDR_OFF : sam3_uart.h
  • UART_IDR_OVRE : sam3_uart.h
  • UART_IDR_PARE : sam3_uart.h
  • UART_IDR_RXBUFF : sam3_uart.h
  • UART_IDR_RXRDY : sam3_uart.h
  • UART_IDR_TXBUFE : sam3_uart.h
  • UART_IDR_TXEMPTY : sam3_uart.h
  • UART_IDR_TXRDY : sam3_uart.h
  • UART_IER_ENDRX : sam3_uart.h
  • UART_IER_ENDTX : sam3_uart.h
  • UART_IER_FRAME : sam3_uart.h
  • UART_IER_OFF : sam3_uart.h
  • UART_IER_OVRE : sam3_uart.h
  • UART_IER_PARE : sam3_uart.h
  • UART_IER_RXBUFF : sam3_uart.h
  • UART_IER_RXRDY : sam3_uart.h
  • UART_IER_TXBUFE : sam3_uart.h
  • UART_IER_TXEMPTY : sam3_uart.h
  • UART_IER_TXRDY : sam3_uart.h
  • UART_IFLS_RX1_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_RX2_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_RX4_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_RX6_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_RX7_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_RX_M : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_RX_MASK : lm3s_uart.h
  • UART_IFLS_TX1_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_TX2_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_TX4_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_TX6_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_TX7_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_TX_M : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_TX_MASK : lm3s_uart.h
  • UART_ILPR_ILPDVSR_M : lm3s_com.h , lm3s_uart.h
  • UART_ILPR_ILPDVSR_S : lm3s_com.h , lm3s_uart.h
  • UART_IM_BEIM : lm3s_com.h , lm3s_uart.h
  • UART_IM_CTSMIM : lm3s_uart.h
  • UART_IM_DCDMIM : lm3s_uart.h
  • UART_IM_DSRMIM : lm3s_uart.h
  • UART_IM_FEIM : lm3s_com.h , lm3s_uart.h
  • UART_IM_LME1IM : lm3s_uart.h
  • UART_IM_LME5IM : lm3s_uart.h
  • UART_IM_LMSBIM : lm3s_uart.h
  • UART_IM_OEIM : lm3s_com.h , lm3s_uart.h
  • UART_IM_PEIM : lm3s_com.h , lm3s_uart.h
  • UART_IM_RIMIM : lm3s_uart.h
  • UART_IM_RTIM : lm3s_com.h , lm3s_uart.h
  • UART_IM_RXIM : lm3s_com.h , lm3s_uart.h
  • UART_IM_TXIM : lm3s_com.h , lm3s_uart.h
  • UART_IMR_ENDRX : sam3_uart.h
  • UART_IMR_ENDTX : sam3_uart.h
  • UART_IMR_FRAME : sam3_uart.h
  • UART_IMR_OFF : sam3_uart.h
  • UART_IMR_OVRE : sam3_uart.h
  • UART_IMR_PARE : sam3_uart.h
  • UART_IMR_RXBUFF : sam3_uart.h
  • UART_IMR_RXRDY : sam3_uart.h
  • UART_IMR_TXBUFE : sam3_uart.h
  • UART_IMR_TXEMPTY : sam3_uart.h
  • UART_IMR_TXRDY : sam3_uart.h
  • UART_LCR_H_BRK : lm3s_uart.h
  • UART_LCR_H_EPS : lm3s_uart.h
  • UART_LCR_H_FEN : lm3s_uart.h
  • UART_LCR_H_PEN : lm3s_uart.h
  • UART_LCR_H_SPS : lm3s_uart.h
  • UART_LCR_H_STP2 : lm3s_uart.h
  • UART_LCR_H_WLEN : lm3s_uart.h
  • UART_LCR_H_WLEN_5 : lm3s_uart.h
  • UART_LCR_H_WLEN_6 : lm3s_uart.h
  • UART_LCR_H_WLEN_7 : lm3s_uart.h
  • UART_LCR_H_WLEN_8 : lm3s_uart.h
  • UART_LCRH_BRK : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_EPS : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_FEN : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_PEN : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_SPS : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_STP2 : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_WLEN_5 : lm3s_uart.h , lm3s_com.h
  • UART_LCRH_WLEN_6 : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_WLEN_7 : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_WLEN_8 : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_WLEN_M : lm3s_com.h , lm3s_uart.h
  • UART_LCTL_BLEN_13T : lm3s_uart.h
  • UART_LCTL_BLEN_14T : lm3s_uart.h
  • UART_LCTL_BLEN_15T : lm3s_uart.h
  • UART_LCTL_BLEN_16T : lm3s_uart.h
  • UART_LCTL_BLEN_M : lm3s_uart.h
  • UART_LCTL_MASTER : lm3s_uart.h
  • UART_LSS_TSS_M : lm3s_uart.h
  • UART_LSS_TSS_S : lm3s_uart.h
  • UART_LTIM_TIMER_M : lm3s_uart.h
  • UART_LTIM_TIMER_S : lm3s_uart.h
  • UART_MIS_BEMIS : lm3s_com.h , lm3s_uart.h
  • UART_MIS_CTSMIS : lm3s_uart.h
  • UART_MIS_DCDMIS : lm3s_uart.h
  • UART_MIS_DSRMIS : lm3s_uart.h
  • UART_MIS_FEMIS : lm3s_com.h , lm3s_uart.h
  • UART_MIS_LME1MIS : lm3s_uart.h
  • UART_MIS_LME5MIS : lm3s_uart.h
  • UART_MIS_LMSBMIS : lm3s_uart.h
  • UART_MIS_OEMIS : lm3s_com.h , lm3s_uart.h
  • UART_MIS_PEMIS : lm3s_com.h , lm3s_uart.h
  • UART_MIS_RIMIS : lm3s_uart.h
  • UART_MIS_RTMIS : lm3s_com.h , lm3s_uart.h
  • UART_MIS_RXMIS : lm3s_com.h , lm3s_uart.h
  • UART_MIS_TXMIS : lm3s_com.h , lm3s_uart.h
  • UART_MR_CHMODE_AUTOMATIC : sam3_uart.h
  • UART_MR_CHMODE_LOCAL_LOOPBACK : sam3_uart.h
  • UART_MR_CHMODE_MASK : sam3_uart.h
  • UART_MR_CHMODE_NORMAL : sam3_uart.h
  • UART_MR_CHMODE_REMOTE_LOOPBACK : sam3_uart.h
  • UART_MR_CHMODE_SHIFT : sam3_uart.h
  • UART_MR_OFF : sam3_uart.h
  • UART_MR_PAR_EVEN : sam3_uart.h
  • UART_MR_PAR_MARK : sam3_uart.h
  • UART_MR_PAR_MASK : sam3_uart.h
  • UART_MR_PAR_NO : sam3_uart.h
  • UART_MR_PAR_ODD : sam3_uart.h
  • UART_MR_PAR_SHIFT : sam3_uart.h
  • UART_MR_PAR_SPACE : sam3_uart.h
  • UART_O_CTL : lm3s_uart.h
  • UART_O_DMACTL : lm3s_uart.h
  • UART_O_DR : lm3s_uart.h
  • UART_O_ECR : lm3s_uart.h
  • UART_O_FBRD : lm3s_uart.h
  • UART_O_FR : lm3s_uart.h
  • UART_O_IBRD : lm3s_uart.h
  • UART_O_ICR : lm3s_uart.h
  • UART_O_IFLS : lm3s_uart.h
  • UART_O_ILPR : lm3s_uart.h
  • UART_O_IM : lm3s_uart.h
  • UART_O_LCR_H : lm3s_uart.h
  • UART_O_LCRH : lm3s_uart.h
  • UART_O_LCTL : lm3s_uart.h
  • UART_O_LSS : lm3s_uart.h
  • UART_O_LTIM : lm3s_uart.h
  • UART_O_MIS : lm3s_uart.h
  • UART_O_PCellID0 : lm3s_uart.h
  • UART_O_PCellID1 : lm3s_uart.h
  • UART_O_PCellID2 : lm3s_uart.h
  • UART_O_PCellID3 : lm3s_uart.h
  • UART_O_PeriphID0 : lm3s_uart.h
  • UART_O_PeriphID1 : lm3s_uart.h
  • UART_O_PeriphID2 : lm3s_uart.h
  • UART_O_PeriphID3 : lm3s_uart.h
  • UART_O_PeriphID4 : lm3s_uart.h
  • UART_O_PeriphID5 : lm3s_uart.h
  • UART_O_PeriphID6 : lm3s_uart.h
  • UART_O_PeriphID7 : lm3s_uart.h
  • UART_O_RIS : lm3s_uart.h
  • UART_O_RSR : lm3s_uart.h
  • UART_PTCR_OFF : sam3_uart.h
  • UART_PTCR_RXTDIS : sam3_uart.h
  • UART_PTCR_RXTEN : sam3_uart.h
  • UART_PTCR_TXTDIS : sam3_uart.h
  • UART_PTCR_TXTEN : sam3_uart.h
  • UART_PTSR_OFF : sam3_uart.h
  • UART_PTSR_RXTEN : sam3_uart.h
  • UART_PTSR_TXTEN : sam3_uart.h
  • UART_RCR_OFF : sam3_uart.h
  • UART_RCR_RXCTR_MASK : sam3_uart.h
  • UART_RCR_RXCTR_SHIFT : sam3_uart.h
  • UART_RHR_OFF : sam3_uart.h
  • UART_RHR_RXCHR_MASK : sam3_uart.h
  • UART_RHR_RXCHR_SHIFT : sam3_uart.h
  • UART_RIS_BERIS : lm3s_com.h , lm3s_uart.h
  • UART_RIS_CTSRIS : lm3s_uart.h
  • UART_RIS_DCDRIS : lm3s_uart.h
  • UART_RIS_DSRRIS : lm3s_uart.h
  • UART_RIS_FERIS : lm3s_com.h , lm3s_uart.h
  • UART_RIS_LME1RIS : lm3s_uart.h
  • UART_RIS_LME5RIS : lm3s_uart.h
  • UART_RIS_LMSBRIS : lm3s_uart.h
  • UART_RIS_OERIS : lm3s_com.h , lm3s_uart.h
  • UART_RIS_PERIS : lm3s_com.h , lm3s_uart.h
  • UART_RIS_RIRIS : lm3s_uart.h
  • UART_RIS_RTRIS : lm3s_com.h , lm3s_uart.h
  • UART_RIS_RXRIS : lm3s_com.h , lm3s_uart.h
  • UART_RIS_TXRIS : lm3s_com.h , lm3s_uart.h
  • UART_RNCR_OFF : sam3_uart.h
  • UART_RNCR_RXNCTR_MASK : sam3_uart.h
  • UART_RNCR_RXNCTR_SHIFT : sam3_uart.h
  • UART_RNPR_OFF : sam3_uart.h
  • UART_RNPR_RXNPTR_MASK : sam3_uart.h
  • UART_RNPR_RXNPTR_SHIFT : sam3_uart.h
  • UART_RPR_OFF : sam3_uart.h
  • UART_RPR_RXPTR_MASK : sam3_uart.h
  • UART_RPR_RXPTR_SHIFT : sam3_uart.h
  • UART_RSR_ANY : lm3s_uart.h
  • UART_RSR_BE : lm3s_com.h , lm3s_uart.h
  • UART_RSR_FE : lm3s_com.h , lm3s_uart.h
  • UART_RSR_OE : lm3s_uart.h , lm3s_com.h
  • UART_RSR_PE : lm3s_com.h , lm3s_uart.h
  • UART_RV_CTL : lm3s_uart.h
  • UART_RV_DR : lm3s_uart.h
  • UART_RV_ECR : lm3s_uart.h
  • UART_RV_FBRD : lm3s_uart.h
  • UART_RV_FR : lm3s_uart.h
  • UART_RV_IBRD : lm3s_uart.h
  • UART_RV_ICR : lm3s_uart.h
  • UART_RV_IFLS : lm3s_uart.h
  • UART_RV_IM : lm3s_uart.h
  • UART_RV_LCR_H : lm3s_uart.h
  • UART_RV_MIS : lm3s_uart.h
  • UART_RV_PCellID0 : lm3s_uart.h
  • UART_RV_PCellID1 : lm3s_uart.h
  • UART_RV_PCellID2 : lm3s_uart.h
  • UART_RV_PCellID3 : lm3s_uart.h
  • UART_RV_PeriphID0 : lm3s_uart.h
  • UART_RV_PeriphID1 : lm3s_uart.h
  • UART_RV_PeriphID2 : lm3s_uart.h
  • UART_RV_PeriphID3 : lm3s_uart.h
  • UART_RV_PeriphID4 : lm3s_uart.h
  • UART_RV_PeriphID5 : lm3s_uart.h
  • UART_RV_PeriphID6 : lm3s_uart.h
  • UART_RV_PeriphID7 : lm3s_uart.h
  • UART_RV_RIS : lm3s_uart.h
  • UART_RV_RSR : lm3s_uart.h
  • UART_SR_ENDRX : sam3_uart.h
  • UART_SR_ENDTX : sam3_uart.h
  • UART_SR_FRAME : sam3_uart.h
  • UART_SR_OFF : sam3_uart.h
  • UART_SR_OVRE : sam3_uart.h
  • UART_SR_PARE : sam3_uart.h
  • UART_SR_RXBUFF : sam3_uart.h
  • UART_SR_RXRDY : sam3_uart.h
  • UART_SR_TXBUFE : sam3_uart.h
  • UART_SR_TXEMPTY : sam3_uart.h
  • UART_SR_TXRDY : sam3_uart.h
  • UART_TCR_OFF : sam3_uart.h
  • UART_TCR_TXCTR_MASK : sam3_uart.h
  • UART_TCR_TXCTR_SHIFT : sam3_uart.h
  • UART_THR_OFF : sam3_uart.h
  • UART_THR_TXCHR_MASK : sam3_uart.h
  • UART_THR_TXCHR_SHIFT : sam3_uart.h
  • UART_TNCR_OFF : sam3_uart.h
  • UART_TNCR_TXNCTR_MASK : sam3_uart.h
  • UART_TNCR_TXNCTR_SHIFT : sam3_uart.h
  • UART_TNPR_OFF : sam3_uart.h
  • UART_TNPR_TXNPTR_MASK : sam3_uart.h
  • UART_TNPR_TXNPTR_SHIFT : sam3_uart.h
  • UART_TPR_OFF : sam3_uart.h
  • UART_TPR_TXPTR_MASK : sam3_uart.h
  • UART_TPR_TXPTR_SHIFT : sam3_uart.h
  • UDMA_BASE : lm3s_memmap.h
  • UDP_DEBUG : cfg_lwip.h
  • UDP_TTL : cfg_lwip.h
  • UINT16_LOG2 : macros.h
  • UINT32_LOG2 : macros.h
  • UINT8_LOG2 : macros.h
  • unrle() : rle.c , algo/rle.h
  • updcrc16() : crc.h
  • UPDCRC16 : crc.h
  • updcrc_ccitt() : crc_ccitt.h
  • upper_bound() : ntc.c
  • US0_BRGR : at91_us.h , sam3_usart.h
  • US0_CR : at91_us.h , sam3_usart.h
  • US0_CSR : at91_us.h , sam3_usart.h
  • US0_FIDI : at91_us.h , sam3_usart.h
  • US0_IDR : at91_us.h , sam3_usart.h
  • US0_IER : at91_us.h , sam3_usart.h
  • US0_IF : at91_us.h , sam3_usart.h
  • US0_IMR : at91_us.h , sam3_usart.h
  • US0_MR : at91_us.h , sam3_usart.h
  • US0_NER : at91_us.h , sam3_usart.h
  • US0_RHR : at91_us.h , sam3_usart.h
  • US0_RTOR : at91_us.h , sam3_usart.h
  • US0_THR : at91_us.h , sam3_usart.h
  • US0_TTGR : at91_us.h , sam3_usart.h
  • US1_BRGR : at91_us.h , sam3_usart.h
  • US1_CR : at91_us.h , sam3_usart.h
  • US1_CSR : at91_us.h , sam3_usart.h
  • US1_FIDI : at91_us.h , sam3_usart.h
  • US1_IDR : at91_us.h , sam3_usart.h
  • US1_IER : at91_us.h , sam3_usart.h
  • US1_IF : at91_us.h , sam3_usart.h
  • US1_IMR : at91_us.h , sam3_usart.h
  • US1_MR : at91_us.h , sam3_usart.h
  • US1_NER : at91_us.h , sam3_usart.h
  • US1_RHR : at91_us.h , sam3_usart.h
  • US1_RTOR : at91_us.h , sam3_usart.h
  • US1_THR : at91_us.h , sam3_usart.h
  • US1_TTGR : sam3_usart.h , at91_us.h
  • US_BRGR_OFF : at91_us.h , sam3_usart.h
  • US_CHMODE_AUTOMATIC_ECHO : sam3_usart.h , at91_us.h
  • US_CHMODE_LOCAL_LOOPBACK : at91_us.h , sam3_usart.h
  • US_CHMODE_MASK : sam3_usart.h , at91_us.h
  • US_CHMODE_NORMAL : at91_us.h , sam3_usart.h
  • US_CHMODE_REMOTE_LOOPBACK : sam3_usart.h , at91_us.h
  • US_CHRL_5 : at91_us.h , sam3_usart.h
  • US_CHRL_6 : sam3_usart.h , at91_us.h
  • US_CHRL_7 : at91_us.h , sam3_usart.h
  • US_CHRL_8 : sam3_usart.h , at91_us.h
  • US_CHRL_MASK : at91_us.h , sam3_usart.h
  • US_CLKO : sam3_usart.h , at91_us.h
  • US_CLKS_MASK : sam3_usart.h , at91_us.h
  • US_CLKS_MCK : sam3_usart.h , at91_us.h
  • US_CLKS_MCK8 : at91_us.h , sam3_usart.h
  • US_CLKS_SCK : sam3_usart.h , at91_us.h
  • US_CLKS_SLCK : sam3_usart.h , at91_us.h
  • US_CR_OFF : sam3_usart.h , at91_us.h
  • US_CSR_CTS : at91_us.h , sam3_usart.h
  • US_CSR_DCD : sam3_usart.h , at91_us.h
  • US_CSR_DSR : sam3_usart.h , at91_us.h
  • US_CSR_OFF : sam3_usart.h , at91_us.h
  • US_CSR_RI : at91_us.h , sam3_usart.h
  • US_CTSIC : sam3_usart.h , at91_us.h
  • US_DCDIC : at91_us.h , sam3_usart.h
  • US_DSNACK : sam3_usart.h , at91_us.h
  • US_DSRIC : at91_us.h , sam3_usart.h
  • US_DTRDIS : sam3_usart.h , at91_us.h
  • US_DTREN : sam3_usart.h , at91_us.h
  • US_ENDRX : sam3_usart.h , at91_us.h
  • US_ENDTX : at91_us.h , sam3_usart.h
  • US_FIDI_OFF : sam3_usart.h , at91_us.h
  • US_FILTER : at91_us.h , sam3_usart.h
  • US_FRAME : sam3_usart.h , at91_us.h
  • US_IDR_OFF : at91_us.h , sam3_usart.h
  • US_IER_OFF : sam3_usart.h , at91_us.h
  • US_IF_OFF : sam3_usart.h , at91_us.h
  • US_IMR_OFF : sam3_usart.h , at91_us.h
  • US_INACK : at91_us.h , sam3_usart.h
  • US_ITERATION : sam3_usart.h , at91_us.h
  • US_MAX_INTERATION_MASK : at91_us.h , sam3_usart.h
  • US_MODE9 : sam3_usart.h , at91_us.h
  • US_MR_OFF : sam3_usart.h , at91_us.h
  • US_MSBF : sam3_usart.h , at91_us.h
  • US_NACK : sam3_usart.h , at91_us.h
  • US_NBSTOP_1 : sam3_usart.h , at91_us.h
  • US_NBSTOP_1_5 : at91_us.h , sam3_usart.h
  • US_NBSTOP_2 : sam3_usart.h , at91_us.h
  • US_NBSTOP_MASK : sam3_usart.h , at91_us.h
  • US_NER_OFF : sam3_usart.h , at91_us.h
  • US_OVER : at91_us.h , sam3_usart.h
  • US_OVRE : sam3_usart.h , at91_us.h
  • US_PAR_EVEN : sam3_usart.h , at91_us.h
  • US_PAR_MARK : sam3_usart.h , at91_us.h
  • US_PAR_MASK : at91_us.h , sam3_usart.h
  • US_PAR_MULTIDROP : sam3_usart.h , at91_us.h
  • US_PAR_NO : sam3_usart.h , at91_us.h
  • US_PAR_ODD : at91_us.h , sam3_usart.h
  • US_PAR_SPACE : sam3_usart.h , at91_us.h
  • US_PARE : sam3_usart.h , at91_us.h
  • US_RETTO : at91_us.h , sam3_usart.h
  • US_RHR_OFF : at91_us.h , sam3_usart.h
  • US_RHR_RXCHR_MASK : at91_us.h , sam3_usart.h
  • US_RHR_RXSYNH : sam3_usart.h , at91_us.h
  • US_RIIC : sam3_usart.h , at91_us.h
  • US_RSTIT : at91_us.h , sam3_usart.h
  • US_RSTNAK : sam3_usart.h , at91_us.h
  • US_RSTRX : sam3_usart.h , at91_us.h
  • US_RSTSTA : at91_us.h , sam3_usart.h
  • US_RSTTX : sam3_usart.h , at91_us.h
  • US_RTOR_OFF : at91_us.h , sam3_usart.h
  • US_RTSDIS : sam3_usart.h , at91_us.h
  • US_RTSEN : sam3_usart.h , at91_us.h
  • US_RXBRK : at91_us.h , sam3_usart.h
  • US_RXBUFF : sam3_usart.h , at91_us.h
  • US_RXDIS : sam3_usart.h , at91_us.h
  • US_RXEN : sam3_usart.h , at91_us.h
  • US_RXRDY : sam3_usart.h , at91_us.h
  • US_SENDA : at91_us.h , sam3_usart.h
  • US_STPBRK : at91_us.h , sam3_usart.h
  • US_STTBRK : sam3_usart.h , at91_us.h
  • US_STTTO : at91_us.h , sam3_usart.h
  • US_SYNC : sam3_usart.h , at91_us.h
  • US_THR_OFF : sam3_usart.h , at91_us.h
  • US_THR_TXCHR_MASK : sam3_usart.h , at91_us.h
  • US_THR_TXSYNH : sam3_usart.h , at91_us.h
  • US_TIMEOUT : at91_us.h , sam3_usart.h
  • us_to_hptime() : timer.h
  • us_to_ticks() : timer.h
  • US_TTGR_OFF : sam3_usart.h , at91_us.h
  • US_TXBUFE : at91_us.h , sam3_usart.h
  • US_TXDIS : sam3_usart.h , at91_us.h
  • US_TXEMPTY : sam3_usart.h , at91_us.h
  • US_TXEN : at91_us.h , sam3_usart.h
  • US_TXRDY : at91_us.h , sam3_usart.h
  • US_USART_MODE_HW_HDSH : sam3_usart.h , at91_us.h
  • US_USART_MODE_IRDA : sam3_usart.h , at91_us.h
  • US_USART_MODE_ISO7816T0 : at91_us.h , sam3_usart.h
  • US_USART_MODE_ISO7816T1 : sam3_usart.h , at91_us.h
  • US_USART_MODE_MASK : sam3_usart.h , at91_us.h
  • US_USART_MODE_MODEM : sam3_usart.h , at91_us.h
  • US_USART_MODE_NORMA : sam3_usart.h , at91_us.h
  • US_USART_MODE_RS485 : at91_us.h , sam3_usart.h
  • USART1_IRQHANDLER : stm32_ints.h
  • USART2_IRQHANDLER : stm32_ints.h
  • USART3_IRQHANDLER : stm32_ints.h
  • USB0_BASE : lm3s_memmap.h
  • usb_deviceRegister() : usb.h , usb_stm32.c
  • usb_endpointDirIn() : usb.h
  • usb_endpointDirOut() : usb.h
  • usb_endpointIsBulkIn() : usb.h
  • usb_endpointIsBulkOut() : usb.h
  • usb_endpointIsIntIn() : usb.h
  • usb_endpointIsIntOut() : usb.h
  • usb_endpointIsIsocIn() : usb.h
  • usb_endpointIsIsocOut() : usb.h
  • usb_endpointNum() : usb.h
  • usb_endpointReadTimeout() : usb_stm32.c , usb.h
  • usb_endpointType() : usb.h
  • usb_endpointWriteTimeout() : usb.h , usb_stm32.c
  • usb_endpointXferBulk() : usb.h
  • usb_endpointXferControl() : usb.h
  • usb_endpointXferInt() : usb.h
  • usb_endpointXferIsoc() : usb.h
  • USB_HP_CAN_TX_IRQHANDLER : stm32_ints.h
  • USB_KEYBOARD_LOG_FORMAT : cfg_usbkbd.h
  • USB_KEYBOARD_LOG_LEVEL : cfg_usbkbd.h
  • USB_KEYBOARD_PRODUCT_ID : cfg_usbkbd.h
  • USB_KEYBOARD_VENDOR_ID : cfg_usbkbd.h
  • USB_LOG_FORMAT : cfg_usb.h
  • USB_LOG_LEVEL : cfg_usb.h
  • USB_LP_CAN_RX0_IRQHANDLER : stm32_ints.h
  • USB_MOUSE_LOG_FORMAT : cfg_usbmouse.h
  • USB_MOUSE_LOG_LEVEL : cfg_usbmouse.h
  • USB_MOUSE_PRODUCT_ID : cfg_usbmouse.h
  • USB_MOUSE_VENDOR_ID : cfg_usbmouse.h
  • usb_serial_clearerr() : usbser.c
  • usb_serial_close() : usbser.c
  • usb_serial_error() : usbser.c
  • USB_SERIAL_LOG_FORMAT : cfg_usbser.h
  • USB_SERIAL_LOG_LEVEL : cfg_usbser.h
  • usb_serial_open() : usbser.c
  • USB_SERIAL_PRODUCT_ID : cfg_usbser.h
  • usb_serial_read() : usbser.c
  • usb_serial_reopen() : usbser.c
  • USB_SERIAL_VENDOR_ID : cfg_usbser.h
  • usb_serial_write() : usbser.c
  • USB_STRING : usb.h
  • USBPRE_BITNUMBER : clock_stm32.h
  • usbser_init() : usbser.h , usbser.c
  • USBWAKEUP_IRQHANDLER : stm32_ints.h
  • utime_t : compiler.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- v -

  • vers_build_nr : verstag.c , verstag.h
  • vers_host : verstag.h , verstag.c
  • vers_tag : verstag.h , verstag.c


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- w -

  • WATCHDOG0_BASE : lm3s_memmap.h
  • WATCHDOG0_CTL_R : lm3s_com.h
  • WATCHDOG0_ICR_R : lm3s_com.h
  • WATCHDOG0_LOAD_R : lm3s_com.h
  • WATCHDOG0_LOCK_R : lm3s_com.h
  • WATCHDOG0_MIS_R : lm3s_com.h
  • WATCHDOG0_RIS_R : lm3s_com.h
  • WATCHDOG0_TEST_R : lm3s_com.h
  • WATCHDOG0_VALUE_R : lm3s_com.h
  • WATCHDOG1_BASE : lm3s_memmap.h
  • WATCHDOG_BASE : lm3s_memmap.h
  • WATCHDOG_CTL_R : lm3s_com.h
  • WATCHDOG_ICR_R : lm3s_com.h
  • WATCHDOG_LOAD_R : lm3s_com.h
  • WATCHDOG_LOCK_R : lm3s_com.h
  • WATCHDOG_MIS_R : lm3s_com.h
  • WATCHDOG_RIS_R : lm3s_com.h
  • WATCHDOG_TEST_R : lm3s_com.h
  • WATCHDOG_VALUE_R : lm3s_com.h
  • WDT_CR : at91_wdt.h , sam3_wdt.h
  • WDT_CR_OFF : at91_wdt.h , sam3_wdt.h
  • WDT_CTL_INTEN : lm3s_com.h
  • WDT_CTL_RESEN : lm3s_com.h
  • WDT_ICR_M : lm3s_com.h
  • WDT_ICR_S : lm3s_com.h
  • WDT_KEY : at91_wdt.h , sam3_wdt.h
  • WDT_LOAD_M : lm3s_com.h
  • WDT_LOAD_S : lm3s_com.h
  • WDT_LOCK_LOCKED : lm3s_com.h
  • WDT_LOCK_M : lm3s_com.h
  • WDT_LOCK_UNLOCK : lm3s_com.h
  • WDT_LOCK_UNLOCKED : lm3s_com.h
  • WDT_MIS_WDTMIS : lm3s_com.h
  • WDT_MR : at91_wdt.h , sam3_wdt.h
  • WDT_MR_OFF : at91_wdt.h , sam3_wdt.h
  • wdt_reset() : wdt.h
  • WDT_RIS_WDTRIS : lm3s_com.h
  • WDT_SR : at91_wdt.h , sam3_wdt.h
  • WDT_SR_OFF : at91_wdt.h , sam3_wdt.h
  • wdt_start() : wdt_avr.h , wdt.h
  • wdt_stop() : wdt_avr.h
  • WDT_TEST_STALL : lm3s_com.h
  • WDT_VALUE_M : lm3s_com.h
  • WDT_VALUE_S : lm3s_com.h
  • WDT_WDD_MASK : at91_wdt.h , sam3_wdt.h
  • WDT_WDD_SHIFT : at91_wdt.h , sam3_wdt.h
  • WDT_WDDBGHLT : at91_wdt.h , sam3_wdt.h
  • WDT_WDDIS : at91_wdt.h , sam3_wdt.h
  • WDT_WDERR : at91_wdt.h , sam3_wdt.h
  • WDT_WDFIEN : sam3_wdt.h , at91_wdt.h
  • WDT_WDIDLEHLT : at91_wdt.h , sam3_wdt.h
  • WDT_WDRPROC : at91_wdt.h , sam3_wdt.h
  • WDT_WDRSTEN : sam3_wdt.h , at91_wdt.h
  • WDT_WDRSTT : sam3_wdt.h , at91_wdt.h
  • WDT_WDUNF : sam3_wdt.h , at91_wdt.h
  • WDT_WDV_MASK : sam3_wdt.h , at91_wdt.h
  • WDT_WDV_SHIFT : sam3_wdt.h , at91_wdt.h
  • widget_init() : dwidget.c , dwidget.h
  • win_close() : win.c , win.h
  • win_compose() : win.h , win.c
  • win_create() : win.h , win.c
  • win_move() : win.h , win.c
  • win_open() : win.c , win.h
  • win_raise() : win.h , win.c
  • win_resize() : win.h , win.c
  • win_setGeometry() : win.c , win.h
  • write_page() : flash_at91.c
  • WWDG_IRQHANDLER : stm32_ints.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • v
  • w
  • x
Here is a list of all documented functions, variables, defines, enums, and typedefs with links to the documentation:

- x -

  • X : md2.c
  • XM_ACK : xmodem.c
  • XM_BUFSIZE : xmodem.c
  • XM_C : xmodem.c
  • XM_CAN : xmodem.c
  • XM_EOT : xmodem.c
  • XM_NAK : xmodem.c
  • XM_SOH : xmodem.c
  • XM_STX : xmodem.c
  • XMODEM_CHECK_ABORT : xmodem.h
  • xmodem_recv() : xmodem.h , xmodem.c
  • xmodem_send() : xmodem.h , xmodem.c


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- _ -

  • _DEBUG : debug.h
  • _SNAPSHOT : verstag.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- k -

  • K1 : md2.c
  • K2 : md2.c
  • K_CANCEL : kbd_map.h
  • K_DOWN : kbd_map.h
  • K_LONG : kbd_map.h
  • K_OK : kbd_map.h
  • K_REPEAT : kbd_map.h
  • K_TIMEOUT : kbd_map.h
  • K_UP : kbd_map.h
  • KB_BUFFERED : kblock.h
  • KB_CACHE_DIRTY : kblock.h
  • KB_PARTIAL_WRITE : kblock.h
  • KBD_BEEP_TIME : kbd.c
  • KBD_CHECK_INTERVAL : kbd.c
  • KBD_DEBOUNCE_TIME : kbd.c
  • KBD_LNG_DELAY : kbd.c
  • KBD_REPEAT_ACCEL : kbd.c
  • KBD_REPEAT_DELAY : kbd.c
  • KBD_REPEAT_MAXRATE : kbd.c
  • KBD_REPEAT_RATE : kbd.c
  • KBT_EEPROM : eeprom.h
  • KDBG_UART_ACLK : kdebug_msp430.h
  • KDEBUG_PORT_DBGU : kdebug_at91.h
  • KDEBUG_PORT_DEFAULT : kdebug_at91.h , kdebug_lm3s.h , kdebug_stm32.h
  • KERN_LOG_FORMAT : cfg_proc.h
  • KERN_LOG_LEVEL : cfg_proc.h
  • KERN_MINSTACKSIZE : proc.h
  • KFILE_LOG_FORMAT : cfg_kfile.h
  • KFILE_LOG_LEVEL : cfg_kfile.h
  • KFT_BATTFS : battfs.h
  • KFT_DATAFLASH : dataflash.h
  • KFT_FLASH25 : flash25.h
  • KFT_FT245RL : ft245rl.h
  • KFT_KFILEBLOCK : kfile_block.c
  • KFT_KFILEDEBUG : kfile_debug.h
  • KFT_KFILEFIFO : kfile_fifo.h
  • KFT_KFILEMEM : kfile_mem.h
  • KFT_LM3SSSI : ssi_lm3s.h
  • KFT_SERIAL : ser.h
  • KFT_SIPO : sipo.h
  • KFT_USB_SERIAL : usbser.h
  • KHF_RAWKEYS : kbd.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- l -

  • LAYER_HIDDEN : lcd_text.h
  • LBAR_HORIZONTAL : levelbar.h
  • LCD_CMD_CLEAR : lcd_hd44.h
  • LCD_CMD_CURSOR_BLOCK : lcd_hd44.h
  • LCD_CMD_CURSOR_LINE : lcd_hd44.h
  • LCD_CMD_CURSOR_OFF : lcd_hd44.h
  • LCD_CMD_DISPLAY_INI : lcd_hd44.h
  • LCD_CMD_DISPLAY_OFF : lcd_hd44.h
  • LCD_CMD_DISPLAY_ON : lcd_hd44.h
  • LCD_CMD_DISPLAY_SHIFT : lcd_hd44.h
  • LCD_CMD_DISPLAYMODE : lcd_hd44.h
  • LCD_CMD_MOVESHIFT_LEFT : lcd_hd44.h
  • LCD_CMD_MOVESHIFT_RIGHT : lcd_hd44.h
  • LCD_CMD_RESET_DDRAM : lcd_hd44.h
  • LCD_CMD_SET8BIT : lcd_hd44.h
  • LCD_CMD_SET_CGRAMADDR : lcd_hd44.h
  • LCD_CMD_SET_DDRAMADDR : lcd_hd44.h
  • LCD_CMD_SETFUNC : lcd_hd44.h
  • LCD_DB_IN : hw_lcd_32122a.h , hw_lcd_hd44.h
  • LCD_DB_OUT : hw_lcd_32122a.h , hw_lcd_hd44.h
  • LCD_DEF_PWM : hw_lcd_32122a.h
  • LCD_DELAY_READ : hw_lcd_32122a.h , hw_lcd_hd44.h
  • LCD_DELAY_WRITE : hw_lcd_32122a.h , hw_lcd_hd44.h
  • LCD_LAYERS : lcd_text.c
  • LCD_PAGES : lcd_32122a.c
  • LCD_PAGESIZE : lcd_32122a.c
  • LCD_READ : hw_lcd_32122a.h
  • LCD_WRITE : hw_lcd_32122a.h
  • LCDF_BUSY : lcd_hd44.c
  • LEVELEDIT_DOUBLE : leveledit.h
  • LEVELEDIT_NOBAR : leveledit.h
  • LEVELEDIT_SINGLE : leveledit.h
  • LIST_ASSERT_NOT_CONTAINS : list.h
  • LIST_ASSERT_VALID : list.h
  • LIST_EMPTY : list.h
  • LIST_ENQUEUE : list.h
  • LIST_ENQUEUE_HEAD : list.h
  • LIST_HEAD : list.h
  • LIST_INIT : list.h
  • LIST_TAIL : list.h
  • LM75_LOG_FORMAT : cfg_lm75.h
  • LM75_LOG_LEVEL : cfg_lm75.h
  • LOG_ERR : log.h
  • LOG_ERRB : log.h
  • LOG_INFO : log.h
  • LOG_INFOB : log.h
  • LOG_WARN : log.h
  • LOG_WARNB : log.h
  • LSION_BITNUMBER : clock_stm32.h
  • LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT : cfg_lwip.h
  • LWIP_ARP : cfg_lwip.h
  • LWIP_AUTOIP : cfg_lwip.h
  • LWIP_BROADCAST_PING : cfg_lwip.h
  • LWIP_COMPAT_SOCKETS : cfg_lwip.h
  • LWIP_DBG_MIN_LEVEL : cfg_lwip.h
  • LWIP_DBG_TYPES_ON : cfg_lwip.h
  • LWIP_DHCP : cfg_lwip.h
  • LWIP_DHCP_AUTOIP_COOP : cfg_lwip.h
  • LWIP_DHCP_AUTOIP_COOP_TRIES : cfg_lwip.h
  • LWIP_DNS : cfg_lwip.h
  • LWIP_HAVE_LOOPIF : cfg_lwip.h
  • LWIP_HAVE_SLIPIF : cfg_lwip.h
  • LWIP_ICMP : cfg_lwip.h
  • LWIP_IGMP : cfg_lwip.h
  • LWIP_LOOPBACK_MAX_PBUFS : cfg_lwip.h
  • LWIP_MULTICAST_PING : cfg_lwip.h
  • LWIP_NETBUF_RECVINFO : cfg_lwip.h
  • LWIP_NETCONN : cfg_lwip.h
  • LWIP_NETIF_API : cfg_lwip.h
  • LWIP_NETIF_HOSTNAME : cfg_lwip.h
  • LWIP_NETIF_HWADDRHINT : cfg_lwip.h
  • LWIP_NETIF_LINK_CALLBACK : cfg_lwip.h
  • LWIP_NETIF_LOOPBACK : cfg_lwip.h
  • LWIP_NETIF_LOOPBACK_MULTITHREADING : cfg_lwip.h
  • LWIP_NETIF_STATUS_CALLBACK : cfg_lwip.h
  • LWIP_NETIF_TX_SINGLE_PBUF : cfg_lwip.h
  • LWIP_POSIX_SOCKETS_IO_NAMES : cfg_lwip.h
  • LWIP_RAW : cfg_lwip.h
  • LWIP_SNMP : cfg_lwip.h
  • LWIP_SO_RCVBUF : cfg_lwip.h
  • LWIP_SO_RCVTIMEO : cfg_lwip.h
  • LWIP_SOCKET : cfg_lwip.h
  • LWIP_STATS : cfg_lwip.h
  • LWIP_TCP : cfg_lwip.h
  • LWIP_TCP_KEEPALIVE : cfg_lwip.h
  • LWIP_TCP_TIMESTAMPS : cfg_lwip.h
  • LWIP_TCPIP_CORE_LOCKING : cfg_lwip.h
  • LWIP_UDP : cfg_lwip.h
  • LWIP_UDPLITE : cfg_lwip.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- m -

  • MAC_BASE : lm3s_memmap.h
  • MAKE_CMD : parser.h
  • MAKE_ID : macros.h
  • MAKE_RCVERS : verstag.h
  • MAKE_TEMPLATE : parser.h
  • MAKE_VERS : verstag.h
  • MAX_PAGE_ADDR : battfs.h
  • MAX_STEPS : stepper.h
  • MC_AASR : at91_mc.h
  • MC_AASR_OFF : at91_mc.h
  • MC_ABTSZ_BYTE : at91_mc.h
  • MC_ABTSZ_HWORD : at91_mc.h
  • MC_ABTSZ_MASK : at91_mc.h
  • MC_ABTSZ_WORD : at91_mc.h
  • MC_ABTTYP_DATAR : at91_mc.h
  • MC_ABTTYP_DATAW : at91_mc.h
  • MC_ABTTYP_FETCH : at91_mc.h
  • MC_ABTTYP_MASK : at91_mc.h
  • MC_ASR : at91_mc.h
  • MC_ASR_OFF : at91_mc.h
  • MC_FCMD_CGPB : at91_mc.h
  • MC_FCMD_CLB : at91_mc.h
  • MC_FCMD_EA : at91_mc.h
  • MC_FCMD_MASK : at91_mc.h
  • MC_FCMD_NOP : at91_mc.h
  • MC_FCMD_SGPB : at91_mc.h
  • MC_FCMD_SLB : at91_mc.h
  • MC_FCMD_SSB : at91_mc.h
  • MC_FCMD_WP : at91_mc.h
  • MC_FCMD_WPL : at91_mc.h
  • MC_FCR : at91_mc.h
  • MC_FCR_OFF : at91_mc.h
  • MC_FMCN_MASK : at91_mc.h
  • MC_FMCN_SHIFT : at91_mc.h
  • MC_FMR : at91_mc.h
  • MC_FMR_OFF : at91_mc.h
  • MC_FRDY : at91_mc.h
  • MC_FSR : at91_mc.h
  • MC_FSR_OFF : at91_mc.h
  • MC_FWS_1R2W : at91_mc.h
  • MC_FWS_2R3W : at91_mc.h
  • MC_FWS_3R4W : at91_mc.h
  • MC_FWS_4R4W : at91_mc.h
  • MC_FWS_MASK : at91_mc.h
  • MC_GPNVM0 : at91_mc.h
  • MC_GPNVM1 : at91_mc.h
  • MC_GPNVM2 : at91_mc.h
  • MC_KEY : at91_mc.h
  • MC_LOCKE : at91_mc.h
  • MC_LOCKS0 : at91_mc.h
  • MC_LOCKS1 : at91_mc.h
  • MC_LOCKS10 : at91_mc.h
  • MC_LOCKS11 : at91_mc.h
  • MC_LOCKS12 : at91_mc.h
  • MC_LOCKS13 : at91_mc.h
  • MC_LOCKS14 : at91_mc.h
  • MC_LOCKS15 : at91_mc.h
  • MC_LOCKS2 : at91_mc.h
  • MC_LOCKS3 : at91_mc.h
  • MC_LOCKS4 : at91_mc.h
  • MC_LOCKS5 : at91_mc.h
  • MC_LOCKS6 : at91_mc.h
  • MC_LOCKS7 : at91_mc.h
  • MC_LOCKS8 : at91_mc.h
  • MC_LOCKS9 : at91_mc.h
  • MC_MISADD : at91_mc.h
  • MC_MST_ARM : at91_mc.h
  • MC_MST_PDC : at91_mc.h
  • MC_NEBP : at91_mc.h
  • MC_PAGEN_MASK : at91_mc.h
  • MC_PROGE : at91_mc.h
  • MC_RCB : at91_mc.h
  • MC_RCR : at91_mc.h
  • MC_RCR_OFF : at91_mc.h
  • MC_SECURITY : at91_mc.h
  • MC_SVMST_ARM : at91_mc.h
  • MC_SVMST_PDC : at91_mc.h
  • MC_UNDADD : at91_mc.h
  • MEM_ALIGNMENT : cfg_lwip.h
  • MEM_DEBUG : cfg_lwip.h
  • MEM_LIBC_MALLOC : cfg_lwip.h
  • MEM_SIZE : cfg_lwip.h
  • MEM_USE_POOLS : cfg_lwip.h
  • MEM_USE_POOLS_TRY_BIGGER_POOL : cfg_lwip.h
  • MEMCPY : cfg_lwip.h
  • MEMORY_BARRIER : compiler.h
  • MEMP_DEBUG : cfg_lwip.h
  • MEMP_MEM_MALLOC : cfg_lwip.h
  • MEMP_NUM_ARP_QUEUE : cfg_lwip.h
  • MEMP_NUM_IGMP_GROUP : cfg_lwip.h
  • MEMP_NUM_NETBUF : cfg_lwip.h
  • MEMP_NUM_NETCONN : cfg_lwip.h
  • MEMP_NUM_PBUF : cfg_lwip.h
  • MEMP_NUM_RAW_PCB : cfg_lwip.h
  • MEMP_NUM_REASSDATA : cfg_lwip.h
  • MEMP_NUM_SYS_TIMEOUT : cfg_lwip.h
  • MEMP_NUM_TCP_PCB : cfg_lwip.h
  • MEMP_NUM_TCP_PCB_LISTEN : cfg_lwip.h
  • MEMP_NUM_TCP_SEG : cfg_lwip.h
  • MEMP_NUM_TCPIP_MSG_API : cfg_lwip.h
  • MEMP_NUM_TCPIP_MSG_INPKT : cfg_lwip.h
  • MEMP_NUM_UDP_PCB : cfg_lwip.h
  • MEMP_OVERFLOW_CHECK : cfg_lwip.h
  • MEMP_SANITY_CHECK : cfg_lwip.h
  • MEMP_USE_CUSTOM_POOLS : cfg_lwip.h
  • MF_ROMITEMS : menu.h
  • MF_SAVESEL : menu.h
  • MF_STICKY : menu.h
  • MF_TOPLEVEL : menu.h
  • MICROS2FREQ : ramp.h
  • MIF_CHECKED : menu.h
  • MIF_CHECKIT : menu.h
  • MIF_DISABLED : menu.h
  • MIF_EXCLUDE_0 : menu.h
  • MIF_EXCLUDE_1 : menu.h
  • MIF_EXCLUDE_2 : menu.h
  • MIF_EXCLUDE_3 : menu.h
  • MIF_EXCLUDE_4 : menu.h
  • MIF_EXCLUDE_5 : menu.h
  • MIF_EXCLUDE_6 : menu.h
  • MIF_EXCLUDE_7 : menu.h
  • MIF_EXCLUDE_MASK : menu.h
  • MIF_HIDDEN : menu.h
  • MIF_PRI : menu.h
  • MIF_PRI_MASK : menu.h
  • MIF_RAMLABEL : menu.h
  • MIF_RENDERHOOK : menu.h
  • MIF_TOGGLE : menu.h
  • MINMAX : macros.h
  • MISO : hw_spi.h
  • MISO_HIGH : hw_spi.h
  • MISO_IN : hw_spi.h
  • MISO_OUT : hw_spi.h
  • MOD_CHECK : module.h
  • MOD_CLEANUP : module.h
  • MOD_DEFINE : module.h
  • MOD_INIT : module.h
  • MOSI : hw_spi.h
  • MOSI_HIGH : hw_spi.h
  • MOSI_IN : hw_spi.h
  • MOSI_LOW : hw_spi.h
  • MOSI_OUT : hw_spi.h
  • MOTOR_CURRENT_TICKS : stepper.c
  • MOTOR_HOME_MAX_STEPS : stepper.c
  • MOTOR_NO_HOME_SENSOR : stepper.h
  • MOTOR_NO_LEVEL_SENSOR : stepper.h
  • MOTOR_SWITCH_COUNT : stepper.c
  • MOTOR_SWITCH_TICKS : stepper.c
  • MT29F_ERR_ERASE : mt29f.h
  • MT29F_ERR_RD_TMOUT : mt29f.h
  • MT29F_ERR_WR_TMOUT : mt29f.h
  • MT29F_ERR_WRITE : mt29f.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- n -

  • NETIF_DEBUG : cfg_lwip.h
  • NMEA_LOG_FORMAT : cfg_nmea.h
  • NMEA_LOG_LEVEL : cfg_nmea.h
  • NO_SYS : cfg_lwip.h
  • NUM_COMPUTE_ROUNDS : md2.h
  • NUM_INTERRUPTS : lm3s_ints.h
  • NUM_PRIORITY : lm3s_ints.h
  • NUM_PRIORITY_BITS : lm3s_ints.h
  • NVIC_ACTIVE0 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT0 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT1 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT10 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT11 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT12 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT13 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT14 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT15 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT16 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT17 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT18 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT19 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT2 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT20 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT21 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT22 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT23 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT24 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT25 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT26 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT27 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT28 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT29 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT3 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT30 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT31 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT4 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT5 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT6 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT7 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT8 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_INT9 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE0_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT32 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT33 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT34 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT35 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT36 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT37 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT38 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT39 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT40 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT41 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT42 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT43 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT44 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT45 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT46 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT47 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT48 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT49 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT50 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT51 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT52 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT53 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT54 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT55 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT56 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT57 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT58 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ACTIVE1_INT59 : sam3_nvic.h , stm32_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_ACTIVE1_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_ENDIANESS : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_0_8 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_1_7 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_2_6 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_3_5 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_4_4 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_5_3 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_6_2 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_7_1 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_PRIGROUP_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_SYSRESETREQ : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_VECT_CLR_ACT : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_VECT_RESET : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_VECTKEY : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_APINT_VECTKEY_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_BASE : lm3s_memmap.h
  • NVIC_CFG_CTRL : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CFG_CTRL_BASE_THR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CFG_CTRL_BFHFNMIGN : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CFG_CTRL_DEEP_PEND : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CFG_CTRL_DIV0 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CFG_CTRL_MAIN_PEND : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CFG_CTRL_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CFG_CTRL_UNALIGNED : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CPUID : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CPUID_IMP_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CPUID_PARTNO_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CPUID_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CPUID_REV_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_CPUID_VAR_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_C_DEBUGEN : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_C_HALT : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_C_MASKINT : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_C_SNAPSTALL : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_C_STEP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_DBGKEY : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_DBGKEY_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_S_HALT : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_S_LOCKUP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_S_REGRDY : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_S_RESET_ST : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_S_RETIRE_ST : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_CTRL_S_SLEEP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_DATA : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_DATA_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_DATA_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_DATA_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_BUSERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_CHKERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_HARDERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_INTERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_MMERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_NOCPERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_RESET : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_RSTPENDCLR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_RSTPENDING : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_RSTVCATCH : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_INT_STATERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_CFBP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_DSP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_FLAGS : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_MSP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_PSP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R0 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R1 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R10 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R11 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R12 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R13 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R14 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R15 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R2 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R3 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R4 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R5 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R6 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R7 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R8 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_R9 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_SEL_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DBG_XFER_REG_WNR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DEBUG_STAT : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DEBUG_STAT_BKPT : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DEBUG_STAT_DWTTRAP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DEBUG_STAT_EXTRNL : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DEBUG_STAT_HALTED : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DEBUG_STAT_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DEBUG_STAT_VCATCH : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT0 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT1 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT10 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT11 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT12 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT13 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT14 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT15 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT16 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT17 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT18 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT19 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT2 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT20 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT21 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT22 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT23 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT24 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT25 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT26 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT27 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT28 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT29 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT3 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT30 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT31 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT4 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT5 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT6 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT7 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT8 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_INT9 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS0_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT32 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT33 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT34 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT35 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT36 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT37 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT38 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT39 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT40 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT41 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT42 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT43 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT44 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT45 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT46 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT47 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT48 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT49 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT50 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT51 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT52 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT53 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT54 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT55 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT56 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT57 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT58 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_INT59 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_DIS1_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT0 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT1 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT10 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT11 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT12 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT13 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT14 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT15 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT16 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT17 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT18 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT19 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT2 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT20 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT21 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT22 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT23 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT24 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT25 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT26 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT27 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT28 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT29 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT3 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT30 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT31 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT4 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT5 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT6 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT7 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT8 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_INT9 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN0_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT32 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT33 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT34 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_EN1_INT35 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT36 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT37 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT38 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT39 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT40 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT41 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT42 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT43 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT44 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT45 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT46 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT47 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT48 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT49 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT50 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT51 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT52 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT53 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT54 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT55 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT56 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT57 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT58 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_INT59 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_EN1_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_ADDR : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_ADDR_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_ADDR_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_ADDR_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_BFARV : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_BSTKE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_BUSTKE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_DERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_DIV0 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_IBUS : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_IERR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_IMPRE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_INVPC : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_INVSTAT : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_MMARV : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_MSTKE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_MUSTKE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_NOCP : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_PRECISE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_UNALIGN : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_FAULT_STAT_UNDEF : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_HFAULT_STAT : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_HFAULT_STAT_DBG : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_HFAULT_STAT_FORCED : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_HFAULT_STAT_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_HFAULT_STAT_VECT : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_ISR_PEND : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_ISR_PRE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_NMI_SET : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_PEND_SV : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_PENDSTCLR : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_PENDSTSET : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_RET_BASE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_UNPEND_SV : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_VEC_ACT_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_VEC_ACT_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_VEC_PEN_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_CTRL_VEC_PEN_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_TYPE : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_TYPE_LINES_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_TYPE_LINES_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_INT_TYPE_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MM_ADDR : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MM_ADDR_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MM_ADDR_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MM_ADDR_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_AP_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_AP_NO_NO : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_AP_RO_NO : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_AP_RO_RO : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_AP_RW_NO : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_AP_RW_RO : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_AP_RW_RW : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_BUFFRABLE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_CACHEABLE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_ENABLE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SHAREABLE : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_128B : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_128K : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_128M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_16K : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_16M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_1G : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_1K : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_1M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_256B : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_256K : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_256M : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SIZE_2G : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SIZE_2K : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SIZE_2M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_32B : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SIZE_32K : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SIZE_32M : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SIZE_4G : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_4K : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SIZE_4M : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SIZE_512B : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SIZE_512K : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_512M : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SIZE_64B : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SIZE_64K : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SIZE_64M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SIZE_8K : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SIZE_8M : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SIZE_M : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SRD_0 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SRD_1 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SRD_2 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SRD_3 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SRD_4 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_SRD_5 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SRD_6 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SRD_7 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_SRD_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_ATTR_TEX_M : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_ATTR_XN : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_MPU_BASE : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_BASE_ADDR_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_BASE_ADDR_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_BASE_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_BASE_REGION_M : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_BASE_REGION_S : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_BASE_VALID : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_CTRL : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_MPU_CTRL_ENABLE : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_MPU_CTRL_HFNMIENA : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_MPU_CTRL_PRIVDEFEN : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_CTRL_R : stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_MPU_NUMBER : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_NUMBER_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_NUMBER_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_NUMBER_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_R : lm3s_com.h
  • NVIC_MPU_TYPE : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_TYPE_DREGION_M : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_TYPE_DREGION_S : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_TYPE_IREGION_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_TYPE_IREGION_S : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_MPU_TYPE_R : sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_MPU_TYPE_SEPARATE : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PEND0 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT0 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT1 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT10 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT11 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT12 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT13 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT14 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT15 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT16 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT17 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT18 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT19 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT2 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT20 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT21 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT22 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT23 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT24 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT25 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT26 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT27 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT28 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT29 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT3 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT30 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT31 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT4 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT5 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_INT6 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT7 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT8 : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PEND0_INT9 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND0_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT32 : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT33 : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT34 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT35 : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT36 : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT37 : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT38 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT39 : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT40 : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT41 : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PEND1_INT42 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT43 : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PEND1_INT44 : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PEND1_INT45 : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PEND1_INT46 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT47 : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PEND1_INT48 : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PEND1_INT49 : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PEND1_INT50 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT51 : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PEND1_INT52 : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PEND1_INT53 : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PEND1_INT54 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT55 : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PEND1_INT56 : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PEND1_INT57 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT58 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PEND1_INT59 : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PEND1_R : lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI0 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI0_INT0_M : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI0_INT0_S : stm32_nvic.h , lm3s_com.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_PRI0_INT1_M : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI0_INT1_S : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_PRI0_INT2_M : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI0_INT2_S : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI0_INT3_M : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI0_INT3_S : sam3_nvic.h , lm3s_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI0_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI1 : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_PRI10 : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI10_INT40_M : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI10_INT40_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI10_INT41_M : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI10_INT41_S : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI10_INT42_M : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI10_INT42_S : sam3_nvic.h , lm3s_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI10_INT43_M : sam3_nvic.h , lm3s_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI10_INT43_S : sam3_nvic.h , lm3s_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI10_R : stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI11 : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_PRI12 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI13 : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI1_INT4_M : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI1_INT4_S : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI1_INT5_M : sam3_nvic.h , lm3s_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI1_INT5_S : sam3_nvic.h , lm3s_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI1_INT6_M : sam3_nvic.h , lm3s_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI1_INT6_S : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI1_INT7_M : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI1_INT7_S : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI1_R : stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI2 : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI2_INT10_M : lm3s_com.h , stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_PRI2_INT10_S : lm3s_com.h , stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PRI2_INT11_M : lm3s_com.h , stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_PRI2_INT11_S : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI2_INT8_M : lm3s_com.h , stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_PRI2_INT8_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI2_INT9_M : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PRI2_INT9_S : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI2_R : lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI3 : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI3_INT12_M : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI3_INT12_S : sam3_nvic.h , lm3s_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI3_INT13_M : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI3_INT13_S : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_PRI3_INT14_M : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI3_INT14_S : lm3s_com.h , stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_PRI3_INT15_M : lm3s_com.h , stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_PRI3_INT15_S : stm32_nvic.h , sam3_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_PRI3_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI4 : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI4_INT16_M : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI4_INT16_S : lm3s_nvic.h , lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI4_INT17_M : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_PRI4_INT17_S : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI4_INT18_M : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI4_INT18_S : lm3s_nvic.h , lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI4_INT19_M : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI4_INT19_S : lm3s_nvic.h , lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI4_R : sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI5 : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI5_INT20_M : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI5_INT20_S : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI5_INT21_M : stm32_nvic.h , sam3_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_PRI5_INT21_S : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI5_INT22_M : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI5_INT22_S : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI5_INT23_M : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI5_INT23_S : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI5_R : stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI6 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI6_INT24_M : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI6_INT24_S : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI6_INT25_M : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI6_INT25_S : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_PRI6_INT26_M : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI6_INT26_S : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI6_INT27_M : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI6_INT27_S : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_PRI6_R : sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI7 : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_PRI7_INT28_M : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI7_INT28_S : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI7_INT29_M : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI7_INT29_S : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI7_INT30_M : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_PRI7_INT30_S : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_PRI7_INT31_M : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI7_INT31_S : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI7_R : sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI8 : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_PRI8_INT32_M : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI8_INT32_S : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI8_INT33_M : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI8_INT33_S : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI8_INT34_M : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_PRI8_INT34_S : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI8_INT35_M : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI8_INT35_S : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_PRI8_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_PRI9 : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_PRI9_INT36_M : stm32_nvic.h , lm3s_com.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_PRI9_INT36_S : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_PRI9_INT37_M : sam3_nvic.h , stm32_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_PRI9_INT37_S : sam3_nvic.h , lm3s_com.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_PRI9_INT38_M : stm32_nvic.h , lm3s_com.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_PRI9_INT38_S : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_PRI9_INT39_M : stm32_nvic.h , lm3s_com.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_PRI9_INT39_S : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_PRI9_R : sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_ST_CAL : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_ST_CAL_NOREF : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ST_CAL_ONEMS_M : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_ST_CAL_ONEMS_S : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_ST_CAL_R : sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_ST_CAL_SKEW : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_ST_CTRL : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_ST_CTRL_CLK_SRC : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_ST_CTRL_COUNT : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_ST_CTRL_ENABLE : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_ST_CTRL_INTEN : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_ST_CTRL_R : sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_ST_CURRENT : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_ST_CURRENT_M : lm3s_nvic.h , lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_ST_CURRENT_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_ST_CURRENT_S : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_ST_RELOAD : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_ST_RELOAD_M : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_ST_RELOAD_R : sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_ST_RELOAD_S : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_SW_TRIG : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_SW_TRIG_INTID_M : lm3s_nvic.h , lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_SW_TRIG_INTID_S : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_SW_TRIG_R : sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_SYS_CTRL : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_SYS_CTRL_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_SYS_CTRL_SEVONPEND : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_SYS_CTRL_SLEEPDEEP : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_SYS_CTRL_SLEEPEXIT : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_SYS_HND_CTRL : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_SYS_HND_CTRL_BUS : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_SYS_HND_CTRL_BUSA : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_SYS_HND_CTRL_BUSP : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_SYS_HND_CTRL_MEM : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_SYS_HND_CTRL_MEMA : stm32_nvic.h , lm3s_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_SYS_HND_CTRL_MON : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_SYS_HND_CTRL_PNDSV : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_SYS_HND_CTRL_R : sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_SYS_HND_CTRL_SVC : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_SYS_HND_CTRL_SVCA : stm32_nvic.h , sam3_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_SYS_HND_CTRL_TICK : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_SYS_HND_CTRL_USAGE : lm3s_com.h , stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_SYS_HND_CTRL_USGA : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_SYS_PRI1 : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_SYS_PRI1_BUS_M : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_SYS_PRI1_BUS_S : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_SYS_PRI1_MEM_M : stm32_nvic.h , lm3s_com.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_SYS_PRI1_MEM_S : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_SYS_PRI1_R : lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_SYS_PRI1_RES_M : lm3s_com.h , stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h
  • NVIC_SYS_PRI1_USAGE_M : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_SYS_PRI1_USAGE_S : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_SYS_PRI2 : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_SYS_PRI2_R : sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_SYS_PRI2_RES_M : sam3_nvic.h , lm3s_com.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_SYS_PRI2_SVC_M : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_SYS_PRI2_SVC_S : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_SYS_PRI3 : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_SYS_PRI3_DEBUG_M : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_SYS_PRI3_DEBUG_S : lm3s_com.h , sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_SYS_PRI3_PENDSV_M : stm32_nvic.h , sam3_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_SYS_PRI3_PENDSV_S : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_SYS_PRI3_R : lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_SYS_PRI3_RES_M : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_SYS_PRI3_TICK_M : lm3s_com.h , stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_SYS_PRI3_TICK_S : stm32_nvic.h , lm3s_com.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND0 : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT0 : stm32_nvic.h , sam3_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT1 : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_UNPEND0_INT10 : stm32_nvic.h , lm3s_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_UNPEND0_INT11 : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_UNPEND0_INT12 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_UNPEND0_INT13 : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_UNPEND0_INT14 : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_UNPEND0_INT15 : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_UNPEND0_INT16 : lm3s_nvic.h , lm3s_com.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_UNPEND0_INT17 : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_UNPEND0_INT18 : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_UNPEND0_INT19 : stm32_nvic.h , sam3_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT2 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_UNPEND0_INT20 : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_UNPEND0_INT21 : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_UNPEND0_INT22 : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_UNPEND0_INT23 : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_UNPEND0_INT24 : stm32_nvic.h , lm3s_com.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT25 : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_UNPEND0_INT26 : stm32_nvic.h , lm3s_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_UNPEND0_INT27 : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_UNPEND0_INT28 : lm3s_com.h , lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_UNPEND0_INT29 : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_UNPEND0_INT3 : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_UNPEND0_INT30 : sam3_nvic.h , lm3s_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_UNPEND0_INT31 : sam3_nvic.h , lm3s_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_UNPEND0_INT4 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_UNPEND0_INT5 : sam3_nvic.h , lm3s_com.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT6 : stm32_nvic.h , lm3s_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_UNPEND0_INT7 : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_UNPEND0_INT8 : sam3_nvic.h , lm3s_com.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND0_INT9 : lm3s_nvic.h , stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_UNPEND0_R : stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_UNPEND1 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_UNPEND1_INT32 : stm32_nvic.h , lm3s_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_UNPEND1_INT33 : stm32_nvic.h , sam3_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_UNPEND1_INT34 : stm32_nvic.h , lm3s_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_UNPEND1_INT35 : sam3_nvic.h , lm3s_com.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND1_INT36 : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_UNPEND1_INT37 : sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_UNPEND1_INT38 : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_UNPEND1_INT39 : lm3s_com.h , stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND1_INT40 : sam3_nvic.h , lm3s_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_UNPEND1_INT41 : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_UNPEND1_INT42 : stm32_nvic.h , lm3s_com.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND1_INT43 : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_UNPEND1_INT44 : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_UNPEND1_INT45 : stm32_nvic.h , lm3s_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_UNPEND1_INT46 : stm32_nvic.h , sam3_nvic.h , lm3s_com.h , lm3s_nvic.h
  • NVIC_UNPEND1_INT47 : lm3s_nvic.h , sam3_nvic.h , lm3s_com.h , stm32_nvic.h
  • NVIC_UNPEND1_INT48 : stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h , lm3s_com.h
  • NVIC_UNPEND1_INT49 : sam3_nvic.h , lm3s_com.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND1_INT50 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_UNPEND1_INT51 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_UNPEND1_INT52 : lm3s_nvic.h , sam3_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_UNPEND1_INT53 : lm3s_com.h , lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_UNPEND1_INT54 : sam3_nvic.h , lm3s_nvic.h , stm32_nvic.h , lm3s_com.h
  • NVIC_UNPEND1_INT55 : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h , lm3s_com.h
  • NVIC_UNPEND1_INT56 : lm3s_nvic.h , lm3s_com.h , sam3_nvic.h , stm32_nvic.h
  • NVIC_UNPEND1_INT57 : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_UNPEND1_INT58 : sam3_nvic.h , lm3s_com.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND1_INT59 : lm3s_com.h , sam3_nvic.h , stm32_nvic.h , lm3s_nvic.h
  • NVIC_UNPEND1_R : stm32_nvic.h , lm3s_com.h , sam3_nvic.h
  • NVIC_VTABLE : lm3s_nvic.h , stm32_nvic.h , sam3_nvic.h
  • NVIC_VTABLE_BASE : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_VTABLE_OFFSET_M : sam3_nvic.h , lm3s_com.h , lm3s_nvic.h , stm32_nvic.h
  • NVIC_VTABLE_OFFSET_S : lm3s_com.h , stm32_nvic.h , sam3_nvic.h , lm3s_nvic.h
  • NVIC_VTABLE_R : lm3s_com.h , stm32_nvic.h , sam3_nvic.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- o -

  • OCR_DIVISOR : timer_mega.h
  • offsetof : compiler.h
  • OS_CSOURCE : os.h
  • OS_HEADER : os.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- a -

  • ACCESS_SAFE : compiler.h
  • ADC0_ACTSS_R : lm3s_com.h
  • ADC0_BASE : lm3s_memmap.h
  • ADC0_EMUX_R : lm3s_com.h
  • ADC0_IM_R : lm3s_com.h
  • ADC0_ISC_R : lm3s_com.h
  • ADC0_OSTAT_R : lm3s_com.h
  • ADC0_PSSI_R : lm3s_com.h
  • ADC0_RIS_R : lm3s_com.h
  • ADC0_SAC_R : lm3s_com.h
  • ADC0_SSCTL0_R : lm3s_com.h
  • ADC0_SSCTL1_R : lm3s_com.h
  • ADC0_SSCTL2_R : lm3s_com.h
  • ADC0_SSCTL3_R : lm3s_com.h
  • ADC0_SSFIFO0_R : lm3s_com.h
  • ADC0_SSFIFO1_R : lm3s_com.h
  • ADC0_SSFIFO2_R : lm3s_com.h
  • ADC0_SSFIFO3_R : lm3s_com.h
  • ADC0_SSFSTAT0_R : lm3s_com.h
  • ADC0_SSFSTAT1_R : lm3s_com.h
  • ADC0_SSFSTAT2_R : lm3s_com.h
  • ADC0_SSFSTAT3_R : lm3s_com.h
  • ADC0_SSMUX0_R : lm3s_com.h
  • ADC0_SSMUX1_R : lm3s_com.h
  • ADC0_SSMUX2_R : lm3s_com.h
  • ADC0_SSMUX3_R : lm3s_com.h
  • ADC0_SSPRI_R : lm3s_com.h
  • ADC0_TMLB_R : lm3s_com.h
  • ADC0_USTAT_R : lm3s_com.h
  • ADC1_BASE : lm3s_memmap.h
  • ADC_ACR : sam3_adc.h
  • ADC_ACR_OFF : sam3_adc.h
  • ADC_ACTSS_ASEN0 : lm3s_adc.h
  • ADC_ACTSS_ASEN1 : lm3s_adc.h
  • ADC_ACTSS_ASEN2 : lm3s_adc.h
  • ADC_ACTSS_ASEN3 : lm3s_adc.h
  • ADC_ACTSS_R : lm3s_com.h
  • ADC_AST17 : sam3_adc.h
  • ADC_AST3 : sam3_adc.h
  • ADC_AST5 : sam3_adc.h
  • ADC_AST9 : sam3_adc.h
  • ADC_AVR_AREF : adc_avr.c
  • ADC_AVR_AVCC : adc_avr.c
  • ADC_AVR_INT256 : adc_avr.c
  • ADC_BASE : sam3_adc.h
  • ADC_CDR : sam3_adc.h
  • ADC_CDR0 : at91_adc.h
  • ADC_CDR0_OFF : at91_adc.h
  • ADC_CDR1 : at91_adc.h
  • ADC_CDR1_OFF : at91_adc.h
  • ADC_CDR2 : at91_adc.h
  • ADC_CDR2_OFF : at91_adc.h
  • ADC_CDR3 : at91_adc.h
  • ADC_CDR3_OFF : at91_adc.h
  • ADC_CDR4 : at91_adc.h
  • ADC_CDR4_OFF : at91_adc.h
  • ADC_CDR5 : at91_adc.h
  • ADC_CDR5_OFF : at91_adc.h
  • ADC_CDR6 : at91_adc.h
  • ADC_CDR6_OFF : at91_adc.h
  • ADC_CDR7 : at91_adc.h
  • ADC_CDR7_OFF : at91_adc.h
  • ADC_CDR_OFF : sam3_adc.h
  • ADC_CH0 : at91_adc.h , sam3_adc.h
  • ADC_CH1 : at91_adc.h , sam3_adc.h
  • ADC_CH2 : at91_adc.h , sam3_adc.h
  • ADC_CH3 : at91_adc.h , sam3_adc.h
  • ADC_CH4 : at91_adc.h , sam3_adc.h
  • ADC_CH5 : at91_adc.h , sam3_adc.h
  • ADC_CH6 : at91_adc.h , sam3_adc.h
  • ADC_CH7 : at91_adc.h , sam3_adc.h
  • ADC_CH_MASK : at91_adc.h , sam3_adc.h
  • ADC_CHDR : at91_adc.h , sam3_adc.h
  • ADC_CHDR_OFF : at91_adc.h , sam3_adc.h
  • ADC_CHER : at91_adc.h , sam3_adc.h
  • ADC_CHER_OFF : at91_adc.h , sam3_adc.h
  • ADC_CHNB : sam3_adc.h
  • ADC_CHSR : at91_adc.h , sam3_adc.h
  • ADC_CHSR_OFF : at91_adc.h , sam3_adc.h
  • ADC_COMPE : sam3_adc.h
  • ADC_COMPUTED_PRESCALER : adc_at91.h
  • ADC_CR : at91_adc.h , sam3_adc.h
  • ADC_CR_OFF : at91_adc.h , sam3_adc.h
  • ADC_CTL_VREF : lm3s_adc.h
  • ADC_DCCMP0_COMP0_M : lm3s_adc.h
  • ADC_DCCMP0_COMP1_M : lm3s_adc.h
  • ADC_DCCMP1_COMP0_M : lm3s_adc.h
  • ADC_DCCMP1_COMP1_M : lm3s_adc.h
  • ADC_DCCMP2_COMP0_M : lm3s_adc.h
  • ADC_DCCMP2_COMP1_M : lm3s_adc.h
  • ADC_DCCMP3_COMP0_M : lm3s_adc.h
  • ADC_DCCMP3_COMP1_M : lm3s_adc.h
  • ADC_DCCMP4_COMP0_M : lm3s_adc.h
  • ADC_DCCMP4_COMP1_M : lm3s_adc.h
  • ADC_DCCMP5_COMP0_M : lm3s_adc.h
  • ADC_DCCMP5_COMP1_M : lm3s_adc.h
  • ADC_DCCMP6_COMP0_M : lm3s_adc.h
  • ADC_DCCMP6_COMP1_M : lm3s_adc.h
  • ADC_DCCMP7_COMP0_M : lm3s_adc.h
  • ADC_DCCMP7_COMP1_M : lm3s_adc.h
  • ADC_DCCTL0_CIC_HIGH : lm3s_adc.h
  • ADC_DCCTL0_CIC_LOW : lm3s_adc.h
  • ADC_DCCTL0_CIC_M : lm3s_adc.h
  • ADC_DCCTL0_CIC_MID : lm3s_adc.h
  • ADC_DCCTL0_CIE : lm3s_adc.h
  • ADC_DCCTL0_CIM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL0_CIM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL0_CIM_HONCE : lm3s_adc.h
  • ADC_DCCTL0_CIM_M : lm3s_adc.h
  • ADC_DCCTL0_CIM_ONCE : lm3s_adc.h
  • ADC_DCCTL0_CTC_HIGH : lm3s_adc.h
  • ADC_DCCTL0_CTC_LOW : lm3s_adc.h
  • ADC_DCCTL0_CTC_M : lm3s_adc.h
  • ADC_DCCTL0_CTC_MID : lm3s_adc.h
  • ADC_DCCTL0_CTE : lm3s_adc.h
  • ADC_DCCTL0_CTM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL0_CTM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL0_CTM_HONCE : lm3s_adc.h
  • ADC_DCCTL0_CTM_M : lm3s_adc.h
  • ADC_DCCTL0_CTM_ONCE : lm3s_adc.h
  • ADC_DCCTL1_CIC_HIGH : lm3s_adc.h
  • ADC_DCCTL1_CIC_LOW : lm3s_adc.h
  • ADC_DCCTL1_CIC_M : lm3s_adc.h
  • ADC_DCCTL1_CIC_MID : lm3s_adc.h
  • ADC_DCCTL1_CIE : lm3s_adc.h
  • ADC_DCCTL1_CIM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL1_CIM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL1_CIM_HONCE : lm3s_adc.h
  • ADC_DCCTL1_CIM_M : lm3s_adc.h
  • ADC_DCCTL1_CIM_ONCE : lm3s_adc.h
  • ADC_DCCTL1_CTC_HIGH : lm3s_adc.h
  • ADC_DCCTL1_CTC_LOW : lm3s_adc.h
  • ADC_DCCTL1_CTC_M : lm3s_adc.h
  • ADC_DCCTL1_CTC_MID : lm3s_adc.h
  • ADC_DCCTL1_CTE : lm3s_adc.h
  • ADC_DCCTL1_CTM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL1_CTM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL1_CTM_HONCE : lm3s_adc.h
  • ADC_DCCTL1_CTM_M : lm3s_adc.h
  • ADC_DCCTL1_CTM_ONCE : lm3s_adc.h
  • ADC_DCCTL2_CIC_HIGH : lm3s_adc.h
  • ADC_DCCTL2_CIC_LOW : lm3s_adc.h
  • ADC_DCCTL2_CIC_M : lm3s_adc.h
  • ADC_DCCTL2_CIC_MID : lm3s_adc.h
  • ADC_DCCTL2_CIE : lm3s_adc.h
  • ADC_DCCTL2_CIM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL2_CIM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL2_CIM_HONCE : lm3s_adc.h
  • ADC_DCCTL2_CIM_M : lm3s_adc.h
  • ADC_DCCTL2_CIM_ONCE : lm3s_adc.h
  • ADC_DCCTL2_CTC_HIGH : lm3s_adc.h
  • ADC_DCCTL2_CTC_LOW : lm3s_adc.h
  • ADC_DCCTL2_CTC_M : lm3s_adc.h
  • ADC_DCCTL2_CTC_MID : lm3s_adc.h
  • ADC_DCCTL2_CTE : lm3s_adc.h
  • ADC_DCCTL2_CTM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL2_CTM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL2_CTM_HONCE : lm3s_adc.h
  • ADC_DCCTL2_CTM_M : lm3s_adc.h
  • ADC_DCCTL2_CTM_ONCE : lm3s_adc.h
  • ADC_DCCTL3_CIC_HIGH : lm3s_adc.h
  • ADC_DCCTL3_CIC_LOW : lm3s_adc.h
  • ADC_DCCTL3_CIC_M : lm3s_adc.h
  • ADC_DCCTL3_CIC_MID : lm3s_adc.h
  • ADC_DCCTL3_CIE : lm3s_adc.h
  • ADC_DCCTL3_CIM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL3_CIM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL3_CIM_HONCE : lm3s_adc.h
  • ADC_DCCTL3_CIM_M : lm3s_adc.h
  • ADC_DCCTL3_CIM_ONCE : lm3s_adc.h
  • ADC_DCCTL3_CTC_HIGH : lm3s_adc.h
  • ADC_DCCTL3_CTC_LOW : lm3s_adc.h
  • ADC_DCCTL3_CTC_M : lm3s_adc.h
  • ADC_DCCTL3_CTC_MID : lm3s_adc.h
  • ADC_DCCTL3_CTE : lm3s_adc.h
  • ADC_DCCTL3_CTM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL3_CTM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL3_CTM_HONCE : lm3s_adc.h
  • ADC_DCCTL3_CTM_M : lm3s_adc.h
  • ADC_DCCTL3_CTM_ONCE : lm3s_adc.h
  • ADC_DCCTL4_CIC_HIGH : lm3s_adc.h
  • ADC_DCCTL4_CIC_LOW : lm3s_adc.h
  • ADC_DCCTL4_CIC_M : lm3s_adc.h
  • ADC_DCCTL4_CIC_MID : lm3s_adc.h
  • ADC_DCCTL4_CIE : lm3s_adc.h
  • ADC_DCCTL4_CIM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL4_CIM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL4_CIM_HONCE : lm3s_adc.h
  • ADC_DCCTL4_CIM_M : lm3s_adc.h
  • ADC_DCCTL4_CIM_ONCE : lm3s_adc.h
  • ADC_DCCTL4_CTC_HIGH : lm3s_adc.h
  • ADC_DCCTL4_CTC_LOW : lm3s_adc.h
  • ADC_DCCTL4_CTC_M : lm3s_adc.h
  • ADC_DCCTL4_CTC_MID : lm3s_adc.h
  • ADC_DCCTL4_CTE : lm3s_adc.h
  • ADC_DCCTL4_CTM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL4_CTM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL4_CTM_HONCE : lm3s_adc.h
  • ADC_DCCTL4_CTM_M : lm3s_adc.h
  • ADC_DCCTL4_CTM_ONCE : lm3s_adc.h
  • ADC_DCCTL5_CIC_HIGH : lm3s_adc.h
  • ADC_DCCTL5_CIC_LOW : lm3s_adc.h
  • ADC_DCCTL5_CIC_M : lm3s_adc.h
  • ADC_DCCTL5_CIC_MID : lm3s_adc.h
  • ADC_DCCTL5_CIE : lm3s_adc.h
  • ADC_DCCTL5_CIM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL5_CIM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL5_CIM_HONCE : lm3s_adc.h
  • ADC_DCCTL5_CIM_M : lm3s_adc.h
  • ADC_DCCTL5_CIM_ONCE : lm3s_adc.h
  • ADC_DCCTL5_CTC_HIGH : lm3s_adc.h
  • ADC_DCCTL5_CTC_LOW : lm3s_adc.h
  • ADC_DCCTL5_CTC_M : lm3s_adc.h
  • ADC_DCCTL5_CTC_MID : lm3s_adc.h
  • ADC_DCCTL5_CTE : lm3s_adc.h
  • ADC_DCCTL5_CTM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL5_CTM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL5_CTM_HONCE : lm3s_adc.h
  • ADC_DCCTL5_CTM_M : lm3s_adc.h
  • ADC_DCCTL5_CTM_ONCE : lm3s_adc.h
  • ADC_DCCTL6_CIC_HIGH : lm3s_adc.h
  • ADC_DCCTL6_CIC_LOW : lm3s_adc.h
  • ADC_DCCTL6_CIC_M : lm3s_adc.h
  • ADC_DCCTL6_CIC_MID : lm3s_adc.h
  • ADC_DCCTL6_CIE : lm3s_adc.h
  • ADC_DCCTL6_CIM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL6_CIM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL6_CIM_HONCE : lm3s_adc.h
  • ADC_DCCTL6_CIM_M : lm3s_adc.h
  • ADC_DCCTL6_CIM_ONCE : lm3s_adc.h
  • ADC_DCCTL6_CTC_HIGH : lm3s_adc.h
  • ADC_DCCTL6_CTC_LOW : lm3s_adc.h
  • ADC_DCCTL6_CTC_M : lm3s_adc.h
  • ADC_DCCTL6_CTC_MID : lm3s_adc.h
  • ADC_DCCTL6_CTE : lm3s_adc.h
  • ADC_DCCTL6_CTM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL6_CTM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL6_CTM_HONCE : lm3s_adc.h
  • ADC_DCCTL6_CTM_M : lm3s_adc.h
  • ADC_DCCTL6_CTM_ONCE : lm3s_adc.h
  • ADC_DCCTL7_CIC_HIGH : lm3s_adc.h
  • ADC_DCCTL7_CIC_LOW : lm3s_adc.h
  • ADC_DCCTL7_CIC_M : lm3s_adc.h
  • ADC_DCCTL7_CIC_MID : lm3s_adc.h
  • ADC_DCCTL7_CIE : lm3s_adc.h
  • ADC_DCCTL7_CIM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL7_CIM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL7_CIM_HONCE : lm3s_adc.h
  • ADC_DCCTL7_CIM_M : lm3s_adc.h
  • ADC_DCCTL7_CIM_ONCE : lm3s_adc.h
  • ADC_DCCTL7_CTC_HIGH : lm3s_adc.h
  • ADC_DCCTL7_CTC_LOW : lm3s_adc.h
  • ADC_DCCTL7_CTC_M : lm3s_adc.h
  • ADC_DCCTL7_CTC_MID : lm3s_adc.h
  • ADC_DCCTL7_CTE : lm3s_adc.h
  • ADC_DCCTL7_CTM_ALWAYS : lm3s_adc.h
  • ADC_DCCTL7_CTM_HALWAYS : lm3s_adc.h
  • ADC_DCCTL7_CTM_HONCE : lm3s_adc.h
  • ADC_DCCTL7_CTM_M : lm3s_adc.h
  • ADC_DCCTL7_CTM_ONCE : lm3s_adc.h
  • ADC_DCISC_DCINT0 : lm3s_adc.h
  • ADC_DCISC_DCINT1 : lm3s_adc.h
  • ADC_DCISC_DCINT2 : lm3s_adc.h
  • ADC_DCISC_DCINT3 : lm3s_adc.h
  • ADC_DCISC_DCINT4 : lm3s_adc.h
  • ADC_DCISC_DCINT5 : lm3s_adc.h
  • ADC_DCISC_DCINT6 : lm3s_adc.h
  • ADC_DCISC_DCINT7 : lm3s_adc.h
  • ADC_DCRIC_DCINT0 : lm3s_adc.h
  • ADC_DCRIC_DCINT1 : lm3s_adc.h
  • ADC_DCRIC_DCINT2 : lm3s_adc.h
  • ADC_DCRIC_DCINT3 : lm3s_adc.h
  • ADC_DCRIC_DCINT4 : lm3s_adc.h
  • ADC_DCRIC_DCINT5 : lm3s_adc.h
  • ADC_DCRIC_DCINT6 : lm3s_adc.h
  • ADC_DCRIC_DCINT7 : lm3s_adc.h
  • ADC_DCRIC_DCTRIG0 : lm3s_adc.h
  • ADC_DCRIC_DCTRIG1 : lm3s_adc.h
  • ADC_DCRIC_DCTRIG2 : lm3s_adc.h
  • ADC_DCRIC_DCTRIG3 : lm3s_adc.h
  • ADC_DCRIC_DCTRIG4 : lm3s_adc.h
  • ADC_DCRIC_DCTRIG5 : lm3s_adc.h
  • ADC_DCRIC_DCTRIG6 : lm3s_adc.h
  • ADC_DCRIC_DCTRIG7 : lm3s_adc.h
  • ADC_DRDY : at91_adc.h , sam3_adc.h
  • ADC_EMUX_EM0_ALWAYS : lm3s_adc.h
  • ADC_EMUX_EM0_COMP0 : lm3s_adc.h
  • ADC_EMUX_EM0_COMP1 : lm3s_adc.h
  • ADC_EMUX_EM0_COMP2 : lm3s_adc.h
  • ADC_EMUX_EM0_EXTERNAL : lm3s_adc.h
  • ADC_EMUX_EM0_M : lm3s_adc.h
  • ADC_EMUX_EM0_PROCESSOR : lm3s_adc.h
  • ADC_EMUX_EM0_PWM0 : lm3s_adc.h
  • ADC_EMUX_EM0_PWM1 : lm3s_adc.h
  • ADC_EMUX_EM0_PWM2 : lm3s_adc.h
  • ADC_EMUX_EM0_PWM3 : lm3s_adc.h
  • ADC_EMUX_EM0_TIMER : lm3s_adc.h
  • ADC_EMUX_EM1_ALWAYS : lm3s_adc.h
  • ADC_EMUX_EM1_COMP0 : lm3s_adc.h
  • ADC_EMUX_EM1_COMP1 : lm3s_adc.h
  • ADC_EMUX_EM1_COMP2 : lm3s_adc.h
  • ADC_EMUX_EM1_EXTERNAL : lm3s_adc.h
  • ADC_EMUX_EM1_M : lm3s_adc.h
  • ADC_EMUX_EM1_PROCESSOR : lm3s_adc.h
  • ADC_EMUX_EM1_PWM0 : lm3s_adc.h
  • ADC_EMUX_EM1_PWM1 : lm3s_adc.h
  • ADC_EMUX_EM1_PWM2 : lm3s_adc.h
  • ADC_EMUX_EM1_PWM3 : lm3s_adc.h
  • ADC_EMUX_EM1_TIMER : lm3s_adc.h
  • ADC_EMUX_EM2_ALWAYS : lm3s_adc.h
  • ADC_EMUX_EM2_COMP0 : lm3s_adc.h
  • ADC_EMUX_EM2_COMP1 : lm3s_adc.h
  • ADC_EMUX_EM2_COMP2 : lm3s_adc.h
  • ADC_EMUX_EM2_EXTERNAL : lm3s_adc.h
  • ADC_EMUX_EM2_M : lm3s_adc.h
  • ADC_EMUX_EM2_PROCESSOR : lm3s_adc.h
  • ADC_EMUX_EM2_PWM0 : lm3s_adc.h
  • ADC_EMUX_EM2_PWM1 : lm3s_adc.h
  • ADC_EMUX_EM2_PWM2 : lm3s_adc.h
  • ADC_EMUX_EM2_PWM3 : lm3s_adc.h
  • ADC_EMUX_EM2_TIMER : lm3s_adc.h
  • ADC_EMUX_EM3_ALWAYS : lm3s_adc.h
  • ADC_EMUX_EM3_COMP0 : lm3s_adc.h
  • ADC_EMUX_EM3_COMP1 : lm3s_adc.h
  • ADC_EMUX_EM3_COMP2 : lm3s_adc.h
  • ADC_EMUX_EM3_EXTERNAL : lm3s_adc.h
  • ADC_EMUX_EM3_M : lm3s_adc.h
  • ADC_EMUX_EM3_PROCESSOR : lm3s_adc.h
  • ADC_EMUX_EM3_PWM0 : lm3s_adc.h
  • ADC_EMUX_EM3_PWM1 : lm3s_adc.h
  • ADC_EMUX_EM3_PWM2 : lm3s_adc.h
  • ADC_EMUX_EM3_PWM3 : lm3s_adc.h
  • ADC_EMUX_EM3_TIMER : lm3s_adc.h
  • ADC_EMUX_R : lm3s_com.h
  • ADC_ENDRX : at91_adc.h , sam3_adc.h
  • ADC_EOC0 : at91_adc.h , sam3_adc.h
  • ADC_EOC1 : at91_adc.h , sam3_adc.h
  • ADC_EOC2 : at91_adc.h , sam3_adc.h
  • ADC_EOC3 : at91_adc.h , sam3_adc.h
  • ADC_EOC4 : at91_adc.h , sam3_adc.h
  • ADC_EOC5 : at91_adc.h , sam3_adc.h
  • ADC_EOC6 : at91_adc.h , sam3_adc.h
  • ADC_EOC7 : at91_adc.h , sam3_adc.h
  • ADC_EOC_MASK : at91_adc.h , sam3_adc.h
  • ADC_FREERUN : sam3_adc.h
  • ADC_GOVRE : at91_adc.h , sam3_adc.h
  • ADC_IDR : at91_adc.h , sam3_adc.h
  • ADC_IDR_OFF : at91_adc.h , sam3_adc.h
  • ADC_IER : at91_adc.h , sam3_adc.h
  • ADC_IER_OFF : at91_adc.h , sam3_adc.h
  • ADC_IM_DCONSS0 : lm3s_adc.h
  • ADC_IM_DCONSS1 : lm3s_adc.h
  • ADC_IM_DCONSS2 : lm3s_adc.h
  • ADC_IM_DCONSS3 : lm3s_adc.h
  • ADC_IM_MASK0 : lm3s_adc.h
  • ADC_IM_MASK1 : lm3s_adc.h
  • ADC_IM_MASK2 : lm3s_adc.h
  • ADC_IM_MASK3 : lm3s_adc.h
  • ADC_IM_R : lm3s_com.h
  • ADC_IMR : at91_adc.h , sam3_adc.h
  • ADC_IMR_OFF : at91_adc.h , sam3_adc.h
  • ADC_INIT_PINS : adc_at91.h , adc_lm3s.h , adc_stm32.h
  • ADC_IRQHANDLER : stm32_ints.h
  • ADC_ISC_DCINSS0 : lm3s_adc.h
  • ADC_ISC_DCINSS1 : lm3s_adc.h
  • ADC_ISC_DCINSS2 : lm3s_adc.h
  • ADC_ISC_DCINSS3 : lm3s_adc.h
  • ADC_ISC_IN0 : lm3s_adc.h
  • ADC_ISC_IN1 : lm3s_adc.h
  • ADC_ISC_IN2 : lm3s_adc.h
  • ADC_ISC_IN3 : lm3s_adc.h
  • ADC_ISC_R : lm3s_com.h
  • ADC_ISR : sam3_adc.h
  • ADC_ISR_OFF : sam3_adc.h
  • ADC_LCDR : at91_adc.h , sam3_adc.h
  • ADC_LCDR_OFF : at91_adc.h , sam3_adc.h
  • ADC_LDATA : sam3_adc.h
  • ADC_LOG_FORMAT : cfg_adc.h
  • ADC_LOG_LEVEL : cfg_adc.h
  • ADC_LOWRES : at91_adc.h , sam3_adc.h
  • ADC_MR : at91_adc.h , sam3_adc.h
  • ADC_MR_OFF : at91_adc.h , sam3_adc.h
  • ADC_MUX_MAXCH : adc_at91.h , adc_sam3.h , adc_stm32.h
  • ADC_O_ACTSS : lm3s_adc.h
  • ADC_O_CTL : lm3s_adc.h
  • ADC_O_DCCMP0 : lm3s_adc.h
  • ADC_O_DCCMP1 : lm3s_adc.h
  • ADC_O_DCCMP2 : lm3s_adc.h
  • ADC_O_DCCMP3 : lm3s_adc.h
  • ADC_O_DCCMP4 : lm3s_adc.h
  • ADC_O_DCCMP5 : lm3s_adc.h
  • ADC_O_DCCMP6 : lm3s_adc.h
  • ADC_O_DCCMP7 : lm3s_adc.h
  • ADC_O_DCCTL0 : lm3s_adc.h
  • ADC_O_DCCTL1 : lm3s_adc.h
  • ADC_O_DCCTL2 : lm3s_adc.h
  • ADC_O_DCCTL3 : lm3s_adc.h
  • ADC_O_DCCTL4 : lm3s_adc.h
  • ADC_O_DCCTL5 : lm3s_adc.h
  • ADC_O_DCCTL6 : lm3s_adc.h
  • ADC_O_DCCTL7 : lm3s_adc.h
  • ADC_O_DCISC : lm3s_adc.h
  • ADC_O_DCRIC : lm3s_adc.h
  • ADC_O_EMUX : lm3s_adc.h
  • ADC_O_IM : lm3s_adc.h
  • ADC_O_ISC : lm3s_adc.h
  • ADC_O_OSTAT : lm3s_adc.h
  • ADC_O_PSSI : lm3s_adc.h
  • ADC_O_RIS : lm3s_adc.h
  • ADC_O_SAC : lm3s_adc.h
  • ADC_O_SPC : lm3s_adc.h
  • ADC_O_SSCTL0 : lm3s_adc.h
  • ADC_O_SSCTL1 : lm3s_adc.h
  • ADC_O_SSCTL2 : lm3s_adc.h
  • ADC_O_SSCTL3 : lm3s_adc.h
  • ADC_O_SSDC0 : lm3s_adc.h
  • ADC_O_SSDC1 : lm3s_adc.h
  • ADC_O_SSDC2 : lm3s_adc.h
  • ADC_O_SSDC3 : lm3s_adc.h
  • ADC_O_SSFIFO0 : lm3s_adc.h
  • ADC_O_SSFIFO1 : lm3s_adc.h
  • ADC_O_SSFIFO2 : lm3s_adc.h
  • ADC_O_SSFIFO3 : lm3s_adc.h
  • ADC_O_SSFSTAT0 : lm3s_adc.h
  • ADC_O_SSFSTAT1 : lm3s_adc.h
  • ADC_O_SSFSTAT2 : lm3s_adc.h
  • ADC_O_SSFSTAT3 : lm3s_adc.h
  • ADC_O_SSMUX0 : lm3s_adc.h
  • ADC_O_SSMUX1 : lm3s_adc.h
  • ADC_O_SSMUX2 : lm3s_adc.h
  • ADC_O_SSMUX3 : lm3s_adc.h
  • ADC_O_SSOP0 : lm3s_adc.h
  • ADC_O_SSOP1 : lm3s_adc.h
  • ADC_O_SSOP2 : lm3s_adc.h
  • ADC_O_SSOP3 : lm3s_adc.h
  • ADC_O_SSPRI : lm3s_adc.h
  • ADC_O_TMLB : lm3s_adc.h
  • ADC_O_USTAT : lm3s_adc.h
  • ADC_OSTAT_OV0 : lm3s_adc.h
  • ADC_OSTAT_OV1 : lm3s_adc.h
  • ADC_OSTAT_OV2 : lm3s_adc.h
  • ADC_OSTAT_OV3 : lm3s_adc.h
  • ADC_OSTAT_R : lm3s_com.h
  • ADC_OVRE0 : at91_adc.h , sam3_adc.h
  • ADC_OVRE1 : at91_adc.h , sam3_adc.h
  • ADC_OVRE2 : at91_adc.h , sam3_adc.h
  • ADC_OVRE3 : at91_adc.h , sam3_adc.h
  • ADC_OVRE4 : at91_adc.h , sam3_adc.h
  • ADC_OVRE5 : at91_adc.h , sam3_adc.h
  • ADC_OVRE6 : at91_adc.h , sam3_adc.h
  • ADC_OVRE7 : at91_adc.h , sam3_adc.h
  • ADC_PRESCALER : adc_sam3.h
  • ADC_PRESCALER_MASK : at91_adc.h , sam3_adc.h
  • ADC_PRESCALER_SHIFT : at91_adc.h , sam3_adc.h
  • ADC_PSSI_GSYNC : lm3s_adc.h
  • ADC_PSSI_R : lm3s_com.h
  • ADC_PSSI_SS0 : lm3s_adc.h
  • ADC_PSSI_SS1 : lm3s_adc.h
  • ADC_PSSI_SS2 : lm3s_adc.h
  • ADC_PSSI_SS3 : lm3s_adc.h
  • ADC_PSSI_SYNCWAIT : lm3s_adc.h
  • ADC_RANGECONV : adc.h
  • ADC_RIS_INR0 : lm3s_adc.h
  • ADC_RIS_INR1 : lm3s_adc.h
  • ADC_RIS_INR2 : lm3s_adc.h
  • ADC_RIS_INR3 : lm3s_adc.h
  • ADC_RIS_INRDC : lm3s_adc.h
  • ADC_RIS_R : lm3s_com.h
  • ADC_RXBUFF : at91_adc.h , sam3_adc.h
  • ADC_SAC_AVG_16X : lm3s_adc.h
  • ADC_SAC_AVG_2X : lm3s_adc.h
  • ADC_SAC_AVG_32X : lm3s_adc.h
  • ADC_SAC_AVG_4X : lm3s_adc.h
  • ADC_SAC_AVG_64X : lm3s_adc.h
  • ADC_SAC_AVG_8X : lm3s_adc.h
  • ADC_SAC_AVG_M : lm3s_adc.h
  • ADC_SAC_AVG_OFF : lm3s_adc.h
  • ADC_SAC_R : lm3s_com.h
  • ADC_SETTLING_MASK : sam3_adc.h
  • ADC_SETTLING_SHIFT : sam3_adc.h
  • ADC_SHTIME_MASK : at91_adc.h
  • ADC_SHTIME_SHIFT : at91_adc.h
  • ADC_SLEEP : at91_adc.h , sam3_adc.h
  • ADC_SPC_PHASE_0 : lm3s_adc.h
  • ADC_SPC_PHASE_112_5 : lm3s_adc.h
  • ADC_SPC_PHASE_135 : lm3s_adc.h
  • ADC_SPC_PHASE_157_5 : lm3s_adc.h
  • ADC_SPC_PHASE_180 : lm3s_adc.h
  • ADC_SPC_PHASE_202_5 : lm3s_adc.h
  • ADC_SPC_PHASE_225 : lm3s_adc.h
  • ADC_SPC_PHASE_22_5 : lm3s_adc.h
  • ADC_SPC_PHASE_247_5 : lm3s_adc.h
  • ADC_SPC_PHASE_270 : lm3s_adc.h
  • ADC_SPC_PHASE_292_5 : lm3s_adc.h
  • ADC_SPC_PHASE_315 : lm3s_adc.h
  • ADC_SPC_PHASE_337_5 : lm3s_adc.h
  • ADC_SPC_PHASE_45 : lm3s_adc.h
  • ADC_SPC_PHASE_67_5 : lm3s_adc.h
  • ADC_SPC_PHASE_90 : lm3s_adc.h
  • ADC_SPC_PHASE_M : lm3s_adc.h
  • ADC_SR : at91_adc.h , sam3_adc.h
  • ADC_SR_OFF : sam3_adc.h , at91_adc.h
  • ADC_SSCTL0_D0 : lm3s_adc.h
  • ADC_SSCTL0_D1 : lm3s_adc.h
  • ADC_SSCTL0_D2 : lm3s_adc.h
  • ADC_SSCTL0_D3 : lm3s_adc.h
  • ADC_SSCTL0_D4 : lm3s_adc.h
  • ADC_SSCTL0_D5 : lm3s_adc.h
  • ADC_SSCTL0_D6 : lm3s_adc.h
  • ADC_SSCTL0_D7 : lm3s_adc.h
  • ADC_SSCTL0_END0 : lm3s_adc.h
  • ADC_SSCTL0_END1 : lm3s_adc.h
  • ADC_SSCTL0_END2 : lm3s_adc.h
  • ADC_SSCTL0_END3 : lm3s_adc.h
  • ADC_SSCTL0_END4 : lm3s_adc.h
  • ADC_SSCTL0_END5 : lm3s_adc.h
  • ADC_SSCTL0_END6 : lm3s_adc.h
  • ADC_SSCTL0_END7 : lm3s_adc.h
  • ADC_SSCTL0_IE0 : lm3s_adc.h
  • ADC_SSCTL0_IE1 : lm3s_adc.h
  • ADC_SSCTL0_IE2 : lm3s_adc.h
  • ADC_SSCTL0_IE3 : lm3s_adc.h
  • ADC_SSCTL0_IE4 : lm3s_adc.h
  • ADC_SSCTL0_IE5 : lm3s_adc.h
  • ADC_SSCTL0_IE6 : lm3s_adc.h
  • ADC_SSCTL0_IE7 : lm3s_adc.h
  • ADC_SSCTL0_R : lm3s_com.h
  • ADC_SSCTL0_TS0 : lm3s_adc.h
  • ADC_SSCTL0_TS1 : lm3s_adc.h
  • ADC_SSCTL0_TS2 : lm3s_adc.h
  • ADC_SSCTL0_TS3 : lm3s_adc.h
  • ADC_SSCTL0_TS4 : lm3s_adc.h
  • ADC_SSCTL0_TS5 : lm3s_adc.h
  • ADC_SSCTL0_TS6 : lm3s_adc.h
  • ADC_SSCTL0_TS7 : lm3s_adc.h
  • ADC_SSCTL1_D0 : lm3s_adc.h
  • ADC_SSCTL1_D1 : lm3s_adc.h
  • ADC_SSCTL1_D2 : lm3s_adc.h
  • ADC_SSCTL1_D3 : lm3s_adc.h
  • ADC_SSCTL1_END0 : lm3s_adc.h
  • ADC_SSCTL1_END1 : lm3s_adc.h
  • ADC_SSCTL1_END2 : lm3s_adc.h
  • ADC_SSCTL1_END3 : lm3s_adc.h
  • ADC_SSCTL1_IE0 : lm3s_adc.h
  • ADC_SSCTL1_IE1 : lm3s_adc.h
  • ADC_SSCTL1_IE2 : lm3s_adc.h
  • ADC_SSCTL1_IE3 : lm3s_adc.h
  • ADC_SSCTL1_R : lm3s_com.h
  • ADC_SSCTL1_TS0 : lm3s_adc.h
  • ADC_SSCTL1_TS1 : lm3s_adc.h
  • ADC_SSCTL1_TS2 : lm3s_adc.h
  • ADC_SSCTL1_TS3 : lm3s_adc.h
  • ADC_SSCTL2_D0 : lm3s_adc.h
  • ADC_SSCTL2_D1 : lm3s_adc.h
  • ADC_SSCTL2_D2 : lm3s_adc.h
  • ADC_SSCTL2_D3 : lm3s_adc.h
  • ADC_SSCTL2_END0 : lm3s_adc.h
  • ADC_SSCTL2_END1 : lm3s_adc.h
  • ADC_SSCTL2_END2 : lm3s_adc.h
  • ADC_SSCTL2_END3 : lm3s_adc.h
  • ADC_SSCTL2_IE0 : lm3s_adc.h
  • ADC_SSCTL2_IE1 : lm3s_adc.h
  • ADC_SSCTL2_IE2 : lm3s_adc.h
  • ADC_SSCTL2_IE3 : lm3s_adc.h
  • ADC_SSCTL2_R : lm3s_com.h
  • ADC_SSCTL2_TS0 : lm3s_adc.h
  • ADC_SSCTL2_TS1 : lm3s_adc.h
  • ADC_SSCTL2_TS2 : lm3s_adc.h
  • ADC_SSCTL2_TS3 : lm3s_adc.h
  • ADC_SSCTL3_D0 : lm3s_adc.h
  • ADC_SSCTL3_END0 : lm3s_adc.h
  • ADC_SSCTL3_IE0 : lm3s_adc.h
  • ADC_SSCTL3_R : lm3s_com.h
  • ADC_SSCTL3_TS0 : lm3s_adc.h
  • ADC_SSDC0_S0DCSEL_M : lm3s_adc.h
  • ADC_SSDC0_S1DCSEL_M : lm3s_adc.h
  • ADC_SSDC0_S2DCSEL_M : lm3s_adc.h
  • ADC_SSDC0_S3DCSEL_M : lm3s_adc.h
  • ADC_SSDC0_S4DCSEL_M : lm3s_adc.h
  • ADC_SSDC0_S5DCSEL_M : lm3s_adc.h
  • ADC_SSDC0_S6DCSEL_M : lm3s_adc.h
  • ADC_SSDC0_S7DCSEL_M : lm3s_adc.h
  • ADC_SSDC1_S0DCSEL_M : lm3s_adc.h
  • ADC_SSDC1_S1DCSEL_M : lm3s_adc.h
  • ADC_SSDC1_S2DCSEL_M : lm3s_adc.h
  • ADC_SSDC1_S3DCSEL_M : lm3s_adc.h
  • ADC_SSDC2_S0DCSEL_M : lm3s_adc.h
  • ADC_SSDC2_S1DCSEL_M : lm3s_adc.h
  • ADC_SSDC2_S2DCSEL_M : lm3s_adc.h
  • ADC_SSDC2_S3DCSEL_M : lm3s_adc.h
  • ADC_SSDC3_S0DCSEL_M : lm3s_adc.h
  • ADC_SSFIFO0_DATA_M : lm3s_adc.h
  • ADC_SSFIFO0_DATA_S : lm3s_adc.h
  • ADC_SSFIFO0_R : lm3s_com.h
  • ADC_SSFIFO1_DATA_M : lm3s_adc.h
  • ADC_SSFIFO1_DATA_S : lm3s_adc.h
  • ADC_SSFIFO1_R : lm3s_com.h
  • ADC_SSFIFO2_DATA_M : lm3s_adc.h
  • ADC_SSFIFO2_DATA_S : lm3s_adc.h
  • ADC_SSFIFO2_R : lm3s_com.h
  • ADC_SSFIFO3_DATA_M : lm3s_adc.h
  • ADC_SSFIFO3_DATA_S : lm3s_adc.h
  • ADC_SSFIFO3_R : lm3s_com.h
  • ADC_SSFIFO_TMLB_CNT_M : lm3s_adc.h
  • ADC_SSFIFO_TMLB_CNT_S : lm3s_adc.h
  • ADC_SSFIFO_TMLB_CONT : lm3s_adc.h
  • ADC_SSFIFO_TMLB_DIFF : lm3s_adc.h
  • ADC_SSFIFO_TMLB_MUX_M : lm3s_adc.h
  • ADC_SSFIFO_TMLB_MUX_S : lm3s_adc.h
  • ADC_SSFIFO_TMLB_TS : lm3s_adc.h
  • ADC_SSFSTAT0_EMPTY : lm3s_adc.h
  • ADC_SSFSTAT0_FULL : lm3s_adc.h
  • ADC_SSFSTAT0_HPTR_M : lm3s_adc.h
  • ADC_SSFSTAT0_HPTR_S : lm3s_adc.h
  • ADC_SSFSTAT0_R : lm3s_com.h
  • ADC_SSFSTAT0_TPTR_M : lm3s_adc.h
  • ADC_SSFSTAT0_TPTR_S : lm3s_adc.h
  • ADC_SSFSTAT1_EMPTY : lm3s_adc.h
  • ADC_SSFSTAT1_FULL : lm3s_adc.h
  • ADC_SSFSTAT1_HPTR_M : lm3s_adc.h
  • ADC_SSFSTAT1_HPTR_S : lm3s_adc.h
  • ADC_SSFSTAT1_R : lm3s_com.h
  • ADC_SSFSTAT1_TPTR_M : lm3s_adc.h
  • ADC_SSFSTAT1_TPTR_S : lm3s_adc.h
  • ADC_SSFSTAT2_EMPTY : lm3s_adc.h
  • ADC_SSFSTAT2_FULL : lm3s_adc.h
  • ADC_SSFSTAT2_HPTR_M : lm3s_adc.h
  • ADC_SSFSTAT2_HPTR_S : lm3s_adc.h
  • ADC_SSFSTAT2_R : lm3s_com.h
  • ADC_SSFSTAT2_TPTR_M : lm3s_adc.h
  • ADC_SSFSTAT2_TPTR_S : lm3s_adc.h
  • ADC_SSFSTAT3_EMPTY : lm3s_adc.h
  • ADC_SSFSTAT3_FULL : lm3s_adc.h
  • ADC_SSFSTAT3_HPTR_M : lm3s_adc.h
  • ADC_SSFSTAT3_HPTR_S : lm3s_adc.h
  • ADC_SSFSTAT3_R : lm3s_com.h
  • ADC_SSFSTAT3_TPTR_M : lm3s_adc.h
  • ADC_SSFSTAT3_TPTR_S : lm3s_adc.h
  • ADC_SSMUX0_MUX0_M : lm3s_adc.h
  • ADC_SSMUX0_MUX0_S : lm3s_adc.h
  • ADC_SSMUX0_MUX1_M : lm3s_adc.h
  • ADC_SSMUX0_MUX1_S : lm3s_adc.h
  • ADC_SSMUX0_MUX2_M : lm3s_adc.h
  • ADC_SSMUX0_MUX2_S : lm3s_adc.h
  • ADC_SSMUX0_MUX3_M : lm3s_adc.h
  • ADC_SSMUX0_MUX3_S : lm3s_adc.h
  • ADC_SSMUX0_MUX4_M : lm3s_adc.h
  • ADC_SSMUX0_MUX4_S : lm3s_adc.h
  • ADC_SSMUX0_MUX5_M : lm3s_adc.h
  • ADC_SSMUX0_MUX5_S : lm3s_adc.h
  • ADC_SSMUX0_MUX6_M : lm3s_adc.h
  • ADC_SSMUX0_MUX6_S : lm3s_adc.h
  • ADC_SSMUX0_MUX7_M : lm3s_adc.h
  • ADC_SSMUX0_MUX7_S : lm3s_adc.h
  • ADC_SSMUX0_R : lm3s_com.h
  • ADC_SSMUX1_MUX0_M : lm3s_adc.h
  • ADC_SSMUX1_MUX0_S : lm3s_adc.h
  • ADC_SSMUX1_MUX1_M : lm3s_adc.h
  • ADC_SSMUX1_MUX1_S : lm3s_adc.h
  • ADC_SSMUX1_MUX2_M : lm3s_adc.h
  • ADC_SSMUX1_MUX2_S : lm3s_adc.h
  • ADC_SSMUX1_MUX3_M : lm3s_adc.h
  • ADC_SSMUX1_MUX3_S : lm3s_adc.h
  • ADC_SSMUX1_R : lm3s_com.h
  • ADC_SSMUX2_MUX0_M : lm3s_adc.h
  • ADC_SSMUX2_MUX1_M : lm3s_adc.h
  • ADC_SSMUX2_MUX2_M : lm3s_adc.h
  • ADC_SSMUX2_MUX3_M : lm3s_adc.h
  • ADC_SSMUX2_R : lm3s_com.h
  • ADC_SSMUX3_MUX0_M : lm3s_adc.h
  • ADC_SSMUX3_R : lm3s_com.h
  • ADC_SSOP0_S0DCOP : lm3s_adc.h
  • ADC_SSOP0_S1DCOP : lm3s_adc.h
  • ADC_SSOP0_S2DCOP : lm3s_adc.h
  • ADC_SSOP0_S3DCOP : lm3s_adc.h
  • ADC_SSOP0_S4DCOP : lm3s_adc.h
  • ADC_SSOP0_S5DCOP : lm3s_adc.h
  • ADC_SSOP0_S6DCOP : lm3s_adc.h
  • ADC_SSOP0_S7DCOP : lm3s_adc.h
  • ADC_SSOP1_S0DCOP : lm3s_adc.h
  • ADC_SSOP1_S1DCOP : lm3s_adc.h
  • ADC_SSOP1_S2DCOP : lm3s_adc.h
  • ADC_SSOP1_S3DCOP : lm3s_adc.h
  • ADC_SSOP2_S0DCOP : lm3s_adc.h
  • ADC_SSOP2_S1DCOP : lm3s_adc.h
  • ADC_SSOP2_S2DCOP : lm3s_adc.h
  • ADC_SSOP2_S3DCOP : lm3s_adc.h
  • ADC_SSOP3_S0DCOP : lm3s_adc.h
  • ADC_SSPRI_R : lm3s_com.h
  • ADC_SSPRI_SS0_1ST : lm3s_adc.h
  • ADC_SSPRI_SS0_2ND : lm3s_adc.h
  • ADC_SSPRI_SS0_3RD : lm3s_adc.h
  • ADC_SSPRI_SS0_4TH : lm3s_adc.h
  • ADC_SSPRI_SS0_M : lm3s_adc.h
  • ADC_SSPRI_SS1_1ST : lm3s_adc.h
  • ADC_SSPRI_SS1_2ND : lm3s_adc.h
  • ADC_SSPRI_SS1_3RD : lm3s_adc.h
  • ADC_SSPRI_SS1_4TH : lm3s_adc.h
  • ADC_SSPRI_SS1_M : lm3s_adc.h
  • ADC_SSPRI_SS2_1ST : lm3s_adc.h
  • ADC_SSPRI_SS2_2ND : lm3s_adc.h
  • ADC_SSPRI_SS2_3RD : lm3s_adc.h
  • ADC_SSPRI_SS2_4TH : lm3s_adc.h
  • ADC_SSPRI_SS2_M : lm3s_adc.h
  • ADC_SSPRI_SS3_1ST : lm3s_adc.h
  • ADC_SSPRI_SS3_2ND : lm3s_adc.h
  • ADC_SSPRI_SS3_3RD : lm3s_adc.h
  • ADC_SSPRI_SS3_4TH : lm3s_adc.h
  • ADC_SSPRI_SS3_M : lm3s_adc.h
  • ADC_START : at91_adc.h , sam3_adc.h
  • ADC_STARTUP_MASK : at91_adc.h , sam3_adc.h
  • ADC_STARTUP_SHIFT : at91_adc.h , sam3_adc.h
  • ADC_SUT0 : sam3_adc.h
  • ADC_SUT112 : sam3_adc.h
  • ADC_SUT16 : sam3_adc.h
  • ADC_SUT24 : sam3_adc.h
  • ADC_SUT512 : sam3_adc.h
  • ADC_SUT576 : sam3_adc.h
  • ADC_SUT64 : sam3_adc.h
  • ADC_SUT640 : sam3_adc.h
  • ADC_SUT704 : sam3_adc.h
  • ADC_SUT768 : sam3_adc.h
  • ADC_SUT8 : sam3_adc.h
  • ADC_SUT80 : sam3_adc.h
  • ADC_SUT832 : sam3_adc.h
  • ADC_SUT896 : sam3_adc.h
  • ADC_SUT96 : sam3_adc.h
  • ADC_SUT960 : sam3_adc.h
  • ADC_SWRST : at91_adc.h , sam3_adc.h
  • ADC_TEMPERATURE_CH : sam3_adc.h
  • ADC_TMLB_CNT_M : lm3s_com.h
  • ADC_TMLB_CNT_S : lm3s_com.h
  • ADC_TMLB_CONT : lm3s_com.h
  • ADC_TMLB_DIFF : lm3s_com.h
  • ADC_TMLB_LB : lm3s_adc.h
  • ADC_TMLB_MUX_M : lm3s_com.h
  • ADC_TMLB_MUX_S : lm3s_com.h
  • ADC_TMLB_R : lm3s_com.h
  • ADC_TMLB_TS : lm3s_com.h
  • ADC_TRACKTIM_MASK : sam3_adc.h
  • ADC_TRACKTIM_SHIFT : sam3_adc.h
  • ADC_TRANSFER_MASK : sam3_adc.h
  • ADC_TRANSFER_SHIFT : sam3_adc.h
  • ADC_TRGEN : at91_adc.h , sam3_adc.h
  • ADC_TRGSEL_EXT : at91_adc.h
  • ADC_TRGSEL_PWM0 : sam3_adc.h
  • ADC_TRGSEL_PWM1 : sam3_adc.h
  • ADC_TRGSEL_TIOA0 : at91_adc.h , sam3_adc.h
  • ADC_TRGSEL_TIOA1 : at91_adc.h , sam3_adc.h
  • ADC_TRGSEL_TIOA2 : sam3_adc.h , at91_adc.h
  • ADC_TSON : sam3_adc.h
  • ADC_USTAT_R : lm3s_com.h
  • ADC_USTAT_UV0 : lm3s_adc.h
  • ADC_USTAT_UV1 : lm3s_adc.h
  • ADC_USTAT_UV2 : lm3s_adc.h
  • ADC_USTAT_UV3 : lm3s_adc.h
  • ADDHEAD : list.h
  • ADDTAIL : list.h
  • AFSK_ADC_INIT : hw_afsk.h
  • AFSK_DAC_INIT : hw_afsk.h
  • AFSK_DAC_IRQ_START : hw_afsk.h
  • AFSK_DAC_IRQ_STOP : hw_afsk.h
  • AFSK_LOG_FORMAT : cfg_afsk.h
  • AFSK_LOG_LEVEL : cfg_afsk.h
  • AFSK_RXFIFO_OVERRUN : afsk.h
  • AIC_CISR : at91_aic.h
  • AIC_CISR_OFF : at91_aic.h
  • AIC_DCR : at91_aic.h
  • AIC_DCR_OFF : at91_aic.h
  • AIC_EOICR : at91_aic.h
  • AIC_EOICR_OFF : at91_aic.h
  • AIC_FFDR : at91_aic.h
  • AIC_FFDR_OFF : at91_aic.h
  • AIC_FFER : at91_aic.h
  • AIC_FFER_OFF : at91_aic.h
  • AIC_FFSR : at91_aic.h
  • AIC_FFSR_OFF : at91_aic.h
  • AIC_FVR : at91_aic.h
  • AIC_FVR_OFF : at91_aic.h
  • AIC_ICCR : at91_aic.h
  • AIC_ICCR_OFF : at91_aic.h
  • AIC_IDCR : at91_aic.h
  • AIC_IDCR_OFF : at91_aic.h
  • AIC_IECR : at91_aic.h
  • AIC_IECR_OFF : at91_aic.h
  • AIC_IMR : at91_aic.h
  • AIC_IMR_OFF : at91_aic.h
  • AIC_IPR : at91_aic.h
  • AIC_IPR_OFF : at91_aic.h
  • AIC_IRQID_MASK : at91_aic.h
  • AIC_ISCR : at91_aic.h
  • AIC_ISCR_OFF : at91_aic.h
  • AIC_ISR : at91_aic.h
  • AIC_ISR_OFF : at91_aic.h
  • AIC_IVR : at91_aic.h
  • AIC_IVR_OFF : at91_aic.h
  • AIC_NFIQ : at91_aic.h
  • AIC_NIRQ : at91_aic.h
  • AIC_PRIOR_MASK : at91_aic.h
  • AIC_SMR : at91_aic.h
  • AIC_SPU : at91_aic.h
  • AIC_SPU_OFF : at91_aic.h
  • AIC_SRCTYPE_EXT_HIGH_LEVEL : at91_aic.h
  • AIC_SRCTYPE_EXT_LOW_LEVEL : at91_aic.h
  • AIC_SRCTYPE_EXT_NEGATIVE_EDGE : at91_aic.h
  • AIC_SRCTYPE_EXT_POSITIVE_EDGE : at91_aic.h
  • AIC_SRCTYPE_INT_EDGE_TRIGGERED : at91_aic.h
  • AIC_SRCTYPE_INT_LEVEL_SENSITIVE : at91_aic.h
  • AIC_SRCTYPE_MASK : at91_aic.h
  • AIC_SVR : at91_aic.h
  • ALIGN_UP : macros.h
  • alignof : compiler.h
  • ANSI_ESC_CLEARSCREEN : text.h
  • API_LIB_DEBUG : cfg_lwip.h
  • API_MSG_DEBUG : cfg_lwip.h
  • ARCH_DEFAULT : cfg_arch.h
  • ARCH_EMUL : cfg_arch.h
  • ARCH_NIGHTTEST : cfg_arch.h
  • ARCH_QT : cfg_arch.h
  • ARCH_UNITTEST : cfg_arch.h
  • ARP_QUEUEING : cfg_lwip.h
  • ARP_TABLE_SIZE : cfg_lwip.h
  • ASSERT : debug.h
  • ASSERT2 : debug.h
  • ASSERT_VALID_OBJ : debug.h
  • ASSERT_VALID_PTR : debug.h
  • ASSERT_VALID_PTR_OR_NULL : debug.h
  • ATOMIC : cpu/irq.h
  • AUTOIP_DEBUG : cfg_lwip.h
  • AX25_CALL : ax25.h
  • AX25_CRC_CORRECT : ax25.h
  • AX25_LOG_FORMAT : cfg_ax25.h
  • AX25_LOG_LEVEL : cfg_ax25.h
  • AX25_MAX_RPT : ax25.h
  • AX25_MIN_FRAME_LEN : ax25.h
  • AX25_PATH : ax25.h
  • ax25_send : ax25.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- b -

  • BATTFS_CREATE : battfs.h
  • BATTFS_DISK_FLUSHBUF_ERR : battfs.h
  • BATTFS_DISK_READ_ERR : battfs.h
  • BATTFS_DISK_SPACEOVER_ERR : battfs.h
  • BATTFS_DISK_WRITE_ERR : battfs.h
  • BATTFS_FILE_NOT_FOUND_ERR : battfs.h
  • BATTFS_HEADER_LEN : battfs.h
  • BATTFS_LOG_FORMAT : cfg_battfs.h
  • BATTFS_LOG_LEVEL : cfg_battfs.h
  • BATTFS_MAX_FILES : battfs.h
  • BATTFS_NEGATIVE_SEEK_ERR : battfs.h
  • BATTFS_RD : battfs.h
  • BATTFS_WR : battfs.h
  • BDCR_BASE : clock_stm32.h
  • BDCR_BDRST_BB : clock_stm32.h
  • BDCR_OFFSET : clock_stm32.h
  • BDCR_RTCEN_BB : clock_stm32.h
  • BDRST_BITNUMBER : clock_stm32.h
  • BIT_CHANGE : macros.h
  • BIT_CHANGE_BV : macros.h
  • BITARRAY_ALLOC : bitarray.h
  • BITMAP_FMT_PLANAR_H_MSB : gfx.h
  • BITMAP_FMT_PLANAR_V_LSB : gfx.h
  • BITRATE : afsk.h
  • BM_CLEAR : gfx_p.h
  • BM_DRAWPIXEL : gfx_p.h
  • BM_PLOT : gfx_p.h
  • BM_READPIXEL : gfx_p.h
  • BUSY_BIT : dataflash.h
  • BV : macros.h
  • BV16 : macros.h
  • BV32 : macros.h
  • BV8 : macros.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- c -

  • CAN0_BASE : lm3s_memmap.h
  • CAN1_BASE : lm3s_memmap.h
  • CAN2_BASE : lm3s_memmap.h
  • CAN_RX1_IRQHANDLER : stm32_ints.h
  • CAN_SCE_IRQHANDLER : stm32_ints.h
  • CFG_PWM_ENABLE_OLD_API : cfg_pwm.h
  • CFGR_ADCPRE_RESET_MASK : clock_stm32.h
  • CFGR_ADCPRE_SET_MASK : clock_stm32.h
  • CFGR_HPRE_RESET_MASK : clock_stm32.h
  • CFGR_HPRE_SET_MASK : clock_stm32.h
  • CFGR_OFFSET : clock_stm32.h
  • CFGR_PLL_MASK : clock_stm32.h
  • CFGR_PLLMull_MASK : clock_stm32.h
  • CFGR_PLLSRC_MASK : clock_stm32.h
  • CFGR_PLLXTPRE_MASK : clock_stm32.h
  • CFGR_PPRE1_RESET_MASK : clock_stm32.h
  • CFGR_PPRE1_SET_MASK : clock_stm32.h
  • CFGR_PPRE2_RESET_MASK : clock_stm32.h
  • CFGR_PPRE2_SET_MASK : clock_stm32.h
  • CFGR_SW_MASK : clock_stm32.h
  • CFGR_SWS_MASK : clock_stm32.h
  • CFGR_USBPRE_BB : clock_stm32.h
  • CHECKSUM_CHECK_IP : cfg_lwip.h
  • CHECKSUM_CHECK_TCP : cfg_lwip.h
  • CHECKSUM_CHECK_UDP : cfg_lwip.h
  • CHECKSUM_GEN_IP : cfg_lwip.h
  • CHECKSUM_GEN_TCP : cfg_lwip.h
  • CHECKSUM_GEN_UDP : cfg_lwip.h
  • CKGR_DIV_0 : at91_pmc.h
  • CKGR_DIV_BYPASS : at91_pmc.h
  • CKGR_DIV_MASK : at91_pmc.h
  • CKGR_DIV_SHIFT : at91_pmc.h
  • CKGR_MAINF_MASK : at91_pmc.h
  • CKGR_MAINRDY : at91_pmc.h
  • CKGR_MCFR : at91_pmc.h , sam3_pmc.h
  • CKGR_MCFR_MAINF_MASK : sam3_pmc.h
  • CKGR_MCFR_MAINFRDY : sam3_pmc.h
  • CKGR_MCFR_OFF : at91_pmc.h
  • CKGR_MOR : at91_pmc.h , sam3_pmc.h
  • CKGR_MOR_CFDEN : sam3_pmc.h
  • CKGR_MOR_KEY : sam3_pmc.h
  • CKGR_MOR_KEY_MASK : sam3_pmc.h
  • CKGR_MOR_KEY_SHIFT : sam3_pmc.h
  • CKGR_MOR_MOSCRCEN : sam3_pmc.h
  • CKGR_MOR_MOSCRCF : sam3_pmc.h
  • CKGR_MOR_MOSCRCF_12MHZ : sam3_pmc.h
  • CKGR_MOR_MOSCRCF_4MHZ : sam3_pmc.h
  • CKGR_MOR_MOSCRCF_8MHZ : sam3_pmc.h
  • CKGR_MOR_MOSCRCF_MASK : sam3_pmc.h
  • CKGR_MOR_MOSCRCF_SHIFT : sam3_pmc.h
  • CKGR_MOR_MOSCSEL : sam3_pmc.h
  • CKGR_MOR_MOSCXTBY : sam3_pmc.h
  • CKGR_MOR_MOSCXTEN : sam3_pmc.h
  • CKGR_MOR_MOSCXTST : sam3_pmc.h
  • CKGR_MOR_MOSCXTST_MASK : sam3_pmc.h
  • CKGR_MOR_MOSCXTST_SHIFT : sam3_pmc.h
  • CKGR_MOR_OFF : at91_pmc.h
  • CKGR_MOR_WAITMODE : sam3_pmc.h
  • CKGR_MOSCEN : at91_pmc.h
  • CKGR_MUL_MASK : at91_pmc.h
  • CKGR_MUL_SHIFT : at91_pmc.h
  • CKGR_OSCBYPASS : at91_pmc.h
  • CKGR_OSCOUNT_MASK : at91_pmc.h
  • CKGR_OSCOUNT_SHIFT : at91_pmc.h
  • CKGR_OUT_0 : at91_pmc.h
  • CKGR_OUT_1 : at91_pmc.h
  • CKGR_OUT_2 : at91_pmc.h
  • CKGR_OUT_3 : at91_pmc.h
  • CKGR_OUT_MASK : at91_pmc.h
  • CKGR_PLLCOUNT_MASK : at91_pmc.h
  • CKGR_PLLCOUNT_SHIFT : at91_pmc.h
  • CKGR_PLLR : at91_pmc.h
  • CKGR_PLLR_DIV : sam3_pmc.h
  • CKGR_PLLR_DIV_MASK : sam3_pmc.h
  • CKGR_PLLR_MUL : sam3_pmc.h
  • CKGR_PLLR_MUL_MASK : sam3_pmc.h
  • CKGR_PLLR_MUL_SHIFT : sam3_pmc.h
  • CKGR_PLLR_OFF : at91_pmc.h
  • CKGR_PLLR_PLLCOUNT : sam3_pmc.h
  • CKGR_PLLR_PLLCOUNT_MASK : sam3_pmc.h
  • CKGR_PLLR_PLLCOUNT_SHIFT : sam3_pmc.h
  • CKGR_PLLR_STUCKTO1 : sam3_pmc.h
  • CKGR_USBDIV_1 : at91_pmc.h
  • CKGR_USBDIV_2 : at91_pmc.h
  • CKGR_USBDIV_4 : at91_pmc.h
  • CKGR_USBDIV_MASK : at91_pmc.h
  • CLASS_IS_DUSTDEVIL : lm3s_types.h
  • CLASS_IS_FURY : lm3s_types.h
  • CLASS_IS_SANDSTORM : lm3s_types.h
  • CLASS_IS_TEMPEST : lm3s_types.h
  • CLOCKS2TIME : ramp.h
  • CMP_BIT : dataflash.h
  • COMP_ACCTL0_ASRCP_M : lm3s_com.h
  • COMP_ACCTL0_ASRCP_PIN : lm3s_com.h
  • COMP_ACCTL0_ASRCP_PIN0 : lm3s_com.h
  • COMP_ACCTL0_ASRCP_REF : lm3s_com.h
  • COMP_ACCTL0_CINV : lm3s_com.h
  • COMP_ACCTL0_ISEN_BOTH : lm3s_com.h
  • COMP_ACCTL0_ISEN_FALL : lm3s_com.h
  • COMP_ACCTL0_ISEN_LEVEL : lm3s_com.h
  • COMP_ACCTL0_ISEN_M : lm3s_com.h
  • COMP_ACCTL0_ISEN_RISE : lm3s_com.h
  • COMP_ACCTL0_ISLVAL : lm3s_com.h
  • COMP_ACCTL0_R : lm3s_com.h
  • COMP_ACCTL0_TOEN : lm3s_com.h
  • COMP_ACCTL0_TSEN_BOTH : lm3s_com.h
  • COMP_ACCTL0_TSEN_FALL : lm3s_com.h
  • COMP_ACCTL0_TSEN_LEVEL : lm3s_com.h
  • COMP_ACCTL0_TSEN_M : lm3s_com.h
  • COMP_ACCTL0_TSEN_RISE : lm3s_com.h
  • COMP_ACCTL0_TSLVAL : lm3s_com.h
  • COMP_ACCTL1_ASRCP_M : lm3s_com.h
  • COMP_ACCTL1_ASRCP_PIN : lm3s_com.h
  • COMP_ACCTL1_ASRCP_PIN0 : lm3s_com.h
  • COMP_ACCTL1_ASRCP_REF : lm3s_com.h
  • COMP_ACCTL1_CINV : lm3s_com.h
  • COMP_ACCTL1_ISEN_BOTH : lm3s_com.h
  • COMP_ACCTL1_ISEN_FALL : lm3s_com.h
  • COMP_ACCTL1_ISEN_LEVEL : lm3s_com.h
  • COMP_ACCTL1_ISEN_M : lm3s_com.h
  • COMP_ACCTL1_ISEN_RISE : lm3s_com.h
  • COMP_ACCTL1_ISLVAL : lm3s_com.h
  • COMP_ACCTL1_R : lm3s_com.h
  • COMP_ACCTL1_TOEN : lm3s_com.h
  • COMP_ACCTL1_TSEN_BOTH : lm3s_com.h
  • COMP_ACCTL1_TSEN_FALL : lm3s_com.h
  • COMP_ACCTL1_TSEN_LEVEL : lm3s_com.h
  • COMP_ACCTL1_TSEN_M : lm3s_com.h
  • COMP_ACCTL1_TSEN_RISE : lm3s_com.h
  • COMP_ACCTL1_TSLVAL : lm3s_com.h
  • COMP_ACCTL2_ASRCP_M : lm3s_com.h
  • COMP_ACCTL2_ASRCP_PIN : lm3s_com.h
  • COMP_ACCTL2_ASRCP_PIN0 : lm3s_com.h
  • COMP_ACCTL2_ASRCP_REF : lm3s_com.h
  • COMP_ACCTL2_CINV : lm3s_com.h
  • COMP_ACCTL2_ISEN_BOTH : lm3s_com.h
  • COMP_ACCTL2_ISEN_FALL : lm3s_com.h
  • COMP_ACCTL2_ISEN_LEVEL : lm3s_com.h
  • COMP_ACCTL2_ISEN_M : lm3s_com.h
  • COMP_ACCTL2_ISEN_RISE : lm3s_com.h
  • COMP_ACCTL2_ISLVAL : lm3s_com.h
  • COMP_ACCTL2_R : lm3s_com.h
  • COMP_ACCTL2_TOEN : lm3s_com.h
  • COMP_ACCTL2_TSEN_BOTH : lm3s_com.h
  • COMP_ACCTL2_TSEN_FALL : lm3s_com.h
  • COMP_ACCTL2_TSEN_LEVEL : lm3s_com.h
  • COMP_ACCTL2_TSEN_M : lm3s_com.h
  • COMP_ACCTL2_TSEN_RISE : lm3s_com.h
  • COMP_ACCTL2_TSLVAL : lm3s_com.h
  • COMP_ACINTEN_IN0 : lm3s_com.h
  • COMP_ACINTEN_IN1 : lm3s_com.h
  • COMP_ACINTEN_IN2 : lm3s_com.h
  • COMP_ACINTEN_R : lm3s_com.h
  • COMP_ACMIS_IN0 : lm3s_com.h
  • COMP_ACMIS_IN1 : lm3s_com.h
  • COMP_ACMIS_IN2 : lm3s_com.h
  • COMP_ACMIS_R : lm3s_com.h
  • COMP_ACREFCTL_EN : lm3s_com.h
  • COMP_ACREFCTL_R : lm3s_com.h
  • COMP_ACREFCTL_RNG : lm3s_com.h
  • COMP_ACREFCTL_VREF_M : lm3s_com.h
  • COMP_ACREFCTL_VREF_S : lm3s_com.h
  • COMP_ACRIS_IN0 : lm3s_com.h
  • COMP_ACRIS_IN1 : lm3s_com.h
  • COMP_ACRIS_IN2 : lm3s_com.h
  • COMP_ACRIS_R : lm3s_com.h
  • COMP_ACSTAT0_OVAL : lm3s_com.h
  • COMP_ACSTAT0_R : lm3s_com.h
  • COMP_ACSTAT1_OVAL : lm3s_com.h
  • COMP_ACSTAT1_R : lm3s_com.h
  • COMP_ACSTAT2_OVAL : lm3s_com.h
  • COMP_ACSTAT2_R : lm3s_com.h
  • COMP_BASE : lm3s_memmap.h
  • COMPILER_STATEMENT_EXPRESSIONS : compiler.h
  • COMPILER_TYPEOF : compiler.h
  • COMPILER_VARIADIC_MACROS : compiler.h
  • COMPUTE_ARRAY_LEN : md2.h
  • CONFIG_ADC_AVR_DIVISOR : cfg_adc.h
  • CONFIG_ADC_AVR_REF : cfg_adc.h
  • CONFIG_ADC_CLOCK : cfg_adc.h
  • CONFIG_ADC_SHTIME : cfg_adc.h
  • CONFIG_ADC_STARTUP_TIME : cfg_adc.h
  • CONFIG_ADC_STROBE : cfg_adc.h
  • CONFIG_ADC_STTLING : cfg_adc.h
  • CONFIG_ADC_SUT : cfg_adc.h
  • CONFIG_ADC_TRACKTIM : cfg_adc.h
  • CONFIG_ADC_TRANSFER : cfg_adc.h
  • CONFIG_AFSK_DAC_SAMPLERATE : cfg_afsk.h
  • CONFIG_AFSK_FILTER : cfg_afsk.h
  • CONFIG_AFSK_PREAMBLE_LEN : cfg_afsk.h
  • CONFIG_AFSK_RX_BUFLEN : cfg_afsk.h
  • CONFIG_AFSK_RXTIMEOUT : cfg_afsk.h
  • CONFIG_AFSK_TRAILER_LEN : cfg_afsk.h
  • CONFIG_AFSK_TX_BUFLEN : cfg_afsk.h
  • CONFIG_AX25_FRAME_BUF_LEN : cfg_ax25.h
  • CONFIG_AX25_RPT_LST : cfg_ax25.h
  • CONFIG_BATTFS_SHUFFLE_FREE_PAGES : cfg_battfs.h
  • CONFIG_BITMAP_FMT : cfg_gfx.h
  • CONFIG_BOOT_LOG_FORMAT : cfg_boot.h
  • CONFIG_BOOT_LOG_LEVEL : cfg_boot.h
  • CONFIG_CHART_TYPE_X : gfx.h
  • CONFIG_CHART_TYPE_Y : gfx.h
  • CONFIG_CTX_DEBUG_BAUDRATE : cfg_context_switch.h
  • CONFIG_CTX_DEBUG_PORT : cfg_context_switch.h
  • CONFIG_DAC_REFRESH : cfg_dac.h
  • CONFIG_DAC_STARTUP : cfg_dac.h
  • CONFIG_DAC_TIMER : cfg_dac.h
  • CONFIG_DC_MOTOR_MAX_SPEED : cfg_dc_motor.h
  • CONFIG_DC_MOTOR_MIN_SPEED : cfg_dc_motor.h
  • CONFIG_DC_MOTOR_SAMPLE_DELAY : cfg_dc_motor.h
  • CONFIG_DC_MOTOR_SAMPLE_PERIOD : cfg_dc_motor.h
  • CONFIG_DC_MOTOR_USE_SEM : cfg_dc_motor.h
  • CONFIG_DEPEND : depend.h
  • CONFIG_EEPROM_DISABLE_OLD_API : cfg_eeprom.h
  • CONFIG_ENABLE_COMPAT_BEHAVIOUR : cfg_parser.h
  • CONFIG_ENTROPY_NUM_SOURCES : entropy.h
  • CONFIG_EP0_MAX_SIZE : cfg_usb.h
  • CONFIG_FAST_MEM : cfg_attr.h
  • CONFIG_FAT_CODE_PAGE : cfg_fat.h
  • CONFIG_FAT_DRIVES : cfg_fat.h
  • CONFIG_FAT_FS_MINIMIZE : cfg_fat.h
  • CONFIG_FAT_FS_READONLY : cfg_fat.h
  • CONFIG_FAT_FS_TINY : cfg_fat.h
  • CONFIG_FAT_MAX_LFN : cfg_fat.h
  • CONFIG_FAT_MAX_SS : cfg_fat.h
  • CONFIG_FAT_MULTI_PARTITION : cfg_fat.h
  • CONFIG_FAT_USE_FORWARD : cfg_fat.h
  • CONFIG_FAT_USE_LFN : cfg_fat.h
  • CONFIG_FAT_USE_MKFS : cfg_fat.h
  • CONFIG_FAT_USE_STRFUNC : cfg_fat.h
  • CONFIG_FAT_WORD_ACCESS : cfg_fat.h
  • CONFIG_FLASH25 : cfg_flash25.h
  • CONFIG_FLASH_DISABLE_OLD_API : cfg_emb_flash.h
  • CONFIG_FLASH_EMB_LOG_FORMAT : cfg_emb_flash.h
  • CONFIG_FLASH_EMB_LOG_LEVEL : cfg_emb_flash.h
  • CONFIG_FLASH_WR_TIMEOUT : cfg_emb_flash.h
  • CONFIG_FRMWRI_BUFSIZE : cfg_formatwr.h
  • CONFIG_GFX_CLIPPING : cfg_gfx.h
  • CONFIG_GFX_TEXT : cfg_gfx.h
  • CONFIG_GFX_VCOORDS : cfg_gfx.h
  • CONFIG_HEAP_MALLOC : cfg_heap.h
  • CONFIG_HT_OPTIONAL_INTERNAL_KEY : cfg_hashtable.h
  • CONFIG_I2C_DISABLE_OLD_API : cfg_i2c.h
  • CONFIG_I2C_FREQ : cfg_i2c.h
  • CONFIG_I2C_START_TIMEOUT : cfg_i2c.h
  • CONFIG_INI_MAX_LINE_LEN : cfg_ini_reader.h
  • CONFIG_ISAAC_RANDSIZL : isaac.h
  • CONFIG_KBD_BEEP : cfg_kbd.h
  • CONFIG_KBD_LONGPRESS : cfg_kbd.h
  • CONFIG_KBD_OBSERVER : cfg_kbd.h
  • CONFIG_KBD_POLL : cfg_kbd.h
  • CONFIG_KBD_SCHED : cfg_kbd.h
  • CONFIG_KDEBUG_BAUDRATE : cfg_debug.h
  • CONFIG_KDEBUG_CLOCK_FREQ : cfg_debug.h
  • CONFIG_KDEBUG_CLOCK_SOURCE : cfg_debug.h
  • CONFIG_KDEBUG_PORT : cfg_debug.h
  • CONFIG_KERN : cfg_proc.h
  • CONFIG_KERN_HEAP : cfg_proc.h
  • CONFIG_KERN_HEAP_SIZE : cfg_proc.h
  • CONFIG_KERN_IRQ : cfg_proc.h
  • CONFIG_KERN_MONITOR : cfg_monitor.h
  • CONFIG_KERN_PREEMPT : cfg_proc.h
  • CONFIG_KERN_PRI : cfg_proc.h
  • CONFIG_KERN_QUANTUM : cfg_proc.h
  • CONFIG_KERN_SCHED : cfg_kern.h
  • CONFIG_KERN_SEMAPHORES : cfg_sem.h
  • CONFIG_KERN_SIGNALS : cfg_signal.h
  • CONFIG_KEYTAG_LOG_FORMAT : cfg_keytag.h
  • CONFIG_KEYTAG_LOG_LEVEL : cfg_keytag.h
  • CONFIG_KFILE_GETS : cfg_kfile.h
  • CONFIG_LCD_4BIT : cfg_lcd_hd44.h
  • CONFIG_LCD_ADDRESS_FAST : cfg_lcd_hd44.h
  • CONFIG_LCD_COLS : cfg_lcd_hd44.h
  • CONFIG_LCD_REFRESH : cfg_lcd_32122a.h
  • CONFIG_LCD_ROWS : cfg_lcd_hd44.h
  • CONFIG_LCD_SOFTINT_REFRESH : cfg_lcd_32122a.h
  • CONFIG_LCD_WAIT : cfg_lcd_32122a.h
  • CONFIG_LED_7SEG_CCAT : cfg_led_7seg.h
  • CONFIG_LED_7SEG_DIGIT : cfg_led_7seg.h
  • CONFIG_LED_7SEG_RTIME : cfg_led_7seg.h
  • CONFIG_LED_7SEG_SSPEED : cfg_led_7seg.h
  • CONFIG_LED_7SEG_STRLEN : cfg_led_7seg.h
  • CONFIG_LEVELEDIT_TIMEOUT : cfg_menu.h
  • CONFIG_MAX_COMMANDS_NUMBER : cfg_parser.h
  • CONFIG_MD2_BLOCK_LEN : cfg_md2.h
  • CONFIG_MD2_STD_PERM : cfg_md2.h
  • CONFIG_MENU_MENUBAR : cfg_menu.h
  • CONFIG_MENU_SMOOTH : cfg_menu.h
  • CONFIG_MENU_TIMEOUT : cfg_menu.h
  • CONFIG_MT29F_LOG_FORMAT : cfg_mt29f.h
  • CONFIG_MT29F_LOG_LEVEL : cfg_mt29f.h
  • CONFIG_NMEAP_MAX_SENTENCE_LENGTH : cfg_nmea.h
  • CONFIG_NMEAP_MAX_SENTENCES : cfg_nmea.h
  • CONFIG_NMEAP_MAX_TOKENS : cfg_nmea.h
  • CONFIG_NTC_LOG_FORMAT : cfg_ntc.h
  • CONFIG_NTC_LOG_LEVEL : cfg_ntc.h
  • CONFIG_NUM_BLDS : cfg_buzzerled.h
  • CONFIG_NUM_DC_MOTOR : cfg_dc_motor.h
  • CONFIG_NUM_STEPPER_MOTORS : cfg_stepper.h
  • CONFIG_PARSER_MAX_ARGS : cfg_parser.h
  • CONFIG_PLAY_BUF_LEN : cfg_i2s.h
  • CONFIG_POCKETBUS_BUFLEN : cfg_pocketbus.h
  • CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT : cfg_pocketbus.h
  • CONFIG_PRINTF : cfg_formatwr.h
  • CONFIG_PRINTF_N_FORMATTER : formatwr.c
  • CONFIG_PRINTF_OCTAL_FORMATTER : formatwr.c
  • CONFIG_PRINTF_RETURN_COUNT : formatwr.h
  • CONFIG_RANDPOOL_TIMER : cfg_randpool.h
  • CONFIG_SAMPLE_FREQ : cfg_i2s.h
  • CONFIG_SD_AUTOASSIGN_FAT : cfg_sd.h
  • CONFIG_SD_OLD_INIT : cfg_sd.h
  • CONFIG_SER_DEFBAUDRATE : cfg_ser.h
  • CONFIG_SER_HWHANDSHAKE : cfg_ser.h
  • CONFIG_SER_RXTIMEOUT : cfg_ser.h
  • CONFIG_SER_STROBE : cfg_ser.h
  • CONFIG_SER_TXTIMEOUT : cfg_ser.h
  • CONFIG_SIZE_ENTROPY_POOL : cfg_randpool.h
  • CONFIG_SPI0_RXBUFSIZE : cfg_ser.h
  • CONFIG_SPI0_TXBUFSIZE : cfg_ser.h
  • CONFIG_SPI1_RXBUFSIZE : cfg_ser.h
  • CONFIG_SPI1_TXBUFSIZE : cfg_ser.h
  • CONFIG_SPI_CLOCK_DIV : cfg_ser.h
  • CONFIG_SPI_CLOCK_PHASE : cfg_ser.h
  • CONFIG_SPI_CLOCK_POL : cfg_ser.h
  • CONFIG_SPI_DATA_ORDER : cfg_ser.h
  • CONFIG_SPI_DATAORDER : cfg_spi_bitbang.h
  • CONFIG_SPI_DMA_MAX_RX : cfg_spi_dma.h
  • CONFIG_SPI_DMA_TX_TIMEOUT : cfg_spi_dma.h
  • CONFIG_SPI_RXBUFSIZE : cfg_ser.h
  • CONFIG_SPI_TXBUFSIZE : cfg_ser.h
  • CONFIG_TAG_MAX_LEN : cfg_keytag.h
  • CONFIG_TAS_MAX_VOL : cfg_tas5706a.h
  • CONFIG_TC_STEPPER_MAX_NUM : cfg_stepper.h
  • CONFIG_THERMO_HIFI_NUM_SAMPLES : cfg_thermo.h
  • CONFIG_THERMO_INTERVAL_MS : cfg_thermo.h
  • CONFIG_THERMO_LOG_FORMAT : cfg_thermo.h
  • CONFIG_THERMO_LOG_LEVEL : cfg_thermo.h
  • CONFIG_TIMER : cfg_timer.h
  • CONFIG_TIMER_EVENTS : cfg_timer.h
  • CONFIG_TIMER_STROBE : cfg_timer.h
  • CONFIG_TIMER_UDELAY : cfg_timer.h
  • CONFIG_TRIAC_MAX_DUTY : cfg_phase.h
  • CONFIG_TRIAC_MAX_POWER : cfg_phase.h
  • CONFIG_UART0_RXBUFSIZE : cfg_ser.h
  • CONFIG_UART0_TXBUFSIZE : cfg_ser.h
  • CONFIG_UART1_RXBUFSIZE : cfg_ser.h
  • CONFIG_UART1_TXBUFSIZE : cfg_ser.h
  • CONFIG_UART2_RXBUFSIZE : cfg_ser.h
  • CONFIG_UART2_TXBUFSIZE : cfg_ser.h
  • CONFIG_UART3_RXBUFSIZE : cfg_ser.h
  • CONFIG_UART3_TXBUFSIZE : cfg_ser.h
  • CONFIG_USB_BUFSIZE : cfg_usb.h
  • CONFIG_USB_EP_MAX : cfg_usb.h
  • CONFIG_USB_INTERFACE_MAX : cfg_usb.h
  • CONFIG_USBKBD : cfg_usbkbd.h
  • CONFIG_USBMOUSE : cfg_usbmouse.h
  • CONFIG_USBSER : cfg_usbser.h
  • CONFIG_USE_HP_TIMER : cfg_context_switch.h
  • CONFIG_USE_LED : cfg_context_switch.h
  • CONFIG_WATCHDOG : cfg_wdt.h
  • CONFIG_XMODEM_1KCRC : cfg_xmodem.h
  • CONFIG_XMODEM_LOG_FORMAT : cfg_xmodem.h
  • CONFIG_XMODEM_LOG_LEVEL : cfg_xmodem.h
  • CONFIG_XMODEM_MAXCRCRETRIES : cfg_xmodem.h
  • CONFIG_XMODEM_MAXRETRIES : cfg_xmodem.h
  • CONFIG_XMODEM_RECV : cfg_xmodem.h
  • CONFIG_XMODEM_SEND : cfg_xmodem.h
  • containerof : compiler.h
  • countof : compiler.h
  • CPIV_MASK : at91_pit.h
  • CPIV_SHIFT : at91_pit.h
  • CPU_CREATE_NEW_STACK : frame.h
  • CPU_CSOURCE : attr.h
  • CPU_HEADER : attr.h
  • CPU_IDLE : frame.h
  • CPU_PAUSE_ON : power.h
  • CPU_REG_INIT_VALUE : frame.h
  • CR_CSSON_BB : clock_stm32.h
  • CR_HSEBYP_RESET : clock_stm32.h
  • CR_HSEBYP_SET : clock_stm32.h
  • CR_HSEON_RESET : clock_stm32.h
  • CR_HSEON_SET : clock_stm32.h
  • CR_HSION_BB : clock_stm32.h
  • CR_HSITRIM_MASK : clock_stm32.h
  • CR_OFFSET : clock_stm32.h
  • CR_PLLON_BB : clock_stm32.h
  • CRC16_INIT_VAL : crc.h
  • CRC_CCITT_INIT_VAL : crc_ccitt.h
  • CS : hw_spi.h
  • CS_DISABLE : hw_spi.h
  • CS_ENABLE : hw_spi.h
  • CS_HIGH : hw_spi.h
  • CS_LOW : hw_spi.h
  • CS_OUT : hw_spi.h
  • CSR_LSION_BB : clock_stm32.h
  • CSR_OFFSET : clock_stm32.h
  • CSR_RVMF_SET : clock_stm32.h
  • CSSON_BITNUMBER : clock_stm32.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- d -

  • DAC_LOG_FORMAT : cfg_dac.h
  • DAC_LOG_LEVEL : cfg_dac.h
  • DAC_MAXCH : dac_sam3.h
  • DACC_BASE : sam3_dacc.h
  • DACC_CDR : sam3_dacc.h
  • DACC_CDR_OFF : sam3_dacc.h
  • DACC_CH0 : sam3_dacc.h
  • DACC_CH1 : sam3_dacc.h
  • DACC_CHDR : sam3_dacc.h
  • DACC_CHDR_OFF : sam3_dacc.h
  • DACC_CHER : sam3_dacc.h
  • DACC_CHER_OFF : sam3_dacc.h
  • DACC_CHSR : sam3_dacc.h
  • DACC_CHSR_OFF : sam3_dacc.h
  • DACC_CR : sam3_dacc.h
  • DACC_CR_OFF : sam3_dacc.h
  • DACC_ENDTX : sam3_dacc.h
  • DACC_EOC : sam3_dacc.h
  • DACC_FASTWKUP : sam3_dacc.h
  • DACC_IDR : sam3_dacc.h
  • DACC_IDR_OFF : sam3_dacc.h
  • DACC_IER : sam3_dacc.h
  • DACC_IER_OFF : sam3_dacc.h
  • DACC_IMR : sam3_dacc.h
  • DACC_IMR_OFF : sam3_dacc.h
  • DACC_ISR : sam3_dacc.h
  • DACC_ISR_OFF : sam3_dacc.h
  • DACC_MAXS : sam3_dacc.h
  • DACC_MR : sam3_dacc.h
  • DACC_MR_OFF : sam3_dacc.h
  • DACC_MR_STARTUP_0 : sam3_dacc.h
  • DACC_MR_STARTUP_1024 : sam3_dacc.h
  • DACC_MR_STARTUP_1088 : sam3_dacc.h
  • DACC_MR_STARTUP_112 : sam3_dacc.h
  • DACC_MR_STARTUP_1152 : sam3_dacc.h
  • DACC_MR_STARTUP_1216 : sam3_dacc.h
  • DACC_MR_STARTUP_1280 : sam3_dacc.h
  • DACC_MR_STARTUP_1344 : sam3_dacc.h
  • DACC_MR_STARTUP_1408 : sam3_dacc.h
  • DACC_MR_STARTUP_1472 : sam3_dacc.h
  • DACC_MR_STARTUP_1536 : sam3_dacc.h
  • DACC_MR_STARTUP_16 : sam3_dacc.h
  • DACC_MR_STARTUP_1600 : sam3_dacc.h
  • DACC_MR_STARTUP_1664 : sam3_dacc.h
  • DACC_MR_STARTUP_1728 : sam3_dacc.h
  • DACC_MR_STARTUP_1792 : sam3_dacc.h
  • DACC_MR_STARTUP_1856 : sam3_dacc.h
  • DACC_MR_STARTUP_1920 : sam3_dacc.h
  • DACC_MR_STARTUP_1984 : sam3_dacc.h
  • DACC_MR_STARTUP_24 : sam3_dacc.h
  • DACC_MR_STARTUP_512 : sam3_dacc.h
  • DACC_MR_STARTUP_576 : sam3_dacc.h
  • DACC_MR_STARTUP_64 : sam3_dacc.h
  • DACC_MR_STARTUP_640 : sam3_dacc.h
  • DACC_MR_STARTUP_704 : sam3_dacc.h
  • DACC_MR_STARTUP_768 : sam3_dacc.h
  • DACC_MR_STARTUP_8 : sam3_dacc.h
  • DACC_MR_STARTUP_80 : sam3_dacc.h
  • DACC_MR_STARTUP_832 : sam3_dacc.h
  • DACC_MR_STARTUP_896 : sam3_dacc.h
  • DACC_MR_STARTUP_96 : sam3_dacc.h
  • DACC_MR_STARTUP_960 : sam3_dacc.h
  • DACC_PTCR : sam3_dacc.h
  • DACC_PTCR_OFF : sam3_dacc.h
  • DACC_PTCR_RXTDIS : sam3_dacc.h
  • DACC_PTCR_RXTEN : sam3_dacc.h
  • DACC_PTCR_TXTDIS : sam3_dacc.h
  • DACC_PTCR_TXTEN : sam3_dacc.h
  • DACC_PTSR : sam3_dacc.h
  • DACC_PTSR_OFF : sam3_dacc.h
  • DACC_PTSR_RXTEN : sam3_dacc.h
  • DACC_PTSR_TXTEN : sam3_dacc.h
  • DACC_RCR : sam3_dacc.h
  • DACC_RCR_OFF : sam3_dacc.h
  • DACC_REFRESH_MASK : sam3_dacc.h
  • DACC_REFRESH_SHIFT : sam3_dacc.h
  • DACC_RNCR : sam3_dacc.h
  • DACC_RNCR_OFF : sam3_dacc.h
  • DACC_RNPR : sam3_dacc.h
  • DACC_RNPR_OFF : sam3_dacc.h
  • DACC_RPR : sam3_dacc.h
  • DACC_RPR_OFF : sam3_dacc.h
  • DACC_SLEEP : sam3_dacc.h
  • DACC_STARTUP_MASK : sam3_dacc.h
  • DACC_STARTUP_SHIFT : sam3_dacc.h
  • DACC_SWRST : sam3_dacc.h
  • DACC_TAG : sam3_dacc.h
  • DACC_TCR : sam3_dacc.h
  • DACC_TCR_OFF : sam3_dacc.h
  • DACC_TNCR : sam3_dacc.h
  • DACC_TNCR_OFF : sam3_dacc.h
  • DACC_TNPR : sam3_dacc.h
  • DACC_TNPR_OFF : sam3_dacc.h
  • DACC_TPR : sam3_dacc.h
  • DACC_TPR_OFF : sam3_dacc.h
  • DACC_TRGEN : sam3_dacc.h
  • DACC_TRGSEL_MASK : sam3_dacc.h
  • DACC_TRGSEL_PWM0 : sam3_dacc.h
  • DACC_TRGSEL_PWM1 : sam3_dacc.h
  • DACC_TRGSEL_SHIFT : sam3_dacc.h
  • DACC_TRGSEL_TIO_CH0 : sam3_dacc.h
  • DACC_TRGSEL_TIO_CH1 : sam3_dacc.h
  • DACC_TRGSEL_TIO_CH2 : sam3_dacc.h
  • DACC_TXBUFE : sam3_dacc.h
  • DACC_TXRDY : sam3_dacc.h
  • DACC_USER_SEL_MASK : sam3_dacc.h
  • DACC_USER_SEL_SHIFT : sam3_dacc.h
  • DACC_WORD : sam3_dacc.h
  • DATAFLASH_LOG_FORMAT : cfg_dataflash.h
  • DATAFLASH_LOG_LEVEL : cfg_dataflash.h
  • DB : debug.h
  • DBGMCU_BASE : stm32_memmap.h
  • DBGU_BRGR : at91_dbgu.h
  • DBGU_CIDR : at91_dbgu.h
  • DBGU_CIDR_OFF : at91_dbgu.h
  • DBGU_CR : at91_dbgu.h
  • DBGU_EXID : at91_dbgu.h
  • DBGU_EXID_OFF : at91_dbgu.h
  • DBGU_FNR : at91_dbgu.h
  • DBGU_FNR_OFF : at91_dbgu.h
  • DBGU_IDR : at91_dbgu.h
  • DBGU_IER : at91_dbgu.h
  • DBGU_IMR : at91_dbgu.h
  • DBGU_MR : at91_dbgu.h
  • DBGU_RHR : at91_dbgu.h
  • DBGU_SR : at91_dbgu.h
  • DBGU_THR : at91_dbgu.h
  • DC_MOTOR_ACTIVE : dc_motor.c
  • DC_MOTOR_DIR : dc_motor.c
  • DC_MOTOR_LOG_FORMAT : cfg_dc_motor.h
  • DC_MOTOR_LOG_LEVEL : cfg_dc_motor.h
  • DC_MOTOR_NO_DEV_SPEED : dc_motor.h
  • DC_MOTOR_NO_EXPIRE : dc_motor.h
  • DCONNECT : dnotifier.h
  • DEAFSTEPS_DEFAULT : stepper.h
  • DEBUG_DUMP_HISTORY : readline.c
  • DEBUG_UNIT_TEST : readline.c
  • DECLARE_HASHTABLE : hashtable.h
  • DECLARE_HASHTABLE_STATIC : hashtable.h
  • DECLARE_LIST_TYPE : list.h
  • DECLARE_NODE_ANON : list.h
  • DECLARE_NODE_TYPE : list.h
  • DECLARE_POOL : pool.h
  • DECLARE_POOL_STATIC : pool.h
  • DEFAULT_ACCEPTMBOX_SIZE : cfg_lwip.h
  • default_font : font.h
  • DEFAULT_RAW_RECVMBOX_SIZE : cfg_lwip.h
  • DEFAULT_TCP_RECVMBOX_SIZE : cfg_lwip.h
  • DEFAULT_THREAD_NAME : cfg_lwip.h
  • DEFAULT_THREAD_PRIO : cfg_lwip.h
  • DEFAULT_THREAD_STACKSIZE : cfg_lwip.h
  • DEFAULT_UDP_RECVMBOX_SIZE : cfg_lwip.h
  • DEFINE_TIMER_ISR : timer_lpc2.h
  • DEFINE_USB_STRING : usb.h
  • DEG_T_TO_DECIMALDEG : ntc.h
  • DEG_T_TO_FLOATDEG : ntc.h
  • DEG_T_TO_INTDEG : ntc.h
  • DEG_TO_DEG_T : ntc.h
  • DELTA : tea.h
  • DHCP_DEBUG : cfg_lwip.h
  • DHCP_DOES_ARP_CHECK : cfg_lwip.h
  • DIV_ROUND : macros.h
  • DIV_ROUNDUP : macros.h
  • DMACHANNEL1_IRQHANDLER : stm32_ints.h
  • DMACHANNEL2_IRQHANDLER : stm32_ints.h
  • DMACHANNEL3_IRQHANDLER : stm32_ints.h
  • DMACHANNEL4_IRQHANDLER : stm32_ints.h
  • DMACHANNEL5_IRQHANDLER : stm32_ints.h
  • DMACHANNEL6_IRQHANDLER : stm32_ints.h
  • DMACHANNEL7_IRQHANDLER : stm32_ints.h
  • DNS_DEBUG : cfg_lwip.h
  • DNS_DOES_NAME_CHECK : cfg_lwip.h
  • DNS_LOCAL_HOSTLIST : cfg_lwip.h
  • DNS_LOCAL_HOSTLIST_IS_DYNAMIC : cfg_lwip.h
  • DNS_MAX_NAME_LENGTH : cfg_lwip.h
  • DNS_MAX_SERVERS : cfg_lwip.h
  • DNS_MSG_SIZE : cfg_lwip.h
  • DNS_TABLE_SIZE : cfg_lwip.h
  • DNS_USES_STATIC_BUF : cfg_lwip.h
  • DWT_BASE : lm3s_memmap.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- e -

  • e2addr : eeprom.h
  • EEFC0_BASE : sam3_flash.h
  • EEFC0_FCR : sam3_flash.h
  • EEFC0_FMR : sam3_flash.h
  • EEFC0_FRR : sam3_flash.h
  • EEFC0_FSR : sam3_flash.h
  • EEFC_FCR_FARG : sam3_flash.h
  • EEFC_FCR_FARG_MASK : sam3_flash.h
  • EEFC_FCR_FARG_SHIFT : sam3_flash.h
  • EEFC_FCR_FCMD : sam3_flash.h
  • EEFC_FCR_FCMD_MASK : sam3_flash.h
  • EEFC_FCR_FKEY : sam3_flash.h
  • EEFC_FCR_FKEY_MASK : sam3_flash.h
  • EEFC_FCR_FKEY_SHIFT : sam3_flash.h
  • EEFC_FCR_OFF : sam3_flash.h
  • EEFC_FMR_FAM : sam3_flash.h
  • EEFC_FMR_FRDY : sam3_flash.h
  • EEFC_FMR_FWS : sam3_flash.h
  • EEFC_FMR_FWS_MASK : sam3_flash.h
  • EEFC_FMR_FWS_SHIFT : sam3_flash.h
  • EEFC_FMR_OFF : sam3_flash.h
  • EEFC_FRR_OFF : sam3_flash.h
  • EEFC_FSR_FCMDE : sam3_flash.h
  • EEFC_FSR_FLOCKE : sam3_flash.h
  • EEFC_FSR_FRDY : sam3_flash.h
  • EEFC_FSR_OFF : sam3_flash.h
  • EEPROM_ADDR : eeprom.c
  • EEPROM_ID : eeprom.c
  • EEPROM_LOG_FORMAT : cfg_eeprom.h
  • EEPROM_LOG_LEVEL : cfg_eeprom.h
  • EIMSKF_CTS : ser_xmega.c , ser_mega.c
  • EMAC_ALE : at91_emac.h
  • EMAC_ALE_OFF : at91_emac.h
  • EMAC_BEX : at91_emac.h
  • EMAC_BIG : at91_emac.h
  • EMAC_BNA : at91_emac.h
  • EMAC_BP : at91_emac.h
  • EMAC_CAF : at91_emac.h
  • EMAC_CLK : at91_emac.h
  • EMAC_CLK_HCLK_16 : at91_emac.h
  • EMAC_CLK_HCLK_32 : at91_emac.h
  • EMAC_CLK_HCLK_64 : at91_emac.h
  • EMAC_CLK_HCLK_8 : at91_emac.h
  • EMAC_CLKEN : at91_emac.h
  • EMAC_CLRSTAT : at91_emac.h
  • EMAC_CODE : at91_emac.h
  • EMAC_COL : at91_emac.h
  • EMAC_COMP : at91_emac.h
  • EMAC_CSE : at91_emac.h
  • EMAC_CSE_OFF : at91_emac.h
  • EMAC_DATA : at91_emac.h
  • EMAC_DRFCS : at91_emac.h
  • EMAC_DTF : at91_emac.h
  • EMAC_DTF_OFF : at91_emac.h
  • EMAC_ECOL : at91_emac.h
  • EMAC_ECOL_OFF : at91_emac.h
  • EMAC_EFRHD : at91_emac.h
  • EMAC_ELE : at91_emac.h
  • EMAC_ELE_OFF : at91_emac.h
  • EMAC_FCSE : at91_emac.h
  • EMAC_FCSE_OFF : at91_emac.h
  • EMAC_FD : at91_emac.h
  • EMAC_FRO : at91_emac.h
  • EMAC_FRO_OFF : at91_emac.h
  • EMAC_FTO : at91_emac.h
  • EMAC_FTO_OFF : at91_emac.h
  • EMAC_HRB : at91_emac.h
  • EMAC_HRB_OFF : at91_emac.h
  • EMAC_HRESP : at91_emac.h
  • EMAC_HRT : at91_emac.h
  • EMAC_HRT_OFF : at91_emac.h
  • EMAC_IDLE : at91_emac.h
  • EMAC_IDR : at91_emac.h
  • EMAC_IDR_OFF : at91_emac.h
  • EMAC_IER : at91_emac.h
  • EMAC_IER_OFF : at91_emac.h
  • EMAC_IMR : at91_emac.h
  • EMAC_IMR_OFF : at91_emac.h
  • EMAC_INCSTAT : at91_emac.h
  • EMAC_IRXFCS : at91_emac.h
  • EMAC_ISR : at91_emac.h
  • EMAC_ISR_OFF : at91_emac.h
  • EMAC_JFRAME : at91_emac.h
  • EMAC_LB : at91_emac.h
  • EMAC_LCOL : at91_emac.h
  • EMAC_LCOL_OFF : at91_emac.h
  • EMAC_LLB : at91_emac.h
  • EMAC_MAN : at91_emac.h
  • EMAC_MAN_OFF : at91_emac.h
  • EMAC_MCF : at91_emac.h
  • EMAC_MCF_OFF : at91_emac.h
  • EMAC_MDIO : at91_emac.h
  • EMAC_MFD : at91_emac.h
  • EMAC_MPE : at91_emac.h
  • EMAC_MTI : at91_emac.h
  • EMAC_NBC : at91_emac.h
  • EMAC_NCFGR : at91_emac.h
  • EMAC_NCFGR_OFF : at91_emac.h
  • EMAC_NCR : at91_emac.h
  • EMAC_NCR_OFF : at91_emac.h
  • EMAC_NSR : at91_emac.h
  • EMAC_NSR_OFF : at91_emac.h
  • EMAC_OVR : at91_emac.h
  • EMAC_PAE : at91_emac.h
  • EMAC_PFR : at91_emac.h
  • EMAC_PFRR : at91_emac.h
  • EMAC_PFRR_OFF : at91_emac.h
  • EMAC_PHYA : at91_emac.h
  • EMAC_PHYA_SHIFT : at91_emac.h
  • EMAC_PTIME : at91_emac.h
  • EMAC_PTR : at91_emac.h
  • EMAC_PTR_OFF : at91_emac.h
  • EMAC_PTZ : at91_emac.h
  • EMAC_RBOF : at91_emac.h
  • EMAC_RBOF_OFFSET_0 : at91_emac.h
  • EMAC_RBOF_OFFSET_1 : at91_emac.h
  • EMAC_RBOF_OFFSET_2 : at91_emac.h
  • EMAC_RBOF_OFFSET_3 : at91_emac.h
  • EMAC_RBQP : at91_emac.h
  • EMAC_RBQP_OFF : at91_emac.h
  • EMAC_RCOMP : at91_emac.h
  • EMAC_RE : at91_emac.h
  • EMAC_REC : at91_emac.h
  • EMAC_REGA : at91_emac.h
  • EMAC_REGA_SHIFT : at91_emac.h
  • EMAC_RJA : at91_emac.h
  • EMAC_RJA_OFF : at91_emac.h
  • EMAC_RLCE : at91_emac.h
  • EMAC_RLE : at91_emac.h
  • EMAC_RLE_OFF : at91_emac.h
  • EMAC_RLES : at91_emac.h
  • EMAC_RLEX : at91_emac.h
  • EMAC_RMII : at91_emac.h
  • EMAC_ROV : at91_emac.h
  • EMAC_ROV_OFF : at91_emac.h
  • EMAC_ROVR : at91_emac.h
  • EMAC_RRE : at91_emac.h
  • EMAC_RRE_OFF : at91_emac.h
  • EMAC_RSE : at91_emac.h
  • EMAC_RSE_OFF : at91_emac.h
  • EMAC_RSR : at91_emac.h
  • EMAC_RSR_OFF : at91_emac.h
  • EMAC_RTY : at91_emac.h
  • EMAC_RW : at91_emac.h
  • EMAC_RW_READ : at91_emac.h
  • EMAC_RW_WRITE : at91_emac.h
  • EMAC_RXUBR : at91_emac.h
  • EMAC_SA1H : at91_emac.h
  • EMAC_SA1H_OFF : at91_emac.h
  • EMAC_SA1L : at91_emac.h
  • EMAC_SA1L_OFF : at91_emac.h
  • EMAC_SA2H : at91_emac.h
  • EMAC_SA2H_OFF : at91_emac.h
  • EMAC_SA2L : at91_emac.h
  • EMAC_SA2L_OFF : at91_emac.h
  • EMAC_SA3H : at91_emac.h
  • EMAC_SA3H_OFF : at91_emac.h
  • EMAC_SA3L : at91_emac.h
  • EMAC_SA3L_OFF : at91_emac.h
  • EMAC_SA4H : at91_emac.h
  • EMAC_SA4H_OFF : at91_emac.h
  • EMAC_SA4L : at91_emac.h
  • EMAC_SA4L_OFF : at91_emac.h
  • EMAC_SCF : at91_emac.h
  • EMAC_SCF_OFF : at91_emac.h
  • EMAC_SOF : at91_emac.h
  • EMAC_SPD : at91_emac.h
  • EMAC_STE : at91_emac.h
  • EMAC_STE_OFF : at91_emac.h
  • EMAC_TBQP : at91_emac.h
  • EMAC_TBQP_OFF : at91_emac.h
  • EMAC_TCOMP : at91_emac.h
  • EMAC_TE : at91_emac.h
  • EMAC_TGO : at91_emac.h
  • EMAC_THALT : at91_emac.h
  • EMAC_TID : at91_emac.h
  • EMAC_TID_OFF : at91_emac.h
  • EMAC_TSR : at91_emac.h
  • EMAC_TSR_OFF : at91_emac.h
  • EMAC_TSTART : at91_emac.h
  • EMAC_TUND : at91_emac.h
  • EMAC_TUNDR : at91_emac.h
  • EMAC_TUNDR_OFF : at91_emac.h
  • EMAC_TXERR : at91_emac.h
  • EMAC_TXUBR : at91_emac.h
  • EMAC_UBR : at91_emac.h
  • EMAC_UND : at91_emac.h
  • EMAC_UNI : at91_emac.h
  • EMAC_USF : at91_emac.h
  • EMAC_USF_OFF : at91_emac.h
  • EMAC_USRIO : at91_emac.h
  • EMAC_USRIO_OFF : at91_emac.h
  • EMAC_WESTAT : at91_emac.h
  • EPI0_BASE : lm3s_memmap.h
  • ETH_BASE : lm3s_memmap.h
  • ETH_LOG_FORMAT : cfg_eth.h
  • ETH_LOG_LEVEL : cfg_eth.h
  • ETHARP_DEBUG : cfg_lwip.h
  • ETHARP_SUPPORT_VLAN : cfg_lwip.h
  • ETHARP_TRUST_IP_MAC : cfg_lwip.h
  • event_initNone : event.h
  • event_initSoftint : event.h
  • EXTERN_POOL : pool.h
  • EXTI0_IRQHANDLER : stm32_ints.h
  • EXTI15_10_IRQHANDLER : stm32_ints.h
  • EXTI1_IRQHANDLER : stm32_ints.h
  • EXTI2_IRQHANDLER : stm32_ints.h
  • EXTI3_IRQHANDLER : stm32_ints.h
  • EXTI4_IRQHANDLER : stm32_ints.h
  • EXTI9_5_IRQHANDLER : stm32_ints.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- f -

  • F_SIZE : stm32_flash.h
  • FAST_FUNC : attr.h
  • FAST_RODATA : attr.h
  • FAT_LOG_FORMAT : cfg_fat.h
  • FAT_LOG_LEVEL : cfg_fat.h
  • FAULT_BUS : sam3_nvic.h , stm32_nvic.h , lm3s_ints.h , sam3_ints.h
  • FAULT_DEBUG : lm3s_ints.h , sam3_ints.h , sam3_nvic.h , stm32_nvic.h
  • FAULT_HARD : sam3_nvic.h , stm32_nvic.h , lm3s_ints.h , sam3_ints.h
  • FAULT_MPU : lm3s_ints.h , sam3_ints.h , sam3_nvic.h , stm32_nvic.h
  • FAULT_NMI : lm3s_ints.h , sam3_ints.h , sam3_nvic.h , stm32_nvic.h
  • FAULT_PENDSV : lm3s_ints.h , sam3_ints.h , sam3_nvic.h , stm32_nvic.h
  • FAULT_SVCALL : sam3_nvic.h , stm32_nvic.h , lm3s_ints.h , sam3_ints.h
  • FAULT_SYSTICK : lm3s_ints.h , sam3_ints.h , sam3_nvic.h , stm32_nvic.h
  • FAULT_USAGE : lm3s_ints.h , sam3_ints.h , sam3_nvic.h , stm32_nvic.h
  • FIX_MULT32 : ramp.h
  • FLAG_MASK : clock_stm32.h
  • FLASH25_AT25F2048 : flash25.h
  • FLASH_BASE : lm3s_memmap.h
  • FLASH_BOOT_SIZE : hw_boot.h
  • FLASH_CTRL_BASE : lm3s_memmap.h
  • FLASH_ERASE_SIZE : lm3s_com.h
  • FLASH_FCIM_AMASK : lm3s_com.h
  • FLASH_FCIM_PMASK : lm3s_com.h
  • FLASH_FCIM_R : lm3s_com.h
  • FLASH_FCMISC_AMISC : lm3s_com.h
  • FLASH_FCMISC_PMISC : lm3s_com.h
  • FLASH_FCMISC_R : lm3s_com.h
  • FLASH_FCRIS_ARIS : lm3s_com.h
  • FLASH_FCRIS_PRIS : lm3s_com.h
  • FLASH_FCRIS_R : lm3s_com.h
  • FLASH_FMA_OFFSET_M : lm3s_com.h
  • FLASH_FMA_OFFSET_S : lm3s_com.h
  • FLASH_FMA_R : lm3s_com.h
  • FLASH_FMC_COMT : lm3s_com.h
  • FLASH_FMC_ERASE : lm3s_com.h
  • FLASH_FMC_MERASE : lm3s_com.h
  • FLASH_FMC_R : lm3s_com.h
  • FLASH_FMC_WRITE : lm3s_com.h
  • FLASH_FMC_WRKEY : lm3s_com.h
  • FLASH_FMC_WRKEY_M : lm3s_com.h
  • FLASH_FMC_WRKEY_S : lm3s_com.h
  • FLASH_FMD_DATA_M : lm3s_com.h
  • FLASH_FMD_DATA_S : lm3s_com.h
  • FLASH_FMD_R : lm3s_com.h
  • FLASH_FMPPE0_R : lm3s_com.h
  • FLASH_FMPPE1_R : lm3s_com.h
  • FLASH_FMPPE2_R : lm3s_com.h
  • FLASH_FMPPE3_R : lm3s_com.h
  • FLASH_FMPRE0_R : lm3s_com.h
  • FLASH_FMPRE1_R : lm3s_com.h
  • FLASH_FMPRE2_R : lm3s_com.h
  • FLASH_FMPRE3_R : lm3s_com.h
  • flash_init : flash.h
  • flash_init_2 : flash.h
  • FLASH_IRQHANDLER : stm32_ints.h
  • FLASH_NOT_ERASED : flash.h
  • FLASH_PROTECT_SIZE : lm3s_com.h
  • FLASH_R_BASE : stm32_memmap.h
  • FLASH_UNBUFFERED : flash.h
  • FLASH_USECRL_M : lm3s_com.h
  • FLASH_USECRL_R : lm3s_com.h
  • FLASH_USECRL_S : lm3s_com.h
  • FLASH_USERDBG_DATA_M : lm3s_com.h
  • FLASH_USERDBG_DATA_S : lm3s_com.h
  • FLASH_USERDBG_DBG0 : lm3s_com.h
  • FLASH_USERDBG_DBG1 : lm3s_com.h
  • FLASH_USERDBG_NW : lm3s_com.h
  • FLASH_USERDBG_R : lm3s_com.h
  • FLASH_USERREG0_DATA_M : lm3s_com.h
  • FLASH_USERREG0_DATA_S : lm3s_com.h
  • FLASH_USERREG0_NW : lm3s_com.h
  • FLASH_USERREG0_R : lm3s_com.h
  • FLASH_USERREG1_DATA_M : lm3s_com.h
  • FLASH_USERREG1_DATA_S : lm3s_com.h
  • FLASH_USERREG1_NW : lm3s_com.h
  • FLASH_USERREG1_R : lm3s_com.h
  • FLASH_WR_ERR : flash.h
  • FLASH_WR_OK : flash.h
  • FLASH_WR_PROTECT : flash.h
  • FLASH_WR_TIMEOUT : flash.h
  • FLASH_WRITE_ONCE : flash.h
  • FONT_HAS_GLYPH : font.h
  • FOREACH_NODE : list.h
  • FPB_BASE : lm3s_memmap.h
  • FREQ2MICROS : ramp.h
  • FSMC_BANK1_R_BASE : stm32_memmap.h
  • FSMC_BANK1E_R_BASE : stm32_memmap.h
  • FSMC_BANK2_R_BASE : stm32_memmap.h
  • FSMC_BANK3_R_BASE : stm32_memmap.h
  • FSMC_BANK4_R_BASE : stm32_memmap.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- g -

  • GET_ID_DESITY_DEVICE : dataflash.h
  • GPIO_LOCK_KEY : lm3s_com.h , lm3s_gpio.h
  • GPIO_LOCK_KEY_DD : lm3s_gpio.h
  • GPIO_LOCK_LOCKED : lm3s_com.h , lm3s_gpio.h
  • GPIO_LOCK_M : lm3s_gpio.h , lm3s_com.h
  • GPIO_LOCK_UNLOCKED : lm3s_com.h , lm3s_gpio.h
  • GPIO_O_AFSEL : lm3s_gpio.h
  • GPIO_O_AMSEL : lm3s_gpio.h
  • GPIO_O_CR : lm3s_gpio.h
  • GPIO_O_DATA : lm3s_gpio.h
  • GPIO_O_DEN : lm3s_gpio.h
  • GPIO_O_DIR : lm3s_gpio.h
  • GPIO_O_DR2R : lm3s_gpio.h
  • GPIO_O_DR4R : lm3s_gpio.h
  • GPIO_O_DR8R : lm3s_gpio.h
  • GPIO_O_IBE : lm3s_gpio.h
  • GPIO_O_ICR : lm3s_gpio.h
  • GPIO_O_IEV : lm3s_gpio.h
  • GPIO_O_IM : lm3s_gpio.h
  • GPIO_O_IS : lm3s_gpio.h
  • GPIO_O_LOCK : lm3s_gpio.h
  • GPIO_O_MIS : lm3s_gpio.h
  • GPIO_O_ODR : lm3s_gpio.h
  • GPIO_O_PCellID0 : lm3s_gpio.h
  • GPIO_O_PCellID1 : lm3s_gpio.h
  • GPIO_O_PCellID2 : lm3s_gpio.h
  • GPIO_O_PCellID3 : lm3s_gpio.h
  • GPIO_O_PCTL : lm3s_gpio.h
  • GPIO_O_PDR : lm3s_gpio.h
  • GPIO_O_PeriphID0 : lm3s_gpio.h
  • GPIO_O_PeriphID1 : lm3s_gpio.h
  • GPIO_O_PeriphID2 : lm3s_gpio.h
  • GPIO_O_PeriphID3 : lm3s_gpio.h
  • GPIO_O_PeriphID4 : lm3s_gpio.h
  • GPIO_O_PeriphID5 : lm3s_gpio.h
  • GPIO_O_PeriphID6 : lm3s_gpio.h
  • GPIO_O_PeriphID7 : lm3s_gpio.h
  • GPIO_O_PUR : lm3s_gpio.h
  • GPIO_O_RIS : lm3s_gpio.h
  • GPIO_O_SLR : lm3s_gpio.h
  • GPIO_PCTL_PA0_I2C1SCL : lm3s_gpio.h
  • GPIO_PCTL_PA0_M : lm3s_gpio.h
  • GPIO_PCTL_PA0_U0RX : lm3s_gpio.h
  • GPIO_PCTL_PA0_U1RX : lm3s_gpio.h
  • GPIO_PCTL_PA1_I2C1SDA : lm3s_gpio.h
  • GPIO_PCTL_PA1_M : lm3s_gpio.h
  • GPIO_PCTL_PA1_U0TX : lm3s_gpio.h
  • GPIO_PCTL_PA1_U1TX : lm3s_gpio.h
  • GPIO_PCTL_PA2_I2S0RXSD : lm3s_gpio.h
  • GPIO_PCTL_PA2_M : lm3s_gpio.h
  • GPIO_PCTL_PA2_PWM4 : lm3s_gpio.h
  • GPIO_PCTL_PA2_SSI0CLK : lm3s_gpio.h
  • GPIO_PCTL_PA3_I2S0RXMCLK : lm3s_gpio.h
  • GPIO_PCTL_PA3_M : lm3s_gpio.h
  • GPIO_PCTL_PA3_PWM5 : lm3s_gpio.h
  • GPIO_PCTL_PA3_SSI0FSS : lm3s_gpio.h
  • GPIO_PCTL_PA4_CAN0RX : lm3s_gpio.h
  • GPIO_PCTL_PA4_I2S0TXSCK : lm3s_gpio.h
  • GPIO_PCTL_PA4_M : lm3s_gpio.h
  • GPIO_PCTL_PA4_PWM6 : lm3s_gpio.h
  • GPIO_PCTL_PA4_SSI0RX : lm3s_gpio.h
  • GPIO_PCTL_PA5_CAN0TX : lm3s_gpio.h
  • GPIO_PCTL_PA5_I2S0TXWS : lm3s_gpio.h
  • GPIO_PCTL_PA5_M : lm3s_gpio.h
  • GPIO_PCTL_PA5_PWM7 : lm3s_gpio.h
  • GPIO_PCTL_PA5_SSI0TX : lm3s_gpio.h
  • GPIO_PCTL_PA6_CAN0RX : lm3s_gpio.h
  • GPIO_PCTL_PA6_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PA6_I2C1SCL : lm3s_gpio.h
  • GPIO_PCTL_PA6_M : lm3s_gpio.h
  • GPIO_PCTL_PA6_PWM0 : lm3s_gpio.h
  • GPIO_PCTL_PA6_PWM4 : lm3s_gpio.h
  • GPIO_PCTL_PA6_U1CTS : lm3s_gpio.h
  • GPIO_PCTL_PA6_USB0EPEN : lm3s_gpio.h
  • GPIO_PCTL_PA7_CAN0TX : lm3s_gpio.h
  • GPIO_PCTL_PA7_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PA7_CCP4 : lm3s_gpio.h
  • GPIO_PCTL_PA7_I2C1SDA : lm3s_gpio.h
  • GPIO_PCTL_PA7_M : lm3s_gpio.h
  • GPIO_PCTL_PA7_PWM1 : lm3s_gpio.h
  • GPIO_PCTL_PA7_PWM5 : lm3s_gpio.h
  • GPIO_PCTL_PA7_U1DCD : lm3s_gpio.h
  • GPIO_PCTL_PA7_USB0PFLT : lm3s_gpio.h
  • GPIO_PCTL_PB0_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PB0_M : lm3s_gpio.h
  • GPIO_PCTL_PB0_PWM2 : lm3s_gpio.h
  • GPIO_PCTL_PB0_U1RX : lm3s_gpio.h
  • GPIO_PCTL_PB1_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PB1_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PB1_M : lm3s_gpio.h
  • GPIO_PCTL_PB1_PWM3 : lm3s_gpio.h
  • GPIO_PCTL_PB1_U1TX : lm3s_gpio.h
  • GPIO_PCTL_PB2_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PB2_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PB2_I2C0SCL : lm3s_gpio.h
  • GPIO_PCTL_PB2_IDX0 : lm3s_gpio.h
  • GPIO_PCTL_PB2_M : lm3s_gpio.h
  • GPIO_PCTL_PB2_USB0EPEN : lm3s_gpio.h
  • GPIO_PCTL_PB3_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PB3_FAULT3 : lm3s_gpio.h
  • GPIO_PCTL_PB3_I2C0SDA : lm3s_gpio.h
  • GPIO_PCTL_PB3_M : lm3s_gpio.h
  • GPIO_PCTL_PB3_USB0PFLT : lm3s_gpio.h
  • GPIO_PCTL_PB4_CAN0RX : lm3s_gpio.h
  • GPIO_PCTL_PB4_EPI0S23 : lm3s_gpio.h
  • GPIO_PCTL_PB4_IDX0 : lm3s_gpio.h
  • GPIO_PCTL_PB4_M : lm3s_gpio.h
  • GPIO_PCTL_PB4_U1RX : lm3s_gpio.h
  • GPIO_PCTL_PB4_U2RX : lm3s_gpio.h
  • GPIO_PCTL_PB5_C0O : lm3s_gpio.h
  • GPIO_PCTL_PB5_CAN0TX : lm3s_gpio.h
  • GPIO_PCTL_PB5_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PB5_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PB5_CCP5 : lm3s_gpio.h
  • GPIO_PCTL_PB5_CCP6 : lm3s_gpio.h
  • GPIO_PCTL_PB5_EPI0S22 : lm3s_gpio.h
  • GPIO_PCTL_PB5_M : lm3s_gpio.h
  • GPIO_PCTL_PB5_U1TX : lm3s_gpio.h
  • GPIO_PCTL_PB6_C0O : lm3s_gpio.h
  • GPIO_PCTL_PB6_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PB6_CCP5 : lm3s_gpio.h
  • GPIO_PCTL_PB6_CCP7 : lm3s_gpio.h
  • GPIO_PCTL_PB6_FAULT1 : lm3s_gpio.h
  • GPIO_PCTL_PB6_I2S0TXSCK : lm3s_gpio.h
  • GPIO_PCTL_PB6_IDX0 : lm3s_gpio.h
  • GPIO_PCTL_PB6_M : lm3s_gpio.h
  • GPIO_PCTL_PB7_M : lm3s_gpio.h
  • GPIO_PCTL_PB7_NMI : lm3s_gpio.h
  • GPIO_PCTL_PC0_M : lm3s_gpio.h
  • GPIO_PCTL_PC0_TCK : lm3s_gpio.h
  • GPIO_PCTL_PC1_M : lm3s_gpio.h
  • GPIO_PCTL_PC1_TMS : lm3s_gpio.h
  • GPIO_PCTL_PC2_M : lm3s_gpio.h
  • GPIO_PCTL_PC2_TDI : lm3s_gpio.h
  • GPIO_PCTL_PC3_M : lm3s_gpio.h
  • GPIO_PCTL_PC3_TDO : lm3s_gpio.h
  • GPIO_PCTL_PC4_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PC4_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PC4_CCP4 : lm3s_gpio.h
  • GPIO_PCTL_PC4_CCP5 : lm3s_gpio.h
  • GPIO_PCTL_PC4_EPI0S2 : lm3s_gpio.h
  • GPIO_PCTL_PC4_M : lm3s_gpio.h
  • GPIO_PCTL_PC4_PHA0 : lm3s_gpio.h
  • GPIO_PCTL_PC4_PWM6 : lm3s_gpio.h
  • GPIO_PCTL_PC5_C0O : lm3s_gpio.h
  • GPIO_PCTL_PC5_C1O : lm3s_gpio.h
  • GPIO_PCTL_PC5_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PC5_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PC5_EPI0S3 : lm3s_gpio.h
  • GPIO_PCTL_PC5_FAULT2 : lm3s_gpio.h
  • GPIO_PCTL_PC5_M : lm3s_gpio.h
  • GPIO_PCTL_PC5_USB0EPEN : lm3s_gpio.h
  • GPIO_PCTL_PC6_C2O : lm3s_gpio.h
  • GPIO_PCTL_PC6_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PC6_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PC6_EPI0S4 : lm3s_gpio.h
  • GPIO_PCTL_PC6_M : lm3s_gpio.h
  • GPIO_PCTL_PC6_PHB0 : lm3s_gpio.h
  • GPIO_PCTL_PC6_PWM7 : lm3s_gpio.h
  • GPIO_PCTL_PC6_U1RX : lm3s_gpio.h
  • GPIO_PCTL_PC6_USB0PFLT : lm3s_gpio.h
  • GPIO_PCTL_PC7_C1O : lm3s_gpio.h
  • GPIO_PCTL_PC7_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PC7_CCP4 : lm3s_gpio.h
  • GPIO_PCTL_PC7_EPI0S5 : lm3s_gpio.h
  • GPIO_PCTL_PC7_M : lm3s_gpio.h
  • GPIO_PCTL_PC7_PHB0 : lm3s_gpio.h
  • GPIO_PCTL_PC7_U1TX : lm3s_gpio.h
  • GPIO_PCTL_PC7_USB0PFLT : lm3s_gpio.h
  • GPIO_PCTL_PD0_CAN0RX : lm3s_gpio.h
  • GPIO_PCTL_PD0_CCP6 : lm3s_gpio.h
  • GPIO_PCTL_PD0_I2S0RXSCK : lm3s_gpio.h
  • GPIO_PCTL_PD0_IDX0 : lm3s_gpio.h
  • GPIO_PCTL_PD0_M : lm3s_gpio.h
  • GPIO_PCTL_PD0_PWM0 : lm3s_gpio.h
  • GPIO_PCTL_PD0_U1CTS : lm3s_gpio.h
  • GPIO_PCTL_PD0_U1RX : lm3s_gpio.h
  • GPIO_PCTL_PD0_U2RX : lm3s_gpio.h
  • GPIO_PCTL_PD1_CAN0TX : lm3s_gpio.h
  • GPIO_PCTL_PD1_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PD1_CCP7 : lm3s_gpio.h
  • GPIO_PCTL_PD1_I2S0RXWS : lm3s_gpio.h
  • GPIO_PCTL_PD1_M : lm3s_gpio.h
  • GPIO_PCTL_PD1_PHA0 : lm3s_gpio.h
  • GPIO_PCTL_PD1_PHB1 : lm3s_gpio.h
  • GPIO_PCTL_PD1_PWM1 : lm3s_gpio.h
  • GPIO_PCTL_PD1_U1DCD : lm3s_gpio.h
  • GPIO_PCTL_PD1_U1TX : lm3s_gpio.h
  • GPIO_PCTL_PD1_U2TX : lm3s_gpio.h
  • GPIO_PCTL_PD2_CCP5 : lm3s_gpio.h
  • GPIO_PCTL_PD2_CCP6 : lm3s_gpio.h
  • GPIO_PCTL_PD2_EPI0S20 : lm3s_gpio.h
  • GPIO_PCTL_PD2_M : lm3s_gpio.h
  • GPIO_PCTL_PD2_PWM2 : lm3s_gpio.h
  • GPIO_PCTL_PD2_U1RX : lm3s_gpio.h
  • GPIO_PCTL_PD3_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PD3_CCP7 : lm3s_gpio.h
  • GPIO_PCTL_PD3_EPI0S21 : lm3s_gpio.h
  • GPIO_PCTL_PD3_M : lm3s_gpio.h
  • GPIO_PCTL_PD3_PWM3 : lm3s_gpio.h
  • GPIO_PCTL_PD3_U1TX : lm3s_gpio.h
  • GPIO_PCTL_PD4_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PD4_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PD4_EPI0S19 : lm3s_gpio.h
  • GPIO_PCTL_PD4_I2S0RXSD : lm3s_gpio.h
  • GPIO_PCTL_PD4_M : lm3s_gpio.h
  • GPIO_PCTL_PD4_U1RI : lm3s_gpio.h
  • GPIO_PCTL_PD5_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PD5_CCP4 : lm3s_gpio.h
  • GPIO_PCTL_PD5_EPI0S28 : lm3s_gpio.h
  • GPIO_PCTL_PD5_I2S0RXMCLK : lm3s_gpio.h
  • GPIO_PCTL_PD5_M : lm3s_gpio.h
  • GPIO_PCTL_PD5_U2RX : lm3s_gpio.h
  • GPIO_PCTL_PD6_EPI0S29 : lm3s_gpio.h
  • GPIO_PCTL_PD6_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PD6_I2S0TXSCK : lm3s_gpio.h
  • GPIO_PCTL_PD6_M : lm3s_gpio.h
  • GPIO_PCTL_PD6_U2TX : lm3s_gpio.h
  • GPIO_PCTL_PD7_C0O : lm3s_gpio.h
  • GPIO_PCTL_PD7_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PD7_EPI0S30 : lm3s_gpio.h
  • GPIO_PCTL_PD7_I2S0TXWS : lm3s_gpio.h
  • GPIO_PCTL_PD7_IDX0 : lm3s_gpio.h
  • GPIO_PCTL_PD7_M : lm3s_gpio.h
  • GPIO_PCTL_PD7_U1DTR : lm3s_gpio.h
  • GPIO_PCTL_PE0_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PE0_EPI0S8 : lm3s_gpio.h
  • GPIO_PCTL_PE0_M : lm3s_gpio.h
  • GPIO_PCTL_PE0_PWM4 : lm3s_gpio.h
  • GPIO_PCTL_PE0_SSI1CLK : lm3s_gpio.h
  • GPIO_PCTL_PE0_USB0PFLT : lm3s_gpio.h
  • GPIO_PCTL_PE1_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PE1_CCP6 : lm3s_gpio.h
  • GPIO_PCTL_PE1_EPI0S9 : lm3s_gpio.h
  • GPIO_PCTL_PE1_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PE1_M : lm3s_gpio.h
  • GPIO_PCTL_PE1_PWM5 : lm3s_gpio.h
  • GPIO_PCTL_PE1_SSI1FSS : lm3s_gpio.h
  • GPIO_PCTL_PE2_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PE2_CCP4 : lm3s_gpio.h
  • GPIO_PCTL_PE2_EPI0S24 : lm3s_gpio.h
  • GPIO_PCTL_PE2_M : lm3s_gpio.h
  • GPIO_PCTL_PE2_PHA0 : lm3s_gpio.h
  • GPIO_PCTL_PE2_PHB1 : lm3s_gpio.h
  • GPIO_PCTL_PE2_SSI1RX : lm3s_gpio.h
  • GPIO_PCTL_PE3_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PE3_CCP7 : lm3s_gpio.h
  • GPIO_PCTL_PE3_EPI0S25 : lm3s_gpio.h
  • GPIO_PCTL_PE3_M : lm3s_gpio.h
  • GPIO_PCTL_PE3_PHA1 : lm3s_gpio.h
  • GPIO_PCTL_PE3_PHB0 : lm3s_gpio.h
  • GPIO_PCTL_PE3_SSI1TX : lm3s_gpio.h
  • GPIO_PCTL_PE4_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PE4_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PE4_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PE4_I2S0TXWS : lm3s_gpio.h
  • GPIO_PCTL_PE4_M : lm3s_gpio.h
  • GPIO_PCTL_PE4_U2TX : lm3s_gpio.h
  • GPIO_PCTL_PE5_CCP5 : lm3s_gpio.h
  • GPIO_PCTL_PE5_I2S0TXSD : lm3s_gpio.h
  • GPIO_PCTL_PE5_M : lm3s_gpio.h
  • GPIO_PCTL_PE6_C1O : lm3s_gpio.h
  • GPIO_PCTL_PE6_M : lm3s_gpio.h
  • GPIO_PCTL_PE6_PWM4 : lm3s_gpio.h
  • GPIO_PCTL_PE6_U1CTS : lm3s_gpio.h
  • GPIO_PCTL_PE7_C2O : lm3s_gpio.h
  • GPIO_PCTL_PE7_M : lm3s_gpio.h
  • GPIO_PCTL_PE7_PWM5 : lm3s_gpio.h
  • GPIO_PCTL_PE7_U1DCD : lm3s_gpio.h
  • GPIO_PCTL_PF0_CAN1RX : lm3s_gpio.h
  • GPIO_PCTL_PF0_I2S0TXSD : lm3s_gpio.h
  • GPIO_PCTL_PF0_M : lm3s_gpio.h
  • GPIO_PCTL_PF0_PHB0 : lm3s_gpio.h
  • GPIO_PCTL_PF0_PWM0 : lm3s_gpio.h
  • GPIO_PCTL_PF0_U1DSR : lm3s_gpio.h
  • GPIO_PCTL_PF1_CAN1TX : lm3s_gpio.h
  • GPIO_PCTL_PF1_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PF1_I2S0TXMCLK : lm3s_gpio.h
  • GPIO_PCTL_PF1_IDX1 : lm3s_gpio.h
  • GPIO_PCTL_PF1_M : lm3s_gpio.h
  • GPIO_PCTL_PF1_PWM1 : lm3s_gpio.h
  • GPIO_PCTL_PF1_U1RTS : lm3s_gpio.h
  • GPIO_PCTL_PF2_LED1 : lm3s_gpio.h
  • GPIO_PCTL_PF2_M : lm3s_gpio.h
  • GPIO_PCTL_PF2_PWM2 : lm3s_gpio.h
  • GPIO_PCTL_PF2_PWM4 : lm3s_gpio.h
  • GPIO_PCTL_PF2_SSI1CLK : lm3s_gpio.h
  • GPIO_PCTL_PF3_LED0 : lm3s_gpio.h
  • GPIO_PCTL_PF3_M : lm3s_gpio.h
  • GPIO_PCTL_PF3_PWM3 : lm3s_gpio.h
  • GPIO_PCTL_PF3_PWM5 : lm3s_gpio.h
  • GPIO_PCTL_PF3_SSI1FSS : lm3s_gpio.h
  • GPIO_PCTL_PF4_C0O : lm3s_gpio.h
  • GPIO_PCTL_PF4_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PF4_EPI0S12 : lm3s_gpio.h
  • GPIO_PCTL_PF4_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PF4_M : lm3s_gpio.h
  • GPIO_PCTL_PF4_SSI1RX : lm3s_gpio.h
  • GPIO_PCTL_PF5_C1O : lm3s_gpio.h
  • GPIO_PCTL_PF5_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PF5_EPI0S15 : lm3s_gpio.h
  • GPIO_PCTL_PF5_M : lm3s_gpio.h
  • GPIO_PCTL_PF5_SSI1TX : lm3s_gpio.h
  • GPIO_PCTL_PF6_C2O : lm3s_gpio.h
  • GPIO_PCTL_PF6_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PF6_I2S0TXMCLK : lm3s_gpio.h
  • GPIO_PCTL_PF6_M : lm3s_gpio.h
  • GPIO_PCTL_PF6_PHA0 : lm3s_gpio.h
  • GPIO_PCTL_PF6_U1RTS : lm3s_gpio.h
  • GPIO_PCTL_PF7_CCP4 : lm3s_gpio.h
  • GPIO_PCTL_PF7_EPI0S12 : lm3s_gpio.h
  • GPIO_PCTL_PF7_FAULT1 : lm3s_gpio.h
  • GPIO_PCTL_PF7_M : lm3s_gpio.h
  • GPIO_PCTL_PF7_PHB0 : lm3s_gpio.h
  • GPIO_PCTL_PG0_EPI0S13 : lm3s_gpio.h
  • GPIO_PCTL_PG0_I2C1SCL : lm3s_gpio.h
  • GPIO_PCTL_PG0_M : lm3s_gpio.h
  • GPIO_PCTL_PG0_PWM0 : lm3s_gpio.h
  • GPIO_PCTL_PG0_PWM4 : lm3s_gpio.h
  • GPIO_PCTL_PG0_U2RX : lm3s_gpio.h
  • GPIO_PCTL_PG0_USB0EPEN : lm3s_gpio.h
  • GPIO_PCTL_PG1_EPI0S14 : lm3s_gpio.h
  • GPIO_PCTL_PG1_I2C1SDA : lm3s_gpio.h
  • GPIO_PCTL_PG1_M : lm3s_gpio.h
  • GPIO_PCTL_PG1_PWM1 : lm3s_gpio.h
  • GPIO_PCTL_PG1_PWM5 : lm3s_gpio.h
  • GPIO_PCTL_PG1_U2TX : lm3s_gpio.h
  • GPIO_PCTL_PG2_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PG2_I2S0RXSD : lm3s_gpio.h
  • GPIO_PCTL_PG2_IDX1 : lm3s_gpio.h
  • GPIO_PCTL_PG2_M : lm3s_gpio.h
  • GPIO_PCTL_PG2_PWM0 : lm3s_gpio.h
  • GPIO_PCTL_PG3_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PG3_FAULT2 : lm3s_gpio.h
  • GPIO_PCTL_PG3_I2S0RXMCLK : lm3s_gpio.h
  • GPIO_PCTL_PG3_M : lm3s_gpio.h
  • GPIO_PCTL_PG3_PWM1 : lm3s_gpio.h
  • GPIO_PCTL_PG4_CCP3 : lm3s_gpio.h
  • GPIO_PCTL_PG4_EPI0S15 : lm3s_gpio.h
  • GPIO_PCTL_PG4_FAULT1 : lm3s_gpio.h
  • GPIO_PCTL_PG4_M : lm3s_gpio.h
  • GPIO_PCTL_PG4_PWM6 : lm3s_gpio.h
  • GPIO_PCTL_PG4_U1RI : lm3s_gpio.h
  • GPIO_PCTL_PG5_CCP5 : lm3s_gpio.h
  • GPIO_PCTL_PG5_FAULT1 : lm3s_gpio.h
  • GPIO_PCTL_PG5_I2S0RXSCK : lm3s_gpio.h
  • GPIO_PCTL_PG5_IDX0 : lm3s_gpio.h
  • GPIO_PCTL_PG5_M : lm3s_gpio.h
  • GPIO_PCTL_PG5_PWM7 : lm3s_gpio.h
  • GPIO_PCTL_PG5_U1DTR : lm3s_gpio.h
  • GPIO_PCTL_PG6_FAULT1 : lm3s_gpio.h
  • GPIO_PCTL_PG6_I2S0RXWS : lm3s_gpio.h
  • GPIO_PCTL_PG6_M : lm3s_gpio.h
  • GPIO_PCTL_PG6_PHA1 : lm3s_gpio.h
  • GPIO_PCTL_PG6_PWM6 : lm3s_gpio.h
  • GPIO_PCTL_PG6_U1RI : lm3s_gpio.h
  • GPIO_PCTL_PG7_CCP5 : lm3s_gpio.h
  • GPIO_PCTL_PG7_EPI0S31 : lm3s_gpio.h
  • GPIO_PCTL_PG7_M : lm3s_gpio.h
  • GPIO_PCTL_PG7_PHB1 : lm3s_gpio.h
  • GPIO_PCTL_PG7_PWM7 : lm3s_gpio.h
  • GPIO_PCTL_PH0_CCP6 : lm3s_gpio.h
  • GPIO_PCTL_PH0_EPI0S6 : lm3s_gpio.h
  • GPIO_PCTL_PH0_M : lm3s_gpio.h
  • GPIO_PCTL_PH0_PWM2 : lm3s_gpio.h
  • GPIO_PCTL_PH0_PWM4 : lm3s_gpio.h
  • GPIO_PCTL_PH1_CCP7 : lm3s_gpio.h
  • GPIO_PCTL_PH1_EPI0S7 : lm3s_gpio.h
  • GPIO_PCTL_PH1_M : lm3s_gpio.h
  • GPIO_PCTL_PH1_PWM3 : lm3s_gpio.h
  • GPIO_PCTL_PH1_PWM5 : lm3s_gpio.h
  • GPIO_PCTL_PH2_C1O : lm3s_gpio.h
  • GPIO_PCTL_PH2_EPI0S1 : lm3s_gpio.h
  • GPIO_PCTL_PH2_FAULT3 : lm3s_gpio.h
  • GPIO_PCTL_PH2_IDX1 : lm3s_gpio.h
  • GPIO_PCTL_PH2_M : lm3s_gpio.h
  • GPIO_PCTL_PH3_EPI0S0 : lm3s_gpio.h
  • GPIO_PCTL_PH3_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PH3_M : lm3s_gpio.h
  • GPIO_PCTL_PH3_PHB0 : lm3s_gpio.h
  • GPIO_PCTL_PH3_USB0EPEN : lm3s_gpio.h
  • GPIO_PCTL_PH4_EPI0S10 : lm3s_gpio.h
  • GPIO_PCTL_PH4_M : lm3s_gpio.h
  • GPIO_PCTL_PH4_SSI1CLK : lm3s_gpio.h
  • GPIO_PCTL_PH4_USB0PFLT : lm3s_gpio.h
  • GPIO_PCTL_PH5_EPI0S11 : lm3s_gpio.h
  • GPIO_PCTL_PH5_FAULT2 : lm3s_gpio.h
  • GPIO_PCTL_PH5_M : lm3s_gpio.h
  • GPIO_PCTL_PH5_SSI1FSS : lm3s_gpio.h
  • GPIO_PCTL_PH6_EPI0S26 : lm3s_gpio.h
  • GPIO_PCTL_PH6_M : lm3s_gpio.h
  • GPIO_PCTL_PH6_PWM4 : lm3s_gpio.h
  • GPIO_PCTL_PH6_SSI1RX : lm3s_gpio.h
  • GPIO_PCTL_PH7_EPI0S27 : lm3s_gpio.h
  • GPIO_PCTL_PH7_M : lm3s_gpio.h
  • GPIO_PCTL_PH7_PWM5 : lm3s_gpio.h
  • GPIO_PCTL_PH7_SSI1TX : lm3s_gpio.h
  • GPIO_PCTL_PJ0_EPI0S16 : lm3s_gpio.h
  • GPIO_PCTL_PJ0_I2C1SCL : lm3s_gpio.h
  • GPIO_PCTL_PJ0_M : lm3s_gpio.h
  • GPIO_PCTL_PJ0_PWM0 : lm3s_gpio.h
  • GPIO_PCTL_PJ1_EPI0S17 : lm3s_gpio.h
  • GPIO_PCTL_PJ1_I2C1SDA : lm3s_gpio.h
  • GPIO_PCTL_PJ1_M : lm3s_gpio.h
  • GPIO_PCTL_PJ1_PWM1 : lm3s_gpio.h
  • GPIO_PCTL_PJ1_USB0PFLT : lm3s_gpio.h
  • GPIO_PCTL_PJ2_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PJ2_EPI0S18 : lm3s_gpio.h
  • GPIO_PCTL_PJ2_FAULT0 : lm3s_gpio.h
  • GPIO_PCTL_PJ2_M : lm3s_gpio.h
  • GPIO_PCTL_PJ3_CCP6 : lm3s_gpio.h
  • GPIO_PCTL_PJ3_EPI0S19 : lm3s_gpio.h
  • GPIO_PCTL_PJ3_M : lm3s_gpio.h
  • GPIO_PCTL_PJ3_U1CTS : lm3s_gpio.h
  • GPIO_PCTL_PJ4_CCP4 : lm3s_gpio.h
  • GPIO_PCTL_PJ4_EPI0S28 : lm3s_gpio.h
  • GPIO_PCTL_PJ4_M : lm3s_gpio.h
  • GPIO_PCTL_PJ4_U1DCD : lm3s_gpio.h
  • GPIO_PCTL_PJ5_CCP2 : lm3s_gpio.h
  • GPIO_PCTL_PJ5_EPI0S29 : lm3s_gpio.h
  • GPIO_PCTL_PJ5_M : lm3s_gpio.h
  • GPIO_PCTL_PJ5_U1DSR : lm3s_gpio.h
  • GPIO_PCTL_PJ6_CCP1 : lm3s_gpio.h
  • GPIO_PCTL_PJ6_EPI0S30 : lm3s_gpio.h
  • GPIO_PCTL_PJ6_M : lm3s_gpio.h
  • GPIO_PCTL_PJ6_U1RTS : lm3s_gpio.h
  • GPIO_PCTL_PJ7_CCP0 : lm3s_gpio.h
  • GPIO_PCTL_PJ7_M : lm3s_gpio.h
  • GPIO_PCTL_PJ7_U1DTR : lm3s_gpio.h
  • GPIO_PORTA_AFSEL_R : lm3s_com.h
  • GPIO_PORTA_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTA_BASE : lm3s_memmap.h
  • GPIO_PORTA_CR_R : lm3s_com.h
  • GPIO_PORTA_DATA_BITS_R : lm3s_com.h
  • GPIO_PORTA_DATA_R : lm3s_com.h
  • GPIO_PORTA_DEN_R : lm3s_com.h
  • GPIO_PORTA_DIR_R : lm3s_com.h
  • GPIO_PORTA_DR2R_R : lm3s_com.h
  • GPIO_PORTA_DR4R_R : lm3s_com.h
  • GPIO_PORTA_DR8R_R : lm3s_com.h
  • GPIO_PORTA_IBE_R : lm3s_com.h
  • GPIO_PORTA_ICR_R : lm3s_com.h
  • GPIO_PORTA_IEV_R : lm3s_com.h
  • GPIO_PORTA_IM_R : lm3s_com.h
  • GPIO_PORTA_IS_R : lm3s_com.h
  • GPIO_PORTA_LOCK_R : lm3s_com.h
  • GPIO_PORTA_MIS_R : lm3s_com.h
  • GPIO_PORTA_ODR_R : lm3s_com.h
  • GPIO_PORTA_PDR_R : lm3s_com.h
  • GPIO_PORTA_PUR_R : lm3s_com.h
  • GPIO_PORTA_RIS_R : lm3s_com.h
  • GPIO_PORTA_SLR_R : lm3s_com.h
  • GPIO_PORTB_AFSEL_R : lm3s_com.h
  • GPIO_PORTB_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTB_BASE : lm3s_memmap.h
  • GPIO_PORTB_CR_R : lm3s_com.h
  • GPIO_PORTB_DATA_BITS_R : lm3s_com.h
  • GPIO_PORTB_DATA_R : lm3s_com.h
  • GPIO_PORTB_DEN_R : lm3s_com.h
  • GPIO_PORTB_DIR_R : lm3s_com.h
  • GPIO_PORTB_DR2R_R : lm3s_com.h
  • GPIO_PORTB_DR4R_R : lm3s_com.h
  • GPIO_PORTB_DR8R_R : lm3s_com.h
  • GPIO_PORTB_IBE_R : lm3s_com.h
  • GPIO_PORTB_ICR_R : lm3s_com.h
  • GPIO_PORTB_IEV_R : lm3s_com.h
  • GPIO_PORTB_IM_R : lm3s_com.h
  • GPIO_PORTB_IS_R : lm3s_com.h
  • GPIO_PORTB_LOCK_R : lm3s_com.h
  • GPIO_PORTB_MIS_R : lm3s_com.h
  • GPIO_PORTB_ODR_R : lm3s_com.h
  • GPIO_PORTB_PDR_R : lm3s_com.h
  • GPIO_PORTB_PUR_R : lm3s_com.h
  • GPIO_PORTB_RIS_R : lm3s_com.h
  • GPIO_PORTB_SLR_R : lm3s_com.h
  • GPIO_PORTC_AFSEL_R : lm3s_com.h
  • GPIO_PORTC_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTC_BASE : lm3s_memmap.h
  • GPIO_PORTC_CR_R : lm3s_com.h
  • GPIO_PORTC_DATA_BITS_R : lm3s_com.h
  • GPIO_PORTC_DATA_R : lm3s_com.h
  • GPIO_PORTC_DEN_R : lm3s_com.h
  • GPIO_PORTC_DIR_R : lm3s_com.h
  • GPIO_PORTC_DR2R_R : lm3s_com.h
  • GPIO_PORTC_DR4R_R : lm3s_com.h
  • GPIO_PORTC_DR8R_R : lm3s_com.h
  • GPIO_PORTC_IBE_R : lm3s_com.h
  • GPIO_PORTC_ICR_R : lm3s_com.h
  • GPIO_PORTC_IEV_R : lm3s_com.h
  • GPIO_PORTC_IM_R : lm3s_com.h
  • GPIO_PORTC_IS_R : lm3s_com.h
  • GPIO_PORTC_LOCK_R : lm3s_com.h
  • GPIO_PORTC_MIS_R : lm3s_com.h
  • GPIO_PORTC_ODR_R : lm3s_com.h
  • GPIO_PORTC_PDR_R : lm3s_com.h
  • GPIO_PORTC_PUR_R : lm3s_com.h
  • GPIO_PORTC_RIS_R : lm3s_com.h
  • GPIO_PORTC_SLR_R : lm3s_com.h
  • GPIO_PORTD_AFSEL_R : lm3s_com.h
  • GPIO_PORTD_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTD_BASE : lm3s_memmap.h
  • GPIO_PORTD_CR_R : lm3s_com.h
  • GPIO_PORTD_DATA_BITS_R : lm3s_com.h
  • GPIO_PORTD_DATA_R : lm3s_com.h
  • GPIO_PORTD_DEN_R : lm3s_com.h
  • GPIO_PORTD_DIR_R : lm3s_com.h
  • GPIO_PORTD_DR2R_R : lm3s_com.h
  • GPIO_PORTD_DR4R_R : lm3s_com.h
  • GPIO_PORTD_DR8R_R : lm3s_com.h
  • GPIO_PORTD_IBE_R : lm3s_com.h
  • GPIO_PORTD_ICR_R : lm3s_com.h
  • GPIO_PORTD_IEV_R : lm3s_com.h
  • GPIO_PORTD_IM_R : lm3s_com.h
  • GPIO_PORTD_IS_R : lm3s_com.h
  • GPIO_PORTD_LOCK_R : lm3s_com.h
  • GPIO_PORTD_MIS_R : lm3s_com.h
  • GPIO_PORTD_ODR_R : lm3s_com.h
  • GPIO_PORTD_PDR_R : lm3s_com.h
  • GPIO_PORTD_PUR_R : lm3s_com.h
  • GPIO_PORTD_RIS_R : lm3s_com.h
  • GPIO_PORTD_SLR_R : lm3s_com.h
  • GPIO_PORTE_AFSEL_R : lm3s_com.h
  • GPIO_PORTE_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTE_BASE : lm3s_memmap.h
  • GPIO_PORTE_CR_R : lm3s_com.h
  • GPIO_PORTE_DATA_BITS_R : lm3s_com.h
  • GPIO_PORTE_DATA_R : lm3s_com.h
  • GPIO_PORTE_DEN_R : lm3s_com.h
  • GPIO_PORTE_DIR_R : lm3s_com.h
  • GPIO_PORTE_DR2R_R : lm3s_com.h
  • GPIO_PORTE_DR4R_R : lm3s_com.h
  • GPIO_PORTE_DR8R_R : lm3s_com.h
  • GPIO_PORTE_IBE_R : lm3s_com.h
  • GPIO_PORTE_ICR_R : lm3s_com.h
  • GPIO_PORTE_IEV_R : lm3s_com.h
  • GPIO_PORTE_IM_R : lm3s_com.h
  • GPIO_PORTE_IS_R : lm3s_com.h
  • GPIO_PORTE_LOCK_R : lm3s_com.h
  • GPIO_PORTE_MIS_R : lm3s_com.h
  • GPIO_PORTE_ODR_R : lm3s_com.h
  • GPIO_PORTE_PDR_R : lm3s_com.h
  • GPIO_PORTE_PUR_R : lm3s_com.h
  • GPIO_PORTE_RIS_R : lm3s_com.h
  • GPIO_PORTE_SLR_R : lm3s_com.h
  • GPIO_PORTF_AFSEL_R : lm3s_com.h
  • GPIO_PORTF_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTF_BASE : lm3s_memmap.h
  • GPIO_PORTF_CR_R : lm3s_com.h
  • GPIO_PORTF_DATA_BITS_R : lm3s_com.h
  • GPIO_PORTF_DATA_R : lm3s_com.h
  • GPIO_PORTF_DEN_R : lm3s_com.h
  • GPIO_PORTF_DIR_R : lm3s_com.h
  • GPIO_PORTF_DR2R_R : lm3s_com.h
  • GPIO_PORTF_DR4R_R : lm3s_com.h
  • GPIO_PORTF_DR8R_R : lm3s_com.h
  • GPIO_PORTF_IBE_R : lm3s_com.h
  • GPIO_PORTF_ICR_R : lm3s_com.h
  • GPIO_PORTF_IEV_R : lm3s_com.h
  • GPIO_PORTF_IM_R : lm3s_com.h
  • GPIO_PORTF_IS_R : lm3s_com.h
  • GPIO_PORTF_LOCK_R : lm3s_com.h
  • GPIO_PORTF_MIS_R : lm3s_com.h
  • GPIO_PORTF_ODR_R : lm3s_com.h
  • GPIO_PORTF_PDR_R : lm3s_com.h
  • GPIO_PORTF_PUR_R : lm3s_com.h
  • GPIO_PORTF_RIS_R : lm3s_com.h
  • GPIO_PORTF_SLR_R : lm3s_com.h
  • GPIO_PORTG_AFSEL_R : lm3s_com.h
  • GPIO_PORTG_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTG_BASE : lm3s_memmap.h
  • GPIO_PORTG_CR_R : lm3s_com.h
  • GPIO_PORTG_DATA_BITS_R : lm3s_com.h
  • GPIO_PORTG_DATA_R : lm3s_com.h
  • GPIO_PORTG_DEN_R : lm3s_com.h
  • GPIO_PORTG_DIR_R : lm3s_com.h
  • GPIO_PORTG_DR2R_R : lm3s_com.h
  • GPIO_PORTG_DR4R_R : lm3s_com.h
  • GPIO_PORTG_DR8R_R : lm3s_com.h
  • GPIO_PORTG_IBE_R : lm3s_com.h
  • GPIO_PORTG_ICR_R : lm3s_com.h
  • GPIO_PORTG_IEV_R : lm3s_com.h
  • GPIO_PORTG_IM_R : lm3s_com.h
  • GPIO_PORTG_IS_R : lm3s_com.h
  • GPIO_PORTG_LOCK_R : lm3s_com.h
  • GPIO_PORTG_MIS_R : lm3s_com.h
  • GPIO_PORTG_ODR_R : lm3s_com.h
  • GPIO_PORTG_PDR_R : lm3s_com.h
  • GPIO_PORTG_PUR_R : lm3s_com.h
  • GPIO_PORTG_RIS_R : lm3s_com.h
  • GPIO_PORTG_SLR_R : lm3s_com.h
  • GPIO_PORTH_AFSEL_R : lm3s_com.h
  • GPIO_PORTH_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTH_BASE : lm3s_memmap.h
  • GPIO_PORTH_CR_R : lm3s_com.h
  • GPIO_PORTH_DATA_BITS_R : lm3s_com.h
  • GPIO_PORTH_DATA_R : lm3s_com.h
  • GPIO_PORTH_DEN_R : lm3s_com.h
  • GPIO_PORTH_DIR_R : lm3s_com.h
  • GPIO_PORTH_DR2R_R : lm3s_com.h
  • GPIO_PORTH_DR4R_R : lm3s_com.h
  • GPIO_PORTH_DR8R_R : lm3s_com.h
  • GPIO_PORTH_IBE_R : lm3s_com.h
  • GPIO_PORTH_ICR_R : lm3s_com.h
  • GPIO_PORTH_IEV_R : lm3s_com.h
  • GPIO_PORTH_IM_R : lm3s_com.h
  • GPIO_PORTH_IS_R : lm3s_com.h
  • GPIO_PORTH_LOCK_R : lm3s_com.h
  • GPIO_PORTH_MIS_R : lm3s_com.h
  • GPIO_PORTH_ODR_R : lm3s_com.h
  • GPIO_PORTH_PDR_R : lm3s_com.h
  • GPIO_PORTH_PUR_R : lm3s_com.h
  • GPIO_PORTH_RIS_R : lm3s_com.h
  • GPIO_PORTH_SLR_R : lm3s_com.h
  • GPIO_PORTJ_AHB_BASE : lm3s_memmap.h
  • GPIO_PORTJ_BASE : lm3s_memmap.h
  • GPIO_RV_AFSEL : lm3s_gpio.h
  • GPIO_RV_DATA : lm3s_gpio.h
  • GPIO_RV_DEN : lm3s_gpio.h
  • GPIO_RV_DIR : lm3s_gpio.h
  • GPIO_RV_DR2R : lm3s_gpio.h
  • GPIO_RV_DR4R : lm3s_gpio.h
  • GPIO_RV_DR8R : lm3s_gpio.h
  • GPIO_RV_IBE : lm3s_gpio.h
  • GPIO_RV_IC : lm3s_gpio.h
  • GPIO_RV_IEV : lm3s_gpio.h
  • GPIO_RV_IM : lm3s_gpio.h
  • GPIO_RV_IS : lm3s_gpio.h
  • GPIO_RV_LOCK : lm3s_gpio.h
  • GPIO_RV_MIS : lm3s_gpio.h
  • GPIO_RV_ODR : lm3s_gpio.h
  • GPIO_RV_PCellID0 : lm3s_gpio.h
  • GPIO_RV_PCellID1 : lm3s_gpio.h
  • GPIO_RV_PCellID2 : lm3s_gpio.h
  • GPIO_RV_PCellID3 : lm3s_gpio.h
  • GPIO_RV_PDR : lm3s_gpio.h
  • GPIO_RV_PeriphID0 : lm3s_gpio.h
  • GPIO_RV_PeriphID1 : lm3s_gpio.h
  • GPIO_RV_PeriphID2 : lm3s_gpio.h
  • GPIO_RV_PeriphID3 : lm3s_gpio.h
  • GPIO_RV_PeriphID4 : lm3s_gpio.h
  • GPIO_RV_PeriphID5 : lm3s_gpio.h
  • GPIO_RV_PeriphID6 : lm3s_gpio.h
  • GPIO_RV_PeriphID7 : lm3s_gpio.h
  • GPIO_RV_PUR : lm3s_gpio.h
  • GPIO_RV_RIS : lm3s_gpio.h
  • GPIO_RV_SLR : lm3s_gpio.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- h -

  • HEAP_DEFINE_BUF : heap.h
  • HIB_BASE : lm3s_memmap.h
  • HIB_CTL_CLK32EN : lm3s_com.h
  • HIB_CTL_CLKSEL : lm3s_com.h
  • HIB_CTL_HIBREQ : lm3s_com.h
  • HIB_CTL_LOWBATEN : lm3s_com.h
  • HIB_CTL_PINWEN : lm3s_com.h
  • HIB_CTL_R : lm3s_com.h
  • HIB_CTL_RTCEN : lm3s_com.h
  • HIB_CTL_RTCWEN : lm3s_com.h
  • HIB_CTL_VABORT : lm3s_com.h
  • HIB_DATA_R : lm3s_com.h
  • HIB_DATA_RTD_M : lm3s_com.h
  • HIB_DATA_RTD_S : lm3s_com.h
  • HIB_IC_EXTW : lm3s_com.h
  • HIB_IC_LOWBAT : lm3s_com.h
  • HIB_IC_R : lm3s_com.h
  • HIB_IC_RTCALT0 : lm3s_com.h
  • HIB_IC_RTCALT1 : lm3s_com.h
  • HIB_IM_EXTW : lm3s_com.h
  • HIB_IM_LOWBAT : lm3s_com.h
  • HIB_IM_R : lm3s_com.h
  • HIB_IM_RTCALT0 : lm3s_com.h
  • HIB_IM_RTCALT1 : lm3s_com.h
  • HIB_MIS_EXTW : lm3s_com.h
  • HIB_MIS_LOWBAT : lm3s_com.h
  • HIB_MIS_R : lm3s_com.h
  • HIB_MIS_RTCALT0 : lm3s_com.h
  • HIB_MIS_RTCALT1 : lm3s_com.h
  • HIB_RIS_EXTW : lm3s_com.h
  • HIB_RIS_LOWBAT : lm3s_com.h
  • HIB_RIS_R : lm3s_com.h
  • HIB_RIS_RTCALT0 : lm3s_com.h
  • HIB_RIS_RTCALT1 : lm3s_com.h
  • HIB_RTCC_M : lm3s_com.h
  • HIB_RTCC_R : lm3s_com.h
  • HIB_RTCC_S : lm3s_com.h
  • HIB_RTCLD_M : lm3s_com.h
  • HIB_RTCLD_R : lm3s_com.h
  • HIB_RTCLD_S : lm3s_com.h
  • HIB_RTCM0_M : lm3s_com.h
  • HIB_RTCM0_R : lm3s_com.h
  • HIB_RTCM0_S : lm3s_com.h
  • HIB_RTCM1_M : lm3s_com.h
  • HIB_RTCM1_R : lm3s_com.h
  • HIB_RTCM1_S : lm3s_com.h
  • HIB_RTCT_R : lm3s_com.h
  • HIB_RTCT_TRIM_M : lm3s_com.h
  • HIB_RTCT_TRIM_S : lm3s_com.h
  • HSI_VALUE : clock_stm32.h
  • HSION_BITNUMBER : clock_stm32.h
  • ht_find_str : hashtable.h
  • ht_insert_str : hashtable.h
  • HW_DC_MOTOR_READ_VALUE : hw_dc_motor.h
  • HWREG : types.h
  • HWREGB : types.h
  • HWREGH : types.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- i -

  • I2C0_MASTER_BASE : lm3s_memmap.h
  • I2C0_MASTER_MCR_R : lm3s_com.h
  • I2C0_MASTER_MCS_R : lm3s_com.h
  • I2C0_MASTER_MDR_R : lm3s_com.h
  • I2C0_MASTER_MICR_R : lm3s_com.h
  • I2C0_MASTER_MIMR_R : lm3s_com.h
  • I2C0_MASTER_MMIS_R : lm3s_com.h
  • I2C0_MASTER_MRIS_R : lm3s_com.h
  • I2C0_MASTER_MSA_R : lm3s_com.h
  • I2C0_MASTER_MTPR_R : lm3s_com.h
  • I2C0_MASTER_SCSR_R : lm3s_com.h
  • I2C0_MASTER_SDR_R : lm3s_com.h
  • I2C0_MASTER_SICR_R : lm3s_com.h
  • I2C0_MASTER_SIMR_R : lm3s_com.h
  • I2C0_MASTER_SMIS_R : lm3s_com.h
  • I2C0_MASTER_SOAR_R : lm3s_com.h
  • I2C0_MASTER_SRIS_R : lm3s_com.h
  • I2C0_SLAVE_BASE : lm3s_memmap.h
  • I2C0_SLAVE_MCR_R : lm3s_com.h
  • I2C0_SLAVE_MCS_R : lm3s_com.h
  • I2C0_SLAVE_MDR_R : lm3s_com.h
  • I2C0_SLAVE_MICR_R : lm3s_com.h
  • I2C0_SLAVE_MIMR_R : lm3s_com.h
  • I2C0_SLAVE_MMIS_R : lm3s_com.h
  • I2C0_SLAVE_MRIS_R : lm3s_com.h
  • I2C0_SLAVE_MSA_R : lm3s_com.h
  • I2C0_SLAVE_MTPR_R : lm3s_com.h
  • I2C0_SLAVE_SCSR_R : lm3s_com.h
  • I2C0_SLAVE_SDR_R : lm3s_com.h
  • I2C0_SLAVE_SICR_R : lm3s_com.h
  • I2C0_SLAVE_SIMR_R : lm3s_com.h
  • I2C0_SLAVE_SMIS_R : lm3s_com.h
  • I2C0_SLAVE_SOAR_R : lm3s_com.h
  • I2C0_SLAVE_SRIS_R : lm3s_com.h
  • I2C1_ER_IRQHANDLER : stm32_ints.h
  • I2C1_EV_IRQHANDLER : stm32_ints.h
  • I2C1_MASTER_BASE : lm3s_memmap.h
  • I2C1_MASTER_MCR_R : lm3s_com.h
  • I2C1_MASTER_MCS_R : lm3s_com.h
  • I2C1_MASTER_MDR_R : lm3s_com.h
  • I2C1_MASTER_MICR_R : lm3s_com.h
  • I2C1_MASTER_MIMR_R : lm3s_com.h
  • I2C1_MASTER_MMIS_R : lm3s_com.h
  • I2C1_MASTER_MRIS_R : lm3s_com.h
  • I2C1_MASTER_MSA_R : lm3s_com.h
  • I2C1_MASTER_MTPR_R : lm3s_com.h
  • I2C1_MASTER_SCSR_R : lm3s_com.h
  • I2C1_MASTER_SDR_R : lm3s_com.h
  • I2C1_MASTER_SICR_R : lm3s_com.h
  • I2C1_MASTER_SIMR_R : lm3s_com.h
  • I2C1_MASTER_SMIS_R : lm3s_com.h
  • I2C1_MASTER_SOAR_R : lm3s_com.h
  • I2C1_MASTER_SRIS_R : lm3s_com.h
  • I2C1_SLAVE_BASE : lm3s_memmap.h
  • I2C1_SLAVE_MCR_R : lm3s_com.h
  • I2C1_SLAVE_MCS_R : lm3s_com.h
  • I2C1_SLAVE_MDR_R : lm3s_com.h
  • I2C1_SLAVE_MICR_R : lm3s_com.h
  • I2C1_SLAVE_MIMR_R : lm3s_com.h
  • I2C1_SLAVE_MMIS_R : lm3s_com.h
  • I2C1_SLAVE_MRIS_R : lm3s_com.h
  • I2C1_SLAVE_MSA_R : lm3s_com.h
  • I2C1_SLAVE_MTPR_R : lm3s_com.h
  • I2C1_SLAVE_SCSR_R : lm3s_com.h
  • I2C1_SLAVE_SDR_R : lm3s_com.h
  • I2C1_SLAVE_SICR_R : lm3s_com.h
  • I2C1_SLAVE_SIMR_R : lm3s_com.h
  • I2C1_SLAVE_SMIS_R : lm3s_com.h
  • I2C1_SLAVE_SOAR_R : lm3s_com.h
  • I2C1_SLAVE_SRIS_R : lm3s_com.h
  • I2C2_ER_IRQHANDLER : stm32_ints.h
  • I2C2_EV_IRQHANDLER : stm32_ints.h
  • I2C_ARB_LOST : i2c.h
  • I2C_BACKEND_BITBANG : i2c.h
  • I2C_BACKEND_BUILTIN : i2c.h
  • I2C_BITBANG_HW_INIT : hw_i2c_bitbang.h
  • I2C_DATA_NACK : i2c.h
  • I2C_ERR : i2c.h
  • I2C_HALFBIT_DELAY : hw_i2c_bitbang.h
  • i2c_init : i2c.h
  • i2c_init_3 : i2c.h
  • I2C_LOG_FORMAT : cfg_i2c.h
  • I2C_LOG_LEVEL : cfg_i2c.h
  • I2C_MASTER_CR_LPBK : lm3s_i2c.h
  • I2C_MASTER_CR_MFE : lm3s_i2c.h
  • I2C_MASTER_CR_SFE : lm3s_i2c.h
  • I2C_MASTER_CS_ACK : lm3s_i2c.h
  • I2C_MASTER_CS_ADDR_ACK : lm3s_i2c.h
  • I2C_MASTER_CS_ARB_LOST : lm3s_i2c.h
  • I2C_MASTER_CS_BUS_BUSY : lm3s_i2c.h
  • I2C_MASTER_CS_BUSY : lm3s_i2c.h
  • I2C_MASTER_CS_DATA_ACK : lm3s_i2c.h
  • I2C_MASTER_CS_ERROR : lm3s_i2c.h
  • I2C_MASTER_CS_IDLE : lm3s_i2c.h
  • I2C_MASTER_CS_RUN : lm3s_i2c.h
  • I2C_MASTER_CS_START : lm3s_i2c.h
  • I2C_MASTER_CS_STOP : lm3s_i2c.h
  • I2C_MASTER_IMR_IM : lm3s_i2c.h
  • I2C_MASTER_MICR_IC : lm3s_i2c.h
  • I2C_MASTER_MIS_MIS : lm3s_i2c.h
  • I2C_MASTER_O_CR : lm3s_i2c.h
  • I2C_MASTER_O_CS : lm3s_i2c.h
  • I2C_MASTER_O_DR : lm3s_i2c.h
  • I2C_MASTER_O_IMR : lm3s_i2c.h
  • I2C_MASTER_O_MICR : lm3s_i2c.h
  • I2C_MASTER_O_MIS : lm3s_i2c.h
  • I2C_MASTER_O_RIS : lm3s_i2c.h
  • I2C_MASTER_O_SA : lm3s_i2c.h
  • I2C_MASTER_O_TPR : lm3s_i2c.h
  • I2C_MASTER_RIS_RIS : lm3s_i2c.h
  • I2C_MASTER_SA_RS : lm3s_i2c.h
  • I2C_MASTER_SA_SA_MASK : lm3s_i2c.h
  • I2C_MASTER_TPR_SCL_HP : lm3s_i2c.h
  • I2C_MASTER_TPR_SCL_LP : lm3s_i2c.h
  • I2C_MCR_LPBK : lm3s_com.h , lm3s_i2c.h
  • I2C_MCR_MFE : lm3s_com.h , lm3s_i2c.h
  • I2C_MCR_SFE : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_ACK : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_ADRACK : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_ARBLST : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_BUSBSY : lm3s_i2c.h , lm3s_com.h
  • I2C_MCS_BUSY : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_DATACK : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_ERROR : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_IDLE : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_RUN : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_START : lm3s_com.h , lm3s_i2c.h
  • I2C_MCS_STOP : lm3s_com.h , lm3s_i2c.h
  • I2C_MDR_DATA_M : lm3s_com.h , lm3s_i2c.h
  • I2C_MDR_DATA_S : lm3s_com.h
  • I2C_MICR_IC : lm3s_com.h , lm3s_i2c.h
  • I2C_MIMR_IM : lm3s_com.h , lm3s_i2c.h
  • I2C_MMIS_MIS : lm3s_com.h , lm3s_i2c.h
  • I2C_MRIS_RIS : lm3s_com.h , lm3s_i2c.h
  • I2C_MSA_ADDR : lm3s_i2c.h
  • I2C_MSA_ADDS : lm3s_i2c.h
  • I2C_MSA_RS : lm3s_com.h , lm3s_i2c.h
  • I2C_MSA_SA_M : lm3s_com.h , lm3s_i2c.h
  • I2C_MSA_SA_S : lm3s_com.h
  • I2C_MTPR_TPR_M : lm3s_com.h , lm3s_i2c.h
  • I2C_MTPR_TPR_S : lm3s_com.h
  • I2C_NO_ACK : i2c.h
  • I2C_NOSTOP : i2c.h
  • I2C_O_MCR : lm3s_i2c.h
  • I2C_O_MCS : lm3s_i2c.h
  • I2C_O_MDR : lm3s_i2c.h
  • I2C_O_MICR : lm3s_i2c.h
  • I2C_O_MIMR : lm3s_i2c.h
  • I2C_O_MMIS : lm3s_i2c.h
  • I2C_O_MRIS : lm3s_i2c.h
  • I2C_O_MSA : lm3s_i2c.h
  • I2C_O_MTPR : lm3s_i2c.h
  • I2C_O_SCSR : lm3s_i2c.h
  • I2C_O_SDR : lm3s_i2c.h
  • I2C_O_SICR : lm3s_i2c.h
  • I2C_O_SIMR : lm3s_i2c.h
  • I2C_O_SLAVE : lm3s_i2c.h
  • I2C_O_SMIS : lm3s_i2c.h
  • I2C_O_SOAR : lm3s_i2c.h
  • I2C_O_SRIS : lm3s_i2c.h
  • I2C_OK : i2c.h
  • I2C_SCL_FAST : lm3s_i2c.h
  • I2C_SCL_STANDARD : lm3s_i2c.h
  • I2C_SCSR_DA : lm3s_i2c.h , lm3s_com.h
  • I2C_SCSR_FBR : lm3s_com.h , lm3s_i2c.h
  • I2C_SCSR_RREQ : lm3s_i2c.h , lm3s_com.h
  • I2C_SCSR_TREQ : lm3s_com.h , lm3s_i2c.h
  • I2C_SDR_DATA_M : lm3s_com.h , lm3s_i2c.h
  • I2C_SDR_DATA_S : lm3s_com.h
  • I2C_SICR_DATAIC : lm3s_com.h , lm3s_i2c.h
  • I2C_SICR_IC : lm3s_com.h , lm3s_i2c.h
  • I2C_SICR_STARTIC : lm3s_i2c.h
  • I2C_SICR_STOPIC : lm3s_i2c.h
  • I2C_SIMR_DATAIM : lm3s_com.h , lm3s_i2c.h
  • I2C_SIMR_IM : lm3s_com.h , lm3s_i2c.h
  • I2C_SIMR_STARTIM : lm3s_i2c.h
  • I2C_SIMR_STOPIM : lm3s_i2c.h
  • I2C_SLAVE_CSR_DA : lm3s_i2c.h
  • I2C_SLAVE_CSR_FBR : lm3s_i2c.h
  • I2C_SLAVE_CSR_RREQ : lm3s_i2c.h
  • I2C_SLAVE_CSR_TREQ : lm3s_i2c.h
  • I2C_SLAVE_IMR_IM : lm3s_i2c.h
  • I2C_SLAVE_MIS_MIS : lm3s_i2c.h
  • I2C_SLAVE_O_CSR : lm3s_i2c.h
  • I2C_SLAVE_O_DR : lm3s_i2c.h
  • I2C_SLAVE_O_IM : lm3s_i2c.h
  • I2C_SLAVE_O_MIS : lm3s_i2c.h
  • I2C_SLAVE_O_OAR : lm3s_i2c.h
  • I2C_SLAVE_O_RIS : lm3s_i2c.h
  • I2C_SLAVE_O_SICR : lm3s_i2c.h
  • I2C_SLAVE_RIS_RIS : lm3s_i2c.h
  • I2C_SLAVE_SICR_IC : lm3s_i2c.h
  • I2C_SLAVE_SOAR_OAR_MASK : lm3s_i2c.h
  • I2C_SMIS_DATAMIS : lm3s_com.h , lm3s_i2c.h
  • I2C_SMIS_MIS : lm3s_com.h , lm3s_i2c.h
  • I2C_SMIS_STARTMIS : lm3s_i2c.h
  • I2C_SMIS_STOPMIS : lm3s_i2c.h
  • I2C_SOAR_OAR_M : lm3s_com.h , lm3s_i2c.h
  • I2C_SOAR_OAR_S : lm3s_com.h
  • I2C_SRIS_DATARIS : lm3s_i2c.h , lm3s_com.h
  • I2C_SRIS_RIS : lm3s_i2c.h , lm3s_com.h
  • I2C_SRIS_STARTRIS : lm3s_i2c.h
  • I2C_SRIS_STOPRIS : lm3s_i2c.h
  • i2c_start_r : i2c.h
  • I2C_START_TIMEOUT : i2c.h
  • i2c_start_w : i2c.h
  • I2C_STOP : i2c.h
  • I2S0_BASE : lm3s_memmap.h
  • I2S_FIRST_BUF : i2s_at91.h
  • I2S_LOG_FORMAT : cfg_i2s.h
  • I2S_LOG_LEVEL : cfg_i2s.h
  • I2S_SECOND_BUF : i2s_at91.h
  • ICMP_DEBUG : cfg_lwip.h
  • ICMP_TTL : cfg_lwip.h
  • IGMP_DEBUG : cfg_lwip.h
  • INET_DEBUG : cfg_lwip.h
  • INSERT_BEFORE : list.h
  • INT_ADC0 : lm3s_ints.h
  • INT_ADC1 : lm3s_ints.h
  • INT_ADC1SS0 : lm3s_ints.h
  • INT_ADC1SS1 : lm3s_ints.h
  • INT_ADC1SS2 : lm3s_ints.h
  • INT_ADC1SS3 : lm3s_ints.h
  • INT_ADC2 : lm3s_ints.h
  • INT_ADC3 : lm3s_ints.h
  • INT_CAN0 : lm3s_ints.h
  • INT_CAN1 : lm3s_ints.h
  • INT_CAN2 : lm3s_ints.h
  • INT_COMP0 : lm3s_ints.h
  • INT_COMP1 : lm3s_ints.h
  • INT_COMP2 : lm3s_ints.h
  • INT_EPI0 : lm3s_ints.h
  • INT_ETH : lm3s_ints.h
  • INT_FLASH : lm3s_ints.h
  • INT_GPIOA : lm3s_ints.h
  • INT_GPIOB : lm3s_ints.h
  • INT_GPIOC : lm3s_ints.h
  • INT_GPIOD : lm3s_ints.h
  • INT_GPIOE : lm3s_ints.h
  • INT_GPIOF : lm3s_ints.h
  • INT_GPIOG : lm3s_ints.h
  • INT_GPIOH : lm3s_ints.h
  • INT_GPIOJ : lm3s_ints.h
  • INT_HIBERNATE : lm3s_ints.h
  • INT_I2C0 : lm3s_ints.h
  • INT_I2C1 : lm3s_ints.h
  • INT_I2S0 : lm3s_ints.h
  • INT_MULT : macros.h
  • INT_PERIPH_BASE : sam3_ints.h
  • INT_PWM0 : lm3s_ints.h
  • INT_PWM1 : lm3s_ints.h
  • INT_PWM2 : lm3s_ints.h
  • INT_PWM3 : lm3s_ints.h
  • INT_PWM_FAULT : lm3s_ints.h
  • INT_QEI0 : lm3s_ints.h
  • INT_QEI1 : lm3s_ints.h
  • INT_SSI0 : lm3s_ints.h
  • INT_SSI1 : lm3s_ints.h
  • INT_SYSCTL : lm3s_ints.h
  • INT_TIMER0A : lm3s_ints.h
  • INT_TIMER0B : lm3s_ints.h
  • INT_TIMER1A : lm3s_ints.h
  • INT_TIMER1B : lm3s_ints.h
  • INT_TIMER2A : lm3s_ints.h
  • INT_TIMER2B : lm3s_ints.h
  • INT_TIMER3A : lm3s_ints.h
  • INT_TIMER3B : lm3s_ints.h
  • INT_UART0 : lm3s_ints.h
  • INT_UART1 : lm3s_ints.h
  • INT_UART2 : lm3s_ints.h
  • INT_UDMA : lm3s_ints.h
  • INT_UDMAERR : lm3s_ints.h
  • INT_USB0 : lm3s_ints.h
  • INT_WATCHDOG : lm3s_ints.h
  • INTERNAL_KEY_MAX_LENGTH : hashtable.h
  • IP_DEBUG : cfg_lwip.h
  • IP_DEFAULT_TTL : cfg_lwip.h
  • IP_FORWARD : cfg_lwip.h
  • IP_FRAG : cfg_lwip.h
  • IP_FRAG_MAX_MTU : cfg_lwip.h
  • IP_FRAG_USES_STATIC_BUF : cfg_lwip.h
  • IP_OPTIONS_ALLOWED : cfg_lwip.h
  • IP_REASS_DEBUG : cfg_lwip.h
  • IP_REASS_MAX_PBUFS : cfg_lwip.h
  • IP_REASS_MAXAGE : cfg_lwip.h
  • IP_REASSEMBLY : cfg_lwip.h
  • IP_SOF_BROADCAST : cfg_lwip.h
  • IP_SOF_BROADCAST_RECV : cfg_lwip.h
  • IS_CTS_ON : ser_xmega.c , ser_mega.c
  • IS_MISO_HIGH : hw_spi.h
  • IS_POW2 : macros.h
  • IS_WORD_SEPARATOR : readline.c
  • ITM_BASE : lm3s_memmap.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- p -

  • PAGE_UNSET_SENTINEL : battfs.h
  • PAUSE : attr.h
  • PBUF_DEBUG : cfg_lwip.h
  • PBUF_LINK_HLEN : cfg_lwip.h
  • PBUF_POOL_BUFSIZE : cfg_lwip.h
  • PBUF_POOL_SIZE : cfg_lwip.h
  • PCF8574ID : pcf8574.h
  • PF_FREESTACK : proc_p.h
  • PICNT_MASK : at91_pit.h
  • PICNT_SHIFT : at91_pit.h
  • PID_LOG_FORMAT : cfg_pid.h
  • PID_LOG_LEVEL : cfg_pid.h
  • PIIR : at91_pit.h
  • PIIR_OFF : at91_pit.h
  • PIO_CODR_OFF : sam3_pio.h , at91_pio.h
  • PIO_IDR_OFF : at91_pio.h , sam3_pio.h
  • PIO_IER_OFF : at91_pio.h , sam3_pio.h
  • PIO_IFDR_OFF : at91_pio.h , sam3_pio.h
  • PIO_IFER_OFF : at91_pio.h , sam3_pio.h
  • PIO_IFSR_OFF : at91_pio.h , sam3_pio.h
  • PIO_IMR_OFF : at91_pio.h , sam3_pio.h
  • PIO_ISR_OFF : at91_pio.h , sam3_pio.h
  • PIO_MDDR_OFF : sam3_pio.h
  • PIO_MDER_OFF : sam3_pio.h
  • PIO_MDSR_OFF : sam3_pio.h
  • PIO_ODR_OFF : at91_pio.h , sam3_pio.h
  • PIO_ODSR_OFF : at91_pio.h , sam3_pio.h
  • PIO_OER_OFF : at91_pio.h , sam3_pio.h
  • PIO_OSR_OFF : at91_pio.h , sam3_pio.h
  • PIO_OWDR_OFF : sam3_pio.h
  • PIO_OWER_OFF : sam3_pio.h
  • PIO_OWSR_OFF : sam3_pio.h
  • PIO_PDR_OFF : at91_pio.h , sam3_pio.h
  • PIO_PDSR_OFF : at91_pio.h , sam3_pio.h
  • PIO_PER_OFF : at91_pio.h , sam3_pio.h
  • PIO_PERIPH_SEL : sam3_pio.h
  • PIO_PSR_OFF : at91_pio.h , sam3_pio.h
  • PIO_PUDR_OFF : sam3_pio.h
  • PIO_PUER_OFF : sam3_pio.h
  • PIO_PUSR_OFF : sam3_pio.h
  • PIO_SODR_OFF : at91_pio.h , sam3_pio.h
  • PIOA_ABCDSR1 : sam3_pio.h
  • PIOA_ABCDSR2 : sam3_pio.h
  • PIOA_ACCESS : sam3_pio.h
  • PIOA_BASE : sam3_pio.h
  • PIOA_CODR : sam3_pio.h
  • PIOA_IDR : sam3_pio.h
  • PIOA_IER : sam3_pio.h
  • PIOA_IFDR : sam3_pio.h
  • PIOA_IFER : sam3_pio.h
  • PIOA_IFSR : sam3_pio.h
  • PIOA_IMR : sam3_pio.h
  • PIOA_ISR : sam3_pio.h
  • PIOA_MDDR : sam3_pio.h
  • PIOA_MDER : sam3_pio.h
  • PIOA_MDSR : sam3_pio.h
  • PIOA_ODR : sam3_pio.h
  • PIOA_ODSR : sam3_pio.h
  • PIOA_OER : sam3_pio.h
  • PIOA_OSR : sam3_pio.h
  • PIOA_OWDR : sam3_pio.h
  • PIOA_OWER : sam3_pio.h
  • PIOA_OWSR : sam3_pio.h
  • PIOA_PDR : sam3_pio.h
  • PIOA_PDSR : sam3_pio.h
  • PIOA_PER : sam3_pio.h
  • PIOA_PSR : sam3_pio.h
  • PIOA_PUDR : sam3_pio.h
  • PIOA_PUER : sam3_pio.h
  • PIOA_PUSR : sam3_pio.h
  • PIOA_SODR : sam3_pio.h
  • PIOB_ABCDSR1 : sam3_pio.h
  • PIOB_ABCDSR2 : sam3_pio.h
  • PIOB_ACCESS : sam3_pio.h
  • PIOB_BASE : sam3_pio.h
  • PIOB_CODR : sam3_pio.h
  • PIOB_IDR : sam3_pio.h
  • PIOB_IER : sam3_pio.h
  • PIOB_IFDR : sam3_pio.h
  • PIOB_IFER : sam3_pio.h
  • PIOB_IFSR : sam3_pio.h
  • PIOB_IMR : sam3_pio.h
  • PIOB_ISR : sam3_pio.h
  • PIOB_MDDR : sam3_pio.h
  • PIOB_MDER : sam3_pio.h
  • PIOB_MDSR : sam3_pio.h
  • PIOB_ODR : sam3_pio.h
  • PIOB_ODSR : sam3_pio.h
  • PIOB_OER : sam3_pio.h
  • PIOB_OSR : sam3_pio.h
  • PIOB_OWDR : sam3_pio.h
  • PIOB_OWER : sam3_pio.h
  • PIOB_OWSR : sam3_pio.h
  • PIOB_PDR : sam3_pio.h
  • PIOB_PDSR : sam3_pio.h
  • PIOB_PER : sam3_pio.h
  • PIOB_PSR : sam3_pio.h
  • PIOB_PUDR : sam3_pio.h
  • PIOB_PUER : sam3_pio.h
  • PIOB_PUSR : sam3_pio.h
  • PIOB_SODR : sam3_pio.h
  • PIOC_ABCDSR1 : sam3_pio.h
  • PIOC_ABCDSR2 : sam3_pio.h
  • PIOC_ACCESS : sam3_pio.h
  • PIOC_BASE : sam3_pio.h
  • PIOC_CODR : sam3_pio.h
  • PIOC_IDR : sam3_pio.h
  • PIOC_IER : sam3_pio.h
  • PIOC_IFDR : sam3_pio.h
  • PIOC_IFER : sam3_pio.h
  • PIOC_IFSR : sam3_pio.h
  • PIOC_IMR : sam3_pio.h
  • PIOC_ISR : sam3_pio.h
  • PIOC_MDDR : sam3_pio.h
  • PIOC_MDER : sam3_pio.h
  • PIOC_MDSR : sam3_pio.h
  • PIOC_ODR : sam3_pio.h
  • PIOC_ODSR : sam3_pio.h
  • PIOC_OER : sam3_pio.h
  • PIOC_OSR : sam3_pio.h
  • PIOC_OWDR : sam3_pio.h
  • PIOC_OWER : sam3_pio.h
  • PIOC_OWSR : sam3_pio.h
  • PIOC_PDR : sam3_pio.h
  • PIOC_PDSR : sam3_pio.h
  • PIOC_PER : sam3_pio.h
  • PIOC_PSR : sam3_pio.h
  • PIOC_PUDR : sam3_pio.h
  • PIOC_PUER : sam3_pio.h
  • PIOC_PUSR : sam3_pio.h
  • PIOC_SODR : sam3_pio.h
  • PIT_MR : at91_pit.h
  • PIT_MR_OFF : at91_pit.h
  • PIT_SR : at91_pit.h
  • PIT_SR_OFF : at91_pit.h
  • PITEN : at91_pit.h
  • PITIEN : at91_pit.h
  • PITS : at91_pit.h
  • PIV_MASK : at91_pit.h
  • PIV_SHIFT : at91_pit.h
  • PIVR : at91_pit.h
  • PIVR_OFF : at91_pit.h
  • PKTCMD_NULL : pocketcmd.h
  • PLL_MUL_VAL : init_at91.c
  • PLLON_BITNUMBER : clock_stm32.h
  • PMC_BASE : sam3_pmc.h
  • PMC_CSS_MAIN_CLK : at91_pmc.h
  • PMC_CSS_MASK : at91_pmc.h
  • PMC_CSS_PLL_CLK : at91_pmc.h
  • PMC_CSS_SLOW_CLK : at91_pmc.h
  • PMC_FOCR : sam3_pmc.h
  • PMC_FOCR_FOCLR : sam3_pmc.h
  • PMC_FOCR_OFF : sam3_pmc.h
  • PMC_FSMR : sam3_pmc.h
  • PMC_FSMR_FSTT0 : sam3_pmc.h
  • PMC_FSMR_FSTT1 : sam3_pmc.h
  • PMC_FSMR_FSTT10 : sam3_pmc.h
  • PMC_FSMR_FSTT11 : sam3_pmc.h
  • PMC_FSMR_FSTT12 : sam3_pmc.h
  • PMC_FSMR_FSTT13 : sam3_pmc.h
  • PMC_FSMR_FSTT14 : sam3_pmc.h
  • PMC_FSMR_FSTT15 : sam3_pmc.h
  • PMC_FSMR_FSTT2 : sam3_pmc.h
  • PMC_FSMR_FSTT3 : sam3_pmc.h
  • PMC_FSMR_FSTT4 : sam3_pmc.h
  • PMC_FSMR_FSTT5 : sam3_pmc.h
  • PMC_FSMR_FSTT6 : sam3_pmc.h
  • PMC_FSMR_FSTT7 : sam3_pmc.h
  • PMC_FSMR_FSTT8 : sam3_pmc.h
  • PMC_FSMR_FSTT9 : sam3_pmc.h
  • PMC_FSMR_LPM : sam3_pmc.h
  • PMC_FSMR_OFF : sam3_pmc.h
  • PMC_FSMR_RTCAL : sam3_pmc.h
  • PMC_FSMR_RTTAL : sam3_pmc.h
  • PMC_FSPR : sam3_pmc.h
  • PMC_FSPR_FSTP0 : sam3_pmc.h
  • PMC_FSPR_FSTP1 : sam3_pmc.h
  • PMC_FSPR_FSTP10 : sam3_pmc.h
  • PMC_FSPR_FSTP11 : sam3_pmc.h
  • PMC_FSPR_FSTP12 : sam3_pmc.h
  • PMC_FSPR_FSTP13 : sam3_pmc.h
  • PMC_FSPR_FSTP14 : sam3_pmc.h
  • PMC_FSPR_FSTP15 : sam3_pmc.h
  • PMC_FSPR_FSTP2 : sam3_pmc.h
  • PMC_FSPR_FSTP3 : sam3_pmc.h
  • PMC_FSPR_FSTP4 : sam3_pmc.h
  • PMC_FSPR_FSTP5 : sam3_pmc.h
  • PMC_FSPR_FSTP6 : sam3_pmc.h
  • PMC_FSPR_FSTP7 : sam3_pmc.h
  • PMC_FSPR_FSTP8 : sam3_pmc.h
  • PMC_FSPR_FSTP9 : sam3_pmc.h
  • PMC_FSPR_OFF : sam3_pmc.h
  • PMC_IDR : at91_pmc.h , sam3_pmc.h
  • PMC_IDR_CFDEV : sam3_pmc.h
  • PMC_IDR_LOCK : sam3_pmc.h
  • PMC_IDR_MCKRDY : sam3_pmc.h
  • PMC_IDR_MOSCRCS : sam3_pmc.h
  • PMC_IDR_MOSCSELS : sam3_pmc.h
  • PMC_IDR_MOSCXTS : sam3_pmc.h
  • PMC_IDR_OFF : at91_pmc.h , sam3_pmc.h
  • PMC_IDR_PCKRDY0 : sam3_pmc.h
  • PMC_IDR_PCKRDY1 : sam3_pmc.h
  • PMC_IDR_PCKRDY2 : sam3_pmc.h
  • PMC_IER : at91_pmc.h , sam3_pmc.h
  • PMC_IER_CFDEV : sam3_pmc.h
  • PMC_IER_LOCK : sam3_pmc.h
  • PMC_IER_MCKRDY : sam3_pmc.h
  • PMC_IER_MOSCRCS : sam3_pmc.h
  • PMC_IER_MOSCSELS : sam3_pmc.h
  • PMC_IER_MOSCXTS : sam3_pmc.h
  • PMC_IER_OFF : at91_pmc.h , sam3_pmc.h
  • PMC_IER_PCKRDY0 : sam3_pmc.h
  • PMC_IER_PCKRDY1 : sam3_pmc.h
  • PMC_IER_PCKRDY2 : sam3_pmc.h
  • PMC_IMR : at91_pmc.h , sam3_pmc.h
  • PMC_IMR_CFDEV : sam3_pmc.h
  • PMC_IMR_LOCK : sam3_pmc.h
  • PMC_IMR_MCKRDY : sam3_pmc.h
  • PMC_IMR_MOSCRCS : sam3_pmc.h
  • PMC_IMR_MOSCSELS : sam3_pmc.h
  • PMC_IMR_MOSCXTS : sam3_pmc.h
  • PMC_IMR_OFF : at91_pmc.h , sam3_pmc.h
  • PMC_IMR_PCKRDY0 : sam3_pmc.h
  • PMC_IMR_PCKRDY1 : sam3_pmc.h
  • PMC_IMR_PCKRDY2 : sam3_pmc.h
  • PMC_LOCK : at91_pmc.h
  • PMC_MCFR_OFF : sam3_pmc.h
  • PMC_MCKR : at91_pmc.h , sam3_pmc.h
  • PMC_MCKR_CSS_MAIN_CLK : sam3_pmc.h
  • PMC_MCKR_CSS_MASK : sam3_pmc.h
  • PMC_MCKR_CSS_PLL_CLK : sam3_pmc.h
  • PMC_MCKR_CSS_SLOW_CLK : sam3_pmc.h
  • PMC_MCKR_OFF : at91_pmc.h , sam3_pmc.h
  • PMC_MCKR_PLLDIV2 : sam3_pmc.h
  • PMC_MCKR_PRES_CLK : sam3_pmc.h
  • PMC_MCKR_PRES_CLK_16 : sam3_pmc.h
  • PMC_MCKR_PRES_CLK_2 : sam3_pmc.h
  • PMC_MCKR_PRES_CLK_3 : sam3_pmc.h
  • PMC_MCKR_PRES_CLK_32 : sam3_pmc.h
  • PMC_MCKR_PRES_CLK_4 : sam3_pmc.h
  • PMC_MCKR_PRES_CLK_64 : sam3_pmc.h
  • PMC_MCKR_PRES_CLK_8 : sam3_pmc.h
  • PMC_MCKR_PRES_MASK : sam3_pmc.h
  • PMC_MCKR_PRES_SHIFT : sam3_pmc.h
  • PMC_MCKRDY : at91_pmc.h
  • PMC_MOR_OFF : sam3_pmc.h
  • PMC_MOSCS : at91_pmc.h
  • PMC_OCR_CAL12 : sam3_pmc.h
  • PMC_OCR_CAL12_MASK : sam3_pmc.h
  • PMC_OCR_CAL12_SHIFT : sam3_pmc.h
  • PMC_OCR_CAL4 : sam3_pmc.h
  • PMC_OCR_CAL4_MASK : sam3_pmc.h
  • PMC_OCR_CAL8 : sam3_pmc.h
  • PMC_OCR_CAL8_MASK : sam3_pmc.h
  • PMC_OCR_CAL8_SHIFT : sam3_pmc.h
  • PMC_OCR_SEL12 : sam3_pmc.h
  • PMC_OCR_SEL4 : sam3_pmc.h
  • PMC_OCR_SEL8 : sam3_pmc.h
  • PMC_PCDR : at91_pmc.h
  • PMC_PCDR_OFF : at91_pmc.h
  • PMC_PCER : at91_pmc.h
  • PMC_PCER_OFF : at91_pmc.h
  • PMC_PCK : at91_pmc.h
  • PMC_PCK0 : at91_pmc.h
  • PMC_PCK1 : at91_pmc.h
  • PMC_PCK2 : at91_pmc.h
  • PMC_PCK_CSS_MAIN : sam3_pmc.h
  • PMC_PCK_CSS_MASK : sam3_pmc.h
  • PMC_PCK_CSS_MCK : sam3_pmc.h
  • PMC_PCK_CSS_PLL : sam3_pmc.h
  • PMC_PCK_CSS_SLOW : sam3_pmc.h
  • PMC_PCK_PRES_CLK : sam3_pmc.h
  • PMC_PCK_PRES_CLK_16 : sam3_pmc.h
  • PMC_PCK_PRES_CLK_2 : sam3_pmc.h
  • PMC_PCK_PRES_CLK_32 : sam3_pmc.h
  • PMC_PCK_PRES_CLK_4 : sam3_pmc.h
  • PMC_PCK_PRES_CLK_64 : sam3_pmc.h
  • PMC_PCK_PRES_CLK_8 : sam3_pmc.h
  • PMC_PCK_PRES_MASK : sam3_pmc.h
  • PMC_PCK_PRES_SHIFT : sam3_pmc.h
  • PMC_PCKR0 : at91_pmc.h
  • PMC_PCKR0_OFF : at91_pmc.h
  • PMC_PCKR1 : at91_pmc.h
  • PMC_PCKR1_OFF : at91_pmc.h
  • PMC_PCKR2 : at91_pmc.h
  • PMC_PCKR2_OFF : at91_pmc.h
  • PMC_PCKRDY0 : at91_pmc.h
  • PMC_PCKRDY1 : at91_pmc.h
  • PMC_PCKRDY2 : at91_pmc.h
  • PMC_PCSR : at91_pmc.h
  • PMC_PCSR_OFF : at91_pmc.h
  • PMC_PRES_CLK : at91_pmc.h
  • PMC_PRES_CLK_16 : at91_pmc.h
  • PMC_PRES_CLK_2 : at91_pmc.h
  • PMC_PRES_CLK_32 : at91_pmc.h
  • PMC_PRES_CLK_4 : at91_pmc.h
  • PMC_PRES_CLK_64 : at91_pmc.h
  • PMC_PRES_CLK_8 : at91_pmc.h
  • PMC_PRES_MASK : at91_pmc.h
  • PMC_PRES_SHIFT : at91_pmc.h
  • PMC_SCDR : at91_pmc.h , sam3_pmc.h
  • PMC_SCDR_OFF : at91_pmc.h , sam3_pmc.h
  • PMC_SCDR_PCK0 : sam3_pmc.h
  • PMC_SCDR_PCK1 : sam3_pmc.h
  • PMC_SCDR_PCK2 : sam3_pmc.h
  • PMC_SCER : at91_pmc.h , sam3_pmc.h
  • PMC_SCER_OFF : at91_pmc.h , sam3_pmc.h
  • PMC_SCER_PCK0 : sam3_pmc.h
  • PMC_SCER_PCK1 : sam3_pmc.h
  • PMC_SCER_PCK2 : sam3_pmc.h
  • PMC_SCSR : at91_pmc.h , sam3_pmc.h
  • PMC_SCSR_OFF : at91_pmc.h , sam3_pmc.h
  • PMC_SCSR_PCK0 : sam3_pmc.h
  • PMC_SCSR_PCK1 : sam3_pmc.h
  • PMC_SCSR_PCK2 : sam3_pmc.h
  • PMC_SR : at91_pmc.h , sam3_pmc.h
  • PMC_SR_CFDEV : sam3_pmc.h
  • PMC_SR_CFDS : sam3_pmc.h
  • PMC_SR_FOS : sam3_pmc.h
  • PMC_SR_LOCK : sam3_pmc.h
  • PMC_SR_MCKRDY : sam3_pmc.h
  • PMC_SR_MOSCRCS : sam3_pmc.h
  • PMC_SR_MOSCSELS : sam3_pmc.h
  • PMC_SR_MOSCXTS : sam3_pmc.h
  • PMC_SR_OFF : at91_pmc.h , sam3_pmc.h
  • PMC_SR_OSCSELS : sam3_pmc.h
  • PMC_SR_PCKRDY0 : sam3_pmc.h
  • PMC_SR_PCKRDY1 : sam3_pmc.h
  • PMC_SR_PCKRDY2 : sam3_pmc.h
  • PMC_UDP : at91_pmc.h
  • PMC_WPMR : sam3_pmc.h
  • PMC_WPMR_OFF : sam3_pmc.h
  • PMC_WPMR_WPEN : sam3_pmc.h
  • PMC_WPMR_WPKEY : sam3_pmc.h
  • PMC_WPMR_WPKEY_MASK : sam3_pmc.h
  • PMC_WPMR_WPKEY_SHIFT : sam3_pmc.h
  • PMC_WPSR : sam3_pmc.h
  • PMC_WPSR_OFF : sam3_pmc.h
  • PMC_WPSR_WPVS : sam3_pmc.h
  • PMC_WPSR_WPVSRC_MASK : sam3_pmc.h
  • PMC_WPSR_WPVSRC_SHIFT : sam3_pmc.h
  • POCKETBUS_ACK : pocketbus.h
  • POCKETBUS_BROADCAST_ADDR : pocketbus.h
  • POCKETBUS_ESC : pocketbus.h
  • POCKETBUS_ETX : pocketbus.h
  • POCKETBUS_LOG_FORMAT : cfg_pocketbus.h
  • POCKETBUS_LOG_LEVEL : cfg_pocketbus.h
  • POCKETBUS_NAK : pocketbus.h
  • POCKETBUS_STX : pocketbus.h
  • pool_alloc : pool.h
  • pool_empty : pool.h
  • pool_free : pool.h
  • pool_init : pool.h
  • PP_CAT : compiler.h
  • PP_COUNT : macros.h
  • PP_STRINGIZE : compiler.h
  • PPP_DEBUG : cfg_lwip.h
  • PPP_SUPPORT : cfg_lwip.h
  • PPP_THREAD_NAME : cfg_lwip.h
  • PPP_THREAD_PRIO : cfg_lwip.h
  • PPP_THREAD_STACKSIZE : cfg_lwip.h
  • PPPOE_SUPPORT : cfg_lwip.h
  • PPPOS_SUPPORT : cfg_lwip.h
  • proc_allowed : proc.h
  • PROC_ATOMIC : proc.h
  • PROC_DEFINE_STACK : proc.h
  • proc_new : proc.h
  • PULSE_HIGH : hw_sipo.h
  • PULSE_LOW : hw_sipo.h
  • PVD_IRQHANDLER : stm32_ints.h
  • PWM_0_CMPA_R : lm3s_com.h
  • PWM_0_CMPB_R : lm3s_com.h
  • PWM_0_COUNT_R : lm3s_com.h
  • PWM_0_CTL_R : lm3s_com.h
  • PWM_0_DBCTL_R : lm3s_com.h
  • PWM_0_DBFALL_R : lm3s_com.h
  • PWM_0_DBRISE_R : lm3s_com.h
  • PWM_0_GENA_R : lm3s_com.h
  • PWM_0_GENB_R : lm3s_com.h
  • PWM_0_INTEN_R : lm3s_com.h
  • PWM_0_ISC_R : lm3s_com.h
  • PWM_0_LOAD_R : lm3s_com.h
  • PWM_0_RIS_R : lm3s_com.h
  • PWM_1_CMPA_R : lm3s_com.h
  • PWM_1_CMPB_R : lm3s_com.h
  • PWM_1_COUNT_R : lm3s_com.h
  • PWM_1_CTL_R : lm3s_com.h
  • PWM_1_DBCTL_R : lm3s_com.h
  • PWM_1_DBFALL_R : lm3s_com.h
  • PWM_1_DBRISE_R : lm3s_com.h
  • PWM_1_GENA_R : lm3s_com.h
  • PWM_1_GENB_R : lm3s_com.h
  • PWM_1_INTEN_R : lm3s_com.h
  • PWM_1_ISC_R : lm3s_com.h
  • PWM_1_LOAD_R : lm3s_com.h
  • PWM_1_RIS_R : lm3s_com.h
  • PWM_2_CMPA_R : lm3s_com.h
  • PWM_2_CMPB_R : lm3s_com.h
  • PWM_2_COUNT_R : lm3s_com.h
  • PWM_2_CTL_R : lm3s_com.h
  • PWM_2_DBCTL_R : lm3s_com.h
  • PWM_2_DBFALL_R : lm3s_com.h
  • PWM_2_DBRISE_R : lm3s_com.h
  • PWM_2_GENA_R : lm3s_com.h
  • PWM_2_GENB_R : lm3s_com.h
  • PWM_2_INTEN_R : lm3s_com.h
  • PWM_2_ISC_R : lm3s_com.h
  • PWM_2_LOAD_R : lm3s_com.h
  • PWM_2_RIS_R : lm3s_com.h
  • PWM_BASE : lm3s_memmap.h
  • PWM_CALG : at91_pwm.h
  • PWM_CCNT0 : at91_pwm.h
  • PWM_CCNT1 : at91_pwm.h
  • PWM_CCNT2 : at91_pwm.h
  • PWM_CCNT3 : at91_pwm.h
  • PWM_CCNT_OFF : at91_pwm.h
  • PWM_CDTY0 : at91_pwm.h
  • PWM_CDTY1 : at91_pwm.h
  • PWM_CDTY2 : at91_pwm.h
  • PWM_CDTY3 : at91_pwm.h
  • PWM_CDTY_OFF : at91_pwm.h
  • PWM_CH0_OFF : at91_pwm.h
  • PWM_CH1_OFF : at91_pwm.h
  • PWM_CH2_OFF : at91_pwm.h
  • PWM_CH3_OFF : at91_pwm.h
  • PWM_CHID0 : at91_pwm.h
  • PWM_CHID1 : at91_pwm.h
  • PWM_CHID2 : at91_pwm.h
  • PWM_CHID3 : at91_pwm.h
  • PWM_CHID_MASK : at91_pwm.h
  • PWM_CMR0 : at91_pwm.h
  • PWM_CMR1 : at91_pwm.h
  • PWM_CMR2 : at91_pwm.h
  • PWM_CMR3 : at91_pwm.h
  • PWM_CMR_OFF : at91_pwm.h
  • PWM_CPD : at91_pwm.h
  • PWM_CPOL : at91_pwm.h
  • PWM_CPRD0 : at91_pwm.h
  • PWM_CPRD1 : at91_pwm.h
  • PWM_CPRD2 : at91_pwm.h
  • PWM_CPRD3 : at91_pwm.h
  • PWM_CPRD_OFF : at91_pwm.h
  • PWM_CPRE_CLKA : at91_pwm.h
  • PWM_CPRE_CLKB : at91_pwm.h
  • PWM_CPRE_MCK : at91_pwm.h
  • PWM_CPRE_MCK_DIV1024 : at91_pwm.h
  • PWM_CPRE_MCK_DIV128 : at91_pwm.h
  • PWM_CPRE_MCK_DIV16 : at91_pwm.h
  • PWM_CPRE_MCK_DIV2 : at91_pwm.h
  • PWM_CPRE_MCK_DIV256 : at91_pwm.h
  • PWM_CPRE_MCK_DIV32 : at91_pwm.h
  • PWM_CPRE_MCK_DIV4 : at91_pwm.h
  • PWM_CPRE_MCK_DIV512 : at91_pwm.h
  • PWM_CPRE_MCK_DIV64 : at91_pwm.h
  • PWM_CPRE_MCK_DIV8 : at91_pwm.h
  • PWM_CPRE_MCK_MASK : at91_pwm.h
  • PWM_CTL_GLOBALSYNC0 : lm3s_com.h
  • PWM_CTL_GLOBALSYNC1 : lm3s_com.h
  • PWM_CTL_GLOBALSYNC2 : lm3s_com.h
  • PWM_CTL_GLOBALSYNC3 : lm3s_pwm.h
  • PWM_CTL_R : lm3s_com.h
  • PWM_CUPD0 : at91_pwm.h
  • PWM_CUPD1 : at91_pwm.h
  • PWM_CUPD2 : at91_pwm.h
  • PWM_CUPD3 : at91_pwm.h
  • PWM_CUPD_OFF : at91_pwm.h
  • PWM_DIS : at91_pwm.h
  • PWM_DIS_OFF : at91_pwm.h
  • PWM_ENA : at91_pwm.h
  • PWM_ENA_OFF : at91_pwm.h
  • PWM_ENABLE_PWM0EN : lm3s_com.h
  • PWM_ENABLE_PWM1EN : lm3s_com.h
  • PWM_ENABLE_PWM2EN : lm3s_com.h
  • PWM_ENABLE_PWM3EN : lm3s_com.h
  • PWM_ENABLE_PWM4EN : lm3s_com.h
  • PWM_ENABLE_PWM5EN : lm3s_com.h
  • PWM_ENABLE_PWM7EN : lm3s_pwm.h
  • PWM_ENABLE_R : lm3s_com.h
  • PWM_ENUPD_ENUPD7_M : lm3s_pwm.h
  • PWM_FAULT_FAULT0 : lm3s_com.h
  • PWM_FAULT_FAULT1 : lm3s_com.h
  • PWM_FAULT_FAULT2 : lm3s_com.h
  • PWM_FAULT_FAULT3 : lm3s_com.h
  • PWM_FAULT_FAULT4 : lm3s_com.h
  • PWM_FAULT_FAULT5 : lm3s_com.h
  • PWM_FAULT_FAULT7 : lm3s_pwm.h
  • PWM_FAULT_R : lm3s_com.h
  • PWM_FAULTVAL_PWM7 : lm3s_pwm.h
  • PWM_IDR : at91_pwm.h
  • PWM_IDR_OFF : at91_pwm.h
  • PWM_IER : at91_pwm.h
  • PWM_IER_OFF : at91_pwm.h
  • PWM_IMR : at91_pwm.h
  • PWM_IMR_OFF : at91_pwm.h
  • PWM_INTEN_INTFAULT : lm3s_com.h
  • PWM_INTEN_INTFAULT3 : lm3s_pwm.h
  • PWM_INTEN_INTPWM0 : lm3s_com.h
  • PWM_INTEN_INTPWM1 : lm3s_com.h
  • PWM_INTEN_INTPWM2 : lm3s_com.h
  • PWM_INTEN_R : lm3s_com.h
  • PWM_INVERT_PWM0INV : lm3s_com.h
  • PWM_INVERT_PWM1INV : lm3s_com.h
  • PWM_INVERT_PWM2INV : lm3s_com.h
  • PWM_INVERT_PWM3INV : lm3s_com.h
  • PWM_INVERT_PWM4INV : lm3s_com.h
  • PWM_INVERT_PWM5INV : lm3s_com.h
  • PWM_INVERT_PWM7INV : lm3s_pwm.h
  • PWM_INVERT_R : lm3s_com.h
  • PWM_ISC_INTFAULT : lm3s_com.h
  • PWM_ISC_INTFAULT3 : lm3s_pwm.h
  • PWM_ISC_INTPWM0 : lm3s_com.h
  • PWM_ISC_INTPWM1 : lm3s_com.h
  • PWM_ISC_INTPWM2 : lm3s_com.h
  • PWM_ISC_R : lm3s_com.h
  • PWM_ISR : at91_pwm.h
  • PWM_ISR_OFF : at91_pwm.h
  • PWM_LOG_FORMAT : cfg_pwm.h
  • PWM_LOG_LEVEL : cfg_pwm.h
  • PWM_MAX_DUTY : pwm.h
  • PWM_MR : at91_pwm.h
  • PWM_MR_DIVA_MASK : at91_pwm.h
  • PWM_MR_DIVA_SHIFT : at91_pwm.h
  • PWM_MR_DIVB_MASK : at91_pwm.h
  • PWM_MR_DIVB_SHIFT : at91_pwm.h
  • PWM_MR_OFF : at91_pwm.h
  • PWM_MR_PRE_MCK : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV1024 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV128 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV16 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV2 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV256 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV32 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV4 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV512 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV64 : at91_pwm.h
  • PWM_MR_PRE_MCK_DIV8 : at91_pwm.h
  • PWM_MR_PREA_MASK : at91_pwm.h
  • PWM_MR_PREA_SHIFT : at91_pwm.h
  • PWM_MR_PREB_MASK : at91_pwm.h
  • PWM_MR_PREB_SHIFT : at91_pwm.h
  • PWM_O_CTL : lm3s_pwm.h
  • PWM_O_X_CTL : lm3s_pwm.h
  • PWM_O_X_FLTSEN : lm3s_pwm.h
  • PWM_RIS_INTFAULT : lm3s_com.h
  • PWM_RIS_INTFAULT3 : lm3s_pwm.h
  • PWM_RIS_INTPWM0 : lm3s_com.h
  • PWM_RIS_INTPWM1 : lm3s_com.h
  • PWM_RIS_INTPWM2 : lm3s_com.h
  • PWM_RIS_R : lm3s_com.h
  • PWM_SR : at91_pwm.h
  • PWM_SR_OFF : at91_pwm.h
  • PWM_STATUS_FAULT : lm3s_com.h
  • PWM_STATUS_FAULT3 : lm3s_pwm.h
  • PWM_STATUS_R : lm3s_com.h
  • PWM_SYNC_R : lm3s_com.h
  • PWM_SYNC_SYNC0 : lm3s_com.h
  • PWM_SYNC_SYNC1 : lm3s_com.h
  • PWM_SYNC_SYNC2 : lm3s_com.h
  • PWM_SYNC_SYNC3 : lm3s_pwm.h
  • PWM_X_CMPA_M : lm3s_pwm.h , lm3s_com.h
  • PWM_X_CMPA_S : lm3s_com.h
  • PWM_X_CMPB_M : lm3s_com.h , lm3s_pwm.h
  • PWM_X_CMPB_S : lm3s_com.h
  • PWM_X_COUNT_M : lm3s_pwm.h , lm3s_com.h
  • PWM_X_COUNT_S : lm3s_com.h
  • PWM_X_CTL_CMPAUPD : lm3s_com.h
  • PWM_X_CTL_CMPBUPD : lm3s_com.h
  • PWM_X_CTL_DEBUG : lm3s_com.h
  • PWM_X_CTL_ENABLE : lm3s_com.h
  • PWM_X_CTL_LATCH : lm3s_pwm.h
  • PWM_X_CTL_LOADUPD : lm3s_com.h
  • PWM_X_CTL_MODE : lm3s_com.h
  • PWM_X_DBCTL_ENABLE : lm3s_pwm.h , lm3s_com.h
  • PWM_X_DBFALL_DELAY_M : lm3s_pwm.h , lm3s_com.h
  • PWM_X_DBFALL_DELAY_S : lm3s_com.h
  • PWM_X_DBRISE_DELAY_M : lm3s_pwm.h , lm3s_com.h
  • PWM_X_DBRISE_DELAY_S : lm3s_com.h
  • PWM_X_FLTSEN_FAULT3 : lm3s_pwm.h
  • PWM_X_FLTSRC0_FAULT3 : lm3s_pwm.h
  • PWM_X_FLTSRC1_DCMP7 : lm3s_pwm.h
  • PWM_X_FLTSTAT0_FAULT3 : lm3s_pwm.h
  • PWM_X_FLTSTAT1_DCMP7 : lm3s_pwm.h
  • PWM_X_GENA_ACTCMPAD_INV : lm3s_com.h
  • PWM_X_GENA_ACTCMPAD_M : lm3s_com.h
  • PWM_X_GENA_ACTCMPAD_NONE : lm3s_com.h
  • PWM_X_GENA_ACTCMPAD_ONE : lm3s_com.h
  • PWM_X_GENA_ACTCMPAD_ZERO : lm3s_com.h
  • PWM_X_GENA_ACTCMPAU_INV : lm3s_com.h
  • PWM_X_GENA_ACTCMPAU_M : lm3s_com.h
  • PWM_X_GENA_ACTCMPAU_NONE : lm3s_com.h
  • PWM_X_GENA_ACTCMPAU_ONE : lm3s_com.h
  • PWM_X_GENA_ACTCMPAU_ZERO : lm3s_com.h
  • PWM_X_GENA_ACTCMPBD_INV : lm3s_com.h
  • PWM_X_GENA_ACTCMPBD_M : lm3s_com.h , lm3s_pwm.h
  • PWM_X_GENA_ACTCMPBD_NONE : lm3s_com.h
  • PWM_X_GENA_ACTCMPBD_ONE : lm3s_com.h
  • PWM_X_GENA_ACTCMPBD_ZERO : lm3s_com.h
  • PWM_X_GENA_ACTCMPBU_INV : lm3s_com.h
  • PWM_X_GENA_ACTCMPBU_M : lm3s_com.h
  • PWM_X_GENA_ACTCMPBU_NONE : lm3s_com.h
  • PWM_X_GENA_ACTCMPBU_ONE : lm3s_com.h
  • PWM_X_GENA_ACTCMPBU_ZERO : lm3s_com.h
  • PWM_X_GENA_ACTLOAD_INV : lm3s_com.h
  • PWM_X_GENA_ACTLOAD_M : lm3s_com.h
  • PWM_X_GENA_ACTLOAD_NONE : lm3s_com.h
  • PWM_X_GENA_ACTLOAD_ONE : lm3s_com.h
  • PWM_X_GENA_ACTLOAD_ZERO : lm3s_com.h
  • PWM_X_GENA_ACTZERO_INV : lm3s_com.h
  • PWM_X_GENA_ACTZERO_M : lm3s_com.h
  • PWM_X_GENA_ACTZERO_NONE : lm3s_com.h
  • PWM_X_GENA_ACTZERO_ONE : lm3s_com.h
  • PWM_X_GENA_ACTZERO_ZERO : lm3s_com.h
  • PWM_X_GENB_ACTCMPAD_INV : lm3s_com.h
  • PWM_X_GENB_ACTCMPAD_M : lm3s_com.h
  • PWM_X_GENB_ACTCMPAD_NONE : lm3s_com.h
  • PWM_X_GENB_ACTCMPAD_ONE : lm3s_com.h
  • PWM_X_GENB_ACTCMPAD_ZERO : lm3s_com.h
  • PWM_X_GENB_ACTCMPAU_INV : lm3s_com.h
  • PWM_X_GENB_ACTCMPAU_M : lm3s_com.h
  • PWM_X_GENB_ACTCMPAU_NONE : lm3s_com.h
  • PWM_X_GENB_ACTCMPAU_ONE : lm3s_com.h
  • PWM_X_GENB_ACTCMPAU_ZERO : lm3s_com.h
  • PWM_X_GENB_ACTCMPBD_INV : lm3s_com.h
  • PWM_X_GENB_ACTCMPBD_M : lm3s_com.h , lm3s_pwm.h
  • PWM_X_GENB_ACTCMPBD_NONE : lm3s_com.h
  • PWM_X_GENB_ACTCMPBD_ONE : lm3s_com.h
  • PWM_X_GENB_ACTCMPBD_ZERO : lm3s_com.h
  • PWM_X_GENB_ACTCMPBU_INV : lm3s_com.h
  • PWM_X_GENB_ACTCMPBU_M : lm3s_com.h
  • PWM_X_GENB_ACTCMPBU_NONE : lm3s_com.h
  • PWM_X_GENB_ACTCMPBU_ONE : lm3s_com.h
  • PWM_X_GENB_ACTCMPBU_ZERO : lm3s_com.h
  • PWM_X_GENB_ACTLOAD_INV : lm3s_com.h
  • PWM_X_GENB_ACTLOAD_M : lm3s_com.h
  • PWM_X_GENB_ACTLOAD_NONE : lm3s_com.h
  • PWM_X_GENB_ACTLOAD_ONE : lm3s_com.h
  • PWM_X_GENB_ACTLOAD_ZERO : lm3s_com.h
  • PWM_X_GENB_ACTZERO_INV : lm3s_com.h
  • PWM_X_GENB_ACTZERO_M : lm3s_com.h
  • PWM_X_GENB_ACTZERO_NONE : lm3s_com.h
  • PWM_X_GENB_ACTZERO_ONE : lm3s_com.h
  • PWM_X_GENB_ACTZERO_ZERO : lm3s_com.h
  • PWM_X_INTEN_INTCMPAD : lm3s_com.h
  • PWM_X_INTEN_INTCMPAU : lm3s_com.h
  • PWM_X_INTEN_INTCMPBD : lm3s_com.h
  • PWM_X_INTEN_INTCMPBU : lm3s_com.h
  • PWM_X_INTEN_INTCNTLOAD : lm3s_com.h
  • PWM_X_INTEN_INTCNTZERO : lm3s_com.h
  • PWM_X_INTEN_TRCMPAD : lm3s_com.h
  • PWM_X_INTEN_TRCMPAU : lm3s_com.h
  • PWM_X_INTEN_TRCMPBD : lm3s_pwm.h , lm3s_com.h
  • PWM_X_INTEN_TRCMPBU : lm3s_com.h
  • PWM_X_INTEN_TRCNTLOAD : lm3s_com.h
  • PWM_X_INTEN_TRCNTZERO : lm3s_com.h
  • PWM_X_ISC_INTCMPAD : lm3s_com.h
  • PWM_X_ISC_INTCMPAU : lm3s_com.h
  • PWM_X_ISC_INTCMPBD : lm3s_pwm.h , lm3s_com.h
  • PWM_X_ISC_INTCMPBU : lm3s_com.h
  • PWM_X_ISC_INTCNTLOAD : lm3s_com.h
  • PWM_X_ISC_INTCNTZERO : lm3s_com.h
  • PWM_X_LOAD_M : lm3s_com.h , lm3s_pwm.h
  • PWM_X_LOAD_S : lm3s_com.h
  • PWM_X_MINFLTPER_M : lm3s_pwm.h
  • PWM_X_RIS_INTCMPAD : lm3s_com.h
  • PWM_X_RIS_INTCMPAU : lm3s_com.h
  • PWM_X_RIS_INTCMPBD : lm3s_com.h , lm3s_pwm.h
  • PWM_X_RIS_INTCMPBU : lm3s_com.h
  • PWM_X_RIS_INTCNTLOAD : lm3s_com.h
  • PWM_X_RIS_INTCNTZERO : lm3s_com.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- q -

  • QEI0_BASE : lm3s_memmap.h
  • QEI0_COUNT_R : lm3s_com.h
  • QEI0_CTL_R : lm3s_com.h
  • QEI0_INTEN_R : lm3s_com.h
  • QEI0_ISC_R : lm3s_com.h
  • QEI0_LOAD_R : lm3s_com.h
  • QEI0_MAXPOS_R : lm3s_com.h
  • QEI0_POS_R : lm3s_com.h
  • QEI0_RIS_R : lm3s_com.h
  • QEI0_SPEED_R : lm3s_com.h
  • QEI0_STAT_R : lm3s_com.h
  • QEI0_TIME_R : lm3s_com.h
  • QEI1_BASE : lm3s_memmap.h
  • QEI1_COUNT_R : lm3s_com.h
  • QEI1_CTL_R : lm3s_com.h
  • QEI1_INTEN_R : lm3s_com.h
  • QEI1_ISC_R : lm3s_com.h
  • QEI1_LOAD_R : lm3s_com.h
  • QEI1_MAXPOS_R : lm3s_com.h
  • QEI1_POS_R : lm3s_com.h
  • QEI1_RIS_R : lm3s_com.h
  • QEI1_SPEED_R : lm3s_com.h
  • QEI1_STAT_R : lm3s_com.h
  • QEI1_TIME_R : lm3s_com.h
  • QEI_COUNT_M : lm3s_com.h
  • QEI_COUNT_S : lm3s_com.h
  • QEI_CTL_CAPMODE : lm3s_com.h
  • QEI_CTL_ENABLE : lm3s_com.h
  • QEI_CTL_INVA : lm3s_com.h
  • QEI_CTL_INVB : lm3s_com.h
  • QEI_CTL_INVI : lm3s_com.h
  • QEI_CTL_RESMODE : lm3s_com.h
  • QEI_CTL_SIGMODE : lm3s_com.h
  • QEI_CTL_STALLEN : lm3s_com.h
  • QEI_CTL_SWAP : lm3s_com.h
  • QEI_CTL_VELDIV_1 : lm3s_com.h
  • QEI_CTL_VELDIV_128 : lm3s_com.h
  • QEI_CTL_VELDIV_16 : lm3s_com.h
  • QEI_CTL_VELDIV_2 : lm3s_com.h
  • QEI_CTL_VELDIV_32 : lm3s_com.h
  • QEI_CTL_VELDIV_4 : lm3s_com.h
  • QEI_CTL_VELDIV_64 : lm3s_com.h
  • QEI_CTL_VELDIV_8 : lm3s_com.h
  • QEI_CTL_VELDIV_M : lm3s_com.h
  • QEI_CTL_VELEN : lm3s_com.h
  • QEI_INTEN_DIR : lm3s_com.h
  • QEI_INTEN_ERROR : lm3s_com.h
  • QEI_INTEN_INDEX : lm3s_com.h
  • QEI_INTEN_TIMER : lm3s_com.h
  • QEI_ISC_DIR : lm3s_com.h
  • QEI_ISC_ERROR : lm3s_com.h
  • QEI_ISC_INDEX : lm3s_com.h
  • QEI_ISC_TIMER : lm3s_com.h
  • QEI_LOAD_M : lm3s_com.h
  • QEI_LOAD_S : lm3s_com.h
  • QEI_MAXPOS_M : lm3s_com.h
  • QEI_MAXPOS_S : lm3s_com.h
  • QEI_POS_M : lm3s_com.h
  • QEI_POS_S : lm3s_com.h
  • QEI_RIS_DIR : lm3s_com.h
  • QEI_RIS_ERROR : lm3s_com.h
  • QEI_RIS_INDEX : lm3s_com.h
  • QEI_RIS_TIMER : lm3s_com.h
  • QEI_SPEED_M : lm3s_com.h
  • QEI_SPEED_S : lm3s_com.h
  • QEI_STAT_DIRECTION : lm3s_com.h
  • QEI_STAT_ERROR : lm3s_com.h
  • QEI_TIME_M : lm3s_com.h
  • QEI_TIME_S : lm3s_com.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- r -

  • R : md2.c
  • RAMP_CLOCK_SHIFT_PRECISION : cfg_ramp.h
  • RAMP_DEF_MAXFREQ : cfg_ramp.h
  • RAMP_DEF_MINFREQ : cfg_ramp.h
  • RAMP_DEF_POWERIDLE : cfg_ramp.h
  • RAMP_DEF_POWERRUN : cfg_ramp.h
  • RAMP_DEF_TIME : cfg_ramp.h
  • RAMP_PULSE_WIDTH : cfg_ramp.h
  • RAMP_USE_FLOATING_POINT : cfg_ramp.h
  • RANDOM_LOG_FORMAT : cfg_random.h
  • RANDOM_LOG_LEVEL : cfg_random.h
  • RANDOM_SECURITY_LEVEL : cfg_random.h
  • RAW_DEBUG : cfg_lwip.h
  • RAW_TTL : cfg_lwip.h
  • RCC_APB1_ALL : clock_stm32.h
  • RCC_APB1_BKP : clock_stm32.h
  • RCC_APB1_CAN : clock_stm32.h
  • RCC_APB1_I2C1 : clock_stm32.h
  • RCC_APB1_I2C2 : clock_stm32.h
  • RCC_APB1_PWR : clock_stm32.h
  • RCC_APB1_SPI2 : clock_stm32.h
  • RCC_APB1_TIM2 : clock_stm32.h
  • RCC_APB1_TIM3 : clock_stm32.h
  • RCC_APB1_TIM4 : clock_stm32.h
  • RCC_APB1_USART2 : clock_stm32.h
  • RCC_APB1_USART3 : clock_stm32.h
  • RCC_APB1_USB : clock_stm32.h
  • RCC_APB1_WWDG : clock_stm32.h
  • RCC_APB2_ADC1 : clock_stm32.h
  • RCC_APB2_ADC2 : clock_stm32.h
  • RCC_APB2_AFIO : clock_stm32.h
  • RCC_APB2_ALL : clock_stm32.h
  • RCC_APB2_GPIOA : clock_stm32.h
  • RCC_APB2_GPIOB : clock_stm32.h
  • RCC_APB2_GPIOC : clock_stm32.h
  • RCC_APB2_GPIOD : clock_stm32.h
  • RCC_APB2_GPIOE : clock_stm32.h
  • RCC_APB2_SPI1 : clock_stm32.h
  • RCC_APB2_TIM1 : clock_stm32.h
  • RCC_APB2_USART1 : clock_stm32.h
  • RCC_BDCR_LSEON : clock_stm32.h
  • RCC_BDCR_LSERDY : clock_stm32.h
  • RCC_BDCR_RTCEN : clock_stm32.h
  • RCC_BDCR_RTCSEL : clock_stm32.h
  • RCC_FLAG_HSERDY : clock_stm32.h
  • RCC_FLAG_HSIRDY : clock_stm32.h
  • RCC_FLAG_IWDGRST : clock_stm32.h
  • RCC_FLAG_LPWRRST : clock_stm32.h
  • RCC_FLAG_LSERDY : clock_stm32.h
  • RCC_FLAG_LSIRDY : clock_stm32.h
  • RCC_FLAG_PINRST : clock_stm32.h
  • RCC_FLAG_PLLRDY : clock_stm32.h
  • RCC_FLAG_PORRST : clock_stm32.h
  • RCC_FLAG_SFTRST : clock_stm32.h
  • RCC_FLAG_WWDGRST : clock_stm32.h
  • RCC_HCLK_DIV1 : clock_stm32.h
  • RCC_HCLK_DIV16 : clock_stm32.h
  • RCC_HCLK_DIV2 : clock_stm32.h
  • RCC_HCLK_DIV4 : clock_stm32.h
  • RCC_HCLK_DIV8 : clock_stm32.h
  • RCC_IRQHANDLER : stm32_ints.h
  • RCC_PCLK2_DIV2 : clock_stm32.h
  • RCC_PCLK2_DIV4 : clock_stm32.h
  • RCC_PCLK2_DIV6 : clock_stm32.h
  • RCC_PCLK2_DIV8 : clock_stm32.h
  • RCC_PLL_HSE_DIV1 : clock_stm32.h
  • RCC_PLL_HSE_DIV2 : clock_stm32.h
  • RCC_PLL_HSI_DIV2 : clock_stm32.h
  • RCC_PLLMUL_10 : clock_stm32.h
  • RCC_PLLMUL_11 : clock_stm32.h
  • RCC_PLLMUL_12 : clock_stm32.h
  • RCC_PLLMUL_13 : clock_stm32.h
  • RCC_PLLMUL_14 : clock_stm32.h
  • RCC_PLLMUL_15 : clock_stm32.h
  • RCC_PLLMUL_16 : clock_stm32.h
  • RCC_PLLMUL_2 : clock_stm32.h
  • RCC_PLLMUL_3 : clock_stm32.h
  • RCC_PLLMUL_4 : clock_stm32.h
  • RCC_PLLMUL_5 : clock_stm32.h
  • RCC_PLLMUL_6 : clock_stm32.h
  • RCC_PLLMUL_7 : clock_stm32.h
  • RCC_PLLMUL_8 : clock_stm32.h
  • RCC_PLLMUL_9 : clock_stm32.h
  • RCC_SYSCLK_DIV1 : clock_stm32.h
  • RCC_SYSCLK_DIV128 : clock_stm32.h
  • RCC_SYSCLK_DIV16 : clock_stm32.h
  • RCC_SYSCLK_DIV2 : clock_stm32.h
  • RCC_SYSCLK_DIV256 : clock_stm32.h
  • RCC_SYSCLK_DIV4 : clock_stm32.h
  • RCC_SYSCLK_DIV512 : clock_stm32.h
  • RCC_SYSCLK_DIV64 : clock_stm32.h
  • RCC_SYSCLK_DIV8 : clock_stm32.h
  • RCC_SYSCLK_HSE : clock_stm32.h
  • RCC_SYSCLK_HSI : clock_stm32.h
  • RCC_SYSCLK_PLLCLK : clock_stm32.h
  • RCC_USBCLK_PLLCLK_1DIV5 : clock_stm32.h
  • RCC_USBCLK_PLLCLK_DIV1 : clock_stm32.h
  • RECT_HEIGHT : gfx.h
  • RECT_WIDTH : gfx.h
  • RECV_BUFSIZE_DEFAULT : cfg_lwip.h
  • REGISTER_CMD : parser.h
  • REMOVE : list.h
  • RESET_PULSE_WIDTH : dataflash.h
  • REVERSE_FOREACH_NODE : list.h
  • REVERSE_UINT8 : macros.h
  • REVISION_IS_A0 : lm3s_types.h
  • REVISION_IS_A1 : lm3s_types.h
  • REVISION_IS_A2 : lm3s_types.h
  • REVISION_IS_B0 : lm3s_types.h
  • REVISION_IS_B1 : lm3s_types.h
  • REVISION_IS_C0 : lm3s_types.h
  • REVISION_IS_C1 : lm3s_types.h
  • REVISION_IS_C2 : lm3s_types.h
  • ROTL : macros.h
  • ROTR : macros.h
  • ROUND_UP2 : macros.h
  • ROUNDS : tea.h
  • RSTC_BODIEN : at91_rstc.h , sam3_rstc.h
  • RSTC_BODSTS : sam3_rstc.h , at91_rstc.h
  • RSTC_CR : sam3_rstc.h , at91_rstc.h
  • RSTC_ERSTL_MASK : sam3_rstc.h , at91_rstc.h
  • RSTC_ERSTL_SHIFT : sam3_rstc.h , at91_rstc.h
  • RSTC_EXTRST : at91_rstc.h , sam3_rstc.h
  • RSTC_KEY : at91_rstc.h , sam3_rstc.h
  • RSTC_MR : at91_rstc.h , sam3_rstc.h
  • RSTC_NRSTL : at91_rstc.h , sam3_rstc.h
  • RSTC_PERRST : at91_rstc.h , sam3_rstc.h
  • RSTC_PROCRST : sam3_rstc.h , at91_rstc.h
  • RSTC_RSTTYP_BROWNOUT : at91_rstc.h , sam3_rstc.h
  • RSTC_RSTTYP_MASK : at91_rstc.h , sam3_rstc.h
  • RSTC_RSTTYP_POWERUP : sam3_rstc.h , at91_rstc.h
  • RSTC_RSTTYP_SOFTWARE : sam3_rstc.h , at91_rstc.h
  • RSTC_RSTTYP_USER : sam3_rstc.h , at91_rstc.h
  • RSTC_RSTTYP_WATCHDOG : sam3_rstc.h , at91_rstc.h
  • RSTC_SR : sam3_rstc.h , at91_rstc.h
  • RSTC_SRCMP : sam3_rstc.h , at91_rstc.h
  • RSTC_URSTEN : at91_rstc.h , sam3_rstc.h
  • RSTC_URSTIEN : at91_rstc.h , sam3_rstc.h
  • RSTC_URSTS : at91_rstc.h , sam3_rstc.h
  • RTC_IRQHANDLER : stm32_ints.h
  • RTCALARM_IRQHANDLER : stm32_ints.h
  • RTCEN_BITNUMBER : clock_stm32.h
  • RTS_OFF : ser_xmega.c , ser_mega.c
  • RTS_ON : ser_xmega.c , ser_mega.c
  • RX_FIFO_SIZE : lm3s_ssi.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- s -

  • SAMPLERATE : afsk.h
  • SCHED_ENQUEUE : proc_p.h
  • SCK : hw_spi.h
  • SCK_ACTIVE : hw_spi.h
  • SCK_HIGH : hw_spi.h
  • SCK_INACTIVE : hw_spi.h
  • SCK_LOW : hw_spi.h
  • SCK_OUT : hw_spi.h
  • SCK_PULSE : hw_spi.h
  • sd_init : sd.h
  • SD_LOG_FORMAT : cfg_sd.h
  • SD_LOG_LEVEL : cfg_sd.h
  • SD_UNBUFFERED : sd.h
  • SER_SPI0_BUS_TXCLOSE : ser_at91.c , ser_sam3.c
  • SER_SPI0_BUS_TXINIT : ser_at91.c , ser_sam3.c
  • SER_SPI_BUS_TXCLOSE : ser_mega.c
  • SER_SPI_BUS_TXINIT : ser_mega.c
  • SER_UART0_BUS_TXBEGIN : ser_at91.c , ser_mega.c , ser_sam3.c
  • SER_UART0_BUS_TXCHAR : ser_at91.c , ser_mega.c , ser_sam3.c
  • SER_UART0_BUS_TXEND : ser_at91.c , ser_mega.c , ser_sam3.c
  • SER_UART0_BUS_TXINIT : ser_at91.c , ser_mega.c , ser_sam3.c
  • SER_UART0_BUS_TXOFF : ser_mega.c
  • SER_UART1_BUS_TXBEGIN : ser_at91.c , ser_mega.c
  • SER_UART1_BUS_TXCHAR : ser_at91.c , ser_mega.c
  • SER_UART1_BUS_TXEND : ser_at91.c , ser_mega.c
  • SER_UART1_BUS_TXINIT : ser_at91.c , ser_mega.c
  • SER_UART1_BUS_TXOFF : ser_mega.c
  • SER_UART2_BUS_TXBEGIN : ser_mega.c
  • SER_UART2_BUS_TXCHAR : ser_mega.c
  • SER_UART2_BUS_TXEND : ser_mega.c
  • SER_UART2_BUS_TXINIT : ser_mega.c
  • SER_UART2_BUS_TXOFF : ser_mega.c
  • SER_UART3_BUS_TXBEGIN : ser_mega.c
  • SER_UART3_BUS_TXCHAR : ser_mega.c
  • SER_UART3_BUS_TXEND : ser_mega.c
  • SER_UART3_BUS_TXINIT : ser_mega.c
  • SER_UART3_BUS_TXOFF : ser_mega.c
  • SERIRQ_PRIORITY : ser_at91.c , ser_sam3.c
  • SERRF_FRAMEERROR : ser_at91.h , ser_mega.h , ser_xmega.h , ser_sam3.h , ser_dsp56k.h
  • SERRF_NOISEERROR : ser_at91.h , ser_mega.h , ser_xmega.h , ser_sam3.h , ser_dsp56k.h
  • SERRF_PARITYERROR : ser_at91.h , ser_mega.h , ser_xmega.h , ser_sam3.h , ser_dsp56k.h
  • SERRF_RX : ser.h
  • SERRF_RXFIFOOVERRUN : ser_at91.h , ser_mega.h , ser_xmega.h , ser_sam3.h , ser_dsp56k.h
  • SERRF_RXSROVERRUN : ser_at91.h , ser_mega.h , ser_xmega.h , ser_sam3.h , ser_dsp56k.h
  • SERRF_RXTIMEOUT : ser_at91.h , ser_mega.h , ser_xmega.h , ser_sam3.h , ser_dsp56k.h
  • SERRF_TX : ser.h
  • SERRF_TXTIMEOUT : ser_at91.h , ser_mega.h , ser_xmega.h , ser_sam3.h , ser_dsp56k.h
  • SHUFFLE : macros.h
  • SIG_SINGLE : signal.h
  • SIG_SYSTEM5 : signal.h
  • SIG_SYSTEM6 : signal.h
  • SIG_TIMEOUT : signal.h
  • SIG_USER0 : signal.h
  • SIG_USER1 : signal.h
  • SIG_USER2 : signal.h
  • SIG_USER3 : signal.h
  • SIG_USER_MAX : signal.h
  • SILENT_ASSERT : test.h
  • SIN_LEN : afsk.c
  • SIPO_ENABLE : hw_sipo.h
  • SIPO_INIT_PIN : hw_sipo.h
  • SIPO_LOAD : hw_sipo.h
  • SIPO_SET_LD_LEVEL : hw_sipo.h
  • SIPO_SET_LEVEL_LOW : hw_sipo.h
  • SIPO_SI_CLOCK : hw_sipo.h
  • SIPO_SI_HIGH : hw_sipo.h
  • SIZEOF_HPTIME_T : timer_lpc2.h
  • SLIP_DEBUG : cfg_lwip.h
  • SLIPIF_THREAD_NAME : cfg_lwip.h
  • SLIPIF_THREAD_PRIO : cfg_lwip.h
  • SLIPIF_THREAD_STACKSIZE : cfg_lwip.h
  • SMEMCPY : cfg_lwip.h
  • SNMP_CONCURRENT_REQUESTS : cfg_lwip.h
  • SNMP_MIB_DEBUG : cfg_lwip.h
  • SNMP_MSG_DEBUG : cfg_lwip.h
  • SNMP_PRIVATE_MIB : cfg_lwip.h
  • SNMP_SAFE_REQUESTS : cfg_lwip.h
  • SNMP_TRAP_DESTINATIONS : cfg_lwip.h
  • SO_REUSE : cfg_lwip.h
  • SOCKETS_DEBUG : cfg_lwip.h
  • SPACE_OVER : battfs.h
  • SPEED_HOMING : stepper.h
  • SPEED_STOPPED : stepper.h
  • SPI0_BASE : sam3_spi.h
  • SPI0_CR : sam3_spi.h
  • SPI0_CSR0 : sam3_spi.h
  • SPI0_CSR1 : sam3_spi.h
  • SPI0_CSR2 : sam3_spi.h
  • SPI0_CSR3 : sam3_spi.h
  • SPI0_IDR : sam3_spi.h
  • SPI0_IER : sam3_spi.h
  • SPI0_IMR : sam3_spi.h
  • SPI0_MISO : sam3.h
  • SPI0_MOSI : sam3.h
  • SPI0_MR : sam3_spi.h
  • SPI0_RDR : sam3_spi.h
  • SPI0_SPCK : sam3.h
  • SPI0_SR : sam3_spi.h
  • SPI0_TDR : sam3_spi.h
  • SPI1_IRQHANDLER : stm32_ints.h
  • SPI2_IRQHANDLER : stm32_ints.h
  • SPI_BITS : at91_spi.h , sam3_spi.h
  • SPI_BITS_10 : at91_spi.h , sam3_spi.h
  • SPI_BITS_11 : at91_spi.h , sam3_spi.h
  • SPI_BITS_12 : at91_spi.h , sam3_spi.h
  • SPI_BITS_13 : at91_spi.h , sam3_spi.h
  • SPI_BITS_14 : at91_spi.h , sam3_spi.h
  • SPI_BITS_15 : at91_spi.h , sam3_spi.h
  • SPI_BITS_16 : at91_spi.h , sam3_spi.h
  • SPI_BITS_8 : at91_spi.h , sam3_spi.h
  • SPI_BITS_9 : at91_spi.h , sam3_spi.h
  • SPI_BITS_SHIFT : at91_spi.h , sam3_spi.h
  • SPI_CPOL : at91_spi.h , sam3_spi.h
  • SPI_CR_OFF : at91_spi.h , sam3_spi.h
  • SPI_CSAAT : at91_spi.h , sam3_spi.h
  • SPI_CSR0_OFF : at91_spi.h , sam3_spi.h
  • SPI_CSR1_OFF : at91_spi.h , sam3_spi.h
  • SPI_CSR2_OFF : at91_spi.h , sam3_spi.h
  • SPI_CSR3_OFF : at91_spi.h , sam3_spi.h
  • SPI_DDR : hw_spi.h
  • SPI_DLYBCS : at91_spi.h , sam3_spi.h
  • SPI_DLYBCS_SHIFT : at91_spi.h , sam3_spi.h
  • SPI_DLYBCT : at91_spi.h , sam3_spi.h
  • SPI_DLYBCT_SHIFT : at91_spi.h , sam3_spi.h
  • SPI_DLYBS : at91_spi.h , sam3_spi.h
  • SPI_DLYBS_SHIFT : at91_spi.h , sam3_spi.h
  • SPI_ENDRX : at91_spi.h , sam3_spi.h
  • SPI_ENDTX : at91_spi.h , sam3_spi.h
  • SPI_FDIV : at91_spi.h , sam3_spi.h
  • SPI_IDR_OFF : at91_spi.h , sam3_spi.h
  • SPI_IER_OFF : at91_spi.h , sam3_spi.h
  • SPI_IMR_OFF : at91_spi.h , sam3_spi.h
  • SPI_LASTXFER : at91_spi.h , sam3_spi.h
  • SPI_LLB : at91_spi.h , sam3_spi.h
  • SPI_LSB_FIRST : spi_bitbang.h
  • SPI_MODF : at91_spi.h , sam3_spi.h
  • SPI_MODFDIS : at91_spi.h , sam3_spi.h
  • SPI_MR_OFF : at91_spi.h , sam3_spi.h
  • SPI_MSTR : at91_spi.h , sam3_spi.h
  • SPI_NCPHA : at91_spi.h , sam3_spi.h
  • SPI_NORMAL_LOW : ser_mega.h
  • SPI_NSSR : at91_spi.h , sam3_spi.h
  • SPI_OVRES : at91_spi.h , sam3_spi.h
  • SPI_PCS : at91_spi.h , sam3_spi.h
  • SPI_PCS_0 : at91_spi.h , sam3_spi.h
  • SPI_PCS_1 : at91_spi.h , sam3_spi.h
  • SPI_PCS_2 : at91_spi.h , sam3_spi.h
  • SPI_PCS_3 : at91_spi.h , sam3_spi.h
  • SPI_PCS_SHIFT : at91_spi.h , sam3_spi.h
  • SPI_PCSDEC : at91_spi.h , sam3_spi.h
  • SPI_PIN : hw_spi.h
  • SPI_PORT : hw_spi.h
  • SPI_PS : at91_spi.h , sam3_spi.h
  • SPI_RD : at91_spi.h , sam3_spi.h
  • SPI_RD_SHIFT : at91_spi.h , sam3_spi.h
  • SPI_RDR_OFF : at91_spi.h , sam3_spi.h
  • SPI_RDRF : at91_spi.h , sam3_spi.h
  • SPI_RXBUFF : at91_spi.h , sam3_spi.h
  • SPI_SAMPLE_ON_FIRST_EDGE : ser_mega.h
  • SPI_SCBR : sam3_spi.h , at91_spi.h
  • SPI_SCBR_SHIFT : at91_spi.h , sam3_spi.h
  • SPI_SPIDIS : at91_spi.h , sam3_spi.h
  • SPI_SPIEN : at91_spi.h , sam3_spi.h
  • SPI_SPIENS : at91_spi.h , sam3_spi.h
  • SPI_SR_OFF : at91_spi.h , sam3_spi.h
  • SPI_SWRST : at91_spi.h , sam3_spi.h
  • SPI_TD : at91_spi.h , sam3_spi.h
  • SPI_TD_SHIFT : at91_spi.h , sam3_spi.h
  • SPI_TDR_OFF : at91_spi.h , sam3_spi.h
  • SPI_TDRE : at91_spi.h , sam3_spi.h
  • SPI_TXBUFE : at91_spi.h , sam3_spi.h
  • SPI_TXEMPTY : at91_spi.h , sam3_spi.h
  • SRAM_BASE : lm3s_memmap.h
  • SS_ACTIVE : hw_spi.h
  • SS_INACTIVE : hw_spi.h
  • SSC_CKG_FH : at91_ssc.h
  • SSC_CKG_FL : at91_ssc.h
  • SSC_CKG_MASK : at91_ssc.h
  • SSC_CKG_NONE : at91_ssc.h
  • SSC_CKI : at91_ssc.h
  • SSC_CKO_CONT : at91_ssc.h
  • SSC_CKO_MASK : at91_ssc.h
  • SSC_CKO_NONE : at91_ssc.h
  • SSC_CKO_TRAN : at91_ssc.h
  • SSC_CKS_CLK : at91_ssc.h
  • SSC_CKS_DIV : at91_ssc.h
  • SSC_CKS_MASK : at91_ssc.h
  • SSC_CKS_PIN : at91_ssc.h
  • SSC_CMR_OFF : at91_ssc.h
  • SSC_CP0 : at91_ssc.h
  • SSC_CP1 : at91_ssc.h
  • SSC_CR_OFF : at91_ssc.h
  • SSC_DATDEF : at91_ssc.h
  • SSC_DATLEN_MASK : at91_ssc.h
  • SSC_DATNB_MASK : at91_ssc.h
  • SSC_DATNB_SHIFT : at91_ssc.h
  • SSC_DIV_MASK : at91_ssc.h
  • SSC_ENDRX : at91_ssc.h
  • SSC_ENDTX : at91_ssc.h
  • SSC_FSDEN : at91_ssc.h
  • SSC_FSEDGE : at91_ssc.h
  • SSC_FSLEN_MASK : at91_ssc.h
  • SSC_FSLEN_SHIFT : at91_ssc.h
  • SSC_FSOS : at91_ssc.h
  • SSC_FSOS_HIGH : at91_ssc.h
  • SSC_FSOS_LOW : at91_ssc.h
  • SSC_FSOS_NEGATIVE : at91_ssc.h
  • SSC_FSOS_NONE : at91_ssc.h
  • SSC_FSOS_POSITIVE : at91_ssc.h
  • SSC_FSOS_TOGGLE : at91_ssc.h
  • SSC_IDR_OFF : at91_ssc.h
  • SSC_IER_OFF : at91_ssc.h
  • SSC_IMR_OFF : at91_ssc.h
  • SSC_LOOP : at91_ssc.h
  • SSC_MSBF : at91_ssc.h
  • SSC_OVRUN : at91_ssc.h
  • SSC_PERIOD_MASK : at91_ssc.h
  • SSC_PERIOD_SHIFT : at91_ssc.h
  • SSC_RC0R_OFF : at91_ssc.h
  • SSC_RC1R_OFF : at91_ssc.h
  • SSC_RCMR_OFF : at91_ssc.h
  • SSC_RFMR_OFF : at91_ssc.h
  • SSC_RHR_OFF : at91_ssc.h
  • SSC_RSHR_OFF : at91_ssc.h
  • SSC_RXBUFF : at91_ssc.h
  • SSC_RXDIS : at91_ssc.h
  • SSC_RXEN : at91_ssc.h
  • SSC_RXENA : at91_ssc.h
  • SSC_RXRDY : at91_ssc.h
  • SSC_RXSYN : at91_ssc.h
  • SSC_SR_OFF : at91_ssc.h
  • SSC_START_COMP0 : at91_ssc.h
  • SSC_START_CONT : at91_ssc.h
  • SSC_START_EDGE_F : at91_ssc.h
  • SSC_START_FALL_F : at91_ssc.h
  • SSC_START_HIGH_F : at91_ssc.h
  • SSC_START_LEVEL_F : at91_ssc.h
  • SSC_START_LOW_F : at91_ssc.h
  • SSC_START_MASK : at91_ssc.h
  • SSC_START_RISE_F : at91_ssc.h
  • SSC_START_RX : at91_ssc.h
  • SSC_START_TX : at91_ssc.h
  • SSC_STOP : at91_ssc.h
  • SSC_STTDLY_MASK : at91_ssc.h
  • SSC_STTDLY_SHIFT : at91_ssc.h
  • SSC_SWRST : at91_ssc.h
  • SSC_TCMR_OFF : at91_ssc.h
  • SSC_TFMR_OFF : at91_ssc.h
  • SSC_THR_OFF : at91_ssc.h
  • SSC_TSHR_OFF : at91_ssc.h
  • SSC_TXBUFE : at91_ssc.h
  • SSC_TXDIS : at91_ssc.h
  • SSC_TXEMPTY : at91_ssc.h
  • SSC_TXEN : at91_ssc.h
  • SSC_TXENA : at91_ssc.h
  • SSC_TXRDY : at91_ssc.h
  • SSC_TXSYN : at91_ssc.h
  • SSI0_BASE : lm3s_memmap.h
  • SSI0_CPSR_R : lm3s_com.h
  • SSI0_CR0_R : lm3s_com.h
  • SSI0_CR1_R : lm3s_com.h
  • SSI0_DR_R : lm3s_com.h
  • SSI0_ICR_R : lm3s_com.h
  • SSI0_IM_R : lm3s_com.h
  • SSI0_MIS_R : lm3s_com.h
  • SSI0_RIS_R : lm3s_com.h
  • SSI0_SR_R : lm3s_com.h
  • SSI1_BASE : lm3s_memmap.h
  • SSI1_CPSR_R : lm3s_com.h
  • SSI1_CR0_R : lm3s_com.h
  • SSI1_CR1_R : lm3s_com.h
  • SSI1_DR_R : lm3s_com.h
  • SSI1_ICR_R : lm3s_com.h
  • SSI1_IM_R : lm3s_com.h
  • SSI1_MIS_R : lm3s_com.h
  • SSI1_RIS_R : lm3s_com.h
  • SSI1_SR_R : lm3s_com.h
  • SSI_CPSR_CPSDVSR_M : lm3s_com.h , lm3s_ssi.h
  • SSI_CPSR_CPSDVSR_MASK : lm3s_ssi.h
  • SSI_CPSR_CPSDVSR_S : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS : lm3s_ssi.h
  • SSI_CR0_DSS_10 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_11 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_12 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_13 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_14 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_15 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_16 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_4 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_5 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_6 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_7 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_8 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_9 : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_DSS_M : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_FRF_M : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_FRF_MASK : lm3s_ssi.h
  • SSI_CR0_FRF_MOTO : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_FRF_NMW : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_FRF_TI : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_SCR : lm3s_ssi.h
  • SSI_CR0_SCR_M : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_SCR_S : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_SPH : lm3s_com.h , lm3s_ssi.h
  • SSI_CR0_SPO : lm3s_com.h , lm3s_ssi.h
  • SSI_CR1_EOT : lm3s_ssi.h
  • SSI_CR1_LBM : lm3s_com.h , lm3s_ssi.h
  • SSI_CR1_MS : lm3s_com.h , lm3s_ssi.h
  • SSI_CR1_SOD : lm3s_com.h , lm3s_ssi.h
  • SSI_CR1_SSE : lm3s_com.h , lm3s_ssi.h
  • SSI_DMACTL_RXDMAE : lm3s_ssi.h
  • SSI_DMACTL_TXDMAE : lm3s_ssi.h
  • SSI_DR_DATA_M : lm3s_com.h , lm3s_ssi.h
  • SSI_DR_DATA_S : lm3s_com.h , lm3s_ssi.h
  • SSI_FRF_MOTO_MODE_0 : ssi_lm3s.h
  • SSI_FRF_MOTO_MODE_1 : ssi_lm3s.h
  • SSI_FRF_MOTO_MODE_2 : ssi_lm3s.h
  • SSI_FRF_MOTO_MODE_3 : ssi_lm3s.h
  • SSI_FRF_NMW : ssi_lm3s.h
  • SSI_FRF_TI : ssi_lm3s.h
  • SSI_ICR_RORIC : lm3s_com.h , lm3s_ssi.h
  • SSI_ICR_RTIC : lm3s_com.h , lm3s_ssi.h
  • SSI_IM_RORIM : lm3s_com.h , lm3s_ssi.h
  • SSI_IM_RTIM : lm3s_com.h , lm3s_ssi.h
  • SSI_IM_RXIM : lm3s_com.h , lm3s_ssi.h
  • SSI_IM_TXIM : lm3s_com.h , lm3s_ssi.h
  • SSI_INT_RXFF : lm3s_ssi.h
  • SSI_INT_RXOR : lm3s_ssi.h
  • SSI_INT_RXTO : lm3s_ssi.h
  • SSI_INT_TXFF : lm3s_ssi.h
  • SSI_MIS_RORMIS : lm3s_com.h , lm3s_ssi.h
  • SSI_MIS_RTMIS : lm3s_com.h , lm3s_ssi.h
  • SSI_MIS_RXMIS : lm3s_com.h , lm3s_ssi.h
  • SSI_MIS_TXMIS : lm3s_com.h , lm3s_ssi.h
  • SSI_MODE_MASTER : ssi_lm3s.h
  • SSI_MODE_SLAVE : ssi_lm3s.h
  • SSI_MODE_SLAVE_OD : ssi_lm3s.h
  • SSI_O_CPSR : lm3s_ssi.h
  • SSI_O_CR0 : lm3s_ssi.h
  • SSI_O_CR1 : lm3s_ssi.h
  • SSI_O_DMACTL : lm3s_ssi.h
  • SSI_O_DR : lm3s_ssi.h
  • SSI_O_ICR : lm3s_ssi.h
  • SSI_O_IM : lm3s_ssi.h
  • SSI_O_MIS : lm3s_ssi.h
  • SSI_O_RIS : lm3s_ssi.h
  • SSI_O_SR : lm3s_ssi.h
  • SSI_RIS_RORRIS : lm3s_com.h , lm3s_ssi.h
  • SSI_RIS_RTRIS : lm3s_com.h , lm3s_ssi.h
  • SSI_RIS_RXRIS : lm3s_com.h , lm3s_ssi.h
  • SSI_RIS_TXRIS : lm3s_com.h , lm3s_ssi.h
  • SSI_SR_BSY : lm3s_com.h , lm3s_ssi.h
  • SSI_SR_RFF : lm3s_com.h , lm3s_ssi.h
  • SSI_SR_RNE : lm3s_com.h , lm3s_ssi.h
  • SSI_SR_TFE : lm3s_com.h , lm3s_ssi.h
  • SSI_SR_TNF : lm3s_com.h , lm3s_ssi.h
  • STATIC_ASSERT : compiler.h
  • STATIC_ASSERT_EXPR : compiler.h
  • STEPPER_CLOCK : hw_stepper.h
  • STEPPER_LOG_FORMAT : cfg_stepper.h
  • STEPPER_LOG_LEVEL : cfg_stepper.h
  • STEPPER_PRESCALER_LOG2 : hw_stepper.h
  • STEPPER_RESET_DELAY : hw_stepper.h
  • STEPS_INFINITE_NEGATIVE : stepper.h
  • STEPS_INFINITE_POSITIVE : stepper.h
  • SUPC_BASE : sam3_sysctl.h
  • SUPC_CR : sam3_sysctl.h
  • SUPC_CR_KEY : sam3_sysctl.h
  • SUPC_CR_KEY_MASK : sam3_sysctl.h
  • SUPC_CR_KEY_P : sam3_sysctl.h
  • SUPC_CR_OFF : sam3_sysctl.h
  • SUPC_CR_VROFF : sam3_sysctl.h
  • SUPC_CR_XTALSEL : sam3_sysctl.h
  • SUPC_MR : sam3_sysctl.h
  • SUPC_MR_OFF : sam3_sysctl.h
  • SUPC_SMMR : sam3_sysctl.h
  • SUPC_SMMR_OFF : sam3_sysctl.h
  • SUPC_SR : sam3_sysctl.h
  • SUPC_SR_BODRSTS : sam3_sysctl.h
  • SUPC_SR_OFF : sam3_sysctl.h
  • SUPC_SR_OSCSEL : sam3_sysctl.h
  • SUPC_SR_SMOS : sam3_sysctl.h
  • SUPC_SR_SMRSTS : sam3_sysctl.h
  • SUPC_SR_SMS : sam3_sysctl.h
  • SUPC_SR_SMWS : sam3_sysctl.h
  • SUPC_SR_WKUPIS0 : sam3_sysctl.h
  • SUPC_SR_WKUPIS1 : sam3_sysctl.h
  • SUPC_SR_WKUPIS10 : sam3_sysctl.h
  • SUPC_SR_WKUPIS11 : sam3_sysctl.h
  • SUPC_SR_WKUPIS12 : sam3_sysctl.h
  • SUPC_SR_WKUPIS13 : sam3_sysctl.h
  • SUPC_SR_WKUPIS14 : sam3_sysctl.h
  • SUPC_SR_WKUPIS15 : sam3_sysctl.h
  • SUPC_SR_WKUPIS2 : sam3_sysctl.h
  • SUPC_SR_WKUPIS3 : sam3_sysctl.h
  • SUPC_SR_WKUPIS4 : sam3_sysctl.h
  • SUPC_SR_WKUPIS5 : sam3_sysctl.h
  • SUPC_SR_WKUPIS6 : sam3_sysctl.h
  • SUPC_SR_WKUPIS7 : sam3_sysctl.h
  • SUPC_SR_WKUPIS8 : sam3_sysctl.h
  • SUPC_SR_WKUPIS9 : sam3_sysctl.h
  • SUPC_SR_WKUPS : sam3_sysctl.h
  • SUPC_WUIR : sam3_sysctl.h
  • SUPC_WUIR_OFF : sam3_sysctl.h
  • SUPC_WUMR : sam3_sysctl.h
  • SUPC_WUMR_OFF : sam3_sysctl.h
  • SWAB16 : cpu/byteorder.h
  • SWAB32 : cpu/byteorder.h
  • SWAB64 : cpu/byteorder.h
  • SWAP_T : macros.h
  • synctimer_abort : timer.h
  • SYS_DEBUG : cfg_lwip.h
  • SYS_LIGHTWEIGHT_PROT : cfg_lwip.h
  • SYSCTL_BASE : lm3s_memmap.h
  • SYSCTL_CLKVCLR : lm3s_sysctl.h
  • SYSCTL_CLKVCLR_CLR : lm3s_sysctl.h
  • SYSCTL_CLKVCLR_VERCLR : lm3s_sysctl.h
  • SYSCTL_DC0 : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_128K : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_16KB : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_256K : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_32KB : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_64KB : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_8KB : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_96KB : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_M : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_MASK : lm3s_sysctl.h
  • SYSCTL_DC0_FLASHSZ_S : lm3s_sysctl.h
  • SYSCTL_DC0_R : lm3s_com.h
  • SYSCTL_DC0_SRAMSZ_12KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_16KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_20KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_24KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_2KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_32KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_48KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_4KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_64KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_6KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_8KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_96KB : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_M : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_MASK : lm3s_sysctl.h
  • SYSCTL_DC0_SRAMSZ_S : lm3s_sysctl.h
  • SYSCTL_DC1 : lm3s_sysctl.h
  • SYSCTL_DC1_ADC : lm3s_sysctl.h
  • SYSCTL_DC1_ADC0 : lm3s_sysctl.h
  • SYSCTL_DC1_ADC0SPD_1M : lm3s_sysctl.h
  • SYSCTL_DC1_ADC0SPD_M : lm3s_sysctl.h
  • SYSCTL_DC1_ADC1 : lm3s_sysctl.h
  • SYSCTL_DC1_ADC1SPD_1M : lm3s_sysctl.h
  • SYSCTL_DC1_ADC1SPD_M : lm3s_sysctl.h
  • SYSCTL_DC1_ADCSPD_125K : lm3s_sysctl.h
  • SYSCTL_DC1_ADCSPD_1M : lm3s_sysctl.h
  • SYSCTL_DC1_ADCSPD_250K : lm3s_sysctl.h
  • SYSCTL_DC1_ADCSPD_500K : lm3s_sysctl.h
  • SYSCTL_DC1_ADCSPD_M : lm3s_sysctl.h
  • SYSCTL_DC1_ADCSPD_MASK : lm3s_sysctl.h
  • SYSCTL_DC1_CAN0 : lm3s_sysctl.h
  • SYSCTL_DC1_CAN1 : lm3s_sysctl.h
  • SYSCTL_DC1_CAN2 : lm3s_sysctl.h
  • SYSCTL_DC1_HIB : lm3s_sysctl.h
  • SYSCTL_DC1_JTAG : lm3s_sysctl.h
  • SYSCTL_DC1_MINSYSDIV_100 : lm3s_sysctl.h
  • SYSCTL_DC1_MINSYSDIV_20 : lm3s_sysctl.h
  • SYSCTL_DC1_MINSYSDIV_25 : lm3s_sysctl.h
  • SYSCTL_DC1_MINSYSDIV_50 : lm3s_sysctl.h
  • SYSCTL_DC1_MINSYSDIV_66 : lm3s_sysctl.h
  • SYSCTL_DC1_MINSYSDIV_M : lm3s_sysctl.h
  • SYSCTL_DC1_MPU : lm3s_sysctl.h
  • SYSCTL_DC1_PLL : lm3s_sysctl.h
  • SYSCTL_DC1_PWM : lm3s_sysctl.h
  • SYSCTL_DC1_R : lm3s_com.h
  • SYSCTL_DC1_SWD : lm3s_sysctl.h
  • SYSCTL_DC1_SWO : lm3s_sysctl.h
  • SYSCTL_DC1_SYSDIV_MASK : lm3s_sysctl.h
  • SYSCTL_DC1_TEMP : lm3s_sysctl.h
  • SYSCTL_DC1_WDOG : lm3s_sysctl.h
  • SYSCTL_DC1_WDT : lm3s_sysctl.h
  • SYSCTL_DC1_WDT0 : lm3s_sysctl.h
  • SYSCTL_DC1_WDT1 : lm3s_sysctl.h
  • SYSCTL_DC2 : lm3s_sysctl.h
  • SYSCTL_DC2_COMP0 : lm3s_sysctl.h
  • SYSCTL_DC2_COMP1 : lm3s_sysctl.h
  • SYSCTL_DC2_COMP2 : lm3s_sysctl.h
  • SYSCTL_DC2_EPI0 : lm3s_sysctl.h
  • SYSCTL_DC2_I2C : lm3s_sysctl.h
  • SYSCTL_DC2_I2C0 : lm3s_sysctl.h
  • SYSCTL_DC2_I2C1 : lm3s_sysctl.h
  • SYSCTL_DC2_I2S0 : lm3s_sysctl.h
  • SYSCTL_DC2_QEI : lm3s_sysctl.h
  • SYSCTL_DC2_QEI0 : lm3s_sysctl.h
  • SYSCTL_DC2_QEI1 : lm3s_sysctl.h
  • SYSCTL_DC2_R : lm3s_com.h
  • SYSCTL_DC2_SSI : lm3s_sysctl.h
  • SYSCTL_DC2_SSI0 : lm3s_sysctl.h
  • SYSCTL_DC2_SSI1 : lm3s_sysctl.h
  • SYSCTL_DC2_TIMER0 : lm3s_sysctl.h
  • SYSCTL_DC2_TIMER1 : lm3s_sysctl.h
  • SYSCTL_DC2_TIMER2 : lm3s_sysctl.h
  • SYSCTL_DC2_TIMER3 : lm3s_sysctl.h
  • SYSCTL_DC2_UART0 : lm3s_sysctl.h
  • SYSCTL_DC2_UART1 : lm3s_sysctl.h
  • SYSCTL_DC2_UART2 : lm3s_sysctl.h
  • SYSCTL_DC3 : lm3s_sysctl.h
  • SYSCTL_DC3_32KHZ : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0AIN0 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0AIN1 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0AIN2 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0AIN3 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0AIN4 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0AIN5 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0AIN6 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC0AIN7 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC1 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC2 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC3 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC4 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC5 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC6 : lm3s_sysctl.h
  • SYSCTL_DC3_ADC7 : lm3s_sysctl.h
  • SYSCTL_DC3_C0MINUS : lm3s_sysctl.h
  • SYSCTL_DC3_C0O : lm3s_sysctl.h
  • SYSCTL_DC3_C0PLUS : lm3s_sysctl.h
  • SYSCTL_DC3_C1MINUS : lm3s_sysctl.h
  • SYSCTL_DC3_C1O : lm3s_sysctl.h
  • SYSCTL_DC3_C1PLUS : lm3s_sysctl.h
  • SYSCTL_DC3_C2MINUS : lm3s_sysctl.h
  • SYSCTL_DC3_C2O : lm3s_sysctl.h
  • SYSCTL_DC3_C2PLUS : lm3s_sysctl.h
  • SYSCTL_DC3_CCP0 : lm3s_sysctl.h
  • SYSCTL_DC3_CCP1 : lm3s_sysctl.h
  • SYSCTL_DC3_CCP2 : lm3s_sysctl.h
  • SYSCTL_DC3_CCP3 : lm3s_sysctl.h
  • SYSCTL_DC3_CCP4 : lm3s_sysctl.h
  • SYSCTL_DC3_CCP5 : lm3s_sysctl.h
  • SYSCTL_DC3_MC_FAULT0 : lm3s_sysctl.h
  • SYSCTL_DC3_PWM0 : lm3s_sysctl.h
  • SYSCTL_DC3_PWM1 : lm3s_sysctl.h
  • SYSCTL_DC3_PWM2 : lm3s_sysctl.h
  • SYSCTL_DC3_PWM3 : lm3s_sysctl.h
  • SYSCTL_DC3_PWM4 : lm3s_sysctl.h
  • SYSCTL_DC3_PWM5 : lm3s_sysctl.h
  • SYSCTL_DC3_PWMFAULT : lm3s_sysctl.h
  • SYSCTL_DC3_R : lm3s_com.h
  • SYSCTL_DC4 : lm3s_sysctl.h
  • SYSCTL_DC4_CCP6 : lm3s_sysctl.h
  • SYSCTL_DC4_CCP7 : lm3s_sysctl.h
  • SYSCTL_DC4_E1588 : lm3s_sysctl.h
  • SYSCTL_DC4_EMAC0 : lm3s_sysctl.h
  • SYSCTL_DC4_EPHY0 : lm3s_sysctl.h
  • SYSCTL_DC4_ETH : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOA : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOB : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOC : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOD : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOE : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOF : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOG : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOH : lm3s_sysctl.h
  • SYSCTL_DC4_GPIOJ : lm3s_sysctl.h
  • SYSCTL_DC4_PICAL : lm3s_sysctl.h
  • SYSCTL_DC4_R : lm3s_com.h
  • SYSCTL_DC4_ROM : lm3s_sysctl.h
  • SYSCTL_DC4_UDMA : lm3s_sysctl.h
  • SYSCTL_DC5 : lm3s_sysctl.h
  • SYSCTL_DC5_PWM0 : lm3s_sysctl.h
  • SYSCTL_DC5_PWM1 : lm3s_sysctl.h
  • SYSCTL_DC5_PWM2 : lm3s_sysctl.h
  • SYSCTL_DC5_PWM3 : lm3s_sysctl.h
  • SYSCTL_DC5_PWM4 : lm3s_sysctl.h
  • SYSCTL_DC5_PWM5 : lm3s_sysctl.h
  • SYSCTL_DC5_PWM6 : lm3s_sysctl.h
  • SYSCTL_DC5_PWM7 : lm3s_sysctl.h
  • SYSCTL_DC5_PWMEFLT : lm3s_sysctl.h
  • SYSCTL_DC5_PWMESYNC : lm3s_sysctl.h
  • SYSCTL_DC5_PWMFAULT0 : lm3s_sysctl.h
  • SYSCTL_DC5_PWMFAULT1 : lm3s_sysctl.h
  • SYSCTL_DC5_PWMFAULT2 : lm3s_sysctl.h
  • SYSCTL_DC5_PWMFAULT3 : lm3s_sysctl.h
  • SYSCTL_DC6 : lm3s_sysctl.h
  • SYSCTL_DC6_USB0_DEV : lm3s_sysctl.h
  • SYSCTL_DC6_USB0_HOSTDEV : lm3s_sysctl.h
  • SYSCTL_DC6_USB0_M : lm3s_sysctl.h
  • SYSCTL_DC6_USB0_OTG : lm3s_sysctl.h
  • SYSCTL_DC6_USB0PHY : lm3s_sysctl.h
  • SYSCTL_DC7 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH0 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH1 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH10 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH11 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH12 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH13 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH14 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH15 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH16 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH17 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH18 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH19 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH2 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH20 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH21 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH22 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH23 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH24 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH25 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH26 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH27 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH28 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH29 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH3 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH30 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH4 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH5 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH6 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH7 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH8 : lm3s_sysctl.h
  • SYSCTL_DC7_DMACH9 : lm3s_sysctl.h
  • SYSCTL_DC7_SSI0_RX : lm3s_sysctl.h
  • SYSCTL_DC7_SSI0_TX : lm3s_sysctl.h
  • SYSCTL_DC7_SSI1_RX : lm3s_sysctl.h
  • SYSCTL_DC7_SSI1_TX : lm3s_sysctl.h
  • SYSCTL_DC7_UART0_RX : lm3s_sysctl.h
  • SYSCTL_DC7_UART0_TX : lm3s_sysctl.h
  • SYSCTL_DC7_UART1_RX : lm3s_sysctl.h
  • SYSCTL_DC7_UART1_TX : lm3s_sysctl.h
  • SYSCTL_DC7_USB_EP1_RX : lm3s_sysctl.h
  • SYSCTL_DC7_USB_EP1_TX : lm3s_sysctl.h
  • SYSCTL_DC7_USB_EP2_RX : lm3s_sysctl.h
  • SYSCTL_DC7_USB_EP2_TX : lm3s_sysctl.h
  • SYSCTL_DC7_USB_EP3_RX : lm3s_sysctl.h
  • SYSCTL_DC7_USB_EP3_TX : lm3s_sysctl.h
  • SYSCTL_DC8 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN0 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN1 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN10 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN11 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN12 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN13 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN14 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN15 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN2 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN3 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN4 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN5 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN6 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN7 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN8 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC0AIN9 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN0 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN1 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN10 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN11 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN12 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN13 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN14 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN15 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN2 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN3 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN4 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN5 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN6 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN7 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN8 : lm3s_sysctl.h
  • SYSCTL_DC8_ADC1AIN9 : lm3s_sysctl.h
  • SYSCTL_DC9 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC0DC0 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC0DC1 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC0DC2 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC0DC3 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC0DC4 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC0DC5 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC0DC6 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC0DC7 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC1DC0 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC1DC1 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC1DC2 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC1DC3 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC1DC4 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC1DC5 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC1DC6 : lm3s_sysctl.h
  • SYSCTL_DC9_ADC1DC7 : lm3s_sysctl.h
  • SYSCTL_DCGC0 : lm3s_sysctl.h
  • SYSCTL_DCGC0_ADC : lm3s_sysctl.h
  • SYSCTL_DCGC0_ADC0 : lm3s_sysctl.h
  • SYSCTL_DCGC0_ADC1 : lm3s_sysctl.h
  • SYSCTL_DCGC0_CAN0 : lm3s_sysctl.h
  • SYSCTL_DCGC0_CAN1 : lm3s_sysctl.h
  • SYSCTL_DCGC0_CAN2 : lm3s_sysctl.h
  • SYSCTL_DCGC0_HIB : lm3s_sysctl.h
  • SYSCTL_DCGC0_PWM : lm3s_sysctl.h
  • SYSCTL_DCGC0_R : lm3s_com.h
  • SYSCTL_DCGC0_WDT : lm3s_sysctl.h
  • SYSCTL_DCGC0_WDT0 : lm3s_sysctl.h
  • SYSCTL_DCGC0_WDT1 : lm3s_sysctl.h
  • SYSCTL_DCGC1 : lm3s_sysctl.h
  • SYSCTL_DCGC1_COMP0 : lm3s_sysctl.h
  • SYSCTL_DCGC1_COMP1 : lm3s_sysctl.h
  • SYSCTL_DCGC1_COMP2 : lm3s_sysctl.h
  • SYSCTL_DCGC1_EPI0 : lm3s_sysctl.h
  • SYSCTL_DCGC1_I2C0 : lm3s_sysctl.h
  • SYSCTL_DCGC1_I2C1 : lm3s_sysctl.h
  • SYSCTL_DCGC1_I2S0 : lm3s_sysctl.h
  • SYSCTL_DCGC1_QEI0 : lm3s_sysctl.h
  • SYSCTL_DCGC1_QEI1 : lm3s_sysctl.h
  • SYSCTL_DCGC1_R : lm3s_com.h
  • SYSCTL_DCGC1_SSI0 : lm3s_sysctl.h
  • SYSCTL_DCGC1_SSI1 : lm3s_sysctl.h
  • SYSCTL_DCGC1_TIMER0 : lm3s_sysctl.h
  • SYSCTL_DCGC1_TIMER1 : lm3s_sysctl.h
  • SYSCTL_DCGC1_TIMER2 : lm3s_sysctl.h
  • SYSCTL_DCGC1_TIMER3 : lm3s_sysctl.h
  • SYSCTL_DCGC1_UART0 : lm3s_sysctl.h
  • SYSCTL_DCGC1_UART1 : lm3s_sysctl.h
  • SYSCTL_DCGC1_UART2 : lm3s_sysctl.h
  • SYSCTL_DCGC2 : lm3s_sysctl.h
  • SYSCTL_DCGC2_EMAC0 : lm3s_sysctl.h
  • SYSCTL_DCGC2_EPHY0 : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOA : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOB : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOC : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOD : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOE : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOF : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOG : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOH : lm3s_sysctl.h
  • SYSCTL_DCGC2_GPIOJ : lm3s_sysctl.h
  • SYSCTL_DCGC2_R : lm3s_com.h
  • SYSCTL_DCGC2_UDMA : lm3s_sysctl.h
  • SYSCTL_DCGC2_USB0 : lm3s_sysctl.h
  • SYSCTL_DID0 : lm3s_sysctl.h
  • SYSCTL_DID0_CLASS_DUSTDEVIL : lm3s_sysctl.h
  • SYSCTL_DID0_CLASS_FURY : lm3s_sysctl.h
  • SYSCTL_DID0_CLASS_M : lm3s_sysctl.h
  • SYSCTL_DID0_CLASS_MASK : lm3s_sysctl.h
  • SYSCTL_DID0_CLASS_SANDSTORM : lm3s_sysctl.h
  • SYSCTL_DID0_CLASS_TEMPEST : lm3s_sysctl.h
  • SYSCTL_DID0_MAJ_A : lm3s_sysctl.h
  • SYSCTL_DID0_MAJ_B : lm3s_sysctl.h
  • SYSCTL_DID0_MAJ_C : lm3s_sysctl.h
  • SYSCTL_DID0_MAJ_M : lm3s_sysctl.h
  • SYSCTL_DID0_MAJ_MASK : lm3s_sysctl.h
  • SYSCTL_DID0_MAJ_REVA : lm3s_sysctl.h
  • SYSCTL_DID0_MAJ_REVB : lm3s_sysctl.h
  • SYSCTL_DID0_MAJ_REVC : lm3s_sysctl.h
  • SYSCTL_DID0_MIN_0 : lm3s_sysctl.h
  • SYSCTL_DID0_MIN_1 : lm3s_sysctl.h
  • SYSCTL_DID0_MIN_2 : lm3s_sysctl.h
  • SYSCTL_DID0_MIN_3 : lm3s_sysctl.h
  • SYSCTL_DID0_MIN_4 : lm3s_sysctl.h
  • SYSCTL_DID0_MIN_5 : lm3s_sysctl.h
  • SYSCTL_DID0_MIN_M : lm3s_sysctl.h
  • SYSCTL_DID0_MIN_MASK : lm3s_sysctl.h
  • SYSCTL_DID0_R : lm3s_com.h
  • SYSCTL_DID0_VER_0 : lm3s_sysctl.h
  • SYSCTL_DID0_VER_1 : lm3s_sysctl.h
  • SYSCTL_DID0_VER_M : lm3s_sysctl.h
  • SYSCTL_DID0_VER_MASK : lm3s_sysctl.h
  • SYSCTL_DID1 : lm3s_sysctl.h
  • SYSCTL_DID1_FAM_M : lm3s_sysctl.h
  • SYSCTL_DID1_FAM_MASK : lm3s_sysctl.h
  • SYSCTL_DID1_FAM_S : lm3s_sysctl.h
  • SYSCTL_DID1_FAM_STELLARIS : lm3s_sysctl.h
  • SYSCTL_DID1_PINCNT_100 : lm3s_sysctl.h
  • SYSCTL_DID1_PINCNT_28 : lm3s_sysctl.h
  • SYSCTL_DID1_PINCNT_48 : lm3s_sysctl.h
  • SYSCTL_DID1_PINCNT_64 : lm3s_sysctl.h
  • SYSCTL_DID1_PINCNT_M : lm3s_sysctl.h
  • SYSCTL_DID1_PINCNT_MASK : lm3s_sysctl.h
  • SYSCTL_DID1_PKG_28SOIC : lm3s_com.h , lm3s_sysctl.h
  • SYSCTL_DID1_PKG_48QFP : lm3s_com.h , lm3s_sysctl.h
  • SYSCTL_DID1_PKG_BGA : lm3s_sysctl.h
  • SYSCTL_DID1_PKG_M : lm3s_sysctl.h
  • SYSCTL_DID1_PKG_MASK : lm3s_sysctl.h
  • SYSCTL_DID1_PKG_QFN : lm3s_sysctl.h
  • SYSCTL_DID1_PKG_QFP : lm3s_sysctl.h
  • SYSCTL_DID1_PKG_SOIC : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_101 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_102 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1110 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1133 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1138 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1150 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1162 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1165 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1332 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1435 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1439 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1512 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1538 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1601 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1607 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1608 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1620 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1625 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1626 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1627 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1635 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1637 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1751 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1776 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1811 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1816 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1850 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1911 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1918 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1937 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1958 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1960 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1968 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1J11 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1J16 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1N11 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1N16 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1W16 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_1Z16 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2110 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2139 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2276 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2410 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2412 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2432 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2533 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2601 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2608 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2616 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2620 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2637 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2651 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2671 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2678 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2730 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2739 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2776 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2793 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2911 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2918 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2939 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2948 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2950 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2965 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_2B93 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_300 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_301 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_308 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_310 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_315 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_316 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_317 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_328 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3651 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3739 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3748 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3749 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3826 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3J26 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3N26 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3W26 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_3Z26 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5632 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5651 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5652 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5656 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5662 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5732 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5737 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5739 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5747 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5749 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5752 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5762 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5791 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5951 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5956 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5B91 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5K31 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5K36 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5P31 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5P36 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5P51 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5P56 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5R31 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5R36 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5T36 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_5Y36 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_600 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_601 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_608 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_610 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6100 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_611 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6110 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_612 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_613 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_615 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_617 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_618 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_628 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6420 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6422 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6432 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6537 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6610 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6611 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6618 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6633 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6637 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6730 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6753 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6911 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6918 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6938 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6950 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6952 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_6965 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_800 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_801 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_808 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_811 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_812 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_815 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_817 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_818 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_828 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8530 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8538 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8630 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8730 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8733 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8738 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8930 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8933 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8938 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8962 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8970 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_8971 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_9790 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_9792 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_9997 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_9B90 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_9B92 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_9B95 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_9B96 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_9L97 : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_M : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_MASK : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_S : lm3s_sysctl.h
  • SYSCTL_DID1_PRTNO_SHIFT : lm3s_sysctl.h
  • SYSCTL_DID1_QUAL_ES : lm3s_sysctl.h
  • SYSCTL_DID1_QUAL_FQ : lm3s_sysctl.h
  • SYSCTL_DID1_QUAL_M : lm3s_sysctl.h
  • SYSCTL_DID1_QUAL_MASK : lm3s_sysctl.h
  • SYSCTL_DID1_QUAL_PP : lm3s_sysctl.h
  • SYSCTL_DID1_R : lm3s_com.h
  • SYSCTL_DID1_ROHS : lm3s_sysctl.h
  • SYSCTL_DID1_TEMP_C : lm3s_sysctl.h
  • SYSCTL_DID1_TEMP_E : lm3s_sysctl.h
  • SYSCTL_DID1_TEMP_I : lm3s_sysctl.h
  • SYSCTL_DID1_TEMP_M : lm3s_sysctl.h
  • SYSCTL_DID1_TEMP_MASK : lm3s_sysctl.h
  • SYSCTL_DID1_VER_0 : lm3s_sysctl.h
  • SYSCTL_DID1_VER_1 : lm3s_sysctl.h
  • SYSCTL_DID1_VER_M : lm3s_sysctl.h
  • SYSCTL_DID1_VER_MASK : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_1 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_10 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_11 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_12 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_13 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_14 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_15 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_16 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_17 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_18 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_19 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_2 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_20 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_21 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_22 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_23 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_24 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_25 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_26 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_27 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_28 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_29 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_3 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_30 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_31 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_32 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_33 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_34 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_35 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_36 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_37 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_38 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_39 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_4 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_40 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_41 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_42 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_43 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_44 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_45 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_46 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_47 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_48 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_49 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_5 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_50 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_51 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_52 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_53 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_54 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_55 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_56 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_57 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_58 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_59 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_6 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_60 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_61 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_62 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_63 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_64 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_7 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_8 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_9 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_M : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_MSK : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_D_S : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_IOSC : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_O_30 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_O_32 : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_O_IGN : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_O_IO : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_O_M : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_O_MSK : lm3s_sysctl.h
  • SYSCTL_DSLPCLKCFG_R : lm3s_com.h
  • SYSCTL_GPIOHBCTL : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTA : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTB : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTC : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTD : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTE : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTF : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTG : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTH : lm3s_sysctl.h
  • SYSCTL_GPIOHBCTL_PORTJ : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL_PORTA : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL_PORTB : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL_PORTC : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL_PORTD : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL_PORTE : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL_PORTF : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL_PORTG : lm3s_sysctl.h
  • SYSCTL_GPIOHSCTL_PORTH : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_RXEN : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_RXF_M : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_RXF_S : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_RXI_M : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_RXI_S : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_TXEN : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_TXF_M : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_TXF_S : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_TXI_M : lm3s_sysctl.h
  • SYSCTL_I2SMCLKCFG_TXI_S : lm3s_sysctl.h
  • SYSCTL_IMC : lm3s_sysctl.h
  • SYSCTL_IMC_BORIM : lm3s_sysctl.h
  • SYSCTL_IMC_CLIM : lm3s_sysctl.h
  • SYSCTL_IMC_IOFIM : lm3s_sysctl.h
  • SYSCTL_IMC_LDOIM : lm3s_sysctl.h
  • SYSCTL_IMC_MOFIM : lm3s_sysctl.h
  • SYSCTL_IMC_MOSCPUPIM : lm3s_sysctl.h
  • SYSCTL_IMC_PLLFIM : lm3s_sysctl.h
  • SYSCTL_IMC_PLLLIM : lm3s_sysctl.h
  • SYSCTL_IMC_R : lm3s_com.h
  • SYSCTL_IMC_USBPLLLIM : lm3s_sysctl.h
  • SYSCTL_INT_BOR : lm3s_sysctl.h
  • SYSCTL_INT_CUR_LIMIT : lm3s_sysctl.h
  • SYSCTL_INT_IOSC_FAIL : lm3s_sysctl.h
  • SYSCTL_INT_MOSC_FAIL : lm3s_sysctl.h
  • SYSCTL_INT_PLL_FAIL : lm3s_sysctl.h
  • SYSCTL_INT_PLL_LOCK : lm3s_sysctl.h
  • SYSCTL_INT_POR : lm3s_sysctl.h
  • SYSCTL_LDOARST : lm3s_sysctl.h
  • SYSCTL_LDOARST_ARST : lm3s_sysctl.h
  • SYSCTL_LDOARST_LDOARST : lm3s_sysctl.h
  • SYSCTL_LDOPCTL : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_25V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_30V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_35V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_40V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_45V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_50V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_55V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_60V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_65V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_70V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_2_75V : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_M : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_MASK : lm3s_sysctl.h
  • SYSCTL_LDOPCTL_R : lm3s_com.h
  • SYSCTL_MISC : lm3s_sysctl.h
  • SYSCTL_MISC_BORMIS : lm3s_sysctl.h
  • SYSCTL_MISC_CLMIS : lm3s_sysctl.h
  • SYSCTL_MISC_IOFMIS : lm3s_sysctl.h
  • SYSCTL_MISC_LDOMIS : lm3s_sysctl.h
  • SYSCTL_MISC_MOFMIS : lm3s_sysctl.h
  • SYSCTL_MISC_MOSCPUPMIS : lm3s_sysctl.h
  • SYSCTL_MISC_PLLLMIS : lm3s_sysctl.h
  • SYSCTL_MISC_R : lm3s_com.h
  • SYSCTL_MISC_USBPLLLMIS : lm3s_sysctl.h
  • SYSCTL_MOSCCTL : lm3s_sysctl.h
  • SYSCTL_MOSCCTL_CVAL : lm3s_sysctl.h
  • SYSCTL_NVMSTAT : lm3s_sysctl.h
  • SYSCTL_NVMSTAT_FWB : lm3s_sysctl.h
  • SYSCTL_NVMSTAT_TPSW : lm3s_sysctl.h
  • SYSCTL_PBORCTL : lm3s_sysctl.h
  • SYSCTL_PBORCTL_BOR_MASK : lm3s_sysctl.h
  • SYSCTL_PBORCTL_BOR_SH : lm3s_sysctl.h
  • SYSCTL_PBORCTL_BORIOR : lm3s_sysctl.h
  • SYSCTL_PBORCTL_BORTIM_M : lm3s_sysctl.h
  • SYSCTL_PBORCTL_BORTIM_S : lm3s_sysctl.h
  • SYSCTL_PBORCTL_BORWT : lm3s_sysctl.h
  • SYSCTL_PBORCTL_R : lm3s_com.h
  • SYSCTL_PIOSCCAL : lm3s_sysctl.h
  • SYSCTL_PIOSCCAL_CAL : lm3s_sysctl.h
  • SYSCTL_PIOSCCAL_UPDATE : lm3s_sysctl.h
  • SYSCTL_PIOSCCAL_UT_M : lm3s_sysctl.h
  • SYSCTL_PIOSCCAL_UT_S : lm3s_sysctl.h
  • SYSCTL_PIOSCCAL_UTEN : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT_CR_M : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT_CRFAIL : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT_CRNONE : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT_CRPASS : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT_CT_M : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT_CT_S : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT_DT_M : lm3s_sysctl.h
  • SYSCTL_PIOSCSTAT_DT_S : lm3s_sysctl.h
  • SYSCTL_PLLCFG : lm3s_sysctl.h
  • SYSCTL_PLLCFG_F_M : lm3s_sysctl.h
  • SYSCTL_PLLCFG_F_MASK : lm3s_sysctl.h
  • SYSCTL_PLLCFG_F_S : lm3s_sysctl.h
  • SYSCTL_PLLCFG_F_SHIFT : lm3s_sysctl.h
  • SYSCTL_PLLCFG_OD_1 : lm3s_sysctl.h
  • SYSCTL_PLLCFG_OD_2 : lm3s_sysctl.h
  • SYSCTL_PLLCFG_OD_4 : lm3s_sysctl.h
  • SYSCTL_PLLCFG_OD_M : lm3s_sysctl.h
  • SYSCTL_PLLCFG_OD_MASK : lm3s_sysctl.h
  • SYSCTL_PLLCFG_R : lm3s_com.h
  • SYSCTL_PLLCFG_R_M : lm3s_sysctl.h
  • SYSCTL_PLLCFG_R_MASK : lm3s_sysctl.h
  • SYSCTL_PLLCFG_R_S : lm3s_sysctl.h
  • SYSCTL_PLLCFG_R_SHIFT : lm3s_sysctl.h
  • SYSCTL_RCC : lm3s_sysctl.h
  • SYSCTL_RCC2 : lm3s_sysctl.h
  • SYSCTL_RCC2_BYPASS2 : lm3s_sysctl.h
  • SYSCTL_RCC2_DIV400 : lm3s_sysctl.h
  • SYSCTL_RCC2_FRACT : lm3s_sysctl.h
  • SYSCTL_RCC2_OSCSRC2_30 : lm3s_sysctl.h
  • SYSCTL_RCC2_OSCSRC2_32 : lm3s_sysctl.h
  • SYSCTL_RCC2_OSCSRC2_419 : lm3s_sysctl.h
  • SYSCTL_RCC2_OSCSRC2_IO : lm3s_sysctl.h
  • SYSCTL_RCC2_OSCSRC2_IO4 : lm3s_sysctl.h
  • SYSCTL_RCC2_OSCSRC2_M : lm3s_sysctl.h
  • SYSCTL_RCC2_OSCSRC2_MO : lm3s_sysctl.h
  • SYSCTL_RCC2_OSCSRC2_MSK : lm3s_sysctl.h
  • SYSCTL_RCC2_PWRDN2 : lm3s_sysctl.h
  • SYSCTL_RCC2_R : lm3s_com.h
  • SYSCTL_RCC2_SYSDIV2_10 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_11 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_12 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_13 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_14 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_15 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_16 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_17 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_18 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_19 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_2 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_20 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_21 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_22 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_23 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_24 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_25 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_26 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_27 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_28 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_29 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_3 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_30 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_31 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_32 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_33 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_34 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_35 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_36 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_37 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_38 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_39 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_4 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_40 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_41 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_42 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_43 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_44 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_45 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_46 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_47 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_48 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_49 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_5 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_50 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_51 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_52 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_53 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_54 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_55 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_56 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_57 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_58 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_59 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_6 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_60 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_61 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_62 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_63 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_64 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_7 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_8 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_9 : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_M : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_MSK : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2_S : lm3s_sysctl.h
  • SYSCTL_RCC2_SYSDIV2LSB : lm3s_sysctl.h
  • SYSCTL_RCC2_USBPWRDN : lm3s_sysctl.h
  • SYSCTL_RCC2_USEFRACT : lm3s_sysctl.h
  • SYSCTL_RCC2_USERCC2 : lm3s_sysctl.h
  • SYSCTL_RCC_ACG : lm3s_sysctl.h
  • SYSCTL_RCC_BYPASS : lm3s_sysctl.h
  • SYSCTL_RCC_IOSCDIS : lm3s_sysctl.h
  • SYSCTL_RCC_IOSCVER : lm3s_sysctl.h
  • SYSCTL_RCC_MOSCDIS : lm3s_sysctl.h
  • SYSCTL_RCC_MOSCVER : lm3s_sysctl.h
  • SYSCTL_RCC_OE : lm3s_sysctl.h
  • SYSCTL_RCC_OEN : lm3s_sysctl.h
  • SYSCTL_RCC_OSCSRC_30 : lm3s_sysctl.h
  • SYSCTL_RCC_OSCSRC_INT : lm3s_sysctl.h
  • SYSCTL_RCC_OSCSRC_INT4 : lm3s_sysctl.h
  • SYSCTL_RCC_OSCSRC_M : lm3s_sysctl.h
  • SYSCTL_RCC_OSCSRC_MAIN : lm3s_sysctl.h
  • SYSCTL_RCC_OSCSRC_MASK : lm3s_sysctl.h
  • SYSCTL_RCC_OSCSRC_S : lm3s_sysctl.h
  • SYSCTL_RCC_OSCSRC_SHIFT : lm3s_sysctl.h
  • SYSCTL_RCC_PLLVER : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_16 : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_2 : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_32 : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_4 : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_64 : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_8 : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_M : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_MASK : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_S : lm3s_sysctl.h
  • SYSCTL_RCC_PWMDIV_SHIFT : lm3s_sysctl.h
  • SYSCTL_RCC_PWRDN : lm3s_sysctl.h
  • SYSCTL_RCC_R : lm3s_com.h
  • SYSCTL_RCC_SYSDIV_10 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_11 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_12 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_13 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_14 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_15 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_16 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_2 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_3 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_4 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_5 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_6 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_7 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_8 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_9 : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_M : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_MASK : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_S : lm3s_sysctl.h
  • SYSCTL_RCC_SYSDIV_SHIFT : lm3s_sysctl.h
  • SYSCTL_RCC_USE_PWMDIV : lm3s_sysctl.h
  • SYSCTL_RCC_USE_SYSDIV : lm3s_sysctl.h
  • SYSCTL_RCC_USEPWMDIV : lm3s_sysctl.h
  • SYSCTL_RCC_USESYSDIV : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_10MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_12_2MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_12MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_13_5MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_14_3MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_16_3MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_16MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_1_84MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_1MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_2_45MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_2MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_3_57MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_3_68MHz : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_3_68MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_4_09MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_4_91MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_4MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_4MHz : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_5_12MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_5MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_6_14MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_6MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_7_37MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_8_19MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_8MHZ : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_M : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_MASK : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_S : lm3s_sysctl.h
  • SYSCTL_RCC_XTAL_SHIFT : lm3s_sysctl.h
  • SYSCTL_RCGC0 : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC0 : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC0SPD_125K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC0SPD_1M : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC0SPD_250K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC0SPD_500K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC0SPD_M : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC1 : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC1SPD_125K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC1SPD_1M : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC1SPD_250K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC1SPD_500K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADC1SPD_M : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADCSPD125K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADCSPD1M : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADCSPD250K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADCSPD500K : lm3s_sysctl.h
  • SYSCTL_RCGC0_ADCSPD_M : lm3s_sysctl.h
  • SYSCTL_RCGC0_CAN0 : lm3s_sysctl.h
  • SYSCTL_RCGC0_CAN1 : lm3s_sysctl.h
  • SYSCTL_RCGC0_CAN2 : lm3s_sysctl.h
  • SYSCTL_RCGC0_HIB : lm3s_sysctl.h
  • SYSCTL_RCGC0_PWM : lm3s_sysctl.h
  • SYSCTL_RCGC0_R : lm3s_com.h
  • SYSCTL_RCGC0_WDT : lm3s_sysctl.h
  • SYSCTL_RCGC0_WDT0 : lm3s_sysctl.h
  • SYSCTL_RCGC0_WDT1 : lm3s_sysctl.h
  • SYSCTL_RCGC1 : lm3s_sysctl.h
  • SYSCTL_RCGC1_COMP0 : lm3s_sysctl.h
  • SYSCTL_RCGC1_COMP1 : lm3s_sysctl.h
  • SYSCTL_RCGC1_COMP2 : lm3s_sysctl.h
  • SYSCTL_RCGC1_EPI0 : lm3s_sysctl.h
  • SYSCTL_RCGC1_I2C0 : lm3s_sysctl.h
  • SYSCTL_RCGC1_I2C1 : lm3s_sysctl.h
  • SYSCTL_RCGC1_I2S0 : lm3s_sysctl.h
  • SYSCTL_RCGC1_QEI0 : lm3s_sysctl.h
  • SYSCTL_RCGC1_QEI1 : lm3s_sysctl.h
  • SYSCTL_RCGC1_R : lm3s_com.h
  • SYSCTL_RCGC1_SSI0 : lm3s_sysctl.h
  • SYSCTL_RCGC1_SSI1 : lm3s_sysctl.h
  • SYSCTL_RCGC1_TIMER0 : lm3s_sysctl.h
  • SYSCTL_RCGC1_TIMER1 : lm3s_sysctl.h
  • SYSCTL_RCGC1_TIMER2 : lm3s_sysctl.h
  • SYSCTL_RCGC1_TIMER3 : lm3s_sysctl.h
  • SYSCTL_RCGC1_UART0 : lm3s_sysctl.h
  • SYSCTL_RCGC1_UART1 : lm3s_sysctl.h
  • SYSCTL_RCGC1_UART2 : lm3s_sysctl.h
  • SYSCTL_RCGC2 : lm3s_sysctl.h
  • SYSCTL_RCGC2_EMAC0 : lm3s_sysctl.h
  • SYSCTL_RCGC2_EPHY0 : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOA : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOB : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOC : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOD : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOE : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOF : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOG : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOH : lm3s_sysctl.h
  • SYSCTL_RCGC2_GPIOJ : lm3s_sysctl.h
  • SYSCTL_RCGC2_R : lm3s_com.h
  • SYSCTL_RCGC2_UDMA : lm3s_sysctl.h
  • SYSCTL_RCGC2_USB0 : lm3s_sysctl.h
  • SYSCTL_RESC : lm3s_sysctl.h
  • SYSCTL_RESC_BOR : lm3s_sysctl.h
  • SYSCTL_RESC_EXT : lm3s_sysctl.h
  • SYSCTL_RESC_LDO : lm3s_sysctl.h
  • SYSCTL_RESC_MOSCFAIL : lm3s_sysctl.h
  • SYSCTL_RESC_POR : lm3s_sysctl.h
  • SYSCTL_RESC_R : lm3s_com.h
  • SYSCTL_RESC_SW : lm3s_sysctl.h
  • SYSCTL_RESC_WDOG : lm3s_sysctl.h
  • SYSCTL_RESC_WDT : lm3s_sysctl.h
  • SYSCTL_RESC_WDT0 : lm3s_sysctl.h
  • SYSCTL_RESC_WDT1 : lm3s_sysctl.h
  • SYSCTL_RIS : lm3s_sysctl.h
  • SYSCTL_RIS_BORRIS : lm3s_sysctl.h
  • SYSCTL_RIS_CLRIS : lm3s_sysctl.h
  • SYSCTL_RIS_IOFRIS : lm3s_sysctl.h
  • SYSCTL_RIS_LDORIS : lm3s_sysctl.h
  • SYSCTL_RIS_MOFRIS : lm3s_sysctl.h
  • SYSCTL_RIS_MOSCPUPRIS : lm3s_sysctl.h
  • SYSCTL_RIS_PLLFRIS : lm3s_sysctl.h
  • SYSCTL_RIS_PLLLRIS : lm3s_sysctl.h
  • SYSCTL_RIS_R : lm3s_com.h
  • SYSCTL_RIS_USBPLLLRIS : lm3s_sysctl.h
  • SYSCTL_SCGC0 : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC0 : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC0SPD_125K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC0SPD_1M : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC0SPD_250K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC0SPD_500K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC0SPD_M : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC1 : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC1SPD_125K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC1SPD_1M : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC1SPD_250K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC1SPD_500K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADC1SPD_M : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADCSPD125K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADCSPD1M : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADCSPD250K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADCSPD500K : lm3s_sysctl.h
  • SYSCTL_SCGC0_ADCSPD_M : lm3s_sysctl.h
  • SYSCTL_SCGC0_CAN0 : lm3s_sysctl.h
  • SYSCTL_SCGC0_CAN1 : lm3s_sysctl.h
  • SYSCTL_SCGC0_CAN2 : lm3s_sysctl.h
  • SYSCTL_SCGC0_HIB : lm3s_sysctl.h
  • SYSCTL_SCGC0_PWM : lm3s_sysctl.h
  • SYSCTL_SCGC0_R : lm3s_com.h
  • SYSCTL_SCGC0_WDT : lm3s_sysctl.h
  • SYSCTL_SCGC0_WDT0 : lm3s_sysctl.h
  • SYSCTL_SCGC0_WDT1 : lm3s_sysctl.h
  • SYSCTL_SCGC1 : lm3s_sysctl.h
  • SYSCTL_SCGC1_COMP0 : lm3s_sysctl.h
  • SYSCTL_SCGC1_COMP1 : lm3s_sysctl.h
  • SYSCTL_SCGC1_COMP2 : lm3s_sysctl.h
  • SYSCTL_SCGC1_EPI0 : lm3s_sysctl.h
  • SYSCTL_SCGC1_I2C0 : lm3s_sysctl.h
  • SYSCTL_SCGC1_I2C1 : lm3s_sysctl.h
  • SYSCTL_SCGC1_I2S0 : lm3s_sysctl.h
  • SYSCTL_SCGC1_QEI0 : lm3s_sysctl.h
  • SYSCTL_SCGC1_QEI1 : lm3s_sysctl.h
  • SYSCTL_SCGC1_R : lm3s_com.h
  • SYSCTL_SCGC1_SSI0 : lm3s_sysctl.h
  • SYSCTL_SCGC1_SSI1 : lm3s_sysctl.h
  • SYSCTL_SCGC1_TIMER0 : lm3s_sysctl.h
  • SYSCTL_SCGC1_TIMER1 : lm3s_sysctl.h
  • SYSCTL_SCGC1_TIMER2 : lm3s_sysctl.h
  • SYSCTL_SCGC1_TIMER3 : lm3s_sysctl.h
  • SYSCTL_SCGC1_UART0 : lm3s_sysctl.h
  • SYSCTL_SCGC1_UART1 : lm3s_sysctl.h
  • SYSCTL_SCGC1_UART2 : lm3s_sysctl.h
  • SYSCTL_SCGC2 : lm3s_sysctl.h
  • SYSCTL_SCGC2_EMAC0 : lm3s_sysctl.h
  • SYSCTL_SCGC2_EPHY0 : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOA : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOB : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOC : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOD : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOE : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOF : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOG : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOH : lm3s_sysctl.h
  • SYSCTL_SCGC2_GPIOJ : lm3s_sysctl.h
  • SYSCTL_SCGC2_R : lm3s_com.h
  • SYSCTL_SCGC2_UDMA : lm3s_sysctl.h
  • SYSCTL_SCGC2_USB0 : lm3s_sysctl.h
  • SYSCTL_SET0_ADC : lm3s_sysctl.h
  • SYSCTL_SET0_ADCSPD_125K : lm3s_sysctl.h
  • SYSCTL_SET0_ADCSPD_1M : lm3s_sysctl.h
  • SYSCTL_SET0_ADCSPD_250K : lm3s_sysctl.h
  • SYSCTL_SET0_ADCSPD_500K : lm3s_sysctl.h
  • SYSCTL_SET0_ADCSPD_MASK : lm3s_sysctl.h
  • SYSCTL_SET0_CAN0 : lm3s_sysctl.h
  • SYSCTL_SET0_CAN1 : lm3s_sysctl.h
  • SYSCTL_SET0_CAN2 : lm3s_sysctl.h
  • SYSCTL_SET0_HIB : lm3s_sysctl.h
  • SYSCTL_SET0_PWM : lm3s_sysctl.h
  • SYSCTL_SET0_WDOG : lm3s_sysctl.h
  • SYSCTL_SET1_COMP0 : lm3s_sysctl.h
  • SYSCTL_SET1_COMP1 : lm3s_sysctl.h
  • SYSCTL_SET1_COMP2 : lm3s_sysctl.h
  • SYSCTL_SET1_I2C : lm3s_sysctl.h
  • SYSCTL_SET1_I2C0 : lm3s_sysctl.h
  • SYSCTL_SET1_I2C1 : lm3s_sysctl.h
  • SYSCTL_SET1_QEI : lm3s_sysctl.h
  • SYSCTL_SET1_QEI0 : lm3s_sysctl.h
  • SYSCTL_SET1_QEI1 : lm3s_sysctl.h
  • SYSCTL_SET1_SSI : lm3s_sysctl.h
  • SYSCTL_SET1_SSI0 : lm3s_sysctl.h
  • SYSCTL_SET1_SSI1 : lm3s_sysctl.h
  • SYSCTL_SET1_TIMER0 : lm3s_sysctl.h
  • SYSCTL_SET1_TIMER1 : lm3s_sysctl.h
  • SYSCTL_SET1_TIMER2 : lm3s_sysctl.h
  • SYSCTL_SET1_TIMER3 : lm3s_sysctl.h
  • SYSCTL_SET1_UART0 : lm3s_sysctl.h
  • SYSCTL_SET1_UART1 : lm3s_sysctl.h
  • SYSCTL_SET1_UART2 : lm3s_sysctl.h
  • SYSCTL_SET2_ETH : lm3s_sysctl.h
  • SYSCTL_SET2_GPIOA : lm3s_sysctl.h
  • SYSCTL_SET2_GPIOB : lm3s_sysctl.h
  • SYSCTL_SET2_GPIOC : lm3s_sysctl.h
  • SYSCTL_SET2_GPIOD : lm3s_sysctl.h
  • SYSCTL_SET2_GPIOE : lm3s_sysctl.h
  • SYSCTL_SET2_GPIOF : lm3s_sysctl.h
  • SYSCTL_SET2_GPIOG : lm3s_sysctl.h
  • SYSCTL_SET2_GPIOH : lm3s_sysctl.h
  • SYSCTL_SRCR0 : lm3s_sysctl.h
  • SYSCTL_SRCR0_ADC : lm3s_sysctl.h
  • SYSCTL_SRCR0_ADC0 : lm3s_sysctl.h
  • SYSCTL_SRCR0_ADC1 : lm3s_sysctl.h
  • SYSCTL_SRCR0_CAN0 : lm3s_sysctl.h
  • SYSCTL_SRCR0_CAN1 : lm3s_sysctl.h
  • SYSCTL_SRCR0_CAN2 : lm3s_sysctl.h
  • SYSCTL_SRCR0_HIB : lm3s_sysctl.h
  • SYSCTL_SRCR0_PWM : lm3s_sysctl.h
  • SYSCTL_SRCR0_R : lm3s_com.h
  • SYSCTL_SRCR0_WDT : lm3s_sysctl.h
  • SYSCTL_SRCR0_WDT0 : lm3s_sysctl.h
  • SYSCTL_SRCR0_WDT1 : lm3s_sysctl.h
  • SYSCTL_SRCR1 : lm3s_sysctl.h
  • SYSCTL_SRCR1_COMP0 : lm3s_sysctl.h
  • SYSCTL_SRCR1_COMP1 : lm3s_sysctl.h
  • SYSCTL_SRCR1_COMP2 : lm3s_sysctl.h
  • SYSCTL_SRCR1_EPI0 : lm3s_sysctl.h
  • SYSCTL_SRCR1_I2C0 : lm3s_sysctl.h
  • SYSCTL_SRCR1_I2C1 : lm3s_sysctl.h
  • SYSCTL_SRCR1_I2S0 : lm3s_sysctl.h
  • SYSCTL_SRCR1_QEI0 : lm3s_sysctl.h
  • SYSCTL_SRCR1_QEI1 : lm3s_sysctl.h
  • SYSCTL_SRCR1_R : lm3s_com.h
  • SYSCTL_SRCR1_SSI0 : lm3s_sysctl.h
  • SYSCTL_SRCR1_SSI1 : lm3s_sysctl.h
  • SYSCTL_SRCR1_TIMER0 : lm3s_sysctl.h
  • SYSCTL_SRCR1_TIMER1 : lm3s_sysctl.h
  • SYSCTL_SRCR1_TIMER2 : lm3s_sysctl.h
  • SYSCTL_SRCR1_TIMER3 : lm3s_sysctl.h
  • SYSCTL_SRCR1_UART0 : lm3s_sysctl.h
  • SYSCTL_SRCR1_UART1 : lm3s_sysctl.h
  • SYSCTL_SRCR1_UART2 : lm3s_sysctl.h
  • SYSCTL_SRCR2 : lm3s_sysctl.h
  • SYSCTL_SRCR2_EMAC0 : lm3s_sysctl.h
  • SYSCTL_SRCR2_EPHY0 : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOA : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOB : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOC : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOD : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOE : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOF : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOG : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOH : lm3s_sysctl.h
  • SYSCTL_SRCR2_GPIOJ : lm3s_sysctl.h
  • SYSCTL_SRCR2_R : lm3s_com.h
  • SYSCTL_SRCR2_UDMA : lm3s_sysctl.h
  • SYSCTL_SRCR2_USB0 : lm3s_sysctl.h
  • SYSCTL_USER0 : lm3s_sysctl.h
  • SYSCTL_USER1 : lm3s_sysctl.h
  • SYSIRQ_PRIORITY : sysirq_at91.c


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- t -

  • TAG_END_MARKER : dtag.h
  • TAG_ETX : keytag.c
  • TAG_STX : keytag.c
  • TAMPER_IRQHANDLER : stm32_ints.h
  • TAS_VOL_MAX : tas5706a.h
  • TAS_VOL_MIN : tas5706a.h
  • TC0_BASE : sam3_tc.h
  • TC0_BCR : sam3_tc.h
  • TC0_BCR_OFF : sam3_tc.h
  • TC0_BMR : sam3_tc.h
  • TC0_BMR_OFF : sam3_tc.h
  • TC0_CCR : at91_tc.h
  • TC0_CCR0 : sam3_tc.h
  • TC0_CCR0_OFF : sam3_tc.h
  • TC0_CCR1 : sam3_tc.h
  • TC0_CCR1_OFF : sam3_tc.h
  • TC0_CCR2 : sam3_tc.h
  • TC0_CCR2_OFF : sam3_tc.h
  • TC0_CMR : at91_tc.h
  • TC0_CMR0 : sam3_tc.h
  • TC0_CMR0_OFF : sam3_tc.h
  • TC0_CMR1 : sam3_tc.h
  • TC0_CMR1_OFF : sam3_tc.h
  • TC0_CMR2 : sam3_tc.h
  • TC0_CMR2_OFF : sam3_tc.h
  • TC0_CV : at91_tc.h
  • TC0_CV0 : sam3_tc.h
  • TC0_CV0_OFF : sam3_tc.h
  • TC0_CV1 : sam3_tc.h
  • TC0_CV1_OFF : sam3_tc.h
  • TC0_CV2 : sam3_tc.h
  • TC0_CV2_OFF : sam3_tc.h
  • TC0_FMR : sam3_tc.h
  • TC0_FMR_OFF : sam3_tc.h
  • TC0_IDR : at91_tc.h
  • TC0_IDR0 : sam3_tc.h
  • TC0_IDR0_OFF : sam3_tc.h
  • TC0_IDR1 : sam3_tc.h
  • TC0_IDR1_OFF : sam3_tc.h
  • TC0_IDR2 : sam3_tc.h
  • TC0_IDR2_OFF : sam3_tc.h
  • TC0_IER : at91_tc.h
  • TC0_IER0 : sam3_tc.h
  • TC0_IER0_OFF : sam3_tc.h
  • TC0_IER1 : sam3_tc.h
  • TC0_IER1_OFF : sam3_tc.h
  • TC0_IER2 : sam3_tc.h
  • TC0_IER2_OFF : sam3_tc.h
  • TC0_IMR : at91_tc.h
  • TC0_IMR0 : sam3_tc.h
  • TC0_IMR0_OFF : sam3_tc.h
  • TC0_IMR1 : sam3_tc.h
  • TC0_IMR1_OFF : sam3_tc.h
  • TC0_IMR2 : sam3_tc.h
  • TC0_IMR2_OFF : sam3_tc.h
  • TC0_QIDR : sam3_tc.h
  • TC0_QIDR_OFF : sam3_tc.h
  • TC0_QIER : sam3_tc.h
  • TC0_QIER_OFF : sam3_tc.h
  • TC0_QIMR : sam3_tc.h
  • TC0_QIMR_OFF : sam3_tc.h
  • TC0_QISR : sam3_tc.h
  • TC0_QISR_OFF : sam3_tc.h
  • TC0_RA : at91_tc.h
  • TC0_RA0 : sam3_tc.h
  • TC0_RA0_OFF : sam3_tc.h
  • TC0_RA1 : sam3_tc.h
  • TC0_RA1_OFF : sam3_tc.h
  • TC0_RA2 : sam3_tc.h
  • TC0_RA2_OFF : sam3_tc.h
  • TC0_RB : at91_tc.h
  • TC0_RB0 : sam3_tc.h
  • TC0_RB0_OFF : sam3_tc.h
  • TC0_RB1 : sam3_tc.h
  • TC0_RB1_OFF : sam3_tc.h
  • TC0_RB2 : sam3_tc.h
  • TC0_RB2_OFF : sam3_tc.h
  • TC0_RC : at91_tc.h
  • TC0_RC0 : sam3_tc.h
  • TC0_RC0_OFF : sam3_tc.h
  • TC0_RC1 : sam3_tc.h
  • TC0_RC1_OFF : sam3_tc.h
  • TC0_RC2 : sam3_tc.h
  • TC0_RC2_OFF : sam3_tc.h
  • TC0_SMMR0 : sam3_tc.h
  • TC0_SMMR0_OFF : sam3_tc.h
  • TC0_SMMR1 : sam3_tc.h
  • TC0_SMMR1_OFF : sam3_tc.h
  • TC0_SMMR2 : sam3_tc.h
  • TC0_SMMR2_OFF : sam3_tc.h
  • TC0_SR : at91_tc.h
  • TC0_SR0 : sam3_tc.h
  • TC0_SR0_OFF : sam3_tc.h
  • TC0_SR1 : sam3_tc.h
  • TC0_SR1_OFF : sam3_tc.h
  • TC0_SR2 : sam3_tc.h
  • TC0_SR2_OFF : sam3_tc.h
  • TC0_WPMR : sam3_tc.h
  • TC0_WPMR_OFF : sam3_tc.h
  • TC1_BASE : sam3_tc.h
  • TC1_CCR : at91_tc.h
  • TC1_CMR : at91_tc.h
  • TC1_CV : at91_tc.h
  • TC1_IDR : at91_tc.h
  • TC1_IER : at91_tc.h
  • TC1_IMR : at91_tc.h
  • TC1_RA : at91_tc.h
  • TC1_RB : at91_tc.h
  • TC1_RC : at91_tc.h
  • TC1_SR : at91_tc.h
  • TC2_BASE : sam3_tc.h
  • TC2_CCR : at91_tc.h
  • TC2_CMR : at91_tc.h
  • TC2_CV : at91_tc.h
  • TC2_IDR : at91_tc.h
  • TC2_IER : at91_tc.h
  • TC2_IMR : at91_tc.h
  • TC2_RA : at91_tc.h
  • TC2_RB : at91_tc.h
  • TC2_RC : at91_tc.h
  • TC2_SR : at91_tc.h
  • TC_ABETRG_MASK : at91_tc.h
  • TC_ABETRG_TIOA : at91_tc.h
  • TC_ACPA_CLEAR_OUTPUT : at91_tc.h
  • TC_ACPA_MASK : at91_tc.h
  • TC_ACPA_SET_OUTPUT : at91_tc.h
  • TC_ACPA_TOGGLE_OUTPUT : at91_tc.h
  • TC_ACPC_CLEAR_OUTPUT : at91_tc.h
  • TC_ACPC_MASK : at91_tc.h
  • TC_ACPC_SET_OUTPUT : at91_tc.h
  • TC_ACPC_TOGGLE_OUTPUT : at91_tc.h
  • TC_AEEVT_CLEAR_OUTPUT : at91_tc.h
  • TC_AEEVT_MASK : at91_tc.h
  • TC_AEEVT_SET_OUTPUT : at91_tc.h
  • TC_AEEVT_TOGGLE_OUTPUT : at91_tc.h
  • TC_ASWTRG_CLEAR_OUTPUT : at91_tc.h
  • TC_ASWTRG_MASK : at91_tc.h
  • TC_ASWTRG_SET_OUTPUT : at91_tc.h
  • TC_ASWTRG_TOGGLE_OUTPUT : at91_tc.h
  • TC_BCPB_CLEAR_OUTPUT : at91_tc.h
  • TC_BCPB_MASK : at91_tc.h
  • TC_BCPB_SET_OUTPUT : at91_tc.h
  • TC_BCPB_TOGGLE_OUTPUT : at91_tc.h
  • TC_BCPC_CLEAR_OUTPUT : at91_tc.h
  • TC_BCPC_MASK : at91_tc.h
  • TC_BCPC_SET_OUTPUT : at91_tc.h
  • TC_BCPC_TOGGLE_OUTPUT : at91_tc.h
  • TC_BCR : at91_tc.h
  • TC_BCR_OFF : at91_tc.h
  • TC_BEEVT_CLEAR_OUTPUT : at91_tc.h
  • TC_BEEVT_MASK : at91_tc.h
  • TC_BEEVT_SET_OUTPUT : at91_tc.h
  • TC_BEEVT_TOGGLE_OUTPUT : at91_tc.h
  • TC_BMR : at91_tc.h
  • TC_BMR_OFF : at91_tc.h
  • TC_BSWTRG_CLEAR_OUTPUT : at91_tc.h
  • TC_BSWTRG_MASK : at91_tc.h
  • TC_BSWTRG_SET_OUTPUT : at91_tc.h
  • TC_BSWTRG_TOGGLE_OUTPUT : at91_tc.h
  • TC_BURST_MASK : at91_tc.h
  • TC_BURST_NONE : at91_tc.h
  • TC_BURST_XC1 : at91_tc.h
  • TC_BURST_XC2 : at91_tc.h
  • TC_BUSRT_XC0 : at91_tc.h
  • TC_CCR_CLKDIS : sam3_tc.h
  • TC_CCR_CLKEN : sam3_tc.h
  • TC_CCR_SWTRG : sam3_tc.h
  • TC_CLKDIS : at91_tc.h
  • TC_CLKEN : at91_tc.h
  • TC_CLKI : at91_tc.h
  • TC_CLKS_MASK : at91_tc.h
  • TC_CLKS_MCK1024 : at91_tc.h
  • TC_CLKS_MCK128 : at91_tc.h
  • TC_CLKS_MCK2 : at91_tc.h
  • TC_CLKS_MCK32 : at91_tc.h
  • TC_CLKS_MCK8 : at91_tc.h
  • TC_CLKS_XC0 : at91_tc.h
  • TC_CLKS_XC1 : at91_tc.h
  • TC_CLKS_XC2 : at91_tc.h
  • TC_CLKSTA : at91_tc.h
  • TC_CMR_ACPA_CLEAR : sam3_tc.h
  • TC_CMR_ACPA_SET : sam3_tc.h
  • TC_CMR_ACPA_TOGGLE : sam3_tc.h
  • TC_CMR_ACPC_CLEAR : sam3_tc.h
  • TC_CMR_ACPC_SET : sam3_tc.h
  • TC_CMR_ACPC_TOGGLE : sam3_tc.h
  • TC_CMR_CPCTRG : sam3_tc.h
  • TC_CMR_OFF : at91_tc.h
  • TC_CMR_WAVE : sam3_tc.h
  • TC_COVFS : at91_tc.h
  • TC_CPAS : at91_tc.h
  • TC_CPBS : at91_tc.h
  • TC_CPCDIS : at91_tc.h
  • TC_CPCS : at91_tc.h
  • TC_CPCSTOP : at91_tc.h
  • TC_CPCTRG : at91_tc.h
  • TC_CV_OFF : at91_tc.h
  • TC_EEVT_MASK : at91_tc.h
  • TC_EEVT_TIOB : at91_tc.h
  • TC_EEVT_XC0 : at91_tc.h
  • TC_EEVT_XC1 : at91_tc.h
  • TC_EEVT_XC2 : at91_tc.h
  • TC_EEVTEDG_BOTH_EDGE : at91_tc.h
  • TC_EEVTEDG_FALLING_EDGE : at91_tc.h
  • TC_EEVTEDG_MASK : at91_tc.h
  • TC_EEVTEDG_RISING_EDGE : at91_tc.h
  • TC_ENETRG : at91_tc.h
  • TC_ETRGEDG_BOTH_EDGE : at91_tc.h
  • TC_ETRGEDG_FALLING_EDGE : at91_tc.h
  • TC_ETRGEDG_MASK : at91_tc.h
  • TC_ETRGEDG_RISING_EDGE : at91_tc.h
  • TC_ETRGS : at91_tc.h
  • TC_IDR_OFF : at91_tc.h
  • TC_IER_OFF : at91_tc.h
  • TC_IMR_OFF : at91_tc.h
  • TC_LDBDIS : at91_tc.h
  • TC_LDBSTOP : at91_tc.h
  • TC_LDRA_BOTH_EDGE : at91_tc.h
  • TC_LDRA_FALLING_EDGE : at91_tc.h
  • TC_LDRA_MASK : at91_tc.h
  • TC_LDRA_RISING_EDGE : at91_tc.h
  • TC_LDRAS : at91_tc.h
  • TC_LDRB_BOTH_EDGE : at91_tc.h
  • TC_LDRB_FALLING_EDGE : at91_tc.h
  • TC_LDRB_MASK : at91_tc.h
  • TC_LDRB_RISING_EDGE : at91_tc.h
  • TC_LDRBS : at91_tc.h
  • TC_LOVRS : at91_tc.h
  • TC_MTIOA : at91_tc.h
  • TC_MTIOB : at91_tc.h
  • TC_NONEXC0 : at91_tc.h
  • TC_NONEXC1 : at91_tc.h
  • TC_NONEXC2 : at91_tc.h
  • TC_RA_OFF : at91_tc.h
  • TC_RB_OFF : at91_tc.h
  • TC_RC_OFF : at91_tc.h
  • TC_SR_OFF : at91_tc.h
  • TC_SWTRG : at91_tc.h
  • TC_SYNC : at91_tc.h
  • TC_TC0_OFF : at91_tc.h
  • TC_TC0XC0S : at91_tc.h
  • TC_TC1_OFF : at91_tc.h
  • TC_TC1XC1S : at91_tc.h
  • TC_TC2_OFF : at91_tc.h
  • TC_TC2XC2S : at91_tc.h
  • TC_TCLK0XC0 : at91_tc.h
  • TC_TCLK1XC1 : at91_tc.h
  • TC_TCLK2XC2 : at91_tc.h
  • TC_TIMER_CLOCK1 : sam3_tc.h
  • TC_TIMER_CLOCK2 : sam3_tc.h
  • TC_TIOA0XC1 : at91_tc.h
  • TC_TIOA0XC2 : at91_tc.h
  • TC_TIOA1XC0 : at91_tc.h
  • TC_TIOA1XC2 : at91_tc.h
  • TC_TIOA2XC0 : at91_tc.h
  • TC_TIOA2XC1 : at91_tc.h
  • TC_WAVE : at91_tc.h
  • TC_WAVSEL_MASK : at91_tc.h
  • TC_WAVSEL_UP : at91_tc.h
  • TC_WAVSEL_UP_RC_TRG : at91_tc.h
  • TC_WAVSEL_UPDOWN : at91_tc.h
  • TC_WAVSEL_UPDOWN_RC_TRG : at91_tc.h
  • TCP_CALCULATE_EFF_SEND_MSS : cfg_lwip.h
  • TCP_CWND_DEBUG : cfg_lwip.h
  • TCP_DEBUG : cfg_lwip.h
  • TCP_DEFAULT_LISTEN_BACKLOG : cfg_lwip.h
  • TCP_FR_DEBUG : cfg_lwip.h
  • TCP_INPUT_DEBUG : cfg_lwip.h
  • TCP_LISTEN_BACKLOG : cfg_lwip.h
  • TCP_MAXRTX : cfg_lwip.h
  • TCP_MSS : cfg_lwip.h
  • TCP_OUTPUT_DEBUG : cfg_lwip.h
  • TCP_QLEN_DEBUG : cfg_lwip.h
  • TCP_QUEUE_OOSEQ : cfg_lwip.h
  • TCP_RST_DEBUG : cfg_lwip.h
  • TCP_RTO_DEBUG : cfg_lwip.h
  • TCP_SND_BUF : cfg_lwip.h
  • TCP_SND_QUEUELEN : cfg_lwip.h
  • TCP_SNDLOWAT : cfg_lwip.h
  • TCP_SYNMAXRTX : cfg_lwip.h
  • TCP_TTL : cfg_lwip.h
  • TCP_WND : cfg_lwip.h
  • TCP_WND_DEBUG : cfg_lwip.h
  • TCP_WND_UPDATE_THRESHOLD : cfg_lwip.h
  • TCPIP_DEBUG : cfg_lwip.h
  • TCPIP_MBOX_SIZE : cfg_lwip.h
  • TCPIP_THREAD_NAME : cfg_lwip.h
  • TCPIP_THREAD_PRIO : cfg_lwip.h
  • TCPIP_THREAD_STACKSIZE : cfg_lwip.h
  • TEA_BLOCK_LEN : tea.h
  • TEA_KEY_LEN : tea.h
  • TEXT_CENTER : text.h
  • TEXT_FILL : text.h
  • TEXT_NORMAL : text.h
  • TEXT_RIGHT : text.h
  • THIS_FILE : debug.h
  • TIM1_BRK_IRQHANDLER : stm32_ints.h
  • TIM1_CC_IRQHANDLER : stm32_ints.h
  • TIM1_TRG_COM_IRQHANDLER : stm32_ints.h
  • TIM1_UP_IRQHANDLER : stm32_ints.h
  • TIM2_IRQHANDLER : stm32_ints.h
  • TIM3_IRQHANDLER : stm32_ints.h
  • TIM4_IRQHANDLER : stm32_ints.h
  • TIME2CLOCKS : ramp.h
  • TIMER0_BASE : lm3s_memmap.h
  • TIMER0_CFG_R : lm3s_com.h
  • TIMER0_COMPARE0 : timer_lpc2.h
  • TIMER0_CTL_R : lm3s_com.h
  • TIMER0_ICR_R : lm3s_com.h
  • TIMER0_ID : timer_lpc2.c
  • TIMER0_IMR_R : lm3s_com.h
  • TIMER0_MIS_R : lm3s_com.h
  • TIMER0_RIS_R : lm3s_com.h
  • TIMER0_TAILR_R : lm3s_com.h
  • TIMER0_TAMATCHR_R : lm3s_com.h
  • TIMER0_TAMR_R : lm3s_com.h
  • TIMER0_TAPMR_R : lm3s_com.h
  • TIMER0_TAPR_R : lm3s_com.h
  • TIMER0_TAR_R : lm3s_com.h
  • TIMER0_TBILR_R : lm3s_com.h
  • TIMER0_TBMATCHR_R : lm3s_com.h
  • TIMER0_TBMR_R : lm3s_com.h
  • TIMER0_TBPMR_R : lm3s_com.h
  • TIMER0_TBPR_R : lm3s_com.h
  • TIMER0_TBR_R : lm3s_com.h
  • TIMER1_BASE : lm3s_memmap.h
  • TIMER1_CFG_R : lm3s_com.h
  • TIMER1_CTL_R : lm3s_com.h
  • TIMER1_ICR_R : lm3s_com.h
  • TIMER1_IMR_R : lm3s_com.h
  • TIMER1_MIS_R : lm3s_com.h
  • TIMER1_RIS_R : lm3s_com.h
  • TIMER1_TAILR_R : lm3s_com.h
  • TIMER1_TAMATCHR_R : lm3s_com.h
  • TIMER1_TAMR_R : lm3s_com.h
  • TIMER1_TAPMR_R : lm3s_com.h
  • TIMER1_TAPR_R : lm3s_com.h
  • TIMER1_TAR_R : lm3s_com.h
  • TIMER1_TBILR_R : lm3s_com.h
  • TIMER1_TBMATCHR_R : lm3s_com.h
  • TIMER1_TBMR_R : lm3s_com.h
  • TIMER1_TBPMR_R : lm3s_com.h
  • TIMER1_TBPR_R : lm3s_com.h
  • TIMER1_TBR_R : lm3s_com.h
  • TIMER2_BASE : lm3s_memmap.h
  • TIMER2_CFG_R : lm3s_com.h
  • TIMER2_CTL_R : lm3s_com.h
  • TIMER2_ICR_R : lm3s_com.h
  • TIMER2_IMR_R : lm3s_com.h
  • TIMER2_MIS_R : lm3s_com.h
  • TIMER2_RIS_R : lm3s_com.h
  • TIMER2_TAILR_R : lm3s_com.h
  • TIMER2_TAMATCHR_R : lm3s_com.h
  • TIMER2_TAMR_R : lm3s_com.h
  • TIMER2_TAPMR_R : lm3s_com.h
  • TIMER2_TAPR_R : lm3s_com.h
  • TIMER2_TAR_R : lm3s_com.h
  • TIMER2_TBILR_R : lm3s_com.h
  • TIMER2_TBMATCHR_R : lm3s_com.h
  • TIMER2_TBMR_R : lm3s_com.h
  • TIMER2_TBPMR_R : lm3s_com.h
  • TIMER2_TBPR_R : lm3s_com.h
  • TIMER2_TBR_R : lm3s_com.h
  • TIMER3_BASE : lm3s_memmap.h
  • TIMER3_CFG_R : lm3s_com.h
  • TIMER3_CTL_R : lm3s_com.h
  • TIMER3_ICR_R : lm3s_com.h
  • TIMER3_IMR_R : lm3s_com.h
  • TIMER3_MIS_R : lm3s_com.h
  • TIMER3_RIS_R : lm3s_com.h
  • TIMER3_TAILR_R : lm3s_com.h
  • TIMER3_TAMATCHR_R : lm3s_com.h
  • TIMER3_TAMR_R : lm3s_com.h
  • TIMER3_TAPMR_R : lm3s_com.h
  • TIMER3_TAPR_R : lm3s_com.h
  • TIMER3_TAR_R : lm3s_com.h
  • TIMER3_TBILR_R : lm3s_com.h
  • TIMER3_TBMATCHR_R : lm3s_com.h
  • TIMER3_TBMR_R : lm3s_com.h
  • TIMER3_TBPMR_R : lm3s_com.h
  • TIMER3_TBPR_R : lm3s_com.h
  • TIMER3_TBR_R : lm3s_com.h
  • TIMER_CFG_16_BIT : lm3s_com.h
  • TIMER_CFG_32_BIT_RTC : lm3s_com.h
  • TIMER_CFG_32_BIT_TIMER : lm3s_com.h
  • TIMER_CFG_M : lm3s_com.h
  • TIMER_CTL_RTCEN : lm3s_com.h
  • TIMER_CTL_TAEN : lm3s_com.h
  • TIMER_CTL_TAEVENT_BOTH : lm3s_com.h
  • TIMER_CTL_TAEVENT_M : lm3s_com.h
  • TIMER_CTL_TAEVENT_NEG : lm3s_com.h
  • TIMER_CTL_TAEVENT_POS : lm3s_com.h
  • TIMER_CTL_TAOTE : lm3s_com.h
  • TIMER_CTL_TAPWML : lm3s_com.h
  • TIMER_CTL_TASTALL : lm3s_com.h
  • TIMER_CTL_TBEN : lm3s_com.h
  • TIMER_CTL_TBEVENT_BOTH : lm3s_com.h
  • TIMER_CTL_TBEVENT_M : lm3s_com.h
  • TIMER_CTL_TBEVENT_NEG : lm3s_com.h
  • TIMER_CTL_TBEVENT_POS : lm3s_com.h
  • TIMER_CTL_TBOTE : lm3s_com.h
  • TIMER_CTL_TBPWML : lm3s_com.h
  • TIMER_CTL_TBSTALL : lm3s_com.h
  • TIMER_DEFAULT : timer_xmega.h , timer_lpc2.h , timer_at91.h , timer_cm3.h , timer_mega.h
  • TIMER_HW_CNT : timer_lpc2.h
  • TIMER_HW_HPTICKS_PER_SEC : timer_mega.h , timer_dsp56k.h , timer_qt.h , timer_posix.h , timer_lpc2.h , timer_xmega.h
  • timer_hw_irq : timer_qt.h , timer_mega.h , timer_posix.h
  • timer_hw_triggered : timer_mega.h , timer_qt.c
  • TIMER_ICR_CAECINT : lm3s_com.h
  • TIMER_ICR_CAMCINT : lm3s_com.h
  • TIMER_ICR_CBECINT : lm3s_com.h
  • TIMER_ICR_CBMCINT : lm3s_com.h
  • TIMER_ICR_RTCCINT : lm3s_com.h
  • TIMER_ICR_TATOCINT : lm3s_com.h
  • TIMER_ICR_TBTOCINT : lm3s_com.h
  • TIMER_IMR_CAEIM : lm3s_com.h
  • TIMER_IMR_CAMIM : lm3s_com.h
  • TIMER_IMR_CBEIM : lm3s_com.h
  • TIMER_IMR_CBMIM : lm3s_com.h
  • TIMER_IMR_RTCIM : lm3s_com.h
  • TIMER_IMR_TATOIM : lm3s_com.h
  • TIMER_IMR_TBTOIM : lm3s_com.h
  • TIMER_MIS_CAEMIS : lm3s_com.h
  • TIMER_MIS_CAMMIS : lm3s_com.h
  • TIMER_MIS_CBEMIS : lm3s_com.h
  • TIMER_MIS_CBMMIS : lm3s_com.h
  • TIMER_MIS_RTCMIS : lm3s_com.h
  • TIMER_MIS_TATOMIS : lm3s_com.h
  • TIMER_MIS_TBTOMIS : lm3s_com.h
  • TIMER_ON_GPTM : timer_cm3.h
  • TIMER_ON_OUTPUT_COMPARE0 : timer_mega.h
  • TIMER_ON_OUTPUT_COMPARE2 : timer_mega.h
  • TIMER_ON_OVERFLOW1 : timer_mega.h
  • TIMER_ON_OVERFLOW3 : timer_mega.h
  • TIMER_ON_PIT : timer_at91.h
  • TIMER_PRESCALER : timer_dsp56k.h
  • TIMER_RETRIGGER : timer_i196.h
  • TIMER_RIS_CAERIS : lm3s_com.h
  • TIMER_RIS_CAMRIS : lm3s_com.h
  • TIMER_RIS_CBERIS : lm3s_com.h
  • TIMER_RIS_CBMRIS : lm3s_com.h
  • TIMER_RIS_RTCRIS : lm3s_com.h
  • TIMER_RIS_TATORIS : lm3s_com.h
  • TIMER_RIS_TBTORIS : lm3s_com.h
  • TIMER_TAILR_TAILRH_M : lm3s_com.h
  • TIMER_TAILR_TAILRH_S : lm3s_com.h
  • TIMER_TAILR_TAILRL_M : lm3s_com.h
  • TIMER_TAILR_TAILRL_S : lm3s_com.h
  • TIMER_TAMATCHR_TAMRH_M : lm3s_com.h
  • TIMER_TAMATCHR_TAMRH_S : lm3s_com.h
  • TIMER_TAMATCHR_TAMRL_M : lm3s_com.h
  • TIMER_TAMATCHR_TAMRL_S : lm3s_com.h
  • TIMER_TAMR_TAAMS : lm3s_com.h
  • TIMER_TAMR_TACMR : lm3s_com.h
  • TIMER_TAMR_TAMR_1_SHOT : lm3s_com.h
  • TIMER_TAMR_TAMR_CAP : lm3s_com.h
  • TIMER_TAMR_TAMR_M : lm3s_com.h
  • TIMER_TAMR_TAMR_PERIOD : lm3s_com.h
  • TIMER_TAPMR_TAPSMR_M : lm3s_com.h
  • TIMER_TAPMR_TAPSMR_S : lm3s_com.h
  • TIMER_TAPR_TAPSR_M : lm3s_com.h
  • TIMER_TAPR_TAPSR_S : lm3s_com.h
  • TIMER_TAR_TARH_M : lm3s_com.h
  • TIMER_TAR_TARH_S : lm3s_com.h
  • TIMER_TAR_TARL_M : lm3s_com.h
  • TIMER_TAR_TARL_S : lm3s_com.h
  • TIMER_TBILR_TBILRL_M : lm3s_com.h
  • TIMER_TBILR_TBILRL_S : lm3s_com.h
  • TIMER_TBMATCHR_TBMRL_M : lm3s_com.h
  • TIMER_TBMATCHR_TBMRL_S : lm3s_com.h
  • TIMER_TBMR_TBAMS : lm3s_com.h
  • TIMER_TBMR_TBCMR : lm3s_com.h
  • TIMER_TBMR_TBMR_1_SHOT : lm3s_com.h
  • TIMER_TBMR_TBMR_CAP : lm3s_com.h
  • TIMER_TBMR_TBMR_M : lm3s_com.h
  • TIMER_TBMR_TBMR_PERIOD : lm3s_com.h
  • TIMER_TBPMR_TBPSMR_M : lm3s_com.h
  • TIMER_TBPMR_TBPSMR_S : lm3s_com.h
  • TIMER_TBPR_TBPSR_M : lm3s_com.h
  • TIMER_TBPR_TBPSR_S : lm3s_com.h
  • TIMER_TBR_TBRL_M : lm3s_com.h
  • TIMER_TBR_TBRL_S : lm3s_com.h
  • TIMER_TICKS_PER_SEC : timer_lpc2.h , timer_posix.h
  • TPIU_BASE : lm3s_memmap.h
  • TRY : except.h
  • TWI_CHDIV : at91_twi.h
  • TWI_CHDIV_SHIFT : at91_twi.h
  • TWI_CKDIV : at91_twi.h
  • TWI_CKDIV_SHIFT : at91_twi.h
  • TWI_CLDIV : at91_twi.h
  • TWI_CLDIV_SHIFT : at91_twi.h
  • TWI_CR : at91_twi.h
  • TWI_CR_OFF : at91_twi.h
  • TWI_CWGR : at91_twi.h
  • TWI_CWGR_OFF : at91_twi.h
  • TWI_DADR : at91_twi.h
  • TWI_DADR_SHIFT : at91_twi.h
  • TWI_IADR : at91_twi.h
  • TWI_IADR_MASK : at91_twi.h
  • TWI_IADR_OFF : at91_twi.h
  • TWI_IADR_SHIFT : at91_twi.h
  • TWI_IADRSZ : at91_twi.h
  • TWI_IADRSZ_1BYTE : at91_twi.h
  • TWI_IADRSZ_2BYTE : at91_twi.h
  • TWI_IADRSZ_3BYTE : at91_twi.h
  • TWI_IADRSZ_NONE : at91_twi.h
  • TWI_IADRSZ_SHIFT : at91_twi.h
  • TWI_IDR : at91_twi.h
  • TWI_IDR_OFF : at91_twi.h
  • TWI_IER : at91_twi.h
  • TWI_IER_OFF : at91_twi.h
  • TWI_IMR : at91_twi.h
  • TWI_IMR_OFF : at91_twi.h
  • TWI_MMR : at91_twi.h
  • TWI_MMR_OFF : at91_twi.h
  • TWI_MREAD : at91_twi.h
  • TWI_MSDIS : at91_twi.h
  • TWI_MSEN : at91_twi.h
  • TWI_NACK : at91_twi.h
  • TWI_RHR : at91_twi.h
  • TWI_RHR_OFF : at91_twi.h
  • TWI_RXRDY : at91_twi.h
  • TWI_SR : at91_twi.h
  • TWI_SR_OFF : at91_twi.h
  • TWI_START : at91_twi.h
  • TWI_STOP : at91_twi.h
  • TWI_SWRST : at91_twi.h
  • TWI_THR : at91_twi.h
  • TWI_THR_OFF : at91_twi.h
  • TWI_TIMEOUT : twi_at91.c
  • TWI_TXCOMP : at91_twi.h
  • TWI_TXRDY : at91_twi.h
  • TX_FIFO_SIZE : lm3s_ssi.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- u -

  • UART0_BASE : lm3s_memmap.h
  • UART0_CTL_R : lm3s_com.h
  • UART0_DR_R : lm3s_com.h
  • UART0_ECR_R : lm3s_com.h
  • UART0_FBRD_R : lm3s_com.h
  • UART0_FR_R : lm3s_com.h
  • UART0_IBRD_R : lm3s_com.h
  • UART0_ICR_R : lm3s_com.h
  • UART0_IFLS_R : lm3s_com.h
  • UART0_ILPR_R : lm3s_com.h
  • UART0_IM_R : lm3s_com.h
  • UART0_LCRH_R : lm3s_com.h
  • UART0_MIS_R : lm3s_com.h
  • UART0_RIS_R : lm3s_com.h
  • UART0_RSR_R : lm3s_com.h
  • UART1_BASE : lm3s_memmap.h
  • UART1_CTL_R : lm3s_com.h
  • UART1_DR_R : lm3s_com.h
  • UART1_ECR_R : lm3s_com.h
  • UART1_FBRD_R : lm3s_com.h
  • UART1_FR_R : lm3s_com.h
  • UART1_IBRD_R : lm3s_com.h
  • UART1_ICR_R : lm3s_com.h
  • UART1_IFLS_R : lm3s_com.h
  • UART1_ILPR_R : lm3s_com.h
  • UART1_IM_R : lm3s_com.h
  • UART1_LCRH_R : lm3s_com.h
  • UART1_MIS_R : lm3s_com.h
  • UART1_RIS_R : lm3s_com.h
  • UART1_RSR_R : lm3s_com.h
  • UART2_BASE : lm3s_memmap.h
  • UART2_CTL_R : lm3s_com.h
  • UART2_DR_R : lm3s_com.h
  • UART2_ECR_R : lm3s_com.h
  • UART2_FBRD_R : lm3s_com.h
  • UART2_FR_R : lm3s_com.h
  • UART2_IBRD_R : lm3s_com.h
  • UART2_ICR_R : lm3s_com.h
  • UART2_IFLS_R : lm3s_com.h
  • UART2_ILPR_R : lm3s_com.h
  • UART2_IM_R : lm3s_com.h
  • UART2_LCRH_R : lm3s_com.h
  • UART2_MIS_R : lm3s_com.h
  • UART2_RIS_R : lm3s_com.h
  • UART2_RSR_R : lm3s_com.h
  • UART_BRGR_CD_MASK : sam3_uart.h
  • UART_BRGR_CD_SHIFT : sam3_uart.h
  • UART_BRGR_OFF : sam3_uart.h
  • UART_CR_OFF : sam3_uart.h
  • UART_CR_RSTRX : sam3_uart.h
  • UART_CR_RSTSTA : sam3_uart.h
  • UART_CR_RSTTX : sam3_uart.h
  • UART_CR_RXDIS : sam3_uart.h
  • UART_CR_RXEN : sam3_uart.h
  • UART_CR_TXDIS : sam3_uart.h
  • UART_CR_TXEN : sam3_uart.h
  • UART_CTL_CTSEN : lm3s_uart.h
  • UART_CTL_DTR : lm3s_uart.h
  • UART_CTL_EOT : lm3s_uart.h
  • UART_CTL_HSE : lm3s_uart.h
  • UART_CTL_LBE : lm3s_com.h , lm3s_uart.h
  • UART_CTL_LIN : lm3s_uart.h
  • UART_CTL_RTS : lm3s_uart.h
  • UART_CTL_RTSEN : lm3s_uart.h
  • UART_CTL_RXE : lm3s_com.h , lm3s_uart.h
  • UART_CTL_SIREN : lm3s_com.h , lm3s_uart.h
  • UART_CTL_SIRLP : lm3s_com.h , lm3s_uart.h
  • UART_CTL_SMART : lm3s_uart.h
  • UART_CTL_TXE : lm3s_com.h , lm3s_uart.h
  • UART_CTL_UARTEN : lm3s_com.h , lm3s_uart.h
  • UART_DMACTL_DMAERR : lm3s_uart.h
  • UART_DMACTL_RXDMAE : lm3s_uart.h
  • UART_DMACTL_TXDMAE : lm3s_uart.h
  • UART_DR_BE : lm3s_com.h , lm3s_uart.h
  • UART_DR_DATA_M : lm3s_com.h , lm3s_uart.h
  • UART_DR_DATA_MASK : lm3s_uart.h
  • UART_DR_DATA_S : lm3s_com.h , lm3s_uart.h
  • UART_DR_FE : lm3s_com.h , lm3s_uart.h
  • UART_DR_OE : lm3s_com.h , lm3s_uart.h
  • UART_DR_PE : lm3s_com.h , lm3s_uart.h
  • UART_ECR_DATA_M : lm3s_com.h , lm3s_uart.h
  • UART_ECR_DATA_S : lm3s_com.h , lm3s_uart.h
  • UART_FBRD_DIVFRAC_M : lm3s_com.h , lm3s_uart.h
  • UART_FBRD_DIVFRAC_MASK : lm3s_uart.h
  • UART_FBRD_DIVFRAC_S : lm3s_com.h , lm3s_uart.h
  • UART_FR_BUSY : lm3s_com.h , lm3s_uart.h
  • UART_FR_CTS : lm3s_uart.h
  • UART_FR_DCD : lm3s_uart.h
  • UART_FR_DSR : lm3s_uart.h
  • UART_FR_RI : lm3s_uart.h
  • UART_FR_RXFE : lm3s_com.h , lm3s_uart.h
  • UART_FR_RXFF : lm3s_com.h , lm3s_uart.h
  • UART_FR_TXFE : lm3s_com.h , lm3s_uart.h
  • UART_FR_TXFF : lm3s_com.h , lm3s_uart.h
  • UART_IBRD_DIVINT_M : lm3s_com.h , lm3s_uart.h
  • UART_IBRD_DIVINT_MASK : lm3s_uart.h
  • UART_IBRD_DIVINT_S : lm3s_com.h , lm3s_uart.h
  • UART_ICR_BEIC : lm3s_com.h , lm3s_uart.h
  • UART_ICR_CTSMIC : lm3s_uart.h
  • UART_ICR_DCDMIC : lm3s_uart.h
  • UART_ICR_DSRMIC : lm3s_uart.h
  • UART_ICR_FEIC : lm3s_com.h , lm3s_uart.h
  • UART_ICR_LME1MIC : lm3s_uart.h
  • UART_ICR_LME5MIC : lm3s_uart.h
  • UART_ICR_LMSBMIC : lm3s_uart.h
  • UART_ICR_OEIC : lm3s_com.h , lm3s_uart.h
  • UART_ICR_PEIC : lm3s_com.h , lm3s_uart.h
  • UART_ICR_RIMIC : lm3s_uart.h
  • UART_ICR_RTIC : lm3s_com.h , lm3s_uart.h
  • UART_ICR_RXIC : lm3s_com.h , lm3s_uart.h
  • UART_ICR_TXIC : lm3s_com.h , lm3s_uart.h
  • UART_IDR_ENDRX : sam3_uart.h
  • UART_IDR_ENDTX : sam3_uart.h
  • UART_IDR_FRAME : sam3_uart.h
  • UART_IDR_OFF : sam3_uart.h
  • UART_IDR_OVRE : sam3_uart.h
  • UART_IDR_PARE : sam3_uart.h
  • UART_IDR_RXBUFF : sam3_uart.h
  • UART_IDR_RXRDY : sam3_uart.h
  • UART_IDR_TXBUFE : sam3_uart.h
  • UART_IDR_TXEMPTY : sam3_uart.h
  • UART_IDR_TXRDY : sam3_uart.h
  • UART_IER_ENDRX : sam3_uart.h
  • UART_IER_ENDTX : sam3_uart.h
  • UART_IER_FRAME : sam3_uart.h
  • UART_IER_OFF : sam3_uart.h
  • UART_IER_OVRE : sam3_uart.h
  • UART_IER_PARE : sam3_uart.h
  • UART_IER_RXBUFF : sam3_uart.h
  • UART_IER_RXRDY : sam3_uart.h
  • UART_IER_TXBUFE : sam3_uart.h
  • UART_IER_TXEMPTY : sam3_uart.h
  • UART_IER_TXRDY : sam3_uart.h
  • UART_IFLS_RX1_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_RX2_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_RX4_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_RX6_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_RX7_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_RX_M : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_RX_MASK : lm3s_uart.h
  • UART_IFLS_TX1_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_TX2_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_TX4_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_TX6_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_TX7_8 : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_TX_M : lm3s_com.h , lm3s_uart.h
  • UART_IFLS_TX_MASK : lm3s_uart.h
  • UART_ILPR_ILPDVSR_M : lm3s_com.h , lm3s_uart.h
  • UART_ILPR_ILPDVSR_S : lm3s_com.h , lm3s_uart.h
  • UART_IM_BEIM : lm3s_com.h , lm3s_uart.h
  • UART_IM_CTSMIM : lm3s_uart.h
  • UART_IM_DCDMIM : lm3s_uart.h
  • UART_IM_DSRMIM : lm3s_uart.h
  • UART_IM_FEIM : lm3s_com.h , lm3s_uart.h
  • UART_IM_LME1IM : lm3s_uart.h
  • UART_IM_LME5IM : lm3s_uart.h
  • UART_IM_LMSBIM : lm3s_uart.h
  • UART_IM_OEIM : lm3s_com.h , lm3s_uart.h
  • UART_IM_PEIM : lm3s_com.h , lm3s_uart.h
  • UART_IM_RIMIM : lm3s_uart.h
  • UART_IM_RTIM : lm3s_com.h , lm3s_uart.h
  • UART_IM_RXIM : lm3s_com.h , lm3s_uart.h
  • UART_IM_TXIM : lm3s_com.h , lm3s_uart.h
  • UART_IMR_ENDRX : sam3_uart.h
  • UART_IMR_ENDTX : sam3_uart.h
  • UART_IMR_FRAME : sam3_uart.h
  • UART_IMR_OFF : sam3_uart.h
  • UART_IMR_OVRE : sam3_uart.h
  • UART_IMR_PARE : sam3_uart.h
  • UART_IMR_RXBUFF : sam3_uart.h
  • UART_IMR_RXRDY : sam3_uart.h
  • UART_IMR_TXBUFE : sam3_uart.h
  • UART_IMR_TXEMPTY : sam3_uart.h
  • UART_IMR_TXRDY : sam3_uart.h
  • UART_LCR_H_BRK : lm3s_uart.h
  • UART_LCR_H_EPS : lm3s_uart.h
  • UART_LCR_H_FEN : lm3s_uart.h
  • UART_LCR_H_PEN : lm3s_uart.h
  • UART_LCR_H_SPS : lm3s_uart.h
  • UART_LCR_H_STP2 : lm3s_uart.h
  • UART_LCR_H_WLEN : lm3s_uart.h
  • UART_LCR_H_WLEN_5 : lm3s_uart.h
  • UART_LCR_H_WLEN_6 : lm3s_uart.h
  • UART_LCR_H_WLEN_7 : lm3s_uart.h
  • UART_LCR_H_WLEN_8 : lm3s_uart.h
  • UART_LCRH_BRK : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_EPS : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_FEN : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_PEN : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_SPS : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_STP2 : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_WLEN_5 : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_WLEN_6 : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_WLEN_7 : lm3s_com.h , lm3s_uart.h
  • UART_LCRH_WLEN_8 : lm3s_uart.h , lm3s_com.h
  • UART_LCRH_WLEN_M : lm3s_com.h , lm3s_uart.h
  • UART_LCTL_BLEN_13T : lm3s_uart.h
  • UART_LCTL_BLEN_14T : lm3s_uart.h
  • UART_LCTL_BLEN_15T : lm3s_uart.h
  • UART_LCTL_BLEN_16T : lm3s_uart.h
  • UART_LCTL_BLEN_M : lm3s_uart.h
  • UART_LCTL_MASTER : lm3s_uart.h
  • UART_LSS_TSS_M : lm3s_uart.h
  • UART_LSS_TSS_S : lm3s_uart.h
  • UART_LTIM_TIMER_M : lm3s_uart.h
  • UART_LTIM_TIMER_S : lm3s_uart.h
  • UART_MIS_BEMIS : lm3s_com.h , lm3s_uart.h
  • UART_MIS_CTSMIS : lm3s_uart.h
  • UART_MIS_DCDMIS : lm3s_uart.h
  • UART_MIS_DSRMIS : lm3s_uart.h
  • UART_MIS_FEMIS : lm3s_com.h , lm3s_uart.h
  • UART_MIS_LME1MIS : lm3s_uart.h
  • UART_MIS_LME5MIS : lm3s_uart.h
  • UART_MIS_LMSBMIS : lm3s_uart.h
  • UART_MIS_OEMIS : lm3s_com.h , lm3s_uart.h
  • UART_MIS_PEMIS : lm3s_com.h , lm3s_uart.h
  • UART_MIS_RIMIS : lm3s_uart.h
  • UART_MIS_RTMIS : lm3s_com.h , lm3s_uart.h
  • UART_MIS_RXMIS : lm3s_com.h , lm3s_uart.h
  • UART_MIS_TXMIS : lm3s_com.h , lm3s_uart.h
  • UART_MR_CHMODE_AUTOMATIC : sam3_uart.h
  • UART_MR_CHMODE_LOCAL_LOOPBACK : sam3_uart.h
  • UART_MR_CHMODE_MASK : sam3_uart.h
  • UART_MR_CHMODE_NORMAL : sam3_uart.h
  • UART_MR_CHMODE_REMOTE_LOOPBACK : sam3_uart.h
  • UART_MR_CHMODE_SHIFT : sam3_uart.h
  • UART_MR_OFF : sam3_uart.h
  • UART_MR_PAR_EVEN : sam3_uart.h
  • UART_MR_PAR_MARK : sam3_uart.h
  • UART_MR_PAR_MASK : sam3_uart.h
  • UART_MR_PAR_NO : sam3_uart.h
  • UART_MR_PAR_ODD : sam3_uart.h
  • UART_MR_PAR_SHIFT : sam3_uart.h
  • UART_MR_PAR_SPACE : sam3_uart.h
  • UART_O_CTL : lm3s_uart.h
  • UART_O_DMACTL : lm3s_uart.h
  • UART_O_DR : lm3s_uart.h
  • UART_O_ECR : lm3s_uart.h
  • UART_O_FBRD : lm3s_uart.h
  • UART_O_FR : lm3s_uart.h
  • UART_O_IBRD : lm3s_uart.h
  • UART_O_ICR : lm3s_uart.h
  • UART_O_IFLS : lm3s_uart.h
  • UART_O_ILPR : lm3s_uart.h
  • UART_O_IM : lm3s_uart.h
  • UART_O_LCR_H : lm3s_uart.h
  • UART_O_LCRH : lm3s_uart.h
  • UART_O_LCTL : lm3s_uart.h
  • UART_O_LSS : lm3s_uart.h
  • UART_O_LTIM : lm3s_uart.h
  • UART_O_MIS : lm3s_uart.h
  • UART_O_PCellID0 : lm3s_uart.h
  • UART_O_PCellID1 : lm3s_uart.h
  • UART_O_PCellID2 : lm3s_uart.h
  • UART_O_PCellID3 : lm3s_uart.h
  • UART_O_PeriphID0 : lm3s_uart.h
  • UART_O_PeriphID1 : lm3s_uart.h
  • UART_O_PeriphID2 : lm3s_uart.h
  • UART_O_PeriphID3 : lm3s_uart.h
  • UART_O_PeriphID4 : lm3s_uart.h
  • UART_O_PeriphID5 : lm3s_uart.h
  • UART_O_PeriphID6 : lm3s_uart.h
  • UART_O_PeriphID7 : lm3s_uart.h
  • UART_O_RIS : lm3s_uart.h
  • UART_O_RSR : lm3s_uart.h
  • UART_PTCR_OFF : sam3_uart.h
  • UART_PTCR_RXTDIS : sam3_uart.h
  • UART_PTCR_RXTEN : sam3_uart.h
  • UART_PTCR_TXTDIS : sam3_uart.h
  • UART_PTCR_TXTEN : sam3_uart.h
  • UART_PTSR_OFF : sam3_uart.h
  • UART_PTSR_RXTEN : sam3_uart.h
  • UART_PTSR_TXTEN : sam3_uart.h
  • UART_RCR_OFF : sam3_uart.h
  • UART_RCR_RXCTR_MASK : sam3_uart.h
  • UART_RCR_RXCTR_SHIFT : sam3_uart.h
  • UART_RHR_OFF : sam3_uart.h
  • UART_RHR_RXCHR_MASK : sam3_uart.h
  • UART_RHR_RXCHR_SHIFT : sam3_uart.h
  • UART_RIS_BERIS : lm3s_com.h , lm3s_uart.h
  • UART_RIS_CTSRIS : lm3s_uart.h
  • UART_RIS_DCDRIS : lm3s_uart.h
  • UART_RIS_DSRRIS : lm3s_uart.h
  • UART_RIS_FERIS : lm3s_com.h , lm3s_uart.h
  • UART_RIS_LME1RIS : lm3s_uart.h
  • UART_RIS_LME5RIS : lm3s_uart.h
  • UART_RIS_LMSBRIS : lm3s_uart.h
  • UART_RIS_OERIS : lm3s_com.h , lm3s_uart.h
  • UART_RIS_PERIS : lm3s_com.h , lm3s_uart.h
  • UART_RIS_RIRIS : lm3s_uart.h
  • UART_RIS_RTRIS : lm3s_com.h , lm3s_uart.h
  • UART_RIS_RXRIS : lm3s_com.h , lm3s_uart.h
  • UART_RIS_TXRIS : lm3s_com.h , lm3s_uart.h
  • UART_RNCR_OFF : sam3_uart.h
  • UART_RNCR_RXNCTR_MASK : sam3_uart.h
  • UART_RNCR_RXNCTR_SHIFT : sam3_uart.h
  • UART_RNPR_OFF : sam3_uart.h
  • UART_RNPR_RXNPTR_MASK : sam3_uart.h
  • UART_RNPR_RXNPTR_SHIFT : sam3_uart.h
  • UART_RPR_OFF : sam3_uart.h
  • UART_RPR_RXPTR_MASK : sam3_uart.h
  • UART_RPR_RXPTR_SHIFT : sam3_uart.h
  • UART_RSR_ANY : lm3s_uart.h
  • UART_RSR_BE : lm3s_com.h , lm3s_uart.h
  • UART_RSR_FE : lm3s_uart.h , lm3s_com.h
  • UART_RSR_OE : lm3s_com.h , lm3s_uart.h
  • UART_RSR_PE : lm3s_com.h , lm3s_uart.h
  • UART_RV_CTL : lm3s_uart.h
  • UART_RV_DR : lm3s_uart.h
  • UART_RV_ECR : lm3s_uart.h
  • UART_RV_FBRD : lm3s_uart.h
  • UART_RV_FR : lm3s_uart.h
  • UART_RV_IBRD : lm3s_uart.h
  • UART_RV_ICR : lm3s_uart.h
  • UART_RV_IFLS : lm3s_uart.h
  • UART_RV_IM : lm3s_uart.h
  • UART_RV_LCR_H : lm3s_uart.h
  • UART_RV_MIS : lm3s_uart.h
  • UART_RV_PCellID0 : lm3s_uart.h
  • UART_RV_PCellID1 : lm3s_uart.h
  • UART_RV_PCellID2 : lm3s_uart.h
  • UART_RV_PCellID3 : lm3s_uart.h
  • UART_RV_PeriphID0 : lm3s_uart.h
  • UART_RV_PeriphID1 : lm3s_uart.h
  • UART_RV_PeriphID2 : lm3s_uart.h
  • UART_RV_PeriphID3 : lm3s_uart.h
  • UART_RV_PeriphID4 : lm3s_uart.h
  • UART_RV_PeriphID5 : lm3s_uart.h
  • UART_RV_PeriphID6 : lm3s_uart.h
  • UART_RV_PeriphID7 : lm3s_uart.h
  • UART_RV_RIS : lm3s_uart.h
  • UART_RV_RSR : lm3s_uart.h
  • UART_SR_ENDRX : sam3_uart.h
  • UART_SR_ENDTX : sam3_uart.h
  • UART_SR_FRAME : sam3_uart.h
  • UART_SR_OFF : sam3_uart.h
  • UART_SR_OVRE : sam3_uart.h
  • UART_SR_PARE : sam3_uart.h
  • UART_SR_RXBUFF : sam3_uart.h
  • UART_SR_RXRDY : sam3_uart.h
  • UART_SR_TXBUFE : sam3_uart.h
  • UART_SR_TXEMPTY : sam3_uart.h
  • UART_SR_TXRDY : sam3_uart.h
  • UART_TCR_OFF : sam3_uart.h
  • UART_TCR_TXCTR_MASK : sam3_uart.h
  • UART_TCR_TXCTR_SHIFT : sam3_uart.h
  • UART_THR_OFF : sam3_uart.h
  • UART_THR_TXCHR_MASK : sam3_uart.h
  • UART_THR_TXCHR_SHIFT : sam3_uart.h
  • UART_TNCR_OFF : sam3_uart.h
  • UART_TNCR_TXNCTR_MASK : sam3_uart.h
  • UART_TNCR_TXNCTR_SHIFT : sam3_uart.h
  • UART_TNPR_OFF : sam3_uart.h
  • UART_TNPR_TXNPTR_MASK : sam3_uart.h
  • UART_TNPR_TXNPTR_SHIFT : sam3_uart.h
  • UART_TPR_OFF : sam3_uart.h
  • UART_TPR_TXPTR_MASK : sam3_uart.h
  • UART_TPR_TXPTR_SHIFT : sam3_uart.h
  • UDMA_BASE : lm3s_memmap.h
  • UDP_DEBUG : cfg_lwip.h
  • UDP_TTL : cfg_lwip.h
  • UINT16_LOG2 : macros.h
  • UINT32_LOG2 : macros.h
  • UINT8_LOG2 : macros.h
  • UPDCRC16 : crc.h
  • US0_BRGR : sam3_usart.h , at91_us.h
  • US0_CR : at91_us.h , sam3_usart.h
  • US0_CSR : at91_us.h , sam3_usart.h
  • US0_FIDI : at91_us.h , sam3_usart.h
  • US0_IDR : sam3_usart.h , at91_us.h
  • US0_IER : at91_us.h , sam3_usart.h
  • US0_IF : sam3_usart.h , at91_us.h
  • US0_IMR : at91_us.h , sam3_usart.h
  • US0_MR : sam3_usart.h , at91_us.h
  • US0_NER : at91_us.h , sam3_usart.h
  • US0_RHR : at91_us.h , sam3_usart.h
  • US0_RTOR : at91_us.h , sam3_usart.h
  • US0_THR : sam3_usart.h , at91_us.h
  • US0_TTGR : at91_us.h , sam3_usart.h
  • US1_BRGR : at91_us.h , sam3_usart.h
  • US1_CR : at91_us.h , sam3_usart.h
  • US1_CSR : at91_us.h , sam3_usart.h
  • US1_FIDI : at91_us.h , sam3_usart.h
  • US1_IDR : at91_us.h , sam3_usart.h
  • US1_IER : at91_us.h , sam3_usart.h
  • US1_IF : at91_us.h , sam3_usart.h
  • US1_IMR : sam3_usart.h , at91_us.h
  • US1_MR : sam3_usart.h , at91_us.h
  • US1_NER : sam3_usart.h , at91_us.h
  • US1_RHR : at91_us.h , sam3_usart.h
  • US1_RTOR : at91_us.h , sam3_usart.h
  • US1_THR : sam3_usart.h , at91_us.h
  • US1_TTGR : sam3_usart.h , at91_us.h
  • US_BRGR_OFF : at91_us.h , sam3_usart.h
  • US_CHMODE_AUTOMATIC_ECHO : sam3_usart.h , at91_us.h
  • US_CHMODE_LOCAL_LOOPBACK : sam3_usart.h , at91_us.h
  • US_CHMODE_MASK : sam3_usart.h , at91_us.h
  • US_CHMODE_NORMAL : at91_us.h , sam3_usart.h
  • US_CHMODE_REMOTE_LOOPBACK : at91_us.h , sam3_usart.h
  • US_CHRL_5 : at91_us.h , sam3_usart.h
  • US_CHRL_6 : sam3_usart.h , at91_us.h
  • US_CHRL_7 : sam3_usart.h , at91_us.h
  • US_CHRL_8 : at91_us.h , sam3_usart.h
  • US_CHRL_MASK : sam3_usart.h , at91_us.h
  • US_CLKO : at91_us.h , sam3_usart.h
  • US_CLKS_MASK : at91_us.h , sam3_usart.h
  • US_CLKS_MCK : at91_us.h , sam3_usart.h
  • US_CLKS_MCK8 : at91_us.h , sam3_usart.h
  • US_CLKS_SCK : at91_us.h , sam3_usart.h
  • US_CLKS_SLCK : at91_us.h , sam3_usart.h
  • US_CR_OFF : at91_us.h , sam3_usart.h
  • US_CSR_CTS : at91_us.h , sam3_usart.h
  • US_CSR_DCD : at91_us.h , sam3_usart.h
  • US_CSR_DSR : at91_us.h , sam3_usart.h
  • US_CSR_OFF : at91_us.h , sam3_usart.h
  • US_CSR_RI : at91_us.h , sam3_usart.h
  • US_CTSIC : at91_us.h , sam3_usart.h
  • US_DCDIC : sam3_usart.h , at91_us.h
  • US_DSNACK : at91_us.h , sam3_usart.h
  • US_DSRIC : at91_us.h , sam3_usart.h
  • US_DTRDIS : at91_us.h , sam3_usart.h
  • US_DTREN : at91_us.h , sam3_usart.h
  • US_ENDRX : at91_us.h , sam3_usart.h
  • US_ENDTX : sam3_usart.h , at91_us.h
  • US_FIDI_OFF : at91_us.h , sam3_usart.h
  • US_FILTER : at91_us.h , sam3_usart.h
  • US_FRAME : at91_us.h , sam3_usart.h
  • US_IDR_OFF : at91_us.h , sam3_usart.h
  • US_IER_OFF : at91_us.h , sam3_usart.h
  • US_IF_OFF : at91_us.h , sam3_usart.h
  • US_IMR_OFF : at91_us.h , sam3_usart.h
  • US_INACK : sam3_usart.h , at91_us.h
  • US_ITERATION : at91_us.h , sam3_usart.h
  • US_MAX_INTERATION_MASK : at91_us.h , sam3_usart.h
  • US_MODE9 : at91_us.h , sam3_usart.h
  • US_MR_OFF : at91_us.h , sam3_usart.h
  • US_MSBF : at91_us.h , sam3_usart.h
  • US_NACK : sam3_usart.h , at91_us.h
  • US_NBSTOP_1 : at91_us.h , sam3_usart.h
  • US_NBSTOP_1_5 : sam3_usart.h , at91_us.h
  • US_NBSTOP_2 : at91_us.h , sam3_usart.h
  • US_NBSTOP_MASK : at91_us.h , sam3_usart.h
  • US_NER_OFF : at91_us.h , sam3_usart.h
  • US_OVER : at91_us.h , sam3_usart.h
  • US_OVRE : sam3_usart.h , at91_us.h
  • US_PAR_EVEN : at91_us.h , sam3_usart.h
  • US_PAR_MARK : at91_us.h , sam3_usart.h
  • US_PAR_MASK : at91_us.h , sam3_usart.h
  • US_PAR_MULTIDROP : sam3_usart.h , at91_us.h
  • US_PAR_NO : sam3_usart.h , at91_us.h
  • US_PAR_ODD : at91_us.h , sam3_usart.h
  • US_PAR_SPACE : sam3_usart.h , at91_us.h
  • US_PARE : at91_us.h , sam3_usart.h
  • US_RETTO : sam3_usart.h , at91_us.h
  • US_RHR_OFF : sam3_usart.h , at91_us.h
  • US_RHR_RXCHR_MASK : sam3_usart.h , at91_us.h
  • US_RHR_RXSYNH : sam3_usart.h , at91_us.h
  • US_RIIC : sam3_usart.h , at91_us.h
  • US_RSTIT : at91_us.h , sam3_usart.h
  • US_RSTNAK : at91_us.h , sam3_usart.h
  • US_RSTRX : sam3_usart.h , at91_us.h
  • US_RSTSTA : sam3_usart.h , at91_us.h
  • US_RSTTX : sam3_usart.h , at91_us.h
  • US_RTOR_OFF : at91_us.h , sam3_usart.h
  • US_RTSDIS : sam3_usart.h , at91_us.h
  • US_RTSEN : at91_us.h , sam3_usart.h
  • US_RXBRK : sam3_usart.h , at91_us.h
  • US_RXBUFF : sam3_usart.h , at91_us.h
  • US_RXDIS : sam3_usart.h , at91_us.h
  • US_RXEN : at91_us.h , sam3_usart.h
  • US_RXRDY : at91_us.h , sam3_usart.h
  • US_SENDA : at91_us.h , sam3_usart.h
  • US_STPBRK : at91_us.h , sam3_usart.h
  • US_STTBRK : sam3_usart.h , at91_us.h
  • US_STTTO : at91_us.h , sam3_usart.h
  • US_SYNC : sam3_usart.h , at91_us.h
  • US_THR_OFF : at91_us.h , sam3_usart.h
  • US_THR_TXCHR_MASK : at91_us.h , sam3_usart.h
  • US_THR_TXSYNH : at91_us.h , sam3_usart.h
  • US_TIMEOUT : at91_us.h , sam3_usart.h
  • US_TTGR_OFF : sam3_usart.h , at91_us.h
  • US_TXBUFE : at91_us.h , sam3_usart.h
  • US_TXDIS : at91_us.h , sam3_usart.h
  • US_TXEMPTY : sam3_usart.h , at91_us.h
  • US_TXEN : at91_us.h , sam3_usart.h
  • US_TXRDY : sam3_usart.h , at91_us.h
  • US_USART_MODE_HW_HDSH : at91_us.h , sam3_usart.h
  • US_USART_MODE_IRDA : sam3_usart.h , at91_us.h
  • US_USART_MODE_ISO7816T0 : sam3_usart.h , at91_us.h
  • US_USART_MODE_ISO7816T1 : sam3_usart.h , at91_us.h
  • US_USART_MODE_MASK : sam3_usart.h , at91_us.h
  • US_USART_MODE_MODEM : at91_us.h , sam3_usart.h
  • US_USART_MODE_NORMA : at91_us.h , sam3_usart.h
  • US_USART_MODE_RS485 : sam3_usart.h , at91_us.h
  • USART1_IRQHANDLER : stm32_ints.h
  • USART2_IRQHANDLER : stm32_ints.h
  • USART3_IRQHANDLER : stm32_ints.h
  • USB0_BASE : lm3s_memmap.h
  • USB_HP_CAN_TX_IRQHANDLER : stm32_ints.h
  • USB_KEYBOARD_LOG_FORMAT : cfg_usbkbd.h
  • USB_KEYBOARD_LOG_LEVEL : cfg_usbkbd.h
  • USB_KEYBOARD_PRODUCT_ID : cfg_usbkbd.h
  • USB_KEYBOARD_VENDOR_ID : cfg_usbkbd.h
  • USB_LOG_FORMAT : cfg_usb.h
  • USB_LOG_LEVEL : cfg_usb.h
  • USB_LP_CAN_RX0_IRQHANDLER : stm32_ints.h
  • USB_MOUSE_LOG_FORMAT : cfg_usbmouse.h
  • USB_MOUSE_LOG_LEVEL : cfg_usbmouse.h
  • USB_MOUSE_PRODUCT_ID : cfg_usbmouse.h
  • USB_MOUSE_VENDOR_ID : cfg_usbmouse.h
  • USB_SERIAL_LOG_FORMAT : cfg_usbser.h
  • USB_SERIAL_LOG_LEVEL : cfg_usbser.h
  • USB_SERIAL_PRODUCT_ID : cfg_usbser.h
  • USB_SERIAL_VENDOR_ID : cfg_usbser.h
  • USB_STRING : usb.h
  • USBPRE_BITNUMBER : clock_stm32.h
  • USBWAKEUP_IRQHANDLER : stm32_ints.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- w -

  • WATCHDOG0_BASE : lm3s_memmap.h
  • WATCHDOG0_CTL_R : lm3s_com.h
  • WATCHDOG0_ICR_R : lm3s_com.h
  • WATCHDOG0_LOAD_R : lm3s_com.h
  • WATCHDOG0_LOCK_R : lm3s_com.h
  • WATCHDOG0_MIS_R : lm3s_com.h
  • WATCHDOG0_RIS_R : lm3s_com.h
  • WATCHDOG0_TEST_R : lm3s_com.h
  • WATCHDOG0_VALUE_R : lm3s_com.h
  • WATCHDOG1_BASE : lm3s_memmap.h
  • WATCHDOG_BASE : lm3s_memmap.h
  • WATCHDOG_CTL_R : lm3s_com.h
  • WATCHDOG_ICR_R : lm3s_com.h
  • WATCHDOG_LOAD_R : lm3s_com.h
  • WATCHDOG_LOCK_R : lm3s_com.h
  • WATCHDOG_MIS_R : lm3s_com.h
  • WATCHDOG_RIS_R : lm3s_com.h
  • WATCHDOG_TEST_R : lm3s_com.h
  • WATCHDOG_VALUE_R : lm3s_com.h
  • WDT_CR : at91_wdt.h , sam3_wdt.h
  • WDT_CR_OFF : at91_wdt.h , sam3_wdt.h
  • WDT_CTL_INTEN : lm3s_com.h
  • WDT_CTL_RESEN : lm3s_com.h
  • WDT_ICR_M : lm3s_com.h
  • WDT_ICR_S : lm3s_com.h
  • WDT_KEY : at91_wdt.h , sam3_wdt.h
  • WDT_LOAD_M : lm3s_com.h
  • WDT_LOAD_S : lm3s_com.h
  • WDT_LOCK_LOCKED : lm3s_com.h
  • WDT_LOCK_M : lm3s_com.h
  • WDT_LOCK_UNLOCK : lm3s_com.h
  • WDT_LOCK_UNLOCKED : lm3s_com.h
  • WDT_MIS_WDTMIS : lm3s_com.h
  • WDT_MR : at91_wdt.h , sam3_wdt.h
  • WDT_MR_OFF : at91_wdt.h , sam3_wdt.h
  • WDT_RIS_WDTRIS : lm3s_com.h
  • WDT_SR : sam3_wdt.h , at91_wdt.h
  • WDT_SR_OFF : at91_wdt.h , sam3_wdt.h
  • WDT_TEST_STALL : lm3s_com.h
  • WDT_VALUE_M : lm3s_com.h
  • WDT_VALUE_S : lm3s_com.h
  • WDT_WDD_MASK : at91_wdt.h , sam3_wdt.h
  • WDT_WDD_SHIFT : at91_wdt.h , sam3_wdt.h
  • WDT_WDDBGHLT : sam3_wdt.h , at91_wdt.h
  • WDT_WDDIS : at91_wdt.h , sam3_wdt.h
  • WDT_WDERR : sam3_wdt.h , at91_wdt.h
  • WDT_WDFIEN : at91_wdt.h , sam3_wdt.h
  • WDT_WDIDLEHLT : sam3_wdt.h , at91_wdt.h
  • WDT_WDRPROC : sam3_wdt.h , at91_wdt.h
  • WDT_WDRSTEN : sam3_wdt.h , at91_wdt.h
  • WDT_WDRSTT : at91_wdt.h , sam3_wdt.h
  • WDT_WDUNF : at91_wdt.h , sam3_wdt.h
  • WDT_WDV_MASK : at91_wdt.h , sam3_wdt.h
  • WDT_WDV_SHIFT : at91_wdt.h , sam3_wdt.h
  • WWDG_IRQHANDLER : stm32_ints.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • q
  • r
  • s
  • t
  • u
  • w
  • x

- x -

  • X : md2.c
  • XM_ACK : xmodem.c
  • XM_BUFSIZE : xmodem.c
  • XM_C : xmodem.c
  • XM_CAN : xmodem.c
  • XM_EOT : xmodem.c
  • XM_NAK : xmodem.c
  • XM_SOH : xmodem.c
  • XM_STX : xmodem.c
  • XMODEM_CHECK_ABORT : xmodem.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • DataFlashOpcode : dataflash.h
  • DataflashType : dataflash.h
  • dtag_t : dtag.h
  • EepromType : eeprom.h
  • Flash25Opcode : flash25.h
  • Flash25Sector : flash25.h
  • KSeekMode : io/kfile.h
  • LabelId : menubar.h
  • MotorDirection : stepper.h
  • PwmPolarity : pwm.h
  • ResultCode : parser.h
  • RL_KEYS : readline.c
  • SipoBitOrder : sipo.h
  • SipoClkPol : sipo.h
  • SipoLoadPol : sipo.h
  • SipoMap : hw_sipo.h
  • StepperState : stepper.h
  • sysirq_t : sysirq_at91.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • d
  • f
  • i
  • k
  • m
  • p
  • r
  • s

- d -

  • DFO_ARW_MEM_TR_BUFF1 : dataflash.h
  • DFO_ARW_MEM_TR_BUFF2 : dataflash.h
  • DFO_CMP_MEM_TO_BUFF1 : dataflash.h
  • DFO_CMP_MEM_TO_BUFF2 : dataflash.h
  • DFO_ERASE_BLOCK : dataflash.h
  • DFO_ERASE_PAGE : dataflash.h
  • DFO_ERASE_SECTOR : dataflash.h
  • DFO_ID_DEV : dataflash.h
  • DFO_MOV_MEM_TO_BUFF1 : dataflash.h
  • DFO_MOV_MEM_TO_BUFF2 : dataflash.h
  • DFO_PWR_DOWN : dataflash.h
  • DFO_READ_BUFF1 : dataflash.h
  • DFO_READ_BUFF2 : dataflash.h
  • DFO_READ_FLASH_MEM : dataflash.h
  • DFO_READ_FLASH_MEM_BYTE_B : dataflash.h
  • DFO_READ_FLASH_MEM_BYTE_D : dataflash.h
  • DFO_READ_STATUS : dataflash.h
  • DFO_RESUME_PWR_DOWN : dataflash.h
  • DFO_WRITE_BUFF1 : dataflash.h
  • DFO_WRITE_BUFF1_TO_MEM : dataflash.h
  • DFO_WRITE_BUFF1_TO_MEM_E : dataflash.h
  • DFO_WRITE_BUFF2 : dataflash.h
  • DFO_WRITE_BUFF2_TO_MEM : dataflash.h
  • DFO_WRITE_BUFF2_TO_MEM_E : dataflash.h
  • DFO_WRITE_MEM_TR_BUFF1 : dataflash.h
  • DFO_WRITE_MEM_TR_BUFF2 : dataflash.h
  • DIR_NEGATIVE : stepper.h
  • DIR_NONE : stepper.h
  • DIR_POSITIVE : stepper.h

- f -

  • FLASH25_CHIP_ERASE : flash25.h
  • FLASH25_PROGRAM : flash25.h
  • FLASH25_RDID : flash25.h
  • FLASH25_RDSR : flash25.h
  • FLASH25_READ : flash25.h
  • FLASH25_SECT1 : flash25.h
  • FLASH25_SECT2 : flash25.h
  • FLASH25_SECT3 : flash25.h
  • FLASH25_SECT4 : flash25.h
  • FLASH25_SECTORE_ERASE : flash25.h
  • FLASH25_WRDI : flash25.h
  • FLASH25_WREN : flash25.h
  • FLASH25_WRSR : flash25.h

- i -

  • I2C_BITBANG0 : i2c.h
  • I2C_BITBANG1 : i2c.h
  • I2C_BITBANG_CNT : i2c.h
  • I2C_CNT : i2c_lpc2.h , i2c_at91.h , i2c_avr.h , i2c_stm32.h

- k -

  • KSM_SEEK_CUR : io/kfile.h
  • KSM_SEEK_END : io/kfile.h
  • KSM_SEEK_SET : io/kfile.h

- m -

  • MSTS_ENTERING : stepper.h
  • MSTS_ERROR : stepper.h
  • MSTS_IDLE : stepper.h
  • MSTS_INIT : stepper.h
  • MSTS_LEAVING : stepper.h
  • MSTS_OUTHOME : stepper.h
  • MSTS_PREIDLE : stepper.h
  • MSTS_PREINIT : stepper.h
  • MSTS_PRERUN : stepper.h
  • MSTS_RUN : stepper.h
  • MSTS_UNINIT : stepper.h

- p -

  • PWM_POL_HIGH_PULSE : pwm.h
  • PWM_POL_LOW_PULSE : pwm.h
  • PWM_POL_NEGATIVE : pwm.h
  • PWM_POL_POSITIVE : pwm.h

- r -

  • RC_ERROR : parser.h
  • RC_OK : parser.h
  • RC_REPLY : parser.h
  • RC_SKIP : parser.h

- s -

  • SER_CNT : ser_at91.h , ser_mega.h , ser_dsp56k.h , ser_sam3.h , ser_xmega.h
  • SYSIRQ_PIT : sysirq_at91.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- _ -

  • __init1() : init_at91.c
  • __init2() : init_at91.c
  • __kputchar() : kdebug.c
  • __sn_put_char() : sprintf.c
  • _formatted_write() : formatwr.c
  • _thermo_hw_init() : hw_thermo.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- k -

  • kbd_debHandlerFunc() : kbd.c
  • kbd_defHandlerFunc() : kbd.c
  • kbd_get() : kbd.h , kbd.c
  • kbd_get_timeout() : kbd.c , kbd.h
  • kbd_init() : kbd.h , kbd.c
  • kbd_peek() : kbd.c , kbd.h
  • kbd_poll() : kbd.c
  • kbd_readkeys() : hw_kbd.h
  • kbd_rptHandlerFunc() : kbd.c
  • kbd_setRepeatMask() : kbd.c , kbd.h
  • kbd_softint() : kbd.c
  • kblock_buffered() : kblock.h
  • kblock_cachedBlock() : kblock.h
  • kblock_cacheDirty() : kblock.h
  • kblock_clearerr() : kblock.h
  • kblock_close() : kblock.h
  • kblock_copy() : kblock.c , kblock.h
  • kblock_error() : kblock.h
  • kblock_flush() : kblock.c , kblock.h
  • kblock_partialWrite() : kblock.h
  • kblock_read() : kblock.c , kblock.h
  • kblock_trim() : kblock.c , kblock.h
  • kblock_write() : kblock.c , kblock.h
  • kdf_begin() : kdf.h
  • kdf_read() : kdf.h
  • kdump() : debug.h , kdebug.c
  • key_internal_get_ptr() : hashtable.c
  • keytag_init() : keytag.c , keytag.h
  • keytag_poll() : keytag.c , keytag.h
  • keytag_recv() : keytag.c , keytag.h
  • kfile_clearerr() : io/kfile.h
  • kfile_close() : io/kfile.h
  • kfile_copy() : kfile.c , io/kfile.h
  • kfile_error() : io/kfile.h
  • kfile_flush() : io/kfile.h
  • kfile_generic() : kfile.c
  • kfile_genericClose() : kfile.c , io/kfile.h
  • kfile_genericReopen() : io/kfile.h , kfile.c
  • kfile_genericSeek() : kfile.c , io/kfile.h
  • kfile_getc() : io/kfile.h , kfile.c
  • kfile_gets() : kfile.c , io/kfile.h
  • kfile_gets_echo() : io/kfile.h , kfile.c
  • kfile_init() : kfile.c , io/kfile.h
  • kfile_print() : kfile.c , io/kfile.h
  • kfile_printf() : kfile.c , io/kfile.h
  • kfile_putc() : kfile.c , io/kfile.h
  • kfile_read() : io/kfile.h
  • kfile_reopen() : io/kfile.h
  • kfile_resync() : kfile.c , io/kfile.h
  • kfile_seek() : io/kfile.h
  • kfile_write() : io/kfile.h
  • KFILEBLOCK_CAST() : kfile_block.c
  • kfileblock_init() : kfile_block.h , kfile_block.c
  • KFILEDEBUG_CAST() : kfile_debug.h
  • kfiledebug_init() : kfile_debug.h , kfile_debug.c
  • KFILEFIFO_CAST() : kfile_fifo.h
  • kfilefifo_init() : kfile_fifo.c , kfile_fifo.h
  • KFILEMEM_CAST() : kfile_mem.h
  • kfilemem_init() : kfile_mem.h , kfile_mem.c
  • kputnum() : debug.h , kdebug.c


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- l -

  • lbar_changeLevel() : levelbar.c , levelbar.h
  • lbar_draw() : levelbar.h , levelbar.c
  • lbar_getLevel() : levelbar.c , levelbar.h
  • lbar_init() : levelbar.h , levelbar.c
  • lbar_setLevel() : levelbar.c , levelbar.h
  • lbar_setMax() : levelbar.c , levelbar.h
  • lcd_32122_blitBitmap() : lcd_32122a.c , lcd_32122a.h
  • lcd_32122_init() : lcd_32122a.h , lcd_32122a.c
  • lcd_32122_read() : lcd_32122a.c
  • lcd_32122_setPwm() : lcd_32122a.c , lcd_32122a.h
  • lcd_32122_write() : lcd_32122a.c
  • lcd_address() : lcd_hd44.c
  • lcd_dataWrite() : lcd_rit128x96.c
  • lcd_enqueueLayer() : lcd_text.c
  • lcd_hx8347_init() : lcd_hx8347.c , lcd_hx8347.h
  • lcd_hx8347_off() : lcd_hx8347.c , lcd_hx8347.h
  • lcd_hx8347_on() : lcd_hx8347.c , lcd_hx8347.h
  • lcd_ili9225_hw_bus_init() : hw_ili9225.h
  • lcd_ili9225_init() : lcd_ili9225.h , lcd_ili9225.c
  • lcd_ili9225_off() : lcd_ili9225.c , lcd_ili9225.h
  • lcd_ili9225_on() : lcd_ili9225.c , lcd_ili9225.h
  • lcd_moveTo() : lcd_hd44.c , lcd_hd44.h
  • lcd_putc() : lcd_hd44.h , lcd_hd44.c
  • lcd_putCharUnlocked() : lcd_text.c
  • lcd_refresh() : lcd_text.c
  • lcd_remapChar() : lcd_hd44.h , lcd_hd44.c
  • lcd_reset() : lcd_ili9225.c
  • lcd_setLayerDepth() : lcd_text.h , lcd_text.c
  • lcd_setReg() : lcd_hd44.c , lcd_hd44.h
  • lcd_waitBusy() : lcd_hd44.h , lcd_hd44.c
  • level_edit() : leveledit.c , leveledit.h
  • level_init() : leveledit.c , leveledit.h
  • list_remHead() : list.h
  • list_remTail() : list.h
  • lm3s_gpioPinConfig() : gpio_lm3s.c , gpio_lm3s.h
  • lm3s_ssiInit() : ssi_lm3s.h , ssi_lm3s.c


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- m -

  • mcp41_init() : mcp41.c , mcp41.h
  • mcp41_setResistance() : mcp41.h , mcp41.c
  • md2_end() : md2.c , md2.h
  • md2_init() : md2.h , md2.c
  • md2_pad() : md2.c
  • md2_test() : md2.c , md2.h
  • md2_update() : md2.c , md2.h
  • menu_clearFlags() : menu.c , menu.h
  • menu_count() : menu.c
  • menu_doselect() : menu.c
  • menu_handle() : menu.c , menu.h
  • menu_layout() : menu.c
  • menu_next_visible_item() : menu.c
  • menu_prev_visible_item() : menu.c
  • menu_setFlags() : menu.c , menu.h
  • monitor_checkStack() : monitor.h
  • monitor_report() : monitor.h
  • monitor_start() : monitor.h
  • movePages() : battfs.c
  • mpxx6115a_press() : mpxx6115a.h
  • ms_to_ticks() : timer.h
  • msg_get() : msg.h
  • msg_initPort() : msg.h
  • msg_lockPort() : msg.h
  • msg_peek() : msg.h
  • msg_put() : msg.h
  • msg_reply() : msg.h
  • msg_unlockPort() : msg.h
  • mt29f_blockErase() : mt29f_sam3.c , mt29f.h
  • mt29f_getDevId() : mt29f_sam3.c , mt29f.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- n -

  • nmea_gpgga() : nmea.c , nmea.h
  • nmea_gpgsv() : nmea.h , nmea.c
  • nmea_gprmc() : nmea.c , nmea.h
  • nmea_gpvtg() : nmea.h , nmea.c
  • nmea_poll() : nmea.c , nmea.h
  • notifier_init() : dnotifier.c , dnotifier.h
  • notifier_update() : dnotifier.c
  • ntc_hw_getInfo() : hw_ntc.h
  • ntc_hw_read() : hw_ntc.h
  • ntc_init() : ntc.h , ntc.c
  • ntc_read() : ntc.c , ntc.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- o -

  • observer_notify() : observer.c , observer.h
  • observer_Subscribe() : observer.h , observer.c
  • observer_Unsubscribe() : observer.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- a -

  • adc_hw_init() : adc_at91.c , adc_at91.h , adc_avr.h , adc_sam3.h , adc_stm32.c , adc_lm3s.c , adc_stm32.h , adc_avr.c , adc_lm3s.h , adc_sam3.c
  • adc_hw_read() : adc_lm3s.h , adc_sam3.c , adc_sam3.h , adc_stm32.c , adc_stm32.h , adc_at91.c , adc_at91.h , adc_avr.c , adc_avr.h , adc_lm3s.c
  • adc_hw_select_ch() : adc_at91.c , adc_at91.h , adc_avr.c , adc_avr.h , adc_lm3s.c , adc_lm3s.h , adc_sam3.c , adc_sam3.h , adc_stm32.c , adc_stm32.h
  • adc_init() : adc.h , adc.c
  • adc_read() : adc.c , adc.h
  • afsk_adc_isr() : afsk.c , afsk.h
  • afsk_dac_isr() : afsk.c , afsk.h
  • afsk_init() : afsk.h , afsk.c
  • asm_switch_context() : proc_p.h
  • atoi() : strtol10.h
  • atol() : strtol10.h
  • ax25_init() : ax25.c , ax25.h
  • ax25_poll() : ax25.c , ax25.h
  • ax25_print() : ax25.h , ax25.c
  • ax25_sendVia() : ax25.h , ax25.c


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- b -

  • BATTFS_CAST() : battfs.h
  • battfs_eraseBlock() : battfs.h
  • battfs_fileclose() : battfs.c
  • battfs_fileExists() : battfs.c , battfs.h
  • battfs_fileopen() : battfs.c , battfs.h
  • battfs_flush() : battfs.c
  • battfs_fsck() : battfs.c , battfs.h
  • battfs_mount() : battfs.c , battfs.h
  • battfs_read() : battfs.c
  • battfs_to_disk() : battfs.c
  • battfs_umount() : battfs.h , battfs.c
  • battfs_write() : battfs.c
  • battfs_writeTestBlock() : battfs.h
  • bitarray_clear() : bitarray.h
  • bitarray_clearRange() : bitarray.h
  • bitarray_dump() : bitarray.h
  • bitarray_init() : bitarray.h
  • bitarray_isFull() : bitarray.h
  • bitarray_isRangeEmpty() : bitarray.h
  • bitarray_isRangeFull() : bitarray.h
  • bitarray_set() : bitarray.h
  • bitarray_setRange() : bitarray.h
  • bitarray_test() : bitarray.h
  • buz_beep() : buzzer.c , buzzer.h
  • buz_init() : buzzer.c , buzzer.h
  • buz_repeat_start() : buzzer.h , buzzer.c
  • buz_repeat_stop() : buzzer.c , buzzer.h
  • buz_softint() : buzzer.c


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- c -

  • chart_drawAxis() : charts.c , charts.h
  • chart_drawCurve() : charts.h , charts.c
  • chart_drawDots() : charts.c , charts.h
  • cipher_block_len() : cipher.h
  • cipher_cbc_begin() : cipher.h
  • cipher_cbc_decrypt() : cipher.c , cipher.h
  • cipher_cbc_encrypt() : cipher.c , cipher.h
  • cipher_ctr_begin() : cipher.h
  • cipher_ctr_decrypt() : cipher.c , cipher.h
  • cipher_ctr_encrypt() : cipher.c , cipher.h
  • cipher_ctr_step() : cipher.c , cipher.h
  • cipher_ecb_decrypt() : cipher.h
  • cipher_ecb_encrypt() : cipher.h
  • cipher_key_len() : cipher.h
  • cipher_ofb_begin() : cipher.h
  • cipher_ofb_decrypt() : cipher.c , cipher.h
  • cipher_ofb_encrypt() : cipher.h , cipher.c
  • cipher_set_key() : cipher.h
  • cipher_set_vkey() : cipher.h
  • complete_word() : readline.c
  • computeFcs() : battfs.c
  • countDiskFilePages() : battfs.c
  • countFileSize() : battfs.c
  • countPages() : battfs.c
  • cpu_pause() : power.h
  • cpu_relax() : power.h
  • crc16() : crc.h , crc.c
  • crc_ccitt() : crc_ccitt.h , crc_ccitt.c
  • CS_TOGGLE() : dataflash.c


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- d -

  • DATAFLASH_CAST() : dataflash.h
  • dataflash_close() : dataflash.c
  • dataflash_cmd() : dataflash.c
  • dataflash_flush() : dataflash.c
  • dataflash_hw_init() : hw_dataflash.c , hw_dataflash.h
  • dataflash_hw_setCS() : hw_dataflash.h , hw_dataflash.c
  • dataflash_hw_setReset() : hw_dataflash.c , hw_dataflash.h
  • dataflash_init() : dataflash.c , dataflash.h
  • dataflash_loadPage() : dataflash.c
  • dataflash_read() : dataflash.c
  • dataflash_readBlock() : dataflash.c
  • dataflash_reopen() : dataflash.c
  • dataflash_reset() : dataflash.c
  • dataflash_stat() : dataflash.c
  • dataflash_testRun() : dataflash.h , dataflash_hwtest.c
  • dataflash_testSetup() : dataflash.h , dataflash_hwtest.c
  • dataflash_testTearDown() : dataflash.h , dataflash_hwtest.c
  • dataflash_write() : dataflash.c
  • dataflash_writeBlock() : dataflash.c
  • dc_motor_enable() : dc_motor.c , dc_motor.h
  • dc_motor_init() : dc_motor.c , dc_motor.h
  • dc_motor_poll() : dc_motor.c
  • dc_motor_readTargetSpeed() : dc_motor.c , dc_motor.h
  • dc_motor_setDir() : dc_motor.c , dc_motor.h
  • dc_motor_setPriority() : dc_motor.c , dc_motor.h
  • dc_motor_setSpeed() : dc_motor.c , dc_motor.h
  • dc_motor_setup() : dc_motor.c , dc_motor.h
  • dc_motor_startTimer() : dc_motor.c , dc_motor.h
  • dc_motor_testSetUp() : dc_motor_hwtest.c , dc_motor.h
  • DECLARE_HASHTABLE_STATIC() : parser.c
  • DECLARE_ISR() : ser_at91.c , ser_mega.c , ser_sam3.c , adc_sam3.c , ser_at91.c , ser_mega.c , ser_at91.c , ser_sam3.c , ser_mega.c
  • DECLARE_ISR_CONTEXT_SWITCH() : sysirq_at91.c
  • DEFINE_ZEROCROSS_ISR() : phase.c
  • disk_to_battfs() : battfs.c
  • dnotify() : dnotifier.h
  • dnotify_targets() : dnotifier.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- e -

  • editbool_draw() : editbool.c , editbool.h
  • editbool_init() : editbool.h , editbool.c
  • editbool_update() : editbool.c , editbool.h
  • editint_draw() : editint.h , editint.c
  • editint_init() : editint.c , editint.h
  • editint_update() : editint.c , editint.h
  • EEPROM_CAST_KBLOCK() : eeprom.h
  • eeprom_erase() : eeprom.c , eeprom.h
  • eeprom_init_5() : eeprom.c , eeprom.h
  • eeprom_verify() : eeprom.c
  • entropy_add() : entropy.h
  • entropy_make_seed() : entropy.h
  • entropy_seeding_ready() : entropy.h
  • eth_addrCmp() : eth.h
  • eth_addrIsBcast() : eth.h
  • eth_addrIsLocal() : eth.h
  • eth_addrIsMcast() : eth.h
  • eth_addrIsValid() : eth.h
  • eth_addrIsZero() : eth.h
  • event_createGeneric() : event.h
  • event_createNone() : event.h
  • event_createSoftint() : event.h
  • event_do() : event.h
  • event_select() : event.c , event.h
  • event_wait() : event.h
  • event_waitTimeout() : event.c , event.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- f -

  • fatfile_open() : fat.c , fat.h
  • fifo_flush() : fifobuf.h
  • fifo_flush_locked() : fifobuf.h
  • fifo_init() : fifobuf.h
  • fifo_isempty() : fifobuf.h
  • fifo_isempty_locked() : fifobuf.h
  • fifo_isfull() : fifobuf.h
  • fifo_isfull_locked() : fifobuf.h
  • fifo_len() : fifobuf.h
  • fifo_pop() : fifobuf.h
  • fifo_push() : fifobuf.h
  • fifo_push_locked() : fifobuf.h
  • fillPageArray() : battfs.c
  • filter_init() : dnotifier.h , dnotifier.c
  • filter_mask_update() : dnotifier.c , dnotifier.h
  • filter_update() : dnotifier.c , dnotifier.h
  • findFile() : battfs.c
  • findKey() : ini_reader.c
  • FLASH25_CAST() : flash25.h
  • flash25_chipErase() : flash25.c , flash25.h
  • flash25_close() : flash25.c
  • flash25_init() : flash25.c , flash25.h
  • flash25_pin_init() : flash25.c
  • flash25_read() : flash25.c
  • flash25_reopen() : flash25.c
  • flash25_sectorErase() : flash25.c , flash25.h
  • flash25_sendCmd() : flash25.c
  • flash25_test() : flash25.h , flash25_hwtest.c
  • flash25_waitReady() : flash25.c
  • flash25_write() : flash25.c
  • FLASH_CAST() : flash.h
  • flash_getStatus() : flash_at91.c
  • flash_sendWRcmd() : flash_at91.c
  • FT245RL_CAST() : ft245rl.h
  • ft245rl_init() : ft245rl.c , ft245rl.h
  • ft245rl_read() : ft245rl.c
  • ft245rl_write() : ft245rl.c


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- g -

  • get_key_from_command() : parser.c
  • get_word() : parser.c
  • gfx_bitmapClear() : gfx.h , bitmap.c
  • gfx_bitmapInit() : bitmap.c , gfx.h
  • gfx_blit() : gfx.h , bitmap.c
  • gfx_blitImage() : bitmap.c , gfx.h
  • gfx_blitRaster() : bitmap.c , gfx.h
  • gfx_line() : gfx.h , line.c
  • gfx_lineTo() : line.c , gfx.h
  • gfx_lineUnclipped() : line.c
  • gfx_moveTo() : gfx.h , line.c
  • gfx_rectClear() : gfx.h , line.c
  • gfx_rectDraw() : gfx.h , line.c
  • gfx_rectFill() : line.c , gfx.h
  • gfx_rectFillC() : gfx.h , line.c
  • gpgga_callout() : nmea.h , nmea.c
  • gpgsv_callout() : nmea.h , nmea.c
  • gprmc_callout() : nmea.c , nmea.h
  • gpvtg_callout() : nmea.c , nmea.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- h -

  • hash_begin() : hash.h
  • hash_digest_len() : hash.h
  • hash_final() : hash.h
  • hash_update() : hash.h
  • hdlc_parse() : afsk.c
  • heap_allocmem() : heap.c , heap.h
  • heap_calloc() : heap.c , heap.h
  • heap_free() : heap.c , heap.h
  • heap_freemem() : heap.c , heap.h
  • heap_freeSpace() : heap.c , heap.h
  • heap_init() : heap.c , heap.h
  • heap_malloc() : heap.c , heap.h
  • hptime_get() : hptime.c , hptime.h
  • hptime_to_us() : timer.h
  • ht_find() : hashtable.c , hashtable.h
  • ht_init() : hashtable.c , hashtable.h
  • ht_insert() : hashtable.c , hashtable.h
  • ht_insert_with_key() : hashtable.h , hashtable.c
  • ht_iter_begin() : hashtable.h
  • ht_iter_cmp() : hashtable.h
  • ht_iter_end() : hashtable.h
  • ht_iter_get() : hashtable.h
  • ht_iter_next() : hashtable.h
  • hx8347_busInit() : hw_hx8347.h
  • hx8347_cmd() : hw_hx8347.h
  • hx8347_read() : hw_hx8347.h
  • hx8347_write() : hw_hx8347.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- i -

  • i2c_bitbangInit() : hw_i2c_bitbang.h
  • i2c_builtin_get() : i2c_avr.c , i2c.h
  • i2c_builtin_put() : i2c_avr.c , i2c.h
  • i2c_builtin_start() : i2c_avr.c
  • i2c_builtin_start_r() : i2c.h , i2c_avr.c
  • i2c_builtin_start_w() : i2c_avr.c , i2c.h
  • i2c_builtin_stop() : i2c_avr.c , i2c.h
  • i2c_error() : i2c.h
  • i2c_getc() : i2c.h
  • i2c_halfbitDelay() : hw_i2c_bitbang.h
  • i2c_hw_bitbangInit() : i2c.h , i2c_bitbang.c
  • i2c_hw_init() : i2c_lpc2.c , i2c_avr.c , i2c_lm3s.c , i2c_stm32.c , i2c.h
  • i2c_hw_start() : i2c_avr.c
  • i2c_hw_stop() : i2c_avr.c
  • i2c_init_0() : i2c.h
  • i2c_putc() : i2c.h
  • i2c_read() : i2c.h
  • i2c_recv() : i2c.c , i2c.h
  • i2c_send() : i2c.h , i2c.c
  • i2c_start_r_4() : i2c.h
  • i2c_start_w_4() : i2c.h
  • i2c_write() : i2c.h
  • i2s_getBuffer() : i2s_at91.h , i2s_at91.c
  • i2s_getFreeBuffer() : i2s_at91.c , i2s_at91.h
  • i2s_init() : i2s_at91.h , i2s_at91.c
  • i2s_start() : i2s_at91.h , i2s_at91.c
  • ini_getString() : ini_reader.c , ini_reader.h
  • insert_char() : readline.c
  • insert_chars() : readline.c
  • is_aligned() : macros.h
  • is_history_begin() : readline.c
  • is_history_end() : readline.c
  • is_history_past_end() : readline.c
  • ISR_PROTO() : stepper_at91.c
  • ISR_PROTO_CONTEXT_SWITCH() : timer_lpc2.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- p -

  • parseArgs() : parser.c
  • parser_execute_cmd() : parser.h
  • parser_get_cmd_arguments() : parser.h , parser.c
  • parser_get_cmd_template() : parser.c , parser.h
  • parser_init() : parser.h , parser.c
  • parser_process_line() : parser.c , parser.h
  • parser_register_cmd() : parser.c , parser.h
  • parser_rl_match() : parser.c , parser.h
  • password2key() : util.c
  • pcf8574_get_2() : pcf8574.c , pcf8574.h
  • pcf8574_init_3() : pcf8574.c , pcf8574.h
  • pcf8574_put_3() : pcf8574.c , pcf8574.h
  • phase_init() : phase.c , phase.h
  • phase_setDuty() : phase.c , phase.h
  • phase_setDutyUnlock() : phase.c , phase.h
  • phase_setPower() : phase.c , phase.h
  • phase_softint() : phase.c
  • pid_control_init() : pid_control.h , pid_control.c
  • pid_control_reset() : pid_control.h
  • pid_control_setPeriod() : pid_control.h
  • pid_control_setPid() : pid_control.h
  • pid_control_update() : pid_control.c , pid_control.h
  • pit_setEnable() : sysirq_at91.c
  • pmc_periphDisable() : sam3_pmc.h
  • pmc_periphEnable() : sam3_pmc.h
  • pocketbus_begin() : pocketbus.c , pocketbus.h
  • pocketbus_end() : pocketbus.c , pocketbus.h
  • pocketbus_init() : pocketbus.c , pocketbus.h
  • pocketbus_putchar() : pocketbus.c , pocketbus.h
  • pocketbus_recv() : pocketbus.c , pocketbus.h
  • pocketbus_send() : pocketbus.c , pocketbus.h
  • pocketbus_write() : pocketbus.c , pocketbus.h
  • pocketcmd_checkNak() : pocketcmd.h
  • pocketcmd_init() : pocketcmd.c , pocketcmd.h
  • pocketcmd_masterSend() : pocketcmd.h
  • pocketcmd_poll() : pocketcmd.c , pocketcmd.h
  • pocketcmd_recv() : pocketcmd.c , pocketcmd.h
  • pocketcmd_replyAck() : pocketcmd.h , pocketcmd.c
  • pocketcmd_replyNak() : pocketcmd.c , pocketcmd.h
  • pocketcmd_send() : pocketcmd.c , pocketcmd.h
  • pocketcmd_setAddr() : pocketcmd.h
  • pocketcmd_slaveReply() : pocketcmd.h
  • prng_generate() : prng.h
  • prng_reseed() : prng.h
  • prng_seed_len() : prng.h
  • proc_current() : proc.h
  • proc_currentName() : proc.h , proc.c
  • proc_currentUserData() : proc.h
  • proc_entry() : proc.c , proc_p.h
  • proc_exit() : proc.c , proc.h
  • proc_forbid() : proc.h
  • proc_init() : proc.c , proc.h
  • proc_name() : proc.c , proc.h
  • proc_needPreempt() : proc.h , proc.c
  • proc_new_with_name() : proc.c
  • proc_permit() : proc.h
  • proc_preempt() : proc.h , proc.c
  • proc_preemptAllowed() : proc.h
  • proc_rename() : proc.c , proc.h
  • proc_schedule() : proc.c
  • proc_setPri() : proc.h , proc.c
  • proc_switch() : proc_p.h , proc.c
  • proc_wakeup() : proc_p.h , proc.c
  • proc_yield() : proc.h , proc.c
  • pwm_enable() : pwm.c , pwm.h
  • pwm_hw_disable() : pwm_avr.c , pwm_avr.h
  • pwm_hw_enable() : pwm_avr.h , pwm_avr.c
  • pwm_hw_getPeriod() : pwm_avr.c , pwm_avr.h
  • pwm_hw_init() : pwm_avr.h , pwm_avr.c
  • pwm_hw_setDutyUnlock() : pwm_avr.h , pwm_avr.c
  • pwm_hw_setFrequency() : pwm_avr.c , pwm_avr.h
  • pwm_hw_setPolarity() : pwm_avr.h , pwm_avr.c
  • pwm_init() : pwm.c , pwm.h
  • pwm_setDuty() : pwm.c , pwm.h
  • pwm_setFrequency() : pwm.h , pwm.c
  • pwm_setPolarity() : pwm.c , pwm.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- r -

  • ramp_default() : ramp.c , ramp.h
  • ramp_evaluate() : ramp.h , ramp.c
  • ramp_setup() : ramp.c , ramp.h
  • ramp_testSetup() : ramp.h
  • rand() : rand.c , rand.h
  • randpool_add() : randpool.c , randpool.h
  • randpool_get() : randpool.c , randpool.h
  • randpool_init() : randpool.c , randpool.h
  • randpool_pool() : randpool.c , randpool.h
  • randpool_size() : randpool.c , randpool.h
  • readHdr() : battfs.c
  • ResMan_Alloc() : resource.h
  • ResMan_Free() : resource.h
  • rl_getc() : readline.c
  • rl_putc() : readline.c
  • rl_puts() : readline.c
  • rle() : algo/rle.h , rle.c
  • rotating_init() : rotating_hash.h
  • rotating_update() : rotating_hash.h
  • rotating_update1() : rotating_hash.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- s -

  • sched_reenqueue() : proc_p.h
  • sem_attempt() : sem.c , sem.h
  • sem_init() : sem.c , sem.h
  • sem_obtain() : sem.c , sem.h
  • sem_release() : sem.c , sem.h
  • send_cmd() : dataflash.c
  • ser_close() : ser.c
  • ser_flush() : ser.c
  • ser_getchar() : ser.c
  • ser_getchar_nowait() : ser.c , ser.h
  • ser_init() : ser.c , ser.h
  • ser_open() : ser.c
  • ser_purge() : ser.c , ser.h
  • ser_purgeRx() : ser.c , ser.h
  • ser_purgeTx() : ser.c , ser.h
  • ser_putchar() : ser.c
  • ser_read() : ser.c
  • ser_reopen() : ser.c
  • ser_setbaudrate() : ser.c , ser.h
  • ser_setparity() : ser.c , ser.h
  • ser_write() : ser.c
  • sevenseg_clear() : led_7seg.c
  • sevenseg_init() : led_7seg.c
  • sevenseg_isReady() : led_7seg.c
  • sevenseg_lock() : led_7seg.c
  • sevenseg_print() : led_7seg.c
  • sevenseg_setBlink() : led_7seg.c
  • sevenseg_setRunonce() : led_7seg.c
  • sevenseg_setRunspeed() : led_7seg.c
  • sevenseg_unlock() : led_7seg.c
  • sig_check() : signal.h
  • sig_checkSignal() : signal.h
  • sig_post() : signal.h
  • sig_send() : signal.h
  • sig_wait() : signal.h
  • sig_waitTimeout() : signal.h
  • sin_sample() : afsk.c
  • SIPO_CAST() : sipo.h
  • sipo_init() : sipo.c , sipo.h
  • sipo_putchar() : sipo.c
  • sipo_write() : sipo.c
  • spi_dma_init() : spi_dma_at91.c , spi_dma_at91.h
  • spi_dma_setclock() : spi_dma_at91.c , spi_dma_at91.h
  • spi_read() : spi_bitbang.c , spi_bitbang.h
  • spi_sendRecv() : spi_bitbang.c , spi_bitbang.h
  • spi_write() : spi_bitbang.c , spi_bitbang.h
  • spimaster_init() : ser.c , ser.h
  • spimaster_read() : ser.c
  • spimaster_write() : ser.c
  • sseg_init() : hw_led_7seg.h
  • sseg_off() : hw_led_7seg.h
  • sseg_on() : hw_led_7seg.h
  • STATIC_ASSERT() : pocketbus.h , pocketcmd.h
  • stepper_break() : stepper.c , stepper.h
  • stepper_disable() : stepper.c , stepper.h
  • stepper_error() : stepper.c , stepper.h
  • stepper_home() : stepper.h , stepper.c
  • stepper_idle() : stepper.c , stepper.h
  • stepper_init() : stepper.c , stepper.h
  • stepper_move() : stepper.c , stepper.h
  • stepper_reset() : stepper.h , stepper.c
  • stepper_schedule_irq() : stepper.c
  • stepper_setup() : stepper.c , stepper.h
  • stepper_stop() : stepper.c , stepper.h
  • stepper_tc_doPulse() : stepper_at91.h , stepper_avr.h
  • stepper_tc_init() : stepper_avr.h , stepper_at91.c , stepper_at91.h , stepper_avr.c
  • stepper_tc_irq_disable() : stepper_at91.h , stepper_avr.h
  • stepper_tc_irq_enable() : stepper_avr.h , stepper_at91.h
  • stepper_tc_resetTimer() : stepper_avr.h , stepper_at91.h
  • stepper_tc_setDelay() : stepper_avr.h , stepper_at91.h
  • stepper_tc_setup() : stepper_at91.h , stepper_at91.c , stepper_avr.h , stepper_avr.c
  • stepper_tc_skipPulse() : stepper_at91.h , stepper_avr.h
  • stepper_tc_tio_irq() : stepper_at91.c
  • stm32_gpioPinConfig() : gpio_stm32.h , gpio_stm32.c
  • stm32_gpioPinRead() : gpio_stm32.h
  • stm32_gpioPinWrite() : gpio_stm32.h
  • strtol10() : strtol10.c , strtol10.h
  • strtoul10() : strtol10.c , strtol10.h
  • swab_float() : cpu/byteorder.h
  • synctimer_add() : timer.h , timer.c
  • synctimer_poll() : timer.c , timer.h
  • sysirq_enabled() : sysirq_at91.h , sysirq_at91.c
  • sysirq_init() : irq_cm3.c , irq_cm3.h , sysirq_at91.h , sysirq_at91.c
  • sysirq_setEnable() : sysirq_at91.c , sysirq_at91.h
  • sysirq_setHandler() : irq_cm3.h , sysirq_at91.c , irq_cm3.c , sysirq_at91.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- t -

  • tas5706a_init_1() : tas5706a.c , tas5706a.h
  • tas5706a_setLowPower_2() : tas5706a.h , tas5706a.c
  • tas5706a_setVolume_3() : tas5706a.c , tas5706a.h
  • tea_dec() : tea.h , tea.c
  • tea_enc() : tea.c , tea.h
  • text_charWidth() : text_format.c
  • text_clear() : text.c , text.h
  • text_moveTo() : text.c , text.h
  • text_printf() : text_format.c
  • text_putchar() : text.c , text.h
  • text_putglyph() : text.c
  • text_puts() : text_format.c
  • text_setCoord() : text.c , text.h
  • text_style() : text.c , text.h
  • text_vprintf() : text_format.c
  • text_vwidthf() : text_format.c
  • text_widthf() : text_format.c
  • text_xprintf() : text_format.c
  • text_xyprintf() : text_format.c
  • text_xyvprintf() : text_format.c
  • tftp_init() : tftp.h , tftp.c
  • tftp_listen() : tftp.c , tftp.h
  • thermo_clearErrors() : thermo.c , thermo.h
  • thermo_do() : thermo.c
  • thermo_hw_off() : hw_thermo.h
  • thermo_hw_read() : hw_thermo.h
  • thermo_hw_set() : hw_thermo.h
  • thermo_hw_tolerance() : hw_thermo.h
  • thermo_init() : thermo.c , thermo.h
  • thermo_readTemperature() : thermo.c , thermo.h
  • thermo_setTarget() : thermo.c , thermo.h
  • thermo_softint() : thermo.c
  • thermo_start() : thermo.c , thermo.h
  • thermo_status() : thermo.c , thermo.h
  • thermo_stop() : thermo.c , thermo.h
  • thermo_timer() : thermo.c , thermo.h
  • ticks_to_ms() : timer.h
  • ticks_to_us() : timer.h
  • timer_abort() : timer.c , timer.h
  • timer_add() : timer.c , timer.h
  • timer_addToList() : timer.c
  • timer_busyWait() : timer.c , timer.h
  • timer_clock() : timer.h
  • timer_clock_unlocked() : timer.h
  • timer_delay() : timer.h
  • timer_delayHp() : timer.c , timer.h
  • timer_delayTicks() : timer.h , timer.c
  • timer_hw_exit() : timer_cm3.h
  • timer_hw_hpread() : timer_lpc2.h
  • timer_hw_init() : timer_lpc2.h , timer_mega.h , timer_cm3.h , timer_mega.c , timer_at91.h , timer_xmega.h , timer_cm3.c , timer_qt.c , timer_posix.c , timer_xmega.c
  • timer_hw_irq() : timer_lpc2.h
  • timer_hw_triggered() : timer_lpc2.h
  • timer_setDelay() : timer.h
  • timer_setEvent() : timer.h
  • timer_setSignal() : timer.h
  • timer_setSoftint() : timer.h
  • timer_waitEvent() : timer.h
  • tlv5618_init() : tlv5618.h , tlv5618.c
  • tlv5618_setOutA() : tlv5618.c , tlv5618.h
  • tlv5618_setOutB() : tlv5618.c , tlv5618.h
  • tlv5618_setPowerDown() : tlv5618.h , tlv5618.c
  • tmp123_init() : tmp123.c , tmp123.h
  • tmp123_read() : tmp123.c , tmp123.h
  • twi_init() : twi_at91.c , twi_at91.h
  • twi_read() : twi_at91.h , twi_at91.c
  • twi_write() : twi_at91.c , twi_at91.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- u -

  • uart0_irq_rx() : ser_at91.c , ser_sam3.c
  • uart0_irq_tx() : ser_sam3.c , ser_at91.c
  • uart1_irq_rx() : ser_at91.c
  • uart1_irq_tx() : ser_at91.c
  • unrle() : algo/rle.h , rle.c
  • updcrc16() : crc.h
  • updcrc_ccitt() : crc_ccitt.h
  • upper_bound() : ntc.c
  • us_to_hptime() : timer.h
  • us_to_ticks() : timer.h
  • usb_deviceRegister() : usb_stm32.c , usb.h
  • usb_endpointDirIn() : usb.h
  • usb_endpointDirOut() : usb.h
  • usb_endpointIsBulkIn() : usb.h
  • usb_endpointIsBulkOut() : usb.h
  • usb_endpointIsIntIn() : usb.h
  • usb_endpointIsIntOut() : usb.h
  • usb_endpointIsIsocIn() : usb.h
  • usb_endpointIsIsocOut() : usb.h
  • usb_endpointNum() : usb.h
  • usb_endpointReadTimeout() : usb_stm32.c , usb.h
  • usb_endpointType() : usb.h
  • usb_endpointWriteTimeout() : usb_stm32.c , usb.h
  • usb_endpointXferBulk() : usb.h
  • usb_endpointXferControl() : usb.h
  • usb_endpointXferInt() : usb.h
  • usb_endpointXferIsoc() : usb.h
  • usb_serial_clearerr() : usbser.c
  • usb_serial_close() : usbser.c
  • usb_serial_error() : usbser.c
  • usb_serial_open() : usbser.c
  • usb_serial_read() : usbser.c
  • usb_serial_reopen() : usbser.c
  • usb_serial_write() : usbser.c
  • usbser_init() : usbser.c , usbser.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- w -

  • wdt_reset() : wdt.h
  • wdt_start() : wdt_avr.h , wdt.h
  • wdt_stop() : wdt_avr.h
  • widget_init() : dwidget.c , dwidget.h
  • win_close() : win.h , win.c
  • win_compose() : win.c , win.h
  • win_create() : win.c , win.h
  • win_move() : win.c , win.h
  • win_open() : win.h , win.c
  • win_raise() : win.h , win.c
  • win_resize() : win.c , win.h
  • win_setGeometry() : win.h , win.c
  • write_page() : flash_at91.c


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • g
  • h
  • i
  • k
  • l
  • m
  • n
  • o
  • p
  • r
  • s
  • t
  • u
  • w
  • x

- x -

  • xmodem_recv() : xmodem.c , xmodem.h
  • xmodem_send() : xmodem.c , xmodem.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • a
  • b
  • c
  • d
  • e
  • f
  • h
  • i
  • k
  • l
  • m
  • p
  • r
  • s
  • t
  • u

- a -

  • adc_ch_t : adc.h
  • adcread_t : adc.h
  • amp_t : ntc.h
  • ax25_callback_t : ax25.h

- b -

  • block_idx_t : kblock.h

- c -

  • CmdFuncPtr : parser.h
  • const_dval_t : dtag.h
  • const_iptr_t : compiler.h

- d -

  • dataflash_offset_t : dataflash.h
  • dataflash_page_t : dataflash.h
  • dataflash_size_t : dataflash.h
  • dc_speed_t : dc_motor.h
  • dcontext_t : dwidget.h
  • dfilter_mask_t : dnotifier.h
  • disk_size_t : battfs.h
  • display_callback : leveledit.h
  • dpos_t : dwidget.h
  • dstyle_t : editint.h
  • dval_t : dtag.h

- e -

  • e2_size_t : eeprom.h
  • e2addr_t : eeprom.h
  • e2blk_size_t : eeprom.h
  • e2dev_addr_t : eeprom.h

- f -

  • fcs_t : battfs.h
  • file_size_t : battfs.h
  • filemode_t : battfs.h
  • fill_t : battfs.h
  • flash25Addr_t : flash25.h
  • fsm_state : stepper.h

- h -

  • Hook : compiler.h
  • hook_get_key : hashtable.h
  • hptime_t : timer_qt.h , timer_dsp56k.h , timer_lpc2.h , hptime.h

- i -

  • id_t : macros.h
  • inode_t : battfs.h
  • iptr_t : compiler.h
  • irq_handler_t : at91_aic.h
  • irq_t : stepper_at91.h , stepper_avr.h

- k -

  • keymask_t : kbd_map.h
  • kfile_off_t : io/kfile.h

- l -

  • lcdpos_t : lcd_hd44.h
  • level_set_callback : leveledit.h

- m -

  • mcp41_res_t : mcp41.h
  • MenuHook : menu.h
  • mtime_t : compiler.h

- p -

  • pgaddr_t : battfs.h
  • pgcnt_t : battfs.h
  • pgoff_t : battfs.h
  • pidk_t : pid_control.h
  • pocketbus_addr_t : pocketbus.h
  • pocketbus_len_t : pocketbus.h
  • pocketcmd_hook_t : pocketcmd.h
  • pocketcmd_lookup_t : pocketcmd.h
  • pocketcmd_t : pocketcmd.h
  • pwm_duty_t : pwm.h
  • pwm_freq_t : pwm.h
  • pwm_period_t : pwm_avr.h

- r -

  • RenderHook : menu.h

- s -

  • seq_t : battfs.h
  • serstatus_t : ser_at91.h , ser_sam3.h
  • sigbit_t : compiler.h
  • sigmask_t : compiler.h
  • stepper_isr_t : stepper.h
  • sysirq_handler_t : sysirq_at91.h
  • sysirq_setEnable_t : sysirq_at91.h

- t -

  • ticks_t : compiler.h

- u -

  • utime_t : compiler.h


BeRTOS: Globals

  • All
  • Functions
  • Variables
  • Typedefs
  • Enumerations
  • Enumerator
  • Defines
  • _
  • a
  • b
  • c
  • d
  • e
  • f
  • k
  • l
  • m
  • p
  • s
  • t
  • v

- _ -

  • _clock : timer.c , timer.h

- a -

  • all_motors : stepper.c
  • ansi_mode : text.c

- b -

  • blk_active : blanker.c
  • blk_enabled : blanker.c
  • blk_KbdHandler : blanker.c
  • blk_lastevent : blanker.c

- c -

  • coord_t : gfx.h
  • CRC_TABLE : crc.c
  • current_process : proc.c , proc_p.h

- d -

  • dcm_all : dc_motor.c
  • devs : thermo.c

- e -

  • except_stack : except.h

- f -

  • fake_disk : diskio_emul.c

- k -

  • kbd_buf : kbd.c
  • kbd_cnt : kbd.c
  • kbd_debHandler : kbd.c
  • kbd_defHandler : kbd.c
  • kbd_handlers : kbd.c
  • kbd_rawHandlers : kbd.c
  • kbd_rpt_mask : kbd.c
  • kbd_rptHandler : kbd.c
  • kbd_timer : kbd.c
  • key_pressed : kbd.c

- l -

  • lcd_bitmap : lcd_32122a.c
  • lcd_current_addr : lcd_hd44.c
  • lcd_raster : lcd_32122a.c

- m -

  • main_process : proc.c
  • mem_info : dataflash.c , eeprom.c
  • msg_strings : messages.c

- p -

  • proc_ready_list : proc.c , proc_p.h

- s -

  • serial_errors : ser.h
  • sin_table : afsk.c
  • str_empty : messages.c
  • sysirq_tab : sysirq_at91.c

- t -

  • thermo_timer : thermo.c
  • timers_queue : timer.c
  • triacs : phase.c

- v -

  • vers_build_nr : verstag.c , verstag.h
  • vers_host : verstag.h , verstag.c
  • vers_tag : verstag.h , verstag.c


BeRTOS: gohu.c Source File

  • fonts
gohu.c
00001 /* Generated by convbdf on Wed Apr 28 11:17:58 CEST 2010. */
00002 #include <gfx/font.h>
00003
00004 /* Font information:
00005
00006    name: -Gohu-GohuFont-Medium-R-Normal--11-80-100-100-C-60-ISO8859-1
00007    pixel size: 11
00008    ascent: 9
00009    descent: 2
00010 */
00011
00012 /* Font character bitmap data. */
00013 static const PROGMEM uint8_t font_gohu_glyphs[] = {
00014
00015 /* Character (0x20): bbw=0, bbh=0, bbx=0, bby=0, width=6 */
00016 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                  */
00017 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                    */
00018
00019 /* Character (0x21): bbw=1, bbh=8, bbx=2, bby=0, width=6 */
00020 0x00, 0x00, 0x7e, 0x00, 0x00, 0x00, /*                  ******                          */
00021 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /*                  ******                               *            */
00022
00023 /* Character (0x22): bbw=3, bbh=3, bbx=1, bby=5, width=6 */
00024 0x00, 0x0e, 0x00, 0x0e, 0x00, 0x00, /*          ***             ***                     */
00025 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*          ***             ***                                       */
00026
00027 /* Character (0x23): bbw=5, bbh=7, bbx=0, bby=1, width=6 */
00028 0x28, 0xfe, 0x28, 0xfe, 0x28, 0x00, /*    * *   *******   * *   *******   * *           */
00029 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*    * *   *******   * *   *******   * *                             */
00030
00031 /* Character (0x24): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */
00032 0x98, 0x24, 0xfe, 0x24, 0xc8, 0x00, /*    **  *  *  *   *******  *  *     *  **         */
00033 0x00, 0x01, 0x03, 0x01, 0x00, 0x00, /*    **  *  *  *   *******  *  *     *  **           *  ** *         */
00034
00035 /* Character (0x25): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00036 0x88, 0x54, 0xa8, 0x50, 0x8c, 0x00, /*    *   *  * * *    * * *    * *   **   *         */
00037 0x01, 0x00, 0x00, 0x01, 0x00, 0x00, /*    *   *  * * *    * * *    * *   **   *        *        *         */
00038
00039 /* Character (0x26): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00040 0xd8, 0x24, 0x54, 0x88, 0x40, 0x00, /*    ** **  *  *    * * *    *   *      *          */
00041 0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /*    ** **  *  *    * * *    *   *      *            *  *     *      */
00042
00043 /* Character (0x27): bbw=1, bbh=3, bbx=2, bby=5, width=6 */
00044 0x00, 0x00, 0x0e, 0x00, 0x00, 0x00, /*                  ***                             */
00045 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                  ***                                               */
00046
00047 /* Character (0x28): bbw=3, bbh=9, bbx=1, bby=-1, width=6 */
00048 0x00, 0x70, 0x8c, 0x02, 0x00, 0x00, /*             ***   **   * *                       */
00049 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, /*             ***   **   * *                            *   *        */
00050
00051 /* Character (0x29): bbw=3, bbh=9, bbx=1, bby=-1, width=6 */
00052 0x00, 0x02, 0x8c, 0x70, 0x00, 0x00, /*          *        **   *    ***                  */
00053 0x00, 0x02, 0x01, 0x00, 0x00, 0x00, /*          *        **   *    ***                     * *            */
00054
00055 /* Character (0x2a): bbw=5, bbh=5, bbx=0, bby=1, width=6 */
00056 0x50, 0x20, 0xf8, 0x20, 0x50, 0x00, /*     * *      *     *****     *      * *          */
00057 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*     * *      *     *****     *      * *                            */
00058
00059 /* Character (0x2b): bbw=5, bbh=5, bbx=0, bby=1, width=6 */
00060 0x20, 0x20, 0xf8, 0x20, 0x20, 0x00, /*      *       *     *****     *       *           */
00061 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*      *       *     *****     *       *                             */
00062
00063 /* Character (0x2c): bbw=2, bbh=4, bbx=1, bby=-2, width=6 */
00064 0x00, 0x80, 0x80, 0x00, 0x00, 0x00, /*                *       *                         */
00065 0x00, 0x05, 0x03, 0x00, 0x00, 0x00, /*                *       *                           * ***           */
00066
00067 /* Character (0x2d): bbw=5, bbh=1, bbx=0, bby=3, width=6 */
00068 0x20, 0x20, 0x20, 0x20, 0x20, 0x00, /*      *       *       *       *       *           */
00069 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*      *       *       *       *       *                             */
00070
00071 /* Character (0x2e): bbw=2, bbh=2, bbx=1, bby=0, width=6 */
00072 0x00, 0x80, 0x80, 0x00, 0x00, 0x00, /*                *       *                         */
00073 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, /*                *       *                           *  *            */
00074
00075 /* Character (0x2f): bbw=5, bbh=10, bbx=0, bby=-2, width=6 */
00076 0x00, 0x80, 0x60, 0x18, 0x06, 0x00, /*                *     **    **    **              */
00077 0x06, 0x01, 0x00, 0x00, 0x00, 0x00, /*                *     **    **    **              ***               */
00078
00079 /* Character (0x30): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00080 0xf8, 0x44, 0x24, 0x14, 0xf8, 0x00, /*    *****  *   *   *  *    * *      *****         */
00081 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*    *****  *   *   *  *    * *      *****           *  *  *         */
00082
00083 /* Character (0x31): bbw=3, bbh=7, bbx=0, bby=0, width=6 */
00084 0x10, 0x08, 0xfc, 0x00, 0x00, 0x00, /*     *      *      ******                         */
00085 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /*     *      *      ******                              *            */
00086
00087 /* Character (0x32): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00088 0x08, 0x84, 0x44, 0x24, 0x18, 0x00, /*    *      *    *  *   *   *  *     **            */
00089 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /*    *      *    *  *   *   *  *     **           *  *  *  *  *      */
00090
00091 /* Character (0x33): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00092 0x88, 0x04, 0x24, 0x24, 0xd8, 0x00, /*    *   *  *       *  *    *  *     ** **         */
00093 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*    *   *  *       *  *    *  *     ** **           *  *  *         */
00094
00095 /* Character (0x34): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00096 0x60, 0x50, 0x48, 0xfc, 0x40, 0x00, /*      **     * *    *  *   ******      *          */
00097 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, /*      **     * *    *  *   ******      *                  *         */
00098
00099 /* Character (0x35): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00100 0x9c, 0x14, 0x14, 0x14, 0xe4, 0x00, /*   ***  *  * *     * *     * *     *  ***         */
00101 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*   ***  *  * *     * *     * *     *  ***           *  *  *         */
00102
00103 /* Character (0x36): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00104 0xf8, 0x14, 0x14, 0x14, 0xe0, 0x00, /*    *****  * *     * *     * *        ***         */
00105 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*    *****  * *     * *     * *        ***           *  *  *         */
00106
00107 /* Character (0x37): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00108 0x04, 0x04, 0xc4, 0x34, 0x0c, 0x00, /*   *       *       *   **  * **    **             */
00109 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /*   *       *       *   **  * **    **                  *            */
00110
00111 /* Character (0x38): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00112 0xd8, 0x24, 0x24, 0x24, 0xd8, 0x00, /*    ** **  *  *    *  *    *  *     ** **         */
00113 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*    ** **  *  *    *  *    *  *     ** **           *  *  *         */
00114
00115 /* Character (0x39): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00116 0x18, 0x24, 0x24, 0x24, 0xf8, 0x00, /*    **     *  *    *  *    *  *     *****         */
00117 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*    **     *  *    *  *    *  *     *****           *  *  *         */
00118
00119 /* Character (0x3a): bbw=2, bbh=5, bbx=2, bby=0, width=6 */
00120 0x00, 0x00, 0xb0, 0xb0, 0x00, 0x00, /*                     ** *    ** *                 */
00121 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /*                     ** *    ** *                      *  *         */
00122
00123 /* Character (0x3b): bbw=2, bbh=7, bbx=1, bby=-2, width=6 */
00124 0x00, 0xb0, 0xb0, 0x00, 0x00, 0x00, /*             ** *    ** *                         */
00125 0x00, 0x05, 0x03, 0x00, 0x00, 0x00, /*             ** *    ** *                           * ***           */
00126
00127 /* Character (0x3c): bbw=4, bbh=7, bbx=1, bby=0, width=6 */
00128 0x00, 0x20, 0x50, 0x88, 0x04, 0x00, /*              *      * *    *   *  *              */
00129 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, /*              *      * *    *   *  *                         *      */
00130
00131 /* Character (0x3d): bbw=5, bbh=3, bbx=0, bby=2, width=6 */
00132 0x50, 0x50, 0x50, 0x50, 0x50, 0x00, /*     * *     * *     * *     * *     * *          */
00133 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*     * *     * *     * *     * *     * *                            */
00134
00135 /* Character (0x3e): bbw=4, bbh=7, bbx=1, bby=0, width=6 */
00136 0x00, 0x04, 0x88, 0x50, 0x20, 0x00, /*           *        *   *    * *      *           */
00137 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, /*           *        *   *    * *      *             *               */
00138
00139 /* Character (0x3f): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00140 0x08, 0x04, 0x44, 0x24, 0x18, 0x00, /*    *      *       *   *   *  *     **            */
00141 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /*    *      *       *   *   *  *     **                 *            */
00142
00143 /* Character (0x40): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00144 0xf8, 0x04, 0x74, 0x54, 0x78, 0x00, /*    *****  *       * ***   * * *    ****          */
00145 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /*    *****  *       * ***   * * *    ****            *  *  *  *      */
00146
00147 /* Character (0x41): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00148 0xfc, 0x12, 0x12, 0x12, 0xfc, 0x00, /*   ****** *  *    *  *    *  *     ******         */
00149 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*   ****** *  *    *  *    *  *     ******        *           *      */
00150
00151 /* Character (0x42): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00152 0xfe, 0x12, 0x12, 0x12, 0xec, 0x00, /*  ******* *  *    *  *    *  *     ** ***         */
00153 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /*  ******* *  *    *  *    *  *     ** ***        *  *  *  *         */
00154
00155 /* Character (0x43): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00156 0xfc, 0x02, 0x02, 0x02, 0x84, 0x00, /*   ****** *       *       *        *    *         */
00157 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*   ****** *       *       *        *    *           *  *  *         */
00158
00159 /* Character (0x44): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00160 0xfe, 0x02, 0x02, 0x02, 0xfc, 0x00, /*  ******* *       *       *        ******         */
00161 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /*  ******* *       *       *        ******        *  *  *  *         */
00162
00163 /* Character (0x45): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00164 0xfe, 0x12, 0x12, 0x12, 0x02, 0x00, /*  ******* *  *    *  *    *  *    *               */
00165 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /*  ******* *  *    *  *    *  *    *              *  *  *  *  *      */
00166
00167 /* Character (0x46): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00168 0xfe, 0x12, 0x12, 0x12, 0x02, 0x00, /*  ******* *  *    *  *    *  *    *               */
00169 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, /*  ******* *  *    *  *    *  *    *              *                  */
00170
00171 /* Character (0x47): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00172 0xfc, 0x02, 0x12, 0x12, 0xf4, 0x00, /*   ****** *       *  *    *  *     * ****         */
00173 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*   ****** *       *  *    *  *     * ****           *  *  *         */
00174
00175 /* Character (0x48): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00176 0xfe, 0x10, 0x10, 0x10, 0xfe, 0x00, /*  *******    *       *       *    *******         */
00177 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*  *******    *       *       *    *******        *           *      */
00178
00179 /* Character (0x49): bbw=3, bbh=8, bbx=1, bby=0, width=6 */
00180 0x00, 0x02, 0xfe, 0x02, 0x00, 0x00, /*          *       ******* *                       */
00181 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*          *       ******* *                         *  *  *         */
00182
00183 /* Character (0x4a): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00184 0xc0, 0x00, 0x00, 0x00, 0xfe, 0x00, /*       **                         *******         */
00185 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*       **                         *******           *  *  *         */
00186
00187 /* Character (0x4b): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00188 0xfe, 0x10, 0x28, 0x44, 0x82, 0x00, /*  *******    *      * *    *   *  *     *         */
00189 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*  *******    *      * *    *   *  *     *        *           *      */
00190
00191 /* Character (0x4c): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00192 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, /*  *******                                         */
00193 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /*  *******                                        *  *  *  *  *      */
00194
00195 /* Character (0x4d): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00196 0xfe, 0x04, 0x18, 0x04, 0xfe, 0x00, /*  *******  *        **     *      *******         */
00197 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*  *******  *        **     *      *******        *           *      */
00198
00199 /* Character (0x4e): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00200 0xfe, 0x0c, 0x30, 0xc0, 0xfe, 0x00, /*  *******  **        **        ** *******         */
00201 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*  *******  **        **        ** *******        *           *      */
00202
00203 /* Character (0x4f): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00204 0xfc, 0x02, 0x02, 0x02, 0xfc, 0x00, /*   ****** *       *       *        ******         */
00205 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*   ****** *       *       *        ******           *  *  *         */
00206
00207 /* Character (0x50): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00208 0xfe, 0x12, 0x12, 0x12, 0x0c, 0x00, /*  ******* *  *    *  *    *  *     **             */
00209 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, /*  ******* *  *    *  *    *  *     **            *                  */
00210
00211 /* Character (0x51): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */
00212 0xfc, 0x02, 0x42, 0x82, 0x7c, 0x00, /*   ****** *       *    *  *     *  *****          */
00213 0x00, 0x01, 0x01, 0x00, 0x03, 0x00, /*   ****** *       *    *  *     *  *****            *  *     **     */
00214
00215 /* Character (0x52): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00216 0xfe, 0x12, 0x12, 0x32, 0xcc, 0x00, /*  ******* *  *    *  *    *  **    **  **         */
00217 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*  ******* *  *    *  *    *  **    **  **        *           *      */
00218
00219 /* Character (0x53): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00220 0x8c, 0x12, 0x12, 0x12, 0xe4, 0x00, /*   **   * *  *    *  *    *  *     *  ***         */
00221 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*   **   * *  *    *  *    *  *     *  ***           *  *  *         */
00222
00223 /* Character (0x54): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00224 0x02, 0x02, 0xfe, 0x02, 0x02, 0x00, /*  *       *       ******* *       *               */
00225 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /*  *       *       ******* *       *                    *            */
00226
00227 /* Character (0x55): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00228 0xfe, 0x00, 0x00, 0x00, 0xfe, 0x00, /*  *******                         *******         */
00229 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*  *******                         *******           *  *  *         */
00230
00231 /* Character (0x56): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00232 0x1e, 0x60, 0x80, 0x60, 0x1e, 0x00, /*  ****        **        *     **  ****            */
00233 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /*  ****        **        *     **  ****                 *            */
00234
00235 /* Character (0x57): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00236 0x7e, 0x80, 0x70, 0x80, 0x7e, 0x00, /*  ******        *    ***        * ******          */
00237 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, /*  ******        *    ***        * ******            *     *         */
00238
00239 /* Character (0x58): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00240 0xc6, 0x28, 0x10, 0x28, 0xc6, 0x00, /*  **   **   * *      *      * *   **   **         */
00241 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*  **   **   * *      *      * *   **   **        *           *      */
00242
00243 /* Character (0x59): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00244 0x06, 0x08, 0xf0, 0x08, 0x06, 0x00, /*  **        *        ****   *     **              */
00245 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /*  **        *        ****   *     **                   *            */
00246
00247 /* Character (0x5a): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00248 0xc2, 0x22, 0x12, 0x0a, 0x06, 0x00, /*  *    ** *   *   *  *    * *     **              */
00249 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /*  *    ** *   *   *  *    * *     **             *  *  *  *  *      */
00250
00251 /* Character (0x5b): bbw=3, bbh=9, bbx=2, bby=-1, width=6 */
00252 0x00, 0x00, 0xfe, 0x02, 0x02, 0x00, /*                  ******* *       *               */
00253 0x00, 0x00, 0x03, 0x02, 0x02, 0x00, /*                  ******* *       *                    **  *  *     */
00254
00255 /* Character (0x5c): bbw=5, bbh=10, bbx=1, bby=-2, width=6 */
00256 0x00, 0x06, 0x18, 0x60, 0x80, 0x00, /*          **        **        **        *         */
00257 0x00, 0x00, 0x00, 0x00, 0x01, 0x06, /*          **        **        **        *                    *   ** */
00258
00259 /* Character (0x5d): bbw=3, bbh=9, bbx=0, bby=-1, width=6 */
00260 0x02, 0x02, 0xfe, 0x00, 0x00, 0x00, /*  *       *       *******                         */
00261 0x02, 0x02, 0x03, 0x00, 0x00, 0x00, /*  *       *       *******                         *  * **           */
00262
00263 /* Character (0x5e): bbw=5, bbh=3, bbx=0, bby=4, width=6 */
00264 0x10, 0x08, 0x04, 0x08, 0x10, 0x00, /*     *      *      *        *        *            */
00265 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*     *      *      *        *        *                              */
00266
00267 /* Character (0x5f): bbw=6, bbh=1, bbx=0, bby=-1, width=6 */
00268 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                  */
00269 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, /*                                                  *  *  *  *  *  *  */
00270
00271 /* Character (0x60): bbw=3, bbh=3, bbx=1, bby=5, width=6 */
00272 0x00, 0x02, 0x04, 0x08, 0x00, 0x00, /*          *        *        *                     */
00273 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*          *        *        *                                       */
00274
00275 /* Character (0x61): bbw=5, bbh=5, bbx=0, bby=0, width=6 */
00276 0x80, 0x50, 0x50, 0x50, 0xe0, 0x00, /*        *    * *     * *     * *      ***         */
00277 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /*        *    * *     * *     * *      ***           *  *  *  *      */
00278
00279 /* Character (0x62): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00280 0xfe, 0x20, 0x10, 0x10, 0xe0, 0x00, /*  *******     *      *       *        ***         */
00281 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /*  *******     *      *       *        ***        *  *  *  *         */
00282
00283 /* Character (0x63): bbw=5, bbh=5, bbx=0, bby=0, width=6 */
00284 0xe0, 0x10, 0x10, 0x10, 0x10, 0x00, /*      ***    *       *       *       *            */
00285 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /*      ***    *       *       *       *              *  *  *  *      */
00286
00287 /* Character (0x64): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00288 0xe0, 0x10, 0x10, 0x90, 0xfe, 0x00, /*      ***    *       *       *  * *******         */
00289 0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /*      ***    *       *       *  * *******           *  *     *      */
00290
00291 /* Character (0x65): bbw=5, bbh=5, bbx=0, bby=0, width=6 */
00292 0xe0, 0x50, 0x50, 0x50, 0x60, 0x00, /*      ***    * *     * *     * *      **          */
00293 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /*      ***    * *     * *     * *      **            *  *  *  *      */
00294
00295 /* Character (0x66): bbw=3, bbh=8, bbx=1, bby=0, width=6 */
00296 0x00, 0xfc, 0x12, 0x12, 0x00, 0x00, /*           ****** *  *    *  *                    */
00297 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, /*           ****** *  *    *  *                      *               */
00298
00299 /* Character (0x67): bbw=5, bbh=7, bbx=0, bby=-2, width=6 */
00300 0xe0, 0x10, 0x10, 0x90, 0xf0, 0x00, /*      ***    *       *       *  *    ****         */
00301 0x00, 0x05, 0x05, 0x04, 0x03, 0x00, /*      ***    *       *       *  *    ****           * ** *  ***     */
00302
00303 /* Character (0x68): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00304 0xfe, 0x20, 0x10, 0x10, 0xe0, 0x00, /*  *******     *      *       *        ***         */
00305 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*  *******     *      *       *        ***        *           *      */
00306
00307 /* Character (0x69): bbw=3, bbh=7, bbx=1, bby=0, width=6 */
00308 0x00, 0x10, 0xf4, 0x00, 0x00, 0x00, /*             *     * ****                         */
00309 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /*             *     * ****                              *  *         */
00310
00311 /* Character (0x6a): bbw=3, bbh=9, bbx=0, bby=-2, width=6 */
00312 0x00, 0x10, 0xf4, 0x00, 0x00, 0x00, /*             *     * ****                         */
00313 0x04, 0x04, 0x03, 0x00, 0x00, 0x00, /*             *     * ****                          *  ***           */
00314
00315 /* Character (0x6b): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00316 0xfe, 0x40, 0x60, 0x90, 0x00, 0x00, /*  *******      *      **     *  *                 */
00317 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*  *******      *      **     *  *                *           *      */
00318
00319 /* Character (0x6c): bbw=4, bbh=8, bbx=1, bby=0, width=6 */
00320 0x00, 0x02, 0xfe, 0x00, 0x00, 0x00, /*          *       *******                         */
00321 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, /*          *       *******                                 *  *      */
00322
00323 /* Character (0x6d): bbw=5, bbh=5, bbx=0, bby=0, width=6 */
00324 0xf0, 0x10, 0xf0, 0x10, 0xe0, 0x00, /*     ****    *       ****    *        ***         */
00325 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, /*     ****    *       ****    *        ***        *     *     *      */
00326
00327 /* Character (0x6e): bbw=5, bbh=5, bbx=0, bby=0, width=6 */
00328 0xf0, 0x10, 0x10, 0x10, 0xe0, 0x00, /*     ****    *       *       *        ***         */
00329 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*     ****    *       *       *        ***        *           *      */
00330
00331 /* Character (0x6f): bbw=5, bbh=5, bbx=0, bby=0, width=6 */
00332 0xe0, 0x10, 0x10, 0x10, 0xe0, 0x00, /*      ***    *       *       *        ***         */
00333 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*      ***    *       *       *        ***           *  *  *         */
00334
00335 /* Character (0x70): bbw=5, bbh=7, bbx=0, bby=-2, width=6 */
00336 0xf0, 0x20, 0x10, 0x10, 0xe0, 0x00, /*     ****     *      *       *        ***         */
00337 0x07, 0x01, 0x01, 0x01, 0x00, 0x00, /*     ****     *      *       *        ***        ****  *  *         */
00338
00339 /* Character (0x71): bbw=5, bbh=7, bbx=0, bby=-2, width=6 */
00340 0xe0, 0x10, 0x10, 0x90, 0xf0, 0x00, /*      ***    *       *       *  *    ****         */
00341 0x00, 0x01, 0x01, 0x00, 0x07, 0x00, /*      ***    *       *       *  *    ****           *  *     ***    */
00342
00343 /* Character (0x72): bbw=5, bbh=5, bbx=0, bby=0, width=6 */
00344 0xf0, 0x20, 0x10, 0x10, 0x20, 0x00, /*     ****     *      *       *        *           */
00345 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, /*     ****     *      *       *        *          *                  */
00346
00347 /* Character (0x73): bbw=5, bbh=5, bbx=0, bby=0, width=6 */
00348 0x20, 0x50, 0x50, 0x50, 0x80, 0x00, /*      *      * *     * *     * *        *         */
00349 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /*      *      * *     * *     * *        *        *  *  *  *         */
00350
00351 /* Character (0x74): bbw=4, bbh=8, bbx=0, bby=0, width=6 */
00352 0x10, 0xfe, 0x10, 0x10, 0x00, 0x00, /*     *    *******    *       *                    */
00353 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /*     *    *******    *       *                         *  *         */
00354
00355 /* Character (0x75): bbw=5, bbh=5, bbx=0, bby=0, width=6 */
00356 0xf0, 0x00, 0x00, 0x80, 0xf0, 0x00, /*     ****                       *    ****         */
00357 0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /*     ****                       *    ****           *  *     *      */
00358
00359 /* Character (0x76): bbw=5, bbh=5, bbx=0, bby=0, width=6 */
00360 0x30, 0xc0, 0x00, 0xc0, 0x30, 0x00, /*     **        **              **    **           */
00361 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /*     **        **              **    **                *            */
00362
00363 /* Character (0x77): bbw=5, bbh=5, bbx=0, bby=0, width=6 */
00364 0xf0, 0x00, 0xe0, 0x00, 0xf0, 0x00, /*     ****             ***            ****         */
00365 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, /*     ****             ***            ****           *     *         */
00366
00367 /* Character (0x78): bbw=5, bbh=5, bbx=0, bby=0, width=6 */
00368 0x10, 0xa0, 0x40, 0xa0, 0x10, 0x00, /*     *        * *      *      * *    *            */
00369 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*     *        * *      *      * *    *           *           *      */
00370
00371 /* Character (0x79): bbw=5, bbh=7, bbx=0, bby=-2, width=6 */
00372 0xf0, 0x00, 0x00, 0x80, 0xf0, 0x00, /*     ****                       *    ****         */
00373 0x00, 0x05, 0x05, 0x04, 0x03, 0x00, /*     ****                       *    ****           * ** *  ***     */
00374
00375 /* Character (0x7a): bbw=5, bbh=5, bbx=0, bby=0, width=6 */
00376 0x10, 0x90, 0x50, 0x30, 0x10, 0x00, /*     *       *  *    * *     **      *            */
00377 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /*     *       *  *    * *     **      *           *  *  *  *  *      */
00378
00379 /* Character (0x7b): bbw=6, bbh=11, bbx=0, bby=-2, width=6 */
00380 0x20, 0x20, 0xde, 0x01, 0x01, 0x00, /*      *       *   **** ***       *                */
00381 0x00, 0x00, 0x03, 0x04, 0x04, 0x00, /*      *       *   **** ***       *                     **   *  *    */
00382
00383 /* Character (0x7c): bbw=1, bbh=9, bbx=2, bby=-1, width=6 */
00384 0x00, 0x00, 0xfe, 0x00, 0x00, 0x00, /*                  *******                         */
00385 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, /*                  *******                              **           */
00386
00387 /* Character (0x7d): bbw=6, bbh=11, bbx=0, bby=-2, width=6 */
00388 0x01, 0x01, 0xde, 0x20, 0x20, 0x00, /* *       *        **** **     *       *           */
00389 0x04, 0x04, 0x03, 0x00, 0x00, 0x00, /* *       *        **** **     *       *            *  ***           */
00390
00391 /* Character (0x7e): bbw=5, bbh=3, bbx=0, bby=2, width=6 */
00392 0x20, 0x10, 0x20, 0x40, 0x20, 0x00, /*      *      *        *        *      *           */
00393 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*      *      *        *        *      *                             */
00394
00395 /* Character (0xa0): bbw=0, bbh=0, bbx=0, bby=0, width=6 */
00396 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                  */
00397 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                    */
00398
00399 /* Character (0xa1): bbw=1, bbh=8, bbx=2, bby=0, width=6 */
00400 0x00, 0x00, 0xfa, 0x00, 0x00, 0x00, /*                  * *****                         */
00401 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /*                  * *****                              *            */
00402
00403 /* Character (0xa2): bbw=5, bbh=7, bbx=0, bby=-1, width=6 */
00404 0xe0, 0x10, 0xf8, 0x10, 0x10, 0x00, /*      ***    *      *****    *       *            */
00405 0x00, 0x01, 0x03, 0x01, 0x01, 0x00, /*      ***    *      *****    *       *              *  ** *  *      */
00406
00407 /* Character (0xa3): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00408 0x20, 0xfc, 0x22, 0x02, 0x84, 0x00, /*      *    ****** *   *   *        *    *         */
00409 0x01, 0x00, 0x01, 0x01, 0x00, 0x00, /*      *    ****** *   *   *        *    *        *     *  *         */
00410
00411 /* Character (0xa4): bbw=5, bbh=5, bbx=0, bby=0, width=6 */
00412 0x10, 0xe0, 0xa0, 0xe0, 0x10, 0x00, /*     *        ***     * *     ***    *            */
00413 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*     *        ***     * *     ***    *           *           *      */
00414
00415 /* Character (0xa5): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */
00416 0xa6, 0xa8, 0xf0, 0xa8, 0xa6, 0x00, /*  **  * *   * * *    ****   * * * **  * *         */
00417 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, /*  **  * *   * * *    ****   * * * **  * *              **           */
00418
00419 /* Character (0xa6): bbw=1, bbh=9, bbx=2, bby=-1, width=6 */
00420 0x00, 0x00, 0xde, 0x00, 0x00, 0x00, /*                  **** **                         */
00421 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, /*                  **** **                              **           */
00422
00423 /* Character (0xa7): bbw=4, bbh=9, bbx=1, bby=-1, width=6 */
00424 0x00, 0x3c, 0x52, 0x52, 0xe2, 0x00, /*           ****   *  * *  *  * *  *   ***         */
00425 0x00, 0x02, 0x02, 0x02, 0x01, 0x00, /*           ****   *  * *  *  * *  *   ***            *  *  * *      */
00426
00427 /* Character (0xa8): bbw=3, bbh=1, bbx=1, bby=7, width=6 */
00428 0x00, 0x02, 0x00, 0x02, 0x00, 0x00, /*          *               *                       */
00429 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*          *               *                                         */
00430
00431 /* Character (0xa9): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00432 0xf8, 0x24, 0x54, 0x04, 0xf8, 0x00, /*    *****  *  *    * * *   *        *****         */
00433 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*    *****  *  *    * * *   *        *****           *  *  *         */
00434
00435 /* Character (0xaa): bbw=4, bbh=6, bbx=1, bby=1, width=6 */
00436 0x00, 0x98, 0xa4, 0x94, 0xbc, 0x00, /*            **  *  *  * *  * *  *  **** *         */
00437 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*            **  *  *  * *  * *  *  **** *                           */
00438
00439 /* Character (0xab): bbw=6, bbh=5, bbx=0, bby=1, width=6 */
00440 0x20, 0x50, 0x88, 0x20, 0x50, 0x88, /*      *      * *    *   *     *      * *    *   * */
00441 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*      *      * *    *   *     *      * *    *   *                   */
00442
00443 /* Character (0xac): bbw=4, bbh=2, bbx=1, bby=2, width=6 */
00444 0x00, 0x20, 0x20, 0x20, 0x60, 0x00, /*              *       *       *       **          */
00445 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*              *       *       *       **                            */
00446
00447 /* Character (0xad): bbw=4, bbh=1, bbx=1, bby=3, width=6 */
00448 0x00, 0x20, 0x20, 0x20, 0x20, 0x00, /*              *       *       *       *           */
00449 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*              *       *       *       *                             */
00450
00451 /* Character (0xae): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00452 0xf8, 0x74, 0x14, 0x04, 0xf8, 0x00, /*    *****  * ***   * *     *        *****         */
00453 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*    *****  * ***   * *     *        *****           *  *  *         */
00454
00455 /* Character (0xaf): bbw=5, bbh=1, bbx=0, bby=7, width=6 */
00456 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, /*  *       *       *       *       *               */
00457 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*  *       *       *       *       *                                 */
00458
00459 /* Character (0xb0): bbw=3, bbh=3, bbx=1, bby=4, width=6 */
00460 0x00, 0x08, 0x14, 0x08, 0x00, 0x00, /*            *      * *      *                     */
00461 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*            *      * *      *                                       */
00462
00463 /* Character (0xb1): bbw=5, bbh=6, bbx=0, bby=0, width=6 */
00464 0x20, 0x20, 0xf8, 0x20, 0x20, 0x00, /*      *       *     *****     *       *           */
00465 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /*      *       *     *****     *       *          *  *  *  *  *      */
00466
00467 /* Character (0xb2): bbw=4, bbh=5, bbx=1, bby=3, width=6 */
00468 0x00, 0x24, 0x32, 0x2a, 0x24, 0x00, /*           *  *   *  **   * * *    *  *           */
00469 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *  *   *  **   * * *    *  *                             */
00470
00471 /* Character (0xb3): bbw=4, bbh=5, bbx=1, bby=3, width=6 */
00472 0x00, 0x22, 0x2a, 0x2a, 0x14, 0x00, /*          *   *   * * *   * * *    * *            */
00473 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*          *   *   * * *   * * *    * *                              */
00474
00475 /* Character (0xb4): bbw=2, bbh=2, bbx=2, bby=6, width=6 */
00476 0x00, 0x00, 0x04, 0x02, 0x00, 0x00, /*                   *      *                       */
00477 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                   *      *                                         */
00478
00479 /* Character (0xb5): bbw=5, bbh=6, bbx=0, bby=-1, width=6 */
00480 0xf0, 0x80, 0x00, 0x00, 0xf0, 0x00, /*     ****       *                    ****         */
00481 0x03, 0x00, 0x01, 0x01, 0x00, 0x00, /*     ****       *                    ****        **    *  *         */
00482
00483 /* Character (0xb6): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00484 0x18, 0x3c, 0xfc, 0x04, 0xfc, 0x00, /*    **     ****    ******  *       ******         */
00485 0x00, 0x00, 0x01, 0x00, 0x01, 0x00, /*    **     ****    ******  *       ******              *     *      */
00486
00487 /* Character (0xb7): bbw=1, bbh=1, bbx=2, bby=3, width=6 */
00488 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, /*                      *                           */
00489 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                      *                                             */
00490
00491 /* Character (0xb8): bbw=2, bbh=2, bbx=2, bby=-2, width=6 */
00492 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                  */
00493 0x00, 0x00, 0x04, 0x02, 0x00, 0x00, /*                                                         * *        */
00494
00495 /* Character (0xb9): bbw=3, bbh=5, bbx=1, bby=3, width=6 */
00496 0x00, 0x24, 0x3e, 0x20, 0x00, 0x00, /*           *  *   *****       *                   */
00497 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *  *   *****       *                                     */
00498
00499 /* Character (0xba): bbw=4, bbh=6, bbx=1, bby=1, width=6 */
00500 0x00, 0x98, 0xa4, 0xa4, 0x98, 0x00, /*            **  *  *  * *  *  * *   **  *         */
00501 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*            **  *  *  * *  *  * *   **  *                           */
00502
00503 /* Character (0xbb): bbw=6, bbh=5, bbx=0, bby=1, width=6 */
00504 0x88, 0x50, 0x20, 0x88, 0x50, 0x20, /*    *   *    * *      *     *   *    * *      *   */
00505 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*    *   *    * *      *     *   *    * *      *                     */
00506
00507 /* Character (0xbc): bbw=6, bbh=9, bbx=0, bby=-1, width=6 */
00508 0x24, 0x3e, 0x20, 0x80, 0x40, 0xe0, /*   *  *   *****       *         *      *      *** */
00509 0x00, 0x00, 0x01, 0x01, 0x01, 0x03, /*   *  *   *****       *         *      *      ***      *  *  *  **  */
00510
00511 /* Character (0xbd): bbw=6, bbh=9, bbx=0, bby=-1, width=6 */
00512 0x24, 0x3e, 0x20, 0x40, 0x20, 0xc0, /*   *  *   *****       *        *      *        ** */
00513 0x00, 0x00, 0x00, 0x02, 0x03, 0x02, /*   *  *   *****       *        *      *        **          * **  *  */
00514
00515 /* Character (0xbe): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */
00516 0x22, 0x2a, 0x94, 0x40, 0xe0, 0x00, /*  *   *   * * *    * *  *      *      ***         */
00517 0x00, 0x01, 0x01, 0x01, 0x03, 0x00, /*  *   *   * * *    * *  *      *      ***           *  *  *  **     */
00518
00519 /* Character (0xbf): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00520 0xc0, 0x20, 0x14, 0x00, 0x80, 0x00, /*       **     *    * *                  *         */
00521 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*       **     *    * *                  *           *  *  *         */
00522
00523 /* Character (0xc0): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00524 0xf8, 0x25, 0x26, 0x24, 0xf8, 0x00, /*    ****** *  *   **  *    *  *     *****         */
00525 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*    ****** *  *   **  *    *  *     *****        *           *      */
00526
00527 /* Character (0xc1): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00528 0xf8, 0x24, 0x26, 0x25, 0xf8, 0x00, /*    *****  *  *   **  *  * *  *     *****         */
00529 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*    *****  *  *   **  *  * *  *     *****        *           *      */
00530
00531 /* Character (0xc2): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00532 0xf0, 0x4a, 0x49, 0x4a, 0xf0, 0x00, /*     **** * *  * *  *  *  * *  *     ****         */
00533 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*     **** * *  * *  *  *  * *  *     ****        *           *      */
00534
00535 /* Character (0xc3): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00536 0xf2, 0x49, 0x4b, 0x4a, 0xf1, 0x00, /*  *  *****  *  * ** *  *  * *  * *   ****         */
00537 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*  *  *****  *  * ** *  *  * *  * *   ****        *           *      */
00538
00539 /* Character (0xc4): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00540 0xf8, 0x25, 0x24, 0x25, 0xf8, 0x00, /*    ****** *  *    *  *  * *  *     *****         */
00541 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*    ****** *  *    *  *  * *  *     *****        *           *      */
00542
00543 /* Character (0xc5): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00544 0xf0, 0x4a, 0x4d, 0x4a, 0xf0, 0x00, /*     **** * *  * * **  *  * *  *     ****         */
00545 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*     **** * *  * * **  *  * *  *     ****        *           *      */
00546
00547 /* Character (0xc6): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00548 0xf8, 0x24, 0xfc, 0x24, 0x04, 0x00, /*    *****  *  *    ******  *  *    *              */
00549 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, /*    *****  *  *    ******  *  *    *             *     *  *  *      */
00550
00551 /* Character (0xc7): bbw=5, bbh=9, bbx=0, bby=-2, width=6 */
00552 0xf8, 0x04, 0x04, 0x04, 0x88, 0x00, /*    *****  *       *       *        *   *         */
00553 0x00, 0x05, 0x03, 0x01, 0x00, 0x00, /*    *****  *       *       *        *   *           * *** *         */
00554
00555 /* Character (0xc8): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00556 0xfc, 0x25, 0x26, 0x24, 0x04, 0x00, /*   ******* *  *   **  *    *  *    *              */
00557 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /*   ******* *  *   **  *    *  *    *             *  *  *  *  *      */
00558
00559 /* Character (0xc9): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00560 0xfc, 0x24, 0x26, 0x25, 0x04, 0x00, /*   ******  *  *   **  *  * *  *    *              */
00561 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /*   ******  *  *   **  *  * *  *    *             *  *  *  *  *      */
00562
00563 /* Character (0xca): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00564 0xfc, 0x26, 0x25, 0x26, 0x04, 0x00, /*   ****** **  *  * *  *   **  *    *              */
00565 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /*   ****** **  *  * *  *   **  *    *             *  *  *  *  *      */
00566
00567 /* Character (0xcb): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00568 0xfc, 0x25, 0x24, 0x25, 0x04, 0x00, /*   ******* *  *    *  *  * *  *    *              */
00569 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /*   ******* *  *    *  *  * *  *    *             *  *  *  *  *      */
00570
00571 /* Character (0xcc): bbw=3, bbh=9, bbx=1, bby=0, width=6 */
00572 0x00, 0x08, 0xf9, 0x0a, 0x00, 0x00, /*            *    *  ***** * *                     */
00573 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*            *    *  ***** * *                       *  *  *         */
00574
00575 /* Character (0xcd): bbw=3, bbh=9, bbx=1, bby=0, width=6 */
00576 0x00, 0x0a, 0xf9, 0x08, 0x00, 0x00, /*          * *    *  *****   *                     */
00577 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*          * *    *  *****   *                       *  *  *         */
00578
00579 /* Character (0xce): bbw=3, bbh=9, bbx=1, bby=0, width=6 */
00580 0x00, 0x0a, 0xf9, 0x0a, 0x00, 0x00, /*          * *    *  ***** * *                     */
00581 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*          * *    *  ***** * *                       *  *  *         */
00582
00583 /* Character (0xcf): bbw=3, bbh=9, bbx=1, bby=0, width=6 */
00584 0x00, 0x05, 0xfc, 0x05, 0x00, 0x00, /*         * *       ******* *                      */
00585 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*         * *       ******* *                        *  *  *         */
00586
00587 /* Character (0xd0): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00588 0x20, 0xfc, 0x24, 0x04, 0xf8, 0x00, /*      *    ******  *  *    *        *****         */
00589 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*      *    ******  *  *    *        *****           *  *  *         */
00590
00591 /* Character (0xd1): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00592 0xfe, 0x09, 0x13, 0x22, 0xfd, 0x00, /*  ********  *    **  *    *   *  * ******         */
00593 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*  ********  *    **  *    *   *  * ******        *           *      */
00594
00595 /* Character (0xd2): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00596 0xf8, 0x05, 0x06, 0x04, 0xf8, 0x00, /*    ****** *      **       *        *****         */
00597 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*    ****** *      **       *        *****           *  *  *         */
00598
00599 /* Character (0xd3): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00600 0xf8, 0x04, 0x06, 0x05, 0xf8, 0x00, /*    *****  *      **     * *        *****         */
00601 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*    *****  *      **     * *        *****           *  *  *         */
00602
00603 /* Character (0xd4): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00604 0xf0, 0x0a, 0x09, 0x0a, 0xf0, 0x00, /*     **** * *    *  *     * *        ****         */
00605 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*     **** * *    *  *     * *        ****           *  *  *         */
00606
00607 /* Character (0xd5): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00608 0xfa, 0x05, 0x07, 0x06, 0xf9, 0x00, /*  * ****** *     ***      **     *  *****         */
00609 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*  * ****** *     ***      **     *  *****           *  *  *         */
00610
00611 /* Character (0xd6): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00612 0xf8, 0x05, 0x04, 0x05, 0xf8, 0x00, /*    ****** *       *     * *        *****         */
00613 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*    ****** *       *     * *        *****           *  *  *         */
00614
00615 /* Character (0xd7): bbw=5, bbh=5, bbx=0, bby=1, width=6 */
00616 0x88, 0x50, 0x20, 0x50, 0x88, 0x00, /*    *   *    * *      *      * *    *   *         */
00617 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*    *   *    * *      *      * *    *   *                           */
00618
00619 /* Character (0xd8): bbw=6, bbh=6, bbx=0, bby=1, width=6 */
00620 0xf8, 0xc4, 0xa4, 0x94, 0x78, 0x04, /*    *****  *   **  *  * *  * *  *   ****   *      */
00621 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*    *****  *   **  *  * *  * *  *   ****   *                        */
00622
00623 /* Character (0xd9): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00624 0xfc, 0x01, 0x02, 0x00, 0xfc, 0x00, /*   *******        *                ******         */
00625 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*   *******        *                ******           *  *  *         */
00626
00627 /* Character (0xda): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00628 0xfc, 0x00, 0x02, 0x01, 0xfc, 0x00, /*   ******         *      *         ******         */
00629 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*   ******         *      *         ******           *  *  *         */
00630
00631 /* Character (0xdb): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00632 0xfc, 0x00, 0x02, 0x01, 0xfc, 0x00, /*   ******         *      *         ******         */
00633 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*   ******         *      *         ******           *  *  *         */
00634
00635 /* Character (0xdc): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00636 0xfc, 0x01, 0x00, 0x01, 0xfc, 0x00, /*   *******               *         ******         */
00637 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*   *******               *         ******           *  *  *         */
00638
00639 /* Character (0xdd): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00640 0x1c, 0x20, 0xc2, 0x21, 0x1c, 0x00, /*   ***        *   *    ***    *    ***            */
00641 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /*   ***        *   *    ***    *    ***                 *            */
00642
00643 /* Character (0xde): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00644 0xfc, 0x48, 0x48, 0x48, 0x30, 0x00, /*   ******   *  *    *  *    *  *     **           */
00645 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, /*   ******   *  *    *  *    *  *     **          *                  */
00646
00647 /* Character (0xdf): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */
00648 0xf8, 0x04, 0x02, 0x32, 0xcc, 0x00, /*    *****  *      *       *  **    **  **         */
00649 0x03, 0x00, 0x01, 0x01, 0x00, 0x00, /*    *****  *      *       *  **    **  **        **    *  *         */
00650
00651 /* Character (0xe0): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00652 0x80, 0x50, 0x52, 0x54, 0xe0, 0x00, /*        *    * *  *  * *   * * *      ***         */
00653 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /*        *    * *  *  * *   * * *      ***           *  *  *  *      */
00654
00655 /* Character (0xe1): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00656 0x80, 0x50, 0x54, 0x52, 0xe0, 0x00, /*        *    * *   * * *  *  * *      ***         */
00657 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /*        *    * *   * * *  *  * *      ***           *  *  *  *      */
00658
00659 /* Character (0xe2): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00660 0x80, 0x54, 0x52, 0x54, 0xe0, 0x00, /*        *  * * *  *  * *   * * *      ***         */
00661 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /*        *  * * *  *  * *   * * *      ***           *  *  *  *      */
00662
00663 /* Character (0xe3): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00664 0x84, 0x52, 0x56, 0x54, 0xe2, 0x00, /*   *    * *  * *  ** * *   * * *  *   ***         */
00665 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /*   *    * *  * *  ** * *   * * *  *   ***           *  *  *  *      */
00666
00667 /* Character (0xe4): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00668 0x80, 0x54, 0x50, 0x54, 0xe0, 0x00, /*        *  * * *     * *   * * *      ***         */
00669 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /*        *  * * *     * *   * * *      ***           *  *  *  *      */
00670
00671 /* Character (0xe5): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00672 0x80, 0x54, 0x5a, 0x54, 0xe0, 0x00, /*        *  * * *  * ** *   * * *      ***         */
00673 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /*        *  * * *  * ** *   * * *      ***           *  *  *  *      */
00674
00675 /* Character (0xe6): bbw=5, bbh=5, bbx=0, bby=0, width=6 */
00676 0xe0, 0x10, 0xf0, 0x50, 0x60, 0x00, /*      ***    *       ****    * *      **          */
00677 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /*      ***    *       ****    * *      **            *  *  *  *      */
00678
00679 /* Character (0xe7): bbw=5, bbh=7, bbx=0, bby=-2, width=6 */
00680 0xe0, 0x10, 0x10, 0x10, 0x10, 0x00, /*      ***    *       *       *       *            */
00681 0x00, 0x05, 0x03, 0x01, 0x01, 0x00, /*      ***    *       *       *       *              * *** *  *      */
00682
00683 /* Character (0xe8): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00684 0xe0, 0x52, 0x54, 0x50, 0x60, 0x00, /*      *** *  * *   * * *     * *      **          */
00685 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /*      *** *  * *   * * *     * *      **            *  *  *  *      */
00686
00687 /* Character (0xe9): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00688 0xe0, 0x50, 0x54, 0x52, 0x60, 0x00, /*      ***    * *   * * *  *  * *      **          */
00689 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /*      ***    * *   * * *  *  * *      **            *  *  *  *      */
00690
00691 /* Character (0xea): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00692 0xe0, 0x54, 0x52, 0x54, 0x60, 0x00, /*      ***  * * *  *  * *   * * *      **          */
00693 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /*      ***  * * *  *  * *   * * *      **            *  *  *  *      */
00694
00695 /* Character (0xeb): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00696 0xe0, 0x54, 0x50, 0x54, 0x60, 0x00, /*      ***  * * *     * *   * * *      **          */
00697 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /*      ***  * * *     * *   * * *      **            *  *  *  *      */
00698
00699 /* Character (0xec): bbw=2, bbh=8, bbx=2, bby=0, width=6 */
00700 0x00, 0x00, 0xf2, 0x04, 0x00, 0x00, /*                  *  ****  *                      */
00701 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /*                  *  ****  *                           *            */
00702
00703 /* Character (0xed): bbw=2, bbh=8, bbx=1, bby=0, width=6 */
00704 0x00, 0x04, 0xf2, 0x00, 0x00, 0x00, /*           *      *  ****                         */
00705 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /*           *      *  ****                              *            */
00706
00707 /* Character (0xee): bbw=3, bbh=8, bbx=1, bby=0, width=6 */
00708 0x00, 0x04, 0xf2, 0x04, 0x00, 0x00, /*           *      *  ****  *                      */
00709 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /*           *      *  ****  *                           *            */
00710
00711 /* Character (0xef): bbw=3, bbh=7, bbx=1, bby=0, width=6 */
00712 0x00, 0x04, 0xf0, 0x04, 0x00, 0x00, /*           *         ****  *                      */
00713 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /*           *         ****  *                           *            */
00714
00715 /* Character (0xf0): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00716 0xe0, 0x16, 0x16, 0x18, 0xf0, 0x00, /*      *** ** *    ** *      **       ****         */
00717 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*      *** ** *    ** *      **       ****           *  *  *         */
00718
00719 /* Character (0xf1): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00720 0xf4, 0x12, 0x14, 0x12, 0xe0, 0x00, /*   * **** *  *     * *    *  *        ***         */
00721 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /*   * **** *  *     * *    *  *        ***        *           *      */
00722
00723 /* Character (0xf2): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00724 0xe0, 0x12, 0x14, 0x10, 0xe0, 0x00, /*      *** *  *     * *       *        ***         */
00725 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*      *** *  *     * *       *        ***           *  *  *         */
00726
00727 /* Character (0xf3): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00728 0xe0, 0x10, 0x14, 0x12, 0xe0, 0x00, /*      ***    *     * *    *  *        ***         */
00729 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*      ***    *     * *    *  *        ***           *  *  *         */
00730
00731 /* Character (0xf4): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00732 0xe0, 0x14, 0x12, 0x14, 0xe0, 0x00, /*      ***  * *    *  *     * *        ***         */
00733 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*      ***  * *    *  *     * *        ***           *  *  *         */
00734
00735 /* Character (0xf5): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00736 0xe4, 0x12, 0x14, 0x12, 0xe0, 0x00, /*   *  *** *  *     * *    *  *        ***         */
00737 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*   *  *** *  *     * *    *  *        ***           *  *  *         */
00738
00739 /* Character (0xf6): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00740 0xe0, 0x14, 0x10, 0x14, 0xe0, 0x00, /*      ***  * *       *     * *        ***         */
00741 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*      ***  * *       *     * *        ***           *  *  *         */
00742
00743 /* Character (0xf7): bbw=5, bbh=5, bbx=0, bby=1, width=6 */
00744 0x20, 0x20, 0xa8, 0x20, 0x20, 0x00, /*      *       *     * * *     *       *           */
00745 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*      *       *     * * *     *       *                             */
00746
00747 /* Character (0xf8): bbw=5, bbh=5, bbx=0, bby=0, width=6 */
00748 0xe0, 0x90, 0x50, 0x30, 0xe0, 0x00, /*      ***    *  *    * *     **       ***         */
00749 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /*      ***    *  *    * *     **       ***           *  *  *         */
00750
00751 /* Character (0xf9): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00752 0xf0, 0x02, 0x04, 0x80, 0xf0, 0x00, /*     **** *        *            *    ****         */
00753 0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /*     **** *        *            *    ****           *  *     *      */
00754
00755 /* Character (0xfa): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00756 0xf0, 0x00, 0x04, 0x82, 0xf0, 0x00, /*     ****          *      *     *    ****         */
00757 0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /*     ****          *      *     *    ****           *  *     *      */
00758
00759 /* Character (0xfb): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00760 0xf0, 0x04, 0x02, 0x84, 0xf0, 0x00, /*     ****  *      *        *    *    ****         */
00761 0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /*     ****  *      *        *    *    ****           *  *     *      */
00762
00763 /* Character (0xfc): bbw=5, bbh=7, bbx=0, bby=0, width=6 */
00764 0xf0, 0x04, 0x00, 0x84, 0xf0, 0x00, /*     ****  *               *    *    ****         */
00765 0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /*     ****  *               *    *    ****           *  *     *      */
00766
00767 /* Character (0xfd): bbw=5, bbh=10, bbx=0, bby=-2, width=6 */
00768 0xf0, 0x00, 0x04, 0x82, 0xf0, 0x00, /*     ****          *      *     *    ****         */
00769 0x00, 0x05, 0x05, 0x04, 0x03, 0x00, /*     ****          *      *     *    ****           * ** *  ***     */
00770
00771 /* Character (0xfe): bbw=5, bbh=9, bbx=0, bby=-2, width=6 */
00772 0xfc, 0x10, 0x10, 0x10, 0xe0, 0x00, /*   ******    *       *       *        ***         */
00773 0x07, 0x01, 0x01, 0x01, 0x00, 0x00, /*   ******    *       *       *        ***        ****  *  *         */
00774
00775 /* Character (0xff): bbw=5, bbh=9, bbx=0, bby=-2, width=6 */
00776 0xf0, 0x04, 0x00, 0x84, 0xf0, 0x00, /*     ****  *               *    *    ****         */
00777 0x00, 0x05, 0x05, 0x04, 0x03, 0x00, /*     ****  *               *    *    ****           * ** *  ***     */
00778 };
00779
00780 /* Font structure definition. */
00781 EXTERN_CONST Font font_gohu =
00782 {
00783     /* .glyph  = */ font_gohu_glyphs,
00784     /* .name   =    "gohu", */
00785     /* .width  = */ 6,
00786     /* .height = */ 11,
00787     /* .ascent =    9, */
00788     /* .first  = */ 32,
00789     /* .last   = */ 255,
00790     /* .offset = */ NULL,
00791     /* .width  = */ NULL,
00792 };


BeRTOS: gpio_lm3s.c File Reference

  • cpu
  • cortex-m3
  • drv
Functions
gpio_lm3s.c File Reference

LM3S1968 GPIO control interface. More...

#include "gpio_lm3s.h"
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <io/lm3s.h>

Go to the source code of this file.

Functions

int lm3s_gpioPinConfig (uint32_t port, uint8_t pins, uint32_t mode, uint32_t strength, uint32_t type)
Configure a GPIO pin.

Detailed Description

LM3S1968 GPIO control interface.

Author:
Andrea Righi <arighi@develer.com>

Definition in file gpio_lm3s.c.

Function Documentation

int lm3s_gpioPinConfig | ( | uint32_t | port,
 |  | uint8_t | pins,
 |  | uint32_t | mode,
 |  | uint32_t | strength,
 |  | uint32_t | type
 | ) |  |

Configure a GPIO pin.

Parameters:
port | Base address of the GPIO port
pins | Bit-packed representation of the pin(s)
mode | Pin(s) configuration mode
strength | Output drive strength
type | Pin(s) type

Return 0 on success, otherwise a negative value.

Definition at line 191 of file gpio_lm3s.c.


BeRTOS: gpio_lm3s.c Source File

  • cpu
  • cortex-m3
  • drv
gpio_lm3s.c
Go to the documentation of this file.
00001
00039 #include "gpio_lm3s.h"
00040
00041 #include <cfg/compiler.h>
00042 #include <cfg/debug.h>
00043
00044 #include <io/lm3s.h>
00045
00046
00047 /* Set the pin(s) direction and mode */
00048 INLINE int lm3s_gpioPinConfigMode(uint32_t port, uint8_t pins, uint32_t mode)
00049 {
00050     if (mode == GPIO_DIR_MODE_IN)
00051     {
00052         HWREG(port + GPIO_O_DIR)   &= ~pins;
00053         HWREG(port + GPIO_O_AFSEL) &= ~pins;
00054     }
00055     else if (mode == GPIO_DIR_MODE_OUT)
00056     {
00057         HWREG(port + GPIO_O_DIR)   |= pins;
00058         HWREG(port + GPIO_O_AFSEL) &= ~pins;
00059     }
00060     else if (mode == GPIO_DIR_MODE_HW)
00061     {
00062         HWREG(port + GPIO_O_DIR)   &= ~pins;
00063         HWREG(port + GPIO_O_AFSEL) |= pins;
00064     }
00065     else
00066     {
00067         ASSERT(0);
00068         return -1;
00069     }
00070     return 0;
00071 }
00072
00073 /* Set the pin(s) output strength */
00074 INLINE int
00075 lm3s_gpioPinConfigStrength(uint32_t port, uint8_t pins, uint32_t strength)
00076 {
00077     if (strength == GPIO_STRENGTH_2MA)
00078     {
00079         HWREG(port + GPIO_O_DR2R) |= pins;
00080         HWREG(port + GPIO_O_DR4R) &= ~pins;
00081         HWREG(port + GPIO_O_DR8R) &= ~pins;
00082         HWREG(port + GPIO_O_SLR)  &= ~pins;
00083     }
00084     else if (strength == GPIO_STRENGTH_4MA)
00085     {
00086         HWREG(port + GPIO_O_DR2R) &= ~pins;
00087         HWREG(port + GPIO_O_DR4R) |= pins;
00088         HWREG(port + GPIO_O_DR8R) &= ~pins;
00089         HWREG(port + GPIO_O_SLR)  &= ~pins;
00090     }
00091     else if (strength == GPIO_STRENGTH_8MA)
00092     {
00093         HWREG(port + GPIO_O_DR2R) &= ~pins;
00094         HWREG(port + GPIO_O_DR4R) &= ~pins;
00095         HWREG(port + GPIO_O_DR8R) |= pins;
00096         HWREG(port + GPIO_O_SLR)  &= ~pins;
00097     }
00098     else if (strength == GPIO_STRENGTH_8MA_SC)
00099     {
00100         HWREG(port + GPIO_O_DR2R) &= ~pins;
00101         HWREG(port + GPIO_O_DR4R) &= ~pins;
00102         HWREG(port + GPIO_O_DR8R) |= pins;
00103         HWREG(port + GPIO_O_SLR)  |= pins;
00104     }
00105     else
00106     {
00107         ASSERT(0);
00108         return -1;
00109     }
00110     return 0;
00111 }
00112
00113 /* Set the pin(s) type */
00114 INLINE int lm3s_gpioPinConfigType(uint32_t port, uint8_t pins, uint32_t type)
00115 {
00116     if (type == GPIO_PIN_TYPE_STD)
00117     {
00118         HWREG(port + GPIO_O_ODR)   &= ~pins;
00119         HWREG(port + GPIO_O_PUR)   &= ~pins;
00120         HWREG(port + GPIO_O_PDR)   &= ~pins;
00121         HWREG(port + GPIO_O_DEN)   |= pins;
00122         HWREG(port + GPIO_O_AMSEL) &= ~pins;
00123     }
00124     else if (type == GPIO_PIN_TYPE_STD_WPU)
00125     {
00126         HWREG(port + GPIO_O_ODR)   &= ~pins;
00127         HWREG(port + GPIO_O_PUR)   |= pins;
00128         HWREG(port + GPIO_O_PDR)   &= ~pins;
00129         HWREG(port + GPIO_O_DEN)   |= pins;
00130         HWREG(port + GPIO_O_AMSEL) &= ~pins;
00131     }
00132     else if (type == GPIO_PIN_TYPE_STD_WPD)
00133     {
00134         HWREG(port + GPIO_O_ODR)   &= ~pins;
00135         HWREG(port + GPIO_O_PUR)   &= ~pins;
00136         HWREG(port + GPIO_O_PDR)   |= pins;
00137         HWREG(port + GPIO_O_DEN)   |= pins;
00138         HWREG(port + GPIO_O_AMSEL) &= ~pins;
00139     }
00140     else if (type == GPIO_PIN_TYPE_OD)
00141     {
00142         HWREG(port + GPIO_O_ODR)   |= pins;
00143         HWREG(port + GPIO_O_PUR)   &= ~pins;
00144         HWREG(port + GPIO_O_PDR)   &= ~pins;
00145         HWREG(port + GPIO_O_DEN)   |= pins;
00146         HWREG(port + GPIO_O_AMSEL) &= ~pins;
00147     }
00148     else if (type == GPIO_PIN_TYPE_OD_WPU)
00149     {
00150         HWREG(port + GPIO_O_ODR)   |= pins;
00151         HWREG(port + GPIO_O_PUR)   |= pins;
00152         HWREG(port + GPIO_O_PDR)   &= ~pins;
00153         HWREG(port + GPIO_O_DEN)   |= pins;
00154         HWREG(port + GPIO_O_AMSEL) &= ~pins;
00155     }
00156     else if (type == GPIO_PIN_TYPE_OD_WPD)
00157     {
00158         HWREG(port + GPIO_O_ODR)   |= pins;
00159         HWREG(port + GPIO_O_PUR)   &= pins;
00160         HWREG(port + GPIO_O_PDR)   |= pins;
00161         HWREG(port + GPIO_O_DEN)   |= pins;
00162         HWREG(port + GPIO_O_AMSEL) &= ~pins;
00163     }
00164     else if (type == GPIO_PIN_TYPE_ANALOG)
00165     {
00166         HWREG(port + GPIO_O_ODR)   &= ~pins;
00167         HWREG(port + GPIO_O_PUR)   &= ~pins;
00168         HWREG(port + GPIO_O_PDR)   &= ~pins;
00169         HWREG(port + GPIO_O_DEN)   &= ~pins;
00170         HWREG(port + GPIO_O_AMSEL) |= pins;
00171     }
00172     else
00173     {
00174         ASSERT(0);
00175         return -1;
00176     }
00177     return 0;
00178 }
00179
00191 int lm3s_gpioPinConfig(uint32_t port, uint8_t pins,
00192         uint32_t mode, uint32_t strength, uint32_t type)
00193 {
00194     int ret;
00195
00196     ret = lm3s_gpioPinConfigMode(port, pins, mode);
00197     if (UNLIKELY(ret < 0))
00198         return ret;
00199     ret = lm3s_gpioPinConfigStrength(port, pins, strength);
00200     if (UNLIKELY(ret < 0))
00201         return ret;
00202     ret = lm3s_gpioPinConfigType(port, pins, type);
00203     if (UNLIKELY(ret < 0))
00204         return ret;
00205     return 0;
00206 }


BeRTOS: gpio_lm3s.h File Reference

  • cpu
  • cortex-m3
  • drv
Functions
gpio_lm3s.h File Reference

LM3S1968 GPIO control interface. More...

#include <io/lm3s.h>

Go to the source code of this file.

Enumerations

enum
GPIO mode.
enum
GPIO strenght.
enum
GPIO type.

Functions

int lm3s_gpioPinConfig (uint32_t port, uint8_t pins, uint32_t mode, uint32_t strength, uint32_t type)
Configure a GPIO pin.

Detailed Description

LM3S1968 GPIO control interface.

Definition in file gpio_lm3s.h.

Function Documentation

int lm3s_gpioPinConfig | ( | uint32_t | port,
 |  | uint8_t | pins,
 |  | uint32_t | mode,
 |  | uint32_t | strength,
 |  | uint32_t | type
 | ) |  |

Configure a GPIO pin.

Parameters:
port | Base address of the GPIO port
pins | Bit-packed representation of the pin(s)
mode | Pin(s) configuration mode
strength | Output drive strength
type | Pin(s) type

Return 0 on success, otherwise a negative value.

Definition at line 191 of file gpio_lm3s.c.


BeRTOS: gpio_lm3s.h Source File

  • cpu
  • cortex-m3
  • drv
gpio_lm3s.h
Go to the documentation of this file.
00001
00036 #ifndef GPIO_LM3S_H
00037 #define GPIO_LM3S_H
00038
00039 #include <io/lm3s.h>
00040
00044 /*\{*/
00045 enum
00046 {
00047     GPIO_DIR_MODE_IN = 0, //< Pin is a GPIO input
00048     GPIO_DIR_MODE_OUT,    //< Pin is a GPIO output
00049     GPIO_DIR_MODE_HW,     //< Pin is a peripheral function
00050 };
00051 /*\}*/
00052
00056 /*\{*/
00057 enum
00058 {
00059     GPIO_STRENGTH_2MA = 0, //< 2mA drive strength
00060     GPIO_STRENGTH_4MA,     //< 4mA drive strength
00061     GPIO_STRENGTH_8MA,     //< 8mA drive strength
00062     GPIO_STRENGTH_8MA_SC,  //< 8mA drive with slew rate control
00063 };
00064 /*\}*/
00065
00069 /*\{*/
00070 enum
00071 {
00072     GPIO_PIN_TYPE_ANALOG = 0, //< Analog comparator
00073     GPIO_PIN_TYPE_STD,        //< Push-pull
00074     GPIO_PIN_TYPE_STD_WPU,    //< Push-pull with weak pull-up
00075     GPIO_PIN_TYPE_STD_WPD,    //< Push-pull with weak pull-down
00076     GPIO_PIN_TYPE_OD,         //< Open-drain
00077     GPIO_PIN_TYPE_OD_WPU,     //< Open-drain with weak pull-up
00078     GPIO_PIN_TYPE_OD_WPD,     //< Open-drain with weak pull-down
00079 };
00080 /*\}*/
00081
00082 /* Write a value to the specified pin(s) */
00083 INLINE void lm3s_gpioPinWrite(uint32_t port, uint8_t pins, uint8_t val)
00084 {
00085     HWREG(port + GPIO_O_DATA + (pins << 2)) = val;
00086 }
00087
00088 /* Read a value from the specified pin(s) */
00089 INLINE uint32_t lm3s_gpioPinRead(uint32_t port, uint8_t pins)
00090 {
00091     return HWREG(port + GPIO_O_DATA + (pins << 2));
00092 }
00093
00094 int lm3s_gpioPinConfig(uint32_t port, uint8_t pins,
00095         uint32_t mode, uint32_t strength, uint32_t type);
00096
00097 #endif /* GPIO_LM3S_H */


BeRTOS: gpio_stm32.c File Reference

  • cpu
  • cortex-m3
  • drv
Functions
gpio_stm32.c File Reference

STM32 GPIO control interface. More...

#include "gpio_stm32.h"
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <io/stm32.h>

Go to the source code of this file.

Functions

int stm32_gpioPinConfig (struct stm32_gpio *base, uint16_t pins, uint8_t mode, uint8_t speed)
Configure a GPIO pin.

Detailed Description

STM32 GPIO control interface.

Author:
Andrea Righi <arighi@develer.com>

Definition in file gpio_stm32.c.

Function Documentation

int stm32_gpioPinConfig | ( | struct stm32_gpio * | base,
 |  | uint16_t | pins,
 |  | uint8_t | mode,
 |  | uint8_t | speed
 | ) |  |

Configure a GPIO pin.

Initialize a GPIO peripheral configuration.

Parameters:
base | Base address of the GPIO port
pins | Bit-packed representation of the pin(s)
mode | Pin(s) configuration mode
speed | Output drive speed

Return 0 on success, otherwise a negative value.

Definition at line 56 of file gpio_stm32.c.


BeRTOS: gpio_stm32.c Source File

  • cpu
  • cortex-m3
  • drv
gpio_stm32.c
Go to the documentation of this file.
00001
00038 #include "gpio_stm32.h"
00039
00040 #include <cfg/compiler.h>
00041 #include <cfg/debug.h>
00042
00043 #include <io/stm32.h>
00044
00045
00056 int stm32_gpioPinConfig(struct stm32_gpio *base,
00057             uint16_t pins, uint8_t mode, uint8_t speed)
00058 {
00059     uint32_t reg_mode = mode & 0x0f;
00060     int i;
00061
00062     if (mode & 0x10)
00063         reg_mode |= speed;
00064
00065     if (pins & 0xff)
00066     {
00067         uint32_t reg = base->CRL;
00068
00069         for (i = 0; i < 8; i++)
00070         {
00071             uint32_t pos = 1 << i;
00072
00073             if (pins & pos)
00074             {
00075                 pos = i << 2;
00076                 reg &= ~(0x0f << pos);
00077                 reg |= reg_mode << pos;
00078
00079                 if (mode == GPIO_MODE_IPD)
00080                     base->BRR = 0x01 << i;
00081                 if (mode == GPIO_MODE_IPU)
00082                     base->BSRR = 0x01 << i;
00083             }
00084         }
00085         base->CRL = reg;
00086     }
00087     if (pins > 0xff)
00088     {
00089         uint32_t reg = base->CRH;
00090
00091         for (i = 0; i < 8; i++)
00092         {
00093             uint32_t pos = 1 << (i + 8);
00094
00095             if (pins & pos)
00096             {
00097                 pos = i << 2;
00098                 reg &= ~(0x0f << pos);
00099                 reg |= reg_mode << pos;
00100
00101                 if (mode == GPIO_MODE_IPD)
00102                     base->BRR = 0x01 << (i + 8);
00103                 if (mode == GPIO_MODE_IPU)
00104                     base->BSRR = 0x01 << (i + 8);
00105             }
00106         }
00107         base->CRH = reg;
00108     }
00109     return 0;
00110 }


BeRTOS: gpio_stm32.h File Reference

  • cpu
  • cortex-m3
  • drv
Functions
gpio_stm32.h File Reference

STM32 GPIO control interface. More...

#include <io/stm32.h>

Go to the source code of this file.

Enumerations

enum
GPIO mode.
enum
GPIO speed.

Functions

void | stm32_gpioPinWrite (struct stm32_gpio *base, uint16_t pins, bool val)
Write a value to the specified pin(s)
uint16_t | stm32_gpioPinRead (struct stm32_gpio *base, uint16_t pins)
Read a value from the specified pin(s)
int | stm32_gpioPinConfig (struct stm32_gpio *base, uint16_t pins, uint8_t mode, uint8_t speed)
Initialize a GPIO peripheral configuration.

Detailed Description

STM32 GPIO control interface.

Definition in file gpio_stm32.h.

Function Documentation

int stm32_gpioPinConfig | ( | struct stm32_gpio * | base,
 |  | uint16_t | pins,
 |  | uint8_t | mode,
 |  | uint8_t | speed
 | ) |  |

Initialize a GPIO peripheral configuration.

Parameters:
base | gpio register address
pins | mask of pins that we want to configure
mode | select the behaviour of selected pins
speed | clock frequency for selected gpio ports

Initialize a GPIO peripheral configuration.

Parameters:
base | Base address of the GPIO port
pins | Bit-packed representation of the pin(s)
mode | Pin(s) configuration mode
speed | Output drive speed

Return 0 on success, otherwise a negative value.

Definition at line 56 of file gpio_stm32.c.

uint16_t stm32_gpioPinRead | ( | struct stm32_gpio * | base,
 |  | uint16_t | pins
 | ) |  | [inline]

Read a value from the specified pin(s)

Parameters:
base | gpio register address
pins | mask of pins that we want read

Definition at line 91 of file gpio_stm32.h.

void stm32_gpioPinWrite | ( | struct stm32_gpio * | base,
 |  | uint16_t | pins,
 |  | bool | val
 | ) |  | [inline]

Write a value to the specified pin(s)

Parameters:
base | gpio register address
pins | mask of pins that we want set or clear
val | true to set selected pins of false to clear they.

Definition at line 77 of file gpio_stm32.h.


BeRTOS: gpio_stm32.h Source File

  • cpu
  • cortex-m3
  • drv
gpio_stm32.h
Go to the documentation of this file.
00001
00036 #ifndef GPIO_STM32_H
00037 #define GPIO_STM32_H
00038
00039 #include <io/stm32.h>
00040
00045 enum
00046 {
00047     GPIO_MODE_AIN = 0x0,
00048     GPIO_MODE_IN_FLOATING = 0x04,
00049     GPIO_MODE_IPD = 0x28,
00050     GPIO_MODE_IPU = 0x48,
00051     GPIO_MODE_OUT_OD = 0x14,
00052     GPIO_MODE_OUT_PP = 0x10,
00053     GPIO_MODE_AF_OD = 0x1C,
00054     GPIO_MODE_AF_PP = 0x18,
00055 };
00056 /*\}*/
00057
00062 enum
00063 {
00064     GPIO_SPEED_10MHZ = 1,
00065     GPIO_SPEED_2MHZ,
00066     GPIO_SPEED_50MHZ,
00067 };
00068 /*\}*/
00069
00077 INLINE void stm32_gpioPinWrite(struct stm32_gpio *base, uint16_t pins, bool val)
00078 {
00079     if (val)
00080         base->BSRR |= pins;
00081     else
00082         base->BRR  |= pins;
00083 }
00084
00091 INLINE uint16_t stm32_gpioPinRead(struct stm32_gpio *base, uint16_t pins)
00092 {
00093     return (base->IDR & pins);
00094 }
00095
00104 int stm32_gpioPinConfig(struct stm32_gpio *base, uint16_t pins, uint8_t mode, uint8_t speed);
00105
00106 #endif /* GPIO_STM32_H */


BeRTOS: hash.h File Reference

  • sec
Functions
hash.h File Reference

Generic interface for hashing algorithms. More...

#include <cfg/compiler.h>
#include <cfg/debug.h>

Go to the source code of this file.

Functions

void | hash_begin (Hash *h)
Initialize a hash computation.
void | hash_update (Hash *h, const void *data, size_t len)
Add some data to the computation.
uint8_t * | hash_final (Hash *h)
Finalize the hash computation and return the digest.
int | hash_digest_len (Hash *h)
Return the digest length in bytes.

Detailed Description

Generic interface for hashing algorithms.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file hash.h.

Function Documentation

uint8_t* hash_final ( Hash * h ) [inline]

Finalize the hash computation and return the digest.

Note:
This function must be called exactly once per each computation. Calling it twice leads to undefined behaviour.
The pointer returned is within the hash context structure h, so it has the same lifetime as the hash instance. The data will be invalidated as soon as hash_begin is called again on the same instance.

Definition at line 81 of file hash.h.


BeRTOS: hash.h Source File

  • sec
hash.h
Go to the documentation of this file.
00001
00038 #ifndef SEC_HASH_H
00039 #define SEC_HASH_H
00040
00041 #include <cfg/compiler.h>
00042 #include <cfg/debug.h>
00043
00044 typedef struct Hash
00045 {
00046     void (*begin)(struct Hash *h);
00047     void (*update)(struct Hash *h, const void *data, size_t len);
00048     uint8_t* (*final)(struct Hash *h);
00049     uint8_t digest_len;
00050     uint8_t block_len;
00051 } Hash;
00052
00056 INLINE void hash_begin(Hash *h)
00057 {
00058     ASSERT(h->begin);
00059     h->begin(h);
00060 }
00061
00065 INLINE void hash_update(Hash *h, const void* data, size_t len)
00066 {
00067     ASSERT(h->update);
00068     h->update(h, data, len);
00069 }
00070
00081 INLINE uint8_t* hash_final(Hash *h)
00082 {
00083     ASSERT(h->final);
00084     return h->final(h);
00085 }
00086
00090 INLINE int hash_digest_len(Hash *h)
00091 {
00092     return h->digest_len;
00093 }
00094
00095 /*
00096  * Return the internal block length in bytes.
00097  *
00098  * Hash functions operate on a fixed-size block. This information is useful
00099  * for composite functions like HMAC to adjust their internal operations.
00100  */
00101 INLINE int hash_block_len(Hash *h)
00102 {
00103     return h->block_len;
00104 }
00105
00106 #endif /* SEC_HASH_H */


BeRTOS: hashtable.c File Reference

  • struct
Functions
hashtable.c File Reference

Portable hash table implementation. More...

#include "hashtable.h"
#include "cfg/cfg_hashtable.h"
#include <cfg/debug.h>
#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <string.h>

Go to the source code of this file.

Functions

uint8_t * | key_internal_get_ptr (struct HashTable *ht, HashNodePtr node)
For hash tables with internal keys, compute the pointer to the internal key for a given node.
void | ht_init (struct HashTable *ht)
Initialize (and clear) a hash table in a memory buffer.
bool | ht_insert_with_key (struct HashTable *ht, const void *key, uint8_t key_length, const void *data)
Insert an element into the hash table.
bool | ht_insert (struct HashTable *ht, const void *data)
Insert an element into the hash table.
const void * | ht_find (struct HashTable *ht, const void *key, uint8_t key_length)
Find an element in the hash table.

Detailed Description

Portable hash table implementation.

Some rationales of our choices in implementation:

  • For embedded systems, it is vital to allocate the table in static memory. To do so, it is necessary to expose the HashNode and HashTable structures in the header file. Nevertheless, they should be used as opaque types (that is, the users should not access the structure fields directly).
  • To statically allocate the structures, a macro is provided. With this macro, we are hiding completely HashNode to the user (who only manipulates HashTable). Without the macro, the user would have had to define both the HashNode and the HashTable manually, and pass both of them to ht_init() (which would have created the link between the two). Instead, the link is created with a literal initialization.
  • The hash table is created as power of two to remove the divisions from the code. Of course, hash functions work at their best when the table size is a prime number. When calculating the modulus to convert the hash value to an index, the actual operation becomes a bitwise AND: this is fast, but truncates the value losing bits. Thus, the higher bits are first "merged" with the lower bits through some XOR operations (see the last line of calc_hash()).
  • To minimize the memory occupation, there is no flag to set for the empty node. An empty node is recognized by its data pointer set to NULL. It is then invalid to store NULL as data pointer in the table.
  • The visiting interface through iterators is implemented with pass-by-value semantic. While this is overkill for medium-to-stupid compilers, it is the best designed from an user point of view. Moreover, being totally inlined (defined completely in the header), even a stupid compiler should be able to perform basic optimizations on it. We thought about using a pass-by-pointer semantic but it was much more awful to use, and the compiler is then forced to spill everything to the stack (unless it is *very* smart).
  • The current implementation allows to either store the key internally (that is, copy the key within the hash table) or keep it external (that is, a hook is used to extract the key from the data in the node). The former is more memory-hungry of course, as it allocated static space to store the key copies. The overhead to keep both methods at the same time is minimal:
    • There is a run-time check in node_get_key which is execute per each node visited.
    • Theoretically, there is no memory overhead. In practice, there were no flags in struct HashTable till now, so we had to add a first bit flag, but the overhead will disappear if a second flag is added for a different reason later.
    • There is a little interface overhead, since we have two different versions of ht_insert(), one with the key passed as parameter and one without, but in the common case (external keys) both can be used.
Author:
Giovanni Bajo <rasky@develer.com>

Definition in file hashtable.c.

Function Documentation

const void* ht_find | ( | struct HashTable * | ht,
 |  | const void * | key,
 |  | uint8_t | key_length
 | ) |  |

Find an element in the hash table.

Parameters:
ht | Handle of the hash table
key | Key of the element
key_length | Length of the key in characters
Returns:
Data of the element, or NULL if no element was found for the given key.

Definition at line 274 of file hashtable.c.

void ht_init ( struct HashTable * ht )

Initialize (and clear) a hash table in a memory buffer.

Parameters:
ht Hash table declared with DECLARE_HASHTABLE
Note:
This function must be called before using the hash table. Optionally, it can be called later in the program to clear the hash table, removing all its elements.

Definition at line 203 of file hashtable.c.

bool ht_insert | ( | struct HashTable * | ht,
 |  | const void * | data
 | ) |  |

Insert an element into the hash table.

Parameters:
ht | Handle of the hash table
data | Data to be inserted into the table
Returns:
true if insertion was successful, false otherwise (table is full)
Note:
The key for the element to insert is extract from the data with the hook. This means that this function cannot be called for hashtables with internal keys.
If an element with the same key already exists in the table, it will be overwritten.
It is not allowed to store NULL in the table. If you pass NULL as data, the function call will fail.

Definition at line 254 of file hashtable.c.

bool ht_insert_with_key | ( | struct HashTable * | ht,
 |  | const void * | key,
 |  | uint8_t | key_length,
 |  | const void * | data
 | ) |  |

Insert an element into the hash table.

Parameters:
ht | Handle of the hash table
key | Key of the element
key_length | Length of the key in characters
data | Data to be inserted into the table
Returns:
true if insertion was successful, false otherwise (table is full)
Note:
If this function is called for hash table with external keys, the key provided must be match the key that would be extracted with the hook, otherwise the function will fail.
If an element with the same key already exists in the table, it will be overwritten.
It is not allowed to store NULL in the table. If you pass NULL as data, the function call will fail.

Definition at line 235 of file hashtable.c.

uint8_t* key_internal_get_ptr | ( | struct HashTable * | ht,
 |  | HashNodePtr | node
 | ) |  | [inline]

For hash tables with internal keys, compute the pointer to the internal key for a given node.

Definition at line 99 of file hashtable.c.


BeRTOS: hashtable.c Source File

  • struct
hashtable.c
Go to the documentation of this file.
00001
00084 #include "hashtable.h"
00085
00086 #include "cfg/cfg_hashtable.h"
00087 #include <cfg/debug.h>
00088 #include <cfg/compiler.h>
00089 #include <cfg/macros.h> //ROTL(), ROTR();
00090
00091 #include <string.h>
00092
00093
00094 typedef const void** HashNodePtr;
00095 #define NODE_EMPTY(node)               (!*(node))
00096 #define HT_HAS_INTERNAL_KEY(ht)        (CONFIG_HT_OPTIONAL_INTERNAL_KEY && ht->flags.key_internal)
00097
00099 INLINE uint8_t *key_internal_get_ptr(struct HashTable *ht, HashNodePtr node)
00100 {
00101     uint8_t* key_buf = ht->key_data.mem;
00102     size_t index;
00103
00104     // Compute the index of the node and use it to move within the whole key buffer
00105     index = node - &ht->mem[0];
00106     ASSERT(index < (size_t)(1 << ht->max_elts_log2));
00107     key_buf += index * (INTERNAL_KEY_MAX_LENGTH + 1);
00108
00109     return key_buf;
00110 }
00111
00112
00113 INLINE void node_get_key(struct HashTable* ht, HashNodePtr node, const void** key, uint8_t* key_length)
00114 {
00115     if (HT_HAS_INTERNAL_KEY(ht))
00116     {
00117         uint8_t* k = key_internal_get_ptr(ht, node);
00118
00119         // Key has its length stored in the first byte
00120         *key_length = *k++;
00121         *key = k;
00122     }
00123     else
00124         *key = ht->key_data.hook(*node, key_length);
00125 }
00126
00127
00128 INLINE bool node_key_match(struct HashTable* ht, HashNodePtr node, const void* key, uint8_t key_length)
00129 {
00130     const void* key2;
00131     uint8_t key2_length;
00132
00133     node_get_key(ht, node, &key2, &key2_length);
00134
00135     return (key_length == key2_length && memcmp(key, key2, key_length) == 0);
00136 }
00137
00138
00139 static uint16_t calc_hash(const void* _key, uint8_t key_length)
00140 {
00141     const char* key = (const char*)_key;
00142     uint16_t hash = key_length;
00143     int i;
00144     int len = (int)key_length;
00145
00146     for (i = 0; i < len; ++i)
00147         hash = ROTL(hash, 4) ^ key[i];
00148
00149     return hash ^ (hash >> 6) ^ (hash >> 13);
00150 }
00151
00152
00153 static HashNodePtr perform_lookup(struct HashTable* ht,
00154                                   const void* key, uint8_t key_length)
00155 {
00156     uint16_t hash = calc_hash(key, key_length);
00157     uint16_t mask = ((1 << ht->max_elts_log2) - 1);
00158     uint16_t index = hash & mask;
00159     uint16_t first_index = index;
00160     uint16_t step;
00161     HashNodePtr node;
00162
00163     // Fast-path optimization: we check immediately if the current node
00164     //  is the one we were looking for, so we save the computation of the
00165     //  increment step in the common case.
00166     node = &ht->mem[index];
00167     if (NODE_EMPTY(node)
00168         || node_key_match(ht, node, key, key_length))
00169         return node;
00170
00171     // Increment while going through the hash table in case of collision.
00172     //  This implements the double-hash technique: we use the higher part
00173     //  of the hash as a step increment instead of just going to the next
00174     //  element, to minimize the collisions.
00175     // Notice that the number must be odd to be sure that the whole table
00176     //  is traversed. Actually MCD(table_size, step) must be 1, but
00177     //  table_size is always a power of 2, so we just ensure that step is
00178     //  never a multiple of 2.
00179     step = (ROTR(hash, ht->max_elts_log2) & mask) | 1;
00180
00181     do
00182     {
00183         index += step;
00184         index &= mask;
00185
00186         node = &ht->mem[index];
00187         if (NODE_EMPTY(node)
00188             || node_key_match(ht, node, key, key_length))
00189             return node;
00190
00191         // The check is done after the key compare. This actually causes
00192         //  one more compare in the case the table is full (since the first
00193         //  element was compared at the very start, and then at the end),
00194         //  but it makes faster the common path where we enter this loop
00195         //  for the first time, and index will not match first_index for
00196         //  sure.
00197     } while (index != first_index);
00198
00199     return NULL;
00200 }
00201
00202
00203 void ht_init(struct HashTable* ht)
00204 {
00205     memset(ht->mem, 0, sizeof(ht->mem[0]) * (1 << ht->max_elts_log2));
00206 }
00207
00208
00209 static bool insert(struct HashTable* ht, const void* key, uint8_t key_length, const void* data)
00210 {
00211     HashNodePtr node;
00212
00213     if (!data)
00214         return false;
00215
00216     if (HT_HAS_INTERNAL_KEY(ht))
00217         key_length = MIN(key_length, (uint8_t)INTERNAL_KEY_MAX_LENGTH);
00218
00219     node = perform_lookup(ht, key, key_length);
00220     if (!node)
00221         return false;
00222
00223     if (HT_HAS_INTERNAL_KEY(ht))
00224     {
00225         uint8_t* k = key_internal_get_ptr(ht, node);
00226         *k++ = key_length;
00227         memcpy(k, key, key_length);
00228     }
00229
00230     *node = data;
00231     return true;
00232 }
00233
00234
00235 bool ht_insert_with_key(struct HashTable* ht, const void* key, uint8_t key_length, const void* data)
00236 {
00237 #ifdef _DEBUG
00238     if (!HT_HAS_INTERNAL_KEY(ht))
00239     {
00240         // Construct a fake node and use it to match the key
00241         HashNodePtr node = &data;
00242         if (!node_key_match(ht, node, key, key_length))
00243         {
00244             ASSERT2(0, "parameter key is different from the external key");
00245             return false;
00246         }
00247     }
00248 #endif
00249
00250     return insert(ht, key, key_length, data);
00251 }
00252
00253
00254 bool ht_insert(struct HashTable* ht, const void* data)
00255 {
00256     const void* key;
00257     uint8_t key_length;
00258
00259 #ifdef _DEBUG
00260     if (HT_HAS_INTERNAL_KEY(ht))
00261     {
00262         ASSERT("parameter cannot be a hash table with internal keys - use ht_insert_with_key()"
00263                && 0);
00264         return false;
00265     }
00266 #endif
00267
00268     key = ht->key_data.hook(data, &key_length);
00269
00270     return insert(ht, key, key_length, data);
00271 }
00272
00273
00274 const void* ht_find(struct HashTable* ht, const void* key, uint8_t key_length)
00275 {
00276     HashNodePtr node;
00277
00278     if (HT_HAS_INTERNAL_KEY(ht))
00279         key_length = MIN(key_length, (uint8_t)INTERNAL_KEY_MAX_LENGTH);
00280
00281     node = perform_lookup(ht, key, key_length);
00282
00283     if (!node || NODE_EMPTY(node))
00284         return NULL;
00285
00286     return *node;
00287 }


BeRTOS: hashtable.h File Reference

  • struct
Data Structures | Defines | Typedefs | Functions
hashtable.h File Reference

Portable hash table. More...

#include "cfg/cfg_hashtable.h"
#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <cfg/debug.h>

Go to the source code of this file.

Data Structures

struct | HashTable
Hash table description. More...
struct | HashIterator
Iterator to walk the hash table. More...

Defines

#define | INTERNAL_KEY_MAX_LENGTH 15
Maximum length of the internal key (use (2^n)-1 for slight speedup)
#define | DECLARE_HASHTABLE(name, size, hook_gk)
Declare a hash table in the current scope.
#define | DECLARE_HASHTABLE_STATIC(name, size, hook_gk)
Exactly like DECLARE_HASHTABLE, but the variable will be declared as static.
#define | ht_insert_str(ht, key, data) ht_insert_with_key(ht, key, strlen(key), data)
Similar to ht_insert_with_key() but key is an ASCIIZ string.
#define | ht_find_str(ht, key) ht_find(ht, key, strlen(key))
Similar to ht_find() but key is an ASCIIZ string.

Typedefs

typedef const void *(* | hook_get_key )(const void *data, uint8_t *key_length)
Hook to get the key from data, which is an element of the hash table.

Functions

void | ht_init (struct HashTable *ht)
Initialize (and clear) a hash table in a memory buffer.
bool | ht_insert (struct HashTable *ht, const void *data)
Insert an element into the hash table.
bool | ht_insert_with_key (struct HashTable *ht, const void *key, uint8_t key_length, const void *data)
Insert an element into the hash table.
const void * | ht_find (struct HashTable *ht, const void *key, uint8_t key_length)
Find an element in the hash table.
HashIterator | ht_iter_begin (struct HashTable *ht)
Get an iterator to the begin of the hash table ht.
HashIterator | ht_iter_end (struct HashTable *ht)
Get an iterator to the (exclusive) end of the hash table ht.
bool | ht_iter_cmp (HashIterator it1, HashIterator it2)
Compare it1 and it2 for equality.
const void * | ht_iter_get (HashIterator iter)
Get the element within the hash table ht pointed by the iterator iter.
HashIterator | ht_iter_next (HashIterator h)
Return an iterator pointing to the element following h.

Detailed Description

Portable hash table.

Author:
Giovanni Bajo <rasky@develer.com>

This file implements a portable hash table, with the following features:

  • Open double-hashing. The maximum number of elements is fixed. The double hashing function improves recovery in case of collisions.
  • Configurable size (which is clamped to a power of two)
  • Visiting interface through iterator (returns the element in random order).
  • The key is stored within the data and a hook is used to extract it. Optionally, it is possible to store a copy of the key within the hash table.

Since the hashing is open, there is no way to remove elements from the table. Instead, a function is provided to clear the table completely.

The data stored within the table must be a pointer. The NULL pointer is used as a marker for a free node, so it is invalid to store a NULL pointer in the table with ht_insert().

Definition in file hashtable.h.

Define Documentation

#define DECLARE_HASHTABLE | ( | name,
 |  | size,
 |  | hook_gk
 | ) |
Value:
static const void* name##_nodes[1 << UINT32_LOG2(size)]; \
    struct HashTable name = \
        { \
            .mem = name##_nodes, \
            .max_elts_log2 = UINT32_LOG2(size), \
            .flags = { .key_internal = false }, \
            .key_data.hook = hook_gk \
        }

Declare a hash table in the current scope.

Parameters:
name | Variable name
size | Number of elements
hook_gk | Hook to be used to extract the key from the node
Note:
The number of elements will be rounded down to the nearest power of two.

Definition at line 119 of file hashtable.h.

#define DECLARE_HASHTABLE_STATIC | ( | name,
 |  | size,
 |  | hook_gk
 | ) |
Value:
static const void* name##_nodes[1 << UINT32_LOG2(size)]; \
    static struct HashTable name = \
        { \
            .mem = name##_nodes, \
            .max_elts_log2 = UINT32_LOG2(size), \
            .flags = { .key_internal = false }, \
            .key_data.hook = hook_gk \
        }

Exactly like DECLARE_HASHTABLE, but the variable will be declared as static.

Definition at line 131 of file hashtable.h.

Typedef Documentation

typedef const void*(* hook_get_key)(const void *data, uint8_t *key_length)

Hook to get the key from data, which is an element of the hash table.

The key must be returned together with key_length (in words).

Definition at line 73 of file hashtable.h.

Function Documentation

const void* ht_find | ( | struct HashTable * | ht,
 |  | const void * | key,
 |  | uint8_t | key_length
 | ) |  |

Find an element in the hash table.

Parameters:
ht | Handle of the hash table
key | Key of the element
key_length | Length of the key in characters
Returns:
Data of the element, or NULL if no element was found for the given key.

Definition at line 274 of file hashtable.c.

void ht_init ( struct HashTable * ht )

Initialize (and clear) a hash table in a memory buffer.

Parameters:
ht Hash table declared with DECLARE_HASHTABLE
Note:
This function must be called before using the hash table. Optionally, it can be called later in the program to clear the hash table, removing all its elements.

Definition at line 203 of file hashtable.c.

bool ht_insert | ( | struct HashTable * | ht,
 |  | const void * | data
 | ) |  |

Insert an element into the hash table.

Parameters:
ht | Handle of the hash table
data | Data to be inserted into the table
Returns:
true if insertion was successful, false otherwise (table is full)
Note:
The key for the element to insert is extract from the data with the hook. This means that this function cannot be called for hashtables with internal keys.
If an element with the same key already exists in the table, it will be overwritten.
It is not allowed to store NULL in the table. If you pass NULL as data, the function call will fail.

Definition at line 254 of file hashtable.c.

bool ht_insert_with_key | ( | struct HashTable * | ht,
 |  | const void * | key,
 |  | uint8_t | key_length,
 |  | const void * | data
 | ) |  |

Insert an element into the hash table.

Parameters:
ht | Handle of the hash table
key | Key of the element
key_length | Length of the key in characters
data | Data to be inserted into the table
Returns:
true if insertion was successful, false otherwise (table is full)
Note:
If this function is called for hash table with external keys, the key provided must be match the key that would be extracted with the hook, otherwise the function will fail.
If an element with the same key already exists in the table, it will be overwritten.
It is not allowed to store NULL in the table. If you pass NULL as data, the function call will fail.

Definition at line 235 of file hashtable.c.

HashIterator ht_iter_end ( struct HashTable * ht ) [inline]

Get an iterator to the (exclusive) end of the hash table ht.

Note:
Like in STL, the end iterator is not a valid iterator (you cannot call ht_iter_get() on it), and it must be used only to detect if we reached the end of the iteration (through ht_iter_cmp()).

Definition at line 253 of file hashtable.h.

HashIterator ht_iter_next ( HashIterator h ) [inline]

Return an iterator pointing to the element following h.

Note:
The order of the elements visited during the iteration is casual, and depends on the implementation.

Definition at line 279 of file hashtable.h.


BeRTOS: hashtable.h Source File

  • struct
hashtable.h
Go to the documentation of this file.
00001
00057 #ifndef STRUCT_HASHTABLE_H
00058 #define STRUCT_HASHTABLE_H
00059
00060 #include "cfg/cfg_hashtable.h"
00061
00062 #include <cfg/compiler.h>
00063 #include <cfg/macros.h>
00064 #include <cfg/debug.h>
00065
00067 #define INTERNAL_KEY_MAX_LENGTH     15
00068
00073 typedef const void *(*hook_get_key)(const void *data, uint8_t *key_length);
00074
00075
00086 struct HashTable
00087 {
00088     const void **mem;
00089     uint16_t max_elts_log2;
00090     struct {
00091         bool key_internal : 1;
00092     } flags;
00093     union {
00094         hook_get_key hook;
00095         uint8_t *mem;
00096     } key_data;
00097 };
00098
00099
00101 typedef struct
00102 {
00103     const void** pos;
00104     const void** end;
00105 } HashIterator;
00106
00107
00119 #define DECLARE_HASHTABLE(name, size, hook_gk) \
00120     static const void* name##_nodes[1 << UINT32_LOG2(size)]; \
00121     struct HashTable name = \
00122         { \
00123             .mem = name##_nodes, \
00124             .max_elts_log2 = UINT32_LOG2(size), \
00125             .flags = { .key_internal = false }, \
00126             .key_data.hook = hook_gk \
00127         }
00128
00129
00131 #define DECLARE_HASHTABLE_STATIC(name, size, hook_gk) \
00132     static const void* name##_nodes[1 << UINT32_LOG2(size)]; \
00133     static struct HashTable name = \
00134         { \
00135             .mem = name##_nodes, \
00136             .max_elts_log2 = UINT32_LOG2(size), \
00137             .flags = { .key_internal = false }, \
00138             .key_data.hook = hook_gk \
00139         }
00140
00141 #if CONFIG_HT_OPTIONAL_INTERNAL_KEY
00142
00147     #define DECLARE_HASHTABLE_INTERNALKEY(name, size) \
00148         static uint8_t name##_keys[(1 << UINT32_LOG2(size)) * (INTERNAL_KEY_MAX_LENGTH + 1)]; \
00149         static const void* name##_nodes[1 << UINT32_LOG2(size)]; \
00150         struct HashTable name = { name##_nodes, UINT32_LOG2(size), { true }, name##_keys }
00151
00153     #define DECLARE_HASHTABLE_INTERNALKEY_STATIC(name, size) \
00154         static uint8_t name##_keys[(1 << UINT32_LOG2(size)) * (INTERNAL_KEY_MAX_LENGTH + 1)]; \
00155         static const void* name##_nodes[1 << UINT32_LOG2(size)]; \
00156         static struct HashTable name = \
00157             { \
00158                 .mem = name##_nodes, \
00159                 .max_elts_log2 = UINT32_LOG2(size), \
00160                 .flags = { .key_internal = true }, \
00161                 .key_data.mem = name##_keys \
00162             }
00163 #endif
00164
00174 void ht_init(struct HashTable* ht);
00175
00193 bool ht_insert(struct HashTable* ht, const void* data);
00194
00214 bool ht_insert_with_key(struct HashTable* ht, const void* key, uint8_t key_length, const void* data);
00215
00224 const void* ht_find(struct HashTable* ht, const void* key, uint8_t key_length);
00225
00227 #define ht_insert_str(ht, key, data)         ht_insert_with_key(ht, key, strlen(key), data)
00228
00230 #define ht_find_str(ht, key)                 ht_find(ht, key, strlen(key))
00231
00233 INLINE HashIterator ht_iter_begin(struct HashTable* ht)
00234 {
00235     HashIterator h;
00236
00237     h.pos = &ht->mem[0];
00238     h.end = &ht->mem[1 << ht->max_elts_log2];
00239
00240     while (h.pos != h.end && !*h.pos)
00241         ++h.pos;
00242
00243     return h;
00244 }
00245
00253 INLINE HashIterator ht_iter_end(struct HashTable* ht)
00254 {
00255     HashIterator h;
00256
00257     h.pos = h.end = &ht->mem[1 << ht->max_elts_log2];
00258
00259     return h;
00260 }
00261
00263 INLINE bool ht_iter_cmp(HashIterator it1, HashIterator it2)
00264 {
00265     ASSERT(it1.end == it2.end);
00266     return it1.pos == it2.pos;
00267 }
00268
00270 INLINE const void* ht_iter_get(HashIterator iter)
00271 { return *iter.pos; }
00272
00279 INLINE HashIterator ht_iter_next(HashIterator h)
00280 {
00281     ++h.pos;
00282     while (h.pos != h.end && !(*h.pos))
00283         ++h.pos;
00284
00285     return h;
00286 }
00287
00288 int hashtable_testSetup(void);
00289 int hashtable_testRun(void);
00290 int hashtable_testTearDown(void);
00291
00292 #endif /* STRUCT_HASHTABLE_H */


BeRTOS: heap.c File Reference

  • struct
Functions
heap.c File Reference

Heap subsystem (public interface). More...

#include "heap.h"
#include <cfg/debug.h>
#include <string.h>

Go to the source code of this file.

Functions

void | heap_init (struct Heap *h, void *memory, size_t size)
Initialize heap within the buffer pointed by memory which is of size bytes.
void * | heap_allocmem (struct Heap *h, size_t size)
Allocate a chunk of memory of size bytes from the heap.
void | heap_freemem (struct Heap *h, void *mem, size_t size)
Free a chunk of memory of size bytes from the heap.
size_t | heap_freeSpace (struct Heap *h)
Returns the number of free bytes in a heap.
void * | heap_malloc (struct Heap *h, size_t size)
Standard malloc interface.
void * | heap_calloc (struct Heap *h, size_t size)
Standard calloc interface.
void | heap_free (struct Heap *h, void *mem)
Free a block of memory, determining its size automatically.

Detailed Description

Heap subsystem (public interface).

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file heap.c.


BeRTOS: heap.c Source File

  • struct
heap.c
Go to the documentation of this file.
00001
00038 #include "heap.h"
00039
00040 #include <cfg/debug.h> // ASSERT()
00041 #include <string.h>    // memset()
00042
00043 #define FREE_FILL_CODE     0xDEAD
00044 #define ALLOC_FILL_CODE    0xBEEF
00045
00046
00047 /*
00048  * This function prototype is deprecated, will change in:
00049  * void heap_init(struct Heap* h, heap_buf_t* memory, size_t size)
00050  * in the next BeRTOS release.
00051  */
00052 void heap_init(struct Heap* h, void* memory, size_t size)
00053 {
00054     #ifdef _DEBUG
00055     memset(memory, FREE_FILL_CODE, size);
00056     #endif
00057
00058     ASSERT2(((size_t)memory % alignof(heap_buf_t)) == 0,
00059     "memory buffer is unaligned, please use the HEAP_DEFINE_BUF() macro to declare heap buffers!\n");
00060
00061     /* Initialize heap with a single big chunk */
00062     h->FreeList = (MemChunk *)memory;
00063     h->FreeList->next = NULL;
00064     h->FreeList->size = size;
00065 }
00066
00067
00068 void *heap_allocmem(struct Heap* h, size_t size)
00069 {
00070     MemChunk *chunk, *prev;
00071
00072     /* Round size up to the allocation granularity */
00073     size = ROUND_UP2(size, sizeof(MemChunk));
00074
00075     /* Handle allocations of 0 bytes */
00076     if (!size)
00077         size = sizeof(MemChunk);
00078
00079     /* Walk on the free list looking for any chunk big enough to
00080      * fit the requested block size.
00081      */
00082     for (prev = (MemChunk *)&h->FreeList, chunk = h->FreeList;
00083         chunk;
00084         prev = chunk, chunk = chunk->next)
00085     {
00086         if (chunk->size >= size)
00087         {
00088             if (chunk->size == size)
00089             {
00090                 /* Just remove this chunk from the free list */
00091                 prev->next = chunk->next;
00092                 #ifdef _DEBUG
00093                     memset(chunk, ALLOC_FILL_CODE, size);
00094                 #endif
00095                 return (void *)chunk;
00096             }
00097             else
00098             {
00099                 /* Allocate from the END of an existing chunk */
00100                 chunk->size -= size;
00101                 #ifdef _DEBUG
00102                     memset((uint8_t *)chunk + chunk->size, ALLOC_FILL_CODE, size);
00103                 #endif
00104                 return (void *)((uint8_t *)chunk + chunk->size);
00105             }
00106         }
00107     }
00108
00109     return NULL; /* fail */
00110 }
00111
00112
00113 void heap_freemem(struct Heap* h, void *mem, size_t size)
00114 {
00115     MemChunk *prev;
00116     ASSERT(mem);
00117
00118 #ifdef _DEBUG
00119     memset(mem, FREE_FILL_CODE, size);
00120 #endif
00121
00122     /* Round size up to the allocation granularity */
00123     size = ROUND_UP2(size, sizeof(MemChunk));
00124
00125     /* Handle allocations of 0 bytes */
00126     if (!size)
00127         size = sizeof(MemChunk);
00128
00129     /* Special cases: first chunk in the free list or memory completely full */
00130     ASSERT((uint8_t*)mem != (uint8_t*)h->FreeList);
00131     if (((uint8_t *)mem) < ((uint8_t *)h->FreeList) || !h->FreeList)
00132     {
00133         /* Insert memory block before the current free list head */
00134         prev = (MemChunk *)mem;
00135         prev->next = h->FreeList;
00136         prev->size = size;
00137         h->FreeList = prev;
00138     }
00139     else /* Normal case: not the first chunk in the free list */
00140     {
00141         /*
00142          * Walk on the free list. Stop at the insertion point (when mem
00143          * is between prev and prev->next)
00144          */
00145         prev = h->FreeList;
00146         while (prev->next < (MemChunk *)mem && prev->next)
00147             prev = prev->next;
00148
00149         /* Make sure mem is not *within* prev */
00150         ASSERT((uint8_t*)mem >= (uint8_t*)prev + prev->size);
00151
00152         /* Should it be merged with previous block? */
00153         if (((uint8_t *)prev) + prev->size == ((uint8_t *)mem))
00154         {
00155             /* Yes */
00156             prev->size += size;
00157         }
00158         else /* not merged with previous chunk */
00159         {
00160             MemChunk *curr = (MemChunk*)mem;
00161
00162             /* insert it after the previous node
00163              * and move the 'prev' pointer forward
00164              * for the following operations
00165              */
00166             curr->next = prev->next;
00167             curr->size = size;
00168             prev->next = curr;
00169
00170             /* Adjust for the following test */
00171             prev = curr;
00172         }
00173     }
00174
00175     /* Also merge with next chunk? */
00176     if (((uint8_t *)prev) + prev->size == ((uint8_t *)prev->next))
00177     {
00178         prev->size += prev->next->size;
00179         prev->next = prev->next->next;
00180
00181         /* There should be only one merge opportunity, becuase we always merge on free */
00182         ASSERT((uint8_t*)prev + prev->size != (uint8_t*)prev->next);
00183     }
00184 }
00185
00196 size_t heap_freeSpace(struct Heap *h)
00197 {
00198     size_t free_mem = 0;
00199     for (MemChunk *chunk = h->FreeList; chunk; chunk = chunk->next)
00200         free_mem += chunk->size;
00201
00202     return free_mem;
00203 }
00204
00205 #if CONFIG_HEAP_MALLOC
00206
00210 void *heap_malloc(struct Heap* h, size_t size)
00211 {
00212     size_t *mem;
00213
00214     size += sizeof(size_t);
00215     if ((mem = (size_t*)heap_allocmem(h, size)))
00216         *mem++ = size;
00217
00218     return mem;
00219 }
00220
00224 void *heap_calloc(struct Heap* h, size_t size)
00225 {
00226     void *mem;
00227
00228     if ((mem = heap_malloc(h, size)))
00229         memset(mem, 0, size);
00230
00231     return mem;
00232 }
00233
00247 void heap_free(struct Heap *h, void *mem)
00248 {
00249     size_t *_mem = (size_t *)mem;
00250
00251     if (_mem)
00252     {
00253         --_mem;
00254         heap_freemem(h, _mem, *_mem);
00255     }
00256 }
00257
00258 #endif /* CONFIG_HEAP_MALLOC */


BeRTOS: heap.h File Reference

  • struct
Data Structures | Defines | Functions
heap.h File Reference
#include "cfg/cfg_heap.h"
#include <cfg/compiler.h>
#include <cfg/macros.h>

Go to the source code of this file.

Data Structures

struct | Heap
A heap. More...

Defines

#define | HEAP_DEFINE_BUF(name, size) heap_buf_t name[((size) + sizeof(heap_buf_t) - 1) / sizeof(heap_buf_t)]
Utility macro to allocate a heap of size size.

Functions

void | heap_init (struct Heap *heap, void *memory, size_t size)
Initialize heap within the buffer pointed by memory which is of size bytes.
void * | heap_allocmem (struct Heap *heap, size_t size)
Allocate a chunk of memory of size bytes from the heap.
void | heap_freemem (struct Heap *heap, void *mem, size_t size)
Free a chunk of memory of size bytes from the heap.
size_t | heap_freeSpace (struct Heap *h)
Returns the number of free bytes in a heap.
Compatibility interface with C standard library
void * | heap_malloc (struct Heap *heap, size_t size)
Standard malloc interface.
void * | heap_calloc (struct Heap *heap, size_t size)
Standard calloc interface.
void | heap_free (struct Heap *heap, void *mem)
Free a block of memory, determining its size automatically.

Detailed Description

Definition in file heap.h.


BeRTOS: heap.h Source File

  • struct
heap.h
Go to the documentation of this file.
00001
00049 #ifndef STRUCT_HEAP_H
00050 #define STRUCT_HEAP_H
00051
00052 #include "cfg/cfg_heap.h"
00053 #include <cfg/compiler.h>
00054 #include <cfg/macros.h> // IS_POW2()
00055
00056 /* NOTE: struct size must be a 2's power! */
00057 typedef struct _MemChunk
00058 {
00059     struct _MemChunk *next;
00060     size_t size;
00061 } MemChunk;
00062
00063 STATIC_ASSERT(IS_POW2(sizeof(MemChunk)));
00064
00065 typedef MemChunk heap_buf_t;
00066
00068 typedef struct Heap
00069 {
00070     struct _MemChunk *FreeList;
00071 } Heap;
00072
00079 #define HEAP_DEFINE_BUF(name, size) \
00080     heap_buf_t name[((size) + sizeof(heap_buf_t) - 1) / sizeof(heap_buf_t)]
00081
00083 void heap_init(struct Heap* heap, void* memory, size_t size);
00084
00086 void *heap_allocmem(struct Heap* heap, size_t size);
00087
00089 void heap_freemem(struct Heap* heap, void *mem, size_t size);
00090
00091 size_t heap_freeSpace(struct Heap *h);
00092
00093 #define HNEW(heap, type) \
00094     (type*)heap_allocmem(heap, sizeof(type))
00095
00096 #define HNEWVEC(heap, type, nelem) \
00097     (type*)heap_allocmem(heap, sizeof(type) * (nelem))
00098
00099 #define HDELETE(heap, type, mem) \
00100     heap_freemem(heap, mem, sizeof(type))
00101
00102 #define HDELETEVEC(heap, type, nelem, mem) \
00103     heap_freemem(heap, mem, sizeof(type) * (nelem))
00104
00105
00106 #if CONFIG_HEAP_MALLOC
00107
00112 void *heap_malloc(struct Heap* heap, size_t size);
00113 void *heap_calloc(struct Heap* heap, size_t size);
00114 void heap_free(struct Heap* heap, void * mem);
00117 #endif
00118  //defgroup heap
00120
00121 int heap_testSetup(void);
00122 int heap_testRun(void);
00123 int heap_testTearDown(void);
00124
00125 #endif /* STRUCT_HEAP_H */


BeRTOS: helvB10.c Source File

  • fonts
helvB10.c
00001 /* Generated by convbdf on Wed Apr 28 00:42:58 CEST 2010. */
00002 #include <gfx/font.h>
00003
00004 /* Font information:
00005
00006    name: -Adobe-Helvetica-Bold-R-Normal--10-100-75-75-P-60-ISO8859-1
00007    pixel size: 10
00008    ascent: 10
00009    descent: 2
00010 */
00011
00012 /* Font character bitmap data. */
00013 static const PROGMEM uint8_t font_helvB10_glyphs[] = {
00014
00015 /* Character (0x20): bbw=1, bbh=1, bbx=0, bby=0, width=3 */
00016 0x00, 0x00, 0x00, /*                          */
00017 0x00, 0x00, 0x00, /*                                      */
00018
00019 /* Character (0x21): bbw=2, bbh=8, bbx=1, bby=0, width=4 */
00020 0x00, 0xfc, 0x3c, 0x00, /*           ******  ****           */
00021 0x00, 0x02, 0x02, 0x00, /*           ******  ****               *   *       */
00022
00023 /* Character (0x22): bbw=3, bbh=3, bbx=1, bby=5, width=5 */
00024 0x00, 0x1c, 0x00, 0x1c, 0x00, /*           ***             ***            */
00025 0x00, 0x00, 0x00, 0x00, 0x00, /*           ***             ***                                */
00026
00027 /* Character (0x23): bbw=6, bbh=7, bbx=0, bby=0, width=6 */
00028 0xa0, 0xf8, 0xa0, 0xf8, 0xa0, 0x20, /*      * *   *****     * *   *****     * *     *   */
00029 0x03, 0x00, 0x03, 0x00, 0x00, 0x00, /*      * *   *****     * *   *****     * *     *  **      **               */
00030
00031 /* Character (0x24): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */
00032 0x30, 0x68, 0xfc, 0xc8, 0x90, 0x00, /*     **     * **   ******   *  **    *  *         */
00033 0x01, 0x02, 0x07, 0x02, 0x01, 0x00, /*     **     * **   ******   *  **    *  *        *    *  ***  *  *        */
00034
00035 /* Character (0x25): bbw=7, bbh=8, bbx=0, bby=0, width=8 */
00036 0x08, 0x14, 0x9c, 0x68, 0x90, 0x88, 0x04, 0x00, /*    *      * *     ***  *   * **     *  *   *   *  *              */
00037 0x02, 0x01, 0x00, 0x01, 0x02, 0x03, 0x01, 0x00, /*    *      * *     ***  *   * **     *  *   *   *  *              *  *       *    *  **  *        */
00038
00039 /* Character (0x26): bbw=7, bbh=8, bbx=0, bby=0, width=8 */
00040 0xd8, 0xfc, 0x24, 0x7c, 0xd8, 0xc0, 0x40, 0x00, /*    ** **  ******  *  *    *****    ** **      **      *          */
00041 0x01, 0x03, 0x02, 0x03, 0x01, 0x03, 0x02, 0x00, /*    ** **  ******  *  *    *****    ** **      **      *         *   **   *  **  *   **   *       */
00042
00043 /* Character (0x27): bbw=2, bbh=3, bbx=0, bby=5, width=3 */
00044 0x14, 0x0c, 0x00, /*   * *     **             */
00045 0x00, 0x00, 0x00, /*   * *     **                         */
00046
00047 /* Character (0x28): bbw=3, bbh=10, bbx=0, bby=-2, width=4 */
00048 0xe0, 0xf8, 0x0c, 0x00, /*      ***   *****  **             */
00049 0x01, 0x07, 0x0c, 0x00, /*      ***   *****  **            *   ***   **     */
00050
00051 /* Character (0x29): bbw=3, bbh=10, bbx=0, bby=-2, width=4 */
00052 0x0c, 0xf8, 0xe0, 0x00, /*   **       *****     ***         */
00053 0x0c, 0x07, 0x01, 0x00, /*   **       *****     ***          ***** *        */
00054
00055 /* Character (0x2a): bbw=3, bbh=3, bbx=0, bby=5, width=4 */
00056 0x14, 0x08, 0x14, 0x00, /*   * *      *      * *            */
00057 0x00, 0x00, 0x00, 0x00, /*   * *      *      * *                            */
00058
00059 /* Character (0x2b): bbw=6, bbh=5, bbx=0, bby=1, width=6 */
00060 0x40, 0x40, 0xf0, 0xf0, 0x40, 0x40, /*       *       *     ****    ****      *       *  */
00061 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /*       *       *     ****    ****      *       *         *   *            */
00062
00063 /* Character (0x2c): bbw=2, bbh=4, bbx=0, bby=-2, width=3 */
00064 0x00, 0x00, 0x00, /*                          */
00065 0x08, 0x07, 0x00, /*                            ****      */
00066
00067 /* Character (0x2d): bbw=5, bbh=1, bbx=1, bby=3, width=7 */
00068 0x00, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, /*               *       *       *       *       *          */
00069 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*               *       *       *       *       *                                      */
00070
00071 /* Character (0x2e): bbw=1, bbh=2, bbx=1, bby=0, width=3 */
00072 0x00, 0x00, 0x00, /*                          */
00073 0x00, 0x03, 0x00, /*                             **       */
00074
00075 /* Character (0x2f): bbw=4, bbh=8, bbx=0, bby=0, width=4 */
00076 0x00, 0xc0, 0x30, 0x0c, /*               **    **    **     */
00077 0x03, 0x00, 0x00, 0x00, /*               **    **    **    **               */
00078
00079 /* Character (0x30): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00080 0xf8, 0xfc, 0x04, 0xfc, 0xf8, 0x00, /*    *****  ******  *       ******   *****         */
00081 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*    *****  ******  *       ******   *****        *   **   *  **  *        */
00082
00083 /* Character (0x31): bbw=4, bbh=8, bbx=0, bby=0, width=6 */
00084 0x08, 0x08, 0xfc, 0xfc, 0x00, 0x00, /*    *       *      ******  ******                 */
00085 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, /*    *       *      ******  ******                        **  **           */
00086
00087 /* Character (0x32): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00088 0x08, 0x8c, 0xc4, 0x7c, 0x38, 0x00, /*    *      **   *  *   **  *****    ***           */
00089 0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /*    *      **   *  *   **  *****    ***          **  **   *   *   *       */
00090
00091 /* Character (0x33): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00092 0x08, 0x0c, 0x24, 0xfc, 0xd8, 0x00, /*    *      **      *  *    ******   ** **         */
00093 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*    *      **      *  *    ******   ** **        *   **   *  **  *        */
00094
00095 /* Character (0x34): bbw=6, bbh=8, bbx=0, bby=0, width=6 */
00096 0xc0, 0xb0, 0x88, 0xfc, 0xfc, 0x80, /*       **    ** *   *   *  ******  ******       * */
00097 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, /*       **    ** *   *   *  ******  ******       *            **  **       */
00098
00099 /* Character (0x35): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00100 0xbc, 0x3c, 0x24, 0xe4, 0xc4, 0x00, /*   **** *  ****    *  *    *  ***  *   **         */
00101 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*   **** *  ****    *  *    *  ***  *   **        *   **   *  **  *        */
00102
00103 /* Character (0x36): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00104 0xf8, 0xfc, 0x24, 0xec, 0xc8, 0x00, /*    *****  ******  *  *    ** ***   *  **         */
00105 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*    *****  ******  *  *    ** ***   *  **        *   **   *  **  *        */
00106
00107 /* Character (0x37): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00108 0x04, 0x04, 0xe4, 0xfc, 0x1c, 0x00, /*   *       *       *  ***  ******  ***            */
00109 0x00, 0x03, 0x03, 0x00, 0x00, 0x00, /*   *       *       *  ***  ******  ***               **  **               */
00110
00111 /* Character (0x38): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00112 0xd8, 0xfc, 0x24, 0xfc, 0xd8, 0x00, /*    ** **  ******  *  *    ******   ** **         */
00113 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*    ** **  ******  *  *    ******   ** **        *   **   *  **  *        */
00114
00115 /* Character (0x39): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00116 0x38, 0x7c, 0x44, 0xfc, 0xf8, 0x00, /*    ***    *****   *   *   ******   *****         */
00117 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*    ***    *****   *   *   ******   *****        *   **   *  **  *        */
00118
00119 /* Character (0x3a): bbw=1, bbh=6, bbx=1, bby=0, width=3 */
00120 0x00, 0x30, 0x00, /*             **           */
00121 0x00, 0x03, 0x00, /*             **              **       */
00122
00123 /* Character (0x3b): bbw=2, bbh=8, bbx=0, bby=-2, width=3 */
00124 0x00, 0x30, 0x00, /*             **           */
00125 0x08, 0x07, 0x00, /*             **             ****      */
00126
00127 /* Character (0x3c): bbw=4, bbh=5, bbx=0, bby=1, width=5 */
00128 0x40, 0xe0, 0xb0, 0x10, 0x00, /*       *      ***    ** *    *            */
00129 0x00, 0x00, 0x01, 0x01, 0x00, /*       *      ***    ** *    *                   *   *        */
00130
00131 /* Character (0x3d): bbw=5, bbh=3, bbx=0, bby=2, width=6 */
00132 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0x00, /*      * *     * *     * *     * *     * *         */
00133 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*      * *     * *     * *     * *     * *                                 */
00134
00135 /* Character (0x3e): bbw=4, bbh=5, bbx=0, bby=1, width=5 */
00136 0x10, 0xb0, 0xe0, 0x40, 0x00, /*     *       ** *     ***      *          */
00137 0x01, 0x01, 0x00, 0x00, 0x00, /*     *       ** *     ***      *         *   *                */
00138
00139 /* Character (0x3f): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00140 0x08, 0xcc, 0xe4, 0x3c, 0x18, 0x00, /*    *      **  **  *  ***  ****     **            */
00141 0x00, 0x02, 0x02, 0x00, 0x00, 0x00, /*    *      **  **  *  ***  ****     **                *   *               */
00142
00143 /* Character (0x40): bbw=10, bbh=9, bbx=0, bby=-2, width=11 */
00144 0xc0, 0x30, 0x90, 0x48, 0x28, 0x28, 0xc8, 0x28, 0x10, 0xe0, 0x00, /*       **    **      *  *   *  *    * *     * *     *  **   * *      *        ***         */
00145 0x03, 0x04, 0x09, 0x0a, 0x0a, 0x09, 0x0a, 0x02, 0x01, 0x00, 0x00, /*       **    **      *  *   *  *    * *     * *     *  **   * *      *        ***        **    * *  * * * * **  * * * *  *            */
00146
00147 /* Character (0x41): bbw=7, bbh=8, bbx=0, bby=0, width=8 */
00148 0x80, 0xf0, 0xfc, 0x8c, 0xfc, 0xf0, 0x80, 0x00, /*        *    ****  ******  **   *  ******    ****       *         */
00149 0x03, 0x03, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, /*        *    ****  ******  **   *  ******    ****       *        **  **              **  **       */
00150
00151 /* Character (0x42): bbw=6, bbh=8, bbx=0, bby=0, width=7 */
00152 0xfc, 0xfc, 0x24, 0x24, 0xfc, 0xd8, 0x00, /*   ******  ******  *  *    *  *    ******   ** **         */
00153 0x03, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, /*   ******  ******  *  *    *  *    ******   ** **        **  **   *   *  **  *        */
00154
00155 /* Character (0x43): bbw=7, bbh=8, bbx=0, bby=0, width=8 */
00156 0xf0, 0xf8, 0x0c, 0x04, 0x04, 0x0c, 0x98, 0x00, /*     ****   *****  **      *       *       **       **  *         */
00157 0x00, 0x01, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, /*     ****   *****  **      *       *       **       **  *            *   **   *   *  **  *        */
00158
00159 /* Character (0x44): bbw=6, bbh=8, bbx=0, bby=0, width=7 */
00160 0xfc, 0xfc, 0x04, 0x0c, 0xf8, 0xf0, 0x00, /*   ******  ******  *       **       *****    ****         */
00161 0x03, 0x03, 0x02, 0x03, 0x01, 0x00, 0x00, /*   ******  ******  *       **       *****    ****        **  **   *  **  *            */
00162
00163 /* Character (0x45): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00164 0xfc, 0xfc, 0x24, 0x24, 0x24, 0x00, /*   ******  ******  *  *    *  *    *  *           */
00165 0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /*   ******  ******  *  *    *  *    *  *          **  **   *   *   *       */
00166
00167 /* Character (0x46): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00168 0xfc, 0xfc, 0x24, 0x24, 0x04, 0x00, /*   ******  ******  *  *    *  *    *              */
00169 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, /*   ******  ******  *  *    *  *    *             **  **                   */
00170
00171 /* Character (0x47): bbw=7, bbh=8, bbx=0, bby=0, width=8 */
00172 0xf0, 0xf8, 0x0c, 0x04, 0x44, 0xcc, 0xd8, 0x00, /*     ****   *****  **      *       *   *   **  **   ** **         */
00173 0x00, 0x01, 0x03, 0x02, 0x02, 0x01, 0x03, 0x00, /*     ****   *****  **      *       *   *   **  **   ** **            *   **   *   *  *   **       */
00174
00175 /* Character (0x48): bbw=6, bbh=8, bbx=0, bby=0, width=7 */
00176 0xfc, 0xfc, 0x20, 0x20, 0xfc, 0xfc, 0x00, /*   ******  ******     *       *    ******  ******         */
00177 0x03, 0x03, 0x00, 0x00, 0x03, 0x03, 0x00, /*   ******  ******     *       *    ******  ******        **  **          **  **       */
00178
00179 /* Character (0x49): bbw=2, bbh=8, bbx=0, bby=0, width=3 */
00180 0xfc, 0xfc, 0x00, /*   ******  ******         */
00181 0x03, 0x03, 0x00, /*   ******  ******        **  **       */
00182
00183 /* Character (0x4a): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00184 0x00, 0x00, 0x00, 0xfc, 0xfc, 0x00, /*                           ******  ******         */
00185 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*                           ******  ******        *   **   *  **  *        */
00186
00187 /* Character (0x4b): bbw=7, bbh=8, bbx=0, bby=0, width=7 */
00188 0xfc, 0xfc, 0x70, 0xd8, 0x8c, 0x04, 0x00, /*   ******  ******    ***    ** **  **   *  *              */
00189 0x03, 0x03, 0x00, 0x00, 0x01, 0x03, 0x02, /*   ******  ******    ***    ** **  **   *  *             **  **          *   **   *   */
00190
00191 /* Character (0x4c): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00192 0xfc, 0xfc, 0x00, 0x00, 0x00, 0x00, /*   ******  ******                                 */
00193 0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /*   ******  ******                                **  **   *   *   *       */
00194
00195 /* Character (0x4d): bbw=9, bbh=8, bbx=0, bby=0, width=10 */
00196 0xfc, 0xfc, 0x38, 0xe0, 0x80, 0xe0, 0x38, 0xfc, 0xfc, 0x00, /*   ******  ******   ***       ***       *     ***   ***    ******  ******         */
00197 0x03, 0x03, 0x00, 0x00, 0x03, 0x00, 0x00, 0x03, 0x03, 0x00, /*   ******  ******   ***       ***       *     ***   ***    ******  ******        **  **          **          **  **       */
00198
00199 /* Character (0x4e): bbw=7, bbh=8, bbx=0, bby=0, width=8 */
00200 0xfc, 0xfc, 0x18, 0x60, 0x80, 0xfc, 0xfc, 0x00, /*   ******  ******   **        **        *  ******  ******         */
00201 0x03, 0x03, 0x00, 0x00, 0x01, 0x03, 0x03, 0x00, /*   ******  ******   **        **        *  ******  ******        **  **          *   **  **       */
00202
00203 /* Character (0x4f): bbw=7, bbh=8, bbx=0, bby=0, width=8 */
00204 0xf0, 0xf8, 0x0c, 0x04, 0x0c, 0xf8, 0xf0, 0x00, /*     ****   *****  **      *       **       *****    ****         */
00205 0x00, 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, 0x00, /*     ****   *****  **      *       **       *****    ****            *   **   *  **  *            */
00206
00207 /* Character (0x50): bbw=6, bbh=8, bbx=0, bby=0, width=7 */
00208 0xfc, 0xfc, 0x44, 0x44, 0x7c, 0x38, 0x00, /*   ******  ******  *   *   *   *   *****    ***           */
00209 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, /*   ******  ******  *   *   *   *   *****    ***          **  **                       */
00210
00211 /* Character (0x51): bbw=7, bbh=9, bbx=0, bby=-1, width=8 */
00212 0xf0, 0xf8, 0x0c, 0x84, 0x0c, 0xf8, 0xf0, 0x00, /*     ****   *****  **      *    *  **       *****    ****         */
00213 0x00, 0x01, 0x03, 0x02, 0x03, 0x03, 0x04, 0x00, /*     ****   *****  **      *    *  **       *****    ****            *   **   *  **  **    *      */
00214
00215 /* Character (0x52): bbw=6, bbh=8, bbx=0, bby=0, width=7 */
00216 0xfc, 0xfc, 0x44, 0x44, 0xfc, 0xb8, 0x00, /*   ******  ******  *   *   *   *   ******   *** *         */
00217 0x03, 0x03, 0x00, 0x00, 0x03, 0x03, 0x00, /*   ******  ******  *   *   *   *   ******   *** *        **  **          **  **       */
00218
00219 /* Character (0x53): bbw=6, bbh=8, bbx=0, bby=0, width=7 */
00220 0x98, 0x3c, 0x34, 0x64, 0xec, 0xc8, 0x00, /*    **  *  ****    * **    *  **   ** ***   *  **         */
00221 0x01, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, /*    **  *  ****    * **    *  **   ** ***   *  **        *   **   *   *  **  *        */
00222
00223 /* Character (0x54): bbw=6, bbh=8, bbx=0, bby=0, width=7 */
00224 0x04, 0x04, 0xfc, 0xfc, 0x04, 0x04, 0x00, /*   *       *       ******  ******  *       *              */
00225 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00, /*   *       *       ******  ******  *       *                     **  **               */
00226
00227 /* Character (0x55): bbw=6, bbh=8, bbx=0, bby=0, width=7 */
00228 0xfc, 0xfc, 0x00, 0x00, 0xfc, 0xfc, 0x00, /*   ******  ******                  ******  ******         */
00229 0x01, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, /*   ******  ******                  ******  ******        *   **   *   *  **  *        */
00230
00231 /* Character (0x56): bbw=7, bbh=8, bbx=0, bby=0, width=8 */
00232 0x0c, 0x7c, 0xf0, 0x80, 0xf0, 0x7c, 0x0c, 0x00, /*   **      *****     ****       *    ****  *****   **             */
00233 0x00, 0x00, 0x01, 0x03, 0x01, 0x00, 0x00, 0x00, /*   **      *****     ****       *    ****  *****   **                    *   **  *                */
00234
00235 /* Character (0x57): bbw=10, bbh=8, bbx=0, bby=0, width=11 */
00236 0x1c, 0xfc, 0xe0, 0x80, 0xfc, 0xfc, 0x80, 0xe0, 0xfc, 0x1c, 0x00, /*   ***     ******     ***       *  ******  ******       *     ***  ******  ***            */
00237 0x00, 0x00, 0x03, 0x01, 0x00, 0x00, 0x01, 0x03, 0x00, 0x00, 0x00, /*   ***     ******     ***       *  ******  ******       *     ***  ******  ***                   **  *           *   **               */
00238
00239 /* Character (0x58): bbw=7, bbh=8, bbx=0, bby=0, width=8 */
00240 0x0c, 0x9c, 0xf0, 0x60, 0xf0, 0x9c, 0x0c, 0x00, /*   **      ***  *    ****     **     ****  ***  *  **             */
00241 0x03, 0x03, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, /*   **      ***  *    ****     **     ****  ***  *  **            **  **              **  **       */
00242
00243 /* Character (0x59): bbw=8, bbh=8, bbx=0, bby=0, width=9 */
00244 0x0c, 0x3c, 0x70, 0xc0, 0xc0, 0x70, 0x3c, 0x0c, 0x00, /*   **      ****      ***       **      **    ***   ****    **             */
00245 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, /*   **      ****      ***       **      **    ***   ****    **                        **  **                   */
00246
00247 /* Character (0x5a): bbw=6, bbh=8, bbx=0, bby=0, width=7 */
00248 0x04, 0xc4, 0xe4, 0x74, 0x1c, 0x0c, 0x00, /*   *       *   **  *  ***  * ***   ***     **             */
00249 0x03, 0x03, 0x02, 0x02, 0x02, 0x02, 0x00, /*   *       *   **  *  ***  * ***   ***     **            **  **   *   *   *   *       */
00250
00251 /* Character (0x5b): bbw=3, bbh=10, bbx=0, bby=-2, width=4 */
00252 0xfc, 0xfc, 0x04, 0x00, /*   ******  ******  *              */
00253 0x0f, 0x0f, 0x08, 0x00, /*   ******  ******  *             ********   *     */
00254
00255 /* Character (0x5c): bbw=4, bbh=8, bbx=0, bby=0, width=4 */
00256 0x0c, 0x30, 0xc0, 0x00, /*   **        **        **         */
00257 0x00, 0x00, 0x00, 0x03, /*   **        **        **                    **   */
00258
00259 /* Character (0x5d): bbw=3, bbh=10, bbx=0, bby=-2, width=4 */
00260 0x04, 0xfc, 0xfc, 0x00, /*   *       ******  ******         */
00261 0x08, 0x0f, 0x0f, 0x00, /*   *       ******  ******           *********     */
00262
00263 /* Character (0x5e): bbw=5, bbh=4, bbx=0, bby=4, width=5 */
00264 0x30, 0x18, 0x0c, 0x18, 0x30, /*     **     **     **       **       **   */
00265 0x00, 0x00, 0x00, 0x00, 0x00, /*     **     **     **       **       **                       */
00266
00267 /* Character (0x5f): bbw=6, bbh=1, bbx=0, bby=-2, width=6 */
00268 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                  */
00269 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, /*                                                    *   *   *   *   *   * */
00270
00271 /* Character (0x60): bbw=2, bbh=3, bbx=0, bby=5, width=3 */
00272 0x18, 0x14, 0x00, /*    **     * *            */
00273 0x00, 0x00, 0x00, /*    **     * *                        */
00274
00275 /* Character (0x61): bbw=6, bbh=6, bbx=0, bby=0, width=6 */
00276 0xa0, 0xd0, 0x50, 0xf0, 0xe0, 0x00, /*      * *    * **    * *     ****     ***         */
00277 0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /*      * *    * **    * *     ****     ***        *   **   *  *   **   *   */
00278
00279 /* Character (0x62): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00280 0xfc, 0xfc, 0x10, 0x30, 0xe0, 0x00, /*   ******  ******    *       **       ***         */
00281 0x03, 0x03, 0x02, 0x03, 0x01, 0x00, /*   ******  ******    *       **       ***        **  **   *  **  *        */
00282
00283 /* Character (0x63): bbw=4, bbh=6, bbx=0, bby=0, width=5 */
00284 0xe0, 0xf0, 0x10, 0x30, 0x00, /*      ***    ****    *       **           */
00285 0x01, 0x03, 0x02, 0x03, 0x00, /*      ***    ****    *       **          *   **   *  **       */
00286
00287 /* Character (0x64): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00288 0xe0, 0x30, 0x10, 0xfc, 0xfc, 0x00, /*      ***    **      *     ******  ******         */
00289 0x01, 0x03, 0x02, 0x03, 0x03, 0x00, /*      ***    **      *     ******  ******        *   **   *  **  **       */
00290
00291 /* Character (0x65): bbw=5, bbh=6, bbx=0, bby=0, width=6 */
00292 0xe0, 0xf0, 0x50, 0x70, 0x60, 0x00, /*      ***    ****    * *     ***      **          */
00293 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*      ***    ****    * *     ***      **         *   **   *  **  *        */
00294
00295 /* Character (0x66): bbw=4, bbh=8, bbx=0, bby=0, width=4 */
00296 0xf8, 0xfc, 0x14, 0x04, /*    *****  ******  * *     *      */
00297 0x03, 0x03, 0x00, 0x00, /*    *****  ******  * *     *     **  **           */
00298
00299 /* Character (0x67): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */
00300 0xe0, 0x30, 0x10, 0xe0, 0xf0, 0x00, /*      ***    **      *        ***    ****         */
00301 0x01, 0x0b, 0x0a, 0x0f, 0x07, 0x00, /*      ***    **      *        ***    ****        *   ** * * ********      */
00302
00303 /* Character (0x68): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00304 0xfc, 0xfc, 0x10, 0xf0, 0xe0, 0x00, /*   ******  ******    *       ****     ***         */
00305 0x03, 0x03, 0x00, 0x03, 0x03, 0x00, /*   ******  ******    *       ****     ***        **  **      **  **       */
00306
00307 /* Character (0x69): bbw=2, bbh=8, bbx=0, bby=0, width=3 */
00308 0xf4, 0xf4, 0x00, /*   * ****  * ****         */
00309 0x03, 0x03, 0x00, /*   * ****  * ****        **  **       */
00310
00311 /* Character (0x6a): bbw=2, bbh=10, bbx=0, bby=-2, width=3 */
00312 0xf4, 0xf4, 0x00, /*   * ****  * ****         */
00313 0x0f, 0x07, 0x00, /*   * ****  * ****        *******      */
00314
00315 /* Character (0x6b): bbw=6, bbh=8, bbx=0, bby=0, width=6 */
00316 0xfc, 0xfc, 0xe0, 0xb0, 0x10, 0x00, /*   ******  ******     ***    ** *    *            */
00317 0x03, 0x03, 0x00, 0x01, 0x03, 0x02, /*   ******  ******     ***    ** *    *           **  **      *   **   *   */
00318
00319 /* Character (0x6c): bbw=2, bbh=8, bbx=0, bby=0, width=3 */
00320 0xfc, 0xfc, 0x00, /*   ******  ******         */
00321 0x03, 0x03, 0x00, /*   ******  ******        **  **       */
00322
00323 /* Character (0x6d): bbw=8, bbh=6, bbx=0, bby=0, width=9 */
00324 0xf0, 0xe0, 0x10, 0xf0, 0xe0, 0x10, 0xf0, 0xe0, 0x00, /*     ****     ***    *       ****     ***    *       ****     ***         */
00325 0x03, 0x03, 0x00, 0x03, 0x03, 0x00, 0x03, 0x03, 0x00, /*     ****     ***    *       ****     ***    *       ****     ***        **  **      **  **      **  **       */
00326
00327 /* Character (0x6e): bbw=5, bbh=6, bbx=0, bby=0, width=6 */
00328 0xf0, 0xe0, 0x10, 0xf0, 0xe0, 0x00, /*     ****     ***    *       ****     ***         */
00329 0x03, 0x03, 0x00, 0x03, 0x03, 0x00, /*     ****     ***    *       ****     ***        **  **      **  **       */
00330
00331 /* Character (0x6f): bbw=5, bbh=6, bbx=0, bby=0, width=6 */
00332 0xe0, 0xf0, 0x10, 0xf0, 0xe0, 0x00, /*      ***    ****    *       ****     ***         */
00333 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*      ***    ****    *       ****     ***        *   **   *  **  *        */
00334
00335 /* Character (0x70): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */
00336 0xf0, 0xe0, 0x10, 0x30, 0xe0, 0x00, /*     ****     ***    *       **       ***         */
00337 0x0f, 0x0f, 0x02, 0x03, 0x01, 0x00, /*     ****     ***    *       **       ***        ******** *  **  *        */
00338
00339 /* Character (0x71): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */
00340 0xe0, 0x30, 0x10, 0xe0, 0xf0, 0x00, /*      ***    **      *        ***    ****         */
00341 0x01, 0x03, 0x02, 0x0f, 0x0f, 0x00, /*      ***    **      *        ***    ****        *   **   *  ********     */
00342
00343 /* Character (0x72): bbw=4, bbh=6, bbx=0, bby=0, width=4 */
00344 0xf0, 0xe0, 0x30, 0x10, /*     ****     ***    **      *    */
00345 0x03, 0x03, 0x00, 0x00, /*     ****     ***    **      *   **  **           */
00346
00347 /* Character (0x73): bbw=5, bbh=6, bbx=0, bby=0, width=6 */
00348 0x20, 0x70, 0x50, 0xf0, 0xa0, 0x00, /*      *      ***     * *     ****     * *         */
00349 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*      *      ***     * *     ****     * *        *   **   *  **  *        */
00350
00351 /* Character (0x74): bbw=3, bbh=8, bbx=0, bby=0, width=4 */
00352 0xfc, 0xfc, 0x10, 0x00, /*   ******  ******    *            */
00353 0x01, 0x03, 0x02, 0x00, /*   ******  ******    *           *   **   *       */
00354
00355 /* Character (0x75): bbw=5, bbh=6, bbx=0, bby=0, width=6 */
00356 0xf0, 0xf0, 0x00, 0xf0, 0xf0, 0x00, /*     ****    ****            ****    ****         */
00357 0x01, 0x03, 0x02, 0x01, 0x03, 0x00, /*     ****    ****            ****    ****        *   **   *  *   **       */
00358
00359 /* Character (0x76): bbw=5, bbh=6, bbx=0, bby=0, width=6 */
00360 0x70, 0xf0, 0x00, 0xf0, 0x70, 0x00, /*     ***     ****            ****    ***          */
00361 0x00, 0x01, 0x03, 0x01, 0x00, 0x00, /*     ***     ****            ****    ***             *   **  *            */
00362
00363 /* Character (0x77): bbw=7, bbh=6, bbx=0, bby=0, width=8 */
00364 0x70, 0xf0, 0x80, 0x70, 0x80, 0xf0, 0x70, 0x00, /*     ***     ****       *    ***        *    ****    ***          */
00365 0x00, 0x03, 0x03, 0x00, 0x03, 0x03, 0x00, 0x00, /*     ***     ****       *    ***        *    ****    ***             **  **      **  **           */
00366
00367 /* Character (0x78): bbw=6, bbh=6, bbx=0, bby=0, width=7 */
00368 0x10, 0xb0, 0xe0, 0xe0, 0xb0, 0x10, 0x00, /*     *       ** *     ***     ***    ** *    *            */
00369 0x03, 0x03, 0x00, 0x00, 0x03, 0x03, 0x00, /*     *       ** *     ***     ***    ** *    *           **  **          **  **       */
00370
00371 /* Character (0x79): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */
00372 0xf0, 0xf0, 0x00, 0xf0, 0xf0, 0x00, /*     ****    ****            ****    ****         */
00373 0x00, 0x09, 0x0f, 0x07, 0x01, 0x00, /*     ****    ****            ****    ****            *  ******** *        */
00374
00375 /* Character (0x7a): bbw=5, bbh=6, bbx=0, bby=0, width=6 */
00376 0x10, 0x90, 0xd0, 0x70, 0x30, 0x00, /*     *       *  *    * **    ***     **           */
00377 0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /*     *       *  *    * **    ***     **          **  **   *   *   *       */
00378
00379 /* Character (0x7b): bbw=4, bbh=10, bbx=0, bby=-2, width=5 */
00380 0x40, 0xf8, 0xbc, 0x04, 0x00, /*       *    *****  **** *  *              */
00381 0x00, 0x07, 0x0f, 0x08, 0x00, /*       *    *****  **** *  *                 *** ****   *     */
00382
00383 /* Character (0x7c): bbw=1, bbh=10, bbx=1, bby=-2, width=3 */
00384 0x00, 0xfc, 0x00, /*           ******         */
00385 0x00, 0x0f, 0x00, /*           ******            ****     */
00386
00387 /* Character (0x7d): bbw=4, bbh=10, bbx=0, bby=-2, width=5 */
00388 0x04, 0xbc, 0xf8, 0x40, 0x00, /*   *       **** *   *****      *          */
00389 0x08, 0x0f, 0x07, 0x00, 0x00, /*   *       **** *   *****      *            ********          */
00390
00391 /* Character (0x7e): bbw=6, bbh=2, bbx=0, bby=2, width=6 */
00392 0x80, 0xc0, 0x40, 0x80, 0xc0, 0x40, /*        *      **      *        *      **      *  */
00393 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *      **      *        *      **      *                          */
00394
00395 /* Character (0xa0): bbw=1, bbh=1, bbx=0, bby=0, width=3 */
00396 0x00, 0x00, 0x00, /*                          */
00397 0x00, 0x00, 0x00, /*                                      */
00398
00399 /* Character (0xa1): bbw=2, bbh=8, bbx=1, bby=-2, width=4 */
00400 0x00, 0x10, 0xd0, 0x00, /*             *       * **         */
00401 0x00, 0x0f, 0x0f, 0x00, /*             *       * **            ********     */
00402
00403 /* Character (0xa2): bbw=5, bbh=8, bbx=0, bby=-1, width=6 */
00404 0xe0, 0x30, 0xd0, 0x38, 0x20, 0x00, /*      ***    **      * **   ***       *           */
00405 0x01, 0x07, 0x02, 0x03, 0x01, 0x00, /*      ***    **      * **   ***       *          *   ***  *  **  *        */
00406
00407 /* Character (0xa3): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00408 0x20, 0xf8, 0xfc, 0x24, 0x0c, 0x00, /*      *     *****  ******  *  *    **             */
00409 0x02, 0x03, 0x01, 0x02, 0x03, 0x00, /*      *     *****  ******  *  *    **             *  **  *    *  **       */
00410
00411 /* Character (0xa4): bbw=5, bbh=6, bbx=0, bby=1, width=6 */
00412 0x68, 0xf8, 0x90, 0xf8, 0x68, 0x00, /*    * **    *****    *  *   *****   * **          */
00413 0x01, 0x01, 0x00, 0x01, 0x01, 0x00, /*    * **    *****    *  *   *****   * **         *   *       *   *        */
00414
00415 /* Character (0xa5): bbw=6, bbh=8, bbx=0, bby=0, width=7 */
00416 0x4c, 0x78, 0xe0, 0xe0, 0x78, 0x4c, 0x00, /*   **  *    ****      ***     ***   ****   **  *          */
00417 0x01, 0x01, 0x03, 0x03, 0x01, 0x01, 0x00, /*   **  *    ****      ***     ***   ****   **  *         *   *   **  **  *   *        */
00418
00419 /* Character (0xa6): bbw=1, bbh=10, bbx=1, bby=-2, width=3 */
00420 0x00, 0x3c, 0x00, /*           ****           */
00421 0x00, 0x0f, 0x00, /*           ****              ****     */
00422
00423 /* Character (0xa7): bbw=5, bbh=10, bbx=0, bby=-2, width=6 */
00424 0xd8, 0xbc, 0x34, 0x64, 0xc8, 0x00, /*    ** **  **** *  * **    *  **    *  **         */
00425 0x04, 0x09, 0x0b, 0x0f, 0x06, 0x00, /*    ** **  **** *  * **    *  **    *  **          * *  *** ***** **      */
00426
00427 /* Character (0xa8): bbw=3, bbh=1, bbx=0, bby=7, width=3 */
00428 0x04, 0x00, 0x04, /*   *               *      */
00429 0x00, 0x00, 0x00, /*   *               *                  */
00430
00431 /* Character (0xa9): bbw=8, bbh=8, bbx=1, bby=0, width=10 */
00432 0x00, 0xf0, 0x08, 0x64, 0x94, 0x94, 0xa4, 0x08, 0xf0, 0x00, /*             ****   *      *  **   * *  *  * *  *  *  * *   *        ****         */
00433 0x00, 0x00, 0x01, 0x02, 0x02, 0x02, 0x02, 0x01, 0x00, 0x00, /*             ****   *      *  **   * *  *  * *  *  *  * *   *        ****                *    *   *   *   *  *            */
00434
00435 /* Character (0xaa): bbw=3, bbh=5, bbx=1, bby=3, width=5 */
00436 0x00, 0x54, 0x44, 0x5c, 0x00, /*           * * *   *   *   *** *          */
00437 0x00, 0x00, 0x00, 0x00, 0x00, /*           * * *   *   *   *** *                              */
00438
00439 /* Character (0xab): bbw=6, bbh=3, bbx=0, bby=1, width=7 */
00440 0x80, 0xc0, 0x40, 0x80, 0xc0, 0x40, 0x00, /*        *      **      *        *      **      *          */
00441 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0x00, /*        *      **      *        *      **      *             *   *       *   *        */
00442
00443 /* Character (0xac): bbw=5, bbh=3, bbx=1, bby=2, width=7 */
00444 0x00, 0x20, 0x20, 0x20, 0x20, 0xe0, 0x00, /*              *       *       *       *       ***         */
00445 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*              *       *       *       *       ***                                     */
00446
00447 /* Character (0xad): bbw=4, bbh=1, bbx=0, bby=3, width=5 */
00448 0x40, 0x40, 0x40, 0x40, 0x00, /*       *       *       *       *          */
00449 0x00, 0x00, 0x00, 0x00, 0x00, /*       *       *       *       *                              */
00450
00451 /* Character (0xae): bbw=8, bbh=8, bbx=1, bby=0, width=10 */
00452 0x00, 0xf0, 0x08, 0xf4, 0x54, 0x54, 0xb4, 0x08, 0xf0, 0x00, /*             ****   *      * ****  * * *   * * *   * ** *   *        ****         */
00453 0x00, 0x00, 0x01, 0x02, 0x02, 0x02, 0x02, 0x01, 0x00, 0x00, /*             ****   *      * ****  * * *   * * *   * ** *   *        ****                *    *   *   *   *  *            */
00454
00455 /* Character (0xaf): bbw=3, bbh=1, bbx=0, bby=7, width=3 */
00456 0x04, 0x04, 0x04, /*   *       *       *      */
00457 0x00, 0x00, 0x00, /*   *       *       *                  */
00458
00459 /* Character (0xb0): bbw=3, bbh=3, bbx=1, bby=4, width=4 */
00460 0x00, 0x30, 0x28, 0x18, /*             **     * *     **    */
00461 0x00, 0x00, 0x00, 0x00, /*             **     * *     **                    */
00462
00463 /* Character (0xb1): bbw=6, bbh=7, bbx=0, bby=0, width=6 */
00464 0x20, 0x20, 0xf8, 0xf8, 0x20, 0x20, /*      *       *     *****   *****     *       *   */
00465 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, /*      *       *     *****   *****     *       *   *   *   *   *   *   *   */
00466
00467 /* Character (0xb2): bbw=3, bbh=4, bbx=0, bby=3, width=3 */
00468 0x50, 0x68, 0x58, /*     * *    * **    ** *  */
00469 0x00, 0x00, 0x00, /*     * *    * **    ** *              */
00470
00471 /* Character (0xb3): bbw=3, bbh=4, bbx=0, bby=3, width=3 */
00472 0x48, 0x58, 0x28, /*    *  *    ** *    * *   */
00473 0x00, 0x00, 0x00, /*    *  *    ** *    * *               */
00474
00475 /* Character (0xb4): bbw=2, bbh=2, bbx=0, bby=7, width=3 */
00476 0x04, 0x02, 0x00, /*   *      *               */
00477 0x00, 0x00, 0x00, /*   *      *                           */
00478
00479 /* Character (0xb5): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */
00480 0xf0, 0xf0, 0x00, 0xf0, 0xf0, 0x00, /*     ****    ****            ****    ****         */
00481 0x0f, 0x0f, 0x02, 0x01, 0x03, 0x00, /*     ****    ****            ****    ****        ******** *  *   **       */
00482
00483 /* Character (0xb6): bbw=6, bbh=10, bbx=0, bby=-2, width=6 */
00484 0x38, 0x7c, 0xfc, 0x04, 0xfc, 0x04, /*    ***    *****   ******  *       ******  *      */
00485 0x00, 0x00, 0x0f, 0x00, 0x0f, 0x00, /*    ***    *****   ******  *       ******  *             ****    ****     */
00486
00487 /* Character (0xb7): bbw=2, bbh=1, bbx=0, bby=3, width=3 */
00488 0x40, 0x40, 0x00, /*       *       *          */
00489 0x00, 0x00, 0x00, /*       *       *                      */
00490
00491 /* Character (0xb8): bbw=2, bbh=2, bbx=0, bby=-2, width=3 */
00492 0x00, 0x00, 0x00, /*                          */
00493 0x08, 0x0c, 0x00, /*                            *  **     */
00494
00495 /* Character (0xb9): bbw=2, bbh=4, bbx=0, bby=3, width=3 */
00496 0x10, 0x78, 0x00, /*     *      ****          */
00497 0x00, 0x00, 0x00, /*     *      ****                      */
00498
00499 /* Character (0xba): bbw=3, bbh=5, bbx=1, bby=3, width=5 */
00500 0x00, 0x5c, 0x54, 0x5c, 0x00, /*           *** *   * * *   *** *          */
00501 0x00, 0x00, 0x00, 0x00, 0x00, /*           *** *   * * *   *** *                              */
00502
00503 /* Character (0xbb): bbw=6, bbh=3, bbx=0, bby=1, width=7 */
00504 0x40, 0xc0, 0x80, 0x40, 0xc0, 0x80, 0x00, /*       *       **       *      *       **       *         */
00505 0x01, 0x01, 0x00, 0x01, 0x01, 0x00, 0x00, /*       *       **       *      *       **       *        *   *       *   *            */
00506
00507 /* Character (0xbc): bbw=8, bbh=8, bbx=0, bby=0, width=9 */
00508 0x08, 0x3c, 0x80, 0x40, 0x30, 0x88, 0xc4, 0x00, 0x00, /*    *      ****         *      *     **     *   *  *   **                 */
00509 0x00, 0x02, 0x01, 0x00, 0x01, 0x01, 0x03, 0x01, 0x00, /*    *      ****         *      *     **     *   *  *   **                     *  *       *   *   **  *        */
00510
00511 /* Character (0xbd): bbw=7, bbh=8, bbx=0, bby=0, width=9 */
00512 0x08, 0x3c, 0x80, 0x40, 0xb0, 0x48, 0xc4, 0x00, 0x00, /*    *      ****         *      *     ** *   *  *   *   **                 */
00513 0x00, 0x02, 0x01, 0x00, 0x02, 0x03, 0x02, 0x00, 0x00, /*    *      ****         *      *     ** *   *  *   *   **                     *  *        *  **   *           */
00514
00515 /* Character (0xbe): bbw=8, bbh=8, bbx=0, bby=0, width=9 */
00516 0x24, 0x2c, 0x94, 0x40, 0x30, 0x88, 0xc4, 0x00, 0x00, /*   *  *    ** *    * *  *      *     **     *   *  *   **                 */
00517 0x00, 0x02, 0x01, 0x00, 0x01, 0x01, 0x03, 0x01, 0x00, /*   *  *    ** *    * *  *      *     **     *   *  *   **                     *  *       *   *   **  *        */
00518
00519 /* Character (0xbf): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */
00520 0x00, 0x00, 0xd0, 0xd0, 0x00, 0x00, /*                     * **    * **                 */
00521 0x06, 0x0f, 0x09, 0x0c, 0x04, 0x00, /*                     * **    * **                 ** *****  *  **  *      */
00522
00523 /* Character (0xc0): bbw=7, bbh=11, bbx=0, bby=0, width=8 */
00524 0x80, 0xf0, 0xfc, 0x8d, 0xfc, 0xf0, 0x80, 0x00, /*        *    ****  ******* **   *  ******    ****       *         */
00525 0x03, 0x03, 0x08, 0x00, 0x00, 0x03, 0x03, 0x00, /*        *    ****  ******* **   *  ******    ****       *        **  **     *        **  **       */
00526
00527 /* Character (0xc1): bbw=7, bbh=11, bbx=0, bby=0, width=8 */
00528 0x80, 0xf0, 0xfc, 0x8d, 0xfc, 0xf0, 0x80, 0x00, /*        *    ****  ******* **   *  ******    ****       *         */
00529 0x03, 0x03, 0x00, 0x00, 0x08, 0x03, 0x03, 0x00, /*        *    ****  ******* **   *  ******    ****       *        **  **             ***  **       */
00530
00531 /* Character (0xc2): bbw=7, bbh=11, bbx=0, bby=0, width=8 */
00532 0x80, 0xf0, 0xfd, 0x8c, 0xfd, 0xf0, 0x80, 0x00, /*        *    ***** ******  **   ** ******    ****       *         */
00533 0x03, 0x03, 0x00, 0x08, 0x00, 0x03, 0x03, 0x00, /*        *    ***** ******  **   ** ******    ****       *        **  **         *    **  **       */
00534
00535 /* Character (0xc3): bbw=7, bbh=11, bbx=0, bby=0, width=8 */
00536 0x80, 0xf0, 0xfd, 0x8c, 0xfd, 0xf0, 0x80, 0x00, /*        *    ***** ******  **   ** ******    ****       *         */
00537 0x03, 0x03, 0x00, 0x08, 0x00, 0x0b, 0x03, 0x00, /*        *    ***** ******  **   ** ******    ****       *        **  **         *    ** ***       */
00538
00539 /* Character (0xc4): bbw=7, bbh=10, bbx=0, bby=0, width=8 */
00540 0x80, 0xf0, 0xfd, 0x8c, 0xfd, 0xf0, 0x80, 0x00, /*        *    ***** ******  **   ** ******    ****       *         */
00541 0x03, 0x03, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, /*        *    ***** ******  **   ** ******    ****       *        **  **              **  **       */
00542
00543 /* Character (0xc5): bbw=7, bbh=11, bbx=0, bby=0, width=8 */
00544 0x80, 0xf0, 0xfd, 0x8e, 0xfd, 0xf0, 0x80, 0x00, /*        *    ***** ****** ***   ** ******    ****       *         */
00545 0x03, 0x03, 0x00, 0x08, 0x00, 0x03, 0x03, 0x00, /*        *    ***** ****** ***   ** ******    ****       *        **  **         *    **  **       */
00546
00547 /* Character (0xc6): bbw=9, bbh=8, bbx=0, bby=0, width=10 */
00548 0x80, 0xf0, 0xfc, 0x8c, 0xfc, 0xfc, 0x24, 0x24, 0x24, 0x00, /*        *    ****  ******  **   *  ******  ******  *  *    *  *    *  *           */
00549 0x03, 0x03, 0x00, 0x00, 0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /*        *    ****  ******  **   *  ******  ******  *  *    *  *    *  *          **  **          **  **   *   *   *       */
00550
00551 /* Character (0xc7): bbw=7, bbh=10, bbx=0, bby=-2, width=8 */
00552 0xf0, 0xf8, 0x0c, 0x04, 0x04, 0x0c, 0x98, 0x00, /*     ****   *****  **      *       *       **       **  *         */
00553 0x00, 0x01, 0x0b, 0x0e, 0x02, 0x03, 0x01, 0x00, /*     ****   *****  **      *       *       **       **  *            *   ** * *** *  **  *        */
00554
00555 /* Character (0xc8): bbw=5, bbh=11, bbx=0, bby=0, width=6 */
00556 0xfc, 0xfc, 0x25, 0x24, 0x24, 0x00, /*   ******  ******* *  *    *  *    *  *           */
00557 0x03, 0x0b, 0x02, 0x02, 0x02, 0x00, /*   ******  ******* *  *    *  *    *  *          **  ** * *   *   *       */
00558
00559 /* Character (0xc9): bbw=5, bbh=11, bbx=0, bby=0, width=6 */
00560 0xfc, 0xfc, 0x25, 0x24, 0x24, 0x00, /*   ******  ******* *  *    *  *    *  *           */
00561 0x03, 0x03, 0x02, 0x0a, 0x02, 0x00, /*   ******  ******* *  *    *  *    *  *          **  **   *   * * *       */
00562
00563 /* Character (0xca): bbw=5, bbh=11, bbx=0, bby=0, width=6 */
00564 0xfc, 0xfd, 0x24, 0x25, 0x24, 0x00, /*   ******* ******  *  *  * *  *    *  *           */
00565 0x03, 0x03, 0x0a, 0x02, 0x02, 0x00, /*   ******* ******  *  *  * *  *    *  *          **  **   * * *   *       */
00566
00567 /* Character (0xcb): bbw=5, bbh=10, bbx=0, bby=0, width=6 */
00568 0xfc, 0xfd, 0x24, 0x25, 0x24, 0x00, /*   ******* ******  *  *  * *  *    *  *           */
00569 0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /*   ******* ******  *  *  * *  *    *  *          **  **   *   *   *       */
00570
00571 /* Character (0xcc): bbw=2, bbh=11, bbx=0, bby=0, width=3 */
00572 0xfc, 0xfd, 0x00, /*   ******* ******         */
00573 0x0b, 0x03, 0x00, /*   ******* ******        ** ***       */
00574
00575 /* Character (0xcd): bbw=2, bbh=11, bbx=0, bby=0, width=3 */
00576 0xfd, 0xfc, 0x00, /* * ******  ******         */
00577 0x03, 0x0b, 0x00, /* * ******  ******        **  ** *     */
00578
00579 /* Character (0xce): bbw=3, bbh=11, bbx=0, bby=0, width=3 */
00580 0xfd, 0xfc, 0x01, /* * ******  *******        */
00581 0x03, 0x0b, 0x00, /* * ******  *******       **  ** *     */
00582
00583 /* Character (0xcf): bbw=3, bbh=10, bbx=0, bby=0, width=3 */
00584 0xfd, 0xfc, 0x01, /* * ******  *******        */
00585 0x03, 0x03, 0x00, /* * ******  *******       **  **       */
00586
00587 /* Character (0xd0): bbw=6, bbh=8, bbx=0, bby=0, width=7 */
00588 0xfc, 0xfc, 0x24, 0x0c, 0xf8, 0xf0, 0x00, /*   ******  ******  *  *    **       *****    ****         */
00589 0x03, 0x03, 0x02, 0x03, 0x01, 0x00, 0x00, /*   ******  ******  *  *    **       *****    ****        **  **   *  **  *            */
00590
00591 /* Character (0xd1): bbw=7, bbh=11, bbx=0, bby=0, width=8 */
00592 0xfc, 0xfc, 0x11, 0x60, 0x81, 0xfc, 0xfc, 0x00, /*   ******  *******   *        ** *      *  ******  ******         */
00593 0x03, 0x03, 0x00, 0x08, 0x01, 0x0b, 0x03, 0x00, /*   ******  *******   *        ** *      *  ******  ******        **  **         **   ** ***       */
00594
00595 /* Character (0xd2): bbw=7, bbh=11, bbx=0, bby=0, width=8 */
00596 0xf0, 0xf8, 0x0c, 0x05, 0x0c, 0xf8, 0xf0, 0x00, /*     ****   *****  **    * *       **       *****    ****         */
00597 0x00, 0x01, 0x0b, 0x02, 0x03, 0x01, 0x00, 0x00, /*     ****   *****  **    * *       **       *****    ****            *   ** * *  **  *            */
00598
00599 /* Character (0xd3): bbw=7, bbh=11, bbx=0, bby=0, width=8 */
00600 0xf0, 0xf8, 0x0c, 0x04, 0x0d, 0xf8, 0xf0, 0x00, /*     ****   *****  **      *     * **       *****    ****         */
00601 0x00, 0x01, 0x03, 0x02, 0x03, 0x09, 0x00, 0x00, /*     ****   *****  **      *     * **       *****    ****            *   **   *  **  *  *         */
00602
00603 /* Character (0xd4): bbw=7, bbh=11, bbx=0, bby=0, width=8 */
00604 0xf0, 0xf8, 0x0d, 0x04, 0x0d, 0xf8, 0xf0, 0x00, /*     ****   ****** **      *     * **       *****    ****         */
00605 0x00, 0x01, 0x03, 0x0a, 0x03, 0x01, 0x00, 0x00, /*     ****   ****** **      *     * **       *****    ****            *   **   * ***  *            */
00606
00607 /* Character (0xd5): bbw=7, bbh=11, bbx=0, bby=0, width=8 */
00608 0xf0, 0xf8, 0x0d, 0x04, 0x0d, 0xf8, 0xf0, 0x00, /*     ****   ****** **      *     * **       *****    ****         */
00609 0x00, 0x01, 0x03, 0x0a, 0x03, 0x09, 0x00, 0x00, /*     ****   ****** **      *     * **       *****    ****            *   **   * ***  *  *         */
00610
00611 /* Character (0xd6): bbw=7, bbh=10, bbx=0, bby=0, width=8 */
00612 0xf0, 0xf8, 0x0d, 0x04, 0x0d, 0xf8, 0xf0, 0x00, /*     ****   ****** **      *     * **       *****    ****         */
00613 0x00, 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, 0x00, /*     ****   ****** **      *     * **       *****    ****            *   **   *  **  *            */
00614
00615 /* Character (0xd7): bbw=6, bbh=5, bbx=0, bby=1, width=6 */
00616 0x10, 0xb0, 0xe0, 0xe0, 0xb0, 0x10, /*     *       ** *     ***     ***    ** *    *    */
00617 0x01, 0x01, 0x00, 0x00, 0x01, 0x01, /*     *       ** *     ***     ***    ** *    *   *   *           *   *    */
00618
00619 /* Character (0xd8): bbw=7, bbh=8, bbx=0, bby=0, width=8 */
00620 0xf0, 0xf8, 0x8c, 0x64, 0x1c, 0xf8, 0xf4, 0x00, /*     ****   *****  **   *  *  **   ***      *****  * ****         */
00621 0x02, 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, 0x00, /*     ****   *****  **   *  *  **   ***      *****  * ****         *  *   **   *  **  *            */
00622
00623 /* Character (0xd9): bbw=6, bbh=11, bbx=0, bby=0, width=7 */
00624 0xfc, 0xfc, 0x00, 0x01, 0xfc, 0xfc, 0x00, /*   ******  ******        *         ******  ******         */
00625 0x01, 0x03, 0x0a, 0x02, 0x03, 0x01, 0x00, /*   ******  ******        *         ******  ******        *   **   * * *  **  *        */
00626
00627 /* Character (0xda): bbw=6, bbh=11, bbx=0, bby=0, width=7 */
00628 0xfc, 0xfc, 0x00, 0x01, 0xfc, 0xfc, 0x00, /*   ******  ******        *         ******  ******         */
00629 0x01, 0x03, 0x02, 0x02, 0x0b, 0x01, 0x00, /*   ******  ******        *         ******  ******        *   **   *   *  ** **        */
00630
00631 /* Character (0xdb): bbw=6, bbh=11, bbx=0, bby=0, width=7 */
00632 0xfc, 0xfc, 0x01, 0x00, 0xfd, 0xfc, 0x00, /*   ******  *******               * ******  ******         */
00633 0x01, 0x03, 0x02, 0x0a, 0x03, 0x01, 0x00, /*   ******  *******               * ******  ******        *   **   *   * ***  *        */
00634
00635 /* Character (0xdc): bbw=6, bbh=10, bbx=0, bby=0, width=7 */
00636 0xfc, 0xfc, 0x01, 0x00, 0xfd, 0xfc, 0x00, /*   ******  *******               * ******  ******         */
00637 0x01, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, /*   ******  *******               * ******  ******        *   **   *   *  **  *        */
00638
00639 /* Character (0xdd): bbw=8, bbh=11, bbx=0, bby=0, width=9 */
00640 0x0c, 0x3c, 0x70, 0xc0, 0xc1, 0x70, 0x3c, 0x0c, 0x00, /*   **      ****      ***       ***     **    ***   ****    **             */
00641 0x00, 0x00, 0x00, 0x03, 0x03, 0x08, 0x00, 0x00, 0x00, /*   **      ****      ***       ***     **    ***   ****    **                        **  **     *             */
00642
00643 /* Character (0xde): bbw=6, bbh=8, bbx=0, bby=0, width=7 */
00644 0xfc, 0xfc, 0x88, 0x88, 0xf8, 0x70, 0x00, /*   ******  ******   *   *   *   *   *****    ***          */
00645 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, /*   ******  ******   *   *   *   *   *****    ***         **  **                       */
00646
00647 /* Character (0xdf): bbw=5, bbh=8, bbx=0, bby=0, width=6 */
00648 0xf8, 0xfc, 0x04, 0x24, 0xd8, 0x00, /*    *****  ******  *       *  *     ** **         */
00649 0x03, 0x03, 0x00, 0x02, 0x01, 0x00, /*    *****  ******  *       *  *     ** **        **  **       *  *        */
00650
00651 /* Character (0xe0): bbw=6, bbh=9, bbx=0, bby=0, width=6 */
00652 0xa0, 0xd2, 0x54, 0xf0, 0xe0, 0x00, /*      * * *  * **  * * *     ****     ***         */
00653 0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /*      * * *  * **  * * *     ****     ***        *   **   *  *   **   *   */
00654
00655 /* Character (0xe1): bbw=6, bbh=9, bbx=0, bby=0, width=6 */
00656 0xa0, 0xd0, 0x50, 0xf4, 0xe2, 0x00, /*      * *    * **    * *   * **** *   ***         */
00657 0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /*      * *    * **    * *   * **** *   ***        *   **   *  *   **   *   */
00658
00659 /* Character (0xe2): bbw=6, bbh=9, bbx=0, bby=0, width=6 */
00660 0xa0, 0xd4, 0x56, 0xf2, 0xe4, 0x00, /*      * *  * * ** ** * *  *  ****  *  ***         */
00661 0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /*      * *  * * ** ** * *  *  ****  *  ***        *   **   *  *   **   *   */
00662
00663 /* Character (0xe3): bbw=6, bbh=9, bbx=0, bby=0, width=6 */
00664 0xa0, 0xd4, 0x52, 0xf4, 0xe2, 0x00, /*      * *  * * ** *  * *   * **** *   ***         */
00665 0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /*      * *  * * ** *  * *   * **** *   ***        *   **   *  *   **   *   */
00666
00667 /* Character (0xe4): bbw=6, bbh=9, bbx=0, bby=0, width=6 */
00668 0xa0, 0xd6, 0x50, 0xf6, 0xe0, 0x00, /*      * * ** * **    * *  ** ****     ***         */
00669 0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /*      * * ** * **    * *  ** ****     ***        *   **   *  *   **   *   */
00670
00671 /* Character (0xe5): bbw=6, bbh=9, bbx=0, bby=0, width=6 */
00672 0xa0, 0xd4, 0x5a, 0xf4, 0xe0, 0x00, /*      * *  * * ** * ** *   * ****     ***         */
00673 0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /*      * *  * * ** * ** *   * ****     ***        *   **   *  *   **   *   */
00674
00675 /* Character (0xe6): bbw=8, bbh=6, bbx=0, bby=0, width=9 */
00676 0xa0, 0xd0, 0x50, 0xf0, 0xf0, 0x50, 0x70, 0x60, 0x00, /*      * *    * **    * *     ****    ****    * *     ***      **          */
00677 0x01, 0x03, 0x02, 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*      * *    * **    * *     ****    ****    * *     ***      **         *   **   *  *   **   *  **  *        */
00678
00679 /* Character (0xe7): bbw=4, bbh=8, bbx=0, bby=-2, width=5 */
00680 0xe0, 0xf0, 0x10, 0x30, 0x00, /*      ***    ****    *       **           */
00681 0x01, 0x0b, 0x0e, 0x03, 0x00, /*      ***    ****    *       **          *   ** * *****       */
00682
00683 /* Character (0xe8): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00684 0xe0, 0xf2, 0x54, 0x70, 0x60, 0x00, /*      *** *  ****  * * *     ***      **          */
00685 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*      *** *  ****  * * *     ***      **         *   **   *  **  *        */
00686
00687 /* Character (0xe9): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00688 0xe0, 0xf0, 0x54, 0x72, 0x60, 0x00, /*      ***    ****  * * *  *  ***      **          */
00689 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*      ***    ****  * * *  *  ***      **         *   **   *  **  *        */
00690
00691 /* Character (0xea): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00692 0xe0, 0xf4, 0x52, 0x74, 0x60, 0x00, /*      ***  * **** *  * *   * ***      **          */
00693 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*      ***  * **** *  * *   * ***      **         *   **   *  **  *        */
00694
00695 /* Character (0xeb): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00696 0xe0, 0xf6, 0x50, 0x76, 0x60, 0x00, /*      *** ** ****    * *  ** ***      **          */
00697 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*      *** ** ****    * *  ** ***      **         *   **   *  **  *        */
00698
00699 /* Character (0xec): bbw=2, bbh=9, bbx=0, bby=0, width=3 */
00700 0xf2, 0xf4, 0x00, /*  *  ****  * ****         */
00701 0x03, 0x03, 0x00, /*  *  ****  * ****        **  **       */
00702
00703 /* Character (0xed): bbw=3, bbh=9, bbx=0, bby=0, width=3 */
00704 0xf0, 0xf4, 0x02, /*     ****  * **** *       */
00705 0x03, 0x03, 0x00, /*     ****  * **** *      **  **       */
00706
00707 /* Character (0xee): bbw=3, bbh=9, bbx=0, bby=0, width=4 */
00708 0x04, 0xf2, 0xf4, 0x00, /*   *      *  ****  * ****         */
00709 0x00, 0x03, 0x03, 0x00, /*   *      *  ****  * ****            **  **       */
00710
00711 /* Character (0xef): bbw=3, bbh=9, bbx=0, bby=0, width=3 */
00712 0xf6, 0xf0, 0x06, /*  ** ****    **** **      */
00713 0x03, 0x03, 0x00, /*  ** ****    **** **     **  **       */
00714
00715 /* Character (0xf0): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00716 0xe8, 0xf6, 0x1c, 0xf2, 0xe0, 0x00, /*    * *** ** ****  ***    *  ****     ***         */
00717 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*    * *** ** ****  ***    *  ****     ***        *   **   *  **  *        */
00718
00719 /* Character (0xf1): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00720 0xf0, 0xe4, 0x12, 0xf4, 0xe2, 0x00, /*     ****  *  *** *  *     * **** *   ***         */
00721 0x03, 0x03, 0x00, 0x03, 0x03, 0x00, /*     ****  *  *** *  *     * **** *   ***        **  **      **  **       */
00722
00723 /* Character (0xf2): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00724 0xe0, 0xf2, 0x14, 0xf0, 0xe0, 0x00, /*      *** *  ****  * *       ****     ***         */
00725 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*      *** *  ****  * *       ****     ***        *   **   *  **  *        */
00726
00727 /* Character (0xf3): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00728 0xe0, 0xf0, 0x14, 0xf2, 0xe0, 0x00, /*      ***    ****  * *    *  ****     ***         */
00729 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*      ***    ****  * *    *  ****     ***        *   **   *  **  *        */
00730
00731 /* Character (0xf4): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00732 0xe0, 0xf4, 0x12, 0xf4, 0xe0, 0x00, /*      ***  * **** *  *     * ****     ***         */
00733 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*      ***  * **** *  *     * ****     ***        *   **   *  **  *        */
00734
00735 /* Character (0xf5): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00736 0xe4, 0xf2, 0x14, 0xf2, 0xe0, 0x00, /*   *  *** *  ****  * *    *  ****     ***         */
00737 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*   *  *** *  ****  * *    *  ****     ***        *   **   *  **  *        */
00738
00739 /* Character (0xf6): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00740 0xe0, 0xf6, 0x10, 0xf6, 0xe0, 0x00, /*      *** ** ****    *    ** ****     ***         */
00741 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*      *** ** ****    *    ** ****     ***        *   **   *  **  *        */
00742
00743 /* Character (0xf7): bbw=6, bbh=5, bbx=0, bby=1, width=6 */
00744 0x40, 0x40, 0x50, 0x50, 0x40, 0x40, /*       *       *     * *     * *       *       *  */
00745 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /*       *       *     * *     * *       *       *         *   *            */
00746
00747 /* Character (0xf8): bbw=6, bbh=6, bbx=0, bby=0, width=6 */
00748 0xe0, 0xf0, 0x50, 0xf0, 0xe0, 0x10, /*      ***    ****    * *     ****     ***    *    */
00749 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /*      ***    ****    * *     ****     ***    *   *   **   *  **  *        */
00750
00751 /* Character (0xf9): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00752 0xf0, 0xf2, 0x04, 0xf0, 0xf0, 0x00, /*     **** *  ****  *         ****    ****         */
00753 0x01, 0x03, 0x02, 0x01, 0x03, 0x00, /*     **** *  ****  *         ****    ****        *   **   *  *   **       */
00754
00755 /* Character (0xfa): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00756 0xf0, 0xf0, 0x04, 0xf2, 0xf0, 0x00, /*     ****    ****  *      *  ****    ****         */
00757 0x01, 0x03, 0x02, 0x01, 0x03, 0x00, /*     ****    ****  *      *  ****    ****        *   **   *  *   **       */
00758
00759 /* Character (0xfb): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00760 0xf0, 0xf4, 0x02, 0xf4, 0xf0, 0x00, /*     ****  * **** *        * ****    ****         */
00761 0x01, 0x03, 0x02, 0x01, 0x03, 0x00, /*     ****  * **** *        * ****    ****        *   **   *  *   **       */
00762
00763 /* Character (0xfc): bbw=5, bbh=9, bbx=0, bby=0, width=6 */
00764 0xf0, 0xf6, 0x00, 0xf6, 0xf0, 0x00, /*     **** ** ****         ** ****    ****         */
00765 0x01, 0x03, 0x02, 0x01, 0x03, 0x00, /*     **** ** ****         ** ****    ****        *   **   *  *   **       */
00766
00767 /* Character (0xfd): bbw=5, bbh=11, bbx=0, bby=-2, width=6 */
00768 0xf0, 0xf0, 0x04, 0xf2, 0xf0, 0x00, /*     ****    ****  *      *  ****    ****         */
00769 0x00, 0x09, 0x0f, 0x07, 0x01, 0x00, /*     ****    ****  *      *  ****    ****            *  ******** *        */
00770
00771 /* Character (0xfe): bbw=5, bbh=10, bbx=0, bby=-2, width=6 */
00772 0xfc, 0xfc, 0x10, 0x30, 0xe0, 0x00, /*   ******  ******    *       **       ***         */
00773 0x0f, 0x0f, 0x02, 0x03, 0x01, 0x00, /*   ******  ******    *       **       ***        ******** *  **  *        */
00774
00775 /* Character (0xff): bbw=5, bbh=11, bbx=0, bby=-2, width=6 */
00776 0xf0, 0xf6, 0x00, 0xf6, 0xf0, 0x00, /*     **** ** ****         ** ****    ****         */
00777 0x00, 0x09, 0x0f, 0x07, 0x01, 0x00, /*     **** ** ****         ** ****    ****            *  ******** *        */
00778 };
00779
00780 /* Character->glyph data. */
00781 static const PROGMEM uint16_t helvB10_offset[] = {
00782   0,    /* (0x20) */
00783   6,    /* (0x21) */
00784   14,   /* (0x22) */
00785   24,   /* (0x23) */
00786   36,   /* (0x24) */
00787   48,   /* (0x25) */
00788   64,   /* (0x26) */
00789   80,   /* (0x27) */
00790   86,   /* (0x28) */
00791   94,   /* (0x29) */
00792   102,  /* (0x2a) */
00793   110,  /* (0x2b) */
00794   122,  /* (0x2c) */
00795   128,  /* (0x2d) */
00796   142,  /* (0x2e) */
00797   148,  /* (0x2f) */
00798   156,  /* (0x30) */
00799   168,  /* (0x31) */
00800   180,  /* (0x32) */
00801   192,  /* (0x33) */
00802   204,  /* (0x34) */
00803   216,  /* (0x35) */
00804   228,  /* (0x36) */
00805   240,  /* (0x37) */
00806   252,  /* (0x38) */
00807   264,  /* (0x39) */
00808   276,  /* (0x3a) */
00809   282,  /* (0x3b) */
00810   288,  /* (0x3c) */
00811   298,  /* (0x3d) */
00812   310,  /* (0x3e) */
00813   320,  /* (0x3f) */
00814   332,  /* (0x40) */
00815   354,  /* (0x41) */
00816   370,  /* (0x42) */
00817   384,  /* (0x43) */
00818   400,  /* (0x44) */
00819   414,  /* (0x45) */
00820   426,  /* (0x46) */
00821   438,  /* (0x47) */
00822   454,  /* (0x48) */
00823   468,  /* (0x49) */
00824   474,  /* (0x4a) */
00825   486,  /* (0x4b) */
00826   500,  /* (0x4c) */
00827   512,  /* (0x4d) */
00828   532,  /* (0x4e) */
00829   548,  /* (0x4f) */
00830   564,  /* (0x50) */
00831   578,  /* (0x51) */
00832   594,  /* (0x52) */
00833   608,  /* (0x53) */
00834   622,  /* (0x54) */
00835   636,  /* (0x55) */
00836   650,  /* (0x56) */
00837   666,  /* (0x57) */
00838   688,  /* (0x58) */
00839   704,  /* (0x59) */
00840   722,  /* (0x5a) */
00841   736,  /* (0x5b) */
00842   744,  /* (0x5c) */
00843   752,  /* (0x5d) */
00844   760,  /* (0x5e) */
00845   770,  /* (0x5f) */
00846   782,  /* (0x60) */
00847   788,  /* (0x61) */
00848   800,  /* (0x62) */
00849   812,  /* (0x63) */
00850   822,  /* (0x64) */
00851   834,  /* (0x65) */
00852   846,  /* (0x66) */
00853   854,  /* (0x67) */
00854   866,  /* (0x68) */
00855   878,  /* (0x69) */
00856   884,  /* (0x6a) */
00857   890,  /* (0x6b) */
00858   902,  /* (0x6c) */
00859   908,  /* (0x6d) */
00860   926,  /* (0x6e) */
00861   938,  /* (0x6f) */
00862   950,  /* (0x70) */
00863   962,  /* (0x71) */
00864   974,  /* (0x72) */
00865   982,  /* (0x73) */
00866   994,  /* (0x74) */
00867   1002, /* (0x75) */
00868   1014, /* (0x76) */
00869   1026, /* (0x77) */
00870   1042, /* (0x78) */
00871   1056, /* (0x79) */
00872   1068, /* (0x7a) */
00873   1080, /* (0x7b) */
00874   1090, /* (0x7c) */
00875   1096, /* (0x7d) */
00876   1106, /* (0x7e) */
00877   0,    /* (0x7f) */
00878   0,    /* (0x80) */
00879   0,    /* (0x81) */
00880   0,    /* (0x82) */
00881   0,    /* (0x83) */
00882   0,    /* (0x84) */
00883   0,    /* (0x85) */
00884   0,    /* (0x86) */
00885   0,    /* (0x87) */
00886   0,    /* (0x88) */
00887   0,    /* (0x89) */
00888   0,    /* (0x8a) */
00889   0,    /* (0x8b) */
00890   0,    /* (0x8c) */
00891   0,    /* (0x8d) */
00892   0,    /* (0x8e) */
00893   0,    /* (0x8f) */
00894   0,    /* (0x90) */
00895   0,    /* (0x91) */
00896   0,    /* (0x92) */
00897   0,    /* (0x93) */
00898   0,    /* (0x94) */
00899   0,    /* (0x95) */
00900   0,    /* (0x96) */
00901   0,    /* (0x97) */
00902   0,    /* (0x98) */
00903   0,    /* (0x99) */
00904   0,    /* (0x9a) */
00905   0,    /* (0x9b) */
00906   0,    /* (0x9c) */
00907   0,    /* (0x9d) */
00908   0,    /* (0x9e) */
00909   0,    /* (0x9f) */
00910   1118, /* (0xa0) */
00911   1124, /* (0xa1) */
00912   1132, /* (0xa2) */
00913   1144, /* (0xa3) */
00914   1156, /* (0xa4) */
00915   1168, /* (0xa5) */
00916   1182, /* (0xa6) */
00917   1188, /* (0xa7) */
00918   1200, /* (0xa8) */
00919   1206, /* (0xa9) */
00920   1226, /* (0xaa) */
00921   1236, /* (0xab) */
00922   1250, /* (0xac) */
00923   1264, /* (0xad) */
00924   1274, /* (0xae) */
00925   1294, /* (0xaf) */
00926   1300, /* (0xb0) */
00927   1308, /* (0xb1) */
00928   1320, /* (0xb2) */
00929   1326, /* (0xb3) */
00930   1332, /* (0xb4) */
00931   1338, /* (0xb5) */
00932   1350, /* (0xb6) */
00933   1362, /* (0xb7) */
00934   1368, /* (0xb8) */
00935   1374, /* (0xb9) */
00936   1380, /* (0xba) */
00937   1390, /* (0xbb) */
00938   1404, /* (0xbc) */
00939   1422, /* (0xbd) */
00940   1440, /* (0xbe) */
00941   1458, /* (0xbf) */
00942   1470, /* (0xc0) */
00943   1486, /* (0xc1) */
00944   1502, /* (0xc2) */
00945   1518, /* (0xc3) */
00946   1534, /* (0xc4) */
00947   1550, /* (0xc5) */
00948   1566, /* (0xc6) */
00949   1586, /* (0xc7) */
00950   1602, /* (0xc8) */
00951   1614, /* (0xc9) */
00952   1626, /* (0xca) */
00953   1638, /* (0xcb) */
00954   1650, /* (0xcc) */
00955   1656, /* (0xcd) */
00956   1662, /* (0xce) */
00957   1668, /* (0xcf) */
00958   1674, /* (0xd0) */
00959   1688, /* (0xd1) */
00960   1704, /* (0xd2) */
00961   1720, /* (0xd3) */
00962   1736, /* (0xd4) */
00963   1752, /* (0xd5) */
00964   1768, /* (0xd6) */
00965   1784, /* (0xd7) */
00966   1796, /* (0xd8) */
00967   1812, /* (0xd9) */
00968   1826, /* (0xda) */
00969   1840, /* (0xdb) */
00970   1854, /* (0xdc) */
00971   1868, /* (0xdd) */
00972   1886, /* (0xde) */
00973   1900, /* (0xdf) */
00974   1912, /* (0xe0) */
00975   1924, /* (0xe1) */
00976   1936, /* (0xe2) */
00977   1948, /* (0xe3) */
00978   1960, /* (0xe4) */
00979   1972, /* (0xe5) */
00980   1984, /* (0xe6) */
00981   2002, /* (0xe7) */
00982   2012, /* (0xe8) */
00983   2024, /* (0xe9) */
00984   2036, /* (0xea) */
00985   2048, /* (0xeb) */
00986   2060, /* (0xec) */
00987   2066, /* (0xed) */
00988   2072, /* (0xee) */
00989   2080, /* (0xef) */
00990   2086, /* (0xf0) */
00991   2098, /* (0xf1) */
00992   2110, /* (0xf2) */
00993   2122, /* (0xf3) */
00994   2134, /* (0xf4) */
00995   2146, /* (0xf5) */
00996   2158, /* (0xf6) */
00997   2170, /* (0xf7) */
00998   2182, /* (0xf8) */
00999   2194, /* (0xf9) */
01000   2206, /* (0xfa) */
01001   2218, /* (0xfb) */
01002   2230, /* (0xfc) */
01003   2242, /* (0xfd) */
01004   2254, /* (0xfe) */
01005   2266, /* (0xff) */
01006 };
01007
01008 /* Character width data. */
01009 static const PROGMEM uint8_t helvB10_width[] = {
01010   3,    /* (0x20) */
01011   4,    /* (0x21) */
01012   5,    /* (0x22) */
01013   6,    /* (0x23) */
01014   6,    /* (0x24) */
01015   8,    /* (0x25) */
01016   8,    /* (0x26) */
01017   3,    /* (0x27) */
01018   4,    /* (0x28) */
01019   4,    /* (0x29) */
01020   4,    /* (0x2a) */
01021   6,    /* (0x2b) */
01022   3,    /* (0x2c) */
01023   7,    /* (0x2d) */
01024   3,    /* (0x2e) */
01025   4,    /* (0x2f) */
01026   6,    /* (0x30) */
01027   6,    /* (0x31) */
01028   6,    /* (0x32) */
01029   6,    /* (0x33) */
01030   6,    /* (0x34) */
01031   6,    /* (0x35) */
01032   6,    /* (0x36) */
01033   6,    /* (0x37) */
01034   6,    /* (0x38) */
01035   6,    /* (0x39) */
01036   3,    /* (0x3a) */
01037   3,    /* (0x3b) */
01038   5,    /* (0x3c) */
01039   6,    /* (0x3d) */
01040   5,    /* (0x3e) */
01041   6,    /* (0x3f) */
01042   11,   /* (0x40) */
01043   8,    /* (0x41) */
01044   7,    /* (0x42) */
01045   8,    /* (0x43) */
01046   7,    /* (0x44) */
01047   6,    /* (0x45) */
01048   6,    /* (0x46) */
01049   8,    /* (0x47) */
01050   7,    /* (0x48) */
01051   3,    /* (0x49) */
01052   6,    /* (0x4a) */
01053   7,    /* (0x4b) */
01054   6,    /* (0x4c) */
01055   10,   /* (0x4d) */
01056   8,    /* (0x4e) */
01057   8,    /* (0x4f) */
01058   7,    /* (0x50) */
01059   8,    /* (0x51) */
01060   7,    /* (0x52) */
01061   7,    /* (0x53) */
01062   7,    /* (0x54) */
01063   7,    /* (0x55) */
01064   8,    /* (0x56) */
01065   11,   /* (0x57) */
01066   8,    /* (0x58) */
01067   9,    /* (0x59) */
01068   7,    /* (0x5a) */
01069   4,    /* (0x5b) */
01070   4,    /* (0x5c) */
01071   4,    /* (0x5d) */
01072   5,    /* (0x5e) */
01073   6,    /* (0x5f) */
01074   3,    /* (0x60) */
01075   6,    /* (0x61) */
01076   6,    /* (0x62) */
01077   5,    /* (0x63) */
01078   6,    /* (0x64) */
01079   6,    /* (0x65) */
01080   4,    /* (0x66) */
01081   6,    /* (0x67) */
01082   6,    /* (0x68) */
01083   3,    /* (0x69) */
01084   3,    /* (0x6a) */
01085   6,    /* (0x6b) */
01086   3,    /* (0x6c) */
01087   9,    /* (0x6d) */
01088   6,    /* (0x6e) */
01089   6,    /* (0x6f) */
01090   6,    /* (0x70) */
01091   6,    /* (0x71) */
01092   4,    /* (0x72) */
01093   6,    /* (0x73) */
01094   4,    /* (0x74) */
01095   6,    /* (0x75) */
01096   6,    /* (0x76) */
01097   8,    /* (0x77) */
01098   7,    /* (0x78) */
01099   6,    /* (0x79) */
01100   6,    /* (0x7a) */
01101   5,    /* (0x7b) */
01102   3,    /* (0x7c) */
01103   5,    /* (0x7d) */
01104   6,    /* (0x7e) */
01105   3,    /* (0x7f) */
01106   3,    /* (0x80) */
01107   3,    /* (0x81) */
01108   3,    /* (0x82) */
01109   3,    /* (0x83) */
01110   3,    /* (0x84) */
01111   3,    /* (0x85) */
01112   3,    /* (0x86) */
01113   3,    /* (0x87) */
01114   3,    /* (0x88) */
01115   3,    /* (0x89) */
01116   3,    /* (0x8a) */
01117   3,    /* (0x8b) */
01118   3,    /* (0x8c) */
01119   3,    /* (0x8d) */
01120   3,    /* (0x8e) */
01121   3,    /* (0x8f) */
01122   3,    /* (0x90) */
01123   3,    /* (0x91) */
01124   3,    /* (0x92) */
01125   3,    /* (0x93) */
01126   3,    /* (0x94) */
01127   3,    /* (0x95) */
01128   3,    /* (0x96) */
01129   3,    /* (0x97) */
01130   3,    /* (0x98) */
01131   3,    /* (0x99) */
01132   3,    /* (0x9a) */
01133   3,    /* (0x9b) */
01134   3,    /* (0x9c) */
01135   3,    /* (0x9d) */
01136   3,    /* (0x9e) */
01137   3,    /* (0x9f) */
01138   3,    /* (0xa0) */
01139   4,    /* (0xa1) */
01140   6,    /* (0xa2) */
01141   6,    /* (0xa3) */
01142   6,    /* (0xa4) */
01143   7,    /* (0xa5) */
01144   3,    /* (0xa6) */
01145   6,    /* (0xa7) */
01146   3,    /* (0xa8) */
01147   10,   /* (0xa9) */
01148   5,    /* (0xaa) */
01149   7,    /* (0xab) */
01150   7,    /* (0xac) */
01151   5,    /* (0xad) */
01152   10,   /* (0xae) */
01153   3,    /* (0xaf) */
01154   4,    /* (0xb0) */
01155   6,    /* (0xb1) */
01156   3,    /* (0xb2) */
01157   3,    /* (0xb3) */
01158   3,    /* (0xb4) */
01159   6,    /* (0xb5) */
01160   6,    /* (0xb6) */
01161   3,    /* (0xb7) */
01162   3,    /* (0xb8) */
01163   3,    /* (0xb9) */
01164   5,    /* (0xba) */
01165   7,    /* (0xbb) */
01166   9,    /* (0xbc) */
01167   9,    /* (0xbd) */
01168   9,    /* (0xbe) */
01169   6,    /* (0xbf) */
01170   8,    /* (0xc0) */
01171   8,    /* (0xc1) */
01172   8,    /* (0xc2) */
01173   8,    /* (0xc3) */
01174   8,    /* (0xc4) */
01175   8,    /* (0xc5) */
01176   10,   /* (0xc6) */
01177   8,    /* (0xc7) */
01178   6,    /* (0xc8) */
01179   6,    /* (0xc9) */
01180   6,    /* (0xca) */
01181   6,    /* (0xcb) */
01182   3,    /* (0xcc) */
01183   3,    /* (0xcd) */
01184   3,    /* (0xce) */
01185   3,    /* (0xcf) */
01186   7,    /* (0xd0) */
01187   8,    /* (0xd1) */
01188   8,    /* (0xd2) */
01189   8,    /* (0xd3) */
01190   8,    /* (0xd4) */
01191   8,    /* (0xd5) */
01192   8,    /* (0xd6) */
01193   6,    /* (0xd7) */
01194   8,    /* (0xd8) */
01195   7,    /* (0xd9) */
01196   7,    /* (0xda) */
01197   7,    /* (0xdb) */
01198   7,    /* (0xdc) */
01199   9,    /* (0xdd) */
01200   7,    /* (0xde) */
01201   6,    /* (0xdf) */
01202   6,    /* (0xe0) */
01203   6,    /* (0xe1) */
01204   6,    /* (0xe2) */
01205   6,    /* (0xe3) */
01206   6,    /* (0xe4) */
01207   6,    /* (0xe5) */
01208   9,    /* (0xe6) */
01209   5,    /* (0xe7) */
01210   6,    /* (0xe8) */
01211   6,    /* (0xe9) */
01212   6,    /* (0xea) */
01213   6,    /* (0xeb) */
01214   3,    /* (0xec) */
01215   3,    /* (0xed) */
01216   4,    /* (0xee) */
01217   3,    /* (0xef) */
01218   6,    /* (0xf0) */
01219   6,    /* (0xf1) */
01220   6,    /* (0xf2) */
01221   6,    /* (0xf3) */
01222   6,    /* (0xf4) */
01223   6,    /* (0xf5) */
01224   6,    /* (0xf6) */
01225   6,    /* (0xf7) */
01226   6,    /* (0xf8) */
01227   6,    /* (0xf9) */
01228   6,    /* (0xfa) */
01229   6,    /* (0xfb) */
01230   6,    /* (0xfc) */
01231   6,    /* (0xfd) */
01232   6,    /* (0xfe) */
01233   6,    /* (0xff) */
01234 };
01235
01236 /* Font structure definition. */
01237 EXTERN_CONST Font font_helvB10 =
01238 {
01239     /* .glyph  = */ font_helvB10_glyphs,
01240     /* .name   =    "helvB10", */
01241     /* .width  = */ 11,
01242     /* .height = */ 12,
01243     /* .ascent =    10, */
01244     /* .first  = */ 32,
01245     /* .last   = */ 255,
01246     /* .offset = */ helvB10_offset,
01247     /* .width  = */ helvB10_width,
01248 };


BeRTOS: hex.c File Reference

  • mware
hex.c File Reference

Poor man's hex arrays (implementation). More...

#include "hex.h"

Go to the source code of this file.

Detailed Description

Poor man's hex arrays (implementation).

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file hex.c.


BeRTOS: hex.c Source File

  • mware
hex.c
Go to the documentation of this file.
00001
00038 #include "hex.h"
00039
00040 const char hex_tab[16] = { '0','1','2','3','4','5','6','7','8','9','a','b','c','d','e','f' };
00041 const char HEX_tab[16] = { '0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F' };


BeRTOS: hex.h File Reference

  • mware
hex.h File Reference

Poor man's hex arrays (implementation). More...

Go to the source code of this file.

Detailed Description

Poor man's hex arrays (implementation).

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file hex.h.


BeRTOS: hex.h Source File

  • mware
hex.h
Go to the documentation of this file.
00001
00039 #ifndef MWARE_HEX_H
00040 #define MWARE_HEX_H
00041
00042 extern const char hex_tab[16];
00043 extern const char HEX_tab[16];
00044
00045 #endif /* MWARE_HEX_H */


BeRTOS: hmac.c File Reference

  • sec
  • mac
hmac.c File Reference

HMAC implementation. More...

#include "hmac.h"
#include <sec/util.h>
#include <string.h>

Go to the source code of this file.

Detailed Description

HMAC implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file hmac.c.


BeRTOS: hmac.c Source File

  • sec
  • mac
hmac.c
Go to the documentation of this file.
00001
00038 #include "hmac.h"
00039 #include <sec/util.h>
00040 #include <string.h>
00041
00042
00043 static void hmac_set_key(Mac *m, const void *key, size_t key_len)
00044 {
00045     HmacContext *ctx = (HmacContext *)m;
00046
00047     memset(ctx->key, 0, ctx->m.key_len);
00048     if (key_len <= ctx->m.key_len)
00049         memcpy(ctx->key, key, key_len);
00050     else
00051     {
00052         hash_begin(ctx->h);
00053         hash_update(ctx->h, key, key_len);
00054         memcpy(ctx->key, hash_final(ctx->h), hash_digest_len(ctx->h));
00055     }
00056
00057     xor_block_const(ctx->key, ctx->key, 0x5C, ctx->m.key_len);
00058 }
00059
00060 static void hmac_begin(Mac *m)
00061 {
00062     HmacContext *ctx = (HmacContext *)m;
00063     int klen = ctx->m.key_len;
00064
00065     xor_block_const(ctx->key, ctx->key, 0x36^0x5C, klen);
00066     hash_begin(ctx->h);
00067     hash_update(ctx->h, ctx->key, klen);
00068 }
00069
00070 static void hmac_update(Mac *m, const void *data, size_t len)
00071 {
00072     HmacContext *ctx = (HmacContext *)m;
00073     hash_update(ctx->h, data, len);
00074 }
00075
00076 static uint8_t *hmac_final(Mac *m)
00077 {
00078     HmacContext *ctx = (HmacContext *)m;
00079     int hlen = hash_digest_len(ctx->h);
00080
00081     uint8_t temp[hlen];
00082     memcpy(temp, hash_final(ctx->h), hlen);
00083
00084     xor_block_const(ctx->key, ctx->key, 0x5C^0x36, ctx->m.key_len);
00085     hash_begin(ctx->h);
00086     hash_update(ctx->h, ctx->key, ctx->m.key_len);
00087     hash_update(ctx->h, temp, hlen);
00088
00089     PURGE(temp);
00090     return hash_final(ctx->h);
00091 }
00092
00093 /*********************************************************************/
00094
00095 void hmac_init(HmacContext *ctx, Hash *h)
00096 {
00097     ctx->h = h;
00098     ctx->m.key_len = hash_block_len(h);
00099     ctx->m.digest_len = hash_digest_len(h);
00100     ctx->m.set_key = hmac_set_key;
00101     ctx->m.begin = hmac_begin;
00102     ctx->m.update = hmac_update;
00103     ctx->m.final = hmac_final;
00104     ASSERT(sizeof(ctx->key) >= ctx->m.key_len);
00105 }


BeRTOS: hmac.h File Reference

  • sec
  • mac
hmac.h File Reference

HMAC (RFC 2104) implementation. More...

#include <sec/mac.h>
#include <sec/hash.h>
#include <alloca.h>

Go to the source code of this file.

Detailed Description

HMAC (RFC 2104) implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file hmac.h.


BeRTOS: hmac.h Source File

  • sec
  • mac
hmac.h
Go to the documentation of this file.
00001
00038 #ifndef SEC_MAC_HMAC_H
00039 #define SEC_MAC_HMAC_H
00040
00041 #include <sec/mac.h>
00042 #include <sec/hash.h>
00043
00044 #include <alloca.h>
00045
00046 typedef struct HmacContext
00047 {
00048     Mac m;
00049     Hash *h;
00050     uint8_t key[64];
00051 } HmacContext;
00052
00053 void hmac_init(HmacContext* hmac, Hash *h);
00054
00055 #define hmac_stackinit(...) \
00056     ({ HmacContext *ctx = alloca(sizeof(HmacContext)); hmac_init(ctx, ##__VA_ARGS__); &ctx->m; })
00057
00058 int hmac_testSetup(void);
00059 int hmac_testRun(void);
00060 int hmac_testTearDown(void);
00061
00062 #endif /* SEC_MAC_HMAC_H */


BeRTOS: hptime.c File Reference

  • os
Functions
hptime.c File Reference

Portable abstraction for high-resolution time handling (implementation) More...

#include "hptime.h"
#include <sys/time.h>
#include <stddef.h>

Go to the source code of this file.

Functions

hptime_t hptime_get (void)
Return the current time with the maximum precision made available from the hosting OS.

Detailed Description

Portable abstraction for high-resolution time handling (implementation)

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file hptime.c.


BeRTOS: hptime.c Source File

  • os
hptime.c
Go to the documentation of this file.
00001
00038 #include "hptime.h"
00039
00040 #if defined(_WIN32)
00041
00042 #include <windows.h>
00043
00044 hptime_t hptime_get(void)
00045 {
00046     FILETIME ft;
00047
00048     /*
00049      * La precisione dei FileTime sarebbe 100ns, ma il
00050      * valore viene ottenuto convertendo una struttura
00051      * SYSTEMTIME, che ha precisione di 1ms. Il numero
00052      * che otteniamo e' quindi sempre un multiplo di
00053      * 100000.
00054      */
00055     GetSystemTimeAsFileTime(&ft);
00056
00057     /* Copy the upper/lower into a quadword. */
00058     return (((hptime_t)ft.dwHighDateTime) << 32) + (hptime_t)ft.dwLowDateTime;
00059 }
00060
00061 #elif defined(__unix__) || (defined(__APPLE__) && defined(__MACH__))
00062
00063 #include <sys/time.h> /* for gettimeofday() */
00064 #include <stddef.h> /* for NULL */
00065
00066 hptime_t hptime_get(void)
00067 {
00068     struct timeval tv;
00069
00070     gettimeofday(&tv, NULL);
00071     return (hptime_t)tv.tv_sec * HPTIME_TICKS_PER_SECOND
00072         + (hptime_t)tv.tv_usec;
00073 }
00074
00075 #else /* !__unix__ */
00076     #error OS dependent support code missing for this OS
00077 #endif /* !__unix__ */
00078


BeRTOS: hptime.h File Reference

  • os
Typedefs | Functions
hptime.h File Reference

Portable abstraction for high-resolution time handling (interface) More...

#include <stdint.h>

Go to the source code of this file.

Typedefs

typedef int64_t | hptime_t
Type for "high precision absolute time".

Functions

hptime_t | hptime_get (void)
Return the current time with the maximum precision made available from the hosting OS.

Detailed Description

Portable abstraction for high-resolution time handling (interface)

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file hptime.h.

Typedef Documentation

typedef int64_t hptime_t

Type for "high precision absolute time".

Definition at line 66 of file hptime.h.


BeRTOS: hptime.h Source File

  • os
hptime.h
Go to the documentation of this file.
00001
00037 #ifndef HPTIME_H
00038 #define HPTIME_H
00039
00040 #ifdef __cplusplus
00041 extern "C" {
00042 #endif /* __cplusplus */
00043
00044 #ifdef _WIN32
00045
00047     typedef __int64 hptime_t;
00048     #define SIZEOF_HPTIME_T 8
00049
00050     #define HPTIME_TICKS_PER_SECOND     (10000000I64)
00051     #define HPTIME_TICKS_PER_MILLISEC   (10000I64)
00052     #define HPTIME_TICKS_PER_MICRO      (10I64)
00053
00054 #elif defined(__unix__) || (defined(__APPLE__) && defined(__MACH__))
00055
00056     #include <stdint.h> /* int64_t */
00057
00058     #ifndef DEVLIB_MTIME_DEFINED
00059         #define DEVLIB_MTIME_DEFINED 1 /* Resolve conflict with <cfg/compiler.h> */
00060         typedef int32_t mtime_t;
00061         #define SIZEOF_MTIME_T (32 / CPU_BITS_PER_CHAR)
00062         #define MTIME_INFINITE 0x7FFFFFFFL
00063     #endif
00064
00066     typedef int64_t hptime_t;
00067     #define SIZEOF_HPTIME_T 8
00068
00069     #define HPTIME_TICKS_PER_SECOND     (1000000LL)
00070     #define HPTIME_TICKS_PER_MILLISEC   (1000LL)
00071     #define HPTIME_TICKS_PER_MICRO      (1LL)
00072
00073 #else /* !__unix__ */
00074     #error OS dependent support code missing for this OS
00075 #endif /* !__unix__ */
00076
00080 extern hptime_t hptime_get(void);
00081
00082 #ifdef __cplusplus
00083 }
00084 #endif /* __cplusplus */
00085
00086 #endif /* HPTIME_H */


BeRTOS: hw_afsk.h File Reference

  • hw
Defines
hw_afsk.h File Reference

AFSK modem hardware-specific definitions. More...

#include "cfg/cfg_arch.h"

Go to the source code of this file.

Defines

#define | AFSK_ADC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0)
Initialize the specified channel of the ADC for AFSK needs.
#define | AFSK_DAC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0)
Initialize the specified channel of the DAC for AFSK needs.
#define | AFSK_DAC_IRQ_START(ch) do { (void)ch; /* Implement me */ } while (0)
Start DAC convertions on channel ch.
#define | AFSK_DAC_IRQ_STOP(ch) do { (void)ch; /* Implement me */ } while (0)
Stop DAC convertions on channel ch.

Detailed Description

AFSK modem hardware-specific definitions.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file hw_afsk.h.

Define Documentation

#define AFSK_ADC_INIT | ( | ch,
 |  | ctx
 | ) | do { (void)ch, (void)ctx; } while (0)

Initialize the specified channel of the ADC for AFSK needs.

The adc should be configured to have a continuos stream of convertions. For every convertion there must be an ISR that read the sample and call afsk_adc_isr(), passing the context and the sample.

Parameters:
ch | channel to be used for AFSK demodulation.
ctx | AFSK context (
See also:
Afsk). This parameter must be saved and passed back to afsk_adc_isr() for every convertion.

Definition at line 55 of file hw_afsk.h.

#define AFSK_DAC_INIT | ( | ch,
 |  | ctx
 | ) | do { (void)ch, (void)ctx; } while (0)

Initialize the specified channel of the DAC for AFSK needs.

The DAC has to be configured in order to call an ISR for every sample sent. The DAC doesn't have to start the IRQ immediatly but have to wait the AFSK driver to call AFSK_DAC_IRQ_START(). The ISR must then call afsk_dac_isr() passing the AFSK context.

Parameters:
ch | DAC channel to be used for AFSK modulation.
ctx | AFSK context (
See also:
Afsk). This parameter must be saved and passed back to afsk_dac_isr() for every convertion.

Definition at line 71 of file hw_afsk.h.

#define AFSK_DAC_IRQ_START ( ch ) do { (void)ch; /* Implement me */ } while (0)

Start DAC convertions on channel ch.

Parameters:
ch DAC channel.

Definition at line 77 of file hw_afsk.h.

#define AFSK_DAC_IRQ_STOP ( ch ) do { (void)ch; /* Implement me */ } while (0)

Stop DAC convertions on channel ch.

Parameters:
ch DAC channel.

Definition at line 83 of file hw_afsk.h.


BeRTOS: hw_afsk.h Source File

  • hw
hw_afsk.h
Go to the documentation of this file.
00001
00038 #ifndef HW_AFSK_H
00039 #define HW_AFSK_H
00040
00041 #include "cfg/cfg_arch.h"
00042
00043 #warning TODO:This is an example implementation, you must implement it!
00044
00055 #define AFSK_ADC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0)
00056
00057 #define AFSK_STROBE_INIT() do { /* Implement me */ } while (0)
00058 #define AFSK_STROBE_ON()   do { /* Implement me */ } while (0)
00059 #define AFSK_STROBE_OFF()  do { /* Implement me */ } while (0)
00060
00071 #define AFSK_DAC_INIT(ch, ctx)   do { (void)ch, (void)ctx; } while (0)
00072
00077 #define AFSK_DAC_IRQ_START(ch)   do { (void)ch; /* Implement me */ } while (0)
00078
00083 #define AFSK_DAC_IRQ_STOP(ch)    do { (void)ch; /* Implement me */ } while (0)
00084
00085 #endif /* HW_AFSK_H */


BeRTOS: hw_blanker.h File Reference

  • hw
hw_blanker.h File Reference

Hardware-specific definitions. More...

Go to the source code of this file.

Detailed Description

Hardware-specific definitions.

Author:
Daniele Basile <asterix@develer.com>

Definition in file hw_blanker.h.


BeRTOS: hw_blanker.h Source File

  • hw
hw_blanker.h
Go to the documentation of this file.
00001
00039 #ifndef HW_BALNCKER_H
00040 #define HW_BALNCKER_H
00041
00042 #warning TODO:This is an example implementation, you must implement it!
00043
00044 #define BLK_LCDON   /* power_LcdOn() Implement me! */
00045 #define BLK_LCDOFF  /* power_LcdOff() Implement me! */
00046
00047
00048 #endif /*  HW_BLANCKER_H */
00049


BeRTOS: hw_boot.h File Reference

  • hw
Defines
hw_boot.h File Reference

Bootloader hardware specific definition. More...

Go to the source code of this file.

Defines

#define FLASH_BOOT_SIZE 0x8000
Define bootloader flash size.

Detailed Description

Bootloader hardware specific definition.

Author:
Daniele Basile <asteix@develer.com>

Definition in file hw_boot.h.

Define Documentation

#define FLASH_BOOT_SIZE 0x8000

Define bootloader flash size.

Note: Remember that this size should be comply to size defined in linker script, otherwise you could not find the main program application.

Definition at line 48 of file hw_boot.h.


BeRTOS: hw_boot.h Source File

  • hw
hw_boot.h
Go to the documentation of this file.
00001
00038 #ifndef HW_BOOT_H
00039 #define HW_BOOT_H
00040
00048 #define FLASH_BOOT_SIZE 0x8000 // 32kbyte
00049
00050 #endif /*  HW_BOOT_H */


BeRTOS: hw_buzzer.h File Reference

  • hw
hw_buzzer.h File Reference

Buzzer hardware-specific definitions. More...

Go to the source code of this file.

Detailed Description

Buzzer hardware-specific definitions.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file hw_buzzer.h.


BeRTOS: hw_buzzer.h Source File

  • hw
hw_buzzer.h
Go to the documentation of this file.
00001
00040 #ifndef HW_BUZZER_H
00041 #define HW_BUZZER_H
00042
00043 #warning TODO:This is an example implementation, you must implement it!
00044
00045 #define BUZZER_BIT      1
00046 #define IS_BUZZER_ON    0
00047 #define BUZZER_HW_INIT  do { /* Implement me! */ } while (0)
00048 #define BUZZER_ON       do { /* Implement me! */ } while (0)
00049 #define BUZZER_OFF      do { /* Implement me! */ } while (0)
00050
00051 #endif /* HW_BUZZER_H */


BeRTOS: hw_buzzerled.h File Reference

  • hw
hw_buzzerled.h File Reference

Buzzerled hardware-specific definitions. More...

Go to the source code of this file.

Detailed Description

Buzzerled hardware-specific definitions.

Author:
Daniele Basile <asterix@develer.com>

Definition in file hw_buzzerled.h.


BeRTOS: hw_buzzerled.h Source File

  • hw
hw_buzzerled.h
Go to the documentation of this file.
00001
00040 #ifndef HW_BUZZERLED_H
00041 #define HW_BUZZERLED_H
00042
00043 #warning TODO:This is an example implementation, you must implement it!
00044
00045
00046 #endif /* HW_BUZZERLED_H */


BeRTOS: hw_cpufreq.h File Reference

  • hw
hw_cpufreq.h File Reference

Hardware-specific definitions. More...

#include "hw/hw_cpu.h"

Go to the source code of this file.

Detailed Description

Hardware-specific definitions.

Author:
Francesco Sacchi <bernie@codewiz.org>

Definition in file hw_cpufreq.h.


BeRTOS: hw_cpufreq.h Source File

  • hw
hw_cpufreq.h
Go to the documentation of this file.
00001
00039 #ifndef HW_CPUFREQ_H
00040 #define HW_CPUFREQ_H
00041
00042 #ifndef CPU_FREQ
00043     #warning CPU_FREQ is not defined, you should upgrade to the newer clock frequency defining method.
00044
00045     /*
00046      * This file is DEPRECATED, it will be removed in the next major release.
00047      * We have set up a new cpu frequency definition method.
00048      * The new macro CPU_FREQ should be defined as a compiler flag in the
00049      * makefile instead of the old CLOCK_FREQ macro. With new projects you should only
00050      * use the CPU_FREQ macro.
00051      *
00052      * With gcc you should add something like this:
00053      *
00054      * -D'CPU_FREQ=(12288000UL)'
00055      *
00056      * For backward compatibility the old method is still supported.
00057      */
00058     #include "hw/hw_cpu.h"
00059
00060     #define CPU_FREQ (CLOCK_FREQ)
00061 #endif /* CPU_FREQ */
00062
00063 #endif /*  HW_CPUFREQ_H */


BeRTOS: hw_dataflash.c File Reference

  • hw
Functions
hw_dataflash.c File Reference

Dataflash HW control routines. More...

#include "hw/hw_dataflash.h"
#include <cfg/compiler.h>
#include <cfg/module.h>
#include <cfg/macros.h>

Go to the source code of this file.

Functions

void | dataflash_hw_init (void)
Data flash init function.
void | dataflash_hw_setCS (bool enable)
Chip Select drive.
void | dataflash_hw_setReset (bool enable)
Reset data flash memory.

Detailed Description

Dataflash HW control routines.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file hw_dataflash.c.

Function Documentation

void dataflash_hw_init ( void )

Data flash init function.

This function provide to initialize all that needs to drive a dataflash memory. Generaly needs to init pins to drive a CS line and reset line.

Definition at line 56 of file hw_dataflash.c.

void dataflash_hw_setCS ( bool enable )

Chip Select drive.

This function enable or disable a CS line. You must implement this function comply to a dataflash memory datasheet to allow the drive to enable a memory when enable flag is true, and disable it when is false.

Definition at line 81 of file hw_dataflash.c.

void dataflash_hw_setReset ( bool enable )

Reset data flash memory.

This function provide to send reset signal to dataflash memory. You must impement it comly to a dataflash memory datasheet to allow the drive to set a reset pin when enable flag is true, and disable it when is false.

Definition at line 108 of file hw_dataflash.c.


BeRTOS: hw_dataflash.c Source File

  • hw
hw_dataflash.c
Go to the documentation of this file.
00001
00038 #include "hw/hw_dataflash.h"
00039
00040 #include <cfg/compiler.h>
00041 #include <cfg/module.h>
00042 #include <cfg/macros.h>
00043
00044 #warning TODO:This is an example implementation, you must implement it!
00045
00046 MOD_DEFINE(hw_dataflash);
00047
00056 void dataflash_hw_init(void)
00057 {
00058
00059     //Disable CS line (remove if not needed)
00060     dataflash_hw_setCS(false);
00061
00062     /*
00063      * Put here your code!
00064      *
00065      * Note:
00066      * - if you drive manualy CS line, here init a CS pin
00067      * - if you use a dedicated reset line, here init a reset pin
00068      */
00069
00070     MOD_INIT(hw_dataflash);
00071 }
00072
00081 void dataflash_hw_setCS(bool enable)
00082 {
00083     if (enable)
00084     {
00085         /*
00086          * Put here your code to enable
00087          * dataflash memory
00088          */
00089     }
00090     else
00091     {
00092         /*
00093          * Put here your code to disable
00094          * dataflash memory
00095          */
00096     }
00097 }
00098
00108 void dataflash_hw_setReset(bool enable)
00109 {
00110     if (enable)
00111     {
00112         /*
00113          * Put here your code to set reset of
00114          * dataflash memory
00115          */
00116     }
00117     else
00118     {
00119         /*
00120          * Put here your code to clear reset of
00121          * dataflash memory
00122          */
00123     }
00124 }
00125


BeRTOS: hw_dataflash.h File Reference

  • hw
Functions
hw_dataflash.h File Reference

Dataflash HW control routines (interface). More...

#include <cfg/compiler.h>

Go to the source code of this file.

Functions

void | dataflash_hw_init (void)
Data flash init function.
void | dataflash_hw_setCS (bool enable)
Chip Select drive.
void | dataflash_hw_setReset (bool enable)
Reset data flash memory.

Detailed Description

Dataflash HW control routines (interface).

Author:
Francesco Sacchi <batt@develer.com>

Definition in file hw_dataflash.h.

Function Documentation

void dataflash_hw_init ( void )

Data flash init function.

This function provide to initialize all that needs to drive a dataflash memory. Generaly needs to init pins to drive a CS line and reset line.

Definition at line 56 of file hw_dataflash.c.

void dataflash_hw_setCS ( bool enable )

Chip Select drive.

This function enable or disable a CS line. You must implement this function comply to a dataflash memory datasheet to allow the drive to enable a memory when enable flag is true, and disable it when is false.

Definition at line 81 of file hw_dataflash.c.

void dataflash_hw_setReset ( bool enable )

Reset data flash memory.

This function provide to send reset signal to dataflash memory. You must impement it comly to a dataflash memory datasheet to allow the drive to set a reset pin when enable flag is true, and disable it when is false.

Definition at line 108 of file hw_dataflash.c.


BeRTOS: hw_dataflash.h Source File

  • hw
hw_dataflash.h
Go to the documentation of this file.
00001
00038 #ifndef HW_DATAFLASH_H
00039 #define HW_DATAFLASH_H
00040
00041 #include <cfg/compiler.h>
00042
00043 void dataflash_hw_init(void);
00044 void dataflash_hw_setCS(bool enable);
00045 void dataflash_hw_setReset(bool enable);
00046
00047 #endif /* HW_DATAFLASH_H */


BeRTOS: hw_dc_motor.h File Reference

  • hw
Defines
hw_dc_motor.h File Reference

DC motor hardware-specific definitions. More...

Go to the source code of this file.

Defines

#define HW_DC_MOTOR_READ_VALUE(dev, min, max)
Define fuctions which read adc value from specific device.

Detailed Description

DC motor hardware-specific definitions.

Author:
Daniele Basile <asterix@develer.com>

Definition in file hw_dc_motor.h.


BeRTOS: hw_dc_motor.h Source File

  • hw
hw_dc_motor.h
Go to the documentation of this file.
00001
00038 #ifndef HW_DC_MOTOR_H
00039 #define HW_DC_MOTOR_H
00040
00041 #warning TODO:This is an example implementation, you must implement it!
00042
00046  #define HW_DC_MOTOR_READ_VALUE(dev, min, max) \
00047     ({ \
00048          /* Put here the fuction that read from ADC */ \
00049         (void)(dev); \
00050         (void)(min); \
00051         (void)(max); \
00052         (0); \
00053     })
00054
00055 // Macro that enable the select DC motor
00056 #define DC_MOTOR_ENABLE(dev)    /* Implement me! */
00057 // Macro that disable the select DC motor
00058 #define DC_MOTOR_DISABLE(dev)   /* Implement me! */
00059
00060 // Macro that left the DC motor rotor float
00061 #define DC_MOTOR_STOP_FLOAT(dev)    DC_MOTOR_DISABLE(dev)
00062 // Macro that put in short circuit DC motor supply pins
00063 #define DC_MOTOR_STOP_BRAKED(dev)   do { /* Implement me! */ } while (0)
00064
00065 // Macro that set motor direction
00066 #define DC_MOTOR_SET_DIR(dev, dir)  do { /* Implement me! */ } while (0)
00067
00068 #define MOTOR_DC_INIT()             do { /* Implement me! */ } while (0)
00069
00070
00071 #endif /* HW_DC_MOTOR_H */


BeRTOS: hw_ft245rl.h File Reference

  • hw
hw_ft245rl.h File Reference

FT245RL USB interface hardware-specific definitions. More...

Go to the source code of this file.

Detailed Description

FT245RL USB interface hardware-specific definitions.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file hw_ft245rl.h.


BeRTOS: hw_ft245rl.h Source File

  • hw
hw_ft245rl.h
Go to the documentation of this file.
00001
00039 #ifndef HW_FT245RL_H
00040 #define HW_FT245RL_H
00041
00042 #warning TODO:This is an example implementation, you must implement it!
00043
00044 #define FT245RL_DATA_IN() /* Implement me! */
00045 #define FT245RL_DATA_OUT() /* Implement me! */
00046 #define WR_HI /* Implement me! */
00047 #define WR_LO /* Implement me! */
00048
00049 #define RD_HI /* Implement me! */
00050 #define RD_LO /* Implement me! */
00051
00052 #define FT245RL_INIT() \
00053 do \
00054 { \
00055     /* Implement me! */ \
00056 } while(0)
00057
00058 #define FT245RL_DATA_RDY() (/* Implement me! */ false)
00059 #define FT245RL_GETDATA() ({/* Implement me! */ (0);})
00060 #define FT245RL_TX_ALLOWED() (/* Implement me! */ false)
00061 #define FT245RL_SETDATA(data) do {/* Implement me! */ (void)((data)); } while(0)
00062
00063 #endif /* HW_FT245RL_H */
00064


BeRTOS: hw_hx8347.h File Reference

  • hw
Functions
hw_hx8347.h File Reference

HX8347 low-level hardware macros for Atmel SAM3X-EK board. More...

Go to the source code of this file.

Functions

void | hx8347_cmd (uint8_t cmd)
Send a command to LCD controller.
void | hx8347_write (uint16_t data)
Send data to LCD controller.
uint16_t | hx8347_read (void)
Read data from LCD controller.
void | hx8347_busInit (void)
Bus initialization: setup hardware where LCD is connected.

Detailed Description

HX8347 low-level hardware macros for Atmel SAM3X-EK board.

The LCD controller is connected to the cpu static memory controller. LCD has 16 data lines and usual RS/WR/RD lines. The data lines are connected to the SMC data bus (D0-15), while the SCM address bus (A1 only) is used to drive the RS pin. WR/RD are connected to SMC's NWE and NRD respectively.

Author:
Stefano Fedrigo <aleph@develer.com>

Definition in file hw_hx8347.h.


BeRTOS: hw_hx8347.h Source File

  • hw
hw_hx8347.h
Go to the documentation of this file.
00001
00044 #ifndef HW_HX8347_H
00045 #define HW_HX8347_H
00046
00047 #warning TODO: This is an example implementation, you must implement it!
00048
00052 INLINE void hx8347_cmd(uint8_t cmd)
00053 {
00054     /* Implement me */
00055     (void)cmd;
00056 }
00057
00061 INLINE void hx8347_write(uint16_t data)
00062 {
00063     /* Implement me */
00064     (void)data;
00065 }
00066
00070 INLINE uint16_t hx8347_read(void)
00071 {
00072     /* Implement me */
00073     return 0;
00074 }
00075
00079 INLINE void hx8347_busInit(void)
00080 {
00081     /* Implement me */
00082 }
00083
00084 #endif /* HW_HX8347_H */


BeRTOS: hw_i2c_bitbang.h File Reference

  • hw
Defines | Functions
hw_i2c_bitbang.h File Reference

Macro for I2C bitbang operation. More...

#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define | I2C_BITBANG_HW_INIT do { /* Implement me! */ } while (0)
This macro should set SDA and SCL lines as input.
#define | I2C_HALFBIT_DELAY() do { /* Implement me! */ } while (0)
Half bit delay routine used to generate the correct timings.

Functions

void | i2c_halfbitDelay (int dev)
Half bit delay routine used to generate the correct timings.
void | i2c_bitbangInit (int dev)
This macro should set SDA and SCL lines as input.

Detailed Description

Macro for I2C bitbang operation.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file hw_i2c_bitbang.h.


BeRTOS: hw_i2c_bitbang.h Source File

  • hw
hw_i2c_bitbang.h
Go to the documentation of this file.
00001
00041 #ifndef HW_I2C_BITBANG_H
00042 #define HW_I2C_BITBANG_H
00043
00044 #warning TODO:This is an example implementation, you must implement it!
00045
00046 #define SDA_HI  do { /* Implement me:Set SDA High by setting SDA pin as input */ } while (0)
00047 #define SDA_LO  do { /* Implement me:Set SDA Low by setting SDA pin as open collector output */ } while (0)
00048 #define SCL_HI  do { /* Implement me:Set SCL High by setting SCL pin as input */ } while (0)
00049 #define SCL_LO  do { /* Implement me:Set SCL Low by setting SCL pin as open collector output */ } while (0)
00050
00051
00052 #define SCL_IN       (true) /* Implement me: read SDA pin state */
00053 #define SDA_IN       (true) /* Implement me: read SCL pin state */
00054
00058 #define I2C_BITBANG_HW_INIT do { /* Implement me! */ } while (0)
00059
00063 #define I2C_HALFBIT_DELAY() do { /* Implement me! */ } while (0)
00064
00065
00066 /*
00067  * New api
00068  */
00069 #include <cfg/compiler.h>
00070
00071 INLINE void i2c_sdaHi(int dev)
00072 {
00073     (void)(dev);
00074     /* Implement me:Set SDA High by setting SDA pin as input */
00075 }
00076
00077 INLINE void i2c_sdaLo(int dev)
00078 {
00079     (void)(dev);
00080     /* Implement me:Set SDA Low by setting SDA pin as open collector output */
00081 }
00082
00083 INLINE void i2c_sclHi(int dev)
00084 {
00085     (void)(dev);
00086     /* Implement me:Set SCL High by setting SCL pin as input */
00087 }
00088
00089 INLINE void i2c_sclLo(int dev)
00090 {
00091     (void)(dev);
00092     /* Implement me:Set SCL Low by setting SCL pin as open collector output */
00093 }
00094
00095 INLINE bool i2c_sdaIn(int dev)
00096 {
00097     (void)(dev);
00098     /* Implement me: read SDA pin state */
00099     return true;
00100 }
00101
00102 INLINE bool i2c_sclIn(int dev)
00103 {
00104     (void)(dev);
00105     /* Implement me: read SCL pin state */
00106     return true;
00107 }
00108
00112 INLINE void i2c_halfbitDelay(int dev)
00113 {
00114     (void)(dev);
00115     /* Implement me! */
00116 }
00117
00121 INLINE void i2c_bitbangInit(int dev)
00122 {
00123     (void)(dev);
00124     /* Implement me! */
00125 }
00126
00127 #endif /* HW_I2C_BITBANG_H */


BeRTOS: hw_ili9225.h File Reference

  • hw
Functions
hw_ili9225.h File Reference

SAM3N-EK: ILI9225B low-level hardware macros. More...

#include "cfg/macros.h"

Go to the source code of this file.

Defines

LCD I/O pins/ports
#define | LCD_CS_PIN 0
#define | LCD_RESET_PIN 0
#define | LCD_RS_PIN 0
LCD bus control macros
#define | LCD_CS_HIGH() do { /* Implement me! */ } while (0)
#define | LCD_CS_LOW() do { /* Implement me! */ } while (0)
#define | LCD_RESET_HIGH() do { /* Implement me! */ } while (0)
#define | LCD_RESET_LOW() do { /* Implement me! */ } while (0)
#define | LCD_RS_HIGH() do { /* Implement me! */ } while (0)
#define | LCD_RS_LOW() do { /* Implement me! */ } while (0)

Functions

void | lcd_ili9225_hw_bus_init (void)
Setup hardware bus where LCD is connected.

Detailed Description

SAM3N-EK: ILI9225B low-level hardware macros.

Author:
Stefano Fedrigo <aleph@develer.com>

Definition in file hw_ili9225.h.


BeRTOS: hw_ili9225.h Source File

  • hw
hw_ili9225.h
Go to the documentation of this file.
00001
00038 #ifndef HW_ILI9225_H
00039 #define HW_ILI9225_H
00040
00041 #include "cfg/macros.h"   /* BV() */
00042
00043
00048 #define LCD_CS_PIN         0 /* Implement me! */
00049 #define LCD_RESET_PIN      0 /* Implement me! */
00050 #define LCD_RS_PIN         0 /* Implement me! */
00051
00057 #define LCD_CS_HIGH()        do { /* Implement me! */ } while (0)
00058 #define LCD_CS_LOW()         do { /* Implement me! */ } while (0)
00059 #define LCD_RESET_HIGH()     do { /* Implement me! */ } while (0)
00060 #define LCD_RESET_LOW()      do { /* Implement me! */ } while (0)
00061 #define LCD_RS_HIGH()        do { /* Implement me! */ } while (0)
00062 #define LCD_RS_LOW()         do { /* Implement me! */ } while (0)
00063
00068 INLINE void lcd_ili9225_hw_bus_init(void)
00069 {
00070     /* Implement me! */
00071 }
00072
00073 #endif /* HW_ILI9225_H */


BeRTOS: hw_input.h File Reference

  • hw
hw_input.h File Reference

Macro for HW_INPUT_H. More...

Go to the source code of this file.

Detailed Description

Macro for HW_INPUT_H.

Author:
Andrea Grandi <andrea@develer.com>

Definition in file hw_input.h.


BeRTOS: hw_input.h Source File

  • hw
hw_input.h
Go to the documentation of this file.
00001
00039 #ifndef HW_INPUT_H
00040 #define HW_INPUT_H
00041
00042 #warning FIXME: This is an example implementation, you must implement it
00043
00044 #define INPUT_INIT() do { /* implement me */} while(0)
00045
00046 #endif /* HW_INPUT_H */


BeRTOS: hw_kbd.h File Reference

  • hw
Functions
hw_kbd.h File Reference

Keyboard hardware-specific definitions. More...

#include "hw/kbd_map.h"
#include <cfg/macros.h>

Go to the source code of this file.

Functions

keymask_t kbd_readkeys (void)
Read the keyboard ports and return the mask of depressed keys.

Detailed Description

Keyboard hardware-specific definitions.

Author:
Francesco Sacchi <batt@develer.com>
Stefano Fedrigo <a@develer.com>

Definition in file hw_kbd.h.


BeRTOS: hw_kbd.h Source File

  • hw
hw_kbd.h
Go to the documentation of this file.
00001
00041 #ifndef HW_KBD_H
00042 #define HW_KBD_H
00043
00044 #include "hw/kbd_map.h"
00045
00046 #include <cfg/macros.h>
00047
00048 #warning TODO:This is an example implementation, you must implement it!
00049
00050 #define K_RPT_MASK (K_UP | K_DOWN | K_OK | K_CANCEL)
00051
00052 #define KBD_HW_INIT \
00053     do { \
00054             /* Put here code to init hw */ \
00055     } while (0)
00056
00057 EXTERN_C int emul_kbdReadCols(void);
00058
00063 INLINE keymask_t kbd_readkeys(void)
00064 {
00065     /* Implement me! */
00066
00067     //Only for test remove when implement this function
00068     return 0;
00069 }
00070
00071 #endif /* HW_KBD_H */


BeRTOS: hw_lcd.h File Reference

  • hw
hw_lcd.h File Reference

Atmel SAM3N-EK testcase. More...

#include <io/cm3.h>
#include <cpu/attr.h>
#include <cpu/types.h>

Go to the source code of this file.

Detailed Description

Atmel SAM3N-EK testcase.

Author:
Luca Ottaviano <lottaviano@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file hw_lcd.h.


BeRTOS: hw_lcd.h Source File

  • hw
hw_lcd.h
Go to the documentation of this file.
00001
00039 #ifndef HW_LCD_H
00040 #define HW_LCD_H
00041
00042 #warning FIXME: This is an example implementation, you must implement it
00043
00044 #include <io/cm3.h>
00045
00046 #include <cpu/attr.h>
00047 #include <cpu/types.h>
00048
00049 #define LCD_BACKLIGHT_MAX    // Max backlight level
00050 #define LCD_BACKLIGHT_PIN    // Port C
00051 #define LCD_SPICLOCK         // Minimum cycle len = 80 ns according specs
00052
00053
00054 #define LCD_BACKLIGHT_LEVEL_UP() do { /* Implement me! */ } while(0)
00055
00056
00057 INLINE void lcd_setBacklight(uint8_t level)
00058 {
00059     (void)level;
00060     /* Implement me! */
00061 }
00062
00063 #define LCD_BACKLIGHT_INIT() do { /* Implement me! */ } while(0)
00064
00065 #endif /* HW_LCD_H */


BeRTOS: hw_lcd_32122a.h File Reference

  • hw
Defines
hw_lcd_32122a.h File Reference

Displaytech 32122A LCD driver. More...

#include <cpu/types.h>
#include <cpu/irq.h>

Go to the source code of this file.

Defines

#define | LCD_DEF_PWM 145
Predefined LCD PWM contrast values.
#define | LCD_WRITE(x) ((void)x)
Read from the LCD data bus (DB[0-7])
#define | LCD_READ (0 /* Implement me! */ )
Write to the LCD data bus (DB[0-7])
#define | LCD_DB_OUT
Set data bus direction to output (write to display)
#define | LCD_DB_IN
Set data bus direction to input (read from display)
#define | LCD_DELAY_WRITE
Delay for write (Enable pulse width, 220ns)
#define | LCD_DELAY_READ
Delay for read (Data ouput delay time, 120ns)
LCD I/O pins/ports
LCD bus control macros
#define | LCD_CLR_A0 do { /* Implement me! */ } while (0)
#define | LCD_SET_A0 do { /* Implement me! */ } while (0)
#define | LCD_CLR_RD do { /* Implement me! */ } while (0)
#define | LCD_SET_RD do { /* Implement me! */ } while (0)
#define | LCD_CLR_E1 do { /* Implement me! */ } while (0)
#define | LCD_SET_E1 do { /* Implement me! */ } while (0)
#define | LCD_CLR_E2 do { /* Implement me! */ } while (0)
#define | LCD_SET_E2 do { /* Implement me! */ } while (0)
#define | LCD_SET_E(x) do { (void)x; /* Implement me! */ } while (0)
#define | LCD_CLR_E(x) do { (void)x; /* Implement me! */ } while (0)
Chip select bits for LCD_SET_E()
#define | LCDF_E1 ( 0/* Implement me! */)
#define | LCDF_E2 ( 0/* Implement me! */)

Detailed Description

Displaytech 32122A LCD driver.

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file hw_lcd_32122a.h.


BeRTOS: hw_lcd_32122a.h Source File

  • hw
hw_lcd_32122a.h
Go to the documentation of this file.
00001
00041 #ifndef HW_LCD_32122A_H
00042 #define HW_LCD_32122A_H
00043
00044 #include <cpu/types.h>
00045 #include <cpu/irq.h>
00046
00047 #warning TODO:This is an example implementation, you must implement it!
00048
00052 #define LCD_DEF_PWM 145
00053 #define LCD_MAX_PWM 505
00054 #define LCD_MIN_PWM 130
00055 #define LCD_PWM_CH    0
00056
00057
00062 #define LCD_RS    /* Implement me! */
00063 #define LCD_RW    /* Implement me! */
00064 #define LCD_PE_E1    /* Implement me! */
00065 #define LCD_PE_E2    /* Implement me! */
00066 #define LCD_DB0   /* Implement me! */
00067 #define LCD_DB1   /* Implement me! */
00068 #define LCD_DB2   /* Implement me! */
00069 #define LCD_DB3   /* Implement me! */
00070 #define LCD_DB4   /* Implement me! */
00071 #define LCD_DB5   /* Implement me! */
00072 #define LCD_DB6   /* Implement me! */
00073 #define LCD_DB7   /* Implement me! */
00074 #define LCD_PF_DB0   /* Implment me! */
00075
00081 #define LCD_CLR_A0                do { /* Implement me! */ } while (0)
00082 #define LCD_SET_A0                do { /* Implement me! */ } while (0)
00083 #define LCD_CLR_RD                do { /* Implement me! */ } while (0)
00084 #define LCD_SET_RD                do { /* Implement me! */ } while (0)
00085 #define LCD_CLR_E1                do { /* Implement me! */ } while (0)
00086 #define LCD_SET_E1                do { /* Implement me! */ } while (0)
00087 #define LCD_CLR_E2                do { /* Implement me! */ } while (0)
00088 #define LCD_SET_E2                do { /* Implement me! */ } while (0)
00089 #define LCD_SET_E(x)              do { (void)x; /* Implement me! */ } while (0)
00090 #define LCD_CLR_E(x)              do { (void)x; /* Implement me! */ } while (0)
00091
00097 #define LCDF_E1                   ( 0/* Implement me! */)
00098 #define LCDF_E2                   ( 0/* Implement me! */)
00099
00101 #define LCD_WRITE(x)    ((void)x)/* Implement me! */
00102
00103 #define LCD_READ        (0 /* Implement me! */ )
00104
00106 #define LCD_DB_OUT          /* Implement me! */
00107
00109 #define LCD_DB_IN           /* Implement me! */
00110
00112 #define LCD_DELAY_WRITE \
00113     do { \
00114         NOP; \
00115         NOP; \
00116         NOP; \
00117         NOP; \
00118         NOP; \
00119     } while (0)
00120
00122 #define LCD_DELAY_READ \
00123     do { \
00124         NOP; \
00125         NOP; \
00126         NOP; \
00127         NOP; \
00128     } while (0)
00129
00130
00131 #define LCD_32122_RESET()         do { /* Implement me! */ } while (0)
00132
00133 INLINE void lcd_32122a_hw_bus_init(void)
00134 {
00135     cpu_flags_t flags;
00136     IRQ_SAVE_DISABLE(flags);
00137
00138     /*
00139      * Here set bus pin!
00140      * to init a lcd device.
00141      *
00142      */
00143
00144     /*
00145      * Data bus is in output state most of the time:
00146      * LCD r/w functions assume it is left in output state
00147      */
00148     LCD_DB_OUT;
00149
00150
00151     IRQ_RESTORE(flags);
00152 }
00153
00154 #endif /* HW_LCD_32122A_H */
00155


BeRTOS: hw_lcd_hd44.h File Reference

  • hw
Defines
hw_lcd_hd44.h File Reference

LCD low-level hardware macros. More...

#include "cfg/cfg_lcd_hd44.h"
#include <cpu/types.h>
#include <cpu/irq.h>

Go to the source code of this file.

Defines

#define | LCD_DB_OUT
Set data bus direction to output (write to display)
#define | LCD_DB_IN
Set data bus direction to input (read from display)
#define | LCD_DELAY_WRITE
Delay for write (Enable pulse width, 220ns)
#define | LCD_DELAY_READ
Delay for read (Data ouput delay time, 120ns)
LCD I/O pins/ports
DB high nibble (DB[4-7])
#define | LCD_MASK (uint8_t)0xff
#define | LCD_SHIFT 0
LCD bus control macros
#define | LCD_CLR_RS
#define | LCD_SET_RS
#define | LCD_CLR_RD
#define | LCD_SET_RD
#define | LCD_CLR_E
#define | LCD_SET_E
#define | LCD_SET_COMMAND()
#define | LCD_SET_DATA()
#define | LCD_WRITE(x) ((void)x)
#define | LCD_READ (0 /* Implement me! */ )

Detailed Description

LCD low-level hardware macros.

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file hw_lcd_hd44.h.


BeRTOS: hw_lcd_hd44.h Source File

  • hw
hw_lcd_hd44.h
Go to the documentation of this file.
00001
00041 #ifndef HW_LCD_HD44_H
00042 #define HW_LCD_HD44_H
00043
00044 #include "cfg/cfg_lcd_hd44.h"  /* CONFIG_LCD_4BIT */
00045
00046 #include <cpu/types.h>
00047 #include <cpu/irq.h>
00048
00049 #warning TODO:This is an example implementation, you must implement it!
00050
00055 #define LCD_RS    /* Implement me! */
00056 #define LCD_RW    /* Implement me! */
00057 #define LCD_E     /* Implement me! */
00058 #define LCD_DB0   /* Implement me! */
00059 #define LCD_DB1   /* Implement me! */
00060 #define LCD_DB2   /* Implement me! */
00061 #define LCD_DB3   /* Implement me! */
00062 #define LCD_DB4   /* Implement me! */
00063 #define LCD_DB5   /* Implement me! */
00064 #define LCD_DB6   /* Implement me! */
00065 #define LCD_DB7   /* Implement me! */
00066
00073 #if CONFIG_LCD_4BIT
00074     #define LCD_MASK    (LCD_DB7 | LCD_DB6 | LCD_DB5 | LCD_DB4)
00075     #define LCD_SHIFT   4
00076 #else
00077     #define LCD_MASK (uint8_t)0xff
00078     #define LCD_SHIFT 0
00079 #endif
00080
00086 #define LCD_CLR_RS      /* Implement me! */
00087 #define LCD_SET_RS      /* Implement me! */
00088 #define LCD_CLR_RD      /* Implement me! */
00089 #define LCD_SET_RD      /* Implement me! */
00090 #define LCD_CLR_E       /* Implement me! */
00091 #define LCD_SET_E       /* Implement me! */
00092
00093 /* Enter command mode */
00094 #define LCD_SET_COMMAND() /* Implement me! */
00095
00096 /* Enter data mode */
00097 #define LCD_SET_DATA() /* Implement me! */
00098
00099 #if CONFIG_LCD_4BIT
00100     #define LCD_WRITE_H(x)  ((void)x)/* Implement me! */
00101     #define LCD_WRITE_L(x)  ((void)x)/* Implement me! */
00102     #define LCD_READ_H      ( 0 /* Implement me! */ )
00103     #define LCD_READ_L      ( 0 /* Implement me! */ )
00104 #else
00105     #define LCD_WRITE(x)    ((void)x)/* Implement me! */
00106     #define LCD_READ        (0 /* Implement me! */ )
00107 #endif
00108
00111 #define LCD_DB_OUT          /* Implement me! */
00112
00114 #define LCD_DB_IN           /* Implement me! */
00115
00116 #define LCD_DELAY_WRITE \
00117     do { \
00118         NOP; \
00119         NOP; \
00120         NOP; \
00121         NOP; \
00122         NOP; \
00123     } while (0)
00124
00126 #define LCD_DELAY_READ \
00127     do { \
00128         NOP; \
00129         NOP; \
00130         NOP; \
00131         NOP; \
00132     } while (0)
00133
00134
00135
00136 INLINE void lcd_hd44_hw_bus_init(void)
00137 {
00138     cpu_flags_t flags;
00139     IRQ_SAVE_DISABLE(flags);
00140
00141     /*
00142      * Here set bus pin!
00143      * to init a lcd device.
00144      *
00145      */
00146
00147     /*
00148      * Data bus is in output state most of the time:
00149      * LCD r/w functions assume it is left in output state
00150      */
00151     LCD_DB_OUT;
00152
00153
00154     IRQ_RESTORE(flags);
00155 }
00156
00157 #endif /* HW_LCD_HD44_H */


BeRTOS: hw_led.h File Reference

  • hw
hw_led.h File Reference

Led on/off macros. More...

Go to the source code of this file.

Detailed Description

Led on/off macros.

Author:
Daniele Basile <asterix@develer.com>

Definition in file hw_led.h.


BeRTOS: hw_led.h Source File

  • hw
hw_led.h
Go to the documentation of this file.
00001
00038 #ifndef HW_LED_H
00039 #define HW_LED_H
00040
00041 #warning FIXME: This is an example implementation, you must implement it
00042
00043 #define LED_ON()   do { /* implement me */} while(0)
00044 #define LED_OFF()  do { /* implement me */} while(0)
00045
00046 #define LED_INIT()      do { /* implement me */} while(0)
00047
00048 #endif /* HW_LED_H */


BeRTOS: hw_led_7seg.h File Reference

  • hw
Functions
hw_led_7seg.h File Reference

led 7 segment display low-level More...

#include "cfg/cfg_led_7seg.h"

Go to the source code of this file.

Functions

void | sseg_off (void)
Clean the display.
void | sseg_on (uint8_t dgt, uint8_t n_dgt)
writes the character to the single digit of the display
void | sseg_init (void)
initalize the HW regsiters

Detailed Description

led 7 segment display low-level

This file has the functions that must be implemented to drive the 7 segments display by your hardware

Author:
Fabio Bizzi <fbizzi@bizzi.org>

Example implementation for AtMEGA 1280 (Arduino MEGA) with a 4 digit display. We use PORTA to connect the 8 pins of the 7 segments display and 4 bit of PORTC to select which digit of the display we have to write on.

  7 Seg LED Pin
  ----------------
  LED SEGMENT
  ----------------
  DP G F E D C B A
  7  6 5 4 3 2 1 0
  ----------------
  PORT A Pin
  ----------------

  7 Seg Display Selection
  ----------------
  Display Nr.
  ----------------
  N N N N 3 2 1 0
  7 6 5 4 3 2 1 0
  ----------------
  PORT C Pin
  ----------------

The implementation of the sseg_on procedure that set the PROPER PIN of PORT C to enable the requested digit of the display, after write the encoded character to PORT A

 INLINE void sseg_on(uint8_t dgt, uint8_t n_dgt)
 {
  switch (n_dgt)
  {
 //Common Cathode
 #ifdef CONFIG_LED_7SEG_CCAT

        case 0:
            PORTC &= ~(BV(PORTC1) | BV(PORTC2) | BV(PORTC3));
            PORTC |= BV(PORTC0);
            break;
        case 1:
            PORTC &= ~(BV(PORTC0) | BV(PORTC2) | BV(PORTC3));
            PORTC |= BV(PORTC1);
            break;
        case 2:
            PORTC &= ~(BV(PORTC0) | BV(PORTC1) | BV(PORTC3));
            PORTC |= BV(PORTC2);
            break;
        case 3:
            PORTC &= ~(BV(PORTC0) | BV(PORTC1) | BV(PORTC2));
            PORTC |= BV(PORTC3);
            break;

 //Common Anode
 #else

        case 0:
            PORTC |= (BV(PORTC1) | BV(PORTC2) | BV(PORTC3));
            PORTC &= ~(BV(PORTC0));
            break;
        case 1:
            PORTC |= (BV(PORTC0) | BV(PORTC2) | BV(PORTC3));
            PORTC &= ~(BV(PORTC1));
            break;
        case 2:
            PORTC |= (BV(PORTC0) | BV(PORTC1) | BV(PORTC3));
            PORTC &= ~(BV(PORTC2));
            break;
        case 3:
            PORTC |= (BV(PORTC0) | BV(PORTC1) | BV(PORTC2));
            PORTC &= ~(BV(PORTC3));
            break;

 #endif

    }
    //Write the charater
    PORTA = dgt;
 }

The implementation of the sseg_init procedure that set the DIRECTION of PORT C and PORT A to output

 INLINE void sseg_init(void)
 {
 //Initialize PIN Direction to OUTPUT
    DDRA = 0xFF;
    DDRC |= (BV(DDC0) | BV(DDC1) | BV(DDC2) | BV(DDC3));
    //Set the display OFF
    SSEG_OFF();
 }

The implementation of the sseg_off procedure that set the reset PORT A to clean the display and turn off all the pin of PORT C that drive the display's digits

 INLINE void sseg_off(void)
 {
 //Set the display OFF
 //Common Cathode
 #ifdef CONFIG_LED_7SEG_CCAT
    PORTA = 0x00;
    PORTC &= ~(BV(PORTC0) | BV(PORTC1) | BV(PORTC2) | BV(PORTC3));
 //Common Anode
 #else
    PORTA = 0xFF;
    PORTC |= (BV(PORTC0) | BV(PORTC1) | BV(PORTC2) | BV(PORTC3));
 #endif

 }

Definition in file hw_led_7seg.h.

Function Documentation

void sseg_init ( void ) [inline]

initalize the HW regsiters

This is the procedure that initalize the HW regsiters. you have to write it according with your hardware and micro.

Definition at line 224 of file hw_led_7seg.h.

void sseg_off ( void ) [inline]

Clean the display.

This is the procedure that clean the display in HW mode. you have to write it according with your hardware and micro.

Definition at line 184 of file hw_led_7seg.h.

void sseg_on | ( | uint8_t | dgt,
 |  | uint8_t | n_dgt
 | ) |  | [inline]

writes the character to the single digit of the display

This is the procedure that writes the character to the single digit of the display, you have to write it according with your hardware and micro.

Parameters:
dgt | the character that has to be displayed
n_dgt | the digit where to disply the character of the display's digits.

Definition at line 205 of file hw_led_7seg.h.


BeRTOS: hw_led_7seg.h Source File

  • hw
hw_led_7seg.h
Go to the documentation of this file.
00001
00169 #ifndef HW_LED_7SEG_H
00170 #define HW_LED_7SEG_H
00171
00172 #include "cfg/cfg_led_7seg.h"
00173
00174 /*
00175  * INLINE HW Functions
00176  */
00177
00184 INLINE void sseg_off(void)
00185 {
00186 /* Set the display OFF */
00187 #ifdef CONFIG_LED_7SEG_CCAT
00188 /* You have to implment it */
00189 /* Common Cathode */
00190 #else
00191 /* You have to implment it */
00192 /* Common Anode */
00193 #endif
00194 }
00195
00205 INLINE void sseg_on(uint8_t dgt, uint8_t n_dgt)
00206 {
00207     (void) dgt;
00208     (void) n_dgt;
00209 #ifdef CONFIG_LED_7SEG_CCAT
00210 /* Common Cathode */
00211 /* You have to implment it */
00212 #else
00213 /* Common Anode */
00214 /* You have to implment it */
00215 #endif
00216 }
00217
00224 INLINE void sseg_init(void)
00225 {
00226     /* Initialize PIN Direction to OUTPUT*/
00227     /* You have to implment it */
00228     /* Set the display OFF */
00229     sseg_off();
00230 }
00231
00232 #endif /* HW_LED_7SEG_H */
00233


BeRTOS: hw_lm75.h File Reference

  • hw
hw_lm75.h File Reference

Hardware macro definition. More...

Go to the source code of this file.

Detailed Description

Hardware macro definition.

Author:
Daniele Basile <asterix@develer.com>

Definition in file hw_lm75.h.


BeRTOS: hw_lm75.h Source File

  • hw
hw_lm75.h
Go to the documentation of this file.
00001
00038 #ifndef HW_LM75_H
00039 #define HW_LM75_H
00040
00041 #warning TODO:This is an example implentation, you must implement it!
00042
00043 #define LM75_HW_INIT() \
00044     do { \
00045     /* Pin init */\
00046     } while (0)
00047
00048 #endif /* HW_LM75_H */
00049


BeRTOS: hw_mcp41.c File Reference

  • hw
hw_mcp41.c File Reference

MCP41 hardware-specific definitions. More...

#include "hw/hw_mcp41.h"
#include <cfg/macros.h>
#include <cfg/compiler.h>

Go to the source code of this file.

Detailed Description

MCP41 hardware-specific definitions.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file hw_mcp41.c.


BeRTOS: hw_mcp41.c Source File

  • hw
hw_mcp41.c
Go to the documentation of this file.
00001
00037 #include "hw/hw_mcp41.h"
00038
00039 #include <cfg/macros.h>
00040 #include <cfg/compiler.h>
00041
00042 #warning TODO:This is an example implementation, you must implement it!
00043
00044 const uint16_t mcp41_ports[MCP41_CNT] =
00045 {
00046         0, /* add here mcp41 ports */
00047 };
00048 const uint8_t  mcp41_pins [MCP41_CNT] =
00049 {
00050         0, /* add here mcp41 ports */
00051 };
00052


BeRTOS: hw_mcp41.h File Reference

  • hw
hw_mcp41.h File Reference

MCP41 hardware-specific definitions. More...

#include "hw/mcp41_map.h"
#include <cfg/compiler.h>

Go to the source code of this file.

Detailed Description

MCP41 hardware-specific definitions.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file hw_mcp41.h.


BeRTOS: hw_mcp41.h Source File

  • hw
hw_mcp41.h
Go to the documentation of this file.
00001
00037 #ifndef HW_MCP41_H
00038 #define HW_MCP41_H
00039
00040 #include "hw/mcp41_map.h"
00041
00042 #include <cfg/compiler.h>
00043
00044
00045 #warning TODO:This is an example implementation, you must implement it!
00046
00047
00048 INLINE void SET_MCP41_DDR(Mcp41Dev dev)
00049 {
00050         /* Implement me! */
00051         //Warning: this funtions is like avr target name,
00052         //fix it to comply for all target.
00053
00054         //Only for test remove when implement this function
00055         (void)dev;
00056 }
00057
00058 INLINE void MCP41_ON(Mcp41Dev i)
00059 {
00060         /* Implement me! */
00061
00062         //Only for test remove when implement this function
00063         (void)i;
00064 }
00065
00066 INLINE void MCP41_OFF(Mcp41Dev i)
00067 {
00068         /* Implement me! */
00069
00070         //Only for test remove when implement this function
00071         (void)i;
00072 }
00073
00074 #endif /* HW_MCP41_H */


BeRTOS: hw_ntc.c File Reference

  • hw
hw_ntc.c File Reference

NTC hardware-specific definition. More...

#include <drv/ntc.h>
#include "hw/ntc_map.h"

Go to the source code of this file.

Detailed Description

NTC hardware-specific definition.

Author:
Lorenzo Berni <duplo@develer.com>

Definition in file hw_ntc.c.


BeRTOS: hw_ntc.c Source File

  • hw
hw_ntc.c
Go to the documentation of this file.
00001
00039 #include <drv/ntc.h>
00040 #include "hw/ntc_map.h"
00041
00042 const res_t      NTC_RSER[NTC_CNT];
00043 const res_t      NTC_RPAR[NTC_CNT];
00044 const amp_t      NTC_AMP[NTC_CNT];
00045 const NtcHwInfo* NTC_INFO[NTC_CNT];


BeRTOS: hw_ntc.h File Reference

  • hw
Functions
hw_ntc.h File Reference

NTC hardware-specific definition. More...

#include "ntc_map.h"
#include <cfg/debug.h>
#include <drv/ntc.h>
#include <drv/adc.h>

Go to the source code of this file.

Functions

res_t | ntc_hw_read (NtcDev dev)
const NtcHwInfo * | ntc_hw_getInfo (NtcDev dev)

Detailed Description

NTC hardware-specific definition.

Author:
Francesco Sacchi <batt@develer.com>

A NTC acts as a variable resistor, whose resistance changes as a function of the temperature it measures. To sample it correctly, it is usually parallelized and serialized with two fixed resistor. The following diagram shows what is the exact disposition of the components, as handled by this library:

                 o Vref
                 |
                 |                               o Vref
                 |                               |
               -----                             |
              |     |                        ---------
              | Rser|                       |         |
              |     |                       |         |
               -----     -----              |   ADC   |
                 | Vp   |     |             |         |
      -----------|------| Amp |-------------|         |
     |           |      |     |      Vadc   |         |
   -----       -----     -----               ---------
  |     |     |     |
  | NTC |     | Rpar|
  |     |     |     |
   -----       -----
     |           |
     |           |
   -----       -----
    ---         ---
 *

Amp is an amplifier that amplify of AMP times the signal. If we indicate Rp as the parallel of NTC with Rpar, ADCBITS as the bits of the ad converter and ADCVAL as the result from the adc convertion (Not Vadc but just the value read from the adc register), after various calculation, the expression of Rp is:

            ADCVAL * Rser
 Rp = ------------------------
         ADCBITS
    2         * AMP - ADCVAL
 *
And after that NTC obvisiously is:

        Rpar * Rp
 NTC = ----------
        Rpar - Rp
 *
The function ntc_hw_read() compute the resistence using these formulas above.

Definition in file hw_ntc.h.

Function Documentation

          const NtcHwInfo* ntc_hw_getInfo
          (
          NtcDev
          dev )
           [inline]

Return the info (aka the table) associated with ntc device dev.

Definition at line 128 of file hw_ntc.h.

          res_t ntc_hw_read
          (
          NtcDev
          dev )
           [inline]

Read the resistence of ntc device dev. Return the result in res_t type.

Definition at line 112 of file hw_ntc.h.


BeRTOS: hw_ntc.h Source File

  • hw
hw_ntc.h
Go to the documentation of this file.
00001
00090 #ifndef HW_NTC_H
00091 #define HW_NTC_H
00092
00093 #include "ntc_map.h"
00094
00095 #include <cfg/debug.h>
00096
00097 #include <drv/ntc.h>
00098 #include <drv/adc.h>
00099
00100 #warning TODO:This is an example implementation, you must implement it!
00101
00102 extern const res_t      NTC_RSER[NTC_CNT];
00103 extern const res_t      NTC_RPAR[NTC_CNT];
00104 extern const amp_t      NTC_AMP[NTC_CNT];
00105 extern const NtcHwInfo* NTC_INFO[NTC_CNT];
00106
00107
00112 INLINE res_t ntc_hw_read(NtcDev dev)
00113 {
00114     ASSERT(dev < NTC_CNT);
00115     // See above for formula explanation.
00116     adcread_t adcval = adc_read((uint16_t)dev);
00117     float rp = (adcval * NTC_RSER[dev] ) / ((1 << adc_bits()) * NTC_AMP[dev] - adcval);
00118
00119     //kprintf("Rp[%f], Rntc[%f]\n", rp/100, ((NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp)) / 100.0);
00120
00121     return ( (NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp) );
00122 }
00123
00124
00128 INLINE const NtcHwInfo* ntc_hw_getInfo(NtcDev dev)
00129 {
00130     return NTC_INFO[dev];
00131 }
00132
00133 #define NTC_HW_INIT do  { /* Implement me! */ } while(0)
00134
00135 #endif /* HW_NTC_H */


BeRTOS: hw_phase.c File Reference

  • hw
hw_phase.c File Reference

Phase control hardware-specific definitions. More...

#include "hw/hw_phase.h"

Go to the source code of this file.

Detailed Description

Phase control hardware-specific definitions.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file hw_phase.c.


BeRTOS: hw_phase.c Source File

  • hw
hw_phase.c
Go to the documentation of this file.
00001
00038 #ifndef HW_PHASE_H
00039 #define HW_PHASE_H
00040
00041 #include "hw/hw_phase.h"
00042
00043 #warning TODO:This is an example implementation, you must implement it!
00044
00045 #endif /* HW_PHASE_H */


BeRTOS: hw_phase.h File Reference

  • hw
hw_phase.h File Reference

Phase control hardware-specific definitions. More...

#include "hw/phase_map.h"
#include <cfg/compiler.h>

Go to the source code of this file.

Detailed Description

Phase control hardware-specific definitions.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file hw_phase.h.


BeRTOS: hw_phase.h Source File

  • hw
hw_phase.h
Go to the documentation of this file.
00001
00039 #ifndef HW_PHASE_H
00040 #define HW_PHASE_H
00041
00042 #include "hw/phase_map.h"
00043
00044 #include <cfg/compiler.h>
00045
00046 #warning TODO:This is an example implementation, you must implement it!
00047
00048 #define PHASE_HW_INIT  do { /* Implement me! */ }while (0)
00049
00050 INLINE void TRIAC_OFF(TriacDev i)
00051 {
00052         /* Implement me! */
00053
00054         //Only for test remove when implement this function
00055         (void)i;
00056 }
00057
00058
00059 INLINE void TRIAC_ON(TriacDev i)
00060 {
00061         /* Implement me! */
00062
00063         //Only for test remove when implement this function
00064         (void)i;
00065 }
00066
00067 INLINE void SET_TRIAC_DDR(TriacDev i)
00068 {
00069         /* Implement me! */
00070
00071         //Only for test remove when implement this function
00072         (void)i;
00073 }
00074
00075 void zerocross_isr(void);
00076 #define DEFINE_ZEROCROSS_ISR() void zerocross_isr(void)
00077
00078
00079 #endif /* HW_PHASE_H */


BeRTOS: hw_rit128x96.h File Reference

  • hw
hw_rit128x96.h File Reference

LM3S1986: OLED-RIT-128x96 (P14201) low-level hardware macros. More...

#include "cfg/macros.h"
#include "cfg/debug.h"
#include <cpu/attr.h>
#include <cpu/irq.h>
#include <cpu/types.h>

Go to the source code of this file.

Defines

LCD I/O pins/ports
#define | GPIO_OLEDDC_PIN 0
#define | GPIO_OLEDEN_PIN 0
LCD bus control macros
#define | LCD_SET_COMMAND()
#define | LCD_SET_DATA()
#define | LCD_WRITE(x) ((void)x)

Detailed Description

LM3S1986: OLED-RIT-128x96 (P14201) low-level hardware macros.

Author:
Andrea Righi <arighi@develer.com>

Definition in file hw_rit128x96.h.


BeRTOS: hw_rit128x96.h Source File

  • hw
hw_rit128x96.h
Go to the documentation of this file.
00001
00038 #ifndef HW_RIT128x96_H
00039 #define HW_RIT128x96_H
00040
00041 #include "cfg/macros.h"   /* BV() */
00042 #include "cfg/debug.h"
00043
00044 #include <cpu/attr.h>
00045 #include <cpu/irq.h>
00046 #include <cpu/types.h>
00047
00052 /* OLED Data/Command control pin */
00053 #define GPIO_OLEDDC_PIN 0 /* Implement me! */
00054
00055 /* OLED enable pin */
00056 #define GPIO_OLEDEN_PIN 0 /* Implement me! */
00057
00063 /* Enter command mode */
00064 #define LCD_SET_COMMAND() /* Implement me! */
00065
00066 /* Enter data mode */
00067 #define LCD_SET_DATA() /* Implement me! */
00068
00069 /* Send data to the display */
00070 #define LCD_WRITE(x)    ((void)x)/* Implement me! */
00071
00073 INLINE void lcd_rit128x96_hw_bus_init(void)
00074 {
00075     /* Implement me! */
00076 }
00077
00078 #endif /* HW_RIT128x96_H */


BeRTOS: hw_sd.h File Reference

  • hw
hw_sd.h File Reference

SD driver hardware-specific definitions. More...

Go to the source code of this file.

Detailed Description

SD driver hardware-specific definitions.

Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file hw_sd.h.


BeRTOS: hw_sd.h Source File

  • hw
hw_sd.h
Go to the documentation of this file.
00001
00039 #ifndef HW_SD_H
00040 #define HW_SD_H
00041
00042 #warning FIXME: This is an example implementation, you must implement it
00043
00044 #define SD_CS_INIT() do { /* implement me */} while(0)
00045 #define SD_CS_ON()   do { /* implement me */} while(0)
00046 #define SD_CS_OFF()  do { /* implement me */} while(0)
00047
00048 #define SD_PIN_INIT()      do { /* implement me */} while(0)
00049 #define SD_CARD_PRESENT()  true /* implement me */
00050 #define SD_WRITE_PROTECT() false /* implement me */
00051
00052 #endif /* HW_SD_H */


BeRTOS: hw_sensor.h File Reference

  • hw
hw_sensor.h File Reference

Sensor hardware-specific definitions. More...

Go to the source code of this file.

Detailed Description

Sensor hardware-specific definitions.

Author:
Daniele Basile <asterix@develer.com>

Definition in file hw_sensor.h.


BeRTOS: hw_sensor.h Source File

  • hw
hw_sensor.h
Go to the documentation of this file.
00001
00039 #ifndef HW_SENSOR_H
00040 #define HW_SENSOR_H
00041
00042 #warning TODO:This is an example implementation, you must implement it!
00043
00044 #define NUM_HOME_SENSORS 1
00045
00046
00047 INLINE bool hw_home_sensor_read(int sensor)
00048 {
00049         /* Implement me! */
00050
00051         //Only for test remove when implement this function
00052         (void)sensor;
00053         return 0;
00054 }
00055
00056 INLINE void hw_home_sensor_set_inverted(int sensor, bool inverted)
00057 {
00058         /* Implement me! */
00059
00060         //Only for test remove when implement this function
00061         (void)sensor;
00062         (void)inverted;
00063 }
00064
00065 INLINE bool hw_level_sensor_read(int sensor)
00066 {
00067         /* Implement me! */
00068
00069         //Only for test remove when implement this function
00070         (void)sensor;
00071         return 0;
00072 }
00073
00074 INLINE void hw_level_sensor_set_inverted(int sensor, bool inverted)
00075 {
00076         /* Implement me! */
00077
00078         //Only for test remove when implement this function
00079         (void)sensor;
00080         (void)inverted;
00081 }
00082
00083 INLINE bool bld_hw_sensor_read(int sensor)
00084 {
00085         /* Implement me! */
00086
00087         //Only for test remove when implement this function
00088         (void)sensor;
00089         return 0;
00090 }
00091
00092 #endif /* HW_SENSOR_H */


BeRTOS: hw_ser.h File Reference

  • hw
hw_ser.h File Reference

Serial hardware-specific definitions. More...

#include "cfg/cfg_ser.h"

Go to the source code of this file.

Detailed Description

Serial hardware-specific definitions.

Author:
Daniele Basile <asterix@develer.com>

Definition in file hw_ser.h.


BeRTOS: hw_ser.h Source File

  • hw
hw_ser.h
Go to the documentation of this file.
00001
00039 #ifndef HW_SER_H
00040 #define HW_SER_H
00041
00042 #include "cfg/cfg_ser.h"
00043
00044 #if CONFIG_SER_STROBE
00045     #warning FIXME: this is an example implementation, you must implement it
00046
00047     #define SER_STROBE_INIT do { /* implement me */ } while (0)
00048     #define SER_STROBE_ON do { /* implement me */ } while (0)
00049     #define SER_STROBE_OFF do { /* implement me */ } while (0)
00050 #endif
00051
00052 #endif /* HW_SER_H */


BeRTOS: hw_sipo.h File Reference

  • hw
Defines | Enumerations
hw_sipo.h File Reference

Macro for HW_SIPO_H. More...

Go to the source code of this file.

Defines

#define | SIPO_SET_LEVEL_LOW(dev) do { /* Implement me! */ } while (0)
Define generic macro to set pins logic level.
#define | PULSE_LOW(dev) do { /* Implement me! */ } while (0)
Generate one low pulse on select line.
#define | PULSE_HIGH(dev) do { /* Implement me! */ } while (0)
Generate one hight pulse on select line.
#define | SIPO_SI_HIGH() do { /* Implement me! */ } while (0)
Define the procedure to drive serial input in sipo device (SI).
#define | SIPO_SI_CLOCK(clk_pol)
Drive clock to shift SI data into latch.
#define | SIPO_LOAD(device, load_pol) do { /* Implement me! */ } while (0)
Do everything needed in order to load dato into sipo.
#define | SIPO_ENABLE() do { /* Implement me! */ } while (0)
Enable the shift register output.
#define | SIPO_SET_LD_LEVEL(device, load_pol) do { /* Implement me! */ } while (0)
Set polarity for Load, Clk, SI signals.
#define | SIPO_INIT_PIN() do { /* Implement me! */ } while (0)
Do anything that needed to init sipo pins.

Enumerations

enum | SipoMap
Map sipo connection on board.

Detailed Description

Macro for HW_SIPO_H.

Author:
Andrea Grandi <andrea@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file hw_sipo.h.


BeRTOS: hw_sipo.h Source File

  • hw
hw_sipo.h
Go to the documentation of this file.
00001
00042 #ifndef HW_SIPO_H
00043 #define HW_SIPO_H
00044
00048 typedef enum SipoMap
00049 {
00050     SIPO_CNT
00051 } SipoMap;
00052
00056 #define SIPO_SET_LEVEL_LOW(dev)    do { /* Implement me! */   } while (0)
00057 #define SIPO_SET_LEVEL_HIGH(dev)   do { /* Implement me! */   } while (0)
00058
00059
00063 #define PULSE_LOW(dev)    do { /* Implement me! */   } while (0)
00064
00068 #define PULSE_HIGH(dev)     do { /* Implement me! */   } while (0)
00069
00070
00074 #define SIPO_SI_HIGH()   do { /* Implement me! */   } while (0)
00075 #define SIPO_SI_LOW()    do { /* Implement me! */   } while (0)
00076
00080 #define SIPO_SI_CLOCK(clk_pol) \
00081     do { \
00082         (void)clk_pol; \
00083         /* Implement me! */ \
00084     } while (0)
00085
00089 #define SIPO_LOAD(device, load_pol)   do { /* Implement me! */   } while (0)
00090
00094 #define SIPO_ENABLE()             do { /* Implement me! */   } while (0)
00095
00099 #define SIPO_SET_LD_LEVEL(device, load_pol)  do { /* Implement me! */   } while (0)
00100 #define SIPO_SET_CLK_LEVEL(clock_pol)        do { /* Implement me! */   } while (0)
00101 #define SIPO_SET_SI_LEVEL()       do { /* Implement me! */   } while (0)
00102
00106 #define SIPO_INIT_PIN()           do { /* Implement me! */   } while (0)
00107
00108 #endif /* HW_SIPO_H */


BeRTOS: hw_spi.h File Reference

  • hw
hw_spi.h File Reference

Hardware macro definition. More...

#include <cfg/macros.h>

Go to the source code of this file.

Defines

#define | CS
SPI pin definition.
#define | SCK
SPI pin definition.
#define | MOSI
SPI pin definition.
#define | MISO
SPI pin definition.
#define | SPI_PORT
SPI pin definition.
#define | SPI_PIN
SPI pin definition.
#define | SPI_DDR
SPI pin definition.
#define | MOSI_LOW() do { /* Implement me! */ } while(0)
Pin logic level.
#define | MOSI_HIGH() do { /* Implement me! */ } while(0)
Pin logic level.
#define | MISO_HIGH() do { /* Implement me! */ } while(0)
Pin logic level.
#define | SCK_LOW() do { /* Implement me! */ } while(0)
Pin logic level.
#define | SCK_HIGH() do { /* Implement me! */ } while(0)
Pin logic level.
#define | CS_LOW() do { /* Implement me! */ } while(0)
Pin logic level.
#define | CS_HIGH() do { /* Implement me! */ } while(0)
Pin logic level.
#define | CS_ENABLE() CS_LOW()
SPI pin commands.
#define | CS_DISABLE() CS_HIGH()
SPI pin commands.
#define | SS_ACTIVE() CS_LOW()
SPI pin commands.
#define | SS_INACTIVE() CS_HIGH()
SPI pin commands.
#define | SCK_INACTIVE() SCK_LOW()
SPI pin commands.
#define | SCK_ACTIVE() SCK_HIGH()
SPI pin commands.
#define | CS_OUT() do { /* Implement me! */ } while(0)
SPI pin commands.
#define | MOSI_IN() do { /* Implement me! */ } while(0)
SPI pin commands.
#define | MOSI_OUT() do { /* Implement me! */ } while(0)
SPI pin commands.
#define | IS_MISO_HIGH() (false /* Implement me! */ )
SPI pin commands.
#define | MISO_IN() do { /* Implement me! */ } while(0)
SPI pin commands.
#define | MISO_OUT() do { /* Implement me! */ } while(0)
SPI pin commands.
#define | SCK_OUT() do { /* Implement me! */ } while(0)
SPI pin commands.
#define | SCK_PULSE()
SPI pin commands.

Detailed Description

Hardware macro definition.

Author:
Daniele Basile <asterix@develer.com>

Definition in file hw_spi.h.

Define Documentation

#define CS

SPI pin definition.

Note:
CS is assert when level is low.

Definition at line 54 of file hw_spi.h.

#define MISO

SPI pin definition.

Note:
CS is assert when level is low.

Definition at line 57 of file hw_spi.h.

#define MOSI

SPI pin definition.

Note:
CS is assert when level is low.

Definition at line 56 of file hw_spi.h.

#define SCK

SPI pin definition.

Note:
CS is assert when level is low.

Definition at line 55 of file hw_spi.h.

#define SPI_DDR

SPI pin definition.

Note:
CS is assert when level is low.

Definition at line 60 of file hw_spi.h.

#define SPI_PIN

SPI pin definition.

Note:
CS is assert when level is low.

Definition at line 59 of file hw_spi.h.

#define SPI_PORT

SPI pin definition.

Note:
CS is assert when level is low.

Definition at line 58 of file hw_spi.h.


BeRTOS: hw_spi.h Source File

  • hw
hw_spi.h
Go to the documentation of this file.
00001
00039 #ifndef HW_SPI_H
00040 #define HW_SPI_H
00041
00042 #warning TODO:This is an example implentation, you must implement it!
00043
00044 #include <cfg/macros.h>
00045
00054 #define CS       /* pin */   ///Connect to CS pin of Flash memory.
00055 #define SCK      /* pin */   ///Connect to SCK pin of Flash memory.
00056 #define MOSI     /* pin */   ///Connect to SI pin of Flash memory.
00057 #define MISO     /* pin */   ///Connect to SO pin of Flash memory.
00058 #define SPI_PORT /* pin */   ///Micro pin PORT register.
00059 #define SPI_PIN  /* pin */   ///Micro pin PIN register.
00060 #define SPI_DDR  /* pin */   ///Micro pin DDR register.
00061 /*\}*/
00062
00068 #define MOSI_LOW()       do { /* Implement me! */ } while(0)
00069 #define MOSI_HIGH()      do { /* Implement me! */ } while(0)
00070 #define MISO_HIGH()      do { /* Implement me! */ } while(0)
00071 #define SCK_LOW()        do { /* Implement me! */ } while(0)
00072 #define SCK_HIGH()       do { /* Implement me! */ } while(0)
00073 #define CS_LOW()         do { /* Implement me! */ } while(0)
00074 #define CS_HIGH()        do { /* Implement me! */ } while(0)
00075 /*\}*/
00076
00082 #define CS_ENABLE()      CS_LOW()
00083 #define CS_DISABLE()     CS_HIGH()
00084 #define SS_ACTIVE()      CS_LOW()
00085 #define SS_INACTIVE()    CS_HIGH()
00086 #define SCK_INACTIVE()   SCK_LOW()
00087 #define SCK_ACTIVE()     SCK_HIGH()
00088 #define CS_OUT()         do { /* Implement me! */ } while(0)
00089 #define MOSI_IN()        do { /* Implement me! */ } while(0)
00090 #define MOSI_OUT()       do { /* Implement me! */ } while(0)
00091 #define IS_MISO_HIGH()   (false /* Implement me! */ )
00092 #define MISO_IN()        do { /* Implement me! */ } while(0)
00093 #define MISO_OUT()       do { /* Implement me! */ } while(0)
00094 #define SCK_OUT()        do { /* Implement me! */ } while(0)
00095
00096 #define SCK_PULSE()\
00097     do {\
00098             SCK_HIGH();\
00099             SCK_LOW();\
00100     } while (0)
00101 /*\}*/
00102
00103
00104 #define SPI_HW_INIT() \
00105     CS_DISABLE();\
00106     MOSI_LOW();\
00107     SCK_LOW();\
00108     MISO_IN();\
00109     MOSI_OUT();\
00110     SCK_OUT();\
00111     CS_OUT();
00112
00113 #endif /* HW_SPI_H */
00114


BeRTOS: hw_spi_dma.h File Reference

  • hw
hw_spi_dma.h File Reference

SPI DMA driver hardware-specific definitions. More...

Go to the source code of this file.

Detailed Description

SPI DMA driver hardware-specific definitions.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file hw_spi_dma.h.


BeRTOS: hw_spi_dma.h Source File

  • hw
hw_spi_dma.h
Go to the documentation of this file.
00001
00039 #ifndef HW_SPI_DMA_H
00040 #define HW_SPI_DMA_H
00041
00042 #define SPI_DMA_STROBE_INIT()  do {/*PIOA_PER = BV(13); PIOA_OER = BV(13);*/} while(0)
00043
00044 #define SPI_DMA_STROBE_ON()  do {/*PIOA_CODR = BV(13);*/} while(0)
00045 #define SPI_DMA_STROBE_OFF() do {/*PIOA_SODR = BV(13);*/} while(0)
00046
00047 #endif /* HW_SPI_DMA_H */


BeRTOS: hw_stepper.h File Reference

  • hw
Defines
hw_stepper.h File Reference

Stepper hardware-specific definitions. More...

#include <hw/hw_cpufreq.h>
#include <cfg/macros.h>
#include <drv/timer.h>

Go to the source code of this file.

Defines

#define | STEPPER_PRESCALER_LOG2 1
CPU clock frequency is divided by 2^STEPPER_PRESCALER_LOG2 to obtain stepper clock.
#define | STEPPER_CLOCK ((CPU_FREQ) >> STEPPER_PRESCALER_LOG2)
Stepper timer clock frequency.
#define | STEPPER_RESET_DELAY 1
us delay to reset a stepper motor.

Detailed Description

Stepper hardware-specific definitions.

Author:
Daniele Basile <asterix@develer.com>

Definition in file hw_stepper.h.

Define Documentation

#define STEPPER_RESET_DELAY 1

us delay to reset a stepper motor.

This is the time neccessary to reset the stepper controll chip. (see datasheet for more detail).

Definition at line 76 of file hw_stepper.h.


BeRTOS: hw_stepper.h Source File

  • hw
hw_stepper.h
Go to the documentation of this file.
00001
00040 #ifndef HW_STEPPER_H
00041 #define HW_STEPPER_H
00042
00043 #include <hw/hw_cpufreq.h>
00044
00045 #include <cfg/macros.h>
00046
00047 #include <drv/timer.h>
00048
00049 #warning TODO:This is an example implentation, you must implement it!
00050
00051 #define STEPPER_STROBE_INIT \
00052 do { \
00053         /* put init code for strobe */ \
00054 } while (0)
00055
00056
00057 #define STEPPER_STROBE_ON       do { /* Implement me! */ } while(0)
00058 #define STEPPER_STROBE_OFF      do { /* Implement me! */ } while(0)
00059
00064 #define STEPPER_PRESCALER_LOG2    1
00065
00069 #define STEPPER_CLOCK ((CPU_FREQ) >> STEPPER_PRESCALER_LOG2)
00070
00076 #define STEPPER_RESET_DELAY 1
00077
00078 /*
00079  * Pins define for each stepper
00080  */
00081 #define STEPPER_1_CW_CCW_PIN             0
00082 #define STEPPER_1_HALF_FULL_PIN          0
00083 #define STEPPER_1_CONTROL_PIN            0
00084 #define STEPPER_1_ENABLE_PIN             0
00085 #define STEPPER_1_RESET_PIN              0
00086
00087 /* put here other stepper motor */
00088
00089 #define STEPPER_1_SET            do { /* Implement me! */ } while(0)
00090 /* add here the set for other stepper motor */
00091
00092 #define STEPPER_1_CLEAR          do { /* Implement me! */ } while(0)
00093 /* add here the clear for other stepper motor */
00094
00095 /*
00096  * Generic macro definition
00097  */
00098
00099 /*
00100  * Stepper init macro
00101  */
00102 #define STEPPER_PIN_INIT_MACRO(port, index) do { \
00103         /* Add here init pin code */ \
00104     } while (0)
00105
00106 /*
00107  * Stepper commands macros
00108  */
00109 #define STEPPER_SET_CW(index)             do { /* Implement me! */ } while (0)
00110 #define STEPPER_SET_CCW(index)            do { /* Implement me! */ } while (0)
00111 #define STEPPER_SET_HALF(index)           do { /* Implement me! */ } while (0)
00112 #define STEPPER_SET_FULL(index)           do { /* Implement me! */ } while (0)
00113 #define STEPPER_SET_CONTROL_LOW(index)    do { /* Implement me! */ } while (0)
00114 #define STEPPER_SET_CONTROL_HIGHT(index)  do { /* Implement me! */ } while (0)
00115 #define STEPPER_SET_ENABLE(index)         do { /* Implement me! */ } while (0)
00116 #define STEPPER_SET_DISABLE(index)        do { /* Implement me! */ } while (0)
00117 #define STEPPER_SET_RESET_ENABLE(index)   do { /* Implement me! */ } while (0)
00118 #define STEPPER_SET_RESET_DISABLE(index)  do { /* Implement me! */ } while (0)
00119
00120
00121 /*
00122  * Reset stepper macro
00123  */
00124
00125 #define STEPPER_RESET_MACRO(index) do { \
00126         STEPPER_SET_RESET_ENABLE(index); \
00127         timer_udelay(STEPPER_RESET_DELAY); \
00128         STEPPER_SET_RESET_DISABLE(index); \
00129     } while (0)
00130
00131 /*
00132  * Set half or full step macro
00133  */
00134 #define STEPPER_SET_STEP_MODE_MACRO(index, flag) do { \
00135         if (flag) \
00136             STEPPER_SET_HALF(index); \
00137         else \
00138             STEPPER_SET_FULL(index); \
00139     } while (0)
00140
00141 /*
00142  * Set control status macro
00143  */
00144 #warning TODO: This macro is not implemented (see below)
00145
00146 #define STEPPER_SET_CONTROL_BIT_MACRO(index, flag) do { \
00147         /* if (flag) */ \
00148             /* WARNING This macros not implemented */ \
00149         /* else */ \
00150             /* WARNING This macros not implemented */ \
00151     } while (0)
00152
00153 /*
00154  * Set current power macro
00155  */
00156 #warning TODO: This macro is not implemented (see below)
00157
00158 #define STEPPER_SET_POWER_CURRENT_MACRO(index, flag) do { \
00159         /* if (flag) */ \
00160             /* WARNING This macrois not implemented */ \
00161         /* else */ \
00162             /* WARNING This macrois not implemented */ \
00163     } while (0)
00164
00165 /*
00166  * Set rotation of stepper motor
00167  * - dir = 1: positive rotation
00168  * - dir = 0: no motor moviment
00169  * - dir = -1: negative rotation
00170  *
00171  */
00172 #define STEPPER_SET_DIRECTION_MACRO(index, dir) do { \
00173         switch (dir) \
00174         { \
00175         case 1: \
00176             STEPPER_SET_CW(index); \
00177             break; \
00178         case -1: \
00179             STEPPER_SET_CCW(index); \
00180             break; \
00181         case 0: \
00182             break; \
00183         } \
00184     } while (0)
00185
00186
00187 /*
00188  * Define macros for manage low level of stepper.
00189  */
00190
00191 #define STEPPER_INIT()  do { \
00192         STEPPER_PIN_INIT_MACRO(A, 1); \
00193         /* Add here code for other stepper motor */ \
00194     } while (0)
00195
00196
00197 /*
00198  * Enable select stepper motor
00199  */
00200 #define STEPPER_ENABLE(index) do { \
00201         switch (index) \
00202         { \
00203         case 1: \
00204             STEPPER_SET_ENABLE(1); \
00205             break; \
00206             /* Add here code for other stepper motor */ \
00207         } \
00208     } while (0)
00209
00210 /*
00211  * Enable all stepper connect to micro
00212  */
00213 #define STEPPER_ENABLE_ALL() do { \
00214         STEPPER_SET_ENABLE(1); \
00215         /* Add here code for other stepper motor */ \
00216     } while (0)
00217
00218 /*
00219  * Disable select stepper motor
00220  */
00221 #define STEPPER_DISABLE(index) do { \
00222         switch (index) \
00223         { \
00224         case 1: \
00225             STEPPER_SET_DISABLE(1); \
00226             break; \
00227             /* Add here code for other stepper motor */ \
00228         } \
00229     } while (0)
00230
00231 /*
00232  * Disable all stepper connect to micro
00233  */
00234 #define STEPPER_DISABLE_ALL() do { \
00235         STEPPER_SET_DISABLE(1); \
00236         /* Add here code for other stepper motor */ \
00237     } while (0)
00238
00239 /*
00240  * Reset selected stepper motor
00241  */
00242 #define STEPPER_RESET(index) do { \
00243         switch (index) \
00244         { \
00245         case 1: \
00246             STEPPER_RESET_MACRO(1); \
00247             break; \
00248             /* Add here code for other stepper motor */ \
00249         } \
00250     } while (0)
00251
00252 /*
00253  * Reset all stepper motor
00254  */
00255 #define STEPPER_RESET_ALL() do { \
00256         STEPPER_RESET_MACRO(1) \
00257         /* Add here code for other stepper motor */ \
00258     } while (0)
00259
00260 // Set half/full step macros
00261 #define STEPPER_SET_HALF_STEP(index, flag) do { \
00262         switch (index) \
00263         { \
00264         case 1: \
00265             STEPPER_SET_STEP_MODE_MACRO(1, flag); \
00266             break; \
00267             /* Add here code for other stepper motor */ \
00268         } \
00269     } while (0)
00270
00271
00272 // Control status
00273 #define STEPPER_SET_CONTROL_BIT(index, flag) do { \
00274         switch (index) \
00275         { \
00276         case 1: \
00277             STEPPER_SET_CONTROL_BIT_MACRO(1, flag); \
00278             break; \
00279             /* Add here code for other stepper motor */ \
00280         } \
00281     } while (0)
00282
00283
00284 // Set stepper power current
00285 #define STEPPER_SET_POWER_CURRENT(index, flag) do { \
00286         switch (index) \
00287         { \
00288         case 1: \
00289             STEPPER_SET_POWER_CURRENT_MACRO(1, flag); \
00290             break; \
00291             /* Add here code for other stepper motor */ \
00292         } \
00293     } while (0)
00294
00295 // Set rotation dirction of stepper motor
00296 #define STEPPER_SET_DIRECTION(index, dir) do { \
00297         switch (index) \
00298         { \
00299         case 1: \
00300             STEPPER_SET_DIRECTION_MACRO(1, dir); \
00301             break; \
00302             /* Add here code for other stepper motor */ \
00303         } \
00304     } while (0)
00305
00306 #endif /* HW_STEPPER_H */
00307
00308


BeRTOS: hw_tas5706a.h File Reference

  • hw
hw_tas5706a.h File Reference

HW pin handling. More...

#include <cfg/macros.h>

Go to the source code of this file.

Detailed Description

HW pin handling.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file hw_tas5706a.h.


BeRTOS: hw_tas5706a.h Source File

  • hw
hw_tas5706a.h
Go to the documentation of this file.
00001
00039 #ifndef HW_TAS5706A_H
00040 #define HW_TAS5706A_H
00041
00042 #include <cfg/macros.h>
00043
00044 #warning FIXME: This is an example implementation, you must implement it
00045
00046 #define TAS5706A_SETPOWERDOWN(val) do { (void) val; /* implement me */ } while (0)
00047 #define TAS5706A_SETRESET(val)     do { (void) val; /* implement me */ } while (0)
00048 #define TAS5706A_SETMUTE(val)      do { (void) val; /* implement me */ } while (0)
00049
00050 #define TAS5706A_PIN_INIT() \
00051     do { \
00052         TAS5706A_SETPOWERDOWN(true); \
00053         TAS5706A_SETRESET(true); \
00054         TAS5706A_SETMUTE(true); \
00055         /* complete me */ \
00056     } while (0)
00057
00058 #define TAS5706A_MCLK_INIT() \
00059     do { \
00060         /* implement me */ \
00061     } while(0)
00062
00063
00064 #endif /* HW_TAS5706A_H */


BeRTOS: hw_tc520.h File Reference

  • hw
hw_tc520.h File Reference

TC520 hardware-specific definitions. More...

#include <cfg/compiler.h>

Go to the source code of this file.

Detailed Description

TC520 hardware-specific definitions.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file hw_tc520.h.


BeRTOS: hw_tc520.h Source File

  • hw
hw_tc520.h
Go to the documentation of this file.
00001
00039 #ifndef HW_TC520_H
00040 #define HW_TC520_H
00041
00042 #include <cfg/compiler.h>
00043
00044 #warning TODO:This is an example implentation, you must implement it!
00045
00046 #define CE_PIN      0
00047 #define DV_PIN      0
00048 #define LOAD_PIN    0
00049 #define READ_PIN    0
00050
00051
00052 #define DV_HIGH()     /* Implement me! */
00053 #define DV_LOW()      /* Implement me! */
00054
00055 #define CE_HIGH()     /* Implement me! */
00056 #define CE_LOW()      /* Implement me! */
00057
00058 #define LOAD_HIGH()   /* Implement me! */
00059 #define LOAD_LOW()    /* Implement me! */
00060
00061 #define READ_HIGH()   /* Implement me! */
00062 #define READ_LOW()    /* Implement me! */
00063
00064 #define TC520_HW_INIT \
00065 do\
00066 {\
00067  /* Put here your code to init hardware */ \
00068 } while(0)
00069
00070 #endif /* HW_TC520_H */


BeRTOS: hw_thermo.h File Reference

  • hw
Functions
hw_thermo.h File Reference

thermo hardware-specific control functions. More...

#include "hw/thermo_map.h"
#include <cfg/debug.h>
#include <drv/ntc.h>

Go to the source code of this file.

Functions

deg_t | thermo_hw_tolerance (ThermoDev dev)
This function should return the temperature set tolerance.
deg_t | thermo_hw_read (ThermoDev dev)
Read the temperature of the hw device dev.
void | thermo_hw_off (ThermoDev dev)
Turns off a specific device.
void | thermo_hw_set (ThermoDev dev, deg_t target, deg_t cur_temp)
Based on the current temperature cur_temp and the target temperature target, this function turns on and off specific thermo device.
void | _thermo_hw_init (void)
Init hw associated with thermo-control.

Detailed Description

thermo hardware-specific control functions.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file hw_thermo.h.

Function Documentation

void thermo_hw_off ( ThermoDev dev ) [inline]

Turns off a specific device.

This function is usefull to handle errors.

Definition at line 79 of file hw_thermo.h.

void thermo_hw_set | ( | ThermoDev | dev,
 |  | deg_t | target,
 |  | deg_t | cur_temp
 | ) |  | [inline]

Based on the current temperature cur_temp and the target temperature target, this function turns on and off specific thermo device.

It may use also PID control for thermo-regolations.

Definition at line 90 of file hw_thermo.h.


BeRTOS: hw_thermo.h Source File

  • hw
hw_thermo.h
Go to the documentation of this file.
00001
00039 #ifndef HW_THERMO_H
00040 #define HW_THERMO_H
00041
00042 #include "hw/thermo_map.h"
00043
00044 #include <cfg/debug.h>
00045
00046 #include <drv/ntc.h>
00047
00048
00049 INLINE ticks_t thermo_hw_timeout(ThermoDev dev)
00050 {
00051     (void)dev;
00052     return 0;
00053 }
00054
00058 INLINE deg_t thermo_hw_tolerance(ThermoDev dev)
00059 {
00060     (void)dev;
00061     return 0;
00062 }
00063
00067 INLINE deg_t thermo_hw_read(ThermoDev dev)
00068 {
00069     ASSERT(dev < THERMO_CNT);
00070     /* Put here the code to read current temperature */
00071     return 0;
00072 }
00073
00074
00079 INLINE void thermo_hw_off(ThermoDev dev)
00080 {
00081     ASSERT(dev < THERMO_CNT);
00082     /* Put here the code to turn off the thermo device */
00083 }
00084
00090 INLINE void thermo_hw_set(ThermoDev dev, deg_t target, deg_t cur_temp)
00091 {
00092     ASSERT(dev < THERMO_CNT);
00093
00094     if (target - cur_temp > 0)
00095     {
00096         /*
00097          * We are leveaving the target temperature, so
00098          * turn on the thermo device!
00099          */
00100     }
00101     else
00102     {
00103         /*
00104          * Ok, we are near the target temperature, so
00105          * turn off the thermo device!
00106          */
00107     }
00108
00109 }
00110
00111 #define THERMO_HW_INIT  _thermo_hw_init()
00112
00116 INLINE void _thermo_hw_init(void)
00117 {
00118     /* Init your devices here! */
00119 }
00120
00121 #endif /* HW_THERMO_H */


BeRTOS: hw_timer.h File Reference

  • hw
hw_timer.h File Reference

Timer hardware-specific definitions. More...

#include "cfg/cfg_timer.h"

Go to the source code of this file.

Detailed Description

Timer hardware-specific definitions.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file hw_timer.h.


BeRTOS: hw_timer.h Source File

  • hw
hw_timer.h
Go to the documentation of this file.
00001
00039 #ifndef HW_TIMER_H
00040 #define HW_TIMER_H
00041
00042 #include "cfg/cfg_timer.h"
00043
00044 #if CONFIG_TIMER_STROBE
00045     #warning TODO:This is an example implementation, you must implement it!
00046     #define TIMER_STROBE_INIT do  { /* implement me */ } while (0)
00047     #define TIMER_STROBE_ON   do  { /* implement me */ } while (0)
00048     #define TIMER_STROBE_OFF  do  { /* implement me */ } while (0)
00049 #endif
00050
00051 #endif /* HW_TIMER_H */


BeRTOS: hw_tlv5618.h File Reference

  • hw
hw_tlv5618.h File Reference

TLV5816 DAC hardware-specific definitions. More...

Go to the source code of this file.

Detailed Description

TLV5816 DAC hardware-specific definitions.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file hw_tlv5618.h.


BeRTOS: hw_tlv5618.h Source File

  • hw
hw_tlv5618.h
Go to the documentation of this file.
00001
00039 #ifndef HW_TLV5816_H
00040 #define HW_TLV5816_H
00041
00042 #warning TODO:This is an example implementation, you must implement it!
00043
00044 #define TLV5618_CSINIT(pin) \
00045 do \
00046 { \
00047     (void)pin; \
00048     /* Implement me! */ \
00049     TLV5618_CSHIGH(pin); \
00050 } while(0)
00051
00052 #define TLV5618_CSLOW(pin) \
00053 do \
00054 { \
00055     (void)pin; \
00056     /* Implement me! */ \
00057 } while(0)
00058
00059
00060 #define TLV5618_CSHIGH(pin) \
00061 do \
00062 { \
00063     (void)pin; \
00064     /* Implement me! */ \
00065 } while(0)
00066
00067
00068 #endif /* HW_TLV5816_H */
00069


BeRTOS: hw_tmp123.h File Reference

  • hw
hw_tmp123.h File Reference

Hardware macro definition. More...

Go to the source code of this file.

Detailed Description

Hardware macro definition.

Author:
Daniele Basile <asterix@develer.com>

Definition in file hw_tmp123.h.


BeRTOS: hw_tmp123.h Source File

  • hw
hw_tmp123.h
Go to the documentation of this file.
00001
00038 #ifndef HW_TMP123_H
00039 #define HW_TMP123_H
00040
00041 #warning TODO:This is an example implentation, you must implement it!
00042
00043 #define TMP123_HW_CS_EN()    /* Implement me! */
00044 #define TMP123_HW_CS_DIS()   /* Implement me! */
00045
00046 #define TMP123_HW_INIT() \
00047     do { \
00048     /* Pin init */\
00049     } while (0)
00050
00051 #endif /* HW_TMP123_H */
00052


BeRTOS: i2c.c File Reference

  • drv
Functions
i2c.c File Reference

I2C generic driver functions (implementation). More...

#include "i2c.h"
#include "cfg/cfg_i2c.h"

Go to the source code of this file.

Functions

bool | i2c_send (const void *_buf, size_t count)
Send a sequence of bytes in master transmitter mode to the selected slave device through the I2C bus.
bool | i2c_recv (void *_buf, size_t count)
Receive a sequence of one or more bytes from the selected slave device in master receive mode through the I2C bus.

Detailed Description

I2C generic driver functions (implementation).

Author:
Francesco Sacchi <batt@develer.com>

Definition in file i2c.c.


BeRTOS: i2c.c Source File

  • drv
i2c.c
Go to the documentation of this file.
00001
00038 #include "i2c.h"
00039
00040 #include "cfg/cfg_i2c.h"
00041
00042 #if !CONFIG_I2C_DISABLE_OLD_API
00043
00044 I2c local_i2c_old_api;
00045
00052 bool i2c_send(const void *_buf, size_t count)
00053 {
00054     const uint8_t *buf = (const uint8_t *)_buf;
00055
00056     while (count--)
00057     {
00058         if (!i2c_put(*buf++))
00059             return false;
00060     }
00061     return true;
00062 }
00063
00076 bool i2c_recv(void *_buf, size_t count)
00077 {
00078     uint8_t *buf = (uint8_t *)_buf;
00079
00080     while (count--)
00081     {
00082         /*
00083          * The last byte read does not has an ACK
00084          * to stop communication.
00085          */
00086         int c = i2c_get(count);
00087
00088         if (c == EOF)
00089             return false;
00090         else
00091             *buf++ = c;
00092     }
00093
00094     return true;
00095 }
00096 #endif /* !CONFIG_I2C_DISABLE_OLD_API */
00097
00098 void i2c_genericWrite(struct I2c *i2c, const void *_buf, size_t count)
00099 {
00100     const uint8_t *buf = (const uint8_t *)_buf;
00101
00102     while (count--)
00103         i2c_putc(i2c, *buf++);
00104 }
00105
00106 void i2c_genericRead(struct I2c *i2c, void *_buf, size_t count)
00107 {
00108     uint8_t *buf = (uint8_t *)_buf;
00109
00110     while (count--)
00111         *buf++ = i2c_getc(i2c);
00112 }
00113


BeRTOS: i2c.h File Reference

  • drv
Defines | Functions
i2c.h File Reference
#include "cfg/cfg_i2c.h"
#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <cpu/attr.h>
#include <PP_STRINGIZE(drv/PP_CAT3(i2c, _, CPU_ID).h)>

Go to the source code of this file.

Defines

#define | i2c_init(args...) PP_CAT(i2c_init ## _, COUNT_PARMS(args)) (args)
Initialize I2C module.
#define | i2c_start_w(args...) PP_CAT(i2c_start_w ## _, COUNT_PARMS(args)) (args)
Start a write session.
#define | i2c_start_r(args...) PP_CAT(i2c_start_r ## _, COUNT_PARMS(args)) (args)
Start a read session.
I2C error flags
#define | I2C_OK 0
I2C no errors flag.
#define | I2C_DATA_NACK BV(4)
I2C generic error.
#define | I2C_ERR BV(3)
I2C generic error.
#define | I2C_ARB_LOST BV(2)
I2C arbitration lost error.
#define | I2C_START_TIMEOUT BV(0)
I2C timeout error on start.
#define | I2C_NO_ACK BV(1)
I2C no ack for sla start.
I2C command flags
#define | I2C_NOSTOP 0
Do not program the stop for current transition.
#define | I2C_STOP BV(0)
Program the stop for current transition.
I2C Backends.

Sometimes your cpu does not have a builtin i2c driver or you don't want, for some reason, to use that.

With this you can choose, at compile time, which backend to use. Set the CONFIG_I2C_BACKEND configuration variable in cfg_i2c.h

#define | I2C_BACKEND_BUILTIN 0
Uses cpu builtin i2c driver.
#define | I2C_BACKEND_BITBANG 1
Uses emulated bitbang driver.

Enumerations

I2C bitbang devices enum
enum | { , I2C_BITBANG0 = 1000, I2C_BITBANG1 , I2C_BITBANG_CNT }

Functions

void | i2c_hw_init (I2c *i2c, int dev, uint32_t clock)
Initialize I2C module.
void | i2c_hw_bitbangInit (I2c *i2c, int dev)
Initialize i2c module.
bool | i2c_send (const void *_buf, size_t count)
Send a sequence of bytes in master transmitter mode to the selected slave device through the I2C bus.
bool | i2c_recv (void *_buf, size_t count)
Receive a sequence of one or more bytes from the selected slave device in master receive mode through the I2C bus.
void | i2c_init_0 (void)
Initialize I2C module (old API).
I2c builtin prototypes.

Do NOT use these function directly, instead, you can call the ones named without "_builtin_" and specify in cfg_i2c.h (CONFIG_I2C_BACKEND) that you want the builtin backend.

bool | i2c_builtin_start_w (uint8_t id)
Send START condition and select slave for write.
bool | i2c_builtin_start_r (uint8_t id)
Send START condition and select slave for read.
void | i2c_builtin_stop (void)
Send STOP condition.
bool | i2c_builtin_put (uint8_t _data)
Put a single byte in master transmitter mode to the selected slave device through the TWI bus.
int | i2c_builtin_get (bool ack)
Get 1 byte from slave in master transmitter mode to the selected slave device through the TWI bus.
I2c bitbang prototypes.

Do NOT use these function directly, instead, you can call the ones named without "_bitbang_" and specify in cfg_i2c.h (CONFIG_I2C_BACKEND) that you want the bitbang backend.

bool | i2c_bitbang_start_w (uint8_t id)
bool | i2c_bitbang_start_r (uint8_t id)
void | i2c_bitbang_stop (void)
bool | i2c_bitbang_put (uint8_t _data)
int | i2c_bitbang_get (bool ack)

I2C interface functions

#define | i2c_init_3(i2c, dev, clock)
Initialize I2C context structure.
void | i2c_start_r_4 (I2c *i2c, uint16_t slave_addr, size_t size, int flags)
Start a read session.
void | i2c_start_w_4 (I2c *i2c, uint16_t slave_addr, size_t size, int flags)
Start a write session.
uint8_t | i2c_getc (I2c *i2c)
Read a byte from I2C bus.
void | i2c_putc (I2c *i2c, uint8_t data)
Write the byte data into I2C port i2c.
void | i2c_write (I2c *i2c, const void *_buf, size_t count)
Write count bytes to port i2c, reading from _buf.
void | i2c_read (I2c *i2c, void *_buf, size_t count)
Read count bytes into buffer _buf from device i2c.
int | i2c_error (I2c *i2c)
Return the error condition of the bus and clear errors.

Detailed Description

Definition in file i2c.h.


BeRTOS: i2c.h Source File

  • drv
i2c.h
Go to the documentation of this file.
00001
00095 #ifndef DRV_I2C_H
00096 #define DRV_I2C_H
00097
00098 #include "cfg/cfg_i2c.h"
00099
00100 #include <cfg/compiler.h>
00101 #include <cfg/macros.h>
00102 #include <cfg/debug.h>
00103
00104 #include <cpu/attr.h>
00105
00106 #define I2C_READBIT BV(0)
00107
00108
00109 /*
00110  * The following macros are needed to maintain compatibility with older i2c API.
00111  * They can be safely removed once the old API is removed.
00112  */
00113
00118 #if COMPILER_C99
00119     #define i2c_init(...)           PP_CAT(i2c_init ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__)
00120     #define i2c_start_w(...)        PP_CAT(i2c_start_w ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__)
00121     #define i2c_start_r(...)        PP_CAT(i2c_start_r ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__)
00122 #else
00123
00140     #define i2c_init(args...)       PP_CAT(i2c_init ## _, COUNT_PARMS(args)) (args)
00141
00158     #define i2c_start_w(args...)    PP_CAT(i2c_start_w ## _, COUNT_PARMS(args)) (args)
00159
00176     #define i2c_start_r(args...)    PP_CAT(i2c_start_r ## _, COUNT_PARMS(args)) (args)
00177 #endif
00178
00184 enum
00185 {
00186     I2C_BITBANG_OLD = -1,
00187     I2C_BITBANG0 = 1000,
00188     I2C_BITBANG1,
00189     I2C_BITBANG2,
00190     I2C_BITBANG3,
00191     I2C_BITBANG4,
00192     I2C_BITBANG5,
00193     I2C_BITBANG6,
00194     I2C_BITBANG7,
00195     I2C_BITBANG8,
00196     I2C_BITBANG9,
00197
00198     I2C_BITBANG_CNT
00199 };
00200
00211 #define I2C_OK               0     ///< I2C no errors flag
00212 #define I2C_DATA_NACK     BV(4)    ///< I2C generic error
00213 #define I2C_ERR           BV(3)    ///< I2C generic error
00214 #define I2C_ARB_LOST      BV(2)    ///< I2C arbitration lost error
00215 #define I2C_START_TIMEOUT BV(0)    ///< I2C timeout error on start
00216 #define I2C_NO_ACK        BV(1)    ///< I2C no ack for sla start
00217
00224 #define I2C_NOSTOP           0    ///< Do not program the stop for current transition
00225 #define I2C_STOP          BV(0)   ///< Program the stop for current transition
00226
00227 #define I2C_START_R       BV(1)   // Start read command
00228 #define I2C_START_W          0    // Start write command
00229
00230
00231 #define I2C_TEST_START(flag)  ((flag) & I2C_START_R)
00232 #define I2C_TEST_STOP(flag)   ((flag) & I2C_STOP)
00233
00234 struct I2cHardware;
00235 struct I2c;
00236
00237 typedef void (*i2c_start_t)(struct I2c *i2c, uint16_t slave_addr);
00238 typedef uint8_t (*i2c_getc_t)(struct I2c *i2c);
00239 typedef void (*i2c_putc_t)(struct I2c *i2c, uint8_t data);
00240 typedef void (*i2c_write_t)(struct I2c *i2c, const void *_buf, size_t count);
00241 typedef void (*i2c_read_t)(struct I2c *i2c, void *_buf, size_t count);
00242
00243 typedef struct I2cVT
00244 {
00245     i2c_start_t start;
00246     i2c_getc_t   getc;
00247     i2c_putc_t   putc;
00248     i2c_write_t  write;
00249     i2c_read_t   read;
00250 } I2cVT;
00251
00252 typedef struct I2c
00253 {
00254     int errors;
00255     int flags;
00256     size_t xfer_size;
00257     struct I2cHardware* hw;
00258     const struct I2cVT *vt;
00259 } I2c;
00260
00261
00262 #include CPU_HEADER(i2c)
00263
00264 /*
00265  * Low level i2c  init implementation prototype.
00266  */
00267 void i2c_hw_init(I2c *i2c, int dev, uint32_t clock);
00268 void i2c_hw_bitbangInit(I2c *i2c, int dev);
00269
00270 void i2c_genericWrite(I2c *i2c, const void *_buf, size_t count);
00271 void i2c_genericRead(I2c *i2c, void *_buf, size_t count);
00272
00273 /*
00274  * Start a i2c transfer.
00275  *
00276  * \param i2c Context structure.
00277  * \param slave_addr Address of slave device
00278  * \param size Size of the transfer
00279  */
00280 INLINE void i2c_start(I2c *i2c, uint16_t slave_addr, size_t size)
00281 {
00282     ASSERT(i2c->vt);
00283     ASSERT(i2c->vt->start);
00284
00285     if (!i2c->errors)
00286         ASSERT(i2c->xfer_size == 0);
00287
00288     i2c->errors = 0;
00289     i2c->xfer_size = size;
00290
00291     i2c->vt->start(i2c, slave_addr);
00292 }
00293
00307 INLINE void i2c_start_r_4(I2c *i2c, uint16_t slave_addr, size_t size, int flags)
00308 {
00309     ASSERT(i2c);
00310     i2c->flags = flags | I2C_START_R;
00311     i2c_start(i2c, slave_addr, size);
00312 }
00313
00321 INLINE void i2c_start_w_4(I2c *i2c, uint16_t slave_addr, size_t size, int flags)
00322 {
00323     ASSERT(i2c);
00324     i2c->flags = flags & ~I2C_START_R;
00325     i2c_start(i2c, slave_addr, size);
00326 }
00327
00333 INLINE uint8_t i2c_getc(I2c *i2c)
00334 {
00335     ASSERT(i2c);
00336     ASSERT(i2c->vt);
00337     ASSERT(i2c->vt->getc);
00338
00339     ASSERT(i2c->xfer_size);
00340
00341     ASSERT(I2C_TEST_START(i2c->flags) == I2C_START_R);
00342
00343     if (!i2c->errors)
00344     {
00345         uint8_t data = i2c->vt->getc(i2c);
00346         i2c->xfer_size--;
00347         return data;
00348     }
00349     else
00350         return 0xFF;
00351 }
00352
00358 INLINE void i2c_putc(I2c *i2c, uint8_t data)
00359 {
00360     ASSERT(i2c);
00361     ASSERT(i2c->vt);
00362     ASSERT(i2c->vt->putc);
00363
00364     ASSERT(i2c->xfer_size);
00365
00366     ASSERT(I2C_TEST_START(i2c->flags) == I2C_START_W);
00367
00368     if (!i2c->errors)
00369     {
00370         i2c->vt->putc(i2c, data);
00371         i2c->xfer_size--;
00372     }
00373 }
00374
00381 INLINE void i2c_write(I2c *i2c, const void *_buf, size_t count)
00382 {
00383     ASSERT(i2c);
00384     ASSERT(i2c->vt);
00385     ASSERT(i2c->vt->write);
00386
00387     ASSERT(_buf);
00388     ASSERT(count);
00389     ASSERT(count <= i2c->xfer_size);
00390
00391     ASSERT(I2C_TEST_START(i2c->flags) == I2C_START_W);
00392
00393     if (!i2c->errors)
00394         i2c->vt->write(i2c, _buf, count);
00395 }
00396
00403 INLINE void i2c_read(I2c *i2c, void *_buf, size_t count)
00404 {
00405     ASSERT(i2c);
00406     ASSERT(i2c->vt);
00407     ASSERT(i2c->vt->read);
00408
00409     ASSERT(_buf);
00410     ASSERT(count);
00411     ASSERT(count <= i2c->xfer_size);
00412
00413     ASSERT(I2C_TEST_START(i2c->flags) == I2C_START_R);
00414
00415     if (!i2c->errors)
00416         i2c->vt->read(i2c, _buf, count);
00417 }
00418
00422 INLINE int i2c_error(I2c *i2c)
00423 {
00424     ASSERT(i2c);
00425     int err = i2c->errors;
00426     i2c->errors = 0;
00427
00428     return err;
00429 }
00430
00438 #define i2c_init_3(i2c, dev, clock)   ((((dev) >= I2C_BITBANG0) | ((dev) == I2C_BITBANG_OLD)) ? \
00439                                         i2c_hw_bitbangInit((i2c), (dev)) : i2c_hw_init((i2c), (dev), (clock)))
00440  // i2c_api
00442
00451 #if !CONFIG_I2C_DISABLE_OLD_API
00452
00463 #define I2C_BACKEND_BUILTIN 0 ///< Uses cpu builtin i2c driver
00464 #define I2C_BACKEND_BITBANG 1 ///< Uses emulated bitbang driver
00465
00476 bool i2c_builtin_start_w(uint8_t id);
00477 bool i2c_builtin_start_r(uint8_t id);
00478 void i2c_builtin_stop(void);
00479 bool i2c_builtin_put(uint8_t _data);
00480 int i2c_builtin_get(bool ack);
00492 bool i2c_bitbang_start_w(uint8_t id);
00493 bool i2c_bitbang_start_r(uint8_t id);
00494 void i2c_bitbang_stop(void);
00495 bool i2c_bitbang_put(uint8_t _data);
00496 int i2c_bitbang_get(bool ack);
00499 #ifndef CONFIG_I2C_BACKEND
00500 #define  CONFIG_I2C_BACKEND  I2C_BACKEND_BUILTIN
00501 #endif
00502
00503 #if CONFIG_I2C_BACKEND == I2C_BACKEND_BUILTIN
00504     #define i2c_start_w_1   i2c_builtin_start_w
00505     #define i2c_start_r_1   i2c_builtin_start_r
00506     #define i2c_stop        i2c_builtin_stop
00507     #define i2c_put         i2c_builtin_put
00508     #define i2c_get         i2c_builtin_get
00509 #elif CONFIG_I2C_BACKEND == I2C_BACKEND_BITBANG
00510     #define i2c_start_w_1   i2c_bitbang_start_w
00511     #define i2c_start_r_1   i2c_bitbang_start_r
00512     #define i2c_stop        i2c_bitbang_stop
00513     #define i2c_put         i2c_bitbang_put
00514     #define i2c_get         i2c_bitbang_get
00515 #else
00516     #error Unsupported i2c backend.
00517 #endif
00518
00519
00520 bool i2c_send(const void *_buf, size_t count);
00521 bool i2c_recv(void *_buf, size_t count);
00522
00526 extern I2c local_i2c_old_api;
00527
00532 INLINE void i2c_init_0(void)
00533 {
00534     #if CONFIG_I2C_BACKEND == I2C_BACKEND_BITBANG
00535         i2c_init_3(&local_i2c_old_api, I2C_BITBANG_OLD, CONFIG_I2C_FREQ);
00536     #else
00537         i2c_init_3(&local_i2c_old_api, 0, CONFIG_I2C_FREQ);
00538     #endif
00539 }
00540 #endif /* !CONFIG_I2C_DISABLE_OLD_API */
00541  //defgroup i2c_driver
00543
00544 #endif


BeRTOS: i2c_arm.h File Reference

  • cpu
  • arm
  • drv
i2c_arm.h File Reference

Low-level I2C module for ARM (interface). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level I2C module for ARM (interface).

Author:
Daniele Basile <asterix@develer.com>

Definition in file i2c_arm.h.


BeRTOS: i2c_arm.h Source File

  • cpu
  • arm
  • drv
i2c_arm.h
Go to the documentation of this file.
00001
00039 #include <cpu/detect.h>
00040
00041 #if CPU_ARM_AT91
00042     #include "i2c_at91.h"
00043 #elif CPU_ARM_LPC2378
00044     #include "i2c_lpc2.h"
00045 /*#elif  Add other ARM families here */
00046 #else
00047     #error Unknown CPU
00048 #endif


BeRTOS: i2c_at91.h File Reference

  • cpu
  • arm
  • drv
i2c_at91.h File Reference

Driver for the AT91SAM7X I2C (interface) More...

#include <drv/i2c.h>

Go to the source code of this file.

Enumerations

I2C devices enum
enum { , I2C_CNT }

Detailed Description

Driver for the AT91SAM7X I2C (interface)

Author:
Daniele Basile <asterix@develer.com>

Definition in file i2c_at91.h.

Enumeration Type Documentation

anonymous enum
Enumerator:
I2C_CNT

Number of serial ports.

Definition at line 47 of file i2c_at91.h.


BeRTOS: i2c_at91.h Source File

  • cpu
  • arm
  • drv
i2c_at91.h
Go to the documentation of this file.
00001
00039 #ifndef I2C_AT91_H
00040 #define I2C_AT91_H
00041
00042 #include <drv/i2c.h>
00043
00047 enum
00048 {
00049     I2C0,
00050
00051     I2C_CNT
00052 };
00053
00054 #endif /* I2C_AT91_H */


BeRTOS: i2c_avr.c File Reference

  • cpu
  • avr
  • drv
Functions
i2c_avr.c File Reference

Driver for the AVR ATMega TWI (implementation) More...

#include "cfg/cfg_i2c.h"
#include <hw/hw_cpufreq.h>
#include <cfg/log.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cfg/module.h>
#include <cpu/detect.h>
#include <cpu/irq.h>
#include <drv/timer.h>
#include <drv/i2c.h>
#include <cpu/power.h>
#include <compat/twi.h>

Go to the source code of this file.

Functions

static bool | i2c_builtin_start (void)
Send START condition on the bus.
bool | i2c_builtin_start_w (uint8_t id)
Send START condition and select slave for write.
bool | i2c_builtin_start_r (uint8_t id)
Send START condition and select slave for read.
void | i2c_builtin_stop (void)
Send STOP condition.
bool | i2c_builtin_put (const uint8_t data)
Put a single byte in master transmitter mode to the selected slave device through the TWI bus.
int | i2c_builtin_get (bool ack)
Get 1 byte from slave in master transmitter mode to the selected slave device through the TWI bus.
bool | i2c_hw_start (void)
Send START condition on the bus.
void | i2c_hw_stop (void)
Send STOP condition.
void | i2c_hw_init (I2c *i2c, int dev, uint32_t clock)
Initialize I2C module.

Detailed Description

Driver for the AVR ATMega TWI (implementation)

Author:
Stefano Fedrigo <aleph@develer.com>
Bernie Innocenti <bernie@codewiz.org>
Daniele Basile <asterix@develer.com>

Definition in file i2c_avr.c.

Function Documentation

static bool i2c_builtin_start ( void ) [static]

Send START condition on the bus.

Returns:
true on success, false otherwise.

Definition at line 73 of file i2c_avr.c.


BeRTOS: i2c_avr.c Source File

  • cpu
  • avr
  • drv
i2c_avr.c
Go to the documentation of this file.
00001
00041 #include "cfg/cfg_i2c.h"
00042
00043 #include <hw/hw_cpufreq.h>  /* CPU_FREQ */
00044
00045 #define LOG_LEVEL  I2C_LOG_LEVEL
00046 #define LOG_FORMAT I2C_LOG_FORMAT
00047
00048 #include <cfg/log.h>
00049
00050 #include <cfg/debug.h>
00051 #include <cfg/macros.h> // BV()
00052 #include <cfg/module.h>
00053
00054 #include <cpu/detect.h>
00055 #include <cpu/irq.h>
00056 #include <drv/timer.h>
00057 #include <drv/i2c.h>
00058
00059 #include <cpu/power.h>
00060
00061 #include <compat/twi.h>
00062
00063 #if !CONFIG_I2C_DISABLE_OLD_API
00064
00065 /* Wait for TWINT flag set: bus is ready */
00066 #define WAIT_TWI_READY  do {} while (!(TWCR & BV(TWINT)))
00067
00073 static bool i2c_builtin_start(void)
00074 {
00075     TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN);
00076     WAIT_TWI_READY;
00077
00078     if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START)
00079         return true;
00080
00081     LOG_ERR("!TW_(REP)START: %x\n", TWSR);
00082     return false;
00083 }
00084
00085
00093 bool i2c_builtin_start_w(uint8_t id)
00094 {
00095     /*
00096      * Loop on the select write sequence: when the eeprom is busy
00097      * writing previously sent data it will reply to the SLA_W
00098      * control byte with a NACK.  In this case, we must
00099      * keep trying until the eeprom responds with an ACK.
00100      */
00101     ticks_t start = timer_clock();
00102     while (i2c_builtin_start())
00103     {
00104         TWDR = id & ~I2C_READBIT;
00105         TWCR = BV(TWINT) | BV(TWEN);
00106         WAIT_TWI_READY;
00107
00108         if (TW_STATUS == TW_MT_SLA_ACK)
00109             return true;
00110         else if (TW_STATUS != TW_MT_SLA_NACK)
00111         {
00112             LOG_ERR("!TW_MT_SLA_(N)ACK: %x\n", TWSR);
00113             break;
00114         }
00115         else if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
00116         {
00117             LOG_ERR("Timeout on TWI_MT_START\n");
00118             break;
00119         }
00120     }
00121
00122     return false;
00123 }
00124
00125
00133 bool i2c_builtin_start_r(uint8_t id)
00134 {
00135     if (i2c_builtin_start())
00136     {
00137         TWDR = id | I2C_READBIT;
00138         TWCR = BV(TWINT) | BV(TWEN);
00139         WAIT_TWI_READY;
00140
00141         if (TW_STATUS == TW_MR_SLA_ACK)
00142             return true;
00143
00144         LOG_ERR("!TW_MR_SLA_ACK: %x\n", TWSR);
00145     }
00146
00147     return false;
00148 }
00149
00150
00154 void i2c_builtin_stop(void)
00155 {
00156     TWCR = BV(TWINT) | BV(TWEN) | BV(TWSTO);
00157 }
00158
00159
00166 bool i2c_builtin_put(const uint8_t data)
00167 {
00168     TWDR = data;
00169     TWCR = BV(TWINT) | BV(TWEN);
00170     WAIT_TWI_READY;
00171     if (TW_STATUS != TW_MT_DATA_ACK)
00172     {
00173         LOG_ERR("!TW_MT_DATA_ACK: %x\n", TWSR);
00174         return false;
00175     }
00176     return true;
00177 }
00178
00187 int i2c_builtin_get(bool ack)
00188 {
00189     TWCR = BV(TWINT) | BV(TWEN) | (ack ? BV(TWEA) : 0);
00190     WAIT_TWI_READY;
00191
00192     if (ack)
00193     {
00194         if (TW_STATUS != TW_MR_DATA_ACK)
00195         {
00196             LOG_ERR("!TW_MR_DATA_ACK: %x\n", TWSR);
00197             return EOF;
00198         }
00199     }
00200     else
00201     {
00202         if (TW_STATUS != TW_MR_DATA_NACK)
00203         {
00204             LOG_ERR("!TW_MR_DATA_NACK: %x\n", TWSR);
00205             return EOF;
00206         }
00207     }
00208
00209     /* avoid sign extension */
00210     return (int)(uint8_t)TWDR;
00211 }
00212
00213 #endif /* !CONFIG_I2C_DISABLE_OLD_API */
00214
00215 /*
00216  * New Api
00217  */
00218 struct I2cHardware
00219 {
00220 };
00221
00222
00223 /* Wait for TWINT flag set: bus is ready */
00224 #define WAIT_READY() \
00225     do { \
00226         while (!(TWCR & BV(TWINT))) \
00227             cpu_relax(); \
00228     } while (0)
00229
00233 INLINE bool i2c_hw_start(void)
00234 {
00235     TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN);
00236     WAIT_READY();
00237
00238     if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START)
00239         return true;
00240
00241     return false;
00242 }
00243
00247 INLINE void i2c_hw_stop(void)
00248 {
00249     TWCR = BV(TWINT) | BV(TWEN) | BV(TWSTO);
00250 }
00251
00252 static void i2c_avr_start(I2c *i2c, uint16_t slave_addr)
00253 {
00254     /*
00255      * Loop on the select write sequence: when the eeprom is busy
00256      * writing previously sent data it will reply to the SLA_W
00257      * control byte with a NACK.  In this case, we must
00258      * keep trying until the slave responds with an ACK.
00259      */
00260     ticks_t start = timer_clock();
00261     while (i2c_hw_start())
00262     {
00263         uint8_t sla_ack = 0;
00264         uint8_t sla_nack = 0;
00265         if (I2C_TEST_START(i2c->flags) == I2C_START_W)
00266         {
00267             TWDR = slave_addr & ~I2C_READBIT;
00268             sla_ack = TW_MT_SLA_ACK;
00269             sla_nack = TW_MT_SLA_NACK;
00270         }
00271         else
00272         {
00273             TWDR = slave_addr | I2C_READBIT;
00274             sla_ack = TW_MR_SLA_ACK;
00275             sla_nack = TW_MR_SLA_NACK;
00276         }
00277
00278         TWCR = BV(TWINT) | BV(TWEN);
00279         WAIT_READY();
00280
00281         if (TW_STATUS == sla_ack)
00282             return;
00283         else if (TW_STATUS != sla_nack)
00284         {
00285             LOG_ERR("Start addr NACK[%x]\n", TWSR);
00286             i2c->errors |= I2C_NO_ACK;
00287             i2c_hw_stop();
00288             break;
00289         }
00290         else if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
00291         {
00292             LOG_ERR("Start timeout\n");
00293             i2c->errors |= I2C_START_TIMEOUT;
00294             i2c_hw_stop();
00295             break;
00296         }
00297     }
00298
00299     LOG_ERR("I2c error\n");
00300     i2c->errors |= I2C_ERR;
00301     i2c_hw_stop();
00302 }
00303
00304 static void i2c_avr_putc(I2c *i2c, const uint8_t data)
00305 {
00306
00307     TWDR = data;
00308     TWCR = BV(TWINT) | BV(TWEN);
00309     WAIT_READY();
00310
00311     if (TW_STATUS != TW_MT_DATA_ACK)
00312     {
00313         LOG_ERR("Data nack[%x]\n", TWSR);
00314         i2c->errors |= I2C_DATA_NACK;
00315         i2c_hw_stop();
00316     }
00317
00318     if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP))
00319         i2c_hw_stop();
00320 }
00321
00322 static uint8_t i2c_avr_getc(I2c *i2c)
00323 {
00324     uint8_t data_flag = 0;
00325     if (i2c->xfer_size == 1)
00326     {
00327         TWCR = BV(TWINT) | BV(TWEN);
00328         data_flag = TW_MR_DATA_NACK;
00329     }
00330     else
00331     {
00332         TWCR = BV(TWINT) | BV(TWEN) | BV(TWEA);
00333         data_flag = TW_MR_DATA_ACK;
00334     }
00335
00336     WAIT_READY();
00337
00338     if (TW_STATUS != data_flag)
00339     {
00340         LOG_ERR("Data nack[%x]\n", TWSR);
00341         i2c->errors |= I2C_DATA_NACK;
00342         i2c_hw_stop();
00343
00344         return 0xFF;
00345     }
00346
00347     uint8_t data = TWDR;
00348
00349     if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP))
00350         i2c_hw_stop();
00351
00352     return data;
00353 }
00354
00355
00356 static const I2cVT i2c_avr_vt =
00357 {
00358     .start = i2c_avr_start,
00359     .getc = i2c_avr_getc,
00360     .putc = i2c_avr_putc,
00361     .write = i2c_genericWrite,
00362     .read = i2c_genericRead,
00363 };
00364
00365 struct I2cHardware i2c_avr_hw[] =
00366 {
00367     { /* I2C0 */
00368     },
00369 };
00370
00374 void i2c_hw_init(I2c *i2c, int dev, uint32_t clock)
00375 {
00376     i2c->hw = &i2c_avr_hw[dev];
00377     i2c->vt = &i2c_avr_vt;
00378
00379     ATOMIC(
00380         /*
00381          * This is pretty useless according to AVR's datasheet,
00382          * but it helps us driving the TWI data lines on boards
00383          * where the bus pull-up resistors are missing.  This is
00384          * probably due to some unwanted interaction between the
00385          * port pin and the TWI lines.
00386          */
00387     #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
00388         PORTD |= BV(PD0) | BV(PD1);
00389         DDRD  |= BV(PD0) | BV(PD1);
00390     #elif CPU_AVR_ATMEGA8
00391         PORTC |= BV(PC4) | BV(PC5);
00392         DDRC  |= BV(PC4) | BV(PC5);
00393     #elif CPU_AVR_ATMEGA32
00394         PORTC |= BV(PC1) | BV(PC0);
00395         DDRC  |= BV(PC1) | BV(PC0);
00396     #else
00397         #error Unsupported architecture
00398     #endif
00399
00400         /*
00401          * Set speed:
00402          * F = CPU_FREQ / (16 + 2*TWBR * 4^TWPS)
00403          */
00404         ASSERT(clock);
00405         #define TWI_PRESC    1       /* 4 ^ TWPS */
00406
00407         TWBR = (CPU_FREQ / (2 * clock * TWI_PRESC)) - (8 / TWI_PRESC);
00408         TWSR = 0;
00409         TWCR = BV(TWEN);
00410     );
00411 }


BeRTOS: i2c_avr.h File Reference

  • cpu
  • avr
  • drv
i2c_avr.h File Reference

Driver for the AVR ATMega TWI (implementation) More...

#include <drv/i2c.h>

Go to the source code of this file.

Enumerations

I2C devices enum
enum { , I2C_CNT }

Detailed Description

Driver for the AVR ATMega TWI (implementation)

Author:
Daniele Basile <asterix@develer.com>

Definition in file i2c_avr.h.

Enumeration Type Documentation

anonymous enum
Enumerator:
I2C_CNT

Number of serial ports.

Definition at line 46 of file i2c_avr.h.


BeRTOS: i2c_avr.h Source File

  • cpu
  • avr
  • drv
i2c_avr.h
Go to the documentation of this file.
00001
00038 #ifndef I2C_AVR_H
00039 #define I2C_AVR_H
00040
00041 #include <drv/i2c.h>
00042
00046 enum
00047 {
00048     I2C0,
00049
00050     I2C_CNT
00051 };
00052
00053 #endif /* I2C_LM3S_H */
00054


BeRTOS: i2c_bitbang.c File Reference

  • drv
Functions
i2c_bitbang.c File Reference

I2C bitbang driver (implementation) More...

#include "hw/hw_i2c_bitbang.h"
#include "cfg/cfg_i2c.h"
#include <cfg/log.h>
#include <cfg/macros.h>
#include <cfg/module.h>
#include <drv/timer.h>
#include <drv/i2c.h>
#include <cpu/irq.h>
#include <cpu/attr.h>

Go to the source code of this file.

Functions

void i2c_hw_bitbangInit (I2c *i2c, int dev)
Initialize i2c module.

Detailed Description

I2C bitbang driver (implementation)

Author:
Francesco Sacchi <batt@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file i2c_bitbang.c.


BeRTOS: i2c_bitbang.c Source File

  • drv
i2c_bitbang.c
Go to the documentation of this file.
00001
00039 #include "hw/hw_i2c_bitbang.h"
00040
00041 #include "cfg/cfg_i2c.h"
00042
00043 #define LOG_LEVEL  I2C_LOG_LEVEL
00044 #define LOG_FORMAT I2C_LOG_FORMAT
00045
00046 #include <cfg/log.h>
00047 #include <cfg/macros.h>
00048 #include <cfg/module.h>
00049
00050 #include <drv/timer.h>
00051 #include <drv/i2c.h>
00052
00053 #include <cpu/irq.h>
00054
00055 #include <cpu/attr.h>
00056
00057 #if !CONFIG_I2C_DISABLE_OLD_API
00058
00059 INLINE bool i2c_bitbang_start(void)
00060 {
00061     SDA_HI;
00062     SCL_HI;
00063     I2C_HALFBIT_DELAY();
00064     SDA_LO;
00065     I2C_HALFBIT_DELAY();
00066
00067     return !SDA_IN;
00068 }
00069
00070 void i2c_bitbang_stop(void)
00071 {
00072     SDA_LO;
00073     SCL_HI;
00074     I2C_HALFBIT_DELAY();
00075     SDA_HI;
00076 }
00077
00078 bool i2c_bitbang_put(uint8_t _data)
00079 {
00080     /* Add ACK bit */
00081     uint16_t data = (_data << 1) | 1;
00082
00083     for (uint16_t i = 0x100; i != 0; i >>= 1)
00084     {
00085         SCL_LO;
00086         if (data & i)
00087             SDA_HI;
00088         else
00089             SDA_LO;
00090         I2C_HALFBIT_DELAY();
00091
00092         SCL_HI;
00093         I2C_HALFBIT_DELAY();
00094     }
00095
00096     bool ack = !SDA_IN;
00097     SCL_LO;
00098     I2C_HALFBIT_DELAY();
00099     return ack;
00100 }
00101
00102 bool i2c_bitbang_start_w(uint8_t id)
00103 {
00104     id &= ~I2C_READBIT;
00105     /*
00106      * Loop on the select write sequence: when the device is busy
00107      * writing previously sent data it will reply to the SLA_W
00108      * control byte with a NACK.  In this case, we must
00109      * keep trying until the deveice responds with an ACK.
00110      */
00111     ticks_t start = timer_clock();
00112     while (i2c_bitbang_start())
00113     {
00114         if (i2c_bitbang_put(id))
00115             return true;
00116         else if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
00117         {
00118             LOG_ERR("Timeout on I2C start write\n");
00119             break;
00120         }
00121         //LOG_INFO("Rep start\n");
00122     }
00123
00124     return false;
00125 }
00126
00127 bool i2c_bitbang_start_r(uint8_t id)
00128 {
00129     id |= I2C_READBIT;
00130     if (i2c_bitbang_start())
00131     {
00132         if (i2c_bitbang_put(id))
00133             return true;
00134
00135         LOG_ERR("NACK on I2c start read\n");
00136     }
00137
00138     return false;
00139 }
00140
00141 int i2c_bitbang_get(bool ack)
00142 {
00143     uint8_t data = 0;
00144     for (uint8_t i = 0x80; i != 0; i >>= 1)
00145     {
00146         SCL_LO;
00147         I2C_HALFBIT_DELAY();
00148         SCL_HI;
00149         if (SDA_IN)
00150             data |= i;
00151         else
00152             data &= ~i;
00153
00154         I2C_HALFBIT_DELAY();
00155     }
00156     SCL_LO;
00157
00158     if (ack)
00159         SDA_LO;
00160     else
00161         SDA_HI;
00162
00163     I2C_HALFBIT_DELAY();
00164     SCL_HI;
00165     I2C_HALFBIT_DELAY();
00166     SCL_LO;
00167     SDA_HI;
00168     /* avoid sign extension */
00169     return (int)(uint8_t)data;
00170 }
00171
00172 #endif /* !CONFIG_I2C_DISABLE_OLD_API */
00173
00174 /*
00175  * New I2C API
00176  */
00177 static bool old_api = false;
00178 #define I2C_DEV(i2c)            ((int)((i2c)->hw))
00179
00180 static void i2c_bitbang_stop_1(struct I2c *i2c)
00181 {
00182     if (old_api)
00183     {
00184         SDA_LO;
00185         SCL_HI;
00186         I2C_HALFBIT_DELAY();
00187         SDA_HI;
00188     }
00189     else
00190     {
00191         i2c_sdaLo(I2C_DEV(i2c));
00192         i2c_sclHi(I2C_DEV(i2c));
00193         i2c_halfbitDelay(I2C_DEV(i2c));
00194         i2c_sdaHi(I2C_DEV(i2c));
00195     }
00196 }
00197
00198 INLINE bool i2c_bitbang_start_1(struct I2c *i2c)
00199 {
00200     bool ret;
00201     /* Clear all error, we restart */
00202     i2c->errors &= ~(I2C_NO_ACK | I2C_ARB_LOST);
00203
00204     if (old_api)
00205     {
00206         SDA_HI;
00207         SCL_HI;
00208         I2C_HALFBIT_DELAY();
00209         SDA_LO;
00210         I2C_HALFBIT_DELAY();
00211
00212         ret = !SDA_IN;
00213     }
00214     else
00215     {
00216         i2c_sdaHi(I2C_DEV(i2c));
00217         i2c_sclHi(I2C_DEV(i2c));
00218         i2c_halfbitDelay(I2C_DEV(i2c));
00219         i2c_sdaLo(I2C_DEV(i2c));
00220         i2c_halfbitDelay(I2C_DEV(i2c));
00221
00222         ret = !i2c_sdaIn(I2C_DEV(i2c));
00223     }
00224
00225     return ret;
00226 }
00227
00228
00229 static uint8_t i2c_bitbang_getc(struct I2c *i2c)
00230 {
00231     uint8_t data = 0;
00232     if (old_api)
00233     {
00234         for (uint8_t i = 0x80; i != 0; i >>= 1)
00235         {
00236             SCL_LO;
00237             I2C_HALFBIT_DELAY();
00238             SCL_HI;
00239             if (SDA_IN)
00240                 data |= i;
00241             else
00242                 data &= ~i;
00243
00244             I2C_HALFBIT_DELAY();
00245         }
00246         SCL_LO;
00247
00248         /* Generate ACK/NACK */
00249         if (i2c->xfer_size > 1)
00250             SDA_LO;
00251         else
00252             SDA_HI;
00253
00254         I2C_HALFBIT_DELAY();
00255         SCL_HI;
00256         I2C_HALFBIT_DELAY();
00257         SCL_LO;
00258         SDA_HI;
00259     }
00260     else
00261     {
00262         for (uint8_t i = 0x80; i != 0; i >>= 1)
00263         {
00264             i2c_sclLo(I2C_DEV(i2c));
00265             i2c_halfbitDelay(I2C_DEV(i2c));
00266             i2c_sclHi(I2C_DEV(i2c));
00267             if (i2c_sdaIn(I2C_DEV(i2c)))
00268                 data |= i;
00269             else
00270                 data &= ~i;
00271
00272             i2c_halfbitDelay(I2C_DEV(i2c));
00273         }
00274         i2c_sclLo(I2C_DEV(i2c));
00275
00276         /* Generate ACK/NACK */
00277         if (i2c->xfer_size > 1)
00278             i2c_sdaLo(I2C_DEV(i2c));
00279         else
00280             i2c_sdaHi(I2C_DEV(i2c));
00281
00282         i2c_halfbitDelay(I2C_DEV(i2c));
00283         i2c_sclHi(I2C_DEV(i2c));
00284         i2c_halfbitDelay(I2C_DEV(i2c));
00285         i2c_sclLo(I2C_DEV(i2c));
00286         i2c_sdaHi(I2C_DEV(i2c));
00287     }
00288
00289     /* Generate stop condition (if requested) */
00290     if ((i2c->xfer_size == 1) && (i2c->flags & I2C_STOP))
00291         i2c_bitbang_stop_1(i2c);
00292
00293     return data;
00294 }
00295
00296 INLINE void i2c_bitbang_putcStop(struct I2c *i2c, uint8_t _data, bool stop)
00297 {
00298     /* Add ACK bit */
00299     uint16_t data = (_data << 1) | 1;
00300     bool ack;
00301
00302     if (old_api)
00303     {
00304         for (uint16_t i = 0x100; i != 0; i >>= 1)
00305         {
00306             SCL_LO;
00307             if (data & i)
00308                 SDA_HI;
00309             else
00310                 SDA_LO;
00311             I2C_HALFBIT_DELAY();
00312
00313             SCL_HI;
00314             I2C_HALFBIT_DELAY();
00315         }
00316
00317         ack = !SDA_IN;
00318         SCL_LO;
00319         I2C_HALFBIT_DELAY();
00320     }
00321     else
00322     {
00323         for (uint16_t i = 0x100; i != 0; i >>= 1)
00324         {
00325             i2c_sclLo(I2C_DEV(i2c));
00326             if (data & i)
00327                 i2c_sdaHi(I2C_DEV(i2c));
00328             else
00329                 i2c_sdaLo(I2C_DEV(i2c));
00330             i2c_halfbitDelay(I2C_DEV(i2c));
00331
00332             i2c_sclHi(I2C_DEV(i2c));
00333             i2c_halfbitDelay(I2C_DEV(i2c));
00334         }
00335         ack = !i2c_sdaIn(I2C_DEV(i2c));
00336
00337         i2c_sclLo(I2C_DEV(i2c));
00338         i2c_halfbitDelay(I2C_DEV(i2c));
00339     }
00340
00341     if (!ack)
00342         i2c->errors |= I2C_NO_ACK;
00343
00344     /* Generate stop condition (if requested) */
00345     if (stop || i2c->errors)
00346         i2c_bitbang_stop_1(i2c);
00347 }
00348
00349 static void i2c_bitbang_putc(struct I2c *i2c, uint8_t data)
00350 {
00351     i2c_bitbang_putcStop(i2c, data,
00352         (i2c->xfer_size == 1) && (i2c->flags & I2C_STOP));
00353 }
00354
00355 static void i2c_bitbang_start_2(struct I2c *i2c, uint16_t slave_addr)
00356 {
00357     if (i2c->flags & I2C_START_R)
00358         slave_addr |= I2C_READBIT;
00359     else
00360         slave_addr &= ~I2C_READBIT;
00361
00362     /*
00363      * Loop on the select write sequence: when the device is busy
00364      * writing previously sent data it will reply to the SLA_W
00365      * control byte with a NACK.  In this case, we must
00366      * keep trying until the device responds with an ACK.
00367      */
00368     ticks_t start = timer_clock();
00369     while (i2c_bitbang_start_1(i2c))
00370     {
00371         i2c_bitbang_putcStop(i2c, slave_addr, false);
00372
00373         if (!(i2c->errors & I2C_NO_ACK))
00374             return;
00375         else if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
00376         {
00377             LOG_ERR("Timeout on I2C start\n");
00378             i2c->errors |= I2C_START_TIMEOUT;
00379             i2c_bitbang_stop_1(i2c);
00380             return;
00381         }
00382     }
00383
00384     LOG_ERR("START arbitration lost\n");
00385     i2c->errors |= I2C_ARB_LOST;
00386     i2c_bitbang_stop_1(i2c);
00387     return;
00388 }
00389
00390
00391 static const I2cVT i2c_bitbang_vt =
00392 {
00393     .start = i2c_bitbang_start_2,
00394     .getc = i2c_bitbang_getc,
00395     .putc = i2c_bitbang_putc,
00396     .write = i2c_genericWrite,
00397     .read = i2c_genericRead,
00398 };
00399
00400
00404 void i2c_hw_bitbangInit(I2c *i2c, int dev)
00405 {
00406     MOD_CHECK(timer);
00407     if (dev == I2C_BITBANG_OLD)
00408         old_api = true;
00409     else
00410         i2c->hw = (struct I2cHardware *)(dev - I2C_BITBANG0);
00411
00412     i2c->vt = &i2c_bitbang_vt;
00413
00414     if (old_api)
00415     {
00416         I2C_BITBANG_HW_INIT;
00417         SDA_HI;
00418         SCL_HI;
00419     }
00420     else
00421     {
00422         i2c_bitbangInit(I2C_DEV(i2c));
00423         i2c_sdaHi(I2C_DEV(i2c));
00424         i2c_sclHi(I2C_DEV(i2c));
00425     }
00426 }
00427


BeRTOS: i2c_cm3.h File Reference

  • cpu
  • cortex-m3
  • drv
i2c_cm3.h File Reference

Low-level I2C module for ARM Cortex-m3 (interface). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level I2C module for ARM Cortex-m3 (interface).

Author:
Daniele Basile <asterix@develer.com>

Definition in file i2c_cm3.h.


BeRTOS: i2c_cm3.h Source File

  • cpu
  • cortex-m3
  • drv
i2c_cm3.h
Go to the documentation of this file.
00001
00039 #include <cpu/detect.h>
00040
00041 #if CPU_CM3_LM3S
00042     #include "i2c_lm3s.h"
00043 #elif CPU_CM3_STM32
00044     #include "i2c_stm32.h"
00045 /*#elif  Add other Cortex-M3 CPUs here */
00046 #else
00047     #error Unknown CPU
00048 #endif
00049


BeRTOS: i2c_lm3s.c File Reference

  • cpu
  • cortex-m3
  • drv
Functions
i2c_lm3s.c File Reference

Driver for the LM3S I2C (implementation) More...

#include "cfg/cfg_i2c.h"
#include <cfg/log.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cpu/detect.h>
#include <cpu/irq.h>
#include <cpu/types.h>
#include <cpu/power.h>
#include <io/lm3s.h>
#include <drv/timer.h>
#include <drv/i2c.h>
#include <drv/gpio_lm3s.h>
#include <drv/clock_lm3s.h>

Go to the source code of this file.

Functions

void i2c_hw_init (I2c *i2c, int dev, uint32_t clock)
Initialize I2C module.

Detailed Description

Driver for the LM3S I2C (implementation)

Author:
Daniele Basile <asterix@develer.com>

Definition in file i2c_lm3s.c.


BeRTOS: i2c_lm3s.c Source File

  • cpu
  • cortex-m3
  • drv
i2c_lm3s.c
Go to the documentation of this file.
00001
00039 #include "cfg/cfg_i2c.h"
00040
00041 #define LOG_LEVEL  I2C_LOG_LEVEL
00042 #define LOG_FORMAT I2C_LOG_FORMAT
00043
00044 #include <cfg/log.h>
00045
00046 #include <cfg/debug.h>
00047 #include <cfg/macros.h> // BV()
00048
00049 #include <cpu/detect.h>
00050 #include <cpu/irq.h>
00051 #include <cpu/types.h>
00052 #include <cpu/power.h>
00053
00054 #include <io/lm3s.h>
00055
00056 #include <drv/timer.h>
00057 #include <drv/i2c.h>
00058 #include <drv/gpio_lm3s.h>
00059 #include <drv/clock_lm3s.h>
00060
00061
00062 struct I2cHardware
00063 {
00064     uint32_t base;
00065     uint32_t sys_cntl;
00066     uint32_t sys_gpio;
00067     uint32_t pin_mask;
00068     uint32_t gpio_base;
00069     bool first_xtranf;
00070 };
00071
00072 #define WAIT_BUSY(base) \
00073     do { \
00074         while (HWREG(base + I2C_O_MCS) & I2C_MCS_BUSY ) \
00075             cpu_relax(); \
00076     } while (0);
00077
00078
00079 /*
00080  * The start is not performed when we call the start function
00081  * because the hardware should know the first data byte to send.
00082  * Generally to perform a byte send we should write the slave address
00083  * in slave address register and the first byte to send in data registry.
00084  * After then we can perform the start write procedure, and send really
00085  * the our data. To use common bertos i2c api the really start will be
00086  * performed when the user "put" or "send" its data. These tricks are hide
00087  * from the driver implementation.
00088  */
00089 static void i2c_lm3s_start(struct I2c *i2c, uint16_t slave_addr)
00090 {
00091     i2c->hw->first_xtranf = true;
00092
00093     if (I2C_TEST_START(i2c->flags) == I2C_START_W)
00094         HWREG(i2c->hw->base + I2C_O_MSA) = slave_addr & ~BV(0);
00095     else /* (I2C_TEST_START(i2c->flags) == I2C_START_R) */
00096         HWREG(i2c->hw->base + I2C_O_MSA) = slave_addr | BV(0);
00097 }
00098
00099 INLINE bool wait_addrAck(I2c *i2c, uint32_t mode_mask)
00100 {
00101     ticks_t start = timer_clock();
00102     while (1)
00103     {
00104         uint32_t status = HWREG(i2c->hw->base + I2C_O_MCS);
00105
00106         if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
00107             return false;
00108
00109         if(status & I2C_MCS_ADRACK)
00110         {
00111             HWREG(i2c->hw->base + I2C_O_MCS) = mode_mask;
00112             WAIT_BUSY(i2c->hw->base);
00113         }
00114         else
00115             break;
00116
00117         cpu_relax();
00118     }
00119     return true;
00120 }
00121
00122 static void i2c_lm3s_putc(I2c *i2c, const uint8_t data)
00123 {
00124     HWREG(i2c->hw->base + I2C_O_MDR) = data;
00125
00126     if (i2c->hw->first_xtranf)
00127     {
00128         HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_RUN | I2C_MCS_START;
00129         while( HWREG(i2c->hw->base + I2C_O_MCS) & I2C_MCS_BUSY );
00130
00131         if (!wait_addrAck(i2c, I2C_MCS_RUN | I2C_MCS_START))
00132         {
00133             LOG_ERR("Start timeout\n");
00134             i2c->errors |= I2C_START_TIMEOUT;
00135             HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_STOP;
00136             WAIT_BUSY(i2c->hw->base);
00137             return;
00138         }
00139
00140         i2c->hw->first_xtranf = false;
00141     }
00142     else
00143     {
00144         HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_RUN;
00145         WAIT_BUSY(i2c->hw->base);
00146     }
00147
00148     if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP))
00149     {
00150         HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_STOP;
00151         WAIT_BUSY(i2c->hw->base);
00152     }
00153 }
00154
00155 static uint8_t i2c_lm3s_getc(I2c *i2c)
00156 {
00157     uint8_t data;
00158     if (i2c->hw->first_xtranf)
00159     {
00160         uint32_t start_mode;
00161         if (i2c->xfer_size == 1)
00162             start_mode = I2C_MCS_RUN | I2C_MCS_START;
00163         else
00164             start_mode = I2C_MCS_ACK | I2C_MCS_RUN | I2C_MCS_START;
00165
00166         HWREG(i2c->hw->base + I2C_O_MCS) = start_mode;
00167         WAIT_BUSY(i2c->hw->base);
00168         if (!wait_addrAck(i2c, start_mode))
00169         {
00170             LOG_ERR("Start timeout\n");
00171             i2c->errors |= I2C_START_TIMEOUT;
00172             HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_STOP;
00173             WAIT_BUSY(i2c->hw->base);
00174             return 0xFF;
00175         }
00176
00177         data = HWREG(i2c->hw->base + I2C_O_MDR);
00178         i2c->hw->first_xtranf = false;
00179     }
00180     else
00181     {
00182         if (i2c->xfer_size > 1)
00183             HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_ACK | I2C_MCS_RUN;
00184         else
00185             HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_RUN;
00186
00187         WAIT_BUSY(i2c->hw->base);
00188         data = HWREG(i2c->hw->base + I2C_O_MDR);
00189     }
00190
00191     if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP))
00192     {
00193         HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_STOP;
00194         WAIT_BUSY(i2c->hw->base);
00195     }
00196     return data;
00197 }
00198
00199 static const I2cVT i2c_lm3s_vt =
00200 {
00201     .start = i2c_lm3s_start,
00202     .getc = i2c_lm3s_getc,
00203     .putc = i2c_lm3s_putc,
00204     .write = i2c_genericWrite,
00205     .read = i2c_genericRead,
00206 };
00207
00208 static struct I2cHardware i2c_lm3s_hw[] =
00209 {
00210     { /* I2C0 */
00211         .base = I2C0_MASTER_BASE,
00212         .sys_cntl = SYSCTL_RCGC1_I2C0,
00213         .sys_gpio = SYSCTL_RCGC2_GPIOB,
00214         .pin_mask = (GPIO_I2C0_SCL_PIN | GPIO_I2C0_SDA_PIN),
00215         .gpio_base = GPIO_PORTB_BASE,
00216     },
00217     { /* I2C1 */
00218         .base = I2C1_MASTER_BASE,
00219         .sys_cntl = SYSCTL_RCGC1_I2C1,
00220         .sys_gpio = SYSCTL_RCGC2_GPIOA,
00221         .pin_mask = (GPIO_I2C1_SCL_PIN | GPIO_I2C1_SDA_PIN),
00222         .gpio_base = GPIO_PORTA_BASE,
00223     },
00224 };
00225
00229 void i2c_hw_init(I2c *i2c, int dev, uint32_t clock)
00230 {
00231     i2c->hw = &i2c_lm3s_hw[dev];
00232     i2c->vt = &i2c_lm3s_vt;
00233
00234     /* Enable the peripheral clock */
00235     SYSCTL_RCGC1_R |= i2c->hw->sys_cntl;
00236     SYSCTL_RCGC2_R |= i2c->hw->sys_gpio;
00237
00238     /* Configure GPIO pins to work as I2C pins */
00239     lm3s_gpioPinConfig(i2c->hw->gpio_base, i2c->hw->pin_mask,
00240         GPIO_DIR_MODE_HW, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_OD_WPU);
00241     /*
00242      * Note: to set correctly the i2c speed we shold before enable the i2c
00243      * device and then set in master time period the correct value
00244      */
00245
00246     /* Enable i2c device */
00247     HWREG(i2c->hw->base + I2C_O_MCR) |= I2C_MCR_MFE;
00248
00249     /*
00250      * Compute the clock divider that achieves the fastest speed less than or
00251      * equal to the desired speed.  The numerator is biased to favor a larger
00252      * clock divider so that the resulting clock is always less than or equal
00253      * to the desired clock, never greater.
00254      */
00255     HWREG(i2c->hw->base + I2C_O_MTPR) = ((CPU_FREQ + (2 * 10 * clock) - 1) / (2 * 10 * clock)) - 1;
00256 }


BeRTOS: i2c_lm3s.h File Reference

  • cpu
  • cortex-m3
  • drv
i2c_lm3s.h File Reference

Driver for the LM3S I2C (interface) More...

#include <drv/i2c.h>

Go to the source code of this file.

Detailed Description

Driver for the LM3S I2C (interface)

Author:
Daniele Basile <asterix@develer.com>

Definition in file i2c_lm3s.h.


BeRTOS: i2c_lm3s.h Source File

  • cpu
  • cortex-m3
  • drv
i2c_lm3s.h
Go to the documentation of this file.
00001
00038 #ifndef I2C_LM3S_H
00039 #define I2C_LM3S_H
00040
00041 #include <drv/i2c.h>
00042
00046 enum
00047 {
00048 #if CPU_CM3_LM3S1968
00049     I2C0,
00050     I2C1,
00051 #elif CPU_CM3_LM3S8962
00052     I2C0,
00053 #enif
00054     I2C_CNT
00055 };
00056
00057 #endif /* I2C_LM3S_H */


BeRTOS: i2c_lpc2.c File Reference

  • cpu
  • arm
  • drv
Functions
i2c_lpc2.c File Reference

Driver for the LPC23xx I2C (implementation) More...

#include "cfg/cfg_i2c.h"
#include <cfg/log.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cpu/detect.h>
#include <cpu/irq.h>
#include <cpu/power.h>
#include <drv/timer.h>
#include <drv/i2c.h>
#include <io/lpc23xx.h>

Go to the source code of this file.

Functions

void i2c_hw_init (I2c *i2c, int dev, uint32_t clock)
Initialize I2C module.

Detailed Description

Driver for the LPC23xx I2C (implementation)

Author:
Daniele Basile <asterix@develer.com>

Definition in file i2c_lpc2.c.


BeRTOS: i2c_lpc2.c Source File

  • cpu
  • arm
  • drv
i2c_lpc2.c
Go to the documentation of this file.
00001
00038 #include "cfg/cfg_i2c.h"
00039
00040 #define LOG_LEVEL  I2C_LOG_LEVEL
00041 #define LOG_FORMAT I2C_LOG_FORMAT
00042
00043 #include <cfg/log.h>
00044
00045 #include <cfg/debug.h>
00046 #include <cfg/macros.h> // BV()
00047
00048 #include <cpu/detect.h>
00049 #include <cpu/irq.h>
00050 #include <cpu/power.h>
00051
00052 #include <drv/timer.h>
00053 #include <drv/i2c.h>
00054
00055 #include <io/lpc23xx.h>
00056
00057 struct I2cHardware
00058 {
00059     uint32_t base;
00060     uint32_t pconp;
00061     uint32_t pinsel_port;
00062     uint32_t pinsel;
00063     uint32_t pinsel_mask;
00064     uint32_t pclksel;
00065     uint32_t pclk_mask;
00066     uint32_t pclk_div;
00067 };
00068
00069 /*
00070  * Wait that SI bit is set.
00071  *
00072  * Note: this bit is set when the I2C state changes. However, entering
00073  * state F8 does not set SI since there is nothing for an interrupt service
00074  * routine to do in that case.
00075  */
00076 #define WAIT_SI(i2c) \
00077         do { \
00078             ticks_t start = timer_clock(); \
00079             while( !(HWREG(i2c->hw->base + I2C_CONSET_OFF) & BV(I2CON_SI)) ) \
00080             { \
00081                 if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT)) \
00082                 { \
00083                     LOG_ERR("Timeout SI assert\n"); \
00084                     LOG_ERR("[%08lx]\n", HWREG(i2c->hw->base + I2C_STAT_OFF)); \
00085                     break; \
00086                 } \
00087                 cpu_relax(); \
00088             } \
00089     } while (0)
00090
00091 static void i2c_hw_restart(I2c *i2c)
00092 {
00093     // Clear all pending flags.
00094     HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
00095
00096     // Set start and ack bit.
00097     HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_STA);
00098
00099     WAIT_SI(i2c);
00100 }
00101
00102
00103 static void i2c_hw_stop(I2c *i2c)
00104 {
00105     /* Set the stop bit */
00106     HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_STO);
00107     /* Clear pending flags */
00108     HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
00109 }
00110
00111 static void i2c_lpc2_putc(I2c *i2c, uint8_t data)
00112 {
00113     HWREG(i2c->hw->base + I2C_DAT_OFF) = data;
00114     HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC);
00115
00116     WAIT_SI(i2c);
00117
00118     uint32_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
00119
00120
00121     /* Generate the stop if we finish to send all programmed bytes */
00122     if (i2c->xfer_size == 1)
00123     {
00124         if (I2C_TEST_STOP(i2c->flags) == I2C_STOP)
00125             i2c_hw_stop(i2c);
00126     }
00127
00128     if (status == I2C_STAT_DATA_NACK)
00129     {
00130         LOG_ERR("Data NACK\n");
00131         i2c->errors |= I2C_NO_ACK;
00132         i2c_hw_stop(i2c);
00133     }
00134     else if ((status == I2C_STAT_ERROR) || (status == I2C_STAT_UNKNOW))
00135     {
00136         LOG_ERR("I2C error.\n");
00137         i2c->errors |= I2C_ERR;
00138         i2c_hw_stop(i2c);
00139     }
00140 }
00141
00142 static uint8_t i2c_lpc2_getc(I2c *i2c)
00143 {
00144     /*
00145      * Set ack bit if we want read more byte, otherwise
00146      * we disable it
00147      */
00148     if (i2c->xfer_size > 1)
00149         HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_AA);
00150     else
00151         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_AAC);
00152
00153     HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC);
00154
00155     WAIT_SI(i2c);
00156
00157     uint32_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
00158     uint8_t data = (uint8_t)HWREG(i2c->hw->base + I2C_DAT_OFF);
00159
00160     if (status == I2C_STAT_RDATA_ACK)
00161     {
00162         return data;
00163     }
00164     else if (status == I2C_STAT_RDATA_NACK)
00165     {
00166         /*
00167          * last byte to read generate the stop if
00168          * required
00169          */
00170         if (I2C_TEST_STOP(i2c->flags) == I2C_STOP)
00171             i2c_hw_stop(i2c);
00172
00173         return data;
00174     }
00175     else if ((status == I2C_STAT_ERROR) || (status == I2C_STAT_UNKNOW))
00176     {
00177         LOG_ERR("I2C error.\n");
00178         i2c->errors |= I2C_ERR;
00179         i2c_hw_stop(i2c);
00180     }
00181
00182     return 0xFF;
00183 }
00184
00185 static void i2c_lpc2_start(struct I2c *i2c, uint16_t slave_addr)
00186 {
00187     if (I2C_TEST_START(i2c->flags) == I2C_START_W)
00188     {
00189         ticks_t start = timer_clock();
00190         while (true)
00191         {
00192             i2c_hw_restart(i2c);
00193
00194             uint8_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
00195
00196             /* Start status ok, set addres and the R/W bit */
00197             if ((status == I2C_STAT_SEND) || (status == I2C_STAT_RESEND))
00198                 HWREG(i2c->hw->base + I2C_DAT_OFF) = slave_addr & ~I2C_READBIT;
00199
00200             /* Clear the start bit and clear the SI bit */
00201             HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC) | BV(I2CON_STAC);
00202
00203             if (status == I2C_STAT_SLAW_ACK)
00204                 break;
00205
00206             if (status == I2C_STAT_ARB_LOST)
00207             {
00208                 LOG_ERR("Arbitration lost\n");
00209                 i2c->errors |= I2C_ARB_LOST;
00210                 i2c_hw_stop(i2c);
00211             }
00212
00213             if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
00214             {
00215                 LOG_ERR("Timeout on I2C START\n");
00216                 i2c->errors |= I2C_NO_ACK;
00217                 i2c_hw_stop(i2c);
00218                 break;
00219             }
00220         }
00221     }
00222     else if (I2C_TEST_START(i2c->flags) == I2C_START_R)
00223     {
00224         i2c_hw_restart(i2c);
00225
00226         uint8_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
00227
00228         /* Start status ok, set addres and the R/W bit */
00229         if ((status == I2C_STAT_SEND) || (status == I2C_STAT_RESEND))
00230             HWREG(i2c->hw->base + I2C_DAT_OFF) = slave_addr | I2C_READBIT;
00231
00232         /* Clear the start bit and clear the SI bit */
00233         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC) | BV(I2CON_STAC);
00234
00235         WAIT_SI(i2c);
00236
00237         status = HWREG(i2c->hw->base + I2C_STAT_OFF);
00238
00239         if (status == I2C_STAT_SLAR_NACK)
00240         {
00241             LOG_ERR("SLAR NACK:%02x\n", status);
00242             i2c->errors |= I2C_NO_ACK;
00243             i2c_hw_stop(i2c);
00244         }
00245
00246         if (status == I2C_STAT_ARB_LOST)
00247         {
00248             LOG_ERR("Arbitration lost\n");
00249             i2c->errors |= I2C_ARB_LOST;
00250             i2c_hw_stop(i2c);
00251         }
00252     }
00253     else
00254     {
00255         ASSERT(0);
00256     }
00257 }
00258
00259 static const I2cVT i2c_lpc_vt =
00260 {
00261     .start = i2c_lpc2_start,
00262     .getc = i2c_lpc2_getc,
00263     .putc = i2c_lpc2_putc,
00264     .write = i2c_genericWrite,
00265     .read = i2c_genericRead,
00266 };
00267
00268 static struct I2cHardware i2c_lpc2_hw[] =
00269 {
00270     { /* I2C0 */
00271         .base = I2C0_BASE_ADDR,
00272         .pconp = BV(PCONP_PCI2C0),
00273         .pinsel_port = PINSEL1_OFF,
00274         .pinsel = I2C0_PINSEL,
00275         .pinsel_mask = I2C0_PINSEL_MASK,
00276         .pclksel = PCLKSEL0_OFF,
00277         .pclk_mask = I2C0_PCLK_MASK,
00278         .pclk_div = I2C0_PCLK_DIV8,
00279     },
00280     { /* I2C1 */
00281         .base = I2C1_BASE_ADDR,
00282         .pconp = BV(PCONP_PCI2C1),
00283         .pinsel_port = PINSEL0_OFF,
00284         .pinsel = I2C1_PINSEL,
00285         .pinsel_mask = I2C1_PINSEL_MASK,
00286         .pclksel = PCLKSEL1_OFF,
00287         .pclk_mask = I2C1_PCLK_MASK,
00288         .pclk_div = I2C1_PCLK_DIV8,
00289     },
00290     { /* I2C2 */
00291         .base = I2C2_BASE_ADDR,
00292         .pconp = BV(PCONP_PCI2C2),
00293         .pinsel_port = PINSEL0_OFF,
00294         .pinsel = I2C2_PINSEL,
00295         .pinsel_mask = I2C2_PINSEL_MASK,
00296         .pclksel = PCLKSEL1_OFF,
00297         .pclk_mask = I2C2_PCLK_MASK,
00298         .pclk_div = I2C2_PCLK_DIV8,
00299     },
00300 };
00301
00305 void i2c_hw_init(I2c *i2c, int dev, uint32_t clock)
00306 {
00307     i2c->hw = &i2c_lpc2_hw[dev];
00308     i2c->vt = &i2c_lpc_vt;
00309
00310     /* Enable I2C clock */
00311     PCONP |= i2c->hw->pconp;
00312
00313     ASSERT(clock <= 400000);
00314
00315     HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_I2ENC) | BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
00316
00317     /*
00318      * Bit Frequency = Fplk / (I2C_I2SCLH + I2C_I2SCLL)
00319      * value of I2SCLH and I2SCLL must be different
00320      */
00321     HWREG(SCB_BASE_ADDR + i2c->hw->pclksel) &= ~i2c->hw->pclk_mask;
00322     HWREG(SCB_BASE_ADDR + i2c->hw->pclksel) |= i2c->hw->pclk_div;
00323
00324     HWREG(i2c->hw->base + I2C_SCLH_OFF) = (((CPU_FREQ / 8) / clock) / 2) + 1;
00325     HWREG(i2c->hw->base + I2C_SCLL_OFF) = (((CPU_FREQ / 8) / clock) / 2);
00326
00327     ASSERT(HWREG(i2c->hw->base + I2C_SCLH_OFF) > 4);
00328     ASSERT(HWREG(i2c->hw->base + I2C_SCLL_OFF) > 4);
00329
00330     /* Assign pins to SCL and SDA */
00331     HWREG(PINSEL_BASE_ADDR + i2c->hw->pinsel_port) &= ~i2c->hw->pinsel_mask;
00332     HWREG(PINSEL_BASE_ADDR + i2c->hw->pinsel_port) |= i2c->hw->pinsel;
00333
00334     // Enable I2C
00335     HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_I2EN);
00336 }


BeRTOS: i2c_lpc2.h File Reference

  • cpu
  • arm
  • drv
i2c_lpc2.h File Reference

Driver for the LPC23xx I2C (interface) More...

#include <drv/i2c.h>

Go to the source code of this file.

Enumerations

I2C devices enum
enum { , I2C_CNT }

Detailed Description

Driver for the LPC23xx I2C (interface)

Author:
Daniele Basile <asterix@develer.com>

Definition in file i2c_lpc2.h.

Enumeration Type Documentation

anonymous enum
Enumerator:
I2C_CNT

Number of serial ports.

Definition at line 47 of file i2c_lpc2.h.


BeRTOS: i2c_lpc2.h Source File

  • cpu
  • arm
  • drv
i2c_lpc2.h
Go to the documentation of this file.
00001
00039 #ifndef I2C_LPC2_H
00040 #define I2C_LPC2_H
00041
00042 #include <drv/i2c.h>
00043
00047 enum
00048 {
00049     I2C0,
00050     I2C1,
00051     I2C2,
00052
00053     I2C_CNT
00054 };
00055
00056 #endif /* I2C_LPC2_H */


BeRTOS: i2c_stm32.c File Reference

  • cpu
  • cortex-m3
  • drv
Functions
i2c_stm32.c File Reference

STM32F103xx I2C driver. More...

#include "cfg/cfg_i2c.h"
#include <cfg/log.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cfg/module.h>
#include <cpu/power.h>
#include <drv/gpio_stm32.h>
#include <drv/irq_cm3.h>
#include <drv/clock_stm32.h>
#include <drv/i2c.h>
#include <drv/timer.h>
#include <io/stm32.h>

Go to the source code of this file.

Functions

void i2c_hw_init (I2c *i2c, int dev, uint32_t clock)
Initialize I2C module.

Detailed Description

STM32F103xx I2C driver.

Author:
Daniele Basile <asterix@develer.com>

Definition in file i2c_stm32.c.


BeRTOS: i2c_stm32.c Source File

  • cpu
  • cortex-m3
  • drv
i2c_stm32.c
Go to the documentation of this file.
00001
00038 #include "cfg/cfg_i2c.h"
00039
00040 #define LOG_LEVEL  I2C_LOG_LEVEL
00041 #define LOG_FORMAT I2C_LOG_FORMAT
00042 #include <cfg/log.h>
00043
00044 #include <cfg/debug.h>
00045 #include <cfg/macros.h> // BV()
00046 #include <cfg/module.h>
00047
00048 #include <cpu/power.h>
00049 #include <drv/gpio_stm32.h>
00050 #include <drv/irq_cm3.h>
00051 #include <drv/clock_stm32.h>
00052 #include <drv/i2c.h>
00053 #include <drv/timer.h>
00054
00055 #include <io/stm32.h>
00056
00057
00058 struct I2cHardware
00059 {
00060     struct stm32_i2c *base;
00061     uint32_t clk_i2c_en;
00062     uint32_t pin_mask;
00063     uint8_t cache[2];
00064     bool cached;
00065 };
00066
00067 #define WAIT_BTF(base) \
00068     do { \
00069         while (!(base->SR1 & BV(SR1_BTF))) \
00070             cpu_relax(); \
00071     } while (0)
00072
00073 #define WAIT_RXNE(base) \
00074     do { \
00075         while (!(base->SR1 & BV(SR1_RXNE))) \
00076             cpu_relax(); \
00077     } while (0)
00078
00079 INLINE uint32_t get_status(struct stm32_i2c *base)
00080 {
00081     return ((base->SR1 | (base->SR2 << 16)) & 0x00FFFFFF);
00082 }
00083
00084 /*
00085  * This fuction read the status registers of the i2c device
00086  * and waint until the selec event happen. If occur one error
00087  * the funtions return false.
00088  */
00089 INLINE bool wait_event(I2c *i2c, uint32_t event)
00090 {
00091     while (true)
00092     {
00093         uint32_t stat = get_status(i2c->hw->base);
00094
00095         if (stat == event)
00096             break;
00097
00098         if (stat & SR1_ERR_MASK)
00099         {
00100             i2c->hw->base->SR1 &= ~SR1_ERR_MASK;
00101             return false;
00102         }
00103         cpu_relax();
00104     }
00105     return true;
00106 }
00107
00108
00109 INLINE void start_w(struct I2c *i2c, uint16_t slave_addr)
00110 {
00111     /*
00112      * Loop on the select write sequence: when the eeprom is busy
00113      * writing previously sent data it will reply to the SLA_W
00114      * control byte with a NACK.  In this case, we must
00115      * keep trying until the eeprom responds with an ACK.
00116      */
00117     ticks_t start = timer_clock();
00118     while (true)
00119     {
00120         i2c->hw->base->CR1 |= CR1_ACK_SET | CR1_START_SET;
00121
00122         if(!wait_event(i2c, I2C_EVENT_MASTER_MODE_SELECT))
00123         {
00124             LOG_ERR("ARBIT lost\n");
00125             i2c->errors |= I2C_ARB_LOST;
00126             break;
00127         }
00128
00129         i2c->hw->base->DR = slave_addr & OAR1_ADD0_RESET;
00130
00131         if(wait_event(i2c, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED))
00132             break;
00133
00134         if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
00135         {
00136             LOG_ERR("Timeout on I2C START\n");
00137             i2c->errors |= I2C_START_TIMEOUT;
00138             i2c->hw->base->CR1 |= CR1_STOP_SET;
00139             break;
00140         }
00141     }
00142 }
00143
00144 INLINE bool start_and_addr(struct I2c *i2c, uint16_t slave_addr)
00145 {
00146     i2c->hw->base->CR1 |= CR1_START_SET;
00147     if(!wait_event(i2c, I2C_EVENT_MASTER_MODE_SELECT))
00148     {
00149         LOG_ERR("ARBIT lost\n");
00150         i2c->errors |= I2C_ARB_LOST;
00151         i2c->hw->base->CR1 |= CR1_STOP_SET;
00152         return false;
00153     }
00154
00155     i2c->hw->base->DR = (slave_addr | OAR1_ADD0_SET);
00156
00157     if (i2c->xfer_size == 2)
00158         i2c->hw->base->CR1 |= CR1_ACK_SET | CR1_POS_SET;
00159
00160     if(!wait_event(i2c, I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED))
00161     {
00162         LOG_ERR("SLAR NACK:%08lx\n", get_status(i2c->hw->base));
00163         i2c->errors |= I2C_NO_ACK;
00164         i2c->hw->base->CR1 |= CR1_STOP_SET;
00165         return false;
00166     }
00167
00168     return true;
00169 }
00170
00171 INLINE void start_r(struct I2c *i2c, uint16_t slave_addr)
00172 {
00173     if (!start_and_addr(i2c, slave_addr))
00174         return;
00175     /*
00176      * Due to the hardware receive bytes from slave in automatically mode
00177      * we should manage contextually all cases that we want to read one, two or more
00178      * than two bytes. To comply this behaviour to our api we shoul bufferd some byte
00179      * to hide all special case that needs to use this device.
00180      */
00181     if (i2c->xfer_size == 1)
00182     {
00183         i2c->hw->base->CR1 &= CR1_ACK_RESET;
00184
00185         cpu_flags_t irq;
00186
00187         IRQ_SAVE_DISABLE(irq);
00188         (void)i2c->hw->base->SR2;
00189         if (I2C_TEST_STOP(i2c->flags) == I2C_STOP)
00190             i2c->hw->base->CR1 |= CR1_STOP_SET;
00191         IRQ_RESTORE(irq);
00192
00193         WAIT_RXNE(i2c->hw->base);
00194
00195         i2c->hw->cache[0] = i2c->hw->base->DR;
00196         i2c->hw->cached = true;
00197
00198         if (I2C_TEST_STOP(i2c->flags) == I2C_STOP)
00199             while (i2c->hw->base->CR1 & CR1_STOP_SET);
00200
00201         i2c->hw->base->CR1 |= CR1_ACK_SET;
00202     }
00203     else if (i2c->xfer_size == 2)
00204     {
00205         cpu_flags_t irq;
00206
00207         IRQ_SAVE_DISABLE(irq);
00208         (void)i2c->hw->base->SR2;
00209         i2c->hw->base->CR1 &= CR1_ACK_RESET;
00210         IRQ_RESTORE(irq);
00211
00212         WAIT_BTF(i2c->hw->base);
00213
00214         IRQ_SAVE_DISABLE(irq);
00215         if (I2C_TEST_STOP(i2c->flags) == I2C_STOP)
00216             i2c->hw->base->CR1 |= CR1_STOP_SET;
00217         /*
00218          * We store read bytes like a fifo..
00219          */
00220         i2c->hw->cache[1] = i2c->hw->base->DR;
00221         i2c->hw->cache[0] = i2c->hw->base->DR;
00222         i2c->hw->cached = true;
00223         IRQ_RESTORE(irq);
00224
00225         i2c->hw->base->CR1 &= CR1_POS_RESET;
00226         i2c->hw->base->CR1 |= CR1_ACK_SET;
00227     }
00228 }
00229
00230 static void i2c_stm32_start(struct I2c *i2c, uint16_t slave_addr)
00231 {
00232     i2c->hw->cached = false;
00233
00234     if (I2C_TEST_START(i2c->flags) == I2C_START_W)
00235         start_w(i2c, slave_addr);
00236     else /* (I2C_TEST_START(i2c->flags) == I2C_START_R) */
00237         start_r(i2c, slave_addr);
00238 }
00239
00240 static void i2c_stm32_putc(I2c *i2c, const uint8_t data)
00241 {
00242     i2c->hw->base->DR = data;
00243
00244     WAIT_BTF(i2c->hw->base);
00245
00246     /* Generate the stop if we finish to send all programmed bytes */
00247     if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP))
00248     {
00249             wait_event(i2c, I2C_EVENT_MASTER_BYTE_TRANSMITTED);
00250             i2c->hw->base->CR1 |= CR1_STOP_SET;
00251     }
00252 }
00253
00254 static uint8_t i2c_stm32_getc(I2c *i2c)
00255 {
00256     if (i2c->hw->cached)
00257     {
00258         ASSERT(i2c->xfer_size <= 2);
00259         return i2c->hw->cache[i2c->xfer_size - 1];
00260     }
00261     else
00262     {
00263         WAIT_BTF(i2c->hw->base);
00264
00265         if (i2c->xfer_size == 3)
00266         {
00267             i2c->hw->base->CR1 &= CR1_ACK_RESET;
00268
00269             cpu_flags_t irq;
00270             IRQ_SAVE_DISABLE(irq);
00271
00272             uint8_t data = i2c->hw->base->DR;
00273
00274             if (I2C_TEST_STOP(i2c->flags) == I2C_STOP)
00275                 i2c->hw->base->CR1 |= CR1_STOP_SET;
00276
00277             i2c->hw->cache[1] = i2c->hw->base->DR;
00278
00279             IRQ_RESTORE(irq);
00280
00281             WAIT_RXNE(i2c->hw->base);
00282
00283             i2c->hw->cache[0] = i2c->hw->base->DR;
00284             i2c->hw->cached = true;
00285
00286             if (I2C_TEST_STOP(i2c->flags) == I2C_STOP)
00287                 while (i2c->hw->base->CR1 & CR1_STOP_SET);
00288
00289             return data;
00290         }
00291         else
00292             return i2c->hw->base->DR;
00293     }
00294 }
00295
00296
00297 static const I2cVT i2c_stm32_vt =
00298 {
00299     .start = i2c_stm32_start,
00300     .getc = i2c_stm32_getc,
00301     .putc = i2c_stm32_putc,
00302     .write = i2c_genericWrite,
00303     .read = i2c_genericRead,
00304 };
00305
00306 static struct I2cHardware i2c_stm32_hw[] =
00307 {
00308     { /* I2C1 */
00309         .base = (struct stm32_i2c *)I2C1_BASE,
00310         .clk_i2c_en  = RCC_APB1_I2C1,
00311         .pin_mask = (GPIO_I2C1_SCL_PIN | GPIO_I2C1_SDA_PIN),
00312     },
00313     { /* I2C2 */
00314         .base = (struct stm32_i2c *)I2C2_BASE,
00315         .clk_i2c_en  = RCC_APB1_I2C2,
00316         .pin_mask = (GPIO_I2C2_SCL_PIN | GPIO_I2C2_SDA_PIN),
00317     },
00318 };
00319
00323 void i2c_hw_init(I2c *i2c, int dev, uint32_t clock)
00324 {
00325
00326     i2c->hw = &i2c_stm32_hw[dev];
00327     i2c->vt = &i2c_stm32_vt;
00328
00329     RCC->APB2ENR |= RCC_APB2_GPIOB;
00330     RCC->APB1ENR |= i2c->hw->clk_i2c_en;
00331
00332     /* Set gpio to use I2C driver */
00333     stm32_gpioPinConfig((struct stm32_gpio *)GPIOB_BASE, i2c->hw->pin_mask,
00334                 GPIO_MODE_AF_OD, GPIO_SPEED_50MHZ);
00335
00336     /* Clear all needed registers */
00337     i2c->hw->base->CR1 = 0;
00338     i2c->hw->base->CR2 = 0;
00339     i2c->hw->base->CCR = 0;
00340     i2c->hw->base->TRISE = 0;
00341     i2c->hw->base->OAR1 = 0;
00342
00343     /* Set PCLK1 frequency accornding to the master clock settings. See stm32_clock.c */
00344     i2c->hw->base->CR2 |= CR2_FREQ_36MHZ;
00345
00346     /* Configure spi in standard mode */
00347     ASSERT2(clock >= 100000, "fast mode not supported");
00348
00349     i2c->hw->base->CCR |= (uint16_t)((CR2_FREQ_36MHZ * 1000000) / (clock << 1));
00350     i2c->hw->base->TRISE |= (CR2_FREQ_36MHZ + 1);
00351
00352     i2c->hw->base->CR1 |= CR1_PE_SET;
00353 }


BeRTOS: i2c_stm32.h File Reference

  • cpu
  • cortex-m3
  • drv
i2c_stm32.h File Reference

Driver for the STM32F103xx I2C (interface) More...

#include <drv/i2c.h>

Go to the source code of this file.

Enumerations

I2C devices enum
enum { , I2C_CNT }

Detailed Description

Driver for the STM32F103xx I2C (interface)

Definition in file i2c_stm32.h.

Enumeration Type Documentation

anonymous enum
Enumerator:
I2C_CNT

Number of serial ports.

Definition at line 45 of file i2c_stm32.h.


BeRTOS: i2c_stm32.h Source File

  • cpu
  • cortex-m3
  • drv
i2c_stm32.h
Go to the documentation of this file.
00001
00037 #ifndef I2C_STM32_H
00038 #define I2C_STM32_H
00039
00040 #include <drv/i2c.h>
00041
00045 enum
00046 {
00047     I2C1,
00048     I2C2,
00049
00050     I2C_CNT
00051 };
00052
00053 #endif /* I2C_STM32_H */


BeRTOS: i2s_at91.c File Reference

  • cpu
  • arm
  • drv
Functions
i2s_at91.c File Reference

I2S driver implementation. More...

#include "i2s_at91.h"
#include "cfg/cfg_i2s.h"
#include <cfg/log.h>
#include <drv/timer.h>
#include <io/arm.h>

Go to the source code of this file.

Functions

uint8_t * | i2s_getBuffer (unsigned buf_num)
Returns one of the two buffers or NULL if none is available.
uint8_t * | i2s_getFreeBuffer (void)
Returns a buffer that will be played after the current one.
bool | i2s_start (void)
Starts playing from I2S_FIRST_BUFFER.
void | i2s_init (void)
Initializes the module and sets current buffer to I2S_FIRST_BUF.

Detailed Description

I2S driver implementation.

Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file i2s_at91.c.

Function Documentation

uint8_t* i2s_getBuffer ( unsigned buf_num )

Returns one of the two buffers or NULL if none is available.

You can't call this function if you have already started the player.

Parameters:
buf_num The number of the buffer, ie I2S_FIRST_BUF or I2S_SECOND_BUF.
Returns:
A pointer to the buffer if the buffer is available (not full), 0 on errors

Definition at line 69 of file i2s_at91.c.

uint8_t* i2s_getFreeBuffer ( void )

Returns a buffer that will be played after the current one.

You should fill it faster than your reproduction time. You can't call this function if the player is not running

Returns:
The next buffer to be played, 0 if both are busy.

Definition at line 87 of file i2s_at91.c.

bool i2s_start ( void )

Starts playing from I2S_FIRST_BUFFER.

You must have filled both buffers before calling this function. Does nothing if already playing.

Returns:
false on errors, true otherwise.

Definition at line 121 of file i2s_at91.c.


BeRTOS: i2s_at91.c Source File

  • cpu
  • arm
  • drv
i2s_at91.c
Go to the documentation of this file.
00001
00038 /*
00039  * TODO: Revise the public api of this module to be more generic. Evalutate to
00040  * implement the more generic layer to be common to all I2S BeRTOS drivers.
00041  */
00042 #include "i2s_at91.h"
00043 #include "cfg/cfg_i2s.h"
00044
00045 // Define log settings for cfg/log.h.
00046 #define LOG_LEVEL         I2S_LOG_LEVEL
00047 #define LOG_FORMAT        I2S_LOG_FORMAT
00048 #include <cfg/log.h>
00049
00050 #include <drv/timer.h>
00051 #include <io/arm.h>
00052
00053 #define DATALEN (15 & SSC_DATLEN_MASK)
00054 // FIXME: this is not correct for 16 <= DATALEN < 24
00055 #define PDC_DIV ((DATALEN / 8) + 1)
00056 /*
00057  * PDC_DIV must be 1, 2 or 4, which are the bytes that are transferred
00058  * each time the PDC reads from memory.
00059  */
00060 STATIC_ASSERT(PDC_DIV % 2 == 0);
00061 #define PDC_COUNT (CONFIG_PLAY_BUF_LEN / PDC_DIV)
00062
00063 static uint8_t play_buf1[CONFIG_PLAY_BUF_LEN];
00064 static uint8_t play_buf2[CONFIG_PLAY_BUF_LEN];
00065
00066 // the buffer in PDC next is play_buf2
00067 volatile bool is_second_buf_next;
00068
00069 uint8_t *i2s_getBuffer(unsigned buf_num)
00070 {
00071     LOG_INFO("getBuffer start\n");
00072
00073     if (i2s_isPlaying())
00074     {
00075         ASSERT(0);
00076         return 0;
00077     }
00078
00079     if (buf_num == I2S_SECOND_BUF)
00080         return play_buf2;
00081     else if (buf_num == I2S_FIRST_BUF)
00082         return play_buf1;
00083     else
00084         return 0;
00085 }
00086
00087 uint8_t *i2s_getFreeBuffer(void)
00088 {
00089     if (!i2s_isPlaying())
00090     {
00091         ASSERT(0);
00092         return 0;
00093     }
00094
00095     // wait PDC transmission end
00096     if (!(SSC_SR & BV(SSC_ENDTX)))
00097         return 0;
00098
00099     uint8_t *ret_buf = 0;
00100     // the last time we got called, the second buffer was in PDC next
00101     if (is_second_buf_next)
00102     {
00103         is_second_buf_next = false;
00104         ret_buf = play_buf1;
00105     }
00106     // the last time the first buffer was in PDC next
00107     else
00108     {
00109         is_second_buf_next = true;
00110         ret_buf = play_buf2;
00111     }
00112
00113     if (ret_buf)
00114     {
00115         SSC_TNPR = (reg32_t) ret_buf;
00116         SSC_TNCR = PDC_COUNT;
00117     }
00118     return ret_buf;
00119 }
00120
00121 bool i2s_start(void)
00122 {
00123     /* Some time must pass between disabling and enabling again the transmission
00124      * on SSC. A good empirical value seems >15 us. We try to avoid putting an
00125      * explicit delay, instead we disable the transmitter when a sound finishes
00126      * and hope that the delay has passed before we enter here again.
00127      */
00128     SSC_CR = BV(SSC_TXDIS);
00129     timer_delay(10);
00130
00131     SSC_PTCR = BV(PDC_TXTDIS);
00132     SSC_TPR = (reg32_t)play_buf1;
00133     SSC_TCR = PDC_COUNT;
00134     SSC_TNPR = (reg32_t)play_buf2;
00135     SSC_TNCR = PDC_COUNT;
00136     is_second_buf_next = true;
00137
00138     SSC_PTCR = BV(PDC_TXTEN);
00139
00140     /* enable output */
00141     SSC_CR = BV(SSC_TXEN);
00142
00143     return true;
00144 }
00145
00146 #define BITS_PER_CHANNEL 16
00147 #define N_OF_CHANNEL 2
00148 // TODO: check the computed value?
00149 /* The last parameter (2) is due to the hadware on at91sam7s. */
00150 #define MCK_DIV (CPU_FREQ / CONFIG_SAMPLE_FREQ / BITS_PER_CHANNEL / N_OF_CHANNEL / 2)
00151
00152 #define CONFIG_DELAY 1
00153 #define CONFIG_PERIOD 15
00154 #define CONFIG_DATNB  1
00155 #define CONFIG_FSLEN 15
00156
00157 #define DELAY ((CONFIG_DELAY << SSC_STTDLY_SHIFT) & SSC_STTDLY_MASK)
00158 #define PERIOD ((CONFIG_PERIOD << (SSC_PERIOD_SHIFT)) & SSC_PERIOD_MASK)
00159 #define DATNB ((CONFIG_DATNB << SSC_DATNB_SHIFT) & SSC_DATNB_MASK)
00160 #define FSLEN ((CONFIG_FSLEN << SSC_FSLEN_SHIFT) & SSC_FSLEN_MASK)
00161
00162 #define SSC_DMA_IRQ_PRIORITY 5
00163
00164 void i2s_init(void)
00165 {
00166     PIOA_PDR = BV(SSC_TK) | BV(SSC_TF) | BV(SSC_TD);
00167     /* reset device */
00168     SSC_CR = BV(SSC_SWRST);
00169
00170     SSC_CMR = MCK_DIV & SSC_DIV_MASK;
00171     SSC_TCMR = SSC_CKS_DIV | SSC_CKO_CONT | SSC_CKG_NONE | DELAY | PERIOD | SSC_START_FALL_F;
00172     SSC_TFMR = DATALEN | DATNB | FSLEN | BV(SSC_MSBF) | SSC_FSOS_NEGATIVE;
00173
00174     /* Disable all irqs */
00175     SSC_IDR = 0xFFFFFFFF;
00176
00177     /* Enable the SSC IRQ */
00178     AIC_IECR = BV(SSC_ID);
00179
00180     /* enable i2s */
00181     PMC_PCER = BV(SSC_ID);
00182
00183     /* Enable SSC */
00184     SSC_CR = BV(SSC_TXEN);
00185 }


BeRTOS: i2s_at91.h File Reference

  • cpu
  • arm
  • drv
Defines | Functions
i2s_at91.h File Reference

I2S driver functions. More...

#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <io/arm.h>

Go to the source code of this file.

Defines

#define | I2S_FIRST_BUF 0
First buffer.
#define | I2S_SECOND_BUF 1
Second buffer.

Functions

void | i2s_init (void)
Initializes the module and sets current buffer to I2S_FIRST_BUF.
uint8_t * | i2s_getBuffer (unsigned buf_num)
Returns one of the two buffers or NULL if none is available.
uint8_t * | i2s_getFreeBuffer (void)
Returns a buffer that will be played after the current one.
bool | i2s_start (void)
Starts playing from I2S_FIRST_BUFFER.

Detailed Description

I2S driver functions.

This driver uses a double buffering technique to keep i2s bus busy. First fill in the two buffers using i2s_getBuffer(), then start audio playing with i2s_start(). Then call i2s_getFreeBuffer() until you have finished your samples. The reproduction will automatically stop if you don't call i2s_getFreeBuffer() frequently enough.

Example:

 // fill in the buffers before start
 buf = i2s_getBuffer(I2S_FIRST_BUF);
 // ...
 buf = i2s_getBuffer(I2S_SECOND_BUF);
 // ...
 // here the driver will play only the first two buffers...
 i2s_start();
 // ...call getFreeBuffer() to continue playing.
 while (!(buf = i2s_getFreeBuffer()))
     ;
 // now fill the buffer again
Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file i2s_at91.h.

Function Documentation

uint8_t* i2s_getBuffer ( unsigned buf_num )

Returns one of the two buffers or NULL if none is available.

You can't call this function if you have already started the player.

Parameters:
buf_num The number of the buffer, ie I2S_FIRST_BUF or I2S_SECOND_BUF.
Returns:
A pointer to the buffer if the buffer is available (not full), 0 on errors

Definition at line 69 of file i2s_at91.c.

uint8_t* i2s_getFreeBuffer ( void )

Returns a buffer that will be played after the current one.

You should fill it faster than your reproduction time. You can't call this function if the player is not running

Returns:
The next buffer to be played, 0 if both are busy.

Definition at line 87 of file i2s_at91.c.

bool i2s_start ( void )

Starts playing from I2S_FIRST_BUFFER.

You must have filled both buffers before calling this function. Does nothing if already playing.

Returns:
false on errors, true otherwise.

Definition at line 121 of file i2s_at91.c.


BeRTOS: i2s_at91.h Source File

  • cpu
  • arm
  • drv
i2s_at91.h
Go to the documentation of this file.
00001
00062 #ifndef DRV_I2S_AT91_H
00063 #define DRV_I2S_AT91_H
00064
00065
00066 #include <cfg/compiler.h>
00067 #include <cfg/macros.h>
00068 #include <io/arm.h>
00069
00073 #define I2S_FIRST_BUF  0
00074
00077 #define I2S_SECOND_BUF 1
00078
00082 void i2s_init(void);
00083
00091 uint8_t *i2s_getBuffer(unsigned buf_num);
00092
00100 uint8_t *i2s_getFreeBuffer(void);
00101
00108 bool i2s_start(void);
00109
00110 INLINE bool i2s_isPlaying(void)
00111 {
00112     return !(SSC_SR & BV(SSC_TXEMPTY));
00113 }
00114
00115 #endif /* DRV_I2S_AT91_H */


BeRTOS: ini_reader.c File Reference

  • mware
Functions
ini_reader.c File Reference

Ini file reader module. More...

#include "ini_reader.h"
#include "cfg/cfg_ini_reader.h"
#include <string.h>
#include <stdio.h>
#include <ctype.h>

Go to the source code of this file.

Functions

static int | findKey (KFile *fd, const char *key, char *line, size_t size)
Look for key inside a section.
int | ini_getString (KFile *fd, const char *section, const char *key, const char *default_value, char *buf, size_t size)
Returns the value for the given string in char* format.

Detailed Description

Ini file reader module.

Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file ini_reader.c.

Function Documentation

static int findKey | ( | KFile * | fd,
 |  | const char * | key,
 |  | char * | line,
 |  | size_t | size
 | ) |  | [static]

Look for key inside a section.

The function reads lines from input file. It fills the line parameter to allow splitting the key-value couple. It returns with error if a new section begins and no key was found.

Returns:
0 if key was found, EOF on errors.

Definition at line 121 of file ini_reader.c.

int ini_getString | ( | KFile * | fd,
 |  | const char * | section,
 |  | const char * | key,
 |  | const char * | default_value,
 |  | char * | buf,
 |  | size_t | size
 | ) |  |

Returns the value for the given string in char* format.

Reads the whole input file looking for section and key and fills the provided buffer with the corresponding value. On errors, the function fills the provided buffer with the default value and returns EOF.

Parameters:
fd | An initialized KFile structure.
section | The section to be looked for.
key | The key to search for.
default_value | The default value.
buf | The buffer to be filled.
size | The size of the provided buffer.
Returns:
0 if section and key were found, EOF on errors.

Definition at line 140 of file ini_reader.c.


BeRTOS: ini_reader.c Source File

  • mware
ini_reader.c
Go to the documentation of this file.
00001
00038 #include "ini_reader.h"
00039 #include "cfg/cfg_ini_reader.h"
00040 #include <string.h>
00041 #include <stdio.h>
00042 #include <ctype.h>
00043
00044 /*
00045  * Returns when the line containing the section is found.
00046  * The file pointer is positioned at the start of the next line.
00047  * Returns EOF if no section was found, 0 otherwise.
00048  */
00049 static int findSection(KFile *fd, const char *section, size_t section_len, char *line, size_t size)
00050 {
00051     while (kfile_gets(fd, line, size) != EOF)
00052     {
00053         char *ptr = line;
00054         unsigned i;
00055         /* accept only sections that begin at first char */
00056         if (*ptr++ != '[')
00057             continue;
00058
00059         /* find the end-of-section character */
00060         for (i = 0; i < size && *ptr != ']'; ++i, ++ptr)
00061             ;
00062
00063         /* The found section could be long that our section key */
00064         if (section_len != i)
00065             continue;
00066
00067         /* did we find the correct section? */
00068         if(strncmp(&line[1], section, section_len))
00069             continue;
00070         else
00071             return 0;
00072     }
00073     return EOF;
00074 }
00075
00076 /*
00077  * Fills the argument with the key found in line
00078  */
00079 static char *getKey(const char *line, char *key, size_t size)
00080 {
00081     /* null-terminated string */
00082     while (isspace((unsigned char)*line))
00083         ++line;
00084     int i = 0;
00085     while (*line != '=' && !isspace((unsigned char)*line) && size)
00086     {
00087         key[i++] = *line;
00088         ++line;
00089         --size;
00090     }
00091     size ? (key[i] = '\0') : (key[i-1] = '\0');
00092     return key;
00093 }
00094
00095 /*
00096  * Fills the argument with the value found in line.
00097  */
00098 static char *getValue(const char *line, char *value, size_t size)
00099 {
00100     while (*line++ != '=')
00101         ;
00102     while (isspace((unsigned char)*line))
00103         ++line;
00104     int i = 0;
00105     while (*line && size)
00106     {
00107         value[i++] = *line++;
00108         --size;
00109     }
00110     size ? (value[i] = '\0') : (value[i-1] = '\0');
00111     return value;
00112 }
00113
00121 static int findKey(KFile *fd, const char *key, char *line, size_t size)
00122 {
00123     int err;
00124     do
00125     {
00126         err = kfile_gets(fd, line, size);
00127         char curr_key[30];
00128         getKey(line, curr_key, 30);
00129         /* check key */
00130         if (!strcmp(curr_key, key))
00131             return 0;
00132     }
00133     while (err != EOF && *line != '[');
00134     return EOF;
00135 }
00136
00137 /*
00138  * On errors, the function returns EOF and fills the buffer with the default value.
00139  */
00140 int ini_getString(KFile *fd, const char *section, const char *key, const char *default_value, char *buf, size_t size)
00141 {
00142     char line[CONFIG_INI_MAX_LINE_LEN];
00143
00144     if (kfile_seek(fd, 0, KSM_SEEK_SET) == EOF)
00145         goto error;
00146
00147     if (findSection(fd, section, strlen(section), line, CONFIG_INI_MAX_LINE_LEN) == EOF)
00148         goto error;
00149
00150     if (findKey(fd, key, line, CONFIG_INI_MAX_LINE_LEN) == EOF)
00151         goto error;
00152     else
00153         getValue(line, buf, size);
00154     return 0;
00155
00156 error:
00157     strncpy(buf, default_value, size);
00158     if (size > 0)
00159         buf[size - 1] = '\0';
00160     return EOF;
00161 }


BeRTOS: ini_reader.h File Reference

  • mware
Functions
ini_reader.h File Reference

Ini file reader module. More...

#include <io/kfile.h>

Go to the source code of this file.

Functions

int ini_getString (KFile *fd, const char *section, const char *key, const char *default_value, char *buf, size_t size)
Returns the value for the given string in char* format.

Detailed Description

Ini file reader module.

The format accepted is:

  • Sections must begin at beginning of line. [ Long name ] will be found only if " Long name " is specified as section name.
  • key can contain any spaces at the beginning and before '=' but not in the middle. Eg. "long key name" is not valid.
  • values will be stripped of spaces at the beginning and will run until end-of-line. Eg. "= long value" will be treated as "long value".
  • no nested sections are allowed.
  • no comments are allowed inside a line with key=value pair.
  • every line that doesn't contain a '=' or doesn't start with '[' will be ignored.
Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file ini_reader.h.

Function Documentation

int ini_getString | ( | KFile * | fd,
 |  | const char * | section,
 |  | const char * | key,
 |  | const char * | default_value,
 |  | char * | buf,
 |  | size_t | size
 | ) |  |

Returns the value for the given string in char* format.

Reads the whole input file looking for section and key and fills the provided buffer with the corresponding value. On errors, the function fills the provided buffer with the default value and returns EOF.

Parameters:
fd | An initialized KFile structure.
section | The section to be looked for.
key | The key to search for.
default_value | The default value.
buf | The buffer to be filled.
size | The size of the provided buffer.
Returns:
0 if section and key were found, EOF on errors.

Definition at line 140 of file ini_reader.c.


BeRTOS: ini_reader.h Source File

  • mware
ini_reader.h
Go to the documentation of this file.
00001
00050 #ifndef INI_READER_H
00051 #define INI_READER_H
00052
00053 #include <io/kfile.h>
00054
00068 int ini_getString(KFile *fd, const char *section, const char *key, const char *default_value, char *buf, size_t size);
00069
00070 int ini_reader_testSetup(void);
00071 int ini_reader_testRun(void);
00072 int ini_reader_testTearDown(void);
00073 #endif /* INI_READER_H */


BeRTOS: init_at91.c File Reference

  • cpu
  • arm
  • hw
Defines | Functions
init_at91.c File Reference

AT91SAM7S256 CRT. More...

#include <io/arm.h>
#include <cfg/macros.h>

Go to the source code of this file.

Defines

#define | PLL_MUL_VAL 72
Real multiplier value is PLL_MUL_VAL + 1!

Functions

void | __init1 (void)
Early hardware initialization routine1.
void | __init2 (void)
Early hardware initialization routine2.

Detailed Description

AT91SAM7S256 CRT.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file init_at91.c.

Function Documentation

void __init1 ( void )

Early hardware initialization routine1.

This will be called by the ASM CRT routine just *before* clearing .bss and loading .data sections. Usually only basic tasks are performed here (i.e. setting the PLL). For more generic tasks, __init2() should be used.

Note:
Please keep in mind that since .bss and .data are not yet set, care must be taken. No static data can be used inside this funcition. Also some libc functions or floating point operations could potentially use initialized static data, be aware!

Definition at line 151 of file init_at91.c.

void __init2 ( void )

Early hardware initialization routine2.

This will be called by the ASM CRT routine just *after* clearing .bss and loading .data sections and before calling main().

Definition at line 230 of file init_at91.c.


BeRTOS: init_at91.c Source File

  • cpu
  • arm
  • hw
init_at91.c
Go to the documentation of this file.
00001
00039 #include <io/arm.h>
00040 #include <cfg/macros.h>
00041
00042 #define USE_FIXED_PLL 1
00043
00044 #define XTAL_FREQ 18432000UL
00045
00046 #if USE_FIXED_PLL
00047     #if CPU_FREQ != 48054857L
00048         /* Avoid errors on nightly test */
00049         #if !defined(ARCH_NIGHTTEST) || !(ARCH & ARCH_NIGHTTEST)
00050             #warning Clock registers set for 48.055MHz operation, revise following code if you want a different clock.
00051         #endif
00052     #endif
00053
00054     /*
00055      * With a 18.432MHz cristal, master clock is:
00056      * (((18.432 * (PLL_MUL_VAL + 1)) / PLL_DIV_VAL) / AT91MCK_PRES) = 48.055MHz
00057      */
00058     #define PLL_MUL_VAL  72
00059     #define PLL_DIV_VAL  14
00060     #define AT91MCK_PRES PMC_PRES_CLK_2
00061
00062 #else /* !USE_FIXED_PLL*/
00063
00064     #define PLL_IN_MIN  1000000UL
00065     #define PLL_IN_MAX  32000000UL
00066     #define PLL_OUT_MIN 80000000UL
00067     #define PLL_OUT_MAX 160000000UL
00068
00069     #define DIV_HARD_MIN 1
00070     #define DIV_HARD_MAX 255
00071
00072     #define DIV_MIN  (DIV_ROUND(XTAL_FREQ, PLL_IN_MAX) \
00073         < DIV_HARD_MIN ? DIV_HARD_MIN : DIV_ROUND(XTAL_FREQ, PLL_IN_MAX))
00074
00075     #define DIV_MAX  (DIV_ROUND(XTAL_FREQ, PLL_IN_MIN) \
00076         > DIV_HARD_MAX ? DIV_HARD_MAX : DIV_ROUND(XTAL_FREQ, PLL_IN_MIN))
00077
00078     #define MUL_MIN  0
00079     #define MUL_MAX  2047
00080
00081     typedef struct PllRegs
00082     {
00083         uint32_t mul;
00084         uint32_t div;
00085         uint32_t pres;
00086     } PllRegs;
00087
00093     static const PllRegs pllCostants(void)
00094     {
00095         uint32_t best_err = CPU_FREQ;
00096         PllRegs res;
00097
00098         for (uint32_t div = DIV_MIN; div <= DIV_MAX; div++)
00099         {
00100             for (uint32_t pres = 0; pres < 8; pres++)
00101             {
00102                 uint32_t mul = DIV_ROUND((CPU_FREQ * div) << pres, XTAL_FREQ) - 1;
00103                 if (mul <= MUL_MAX)
00104                 {
00105                     uint32_t pll = (XTAL_FREQ * (mul + 1)) / div;
00106                     if (pll >= PLL_OUT_MIN && pll <= PLL_OUT_MAX)
00107                     {
00108                         uint32_t err = ABS((int32_t)((pll >> pres) - CPU_FREQ));
00109                         if (err == 0)
00110                         {
00111                             res.div = div;
00112                             res.mul = mul;
00113                             res.pres = pres;
00114                             return res;
00115                         }
00116                         if (err < best_err)
00117                         {
00118                             best_err = err;
00119                             res.div = div;
00120                             res.mul = mul;
00121                             res.pres = pres;
00122                         }
00123                     }
00124                 }
00125             }
00126         }
00127         return res;
00128     }
00129 #endif  /* !USE_FIXED_PLL*/
00130
00131 /*
00132  * Override dummy hardware init functions supplied by the ASM startup
00133  * routine.
00134  */
00135
00136 void __init1(void);
00137 void __init2(void);
00138
00151 void __init1(void)
00152 {
00153     /*
00154      * Compute number of master clock cycles in 1.5us.
00155      * Needed by flash writing functions.
00156      * The maximum FMCN value is 0xFF and 0 can be used only if
00157      * master clock is less than 33kHz.
00158      */
00159     #define MCN  DIV_ROUNDUP(CPU_FREQ, 666667UL)
00160     #define FMCN (CPU_FREQ <= 33333UL ? 0 : (MCN < 0xFF ? MCN : 0xFF))
00161
00162     #if CPU_FREQ < 30000000UL
00163         /* Use 1 cycles for flash access. */
00164         MC_FMR = FMCN << MC_FMCN_SHIFT | MC_FWS_1R2W;
00165     #else
00166         /* Use 2 cycles for flash access. */
00167         MC_FMR = FMCN << MC_FMCN_SHIFT | MC_FWS_2R3W;
00168     #endif
00169
00170         /* Disable all interrupts. Useful for debugging w/o target reset. */
00171     AIC_EOICR = 0xFFFFFFFF;
00172     AIC_IDCR =  0xFFFFFFFF;
00173
00174         /* The watchdog is enabled after processor reset. Disable it. */
00175     WDT_MR = BV(WDT_WDDIS);
00176
00177         /*
00178          * Enable the main oscillator. Set startup time of 6 * 8 slow
00179          * clock cycles and wait until oscillator is stabilized.
00180          */
00181     CKGR_MOR = (6 << 8) | BV(CKGR_MOSCEN);
00182     while (!(PMC_SR & BV(PMC_MOSCS))) ;
00183
00184         /* Switch to Slow oscillator clock. */
00185     PMC_MCKR &= ~PMC_CSS_MASK;
00186     while (!(PMC_SR & BV(PMC_MCKRDY))) ;
00187
00188         /* Switch to prescaler div 1 factor. */
00189     PMC_MCKR &= ~PMC_PRES_MASK;
00190     while (!(PMC_SR & BV(PMC_MCKRDY))) ;
00191
00192     uint32_t div, pres, mul;
00193     #if USE_FIXED_PLL
00194         div = PLL_DIV_VAL;
00195         mul = PLL_MUL_VAL;
00196         pres = AT91MCK_PRES;
00197     #else
00198         PllRegs pll = pllCostants();
00199         div = pll.div;
00200         mul = pll.mul;
00201         pres = pll.pres << PMC_PRES_SHIFT;
00202     #endif
00203
00204         /*
00205          * Set PLL:
00206          * PLLfreq = crystal / divider * (multiplier + 1)
00207          * Wait 28 clock cycles until PLL is locked.
00208          */
00209     CKGR_PLLR = ((mul << CKGR_MUL_SHIFT)
00210         | (28 << CKGR_PLLCOUNT_SHIFT) | div);
00211     while (!(PMC_SR & BV(PMC_LOCK))) ;
00212
00213     /* Set master clock prescaler.  */
00214     PMC_MCKR = pres;
00215     while (!(PMC_SR & BV(PMC_MCKRDY))) ;
00216
00217         /*
00218          * Switch to PLL clock. Trying to set this together with the
00219          * prescaler fails (see datasheets).
00220          */
00221     PMC_MCKR |= PMC_CSS_PLL_CLK;
00222     while (!(PMC_SR & BV(PMC_MCKRDY))) ;
00223 }
00224
00230 void __init2(void)
00231 {
00232     /* Enable external reset key. */
00233     RSTC_MR = (RSTC_KEY | BV(RSTC_URSTEN));
00234
00235     /* Enable clock for PIO(s) */
00236     PMC_PCER = BV(PIOA_ID);
00237     #if CPU_ARM_SAM7X
00238         PMC_PCER |= BV(PIOB_ID);
00239     #endif
00240 }


BeRTOS: init_cm3.c File Reference

  • cpu
  • cortex-m3
  • hw
init_cm3.c File Reference

Cortex-M3 architecture's entry point. More...

#include "cfg/cfg_proc.h"
#include "switch_ctx_cm3.h"
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <cpu/attr.h>
#include <cpu/irq.h>
#include <cpu/types.h>
#include <drv/irq_cm3.h>
#include <drv/clock_cm3.h>
#include <kern/proc_p.h>
#include <io/cm3.h>

Go to the source code of this file.

Detailed Description

Cortex-M3 architecture's entry point.

Author:
Andrea Righi <arighi@develer.com>

Definition in file init_cm3.c.


BeRTOS: init_cm3.c Source File

  • cpu
  • cortex-m3
  • hw
init_cm3.c
Go to the documentation of this file.
00001
00038 #include "cfg/cfg_proc.h" /* CONFIG_KERN_PREEMPT */
00039 #include "switch_ctx_cm3.h"
00040
00041 #include <cfg/compiler.h>
00042 #include <cfg/debug.h>
00043
00044 #include <cpu/attr.h> /* PAUSE */
00045 #include <cpu/irq.h> /* IRQ_DISABLE */
00046 #include <cpu/types.h>
00047
00048 #include <drv/irq_cm3.h>
00049 #include <drv/clock_cm3.h>
00050
00051 #include <kern/proc_p.h>
00052
00053 #include <io/cm3.h>
00054
00055 #ifndef __IAR_SYSTEMS_ICC__
00056 extern size_t __text_end, __data_start, __data_end, __bss_start, __bss_end;
00057 #endif
00058
00059 extern void __init2(void);
00060
00061 /* Architecture's entry point */
00062 void __init2(void)
00063 {
00064     /*
00065      * The main application expects IRQs disabled.
00066      */
00067     IRQ_DISABLE;
00068
00069     /* Set the appropriate clocking configuration */
00070     clock_init();
00071
00072     /* Initialize IRQ vector table in RAM */
00073     sysirq_init();
00074
00075 #if (CONFIG_KERN && CONFIG_KERN_PREEMPT)
00076     /*
00077      * Voluntary context switch handler.
00078      *
00079      * This software interrupt can always be triggered and must be
00080      * dispatched as soon as possible, thus we just disable IRQ priority
00081      * for it.
00082      */
00083     sysirq_setHandler(FAULT_SVCALL, svcall_handler);
00084     sysirq_setPriority(FAULT_SVCALL, IRQ_PRIO_MAX);
00085     /*
00086      * Preemptible context switch handler
00087      *
00088      * The priority of this IRQ must be the lowest priority in the system
00089      * in order to run last in the interrupt service routines' chain.
00090      */
00091     sysirq_setHandler(FAULT_PENDSV, pendsv_handler);
00092     sysirq_setPriority(FAULT_PENDSV, IRQ_PRIO_MIN);
00093 #endif
00094 }


BeRTOS: init_lpc2.c File Reference

  • cpu
  • arm
  • hw
init_lpc2.c File Reference

LPC2378 CRT. More...

#include <cpu/irq.h>
#include <drv/vic_lpc2.h>
#include <io/lpc23xx.h>

Go to the source code of this file.

Detailed Description

LPC2378 CRT.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file init_lpc2.c.


BeRTOS: init_lpc2.c Source File

  • cpu
  • arm
  • hw
init_lpc2.c
Go to the documentation of this file.
00001
00038 #include <cpu/irq.h>
00039 #include <drv/vic_lpc2.h>
00040 #include <io/lpc23xx.h>
00041
00042 #if CPU_FREQ != 72000000UL
00043     /* Avoid errors on nightly test */
00044     #if !defined(ARCH_NIGHTTEST) || !(ARCH & ARCH_NIGHTTEST)
00045         #warning Clock registers set for 72MHz operation, revise following code if you want a different clock.
00046     #endif
00047 #endif
00048
00049 /*
00050  * With a 12MHz cristal, master clock is:
00051  * (((2 * 12 * (PLL_MUL_VAL + 1)) / (PLL_DIV_VAL + 1)) / (LPC2_CPUCLOCK_DIV + 1))= 72MHz
00052  */
00053 #define PLL_MUL_VAL  11
00054 #define PLL_DIV_VAL  0
00055 #define LPC2_CPUCLOCK_DIV 3
00056
00057
00058 /* PLL feed sequence */
00059 #define PLL_FEED_SEQ() ATOMIC(PLLFEED = 0xAA; PLLFEED = 0x55;)
00060
00061 static void configurePll(void)
00062 {
00063     /* Disconnect and disable the PLL, if already active */
00064     if (PLLSTAT & (1 << 25))
00065     {
00066         /* Disconnect PLL, but leave it enabled */
00067         PLLCON = 0x01;
00068         PLL_FEED_SEQ();
00069         /* Disable PLL */
00070         PLLCON = 0;
00071         PLL_FEED_SEQ();
00072     }
00073
00074     /* Enable the main oscillator and wait for it to be stable */
00075     SCS |= (1 << 5);
00076     while (!(SCS & (1 << 6))) ;
00077
00078     /* Select the main oscillator as the PLL clock source */
00079     CLKSRCSEL = 0x01;
00080
00081     /* Set up PLL mul and div */
00082     PLLCFG = PLL_MUL_VAL | (PLL_DIV_VAL << 16);
00083     PLL_FEED_SEQ();
00084
00085     /* Enable PLL, disconnected */
00086     PLLCON = 0x01;
00087     PLL_FEED_SEQ();
00088
00089     /* Set clock divider */
00090     CCLKCFG = LPC2_CPUCLOCK_DIV;
00091
00092     /* Wait for the PLL to lock */
00093     while (!(PLLSTAT & (1 << 26))) ;
00094
00095     /* Enable and connect the PLL */
00096     PLLCON = 0x03;
00097     PLL_FEED_SEQ();
00098 }
00099
00100 void __init1(void);
00101
00102 void __init1(void)
00103 {
00104     /* Map irq vectors to internal flash */
00105     MEMMAP = 0x01;
00106     /* Configure PLL, switch from IRC to Main OSC */
00107     configurePll();
00108
00109     /* Set memory accelerator module flash timings */
00110 #if CPU_FREQ < 20000000UL
00111     MAMTIM = 1;
00112 #elif CPU_FREQ < 40000000UL
00113     MAMTIM = 2;
00114 #elif CPU_FREQ < 60000000UL
00115     MAMTIM = 3;
00116 #else
00117     MAMTIM = 4;
00118 #endif
00119
00120     /* Memory accelerator module fully enabled */
00121     MAMCR = 0x02;
00122 }
00123
00124 void __init2(void);
00125
00126 void __init2(void)
00127 {
00128     vic_init();
00129 }


BeRTOS: init_xmega.c File Reference

  • cpu
  • avr
  • hw
init_xmega.c File Reference

AVR XMega initialization routine. More...

#include <cfg/macros.h>
#include <avr/io.h>

Go to the source code of this file.

Detailed Description

AVR XMega initialization routine.

Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file init_xmega.c.


BeRTOS: init_xmega.c Source File

  • cpu
  • avr
  • hw
init_xmega.c
Go to the documentation of this file.
00001
00038 #include <cfg/macros.h>
00039 #include <avr/io.h>
00040
00041 void __init(void) NAKED __attribute__ ((section (".init3")));
00042
00043 /*
00044  * Initialize all interrupt priorities present in AVR XMega CPU.
00045  */
00046 void __init(void)
00047 {
00048     PMIC.CTRL |= PMIC_LOLVLEX_bm | PMIC_MEDLVLEX_bm | PMIC_HILVLEX_bm;
00049 }


BeRTOS: integer.h Source File

  • fs
  • fatfs
integer.h
00001 /*-------------------------------------------*/
00002 /* Integer type definitions for FatFs module */
00003 /*-------------------------------------------*/
00004
00005 #ifndef _INTEGER
00006
00007 #include <cfg/compiler.h>
00008
00009 #if 0
00010 #include <windows.h>
00011 #else
00012
00013 /* These types must be 16-bit, 32-bit or larger integer */
00014 typedef int             INT;
00015 typedef unsigned        UINT;
00016
00017 /* These types must be 8-bit integer */
00018 typedef int8_t          CHAR;
00019 typedef uint8_t         UCHAR;
00020 typedef uint8_t         BYTE;
00021
00022 /* These types must be 16-bit integer */
00023 typedef int16_t         SHORT;
00024 typedef uint16_t        USHORT;
00025 typedef uint16_t        WORD;
00026 typedef uint16_t        WCHAR;
00027
00028 /* These types must be 32-bit integer */
00029 typedef int32_t         LONG;
00030 typedef uint32_t        ULONG;
00031 typedef uint32_t        DWORD;
00032
00033 /* Boolean type */
00034 typedef enum { FALSE = 0, TRUE } BOOL;
00035
00036 #endif
00037
00038 #define _INTEGER
00039 #endif


BeRTOS: kfile.h File Reference

  • io
Data Structures | Typedefs | Enumerations | Functions
io/kfile.h File Reference
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <cfg/macros.h>

Go to the source code of this file.

Data Structures

struct | ReOpenFunc_t
Context data for callback functions which operate on pseudo files. More...

Typedefs

typedef int32_t | kfile_off_t
KFile offset type, used by kfile_seek().

Enumerations

enum | KSeekMode { KSM_SEEK_SET, KSM_SEEK_CUR, KSM_SEEK_END }
Costants for repositioning read/write file offset. More...

Functions

kfile_off_t | kfile_genericSeek (struct KFile *fd, kfile_off_t offset, KSeekMode whence)
Move fd file seek position of offset bytes from whence.
struct KFile * | kfile_genericReopen (struct KFile *fd)
Reopen file fd.
int | kfile_genericClose (struct KFile *fd)
Close file fd.
KFile access functions

Interface functions for KFile access.

size_t | kfile_read (struct KFile *fd, void *buf, size_t size)
Read size bytes from file fd into buf.
int | kfile_gets (struct KFile *fd, char *buf, int size)
Read a line long at most as size and put it in buf.
int | kfile_gets_echo (struct KFile *fd, char *buf, int size, bool echo)
Read a line long at most as size and put it in buf, with optional echo.
kfile_off_t | kfile_copy (KFile *src, KFile *dst, kfile_off_t size)
Copy size bytes from file src to dst.
size_t | kfile_write (struct KFile *fd, const void *buf, size_t size)
Write size bytes from buffer buf into KFile fd.
int | kfile_printf (struct KFile *fd, const char *format,...)
Formatted write.
int | kfile_print (struct KFile *fd, const char *s)
Write a string to kfile fd.
kfile_off_t | kfile_seek (struct KFile *fd, kfile_off_t offset, KSeekMode whence)
Seek into file (if seekable).
KFile * | kfile_reopen (struct KFile *fd)
Close and reopen file fd.
int | kfile_close (struct KFile *fd)
Close file.
int | kfile_flush (struct KFile *fd)
Flush file I/O.
int | kfile_error (struct KFile *fd)
Get file error mask.
void | kfile_clearerr (struct KFile *fd)
Clear errors.
int | kfile_putc (int c, struct KFile *fd)
Generic putc implementation using kfile_write.
int | kfile_getc (struct KFile *fd)
Generic getc implementation using kfile_read.
void | kfile_resync (KFile *fd, mtime_t delay)
Discard input to resynchronize with remote end.
void | kfile_init (struct KFile *fd)
Base class KFile constructor.

Detailed Description

Definition in file io/kfile.h.


BeRTOS: kfile.h Source File

  • io
io/kfile.h
Go to the documentation of this file.
00001
00104 #ifndef KERN_KFILE_H
00105 #define KERN_KFILE_H
00106
00107 #include <cfg/compiler.h>
00108 #include <cfg/debug.h>
00109 #include <cfg/macros.h>
00110
00111 /* fwd decl */
00112 struct KFile;
00113
00114 typedef int32_t kfile_off_t;
00115
00121 typedef enum KSeekMode
00122 {
00123     KSM_SEEK_SET,
00124     KSM_SEEK_CUR,
00125     KSM_SEEK_END,
00126 } KSeekMode;
00127
00128 /*
00129  * Prototypes for KFile access functions.
00130  * I/O file functions must be ANSI compliant.
00131  * \note A KFile user can choose which function subset to implement,
00132  *       but has to set to NULL unimplemented features.
00133  */
00134
00135 /*
00136  * Read from file.
00137  * \return the number of bytes read.
00138  */
00139 typedef size_t (*ReadFunc_t) (struct KFile *fd, void *buf, size_t size);
00140
00141 /*
00142  * Write to file.
00143  * \return the number of bytes written.
00144  */
00145 typedef size_t (*WriteFunc_t) (struct KFile *fd, const void *buf, size_t size);
00146
00147 /*
00148  * Seek into file (if seekable).
00149  * \return the new file offset or EOF on errors.
00150  */
00151 typedef kfile_off_t (*SeekFunc_t) (struct KFile *fd, kfile_off_t offset, KSeekMode whence);
00152
00153 /*
00154  * Close and reopen file \a fd.
00155  * The reopening is done with the former file parameters and access modes.
00156  */
00157 typedef struct KFile * (*ReOpenFunc_t) (struct KFile *fd);
00158
00159 /*
00160  * Close file.
00161  * \return 0 on success, EOF on errors.
00162  */
00163 typedef int (*CloseFunc_t) (struct KFile *fd);
00164
00165 /*
00166  * Flush file I/O.
00167  * \return 0 on success, EOF on errors.
00168  */
00169 typedef int (*FlushFunc_t) (struct KFile *fd);
00170
00171 /*
00172  * Get file error mask.
00173  * \return 0 on success or file error code, device specific.
00174  */
00175 typedef int (*ErrorFunc_t) (struct KFile *fd);
00176
00177 /*
00178  * Clear errors.
00179  */
00180 typedef void (*ClearErrFunc_t) (struct KFile *fd);
00181
00189 typedef struct KFile
00190 {
00191     ReadFunc_t     read;
00192     WriteFunc_t    write;
00193     ReOpenFunc_t   reopen;
00194     CloseFunc_t    close;
00195     SeekFunc_t     seek;
00196     FlushFunc_t    flush;
00197     ErrorFunc_t    error;
00198     ClearErrFunc_t clearerr;
00199     DB(id_t _type); // Used to keep track, at runtime, of the class type.
00200
00201     /* NOTE: these must _NOT_ be size_t on 16bit CPUs! */
00202     kfile_off_t    seek_pos;
00203     kfile_off_t    size;
00204 } KFile;
00205
00206 /*
00207  * Generic implementation of kfile_seek.
00208  */
00209 kfile_off_t kfile_genericSeek(struct KFile *fd, kfile_off_t offset, KSeekMode whence);
00210
00211 /*
00212  * Generic implementation of kfile_reopen.
00213  */
00214 struct KFile * kfile_genericReopen(struct KFile *fd);
00215
00216 int kfile_genericClose(struct KFile *fd);
00217
00240 INLINE size_t kfile_read(struct KFile *fd, void *buf, size_t size)
00241 {
00242     ASSERT(fd->read);
00243     return fd->read(fd, buf, size);
00244 }
00245 int kfile_gets(struct KFile *fd, char *buf, int size);
00246 int kfile_gets_echo(struct KFile *fd, char *buf, int size, bool echo);
00247
00256 kfile_off_t kfile_copy(KFile *src, KFile *dst, kfile_off_t size);
00257
00268 INLINE size_t kfile_write(struct KFile *fd, const void *buf, size_t size)
00269 {
00270     ASSERT(fd->write);
00271     return fd->write(fd, buf, size);
00272 }
00273
00274 int kfile_printf(struct KFile *fd, const char *format, ...);
00275 int kfile_print(struct KFile *fd, const char *s);
00276
00287 INLINE kfile_off_t kfile_seek(struct KFile *fd, kfile_off_t offset, KSeekMode whence)
00288 {
00289     ASSERT(fd->seek);
00290     return fd->seek(fd, offset, whence);
00291 }
00292
00297 INLINE KFile * kfile_reopen(struct KFile *fd)
00298 {
00299     ASSERT(fd->reopen);
00300     return fd->reopen(fd);
00301 }
00302
00307 INLINE int kfile_close(struct KFile *fd)
00308 {
00309     ASSERT(fd->close);
00310     return fd->close(fd);
00311 }
00312
00317 INLINE int kfile_flush(struct KFile *fd)
00318 {
00319     ASSERT(fd->flush);
00320     return fd->flush(fd);
00321 }
00322
00327 INLINE int kfile_error(struct KFile *fd)
00328 {
00329     ASSERT(fd->error);
00330     return fd->error(fd);
00331 }
00332
00336 INLINE void kfile_clearerr(struct KFile *fd)
00337 {
00338     ASSERT(fd->clearerr);
00339     fd->clearerr(fd);
00340 }
00341
00342 int kfile_putc(int c, struct KFile *fd);
00343 int kfile_getc(struct KFile *fd);
00344 void kfile_resync(KFile *fd, mtime_t delay);
00345 void kfile_init(struct KFile *fd);
00346 /* @} */
00347  //Defgroup io_kfile
00349
00350 /*
00351  * Kfile test function.
00352  */
00353 int kfile_testSetup(void);
00354 int kfile_testRun(void);
00355 int kfile_testRunGeneric(KFile *fd, uint8_t *test_buf, uint8_t *save_buf, size_t size);
00356 int kfile_testTearDown(void);
00357
00358
00359 #endif /* KERN_KFILE_H */


BeRTOS: irq.c File Reference

  • kern
irq.c File Reference

Process scheduler (public interface). More...

#include "irq.h"
#include <cfg/module.h>
#include <kern/proc_p.h>
#include <kern/proc.h>
#include "cfg/cfg_proc.h"
#include <unistd.h>

Go to the source code of this file.

Detailed Description

Process scheduler (public interface).

Author:
Bernie Innocenti <bernie@codewiz.org>

Still in development, disable nightly test for now

Definition in file irq.c.


BeRTOS: irq.c Source File

  • kern
irq.c
Go to the documentation of this file.
00001
00040 #include "irq.h"
00041
00042 #include <cfg/module.h>
00043 #include <kern/proc_p.h>
00044 #include <kern/proc.h>
00045
00046 #include "cfg/cfg_proc.h"
00047
00048 #include <unistd.h> // FIXME: move POSIX stuff to irq_posix.h
00049
00050 MOD_DEFINE(irq)
00051
00052 // FIXME
00053 static void (*irq_handlers[100])(void);
00054
00055 /* signal handler */
00056 void irq_entry(int signum)
00057 {
00058     irq_handlers[signum]();
00059 }
00060
00061 void irq_register(int irq, void (*callback)(void))
00062 {
00063     irq_handlers[irq] = callback;
00064 }
00065
00066 void irq_init(void)
00067 {
00068     struct sigaction act;
00069
00070     act.sa_handler = irq_entry;
00071     sigemptyset(&act.sa_mask);
00072     //sigaddset(&act.sa_mask, irq);
00073     act.sa_flags = SA_RESTART; // | SA_SIGINFO;
00074
00075     sigaction(SIGUSR1, &act, NULL);
00076     sigaction(SIGALRM, &act, NULL);
00077
00078     MOD_INIT(irq);
00079 }


BeRTOS: irq_cm3.c File Reference

  • cpu
  • cortex-m3
  • drv
Functions
irq_cm3.c File Reference

Cortex-M3 IRQ management. More...

#include "irq_cm3.h"
#include <cfg/debug.h>
#include <cfg/log.h>
#include <cpu/irq.h>

Go to the source code of this file.

Functions

void | sysirq_setHandler (sysirq_t irq, sysirq_handler_t handler)
Helper function used to set handler for system IRQ irq.
void | sysirq_init (void)
Init system IRQ handling.

Detailed Description

Cortex-M3 IRQ management.

Author:
Andrea Righi <arighi@develer.com>

Definition in file irq_cm3.c.

Function Documentation

void sysirq_init ( void )

Init system IRQ handling.

Note:
all system interrupts are disabled.

Definition at line 126 of file irq_cm3.c.


BeRTOS: irq_cm3.c Source File

  • cpu
  • cortex-m3
  • drv
irq_cm3.c
Go to the documentation of this file.
00001
00038 #include "irq_cm3.h"
00039
00040 #include <cfg/debug.h> /* ASSERT() */
00041 #include <cfg/log.h> /* LOG_ERR() */
00042 #include <cpu/irq.h>
00043
00044
00045 #ifdef __IAR_SYSTEMS_ICC__
00046 #pragma data_alignment=0x400
00047 static void (*irq_table[NUM_INTERRUPTS])(void);
00048 #else
00049 static void (*irq_table[NUM_INTERRUPTS])(void)
00050             __attribute__((section("vtable")));
00051 #endif
00052
00053 /* Priority register / IRQ number table */
00054 static const uint32_t nvic_prio_reg[] =
00055 {
00056     /* System exception registers */
00057     0, NVIC_SYS_PRI1, NVIC_SYS_PRI2, NVIC_SYS_PRI3,
00058
00059     /* External interrupts registers */
00060     NVIC_PRI0, NVIC_PRI1, NVIC_PRI2, NVIC_PRI3,
00061     NVIC_PRI4, NVIC_PRI5, NVIC_PRI6, NVIC_PRI7,
00062     NVIC_PRI8, NVIC_PRI9, NVIC_PRI10, NVIC_PRI11,
00063     NVIC_PRI12, NVIC_PRI13
00064 };
00065
00066 /* Unhandled IRQ */
00067 static NAKED NORETURN void unhandled_isr(void)
00068 {
00069     register uint32_t reg;
00070
00071 #ifdef __IAR_SYSTEMS_ICC__
00072     reg = CPU_READ_IPSR();
00073 #else
00074     asm volatile ("mrs %0, ipsr" : "=r"(reg));
00075 #endif
00076     LOG_ERR("unhandled IRQ %lu\n", reg);
00077     while (1)
00078         PAUSE;
00079 }
00080
00081 void sysirq_setPriority(sysirq_t irq, int prio)
00082 {
00083     uint32_t pos = (irq & 3) * 8;
00084     reg32_t reg = nvic_prio_reg[irq >> 2];
00085     uint32_t val;
00086
00087     val = HWREG(reg);
00088     val &= ~(0xff << pos);
00089     val |= prio << pos;
00090     HWREG(reg) = val;
00091 }
00092
00093 static void sysirq_enable(sysirq_t irq)
00094 {
00095     /* Enable the IRQ line (only for generic IRQs) */
00096     if (irq >= 16 && irq < 48)
00097         NVIC_EN0_R = 1 << (irq - 16);
00098     else if (irq >= 48)
00099         NVIC_EN1_R = 1 << (irq - 48);
00100 }
00101
00102 void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler)
00103 {
00104     cpu_flags_t flags;
00105
00106     ASSERT(irq < NUM_INTERRUPTS);
00107
00108     IRQ_SAVE_DISABLE(flags);
00109     irq_table[irq] = handler;
00110     sysirq_setPriority(irq, IRQ_PRIO);
00111     sysirq_enable(irq);
00112     IRQ_RESTORE(flags);
00113 }
00114
00115 void sysirq_freeHandler(sysirq_t irq)
00116 {
00117     cpu_flags_t flags;
00118
00119     ASSERT(irq < NUM_INTERRUPTS);
00120
00121     IRQ_SAVE_DISABLE(flags);
00122     irq_table[irq] = unhandled_isr;
00123     IRQ_RESTORE(flags);
00124 }
00125
00126 void sysirq_init(void)
00127 {
00128     cpu_flags_t flags;
00129     int i;
00130
00131     IRQ_SAVE_DISABLE(flags);
00132     for (i = 0; i < NUM_INTERRUPTS; i++)
00133         irq_table[i] = unhandled_isr;
00134
00135     /* Update NVIC to point to the new vector table */
00136     NVIC_VTABLE_R = (size_t)irq_table;
00137     IRQ_RESTORE(flags);
00138 }


BeRTOS: irq_cm3.h File Reference

  • cpu
  • cortex-m3
  • drv
Functions
irq_cm3.h File Reference

IRQ management for the Cortex-M3 processor. More...

#include <cfg/compiler.h>

Go to the source code of this file.

Functions

void | sysirq_setHandler (sysirq_t irq, sysirq_handler_t handler)
Helper function used to set handler for system IRQ irq.
void | sysirq_init (void)
Init system IRQ handling.

Detailed Description

IRQ management for the Cortex-M3 processor.

Author:
Andrea Righi <arighi@develer.com>

Definition in file irq_cm3.h.

Function Documentation

void sysirq_init ( void )

Init system IRQ handling.

Note:
all system interrupts are disabled.

Definition at line 125 of file sysirq_at91.c.


BeRTOS: irq_cm3.h Source File

  • cpu
  • cortex-m3
  • drv
irq_cm3.h
Go to the documentation of this file.
00001
00038 #ifndef DRV_CORTEX_M3_SYSIRQ_H
00039 #define DRV_CORTEX_M3_SYSIRQ_H
00040
00041 #include <cfg/compiler.h>
00042
00043 #if CPU_CM3_LM3S
00044     #include <io/lm3s.h>
00045 #elif CPU_CM3_STM32
00046     #include <io/stm32.h>
00047 #elif CPU_CM3_SAM3
00048     #include <io/sam3.h>
00049 /*#elif  Add other families here */
00050 #else
00051     #error Unknown CPU
00052 #endif
00053
00054 typedef void (*sysirq_handler_t)(void);
00055 typedef unsigned int sysirq_t;
00056
00057 void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler);
00058 void sysirq_setPriority(sysirq_t irq, int prio);
00059 void sysirq_freeHandler(sysirq_t irq);
00060
00061 void sysirq_init(void);
00062
00063 #endif /* DRV_CORTEX_M3_SYSIRQ_H */


BeRTOS: isaac.c File Reference

  • sec
  • prng
isaac.c File Reference

ISAAC implementation. More...

#include "isaac.h"
#include <sec/prng.h>
#include <sec/util.h>
#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <string.h>

Go to the source code of this file.

Detailed Description

ISAAC implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file isaac.c.


BeRTOS: isaac.c Source File

  • sec
  • prng
isaac.c
Go to the documentation of this file.
00001
00038 /*
00039 ------------------------------------------------------------------------------
00040 rand.c: By Bob Jenkins.  My random number generator, ISAAC.  Public Domain.
00041 MODIFIED:
00042   960327: Creation (addition of randinit, really)
00043   970719: use context, not global variables, for internal state
00044   980324: added main (ifdef'ed out), also rearranged randinit()
00045   010626: Note that this is public domain
00046 ------------------------------------------------------------------------------
00047 */
00048
00049 #include "isaac.h"
00050 #include <sec/prng.h>
00051 #include <sec/util.h>
00052 #include <cfg/compiler.h>
00053 #include <cfg/macros.h>
00054 #include <string.h>
00055
00056 typedef uint32_t ub4;
00057 typedef uint16_t ub2;
00058 typedef uint8_t ub1;
00059
00060 #define ind(mm,x)  (*(ub4 *)((size_t)(mm) + ((x) & ((CONFIG_ISAAC_RANDSIZ-1)<<2))))
00061 #define rngstep(mix,a,b,mm,m,m2,r,x) \
00062 { \
00063   x = *m;  \
00064   a = (a^(mix)) + *(m2++); \
00065   *(m++) = y = ind(mm,x) + a + b; \
00066   *(r++) = b = ind(mm,y>>CONFIG_ISAAC_RANDSIZL) + x; \
00067 }
00068
00069 static void isaac(IsaacContext *ctx)
00070 {
00071     register ub4 a,b,x,y,*m,*mm,*m2,*r,*mend;
00072     mm=ctx->randmem; r=ctx->randrsl;
00073     a = ctx->randa; b = ctx->randb + (++ctx->randc);
00074     for (m = mm, mend = m2 = m+(CONFIG_ISAAC_RANDSIZ/2); m<mend; )
00075     {
00076         rngstep( a<<13, a, b, mm, m, m2, r, x);
00077         rngstep( a>>6 , a, b, mm, m, m2, r, x);
00078         rngstep( a<<2 , a, b, mm, m, m2, r, x);
00079         rngstep( a>>16, a, b, mm, m, m2, r, x);
00080     }
00081     for (m2 = mm; m2<mend; )
00082     {
00083         rngstep( a<<13, a, b, mm, m, m2, r, x);
00084         rngstep( a>>6 , a, b, mm, m, m2, r, x);
00085         rngstep( a<<2 , a, b, mm, m, m2, r, x);
00086         rngstep( a>>16, a, b, mm, m, m2, r, x);
00087     }
00088     ctx->randb = b; ctx->randa = a;
00089 }
00090
00091
00092 #define mix(a,b,c,d,e,f,g,h) \
00093 { \
00094    a^=b<<11; d+=a; b+=c; \
00095    b^=c>>2;  e+=b; c+=d; \
00096    c^=d<<8;  f+=c; d+=e; \
00097    d^=e>>16; g+=d; e+=f; \
00098    e^=f<<10; h+=e; f+=g; \
00099    f^=g>>4;  a+=f; g+=h; \
00100    g^=h<<8;  b+=g; h+=a; \
00101    h^=a>>9;  c+=h; a+=b; \
00102 }
00103
00104 static void isaac_reseed(PRNG *ctx_, const uint8_t *seed)
00105 {
00106     IsaacContext *ctx = (IsaacContext *)ctx_;
00107     int i;
00108     ub4 a,b,c,d,e,f,g,h;
00109     ub4 *m,*r;
00110
00111     // XOR the new seed over the current state, so to depend on
00112     // the previously-generated output.
00113     xor_block(ctx->randrsl, ctx->randrsl, seed, sizeof(ctx->randrsl));
00114
00115     ctx->randa = ctx->randb = ctx->randc = 0;
00116     m=ctx->randmem;
00117     r=ctx->randrsl;
00118     a=b=c=d=e=f=g=h=0x9e3779b9;  /* the golden ratio */
00119
00120     for (i=0; i<4; ++i)          /* scramble it */
00121     {
00122         mix(a,b,c,d,e,f,g,h);
00123     }
00124
00125     /* initialize using the contents of r[] as the seed */
00126     for (i=0; i<CONFIG_ISAAC_RANDSIZ; i+=8)
00127     {
00128         a+=r[i  ]; b+=r[i+1]; c+=r[i+2]; d+=r[i+3];
00129         e+=r[i+4]; f+=r[i+5]; g+=r[i+6]; h+=r[i+7];
00130         mix(a,b,c,d,e,f,g,h);
00131         m[i  ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d;
00132         m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h;
00133     }
00134     /* do a second pass to make all of the seed affect all of m */
00135     for (i=0; i<CONFIG_ISAAC_RANDSIZ; i+=8)
00136     {
00137         a+=m[i  ]; b+=m[i+1]; c+=m[i+2]; d+=m[i+3];
00138         e+=m[i+4]; f+=m[i+5]; g+=m[i+6]; h+=m[i+7];
00139         mix(a,b,c,d,e,f,g,h);
00140         m[i  ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d;
00141         m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h;
00142     }
00143 }
00144
00145 static void isaac_generate(PRNG *ctx_, uint8_t *data, size_t len)
00146 {
00147     IsaacContext *ctx = (IsaacContext *)ctx_;
00148
00149     STATIC_ASSERT(sizeof(ctx->randrsl) == CONFIG_ISAAC_RANDSIZ*4);
00150
00151     while (len)
00152     {
00153         ASSERT(ctx->randcnt <= CONFIG_ISAAC_RANDSIZ*4);
00154
00155         if (ctx->randcnt == CONFIG_ISAAC_RANDSIZ*4)
00156         {
00157             isaac(ctx);
00158             ctx->randcnt = 0;
00159         }
00160
00161         size_t L = MIN(len, CONFIG_ISAAC_RANDSIZ*4 - (size_t)ctx->randcnt);
00162         memcpy(data, (uint8_t*)ctx->randrsl + ctx->randcnt, L);
00163         data += L;
00164         ctx->randcnt += L;
00165         len -= L;
00166     }
00167 }
00168
00169
00170 /**********************************************************************/
00171
00172 void isaac_init(IsaacContext *ctx)
00173 {
00174     ctx->prng.reseed = isaac_reseed;
00175     ctx->prng.generate = isaac_generate;
00176     ctx->prng.seed_len = sizeof(ctx->randrsl);
00177     ctx->prng.seeded = 0;
00178
00179     ctx->randcnt = CONFIG_ISAAC_RANDSIZ*4;
00180     memset(ctx->randrsl, 0, sizeof(ctx->randrsl));
00181 }
00182
00183
00184
00185
00186 #ifdef NEVER
00187 int main()
00188 {
00189   ub4 i,j;
00190   randctx ctx;
00191   ctx.randa=ctx.randb=ctx.randc=(ub4)0;
00192   for (i=0; i<256; ++i) ctx.randrsl[i]=(ub4)0;
00193   randinit(&ctx, TRUE);
00194   for (i=0; i<2; ++i)
00195   {
00196     isaac(&ctx);
00197     for (j=0; j<256; ++j)
00198     {
00199       printf("%.8lx",ctx.randrsl[j]);
00200       if ((j&7)==7) printf("\n");
00201     }
00202   }
00203 }
00204 #endif


BeRTOS: isaac.h File Reference

  • sec
  • prng
Defines
isaac.h File Reference

ISAAC implementation. More...

#include <sec/prng.h>

Go to the source code of this file.

Defines

#define CONFIG_ISAAC_RANDSIZL (3)
Size of the internal ISAAC state (in 32-bit words).

Detailed Description

ISAAC implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file isaac.h.

Define Documentation

#define CONFIG_ISAAC_RANDSIZL (3)

Size of the internal ISAAC state (in 32-bit words).

ISAAC is known to generate unbiased data as follows: * 3 words: 2^37 unbiased values * 4 words: 2^45 unbiased values * 5 words: 2^53 unbiased values * 6 words: 2^61 unbiased values * 7 words: 2^69 unbiased values * 8 words: 2^77 unbiased values

The period of the generator is usually much longer, but it is obviously uninteresting for a CSPRNG.

Definition at line 57 of file isaac.h.


BeRTOS: isaac.h Source File

  • sec
  • prng
isaac.h
Go to the documentation of this file.
00001
00038 #ifndef SEC_PRNG_ISAAC_H
00039 #define SEC_PRNG_ISAAC_H
00040
00041 #include <sec/prng.h>
00042
00057 #define CONFIG_ISAAC_RANDSIZL   (3)
00058 #define CONFIG_ISAAC_RANDSIZ    (1<<(CONFIG_ISAAC_RANDSIZL))
00059
00060 typedef struct IsaacContext
00061 {
00062     PRNG prng;
00063     uint32_t randcnt;
00064     uint32_t randrsl[CONFIG_ISAAC_RANDSIZ];
00065     uint32_t randmem[CONFIG_ISAAC_RANDSIZ];
00066     uint32_t randa;
00067     uint32_t randb;
00068     uint32_t randc;
00069 } IsaacContext;
00070
00071 void isaac_init(IsaacContext *ctx);
00072
00073 #define isaac_stackinit(...) \
00074     ({ IsaacContext *ctx = alloca(sizeof(IsaacContext)); isaac_init(ctx , ##__VA_ARGS__); &ctx->prng; })
00075
00076
00077 #endif /* SEC_PRNG_ISAAC_H */


BeRTOS: kbd.c File Reference

  • drv
Defines | Enumerations | Functions | Variables
kbd.c File Reference

Keyboard driver (implementation) More...

#include "hw/hw_kbd.h"
#include "cfg/cfg_kbd.h"
#include <cfg/debug.h>
#include <cfg/module.h>
#include <drv/timer.h>
#include <mware/event.h>
#include <drv/kbd.h>

Go to the source code of this file.

Defines

#define | KBD_CHECK_INTERVAL 10
(ms) Timing for kbd softint
#define | KBD_DEBOUNCE_TIME 30
(ms) Debounce time
#define | KBD_BEEP_TIME 5
(ms) Duration of keybeep
#define | KBD_REPEAT_DELAY 400
(ms) Keyboard repeat delay for first character
#define | KBD_REPEAT_RATE 100
(ms) Initial interchar delay for keyboard repeat
#define | KBD_REPEAT_MAXRATE 20
(ms) Minimum delay for keyboard repeat
#define | KBD_REPEAT_ACCEL 5
(ms) Keyboard repeat speed increase
#define | KBD_LNG_DELAY 1000
(ms) Keyboard long pression keys delay

Enumerations

enum
Status for keyboard repeat state machine.

Functions

static void | kbd_poll (void)
Poll keyboard and dispatch keys to handlers.
static void | kbd_softint (UNUSED_ARG(iptr_t, arg))
Keyboard soft-irq handler.
keymask_t | kbd_peek (void)
Read a key from the keyboard buffer.
keymask_t | kbd_get (void)
Wait for a keypress and return the mask of depressed keys.
keymask_t | kbd_get_timeout (mtime_t timeout)
Wait up to timeout ms for a keypress and return the mask of depressed keys, or K_TIMEOUT if the timeout was reacked.
static keymask_t | kbd_defHandlerFunc (keymask_t key)
This is the default key handler, called after all other handlers have had their chance to do their special processing.
static keymask_t | kbd_debHandlerFunc (keymask_t key)
Handle keyboard debounce.
keymask_t | kbd_setRepeatMask (keymask_t mask)
Set current mask of repeatable keys.
static keymask_t | kbd_rptHandlerFunc (keymask_t key)
Handle keyboard repeat.
void | kbd_init (void)
Initialize keyboard ports and softtimer.

Variables

static Event | key_pressed
Used to notify the occurrence of a key pressed event.
static volatile keymask_t | kbd_buf
Single entry keyboard buffer.
static volatile keymask_t | kbd_cnt
Number of keypress events in kbd_buf.
static keymask_t | kbd_rpt_mask
Mask of repeatable keys.
static Timer | kbd_timer
Keyboard softtimer.
static List | kbd_rawHandlers
Raw keyboard handlers.
static List | kbd_handlers
Cooked keyboard handlers.
static KbdHandler | kbd_defHandler
The default keyboard handler.
static KbdHandler | kbd_debHandler
The debounce keyboard handler.
static KbdHandler | kbd_rptHandler
Auto-repeat keyboard handler.

Detailed Description

Keyboard driver (implementation)

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>
Francesco Sacchi <batt@develer.com>

Definition in file kbd.c.

Function Documentation

static keymask_t kbd_debHandlerFunc ( keymask_t key ) [static]

Handle keyboard debounce.

Buffer for debounce

Timer for keyboard debounce

Key aquired after debounce

Definition at line 303 of file kbd.c.

static keymask_t kbd_defHandlerFunc ( keymask_t key ) [static]

This is the default key handler, called after all other handlers have had their chance to do their special processing.

This handler pushes all input in the keyboard FIFO buffer.

Definition at line 275 of file kbd.c.

static void kbd_poll ( void ) [static]

Poll keyboard and dispatch keys to handlers.

Read the key states and invoke all keyboard handlers to process the new state.

Call this function periodically using a software timer, an interrupt or a process.

Currently depressed key

Definition at line 124 of file kbd.c.

static keymask_t kbd_rptHandlerFunc ( keymask_t key ) [static]

Handle keyboard repeat.

Current repeat rate (for acceleration)

Definition at line 366 of file kbd.c.

Variable Documentation

keymask_t kbd_rpt_mask [static]

Mask of repeatable keys.

Definition at line 92 of file kbd.c.


BeRTOS: kbd.c Source File

  • drv
kbd.c
Go to the documentation of this file.
00001
00043 #include "hw/hw_kbd.h"
00044
00045 #include "cfg/cfg_kbd.h"
00046 #include <cfg/debug.h>
00047 #include <cfg/module.h>
00048
00049 #include <drv/timer.h>
00050 #include <mware/event.h>
00051 #include <drv/kbd.h>
00052
00053
00054 /* Configuration sanity checks */
00055 #if !defined(CONFIG_KBD_POLL) || (CONFIG_KBD_POLL != KBD_POLL_SOFTINT)
00056     #error CONFIG_KBD_POLL must be defined to either KBD_POLL_SOFTINT
00057 #endif
00058 #if !defined(CONFIG_KBD_BEEP) || (CONFIG_KBD_BEEP != 0 && CONFIG_KBD_BEEP != 1)
00059     #error CONFIG_KBD_BEEP must be defined to either 0 or 1
00060 #endif
00061 #if !defined(CONFIG_KBD_OBSERVER) || (CONFIG_KBD_OBSERVER != 0 && CONFIG_KBD_OBSERVER != 1)
00062     #error CONFIG_KBD_OBSERVER must be defined to either 0 or 1
00063 #endif
00064 #if !defined(CONFIG_KBD_LONGPRESS) || (CONFIG_KBD_LONGPRESS != 0 && CONFIG_KBD_LONGPRESS != 1)
00065     #error CONFIG_KBD_LONGPRESS must be defined to either 0 or 1
00066 #endif
00067
00068 #if CONFIG_KBD_BEEP
00069     #include <drv/buzzer.h>
00070 #endif
00071
00072 #define KBD_CHECK_INTERVAL  10
00073 #define KBD_DEBOUNCE_TIME   30
00074 #define KBD_BEEP_TIME        5
00076 #define KBD_REPEAT_DELAY   400
00077 #define KBD_REPEAT_RATE    100
00078 #define KBD_REPEAT_MAXRATE  20
00079 #define KBD_REPEAT_ACCEL     5
00081 #define KBD_LNG_DELAY     1000
00085 static enum { KS_IDLE, KS_REPDELAY, KS_REPEAT } kbd_rptStatus;
00086
00088 static Event key_pressed;
00089
00090 static volatile keymask_t kbd_buf;
00091 static volatile keymask_t kbd_cnt;
00092 static keymask_t kbd_rpt_mask;
00094 #if CONFIG_KBD_POLL == KBD_POLL_SOFTINT
00095 static Timer kbd_timer;
00096 #endif
00097
00098 static List kbd_rawHandlers;
00099 static List kbd_handlers;
00101 static KbdHandler kbd_defHandler;
00102 static KbdHandler kbd_debHandler;
00103 static KbdHandler kbd_rptHandler;
00105 #if CONFIG_KBD_LONGPRESS
00106 static KbdHandler kbd_lngHandler;
00107 #endif
00108
00109 #if CONFIG_KBD_OBSERVER
00110     #include <mware/observer.h>
00111     Subject kbd_subject;
00112 #endif
00113
00114
00124 static void kbd_poll(void)
00125 {
00127     static keymask_t current_key;
00128
00129     struct KbdHandler *handler;
00130     keymask_t key = kbd_readkeys();
00131
00132     /* Call raw input handlers */
00133     FOREACH_NODE(handler, &kbd_rawHandlers)
00134         key = handler->hook(key);
00135
00136     /* If this key was not previously pressed */
00137     if (key != current_key)
00138     {
00139         /* Remember last key */
00140         current_key = key;
00141
00142         /* Call cooked input handlers */
00143         FOREACH_NODE(handler, &kbd_handlers)
00144             key = handler->hook(key);
00145     }
00146 }
00147
00148 #if CONFIG_KBD_POLL == KBD_POLL_SOFTINT
00149
00153 static void kbd_softint(UNUSED_ARG(iptr_t, arg))
00154 {
00155     kbd_poll();
00156     timer_add(&kbd_timer);
00157 }
00158
00159 #else
00160     #error "Define keyboard poll method"
00161
00162 #endif /* CONFIG_KBD_POLL */
00163
00178 keymask_t kbd_peek(void)
00179 {
00180     keymask_t key = 0;
00181
00182 #if CONFIG_KBD_SCHED
00183     /* Let other tasks run for a while */
00184     extern void schedule(void);
00185     schedule();
00186 #endif
00187
00188     /* Extract an event from the keyboard buffer */
00189     IRQ_DISABLE;
00190     if (kbd_cnt)
00191     {
00192         --kbd_cnt;
00193         key = kbd_buf;
00194     }
00195     IRQ_ENABLE;
00196
00197     return key;
00198 }
00199
00205 keymask_t kbd_get(void)
00206 {
00207     keymask_t key;
00208
00209     #if CONFIG_KBD_POLL == KBD_POLL_SOFTINT
00210         event_wait(&key_pressed);
00211         key = kbd_peek();
00212     #else
00213         while (!(key = kbd_peek()))
00214             cpu_relax();
00215     #endif
00216
00217     return key;
00218 }
00219
00220
00226 keymask_t kbd_get_timeout(mtime_t timeout)
00227 {
00228     if (event_waitTimeout(&key_pressed, timeout))
00229         return kbd_peek();
00230     else
00231         return K_TIMEOUT;
00232 }
00233
00234
00235 void kbd_addHandler(struct KbdHandler *handler)
00236 {
00237     KbdHandler *node;
00238     List *list;
00239
00240     cpu_flags_t flags;
00241     IRQ_SAVE_DISABLE(flags);
00242
00243     /* Choose between raw and coocked handlers list */
00244     list = (handler->flags & KHF_RAWKEYS) ?
00245         &kbd_rawHandlers : &kbd_handlers;
00246
00247     /*
00248      * Search for the first node whose priority
00249      * is lower than the timer we want to add.
00250      */
00251     FOREACH_NODE(node,list)
00252         if (node->pri < handler->pri)
00253             break;
00254
00255     /* Enqueue handler in the handlers chain */
00256     INSERT_BEFORE(&handler->link, &node->link);
00257
00258     IRQ_RESTORE(flags);
00259 }
00260
00261
00262 void kbd_remHandler(struct KbdHandler *handler)
00263 {
00264     /* Remove the handler */
00265     ATOMIC(REMOVE(&handler->link));
00266 }
00267
00268
00275 static keymask_t kbd_defHandlerFunc(keymask_t key)
00276 {
00277     if (key)
00278     {
00279         /* Force a single event in kbd buffer */
00280         kbd_buf = key;
00281         kbd_cnt = 1;
00282         #if CONFIG_KBD_POLL == KBD_POLL_SOFTINT
00283             event_do(&key_pressed);
00284         #endif
00285
00286         #if CONFIG_KBD_OBSERVER
00287             observer_notify(&kbd_subject, KBD_EVENT_KEY, &key);
00288         #endif
00289
00290         #if CONFIG_KBD_BEEP
00291             if (!(key & K_REPEAT))
00292                 buz_beep(KBD_BEEP_TIME);
00293         #endif
00294     }
00295
00296     /* Eat all input */
00297     return 0;
00298 }
00299
00303 static keymask_t kbd_debHandlerFunc(keymask_t key)
00304 {
00306     static keymask_t debounce_key;
00307
00309     static ticks_t debounce_time;
00310
00312     static keymask_t new_key;
00313
00314
00315     ticks_t now = timer_clock();
00316
00317     if (key != debounce_key)
00318     {
00319         /* Reset debounce timer */
00320         debounce_key = key;
00321         debounce_time = now;
00322     }
00323     else if ((new_key != debounce_key)
00324         && (now - debounce_time > ms_to_ticks(KBD_DEBOUNCE_TIME)))
00325     {
00326         new_key = debounce_key;
00327         debounce_time = now;
00328     }
00329
00330     return new_key;
00331 }
00332
00333 #if CONFIG_KBD_LONGPRESS
00334
00337 static keymask_t kbd_lngHandlerFunc(keymask_t key)
00338 {
00339     static ticks_t start;
00340     ticks_t now = timer_clock();
00341
00342     if (key & K_LNG_MASK)
00343     {
00344         if (now - start > ms_to_ticks(KBD_LNG_DELAY))
00345             key |= K_LONG;
00346     }
00347     else
00348         start = now;
00349     return key;
00350 }
00351 #endif
00352
00356 keymask_t kbd_setRepeatMask(keymask_t mask)
00357 {
00358     keymask_t oldmask = kbd_rpt_mask;
00359     ATOMIC(kbd_rpt_mask = mask);
00360     return oldmask;
00361 }
00362
00366 static keymask_t kbd_rptHandlerFunc(keymask_t key)
00367 {
00368     /* Timer for keyboard repeat events. */
00369     static ticks_t repeat_time;
00370
00371     /* Current repeat rate (for acceleration). */
00372     static ticks_t repeat_rate;
00374     ticks_t now = timer_clock();
00375
00376     switch (kbd_rptStatus)
00377     {
00378         case KS_IDLE:
00379             if (key & kbd_rpt_mask)
00380             {
00381                 repeat_time = now;
00382                 kbd_rptStatus = KS_REPDELAY;
00383             }
00384             break;
00385
00386         case KS_REPDELAY:
00387             if (key & kbd_rpt_mask)
00388             {
00389                 if (now - repeat_time > ms_to_ticks(KBD_REPEAT_DELAY))
00390                 {
00391                     key = (key & kbd_rpt_mask) | K_REPEAT;
00392                     repeat_time = now;
00393                     repeat_rate = ms_to_ticks(KBD_REPEAT_RATE);
00394                     kbd_rptStatus = KS_REPEAT;
00395                 }
00396                 else
00397                     key = 0;
00398             }
00399             else
00400                 kbd_rptStatus = KS_IDLE;
00401             break;
00402
00403         case KS_REPEAT:
00404             if (key & kbd_rpt_mask)
00405             {
00406                 if (now - repeat_time > repeat_rate)
00407                 {
00408                     /* Enqueue a new event in the buffer */
00409                     key = (key & kbd_rpt_mask) | K_REPEAT;
00410                     repeat_time = now;
00411
00412                     /* Repeat rate acceleration */
00413                     if (repeat_rate > ms_to_ticks(KBD_REPEAT_MAXRATE))
00414                         repeat_rate -= ms_to_ticks(KBD_REPEAT_ACCEL);
00415                 }
00416                 else
00417                     key = 0;
00418             }
00419             else
00420                 kbd_rptStatus = KS_IDLE;
00421
00422             break;
00423     }
00424
00425     return key;
00426 }
00427
00428
00429 MOD_DEFINE(kbd)
00430
00431
00434 void kbd_init(void)
00435 {
00436 #if CONFIG_KBD_BEEP
00437     MOD_CHECK(buzzer);
00438 #endif
00439
00440     KBD_HW_INIT;
00441
00442     /* Init handlers lists */
00443     LIST_INIT(&kbd_handlers);
00444     LIST_INIT(&kbd_rawHandlers);
00445
00446     /* Add debounce keyboard handler */
00447     kbd_debHandler.hook = kbd_debHandlerFunc;
00448     kbd_debHandler.pri = 100; /* high priority */
00449     kbd_debHandler.flags = KHF_RAWKEYS;
00450     kbd_addHandler(&kbd_debHandler);
00451
00452     #if CONFIG_KBD_LONGPRESS
00453     /* Add long pression keyboard handler */
00454     kbd_lngHandler.hook = kbd_lngHandlerFunc;
00455     kbd_lngHandler.pri = 90; /* high priority */
00456     kbd_lngHandler.flags = KHF_RAWKEYS;
00457     kbd_addHandler(&kbd_lngHandler);
00458     #endif
00459
00460     /* Add repeat keyboard handler */
00461     kbd_rptHandler.hook = kbd_rptHandlerFunc;
00462     kbd_rptHandler.pri = 80; /* high priority */
00463     kbd_rptHandler.flags = KHF_RAWKEYS;
00464     kbd_addHandler(&kbd_rptHandler);
00465
00466     /* Add default keyboard handler */
00467     kbd_defHandler.hook = kbd_defHandlerFunc;
00468     kbd_defHandler.pri = -128; /* lowest priority */
00469     kbd_addHandler(&kbd_defHandler);
00470
00471 #if CONFIG_KBD_OBSERVER
00472     observer_InitSubject(&kbd_subject);
00473 #endif
00474
00475 #if CONFIG_KBD_POLL == KBD_POLL_SOFTINT
00476
00477     MOD_CHECK(timer);
00478     #if CONFIG_KERN
00479         MOD_CHECK(proc);
00480     #endif
00481
00482     /* Initialize the keyboard event (key pressed) */
00483     event_initGeneric(&key_pressed);
00484
00485     /* Add kbd handler to soft timers list */
00486     event_initSoftint(&kbd_timer.expire, kbd_softint, NULL);
00487     timer_setDelay(&kbd_timer, ms_to_ticks(KBD_CHECK_INTERVAL));
00488     timer_add(&kbd_timer);
00489
00490 #else
00491     #error "Define keyboard poll method"
00492
00493 #endif
00494
00495     MOD_INIT(kbd);
00496 }


BeRTOS: kbd.h File Reference

  • drv
Data Structures | Defines | Functions
kbd.h File Reference
#include "hw/kbd_map.h"
#include "cfg/cfg_kbd.h"
#include <cfg/compiler.h>
#include <struct/list.h>

Go to the source code of this file.

Data Structures

struct | KbdHandler
Keyboard handler descriptor. More...

Defines

#define | KHF_RAWKEYS BV(0)
Handler gets raw key events.
Keyboard polling modes.

Define CONFIG_KBD_POLL to one of these.

#define | KBD_POLL_SOFTINT 1

Functions

void | kbd_init (void)
Initialize keyboard ports and softtimer.
keymask_t | kbd_peek (void)
Read a key from the keyboard buffer.
keymask_t | kbd_get (void)
Wait for a keypress and return the mask of depressed keys.
keymask_t | kbd_get_timeout (mtime_t timeout)
Wait up to timeout ms for a keypress and return the mask of depressed keys, or K_TIMEOUT if the timeout was reacked.
keymask_t | kbd_setRepeatMask (keymask_t mask)
Set current mask of repeatable keys.

Detailed Description

Definition in file kbd.h.


BeRTOS: kbd.h Source File

  • drv
kbd.h
Go to the documentation of this file.
00001
00052 #ifndef DRV_KBD_H
00053 #define DRV_KBD_H
00054
00055 #include "hw/kbd_map.h"
00056
00057 #include "cfg/cfg_kbd.h" // CONFIG_KBD_OBSERVER
00058 #include <cfg/compiler.h>
00059
00060 #include <struct/list.h>
00061
00069 #define KBD_POLL_SOFTINT  1
00070 /* \} */
00071
00075 typedef struct KbdHandler
00076 {
00077     Node link;
00078     keymask_t (*hook)(keymask_t);
00079     int8_t pri;
00080     uint8_t flags;
00081 } KbdHandler;
00082
00083 #define KHF_RAWKEYS BV(0)
00086 void kbd_init(void);
00087 keymask_t kbd_peek(void);
00088 keymask_t kbd_get(void);
00089 keymask_t kbd_get_timeout(mtime_t timeout);
00090 void kbd_addHandler(struct KbdHandler *handler);
00091 void kbd_remHandler(struct KbdHandler *handler);
00092 keymask_t kbd_setRepeatMask(keymask_t mask);
00093
00094 #if CONFIG_KBD_OBSERVER
00095     struct Subject;
00096
00098     extern struct Subject kbd_subject;
00099
00100     enum
00101     {
00102         /* Event for key presses. */
00103         KBD_EVENT_KEY = 0x100
00104     };
00105 #endif
00106  //defgroup kbd
00108 #endif /* DRV_KBD_H */


BeRTOS: kbd_map.h File Reference

  • hw
Typedefs
kbd_map.h File Reference

Keyboard map definitions. More...

#include <cfg/macros.h>

Go to the source code of this file.

Defines

Keycodes.
#define | K_UP BV(0)
This is a repeated keyevent.
#define | K_DOWN BV(1)
This is a repeated keyevent.
#define | K_OK BV(2)
This is a repeated keyevent.
#define | K_CANCEL BV(3)
This is a repeated keyevent.
#define | K_REPEAT BV(13)
This is a repeated keyevent.
#define | K_TIMEOUT BV(14)
Fake key event for timeouts.
#define | K_LONG BV(15)
This is a repeated keyevent.

Typedefs

typedef uint16_t | keymask_t
Type for keyboard mask.

Detailed Description

Keyboard map definitions.

Author:
Francesco Sacchi <batt@develer.com>
Stefano Fedrigo <a@develer.com>

Definition in file kbd_map.h.

Define Documentation

#define K_CANCEL BV(3)

This is a repeated keyevent.

Definition at line 61 of file kbd_map.h.

#define K_DOWN BV(1)

This is a repeated keyevent.

Definition at line 59 of file kbd_map.h.

#define K_LONG BV(15)

This is a repeated keyevent.

Definition at line 65 of file kbd_map.h.

#define K_OK BV(2)

This is a repeated keyevent.

Definition at line 60 of file kbd_map.h.

#define K_REPEAT BV(13)

This is a repeated keyevent.

Definition at line 63 of file kbd_map.h.

#define K_TIMEOUT BV(14)

Fake key event for timeouts.

Definition at line 64 of file kbd_map.h.

#define K_UP BV(0)

This is a repeated keyevent.

Definition at line 58 of file kbd_map.h.


BeRTOS: kbd_map.h Source File

  • hw
kbd_map.h
Go to the documentation of this file.
00001
00041 #ifndef HW_KBD_MAP_H
00042 #define HW_KBD_MAP_H
00043
00044 #include <cfg/macros.h>
00045
00046 #warning TODO:This is an example implentation, you must implement it!
00047
00048
00052 typedef uint16_t keymask_t;
00053
00058 #define K_UP       BV(0)
00059 #define K_DOWN     BV(1)
00060 #define K_OK       BV(2)
00061 #define K_CANCEL   BV(3)
00062
00063 #define K_REPEAT   BV(13)
00064 #define K_TIMEOUT  BV(14)
00065 #define K_LONG     BV(15)
00066
00068 #define K_LNG_MASK 0
00069
00070 #endif /* HW_KBD_MAP_H */


BeRTOS: kblock.c File Reference

  • io
Functions
kblock.c File Reference

KBlock interface. More...

#include "kblock.h"
#include <cfg/log.h>
#include <string.h>

Go to the source code of this file.

Functions

size_t | kblock_read (struct KBlock *b, block_idx_t idx, void *buf, size_t offset, size_t size)
Read data from the block device.
int | kblock_flush (struct KBlock *b)
Flush the cache (if any) to the device.
int | kblock_trim (struct KBlock *b, block_idx_t start, block_idx_t count)
Use a subset of the blocks on the device.
size_t | kblock_write (struct KBlock *b, block_idx_t idx, const void *buf, size_t offset, size_t size)
Write data to the block device.
int | kblock_copy (struct KBlock *b, block_idx_t src, block_idx_t dest)
Copy one block to another.

Detailed Description

KBlock interface.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file kblock.c.


BeRTOS: kblock.c Source File

  • io
kblock.c
Go to the documentation of this file.
00001
00039 #include "kblock.h"
00040
00041 #define LOG_LEVEL   LOG_LVL_ERR
00042 #define LOG_FORMAT  LOG_FMT_VERBOSE
00043
00044 #include <cfg/log.h>
00045 #include <string.h>
00046
00047 INLINE size_t kblock_readDirect(struct KBlock *b, block_idx_t index, void *buf, size_t offset, size_t size)
00048 {
00049     KB_ASSERT_METHOD(b, readDirect);
00050     ASSERT(index < b->blk_cnt);
00051     return b->priv.vt->readDirect(b, b->priv.blk_start + index, buf, offset, size);
00052 }
00053
00054 INLINE size_t kblock_writeDirect(struct KBlock *b, block_idx_t index, const void *buf, size_t offset, size_t size)
00055 {
00056     KB_ASSERT_METHOD(b, writeDirect);
00057     ASSERT(index < b->blk_cnt);
00058     return b->priv.vt->writeDirect(b, b->priv.blk_start + index, buf, offset, size);
00059 }
00060
00061 INLINE size_t kblock_readBuf(struct KBlock *b, void *buf, size_t offset, size_t size)
00062 {
00063     KB_ASSERT_METHOD(b, readBuf);
00064     ASSERT(offset + size <= b->blk_size);
00065
00066     return b->priv.vt->readBuf(b, buf, offset, size);
00067 }
00068
00069 INLINE size_t kblock_writeBuf(struct KBlock *b, const void *buf, size_t offset, size_t size)
00070 {
00071     KB_ASSERT_METHOD(b, writeBuf);
00072     ASSERT(offset + size <= b->blk_size);
00073     return b->priv.vt->writeBuf(b, buf, offset, size);
00074 }
00075
00076 INLINE int kblock_load(struct KBlock *b, block_idx_t index)
00077 {
00078     KB_ASSERT_METHOD(b, load);
00079     ASSERT(index < b->blk_cnt);
00080
00081     LOG_INFO("index %ld\n", index);
00082     return b->priv.vt->load(b, b->priv.blk_start + index);
00083 }
00084
00085 INLINE int kblock_store(struct KBlock *b, block_idx_t index)
00086 {
00087     KB_ASSERT_METHOD(b, store);
00088     ASSERT(index < b->blk_cnt);
00089
00090     LOG_INFO("index %ld\n", index);
00091     return b->priv.vt->store(b, b->priv.blk_start + index);
00092 }
00093
00094 INLINE void kblock_setDirty(struct KBlock *b, bool dirty)
00095 {
00096     if (dirty)
00097         b->priv.flags |= KB_CACHE_DIRTY;
00098     else
00099         b->priv.flags &= ~KB_CACHE_DIRTY;
00100 }
00101
00102
00103 size_t kblock_read(struct KBlock *b, block_idx_t idx, void *buf, size_t offset, size_t size)
00104 {
00105     ASSERT(b);
00106     ASSERT(buf);
00107     ASSERT(offset + size <= b->blk_size);
00108     LOG_INFO("blk_idx %ld, offset %u, size %u\n", idx, offset, size);
00109
00110     if (kblock_buffered(b) && idx == b->priv.curr_blk)
00111         return kblock_readBuf(b, buf, offset, size);
00112     else
00113         return kblock_readDirect(b, idx, buf, offset, size);
00114 }
00115
00116
00117 int kblock_flush(struct KBlock *b)
00118 {
00119     ASSERT(b);
00120
00121     if (!kblock_buffered(b))
00122         return 0;
00123
00124     if (kblock_cacheDirty(b))
00125     {
00126         LOG_INFO("flushing block %ld\n", b->priv.curr_blk);
00127         if (kblock_store(b, b->priv.curr_blk) == 0)
00128             kblock_setDirty(b, false);
00129         else
00130             return EOF;
00131     }
00132     return 0;
00133 }
00134
00135
00136 static bool kblock_loadPage(struct KBlock *b, block_idx_t idx)
00137 {
00138     ASSERT(b);
00139
00140     if (idx != b->priv.curr_blk)
00141     {
00142         LOG_INFO("loading block %ld\n", idx);
00143         if (kblock_flush(b) != 0 || kblock_load(b, idx) != 0)
00144                 return false;
00145
00146         b->priv.curr_blk = idx;
00147     }
00148     return true;
00149 }
00150
00151
00152 int kblock_trim(struct KBlock *b, block_idx_t start, block_idx_t count)
00153 {
00154     ASSERT(start + count <= b->blk_cnt);
00155
00156     if (kblock_buffered(b))
00157     {
00158         if (!kblock_loadPage(b, start))
00159             return EOF;
00160     }
00161
00162     b->priv.blk_start += start;
00163     b->priv.curr_blk = 0; // adjust logical address
00164     b->blk_cnt = count;
00165     return 0;
00166 }
00167
00168
00169 size_t kblock_write(struct KBlock *b, block_idx_t idx, const void *buf, size_t offset, size_t size)
00170 {
00171     ASSERT(b);
00172     ASSERT(buf);
00173     ASSERT(idx < b->blk_cnt);
00174     ASSERT(offset + size <= b->blk_size);
00175
00176     LOG_INFO("blk_idx %ld, offset %u, size %u\n", idx, offset, size);
00177
00178     if (kblock_buffered(b))
00179     {
00180         if (!kblock_loadPage(b, idx))
00181             return 0;
00182
00183         kblock_setDirty(b, true);
00184         return kblock_writeBuf(b, buf, offset, size);
00185     }
00186     else
00187     {
00188         #ifdef _DEBUG
00189         if (offset != 0 || size != b->blk_size)
00190             ASSERT(kblock_partialWrite(b));
00191         #endif
00192         return kblock_writeDirect(b, idx, buf, offset, size);
00193     }
00194 }
00195
00196 int kblock_copy(struct KBlock *b, block_idx_t src, block_idx_t dest)
00197 {
00198     ASSERT(b);
00199     ASSERT(src < b->blk_cnt);
00200     ASSERT(dest < b->blk_cnt);
00201
00202     if (kblock_buffered(b))
00203     {
00204         if (!kblock_loadPage(b, src))
00205             return EOF;
00206
00207         b->priv.curr_blk = dest;
00208         kblock_setDirty(b, true);
00209         return 0;
00210     }
00211     else if (kblock_partialWrite(b))
00212     {
00213         uint8_t buf[16];
00214         size_t blk_size = b->blk_size;
00215         size_t offset = 0;
00216
00217         while (blk_size)
00218         {
00219             size_t size = MIN(sizeof(buf), blk_size);
00220             if (kblock_readDirect(b, src, buf, offset, size) != size)
00221                 return EOF;
00222             if (kblock_writeDirect(b, dest, buf, offset, size) != size)
00223                 return EOF;
00224
00225             blk_size -= size;
00226             offset += size;
00227         }
00228         return 0;
00229     }
00230     else
00231     {
00232         ASSERT(0);
00233         return EOF;
00234     }
00235 }
00236
00237 int kblock_swLoad(struct KBlock *b, block_idx_t index)
00238 {
00239     /*
00240      * Since this is a low level API, the index here is a fisical index.
00241      * If we call another low level API, logical to fisical translation
00242      * would be applied twice.
00243      * In order to avoid this we subtract the start block index.
00244      */
00245     ASSERT(index >= b->priv.blk_start);
00246     return (kblock_readDirect(b, index - b->priv.blk_start, b->priv.buf, 0, b->blk_size) == b->blk_size) ? 0 : EOF;
00247 }
00248
00249 int kblock_swStore(struct KBlock *b, block_idx_t index)
00250 {
00251     /*
00252      * Since this is a low level API, the index here is a fisical index.
00253      * If we call another low level API, logical to fisical translation
00254      * would be applied twice.
00255      * In order to avoid this we subtract the start block index.
00256      */
00257     ASSERT(index >= b->priv.blk_start);
00258     return (kblock_writeDirect(b, index - b->priv.blk_start, b->priv.buf, 0, b->blk_size) == b->blk_size) ? 0 : EOF;
00259 }
00260
00261 size_t kblock_swReadBuf(struct KBlock *b, void *buf, size_t offset, size_t size)
00262 {
00263     ASSERT(buf);
00264     ASSERT(offset + size <= b->blk_size);
00265
00266     memcpy(buf, (uint8_t *)b->priv.buf + offset, size);
00267     return size;
00268 }
00269
00270 size_t kblock_swWriteBuf(struct KBlock *b, const void *buf, size_t offset, size_t size)
00271 {
00272     ASSERT(buf);
00273     ASSERT(offset + size <= b->blk_size);
00274     memcpy((uint8_t *)b->priv.buf + offset, buf, size);
00275     return size;
00276 }
00277
00278 int kblock_swClose(UNUSED_ARG(struct KBlock, *b))
00279 {
00280     return 0;
00281 }


BeRTOS: kblock.h File Reference

  • io
Data Structures | Defines | Typedefs | Functions
kblock.h File Reference
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <cfg/macros.h>

Go to the source code of this file.

Data Structures

struct | KBlock
KBlock: interface for a generic block device. More...

Defines

#define | KB_BUFFERED BV(0)
Internal flag: true if the KBlock has a buffer.
#define | KB_CACHE_DIRTY BV(1)
Internal flag: true if the cache is dirty.
#define | KB_PARTIAL_WRITE BV(2)
Internal flag: true if the device allows partial block write.

Typedefs

typedef uint32_t | block_idx_t
Type for addressing blocks in the device.
Prototypes for KBlock low level access functions.

When writing a driver implementing the KBlock interface you can choose which function subset to implement, but you have to set to NULL unimplemented features.

typedef size_t(* | kblock_read_direct_t )(struct KBlock *b, block_idx_t index, void *buf, size_t offset, size_t size)
typedef size_t(* | kblock_write_direct_t )(struct KBlock *b, block_idx_t index, const void *buf, size_t offset, size_t size)
typedef size_t(* | kblock_read_t )(struct KBlock *b, void *buf, size_t offset, size_t size)
typedef size_t(* | kblock_write_t )(struct KBlock *b, const void *buf, size_t offset, size_t size)
typedef int(* | kblock_load_t )(struct KBlock *b, block_idx_t index)
typedef int(* | kblock_store_t )(struct KBlock *b, block_idx_t index)
typedef int(* | kblock_error_t )(struct KBlock *b)
typedef void(* | kblock_clearerr_t )(struct KBlock *b)
typedef int(* | kblock_close_t )(struct KBlock *b)

Functions

int | kblock_trim (struct KBlock *b, block_idx_t start, block_idx_t count)
Use a subset of the blocks on the device.
int | kblock_error (struct KBlock *b)
Get the current errors for the device.
void | kblock_clearerr (struct KBlock *b)
Clear the errors of the device.
int | kblock_flush (struct KBlock *b)
Flush the cache (if any) to the device.
int | kblock_close (struct KBlock *b)
Close the device.
bool | kblock_buffered (struct KBlock *b)
block_idx_t | kblock_cachedBlock (struct KBlock *b)
bool | kblock_cacheDirty (struct KBlock *b)
Return the status of the internal cache.
bool | kblock_partialWrite (struct KBlock *b)
size_t | kblock_read (struct KBlock *b, block_idx_t idx, void *buf, size_t offset, size_t size)
Read data from the block device.
size_t | kblock_write (struct KBlock *b, block_idx_t idx, const void *buf, size_t offset, size_t size)
Write data to the block device.
int | kblock_copy (struct KBlock *b, block_idx_t src, block_idx_t dest)
Copy one block to another.

Detailed Description

Definition in file kblock.h.


BeRTOS: kblock.h Source File

  • io
kblock.h
Go to the documentation of this file.
00001
00080 #ifndef IO_KBLOCK_H
00081 #define IO_KBLOCK_H
00082
00083 #include <cfg/compiler.h>
00084 #include <cfg/debug.h>
00085 #include <cfg/macros.h>
00086
00088 typedef uint32_t block_idx_t;
00089
00090 // Fwd Declaration
00091 struct KBlock;
00092
00102 typedef size_t (* kblock_read_direct_t)  (struct KBlock *b, block_idx_t index, void *buf, size_t offset, size_t size);
00103 typedef size_t (* kblock_write_direct_t) (struct KBlock *b, block_idx_t index, const void *buf, size_t offset, size_t size);
00104
00105 typedef size_t (* kblock_read_t)        (struct KBlock *b, void *buf, size_t offset, size_t size);
00106 typedef size_t (* kblock_write_t)       (struct KBlock *b, const void *buf, size_t offset, size_t size);
00107 typedef int    (* kblock_load_t)        (struct KBlock *b, block_idx_t index);
00108 typedef int    (* kblock_store_t)       (struct KBlock *b, block_idx_t index);
00109
00110 typedef int    (* kblock_error_t)       (struct KBlock *b);
00111 typedef void   (* kblock_clearerr_t)    (struct KBlock *b);
00112 typedef int    (* kblock_close_t)       (struct KBlock *b);
00113 /* \} */
00114
00115 /*
00116  * Table of interface functions for a KBlock device.
00117  */
00118 typedef struct KBlockVTable
00119 {
00120     kblock_read_direct_t readDirect;
00121     kblock_write_direct_t writeDirect;
00122
00123     kblock_read_t  readBuf;
00124     kblock_write_t writeBuf;
00125     kblock_load_t  load;
00126     kblock_store_t store;
00127
00128     kblock_error_t    error;    // \sa kblock_error()
00129     kblock_clearerr_t clearerr; // \sa kblock_clearerr()
00130
00131     kblock_close_t  close; // \sa kblock_close()
00132 } KBlockVTable;
00133
00134
00135 #define KB_BUFFERED        BV(0) ///< Internal flag: true if the KBlock has a buffer
00136 #define KB_CACHE_DIRTY     BV(1) ///< Internal flag: true if the cache is dirty
00137 #define KB_PARTIAL_WRITE   BV(2) ///< Internal flag: true if the device allows partial block write
00138
00139
00140 /*
00141  * KBlock private members.
00142  * These are the private members of the KBlock interface, please do not
00143  * access these directly, use the KBlock API.
00144  */
00145 typedef struct KBlockPriv
00146 {
00147     DB(id_t type);         // Used to keep track, at runtime, of the class type.
00148     int flags;             // Status and error flags.
00149     void *buf;             // Pointer to the page buffer for RAM-cached KBlocks.
00150     block_idx_t blk_start; // Start block number when the device is trimmed. \sa kblock_trim().
00151     block_idx_t curr_blk;  // Current cached block number in cached KBlocks.
00152
00153     const struct KBlockVTable *vt; // Virtual table of interface functions.
00154 } KBlockPriv;
00155
00160 typedef struct KBlock
00161 {
00162     KBlockPriv priv;
00163
00164     /* Public access members */
00165     size_t blk_size;
00166     block_idx_t blk_cnt;
00167 } KBlock;
00168
00169
00200 int kblock_trim(struct KBlock *b, block_idx_t start, block_idx_t count);
00201
00202
00203 #define KB_ASSERT_METHOD(b, method) \
00204     do \
00205     { \
00206         ASSERT(b); \
00207         ASSERT((b)->priv.vt); \
00208         ASSERT((b)->priv.vt->method); \
00209     } \
00210     while (0)
00211
00212
00224 INLINE int kblock_error(struct KBlock *b)
00225 {
00226     KB_ASSERT_METHOD(b, error);
00227     return b->priv.vt->error(b);
00228 }
00229
00238 INLINE void kblock_clearerr(struct KBlock *b)
00239 {
00240     KB_ASSERT_METHOD(b, clearerr);
00241     b->priv.vt->clearerr(b);
00242 }
00243
00244
00254 int kblock_flush(struct KBlock *b);
00255
00263 INLINE int kblock_close(struct KBlock *b)
00264 {
00265     KB_ASSERT_METHOD(b, close);
00266     return kblock_flush(b) | b->priv.vt->close(b);
00267 }
00268
00274 INLINE bool kblock_buffered(struct KBlock *b)
00275 {
00276     ASSERT(b);
00277     return (b->priv.flags & KB_BUFFERED);
00278 }
00279
00280
00287 INLINE block_idx_t kblock_cachedBlock(struct KBlock *b)
00288 {
00289     ASSERT(kblock_buffered(b));
00290     return b->priv.curr_blk;
00291 }
00292
00293
00303 INLINE bool kblock_cacheDirty(struct KBlock *b)
00304 {
00305     ASSERT(kblock_buffered(b));
00306     return kblock_buffered(b) && (b->priv.flags & KB_CACHE_DIRTY);
00307 }
00308
00316 INLINE bool kblock_partialWrite(struct KBlock *b)
00317 {
00318     ASSERT(b);
00319     return (b->priv.flags & KB_PARTIAL_WRITE);
00320 }
00321
00345 size_t kblock_read(struct KBlock *b, block_idx_t idx, void *buf, size_t offset, size_t size);
00346
00347
00373 size_t kblock_write(struct KBlock *b, block_idx_t idx, const void *buf, size_t offset, size_t size);
00374
00389 int kblock_copy(struct KBlock *b, block_idx_t src, block_idx_t dest);
00390
00391 int kblock_swLoad(struct KBlock *b, block_idx_t index);
00392 int kblock_swStore(struct KBlock *b, block_idx_t index);
00393 size_t kblock_swReadBuf(struct KBlock *b, void *buf, size_t offset, size_t size);
00394 size_t kblock_swWriteBuf(struct KBlock *b, const void *buf, size_t offset, size_t size);
00395 int kblock_swClose(struct KBlock *b);
00396  //defgroup io_kblock
00398
00399
00400 #endif /* IO_KBLOCK_H */


BeRTOS: kblock_posix.c File Reference

  • io
kblock_posix.c File Reference

KBlock interface over libc files. More...

#include "kblock_posix.h"
#include <string.h>
#include <stdio.h>

Go to the source code of this file.

Detailed Description

KBlock interface over libc files.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file kblock_posix.c.


BeRTOS: kblock_posix.c Source File

  • io
kblock_posix.c
Go to the documentation of this file.
00001
00042 #include "kblock_posix.h"
00043 #include <string.h>
00044 #include <stdio.h>
00045
00046
00047 static int kblockposix_load(KBlock *b, block_idx_t index)
00048 {
00049     KBlockPosix *f = KBLOCKPOSIX_CAST(b);
00050     fseek(f->fp, index * b->blk_size, SEEK_SET);
00051     return (fread(f->b.priv.buf, 1, b->blk_size, f->fp) == b->blk_size) ? 0 : EOF;
00052 }
00053
00054 static int kblockposix_store(struct KBlock *b, block_idx_t index)
00055 {
00056     KBlockPosix *f = KBLOCKPOSIX_CAST(b);
00057     fseek(f->fp, index * b->blk_size, SEEK_SET);
00058     return (fwrite(f->b.priv.buf, 1, b->blk_size, f->fp) == b->blk_size) ? 0 : EOF;
00059 }
00060
00061 static size_t kblockposix_readBuf(struct KBlock *b, void *buf, size_t offset, size_t size)
00062 {
00063     KBlockPosix *f = KBLOCKPOSIX_CAST(b);
00064     memcpy(buf, (uint8_t *)f->b.priv.buf + offset, size);
00065     return size;
00066 }
00067
00068 static size_t kblockposix_readDirect(struct KBlock *b, block_idx_t index, void *buf, size_t offset, size_t size)
00069 {
00070     KBlockPosix *f = KBLOCKPOSIX_CAST(b);
00071     fseek(f->fp, index * b->blk_size + offset, SEEK_SET);
00072     return fread(buf, 1, size, f->fp);
00073 }
00074
00075 static size_t kblockposix_writeBuf(struct KBlock *b, const void *buf, size_t offset, size_t size)
00076 {
00077     KBlockPosix *f = KBLOCKPOSIX_CAST(b);
00078     memcpy((uint8_t *)f->b.priv.buf + offset, buf, size);
00079     return size;
00080 }
00081
00082 static size_t kblockposix_writeDirect(struct KBlock *b, block_idx_t index, const void *buf, size_t offset, size_t size)
00083 {
00084     KBlockPosix *f = KBLOCKPOSIX_CAST(b);
00085     ASSERT(buf);
00086     ASSERT(index < b->blk_cnt);
00087     fseek(f->fp, index * b->blk_size + offset, SEEK_SET);
00088     return fwrite(buf, 1, size, f->fp);
00089 }
00090
00091 static int kblockposix_error(struct KBlock *b)
00092 {
00093     KBlockPosix *f = KBLOCKPOSIX_CAST(b);
00094     return ferror(f->fp);
00095 }
00096
00097
00098 static void kblockposix_claererr(struct KBlock *b)
00099 {
00100     KBlockPosix *f = KBLOCKPOSIX_CAST(b);
00101     clearerr(f->fp);
00102 }
00103
00104
00105 static int kblockposix_close(struct KBlock *b)
00106 {
00107     KBlockPosix *f = KBLOCKPOSIX_CAST(b);
00108
00109     return fflush(f->fp) | fclose(f->fp);
00110 }
00111
00112
00113 static const KBlockVTable kblockposix_hwbuffered_vt =
00114 {
00115     .readDirect = kblockposix_readDirect,
00116
00117     .readBuf = kblockposix_readBuf,
00118     .writeBuf = kblockposix_writeBuf,
00119     .load = kblockposix_load,
00120     .store = kblockposix_store,
00121
00122     .error = kblockposix_error,
00123     .clearerr = kblockposix_claererr,
00124     .close = kblockposix_close,
00125 };
00126
00127 static const KBlockVTable kblockposix_swbuffered_vt =
00128 {
00129     .readDirect = kblockposix_readDirect,
00130     .writeDirect =kblockposix_writeDirect,
00131
00132     .readBuf = kblock_swReadBuf,
00133     .writeBuf = kblock_swWriteBuf,
00134     .load = kblock_swLoad,
00135     .store = kblock_swStore,
00136
00137     .error = kblockposix_error,
00138     .clearerr = kblockposix_claererr,
00139     .close = kblockposix_close,
00140 };
00141
00142 static const KBlockVTable kblockposix_unbuffered_vt =
00143 {
00144     .readDirect = kblockposix_readDirect,
00145     .writeDirect =kblockposix_writeDirect,
00146
00147     .error = kblockposix_error,
00148     .clearerr = kblockposix_claererr,
00149     .close = kblockposix_close,
00150 };
00151
00152
00153
00154 void kblockposix_init(KBlockPosix *f, FILE *fp, bool hwbuf, void *buf, size_t block_size, block_idx_t block_count)
00155 {
00156     ASSERT(f);
00157     ASSERT(fp);
00158     ASSERT(block_size);
00159
00160     memset(f, 0, sizeof(*f));
00161
00162     DB(f->b.priv.type = KBT_KBLOCKPOSIX);
00163
00164     f->fp = fp;
00165     f->b.blk_size = block_size;
00166     f->b.blk_cnt = block_count;
00167
00168     f->b.priv.flags |= KB_PARTIAL_WRITE;
00169     if (buf)
00170     {
00171         f->b.priv.flags |= KB_BUFFERED;
00172         f->b.priv.buf = buf;
00173         if (hwbuf)
00174             f->b.priv.vt = &kblockposix_hwbuffered_vt;
00175         else
00176             f->b.priv.vt = &kblockposix_swbuffered_vt;
00177         kblockposix_load(&f->b, 0);
00178         f->b.priv.curr_blk = 0;
00179     }
00180     else
00181         f->b.priv.vt = &kblockposix_unbuffered_vt;
00182 }


BeRTOS: kblock_posix.h File Reference

  • io
kblock_posix.h File Reference

KBlock interface on POSIX file. More...

#include "kblock.h"
#include <stdio.h>

Go to the source code of this file.

Detailed Description

KBlock interface on POSIX file.

Author:
Francesco Sacchi <batt@develer.com>
Francesco Sacchi <batt@develer.com>

Definition in file kblock_posix.h.


BeRTOS: kblock_posix.h Source File

  • io
kblock_posix.h
Go to the documentation of this file.
00001
00043 #ifndef KBLOCK_POSIX_H
00044 #define KBLOCK_POSIX_H
00045
00046 #include "kblock.h"
00047
00048 #include <stdio.h>
00049
00050 typedef struct KBlockPosix
00051 {
00052     KBlock b;
00053     FILE *fp;
00054 } KBlockPosix;
00055
00056 #define KBT_KBLOCKPOSIX MAKE_ID('K', 'B', 'F', 'L')
00057
00058
00059 INLINE KBlockPosix *KBLOCKPOSIX_CAST(KBlock *b)
00060 {
00061     ASSERT(b->priv.type == KBT_KBLOCKPOSIX);
00062     return (KBlockPosix *)b;
00063 }
00064
00065 void kblockposix_init(KBlockPosix *f, FILE *fp, bool hwbuf, void *buf, size_t block_size, block_idx_t block_count);
00066
00067 #endif /* KBLOCK_POSIX_H */


BeRTOS: kblock_ram.c File Reference

  • io
kblock_ram.c File Reference

KBlock interface on RAM memory. More...

#include "kblock_ram.h"
#include <string.h>

Go to the source code of this file.

Detailed Description

KBlock interface on RAM memory.

Author:
Francesco Sacchi <batt@develer.com>
Francesco Sacchi <batt@develer.com>

Definition in file kblock_ram.c.


BeRTOS: kblock_ram.c Source File

  • io
kblock_ram.c
Go to the documentation of this file.
00001
00044 #include "kblock_ram.h"
00045 #include <string.h>
00046
00047
00048 static int kblockram_load(KBlock *b, block_idx_t index)
00049 {
00050     KBlockRam *r = KBLOCKRAM_CAST(b);
00051     memcpy(r->b.priv.buf, r->membuf + index * r->b.blk_size, r->b.blk_size);
00052     return 0;
00053 }
00054
00055 static int kblockram_store(struct KBlock *b, block_idx_t index)
00056 {
00057     KBlockRam *r = KBLOCKRAM_CAST(b);
00058     memcpy(r->membuf + index * r->b.blk_size, r->b.priv.buf, r->b.blk_size);
00059     return 0;
00060 }
00061
00062 static size_t kblockram_readBuf(struct KBlock *b, void *buf, size_t offset, size_t size)
00063 {
00064     KBlockRam *r = KBLOCKRAM_CAST(b);
00065     memcpy(buf, (uint8_t *)r->b.priv.buf + offset, size);
00066     return size;
00067 }
00068
00069 static size_t kblockram_readDirect(struct KBlock *b, block_idx_t index, void *buf, size_t offset, size_t size)
00070 {
00071     KBlockRam *r = KBLOCKRAM_CAST(b);
00072     memcpy(buf, r->membuf + index * r->b.blk_size + offset, size);
00073     return size;
00074 }
00075
00076 static size_t kblockram_writeBuf(struct KBlock *b, const void *buf, size_t offset, size_t size)
00077 {
00078     KBlockRam *r = KBLOCKRAM_CAST(b);
00079     memcpy((uint8_t *)r->b.priv.buf + offset, buf, size);
00080     return size;
00081 }
00082
00083 static size_t kblockram_writeDirect(struct KBlock *b, block_idx_t index, const void *buf, size_t offset, size_t size)
00084 {
00085     KBlockRam *r = KBLOCKRAM_CAST(b);
00086     ASSERT(buf);
00087     ASSERT(index < b->blk_cnt);
00088
00089     memcpy(r->membuf + index * r->b.blk_size + offset, buf, size);
00090     return size;
00091 }
00092
00093 static int kblockram_dummy(UNUSED_ARG(struct KBlock *,b))
00094 {
00095     return 0;
00096 }
00097
00098 static const KBlockVTable kblockram_hwbuffered_vt =
00099 {
00100     .readDirect = kblockram_readDirect,
00101
00102     .readBuf = kblockram_readBuf,
00103     .writeBuf = kblockram_writeBuf,
00104     .load = kblockram_load,
00105     .store = kblockram_store,
00106
00107     .error = kblockram_dummy,
00108     .clearerr = (kblock_clearerr_t)kblockram_dummy,
00109     .close = kblockram_dummy,
00110 };
00111
00112
00113 static const KBlockVTable kblockram_swbuffered_vt =
00114 {
00115     .readDirect = kblockram_readDirect,
00116     .writeDirect = kblockram_writeDirect,
00117
00118     .readBuf = kblock_swReadBuf,
00119     .writeBuf = kblock_swWriteBuf,
00120     .load = kblock_swLoad,
00121     .store = kblock_swStore,
00122
00123     .error = kblockram_dummy,
00124     .clearerr = (kblock_clearerr_t)kblockram_dummy,
00125     .close = kblockram_dummy,
00126 };
00127
00128 static const KBlockVTable kblockram_unbuffered_vt =
00129 {
00130     .readDirect = kblockram_readDirect,
00131     .writeDirect = kblockram_writeDirect,
00132
00133     .error = kblockram_dummy,
00134     .clearerr = (kblock_clearerr_t)kblockram_dummy,
00135     .close = kblockram_dummy,
00136 };
00137
00138 void kblockram_init(KBlockRam *ram, void *buf, size_t size, size_t block_size, bool buffered, bool hwbuffered)
00139 {
00140     ASSERT(buf);
00141     ASSERT(size);
00142     ASSERT(block_size);
00143
00144     memset(ram, 0, sizeof(*ram));
00145
00146     DB(ram->b.priv.type = KBT_KBLOCKRAM);
00147     ram->b.blk_size = block_size;
00148     ram->b.priv.flags |= KB_PARTIAL_WRITE;
00149
00150     if (buffered)
00151     {
00152         ram->b.priv.flags |= KB_BUFFERED;
00153         ram->b.blk_cnt = (size / block_size) - 1;
00154         ram->b.priv.buf = buf;
00155         // First page used as page buffer
00156         ram->membuf = (uint8_t *)buf + block_size;
00157
00158         if (hwbuffered)
00159             ram->b.priv.vt = &kblockram_hwbuffered_vt;
00160         else
00161             ram->b.priv.vt = &kblockram_swbuffered_vt;
00162
00163         kblockram_load(&ram->b, 0);
00164     }
00165     else
00166     {
00167         ram->b.blk_cnt = (size / block_size);
00168         ram->membuf = (uint8_t *)buf;
00169         ram->b.priv.vt = &kblockram_unbuffered_vt;
00170     }
00171 }


BeRTOS: kblock_ram.h File Reference

  • io
kblock_ram.h File Reference

KBlock interface. More...

#include "kblock.h"

Go to the source code of this file.

Detailed Description

KBlock interface.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file kblock_ram.h.


BeRTOS: kblock_ram.h Source File

  • io
kblock_ram.h
Go to the documentation of this file.
00001
00038 #ifndef KBLOCK_RAM_H
00039 #define KBLOCK_RAM_H
00040
00041 #include "kblock.h"
00042
00043
00044 typedef struct KBlockRam
00045 {
00046     KBlock b;
00047     uint8_t *membuf;
00048 } KBlockRam;
00049
00050 #define KBT_KBLOCKRAM MAKE_ID('K', 'B', 'R', 'M')
00051
00052
00053 INLINE KBlockRam *KBLOCKRAM_CAST(KBlock *b)
00054 {
00055     ASSERT(b->priv.type == KBT_KBLOCKRAM);
00056     return (KBlockRam *)b;
00057 }
00058
00059 void kblockram_init(KBlockRam *ram, void *buf, size_t size, size_t block_size, bool buffered, bool hwbuffered);
00060
00061 #endif /* KBLOCK_RAM_H */


BeRTOS: kdebug.c File Reference

  • drv
Functions
kdebug.c File Reference

General pourpose debug support for embedded systems (implementation). More...

#include "cfg/cfg_debug.h"
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <cfg/os.h>
#include <cpu/attr.h>
#include <cpu/types.h>
#include <mware/formatwr.h>
#include <cpu/pgm.h>
#include <PP_STRINGIZE(drv/PP_CAT3(kdebug, _, CPU_ID).c)>

Go to the source code of this file.

Functions

static void | __kputchar (char c, UNUSED_ARG(void *, unused))
Output one character to the debug console.
int | kputnum (int num)
Cheap function to print small integers without using printf().
void | kdump (const void *_buf, size_t len)
Dump binary data in hex.

Detailed Description

General pourpose debug support for embedded systems (implementation).

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file kdebug.c.


BeRTOS: kdebug.c Source File

  • drv
kdebug.c
Go to the documentation of this file.
00001
00039 #include "cfg/cfg_debug.h"
00040 #include <cfg/macros.h> /* for BV() */
00041 #include <cfg/debug.h>
00042 #include <cfg/os.h>
00043
00044 #include <cpu/attr.h>
00045 #include <cpu/types.h>
00046
00047 #include <mware/formatwr.h> /* for _formatted_write() */
00048 #include <cpu/pgm.h>
00049
00050 #ifdef _DEBUG
00051
00052 #if CPU_HARVARD && !defined(_PROGMEM)
00053     #error This module build correctly only in program memory!
00054 #endif
00055
00056
00057 #if OS_HOSTED
00058     #include <unistd.h> // write()
00059
00060     #define KDBG_WAIT_READY()      do { /*nop*/ } while(0)
00061     #define KDBG_WRITE_CHAR(c)     do { char __c = (c); write(STDERR_FILENO, &__c, sizeof(__c)); } while(0)
00062     #define KDBG_MASK_IRQ(old)     do { (void)(old); } while(0)
00063     #define KDBG_RESTORE_IRQ(old)  do { /*nop*/ } while(0)
00064     typedef char kdbg_irqsave_t; /* unused */
00065
00066     #define kdbg_hw_init() do {} while (0) ///< Not needed
00067
00068     #if CONFIG_KDEBUG_PORT == 666
00069         #error BITBANG debug console missing for this platform
00070     #endif
00071 #else
00072     #include CPU_CSOURCE(kdebug)
00073 #endif
00074
00075
00076 void kdbg_init(void)
00077 {
00078     /* Init debug hw */
00079     kdbg_hw_init();
00080     kputs("\n\n*** BeRTOS DBG START ***\n");
00081 }
00082
00083
00087 static void __kputchar(char c, UNUSED_ARG(void *, unused))
00088 {
00089     /* Poll while serial buffer is still busy */
00090     KDBG_WAIT_READY();
00091
00092     /* Send '\n' as '\r\n' for dumb terminals */
00093     if (c == '\n')
00094     {
00095         KDBG_WRITE_CHAR('\r');
00096         KDBG_WAIT_READY();
00097     }
00098
00099     KDBG_WRITE_CHAR(c);
00100 }
00101
00102
00103 void kputchar(char c)
00104 {
00105     /* Mask serial TX intr */
00106     kdbg_irqsave_t irqsave;
00107     KDBG_MASK_IRQ(irqsave);
00108
00109     __kputchar(c, 0);
00110
00111     /* Restore serial TX intr */
00112     KDBG_RESTORE_IRQ(irqsave);
00113 }
00114
00115
00116 static void PGM_FUNC(kvprintf)(const char * PGM_ATTR fmt, va_list ap)
00117 {
00118 #if CONFIG_PRINTF
00119     /* Mask serial TX intr */
00120     kdbg_irqsave_t irqsave;
00121     KDBG_MASK_IRQ(irqsave);
00122
00123     PGM_FUNC(_formatted_write)(fmt, __kputchar, 0, ap);
00124
00125     /* Restore serial TX intr */
00126     KDBG_RESTORE_IRQ(irqsave);
00127 #else
00128     /* A better than nothing printf() surrogate. */
00129     PGM_FUNC(kputs)(fmt);
00130 #endif /* CONFIG_PRINTF */
00131 }
00132
00133 void PGM_FUNC(kprintf)(const char * PGM_ATTR fmt, ...)
00134 {
00135     va_list ap;
00136
00137     va_start(ap, fmt);
00138     PGM_FUNC(kvprintf)(fmt, ap);
00139     va_end(ap);
00140 }
00141
00142 void PGM_FUNC(kputs)(const char * PGM_ATTR str)
00143 {
00144     char c;
00145
00146     /* Mask serial TX intr */
00147     kdbg_irqsave_t irqsave;
00148     KDBG_MASK_IRQ(irqsave);
00149
00150     while ((c = PGM_READ_CHAR(str++)))
00151         __kputchar(c, 0);
00152
00153     KDBG_RESTORE_IRQ(irqsave);
00154 }
00155
00156
00160 int kputnum(int num)
00161 {
00162     int output_len = 0;
00163     int divisor = 10000;
00164     int digit;
00165
00166     do
00167     {
00168         digit = num / divisor;
00169         num %= divisor;
00170
00171         if (digit || output_len || divisor == 1)
00172         {
00173             kputchar(digit + '0');
00174             ++output_len;
00175         }
00176     }
00177     while (divisor /= 10);
00178
00179     return output_len;
00180 }
00181
00182
00183 static void klocation(const char * PGM_ATTR file, int line)
00184 {
00185     PGM_FUNC(kputs)(file);
00186     kputchar(':');
00187     kputnum(line);
00188     PGM_FUNC(kputs)(PGM_STR(": "));
00189 }
00190
00191 int PGM_FUNC(__bassert)(const char * PGM_ATTR cond, const char * PGM_ATTR file, int line)
00192 {
00193     klocation(file, line);
00194     PGM_FUNC(kputs)(PGM_STR("Assertion failed: "));
00195     PGM_FUNC(kputs)(cond);
00196     kputchar('\n');
00197     BREAKPOINT;
00198     return 1;
00199 }
00200
00201 /*
00202  * Unfortunately, there's no way to get __func__ in
00203  * program memory, so we waste quite a lot of RAM in
00204  * AVR and other Harvard processors.
00205  */
00206 void PGM_FUNC(__trace)(const char *name)
00207 {
00208     PGM_FUNC(kprintf)(PGM_STR("%s()\n"), name);
00209 }
00210
00211 void PGM_FUNC(__tracemsg)(const char *name, const char * PGM_ATTR fmt, ...)
00212 {
00213     va_list ap;
00214
00215     PGM_FUNC(kprintf)(PGM_STR("%s(): "), name);
00216     va_start(ap, fmt);
00217     PGM_FUNC(kvprintf)(fmt, ap);
00218     va_end(ap);
00219     kputchar('\n');
00220 }
00221
00222 int PGM_FUNC(__invalid_ptr)(void *value, const char * PGM_ATTR name, const char * PGM_ATTR file, int line)
00223 {
00224     klocation(file, line);
00225     PGM_FUNC(kputs)(PGM_STR("Invalid ptr: "));
00226     PGM_FUNC(kputs)(name);
00227     #if CONFIG_PRINTF
00228         PGM_FUNC(kprintf)(PGM_STR(" = 0x%p\n"), value);
00229     #else
00230         (void)value;
00231         kputchar('\n');
00232     #endif
00233     return 1;
00234 }
00235
00236
00237 void __init_wall(long *wall, int size)
00238 {
00239     while(size--)
00240         *wall++ = WALL_VALUE;
00241 }
00242
00243
00244 int PGM_FUNC(__check_wall)(long *wall, int size, const char * PGM_ATTR name, const char * PGM_ATTR file, int line)
00245 {
00246     int i, fail = 0;
00247
00248     for (i = 0; i < size; i++)
00249     {
00250         if (wall[i] != WALL_VALUE)
00251         {
00252             klocation(file, line);
00253             PGM_FUNC(kputs)(PGM_STR("Wall broken: "));
00254             PGM_FUNC(kputs)(name);
00255             #if CONFIG_PRINTF
00256                 PGM_FUNC(kprintf)(PGM_STR("[%d] (0x%p) = 0x%lx\n"), i, wall + i, wall[i]);
00257             #else
00258                 kputchar('\n');
00259             #endif
00260             fail = 1;
00261         }
00262     }
00263
00264     return fail;
00265 }
00266
00267
00268 #if CONFIG_PRINTF
00269
00273 void kdump(const void *_buf, size_t len)
00274 {
00275     const unsigned char *buf = (const unsigned char *)_buf;
00276
00277     kprintf("Dumping buffer at addr [%p], %zu bytes", buf, len);
00278     size_t i=0;
00279     while (len--)
00280     {
00281         if ((i++ % 16) == 0)
00282             kputs("\n");
00283         kprintf("%02X ", *buf++);
00284     }
00285     kputchar('\n');
00286 }
00287
00288 #endif /* CONFIG_PRINTF */
00289
00290 #endif /* _DEBUG */


BeRTOS: kdebug_arm.c File Reference

  • cpu
  • arm
  • drv
kdebug_arm.c File Reference

Low-level kdebug module for ARM (inplementation). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level kdebug module for ARM (inplementation).

Author:
Francesco Sacchi <batt@develer.com>

Definition in file kdebug_arm.c.


BeRTOS: kdebug_arm.c Source File

  • cpu
  • arm
  • drv
kdebug_arm.c
Go to the documentation of this file.
00001
00039 #include <cpu/detect.h>
00040
00041 #if CPU_ARM_AT91
00042     #include "kdebug_at91.c"
00043 #elif CPU_ARM_LPC2
00044     #include "kdebug_lpc2.c"
00045 /*#elif  Add other ARM families here */
00046 #else
00047     #error Unknown CPU
00048 #endif


BeRTOS: kdebug_at91.c File Reference

  • cpu
  • arm
  • drv
kdebug_at91.c File Reference

ARM debug support (implementation). More...

#include "kdebug_at91.h"
#include <hw/hw_cpufreq.h>
#include "hw/hw_ser.h"
#include "cfg/cfg_debug.h"
#include <cfg/macros.h>
#include <io/arm.h>

Go to the source code of this file.

Detailed Description

ARM debug support (implementation).

Author:
Francesco Sacchi <batt@develer.com>

Definition in file kdebug_at91.c.


BeRTOS: kdebug_at91.c Source File

  • cpu
  • arm
  • drv
kdebug_at91.c
Go to the documentation of this file.
00001
00038 #include "kdebug_at91.h"
00039 #include <hw/hw_cpufreq.h>     /* for CPU_FREQ */
00040 #include "hw/hw_ser.h"     /* Required for bus macros overrides */
00041
00042 #include "cfg/cfg_debug.h"
00043 #include <cfg/macros.h> /* for BV(), DIV_ROUND */
00044
00045 #include <io/arm.h>
00046
00047 #if CONFIG_KDEBUG_PORT == KDEBUG_PORT_DBGU
00048     #define KDBG_WAIT_READY()     while (!(DBGU_SR & BV(US_TXRDY))) {}
00049     #define KDBG_WAIT_TXDONE()    while (!(DBGU_SR & BV(US_TXEMPTY))) {}
00050
00051     #define KDBG_WRITE_CHAR(c)    do { DBGU_THR = (c); } while(0)
00052
00053     /* Debug unit is used only for debug purposes so does not generate interrupts. */
00054     #define KDBG_MASK_IRQ(old)    do { (void)old; } while(0)
00055
00056     /* Debug unit is used only for debug purposes so does not generate interrupts. */
00057     #define KDBG_RESTORE_IRQ(old) do { (void)old; } while(0)
00058
00059     typedef uint32_t kdbg_irqsave_t;
00060
00061 #else
00062     #error CONFIG_KDEBUG_PORT should be KDEBUG_PORT_DBGU
00063 #endif
00064
00065
00066 INLINE void kdbg_hw_init(void)
00067 {
00068     #if CONFIG_KDEBUG_PORT == KDEBUG_PORT_DBGU
00069         /* Disable all DBGU interrupts. */
00070         DBGU_IDR =  0xFFFFFFFF;
00071         /* Reset DBGU */
00072         DBGU_CR =  BV(US_RSTRX) | BV(US_RSTTX) | BV(US_RXDIS) | BV(US_TXDIS);
00073         /* Set baudrate */
00074         DBGU_BRGR = DIV_ROUND(CPU_FREQ, 16 * CONFIG_KDEBUG_BAUDRATE);
00075         /* Set DBGU mode to 8 data bits, no parity and 1 stop bit. */
00076         DBGU_MR =  US_CHMODE_NORMAL | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1;
00077         /* Enable DBGU transmitter. */
00078         DBGU_CR = BV(US_TXEN);
00079         /* Disable PIO on DGBU tx pin. */
00080         PIOA_PDR = BV(DTXD);
00081         PIOA_ASR = BV(DTXD);
00082
00083         #if 0 /* Disable Rx for now */
00084         /* Enable DBGU receiver. */
00085         DBGU_CR = BV(US_RXEN);
00086         /* Disable PIO on DGBU rx pin. */
00087         PIOA_PDR = BV(DRXD);
00088         PIOA_ASR = BV(DRXD);
00089         #endif
00090     #else
00091         #error CONFIG_KDEBUG_PORT should be KDEBUG_PORT_DBGU
00092     #endif /* CONFIG_KDEBUG_PORT == KDEBUG_PORT_DBGU */
00093 }


BeRTOS: kdebug_at91.h File Reference

  • cpu
  • arm
  • drv
kdebug_at91.h File Reference

ARM debug support (interface). More...

Go to the source code of this file.

Defines

Values for CONFIG_KDEBUG_PORT.

Select which hardware UART to use for system debug.

#define | KDEBUG_PORT_DBGU 0
Debug on Debug Unit.
#define | KDEBUG_PORT_DEFAULT KDEBUG_PORT_DBGU
Default debug port.

Detailed Description

ARM debug support (interface).

Author:
Francesco Sacchi <batt@develer.com>

Definition in file kdebug_at91.h.


BeRTOS: kdebug_at91.h Source File

  • cpu
  • arm
  • drv
kdebug_at91.h
Go to the documentation of this file.
00001
00039 #ifndef DRV_KDEBUG_AT91_H
00040 #define DRV_KDEBUG_AT91_H
00041
00049 #define KDEBUG_PORT_DBGU 0  ///< Debug on Debug Unit.
00050
00051 #define KDEBUG_PORT_DEFAULT KDEBUG_PORT_DBGU  ///< Default debug port.
00052 /* \} */
00053
00054 #endif /* DRV_KDEBUG_AT91_H */


BeRTOS: kdebug_avr.c File Reference

  • cpu
  • avr
  • drv
kdebug_avr.c File Reference

Low-level kdebug module for AVR (inplementation). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level kdebug module for AVR (inplementation).

Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file kdebug_avr.c.


BeRTOS: kdebug_avr.c Source File

  • cpu
  • avr
  • drv
kdebug_avr.c
Go to the documentation of this file.
00001
00039 #include <cpu/detect.h>
00040
00041 #if CPU_AVR_MEGA
00042     #include "kdebug_mega.c"
00043 #elif CPU_AVR_XMEGA
00044     #include "kdebug_xmega.c"
00045 #else
00046     #error Unknown CPU
00047 #endif


BeRTOS: kdebug_cm3.c File Reference

  • cpu
  • cortex-m3
  • drv
kdebug_cm3.c File Reference

Low-level kdebug module for Cortex-M3 (inplementation). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level kdebug module for Cortex-M3 (inplementation).

Author:
Francesco Sacchi <batt@develer.com>

Definition in file kdebug_cm3.c.


BeRTOS: kdebug_cm3.c Source File

  • cpu
  • cortex-m3
  • drv
kdebug_cm3.c
Go to the documentation of this file.
00001
00038 #include <cpu/detect.h>
00039
00040 #if CPU_CM3_LM3S
00041     #include "kdebug_lm3s.c"
00042 #elif CPU_CM3_STM32
00043     #include "kdebug_stm32.c"
00044 #elif CPU_CM3_SAM3
00045     #include "kdebug_sam3.c"
00046 /*#elif  Add other families here */
00047 #else
00048     #error Unknown CPU
00049 #endif


BeRTOS: kdebug_dsp56k.c File Reference

  • cpu
  • dsp56k
  • drv
kdebug_dsp56k.c File Reference

General pourpose debug support for embedded systems (implementation). More...

#include <stdio.h>

Go to the source code of this file.

Detailed Description

General pourpose debug support for embedded systems (implementation).

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file kdebug_dsp56k.c.


BeRTOS: kdebug_dsp56k.c Source File

  • cpu
  • dsp56k
  • drv
kdebug_dsp56k.c
Go to the documentation of this file.
00001
00040 #error Revise me!
00041
00042 /* Debugging go through the JTAG interface. The MSL library already
00043     implements the console I/O correctly. */
00044 #include <stdio.h>
00045 #define KDBG_WAIT_READY()         do { } while (0)
00046 #define KDBG_WRITE_CHAR(c)        __put_char(c, stdout)
00047 #define KDBG_MASK_IRQ(old)        do { (void)(old); } while (0)
00048 #define KDBG_RESTORE_IRQ(old)     do { (void)(old); } while (0)
00049 typedef uint8_t kdbg_irqsave_t; /* unused */
00050 #if CONFIG_KDEBUG_PORT == 666
00051     #error BITBANG debug console missing for this platform
00052
00053 #define kdbg_hw_init() do {} while (0) ///< Not needed


BeRTOS: kdebug_i196.c File Reference

  • cpu
  • i196
  • drv
kdebug_i196.c File Reference

General pourpose debug support for embedded systems (implementation). More...

#include <cfg/debug.h>
#include <cfg/macros.h>
#include <appconfig.h>
#include <hw/hw_cpufreq.h>
#include <hw_ser.h>
#include "Util196.h"

Go to the source code of this file.

Detailed Description

General pourpose debug support for embedded systems (implementation).

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file kdebug_i196.c.


BeRTOS: kdebug_i196.c Source File

  • cpu
  • i196
  • drv
kdebug_i196.c
Go to the documentation of this file.
00001
00040 #error Revise me!
00041
00042 #include <cfg/debug.h>
00043 #include <cfg/macros.h> /* for BV() */
00044 #include <appconfig.h>
00045 #include <hw/hw_cpufreq.h>     /* for CPU_FREQ */
00046 #include <hw_ser.h>     /* Required for bus macros overrides */
00047
00048
00049 #include "Util196.h"
00050 #define KDBG_WAIT_READY()      do {} while (!(SP_STAT & (SPSF_TX_EMPTY | SPSF_TX_INT)))
00051 #define KDBG_WRITE_CHAR(c)     do { SBUF = (c); } while(0)
00052 #define KDBG_MASK_IRQ(old) \
00053     do { \
00054         (old) = INT_MASK1 & INT1F_TI; \
00055         INT_MASK1 &= ~INT1F_TI; \
00056     } while(0)
00057 #define KDBG_RESTORE_IRQ(old)  do { INT_MASK1 |= (old); }
00058 typedef uint16_t kdbg_irqsave_t; /* FIXME: unconfirmed */
00059
00060 #if CONFIG_KDEBUG_PORT == 666
00061     #error BITBANG debug console missing for this platform
00062 #endif
00063
00064
00065 INLINE void kdbg_hw_init(void)
00066 {
00067     /* Set serial port for 19200bps 8N1 */
00068     INT_MASK1 &= ~(INT1F_TI | INT1F_RI);
00069     SP_CON = SPCF_RECEIVE_ENABLE | SPCF_MODE1;
00070     ioc1_img |= IOC1F_TXD_SEL | IOC1F_EXTINT_SRC;
00071     IOC1 = ioc1_img;
00072     BAUD_RATE = 0x33;
00073     BAUD_RATE = 0x80;
00074 }


BeRTOS: kdebug_lm3s.c File Reference

  • cpu
  • cortex-m3
  • drv
kdebug_lm3s.c File Reference

LM3S debug support (implementation). More...

#include <cfg/cfg_debug.h>
#include <cfg/macros.h>
#include <drv/clock_lm3s.h>
#include <drv/gpio_lm3s.h>
#include <drv/ser_lm3s.h>
#include "kdebug_lm3s.h"

Go to the source code of this file.

Detailed Description

LM3S debug support (implementation).

Author:
Andrea Righi <arighi@develer.com>

Definition in file kdebug_lm3s.c.


BeRTOS: kdebug_lm3s.c Source File

  • cpu
  • cortex-m3
  • drv
kdebug_lm3s.c
Go to the documentation of this file.
00001
00038 #include <cfg/cfg_debug.h>
00039 #include <cfg/macros.h> /* for BV() */
00040 #include <drv/clock_lm3s.h> /* lm3s_busyWait() */
00041 #include <drv/gpio_lm3s.h>
00042 #include <drv/ser_lm3s.h>
00043 #include "kdebug_lm3s.h"
00044
00045 #if CONFIG_KDEBUG_PORT == 0
00046     #define UART_BASE UART0_BASE
00047     #define UART_GPIO_BASE GPIO_PORTA_BASE
00048     #define UART_PINS (BV(1) | BV(0))
00049     #define UART_REG_SYSCTL SYSCTL_RCGC2_GPIOA
00050 #elif CONFIG_KDEBUG_PORT == 1
00051     #define UART_BASE UART1_BASE
00052     #define UART_GPIO_BASE GPIO_PORTD_BASE
00053     #define UART_PINS (BV(3) | BV(2))
00054     #define UART_REG_SYSCTL SYSCTL_RCGC2_GPIOD
00055 #elif CONFIG_KDEBUG_PORT == 2
00056     #define UART_BASE UART2_BASE
00057     #define UART_GPIO_BASE GPIO_PORTG_BASE
00058     #define UART_PINS (BV(1) | BV(0))
00059     #define UART_REG_SYSCTL SYSCTL_RCGC2_GPIOG
00060 #else
00061     #error "UART port not supported in this board"
00062 #endif
00063
00064 #define KDBG_WAIT_READY()     while (!lm3s_uartReady(UART_BASE)) {}
00065 #define KDBG_WAIT_TXDONE()    while (!lm3s_uartTxDone(UART_BASE)) {}
00066
00067 #define KDBG_WRITE_CHAR(c)    do { lm3s_uartPutCharNonBlocking(UART_BASE, c); } while(0)
00068
00069 /* Debug unit is used only for debug purposes so does not generate interrupts. */
00070 #define KDBG_MASK_IRQ(old)    do { (void)old; } while(0)
00071
00072 /* Debug unit is used only for debug purposes so does not generate interrupts. */
00073 #define KDBG_RESTORE_IRQ(old) do { (void)old; } while(0)
00074
00075 typedef uint32_t kdbg_irqsave_t;
00076
00077 INLINE void uart_hw_config(void)
00078 {
00079     unsigned long div, baud = CONFIG_KDEBUG_BAUDRATE;
00080     bool hi_speed = false;
00081
00082     if (baud * 16 > CPU_FREQ)
00083     {
00084         hi_speed = true;
00085         baud /= 2;
00086     }
00087     div = (CPU_FREQ * 8 / baud + 1) / 2;
00088
00089     lm3s_uartDisable(UART_BASE);
00090     if (hi_speed)
00091         HWREG(UART_BASE + UART_O_CTL) |= UART_CTL_HSE;
00092     else
00093         HWREG(UART_BASE + UART_O_CTL) &= ~UART_CTL_HSE;
00094     /* Set the baud rate */
00095     HWREG(UART_BASE + UART_O_IBRD) = div / 64;
00096     HWREG(UART_BASE + UART_O_FBRD) = div % 64;
00097     /* Set word lenght and parity */
00098     HWREG(UART_BASE + UART_O_LCRH) = UART_LCRH_WLEN_8;
00099     lm3s_uartClear(UART_BASE);
00100     lm3s_uartEnable(UART_BASE);
00101 }
00102
00103 INLINE void kdbg_hw_init(void)
00104 {
00105     uint32_t reg_clock = 1 << CONFIG_KDEBUG_PORT;
00106
00107     /* Enable the peripheral clock */
00108     SYSCTL_RCGC1_R |= reg_clock;
00109     SYSCTL_RCGC2_R |= UART_REG_SYSCTL;
00110     lm3s_busyWait(512);
00111
00112     /* Configure GPIO pins to work as UART pins */
00113     lm3s_gpioPinConfig(UART_GPIO_BASE, UART_PINS,
00114             GPIO_DIR_MODE_HW, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
00115
00116     /* Low-level UART configuration */
00117     uart_hw_config();
00118 }


BeRTOS: kdebug_lm3s.h File Reference

  • cpu
  • cortex-m3
  • drv
Defines
kdebug_lm3s.h File Reference

LM3S debug support (interface). More...

Go to the source code of this file.

Defines

#define KDEBUG_PORT_DEFAULT 0
Default debug port.

Detailed Description

LM3S debug support (interface).

Author:
Andrea Righi <arighi@develer.com>

Definition in file kdebug_lm3s.h.


BeRTOS: kdebug_lm3s.h Source File

  • cpu
  • cortex-m3
  • drv
kdebug_lm3s.h
Go to the documentation of this file.
00001
00038 #ifndef DRV_KDEBUG_LM3S_H
00039 #define DRV_KDEBUG_LM3S_H
00040
00041 #define KDEBUG_PORT_DEFAULT 0  ///< Default debug port.
00042 /* \} */
00043
00044 #endif /* DRV_KDEBUG_LM3S_H */


BeRTOS: kdebug_lpc2.c File Reference

  • cpu
  • arm
  • drv
kdebug_lpc2.c File Reference

ARM debug support (implementation). More...

#include <hw/hw_cpufreq.h>
#include "hw/hw_ser.h"
#include "cfg/cfg_debug.h"
#include <cfg/macros.h>
#include <io/lpc23xx.h>

Go to the source code of this file.

Detailed Description

ARM debug support (implementation).

Author:
Francesco Sacchi <batt@develer.com>

Definition in file kdebug_lpc2.c.


BeRTOS: kdebug_lpc2.c Source File

  • cpu
  • arm
  • drv
kdebug_lpc2.c
Go to the documentation of this file.
00001
00038 #include <hw/hw_cpufreq.h>     /* for CPU_FREQ */
00039 #include "hw/hw_ser.h"     /* Required for bus macros overrides */
00040
00041 #include "cfg/cfg_debug.h"
00042 #include <cfg/macros.h> /* for BV(), DIV_ROUND */
00043
00044 #include <io/lpc23xx.h>
00045
00046 #if CONFIG_KDEBUG_PORT == 0
00047     #define KDBG_WAIT_READY()     while (!(U0LSR & BV(5))) {}
00048     #define KDBG_WAIT_TXDONE()    while (!(U0LSR & BV(6))) {}
00049
00050     #define KDBG_WRITE_CHAR(c)    do { U0THR = (c); } while(0)
00051
00052     #define KDBG_MASK_IRQ(old)    do { \
00053         (old) = U0IER; \
00054         U0IER &= ~BV(1); \
00055     } while(0)
00056
00057     #define KDBG_RESTORE_IRQ(old) do { \
00058         KDBG_WAIT_TXDONE(); \
00059         U0IER = (old); \
00060     } while(0)
00061
00062     typedef uint32_t kdbg_irqsave_t;
00063
00064 #else
00065     #error CONFIG_KDEBUG_PORT should be 0
00066 #endif
00067
00068
00069 INLINE void kdbg_hw_init(void)
00070 {
00071     #if CONFIG_KDEBUG_PORT == 0
00072         /* Enable clock for UART0 */
00073         PCONP = BV(3);
00074         /* Set UART0 clk to CPU_FREQ */
00075         PCLKSEL0 &= ~0xC0;
00076         PCLKSEL0 |= 0x40;
00077         /* Set 8bit, 1 stop bit, no parity, DLAB = 1 (enable divisor modify) */
00078         U0LCR = 0x83;
00079         U0DLL = DIV_ROUND(CPU_FREQ, 16 * CONFIG_KDEBUG_BAUDRATE) & 0xFF;
00080         U0DLM = (DIV_ROUND(CPU_FREQ, 16 * CONFIG_KDEBUG_BAUDRATE) >> 8) & 0xFF;
00081         U0FDR = 0x10;
00082         /* Assign TX pin to UART0*/
00083         PINSEL0 &= ~0x30;
00084         PINSEL0 |= 0x10;
00085         /* Set 8bit, 1 stop bit, no parity, DLAB = 0 (disable divisor modify) */
00086         U0LCR = 0x03;
00087         /* Enable transmitter */
00088         U0TER = BV(7);
00089     #else
00090         #error CONFIG_KDEBUG_PORT should be 0
00091     #endif /* CONFIG_KDEBUG_PORT == 0 */
00092 }


BeRTOS: kdebug_mega.c File Reference

  • cpu
  • avr
  • drv
kdebug_mega.c File Reference

AVR debug support (implementation). More...

#include <hw/hw_cpufreq.h>
#include "hw/hw_ser.h"
#include "cfg/cfg_debug.h"
#include <cfg/macros.h>
#include <cpu/types.h>
#include <cpu/attr.h>
#include <avr/io.h>

Go to the source code of this file.

Detailed Description

AVR debug support (implementation).

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>
Francesco Sacchi <batt@develer.com>

Definition in file kdebug_mega.c.


BeRTOS: kdebug_mega.c Source File

  • cpu
  • avr
  • drv
kdebug_mega.c
Go to the documentation of this file.
00001
00041 #include <hw/hw_cpufreq.h>     /* for CPU_FREQ */
00042 #include "hw/hw_ser.h"     /* Required for bus macros overrides */
00043
00044 #include "cfg/cfg_debug.h"
00045 #include <cfg/macros.h> /* for BV(), DIV_ROUND */
00046
00047 #include <cpu/types.h>
00048 #include <cpu/attr.h>
00049
00050 #include <avr/io.h>
00051
00052 #if CONFIG_KDEBUG_PORT == 0
00053
00054     /*
00055      * Support for special bus policies or external transceivers
00056      * on UART0 (to be overridden in "hw/hw_ser.h").
00057      *
00058      * HACK: if we don't set TXEN, kdbg disables the transmitter
00059      * after each output statement until the serial driver
00060      * is initialized.  These glitches confuse the debug
00061      * terminal that ends up printing some trash.
00062      */
00063     #ifndef KDBG_UART0_BUS_INIT
00064     #define KDBG_UART0_BUS_INIT  do { \
00065             UCR = BV(TXEN0); \
00066         } while (0)
00067     #endif
00068     #ifndef KDBG_UART0_BUS_RX
00069     #define KDBG_UART0_BUS_RX    do {} while (0)
00070     #endif
00071     #ifndef KDBG_UART0_BUS_TX
00072     #define KDBG_UART0_BUS_TX    do {} while (0)
00073     #endif
00074
00075     #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 \
00076         || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA2560
00077         #define UCR UCSR0B
00078         #define UDR UDR0
00079         #define USR UCSR0A
00080     #elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32
00081         #define UCR    UCSRB
00082         #define USR    UCSRA
00083         #define TXEN0  TXEN
00084         #define UDRE0  UDRE
00085         #define TXC0   TXC
00086         #define TXCIE0 TXCIE
00087         #define UDRIE0 UDRIE
00088     #else
00089         #error Unknown CPU
00090     #endif
00091
00092     #define KDBG_WAIT_READY()     do { loop_until_bit_is_set(USR, UDRE0); } while(0)
00093     #define KDBG_WAIT_TXDONE()    do { loop_until_bit_is_set(USR, TXC0); } while(0)
00094
00095     /*
00096      * We must clear the TXC flag before sending a new character to allow
00097      * KDBG_WAIT_TXDONE() to work properly.
00098      *
00099      * BUG: if KDBG_WRITE_CHAR() is called after the TXC flag is set by hardware,
00100      * a new TXC could be generated after we've cleared it and before the new
00101      * character is written to UDR.  On a 485 bus, the transceiver will be put
00102      * in RX mode while still transmitting the last char.
00103      */
00104     #define KDBG_WRITE_CHAR(c)    do { USR |= BV(TXC0); UDR = (c); } while(0)
00105
00106     #define KDBG_MASK_IRQ(old)    do { \
00107         (old) = UCR; \
00108         UCR |= BV(TXEN0); \
00109         UCR &= ~(BV(TXCIE0) | BV(UDRIE0)); \
00110         KDBG_UART0_BUS_TX; \
00111     } while(0)
00112
00113     #define KDBG_RESTORE_IRQ(old) do { \
00114         KDBG_WAIT_TXDONE(); \
00115         KDBG_UART0_BUS_RX; \
00116         UCR = (old); \
00117     } while(0)
00118
00119     typedef uint8_t kdbg_irqsave_t;
00120
00121 #elif CONFIG_KDEBUG_PORT == 1
00122
00123     /*
00124      * Support for special bus policies or external transceivers
00125      * on UART1 (to be overridden in "hw/hw_ser.h").
00126      *
00127      * HACK: if we don't set TXEN, kdbg disables the transmitter
00128      * after each output statement until the serial driver
00129      * is initialized.  These glitches confuse the debug
00130      * terminal that ends up printing some trash.
00131      */
00132     #ifndef KDBG_UART1_BUS_INIT
00133     #define KDBG_UART1_BUS_INIT  do { \
00134             UCSR1B = BV(TXEN1); \
00135         } while (0)
00136     #endif
00137     #ifndef KDBG_UART1_BUS_RX
00138     #define KDBG_UART1_BUS_RX    do {} while (0)
00139     #endif
00140     #ifndef KDBG_UART1_BUS_TX
00141     #define KDBG_UART1_BUS_TX    do {} while (0)
00142     #endif
00143
00144     #define KDBG_WAIT_READY()     do { loop_until_bit_is_set(UCSR1A, UDRE1); } while(0)
00145     #define KDBG_WAIT_TXDONE()    do { loop_until_bit_is_set(UCSR1A, TXC1); } while(0)
00146     #define KDBG_WRITE_CHAR(c)    do { UCSR1A |= BV(TXC1); UDR1 = (c); } while(0)
00147
00148     #define KDBG_MASK_IRQ(old)    do { \
00149         (old) = UCSR1B; \
00150         UCSR1B |= BV(TXEN1); \
00151         UCSR1B &= ~(BV(TXCIE1) | BV(UDRIE1)); \
00152         KDBG_UART1_BUS_TX; \
00153     } while(0)
00154
00155     #define KDBG_RESTORE_IRQ(old) do { \
00156         KDBG_WAIT_TXDONE(); \
00157         KDBG_UART1_BUS_RX; \
00158         UCSR1B = (old); \
00159     } while(0)
00160
00161     typedef uint8_t kdbg_irqsave_t;
00162
00163 #elif CONFIG_KDEBUG_PORT == 2
00164
00165     /*
00166      * Support for special bus policies or external transceivers
00167      * on UART2 (to be overridden in "hw/hw_ser.h").
00168      *
00169      * HACK: if we don't set TXEN, kdbg disables the transmitter
00170      * after each output statement until the serial driver
00171      * is initialized.  These glitches confuse the debug
00172      * terminal that ends up printing some trash.
00173      */
00174     #ifndef KDBG_UART2_BUS_INIT
00175     #define KDBG_UART2_BUS_INIT  do { \
00176             UCSR2B = BV(TXEN2); \
00177         } while (0)
00178     #endif
00179     #ifndef KDBG_UART2_BUS_RX
00180     #define KDBG_UART2_BUS_RX    do {} while (0)
00181     #endif
00182     #ifndef KDBG_UART2_BUS_TX
00183     #define KDBG_UART2_BUS_TX    do {} while (0)
00184     #endif
00185
00186     #define KDBG_WAIT_READY()     do { loop_until_bit_is_set(UCSR2A, UDRE2); } while(0)
00187     #define KDBG_WAIT_TXDONE()    do { loop_until_bit_is_set(UCSR2A, TXC2); } while(0)
00188     #define KDBG_WRITE_CHAR(c)    do { UCSR2A |= BV(TXC2); UDR2 = (c); } while(0)
00189
00190     #define KDBG_MASK_IRQ(old)    do { \
00191         (old) = UCSR2B; \
00192         UCSR2B |= BV(TXEN2); \
00193         UCSR2B &= ~(BV(TXCIE2) | BV(UDRIE2)); \
00194         KDBG_UART2_BUS_TX; \
00195     } while(0)
00196
00197     #define KDBG_RESTORE_IRQ(old) do { \
00198         KDBG_WAIT_TXDONE(); \
00199         KDBG_UART2_BUS_RX; \
00200         UCSR2B = (old); \
00201     } while(0)
00202
00203     typedef uint8_t kdbg_irqsave_t;
00204
00205 #elif CONFIG_KDEBUG_PORT == 3
00206
00207     /*
00208      * Support for special bus policies or external transceivers
00209      * on UART3 (to be overridden in "hw/hw_ser.h").
00210      *
00211      * HACK: if we don't set TXEN, kdbg disables the transmitter
00212      * after each output statement until the serial driver
00213      * is initialized.  These glitches confuse the debug
00214      * terminal that ends up printing some trash.
00215      */
00216     #ifndef KDBG_UART3_BUS_INIT
00217     #define KDBG_UART3_BUS_INIT  do { \
00218             UCSR3B = BV(TXEN3); \
00219         } while (0)
00220     #endif
00221     #ifndef KDBG_UART3_BUS_RX
00222     #define KDBG_UART3_BUS_RX    do {} while (0)
00223     #endif
00224     #ifndef KDBG_UART3_BUS_TX
00225     #define KDBG_UART3_BUS_TX    do {} while (0)
00226     #endif
00227
00228     #define KDBG_WAIT_READY()     do { loop_until_bit_is_set(UCSR3A, UDRE3); } while(0)
00229     #define KDBG_WAIT_TXDONE()    do { loop_until_bit_is_set(UCSR3A, TXC3); } while(0)
00230     #define KDBG_WRITE_CHAR(c)    do { UCSR3A |= BV(TXC3); UDR3 = (c); } while(0)
00231
00232     #define KDBG_MASK_IRQ(old)    do { \
00233         (old) = UCSR3B; \
00234         UCSR3B |= BV(TXEN3); \
00235         UCSR3B &= ~(BV(TXCIE3) | BV(UDRIE3)); \
00236         KDBG_UART3_BUS_TX; \
00237     } while(0)
00238
00239     #define KDBG_RESTORE_IRQ(old) do { \
00240         KDBG_WAIT_TXDONE(); \
00241         KDBG_UART3_BUS_RX; \
00242         UCSR3B = (old); \
00243     } while(0)
00244
00245     typedef uint8_t kdbg_irqsave_t;
00246
00247
00248 /*
00249  * Special debug port for BitBanged Serial see below for details...
00250  */
00251 #elif CONFIG_KDEBUG_PORT == 666
00252     #include "hw/hw_ser.h"
00253     #define KDBG_WAIT_READY()      do { /*nop*/ } while(0)
00254     #define KDBG_WRITE_CHAR(c)     _kdebug_bitbang_putchar((c))
00255     #define KDBG_MASK_IRQ(old)     do { IRQ_SAVE_DISABLE((old)); } while(0)
00256     #define KDBG_RESTORE_IRQ(old)  do { IRQ_RESTORE((old)); } while(0)
00257     typedef cpu_flags_t kdbg_irqsave_t;
00258
00259     #define KDBG_DELAY (((CPU_FREQ + CONFIG_KDEBUG_BAUDRATE / 2) / CONFIG_KDEBUG_BAUDRATE) + 7) / 14
00260
00261     static void _kdebug_bitbang_delay(void)
00262     {
00263         unsigned long i;
00264
00265         for (i = 0; i < KDBG_DELAY; i++)
00266         {
00267             NOP;
00268             NOP;
00269             NOP;
00270             NOP;
00271             NOP;
00272         }
00273     }
00274
00284     static void _kdebug_bitbang_putchar(char c)
00285     {
00286         int i;
00287         uint16_t data = c;
00288
00289         /* Add stop bit */
00290         data |= 0x0100;
00291
00292         /* Add start bit*/
00293         data <<= 1;
00294
00295         /* Shift out data */
00296         uint16_t shift = 1;
00297         for (i = 0; i < 10; i++)
00298         {
00299             if (data & shift)
00300                 SER_BITBANG_HIGH;
00301             else
00302                 SER_BITBANG_LOW;
00303             _kdebug_bitbang_delay();
00304             shift <<= 1;
00305         }
00306     }
00307 #else
00308     #error CONFIG_KDEBUG_PORT should be either 0, 1, 2, 3 or 666
00309 #endif
00310
00311
00312 INLINE void kdbg_hw_init(void)
00313 {
00314     #if CONFIG_KDEBUG_PORT == 666
00315         SER_BITBANG_INIT;
00316     #else /* CONFIG_KDEBUG_PORT != 666 */
00317         /* Compute the baud rate */
00318         uint16_t period = DIV_ROUND(CPU_FREQ / 16UL, CONFIG_KDEBUG_BAUDRATE) - 1;
00319
00320         #if (CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281)
00321             #if CONFIG_KDEBUG_PORT == 0
00322                 UBRR0H = (uint8_t)(period>>8);
00323                 UBRR0L = (uint8_t)period;
00324                 KDBG_UART0_BUS_INIT;
00325             #elif CONFIG_KDEBUG_PORT == 1
00326                 UBRR1H = (uint8_t)(period>>8);
00327                 UBRR1L = (uint8_t)period;
00328                 KDBG_UART1_BUS_INIT;
00329             #else
00330                 #error CONFIG_KDEBUG_PORT must be either 0 or 1
00331             #endif
00332
00333         #elif CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
00334             #if CONFIG_KDEBUG_PORT == 0
00335                 UBRR0H = (uint8_t)(period>>8);
00336                 UBRR0L = (uint8_t)period;
00337                 KDBG_UART0_BUS_INIT;
00338             #elif CONFIG_KDEBUG_PORT == 1
00339                 UBRR1H = (uint8_t)(period>>8);
00340                 UBRR1L = (uint8_t)period;
00341                 KDBG_UART1_BUS_INIT;
00342             #elif CONFIG_KDEBUG_PORT == 2
00343                 UBRR2H = (uint8_t)(period>>8);
00344                 UBRR2L = (uint8_t)period;
00345                 KDBG_UART2_BUS_INIT;
00346             #elif CONFIG_KDEBUG_PORT == 3
00347                 UBRR3H = (uint8_t)(period>>8);
00348                 UBRR3L = (uint8_t)period;
00349                 KDBG_UART3_BUS_INIT;
00350             #else
00351                 #error CONFIG_KDEBUG_PORT must be either 0 or 1 or 2 or 3
00352             #endif
00353
00354         #elif CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
00355             #if CONFIG_KDEBUG_PORT == 0
00356                 UBRR0H = (uint8_t)(period>>8);
00357                 UBRR0L = (uint8_t)period;
00358                 UCSR0A = 0; /* The Arduino Uno bootloader turns on U2X0 */
00359                 KDBG_UART0_BUS_INIT;
00360             #else
00361                 #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu
00362             #endif
00363
00364         #elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32
00365             #if CONFIG_KDEBUG_PORT == 0
00366                 UBRRH = (uint8_t)(period>>8);
00367                 UBRRL = (uint8_t)period;
00368                 KDBG_UART0_BUS_INIT;
00369             #else
00370                 #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu
00371             #endif
00372         #elif CPU_AVR_ATMEGA103
00373             #if CONFIG_KDEBUG_PORT == 0
00374                 UBRR = (uint8_t)period;
00375                 KDBG_UART0_BUS_INIT;
00376             #else
00377                 #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu
00378             #endif
00379         #else
00380             #error Unknown CPU
00381         #endif
00382     #endif /* CONFIG_KDEBUG_PORT == 666 */
00383 }
00384


BeRTOS: kdebug_msp430.c File Reference

  • cpu
  • msp430
  • drv
kdebug_msp430.c File Reference

MSP430 debug support (implementation). More...

#include "kdebug_msp430.h"
#include "hw/hw_ser.h"
#include "cfg/cfg_debug.h"
#include <cfg/macros.h>
#include <cpu/types.h>
#include <cpu/attr.h>
#include <io.h>

Go to the source code of this file.

Detailed Description

MSP430 debug support (implementation).

Author:
Mohamed Tarek <mtarek16@gmail.com>

Definition in file kdebug_msp430.c.


BeRTOS: kdebug_msp430.c Source File

  • cpu
  • msp430
  • drv
kdebug_msp430.c
Go to the documentation of this file.
00001
00039 #include "kdebug_msp430.h"  /* for UART clock source definitions */
00040
00041 #include "hw/hw_ser.h"      /* bus macros overrides */
00042 #include "cfg/cfg_debug.h"
00043
00044 #include <cfg/macros.h>     /* for DIV_ROUND */
00045
00046 #include <cpu/types.h>
00047 #include <cpu/attr.h>
00048
00049 #include <io.h>
00050
00051 #if CONFIG_KDEBUG_PORT == 0
00052
00053     #ifndef KDBG_UART0_BUS_INIT
00054     #define KDBG_UART0_BUS_INIT  do {} while (0)
00055     #endif
00056     #ifndef KDBG_UART0_BUS_RX
00057     #define KDBG_UART0_BUS_RX    do {} while (0)
00058     #endif
00059     #ifndef KDBG_UART0_BUS_TX
00060     #define KDBG_UART0_BUS_TX    do {} while (0)
00061     #endif
00062
00063     /* USCI Register definitions */
00064     #define UCSTAT  UCA0STAT
00065     #define UCTXBUF UCA0TXBUF
00066     #define UCRXBUF UCA0RXBUF
00067     #define UCTXIFG UCA0TXIFG
00068     #define UCRXIFG UCA0RXIFG
00069     #define UCTXIE  UCA0TXIE
00070     #define UCRXIE  UCA0RXIE
00071     #define UCCTL0  UCA0CTL0
00072     #define UCCTL1  UCA0CTL1
00073     #define UCBR0   UCA0BR0
00074     #define UCBR1   UCA0BR1
00075     #define UCMCTL  UCA0MCTL
00076     #define IE      IE2
00077     #define IFG     IFG2
00078
00079     #if CPU_MSP430F2274
00080         #define KDBG_MSP430_UART_PINS_INIT()    do{ P3SEL = 0x30; }while(0)
00081     #endif
00082
00083 #else
00084
00085     #if CPU_MSP430F2274
00086         #error only 1 UART availbale, CONFIG_KDEBUG_PORT should be 0
00087     #endif
00088
00089 #endif
00090
00091 #define KDBG_WAIT_READY()     do { while((UCSTAT & UCBUSY)); } while(0)
00092 #define KDBG_WAIT_TXDONE()    do { while(!(IFG & UCTXIFG)); } while(0)
00093
00094 #define KDBG_WRITE_CHAR(c)    do { UCTXBUF = (c); } while(0)
00095
00096 #define KDBG_MASK_IRQ(old)    do { \
00097     (old) = IE; \
00098     IE &= ~(UCTXIE|UCRXIE);\
00099 } while(0)
00100
00101 #define KDBG_RESTORE_IRQ(old) do { \
00102     KDBG_WAIT_TXDONE(); \
00103     IE = (old); \
00104 } while(0)
00105
00106 #if CONFIG_KDEBUG_CLOCK_FREQ
00107     #define KDBG_MSP430_FREQ CONFIG_KDEBUG_CLOCK_FREQ
00108 #else
00109     #define KDBG_MSP430_FREQ CPU_FREQ
00110 #endif
00111
00112 typedef uint8_t kdbg_irqsave_t;
00113
00114 INLINE void kdbg_hw_init(void)
00115 {
00116     /* Compute the clock prescaler for the desired baudrate */
00117     uint16_t quot = DIV_ROUND(KDBG_MSP430_FREQ, CONFIG_KDEBUG_BAUDRATE);
00118     KDBG_MSP430_UART_PINS_INIT();       // Configure USCI TX/RX pins
00119
00120 #if (CONFIG_KDEBUG_CLOCK_SOURCE == KDBG_UART_SMCLK)
00121     UCCTL1 |= UCSSEL_SMCLK;
00122 #else
00123     UCCTL1 |= UCSSEL_ACLK;
00124 #endif
00125
00126     UCBR0   = quot & 0xFF;              // Setup clock prescaler for the UART
00127     UCBR1   = quot >> 8;
00128
00129     UCMCTL  = UCBRS0;                   // No Modulation
00130     UCCTL0  = 0;                        // Default UART settings (8N1)
00131     UCCTL1 &= ~UCSWRST;                 // Initialize USCI state machine
00132     KDBG_MASK_IRQ(IE2);                 // Disable USCI interrupts
00133 }
00134


BeRTOS: kdebug_msp430.h File Reference

  • cpu
  • msp430
  • drv
Defines
kdebug_msp430.h File Reference

MSP430 debug support (implementation). More...

#include "cfg/cfg_debug.h"

Go to the source code of this file.

Defines

#define KDBG_UART_ACLK 0
UART Clock source.

Detailed Description

MSP430 debug support (implementation).

Author:
Mohamed Tarek <mtarek16@gmail.com>

Definition in file kdebug_msp430.h.


BeRTOS: kdebug_msp430.h Source File

  • cpu
  • msp430
  • drv
kdebug_msp430.h
Go to the documentation of this file.
00001
00039 #include "cfg/cfg_debug.h"
00040
00046 #define KDBG_UART_ACLK  0
00047 #define KDBG_UART_SMCLK 1


BeRTOS: kdebug_sam3.c File Reference

  • cpu
  • cortex-m3
  • drv
kdebug_sam3.c File Reference

SAM3 debug support (implementation). More...

#include <cfg/cfg_debug.h>
#include <cfg/macros.h>
#include <cpu/types.h>
#include <io/sam3.h>

Go to the source code of this file.

Detailed Description

SAM3 debug support (implementation).

Author:
Stefano Fedrigo <aleph@develer.com>

Definition in file kdebug_sam3.c.


BeRTOS: kdebug_sam3.c Source File

  • cpu
  • cortex-m3
  • drv
kdebug_sam3.c
Go to the documentation of this file.
00001
00038 #include <cfg/cfg_debug.h>
00039 #include <cfg/macros.h> /* for BV() */
00040
00041 #include <cpu/types.h>
00042
00043 #include <io/sam3.h>
00044
00045
00046 #if (CONFIG_KDEBUG_PORT == 0)
00047     #define UART_BASE       UART0_BASE
00048     #define UART_ID         UART0_ID
00049     #define UART_PIO_BASE   UART0_PORT
00050     #define UART_PERIPH     UART0_PERIPH
00051     #define UART_PINS       (BV(URXD0) | BV(UTXD0))
00052 #elif (CONFIG_KDEBUG_PORT == 1) && UART_PORTS > 1
00053     #define UART_BASE       UART1_BASE
00054     #define UART_ID         UART1_ID
00055     #define UART_PIO_BASE   UART1_PORT
00056     #define UART_PERIPH     UART1_PERIPH
00057     #define UART_PINS       (BV(URXD1) | BV(UTXD1))
00058 #else
00059     #error "UART port not supported in this board"
00060 #endif
00061
00062 // TODO: refactor serial simple functions and use them, see lm3s kdebug
00063 #define KDBG_WAIT_READY()     while (!(HWREG(UART_BASE + UART_SR_OFF) & BV(UART_SR_TXRDY))) {}
00064 #define KDBG_WAIT_TXDONE()    while (!(HWREG(UART_BASE + UART_SR_OFF) & BV(UART_SR_TXEMPTY))) {}
00065
00066 #define KDBG_WRITE_CHAR(c)    do { HWREG(UART_BASE + UART_THR_OFF) = (c); } while(0)
00067
00068 /* Debug unit is used only for debug purposes so does not generate interrupts. */
00069 #define KDBG_MASK_IRQ(old)    do { (void)old; } while(0)
00070
00071 /* Debug unit is used only for debug purposes so does not generate interrupts. */
00072 #define KDBG_RESTORE_IRQ(old) do { (void)old; } while(0)
00073
00074 typedef uint32_t kdbg_irqsave_t;
00075
00076
00077 INLINE void kdbg_hw_init(void)
00078 {
00079     /*
00080      * Disable PIO mode and set appropriate UART pins peripheral mode.
00081      * SAM3X,A,N,S,U: all of them has all UARTs on peripheral A.
00082      */
00083     HWREG(UART_PIO_BASE + PIO_PDR_OFF) = UART_PINS;
00084     PIO_PERIPH_SEL(UART_PIO_BASE, UART_PINS, UART_PERIPH);
00085
00086     /* Enable the peripheral clock */
00087     pmc_periphEnable(UART_ID);
00088
00089     /* Reset and disable receiver & transmitter */
00090     HWREG(UART_BASE + UART_CR_OFF) = BV(UART_CR_RSTRX) | BV(UART_CR_RSTTX) | BV(UART_CR_RXDIS) | BV(UART_CR_TXDIS);
00091
00092     /* Set mode: normal, no parity */
00093     HWREG(UART_BASE + UART_MR_OFF) = UART_MR_PAR_NO;
00094
00095     /* Set baud rate */
00096     HWREG(UART_BASE + UART_BRGR_OFF) = CPU_FREQ / CONFIG_KDEBUG_BAUDRATE / 16;
00097
00098     /* Enable receiver & transmitter */
00099     HWREG(UART_BASE + UART_CR_OFF) = BV(UART_CR_RXEN) | BV(UART_CR_TXEN);
00100 }


BeRTOS: kdebug_stm32.c File Reference

  • cpu
  • cortex-m3
  • drv
kdebug_stm32.c File Reference

STM32 debug support (implementation). More...

#include "kdebug_stm32.h"
#include <cfg/cfg_debug.h>
#include <drv/gpio_stm32.h>
#include <drv/clock_stm32.h>
#include <io/stm32.h>

Go to the source code of this file.

Detailed Description

STM32 debug support (implementation).

Author:
Andrea Righi <arighi@develer.com>

Definition in file kdebug_stm32.c.


BeRTOS: kdebug_stm32.c Source File

  • cpu
  • cortex-m3
  • drv
kdebug_stm32.c
Go to the documentation of this file.
00001
00038 #include "kdebug_stm32.h"
00039
00040 #include <cfg/cfg_debug.h>
00041
00042 #include <drv/gpio_stm32.h>
00043 #include <drv/clock_stm32.h> /* RCC */
00044
00045 #include <io/stm32.h>
00046
00047
00048
00049 #if CONFIG_KDEBUG_PORT == 0
00050     #define UART_BASE ((struct stm32_usart *)USART1_BASE)
00051 #elif CONFIG_KDEBUG_PORT == 1
00052     #define UART_BASE ((struct stm32_usart *)USART2_BASE)
00053 #elif CONFIG_KDEBUG_PORT == 2
00054     #define UART_BASE ((struct stm32_usart *)USART3_BASE)
00055 #else
00056     #error "UART port not supported in this board"
00057 #endif
00058
00059 #define KDBG_WAIT_READY()   while (!(UART_BASE->SR & USART_FLAG_TXE))
00060 #define KDBG_WAIT_TXDONE()  while (!(UART_BASE->SR & USART_FLAG_TC))
00061
00062 #define KDBG_WRITE_CHAR(c)  do { UART_BASE->DR = (c) & 0x1ff; } while(0)
00063
00064 /* Debug unit is used only for debug purposes so does not generate interrupts. */
00065 #define KDBG_MASK_IRQ(old)  do { (void)old; } while(0)
00066
00067 /* Debug unit is used only for debug purposes so does not generate interrupts. */
00068 #define KDBG_RESTORE_IRQ(old)   do { (void)old; } while(0)
00069
00070 typedef uint32_t kdbg_irqsave_t;
00071
00072
00073 /* Initialize UART debug port */
00074 INLINE void kdbg_hw_init(void)
00075 {
00076     /* Enable clocking on AFIO */
00077     RCC->APB2ENR |= RCC_APB2_AFIO;
00078     /* Configure USART pins */
00079 #if CONFIG_KDEBUG_PORT == 0
00080     RCC->APB2ENR |= RCC_APB2_GPIOA;
00081     RCC->APB2ENR |= RCC_APB2_USART1;
00082     stm32_gpioPinConfig((struct stm32_gpio *)GPIOA_BASE, GPIO_USART1_TX_PIN,
00083                 GPIO_MODE_AF_PP, GPIO_SPEED_50MHZ);
00084 #elif CONFIG_KDEBUG_PORT == 1
00085     RCC->APB2ENR |= RCC_APB2_GPIOA;
00086     RCC->APB1ENR |= RCC_APB1_USART2;
00087     stm32_gpioPinConfig((struct stm32_gpio *)GPIOA_BASE, GPIO_USART2_TX_PIN,
00088                 GPIO_MODE_AF_PP, GPIO_SPEED_50MHZ);
00089 #elif  CONFIG_KDEBUG_PORT == 2
00090     RCC->APB2ENR |= RCC_APB2_GPIOB;
00091     RCC->APB1ENR |= RCC_APB1_USART3;
00092     stm32_gpioPinConfig((struct stm32_gpio *)GPIOB_BASE, GPIO_USART3_TX_PIN,
00093                 GPIO_MODE_AF_PP, GPIO_SPEED_50MHZ);
00094 #else
00095     #error "UART port not supported in this board"
00096 #endif
00097     /* Enable the USART by writing the UE bit */
00098     UART_BASE->CR1 |= CR1_RUN_SET;
00099     /* Configure the desired baud rate */
00100     UART_BASE->BRR = (uint16_t)evaluate_brr(UART_BASE, CPU_FREQ, CONFIG_KDEBUG_BAUDRATE);
00101     /* Set the Transmitter Enable bit in CR1 */
00102     UART_BASE->CR1 |= USART_MODE_TX;
00103 }


BeRTOS: kdebug_stm32.h File Reference

  • cpu
  • cortex-m3
  • drv
Defines
kdebug_stm32.h File Reference

STM32 debug support (interface). More...

Go to the source code of this file.

Defines

#define KDEBUG_PORT_DEFAULT 1
Default debug port.

Detailed Description

STM32 debug support (interface).

Author:
Andrea Righi <arighi@develer.com>

Definition in file kdebug_stm32.h.


BeRTOS: kdebug_stm32.h Source File

  • cpu
  • cortex-m3
  • drv
kdebug_stm32.h
Go to the documentation of this file.
00001
00038 #ifndef DRV_KDEBUG_STM32_H
00039 #define DRV_KDEBUG_STM32_H
00040
00041 #define KDEBUG_PORT_DEFAULT 1  ///< Default debug port.
00042 /* \} */
00043
00044 #endif /* DRV_KDEBUG_STM32_H */


BeRTOS: kdebug_xmega.c File Reference

  • cpu
  • avr
  • drv
kdebug_xmega.c File Reference

AVR XMega debug support (implementation). More...

#include <hw/hw_cpufreq.h>
#include "hw/hw_ser.h"
#include "cfg/cfg_debug.h"
#include <cfg/macros.h>
#include <cpu/types.h>
#include <cpu/attr.h>
#include <avr/io.h>

Go to the source code of this file.

Detailed Description

AVR XMega debug support (implementation).

This file is heavily inspired by the AVR implementation for BeRTOS, but uses a different approach for implementing the different debug ports, by using the USART_t structs.

Author:
Onno <developer@gorgoz.org>

Definition in file kdebug_xmega.c.


BeRTOS: kdebug_xmega.c Source File

  • cpu
  • avr
  • drv
kdebug_xmega.c
Go to the documentation of this file.
00001
00044 #include <hw/hw_cpufreq.h>  /* for CPU_FREQ */
00045 #include "hw/hw_ser.h"      /* Required for bus macros overrides */
00046
00047 #include "cfg/cfg_debug.h"  /* for debugging configuration settings */
00048 #include <cfg/macros.h>     /* for BV(), DIV_ROUND */
00049
00050 #include <cpu/types.h>
00051 #include <cpu/attr.h>
00052
00053 #include <avr/io.h>
00054
00055 /* Set KDBG_USART, KDBG_USART_PORT and KDBG_USART_TX_PIN_bm
00056  * according to the CONFIG_KDEBUG_PORT setting
00057  * The Xmega A and D families support at least 2 UARTS
00058  */
00059 #if CONFIG_KDEBUG_PORT == 0
00060     #define KDBG_USART              USARTC0
00061     #define KDBG_USART_PORT         PORTC
00062     #define KDBG_USART_TX_PIN_bm    PIN3_bm
00063 #elif CONFIG_KDEBUG_PORT == 1
00064     #define KDBG_USART              USARTD0
00065     #define KDBG_USART_PORT         PORTD
00066     #define KDBG_USART_TX_PIN_bm    PIN3_bm
00067 #endif
00068 /* Allow the configuration of the extra 3 UARTS for the
00069  * Xmega A family
00070  */
00071 #ifdef CPU_AVR_XMEGA_A
00072     #if CONFIG_KDEBUG_PORT == 2
00073         #define KDBG_USART              USARTC1
00074         #define KDBG_USART_PORT         PORTC
00075         #define KDBG_USART_TX_PIN_bm    PIN7_bm
00076     #elif CONFIG_KDEBUG_PORT == 3
00077         #define KDBG_USART              USARTD1
00078         #define KDBG_USART_PORT         PORTD
00079         #define KDBG_USART_TX_PIN_bm    PIN7_bm
00080     #elif CONFIG_KDEBUG_PORT == 4
00081         #define KDBG_USART              USARTE0
00082         #define KDBG_USART_PORT         PORTE
00083         #define KDBG_USART_TX_PIN_bm    PIN3_bm
00084     #endif
00085 #endif
00086 /* Check if all required KDBG_ macros are defined
00087  */
00088 #ifndef KDBG_USART
00089     #if CPU_AVR_XMEGA_D
00090         #error CONFIG_KDEBUG_PORT should be either 0 or 1
00091     #elif CPU_AVR_XMEGA_A
00092         #error CONFIG_KDEBUG_PORT should be either 0, 1, 2, 3 or 4
00093     #endif
00094 #endif
00095
00096 /*
00097  * Scalefactor to use for computing the baudrate
00098  * this scalefactor should be an integer value between -7
00099  * and 7
00100  */
00101 #ifndef KDBG_USART_SCALE_FACTOR
00102     #define KDBG_USART_SCALE_FACTOR (-7)
00103 #else
00104     #if KDBG_USART_SCALE_FACTOR > 7 || KDBG_USART_SCALE_FACTOR < -7
00105         #error KDBG_USART_SCALE_FACTOR should be an integer between -7 and 7
00106     #endif
00107 #endif
00108
00109 /*
00110  * \name KDBG macros
00111  *
00112  * Used to set or alter the KDB_USART operation,
00113  * enable the usart or send a byte.
00114  * Some of these methods are called/included from kdbg_hw_init()
00115  * others are called/included from the cpu independ kdebug implementation
00116  * These macros are heavily imspired by the examples provided by atmel
00117  *
00118  * \{
00119  */
00120 #define KDBG_SET_FORMAT(_charSize, _parityMode, _twoStopBits)         \
00121     (KDBG_USART).CTRLC = (uint8_t) _charSize | _parityMode |                      \
00122                       (_twoStopBits ? USART_SBMODE_bm : 0)
00123
00124 #define KDBG_SET_BAUDRATE(_bselValue, _bScaleFactor)                  \
00125     (KDBG_USART).BAUDCTRLA =(uint8_t)_bselValue;                                           \
00126     (KDBG_USART).BAUDCTRLB =(_bScaleFactor << USART_BSCALE0_bp)|(_bselValue >> 8)
00127
00128 #define KDBG_TX_ENABLE()    ((KDBG_USART).CTRLB |= USART_TXEN_bm)
00129
00130 #define KDBG_SET_MODE(_usartMode)                                      \
00131     ((KDBG_USART).CTRLC = ((KDBG_USART).CTRLC & (~USART_CMODE_gm)) | _usartMode)
00132
00133 #define KDBG_WAIT_READY()   do{ loop_until_bit_is_set((KDBG_USART).STATUS, USART_DREIF_bp); } while(0)
00134 #define KDBG_WAIT_TXDONE()  do { loop_until_bit_is_set((KDBG_USART).STATUS, USART_TXCIF_bp); } while(0)
00135 #define KDBG_WRITE_CHAR(c)  do { (KDBG_USART).DATA = (c); } while(0)
00136
00137 #define KDBG_SET_TX_INTERRUPTLEVEL(_txdIntLevel)                      \
00138     (KDBG_USART).CTRLA = ((KDBG_USART).CTRLA & ~USART_TXCINTLVL_gm) | _txdIntLevel
00139
00140 #define KDBG_SET_DRE_INTERRUPTLEVEL(_dreIntLevel)                      \
00141     (KDBG_USART).CTRLA = ((KDBG_USART).CTRLA & ~USART_DREINTLVL_gm) | _dreIntLevel
00142
00143 /*\}*/
00144
00145 /*
00146  * To restore the USART state, to registers need to be restored
00147  * These registers (CTRLA and CTRLB) can be saved to the
00148  * kdbg_avr_xmaga_irqsave structure
00149  */
00150 struct kdbg_avr_xmega_irqsave
00151 {
00152     uint8_t ctrlb;
00153     uint8_t ctrla;
00154 };
00155 typedef struct kdbg_avr_xmega_irqsave kdbg_irqsave_t;
00156
00157 /*
00158  * param is the kdbg_irqsave_t structure
00159  *
00160  * * Stores the current state of the USART.CTRLA and
00161  * the USART.CTRLB registers
00162  * * Disables Transmit Complete and Date Register Empty interrupts
00163  * * Enabled the transmitter
00164  */
00165 #define KDBG_MASK_IRQ(old)    do { \
00166     (old).ctrlb = KDBG_USART.CTRLB; \
00167     (old).ctrla = KDBG_USART.CTRLA; \
00168     KDBG_SET_TX_INTERRUPTLEVEL(USART_TXCINTLVL_OFF_gc); \
00169     KDBG_SET_DRE_INTERRUPTLEVEL(USART_DREINTLVL_OFF_gc); \
00170     KDBG_TX_ENABLE(); \
00171 } while(0)
00172
00173 /*
00174  * param is the kdbg_irqsave_t structure
00175  *
00176  * * waits until all data has been transmitted
00177  * * restores the USART.CTRLA and USART.CTRLB registers
00178  */
00179 #define KDBG_RESTORE_IRQ(old) do { \
00180     KDBG_WAIT_TXDONE(); \
00181     KDBG_USART.CTRLB = (old).ctrlb; \
00182     KDBG_USART.CTRLA = (old).ctrla; \
00183 } while(0)
00184
00185
00186 /*
00187  * method included from the cpu independent kdebug.c file.
00188  * it initializes KDBG_USART by:
00189  * * Setting the KDBG_USART_TX_PIN_bm as an outputpin
00190  * * Setting KDBG_USART to use 8 bits, No parity, 1 stopbit
00191  * * Setting the baudrate to 115200
00192  * * Enabeling the transmitter
00193  */
00194 INLINE void kdbg_hw_init(void)
00195 {
00196         //set transmit pin as output
00197         KDBG_USART_PORT.OUT = KDBG_USART_PORT.OUT & ~KDBG_USART_TX_PIN_bm;
00198         KDBG_USART_PORT.DIRSET = KDBG_USART_TX_PIN_bm;
00199         //set 8 bits, no parity, 1 stop bit
00200         KDBG_SET_FORMAT(USART_CHSIZE_8BIT_gc, USART_PMODE_DISABLED_gc, false);
00201         //compute and set the baud rate
00202         /* Compute baud-rate period, this requires a valid USART_SCALE_FACTOR */
00203         #if KDBG_USART_SCALE_FACTOR < 0
00204             uint16_t bsel = DIV_ROUND((1 << (-(KDBG_USART_SCALE_FACTOR))) * (CPU_FREQ - (16 * CONFIG_KDEBUG_BAUDRATE)), 16 * CONFIG_KDEBUG_BAUDRATE);
00205         #else
00206             uint16_t bsel = DIV_ROUND(CPU_FREQ, (1 << (KDBG_USART_SCALE_FACTOR)) * 16 * CONFIG_KDEBUG_BAUDRATE) - 1;
00207         #endif
00208         KDBG_SET_BAUDRATE(bsel, KDBG_USART_SCALE_FACTOR);
00209         //enable the Transmitter
00210         KDBG_TX_ENABLE();
00211 }


BeRTOS: kdf.h File Reference

  • sec
Functions
kdf.h File Reference

Generic interface for key derivation functions. More...

#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <string.h>

Go to the source code of this file.

Functions

void | kdf_begin (Kdf *kdf, const char *pwd, size_t pwd_len, const uint8_t *salt, size_t salt_len)
Initialize the key derivation function, with the specified password and salt.
void | kdf_read (Kdf *kdf, uint8_t *out, size_t len)
Extract len derived bytes into the out buffer.

Detailed Description

Generic interface for key derivation functions.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file kdf.h.

Function Documentation

void kdf_read | ( | Kdf * | kdf,
 |  | uint8_t * | out,
 |  | size_t | len
 | ) |  | [inline]

Extract len derived bytes into the out buffer.

After having initialized the derivation function iwth kdf_begin, you can call this function multiple times, to produce several batches of derived data.

Note:
Some algorithms implementing this API might have a maximum length of bytes that can be derived, after which they will simply ASSERT().

Definition at line 76 of file kdf.h.


BeRTOS: kdf.h Source File

  • sec
kdf.h
Go to the documentation of this file.
00001
00038 #ifndef SEC_KDF_H
00039 #define SEC_KDF_H
00040
00041 #include <cfg/compiler.h>
00042 #include <cfg/macros.h>
00043 #include <cfg/debug.h>
00044 #include <string.h>
00045
00046 typedef struct Kdf
00047 {
00048     const uint8_t* block;
00049     size_t block_len;
00050     size_t to_read;
00051
00052     void (*begin)(struct Kdf *kdf, const char *pwd, size_t pwd_len,
00053                   const uint8_t *salt, size_t salt_len);
00054     void (*next)(struct Kdf *kdf);
00055 } Kdf;
00056
00060 INLINE void kdf_begin(Kdf *kdf, const char *pwd, size_t pwd_len,
00061                       const uint8_t *salt, size_t salt_len)
00062 {
00063     ASSERT(kdf->begin);
00064     kdf->begin(kdf, pwd, pwd_len, salt, salt_len);
00065 }
00066
00076 INLINE void kdf_read(Kdf *kdf, uint8_t *out, size_t len)
00077 {
00078     do
00079     {
00080         if (kdf->to_read == 0)
00081         {
00082             kdf->next(kdf);
00083             ASSERT(kdf->to_read != 0);
00084         }
00085
00086         size_t c = MIN(len, kdf->to_read);
00087         memcpy(out, kdf->block, c);
00088         len -= c;
00089         out += c;
00090         kdf->block += c;
00091         kdf->to_read -= c;
00092     } while (len);
00093 }
00094
00095 #endif /* SEC_KDF_H */


BeRTOS: irq.h File Reference

  • kern
kern/irq.h File Reference

Process scheduler (public interface). More...

Go to the source code of this file.

Detailed Description

Process scheduler (public interface).

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file kern/irq.h.


BeRTOS: irq.h Source File

  • kern
kern/irq.h
Go to the documentation of this file.
00001
00036 #ifndef KERN_IRQ_H
00037 #define KERN_IRQ_H
00038
00039 void irq_entry(int irq);
00040 void irq_register(int irq, void (*handler)(void));
00041 void irq_init(void);
00042
00043 #endif // KERN_IRQ_H


BeRTOS: kfile.h File Reference

  • kern
kern/kfile.h File Reference
#include <io/kfile.h>

Go to the source code of this file.

Detailed Description

Definition in file kern/kfile.h.


BeRTOS: kfile.h Source File

  • kern
kern/kfile.h
Go to the documentation of this file.
00001
00036 #warning "This file is deprecated, include the new <io/kfile.h>"
00037 #include <io/kfile.h>


BeRTOS: kernel_footprint.c File Reference

  • benchmark
kernel_footprint.c File Reference

Kernel footprint benchmark. More...

#include "kernel_footprint.h"
#include <cpu/irq.h>
#include <kern/proc.h>
#include <kern/signal.h>
#include <kern/msg.h>
#include <kern/sem.h>

Go to the source code of this file.

Detailed Description

Kernel footprint benchmark.

Author:
Luca Ottaviano <lottaviano@develer.com>
Andrea Righi <arighi@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file kernel_footprint.c.


BeRTOS: kernel_footprint.c Source File

  • benchmark
kernel_footprint.c
Go to the documentation of this file.
00001
00040 #include "kernel_footprint.h"
00041
00042 #include <cpu/irq.h>
00043
00044 #include <kern/proc.h>
00045 #include <kern/signal.h>
00046 #include <kern/msg.h>
00047 #include <kern/sem.h>
00048
00049 MsgPort in_port;
00050
00051 static void init(void)
00052 {
00053     IRQ_ENABLE;
00054     proc_init();
00055 }
00056
00057 static PROC_DEFINE_STACK(proc1_stack, KERN_MINSTACKSIZE);
00058
00059 static NORETURN void proc1_main(void)
00060 {
00061     int i;
00062     for(;;)
00063     {
00064         i++;
00065     }
00066 }
00067
00068 void kernel_footprint(void)
00069 {
00070     init();
00071
00072     // generate code for process
00073     struct Process *p =
00074         proc_new(proc1_main, 0, sizeof(proc1_stack), proc1_stack);
00075     proc_setPri(p, 5);
00076     proc_yield();
00077
00078     // generate code for msg
00079     Msg msg;
00080     msg_initPort(&in_port, event_createSignal(p, SIG_USER1));
00081     msg_put(&in_port, &msg);
00082     msg_peek(&in_port);
00083     Msg *msg_re = msg_get(&in_port);
00084     msg_reply(msg_re);
00085
00086     // generate code for signals
00087     sig_send(p, SIG_USER0);
00088
00089     // generate code for msg
00090     Semaphore sem;
00091     sem_init(&sem);
00092     sem_obtain(&sem);
00093     sem_release(&sem);
00094
00095     sig_wait(SIG_USER0);
00096 }


BeRTOS: kernel_footprint.h File Reference

  • benchmark
kernel_footprint.h File Reference

Kernel footprint benchmark. More...

Go to the source code of this file.

Detailed Description

Kernel footprint benchmark.

Author:
Daniele Basile <asterix@develer.com>

Definition in file kernel_footprint.h.


BeRTOS: kernel_footprint.h Source File

  • benchmark
kernel_footprint.h
Go to the documentation of this file.
00001
00041 #ifndef BENCHMARK_KERNEL_FOOTPRINT_H
00042 #define BENCHMARK_KERNEL_FOOTPRINT_H
00043
00044 void kernel_footprint(void);
00045
00046 #endif /* BENCHMARK_KERNEL_FOOTPRINT_H */


BeRTOS: keytag.c File Reference

  • net
Defines | Functions
keytag.c File Reference

KeyTAG parser. More...

#include "keytag.h"
#include <cfg/debug.h>
#include <cfg/log.h>
#include <cfg/macros.h>
#include <io/kfile.h>
#include <string.h>

Go to the source code of this file.

Defines

#define | TAG_STX 0x02
Starting communication char (STX).
#define | TAG_ETX 0x03
Ending communication char (ETX).

Functions

void | keytag_poll (struct TagPacket *pkt)
DEPRECATED FUCNTIONS To read the tag string from device you shoul use the keytag_recv fuction, that return the string if we had received it.
int | keytag_recv (struct TagPacket *pkt, uint8_t *tag, size_t len)
Receive the tag message from channel, and if the tag is good put the converted string into given buffer.
void | keytag_init (struct TagPacket *pkt, struct KFile *comm, struct KFile *tag)
Init the keytag module.

Detailed Description

KeyTAG parser.

Author:
Andrea Grandi <andrea@develer.com>
Daniele Basile <asterix@develer.com>

This module parse TAG message that come from comunication channel, and convert the tag value into string.

TAG protocol is decribed in this way:

 ---------------------------------------------------
 |STX (0x02)|data...(10 HEX chars)|CR|LF|ETX (0x03)|
 ---------------------------------------------------

Definition in file keytag.c.

Function Documentation

int keytag_recv | ( | struct TagPacket * | pkt,
 |  | uint8_t * | tag,
 |  | size_t | len
 | ) |  |

Receive the tag message from channel, and if the tag is good put the converted string into given buffer.

The fuction return the len of found tag string, otherwise EOF.

Definition at line 95 of file keytag.c.


BeRTOS: keytag.c Source File

  • net
keytag.c
Go to the documentation of this file.
00001
00049 #include "keytag.h"
00050
00051 #include <cfg/debug.h>
00052 // Define log settings for cfg/log.h
00053 #define LOG_LEVEL    CONFIG_KEYTAG_LOG_LEVEL
00054 #define LOG_FORMAT   CONFIG_KEYTAG_LOG_FORMAT
00055 #include <cfg/log.h>
00056 #include <cfg/macros.h>
00057
00058 #include <io/kfile.h>
00059
00060 #include <string.h>
00064 #define TAG_STX 0x02
00065
00069 #define TAG_ETX 0x03
00070
00071 static void keytag_clearPkt(struct TagPacket *pkt)
00072 {
00073     pkt->sync = false;
00074     pkt->len = 0;
00075 }
00076
00082 void keytag_poll(struct TagPacket *pkt)
00083 {
00084     uint8_t buf[CONFIG_TAG_MAX_LEN];
00085     int len;
00086     if ((len = keytag_recv(pkt, buf, sizeof(buf))) != EOF)
00087         kfile_write(pkt->host, buf, len);
00088 }
00089
00095 int keytag_recv(struct TagPacket *pkt, uint8_t *tag, size_t len)
00096 {
00097     int c;
00098
00099     /* Get all chars from buffer */
00100     while ((c = kfile_getc(pkt->tag)) != EOF)
00101     {
00102         /* Search for STX char in received chars */
00103         if (c == TAG_STX)
00104         {
00105             /* When STX is found a new packet begins */
00106             if (pkt->sync)
00107                 LOG_WARN("TAG double sync!\n");
00108             keytag_clearPkt(pkt);
00109             pkt->sync = true;
00110         }
00111         else if (pkt->sync)
00112         {
00113             /* Check for end of packet */
00114             if (c == TAG_ETX)
00115             {
00116                 /* Terminate the tag string */
00117                 size_t tag_len = MIN(len, pkt->len);
00118
00119                 /* Save read tag */
00120                 memcpy(tag, pkt->buf, tag_len);
00121                 pkt->sync = false;
00122                 return tag_len;
00123             }
00124             else
00125             {
00126                 /* Check for buffer overflow */
00127                 if (pkt->len >= CONFIG_TAG_MAX_LEN)
00128                 {
00129                     LOG_ERR("TAG buffer overflow\n");
00130                     pkt->sync = false;
00131                 }
00132                 else
00133                 {
00134                     /* Add every char after STX to tag reading buffer */
00135                     if (pkt->sync)
00136                     {
00137                         pkt->buf[pkt->len] = c;
00138                         pkt->len++;
00139                     }
00140                 }
00141             }
00142         }
00143     }
00144     if (kfile_error(pkt->tag) != 0)
00145     {
00146         LOG_ERR("Error %04x\n", kfile_error(pkt->tag));
00147         kfile_clearerr(pkt->tag);
00148     }
00149
00150     return EOF;
00151 }
00152
00156 void keytag_init(struct TagPacket *pkt, struct KFile *comm, struct KFile *tag)
00157 {
00158     keytag_clearPkt(pkt);
00159     pkt->tag = tag;
00160     pkt->host = comm;
00161 }
00162


BeRTOS: keytag.h File Reference

  • net
Data Structures | Functions
keytag.h File Reference

Tag protocol. (interface). More...

#include "cfg/cfg_keytag.h"
#include <cfg/compiler.h>
#include <io/kfile.h>

Go to the source code of this file.

Data Structures

struct | TagPacket
Structure of a Tag packet. More...

Functions

void | keytag_init (struct TagPacket *pkt, struct KFile *comm, struct KFile *tag)
Init the keytag module.
int | keytag_recv (struct TagPacket *pkt, uint8_t *tag, size_t len)
Receive the tag message from channel, and if the tag is good put the converted string into given buffer.
DEPRECATED void | keytag_poll (struct TagPacket *pkt)
DEPRECATED FUCNTIONS To read the tag string from device you shoul use the keytag_recv fuction, that return the string if we had received it.

Detailed Description

Tag protocol. (interface).

Author:
Andrea Grandi <andrea@develer.com>

Definition in file keytag.h.

Function Documentation

int keytag_recv | ( | struct TagPacket * | pkt,
 |  | uint8_t * | tag,
 |  | size_t | len
 | ) |  |

Receive the tag message from channel, and if the tag is good put the converted string into given buffer.

The fuction return the len of found tag string, otherwise EOF.

Definition at line 95 of file keytag.c.


BeRTOS: keytag.h Source File

  • net
keytag.h
Go to the documentation of this file.
00001
00043 #ifndef NET_KEYTAG_H
00044 #define NET_KEYTAG_H
00045
00046 #include "cfg/cfg_keytag.h"
00047 #include <cfg/compiler.h>
00048
00049 #include <io/kfile.h>
00050
00051
00055 typedef struct TagPacket
00056 {
00057     KFile *tag;
00058     KFile *host;
00059     bool sync;
00060     size_t len;
00061     uint8_t buf[CONFIG_TAG_MAX_LEN];
00062 } TagPacket;
00063
00064 void keytag_init(struct TagPacket *pkt, struct KFile *comm, struct KFile *tag);
00065 int keytag_recv(struct TagPacket *pkt, uint8_t *tag, size_t len);
00066
00067 DEPRECATED void keytag_poll(struct TagPacket *pkt);
00068
00069 #endif /* NET_TAG_H */


BeRTOS: kfile.c File Reference

  • io
Functions
kfile.c File Reference

Virtual KFile I/O interface. More...

#include "kfile.h"
#include "cfg/cfg_kfile.h"
#include <cfg/debug.h>
#include <cfg/log.h>
#include <drv/timer.h>
#include <mware/formatwr.h>
#include <string.h>

Go to the source code of this file.

Functions

int | kfile_putc (int _c, struct KFile *fd)
Generic putc() implementation using fd->write.
int | kfile_getc (struct KFile *fd)
Generic getc() implementation using fd->read.
int | kfile_printf (struct KFile *fd, const char *format,...)
Formatted write.
int | kfile_print (struct KFile *fd, const char *s)
Write a string to kfile fd.
int | kfile_gets (struct KFile *fd, char *buf, int size)
Read a line long at most as size and put it in buf.
int | kfile_gets_echo (struct KFile *fd, char *buf, int size, bool echo)
Read a line long at most as size and put it in buf, with optional echo.
kfile_off_t | kfile_copy (KFile *src, KFile *dst, kfile_off_t size)
Copy size bytes from file src to dst.
kfile_off_t | kfile_genericSeek (struct KFile *fd, kfile_off_t offset, KSeekMode whence)
Move fd file seek position of offset bytes from whence.
struct KFile * | kfile_genericReopen (struct KFile *fd)
Reopen file fd.
int | kfile_genericClose (struct KFile *fd)
Close file fd.
void | kfile_resync (KFile *fd, mtime_t delay)
Discard input to resynchronize with remote end.
static int | kfile_generic (UNUSED_ARG(struct KFile *, fd))
Stub function that does nothing.
void | kfile_init (struct KFile *fd)
Base class KFile constructor.

Detailed Description

Virtual KFile I/O interface.

This module implements some generic I/O interfaces for kfile.

Author:
Francesco Sacchi <batt@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file kfile.c.

Function Documentation

static int kfile_generic ( UNUSED_ARG(struct KFile *, fd) ) [static]

Stub function that does nothing.

This is a generic implementation that only return 0.

Definition at line 282 of file kfile.c.


BeRTOS: kfile.c Source File

  • io
kfile.c
Go to the documentation of this file.
00001
00040 #include "kfile.h"
00041
00042 #include "cfg/cfg_kfile.h"
00043 #include <cfg/debug.h>
00044 #include <cfg/log.h>
00045
00046 #include <drv/timer.h>
00047 #include <mware/formatwr.h>
00048
00049 #include <string.h>
00050
00051 /*
00052  * Sanity check for config parameters required by this module.
00053  */
00054 #if !defined(CONFIG_KFILE_GETS) || ((CONFIG_KFILE_GETS != 0) && CONFIG_KFILE_GETS != 1)
00055     #error CONFIG_KFILE_GETS must be set to either 0 or 1 in appconfig.h
00056 #endif
00057 #if !defined(CONFIG_PRINTF)
00058     #error CONFIG_PRINTF missing in appconfig.h
00059 #endif
00060
00061
00065 int kfile_putc(int _c, struct KFile *fd)
00066 {
00067     unsigned char c = (unsigned char)_c;
00068
00069     if (kfile_write(fd, &c, sizeof(c)) == sizeof(c))
00070         return (int)((unsigned char)_c);
00071     else
00072         return EOF;
00073 }
00074
00078 int kfile_getc(struct KFile *fd)
00079 {
00080     unsigned char c;
00081
00082     if (kfile_read(fd, &c, sizeof(c)) == sizeof(c))
00083         return (int)((unsigned char)c);
00084     else
00085         return EOF;
00086 }
00087
00088 #if CONFIG_PRINTF
00089
00092 int kfile_printf(struct KFile *fd, const char *format, ...)
00093 {
00094     va_list ap;
00095     int len;
00096
00097     va_start(ap, format);
00098     len = _formatted_write(format, (void (*)(char, void *))kfile_putc, fd, ap);
00099     va_end(ap);
00100
00101     return len;
00102 }
00103 #endif /* CONFIG_PRINTF */
00104
00109 int kfile_print(struct KFile *fd, const char *s)
00110 {
00111     while (*s)
00112     {
00113         if (kfile_putc(*s++, fd) == EOF)
00114             return EOF;
00115     }
00116     return 0;
00117 }
00118
00119 #if CONFIG_KFILE_GETS
00120
00126 int kfile_gets(struct KFile *fd, char *buf, int size)
00127 {
00128     return kfile_gets_echo(fd, buf, size, false);
00129 }
00130
00131
00139 int kfile_gets_echo(struct KFile *fd, char *buf, int size, bool echo)
00140 {
00141     int i = 0;
00142     int c;
00143
00144     for (;;)
00145     {
00146         if ((c = kfile_getc(fd)) == EOF)
00147         {
00148             buf[i] = '\0';
00149             return -1;
00150         }
00151
00152         /* FIXME */
00153         if (c == '\r' || c == '\n' || i >= size-1)
00154         {
00155             buf[i] = '\0';
00156             if (echo)
00157                 kfile_print(fd, "\r\n");
00158             break;
00159         }
00160         buf[i++] = c;
00161         if (echo)
00162             kfile_putc(c, fd);
00163     }
00164
00165     return i;
00166 }
00167 #endif /* !CONFIG_KFILE_GETS */
00168
00169
00170 kfile_off_t kfile_copy(KFile *src, KFile *dst, kfile_off_t size)
00171 {
00172     char buf[32];
00173     kfile_off_t cp_len = 0;
00174
00175     while (size)
00176     {
00177         size_t len = MIN(sizeof(buf), (size_t)size);
00178         if (kfile_read(src, buf, len) != len)
00179             break;
00180
00181         size_t wr_len = kfile_write(dst, buf, len);
00182         cp_len += wr_len;
00183         size -= len;
00184
00185         if (wr_len != len)
00186             break;
00187     }
00188
00189     return cp_len;
00190 }
00191
00192
00199 kfile_off_t kfile_genericSeek(struct KFile *fd, kfile_off_t offset, KSeekMode whence)
00200 {
00201     kfile_off_t seek_pos;
00202
00203     switch (whence)
00204     {
00205
00206     case KSM_SEEK_SET:
00207         seek_pos = 0;
00208         break;
00209     case KSM_SEEK_END:
00210         seek_pos = fd->size;
00211         break;
00212     case KSM_SEEK_CUR:
00213         seek_pos = fd->seek_pos;
00214         break;
00215     default:
00216         ASSERT(0);
00217         return EOF;
00218         break;
00219     }
00220
00221     /* Bound check */
00222     if (seek_pos + offset > fd->size)
00223         LOG_INFO("seek outside EOF\n");
00224
00225     fd->seek_pos = seek_pos + offset;
00226
00227     return fd->seek_pos;
00228 }
00229
00235 struct KFile * kfile_genericReopen(struct KFile *fd)
00236 {
00237     kfile_flush(fd);
00238     kfile_seek(fd, 0, KSM_SEEK_SET);
00239     return fd;
00240 }
00241
00246 int kfile_genericClose(struct KFile *fd)
00247 {
00248     return kfile_flush(fd);
00249 }
00250
00251
00261 void kfile_resync(KFile *fd, mtime_t delay)
00262 {
00263     ticks_t start_time = timer_clock();
00264     for(;;)
00265     {
00266         if(kfile_getc(fd) != EOF)
00267             start_time = timer_clock();
00268
00269         if ((timer_clock() - start_time) > ms_to_ticks(delay))
00270         {
00271             kfile_clearerr(fd);
00272             break;
00273         }
00274
00275     }
00276 }
00277
00282 static int kfile_generic(UNUSED_ARG(struct KFile *, fd))
00283 {
00284     return 0;
00285 };
00286
00287
00291 void kfile_init(struct KFile *fd)
00292 {
00293     ASSERT(fd);
00294     memset(fd, 0, sizeof(*fd));
00295     fd->clearerr = (ClearErrFunc_t)kfile_generic;
00296     fd->close =  kfile_genericClose;
00297     fd->error = kfile_generic;
00298     fd->flush = kfile_generic;
00299     fd->read = (ReadFunc_t)kfile_generic;
00300     fd->reopen = kfile_genericReopen;
00301     fd->seek = kfile_genericSeek;
00302     fd->write = (WriteFunc_t)kfile_generic;
00303 }
00304


BeRTOS: kfile_block.c File Reference

  • io
Defines | Functions
kfile_block.c File Reference

KFile interface over a KBlock. More...

#include "kfile_block.h"
#include <string.h>

Go to the source code of this file.

Defines

#define | KFT_KFILEBLOCK MAKE_ID('K', 'F', 'B', 'L')
ID for KFile over a KBlock.

Functions

KFileBlock * | KFILEBLOCK_CAST (KFile *fd)
Convert + ASSERT from generic KFile to KFileBlock.
void | kfileblock_init (KFileBlock *fb, KBlock *blk)
Init a KFile over KBlock.

Detailed Description

KFile interface over a KBlock.

Author:
Francesco Sacchi <batt@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file kfile_block.c.


BeRTOS: kfile_block.c Source File

  • io
kfile_block.c
Go to the documentation of this file.
00001
00040 #include "kfile_block.h"
00041 #include <string.h>
00042
00043
00047 #define KFT_KFILEBLOCK MAKE_ID('K', 'F', 'B', 'L')
00048
00052 INLINE KFileBlock * KFILEBLOCK_CAST(KFile *fd)
00053 {
00054     ASSERT(fd->_type == KFT_KFILEBLOCK);
00055     return (KFileBlock *)fd;
00056 }
00057
00058 #define KFILEBLOCK(dir, fd, buf, size) \
00059 ({ \
00060     KFileBlock *fb = KFILEBLOCK_CAST(fd); \
00061     size_t len = 0; \
00062     while (size) \
00063     { \
00064         block_idx_t id = (fd)->seek_pos / fb->blk->blk_size; \
00065         if (id >= fb->blk->blk_cnt) \
00066             break; \
00067         size_t offset = (fd)->seek_pos % fb->blk->blk_size; \
00068         size_t count = MIN(size, (size_t)(fb->blk->blk_size - offset)); \
00069         size_t ret_len = kblock_##dir(fb->blk, id, buf, offset, count); \
00070         size -= ret_len; \
00071         (fd)->seek_pos += ret_len; \
00072         buf = buf + ret_len; \
00073         len += ret_len; \
00074         if (ret_len != count) \
00075             break; \
00076     } \
00077     len; \
00078 })
00079
00080 static size_t kfileblock_read(struct KFile *fd, void *_buf, size_t size)
00081 {
00082     uint8_t *buf = (uint8_t *)_buf;
00083     return KFILEBLOCK(read, fd, buf, size);
00084 }
00085
00086 static size_t kfileblock_write(struct KFile *fd, const void *_buf, size_t size)
00087 {
00088     const uint8_t *buf = (const uint8_t *)_buf;
00089     return KFILEBLOCK(write, fd, buf, size);
00090 }
00091
00092 static int kfileblock_flush(struct KFile *fd)
00093 {
00094     KFileBlock *fb = KFILEBLOCK_CAST(fd);
00095     return kblock_flush(fb->blk);
00096 }
00097
00098 static int kfileblock_error(struct KFile *fd)
00099 {
00100     KFileBlock *fb = KFILEBLOCK_CAST(fd);
00101     return kblock_error(fb->blk);
00102 }
00103
00104 static void kfileblock_clearerr(struct KFile *fd)
00105 {
00106     KFileBlock *fb = KFILEBLOCK_CAST(fd);
00107     return kblock_clearerr(fb->blk);
00108 }
00109
00110 static int kfileblock_close(struct KFile *fd)
00111 {
00112     KFileBlock *fb = KFILEBLOCK_CAST(fd);
00113     return kblock_close(fb->blk);
00114 }
00115
00116 void kfileblock_init(KFileBlock *fb, KBlock *blk)
00117 {
00118     ASSERT(fb);
00119     ASSERT(blk);
00120     memset(fb, 0, sizeof(*fb));
00121     kfile_init(&fb->fd);
00122     DB(fb->fd._type = KFT_KFILEBLOCK);
00123     fb->blk = blk;
00124     fb->fd.size = blk->blk_cnt * blk->blk_size;
00125     fb->fd.read = kfileblock_read;
00126     fb->fd.write = kfileblock_write;
00127     fb->fd.flush = kfileblock_flush;
00128     fb->fd.error = kfileblock_error;
00129     fb->fd.clearerr = kfileblock_clearerr;
00130     fb->fd.close = kfileblock_close;
00131 }


BeRTOS: kfile_block.h File Reference

  • io
Data Structures | Functions
kfile_block.h File Reference
#include <cfg/compiler.h>
#include <io/kblock.h>
#include <io/kfile.h>

Go to the source code of this file.

Data Structures

struct | KFileBlock
KFileBlock context. More...

Functions

void | kfileblock_init (KFileBlock *fb, KBlock *blk)
Init a KFile over KBlock.

Detailed Description

Definition in file kfile_block.h.


BeRTOS: kfile_block.h Source File

  • io
kfile_block.h
Go to the documentation of this file.
00001
00070 #ifndef IO_KFILE_BLOCK_H
00071 #define IO_KFILE_BLOCK_H
00072
00073 #include <cfg/compiler.h>
00074 #include <io/kblock.h>
00075 #include <io/kfile.h>
00076
00080 typedef struct KFileBlock
00081 {
00082     KFile fd;
00083     KBlock *blk;
00084 } KFileBlock;
00085
00096 void kfileblock_init(KFileBlock *fb, KBlock *blk);
00097  //defgroup kfile_block
00099
00100 #endif /* IO_KFILE_KBLOCK_H */


BeRTOS: kfile_debug.c File Reference

  • cfg
Functions
kfile_debug.c File Reference

KFile interface over debug. More...

#include "kfile_debug.h"
#include <io/kfile.h>
#include <string.h>

Go to the source code of this file.

Functions

void kfiledebug_init (KFileDebug *kd)
Initialize KFileMem struct.

Detailed Description

KFile interface over debug.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file kfile_debug.c.

Function Documentation

void kfiledebug_init ( KFileDebug * km )

Initialize KFileMem struct.

Parameters:
km Interface to initialize.

Definition at line 54 of file kfile_debug.c.


BeRTOS: kfile_debug.c Source File

  • cfg
kfile_debug.c
Go to the documentation of this file.
00001
00038 #include "kfile_debug.h"
00039
00040 #include <io/kfile.h>
00041
00042 #include <string.h>
00043
00044
00045 static size_t kfiledebug_write(struct KFile *_fd, const void *buf, size_t size)
00046 {
00047     KFILEDEBUG_CAST(_fd);
00048
00049     kprintf("%.*s", (int)size, (const char *)buf);
00050
00051     return size;
00052 }
00053
00054 void kfiledebug_init(KFileDebug *kd)
00055 {
00056     ASSERT(kd);
00057
00058     memset(kd, 0, sizeof(*kd));
00059
00060     kfile_init(&kd->fd);
00061     kd->fd.write = kfiledebug_write;
00062     DB(kd->fd._type = KFT_KFILEDEBUG);
00063 }


BeRTOS: kfile_debug.h File Reference

  • cfg
Data Structures | Defines | Functions
kfile_debug.h File Reference

KFile interface over a debug console. More...

#include <io/kfile.h>

Go to the source code of this file.

Data Structures

struct | KFileDebug
Context for KFile over debug console. More...

Defines

#define | KFT_KFILEDEBUG MAKE_ID('K', 'D', 'B', 'G')
ID for KFileDebug.

Functions

KFileDebug * | KFILEDEBUG_CAST (KFile *fd)
Convert + ASSERT from generic KFile to KFileDebug.
void | kfiledebug_init (KFileDebug *km)
Initialize KFileMem struct.

Detailed Description

KFile interface over a debug console.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file kfile_debug.h.

Function Documentation

void kfiledebug_init ( KFileDebug * km )

Initialize KFileMem struct.

Parameters:
km Interface to initialize.

Definition at line 54 of file kfile_debug.c.


BeRTOS: kfile_debug.h Source File

  • cfg
kfile_debug.h
Go to the documentation of this file.
00001
00042 #ifndef CFG_KFILE_DEBUG
00043 #define CFG_KFILE_DEBUG
00044
00045 #include <io/kfile.h>
00046
00050 typedef struct KFileDebug
00051 {
00052     KFile fd;
00053 } KFileDebug;
00054
00058 #define KFT_KFILEDEBUG MAKE_ID('K', 'D', 'B', 'G')
00059
00063 INLINE KFileDebug * KFILEDEBUG_CAST(KFile *fd)
00064 {
00065     ASSERT(fd->_type == KFT_KFILEDEBUG);
00066     return (KFileDebug *)fd;
00067 }
00068
00074 void kfiledebug_init(KFileDebug *km);
00075
00076 #endif /* CFG_KFILE_DEBUG */


BeRTOS: kfile_fifo.c File Reference

  • struct
Functions
kfile_fifo.c File Reference

KFile interface over a FIFO buffer. More...

#include "kfile_fifo.h"
#include "fifobuf.h"
#include <io/kfile.h>
#include <string.h>

Go to the source code of this file.

Functions

void kfilefifo_init (KFileFifo *kf, FIFOBuffer *fifo)
Initialize KFileFifo struct.

Detailed Description

KFile interface over a FIFO buffer.

Author:
Francesco Sacchi <asterix@develer.com>

Definition in file kfile_fifo.c.

Function Documentation

void kfilefifo_init | ( | KFileFifo * | kf,
 |  | FIFOBuffer * | fifo
 | ) |  |

Initialize KFileFifo struct.

Parameters:
kf | Interface to initialize.
fifo | Fifo buffer to operate on.

Definition at line 67 of file kfile_fifo.c.


BeRTOS: kfile_fifo.c Source File

  • struct
kfile_fifo.c
Go to the documentation of this file.
00001
00038 #include "kfile_fifo.h"
00039 #include "fifobuf.h"
00040
00041 #include <io/kfile.h>
00042
00043 #include <string.h>
00044
00045 static size_t kfilefifo_read(struct KFile *_fd, void *_buf, size_t size)
00046 {
00047     KFileFifo *fd = KFILEFIFO_CAST(_fd);
00048     uint8_t *buf = (uint8_t *)_buf;
00049
00050     while (size-- && !fifo_isempty_locked(fd->fifo))
00051         *buf++ = fifo_pop_locked(fd->fifo);
00052
00053     return buf - (uint8_t *)_buf;
00054 }
00055
00056 static size_t kfilefifo_write(struct KFile *_fd, const void *_buf, size_t size)
00057 {
00058     KFileFifo *fd = KFILEFIFO_CAST(_fd);
00059     const uint8_t *buf = (const uint8_t *)_buf;
00060
00061     while (size-- && !fifo_isfull_locked(fd->fifo))
00062         fifo_push_locked(fd->fifo, *buf++);
00063
00064     return buf - (const uint8_t *)_buf;
00065 }
00066
00067 void kfilefifo_init(KFileFifo *kf, FIFOBuffer *fifo)
00068 {
00069     memset(kf, 0, sizeof(*kf));
00070
00071     kf->fifo = fifo;
00072     kf->fd.read = kfilefifo_read;
00073     kf->fd.write = kfilefifo_write;
00074     DB(kf->fd._type = KFT_KFILEFIFO);
00075 }


BeRTOS: kfile_fifo.h File Reference

  • struct
Defines | Functions
kfile_fifo.h File Reference

KFile interface over a FIFO buffer. More...

#include "fifobuf.h"
#include <io/kfile.h>

Go to the source code of this file.

Defines

#define | KFT_KFILEFIFO MAKE_ID('F', 'I', 'F', '0')
ID for KFile FIFO.

Functions

KFileFifo * | KFILEFIFO_CAST (KFile *fd)
Convert + ASSERT from generic KFile to KFileFifo.
void | kfilefifo_init (KFileFifo *kf, FIFOBuffer *fifo)
Initialize KFileFifo struct.

Detailed Description

KFile interface over a FIFO buffer.

Convenient way to push data into a FIFO using the KFile interface. For example, it's possible to read from a serial port and put the characters into a fifo:

 // serial reader process
 {
   // other stuff here...
   kfile_read(&ser_port.fd, buffer, sizeof(buffer));
   kfile_write(&kfifo.fd, buffer, sizeof(buffer));
   // ...
 }

 // controller process
 {
   //...
   kfile_read(&kfifo.fd, buffer2, sizeof(buffer2));
   // use read data
 }
Author:
Francesco Sacchi <asterix@develer.com>

Definition in file kfile_fifo.h.

Function Documentation

void kfilefifo_init | ( | KFileFifo * | kf,
 |  | FIFOBuffer * | fifo
 | ) |  |

Initialize KFileFifo struct.

Parameters:
kf | Interface to initialize.
fifo | Fifo buffer to operate on.

Definition at line 67 of file kfile_fifo.c.


BeRTOS: kfile_fifo.h Source File

  • struct
kfile_fifo.h
Go to the documentation of this file.
00001
00062 #ifndef STRUCT_KFILE_FIFO
00063 #define STRUCT_KFILE_FIFO
00064
00065 #include "fifobuf.h"
00066 #include <io/kfile.h>
00067
00068 typedef struct KFileFifo
00069 {
00070         KFile fd;
00071         FIFOBuffer *fifo;
00072 } KFileFifo;
00073
00077 #define KFT_KFILEFIFO MAKE_ID('F', 'I', 'F', '0')
00078
00082 INLINE KFileFifo * KFILEFIFO_CAST(KFile *fd)
00083 {
00084     ASSERT(fd->_type == KFT_KFILEFIFO);
00085     return (KFileFifo *)fd;
00086 }
00087
00094 void kfilefifo_init(KFileFifo *kf, FIFOBuffer *fifo);
00095
00096 int kfilefifo_testSetup(void);
00097 int kfilefifo_testRun(void);
00098 int kfilefifo_testTearDown(void);
00099 #endif /* STRUCT_KFILE_FIFO */


BeRTOS: kfile_mem.c File Reference

  • struct
Functions
kfile_mem.c File Reference

KFile interface over a memory buffer. More...

#include "kfile_mem.h"
#include <io/kfile.h>
#include <string.h>

Go to the source code of this file.

Functions

void kfilemem_init (KFileMem *km, void *mem, size_t len)
Initialize KFileMem struct.

Detailed Description

KFile interface over a memory buffer.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file kfile_mem.c.

Function Documentation

void kfilemem_init | ( | KFileMem * | km,
 |  | void * | mem,
 |  | size_t | len
 | ) |  |

Initialize KFileMem struct.

Parameters:
km | Interface to initialize.
mem | Pointer to the memory buffer to operate on.
len | Size of the buffer

Definition at line 68 of file kfile_mem.c.


BeRTOS: kfile_mem.c Source File

  • struct
kfile_mem.c
Go to the documentation of this file.
00001
00038 #include "kfile_mem.h"
00039
00040 #include <io/kfile.h>
00041
00042 #include <string.h>
00043
00044 static size_t kfilemem_read(struct KFile *_fd, void *buf, size_t size)
00045 {
00046     KFileMem *fd = KFILEMEM_CAST(_fd);
00047
00048     size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos);
00049     uint8_t *mem = (uint8_t *)fd->mem;
00050     memcpy(buf, mem + fd->fd.seek_pos, size);
00051     fd->fd.seek_pos += size;
00052
00053     return size;
00054 }
00055
00056 static size_t kfilemem_write(struct KFile *_fd, const void *buf, size_t size)
00057 {
00058     KFileMem *fd = KFILEMEM_CAST(_fd);
00059
00060     size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos);
00061     uint8_t *mem = (uint8_t *)fd->mem;
00062     memcpy(mem + fd->fd.seek_pos, buf, size);
00063     fd->fd.seek_pos += size;
00064
00065     return size;
00066 }
00067
00068 void kfilemem_init(KFileMem *km, void *mem, size_t len)
00069 {
00070     ASSERT(km);
00071     ASSERT(mem);
00072     ASSERT(len);
00073
00074     memset(km, 0, sizeof(*km));
00075
00076     km->mem = mem;
00077     kfile_init(&km->fd);
00078     km->fd.read = kfilemem_read;
00079     km->fd.write = kfilemem_write;
00080     km->fd.size = len;
00081     DB(km->fd._type = KFT_KFILEMEM);
00082 }


BeRTOS: kfile_mem.h File Reference

  • struct
Data Structures | Defines | Functions
kfile_mem.h File Reference

KFile interface over a memory buffer. More...

#include <io/kfile.h>

Go to the source code of this file.

Data Structures

struct | KFileMem
Context for KFile over memory buffer. More...

Defines

#define | KFT_KFILEMEM MAKE_ID('M', 'E', 'M', '0')
ID for KFile Mem.

Functions

KFileMem * | KFILEMEM_CAST (KFile *fd)
Convert + ASSERT from generic KFile to KFileMem.
void | kfilemem_init (KFileMem *km, void *mem, size_t len)
Initialize KFileMem struct.

Detailed Description

KFile interface over a memory buffer.

Convenient way to access a memory region using the KFile interface.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file kfile_mem.h.

Function Documentation

void kfilemem_init | ( | KFileMem * | km,
 |  | void * | mem,
 |  | size_t | len
 | ) |  |

Initialize KFileMem struct.

Parameters:
km | Interface to initialize.
mem | Pointer to the memory buffer to operate on.
len | Size of the buffer

Definition at line 68 of file kfile_mem.c.


BeRTOS: kfile_mem.h Source File

  • struct
kfile_mem.h
Go to the documentation of this file.
00001
00044 #ifndef STRUCT_KFILE_MEM
00045 #define STRUCT_KFILE_MEM
00046
00047 #include <io/kfile.h>
00048
00052 typedef struct KFileMem
00053 {
00054     KFile fd;
00055     void *mem;
00056 } KFileMem;
00057
00061 #define KFT_KFILEMEM MAKE_ID('M', 'E', 'M', '0')
00062
00066 INLINE KFileMem * KFILEMEM_CAST(KFile *fd)
00067 {
00068     ASSERT(fd->_type == KFT_KFILEMEM);
00069     return (KFileMem *)fd;
00070 }
00071
00079 void kfilemem_init(KFileMem *km, void *mem, size_t len);
00080
00081 #endif /* STRUCT_KFILE_MEM */


BeRTOS: kfile_posix.c File Reference

  • emul
kfile_posix.c File Reference

KFile interface implementation in Posix systems. More...

#include <emul/kfile_posix.h>
#include <string.h>

Go to the source code of this file.

Detailed Description

KFile interface implementation in Posix systems.

Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file kfile_posix.c.


BeRTOS: kfile_posix.c Source File

  • emul
kfile_posix.c
Go to the documentation of this file.
00001
00038 #include <emul/kfile_posix.h>
00039 #include <string.h>
00040
00041 static size_t kfile_posix_read(struct KFile *_fd, void *buf, size_t size)
00042 {
00043     KFilePosix *fd = KFILEPOSIX_CAST(_fd);
00044     size_t len = fread(buf, sizeof(uint8_t), size, fd->fp);
00045     fd->fd.seek_pos += len;
00046     return len;
00047 }
00048
00049 static size_t kfile_posix_write(struct KFile *_fd, const void *buf, size_t size)
00050 {
00051     KFilePosix *fd = KFILEPOSIX_CAST(_fd);
00052     size_t len = fwrite(buf, sizeof(uint8_t), size, fd->fp);
00053     fd->fd.seek_pos += len;
00054     fd->fd.size = MAX(fd->fd.size, fd->fd.seek_pos);
00055     return len;
00056 }
00057
00058 static kfile_off_t kfile_posix_seek(struct KFile *_fd, kfile_off_t offset, KSeekMode whence)
00059 {
00060     KFilePosix *fd = KFILEPOSIX_CAST(_fd);
00061     int std_whence;
00062     switch (whence)
00063     {
00064         case KSM_SEEK_CUR:
00065             std_whence = SEEK_CUR;
00066             break;
00067         case KSM_SEEK_END:
00068             std_whence = SEEK_END;
00069             break;
00070         case KSM_SEEK_SET:
00071             std_whence = SEEK_SET;
00072             break;
00073         default:
00074             ASSERT(0);
00075             return EOF;
00076     }
00077     int err = fseek(fd->fp, offset, std_whence);
00078     if (err)
00079         return err;
00080
00081     fd->fd.seek_pos = ftell(fd->fp);
00082     return fd->fd.seek_pos;
00083 }
00084
00085 static int kfile_posix_close(struct KFile *_fd)
00086 {
00087     KFilePosix *fd = KFILEPOSIX_CAST(_fd);
00088     return fclose(fd->fp);
00089 }
00090
00091 static int kfile_posix_flush(struct KFile *_fd)
00092 {
00093     KFilePosix *fd = KFILEPOSIX_CAST(_fd);
00094     return fflush(fd->fp);
00095 }
00096
00097 FILE *kfile_posix_init(KFilePosix *file, const char *filename, const char *mode)
00098 {
00099     memset(file, 0, sizeof(*file));
00100     DB(file->fd._type = KFT_KFILEPOSIX);
00101     file->fd.read = kfile_posix_read;
00102     file->fd.write = kfile_posix_write;
00103     file->fd.close = kfile_posix_close;
00104     file->fd.seek = kfile_posix_seek;
00105     file->fd.flush = kfile_posix_flush;
00106
00107     file->fp = fopen(filename, mode);
00108     fseek(file->fp, 0, SEEK_END);
00109     file->fd.size = ftell(file->fp);
00110     fseek(file->fp, 0, SEEK_SET);
00111     return file->fp;
00112 }


BeRTOS: kfile_posix.h File Reference

  • emul
kfile_posix.h File Reference

KFile interface implementation in Posix systems. More...

#include <io/kfile.h>
#include <stdio.h>

Go to the source code of this file.

Detailed Description

KFile interface implementation in Posix systems.

Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file kfile_posix.h.


BeRTOS: kfile_posix.h Source File

  • emul
kfile_posix.h
Go to the documentation of this file.
00001
00038 #ifndef KFILE_POSIX_H
00039 #define KFILE_POSIX_H
00040
00041 #include <io/kfile.h>
00042 #include <stdio.h>
00043
00044 typedef struct KFilePosix
00045 {
00046   KFile fd;
00047   FILE *fp;
00048 } KFilePosix;
00049
00050 #define KFT_KFILEPOSIX MAKE_ID('K', 'F', 'T', 'P')
00051
00052 INLINE KFilePosix *KFILEPOSIX_CAST(KFile *fd)
00053 {
00054   ASSERT(fd->_type == KFT_KFILEPOSIX);
00055   return (KFilePosix *)fd;
00056 }
00057
00058 FILE *kfile_posix_init(KFilePosix *file, const char *filename, const char *mode);
00059
00060 #endif /* KFILE_POSIX_H */


BeRTOS: lcd_32122a.c File Reference

  • drv
Defines | Functions | Variables
lcd_32122a.c File Reference

Displaytech 32122A LCD driver. More...

#include "lcd_32122a.h"
#include "hw/hw_lcd_32122a.h"
#include "cfg/cfg_lcd_32122a.h"
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <cfg/module.h>
#include <gfx/gfx.h>
#include <drv/timer.h>
#include <drv/pwm.h>
#include <cpu/irq.h>
#include <cpu/types.h>

Go to the source code of this file.

Defines

#define | LCD_PAGES 4
Number of LCD pages.
#define | LCD_PAGESIZE (LCD_WIDTH / 2)
Width of an LCD page.
32122A Commands
#define | LCD_CMD_DISPLAY_ON 0xAF
#define | LCD_CMD_DISPLAY_OFF 0xAE
#define | LCD_CMD_STARTLINE 0xC0
#define | LCD_CMD_PAGEADDR 0xB8
#define | LCD_CMD_COLADDR 0x00
#define | LCD_CMD_ADC_LEFT 0xA1
#define | LCD_CMD_ADC_RIGHT 0xA0
#define | LCD_CMD_STATIC_OFF 0xA4
#define | LCD_CMD_STATIC_ON 0xA5
#define | LCD_CMD_DUTY_32 0xA9
#define | LCD_CMD_DUTY_16 0xA8
#define | LCD_CMD_RMW_ON 0xE0
#define | LCD_CMD_RMW_OFF 0xEE
#define | LCD_CMD_RESET 0xE2

Functions

uint8_t | lcd_32122_read (uint8_t chip)
void | lcd_32122_write (uint8_t c, uint8_t chip)
void | lcd_32122_setPwm (int duty)
Set LCD contrast PWM.
void | lcd_32122_blitBitmap (const Bitmap *bm)
Update the LCD display with data from the provided bitmap.
void | lcd_32122_init (void)
Initialize LCD subsystem.

Variables

static uint8_t | lcd_raster [RAST_SIZE(LCD_WIDTH, LCD_HEIGHT)]
Raster buffer to draw into.
struct Bitmap | lcd_bitmap
Default LCD bitmap.

Detailed Description

Displaytech 32122A LCD driver.

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file lcd_32122a.c.

Function Documentation

void lcd_32122_init ( void )

Initialize LCD subsystem.

Note:
The PWM used for LCD contrast is initialized in drv/pwm.c because it is the same PWM used for output attenuation.

Definition at line 306 of file lcd_32122a.c.

uint8_t lcd_32122_read ( uint8_t chip ) [inline]

      __________________
 A0   __/            \__
         ____________
 R/W  __/            \__
            _______
 E1   _____/       \____

 DATA -------<=====>----

Definition at line 171 of file lcd_32122a.c.

void lcd_32122_write | ( | uint8_t | c,
 |  | uint8_t | chip
 | ) |  | [inline]

      __________________
 A0   ___/          \___

 R/W  __________________
            ______
 E1   _____/      \_____

 DATA -<==============>-

Definition at line 204 of file lcd_32122a.c.

Variable Documentation

uint8_t lcd_raster[RAST_SIZE(LCD_WIDTH, LCD_HEIGHT)] [static]

Raster buffer to draw into.

Bits in the bitmap bytes have vertical orientation, as required by the LCD driver.

Definition at line 132 of file lcd_32122a.c.


BeRTOS: lcd_32122a.c Source File

  • drv
lcd_32122a.c
Go to the documentation of this file.
00001
00042 #include "lcd_32122a.h"
00043
00044 #include "hw/hw_lcd_32122a.h"
00045
00046 #include "cfg/cfg_lcd_32122a.h"
00047
00048 #include <cfg/macros.h> /* BV() */
00049 #include <cfg/debug.h>
00050 #include <cfg/module.h>
00051
00052 #include <gfx/gfx.h>
00053
00054 #include <drv/timer.h>
00055 #include <drv/pwm.h>
00056
00057 #include <cpu/irq.h>
00058 #include <cpu/types.h>
00059
00060
00062 #define LCD_PAGES 4
00063
00065 #define LCD_PAGESIZE (LCD_WIDTH / 2)
00066
00071 #define LCD_CMD_DISPLAY_ON  0xAF
00072 #define LCD_CMD_DISPLAY_OFF 0xAE
00073 #define LCD_CMD_STARTLINE   0xC0
00074 #define LCD_CMD_PAGEADDR    0xB8
00075 #define LCD_CMD_COLADDR     0x00
00076 #define LCD_CMD_ADC_LEFT    0xA1
00077 #define LCD_CMD_ADC_RIGHT   0xA0
00078 #define LCD_CMD_STATIC_OFF  0xA4
00079 #define LCD_CMD_STATIC_ON   0xA5
00080 #define LCD_CMD_DUTY_32     0xA9
00081 #define LCD_CMD_DUTY_16     0xA8
00082 #define LCD_CMD_RMW_ON      0xE0
00083 #define LCD_CMD_RMW_OFF     0xEE
00084 #define LCD_CMD_RESET       0xE2
00085
00088 /* Status flags */
00089 #define LCDF_BUSY BV(7)
00090
00091 #if CONFIG_LCD_WAIT
00092
00105     #define WAIT_LCD \
00106         do { \
00107             uint8_t status; \
00108             LCD_DB_IN; \
00109             do { \
00110                 LCD_SET_RD; \
00111                 LCD_CLR_A0; \
00112                 LCD_SET_E1; \
00113                 LCD_DELAY_READ; \
00114                 status = LCD_READ; \
00115                 LCD_CLR_E1; \
00116                 LCD_SET_A0; \
00117                 LCD_CLR_RD; \
00118             } while (status & LCDF_BUSY); \
00119             LCD_DB_OUT; \
00120         } while (0)
00121 #else /* CONFIG_LCD_WAIT */
00122     #define WAIT_LCD do {} while(0)
00123 #endif /* CONFIG_LCD_WAIT */
00124
00125
00132 static uint8_t lcd_raster[RAST_SIZE(LCD_WIDTH, LCD_HEIGHT)];
00133
00135 struct Bitmap lcd_bitmap;
00136
00137
00138 #if CONFIG_LCD_SOFTINT_REFRESH
00139
00141 static Timer lcd_refresh_timer;
00142
00143 #endif /* CONFIG_LCD_SOFTINT_REFRESH */
00144
00145
00146 INLINE void lcd_32122_cmd(uint8_t cmd, uint8_t chip)
00147 {
00148     WAIT_LCD;
00149
00150     /*      __              __
00151      * A0   __\____________/__
00152      *
00153      * R/W  __________________
00154      *            ______
00155      * E1   _____/      \_____
00156      *
00157      * DATA --<============>--
00158      */
00159     LCD_WRITE(cmd);
00160     //LCD_DB_OUT;
00161     LCD_CLR_A0;
00162     LCD_SET_E(chip);
00163     LCD_DELAY_WRITE;
00164     LCD_CLR_E(chip);
00165     LCD_SET_A0;
00166     //LCD_DB_IN;
00167
00168 }
00169
00170
00171 INLINE uint8_t lcd_32122_read(uint8_t chip)
00172 {
00173     uint8_t data;
00174
00175     WAIT_LCD;
00176
00190     LCD_DB_IN;
00191     //LCD_SET_A0;
00192     LCD_SET_RD;
00193     LCD_SET_E(chip);
00194     LCD_DELAY_READ;
00195     data = LCD_READ;
00196     LCD_CLR_E(chip);
00197     LCD_CLR_RD;
00198     //LCD_CLR_A0;
00199     LCD_DB_OUT;
00200
00201     return data;
00202 }
00203
00204 INLINE void lcd_32122_write(uint8_t c, uint8_t chip)
00205 {
00206     WAIT_LCD;
00207
00221     LCD_WRITE(c);
00222     //LCD_DB_OUT;
00223     //LCD_SET_A0;
00224     LCD_SET_E(chip);
00225     LCD_DELAY_WRITE;
00226     LCD_CLR_E(chip);
00227     //LCD_CLR_A0;
00228     //LCD_DB_IN;
00229 }
00230
00231 static void lcd_32122_clear(void)
00232 {
00233     uint8_t page, j;
00234
00235     for (page = 0; page < LCD_PAGES; ++page)
00236     {
00237         lcd_32122_cmd(LCD_CMD_COLADDR, LCDF_E1 | LCDF_E2);
00238         lcd_32122_cmd(LCD_CMD_PAGEADDR | page, LCDF_E1 | LCDF_E2);
00239         for (j = 0; j < LCD_PAGESIZE; j++)
00240             lcd_32122_write(0, LCDF_E1 | LCDF_E2);
00241     }
00242 }
00243
00244
00245 static void lcd_32122_writeRaster(const uint8_t *raster)
00246 {
00247     uint8_t page, rows;
00248     const uint8_t *right_raster;
00249
00250     for (page = 0; page < LCD_PAGES; ++page)
00251     {
00252         lcd_32122_cmd(LCD_CMD_PAGEADDR | page, LCDF_E1 | LCDF_E2);
00253         lcd_32122_cmd(LCD_CMD_COLADDR | 0, LCDF_E1 | LCDF_E2);
00254
00255         /* Super optimized lamer loop */
00256         right_raster = raster + LCD_PAGESIZE;
00257         rows = LCD_PAGESIZE;
00258         do
00259         {
00260             lcd_32122_write(*raster++, LCDF_E1);
00261             lcd_32122_write(*right_raster++, LCDF_E2);
00262         }
00263         while (--rows);
00264         raster = right_raster;
00265     }
00266 }
00267
00268 #if CONFIG_LCD_SOFTINT_REFRESH
00269
00270 static void lcd_32122_refreshSoftint(void)
00271 {
00272     lcd_32122_blitBitmap(&lcd_bitmap);
00273     timer_setDelay(&lcd_refresh_timer, ms_to_ticks(CONFIG_LCD_REFRESH));
00274     timer_add(&lcd_refresh_timer);
00275 }
00276
00277 #endif /* CONFIG_LCD_SOFTINT_REFRESH */
00278
00282 void lcd_32122_setPwm(int duty)
00283 {
00284     ASSERT(duty >= LCD_MIN_PWM);
00285     ASSERT(duty <= LCD_MAX_PWM);
00286
00287     pwm_setDuty(LCD_PWM_CH, duty);
00288     pwm_enable(LCD_PWM_CH, true);
00289 }
00290
00294 void lcd_32122_blitBitmap(const Bitmap *bm)
00295 {
00296     lcd_32122_writeRaster(bm->raster);
00297 }
00298
00299
00306 void lcd_32122_init(void)
00307 {
00308     MOD_CHECK(timer);
00309
00310     pwm_init();
00311
00312     lcd_32122a_hw_bus_init();
00313     LCD_32122_RESET();
00314
00315     lcd_32122_cmd(LCD_CMD_RESET, LCDF_E1 | LCDF_E2);
00316     lcd_32122_cmd(LCD_CMD_DISPLAY_ON, LCDF_E1 | LCDF_E2);
00317     lcd_32122_cmd(LCD_CMD_STARTLINE | 0, LCDF_E1 | LCDF_E2);
00318
00319
00320     lcd_32122_clear();
00321     lcd_32122_setPwm(LCD_DEF_PWM);
00322
00323     gfx_bitmapInit(&lcd_bitmap, lcd_raster, LCD_WIDTH, LCD_HEIGHT);
00324     gfx_bitmapClear(&lcd_bitmap);
00325
00326 #if CONFIG_LCD_SOFTINT_REFRESH
00327     /* Init IRQ driven LCD refresh */
00328     timer_setSoftint(&lcd_refresh_timer, (Hook)lcd_32122_refreshSoftint, 0);
00329     timer_setDelay(&lcd_refresh_timer, ms_to_ticks(CONFIG_LCD_REFRESH));
00330     timer_add(&lcd_refresh_timer);
00331 #endif /* CONFIG_LCD_SOFTINT_REFRESH */
00332
00333 }
00334


BeRTOS: lcd_32122a.h File Reference

  • drv
Functions
lcd_32122a.h File Reference

Displaytech 32122A LCD driver. More...

#include <gfx/gfx.h>

Go to the source code of this file.

Functions

void | lcd_32122_init (void)
Initialize LCD subsystem.
void | lcd_32122_setPwm (int duty)
Set LCD contrast PWM.
void | lcd_32122_blitBitmap (const Bitmap *bm)
Update the LCD display with data from the provided bitmap.

Detailed Description

Displaytech 32122A LCD driver.

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file lcd_32122a.h.

Function Documentation

void lcd_32122_init ( void )

Initialize LCD subsystem.

Note:
The PWM used for LCD contrast is initialized in drv/pwm.c because it is the same PWM used for output attenuation.

Definition at line 306 of file lcd_32122a.c.


BeRTOS: lcd_32122a.h Source File

  • drv
lcd_32122a.h
Go to the documentation of this file.
00001
00045 #ifndef DRV_LCD_32122A_H
00046 #define DRV_LCD_32122A_H
00047
00048 /* Display bitmap dims */
00049 #define LCD_WIDTH 122
00050 #define LCD_HEIGHT 32
00051
00052 #include <gfx/gfx.h> /* Bitmap */
00053
00054 #warning __FILTER_NEXT_WARNING__
00055 #warning this drive is untested..
00056
00057 void lcd_32122_init(void);
00058 void lcd_32122_setPwm(int duty);
00059 void lcd_32122_blitBitmap(const Bitmap *bm);
00060
00061 #endif /* DRV_LCD_32122A_H */


BeRTOS: lcd_gfx_hwtest.c File Reference

  • drv
lcd_gfx_hwtest.c File Reference

dot-matrix LCD test. More...

Go to the source code of this file.

Detailed Description

dot-matrix LCD test.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file lcd_gfx_hwtest.c.


BeRTOS: lcd_gfx_hwtest.c Source File

  • drv
lcd_gfx_hwtest.c
Go to the documentation of this file.
00001
00040 #warning FIXME: broken test!
00041
00042 #if 0
00043
00044 #include <drv/lcd_gfx.h>
00045 #include <gfx/gfx.h>
00046
00047 #include <emul/emul.h>
00048
00049 static void magic(struct Bitmap *bitmap, coord_t x, coord_t y)
00050 {
00051     static const coord_t coords[] = { 120, 34, 90, 90, 30, 90, 0, 34, 60, 0, 90, 90, 0, 34, 120, 34, 30, 90, 60, 0 };
00052     unsigned int i;
00053
00054     gfx_moveTo(bitmap, coords[countof(coords)-2]/2 + x, coords[countof(coords)-1]/3 + y);
00055     for (i = 0; i < countof(coords); i += 2)
00056         gfx_lineTo(bitmap, coords[i]/2 + x, coords[i+1]/3 + y);
00057 }
00058
00059 int main(int argc, char *argv[])
00060 {
00061     emul_init(&argc, argv);
00062     lcd_init();
00063
00064     coord_t x = 0, y = LCD_WIDTH / 2;
00065     coord_t xdir = +1, ydir = -1;
00066     Bitmap *bm = &lcd_bitmap;
00067
00068     for(;;)
00069     {
00070         gfx_bitmapClear(bm);
00071         gfx_setClipRect(bm, 0, 0, bm->width, bm->height);
00072         gfx_rectDraw(bm, 10, 10, bm->width-10, bm->height-10);
00073         gfx_setClipRect(bm, 11, 11, bm->width-11, bm->height-11);
00074         magic(bm, x, y);
00075
00076         x += xdir;
00077         y += ydir;
00078         if (x >= bm->width)  xdir = -1;
00079         if (x <= -50)        xdir = +1;
00080         if (y >= bm->height) ydir = -1;
00081         if (y <= -50)        ydir = +1;
00082
00083         lcd_blit_bitmap(bm);
00084         emul_idle();
00085         usleep(10000);
00086     }
00087
00088     emul_cleanup();
00089     return 0;
00090 }
00091
00092 #endif


BeRTOS: lcd_gfx_qt.h File Reference

  • drv
Data Structures
lcd_gfx_qt.h File Reference

Custom control for graphics LCD emulation (interface) More...

#include <gfx/gfx.h>
#include <cfg/compiler.h>
#include <QtGui/QColor>
#include <QtGui/QFrame>

Go to the source code of this file.

Data Structures

class EmulLCD
Qt widget to emulate a dot-matrix LCD display. More...

Detailed Description

Custom control for graphics LCD emulation (interface)

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file lcd_gfx_qt.h.


BeRTOS: lcd_gfx_qt.h Source File

  • drv
lcd_gfx_qt.h
Go to the documentation of this file.
00001
00038 #ifndef DRV_LCD_GFX_QT_H
00039 #define DRV_LCD_GFX_QT_H
00040
00041 // uint8_t
00042 #include <gfx/gfx.h>
00043 #include <cfg/compiler.h>
00044
00045 #include <QtGui/QColor>
00046 #include <QtGui/QFrame>
00047
00048 #define LCD_WIDTH   128
00049
00050 // fwd decls
00051 class QSizePolicy;
00052 class QPaintEvent;
00053 class QResizeEvent;
00054
00055 #define CONFIG_EMULLCD_SCALE 1
00056
00057 class EmulLCD : public QFrame
00058 {
00059     Q_OBJECT
00060
00061 public:
00062 // Attributes
00063     enum { WIDTH = 128, HEIGHT = 64 };
00064
00065 // Construction
00066     EmulLCD(QWidget *parent = 0);
00067     virtual ~EmulLCD();
00068
00069 // Base class overrides
00070 protected:
00071     virtual void paintEvent(QPaintEvent *event);
00072
00073     #if CONFIG_EMULLCD_SCALE
00074         virtual int heightForWidth(int w) const;
00075     #endif
00076
00077 // Operations
00078 public:
00079     void writeRaster(uint8_t *raster);
00080
00081 // Implementation
00082 protected:
00084     int frame_width;
00085
00087     QColor fg_color;
00088     QBrush bg_brush;
00089
00091     unsigned char raster[(WIDTH + 7 / 8) * HEIGHT];
00092 };
00093
00094
00095 void lcd_gfx_qt_init(Bitmap *lcd_bitmap);
00096 void lcd_gfx_qt_blitBitmap(const Bitmap *bm);
00097
00098 #endif // DRV_LCD_GFX_QT_H


BeRTOS: lcd_hd44.c File Reference

  • drv
Defines | Functions | Variables
lcd_hd44.c File Reference

LM044L type LCD hardware module (impl.) More...

#include "lcd_hd44.h"
#include "hw/hw_lcd_hd44.h"
#include "cfg/cfg_arch.h"
#include <drv/timer.h>
#include <cfg/debug.h>

Go to the source code of this file.

Defines

#define | LCDF_BUSY BV(7)
Flag di stato del display.

Functions

static uint8_t | lcd_address (uint8_t addr)
Addresses of LCD display character positions, calculated runtime to save RAM.
void | lcd_waitBusy (void)
Wait until the LCD busy flag clears.
void | lcd_moveTo (uint8_t addr)
Move the cursor to addr, only if not already there.
void | lcd_setReg (uint8_t val)
Write a value in LCD data register, waiting for the busy flag.
void | lcd_putc (uint8_t addr, uint8_t c)
Write the character c on display address addr.
void | lcd_remapChar (const char *glyph, char code)
Remap the glyph of a character.

Variables

static lcdpos_t | lcd_current_addr
Current display position.

Detailed Description

LM044L type LCD hardware module (impl.)

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file lcd_hd44.c.

Function Documentation

void lcd_putc | ( | uint8_t | addr,
 |  | uint8_t | c
 | ) |  |

Write the character c on display address addr.

NOTE: argh, the HD44 lcd type is a bad beast: our move/write -> write optimization requires this mess because display lines are interleaved!

Definition at line 338 of file lcd_hd44.c.

void lcd_remapChar | ( | const char * | glyph,
 |  | char | code
 | ) |  |

Remap the glyph of a character.

glyph - bitmap of 8x8 bits. code - must be 0-7 for the Hitachi LCD-II controller.

Definition at line 363 of file lcd_hd44.c.

Variable Documentation

lcdpos_t lcd_current_addr [static]

Current display position.

We remember this to optimize LCD output by avoiding to set the address every time.

Definition at line 134 of file lcd_hd44.c.


BeRTOS: lcd_hd44.c Source File

  • drv
lcd_hd44.c
Go to the documentation of this file.
00001
00039 #include "lcd_hd44.h"
00040
00041 #include "hw/hw_lcd_hd44.h"
00042
00043 #include "cfg/cfg_arch.h"
00044
00045 #include <drv/timer.h>
00046
00047 #warning FIXME: Revise and refactor this code.
00048
00049 #if defined(LCD_READ_H) && defined(LCD_READ_L) && defined(LCD_WRITE_H) && defined(LCD_WRITE_L)
00050     #define CONFIG_LCD_4BIT 1
00051 #elif defined(LCD_READ) && defined(LCD_WRITE)
00052     #define CONFIG_LCD_4BIT 0
00053 #else
00054     #error Incomplete or missing LCD_READ/LCD_WRITE macros
00055 #endif
00056
00058 #define LCDF_BUSY  BV(7)
00059
00060 #if CONFIG_LCD_ADDRESS_FAST == 1
00061 #define lcd_address(x) lcd_address[x]
00062
00066 static const uint8_t lcd_address[] =
00067 {
00068     /* row 0 */
00069     0x80, 0x81, 0x82, 0x83,
00070     0x84, 0x85, 0x86, 0x87,
00071     0x88, 0x89, 0x8A, 0x8B,
00072     0x8C, 0x8D, 0x8E, 0x8F,
00073 #if CONFIG_LCD_COLS > 16
00074     0x90, 0x91, 0x92, 0x93,
00075 #endif
00076
00077     /* row 1 */
00078     0xC0, 0xC1, 0xC2, 0xC3,
00079     0xC4, 0xC5, 0xC6, 0xC7,
00080     0xC8, 0xC9, 0xCA, 0xCB,
00081     0xCC, 0xCD, 0xCE, 0xCF,
00082 #if CONFIG_LCD_COLS > 16
00083     0xD0, 0xD1, 0xD2, 0xD3,
00084 #endif
00085
00086 #if CONFIG_LCD_ROWS > 2
00087     /* row 2 */
00088     0x94, 0x95, 0x96, 0x97,
00089     0x98, 0x99, 0x9A, 0x9B,
00090     0x9C, 0x9D, 0x9E, 0x9F,
00091     0xA0, 0xA1, 0xA2, 0xA3,
00092 #if CONFIG_LCD_COLS > 16
00093     0xA4, 0xA5, 0xA6, 0xA7,
00094 #endif
00095
00096     /* row 3 */
00097     0xD4, 0xD5, 0xD6, 0xD7,
00098     0xD8, 0xD9, 0xDA, 0xDB,
00099     0xDC, 0xDD, 0xDE, 0xDF,
00100     0xE0, 0xE1, 0xE2, 0xE3,
00101 #if CONFIG_LCD_COLS > 16
00102     0xE4, 0xE5, 0xE6, 0xE7,
00103 #endif
00104
00105 #endif /* CONFIG_LCD_ROWS > 2 */
00106 };
00107
00108 STATIC_ASSERT(countof(lcd_address) == CONFIG_LCD_ROWS * CONFIG_LCD_COLS);
00109 #else  /* CONFIG_LCD_ADDRESS_FAST == 0 */
00110
00111 static const uint8_t col_address[] =
00112 {
00113     0x80,
00114     0xC0,
00115 #if CONFIG_LCD_ROWS > 2
00116     0x94,
00117     0xD4
00118 #endif
00119 };
00120 STATIC_ASSERT(countof(col_address) == CONFIG_LCD_ROWS);
00124 static uint8_t lcd_address(uint8_t addr)
00125 {
00126     return col_address[addr / CONFIG_LCD_COLS] + addr % CONFIG_LCD_COLS;
00127 }
00128 #endif /* CONFIG_LCD_ADDRESS_FAST */
00129
00134 static lcdpos_t lcd_current_addr;
00135
00136
00137 #if !defined(ARCH_EMUL) || !(ARCH & ARCH_EMUL)
00138 /*      __________________
00139  * RS
00140  *
00141  * R/W  __________________
00142  *            _______
00143  * ENA  _____/       \____
00144  *
00145  * DATA -<================
00146  */
00147 INLINE void lcd_dataWrite(uint8_t data)
00148 {
00149 #if CONFIG_LCD_4BIT
00150     /* Write high nibble */
00151     LCD_WRITE_H(data);
00152     LCD_SET_E;
00153     LCD_DELAY_WRITE;
00154     LCD_CLR_E;
00155     LCD_DELAY_WRITE;
00156
00157     /* Write low nibble */
00158     LCD_WRITE_L(data);
00159     LCD_SET_E;
00160     LCD_DELAY_WRITE;
00161     LCD_CLR_E;
00162     LCD_DELAY_WRITE;
00163
00164 #else /* !CONFIG_LCD_4BIT */
00165
00166     /* Write data */
00167     LCD_WRITE(data);
00168     LCD_SET_E;
00169     LCD_DELAY_WRITE;
00170     LCD_CLR_E;
00171     LCD_DELAY_WRITE;
00172
00173 #endif /* !CONFIG_LCD_4BIT */
00174 }
00175
00176 /*      __________________
00177  * RS
00178  *         ____________
00179  * R/W  __/            \__
00180  *            _______
00181  * ENA  _____/       \____
00182  *        ______      ____
00183  * DATA X/      \====/
00184  */
00185 INLINE uint8_t lcd_dataRead(void)
00186 {
00187     uint8_t data;
00188
00189     LCD_SET_RD;
00190     LCD_DB_IN;  /* Set bus as input! */
00191     LCD_DELAY_READ;
00192
00193 #if CONFIG_LCD_4BIT
00194
00195     /* Read high nibble */
00196     LCD_SET_E;
00197     LCD_DELAY_READ;
00198     data = LCD_READ_H;
00199     LCD_CLR_E;
00200     LCD_DELAY_READ;
00201
00202     /* Read low nibble */
00203     LCD_SET_E;
00204     LCD_DELAY_READ;
00205     data |= LCD_READ_L;
00206     LCD_CLR_E;
00207     LCD_DELAY_READ;
00208
00209 #else /* !CONFIG_LCD_4BIT */
00210
00211     /* Read data */
00212     LCD_SET_E;
00213     LCD_DELAY_READ;
00214     data = LCD_READ;
00215     LCD_CLR_E;
00216     LCD_DELAY_READ;
00217
00218 #endif /* !CONFIG_LCD_4BIT */
00219
00220     LCD_CLR_RD;
00221     LCD_DB_OUT; /* Reset bus as output! */
00222
00223     return data;
00224 }
00225
00226 /*      ___             __
00227  * RS      \___________/
00228  *
00229  * READ __________________
00230  *            _______
00231  * ENA  _____/       \____
00232  *
00233  * DATA --<===============
00234  */
00235 INLINE void lcd_regWrite(uint8_t data)
00236 {
00237     LCD_CLR_RS;
00238     lcd_dataWrite(data);
00239     LCD_SET_RS;
00240 }
00241
00242 /*      __               _
00243  * RS     \_____________/
00244  *          ___________
00245  * READ ___/           \__
00246  *            _______
00247  * ENA  _____/       \____
00248  *        ______      ____
00249  * DATA X/      \====/
00250  */
00251 INLINE uint8_t lcd_regRead(void)
00252 {
00253     uint8_t data;
00254
00255     LCD_CLR_RS;
00256     data = lcd_dataRead();
00257     LCD_SET_RS;
00258     return data;
00259 }
00260
00261 #if CONFIG_LCD_4BIT
00262
00263 INLINE void lcd_mode4Bit(void)
00264 {
00265     LCD_CLR_RS;
00266
00267     LCD_WRITE_H(LCD_CMD_SETFUNC);
00268     LCD_SET_E;
00269     LCD_DELAY_WRITE;
00270     LCD_CLR_E;
00271     LCD_DELAY_WRITE;
00272
00273     LCD_SET_RS;
00274 }
00275
00276 #endif /* CONFIG_LCD_4BIT */
00277
00278 #else /* ARCH_EMUL */
00279
00280 extern void Emul_LCDWriteReg(uint8_t d);
00281 extern uint8_t Emul_LCDReadReg(void);
00282 extern void Emul_LCDWriteData(uint8_t d);
00283 extern uint8_t Emul_LCDReadData(void);
00284
00285 #define lcd_regWrite(d)   Emul_LCDWriteReg(d)
00286 #define lcd_regRead(d)    Emul_LCDReadReg()
00287 #define lcd_dataWrite(d)  Emul_LCDWriteData(d)
00288 #define lcd_dataRead(d)   Emul_LCDReadData()
00289
00290 #endif /* ARCH_EMUL */
00291
00292
00296 void lcd_waitBusy(void)
00297 {
00298     for (;;)
00299     {
00300         uint8_t val = lcd_regRead();
00301         if (!(val & LCDF_BUSY))
00302             break;
00303     }
00304 }
00305
00306
00310 void lcd_moveTo(uint8_t addr)
00311 {
00312     if (addr != lcd_current_addr)
00313     {
00314         lcd_waitBusy();
00315         lcd_regWrite(lcd_address(addr));
00316         lcd_current_addr = addr;
00317     }
00318 }
00319
00320
00324 void lcd_setReg(uint8_t val)
00325 {
00326     lcd_waitBusy();
00327     lcd_regWrite(val);
00328 }
00329
00330 #include <cfg/debug.h>
00338 void lcd_putc(uint8_t addr, uint8_t c)
00339 {
00340     if (addr != lcd_current_addr)
00341         lcd_setReg(lcd_address(addr));
00342
00343     lcd_waitBusy();
00344     lcd_dataWrite(c);
00345     lcd_current_addr = addr + 1;
00346
00347     /* If we are at end of display wrap the address to 0 */
00348     if (lcd_current_addr == CONFIG_LCD_COLS * CONFIG_LCD_ROWS)
00349         lcd_current_addr = 0;
00350
00351     /* If we are at the end of a row put the cursor at the beginning of the next */
00352     if (!(lcd_current_addr % CONFIG_LCD_COLS))
00353         lcd_setReg(lcd_address(lcd_current_addr));
00354 }
00355
00356
00363 void lcd_remapChar(const char *glyph, char code)
00364 {
00365     int i;
00366
00367     /* Set CG RAM address */
00368     lcd_setReg((uint8_t)((1<<6) | (code << 3)));
00369
00370     /* Write bitmap data */
00371     for (i = 0; i < 8; i++)
00372     {
00373         lcd_waitBusy();
00374         lcd_dataWrite(glyph[i]);
00375     }
00376
00377     /* Move back to original address */
00378     lcd_setReg(lcd_address(lcd_current_addr));
00379 }
00380
00381
00382 #if 0 /* unused */
00383 void lcd_remapfont(void)
00384 {
00385     static const char lcd_glyphs[8] =
00386     {
00387         0x04, 0x0E, 0x15, 0x04, 0x04, 0x04, 0x04, 0x00 /* up arrow */
00388     };
00389     int i;
00390
00391     for (i = 0; i < 15; i++)
00392         lcd_remapChar(i, bernie_char);
00393
00394
00395     lcd_setAddr(lcd_DefLayer, 0);
00396     for (i = 0; i < 80; i++)
00397         lcd_putCharUnlocked(i);
00398 }
00399 #endif /* unused */
00400
00401 void lcd_hw_init(void)
00402 {
00403     lcd_hd44_hw_bus_init();
00404
00405     timer_delay(50);
00406
00407 #if CONFIG_LCD_4BIT
00408     lcd_regWrite(LCD_CMD_SET8BIT);
00409     lcd_mode4Bit();
00410     timer_delay(2);
00411 #endif /* CONFIG_LCD_4BIT */
00412
00413     lcd_regWrite(LCD_CMD_SETFUNC);
00414     timer_delay(2);
00415
00416     lcd_regWrite(LCD_CMD_DISPLAY_ON);
00417     timer_delay(2);
00418
00419     lcd_regWrite(LCD_CMD_CLEAR);
00420     timer_delay(2);
00421
00422 #if !CONFIG_LCD_4BIT
00423     lcd_regWrite(LCD_CMD_RESET_DDRAM); // 4 bit mode doesn't allow char reprogramming
00424 #endif
00425     lcd_regWrite(LCD_CMD_DISPLAYMODE);
00426     timer_delay(2);
00427 }
00428
00429


BeRTOS: lcd_hd44.h File Reference

  • drv
Typedefs | Functions
lcd_hd44.h File Reference

Hitachi HD44780 and clones LCD module. More...

#include "cfg/cfg_lcd_hd44.h"
#include <cfg/compiler.h>

Go to the source code of this file.

Defines

Values for CONFIG_LCD_ROWS.

Select the number of rows which are available on the HD44780 Display.

#define | LCD_HD44_ROWS_2 2
#define | LCD_HD44_ROWS_4 4
Values for CONFIG_LCD_COLS.

Select the number of columns which are available on the HD44780 Display.

#define | LCD_HD44_COLS_16 16
#define | LCD_HD44_COLS_20 20
Hitachi HD44 commands.
#define | LCD_CMD_DISPLAY_INI 0x30
8 bits, 2 lines, 5x7 dots
#define | LCD_CMD_SETFUNC 0x38
8 bits, 2 lines, 5x7 dots
#define | LCD_CMD_SET8BIT 0x30
8 bits, 2 lines, 5x7 dots
#define | LCD_CMD_DISPLAY_ON 0x0F
Switch on display.
#define | LCD_CMD_DISPLAY_OFF 0x08
Switch off display.
#define | LCD_CMD_CLEAR 0x01
Clear display.
#define | LCD_CMD_CURSOR_BLOCK 0x0D
Show cursor (block)
#define | LCD_CMD_CURSOR_LINE 0x0F
Show cursor (line)
#define | LCD_CMD_CURSOR_OFF 0x0C
Hide cursor.
#define | LCD_CMD_DISPLAYMODE 0x06
8 bits, 2 lines, 5x7 dots
#define | LCD_CMD_SET_CGRAMADDR 0x40
8 bits, 2 lines, 5x7 dots
#define | LCD_CMD_RESET_DDRAM 0x80
8 bits, 2 lines, 5x7 dots
#define | LCD_CMD_SET_DDRAMADDR 0x80
8 bits, 2 lines, 5x7 dots
#define | LCD_CMD_DISPLAY_SHIFT 0x18
8 bits, 2 lines, 5x7 dots
#define | LCD_CMD_MOVESHIFT_LEFT 0x00
8 bits, 2 lines, 5x7 dots
#define | LCD_CMD_MOVESHIFT_RIGHT 0x04
8 bits, 2 lines, 5x7 dots

Typedefs

typedef uint8_t | lcdpos_t
Type for combined LCD cursor position (x,y).

Functions

void | lcd_waitBusy (void)
Wait until the LCD busy flag clears.
void | lcd_moveTo (uint8_t addr)
Move the cursor to addr, only if not already there.
void | lcd_setReg (uint8_t val)
Write a value in LCD data register, waiting for the busy flag.
void | lcd_putc (uint8_t a, uint8_t c)
Write the character c on display address addr.
void | lcd_remapChar (const char *glyph, char code)
Remap the glyph of a character.

Detailed Description

Hitachi HD44780 and clones LCD module.

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file lcd_hd44.h.

Typedef Documentation

typedef uint8_t lcdpos_t

Type for combined LCD cursor position (x,y).

Definition at line 99 of file lcd_hd44.h.

Function Documentation

void lcd_putc | ( | uint8_t | addr,
 |  | uint8_t | c
 | ) |  |

Write the character c on display address addr.

NOTE: argh, the HD44 lcd type is a bad beast: our move/write -> write optimization requires this mess because display lines are interleaved!

Definition at line 338 of file lcd_hd44.c.

void lcd_remapChar | ( | const char * | glyph,
 |  | char | code
 | ) |  |

Remap the glyph of a character.

glyph - bitmap of 8x8 bits. code - must be 0-7 for the Hitachi LCD-II controller.

Definition at line 363 of file lcd_hd44.c.


BeRTOS: lcd_hd44.h Source File

  • drv
lcd_hd44.h
Go to the documentation of this file.
00001
00044 #ifndef DRV_LCD_HD44_H
00045 #define DRV_LCD_HD44_H
00046
00047 #include "cfg/cfg_lcd_hd44.h"
00048 #include <cfg/compiler.h> /* For stdint types */
00049
00057 #define LCD_HD44_ROWS_2 2
00058 #define LCD_HD44_ROWS_4 4
00059
00067 #define LCD_HD44_COLS_16 16
00068 #define LCD_HD44_COLS_20 20
00069
00074 #define LCD_CMD_DISPLAY_INI      0x30
00075
00076 #if CONFIG_LCD_4BIT
00077     #define LCD_CMD_SETFUNC  0x28
00078 #else
00079     #define LCD_CMD_SETFUNC  0x38
00080 #endif
00081
00082 #define LCD_CMD_SET8BIT          0x30
00083 #define LCD_CMD_DISPLAY_ON       0x0F
00084 #define LCD_CMD_DISPLAY_OFF      0x08
00085 #define LCD_CMD_CLEAR            0x01
00086 #define LCD_CMD_CURSOR_BLOCK     0x0D
00087 #define LCD_CMD_CURSOR_LINE      0x0F
00088 #define LCD_CMD_CURSOR_OFF       0x0C
00089 #define LCD_CMD_DISPLAYMODE      0x06
00090 #define LCD_CMD_SET_CGRAMADDR    0x40
00091 #define LCD_CMD_RESET_DDRAM      0x80
00092 #define LCD_CMD_SET_DDRAMADDR    0x80
00093 #define LCD_CMD_DISPLAY_SHIFT    0x18
00094 #define LCD_CMD_MOVESHIFT_LEFT   0x00
00095 #define LCD_CMD_MOVESHIFT_RIGHT  0x04
00096 /*\}*/
00097
00099 typedef uint8_t lcdpos_t;
00100
00101 void lcd_waitBusy(void);
00102 void lcd_moveTo(uint8_t addr);
00103 void lcd_setReg(uint8_t val);
00104 void lcd_putc(uint8_t a, uint8_t c);
00105 void lcd_remapChar(const char *glyph, char code);
00106 void lcd_hw_init(void);
00107 void lcd_hw_test(void);
00108
00109 #endif /* DRV_LCD_HD44_H */


BeRTOS: lcd_hd44_hwtest.c File Reference

  • drv
lcd_hd44_hwtest.c File Reference

LM044L type LCD hardware module (impl.) More...

#include "lcd_hd44.h"
#include "hw/hw_lcd_hd44.h"
#include <cfg/test.h>
#include <drv/timer.h>

Go to the source code of this file.

Detailed Description

LM044L type LCD hardware module (impl.)

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file lcd_hd44_hwtest.c.


BeRTOS: lcd_hd44_hwtest.c Source File

  • drv
lcd_hd44_hwtest.c
Go to the documentation of this file.
00001
00039 #include "lcd_hd44.h"
00040 #include "hw/hw_lcd_hd44.h"
00041
00042 #include <cfg/test.h>
00043 #include <drv/timer.h>
00044
00045 #warning TODO:Refactor this test to comply whit BeRTOS test policy.
00046
00047 #if UNIT_TEST
00048
00049 void lcd_hw_test(void)
00050 {
00051     lcd_regWrite(LCD_CMD_SET_DDRAMADDR | 3);
00052     timer_delay(1);
00053     kprintf("3 -> %02X\n", lcd_regRead());
00054     timer_delay(1);
00055
00056     for (int i = 0; i < 10; i++)
00057     {
00058         lcd_dataWrite('c');
00059         timer_delay(1);
00060         kprintf("addr = %02X\n", lcd_regRead());
00061         timer_delay(1);
00062     }
00063
00064     lcd_regWrite(LCD_CMD_SET_DDRAMADDR | 0x4a);
00065     timer_delay(1);
00066     kprintf("4A -> %02X\n", lcd_regRead());
00067     timer_delay(1);
00068
00069     lcd_regWrite(LCD_CMD_SET_DDRAMADDR | 0x52);
00070     timer_delay(1);
00071     kprintf("52 -> %02X\n", lcd_regRead());
00072     timer_delay(1);
00073
00074     lcd_regWrite(LCD_CMD_SET_DDRAMADDR | 0x1F);
00075     timer_delay(1);
00076     kprintf("1F -> %02X\n", lcd_regRead());
00077     timer_delay(1);
00078 }
00079
00080
00081
00082 #include <drv/timer.c>
00083 #include <drv/lcd_hd44.c>
00084
00085 int main(void)
00086 {
00087         lcd_hw_test();
00088
00089         for(;;)
00090         {
00091         }
00092
00093         return 0;
00094 }
00095
00096 #endif


BeRTOS: lcd_hx8347.c File Reference

  • drv
Functions
lcd_hx8347.c File Reference

Himax HX8347 LCD controller driver. More...

#include "lcd_hx8347.h"
#include "hw/hw_hx8347.h"
#include <cfg/debug.h>
#include <drv/timer.h>

Go to the source code of this file.

Functions

void | lcd_hx8347_off (void)
Turn off display.
void | lcd_hx8347_on (void)
Turn on display.
void | lcd_hx8347_init (void)
Display initialization.

Detailed Description

Himax HX8347 LCD controller driver.

Author:
Stefano Fedrigo <aleph@develer.com>

Display initialization sequence is based on Atmel's softpack library implementation, see license below.

Definition in file lcd_hx8347.c.


BeRTOS: lcd_hx8347.c Source File

  • drv
lcd_hx8347.c
Go to the documentation of this file.
00001
00041 /* ----------------------------------------------------------------------------
00042  *         ATMEL Microcontroller Software Support
00043  * ----------------------------------------------------------------------------
00044  * Copyright (c) 2010, Atmel Corporation
00045  *
00046  * All rights reserved.
00047  *
00048  * Redistribution and use in source and binary forms, with or without
00049  * modification, are permitted provided that the following conditions are met:
00050  *
00051  * - Redistributions of source code must retain the above copyright notice,
00052  * this list of conditions and the disclaimer below.
00053  *
00054  * Atmel's name may not be used to endorse or promote products derived from
00055  * this software without specific prior written permission.
00056  *
00057  * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
00058  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00059  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
00060  * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
00062  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
00063  * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
00064  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00065  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
00066  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00067  * ----------------------------------------------------------------------------
00068  */
00069
00070 #include "lcd_hx8347.h"
00071
00072 #include "hw/hw_hx8347.h"
00073 #include <cfg/debug.h>
00074 #include <drv/timer.h>
00075
00076 // Himax HX8347 chip id
00077 #define HX8347_ID_HIMAX  0x47
00078
00079
00080 static uint16_t lcd_row[LCD_WIDTH];
00081
00082
00083 struct lcd_hx8347_reg
00084 {
00085     uint8_t cmd;    // Register index, if 0xFF wait for value ms
00086     uint8_t data;   // Register value
00087 };
00088
00089 static const struct lcd_hx8347_reg init_seq[] =
00090 {
00091     // Start internal OSC
00092     { 0x19, 0x49 },   // OSCADJ=10 0000, OSD_EN=1 //60Hz
00093     { 0x93, 0x0C },   // RADJ=1100
00094
00095     // Power on flow
00096     { 0x44, 0x4D },   // VCM=100 1101
00097     { 0x45, 0x11 },   // VDV=1 0001
00098     { 0x20, 0x40 },   // BT=0100
00099     { 0x1D, 0x07 },   // VC1=111
00100     { 0x1E, 0x00 },   // VC3=000
00101     { 0x1F, 0x04 },   // VRH=0100
00102
00103     { 0x1C, 0x04 },   // AP=100
00104     { 0x1B, 0x10 },   // GASENB=0, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0
00105     { 0xFF, 50   },   // 50 ms delay
00106
00107     { 0x43, 0x80 },   // Set VCOMG=1
00108     { 0xFF, 50   },   // 50 ms delay
00109
00110 #if 0
00111     // Gamma for CMO 2.8
00112     { 0x46, 0x95 },
00113     { 0x47, 0x51 },
00114     { 0x48, 0x00 },
00115     { 0x49, 0x36 },
00116     { 0x4A, 0x11 },
00117     { 0x4B, 0x66 },
00118     { 0x4C, 0x14 },
00119     { 0x4D, 0x77 },
00120     { 0x4E, 0x13 },
00121     { 0x4F, 0x4C },
00122     { 0x50, 0x46 },
00123     { 0x51, 0x46 },
00124 #endif
00125
00126     // 240x320 window setting
00127     { 0x02, 0x00 },   // Column address start2
00128     { 0x03, 0x00 },   // Column address start1
00129     { 0x04, 0x00 },   // Column address end2
00130     { 0x05, 0xEF },   // Column address end1
00131     { 0x06, 0x00 },   // Row address start2
00132     { 0x07, 0x00 },   // Row address start1
00133     { 0x08, 0x01 },   // Row address end2
00134     { 0x09, 0x3F },   // Row address end1
00135
00136     // Display Setting
00137     { 0x01, 0x06 },   // IDMON=0, INVON=1, NORON=1, PTLON=0
00138 //  { 0x16, 0xC8 },   // MY=1, MX=1, MV=0, BGR=1
00139     { 0x16, 0x68 },   // MY=0, MX=1, MV=1, RGB XY exchange X mirror
00140     { 0x23, 0x95 },   // N_DC=1001 0101
00141     { 0x24, 0x95 },   // P_DC=1001 0101
00142     { 0x25, 0xFF },   // I_DC=1111 1111
00143     { 0x27, 0x06 },   // N_BP=0000 0110
00144     { 0x28, 0x06 },   // N_FP=0000 0110
00145     { 0x29, 0x06 },   // P_BP=0000 0110
00146     { 0x2A, 0x06 },   // P_FP=0000 0110
00147     { 0x2C, 0x06 },   // I_BP=0000 0110
00148     { 0x2D, 0x06 },   // I_FP=0000 0110
00149     { 0x3A, 0x01 },   // N_RTN=0000, N_NW=001
00150     { 0x3B, 0x01 },   // P_RTN=0000, P_NW=001
00151     { 0x3C, 0xF0 },   // I_RTN=1111, I_NW=000
00152     { 0x3D, 0x00 },   // DIV=00
00153     { 0x3E, 0x38 },   // SON=38h
00154     { 0x40, 0x0F },   // GDON=0Fh
00155     { 0x41, 0xF0 },   // GDOF=F0h
00156 };
00157
00158 /*
00159  * Write to an LCD register.
00160  */
00161 static void regWrite(uint8_t reg, uint16_t val)
00162 {
00163     hx8347_cmd(reg);
00164     hx8347_write(val);
00165 }
00166
00167 /*
00168  * Read data from a LCD register.
00169  */
00170 static uint16_t regRead(uint8_t reg)
00171 {
00172     hx8347_cmd(reg);
00173     return hx8347_read();
00174 }
00175
00176 /*
00177  * Write data in a buffer to the LCD controller.
00178  */
00179 static void bufferWrite(const uint16_t *buf, uint16_t size)
00180 {
00181     uint16_t i;
00182     for (i = 0 ; i < size; ++i)
00183         hx8347_write(buf[i]);
00184 }
00185
00186 static void lcd_setCursor(uint16_t x, uint16_t y)
00187 {
00188     regWrite(0x02, x >> 8);
00189     regWrite(0x03, x & 0xff);
00190     regWrite(0x06, y >> 8);
00191     regWrite(0x07, y & 0xff);
00192 }
00193
00194 static void lcd_setWindow(uint16_t x, uint16_t y, uint16_t width, uint16_t height)
00195 {
00196     ASSERT(x + width <= LCD_WIDTH);
00197     ASSERT(y + height <= LCD_HEIGHT);
00198     ASSERT(width > 0);
00199     ASSERT(height > 0);
00200
00201     // Window right and bottom limits are inclusive
00202     width--;
00203     height--;
00204
00205     lcd_setCursor(x, y);
00206
00207     regWrite(0x04, (x + width) >> 8);
00208     regWrite(0x05, (x + width) & 0xff);
00209     regWrite(0x08, (y + height) >> 8);
00210     regWrite(0x09, (y + height) & 0xff);
00211 }
00212
00213 /*
00214  * Refresh a bitmap on screen
00215  */
00216 void lcd_hx8347_blitBitmap(const Bitmap *bm)
00217 {
00218     uint8_t mask;
00219     int i, l, r;
00220
00221     lcd_setWindow(0, 0, bm->width, bm->height);
00222     hx8347_cmd(0x22);
00223
00224     for (l = 0; l < bm->height / 8; l++)
00225     {
00226         for (mask = 1; mask; mask <<= 1)
00227         {
00228             for (i = 0; i < bm->width; i++)
00229             {
00230                 if (bm->raster[l * bm->width + i] & mask)
00231                     lcd_row[i] = 0x0000;
00232                 else
00233                     lcd_row[i] = 0xFFFF;
00234             }
00235             bufferWrite(lcd_row, bm->width);
00236         }
00237     }
00238
00239     for (r = 0, mask = 1; r < bm->height % 8; r++, mask <<= 1)
00240     {
00241         for (i = 0; i < bm->width; i++)
00242         {
00243             if (bm->raster[l * bm->width + i] & mask)
00244                 lcd_row[i] = 0x0000;
00245             else
00246                 lcd_row[i] = 0xFFFF;
00247         }
00248         bufferWrite(lcd_row, bm->width);
00249     }
00250 }
00251
00252 /*
00253  * Blit a 24 bit color raw raster directly on screen
00254  */
00255 void lcd_hx8347_blitBitmap24(int x, int y, int width, int height, const char *bmp)
00256 {
00257     int l, r;
00258
00259     lcd_setWindow(x, y, width, height);
00260     hx8347_cmd(0x22);
00261
00262     for (l = 0; l < height; l++)
00263     {
00264         for (r = 0; r < width; r++)
00265         {
00266             lcd_row[r] =
00267                 (((uint16_t)bmp[0] << 8) & 0xF800) |
00268                 (((uint16_t)bmp[1] << 3) & 0x07E0) |
00269                 (((uint16_t)bmp[2] >> 3) & 0x001F);
00270             bmp += 3;
00271         }
00272         bufferWrite(lcd_row, width);
00273     }
00274 }
00275
00279 void lcd_hx8347_off(void)
00280 {
00281     regWrite(0x90, 0);  // SAP=0000 0000
00282     regWrite(0x26, 0);  // GON=0, DTE=0, D=00
00283 }
00284
00288 void lcd_hx8347_on(void)
00289 {
00290     regWrite(0x90, 0x7F);  // SAP=0111 1111
00291     regWrite(0x26, 0x04);  // GON=0, DTE=0, D=01
00292     timer_delay(100);
00293     regWrite(0x26, 0x24);  // GON=1, DTE=0, D=01
00294     regWrite(0x26, 0x2C);  // GON=1, DTE=0, D=11
00295     timer_delay(100);
00296     regWrite(0x26, 0x3C);  // GON=1, DTE=1, D=11
00297 }
00298
00302 void lcd_hx8347_init(void)
00303 {
00304     unsigned i;
00305     uint16_t chip_id;
00306
00307     hx8347_busInit();
00308     lcd_hx8347_off();
00309
00310     // Check chip id
00311     if ((chip_id = regRead(0x67)) != HX8347_ID_HIMAX)
00312     {
00313         kprintf("HX8347 chip id read error or wrong id (0x%x), skipping initialization.\n", chip_id);
00314         return;
00315     }
00316
00317     for (i = 0; i < countof(init_seq); i++)
00318     {
00319         if (init_seq[i].cmd != 0xFF)
00320             regWrite(init_seq[i].cmd, init_seq[i].data);
00321         else
00322             timer_delay(init_seq[i].data);
00323     }
00324
00325     lcd_hx8347_on();
00326 }


BeRTOS: lcd_hx8347.h File Reference

  • drv
Functions
lcd_hx8347.h File Reference

Himax HX8347 LCD controller driver. More...

#include <gfx/gfx.h>
#include <cpu/types.h>

Go to the source code of this file.

Functions

void | lcd_hx8347_init (void)
Display initialization.
void | lcd_hx8347_on (void)
Turn on display.
void | lcd_hx8347_off (void)
Turn off display.

Detailed Description

Himax HX8347 LCD controller driver.

Author:
Stefano Fedrigo <aleph@develer.com>

Definition in file lcd_hx8347.h.


BeRTOS: lcd_hx8347.h Source File

  • drv
lcd_hx8347.h
Go to the documentation of this file.
00001
00042 #ifndef LCD_HX8347_H
00043 #define LCD_HX8347_H
00044
00045 #include <gfx/gfx.h> /* Bitmap */
00046
00047 #include <cpu/types.h>
00048
00049 #define LCD_WIDTH          320
00050 #define LCD_HEIGHT         240
00051
00052 void lcd_hx8347_init(void);
00053 void lcd_hx8347_on(void);
00054 void lcd_hx8347_off(void);
00055 void lcd_hx8347_blitBitmap(const Bitmap *bm);
00056 void lcd_hx8347_blitBitmap24(int x, int y, int width, int height, const char *bmp);
00057
00058 #endif /* LCD_HX8347_H */


BeRTOS: lcd_ili9225.c File Reference

  • drv
Functions
lcd_ili9225.c File Reference

ILI9225B 4 wire interface graphic driver. More...

#include "lcd_ili9225.h"
#include "hw/hw_ili9225.h"
#include <drv/timer.h>
#include <io/kfile.h>
#include <cpu/byteorder.h>

Go to the source code of this file.

Functions

void | lcd_ili9225_off (void)
Turn off display.
void | lcd_ili9225_on (void)
Turn on display.
static void | lcd_reset (void)
Reset display.
void | lcd_ili9225_init (struct KFile *_spi)
Display initialization.

Detailed Description

ILI9225B 4 wire interface graphic driver.

Author:
Stefano Fedrigo <aleph@develer.com>

Display initialization sequence is based on Atmel's softpack library implementation, see license below.

Definition in file lcd_ili9225.c.


BeRTOS: lcd_ili9225.c Source File

  • drv
lcd_ili9225.c
Go to the documentation of this file.
00001
00041 /* ----------------------------------------------------------------------------
00042  *         ATMEL Microcontroller Software Support
00043  * ----------------------------------------------------------------------------
00044  * Copyright (c) 2010, Atmel Corporation
00045  *
00046  * All rights reserved.
00047  *
00048  * Redistribution and use in source and binary forms, with or without
00049  * modification, are permitted provided that the following conditions are met:
00050  *
00051  * - Redistributions of source code must retain the above copyright notice,
00052  * this list of conditions and the disclaimer below.
00053  *
00054  * Atmel's name may not be used to endorse or promote products derived from
00055  * this software without specific prior written permission.
00056  *
00057  * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
00058  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00059  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
00060  * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
00062  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
00063  * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
00064  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
00065  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
00066  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00067  * ----------------------------------------------------------------------------
00068  */
00069
00070 #include "lcd_ili9225.h"
00071
00072 #include "hw/hw_ili9225.h"
00073
00074 #include <drv/timer.h>
00075 #include <io/kfile.h>
00076 #include <cpu/byteorder.h>
00077
00078
00079 static struct KFile *spi;
00080
00081 /*
00082  * Display row buffer.  When refreshing display one full row of
00083  * graphics data is transferred with DMA, to speed up transfer and
00084  * reduce CPU usage.
00085  */
00086 static uint16_t lcd_row[LCD_WIDTH];
00087
00088
00089 struct lcd_ili9225_reg
00090 {
00091     uint8_t  cmd;          // Register index, if 0xFF wait for value ms
00092     uint16_t data;         // Register value
00093 };
00094
00095 static const struct lcd_ili9225_reg init_seq[] =
00096 {
00097     {0x01, 0x011c},        // Set SS, SM, GS and NL bits
00098     {0x02, 0x0100},        // Set 1 line inversion
00099     {0x03, 0x1030},        // Entry Mode set GRAM write direction and BGR=1
00100     {0x08, 0x0808},        // Set BP and FP
00101     {0x0C, 0x0001},        // RGB Input Interface Control: 16-bit RGB interface
00102     {0x0F, 0x0A01},        // Set frame rate: 83Hz
00103     {0x20, LCD_WIDTH},     // Set GRAM Address
00104     {0x21, LCD_HEIGHT},    // Set GRAM Address
00105
00106     /* power on sequence */
00107     {0x10, 0x0A00},        // Set asp DSTB,STB
00108     {0x11, 0x1038},        // SET APON PON AON VCI1EN VC
00109     {0xFF, 50},            // Wait 50 ms
00110
00111     {0x12, 0x1121},        // Internal reference voltage = VCI
00112     {0x13, 0x06CE},        // Set GVDD
00113     {0x14, 0x676F},        // Set VCOMH/VCOML voltage
00114
00115     // Set gram area
00116     {0x30, 0x0000},
00117     {0x31, 0x00DB},
00118     {0x32, 0x0000},
00119     {0x33, 0x0000},
00120     {0x34, 0x00DB},
00121     {0x35, 0x0000},
00122     {0x36, LCD_WIDTH},
00123     {0x37, 0x0000},
00124     {0x38, LCD_HEIGHT},
00125     {0x39, 0x0000},
00126
00127     // Set gamma curve
00128     {0x50, 0x0000},
00129     {0x51, 0x060A},
00130     {0x52, 0x0D0A},
00131     {0x53, 0x0303},
00132     {0x54, 0x0A0D},
00133     {0x55, 0x0A06},
00134     {0x56, 0x0000},
00135     {0x57, 0x0303},
00136     {0x58, 0x0000},
00137     {0x59, 0x0000},
00138 };
00139
00140 static void lcd_cmd(uint8_t cmd)
00141 {
00142     LCD_CS_LOW();
00143     LCD_RS_LOW();
00144     kfile_write(spi, &cmd, sizeof(cmd));
00145 }
00146
00147 static void lcd_data(uint16_t *data, size_t count)
00148 {
00149     kfile_flush(spi);
00150     LCD_RS_HIGH();
00151     kfile_write(spi, data, count*2);
00152     kfile_flush(spi);
00153     LCD_CS_HIGH();
00154 }
00155
00156 static void lcd_regWrite(uint8_t reg, uint16_t data)
00157 {
00158     uint16_t word = cpu_to_be16(data);
00159
00160     lcd_cmd(reg);
00161     lcd_data(&word, 1);
00162 }
00163
00164 static void lcd_startBlit(uint8_t x, uint8_t y, uint8_t width, uint8_t height)
00165 {
00166     ASSERT((x + width) <= LCD_WIDTH);
00167     ASSERT((y + height) <= LCD_HEIGHT);
00168
00169     lcd_regWrite(0x36, x + width);
00170     lcd_regWrite(0x37, x);
00171     lcd_regWrite(0x38, y + height);
00172     lcd_regWrite(0x39, y);
00173
00174     lcd_regWrite(0x20, x);
00175     lcd_regWrite(0x21, y);
00176 }
00177
00178 /*
00179  * Refresh a raw image on screen
00180  */
00181 void lcd_ili9225_blitRaw(UNUSED_ARG(const uint8_t *, data),
00182         uint8_t x, uint8_t y, uint8_t width, uint8_t height)
00183 {
00184     lcd_startBlit(x, y, width, height);
00185     // TODO
00186 }
00187
00188 /*
00189  * Refresh a bitmap on screen
00190  */
00191 void lcd_ili9225_blitBitmap(const Bitmap *bm)
00192 {
00193     uint8_t mask;
00194     int i, l, r;
00195
00196     lcd_startBlit(0, 0, bm->width, bm->height);
00197
00198     for (l = 0; l < bm->height / 8; l++)
00199     {
00200         for (mask = 1; mask; mask <<= 1)
00201         {
00202             for (i = 0; i < bm->width; i++)
00203             {
00204                 if (bm->raster[l * bm->width + i] & mask)
00205                     lcd_row[i] = 0x0000;
00206                 else
00207                     lcd_row[i] = 0xFFFF;
00208             }
00209             lcd_cmd(0x22);
00210             lcd_data(lcd_row, bm->width);
00211         }
00212     }
00213
00214     for (r = 0, mask = 1; r < bm->height % 8; r++, mask <<= 1)
00215     {
00216         for (i = 0; i < bm->width; i++)
00217         {
00218             if (bm->raster[l * bm->width + i] & mask)
00219                 lcd_row[i] = 0x0000;
00220             else
00221                 lcd_row[i] = 0xFFFF;
00222         }
00223         lcd_cmd(0x22);
00224         lcd_data(lcd_row, bm->width);
00225     }
00226 }
00227
00228 /*
00229  * Blit a 24 bit color raw raster directly on screen
00230  */
00231 void lcd_ili9225_blitBitmap24(int x, int y, int width, int height, const char *bmp)
00232 {
00233     int l, r;
00234
00235     lcd_startBlit(x, y, width, height);
00236
00237     for (l = 0; l < height; l++)
00238     {
00239         for (r = 0; r < width; r++)
00240         {
00241             lcd_row[r] =
00242                 (((uint16_t)bmp[1] << 11) & 0xE000) |
00243                 (((uint16_t)bmp[2] <<  5) & 0x1F00) |
00244                 (((uint16_t)bmp[0] <<  0) & 0x00F8) |
00245                 (((uint16_t)bmp[1] >>  5) & 0x0007);
00246             bmp += 3;
00247         }
00248
00249         lcd_cmd(0x22);
00250         lcd_data(lcd_row, width);
00251     }
00252 }
00253
00257 void lcd_ili9225_off(void)
00258 {
00259     lcd_regWrite(0x07, 0x0000);
00260 }
00261
00265 void lcd_ili9225_on(void)
00266 {
00267     lcd_regWrite(0x07, 0x1017);
00268 }
00269
00273 static void lcd_reset(void)
00274 {
00275     LCD_RESET_LOW();
00276     timer_delay(20);
00277     LCD_RESET_HIGH();
00278     timer_delay(50);
00279 }
00280
00284 void lcd_ili9225_init(struct KFile *_spi)
00285 {
00286     unsigned i;
00287
00288     ASSERT(_spi);
00289     spi = _spi;
00290     lcd_ili9225_hw_bus_init();
00291
00292     lcd_reset();
00293     lcd_ili9225_off();
00294
00295     for (i = 0; i < countof(init_seq); i++)
00296     {
00297         if (init_seq[i].cmd != 0xFF)
00298             lcd_regWrite(init_seq[i].cmd, init_seq[i].data);
00299         else
00300             timer_delay(init_seq[i].data);
00301     }
00302
00303     lcd_ili9225_on();
00304 }


BeRTOS: lcd_ili9225.h File Reference

  • drv
Functions
lcd_ili9225.h File Reference

ILI9225B 4 wire interface graphic driver. More...

#include <gfx/gfx.h>
#include <cpu/types.h>

Go to the source code of this file.

Functions

void | lcd_ili9225_init (struct KFile *spi)
Display initialization.
void | lcd_ili9225_on (void)
Turn on display.
void | lcd_ili9225_off (void)
Turn off display.

Detailed Description

ILI9225B 4 wire interface graphic driver.

Definition in file lcd_ili9225.h.


BeRTOS: lcd_ili9225.h Source File

  • drv
lcd_ili9225.h
Go to the documentation of this file.
00001
00040 #ifndef LCD_ILI9225_H
00041 #define LCD_ILI9225_H
00042
00043 #include <gfx/gfx.h> /* Bitmap */
00044
00045 #include <cpu/types.h>
00046
00047 #define LCD_WIDTH          176
00048 #define LCD_HEIGHT         220
00049
00050 // Fwd decl
00051 struct KFile;
00052
00053 void lcd_ili9225_init(struct KFile *spi);
00054 void lcd_ili9225_on(void);
00055 void lcd_ili9225_off(void);
00056 void lcd_ili9225_blitRaw(const uint8_t *data,
00057         uint8_t x, uint8_t y, uint8_t width, uint8_t height);
00058 void lcd_ili9225_blitBitmap(const Bitmap *bm);
00059 void lcd_ili9225_blitBitmap24(int x, int y, int width, int height, const char *bmp);
00060
00061 #endif /* LCD_ILI9225_H */


BeRTOS: lcd_lm44_qt.h File Reference

  • drv
Data Structures
lcd_lm44_qt.h File Reference

Custom Qt widget for emulating a graphics LCD display (implementation) More...

#include <qframe.h>
#include <qfont.h>
#include <qcolor.h>

Go to the source code of this file.

Data Structures

class EmulLCD
Qt widget to emulate a dot-matrix LCD display. More...

Detailed Description

Custom Qt widget for emulating a graphics LCD display (implementation)

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file lcd_lm44_qt.h.


BeRTOS: lcd_lm44_qt.h Source File

  • drv
lcd_lm44_qt.h
Go to the documentation of this file.
00001
00040 #ifndef EMULLCD_H
00041 #define EMULLCD_H
00042
00043 #include <qframe.h>
00044 #include <qfont.h>
00045 #include <qcolor.h>
00046
00047 // fwd decls
00048 class QSizePolicy;
00049 class QPaintEvent;
00050 class QResizeEvent;
00051
00055 class EmulLCD : public QFrame
00056 {
00057     Q_OBJECT
00058
00059 public:
00060 // Attributes
00061     enum { COLS = 20, ROWS = 4 };
00062
00063 // Construction
00064     EmulLCD(QWidget *parent = 0, const char *name = 0);
00065     virtual ~EmulLCD();
00066
00067 // Base class overrides
00068 protected:
00069     virtual QSizePolicy sizePolicy() const;
00070     virtual QSize sizeHint() const;
00071     virtual void drawContents(QPainter *p);
00072
00073 // Operations
00074 public:
00075     void MoveCursor     (int col, int row);
00076     void ShowCursor     (bool show = true);
00077     void PutChar        (unsigned char c);
00078     char GetChar        ();
00079     void Clear          ();
00080     void SetCGRamAddr   (unsigned char addr);
00081
00082 // Implementation
00083 protected:
00084     void SetPainter(QPainter & p);
00085     void RedrawText(QPainter & p);
00086     void PrintChar(QPainter & p, int row, int col);
00087     void AdvanceCursor();
00088
00089     QFont lcd_font;
00090     QColor fg_color, bg_color;
00091     int font_width, font_height;
00092     int frame_width;
00093     int cr_row, cr_col;
00094     int cgramaddr;
00095     unsigned char ddram[ROWS][COLS];
00096     unsigned char cgram[8*8];
00097     bool show_cursor;
00098 };
00099
00100 #endif // !defined(EMULLCD_H)
00101


BeRTOS: lcd_rit128x96.c File Reference

  • drv
Functions
lcd_rit128x96.c File Reference

OLED-RIT-128x96 (P14201) graphic display driver. More...

#include "lcd_rit128x96.h"
#include "hw/hw_rit128x96.h"
#include <cfg/debug.h>
#include <cfg/macros.h>

Go to the source code of this file.

Functions

static void lcd_dataWrite (const uint8_t *buf, size_t count)
Write a sequence of data bytes to the LCD controller.

Detailed Description

OLED-RIT-128x96 (P14201) graphic display driver.

Author:
Andrea Righi <arighi@develer.com>

Definition in file lcd_rit128x96.c.


BeRTOS: lcd_rit128x96.c Source File

  • drv
lcd_rit128x96.c
Go to the documentation of this file.
00001
00038 #include "lcd_rit128x96.h"
00039
00040 #include "hw/hw_rit128x96.h"
00041
00042 #include <cfg/debug.h>
00043 #include <cfg/macros.h>
00044
00045
00046 /*
00047  * Hard-coded command initialization sequence.
00048  *
00049  * NOTE: the first byte is the size of the command.
00050  */
00051 static const uint8_t init_cmd[] =
00052 {
00053     /* Unlock commands */
00054     3, 0xfd, 0x12, 0xe3,
00055     /* Display off */
00056     2, 0xae, 0xe3,
00057     /* Icon off */
00058     3, 0x94, 0, 0xe3,
00059     /* Multiplex ratio */
00060     3, 0xa8, 95, 0xe3,
00061     /* Contrast */
00062     3, 0x81, 0xb7, 0xe3,
00063     /* Pre-charge current */
00064     3, 0x82, 0x3f, 0xe3,
00065     /* Display Re-map */
00066     3, 0xa0, 0x52, 0xe3,
00067     /* Display Start Line */
00068     3, 0xa1, 0, 0xe3,
00069     /* Display Offset */
00070     3, 0xa2, 0x00, 0xe3,
00071     /* Display Mode Normal */
00072     2, 0xa4, 0xe3,
00073     /* Phase Length */
00074     3, 0xb1, 0x11, 0xe3,
00075     /* Frame frequency */
00076     3, 0xb2, 0x23, 0xe3,
00077     /* Front Clock Divider */
00078     3, 0xb3, 0xe2, 0xe3,
00079     /* Set gray scale table */
00080     17, 0xb8, 1, 2, 3, 4, 5, 6, 8, 10, 12, 14, 16, 19, 22, 26, 30, 0xe3,
00081     /* Second pre-charge period */
00082     3, 0xbb, 0x01, 0xe3,
00083     /* Pre-charge voltage */
00084     3, 0xbc, 0x3f, 0xe3,
00085     /* Display ON */
00086     2, 0xaf, 0xe3,
00087 };
00088
00089 /*
00090  * Hard-coded command shutdown sequence.
00091  */
00092 static const uint8_t exit_cmd[] =
00093 {
00094     /* Display OFF */
00095     0xae, 0xe3
00096 };
00097
00098 /*
00099  * Hard-coded horizontal increment command.
00100  */
00101 static const uint8_t horizontal_inc[] =
00102 {
00103     0xa0, 0x52
00104 };
00105
00109 static void lcd_dataWrite(const uint8_t *buf, size_t count)
00110 {
00111     while (count--)
00112         LCD_WRITE(*buf++);
00113 }
00114
00115 /* Turn on the OLED display */
00116 void rit128x96_on(void)
00117 {
00118     unsigned int i;
00119
00120     /* Loop through the SSD1329 controller initialization sequence */
00121     LCD_SET_COMMAND();
00122     for (i = 0; i < sizeof(init_cmd); i += init_cmd[i] + 1)
00123         lcd_dataWrite(init_cmd + i + 1, init_cmd[i] - 1);
00124 }
00125
00126 /* Turn off the OLED display */
00127 void rit128x96_off(void)
00128 {
00129     LCD_SET_COMMAND();
00130     lcd_dataWrite(exit_cmd, sizeof(exit_cmd));
00131 }
00132
00133 static void lcd_start_blit(uint8_t x, uint8_t y, uint8_t width, uint8_t height)
00134 {
00135     uint8_t buffer[3];
00136
00137     ASSERT((x + width) <= LCD_WIDTH);
00138     ASSERT((y + height) <= LCD_HEIGHT);
00139
00140     /* Enter command mode */
00141     LCD_SET_COMMAND();
00142
00143     buffer[0] = 0x15;
00144     buffer[1] = x / 2;
00145     buffer[2] = (x + width - 2) / 2;
00146     lcd_dataWrite(buffer, 3);
00147
00148     buffer[0] = 0x75;
00149     buffer[1] = y;
00150     buffer[2] = y + height - 1;
00151     lcd_dataWrite(buffer, 3);
00152     lcd_dataWrite((const uint8_t *)&horizontal_inc, sizeof(horizontal_inc));
00153 }
00154
00155 /* Refresh a raw image on screen */
00156 void rit128x96_blitRaw(const uint8_t *data,
00157         uint8_t x, uint8_t y, uint8_t width, uint8_t height)
00158 {
00159     lcd_start_blit(x, y, width, height);
00160     /*
00161      * Enter data mode and send the encoded image data to the OLED display,
00162      * over the SSI bus.
00163      */
00164     LCD_SET_DATA();
00165     while (height--)
00166     {
00167         /* Write an entire row at once */
00168         lcd_dataWrite(data, width / 2);
00169         data += width / 2;
00170     }
00171 }
00172
00173 /* Refresh a bitmap on screen */
00174 void rit128x96_blitBitmap(const Bitmap *bm)
00175 {
00176     uint8_t lcd_row[bm->width / 2];
00177     uint8_t mask;
00178     int i, l;
00179
00180     lcd_start_blit(0, 0, bm->width, bm->height);
00181     /*
00182      * Enter data mode and send the encoded image data to the OLED display,
00183      * over the SSI bus.
00184      */
00185     LCD_SET_DATA();
00186     for (l = 0; l < bm->height / 8; l++)
00187     {
00188         for (mask = 1; mask; mask <<= 1)
00189         {
00190             for (i = 0; i < bm->width; i++)
00191             {
00192                 if (bm->raster[l * bm->width + i] & mask)
00193                     lcd_row[i / 2] |= i & 1 ? 0x0f : 0xf0;
00194                 else
00195                     lcd_row[i / 2] &= i & 1 ? 0xf0 : 0x0f;
00196             }
00197             /* Write an entire row at once */
00198             lcd_dataWrite(lcd_row, sizeof(lcd_row));
00199         }
00200     }
00201 }
00202
00203 /* Initialize the OLED display */
00204 void rit128x96_init(void)
00205 {
00206     /* Initialize the communication bus */
00207     lcd_rit128x96_hw_bus_init();
00208
00209     /* Turn on the OLED display */
00210     rit128x96_on();
00211 }


BeRTOS: lcd_rit128x96.h File Reference

  • drv
lcd_rit128x96.h File Reference

OLED-RIT-128x96 (P14201) graphic display driver. More...

#include <gfx/gfx.h>
#include <cpu/types.h>

Go to the source code of this file.

Detailed Description

OLED-RIT-128x96 (P14201) graphic display driver.

Definition in file lcd_rit128x96.h.


BeRTOS: lcd_rit128x96.h Source File

  • drv
lcd_rit128x96.h
Go to the documentation of this file.
00001
00039 #ifndef LCD_LM3S_H
00040 #define LCD_LM3S_H
00041
00042 #include <gfx/gfx.h> /* Bitmap */
00043
00044 #include <cpu/types.h>
00045
00046 #define LCD_WIDTH   128
00047 #define LCD_HEIGHT  96
00048
00049 void rit128x96_blitRaw(const uint8_t *data,
00050         uint8_t x, uint8_t y, uint8_t width, uint8_t height);
00051 void rit128x96_blitBitmap(const Bitmap *bm);
00052 void rit128x96_on(void);
00053 void rit128x96_off(void);
00054 void rit128x96_init(void);
00055
00056 #endif /* LCD_LM3S_H */


BeRTOS: lcd_text.c File Reference

  • drv
Defines | Functions
lcd_text.c File Reference

Generic text LCD driver (impl.). More...

#include "lcd_text.h"
#include "lcd_hd44.h"
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <drv/timer.h>
#include <mware/formatwr.h>
#include <struct/list.h>
#include <string.h>

Go to the source code of this file.

Defines

#define | LCD_LAYERS 6
Maximum number of layers.

Functions

static void | lcd_putCharUnlocked (char c, Layer *layer)
Write one character to the display at the current cursor prosition, then move the cursor right.
static void | lcd_enqueueLayer (Layer *layer, char pri)
Internal function to move a layer between two positions.
static void | lcd_refresh (void)
Redraw the display (internal).
void | lcd_setLayerDepth (Layer *layer, char pri)
Rearrange layer depth and refresh display accordingly.

Detailed Description

Generic text LCD driver (impl.).

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file lcd_text.c.

Define Documentation

#define LCD_LAYERS 6

Maximum number of layers.

Definition at line 54 of file lcd_text.c.

Function Documentation

static void lcd_enqueueLayer | ( | Layer * | layer,
 |  | char | pri
 | ) |  | [static]

Internal function to move a layer between two positions.

Note:
The layer must be *already* enqueued in some list.
The display must be already locked!

Definition at line 288 of file lcd_text.c.

static void lcd_putCharUnlocked | ( | char | c,
 |  | Layer * | layer
 | ) |  | [static]

Write one character to the display at the current cursor prosition, then move the cursor right.

The cursor is wrapped to the next line when it moves beyond the end of the current line.

Note:
Does _NOT_ lock the display semaphore.

Definition at line 118 of file lcd_text.c.

static void lcd_refresh ( void ) [static]

Redraw the display (internal).

Note:
The display must be already locked.

Definition at line 337 of file lcd_text.c.

void lcd_setLayerDepth | ( | Layer * | layer,
 |  | char | pri
 | ) |  |

Rearrange layer depth and refresh display accordingly.

Note:
Setting a priority of LAYER_HIDDEN makes the layer invisible.

Definition at line 370 of file lcd_text.c.


BeRTOS: lcd_text.c Source File

  • drv
lcd_text.c
Go to the documentation of this file.
00001
00039 #include "lcd_text.h"
00040 #include "lcd_hd44.h"
00041
00042 #include <cfg/macros.h> // BV()
00043 #include <cfg/debug.h>
00044
00045 #include <drv/timer.h> // timer_delay()
00046
00047 #include <mware/formatwr.h> // _formatted_write()
00048 #include <struct/list.h> // LIST_EMPTY()
00049
00050 #include <string.h> // strlen()
00051
00052
00054 #define LCD_LAYERS 6
00055
00056 #if CONFIG_KERN
00057     #include <kern/sem.h>
00059     static struct Semaphore lcd_semaphore;
00060     #define LOCK_LCD    sem_obtain(&lcd_semaphore)
00061     #define UNLOCK_LCD  sem_release(&lcd_semaphore)
00062 #else /* !CONFIG_KERN */
00063     #define LOCK_LCD    do {} while (0)
00064     #define UNLOCK_LCD  do {} while (0)
00065 #endif /* !CONFIG_KERN */
00066
00067 DECLARE_LIST_TYPE(Layer);
00068
00069 Layer *lcd_DefLayer;
00070 static Layer lcd_LayersPool[LCD_LAYERS];
00071 static LIST_TYPE(Layer) lcd_Layers;
00072 static LIST_TYPE(Layer) lcd_FreeLayers;
00073
00079 static uint8_t lcd_CursorStatus;
00080
00082 static lcdpos_t lcd_CursorAddr;
00083
00084
00085 void lcd_setAddr(Layer *layer, lcdpos_t addr)
00086 {
00087     /* Sanity check: wrap around to display limits */
00088     while (addr >= CONFIG_LCD_ROWS * CONFIG_LCD_COLS)
00089         addr -= CONFIG_LCD_ROWS * CONFIG_LCD_COLS;
00090
00091     layer->addr = addr;
00092 }
00093
00094 #if CONFIG_KERN
00095
00096 void lcd_lock(void)
00097 {
00098     LOCK_LCD;
00099 }
00100
00101
00102 void lcd_unlock(void)
00103 {
00104     UNLOCK_LCD;
00105 }
00106
00107 #endif /* CONFIG_KERN */
00108
00109
00118 static void lcd_putCharUnlocked(char c, Layer *layer)
00119 {
00120     Layer *l2;
00121     lcdpos_t addr = layer->addr;
00122
00123     /* Store character in layer buffer */
00124     layer->buf[addr] = c;
00125
00126     /* Move to next character */
00127     if (++layer->addr >= CONFIG_LCD_COLS * CONFIG_LCD_ROWS)
00128         layer->addr = 0;
00129
00130     /* Do not write on LCD if layer is hidden. */
00131     if (layer->pri == LAYER_HIDDEN)
00132         return;
00133
00134     /*
00135      * Check if this location is obscured by
00136      * other layers above us.
00137      */
00138     for (l2 = layer->pred; l2->pred; l2 = l2->pred)
00139     {
00140         if (l2->buf[addr])
00141         {
00142             /* DB(kprintf("layer %04x obs %04x at %d\n", l2, layer, addr);) */
00143             return;
00144         }
00145     }
00146
00147     /* Write character */
00148     if (c)
00149         lcd_putc(addr, c);
00150     else
00151         /* FIXME: should look for layers beneath! */
00152         lcd_putc(addr, ' ');
00153 }
00154
00155
00156 void lcd_putChar(char c, Layer *layer)
00157 {
00158     LOCK_LCD;
00159     lcd_putCharUnlocked(c, layer);
00160     UNLOCK_LCD;
00161 }
00162
00163 void lcd_layerSet(Layer *layer, char c)
00164 {
00165     int i;
00166
00167     LOCK_LCD;
00168     lcd_setAddr(layer, 0);
00169     for (i = 0; i < CONFIG_LCD_COLS * CONFIG_LCD_ROWS; i++)
00170         lcd_putCharUnlocked(c, layer);
00171     UNLOCK_LCD;
00172 }
00173
00174
00175 void lcd_clear(Layer *layer)
00176 {
00177     lcd_layerSet(layer, 0);
00178 }
00179
00180
00181 void lcd_clearLine(Layer *layer, int y)
00182 {
00183     int i;
00184
00185     LOCK_LCD;
00186     lcd_setAddr(layer, LCD_POS(0, y));
00187     for (i = 0; i < CONFIG_LCD_COLS; i++)
00188         lcd_putCharUnlocked(0, layer);
00189     UNLOCK_LCD;
00190 }
00191
00192
00193 void lcd_moveCursor(lcdpos_t addr)
00194 {
00195     LOCK_LCD;
00196     lcd_moveTo(addr);
00197     UNLOCK_LCD;
00198 }
00199
00200
00201 char lcd_setCursor(char mode)
00202 {
00203     static const char cursor_cmd[3] =
00204     {
00205         LCD_CMD_CURSOR_OFF, LCD_CMD_CURSOR_BLOCK, LCD_CMD_CURSOR_LINE
00206     };
00207     char oldmode = lcd_CursorStatus;
00208
00209     LOCK_LCD;
00210     lcd_CursorStatus = mode;
00211     lcd_setReg(cursor_cmd[(int)mode]);
00212     if (mode)
00213         lcd_moveCursor(lcd_CursorAddr);
00214     UNLOCK_LCD;
00215
00216     return oldmode;
00217 }
00218
00219
00220 int lcd_vprintf(Layer *layer, lcdpos_t addr, uint8_t mode, const char *format, va_list ap)
00221 {
00222     int len;
00223
00224     LOCK_LCD;
00225
00226     /*
00227      * Se il cursore era acceso, spegnilo durante
00228      * l'output per evitare che salti alla posizione
00229      * in cui si scrive.
00230      */
00231     if (lcd_CursorStatus)
00232         lcd_setReg(LCD_CMD_CURSOR_OFF);
00233
00234     /* Spostamento del cursore */
00235     lcd_setAddr(layer, addr);
00236
00237     if (mode & LCD_CENTER)
00238     {
00239         int pad;
00240
00241         /*
00242          * NOTE: calculating the string lenght BEFORE it gets
00243          * printf()-formatted. Real lenght may differ.
00244          */
00245         pad = (CONFIG_LCD_COLS - strlen(format)) / 2;
00246         while (pad--)
00247             lcd_putCharUnlocked(' ', layer);
00248     }
00249
00250     len = _formatted_write(format, (void (*)(char, void *))lcd_putCharUnlocked, layer, ap);
00251
00252     if (mode & (LCD_FILL | LCD_CENTER))
00253         while (layer->addr % CONFIG_LCD_COLS)
00254             lcd_putCharUnlocked(' ', layer);
00255
00256     /*
00257      * Riaccendi il cursore e riportalo alla
00258      * vecchia posizione
00259      */
00260     if (lcd_CursorStatus)
00261         lcd_setCursor(lcd_CursorStatus);
00262
00263     UNLOCK_LCD;
00264
00265     return len;
00266 }
00267
00268
00269 int lcd_printf(Layer *layer, lcdpos_t addr, uint8_t mode, const char *format, ...)
00270 {
00271     int len;
00272     va_list ap;
00273
00274     va_start(ap, format);
00275     len = lcd_vprintf(layer, addr, mode, format, ap);
00276     va_end(ap);
00277
00278     return len;
00279 }
00280
00281
00288 static void lcd_enqueueLayer(Layer *layer, char pri)
00289 {
00290     Layer *l2;
00291
00292     /* Remove layer from whatever list it was in before */
00293     REMOVE(layer);
00294
00295     layer->pri = pri;
00296
00297     /*
00298      * Search for the first layer whose priority
00299      * is less or equal to the layer we are adding.
00300      */
00301     FOREACH_NODE(l2, &lcd_Layers)
00302         if (l2->pri <= pri)
00303             break;
00304
00305     /* Enqueue layer */
00306     INSERT_BEFORE(layer, l2);
00307 }
00308
00309 Layer *lcd_newLayer(char pri)
00310 {
00311     Layer *layer;
00312
00313     LOCK_LCD;
00314
00315     if (LIST_EMPTY(&lcd_FreeLayers))
00316     {
00317         UNLOCK_LCD;
00318         //ASSERT(false);
00319         return NULL;
00320     }
00321
00322     layer = (Layer *)LIST_HEAD(&lcd_FreeLayers);
00323     layer->addr = 0;
00324     memset(layer->buf, 0, CONFIG_LCD_ROWS * CONFIG_LCD_COLS);
00325
00326     lcd_enqueueLayer(layer, pri);
00327
00328     UNLOCK_LCD;
00329     return layer;
00330 }
00331
00337 static void lcd_refresh(void)
00338 {
00339     lcdpos_t addr;
00340     Layer *l;
00341
00342     for (addr = 0; addr < CONFIG_LCD_ROWS * CONFIG_LCD_COLS; ++addr)
00343     {
00344         FOREACH_NODE(l, &lcd_Layers)
00345         {
00346             //kprintf("%d %x %p\n", addr, l->buf[0], l);
00347             if (l->pri == LAYER_HIDDEN)
00348                 break;
00349
00350             if (l->buf[addr])
00351             {
00352                 /* Refresh location */
00353                 lcd_putc(addr, l->buf[addr]);
00354                 goto done;
00355             }
00356         }
00357
00358         /* Draw background */
00359         lcd_putc(addr, ' ');
00360     done:
00361         ;
00362     }
00363 }
00364
00370 void lcd_setLayerDepth(Layer *layer, char pri)
00371 {
00372     if (pri != layer->pri)
00373     {
00374         LOCK_LCD;
00375         lcd_enqueueLayer(layer, pri);
00376         /* Vile but simple */
00377         lcd_refresh();
00378         UNLOCK_LCD;
00379     }
00380 }
00381
00382 void lcd_deleteLayer(Layer *layer)
00383 {
00384     LOCK_LCD;
00385
00386 /* We use lcd_refresh() instead.  Much simpler than this mess, but slower. */
00387 #if 0
00388     Layer *l2;
00389     lcdpos_t addr;
00390
00391     /* Repair damage on underlaying layers */
00392     for (addr = 0; addr < CONFIG_LCD_ROWS * CONFIG_LCD_COLS; ++addr)
00393     {
00394         /* If location was covered by us */
00395         if (layer->buf[addr])
00396         {
00397             /* ...and it wasn't covered by others above us... */
00398             for (l2 = layer->pred; l2->pred; l2 = l2->pred)
00399                 if (l2->buf[addr])
00400                     /* can't just break here! */
00401                     goto not_visible;
00402
00403             /* ...scan underlaying layers to repair damage */
00404             for (l2 = layer->succ; l2->succ; l2 = l2->succ)
00405                 if (l2->buf[addr])
00406                 {
00407                     /* Refresh character */
00408                     lcd_putc(addr, l2->buf[addr]);
00409
00410                     /* No need to search on deeper layers */
00411                     break;
00412                 }
00413
00414             not_visible:
00415                 ;
00416         }
00417     }
00418 #endif
00419
00420     // Remove layer from lcd_Layers list.
00421     REMOVE(layer);
00422
00423     /* Put layer back into free list */
00424     ADDHEAD(&lcd_FreeLayers, layer);
00425
00426     lcd_refresh();
00427
00428     UNLOCK_LCD;
00429 }
00430
00431
00432 static void lcd_setDefLayer(Layer *layer)
00433 {
00434     lcd_DefLayer = layer;
00435 }
00436
00437 #include <cfg/debug.h>
00438 void lcd_init(void)
00439 {
00440     #if CONFIG_KERN
00441     sem_init(&lcd_semaphore);
00442     #endif
00443
00444     int i;
00445
00446     LIST_INIT(&lcd_Layers);
00447     LIST_INIT(&lcd_FreeLayers);
00448     for (i = 0; i < LCD_LAYERS; ++i)
00449         ADDHEAD(&lcd_FreeLayers, &lcd_LayersPool[i]);
00450
00451     lcd_setDefLayer(lcd_newLayer(0));
00452
00453     lcd_hw_init();
00454
00455     lcd_setCursor(0);
00456 }
00457
00458


BeRTOS: lcd_text.h File Reference

  • drv
Data Structures | Defines | Functions
lcd_text.h File Reference

Generic text LCD driver (interface). More...

#include "lcd_hd44.h"
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <struct/list.h>
#include <stdarg.h>

Go to the source code of this file.

Data Structures

struct | Layer
Overwrapping layer context. More...

Defines

#define | LAYER_HIDDEN -127
Special priority value for lcd_setLayerDepth().

Functions

void | lcd_setLayerDepth (Layer *layer, char pri)
Rearrange layer depth and refresh display accordingly.

Detailed Description

Generic text LCD driver (interface).

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file lcd_text.h.

Define Documentation

#define LAYER_HIDDEN -127

Special priority value for lcd_setLayerDepth().

Definition at line 61 of file lcd_text.h.

Function Documentation

void lcd_setLayerDepth | ( | Layer * | layer,
 |  | char | pri
 | ) |  |

Rearrange layer depth and refresh display accordingly.

Note:
Setting a priority of LAYER_HIDDEN makes the layer invisible.

Definition at line 370 of file lcd_text.c.


BeRTOS: lcd_text.h Source File

  • drv
lcd_text.h
Go to the documentation of this file.
00001
00042 #ifndef DRV_LCD_H
00043 #define DRV_LCD_H
00044
00045 #include "lcd_hd44.h"
00046
00047 #include <cfg/macros.h>
00048 #include <cfg/compiler.h>
00049 #include <struct/list.h>
00050
00051 #include <stdarg.h> // vprintf()
00052
00053
00054 /* flags for lcd_printf() */
00055 #define LCD_NORMAL     0       /* Scrittura normale */
00056 #define LCD_FILL       BV(0)   /* Fill rest of line with spaces */
00057 #define LCD_CENTER     BV(1)   /* Center string in line */
00058 #define LCD_NOCURSOR   BV(2)   /* Scrittura senza spostamento cursore */
00059
00061 #define LAYER_HIDDEN   -127
00062
00063 /* Compute LCD address from x/y coordinates */
00064 #define LCD_POS(x,y)  ((lcdpos_t)((uint8_t)(x) + (uint8_t)(y) * (uint8_t)CONFIG_LCD_COLS))
00065 #define LCD_ROW0  (CONFIG_LCD_COLS * 0)
00066 #define LCD_ROW1  (CONFIG_LCD_COLS * 1)
00067 #define LCD_ROW2  (CONFIG_LCD_COLS * 2)
00068 #define LCD_ROW3  (CONFIG_LCD_COLS * 3)
00069
00073 typedef struct _Layer
00074 {
00079     DECLARE_NODE_ANON(struct _Layer)
00080
00081
00082     lcdpos_t addr;
00083
00085     signed char pri;
00086
00094     char buf[CONFIG_LCD_COLS * CONFIG_LCD_ROWS];
00095 } Layer;
00096
00097
00098 /* Global variables */
00099 extern Layer *lcd_DefLayer;
00100
00101 /* Function prototypes */
00102 extern void lcd_init(void);
00103 extern void lcd_test(void);
00104
00105 extern void lcd_moveCursor(lcdpos_t addr);
00106 extern char lcd_setCursor(char state);
00107
00108 extern void lcd_setAddr(Layer *layer, lcdpos_t addr);
00109 extern void lcd_putChar(char c, Layer *layer);
00110 extern int  lcd_vprintf(Layer *layer, lcdpos_t addr, uint8_t mode, const char *format, va_list ap) FORMAT(printf, 4, 0);
00111 extern int  lcd_printf(Layer *layer, lcdpos_t addr, uint8_t mode, const char *format, ...) FORMAT(printf, 4, 5);
00112 extern void lcd_clear(Layer *layer);
00113 extern void lcd_layerSet(Layer *layer, char c);
00114 extern void lcd_clearLine(Layer *layer, int y);
00115
00116 extern void lcd_setLayerDepth(Layer *layer, char pri);
00117 extern Layer *lcd_newLayer(char pri);
00118 extern void lcd_deleteLayer(Layer *layer);
00119 extern void lcd_lock(void);
00120 extern void lcd_unlock(void);
00121
00122 #endif /* DRV_LCD_H */


BeRTOS: lcd_text_hwtest.c File Reference

  • drv
lcd_text_hwtest.c File Reference

Generic text LCD driver (Test). More...

Go to the source code of this file.

Detailed Description

Generic text LCD driver (Test).

Author:
Daniele Basile <asterix@develer.com>

Definition in file lcd_text_hwtest.c.


BeRTOS: lcd_text_hwtest.c Source File

  • drv
lcd_text_hwtest.c
Go to the documentation of this file.
00001
00040 #warning TODO:This test is incomplete, you must review!
00041
00042 #if 0
00043 void lcd_test(void)
00044 {
00045     int i;
00046
00047     for (i = 0; i < CONFIG_LCD_ROWS * CONFIG_LCD_COLS; ++i)
00048     {
00049         lcd_putCharUnlocked('0' + (i % 10), lcd_DefLayer);
00050         timer_delay(100);
00051     }
00052 }
00053 #endif
00054


BeRTOS: led_7seg.c File Reference

  • drv
Functions
led_7seg.c File Reference

7 segments LED displays (impl) More...

#include "drv/led_7seg.h"
#include "hw/hw_led_7seg.h"
#include "cfg/cfg_arch.h"
#include <drv/timer.h>
#include <string.h>

Go to the source code of this file.

Functions

int | sevenseg_print (SevenSeg *SS, const char *sstring)
Print a string on the display.
void | sevenseg_init (SevenSeg *SS)
initialize the structure and the timer for the display
bool | sevenseg_isReady (SevenSeg *SS)
check if is possible to do a new print
bool | sevenseg_unlock (SevenSeg *SS)
unlock the SevenSeg structure and stops the print
bool | sevenseg_lock (SevenSeg *SS)
lock the SeveSeg structure and starts a new print
bool | sevenseg_setBlink (SevenSeg *SS, bool blink, uint8_t digit)
set the blinking of the digits of the display
bool | sevenseg_setRunonce (SevenSeg *SS, bool runonce)
set if the text has to be displayed just one time
bool | sevenseg_setRunspeed (SevenSeg *SS, unsigned int r_speed)
set the scrolling speed of the text
bool | sevenseg_clear (SevenSeg *SS)
clear the display

Detailed Description

7 segments LED displays (impl)

Author:
Fabio Bizzi <fbizzi@bizzi.org>

Definition in file led_7seg.c.


BeRTOS: led_7seg.c Source File

  • drv
led_7seg.c
Go to the documentation of this file.
00001
00041 #include "drv/led_7seg.h"
00042 #include "hw/hw_led_7seg.h"
00043 #include "cfg/cfg_arch.h"
00044 #include <drv/timer.h>
00045 #include <string.h>
00046
00047 /*
00048  * Define the timer for the refreshing
00049  */
00050 static Timer sseg_trefresh;
00051
00052 /*
00053  * FUNCTION: sseg_refresh
00054  *
00055  * This is the procedure that prints the seven_seg structure'string to the display.
00056  * It prints a single digit at time and does all the checks to a proper display.
00057  * It is called by the wrapper function fired by the timer set in the init procedure.
00058  *
00059  * param SS The void pointer that holds the pointer to the data structure
00060  *
00061  */
00062 static void sseg_refresh(SevenSeg *SS)
00063 {
00064     /* First Check if the structure is being edited we do a silent exit*/
00065     if (SS->busyedit == true)
00066         return;
00067
00068     /* If we have displayed all the digits */
00069     if (SS->curdigit == CONFIG_LED_7SEG_DIGIT)
00070     {
00071         sseg_off();
00072         /* And if we have to display again all the digit */
00073         if (SS->curspeed > 0)
00074         {
00075             SS->curspeed--;
00076             SS->curdigit = 0;
00077             SS->curpos -= CONFIG_LED_7SEG_DIGIT;
00078         }
00079         /* Else is time to scroll the text */
00080         else
00081         {
00082             /* If we aren't at the end of the string */
00083             if (SS->curpos < SS->string_len)
00084             {
00085                 SS->curpos -= CONFIG_LED_7SEG_DIGIT;
00086                 SS->curpos++;
00087                 SS->curdigit = 0;
00088                 SS->curspeed = SS->speed;
00089             }
00090             /* Else we are at the end of the string */
00091             else
00092             {
00093                 /* Set that the string was displayed at least one time and we can accept a new text*/
00094                 SS->firstrun = false;
00095                 /* If the string has to be displayed only one time we set an empty string
00096                  * to display till next print request*/
00097                 if (SS->runonce == true)
00098                     sevenseg_clear(SS);
00099                 /* Else we reset the text to it's first character ad do again the display */
00100                 else
00101                 {
00102                     SS->curdigit = 0;
00103                     SS->curpos = 0;
00104                     SS->curspeed = SS->speed;
00105                 }
00106             }
00107         }
00108     }
00109     /* Else We have to do a print*/
00110     else
00111     {
00112         /* If the text doesn't have to blink we write the character to the proper disply's digit */
00113         if (SS->blink == false)
00114             sseg_on(SS->string[SS->curpos], SS->curdigit);
00115         /* Else we do the blinking */
00116         else
00117         {
00118             /* If bdigit == 0 we have to blink all the digits */
00119             if (SS->bdigit == 0)
00120             {
00121                 if (SS->curspeed >= (SS->speed/2))
00122                     sseg_on(SS->string[SS->curpos], SS->curdigit);
00123                 else
00124                     sseg_off();
00125             }
00126             /* else we have to blink only one digit (bdigit -1) */
00127             else
00128                 /* is this the digit to blink? */
00129                 if (SS->curdigit == ((unsigned int)SS->bdigit-1))
00130                 {
00131                     if (SS->curspeed >= (SS->speed/2))
00132                         sseg_on(SS->string[SS->curpos], SS->curdigit);
00133                     else
00134                         sseg_off();
00135                 }
00136                 /* no, so let do a normal print */
00137                 else
00138                     sseg_on(SS->string[SS->curpos], SS->curdigit);
00139         }
00140         /* Ok, next time next char.... ;) */
00141         SS->curdigit++;
00142         SS->curpos++;
00143     }
00144 }
00145
00146 /*
00147  * FUNCTION: sseg_refresh_wrapper
00148  *
00149  * This is a "wrapper" procedure that is called by the timer_setSoftint()
00150  * with the unique purpose to call the real sseg_refresh procedure without
00151  * the cast of the structure from void to SevenSeg.
00152  *
00153  * param VSS The void pointer that holds the pointer to the data structure
00154  *
00155  */
00156 static void sseg_refresh_wrapper(void *VSS)
00157 {
00158     /* Here we cast the Structure from void to proper type */
00159     SevenSeg *SS;
00160     SS = (SevenSeg *)VSS;
00161     /* now we call the right refresh routine */
00162     sseg_refresh(SS);
00163     /* ReStart the timer */
00164     timer_add(&sseg_trefresh);
00165 }
00166
00167 /*
00168  * FUNCTION: sseg_tabcheck
00169  *
00170  * This function return the position of the ascii character in the hex
00171  * segstable.
00172  *
00173  * param source The ascii char to be positioned
00174  */
00175 INLINE uint8_t sseg_tabcheck(char source)
00176 {
00177     uint8_t hexchar=38;
00178
00179     /* Numbers */
00180     if ((((int)source) > 47) && (((int)source) < 58))
00181         hexchar = source-48;
00182     else
00183         /* Capital Letters */
00184         if ((((int)source) > 64) && (((int)source) < 91))
00185             hexchar = source-53;
00186         else
00187             /* Letters */
00188             if ((((int)source) > 96) && (((int)source) < 123))
00189                 hexchar = source-85;
00190             else
00191                 /* Minus */
00192                 if (((int)source) == 45)
00193                     hexchar = 11;
00194                 else
00195                     /* Space */
00196                     if (((int)source) == 32)
00197                         hexchar = 38;
00198                     else
00199                         /* Dot */
00200                         if (((int)source) == 46)
00201                             hexchar = 10;
00202     return hexchar;
00203 }
00204
00217 int sevenseg_print(SevenSeg *SS, const char *sstring)
00218 {
00219     size_t string_lenght;
00220     unsigned int x,y,dotnumber;
00221     bool dotjump = false;
00222     uint8_t hexchar;
00223
00224     /* Check if the display is unlocked */
00225     if (SS->busyedit == false)
00226         return -1;
00227
00228     /* Check if the string is too big */
00229     if (sizeof(&sstring) > (CONFIG_LED_7SEG_STRLEN-(2*CONFIG_LED_7SEG_DIGIT)))
00230         return -2;
00231
00232     /* get the string length and set the number of dots in the string to 0 */
00233     string_lenght = strlen(sstring);
00234     dotnumber = 0;
00235
00236     /* check if there are some dots in the string and report the number in dotnumber */
00237     for (x=0;x<(unsigned int)string_lenght;x++)
00238     {
00239         if (((int)sstring[x]) == 46)
00240             dotnumber++;
00241     }
00242
00243     /* If the *REAL* lenght of the string is less or equal than the number of digits */
00244     if (((int)string_lenght-dotnumber) <= CONFIG_LED_7SEG_DIGIT)
00245     {
00246         /* If the *REAL* lenght of the string is less than number of digits */
00247         if (((int)string_lenght-dotnumber) < CONFIG_LED_7SEG_DIGIT)
00248         {
00249             /* Fill the left side of the string with blanks */
00250             for (x=0; x<(CONFIG_LED_7SEG_DIGIT-((int)string_lenght-dotnumber)); x++)
00251                 SS->string[x] = segstable[38];
00252             y = x;
00253         }
00254         else
00255         {
00256             /* Else we have the exact string length of the display */
00257             y = 0;
00258         }
00259     }
00260     else
00261     {
00262         /* Else we have the string length bigger than the display and we need to fill
00263          * the entire left side of the string with blanks to begin the scroll from the
00264          * rigthest side of the display */
00265         for (x=0; x<CONFIG_LED_7SEG_DIGIT; x++)
00266             SS->string[x] = segstable[38];
00267         y = CONFIG_LED_7SEG_DIGIT;
00268     }
00269     /* Here we start to fill the string with the Hex 7seg characters values */
00270     hexchar = 0;
00271     for (x=0; x<(unsigned int)string_lenght; x++)
00272     {
00273         hexchar = sseg_tabcheck(sstring[x]);
00274         /* do we have a dot? */
00275         if (hexchar == 10)
00276         {
00277             /* If we are at the first character of the string it has to be forced
00278              * as "lonly" dot ;) */
00279             if (x > 0)
00280             {
00281 #if CONFIG_LED_7SEG_CCAT
00282                 SS->string[y-1] = SS->string[y-1] | segstable[(int)hexchar];
00283 #else
00284                 SS->string[y-1] = SS->string[y-1] & segstable[(int)hexchar];
00285 #endif
00286                 dotjump = true;
00287             }
00288         }
00289         /* If the last character was a dot and we aren't at the first character of the string
00290          * we have just inserted it */
00291         if (dotjump)
00292             dotjump = false;
00293         /* Let's put the character in the structure's string */
00294         else
00295         {
00296             SS->string[y] = segstable[(int)hexchar];
00297             y++;
00298         }
00299     }
00300     /* If we have the string length bigger than the display we need to fill
00301      * the entire right side of the string with blanks to end the scroll
00302      * to the rigthest side of the display */
00303     if (((int)string_lenght-dotnumber) > CONFIG_LED_7SEG_DIGIT)
00304     {
00305         for (x=0; x<CONFIG_LED_7SEG_DIGIT; x++)
00306         {
00307             SS->string[y] = segstable[38];
00308             y++;
00309         }
00310     }
00311     /* Let's put the total string length to the structure */
00312     SS->string_len = y;
00313
00314     return 0;
00315 }
00316
00325 void sevenseg_init(SevenSeg *SS)
00326 {
00327     /*
00328      * Init the 7segments string structure
00329      */
00330     SS->busyedit = true;
00331     sevenseg_clear(SS);
00332     SS->busyedit = false;
00333
00334     /*
00335      * Init the I/O ports and set the display OFF
00336      */
00337     sseg_init();
00338
00339     /*
00340      * Define the timer for the refresh of the display
00341      * The timer calls the sevenseg_refresh function
00342      * every "CONFIG_LED_7SEG_RTIME" milliseconds for
00343      * an acceptable persistance of a single 7 segments
00344      * display.
00345      */
00346     // set the callback
00347     timer_setSoftint(&sseg_trefresh, sseg_refresh_wrapper, (void *)SS);
00348     // expire time: 1s
00349     timer_setDelay(&sseg_trefresh, ms_to_ticks(CONFIG_LED_7SEG_RTIME));
00350     // start the timer
00351     timer_add(&sseg_trefresh);
00352 }
00353
00364 bool sevenseg_isReady(SevenSeg *SS)
00365 {
00366         return !SS->firstrun;
00367 }
00368
00379 bool sevenseg_unlock(SevenSeg *SS)
00380 {
00381     if (SS->firstrun == false)
00382     {
00383         SS->busyedit = true;
00384         SS->firstrun = true;
00385         SS->curdigit = 0;
00386         SS->curpos = 0;
00387     }
00388     else
00389         return false;
00390     return true;
00391 }
00392
00403 bool sevenseg_lock(SevenSeg *SS)
00404 {
00405     if (SS->busyedit == true)
00406     {
00407     /* If the string is longer than the number of the digit of the display we
00408      * reset the single digit blink to zero to be sure that the display of
00409      * the text is clean from previous single digit blinking settings */
00410         if (SS->string_len > CONFIG_LED_7SEG_DIGIT)
00411             SS->bdigit = 0;
00412         SS->busyedit = false;
00413     }
00414     else
00415         return false;
00416     return true;
00417 }
00418
00432 bool sevenseg_setBlink(SevenSeg *SS, bool blink, uint8_t digit)
00433 {
00434     if (SS->busyedit == true)
00435     {
00436         if (blink == true)
00437         {
00438             if (digit == 0)
00439                 SS->bdigit = digit;
00440             else
00441                 if ((digit-1) <= CONFIG_LED_7SEG_DIGIT)
00442                     SS->bdigit = digit;
00443                 else
00444                     return false;
00445         }
00446         SS->blink = blink;
00447     }
00448     else
00449         return false;
00450     return true;
00451 }
00452
00464 bool sevenseg_setRunonce(SevenSeg *SS, bool runonce)
00465 {
00466     if (SS->busyedit == true)
00467         SS->runonce = runonce;
00468     else
00469         return false;
00470     return true;
00471 }
00472
00486 bool sevenseg_setRunspeed(SevenSeg *SS, unsigned int r_speed)
00487 {
00488     if (SS->busyedit == true)
00489     {
00490         SS->speed = r_speed;
00491         SS->curspeed = r_speed;
00492     }
00493     else
00494         return false;
00495     return true;
00496 }
00497
00508 bool sevenseg_clear(SevenSeg *SS)
00509 {
00510     if (SS->busyedit == true)
00511     {
00512         memset(((void *)&SS->string),segstable[38],sizeof(SS->string));
00513         SS->string_len = CONFIG_LED_7SEG_DIGIT;
00514         SS->blink = false;
00515         SS->bdigit = 0;
00516         SS->runonce = false;
00517         SS->curdigit = 0;
00518         SS->curpos = 0;
00519         SS->speed = CONFIG_LED_7SEG_SSPEED;
00520         SS->curspeed = CONFIG_LED_7SEG_SSPEED;
00521         SS->firstrun = false;
00522     }
00523     else
00524         return false;
00525     return true;
00526 } //defgroup drivers


BeRTOS: led_7seg.h File Reference

  • drv
Data Structures | Functions
led_7seg.h File Reference
#include "cfg/cfg_led_7seg.h"
#include <drv/timer.h>
#include <mware/event.h>

Go to the source code of this file.

Data Structures

struct | SevenSeg
Context data for Display functions. More...

Functions

int | sevenseg_print (SevenSeg *SS, const char *sstring)
Print a string on the display.
void | sevenseg_init (SevenSeg *SS)
initialize the structure and the timer for the display
bool | sevenseg_isReady (SevenSeg *SS)
check if is possible to do a new print
bool | sevenseg_unlock (SevenSeg *SS)
unlock the SevenSeg structure and stops the print
bool | sevenseg_lock (SevenSeg *SS)
lock the SeveSeg structure and starts a new print
bool | sevenseg_setBlink (SevenSeg *SS, bool blink, uint8_t digit)
set the blinking of the digits of the display
bool | sevenseg_setRunonce (SevenSeg *SS, bool runonce)
set if the text has to be displayed just one time
bool | sevenseg_setRunspeed (SevenSeg *SS, unsigned int r_speed)
set the scrolling speed of the text
bool | sevenseg_clear (SevenSeg *SS)
clear the display

Variables

Numbers and Letters Table.
Note:
These tables contain all the printable characters on a 7 segment digit encoded for common cathode and common anode display type.

0, 1, 2, 3, 4, 5, 6, 7, 8, 9, ., -, A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, Q, R, S, T, U, V, W, X, Y, Z, SPACE

static const uint8_t | segstable []

Detailed Description

Author:
Fabio Bizzi <fbizzi@bizzi.org>

Definition in file led_7seg.h.


BeRTOS: led_7seg.h Source File

  • drv
led_7seg.h
Go to the documentation of this file.
00001
00090 #ifndef DRV_LED_7SEG_H
00091 #define DRV_LED_7SEG_H
00092
00093 #include "cfg/cfg_led_7seg.h"
00094 #include <drv/timer.h>
00095 #include <mware/event.h>
00096
00112 #if CONFIG_LED_7SEG_CCAT
00113         static const uint8_t segstable[] =
00114         {
00115                 0x3f, 0x6, 0x5b, 0x4f, 0x66, 0x6d, 0x7d, 0x7, 0x7f,
00116                 0x6f, 0x80, 0x40, 0x77, 0x7c, 0x39, 0x5e, 0x79, 0x71,
00117                 0x3d, 0x74, 0x30, 0x1e, 0x75, 0x38, 0x15, 0x37, 0x3f,
00118                 0x73, 0x67, 0x50, 0x6d, 0x78, 0x3e, 0x2a, 0x6a, 0x76,
00119                 0x6e, 0x5b, 0x0
00120         };
00121 #else
00122         static const uint8_t segstable[] =
00123         {
00124                 0xc0, 0xf9, 0xa4, 0xb0, 0x99, 0x92, 0x82, 0xf8, 0x80,
00125                 0x90, 0x7f, 0xbf, 0x88, 0x83, 0xc6, 0xa1, 0x86, 0x8e,
00126                 0xc2, 0x8b, 0xcf, 0xe1, 0x8a, 0xc7, 0xea, 0xc8, 0xc0,
00127                 0x8c, 0x98, 0xaf, 0x92, 0x87, 0xc1, 0xd5, 0x95, 0x89,
00128                 0x91, 0xa4, 0xff
00129         };
00130 #endif
00131
00137 typedef struct SevenSeg
00138 {
00140         uint8_t string[CONFIG_LED_7SEG_STRLEN];
00142         unsigned int string_len;
00144         bool blink;
00146         uint8_t bdigit;
00148         bool runonce;
00150         unsigned int speed;
00152         unsigned int curspeed;
00154         bool firstrun;
00156         unsigned int curpos;
00158         unsigned int curdigit;
00160         bool busyedit;
00161 } SevenSeg;
00162
00163 /* Functions prototypes */
00164
00165 /*
00166  * This is the procedure that fills the seven_seg structure with the translated
00167  * string to display. It swaps also the structures to display the new text when
00168  * all the data is ready to display.
00169  */
00170 int sevenseg_print(SevenSeg *SS, const char *sstring);
00171
00172 /*
00173  * This is the procedure that inits all the structures that rules the 7 segments
00174  * display and set the timer for the proper print/refresh of the text.
00175  */
00176 void sevenseg_init(SevenSeg *SS);
00177
00178 /*
00179  * This is the procedure that does a short print of all segments of all
00180  * digits of the display.
00181  */
00182 void sevenseg_test(SevenSeg *SS);
00183
00184 /*
00185  * This is the procedure that check if the print of the current text is run
00186  * almost one time and we're ready to print a new text.
00187  */
00188 bool sevenseg_isReady(SevenSeg *SS);
00189
00190 /*
00191  * This is the procedure that check if the print of the current text is run
00192  * almost one time and then set the status of the display to "unlocked".
00193  */
00194 bool sevenseg_unlock(SevenSeg *SS);
00195
00196 /*
00197  * This is the procedure that lock the display and permit
00198  * the print of the text.
00199  */
00200 bool sevenseg_lock(SevenSeg *SS);
00201
00202 /*
00203  * This is the procedure that set the blinking of the display.
00204  * You can choose to blink all the display or only a single
00205  * digit.
00206  */
00207 bool sevenseg_setBlink(SevenSeg *SS, bool blink, uint8_t digit);
00208
00209 /*
00210  * This is the procedure that set if the text has to be displayed
00211  * just one time
00212  */
00213 bool sevenseg_setRunonce(SevenSeg *SS, bool runonce);
00214
00215 /*
00216  * This is the procedure that set the scrolling speed of the text
00217  * if the text is longer than the display digits or the
00218  * duration of the display if the text is smaller or equal the
00219  * length of display digits.
00220  */
00221 bool sevenseg_setRunspeed(SevenSeg *SS, unsigned int r_speed);
00222
00223 /*
00224  * This is the procedure that blanks the text to be displayed
00225  * and so on clear the display.
00226  */
00227 bool sevenseg_clear(SevenSeg *SS);
00228
00229 #endif /* DRV_LED_7SEG_H */
00230  //defgroup drivers


BeRTOS: levelbar.c File Reference

  • gui
Functions
levelbar.c File Reference

Copyright 2004, 2006 Develer S.r.l. More...

#include "levelbar.h"

Go to the source code of this file.

Functions

void | lbar_init (struct LevelBar *lb, struct Bitmap *bmp, int type, int min, int max, int pos, coord_t x1, coord_t y1, coord_t x2, coord_t y2)
Initialize the LevelBar widget with the bitmap associated, the value range and the coordinates in the bitmap.
void | lbar_setLevel (struct LevelBar *lb, int level)
Set the level.
int | lbar_getLevel (struct LevelBar *lb)
Get current level.
void | lbar_changeLevel (struct LevelBar *lb, int delta)
Change level with respect to previous value (delta can be negative).
void | lbar_setMax (struct LevelBar *lb, int max)
Change the top limit.
void | lbar_draw (struct LevelBar *lb)
Render the LevelBar on the bitmap.

Detailed Description

Copyright 2004, 2006 Develer S.r.l.

(http://www.develer.com/)

Graphics user interface element to display a level bar.

Author:
Stefano Fedrigo <aleph@develer.com>

Definition in file levelbar.c.

Function Documentation

void lbar_init | ( | struct LevelBar * | lb,
 |  | struct Bitmap * | bmp,
 |  | int | type,
 |  | int | min,
 |  | int | max,
 |  | int | pos,
 |  | coord_t | x1,
 |  | coord_t | y1,
 |  | coord_t | x2,
 |  | coord_t | y2
 | ) |  |

Initialize the LevelBar widget with the bitmap associated, the value range and the coordinates in the bitmap.

Note:
The levelbar should be at least 5 pixels wide and high for correct borders drawing. No check is done on this.

Definition at line 20 of file levelbar.c.


BeRTOS: levelbar.c Source File

  • gui
levelbar.c
Go to the documentation of this file.
00001
00011 #include "levelbar.h"
00012
00013
00020 void lbar_init(struct LevelBar *lb, struct Bitmap *bmp, int type, int min, int max, int pos,
00021         coord_t x1, coord_t y1, coord_t x2, coord_t y2)
00022 {
00023     lb->bitmap = bmp;
00024     lb->type = type;
00025     lb->min = min;
00026     lb->max = max;
00027     lb->pos = pos;
00028     lb->x1 = x1;
00029     lb->y1 = y1;
00030     lb->x2 = x2;
00031     lb->y2 = y2;
00032 }
00033
00034
00038 void lbar_setLevel(struct LevelBar *lb, int level)
00039 {
00040     if (level < lb->min)
00041         level = lb->min;
00042     if (level > lb->max)
00043         level = lb->max;
00044
00045     lb->pos = level;
00046 }
00047
00048
00052 int lbar_getLevel(struct LevelBar *lb)
00053 {
00054     return lb->pos;
00055 }
00056
00057
00062 void lbar_changeLevel(struct LevelBar *lb, int delta)
00063 {
00064     lbar_setLevel(lb, lb->pos + delta);
00065 }
00066
00067
00071 void lbar_setMax(struct LevelBar *lb, int max)
00072 {
00073     lb->max = max;
00074 }
00075
00076
00080 void lbar_draw(struct LevelBar *lb)
00081 {
00082 #define BORDERW 1
00083 #define BORDERH 1
00084
00085     /* Compute filled bar length in pixels */
00086     int totlen = (lb->type & LBAR_HORIZONTAL) ? lb->x2 - lb->x1 - BORDERW*4 : lb->y2 - lb->y1 - BORDERH*4;
00087     int range  = lb->max - lb->min;
00088     int barlen = ((long)(lb->pos - lb->min) * (long)totlen + range - 1) / range;
00089
00090     // Draw border
00091     gfx_rectDraw(lb->bitmap, lb->x1, lb->y1, lb->x2, lb->y2);
00092
00093     // Clear inside
00094     gfx_rectClear(lb->bitmap, lb->x1 + BORDERW, lb->y1 + BORDERH, lb->x2 - BORDERW, lb->y2 - BORDERH);
00095
00096     // Draw bar
00097     if (lb->type & LBAR_HORIZONTAL)
00098         gfx_rectFill(lb->bitmap,
00099                 lb->x1 + BORDERW*2, lb->y1 + BORDERH*2,
00100                 lb->x1 + BORDERW*2 + barlen, lb->y2 - BORDERH*2);
00101     else
00102         gfx_rectFill(lb->bitmap,
00103                 lb->x1 + BORDERW*2, lb->y2 - BORDERH*2 - barlen,
00104                 lb->x2 - BORDERW*2, lb->y2 - BORDERH*2);
00105 }


BeRTOS: levelbar.h File Reference

  • gui
Defines | Functions
levelbar.h File Reference

Copyright 2004, 2006 Develer S.r.l. More...

#include <gfx/gfx.h>

Go to the source code of this file.

Defines

#define | LBAR_HORIZONTAL 1
Type of levelbar.

Functions

void | lbar_init (struct LevelBar *lb, struct Bitmap *bmp, int type, int min, int max, int pos, coord_t x1, coord_t y1, coord_t x2, coord_t y2)
Initialize the LevelBar widget with the bitmap associated, the value range and the coordinates in the bitmap.
void | lbar_setLevel (struct LevelBar *lb, int level)
Set the level.
int | lbar_getLevel (struct LevelBar *lb)
Get current level.
void | lbar_changeLevel (struct LevelBar *lb, int delta)
Change level with respect to previous value (delta can be negative).
void | lbar_setMax (struct LevelBar *lb, int max)
Change the top limit.
void | lbar_draw (struct LevelBar *lb)
Render the LevelBar on the bitmap.

Detailed Description

Copyright 2004, 2006 Develer S.r.l.

(http://www.develer.com/)

Author:
Stefano Fedrigo <aleph@develer.com>

Graphics level bar widget

Definition in file levelbar.h.

Function Documentation

void lbar_init | ( | struct LevelBar * | lb,
 |  | struct Bitmap * | bmp,
 |  | int | type,
 |  | int | min,
 |  | int | max,
 |  | int | pos,
 |  | coord_t | x1,
 |  | coord_t | y1,
 |  | coord_t | x2,
 |  | coord_t | y2
 | ) |  |

Initialize the LevelBar widget with the bitmap associated, the value range and the coordinates in the bitmap.

Note:
The levelbar should be at least 5 pixels wide and high for correct borders drawing. No check is done on this.

Definition at line 20 of file levelbar.c.


BeRTOS: levelbar.h Source File

  • gui
levelbar.h
Go to the documentation of this file.
00001
00011 #ifndef GUI_LEVELBAR_H
00012 #define GUI_LEVELBAR_H
00013
00014 #include <gfx/gfx.h>
00015
00016
00018 #define LBAR_HORIZONTAL 1
00019 #define LBAR_VERTICAL   2
00020
00021 typedef struct LevelBar
00022 {
00023     struct Bitmap *bitmap;
00024     int type;
00025     int pos;
00026     int min;
00027     int max;
00028     coord_t x1, y1, x2, y2;
00029 } LevelBar;
00030
00031 void lbar_init(struct LevelBar *lb, struct Bitmap *bmp, int type, int min, int max, int pos,
00032         coord_t x1, coord_t y1, coord_t x2, coord_t y2);
00033 void lbar_setLevel(struct LevelBar *lb, int level);
00034 int  lbar_getLevel(struct LevelBar *lb);
00035 void lbar_changeLevel(struct LevelBar *lb, int delta);
00036 void lbar_setMax(struct LevelBar *lb, int max);
00037 void lbar_draw(struct LevelBar *lb);
00038
00039 #endif /* GUI_LEVELBAR_H */


BeRTOS: leveledit.c File Reference

  • gui
Functions
leveledit.c File Reference

Generic editor for (volume/gain/contrast/...) setting. More...

#include "leveledit.h"
#include "cfg/cfg_menu.h"
#include <cfg/macros.h>
#include <drv/kbd.h>
#include <drv/timer.h>
#include <gui/levelbar.h>
#include <cpu/pgm.h>
#include <gfx/text.h>
#include <gfx/font.h>

Go to the source code of this file.

Functions

void | level_edit (struct LevelEdit *lev)
Allow user to change level.
void | level_init (struct LevelEdit *lev, int type, struct Bitmap *bmp, const char *title, const char *unit, int min, int max, int step, int *ch1_val, int *ch2_val, level_set_callback *set_hook, display_callback *display_hook)
LevelEdit structure initialization.

Detailed Description

Generic editor for (volume/gain/contrast/...) setting.

Author:
Stefano Fedrigo <aleph@develer.com>

Definition in file leveledit.c.

Function Documentation

void level_init | ( | struct LevelEdit * | lev,
 |  | int | type,
 |  | struct Bitmap * | bmp,
 |  | const char * | title,
 |  | const char * | unit,
 |  | int | min,
 |  | int | max,
 |  | int | step,
 |  | int * | ch1_val,
 |  | int * | ch2_val,
 |  | level_set_callback * | set_hook,
 |  | display_callback * | display_hook
 | ) |  |

LevelEdit structure initialization.

Init data structure and init LevelEdit widgets.

Definition at line 302 of file leveledit.c.


BeRTOS: leveledit.c Source File

  • gui
leveledit.c
Go to the documentation of this file.
00001
00038 #include "leveledit.h"
00039
00040 #include "cfg/cfg_menu.h"
00041 #include <cfg/macros.h> /* MAX() */
00042
00043 #include <drv/kbd.h>
00044 #include <drv/timer.h>
00045
00046 #include <gui/levelbar.h>
00047
00048 #include <cpu/pgm.h>
00049
00050 #include <gfx/text.h>
00051 #include <gfx/font.h>
00052
00053 #if CONFIG_MENU_MENUBAR
00054 #include <gui/menubar.h>
00055 #endif
00056
00057 #warning FIXME: Revise me!
00058
00059 #define LBAR_HEIGHT 16
00060
00064 void level_edit(struct LevelEdit *lev)
00065 {
00066 #if CONFIG_MENU_MENUBAR
00067     /* Labels for menubars */
00068     enum LabelId ch_labels[] = { LABEL_C1PLUS2, LABEL_CH_1, LABEL_CH_2 };
00069     const_iptr_t labels[] =
00070     {
00071         (const_iptr_t)LABEL_BACK,
00072         (const_iptr_t)LABEL_MINUS,
00073         (const_iptr_t)LABEL_PLUS,
00074         (const_iptr_t)LABEL_EMPTY
00075     };
00076     struct MenuBar mb;
00077 #endif /* CONFIG_MENU_MENUBAR */
00078
00079     struct LevelBar bar1, bar2;
00080     keymask_t keys, old_rpt_mask;
00081     int step, rep_step;
00082
00083     rep_step = MAX(lev->step, ((lev->max - lev->min) / 200));
00084     step = lev->step;
00085
00086     // Allow keys repetition.
00087     old_rpt_mask = kbd_setRepeatMask(K_UP | K_DOWN);
00088
00089     text_clear(lev->bitmap);
00090     //text_style(STYLEF_UNDERLINE, STYLEF_UNDERLINE);
00091     text_puts(lev->title, lev->bitmap);
00092     //text_style(0, STYLEF_UNDERLINE);
00093
00094     if (lev->type & LEVELEDIT_DOUBLE)
00095     {
00096         int chn = 0;  /* edit both channels */
00097
00098         /* Levelbars init */
00099         lbar_init(&bar1, lev->bitmap, LBAR_HORIZONTAL,
00100                 lev->min, lev->max, *lev->ch1_val, 0, 16, lev->bitmap->width / 2 - 1, 23);
00101         lbar_init(&bar2, lev->bitmap, LBAR_HORIZONTAL,
00102                 lev->min, lev->max, *lev->ch2_val, lev->bitmap->width / 2 + 1, 16, lev->bitmap->width, 23);
00103
00104         #if CONFIG_MENU_MENUBAR
00105             labels[3] = (const_iptr_t)ch_labels[chn];
00106             mbar_init(&mb, lev->bitmap, labels, countof(labels));
00107             mbar_draw(&mb);
00108         #endif /* CONFIG_MENU_MENUBAR */
00109
00110         /* Input loop for double level setting */
00111         for (;;)
00112         {
00113             #if CONFIG_LEVELEDIT_TIMEOUT != 0
00114                 ticks_t idle_timeout = timer_clock();
00115             #endif
00116             do
00117             {
00118                 if (lev->display_hook)
00119                     lev->display_hook(lev);
00120                 else
00121                 {
00122                     text_xprintf(lev->bitmap, 1, 0, TEXT_CENTER | TEXT_FILL, lev->unit);
00123                     PGM_FUNC(text_xprintf)(lev->bitmap, 1, 3, 0, PGM_STR("%d"), *lev->ch1_val);
00124                     PGM_FUNC(text_xprintf)(lev->bitmap, 1, 14, 0, PGM_STR("%d"), *lev->ch2_val);
00125
00126                     lbar_setLevel(&bar1, *lev->ch1_val);
00127                     lbar_setLevel(&bar2, *lev->ch2_val);
00128                     lbar_draw(&bar1);
00129                     lbar_draw(&bar2);
00130                 }
00131
00132                 #if CONFIG_LEVELEDIT_TIMEOUT != 0
00133                     if (timer_clock() - idle_timeout > ms_to_ticks(CONFIG_LEVELEDIT_TIMEOUT))
00134                     {
00135                         /* Accept input implicitly */
00136                         keys = K_OK;
00137                         break;
00138                     }
00139                 #endif
00140             }
00141             while (!(keys = kbd_peek()));
00142
00143             if (keys & K_CANCEL)
00144                 break;
00145
00146             if (keys & K_OK)
00147             {
00148                 chn = (chn + 1) % 3;
00149
00150                 #if CONFIG_MENU_MENUBAR
00151                     labels[3] = (const_iptr_t)ch_labels[chn];
00152                     mbar_draw(&mb);
00153                 #endif /* CONFIG_MENU_MENUBAR */
00154             }
00155
00156             /* Increment step to achieve greater accelerations on larger values */
00157             if (keys & K_REPEAT)
00158                 step = MIN(rep_step, step + 1);
00159             else
00160                 step = lev->step;
00161
00162             if (keys & (K_UP | K_DOWN))
00163             {
00164                 if (keys & K_UP)
00165                 {
00166                     /* If changing both channels (chn == 0), don't change
00167                      * level if one of two is at min or max */
00168                     if (chn != 0 ||
00169                             (*lev->ch1_val + step <= lev->max
00170                              && *lev->ch2_val + step <= lev->max))
00171                     {
00172                         /* If chn == 0 change both channels */
00173                         if (chn != 2)
00174                         {
00175                             *lev->ch1_val += step;
00176                             if (*lev->ch1_val > lev->max)
00177                                 *lev->ch1_val = lev->max;
00178                         }
00179                         if (chn != 1)
00180                         {
00181                             *lev->ch2_val += step;
00182                             if (*lev->ch2_val > lev->max)
00183                                 *lev->ch2_val = lev->max;
00184                         }
00185                     }
00186                 }
00187                 else
00188                 {
00189                     if (chn != 0 ||
00190                             (*lev->ch1_val - step >= lev->min
00191                              && *lev->ch2_val - step >= lev->min))
00192                     {
00193                         if (chn != 2)
00194                         {
00195                             *lev->ch1_val -= step;
00196                             if (*lev->ch1_val < lev->min)
00197                                 *lev->ch1_val = lev->min;
00198                         }
00199                         if (chn != 1)
00200                         {
00201                             *lev->ch2_val -= step;
00202                             if (*lev->ch2_val < lev->min)
00203                                 *lev->ch2_val = lev->min;
00204                         }
00205                     }
00206                 }
00207
00208                 if (lev->set_hook)
00209                     lev->set_hook();
00210             }
00211         } // end for(;;)
00212     }
00213     else
00214     {
00215         const PGM_ATTR char *fmt = lev->unit ? PGM_STR("%d %s") : PGM_STR("%d");
00216
00217 /*
00218         const int textw = MAX(PGM_FUNC(text_widthf)(lev->bitmap, fmt, lev->max, lev->unit),
00219                         PGM_FUNC(text_widthf)(lev->bitmap, fmt, lev->min, lev->unit));
00220
00221         const coord_t barlen = lev->bitmap->width - 6 - textw;
00222 */
00223         const coord_t barlen = lev->bitmap->width;
00224         const coord_t barvtop = lev->bitmap->height / 2 - LBAR_HEIGHT/2 + lev->bitmap->font->height;
00225         lbar_init(&bar1, lev->bitmap, LBAR_HORIZONTAL,
00226               lev->min, lev->max, *lev->ch1_val,
00227               0, barvtop, barlen,  barvtop + LBAR_HEIGHT);
00228
00229         #if CONFIG_MENU_MENUBAR
00230             mbar_init(&mb, lev->bitmap, labels, countof(labels));
00231             mbar_draw(&mb);
00232         #endif /* CONFIG_MENU_MENUBAR */
00233
00234         /* Input loop for single level setting */
00235         for (;;)
00236         {
00237             #if CONFIG_LEVELEDIT_TIMEOUT != 0
00238                 ticks_t idle_timeout = timer_clock();
00239             #endif
00240             do
00241             {
00242                 if (lev->display_hook)
00243                     lev->display_hook(lev);
00244                 else
00245                 {
00246                     if (lev->type != LEVELEDIT_NOBAR)
00247                     {
00248                         lbar_setLevel(&bar1, *lev->ch1_val);
00249                         lbar_draw(&bar1);
00250                     }
00251                     PGM_FUNC(text_xyprintf)(lev->bitmap, 0, bar1.y1 - lev->bitmap->font->height,
00252                         TEXT_CENTER | TEXT_FILL, fmt, *lev->ch1_val, lev->unit);
00253                 }
00254
00255                 #if CONFIG_LEVELEDIT_TIMEOUT != 0
00256                     if (timer_clock() - idle_timeout > CONFIG_LEVELEDIT_TIMEOUT)
00257                     {
00258                         /* Accept input implicitly */
00259                         keys = K_CANCEL;
00260                         break;
00261                     }
00262                 #endif
00263
00264             }
00265             while (!(keys = kbd_peek()));
00266
00267             if (keys & K_CANCEL)
00268                 break;
00269
00270             /* Increment step to achieve greater accelerations on larger values */
00271             if (keys & K_REPEAT)
00272                 step = MIN(rep_step, step + 1);
00273             else
00274                 step = lev->step;
00275
00276             if (keys & K_UP)
00277             {
00278                 *lev->ch1_val += step;
00279                 if (*lev->ch1_val > lev->max)
00280                     *lev->ch1_val = lev->max;
00281             }
00282
00283             if (keys & K_DOWN)
00284             {
00285                 *lev->ch1_val -= step;
00286                 if (*lev->ch1_val < lev->min)
00287                     *lev->ch1_val = lev->min;
00288             }
00289
00290             if (lev->set_hook)
00291                 lev->set_hook();
00292         }
00293     }
00294
00295     kbd_setRepeatMask(old_rpt_mask);
00296 }
00297
00302 void level_init(struct LevelEdit *lev,
00303         int type,
00304         struct Bitmap *bmp, const char *title, const char *unit,
00305         int min, int max, int step,
00306         int *ch1_val, int *ch2_val,
00307         level_set_callback *set_hook, display_callback *display_hook)
00308 {
00309     lev->type   = type;
00310     lev->bitmap = bmp;
00311     lev->title  = title;
00312     lev->unit   = unit;
00313     lev->min    = min;
00314     lev->max    = max;
00315     lev->step   = step;
00316
00317     lev->ch1_val = ch1_val;
00318     lev->ch2_val = ch2_val;
00319     lev->set_hook     = set_hook;
00320     lev->display_hook = display_hook;
00321 }


BeRTOS: leveledit.h File Reference

  • gui
Data Structures | Defines | Typedefs | Functions
leveledit.h File Reference

Generic editor for (volume/gain/contrast/...) setting. More...

Go to the source code of this file.

Data Structures

struct | LevelEdit
State of a level meter. More...

Defines

#define | LEVELEDIT_NOBAR 0
Edit number only, without bar nor units.
#define | LEVELEDIT_SINGLE 1
Single channel editing.
#define | LEVELEDIT_DOUBLE 2
Double channel editing.

Typedefs

typedef void | level_set_callback (void)
Type for callback used to set meter levels.
typedef void | display_callback (struct LevelEdit *)
Type for callback used to customize display of units.

Functions

void | level_init (struct LevelEdit *lev, int type, struct Bitmap *bmp, const char *title, const char *unit, int min, int max, int step, int *ch1_val, int *ch2_val, level_set_callback *change_hook, display_callback *display_hook)
LevelEdit structure initialization.
void | level_edit (struct LevelEdit *lev)
Allow user to change level.

Detailed Description

Generic editor for (volume/gain/contrast/...) setting.

Author:
Stefano Fedrigo <aleph@develer.com>

Definition in file leveledit.h.

Function Documentation

void level_init | ( | struct LevelEdit * | lev,
 |  | int | type,
 |  | struct Bitmap * | bmp,
 |  | const char * | title,
 |  | const char * | unit,
 |  | int | min,
 |  | int | max,
 |  | int | step,
 |  | int * | ch1_val,
 |  | int * | ch2_val,
 |  | level_set_callback * | set_hook,
 |  | display_callback * | display_hook
 | ) |  |

LevelEdit structure initialization.

Init data structure and init LevelEdit widgets.

Definition at line 302 of file leveledit.c.


BeRTOS: leveledit.h Source File

  • gui
leveledit.h
Go to the documentation of this file.
00001
00037 #ifndef GUI_LEVELEDIT_H
00038 #define GUI_LEVELEDIT_H
00039
00040 //#include <gui/levelbar.h>
00041
00042 /* Type for level_init */
00043 #define LEVELEDIT_NOBAR  0
00044 #define LEVELEDIT_SINGLE 1
00045 #define LEVELEDIT_DOUBLE 2
00049 /* Fwd decl */
00050 struct Bitmap;
00051 struct LevelEdit;
00052
00054 typedef void level_set_callback(void);
00055
00057 typedef void display_callback(struct LevelEdit *);
00058
00062 typedef struct LevelEdit {
00063     int type;           /*<! Type of level edititing mode (see prev defines) */
00064     const char *title;  /*<! Title on top of screen */
00065     const char *unit;   /*<! Unit of quantity changed by this LevelEdit */
00066     int min;            /*<! Minimum level */
00067     int max;            /*<! Maximum level */
00068     int step;           /*<! Value of a single increment/decrement */
00069
00070     level_set_callback *set_hook;     /*<! Callback called when a value is changed  */
00071     display_callback   *display_hook; /*<! Callback for complex unit display */
00072     int *ch1_val;                     /*<! (left) Value edited by this leveledit */
00073     int *ch2_val;                     /*<! Right channel edited */
00074
00075     struct Bitmap   *bitmap;  /*<! Bitmap where the whole thing is rendered */
00076 } LevelEdit;
00077
00078
00079 void level_init(struct LevelEdit *lev,
00080         int type,
00081         struct Bitmap *bmp, const char *title, const char *unit,
00082         int min, int max, int step,
00083         int *ch1_val, int *ch2_val,
00084         level_set_callback *change_hook, display_callback *display_hook);
00085 void level_edit(struct LevelEdit *lev);
00086
00087 #endif /* GUI_LEVELEDIT_H */


BeRTOS: line.c File Reference

  • gfx
Functions
line.c File Reference

Line drawing graphics routines. More...

#include "gfx.h"
#include "gfx_p.h"
#include "cfg/cfg_gfx.h"
#include <cfg/debug.h>
#include <cfg/macros.h>

Go to the source code of this file.

Functions

static void | gfx_lineUnclipped (Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2)
Draw a sloped line without performing clipping.
void | gfx_line (Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2)
Draw a sloped line segment.
void | gfx_moveTo (Bitmap *bm, coord_t x, coord_t y)
Move the current pen position to the specified coordinates.
void | gfx_lineTo (Bitmap *bm, coord_t x, coord_t y)
Draw a line from the current pen position to the new coordinates.
void | gfx_rectDraw (Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2)
Draw the perimeter of an hollow rectangle.
void | gfx_rectFillC (Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2, uint8_t color)
Fill a rectangular area with color.
void | gfx_rectFill (Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2)
Draw a filled rectangle.
void | gfx_rectClear (Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2)
Clear a rectangular area.

Detailed Description

Line drawing graphics routines.

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>
See also:
gfx.h

Definition in file line.c.

Function Documentation

void gfx_line | ( | Bitmap * | bm,
 |  | coord_t | x1,
 |  | coord_t | y1,
 |  | coord_t | x2,
 |  | coord_t | y2
 | ) |  |

Draw a sloped line segment.

Draw a sloped line segment identified by the provided start and end coordinates on the bitmap bm.

The line endpoints are clipped inside the current bitmap clipping rectangle using the Cohen-Sutherland algorithm, which is very fast.

Note:
The point at coordinates x2 y2 is not drawn.
This function does not update the current pen position.

Definition at line 183 of file line.c.

void gfx_lineTo | ( | Bitmap * | bm,
 |  | coord_t | x,
 |  | coord_t | y
 | ) |  |

Draw a line from the current pen position to the new coordinates.

Note:
This function moves the current pen position to the new coordinates.
See also:
gfx_line()

Definition at line 263 of file line.c.

static void gfx_lineUnclipped | ( | Bitmap * | bm,
 |  | coord_t | x1,
 |  | coord_t | y1,
 |  | coord_t | x2,
 |  | coord_t | y2
 | ) |  | [static]

Draw a sloped line without performing clipping.

Parameters are the same of gfx_line(). This routine is based on the Bresenham Line-Drawing Algorithm.

Note:
Passing coordinates outside the bitmap boundaries will result in memory trashing.
See also:
gfx_line()

Definition at line 70 of file line.c.

void gfx_moveTo | ( | Bitmap * | bm,
 |  | coord_t | x,
 |  | coord_t | y
 | ) |  |

Move the current pen position to the specified coordinates.

The pen position is used for drawing operations such as gfx_lineTo(), which can be used to draw polygons.

Definition at line 249 of file line.c.

void gfx_rectClear | ( | Bitmap * | bm,
 |  | coord_t | x1,
 |  | coord_t | y1,
 |  | coord_t | x2,
 |  | coord_t | y2
 | ) |  |

Clear a rectangular area.

Note:
The bottom-right border of the rectangle is not cleared.
This function does not update the current pen position.

Definition at line 353 of file line.c.

void gfx_rectDraw | ( | Bitmap * | bm,
 |  | coord_t | x1,
 |  | coord_t | y1,
 |  | coord_t | x2,
 |  | coord_t | y2
 | ) |  |

Draw the perimeter of an hollow rectangle.

Note:
The bottom-right corner of the rectangle is drawn at (x2-1;y2-1).
This function does not update the current pen position.

Definition at line 276 of file line.c.

void gfx_rectFill | ( | Bitmap * | bm,
 |  | coord_t | x1,
 |  | coord_t | y1,
 |  | coord_t | x2,
 |  | coord_t | y2
 | ) |  |

Draw a filled rectangle.

Note:
The bottom-right border of the rectangle is not drawn.
This function does not update the current pen position.

Definition at line 340 of file line.c.

void gfx_rectFillC | ( | Bitmap * | bm,
 |  | coord_t | x1,
 |  | coord_t | y1,
 |  | coord_t | x2,
 |  | coord_t | y2,
 |  | uint8_t | color
 | ) |  |

Fill a rectangular area with color.

Note:
The bottom-right border of the rectangle is not drawn.
This function does not update the current pen position.

Definition at line 297 of file line.c.


BeRTOS: line.c Source File

  • gfx
line.c
Go to the documentation of this file.
00001
00042 #include "gfx.h"
00043 #include "gfx_p.h"
00044
00045 #include "cfg/cfg_gfx.h"   /* CONFIG_GFX_CLIPPING */
00046 #include <cfg/debug.h>   /* ASSERT() */
00047 #include <cfg/macros.h>  /* SWAP() */
00048
00049 /* Configuration sanity checks */
00050 #if !defined(CONFIG_GFX_CLIPPING) || (CONFIG_GFX_CLIPPING != 0 && CONFIG_GFX_CLIPPING != 1)
00051     #error CONFIG_GFX_CLIPPING must be defined to either 0 or 1
00052 #endif
00053 #if !defined(CONFIG_GFX_VCOORDS) || (CONFIG_GFX_VCOORDS != 0 && CONFIG_GFX_VCOORDS != 1)
00054     #error CONFIG_GFX_VCOORDS must be defined to either 0 or 1
00055 #endif
00056
00070 static void gfx_lineUnclipped(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2)
00071 {
00072     int x, y, e, len, adx, ady, signx, signy;
00073
00074     if (x2 > x1)
00075     {
00076         /* left to right */
00077         signx = +1;
00078         adx = x2 - x1;
00079     }
00080     else
00081     {
00082         /* right to left */
00083         signx = -1;
00084         adx = x1 - x2;
00085     }
00086
00087     if (y2 > y1)
00088     {
00089         /* top to bottom */
00090         signy = +1;
00091         ady = y2 - y1;
00092     }
00093     else
00094     {
00095         /* bottom to top */
00096         signy = -1;
00097         ady = y1 - y2;
00098     }
00099
00100     x = x1;
00101     y = y1;
00102
00103     if (adx > ady)
00104     {
00105         /* X-major line (octants 1/4/5/8) */
00106
00107         len = adx;
00108         e = -adx;
00109         while (len--)
00110         {
00111             /* Sanity check */
00112             ASSERT((x >= 0) && (x < bm->width) && (y >= 0) && (y < bm->height));
00113             BM_PLOT(bm, x, y);
00114             x += signx;
00115             e += ady;
00116             if (e >= 0)
00117             {
00118                 y += signy;
00119                 e -= adx;
00120             }
00121         }
00122     }
00123     else
00124     {
00125         /* Y-major line (octants 2/3/6/7) */
00126
00127         len = ady;
00128         e = -ady;
00129         while (len--)
00130         {
00131             /* Sanity check */
00132             ASSERT ((x >= 0) && (x < bm->width) && (y >= 0) && (y < bm->height));
00133             BM_PLOT(bm, x, y);
00134             y += signy;
00135             e += adx;
00136             if (e >= 0)
00137             {
00138                 x += signx;
00139                 e -= ady;
00140             }
00141         }
00142     }
00143 }
00144
00145 #if CONFIG_GFX_CLIPPING
00146
00148 static int gfx_findRegion(int x, int y, Rect *cr)
00149 {
00150     int code = 0;
00151
00152     if (y >= cr->ymax)
00153         code |= 1; /* below */
00154     else if (y < cr->ymin)
00155         code |= 2; /* above */
00156
00157     if (x >= cr->xmax)
00158         code |= 4; /* right */
00159     else if (x < cr->xmin)
00160         code |= 8; /* left */
00161
00162     return code;
00163 }
00164
00165 #endif /* CONFIG_CLIPPING */
00166
00183 void gfx_line(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2)
00184 {
00185 #if CONFIG_GFX_CLIPPING
00186     int clip1 = gfx_findRegion(x1, y1, &bm->cr);
00187     int clip2 = gfx_findRegion(x2, y2, &bm->cr);
00188
00189     /* Loop while there is at least one point outside */
00190     while (clip1 | clip2)
00191     {
00192         /* Check for line totally outside */
00193         if (clip1 & clip2)
00194             return;
00195
00196         int c = clip1 ? clip1 : clip2;
00197         int x, y;
00198
00199         if (c & 1) /* Below */
00200         {
00201             x = x1 + (x2 - x1) * (bm->cr.ymax - y1) / (y2 - y1);
00202             y = bm->cr.ymax - 1;
00203         }
00204         else if (c & 2) /* Above */
00205         {
00206             x = x1 + (x2 - x1) * (bm->cr.ymin - y1) / (y2 - y1);
00207             y = bm->cr.ymin;
00208         }
00209         else if (c & 4) /* Right */
00210         {
00211             y = y1 + (y2 - y1) * (bm->cr.xmax - x1) / (x2 - x1);
00212             x = bm->cr.xmax - 1;
00213         }
00214         else /* Left */
00215         {
00216             y = y1 + (y2 - y1) * (bm->cr.xmin - x1) / (x2 - x1);
00217             x = bm->cr.xmin;
00218         }
00219
00220         if (c == clip1) /* First endpoint was clipped */
00221         {
00222             // TODO: adjust Bresenham error term
00223             //coord_t clipdx = ABS(x - x1);
00224             //coord_t clipdy = ABS(y - y1);
00225             //e += (clipdy * e2) + ((clipdx - clipdy) * e1);
00226
00227             x1 = x;
00228             y1 = y;
00229             clip1 = gfx_findRegion(x1, y1, &bm->cr);
00230         }
00231         else /* Second endpoint was clipped */
00232         {
00233             x2 = x;
00234             y2 = y;
00235             clip2 = gfx_findRegion(x2, y2, &bm->cr);
00236         }
00237     }
00238 #endif /* CONFIG_GFX_CLIPPING */
00239
00240     gfx_lineUnclipped(bm, x1, y1, x2, y2);
00241 }
00242
00249 void gfx_moveTo(Bitmap *bm, coord_t x, coord_t y)
00250 {
00251     bm->penX = x;
00252     bm->penY = y;
00253 }
00254
00263 void gfx_lineTo(Bitmap *bm, coord_t x, coord_t y)
00264 {
00265     gfx_line(bm, bm->penX, bm->penY, x, y);
00266     gfx_moveTo(bm, x, y);
00267 }
00268
00269
00276 void gfx_rectDraw(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2)
00277 {
00278     /* Sort coords (needed for correct bottom-right semantics) */
00279     if (x1 > x2) SWAP(x1, x2);
00280     if (y1 > y2) SWAP(y1, y2);
00281
00282     /* Draw rectangle */
00283     gfx_line(bm, x1,   y1,   x2-1, y1);
00284     gfx_line(bm, x2-1, y1,   x2-1, y2-1);
00285     gfx_line(bm, x2-1, y2-1, x1,   y2-1);
00286     gfx_line(bm, x1,   y2-1, x1,   y1);
00287 }
00288
00289
00297 void gfx_rectFillC(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2, uint8_t color)
00298 {
00299     coord_t x, y;
00300
00301     /* Sort coords */
00302     if (x1 > x2) SWAP(x1, x2);
00303     if (y1 > y2) SWAP(y1, y2);
00304
00305 #if CONFIG_GFX_CLIPPING
00306     /* Clip rect to bitmap clip region */
00307     if (x1 < bm->cr.xmin)   x1 = bm->cr.xmin;
00308     if (x2 < bm->cr.xmin)   x2 = bm->cr.xmin;
00309     if (x1 > bm->cr.xmax)   x1 = bm->cr.xmax;
00310     if (x2 > bm->cr.xmax)   x2 = bm->cr.xmax;
00311     if (y1 < bm->cr.ymin)   y1 = bm->cr.ymin;
00312     if (y2 < bm->cr.ymin)   y2 = bm->cr.ymin;
00313     if (y1 > bm->cr.ymax)   y1 = bm->cr.ymax;
00314     if (y2 > bm->cr.ymax)   y2 = bm->cr.ymax;
00315 #endif /* CONFIG_GFX_CLIPPING */
00316
00317     /* NOTE: Code paths are duplicated for efficiency */
00318     if (color) /* fill */
00319     {
00320         for (x = x1; x < x2; x++)
00321             for (y = y1; y < y2; y++)
00322                 BM_PLOT(bm, x, y);
00323     }
00324     else /* clear */
00325     {
00326         for (x = x1; x < x2; x++)
00327             for (y = y1; y < y2; y++)
00328                 BM_CLEAR(bm, x, y);
00329     }
00330 }
00331
00332
00340 void gfx_rectFill(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2)
00341 {
00342     gfx_rectFillC(bm, x1, y1, x2, y2, 0xFF);
00343 }
00344
00345
00353 void gfx_rectClear(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2)
00354 {
00355     gfx_rectFillC(bm, x1, y1, x2, y2, 0x00);
00356 }
00357
00358
00359 #if CONFIG_GFX_VCOORDS
00360
00364 void gfx_setViewRect(Bitmap *bm, vcoord_t x1, vcoord_t y1, vcoord_t x2, vcoord_t y2)
00365 {
00366     ASSERT(x1 != x2);
00367     ASSERT(y1 != y2);
00368
00369     bm->orgX    = x1;
00370     bm->orgY    = y1;
00371     bm->scaleX  = (vcoord_t)(bm->cr.xmax - bm->cr.xmin - 1) / (vcoord_t)(x2 - x1);
00372     bm->scaleY  = (vcoord_t)(bm->cr.ymax - bm->cr.ymin - 1) / (vcoord_t)(y2 - y1);
00373
00374 /*  DB(kprintf("orgX = %f, orgY = %f, scaleX = %f, scaleY = %f\n",
00375         bm->orgX, bm->orgY, bm->scaleX, bm->scaleY);)
00376 */
00377 }
00378
00379
00384 coord_t gfx_transformX(Bitmap *bm, vcoord_t x)
00385 {
00386     return bm->cr.xmin + (coord_t)((x - bm->orgX) * bm->scaleX);
00387 }
00388
00393 coord_t gfx_transformY(Bitmap *bm, vcoord_t y)
00394 {
00395     return bm->cr.ymin + (coord_t)((y - bm->orgY) * bm->scaleY);
00396 }
00397
00398
00402 void gfx_vline(Bitmap *bm, vcoord_t x1, vcoord_t y1, vcoord_t x2, vcoord_t y2)
00403 {
00404     gfx_line(bm,
00405         gfx_transformX(bm, x1), gfx_transformY(bm, y1),
00406         gfx_transformY(bm, x2), gfx_transformY(bm, y2));
00407 }
00408 #endif /* CONFIG_GFX_VCOORDS */


BeRTOS: list.h File Reference

  • struct
Data Structures | Defines | Functions
list.h File Reference
#include <cfg/compiler.h>
#include <cfg/debug.h>

Go to the source code of this file.

Data Structures

struct | Node
This structure represents a node for bidirectional lists. More...
struct | List
Head of a doubly-linked list of Node structs. More...
struct | PriNode
Extended node for priority queues. More...

Defines

#define | DECLARE_NODE_ANON(T) T *succ; T *pred;
Template for a naked node in a list of T structures.
#define | DECLARE_NODE_TYPE(T) typedef struct T##Node { T *succ; T *pred; } T##Node
Declare a typesafe node for structures of type T.
#define | DECLARE_LIST_TYPE(T)
Template for a list of T structures.
#define | LIST_HEAD(l) ((l)->head.succ)
Get a pointer to the first node in a list.
#define | LIST_TAIL(l) ((l)->tail.pred)
Get a pointer to the last node in a list.
#define | FOREACH_NODE(n, l)
Iterate over all nodes in a list.
#define | REVERSE_FOREACH_NODE(n, l)
Iterate backwards over all nodes in a list.
#define | LIST_INIT(l)
Initialize a list.
#define | LIST_ASSERT_VALID(l)
Make sure that a list is valid (it was initialized and is not corrupted).
#define | LIST_ASSERT_NOT_CONTAINS(list, node)
Checks that a node isn't part of a given list.
#define | LIST_EMPTY(l) ( (void *)((l)->head.succ) == (void *)(&(l)->tail) )
Tell whether a list is empty.
#define | ADDHEAD(l, n)
Add node to list head.
#define | ADDTAIL(l, n)
Add node to list tail.
#define | INSERT_BEFORE(n, ln)
Insert node n before node ln.
#define | REMOVE(n)
Remove n from whatever list it is in.
#define | LIST_ENQUEUE_HEAD(list, node)
Insert a priority node in a priority queue.
#define | LIST_ENQUEUE(list, node)
Insert a priority node in a priority queue.

Functions

Node * | list_remHead (List *l)
Unlink a node from the head of the list l.
Node * | list_remTail (List *l)
Unlink a node from the tail of the list l.

Detailed Description

Definition in file list.h.


BeRTOS: list.h Source File

  • struct
list.h
Go to the documentation of this file.
00001
00079 #ifndef STRUCT_LIST_H
00080 #define STRUCT_LIST_H
00081
00082 #include <cfg/compiler.h> /* INLINE */
00083 #include <cfg/debug.h> /* ASSERT_VALID_PTR() */
00084
00091 typedef struct _Node
00092 {
00093     struct _Node *succ;
00094     struct _Node *pred;
00095 } Node;
00096
00106 typedef struct _List
00107 {
00108     Node head;
00109     Node tail;
00110 } List;
00111
00115 typedef struct _PriNode
00116 {
00117     Node link;
00118     int  pri;
00119 } PriNode;
00120
00121
00152 #define DECLARE_NODE_ANON(T) \
00153     T *succ; T *pred;
00154
00156 #define DECLARE_NODE_TYPE(T) \
00157     typedef struct T##Node { T *succ; T *pred; } T##Node
00158
00160 #define DECLARE_LIST_TYPE(T) \
00161     DECLARE_NODE_TYPE(T); \
00162     typedef struct T##List { \
00163          T##Node head; \
00164          T##Node tail; \
00165     } T##List
00166
00167 #define NODE_TYPE(T) T##Node
00168 #define LIST_TYPE(T) T##List
00169
00175 #define LIST_HEAD(l) ((l)->head.succ)
00176
00182 #define LIST_TAIL(l) ((l)->tail.pred)
00183
00184 // TODO: move in compiler.h
00185 #if COMPILER_TYPEOF
00186     #define TYPEOF_OR_VOIDPTR(type) typeof(type)
00187 #else
00188     #define TYPEOF_OR_VOIDPTR(type) void *
00189 #endif
00190
00198 #define FOREACH_NODE(n, l) \
00199     for( \
00200         (n) = (TYPEOF_OR_VOIDPTR(n))LIST_HEAD(l); \
00201         ((Node *)(n))->succ; \
00202         (n) = (TYPEOF_OR_VOIDPTR(n))(((Node *)(n))->succ) \
00203     )
00204
00212 #define REVERSE_FOREACH_NODE(n, l) \
00213     for( \
00214         (n) = (TYPEOF_OR_VOIDPTR(n))LIST_TAIL(l); \
00215         ((Node *)(n))->pred; \
00216         (n) = (TYPEOF_OR_VOIDPTR(n))(((Node *)(n))->pred) \
00217     )
00218
00220 #define LIST_INIT(l) \
00221     do { \
00222         (l)->head.succ = (TYPEOF_OR_VOIDPTR((l)->head.succ)) &(l)->tail; \
00223         (l)->head.pred = NULL; \
00224         (l)->tail.succ = NULL; \
00225         (l)->tail.pred = (TYPEOF_OR_VOIDPTR((l)->tail.pred)) &(l)->head; \
00226     } while (0)
00227
00228 #ifdef _DEBUG
00229
00230     #define LIST_ASSERT_VALID(l) \
00231         do { \
00232             Node *n, *pred; \
00233             ASSERT((l)->head.succ != NULL); \
00234             ASSERT((l)->head.pred == NULL); \
00235             ASSERT((l)->tail.succ == NULL); \
00236             ASSERT((l)->tail.pred != NULL); \
00237             pred = &(l)->head; \
00238             FOREACH_NODE(n, l) \
00239             { \
00240                 ASSERT(n->pred == pred); \
00241                 pred = n; \
00242             } \
00243             ASSERT(n == &(l)->tail); \
00244         } while (0)
00245
00247     #define LIST_ASSERT_NOT_CONTAINS(list,node) \
00248         do { \
00249             Node *ln; \
00250             ASSERT_VALID_PTR(list); \
00251             ASSERT_VALID_PTR(node); \
00252             FOREACH_NODE(ln, list) \
00253                 ASSERT(ln != (Node *)(node)); \
00254         } while (0)
00255
00256     #define INVALIDATE_NODE(n) ((n)->succ = (n)->pred = NULL)
00257 #else
00258     #define LIST_ASSERT_VALID(l) do {} while (0)
00259     #define LIST_ASSERT_NOT_CONTAINS(list,node) do {} while (0)
00260     #define INVALIDATE_NODE(n) do {} while (0)
00261 #endif
00262
00264 #define LIST_EMPTY(l)  ( (void *)((l)->head.succ) == (void *)(&(l)->tail) )
00265
00267 #define ADDHEAD(l,n) \
00268     do { \
00269         LIST_ASSERT_NOT_CONTAINS((l),(n)); \
00270         (n)->succ = (l)->head.succ; \
00271         (n)->pred = (l)->head.succ->pred; \
00272         (n)->succ->pred = (n); \
00273         (n)->pred->succ = (n); \
00274     } while (0)
00275
00277 #define ADDTAIL(l,n) \
00278     do { \
00279         LIST_ASSERT_NOT_CONTAINS((l),(n)); \
00280         (n)->succ = &(l)->tail; \
00281         (n)->pred = (l)->tail.pred; \
00282         (n)->pred->succ = (n); \
00283         (l)->tail.pred = (n); \
00284     } while (0)
00285
00292 #define INSERT_BEFORE(n,ln) \
00293     do { \
00294         ASSERT_VALID_PTR(n); \
00295         ASSERT_VALID_PTR(ln); \
00296         (n)->succ = (ln); \
00297         (n)->pred = (ln)->pred; \
00298         (ln)->pred->succ = (n); \
00299         (ln)->pred = (n); \
00300     } while (0)
00301
00308 #define REMOVE(n) \
00309     do { \
00310         ASSERT_VALID_PTR(n); \
00311         (n)->pred->succ = (n)->succ; \
00312         (n)->succ->pred = (n)->pred; \
00313         INVALIDATE_NODE(n); \
00314     } while (0)
00315
00322 #define LIST_ENQUEUE_HEAD(list, node) \
00323     do { \
00324         PriNode *ln; \
00325         LIST_ASSERT_NOT_CONTAINS((list),(node)); \
00326         FOREACH_NODE(ln, (list)) \
00327             if (ln->pri <= (node)->pri) \
00328                 break; \
00329         INSERT_BEFORE(&(node)->link, &ln->link); \
00330     } while (0)
00331
00338 #define LIST_ENQUEUE(list, node) \
00339     do { \
00340         PriNode *ln; \
00341         LIST_ASSERT_NOT_CONTAINS((list),(node)); \
00342         FOREACH_NODE(ln, (list)) \
00343             if (ln->pri < (node)->pri) \
00344                 break; \
00345         INSERT_BEFORE(&(node)->link, &ln->link); \
00346     } while (0)
00347
00348
00354 INLINE Node *list_remHead(List *l)
00355 {
00356     Node *n;
00357
00358     ASSERT_VALID_PTR(l);
00359
00360     if (LIST_EMPTY(l))
00361         return (Node *)0;
00362
00363     n = l->head.succ; /* Get first node. */
00364     l->head.succ = n->succ; /* Link list head to second node. */
00365     n->succ->pred = &l->head; /* Link second node to list head. */
00366
00367     INVALIDATE_NODE(n);
00368     return n;
00369 }
00370
00376 INLINE Node *list_remTail(List *l)
00377 {
00378     Node *n;
00379
00380     ASSERT_VALID_PTR(l);
00381
00382     if (LIST_EMPTY(l))
00383         return NULL;
00384
00385     n = l->tail.pred; /* Get last node. */
00386     l->tail.pred = n->pred; /* Link list tail to second last node. */
00387     n->pred->succ = &l->tail; /* Link second last node to list tail. */
00388
00389     INVALIDATE_NODE(n);
00390     return n;
00391 }
00392  //defgroup list
00394
00395 #endif /* STRUCT_LIST_H */


BeRTOS: lm3s.h File Reference

  • cpu
  • cortex-m3
  • io
lm3s.h File Reference
#include <cpu/detect.h>
#include <cfg/compiler.h>
#include "lm3s_com.h"
#include "lm3s_types.h"
#include "lm3s_ints.h"
#include "lm3s_nvic.h"
#include "lm3s_sysctl.h"
#include "lm3s_gpio.h"
#include "lm3s_memmap.h"
#include "lm3s_uart.h"
#include "lm3s_ssi.h"
#include "lm3s_i2c.h"
#include "lm3s_adc.h"

Go to the source code of this file.

Detailed Description

Author:
Andrea Righi <arighi@develer.com>

Definition in file lm3s.h.


BeRTOS: lm3s.h Source File

  • cpu
  • cortex-m3
  • io
lm3s.h
Go to the documentation of this file.
00001
00036 #ifndef LM3S_H
00037 #define LM3S_H
00038
00039 #include <cpu/detect.h>
00040 #include <cfg/compiler.h>
00041
00042 #include "lm3s_com.h"
00043 #include "lm3s_types.h"
00044 #include "lm3s_ints.h"
00045 #include "lm3s_nvic.h"
00046 #include "lm3s_sysctl.h"
00047 #include "lm3s_gpio.h"
00048 #include "lm3s_memmap.h"
00049 #include "lm3s_uart.h"
00050 #include "lm3s_ssi.h"
00051 #include "lm3s_i2c.h"
00052 #include "lm3s_adc.h"
00053
00054 #if CPU_CM3_LM3S1968
00055     #define GPIO_I2C0_SCL_PIN   BV(2)
00056     #define GPIO_I2C0_SDA_PIN   BV(3)
00057
00058     #define GPIO_I2C1_SCL_PIN   BV(6)
00059     #define GPIO_I2C1_SDA_PIN   BV(7)
00060 #elif CPU_CM3_LM3S8962
00061     #define GPIO_I2C0_SCL_PIN   BV(2)
00062     #define GPIO_I2C0_SDA_PIN   BV(3)
00063 #else
00064     #error No i2c pins are defined for select cpu
00065 #endif
00066
00067 /* Flash memory mapping */
00068 #if CPU_CM3_LM3S1968 || CPU_CM3_LM3S8962
00069     #define FLASH_SIZE               0x40000 //< 256KiB
00070     #define FLASH_PAGE_SIZE          0x400   //< 1KiB
00071 #else
00072     #error No embedded definition for select cpu
00073 #endif
00074
00075 #endif /* LM3S_H */


BeRTOS: lm3s_adc.h File Reference

  • cpu
  • cortex-m3
  • io
Defines
lm3s_adc.h File Reference

LM3S ADC definition. More...

Go to the source code of this file.

Defines

#define | ADC_O_ACTSS 0x00000000
ADC Active Sample Sequencer.
#define | ADC_O_RIS 0x00000004
ADC Raw Interrupt Status.
#define | ADC_O_IM 0x00000008
ADC Interrupt Mask.
#define | ADC_O_ISC 0x0000000C
ADC Interrupt Status and Clear.
#define | ADC_O_OSTAT 0x00000010
ADC Overflow Status.
#define | ADC_O_EMUX 0x00000014
ADC Event Multiplexer Select.
#define | ADC_O_USTAT 0x00000018
ADC Underflow Status.
#define | ADC_O_SSPRI 0x00000020
ADC Sample Sequencer Priority.
#define | ADC_O_SPC 0x00000024
ADC Sample Phase Control.
#define | ADC_O_PSSI 0x00000028
ADC Processor Sample Sequence.
#define | ADC_O_SAC 0x00000030
ADC Sample Averaging Control.
#define | ADC_O_DCISC 0x00000034
ADC Digital Comparator Interrupt.
#define | ADC_O_CTL 0x00000038
ADC Control.
#define | ADC_O_SSMUX0 0x00000040
ADC Sample Sequence Input.
#define | ADC_O_SSCTL0 0x00000044
ADC Sample Sequence Control 0.
#define | ADC_O_SSFIFO0 0x00000048
ADC Sample Sequence Result FIFO.
#define | ADC_O_SSFSTAT0 0x0000004C
ADC Sample Sequence FIFO 0.
#define | ADC_O_SSOP0 0x00000050
ADC Sample Sequence 0 Operation.
#define | ADC_O_SSDC0 0x00000054
ADC Sample Sequence 0 Digital.
#define | ADC_O_SSMUX1 0x00000060
ADC Sample Sequence Input.
#define | ADC_O_SSCTL1 0x00000064
ADC Sample Sequence Control 1.
#define | ADC_O_SSFIFO1 0x00000068
ADC Sample Sequence Result FIFO.
#define | ADC_O_SSFSTAT1 0x0000006C
ADC Sample Sequence FIFO 1.
#define | ADC_O_SSOP1 0x00000070
ADC Sample Sequence 1 Operation.
#define | ADC_O_SSDC1 0x00000074
ADC Sample Sequence 1 Digital.
#define | ADC_O_SSMUX2 0x00000080
ADC Sample Sequence Input.
#define | ADC_O_SSCTL2 0x00000084
ADC Sample Sequence Control 2.
#define | ADC_O_SSFIFO2 0x00000088
ADC Sample Sequence Result FIFO.
#define | ADC_O_SSFSTAT2 0x0000008C
ADC Sample Sequence FIFO 2.
#define | ADC_O_SSOP2 0x00000090
ADC Sample Sequence 2 Operation.
#define | ADC_O_SSDC2 0x00000094
ADC Sample Sequence 2 Digital.
#define | ADC_O_SSMUX3 0x000000A0
ADC Sample Sequence Input.
#define | ADC_O_SSCTL3 0x000000A4
ADC Sample Sequence Control 3.
#define | ADC_O_SSFIFO3 0x000000A8
ADC Sample Sequence Result FIFO.
#define | ADC_O_SSFSTAT3 0x000000AC
ADC Sample Sequence FIFO 3.
#define | ADC_O_SSOP3 0x000000B0
ADC Sample Sequence 3 Operation.
#define | ADC_O_SSDC3 0x000000B4
ADC Sample Sequence 3 Digital.
#define | ADC_O_TMLB 0x00000100
ADC Test Mode Loopback.
#define | ADC_O_DCRIC 0x00000D00
ADC Digital Comparator Reset.
#define | ADC_O_DCCTL0 0x00000E00
ADC Digital Comparator Control 0.
#define | ADC_O_DCCTL1 0x00000E04
ADC Digital Comparator Control 1.
#define | ADC_O_DCCTL2 0x00000E08
ADC Digital Comparator Control 2.
#define | ADC_O_DCCTL3 0x00000E0C
ADC Digital Comparator Control 3.
#define | ADC_O_DCCTL4 0x00000E10
ADC Digital Comparator Control 4.
#define | ADC_O_DCCTL5 0x00000E14
ADC Digital Comparator Control 5.
#define | ADC_O_DCCTL6 0x00000E18
ADC Digital Comparator Control 6.
#define | ADC_O_DCCTL7 0x00000E1C
ADC Digital Comparator Control 7.
#define | ADC_O_DCCMP0 0x00000E40
ADC Digital Comparator Range 0.
#define | ADC_O_DCCMP1 0x00000E44
ADC Digital Comparator Range 1.
#define | ADC_O_DCCMP2 0x00000E48
ADC Digital Comparator Range 2.
#define | ADC_O_DCCMP3 0x00000E4C
ADC Digital Comparator Range 3.
#define | ADC_O_DCCMP4 0x00000E50
ADC Digital Comparator Range 4.
#define | ADC_O_DCCMP5 0x00000E54
ADC Digital Comparator Range 5.
#define | ADC_O_DCCMP6 0x00000E58
ADC Digital Comparator Range 6.
#define | ADC_O_DCCMP7 0x00000E5C
ADC Digital Comparator Range 7.
#define | ADC_RIS_INRDC 0x00010000
Digital Comparator Raw Interrupt.
#define | ADC_IM_DCONSS3 0x00080000
Digital Comparator Interrupt on.
#define | ADC_IM_DCONSS2 0x00040000
Digital Comparator Interrupt on.
#define | ADC_IM_DCONSS1 0x00020000
Digital Comparator Interrupt on.
#define | ADC_IM_DCONSS0 0x00010000
Digital Comparator Interrupt on.
#define | ADC_ISC_DCINSS3 0x00080000
Digital Comparator Interrupt.
#define | ADC_ISC_DCINSS2 0x00040000
Digital Comparator Interrupt.
#define | ADC_ISC_DCINSS1 0x00020000
Digital Comparator Interrupt.
#define | ADC_ISC_DCINSS0 0x00010000
Digital Comparator Interrupt.
#define | ADC_EMUX_EM3_PWM3 0x00009000
PWM3.
#define | ADC_EMUX_EM2_PWM3 0x00000900
PWM3.
#define | ADC_EMUX_EM1_PWM3 0x00000090
PWM3.
#define | ADC_EMUX_EM0_PWM3 0x00000009
PWM3.
#define | ADC_SPC_PHASE_M 0x0000000F
Phase Difference.
#define | ADC_SPC_PHASE_0 0x00000000
ADC sample lags by 0.0.
#define | ADC_SPC_PHASE_22_5 0x00000001
ADC sample lags by 22.5.
#define | ADC_SPC_PHASE_45 0x00000002
ADC sample lags by 45.0.
#define | ADC_SPC_PHASE_67_5 0x00000003
ADC sample lags by 67.5.
#define | ADC_SPC_PHASE_90 0x00000004
ADC sample lags by 90.0.
#define | ADC_SPC_PHASE_112_5 0x00000005
ADC sample lags by 112.5.
#define | ADC_SPC_PHASE_135 0x00000006
ADC sample lags by 135.0.
#define | ADC_SPC_PHASE_157_5 0x00000007
ADC sample lags by 157.5.
#define | ADC_SPC_PHASE_180 0x00000008
ADC sample lags by 180.0.
#define | ADC_SPC_PHASE_202_5 0x00000009
ADC sample lags by 202.5.
#define | ADC_SPC_PHASE_225 0x0000000A
ADC sample lags by 225.0.
#define | ADC_SPC_PHASE_247_5 0x0000000B
ADC sample lags by 247.5.
#define | ADC_SPC_PHASE_270 0x0000000C
ADC sample lags by 270.0.
#define | ADC_SPC_PHASE_292_5 0x0000000D
ADC sample lags by 292.5.
#define | ADC_SPC_PHASE_315 0x0000000E
ADC sample lags by 315.0.
#define | ADC_SPC_PHASE_337_5 0x0000000F
ADC sample lags by 337.5.
#define | ADC_PSSI_GSYNC 0x80000000
Global Synchronize.
#define | ADC_PSSI_SYNCWAIT 0x08000000
Synchronize Wait.
#define | ADC_DCISC_DCINT7 0x00000080
Digital Comparator 7 Interrupt.
#define | ADC_DCISC_DCINT6 0x00000040
Digital Comparator 6 Interrupt.
#define | ADC_DCISC_DCINT5 0x00000020
Digital Comparator 5 Interrupt.
#define | ADC_DCISC_DCINT4 0x00000010
Digital Comparator 4 Interrupt.
#define | ADC_DCISC_DCINT3 0x00000008
Digital Comparator 3 Interrupt.
#define | ADC_DCISC_DCINT2 0x00000004
Digital Comparator 2 Interrupt.
#define | ADC_DCISC_DCINT1 0x00000002
Digital Comparator 1 Interrupt.
#define | ADC_DCISC_DCINT0 0x00000001
Digital Comparator 0 Interrupt.
#define | ADC_CTL_VREF 0x00000001
Voltage Reference Select.
#define | ADC_SSOP0_S7DCOP 0x10000000
Sample 7 Digital Comparator.
#define | ADC_SSOP0_S6DCOP 0x01000000
Sample 6 Digital Comparator.
#define | ADC_SSOP0_S5DCOP 0x00100000
Sample 5 Digital Comparator.
#define | ADC_SSOP0_S4DCOP 0x00010000
Sample 4 Digital Comparator.
#define | ADC_SSOP0_S3DCOP 0x00001000
Sample 3 Digital Comparator.
#define | ADC_SSOP0_S2DCOP 0x00000100
Sample 2 Digital Comparator.
#define | ADC_SSOP0_S1DCOP 0x00000010
Sample 1 Digital Comparator.
#define | ADC_SSOP0_S0DCOP 0x00000001
Sample 0 Digital Comparator.
#define | ADC_SSDC0_S7DCSEL_M 0xF0000000
Sample 7 Digital Comparator.
#define | ADC_SSDC0_S6DCSEL_M 0x0F000000
Sample 6 Digital Comparator.
#define | ADC_SSDC0_S5DCSEL_M 0x00F00000
Sample 5 Digital Comparator.
#define | ADC_SSDC0_S4DCSEL_M 0x000F0000
Sample 4 Digital Comparator.
#define | ADC_SSDC0_S3DCSEL_M 0x0000F000
Sample 3 Digital Comparator.
#define | ADC_SSDC0_S2DCSEL_M 0x00000F00
Sample 2 Digital Comparator.
#define | ADC_SSDC0_S1DCSEL_M 0x000000F0
Sample 1 Digital Comparator.
#define | ADC_SSDC0_S0DCSEL_M 0x0000000F
Sample 0 Digital Comparator.
#define | ADC_SSOP1_S3DCOP 0x00001000
Sample 3 Digital Comparator.
#define | ADC_SSOP1_S2DCOP 0x00000100
Sample 2 Digital Comparator.
#define | ADC_SSOP1_S1DCOP 0x00000010
Sample 1 Digital Comparator.
#define | ADC_SSOP1_S0DCOP 0x00000001
Sample 0 Digital Comparator.
#define | ADC_SSDC1_S3DCSEL_M 0x0000F000
Sample 3 Digital Comparator.
#define | ADC_SSDC1_S2DCSEL_M 0x00000F00
Sample 2 Digital Comparator.
#define | ADC_SSDC1_S1DCSEL_M 0x000000F0
Sample 1 Digital Comparator.
#define | ADC_SSDC1_S0DCSEL_M 0x0000000F
Sample 0 Digital Comparator.
#define | ADC_SSMUX2_MUX3_M 0x0000F000
4th Sample Input Select
#define | ADC_SSMUX2_MUX2_M 0x00000F00
3rd Sample Input Select
#define | ADC_SSMUX2_MUX1_M 0x000000F0
2nd Sample Input Select
#define | ADC_SSMUX2_MUX0_M 0x0000000F
1st Sample Input Select
#define | ADC_SSOP2_S3DCOP 0x00001000
Sample 3 Digital Comparator.
#define | ADC_SSOP2_S2DCOP 0x00000100
Sample 2 Digital Comparator.
#define | ADC_SSOP2_S1DCOP 0x00000010
Sample 1 Digital Comparator.
#define | ADC_SSOP2_S0DCOP 0x00000001
Sample 0 Digital Comparator.
#define | ADC_SSDC2_S3DCSEL_M 0x0000F000
Sample 3 Digital Comparator.
#define | ADC_SSDC2_S2DCSEL_M 0x00000F00
Sample 2 Digital Comparator.
#define | ADC_SSDC2_S1DCSEL_M 0x000000F0
Sample 1 Digital Comparator.
#define | ADC_SSDC2_S0DCSEL_M 0x0000000F
Sample 0 Digital Comparator.
#define | ADC_SSMUX3_MUX0_M 0x0000000F
1st Sample Input Select
#define | ADC_SSOP3_S0DCOP 0x00000001
Sample 0 Digital Comparator.
#define | ADC_SSDC3_S0DCSEL_M 0x0000000F
Sample 0 Digital Comparator.
#define | ADC_DCRIC_DCTRIG7 0x00800000
Digital Comparator Trigger 7.
#define | ADC_DCRIC_DCTRIG6 0x00400000
Digital Comparator Trigger 6.
#define | ADC_DCRIC_DCTRIG5 0x00200000
Digital Comparator Trigger 5.
#define | ADC_DCRIC_DCTRIG4 0x00100000
Digital Comparator Trigger 4.
#define | ADC_DCRIC_DCTRIG3 0x00080000
Digital Comparator Trigger 3.
#define | ADC_DCRIC_DCTRIG2 0x00040000
Digital Comparator Trigger 2.
#define | ADC_DCRIC_DCTRIG1 0x00020000
Digital Comparator Trigger 1.
#define | ADC_DCRIC_DCTRIG0 0x00010000
Digital Comparator Trigger 0.
#define | ADC_DCRIC_DCINT7 0x00000080
Digital Comparator Interrupt 7.
#define | ADC_DCRIC_DCINT6 0x00000040
Digital Comparator Interrupt 6.
#define | ADC_DCRIC_DCINT5 0x00000020
Digital Comparator Interrupt 5.
#define | ADC_DCRIC_DCINT4 0x00000010
Digital Comparator Interrupt 4.
#define | ADC_DCRIC_DCINT3 0x00000008
Digital Comparator Interrupt 3.
#define | ADC_DCRIC_DCINT2 0x00000004
Digital Comparator Interrupt 2.
#define | ADC_DCRIC_DCINT1 0x00000002
Digital Comparator Interrupt 1.
#define | ADC_DCRIC_DCINT0 0x00000001
Digital Comparator Interrupt 0.
#define | ADC_DCCTL0_CTE 0x00001000
Comparison Trigger Enable.
#define | ADC_DCCTL0_CTC_M 0x00000C00
Comparison Trigger Condition.
#define | ADC_DCCTL0_CTC_LOW 0x00000000
Low Band.
#define | ADC_DCCTL0_CTC_MID 0x00000400
Mid Band.
#define | ADC_DCCTL0_CTC_HIGH 0x00000C00
High Band.
#define | ADC_DCCTL0_CTM_M 0x00000300
Comparison Trigger Mode.
#define | ADC_DCCTL0_CTM_ALWAYS 0x00000000
Always.
#define | ADC_DCCTL0_CTM_ONCE 0x00000100
Once.
#define | ADC_DCCTL0_CTM_HALWAYS 0x00000200
Hysteresis Always.
#define | ADC_DCCTL0_CTM_HONCE 0x00000300
Hysteresis Once.
#define | ADC_DCCTL0_CIE 0x00000010
Comparison Interrupt Enable.
#define | ADC_DCCTL0_CIC_M 0x0000000C
Comparison Interrupt Condition.
#define | ADC_DCCTL0_CIC_LOW 0x00000000
Low Band.
#define | ADC_DCCTL0_CIC_MID 0x00000004
Mid Band.
#define | ADC_DCCTL0_CIC_HIGH 0x0000000C
High Band.
#define | ADC_DCCTL0_CIM_M 0x00000003
Comparison Interrupt Mode.
#define | ADC_DCCTL0_CIM_ALWAYS 0x00000000
Always.
#define | ADC_DCCTL0_CIM_ONCE 0x00000001
Once.
#define | ADC_DCCTL0_CIM_HALWAYS 0x00000002
Hysteresis Always.
#define | ADC_DCCTL0_CIM_HONCE 0x00000003
Hysteresis Once.
#define | ADC_DCCTL1_CTE 0x00001000
Comparison Trigger Enable.
#define | ADC_DCCTL1_CTC_M 0x00000C00
Comparison Trigger Condition.
#define | ADC_DCCTL1_CTC_LOW 0x00000000
Low Band.
#define | ADC_DCCTL1_CTC_MID 0x00000400
Mid Band.
#define | ADC_DCCTL1_CTC_HIGH 0x00000C00
High Band.
#define | ADC_DCCTL1_CTM_M 0x00000300
Comparison Trigger Mode.
#define | ADC_DCCTL1_CTM_ALWAYS 0x00000000
Always.
#define | ADC_DCCTL1_CTM_ONCE 0x00000100
Once.
#define | ADC_DCCTL1_CTM_HALWAYS 0x00000200
Hysteresis Always.
#define | ADC_DCCTL1_CTM_HONCE 0x00000300
Hysteresis Once.
#define | ADC_DCCTL1_CIE 0x00000010
Comparison Interrupt Enable.
#define | ADC_DCCTL1_CIC_M 0x0000000C
Comparison Interrupt Condition.
#define | ADC_DCCTL1_CIC_LOW 0x00000000
Low Band.
#define | ADC_DCCTL1_CIC_MID 0x00000004
Mid Band.
#define | ADC_DCCTL1_CIC_HIGH 0x0000000C
High Band.
#define | ADC_DCCTL1_CIM_M 0x00000003
Comparison Interrupt Mode.
#define | ADC_DCCTL1_CIM_ALWAYS 0x00000000
Always.
#define | ADC_DCCTL1_CIM_ONCE 0x00000001
Once.
#define | ADC_DCCTL1_CIM_HALWAYS 0x00000002
Hysteresis Always.
#define | ADC_DCCTL1_CIM_HONCE 0x00000003
Hysteresis Once.
#define | ADC_DCCTL2_CTE 0x00001000
Comparison Trigger Enable.
#define | ADC_DCCTL2_CTC_M 0x00000C00
Comparison Trigger Condition.
#define | ADC_DCCTL2_CTC_LOW 0x00000000
Low Band.
#define | ADC_DCCTL2_CTC_MID 0x00000400
Mid Band.
#define | ADC_DCCTL2_CTC_HIGH 0x00000C00
High Band.
#define | ADC_DCCTL2_CTM_M 0x00000300
Comparison Trigger Mode.
#define | ADC_DCCTL2_CTM_ALWAYS 0x00000000
Always.
#define | ADC_DCCTL2_CTM_ONCE 0x00000100
Once.
#define | ADC_DCCTL2_CTM_HALWAYS 0x00000200
Hysteresis Always.
#define | ADC_DCCTL2_CTM_HONCE 0x00000300
Hysteresis Once.
#define | ADC_DCCTL2_CIE 0x00000010
Comparison Interrupt Enable.
#define | ADC_DCCTL2_CIC_M 0x0000000C
Comparison Interrupt Condition.
#define | ADC_DCCTL2_CIC_LOW 0x00000000
Low Band.
#define | ADC_DCCTL2_CIC_MID 0x00000004
Mid Band.
#define | ADC_DCCTL2_CIC_HIGH 0x0000000C
High Band.
#define | ADC_DCCTL2_CIM_M 0x00000003
Comparison Interrupt Mode.
#define | ADC_DCCTL2_CIM_ALWAYS 0x00000000
Always.
#define | ADC_DCCTL2_CIM_ONCE 0x00000001
Once.
#define | ADC_DCCTL2_CIM_HALWAYS 0x00000002
Hysteresis Always.
#define | ADC_DCCTL2_CIM_HONCE 0x00000003
Hysteresis Once.
#define | ADC_DCCTL3_CTE 0x00001000
Comparison Trigger Enable.
#define | ADC_DCCTL3_CTC_M 0x00000C00
Comparison Trigger Condition.
#define | ADC_DCCTL3_CTC_LOW 0x00000000
Low Band.
#define | ADC_DCCTL3_CTC_MID 0x00000400
Mid Band.
#define | ADC_DCCTL3_CTC_HIGH 0x00000C00
High Band.
#define | ADC_DCCTL3_CTM_M 0x00000300
Comparison Trigger Mode.
#define | ADC_DCCTL3_CTM_ALWAYS 0x00000000
Always.
#define | ADC_DCCTL3_CTM_ONCE 0x00000100
Once.
#define | ADC_DCCTL3_CTM_HALWAYS 0x00000200
Hysteresis Always.
#define | ADC_DCCTL3_CTM_HONCE 0x00000300
Hysteresis Once.
#define | ADC_DCCTL3_CIE 0x00000010
Comparison Interrupt Enable.
#define | ADC_DCCTL3_CIC_M 0x0000000C
Comparison Interrupt Condition.
#define | ADC_DCCTL3_CIC_LOW 0x00000000
Low Band.
#define | ADC_DCCTL3_CIC_MID 0x00000004
Mid Band.
#define | ADC_DCCTL3_CIC_HIGH 0x0000000C
High Band.
#define | ADC_DCCTL3_CIM_M 0x00000003
Comparison Interrupt Mode.
#define | ADC_DCCTL3_CIM_ALWAYS 0x00000000
Always.
#define | ADC_DCCTL3_CIM_ONCE 0x00000001
Once.
#define | ADC_DCCTL3_CIM_HALWAYS 0x00000002
Hysteresis Always.
#define | ADC_DCCTL3_CIM_HONCE 0x00000003
Hysteresis Once.
#define | ADC_DCCTL4_CTE 0x00001000
Comparison Trigger Enable.
#define | ADC_DCCTL4_CTC_M 0x00000C00
Comparison Trigger Condition.
#define | ADC_DCCTL4_CTC_LOW 0x00000000
Low Band.
#define | ADC_DCCTL4_CTC_MID 0x00000400
Mid Band.
#define | ADC_DCCTL4_CTC_HIGH 0x00000C00
High Band.
#define | ADC_DCCTL4_CTM_M 0x00000300
Comparison Trigger Mode.
#define | ADC_DCCTL4_CTM_ALWAYS 0x00000000
Always.
#define | ADC_DCCTL4_CTM_ONCE 0x00000100
Once.
#define | ADC_DCCTL4_CTM_HALWAYS 0x00000200
Hysteresis Always.
#define | ADC_DCCTL4_CTM_HONCE 0x00000300
Hysteresis Once.
#define | ADC_DCCTL4_CIE 0x00000010
Comparison Interrupt Enable.
#define | ADC_DCCTL4_CIC_M 0x0000000C
Comparison Interrupt Condition.
#define | ADC_DCCTL4_CIC_LOW 0x00000000
Low Band.
#define | ADC_DCCTL4_CIC_MID 0x00000004
Mid Band.
#define | ADC_DCCTL4_CIC_HIGH 0x0000000C
High Band.
#define | ADC_DCCTL4_CIM_M 0x00000003
Comparison Interrupt Mode.
#define | ADC_DCCTL4_CIM_ALWAYS 0x00000000
Always.
#define | ADC_DCCTL4_CIM_ONCE 0x00000001
Once.
#define | ADC_DCCTL4_CIM_HALWAYS 0x00000002
Hysteresis Always.
#define | ADC_DCCTL4_CIM_HONCE 0x00000003
Hysteresis Once.
#define | ADC_DCCTL5_CTE 0x00001000
Comparison Trigger Enable.
#define | ADC_DCCTL5_CTC_M 0x00000C00
Comparison Trigger Condition.
#define | ADC_DCCTL5_CTC_LOW 0x00000000
Low Band.
#define | ADC_DCCTL5_CTC_MID 0x00000400
Mid Band.
#define | ADC_DCCTL5_CTC_HIGH 0x00000C00
High Band.
#define | ADC_DCCTL5_CTM_M 0x00000300
Comparison Trigger Mode.
#define | ADC_DCCTL5_CTM_ALWAYS 0x00000000
Always.
#define | ADC_DCCTL5_CTM_ONCE 0x00000100
Once.
#define | ADC_DCCTL5_CTM_HALWAYS 0x00000200
Hysteresis Always.
#define | ADC_DCCTL5_CTM_HONCE 0x00000300
Hysteresis Once.
#define | ADC_DCCTL5_CIE 0x00000010
Comparison Interrupt Enable.
#define | ADC_DCCTL5_CIC_M 0x0000000C
Comparison Interrupt Condition.
#define | ADC_DCCTL5_CIC_LOW 0x00000000
Low Band.
#define | ADC_DCCTL5_CIC_MID 0x00000004
Mid Band.
#define | ADC_DCCTL5_CIC_HIGH 0x0000000C
High Band.
#define | ADC_DCCTL5_CIM_M 0x00000003
Comparison Interrupt Mode.
#define | ADC_DCCTL5_CIM_ALWAYS 0x00000000
Always.
#define | ADC_DCCTL5_CIM_ONCE 0x00000001
Once.
#define | ADC_DCCTL5_CIM_HALWAYS 0x00000002
Hysteresis Always.
#define | ADC_DCCTL5_CIM_HONCE 0x00000003
Hysteresis Once.
#define | ADC_DCCTL6_CTE 0x00001000
Comparison Trigger Enable.
#define | ADC_DCCTL6_CTC_M 0x00000C00
Comparison Trigger Condition.
#define | ADC_DCCTL6_CTC_LOW 0x00000000
Low Band.
#define | ADC_DCCTL6_CTC_MID 0x00000400
Mid Band.
#define | ADC_DCCTL6_CTC_HIGH 0x00000C00
High Band.
#define | ADC_DCCTL6_CTM_M 0x00000300
Comparison Trigger Mode.
#define | ADC_DCCTL6_CTM_ALWAYS 0x00000000
Always.
#define | ADC_DCCTL6_CTM_ONCE 0x00000100
Once.
#define | ADC_DCCTL6_CTM_HALWAYS 0x00000200
Hysteresis Always.
#define | ADC_DCCTL6_CTM_HONCE 0x00000300
Hysteresis Once.
#define | ADC_DCCTL6_CIE 0x00000010
Comparison Interrupt Enable.
#define | ADC_DCCTL6_CIC_M 0x0000000C
Comparison Interrupt Condition.
#define | ADC_DCCTL6_CIC_LOW 0x00000000
Low Band.
#define | ADC_DCCTL6_CIC_MID 0x00000004
Mid Band.
#define | ADC_DCCTL6_CIC_HIGH 0x0000000C
High Band.
#define | ADC_DCCTL6_CIM_M 0x00000003
Comparison Interrupt Mode.
#define | ADC_DCCTL6_CIM_ALWAYS 0x00000000
Always.
#define | ADC_DCCTL6_CIM_ONCE 0x00000001
Once.
#define | ADC_DCCTL6_CIM_HALWAYS 0x00000002
Hysteresis Always.
#define | ADC_DCCTL6_CIM_HONCE 0x00000003
Hysteresis Once.
#define | ADC_DCCTL7_CTE 0x00001000
Comparison Trigger Enable.
#define | ADC_DCCTL7_CTC_M 0x00000C00
Comparison Trigger Condition.
#define | ADC_DCCTL7_CTC_LOW 0x00000000
Low Band.
#define | ADC_DCCTL7_CTC_MID 0x00000400
Mid Band.
#define | ADC_DCCTL7_CTC_HIGH 0x00000C00
High Band.
#define | ADC_DCCTL7_CTM_M 0x00000300
Comparison Trigger Mode.
#define | ADC_DCCTL7_CTM_ALWAYS 0x00000000
Always.
#define | ADC_DCCTL7_CTM_ONCE 0x00000100
Once.
#define | ADC_DCCTL7_CTM_HALWAYS 0x00000200
Hysteresis Always.
#define | ADC_DCCTL7_CTM_HONCE 0x00000300
Hysteresis Once.
#define | ADC_DCCTL7_CIE 0x00000010
Comparison Interrupt Enable.
#define | ADC_DCCTL7_CIC_M 0x0000000C
Comparison Interrupt Condition.
#define | ADC_DCCTL7_CIC_LOW 0x00000000
Low Band.
#define | ADC_DCCTL7_CIC_MID 0x00000004
Mid Band.
#define | ADC_DCCTL7_CIC_HIGH 0x0000000C
High Band.
#define | ADC_DCCTL7_CIM_M 0x00000003
Comparison Interrupt Mode.
#define | ADC_DCCTL7_CIM_ALWAYS 0x00000000
Always.
#define | ADC_DCCTL7_CIM_ONCE 0x00000001
Once.
#define | ADC_DCCTL7_CIM_HALWAYS 0x00000002
Hysteresis Always.
#define | ADC_DCCTL7_CIM_HONCE 0x00000003
Hysteresis Once.
#define | ADC_DCCMP0_COMP1_M 0x03FF0000
Compare 1.
#define | ADC_DCCMP0_COMP0_M 0x000003FF
Compare 0.
#define | ADC_DCCMP1_COMP1_M 0x03FF0000
Compare 1.
#define | ADC_DCCMP1_COMP0_M 0x000003FF
Compare 0.
#define | ADC_DCCMP2_COMP1_M 0x03FF0000
Compare 1.
#define | ADC_DCCMP2_COMP0_M 0x000003FF
Compare 0.
#define | ADC_DCCMP3_COMP1_M 0x03FF0000
Compare 1.
#define | ADC_DCCMP3_COMP0_M 0x000003FF
Compare 0.
#define | ADC_DCCMP4_COMP1_M 0x03FF0000
Compare 1.
#define | ADC_DCCMP4_COMP0_M 0x000003FF
Compare 0.
#define | ADC_DCCMP5_COMP1_M 0x03FF0000
Compare 1.
#define | ADC_DCCMP5_COMP0_M 0x000003FF
Compare 0.
#define | ADC_DCCMP6_COMP1_M 0x03FF0000
Compare 1.
#define | ADC_DCCMP6_COMP0_M 0x000003FF
Compare 0.
#define | ADC_DCCMP7_COMP1_M 0x03FF0000
Compare 1.
#define | ADC_DCCMP7_COMP0_M 0x000003FF
Compare 0.
#define | ADC_ACTSS_ASEN3 0x00000008
ADC SS3 Enable.
#define | ADC_ACTSS_ASEN2 0x00000004
ADC SS2 Enable.
#define | ADC_ACTSS_ASEN1 0x00000002
ADC SS1 Enable.
#define | ADC_ACTSS_ASEN0 0x00000001
ADC SS0 Enable.
#define | ADC_ACTSS_ASEN3 0x00000008
ADC SS3 Enable.
#define | ADC_ACTSS_ASEN2 0x00000004
ADC SS2 Enable.
#define | ADC_ACTSS_ASEN1 0x00000002
ADC SS1 Enable.
#define | ADC_ACTSS_ASEN0 0x00000001
ADC SS0 Enable.
#define | ADC_RIS_INR3 0x00000008
SS3 Raw Interrupt Status.
#define | ADC_RIS_INR2 0x00000004
SS2 Raw Interrupt Status.
#define | ADC_RIS_INR1 0x00000002
SS1 Raw Interrupt Status.
#define | ADC_RIS_INR0 0x00000001
SS0 Raw Interrupt Status.
#define | ADC_RIS_INR3 0x00000008
SS3 Raw Interrupt Status.
#define | ADC_RIS_INR2 0x00000004
SS2 Raw Interrupt Status.
#define | ADC_RIS_INR1 0x00000002
SS1 Raw Interrupt Status.
#define | ADC_RIS_INR0 0x00000001
SS0 Raw Interrupt Status.
#define | ADC_IM_MASK3 0x00000008
SS3 Interrupt Mask.
#define | ADC_IM_MASK2 0x00000004
SS2 Interrupt Mask.
#define | ADC_IM_MASK1 0x00000002
SS1 Interrupt Mask.
#define | ADC_IM_MASK0 0x00000001
SS0 Interrupt Mask.
#define | ADC_IM_MASK3 0x00000008
SS3 Interrupt Mask.
#define | ADC_IM_MASK2 0x00000004
SS2 Interrupt Mask.
#define | ADC_IM_MASK1 0x00000002
SS1 Interrupt Mask.
#define | ADC_IM_MASK0 0x00000001
SS0 Interrupt Mask.
#define | ADC_ISC_IN3 0x00000008
SS3 Interrupt Status and Clear.
#define | ADC_ISC_IN2 0x00000004
SS2 Interrupt Status and Clear.
#define | ADC_ISC_IN1 0x00000002
SS1 Interrupt Status and Clear.
#define | ADC_ISC_IN0 0x00000001
SS0 Interrupt Status and Clear.
#define | ADC_ISC_IN3 0x00000008
SS3 Interrupt Status and Clear.
#define | ADC_ISC_IN2 0x00000004
SS2 Interrupt Status and Clear.
#define | ADC_ISC_IN1 0x00000002
SS1 Interrupt Status and Clear.
#define | ADC_ISC_IN0 0x00000001
SS0 Interrupt Status and Clear.
#define | ADC_OSTAT_OV3 0x00000008
SS3 FIFO Overflow.
#define | ADC_OSTAT_OV2 0x00000004
SS2 FIFO Overflow.
#define | ADC_OSTAT_OV1 0x00000002
SS1 FIFO Overflow.
#define | ADC_OSTAT_OV0 0x00000001
SS0 FIFO Overflow.
#define | ADC_OSTAT_OV3 0x00000008
SS3 FIFO Overflow.
#define | ADC_OSTAT_OV2 0x00000004
SS2 FIFO Overflow.
#define | ADC_OSTAT_OV1 0x00000002
SS1 FIFO Overflow.
#define | ADC_OSTAT_OV0 0x00000001
SS0 FIFO Overflow.
#define | ADC_EMUX_EM3_M 0x0000F000
SS3 Trigger Select.
#define | ADC_EMUX_EM3_PROCESSOR 0x00000000
Processor (default)
#define | ADC_EMUX_EM3_COMP0 0x00001000
Analog Comparator 0.
#define | ADC_EMUX_EM3_COMP1 0x00002000
Analog Comparator 1.
#define | ADC_EMUX_EM3_COMP2 0x00003000
Analog Comparator 2.
#define | ADC_EMUX_EM3_EXTERNAL 0x00004000
External (GPIO PB4)
#define | ADC_EMUX_EM3_TIMER 0x00005000
Timer.
#define | ADC_EMUX_EM3_PWM0 0x00006000
PWM0.
#define | ADC_EMUX_EM3_PWM1 0x00007000
PWM1.
#define | ADC_EMUX_EM3_PWM2 0x00008000
PWM2.
#define | ADC_EMUX_EM3_ALWAYS 0x0000F000
Always (continuously sample)
#define | ADC_EMUX_EM2_M 0x00000F00
SS2 Trigger Select.
#define | ADC_EMUX_EM2_PROCESSOR 0x00000000
Processor (default)
#define | ADC_EMUX_EM2_COMP0 0x00000100
Analog Comparator 0.
#define | ADC_EMUX_EM2_COMP1 0x00000200
Analog Comparator 1.
#define | ADC_EMUX_EM2_COMP2 0x00000300
Analog Comparator 2.
#define | ADC_EMUX_EM2_EXTERNAL 0x00000400
External (GPIO PB4)
#define | ADC_EMUX_EM2_TIMER 0x00000500
Timer.
#define | ADC_EMUX_EM2_PWM0 0x00000600
PWM0.
#define | ADC_EMUX_EM2_PWM1 0x00000700
PWM1.
#define | ADC_EMUX_EM2_PWM2 0x00000800
PWM2.
#define | ADC_EMUX_EM2_ALWAYS 0x00000F00
Always (continuously sample)
#define | ADC_EMUX_EM1_M 0x000000F0
SS1 Trigger Select.
#define | ADC_EMUX_EM1_PROCESSOR 0x00000000
Processor (default)
#define | ADC_EMUX_EM1_COMP0 0x00000010
Analog Comparator 0.
#define | ADC_EMUX_EM1_COMP1 0x00000020
Analog Comparator 1.
#define | ADC_EMUX_EM1_COMP2 0x00000030
Analog Comparator 2.
#define | ADC_EMUX_EM1_EXTERNAL 0x00000040
External (GPIO PB4)
#define | ADC_EMUX_EM1_TIMER 0x00000050
Timer.
#define | ADC_EMUX_EM1_PWM0 0x00000060
PWM0.
#define | ADC_EMUX_EM1_PWM1 0x00000070
PWM1.
#define | ADC_EMUX_EM1_PWM2 0x00000080
PWM2.
#define | ADC_EMUX_EM1_ALWAYS 0x000000F0
Always (continuously sample)
#define | ADC_EMUX_EM0_M 0x0000000F
SS0 Trigger Select.
#define | ADC_EMUX_EM0_PROCESSOR 0x00000000
Processor (default)
#define | ADC_EMUX_EM0_COMP0 0x00000001
Analog Comparator 0.
#define | ADC_EMUX_EM0_COMP1 0x00000002
Analog Comparator 1.
#define | ADC_EMUX_EM0_COMP2 0x00000003
Analog Comparator 2.
#define | ADC_EMUX_EM0_EXTERNAL 0x00000004
External (GPIO PB4)
#define | ADC_EMUX_EM0_TIMER 0x00000005
Timer.
#define | ADC_EMUX_EM0_PWM0 0x00000006
PWM0.
#define | ADC_EMUX_EM0_PWM1 0x00000007
PWM1.
#define | ADC_EMUX_EM0_PWM2 0x00000008
PWM2.
#define | ADC_EMUX_EM0_ALWAYS 0x0000000F
Always (continuously sample)
#define | ADC_EMUX_EM3_M 0x0000F000
SS3 Trigger Select.
#define | ADC_EMUX_EM3_PROCESSOR 0x00000000
Processor (default)
#define | ADC_EMUX_EM3_COMP0 0x00001000
Analog Comparator 0.
#define | ADC_EMUX_EM3_COMP1 0x00002000
Analog Comparator 1.
#define | ADC_EMUX_EM3_COMP2 0x00003000
Analog Comparator 2.
#define | ADC_EMUX_EM3_EXTERNAL 0x00004000
External (GPIO PB4)
#define | ADC_EMUX_EM3_TIMER 0x00005000
Timer.
#define | ADC_EMUX_EM3_PWM0 0x00006000
PWM0.
#define | ADC_EMUX_EM3_PWM1 0x00007000
PWM1.
#define | ADC_EMUX_EM3_PWM2 0x00008000
PWM2.
#define | ADC_EMUX_EM3_ALWAYS 0x0000F000
Always (continuously sample)
#define | ADC_EMUX_EM2_M 0x00000F00
SS2 Trigger Select.
#define | ADC_EMUX_EM2_PROCESSOR 0x00000000
Processor (default)
#define | ADC_EMUX_EM2_COMP0 0x00000100
Analog Comparator 0.
#define | ADC_EMUX_EM2_COMP1 0x00000200
Analog Comparator 1.
#define | ADC_EMUX_EM2_COMP2 0x00000300
Analog Comparator 2.
#define | ADC_EMUX_EM2_EXTERNAL 0x00000400
External (GPIO PB4)
#define | ADC_EMUX_EM2_TIMER 0x00000500
Timer.
#define | ADC_EMUX_EM2_PWM0 0x00000600
PWM0.
#define | ADC_EMUX_EM2_PWM1 0x00000700
PWM1.
#define | ADC_EMUX_EM2_PWM2 0x00000800
PWM2.
#define | ADC_EMUX_EM2_ALWAYS 0x00000F00
Always (continuously sample)
#define | ADC_EMUX_EM1_M 0x000000F0
SS1 Trigger Select.
#define | ADC_EMUX_EM1_PROCESSOR 0x00000000
Processor (default)
#define | ADC_EMUX_EM1_COMP0 0x00000010
Analog Comparator 0.
#define | ADC_EMUX_EM1_COMP1 0x00000020
Analog Comparator 1.
#define | ADC_EMUX_EM1_COMP2 0x00000030
Analog Comparator 2.
#define | ADC_EMUX_EM1_EXTERNAL 0x00000040
External (GPIO PB4)
#define | ADC_EMUX_EM1_TIMER 0x00000050
Timer.
#define | ADC_EMUX_EM1_PWM0 0x00000060
PWM0.
#define | ADC_EMUX_EM1_PWM1 0x00000070
PWM1.
#define | ADC_EMUX_EM1_PWM2 0x00000080
PWM2.
#define | ADC_EMUX_EM1_ALWAYS 0x000000F0
Always (continuously sample)
#define | ADC_EMUX_EM0_M 0x0000000F
SS0 Trigger Select.
#define | ADC_EMUX_EM0_PROCESSOR 0x00000000
Processor (default)
#define | ADC_EMUX_EM0_COMP0 0x00000001
Analog Comparator 0.
#define | ADC_EMUX_EM0_COMP1 0x00000002
Analog Comparator 1.
#define | ADC_EMUX_EM0_COMP2 0x00000003
Analog Comparator 2.
#define | ADC_EMUX_EM0_EXTERNAL 0x00000004
External (GPIO PB4)
#define | ADC_EMUX_EM0_TIMER 0x00000005
Timer.
#define | ADC_EMUX_EM0_PWM0 0x00000006
PWM0.
#define | ADC_EMUX_EM0_PWM1 0x00000007
PWM1.
#define | ADC_EMUX_EM0_PWM2 0x00000008
PWM2.
#define | ADC_EMUX_EM0_ALWAYS 0x0000000F
Always (continuously sample)
#define | ADC_USTAT_UV3 0x00000008
SS3 FIFO Underflow.
#define | ADC_USTAT_UV2 0x00000004
SS2 FIFO Underflow.
#define | ADC_USTAT_UV1 0x00000002
SS1 FIFO Underflow.
#define | ADC_USTAT_UV0 0x00000001
SS0 FIFO Underflow.
#define | ADC_USTAT_UV3 0x00000008
SS3 FIFO Underflow.
#define | ADC_USTAT_UV2 0x00000004
SS2 FIFO Underflow.
#define | ADC_USTAT_UV1 0x00000002
SS1 FIFO Underflow.
#define | ADC_USTAT_UV0 0x00000001
SS0 FIFO Underflow.
#define | ADC_SSPRI_SS3_M 0x00003000
SS3 Priority.
#define | ADC_SSPRI_SS3_1ST 0x00000000
First priority.
#define | ADC_SSPRI_SS3_2ND 0x00001000
Second priority.
#define | ADC_SSPRI_SS3_3RD 0x00002000
Third priority.
#define | ADC_SSPRI_SS3_4TH 0x00003000
Fourth priority.
#define | ADC_SSPRI_SS2_M 0x00000300
SS2 Priority.
#define | ADC_SSPRI_SS2_1ST 0x00000000
First priority.
#define | ADC_SSPRI_SS2_2ND 0x00000100
Second priority.
#define | ADC_SSPRI_SS2_3RD 0x00000200
Third priority.
#define | ADC_SSPRI_SS2_4TH 0x00000300
Fourth priority.
#define | ADC_SSPRI_SS1_M 0x00000030
SS1 Priority.
#define | ADC_SSPRI_SS1_1ST 0x00000000
First priority.
#define | ADC_SSPRI_SS1_2ND 0x00000010
Second priority.
#define | ADC_SSPRI_SS1_3RD 0x00000020
Third priority.
#define | ADC_SSPRI_SS1_4TH 0x00000030
Fourth priority.
#define | ADC_SSPRI_SS0_M 0x00000003
SS0 Priority.
#define | ADC_SSPRI_SS0_1ST 0x00000000
First priority.
#define | ADC_SSPRI_SS0_2ND 0x00000001
Second priority.
#define | ADC_SSPRI_SS0_3RD 0x00000002
Third priority.
#define | ADC_SSPRI_SS0_4TH 0x00000003
Fourth priority.
#define | ADC_SSPRI_SS3_M 0x00003000
SS3 Priority.
#define | ADC_SSPRI_SS3_1ST 0x00000000
First priority.
#define | ADC_SSPRI_SS3_2ND 0x00001000
Second priority.
#define | ADC_SSPRI_SS3_3RD 0x00002000
Third priority.
#define | ADC_SSPRI_SS3_4TH 0x00003000
Fourth priority.
#define | ADC_SSPRI_SS2_M 0x00000300
SS2 Priority.
#define | ADC_SSPRI_SS2_1ST 0x00000000
First priority.
#define | ADC_SSPRI_SS2_2ND 0x00000100
Second priority.
#define | ADC_SSPRI_SS2_3RD 0x00000200
Third priority.
#define | ADC_SSPRI_SS2_4TH 0x00000300
Fourth priority.
#define | ADC_SSPRI_SS1_M 0x00000030
SS1 Priority.
#define | ADC_SSPRI_SS1_1ST 0x00000000
First priority.
#define | ADC_SSPRI_SS1_2ND 0x00000010
Second priority.
#define | ADC_SSPRI_SS1_3RD 0x00000020
Third priority.
#define | ADC_SSPRI_SS1_4TH 0x00000030
Fourth priority.
#define | ADC_SSPRI_SS0_M 0x00000003
SS0 Priority.
#define | ADC_SSPRI_SS0_1ST 0x00000000
First priority.
#define | ADC_SSPRI_SS0_2ND 0x00000001
Second priority.
#define | ADC_SSPRI_SS0_3RD 0x00000002
Third priority.
#define | ADC_SSPRI_SS0_4TH 0x00000003
Fourth priority.
#define | ADC_PSSI_SS3 0x00000008
SS3 Initiate.
#define | ADC_PSSI_SS2 0x00000004
SS2 Initiate.
#define | ADC_PSSI_SS1 0x00000002
SS1 Initiate.
#define | ADC_PSSI_SS0 0x00000001
SS0 Initiate.
#define | ADC_PSSI_SS3 0x00000008
SS3 Initiate.
#define | ADC_PSSI_SS2 0x00000004
SS2 Initiate.
#define | ADC_PSSI_SS1 0x00000002
SS1 Initiate.
#define | ADC_PSSI_SS0 0x00000001
SS0 Initiate.
#define | ADC_SAC_AVG_M 0x00000007
Hardware Averaging Control.
#define | ADC_SAC_AVG_OFF 0x00000000
No hardware oversampling.
#define | ADC_SAC_AVG_2X 0x00000001
2x hardware oversampling
#define | ADC_SAC_AVG_4X 0x00000002
4x hardware oversampling
#define | ADC_SAC_AVG_8X 0x00000003
8x hardware oversampling
#define | ADC_SAC_AVG_16X 0x00000004
16x hardware oversampling
#define | ADC_SAC_AVG_32X 0x00000005
32x hardware oversampling
#define | ADC_SAC_AVG_64X 0x00000006
64x hardware oversampling
#define | ADC_SAC_AVG_M 0x00000007
Hardware Averaging Control.
#define | ADC_SAC_AVG_OFF 0x00000000
No hardware oversampling.
#define | ADC_SAC_AVG_2X 0x00000001
2x hardware oversampling
#define | ADC_SAC_AVG_4X 0x00000002
4x hardware oversampling
#define | ADC_SAC_AVG_8X 0x00000003
8x hardware oversampling
#define | ADC_SAC_AVG_16X 0x00000004
16x hardware oversampling
#define | ADC_SAC_AVG_32X 0x00000005
32x hardware oversampling
#define | ADC_SAC_AVG_64X 0x00000006
64x hardware oversampling
#define | ADC_SSMUX0_MUX7_M 0x70000000
The following are defines for the bit fields in the ADC_O_SSMUX0 register.
#define | ADC_SSMUX0_MUX6_M 0x07000000
7th Sample Input Select
#define | ADC_SSMUX0_MUX5_M 0x00700000
6th Sample Input Select
#define | ADC_SSMUX0_MUX4_M 0x00070000
5th Sample Input Select
#define | ADC_SSMUX0_MUX3_M 0x00007000
4th Sample Input Select
#define | ADC_SSMUX0_MUX2_M 0x00000700
3rd Sample Input Select
#define | ADC_SSMUX0_MUX1_M 0x00000070
2nd Sample Input Select
#define | ADC_SSMUX0_MUX0_M 0x00000007
1st Sample Input Select
#define | ADC_SSMUX0_MUX7_S 28
The following are defines for the bit fields in the ADC_O_SSMUX0 register.
#define | ADC_SSMUX0_MUX6_S 24
The following are defines for the bit fields in the ADC_O_SSMUX0 register.
#define | ADC_SSMUX0_MUX5_S 20
The following are defines for the bit fields in the ADC_O_SSMUX0 register.
#define | ADC_SSMUX0_MUX4_S 16
The following are defines for the bit fields in the ADC_O_SSMUX0 register.
#define | ADC_SSMUX0_MUX3_S 12
The following are defines for the bit fields in the ADC_O_SSMUX0 register.
#define | ADC_SSMUX0_MUX2_S 8
The following are defines for the bit fields in the ADC_O_SSMUX0 register.
#define | ADC_SSMUX0_MUX1_S 4
The following are defines for the bit fields in the ADC_O_SSMUX0 register.
#define | ADC_SSMUX0_MUX0_S 0
The following are defines for the bit fields in the ADC_O_SSMUX0 register.
#define | ADC_SSMUX0_MUX7_S 28
The following are defines for the bit fields in the ADC_O_SSMUX0 register.
#define | ADC_SSMUX0_MUX6_S 24
The following are defines for the bit fields in the ADC_O_SSMUX0 register.
#define | ADC_SSMUX0_MUX5_S 20
The following are defines for the bit fields in the ADC_O_SSMUX0 register.
#define | ADC_SSMUX0_MUX4_S 16
The following are defines for the bit fields in the ADC_O_SSMUX0 register.
#define | ADC_SSMUX0_MUX3_S 12
The following are defines for the bit fields in the ADC_O_SSMUX0 register.
#define | ADC_SSMUX0_MUX2_S 8
The following are defines for the bit fields in the ADC_O_SSMUX0 register.
#define | ADC_SSMUX0_MUX1_S 4
The following are defines for the bit fields in the ADC_O_SSMUX0 register.
#define | ADC_SSMUX0_MUX0_S 0
The following are defines for the bit fields in the ADC_O_SSMUX0 register.
#define | ADC_SSCTL0_TS7 0x80000000
The following are defines for the bit fields in the ADC_O_SSCTL0 register.
#define | ADC_SSCTL0_IE7 0x40000000
8th Sample Interrupt Enable
#define | ADC_SSCTL0_END7 0x20000000
8th Sample is End of Sequence
#define | ADC_SSCTL0_D7 0x10000000
8th Sample Diff Input Select
#define | ADC_SSCTL0_TS6 0x08000000
7th Sample Temp Sensor Select
#define | ADC_SSCTL0_IE6 0x04000000
7th Sample Interrupt Enable
#define | ADC_SSCTL0_END6 0x02000000
7th Sample is End of Sequence
#define | ADC_SSCTL0_D6 0x01000000
7th Sample Diff Input Select
#define | ADC_SSCTL0_TS5 0x00800000
6th Sample Temp Sensor Select
#define | ADC_SSCTL0_IE5 0x00400000
6th Sample Interrupt Enable
#define | ADC_SSCTL0_END5 0x00200000
6th Sample is End of Sequence
#define | ADC_SSCTL0_D5 0x00100000
6th Sample Diff Input Select
#define | ADC_SSCTL0_TS4 0x00080000
5th Sample Temp Sensor Select
#define | ADC_SSCTL0_IE4 0x00040000
5th Sample Interrupt Enable
#define | ADC_SSCTL0_END4 0x00020000
5th Sample is End of Sequence
#define | ADC_SSCTL0_D4 0x00010000
5th Sample Diff Input Select
#define | ADC_SSCTL0_TS3 0x00008000
4th Sample Temp Sensor Select
#define | ADC_SSCTL0_IE3 0x00004000
4th Sample Interrupt Enable
#define | ADC_SSCTL0_END3 0x00002000
4th Sample is End of Sequence
#define | ADC_SSCTL0_D3 0x00001000
4th Sample Diff Input Select
#define | ADC_SSCTL0_TS2 0x00000800
3rd Sample Temp Sensor Select
#define | ADC_SSCTL0_IE2 0x00000400
3rd Sample Interrupt Enable
#define | ADC_SSCTL0_END2 0x00000200
3rd Sample is End of Sequence
#define | ADC_SSCTL0_D2 0x00000100
3rd Sample Diff Input Select
#define | ADC_SSCTL0_TS1 0x00000080
2nd Sample Temp Sensor Select
#define | ADC_SSCTL0_IE1 0x00000040
2nd Sample Interrupt Enable
#define | ADC_SSCTL0_END1 0x00000020
2nd Sample is End of Sequence
#define | ADC_SSCTL0_D1 0x00000010
2nd Sample Diff Input Select
#define | ADC_SSCTL0_TS0 0x00000008
1st Sample Temp Sensor Select
#define | ADC_SSCTL0_IE0 0x00000004
1st Sample Interrupt Enable
#define | ADC_SSCTL0_END0 0x00000002
1st Sample is End of Sequence
#define | ADC_SSCTL0_D0 0x00000001
1st Sample Diff Input Select
#define | ADC_SSCTL0_TS7 0x80000000
The following are defines for the bit fields in the ADC_O_SSCTL0 register.
#define | ADC_SSCTL0_IE7 0x40000000
8th Sample Interrupt Enable
#define | ADC_SSCTL0_END7 0x20000000
8th Sample is End of Sequence
#define | ADC_SSCTL0_D7 0x10000000
8th Sample Diff Input Select
#define | ADC_SSCTL0_TS6 0x08000000
7th Sample Temp Sensor Select
#define | ADC_SSCTL0_IE6 0x04000000
7th Sample Interrupt Enable
#define | ADC_SSCTL0_END6 0x02000000
7th Sample is End of Sequence
#define | ADC_SSCTL0_D6 0x01000000
7th Sample Diff Input Select
#define | ADC_SSCTL0_TS5 0x00800000
6th Sample Temp Sensor Select
#define | ADC_SSCTL0_IE5 0x00400000
6th Sample Interrupt Enable
#define | ADC_SSCTL0_END5 0x00200000
6th Sample is End of Sequence
#define | ADC_SSCTL0_D5 0x00100000
6th Sample Diff Input Select
#define | ADC_SSCTL0_TS4 0x00080000
5th Sample Temp Sensor Select
#define | ADC_SSCTL0_IE4 0x00040000
5th Sample Interrupt Enable
#define | ADC_SSCTL0_END4 0x00020000
5th Sample is End of Sequence
#define | ADC_SSCTL0_D4 0x00010000
5th Sample Diff Input Select
#define | ADC_SSCTL0_TS3 0x00008000
4th Sample Temp Sensor Select
#define | ADC_SSCTL0_IE3 0x00004000
4th Sample Interrupt Enable
#define | ADC_SSCTL0_END3 0x00002000
4th Sample is End of Sequence
#define | ADC_SSCTL0_D3 0x00001000
4th Sample Diff Input Select
#define | ADC_SSCTL0_TS2 0x00000800
3rd Sample Temp Sensor Select
#define | ADC_SSCTL0_IE2 0x00000400
3rd Sample Interrupt Enable
#define | ADC_SSCTL0_END2 0x00000200
3rd Sample is End of Sequence
#define | ADC_SSCTL0_D2 0x00000100
3rd Sample Diff Input Select
#define | ADC_SSCTL0_TS1 0x00000080
2nd Sample Temp Sensor Select
#define | ADC_SSCTL0_IE1 0x00000040
2nd Sample Interrupt Enable
#define | ADC_SSCTL0_END1 0x00000020
2nd Sample is End of Sequence
#define | ADC_SSCTL0_D1 0x00000010
2nd Sample Diff Input Select
#define | ADC_SSCTL0_TS0 0x00000008
1st Sample Temp Sensor Select
#define | ADC_SSCTL0_IE0 0x00000004
1st Sample Interrupt Enable
#define | ADC_SSCTL0_END0 0x00000002
1st Sample is End of Sequence
#define | ADC_SSCTL0_D0 0x00000001
1st Sample Diff Input Select
#define | ADC_SSFIFO0_DATA_M 0x000003FF
The following are defines for the bit fields in the ADC_O_SSFIFO0 register.
#define | ADC_SSFIFO0_DATA_S 0
The following are defines for the bit fields in the ADC_O_SSFIFO0 register.
#define | ADC_SSFIFO0_DATA_M 0x000003FF
The following are defines for the bit fields in the ADC_O_SSFIFO0 register.
#define | ADC_SSFIFO0_DATA_S 0
The following are defines for the bit fields in the ADC_O_SSFIFO0 register.
#define | ADC_SSFSTAT0_FULL 0x00001000
The following are defines for the bit fields in the ADC_O_SSFSTAT0 register.
#define | ADC_SSFSTAT0_EMPTY 0x00000100
FIFO Empty.
#define | ADC_SSFSTAT0_HPTR_M 0x000000F0
FIFO Head Pointer.
#define | ADC_SSFSTAT0_TPTR_M 0x0000000F
FIFO Tail Pointer.
#define | ADC_SSFSTAT0_HPTR_S 4
The following are defines for the bit fields in the ADC_O_SSFSTAT0 register.
#define | ADC_SSFSTAT0_TPTR_S 0
The following are defines for the bit fields in the ADC_O_SSFSTAT0 register.
#define | ADC_SSFSTAT0_FULL 0x00001000
The following are defines for the bit fields in the ADC_O_SSFSTAT0 register.
#define | ADC_SSFSTAT0_EMPTY 0x00000100
FIFO Empty.
#define | ADC_SSFSTAT0_HPTR_M 0x000000F0
FIFO Head Pointer.
#define | ADC_SSFSTAT0_TPTR_M 0x0000000F
FIFO Tail Pointer.
#define | ADC_SSFSTAT0_HPTR_S 4
The following are defines for the bit fields in the ADC_O_SSFSTAT0 register.
#define | ADC_SSFSTAT0_TPTR_S 0
The following are defines for the bit fields in the ADC_O_SSFSTAT0 register.
#define | ADC_SSMUX1_MUX3_M 0x00007000
The following are defines for the bit fields in the ADC_O_SSMUX1 register.
#define | ADC_SSMUX1_MUX2_M 0x00000700
3rd Sample Input Select
#define | ADC_SSMUX1_MUX1_M 0x00000070
2nd Sample Input Select
#define | ADC_SSMUX1_MUX0_M 0x00000007
1st Sample Input Select
#define | ADC_SSMUX1_MUX3_S 12
The following are defines for the bit fields in the ADC_O_SSMUX1 register.
#define | ADC_SSMUX1_MUX2_S 8
The following are defines for the bit fields in the ADC_O_SSMUX1 register.
#define | ADC_SSMUX1_MUX1_S 4
The following are defines for the bit fields in the ADC_O_SSMUX1 register.
#define | ADC_SSMUX1_MUX0_S 0
The following are defines for the bit fields in the ADC_O_SSMUX1 register.
#define | ADC_SSCTL1_TS3 0x00008000
The following are defines for the bit fields in the ADC_O_SSCTL1 register.
#define | ADC_SSCTL1_IE3 0x00004000
4th Sample Interrupt Enable
#define | ADC_SSCTL1_END3 0x00002000
4th Sample is End of Sequence
#define | ADC_SSCTL1_D3 0x00001000
4th Sample Diff Input Select
#define | ADC_SSCTL1_TS2 0x00000800
3rd Sample Temp Sensor Select
#define | ADC_SSCTL1_IE2 0x00000400
3rd Sample Interrupt Enable
#define | ADC_SSCTL1_END2 0x00000200
3rd Sample is End of Sequence
#define | ADC_SSCTL1_D2 0x00000100
3rd Sample Diff Input Select
#define | ADC_SSCTL1_TS1 0x00000080
2nd Sample Temp Sensor Select
#define | ADC_SSCTL1_IE1 0x00000040
2nd Sample Interrupt Enable
#define | ADC_SSCTL1_END1 0x00000020
2nd Sample is End of Sequence
#define | ADC_SSCTL1_D1 0x00000010
2nd Sample Diff Input Select
#define | ADC_SSCTL1_TS0 0x00000008
1st Sample Temp Sensor Select
#define | ADC_SSCTL1_IE0 0x00000004
1st Sample Interrupt Enable
#define | ADC_SSCTL1_END0 0x00000002
1st Sample is End of Sequence
#define | ADC_SSCTL1_D0 0x00000001
1st Sample Diff Input Select
#define | ADC_SSCTL1_TS3 0x00008000
The following are defines for the bit fields in the ADC_O_SSCTL1 register.
#define | ADC_SSCTL1_IE3 0x00004000
4th Sample Interrupt Enable
#define | ADC_SSCTL1_END3 0x00002000
4th Sample is End of Sequence
#define | ADC_SSCTL1_D3 0x00001000
4th Sample Diff Input Select
#define | ADC_SSCTL1_TS2 0x00000800
3rd Sample Temp Sensor Select
#define | ADC_SSCTL1_IE2 0x00000400
3rd Sample Interrupt Enable
#define | ADC_SSCTL1_END2 0x00000200
3rd Sample is End of Sequence
#define | ADC_SSCTL1_D2 0x00000100
3rd Sample Diff Input Select
#define | ADC_SSCTL1_TS1 0x00000080
2nd Sample Temp Sensor Select
#define | ADC_SSCTL1_IE1 0x00000040
2nd Sample Interrupt Enable
#define | ADC_SSCTL1_END1 0x00000020
2nd Sample is End of Sequence
#define | ADC_SSCTL1_D1 0x00000010
2nd Sample Diff Input Select
#define | ADC_SSCTL1_TS0 0x00000008
1st Sample Temp Sensor Select
#define | ADC_SSCTL1_IE0 0x00000004
1st Sample Interrupt Enable
#define | ADC_SSCTL1_END0 0x00000002
1st Sample is End of Sequence
#define | ADC_SSCTL1_D0 0x00000001
1st Sample Diff Input Select
#define | ADC_SSFIFO1_DATA_M 0x000003FF
The following are defines for the bit fields in the ADC_O_SSFIFO1 register.
#define | ADC_SSFIFO1_DATA_S 0
The following are defines for the bit fields in the ADC_O_SSFIFO1 register.
#define | ADC_SSFIFO1_DATA_M 0x000003FF
The following are defines for the bit fields in the ADC_O_SSFIFO1 register.
#define | ADC_SSFIFO1_DATA_S 0
The following are defines for the bit fields in the ADC_O_SSFIFO1 register.
#define | ADC_SSFSTAT1_FULL 0x00001000
The following are defines for the bit fields in the ADC_O_SSFSTAT1 register.
#define | ADC_SSFSTAT1_EMPTY 0x00000100
FIFO Empty.
#define | ADC_SSFSTAT1_HPTR_M 0x000000F0
FIFO Head Pointer.
#define | ADC_SSFSTAT1_TPTR_M 0x0000000F
FIFO Tail Pointer.
#define | ADC_SSFSTAT1_HPTR_S 4
The following are defines for the bit fields in the ADC_O_SSFSTAT1 register.
#define | ADC_SSFSTAT1_TPTR_S 0
The following are defines for the bit fields in the ADC_O_SSFSTAT1 register.
#define | ADC_SSFSTAT1_FULL 0x00001000
The following are defines for the bit fields in the ADC_O_SSFSTAT1 register.
#define | ADC_SSFSTAT1_EMPTY 0x00000100
FIFO Empty.
#define | ADC_SSFSTAT1_HPTR_M 0x000000F0
FIFO Head Pointer.
#define | ADC_SSFSTAT1_TPTR_M 0x0000000F
FIFO Tail Pointer.
#define | ADC_SSFSTAT1_HPTR_S 4
The following are defines for the bit fields in the ADC_O_SSFSTAT1 register.
#define | ADC_SSFSTAT1_TPTR_S 0
The following are defines for the bit fields in the ADC_O_SSFSTAT1 register.
#define | ADC_SSCTL2_TS3 0x00008000
The following are defines for the bit fields in the ADC_O_SSCTL2 register.
#define | ADC_SSCTL2_IE3 0x00004000
4th Sample Interrupt Enable
#define | ADC_SSCTL2_END3 0x00002000
4th Sample is End of Sequence
#define | ADC_SSCTL2_D3 0x00001000
4th Sample Diff Input Select
#define | ADC_SSCTL2_TS2 0x00000800
3rd Sample Temp Sensor Select
#define | ADC_SSCTL2_IE2 0x00000400
3rd Sample Interrupt Enable
#define | ADC_SSCTL2_END2 0x00000200
3rd Sample is End of Sequence
#define | ADC_SSCTL2_D2 0x00000100
3rd Sample Diff Input Select
#define | ADC_SSCTL2_TS1 0x00000080
2nd Sample Temp Sensor Select
#define | ADC_SSCTL2_IE1 0x00000040
2nd Sample Interrupt Enable
#define | ADC_SSCTL2_END1 0x00000020
2nd Sample is End of Sequence
#define | ADC_SSCTL2_D1 0x00000010
2nd Sample Diff Input Select
#define | ADC_SSCTL2_TS0 0x00000008
1st Sample Temp Sensor Select
#define | ADC_SSCTL2_IE0 0x00000004
1st Sample Interrupt Enable
#define | ADC_SSCTL2_END0 0x00000002
1st Sample is End of Sequence
#define | ADC_SSCTL2_D0 0x00000001
1st Sample Diff Input Select
#define | ADC_SSCTL2_TS3 0x00008000
The following are defines for the bit fields in the ADC_O_SSCTL2 register.
#define | ADC_SSCTL2_IE3 0x00004000
4th Sample Interrupt Enable
#define | ADC_SSCTL2_END3 0x00002000
4th Sample is End of Sequence
#define | ADC_SSCTL2_D3 0x00001000
4th Sample Diff Input Select
#define | ADC_SSCTL2_TS2 0x00000800
3rd Sample Temp Sensor Select
#define | ADC_SSCTL2_IE2 0x00000400
3rd Sample Interrupt Enable
#define | ADC_SSCTL2_END2 0x00000200
3rd Sample is End of Sequence
#define | ADC_SSCTL2_D2 0x00000100
3rd Sample Diff Input Select
#define | ADC_SSCTL2_TS1 0x00000080
2nd Sample Temp Sensor Select
#define | ADC_SSCTL2_IE1 0x00000040
2nd Sample Interrupt Enable
#define | ADC_SSCTL2_END1 0x00000020
2nd Sample is End of Sequence
#define | ADC_SSCTL2_D1 0x00000010
2nd Sample Diff Input Select
#define | ADC_SSCTL2_TS0 0x00000008
1st Sample Temp Sensor Select
#define | ADC_SSCTL2_IE0 0x00000004
1st Sample Interrupt Enable
#define | ADC_SSCTL2_END0 0x00000002
1st Sample is End of Sequence
#define | ADC_SSCTL2_D0 0x00000001
1st Sample Diff Input Select
#define | ADC_SSFIFO2_DATA_M 0x000003FF
The following are defines for the bit fields in the ADC_O_SSFIFO2 register.
#define | ADC_SSFIFO2_DATA_S 0
The following are defines for the bit fields in the ADC_O_SSFIFO2 register.
#define | ADC_SSFIFO2_DATA_M 0x000003FF
The following are defines for the bit fields in the ADC_O_SSFIFO2 register.
#define | ADC_SSFIFO2_DATA_S 0
The following are defines for the bit fields in the ADC_O_SSFIFO2 register.
#define | ADC_SSFSTAT2_FULL 0x00001000
The following are defines for the bit fields in the ADC_O_SSFSTAT2 register.
#define | ADC_SSFSTAT2_EMPTY 0x00000100
FIFO Empty.
#define | ADC_SSFSTAT2_HPTR_M 0x000000F0
FIFO Head Pointer.
#define | ADC_SSFSTAT2_TPTR_M 0x0000000F
FIFO Tail Pointer.
#define | ADC_SSFSTAT2_HPTR_S 4
The following are defines for the bit fields in the ADC_O_SSFSTAT2 register.
#define | ADC_SSFSTAT2_TPTR_S 0
The following are defines for the bit fields in the ADC_O_SSFSTAT2 register.
#define | ADC_SSFSTAT2_FULL 0x00001000
The following are defines for the bit fields in the ADC_O_SSFSTAT2 register.
#define | ADC_SSFSTAT2_EMPTY 0x00000100
FIFO Empty.
#define | ADC_SSFSTAT2_HPTR_M 0x000000F0
FIFO Head Pointer.
#define | ADC_SSFSTAT2_TPTR_M 0x0000000F
FIFO Tail Pointer.
#define | ADC_SSFSTAT2_HPTR_S 4
The following are defines for the bit fields in the ADC_O_SSFSTAT2 register.
#define | ADC_SSFSTAT2_TPTR_S 0
The following are defines for the bit fields in the ADC_O_SSFSTAT2 register.
#define | ADC_SSCTL3_TS0 0x00000008
The following are defines for the bit fields in the ADC_O_SSCTL3 register.
#define | ADC_SSCTL3_IE0 0x00000004
1st Sample Interrupt Enable
#define | ADC_SSCTL3_END0 0x00000002
1st Sample is End of Sequence
#define | ADC_SSCTL3_D0 0x00000001
1st Sample Diff Input Select
#define | ADC_SSCTL3_TS0 0x00000008
The following are defines for the bit fields in the ADC_O_SSCTL3 register.
#define | ADC_SSCTL3_IE0 0x00000004
1st Sample Interrupt Enable
#define | ADC_SSCTL3_END0 0x00000002
1st Sample is End of Sequence
#define | ADC_SSCTL3_D0 0x00000001
1st Sample Diff Input Select
#define | ADC_SSFIFO3_DATA_M 0x000003FF
The following are defines for the bit fields in the ADC_O_SSFIFO3 register.
#define | ADC_SSFIFO3_DATA_S 0
The following are defines for the bit fields in the ADC_O_SSFIFO3 register.
#define | ADC_SSFIFO3_DATA_M 0x000003FF
The following are defines for the bit fields in the ADC_O_SSFIFO3 register.
#define | ADC_SSFIFO3_DATA_S 0
The following are defines for the bit fields in the ADC_O_SSFIFO3 register.
#define | ADC_SSFSTAT3_FULL 0x00001000
The following are defines for the bit fields in the ADC_O_SSFSTAT3 register.
#define | ADC_SSFSTAT3_EMPTY 0x00000100
FIFO Empty.
#define | ADC_SSFSTAT3_HPTR_M 0x000000F0
FIFO Head Pointer.
#define | ADC_SSFSTAT3_TPTR_M 0x0000000F
FIFO Tail Pointer.
#define | ADC_SSFSTAT3_HPTR_S 4
The following are defines for the bit fields in the ADC_O_SSFSTAT3 register.
#define | ADC_SSFSTAT3_TPTR_S 0
The following are defines for the bit fields in the ADC_O_SSFSTAT3 register.
#define | ADC_SSFSTAT3_FULL 0x00001000
The following are defines for the bit fields in the ADC_O_SSFSTAT3 register.
#define | ADC_SSFSTAT3_EMPTY 0x00000100
FIFO Empty.
#define | ADC_SSFSTAT3_HPTR_M 0x000000F0
FIFO Head Pointer.
#define | ADC_SSFSTAT3_TPTR_M 0x0000000F
FIFO Tail Pointer.
#define | ADC_SSFSTAT3_HPTR_S 4
The following are defines for the bit fields in the ADC_O_SSFSTAT3 register.
#define | ADC_SSFSTAT3_TPTR_S 0
The following are defines for the bit fields in the ADC_O_SSFSTAT3 register.
#define | ADC_TMLB_LB 0x00000001
The following are defines for the bit fields in the ADC_O_TMLB register.
#define | ADC_TMLB_LB 0x00000001
The following are defines for the bit fields in the ADC_O_TMLB register.
#define | ADC_SSFIFO_TMLB_CNT_M 0x000003C0
The following are defines for the the interpretation of the data in the SSFIFOx when the ADC TMLB is enabled.
#define | ADC_SSFIFO_TMLB_CONT 0x00000020
Continuation Sample Indicator.
#define | ADC_SSFIFO_TMLB_DIFF 0x00000010
Differential Sample Indicator.
#define | ADC_SSFIFO_TMLB_TS 0x00000008
Temp Sensor Sample Indicator.
#define | ADC_SSFIFO_TMLB_MUX_M 0x00000007
Analog Input Indicator.
#define | ADC_SSFIFO_TMLB_CNT_S 6
Sample counter shift.
#define | ADC_SSFIFO_TMLB_MUX_S 0
Input channel number shift.
#define | ADC_SSFIFO_TMLB_CNT_M 0x000003C0
The following are defines for the the interpretation of the data in the SSFIFOx when the ADC TMLB is enabled.
#define | ADC_SSFIFO_TMLB_CONT 0x00000020
Continuation Sample Indicator.
#define | ADC_SSFIFO_TMLB_DIFF 0x00000010
Differential Sample Indicator.
#define | ADC_SSFIFO_TMLB_TS 0x00000008
Temp Sensor Sample Indicator.
#define | ADC_SSFIFO_TMLB_MUX_M 0x00000007
Analog Input Indicator.
#define | ADC_SSFIFO_TMLB_CNT_S 6
Sample counter shift.
#define | ADC_SSFIFO_TMLB_MUX_S 0
Input channel number shift.

Detailed Description

LM3S ADC definition.

Definition in file lm3s_adc.h.

Define Documentation

#define ADC_ACTSS_ASEN3 0x00000008

ADC SS3 Enable.

The following are defines for the bit fields in the ADC_O_ACTSS register.

ADC SS3 Enable

Definition at line 348 of file lm3s_adc.h.

#define ADC_ACTSS_ASEN3 0x00000008

ADC SS3 Enable.

The following are defines for the bit fields in the ADC_O_ACTSS register.

ADC SS3 Enable

Definition at line 348 of file lm3s_adc.h.

#define ADC_DCISC_DCINT0 0x00000001

Digital Comparator 0 Interrupt.

Status and Clear

Definition at line 333 of file lm3s_adc.h.

#define ADC_DCISC_DCINT1 0x00000002

Digital Comparator 1 Interrupt.

Status and Clear

Definition at line 331 of file lm3s_adc.h.

#define ADC_DCISC_DCINT2 0x00000004

Digital Comparator 2 Interrupt.

Status and Clear

Definition at line 329 of file lm3s_adc.h.

#define ADC_DCISC_DCINT3 0x00000008

Digital Comparator 3 Interrupt.

Status and Clear

Definition at line 327 of file lm3s_adc.h.

#define ADC_DCISC_DCINT4 0x00000010

Digital Comparator 4 Interrupt.

Status and Clear

Definition at line 325 of file lm3s_adc.h.

#define ADC_DCISC_DCINT5 0x00000020

Digital Comparator 5 Interrupt.

Status and Clear

Definition at line 323 of file lm3s_adc.h.

#define ADC_DCISC_DCINT6 0x00000040

Digital Comparator 6 Interrupt.

Status and Clear

Definition at line 321 of file lm3s_adc.h.

#define ADC_DCISC_DCINT7 0x00000080

Digital Comparator 7 Interrupt.

Status and Clear

Definition at line 319 of file lm3s_adc.h.

#define ADC_EMUX_EM3_M 0x0000F000

SS3 Trigger Select.

The following are defines for the bit fields in the ADC_O_EMUX register.

SS3 Trigger Select

Definition at line 398 of file lm3s_adc.h.

#define ADC_EMUX_EM3_M 0x0000F000

SS3 Trigger Select.

The following are defines for the bit fields in the ADC_O_EMUX register.

SS3 Trigger Select

Definition at line 398 of file lm3s_adc.h.

#define ADC_IM_DCONSS0 0x00010000

Digital Comparator Interrupt on.

SS0

Definition at line 148 of file lm3s_adc.h.

#define ADC_IM_DCONSS1 0x00020000

Digital Comparator Interrupt on.

SS1

Definition at line 146 of file lm3s_adc.h.

#define ADC_IM_DCONSS2 0x00040000

Digital Comparator Interrupt on.

SS2

Definition at line 144 of file lm3s_adc.h.

#define ADC_IM_DCONSS3 0x00080000

Digital Comparator Interrupt on.

SS3

Definition at line 142 of file lm3s_adc.h.

#define ADC_IM_MASK3 0x00000008

SS3 Interrupt Mask.

The following are defines for the bit fields in the ADC_O_IM register.

SS3 Interrupt Mask

Definition at line 368 of file lm3s_adc.h.

#define ADC_IM_MASK3 0x00000008

SS3 Interrupt Mask.

The following are defines for the bit fields in the ADC_O_IM register.

SS3 Interrupt Mask

Definition at line 368 of file lm3s_adc.h.

#define ADC_ISC_DCINSS0 0x00010000

Digital Comparator Interrupt.

Status on SS0

Definition at line 165 of file lm3s_adc.h.

#define ADC_ISC_DCINSS1 0x00020000

Digital Comparator Interrupt.

Status on SS1

Definition at line 163 of file lm3s_adc.h.

#define ADC_ISC_DCINSS2 0x00040000

Digital Comparator Interrupt.

Status on SS2

Definition at line 161 of file lm3s_adc.h.

#define ADC_ISC_DCINSS3 0x00080000

Digital Comparator Interrupt.

Status on SS3

Definition at line 159 of file lm3s_adc.h.

#define ADC_ISC_IN3 0x00000008

SS3 Interrupt Status and Clear.

The following are defines for the bit fields in the ADC_O_ISC register.

SS3 Interrupt Status and Clear

Definition at line 378 of file lm3s_adc.h.

#define ADC_ISC_IN3 0x00000008

SS3 Interrupt Status and Clear.

The following are defines for the bit fields in the ADC_O_ISC register.

SS3 Interrupt Status and Clear

Definition at line 378 of file lm3s_adc.h.

#define ADC_O_DCISC 0x00000034

ADC Digital Comparator Interrupt.

Status and Clear

Definition at line 55 of file lm3s_adc.h.

#define ADC_O_DCRIC 0x00000D00

ADC Digital Comparator Reset.

Initial Conditions

Definition at line 99 of file lm3s_adc.h.

#define ADC_O_PSSI 0x00000028

ADC Processor Sample Sequence.

Initiate

Definition at line 52 of file lm3s_adc.h.

#define ADC_O_SSDC0 0x00000054

ADC Sample Sequence 0 Digital.

Comparator Select

Definition at line 66 of file lm3s_adc.h.

#define ADC_O_SSDC1 0x00000074

ADC Sample Sequence 1 Digital.

Comparator Select

Definition at line 76 of file lm3s_adc.h.

#define ADC_O_SSDC2 0x00000094

ADC Sample Sequence 2 Digital.

Comparator Select

Definition at line 86 of file lm3s_adc.h.

#define ADC_O_SSDC3 0x000000B4

ADC Sample Sequence 3 Digital.

Comparator Select

Definition at line 96 of file lm3s_adc.h.

#define ADC_O_SSFIFO0 0x00000048

ADC Sample Sequence Result FIFO.

0

Definition at line 61 of file lm3s_adc.h.

#define ADC_O_SSFIFO1 0x00000068

ADC Sample Sequence Result FIFO.

1

Definition at line 71 of file lm3s_adc.h.

#define ADC_O_SSFIFO2 0x00000088

ADC Sample Sequence Result FIFO.

2

Definition at line 81 of file lm3s_adc.h.

#define ADC_O_SSFIFO3 0x000000A8

ADC Sample Sequence Result FIFO.

3

Definition at line 91 of file lm3s_adc.h.

#define ADC_O_SSFSTAT0 0x0000004C

ADC Sample Sequence FIFO 0.

Status

Definition at line 63 of file lm3s_adc.h.

#define ADC_O_SSFSTAT1 0x0000006C

ADC Sample Sequence FIFO 1.

Status

Definition at line 73 of file lm3s_adc.h.

#define ADC_O_SSFSTAT2 0x0000008C

ADC Sample Sequence FIFO 2.

Status

Definition at line 83 of file lm3s_adc.h.

#define ADC_O_SSFSTAT3 0x000000AC

ADC Sample Sequence FIFO 3.

Status

Definition at line 93 of file lm3s_adc.h.

#define ADC_O_SSMUX0 0x00000040

ADC Sample Sequence Input.

Multiplexer Select 0

Definition at line 58 of file lm3s_adc.h.

#define ADC_O_SSMUX1 0x00000060

ADC Sample Sequence Input.

Multiplexer Select 1

Definition at line 68 of file lm3s_adc.h.

#define ADC_O_SSMUX2 0x00000080

ADC Sample Sequence Input.

Multiplexer Select 2

Definition at line 78 of file lm3s_adc.h.

#define ADC_O_SSMUX3 0x000000A0

ADC Sample Sequence Input.

Multiplexer Select 3

Definition at line 88 of file lm3s_adc.h.

#define ADC_OSTAT_OV3 0x00000008

SS3 FIFO Overflow.

The following are defines for the bit fields in the ADC_O_OSTAT register.

SS3 FIFO Overflow

Definition at line 388 of file lm3s_adc.h.

#define ADC_OSTAT_OV3 0x00000008

SS3 FIFO Overflow.

The following are defines for the bit fields in the ADC_O_OSTAT register.

SS3 FIFO Overflow

Definition at line 388 of file lm3s_adc.h.

#define ADC_PSSI_SS3 0x00000008

SS3 Initiate.

The following are defines for the bit fields in the ADC_O_PSSI register.

SS3 Initiate

Definition at line 484 of file lm3s_adc.h.

#define ADC_PSSI_SS3 0x00000008

SS3 Initiate.

The following are defines for the bit fields in the ADC_O_PSSI register.

SS3 Initiate

Definition at line 484 of file lm3s_adc.h.

#define ADC_RIS_INR3 0x00000008

SS3 Raw Interrupt Status.

The following are defines for the bit fields in the ADC_O_RIS register.

SS3 Raw Interrupt Status

Definition at line 358 of file lm3s_adc.h.

#define ADC_RIS_INR3 0x00000008

SS3 Raw Interrupt Status.

The following are defines for the bit fields in the ADC_O_RIS register.

SS3 Raw Interrupt Status

Definition at line 358 of file lm3s_adc.h.

#define ADC_RIS_INRDC 0x00010000

Digital Comparator Raw Interrupt.

Status

Definition at line 131 of file lm3s_adc.h.

#define ADC_SAC_AVG_M 0x00000007

Hardware Averaging Control.

The following are defines for the bit fields in the ADC_O_SAC register.

Hardware Averaging Control

Definition at line 494 of file lm3s_adc.h.

#define ADC_SAC_AVG_M 0x00000007

Hardware Averaging Control.

The following are defines for the bit fields in the ADC_O_SAC register.

Hardware Averaging Control

Definition at line 494 of file lm3s_adc.h.

#define ADC_SSCTL0_TS7 0x80000000

The following are defines for the bit fields in the ADC_O_SSCTL0 register.

8th Sample Temp Sensor Select

Definition at line 751 of file lm3s_adc.h.

#define ADC_SSCTL0_TS7 0x80000000

The following are defines for the bit fields in the ADC_O_SSCTL0 register.

8th Sample Temp Sensor Select

Definition at line 751 of file lm3s_adc.h.

#define ADC_SSCTL1_TS3 0x00008000

The following are defines for the bit fields in the ADC_O_SSCTL1 register.

4th Sample Temp Sensor Select

Definition at line 855 of file lm3s_adc.h.

#define ADC_SSCTL1_TS3 0x00008000

The following are defines for the bit fields in the ADC_O_SSCTL1 register.

4th Sample Temp Sensor Select

Definition at line 855 of file lm3s_adc.h.

#define ADC_SSCTL2_TS3 0x00008000

The following are defines for the bit fields in the ADC_O_SSCTL2 register.

4th Sample Temp Sensor Select

Definition at line 936 of file lm3s_adc.h.

#define ADC_SSCTL2_TS3 0x00008000

The following are defines for the bit fields in the ADC_O_SSCTL2 register.

4th Sample Temp Sensor Select

Definition at line 936 of file lm3s_adc.h.

#define ADC_SSCTL3_TS0 0x00000008

The following are defines for the bit fields in the ADC_O_SSCTL3 register.

1st Sample Temp Sensor Select

Definition at line 1011 of file lm3s_adc.h.

#define ADC_SSCTL3_TS0 0x00000008

The following are defines for the bit fields in the ADC_O_SSCTL3 register.

1st Sample Temp Sensor Select

Definition at line 1011 of file lm3s_adc.h.

#define ADC_SSDC0_S0DCSEL_M 0x0000000F

Sample 0 Digital Comparator.

Select

Definition at line 841 of file lm3s_adc.h.

#define ADC_SSDC0_S1DCSEL_M 0x000000F0

Sample 1 Digital Comparator.

Select

Definition at line 839 of file lm3s_adc.h.

#define ADC_SSDC0_S2DCSEL_M 0x00000F00

Sample 2 Digital Comparator.

Select

Definition at line 837 of file lm3s_adc.h.

#define ADC_SSDC0_S3DCSEL_M 0x0000F000

Sample 3 Digital Comparator.

Select

Definition at line 835 of file lm3s_adc.h.

#define ADC_SSDC0_S4DCSEL_M 0x000F0000

Sample 4 Digital Comparator.

Select

Definition at line 833 of file lm3s_adc.h.

#define ADC_SSDC0_S5DCSEL_M 0x00F00000

Sample 5 Digital Comparator.

Select

Definition at line 831 of file lm3s_adc.h.

#define ADC_SSDC0_S6DCSEL_M 0x0F000000

Sample 6 Digital Comparator.

Select

Definition at line 829 of file lm3s_adc.h.

#define ADC_SSDC0_S7DCSEL_M 0xF0000000

Sample 7 Digital Comparator.

Select

Definition at line 827 of file lm3s_adc.h.

#define ADC_SSDC1_S0DCSEL_M 0x0000000F

Sample 0 Digital Comparator.

Select

Definition at line 913 of file lm3s_adc.h.

#define ADC_SSDC1_S1DCSEL_M 0x000000F0

Sample 1 Digital Comparator.

Select

Definition at line 911 of file lm3s_adc.h.

#define ADC_SSDC1_S2DCSEL_M 0x00000F00

Sample 2 Digital Comparator.

Select

Definition at line 909 of file lm3s_adc.h.

#define ADC_SSDC1_S3DCSEL_M 0x0000F000

Sample 3 Digital Comparator.

Select

Definition at line 907 of file lm3s_adc.h.

#define ADC_SSDC2_S0DCSEL_M 0x0000000F

Sample 0 Digital Comparator.

Select

Definition at line 994 of file lm3s_adc.h.

#define ADC_SSDC2_S1DCSEL_M 0x000000F0

Sample 1 Digital Comparator.

Select

Definition at line 992 of file lm3s_adc.h.

#define ADC_SSDC2_S2DCSEL_M 0x00000F00

Sample 2 Digital Comparator.

Select

Definition at line 990 of file lm3s_adc.h.

#define ADC_SSDC2_S3DCSEL_M 0x0000F000

Sample 3 Digital Comparator.

Select

Definition at line 988 of file lm3s_adc.h.

#define ADC_SSDC3_S0DCSEL_M 0x0000000F

Sample 0 Digital Comparator.

Select

Definition at line 1045 of file lm3s_adc.h.

#define ADC_SSFIFO0_DATA_M 0x000003FF

The following are defines for the bit fields in the ADC_O_SSFIFO0 register.

Conversion Result Data.

Conversion Result Data

Definition at line 788 of file lm3s_adc.h.

#define ADC_SSFIFO0_DATA_M 0x000003FF

The following are defines for the bit fields in the ADC_O_SSFIFO0 register.

Conversion Result Data.

Conversion Result Data

Definition at line 788 of file lm3s_adc.h.

#define ADC_SSFIFO0_DATA_S 0

The following are defines for the bit fields in the ADC_O_SSFIFO0 register.

Conversion Result Data.

Conversion Result Data

Definition at line 789 of file lm3s_adc.h.

#define ADC_SSFIFO0_DATA_S 0

The following are defines for the bit fields in the ADC_O_SSFIFO0 register.

Conversion Result Data.

Conversion Result Data

Definition at line 789 of file lm3s_adc.h.

#define ADC_SSFIFO1_DATA_M 0x000003FF

The following are defines for the bit fields in the ADC_O_SSFIFO1 register.

Conversion Result Data.

Conversion Result Data

Definition at line 876 of file lm3s_adc.h.

#define ADC_SSFIFO1_DATA_M 0x000003FF

The following are defines for the bit fields in the ADC_O_SSFIFO1 register.

Conversion Result Data.

Conversion Result Data

Definition at line 876 of file lm3s_adc.h.

#define ADC_SSFIFO1_DATA_S 0

The following are defines for the bit fields in the ADC_O_SSFIFO1 register.

Conversion Result Data.

Conversion Result Data

Definition at line 877 of file lm3s_adc.h.

#define ADC_SSFIFO1_DATA_S 0

The following are defines for the bit fields in the ADC_O_SSFIFO1 register.

Conversion Result Data.

Conversion Result Data

Definition at line 877 of file lm3s_adc.h.

#define ADC_SSFIFO2_DATA_M 0x000003FF

The following are defines for the bit fields in the ADC_O_SSFIFO2 register.

Conversion Result Data.

Conversion Result Data

Definition at line 957 of file lm3s_adc.h.

#define ADC_SSFIFO2_DATA_M 0x000003FF

The following are defines for the bit fields in the ADC_O_SSFIFO2 register.

Conversion Result Data.

Conversion Result Data

Definition at line 957 of file lm3s_adc.h.

#define ADC_SSFIFO2_DATA_S 0

The following are defines for the bit fields in the ADC_O_SSFIFO2 register.

Conversion Result Data.

Conversion Result Data

Definition at line 958 of file lm3s_adc.h.

#define ADC_SSFIFO2_DATA_S 0

The following are defines for the bit fields in the ADC_O_SSFIFO2 register.

Conversion Result Data.

Conversion Result Data

Definition at line 958 of file lm3s_adc.h.

#define ADC_SSFIFO3_DATA_M 0x000003FF

The following are defines for the bit fields in the ADC_O_SSFIFO3 register.

Conversion Result Data.

Conversion Result Data

Definition at line 1020 of file lm3s_adc.h.

#define ADC_SSFIFO3_DATA_M 0x000003FF

The following are defines for the bit fields in the ADC_O_SSFIFO3 register.

Conversion Result Data.

Conversion Result Data

Definition at line 1020 of file lm3s_adc.h.

#define ADC_SSFIFO3_DATA_S 0

The following are defines for the bit fields in the ADC_O_SSFIFO3 register.

Conversion Result Data.

Conversion Result Data

Definition at line 1021 of file lm3s_adc.h.

#define ADC_SSFIFO3_DATA_S 0

The following are defines for the bit fields in the ADC_O_SSFIFO3 register.

Conversion Result Data.

Conversion Result Data

Definition at line 1021 of file lm3s_adc.h.

#define ADC_SSFIFO_TMLB_CNT_M 0x000003C0

The following are defines for the the interpretation of the data in the SSFIFOx when the ADC TMLB is enabled.

Continuous Sample Counter.

Continuous Sample Counter

Definition at line 1353 of file lm3s_adc.h.

#define ADC_SSFIFO_TMLB_CNT_M 0x000003C0

The following are defines for the the interpretation of the data in the SSFIFOx when the ADC TMLB is enabled.

Continuous Sample Counter.

Continuous Sample Counter

Definition at line 1353 of file lm3s_adc.h.

#define ADC_SSFSTAT0_FULL 0x00001000

The following are defines for the bit fields in the ADC_O_SSFSTAT0 register.

FIFO Full.

FIFO Full

Definition at line 795 of file lm3s_adc.h.

#define ADC_SSFSTAT0_FULL 0x00001000

The following are defines for the bit fields in the ADC_O_SSFSTAT0 register.

FIFO Full.

FIFO Full

Definition at line 795 of file lm3s_adc.h.

#define ADC_SSFSTAT0_HPTR_S 4

The following are defines for the bit fields in the ADC_O_SSFSTAT0 register.

FIFO Full.

FIFO Full

Definition at line 799 of file lm3s_adc.h.

#define ADC_SSFSTAT0_HPTR_S 4

The following are defines for the bit fields in the ADC_O_SSFSTAT0 register.

FIFO Full.

FIFO Full

Definition at line 799 of file lm3s_adc.h.

#define ADC_SSFSTAT0_TPTR_S 0

The following are defines for the bit fields in the ADC_O_SSFSTAT0 register.

FIFO Full.

FIFO Full

Definition at line 800 of file lm3s_adc.h.

#define ADC_SSFSTAT0_TPTR_S 0

The following are defines for the bit fields in the ADC_O_SSFSTAT0 register.

FIFO Full.

FIFO Full

Definition at line 800 of file lm3s_adc.h.

#define ADC_SSFSTAT1_FULL 0x00001000

The following are defines for the bit fields in the ADC_O_SSFSTAT1 register.

FIFO Full.

FIFO Full

Definition at line 883 of file lm3s_adc.h.

#define ADC_SSFSTAT1_FULL 0x00001000

The following are defines for the bit fields in the ADC_O_SSFSTAT1 register.

FIFO Full.

FIFO Full

Definition at line 883 of file lm3s_adc.h.

#define ADC_SSFSTAT1_HPTR_S 4

The following are defines for the bit fields in the ADC_O_SSFSTAT1 register.

FIFO Full.

FIFO Full

Definition at line 887 of file lm3s_adc.h.

#define ADC_SSFSTAT1_HPTR_S 4

The following are defines for the bit fields in the ADC_O_SSFSTAT1 register.

FIFO Full.

FIFO Full

Definition at line 887 of file lm3s_adc.h.

#define ADC_SSFSTAT1_TPTR_S 0

The following are defines for the bit fields in the ADC_O_SSFSTAT1 register.

FIFO Full.

FIFO Full

Definition at line 888 of file lm3s_adc.h.

#define ADC_SSFSTAT1_TPTR_S 0

The following are defines for the bit fields in the ADC_O_SSFSTAT1 register.

FIFO Full.

FIFO Full

Definition at line 888 of file lm3s_adc.h.

#define ADC_SSFSTAT2_FULL 0x00001000

The following are defines for the bit fields in the ADC_O_SSFSTAT2 register.

FIFO Full.

FIFO Full

Definition at line 964 of file lm3s_adc.h.

#define ADC_SSFSTAT2_FULL 0x00001000

The following are defines for the bit fields in the ADC_O_SSFSTAT2 register.

FIFO Full.

FIFO Full

Definition at line 964 of file lm3s_adc.h.

#define ADC_SSFSTAT2_HPTR_S 4

The following are defines for the bit fields in the ADC_O_SSFSTAT2 register.

FIFO Full.

FIFO Full

Definition at line 968 of file lm3s_adc.h.

#define ADC_SSFSTAT2_HPTR_S 4

The following are defines for the bit fields in the ADC_O_SSFSTAT2 register.

FIFO Full.

FIFO Full

Definition at line 968 of file lm3s_adc.h.

#define ADC_SSFSTAT2_TPTR_S 0

The following are defines for the bit fields in the ADC_O_SSFSTAT2 register.

FIFO Full.

FIFO Full

Definition at line 969 of file lm3s_adc.h.

#define ADC_SSFSTAT2_TPTR_S 0

The following are defines for the bit fields in the ADC_O_SSFSTAT2 register.

FIFO Full.

FIFO Full

Definition at line 969 of file lm3s_adc.h.

#define ADC_SSFSTAT3_FULL 0x00001000

The following are defines for the bit fields in the ADC_O_SSFSTAT3 register.

FIFO Full.

FIFO Full

Definition at line 1027 of file lm3s_adc.h.

#define ADC_SSFSTAT3_FULL 0x00001000

The following are defines for the bit fields in the ADC_O_SSFSTAT3 register.

FIFO Full.

FIFO Full

Definition at line 1027 of file lm3s_adc.h.

#define ADC_SSFSTAT3_HPTR_S 4

The following are defines for the bit fields in the ADC_O_SSFSTAT3 register.

FIFO Full.

FIFO Full

Definition at line 1031 of file lm3s_adc.h.

#define ADC_SSFSTAT3_HPTR_S 4

The following are defines for the bit fields in the ADC_O_SSFSTAT3 register.

FIFO Full.

FIFO Full

Definition at line 1031 of file lm3s_adc.h.

#define ADC_SSFSTAT3_TPTR_S 0

The following are defines for the bit fields in the ADC_O_SSFSTAT3 register.

FIFO Full.

FIFO Full

Definition at line 1032 of file lm3s_adc.h.

#define ADC_SSFSTAT3_TPTR_S 0

The following are defines for the bit fields in the ADC_O_SSFSTAT3 register.

FIFO Full.

FIFO Full

Definition at line 1032 of file lm3s_adc.h.

#define ADC_SSMUX0_MUX0_S 0

The following are defines for the bit fields in the ADC_O_SSMUX0 register.

8th Sample Input Select

Definition at line 745 of file lm3s_adc.h.

#define ADC_SSMUX0_MUX0_S 0

The following are defines for the bit fields in the ADC_O_SSMUX0 register.

8th Sample Input Select

Definition at line 745 of file lm3s_adc.h.

#define ADC_SSMUX0_MUX1_S 4

The following are defines for the bit fields in the ADC_O_SSMUX0 register.

8th Sample Input Select

Definition at line 744 of file lm3s_adc.h.

#define ADC_SSMUX0_MUX1_S 4

The following are defines for the bit fields in the ADC_O_SSMUX0 register.

8th Sample Input Select

Definition at line 744 of file lm3s_adc.h.

#define ADC_SSMUX0_MUX2_S 8

The following are defines for the bit fields in the ADC_O_SSMUX0 register.

8th Sample Input Select

Definition at line 743 of file lm3s_adc.h.

#define ADC_SSMUX0_MUX2_S 8

The following are defines for the bit fields in the ADC_O_SSMUX0 register.

8th Sample Input Select

Definition at line 743 of file lm3s_adc.h.

#define ADC_SSMUX0_MUX3_S 12

The following are defines for the bit fields in the ADC_O_SSMUX0 register.

8th Sample Input Select

Definition at line 742 of file lm3s_adc.h.

#define ADC_SSMUX0_MUX3_S 12

The following are defines for the bit fields in the ADC_O_SSMUX0 register.

8th Sample Input Select

Definition at line 742 of file lm3s_adc.h.

#define ADC_SSMUX0_MUX4_S 16

The following are defines for the bit fields in the ADC_O_SSMUX0 register.

8th Sample Input Select

Definition at line 741 of file lm3s_adc.h.

#define ADC_SSMUX0_MUX4_S 16

The following are defines for the bit fields in the ADC_O_SSMUX0 register.

8th Sample Input Select

Definition at line 741 of file lm3s_adc.h.

#define ADC_SSMUX0_MUX5_S 20

The following are defines for the bit fields in the ADC_O_SSMUX0 register.

8th Sample Input Select

Definition at line 740 of file lm3s_adc.h.

#define ADC_SSMUX0_MUX5_S 20

The following are defines for the bit fields in the ADC_O_SSMUX0 register.

8th Sample Input Select

Definition at line 740 of file lm3s_adc.h.

#define ADC_SSMUX0_MUX6_S 24

The following are defines for the bit fields in the ADC_O_SSMUX0 register.

8th Sample Input Select

Definition at line 739 of file lm3s_adc.h.

#define ADC_SSMUX0_MUX6_S 24

The following are defines for the bit fields in the ADC_O_SSMUX0 register.

8th Sample Input Select

Definition at line 739 of file lm3s_adc.h.

#define ADC_SSMUX0_MUX7_M 0x70000000

The following are defines for the bit fields in the ADC_O_SSMUX0 register.

8th Sample Input Select

Definition at line 508 of file lm3s_adc.h.

#define ADC_SSMUX0_MUX7_S 28

The following are defines for the bit fields in the ADC_O_SSMUX0 register.

8th Sample Input Select

Definition at line 738 of file lm3s_adc.h.

#define ADC_SSMUX0_MUX7_S 28

The following are defines for the bit fields in the ADC_O_SSMUX0 register.

8th Sample Input Select

Definition at line 738 of file lm3s_adc.h.

#define ADC_SSMUX1_MUX0_S 0

The following are defines for the bit fields in the ADC_O_SSMUX1 register.

4th Sample Input Select

Definition at line 595 of file lm3s_adc.h.

#define ADC_SSMUX1_MUX1_S 4

The following are defines for the bit fields in the ADC_O_SSMUX1 register.

4th Sample Input Select

Definition at line 594 of file lm3s_adc.h.

#define ADC_SSMUX1_MUX2_S 8

The following are defines for the bit fields in the ADC_O_SSMUX1 register.

4th Sample Input Select

Definition at line 593 of file lm3s_adc.h.

#define ADC_SSMUX1_MUX3_M 0x00007000

The following are defines for the bit fields in the ADC_O_SSMUX1 register.

4th Sample Input Select

Definition at line 588 of file lm3s_adc.h.

#define ADC_SSMUX1_MUX3_S 12

The following are defines for the bit fields in the ADC_O_SSMUX1 register.

4th Sample Input Select

Definition at line 592 of file lm3s_adc.h.

#define ADC_SSOP0_S0DCOP 0x00000001

Sample 0 Digital Comparator.

Operation

Definition at line 820 of file lm3s_adc.h.

#define ADC_SSOP0_S1DCOP 0x00000010

Sample 1 Digital Comparator.

Operation

Definition at line 818 of file lm3s_adc.h.

#define ADC_SSOP0_S2DCOP 0x00000100

Sample 2 Digital Comparator.

Operation

Definition at line 816 of file lm3s_adc.h.

#define ADC_SSOP0_S3DCOP 0x00001000

Sample 3 Digital Comparator.

Operation

Definition at line 814 of file lm3s_adc.h.

#define ADC_SSOP0_S4DCOP 0x00010000

Sample 4 Digital Comparator.

Operation

Definition at line 812 of file lm3s_adc.h.

#define ADC_SSOP0_S5DCOP 0x00100000

Sample 5 Digital Comparator.

Operation

Definition at line 810 of file lm3s_adc.h.

#define ADC_SSOP0_S6DCOP 0x01000000

Sample 6 Digital Comparator.

Operation

Definition at line 808 of file lm3s_adc.h.

#define ADC_SSOP0_S7DCOP 0x10000000

Sample 7 Digital Comparator.

Operation

Definition at line 806 of file lm3s_adc.h.

#define ADC_SSOP1_S0DCOP 0x00000001

Sample 0 Digital Comparator.

Operation

Definition at line 900 of file lm3s_adc.h.

#define ADC_SSOP1_S1DCOP 0x00000010

Sample 1 Digital Comparator.

Operation

Definition at line 898 of file lm3s_adc.h.

#define ADC_SSOP1_S2DCOP 0x00000100

Sample 2 Digital Comparator.

Operation

Definition at line 896 of file lm3s_adc.h.

#define ADC_SSOP1_S3DCOP 0x00001000

Sample 3 Digital Comparator.

Operation

Definition at line 894 of file lm3s_adc.h.

#define ADC_SSOP2_S0DCOP 0x00000001

Sample 0 Digital Comparator.

Operation

Definition at line 981 of file lm3s_adc.h.

#define ADC_SSOP2_S1DCOP 0x00000010

Sample 1 Digital Comparator.

Operation

Definition at line 979 of file lm3s_adc.h.

#define ADC_SSOP2_S2DCOP 0x00000100

Sample 2 Digital Comparator.

Operation

Definition at line 977 of file lm3s_adc.h.

#define ADC_SSOP2_S3DCOP 0x00001000

Sample 3 Digital Comparator.

Operation

Definition at line 975 of file lm3s_adc.h.

#define ADC_SSOP3_S0DCOP 0x00000001

Sample 0 Digital Comparator.

Operation

Definition at line 1038 of file lm3s_adc.h.

#define ADC_SSPRI_SS3_M 0x00003000

SS3 Priority.

The following are defines for the bit fields in the ADC_O_SSPRI register.

SS3 Priority

Definition at line 458 of file lm3s_adc.h.

#define ADC_SSPRI_SS3_M 0x00003000

SS3 Priority.

The following are defines for the bit fields in the ADC_O_SSPRI register.

SS3 Priority

Definition at line 458 of file lm3s_adc.h.

#define ADC_TMLB_LB 0x00000001

The following are defines for the bit fields in the ADC_O_TMLB register.

Loopback Mode Enable.

Loopback Mode Enable

Definition at line 1052 of file lm3s_adc.h.

#define ADC_TMLB_LB 0x00000001

The following are defines for the bit fields in the ADC_O_TMLB register.

Loopback Mode Enable.

Loopback Mode Enable

Definition at line 1052 of file lm3s_adc.h.

#define ADC_USTAT_UV3 0x00000008

SS3 FIFO Underflow.

The following are defines for the bit fields in the ADC_O_USTAT register.

SS3 FIFO Underflow

Definition at line 448 of file lm3s_adc.h.

#define ADC_USTAT_UV3 0x00000008

SS3 FIFO Underflow.

The following are defines for the bit fields in the ADC_O_USTAT register.

SS3 FIFO Underflow

Definition at line 448 of file lm3s_adc.h.


BeRTOS: lm3s_adc.h Source File

  • cpu
  • cortex-m3
  • io
lm3s_adc.h
Go to the documentation of this file.
00001
00036 #ifndef LM3S_ADC_H
00037 #define LM3S_ADC_H
00038
00039
00040 /*
00041  * The following are defines for the ADC register offsets.
00042  */
00043 #define ADC_O_ACTSS             0x00000000  ///< ADC Active Sample Sequencer
00044 #define ADC_O_RIS               0x00000004  ///< ADC Raw Interrupt Status
00045 #define ADC_O_IM                0x00000008  ///< ADC Interrupt Mask
00046 #define ADC_O_ISC               0x0000000C  ///< ADC Interrupt Status and Clear
00047 #define ADC_O_OSTAT             0x00000010  ///< ADC Overflow Status
00048 #define ADC_O_EMUX              0x00000014  ///< ADC Event Multiplexer Select
00049 #define ADC_O_USTAT             0x00000018  ///< ADC Underflow Status
00050 #define ADC_O_SSPRI             0x00000020  ///< ADC Sample Sequencer Priority
00051 #define ADC_O_SPC               0x00000024  ///< ADC Sample Phase Control
00052 #define ADC_O_PSSI              0x00000028  ///< ADC Processor Sample Sequence
00053
00054 #define ADC_O_SAC               0x00000030  ///< ADC Sample Averaging Control
00055 #define ADC_O_DCISC             0x00000034  ///< ADC Digital Comparator Interrupt
00056
00057 #define ADC_O_CTL               0x00000038  ///< ADC Control
00058 #define ADC_O_SSMUX0            0x00000040  ///< ADC Sample Sequence Input
00059
00060 #define ADC_O_SSCTL0            0x00000044  ///< ADC Sample Sequence Control 0
00061 #define ADC_O_SSFIFO0           0x00000048  ///< ADC Sample Sequence Result FIFO
00062
00063 #define ADC_O_SSFSTAT0          0x0000004C  ///< ADC Sample Sequence FIFO 0
00064
00065 #define ADC_O_SSOP0             0x00000050  ///< ADC Sample Sequence 0 Operation
00066 #define ADC_O_SSDC0             0x00000054  ///< ADC Sample Sequence 0 Digital
00067
00068 #define ADC_O_SSMUX1            0x00000060  ///< ADC Sample Sequence Input
00069
00070 #define ADC_O_SSCTL1            0x00000064  ///< ADC Sample Sequence Control 1
00071 #define ADC_O_SSFIFO1           0x00000068  ///< ADC Sample Sequence Result FIFO
00072
00073 #define ADC_O_SSFSTAT1          0x0000006C  ///< ADC Sample Sequence FIFO 1
00074
00075 #define ADC_O_SSOP1             0x00000070  ///< ADC Sample Sequence 1 Operation
00076 #define ADC_O_SSDC1             0x00000074  ///< ADC Sample Sequence 1 Digital
00077
00078 #define ADC_O_SSMUX2            0x00000080  ///< ADC Sample Sequence Input
00079
00080 #define ADC_O_SSCTL2            0x00000084  ///< ADC Sample Sequence Control 2
00081 #define ADC_O_SSFIFO2           0x00000088  ///< ADC Sample Sequence Result FIFO
00082
00083 #define ADC_O_SSFSTAT2          0x0000008C  ///< ADC Sample Sequence FIFO 2
00084
00085 #define ADC_O_SSOP2             0x00000090  ///< ADC Sample Sequence 2 Operation
00086 #define ADC_O_SSDC2             0x00000094  ///< ADC Sample Sequence 2 Digital
00087
00088 #define ADC_O_SSMUX3            0x000000A0  ///< ADC Sample Sequence Input
00089
00090 #define ADC_O_SSCTL3            0x000000A4  ///< ADC Sample Sequence Control 3
00091 #define ADC_O_SSFIFO3           0x000000A8  ///< ADC Sample Sequence Result FIFO
00092
00093 #define ADC_O_SSFSTAT3          0x000000AC  ///< ADC Sample Sequence FIFO 3
00094
00095 #define ADC_O_SSOP3             0x000000B0  ///< ADC Sample Sequence 3 Operation
00096 #define ADC_O_SSDC3             0x000000B4  ///< ADC Sample Sequence 3 Digital
00097
00098 #define ADC_O_TMLB              0x00000100  ///< ADC Test Mode Loopback
00099 #define ADC_O_DCRIC             0x00000D00  ///< ADC Digital Comparator Reset
00100
00101 #define ADC_O_DCCTL0            0x00000E00  ///< ADC Digital Comparator Control 0
00102 #define ADC_O_DCCTL1            0x00000E04  ///< ADC Digital Comparator Control 1
00103 #define ADC_O_DCCTL2            0x00000E08  ///< ADC Digital Comparator Control 2
00104 #define ADC_O_DCCTL3            0x00000E0C  ///< ADC Digital Comparator Control 3
00105 #define ADC_O_DCCTL4            0x00000E10  ///< ADC Digital Comparator Control 4
00106 #define ADC_O_DCCTL5            0x00000E14  ///< ADC Digital Comparator Control 5
00107 #define ADC_O_DCCTL6            0x00000E18  ///< ADC Digital Comparator Control 6
00108 #define ADC_O_DCCTL7            0x00000E1C  ///< ADC Digital Comparator Control 7
00109 #define ADC_O_DCCMP0            0x00000E40  ///< ADC Digital Comparator Range 0
00110 #define ADC_O_DCCMP1            0x00000E44  ///< ADC Digital Comparator Range 1
00111 #define ADC_O_DCCMP2            0x00000E48  ///< ADC Digital Comparator Range 2
00112 #define ADC_O_DCCMP3            0x00000E4C  ///< ADC Digital Comparator Range 3
00113 #define ADC_O_DCCMP4            0x00000E50  ///< ADC Digital Comparator Range 4
00114 #define ADC_O_DCCMP5            0x00000E54  ///< ADC Digital Comparator Range 5
00115 #define ADC_O_DCCMP6            0x00000E58  ///< ADC Digital Comparator Range 6
00116 #define ADC_O_DCCMP7            0x00000E5C  ///< ADC Digital Comparator Range 7
00117
00118
00119 /*
00120  * The following are defines for the bit fields in the ADC_O_ACTSS register.
00121  */
00122 #define ADC_ACTSS_ASEN3         0x00000008  ///< ADC SS3 Enable
00123 #define ADC_ACTSS_ASEN2         0x00000004  ///< ADC SS2 Enable
00124 #define ADC_ACTSS_ASEN1         0x00000002  ///< ADC SS1 Enable
00125 #define ADC_ACTSS_ASEN0         0x00000001  ///< ADC SS0 Enable
00126
00127
00128 /*
00129  * The following are defines for the bit fields in the ADC_O_RIS register.
00130  */
00131 #define ADC_RIS_INRDC           0x00010000  ///< Digital Comparator Raw Interrupt
00132
00133 #define ADC_RIS_INR3            0x00000008  ///< SS3 Raw Interrupt Status
00134 #define ADC_RIS_INR2            0x00000004  ///< SS2 Raw Interrupt Status
00135 #define ADC_RIS_INR1            0x00000002  ///< SS1 Raw Interrupt Status
00136 #define ADC_RIS_INR0            0x00000001  ///< SS0 Raw Interrupt Status
00137
00138
00139 /*
00140  * The following are defines for the bit fields in the ADC_O_IM register.
00141  */
00142 #define ADC_IM_DCONSS3          0x00080000  ///< Digital Comparator Interrupt on
00143
00144 #define ADC_IM_DCONSS2          0x00040000  ///< Digital Comparator Interrupt on
00145
00146 #define ADC_IM_DCONSS1          0x00020000  ///< Digital Comparator Interrupt on
00147
00148 #define ADC_IM_DCONSS0          0x00010000  ///< Digital Comparator Interrupt on
00149
00150 #define ADC_IM_MASK3            0x00000008  ///< SS3 Interrupt Mask
00151 #define ADC_IM_MASK2            0x00000004  ///< SS2 Interrupt Mask
00152 #define ADC_IM_MASK1            0x00000002  ///< SS1 Interrupt Mask
00153 #define ADC_IM_MASK0            0x00000001  ///< SS0 Interrupt Mask
00154
00155
00156 /*
00157  * The following are defines for the bit fields in the ADC_O_ISC register.
00158  */
00159 #define ADC_ISC_DCINSS3         0x00080000  ///< Digital Comparator Interrupt
00160
00161 #define ADC_ISC_DCINSS2         0x00040000  ///< Digital Comparator Interrupt
00162
00163 #define ADC_ISC_DCINSS1         0x00020000  ///< Digital Comparator Interrupt
00164
00165 #define ADC_ISC_DCINSS0         0x00010000  ///< Digital Comparator Interrupt
00166
00167 #define ADC_ISC_IN3             0x00000008  ///< SS3 Interrupt Status and Clear
00168 #define ADC_ISC_IN2             0x00000004  ///< SS2 Interrupt Status and Clear
00169 #define ADC_ISC_IN1             0x00000002  ///< SS1 Interrupt Status and Clear
00170 #define ADC_ISC_IN0             0x00000001  ///< SS0 Interrupt Status and Clear
00171
00172
00173 /*
00174  * The following are defines for the bit fields in the ADC_O_OSTAT register.
00175  */
00176 #define ADC_OSTAT_OV3           0x00000008  ///< SS3 FIFO Overflow
00177 #define ADC_OSTAT_OV2           0x00000004  ///< SS2 FIFO Overflow
00178 #define ADC_OSTAT_OV1           0x00000002  ///< SS1 FIFO Overflow
00179 #define ADC_OSTAT_OV0           0x00000001  ///< SS0 FIFO Overflow
00180
00181
00182 /*
00183  * The following are defines for the bit fields in the ADC_O_EMUX register.
00184  */
00185 #define ADC_EMUX_EM3_M          0x0000F000  ///< SS3 Trigger Select
00186 #define ADC_EMUX_EM3_PROCESSOR  0x00000000  ///< Processor (default)
00187 #define ADC_EMUX_EM3_COMP0      0x00001000  ///< Analog Comparator 0
00188 #define ADC_EMUX_EM3_COMP1      0x00002000  ///< Analog Comparator 1
00189 #define ADC_EMUX_EM3_COMP2      0x00003000  ///< Analog Comparator 2
00190 #define ADC_EMUX_EM3_EXTERNAL   0x00004000  ///< External (GPIO PB4)
00191 #define ADC_EMUX_EM3_TIMER      0x00005000  ///< Timer
00192 #define ADC_EMUX_EM3_PWM0       0x00006000  ///< PWM0
00193 #define ADC_EMUX_EM3_PWM1       0x00007000  ///< PWM1
00194 #define ADC_EMUX_EM3_PWM2       0x00008000  ///< PWM2
00195 #define ADC_EMUX_EM3_PWM3       0x00009000  ///< PWM3
00196 #define ADC_EMUX_EM3_ALWAYS     0x0000F000  ///< Always (continuously sample)
00197 #define ADC_EMUX_EM2_M          0x00000F00  ///< SS2 Trigger Select
00198 #define ADC_EMUX_EM2_PROCESSOR  0x00000000  ///< Processor (default)
00199 #define ADC_EMUX_EM2_COMP0      0x00000100  ///< Analog Comparator 0
00200 #define ADC_EMUX_EM2_COMP1      0x00000200  ///< Analog Comparator 1
00201 #define ADC_EMUX_EM2_COMP2      0x00000300  ///< Analog Comparator 2
00202 #define ADC_EMUX_EM2_EXTERNAL   0x00000400  ///< External (GPIO PB4)
00203 #define ADC_EMUX_EM2_TIMER      0x00000500  ///< Timer
00204 #define ADC_EMUX_EM2_PWM0       0x00000600  ///< PWM0
00205 #define ADC_EMUX_EM2_PWM1       0x00000700  ///< PWM1
00206 #define ADC_EMUX_EM2_PWM2       0x00000800  ///< PWM2
00207 #define ADC_EMUX_EM2_PWM3       0x00000900  ///< PWM3
00208 #define ADC_EMUX_EM2_ALWAYS     0x00000F00  ///< Always (continuously sample)
00209 #define ADC_EMUX_EM1_M          0x000000F0  ///< SS1 Trigger Select
00210 #define ADC_EMUX_EM1_PROCESSOR  0x00000000  ///< Processor (default)
00211 #define ADC_EMUX_EM1_COMP0      0x00000010  ///< Analog Comparator 0
00212 #define ADC_EMUX_EM1_COMP1      0x00000020  ///< Analog Comparator 1
00213 #define ADC_EMUX_EM1_COMP2      0x00000030  ///< Analog Comparator 2
00214 #define ADC_EMUX_EM1_EXTERNAL   0x00000040  ///< External (GPIO PB4)
00215 #define ADC_EMUX_EM1_TIMER      0x00000050  ///< Timer
00216 #define ADC_EMUX_EM1_PWM0       0x00000060  ///< PWM0
00217 #define ADC_EMUX_EM1_PWM1       0x00000070  ///< PWM1
00218 #define ADC_EMUX_EM1_PWM2       0x00000080  ///< PWM2
00219 #define ADC_EMUX_EM1_PWM3       0x00000090  ///< PWM3
00220 #define ADC_EMUX_EM1_ALWAYS     0x000000F0  ///< Always (continuously sample)
00221 #define ADC_EMUX_EM0_M          0x0000000F  ///< SS0 Trigger Select
00222 #define ADC_EMUX_EM0_PROCESSOR  0x00000000  ///< Processor (default)
00223 #define ADC_EMUX_EM0_COMP0      0x00000001  ///< Analog Comparator 0
00224 #define ADC_EMUX_EM0_COMP1      0x00000002  ///< Analog Comparator 1
00225 #define ADC_EMUX_EM0_COMP2      0x00000003  ///< Analog Comparator 2
00226 #define ADC_EMUX_EM0_EXTERNAL   0x00000004  ///< External (GPIO PB4)
00227 #define ADC_EMUX_EM0_TIMER      0x00000005  ///< Timer
00228 #define ADC_EMUX_EM0_PWM0       0x00000006  ///< PWM0
00229 #define ADC_EMUX_EM0_PWM1       0x00000007  ///< PWM1
00230 #define ADC_EMUX_EM0_PWM2       0x00000008  ///< PWM2
00231 #define ADC_EMUX_EM0_PWM3       0x00000009  ///< PWM3
00232 #define ADC_EMUX_EM0_ALWAYS     0x0000000F  ///< Always (continuously sample)
00233
00234
00235 /*
00236  * The following are defines for the bit fields in the ADC_O_USTAT register.
00237  */
00238 #define ADC_USTAT_UV3           0x00000008  ///< SS3 FIFO Underflow
00239 #define ADC_USTAT_UV2           0x00000004  ///< SS2 FIFO Underflow
00240 #define ADC_USTAT_UV1           0x00000002  ///< SS1 FIFO Underflow
00241 #define ADC_USTAT_UV0           0x00000001  ///< SS0 FIFO Underflow
00242
00243
00244 /*
00245  * The following are defines for the bit fields in the ADC_O_SSPRI register.
00246  */
00247 #define ADC_SSPRI_SS3_M         0x00003000  ///< SS3 Priority
00248 #define ADC_SSPRI_SS3_1ST       0x00000000  ///< First priority
00249 #define ADC_SSPRI_SS3_2ND       0x00001000  ///< Second priority
00250 #define ADC_SSPRI_SS3_3RD       0x00002000  ///< Third priority
00251 #define ADC_SSPRI_SS3_4TH       0x00003000  ///< Fourth priority
00252 #define ADC_SSPRI_SS2_M         0x00000300  ///< SS2 Priority
00253 #define ADC_SSPRI_SS2_1ST       0x00000000  ///< First priority
00254 #define ADC_SSPRI_SS2_2ND       0x00000100  ///< Second priority
00255 #define ADC_SSPRI_SS2_3RD       0x00000200  ///< Third priority
00256 #define ADC_SSPRI_SS2_4TH       0x00000300  ///< Fourth priority
00257 #define ADC_SSPRI_SS1_M         0x00000030  ///< SS1 Priority
00258 #define ADC_SSPRI_SS1_1ST       0x00000000  ///< First priority
00259 #define ADC_SSPRI_SS1_2ND       0x00000010  ///< Second priority
00260 #define ADC_SSPRI_SS1_3RD       0x00000020  ///< Third priority
00261 #define ADC_SSPRI_SS1_4TH       0x00000030  ///< Fourth priority
00262 #define ADC_SSPRI_SS0_M         0x00000003  ///< SS0 Priority
00263 #define ADC_SSPRI_SS0_1ST       0x00000000  ///< First priority
00264 #define ADC_SSPRI_SS0_2ND       0x00000001  ///< Second priority
00265 #define ADC_SSPRI_SS0_3RD       0x00000002  ///< Third priority
00266 #define ADC_SSPRI_SS0_4TH       0x00000003  ///< Fourth priority
00267
00268
00269 /*
00270  * The following are defines for the bit fields in the ADC_O_SPC register.
00271  */
00272
00273 #define ADC_SPC_PHASE_M         0x0000000F  ///< Phase Difference
00274 #define ADC_SPC_PHASE_0         0x00000000  ///< ADC sample lags by 0.0
00275 #define ADC_SPC_PHASE_22_5      0x00000001  ///< ADC sample lags by 22.5
00276 #define ADC_SPC_PHASE_45        0x00000002  ///< ADC sample lags by 45.0
00277 #define ADC_SPC_PHASE_67_5      0x00000003  ///< ADC sample lags by 67.5
00278 #define ADC_SPC_PHASE_90        0x00000004  ///< ADC sample lags by 90.0
00279 #define ADC_SPC_PHASE_112_5     0x00000005  ///< ADC sample lags by 112.5
00280 #define ADC_SPC_PHASE_135       0x00000006  ///< ADC sample lags by 135.0
00281 #define ADC_SPC_PHASE_157_5     0x00000007  ///< ADC sample lags by 157.5
00282 #define ADC_SPC_PHASE_180       0x00000008  ///< ADC sample lags by 180.0
00283 #define ADC_SPC_PHASE_202_5     0x00000009  ///< ADC sample lags by 202.5
00284 #define ADC_SPC_PHASE_225       0x0000000A  ///< ADC sample lags by 225.0
00285 #define ADC_SPC_PHASE_247_5     0x0000000B  ///< ADC sample lags by 247.5
00286 #define ADC_SPC_PHASE_270       0x0000000C  ///< ADC sample lags by 270.0
00287 #define ADC_SPC_PHASE_292_5     0x0000000D  ///< ADC sample lags by 292.5
00288 #define ADC_SPC_PHASE_315       0x0000000E  ///< ADC sample lags by 315.0
00289 #define ADC_SPC_PHASE_337_5     0x0000000F  ///< ADC sample lags by 337.5
00290
00291
00292 /*
00293  * The following are defines for the bit fields in the ADC_O_PSSI register.
00294  */
00295 #define ADC_PSSI_GSYNC          0x80000000  ///< Global Synchronize
00296 #define ADC_PSSI_SYNCWAIT       0x08000000  ///< Synchronize Wait
00297 #define ADC_PSSI_SS3            0x00000008  ///< SS3 Initiate
00298 #define ADC_PSSI_SS2            0x00000004  ///< SS2 Initiate
00299 #define ADC_PSSI_SS1            0x00000002  ///< SS1 Initiate
00300 #define ADC_PSSI_SS0            0x00000001  ///< SS0 Initiate
00301
00302
00303 /*
00304  * The following are defines for the bit fields in the ADC_O_SAC register.
00305  */
00306 #define ADC_SAC_AVG_M           0x00000007  ///< Hardware Averaging Control
00307 #define ADC_SAC_AVG_OFF         0x00000000  ///< No hardware oversampling
00308 #define ADC_SAC_AVG_2X          0x00000001  ///< 2x hardware oversampling
00309 #define ADC_SAC_AVG_4X          0x00000002  ///< 4x hardware oversampling
00310 #define ADC_SAC_AVG_8X          0x00000003  ///< 8x hardware oversampling
00311 #define ADC_SAC_AVG_16X         0x00000004  ///< 16x hardware oversampling
00312 #define ADC_SAC_AVG_32X         0x00000005  ///< 32x hardware oversampling
00313 #define ADC_SAC_AVG_64X         0x00000006  ///< 64x hardware oversampling
00314
00315
00316 /*
00317  * The following are defines for the bit fields in the ADC_O_DCISC register.
00318  */
00319 #define ADC_DCISC_DCINT7        0x00000080  ///< Digital Comparator 7 Interrupt
00320
00321 #define ADC_DCISC_DCINT6        0x00000040  ///< Digital Comparator 6 Interrupt
00322
00323 #define ADC_DCISC_DCINT5        0x00000020  ///< Digital Comparator 5 Interrupt
00324
00325 #define ADC_DCISC_DCINT4        0x00000010  ///< Digital Comparator 4 Interrupt
00326
00327 #define ADC_DCISC_DCINT3        0x00000008  ///< Digital Comparator 3 Interrupt
00328
00329 #define ADC_DCISC_DCINT2        0x00000004  ///< Digital Comparator 2 Interrupt
00330
00331 #define ADC_DCISC_DCINT1        0x00000002  ///< Digital Comparator 1 Interrupt
00332
00333 #define ADC_DCISC_DCINT0        0x00000001  ///< Digital Comparator 0 Interrupt
00334
00335
00336
00337 /*
00338  * The following are defines for the bit fields in the ADC_O_CTL register.
00339  */
00340 #define ADC_CTL_VREF            0x00000001  ///< Voltage Reference Select
00341
00342
00343
00347 /*\{*/
00348 #define ADC_ACTSS_ASEN3         0x00000008  ///< ADC SS3 Enable
00349 #define ADC_ACTSS_ASEN2         0x00000004  ///< ADC SS2 Enable
00350 #define ADC_ACTSS_ASEN1         0x00000002  ///< ADC SS1 Enable
00351 #define ADC_ACTSS_ASEN0         0x00000001  ///< ADC SS0 Enable
00352 /*\}*/
00353
00357 /*\{*/
00358 #define ADC_RIS_INR3            0x00000008  ///< SS3 Raw Interrupt Status
00359 #define ADC_RIS_INR2            0x00000004  ///< SS2 Raw Interrupt Status
00360 #define ADC_RIS_INR1            0x00000002  ///< SS1 Raw Interrupt Status
00361 #define ADC_RIS_INR0            0x00000001  ///< SS0 Raw Interrupt Status
00362 /*\}*/
00363
00367 /*\{*/
00368 #define ADC_IM_MASK3            0x00000008  ///< SS3 Interrupt Mask
00369 #define ADC_IM_MASK2            0x00000004  ///< SS2 Interrupt Mask
00370 #define ADC_IM_MASK1            0x00000002  ///< SS1 Interrupt Mask
00371 #define ADC_IM_MASK0            0x00000001  ///< SS0 Interrupt Mask
00372 /*\}*/
00373
00377 /*\{*/
00378 #define ADC_ISC_IN3             0x00000008  ///< SS3 Interrupt Status and Clear
00379 #define ADC_ISC_IN2             0x00000004  ///< SS2 Interrupt Status and Clear
00380 #define ADC_ISC_IN1             0x00000002  ///< SS1 Interrupt Status and Clear
00381 #define ADC_ISC_IN0             0x00000001  ///< SS0 Interrupt Status and Clear
00382 /*\}*/
00383
00387 /*\{*/
00388 #define ADC_OSTAT_OV3           0x00000008  ///< SS3 FIFO Overflow
00389 #define ADC_OSTAT_OV2           0x00000004  ///< SS2 FIFO Overflow
00390 #define ADC_OSTAT_OV1           0x00000002  ///< SS1 FIFO Overflow
00391 #define ADC_OSTAT_OV0           0x00000001  ///< SS0 FIFO Overflow
00392 /*\}*/
00393
00397 /*\{*/
00398 #define ADC_EMUX_EM3_M          0x0000F000  ///< SS3 Trigger Select
00399 #define ADC_EMUX_EM3_PROCESSOR  0x00000000  ///< Processor (default)
00400 #define ADC_EMUX_EM3_COMP0      0x00001000  ///< Analog Comparator 0
00401 #define ADC_EMUX_EM3_COMP1      0x00002000  ///< Analog Comparator 1
00402 #define ADC_EMUX_EM3_COMP2      0x00003000  ///< Analog Comparator 2
00403 #define ADC_EMUX_EM3_EXTERNAL   0x00004000  ///< External (GPIO PB4)
00404 #define ADC_EMUX_EM3_TIMER      0x00005000  ///< Timer
00405 #define ADC_EMUX_EM3_PWM0       0x00006000  ///< PWM0
00406 #define ADC_EMUX_EM3_PWM1       0x00007000  ///< PWM1
00407 #define ADC_EMUX_EM3_PWM2       0x00008000  ///< PWM2
00408 #define ADC_EMUX_EM3_ALWAYS     0x0000F000  ///< Always (continuously sample)
00409 #define ADC_EMUX_EM2_M          0x00000F00  ///< SS2 Trigger Select
00410 #define ADC_EMUX_EM2_PROCESSOR  0x00000000  ///< Processor (default)
00411 #define ADC_EMUX_EM2_COMP0      0x00000100  ///< Analog Comparator 0
00412 #define ADC_EMUX_EM2_COMP1      0x00000200  ///< Analog Comparator 1
00413 #define ADC_EMUX_EM2_COMP2      0x00000300  ///< Analog Comparator 2
00414 #define ADC_EMUX_EM2_EXTERNAL   0x00000400  ///< External (GPIO PB4)
00415 #define ADC_EMUX_EM2_TIMER      0x00000500  ///< Timer
00416 #define ADC_EMUX_EM2_PWM0       0x00000600  ///< PWM0
00417 #define ADC_EMUX_EM2_PWM1       0x00000700  ///< PWM1
00418 #define ADC_EMUX_EM2_PWM2       0x00000800  ///< PWM2
00419 #define ADC_EMUX_EM2_ALWAYS     0x00000F00  ///< Always (continuously sample)
00420 #define ADC_EMUX_EM1_M          0x000000F0  ///< SS1 Trigger Select
00421 #define ADC_EMUX_EM1_PROCESSOR  0x00000000  ///< Processor (default)
00422 #define ADC_EMUX_EM1_COMP0      0x00000010  ///< Analog Comparator 0
00423 #define ADC_EMUX_EM1_COMP1      0x00000020  ///< Analog Comparator 1
00424 #define ADC_EMUX_EM1_COMP2      0x00000030  ///< Analog Comparator 2
00425 #define ADC_EMUX_EM1_EXTERNAL   0x00000040  ///< External (GPIO PB4)
00426 #define ADC_EMUX_EM1_TIMER      0x00000050  ///< Timer
00427 #define ADC_EMUX_EM1_PWM0       0x00000060  ///< PWM0
00428 #define ADC_EMUX_EM1_PWM1       0x00000070  ///< PWM1
00429 #define ADC_EMUX_EM1_PWM2       0x00000080  ///< PWM2
00430 #define ADC_EMUX_EM1_ALWAYS     0x000000F0  ///< Always (continuously sample)
00431 #define ADC_EMUX_EM0_M          0x0000000F  ///< SS0 Trigger Select
00432 #define ADC_EMUX_EM0_PROCESSOR  0x00000000  ///< Processor (default)
00433 #define ADC_EMUX_EM0_COMP0      0x00000001  ///< Analog Comparator 0
00434 #define ADC_EMUX_EM0_COMP1      0x00000002  ///< Analog Comparator 1
00435 #define ADC_EMUX_EM0_COMP2      0x00000003  ///< Analog Comparator 2
00436 #define ADC_EMUX_EM0_EXTERNAL   0x00000004  ///< External (GPIO PB4)
00437 #define ADC_EMUX_EM0_TIMER      0x00000005  ///< Timer
00438 #define ADC_EMUX_EM0_PWM0       0x00000006  ///< PWM0
00439 #define ADC_EMUX_EM0_PWM1       0x00000007  ///< PWM1
00440 #define ADC_EMUX_EM0_PWM2       0x00000008  ///< PWM2
00441 #define ADC_EMUX_EM0_ALWAYS     0x0000000F  ///< Always (continuously sample)
00442 /*\}*/
00443
00447 /*\{*/
00448 #define ADC_USTAT_UV3           0x00000008  ///< SS3 FIFO Underflow
00449 #define ADC_USTAT_UV2           0x00000004  ///< SS2 FIFO Underflow
00450 #define ADC_USTAT_UV1           0x00000002  ///< SS1 FIFO Underflow
00451 #define ADC_USTAT_UV0           0x00000001  ///< SS0 FIFO Underflow
00452 /*\}*/
00453
00457 /*\{*/
00458 #define ADC_SSPRI_SS3_M         0x00003000  ///< SS3 Priority
00459 #define ADC_SSPRI_SS3_1ST       0x00000000  ///< First priority
00460 #define ADC_SSPRI_SS3_2ND       0x00001000  ///< Second priority
00461 #define ADC_SSPRI_SS3_3RD       0x00002000  ///< Third priority
00462 #define ADC_SSPRI_SS3_4TH       0x00003000  ///< Fourth priority
00463 #define ADC_SSPRI_SS2_M         0x00000300  ///< SS2 Priority
00464 #define ADC_SSPRI_SS2_1ST       0x00000000  ///< First priority
00465 #define ADC_SSPRI_SS2_2ND       0x00000100  ///< Second priority
00466 #define ADC_SSPRI_SS2_3RD       0x00000200  ///< Third priority
00467 #define ADC_SSPRI_SS2_4TH       0x00000300  ///< Fourth priority
00468 #define ADC_SSPRI_SS1_M         0x00000030  ///< SS1 Priority
00469 #define ADC_SSPRI_SS1_1ST       0x00000000  ///< First priority
00470 #define ADC_SSPRI_SS1_2ND       0x00000010  ///< Second priority
00471 #define ADC_SSPRI_SS1_3RD       0x00000020  ///< Third priority
00472 #define ADC_SSPRI_SS1_4TH       0x00000030  ///< Fourth priority
00473 #define ADC_SSPRI_SS0_M         0x00000003  ///< SS0 Priority
00474 #define ADC_SSPRI_SS0_1ST       0x00000000  ///< First priority
00475 #define ADC_SSPRI_SS0_2ND       0x00000001  ///< Second priority
00476 #define ADC_SSPRI_SS0_3RD       0x00000002  ///< Third priority
00477 #define ADC_SSPRI_SS0_4TH       0x00000003  ///< Fourth priority
00478 /*\}*/
00479
00483 /*\{*/
00484 #define ADC_PSSI_SS3            0x00000008  ///< SS3 Initiate
00485 #define ADC_PSSI_SS2            0x00000004  ///< SS2 Initiate
00486 #define ADC_PSSI_SS1            0x00000002  ///< SS1 Initiate
00487 #define ADC_PSSI_SS0            0x00000001  ///< SS0 Initiate
00488 /*\}*/
00489
00493 /*\{*/
00494 #define ADC_SAC_AVG_M           0x00000007  ///< Hardware Averaging Control
00495 #define ADC_SAC_AVG_OFF         0x00000000  ///< No hardware oversampling
00496 #define ADC_SAC_AVG_2X          0x00000001  ///< 2x hardware oversampling
00497 #define ADC_SAC_AVG_4X          0x00000002  ///< 4x hardware oversampling
00498 #define ADC_SAC_AVG_8X          0x00000003  ///< 8x hardware oversampling
00499 #define ADC_SAC_AVG_16X         0x00000004  ///< 16x hardware oversampling
00500 #define ADC_SAC_AVG_32X         0x00000005  ///< 32x hardware oversampling
00501 #define ADC_SAC_AVG_64X         0x00000006  ///< 64x hardware oversampling
00502 /*\}*/
00503
00507 /*\{*/
00508 #define ADC_SSMUX0_MUX7_M       0x70000000  ///< 8th Sample Input Select
00509 #define ADC_SSMUX0_MUX6_M       0x07000000  ///< 7th Sample Input Select
00510 #define ADC_SSMUX0_MUX5_M       0x00700000  ///< 6th Sample Input Select
00511 #define ADC_SSMUX0_MUX4_M       0x00070000  ///< 5th Sample Input Select
00512 #define ADC_SSMUX0_MUX3_M       0x00007000  ///< 4th Sample Input Select
00513 #define ADC_SSMUX0_MUX2_M       0x00000700  ///< 3rd Sample Input Select
00514 #define ADC_SSMUX0_MUX1_M       0x00000070  ///< 2nd Sample Input Select
00515 #define ADC_SSMUX0_MUX0_M       0x00000007  ///< 1st Sample Input Select
00516 #define ADC_SSMUX0_MUX7_S       28
00517 #define ADC_SSMUX0_MUX6_S       24
00518 #define ADC_SSMUX0_MUX5_S       20
00519 #define ADC_SSMUX0_MUX4_S       16
00520 #define ADC_SSMUX0_MUX3_S       12
00521 #define ADC_SSMUX0_MUX2_S       8
00522 #define ADC_SSMUX0_MUX1_S       4
00523 #define ADC_SSMUX0_MUX0_S       0
00524 /*\}*/
00525
00529 /*\{*/
00530 #define ADC_SSCTL0_TS7          0x80000000  ///< 8th Sample Temp Sensor Select
00531 #define ADC_SSCTL0_IE7          0x40000000  ///< 8th Sample Interrupt Enable
00532 #define ADC_SSCTL0_END7         0x20000000  ///< 8th Sample is End of Sequence
00533 #define ADC_SSCTL0_D7           0x10000000  ///< 8th Sample Diff Input Select
00534 #define ADC_SSCTL0_TS6          0x08000000  ///< 7th Sample Temp Sensor Select
00535 #define ADC_SSCTL0_IE6          0x04000000  ///< 7th Sample Interrupt Enable
00536 #define ADC_SSCTL0_END6         0x02000000  ///< 7th Sample is End of Sequence
00537 #define ADC_SSCTL0_D6           0x01000000  ///< 7th Sample Diff Input Select
00538 #define ADC_SSCTL0_TS5          0x00800000  ///< 6th Sample Temp Sensor Select
00539 #define ADC_SSCTL0_IE5          0x00400000  ///< 6th Sample Interrupt Enable
00540 #define ADC_SSCTL0_END5         0x00200000  ///< 6th Sample is End of Sequence
00541 #define ADC_SSCTL0_D5           0x00100000  ///< 6th Sample Diff Input Select
00542 #define ADC_SSCTL0_TS4          0x00080000  ///< 5th Sample Temp Sensor Select
00543 #define ADC_SSCTL0_IE4          0x00040000  ///< 5th Sample Interrupt Enable
00544 #define ADC_SSCTL0_END4         0x00020000  ///< 5th Sample is End of Sequence
00545 #define ADC_SSCTL0_D4           0x00010000  ///< 5th Sample Diff Input Select
00546 #define ADC_SSCTL0_TS3          0x00008000  ///< 4th Sample Temp Sensor Select
00547 #define ADC_SSCTL0_IE3          0x00004000  ///< 4th Sample Interrupt Enable
00548 #define ADC_SSCTL0_END3         0x00002000  ///< 4th Sample is End of Sequence
00549 #define ADC_SSCTL0_D3           0x00001000  ///< 4th Sample Diff Input Select
00550 #define ADC_SSCTL0_TS2          0x00000800  ///< 3rd Sample Temp Sensor Select
00551 #define ADC_SSCTL0_IE2          0x00000400  ///< 3rd Sample Interrupt Enable
00552 #define ADC_SSCTL0_END2         0x00000200  ///< 3rd Sample is End of Sequence
00553 #define ADC_SSCTL0_D2           0x00000100  ///< 3rd Sample Diff Input Select
00554 #define ADC_SSCTL0_TS1          0x00000080  ///< 2nd Sample Temp Sensor Select
00555 #define ADC_SSCTL0_IE1          0x00000040  ///< 2nd Sample Interrupt Enable
00556 #define ADC_SSCTL0_END1         0x00000020  ///< 2nd Sample is End of Sequence
00557 #define ADC_SSCTL0_D1           0x00000010  ///< 2nd Sample Diff Input Select
00558 #define ADC_SSCTL0_TS0          0x00000008  ///< 1st Sample Temp Sensor Select
00559 #define ADC_SSCTL0_IE0          0x00000004  ///< 1st Sample Interrupt Enable
00560 #define ADC_SSCTL0_END0         0x00000002  ///< 1st Sample is End of Sequence
00561 #define ADC_SSCTL0_D0           0x00000001  ///< 1st Sample Diff Input Select
00562 /*\}*/
00563
00567 /*\{*/
00568 #define ADC_SSFIFO0_DATA_M      0x000003FF  ///< Conversion Result Data
00569 #define ADC_SSFIFO0_DATA_S      0
00570 /*\}*/
00571
00575 /*\{*/
00576 #define ADC_SSFSTAT0_FULL       0x00001000  ///< FIFO Full
00577 #define ADC_SSFSTAT0_EMPTY      0x00000100  ///< FIFO Empty
00578 #define ADC_SSFSTAT0_HPTR_M     0x000000F0  ///< FIFO Head Pointer
00579 #define ADC_SSFSTAT0_TPTR_M     0x0000000F  ///< FIFO Tail Pointer
00580 #define ADC_SSFSTAT0_HPTR_S     4
00581 #define ADC_SSFSTAT0_TPTR_S     0
00582 /*\}*/
00583
00587 /*\{*/
00588 #define ADC_SSMUX1_MUX3_M       0x00007000  ///< 4th Sample Input Select
00589 #define ADC_SSMUX1_MUX2_M       0x00000700  ///< 3rd Sample Input Select
00590 #define ADC_SSMUX1_MUX1_M       0x00000070  ///< 2nd Sample Input Select
00591 #define ADC_SSMUX1_MUX0_M       0x00000007  ///< 1st Sample Input Select
00592 #define ADC_SSMUX1_MUX3_S       12
00593 #define ADC_SSMUX1_MUX2_S       8
00594 #define ADC_SSMUX1_MUX1_S       4
00595 #define ADC_SSMUX1_MUX0_S       0
00596 /*\}*/
00597
00601 /*\{*/
00602 #define ADC_SSCTL1_TS3          0x00008000  ///< 4th Sample Temp Sensor Select
00603 #define ADC_SSCTL1_IE3          0x00004000  ///< 4th Sample Interrupt Enable
00604 #define ADC_SSCTL1_END3         0x00002000  ///< 4th Sample is End of Sequence
00605 #define ADC_SSCTL1_D3           0x00001000  ///< 4th Sample Diff Input Select
00606 #define ADC_SSCTL1_TS2          0x00000800  ///< 3rd Sample Temp Sensor Select
00607 #define ADC_SSCTL1_IE2          0x00000400  ///< 3rd Sample Interrupt Enable
00608 #define ADC_SSCTL1_END2         0x00000200  ///< 3rd Sample is End of Sequence
00609 #define ADC_SSCTL1_D2           0x00000100  ///< 3rd Sample Diff Input Select
00610 #define ADC_SSCTL1_TS1          0x00000080  ///< 2nd Sample Temp Sensor Select
00611 #define ADC_SSCTL1_IE1          0x00000040  ///< 2nd Sample Interrupt Enable
00612 #define ADC_SSCTL1_END1         0x00000020  ///< 2nd Sample is End of Sequence
00613 #define ADC_SSCTL1_D1           0x00000010  ///< 2nd Sample Diff Input Select
00614 #define ADC_SSCTL1_TS0          0x00000008  ///< 1st Sample Temp Sensor Select
00615 #define ADC_SSCTL1_IE0          0x00000004  ///< 1st Sample Interrupt Enable
00616 #define ADC_SSCTL1_END0         0x00000002  ///< 1st Sample is End of Sequence
00617 #define ADC_SSCTL1_D0           0x00000001  ///< 1st Sample Diff Input Select
00618 /*\}*/
00619
00623 /*\{*/
00624 #define ADC_SSFIFO1_DATA_M      0x000003FF  ///< Conversion Result Data
00625 #define ADC_SSFIFO1_DATA_S      0
00626 /*\}*/
00627
00631 /*\{*/
00632 #define ADC_SSFSTAT1_FULL       0x00001000  ///< FIFO Full
00633 #define ADC_SSFSTAT1_EMPTY      0x00000100  ///< FIFO Empty
00634 #define ADC_SSFSTAT1_HPTR_M     0x000000F0  ///< FIFO Head Pointer
00635 #define ADC_SSFSTAT1_TPTR_M     0x0000000F  ///< FIFO Tail Pointer
00636 #define ADC_SSFSTAT1_HPTR_S     4
00637 #define ADC_SSFSTAT1_TPTR_S     0
00638 /*\}*/
00639
00640
00644 /*\{*/
00645 #define ADC_SSCTL2_TS3          0x00008000  ///< 4th Sample Temp Sensor Select
00646 #define ADC_SSCTL2_IE3          0x00004000  ///< 4th Sample Interrupt Enable
00647 #define ADC_SSCTL2_END3         0x00002000  ///< 4th Sample is End of Sequence
00648 #define ADC_SSCTL2_D3           0x00001000  ///< 4th Sample Diff Input Select
00649 #define ADC_SSCTL2_TS2          0x00000800  ///< 3rd Sample Temp Sensor Select
00650 #define ADC_SSCTL2_IE2          0x00000400  ///< 3rd Sample Interrupt Enable
00651 #define ADC_SSCTL2_END2         0x00000200  ///< 3rd Sample is End of Sequence
00652 #define ADC_SSCTL2_D2           0x00000100  ///< 3rd Sample Diff Input Select
00653 #define ADC_SSCTL2_TS1          0x00000080  ///< 2nd Sample Temp Sensor Select
00654 #define ADC_SSCTL2_IE1          0x00000040  ///< 2nd Sample Interrupt Enable
00655 #define ADC_SSCTL2_END1         0x00000020  ///< 2nd Sample is End of Sequence
00656 #define ADC_SSCTL2_D1           0x00000010  ///< 2nd Sample Diff Input Select
00657 #define ADC_SSCTL2_TS0          0x00000008  ///< 1st Sample Temp Sensor Select
00658 #define ADC_SSCTL2_IE0          0x00000004  ///< 1st Sample Interrupt Enable
00659 #define ADC_SSCTL2_END0         0x00000002  ///< 1st Sample is End of Sequence
00660 #define ADC_SSCTL2_D0           0x00000001  ///< 1st Sample Diff Input Select
00661 /*\}*/
00662
00666 /*\{*/
00667 #define ADC_SSFIFO2_DATA_M      0x000003FF  ///< Conversion Result Data
00668 #define ADC_SSFIFO2_DATA_S      0
00669 /*\}*/
00670
00674 /*\{*/
00675 #define ADC_SSFSTAT2_FULL       0x00001000  ///< FIFO Full
00676 #define ADC_SSFSTAT2_EMPTY      0x00000100  ///< FIFO Empty
00677 #define ADC_SSFSTAT2_HPTR_M     0x000000F0  ///< FIFO Head Pointer
00678 #define ADC_SSFSTAT2_TPTR_M     0x0000000F  ///< FIFO Tail Pointer
00679 #define ADC_SSFSTAT2_HPTR_S     4
00680 #define ADC_SSFSTAT2_TPTR_S     0
00681 /*\}*/
00682
00686 /*\{*/
00687 #define ADC_SSCTL3_TS0          0x00000008  ///< 1st Sample Temp Sensor Select
00688 #define ADC_SSCTL3_IE0          0x00000004  ///< 1st Sample Interrupt Enable
00689 #define ADC_SSCTL3_END0         0x00000002  ///< 1st Sample is End of Sequence
00690 #define ADC_SSCTL3_D0           0x00000001  ///< 1st Sample Diff Input Select
00691 /*\}*/
00692
00696 /*\{*/
00697 #define ADC_SSFIFO3_DATA_M      0x000003FF  ///< Conversion Result Data
00698 #define ADC_SSFIFO3_DATA_S      0
00699 /*\}*/
00700
00704 /*\{*/
00705 #define ADC_SSFSTAT3_FULL       0x00001000  ///< FIFO Full
00706 #define ADC_SSFSTAT3_EMPTY      0x00000100  ///< FIFO Empty
00707 #define ADC_SSFSTAT3_HPTR_M     0x000000F0  ///< FIFO Head Pointer
00708 #define ADC_SSFSTAT3_TPTR_M     0x0000000F  ///< FIFO Tail Pointer
00709 #define ADC_SSFSTAT3_HPTR_S     4
00710 #define ADC_SSFSTAT3_TPTR_S     0
00711 /*\}*/
00712
00716 /*\{*/
00717 #define ADC_TMLB_LB             0x00000001  ///< Loopback Mode Enable
00718 /*\}*/
00719
00724 /*\{*/
00725 #define ADC_SSFIFO_TMLB_CNT_M   0x000003C0  ///< Continuous Sample Counter
00726 #define ADC_SSFIFO_TMLB_CONT    0x00000020  ///< Continuation Sample Indicator
00727 #define ADC_SSFIFO_TMLB_DIFF    0x00000010  ///< Differential Sample Indicator
00728 #define ADC_SSFIFO_TMLB_TS      0x00000008  ///< Temp Sensor Sample Indicator
00729 #define ADC_SSFIFO_TMLB_MUX_M   0x00000007  ///< Analog Input Indicator
00730 #define ADC_SSFIFO_TMLB_CNT_S   6           ///< Sample counter shift
00731 #define ADC_SSFIFO_TMLB_MUX_S   0           ///< Input channel number shift
00732 /*\}*/
00733
00734
00735 /*
00736  * The following are defines for the bit fields in the ADC_O_SSMUX0 register.
00737  */
00738 #define ADC_SSMUX0_MUX7_S       28
00739 #define ADC_SSMUX0_MUX6_S       24
00740 #define ADC_SSMUX0_MUX5_S       20
00741 #define ADC_SSMUX0_MUX4_S       16
00742 #define ADC_SSMUX0_MUX3_S       12
00743 #define ADC_SSMUX0_MUX2_S       8
00744 #define ADC_SSMUX0_MUX1_S       4
00745 #define ADC_SSMUX0_MUX0_S       0
00746
00747
00748 /*
00749  * The following are defines for the bit fields in the ADC_O_SSCTL0 register.
00750  */
00751 #define ADC_SSCTL0_TS7          0x80000000  ///< 8th Sample Temp Sensor Select
00752 #define ADC_SSCTL0_IE7          0x40000000  ///< 8th Sample Interrupt Enable
00753 #define ADC_SSCTL0_END7         0x20000000  ///< 8th Sample is End of Sequence
00754 #define ADC_SSCTL0_D7           0x10000000  ///< 8th Sample Diff Input Select
00755 #define ADC_SSCTL0_TS6          0x08000000  ///< 7th Sample Temp Sensor Select
00756 #define ADC_SSCTL0_IE6          0x04000000  ///< 7th Sample Interrupt Enable
00757 #define ADC_SSCTL0_END6         0x02000000  ///< 7th Sample is End of Sequence
00758 #define ADC_SSCTL0_D6           0x01000000  ///< 7th Sample Diff Input Select
00759 #define ADC_SSCTL0_TS5          0x00800000  ///< 6th Sample Temp Sensor Select
00760 #define ADC_SSCTL0_IE5          0x00400000  ///< 6th Sample Interrupt Enable
00761 #define ADC_SSCTL0_END5         0x00200000  ///< 6th Sample is End of Sequence
00762 #define ADC_SSCTL0_D5           0x00100000  ///< 6th Sample Diff Input Select
00763 #define ADC_SSCTL0_TS4          0x00080000  ///< 5th Sample Temp Sensor Select
00764 #define ADC_SSCTL0_IE4          0x00040000  ///< 5th Sample Interrupt Enable
00765 #define ADC_SSCTL0_END4         0x00020000  ///< 5th Sample is End of Sequence
00766 #define ADC_SSCTL0_D4           0x00010000  ///< 5th Sample Diff Input Select
00767 #define ADC_SSCTL0_TS3          0x00008000  ///< 4th Sample Temp Sensor Select
00768 #define ADC_SSCTL0_IE3          0x00004000  ///< 4th Sample Interrupt Enable
00769 #define ADC_SSCTL0_END3         0x00002000  ///< 4th Sample is End of Sequence
00770 #define ADC_SSCTL0_D3           0x00001000  ///< 4th Sample Diff Input Select
00771 #define ADC_SSCTL0_TS2          0x00000800  ///< 3rd Sample Temp Sensor Select
00772 #define ADC_SSCTL0_IE2          0x00000400  ///< 3rd Sample Interrupt Enable
00773 #define ADC_SSCTL0_END2         0x00000200  ///< 3rd Sample is End of Sequence
00774 #define ADC_SSCTL0_D2           0x00000100  ///< 3rd Sample Diff Input Select
00775 #define ADC_SSCTL0_TS1          0x00000080  ///< 2nd Sample Temp Sensor Select
00776 #define ADC_SSCTL0_IE1          0x00000040  ///< 2nd Sample Interrupt Enable
00777 #define ADC_SSCTL0_END1         0x00000020  ///< 2nd Sample is End of Sequence
00778 #define ADC_SSCTL0_D1           0x00000010  ///< 2nd Sample Diff Input Select
00779 #define ADC_SSCTL0_TS0          0x00000008  ///< 1st Sample Temp Sensor Select
00780 #define ADC_SSCTL0_IE0          0x00000004  ///< 1st Sample Interrupt Enable
00781 #define ADC_SSCTL0_END0         0x00000002  ///< 1st Sample is End of Sequence
00782 #define ADC_SSCTL0_D0           0x00000001  ///< 1st Sample Diff Input Select
00783
00784
00785 /*
00786  * The following are defines for the bit fields in the ADC_O_SSFIFO0 register.
00787  */
00788 #define ADC_SSFIFO0_DATA_M      0x000003FF  ///< Conversion Result Data
00789 #define ADC_SSFIFO0_DATA_S      0
00790
00791
00792 /*
00793  * The following are defines for the bit fields in the ADC_O_SSFSTAT0 register.
00794  */
00795 #define ADC_SSFSTAT0_FULL       0x00001000  ///< FIFO Full
00796 #define ADC_SSFSTAT0_EMPTY      0x00000100  ///< FIFO Empty
00797 #define ADC_SSFSTAT0_HPTR_M     0x000000F0  ///< FIFO Head Pointer
00798 #define ADC_SSFSTAT0_TPTR_M     0x0000000F  ///< FIFO Tail Pointer
00799 #define ADC_SSFSTAT0_HPTR_S     4
00800 #define ADC_SSFSTAT0_TPTR_S     0
00801
00802
00803 /*
00804  * The following are defines for the bit fields in the ADC_O_SSOP0 register.
00805  */
00806 #define ADC_SSOP0_S7DCOP        0x10000000  ///< Sample 7 Digital Comparator
00807
00808 #define ADC_SSOP0_S6DCOP        0x01000000  ///< Sample 6 Digital Comparator
00809
00810 #define ADC_SSOP0_S5DCOP        0x00100000  ///< Sample 5 Digital Comparator
00811
00812 #define ADC_SSOP0_S4DCOP        0x00010000  ///< Sample 4 Digital Comparator
00813
00814 #define ADC_SSOP0_S3DCOP        0x00001000  ///< Sample 3 Digital Comparator
00815
00816 #define ADC_SSOP0_S2DCOP        0x00000100  ///< Sample 2 Digital Comparator
00817
00818 #define ADC_SSOP0_S1DCOP        0x00000010  ///< Sample 1 Digital Comparator
00819
00820 #define ADC_SSOP0_S0DCOP        0x00000001  ///< Sample 0 Digital Comparator
00821
00822
00823
00824 /*
00825  * The following are defines for the bit fields in the ADC_O_SSDC0 register.
00826  */
00827 #define ADC_SSDC0_S7DCSEL_M     0xF0000000  ///< Sample 7 Digital Comparator
00828
00829 #define ADC_SSDC0_S6DCSEL_M     0x0F000000  ///< Sample 6 Digital Comparator
00830
00831 #define ADC_SSDC0_S5DCSEL_M     0x00F00000  ///< Sample 5 Digital Comparator
00832
00833 #define ADC_SSDC0_S4DCSEL_M     0x000F0000  ///< Sample 4 Digital Comparator
00834
00835 #define ADC_SSDC0_S3DCSEL_M     0x0000F000  ///< Sample 3 Digital Comparator
00836
00837 #define ADC_SSDC0_S2DCSEL_M     0x00000F00  ///< Sample 2 Digital Comparator
00838
00839 #define ADC_SSDC0_S1DCSEL_M     0x000000F0  ///< Sample 1 Digital Comparator
00840
00841 #define ADC_SSDC0_S0DCSEL_M     0x0000000F  ///< Sample 0 Digital Comparator
00842
00843 #define ADC_SSDC0_S6DCSEL_S     24
00844 #define ADC_SSDC0_S5DCSEL_S     20
00845 #define ADC_SSDC0_S4DCSEL_S     16
00846 #define ADC_SSDC0_S3DCSEL_S     12
00847 #define ADC_SSDC0_S2DCSEL_S     8
00848 #define ADC_SSDC0_S1DCSEL_S     4
00849 #define ADC_SSDC0_S0DCSEL_S     0
00850
00851
00852 /*
00853  * The following are defines for the bit fields in the ADC_O_SSCTL1 register.
00854  */
00855 #define ADC_SSCTL1_TS3          0x00008000  ///< 4th Sample Temp Sensor Select
00856 #define ADC_SSCTL1_IE3          0x00004000  ///< 4th Sample Interrupt Enable
00857 #define ADC_SSCTL1_END3         0x00002000  ///< 4th Sample is End of Sequence
00858 #define ADC_SSCTL1_D3           0x00001000  ///< 4th Sample Diff Input Select
00859 #define ADC_SSCTL1_TS2          0x00000800  ///< 3rd Sample Temp Sensor Select
00860 #define ADC_SSCTL1_IE2          0x00000400  ///< 3rd Sample Interrupt Enable
00861 #define ADC_SSCTL1_END2         0x00000200  ///< 3rd Sample is End of Sequence
00862 #define ADC_SSCTL1_D2           0x00000100  ///< 3rd Sample Diff Input Select
00863 #define ADC_SSCTL1_TS1          0x00000080  ///< 2nd Sample Temp Sensor Select
00864 #define ADC_SSCTL1_IE1          0x00000040  ///< 2nd Sample Interrupt Enable
00865 #define ADC_SSCTL1_END1         0x00000020  ///< 2nd Sample is End of Sequence
00866 #define ADC_SSCTL1_D1           0x00000010  ///< 2nd Sample Diff Input Select
00867 #define ADC_SSCTL1_TS0          0x00000008  ///< 1st Sample Temp Sensor Select
00868 #define ADC_SSCTL1_IE0          0x00000004  ///< 1st Sample Interrupt Enable
00869 #define ADC_SSCTL1_END0         0x00000002  ///< 1st Sample is End of Sequence
00870 #define ADC_SSCTL1_D0           0x00000001  ///< 1st Sample Diff Input Select
00871
00872
00873 /*
00874  * The following are defines for the bit fields in the ADC_O_SSFIFO1 register.
00875  */
00876 #define ADC_SSFIFO1_DATA_M      0x000003FF  ///< Conversion Result Data
00877 #define ADC_SSFIFO1_DATA_S      0
00878
00879
00880 /*
00881  * The following are defines for the bit fields in the ADC_O_SSFSTAT1 register.
00882  */
00883 #define ADC_SSFSTAT1_FULL       0x00001000  ///< FIFO Full
00884 #define ADC_SSFSTAT1_EMPTY      0x00000100  ///< FIFO Empty
00885 #define ADC_SSFSTAT1_HPTR_M     0x000000F0  ///< FIFO Head Pointer
00886 #define ADC_SSFSTAT1_TPTR_M     0x0000000F  ///< FIFO Tail Pointer
00887 #define ADC_SSFSTAT1_HPTR_S     4
00888 #define ADC_SSFSTAT1_TPTR_S     0
00889
00890
00891 /*
00892  * The following are defines for the bit fields in the ADC_O_SSOP1 register.
00893  */
00894 #define ADC_SSOP1_S3DCOP        0x00001000  ///< Sample 3 Digital Comparator
00895
00896 #define ADC_SSOP1_S2DCOP        0x00000100  ///< Sample 2 Digital Comparator
00897
00898 #define ADC_SSOP1_S1DCOP        0x00000010  ///< Sample 1 Digital Comparator
00899
00900 #define ADC_SSOP1_S0DCOP        0x00000001  ///< Sample 0 Digital Comparator
00901
00902
00903
00904 /*
00905  * The following are defines for the bit fields in the ADC_O_SSDC1 register.
00906  */
00907 #define ADC_SSDC1_S3DCSEL_M     0x0000F000  ///< Sample 3 Digital Comparator
00908
00909 #define ADC_SSDC1_S2DCSEL_M     0x00000F00  ///< Sample 2 Digital Comparator
00910
00911 #define ADC_SSDC1_S1DCSEL_M     0x000000F0  ///< Sample 1 Digital Comparator
00912
00913 #define ADC_SSDC1_S0DCSEL_M     0x0000000F  ///< Sample 0 Digital Comparator
00914
00915 #define ADC_SSDC1_S2DCSEL_S     8
00916 #define ADC_SSDC1_S1DCSEL_S     4
00917 #define ADC_SSDC1_S0DCSEL_S     0
00918
00919
00920 /*
00921  * The following are defines for the bit fields in the ADC_O_SSMUX2 register.
00922  */
00923 #define ADC_SSMUX2_MUX3_M       0x0000F000  ///< 4th Sample Input Select
00924 #define ADC_SSMUX2_MUX2_M       0x00000F00  ///< 3rd Sample Input Select
00925 #define ADC_SSMUX2_MUX1_M       0x000000F0  ///< 2nd Sample Input Select
00926 #define ADC_SSMUX2_MUX0_M       0x0000000F  ///< 1st Sample Input Select
00927 #define ADC_SSMUX2_MUX3_S       12
00928 #define ADC_SSMUX2_MUX2_S       8
00929 #define ADC_SSMUX2_MUX1_S       4
00930 #define ADC_SSMUX2_MUX0_S       0
00931
00932
00933 /*
00934  * The following are defines for the bit fields in the ADC_O_SSCTL2 register.
00935  */
00936 #define ADC_SSCTL2_TS3          0x00008000  ///< 4th Sample Temp Sensor Select
00937 #define ADC_SSCTL2_IE3          0x00004000  ///< 4th Sample Interrupt Enable
00938 #define ADC_SSCTL2_END3         0x00002000  ///< 4th Sample is End of Sequence
00939 #define ADC_SSCTL2_D3           0x00001000  ///< 4th Sample Diff Input Select
00940 #define ADC_SSCTL2_TS2          0x00000800  ///< 3rd Sample Temp Sensor Select
00941 #define ADC_SSCTL2_IE2          0x00000400  ///< 3rd Sample Interrupt Enable
00942 #define ADC_SSCTL2_END2         0x00000200  ///< 3rd Sample is End of Sequence
00943 #define ADC_SSCTL2_D2           0x00000100  ///< 3rd Sample Diff Input Select
00944 #define ADC_SSCTL2_TS1          0x00000080  ///< 2nd Sample Temp Sensor Select
00945 #define ADC_SSCTL2_IE1          0x00000040  ///< 2nd Sample Interrupt Enable
00946 #define ADC_SSCTL2_END1         0x00000020  ///< 2nd Sample is End of Sequence
00947 #define ADC_SSCTL2_D1           0x00000010  ///< 2nd Sample Diff Input Select
00948 #define ADC_SSCTL2_TS0          0x00000008  ///< 1st Sample Temp Sensor Select
00949 #define ADC_SSCTL2_IE0          0x00000004  ///< 1st Sample Interrupt Enable
00950 #define ADC_SSCTL2_END0         0x00000002  ///< 1st Sample is End of Sequence
00951 #define ADC_SSCTL2_D0           0x00000001  ///< 1st Sample Diff Input Select
00952
00953
00954 /*
00955  * The following are defines for the bit fields in the ADC_O_SSFIFO2 register.
00956  */
00957 #define ADC_SSFIFO2_DATA_M      0x000003FF  ///< Conversion Result Data
00958 #define ADC_SSFIFO2_DATA_S      0
00959
00960
00961 /*
00962  * The following are defines for the bit fields in the ADC_O_SSFSTAT2 register.
00963  */
00964 #define ADC_SSFSTAT2_FULL       0x00001000  ///< FIFO Full
00965 #define ADC_SSFSTAT2_EMPTY      0x00000100  ///< FIFO Empty
00966 #define ADC_SSFSTAT2_HPTR_M     0x000000F0  ///< FIFO Head Pointer
00967 #define ADC_SSFSTAT2_TPTR_M     0x0000000F  ///< FIFO Tail Pointer
00968 #define ADC_SSFSTAT2_HPTR_S     4
00969 #define ADC_SSFSTAT2_TPTR_S     0
00970
00971
00972 /*
00973  * The following are defines for the bit fields in the ADC_O_SSOP2 register.
00974  */
00975 #define ADC_SSOP2_S3DCOP        0x00001000  ///< Sample 3 Digital Comparator
00976
00977 #define ADC_SSOP2_S2DCOP        0x00000100  ///< Sample 2 Digital Comparator
00978
00979 #define ADC_SSOP2_S1DCOP        0x00000010  ///< Sample 1 Digital Comparator
00980
00981 #define ADC_SSOP2_S0DCOP        0x00000001  ///< Sample 0 Digital Comparator
00982
00983
00984
00985 /*
00986  * The following are defines for the bit fields in the ADC_O_SSDC2 register.
00987  */
00988 #define ADC_SSDC2_S3DCSEL_M     0x0000F000  ///< Sample 3 Digital Comparator
00989
00990 #define ADC_SSDC2_S2DCSEL_M     0x00000F00  ///< Sample 2 Digital Comparator
00991
00992 #define ADC_SSDC2_S1DCSEL_M     0x000000F0  ///< Sample 1 Digital Comparator
00993
00994 #define ADC_SSDC2_S0DCSEL_M     0x0000000F  ///< Sample 0 Digital Comparator
00995
00996 #define ADC_SSDC2_S2DCSEL_S     8
00997 #define ADC_SSDC2_S1DCSEL_S     4
00998 #define ADC_SSDC2_S0DCSEL_S     0
00999
01000
01001 /*
01002  * The following are defines for the bit fields in the ADC_O_SSMUX3 register.
01003  */
01004 #define ADC_SSMUX3_MUX0_M       0x0000000F  ///< 1st Sample Input Select
01005 #define ADC_SSMUX3_MUX0_S       0
01006
01007
01008 /*
01009  * The following are defines for the bit fields in the ADC_O_SSCTL3 register.
01010  */
01011 #define ADC_SSCTL3_TS0          0x00000008  ///< 1st Sample Temp Sensor Select
01012 #define ADC_SSCTL3_IE0          0x00000004  ///< 1st Sample Interrupt Enable
01013 #define ADC_SSCTL3_END0         0x00000002  ///< 1st Sample is End of Sequence
01014 #define ADC_SSCTL3_D0           0x00000001  ///< 1st Sample Diff Input Select
01015
01016
01017 /*
01018  * The following are defines for the bit fields in the ADC_O_SSFIFO3 register.
01019  */
01020 #define ADC_SSFIFO3_DATA_M      0x000003FF  ///< Conversion Result Data
01021 #define ADC_SSFIFO3_DATA_S      0
01022
01023
01024 /*
01025  * The following are defines for the bit fields in the ADC_O_SSFSTAT3 register.
01026  */
01027 #define ADC_SSFSTAT3_FULL       0x00001000  ///< FIFO Full
01028 #define ADC_SSFSTAT3_EMPTY      0x00000100  ///< FIFO Empty
01029 #define ADC_SSFSTAT3_HPTR_M     0x000000F0  ///< FIFO Head Pointer
01030 #define ADC_SSFSTAT3_TPTR_M     0x0000000F  ///< FIFO Tail Pointer
01031 #define ADC_SSFSTAT3_HPTR_S     4
01032 #define ADC_SSFSTAT3_TPTR_S     0
01033
01034
01035 /*
01036  * The following are defines for the bit fields in the ADC_O_SSOP3 register.
01037  */
01038 #define ADC_SSOP3_S0DCOP        0x00000001  ///< Sample 0 Digital Comparator
01039
01040
01041
01042 /*
01043  * The following are defines for the bit fields in the ADC_O_SSDC3 register.
01044  */
01045 #define ADC_SSDC3_S0DCSEL_M     0x0000000F  ///< Sample 0 Digital Comparator
01046
01047
01048
01049 /*
01050  * The following are defines for the bit fields in the ADC_O_TMLB register.
01051  */
01052 #define ADC_TMLB_LB             0x00000001  ///< Loopback Mode Enable
01053
01054
01055 /*
01056  * The following are defines for the bit fields in the ADC_O_DCRIC register.
01057  */
01058 #define ADC_DCRIC_DCTRIG7       0x00800000  ///< Digital Comparator Trigger 7
01059 #define ADC_DCRIC_DCTRIG6       0x00400000  ///< Digital Comparator Trigger 6
01060 #define ADC_DCRIC_DCTRIG5       0x00200000  ///< Digital Comparator Trigger 5
01061 #define ADC_DCRIC_DCTRIG4       0x00100000  ///< Digital Comparator Trigger 4
01062 #define ADC_DCRIC_DCTRIG3       0x00080000  ///< Digital Comparator Trigger 3
01063 #define ADC_DCRIC_DCTRIG2       0x00040000  ///< Digital Comparator Trigger 2
01064 #define ADC_DCRIC_DCTRIG1       0x00020000  ///< Digital Comparator Trigger 1
01065 #define ADC_DCRIC_DCTRIG0       0x00010000  ///< Digital Comparator Trigger 0
01066 #define ADC_DCRIC_DCINT7        0x00000080  ///< Digital Comparator Interrupt 7
01067 #define ADC_DCRIC_DCINT6        0x00000040  ///< Digital Comparator Interrupt 6
01068 #define ADC_DCRIC_DCINT5        0x00000020  ///< Digital Comparator Interrupt 5
01069 #define ADC_DCRIC_DCINT4        0x00000010  ///< Digital Comparator Interrupt 4
01070 #define ADC_DCRIC_DCINT3        0x00000008  ///< Digital Comparator Interrupt 3
01071 #define ADC_DCRIC_DCINT2        0x00000004  ///< Digital Comparator Interrupt 2
01072 #define ADC_DCRIC_DCINT1        0x00000002  ///< Digital Comparator Interrupt 1
01073 #define ADC_DCRIC_DCINT0        0x00000001  ///< Digital Comparator Interrupt 0
01074
01075
01076 /*
01077  * The following are defines for the bit fields in the ADC_O_DCCTL0 register.
01078  */
01079 #define ADC_DCCTL0_CTE          0x00001000  ///< Comparison Trigger Enable
01080 #define ADC_DCCTL0_CTC_M        0x00000C00  ///< Comparison Trigger Condition
01081 #define ADC_DCCTL0_CTC_LOW      0x00000000  ///< Low Band
01082 #define ADC_DCCTL0_CTC_MID      0x00000400  ///< Mid Band
01083 #define ADC_DCCTL0_CTC_HIGH     0x00000C00  ///< High Band
01084 #define ADC_DCCTL0_CTM_M        0x00000300  ///< Comparison Trigger Mode
01085 #define ADC_DCCTL0_CTM_ALWAYS   0x00000000  ///< Always
01086 #define ADC_DCCTL0_CTM_ONCE     0x00000100  ///< Once
01087 #define ADC_DCCTL0_CTM_HALWAYS  0x00000200  ///< Hysteresis Always
01088 #define ADC_DCCTL0_CTM_HONCE    0x00000300  ///< Hysteresis Once
01089 #define ADC_DCCTL0_CIE          0x00000010  ///< Comparison Interrupt Enable
01090 #define ADC_DCCTL0_CIC_M        0x0000000C  ///< Comparison Interrupt Condition
01091 #define ADC_DCCTL0_CIC_LOW      0x00000000  ///< Low Band
01092 #define ADC_DCCTL0_CIC_MID      0x00000004  ///< Mid Band
01093 #define ADC_DCCTL0_CIC_HIGH     0x0000000C  ///< High Band
01094 #define ADC_DCCTL0_CIM_M        0x00000003  ///< Comparison Interrupt Mode
01095 #define ADC_DCCTL0_CIM_ALWAYS   0x00000000  ///< Always
01096 #define ADC_DCCTL0_CIM_ONCE     0x00000001  ///< Once
01097 #define ADC_DCCTL0_CIM_HALWAYS  0x00000002  ///< Hysteresis Always
01098 #define ADC_DCCTL0_CIM_HONCE    0x00000003  ///< Hysteresis Once
01099
01100
01101 /*
01102  * The following are defines for the bit fields in the ADC_O_DCCTL1 register.
01103  */
01104 #define ADC_DCCTL1_CTE          0x00001000  ///< Comparison Trigger Enable
01105 #define ADC_DCCTL1_CTC_M        0x00000C00  ///< Comparison Trigger Condition
01106 #define ADC_DCCTL1_CTC_LOW      0x00000000  ///< Low Band
01107 #define ADC_DCCTL1_CTC_MID      0x00000400  ///< Mid Band
01108 #define ADC_DCCTL1_CTC_HIGH     0x00000C00  ///< High Band
01109 #define ADC_DCCTL1_CTM_M        0x00000300  ///< Comparison Trigger Mode
01110 #define ADC_DCCTL1_CTM_ALWAYS   0x00000000  ///< Always
01111 #define ADC_DCCTL1_CTM_ONCE     0x00000100  ///< Once
01112 #define ADC_DCCTL1_CTM_HALWAYS  0x00000200  ///< Hysteresis Always
01113 #define ADC_DCCTL1_CTM_HONCE    0x00000300  ///< Hysteresis Once
01114 #define ADC_DCCTL1_CIE          0x00000010  ///< Comparison Interrupt Enable
01115 #define ADC_DCCTL1_CIC_M        0x0000000C  ///< Comparison Interrupt Condition
01116 #define ADC_DCCTL1_CIC_LOW      0x00000000  ///< Low Band
01117 #define ADC_DCCTL1_CIC_MID      0x00000004  ///< Mid Band
01118 #define ADC_DCCTL1_CIC_HIGH     0x0000000C  ///< High Band
01119 #define ADC_DCCTL1_CIM_M        0x00000003  ///< Comparison Interrupt Mode
01120 #define ADC_DCCTL1_CIM_ALWAYS   0x00000000  ///< Always
01121 #define ADC_DCCTL1_CIM_ONCE     0x00000001  ///< Once
01122 #define ADC_DCCTL1_CIM_HALWAYS  0x00000002  ///< Hysteresis Always
01123 #define ADC_DCCTL1_CIM_HONCE    0x00000003  ///< Hysteresis Once
01124
01125
01126 /*
01127  * The following are defines for the bit fields in the ADC_O_DCCTL2 register.
01128  */
01129 #define ADC_DCCTL2_CTE          0x00001000  ///< Comparison Trigger Enable
01130 #define ADC_DCCTL2_CTC_M        0x00000C00  ///< Comparison Trigger Condition
01131 #define ADC_DCCTL2_CTC_LOW      0x00000000  ///< Low Band
01132 #define ADC_DCCTL2_CTC_MID      0x00000400  ///< Mid Band
01133 #define ADC_DCCTL2_CTC_HIGH     0x00000C00  ///< High Band
01134 #define ADC_DCCTL2_CTM_M        0x00000300  ///< Comparison Trigger Mode
01135 #define ADC_DCCTL2_CTM_ALWAYS   0x00000000  ///< Always
01136 #define ADC_DCCTL2_CTM_ONCE     0x00000100  ///< Once
01137 #define ADC_DCCTL2_CTM_HALWAYS  0x00000200  ///< Hysteresis Always
01138 #define ADC_DCCTL2_CTM_HONCE    0x00000300  ///< Hysteresis Once
01139 #define ADC_DCCTL2_CIE          0x00000010  ///< Comparison Interrupt Enable
01140 #define ADC_DCCTL2_CIC_M        0x0000000C  ///< Comparison Interrupt Condition
01141 #define ADC_DCCTL2_CIC_LOW      0x00000000  ///< Low Band
01142 #define ADC_DCCTL2_CIC_MID      0x00000004  ///< Mid Band
01143 #define ADC_DCCTL2_CIC_HIGH     0x0000000C  ///< High Band
01144 #define ADC_DCCTL2_CIM_M        0x00000003  ///< Comparison Interrupt Mode
01145 #define ADC_DCCTL2_CIM_ALWAYS   0x00000000  ///< Always
01146 #define ADC_DCCTL2_CIM_ONCE     0x00000001  ///< Once
01147 #define ADC_DCCTL2_CIM_HALWAYS  0x00000002  ///< Hysteresis Always
01148 #define ADC_DCCTL2_CIM_HONCE    0x00000003  ///< Hysteresis Once
01149
01150
01151 /*
01152  * The following are defines for the bit fields in the ADC_O_DCCTL3 register.
01153  */
01154 #define ADC_DCCTL3_CTE          0x00001000  ///< Comparison Trigger Enable
01155 #define ADC_DCCTL3_CTC_M        0x00000C00  ///< Comparison Trigger Condition
01156 #define ADC_DCCTL3_CTC_LOW      0x00000000  ///< Low Band
01157 #define ADC_DCCTL3_CTC_MID      0x00000400  ///< Mid Band
01158 #define ADC_DCCTL3_CTC_HIGH     0x00000C00  ///< High Band
01159 #define ADC_DCCTL3_CTM_M        0x00000300  ///< Comparison Trigger Mode
01160 #define ADC_DCCTL3_CTM_ALWAYS   0x00000000  ///< Always
01161 #define ADC_DCCTL3_CTM_ONCE     0x00000100  ///< Once
01162 #define ADC_DCCTL3_CTM_HALWAYS  0x00000200  ///< Hysteresis Always
01163 #define ADC_DCCTL3_CTM_HONCE    0x00000300  ///< Hysteresis Once
01164 #define ADC_DCCTL3_CIE          0x00000010  ///< Comparison Interrupt Enable
01165 #define ADC_DCCTL3_CIC_M        0x0000000C  ///< Comparison Interrupt Condition
01166 #define ADC_DCCTL3_CIC_LOW      0x00000000  ///< Low Band
01167 #define ADC_DCCTL3_CIC_MID      0x00000004  ///< Mid Band
01168 #define ADC_DCCTL3_CIC_HIGH     0x0000000C  ///< High Band
01169 #define ADC_DCCTL3_CIM_M        0x00000003  ///< Comparison Interrupt Mode
01170 #define ADC_DCCTL3_CIM_ALWAYS   0x00000000  ///< Always
01171 #define ADC_DCCTL3_CIM_ONCE     0x00000001  ///< Once
01172 #define ADC_DCCTL3_CIM_HALWAYS  0x00000002  ///< Hysteresis Always
01173 #define ADC_DCCTL3_CIM_HONCE    0x00000003  ///< Hysteresis Once
01174
01175
01176 /*
01177  * The following are defines for the bit fields in the ADC_O_DCCTL4 register.
01178  */
01179 #define ADC_DCCTL4_CTE          0x00001000  ///< Comparison Trigger Enable
01180 #define ADC_DCCTL4_CTC_M        0x00000C00  ///< Comparison Trigger Condition
01181 #define ADC_DCCTL4_CTC_LOW      0x00000000  ///< Low Band
01182 #define ADC_DCCTL4_CTC_MID      0x00000400  ///< Mid Band
01183 #define ADC_DCCTL4_CTC_HIGH     0x00000C00  ///< High Band
01184 #define ADC_DCCTL4_CTM_M        0x00000300  ///< Comparison Trigger Mode
01185 #define ADC_DCCTL4_CTM_ALWAYS   0x00000000  ///< Always
01186 #define ADC_DCCTL4_CTM_ONCE     0x00000100  ///< Once
01187 #define ADC_DCCTL4_CTM_HALWAYS  0x00000200  ///< Hysteresis Always
01188 #define ADC_DCCTL4_CTM_HONCE    0x00000300  ///< Hysteresis Once
01189 #define ADC_DCCTL4_CIE          0x00000010  ///< Comparison Interrupt Enable
01190 #define ADC_DCCTL4_CIC_M        0x0000000C  ///< Comparison Interrupt Condition
01191 #define ADC_DCCTL4_CIC_LOW      0x00000000  ///< Low Band
01192 #define ADC_DCCTL4_CIC_MID      0x00000004  ///< Mid Band
01193 #define ADC_DCCTL4_CIC_HIGH     0x0000000C  ///< High Band
01194 #define ADC_DCCTL4_CIM_M        0x00000003  ///< Comparison Interrupt Mode
01195 #define ADC_DCCTL4_CIM_ALWAYS   0x00000000  ///< Always
01196 #define ADC_DCCTL4_CIM_ONCE     0x00000001  ///< Once
01197 #define ADC_DCCTL4_CIM_HALWAYS  0x00000002  ///< Hysteresis Always
01198 #define ADC_DCCTL4_CIM_HONCE    0x00000003  ///< Hysteresis Once
01199
01200
01201 /*
01202  * The following are defines for the bit fields in the ADC_O_DCCTL5 register.
01203  */
01204 #define ADC_DCCTL5_CTE          0x00001000  ///< Comparison Trigger Enable
01205 #define ADC_DCCTL5_CTC_M        0x00000C00  ///< Comparison Trigger Condition
01206 #define ADC_DCCTL5_CTC_LOW      0x00000000  ///< Low Band
01207 #define ADC_DCCTL5_CTC_MID      0x00000400  ///< Mid Band
01208 #define ADC_DCCTL5_CTC_HIGH     0x00000C00  ///< High Band
01209 #define ADC_DCCTL5_CTM_M        0x00000300  ///< Comparison Trigger Mode
01210 #define ADC_DCCTL5_CTM_ALWAYS   0x00000000  ///< Always
01211 #define ADC_DCCTL5_CTM_ONCE     0x00000100  ///< Once
01212 #define ADC_DCCTL5_CTM_HALWAYS  0x00000200  ///< Hysteresis Always
01213 #define ADC_DCCTL5_CTM_HONCE    0x00000300  ///< Hysteresis Once
01214 #define ADC_DCCTL5_CIE          0x00000010  ///< Comparison Interrupt Enable
01215 #define ADC_DCCTL5_CIC_M        0x0000000C  ///< Comparison Interrupt Condition
01216 #define ADC_DCCTL5_CIC_LOW      0x00000000  ///< Low Band
01217 #define ADC_DCCTL5_CIC_MID      0x00000004  ///< Mid Band
01218 #define ADC_DCCTL5_CIC_HIGH     0x0000000C  ///< High Band
01219 #define ADC_DCCTL5_CIM_M        0x00000003  ///< Comparison Interrupt Mode
01220 #define ADC_DCCTL5_CIM_ALWAYS   0x00000000  ///< Always
01221 #define ADC_DCCTL5_CIM_ONCE     0x00000001  ///< Once
01222 #define ADC_DCCTL5_CIM_HALWAYS  0x00000002  ///< Hysteresis Always
01223 #define ADC_DCCTL5_CIM_HONCE    0x00000003  ///< Hysteresis Once
01224
01225
01226 /*
01227  * The following are defines for the bit fields in the ADC_O_DCCTL6 register.
01228  */
01229 #define ADC_DCCTL6_CTE          0x00001000  ///< Comparison Trigger Enable
01230 #define ADC_DCCTL6_CTC_M        0x00000C00  ///< Comparison Trigger Condition
01231 #define ADC_DCCTL6_CTC_LOW      0x00000000  ///< Low Band
01232 #define ADC_DCCTL6_CTC_MID      0x00000400  ///< Mid Band
01233 #define ADC_DCCTL6_CTC_HIGH     0x00000C00  ///< High Band
01234 #define ADC_DCCTL6_CTM_M        0x00000300  ///< Comparison Trigger Mode
01235 #define ADC_DCCTL6_CTM_ALWAYS   0x00000000  ///< Always
01236 #define ADC_DCCTL6_CTM_ONCE     0x00000100  ///< Once
01237 #define ADC_DCCTL6_CTM_HALWAYS  0x00000200  ///< Hysteresis Always
01238 #define ADC_DCCTL6_CTM_HONCE    0x00000300  ///< Hysteresis Once
01239 #define ADC_DCCTL6_CIE          0x00000010  ///< Comparison Interrupt Enable
01240 #define ADC_DCCTL6_CIC_M        0x0000000C  ///< Comparison Interrupt Condition
01241 #define ADC_DCCTL6_CIC_LOW      0x00000000  ///< Low Band
01242 #define ADC_DCCTL6_CIC_MID      0x00000004  ///< Mid Band
01243 #define ADC_DCCTL6_CIC_HIGH     0x0000000C  ///< High Band
01244 #define ADC_DCCTL6_CIM_M        0x00000003  ///< Comparison Interrupt Mode
01245 #define ADC_DCCTL6_CIM_ALWAYS   0x00000000  ///< Always
01246 #define ADC_DCCTL6_CIM_ONCE     0x00000001  ///< Once
01247 #define ADC_DCCTL6_CIM_HALWAYS  0x00000002  ///< Hysteresis Always
01248 #define ADC_DCCTL6_CIM_HONCE    0x00000003  ///< Hysteresis Once
01249
01250
01251 /*
01252  * The following are defines for the bit fields in the ADC_O_DCCTL7 register.
01253  */
01254 #define ADC_DCCTL7_CTE          0x00001000  ///< Comparison Trigger Enable
01255 #define ADC_DCCTL7_CTC_M        0x00000C00  ///< Comparison Trigger Condition
01256 #define ADC_DCCTL7_CTC_LOW      0x00000000  ///< Low Band
01257 #define ADC_DCCTL7_CTC_MID      0x00000400  ///< Mid Band
01258 #define ADC_DCCTL7_CTC_HIGH     0x00000C00  ///< High Band
01259 #define ADC_DCCTL7_CTM_M        0x00000300  ///< Comparison Trigger Mode
01260 #define ADC_DCCTL7_CTM_ALWAYS   0x00000000  ///< Always
01261 #define ADC_DCCTL7_CTM_ONCE     0x00000100  ///< Once
01262 #define ADC_DCCTL7_CTM_HALWAYS  0x00000200  ///< Hysteresis Always
01263 #define ADC_DCCTL7_CTM_HONCE    0x00000300  ///< Hysteresis Once
01264 #define ADC_DCCTL7_CIE          0x00000010  ///< Comparison Interrupt Enable
01265 #define ADC_DCCTL7_CIC_M        0x0000000C  ///< Comparison Interrupt Condition
01266 #define ADC_DCCTL7_CIC_LOW      0x00000000  ///< Low Band
01267 #define ADC_DCCTL7_CIC_MID      0x00000004  ///< Mid Band
01268 #define ADC_DCCTL7_CIC_HIGH     0x0000000C  ///< High Band
01269 #define ADC_DCCTL7_CIM_M        0x00000003  ///< Comparison Interrupt Mode
01270 #define ADC_DCCTL7_CIM_ALWAYS   0x00000000  ///< Always
01271 #define ADC_DCCTL7_CIM_ONCE     0x00000001  ///< Once
01272 #define ADC_DCCTL7_CIM_HALWAYS  0x00000002  ///< Hysteresis Always
01273 #define ADC_DCCTL7_CIM_HONCE    0x00000003  ///< Hysteresis Once
01274
01275
01276 /*
01277  * The following are defines for the bit fields in the ADC_O_DCCMP0 register.
01278  */
01279 #define ADC_DCCMP0_COMP1_M      0x03FF0000  ///< Compare 1
01280 #define ADC_DCCMP0_COMP0_M      0x000003FF  ///< Compare 0
01281 #define ADC_DCCMP0_COMP1_S      16
01282 #define ADC_DCCMP0_COMP0_S      0
01283
01284
01285 /*
01286  * The following are defines for the bit fields in the ADC_O_DCCMP1 register.
01287  */
01288 #define ADC_DCCMP1_COMP1_M      0x03FF0000  ///< Compare 1
01289 #define ADC_DCCMP1_COMP0_M      0x000003FF  ///< Compare 0
01290 #define ADC_DCCMP1_COMP1_S      16
01291 #define ADC_DCCMP1_COMP0_S      0
01292
01293
01294 /*
01295  * The following are defines for the bit fields in the ADC_O_DCCMP2 register.
01296  */
01297 #define ADC_DCCMP2_COMP1_M      0x03FF0000  ///< Compare 1
01298 #define ADC_DCCMP2_COMP0_M      0x000003FF  ///< Compare 0
01299 #define ADC_DCCMP2_COMP1_S      16
01300 #define ADC_DCCMP2_COMP0_S      0
01301
01302
01303 /*
01304  * The following are defines for the bit fields in the ADC_O_DCCMP3 register.
01305  */
01306 #define ADC_DCCMP3_COMP1_M      0x03FF0000  ///< Compare 1
01307 #define ADC_DCCMP3_COMP0_M      0x000003FF  ///< Compare 0
01308 #define ADC_DCCMP3_COMP1_S      16
01309 #define ADC_DCCMP3_COMP0_S      0
01310
01311
01312 /*
01313  * The following are defines for the bit fields in the ADC_O_DCCMP4 register.
01314  */
01315 #define ADC_DCCMP4_COMP1_M      0x03FF0000  ///< Compare 1
01316 #define ADC_DCCMP4_COMP0_M      0x000003FF  ///< Compare 0
01317 #define ADC_DCCMP4_COMP1_S      16
01318 #define ADC_DCCMP4_COMP0_S      0
01319
01320
01321 /*
01322  * The following are defines for the bit fields in the ADC_O_DCCMP5 register.
01323  */
01324 #define ADC_DCCMP5_COMP1_M      0x03FF0000  ///< Compare 1
01325 #define ADC_DCCMP5_COMP0_M      0x000003FF  ///< Compare 0
01326 #define ADC_DCCMP5_COMP1_S      16
01327 #define ADC_DCCMP5_COMP0_S      0
01328
01329
01330 /*
01331  * The following are defines for the bit fields in the ADC_O_DCCMP6 register.
01332  */
01333 #define ADC_DCCMP6_COMP1_M      0x03FF0000  ///< Compare 1
01334 #define ADC_DCCMP6_COMP0_M      0x000003FF  ///< Compare 0
01335 #define ADC_DCCMP6_COMP1_S      16
01336 #define ADC_DCCMP6_COMP0_S      0
01337
01338
01339 /*
01340  * The following are defines for the bit fields in the ADC_O_DCCMP7 register.
01341  */
01342 #define ADC_DCCMP7_COMP1_M      0x03FF0000  ///< Compare 1
01343 #define ADC_DCCMP7_COMP0_M      0x000003FF  ///< Compare 0
01344 #define ADC_DCCMP7_COMP1_S      16
01345 #define ADC_DCCMP7_COMP0_S      0
01346
01347
01348 /*
01349  * The following are defines for the the interpretation of the data in the
01350  * SSFIFOx when the ADC TMLB is enabled.
01351  */
01352
01353 #define ADC_SSFIFO_TMLB_CNT_M   0x000003C0  ///< Continuous Sample Counter
01354 #define ADC_SSFIFO_TMLB_CONT    0x00000020  ///< Continuation Sample Indicator
01355 #define ADC_SSFIFO_TMLB_DIFF    0x00000010  ///< Differential Sample Indicator
01356 #define ADC_SSFIFO_TMLB_TS      0x00000008  ///< Temp Sensor Sample Indicator
01357 #define ADC_SSFIFO_TMLB_MUX_M   0x00000007  ///< Analog Input Indicator
01358 #define ADC_SSFIFO_TMLB_CNT_S   6           ///< Sample counter shift
01359 #define ADC_SSFIFO_TMLB_MUX_S   0           ///< Input channel number shift
01360
01361 #endif /* LM3S_ADC_H */


BeRTOS: lm3s_com.h File Reference

  • cpu
  • cortex-m3
  • io
lm3s_com.h File Reference

LM3S1968 registers definition. More...

#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define | WATCHDOG0_LOAD_R (*((reg32_t *)0x40000000))
Watchdog Timer registers (WATCHDOG0)
#define | WATCHDOG0_VALUE_R (*((reg32_t *)0x40000004))
Watchdog Timer registers (WATCHDOG0)
#define | WATCHDOG0_CTL_R (*((reg32_t *)0x40000008))
Watchdog Timer registers (WATCHDOG0)
#define | WATCHDOG0_ICR_R (*((reg32_t *)0x4000000C))
Watchdog Timer registers (WATCHDOG0)
#define | WATCHDOG0_RIS_R (*((reg32_t *)0x40000010))
Watchdog Timer registers (WATCHDOG0)
#define | WATCHDOG0_MIS_R (*((reg32_t *)0x40000014))
Watchdog Timer registers (WATCHDOG0)
#define | WATCHDOG0_TEST_R (*((reg32_t *)0x40000418))
Watchdog Timer registers (WATCHDOG0)
#define | WATCHDOG0_LOCK_R (*((reg32_t *)0x40000C00))
Watchdog Timer registers (WATCHDOG0)
#define | GPIO_PORTA_DATA_BITS_R ((reg32_t *)0x40004000)
GPIO registers (PORTA)
#define | GPIO_PORTA_DATA_R (*((reg32_t *)0x400043FC))
GPIO registers (PORTA)
#define | GPIO_PORTA_DIR_R (*((reg32_t *)0x40004400))
GPIO registers (PORTA)
#define | GPIO_PORTA_IS_R (*((reg32_t *)0x40004404))
GPIO registers (PORTA)
#define | GPIO_PORTA_IBE_R (*((reg32_t *)0x40004408))
GPIO registers (PORTA)
#define | GPIO_PORTA_IEV_R (*((reg32_t *)0x4000440C))
GPIO registers (PORTA)
#define | GPIO_PORTA_IM_R (*((reg32_t *)0x40004410))
GPIO registers (PORTA)
#define | GPIO_PORTA_RIS_R (*((reg32_t *)0x40004414))
GPIO registers (PORTA)
#define | GPIO_PORTA_MIS_R (*((reg32_t *)0x40004418))
GPIO registers (PORTA)
#define | GPIO_PORTA_ICR_R (*((reg32_t *)0x4000441C))
GPIO registers (PORTA)
#define | GPIO_PORTA_AFSEL_R (*((reg32_t *)0x40004420))
GPIO registers (PORTA)
#define | GPIO_PORTA_DR2R_R (*((reg32_t *)0x40004500))
GPIO registers (PORTA)
#define | GPIO_PORTA_DR4R_R (*((reg32_t *)0x40004504))
GPIO registers (PORTA)
#define | GPIO_PORTA_DR8R_R (*((reg32_t *)0x40004508))
GPIO registers (PORTA)
#define | GPIO_PORTA_ODR_R (*((reg32_t *)0x4000450C))
GPIO registers (PORTA)
#define | GPIO_PORTA_PUR_R (*((reg32_t *)0x40004510))
GPIO registers (PORTA)
#define | GPIO_PORTA_PDR_R (*((reg32_t *)0x40004514))
GPIO registers (PORTA)
#define | GPIO_PORTA_SLR_R (*((reg32_t *)0x40004518))
GPIO registers (PORTA)
#define | GPIO_PORTA_DEN_R (*((reg32_t *)0x4000451C))
GPIO registers (PORTA)
#define | GPIO_PORTA_LOCK_R (*((reg32_t *)0x40004520))
GPIO registers (PORTA)
#define | GPIO_PORTA_CR_R (*((reg32_t *)0x40004524))
GPIO registers (PORTA)
#define | GPIO_PORTB_DATA_BITS_R ((reg32_t *)0x40005000)
GPIO registers (PORTB)
#define | GPIO_PORTB_DATA_R (*((reg32_t *)0x400053FC))
GPIO registers (PORTB)
#define | GPIO_PORTB_DIR_R (*((reg32_t *)0x40005400))
GPIO registers (PORTB)
#define | GPIO_PORTB_IS_R (*((reg32_t *)0x40005404))
GPIO registers (PORTB)
#define | GPIO_PORTB_IBE_R (*((reg32_t *)0x40005408))
GPIO registers (PORTB)
#define | GPIO_PORTB_IEV_R (*((reg32_t *)0x4000540C))
GPIO registers (PORTB)
#define | GPIO_PORTB_IM_R (*((reg32_t *)0x40005410))
GPIO registers (PORTB)
#define | GPIO_PORTB_RIS_R (*((reg32_t *)0x40005414))
GPIO registers (PORTB)
#define | GPIO_PORTB_MIS_R (*((reg32_t *)0x40005418))
GPIO registers (PORTB)
#define | GPIO_PORTB_ICR_R (*((reg32_t *)0x4000541C))
GPIO registers (PORTB)
#define | GPIO_PORTB_AFSEL_R (*((reg32_t *)0x40005420))
GPIO registers (PORTB)
#define | GPIO_PORTB_DR2R_R (*((reg32_t *)0x40005500))
GPIO registers (PORTB)
#define | GPIO_PORTB_DR4R_R (*((reg32_t *)0x40005504))
GPIO registers (PORTB)
#define | GPIO_PORTB_DR8R_R (*((reg32_t *)0x40005508))
GPIO registers (PORTB)
#define | GPIO_PORTB_ODR_R (*((reg32_t *)0x4000550C))
GPIO registers (PORTB)
#define | GPIO_PORTB_PUR_R (*((reg32_t *)0x40005510))
GPIO registers (PORTB)
#define | GPIO_PORTB_PDR_R (*((reg32_t *)0x40005514))
GPIO registers (PORTB)
#define | GPIO_PORTB_SLR_R (*((reg32_t *)0x40005518))
GPIO registers (PORTB)
#define | GPIO_PORTB_DEN_R (*((reg32_t *)0x4000551C))
GPIO registers (PORTB)
#define | GPIO_PORTB_LOCK_R (*((reg32_t *)0x40005520))
GPIO registers (PORTB)
#define | GPIO_PORTB_CR_R (*((reg32_t *)0x40005524))
GPIO registers (PORTB)
#define | GPIO_PORTC_DATA_BITS_R ((reg32_t *)0x40006000)
GPIO registers (PORTC)
#define | GPIO_PORTC_DATA_R (*((reg32_t *)0x400063FC))
GPIO registers (PORTC)
#define | GPIO_PORTC_DIR_R (*((reg32_t *)0x40006400))
GPIO registers (PORTC)
#define | GPIO_PORTC_IS_R (*((reg32_t *)0x40006404))
GPIO registers (PORTC)
#define | GPIO_PORTC_IBE_R (*((reg32_t *)0x40006408))
GPIO registers (PORTC)
#define | GPIO_PORTC_IEV_R (*((reg32_t *)0x4000640C))
GPIO registers (PORTC)
#define | GPIO_PORTC_IM_R (*((reg32_t *)0x40006410))
GPIO registers (PORTC)
#define | GPIO_PORTC_RIS_R (*((reg32_t *)0x40006414))
GPIO registers (PORTC)
#define | GPIO_PORTC_MIS_R (*((reg32_t *)0x40006418))
GPIO registers (PORTC)
#define | GPIO_PORTC_ICR_R (*((reg32_t *)0x4000641C))
GPIO registers (PORTC)
#define | GPIO_PORTC_AFSEL_R (*((reg32_t *)0x40006420))
GPIO registers (PORTC)
#define | GPIO_PORTC_DR2R_R (*((reg32_t *)0x40006500))
GPIO registers (PORTC)
#define | GPIO_PORTC_DR4R_R (*((reg32_t *)0x40006504))
GPIO registers (PORTC)
#define | GPIO_PORTC_DR8R_R (*((reg32_t *)0x40006508))
GPIO registers (PORTC)
#define | GPIO_PORTC_ODR_R (*((reg32_t *)0x4000650C))
GPIO registers (PORTC)
#define | GPIO_PORTC_PUR_R (*((reg32_t *)0x40006510))
GPIO registers (PORTC)
#define | GPIO_PORTC_PDR_R (*((reg32_t *)0x40006514))
GPIO registers (PORTC)
#define | GPIO_PORTC_SLR_R (*((reg32_t *)0x40006518))
GPIO registers (PORTC)
#define | GPIO_PORTC_DEN_R (*((reg32_t *)0x4000651C))
GPIO registers (PORTC)
#define | GPIO_PORTC_LOCK_R (*((reg32_t *)0x40006520))
GPIO registers (PORTC)
#define | GPIO_PORTC_CR_R (*((reg32_t *)0x40006524))
GPIO registers (PORTC)
#define | GPIO_PORTD_DATA_BITS_R ((reg32_t *)0x40007000)
GPIO registers (PORTD)
#define | GPIO_PORTD_DATA_R (*((reg32_t *)0x400073FC))
GPIO registers (PORTD)
#define | GPIO_PORTD_DIR_R (*((reg32_t *)0x40007400))
GPIO registers (PORTD)
#define | GPIO_PORTD_IS_R (*((reg32_t *)0x40007404))
GPIO registers (PORTD)
#define | GPIO_PORTD_IBE_R (*((reg32_t *)0x40007408))
GPIO registers (PORTD)
#define | GPIO_PORTD_IEV_R (*((reg32_t *)0x4000740C))
GPIO registers (PORTD)
#define | GPIO_PORTD_IM_R (*((reg32_t *)0x40007410))
GPIO registers (PORTD)
#define | GPIO_PORTD_RIS_R (*((reg32_t *)0x40007414))
GPIO registers (PORTD)
#define | GPIO_PORTD_MIS_R (*((reg32_t *)0x40007418))
GPIO registers (PORTD)
#define | GPIO_PORTD_ICR_R (*((reg32_t *)0x4000741C))
GPIO registers (PORTD)
#define | GPIO_PORTD_AFSEL_R (*((reg32_t *)0x40007420))
GPIO registers (PORTD)
#define | GPIO_PORTD_DR2R_R (*((reg32_t *)0x40007500))
GPIO registers (PORTD)
#define | GPIO_PORTD_DR4R_R (*((reg32_t *)0x40007504))
GPIO registers (PORTD)
#define | GPIO_PORTD_DR8R_R (*((reg32_t *)0x40007508))
GPIO registers (PORTD)
#define | GPIO_PORTD_ODR_R (*((reg32_t *)0x4000750C))
GPIO registers (PORTD)
#define | GPIO_PORTD_PUR_R (*((reg32_t *)0x40007510))
GPIO registers (PORTD)
#define | GPIO_PORTD_PDR_R (*((reg32_t *)0x40007514))
GPIO registers (PORTD)
#define | GPIO_PORTD_SLR_R (*((reg32_t *)0x40007518))
GPIO registers (PORTD)
#define | GPIO_PORTD_DEN_R (*((reg32_t *)0x4000751C))
GPIO registers (PORTD)
#define | GPIO_PORTD_LOCK_R (*((reg32_t *)0x40007520))
GPIO registers (PORTD)
#define | GPIO_PORTD_CR_R (*((reg32_t *)0x40007524))
GPIO registers (PORTD)
#define | SSI0_CR0_R (*((reg32_t *)0x40008000))
SSI registers (SSI0)
#define | SSI0_CR1_R (*((reg32_t *)0x40008004))
SSI registers (SSI0)
#define | SSI0_DR_R (*((reg32_t *)0x40008008))
SSI registers (SSI0)
#define | SSI0_SR_R (*((reg32_t *)0x4000800C))
SSI registers (SSI0)
#define | SSI0_CPSR_R (*((reg32_t *)0x40008010))
SSI registers (SSI0)
#define | SSI0_IM_R (*((reg32_t *)0x40008014))
SSI registers (SSI0)
#define | SSI0_RIS_R (*((reg32_t *)0x40008018))
SSI registers (SSI0)
#define | SSI0_MIS_R (*((reg32_t *)0x4000801C))
SSI registers (SSI0)
#define | SSI0_ICR_R (*((reg32_t *)0x40008020))
SSI registers (SSI0)
#define | SSI1_CR0_R (*((reg32_t *)0x40009000))
SSI registers (SSI1)
#define | SSI1_CR1_R (*((reg32_t *)0x40009004))
SSI registers (SSI1)
#define | SSI1_DR_R (*((reg32_t *)0x40009008))
SSI registers (SSI1)
#define | SSI1_SR_R (*((reg32_t *)0x4000900C))
SSI registers (SSI1)
#define | SSI1_CPSR_R (*((reg32_t *)0x40009010))
SSI registers (SSI1)
#define | SSI1_IM_R (*((reg32_t *)0x40009014))
SSI registers (SSI1)
#define | SSI1_RIS_R (*((reg32_t *)0x40009018))
SSI registers (SSI1)
#define | SSI1_MIS_R (*((reg32_t *)0x4000901C))
SSI registers (SSI1)
#define | SSI1_ICR_R (*((reg32_t *)0x40009020))
SSI registers (SSI1)
#define | UART0_DR_R (*((reg32_t *)0x4000C000))
UART registers (UART0)
#define | UART0_RSR_R (*((reg32_t *)0x4000C004))
UART registers (UART0)
#define | UART0_ECR_R (*((reg32_t *)0x4000C004))
UART registers (UART0)
#define | UART0_FR_R (*((reg32_t *)0x4000C018))
UART registers (UART0)
#define | UART0_ILPR_R (*((reg32_t *)0x4000C020))
UART registers (UART0)
#define | UART0_IBRD_R (*((reg32_t *)0x4000C024))
UART registers (UART0)
#define | UART0_FBRD_R (*((reg32_t *)0x4000C028))
UART registers (UART0)
#define | UART0_LCRH_R (*((reg32_t *)0x4000C02C))
UART registers (UART0)
#define | UART0_CTL_R (*((reg32_t *)0x4000C030))
UART registers (UART0)
#define | UART0_IFLS_R (*((reg32_t *)0x4000C034))
UART registers (UART0)
#define | UART0_IM_R (*((reg32_t *)0x4000C038))
UART registers (UART0)
#define | UART0_RIS_R (*((reg32_t *)0x4000C03C))
UART registers (UART0)
#define | UART0_MIS_R (*((reg32_t *)0x4000C040))
UART registers (UART0)
#define | UART0_ICR_R (*((reg32_t *)0x4000C044))
UART registers (UART0)
#define | UART1_DR_R (*((reg32_t *)0x4000D000))
UART registers (UART1)
#define | UART1_RSR_R (*((reg32_t *)0x4000D004))
UART registers (UART1)
#define | UART1_ECR_R (*((reg32_t *)0x4000D004))
UART registers (UART1)
#define | UART1_FR_R (*((reg32_t *)0x4000D018))
UART registers (UART1)
#define | UART1_ILPR_R (*((reg32_t *)0x4000D020))
UART registers (UART1)
#define | UART1_IBRD_R (*((reg32_t *)0x4000D024))
UART registers (UART1)
#define | UART1_FBRD_R (*((reg32_t *)0x4000D028))
UART registers (UART1)
#define | UART1_LCRH_R (*((reg32_t *)0x4000D02C))
UART registers (UART1)
#define | UART1_CTL_R (*((reg32_t *)0x4000D030))
UART registers (UART1)
#define | UART1_IFLS_R (*((reg32_t *)0x4000D034))
UART registers (UART1)
#define | UART1_IM_R (*((reg32_t *)0x4000D038))
UART registers (UART1)
#define | UART1_RIS_R (*((reg32_t *)0x4000D03C))
UART registers (UART1)
#define | UART1_MIS_R (*((reg32_t *)0x4000D040))
UART registers (UART1)
#define | UART1_ICR_R (*((reg32_t *)0x4000D044))
UART registers (UART1)
#define | UART2_DR_R (*((reg32_t *)0x4000E000))
UART registers (UART2)
#define | UART2_RSR_R (*((reg32_t *)0x4000E004))
UART registers (UART2)
#define | UART2_ECR_R (*((reg32_t *)0x4000E004))
UART registers (UART2)
#define | UART2_FR_R (*((reg32_t *)0x4000E018))
UART registers (UART2)
#define | UART2_ILPR_R (*((reg32_t *)0x4000E020))
UART registers (UART2)
#define | UART2_IBRD_R (*((reg32_t *)0x4000E024))
UART registers (UART2)
#define | UART2_FBRD_R (*((reg32_t *)0x4000E028))
UART registers (UART2)
#define | UART2_LCRH_R (*((reg32_t *)0x4000E02C))
UART registers (UART2)
#define | UART2_CTL_R (*((reg32_t *)0x4000E030))
UART registers (UART2)
#define | UART2_IFLS_R (*((reg32_t *)0x4000E034))
UART registers (UART2)
#define | UART2_IM_R (*((reg32_t *)0x4000E038))
UART registers (UART2)
#define | UART2_RIS_R (*((reg32_t *)0x4000E03C))
UART registers (UART2)
#define | UART2_MIS_R (*((reg32_t *)0x4000E040))
UART registers (UART2)
#define | UART2_ICR_R (*((reg32_t *)0x4000E044))
UART registers (UART2)
#define | I2C0_MASTER_MSA_R (*((reg32_t *)0x40020000))
I2C registers (I2C0 MASTER)
#define | I2C0_MASTER_SOAR_R (*((reg32_t *)0x40020000))
I2C registers (I2C0 MASTER)
#define | I2C0_MASTER_SCSR_R (*((reg32_t *)0x40020004))
I2C registers (I2C0 MASTER)
#define | I2C0_MASTER_MCS_R (*((reg32_t *)0x40020004))
I2C registers (I2C0 MASTER)
#define | I2C0_MASTER_SDR_R (*((reg32_t *)0x40020008))
I2C registers (I2C0 MASTER)
#define | I2C0_MASTER_MDR_R (*((reg32_t *)0x40020008))
I2C registers (I2C0 MASTER)
#define | I2C0_MASTER_MTPR_R (*((reg32_t *)0x4002000C))
I2C registers (I2C0 MASTER)
#define | I2C0_MASTER_SIMR_R (*((reg32_t *)0x4002000C))
I2C registers (I2C0 MASTER)
#define | I2C0_MASTER_SRIS_R (*((reg32_t *)0x40020010))
I2C registers (I2C0 MASTER)
#define | I2C0_MASTER_MIMR_R (*((reg32_t *)0x40020010))
I2C registers (I2C0 MASTER)
#define | I2C0_MASTER_MRIS_R (*((reg32_t *)0x40020014))
I2C registers (I2C0 MASTER)
#define | I2C0_MASTER_SMIS_R (*((reg32_t *)0x40020014))
I2C registers (I2C0 MASTER)
#define | I2C0_MASTER_SICR_R (*((reg32_t *)0x40020018))
I2C registers (I2C0 MASTER)
#define | I2C0_MASTER_MMIS_R (*((reg32_t *)0x40020018))
I2C registers (I2C0 MASTER)
#define | I2C0_MASTER_MICR_R (*((reg32_t *)0x4002001C))
I2C registers (I2C0 MASTER)
#define | I2C0_MASTER_MCR_R (*((reg32_t *)0x40020020))
I2C registers (I2C0 MASTER)
#define | I2C0_SLAVE_MSA_R (*((reg32_t *)0x40020800))
I2C registers (I2C0 SLAVE)
#define | I2C0_SLAVE_SOAR_R (*((reg32_t *)0x40020800))
I2C registers (I2C0 SLAVE)
#define | I2C0_SLAVE_SCSR_R (*((reg32_t *)0x40020804))
I2C registers (I2C0 SLAVE)
#define | I2C0_SLAVE_MCS_R (*((reg32_t *)0x40020804))
I2C registers (I2C0 SLAVE)
#define | I2C0_SLAVE_SDR_R (*((reg32_t *)0x40020808))
I2C registers (I2C0 SLAVE)
#define | I2C0_SLAVE_MDR_R (*((reg32_t *)0x40020808))
I2C registers (I2C0 SLAVE)
#define | I2C0_SLAVE_MTPR_R (*((reg32_t *)0x4002080C))
I2C registers (I2C0 SLAVE)
#define | I2C0_SLAVE_SIMR_R (*((reg32_t *)0x4002080C))
I2C registers (I2C0 SLAVE)
#define | I2C0_SLAVE_SRIS_R (*((reg32_t *)0x40020810))
I2C registers (I2C0 SLAVE)
#define | I2C0_SLAVE_MIMR_R (*((reg32_t *)0x40020810))
I2C registers (I2C0 SLAVE)
#define | I2C0_SLAVE_MRIS_R (*((reg32_t *)0x40020814))
I2C registers (I2C0 SLAVE)
#define | I2C0_SLAVE_SMIS_R (*((reg32_t *)0x40020814))
I2C registers (I2C0 SLAVE)
#define | I2C0_SLAVE_SICR_R (*((reg32_t *)0x40020818))
I2C registers (I2C0 SLAVE)
#define | I2C0_SLAVE_MMIS_R (*((reg32_t *)0x40020818))
I2C registers (I2C0 SLAVE)
#define | I2C0_SLAVE_MICR_R (*((reg32_t *)0x4002081C))
I2C registers (I2C0 SLAVE)
#define | I2C0_SLAVE_MCR_R (*((reg32_t *)0x40020820))
I2C registers (I2C0 SLAVE)
#define | I2C1_MASTER_MSA_R (*((reg32_t *)0x40021000))
I2C registers (I2C1 MASTER)
#define | I2C1_MASTER_SOAR_R (*((reg32_t *)0x40021000))
I2C registers (I2C1 MASTER)
#define | I2C1_MASTER_SCSR_R (*((reg32_t *)0x40021004))
I2C registers (I2C1 MASTER)
#define | I2C1_MASTER_MCS_R (*((reg32_t *)0x40021004))
I2C registers (I2C1 MASTER)
#define | I2C1_MASTER_SDR_R (*((reg32_t *)0x40021008))
I2C registers (I2C1 MASTER)
#define | I2C1_MASTER_MDR_R (*((reg32_t *)0x40021008))
I2C registers (I2C1 MASTER)
#define | I2C1_MASTER_MTPR_R (*((reg32_t *)0x4002100C))
I2C registers (I2C1 MASTER)
#define | I2C1_MASTER_SIMR_R (*((reg32_t *)0x4002100C))
I2C registers (I2C1 MASTER)
#define | I2C1_MASTER_SRIS_R (*((reg32_t *)0x40021010))
I2C registers (I2C1 MASTER)
#define | I2C1_MASTER_MIMR_R (*((reg32_t *)0x40021010))
I2C registers (I2C1 MASTER)
#define | I2C1_MASTER_MRIS_R (*((reg32_t *)0x40021014))
I2C registers (I2C1 MASTER)
#define | I2C1_MASTER_SMIS_R (*((reg32_t *)0x40021014))
I2C registers (I2C1 MASTER)
#define | I2C1_MASTER_SICR_R (*((reg32_t *)0x40021018))
I2C registers (I2C1 MASTER)
#define | I2C1_MASTER_MMIS_R (*((reg32_t *)0x40021018))
I2C registers (I2C1 MASTER)
#define | I2C1_MASTER_MICR_R (*((reg32_t *)0x4002101C))
I2C registers (I2C1 MASTER)
#define | I2C1_MASTER_MCR_R (*((reg32_t *)0x40021020))
I2C registers (I2C1 MASTER)
#define | I2C1_SLAVE_MSA_R (*((reg32_t *)0x40021800))
I2C registers (I2C1 SLAVE)
#define | I2C1_SLAVE_SOAR_R (*((reg32_t *)0x40021800))
I2C registers (I2C1 SLAVE)
#define | I2C1_SLAVE_SCSR_R (*((reg32_t *)0x40021804))
I2C registers (I2C1 SLAVE)
#define | I2C1_SLAVE_MCS_R (*((reg32_t *)0x40021804))
I2C registers (I2C1 SLAVE)
#define | I2C1_SLAVE_SDR_R (*((reg32_t *)0x40021808))
I2C registers (I2C1 SLAVE)
#define | I2C1_SLAVE_MDR_R (*((reg32_t *)0x40021808))
I2C registers (I2C1 SLAVE)
#define | I2C1_SLAVE_MTPR_R (*((reg32_t *)0x4002180C))
I2C registers (I2C1 SLAVE)
#define | I2C1_SLAVE_SIMR_R (*((reg32_t *)0x4002180C))
I2C registers (I2C1 SLAVE)
#define | I2C1_SLAVE_SRIS_R (*((reg32_t *)0x40021810))
I2C registers (I2C1 SLAVE)
#define | I2C1_SLAVE_MIMR_R (*((reg32_t *)0x40021810))
I2C registers (I2C1 SLAVE)
#define | I2C1_SLAVE_MRIS_R (*((reg32_t *)0x40021814))
I2C registers (I2C1 SLAVE)
#define | I2C1_SLAVE_SMIS_R (*((reg32_t *)0x40021814))
I2C registers (I2C1 SLAVE)
#define | I2C1_SLAVE_SICR_R (*((reg32_t *)0x40021818))
I2C registers (I2C1 SLAVE)
#define | I2C1_SLAVE_MMIS_R (*((reg32_t *)0x40021818))
I2C registers (I2C1 SLAVE)
#define | I2C1_SLAVE_MICR_R (*((reg32_t *)0x4002181C))
I2C registers (I2C1 SLAVE)
#define | I2C1_SLAVE_MCR_R (*((reg32_t *)0x40021820))
I2C registers (I2C1 SLAVE)
#define | GPIO_PORTE_DATA_BITS_R ((reg32_t *)0x40024000)
GPIO registers (PORTE)
#define | GPIO_PORTE_DATA_R (*((reg32_t *)0x400243FC))
GPIO registers (PORTE)
#define | GPIO_PORTE_DIR_R (*((reg32_t *)0x40024400))
GPIO registers (PORTE)
#define | GPIO_PORTE_IS_R (*((reg32_t *)0x40024404))
GPIO registers (PORTE)
#define | GPIO_PORTE_IBE_R (*((reg32_t *)0x40024408))
GPIO registers (PORTE)
#define | GPIO_PORTE_IEV_R (*((reg32_t *)0x4002440C))
GPIO registers (PORTE)
#define | GPIO_PORTE_IM_R (*((reg32_t *)0x40024410))
GPIO registers (PORTE)
#define | GPIO_PORTE_RIS_R (*((reg32_t *)0x40024414))
GPIO registers (PORTE)
#define | GPIO_PORTE_MIS_R (*((reg32_t *)0x40024418))
GPIO registers (PORTE)
#define | GPIO_PORTE_ICR_R (*((reg32_t *)0x4002441C))
GPIO registers (PORTE)
#define | GPIO_PORTE_AFSEL_R (*((reg32_t *)0x40024420))
GPIO registers (PORTE)
#define | GPIO_PORTE_DR2R_R (*((reg32_t *)0x40024500))
GPIO registers (PORTE)
#define | GPIO_PORTE_DR4R_R (*((reg32_t *)0x40024504))
GPIO registers (PORTE)
#define | GPIO_PORTE_DR8R_R (*((reg32_t *)0x40024508))
GPIO registers (PORTE)
#define | GPIO_PORTE_ODR_R (*((reg32_t *)0x4002450C))
GPIO registers (PORTE)
#define | GPIO_PORTE_PUR_R (*((reg32_t *)0x40024510))
GPIO registers (PORTE)
#define | GPIO_PORTE_PDR_R (*((reg32_t *)0x40024514))
GPIO registers (PORTE)
#define | GPIO_PORTE_SLR_R (*((reg32_t *)0x40024518))
GPIO registers (PORTE)
#define | GPIO_PORTE_DEN_R (*((reg32_t *)0x4002451C))
GPIO registers (PORTE)
#define | GPIO_PORTE_LOCK_R (*((reg32_t *)0x40024520))
GPIO registers (PORTE)
#define | GPIO_PORTE_CR_R (*((reg32_t *)0x40024524))
GPIO registers (PORTE)
#define | GPIO_PORTF_DATA_BITS_R ((reg32_t *)0x40025000)
GPIO registers (PORTF)
#define | GPIO_PORTF_DATA_R (*((reg32_t *)0x400253FC))
GPIO registers (PORTF)
#define | GPIO_PORTF_DIR_R (*((reg32_t *)0x40025400))
GPIO registers (PORTF)
#define | GPIO_PORTF_IS_R (*((reg32_t *)0x40025404))
GPIO registers (PORTF)
#define | GPIO_PORTF_IBE_R (*((reg32_t *)0x40025408))
GPIO registers (PORTF)
#define | GPIO_PORTF_IEV_R (*((reg32_t *)0x4002540C))
GPIO registers (PORTF)
#define | GPIO_PORTF_IM_R (*((reg32_t *)0x40025410))
GPIO registers (PORTF)
#define | GPIO_PORTF_RIS_R (*((reg32_t *)0x40025414))
GPIO registers (PORTF)
#define | GPIO_PORTF_MIS_R (*((reg32_t *)0x40025418))
GPIO registers (PORTF)
#define | GPIO_PORTF_ICR_R (*((reg32_t *)0x4002541C))
GPIO registers (PORTF)
#define | GPIO_PORTF_AFSEL_R (*((reg32_t *)0x40025420))
GPIO registers (PORTF)
#define | GPIO_PORTF_DR2R_R (*((reg32_t *)0x40025500))
GPIO registers (PORTF)
#define | GPIO_PORTF_DR4R_R (*((reg32_t *)0x40025504))
GPIO registers (PORTF)
#define | GPIO_PORTF_DR8R_R (*((reg32_t *)0x40025508))
GPIO registers (PORTF)
#define | GPIO_PORTF_ODR_R (*((reg32_t *)0x4002550C))
GPIO registers (PORTF)
#define | GPIO_PORTF_PUR_R (*((reg32_t *)0x40025510))
GPIO registers (PORTF)
#define | GPIO_PORTF_PDR_R (*((reg32_t *)0x40025514))
GPIO registers (PORTF)
#define | GPIO_PORTF_SLR_R (*((reg32_t *)0x40025518))
GPIO registers (PORTF)
#define | GPIO_PORTF_DEN_R (*((reg32_t *)0x4002551C))
GPIO registers (PORTF)
#define | GPIO_PORTF_LOCK_R (*((reg32_t *)0x40025520))
GPIO registers (PORTF)
#define | GPIO_PORTF_CR_R (*((reg32_t *)0x40025524))
GPIO registers (PORTF)
#define | GPIO_PORTG_DATA_BITS_R ((reg32_t *)0x40026000)
GPIO registers (PORTG)
#define | GPIO_PORTG_DATA_R (*((reg32_t *)0x400263FC))
GPIO registers (PORTG)
#define | GPIO_PORTG_DIR_R (*((reg32_t *)0x40026400))
GPIO registers (PORTG)
#define | GPIO_PORTG_IS_R (*((reg32_t *)0x40026404))
GPIO registers (PORTG)
#define | GPIO_PORTG_IBE_R (*((reg32_t *)0x40026408))
GPIO registers (PORTG)
#define | GPIO_PORTG_IEV_R (*((reg32_t *)0x4002640C))
GPIO registers (PORTG)
#define | GPIO_PORTG_IM_R (*((reg32_t *)0x40026410))
GPIO registers (PORTG)
#define | GPIO_PORTG_RIS_R (*((reg32_t *)0x40026414))
GPIO registers (PORTG)
#define | GPIO_PORTG_MIS_R (*((reg32_t *)0x40026418))
GPIO registers (PORTG)
#define | GPIO_PORTG_ICR_R (*((reg32_t *)0x4002641C))
GPIO registers (PORTG)
#define | GPIO_PORTG_AFSEL_R (*((reg32_t *)0x40026420))
GPIO registers (PORTG)
#define | GPIO_PORTG_DR2R_R (*((reg32_t *)0x40026500))
GPIO registers (PORTG)
#define | GPIO_PORTG_DR4R_R (*((reg32_t *)0x40026504))
GPIO registers (PORTG)
#define | GPIO_PORTG_DR8R_R (*((reg32_t *)0x40026508))
GPIO registers (PORTG)
#define | GPIO_PORTG_ODR_R (*((reg32_t *)0x4002650C))
GPIO registers (PORTG)
#define | GPIO_PORTG_PUR_R (*((reg32_t *)0x40026510))
GPIO registers (PORTG)
#define | GPIO_PORTG_PDR_R (*((reg32_t *)0x40026514))
GPIO registers (PORTG)
#define | GPIO_PORTG_SLR_R (*((reg32_t *)0x40026518))
GPIO registers (PORTG)
#define | GPIO_PORTG_DEN_R (*((reg32_t *)0x4002651C))
GPIO registers (PORTG)
#define | GPIO_PORTG_LOCK_R (*((reg32_t *)0x40026520))
GPIO registers (PORTG)
#define | GPIO_PORTG_CR_R (*((reg32_t *)0x40026524))
GPIO registers (PORTG)
#define | GPIO_PORTH_DATA_BITS_R ((reg32_t *)0x40027000)
GPIO registers (PORTH)
#define | GPIO_PORTH_DATA_R (*((reg32_t *)0x400273FC))
GPIO registers (PORTH)
#define | GPIO_PORTH_DIR_R (*((reg32_t *)0x40027400))
GPIO registers (PORTH)
#define | GPIO_PORTH_IS_R (*((reg32_t *)0x40027404))
GPIO registers (PORTH)
#define | GPIO_PORTH_IBE_R (*((reg32_t *)0x40027408))
GPIO registers (PORTH)
#define | GPIO_PORTH_IEV_R (*((reg32_t *)0x4002740C))
GPIO registers (PORTH)
#define | GPIO_PORTH_IM_R (*((reg32_t *)0x40027410))
GPIO registers (PORTH)
#define | GPIO_PORTH_RIS_R (*((reg32_t *)0x40027414))
GPIO registers (PORTH)
#define | GPIO_PORTH_MIS_R (*((reg32_t *)0x40027418))
GPIO registers (PORTH)
#define | GPIO_PORTH_ICR_R (*((reg32_t *)0x4002741C))
GPIO registers (PORTH)
#define | GPIO_PORTH_AFSEL_R (*((reg32_t *)0x40027420))
GPIO registers (PORTH)
#define | GPIO_PORTH_DR2R_R (*((reg32_t *)0x40027500))
GPIO registers (PORTH)
#define | GPIO_PORTH_DR4R_R (*((reg32_t *)0x40027504))
GPIO registers (PORTH)
#define | GPIO_PORTH_DR8R_R (*((reg32_t *)0x40027508))
GPIO registers (PORTH)
#define | GPIO_PORTH_ODR_R (*((reg32_t *)0x4002750C))
GPIO registers (PORTH)
#define | GPIO_PORTH_PUR_R (*((reg32_t *)0x40027510))
GPIO registers (PORTH)
#define | GPIO_PORTH_PDR_R (*((reg32_t *)0x40027514))
GPIO registers (PORTH)
#define | GPIO_PORTH_SLR_R (*((reg32_t *)0x40027518))
GPIO registers (PORTH)
#define | GPIO_PORTH_DEN_R (*((reg32_t *)0x4002751C))
GPIO registers (PORTH)
#define | GPIO_PORTH_LOCK_R (*((reg32_t *)0x40027520))
GPIO registers (PORTH)
#define | GPIO_PORTH_CR_R (*((reg32_t *)0x40027524))
GPIO registers (PORTH)
#define | PWM_CTL_R (*((reg32_t *)0x40028000))
PWM registers (PWM)
#define | PWM_SYNC_R (*((reg32_t *)0x40028004))
PWM registers (PWM)
#define | PWM_ENABLE_R (*((reg32_t *)0x40028008))
PWM registers (PWM)
#define | PWM_INVERT_R (*((reg32_t *)0x4002800C))
PWM registers (PWM)
#define | PWM_FAULT_R (*((reg32_t *)0x40028010))
PWM registers (PWM)
#define | PWM_INTEN_R (*((reg32_t *)0x40028014))
PWM registers (PWM)
#define | PWM_RIS_R (*((reg32_t *)0x40028018))
PWM registers (PWM)
#define | PWM_ISC_R (*((reg32_t *)0x4002801C))
PWM registers (PWM)
#define | PWM_STATUS_R (*((reg32_t *)0x40028020))
PWM registers (PWM)
#define | PWM_0_CTL_R (*((reg32_t *)0x40028040))
PWM registers (PWM)
#define | PWM_0_INTEN_R (*((reg32_t *)0x40028044))
PWM registers (PWM)
#define | PWM_0_RIS_R (*((reg32_t *)0x40028048))
PWM registers (PWM)
#define | PWM_0_ISC_R (*((reg32_t *)0x4002804C))
PWM registers (PWM)
#define | PWM_0_LOAD_R (*((reg32_t *)0x40028050))
PWM registers (PWM)
#define | PWM_0_COUNT_R (*((reg32_t *)0x40028054))
PWM registers (PWM)
#define | PWM_0_CMPA_R (*((reg32_t *)0x40028058))
PWM registers (PWM)
#define | PWM_0_CMPB_R (*((reg32_t *)0x4002805C))
PWM registers (PWM)
#define | PWM_0_GENA_R (*((reg32_t *)0x40028060))
PWM registers (PWM)
#define | PWM_0_GENB_R (*((reg32_t *)0x40028064))
PWM registers (PWM)
#define | PWM_0_DBCTL_R (*((reg32_t *)0x40028068))
PWM registers (PWM)
#define | PWM_0_DBRISE_R (*((reg32_t *)0x4002806C))
PWM registers (PWM)
#define | PWM_0_DBFALL_R (*((reg32_t *)0x40028070))
PWM registers (PWM)
#define | PWM_1_CTL_R (*((reg32_t *)0x40028080))
PWM registers (PWM)
#define | PWM_1_INTEN_R (*((reg32_t *)0x40028084))
PWM registers (PWM)
#define | PWM_1_RIS_R (*((reg32_t *)0x40028088))
PWM registers (PWM)
#define | PWM_1_ISC_R (*((reg32_t *)0x4002808C))
PWM registers (PWM)
#define | PWM_1_LOAD_R (*((reg32_t *)0x40028090))
PWM registers (PWM)
#define | PWM_1_COUNT_R (*((reg32_t *)0x40028094))
PWM registers (PWM)
#define | PWM_1_CMPA_R (*((reg32_t *)0x40028098))
PWM registers (PWM)
#define | PWM_1_CMPB_R (*((reg32_t *)0x4002809C))
PWM registers (PWM)
#define | PWM_1_GENA_R (*((reg32_t *)0x400280A0))
PWM registers (PWM)
#define | PWM_1_GENB_R (*((reg32_t *)0x400280A4))
PWM registers (PWM)
#define | PWM_1_DBCTL_R (*((reg32_t *)0x400280A8))
PWM registers (PWM)
#define | PWM_1_DBRISE_R (*((reg32_t *)0x400280AC))
PWM registers (PWM)
#define | PWM_1_DBFALL_R (*((reg32_t *)0x400280B0))
PWM registers (PWM)
#define | PWM_2_CTL_R (*((reg32_t *)0x400280C0))
PWM registers (PWM)
#define | PWM_2_INTEN_R (*((reg32_t *)0x400280C4))
PWM registers (PWM)
#define | PWM_2_RIS_R (*((reg32_t *)0x400280C8))
PWM registers (PWM)
#define | PWM_2_ISC_R (*((reg32_t *)0x400280CC))
PWM registers (PWM)
#define | PWM_2_LOAD_R (*((reg32_t *)0x400280D0))
PWM registers (PWM)
#define | PWM_2_COUNT_R (*((reg32_t *)0x400280D4))
PWM registers (PWM)
#define | PWM_2_CMPA_R (*((reg32_t *)0x400280D8))
PWM registers (PWM)
#define | PWM_2_CMPB_R (*((reg32_t *)0x400280DC))
PWM registers (PWM)
#define | PWM_2_GENA_R (*((reg32_t *)0x400280E0))
PWM registers (PWM)
#define | PWM_2_GENB_R (*((reg32_t *)0x400280E4))
PWM registers (PWM)
#define | PWM_2_DBCTL_R (*((reg32_t *)0x400280E8))
PWM registers (PWM)
#define | PWM_2_DBRISE_R (*((reg32_t *)0x400280EC))
PWM registers (PWM)
#define | PWM_2_DBFALL_R (*((reg32_t *)0x400280F0))
PWM registers (PWM)
#define | QEI0_CTL_R (*((reg32_t *)0x4002C000))
QEI registers (QEI0)
#define | QEI0_STAT_R (*((reg32_t *)0x4002C004))
QEI registers (QEI0)
#define | QEI0_POS_R (*((reg32_t *)0x4002C008))
QEI registers (QEI0)
#define | QEI0_MAXPOS_R (*((reg32_t *)0x4002C00C))
QEI registers (QEI0)
#define | QEI0_LOAD_R (*((reg32_t *)0x4002C010))
QEI registers (QEI0)
#define | QEI0_TIME_R (*((reg32_t *)0x4002C014))
QEI registers (QEI0)
#define | QEI0_COUNT_R (*((reg32_t *)0x4002C018))
QEI registers (QEI0)
#define | QEI0_SPEED_R (*((reg32_t *)0x4002C01C))
QEI registers (QEI0)
#define | QEI0_INTEN_R (*((reg32_t *)0x4002C020))
QEI registers (QEI0)
#define | QEI0_RIS_R (*((reg32_t *)0x4002C024))
QEI registers (QEI0)
#define | QEI0_ISC_R (*((reg32_t *)0x4002C028))
QEI registers (QEI0)
#define | QEI1_CTL_R (*((reg32_t *)0x4002D000))
QEI registers (QEI1)
#define | QEI1_STAT_R (*((reg32_t *)0x4002D004))
QEI registers (QEI1)
#define | QEI1_POS_R (*((reg32_t *)0x4002D008))
QEI registers (QEI1)
#define | QEI1_MAXPOS_R (*((reg32_t *)0x4002D00C))
QEI registers (QEI1)
#define | QEI1_LOAD_R (*((reg32_t *)0x4002D010))
QEI registers (QEI1)
#define | QEI1_TIME_R (*((reg32_t *)0x4002D014))
QEI registers (QEI1)
#define | QEI1_COUNT_R (*((reg32_t *)0x4002D018))
QEI registers (QEI1)
#define | QEI1_SPEED_R (*((reg32_t *)0x4002D01C))
QEI registers (QEI1)
#define | QEI1_INTEN_R (*((reg32_t *)0x4002D020))
QEI registers (QEI1)
#define | QEI1_RIS_R (*((reg32_t *)0x4002D024))
QEI registers (QEI1)
#define | QEI1_ISC_R (*((reg32_t *)0x4002D028))
QEI registers (QEI1)
#define | TIMER0_CFG_R (*((reg32_t *)0x40030000))
Timer registers (TIMER0)
#define | TIMER0_TAMR_R (*((reg32_t *)0x40030004))
Timer registers (TIMER0)
#define | TIMER0_TBMR_R (*((reg32_t *)0x40030008))
Timer registers (TIMER0)
#define | TIMER0_CTL_R (*((reg32_t *)0x4003000C))
Timer registers (TIMER0)
#define | TIMER0_IMR_R (*((reg32_t *)0x40030018))
Timer registers (TIMER0)
#define | TIMER0_RIS_R (*((reg32_t *)0x4003001C))
Timer registers (TIMER0)
#define | TIMER0_MIS_R (*((reg32_t *)0x40030020))
Timer registers (TIMER0)
#define | TIMER0_ICR_R (*((reg32_t *)0x40030024))
Timer registers (TIMER0)
#define | TIMER0_TAILR_R (*((reg32_t *)0x40030028))
Timer registers (TIMER0)
#define | TIMER0_TBILR_R (*((reg32_t *)0x4003002C))
Timer registers (TIMER0)
#define | TIMER0_TAMATCHR_R (*((reg32_t *)0x40030030))
Timer registers (TIMER0)
#define | TIMER0_TBMATCHR_R (*((reg32_t *)0x40030034))
Timer registers (TIMER0)
#define | TIMER0_TAPR_R (*((reg32_t *)0x40030038))
Timer registers (TIMER0)
#define | TIMER0_TBPR_R (*((reg32_t *)0x4003003C))
Timer registers (TIMER0)
#define | TIMER0_TAPMR_R (*((reg32_t *)0x40030040))
Timer registers (TIMER0)
#define | TIMER0_TBPMR_R (*((reg32_t *)0x40030044))
Timer registers (TIMER0)
#define | TIMER0_TAR_R (*((reg32_t *)0x40030048))
Timer registers (TIMER0)
#define | TIMER0_TBR_R (*((reg32_t *)0x4003004C))
Timer registers (TIMER0)
#define | TIMER1_CFG_R (*((reg32_t *)0x40031000))
Timer registers (TIMER1)
#define | TIMER1_TAMR_R (*((reg32_t *)0x40031004))
Timer registers (TIMER1)
#define | TIMER1_TBMR_R (*((reg32_t *)0x40031008))
Timer registers (TIMER1)
#define | TIMER1_CTL_R (*((reg32_t *)0x4003100C))
Timer registers (TIMER1)
#define | TIMER1_IMR_R (*((reg32_t *)0x40031018))
Timer registers (TIMER1)
#define | TIMER1_RIS_R (*((reg32_t *)0x4003101C))
Timer registers (TIMER1)
#define | TIMER1_MIS_R (*((reg32_t *)0x40031020))
Timer registers (TIMER1)
#define | TIMER1_ICR_R (*((reg32_t *)0x40031024))
Timer registers (TIMER1)
#define | TIMER1_TAILR_R (*((reg32_t *)0x40031028))
Timer registers (TIMER1)
#define | TIMER1_TBILR_R (*((reg32_t *)0x4003102C))
Timer registers (TIMER1)
#define | TIMER1_TAMATCHR_R (*((reg32_t *)0x40031030))
Timer registers (TIMER1)
#define | TIMER1_TBMATCHR_R (*((reg32_t *)0x40031034))
Timer registers (TIMER1)
#define | TIMER1_TAPR_R (*((reg32_t *)0x40031038))
Timer registers (TIMER1)
#define | TIMER1_TBPR_R (*((reg32_t *)0x4003103C))
Timer registers (TIMER1)
#define | TIMER1_TAPMR_R (*((reg32_t *)0x40031040))
Timer registers (TIMER1)
#define | TIMER1_TBPMR_R (*((reg32_t *)0x40031044))
Timer registers (TIMER1)
#define | TIMER1_TAR_R (*((reg32_t *)0x40031048))
Timer registers (TIMER1)
#define | TIMER1_TBR_R (*((reg32_t *)0x4003104C))
Timer registers (TIMER1)
#define | TIMER2_CFG_R (*((reg32_t *)0x40032000))
Timer registers (TIMER2)
#define | TIMER2_TAMR_R (*((reg32_t *)0x40032004))
Timer registers (TIMER2)
#define | TIMER2_TBMR_R (*((reg32_t *)0x40032008))
Timer registers (TIMER2)
#define | TIMER2_CTL_R (*((reg32_t *)0x4003200C))
Timer registers (TIMER2)
#define | TIMER2_IMR_R (*((reg32_t *)0x40032018))
Timer registers (TIMER2)
#define | TIMER2_RIS_R (*((reg32_t *)0x4003201C))
Timer registers (TIMER2)
#define | TIMER2_MIS_R (*((reg32_t *)0x40032020))
Timer registers (TIMER2)
#define | TIMER2_ICR_R (*((reg32_t *)0x40032024))
Timer registers (TIMER2)
#define | TIMER2_TAILR_R (*((reg32_t *)0x40032028))
Timer registers (TIMER2)
#define | TIMER2_TBILR_R (*((reg32_t *)0x4003202C))
Timer registers (TIMER2)
#define | TIMER2_TAMATCHR_R (*((reg32_t *)0x40032030))
Timer registers (TIMER2)
#define | TIMER2_TBMATCHR_R (*((reg32_t *)0x40032034))
Timer registers (TIMER2)
#define | TIMER2_TAPR_R (*((reg32_t *)0x40032038))
Timer registers (TIMER2)
#define | TIMER2_TBPR_R (*((reg32_t *)0x4003203C))
Timer registers (TIMER2)
#define | TIMER2_TAPMR_R (*((reg32_t *)0x40032040))
Timer registers (TIMER2)
#define | TIMER2_TBPMR_R (*((reg32_t *)0x40032044))
Timer registers (TIMER2)
#define | TIMER2_TAR_R (*((reg32_t *)0x40032048))
Timer registers (TIMER2)
#define | TIMER2_TBR_R (*((reg32_t *)0x4003204C))
Timer registers (TIMER2)
#define | TIMER3_CFG_R (*((reg32_t *)0x40033000))
Timer registers (TIMER3)
#define | TIMER3_TAMR_R (*((reg32_t *)0x40033004))
Timer registers (TIMER3)
#define | TIMER3_TBMR_R (*((reg32_t *)0x40033008))
Timer registers (TIMER3)
#define | TIMER3_CTL_R (*((reg32_t *)0x4003300C))
Timer registers (TIMER3)
#define | TIMER3_IMR_R (*((reg32_t *)0x40033018))
Timer registers (TIMER3)
#define | TIMER3_RIS_R (*((reg32_t *)0x4003301C))
Timer registers (TIMER3)
#define | TIMER3_MIS_R (*((reg32_t *)0x40033020))
Timer registers (TIMER3)
#define | TIMER3_ICR_R (*((reg32_t *)0x40033024))
Timer registers (TIMER3)
#define | TIMER3_TAILR_R (*((reg32_t *)0x40033028))
Timer registers (TIMER3)
#define | TIMER3_TBILR_R (*((reg32_t *)0x4003302C))
Timer registers (TIMER3)
#define | TIMER3_TAMATCHR_R (*((reg32_t *)0x40033030))
Timer registers (TIMER3)
#define | TIMER3_TBMATCHR_R (*((reg32_t *)0x40033034))
Timer registers (TIMER3)
#define | TIMER3_TAPR_R (*((reg32_t *)0x40033038))
Timer registers (TIMER3)
#define | TIMER3_TBPR_R (*((reg32_t *)0x4003303C))
Timer registers (TIMER3)
#define | TIMER3_TAPMR_R (*((reg32_t *)0x40033040))
Timer registers (TIMER3)
#define | TIMER3_TBPMR_R (*((reg32_t *)0x40033044))
Timer registers (TIMER3)
#define | TIMER3_TAR_R (*((reg32_t *)0x40033048))
Timer registers (TIMER3)
#define | TIMER3_TBR_R (*((reg32_t *)0x4003304C))
Timer registers (TIMER3)
#define | ADC0_ACTSS_R (*((reg32_t *)0x40038000))
ADC registers (ADC0)
#define | ADC0_RIS_R (*((reg32_t *)0x40038004))
ADC registers (ADC0)
#define | ADC0_IM_R (*((reg32_t *)0x40038008))
ADC registers (ADC0)
#define | ADC0_ISC_R (*((reg32_t *)0x4003800C))
ADC registers (ADC0)
#define | ADC0_OSTAT_R (*((reg32_t *)0x40038010))
ADC registers (ADC0)
#define | ADC0_EMUX_R (*((reg32_t *)0x40038014))
ADC registers (ADC0)
#define | ADC0_USTAT_R (*((reg32_t *)0x40038018))
ADC registers (ADC0)
#define | ADC0_SSPRI_R (*((reg32_t *)0x40038020))
ADC registers (ADC0)
#define | ADC0_PSSI_R (*((reg32_t *)0x40038028))
ADC registers (ADC0)
#define | ADC0_SAC_R (*((reg32_t *)0x40038030))
ADC registers (ADC0)
#define | ADC0_SSMUX0_R (*((reg32_t *)0x40038040))
ADC registers (ADC0)
#define | ADC0_SSCTL0_R (*((reg32_t *)0x40038044))
ADC registers (ADC0)
#define | ADC0_SSFIFO0_R (*((reg32_t *)0x40038048))
ADC registers (ADC0)
#define | ADC0_SSFSTAT0_R (*((reg32_t *)0x4003804C))
ADC registers (ADC0)
#define | ADC0_SSMUX1_R (*((reg32_t *)0x40038060))
ADC registers (ADC0)
#define | ADC0_SSCTL1_R (*((reg32_t *)0x40038064))
ADC registers (ADC0)
#define | ADC0_SSFIFO1_R (*((reg32_t *)0x40038068))
ADC registers (ADC0)
#define | ADC0_SSFSTAT1_R (*((reg32_t *)0x4003806C))
ADC registers (ADC0)
#define | ADC0_SSMUX2_R (*((reg32_t *)0x40038080))
ADC registers (ADC0)
#define | ADC0_SSCTL2_R (*((reg32_t *)0x40038084))
ADC registers (ADC0)
#define | ADC0_SSFIFO2_R (*((reg32_t *)0x40038088))
ADC registers (ADC0)
#define | ADC0_SSFSTAT2_R (*((reg32_t *)0x4003808C))
ADC registers (ADC0)
#define | ADC0_SSMUX3_R (*((reg32_t *)0x400380A0))
ADC registers (ADC0)
#define | ADC0_SSCTL3_R (*((reg32_t *)0x400380A4))
ADC registers (ADC0)
#define | ADC0_SSFIFO3_R (*((reg32_t *)0x400380A8))
ADC registers (ADC0)
#define | ADC0_SSFSTAT3_R (*((reg32_t *)0x400380AC))
ADC registers (ADC0)
#define | ADC0_TMLB_R (*((reg32_t *)0x40038100))
ADC registers (ADC0)
#define | COMP_ACMIS_R (*((reg32_t *)0x4003C000))
Comparator registers (COMP)
#define | COMP_ACRIS_R (*((reg32_t *)0x4003C004))
Comparator registers (COMP)
#define | COMP_ACINTEN_R (*((reg32_t *)0x4003C008))
Comparator registers (COMP)
#define | COMP_ACREFCTL_R (*((reg32_t *)0x4003C010))
Comparator registers (COMP)
#define | COMP_ACSTAT0_R (*((reg32_t *)0x4003C020))
Comparator registers (COMP)
#define | COMP_ACCTL0_R (*((reg32_t *)0x4003C024))
Comparator registers (COMP)
#define | COMP_ACSTAT1_R (*((reg32_t *)0x4003C040))
Comparator registers (COMP)
#define | COMP_ACCTL1_R (*((reg32_t *)0x4003C044))
Comparator registers (COMP)
#define | COMP_ACSTAT2_R (*((reg32_t *)0x4003C060))
Comparator registers (COMP)
#define | COMP_ACCTL2_R (*((reg32_t *)0x4003C064))
Comparator registers (COMP)
#define | HIB_RTCC_R (*((reg32_t *)0x400FC000))
Hibernation module registers (HIB)
#define | HIB_RTCM0_R (*((reg32_t *)0x400FC004))
Hibernation module registers (HIB)
#define | HIB_RTCM1_R (*((reg32_t *)0x400FC008))
Hibernation module registers (HIB)
#define | HIB_RTCLD_R (*((reg32_t *)0x400FC00C))
Hibernation module registers (HIB)
#define | HIB_CTL_R (*((reg32_t *)0x400FC010))
Hibernation module registers (HIB)
#define | HIB_IM_R (*((reg32_t *)0x400FC014))
Hibernation module registers (HIB)
#define | HIB_RIS_R (*((reg32_t *)0x400FC018))
Hibernation module registers (HIB)
#define | HIB_MIS_R (*((reg32_t *)0x400FC01C))
Hibernation module registers (HIB)
#define | HIB_IC_R (*((reg32_t *)0x400FC020))
Hibernation module registers (HIB)
#define | HIB_RTCT_R (*((reg32_t *)0x400FC024))
Hibernation module registers (HIB)
#define | HIB_DATA_R (*((reg32_t *)0x400FC030))
Hibernation module registers (HIB)
#define | FLASH_FMA_R (*((reg32_t *)0x400FD000))
FLASH registers (FLASH CTRL)
#define | FLASH_FMD_R (*((reg32_t *)0x400FD004))
FLASH registers (FLASH CTRL)
#define | FLASH_FMC_R (*((reg32_t *)0x400FD008))
FLASH registers (FLASH CTRL)
#define | FLASH_FCRIS_R (*((reg32_t *)0x400FD00C))
FLASH registers (FLASH CTRL)
#define | FLASH_FCIM_R (*((reg32_t *)0x400FD010))
FLASH registers (FLASH CTRL)
#define | FLASH_FCMISC_R (*((reg32_t *)0x400FD014))
FLASH registers (FLASH CTRL)
#define | FLASH_USECRL_R (*((reg32_t *)0x400FE140))
FLASH registers (FLASH CTRL)
#define | FLASH_USERDBG_R (*((reg32_t *)0x400FE1D0))
FLASH registers (FLASH CTRL)
#define | FLASH_USERREG0_R (*((reg32_t *)0x400FE1E0))
FLASH registers (FLASH CTRL)
#define | FLASH_USERREG1_R (*((reg32_t *)0x400FE1E4))
FLASH registers (FLASH CTRL)
#define | FLASH_FMPRE0_R (*((reg32_t *)0x400FE200))
FLASH registers (FLASH CTRL)
#define | FLASH_FMPRE1_R (*((reg32_t *)0x400FE204))
FLASH registers (FLASH CTRL)
#define | FLASH_FMPRE2_R (*((reg32_t *)0x400FE208))
FLASH registers (FLASH CTRL)
#define | FLASH_FMPRE3_R (*((reg32_t *)0x400FE20C))
FLASH registers (FLASH CTRL)
#define | FLASH_FMPPE0_R (*((reg32_t *)0x400FE400))
FLASH registers (FLASH CTRL)
#define | FLASH_FMPPE1_R (*((reg32_t *)0x400FE404))
FLASH registers (FLASH CTRL)
#define | FLASH_FMPPE2_R (*((reg32_t *)0x400FE408))
FLASH registers (FLASH CTRL)
#define | FLASH_FMPPE3_R (*((reg32_t *)0x400FE40C))
FLASH registers (FLASH CTRL)
#define | SYSCTL_DID0_R (*((reg32_t *)0x400FE000))
System Control registers (SYSCTL)
#define | SYSCTL_DID1_R (*((reg32_t *)0x400FE004))
System Control registers (SYSCTL)
#define | SYSCTL_DC0_R (*((reg32_t *)0x400FE008))
System Control registers (SYSCTL)
#define | SYSCTL_DC1_R (*((reg32_t *)0x400FE010))
System Control registers (SYSCTL)
#define | SYSCTL_DC2_R (*((reg32_t *)0x400FE014))
System Control registers (SYSCTL)
#define | SYSCTL_DC3_R (*((reg32_t *)0x400FE018))
System Control registers (SYSCTL)
#define | SYSCTL_DC4_R (*((reg32_t *)0x400FE01C))
System Control registers (SYSCTL)
#define | SYSCTL_PBORCTL_R (*((reg32_t *)0x400FE030))
System Control registers (SYSCTL)
#define | SYSCTL_LDOPCTL_R (*((reg32_t *)0x400FE034))
System Control registers (SYSCTL)
#define | SYSCTL_SRCR0_R (*((reg32_t *)0x400FE040))
System Control registers (SYSCTL)
#define | SYSCTL_SRCR1_R (*((reg32_t *)0x400FE044))
System Control registers (SYSCTL)
#define | SYSCTL_SRCR2_R (*((reg32_t *)0x400FE048))
System Control registers (SYSCTL)
#define | SYSCTL_RIS_R (*((reg32_t *)0x400FE050))
System Control registers (SYSCTL)
#define | SYSCTL_IMC_R (*((reg32_t *)0x400FE054))
System Control registers (SYSCTL)
#define | SYSCTL_MISC_R (*((reg32_t *)0x400FE058))
System Control registers (SYSCTL)
#define | SYSCTL_RESC_R (*((reg32_t *)0x400FE05C))
System Control registers (SYSCTL)
#define | SYSCTL_RCC_R (*((reg32_t *)0x400FE060))
System Control registers (SYSCTL)
#define | SYSCTL_PLLCFG_R (*((reg32_t *)0x400FE064))
System Control registers (SYSCTL)
#define | SYSCTL_RCC2_R (*((reg32_t *)0x400FE070))
System Control registers (SYSCTL)
#define | SYSCTL_RCGC0_R (*((reg32_t *)0x400FE100))
System Control registers (SYSCTL)
#define | SYSCTL_RCGC1_R (*((reg32_t *)0x400FE104))
System Control registers (SYSCTL)
#define | SYSCTL_RCGC2_R (*((reg32_t *)0x400FE108))
System Control registers (SYSCTL)
#define | SYSCTL_SCGC0_R (*((reg32_t *)0x400FE110))
System Control registers (SYSCTL)
#define | SYSCTL_SCGC1_R (*((reg32_t *)0x400FE114))
System Control registers (SYSCTL)
#define | SYSCTL_SCGC2_R (*((reg32_t *)0x400FE118))
System Control registers (SYSCTL)
#define | SYSCTL_DCGC0_R (*((reg32_t *)0x400FE120))
System Control registers (SYSCTL)
#define | SYSCTL_DCGC1_R (*((reg32_t *)0x400FE124))
System Control registers (SYSCTL)
#define | SYSCTL_DCGC2_R (*((reg32_t *)0x400FE128))
System Control registers (SYSCTL)
#define | SYSCTL_DSLPCLKCFG_R (*((reg32_t *)0x400FE144))
System Control registers (SYSCTL)
#define | NVIC_INT_TYPE_R (*((reg32_t *)0xE000E004))
NVIC registers (NVIC)
#define | NVIC_ST_CTRL_R (*((reg32_t *)0xE000E010))
NVIC registers (NVIC)
#define | NVIC_ST_RELOAD_R (*((reg32_t *)0xE000E014))
NVIC registers (NVIC)
#define | NVIC_ST_CURRENT_R (*((reg32_t *)0xE000E018))
NVIC registers (NVIC)
#define | NVIC_ST_CAL_R (*((reg32_t *)0xE000E01C))
NVIC registers (NVIC)
#define | NVIC_EN0_R (*((reg32_t *)0xE000E100))
NVIC registers (NVIC)
#define | NVIC_EN1_R (*((reg32_t *)0xE000E104))
NVIC registers (NVIC)
#define | NVIC_DIS0_R (*((reg32_t *)0xE000E180))
NVIC registers (NVIC)
#define | NVIC_DIS1_R (*((reg32_t *)0xE000E184))
NVIC registers (NVIC)
#define | NVIC_PEND0_R (*((reg32_t *)0xE000E200))
NVIC registers (NVIC)
#define | NVIC_PEND1_R (*((reg32_t *)0xE000E204))
NVIC registers (NVIC)
#define | NVIC_UNPEND0_R (*((reg32_t *)0xE000E280))
NVIC registers (NVIC)
#define | NVIC_UNPEND1_R (*((reg32_t *)0xE000E284))
NVIC registers (NVIC)
#define | NVIC_ACTIVE0_R (*((reg32_t *)0xE000E300))
NVIC registers (NVIC)
#define | NVIC_ACTIVE1_R (*((reg32_t *)0xE000E304))
NVIC registers (NVIC)
#define | NVIC_PRI0_R (*((reg32_t *)0xE000E400))
NVIC registers (NVIC)
#define | NVIC_PRI1_R (*((reg32_t *)0xE000E404))
NVIC registers (NVIC)
#define | NVIC_PRI2_R (*((reg32_t *)0xE000E408))
NVIC registers (NVIC)
#define | NVIC_PRI3_R (*((reg32_t *)0xE000E40C))
NVIC registers (NVIC)
#define | NVIC_PRI4_R (*((reg32_t *)0xE000E410))
NVIC registers (NVIC)
#define | NVIC_PRI5_R (*((reg32_t *)0xE000E414))
NVIC registers (NVIC)
#define | NVIC_PRI6_R (*((reg32_t *)0xE000E418))
NVIC registers (NVIC)
#define | NVIC_PRI7_R (*((reg32_t *)0xE000E41C))
NVIC registers (NVIC)
#define | NVIC_PRI8_R (*((reg32_t *)0xE000E420))
NVIC registers (NVIC)
#define | NVIC_PRI9_R (*((reg32_t *)0xE000E424))
NVIC registers (NVIC)
#define | NVIC_PRI10_R (*((reg32_t *)0xE000E428))
NVIC registers (NVIC)
#define | NVIC_CPUID_R (*((reg32_t *)0xE000ED00))
NVIC registers (NVIC)
#define | NVIC_INT_CTRL_R (*((reg32_t *)0xE000ED04))
NVIC registers (NVIC)
#define | NVIC_VTABLE_R (*((reg32_t *)0xE000ED08))
NVIC registers (NVIC)
#define | NVIC_APINT_R (*((reg32_t *)0xE000ED0C))
NVIC registers (NVIC)
#define | NVIC_SYS_CTRL_R (*((reg32_t *)0xE000ED10))
NVIC registers (NVIC)
#define | NVIC_CFG_CTRL_R (*((reg32_t *)0xE000ED14))
NVIC registers (NVIC)
#define | NVIC_SYS_PRI1_R (*((reg32_t *)0xE000ED18))
NVIC registers (NVIC)
#define | NVIC_SYS_PRI2_R (*((reg32_t *)0xE000ED1C))
NVIC registers (NVIC)
#define | NVIC_SYS_PRI3_R (*((reg32_t *)0xE000ED20))
NVIC registers (NVIC)
#define | NVIC_SYS_HND_CTRL_R (*((reg32_t *)0xE000ED24))
NVIC registers (NVIC)
#define | NVIC_FAULT_STAT_R (*((reg32_t *)0xE000ED28))
NVIC registers (NVIC)
#define | NVIC_HFAULT_STAT_R (*((reg32_t *)0xE000ED2C))
NVIC registers (NVIC)
#define | NVIC_DEBUG_STAT_R (*((reg32_t *)0xE000ED30))
NVIC registers (NVIC)
#define | NVIC_MM_ADDR_R (*((reg32_t *)0xE000ED34))
NVIC registers (NVIC)
#define | NVIC_FAULT_ADDR_R (*((reg32_t *)0xE000ED38))
NVIC registers (NVIC)
#define | NVIC_MPU_TYPE_R (*((reg32_t *)0xE000ED90))
NVIC registers (NVIC)
#define | NVIC_MPU_CTRL_R (*((reg32_t *)0xE000ED94))
NVIC registers (NVIC)
#define | NVIC_MPU_NUMBER_R (*((reg32_t *)0xE000ED98))
NVIC registers (NVIC)
#define | NVIC_MPU_BASE_R (*((reg32_t *)0xE000ED9C))
NVIC registers (NVIC)
#define | NVIC_MPU_ATTR_R (*((reg32_t *)0xE000EDA0))
NVIC registers (NVIC)
#define | NVIC_DBG_CTRL_R (*((reg32_t *)0xE000EDF0))
NVIC registers (NVIC)
#define | NVIC_DBG_XFER_R (*((reg32_t *)0xE000EDF4))
NVIC registers (NVIC)
#define | NVIC_DBG_DATA_R (*((reg32_t *)0xE000EDF8))
NVIC registers (NVIC)
#define | NVIC_DBG_INT_R (*((reg32_t *)0xE000EDFC))
NVIC registers (NVIC)
#define | NVIC_SW_TRIG_R (*((reg32_t *)0xE000EF00))
NVIC registers (NVIC)
#define | WDT_LOAD_M 0xFFFFFFFF
The following are defines for the bit fields in the WDT_O_LOAD register.
#define | WDT_LOAD_S 0
The following are defines for the bit fields in the WDT_O_LOAD register.
#define | WDT_VALUE_M 0xFFFFFFFF
The following are defines for the bit fields in the WDT_O_VALUE register.
#define | WDT_VALUE_S 0
The following are defines for the bit fields in the WDT_O_VALUE register.
#define | WDT_CTL_RESEN 0x00000002
The following are defines for the bit fields in the WDT_O_CTL register.
#define | WDT_CTL_INTEN 0x00000001
Watchdog Interrupt Enable.
#define | WDT_ICR_M 0xFFFFFFFF
The following are defines for the bit fields in the WDT_O_ICR register.
#define | WDT_ICR_S 0
The following are defines for the bit fields in the WDT_O_ICR register.
#define | WDT_RIS_WDTRIS 0x00000001
The following are defines for the bit fields in the WDT_O_RIS register.
#define | WDT_MIS_WDTMIS 0x00000001
The following are defines for the bit fields in the WDT_O_MIS register.
#define | WDT_TEST_STALL 0x00000100
The following are defines for the bit fields in the WDT_O_TEST register.
#define | WDT_LOCK_M 0xFFFFFFFF
The following are defines for the bit fields in the WDT_O_LOCK register.
#define | WDT_LOCK_UNLOCKED 0x00000000
Unlocked.
#define | WDT_LOCK_LOCKED 0x00000001
Locked.
#define | WDT_LOCK_UNLOCK 0x1ACCE551
Unlocks the watchdog timer.
#define | GPIO_LOCK_M 0xFFFFFFFF
The following are defines for the bit fields in the GPIO_O_LOCK register.
#define | GPIO_LOCK_UNLOCKED 0x00000000
The GPIOCR register is unlocked.
#define | GPIO_LOCK_LOCKED 0x00000001
The GPIOCR register is locked.
#define | GPIO_LOCK_KEY 0x1ACCE551
Unlocks the GPIO_CR register.
#define | SSI_CR0_SCR_M 0x0000FF00
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_SPH 0x00000080
SSI Serial Clock Phase.
#define | SSI_CR0_SPO 0x00000040
SSI Serial Clock Polarity.
#define | SSI_CR0_FRF_M 0x00000030
SSI Frame Format Select.
#define | SSI_CR0_FRF_MOTO 0x00000000
Freescale SPI Frame Format.
#define | SSI_CR0_FRF_TI 0x00000010
Texas Instruments Synchronous.
#define | SSI_CR0_FRF_NMW 0x00000020
MICROWIRE Frame Format.
#define | SSI_CR0_DSS_M 0x0000000F
SSI Data Size Select.
#define | SSI_CR0_DSS_4 0x00000003
4-bit data
#define | SSI_CR0_DSS_5 0x00000004
5-bit data
#define | SSI_CR0_DSS_6 0x00000005
6-bit data
#define | SSI_CR0_DSS_7 0x00000006
7-bit data
#define | SSI_CR0_DSS_8 0x00000007
8-bit data
#define | SSI_CR0_DSS_9 0x00000008
9-bit data
#define | SSI_CR0_DSS_10 0x00000009
10-bit data
#define | SSI_CR0_DSS_11 0x0000000A
11-bit data
#define | SSI_CR0_DSS_12 0x0000000B
12-bit data
#define | SSI_CR0_DSS_13 0x0000000C
13-bit data
#define | SSI_CR0_DSS_14 0x0000000D
14-bit data
#define | SSI_CR0_DSS_15 0x0000000E
15-bit data
#define | SSI_CR0_DSS_16 0x0000000F
16-bit data
#define | SSI_CR0_SCR_S 8
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR1_SOD 0x00000008
The following are defines for the bit fields in the SSI_O_CR1 register.
#define | SSI_CR1_MS 0x00000004
SSI Master/Slave Select.
#define | SSI_CR1_SSE 0x00000002
SSI Synchronous Serial Port.
#define | SSI_CR1_LBM 0x00000001
SSI Loopback Mode.
#define | SSI_DR_DATA_M 0x0000FFFF
The following are defines for the bit fields in the SSI_O_DR register.
#define | SSI_DR_DATA_S 0
The following are defines for the bit fields in the SSI_O_DR register.
#define | SSI_SR_BSY 0x00000010
The following are defines for the bit fields in the SSI_O_SR register.
#define | SSI_SR_RFF 0x00000008
SSI Receive FIFO Full.
#define | SSI_SR_RNE 0x00000004
SSI Receive FIFO Not Empty.
#define | SSI_SR_TNF 0x00000002
SSI Transmit FIFO Not Full.
#define | SSI_SR_TFE 0x00000001
SSI Transmit FIFO Empty.
#define | SSI_CPSR_CPSDVSR_M 0x000000FF
The following are defines for the bit fields in the SSI_O_CPSR register.
#define | SSI_CPSR_CPSDVSR_S 0
The following are defines for the bit fields in the SSI_O_CPSR register.
#define | SSI_IM_TXIM 0x00000008
The following are defines for the bit fields in the SSI_O_IM register.
#define | SSI_IM_RXIM 0x00000004
SSI Receive FIFO Interrupt Mask.
#define | SSI_IM_RTIM 0x00000002
SSI Receive Time-Out Interrupt.
#define | SSI_IM_RORIM 0x00000001
SSI Receive Overrun Interrupt.
#define | SSI_RIS_TXRIS 0x00000008
The following are defines for the bit fields in the SSI_O_RIS register.
#define | SSI_RIS_RXRIS 0x00000004
SSI Receive FIFO Raw Interrupt.
#define | SSI_RIS_RTRIS 0x00000002
SSI Receive Time-Out Raw.
#define | SSI_RIS_RORRIS 0x00000001
SSI Receive Overrun Raw.
#define | SSI_MIS_TXMIS 0x00000008
The following are defines for the bit fields in the SSI_O_MIS register.
#define | SSI_MIS_RXMIS 0x00000004
SSI Receive FIFO Masked.
#define | SSI_MIS_RTMIS 0x00000002
SSI Receive Time-Out Masked.
#define | SSI_MIS_RORMIS 0x00000001
SSI Receive Overrun Masked.
#define | SSI_ICR_RTIC 0x00000002
The following are defines for the bit fields in the SSI_O_ICR register.
#define | SSI_ICR_RORIC 0x00000001
SSI Receive Overrun Interrupt.
#define | UART_DR_OE 0x00000800
The following are defines for the bit fields in the UART_O_DR register.
#define | UART_DR_BE 0x00000400
UART Break Error.
#define | UART_DR_PE 0x00000200
UART Parity Error.
#define | UART_DR_FE 0x00000100
UART Framing Error.
#define | UART_DR_DATA_M 0x000000FF
Data Transmitted or Received.
#define | UART_DR_DATA_S 0
The following are defines for the bit fields in the UART_O_DR register.
#define | UART_RSR_OE 0x00000008
The following are defines for the bit fields in the UART_O_RSR register.
#define | UART_RSR_BE 0x00000004
UART Break Error.
#define | UART_RSR_PE 0x00000002
UART Parity Error.
#define | UART_RSR_FE 0x00000001
UART Framing Error.
#define | UART_ECR_DATA_M 0x000000FF
The following are defines for the bit fields in the UART_O_ECR register.
#define | UART_ECR_DATA_S 0
The following are defines for the bit fields in the UART_O_ECR register.
#define | UART_FR_TXFE 0x00000080
The following are defines for the bit fields in the UART_O_FR register.
#define | UART_FR_RXFF 0x00000040
UART Receive FIFO Full.
#define | UART_FR_TXFF 0x00000020
UART Transmit FIFO Full.
#define | UART_FR_RXFE 0x00000010
UART Receive FIFO Empty.
#define | UART_FR_BUSY 0x00000008
UART Busy.
#define | UART_ILPR_ILPDVSR_M 0x000000FF
The following are defines for the bit fields in the UART_O_ILPR register.
#define | UART_ILPR_ILPDVSR_S 0
The following are defines for the bit fields in the UART_O_ILPR register.
#define | UART_IBRD_DIVINT_M 0x0000FFFF
The following are defines for the bit fields in the UART_O_IBRD register.
#define | UART_IBRD_DIVINT_S 0
The following are defines for the bit fields in the UART_O_IBRD register.
#define | UART_FBRD_DIVFRAC_M 0x0000003F
The following are defines for the bit fields in the UART_O_FBRD register.
#define | UART_FBRD_DIVFRAC_S 0
The following are defines for the bit fields in the UART_O_FBRD register.
#define | UART_LCRH_SPS 0x00000080
The following are defines for the bit fields in the UART_O_LCRH register.
#define | UART_LCRH_WLEN_M 0x00000060
UART Word Length.
#define | UART_LCRH_WLEN_5 0x00000000
5 bits (default)
#define | UART_LCRH_WLEN_6 0x00000020
6 bits
#define | UART_LCRH_WLEN_7 0x00000040
7 bits
#define | UART_LCRH_WLEN_8 0x00000060
8 bits
#define | UART_LCRH_FEN 0x00000010
UART Enable FIFOs.
#define | UART_LCRH_STP2 0x00000008
UART Two Stop Bits Select.
#define | UART_LCRH_EPS 0x00000004
UART Even Parity Select.
#define | UART_LCRH_PEN 0x00000002
UART Parity Enable.
#define | UART_LCRH_BRK 0x00000001
UART Send Break.
#define | UART_CTL_RXE 0x00000200
The following are defines for the bit fields in the UART_O_CTL register.
#define | UART_CTL_TXE 0x00000100
UART Transmit Enable.
#define | UART_CTL_LBE 0x00000080
UART Loop Back Enable.
#define | UART_CTL_SIRLP 0x00000004
UART SIR Low-Power Mode.
#define | UART_CTL_SIREN 0x00000002
UART SIR Enable.
#define | UART_CTL_UARTEN 0x00000001
UART Enable.
#define | UART_IFLS_RX_M 0x00000038
The following are defines for the bit fields in the UART_O_IFLS register.
#define | UART_IFLS_RX1_8 0x00000000
RX FIFO >= 1/8 full.
#define | UART_IFLS_RX2_8 0x00000008
RX FIFO >= 1/4 full.
#define | UART_IFLS_RX4_8 0x00000010
RX FIFO >= 1/2 full (default)
#define | UART_IFLS_RX6_8 0x00000018
RX FIFO >= 3/4 full.
#define | UART_IFLS_RX7_8 0x00000020
RX FIFO >= 7/8 full.
#define | UART_IFLS_TX_M 0x00000007
UART Transmit Interrupt FIFO.
#define | UART_IFLS_TX1_8 0x00000000
TX FIFO <= 1/8 full.
#define | UART_IFLS_TX2_8 0x00000001
TX FIFO <= 1/4 full.
#define | UART_IFLS_TX4_8 0x00000002
TX FIFO <= 1/2 full (default)
#define | UART_IFLS_TX6_8 0x00000003
TX FIFO <= 3/4 full.
#define | UART_IFLS_TX7_8 0x00000004
TX FIFO <= 7/8 full.
#define | UART_IM_OEIM 0x00000400
The following are defines for the bit fields in the UART_O_IM register.
#define | UART_IM_BEIM 0x00000200
UART Break Error Interrupt Mask.
#define | UART_IM_PEIM 0x00000100
UART Parity Error Interrupt Mask.
#define | UART_IM_FEIM 0x00000080
UART Framing Error Interrupt.
#define | UART_IM_RTIM 0x00000040
UART Receive Time-Out Interrupt.
#define | UART_IM_TXIM 0x00000020
UART Transmit Interrupt Mask.
#define | UART_IM_RXIM 0x00000010
UART Receive Interrupt Mask.
#define | UART_RIS_OERIS 0x00000400
The following are defines for the bit fields in the UART_O_RIS register.
#define | UART_RIS_BERIS 0x00000200
UART Break Error Raw Interrupt.
#define | UART_RIS_PERIS 0x00000100
UART Parity Error Raw Interrupt.
#define | UART_RIS_FERIS 0x00000080
UART Framing Error Raw Interrupt.
#define | UART_RIS_RTRIS 0x00000040
UART Receive Time-Out Raw.
#define | UART_RIS_TXRIS 0x00000020
UART Transmit Raw Interrupt.
#define | UART_RIS_RXRIS 0x00000010
UART Receive Raw Interrupt.
#define | UART_MIS_OEMIS 0x00000400
The following are defines for the bit fields in the UART_O_MIS register.
#define | UART_MIS_BEMIS 0x00000200
UART Break Error Masked.
#define | UART_MIS_PEMIS 0x00000100
UART Parity Error Masked.
#define | UART_MIS_FEMIS 0x00000080
UART Framing Error Masked.
#define | UART_MIS_RTMIS 0x00000040
UART Receive Time-Out Masked.
#define | UART_MIS_TXMIS 0x00000020
UART Transmit Masked Interrupt.
#define | UART_MIS_RXMIS 0x00000010
UART Receive Masked Interrupt.
#define | UART_ICR_OEIC 0x00000400
The following are defines for the bit fields in the UART_O_ICR register.
#define | UART_ICR_BEIC 0x00000200
Break Error Interrupt Clear.
#define | UART_ICR_PEIC 0x00000100
Parity Error Interrupt Clear.
#define | UART_ICR_FEIC 0x00000080
Framing Error Interrupt Clear.
#define | UART_ICR_RTIC 0x00000040
Receive Time-Out Interrupt Clear.
#define | UART_ICR_TXIC 0x00000020
Transmit Interrupt Clear.
#define | UART_ICR_RXIC 0x00000010
Receive Interrupt Clear.
#define | I2C_MSA_SA_M 0x000000FE
The following are defines for the bit fields in the I2C_O_MSA register.
#define | I2C_MSA_RS 0x00000001
Receive not send.
#define | I2C_MSA_SA_S 1
The following are defines for the bit fields in the I2C_O_MSA register.
#define | I2C_SOAR_OAR_M 0x0000007F
The following are defines for the bit fields in the I2C_O_SOAR register.
#define | I2C_SOAR_OAR_S 0
The following are defines for the bit fields in the I2C_O_SOAR register.
#define | I2C_SCSR_FBR 0x00000004
The following are defines for the bit fields in the I2C_O_SCSR register.
#define | I2C_SCSR_TREQ 0x00000002
Transmit Request.
#define | I2C_SCSR_DA 0x00000001
Device Active.
#define | I2C_SCSR_RREQ 0x00000001
Receive Request.
#define | I2C_MCS_BUSBSY 0x00000040
The following are defines for the bit fields in the I2C_O_MCS register.
#define | I2C_MCS_IDLE 0x00000020
I2C Idle.
#define | I2C_MCS_ARBLST 0x00000010
Arbitration Lost.
#define | I2C_MCS_ACK 0x00000008
Data Acknowledge Enable.
#define | I2C_MCS_DATACK 0x00000008
Acknowledge Data.
#define | I2C_MCS_ADRACK 0x00000004
Acknowledge Address.
#define | I2C_MCS_STOP 0x00000004
Generate STOP.
#define | I2C_MCS_START 0x00000002
Generate START.
#define | I2C_MCS_ERROR 0x00000002
Error.
#define | I2C_MCS_RUN 0x00000001
I2C Master Enable.
#define | I2C_MCS_BUSY 0x00000001
I2C Busy.
#define | I2C_SDR_DATA_M 0x000000FF
The following are defines for the bit fields in the I2C_O_SDR register.
#define | I2C_SDR_DATA_S 0
The following are defines for the bit fields in the I2C_O_SDR register.
#define | I2C_MDR_DATA_M 0x000000FF
The following are defines for the bit fields in the I2C_O_MDR register.
#define | I2C_MDR_DATA_S 0
The following are defines for the bit fields in the I2C_O_MDR register.
#define | I2C_MTPR_TPR_M 0x000000FF
The following are defines for the bit fields in the I2C_O_MTPR register.
#define | I2C_MTPR_TPR_S 0
The following are defines for the bit fields in the I2C_O_MTPR register.
#define | I2C_SIMR_DATAIM 0x00000001
The following are defines for the bit fields in the I2C_O_SIMR register.
#define | I2C_SRIS_DATARIS 0x00000001
The following are defines for the bit fields in the I2C_O_SRIS register.
#define | I2C_MIMR_IM 0x00000001
The following are defines for the bit fields in the I2C_O_MIMR register.
#define | I2C_MRIS_RIS 0x00000001
The following are defines for the bit fields in the I2C_O_MRIS register.
#define | I2C_SMIS_DATAMIS 0x00000001
The following are defines for the bit fields in the I2C_O_SMIS register.
#define | I2C_SICR_DATAIC 0x00000001
The following are defines for the bit fields in the I2C_O_SICR register.
#define | I2C_MMIS_MIS 0x00000001
The following are defines for the bit fields in the I2C_O_MMIS register.
#define | I2C_MICR_IC 0x00000001
The following are defines for the bit fields in the I2C_O_MICR register.
#define | I2C_MCR_SFE 0x00000020
The following are defines for the bit fields in the I2C_O_MCR register.
#define | I2C_MCR_MFE 0x00000010
I2C Master Function Enable.
#define | I2C_MCR_LPBK 0x00000001
I2C Loopback.
#define | PWM_CTL_GLOBALSYNC2 0x00000004
The following are defines for the bit fields in the PWM_O_CTL register.
#define | PWM_CTL_GLOBALSYNC1 0x00000002
Update PWM Generator 1.
#define | PWM_CTL_GLOBALSYNC0 0x00000001
Update PWM Generator 0.
#define | PWM_SYNC_SYNC2 0x00000004
The following are defines for the bit fields in the PWM_O_SYNC register.
#define | PWM_SYNC_SYNC1 0x00000002
Reset Generator 1 Counter.
#define | PWM_SYNC_SYNC0 0x00000001
Reset Generator 0 Counter.
#define | PWM_ENABLE_PWM5EN 0x00000020
The following are defines for the bit fields in the PWM_O_ENABLE register.
#define | PWM_ENABLE_PWM4EN 0x00000010
PWM4 Output Enable.
#define | PWM_ENABLE_PWM3EN 0x00000008
PWM3 Output Enable.
#define | PWM_ENABLE_PWM2EN 0x00000004
PWM2 Output Enable.
#define | PWM_ENABLE_PWM1EN 0x00000002
PWM1 Output Enable.
#define | PWM_ENABLE_PWM0EN 0x00000001
PWM0 Output Enable.
#define | PWM_INVERT_PWM5INV 0x00000020
The following are defines for the bit fields in the PWM_O_INVERT register.
#define | PWM_INVERT_PWM4INV 0x00000010
Invert PWM4 Signal.
#define | PWM_INVERT_PWM3INV 0x00000008
Invert PWM3 Signal.
#define | PWM_INVERT_PWM2INV 0x00000004
Invert PWM2 Signal.
#define | PWM_INVERT_PWM1INV 0x00000002
Invert PWM1 Signal.
#define | PWM_INVERT_PWM0INV 0x00000001
Invert PWM0 Signal.
#define | PWM_FAULT_FAULT5 0x00000020
The following are defines for the bit fields in the PWM_O_FAULT register.
#define | PWM_FAULT_FAULT4 0x00000010
PWM4 Fault.
#define | PWM_FAULT_FAULT3 0x00000008
PWM3 Fault.
#define | PWM_FAULT_FAULT2 0x00000004
PWM2 Fault.
#define | PWM_FAULT_FAULT1 0x00000002
PWM1 Fault.
#define | PWM_FAULT_FAULT0 0x00000001
PWM0 Fault.
#define | PWM_INTEN_INTFAULT 0x00010000
The following are defines for the bit fields in the PWM_O_INTEN register.
#define | PWM_INTEN_INTPWM2 0x00000004
PWM2 Interrupt Enable.
#define | PWM_INTEN_INTPWM1 0x00000002
PWM1 Interrupt Enable.
#define | PWM_INTEN_INTPWM0 0x00000001
PWM0 Interrupt Enable.
#define | PWM_RIS_INTFAULT 0x00010000
The following are defines for the bit fields in the PWM_O_RIS register.
#define | PWM_RIS_INTPWM2 0x00000004
PWM2 Interrupt Asserted.
#define | PWM_RIS_INTPWM1 0x00000002
PWM1 Interrupt Asserted.
#define | PWM_RIS_INTPWM0 0x00000001
PWM0 Interrupt Asserted.
#define | PWM_ISC_INTFAULT 0x00010000
The following are defines for the bit fields in the PWM_O_ISC register.
#define | PWM_ISC_INTPWM2 0x00000004
PWM2 Interrupt Status.
#define | PWM_ISC_INTPWM1 0x00000002
PWM1 Interrupt Status.
#define | PWM_ISC_INTPWM0 0x00000001
PWM0 Interrupt Status.
#define | PWM_STATUS_FAULT 0x00000001
The following are defines for the bit fields in the PWM_O_STATUS register.
#define | PWM_X_CTL_CMPBUPD 0x00000020
The following are defines for the bit fields in the PWM_O_X_CTL register.
#define | PWM_X_CTL_CMPAUPD 0x00000010
Comparator A Update Mode.
#define | PWM_X_CTL_LOADUPD 0x00000008
Load Register Update Mode.
#define | PWM_X_CTL_DEBUG 0x00000004
Debug Mode.
#define | PWM_X_CTL_MODE 0x00000002
Counter Mode.
#define | PWM_X_CTL_ENABLE 0x00000001
PWM Block Enable.
#define | PWM_X_INTEN_TRCMPBD 0x00002000
The following are defines for the bit fields in the PWM_O_X_INTEN register.
#define | PWM_X_INTEN_TRCMPBU 0x00001000
Trigger for Counter=PWMnCMPB Up.
#define | PWM_X_INTEN_TRCMPAD 0x00000800
Trigger for Counter=PWMnCMPA.
#define | PWM_X_INTEN_TRCMPAU 0x00000400
Trigger for Counter=PWMnCMPA Up.
#define | PWM_X_INTEN_TRCNTLOAD 0x00000200
Trigger for Counter=PWMnLOAD.
#define | PWM_X_INTEN_TRCNTZERO 0x00000100
Trigger for Counter=0.
#define | PWM_X_INTEN_INTCMPBD 0x00000020
Interrupt for Counter=PWMnCMPB.
#define | PWM_X_INTEN_INTCMPBU 0x00000010
Interrupt for Counter=PWMnCMPB.
#define | PWM_X_INTEN_INTCMPAD 0x00000008
Interrupt for Counter=PWMnCMPA.
#define | PWM_X_INTEN_INTCMPAU 0x00000004
Interrupt for Counter=PWMnCMPA.
#define | PWM_X_INTEN_INTCNTLOAD 0x00000002
Interrupt for Counter=PWMnLOAD.
#define | PWM_X_INTEN_INTCNTZERO 0x00000001
Interrupt for Counter=0.
#define | PWM_X_RIS_INTCMPBD 0x00000020
The following are defines for the bit fields in the PWM_O_X_RIS register.
#define | PWM_X_RIS_INTCMPBU 0x00000010
Comparator B Up Interrupt Status.
#define | PWM_X_RIS_INTCMPAD 0x00000008
Comparator A Down Interrupt.
#define | PWM_X_RIS_INTCMPAU 0x00000004
Comparator A Up Interrupt Status.
#define | PWM_X_RIS_INTCNTLOAD 0x00000002
Counter=Load Interrupt Status.
#define | PWM_X_RIS_INTCNTZERO 0x00000001
Counter=0 Interrupt Status.
#define | PWM_X_ISC_INTCMPBD 0x00000020
The following are defines for the bit fields in the PWM_O_X_ISC register.
#define | PWM_X_ISC_INTCMPBU 0x00000010
Comparator B Up Interrupt.
#define | PWM_X_ISC_INTCMPAD 0x00000008
Comparator A Down Interrupt.
#define | PWM_X_ISC_INTCMPAU 0x00000004
Comparator A Up Interrupt.
#define | PWM_X_ISC_INTCNTLOAD 0x00000002
Counter=Load Interrupt.
#define | PWM_X_ISC_INTCNTZERO 0x00000001
Counter=0 Interrupt.
#define | PWM_X_LOAD_M 0x0000FFFF
The following are defines for the bit fields in the PWM_O_X_LOAD register.
#define | PWM_X_LOAD_S 0
The following are defines for the bit fields in the PWM_O_X_LOAD register.
#define | PWM_X_COUNT_M 0x0000FFFF
The following are defines for the bit fields in the PWM_O_X_COUNT register.
#define | PWM_X_COUNT_S 0
The following are defines for the bit fields in the PWM_O_X_COUNT register.
#define | PWM_X_CMPA_M 0x0000FFFF
The following are defines for the bit fields in the PWM_O_X_CMPA register.
#define | PWM_X_CMPA_S 0
The following are defines for the bit fields in the PWM_O_X_CMPA register.
#define | PWM_X_CMPB_M 0x0000FFFF
The following are defines for the bit fields in the PWM_O_X_CMPB register.
#define | PWM_X_CMPB_S 0
The following are defines for the bit fields in the PWM_O_X_CMPB register.
#define | PWM_X_GENA_ACTCMPBD_M 0x00000C00
The following are defines for the bit fields in the PWM_O_X_GENA register.
#define | PWM_X_GENA_ACTCMPBD_NONE 0x00000000
Do nothing.
#define | PWM_X_GENA_ACTCMPBD_INV 0x00000400
Invert pwmA.
#define | PWM_X_GENA_ACTCMPBD_ZERO 0x00000800
Drive pwmA Low.
#define | PWM_X_GENA_ACTCMPBD_ONE 0x00000C00
Drive pwmA High.
#define | PWM_X_GENA_ACTCMPBU_M 0x00000300
Action for Comparator B Up.
#define | PWM_X_GENA_ACTCMPBU_NONE 0x00000000
Do nothing.
#define | PWM_X_GENA_ACTCMPBU_INV 0x00000100
Invert pwmA.
#define | PWM_X_GENA_ACTCMPBU_ZERO 0x00000200
Drive pwmA Low.
#define | PWM_X_GENA_ACTCMPBU_ONE 0x00000300
Drive pwmA High.
#define | PWM_X_GENA_ACTCMPAD_M 0x000000C0
Action for Comparator A Down.
#define | PWM_X_GENA_ACTCMPAD_NONE 0x00000000
Do nothing.
#define | PWM_X_GENA_ACTCMPAD_INV 0x00000040
Invert pwmA.
#define | PWM_X_GENA_ACTCMPAD_ZERO 0x00000080
Drive pwmA Low.
#define | PWM_X_GENA_ACTCMPAD_ONE 0x000000C0
Drive pwmA High.
#define | PWM_X_GENA_ACTCMPAU_M 0x00000030
Action for Comparator A Up.
#define | PWM_X_GENA_ACTCMPAU_NONE 0x00000000
Do nothing.
#define | PWM_X_GENA_ACTCMPAU_INV 0x00000010
Invert pwmA.
#define | PWM_X_GENA_ACTCMPAU_ZERO 0x00000020
Drive pwmA Low.
#define | PWM_X_GENA_ACTCMPAU_ONE 0x00000030
Drive pwmA High.
#define | PWM_X_GENA_ACTLOAD_M 0x0000000C
Action for Counter=LOAD.
#define | PWM_X_GENA_ACTLOAD_NONE 0x00000000
Do nothing.
#define | PWM_X_GENA_ACTLOAD_INV 0x00000004
Invert pwmA.
#define | PWM_X_GENA_ACTLOAD_ZERO 0x00000008
Drive pwmA Low.
#define | PWM_X_GENA_ACTLOAD_ONE 0x0000000C
Drive pwmA High.
#define | PWM_X_GENA_ACTZERO_M 0x00000003
Action for Counter=0.
#define | PWM_X_GENA_ACTZERO_NONE 0x00000000
Do nothing.
#define | PWM_X_GENA_ACTZERO_INV 0x00000001
Invert pwmA.
#define | PWM_X_GENA_ACTZERO_ZERO 0x00000002
Drive pwmA Low.
#define | PWM_X_GENA_ACTZERO_ONE 0x00000003
Drive pwmA High.
#define | PWM_X_GENB_ACTCMPBD_M 0x00000C00
The following are defines for the bit fields in the PWM_O_X_GENB register.
#define | PWM_X_GENB_ACTCMPBD_NONE 0x00000000
Do nothing.
#define | PWM_X_GENB_ACTCMPBD_INV 0x00000400
Invert pwmB.
#define | PWM_X_GENB_ACTCMPBD_ZERO 0x00000800
Drive pwmB Low.
#define | PWM_X_GENB_ACTCMPBD_ONE 0x00000C00
Drive pwmB High.
#define | PWM_X_GENB_ACTCMPBU_M 0x00000300
Action for Comparator B Up.
#define | PWM_X_GENB_ACTCMPBU_NONE 0x00000000
Do nothing.
#define | PWM_X_GENB_ACTCMPBU_INV 0x00000100
Invert pwmB.
#define | PWM_X_GENB_ACTCMPBU_ZERO 0x00000200
Drive pwmB Low.
#define | PWM_X_GENB_ACTCMPBU_ONE 0x00000300
Drive pwmB High.
#define | PWM_X_GENB_ACTCMPAD_M 0x000000C0
Action for Comparator A Down.
#define | PWM_X_GENB_ACTCMPAD_NONE 0x00000000
Do nothing.
#define | PWM_X_GENB_ACTCMPAD_INV 0x00000040
Invert pwmB.
#define | PWM_X_GENB_ACTCMPAD_ZERO 0x00000080
Drive pwmB Low.
#define | PWM_X_GENB_ACTCMPAD_ONE 0x000000C0
Drive pwmB High.
#define | PWM_X_GENB_ACTCMPAU_M 0x00000030
Action for Comparator A Up.
#define | PWM_X_GENB_ACTCMPAU_NONE 0x00000000
Do nothing.
#define | PWM_X_GENB_ACTCMPAU_INV 0x00000010
Invert pwmB.
#define | PWM_X_GENB_ACTCMPAU_ZERO 0x00000020
Drive pwmB Low.
#define | PWM_X_GENB_ACTCMPAU_ONE 0x00000030
Drive pwmB High.
#define | PWM_X_GENB_ACTLOAD_M 0x0000000C
Action for Counter=LOAD.
#define | PWM_X_GENB_ACTLOAD_NONE 0x00000000
Do nothing.
#define | PWM_X_GENB_ACTLOAD_INV 0x00000004
Invert pwmB.
#define | PWM_X_GENB_ACTLOAD_ZERO 0x00000008
Drive pwmB Low.
#define | PWM_X_GENB_ACTLOAD_ONE 0x0000000C
Drive pwmB High.
#define | PWM_X_GENB_ACTZERO_M 0x00000003
Action for Counter=0.
#define | PWM_X_GENB_ACTZERO_NONE 0x00000000
Do nothing.
#define | PWM_X_GENB_ACTZERO_INV 0x00000001
Invert pwmB.
#define | PWM_X_GENB_ACTZERO_ZERO 0x00000002
Drive pwmB Low.
#define | PWM_X_GENB_ACTZERO_ONE 0x00000003
Drive pwmB High.
#define | PWM_X_DBCTL_ENABLE 0x00000001
The following are defines for the bit fields in the PWM_O_X_DBCTL register.
#define | PWM_X_DBRISE_DELAY_M 0x00000FFF
The following are defines for the bit fields in the PWM_O_X_DBRISE register.
#define | PWM_X_DBRISE_DELAY_S 0
The following are defines for the bit fields in the PWM_O_X_DBRISE register.
#define | PWM_X_DBFALL_DELAY_M 0x00000FFF
The following are defines for the bit fields in the PWM_O_X_DBFALL register.
#define | PWM_X_DBFALL_DELAY_S 0
The following are defines for the bit fields in the PWM_O_X_DBFALL register.
#define | QEI_CTL_STALLEN 0x00001000
The following are defines for the bit fields in the QEI_O_CTL register.
#define | QEI_CTL_INVI 0x00000800
Invert Index Pulse.
#define | QEI_CTL_INVB 0x00000400
Invert PhB.
#define | QEI_CTL_INVA 0x00000200
Invert PhA.
#define | QEI_CTL_VELDIV_M 0x000001C0
Predivide Velocity.
#define | QEI_CTL_VELDIV_1 0x00000000
QEI clock /1.
#define | QEI_CTL_VELDIV_2 0x00000040
QEI clock /2.
#define | QEI_CTL_VELDIV_4 0x00000080
QEI clock /4.
#define | QEI_CTL_VELDIV_8 0x000000C0
QEI clock /8.
#define | QEI_CTL_VELDIV_16 0x00000100
QEI clock /16.
#define | QEI_CTL_VELDIV_32 0x00000140
QEI clock /32.
#define | QEI_CTL_VELDIV_64 0x00000180
QEI clock /64.
#define | QEI_CTL_VELDIV_128 0x000001C0
QEI clock /128.
#define | QEI_CTL_VELEN 0x00000020
Capture Velocity.
#define | QEI_CTL_RESMODE 0x00000010
Reset Mode.
#define | QEI_CTL_CAPMODE 0x00000008
Capture Mode.
#define | QEI_CTL_SIGMODE 0x00000004
Signal Mode.
#define | QEI_CTL_SWAP 0x00000002
Swap Signals.
#define | QEI_CTL_ENABLE 0x00000001
Enable QEI.
#define | QEI_STAT_DIRECTION 0x00000002
The following are defines for the bit fields in the QEI_O_STAT register.
#define | QEI_STAT_ERROR 0x00000001
Error Detected.
#define | QEI_POS_M 0xFFFFFFFF
The following are defines for the bit fields in the QEI_O_POS register.
#define | QEI_POS_S 0
The following are defines for the bit fields in the QEI_O_POS register.
#define | QEI_MAXPOS_M 0xFFFFFFFF
The following are defines for the bit fields in the QEI_O_MAXPOS register.
#define | QEI_MAXPOS_S 0
The following are defines for the bit fields in the QEI_O_MAXPOS register.
#define | QEI_LOAD_M 0xFFFFFFFF
The following are defines for the bit fields in the QEI_O_LOAD register.
#define | QEI_LOAD_S 0
The following are defines for the bit fields in the QEI_O_LOAD register.
#define | QEI_TIME_M 0xFFFFFFFF
The following are defines for the bit fields in the QEI_O_TIME register.
#define | QEI_TIME_S 0
The following are defines for the bit fields in the QEI_O_TIME register.
#define | QEI_COUNT_M 0xFFFFFFFF
The following are defines for the bit fields in the QEI_O_COUNT register.
#define | QEI_COUNT_S 0
The following are defines for the bit fields in the QEI_O_COUNT register.
#define | QEI_SPEED_M 0xFFFFFFFF
The following are defines for the bit fields in the QEI_O_SPEED register.
#define | QEI_SPEED_S 0
The following are defines for the bit fields in the QEI_O_SPEED register.
#define | QEI_INTEN_ERROR 0x00000008
The following are defines for the bit fields in the QEI_O_INTEN register.
#define | QEI_INTEN_DIR 0x00000004
Direction Change Interrupt.
#define | QEI_INTEN_TIMER 0x00000002
Timer Expires Interrupt Enable.
#define | QEI_INTEN_INDEX 0x00000001
Index Pulse Detected Interrupt.
#define | QEI_RIS_ERROR 0x00000008
The following are defines for the bit fields in the QEI_O_RIS register.
#define | QEI_RIS_DIR 0x00000004
Direction Change Detected.
#define | QEI_RIS_TIMER 0x00000002
Velocity Timer Expired.
#define | QEI_RIS_INDEX 0x00000001
Index Pulse Asserted.
#define | QEI_ISC_ERROR 0x00000008
The following are defines for the bit fields in the QEI_O_ISC register.
#define | QEI_ISC_DIR 0x00000004
Direction Change Interrupt.
#define | QEI_ISC_TIMER 0x00000002
Velocity Timer Expired Interrupt.
#define | QEI_ISC_INDEX 0x00000001
Index Pulse Interrupt.
#define | TIMER_CFG_M 0x00000007
The following are defines for the bit fields in the TIMER_O_CFG register.
#define | TIMER_CFG_32_BIT_TIMER 0x00000000
32-bit timer configuration
#define | TIMER_CFG_32_BIT_RTC 0x00000001
32-bit real-time clock (RTC)
#define | TIMER_CFG_16_BIT 0x00000004
16-bit timer configuration.
#define | TIMER_TAMR_TAAMS 0x00000008
The following are defines for the bit fields in the TIMER_O_TAMR register.
#define | TIMER_TAMR_TACMR 0x00000004
GPTM Timer A Capture Mode.
#define | TIMER_TAMR_TAMR_M 0x00000003
GPTM Timer A Mode.
#define | TIMER_TAMR_TAMR_1_SHOT 0x00000001
One-Shot Timer mode.
#define | TIMER_TAMR_TAMR_PERIOD 0x00000002
Periodic Timer mode.
#define | TIMER_TAMR_TAMR_CAP 0x00000003
Capture mode.
#define | TIMER_TBMR_TBAMS 0x00000008
The following are defines for the bit fields in the TIMER_O_TBMR register.
#define | TIMER_TBMR_TBCMR 0x00000004
GPTM Timer B Capture Mode.
#define | TIMER_TBMR_TBMR_M 0x00000003
GPTM Timer B Mode.
#define | TIMER_TBMR_TBMR_1_SHOT 0x00000001
One-Shot Timer mode.
#define | TIMER_TBMR_TBMR_PERIOD 0x00000002
Periodic Timer mode.
#define | TIMER_TBMR_TBMR_CAP 0x00000003
Capture mode.
#define | TIMER_CTL_TBPWML 0x00004000
The following are defines for the bit fields in the TIMER_O_CTL register.
#define | TIMER_CTL_TBOTE 0x00002000
GPTM Timer B Output Trigger.
#define | TIMER_CTL_TBEVENT_M 0x00000C00
GPTM Timer B Event Mode.
#define | TIMER_CTL_TBEVENT_POS 0x00000000
Positive edge.
#define | TIMER_CTL_TBEVENT_NEG 0x00000400
Negative edge.
#define | TIMER_CTL_TBEVENT_BOTH 0x00000C00
Both edges.
#define | TIMER_CTL_TBSTALL 0x00000200
GPTM Timer B Stall Enable.
#define | TIMER_CTL_TBEN 0x00000100
GPTM Timer B Enable.
#define | TIMER_CTL_TAPWML 0x00000040
GPTM Timer A PWM Output Level.
#define | TIMER_CTL_TAOTE 0x00000020
GPTM Timer A Output Trigger.
#define | TIMER_CTL_RTCEN 0x00000010
GPTM RTC Enable.
#define | TIMER_CTL_TAEVENT_M 0x0000000C
GPTM Timer A Event Mode.
#define | TIMER_CTL_TAEVENT_POS 0x00000000
Positive edge.
#define | TIMER_CTL_TAEVENT_NEG 0x00000004
Negative edge.
#define | TIMER_CTL_TAEVENT_BOTH 0x0000000C
Both edges.
#define | TIMER_CTL_TASTALL 0x00000002
GPTM Timer A Stall Enable.
#define | TIMER_CTL_TAEN 0x00000001
GPTM Timer A Enable.
#define | TIMER_IMR_CBEIM 0x00000400
The following are defines for the bit fields in the TIMER_O_IMR register.
#define | TIMER_IMR_CBMIM 0x00000200
GPTM Capture B Match Interrupt.
#define | TIMER_IMR_TBTOIM 0x00000100
GPTM Timer B Time-Out Interrupt.
#define | TIMER_IMR_RTCIM 0x00000008
GPTM RTC Interrupt Mask.
#define | TIMER_IMR_CAEIM 0x00000004
GPTM Capture A Event Interrupt.
#define | TIMER_IMR_CAMIM 0x00000002
GPTM Capture A Match Interrupt.
#define | TIMER_IMR_TATOIM 0x00000001
GPTM Timer A Time-Out Interrupt.
#define | TIMER_RIS_CBERIS 0x00000400
The following are defines for the bit fields in the TIMER_O_RIS register.
#define | TIMER_RIS_CBMRIS 0x00000200
GPTM Capture B Match Raw.
#define | TIMER_RIS_TBTORIS 0x00000100
GPTM Timer B Time-Out Raw.
#define | TIMER_RIS_RTCRIS 0x00000008
GPTM RTC Raw Interrupt.
#define | TIMER_RIS_CAERIS 0x00000004
GPTM Capture A Event Raw.
#define | TIMER_RIS_CAMRIS 0x00000002
GPTM Capture A Match Raw.
#define | TIMER_RIS_TATORIS 0x00000001
GPTM Timer A Time-Out Raw.
#define | TIMER_MIS_CBEMIS 0x00000400
The following are defines for the bit fields in the TIMER_O_MIS register.
#define | TIMER_MIS_CBMMIS 0x00000200
GPTM Capture B Match Masked.
#define | TIMER_MIS_TBTOMIS 0x00000100
GPTM Timer B Time-Out Masked.
#define | TIMER_MIS_RTCMIS 0x00000008
GPTM RTC Masked Interrupt.
#define | TIMER_MIS_CAEMIS 0x00000004
GPTM Capture A Event Masked.
#define | TIMER_MIS_CAMMIS 0x00000002
GPTM Capture A Match Masked.
#define | TIMER_MIS_TATOMIS 0x00000001
GPTM Timer A Time-Out Masked.
#define | TIMER_ICR_CBECINT 0x00000400
The following are defines for the bit fields in the TIMER_O_ICR register.
#define | TIMER_ICR_CBMCINT 0x00000200
GPTM Capture B Match Interrupt.
#define | TIMER_ICR_TBTOCINT 0x00000100
GPTM Timer B Time-Out Interrupt.
#define | TIMER_ICR_RTCCINT 0x00000008
GPTM RTC Interrupt Clear.
#define | TIMER_ICR_CAECINT 0x00000004
GPTM Capture A Event Interrupt.
#define | TIMER_ICR_CAMCINT 0x00000002
GPTM Capture A Match Interrupt.
#define | TIMER_ICR_TATOCINT 0x00000001
GPTM Timer A Time-Out Raw.
#define | TIMER_TAILR_TAILRH_M 0xFFFF0000
The following are defines for the bit fields in the TIMER_O_TAILR register.
#define | TIMER_TAILR_TAILRL_M 0x0000FFFF
GPTM Timer A Interval Load.
#define | TIMER_TAILR_TAILRH_S 16
The following are defines for the bit fields in the TIMER_O_TAILR register.
#define | TIMER_TAILR_TAILRL_S 0
The following are defines for the bit fields in the TIMER_O_TAILR register.
#define | TIMER_TBILR_TBILRL_M 0x0000FFFF
The following are defines for the bit fields in the TIMER_O_TBILR register.
#define | TIMER_TBILR_TBILRL_S 0
The following are defines for the bit fields in the TIMER_O_TBILR register.
#define | TIMER_TAMATCHR_TAMRH_M 0xFFFF0000
The following are defines for the bit fields in the TIMER_O_TAMATCHR register.
#define | TIMER_TAMATCHR_TAMRL_M 0x0000FFFF
GPTM Timer A Match Register Low.
#define | TIMER_TAMATCHR_TAMRH_S 16
The following are defines for the bit fields in the TIMER_O_TAMATCHR register.
#define | TIMER_TAMATCHR_TAMRL_S 0
The following are defines for the bit fields in the TIMER_O_TAMATCHR register.
#define | TIMER_TBMATCHR_TBMRL_M 0x0000FFFF
The following are defines for the bit fields in the TIMER_O_TBMATCHR register.
#define | TIMER_TBMATCHR_TBMRL_S 0
The following are defines for the bit fields in the TIMER_O_TBMATCHR register.
#define | TIMER_TAPR_TAPSR_M 0x000000FF
The following are defines for the bit fields in the TIMER_O_TAPR register.
#define | TIMER_TAPR_TAPSR_S 0
The following are defines for the bit fields in the TIMER_O_TAPR register.
#define | TIMER_TBPR_TBPSR_M 0x000000FF
The following are defines for the bit fields in the TIMER_O_TBPR register.
#define | TIMER_TBPR_TBPSR_S 0
The following are defines for the bit fields in the TIMER_O_TBPR register.
#define | TIMER_TAPMR_TAPSMR_M 0x000000FF
The following are defines for the bit fields in the TIMER_O_TAPMR register.
#define | TIMER_TAPMR_TAPSMR_S 0
The following are defines for the bit fields in the TIMER_O_TAPMR register.
#define | TIMER_TBPMR_TBPSMR_M 0x000000FF
The following are defines for the bit fields in the TIMER_O_TBPMR register.
#define | TIMER_TBPMR_TBPSMR_S 0
The following are defines for the bit fields in the TIMER_O_TBPMR register.
#define | TIMER_TAR_TARH_M 0xFFFF0000
The following are defines for the bit fields in the TIMER_O_TAR register.
#define | TIMER_TAR_TARL_M 0x0000FFFF
GPTM Timer A Register Low.
#define | TIMER_TAR_TARH_S 16
The following are defines for the bit fields in the TIMER_O_TAR register.
#define | TIMER_TAR_TARL_S 0
The following are defines for the bit fields in the TIMER_O_TAR register.
#define | TIMER_TBR_TBRL_M 0x0000FFFF
The following are defines for the bit fields in the TIMER_O_TBR register.
#define | TIMER_TBR_TBRL_S 0
The following are defines for the bit fields in the TIMER_O_TBR register.
#define | COMP_ACMIS_IN2 0x00000004
The following are defines for the bit fields in the COMP_O_ACMIS register.
#define | COMP_ACMIS_IN1 0x00000002
Comparator 1 Masked Interrupt.
#define | COMP_ACMIS_IN0 0x00000001
Comparator 0 Masked Interrupt.
#define | COMP_ACRIS_IN2 0x00000004
The following are defines for the bit fields in the COMP_O_ACRIS register.
#define | COMP_ACRIS_IN1 0x00000002
Comparator 1 Interrupt Status.
#define | COMP_ACRIS_IN0 0x00000001
Comparator 0 Interrupt Status.
#define | COMP_ACINTEN_IN2 0x00000004
The following are defines for the bit fields in the COMP_O_ACINTEN register.
#define | COMP_ACINTEN_IN1 0x00000002
Comparator 1 Interrupt Enable.
#define | COMP_ACINTEN_IN0 0x00000001
Comparator 0 Interrupt Enable.
#define | COMP_ACREFCTL_EN 0x00000200
The following are defines for the bit fields in the COMP_O_ACREFCTL register.
#define | COMP_ACREFCTL_RNG 0x00000100
Resistor Ladder Range.
#define | COMP_ACREFCTL_VREF_M 0x0000000F
Resistor Ladder Voltage Ref.
#define | COMP_ACREFCTL_VREF_S 0
The following are defines for the bit fields in the COMP_O_ACREFCTL register.
#define | COMP_ACSTAT0_OVAL 0x00000002
The following are defines for the bit fields in the COMP_O_ACSTAT0 register.
#define | COMP_ACCTL0_TOEN 0x00000800
The following are defines for the bit fields in the COMP_O_ACCTL0 register.
#define | COMP_ACCTL0_ASRCP_M 0x00000600
Analog Source Positive.
#define | COMP_ACCTL0_ASRCP_PIN 0x00000000
Pin value of Cn+.
#define | COMP_ACCTL0_ASRCP_PIN0 0x00000200
Pin value of C0+.
#define | COMP_ACCTL0_ASRCP_REF 0x00000400
Internal voltage reference.
#define | COMP_ACCTL0_TSLVAL 0x00000080
Trigger Sense Level Value.
#define | COMP_ACCTL0_TSEN_M 0x00000060
Trigger Sense.
#define | COMP_ACCTL0_TSEN_LEVEL 0x00000000
Level sense, see TSLVAL.
#define | COMP_ACCTL0_TSEN_FALL 0x00000020
Falling edge.
#define | COMP_ACCTL0_TSEN_RISE 0x00000040
Rising edge.
#define | COMP_ACCTL0_TSEN_BOTH 0x00000060
Either edge.
#define | COMP_ACCTL0_ISLVAL 0x00000010
Interrupt Sense Level Value.
#define | COMP_ACCTL0_ISEN_M 0x0000000C
Interrupt Sense.
#define | COMP_ACCTL0_ISEN_LEVEL 0x00000000
Level sense, see ISLVAL.
#define | COMP_ACCTL0_ISEN_FALL 0x00000004
Falling edge.
#define | COMP_ACCTL0_ISEN_RISE 0x00000008
Rising edge.
#define | COMP_ACCTL0_ISEN_BOTH 0x0000000C
Either edge.
#define | COMP_ACCTL0_CINV 0x00000002
Comparator Output Invert.
#define | COMP_ACSTAT1_OVAL 0x00000002
The following are defines for the bit fields in the COMP_O_ACSTAT1 register.
#define | COMP_ACCTL1_TOEN 0x00000800
The following are defines for the bit fields in the COMP_O_ACCTL1 register.
#define | COMP_ACCTL1_ASRCP_M 0x00000600
Analog Source Positive.
#define | COMP_ACCTL1_ASRCP_PIN 0x00000000
Pin value of Cn+.
#define | COMP_ACCTL1_ASRCP_PIN0 0x00000200
Pin value of C0+.
#define | COMP_ACCTL1_ASRCP_REF 0x00000400
Internal voltage reference.
#define | COMP_ACCTL1_TSLVAL 0x00000080
Trigger Sense Level Value.
#define | COMP_ACCTL1_TSEN_M 0x00000060
Trigger Sense.
#define | COMP_ACCTL1_TSEN_LEVEL 0x00000000
Level sense, see TSLVAL.
#define | COMP_ACCTL1_TSEN_FALL 0x00000020
Falling edge.
#define | COMP_ACCTL1_TSEN_RISE 0x00000040
Rising edge.
#define | COMP_ACCTL1_TSEN_BOTH 0x00000060
Either edge.
#define | COMP_ACCTL1_ISLVAL 0x00000010
Interrupt Sense Level Value.
#define | COMP_ACCTL1_ISEN_M 0x0000000C
Interrupt Sense.
#define | COMP_ACCTL1_ISEN_LEVEL 0x00000000
Level sense, see ISLVAL.
#define | COMP_ACCTL1_ISEN_FALL 0x00000004
Falling edge.
#define | COMP_ACCTL1_ISEN_RISE 0x00000008
Rising edge.
#define | COMP_ACCTL1_ISEN_BOTH 0x0000000C
Either edge.
#define | COMP_ACCTL1_CINV 0x00000002
Comparator Output Invert.
#define | COMP_ACSTAT2_OVAL 0x00000002
The following are defines for the bit fields in the COMP_O_ACSTAT2 register.
#define | COMP_ACCTL2_TOEN 0x00000800
The following are defines for the bit fields in the COMP_O_ACCTL2 register.
#define | COMP_ACCTL2_ASRCP_M 0x00000600
Analog Source Positive.
#define | COMP_ACCTL2_ASRCP_PIN 0x00000000
Pin value of Cn+.
#define | COMP_ACCTL2_ASRCP_PIN0 0x00000200
Pin value of C0+.
#define | COMP_ACCTL2_ASRCP_REF 0x00000400
Internal voltage reference.
#define | COMP_ACCTL2_TSLVAL 0x00000080
Trigger Sense Level Value.
#define | COMP_ACCTL2_TSEN_M 0x00000060
Trigger Sense.
#define | COMP_ACCTL2_TSEN_LEVEL 0x00000000
Level sense, see TSLVAL.
#define | COMP_ACCTL2_TSEN_FALL 0x00000020
Falling edge.
#define | COMP_ACCTL2_TSEN_RISE 0x00000040
Rising edge.
#define | COMP_ACCTL2_TSEN_BOTH 0x00000060
Either edge.
#define | COMP_ACCTL2_ISLVAL 0x00000010
Interrupt Sense Level Value.
#define | COMP_ACCTL2_ISEN_M 0x0000000C
Interrupt Sense.
#define | COMP_ACCTL2_ISEN_LEVEL 0x00000000
Level sense, see ISLVAL.
#define | COMP_ACCTL2_ISEN_FALL 0x00000004
Falling edge.
#define | COMP_ACCTL2_ISEN_RISE 0x00000008
Rising edge.
#define | COMP_ACCTL2_ISEN_BOTH 0x0000000C
Either edge.
#define | COMP_ACCTL2_CINV 0x00000002
Comparator Output Invert.
#define | HIB_RTCC_M 0xFFFFFFFF
The following are defines for the bit fields in the HIB_RTCC register.
#define | HIB_RTCC_S 0
The following are defines for the bit fields in the HIB_RTCC register.
#define | HIB_RTCM0_M 0xFFFFFFFF
The following are defines for the bit fields in the HIB_RTCM0 register.
#define | HIB_RTCM0_S 0
The following are defines for the bit fields in the HIB_RTCM0 register.
#define | HIB_RTCM1_M 0xFFFFFFFF
The following are defines for the bit fields in the HIB_RTCM1 register.
#define | HIB_RTCM1_S 0
The following are defines for the bit fields in the HIB_RTCM1 register.
#define | HIB_RTCLD_M 0xFFFFFFFF
The following are defines for the bit fields in the HIB_RTCLD register.
#define | HIB_RTCLD_S 0
The following are defines for the bit fields in the HIB_RTCLD register.
#define | HIB_CTL_VABORT 0x00000080
The following are defines for the bit fields in the HIB_CTL register.
#define | HIB_CTL_CLK32EN 0x00000040
Clocking Enable.
#define | HIB_CTL_LOWBATEN 0x00000020
Low Battery Monitoring Enable.
#define | HIB_CTL_PINWEN 0x00000010
External WAKE Pin Enable.
#define | HIB_CTL_RTCWEN 0x00000008
RTC Wake-up Enable.
#define | HIB_CTL_CLKSEL 0x00000004
Hibernation Module Clock Select.
#define | HIB_CTL_HIBREQ 0x00000002
Hibernation Request.
#define | HIB_CTL_RTCEN 0x00000001
RTC Timer Enable.
#define | HIB_IM_EXTW 0x00000008
The following are defines for the bit fields in the HIB_IM register.
#define | HIB_IM_LOWBAT 0x00000004
Low Battery Voltage Interrupt.
#define | HIB_IM_RTCALT1 0x00000002
RTC Alert 1 Interrupt Mask.
#define | HIB_IM_RTCALT0 0x00000001
RTC Alert 0 Interrupt Mask.
#define | HIB_RIS_EXTW 0x00000008
The following are defines for the bit fields in the HIB_RIS register.
#define | HIB_RIS_LOWBAT 0x00000004
Low Battery Voltage Raw.
#define | HIB_RIS_RTCALT1 0x00000002
RTC Alert 1 Raw Interrupt Status.
#define | HIB_RIS_RTCALT0 0x00000001
RTC Alert 0 Raw Interrupt Status.
#define | HIB_MIS_EXTW 0x00000008
The following are defines for the bit fields in the HIB_MIS register.
#define | HIB_MIS_LOWBAT 0x00000004
Low Battery Voltage Masked.
#define | HIB_MIS_RTCALT1 0x00000002
RTC Alert 1 Masked Interrupt.
#define | HIB_MIS_RTCALT0 0x00000001
RTC Alert 0 Masked Interrupt.
#define | HIB_IC_EXTW 0x00000008
The following are defines for the bit fields in the HIB_IC register.
#define | HIB_IC_LOWBAT 0x00000004
Low Battery Voltage Masked.
#define | HIB_IC_RTCALT1 0x00000002
RTC Alert1 Masked Interrupt.
#define | HIB_IC_RTCALT0 0x00000001
RTC Alert0 Masked Interrupt.
#define | HIB_RTCT_TRIM_M 0x0000FFFF
The following are defines for the bit fields in the HIB_RTCT register.
#define | HIB_RTCT_TRIM_S 0
The following are defines for the bit fields in the HIB_RTCT register.
#define | HIB_DATA_RTD_M 0xFFFFFFFF
The following are defines for the bit fields in the HIB_DATA register.
#define | HIB_DATA_RTD_S 0
The following are defines for the bit fields in the HIB_DATA register.
#define | FLASH_FMA_OFFSET_M 0x0003FFFF
The following are defines for the bit fields in the FLASH_FMA register.
#define | FLASH_FMA_OFFSET_S 0
The following are defines for the bit fields in the FLASH_FMA register.
#define | FLASH_FMD_DATA_M 0xFFFFFFFF
The following are defines for the bit fields in the FLASH_FMD register.
#define | FLASH_FMD_DATA_S 0
The following are defines for the bit fields in the FLASH_FMD register.
#define | FLASH_FMC_WRKEY 0xA4420000
The following are defines for the bit fields in the FLASH_FMC register.
#define | FLASH_FMC_COMT 0x00000008
Commit Register Value.
#define | FLASH_FMC_MERASE 0x00000004
Mass Erase Flash Memory.
#define | FLASH_FMC_ERASE 0x00000002
Erase a Page of Flash Memory.
#define | FLASH_FMC_WRITE 0x00000001
Write a Word into Flash Memory.
#define | FLASH_FCRIS_PRIS 0x00000002
The following are defines for the bit fields in the FLASH_FCRIS register.
#define | FLASH_FCRIS_ARIS 0x00000001
Access Raw Interrupt Status.
#define | FLASH_FCIM_PMASK 0x00000002
The following are defines for the bit fields in the FLASH_FCIM register.
#define | FLASH_FCIM_AMASK 0x00000001
Access Interrupt Mask.
#define | FLASH_FCMISC_PMISC 0x00000002
The following are defines for the bit fields in the FLASH_FCMISC register.
#define | FLASH_FCMISC_AMISC 0x00000001
Access Masked Interrupt Status.
#define | FLASH_USECRL_M 0x000000FF
The following are defines for the bit fields in the FLASH_USECRL register.
#define | FLASH_USECRL_S 0
The following are defines for the bit fields in the FLASH_USECRL register.
#define | FLASH_USERDBG_NW 0x80000000
The following are defines for the bit fields in the FLASH_USERDBG register.
#define | FLASH_USERDBG_DATA_M 0x7FFFFFFC
User Data.
#define | FLASH_USERDBG_DBG1 0x00000002
Debug Control 1.
#define | FLASH_USERDBG_DBG0 0x00000001
Debug Control 0.
#define | FLASH_USERDBG_DATA_S 2
The following are defines for the bit fields in the FLASH_USERDBG register.
#define | FLASH_USERREG0_NW 0x80000000
The following are defines for the bit fields in the FLASH_USERREG0 register.
#define | FLASH_USERREG0_DATA_M 0x7FFFFFFF
User Data.
#define | FLASH_USERREG0_DATA_S 0
The following are defines for the bit fields in the FLASH_USERREG0 register.
#define | FLASH_USERREG1_NW 0x80000000
The following are defines for the bit fields in the FLASH_USERREG1 register.
#define | FLASH_USERREG1_DATA_M 0x7FFFFFFF
User Data.
#define | FLASH_USERREG1_DATA_S 0
The following are defines for the bit fields in the FLASH_USERREG1 register.
#define | FLASH_PROTECT_SIZE 0x00000800
The following are defines for the erase size of the FLASH block that is erased by an erase operation, and the protect size is the size of the FLASH block that is protected by each protection register.
#define | FLASH_ERASE_SIZE 0x00000400
The following are defines for the erase size of the FLASH block that is erased by an erase operation, and the protect size is the size of the FLASH block that is protected by each protection register.
#define | NVIC_INT_TYPE_LINES_M 0x0000001F
The following are defines for the bit fields in the NVIC_INT_TYPE register.
#define | NVIC_INT_TYPE_LINES_S 0
The following are defines for the bit fields in the NVIC_INT_TYPE register.
#define | NVIC_ST_CTRL_COUNT 0x00010000
The following are defines for the bit fields in the NVIC_ST_CTRL register.
#define | NVIC_ST_CTRL_CLK_SRC 0x00000004
Clock Source.
#define | NVIC_ST_CTRL_INTEN 0x00000002
Interrupt enable.
#define | NVIC_ST_CTRL_ENABLE 0x00000001
Counter mode.
#define | NVIC_ST_RELOAD_M 0x00FFFFFF
The following are defines for the bit fields in the NVIC_ST_RELOAD register.
#define | NVIC_ST_RELOAD_S 0
The following are defines for the bit fields in the NVIC_ST_RELOAD register.
#define | NVIC_ST_CURRENT_M 0x00FFFFFF
The following are defines for the bit fields in the NVIC_ST_CURRENT register.
#define | NVIC_ST_CURRENT_S 0
The following are defines for the bit fields in the NVIC_ST_CURRENT register.
#define | NVIC_ST_CAL_NOREF 0x80000000
The following are defines for the bit fields in the NVIC_ST_CAL register.
#define | NVIC_ST_CAL_SKEW 0x40000000
Clock skew.
#define | NVIC_ST_CAL_ONEMS_M 0x00FFFFFF
1ms reference value
#define | NVIC_ST_CAL_ONEMS_S 0
The following are defines for the bit fields in the NVIC_ST_CAL register.
#define | NVIC_EN0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_EN0 register.
#define | NVIC_EN0_INT30 0x40000000
Interrupt 30 enable.
#define | NVIC_EN0_INT29 0x20000000
Interrupt 29 enable.
#define | NVIC_EN0_INT28 0x10000000
Interrupt 28 enable.
#define | NVIC_EN0_INT27 0x08000000
Interrupt 27 enable.
#define | NVIC_EN0_INT26 0x04000000
Interrupt 26 enable.
#define | NVIC_EN0_INT25 0x02000000
Interrupt 25 enable.
#define | NVIC_EN0_INT24 0x01000000
Interrupt 24 enable.
#define | NVIC_EN0_INT23 0x00800000
Interrupt 23 enable.
#define | NVIC_EN0_INT22 0x00400000
Interrupt 22 enable.
#define | NVIC_EN0_INT21 0x00200000
Interrupt 21 enable.
#define | NVIC_EN0_INT20 0x00100000
Interrupt 20 enable.
#define | NVIC_EN0_INT19 0x00080000
Interrupt 19 enable.
#define | NVIC_EN0_INT18 0x00040000
Interrupt 18 enable.
#define | NVIC_EN0_INT17 0x00020000
Interrupt 17 enable.
#define | NVIC_EN0_INT16 0x00010000
Interrupt 16 enable.
#define | NVIC_EN0_INT15 0x00008000
Interrupt 15 enable.
#define | NVIC_EN0_INT14 0x00004000
Interrupt 14 enable.
#define | NVIC_EN0_INT13 0x00002000
Interrupt 13 enable.
#define | NVIC_EN0_INT12 0x00001000
Interrupt 12 enable.
#define | NVIC_EN0_INT11 0x00000800
Interrupt 11 enable.
#define | NVIC_EN0_INT10 0x00000400
Interrupt 10 enable.
#define | NVIC_EN0_INT9 0x00000200
Interrupt 9 enable.
#define | NVIC_EN0_INT8 0x00000100
Interrupt 8 enable.
#define | NVIC_EN0_INT7 0x00000080
Interrupt 7 enable.
#define | NVIC_EN0_INT6 0x00000040
Interrupt 6 enable.
#define | NVIC_EN0_INT5 0x00000020
Interrupt 5 enable.
#define | NVIC_EN0_INT4 0x00000010
Interrupt 4 enable.
#define | NVIC_EN0_INT3 0x00000008
Interrupt 3 enable.
#define | NVIC_EN0_INT2 0x00000004
Interrupt 2 enable.
#define | NVIC_EN0_INT1 0x00000002
Interrupt 1 enable.
#define | NVIC_EN0_INT0 0x00000001
Interrupt 0 enable.
#define | NVIC_EN1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_EN1 register.
#define | NVIC_EN1_INT58 0x04000000
Interrupt 58 enable.
#define | NVIC_EN1_INT57 0x02000000
Interrupt 57 enable.
#define | NVIC_EN1_INT56 0x01000000
Interrupt 56 enable.
#define | NVIC_EN1_INT55 0x00800000
Interrupt 55 enable.
#define | NVIC_EN1_INT54 0x00400000
Interrupt 54 enable.
#define | NVIC_EN1_INT53 0x00200000
Interrupt 53 enable.
#define | NVIC_EN1_INT52 0x00100000
Interrupt 52 enable.
#define | NVIC_EN1_INT51 0x00080000
Interrupt 51 enable.
#define | NVIC_EN1_INT50 0x00040000
Interrupt 50 enable.
#define | NVIC_EN1_INT49 0x00020000
Interrupt 49 enable.
#define | NVIC_EN1_INT48 0x00010000
Interrupt 48 enable.
#define | NVIC_EN1_INT47 0x00008000
Interrupt 47 enable.
#define | NVIC_EN1_INT46 0x00004000
Interrupt 46 enable.
#define | NVIC_EN1_INT45 0x00002000
Interrupt 45 enable.
#define | NVIC_EN1_INT44 0x00001000
Interrupt 44 enable.
#define | NVIC_EN1_INT43 0x00000800
Interrupt 43 enable.
#define | NVIC_EN1_INT42 0x00000400
Interrupt 42 enable.
#define | NVIC_EN1_INT41 0x00000200
Interrupt 41 enable.
#define | NVIC_EN1_INT40 0x00000100
Interrupt 40 enable.
#define | NVIC_EN1_INT39 0x00000080
Interrupt 39 enable.
#define | NVIC_EN1_INT38 0x00000040
Interrupt 38 enable.
#define | NVIC_EN1_INT37 0x00000020
Interrupt 37 enable.
#define | NVIC_EN1_INT36 0x00000010
Interrupt 36 enable.
#define | NVIC_EN1_INT35 0x00000008
Interrupt 35 enable.
#define | NVIC_EN1_INT34 0x00000004
Interrupt 34 enable.
#define | NVIC_EN1_INT33 0x00000002
Interrupt 33 enable.
#define | NVIC_EN1_INT32 0x00000001
Interrupt 32 enable.
#define | NVIC_DIS0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_DIS0 register.
#define | NVIC_DIS0_INT30 0x40000000
Interrupt 30 disable.
#define | NVIC_DIS0_INT29 0x20000000
Interrupt 29 disable.
#define | NVIC_DIS0_INT28 0x10000000
Interrupt 28 disable.
#define | NVIC_DIS0_INT27 0x08000000
Interrupt 27 disable.
#define | NVIC_DIS0_INT26 0x04000000
Interrupt 26 disable.
#define | NVIC_DIS0_INT25 0x02000000
Interrupt 25 disable.
#define | NVIC_DIS0_INT24 0x01000000
Interrupt 24 disable.
#define | NVIC_DIS0_INT23 0x00800000
Interrupt 23 disable.
#define | NVIC_DIS0_INT22 0x00400000
Interrupt 22 disable.
#define | NVIC_DIS0_INT21 0x00200000
Interrupt 21 disable.
#define | NVIC_DIS0_INT20 0x00100000
Interrupt 20 disable.
#define | NVIC_DIS0_INT19 0x00080000
Interrupt 19 disable.
#define | NVIC_DIS0_INT18 0x00040000
Interrupt 18 disable.
#define | NVIC_DIS0_INT17 0x00020000
Interrupt 17 disable.
#define | NVIC_DIS0_INT16 0x00010000
Interrupt 16 disable.
#define | NVIC_DIS0_INT15 0x00008000
Interrupt 15 disable.
#define | NVIC_DIS0_INT14 0x00004000
Interrupt 14 disable.
#define | NVIC_DIS0_INT13 0x00002000
Interrupt 13 disable.
#define | NVIC_DIS0_INT12 0x00001000
Interrupt 12 disable.
#define | NVIC_DIS0_INT11 0x00000800
Interrupt 11 disable.
#define | NVIC_DIS0_INT10 0x00000400
Interrupt 10 disable.
#define | NVIC_DIS0_INT9 0x00000200
Interrupt 9 disable.
#define | NVIC_DIS0_INT8 0x00000100
Interrupt 8 disable.
#define | NVIC_DIS0_INT7 0x00000080
Interrupt 7 disable.
#define | NVIC_DIS0_INT6 0x00000040
Interrupt 6 disable.
#define | NVIC_DIS0_INT5 0x00000020
Interrupt 5 disable.
#define | NVIC_DIS0_INT4 0x00000010
Interrupt 4 disable.
#define | NVIC_DIS0_INT3 0x00000008
Interrupt 3 disable.
#define | NVIC_DIS0_INT2 0x00000004
Interrupt 2 disable.
#define | NVIC_DIS0_INT1 0x00000002
Interrupt 1 disable.
#define | NVIC_DIS0_INT0 0x00000001
Interrupt 0 disable.
#define | NVIC_DIS1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_DIS1 register.
#define | NVIC_DIS1_INT58 0x04000000
Interrupt 58 disable.
#define | NVIC_DIS1_INT57 0x02000000
Interrupt 57 disable.
#define | NVIC_DIS1_INT56 0x01000000
Interrupt 56 disable.
#define | NVIC_DIS1_INT55 0x00800000
Interrupt 55 disable.
#define | NVIC_DIS1_INT54 0x00400000
Interrupt 54 disable.
#define | NVIC_DIS1_INT53 0x00200000
Interrupt 53 disable.
#define | NVIC_DIS1_INT52 0x00100000
Interrupt 52 disable.
#define | NVIC_DIS1_INT51 0x00080000
Interrupt 51 disable.
#define | NVIC_DIS1_INT50 0x00040000
Interrupt 50 disable.
#define | NVIC_DIS1_INT49 0x00020000
Interrupt 49 disable.
#define | NVIC_DIS1_INT48 0x00010000
Interrupt 48 disable.
#define | NVIC_DIS1_INT47 0x00008000
Interrupt 47 disable.
#define | NVIC_DIS1_INT46 0x00004000
Interrupt 46 disable.
#define | NVIC_DIS1_INT45 0x00002000
Interrupt 45 disable.
#define | NVIC_DIS1_INT44 0x00001000
Interrupt 44 disable.
#define | NVIC_DIS1_INT43 0x00000800
Interrupt 43 disable.
#define | NVIC_DIS1_INT42 0x00000400
Interrupt 42 disable.
#define | NVIC_DIS1_INT41 0x00000200
Interrupt 41 disable.
#define | NVIC_DIS1_INT40 0x00000100
Interrupt 40 disable.
#define | NVIC_DIS1_INT39 0x00000080
Interrupt 39 disable.
#define | NVIC_DIS1_INT38 0x00000040
Interrupt 38 disable.
#define | NVIC_DIS1_INT37 0x00000020
Interrupt 37 disable.
#define | NVIC_DIS1_INT36 0x00000010
Interrupt 36 disable.
#define | NVIC_DIS1_INT35 0x00000008
Interrupt 35 disable.
#define | NVIC_DIS1_INT34 0x00000004
Interrupt 34 disable.
#define | NVIC_DIS1_INT33 0x00000002
Interrupt 33 disable.
#define | NVIC_DIS1_INT32 0x00000001
Interrupt 32 disable.
#define | NVIC_PEND0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_PEND0 register.
#define | NVIC_PEND0_INT30 0x40000000
Interrupt 30 pend.
#define | NVIC_PEND0_INT29 0x20000000
Interrupt 29 pend.
#define | NVIC_PEND0_INT28 0x10000000
Interrupt 28 pend.
#define | NVIC_PEND0_INT27 0x08000000
Interrupt 27 pend.
#define | NVIC_PEND0_INT26 0x04000000
Interrupt 26 pend.
#define | NVIC_PEND0_INT25 0x02000000
Interrupt 25 pend.
#define | NVIC_PEND0_INT24 0x01000000
Interrupt 24 pend.
#define | NVIC_PEND0_INT23 0x00800000
Interrupt 23 pend.
#define | NVIC_PEND0_INT22 0x00400000
Interrupt 22 pend.
#define | NVIC_PEND0_INT21 0x00200000
Interrupt 21 pend.
#define | NVIC_PEND0_INT20 0x00100000
Interrupt 20 pend.
#define | NVIC_PEND0_INT19 0x00080000
Interrupt 19 pend.
#define | NVIC_PEND0_INT18 0x00040000
Interrupt 18 pend.
#define | NVIC_PEND0_INT17 0x00020000
Interrupt 17 pend.
#define | NVIC_PEND0_INT16 0x00010000
Interrupt 16 pend.
#define | NVIC_PEND0_INT15 0x00008000
Interrupt 15 pend.
#define | NVIC_PEND0_INT14 0x00004000
Interrupt 14 pend.
#define | NVIC_PEND0_INT13 0x00002000
Interrupt 13 pend.
#define | NVIC_PEND0_INT12 0x00001000
Interrupt 12 pend.
#define | NVIC_PEND0_INT11 0x00000800
Interrupt 11 pend.
#define | NVIC_PEND0_INT10 0x00000400
Interrupt 10 pend.
#define | NVIC_PEND0_INT9 0x00000200
Interrupt 9 pend.
#define | NVIC_PEND0_INT8 0x00000100
Interrupt 8 pend.
#define | NVIC_PEND0_INT7 0x00000080
Interrupt 7 pend.
#define | NVIC_PEND0_INT6 0x00000040
Interrupt 6 pend.
#define | NVIC_PEND0_INT5 0x00000020
Interrupt 5 pend.
#define | NVIC_PEND0_INT4 0x00000010
Interrupt 4 pend.
#define | NVIC_PEND0_INT3 0x00000008
Interrupt 3 pend.
#define | NVIC_PEND0_INT2 0x00000004
Interrupt 2 pend.
#define | NVIC_PEND0_INT1 0x00000002
Interrupt 1 pend.
#define | NVIC_PEND0_INT0 0x00000001
Interrupt 0 pend.
#define | NVIC_PEND1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_PEND1 register.
#define | NVIC_PEND1_INT58 0x04000000
Interrupt 58 pend.
#define | NVIC_PEND1_INT57 0x02000000
Interrupt 57 pend.
#define | NVIC_PEND1_INT56 0x01000000
Interrupt 56 pend.
#define | NVIC_PEND1_INT55 0x00800000
Interrupt 55 pend.
#define | NVIC_PEND1_INT54 0x00400000
Interrupt 54 pend.
#define | NVIC_PEND1_INT53 0x00200000
Interrupt 53 pend.
#define | NVIC_PEND1_INT52 0x00100000
Interrupt 52 pend.
#define | NVIC_PEND1_INT51 0x00080000
Interrupt 51 pend.
#define | NVIC_PEND1_INT50 0x00040000
Interrupt 50 pend.
#define | NVIC_PEND1_INT49 0x00020000
Interrupt 49 pend.
#define | NVIC_PEND1_INT48 0x00010000
Interrupt 48 pend.
#define | NVIC_PEND1_INT47 0x00008000
Interrupt 47 pend.
#define | NVIC_PEND1_INT46 0x00004000
Interrupt 46 pend.
#define | NVIC_PEND1_INT45 0x00002000
Interrupt 45 pend.
#define | NVIC_PEND1_INT44 0x00001000
Interrupt 44 pend.
#define | NVIC_PEND1_INT43 0x00000800
Interrupt 43 pend.
#define | NVIC_PEND1_INT42 0x00000400
Interrupt 42 pend.
#define | NVIC_PEND1_INT41 0x00000200
Interrupt 41 pend.
#define | NVIC_PEND1_INT40 0x00000100
Interrupt 40 pend.
#define | NVIC_PEND1_INT39 0x00000080
Interrupt 39 pend.
#define | NVIC_PEND1_INT38 0x00000040
Interrupt 38 pend.
#define | NVIC_PEND1_INT37 0x00000020
Interrupt 37 pend.
#define | NVIC_PEND1_INT36 0x00000010
Interrupt 36 pend.
#define | NVIC_PEND1_INT35 0x00000008
Interrupt 35 pend.
#define | NVIC_PEND1_INT34 0x00000004
Interrupt 34 pend.
#define | NVIC_PEND1_INT33 0x00000002
Interrupt 33 pend.
#define | NVIC_PEND1_INT32 0x00000001
Interrupt 32 pend.
#define | NVIC_UNPEND0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_UNPEND0 register.
#define | NVIC_UNPEND0_INT30 0x40000000
Interrupt 30 unpend.
#define | NVIC_UNPEND0_INT29 0x20000000
Interrupt 29 unpend.
#define | NVIC_UNPEND0_INT28 0x10000000
Interrupt 28 unpend.
#define | NVIC_UNPEND0_INT27 0x08000000
Interrupt 27 unpend.
#define | NVIC_UNPEND0_INT26 0x04000000
Interrupt 26 unpend.
#define | NVIC_UNPEND0_INT25 0x02000000
Interrupt 25 unpend.
#define | NVIC_UNPEND0_INT24 0x01000000
Interrupt 24 unpend.
#define | NVIC_UNPEND0_INT23 0x00800000
Interrupt 23 unpend.
#define | NVIC_UNPEND0_INT22 0x00400000
Interrupt 22 unpend.
#define | NVIC_UNPEND0_INT21 0x00200000
Interrupt 21 unpend.
#define | NVIC_UNPEND0_INT20 0x00100000
Interrupt 20 unpend.
#define | NVIC_UNPEND0_INT19 0x00080000
Interrupt 19 unpend.
#define | NVIC_UNPEND0_INT18 0x00040000
Interrupt 18 unpend.
#define | NVIC_UNPEND0_INT17 0x00020000
Interrupt 17 unpend.
#define | NVIC_UNPEND0_INT16 0x00010000
Interrupt 16 unpend.
#define | NVIC_UNPEND0_INT15 0x00008000
Interrupt 15 unpend.
#define | NVIC_UNPEND0_INT14 0x00004000
Interrupt 14 unpend.
#define | NVIC_UNPEND0_INT13 0x00002000
Interrupt 13 unpend.
#define | NVIC_UNPEND0_INT12 0x00001000
Interrupt 12 unpend.
#define | NVIC_UNPEND0_INT11 0x00000800
Interrupt 11 unpend.
#define | NVIC_UNPEND0_INT10 0x00000400
Interrupt 10 unpend.
#define | NVIC_UNPEND0_INT9 0x00000200
Interrupt 9 unpend.
#define | NVIC_UNPEND0_INT8 0x00000100
Interrupt 8 unpend.
#define | NVIC_UNPEND0_INT7 0x00000080
Interrupt 7 unpend.
#define | NVIC_UNPEND0_INT6 0x00000040
Interrupt 6 unpend.
#define | NVIC_UNPEND0_INT5 0x00000020
Interrupt 5 unpend.
#define | NVIC_UNPEND0_INT4 0x00000010
Interrupt 4 unpend.
#define | NVIC_UNPEND0_INT3 0x00000008
Interrupt 3 unpend.
#define | NVIC_UNPEND0_INT2 0x00000004
Interrupt 2 unpend.
#define | NVIC_UNPEND0_INT1 0x00000002
Interrupt 1 unpend.
#define | NVIC_UNPEND0_INT0 0x00000001
Interrupt 0 unpend.
#define | NVIC_UNPEND1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_UNPEND1 register.
#define | NVIC_UNPEND1_INT58 0x04000000
Interrupt 58 unpend.
#define | NVIC_UNPEND1_INT57 0x02000000
Interrupt 57 unpend.
#define | NVIC_UNPEND1_INT56 0x01000000
Interrupt 56 unpend.
#define | NVIC_UNPEND1_INT55 0x00800000
Interrupt 55 unpend.
#define | NVIC_UNPEND1_INT54 0x00400000
Interrupt 54 unpend.
#define | NVIC_UNPEND1_INT53 0x00200000
Interrupt 53 unpend.
#define | NVIC_UNPEND1_INT52 0x00100000
Interrupt 52 unpend.
#define | NVIC_UNPEND1_INT51 0x00080000
Interrupt 51 unpend.
#define | NVIC_UNPEND1_INT50 0x00040000
Interrupt 50 unpend.
#define | NVIC_UNPEND1_INT49 0x00020000
Interrupt 49 unpend.
#define | NVIC_UNPEND1_INT48 0x00010000
Interrupt 48 unpend.
#define | NVIC_UNPEND1_INT47 0x00008000
Interrupt 47 unpend.
#define | NVIC_UNPEND1_INT46 0x00004000
Interrupt 46 unpend.
#define | NVIC_UNPEND1_INT45 0x00002000
Interrupt 45 unpend.
#define | NVIC_UNPEND1_INT44 0x00001000
Interrupt 44 unpend.
#define | NVIC_UNPEND1_INT43 0x00000800
Interrupt 43 unpend.
#define | NVIC_UNPEND1_INT42 0x00000400
Interrupt 42 unpend.
#define | NVIC_UNPEND1_INT41 0x00000200
Interrupt 41 unpend.
#define | NVIC_UNPEND1_INT40 0x00000100
Interrupt 40 unpend.
#define | NVIC_UNPEND1_INT39 0x00000080
Interrupt 39 unpend.
#define | NVIC_UNPEND1_INT38 0x00000040
Interrupt 38 unpend.
#define | NVIC_UNPEND1_INT37 0x00000020
Interrupt 37 unpend.
#define | NVIC_UNPEND1_INT36 0x00000010
Interrupt 36 unpend.
#define | NVIC_UNPEND1_INT35 0x00000008
Interrupt 35 unpend.
#define | NVIC_UNPEND1_INT34 0x00000004
Interrupt 34 unpend.
#define | NVIC_UNPEND1_INT33 0x00000002
Interrupt 33 unpend.
#define | NVIC_UNPEND1_INT32 0x00000001
Interrupt 32 unpend.
#define | NVIC_ACTIVE0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_ACTIVE0 register.
#define | NVIC_ACTIVE0_INT30 0x40000000
Interrupt 30 active.
#define | NVIC_ACTIVE0_INT29 0x20000000
Interrupt 29 active.
#define | NVIC_ACTIVE0_INT28 0x10000000
Interrupt 28 active.
#define | NVIC_ACTIVE0_INT27 0x08000000
Interrupt 27 active.
#define | NVIC_ACTIVE0_INT26 0x04000000
Interrupt 26 active.
#define | NVIC_ACTIVE0_INT25 0x02000000
Interrupt 25 active.
#define | NVIC_ACTIVE0_INT24 0x01000000
Interrupt 24 active.
#define | NVIC_ACTIVE0_INT23 0x00800000
Interrupt 23 active.
#define | NVIC_ACTIVE0_INT22 0x00400000
Interrupt 22 active.
#define | NVIC_ACTIVE0_INT21 0x00200000
Interrupt 21 active.
#define | NVIC_ACTIVE0_INT20 0x00100000
Interrupt 20 active.
#define | NVIC_ACTIVE0_INT19 0x00080000
Interrupt 19 active.
#define | NVIC_ACTIVE0_INT18 0x00040000
Interrupt 18 active.
#define | NVIC_ACTIVE0_INT17 0x00020000
Interrupt 17 active.
#define | NVIC_ACTIVE0_INT16 0x00010000
Interrupt 16 active.
#define | NVIC_ACTIVE0_INT15 0x00008000
Interrupt 15 active.
#define | NVIC_ACTIVE0_INT14 0x00004000
Interrupt 14 active.
#define | NVIC_ACTIVE0_INT13 0x00002000
Interrupt 13 active.
#define | NVIC_ACTIVE0_INT12 0x00001000
Interrupt 12 active.
#define | NVIC_ACTIVE0_INT11 0x00000800
Interrupt 11 active.
#define | NVIC_ACTIVE0_INT10 0x00000400
Interrupt 10 active.
#define | NVIC_ACTIVE0_INT9 0x00000200
Interrupt 9 active.
#define | NVIC_ACTIVE0_INT8 0x00000100
Interrupt 8 active.
#define | NVIC_ACTIVE0_INT7 0x00000080
Interrupt 7 active.
#define | NVIC_ACTIVE0_INT6 0x00000040
Interrupt 6 active.
#define | NVIC_ACTIVE0_INT5 0x00000020
Interrupt 5 active.
#define | NVIC_ACTIVE0_INT4 0x00000010
Interrupt 4 active.
#define | NVIC_ACTIVE0_INT3 0x00000008
Interrupt 3 active.
#define | NVIC_ACTIVE0_INT2 0x00000004
Interrupt 2 active.
#define | NVIC_ACTIVE0_INT1 0x00000002
Interrupt 1 active.
#define | NVIC_ACTIVE0_INT0 0x00000001
Interrupt 0 active.
#define | NVIC_ACTIVE1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_ACTIVE1 register.
#define | NVIC_ACTIVE1_INT58 0x04000000
Interrupt 58 active.
#define | NVIC_ACTIVE1_INT57 0x02000000
Interrupt 57 active.
#define | NVIC_ACTIVE1_INT56 0x01000000
Interrupt 56 active.
#define | NVIC_ACTIVE1_INT55 0x00800000
Interrupt 55 active.
#define | NVIC_ACTIVE1_INT54 0x00400000
Interrupt 54 active.
#define | NVIC_ACTIVE1_INT53 0x00200000
Interrupt 53 active.
#define | NVIC_ACTIVE1_INT52 0x00100000
Interrupt 52 active.
#define | NVIC_ACTIVE1_INT51 0x00080000
Interrupt 51 active.
#define | NVIC_ACTIVE1_INT50 0x00040000
Interrupt 50 active.
#define | NVIC_ACTIVE1_INT49 0x00020000
Interrupt 49 active.
#define | NVIC_ACTIVE1_INT48 0x00010000
Interrupt 48 active.
#define | NVIC_ACTIVE1_INT47 0x00008000
Interrupt 47 active.
#define | NVIC_ACTIVE1_INT46 0x00004000
Interrupt 46 active.
#define | NVIC_ACTIVE1_INT45 0x00002000
Interrupt 45 active.
#define | NVIC_ACTIVE1_INT44 0x00001000
Interrupt 44 active.
#define | NVIC_ACTIVE1_INT43 0x00000800
Interrupt 43 active.
#define | NVIC_ACTIVE1_INT42 0x00000400
Interrupt 42 active.
#define | NVIC_ACTIVE1_INT41 0x00000200
Interrupt 41 active.
#define | NVIC_ACTIVE1_INT40 0x00000100
Interrupt 40 active.
#define | NVIC_ACTIVE1_INT39 0x00000080
Interrupt 39 active.
#define | NVIC_ACTIVE1_INT38 0x00000040
Interrupt 38 active.
#define | NVIC_ACTIVE1_INT37 0x00000020
Interrupt 37 active.
#define | NVIC_ACTIVE1_INT36 0x00000010
Interrupt 36 active.
#define | NVIC_ACTIVE1_INT35 0x00000008
Interrupt 35 active.
#define | NVIC_ACTIVE1_INT34 0x00000004
Interrupt 34 active.
#define | NVIC_ACTIVE1_INT33 0x00000002
Interrupt 33 active.
#define | NVIC_ACTIVE1_INT32 0x00000001
Interrupt 32 active.
#define | NVIC_PRI0_INT3_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI0_INT2_M 0x00FF0000
Interrupt 2 priority mask.
#define | NVIC_PRI0_INT1_M 0x0000FF00
Interrupt 1 priority mask.
#define | NVIC_PRI0_INT0_M 0x000000FF
Interrupt 0 priority mask.
#define | NVIC_PRI0_INT3_S 24
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI0_INT2_S 16
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI0_INT1_S 8
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI0_INT0_S 0
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI1_INT7_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI1_INT6_M 0x00FF0000
Interrupt 6 priority mask.
#define | NVIC_PRI1_INT5_M 0x0000FF00
Interrupt 5 priority mask.
#define | NVIC_PRI1_INT4_M 0x000000FF
Interrupt 4 priority mask.
#define | NVIC_PRI1_INT7_S 24
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI1_INT6_S 16
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI1_INT5_S 8
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI1_INT4_S 0
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI2_INT11_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI2_INT10_M 0x00FF0000
Interrupt 10 priority mask.
#define | NVIC_PRI2_INT9_M 0x0000FF00
Interrupt 9 priority mask.
#define | NVIC_PRI2_INT8_M 0x000000FF
Interrupt 8 priority mask.
#define | NVIC_PRI2_INT11_S 24
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI2_INT10_S 16
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI2_INT9_S 8
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI2_INT8_S 0
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI3_INT15_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI3_INT14_M 0x00FF0000
Interrupt 14 priority mask.
#define | NVIC_PRI3_INT13_M 0x0000FF00
Interrupt 13 priority mask.
#define | NVIC_PRI3_INT12_M 0x000000FF
Interrupt 12 priority mask.
#define | NVIC_PRI3_INT15_S 24
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI3_INT14_S 16
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI3_INT13_S 8
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI3_INT12_S 0
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI4_INT19_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI4_INT18_M 0x00FF0000
Interrupt 18 priority mask.
#define | NVIC_PRI4_INT17_M 0x0000FF00
Interrupt 17 priority mask.
#define | NVIC_PRI4_INT16_M 0x000000FF
Interrupt 16 priority mask.
#define | NVIC_PRI4_INT19_S 24
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI4_INT18_S 16
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI4_INT17_S 8
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI4_INT16_S 0
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI5_INT23_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI5_INT22_M 0x00FF0000
Interrupt 22 priority mask.
#define | NVIC_PRI5_INT21_M 0x0000FF00
Interrupt 21 priority mask.
#define | NVIC_PRI5_INT20_M 0x000000FF
Interrupt 20 priority mask.
#define | NVIC_PRI5_INT23_S 24
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI5_INT22_S 16
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI5_INT21_S 8
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI5_INT20_S 0
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI6_INT27_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI6_INT26_M 0x00FF0000
Interrupt 26 priority mask.
#define | NVIC_PRI6_INT25_M 0x0000FF00
Interrupt 25 priority mask.
#define | NVIC_PRI6_INT24_M 0x000000FF
Interrupt 24 priority mask.
#define | NVIC_PRI6_INT27_S 24
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI6_INT26_S 16
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI6_INT25_S 8
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI6_INT24_S 0
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI7_INT31_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI7_INT30_M 0x00FF0000
Interrupt 30 priority mask.
#define | NVIC_PRI7_INT29_M 0x0000FF00
Interrupt 29 priority mask.
#define | NVIC_PRI7_INT28_M 0x000000FF
Interrupt 28 priority mask.
#define | NVIC_PRI7_INT31_S 24
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI7_INT30_S 16
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI7_INT29_S 8
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI7_INT28_S 0
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI8_INT35_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI8_INT34_M 0x00FF0000
Interrupt 34 priority mask.
#define | NVIC_PRI8_INT33_M 0x0000FF00
Interrupt 33 priority mask.
#define | NVIC_PRI8_INT32_M 0x000000FF
Interrupt 32 priority mask.
#define | NVIC_PRI8_INT35_S 24
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI8_INT34_S 16
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI8_INT33_S 8
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI8_INT32_S 0
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI9_INT39_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI9_INT38_M 0x00FF0000
Interrupt 38 priority mask.
#define | NVIC_PRI9_INT37_M 0x0000FF00
Interrupt 37 priority mask.
#define | NVIC_PRI9_INT36_M 0x000000FF
Interrupt 36 priority mask.
#define | NVIC_PRI9_INT39_S 24
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI9_INT38_S 16
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI9_INT37_S 8
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI9_INT36_S 0
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI10_INT43_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_PRI10_INT42_M 0x00FF0000
Interrupt 42 priority mask.
#define | NVIC_PRI10_INT41_M 0x0000FF00
Interrupt 41 priority mask.
#define | NVIC_PRI10_INT40_M 0x000000FF
Interrupt 40 priority mask.
#define | NVIC_PRI10_INT43_S 24
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_PRI10_INT42_S 16
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_PRI10_INT41_S 8
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_PRI10_INT40_S 0
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_CPUID_IMP_M 0xFF000000
The following are defines for the bit fields in the NVIC_CPUID register.
#define | NVIC_CPUID_VAR_M 0x00F00000
Variant.
#define | NVIC_CPUID_PARTNO_M 0x0000FFF0
Processor part number.
#define | NVIC_CPUID_REV_M 0x0000000F
Revision.
#define | NVIC_INT_CTRL_NMI_SET 0x80000000
The following are defines for the bit fields in the NVIC_INT_CTRL register.
#define | NVIC_INT_CTRL_PEND_SV 0x10000000
Pend a PendSV.
#define | NVIC_INT_CTRL_UNPEND_SV 0x08000000
Unpend a PendSV.
#define | NVIC_INT_CTRL_PENDSTSET 0x04000000
Set pending SysTick interrupt.
#define | NVIC_INT_CTRL_PENDSTCLR 0x02000000
Clear pending SysTick interrupt.
#define | NVIC_INT_CTRL_ISR_PRE 0x00800000
Debug interrupt handling.
#define | NVIC_INT_CTRL_ISR_PEND 0x00400000
Debug interrupt pending.
#define | NVIC_INT_CTRL_VEC_PEN_M 0x003FF000
Highest pending exception.
#define | NVIC_INT_CTRL_RET_BASE 0x00000800
Return to base.
#define | NVIC_INT_CTRL_VEC_ACT_M 0x000003FF
Current active exception.
#define | NVIC_INT_CTRL_VEC_PEN_S 12
The following are defines for the bit fields in the NVIC_INT_CTRL register.
#define | NVIC_INT_CTRL_VEC_ACT_S 0
The following are defines for the bit fields in the NVIC_INT_CTRL register.
#define | NVIC_VTABLE_BASE 0x20000000
The following are defines for the bit fields in the NVIC_VTABLE register.
#define | NVIC_VTABLE_OFFSET_M 0x1FFFFF00
Vector table offset.
#define | NVIC_VTABLE_OFFSET_S 8
The following are defines for the bit fields in the NVIC_VTABLE register.
#define | NVIC_APINT_VECTKEY_M 0xFFFF0000
The following are defines for the bit fields in the NVIC_APINT register.
#define | NVIC_APINT_VECTKEY 0x05FA0000
Vector key.
#define | NVIC_APINT_ENDIANESS 0x00008000
Data endianess.
#define | NVIC_APINT_PRIGROUP_M 0x00000700
Priority group.
#define | NVIC_APINT_PRIGROUP_0_8 0x00000700
Priority group 0.8 split.
#define | NVIC_APINT_PRIGROUP_1_7 0x00000600
Priority group 1.7 split.
#define | NVIC_APINT_PRIGROUP_2_6 0x00000500
Priority group 2.6 split.
#define | NVIC_APINT_PRIGROUP_3_5 0x00000400
Priority group 3.5 split.
#define | NVIC_APINT_PRIGROUP_4_4 0x00000300
Priority group 4.4 split.
#define | NVIC_APINT_PRIGROUP_5_3 0x00000200
Priority group 5.3 split.
#define | NVIC_APINT_PRIGROUP_6_2 0x00000100
Priority group 6.2 split.
#define | NVIC_APINT_SYSRESETREQ 0x00000004
System reset request.
#define | NVIC_APINT_VECT_CLR_ACT 0x00000002
Clear active NMI/fault info.
#define | NVIC_APINT_VECT_RESET 0x00000001
System reset.
#define | NVIC_APINT_PRIGROUP_7_1 0x00000000
Priority group 7.1 split.
#define | NVIC_SYS_CTRL_SEVONPEND 0x00000010
The following are defines for the bit fields in the NVIC_SYS_CTRL register.
#define | NVIC_SYS_CTRL_SLEEPDEEP 0x00000004
Deep sleep enable.
#define | NVIC_SYS_CTRL_SLEEPEXIT 0x00000002
Sleep on ISR exit.
#define | NVIC_CFG_CTRL_BFHFNMIGN 0x00000100
The following are defines for the bit fields in the NVIC_CFG_CTRL register.
#define | NVIC_CFG_CTRL_DIV0 0x00000010
Trap on divide by 0.
#define | NVIC_CFG_CTRL_UNALIGNED 0x00000008
Trap on unaligned access.
#define | NVIC_CFG_CTRL_DEEP_PEND 0x00000004
Allow deep interrupt trigger.
#define | NVIC_CFG_CTRL_MAIN_PEND 0x00000002
Allow main interrupt trigger.
#define | NVIC_CFG_CTRL_BASE_THR 0x00000001
Thread state control.
#define | NVIC_SYS_PRI1_RES_M 0xFF000000
The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
#define | NVIC_SYS_PRI1_USAGE_M 0x00FF0000
Priority of usage fault handler.
#define | NVIC_SYS_PRI1_BUS_M 0x0000FF00
Priority of bus fault handler.
#define | NVIC_SYS_PRI1_MEM_M 0x000000FF
Priority of mem manage handler.
#define | NVIC_SYS_PRI1_USAGE_S 16
The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
#define | NVIC_SYS_PRI1_BUS_S 8
The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
#define | NVIC_SYS_PRI1_MEM_S 0
The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
#define | NVIC_SYS_PRI2_SVC_M 0xFF000000
The following are defines for the bit fields in the NVIC_SYS_PRI2 register.
#define | NVIC_SYS_PRI2_RES_M 0x00FFFFFF
Priority of reserved handlers.
#define | NVIC_SYS_PRI2_SVC_S 24
The following are defines for the bit fields in the NVIC_SYS_PRI2 register.
#define | NVIC_SYS_PRI3_TICK_M 0xFF000000
The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
#define | NVIC_SYS_PRI3_PENDSV_M 0x00FF0000
Priority of PendSV handler.
#define | NVIC_SYS_PRI3_RES_M 0x0000FF00
Priority of reserved handler.
#define | NVIC_SYS_PRI3_DEBUG_M 0x000000FF
Priority of debug handler.
#define | NVIC_SYS_PRI3_TICK_S 24
The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
#define | NVIC_SYS_PRI3_PENDSV_S 16
The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
#define | NVIC_SYS_PRI3_DEBUG_S 0
The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
#define | NVIC_SYS_HND_CTRL_USAGE 0x00040000
The following are defines for the bit fields in the NVIC_SYS_HND_CTRL register.
#define | NVIC_SYS_HND_CTRL_BUS 0x00020000
Bus fault enable.
#define | NVIC_SYS_HND_CTRL_MEM 0x00010000
Mem manage fault enable.
#define | NVIC_SYS_HND_CTRL_SVC 0x00008000
SVCall is pended.
#define | NVIC_SYS_HND_CTRL_BUSP 0x00004000
Bus fault is pended.
#define | NVIC_SYS_HND_CTRL_TICK 0x00000800
Sys tick is active.
#define | NVIC_SYS_HND_CTRL_PNDSV 0x00000400
PendSV is active.
#define | NVIC_SYS_HND_CTRL_MON 0x00000100
Monitor is active.
#define | NVIC_SYS_HND_CTRL_SVCA 0x00000080
SVCall is active.
#define | NVIC_SYS_HND_CTRL_USGA 0x00000008
Usage fault is active.
#define | NVIC_SYS_HND_CTRL_BUSA 0x00000002
Bus fault is active.
#define | NVIC_SYS_HND_CTRL_MEMA 0x00000001
Mem manage is active.
#define | NVIC_FAULT_STAT_DIV0 0x02000000
The following are defines for the bit fields in the NVIC_FAULT_STAT register.
#define | NVIC_FAULT_STAT_UNALIGN 0x01000000
Unaligned access fault.
#define | NVIC_FAULT_STAT_NOCP 0x00080000
No coprocessor fault.
#define | NVIC_FAULT_STAT_INVPC 0x00040000
Invalid PC fault.
#define | NVIC_FAULT_STAT_INVSTAT 0x00020000
Invalid state fault.
#define | NVIC_FAULT_STAT_UNDEF 0x00010000
Undefined instruction fault.
#define | NVIC_FAULT_STAT_BFARV 0x00008000
BFAR is valid.
#define | NVIC_FAULT_STAT_BSTKE 0x00001000
Stack bus fault.
#define | NVIC_FAULT_STAT_BUSTKE 0x00000800
Unstack bus fault.
#define | NVIC_FAULT_STAT_IMPRE 0x00000400
Imprecise data bus error.
#define | NVIC_FAULT_STAT_PRECISE 0x00000200
Precise data bus error.
#define | NVIC_FAULT_STAT_IBUS 0x00000100
Instruction bus fault.
#define | NVIC_FAULT_STAT_MMARV 0x00000080
MMAR is valid.
#define | NVIC_FAULT_STAT_MSTKE 0x00000010
Stack access violation.
#define | NVIC_FAULT_STAT_MUSTKE 0x00000008
Unstack access violation.
#define | NVIC_FAULT_STAT_DERR 0x00000002
Data access violation.
#define | NVIC_FAULT_STAT_IERR 0x00000001
Instruction access violation.
#define | NVIC_HFAULT_STAT_DBG 0x80000000
The following are defines for the bit fields in the NVIC_HFAULT_STAT register.
#define | NVIC_HFAULT_STAT_FORCED 0x40000000
Cannot execute fault handler.
#define | NVIC_HFAULT_STAT_VECT 0x00000002
Vector table read fault.
#define | NVIC_DEBUG_STAT_EXTRNL 0x00000010
The following are defines for the bit fields in the NVIC_DEBUG_STAT register.
#define | NVIC_DEBUG_STAT_VCATCH 0x00000008
Vector catch.
#define | NVIC_DEBUG_STAT_DWTTRAP 0x00000004
DWT match.
#define | NVIC_DEBUG_STAT_BKPT 0x00000002
Breakpoint instruction.
#define | NVIC_DEBUG_STAT_HALTED 0x00000001
Halt request.
#define | NVIC_MM_ADDR_M 0xFFFFFFFF
The following are defines for the bit fields in the NVIC_MM_ADDR register.
#define | NVIC_MM_ADDR_S 0
The following are defines for the bit fields in the NVIC_MM_ADDR register.
#define | NVIC_FAULT_ADDR_M 0xFFFFFFFF
The following are defines for the bit fields in the NVIC_FAULT_ADDR register.
#define | NVIC_FAULT_ADDR_S 0
The following are defines for the bit fields in the NVIC_FAULT_ADDR register.
#define | NVIC_MPU_TYPE_IREGION_M 0x00FF0000
The following are defines for the bit fields in the NVIC_MPU_TYPE register.
#define | NVIC_MPU_TYPE_DREGION_M 0x0000FF00
Number of D regions.
#define | NVIC_MPU_TYPE_SEPARATE 0x00000001
Separate or unified MPU.
#define | NVIC_MPU_TYPE_IREGION_S 16
The following are defines for the bit fields in the NVIC_MPU_TYPE register.
#define | NVIC_MPU_TYPE_DREGION_S 8
The following are defines for the bit fields in the NVIC_MPU_TYPE register.
#define | NVIC_MPU_CTRL_PRIVDEFEN 0x00000004
The following are defines for the bit fields in the NVIC_MPU_CTRL register.
#define | NVIC_MPU_CTRL_HFNMIENA 0x00000002
MPU enabled during faults.
#define | NVIC_MPU_CTRL_ENABLE 0x00000001
MPU enable.
#define | NVIC_MPU_NUMBER_M 0x000000FF
The following are defines for the bit fields in the NVIC_MPU_NUMBER register.
#define | NVIC_MPU_NUMBER_S 0
The following are defines for the bit fields in the NVIC_MPU_NUMBER register.
#define | NVIC_MPU_BASE_ADDR_M 0xFFFFFFE0
The following are defines for the bit fields in the NVIC_MPU_BASE register.
#define | NVIC_MPU_BASE_VALID 0x00000010
Region number valid.
#define | NVIC_MPU_BASE_REGION_M 0x0000000F
Region number.
#define | NVIC_MPU_BASE_ADDR_S 8
The following are defines for the bit fields in the NVIC_MPU_BASE register.
#define | NVIC_MPU_BASE_REGION_S 0
The following are defines for the bit fields in the NVIC_MPU_BASE register.
#define | NVIC_MPU_ATTR_M 0xFFFF0000
The following are defines for the bit fields in the NVIC_MPU_ATTR register.
#define | NVIC_MPU_ATTR_AP_NO_NO 0x00000000
prv: no access, usr: no access
#define | NVIC_MPU_ATTR_BUFFRABLE 0x00010000
Bufferable.
#define | NVIC_MPU_ATTR_CACHEABLE 0x00020000
Cacheable.
#define | NVIC_MPU_ATTR_SHAREABLE 0x00040000
Shareable.
#define | NVIC_MPU_ATTR_TEX_M 0x00380000
Type extension mask.
#define | NVIC_MPU_ATTR_AP_RW_NO 0x01000000
prv: rw, usr: none
#define | NVIC_MPU_ATTR_AP_RW_RO 0x02000000
prv: rw, usr: read-only
#define | NVIC_MPU_ATTR_AP_RW_RW 0x03000000
prv: rw, usr: rw
#define | NVIC_MPU_ATTR_AP_RO_NO 0x05000000
prv: ro, usr: none
#define | NVIC_MPU_ATTR_AP_RO_RO 0x06000000
prv: ro, usr: ro
#define | NVIC_MPU_ATTR_AP_M 0x07000000
Access permissions mask.
#define | NVIC_MPU_ATTR_XN 0x10000000
Execute disable.
#define | NVIC_MPU_ATTR_SRD_M 0x0000FF00
Sub-region disable mask.
#define | NVIC_MPU_ATTR_SRD_0 0x00000100
Sub-region 0 disable.
#define | NVIC_MPU_ATTR_SRD_1 0x00000200
Sub-region 1 disable.
#define | NVIC_MPU_ATTR_SRD_2 0x00000400
Sub-region 2 disable.
#define | NVIC_MPU_ATTR_SRD_3 0x00000800
Sub-region 3 disable.
#define | NVIC_MPU_ATTR_SRD_4 0x00001000
Sub-region 4 disable.
#define | NVIC_MPU_ATTR_SRD_5 0x00002000
Sub-region 5 disable.
#define | NVIC_MPU_ATTR_SRD_6 0x00004000
Sub-region 6 disable.
#define | NVIC_MPU_ATTR_SRD_7 0x00008000
Sub-region 7 disable.
#define | NVIC_MPU_ATTR_SIZE_M 0x0000003E
Region size mask.
#define | NVIC_MPU_ATTR_SIZE_32B 0x00000008
Region size 32 bytes.
#define | NVIC_MPU_ATTR_SIZE_64B 0x0000000A
Region size 64 bytes.
#define | NVIC_MPU_ATTR_SIZE_128B 0x0000000C
Region size 128 bytes.
#define | NVIC_MPU_ATTR_SIZE_256B 0x0000000E
Region size 256 bytes.
#define | NVIC_MPU_ATTR_SIZE_512B 0x00000010
Region size 512 bytes.
#define | NVIC_MPU_ATTR_SIZE_1K 0x00000012
Region size 1 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_2K 0x00000014
Region size 2 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_4K 0x00000016
Region size 4 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_8K 0x00000018
Region size 8 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_16K 0x0000001A
Region size 16 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_32K 0x0000001C
Region size 32 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_64K 0x0000001E
Region size 64 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_128K 0x00000020
Region size 128 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_256K 0x00000022
Region size 256 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_512K 0x00000024
Region size 512 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_1M 0x00000026
Region size 1 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_2M 0x00000028
Region size 2 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_4M 0x0000002A
Region size 4 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_8M 0x0000002C
Region size 8 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_16M 0x0000002E
Region size 16 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_32M 0x00000030
Region size 32 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_64M 0x00000032
Region size 64 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_128M 0x00000034
Region size 128 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_256M 0x00000036
Region size 256 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_512M 0x00000038
Region size 512 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_1G 0x0000003A
Region size 1 Gbytes.
#define | NVIC_MPU_ATTR_SIZE_2G 0x0000003C
Region size 2 Gbytes.
#define | NVIC_MPU_ATTR_SIZE_4G 0x0000003E
Region size 4 Gbytes.
#define | NVIC_MPU_ATTR_ENABLE 0x00000001
Region enable.
#define | NVIC_DBG_CTRL_DBGKEY_M 0xFFFF0000
The following are defines for the bit fields in the NVIC_DBG_CTRL register.
#define | NVIC_DBG_CTRL_DBGKEY 0xA05F0000
Debug key.
#define | NVIC_DBG_CTRL_S_RESET_ST 0x02000000
Core has reset since last read.
#define | NVIC_DBG_CTRL_S_RETIRE_ST 0x01000000
Core has executed insruction.
#define | NVIC_DBG_CTRL_S_LOCKUP 0x00080000
Core is locked up.
#define | NVIC_DBG_CTRL_S_SLEEP 0x00040000
Core is sleeping.
#define | NVIC_DBG_CTRL_S_HALT 0x00020000
Core status on halt.
#define | NVIC_DBG_CTRL_S_REGRDY 0x00010000
Register read/write available.
#define | NVIC_DBG_CTRL_C_SNAPSTALL 0x00000020
Breaks a stalled load/store.
#define | NVIC_DBG_CTRL_C_MASKINT 0x00000008
Mask interrupts when stepping.
#define | NVIC_DBG_CTRL_C_STEP 0x00000004
Step the core.
#define | NVIC_DBG_CTRL_C_HALT 0x00000002
Halt the core.
#define | NVIC_DBG_CTRL_C_DEBUGEN 0x00000001
Enable debug.
#define | NVIC_DBG_XFER_REG_WNR 0x00010000
The following are defines for the bit fields in the NVIC_DBG_XFER register.
#define | NVIC_DBG_XFER_REG_SEL_M 0x0000001F
Register.
#define | NVIC_DBG_XFER_REG_CFBP 0x00000014
Control/Fault/BasePri/PriMask.
#define | NVIC_DBG_XFER_REG_DSP 0x00000013
Deep SP.
#define | NVIC_DBG_XFER_REG_PSP 0x00000012
Process SP.
#define | NVIC_DBG_XFER_REG_MSP 0x00000011
Main SP.
#define | NVIC_DBG_XFER_REG_FLAGS 0x00000010
xPSR/Flags register
#define | NVIC_DBG_XFER_REG_R15 0x0000000F
Register R15.
#define | NVIC_DBG_XFER_REG_R14 0x0000000E
Register R14.
#define | NVIC_DBG_XFER_REG_R13 0x0000000D
Register R13.
#define | NVIC_DBG_XFER_REG_R12 0x0000000C
Register R12.
#define | NVIC_DBG_XFER_REG_R11 0x0000000B
Register R11.
#define | NVIC_DBG_XFER_REG_R10 0x0000000A
Register R10.
#define | NVIC_DBG_XFER_REG_R9 0x00000009
Register R9.
#define | NVIC_DBG_XFER_REG_R8 0x00000008
Register R8.
#define | NVIC_DBG_XFER_REG_R7 0x00000007
Register R7.
#define | NVIC_DBG_XFER_REG_R6 0x00000006
Register R6.
#define | NVIC_DBG_XFER_REG_R5 0x00000005
Register R5.
#define | NVIC_DBG_XFER_REG_R4 0x00000004
Register R4.
#define | NVIC_DBG_XFER_REG_R3 0x00000003
Register R3.
#define | NVIC_DBG_XFER_REG_R2 0x00000002
Register R2.
#define | NVIC_DBG_XFER_REG_R1 0x00000001
Register R1.
#define | NVIC_DBG_XFER_REG_R0 0x00000000
Register R0.
#define | NVIC_DBG_DATA_M 0xFFFFFFFF
The following are defines for the bit fields in the NVIC_DBG_DATA register.
#define | NVIC_DBG_DATA_S 0
The following are defines for the bit fields in the NVIC_DBG_DATA register.
#define | NVIC_DBG_INT_HARDERR 0x00000400
The following are defines for the bit fields in the NVIC_DBG_INT register.
#define | NVIC_DBG_INT_INTERR 0x00000200
Debug trap on interrupt errors.
#define | NVIC_DBG_INT_BUSERR 0x00000100
Debug trap on bus error.
#define | NVIC_DBG_INT_STATERR 0x00000080
Debug trap on usage fault state.
#define | NVIC_DBG_INT_CHKERR 0x00000040
Debug trap on usage fault check.
#define | NVIC_DBG_INT_NOCPERR 0x00000020
Debug trap on coprocessor error.
#define | NVIC_DBG_INT_MMERR 0x00000010
Debug trap on mem manage fault.
#define | NVIC_DBG_INT_RESET 0x00000008
Core reset status.
#define | NVIC_DBG_INT_RSTPENDCLR 0x00000004
Clear pending core reset.
#define | NVIC_DBG_INT_RSTPENDING 0x00000002
Core reset is pending.
#define | NVIC_DBG_INT_RSTVCATCH 0x00000001
Reset vector catch.
#define | NVIC_SW_TRIG_INTID_M 0x000003FF
The following are defines for the bit fields in the NVIC_SW_TRIG register.
#define | NVIC_SW_TRIG_INTID_S 0
The following are defines for the bit fields in the NVIC_SW_TRIG register.
#define | WATCHDOG_LOAD_R (*((reg32_t *)0x40000000))
The following definitions are deprecated.
#define | WATCHDOG_VALUE_R (*((reg32_t *)0x40000004))
The following definitions are deprecated.
#define | WATCHDOG_CTL_R (*((reg32_t *)0x40000008))
The following definitions are deprecated.
#define | WATCHDOG_ICR_R (*((reg32_t *)0x4000000C))
The following definitions are deprecated.
#define | WATCHDOG_RIS_R (*((reg32_t *)0x40000010))
The following definitions are deprecated.
#define | WATCHDOG_MIS_R (*((reg32_t *)0x40000014))
The following definitions are deprecated.
#define | WATCHDOG_TEST_R (*((reg32_t *)0x40000418))
The following definitions are deprecated.
#define | WATCHDOG_LOCK_R (*((reg32_t *)0x40000C00))
The following definitions are deprecated.
#define | I2C_SICR_IC 0x00000001
Deprecated defines for the bit fields in the I2C_O_SICR register.
#define | I2C_SMIS_MIS 0x00000001
Deprecated defines for the bit fields in the I2C_O_SMIS register.
#define | I2C_SRIS_RIS 0x00000001
Deprecated defines for the bit fields in the I2C_O_SRIS register.
#define | I2C_SIMR_IM 0x00000001
Deprecated defines for the bit fields in the I2C_O_SIMR register.
#define | ADC_TMLB_CNT_M 0x000003C0
Deprecated defines for the bit fields in the the interpretation of the data in the SSFIFOx when the ADC TMLB is enabled.
#define | ADC_TMLB_CONT 0x00000020
Continuation Sample Indicator.
#define | ADC_TMLB_DIFF 0x00000010
Differential Sample Indicator.
#define | ADC_TMLB_TS 0x00000008
Temp Sensor Sample Indicator.
#define | ADC_TMLB_MUX_M 0x00000007
Analog Input Indicator.
#define | ADC_TMLB_CNT_S 6
Sample counter shift.
#define | ADC_TMLB_MUX_S 0
Input channel number shift.
#define | ADC_ACTSS_R (*((reg32_t *)0x40038000))
Deprecated defines for the ADC register offsets.
#define | ADC_RIS_R (*((reg32_t *)0x40038004))
Deprecated defines for the ADC register offsets.
#define | ADC_IM_R (*((reg32_t *)0x40038008))
Deprecated defines for the ADC register offsets.
#define | ADC_ISC_R (*((reg32_t *)0x4003800C))
Deprecated defines for the ADC register offsets.
#define | ADC_OSTAT_R (*((reg32_t *)0x40038010))
Deprecated defines for the ADC register offsets.
#define | ADC_EMUX_R (*((reg32_t *)0x40038014))
Deprecated defines for the ADC register offsets.
#define | ADC_USTAT_R (*((reg32_t *)0x40038018))
Deprecated defines for the ADC register offsets.
#define | ADC_SSPRI_R (*((reg32_t *)0x40038020))
Deprecated defines for the ADC register offsets.
#define | ADC_PSSI_R (*((reg32_t *)0x40038028))
Deprecated defines for the ADC register offsets.
#define | ADC_SAC_R (*((reg32_t *)0x40038030))
Deprecated defines for the ADC register offsets.
#define | ADC_SSMUX0_R (*((reg32_t *)0x40038040))
Deprecated defines for the ADC register offsets.
#define | ADC_SSCTL0_R (*((reg32_t *)0x40038044))
Deprecated defines for the ADC register offsets.
#define | ADC_SSFIFO0_R (*((reg32_t *)0x40038048))
Deprecated defines for the ADC register offsets.
#define | ADC_SSFSTAT0_R (*((reg32_t *)0x4003804C))
Deprecated defines for the ADC register offsets.
#define | ADC_SSMUX1_R (*((reg32_t *)0x40038060))
Deprecated defines for the ADC register offsets.
#define | ADC_SSCTL1_R (*((reg32_t *)0x40038064))
Deprecated defines for the ADC register offsets.
#define | ADC_SSFIFO1_R (*((reg32_t *)0x40038068))
Deprecated defines for the ADC register offsets.
#define | ADC_SSFSTAT1_R (*((reg32_t *)0x4003806C))
Deprecated defines for the ADC register offsets.
#define | ADC_SSMUX2_R (*((reg32_t *)0x40038080))
Deprecated defines for the ADC register offsets.
#define | ADC_SSCTL2_R (*((reg32_t *)0x40038084))
Deprecated defines for the ADC register offsets.
#define | ADC_SSFIFO2_R (*((reg32_t *)0x40038088))
Deprecated defines for the ADC register offsets.
#define | ADC_SSFSTAT2_R (*((reg32_t *)0x4003808C))
Deprecated defines for the ADC register offsets.
#define | ADC_SSMUX3_R (*((reg32_t *)0x400380A0))
Deprecated defines for the ADC register offsets.
#define | ADC_SSCTL3_R (*((reg32_t *)0x400380A4))
Deprecated defines for the ADC register offsets.
#define | ADC_SSFIFO3_R (*((reg32_t *)0x400380A8))
Deprecated defines for the ADC register offsets.
#define | ADC_SSFSTAT3_R (*((reg32_t *)0x400380AC))
Deprecated defines for the ADC register offsets.
#define | ADC_TMLB_R (*((reg32_t *)0x40038100))
Deprecated defines for the ADC register offsets.
#define | FLASH_FMC_WRKEY_M 0xFFFF0000
Deprecated defines for the bit fields in the FLASH_FMC register.
#define | FLASH_FMC_WRKEY_S 16
Deprecated defines for the bit fields in the FLASH_FMC register.
#define | SYSCTL_DID1_PKG_28SOIC 0x00000000
Deprecated defines for the bit fields in the SYSCTL_DID1 register.
#define | SYSCTL_DID1_PKG_48QFP 0x00000008
QFP package.
#define | NVIC_MPU_R (*((reg32_t *)0xE000ED9C))
Deprecated defines for the NVIC register addresses.

Detailed Description

LM3S1968 registers definition.

Definition in file lm3s_com.h.

Define Documentation

#define ADC_TMLB_CNT_M 0x000003C0

Deprecated defines for the bit fields in the the interpretation of the data in the SSFIFOx when the ADC TMLB is enabled.

register. Continuous Sample Counter

Definition at line 3288 of file lm3s_com.h.

#define COMP_ACCTL0_ASRCP_REF 0x00000400

Internal voltage reference.

(VIREF)

Definition at line 2004 of file lm3s_com.h.

#define COMP_ACCTL0_TOEN 0x00000800

The following are defines for the bit fields in the COMP_O_ACCTL0 register.

Trigger Output Enable

Definition at line 2000 of file lm3s_com.h.

#define COMP_ACCTL1_ASRCP_REF 0x00000400

Internal voltage reference.

(VIREF)

Definition at line 2036 of file lm3s_com.h.

#define COMP_ACCTL1_TOEN 0x00000800

The following are defines for the bit fields in the COMP_O_ACCTL1 register.

Trigger Output Enable

Definition at line 2032 of file lm3s_com.h.

#define COMP_ACCTL2_ASRCP_REF 0x00000400

Internal voltage reference.

(VIREF)

Definition at line 2068 of file lm3s_com.h.

#define COMP_ACCTL2_TOEN 0x00000800

The following are defines for the bit fields in the COMP_O_ACCTL2 register.

Trigger Output Enable

Definition at line 2064 of file lm3s_com.h.

#define COMP_ACINTEN_IN2 0x00000004

The following are defines for the bit fields in the COMP_O_ACINTEN register.

Comparator 2 Interrupt Enable

Definition at line 1973 of file lm3s_com.h.

#define COMP_ACMIS_IN0 0x00000001

Comparator 0 Masked Interrupt.

Status

Definition at line 1956 of file lm3s_com.h.

#define COMP_ACMIS_IN1 0x00000002

Comparator 1 Masked Interrupt.

Status

Definition at line 1954 of file lm3s_com.h.

#define COMP_ACMIS_IN2 0x00000004

The following are defines for the bit fields in the COMP_O_ACMIS register.

Comparator 2 Masked Interrupt Status

Definition at line 1952 of file lm3s_com.h.

#define COMP_ACREFCTL_EN 0x00000200

The following are defines for the bit fields in the COMP_O_ACREFCTL register.

Resistor Ladder Enable

Definition at line 1983 of file lm3s_com.h.

#define COMP_ACREFCTL_VREF_S 0

The following are defines for the bit fields in the COMP_O_ACREFCTL register.

Resistor Ladder Enable

Definition at line 1986 of file lm3s_com.h.

#define COMP_ACRIS_IN2 0x00000004

The following are defines for the bit fields in the COMP_O_ACRIS register.

Comparator 2 Interrupt Status

Definition at line 1964 of file lm3s_com.h.

#define COMP_ACSTAT0_OVAL 0x00000002

The following are defines for the bit fields in the COMP_O_ACSTAT0 register.

Comparator Output Value

Definition at line 1993 of file lm3s_com.h.

#define COMP_ACSTAT1_OVAL 0x00000002

The following are defines for the bit fields in the COMP_O_ACSTAT1 register.

Comparator Output Value

Definition at line 2025 of file lm3s_com.h.

#define COMP_ACSTAT2_OVAL 0x00000002

The following are defines for the bit fields in the COMP_O_ACSTAT2 register.

Comparator Output Value

Definition at line 2057 of file lm3s_com.h.

#define FLASH_FCIM_PMASK 0x00000002

The following are defines for the bit fields in the FLASH_FCIM register.

Programming Interrupt Mask

Definition at line 2237 of file lm3s_com.h.

#define FLASH_FCMISC_AMISC 0x00000001

Access Masked Interrupt Status.

and Clear

Definition at line 2247 of file lm3s_com.h.

#define FLASH_FCMISC_PMISC 0x00000002

The following are defines for the bit fields in the FLASH_FCMISC register.

Programming Masked Interrupt Status and Clear

Definition at line 2245 of file lm3s_com.h.

#define FLASH_FCRIS_PRIS 0x00000002

The following are defines for the bit fields in the FLASH_FCRIS register.

Programming Raw Interrupt Status

Definition at line 2229 of file lm3s_com.h.

#define FLASH_FMA_OFFSET_M 0x0003FFFF

The following are defines for the bit fields in the FLASH_FMA register.

Address Offset

Definition at line 2202 of file lm3s_com.h.

#define FLASH_FMA_OFFSET_S 0

The following are defines for the bit fields in the FLASH_FMA register.

Address Offset

Definition at line 2203 of file lm3s_com.h.

#define FLASH_FMC_WRKEY 0xA4420000

The following are defines for the bit fields in the FLASH_FMC register.

FLASH write key

Definition at line 2218 of file lm3s_com.h.

#define FLASH_FMC_WRKEY_M 0xFFFF0000

Deprecated defines for the bit fields in the FLASH_FMC register.

Flash Memory Write Key

Definition at line 3334 of file lm3s_com.h.

#define FLASH_FMC_WRKEY_S 16

Deprecated defines for the bit fields in the FLASH_FMC register.

Flash Memory Write Key

Definition at line 3335 of file lm3s_com.h.

#define FLASH_FMD_DATA_M 0xFFFFFFFF

The following are defines for the bit fields in the FLASH_FMD register.

Data Value

Definition at line 2210 of file lm3s_com.h.

#define FLASH_FMD_DATA_S 0

The following are defines for the bit fields in the FLASH_FMD register.

Data Value

Definition at line 2211 of file lm3s_com.h.

#define FLASH_USECRL_M 0x000000FF

The following are defines for the bit fields in the FLASH_USECRL register.

Microsecond Reload Value

Definition at line 2255 of file lm3s_com.h.

#define FLASH_USECRL_S 0

The following are defines for the bit fields in the FLASH_USECRL register.

Microsecond Reload Value

Definition at line 2256 of file lm3s_com.h.

#define FLASH_USERDBG_DATA_S 2

The following are defines for the bit fields in the FLASH_USERDBG register.

User Debug Not Written

Definition at line 2267 of file lm3s_com.h.

#define FLASH_USERDBG_NW 0x80000000

The following are defines for the bit fields in the FLASH_USERDBG register.

User Debug Not Written

Definition at line 2263 of file lm3s_com.h.

#define FLASH_USERREG0_DATA_S 0

The following are defines for the bit fields in the FLASH_USERREG0 register.

Not Written

Definition at line 2276 of file lm3s_com.h.

#define FLASH_USERREG0_NW 0x80000000

The following are defines for the bit fields in the FLASH_USERREG0 register.

Not Written

Definition at line 2274 of file lm3s_com.h.

#define FLASH_USERREG1_DATA_S 0

The following are defines for the bit fields in the FLASH_USERREG1 register.

Not Written

Definition at line 2285 of file lm3s_com.h.

#define FLASH_USERREG1_NW 0x80000000

The following are defines for the bit fields in the FLASH_USERREG1 register.

Not Written

Definition at line 2283 of file lm3s_com.h.

#define GPIO_LOCK_LOCKED 0x00000001

The GPIOCR register is locked.

and may not be modified

Definition at line 885 of file lm3s_com.h.

#define GPIO_LOCK_M 0xFFFFFFFF

The following are defines for the bit fields in the GPIO_O_LOCK register.

GPIO Lock

Definition at line 882 of file lm3s_com.h.

#define GPIO_LOCK_UNLOCKED 0x00000000

The GPIOCR register is unlocked.

and may be modified

Definition at line 883 of file lm3s_com.h.

#define HIB_CTL_VABORT 0x00000080

The following are defines for the bit fields in the HIB_CTL register.

Power Cut Abort Enable

Definition at line 2121 of file lm3s_com.h.

#define HIB_DATA_RTD_M 0xFFFFFFFF

The following are defines for the bit fields in the HIB_DATA register.

Hibernation Module NV Data

Definition at line 2194 of file lm3s_com.h.

#define HIB_DATA_RTD_S 0

The following are defines for the bit fields in the HIB_DATA register.

Hibernation Module NV Data

Definition at line 2195 of file lm3s_com.h.

#define HIB_IC_EXTW 0x00000008

The following are defines for the bit fields in the HIB_IC register.

External Wake-Up Masked Interrupt Clear

Definition at line 2172 of file lm3s_com.h.

#define HIB_IC_LOWBAT 0x00000004

Low Battery Voltage Masked.

Interrupt Clear

Definition at line 2174 of file lm3s_com.h.

#define HIB_IC_RTCALT0 0x00000001

RTC Alert0 Masked Interrupt.

Clear

Definition at line 2178 of file lm3s_com.h.

#define HIB_IC_RTCALT1 0x00000002

RTC Alert1 Masked Interrupt.

Clear

Definition at line 2176 of file lm3s_com.h.

#define HIB_IM_EXTW 0x00000008

The following are defines for the bit fields in the HIB_IM register.

External Wake-Up Interrupt Mask

Definition at line 2135 of file lm3s_com.h.

#define HIB_IM_LOWBAT 0x00000004

Low Battery Voltage Interrupt.

Mask

Definition at line 2136 of file lm3s_com.h.

#define HIB_MIS_EXTW 0x00000008

The following are defines for the bit fields in the HIB_MIS register.

External Wake-Up Masked Interrupt Status

Definition at line 2158 of file lm3s_com.h.

#define HIB_MIS_LOWBAT 0x00000004

Low Battery Voltage Masked.

Interrupt Status

Definition at line 2160 of file lm3s_com.h.

#define HIB_MIS_RTCALT0 0x00000001

RTC Alert 0 Masked Interrupt.

Status

Definition at line 2164 of file lm3s_com.h.

#define HIB_MIS_RTCALT1 0x00000002

RTC Alert 1 Masked Interrupt.

Status

Definition at line 2162 of file lm3s_com.h.

#define HIB_RIS_EXTW 0x00000008

The following are defines for the bit fields in the HIB_RIS register.

External Wake-Up Raw Interrupt Status

Definition at line 2146 of file lm3s_com.h.

#define HIB_RIS_LOWBAT 0x00000004

Low Battery Voltage Raw.

Interrupt Status

Definition at line 2148 of file lm3s_com.h.

#define HIB_RTCC_M 0xFFFFFFFF

The following are defines for the bit fields in the HIB_RTCC register.

RTC Counter

Definition at line 2089 of file lm3s_com.h.

#define HIB_RTCC_S 0

The following are defines for the bit fields in the HIB_RTCC register.

RTC Counter

Definition at line 2090 of file lm3s_com.h.

#define HIB_RTCLD_M 0xFFFFFFFF

The following are defines for the bit fields in the HIB_RTCLD register.

RTC Load

Definition at line 2113 of file lm3s_com.h.

#define HIB_RTCLD_S 0

The following are defines for the bit fields in the HIB_RTCLD register.

RTC Load

Definition at line 2114 of file lm3s_com.h.

#define HIB_RTCM0_M 0xFFFFFFFF

The following are defines for the bit fields in the HIB_RTCM0 register.

RTC Match 0

Definition at line 2097 of file lm3s_com.h.

#define HIB_RTCM0_S 0

The following are defines for the bit fields in the HIB_RTCM0 register.

RTC Match 0

Definition at line 2098 of file lm3s_com.h.

#define HIB_RTCM1_M 0xFFFFFFFF

The following are defines for the bit fields in the HIB_RTCM1 register.

RTC Match 1

Definition at line 2105 of file lm3s_com.h.

#define HIB_RTCM1_S 0

The following are defines for the bit fields in the HIB_RTCM1 register.

RTC Match 1

Definition at line 2106 of file lm3s_com.h.

#define HIB_RTCT_TRIM_M 0x0000FFFF

The following are defines for the bit fields in the HIB_RTCT register.

RTC Trim Value

Definition at line 2186 of file lm3s_com.h.

#define HIB_RTCT_TRIM_S 0

The following are defines for the bit fields in the HIB_RTCT register.

RTC Trim Value

Definition at line 2187 of file lm3s_com.h.

#define I2C_MCR_SFE 0x00000020

The following are defines for the bit fields in the I2C_O_MCR register.

I2C Slave Function Enable

Definition at line 1318 of file lm3s_com.h.

#define I2C_MCS_BUSBSY 0x00000040

The following are defines for the bit fields in the I2C_O_MCS register.

Bus Busy

Definition at line 1221 of file lm3s_com.h.

#define I2C_MDR_DATA_M 0x000000FF

The following are defines for the bit fields in the I2C_O_MDR register.

Data Transferred

Definition at line 1246 of file lm3s_com.h.

#define I2C_MDR_DATA_S 0

The following are defines for the bit fields in the I2C_O_MDR register.

Data Transferred

Definition at line 1247 of file lm3s_com.h.

#define I2C_MICR_IC 0x00000001

The following are defines for the bit fields in the I2C_O_MICR register.

Interrupt Clear

Definition at line 1311 of file lm3s_com.h.

#define I2C_MIMR_IM 0x00000001

The following are defines for the bit fields in the I2C_O_MIMR register.

Interrupt Mask

Definition at line 1276 of file lm3s_com.h.

#define I2C_MMIS_MIS 0x00000001

The following are defines for the bit fields in the I2C_O_MMIS register.

Masked Interrupt Status

Definition at line 1304 of file lm3s_com.h.

#define I2C_MRIS_RIS 0x00000001

The following are defines for the bit fields in the I2C_O_MRIS register.

Raw Interrupt Status

Definition at line 1283 of file lm3s_com.h.

#define I2C_MSA_SA_M 0x000000FE

The following are defines for the bit fields in the I2C_O_MSA register.

I2C Slave Address

Definition at line 1194 of file lm3s_com.h.

#define I2C_MSA_SA_S 1

The following are defines for the bit fields in the I2C_O_MSA register.

I2C Slave Address

Definition at line 1196 of file lm3s_com.h.

#define I2C_MTPR_TPR_M 0x000000FF

The following are defines for the bit fields in the I2C_O_MTPR register.

SCL Clock Period

Definition at line 1254 of file lm3s_com.h.

#define I2C_MTPR_TPR_S 0

The following are defines for the bit fields in the I2C_O_MTPR register.

SCL Clock Period

Definition at line 1255 of file lm3s_com.h.

#define I2C_SCSR_FBR 0x00000004

The following are defines for the bit fields in the I2C_O_SCSR register.

First Byte Received

Definition at line 1211 of file lm3s_com.h.

#define I2C_SDR_DATA_M 0x000000FF

The following are defines for the bit fields in the I2C_O_SDR register.

Data for Transfer

Definition at line 1238 of file lm3s_com.h.

#define I2C_SDR_DATA_S 0

The following are defines for the bit fields in the I2C_O_SDR register.

Data for Transfer

Definition at line 1239 of file lm3s_com.h.

#define I2C_SICR_DATAIC 0x00000001

The following are defines for the bit fields in the I2C_O_SICR register.

Data Interrupt Clear

Definition at line 1297 of file lm3s_com.h.

#define I2C_SICR_IC 0x00000001

Deprecated defines for the bit fields in the I2C_O_SICR register.

Clear Interrupt

Definition at line 3259 of file lm3s_com.h.

#define I2C_SIMR_DATAIM 0x00000001

The following are defines for the bit fields in the I2C_O_SIMR register.

Data Interrupt Mask

Definition at line 1262 of file lm3s_com.h.

#define I2C_SIMR_IM 0x00000001

Deprecated defines for the bit fields in the I2C_O_SIMR register.

Interrupt Mask

Definition at line 3280 of file lm3s_com.h.

#define I2C_SMIS_DATAMIS 0x00000001

The following are defines for the bit fields in the I2C_O_SMIS register.

Data Masked Interrupt Status

Definition at line 1290 of file lm3s_com.h.

#define I2C_SMIS_MIS 0x00000001

Deprecated defines for the bit fields in the I2C_O_SMIS register.

Masked Interrupt Status

Definition at line 3266 of file lm3s_com.h.

#define I2C_SOAR_OAR_M 0x0000007F

The following are defines for the bit fields in the I2C_O_SOAR register.

I2C Slave Own Address

Definition at line 1203 of file lm3s_com.h.

#define I2C_SOAR_OAR_S 0

The following are defines for the bit fields in the I2C_O_SOAR register.

I2C Slave Own Address

Definition at line 1204 of file lm3s_com.h.

#define I2C_SRIS_DATARIS 0x00000001

The following are defines for the bit fields in the I2C_O_SRIS register.

Data Raw Interrupt Status

Definition at line 1269 of file lm3s_com.h.

#define I2C_SRIS_RIS 0x00000001

Deprecated defines for the bit fields in the I2C_O_SRIS register.

Raw Interrupt Status

Definition at line 3273 of file lm3s_com.h.

#define NVIC_ACTIVE0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_ACTIVE0 register.

Interrupt 31 active

Definition at line 2635 of file lm3s_com.h.

#define NVIC_ACTIVE1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_ACTIVE1 register.

Interrupt 59 active

Definition at line 2673 of file lm3s_com.h.

#define NVIC_APINT_VECTKEY_M 0xFFFF0000

The following are defines for the bit fields in the NVIC_APINT register.

Vector key mask

Definition at line 2898 of file lm3s_com.h.

#define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100

The following are defines for the bit fields in the NVIC_CFG_CTRL register.

Ignore bus fault in NMI/fault

Definition at line 2928 of file lm3s_com.h.

#define NVIC_CPUID_IMP_M 0xFF000000

The following are defines for the bit fields in the NVIC_CPUID register.

Implementer

Definition at line 2861 of file lm3s_com.h.

#define NVIC_DBG_CTRL_DBGKEY_M 0xFFFF0000

The following are defines for the bit fields in the NVIC_DBG_CTRL register.

Debug key mask

Definition at line 3155 of file lm3s_com.h.

#define NVIC_DBG_CTRL_S_RETIRE_ST 0x01000000

Core has executed insruction.

since last read

Definition at line 3159 of file lm3s_com.h.

#define NVIC_DBG_DATA_M 0xFFFFFFFF

The following are defines for the bit fields in the NVIC_DBG_DATA register.

Data temporary cache

Definition at line 3207 of file lm3s_com.h.

#define NVIC_DBG_DATA_S 0

The following are defines for the bit fields in the NVIC_DBG_DATA register.

Data temporary cache

Definition at line 3208 of file lm3s_com.h.

#define NVIC_DBG_INT_HARDERR 0x00000400

The following are defines for the bit fields in the NVIC_DBG_INT register.

Debug trap on hard fault

Definition at line 3215 of file lm3s_com.h.

#define NVIC_DBG_XFER_REG_WNR 0x00010000

The following are defines for the bit fields in the NVIC_DBG_XFER register.

Write or not read

Definition at line 3178 of file lm3s_com.h.

#define NVIC_DEBUG_STAT_EXTRNL 0x00000010

The following are defines for the bit fields in the NVIC_DEBUG_STAT register.

EDBGRQ asserted

Definition at line 3029 of file lm3s_com.h.

#define NVIC_DIS0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_DIS0 register.

Interrupt 31 disable

Definition at line 2419 of file lm3s_com.h.

#define NVIC_DIS1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_DIS1 register.

Interrupt 59 disable

Definition at line 2457 of file lm3s_com.h.

#define NVIC_EN0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_EN0 register.

Interrupt 31 enable

Definition at line 2347 of file lm3s_com.h.

#define NVIC_EN1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_EN1 register.

Interrupt 59 enable

Definition at line 2385 of file lm3s_com.h.

#define NVIC_FAULT_ADDR_M 0xFFFFFFFF

The following are defines for the bit fields in the NVIC_FAULT_ADDR register.

Data bus fault address

Definition at line 3049 of file lm3s_com.h.

#define NVIC_FAULT_ADDR_S 0

The following are defines for the bit fields in the NVIC_FAULT_ADDR register.

Data bus fault address

Definition at line 3050 of file lm3s_com.h.

#define NVIC_FAULT_STAT_DIV0 0x02000000

The following are defines for the bit fields in the NVIC_FAULT_STAT register.

Divide by zero fault

Definition at line 2995 of file lm3s_com.h.

#define NVIC_HFAULT_STAT_DBG 0x80000000

The following are defines for the bit fields in the NVIC_HFAULT_STAT register.

Debug event

Definition at line 3019 of file lm3s_com.h.

#define NVIC_INT_CTRL_NMI_SET 0x80000000

The following are defines for the bit fields in the NVIC_INT_CTRL register.

Pend a NMI

Definition at line 2871 of file lm3s_com.h.

#define NVIC_INT_CTRL_VEC_ACT_S 0

The following are defines for the bit fields in the NVIC_INT_CTRL register.

Pend a NMI

Definition at line 2882 of file lm3s_com.h.

#define NVIC_INT_CTRL_VEC_PEN_S 12

The following are defines for the bit fields in the NVIC_INT_CTRL register.

Pend a NMI

Definition at line 2881 of file lm3s_com.h.

#define NVIC_INT_TYPE_LINES_M 0x0000001F

The following are defines for the bit fields in the NVIC_INT_TYPE register.

Number of interrupt lines (x32)

Definition at line 2302 of file lm3s_com.h.

#define NVIC_INT_TYPE_LINES_S 0

The following are defines for the bit fields in the NVIC_INT_TYPE register.

Number of interrupt lines (x32)

Definition at line 2303 of file lm3s_com.h.

#define NVIC_MM_ADDR_M 0xFFFFFFFF

The following are defines for the bit fields in the NVIC_MM_ADDR register.

Data fault address

Definition at line 3040 of file lm3s_com.h.

#define NVIC_MM_ADDR_S 0

The following are defines for the bit fields in the NVIC_MM_ADDR register.

Data fault address

Definition at line 3041 of file lm3s_com.h.

#define NVIC_MPU_ATTR_M 0xFFFF0000

The following are defines for the bit fields in the NVIC_MPU_ATTR register.

Attributes

Definition at line 3097 of file lm3s_com.h.

#define NVIC_MPU_BASE_ADDR_M 0xFFFFFFE0

The following are defines for the bit fields in the NVIC_MPU_BASE register.

Base address mask

Definition at line 3086 of file lm3s_com.h.

#define NVIC_MPU_BASE_ADDR_S 8

The following are defines for the bit fields in the NVIC_MPU_BASE register.

Base address mask

Definition at line 3089 of file lm3s_com.h.

#define NVIC_MPU_BASE_REGION_S 0

The following are defines for the bit fields in the NVIC_MPU_BASE register.

Base address mask

Definition at line 3090 of file lm3s_com.h.

#define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004

The following are defines for the bit fields in the NVIC_MPU_CTRL register.

MPU default region in priv mode

Definition at line 3068 of file lm3s_com.h.

#define NVIC_MPU_NUMBER_M 0x000000FF

The following are defines for the bit fields in the NVIC_MPU_NUMBER register.

MPU region to access

Definition at line 3078 of file lm3s_com.h.

#define NVIC_MPU_NUMBER_S 0

The following are defines for the bit fields in the NVIC_MPU_NUMBER register.

MPU region to access

Definition at line 3079 of file lm3s_com.h.

#define NVIC_MPU_TYPE_DREGION_S 8

The following are defines for the bit fields in the NVIC_MPU_TYPE register.

Number of I regions

Definition at line 3061 of file lm3s_com.h.

#define NVIC_MPU_TYPE_IREGION_M 0x00FF0000

The following are defines for the bit fields in the NVIC_MPU_TYPE register.

Number of I regions

Definition at line 3057 of file lm3s_com.h.

#define NVIC_MPU_TYPE_IREGION_S 16

The following are defines for the bit fields in the NVIC_MPU_TYPE register.

Number of I regions

Definition at line 3060 of file lm3s_com.h.

#define NVIC_PEND0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_PEND0 register.

Interrupt 31 pend

Definition at line 2491 of file lm3s_com.h.

#define NVIC_PEND1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_PEND1 register.

Interrupt 59 pend

Definition at line 2529 of file lm3s_com.h.

#define NVIC_PRI0_INT0_S 0

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 2714 of file lm3s_com.h.

#define NVIC_PRI0_INT1_S 8

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 2713 of file lm3s_com.h.

#define NVIC_PRI0_INT2_S 16

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 2712 of file lm3s_com.h.

#define NVIC_PRI0_INT3_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 2707 of file lm3s_com.h.

#define NVIC_PRI0_INT3_S 24

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 2711 of file lm3s_com.h.

#define NVIC_PRI10_INT40_S 0

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 2854 of file lm3s_com.h.

#define NVIC_PRI10_INT41_S 8

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 2853 of file lm3s_com.h.

#define NVIC_PRI10_INT42_S 16

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 2852 of file lm3s_com.h.

#define NVIC_PRI10_INT43_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 2847 of file lm3s_com.h.

#define NVIC_PRI10_INT43_S 24

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 2851 of file lm3s_com.h.

#define NVIC_PRI1_INT4_S 0

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 2728 of file lm3s_com.h.

#define NVIC_PRI1_INT5_S 8

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 2727 of file lm3s_com.h.

#define NVIC_PRI1_INT6_S 16

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 2726 of file lm3s_com.h.

#define NVIC_PRI1_INT7_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 2721 of file lm3s_com.h.

#define NVIC_PRI1_INT7_S 24

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 2725 of file lm3s_com.h.

#define NVIC_PRI2_INT10_S 16

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 2740 of file lm3s_com.h.

#define NVIC_PRI2_INT11_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 2735 of file lm3s_com.h.

#define NVIC_PRI2_INT11_S 24

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 2739 of file lm3s_com.h.

#define NVIC_PRI2_INT8_S 0

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 2742 of file lm3s_com.h.

#define NVIC_PRI2_INT9_S 8

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 2741 of file lm3s_com.h.

#define NVIC_PRI3_INT12_S 0

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 2756 of file lm3s_com.h.

#define NVIC_PRI3_INT13_S 8

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 2755 of file lm3s_com.h.

#define NVIC_PRI3_INT14_S 16

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 2754 of file lm3s_com.h.

#define NVIC_PRI3_INT15_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 2749 of file lm3s_com.h.

#define NVIC_PRI3_INT15_S 24

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 2753 of file lm3s_com.h.

#define NVIC_PRI4_INT16_S 0

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 2770 of file lm3s_com.h.

#define NVIC_PRI4_INT17_S 8

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 2769 of file lm3s_com.h.

#define NVIC_PRI4_INT18_S 16

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 2768 of file lm3s_com.h.

#define NVIC_PRI4_INT19_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 2763 of file lm3s_com.h.

#define NVIC_PRI4_INT19_S 24

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 2767 of file lm3s_com.h.

#define NVIC_PRI5_INT20_S 0

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 2784 of file lm3s_com.h.

#define NVIC_PRI5_INT21_S 8

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 2783 of file lm3s_com.h.

#define NVIC_PRI5_INT22_S 16

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 2782 of file lm3s_com.h.

#define NVIC_PRI5_INT23_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 2777 of file lm3s_com.h.

#define NVIC_PRI5_INT23_S 24

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 2781 of file lm3s_com.h.

#define NVIC_PRI6_INT24_S 0

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 2798 of file lm3s_com.h.

#define NVIC_PRI6_INT25_S 8

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 2797 of file lm3s_com.h.

#define NVIC_PRI6_INT26_S 16

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 2796 of file lm3s_com.h.

#define NVIC_PRI6_INT27_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 2791 of file lm3s_com.h.

#define NVIC_PRI6_INT27_S 24

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 2795 of file lm3s_com.h.

#define NVIC_PRI7_INT28_S 0

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 2812 of file lm3s_com.h.

#define NVIC_PRI7_INT29_S 8

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 2811 of file lm3s_com.h.

#define NVIC_PRI7_INT30_S 16

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 2810 of file lm3s_com.h.

#define NVIC_PRI7_INT31_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 2805 of file lm3s_com.h.

#define NVIC_PRI7_INT31_S 24

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 2809 of file lm3s_com.h.

#define NVIC_PRI8_INT32_S 0

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 2826 of file lm3s_com.h.

#define NVIC_PRI8_INT33_S 8

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 2825 of file lm3s_com.h.

#define NVIC_PRI8_INT34_S 16

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 2824 of file lm3s_com.h.

#define NVIC_PRI8_INT35_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 2819 of file lm3s_com.h.

#define NVIC_PRI8_INT35_S 24

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 2823 of file lm3s_com.h.

#define NVIC_PRI9_INT36_S 0

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 2840 of file lm3s_com.h.

#define NVIC_PRI9_INT37_S 8

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 2839 of file lm3s_com.h.

#define NVIC_PRI9_INT38_S 16

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 2838 of file lm3s_com.h.

#define NVIC_PRI9_INT39_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 2833 of file lm3s_com.h.

#define NVIC_PRI9_INT39_S 24

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 2837 of file lm3s_com.h.

#define NVIC_ST_CAL_NOREF 0x80000000

The following are defines for the bit fields in the NVIC_ST_CAL register.

No reference clock

Definition at line 2337 of file lm3s_com.h.

#define NVIC_ST_CAL_ONEMS_S 0

The following are defines for the bit fields in the NVIC_ST_CAL register.

No reference clock

Definition at line 2340 of file lm3s_com.h.

#define NVIC_ST_CTRL_COUNT 0x00010000

The following are defines for the bit fields in the NVIC_ST_CTRL register.

Count flag

Definition at line 2310 of file lm3s_com.h.

#define NVIC_ST_CURRENT_M 0x00FFFFFF

The following are defines for the bit fields in the NVIC_ST_CURRENT register.

Counter current value

Definition at line 2329 of file lm3s_com.h.

#define NVIC_ST_CURRENT_S 0

The following are defines for the bit fields in the NVIC_ST_CURRENT register.

Counter current value

Definition at line 2330 of file lm3s_com.h.

#define NVIC_ST_RELOAD_M 0x00FFFFFF

The following are defines for the bit fields in the NVIC_ST_RELOAD register.

Counter load value

Definition at line 2320 of file lm3s_com.h.

#define NVIC_ST_RELOAD_S 0

The following are defines for the bit fields in the NVIC_ST_RELOAD register.

Counter load value

Definition at line 2321 of file lm3s_com.h.

#define NVIC_SW_TRIG_INTID_M 0x000003FF

The following are defines for the bit fields in the NVIC_SW_TRIG register.

Interrupt to trigger

Definition at line 3232 of file lm3s_com.h.

#define NVIC_SW_TRIG_INTID_S 0

The following are defines for the bit fields in the NVIC_SW_TRIG register.

Interrupt to trigger

Definition at line 3233 of file lm3s_com.h.

#define NVIC_SYS_CTRL_SEVONPEND 0x00000010

The following are defines for the bit fields in the NVIC_SYS_CTRL register.

Wakeup on pend

Definition at line 2919 of file lm3s_com.h.

#define NVIC_SYS_HND_CTRL_USAGE 0x00040000

The following are defines for the bit fields in the NVIC_SYS_HND_CTRL register.

Usage fault enable

Definition at line 2976 of file lm3s_com.h.

#define NVIC_SYS_PRI1_BUS_S 8

The following are defines for the bit fields in the NVIC_SYS_PRI1 register.

Priority of reserved handler

Definition at line 2945 of file lm3s_com.h.

#define NVIC_SYS_PRI1_MEM_S 0

The following are defines for the bit fields in the NVIC_SYS_PRI1 register.

Priority of reserved handler

Definition at line 2946 of file lm3s_com.h.

#define NVIC_SYS_PRI1_RES_M 0xFF000000

The following are defines for the bit fields in the NVIC_SYS_PRI1 register.

Priority of reserved handler

Definition at line 2940 of file lm3s_com.h.

#define NVIC_SYS_PRI1_USAGE_S 16

The following are defines for the bit fields in the NVIC_SYS_PRI1 register.

Priority of reserved handler

Definition at line 2944 of file lm3s_com.h.

#define NVIC_SYS_PRI2_SVC_M 0xFF000000

The following are defines for the bit fields in the NVIC_SYS_PRI2 register.

Priority of SVCall handler

Definition at line 2953 of file lm3s_com.h.

#define NVIC_SYS_PRI2_SVC_S 24

The following are defines for the bit fields in the NVIC_SYS_PRI2 register.

Priority of SVCall handler

Definition at line 2955 of file lm3s_com.h.

#define NVIC_SYS_PRI3_DEBUG_S 0

The following are defines for the bit fields in the NVIC_SYS_PRI3 register.

Priority of Sys Tick handler

Definition at line 2968 of file lm3s_com.h.

#define NVIC_SYS_PRI3_PENDSV_S 16

The following are defines for the bit fields in the NVIC_SYS_PRI3 register.

Priority of Sys Tick handler

Definition at line 2967 of file lm3s_com.h.

#define NVIC_SYS_PRI3_TICK_M 0xFF000000

The following are defines for the bit fields in the NVIC_SYS_PRI3 register.

Priority of Sys Tick handler

Definition at line 2962 of file lm3s_com.h.

#define NVIC_SYS_PRI3_TICK_S 24

The following are defines for the bit fields in the NVIC_SYS_PRI3 register.

Priority of Sys Tick handler

Definition at line 2966 of file lm3s_com.h.

#define NVIC_UNPEND0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_UNPEND0 register.

Interrupt 31 unpend

Definition at line 2563 of file lm3s_com.h.

#define NVIC_UNPEND1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_UNPEND1 register.

Interrupt 59 unpend

Definition at line 2601 of file lm3s_com.h.

#define NVIC_VTABLE_BASE 0x20000000

The following are defines for the bit fields in the NVIC_VTABLE register.

Vector table base

Definition at line 2889 of file lm3s_com.h.

#define NVIC_VTABLE_OFFSET_S 8

The following are defines for the bit fields in the NVIC_VTABLE register.

Vector table base

Definition at line 2891 of file lm3s_com.h.

#define PWM_CTL_GLOBALSYNC2 0x00000004

The following are defines for the bit fields in the PWM_O_CTL register.

Update PWM Generator 2

Definition at line 1327 of file lm3s_com.h.

#define PWM_ENABLE_PWM5EN 0x00000020

The following are defines for the bit fields in the PWM_O_ENABLE register.

PWM5 Output Enable

Definition at line 1345 of file lm3s_com.h.

#define PWM_FAULT_FAULT5 0x00000020

The following are defines for the bit fields in the PWM_O_FAULT register.

PWM5 Fault

Definition at line 1369 of file lm3s_com.h.

#define PWM_INTEN_INTFAULT 0x00010000

The following are defines for the bit fields in the PWM_O_INTEN register.

Fault Interrupt Enable

Definition at line 1381 of file lm3s_com.h.

#define PWM_INVERT_PWM5INV 0x00000020

The following are defines for the bit fields in the PWM_O_INVERT register.

Invert PWM5 Signal

Definition at line 1357 of file lm3s_com.h.

#define PWM_ISC_INTFAULT 0x00010000

The following are defines for the bit fields in the PWM_O_ISC register.

Fault Interrupt Asserted

Definition at line 1401 of file lm3s_com.h.

#define PWM_RIS_INTFAULT 0x00010000

The following are defines for the bit fields in the PWM_O_RIS register.

Fault Interrupt Asserted

Definition at line 1391 of file lm3s_com.h.

#define PWM_STATUS_FAULT 0x00000001

The following are defines for the bit fields in the PWM_O_STATUS register.

Fault Interrupt Status

Definition at line 1411 of file lm3s_com.h.

#define PWM_SYNC_SYNC2 0x00000004

The following are defines for the bit fields in the PWM_O_SYNC register.

Reset Generator 2 Counter

Definition at line 1336 of file lm3s_com.h.

#define PWM_X_CMPA_M 0x0000FFFF

The following are defines for the bit fields in the PWM_O_X_CMPA register.

Comparator A Value

Definition at line 1496 of file lm3s_com.h.

#define PWM_X_CMPA_S 0

The following are defines for the bit fields in the PWM_O_X_CMPA register.

Comparator A Value

Definition at line 1497 of file lm3s_com.h.

#define PWM_X_CMPB_M 0x0000FFFF

The following are defines for the bit fields in the PWM_O_X_CMPB register.

Comparator B Value

Definition at line 1504 of file lm3s_com.h.

#define PWM_X_CMPB_S 0

The following are defines for the bit fields in the PWM_O_X_CMPB register.

Comparator B Value

Definition at line 1505 of file lm3s_com.h.

#define PWM_X_COUNT_M 0x0000FFFF

The following are defines for the bit fields in the PWM_O_X_COUNT register.

Counter Value

Definition at line 1488 of file lm3s_com.h.

#define PWM_X_COUNT_S 0

The following are defines for the bit fields in the PWM_O_X_COUNT register.

Counter Value

Definition at line 1489 of file lm3s_com.h.

#define PWM_X_CTL_CMPBUPD 0x00000020

The following are defines for the bit fields in the PWM_O_X_CTL register.

Comparator B Update Mode

Definition at line 1418 of file lm3s_com.h.

#define PWM_X_DBCTL_ENABLE 0x00000001

The following are defines for the bit fields in the PWM_O_X_DBCTL register.

Dead-Band Generator Enable

Definition at line 1584 of file lm3s_com.h.

#define PWM_X_DBFALL_DELAY_M 0x00000FFF

The following are defines for the bit fields in the PWM_O_X_DBFALL register.

Dead-Band Fall Delay

Definition at line 1599 of file lm3s_com.h.

#define PWM_X_DBFALL_DELAY_S 0

The following are defines for the bit fields in the PWM_O_X_DBFALL register.

Dead-Band Fall Delay

Definition at line 1600 of file lm3s_com.h.

#define PWM_X_DBRISE_DELAY_M 0x00000FFF

The following are defines for the bit fields in the PWM_O_X_DBRISE register.

Dead-Band Rise Delay

Definition at line 1591 of file lm3s_com.h.

#define PWM_X_DBRISE_DELAY_S 0

The following are defines for the bit fields in the PWM_O_X_DBRISE register.

Dead-Band Rise Delay

Definition at line 1592 of file lm3s_com.h.

#define PWM_X_GENA_ACTCMPBD_M 0x00000C00

The following are defines for the bit fields in the PWM_O_X_GENA register.

Action for Comparator B Down

Definition at line 1512 of file lm3s_com.h.

#define PWM_X_GENB_ACTCMPBD_M 0x00000C00

The following are defines for the bit fields in the PWM_O_X_GENB register.

Action for Comparator B Down

Definition at line 1548 of file lm3s_com.h.

#define PWM_X_INTEN_INTCMPAD 0x00000008

Interrupt for Counter=PWMnCMPA.

Down

Definition at line 1442 of file lm3s_com.h.

#define PWM_X_INTEN_INTCMPAU 0x00000004

Interrupt for Counter=PWMnCMPA.

Up

Definition at line 1444 of file lm3s_com.h.

#define PWM_X_INTEN_INTCMPBD 0x00000020

Interrupt for Counter=PWMnCMPB.

Down

Definition at line 1438 of file lm3s_com.h.

#define PWM_X_INTEN_INTCMPBU 0x00000010

Interrupt for Counter=PWMnCMPB.

Up

Definition at line 1440 of file lm3s_com.h.

#define PWM_X_INTEN_TRCMPAD 0x00000800

Trigger for Counter=PWMnCMPA.

Down

Definition at line 1433 of file lm3s_com.h.

#define PWM_X_INTEN_TRCMPBD 0x00002000

The following are defines for the bit fields in the PWM_O_X_INTEN register.

Trigger for Counter=PWMnCMPB Down

Definition at line 1430 of file lm3s_com.h.

#define PWM_X_ISC_INTCMPBD 0x00000020

The following are defines for the bit fields in the PWM_O_X_ISC register.

Comparator B Down Interrupt

Definition at line 1468 of file lm3s_com.h.

#define PWM_X_LOAD_M 0x0000FFFF

The following are defines for the bit fields in the PWM_O_X_LOAD register.

Counter Load Value

Definition at line 1480 of file lm3s_com.h.

#define PWM_X_LOAD_S 0

The following are defines for the bit fields in the PWM_O_X_LOAD register.

Counter Load Value

Definition at line 1481 of file lm3s_com.h.

#define PWM_X_RIS_INTCMPAD 0x00000008

Comparator A Down Interrupt.

Status

Definition at line 1457 of file lm3s_com.h.

#define PWM_X_RIS_INTCMPBD 0x00000020

The following are defines for the bit fields in the PWM_O_X_RIS register.

Comparator B Down Interrupt Status

Definition at line 1454 of file lm3s_com.h.

#define QEI_COUNT_M 0xFFFFFFFF

The following are defines for the bit fields in the QEI_O_COUNT register.

Velocity Pulse Count

Definition at line 1672 of file lm3s_com.h.

#define QEI_COUNT_S 0

The following are defines for the bit fields in the QEI_O_COUNT register.

Velocity Pulse Count

Definition at line 1673 of file lm3s_com.h.

#define QEI_CTL_STALLEN 0x00001000

The following are defines for the bit fields in the QEI_O_CTL register.

Stall QEI

Definition at line 1607 of file lm3s_com.h.

#define QEI_INTEN_DIR 0x00000004

Direction Change Interrupt.

Enable

Definition at line 1689 of file lm3s_com.h.

#define QEI_INTEN_ERROR 0x00000008

The following are defines for the bit fields in the QEI_O_INTEN register.

Phase Error Interrupt Enable

Definition at line 1688 of file lm3s_com.h.

#define QEI_INTEN_INDEX 0x00000001

Index Pulse Detected Interrupt.

Enable

Definition at line 1692 of file lm3s_com.h.

#define QEI_ISC_ERROR 0x00000008

The following are defines for the bit fields in the QEI_O_ISC register.

Phase Error Interrupt

Definition at line 1710 of file lm3s_com.h.

#define QEI_LOAD_M 0xFFFFFFFF

The following are defines for the bit fields in the QEI_O_LOAD register.

Velocity Timer Load Value

Definition at line 1656 of file lm3s_com.h.

#define QEI_LOAD_S 0

The following are defines for the bit fields in the QEI_O_LOAD register.

Velocity Timer Load Value

Definition at line 1657 of file lm3s_com.h.

#define QEI_MAXPOS_M 0xFFFFFFFF

The following are defines for the bit fields in the QEI_O_MAXPOS register.

Maximum Position Integrator Value

Definition at line 1648 of file lm3s_com.h.

#define QEI_MAXPOS_S 0

The following are defines for the bit fields in the QEI_O_MAXPOS register.

Maximum Position Integrator Value

Definition at line 1649 of file lm3s_com.h.

#define QEI_POS_M 0xFFFFFFFF

The following are defines for the bit fields in the QEI_O_POS register.

Current Position Integrator Value

Definition at line 1640 of file lm3s_com.h.

#define QEI_POS_S 0

The following are defines for the bit fields in the QEI_O_POS register.

Current Position Integrator Value

Definition at line 1641 of file lm3s_com.h.

#define QEI_RIS_ERROR 0x00000008

The following are defines for the bit fields in the QEI_O_RIS register.

Phase Error Detected

Definition at line 1700 of file lm3s_com.h.

#define QEI_SPEED_M 0xFFFFFFFF

The following are defines for the bit fields in the QEI_O_SPEED register.

Velocity

Definition at line 1680 of file lm3s_com.h.

#define QEI_SPEED_S 0

The following are defines for the bit fields in the QEI_O_SPEED register.

Velocity

Definition at line 1681 of file lm3s_com.h.

#define QEI_STAT_DIRECTION 0x00000002

The following are defines for the bit fields in the QEI_O_STAT register.

Direction of Rotation

Definition at line 1632 of file lm3s_com.h.

#define QEI_TIME_M 0xFFFFFFFF

The following are defines for the bit fields in the QEI_O_TIME register.

Velocity Timer Current Value

Definition at line 1664 of file lm3s_com.h.

#define QEI_TIME_S 0

The following are defines for the bit fields in the QEI_O_TIME register.

Velocity Timer Current Value

Definition at line 1665 of file lm3s_com.h.

#define SSI_CPSR_CPSDVSR_M 0x000000FF

The following are defines for the bit fields in the SSI_O_CPSR register.

SSI Clock Prescale Divisor

Definition at line 953 of file lm3s_com.h.

#define SSI_CPSR_CPSDVSR_S 0

The following are defines for the bit fields in the SSI_O_CPSR register.

SSI Clock Prescale Divisor

Definition at line 954 of file lm3s_com.h.

#define SSI_CR0_FRF_TI 0x00000010

Texas Instruments Synchronous.

Serial Frame Format

Definition at line 899 of file lm3s_com.h.

#define SSI_CR0_SCR_M 0x0000FF00

The following are defines for the bit fields in the SSI_O_CR0 register.

SSI Serial Clock Rate

Definition at line 894 of file lm3s_com.h.

#define SSI_CR0_SCR_S 8

The following are defines for the bit fields in the SSI_O_CR0 register.

SSI Serial Clock Rate

Definition at line 916 of file lm3s_com.h.

#define SSI_CR1_SOD 0x00000008

The following are defines for the bit fields in the SSI_O_CR1 register.

SSI Slave Mode Output Disable

Definition at line 923 of file lm3s_com.h.

#define SSI_CR1_SSE 0x00000002

SSI Synchronous Serial Port.

Enable

Definition at line 925 of file lm3s_com.h.

#define SSI_DR_DATA_M 0x0000FFFF

The following are defines for the bit fields in the SSI_O_DR register.

SSI Receive/Transmit Data

Definition at line 934 of file lm3s_com.h.

#define SSI_DR_DATA_S 0

The following are defines for the bit fields in the SSI_O_DR register.

SSI Receive/Transmit Data

Definition at line 935 of file lm3s_com.h.

#define SSI_ICR_RORIC 0x00000001

SSI Receive Overrun Interrupt.

Clear

Definition at line 1003 of file lm3s_com.h.

#define SSI_ICR_RTIC 0x00000002

The following are defines for the bit fields in the SSI_O_ICR register.

SSI Receive Time-Out Interrupt Clear

Definition at line 1001 of file lm3s_com.h.

#define SSI_IM_RORIM 0x00000001

SSI Receive Overrun Interrupt.

Mask

Definition at line 965 of file lm3s_com.h.

#define SSI_IM_RTIM 0x00000002

SSI Receive Time-Out Interrupt.

Mask

Definition at line 963 of file lm3s_com.h.

#define SSI_IM_TXIM 0x00000008

The following are defines for the bit fields in the SSI_O_IM register.

SSI Transmit FIFO Interrupt Mask

Definition at line 961 of file lm3s_com.h.

#define SSI_MIS_RORMIS 0x00000001

SSI Receive Overrun Masked.

Interrupt Status

Definition at line 993 of file lm3s_com.h.

#define SSI_MIS_RTMIS 0x00000002

SSI Receive Time-Out Masked.

Interrupt Status

Definition at line 991 of file lm3s_com.h.

#define SSI_MIS_RXMIS 0x00000004

SSI Receive FIFO Masked.

Interrupt Status

Definition at line 989 of file lm3s_com.h.

#define SSI_MIS_TXMIS 0x00000008

The following are defines for the bit fields in the SSI_O_MIS register.

SSI Transmit FIFO Masked Interrupt Status

Definition at line 987 of file lm3s_com.h.

#define SSI_RIS_RORRIS 0x00000001

SSI Receive Overrun Raw.

Interrupt Status

Definition at line 979 of file lm3s_com.h.

#define SSI_RIS_RTRIS 0x00000002

SSI Receive Time-Out Raw.

Interrupt Status

Definition at line 977 of file lm3s_com.h.

#define SSI_RIS_RXRIS 0x00000004

SSI Receive FIFO Raw Interrupt.

Status

Definition at line 975 of file lm3s_com.h.

#define SSI_RIS_TXRIS 0x00000008

The following are defines for the bit fields in the SSI_O_RIS register.

SSI Transmit FIFO Raw Interrupt Status

Definition at line 973 of file lm3s_com.h.

#define SSI_SR_BSY 0x00000010

The following are defines for the bit fields in the SSI_O_SR register.

SSI Busy Bit

Definition at line 942 of file lm3s_com.h.

#define SYSCTL_DID1_PKG_28SOIC 0x00000000

Deprecated defines for the bit fields in the SYSCTL_DID1 register.

SOIC package

Definition at line 3342 of file lm3s_com.h.

#define TIMER_CFG_16_BIT 0x00000004

16-bit timer configuration.

The function is controlled by bits 1:0 of GPTMTAMR and GPTMTBMR

Definition at line 1724 of file lm3s_com.h.

#define TIMER_CFG_32_BIT_RTC 0x00000001

32-bit real-time clock (RTC)

counter configuration

Definition at line 1722 of file lm3s_com.h.

#define TIMER_CFG_M 0x00000007

The following are defines for the bit fields in the TIMER_O_CFG register.

GPTM Configuration

Definition at line 1720 of file lm3s_com.h.

#define TIMER_CTL_TAOTE 0x00000020

GPTM Timer A Output Trigger.

Enable

Definition at line 1769 of file lm3s_com.h.

#define TIMER_CTL_TBOTE 0x00002000

GPTM Timer B Output Trigger.

Enable

Definition at line 1760 of file lm3s_com.h.

#define TIMER_CTL_TBPWML 0x00004000

The following are defines for the bit fields in the TIMER_O_CTL register.

GPTM Timer B PWM Output Level

Definition at line 1759 of file lm3s_com.h.

#define TIMER_ICR_CAECINT 0x00000004

GPTM Capture A Event Interrupt.

Clear

Definition at line 1848 of file lm3s_com.h.

#define TIMER_ICR_CAMCINT 0x00000002

GPTM Capture A Match Interrupt.

Clear

Definition at line 1850 of file lm3s_com.h.

#define TIMER_ICR_CBECINT 0x00000400

The following are defines for the bit fields in the TIMER_O_ICR register.

GPTM Capture B Event Interrupt Clear

Definition at line 1841 of file lm3s_com.h.

#define TIMER_ICR_CBMCINT 0x00000200

GPTM Capture B Match Interrupt.

Clear

Definition at line 1843 of file lm3s_com.h.

#define TIMER_ICR_TATOCINT 0x00000001

GPTM Timer A Time-Out Raw.

Interrupt

Definition at line 1852 of file lm3s_com.h.

#define TIMER_ICR_TBTOCINT 0x00000100

GPTM Timer B Time-Out Interrupt.

Clear

Definition at line 1845 of file lm3s_com.h.

#define TIMER_IMR_CAEIM 0x00000004

GPTM Capture A Event Interrupt.

Mask

Definition at line 1791 of file lm3s_com.h.

#define TIMER_IMR_CAMIM 0x00000002

GPTM Capture A Match Interrupt.

Mask

Definition at line 1793 of file lm3s_com.h.

#define TIMER_IMR_CBEIM 0x00000400

The following are defines for the bit fields in the TIMER_O_IMR register.

GPTM Capture B Event Interrupt Mask

Definition at line 1784 of file lm3s_com.h.

#define TIMER_IMR_CBMIM 0x00000200

GPTM Capture B Match Interrupt.

Mask

Definition at line 1786 of file lm3s_com.h.

#define TIMER_IMR_TATOIM 0x00000001

GPTM Timer A Time-Out Interrupt.

Mask

Definition at line 1795 of file lm3s_com.h.

#define TIMER_IMR_TBTOIM 0x00000100

GPTM Timer B Time-Out Interrupt.

Mask

Definition at line 1788 of file lm3s_com.h.

#define TIMER_MIS_CAEMIS 0x00000004

GPTM Capture A Event Masked.

Interrupt

Definition at line 1829 of file lm3s_com.h.

#define TIMER_MIS_CAMMIS 0x00000002

GPTM Capture A Match Masked.

Interrupt

Definition at line 1831 of file lm3s_com.h.

#define TIMER_MIS_CBEMIS 0x00000400

The following are defines for the bit fields in the TIMER_O_MIS register.

GPTM Capture B Event Masked Interrupt

Definition at line 1822 of file lm3s_com.h.

#define TIMER_MIS_CBMMIS 0x00000200

GPTM Capture B Match Masked.

Interrupt

Definition at line 1824 of file lm3s_com.h.

#define TIMER_MIS_TATOMIS 0x00000001

GPTM Timer A Time-Out Masked.

Interrupt

Definition at line 1833 of file lm3s_com.h.

#define TIMER_MIS_TBTOMIS 0x00000100

GPTM Timer B Time-Out Masked.

Interrupt

Definition at line 1826 of file lm3s_com.h.

#define TIMER_RIS_CAERIS 0x00000004

GPTM Capture A Event Raw.

Interrupt

Definition at line 1810 of file lm3s_com.h.

#define TIMER_RIS_CAMRIS 0x00000002

GPTM Capture A Match Raw.

Interrupt

Definition at line 1812 of file lm3s_com.h.

#define TIMER_RIS_CBERIS 0x00000400

The following are defines for the bit fields in the TIMER_O_RIS register.

GPTM Capture B Event Raw Interrupt

Definition at line 1803 of file lm3s_com.h.

#define TIMER_RIS_CBMRIS 0x00000200

GPTM Capture B Match Raw.

Interrupt

Definition at line 1805 of file lm3s_com.h.

#define TIMER_RIS_TATORIS 0x00000001

GPTM Timer A Time-Out Raw.

Interrupt

Definition at line 1814 of file lm3s_com.h.

#define TIMER_RIS_TBTORIS 0x00000100

GPTM Timer B Time-Out Raw.

Interrupt

Definition at line 1807 of file lm3s_com.h.

#define TIMER_TAILR_TAILRH_M 0xFFFF0000

The following are defines for the bit fields in the TIMER_O_TAILR register.

GPTM Timer A Interval Load Register High

Definition at line 1860 of file lm3s_com.h.

#define TIMER_TAILR_TAILRH_S 16

The following are defines for the bit fields in the TIMER_O_TAILR register.

GPTM Timer A Interval Load Register High

Definition at line 1864 of file lm3s_com.h.

#define TIMER_TAILR_TAILRL_M 0x0000FFFF

GPTM Timer A Interval Load.

Register Low

Definition at line 1862 of file lm3s_com.h.

#define TIMER_TAILR_TAILRL_S 0

The following are defines for the bit fields in the TIMER_O_TAILR register.

GPTM Timer A Interval Load Register High

Definition at line 1865 of file lm3s_com.h.

#define TIMER_TAMATCHR_TAMRH_M 0xFFFF0000

The following are defines for the bit fields in the TIMER_O_TAMATCHR register.

GPTM Timer A Match Register High

Definition at line 1882 of file lm3s_com.h.

#define TIMER_TAMATCHR_TAMRH_S 16

The following are defines for the bit fields in the TIMER_O_TAMATCHR register.

GPTM Timer A Match Register High

Definition at line 1884 of file lm3s_com.h.

#define TIMER_TAMATCHR_TAMRL_S 0

The following are defines for the bit fields in the TIMER_O_TAMATCHR register.

GPTM Timer A Match Register High

Definition at line 1885 of file lm3s_com.h.

#define TIMER_TAMR_TAAMS 0x00000008

The following are defines for the bit fields in the TIMER_O_TAMR register.

GPTM Timer A Alternate Mode Select

Definition at line 1733 of file lm3s_com.h.

#define TIMER_TAPMR_TAPSMR_M 0x000000FF

The following are defines for the bit fields in the TIMER_O_TAPMR register.

GPTM TimerA Prescale Match

Definition at line 1917 of file lm3s_com.h.

#define TIMER_TAPMR_TAPSMR_S 0

The following are defines for the bit fields in the TIMER_O_TAPMR register.

GPTM TimerA Prescale Match

Definition at line 1918 of file lm3s_com.h.

#define TIMER_TAPR_TAPSR_M 0x000000FF

The following are defines for the bit fields in the TIMER_O_TAPR register.

GPTM Timer A Prescale

Definition at line 1901 of file lm3s_com.h.

#define TIMER_TAPR_TAPSR_S 0

The following are defines for the bit fields in the TIMER_O_TAPR register.

GPTM Timer A Prescale

Definition at line 1902 of file lm3s_com.h.

#define TIMER_TAR_TARH_M 0xFFFF0000

The following are defines for the bit fields in the TIMER_O_TAR register.

GPTM Timer A Register High

Definition at line 1933 of file lm3s_com.h.

#define TIMER_TAR_TARH_S 16

The following are defines for the bit fields in the TIMER_O_TAR register.

GPTM Timer A Register High

Definition at line 1935 of file lm3s_com.h.

#define TIMER_TAR_TARL_S 0

The following are defines for the bit fields in the TIMER_O_TAR register.

GPTM Timer A Register High

Definition at line 1936 of file lm3s_com.h.

#define TIMER_TBILR_TBILRL_M 0x0000FFFF

The following are defines for the bit fields in the TIMER_O_TBILR register.

GPTM Timer B Interval Load Register

Definition at line 1872 of file lm3s_com.h.

#define TIMER_TBILR_TBILRL_S 0

The following are defines for the bit fields in the TIMER_O_TBILR register.

GPTM Timer B Interval Load Register

Definition at line 1874 of file lm3s_com.h.

#define TIMER_TBMATCHR_TBMRL_M 0x0000FFFF

The following are defines for the bit fields in the TIMER_O_TBMATCHR register.

GPTM Timer B Match Register Low

Definition at line 1893 of file lm3s_com.h.

#define TIMER_TBMATCHR_TBMRL_S 0

The following are defines for the bit fields in the TIMER_O_TBMATCHR register.

GPTM Timer B Match Register Low

Definition at line 1894 of file lm3s_com.h.

#define TIMER_TBMR_TBAMS 0x00000008

The following are defines for the bit fields in the TIMER_O_TBMR register.

GPTM Timer B Alternate Mode Select

Definition at line 1746 of file lm3s_com.h.

#define TIMER_TBPMR_TBPSMR_M 0x000000FF

The following are defines for the bit fields in the TIMER_O_TBPMR register.

GPTM TimerB Prescale Match

Definition at line 1925 of file lm3s_com.h.

#define TIMER_TBPMR_TBPSMR_S 0

The following are defines for the bit fields in the TIMER_O_TBPMR register.

GPTM TimerB Prescale Match

Definition at line 1926 of file lm3s_com.h.

#define TIMER_TBPR_TBPSR_M 0x000000FF

The following are defines for the bit fields in the TIMER_O_TBPR register.

GPTM Timer B Prescale

Definition at line 1909 of file lm3s_com.h.

#define TIMER_TBPR_TBPSR_S 0

The following are defines for the bit fields in the TIMER_O_TBPR register.

GPTM Timer B Prescale

Definition at line 1910 of file lm3s_com.h.

#define TIMER_TBR_TBRL_M 0x0000FFFF

The following are defines for the bit fields in the TIMER_O_TBR register.

GPTM Timer B

Definition at line 1943 of file lm3s_com.h.

#define TIMER_TBR_TBRL_S 0

The following are defines for the bit fields in the TIMER_O_TBR register.

GPTM Timer B

Definition at line 1944 of file lm3s_com.h.

#define UART_CTL_RXE 0x00000200

The following are defines for the bit fields in the UART_O_CTL register.

UART Receive Enable

Definition at line 1093 of file lm3s_com.h.

#define UART_DR_DATA_S 0

The following are defines for the bit fields in the UART_O_DR register.

UART Overrun Error

Definition at line 1016 of file lm3s_com.h.

#define UART_DR_OE 0x00000800

The following are defines for the bit fields in the UART_O_DR register.

UART Overrun Error

Definition at line 1011 of file lm3s_com.h.

#define UART_ECR_DATA_M 0x000000FF

The following are defines for the bit fields in the UART_O_ECR register.

Error Clear

Definition at line 1033 of file lm3s_com.h.

#define UART_ECR_DATA_S 0

The following are defines for the bit fields in the UART_O_ECR register.

Error Clear

Definition at line 1034 of file lm3s_com.h.

#define UART_FBRD_DIVFRAC_M 0x0000003F

The following are defines for the bit fields in the UART_O_FBRD register.

Fractional Baud-Rate Divisor

Definition at line 1068 of file lm3s_com.h.

#define UART_FBRD_DIVFRAC_S 0

The following are defines for the bit fields in the UART_O_FBRD register.

Fractional Baud-Rate Divisor

Definition at line 1069 of file lm3s_com.h.

#define UART_FR_TXFE 0x00000080

The following are defines for the bit fields in the UART_O_FR register.

UART Transmit FIFO Empty

Definition at line 1041 of file lm3s_com.h.

#define UART_IBRD_DIVINT_M 0x0000FFFF

The following are defines for the bit fields in the UART_O_IBRD register.

Integer Baud-Rate Divisor

Definition at line 1060 of file lm3s_com.h.

#define UART_IBRD_DIVINT_S 0

The following are defines for the bit fields in the UART_O_IBRD register.

Integer Baud-Rate Divisor

Definition at line 1061 of file lm3s_com.h.

#define UART_ICR_OEIC 0x00000400

The following are defines for the bit fields in the UART_O_ICR register.

Overrun Error Interrupt Clear

Definition at line 1181 of file lm3s_com.h.

#define UART_IFLS_RX_M 0x00000038

The following are defines for the bit fields in the UART_O_IFLS register.

UART Receive Interrupt FIFO Level Select

Definition at line 1105 of file lm3s_com.h.

#define UART_IFLS_TX_M 0x00000007

UART Transmit Interrupt FIFO.

Level Select

Definition at line 1112 of file lm3s_com.h.

#define UART_ILPR_ILPDVSR_M 0x000000FF

The following are defines for the bit fields in the UART_O_ILPR register.

IrDA Low-Power Divisor

Definition at line 1052 of file lm3s_com.h.

#define UART_ILPR_ILPDVSR_S 0

The following are defines for the bit fields in the UART_O_ILPR register.

IrDA Low-Power Divisor

Definition at line 1053 of file lm3s_com.h.

#define UART_IM_FEIM 0x00000080

UART Framing Error Interrupt.

Mask

Definition at line 1129 of file lm3s_com.h.

#define UART_IM_OEIM 0x00000400

The following are defines for the bit fields in the UART_O_IM register.

UART Overrun Error Interrupt Mask

Definition at line 1125 of file lm3s_com.h.

#define UART_IM_RTIM 0x00000040

UART Receive Time-Out Interrupt.

Mask

Definition at line 1131 of file lm3s_com.h.

#define UART_LCRH_SPS 0x00000080

The following are defines for the bit fields in the UART_O_LCRH register.

UART Stick Parity Select

Definition at line 1076 of file lm3s_com.h.

#define UART_MIS_BEMIS 0x00000200

UART Break Error Masked.

Interrupt Status

Definition at line 1163 of file lm3s_com.h.

#define UART_MIS_FEMIS 0x00000080

UART Framing Error Masked.

Interrupt Status

Definition at line 1167 of file lm3s_com.h.

#define UART_MIS_OEMIS 0x00000400

The following are defines for the bit fields in the UART_O_MIS register.

UART Overrun Error Masked Interrupt Status

Definition at line 1161 of file lm3s_com.h.

#define UART_MIS_PEMIS 0x00000100

UART Parity Error Masked.

Interrupt Status

Definition at line 1165 of file lm3s_com.h.

#define UART_MIS_RTMIS 0x00000040

UART Receive Time-Out Masked.

Interrupt Status

Definition at line 1169 of file lm3s_com.h.

#define UART_MIS_RXMIS 0x00000010

UART Receive Masked Interrupt.

Status

Definition at line 1173 of file lm3s_com.h.

#define UART_MIS_TXMIS 0x00000020

UART Transmit Masked Interrupt.

Status

Definition at line 1171 of file lm3s_com.h.

#define UART_RIS_BERIS 0x00000200

UART Break Error Raw Interrupt.

Status

Definition at line 1143 of file lm3s_com.h.

#define UART_RIS_FERIS 0x00000080

UART Framing Error Raw Interrupt.

Status

Definition at line 1147 of file lm3s_com.h.

#define UART_RIS_OERIS 0x00000400

The following are defines for the bit fields in the UART_O_RIS register.

UART Overrun Error Raw Interrupt Status

Definition at line 1141 of file lm3s_com.h.

#define UART_RIS_PERIS 0x00000100

UART Parity Error Raw Interrupt.

Status

Definition at line 1145 of file lm3s_com.h.

#define UART_RIS_RTRIS 0x00000040

UART Receive Time-Out Raw.

Interrupt Status

Definition at line 1149 of file lm3s_com.h.

#define UART_RIS_RXRIS 0x00000010

UART Receive Raw Interrupt.

Status

Definition at line 1153 of file lm3s_com.h.

#define UART_RIS_TXRIS 0x00000020

UART Transmit Raw Interrupt.

Status

Definition at line 1151 of file lm3s_com.h.

#define UART_RSR_OE 0x00000008

The following are defines for the bit fields in the UART_O_RSR register.

UART Overrun Error

Definition at line 1023 of file lm3s_com.h.

#define WATCHDOG_CTL_R (*((reg32_t *)0x40000008))

The following definitions are deprecated.

Deprecated defines for the Watchdog

Definition at line 3247 of file lm3s_com.h.

#define WATCHDOG_ICR_R (*((reg32_t *)0x4000000C))

The following definitions are deprecated.

Deprecated defines for the Watchdog

Definition at line 3248 of file lm3s_com.h.

#define WATCHDOG_LOAD_R (*((reg32_t *)0x40000000))

The following definitions are deprecated.

Deprecated defines for the Watchdog

Definition at line 3245 of file lm3s_com.h.

#define WATCHDOG_LOCK_R (*((reg32_t *)0x40000C00))

The following definitions are deprecated.

Deprecated defines for the Watchdog

Definition at line 3252 of file lm3s_com.h.

#define WATCHDOG_MIS_R (*((reg32_t *)0x40000014))

The following definitions are deprecated.

Deprecated defines for the Watchdog

Definition at line 3250 of file lm3s_com.h.

#define WATCHDOG_RIS_R (*((reg32_t *)0x40000010))

The following definitions are deprecated.

Deprecated defines for the Watchdog

Definition at line 3249 of file lm3s_com.h.

#define WATCHDOG_TEST_R (*((reg32_t *)0x40000418))

The following definitions are deprecated.

Deprecated defines for the Watchdog

Definition at line 3251 of file lm3s_com.h.

#define WATCHDOG_VALUE_R (*((reg32_t *)0x40000004))

The following definitions are deprecated.

Deprecated defines for the Watchdog

Definition at line 3246 of file lm3s_com.h.

#define WDT_CTL_RESEN 0x00000002

The following are defines for the bit fields in the WDT_O_CTL register.

Watchdog Reset Enable

Definition at line 835 of file lm3s_com.h.

#define WDT_ICR_M 0xFFFFFFFF

The following are defines for the bit fields in the WDT_O_ICR register.

Watchdog Interrupt Clear

Definition at line 843 of file lm3s_com.h.

#define WDT_ICR_S 0

The following are defines for the bit fields in the WDT_O_ICR register.

Watchdog Interrupt Clear

Definition at line 844 of file lm3s_com.h.

#define WDT_LOAD_M 0xFFFFFFFF

The following are defines for the bit fields in the WDT_O_LOAD register.

Watchdog Load Value

Definition at line 819 of file lm3s_com.h.

#define WDT_LOAD_S 0

The following are defines for the bit fields in the WDT_O_LOAD register.

Watchdog Load Value

Definition at line 820 of file lm3s_com.h.

#define WDT_LOCK_M 0xFFFFFFFF

The following are defines for the bit fields in the WDT_O_LOCK register.

Watchdog Lock

Definition at line 872 of file lm3s_com.h.

#define WDT_MIS_WDTMIS 0x00000001

The following are defines for the bit fields in the WDT_O_MIS register.

Watchdog Masked Interrupt Status

Definition at line 858 of file lm3s_com.h.

#define WDT_RIS_WDTRIS 0x00000001

The following are defines for the bit fields in the WDT_O_RIS register.

Watchdog Raw Interrupt Status

Definition at line 851 of file lm3s_com.h.

#define WDT_TEST_STALL 0x00000100

The following are defines for the bit fields in the WDT_O_TEST register.

Watchdog Stall Enable

Definition at line 865 of file lm3s_com.h.

#define WDT_VALUE_M 0xFFFFFFFF

The following are defines for the bit fields in the WDT_O_VALUE register.

Watchdog Value

Definition at line 827 of file lm3s_com.h.

#define WDT_VALUE_S 0

The following are defines for the bit fields in the WDT_O_VALUE register.

Watchdog Value

Definition at line 828 of file lm3s_com.h.


BeRTOS: lm3s_com.h Source File

  • cpu
  • cortex-m3
  • io
lm3s_com.h
Go to the documentation of this file.
00001
00036 #ifndef LM3S1968_H
00037 #define LM3S1968_H
00038
00039 #include <cfg/compiler.h>
00040
00044 /*\{*/
00045 #define WATCHDOG0_LOAD_R        (*((reg32_t *)0x40000000))
00046 #define WATCHDOG0_VALUE_R       (*((reg32_t *)0x40000004))
00047 #define WATCHDOG0_CTL_R         (*((reg32_t *)0x40000008))
00048 #define WATCHDOG0_ICR_R         (*((reg32_t *)0x4000000C))
00049 #define WATCHDOG0_RIS_R         (*((reg32_t *)0x40000010))
00050 #define WATCHDOG0_MIS_R         (*((reg32_t *)0x40000014))
00051 #define WATCHDOG0_TEST_R        (*((reg32_t *)0x40000418))
00052 #define WATCHDOG0_LOCK_R        (*((reg32_t *)0x40000C00))
00053 /*\}*/
00054
00058 /*\{*/
00059 #define GPIO_PORTA_DATA_BITS_R  ((reg32_t *)0x40004000)
00060 #define GPIO_PORTA_DATA_R       (*((reg32_t *)0x400043FC))
00061 #define GPIO_PORTA_DIR_R        (*((reg32_t *)0x40004400))
00062 #define GPIO_PORTA_IS_R         (*((reg32_t *)0x40004404))
00063 #define GPIO_PORTA_IBE_R        (*((reg32_t *)0x40004408))
00064 #define GPIO_PORTA_IEV_R        (*((reg32_t *)0x4000440C))
00065 #define GPIO_PORTA_IM_R         (*((reg32_t *)0x40004410))
00066 #define GPIO_PORTA_RIS_R        (*((reg32_t *)0x40004414))
00067 #define GPIO_PORTA_MIS_R        (*((reg32_t *)0x40004418))
00068 #define GPIO_PORTA_ICR_R        (*((reg32_t *)0x4000441C))
00069 #define GPIO_PORTA_AFSEL_R      (*((reg32_t *)0x40004420))
00070 #define GPIO_PORTA_DR2R_R       (*((reg32_t *)0x40004500))
00071 #define GPIO_PORTA_DR4R_R       (*((reg32_t *)0x40004504))
00072 #define GPIO_PORTA_DR8R_R       (*((reg32_t *)0x40004508))
00073 #define GPIO_PORTA_ODR_R        (*((reg32_t *)0x4000450C))
00074 #define GPIO_PORTA_PUR_R        (*((reg32_t *)0x40004510))
00075 #define GPIO_PORTA_PDR_R        (*((reg32_t *)0x40004514))
00076 #define GPIO_PORTA_SLR_R        (*((reg32_t *)0x40004518))
00077 #define GPIO_PORTA_DEN_R        (*((reg32_t *)0x4000451C))
00078 #define GPIO_PORTA_LOCK_R       (*((reg32_t *)0x40004520))
00079 #define GPIO_PORTA_CR_R         (*((reg32_t *)0x40004524))
00080 /*\}*/
00081
00085 /*\{*/
00086 #define GPIO_PORTB_DATA_BITS_R  ((reg32_t *)0x40005000)
00087 #define GPIO_PORTB_DATA_R       (*((reg32_t *)0x400053FC))
00088 #define GPIO_PORTB_DIR_R        (*((reg32_t *)0x40005400))
00089 #define GPIO_PORTB_IS_R         (*((reg32_t *)0x40005404))
00090 #define GPIO_PORTB_IBE_R        (*((reg32_t *)0x40005408))
00091 #define GPIO_PORTB_IEV_R        (*((reg32_t *)0x4000540C))
00092 #define GPIO_PORTB_IM_R         (*((reg32_t *)0x40005410))
00093 #define GPIO_PORTB_RIS_R        (*((reg32_t *)0x40005414))
00094 #define GPIO_PORTB_MIS_R        (*((reg32_t *)0x40005418))
00095 #define GPIO_PORTB_ICR_R        (*((reg32_t *)0x4000541C))
00096 #define GPIO_PORTB_AFSEL_R      (*((reg32_t *)0x40005420))
00097 #define GPIO_PORTB_DR2R_R       (*((reg32_t *)0x40005500))
00098 #define GPIO_PORTB_DR4R_R       (*((reg32_t *)0x40005504))
00099 #define GPIO_PORTB_DR8R_R       (*((reg32_t *)0x40005508))
00100 #define GPIO_PORTB_ODR_R        (*((reg32_t *)0x4000550C))
00101 #define GPIO_PORTB_PUR_R        (*((reg32_t *)0x40005510))
00102 #define GPIO_PORTB_PDR_R        (*((reg32_t *)0x40005514))
00103 #define GPIO_PORTB_SLR_R        (*((reg32_t *)0x40005518))
00104 #define GPIO_PORTB_DEN_R        (*((reg32_t *)0x4000551C))
00105 #define GPIO_PORTB_LOCK_R       (*((reg32_t *)0x40005520))
00106 #define GPIO_PORTB_CR_R         (*((reg32_t *)0x40005524))
00107 /*\}*/
00108
00112 /*\{*/
00113 #define GPIO_PORTC_DATA_BITS_R  ((reg32_t *)0x40006000)
00114 #define GPIO_PORTC_DATA_R       (*((reg32_t *)0x400063FC))
00115 #define GPIO_PORTC_DIR_R        (*((reg32_t *)0x40006400))
00116 #define GPIO_PORTC_IS_R         (*((reg32_t *)0x40006404))
00117 #define GPIO_PORTC_IBE_R        (*((reg32_t *)0x40006408))
00118 #define GPIO_PORTC_IEV_R        (*((reg32_t *)0x4000640C))
00119 #define GPIO_PORTC_IM_R         (*((reg32_t *)0x40006410))
00120 #define GPIO_PORTC_RIS_R        (*((reg32_t *)0x40006414))
00121 #define GPIO_PORTC_MIS_R        (*((reg32_t *)0x40006418))
00122 #define GPIO_PORTC_ICR_R        (*((reg32_t *)0x4000641C))
00123 #define GPIO_PORTC_AFSEL_R      (*((reg32_t *)0x40006420))
00124 #define GPIO_PORTC_DR2R_R       (*((reg32_t *)0x40006500))
00125 #define GPIO_PORTC_DR4R_R       (*((reg32_t *)0x40006504))
00126 #define GPIO_PORTC_DR8R_R       (*((reg32_t *)0x40006508))
00127 #define GPIO_PORTC_ODR_R        (*((reg32_t *)0x4000650C))
00128 #define GPIO_PORTC_PUR_R        (*((reg32_t *)0x40006510))
00129 #define GPIO_PORTC_PDR_R        (*((reg32_t *)0x40006514))
00130 #define GPIO_PORTC_SLR_R        (*((reg32_t *)0x40006518))
00131 #define GPIO_PORTC_DEN_R        (*((reg32_t *)0x4000651C))
00132 #define GPIO_PORTC_LOCK_R       (*((reg32_t *)0x40006520))
00133 #define GPIO_PORTC_CR_R         (*((reg32_t *)0x40006524))
00134 /*\}*/
00135
00139 /*\{*/
00140 #define GPIO_PORTD_DATA_BITS_R  ((reg32_t *)0x40007000)
00141 #define GPIO_PORTD_DATA_R       (*((reg32_t *)0x400073FC))
00142 #define GPIO_PORTD_DIR_R        (*((reg32_t *)0x40007400))
00143 #define GPIO_PORTD_IS_R         (*((reg32_t *)0x40007404))
00144 #define GPIO_PORTD_IBE_R        (*((reg32_t *)0x40007408))
00145 #define GPIO_PORTD_IEV_R        (*((reg32_t *)0x4000740C))
00146 #define GPIO_PORTD_IM_R         (*((reg32_t *)0x40007410))
00147 #define GPIO_PORTD_RIS_R        (*((reg32_t *)0x40007414))
00148 #define GPIO_PORTD_MIS_R        (*((reg32_t *)0x40007418))
00149 #define GPIO_PORTD_ICR_R        (*((reg32_t *)0x4000741C))
00150 #define GPIO_PORTD_AFSEL_R      (*((reg32_t *)0x40007420))
00151 #define GPIO_PORTD_DR2R_R       (*((reg32_t *)0x40007500))
00152 #define GPIO_PORTD_DR4R_R       (*((reg32_t *)0x40007504))
00153 #define GPIO_PORTD_DR8R_R       (*((reg32_t *)0x40007508))
00154 #define GPIO_PORTD_ODR_R        (*((reg32_t *)0x4000750C))
00155 #define GPIO_PORTD_PUR_R        (*((reg32_t *)0x40007510))
00156 #define GPIO_PORTD_PDR_R        (*((reg32_t *)0x40007514))
00157 #define GPIO_PORTD_SLR_R        (*((reg32_t *)0x40007518))
00158 #define GPIO_PORTD_DEN_R        (*((reg32_t *)0x4000751C))
00159 #define GPIO_PORTD_LOCK_R       (*((reg32_t *)0x40007520))
00160 #define GPIO_PORTD_CR_R         (*((reg32_t *)0x40007524))
00161 /*\}*/
00162
00166 /*\{*/
00167 #define SSI0_CR0_R              (*((reg32_t *)0x40008000))
00168 #define SSI0_CR1_R              (*((reg32_t *)0x40008004))
00169 #define SSI0_DR_R               (*((reg32_t *)0x40008008))
00170 #define SSI0_SR_R               (*((reg32_t *)0x4000800C))
00171 #define SSI0_CPSR_R             (*((reg32_t *)0x40008010))
00172 #define SSI0_IM_R               (*((reg32_t *)0x40008014))
00173 #define SSI0_RIS_R              (*((reg32_t *)0x40008018))
00174 #define SSI0_MIS_R              (*((reg32_t *)0x4000801C))
00175 #define SSI0_ICR_R              (*((reg32_t *)0x40008020))
00176 /*\}*/
00177
00181 /*\{*/
00182 #define SSI1_CR0_R              (*((reg32_t *)0x40009000))
00183 #define SSI1_CR1_R              (*((reg32_t *)0x40009004))
00184 #define SSI1_DR_R               (*((reg32_t *)0x40009008))
00185 #define SSI1_SR_R               (*((reg32_t *)0x4000900C))
00186 #define SSI1_CPSR_R             (*((reg32_t *)0x40009010))
00187 #define SSI1_IM_R               (*((reg32_t *)0x40009014))
00188 #define SSI1_RIS_R              (*((reg32_t *)0x40009018))
00189 #define SSI1_MIS_R              (*((reg32_t *)0x4000901C))
00190 #define SSI1_ICR_R              (*((reg32_t *)0x40009020))
00191 /*\}*/
00192
00196 /*\{*/
00197 #define UART0_DR_R              (*((reg32_t *)0x4000C000))
00198 #define UART0_RSR_R             (*((reg32_t *)0x4000C004))
00199 #define UART0_ECR_R             (*((reg32_t *)0x4000C004))
00200 #define UART0_FR_R              (*((reg32_t *)0x4000C018))
00201 #define UART0_ILPR_R            (*((reg32_t *)0x4000C020))
00202 #define UART0_IBRD_R            (*((reg32_t *)0x4000C024))
00203 #define UART0_FBRD_R            (*((reg32_t *)0x4000C028))
00204 #define UART0_LCRH_R            (*((reg32_t *)0x4000C02C))
00205 #define UART0_CTL_R             (*((reg32_t *)0x4000C030))
00206 #define UART0_IFLS_R            (*((reg32_t *)0x4000C034))
00207 #define UART0_IM_R              (*((reg32_t *)0x4000C038))
00208 #define UART0_RIS_R             (*((reg32_t *)0x4000C03C))
00209 #define UART0_MIS_R             (*((reg32_t *)0x4000C040))
00210 #define UART0_ICR_R             (*((reg32_t *)0x4000C044))
00211 /*\}*/
00212
00216 /*\{*/
00217 #define UART1_DR_R              (*((reg32_t *)0x4000D000))
00218 #define UART1_RSR_R             (*((reg32_t *)0x4000D004))
00219 #define UART1_ECR_R             (*((reg32_t *)0x4000D004))
00220 #define UART1_FR_R              (*((reg32_t *)0x4000D018))
00221 #define UART1_ILPR_R            (*((reg32_t *)0x4000D020))
00222 #define UART1_IBRD_R            (*((reg32_t *)0x4000D024))
00223 #define UART1_FBRD_R            (*((reg32_t *)0x4000D028))
00224 #define UART1_LCRH_R            (*((reg32_t *)0x4000D02C))
00225 #define UART1_CTL_R             (*((reg32_t *)0x4000D030))
00226 #define UART1_IFLS_R            (*((reg32_t *)0x4000D034))
00227 #define UART1_IM_R              (*((reg32_t *)0x4000D038))
00228 #define UART1_RIS_R             (*((reg32_t *)0x4000D03C))
00229 #define UART1_MIS_R             (*((reg32_t *)0x4000D040))
00230 #define UART1_ICR_R             (*((reg32_t *)0x4000D044))
00231 /*\}*/
00232
00236 /*\{*/
00237 #define UART2_DR_R              (*((reg32_t *)0x4000E000))
00238 #define UART2_RSR_R             (*((reg32_t *)0x4000E004))
00239 #define UART2_ECR_R             (*((reg32_t *)0x4000E004))
00240 #define UART2_FR_R              (*((reg32_t *)0x4000E018))
00241 #define UART2_ILPR_R            (*((reg32_t *)0x4000E020))
00242 #define UART2_IBRD_R            (*((reg32_t *)0x4000E024))
00243 #define UART2_FBRD_R            (*((reg32_t *)0x4000E028))
00244 #define UART2_LCRH_R            (*((reg32_t *)0x4000E02C))
00245 #define UART2_CTL_R             (*((reg32_t *)0x4000E030))
00246 #define UART2_IFLS_R            (*((reg32_t *)0x4000E034))
00247 #define UART2_IM_R              (*((reg32_t *)0x4000E038))
00248 #define UART2_RIS_R             (*((reg32_t *)0x4000E03C))
00249 #define UART2_MIS_R             (*((reg32_t *)0x4000E040))
00250 #define UART2_ICR_R             (*((reg32_t *)0x4000E044))
00251 /*\}*/
00252
00256 /*\{*/
00257 #define I2C0_MASTER_MSA_R       (*((reg32_t *)0x40020000))
00258 #define I2C0_MASTER_SOAR_R      (*((reg32_t *)0x40020000))
00259 #define I2C0_MASTER_SCSR_R      (*((reg32_t *)0x40020004))
00260 #define I2C0_MASTER_MCS_R       (*((reg32_t *)0x40020004))
00261 #define I2C0_MASTER_SDR_R       (*((reg32_t *)0x40020008))
00262 #define I2C0_MASTER_MDR_R       (*((reg32_t *)0x40020008))
00263 #define I2C0_MASTER_MTPR_R      (*((reg32_t *)0x4002000C))
00264 #define I2C0_MASTER_SIMR_R      (*((reg32_t *)0x4002000C))
00265 #define I2C0_MASTER_SRIS_R      (*((reg32_t *)0x40020010))
00266 #define I2C0_MASTER_MIMR_R      (*((reg32_t *)0x40020010))
00267 #define I2C0_MASTER_MRIS_R      (*((reg32_t *)0x40020014))
00268 #define I2C0_MASTER_SMIS_R      (*((reg32_t *)0x40020014))
00269 #define I2C0_MASTER_SICR_R      (*((reg32_t *)0x40020018))
00270 #define I2C0_MASTER_MMIS_R      (*((reg32_t *)0x40020018))
00271 #define I2C0_MASTER_MICR_R      (*((reg32_t *)0x4002001C))
00272 #define I2C0_MASTER_MCR_R       (*((reg32_t *)0x40020020))
00273 /*\}*/
00274
00278 /*\{*/
00279 #define I2C0_SLAVE_MSA_R        (*((reg32_t *)0x40020800))
00280 #define I2C0_SLAVE_SOAR_R       (*((reg32_t *)0x40020800))
00281 #define I2C0_SLAVE_SCSR_R       (*((reg32_t *)0x40020804))
00282 #define I2C0_SLAVE_MCS_R        (*((reg32_t *)0x40020804))
00283 #define I2C0_SLAVE_SDR_R        (*((reg32_t *)0x40020808))
00284 #define I2C0_SLAVE_MDR_R        (*((reg32_t *)0x40020808))
00285 #define I2C0_SLAVE_MTPR_R       (*((reg32_t *)0x4002080C))
00286 #define I2C0_SLAVE_SIMR_R       (*((reg32_t *)0x4002080C))
00287 #define I2C0_SLAVE_SRIS_R       (*((reg32_t *)0x40020810))
00288 #define I2C0_SLAVE_MIMR_R       (*((reg32_t *)0x40020810))
00289 #define I2C0_SLAVE_MRIS_R       (*((reg32_t *)0x40020814))
00290 #define I2C0_SLAVE_SMIS_R       (*((reg32_t *)0x40020814))
00291 #define I2C0_SLAVE_SICR_R       (*((reg32_t *)0x40020818))
00292 #define I2C0_SLAVE_MMIS_R       (*((reg32_t *)0x40020818))
00293 #define I2C0_SLAVE_MICR_R       (*((reg32_t *)0x4002081C))
00294 #define I2C0_SLAVE_MCR_R        (*((reg32_t *)0x40020820))
00295 /*\}*/
00296
00300 /*\{*/
00301 #define I2C1_MASTER_MSA_R       (*((reg32_t *)0x40021000))
00302 #define I2C1_MASTER_SOAR_R      (*((reg32_t *)0x40021000))
00303 #define I2C1_MASTER_SCSR_R      (*((reg32_t *)0x40021004))
00304 #define I2C1_MASTER_MCS_R       (*((reg32_t *)0x40021004))
00305 #define I2C1_MASTER_SDR_R       (*((reg32_t *)0x40021008))
00306 #define I2C1_MASTER_MDR_R       (*((reg32_t *)0x40021008))
00307 #define I2C1_MASTER_MTPR_R      (*((reg32_t *)0x4002100C))
00308 #define I2C1_MASTER_SIMR_R      (*((reg32_t *)0x4002100C))
00309 #define I2C1_MASTER_SRIS_R      (*((reg32_t *)0x40021010))
00310 #define I2C1_MASTER_MIMR_R      (*((reg32_t *)0x40021010))
00311 #define I2C1_MASTER_MRIS_R      (*((reg32_t *)0x40021014))
00312 #define I2C1_MASTER_SMIS_R      (*((reg32_t *)0x40021014))
00313 #define I2C1_MASTER_SICR_R      (*((reg32_t *)0x40021018))
00314 #define I2C1_MASTER_MMIS_R      (*((reg32_t *)0x40021018))
00315 #define I2C1_MASTER_MICR_R      (*((reg32_t *)0x4002101C))
00316 #define I2C1_MASTER_MCR_R       (*((reg32_t *)0x40021020))
00317 /*\}*/
00318
00322 /*\{*/
00323 #define I2C1_SLAVE_MSA_R        (*((reg32_t *)0x40021800))
00324 #define I2C1_SLAVE_SOAR_R       (*((reg32_t *)0x40021800))
00325 #define I2C1_SLAVE_SCSR_R       (*((reg32_t *)0x40021804))
00326 #define I2C1_SLAVE_MCS_R        (*((reg32_t *)0x40021804))
00327 #define I2C1_SLAVE_SDR_R        (*((reg32_t *)0x40021808))
00328 #define I2C1_SLAVE_MDR_R        (*((reg32_t *)0x40021808))
00329 #define I2C1_SLAVE_MTPR_R       (*((reg32_t *)0x4002180C))
00330 #define I2C1_SLAVE_SIMR_R       (*((reg32_t *)0x4002180C))
00331 #define I2C1_SLAVE_SRIS_R       (*((reg32_t *)0x40021810))
00332 #define I2C1_SLAVE_MIMR_R       (*((reg32_t *)0x40021810))
00333 #define I2C1_SLAVE_MRIS_R       (*((reg32_t *)0x40021814))
00334 #define I2C1_SLAVE_SMIS_R       (*((reg32_t *)0x40021814))
00335 #define I2C1_SLAVE_SICR_R       (*((reg32_t *)0x40021818))
00336 #define I2C1_SLAVE_MMIS_R       (*((reg32_t *)0x40021818))
00337 #define I2C1_SLAVE_MICR_R       (*((reg32_t *)0x4002181C))
00338 #define I2C1_SLAVE_MCR_R        (*((reg32_t *)0x40021820))
00339 /*\}*/
00340
00344 /*\{*/
00345 #define GPIO_PORTE_DATA_BITS_R  ((reg32_t *)0x40024000)
00346 #define GPIO_PORTE_DATA_R       (*((reg32_t *)0x400243FC))
00347 #define GPIO_PORTE_DIR_R        (*((reg32_t *)0x40024400))
00348 #define GPIO_PORTE_IS_R         (*((reg32_t *)0x40024404))
00349 #define GPIO_PORTE_IBE_R        (*((reg32_t *)0x40024408))
00350 #define GPIO_PORTE_IEV_R        (*((reg32_t *)0x4002440C))
00351 #define GPIO_PORTE_IM_R         (*((reg32_t *)0x40024410))
00352 #define GPIO_PORTE_RIS_R        (*((reg32_t *)0x40024414))
00353 #define GPIO_PORTE_MIS_R        (*((reg32_t *)0x40024418))
00354 #define GPIO_PORTE_ICR_R        (*((reg32_t *)0x4002441C))
00355 #define GPIO_PORTE_AFSEL_R      (*((reg32_t *)0x40024420))
00356 #define GPIO_PORTE_DR2R_R       (*((reg32_t *)0x40024500))
00357 #define GPIO_PORTE_DR4R_R       (*((reg32_t *)0x40024504))
00358 #define GPIO_PORTE_DR8R_R       (*((reg32_t *)0x40024508))
00359 #define GPIO_PORTE_ODR_R        (*((reg32_t *)0x4002450C))
00360 #define GPIO_PORTE_PUR_R        (*((reg32_t *)0x40024510))
00361 #define GPIO_PORTE_PDR_R        (*((reg32_t *)0x40024514))
00362 #define GPIO_PORTE_SLR_R        (*((reg32_t *)0x40024518))
00363 #define GPIO_PORTE_DEN_R        (*((reg32_t *)0x4002451C))
00364 #define GPIO_PORTE_LOCK_R       (*((reg32_t *)0x40024520))
00365 #define GPIO_PORTE_CR_R         (*((reg32_t *)0x40024524))
00366 /*\}*/
00367
00371 /*\{*/
00372 #define GPIO_PORTF_DATA_BITS_R  ((reg32_t *)0x40025000)
00373 #define GPIO_PORTF_DATA_R       (*((reg32_t *)0x400253FC))
00374 #define GPIO_PORTF_DIR_R        (*((reg32_t *)0x40025400))
00375 #define GPIO_PORTF_IS_R         (*((reg32_t *)0x40025404))
00376 #define GPIO_PORTF_IBE_R        (*((reg32_t *)0x40025408))
00377 #define GPIO_PORTF_IEV_R        (*((reg32_t *)0x4002540C))
00378 #define GPIO_PORTF_IM_R         (*((reg32_t *)0x40025410))
00379 #define GPIO_PORTF_RIS_R        (*((reg32_t *)0x40025414))
00380 #define GPIO_PORTF_MIS_R        (*((reg32_t *)0x40025418))
00381 #define GPIO_PORTF_ICR_R        (*((reg32_t *)0x4002541C))
00382 #define GPIO_PORTF_AFSEL_R      (*((reg32_t *)0x40025420))
00383 #define GPIO_PORTF_DR2R_R       (*((reg32_t *)0x40025500))
00384 #define GPIO_PORTF_DR4R_R       (*((reg32_t *)0x40025504))
00385 #define GPIO_PORTF_DR8R_R       (*((reg32_t *)0x40025508))
00386 #define GPIO_PORTF_ODR_R        (*((reg32_t *)0x4002550C))
00387 #define GPIO_PORTF_PUR_R        (*((reg32_t *)0x40025510))
00388 #define GPIO_PORTF_PDR_R        (*((reg32_t *)0x40025514))
00389 #define GPIO_PORTF_SLR_R        (*((reg32_t *)0x40025518))
00390 #define GPIO_PORTF_DEN_R        (*((reg32_t *)0x4002551C))
00391 #define GPIO_PORTF_LOCK_R       (*((reg32_t *)0x40025520))
00392 #define GPIO_PORTF_CR_R         (*((reg32_t *)0x40025524))
00393 /*\}*/
00394
00398 /*\{*/
00399 #define GPIO_PORTG_DATA_BITS_R  ((reg32_t *)0x40026000)
00400 #define GPIO_PORTG_DATA_R       (*((reg32_t *)0x400263FC))
00401 #define GPIO_PORTG_DIR_R        (*((reg32_t *)0x40026400))
00402 #define GPIO_PORTG_IS_R         (*((reg32_t *)0x40026404))
00403 #define GPIO_PORTG_IBE_R        (*((reg32_t *)0x40026408))
00404 #define GPIO_PORTG_IEV_R        (*((reg32_t *)0x4002640C))
00405 #define GPIO_PORTG_IM_R         (*((reg32_t *)0x40026410))
00406 #define GPIO_PORTG_RIS_R        (*((reg32_t *)0x40026414))
00407 #define GPIO_PORTG_MIS_R        (*((reg32_t *)0x40026418))
00408 #define GPIO_PORTG_ICR_R        (*((reg32_t *)0x4002641C))
00409 #define GPIO_PORTG_AFSEL_R      (*((reg32_t *)0x40026420))
00410 #define GPIO_PORTG_DR2R_R       (*((reg32_t *)0x40026500))
00411 #define GPIO_PORTG_DR4R_R       (*((reg32_t *)0x40026504))
00412 #define GPIO_PORTG_DR8R_R       (*((reg32_t *)0x40026508))
00413 #define GPIO_PORTG_ODR_R        (*((reg32_t *)0x4002650C))
00414 #define GPIO_PORTG_PUR_R        (*((reg32_t *)0x40026510))
00415 #define GPIO_PORTG_PDR_R        (*((reg32_t *)0x40026514))
00416 #define GPIO_PORTG_SLR_R        (*((reg32_t *)0x40026518))
00417 #define GPIO_PORTG_DEN_R        (*((reg32_t *)0x4002651C))
00418 #define GPIO_PORTG_LOCK_R       (*((reg32_t *)0x40026520))
00419 #define GPIO_PORTG_CR_R         (*((reg32_t *)0x40026524))
00420 /*\}*/
00421
00425 /*\{*/
00426 #define GPIO_PORTH_DATA_BITS_R  ((reg32_t *)0x40027000)
00427 #define GPIO_PORTH_DATA_R       (*((reg32_t *)0x400273FC))
00428 #define GPIO_PORTH_DIR_R        (*((reg32_t *)0x40027400))
00429 #define GPIO_PORTH_IS_R         (*((reg32_t *)0x40027404))
00430 #define GPIO_PORTH_IBE_R        (*((reg32_t *)0x40027408))
00431 #define GPIO_PORTH_IEV_R        (*((reg32_t *)0x4002740C))
00432 #define GPIO_PORTH_IM_R         (*((reg32_t *)0x40027410))
00433 #define GPIO_PORTH_RIS_R        (*((reg32_t *)0x40027414))
00434 #define GPIO_PORTH_MIS_R        (*((reg32_t *)0x40027418))
00435 #define GPIO_PORTH_ICR_R        (*((reg32_t *)0x4002741C))
00436 #define GPIO_PORTH_AFSEL_R      (*((reg32_t *)0x40027420))
00437 #define GPIO_PORTH_DR2R_R       (*((reg32_t *)0x40027500))
00438 #define GPIO_PORTH_DR4R_R       (*((reg32_t *)0x40027504))
00439 #define GPIO_PORTH_DR8R_R       (*((reg32_t *)0x40027508))
00440 #define GPIO_PORTH_ODR_R        (*((reg32_t *)0x4002750C))
00441 #define GPIO_PORTH_PUR_R        (*((reg32_t *)0x40027510))
00442 #define GPIO_PORTH_PDR_R        (*((reg32_t *)0x40027514))
00443 #define GPIO_PORTH_SLR_R        (*((reg32_t *)0x40027518))
00444 #define GPIO_PORTH_DEN_R        (*((reg32_t *)0x4002751C))
00445 #define GPIO_PORTH_LOCK_R       (*((reg32_t *)0x40027520))
00446 #define GPIO_PORTH_CR_R         (*((reg32_t *)0x40027524))
00447 /*\}*/
00448
00452 /*\{*/
00453 #define PWM_CTL_R               (*((reg32_t *)0x40028000))
00454 #define PWM_SYNC_R              (*((reg32_t *)0x40028004))
00455 #define PWM_ENABLE_R            (*((reg32_t *)0x40028008))
00456 #define PWM_INVERT_R            (*((reg32_t *)0x4002800C))
00457 #define PWM_FAULT_R             (*((reg32_t *)0x40028010))
00458 #define PWM_INTEN_R             (*((reg32_t *)0x40028014))
00459 #define PWM_RIS_R               (*((reg32_t *)0x40028018))
00460 #define PWM_ISC_R               (*((reg32_t *)0x4002801C))
00461 #define PWM_STATUS_R            (*((reg32_t *)0x40028020))
00462 #define PWM_0_CTL_R             (*((reg32_t *)0x40028040))
00463 #define PWM_0_INTEN_R           (*((reg32_t *)0x40028044))
00464 #define PWM_0_RIS_R             (*((reg32_t *)0x40028048))
00465 #define PWM_0_ISC_R             (*((reg32_t *)0x4002804C))
00466 #define PWM_0_LOAD_R            (*((reg32_t *)0x40028050))
00467 #define PWM_0_COUNT_R           (*((reg32_t *)0x40028054))
00468 #define PWM_0_CMPA_R            (*((reg32_t *)0x40028058))
00469 #define PWM_0_CMPB_R            (*((reg32_t *)0x4002805C))
00470 #define PWM_0_GENA_R            (*((reg32_t *)0x40028060))
00471 #define PWM_0_GENB_R            (*((reg32_t *)0x40028064))
00472 #define PWM_0_DBCTL_R           (*((reg32_t *)0x40028068))
00473 #define PWM_0_DBRISE_R          (*((reg32_t *)0x4002806C))
00474 #define PWM_0_DBFALL_R          (*((reg32_t *)0x40028070))
00475 #define PWM_1_CTL_R             (*((reg32_t *)0x40028080))
00476 #define PWM_1_INTEN_R           (*((reg32_t *)0x40028084))
00477 #define PWM_1_RIS_R             (*((reg32_t *)0x40028088))
00478 #define PWM_1_ISC_R             (*((reg32_t *)0x4002808C))
00479 #define PWM_1_LOAD_R            (*((reg32_t *)0x40028090))
00480 #define PWM_1_COUNT_R           (*((reg32_t *)0x40028094))
00481 #define PWM_1_CMPA_R            (*((reg32_t *)0x40028098))
00482 #define PWM_1_CMPB_R            (*((reg32_t *)0x4002809C))
00483 #define PWM_1_GENA_R            (*((reg32_t *)0x400280A0))
00484 #define PWM_1_GENB_R            (*((reg32_t *)0x400280A4))
00485 #define PWM_1_DBCTL_R           (*((reg32_t *)0x400280A8))
00486 #define PWM_1_DBRISE_R          (*((reg32_t *)0x400280AC))
00487 #define PWM_1_DBFALL_R          (*((reg32_t *)0x400280B0))
00488 #define PWM_2_CTL_R             (*((reg32_t *)0x400280C0))
00489 #define PWM_2_INTEN_R           (*((reg32_t *)0x400280C4))
00490 #define PWM_2_RIS_R             (*((reg32_t *)0x400280C8))
00491 #define PWM_2_ISC_R             (*((reg32_t *)0x400280CC))
00492 #define PWM_2_LOAD_R            (*((reg32_t *)0x400280D0))
00493 #define PWM_2_COUNT_R           (*((reg32_t *)0x400280D4))
00494 #define PWM_2_CMPA_R            (*((reg32_t *)0x400280D8))
00495 #define PWM_2_CMPB_R            (*((reg32_t *)0x400280DC))
00496 #define PWM_2_GENA_R            (*((reg32_t *)0x400280E0))
00497 #define PWM_2_GENB_R            (*((reg32_t *)0x400280E4))
00498 #define PWM_2_DBCTL_R           (*((reg32_t *)0x400280E8))
00499 #define PWM_2_DBRISE_R          (*((reg32_t *)0x400280EC))
00500 #define PWM_2_DBFALL_R          (*((reg32_t *)0x400280F0))
00501 /*\}*/
00502
00506 /*\{*/
00507 #define QEI0_CTL_R              (*((reg32_t *)0x4002C000))
00508 #define QEI0_STAT_R             (*((reg32_t *)0x4002C004))
00509 #define QEI0_POS_R              (*((reg32_t *)0x4002C008))
00510 #define QEI0_MAXPOS_R           (*((reg32_t *)0x4002C00C))
00511 #define QEI0_LOAD_R             (*((reg32_t *)0x4002C010))
00512 #define QEI0_TIME_R             (*((reg32_t *)0x4002C014))
00513 #define QEI0_COUNT_R            (*((reg32_t *)0x4002C018))
00514 #define QEI0_SPEED_R            (*((reg32_t *)0x4002C01C))
00515 #define QEI0_INTEN_R            (*((reg32_t *)0x4002C020))
00516 #define QEI0_RIS_R              (*((reg32_t *)0x4002C024))
00517 #define QEI0_ISC_R              (*((reg32_t *)0x4002C028))
00518 /*\}*/
00519
00523 /*\{*/
00524 #define QEI1_CTL_R              (*((reg32_t *)0x4002D000))
00525 #define QEI1_STAT_R             (*((reg32_t *)0x4002D004))
00526 #define QEI1_POS_R              (*((reg32_t *)0x4002D008))
00527 #define QEI1_MAXPOS_R           (*((reg32_t *)0x4002D00C))
00528 #define QEI1_LOAD_R             (*((reg32_t *)0x4002D010))
00529 #define QEI1_TIME_R             (*((reg32_t *)0x4002D014))
00530 #define QEI1_COUNT_R            (*((reg32_t *)0x4002D018))
00531 #define QEI1_SPEED_R            (*((reg32_t *)0x4002D01C))
00532 #define QEI1_INTEN_R            (*((reg32_t *)0x4002D020))
00533 #define QEI1_RIS_R              (*((reg32_t *)0x4002D024))
00534 #define QEI1_ISC_R              (*((reg32_t *)0x4002D028))
00535 /*\}*/
00536
00540 /*\{*/
00541 #define TIMER0_CFG_R            (*((reg32_t *)0x40030000))
00542 #define TIMER0_TAMR_R           (*((reg32_t *)0x40030004))
00543 #define TIMER0_TBMR_R           (*((reg32_t *)0x40030008))
00544 #define TIMER0_CTL_R            (*((reg32_t *)0x4003000C))
00545 #define TIMER0_IMR_R            (*((reg32_t *)0x40030018))
00546 #define TIMER0_RIS_R            (*((reg32_t *)0x4003001C))
00547 #define TIMER0_MIS_R            (*((reg32_t *)0x40030020))
00548 #define TIMER0_ICR_R            (*((reg32_t *)0x40030024))
00549 #define TIMER0_TAILR_R          (*((reg32_t *)0x40030028))
00550 #define TIMER0_TBILR_R          (*((reg32_t *)0x4003002C))
00551 #define TIMER0_TAMATCHR_R       (*((reg32_t *)0x40030030))
00552 #define TIMER0_TBMATCHR_R       (*((reg32_t *)0x40030034))
00553 #define TIMER0_TAPR_R           (*((reg32_t *)0x40030038))
00554 #define TIMER0_TBPR_R           (*((reg32_t *)0x4003003C))
00555 #define TIMER0_TAPMR_R          (*((reg32_t *)0x40030040))
00556 #define TIMER0_TBPMR_R          (*((reg32_t *)0x40030044))
00557 #define TIMER0_TAR_R            (*((reg32_t *)0x40030048))
00558 #define TIMER0_TBR_R            (*((reg32_t *)0x4003004C))
00559 /*\}*/
00560
00564 /*\{*/
00565 #define TIMER1_CFG_R            (*((reg32_t *)0x40031000))
00566 #define TIMER1_TAMR_R           (*((reg32_t *)0x40031004))
00567 #define TIMER1_TBMR_R           (*((reg32_t *)0x40031008))
00568 #define TIMER1_CTL_R            (*((reg32_t *)0x4003100C))
00569 #define TIMER1_IMR_R            (*((reg32_t *)0x40031018))
00570 #define TIMER1_RIS_R            (*((reg32_t *)0x4003101C))
00571 #define TIMER1_MIS_R            (*((reg32_t *)0x40031020))
00572 #define TIMER1_ICR_R            (*((reg32_t *)0x40031024))
00573 #define TIMER1_TAILR_R          (*((reg32_t *)0x40031028))
00574 #define TIMER1_TBILR_R          (*((reg32_t *)0x4003102C))
00575 #define TIMER1_TAMATCHR_R       (*((reg32_t *)0x40031030))
00576 #define TIMER1_TBMATCHR_R       (*((reg32_t *)0x40031034))
00577 #define TIMER1_TAPR_R           (*((reg32_t *)0x40031038))
00578 #define TIMER1_TBPR_R           (*((reg32_t *)0x4003103C))
00579 #define TIMER1_TAPMR_R          (*((reg32_t *)0x40031040))
00580 #define TIMER1_TBPMR_R          (*((reg32_t *)0x40031044))
00581 #define TIMER1_TAR_R            (*((reg32_t *)0x40031048))
00582 #define TIMER1_TBR_R            (*((reg32_t *)0x4003104C))
00583 /*\}*/
00584
00588 /*\{*/
00589 #define TIMER2_CFG_R            (*((reg32_t *)0x40032000))
00590 #define TIMER2_TAMR_R           (*((reg32_t *)0x40032004))
00591 #define TIMER2_TBMR_R           (*((reg32_t *)0x40032008))
00592 #define TIMER2_CTL_R            (*((reg32_t *)0x4003200C))
00593 #define TIMER2_IMR_R            (*((reg32_t *)0x40032018))
00594 #define TIMER2_RIS_R            (*((reg32_t *)0x4003201C))
00595 #define TIMER2_MIS_R            (*((reg32_t *)0x40032020))
00596 #define TIMER2_ICR_R            (*((reg32_t *)0x40032024))
00597 #define TIMER2_TAILR_R          (*((reg32_t *)0x40032028))
00598 #define TIMER2_TBILR_R          (*((reg32_t *)0x4003202C))
00599 #define TIMER2_TAMATCHR_R       (*((reg32_t *)0x40032030))
00600 #define TIMER2_TBMATCHR_R       (*((reg32_t *)0x40032034))
00601 #define TIMER2_TAPR_R           (*((reg32_t *)0x40032038))
00602 #define TIMER2_TBPR_R           (*((reg32_t *)0x4003203C))
00603 #define TIMER2_TAPMR_R          (*((reg32_t *)0x40032040))
00604 #define TIMER2_TBPMR_R          (*((reg32_t *)0x40032044))
00605 #define TIMER2_TAR_R            (*((reg32_t *)0x40032048))
00606 #define TIMER2_TBR_R            (*((reg32_t *)0x4003204C))
00607 /*\}*/
00608
00612 /*\{*/
00613 #define TIMER3_CFG_R            (*((reg32_t *)0x40033000))
00614 #define TIMER3_TAMR_R           (*((reg32_t *)0x40033004))
00615 #define TIMER3_TBMR_R           (*((reg32_t *)0x40033008))
00616 #define TIMER3_CTL_R            (*((reg32_t *)0x4003300C))
00617 #define TIMER3_IMR_R            (*((reg32_t *)0x40033018))
00618 #define TIMER3_RIS_R            (*((reg32_t *)0x4003301C))
00619 #define TIMER3_MIS_R            (*((reg32_t *)0x40033020))
00620 #define TIMER3_ICR_R            (*((reg32_t *)0x40033024))
00621 #define TIMER3_TAILR_R          (*((reg32_t *)0x40033028))
00622 #define TIMER3_TBILR_R          (*((reg32_t *)0x4003302C))
00623 #define TIMER3_TAMATCHR_R       (*((reg32_t *)0x40033030))
00624 #define TIMER3_TBMATCHR_R       (*((reg32_t *)0x40033034))
00625 #define TIMER3_TAPR_R           (*((reg32_t *)0x40033038))
00626 #define TIMER3_TBPR_R           (*((reg32_t *)0x4003303C))
00627 #define TIMER3_TAPMR_R          (*((reg32_t *)0x40033040))
00628 #define TIMER3_TBPMR_R          (*((reg32_t *)0x40033044))
00629 #define TIMER3_TAR_R            (*((reg32_t *)0x40033048))
00630 #define TIMER3_TBR_R            (*((reg32_t *)0x4003304C))
00631 /*\}*/
00632
00636 /*\{*/
00637 #define ADC0_ACTSS_R            (*((reg32_t *)0x40038000))
00638 #define ADC0_RIS_R              (*((reg32_t *)0x40038004))
00639 #define ADC0_IM_R               (*((reg32_t *)0x40038008))
00640 #define ADC0_ISC_R              (*((reg32_t *)0x4003800C))
00641 #define ADC0_OSTAT_R            (*((reg32_t *)0x40038010))
00642 #define ADC0_EMUX_R             (*((reg32_t *)0x40038014))
00643 #define ADC0_USTAT_R            (*((reg32_t *)0x40038018))
00644 #define ADC0_SSPRI_R            (*((reg32_t *)0x40038020))
00645 #define ADC0_PSSI_R             (*((reg32_t *)0x40038028))
00646 #define ADC0_SAC_R              (*((reg32_t *)0x40038030))
00647 #define ADC0_SSMUX0_R           (*((reg32_t *)0x40038040))
00648 #define ADC0_SSCTL0_R           (*((reg32_t *)0x40038044))
00649 #define ADC0_SSFIFO0_R          (*((reg32_t *)0x40038048))
00650 #define ADC0_SSFSTAT0_R         (*((reg32_t *)0x4003804C))
00651 #define ADC0_SSMUX1_R           (*((reg32_t *)0x40038060))
00652 #define ADC0_SSCTL1_R           (*((reg32_t *)0x40038064))
00653 #define ADC0_SSFIFO1_R          (*((reg32_t *)0x40038068))
00654 #define ADC0_SSFSTAT1_R         (*((reg32_t *)0x4003806C))
00655 #define ADC0_SSMUX2_R           (*((reg32_t *)0x40038080))
00656 #define ADC0_SSCTL2_R           (*((reg32_t *)0x40038084))
00657 #define ADC0_SSFIFO2_R          (*((reg32_t *)0x40038088))
00658 #define ADC0_SSFSTAT2_R         (*((reg32_t *)0x4003808C))
00659 #define ADC0_SSMUX3_R           (*((reg32_t *)0x400380A0))
00660 #define ADC0_SSCTL3_R           (*((reg32_t *)0x400380A4))
00661 #define ADC0_SSFIFO3_R          (*((reg32_t *)0x400380A8))
00662 #define ADC0_SSFSTAT3_R         (*((reg32_t *)0x400380AC))
00663 #define ADC0_TMLB_R             (*((reg32_t *)0x40038100))
00664 /*\}*/
00665
00669 /*\{*/
00670 #define COMP_ACMIS_R            (*((reg32_t *)0x4003C000))
00671 #define COMP_ACRIS_R            (*((reg32_t *)0x4003C004))
00672 #define COMP_ACINTEN_R          (*((reg32_t *)0x4003C008))
00673 #define COMP_ACREFCTL_R         (*((reg32_t *)0x4003C010))
00674 #define COMP_ACSTAT0_R          (*((reg32_t *)0x4003C020))
00675 #define COMP_ACCTL0_R           (*((reg32_t *)0x4003C024))
00676 #define COMP_ACSTAT1_R          (*((reg32_t *)0x4003C040))
00677 #define COMP_ACCTL1_R           (*((reg32_t *)0x4003C044))
00678 #define COMP_ACSTAT2_R          (*((reg32_t *)0x4003C060))
00679 #define COMP_ACCTL2_R           (*((reg32_t *)0x4003C064))
00680 /*\}*/
00681
00685 /*\{*/
00686 #define HIB_RTCC_R              (*((reg32_t *)0x400FC000))
00687 #define HIB_RTCM0_R             (*((reg32_t *)0x400FC004))
00688 #define HIB_RTCM1_R             (*((reg32_t *)0x400FC008))
00689 #define HIB_RTCLD_R             (*((reg32_t *)0x400FC00C))
00690 #define HIB_CTL_R               (*((reg32_t *)0x400FC010))
00691 #define HIB_IM_R                (*((reg32_t *)0x400FC014))
00692 #define HIB_RIS_R               (*((reg32_t *)0x400FC018))
00693 #define HIB_MIS_R               (*((reg32_t *)0x400FC01C))
00694 #define HIB_IC_R                (*((reg32_t *)0x400FC020))
00695 #define HIB_RTCT_R              (*((reg32_t *)0x400FC024))
00696 #define HIB_DATA_R              (*((reg32_t *)0x400FC030))
00697 /*\}*/
00698
00702 /*\{*/
00703 #define FLASH_FMA_R             (*((reg32_t *)0x400FD000))
00704 #define FLASH_FMD_R             (*((reg32_t *)0x400FD004))
00705 #define FLASH_FMC_R             (*((reg32_t *)0x400FD008))
00706 #define FLASH_FCRIS_R           (*((reg32_t *)0x400FD00C))
00707 #define FLASH_FCIM_R            (*((reg32_t *)0x400FD010))
00708 #define FLASH_FCMISC_R          (*((reg32_t *)0x400FD014))
00709 #define FLASH_USECRL_R          (*((reg32_t *)0x400FE140))
00710 #define FLASH_USERDBG_R         (*((reg32_t *)0x400FE1D0))
00711 #define FLASH_USERREG0_R        (*((reg32_t *)0x400FE1E0))
00712 #define FLASH_USERREG1_R        (*((reg32_t *)0x400FE1E4))
00713 #define FLASH_FMPRE0_R          (*((reg32_t *)0x400FE200))
00714 #define FLASH_FMPRE1_R          (*((reg32_t *)0x400FE204))
00715 #define FLASH_FMPRE2_R          (*((reg32_t *)0x400FE208))
00716 #define FLASH_FMPRE3_R          (*((reg32_t *)0x400FE20C))
00717 #define FLASH_FMPPE0_R          (*((reg32_t *)0x400FE400))
00718 #define FLASH_FMPPE1_R          (*((reg32_t *)0x400FE404))
00719 #define FLASH_FMPPE2_R          (*((reg32_t *)0x400FE408))
00720 #define FLASH_FMPPE3_R          (*((reg32_t *)0x400FE40C))
00721 /*\}*/
00722
00726 /*\{*/
00727 #define SYSCTL_DID0_R           (*((reg32_t *)0x400FE000))
00728 #define SYSCTL_DID1_R           (*((reg32_t *)0x400FE004))
00729 #define SYSCTL_DC0_R            (*((reg32_t *)0x400FE008))
00730 #define SYSCTL_DC1_R            (*((reg32_t *)0x400FE010))
00731 #define SYSCTL_DC2_R            (*((reg32_t *)0x400FE014))
00732 #define SYSCTL_DC3_R            (*((reg32_t *)0x400FE018))
00733 #define SYSCTL_DC4_R            (*((reg32_t *)0x400FE01C))
00734 #define SYSCTL_PBORCTL_R        (*((reg32_t *)0x400FE030))
00735 #define SYSCTL_LDOPCTL_R        (*((reg32_t *)0x400FE034))
00736 #define SYSCTL_SRCR0_R          (*((reg32_t *)0x400FE040))
00737 #define SYSCTL_SRCR1_R          (*((reg32_t *)0x400FE044))
00738 #define SYSCTL_SRCR2_R          (*((reg32_t *)0x400FE048))
00739 #define SYSCTL_RIS_R            (*((reg32_t *)0x400FE050))
00740 #define SYSCTL_IMC_R            (*((reg32_t *)0x400FE054))
00741 #define SYSCTL_MISC_R           (*((reg32_t *)0x400FE058))
00742 #define SYSCTL_RESC_R           (*((reg32_t *)0x400FE05C))
00743 #define SYSCTL_RCC_R            (*((reg32_t *)0x400FE060))
00744 #define SYSCTL_PLLCFG_R         (*((reg32_t *)0x400FE064))
00745 #define SYSCTL_RCC2_R           (*((reg32_t *)0x400FE070))
00746 #define SYSCTL_RCGC0_R          (*((reg32_t *)0x400FE100))
00747 #define SYSCTL_RCGC1_R          (*((reg32_t *)0x400FE104))
00748 #define SYSCTL_RCGC2_R          (*((reg32_t *)0x400FE108))
00749 #define SYSCTL_SCGC0_R          (*((reg32_t *)0x400FE110))
00750 #define SYSCTL_SCGC1_R          (*((reg32_t *)0x400FE114))
00751 #define SYSCTL_SCGC2_R          (*((reg32_t *)0x400FE118))
00752 #define SYSCTL_DCGC0_R          (*((reg32_t *)0x400FE120))
00753 #define SYSCTL_DCGC1_R          (*((reg32_t *)0x400FE124))
00754 #define SYSCTL_DCGC2_R          (*((reg32_t *)0x400FE128))
00755 #define SYSCTL_DSLPCLKCFG_R     (*((reg32_t *)0x400FE144))
00756 /*\}*/
00757
00761 /*\{*/
00762 #define NVIC_INT_TYPE_R         (*((reg32_t *)0xE000E004))
00763 #define NVIC_ST_CTRL_R          (*((reg32_t *)0xE000E010))
00764 #define NVIC_ST_RELOAD_R        (*((reg32_t *)0xE000E014))
00765 #define NVIC_ST_CURRENT_R       (*((reg32_t *)0xE000E018))
00766 #define NVIC_ST_CAL_R           (*((reg32_t *)0xE000E01C))
00767 #define NVIC_EN0_R              (*((reg32_t *)0xE000E100))
00768 #define NVIC_EN1_R              (*((reg32_t *)0xE000E104))
00769 #define NVIC_DIS0_R             (*((reg32_t *)0xE000E180))
00770 #define NVIC_DIS1_R             (*((reg32_t *)0xE000E184))
00771 #define NVIC_PEND0_R            (*((reg32_t *)0xE000E200))
00772 #define NVIC_PEND1_R            (*((reg32_t *)0xE000E204))
00773 #define NVIC_UNPEND0_R          (*((reg32_t *)0xE000E280))
00774 #define NVIC_UNPEND1_R          (*((reg32_t *)0xE000E284))
00775 #define NVIC_ACTIVE0_R          (*((reg32_t *)0xE000E300))
00776 #define NVIC_ACTIVE1_R          (*((reg32_t *)0xE000E304))
00777 #define NVIC_PRI0_R             (*((reg32_t *)0xE000E400))
00778 #define NVIC_PRI1_R             (*((reg32_t *)0xE000E404))
00779 #define NVIC_PRI2_R             (*((reg32_t *)0xE000E408))
00780 #define NVIC_PRI3_R             (*((reg32_t *)0xE000E40C))
00781 #define NVIC_PRI4_R             (*((reg32_t *)0xE000E410))
00782 #define NVIC_PRI5_R             (*((reg32_t *)0xE000E414))
00783 #define NVIC_PRI6_R             (*((reg32_t *)0xE000E418))
00784 #define NVIC_PRI7_R             (*((reg32_t *)0xE000E41C))
00785 #define NVIC_PRI8_R             (*((reg32_t *)0xE000E420))
00786 #define NVIC_PRI9_R             (*((reg32_t *)0xE000E424))
00787 #define NVIC_PRI10_R            (*((reg32_t *)0xE000E428))
00788 #define NVIC_CPUID_R            (*((reg32_t *)0xE000ED00))
00789 #define NVIC_INT_CTRL_R         (*((reg32_t *)0xE000ED04))
00790 #define NVIC_VTABLE_R           (*((reg32_t *)0xE000ED08))
00791 #define NVIC_APINT_R            (*((reg32_t *)0xE000ED0C))
00792 #define NVIC_SYS_CTRL_R         (*((reg32_t *)0xE000ED10))
00793 #define NVIC_CFG_CTRL_R         (*((reg32_t *)0xE000ED14))
00794 #define NVIC_SYS_PRI1_R         (*((reg32_t *)0xE000ED18))
00795 #define NVIC_SYS_PRI2_R         (*((reg32_t *)0xE000ED1C))
00796 #define NVIC_SYS_PRI3_R         (*((reg32_t *)0xE000ED20))
00797 #define NVIC_SYS_HND_CTRL_R     (*((reg32_t *)0xE000ED24))
00798 #define NVIC_FAULT_STAT_R       (*((reg32_t *)0xE000ED28))
00799 #define NVIC_HFAULT_STAT_R      (*((reg32_t *)0xE000ED2C))
00800 #define NVIC_DEBUG_STAT_R       (*((reg32_t *)0xE000ED30))
00801 #define NVIC_MM_ADDR_R          (*((reg32_t *)0xE000ED34))
00802 #define NVIC_FAULT_ADDR_R       (*((reg32_t *)0xE000ED38))
00803 #define NVIC_MPU_TYPE_R         (*((reg32_t *)0xE000ED90))
00804 #define NVIC_MPU_CTRL_R         (*((reg32_t *)0xE000ED94))
00805 #define NVIC_MPU_NUMBER_R       (*((reg32_t *)0xE000ED98))
00806 #define NVIC_MPU_BASE_R         (*((reg32_t *)0xE000ED9C))
00807 #define NVIC_MPU_ATTR_R         (*((reg32_t *)0xE000EDA0))
00808 #define NVIC_DBG_CTRL_R         (*((reg32_t *)0xE000EDF0))
00809 #define NVIC_DBG_XFER_R         (*((reg32_t *)0xE000EDF4))
00810 #define NVIC_DBG_DATA_R         (*((reg32_t *)0xE000EDF8))
00811 #define NVIC_DBG_INT_R          (*((reg32_t *)0xE000EDFC))
00812 #define NVIC_SW_TRIG_R          (*((reg32_t *)0xE000EF00))
00813 /*\}*/
00814
00818 /*\{*/
00819 #define WDT_LOAD_M              0xFFFFFFFF  ///< Watchdog Load Value
00820 #define WDT_LOAD_S              0
00821 /*\}*/
00822
00826 /*\{*/
00827 #define WDT_VALUE_M             0xFFFFFFFF  ///< Watchdog Value
00828 #define WDT_VALUE_S             0
00829 /*\}*/
00830
00834 /*\{*/
00835 #define WDT_CTL_RESEN           0x00000002  ///< Watchdog Reset Enable
00836 #define WDT_CTL_INTEN           0x00000001  ///< Watchdog Interrupt Enable
00837 /*\}*/
00838
00842 /*\{*/
00843 #define WDT_ICR_M               0xFFFFFFFF  ///< Watchdog Interrupt Clear
00844 #define WDT_ICR_S               0
00845 /*\}*/
00846
00850 /*\{*/
00851 #define WDT_RIS_WDTRIS          0x00000001  ///< Watchdog Raw Interrupt Status
00852 /*\}*/
00853
00857 /*\{*/
00858 #define WDT_MIS_WDTMIS          0x00000001  ///< Watchdog Masked Interrupt Status
00859 /*\}*/
00860
00864 /*\{*/
00865 #define WDT_TEST_STALL          0x00000100  ///< Watchdog Stall Enable
00866 /*\}*/
00867
00871 /*\{*/
00872 #define WDT_LOCK_M              0xFFFFFFFF  ///< Watchdog Lock
00873 #define WDT_LOCK_UNLOCKED       0x00000000  ///< Unlocked
00874 #define WDT_LOCK_LOCKED         0x00000001  ///< Locked
00875 #define WDT_LOCK_UNLOCK         0x1ACCE551  ///< Unlocks the watchdog timer
00876 /*\}*/
00877
00881 /*\{*/
00882 #define GPIO_LOCK_M             0xFFFFFFFF  ///< GPIO Lock
00883 #define GPIO_LOCK_UNLOCKED      0x00000000  ///< The GPIOCR register is unlocked
00884
00885 #define GPIO_LOCK_LOCKED        0x00000001  ///< The GPIOCR register is locked
00886
00887 #define GPIO_LOCK_KEY           0x1ACCE551  ///< Unlocks the GPIO_CR register
00888 /*\}*/
00889
00893 /*\{*/
00894 #define SSI_CR0_SCR_M           0x0000FF00  ///< SSI Serial Clock Rate
00895 #define SSI_CR0_SPH             0x00000080  ///< SSI Serial Clock Phase
00896 #define SSI_CR0_SPO             0x00000040  ///< SSI Serial Clock Polarity
00897 #define SSI_CR0_FRF_M           0x00000030  ///< SSI Frame Format Select
00898 #define SSI_CR0_FRF_MOTO        0x00000000  ///< Freescale SPI Frame Format
00899 #define SSI_CR0_FRF_TI          0x00000010  ///< Texas Instruments Synchronous
00900
00901 #define SSI_CR0_FRF_NMW         0x00000020  ///< MICROWIRE Frame Format
00902 #define SSI_CR0_DSS_M           0x0000000F  ///< SSI Data Size Select
00903 #define SSI_CR0_DSS_4           0x00000003  ///< 4-bit data
00904 #define SSI_CR0_DSS_5           0x00000004  ///< 5-bit data
00905 #define SSI_CR0_DSS_6           0x00000005  ///< 6-bit data
00906 #define SSI_CR0_DSS_7           0x00000006  ///< 7-bit data
00907 #define SSI_CR0_DSS_8           0x00000007  ///< 8-bit data
00908 #define SSI_CR0_DSS_9           0x00000008  ///< 9-bit data
00909 #define SSI_CR0_DSS_10          0x00000009  ///< 10-bit data
00910 #define SSI_CR0_DSS_11          0x0000000A  ///< 11-bit data
00911 #define SSI_CR0_DSS_12          0x0000000B  ///< 12-bit data
00912 #define SSI_CR0_DSS_13          0x0000000C  ///< 13-bit data
00913 #define SSI_CR0_DSS_14          0x0000000D  ///< 14-bit data
00914 #define SSI_CR0_DSS_15          0x0000000E  ///< 15-bit data
00915 #define SSI_CR0_DSS_16          0x0000000F  ///< 16-bit data
00916 #define SSI_CR0_SCR_S           8
00917 /*\}*/
00918
00922 /*\{*/
00923 #define SSI_CR1_SOD             0x00000008  ///< SSI Slave Mode Output Disable
00924 #define SSI_CR1_MS              0x00000004  ///< SSI Master/Slave Select
00925 #define SSI_CR1_SSE             0x00000002  ///< SSI Synchronous Serial Port
00926
00927 #define SSI_CR1_LBM             0x00000001  ///< SSI Loopback Mode
00928 /*\}*/
00929
00933 /*\{*/
00934 #define SSI_DR_DATA_M           0x0000FFFF  ///< SSI Receive/Transmit Data
00935 #define SSI_DR_DATA_S           0
00936 /*\}*/
00937
00941 /*\{*/
00942 #define SSI_SR_BSY              0x00000010  ///< SSI Busy Bit
00943 #define SSI_SR_RFF              0x00000008  ///< SSI Receive FIFO Full
00944 #define SSI_SR_RNE              0x00000004  ///< SSI Receive FIFO Not Empty
00945 #define SSI_SR_TNF              0x00000002  ///< SSI Transmit FIFO Not Full
00946 #define SSI_SR_TFE              0x00000001  ///< SSI Transmit FIFO Empty
00947 /*\}*/
00948
00952 /*\{*/
00953 #define SSI_CPSR_CPSDVSR_M      0x000000FF  ///< SSI Clock Prescale Divisor
00954 #define SSI_CPSR_CPSDVSR_S      0
00955 /*\}*/
00956
00960 /*\{*/
00961 #define SSI_IM_TXIM             0x00000008  ///< SSI Transmit FIFO Interrupt Mask
00962 #define SSI_IM_RXIM             0x00000004  ///< SSI Receive FIFO Interrupt Mask
00963 #define SSI_IM_RTIM             0x00000002  ///< SSI Receive Time-Out Interrupt
00964
00965 #define SSI_IM_RORIM            0x00000001  ///< SSI Receive Overrun Interrupt
00966
00967 /*\}*/
00968
00972 /*\{*/
00973 #define SSI_RIS_TXRIS           0x00000008  ///< SSI Transmit FIFO Raw Interrupt
00974
00975 #define SSI_RIS_RXRIS           0x00000004  ///< SSI Receive FIFO Raw Interrupt
00976
00977 #define SSI_RIS_RTRIS           0x00000002  ///< SSI Receive Time-Out Raw
00978
00979 #define SSI_RIS_RORRIS          0x00000001  ///< SSI Receive Overrun Raw
00980
00981 /*\}*/
00982
00986 /*\{*/
00987 #define SSI_MIS_TXMIS           0x00000008  ///< SSI Transmit FIFO Masked
00988
00989 #define SSI_MIS_RXMIS           0x00000004  ///< SSI Receive FIFO Masked
00990
00991 #define SSI_MIS_RTMIS           0x00000002  ///< SSI Receive Time-Out Masked
00992
00993 #define SSI_MIS_RORMIS          0x00000001  ///< SSI Receive Overrun Masked
00994
00995 /*\}*/
00996
01000 /*\{*/
01001 #define SSI_ICR_RTIC            0x00000002  ///< SSI Receive Time-Out Interrupt
01002
01003 #define SSI_ICR_RORIC           0x00000001  ///< SSI Receive Overrun Interrupt
01004
01005 /*\}*/
01006
01010 /*\{*/
01011 #define UART_DR_OE              0x00000800  ///< UART Overrun Error
01012 #define UART_DR_BE              0x00000400  ///< UART Break Error
01013 #define UART_DR_PE              0x00000200  ///< UART Parity Error
01014 #define UART_DR_FE              0x00000100  ///< UART Framing Error
01015 #define UART_DR_DATA_M          0x000000FF  ///< Data Transmitted or Received
01016 #define UART_DR_DATA_S          0
01017 /*\}*/
01018
01022 /*\{*/
01023 #define UART_RSR_OE             0x00000008  ///< UART Overrun Error
01024 #define UART_RSR_BE             0x00000004  ///< UART Break Error
01025 #define UART_RSR_PE             0x00000002  ///< UART Parity Error
01026 #define UART_RSR_FE             0x00000001  ///< UART Framing Error
01027 /*\}*/
01028
01032 /*\{*/
01033 #define UART_ECR_DATA_M         0x000000FF  ///< Error Clear
01034 #define UART_ECR_DATA_S         0
01035 /*\}*/
01036
01040 /*\{*/
01041 #define UART_FR_TXFE            0x00000080  ///< UART Transmit FIFO Empty
01042 #define UART_FR_RXFF            0x00000040  ///< UART Receive FIFO Full
01043 #define UART_FR_TXFF            0x00000020  ///< UART Transmit FIFO Full
01044 #define UART_FR_RXFE            0x00000010  ///< UART Receive FIFO Empty
01045 #define UART_FR_BUSY            0x00000008  ///< UART Busy
01046 /*\}*/
01047
01051 /*\{*/
01052 #define UART_ILPR_ILPDVSR_M     0x000000FF  ///< IrDA Low-Power Divisor
01053 #define UART_ILPR_ILPDVSR_S     0
01054 /*\}*/
01055
01059 /*\{*/
01060 #define UART_IBRD_DIVINT_M      0x0000FFFF  ///< Integer Baud-Rate Divisor
01061 #define UART_IBRD_DIVINT_S      0
01062 /*\}*/
01063
01067 /*\{*/
01068 #define UART_FBRD_DIVFRAC_M     0x0000003F  ///< Fractional Baud-Rate Divisor
01069 #define UART_FBRD_DIVFRAC_S     0
01070 /*\}*/
01071
01075 /*\{*/
01076 #define UART_LCRH_SPS           0x00000080  ///< UART Stick Parity Select
01077 #define UART_LCRH_WLEN_M        0x00000060  ///< UART Word Length
01078 #define UART_LCRH_WLEN_5        0x00000000  ///< 5 bits (default)
01079 #define UART_LCRH_WLEN_6        0x00000020  ///< 6 bits
01080 #define UART_LCRH_WLEN_7        0x00000040  ///< 7 bits
01081 #define UART_LCRH_WLEN_8        0x00000060  ///< 8 bits
01082 #define UART_LCRH_FEN           0x00000010  ///< UART Enable FIFOs
01083 #define UART_LCRH_STP2          0x00000008  ///< UART Two Stop Bits Select
01084 #define UART_LCRH_EPS           0x00000004  ///< UART Even Parity Select
01085 #define UART_LCRH_PEN           0x00000002  ///< UART Parity Enable
01086 #define UART_LCRH_BRK           0x00000001  ///< UART Send Break
01087 /*\}*/
01088
01092 /*\{*/
01093 #define UART_CTL_RXE            0x00000200  ///< UART Receive Enable
01094 #define UART_CTL_TXE            0x00000100  ///< UART Transmit Enable
01095 #define UART_CTL_LBE            0x00000080  ///< UART Loop Back Enable
01096 #define UART_CTL_SIRLP          0x00000004  ///< UART SIR Low-Power Mode
01097 #define UART_CTL_SIREN          0x00000002  ///< UART SIR Enable
01098 #define UART_CTL_UARTEN         0x00000001  ///< UART Enable
01099 /*\}*/
01100
01104 /*\{*/
01105 #define UART_IFLS_RX_M          0x00000038  ///< UART Receive Interrupt FIFO
01106
01107 #define UART_IFLS_RX1_8         0x00000000  ///< RX FIFO >= 1/8 full
01108 #define UART_IFLS_RX2_8         0x00000008  ///< RX FIFO >= 1/4 full
01109 #define UART_IFLS_RX4_8         0x00000010  ///< RX FIFO >= 1/2 full (default)
01110 #define UART_IFLS_RX6_8         0x00000018  ///< RX FIFO >= 3/4 full
01111 #define UART_IFLS_RX7_8         0x00000020  ///< RX FIFO >= 7/8 full
01112 #define UART_IFLS_TX_M          0x00000007  ///< UART Transmit Interrupt FIFO
01113
01114 #define UART_IFLS_TX1_8         0x00000000  ///< TX FIFO <= 1/8 full
01115 #define UART_IFLS_TX2_8         0x00000001  ///< TX FIFO <= 1/4 full
01116 #define UART_IFLS_TX4_8         0x00000002  ///< TX FIFO <= 1/2 full (default)
01117 #define UART_IFLS_TX6_8         0x00000003  ///< TX FIFO <= 3/4 full
01118 #define UART_IFLS_TX7_8         0x00000004  ///< TX FIFO <= 7/8 full
01119 /*\}*/
01120
01124 /*\{*/
01125 #define UART_IM_OEIM            0x00000400  ///< UART Overrun Error Interrupt
01126
01127 #define UART_IM_BEIM            0x00000200  ///< UART Break Error Interrupt Mask
01128 #define UART_IM_PEIM            0x00000100  ///< UART Parity Error Interrupt Mask
01129 #define UART_IM_FEIM            0x00000080  ///< UART Framing Error Interrupt
01130
01131 #define UART_IM_RTIM            0x00000040  ///< UART Receive Time-Out Interrupt
01132
01133 #define UART_IM_TXIM            0x00000020  ///< UART Transmit Interrupt Mask
01134 #define UART_IM_RXIM            0x00000010  ///< UART Receive Interrupt Mask
01135 /*\}*/
01136
01140 /*\{*/
01141 #define UART_RIS_OERIS          0x00000400  ///< UART Overrun Error Raw Interrupt
01142
01143 #define UART_RIS_BERIS          0x00000200  ///< UART Break Error Raw Interrupt
01144
01145 #define UART_RIS_PERIS          0x00000100  ///< UART Parity Error Raw Interrupt
01146
01147 #define UART_RIS_FERIS          0x00000080  ///< UART Framing Error Raw Interrupt
01148
01149 #define UART_RIS_RTRIS          0x00000040  ///< UART Receive Time-Out Raw
01150
01151 #define UART_RIS_TXRIS          0x00000020  ///< UART Transmit Raw Interrupt
01152
01153 #define UART_RIS_RXRIS          0x00000010  ///< UART Receive Raw Interrupt
01154
01155 /*\}*/
01156
01160 /*\{*/
01161 #define UART_MIS_OEMIS          0x00000400  ///< UART Overrun Error Masked
01162
01163 #define UART_MIS_BEMIS          0x00000200  ///< UART Break Error Masked
01164
01165 #define UART_MIS_PEMIS          0x00000100  ///< UART Parity Error Masked
01166
01167 #define UART_MIS_FEMIS          0x00000080  ///< UART Framing Error Masked
01168
01169 #define UART_MIS_RTMIS          0x00000040  ///< UART Receive Time-Out Masked
01170
01171 #define UART_MIS_TXMIS          0x00000020  ///< UART Transmit Masked Interrupt
01172
01173 #define UART_MIS_RXMIS          0x00000010  ///< UART Receive Masked Interrupt
01174
01175 /*\}*/
01176
01180 /*\{*/
01181 #define UART_ICR_OEIC           0x00000400  ///< Overrun Error Interrupt Clear
01182 #define UART_ICR_BEIC           0x00000200  ///< Break Error Interrupt Clear
01183 #define UART_ICR_PEIC           0x00000100  ///< Parity Error Interrupt Clear
01184 #define UART_ICR_FEIC           0x00000080  ///< Framing Error Interrupt Clear
01185 #define UART_ICR_RTIC           0x00000040  ///< Receive Time-Out Interrupt Clear
01186 #define UART_ICR_TXIC           0x00000020  ///< Transmit Interrupt Clear
01187 #define UART_ICR_RXIC           0x00000010  ///< Receive Interrupt Clear
01188 /*\}*/
01189
01193 /*\{*/
01194 #define I2C_MSA_SA_M            0x000000FE  ///< I2C Slave Address
01195 #define I2C_MSA_RS              0x00000001  ///< Receive not send
01196 #define I2C_MSA_SA_S            1
01197 /*\}*/
01198
01202 /*\{*/
01203 #define I2C_SOAR_OAR_M          0x0000007F  ///< I2C Slave Own Address
01204 #define I2C_SOAR_OAR_S          0
01205 /*\}*/
01206
01210 /*\{*/
01211 #define I2C_SCSR_FBR            0x00000004  ///< First Byte Received
01212 #define I2C_SCSR_TREQ           0x00000002  ///< Transmit Request
01213 #define I2C_SCSR_DA             0x00000001  ///< Device Active
01214 #define I2C_SCSR_RREQ           0x00000001  ///< Receive Request
01215 /*\}*/
01216
01220 /*\{*/
01221 #define I2C_MCS_BUSBSY          0x00000040  ///< Bus Busy
01222 #define I2C_MCS_IDLE            0x00000020  ///< I2C Idle
01223 #define I2C_MCS_ARBLST          0x00000010  ///< Arbitration Lost
01224 #define I2C_MCS_ACK             0x00000008  ///< Data Acknowledge Enable
01225 #define I2C_MCS_DATACK          0x00000008  ///< Acknowledge Data
01226 #define I2C_MCS_ADRACK          0x00000004  ///< Acknowledge Address
01227 #define I2C_MCS_STOP            0x00000004  ///< Generate STOP
01228 #define I2C_MCS_START           0x00000002  ///< Generate START
01229 #define I2C_MCS_ERROR           0x00000002  ///< Error
01230 #define I2C_MCS_RUN             0x00000001  ///< I2C Master Enable
01231 #define I2C_MCS_BUSY            0x00000001  ///< I2C Busy
01232 /*\}*/
01233
01237 /*\{*/
01238 #define I2C_SDR_DATA_M          0x000000FF  ///< Data for Transfer
01239 #define I2C_SDR_DATA_S          0
01240 /*\}*/
01241
01245 /*\{*/
01246 #define I2C_MDR_DATA_M          0x000000FF  ///< Data Transferred
01247 #define I2C_MDR_DATA_S          0
01248 /*\}*/
01249
01253 /*\{*/
01254 #define I2C_MTPR_TPR_M          0x000000FF  ///< SCL Clock Period
01255 #define I2C_MTPR_TPR_S          0
01256 /*\}*/
01257
01261 /*\{*/
01262 #define I2C_SIMR_DATAIM         0x00000001  ///< Data Interrupt Mask
01263 /*\}*/
01264
01268 /*\{*/
01269 #define I2C_SRIS_DATARIS        0x00000001  ///< Data Raw Interrupt Status
01270 /*\}*/
01271
01275 /*\{*/
01276 #define I2C_MIMR_IM             0x00000001  ///< Interrupt Mask
01277 /*\}*/
01278
01282 /*\{*/
01283 #define I2C_MRIS_RIS            0x00000001  ///< Raw Interrupt Status
01284 /*\}*/
01285
01289 /*\{*/
01290 #define I2C_SMIS_DATAMIS        0x00000001  ///< Data Masked Interrupt Status
01291 /*\}*/
01292
01296 /*\{*/
01297 #define I2C_SICR_DATAIC         0x00000001  ///< Data Interrupt Clear
01298 /*\}*/
01299
01303 /*\{*/
01304 #define I2C_MMIS_MIS            0x00000001  ///< Masked Interrupt Status
01305 /*\}*/
01306
01310 /*\{*/
01311 #define I2C_MICR_IC             0x00000001  ///< Interrupt Clear
01312 /*\}*/
01313
01317 /*\{*/
01318 #define I2C_MCR_SFE             0x00000020  ///< I2C Slave Function Enable
01319 #define I2C_MCR_MFE             0x00000010  ///< I2C Master Function Enable
01320 #define I2C_MCR_LPBK            0x00000001  ///< I2C Loopback
01321 /*\}*/
01322
01326 /*\{*/
01327 #define PWM_CTL_GLOBALSYNC2     0x00000004  ///< Update PWM Generator 2
01328 #define PWM_CTL_GLOBALSYNC1     0x00000002  ///< Update PWM Generator 1
01329 #define PWM_CTL_GLOBALSYNC0     0x00000001  ///< Update PWM Generator 0
01330 /*\}*/
01331
01335 /*\{*/
01336 #define PWM_SYNC_SYNC2          0x00000004  ///< Reset Generator 2 Counter
01337 #define PWM_SYNC_SYNC1          0x00000002  ///< Reset Generator 1 Counter
01338 #define PWM_SYNC_SYNC0          0x00000001  ///< Reset Generator 0 Counter
01339 /*\}*/
01340
01344 /*\{*/
01345 #define PWM_ENABLE_PWM5EN       0x00000020  ///< PWM5 Output Enable
01346 #define PWM_ENABLE_PWM4EN       0x00000010  ///< PWM4 Output Enable
01347 #define PWM_ENABLE_PWM3EN       0x00000008  ///< PWM3 Output Enable
01348 #define PWM_ENABLE_PWM2EN       0x00000004  ///< PWM2 Output Enable
01349 #define PWM_ENABLE_PWM1EN       0x00000002  ///< PWM1 Output Enable
01350 #define PWM_ENABLE_PWM0EN       0x00000001  ///< PWM0 Output Enable
01351 /*\}*/
01352
01356 /*\{*/
01357 #define PWM_INVERT_PWM5INV      0x00000020  ///< Invert PWM5 Signal
01358 #define PWM_INVERT_PWM4INV      0x00000010  ///< Invert PWM4 Signal
01359 #define PWM_INVERT_PWM3INV      0x00000008  ///< Invert PWM3 Signal
01360 #define PWM_INVERT_PWM2INV      0x00000004  ///< Invert PWM2 Signal
01361 #define PWM_INVERT_PWM1INV      0x00000002  ///< Invert PWM1 Signal
01362 #define PWM_INVERT_PWM0INV      0x00000001  ///< Invert PWM0 Signal
01363 /*\}*/
01364
01368 /*\{*/
01369 #define PWM_FAULT_FAULT5        0x00000020  ///< PWM5 Fault
01370 #define PWM_FAULT_FAULT4        0x00000010  ///< PWM4 Fault
01371 #define PWM_FAULT_FAULT3        0x00000008  ///< PWM3 Fault
01372 #define PWM_FAULT_FAULT2        0x00000004  ///< PWM2 Fault
01373 #define PWM_FAULT_FAULT1        0x00000002  ///< PWM1 Fault
01374 #define PWM_FAULT_FAULT0        0x00000001  ///< PWM0 Fault
01375 /*\}*/
01376
01380 /*\{*/
01381 #define PWM_INTEN_INTFAULT      0x00010000  ///< Fault Interrupt Enable
01382 #define PWM_INTEN_INTPWM2       0x00000004  ///< PWM2 Interrupt Enable
01383 #define PWM_INTEN_INTPWM1       0x00000002  ///< PWM1 Interrupt Enable
01384 #define PWM_INTEN_INTPWM0       0x00000001  ///< PWM0 Interrupt Enable
01385 /*\}*/
01386
01390 /*\{*/
01391 #define PWM_RIS_INTFAULT        0x00010000  ///< Fault Interrupt Asserted
01392 #define PWM_RIS_INTPWM2         0x00000004  ///< PWM2 Interrupt Asserted
01393 #define PWM_RIS_INTPWM1         0x00000002  ///< PWM1 Interrupt Asserted
01394 #define PWM_RIS_INTPWM0         0x00000001  ///< PWM0 Interrupt Asserted
01395 /*\}*/
01396
01400 /*\{*/
01401 #define PWM_ISC_INTFAULT        0x00010000  ///< Fault Interrupt Asserted
01402 #define PWM_ISC_INTPWM2         0x00000004  ///< PWM2 Interrupt Status
01403 #define PWM_ISC_INTPWM1         0x00000002  ///< PWM1 Interrupt Status
01404 #define PWM_ISC_INTPWM0         0x00000001  ///< PWM0 Interrupt Status
01405 /*\}*/
01406
01410 /*\{*/
01411 #define PWM_STATUS_FAULT        0x00000001  ///< Fault Interrupt Status
01412 /*\}*/
01413
01417 /*\{*/
01418 #define PWM_X_CTL_CMPBUPD       0x00000020  ///< Comparator B Update Mode
01419 #define PWM_X_CTL_CMPAUPD       0x00000010  ///< Comparator A Update Mode
01420 #define PWM_X_CTL_LOADUPD       0x00000008  ///< Load Register Update Mode
01421 #define PWM_X_CTL_DEBUG         0x00000004  ///< Debug Mode
01422 #define PWM_X_CTL_MODE          0x00000002  ///< Counter Mode
01423 #define PWM_X_CTL_ENABLE        0x00000001  ///< PWM Block Enable
01424 /*\}*/
01425
01429 /*\{*/
01430 #define PWM_X_INTEN_TRCMPBD     0x00002000  ///< Trigger for Counter=PWMnCMPB
01431
01432 #define PWM_X_INTEN_TRCMPBU     0x00001000  ///< Trigger for Counter=PWMnCMPB Up
01433 #define PWM_X_INTEN_TRCMPAD     0x00000800  ///< Trigger for Counter=PWMnCMPA
01434
01435 #define PWM_X_INTEN_TRCMPAU     0x00000400  ///< Trigger for Counter=PWMnCMPA Up
01436 #define PWM_X_INTEN_TRCNTLOAD   0x00000200  ///< Trigger for Counter=PWMnLOAD
01437 #define PWM_X_INTEN_TRCNTZERO   0x00000100  ///< Trigger for Counter=0
01438 #define PWM_X_INTEN_INTCMPBD    0x00000020  ///< Interrupt for Counter=PWMnCMPB
01439
01440 #define PWM_X_INTEN_INTCMPBU    0x00000010  ///< Interrupt for Counter=PWMnCMPB
01441
01442 #define PWM_X_INTEN_INTCMPAD    0x00000008  ///< Interrupt for Counter=PWMnCMPA
01443
01444 #define PWM_X_INTEN_INTCMPAU    0x00000004  ///< Interrupt for Counter=PWMnCMPA
01445
01446 #define PWM_X_INTEN_INTCNTLOAD  0x00000002  ///< Interrupt for Counter=PWMnLOAD
01447 #define PWM_X_INTEN_INTCNTZERO  0x00000001  ///< Interrupt for Counter=0
01448 /*\}*/
01449
01453 /*\{*/
01454 #define PWM_X_RIS_INTCMPBD      0x00000020  ///< Comparator B Down Interrupt
01455
01456 #define PWM_X_RIS_INTCMPBU      0x00000010  ///< Comparator B Up Interrupt Status
01457 #define PWM_X_RIS_INTCMPAD      0x00000008  ///< Comparator A Down Interrupt
01458
01459 #define PWM_X_RIS_INTCMPAU      0x00000004  ///< Comparator A Up Interrupt Status
01460 #define PWM_X_RIS_INTCNTLOAD    0x00000002  ///< Counter=Load Interrupt Status
01461 #define PWM_X_RIS_INTCNTZERO    0x00000001  ///< Counter=0 Interrupt Status
01462 /*\}*/
01463
01467 /*\{*/
01468 #define PWM_X_ISC_INTCMPBD      0x00000020  ///< Comparator B Down Interrupt
01469 #define PWM_X_ISC_INTCMPBU      0x00000010  ///< Comparator B Up Interrupt
01470 #define PWM_X_ISC_INTCMPAD      0x00000008  ///< Comparator A Down Interrupt
01471 #define PWM_X_ISC_INTCMPAU      0x00000004  ///< Comparator A Up Interrupt
01472 #define PWM_X_ISC_INTCNTLOAD    0x00000002  ///< Counter=Load Interrupt
01473 #define PWM_X_ISC_INTCNTZERO    0x00000001  ///< Counter=0 Interrupt
01474 /*\}*/
01475
01479 /*\{*/
01480 #define PWM_X_LOAD_M            0x0000FFFF  ///< Counter Load Value
01481 #define PWM_X_LOAD_S            0
01482 /*\}*/
01483
01487 /*\{*/
01488 #define PWM_X_COUNT_M           0x0000FFFF  ///< Counter Value
01489 #define PWM_X_COUNT_S           0
01490 /*\}*/
01491
01495 /*\{*/
01496 #define PWM_X_CMPA_M            0x0000FFFF  ///< Comparator A Value
01497 #define PWM_X_CMPA_S            0
01498 /*\}*/
01499
01503 /*\{*/
01504 #define PWM_X_CMPB_M            0x0000FFFF  ///< Comparator B Value
01505 #define PWM_X_CMPB_S            0
01506 /*\}*/
01507
01511 /*\{*/
01512 #define PWM_X_GENA_ACTCMPBD_M   0x00000C00  ///< Action for Comparator B Down
01513 #define PWM_X_GENA_ACTCMPBD_NONE 0x00000000  ///< Do nothing
01514 #define PWM_X_GENA_ACTCMPBD_INV 0x00000400  ///< Invert pwmA
01515 #define PWM_X_GENA_ACTCMPBD_ZERO 0x00000800  ///< Drive pwmA Low
01516 #define PWM_X_GENA_ACTCMPBD_ONE 0x00000C00  ///< Drive pwmA High
01517 #define PWM_X_GENA_ACTCMPBU_M   0x00000300  ///< Action for Comparator B Up
01518 #define PWM_X_GENA_ACTCMPBU_NONE 0x00000000  ///< Do nothing
01519 #define PWM_X_GENA_ACTCMPBU_INV 0x00000100  ///< Invert pwmA
01520 #define PWM_X_GENA_ACTCMPBU_ZERO 0x00000200  ///< Drive pwmA Low
01521 #define PWM_X_GENA_ACTCMPBU_ONE 0x00000300  ///< Drive pwmA High
01522 #define PWM_X_GENA_ACTCMPAD_M   0x000000C0  ///< Action for Comparator A Down
01523 #define PWM_X_GENA_ACTCMPAD_NONE 0x00000000  ///< Do nothing
01524 #define PWM_X_GENA_ACTCMPAD_INV 0x00000040  ///< Invert pwmA
01525 #define PWM_X_GENA_ACTCMPAD_ZERO 0x00000080  ///< Drive pwmA Low
01526 #define PWM_X_GENA_ACTCMPAD_ONE 0x000000C0  ///< Drive pwmA High
01527 #define PWM_X_GENA_ACTCMPAU_M   0x00000030  ///< Action for Comparator A Up
01528 #define PWM_X_GENA_ACTCMPAU_NONE 0x00000000  ///< Do nothing
01529 #define PWM_X_GENA_ACTCMPAU_INV 0x00000010  ///< Invert pwmA
01530 #define PWM_X_GENA_ACTCMPAU_ZERO 0x00000020  ///< Drive pwmA Low
01531 #define PWM_X_GENA_ACTCMPAU_ONE 0x00000030  ///< Drive pwmA High
01532 #define PWM_X_GENA_ACTLOAD_M    0x0000000C  ///< Action for Counter=LOAD
01533 #define PWM_X_GENA_ACTLOAD_NONE 0x00000000  ///< Do nothing
01534 #define PWM_X_GENA_ACTLOAD_INV  0x00000004  ///< Invert pwmA
01535 #define PWM_X_GENA_ACTLOAD_ZERO 0x00000008  ///< Drive pwmA Low
01536 #define PWM_X_GENA_ACTLOAD_ONE  0x0000000C  ///< Drive pwmA High
01537 #define PWM_X_GENA_ACTZERO_M    0x00000003  ///< Action for Counter=0
01538 #define PWM_X_GENA_ACTZERO_NONE 0x00000000  ///< Do nothing
01539 #define PWM_X_GENA_ACTZERO_INV  0x00000001  ///< Invert pwmA
01540 #define PWM_X_GENA_ACTZERO_ZERO 0x00000002  ///< Drive pwmA Low
01541 #define PWM_X_GENA_ACTZERO_ONE  0x00000003  ///< Drive pwmA High
01542 /*\}*/
01543
01547 /*\{*/
01548 #define PWM_X_GENB_ACTCMPBD_M   0x00000C00  ///< Action for Comparator B Down
01549 #define PWM_X_GENB_ACTCMPBD_NONE 0x00000000  ///< Do nothing
01550 #define PWM_X_GENB_ACTCMPBD_INV 0x00000400  ///< Invert pwmB
01551 #define PWM_X_GENB_ACTCMPBD_ZERO 0x00000800  ///< Drive pwmB Low
01552 #define PWM_X_GENB_ACTCMPBD_ONE 0x00000C00  ///< Drive pwmB High
01553 #define PWM_X_GENB_ACTCMPBU_M   0x00000300  ///< Action for Comparator B Up
01554 #define PWM_X_GENB_ACTCMPBU_NONE 0x00000000  ///< Do nothing
01555 #define PWM_X_GENB_ACTCMPBU_INV 0x00000100  ///< Invert pwmB
01556 #define PWM_X_GENB_ACTCMPBU_ZERO 0x00000200  ///< Drive pwmB Low
01557 #define PWM_X_GENB_ACTCMPBU_ONE 0x00000300  ///< Drive pwmB High
01558 #define PWM_X_GENB_ACTCMPAD_M   0x000000C0  ///< Action for Comparator A Down
01559 #define PWM_X_GENB_ACTCMPAD_NONE 0x00000000  ///< Do nothing
01560 #define PWM_X_GENB_ACTCMPAD_INV 0x00000040  ///< Invert pwmB
01561 #define PWM_X_GENB_ACTCMPAD_ZERO 0x00000080  ///< Drive pwmB Low
01562 #define PWM_X_GENB_ACTCMPAD_ONE 0x000000C0  ///< Drive pwmB High
01563 #define PWM_X_GENB_ACTCMPAU_M   0x00000030  ///< Action for Comparator A Up
01564 #define PWM_X_GENB_ACTCMPAU_NONE 0x00000000  ///< Do nothing
01565 #define PWM_X_GENB_ACTCMPAU_INV 0x00000010  ///< Invert pwmB
01566 #define PWM_X_GENB_ACTCMPAU_ZERO 0x00000020  ///< Drive pwmB Low
01567 #define PWM_X_GENB_ACTCMPAU_ONE 0x00000030  ///< Drive pwmB High
01568 #define PWM_X_GENB_ACTLOAD_M    0x0000000C  ///< Action for Counter=LOAD
01569 #define PWM_X_GENB_ACTLOAD_NONE 0x00000000  ///< Do nothing
01570 #define PWM_X_GENB_ACTLOAD_INV  0x00000004  ///< Invert pwmB
01571 #define PWM_X_GENB_ACTLOAD_ZERO 0x00000008  ///< Drive pwmB Low
01572 #define PWM_X_GENB_ACTLOAD_ONE  0x0000000C  ///< Drive pwmB High
01573 #define PWM_X_GENB_ACTZERO_M    0x00000003  ///< Action for Counter=0
01574 #define PWM_X_GENB_ACTZERO_NONE 0x00000000  ///< Do nothing
01575 #define PWM_X_GENB_ACTZERO_INV  0x00000001  ///< Invert pwmB
01576 #define PWM_X_GENB_ACTZERO_ZERO 0x00000002  ///< Drive pwmB Low
01577 #define PWM_X_GENB_ACTZERO_ONE  0x00000003  ///< Drive pwmB High
01578 /*\}*/
01579
01583 /*\{*/
01584 #define PWM_X_DBCTL_ENABLE      0x00000001  ///< Dead-Band Generator Enable
01585 /*\}*/
01586
01590 /*\{*/
01591 #define PWM_X_DBRISE_DELAY_M    0x00000FFF  ///< Dead-Band Rise Delay
01592 #define PWM_X_DBRISE_DELAY_S    0
01593 /*\}*/
01594
01598 /*\{*/
01599 #define PWM_X_DBFALL_DELAY_M    0x00000FFF  ///< Dead-Band Fall Delay
01600 #define PWM_X_DBFALL_DELAY_S    0
01601 /*\}*/
01602
01606 /*\{*/
01607 #define QEI_CTL_STALLEN         0x00001000  ///< Stall QEI
01608 #define QEI_CTL_INVI            0x00000800  ///< Invert Index Pulse
01609 #define QEI_CTL_INVB            0x00000400  ///< Invert PhB
01610 #define QEI_CTL_INVA            0x00000200  ///< Invert PhA
01611 #define QEI_CTL_VELDIV_M        0x000001C0  ///< Predivide Velocity
01612 #define QEI_CTL_VELDIV_1        0x00000000  ///< QEI clock /1
01613 #define QEI_CTL_VELDIV_2        0x00000040  ///< QEI clock /2
01614 #define QEI_CTL_VELDIV_4        0x00000080  ///< QEI clock /4
01615 #define QEI_CTL_VELDIV_8        0x000000C0  ///< QEI clock /8
01616 #define QEI_CTL_VELDIV_16       0x00000100  ///< QEI clock /16
01617 #define QEI_CTL_VELDIV_32       0x00000140  ///< QEI clock /32
01618 #define QEI_CTL_VELDIV_64       0x00000180  ///< QEI clock /64
01619 #define QEI_CTL_VELDIV_128      0x000001C0  ///< QEI clock /128
01620 #define QEI_CTL_VELEN           0x00000020  ///< Capture Velocity
01621 #define QEI_CTL_RESMODE         0x00000010  ///< Reset Mode
01622 #define QEI_CTL_CAPMODE         0x00000008  ///< Capture Mode
01623 #define QEI_CTL_SIGMODE         0x00000004  ///< Signal Mode
01624 #define QEI_CTL_SWAP            0x00000002  ///< Swap Signals
01625 #define QEI_CTL_ENABLE          0x00000001  ///< Enable QEI
01626 /*\}*/
01627
01631 /*\{*/
01632 #define QEI_STAT_DIRECTION      0x00000002  ///< Direction of Rotation
01633 #define QEI_STAT_ERROR          0x00000001  ///< Error Detected
01634 /*\}*/
01635
01639 /*\{*/
01640 #define QEI_POS_M               0xFFFFFFFF  ///< Current Position Integrator Value
01641 #define QEI_POS_S               0
01642 /*\}*/
01643
01647 /*\{*/
01648 #define QEI_MAXPOS_M            0xFFFFFFFF  ///< Maximum Position Integrator Value
01649 #define QEI_MAXPOS_S            0
01650 /*\}*/
01651
01655 /*\{*/
01656 #define QEI_LOAD_M              0xFFFFFFFF  ///< Velocity Timer Load Value
01657 #define QEI_LOAD_S              0
01658 /*\}*/
01659
01663 /*\{*/
01664 #define QEI_TIME_M              0xFFFFFFFF  ///< Velocity Timer Current Value
01665 #define QEI_TIME_S              0
01666 /*\}*/
01667
01671 /*\{*/
01672 #define QEI_COUNT_M             0xFFFFFFFF  ///< Velocity Pulse Count
01673 #define QEI_COUNT_S             0
01674 /*\}*/
01675
01679 /*\{*/
01680 #define QEI_SPEED_M             0xFFFFFFFF  ///< Velocity
01681 #define QEI_SPEED_S             0
01682 /*\}*/
01683
01687 /*\{*/
01688 #define QEI_INTEN_ERROR         0x00000008  ///< Phase Error Interrupt Enable
01689 #define QEI_INTEN_DIR           0x00000004  ///< Direction Change Interrupt
01690
01691 #define QEI_INTEN_TIMER         0x00000002  ///< Timer Expires Interrupt Enable
01692 #define QEI_INTEN_INDEX         0x00000001  ///< Index Pulse Detected Interrupt
01693
01694 /*\}*/
01695
01699 /*\{*/
01700 #define QEI_RIS_ERROR           0x00000008  ///< Phase Error Detected
01701 #define QEI_RIS_DIR             0x00000004  ///< Direction Change Detected
01702 #define QEI_RIS_TIMER           0x00000002  ///< Velocity Timer Expired
01703 #define QEI_RIS_INDEX           0x00000001  ///< Index Pulse Asserted
01704 /*\}*/
01705
01709 /*\{*/
01710 #define QEI_ISC_ERROR           0x00000008  ///< Phase Error Interrupt
01711 #define QEI_ISC_DIR             0x00000004  ///< Direction Change Interrupt
01712 #define QEI_ISC_TIMER           0x00000002  ///< Velocity Timer Expired Interrupt
01713 #define QEI_ISC_INDEX           0x00000001  ///< Index Pulse Interrupt
01714 /*\}*/
01715
01719 /*\{*/
01720 #define TIMER_CFG_M             0x00000007  ///< GPTM Configuration
01721 #define TIMER_CFG_32_BIT_TIMER  0x00000000  ///< 32-bit timer configuration
01722 #define TIMER_CFG_32_BIT_RTC    0x00000001  ///< 32-bit real-time clock (RTC)
01723
01724 #define TIMER_CFG_16_BIT        0x00000004  ///< 16-bit timer configuration. The
01725
01726
01727 /*\}*/
01728
01732 /*\{*/
01733 #define TIMER_TAMR_TAAMS        0x00000008  ///< GPTM Timer A Alternate Mode
01734
01735 #define TIMER_TAMR_TACMR        0x00000004  ///< GPTM Timer A Capture Mode
01736 #define TIMER_TAMR_TAMR_M       0x00000003  ///< GPTM Timer A Mode
01737 #define TIMER_TAMR_TAMR_1_SHOT  0x00000001  ///< One-Shot Timer mode
01738 #define TIMER_TAMR_TAMR_PERIOD  0x00000002  ///< Periodic Timer mode
01739 #define TIMER_TAMR_TAMR_CAP     0x00000003  ///< Capture mode
01740 /*\}*/
01741
01745 /*\{*/
01746 #define TIMER_TBMR_TBAMS        0x00000008  ///< GPTM Timer B Alternate Mode
01747
01748 #define TIMER_TBMR_TBCMR        0x00000004  ///< GPTM Timer B Capture Mode
01749 #define TIMER_TBMR_TBMR_M       0x00000003  ///< GPTM Timer B Mode
01750 #define TIMER_TBMR_TBMR_1_SHOT  0x00000001  ///< One-Shot Timer mode
01751 #define TIMER_TBMR_TBMR_PERIOD  0x00000002  ///< Periodic Timer mode
01752 #define TIMER_TBMR_TBMR_CAP     0x00000003  ///< Capture mode
01753 /*\}*/
01754
01758 /*\{*/
01759 #define TIMER_CTL_TBPWML        0x00004000  ///< GPTM Timer B PWM Output Level
01760 #define TIMER_CTL_TBOTE         0x00002000  ///< GPTM Timer B Output Trigger
01761
01762 #define TIMER_CTL_TBEVENT_M     0x00000C00  ///< GPTM Timer B Event Mode
01763 #define TIMER_CTL_TBEVENT_POS   0x00000000  ///< Positive edge
01764 #define TIMER_CTL_TBEVENT_NEG   0x00000400  ///< Negative edge
01765 #define TIMER_CTL_TBEVENT_BOTH  0x00000C00  ///< Both edges
01766 #define TIMER_CTL_TBSTALL       0x00000200  ///< GPTM Timer B Stall Enable
01767 #define TIMER_CTL_TBEN          0x00000100  ///< GPTM Timer B Enable
01768 #define TIMER_CTL_TAPWML        0x00000040  ///< GPTM Timer A PWM Output Level
01769 #define TIMER_CTL_TAOTE         0x00000020  ///< GPTM Timer A Output Trigger
01770
01771 #define TIMER_CTL_RTCEN         0x00000010  ///< GPTM RTC Enable
01772 #define TIMER_CTL_TAEVENT_M     0x0000000C  ///< GPTM Timer A Event Mode
01773 #define TIMER_CTL_TAEVENT_POS   0x00000000  ///< Positive edge
01774 #define TIMER_CTL_TAEVENT_NEG   0x00000004  ///< Negative edge
01775 #define TIMER_CTL_TAEVENT_BOTH  0x0000000C  ///< Both edges
01776 #define TIMER_CTL_TASTALL       0x00000002  ///< GPTM Timer A Stall Enable
01777 #define TIMER_CTL_TAEN          0x00000001  ///< GPTM Timer A Enable
01778 /*\}*/
01779
01783 /*\{*/
01784 #define TIMER_IMR_CBEIM         0x00000400  ///< GPTM Capture B Event Interrupt
01785
01786 #define TIMER_IMR_CBMIM         0x00000200  ///< GPTM Capture B Match Interrupt
01787
01788 #define TIMER_IMR_TBTOIM        0x00000100  ///< GPTM Timer B Time-Out Interrupt
01789
01790 #define TIMER_IMR_RTCIM         0x00000008  ///< GPTM RTC Interrupt Mask
01791 #define TIMER_IMR_CAEIM         0x00000004  ///< GPTM Capture A Event Interrupt
01792
01793 #define TIMER_IMR_CAMIM         0x00000002  ///< GPTM Capture A Match Interrupt
01794
01795 #define TIMER_IMR_TATOIM        0x00000001  ///< GPTM Timer A Time-Out Interrupt
01796
01797 /*\}*/
01798
01802 /*\{*/
01803 #define TIMER_RIS_CBERIS        0x00000400  ///< GPTM Capture B Event Raw
01804
01805 #define TIMER_RIS_CBMRIS        0x00000200  ///< GPTM Capture B Match Raw
01806
01807 #define TIMER_RIS_TBTORIS       0x00000100  ///< GPTM Timer B Time-Out Raw
01808
01809 #define TIMER_RIS_RTCRIS        0x00000008  ///< GPTM RTC Raw Interrupt
01810 #define TIMER_RIS_CAERIS        0x00000004  ///< GPTM Capture A Event Raw
01811
01812 #define TIMER_RIS_CAMRIS        0x00000002  ///< GPTM Capture A Match Raw
01813
01814 #define TIMER_RIS_TATORIS       0x00000001  ///< GPTM Timer A Time-Out Raw
01815
01816 /*\}*/
01817
01821 /*\{*/
01822 #define TIMER_MIS_CBEMIS        0x00000400  ///< GPTM Capture B Event Masked
01823
01824 #define TIMER_MIS_CBMMIS        0x00000200  ///< GPTM Capture B Match Masked
01825
01826 #define TIMER_MIS_TBTOMIS       0x00000100  ///< GPTM Timer B Time-Out Masked
01827
01828 #define TIMER_MIS_RTCMIS        0x00000008  ///< GPTM RTC Masked Interrupt
01829 #define TIMER_MIS_CAEMIS        0x00000004  ///< GPTM Capture A Event Masked
01830
01831 #define TIMER_MIS_CAMMIS        0x00000002  ///< GPTM Capture A Match Masked
01832
01833 #define TIMER_MIS_TATOMIS       0x00000001  ///< GPTM Timer A Time-Out Masked
01834
01835 /*\}*/
01836
01840 /*\{*/
01841 #define TIMER_ICR_CBECINT       0x00000400  ///< GPTM Capture B Event Interrupt
01842
01843 #define TIMER_ICR_CBMCINT       0x00000200  ///< GPTM Capture B Match Interrupt
01844
01845 #define TIMER_ICR_TBTOCINT      0x00000100  ///< GPTM Timer B Time-Out Interrupt
01846
01847 #define TIMER_ICR_RTCCINT       0x00000008  ///< GPTM RTC Interrupt Clear
01848 #define TIMER_ICR_CAECINT       0x00000004  ///< GPTM Capture A Event Interrupt
01849
01850 #define TIMER_ICR_CAMCINT       0x00000002  ///< GPTM Capture A Match Interrupt
01851
01852 #define TIMER_ICR_TATOCINT      0x00000001  ///< GPTM Timer A Time-Out Raw
01853
01854 /*\}*/
01855
01859 /*\{*/
01860 #define TIMER_TAILR_TAILRH_M    0xFFFF0000  ///< GPTM Timer A Interval Load
01861
01862 #define TIMER_TAILR_TAILRL_M    0x0000FFFF  ///< GPTM Timer A Interval Load
01863
01864 #define TIMER_TAILR_TAILRH_S    16
01865 #define TIMER_TAILR_TAILRL_S    0
01866 /*\}*/
01867
01871 /*\{*/
01872 #define TIMER_TBILR_TBILRL_M    0x0000FFFF  ///< GPTM Timer B Interval Load
01873
01874 #define TIMER_TBILR_TBILRL_S    0
01875 /*\}*/
01876
01881 /*\{*/
01882 #define TIMER_TAMATCHR_TAMRH_M  0xFFFF0000  ///< GPTM Timer A Match Register High
01883 #define TIMER_TAMATCHR_TAMRL_M  0x0000FFFF  ///< GPTM Timer A Match Register Low
01884 #define TIMER_TAMATCHR_TAMRH_S  16
01885 #define TIMER_TAMATCHR_TAMRL_S  0
01886 /*\}*/
01887
01892 /*\{*/
01893 #define TIMER_TBMATCHR_TBMRL_M  0x0000FFFF  ///< GPTM Timer B Match Register Low
01894 #define TIMER_TBMATCHR_TBMRL_S  0
01895 /*\}*/
01896
01900 /*\{*/
01901 #define TIMER_TAPR_TAPSR_M      0x000000FF  ///< GPTM Timer A Prescale
01902 #define TIMER_TAPR_TAPSR_S      0
01903 /*\}*/
01904
01908 /*\{*/
01909 #define TIMER_TBPR_TBPSR_M      0x000000FF  ///< GPTM Timer B Prescale
01910 #define TIMER_TBPR_TBPSR_S      0
01911 /*\}*/
01912
01916 /*\{*/
01917 #define TIMER_TAPMR_TAPSMR_M    0x000000FF  ///< GPTM TimerA Prescale Match
01918 #define TIMER_TAPMR_TAPSMR_S    0
01919 /*\}*/
01920
01924 /*\{*/
01925 #define TIMER_TBPMR_TBPSMR_M    0x000000FF  ///< GPTM TimerB Prescale Match
01926 #define TIMER_TBPMR_TBPSMR_S    0
01927 /*\}*/
01928
01932 /*\{*/
01933 #define TIMER_TAR_TARH_M        0xFFFF0000  ///< GPTM Timer A Register High
01934 #define TIMER_TAR_TARL_M        0x0000FFFF  ///< GPTM Timer A Register Low
01935 #define TIMER_TAR_TARH_S        16
01936 #define TIMER_TAR_TARL_S        0
01937 /*\}*/
01938
01942 /*\{*/
01943 #define TIMER_TBR_TBRL_M        0x0000FFFF  ///< GPTM Timer B
01944 #define TIMER_TBR_TBRL_S        0
01945 /*\}*/
01946
01947
01951 /*\{*/
01952 #define COMP_ACMIS_IN2          0x00000004  ///< Comparator 2 Masked Interrupt
01953
01954 #define COMP_ACMIS_IN1          0x00000002  ///< Comparator 1 Masked Interrupt
01955
01956 #define COMP_ACMIS_IN0          0x00000001  ///< Comparator 0 Masked Interrupt
01957
01958 /*\}*/
01959
01963 /*\{*/
01964 #define COMP_ACRIS_IN2          0x00000004  ///< Comparator 2 Interrupt Status
01965 #define COMP_ACRIS_IN1          0x00000002  ///< Comparator 1 Interrupt Status
01966 #define COMP_ACRIS_IN0          0x00000001  ///< Comparator 0 Interrupt Status
01967 /*\}*/
01968
01972 /*\{*/
01973 #define COMP_ACINTEN_IN2        0x00000004  ///< Comparator 2 Interrupt Enable
01974 #define COMP_ACINTEN_IN1        0x00000002  ///< Comparator 1 Interrupt Enable
01975 #define COMP_ACINTEN_IN0        0x00000001  ///< Comparator 0 Interrupt Enable
01976 /*\}*/
01977
01982 /*\{*/
01983 #define COMP_ACREFCTL_EN        0x00000200  ///< Resistor Ladder Enable
01984 #define COMP_ACREFCTL_RNG       0x00000100  ///< Resistor Ladder Range
01985 #define COMP_ACREFCTL_VREF_M    0x0000000F  ///< Resistor Ladder Voltage Ref
01986 #define COMP_ACREFCTL_VREF_S    0
01987 /*\}*/
01988
01992 /*\{*/
01993 #define COMP_ACSTAT0_OVAL       0x00000002  ///< Comparator Output Value
01994 /*\}*/
01995
01999 /*\{*/
02000 #define COMP_ACCTL0_TOEN        0x00000800  ///< Trigger Output Enable
02001 #define COMP_ACCTL0_ASRCP_M     0x00000600  ///< Analog Source Positive
02002 #define COMP_ACCTL0_ASRCP_PIN   0x00000000  ///< Pin value of Cn+
02003 #define COMP_ACCTL0_ASRCP_PIN0  0x00000200  ///< Pin value of C0+
02004 #define COMP_ACCTL0_ASRCP_REF   0x00000400  ///< Internal voltage reference
02005
02006 #define COMP_ACCTL0_TSLVAL      0x00000080  ///< Trigger Sense Level Value
02007 #define COMP_ACCTL0_TSEN_M      0x00000060  ///< Trigger Sense
02008 #define COMP_ACCTL0_TSEN_LEVEL  0x00000000  ///< Level sense, see TSLVAL
02009 #define COMP_ACCTL0_TSEN_FALL   0x00000020  ///< Falling edge
02010 #define COMP_ACCTL0_TSEN_RISE   0x00000040  ///< Rising edge
02011 #define COMP_ACCTL0_TSEN_BOTH   0x00000060  ///< Either edge
02012 #define COMP_ACCTL0_ISLVAL      0x00000010  ///< Interrupt Sense Level Value
02013 #define COMP_ACCTL0_ISEN_M      0x0000000C  ///< Interrupt Sense
02014 #define COMP_ACCTL0_ISEN_LEVEL  0x00000000  ///< Level sense, see ISLVAL
02015 #define COMP_ACCTL0_ISEN_FALL   0x00000004  ///< Falling edge
02016 #define COMP_ACCTL0_ISEN_RISE   0x00000008  ///< Rising edge
02017 #define COMP_ACCTL0_ISEN_BOTH   0x0000000C  ///< Either edge
02018 #define COMP_ACCTL0_CINV        0x00000002  ///< Comparator Output Invert
02019 /*\}*/
02020
02024 /*\{*/
02025 #define COMP_ACSTAT1_OVAL       0x00000002  ///< Comparator Output Value
02026 /*\}*/
02027
02031 /*\{*/
02032 #define COMP_ACCTL1_TOEN        0x00000800  ///< Trigger Output Enable
02033 #define COMP_ACCTL1_ASRCP_M     0x00000600  ///< Analog Source Positive
02034 #define COMP_ACCTL1_ASRCP_PIN   0x00000000  ///< Pin value of Cn+
02035 #define COMP_ACCTL1_ASRCP_PIN0  0x00000200  ///< Pin value of C0+
02036 #define COMP_ACCTL1_ASRCP_REF   0x00000400  ///< Internal voltage reference
02037
02038 #define COMP_ACCTL1_TSLVAL      0x00000080  ///< Trigger Sense Level Value
02039 #define COMP_ACCTL1_TSEN_M      0x00000060  ///< Trigger Sense
02040 #define COMP_ACCTL1_TSEN_LEVEL  0x00000000  ///< Level sense, see TSLVAL
02041 #define COMP_ACCTL1_TSEN_FALL   0x00000020  ///< Falling edge
02042 #define COMP_ACCTL1_TSEN_RISE   0x00000040  ///< Rising edge
02043 #define COMP_ACCTL1_TSEN_BOTH   0x00000060  ///< Either edge
02044 #define COMP_ACCTL1_ISLVAL      0x00000010  ///< Interrupt Sense Level Value
02045 #define COMP_ACCTL1_ISEN_M      0x0000000C  ///< Interrupt Sense
02046 #define COMP_ACCTL1_ISEN_LEVEL  0x00000000  ///< Level sense, see ISLVAL
02047 #define COMP_ACCTL1_ISEN_FALL   0x00000004  ///< Falling edge
02048 #define COMP_ACCTL1_ISEN_RISE   0x00000008  ///< Rising edge
02049 #define COMP_ACCTL1_ISEN_BOTH   0x0000000C  ///< Either edge
02050 #define COMP_ACCTL1_CINV        0x00000002  ///< Comparator Output Invert
02051 /*\}*/
02052
02056 /*\{*/
02057 #define COMP_ACSTAT2_OVAL       0x00000002  ///< Comparator Output Value
02058 /*\}*/
02059
02063 /*\{*/
02064 #define COMP_ACCTL2_TOEN        0x00000800  ///< Trigger Output Enable
02065 #define COMP_ACCTL2_ASRCP_M     0x00000600  ///< Analog Source Positive
02066 #define COMP_ACCTL2_ASRCP_PIN   0x00000000  ///< Pin value of Cn+
02067 #define COMP_ACCTL2_ASRCP_PIN0  0x00000200  ///< Pin value of C0+
02068 #define COMP_ACCTL2_ASRCP_REF   0x00000400  ///< Internal voltage reference
02069
02070 #define COMP_ACCTL2_TSLVAL      0x00000080  ///< Trigger Sense Level Value
02071 #define COMP_ACCTL2_TSEN_M      0x00000060  ///< Trigger Sense
02072 #define COMP_ACCTL2_TSEN_LEVEL  0x00000000  ///< Level sense, see TSLVAL
02073 #define COMP_ACCTL2_TSEN_FALL   0x00000020  ///< Falling edge
02074 #define COMP_ACCTL2_TSEN_RISE   0x00000040  ///< Rising edge
02075 #define COMP_ACCTL2_TSEN_BOTH   0x00000060  ///< Either edge
02076 #define COMP_ACCTL2_ISLVAL      0x00000010  ///< Interrupt Sense Level Value
02077 #define COMP_ACCTL2_ISEN_M      0x0000000C  ///< Interrupt Sense
02078 #define COMP_ACCTL2_ISEN_LEVEL  0x00000000  ///< Level sense, see ISLVAL
02079 #define COMP_ACCTL2_ISEN_FALL   0x00000004  ///< Falling edge
02080 #define COMP_ACCTL2_ISEN_RISE   0x00000008  ///< Rising edge
02081 #define COMP_ACCTL2_ISEN_BOTH   0x0000000C  ///< Either edge
02082 #define COMP_ACCTL2_CINV        0x00000002  ///< Comparator Output Invert
02083 /*\}*/
02084
02088 /*\{*/
02089 #define HIB_RTCC_M              0xFFFFFFFF  ///< RTC Counter
02090 #define HIB_RTCC_S              0
02091 /*\}*/
02092
02096 /*\{*/
02097 #define HIB_RTCM0_M             0xFFFFFFFF  ///< RTC Match 0
02098 #define HIB_RTCM0_S             0
02099 /*\}*/
02100
02104 /*\{*/
02105 #define HIB_RTCM1_M             0xFFFFFFFF  ///< RTC Match 1
02106 #define HIB_RTCM1_S             0
02107 /*\}*/
02108
02112 /*\{*/
02113 #define HIB_RTCLD_M             0xFFFFFFFF  ///< RTC Load
02114 #define HIB_RTCLD_S             0
02115 /*\}*/
02116
02120 /*\{*/
02121 #define HIB_CTL_VABORT          0x00000080  ///< Power Cut Abort Enable
02122 #define HIB_CTL_CLK32EN         0x00000040  ///< Clocking Enable
02123 #define HIB_CTL_LOWBATEN        0x00000020  ///< Low Battery Monitoring Enable
02124 #define HIB_CTL_PINWEN          0x00000010  ///< External WAKE Pin Enable
02125 #define HIB_CTL_RTCWEN          0x00000008  ///< RTC Wake-up Enable
02126 #define HIB_CTL_CLKSEL          0x00000004  ///< Hibernation Module Clock Select
02127 #define HIB_CTL_HIBREQ          0x00000002  ///< Hibernation Request
02128 #define HIB_CTL_RTCEN           0x00000001  ///< RTC Timer Enable
02129 /*\}*/
02130
02134 /*\{*/
02135 #define HIB_IM_EXTW             0x00000008  ///< External Wake-Up Interrupt Mask
02136 #define HIB_IM_LOWBAT           0x00000004  ///< Low Battery Voltage Interrupt
02137
02138 #define HIB_IM_RTCALT1          0x00000002  ///< RTC Alert 1 Interrupt Mask
02139 #define HIB_IM_RTCALT0          0x00000001  ///< RTC Alert 0 Interrupt Mask
02140 /*\}*/
02141
02145 /*\{*/
02146 #define HIB_RIS_EXTW            0x00000008  ///< External Wake-Up Raw Interrupt
02147
02148 #define HIB_RIS_LOWBAT          0x00000004  ///< Low Battery Voltage Raw
02149
02150 #define HIB_RIS_RTCALT1         0x00000002  ///< RTC Alert 1 Raw Interrupt Status
02151 #define HIB_RIS_RTCALT0         0x00000001  ///< RTC Alert 0 Raw Interrupt Status
02152 /*\}*/
02153
02157 /*\{*/
02158 #define HIB_MIS_EXTW            0x00000008  ///< External Wake-Up Masked
02159
02160 #define HIB_MIS_LOWBAT          0x00000004  ///< Low Battery Voltage Masked
02161
02162 #define HIB_MIS_RTCALT1         0x00000002  ///< RTC Alert 1 Masked Interrupt
02163
02164 #define HIB_MIS_RTCALT0         0x00000001  ///< RTC Alert 0 Masked Interrupt
02165
02166 /*\}*/
02167
02171 /*\{*/
02172 #define HIB_IC_EXTW             0x00000008  ///< External Wake-Up Masked
02173
02174 #define HIB_IC_LOWBAT           0x00000004  ///< Low Battery Voltage Masked
02175
02176 #define HIB_IC_RTCALT1          0x00000002  ///< RTC Alert1 Masked Interrupt
02177
02178 #define HIB_IC_RTCALT0          0x00000001  ///< RTC Alert0 Masked Interrupt
02179
02180 /*\}*/
02181
02185 /*\{*/
02186 #define HIB_RTCT_TRIM_M         0x0000FFFF  ///< RTC Trim Value
02187 #define HIB_RTCT_TRIM_S         0
02188 /*\}*/
02189
02193 /*\{*/
02194 #define HIB_DATA_RTD_M          0xFFFFFFFF  ///< Hibernation Module NV Data
02195 #define HIB_DATA_RTD_S          0
02196 /*\}*/
02197
02201 /*\{*/
02202 #define FLASH_FMA_OFFSET_M      0x0003FFFF  ///< Address Offset
02203 #define FLASH_FMA_OFFSET_S      0
02204 /*\}*/
02205
02209 /*\{*/
02210 #define FLASH_FMD_DATA_M        0xFFFFFFFF  ///< Data Value
02211 #define FLASH_FMD_DATA_S        0
02212 /*\}*/
02213
02217 /*\{*/
02218 #define FLASH_FMC_WRKEY         0xA4420000  ///< FLASH write key
02219 #define FLASH_FMC_COMT          0x00000008  ///< Commit Register Value
02220 #define FLASH_FMC_MERASE        0x00000004  ///< Mass Erase Flash Memory
02221 #define FLASH_FMC_ERASE         0x00000002  ///< Erase a Page of Flash Memory
02222 #define FLASH_FMC_WRITE         0x00000001  ///< Write a Word into Flash Memory
02223 /*\}*/
02224
02228 /*\{*/
02229 #define FLASH_FCRIS_PRIS        0x00000002  ///< Programming Raw Interrupt Status
02230 #define FLASH_FCRIS_ARIS        0x00000001  ///< Access Raw Interrupt Status
02231 /*\}*/
02232
02236 /*\{*/
02237 #define FLASH_FCIM_PMASK        0x00000002  ///< Programming Interrupt Mask
02238 #define FLASH_FCIM_AMASK        0x00000001  ///< Access Interrupt Mask
02239 /*\}*/
02240
02244 /*\{*/
02245 #define FLASH_FCMISC_PMISC      0x00000002  ///< Programming Masked Interrupt
02246
02247 #define FLASH_FCMISC_AMISC      0x00000001  ///< Access Masked Interrupt Status
02248
02249 /*\}*/
02250
02254 /*\{*/
02255 #define FLASH_USECRL_M          0x000000FF  ///< Microsecond Reload Value
02256 #define FLASH_USECRL_S          0
02257 /*\}*/
02258
02262 /*\{*/
02263 #define FLASH_USERDBG_NW        0x80000000  ///< User Debug Not Written
02264 #define FLASH_USERDBG_DATA_M    0x7FFFFFFC  ///< User Data
02265 #define FLASH_USERDBG_DBG1      0x00000002  ///< Debug Control 1
02266 #define FLASH_USERDBG_DBG0      0x00000001  ///< Debug Control 0
02267 #define FLASH_USERDBG_DATA_S    2
02268 /*\}*/
02269
02273 /*\{*/
02274 #define FLASH_USERREG0_NW       0x80000000  ///< Not Written
02275 #define FLASH_USERREG0_DATA_M   0x7FFFFFFF  ///< User Data
02276 #define FLASH_USERREG0_DATA_S   0
02277 /*\}*/
02278
02282 /*\{*/
02283 #define FLASH_USERREG1_NW       0x80000000  ///< Not Written
02284 #define FLASH_USERREG1_DATA_M   0x7FFFFFFF  ///< User Data
02285 #define FLASH_USERREG1_DATA_S   0
02286 /*\}*/
02287
02293 /*\{*/
02294 #define FLASH_PROTECT_SIZE      0x00000800
02295 #define FLASH_ERASE_SIZE        0x00000400
02296 /*\}*/
02297
02301 /*\{*/
02302 #define NVIC_INT_TYPE_LINES_M   0x0000001F  ///< Number of interrupt lines (x32)
02303 #define NVIC_INT_TYPE_LINES_S   0
02304 /*\}*/
02305
02309 /*\{*/
02310 #define NVIC_ST_CTRL_COUNT      0x00010000  ///< Count flag
02311 #define NVIC_ST_CTRL_CLK_SRC    0x00000004  ///< Clock Source
02312 #define NVIC_ST_CTRL_INTEN      0x00000002  ///< Interrupt enable
02313 #define NVIC_ST_CTRL_ENABLE     0x00000001  ///< Counter mode
02314 /*\}*/
02315
02319 /*\{*/
02320 #define NVIC_ST_RELOAD_M        0x00FFFFFF  ///< Counter load value
02321 #define NVIC_ST_RELOAD_S        0
02322 /*\}*/
02323
02328 /*\{*/
02329 #define NVIC_ST_CURRENT_M       0x00FFFFFF  ///< Counter current value
02330 #define NVIC_ST_CURRENT_S       0
02331 /*\}*/
02332
02336 /*\{*/
02337 #define NVIC_ST_CAL_NOREF       0x80000000  ///< No reference clock
02338 #define NVIC_ST_CAL_SKEW        0x40000000  ///< Clock skew
02339 #define NVIC_ST_CAL_ONEMS_M     0x00FFFFFF  ///< 1ms reference value
02340 #define NVIC_ST_CAL_ONEMS_S     0
02341 /*\}*/
02342
02346 /*\{*/
02347 #define NVIC_EN0_INT31          0x80000000  ///< Interrupt 31 enable
02348 #define NVIC_EN0_INT30          0x40000000  ///< Interrupt 30 enable
02349 #define NVIC_EN0_INT29          0x20000000  ///< Interrupt 29 enable
02350 #define NVIC_EN0_INT28          0x10000000  ///< Interrupt 28 enable
02351 #define NVIC_EN0_INT27          0x08000000  ///< Interrupt 27 enable
02352 #define NVIC_EN0_INT26          0x04000000  ///< Interrupt 26 enable
02353 #define NVIC_EN0_INT25          0x02000000  ///< Interrupt 25 enable
02354 #define NVIC_EN0_INT24          0x01000000  ///< Interrupt 24 enable
02355 #define NVIC_EN0_INT23          0x00800000  ///< Interrupt 23 enable
02356 #define NVIC_EN0_INT22          0x00400000  ///< Interrupt 22 enable
02357 #define NVIC_EN0_INT21          0x00200000  ///< Interrupt 21 enable
02358 #define NVIC_EN0_INT20          0x00100000  ///< Interrupt 20 enable
02359 #define NVIC_EN0_INT19          0x00080000  ///< Interrupt 19 enable
02360 #define NVIC_EN0_INT18          0x00040000  ///< Interrupt 18 enable
02361 #define NVIC_EN0_INT17          0x00020000  ///< Interrupt 17 enable
02362 #define NVIC_EN0_INT16          0x00010000  ///< Interrupt 16 enable
02363 #define NVIC_EN0_INT15          0x00008000  ///< Interrupt 15 enable
02364 #define NVIC_EN0_INT14          0x00004000  ///< Interrupt 14 enable
02365 #define NVIC_EN0_INT13          0x00002000  ///< Interrupt 13 enable
02366 #define NVIC_EN0_INT12          0x00001000  ///< Interrupt 12 enable
02367 #define NVIC_EN0_INT11          0x00000800  ///< Interrupt 11 enable
02368 #define NVIC_EN0_INT10          0x00000400  ///< Interrupt 10 enable
02369 #define NVIC_EN0_INT9           0x00000200  ///< Interrupt 9 enable
02370 #define NVIC_EN0_INT8           0x00000100  ///< Interrupt 8 enable
02371 #define NVIC_EN0_INT7           0x00000080  ///< Interrupt 7 enable
02372 #define NVIC_EN0_INT6           0x00000040  ///< Interrupt 6 enable
02373 #define NVIC_EN0_INT5           0x00000020  ///< Interrupt 5 enable
02374 #define NVIC_EN0_INT4           0x00000010  ///< Interrupt 4 enable
02375 #define NVIC_EN0_INT3           0x00000008  ///< Interrupt 3 enable
02376 #define NVIC_EN0_INT2           0x00000004  ///< Interrupt 2 enable
02377 #define NVIC_EN0_INT1           0x00000002  ///< Interrupt 1 enable
02378 #define NVIC_EN0_INT0           0x00000001  ///< Interrupt 0 enable
02379 /*\}*/
02380
02384 /*\{*/
02385 #define NVIC_EN1_INT59          0x08000000  ///< Interrupt 59 enable
02386 #define NVIC_EN1_INT58          0x04000000  ///< Interrupt 58 enable
02387 #define NVIC_EN1_INT57          0x02000000  ///< Interrupt 57 enable
02388 #define NVIC_EN1_INT56          0x01000000  ///< Interrupt 56 enable
02389 #define NVIC_EN1_INT55          0x00800000  ///< Interrupt 55 enable
02390 #define NVIC_EN1_INT54          0x00400000  ///< Interrupt 54 enable
02391 #define NVIC_EN1_INT53          0x00200000  ///< Interrupt 53 enable
02392 #define NVIC_EN1_INT52          0x00100000  ///< Interrupt 52 enable
02393 #define NVIC_EN1_INT51          0x00080000  ///< Interrupt 51 enable
02394 #define NVIC_EN1_INT50          0x00040000  ///< Interrupt 50 enable
02395 #define NVIC_EN1_INT49          0x00020000  ///< Interrupt 49 enable
02396 #define NVIC_EN1_INT48          0x00010000  ///< Interrupt 48 enable
02397 #define NVIC_EN1_INT47          0x00008000  ///< Interrupt 47 enable
02398 #define NVIC_EN1_INT46          0x00004000  ///< Interrupt 46 enable
02399 #define NVIC_EN1_INT45          0x00002000  ///< Interrupt 45 enable
02400 #define NVIC_EN1_INT44          0x00001000  ///< Interrupt 44 enable
02401 #define NVIC_EN1_INT43          0x00000800  ///< Interrupt 43 enable
02402 #define NVIC_EN1_INT42          0x00000400  ///< Interrupt 42 enable
02403 #define NVIC_EN1_INT41          0x00000200  ///< Interrupt 41 enable
02404 #define NVIC_EN1_INT40          0x00000100  ///< Interrupt 40 enable
02405 #define NVIC_EN1_INT39          0x00000080  ///< Interrupt 39 enable
02406 #define NVIC_EN1_INT38          0x00000040  ///< Interrupt 38 enable
02407 #define NVIC_EN1_INT37          0x00000020  ///< Interrupt 37 enable
02408 #define NVIC_EN1_INT36          0x00000010  ///< Interrupt 36 enable
02409 #define NVIC_EN1_INT35          0x00000008  ///< Interrupt 35 enable
02410 #define NVIC_EN1_INT34          0x00000004  ///< Interrupt 34 enable
02411 #define NVIC_EN1_INT33          0x00000002  ///< Interrupt 33 enable
02412 #define NVIC_EN1_INT32          0x00000001  ///< Interrupt 32 enable
02413 /*\}*/
02414
02418 /*\{*/
02419 #define NVIC_DIS0_INT31         0x80000000  ///< Interrupt 31 disable
02420 #define NVIC_DIS0_INT30         0x40000000  ///< Interrupt 30 disable
02421 #define NVIC_DIS0_INT29         0x20000000  ///< Interrupt 29 disable
02422 #define NVIC_DIS0_INT28         0x10000000  ///< Interrupt 28 disable
02423 #define NVIC_DIS0_INT27         0x08000000  ///< Interrupt 27 disable
02424 #define NVIC_DIS0_INT26         0x04000000  ///< Interrupt 26 disable
02425 #define NVIC_DIS0_INT25         0x02000000  ///< Interrupt 25 disable
02426 #define NVIC_DIS0_INT24         0x01000000  ///< Interrupt 24 disable
02427 #define NVIC_DIS0_INT23         0x00800000  ///< Interrupt 23 disable
02428 #define NVIC_DIS0_INT22         0x00400000  ///< Interrupt 22 disable
02429 #define NVIC_DIS0_INT21         0x00200000  ///< Interrupt 21 disable
02430 #define NVIC_DIS0_INT20         0x00100000  ///< Interrupt 20 disable
02431 #define NVIC_DIS0_INT19         0x00080000  ///< Interrupt 19 disable
02432 #define NVIC_DIS0_INT18         0x00040000  ///< Interrupt 18 disable
02433 #define NVIC_DIS0_INT17         0x00020000  ///< Interrupt 17 disable
02434 #define NVIC_DIS0_INT16         0x00010000  ///< Interrupt 16 disable
02435 #define NVIC_DIS0_INT15         0x00008000  ///< Interrupt 15 disable
02436 #define NVIC_DIS0_INT14         0x00004000  ///< Interrupt 14 disable
02437 #define NVIC_DIS0_INT13         0x00002000  ///< Interrupt 13 disable
02438 #define NVIC_DIS0_INT12         0x00001000  ///< Interrupt 12 disable
02439 #define NVIC_DIS0_INT11         0x00000800  ///< Interrupt 11 disable
02440 #define NVIC_DIS0_INT10         0x00000400  ///< Interrupt 10 disable
02441 #define NVIC_DIS0_INT9          0x00000200  ///< Interrupt 9 disable
02442 #define NVIC_DIS0_INT8          0x00000100  ///< Interrupt 8 disable
02443 #define NVIC_DIS0_INT7          0x00000080  ///< Interrupt 7 disable
02444 #define NVIC_DIS0_INT6          0x00000040  ///< Interrupt 6 disable
02445 #define NVIC_DIS0_INT5          0x00000020  ///< Interrupt 5 disable
02446 #define NVIC_DIS0_INT4          0x00000010  ///< Interrupt 4 disable
02447 #define NVIC_DIS0_INT3          0x00000008  ///< Interrupt 3 disable
02448 #define NVIC_DIS0_INT2          0x00000004  ///< Interrupt 2 disable
02449 #define NVIC_DIS0_INT1          0x00000002  ///< Interrupt 1 disable
02450 #define NVIC_DIS0_INT0          0x00000001  ///< Interrupt 0 disable
02451 /*\}*/
02452
02456 /*\{*/
02457 #define NVIC_DIS1_INT59         0x08000000  ///< Interrupt 59 disable
02458 #define NVIC_DIS1_INT58         0x04000000  ///< Interrupt 58 disable
02459 #define NVIC_DIS1_INT57         0x02000000  ///< Interrupt 57 disable
02460 #define NVIC_DIS1_INT56         0x01000000  ///< Interrupt 56 disable
02461 #define NVIC_DIS1_INT55         0x00800000  ///< Interrupt 55 disable
02462 #define NVIC_DIS1_INT54         0x00400000  ///< Interrupt 54 disable
02463 #define NVIC_DIS1_INT53         0x00200000  ///< Interrupt 53 disable
02464 #define NVIC_DIS1_INT52         0x00100000  ///< Interrupt 52 disable
02465 #define NVIC_DIS1_INT51         0x00080000  ///< Interrupt 51 disable
02466 #define NVIC_DIS1_INT50         0x00040000  ///< Interrupt 50 disable
02467 #define NVIC_DIS1_INT49         0x00020000  ///< Interrupt 49 disable
02468 #define NVIC_DIS1_INT48         0x00010000  ///< Interrupt 48 disable
02469 #define NVIC_DIS1_INT47         0x00008000  ///< Interrupt 47 disable
02470 #define NVIC_DIS1_INT46         0x00004000  ///< Interrupt 46 disable
02471 #define NVIC_DIS1_INT45         0x00002000  ///< Interrupt 45 disable
02472 #define NVIC_DIS1_INT44         0x00001000  ///< Interrupt 44 disable
02473 #define NVIC_DIS1_INT43         0x00000800  ///< Interrupt 43 disable
02474 #define NVIC_DIS1_INT42         0x00000400  ///< Interrupt 42 disable
02475 #define NVIC_DIS1_INT41         0x00000200  ///< Interrupt 41 disable
02476 #define NVIC_DIS1_INT40         0x00000100  ///< Interrupt 40 disable
02477 #define NVIC_DIS1_INT39         0x00000080  ///< Interrupt 39 disable
02478 #define NVIC_DIS1_INT38         0x00000040  ///< Interrupt 38 disable
02479 #define NVIC_DIS1_INT37         0x00000020  ///< Interrupt 37 disable
02480 #define NVIC_DIS1_INT36         0x00000010  ///< Interrupt 36 disable
02481 #define NVIC_DIS1_INT35         0x00000008  ///< Interrupt 35 disable
02482 #define NVIC_DIS1_INT34         0x00000004  ///< Interrupt 34 disable
02483 #define NVIC_DIS1_INT33         0x00000002  ///< Interrupt 33 disable
02484 #define NVIC_DIS1_INT32         0x00000001  ///< Interrupt 32 disable
02485 /*\}*/
02486
02490 /*\{*/
02491 #define NVIC_PEND0_INT31        0x80000000  ///< Interrupt 31 pend
02492 #define NVIC_PEND0_INT30        0x40000000  ///< Interrupt 30 pend
02493 #define NVIC_PEND0_INT29        0x20000000  ///< Interrupt 29 pend
02494 #define NVIC_PEND0_INT28        0x10000000  ///< Interrupt 28 pend
02495 #define NVIC_PEND0_INT27        0x08000000  ///< Interrupt 27 pend
02496 #define NVIC_PEND0_INT26        0x04000000  ///< Interrupt 26 pend
02497 #define NVIC_PEND0_INT25        0x02000000  ///< Interrupt 25 pend
02498 #define NVIC_PEND0_INT24        0x01000000  ///< Interrupt 24 pend
02499 #define NVIC_PEND0_INT23        0x00800000  ///< Interrupt 23 pend
02500 #define NVIC_PEND0_INT22        0x00400000  ///< Interrupt 22 pend
02501 #define NVIC_PEND0_INT21        0x00200000  ///< Interrupt 21 pend
02502 #define NVIC_PEND0_INT20        0x00100000  ///< Interrupt 20 pend
02503 #define NVIC_PEND0_INT19        0x00080000  ///< Interrupt 19 pend
02504 #define NVIC_PEND0_INT18        0x00040000  ///< Interrupt 18 pend
02505 #define NVIC_PEND0_INT17        0x00020000  ///< Interrupt 17 pend
02506 #define NVIC_PEND0_INT16        0x00010000  ///< Interrupt 16 pend
02507 #define NVIC_PEND0_INT15        0x00008000  ///< Interrupt 15 pend
02508 #define NVIC_PEND0_INT14        0x00004000  ///< Interrupt 14 pend
02509 #define NVIC_PEND0_INT13        0x00002000  ///< Interrupt 13 pend
02510 #define NVIC_PEND0_INT12        0x00001000  ///< Interrupt 12 pend
02511 #define NVIC_PEND0_INT11        0x00000800  ///< Interrupt 11 pend
02512 #define NVIC_PEND0_INT10        0x00000400  ///< Interrupt 10 pend
02513 #define NVIC_PEND0_INT9         0x00000200  ///< Interrupt 9 pend
02514 #define NVIC_PEND0_INT8         0x00000100  ///< Interrupt 8 pend
02515 #define NVIC_PEND0_INT7         0x00000080  ///< Interrupt 7 pend
02516 #define NVIC_PEND0_INT6         0x00000040  ///< Interrupt 6 pend
02517 #define NVIC_PEND0_INT5         0x00000020  ///< Interrupt 5 pend
02518 #define NVIC_PEND0_INT4         0x00000010  ///< Interrupt 4 pend
02519 #define NVIC_PEND0_INT3         0x00000008  ///< Interrupt 3 pend
02520 #define NVIC_PEND0_INT2         0x00000004  ///< Interrupt 2 pend
02521 #define NVIC_PEND0_INT1         0x00000002  ///< Interrupt 1 pend
02522 #define NVIC_PEND0_INT0         0x00000001  ///< Interrupt 0 pend
02523 /*\}*/
02524
02528 /*\{*/
02529 #define NVIC_PEND1_INT59        0x08000000  ///< Interrupt 59 pend
02530 #define NVIC_PEND1_INT58        0x04000000  ///< Interrupt 58 pend
02531 #define NVIC_PEND1_INT57        0x02000000  ///< Interrupt 57 pend
02532 #define NVIC_PEND1_INT56        0x01000000  ///< Interrupt 56 pend
02533 #define NVIC_PEND1_INT55        0x00800000  ///< Interrupt 55 pend
02534 #define NVIC_PEND1_INT54        0x00400000  ///< Interrupt 54 pend
02535 #define NVIC_PEND1_INT53        0x00200000  ///< Interrupt 53 pend
02536 #define NVIC_PEND1_INT52        0x00100000  ///< Interrupt 52 pend
02537 #define NVIC_PEND1_INT51        0x00080000  ///< Interrupt 51 pend
02538 #define NVIC_PEND1_INT50        0x00040000  ///< Interrupt 50 pend
02539 #define NVIC_PEND1_INT49        0x00020000  ///< Interrupt 49 pend
02540 #define NVIC_PEND1_INT48        0x00010000  ///< Interrupt 48 pend
02541 #define NVIC_PEND1_INT47        0x00008000  ///< Interrupt 47 pend
02542 #define NVIC_PEND1_INT46        0x00004000  ///< Interrupt 46 pend
02543 #define NVIC_PEND1_INT45        0x00002000  ///< Interrupt 45 pend
02544 #define NVIC_PEND1_INT44        0x00001000  ///< Interrupt 44 pend
02545 #define NVIC_PEND1_INT43        0x00000800  ///< Interrupt 43 pend
02546 #define NVIC_PEND1_INT42        0x00000400  ///< Interrupt 42 pend
02547 #define NVIC_PEND1_INT41        0x00000200  ///< Interrupt 41 pend
02548 #define NVIC_PEND1_INT40        0x00000100  ///< Interrupt 40 pend
02549 #define NVIC_PEND1_INT39        0x00000080  ///< Interrupt 39 pend
02550 #define NVIC_PEND1_INT38        0x00000040  ///< Interrupt 38 pend
02551 #define NVIC_PEND1_INT37        0x00000020  ///< Interrupt 37 pend
02552 #define NVIC_PEND1_INT36        0x00000010  ///< Interrupt 36 pend
02553 #define NVIC_PEND1_INT35        0x00000008  ///< Interrupt 35 pend
02554 #define NVIC_PEND1_INT34        0x00000004  ///< Interrupt 34 pend
02555 #define NVIC_PEND1_INT33        0x00000002  ///< Interrupt 33 pend
02556 #define NVIC_PEND1_INT32        0x00000001  ///< Interrupt 32 pend
02557 /*\}*/
02558
02562 /*\{*/
02563 #define NVIC_UNPEND0_INT31      0x80000000  ///< Interrupt 31 unpend
02564 #define NVIC_UNPEND0_INT30      0x40000000  ///< Interrupt 30 unpend
02565 #define NVIC_UNPEND0_INT29      0x20000000  ///< Interrupt 29 unpend
02566 #define NVIC_UNPEND0_INT28      0x10000000  ///< Interrupt 28 unpend
02567 #define NVIC_UNPEND0_INT27      0x08000000  ///< Interrupt 27 unpend
02568 #define NVIC_UNPEND0_INT26      0x04000000  ///< Interrupt 26 unpend
02569 #define NVIC_UNPEND0_INT25      0x02000000  ///< Interrupt 25 unpend
02570 #define NVIC_UNPEND0_INT24      0x01000000  ///< Interrupt 24 unpend
02571 #define NVIC_UNPEND0_INT23      0x00800000  ///< Interrupt 23 unpend
02572 #define NVIC_UNPEND0_INT22      0x00400000  ///< Interrupt 22 unpend
02573 #define NVIC_UNPEND0_INT21      0x00200000  ///< Interrupt 21 unpend
02574 #define NVIC_UNPEND0_INT20      0x00100000  ///< Interrupt 20 unpend
02575 #define NVIC_UNPEND0_INT19      0x00080000  ///< Interrupt 19 unpend
02576 #define NVIC_UNPEND0_INT18      0x00040000  ///< Interrupt 18 unpend
02577 #define NVIC_UNPEND0_INT17      0x00020000  ///< Interrupt 17 unpend
02578 #define NVIC_UNPEND0_INT16      0x00010000  ///< Interrupt 16 unpend
02579 #define NVIC_UNPEND0_INT15      0x00008000  ///< Interrupt 15 unpend
02580 #define NVIC_UNPEND0_INT14      0x00004000  ///< Interrupt 14 unpend
02581 #define NVIC_UNPEND0_INT13      0x00002000  ///< Interrupt 13 unpend
02582 #define NVIC_UNPEND0_INT12      0x00001000  ///< Interrupt 12 unpend
02583 #define NVIC_UNPEND0_INT11      0x00000800  ///< Interrupt 11 unpend
02584 #define NVIC_UNPEND0_INT10      0x00000400  ///< Interrupt 10 unpend
02585 #define NVIC_UNPEND0_INT9       0x00000200  ///< Interrupt 9 unpend
02586 #define NVIC_UNPEND0_INT8       0x00000100  ///< Interrupt 8 unpend
02587 #define NVIC_UNPEND0_INT7       0x00000080  ///< Interrupt 7 unpend
02588 #define NVIC_UNPEND0_INT6       0x00000040  ///< Interrupt 6 unpend
02589 #define NVIC_UNPEND0_INT5       0x00000020  ///< Interrupt 5 unpend
02590 #define NVIC_UNPEND0_INT4       0x00000010  ///< Interrupt 4 unpend
02591 #define NVIC_UNPEND0_INT3       0x00000008  ///< Interrupt 3 unpend
02592 #define NVIC_UNPEND0_INT2       0x00000004  ///< Interrupt 2 unpend
02593 #define NVIC_UNPEND0_INT1       0x00000002  ///< Interrupt 1 unpend
02594 #define NVIC_UNPEND0_INT0       0x00000001  ///< Interrupt 0 unpend
02595 /*\}*/
02596
02600 /*\{*/
02601 #define NVIC_UNPEND1_INT59      0x08000000  ///< Interrupt 59 unpend
02602 #define NVIC_UNPEND1_INT58      0x04000000  ///< Interrupt 58 unpend
02603 #define NVIC_UNPEND1_INT57      0x02000000  ///< Interrupt 57 unpend
02604 #define NVIC_UNPEND1_INT56      0x01000000  ///< Interrupt 56 unpend
02605 #define NVIC_UNPEND1_INT55      0x00800000  ///< Interrupt 55 unpend
02606 #define NVIC_UNPEND1_INT54      0x00400000  ///< Interrupt 54 unpend
02607 #define NVIC_UNPEND1_INT53      0x00200000  ///< Interrupt 53 unpend
02608 #define NVIC_UNPEND1_INT52      0x00100000  ///< Interrupt 52 unpend
02609 #define NVIC_UNPEND1_INT51      0x00080000  ///< Interrupt 51 unpend
02610 #define NVIC_UNPEND1_INT50      0x00040000  ///< Interrupt 50 unpend
02611 #define NVIC_UNPEND1_INT49      0x00020000  ///< Interrupt 49 unpend
02612 #define NVIC_UNPEND1_INT48      0x00010000  ///< Interrupt 48 unpend
02613 #define NVIC_UNPEND1_INT47      0x00008000  ///< Interrupt 47 unpend
02614 #define NVIC_UNPEND1_INT46      0x00004000  ///< Interrupt 46 unpend
02615 #define NVIC_UNPEND1_INT45      0x00002000  ///< Interrupt 45 unpend
02616 #define NVIC_UNPEND1_INT44      0x00001000  ///< Interrupt 44 unpend
02617 #define NVIC_UNPEND1_INT43      0x00000800  ///< Interrupt 43 unpend
02618 #define NVIC_UNPEND1_INT42      0x00000400  ///< Interrupt 42 unpend
02619 #define NVIC_UNPEND1_INT41      0x00000200  ///< Interrupt 41 unpend
02620 #define NVIC_UNPEND1_INT40      0x00000100  ///< Interrupt 40 unpend
02621 #define NVIC_UNPEND1_INT39      0x00000080  ///< Interrupt 39 unpend
02622 #define NVIC_UNPEND1_INT38      0x00000040  ///< Interrupt 38 unpend
02623 #define NVIC_UNPEND1_INT37      0x00000020  ///< Interrupt 37 unpend
02624 #define NVIC_UNPEND1_INT36      0x00000010  ///< Interrupt 36 unpend
02625 #define NVIC_UNPEND1_INT35      0x00000008  ///< Interrupt 35 unpend
02626 #define NVIC_UNPEND1_INT34      0x00000004  ///< Interrupt 34 unpend
02627 #define NVIC_UNPEND1_INT33      0x00000002  ///< Interrupt 33 unpend
02628 #define NVIC_UNPEND1_INT32      0x00000001  ///< Interrupt 32 unpend
02629 /*\}*/
02630
02634 /*\{*/
02635 #define NVIC_ACTIVE0_INT31      0x80000000  ///< Interrupt 31 active
02636 #define NVIC_ACTIVE0_INT30      0x40000000  ///< Interrupt 30 active
02637 #define NVIC_ACTIVE0_INT29      0x20000000  ///< Interrupt 29 active
02638 #define NVIC_ACTIVE0_INT28      0x10000000  ///< Interrupt 28 active
02639 #define NVIC_ACTIVE0_INT27      0x08000000  ///< Interrupt 27 active
02640 #define NVIC_ACTIVE0_INT26      0x04000000  ///< Interrupt 26 active
02641 #define NVIC_ACTIVE0_INT25      0x02000000  ///< Interrupt 25 active
02642 #define NVIC_ACTIVE0_INT24      0x01000000  ///< Interrupt 24 active
02643 #define NVIC_ACTIVE0_INT23      0x00800000  ///< Interrupt 23 active
02644 #define NVIC_ACTIVE0_INT22      0x00400000  ///< Interrupt 22 active
02645 #define NVIC_ACTIVE0_INT21      0x00200000  ///< Interrupt 21 active
02646 #define NVIC_ACTIVE0_INT20      0x00100000  ///< Interrupt 20 active
02647 #define NVIC_ACTIVE0_INT19      0x00080000  ///< Interrupt 19 active
02648 #define NVIC_ACTIVE0_INT18      0x00040000  ///< Interrupt 18 active
02649 #define NVIC_ACTIVE0_INT17      0x00020000  ///< Interrupt 17 active
02650 #define NVIC_ACTIVE0_INT16      0x00010000  ///< Interrupt 16 active
02651 #define NVIC_ACTIVE0_INT15      0x00008000  ///< Interrupt 15 active
02652 #define NVIC_ACTIVE0_INT14      0x00004000  ///< Interrupt 14 active
02653 #define NVIC_ACTIVE0_INT13      0x00002000  ///< Interrupt 13 active
02654 #define NVIC_ACTIVE0_INT12      0x00001000  ///< Interrupt 12 active
02655 #define NVIC_ACTIVE0_INT11      0x00000800  ///< Interrupt 11 active
02656 #define NVIC_ACTIVE0_INT10      0x00000400  ///< Interrupt 10 active
02657 #define NVIC_ACTIVE0_INT9       0x00000200  ///< Interrupt 9 active
02658 #define NVIC_ACTIVE0_INT8       0x00000100  ///< Interrupt 8 active
02659 #define NVIC_ACTIVE0_INT7       0x00000080  ///< Interrupt 7 active
02660 #define NVIC_ACTIVE0_INT6       0x00000040  ///< Interrupt 6 active
02661 #define NVIC_ACTIVE0_INT5       0x00000020  ///< Interrupt 5 active
02662 #define NVIC_ACTIVE0_INT4       0x00000010  ///< Interrupt 4 active
02663 #define NVIC_ACTIVE0_INT3       0x00000008  ///< Interrupt 3 active
02664 #define NVIC_ACTIVE0_INT2       0x00000004  ///< Interrupt 2 active
02665 #define NVIC_ACTIVE0_INT1       0x00000002  ///< Interrupt 1 active
02666 #define NVIC_ACTIVE0_INT0       0x00000001  ///< Interrupt 0 active
02667 /*\}*/
02668
02672 /*\{*/
02673 #define NVIC_ACTIVE1_INT59      0x08000000  ///< Interrupt 59 active
02674 #define NVIC_ACTIVE1_INT58      0x04000000  ///< Interrupt 58 active
02675 #define NVIC_ACTIVE1_INT57      0x02000000  ///< Interrupt 57 active
02676 #define NVIC_ACTIVE1_INT56      0x01000000  ///< Interrupt 56 active
02677 #define NVIC_ACTIVE1_INT55      0x00800000  ///< Interrupt 55 active
02678 #define NVIC_ACTIVE1_INT54      0x00400000  ///< Interrupt 54 active
02679 #define NVIC_ACTIVE1_INT53      0x00200000  ///< Interrupt 53 active
02680 #define NVIC_ACTIVE1_INT52      0x00100000  ///< Interrupt 52 active
02681 #define NVIC_ACTIVE1_INT51      0x00080000  ///< Interrupt 51 active
02682 #define NVIC_ACTIVE1_INT50      0x00040000  ///< Interrupt 50 active
02683 #define NVIC_ACTIVE1_INT49      0x00020000  ///< Interrupt 49 active
02684 #define NVIC_ACTIVE1_INT48      0x00010000  ///< Interrupt 48 active
02685 #define NVIC_ACTIVE1_INT47      0x00008000  ///< Interrupt 47 active
02686 #define NVIC_ACTIVE1_INT46      0x00004000  ///< Interrupt 46 active
02687 #define NVIC_ACTIVE1_INT45      0x00002000  ///< Interrupt 45 active
02688 #define NVIC_ACTIVE1_INT44      0x00001000  ///< Interrupt 44 active
02689 #define NVIC_ACTIVE1_INT43      0x00000800  ///< Interrupt 43 active
02690 #define NVIC_ACTIVE1_INT42      0x00000400  ///< Interrupt 42 active
02691 #define NVIC_ACTIVE1_INT41      0x00000200  ///< Interrupt 41 active
02692 #define NVIC_ACTIVE1_INT40      0x00000100  ///< Interrupt 40 active
02693 #define NVIC_ACTIVE1_INT39      0x00000080  ///< Interrupt 39 active
02694 #define NVIC_ACTIVE1_INT38      0x00000040  ///< Interrupt 38 active
02695 #define NVIC_ACTIVE1_INT37      0x00000020  ///< Interrupt 37 active
02696 #define NVIC_ACTIVE1_INT36      0x00000010  ///< Interrupt 36 active
02697 #define NVIC_ACTIVE1_INT35      0x00000008  ///< Interrupt 35 active
02698 #define NVIC_ACTIVE1_INT34      0x00000004  ///< Interrupt 34 active
02699 #define NVIC_ACTIVE1_INT33      0x00000002  ///< Interrupt 33 active
02700 #define NVIC_ACTIVE1_INT32      0x00000001  ///< Interrupt 32 active
02701 /*\}*/
02702
02706 /*\{*/
02707 #define NVIC_PRI0_INT3_M        0xFF000000  ///< Interrupt 3 priority mask
02708 #define NVIC_PRI0_INT2_M        0x00FF0000  ///< Interrupt 2 priority mask
02709 #define NVIC_PRI0_INT1_M        0x0000FF00  ///< Interrupt 1 priority mask
02710 #define NVIC_PRI0_INT0_M        0x000000FF  ///< Interrupt 0 priority mask
02711 #define NVIC_PRI0_INT3_S        24
02712 #define NVIC_PRI0_INT2_S        16
02713 #define NVIC_PRI0_INT1_S        8
02714 #define NVIC_PRI0_INT0_S        0
02715 /*\}*/
02716
02720 /*\{*/
02721 #define NVIC_PRI1_INT7_M        0xFF000000  ///< Interrupt 7 priority mask
02722 #define NVIC_PRI1_INT6_M        0x00FF0000  ///< Interrupt 6 priority mask
02723 #define NVIC_PRI1_INT5_M        0x0000FF00  ///< Interrupt 5 priority mask
02724 #define NVIC_PRI1_INT4_M        0x000000FF  ///< Interrupt 4 priority mask
02725 #define NVIC_PRI1_INT7_S        24
02726 #define NVIC_PRI1_INT6_S        16
02727 #define NVIC_PRI1_INT5_S        8
02728 #define NVIC_PRI1_INT4_S        0
02729 /*\}*/
02730
02734 /*\{*/
02735 #define NVIC_PRI2_INT11_M       0xFF000000  ///< Interrupt 11 priority mask
02736 #define NVIC_PRI2_INT10_M       0x00FF0000  ///< Interrupt 10 priority mask
02737 #define NVIC_PRI2_INT9_M        0x0000FF00  ///< Interrupt 9 priority mask
02738 #define NVIC_PRI2_INT8_M        0x000000FF  ///< Interrupt 8 priority mask
02739 #define NVIC_PRI2_INT11_S       24
02740 #define NVIC_PRI2_INT10_S       16
02741 #define NVIC_PRI2_INT9_S        8
02742 #define NVIC_PRI2_INT8_S        0
02743 /*\}*/
02744
02748 /*\{*/
02749 #define NVIC_PRI3_INT15_M       0xFF000000  ///< Interrupt 15 priority mask
02750 #define NVIC_PRI3_INT14_M       0x00FF0000  ///< Interrupt 14 priority mask
02751 #define NVIC_PRI3_INT13_M       0x0000FF00  ///< Interrupt 13 priority mask
02752 #define NVIC_PRI3_INT12_M       0x000000FF  ///< Interrupt 12 priority mask
02753 #define NVIC_PRI3_INT15_S       24
02754 #define NVIC_PRI3_INT14_S       16
02755 #define NVIC_PRI3_INT13_S       8
02756 #define NVIC_PRI3_INT12_S       0
02757 /*\}*/
02758
02762 /*\{*/
02763 #define NVIC_PRI4_INT19_M       0xFF000000  ///< Interrupt 19 priority mask
02764 #define NVIC_PRI4_INT18_M       0x00FF0000  ///< Interrupt 18 priority mask
02765 #define NVIC_PRI4_INT17_M       0x0000FF00  ///< Interrupt 17 priority mask
02766 #define NVIC_PRI4_INT16_M       0x000000FF  ///< Interrupt 16 priority mask
02767 #define NVIC_PRI4_INT19_S       24
02768 #define NVIC_PRI4_INT18_S       16
02769 #define NVIC_PRI4_INT17_S       8
02770 #define NVIC_PRI4_INT16_S       0
02771 /*\}*/
02772
02776 /*\{*/
02777 #define NVIC_PRI5_INT23_M       0xFF000000  ///< Interrupt 23 priority mask
02778 #define NVIC_PRI5_INT22_M       0x00FF0000  ///< Interrupt 22 priority mask
02779 #define NVIC_PRI5_INT21_M       0x0000FF00  ///< Interrupt 21 priority mask
02780 #define NVIC_PRI5_INT20_M       0x000000FF  ///< Interrupt 20 priority mask
02781 #define NVIC_PRI5_INT23_S       24
02782 #define NVIC_PRI5_INT22_S       16
02783 #define NVIC_PRI5_INT21_S       8
02784 #define NVIC_PRI5_INT20_S       0
02785 /*\}*/
02786
02790 /*\{*/
02791 #define NVIC_PRI6_INT27_M       0xFF000000  ///< Interrupt 27 priority mask
02792 #define NVIC_PRI6_INT26_M       0x00FF0000  ///< Interrupt 26 priority mask
02793 #define NVIC_PRI6_INT25_M       0x0000FF00  ///< Interrupt 25 priority mask
02794 #define NVIC_PRI6_INT24_M       0x000000FF  ///< Interrupt 24 priority mask
02795 #define NVIC_PRI6_INT27_S       24
02796 #define NVIC_PRI6_INT26_S       16
02797 #define NVIC_PRI6_INT25_S       8
02798 #define NVIC_PRI6_INT24_S       0
02799 /*\}*/
02800
02804 /*\{*/
02805 #define NVIC_PRI7_INT31_M       0xFF000000  ///< Interrupt 31 priority mask
02806 #define NVIC_PRI7_INT30_M       0x00FF0000  ///< Interrupt 30 priority mask
02807 #define NVIC_PRI7_INT29_M       0x0000FF00  ///< Interrupt 29 priority mask
02808 #define NVIC_PRI7_INT28_M       0x000000FF  ///< Interrupt 28 priority mask
02809 #define NVIC_PRI7_INT31_S       24
02810 #define NVIC_PRI7_INT30_S       16
02811 #define NVIC_PRI7_INT29_S       8
02812 #define NVIC_PRI7_INT28_S       0
02813 /*\}*/
02814
02818 /*\{*/
02819 #define NVIC_PRI8_INT35_M       0xFF000000  ///< Interrupt 35 priority mask
02820 #define NVIC_PRI8_INT34_M       0x00FF0000  ///< Interrupt 34 priority mask
02821 #define NVIC_PRI8_INT33_M       0x0000FF00  ///< Interrupt 33 priority mask
02822 #define NVIC_PRI8_INT32_M       0x000000FF  ///< Interrupt 32 priority mask
02823 #define NVIC_PRI8_INT35_S       24
02824 #define NVIC_PRI8_INT34_S       16
02825 #define NVIC_PRI8_INT33_S       8
02826 #define NVIC_PRI8_INT32_S       0
02827 /*\}*/
02828
02832 /*\{*/
02833 #define NVIC_PRI9_INT39_M       0xFF000000  ///< Interrupt 39 priority mask
02834 #define NVIC_PRI9_INT38_M       0x00FF0000  ///< Interrupt 38 priority mask
02835 #define NVIC_PRI9_INT37_M       0x0000FF00  ///< Interrupt 37 priority mask
02836 #define NVIC_PRI9_INT36_M       0x000000FF  ///< Interrupt 36 priority mask
02837 #define NVIC_PRI9_INT39_S       24
02838 #define NVIC_PRI9_INT38_S       16
02839 #define NVIC_PRI9_INT37_S       8
02840 #define NVIC_PRI9_INT36_S       0
02841 /*\}*/
02842
02846 /*\{*/
02847 #define NVIC_PRI10_INT43_M      0xFF000000  ///< Interrupt 43 priority mask
02848 #define NVIC_PRI10_INT42_M      0x00FF0000  ///< Interrupt 42 priority mask
02849 #define NVIC_PRI10_INT41_M      0x0000FF00  ///< Interrupt 41 priority mask
02850 #define NVIC_PRI10_INT40_M      0x000000FF  ///< Interrupt 40 priority mask
02851 #define NVIC_PRI10_INT43_S      24
02852 #define NVIC_PRI10_INT42_S      16
02853 #define NVIC_PRI10_INT41_S      8
02854 #define NVIC_PRI10_INT40_S      0
02855 /*\}*/
02856
02860 /*\{*/
02861 #define NVIC_CPUID_IMP_M        0xFF000000  ///< Implementer
02862 #define NVIC_CPUID_VAR_M        0x00F00000  ///< Variant
02863 #define NVIC_CPUID_PARTNO_M     0x0000FFF0  ///< Processor part number
02864 #define NVIC_CPUID_REV_M        0x0000000F  ///< Revision
02865 /*\}*/
02866
02870 /*\{*/
02871 #define NVIC_INT_CTRL_NMI_SET   0x80000000  ///< Pend a NMI
02872 #define NVIC_INT_CTRL_PEND_SV   0x10000000  ///< Pend a PendSV
02873 #define NVIC_INT_CTRL_UNPEND_SV 0x08000000  ///< Unpend a PendSV
02874 #define NVIC_INT_CTRL_PENDSTSET 0x04000000  ///< Set pending SysTick interrupt
02875 #define NVIC_INT_CTRL_PENDSTCLR 0x02000000  ///< Clear pending SysTick interrupt
02876 #define NVIC_INT_CTRL_ISR_PRE   0x00800000  ///< Debug interrupt handling
02877 #define NVIC_INT_CTRL_ISR_PEND  0x00400000  ///< Debug interrupt pending
02878 #define NVIC_INT_CTRL_VEC_PEN_M 0x003FF000  ///< Highest pending exception
02879 #define NVIC_INT_CTRL_RET_BASE  0x00000800  ///< Return to base
02880 #define NVIC_INT_CTRL_VEC_ACT_M 0x000003FF  ///< Current active exception
02881 #define NVIC_INT_CTRL_VEC_PEN_S 12
02882 #define NVIC_INT_CTRL_VEC_ACT_S 0
02883 /*\}*/
02884
02888 /*\{*/
02889 #define NVIC_VTABLE_BASE        0x20000000  ///< Vector table base
02890 #define NVIC_VTABLE_OFFSET_M    0x1FFFFF00  ///< Vector table offset
02891 #define NVIC_VTABLE_OFFSET_S    8
02892 /*\}*/
02893
02897 /*\{*/
02898 #define NVIC_APINT_VECTKEY_M    0xFFFF0000  ///< Vector key mask
02899 #define NVIC_APINT_VECTKEY      0x05FA0000  ///< Vector key
02900 #define NVIC_APINT_ENDIANESS    0x00008000  ///< Data endianess
02901 #define NVIC_APINT_PRIGROUP_M   0x00000700  ///< Priority group
02902 #define NVIC_APINT_PRIGROUP_0_8 0x00000700  ///< Priority group 0.8 split
02903 #define NVIC_APINT_PRIGROUP_1_7 0x00000600  ///< Priority group 1.7 split
02904 #define NVIC_APINT_PRIGROUP_2_6 0x00000500  ///< Priority group 2.6 split
02905 #define NVIC_APINT_PRIGROUP_3_5 0x00000400  ///< Priority group 3.5 split
02906 #define NVIC_APINT_PRIGROUP_4_4 0x00000300  ///< Priority group 4.4 split
02907 #define NVIC_APINT_PRIGROUP_5_3 0x00000200  ///< Priority group 5.3 split
02908 #define NVIC_APINT_PRIGROUP_6_2 0x00000100  ///< Priority group 6.2 split
02909 #define NVIC_APINT_SYSRESETREQ  0x00000004  ///< System reset request
02910 #define NVIC_APINT_VECT_CLR_ACT 0x00000002  ///< Clear active NMI/fault info
02911 #define NVIC_APINT_VECT_RESET   0x00000001  ///< System reset
02912 #define NVIC_APINT_PRIGROUP_7_1 0x00000000  ///< Priority group 7.1 split
02913 /*\}*/
02914
02918 /*\{*/
02919 #define NVIC_SYS_CTRL_SEVONPEND 0x00000010  ///< Wakeup on pend
02920 #define NVIC_SYS_CTRL_SLEEPDEEP 0x00000004  ///< Deep sleep enable
02921 #define NVIC_SYS_CTRL_SLEEPEXIT 0x00000002  ///< Sleep on ISR exit
02922 /*\}*/
02923
02927 /*\{*/
02928 #define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100  ///< Ignore bus fault in NMI/fault
02929 #define NVIC_CFG_CTRL_DIV0      0x00000010  ///< Trap on divide by 0
02930 #define NVIC_CFG_CTRL_UNALIGNED 0x00000008  ///< Trap on unaligned access
02931 #define NVIC_CFG_CTRL_DEEP_PEND 0x00000004  ///< Allow deep interrupt trigger
02932 #define NVIC_CFG_CTRL_MAIN_PEND 0x00000002  ///< Allow main interrupt trigger
02933 #define NVIC_CFG_CTRL_BASE_THR  0x00000001  ///< Thread state control
02934 /*\}*/
02935
02939 /*\{*/
02940 #define NVIC_SYS_PRI1_RES_M     0xFF000000  ///< Priority of reserved handler
02941 #define NVIC_SYS_PRI1_USAGE_M   0x00FF0000  ///< Priority of usage fault handler
02942 #define NVIC_SYS_PRI1_BUS_M     0x0000FF00  ///< Priority of bus fault handler
02943 #define NVIC_SYS_PRI1_MEM_M     0x000000FF  ///< Priority of mem manage handler
02944 #define NVIC_SYS_PRI1_USAGE_S   16
02945 #define NVIC_SYS_PRI1_BUS_S     8
02946 #define NVIC_SYS_PRI1_MEM_S     0
02947 /*\}*/
02948
02952 /*\{*/
02953 #define NVIC_SYS_PRI2_SVC_M     0xFF000000  ///< Priority of SVCall handler
02954 #define NVIC_SYS_PRI2_RES_M     0x00FFFFFF  ///< Priority of reserved handlers
02955 #define NVIC_SYS_PRI2_SVC_S     24
02956 /*\}*/
02957
02961 /*\{*/
02962 #define NVIC_SYS_PRI3_TICK_M    0xFF000000  ///< Priority of Sys Tick handler
02963 #define NVIC_SYS_PRI3_PENDSV_M  0x00FF0000  ///< Priority of PendSV handler
02964 #define NVIC_SYS_PRI3_RES_M     0x0000FF00  ///< Priority of reserved handler
02965 #define NVIC_SYS_PRI3_DEBUG_M   0x000000FF  ///< Priority of debug handler
02966 #define NVIC_SYS_PRI3_TICK_S    24
02967 #define NVIC_SYS_PRI3_PENDSV_S  16
02968 #define NVIC_SYS_PRI3_DEBUG_S   0
02969 /*\}*/
02970
02975 /*\{*/
02976 #define NVIC_SYS_HND_CTRL_USAGE 0x00040000  ///< Usage fault enable
02977 #define NVIC_SYS_HND_CTRL_BUS   0x00020000  ///< Bus fault enable
02978 #define NVIC_SYS_HND_CTRL_MEM   0x00010000  ///< Mem manage fault enable
02979 #define NVIC_SYS_HND_CTRL_SVC   0x00008000  ///< SVCall is pended
02980 #define NVIC_SYS_HND_CTRL_BUSP  0x00004000  ///< Bus fault is pended
02981 #define NVIC_SYS_HND_CTRL_TICK  0x00000800  ///< Sys tick is active
02982 #define NVIC_SYS_HND_CTRL_PNDSV 0x00000400  ///< PendSV is active
02983 #define NVIC_SYS_HND_CTRL_MON   0x00000100  ///< Monitor is active
02984 #define NVIC_SYS_HND_CTRL_SVCA  0x00000080  ///< SVCall is active
02985 #define NVIC_SYS_HND_CTRL_USGA  0x00000008  ///< Usage fault is active
02986 #define NVIC_SYS_HND_CTRL_BUSA  0x00000002  ///< Bus fault is active
02987 #define NVIC_SYS_HND_CTRL_MEMA  0x00000001  ///< Mem manage is active
02988 /*\}*/
02989
02994 /*\{*/
02995 #define NVIC_FAULT_STAT_DIV0    0x02000000  ///< Divide by zero fault
02996 #define NVIC_FAULT_STAT_UNALIGN 0x01000000  ///< Unaligned access fault
02997 #define NVIC_FAULT_STAT_NOCP    0x00080000  ///< No coprocessor fault
02998 #define NVIC_FAULT_STAT_INVPC   0x00040000  ///< Invalid PC fault
02999 #define NVIC_FAULT_STAT_INVSTAT 0x00020000  ///< Invalid state fault
03000 #define NVIC_FAULT_STAT_UNDEF   0x00010000  ///< Undefined instruction fault
03001 #define NVIC_FAULT_STAT_BFARV   0x00008000  ///< BFAR is valid
03002 #define NVIC_FAULT_STAT_BSTKE   0x00001000  ///< Stack bus fault
03003 #define NVIC_FAULT_STAT_BUSTKE  0x00000800  ///< Unstack bus fault
03004 #define NVIC_FAULT_STAT_IMPRE   0x00000400  ///< Imprecise data bus error
03005 #define NVIC_FAULT_STAT_PRECISE 0x00000200  ///< Precise data bus error
03006 #define NVIC_FAULT_STAT_IBUS    0x00000100  ///< Instruction bus fault
03007 #define NVIC_FAULT_STAT_MMARV   0x00000080  ///< MMAR is valid
03008 #define NVIC_FAULT_STAT_MSTKE   0x00000010  ///< Stack access violation
03009 #define NVIC_FAULT_STAT_MUSTKE  0x00000008  ///< Unstack access violation
03010 #define NVIC_FAULT_STAT_DERR    0x00000002  ///< Data access violation
03011 #define NVIC_FAULT_STAT_IERR    0x00000001  ///< Instruction access violation
03012 /*\}*/
03013
03018 /*\{*/
03019 #define NVIC_HFAULT_STAT_DBG    0x80000000  ///< Debug event
03020 #define NVIC_HFAULT_STAT_FORCED 0x40000000  ///< Cannot execute fault handler
03021 #define NVIC_HFAULT_STAT_VECT   0x00000002  ///< Vector table read fault
03022 /*\}*/
03023
03028 /*\{*/
03029 #define NVIC_DEBUG_STAT_EXTRNL  0x00000010  ///< EDBGRQ asserted
03030 #define NVIC_DEBUG_STAT_VCATCH  0x00000008  ///< Vector catch
03031 #define NVIC_DEBUG_STAT_DWTTRAP 0x00000004  ///< DWT match
03032 #define NVIC_DEBUG_STAT_BKPT    0x00000002  ///< Breakpoint instruction
03033 #define NVIC_DEBUG_STAT_HALTED  0x00000001  ///< Halt request
03034 /*\}*/
03035
03039 /*\{*/
03040 #define NVIC_MM_ADDR_M          0xFFFFFFFF  ///< Data fault address
03041 #define NVIC_MM_ADDR_S          0
03042 /*\}*/
03043
03048 /*\{*/
03049 #define NVIC_FAULT_ADDR_M       0xFFFFFFFF  ///< Data bus fault address
03050 #define NVIC_FAULT_ADDR_S       0
03051 /*\}*/
03052
03056 /*\{*/
03057 #define NVIC_MPU_TYPE_IREGION_M 0x00FF0000  ///< Number of I regions
03058 #define NVIC_MPU_TYPE_DREGION_M 0x0000FF00  ///< Number of D regions
03059 #define NVIC_MPU_TYPE_SEPARATE  0x00000001  ///< Separate or unified MPU
03060 #define NVIC_MPU_TYPE_IREGION_S 16
03061 #define NVIC_MPU_TYPE_DREGION_S 8
03062 /*\}*/
03063
03067 /*\{*/
03068 #define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004  ///< MPU default region in priv mode
03069 #define NVIC_MPU_CTRL_HFNMIENA  0x00000002  ///< MPU enabled during faults
03070 #define NVIC_MPU_CTRL_ENABLE    0x00000001  ///< MPU enable
03071 /*\}*/
03072
03077 /*\{*/
03078 #define NVIC_MPU_NUMBER_M       0x000000FF  ///< MPU region to access
03079 #define NVIC_MPU_NUMBER_S       0
03080 /*\}*/
03081
03085 /*\{*/
03086 #define NVIC_MPU_BASE_ADDR_M    0xFFFFFFE0  ///< Base address mask
03087 #define NVIC_MPU_BASE_VALID     0x00000010  ///< Region number valid
03088 #define NVIC_MPU_BASE_REGION_M  0x0000000F  ///< Region number
03089 #define NVIC_MPU_BASE_ADDR_S    8
03090 #define NVIC_MPU_BASE_REGION_S  0
03091 /*\}*/
03092
03096 /*\{*/
03097 #define NVIC_MPU_ATTR_M         0xFFFF0000  ///< Attributes
03098 #define NVIC_MPU_ATTR_AP_NO_NO  0x00000000  ///< prv: no access, usr: no access
03099 #define NVIC_MPU_ATTR_BUFFRABLE 0x00010000  ///< Bufferable
03100 #define NVIC_MPU_ATTR_CACHEABLE 0x00020000  ///< Cacheable
03101 #define NVIC_MPU_ATTR_SHAREABLE 0x00040000  ///< Shareable
03102 #define NVIC_MPU_ATTR_TEX_M     0x00380000  ///< Type extension mask
03103 #define NVIC_MPU_ATTR_AP_RW_NO  0x01000000  ///< prv: rw, usr: none
03104 #define NVIC_MPU_ATTR_AP_RW_RO  0x02000000  ///< prv: rw, usr: read-only
03105 #define NVIC_MPU_ATTR_AP_RW_RW  0x03000000  ///< prv: rw, usr: rw
03106 #define NVIC_MPU_ATTR_AP_RO_NO  0x05000000  ///< prv: ro, usr: none
03107 #define NVIC_MPU_ATTR_AP_RO_RO  0x06000000  ///< prv: ro, usr: ro
03108 #define NVIC_MPU_ATTR_AP_M      0x07000000  ///< Access permissions mask
03109 #define NVIC_MPU_ATTR_XN        0x10000000  ///< Execute disable
03110 #define NVIC_MPU_ATTR_SRD_M     0x0000FF00  ///< Sub-region disable mask
03111 #define NVIC_MPU_ATTR_SRD_0     0x00000100  ///< Sub-region 0 disable
03112 #define NVIC_MPU_ATTR_SRD_1     0x00000200  ///< Sub-region 1 disable
03113 #define NVIC_MPU_ATTR_SRD_2     0x00000400  ///< Sub-region 2 disable
03114 #define NVIC_MPU_ATTR_SRD_3     0x00000800  ///< Sub-region 3 disable
03115 #define NVIC_MPU_ATTR_SRD_4     0x00001000  ///< Sub-region 4 disable
03116 #define NVIC_MPU_ATTR_SRD_5     0x00002000  ///< Sub-region 5 disable
03117 #define NVIC_MPU_ATTR_SRD_6     0x00004000  ///< Sub-region 6 disable
03118 #define NVIC_MPU_ATTR_SRD_7     0x00008000  ///< Sub-region 7 disable
03119 #define NVIC_MPU_ATTR_SIZE_M    0x0000003E  ///< Region size mask
03120 #define NVIC_MPU_ATTR_SIZE_32B  0x00000008  ///< Region size 32 bytes
03121 #define NVIC_MPU_ATTR_SIZE_64B  0x0000000A  ///< Region size 64 bytes
03122 #define NVIC_MPU_ATTR_SIZE_128B 0x0000000C  ///< Region size 128 bytes
03123 #define NVIC_MPU_ATTR_SIZE_256B 0x0000000E  ///< Region size 256 bytes
03124 #define NVIC_MPU_ATTR_SIZE_512B 0x00000010  ///< Region size 512 bytes
03125 #define NVIC_MPU_ATTR_SIZE_1K   0x00000012  ///< Region size 1 Kbytes
03126 #define NVIC_MPU_ATTR_SIZE_2K   0x00000014  ///< Region size 2 Kbytes
03127 #define NVIC_MPU_ATTR_SIZE_4K   0x00000016  ///< Region size 4 Kbytes
03128 #define NVIC_MPU_ATTR_SIZE_8K   0x00000018  ///< Region size 8 Kbytes
03129 #define NVIC_MPU_ATTR_SIZE_16K  0x0000001A  ///< Region size 16 Kbytes
03130 #define NVIC_MPU_ATTR_SIZE_32K  0x0000001C  ///< Region size 32 Kbytes
03131 #define NVIC_MPU_ATTR_SIZE_64K  0x0000001E  ///< Region size 64 Kbytes
03132 #define NVIC_MPU_ATTR_SIZE_128K 0x00000020  ///< Region size 128 Kbytes
03133 #define NVIC_MPU_ATTR_SIZE_256K 0x00000022  ///< Region size 256 Kbytes
03134 #define NVIC_MPU_ATTR_SIZE_512K 0x00000024  ///< Region size 512 Kbytes
03135 #define NVIC_MPU_ATTR_SIZE_1M   0x00000026  ///< Region size 1 Mbytes
03136 #define NVIC_MPU_ATTR_SIZE_2M   0x00000028  ///< Region size 2 Mbytes
03137 #define NVIC_MPU_ATTR_SIZE_4M   0x0000002A  ///< Region size 4 Mbytes
03138 #define NVIC_MPU_ATTR_SIZE_8M   0x0000002C  ///< Region size 8 Mbytes
03139 #define NVIC_MPU_ATTR_SIZE_16M  0x0000002E  ///< Region size 16 Mbytes
03140 #define NVIC_MPU_ATTR_SIZE_32M  0x00000030  ///< Region size 32 Mbytes
03141 #define NVIC_MPU_ATTR_SIZE_64M  0x00000032  ///< Region size 64 Mbytes
03142 #define NVIC_MPU_ATTR_SIZE_128M 0x00000034  ///< Region size 128 Mbytes
03143 #define NVIC_MPU_ATTR_SIZE_256M 0x00000036  ///< Region size 256 Mbytes
03144 #define NVIC_MPU_ATTR_SIZE_512M 0x00000038  ///< Region size 512 Mbytes
03145 #define NVIC_MPU_ATTR_SIZE_1G   0x0000003A  ///< Region size 1 Gbytes
03146 #define NVIC_MPU_ATTR_SIZE_2G   0x0000003C  ///< Region size 2 Gbytes
03147 #define NVIC_MPU_ATTR_SIZE_4G   0x0000003E  ///< Region size 4 Gbytes
03148 #define NVIC_MPU_ATTR_ENABLE    0x00000001  ///< Region enable
03149 /*\}*/
03150
03154 /*\{*/
03155 #define NVIC_DBG_CTRL_DBGKEY_M  0xFFFF0000  ///< Debug key mask
03156 #define NVIC_DBG_CTRL_DBGKEY    0xA05F0000  ///< Debug key
03157 #define NVIC_DBG_CTRL_S_RESET_ST \
03158                                 0x02000000  ///< Core has reset since last read
03159 #define NVIC_DBG_CTRL_S_RETIRE_ST \
03160                                 0x01000000  ///< Core has executed insruction
03161
03162 #define NVIC_DBG_CTRL_S_LOCKUP  0x00080000  ///< Core is locked up
03163 #define NVIC_DBG_CTRL_S_SLEEP   0x00040000  ///< Core is sleeping
03164 #define NVIC_DBG_CTRL_S_HALT    0x00020000  ///< Core status on halt
03165 #define NVIC_DBG_CTRL_S_REGRDY  0x00010000  ///< Register read/write available
03166 #define NVIC_DBG_CTRL_C_SNAPSTALL \
03167                                 0x00000020  ///< Breaks a stalled load/store
03168 #define NVIC_DBG_CTRL_C_MASKINT 0x00000008  ///< Mask interrupts when stepping
03169 #define NVIC_DBG_CTRL_C_STEP    0x00000004  ///< Step the core
03170 #define NVIC_DBG_CTRL_C_HALT    0x00000002  ///< Halt the core
03171 #define NVIC_DBG_CTRL_C_DEBUGEN 0x00000001  ///< Enable debug
03172 /*\}*/
03173
03177 /*\{*/
03178 #define NVIC_DBG_XFER_REG_WNR   0x00010000  ///< Write or not read
03179 #define NVIC_DBG_XFER_REG_SEL_M 0x0000001F  ///< Register
03180 #define NVIC_DBG_XFER_REG_CFBP  0x00000014  ///< Control/Fault/BasePri/PriMask
03181 #define NVIC_DBG_XFER_REG_DSP   0x00000013  ///< Deep SP
03182 #define NVIC_DBG_XFER_REG_PSP   0x00000012  ///< Process SP
03183 #define NVIC_DBG_XFER_REG_MSP   0x00000011  ///< Main SP
03184 #define NVIC_DBG_XFER_REG_FLAGS 0x00000010  ///< xPSR/Flags register
03185 #define NVIC_DBG_XFER_REG_R15   0x0000000F  ///< Register R15
03186 #define NVIC_DBG_XFER_REG_R14   0x0000000E  ///< Register R14
03187 #define NVIC_DBG_XFER_REG_R13   0x0000000D  ///< Register R13
03188 #define NVIC_DBG_XFER_REG_R12   0x0000000C  ///< Register R12
03189 #define NVIC_DBG_XFER_REG_R11   0x0000000B  ///< Register R11
03190 #define NVIC_DBG_XFER_REG_R10   0x0000000A  ///< Register R10
03191 #define NVIC_DBG_XFER_REG_R9    0x00000009  ///< Register R9
03192 #define NVIC_DBG_XFER_REG_R8    0x00000008  ///< Register R8
03193 #define NVIC_DBG_XFER_REG_R7    0x00000007  ///< Register R7
03194 #define NVIC_DBG_XFER_REG_R6    0x00000006  ///< Register R6
03195 #define NVIC_DBG_XFER_REG_R5    0x00000005  ///< Register R5
03196 #define NVIC_DBG_XFER_REG_R4    0x00000004  ///< Register R4
03197 #define NVIC_DBG_XFER_REG_R3    0x00000003  ///< Register R3
03198 #define NVIC_DBG_XFER_REG_R2    0x00000002  ///< Register R2
03199 #define NVIC_DBG_XFER_REG_R1    0x00000001  ///< Register R1
03200 #define NVIC_DBG_XFER_REG_R0    0x00000000  ///< Register R0
03201 /*\}*/
03202
03206 /*\{*/
03207 #define NVIC_DBG_DATA_M         0xFFFFFFFF  ///< Data temporary cache
03208 #define NVIC_DBG_DATA_S         0
03209 /*\}*/
03210
03214 /*\{*/
03215 #define NVIC_DBG_INT_HARDERR    0x00000400  ///< Debug trap on hard fault
03216 #define NVIC_DBG_INT_INTERR     0x00000200  ///< Debug trap on interrupt errors
03217 #define NVIC_DBG_INT_BUSERR     0x00000100  ///< Debug trap on bus error
03218 #define NVIC_DBG_INT_STATERR    0x00000080  ///< Debug trap on usage fault state
03219 #define NVIC_DBG_INT_CHKERR     0x00000040  ///< Debug trap on usage fault check
03220 #define NVIC_DBG_INT_NOCPERR    0x00000020  ///< Debug trap on coprocessor error
03221 #define NVIC_DBG_INT_MMERR      0x00000010  ///< Debug trap on mem manage fault
03222 #define NVIC_DBG_INT_RESET      0x00000008  ///< Core reset status
03223 #define NVIC_DBG_INT_RSTPENDCLR 0x00000004  ///< Clear pending core reset
03224 #define NVIC_DBG_INT_RSTPENDING 0x00000002  ///< Core reset is pending
03225 #define NVIC_DBG_INT_RSTVCATCH  0x00000001  ///< Reset vector catch
03226 /*\}*/
03227
03231 /*\{*/
03232 #define NVIC_SW_TRIG_INTID_M    0x000003FF  ///< Interrupt to trigger
03233 #define NVIC_SW_TRIG_INTID_S    0
03234 /*\}*/
03235
03239 #ifndef DEPRECATED
03240
03244 /*\{*/
03245 #define WATCHDOG_LOAD_R         (*((reg32_t *)0x40000000))
03246 #define WATCHDOG_VALUE_R        (*((reg32_t *)0x40000004))
03247 #define WATCHDOG_CTL_R          (*((reg32_t *)0x40000008))
03248 #define WATCHDOG_ICR_R          (*((reg32_t *)0x4000000C))
03249 #define WATCHDOG_RIS_R          (*((reg32_t *)0x40000010))
03250 #define WATCHDOG_MIS_R          (*((reg32_t *)0x40000014))
03251 #define WATCHDOG_TEST_R         (*((reg32_t *)0x40000418))
03252 #define WATCHDOG_LOCK_R         (*((reg32_t *)0x40000C00))
03253 /*\}*/
03254
03258 /*\{*/
03259 #define I2C_SICR_IC             0x00000001  ///< Clear Interrupt
03260 /*\}*/
03261
03265 /*\{*/
03266 #define I2C_SMIS_MIS            0x00000001  ///< Masked Interrupt Status
03267 /*\}*/
03268
03272 /*\{*/
03273 #define I2C_SRIS_RIS            0x00000001  ///< Raw Interrupt Status
03274 /*\}*/
03275
03279 /*\{*/
03280 #define I2C_SIMR_IM             0x00000001  ///< Interrupt Mask
03281 /*\}*/
03282
03287 /*\{*/
03288 #define ADC_TMLB_CNT_M          0x000003C0  ///< Continuous Sample Counter
03289 #define ADC_TMLB_CONT           0x00000020  ///< Continuation Sample Indicator
03290 #define ADC_TMLB_DIFF           0x00000010  ///< Differential Sample Indicator
03291 #define ADC_TMLB_TS             0x00000008  ///< Temp Sensor Sample Indicator
03292 #define ADC_TMLB_MUX_M          0x00000007  ///< Analog Input Indicator
03293 #define ADC_TMLB_CNT_S          6           ///< Sample counter shift
03294 #define ADC_TMLB_MUX_S          0           ///< Input channel number shift
03295 /*\}*/
03296
03300 /*\{*/
03301 #define ADC_ACTSS_R             (*((reg32_t *)0x40038000))
03302 #define ADC_RIS_R               (*((reg32_t *)0x40038004))
03303 #define ADC_IM_R                (*((reg32_t *)0x40038008))
03304 #define ADC_ISC_R               (*((reg32_t *)0x4003800C))
03305 #define ADC_OSTAT_R             (*((reg32_t *)0x40038010))
03306 #define ADC_EMUX_R              (*((reg32_t *)0x40038014))
03307 #define ADC_USTAT_R             (*((reg32_t *)0x40038018))
03308 #define ADC_SSPRI_R             (*((reg32_t *)0x40038020))
03309 #define ADC_PSSI_R              (*((reg32_t *)0x40038028))
03310 #define ADC_SAC_R               (*((reg32_t *)0x40038030))
03311 #define ADC_SSMUX0_R            (*((reg32_t *)0x40038040))
03312 #define ADC_SSCTL0_R            (*((reg32_t *)0x40038044))
03313 #define ADC_SSFIFO0_R           (*((reg32_t *)0x40038048))
03314 #define ADC_SSFSTAT0_R          (*((reg32_t *)0x4003804C))
03315 #define ADC_SSMUX1_R            (*((reg32_t *)0x40038060))
03316 #define ADC_SSCTL1_R            (*((reg32_t *)0x40038064))
03317 #define ADC_SSFIFO1_R           (*((reg32_t *)0x40038068))
03318 #define ADC_SSFSTAT1_R          (*((reg32_t *)0x4003806C))
03319 #define ADC_SSMUX2_R            (*((reg32_t *)0x40038080))
03320 #define ADC_SSCTL2_R            (*((reg32_t *)0x40038084))
03321 #define ADC_SSFIFO2_R           (*((reg32_t *)0x40038088))
03322 #define ADC_SSFSTAT2_R          (*((reg32_t *)0x4003808C))
03323 #define ADC_SSMUX3_R            (*((reg32_t *)0x400380A0))
03324 #define ADC_SSCTL3_R            (*((reg32_t *)0x400380A4))
03325 #define ADC_SSFIFO3_R           (*((reg32_t *)0x400380A8))
03326 #define ADC_SSFSTAT3_R          (*((reg32_t *)0x400380AC))
03327 #define ADC_TMLB_R              (*((reg32_t *)0x40038100))
03328 /*\}*/
03329
03333 /*\{*/
03334 #define FLASH_FMC_WRKEY_M       0xFFFF0000  ///< Flash Memory Write Key
03335 #define FLASH_FMC_WRKEY_S       16
03336 /*\}*/
03337
03341 /*\{*/
03342 #define SYSCTL_DID1_PKG_28SOIC  0x00000000  ///< SOIC package
03343 #define SYSCTL_DID1_PKG_48QFP   0x00000008  ///< QFP package
03344 /*\}*/
03345
03349 /*\{*/
03350 #define NVIC_MPU_R              (*((reg32_t *)0xE000ED9C))
03351 /*\}*/
03352
03353 #endif /* DEPRECATED */
03354
03355 #endif /* LM3S1968_H */


BeRTOS: lm3s_gpio.h File Reference

  • cpu
  • cortex-m3
  • io
lm3s_gpio.h File Reference

LM3S1968 GPIO hardware definitions. More...

Go to the source code of this file.

Defines

#define | GPIO_O_DATA 0x00000000
The following are defines for the GPIO register offsets.
#define | GPIO_O_DIR 0x00000400
The following are defines for the GPIO register offsets.
#define | GPIO_O_IS 0x00000404
The following are defines for the GPIO register offsets.
#define | GPIO_O_IBE 0x00000408
The following are defines for the GPIO register offsets.
#define | GPIO_O_IEV 0x0000040C
The following are defines for the GPIO register offsets.
#define | GPIO_O_IM 0x00000410
The following are defines for the GPIO register offsets.
#define | GPIO_O_RIS 0x00000414
The following are defines for the GPIO register offsets.
#define | GPIO_O_MIS 0x00000418
The following are defines for the GPIO register offsets.
#define | GPIO_O_ICR 0x0000041C
The following are defines for the GPIO register offsets.
#define | GPIO_O_AFSEL 0x00000420
The following are defines for the GPIO register offsets.
#define | GPIO_O_DR2R 0x00000500
The following are defines for the GPIO register offsets.
#define | GPIO_O_DR4R 0x00000504
The following are defines for the GPIO register offsets.
#define | GPIO_O_DR8R 0x00000508
The following are defines for the GPIO register offsets.
#define | GPIO_O_ODR 0x0000050C
The following are defines for the GPIO register offsets.
#define | GPIO_O_PUR 0x00000510
The following are defines for the GPIO register offsets.
#define | GPIO_O_PDR 0x00000514
The following are defines for the GPIO register offsets.
#define | GPIO_O_SLR 0x00000518
The following are defines for the GPIO register offsets.
#define | GPIO_O_DEN 0x0000051C
The following are defines for the GPIO register offsets.
#define | GPIO_O_LOCK 0x00000520
The following are defines for the GPIO register offsets.
#define | GPIO_O_CR 0x00000524
The following are defines for the GPIO register offsets.
#define | GPIO_O_AMSEL 0x00000528
The following are defines for the GPIO register offsets.
#define | GPIO_O_PCTL 0x0000052C
The following are defines for the GPIO register offsets.
#define | GPIO_LOCK_M 0xFFFFFFFF
The following are defines for the bit fields in the GPIO_O_LOCK register.
#define | GPIO_LOCK_UNLOCKED 0x00000000
The following are defines for the bit fields in the GPIO_O_LOCK register.
#define | GPIO_LOCK_LOCKED 0x00000001
The following are defines for the bit fields in the GPIO_O_LOCK register.
#define | GPIO_LOCK_KEY 0x1ACCE551
The following are defines for the bit fields in the GPIO_O_LOCK register.
#define | GPIO_LOCK_KEY_DD 0x4C4F434B
The following are defines for the bit fields in the GPIO_O_LOCK register.
#define | GPIO_PCTL_PA0_M 0x0000000F
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA0_U0RX 0x00000001
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA0_I2C1SCL 0x00000008
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA0_U1RX 0x00000009
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA1_M 0x000000F0
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA1_U0TX 0x00000010
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA1_I2C1SDA 0x00000080
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA1_U1TX 0x00000090
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA2_M 0x00000F00
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA2_SSI0CLK 0x00000100
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA2_PWM4 0x00000400
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA2_I2S0RXSD 0x00000900
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA3_M 0x0000F000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA3_SSI0FSS 0x00001000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA3_PWM5 0x00004000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA3_I2S0RXMCLK 0x00009000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA4_M 0x000F0000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA4_SSI0RX 0x00010000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA4_PWM6 0x00040000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA4_CAN0RX 0x00050000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA4_I2S0TXSCK 0x00090000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA5_M 0x00F00000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA5_SSI0TX 0x00100000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA5_PWM7 0x00400000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA5_CAN0TX 0x00500000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA5_I2S0TXWS 0x00900000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA6_M 0x0F000000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA6_I2C1SCL 0x01000000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA6_CCP1 0x02000000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA6_PWM0 0x04000000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA6_PWM4 0x05000000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA6_CAN0RX 0x06000000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA6_USB0EPEN 0x08000000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA6_U1CTS 0x09000000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA7_M 0xF0000000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA7_I2C1SDA 0x10000000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA7_CCP4 0x20000000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA7_PWM1 0x40000000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA7_PWM5 0x50000000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA7_CAN0TX 0x60000000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA7_CCP3 0x70000000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA7_USB0PFLT 0x80000000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PA7_U1DCD 0x90000000
The following are defines for the bit fields in the GPIO_PCTL register for port A.
#define | GPIO_PCTL_PB0_M 0x0000000F
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB0_CCP0 0x00000001
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB0_PWM2 0x00000002
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB0_U1RX 0x00000005
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB1_M 0x000000F0
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB1_CCP2 0x00000010
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB1_PWM3 0x00000020
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB1_CCP1 0x00000040
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB1_U1TX 0x00000050
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB2_M 0x00000F00
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB2_I2C0SCL 0x00000100
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB2_IDX0 0x00000200
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB2_CCP3 0x00000400
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB2_CCP0 0x00000500
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB2_USB0EPEN 0x00000800
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB3_M 0x0000F000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB3_I2C0SDA 0x00001000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB3_FAULT0 0x00002000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB3_FAULT3 0x00004000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB3_USB0PFLT 0x00008000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB4_M 0x000F0000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB4_U2RX 0x00040000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB4_CAN0RX 0x00050000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB4_IDX0 0x00060000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB4_U1RX 0x00070000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB4_EPI0S23 0x00080000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB5_M 0x00F00000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB5_C0O 0x00100000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB5_CCP5 0x00200000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB5_CCP6 0x00300000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB5_CCP0 0x00400000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB5_CAN0TX 0x00500000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB5_CCP2 0x00600000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB5_U1TX 0x00700000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB5_EPI0S22 0x00800000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB6_M 0x0F000000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB6_CCP1 0x01000000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB6_CCP7 0x02000000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB6_C0O 0x03000000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB6_FAULT1 0x04000000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB6_IDX0 0x05000000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB6_CCP5 0x06000000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB6_I2S0TXSCK 0x09000000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB7_M 0xF0000000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PB7_NMI 0x40000000
The following are defines for the bit fields in the GPIO_PCTL register for port B.
#define | GPIO_PCTL_PC0_M 0x0000000F
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC0_TCK 0x00000003
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC1_M 0x000000F0
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC1_TMS 0x00000030
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC2_M 0x00000F00
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC2_TDI 0x00000300
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC3_M 0x0000F000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC3_TDO 0x00003000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC4_M 0x000F0000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC4_CCP5 0x00010000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC4_PHA0 0x00020000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC4_PWM6 0x00040000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC4_CCP2 0x00050000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC4_CCP4 0x00060000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC4_EPI0S2 0x00080000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC4_CCP1 0x00090000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC5_M 0x00F00000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC5_CCP1 0x00100000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC5_C1O 0x00200000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC5_C0O 0x00300000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC5_FAULT2 0x00400000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC5_CCP3 0x00500000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC5_USB0EPEN 0x00600000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC5_EPI0S3 0x00800000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC6_M 0x0F000000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC6_CCP3 0x01000000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC6_PHB0 0x02000000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC6_C2O 0x03000000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC6_PWM7 0x04000000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC6_U1RX 0x05000000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC6_CCP0 0x06000000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC6_USB0PFLT 0x07000000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC6_EPI0S4 0x08000000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC7_M 0xF0000000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC7_CCP4 0x10000000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC7_PHB0 0x20000000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC7_CCP0 0x40000000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC7_U1TX 0x50000000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC7_USB0PFLT 0x60000000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC7_C1O 0x70000000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PC7_EPI0S5 0x80000000
The following are defines for the bit fields in the GPIO_PCTL register for port C.
#define | GPIO_PCTL_PD0_M 0x0000000F
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD0_PWM0 0x00000001
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD0_CAN0RX 0x00000002
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD0_IDX0 0x00000003
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD0_U2RX 0x00000004
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD0_U1RX 0x00000005
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD0_CCP6 0x00000006
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD0_I2S0RXSCK 0x00000008
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD0_U1CTS 0x00000009
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD1_M 0x000000F0
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD1_PWM1 0x00000010
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD1_CAN0TX 0x00000020
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD1_PHA0 0x00000030
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD1_U2TX 0x00000040
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD1_U1TX 0x00000050
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD1_CCP7 0x00000060
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD1_I2S0RXWS 0x00000080
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD1_U1DCD 0x00000090
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD1_CCP2 0x000000A0
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD1_PHB1 0x000000B0
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD2_M 0x00000F00
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD2_U1RX 0x00000100
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD2_CCP6 0x00000200
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD2_PWM2 0x00000300
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD2_CCP5 0x00000400
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD2_EPI0S20 0x00000800
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD3_M 0x0000F000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD3_U1TX 0x00001000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD3_CCP7 0x00002000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD3_PWM3 0x00003000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD3_CCP0 0x00004000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD3_EPI0S21 0x00008000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD4_M 0x000F0000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD4_CCP0 0x00010000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD4_CCP3 0x00020000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD4_I2S0RXSD 0x00080000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD4_U1RI 0x00090000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD4_EPI0S19 0x000A0000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD5_M 0x00F00000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD5_CCP2 0x00100000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD5_CCP4 0x00200000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD5_I2S0RXMCLK 0x00800000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD5_U2RX 0x00900000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD5_EPI0S28 0x00A00000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD6_M 0x0F000000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD6_FAULT0 0x01000000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD6_I2S0TXSCK 0x08000000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD6_U2TX 0x09000000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD6_EPI0S29 0x0A000000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD7_M 0xF0000000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD7_IDX0 0x10000000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD7_C0O 0x20000000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD7_CCP1 0x30000000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD7_I2S0TXWS 0x80000000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD7_U1DTR 0x90000000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PD7_EPI0S30 0xA0000000
The following are defines for the bit fields in the GPIO_PCTL register for port D.
#define | GPIO_PCTL_PE0_M 0x0000000F
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE0_PWM4 0x00000001
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE0_SSI1CLK 0x00000002
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE0_CCP3 0x00000003
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE0_EPI0S8 0x00000008
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE0_USB0PFLT 0x00000009
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE1_M 0x000000F0
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE1_PWM5 0x00000010
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE1_SSI1FSS 0x00000020
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE1_FAULT0 0x00000030
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE1_CCP2 0x00000040
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE1_CCP6 0x00000050
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE1_EPI0S9 0x00000080
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE2_M 0x00000F00
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE2_CCP4 0x00000100
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE2_SSI1RX 0x00000200
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE2_PHB1 0x00000300
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE2_PHA0 0x00000400
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE2_CCP2 0x00000500
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE2_EPI0S24 0x00000800
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE3_M 0x0000F000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE3_CCP1 0x00001000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE3_SSI1TX 0x00002000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE3_PHA1 0x00003000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE3_PHB0 0x00004000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE3_CCP7 0x00005000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE3_EPI0S25 0x00008000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE4_M 0x000F0000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE4_CCP3 0x00010000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE4_FAULT0 0x00040000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE4_U2TX 0x00050000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE4_CCP2 0x00060000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE4_I2S0TXWS 0x00090000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE5_M 0x00F00000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE5_CCP5 0x00100000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE5_I2S0TXSD 0x00900000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE6_M 0x0F000000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE6_PWM4 0x01000000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE6_C1O 0x02000000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE6_U1CTS 0x09000000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE7_M 0xF0000000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE7_PWM5 0x10000000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE7_C2O 0x20000000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PE7_U1DCD 0x90000000
The following are defines for the bit fields in the GPIO_PCTL register for port E.
#define | GPIO_PCTL_PF0_M 0x0000000F
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF0_CAN1RX 0x00000001
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF0_PHB0 0x00000002
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF0_PWM0 0x00000003
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF0_I2S0TXSD 0x00000008
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF0_U1DSR 0x00000009
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF1_M 0x000000F0
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF1_CAN1TX 0x00000010
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF1_IDX1 0x00000020
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF1_PWM1 0x00000030
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF1_I2S0TXMCLK 0x00000080
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF1_U1RTS 0x00000090
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF1_CCP3 0x000000A0
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF2_M 0x00000F00
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF2_LED1 0x00000100
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF2_PWM4 0x00000200
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF2_PWM2 0x00000400
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF2_SSI1CLK 0x00000900
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF3_M 0x0000F000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF3_LED0 0x00001000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF3_PWM5 0x00002000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF3_PWM3 0x00004000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF3_SSI1FSS 0x00009000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF4_M 0x000F0000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF4_CCP0 0x00010000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF4_C0O 0x00020000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF4_FAULT0 0x00040000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF4_EPI0S12 0x00080000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF4_SSI1RX 0x00090000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF5_M 0x00F00000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF5_CCP2 0x00100000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF5_C1O 0x00200000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF5_EPI0S15 0x00800000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF5_SSI1TX 0x00900000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF6_M 0x0F000000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF6_CCP1 0x01000000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF6_C2O 0x02000000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF6_PHA0 0x04000000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF6_I2S0TXMCLK 0x09000000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF6_U1RTS 0x0A000000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF7_M 0xF0000000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF7_CCP4 0x10000000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF7_PHB0 0x40000000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF7_EPI0S12 0x80000000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PF7_FAULT1 0x90000000
The following are defines for the bit fields in the GPIO_PCTL register for port F.
#define | GPIO_PCTL_PG0_M 0x0000000F
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG0_U2RX 0x00000001
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG0_PWM0 0x00000002
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG0_I2C1SCL 0x00000003
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG0_PWM4 0x00000004
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG0_USB0EPEN 0x00000007
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG0_EPI0S13 0x00000008
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG1_M 0x000000F0
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG1_U2TX 0x00000010
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG1_PWM1 0x00000020
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG1_I2C1SDA 0x00000030
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG1_PWM5 0x00000040
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG1_EPI0S14 0x00000080
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG2_M 0x00000F00
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG2_PWM0 0x00000100
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG2_FAULT0 0x00000400
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG2_IDX1 0x00000800
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG2_I2S0RXSD 0x00000900
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG3_M 0x0000F000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG3_PWM1 0x00001000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG3_FAULT2 0x00004000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG3_FAULT0 0x00008000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG3_I2S0RXMCLK 0x00009000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG4_M 0x000F0000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG4_CCP3 0x00010000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG4_FAULT1 0x00040000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG4_EPI0S15 0x00080000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG4_PWM6 0x00090000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG4_U1RI 0x000A0000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG5_M 0x00F00000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG5_CCP5 0x00100000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG5_IDX0 0x00400000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG5_FAULT1 0x00500000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG5_PWM7 0x00800000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG5_I2S0RXSCK 0x00900000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG5_U1DTR 0x00A00000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG6_M 0x0F000000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG6_PHA1 0x01000000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG6_PWM6 0x04000000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG6_FAULT1 0x08000000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG6_I2S0RXWS 0x09000000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG6_U1RI 0x0A000000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG7_M 0xF0000000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG7_PHB1 0x10000000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG7_PWM7 0x40000000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG7_CCP5 0x80000000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PG7_EPI0S31 0x90000000
The following are defines for the bit fields in the GPIO_PCTL register for port G.
#define | GPIO_PCTL_PH0_M 0x0000000F
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH0_CCP6 0x00000001
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH0_PWM2 0x00000002
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH0_EPI0S6 0x00000008
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH0_PWM4 0x00000009
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH1_M 0x000000F0
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH1_CCP7 0x00000010
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH1_PWM3 0x00000020
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH1_EPI0S7 0x00000080
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH1_PWM5 0x00000090
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH2_M 0x00000F00
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH2_IDX1 0x00000100
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH2_C1O 0x00000200
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH2_FAULT3 0x00000400
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH2_EPI0S1 0x00000800
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH3_M 0x0000F000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH3_PHB0 0x00001000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH3_FAULT0 0x00002000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH3_USB0EPEN 0x00004000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH3_EPI0S0 0x00008000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH4_M 0x000F0000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH4_USB0PFLT 0x00040000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH4_EPI0S10 0x00080000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH4_SSI1CLK 0x000B0000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH5_M 0x00F00000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH5_EPI0S11 0x00800000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH5_FAULT2 0x00A00000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH5_SSI1FSS 0x00B00000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH6_M 0x0F000000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH6_EPI0S26 0x08000000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH6_PWM4 0x0A000000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH6_SSI1RX 0x0B000000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH7_M 0xF0000000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH7_EPI0S27 0x80000000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH7_PWM5 0xA0000000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PH7_SSI1TX 0xB0000000
The following are defines for the bit fields in the GPIO_PCTL register for port H.
#define | GPIO_PCTL_PJ0_M 0x0000000F
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ0_EPI0S16 0x00000008
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ0_PWM0 0x0000000A
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ0_I2C1SCL 0x0000000B
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ1_M 0x000000F0
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ1_EPI0S17 0x00000080
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ1_USB0PFLT 0x00000090
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ1_PWM1 0x000000A0
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ1_I2C1SDA 0x000000B0
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ2_M 0x00000F00
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ2_EPI0S18 0x00000800
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ2_CCP0 0x00000900
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ2_FAULT0 0x00000A00
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ3_M 0x0000F000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ3_EPI0S19 0x00008000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ3_U1CTS 0x00009000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ3_CCP6 0x0000A000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ4_M 0x000F0000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ4_EPI0S28 0x00080000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ4_U1DCD 0x00090000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ4_CCP4 0x000A0000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ5_M 0x00F00000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ5_EPI0S29 0x00800000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ5_U1DSR 0x00900000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ5_CCP2 0x00A00000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ6_M 0x0F000000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ6_EPI0S30 0x08000000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ6_U1RTS 0x09000000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ6_CCP1 0x0A000000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ7_M 0xF0000000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ7_U1DTR 0x90000000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_PCTL_PJ7_CCP0 0xA0000000
The following are defines for the bit fields in the GPIO_PCTL register for port J.
#define | GPIO_O_PeriphID4 0x00000FD0
The following definitions are deprecated.
#define | GPIO_O_PeriphID5 0x00000FD4
The following definitions are deprecated.
#define | GPIO_O_PeriphID6 0x00000FD8
The following definitions are deprecated.
#define | GPIO_O_PeriphID7 0x00000FDC
The following definitions are deprecated.
#define | GPIO_O_PeriphID0 0x00000FE0
The following definitions are deprecated.
#define | GPIO_O_PeriphID1 0x00000FE4
The following definitions are deprecated.
#define | GPIO_O_PeriphID2 0x00000FE8
The following definitions are deprecated.
#define | GPIO_O_PeriphID3 0x00000FEC
The following definitions are deprecated.
#define | GPIO_O_PCellID0 0x00000FF0
The following definitions are deprecated.
#define | GPIO_O_PCellID1 0x00000FF4
The following definitions are deprecated.
#define | GPIO_O_PCellID2 0x00000FF8
The following definitions are deprecated.
#define | GPIO_O_PCellID3 0x00000FFC
The following definitions are deprecated.
#define | GPIO_RV_DEN 0x000000FF
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_PUR 0x000000FF
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_DR2R 0x000000FF
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_PCellID1 0x000000F0
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_PCellID3 0x000000B1
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_PeriphID0 0x00000061
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_PeriphID1 0x00000010
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_PCellID0 0x0000000D
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_PCellID2 0x00000005
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_PeriphID2 0x00000004
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_LOCK 0x00000001
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_PeriphID7 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_PDR 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_IC 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_SLR 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_ODR 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_IBE 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_AFSEL 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_IS 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_IM 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_PeriphID4 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_PeriphID5 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_DR8R 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_RIS 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_DR4R 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_IEV 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_DIR 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_PeriphID6 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_PeriphID3 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_DATA 0x00000000
The following are deprecated defines for the GPIO Register reset values.
#define | GPIO_RV_MIS 0x00000000
The following are deprecated defines for the GPIO Register reset values.

Detailed Description

LM3S1968 GPIO hardware definitions.

Definition in file lm3s_gpio.h.

Define Documentation

#define GPIO_O_PCellID0 0x00000FF0

The following definitions are deprecated.

The following are deprecated defines for the GPIO register offsets.

Definition at line 558 of file lm3s_gpio.h.

#define GPIO_O_PCellID1 0x00000FF4

The following definitions are deprecated.

The following are deprecated defines for the GPIO register offsets.

Definition at line 559 of file lm3s_gpio.h.

#define GPIO_O_PCellID2 0x00000FF8

The following definitions are deprecated.

The following are deprecated defines for the GPIO register offsets.

Definition at line 560 of file lm3s_gpio.h.

#define GPIO_O_PCellID3 0x00000FFC

The following definitions are deprecated.

The following are deprecated defines for the GPIO register offsets.

Definition at line 561 of file lm3s_gpio.h.

#define GPIO_O_PeriphID0 0x00000FE0

The following definitions are deprecated.

The following are deprecated defines for the GPIO register offsets.

Definition at line 554 of file lm3s_gpio.h.

#define GPIO_O_PeriphID1 0x00000FE4

The following definitions are deprecated.

The following are deprecated defines for the GPIO register offsets.

Definition at line 555 of file lm3s_gpio.h.

#define GPIO_O_PeriphID2 0x00000FE8

The following definitions are deprecated.

The following are deprecated defines for the GPIO register offsets.

Definition at line 556 of file lm3s_gpio.h.

#define GPIO_O_PeriphID3 0x00000FEC

The following definitions are deprecated.

The following are deprecated defines for the GPIO register offsets.

Definition at line 557 of file lm3s_gpio.h.

#define GPIO_O_PeriphID4 0x00000FD0

The following definitions are deprecated.

The following are deprecated defines for the GPIO register offsets.

Definition at line 550 of file lm3s_gpio.h.

#define GPIO_O_PeriphID5 0x00000FD4

The following definitions are deprecated.

The following are deprecated defines for the GPIO register offsets.

Definition at line 551 of file lm3s_gpio.h.

#define GPIO_O_PeriphID6 0x00000FD8

The following definitions are deprecated.

The following are deprecated defines for the GPIO register offsets.

Definition at line 552 of file lm3s_gpio.h.

#define GPIO_O_PeriphID7 0x00000FDC

The following definitions are deprecated.

The following are deprecated defines for the GPIO register offsets.

Definition at line 553 of file lm3s_gpio.h.


BeRTOS: lm3s_gpio.h Source File

  • cpu
  • cortex-m3
  • io
lm3s_gpio.h
Go to the documentation of this file.
00001
00036 #ifndef LM3S_GPIO_H
00037 #define LM3S_GPIO_H
00038
00042 /*\{*/
00043 #define GPIO_O_DATA             0x00000000  //< GPIO Data
00044 #define GPIO_O_DIR              0x00000400  //< GPIO Direction
00045 #define GPIO_O_IS               0x00000404  //< GPIO Interrupt Sense
00046 #define GPIO_O_IBE              0x00000408  //< GPIO Interrupt Both Edges
00047 #define GPIO_O_IEV              0x0000040C  //< GPIO Interrupt Event
00048 #define GPIO_O_IM               0x00000410  //< GPIO Interrupt Mask
00049 #define GPIO_O_RIS              0x00000414  //< GPIO Raw Interrupt Status
00050 #define GPIO_O_MIS              0x00000418  //< GPIO Masked Interrupt Status
00051 #define GPIO_O_ICR              0x0000041C  //< GPIO Interrupt Clear
00052 #define GPIO_O_AFSEL            0x00000420  //< GPIO Alternate Function Select
00053 #define GPIO_O_DR2R             0x00000500  //< GPIO 2-mA Drive Select
00054 #define GPIO_O_DR4R             0x00000504  //< GPIO 4-mA Drive Select
00055 #define GPIO_O_DR8R             0x00000508  //< GPIO 8-mA Drive Select
00056 #define GPIO_O_ODR              0x0000050C  //< GPIO Open Drain Select
00057 #define GPIO_O_PUR              0x00000510  //< GPIO Pull-Up Select
00058 #define GPIO_O_PDR              0x00000514  //< GPIO Pull-Down Select
00059 #define GPIO_O_SLR              0x00000518  //< GPIO Slew Rate Control Select
00060 #define GPIO_O_DEN              0x0000051C  //< GPIO Digital Enable
00061 #define GPIO_O_LOCK             0x00000520  //< GPIO Lock
00062 #define GPIO_O_CR               0x00000524  //< GPIO Commit
00063 #define GPIO_O_AMSEL            0x00000528  //< GPIO Analog Mode Select
00064 #define GPIO_O_PCTL             0x0000052C  //< GPIO Port Control
00065 /*\}*/
00066
00070 /*\{*/
00071 #define GPIO_LOCK_M             0xFFFFFFFF  //< GPIO Lock
00072 #define GPIO_LOCK_UNLOCKED      0x00000000  //< The GPIOCR register is unlocked
00073                                             //< and may be modified
00074 #define GPIO_LOCK_LOCKED        0x00000001  //< The GPIOCR register is locked
00075                                             //< and may not be modified
00076 #define GPIO_LOCK_KEY           0x1ACCE551  //< Unlocks the GPIO_CR register
00077 #define GPIO_LOCK_KEY_DD        0x4C4F434B  //< Unlocks the GPIO_CR register on
00078                                             //< DustDevil-class devices and
00079                                             //< later
00080 /*\}*/
00081
00086 /*\{*/
00087 #define GPIO_PCTL_PA0_M         0x0000000F  //< PA0 mask
00088 #define GPIO_PCTL_PA0_U0RX      0x00000001  //< U0RX on PA0
00089 #define GPIO_PCTL_PA0_I2C1SCL   0x00000008  //< I2C1SCL on PA0
00090 #define GPIO_PCTL_PA0_U1RX      0x00000009  //< U1RX on PA0
00091 #define GPIO_PCTL_PA1_M         0x000000F0  //< PA1 mask
00092 #define GPIO_PCTL_PA1_U0TX      0x00000010  //< U0TX on PA1
00093 #define GPIO_PCTL_PA1_I2C1SDA   0x00000080  //< I2C1SDA on PA1
00094 #define GPIO_PCTL_PA1_U1TX      0x00000090  //< U1TX on PA1
00095 #define GPIO_PCTL_PA2_M         0x00000F00  //< PA2 mask
00096 #define GPIO_PCTL_PA2_SSI0CLK   0x00000100  //< SSI0CLK on PA2
00097 #define GPIO_PCTL_PA2_PWM4      0x00000400  //< PWM4 on PA2
00098 #define GPIO_PCTL_PA2_I2S0RXSD  0x00000900  //< I2S0RXSD on PA2
00099 #define GPIO_PCTL_PA3_M         0x0000F000  //< PA3 mask
00100 #define GPIO_PCTL_PA3_SSI0FSS   0x00001000  //< SSI0FSS on PA3
00101 #define GPIO_PCTL_PA3_PWM5      0x00004000  //< PWM5 on PA3
00102 #define GPIO_PCTL_PA3_I2S0RXMCLK \
00103                                 0x00009000  //< I2S0RXMCLK on PA3
00104 #define GPIO_PCTL_PA4_M         0x000F0000  //< PA4 mask
00105 #define GPIO_PCTL_PA4_SSI0RX    0x00010000  //< SSI0RX on PA4
00106 #define GPIO_PCTL_PA4_PWM6      0x00040000  //< PWM6 on PA4
00107 #define GPIO_PCTL_PA4_CAN0RX    0x00050000  //< CAN0RX on PA4
00108 #define GPIO_PCTL_PA4_I2S0TXSCK 0x00090000  //< I2S0TXSCK on PA4
00109 #define GPIO_PCTL_PA5_M         0x00F00000  //< PA5 mask
00110 #define GPIO_PCTL_PA5_SSI0TX    0x00100000  //< SSI0TX on PA5
00111 #define GPIO_PCTL_PA5_PWM7      0x00400000  //< PWM7 on PA5
00112 #define GPIO_PCTL_PA5_CAN0TX    0x00500000  //< CAN0TX on PA5
00113 #define GPIO_PCTL_PA5_I2S0TXWS  0x00900000  //< I2S0TXWS on PA5
00114 #define GPIO_PCTL_PA6_M         0x0F000000  //< PA6 mask
00115 #define GPIO_PCTL_PA6_I2C1SCL   0x01000000  //< I2C1SCL on PA6
00116 #define GPIO_PCTL_PA6_CCP1      0x02000000  //< CCP1 on PA6
00117 #define GPIO_PCTL_PA6_PWM0      0x04000000  //< PWM0 on PA6
00118 #define GPIO_PCTL_PA6_PWM4      0x05000000  //< PWM4 on PA6
00119 #define GPIO_PCTL_PA6_CAN0RX    0x06000000  //< CAN0RX on PA6
00120 #define GPIO_PCTL_PA6_USB0EPEN  0x08000000  //< USB0EPEN on PA6
00121 #define GPIO_PCTL_PA6_U1CTS     0x09000000  //< U1CTS on PA6
00122 #define GPIO_PCTL_PA7_M         0xF0000000  //< PA7 mask
00123 #define GPIO_PCTL_PA7_I2C1SDA   0x10000000  //< I2C1SDA on PA7
00124 #define GPIO_PCTL_PA7_CCP4      0x20000000  //< CCP4 on PA7
00125 #define GPIO_PCTL_PA7_PWM1      0x40000000  //< PWM1 on PA7
00126 #define GPIO_PCTL_PA7_PWM5      0x50000000  //< PWM5 on PA7
00127 #define GPIO_PCTL_PA7_CAN0TX    0x60000000  //< CAN0TX on PA7
00128 #define GPIO_PCTL_PA7_CCP3      0x70000000  //< CCP3 on PA7
00129 #define GPIO_PCTL_PA7_USB0PFLT  0x80000000  //< USB0PFLT on PA7
00130 #define GPIO_PCTL_PA7_U1DCD     0x90000000  //< U1DCD on PA7
00131 /*\}*/
00132
00137 /*\{*/
00138 #define GPIO_PCTL_PB0_M         0x0000000F  //< PB0 mask
00139 #define GPIO_PCTL_PB0_CCP0      0x00000001  //< CCP0 on PB0
00140 #define GPIO_PCTL_PB0_PWM2      0x00000002  //< PWM2 on PB0
00141 #define GPIO_PCTL_PB0_U1RX      0x00000005  //< U1RX on PB0
00142 #define GPIO_PCTL_PB1_M         0x000000F0  //< PB1 mask
00143 #define GPIO_PCTL_PB1_CCP2      0x00000010  //< CCP2 on PB1
00144 #define GPIO_PCTL_PB1_PWM3      0x00000020  //< PWM3 on PB1
00145 #define GPIO_PCTL_PB1_CCP1      0x00000040  //< CCP1 on PB1
00146 #define GPIO_PCTL_PB1_U1TX      0x00000050  //< U1TX on PB1
00147 #define GPIO_PCTL_PB2_M         0x00000F00  //< PB2 mask
00148 #define GPIO_PCTL_PB2_I2C0SCL   0x00000100  //< I2C0SCL on PB2
00149 #define GPIO_PCTL_PB2_IDX0      0x00000200  //< IDX0 on PB2
00150 #define GPIO_PCTL_PB2_CCP3      0x00000400  //< CCP3 on PB2
00151 #define GPIO_PCTL_PB2_CCP0      0x00000500  //< CCP0 on PB2
00152 #define GPIO_PCTL_PB2_USB0EPEN  0x00000800  //< USB0EPEN on PB2
00153 #define GPIO_PCTL_PB3_M         0x0000F000  //< PB3 mask
00154 #define GPIO_PCTL_PB3_I2C0SDA   0x00001000  //< I2C0SDA on PB3
00155 #define GPIO_PCTL_PB3_FAULT0    0x00002000  //< FAULT0 on PB3
00156 #define GPIO_PCTL_PB3_FAULT3    0x00004000  //< FAULT3 on PB3
00157 #define GPIO_PCTL_PB3_USB0PFLT  0x00008000  //< USB0PFLT on PB3
00158 #define GPIO_PCTL_PB4_M         0x000F0000  //< PB4 mask
00159 #define GPIO_PCTL_PB4_U2RX      0x00040000  //< U2RX on PB4
00160 #define GPIO_PCTL_PB4_CAN0RX    0x00050000  //< CAN0RX on PB4
00161 #define GPIO_PCTL_PB4_IDX0      0x00060000  //< IDX0 on PB4
00162 #define GPIO_PCTL_PB4_U1RX      0x00070000  //< U1RX on PB4
00163 #define GPIO_PCTL_PB4_EPI0S23   0x00080000  //< EPI0S23 on PB4
00164 #define GPIO_PCTL_PB5_M         0x00F00000  //< PB5 mask
00165 #define GPIO_PCTL_PB5_C0O       0x00100000  //< C0O on PB5
00166 #define GPIO_PCTL_PB5_CCP5      0x00200000  //< CCP5 on PB5
00167 #define GPIO_PCTL_PB5_CCP6      0x00300000  //< CCP6 on PB5
00168 #define GPIO_PCTL_PB5_CCP0      0x00400000  //< CCP0 on PB5
00169 #define GPIO_PCTL_PB5_CAN0TX    0x00500000  //< CAN0TX on PB5
00170 #define GPIO_PCTL_PB5_CCP2      0x00600000  //< CCP2 on PB5
00171 #define GPIO_PCTL_PB5_U1TX      0x00700000  //< U1TX on PB5
00172 #define GPIO_PCTL_PB5_EPI0S22   0x00800000  //< EPI0S22 on PB5
00173 #define GPIO_PCTL_PB6_M         0x0F000000  //< PB6 mask
00174 #define GPIO_PCTL_PB6_CCP1      0x01000000  //< CCP1 on PB6
00175 #define GPIO_PCTL_PB6_CCP7      0x02000000  //< CCP7 on PB6
00176 #define GPIO_PCTL_PB6_C0O       0x03000000  //< C0O on PB6
00177 #define GPIO_PCTL_PB6_FAULT1    0x04000000  //< FAULT1 on PB6
00178 #define GPIO_PCTL_PB6_IDX0      0x05000000  //< IDX0 on PB6
00179 #define GPIO_PCTL_PB6_CCP5      0x06000000  //< CCP5 on PB6
00180 #define GPIO_PCTL_PB6_I2S0TXSCK 0x09000000  //< I2S0TXSCK on PB6
00181 #define GPIO_PCTL_PB7_M         0xF0000000  //< PB7 mask
00182 #define GPIO_PCTL_PB7_NMI       0x40000000  //< NMI on PB7
00183 /*\}*/
00184
00189 /*\{*/
00190 #define GPIO_PCTL_PC0_M         0x0000000F  //< PC0 mask
00191 #define GPIO_PCTL_PC0_TCK       0x00000003  //< TCK on PC0
00192 #define GPIO_PCTL_PC1_M         0x000000F0  //< PC1 mask
00193 #define GPIO_PCTL_PC1_TMS       0x00000030  //< TMS on PC1
00194 #define GPIO_PCTL_PC2_M         0x00000F00  //< PC2 mask
00195 #define GPIO_PCTL_PC2_TDI       0x00000300  //< TDI on PC2
00196 #define GPIO_PCTL_PC3_M         0x0000F000  //< PC3 mask
00197 #define GPIO_PCTL_PC3_TDO       0x00003000  //< TDO on PC3
00198 #define GPIO_PCTL_PC4_M         0x000F0000  //< PC4 mask
00199 #define GPIO_PCTL_PC4_CCP5      0x00010000  //< CCP5 on PC4
00200 #define GPIO_PCTL_PC4_PHA0      0x00020000  //< PHA0 on PC4
00201 #define GPIO_PCTL_PC4_PWM6      0x00040000  //< PWM6 on PC4
00202 #define GPIO_PCTL_PC4_CCP2      0x00050000  //< CCP2 on PC4
00203 #define GPIO_PCTL_PC4_CCP4      0x00060000  //< CCP4 on PC4
00204 #define GPIO_PCTL_PC4_EPI0S2    0x00080000  //< EPI0S2 on PC4
00205 #define GPIO_PCTL_PC4_CCP1      0x00090000  //< CCP1 on PC4
00206 #define GPIO_PCTL_PC5_M         0x00F00000  //< PC5 mask
00207 #define GPIO_PCTL_PC5_CCP1      0x00100000  //< CCP1 on PC5
00208 #define GPIO_PCTL_PC5_C1O       0x00200000  //< C1O on PC5
00209 #define GPIO_PCTL_PC5_C0O       0x00300000  //< C0O on PC5
00210 #define GPIO_PCTL_PC5_FAULT2    0x00400000  //< FAULT2 on PC5
00211 #define GPIO_PCTL_PC5_CCP3      0x00500000  //< CCP3 on PC5
00212 #define GPIO_PCTL_PC5_USB0EPEN  0x00600000  //< USB0EPEN on PC5
00213 #define GPIO_PCTL_PC5_EPI0S3    0x00800000  //< EPI0S3 on PC5
00214 #define GPIO_PCTL_PC6_M         0x0F000000  //< PC6 mask
00215 #define GPIO_PCTL_PC6_CCP3      0x01000000  //< CCP3 on PC6
00216 #define GPIO_PCTL_PC6_PHB0      0x02000000  //< PHB0 on PC6
00217 #define GPIO_PCTL_PC6_C2O       0x03000000  //< C2O on PC6
00218 #define GPIO_PCTL_PC6_PWM7      0x04000000  //< PWM7 on PC6
00219 #define GPIO_PCTL_PC6_U1RX      0x05000000  //< U1RX on PC6
00220 #define GPIO_PCTL_PC6_CCP0      0x06000000  //< CCP0 on PC6
00221 #define GPIO_PCTL_PC6_USB0PFLT  0x07000000  //< USB0PFLT on PC6
00222 #define GPIO_PCTL_PC6_EPI0S4    0x08000000  //< EPI0S4 on PC6
00223 #define GPIO_PCTL_PC7_M         0xF0000000  //< PC7 mask
00224 #define GPIO_PCTL_PC7_CCP4      0x10000000  //< CCP4 on PC7
00225 #define GPIO_PCTL_PC7_PHB0      0x20000000  //< PHB0 on PC7
00226 #define GPIO_PCTL_PC7_CCP0      0x40000000  //< CCP0 on PC7
00227 #define GPIO_PCTL_PC7_U1TX      0x50000000  //< U1TX on PC7
00228 #define GPIO_PCTL_PC7_USB0PFLT  0x60000000  //< USB0PFLT on PC7
00229 #define GPIO_PCTL_PC7_C1O       0x70000000  //< C1O on PC7
00230 #define GPIO_PCTL_PC7_EPI0S5    0x80000000  //< EPI0S5 on PC7
00231 /*\}*/
00232
00237 /*\{*/
00238 #define GPIO_PCTL_PD0_M         0x0000000F  //< PD0 mask
00239 #define GPIO_PCTL_PD0_PWM0      0x00000001  //< PWM0 on PD0
00240 #define GPIO_PCTL_PD0_CAN0RX    0x00000002  //< CAN0RX on PD0
00241 #define GPIO_PCTL_PD0_IDX0      0x00000003  //< IDX0 on PD0
00242 #define GPIO_PCTL_PD0_U2RX      0x00000004  //< U2RX on PD0
00243 #define GPIO_PCTL_PD0_U1RX      0x00000005  //< U1RX on PD0
00244 #define GPIO_PCTL_PD0_CCP6      0x00000006  //< CCP6 on PD0
00245 #define GPIO_PCTL_PD0_I2S0RXSCK 0x00000008  //< I2S0RXSCK on PD0
00246 #define GPIO_PCTL_PD0_U1CTS     0x00000009  //< U1CTS on PD0
00247 #define GPIO_PCTL_PD1_M         0x000000F0  //< PD1 mask
00248 #define GPIO_PCTL_PD1_PWM1      0x00000010  //< PWM1 on PD1
00249 #define GPIO_PCTL_PD1_CAN0TX    0x00000020  //< CAN0TX on PD1
00250 #define GPIO_PCTL_PD1_PHA0      0x00000030  //< PHA0 on PD1
00251 #define GPIO_PCTL_PD1_U2TX      0x00000040  //< U2TX on PD1
00252 #define GPIO_PCTL_PD1_U1TX      0x00000050  //< U1TX on PD1
00253 #define GPIO_PCTL_PD1_CCP7      0x00000060  //< CCP7 on PD1
00254 #define GPIO_PCTL_PD1_I2S0RXWS  0x00000080  //< I2S0RXWS on PD1
00255 #define GPIO_PCTL_PD1_U1DCD     0x00000090  //< U1DCD on PD1
00256 #define GPIO_PCTL_PD1_CCP2      0x000000A0  //< CCP2 on PD1
00257 #define GPIO_PCTL_PD1_PHB1      0x000000B0  //< PHB1 on PD1
00258 #define GPIO_PCTL_PD2_M         0x00000F00  //< PD2 mask
00259 #define GPIO_PCTL_PD2_U1RX      0x00000100  //< U1RX on PD2
00260 #define GPIO_PCTL_PD2_CCP6      0x00000200  //< CCP6 on PD2
00261 #define GPIO_PCTL_PD2_PWM2      0x00000300  //< PWM2 on PD2
00262 #define GPIO_PCTL_PD2_CCP5      0x00000400  //< CCP5 on PD2
00263 #define GPIO_PCTL_PD2_EPI0S20   0x00000800  //< EPI0S20 on PD2
00264 #define GPIO_PCTL_PD3_M         0x0000F000  //< PD3 mask
00265 #define GPIO_PCTL_PD3_U1TX      0x00001000  //< U1TX on PD3
00266 #define GPIO_PCTL_PD3_CCP7      0x00002000  //< CCP7 on PD3
00267 #define GPIO_PCTL_PD3_PWM3      0x00003000  //< PWM3 on PD3
00268 #define GPIO_PCTL_PD3_CCP0      0x00004000  //< CCP0 on PD3
00269 #define GPIO_PCTL_PD3_EPI0S21   0x00008000  //< EPI0S21 on PD3
00270 #define GPIO_PCTL_PD4_M         0x000F0000  //< PD4 mask
00271 #define GPIO_PCTL_PD4_CCP0      0x00010000  //< CCP0 on PD4
00272 #define GPIO_PCTL_PD4_CCP3      0x00020000  //< CCP3 on PD4
00273 #define GPIO_PCTL_PD4_I2S0RXSD  0x00080000  //< I2S0RXSD on PD4
00274 #define GPIO_PCTL_PD4_U1RI      0x00090000  //< U1RI on PD4
00275 #define GPIO_PCTL_PD4_EPI0S19   0x000A0000  //< EPI0S19 on PD4
00276 #define GPIO_PCTL_PD5_M         0x00F00000  //< PD5 mask
00277 #define GPIO_PCTL_PD5_CCP2      0x00100000  //< CCP2 on PD5
00278 #define GPIO_PCTL_PD5_CCP4      0x00200000  //< CCP4 on PD5
00279 #define GPIO_PCTL_PD5_I2S0RXMCLK \
00280                                 0x00800000  //< I2S0RXMCLK on PD5
00281 #define GPIO_PCTL_PD5_U2RX      0x00900000  //< U2RX on PD5
00282 #define GPIO_PCTL_PD5_EPI0S28   0x00A00000  //< EPI0S28 on PD5
00283 #define GPIO_PCTL_PD6_M         0x0F000000  //< PD6 mask
00284 #define GPIO_PCTL_PD6_FAULT0    0x01000000  //< FAULT0 on PD6
00285 #define GPIO_PCTL_PD6_I2S0TXSCK 0x08000000  //< I2S0TXSCK on PD6
00286 #define GPIO_PCTL_PD6_U2TX      0x09000000  //< U2TX on PD6
00287 #define GPIO_PCTL_PD6_EPI0S29   0x0A000000  //< EPI0S29 on PD6
00288 #define GPIO_PCTL_PD7_M         0xF0000000  //< PD7 mask
00289 #define GPIO_PCTL_PD7_IDX0      0x10000000  //< IDX0 on PD7
00290 #define GPIO_PCTL_PD7_C0O       0x20000000  //< C0O on PD7
00291 #define GPIO_PCTL_PD7_CCP1      0x30000000  //< CCP1 on PD7
00292 #define GPIO_PCTL_PD7_I2S0TXWS  0x80000000  //< I2S0TXWS on PD7
00293 #define GPIO_PCTL_PD7_U1DTR     0x90000000  //< U1DTR on PD7
00294 #define GPIO_PCTL_PD7_EPI0S30   0xA0000000  //< EPI0S30 on PD7
00295 /*\}*/
00296
00301 /*\{*/
00302 #define GPIO_PCTL_PE0_M         0x0000000F  //< PE0 mask
00303 #define GPIO_PCTL_PE0_PWM4      0x00000001  //< PWM4 on PE0
00304 #define GPIO_PCTL_PE0_SSI1CLK   0x00000002  //< SSI1CLK on PE0
00305 #define GPIO_PCTL_PE0_CCP3      0x00000003  //< CCP3 on PE0
00306 #define GPIO_PCTL_PE0_EPI0S8    0x00000008  //< EPI0S8 on PE0
00307 #define GPIO_PCTL_PE0_USB0PFLT  0x00000009  //< USB0PFLT on PE0
00308 #define GPIO_PCTL_PE1_M         0x000000F0  //< PE1 mask
00309 #define GPIO_PCTL_PE1_PWM5      0x00000010  //< PWM5 on PE1
00310 #define GPIO_PCTL_PE1_SSI1FSS   0x00000020  //< SSI1FSS on PE1
00311 #define GPIO_PCTL_PE1_FAULT0    0x00000030  //< FAULT0 on PE1
00312 #define GPIO_PCTL_PE1_CCP2      0x00000040  //< CCP2 on PE1
00313 #define GPIO_PCTL_PE1_CCP6      0x00000050  //< CCP6 on PE1
00314 #define GPIO_PCTL_PE1_EPI0S9    0x00000080  //< EPI0S9 on PE1
00315 #define GPIO_PCTL_PE2_M         0x00000F00  //< PE2 mask
00316 #define GPIO_PCTL_PE2_CCP4      0x00000100  //< CCP4 on PE2
00317 #define GPIO_PCTL_PE2_SSI1RX    0x00000200  //< SSI1RX on PE2
00318 #define GPIO_PCTL_PE2_PHB1      0x00000300  //< PHB1 on PE2
00319 #define GPIO_PCTL_PE2_PHA0      0x00000400  //< PHA0 on PE2
00320 #define GPIO_PCTL_PE2_CCP2      0x00000500  //< CCP2 on PE2
00321 #define GPIO_PCTL_PE2_EPI0S24   0x00000800  //< EPI0S24 on PE2
00322 #define GPIO_PCTL_PE3_M         0x0000F000  //< PE3 mask
00323 #define GPIO_PCTL_PE3_CCP1      0x00001000  //< CCP1 on PE3
00324 #define GPIO_PCTL_PE3_SSI1TX    0x00002000  //< SSI1TX on PE3
00325 #define GPIO_PCTL_PE3_PHA1      0x00003000  //< PHA1 on PE3
00326 #define GPIO_PCTL_PE3_PHB0      0x00004000  //< PHB0 on PE3
00327 #define GPIO_PCTL_PE3_CCP7      0x00005000  //< CCP7 on PE3
00328 #define GPIO_PCTL_PE3_EPI0S25   0x00008000  //< EPI0S25 on PE3
00329 #define GPIO_PCTL_PE4_M         0x000F0000  //< PE4 mask
00330 #define GPIO_PCTL_PE4_CCP3      0x00010000  //< CCP3 on PE4
00331 #define GPIO_PCTL_PE4_FAULT0    0x00040000  //< FAULT0 on PE4
00332 #define GPIO_PCTL_PE4_U2TX      0x00050000  //< U2TX on PE4
00333 #define GPIO_PCTL_PE4_CCP2      0x00060000  //< CCP2 on PE4
00334 #define GPIO_PCTL_PE4_I2S0TXWS  0x00090000  //< I2S0TXWS on PE4
00335 #define GPIO_PCTL_PE5_M         0x00F00000  //< PE5 mask
00336 #define GPIO_PCTL_PE5_CCP5      0x00100000  //< CCP5 on PE5
00337 #define GPIO_PCTL_PE5_I2S0TXSD  0x00900000  //< I2S0TXSD on PE5
00338 #define GPIO_PCTL_PE6_M         0x0F000000  //< PE6 mask
00339 #define GPIO_PCTL_PE6_PWM4      0x01000000  //< PWM4 on PE6
00340 #define GPIO_PCTL_PE6_C1O       0x02000000  //< C1O on PE6
00341 #define GPIO_PCTL_PE6_U1CTS     0x09000000  //< U1CTS on PE6
00342 #define GPIO_PCTL_PE7_M         0xF0000000  //< PE7 mask
00343 #define GPIO_PCTL_PE7_PWM5      0x10000000  //< PWM5 on PE7
00344 #define GPIO_PCTL_PE7_C2O       0x20000000  //< C2O on PE7
00345 #define GPIO_PCTL_PE7_U1DCD     0x90000000  //< U1DCD on PE7
00346 /*\}*/
00347
00352 /*\{*/
00353 #define GPIO_PCTL_PF0_M         0x0000000F  //< PF0 mask
00354 #define GPIO_PCTL_PF0_CAN1RX    0x00000001  //< CAN1RX on PF0
00355 #define GPIO_PCTL_PF0_PHB0      0x00000002  //< PHB0 on PF0
00356 #define GPIO_PCTL_PF0_PWM0      0x00000003  //< PWM0 on PF0
00357 #define GPIO_PCTL_PF0_I2S0TXSD  0x00000008  //< I2S0TXSD on PF0
00358 #define GPIO_PCTL_PF0_U1DSR     0x00000009  //< U1DSR on PF0
00359 #define GPIO_PCTL_PF1_M         0x000000F0  //< PF1 mask
00360 #define GPIO_PCTL_PF1_CAN1TX    0x00000010  //< CAN1TX on PF1
00361 #define GPIO_PCTL_PF1_IDX1      0x00000020  //< IDX1 on PF1
00362 #define GPIO_PCTL_PF1_PWM1      0x00000030  //< PWM1 on PF1
00363 #define GPIO_PCTL_PF1_I2S0TXMCLK \
00364                                 0x00000080  //< I2S0TXMCLK on PF1
00365 #define GPIO_PCTL_PF1_U1RTS     0x00000090  //< U1RTS on PF1
00366 #define GPIO_PCTL_PF1_CCP3      0x000000A0  //< CCP3 on PF1
00367 #define GPIO_PCTL_PF2_M         0x00000F00  //< PF2 mask
00368 #define GPIO_PCTL_PF2_LED1      0x00000100  //< LED1 on PF2
00369 #define GPIO_PCTL_PF2_PWM4      0x00000200  //< PWM4 on PF2
00370 #define GPIO_PCTL_PF2_PWM2      0x00000400  //< PWM2 on PF2
00371 #define GPIO_PCTL_PF2_SSI1CLK   0x00000900  //< SSI1CLK on PF2
00372 #define GPIO_PCTL_PF3_M         0x0000F000  //< PF3 mask
00373 #define GPIO_PCTL_PF3_LED0      0x00001000  //< LED0 on PF3
00374 #define GPIO_PCTL_PF3_PWM5      0x00002000  //< PWM5 on PF3
00375 #define GPIO_PCTL_PF3_PWM3      0x00004000  //< PWM3 on PF3
00376 #define GPIO_PCTL_PF3_SSI1FSS   0x00009000  //< SSI1FSS on PF3
00377 #define GPIO_PCTL_PF4_M         0x000F0000  //< PF4 mask
00378 #define GPIO_PCTL_PF4_CCP0      0x00010000  //< CCP0 on PF4
00379 #define GPIO_PCTL_PF4_C0O       0x00020000  //< C0O on PF4
00380 #define GPIO_PCTL_PF4_FAULT0    0x00040000  //< FAULT0 on PF4
00381 #define GPIO_PCTL_PF4_EPI0S12   0x00080000  //< EPI0S12 on PF4
00382 #define GPIO_PCTL_PF4_SSI1RX    0x00090000  //< SSI1RX on PF4
00383 #define GPIO_PCTL_PF5_M         0x00F00000  //< PF5 mask
00384 #define GPIO_PCTL_PF5_CCP2      0x00100000  //< CCP2 on PF5
00385 #define GPIO_PCTL_PF5_C1O       0x00200000  //< C1O on PF5
00386 #define GPIO_PCTL_PF5_EPI0S15   0x00800000  //< EPI0S15 on PF5
00387 #define GPIO_PCTL_PF5_SSI1TX    0x00900000  //< SSI1TX on PF5
00388 #define GPIO_PCTL_PF6_M         0x0F000000  //< PF6 mask
00389 #define GPIO_PCTL_PF6_CCP1      0x01000000  //< CCP1 on PF6
00390 #define GPIO_PCTL_PF6_C2O       0x02000000  //< C2O on PF6
00391 #define GPIO_PCTL_PF6_PHA0      0x04000000  //< PHA0 on PF6
00392 #define GPIO_PCTL_PF6_I2S0TXMCLK \
00393                                 0x09000000  //< I2S0TXMCLK on PF6
00394 #define GPIO_PCTL_PF6_U1RTS     0x0A000000  //< U1RTS on PF6
00395 #define GPIO_PCTL_PF7_M         0xF0000000  //< PF7 mask
00396 #define GPIO_PCTL_PF7_CCP4      0x10000000  //< CCP4 on PF7
00397 #define GPIO_PCTL_PF7_PHB0      0x40000000  //< PHB0 on PF7
00398 #define GPIO_PCTL_PF7_EPI0S12   0x80000000  //< EPI0S12 on PF7
00399 #define GPIO_PCTL_PF7_FAULT1    0x90000000  //< FAULT1 on PF7
00400 /*\}*/
00401
00406 /*\{*/
00407 #define GPIO_PCTL_PG0_M         0x0000000F  //< PG0 mask
00408 #define GPIO_PCTL_PG0_U2RX      0x00000001  //< U2RX on PG0
00409 #define GPIO_PCTL_PG0_PWM0      0x00000002  //< PWM0 on PG0
00410 #define GPIO_PCTL_PG0_I2C1SCL   0x00000003  //< I2C1SCL on PG0
00411 #define GPIO_PCTL_PG0_PWM4      0x00000004  //< PWM4 on PG0
00412 #define GPIO_PCTL_PG0_USB0EPEN  0x00000007  //< USB0EPEN on PG0
00413 #define GPIO_PCTL_PG0_EPI0S13   0x00000008  //< EPI0S13 on PG0
00414 #define GPIO_PCTL_PG1_M         0x000000F0  //< PG1 mask
00415 #define GPIO_PCTL_PG1_U2TX      0x00000010  //< U2TX on PG1
00416 #define GPIO_PCTL_PG1_PWM1      0x00000020  //< PWM1 on PG1
00417 #define GPIO_PCTL_PG1_I2C1SDA   0x00000030  //< I2C1SDA on PG1
00418 #define GPIO_PCTL_PG1_PWM5      0x00000040  //< PWM5 on PG1
00419 #define GPIO_PCTL_PG1_EPI0S14   0x00000080  //< EPI0S14 on PG1
00420 #define GPIO_PCTL_PG2_M         0x00000F00  //< PG2 mask
00421 #define GPIO_PCTL_PG2_PWM0      0x00000100  //< PWM0 on PG2
00422 #define GPIO_PCTL_PG2_FAULT0    0x00000400  //< FAULT0 on PG2
00423 #define GPIO_PCTL_PG2_IDX1      0x00000800  //< IDX1 on PG2
00424 #define GPIO_PCTL_PG2_I2S0RXSD  0x00000900  //< I2S0RXSD on PG2
00425 #define GPIO_PCTL_PG3_M         0x0000F000  //< PG3 mask
00426 #define GPIO_PCTL_PG3_PWM1      0x00001000  //< PWM1 on PG3
00427 #define GPIO_PCTL_PG3_FAULT2    0x00004000  //< FAULT2 on PG3
00428 #define GPIO_PCTL_PG3_FAULT0    0x00008000  //< FAULT0 on PG3
00429 #define GPIO_PCTL_PG3_I2S0RXMCLK \
00430                                 0x00009000  //< I2S0RXMCLK on PG3
00431 #define GPIO_PCTL_PG4_M         0x000F0000  //< PG4 mask
00432 #define GPIO_PCTL_PG4_CCP3      0x00010000  //< CCP3 on PG4
00433 #define GPIO_PCTL_PG4_FAULT1    0x00040000  //< FAULT1 on PG4
00434 #define GPIO_PCTL_PG4_EPI0S15   0x00080000  //< EPI0S15 on PG4
00435 #define GPIO_PCTL_PG4_PWM6      0x00090000  //< PWM6 on PG4
00436 #define GPIO_PCTL_PG4_U1RI      0x000A0000  //< U1RI on PG4
00437 #define GPIO_PCTL_PG5_M         0x00F00000  //< PG5 mask
00438 #define GPIO_PCTL_PG5_CCP5      0x00100000  //< CCP5 on PG5
00439 #define GPIO_PCTL_PG5_IDX0      0x00400000  //< IDX0 on PG5
00440 #define GPIO_PCTL_PG5_FAULT1    0x00500000  //< FAULT1 on PG5
00441 #define GPIO_PCTL_PG5_PWM7      0x00800000  //< PWM7 on PG5
00442 #define GPIO_PCTL_PG5_I2S0RXSCK 0x00900000  //< I2S0RXSCK on PG5
00443 #define GPIO_PCTL_PG5_U1DTR     0x00A00000  //< U1DTR on PG5
00444 #define GPIO_PCTL_PG6_M         0x0F000000  //< PG6 mask
00445 #define GPIO_PCTL_PG6_PHA1      0x01000000  //< PHA1 on PG6
00446 #define GPIO_PCTL_PG6_PWM6      0x04000000  //< PWM6 on PG6
00447 #define GPIO_PCTL_PG6_FAULT1    0x08000000  //< FAULT1 on PG6
00448 #define GPIO_PCTL_PG6_I2S0RXWS  0x09000000  //< I2S0RXWS on PG6
00449 #define GPIO_PCTL_PG6_U1RI      0x0A000000  //< U1RI on PG6
00450 #define GPIO_PCTL_PG7_M         0xF0000000  //< PG7 mask
00451 #define GPIO_PCTL_PG7_PHB1      0x10000000  //< PHB1 on PG7
00452 #define GPIO_PCTL_PG7_PWM7      0x40000000  //< PWM7 on PG7
00453 #define GPIO_PCTL_PG7_CCP5      0x80000000  //< CCP5 on PG7
00454 #define GPIO_PCTL_PG7_EPI0S31   0x90000000  //< EPI0S31 on PG7
00455 /*\}*/
00456
00461 /*\{*/
00462 #define GPIO_PCTL_PH0_M         0x0000000F  //< PH0 mask
00463 #define GPIO_PCTL_PH0_CCP6      0x00000001  //< CCP6 on PH0
00464 #define GPIO_PCTL_PH0_PWM2      0x00000002  //< PWM2 on PH0
00465 #define GPIO_PCTL_PH0_EPI0S6    0x00000008  //< EPI0S6 on PH0
00466 #define GPIO_PCTL_PH0_PWM4      0x00000009  //< PWM4 on PH0
00467 #define GPIO_PCTL_PH1_M         0x000000F0  //< PH1 mask
00468 #define GPIO_PCTL_PH1_CCP7      0x00000010  //< CCP7 on PH1
00469 #define GPIO_PCTL_PH1_PWM3      0x00000020  //< PWM3 on PH1
00470 #define GPIO_PCTL_PH1_EPI0S7    0x00000080  //< EPI0S7 on PH1
00471 #define GPIO_PCTL_PH1_PWM5      0x00000090  //< PWM5 on PH1
00472 #define GPIO_PCTL_PH2_M         0x00000F00  //< PH2 mask
00473 #define GPIO_PCTL_PH2_IDX1      0x00000100  //< IDX1 on PH2
00474 #define GPIO_PCTL_PH2_C1O       0x00000200  //< C1O on PH2
00475 #define GPIO_PCTL_PH2_FAULT3    0x00000400  //< FAULT3 on PH2
00476 #define GPIO_PCTL_PH2_EPI0S1    0x00000800  //< EPI0S1 on PH2
00477 #define GPIO_PCTL_PH3_M         0x0000F000  //< PH3 mask
00478 #define GPIO_PCTL_PH3_PHB0      0x00001000  //< PHB0 on PH3
00479 #define GPIO_PCTL_PH3_FAULT0    0x00002000  //< FAULT0 on PH3
00480 #define GPIO_PCTL_PH3_USB0EPEN  0x00004000  //< USB0EPEN on PH3
00481 #define GPIO_PCTL_PH3_EPI0S0    0x00008000  //< EPI0S0 on PH3
00482 #define GPIO_PCTL_PH4_M         0x000F0000  //< PH4 mask
00483 #define GPIO_PCTL_PH4_USB0PFLT  0x00040000  //< USB0PFLT on PH4
00484 #define GPIO_PCTL_PH4_EPI0S10   0x00080000  //< EPI0S10 on PH4
00485 #define GPIO_PCTL_PH4_SSI1CLK   0x000B0000  //< SSI1CLK on PH4
00486 #define GPIO_PCTL_PH5_M         0x00F00000  //< PH5 mask
00487 #define GPIO_PCTL_PH5_EPI0S11   0x00800000  //< EPI0S11 on PH5
00488 #define GPIO_PCTL_PH5_FAULT2    0x00A00000  //< FAULT2 on PH5
00489 #define GPIO_PCTL_PH5_SSI1FSS   0x00B00000  //< SSI1FSS on PH5
00490 #define GPIO_PCTL_PH6_M         0x0F000000  //< PH6 mask
00491 #define GPIO_PCTL_PH6_EPI0S26   0x08000000  //< EPI0S26 on PH6
00492 #define GPIO_PCTL_PH6_PWM4      0x0A000000  //< PWM4 on PH6
00493 #define GPIO_PCTL_PH6_SSI1RX    0x0B000000  //< SSI1RX on PH6
00494 #define GPIO_PCTL_PH7_M         0xF0000000  //< PH7 mask
00495 #define GPIO_PCTL_PH7_EPI0S27   0x80000000  //< EPI0S27 on PH7
00496 #define GPIO_PCTL_PH7_PWM5      0xA0000000  //< PWM5 on PH7
00497 #define GPIO_PCTL_PH7_SSI1TX    0xB0000000  //< SSI1TX on PH7
00498 /*\}*/
00499
00504 /*\{*/
00505 #define GPIO_PCTL_PJ0_M         0x0000000F  //< PJ0 mask
00506 #define GPIO_PCTL_PJ0_EPI0S16   0x00000008  //< EPI0S16 on PJ0
00507 #define GPIO_PCTL_PJ0_PWM0      0x0000000A  //< PWM0 on PJ0
00508 #define GPIO_PCTL_PJ0_I2C1SCL   0x0000000B  //< I2C1SCL on PJ0
00509 #define GPIO_PCTL_PJ1_M         0x000000F0  //< PJ1 mask
00510 #define GPIO_PCTL_PJ1_EPI0S17   0x00000080  //< EPI0S17 on PJ1
00511 #define GPIO_PCTL_PJ1_USB0PFLT  0x00000090  //< USB0PFLT on PJ1
00512 #define GPIO_PCTL_PJ1_PWM1      0x000000A0  //< PWM1 on PJ1
00513 #define GPIO_PCTL_PJ1_I2C1SDA   0x000000B0  //< I2C1SDA on PJ1
00514 #define GPIO_PCTL_PJ2_M         0x00000F00  //< PJ2 mask
00515 #define GPIO_PCTL_PJ2_EPI0S18   0x00000800  //< EPI0S18 on PJ2
00516 #define GPIO_PCTL_PJ2_CCP0      0x00000900  //< CCP0 on PJ2
00517 #define GPIO_PCTL_PJ2_FAULT0    0x00000A00  //< FAULT0 on PJ2
00518 #define GPIO_PCTL_PJ3_M         0x0000F000  //< PJ3 mask
00519 #define GPIO_PCTL_PJ3_EPI0S19   0x00008000  //< EPI0S19 on PJ3
00520 #define GPIO_PCTL_PJ3_U1CTS     0x00009000  //< U1CTS on PJ3
00521 #define GPIO_PCTL_PJ3_CCP6      0x0000A000  //< CCP6 on PJ3
00522 #define GPIO_PCTL_PJ4_M         0x000F0000  //< PJ4 mask
00523 #define GPIO_PCTL_PJ4_EPI0S28   0x00080000  //< EPI0S28 on PJ4
00524 #define GPIO_PCTL_PJ4_U1DCD     0x00090000  //< U1DCD on PJ4
00525 #define GPIO_PCTL_PJ4_CCP4      0x000A0000  //< CCP4 on PJ4
00526 #define GPIO_PCTL_PJ5_M         0x00F00000  //< PJ5 mask
00527 #define GPIO_PCTL_PJ5_EPI0S29   0x00800000  //< EPI0S29 on PJ5
00528 #define GPIO_PCTL_PJ5_U1DSR     0x00900000  //< U1DSR on PJ5
00529 #define GPIO_PCTL_PJ5_CCP2      0x00A00000  //< CCP2 on PJ5
00530 #define GPIO_PCTL_PJ6_M         0x0F000000  //< PJ6 mask
00531 #define GPIO_PCTL_PJ6_EPI0S30   0x08000000  //< EPI0S30 on PJ6
00532 #define GPIO_PCTL_PJ6_U1RTS     0x09000000  //< U1RTS on PJ6
00533 #define GPIO_PCTL_PJ6_CCP1      0x0A000000  //< CCP1 on PJ6
00534 #define GPIO_PCTL_PJ7_M         0xF0000000  //< PJ7 mask
00535 #define GPIO_PCTL_PJ7_U1DTR     0x90000000  //< U1DTR on PJ7
00536 #define GPIO_PCTL_PJ7_CCP0      0xA0000000  //< CCP0 on PJ7
00537 /*\}*/
00538
00542 /*\{*/
00543 #ifndef DEPRECATED
00544 /*\}*/
00545
00549 /*\{*/
00550 #define GPIO_O_PeriphID4        0x00000FD0
00551 #define GPIO_O_PeriphID5        0x00000FD4
00552 #define GPIO_O_PeriphID6        0x00000FD8
00553 #define GPIO_O_PeriphID7        0x00000FDC
00554 #define GPIO_O_PeriphID0        0x00000FE0
00555 #define GPIO_O_PeriphID1        0x00000FE4
00556 #define GPIO_O_PeriphID2        0x00000FE8
00557 #define GPIO_O_PeriphID3        0x00000FEC
00558 #define GPIO_O_PCellID0         0x00000FF0
00559 #define GPIO_O_PCellID1         0x00000FF4
00560 #define GPIO_O_PCellID2         0x00000FF8
00561 #define GPIO_O_PCellID3         0x00000FFC
00562 /*\}*/
00563
00567 /*\{*/
00568 #define GPIO_RV_DEN             0x000000FF  //< Digital input enable reg RV
00569 #define GPIO_RV_PUR             0x000000FF  //< Pull up select reg RV
00570 #define GPIO_RV_DR2R            0x000000FF  //< 2ma drive select reg RV
00571 #define GPIO_RV_PCellID1        0x000000F0
00572 #define GPIO_RV_PCellID3        0x000000B1
00573 #define GPIO_RV_PeriphID0       0x00000061
00574 #define GPIO_RV_PeriphID1       0x00000010
00575 #define GPIO_RV_PCellID0        0x0000000D
00576 #define GPIO_RV_PCellID2        0x00000005
00577 #define GPIO_RV_PeriphID2       0x00000004
00578 #define GPIO_RV_LOCK            0x00000001  //< Lock register RV
00579 #define GPIO_RV_PeriphID7       0x00000000
00580 #define GPIO_RV_PDR             0x00000000  //< Pull down select reg RV
00581 #define GPIO_RV_IC              0x00000000  //< Interrupt clear reg RV
00582 #define GPIO_RV_SLR             0x00000000  //< Slew rate control enable reg RV
00583 #define GPIO_RV_ODR             0x00000000  //< Open drain select reg RV
00584 #define GPIO_RV_IBE             0x00000000  //< Interrupt both edges reg RV
00585 #define GPIO_RV_AFSEL           0x00000000  //< Mode control select reg RV
00586 #define GPIO_RV_IS              0x00000000  //< Interrupt sense reg RV
00587 #define GPIO_RV_IM              0x00000000  //< Interrupt mask reg RV
00588 #define GPIO_RV_PeriphID4       0x00000000
00589 #define GPIO_RV_PeriphID5       0x00000000
00590 #define GPIO_RV_DR8R            0x00000000  //< 8ma drive select reg RV
00591 #define GPIO_RV_RIS             0x00000000  //< Raw interrupt status reg RV
00592 #define GPIO_RV_DR4R            0x00000000  //< 4ma drive select reg RV
00593 #define GPIO_RV_IEV             0x00000000  //< Intterupt event reg RV
00594 #define GPIO_RV_DIR             0x00000000  //< Data direction reg RV
00595 #define GPIO_RV_PeriphID6       0x00000000
00596 #define GPIO_RV_PeriphID3       0x00000000
00597 #define GPIO_RV_DATA            0x00000000  //< Data register reset value
00598 #define GPIO_RV_MIS             0x00000000  //< Masked interrupt status reg RV
00599 /*\}*/
00600
00601 #endif /* DEPRECATED */
00602
00603 #endif /* LM3S_GPIO_H */


BeRTOS: lm3s_i2c.h File Reference

  • cpu
  • cortex-m3
  • io
Defines
lm3s_i2c.h File Reference

LM3S I2C definition. More...

Go to the source code of this file.

Defines

#define | I2C_O_MSA 0x00000000
I2C Master Slave Address.
#define | I2C_O_SOAR 0x00000000
I2C Slave Own Address.
#define | I2C_O_SCSR 0x00000004
I2C Slave Control/Status.
#define | I2C_O_MCS 0x00000004
I2C Master Control/Status.
#define | I2C_O_SDR 0x00000008
I2C Slave Data.
#define | I2C_O_MDR 0x00000008
I2C Master Data.
#define | I2C_O_MTPR 0x0000000C
I2C Master Timer Period.
#define | I2C_O_SIMR 0x0000000C
I2C Slave Interrupt Mask.
#define | I2C_O_SRIS 0x00000010
I2C Slave Raw Interrupt Status.
#define | I2C_O_MIMR 0x00000010
I2C Master Interrupt Mask.
#define | I2C_O_MRIS 0x00000014
I2C Master Raw Interrupt Status.
#define | I2C_O_SMIS 0x00000014
I2C Slave Masked Interrupt.
#define | I2C_O_SICR 0x00000018
I2C Slave Interrupt Clear.
#define | I2C_O_MMIS 0x00000018
I2C Master Masked Interrupt.
#define | I2C_O_MICR 0x0000001C
I2C Master Interrupt Clear.
#define | I2C_O_MCR 0x00000020
I2C Master Configuration.
#define | I2C_MSA_SA_M 0x000000FE
I2C Slave Address.
#define | I2C_MSA_RS 0x00000001
Receive not send.
#define | I2C_MSA_ADDS 0
Set address write bit.
#define | I2C_MSA_ADDR 1
Set address read bit.
#define | I2C_SOAR_OAR_M 0x0000007F
I2C Slave Own Address.
#define | I2C_SCSR_FBR 0x00000004
First Byte Received.
#define | I2C_SCSR_TREQ 0x00000002
Transmit Request.
#define | I2C_SCSR_DA 0x00000001
Device Active.
#define | I2C_SCSR_RREQ 0x00000001
Receive Request.
#define | I2C_MCS_BUSBSY 0x00000040
Bus Busy.
#define | I2C_MCS_IDLE 0x00000020
I2C Idle.
#define | I2C_MCS_ARBLST 0x00000010
Arbitration Lost.
#define | I2C_MCS_ACK 0x00000008
Data Acknowledge Enable.
#define | I2C_MCS_DATACK 0x00000008
Acknowledge Data.
#define | I2C_MCS_ADRACK 0x00000004
Acknowledge Address.
#define | I2C_MCS_STOP 0x00000004
Generate STOP.
#define | I2C_MCS_START 0x00000002
Generate START.
#define | I2C_MCS_ERROR 0x00000002
Error.
#define | I2C_MCS_RUN 0x00000001
I2C Master Enable.
#define | I2C_MCS_BUSY 0x00000001
I2C Busy.
#define | I2C_SDR_DATA_M 0x000000FF
Data for Transfer.
#define | I2C_MDR_DATA_M 0x000000FF
Data Transferred.
#define | I2C_MTPR_TPR_M 0x000000FF
SCL Clock Period.
#define | I2C_SIMR_STOPIM 0x00000004
Stop Condition Interrupt Mask.
#define | I2C_SIMR_STARTIM 0x00000002
Start Condition Interrupt Mask.
#define | I2C_SIMR_DATAIM 0x00000001
Data Interrupt Mask.
#define | I2C_SRIS_STOPRIS 0x00000004
Stop Condition Raw Interrupt.
#define | I2C_SRIS_STARTRIS 0x00000002
Start Condition Raw Interrupt.
#define | I2C_SRIS_DATARIS 0x00000001
Data Raw Interrupt Status.
#define | I2C_MIMR_IM 0x00000001
Interrupt Mask.
#define | I2C_MRIS_RIS 0x00000001
Raw Interrupt Status.
#define | I2C_SMIS_STOPMIS 0x00000004
Stop Condition Masked Interrupt.
#define | I2C_SMIS_STARTMIS 0x00000002
Start Condition Masked Interrupt.
#define | I2C_SMIS_DATAMIS 0x00000001
Data Masked Interrupt Status.
#define | I2C_SICR_STOPIC 0x00000004
Stop Condition Interrupt Clear.
#define | I2C_SICR_STARTIC 0x00000002
Start Condition Interrupt Clear.
#define | I2C_SICR_DATAIC 0x00000001
Data Interrupt Clear.
#define | I2C_MMIS_MIS 0x00000001
Masked Interrupt Status.
#define | I2C_MICR_IC 0x00000001
Interrupt Clear.
#define | I2C_MCR_SFE 0x00000020
I2C Slave Function Enable.
#define | I2C_MCR_MFE 0x00000010
I2C Master Function Enable.
#define | I2C_MCR_LPBK 0x00000001
I2C Loopback.
#define | I2C_O_SLAVE 0x00000800
Offset from master to slave.
#define | I2C_SIMR_IM 0x00000001
Interrupt Mask.
#define | I2C_SRIS_RIS 0x00000001
Raw Interrupt Status.
#define | I2C_SMIS_MIS 0x00000001
Masked Interrupt Status.
#define | I2C_SICR_IC 0x00000001
Clear Interrupt.
#define | I2C_MASTER_O_SA 0x00000000
Slave address register.
#define | I2C_MASTER_O_CS 0x00000004
Control and Status register.
#define | I2C_MASTER_O_DR 0x00000008
Data register.
#define | I2C_MASTER_O_TPR 0x0000000C
Timer period register.
#define | I2C_MASTER_O_IMR 0x00000010
Interrupt mask register.
#define | I2C_MASTER_O_RIS 0x00000014
Raw interrupt status register.
#define | I2C_MASTER_O_MIS 0x00000018
Masked interrupt status reg.
#define | I2C_MASTER_O_MICR 0x0000001C
Interrupt clear register.
#define | I2C_MASTER_O_CR 0x00000020
Configuration register.
#define | I2C_SLAVE_O_SICR 0x00000018
Interrupt clear register.
#define | I2C_SLAVE_O_MIS 0x00000014
Masked interrupt status reg.
#define | I2C_SLAVE_O_RIS 0x00000010
Raw interrupt status register.
#define | I2C_SLAVE_O_IM 0x0000000C
Interrupt mask register.
#define | I2C_SLAVE_O_DR 0x00000008
Data register.
#define | I2C_SLAVE_O_CSR 0x00000004
Control/Status register.
#define | I2C_SLAVE_O_OAR 0x00000000
Own address register.
#define | I2C_MASTER_SA_SA_MASK 0x000000FE
Slave address.
#define | I2C_MASTER_SA_RS 0x00000001
Receive/send.
#define | I2C_MASTER_CS_BUS_BUSY 0x00000040
Bus busy.
#define | I2C_MASTER_CS_IDLE 0x00000020
Idle.
#define | I2C_MASTER_CS_BUSY 0x00000001
Controller is TX/RX data.
#define | I2C_MASTER_CS_ERROR 0x00000002
Error occurred.
#define | I2C_MASTER_CS_ADDR_ACK 0x00000004
Address byte not acknowledged.
#define | I2C_MASTER_CS_DATA_ACK 0x00000008
Data byte not acknowledged.
#define | I2C_MASTER_CS_ARB_LOST 0x00000010
Lost arbitration.
#define | I2C_MASTER_CS_ACK 0x00000008
Acknowlegde.
#define | I2C_MASTER_CS_STOP 0x00000004
Stop.
#define | I2C_MASTER_CS_START 0x00000002
Start.
#define | I2C_MASTER_CS_RUN 0x00000001
Run.
#define | I2C_SCL_FAST 400000
SCL fast frequency.
#define | I2C_SCL_STANDARD 100000
SCL standard frequency.
#define | I2C_MASTER_TPR_SCL_LP 0x00000006
SCL low period.
#define | I2C_MASTER_TPR_SCL_HP 0x00000004
SCL high period.
#define | I2C_MASTER_IMR_IM 0x00000001
Master interrupt mask.
#define | I2C_MASTER_RIS_RIS 0x00000001
Master raw interrupt status.
#define | I2C_MASTER_MIS_MIS 0x00000001
Master masked interrupt status.
#define | I2C_MASTER_MICR_IC 0x00000001
Master interrupt clear.
#define | I2C_MASTER_CR_SFE 0x00000020
Slave function enable.
#define | I2C_MASTER_CR_MFE 0x00000010
Master function enable.
#define | I2C_MASTER_CR_LPBK 0x00000001
Loopback enable.
#define | I2C_SLAVE_SOAR_OAR_MASK 0x0000007F
Slave address.
#define | I2C_SLAVE_CSR_FBR 0x00000004
First byte received from master.
#define | I2C_SLAVE_CSR_TREQ 0x00000002
Transmit request received.
#define | I2C_SLAVE_CSR_DA 0x00000001
Enable the device.
#define | I2C_SLAVE_CSR_RREQ 0x00000001
Receive data from I2C master.
#define | I2C_SLAVE_IMR_IM 0x00000001
Slave interrupt mask.
#define | I2C_SLAVE_RIS_RIS 0x00000001
Slave raw interrupt status.
#define | I2C_SLAVE_MIS_MIS 0x00000001
Slave masked interrupt status.
#define | I2C_SLAVE_SICR_IC 0x00000001
Slave interrupt clear.

Detailed Description

LM3S I2C definition.

Definition in file lm3s_i2c.h.

Define Documentation

#define I2C_O_MMIS 0x00000018

I2C Master Masked Interrupt.

Status

Definition at line 55 of file lm3s_i2c.h.

#define I2C_O_SMIS 0x00000014

I2C Slave Masked Interrupt.

Status

Definition at line 52 of file lm3s_i2c.h.

#define I2C_SMIS_STARTMIS 0x00000002

Start Condition Masked Interrupt.

Status

Definition at line 132 of file lm3s_i2c.h.

#define I2C_SMIS_STOPMIS 0x00000004

Stop Condition Masked Interrupt.

Status

Definition at line 130 of file lm3s_i2c.h.

#define I2C_SRIS_STARTRIS 0x00000002

Start Condition Raw Interrupt.

Status

Definition at line 117 of file lm3s_i2c.h.

#define I2C_SRIS_STOPRIS 0x00000004

Stop Condition Raw Interrupt.

Status

Definition at line 115 of file lm3s_i2c.h.


BeRTOS: lm3s_i2c.h Source File

  • cpu
  • cortex-m3
  • io
lm3s_i2c.h
Go to the documentation of this file.
00001
00036 #ifndef LM3S_I2C_H
00037 #define LM3S_I2C_H
00038
00039
00040 /* The following are defines for the I2C register offsets. */
00041 #define I2C_O_MSA               0x00000000  ///< I2C Master Slave Address
00042 #define I2C_O_SOAR              0x00000000  ///< I2C Slave Own Address
00043 #define I2C_O_SCSR              0x00000004  ///< I2C Slave Control/Status
00044 #define I2C_O_MCS               0x00000004  ///< I2C Master Control/Status
00045 #define I2C_O_SDR               0x00000008  ///< I2C Slave Data
00046 #define I2C_O_MDR               0x00000008  ///< I2C Master Data
00047 #define I2C_O_MTPR              0x0000000C  ///< I2C Master Timer Period
00048 #define I2C_O_SIMR              0x0000000C  ///< I2C Slave Interrupt Mask
00049 #define I2C_O_SRIS              0x00000010  ///< I2C Slave Raw Interrupt Status
00050 #define I2C_O_MIMR              0x00000010  ///< I2C Master Interrupt Mask
00051 #define I2C_O_MRIS              0x00000014  ///< I2C Master Raw Interrupt Status
00052 #define I2C_O_SMIS              0x00000014  ///< I2C Slave Masked Interrupt
00053
00054 #define I2C_O_SICR              0x00000018  ///< I2C Slave Interrupt Clear
00055 #define I2C_O_MMIS              0x00000018  ///< I2C Master Masked Interrupt
00056
00057 #define I2C_O_MICR              0x0000001C  ///< I2C Master Interrupt Clear
00058 #define I2C_O_MCR               0x00000020  ///< I2C Master Configuration
00059
00060
00061 /* The following are defines for the bit fields in the I2C_O_MSA register. */
00062 #define I2C_MSA_SA_M            0x000000FE  ///< I2C Slave Address
00063 #define I2C_MSA_RS              0x00000001  ///< Receive not send
00064 #define I2C_MSA_SA_S            1
00065 #define I2C_MSA_ADDS            0           ///< Set address write bit
00066 #define I2C_MSA_ADDR            1           ///< Set address read bit
00067
00068
00069 /* The following are defines for the bit fields in the I2C_O_SOAR register. */
00070 #define I2C_SOAR_OAR_M          0x0000007F  ///< I2C Slave Own Address
00071 #define I2C_SOAR_OAR_S          0
00072
00073
00074 /* The following are defines for the bit fields in the I2C_O_SCSR register. */
00075 #define I2C_SCSR_FBR            0x00000004  ///< First Byte Received
00076 #define I2C_SCSR_TREQ           0x00000002  ///< Transmit Request
00077 #define I2C_SCSR_DA             0x00000001  ///< Device Active
00078 #define I2C_SCSR_RREQ           0x00000001  ///< Receive Request
00079
00080 /* The following are defines for the bit fields in the I2C_O_MCS register. */
00081 #define I2C_MCS_BUSBSY          0x00000040  ///< Bus Busy
00082 #define I2C_MCS_IDLE            0x00000020  ///< I2C Idle
00083 #define I2C_MCS_ARBLST          0x00000010  ///< Arbitration Lost
00084 #define I2C_MCS_ACK             0x00000008  ///< Data Acknowledge Enable
00085 #define I2C_MCS_DATACK          0x00000008  ///< Acknowledge Data
00086 #define I2C_MCS_ADRACK          0x00000004  ///< Acknowledge Address
00087 #define I2C_MCS_STOP            0x00000004  ///< Generate STOP
00088 #define I2C_MCS_START           0x00000002  ///< Generate START
00089 #define I2C_MCS_ERROR           0x00000002  ///< Error
00090 #define I2C_MCS_RUN             0x00000001  ///< I2C Master Enable
00091 #define I2C_MCS_BUSY            0x00000001  ///< I2C Busy
00092
00093
00094 /* The following are defines for the bit fields in the I2C_O_SDR register. */
00095 #define I2C_SDR_DATA_M          0x000000FF  ///< Data for Transfer
00096 #define I2C_SDR_DATA_S          0
00097
00098 /* The following are defines for the bit fields in the I2C_O_MDR register. */
00099 #define I2C_MDR_DATA_M          0x000000FF  ///< Data Transferred
00100 #define I2C_MDR_DATA_S          0
00101
00102
00103 /* The following are defines for the bit fields in the I2C_O_MTPR register. */
00104 #define I2C_MTPR_TPR_M          0x000000FF  ///< SCL Clock Period
00105 #define I2C_MTPR_TPR_S          0
00106
00107
00108 /* The following are defines for the bit fields in the I2C_O_SIMR register. */
00109 #define I2C_SIMR_STOPIM         0x00000004  ///< Stop Condition Interrupt Mask
00110 #define I2C_SIMR_STARTIM        0x00000002  ///< Start Condition Interrupt Mask
00111 #define I2C_SIMR_DATAIM         0x00000001  ///< Data Interrupt Mask
00112
00113
00114 /* The following are defines for the bit fields in the I2C_O_SRIS register. */
00115 #define I2C_SRIS_STOPRIS        0x00000004  ///< Stop Condition Raw Interrupt
00116
00117 #define I2C_SRIS_STARTRIS       0x00000002  ///< Start Condition Raw Interrupt
00118
00119 #define I2C_SRIS_DATARIS        0x00000001  ///< Data Raw Interrupt Status
00120
00121
00122 /* The following are defines for the bit fields in the I2C_O_MIMR register. */
00123 #define I2C_MIMR_IM             0x00000001  ///< Interrupt Mask
00124
00125
00126 /* The following are defines for the bit fields in the I2C_O_MRIS register. */
00127 #define I2C_MRIS_RIS            0x00000001  ///< Raw Interrupt Status
00128
00129 /* The following are defines for the bit fields in the I2C_O_SMIS register. */
00130 #define I2C_SMIS_STOPMIS        0x00000004  ///< Stop Condition Masked Interrupt
00131
00132 #define I2C_SMIS_STARTMIS       0x00000002  ///< Start Condition Masked Interrupt
00133
00134 #define I2C_SMIS_DATAMIS        0x00000001  ///< Data Masked Interrupt Status
00135
00136 /* The following are defines for the bit fields in the I2C_O_SICR register. */
00137 #define I2C_SICR_STOPIC         0x00000004  ///< Stop Condition Interrupt Clear
00138 #define I2C_SICR_STARTIC        0x00000002  ///< Start Condition Interrupt Clear
00139 #define I2C_SICR_DATAIC         0x00000001  ///< Data Interrupt Clear
00140
00141 /* The following are defines for the bit fields in the I2C_O_MMIS register. */
00142 #define I2C_MMIS_MIS            0x00000001  ///< Masked Interrupt Status
00143
00144
00145 /* The following are defines for the bit fields in the I2C_O_MICR register. */
00146 #define I2C_MICR_IC             0x00000001  ///< Interrupt Clear
00147
00148
00149 /* The following are defines for the bit fields in the I2C_O_MCR register. */
00150 #define I2C_MCR_SFE             0x00000020  ///< I2C Slave Function Enable
00151 #define I2C_MCR_MFE             0x00000010  ///< I2C Master Function Enable
00152 #define I2C_MCR_LPBK            0x00000001  ///< I2C Loopback
00153
00154
00155
00156 #define I2C_MASTER_CMD_SINGLE_SEND                     0x00000007
00157 #define I2C_MASTER_CMD_SINGLE_RECEIVE                  0x00000007
00158
00159 #define I2C_MASTER_CMD_BURST_SEND_START                0x00000003
00160 #define I2C_MASTER_CMD_BURST_SEND_CONT                 0x00000001
00161 #define I2C_MASTER_CMD_BURST_SEND_FINISH               0x00000005
00162 #define I2C_MASTER_CMD_BURST_SEND_ERROR_STOP           0x00000004
00163
00164 #define I2C_MASTER_CMD_BURST_RECEIVE_START             0x0000000b
00165 #define I2C_MASTER_CMD_BURST_RECEIVE_CONT              0x00000009
00166 #define I2C_MASTER_CMD_BURST_RECEIVE_FINISH            0x00000005
00167 #define I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP        0x00000004
00168
00169
00170 /* The following definitions are deprecated. */
00171
00172 #ifndef DEPRECATED
00173
00174     #define I2C_O_SLAVE             0x00000800  ///< Offset from master to slave
00175
00176     #define I2C_SIMR_IM             0x00000001  ///< Interrupt Mask
00177
00178     #define I2C_SRIS_RIS            0x00000001  ///< Raw Interrupt Status
00179
00180     #define I2C_SMIS_MIS            0x00000001  ///< Masked Interrupt Status
00181
00182     #define I2C_SICR_IC             0x00000001  ///< Clear Interrupt
00183
00184     #define I2C_MASTER_O_SA         0x00000000  ///< Slave address register
00185     #define I2C_MASTER_O_CS         0x00000004  ///< Control and Status register
00186     #define I2C_MASTER_O_DR         0x00000008  ///< Data register
00187     #define I2C_MASTER_O_TPR        0x0000000C  ///< Timer period register
00188     #define I2C_MASTER_O_IMR        0x00000010  ///< Interrupt mask register
00189     #define I2C_MASTER_O_RIS        0x00000014  ///< Raw interrupt status register
00190     #define I2C_MASTER_O_MIS        0x00000018  ///< Masked interrupt status reg
00191     #define I2C_MASTER_O_MICR       0x0000001C  ///< Interrupt clear register
00192     #define I2C_MASTER_O_CR         0x00000020  ///< Configuration register
00193
00194     #define I2C_SLAVE_O_SICR        0x00000018  ///< Interrupt clear register
00195     #define I2C_SLAVE_O_MIS         0x00000014  ///< Masked interrupt status reg
00196     #define I2C_SLAVE_O_RIS         0x00000010  ///< Raw interrupt status register
00197     #define I2C_SLAVE_O_IM          0x0000000C  ///< Interrupt mask register
00198     #define I2C_SLAVE_O_DR          0x00000008  ///< Data register
00199     #define I2C_SLAVE_O_CSR         0x00000004  ///< Control/Status register
00200     #define I2C_SLAVE_O_OAR         0x00000000  ///< Own address register
00201
00202     #define I2C_MASTER_SA_SA_MASK   0x000000FE  ///< Slave address
00203     #define I2C_MASTER_SA_RS        0x00000001  ///< Receive/send
00204     #define I2C_MASTER_SA_SA_SHIFT  1
00205
00206     #define I2C_MASTER_CS_BUS_BUSY  0x00000040  ///< Bus busy
00207     #define I2C_MASTER_CS_IDLE      0x00000020  ///< Idle
00208     #define I2C_MASTER_CS_ERR_MASK  0x0000001C
00209     #define I2C_MASTER_CS_BUSY      0x00000001  ///< Controller is TX/RX data
00210     #define I2C_MASTER_CS_ERROR     0x00000002  ///< Error occurred
00211     #define I2C_MASTER_CS_ADDR_ACK  0x00000004  ///< Address byte not acknowledged
00212     #define I2C_MASTER_CS_DATA_ACK  0x00000008  ///< Data byte not acknowledged
00213     #define I2C_MASTER_CS_ARB_LOST  0x00000010  ///< Lost arbitration
00214     #define I2C_MASTER_CS_ACK       0x00000008  ///< Acknowlegde
00215     #define I2C_MASTER_CS_STOP      0x00000004  ///< Stop
00216     #define I2C_MASTER_CS_START     0x00000002  ///< Start
00217     #define I2C_MASTER_CS_RUN       0x00000001  ///< Run
00218
00219
00220     #define I2C_SCL_FAST            400000      ///< SCL fast frequency
00221     #define I2C_SCL_STANDARD        100000      ///< SCL standard frequency
00222     #define I2C_MASTER_TPR_SCL_LP   0x00000006  ///< SCL low period
00223     #define I2C_MASTER_TPR_SCL_HP   0x00000004  ///< SCL high period
00224     #define I2C_MASTER_TPR_SCL      (I2C_MASTER_TPR_SCL_HP + I2C_MASTER_TPR_SCL_LP)
00225
00226     #define I2C_MASTER_IMR_IM       0x00000001  ///< Master interrupt mask
00227
00228     #define I2C_MASTER_RIS_RIS      0x00000001  ///< Master raw interrupt status
00229
00230     #define I2C_MASTER_MIS_MIS      0x00000001  ///< Master masked interrupt status
00231
00232     #define I2C_MASTER_MICR_IC      0x00000001  ///< Master interrupt clear
00233
00234     #define I2C_MASTER_CR_SFE       0x00000020  ///< Slave function enable
00235     #define I2C_MASTER_CR_MFE       0x00000010  ///< Master function enable
00236     #define I2C_MASTER_CR_LPBK      0x00000001  ///< Loopback enable
00237
00238     #define I2C_SLAVE_SOAR_OAR_MASK 0x0000007F  ///< Slave address
00239
00240     #define I2C_SLAVE_CSR_FBR       0x00000004  ///< First byte received from master
00241     #define I2C_SLAVE_CSR_TREQ      0x00000002  ///< Transmit request received
00242     #define I2C_SLAVE_CSR_DA        0x00000001  ///< Enable the device
00243     #define I2C_SLAVE_CSR_RREQ      0x00000001  ///< Receive data from I2C master
00244
00245     #define I2C_SLAVE_IMR_IM        0x00000001  ///< Slave interrupt mask
00246
00247     #define I2C_SLAVE_RIS_RIS       0x00000001  ///< Slave raw interrupt status
00248
00249     #define I2C_SLAVE_MIS_MIS       0x00000001  ///< Slave masked interrupt status
00250
00251     #define I2C_SLAVE_SICR_IC       0x00000001  ///< Slave interrupt clear
00252
00253 #endif
00254
00255 #endif /* LM3S_I2C_H */


BeRTOS: lm3s_ints.h File Reference

  • cpu
  • cortex-m3
  • io
lm3s_ints.h File Reference

LM3S1968 interrupts definition. More...

Go to the source code of this file.

Defines

#define | FAULT_NMI 2
The following are defines for the fault assignments.
#define | FAULT_HARD 3
Hard fault.
#define | FAULT_MPU 4
MPU fault.
#define | FAULT_BUS 5
Bus fault.
#define | FAULT_USAGE 6
Usage fault.
#define | FAULT_SVCALL 11
SVCall.
#define | FAULT_DEBUG 12
Debug monitor.
#define | FAULT_PENDSV 14
PendSV.
#define | FAULT_SYSTICK 15
System Tick.
#define | INT_GPIOA 16
The following are defines for the interrupt assignments.
#define | INT_GPIOB 17
GPIO Port B.
#define | INT_GPIOC 18
GPIO Port C.
#define | INT_GPIOD 19
GPIO Port D.
#define | INT_GPIOE 20
GPIO Port E.
#define | INT_UART0 21
UART0 Rx and Tx.
#define | INT_UART1 22
UART1 Rx and Tx.
#define | INT_SSI0 23
SSI0 Rx and Tx.
#define | INT_I2C0 24
I2C0 Master and Slave.
#define | INT_PWM_FAULT 25
PWM Fault.
#define | INT_PWM0 26
PWM Generator 0.
#define | INT_PWM1 27
PWM Generator 1.
#define | INT_PWM2 28
PWM Generator 2.
#define | INT_QEI0 29
Quadrature Encoder 0.
#define | INT_ADC0 30
ADC Sequence 0.
#define | INT_ADC1 31
ADC Sequence 1.
#define | INT_ADC2 32
ADC Sequence 2.
#define | INT_ADC3 33
ADC Sequence 3.
#define | INT_WATCHDOG 34
Watchdog timer.
#define | INT_TIMER0A 35
Timer 0 subtimer A.
#define | INT_TIMER0B 36
Timer 0 subtimer B.
#define | INT_TIMER1A 37
Timer 1 subtimer A.
#define | INT_TIMER1B 38
Timer 1 subtimer B.
#define | INT_TIMER2A 39
Timer 2 subtimer A.
#define | INT_TIMER2B 40
Timer 2 subtimer B.
#define | INT_COMP0 41
Analog Comparator 0.
#define | INT_COMP1 42
Analog Comparator 1.
#define | INT_COMP2 43
Analog Comparator 2.
#define | INT_SYSCTL 44
System Control (PLL, OSC, BO)
#define | INT_FLASH 45
FLASH Control.
#define | INT_GPIOF 46
GPIO Port F.
#define | INT_GPIOG 47
GPIO Port G.
#define | INT_GPIOH 48
GPIO Port H.
#define | INT_UART2 49
UART2 Rx and Tx.
#define | INT_SSI1 50
SSI1 Rx and Tx.
#define | INT_TIMER3A 51
Timer 3 subtimer A.
#define | INT_TIMER3B 52
Timer 3 subtimer B.
#define | INT_I2C1 53
I2C1 Master and Slave.
#define | INT_QEI1 54
Quadrature Encoder 1.
#define | INT_CAN0 55
CAN0.
#define | INT_CAN1 56
CAN1.
#define | INT_CAN2 57
CAN2.
#define | INT_ETH 58
Ethernet.
#define | INT_HIBERNATE 59
Hibernation module.
#define | INT_USB0 60
USB 0 Controller.
#define | INT_PWM3 61
PWM Generator 3.
#define | INT_UDMA 62
uDMA controller
#define | INT_UDMAERR 63
uDMA Error
#define | INT_ADC1SS0 64
ADC1 Sequence 0.
#define | INT_ADC1SS1 65
ADC1 Sequence 1.
#define | INT_ADC1SS2 66
ADC1 Sequence 2.
#define | INT_ADC1SS3 67
ADC1 Sequence 3.
#define | INT_I2S0 68
I2S0.
#define | INT_EPI0 69
EPI0.
#define | INT_GPIOJ 70
GPIO Port J.
#define | NUM_INTERRUPTS 71
The following are defines for the total number of interrupts.
#define | NUM_PRIORITY 8
The following are defines for the total number of priority levels.
#define | NUM_PRIORITY_BITS 3
The following are defines for the total number of priority levels.

Detailed Description

LM3S1968 interrupts definition.

Definition in file lm3s_ints.h.

Define Documentation

#define FAULT_NMI 2

The following are defines for the fault assignments.

NMI fault

Definition at line 43 of file lm3s_ints.h.

#define INT_GPIOA 16

The following are defines for the interrupt assignments.

GPIO Port A

Definition at line 58 of file lm3s_ints.h.


BeRTOS: lm3s_ints.h Source File

  • cpu
  • cortex-m3
  • io
lm3s_ints.h
Go to the documentation of this file.
00001
00036 #ifndef LM3S_INTS_H
00037 #define LM3S_INTS_H
00038
00042 /*\{*/
00043 #define FAULT_NMI               2           ///< NMI fault
00044 #define FAULT_HARD              3           ///< Hard fault
00045 #define FAULT_MPU               4           ///< MPU fault
00046 #define FAULT_BUS               5           ///< Bus fault
00047 #define FAULT_USAGE             6           ///< Usage fault
00048 #define FAULT_SVCALL            11          ///< SVCall
00049 #define FAULT_DEBUG             12          ///< Debug monitor
00050 #define FAULT_PENDSV            14          ///< PendSV
00051 #define FAULT_SYSTICK           15          ///< System Tick
00052 /*\}*/
00053
00057 /*\{*/
00058 #define INT_GPIOA               16          ///< GPIO Port A
00059 #define INT_GPIOB               17          ///< GPIO Port B
00060 #define INT_GPIOC               18          ///< GPIO Port C
00061 #define INT_GPIOD               19          ///< GPIO Port D
00062 #define INT_GPIOE               20          ///< GPIO Port E
00063 #define INT_UART0               21          ///< UART0 Rx and Tx
00064 #define INT_UART1               22          ///< UART1 Rx and Tx
00065 #define INT_SSI0                23          ///< SSI0 Rx and Tx
00066 #define INT_I2C0                24          ///< I2C0 Master and Slave
00067 #define INT_PWM_FAULT           25          ///< PWM Fault
00068 #define INT_PWM0                26          ///< PWM Generator 0
00069 #define INT_PWM1                27          ///< PWM Generator 1
00070 #define INT_PWM2                28          ///< PWM Generator 2
00071 #define INT_QEI0                29          ///< Quadrature Encoder 0
00072 #define INT_ADC0                30          ///< ADC Sequence 0
00073 #define INT_ADC1                31          ///< ADC Sequence 1
00074 #define INT_ADC2                32          ///< ADC Sequence 2
00075 #define INT_ADC3                33          ///< ADC Sequence 3
00076 #define INT_WATCHDOG            34          ///< Watchdog timer
00077 #define INT_TIMER0A             35          ///< Timer 0 subtimer A
00078 #define INT_TIMER0B             36          ///< Timer 0 subtimer B
00079 #define INT_TIMER1A             37          ///< Timer 1 subtimer A
00080 #define INT_TIMER1B             38          ///< Timer 1 subtimer B
00081 #define INT_TIMER2A             39          ///< Timer 2 subtimer A
00082 #define INT_TIMER2B             40          ///< Timer 2 subtimer B
00083 #define INT_COMP0               41          ///< Analog Comparator 0
00084 #define INT_COMP1               42          ///< Analog Comparator 1
00085 #define INT_COMP2               43          ///< Analog Comparator 2
00086 #define INT_SYSCTL              44          ///< System Control (PLL, OSC, BO)
00087 #define INT_FLASH               45          ///< FLASH Control
00088 #define INT_GPIOF               46          ///< GPIO Port F
00089 #define INT_GPIOG               47          ///< GPIO Port G
00090 #define INT_GPIOH               48          ///< GPIO Port H
00091 #define INT_UART2               49          ///< UART2 Rx and Tx
00092 #define INT_SSI1                50          ///< SSI1 Rx and Tx
00093 #define INT_TIMER3A             51          ///< Timer 3 subtimer A
00094 #define INT_TIMER3B             52          ///< Timer 3 subtimer B
00095 #define INT_I2C1                53          ///< I2C1 Master and Slave
00096 #define INT_QEI1                54          ///< Quadrature Encoder 1
00097 #define INT_CAN0                55          ///< CAN0
00098 #define INT_CAN1                56          ///< CAN1
00099 #define INT_CAN2                57          ///< CAN2
00100 #define INT_ETH                 58          ///< Ethernet
00101 #define INT_HIBERNATE           59          ///< Hibernation module
00102 #define INT_USB0                60          ///< USB 0 Controller
00103 #define INT_PWM3                61          ///< PWM Generator 3
00104 #define INT_UDMA                62          ///< uDMA controller
00105 #define INT_UDMAERR             63          ///< uDMA Error
00106 #define INT_ADC1SS0             64          ///< ADC1 Sequence 0
00107 #define INT_ADC1SS1             65          ///< ADC1 Sequence 1
00108 #define INT_ADC1SS2             66          ///< ADC1 Sequence 2
00109 #define INT_ADC1SS3             67          ///< ADC1 Sequence 3
00110 #define INT_I2S0                68          ///< I2S0
00111 #define INT_EPI0                69          ///< EPI0
00112 #define INT_GPIOJ               70          ///< GPIO Port J
00113 /*\}*/
00114
00118 /*\{*/
00119 #define NUM_INTERRUPTS          71
00120 /*\}*/
00121
00125 /*\{*/
00126 #define NUM_PRIORITY            8
00127 #define NUM_PRIORITY_BITS       3
00128 /*\}*/
00129
00130 #endif /* LM3S_INTS_H */


BeRTOS: lm3s_memmap.h File Reference

  • cpu
  • cortex-m3
  • io
Defines
lm3s_memmap.h File Reference

LM3S1968 memory map. More...

Go to the source code of this file.

Defines

#define | WATCHDOG_BASE 0x40000000
The following definitions are deprecated.
#define | FLASH_BASE 0x00000000
The following are defines for the base address of the memories and peripherals.
#define | SRAM_BASE 0x20000000
The following are defines for the base address of the memories and peripherals.
#define | WATCHDOG0_BASE 0x40000000
The following are defines for the base address of the memories and peripherals.
#define | WATCHDOG1_BASE 0x40001000
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTA_BASE 0x40004000
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTB_BASE 0x40005000
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTC_BASE 0x40006000
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTD_BASE 0x40007000
The following are defines for the base address of the memories and peripherals.
#define | SSI0_BASE 0x40008000
The following are defines for the base address of the memories and peripherals.
#define | SSI1_BASE 0x40009000
The following are defines for the base address of the memories and peripherals.
#define | UART0_BASE 0x4000C000
The following are defines for the base address of the memories and peripherals.
#define | UART1_BASE 0x4000D000
The following are defines for the base address of the memories and peripherals.
#define | UART2_BASE 0x4000E000
The following are defines for the base address of the memories and peripherals.
#define | I2C0_MASTER_BASE 0x40020000
The following are defines for the base address of the memories and peripherals.
#define | I2C0_SLAVE_BASE 0x40020800
The following are defines for the base address of the memories and peripherals.
#define | I2C1_MASTER_BASE 0x40021000
The following are defines for the base address of the memories and peripherals.
#define | I2C1_SLAVE_BASE 0x40021800
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTE_BASE 0x40024000
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTF_BASE 0x40025000
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTG_BASE 0x40026000
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTH_BASE 0x40027000
The following are defines for the base address of the memories and peripherals.
#define | PWM_BASE 0x40028000
The following are defines for the base address of the memories and peripherals.
#define | QEI0_BASE 0x4002C000
The following are defines for the base address of the memories and peripherals.
#define | QEI1_BASE 0x4002D000
The following are defines for the base address of the memories and peripherals.
#define | TIMER0_BASE 0x40030000
The following are defines for the base address of the memories and peripherals.
#define | TIMER1_BASE 0x40031000
The following are defines for the base address of the memories and peripherals.
#define | TIMER2_BASE 0x40032000
The following are defines for the base address of the memories and peripherals.
#define | TIMER3_BASE 0x40033000
The following are defines for the base address of the memories and peripherals.
#define | ADC0_BASE 0x40038000
The following are defines for the base address of the memories and peripherals.
#define | ADC1_BASE 0x40039000
The following are defines for the base address of the memories and peripherals.
#define | COMP_BASE 0x4003C000
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTJ_BASE 0x4003D000
The following are defines for the base address of the memories and peripherals.
#define | CAN0_BASE 0x40040000
The following are defines for the base address of the memories and peripherals.
#define | CAN1_BASE 0x40041000
The following are defines for the base address of the memories and peripherals.
#define | CAN2_BASE 0x40042000
The following are defines for the base address of the memories and peripherals.
#define | ETH_BASE 0x40048000
The following are defines for the base address of the memories and peripherals.
#define | MAC_BASE 0x40048000
The following are defines for the base address of the memories and peripherals.
#define | USB0_BASE 0x40050000
The following are defines for the base address of the memories and peripherals.
#define | I2S0_BASE 0x40054000
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTA_AHB_BASE 0x40058000
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTB_AHB_BASE 0x40059000
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTC_AHB_BASE 0x4005A000
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTD_AHB_BASE 0x4005B000
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTE_AHB_BASE 0x4005C000
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTF_AHB_BASE 0x4005D000
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTG_AHB_BASE 0x4005E000
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTH_AHB_BASE 0x4005F000
The following are defines for the base address of the memories and peripherals.
#define | GPIO_PORTJ_AHB_BASE 0x40060000
The following are defines for the base address of the memories and peripherals.
#define | EPI0_BASE 0x400D0000
The following are defines for the base address of the memories and peripherals.
#define | HIB_BASE 0x400FC000
The following are defines for the base address of the memories and peripherals.
#define | FLASH_CTRL_BASE 0x400FD000
The following are defines for the base address of the memories and peripherals.
#define | SYSCTL_BASE 0x400FE000
The following are defines for the base address of the memories and peripherals.
#define | UDMA_BASE 0x400FF000
The following are defines for the base address of the memories and peripherals.
#define | ITM_BASE 0xE0000000
The following are defines for the base address of the memories and peripherals.
#define | DWT_BASE 0xE0001000
The following are defines for the base address of the memories and peripherals.
#define | FPB_BASE 0xE0002000
The following are defines for the base address of the memories and peripherals.
#define | NVIC_BASE 0xE000E000
The following are defines for the base address of the memories and peripherals.
#define | TPIU_BASE 0xE0040000
The following are defines for the base address of the memories and peripherals.

Detailed Description

LM3S1968 memory map.

Definition in file lm3s_memmap.h.


BeRTOS: lm3s_memmap.h Source File

  • cpu
  • cortex-m3
  • io
lm3s_memmap.h
Go to the documentation of this file.
00001
00036 #ifndef LM3S_MEMMAP_H
00037 #define LM3S_MEMMAP_H
00038
00043 /*\{*/
00044 #define FLASH_BASE              0x00000000  //< FLASH memory
00045 #define SRAM_BASE               0x20000000  //< SRAM memory
00046 #define WATCHDOG0_BASE          0x40000000  //< Watchdog0
00047 #define WATCHDOG1_BASE          0x40001000  //< Watchdog1
00048 #define GPIO_PORTA_BASE         0x40004000  //< GPIO Port A
00049 #define GPIO_PORTB_BASE         0x40005000  //< GPIO Port B
00050 #define GPIO_PORTC_BASE         0x40006000  //< GPIO Port C
00051 #define GPIO_PORTD_BASE         0x40007000  //< GPIO Port D
00052 #define SSI0_BASE               0x40008000  //< SSI0
00053 #define SSI1_BASE               0x40009000  //< SSI1
00054 #define UART0_BASE              0x4000C000  //< UART0
00055 #define UART1_BASE              0x4000D000  //< UART1
00056 #define UART2_BASE              0x4000E000  //< UART2
00057 #define I2C0_MASTER_BASE        0x40020000  //< I2C0 Master
00058 #define I2C0_SLAVE_BASE         0x40020800  //< I2C0 Slave
00059 #define I2C1_MASTER_BASE        0x40021000  //< I2C1 Master
00060 #define I2C1_SLAVE_BASE         0x40021800  //< I2C1 Slave
00061 #define GPIO_PORTE_BASE         0x40024000  //< GPIO Port E
00062 #define GPIO_PORTF_BASE         0x40025000  //< GPIO Port F
00063 #define GPIO_PORTG_BASE         0x40026000  //< GPIO Port G
00064 #define GPIO_PORTH_BASE         0x40027000  //< GPIO Port H
00065 #define PWM_BASE                0x40028000  //< PWM
00066 #define QEI0_BASE               0x4002C000  //< QEI0
00067 #define QEI1_BASE               0x4002D000  //< QEI1
00068 #define TIMER0_BASE             0x40030000  //< Timer0
00069 #define TIMER1_BASE             0x40031000  //< Timer1
00070 #define TIMER2_BASE             0x40032000  //< Timer2
00071 #define TIMER3_BASE             0x40033000  //< Timer3
00072 #define ADC0_BASE               0x40038000  //< ADC0
00073 #define ADC1_BASE               0x40039000  //< ADC1
00074 #define COMP_BASE               0x4003C000  //< Analog comparators
00075 #define GPIO_PORTJ_BASE         0x4003D000  //< GPIO Port J
00076 #define CAN0_BASE               0x40040000  //< CAN0
00077 #define CAN1_BASE               0x40041000  //< CAN1
00078 #define CAN2_BASE               0x40042000  //< CAN2
00079 #define ETH_BASE                0x40048000  //< Ethernet
00080 #define MAC_BASE                0x40048000  //< Ethernet
00081 #define USB0_BASE               0x40050000  //< USB 0 Controller
00082 #define I2S0_BASE               0x40054000  //< I2S0
00083 #define GPIO_PORTA_AHB_BASE     0x40058000  //< GPIO Port A (high speed)
00084 #define GPIO_PORTB_AHB_BASE     0x40059000  //< GPIO Port B (high speed)
00085 #define GPIO_PORTC_AHB_BASE     0x4005A000  //< GPIO Port C (high speed)
00086 #define GPIO_PORTD_AHB_BASE     0x4005B000  //< GPIO Port D (high speed)
00087 #define GPIO_PORTE_AHB_BASE     0x4005C000  //< GPIO Port E (high speed)
00088 #define GPIO_PORTF_AHB_BASE     0x4005D000  //< GPIO Port F (high speed)
00089 #define GPIO_PORTG_AHB_BASE     0x4005E000  //< GPIO Port G (high speed)
00090 #define GPIO_PORTH_AHB_BASE     0x4005F000  //< GPIO Port H (high speed)
00091 #define GPIO_PORTJ_AHB_BASE     0x40060000  //< GPIO Port J (high speed)
00092 #define EPI0_BASE               0x400D0000  //< EPI0
00093 #define HIB_BASE                0x400FC000  //< Hibernation Module
00094 #define FLASH_CTRL_BASE         0x400FD000  //< FLASH Controller
00095 #define SYSCTL_BASE             0x400FE000  //< System Control
00096 #define UDMA_BASE               0x400FF000  //< uDMA Controller
00097 #define ITM_BASE                0xE0000000  //< Instrumentation Trace Macrocell
00098 #define DWT_BASE                0xE0001000  //< Data Watchpoint and Trace
00099 #define FPB_BASE                0xE0002000  //< FLASH Patch and Breakpoint
00100 #define NVIC_BASE               0xE000E000  //< Nested Vectored Interrupt Ctrl
00101 #define TPIU_BASE               0xE0040000  //< Trace Port Interface Unit
00102 /*\}*/
00103
00107 /*\{*/
00108 #ifndef DEPRECATED
00109 /*\}*/
00110
00111 #define WATCHDOG_BASE           0x40000000  //< Watchdog
00112 #define SSI_BASE                0x40008000  //< SSI
00113 #define I2C_MASTER_BASE         0x40020000  //< I2C Master
00114 #define I2C_SLAVE_BASE          0x40020800  //< I2C Slave
00115 #define QEI_BASE                0x4002C000  //< QEI
00116 #define ADC_BASE                0x40038000  //< ADC
00117
00118 #endif /* DEPRECATED */
00119
00120 #endif /* LM3S_MEMMAP_H */


BeRTOS: lm3s_nvic.h File Reference

  • cpu
  • cortex-m3
  • io
lm3s_nvic.h File Reference

LM3S1968 NVIC hardware. More...

Go to the source code of this file.

Defines

#define | NVIC_INT_TYPE 0xE000E004
The following are defines for the NVIC register addresses.
#define | NVIC_ST_CTRL 0xE000E010
SysTick Control and Status Reg.
#define | NVIC_ST_RELOAD 0xE000E014
SysTick Reload Value Register.
#define | NVIC_ST_CURRENT 0xE000E018
SysTick Current Value Register.
#define | NVIC_ST_CAL 0xE000E01C
SysTick Calibration Value Reg.
#define | NVIC_EN0 0xE000E100
IRQ 0 to 31 Set Enable Register.
#define | NVIC_EN1 0xE000E104
IRQ 32 to 63 Set Enable Register.
#define | NVIC_DIS0 0xE000E180
IRQ 0 to 31 Clear Enable Reg.
#define | NVIC_DIS1 0xE000E184
IRQ 32 to 63 Clear Enable Reg.
#define | NVIC_PEND0 0xE000E200
IRQ 0 to 31 Set Pending Register.
#define | NVIC_PEND1 0xE000E204
IRQ 32 to 63 Set Pending Reg.
#define | NVIC_UNPEND0 0xE000E280
IRQ 0 to 31 Clear Pending Reg.
#define | NVIC_UNPEND1 0xE000E284
IRQ 32 to 63 Clear Pending Reg.
#define | NVIC_ACTIVE0 0xE000E300
IRQ 0 to 31 Active Register.
#define | NVIC_ACTIVE1 0xE000E304
IRQ 32 to 63 Active Register.
#define | NVIC_PRI0 0xE000E400
IRQ 0 to 3 Priority Register.
#define | NVIC_PRI1 0xE000E404
IRQ 4 to 7 Priority Register.
#define | NVIC_PRI2 0xE000E408
IRQ 8 to 11 Priority Register.
#define | NVIC_PRI3 0xE000E40C
IRQ 12 to 15 Priority Register.
#define | NVIC_PRI4 0xE000E410
IRQ 16 to 19 Priority Register.
#define | NVIC_PRI5 0xE000E414
IRQ 20 to 23 Priority Register.
#define | NVIC_PRI6 0xE000E418
IRQ 24 to 27 Priority Register.
#define | NVIC_PRI7 0xE000E41C
IRQ 28 to 31 Priority Register.
#define | NVIC_PRI8 0xE000E420
IRQ 32 to 35 Priority Register.
#define | NVIC_PRI9 0xE000E424
IRQ 36 to 39 Priority Register.
#define | NVIC_PRI10 0xE000E428
IRQ 40 to 43 Priority Register.
#define | NVIC_PRI11 0xE000E42C
IRQ 44 to 47 Priority Register.
#define | NVIC_PRI12 0xE000E430
IRQ 48 to 51 Priority Register.
#define | NVIC_PRI13 0xE000E434
IRQ 52 to 55 Priority Register.
#define | NVIC_CPUID 0xE000ED00
CPUID Base Register.
#define | NVIC_INT_CTRL 0xE000ED04
Interrupt Control State Register.
#define | NVIC_VTABLE 0xE000ED08
Vector Table Offset Register.
#define | NVIC_APINT 0xE000ED0C
App. Int & Reset Control Reg.
#define | NVIC_SYS_CTRL 0xE000ED10
System Control Register.
#define | NVIC_CFG_CTRL 0xE000ED14
Configuration Control Register.
#define | NVIC_SYS_PRI1 0xE000ED18
Sys. Handlers 4 to 7 Priority.
#define | NVIC_SYS_PRI2 0xE000ED1C
Sys. Handlers 8 to 11 Priority.
#define | NVIC_SYS_PRI3 0xE000ED20
Sys. Handlers 12 to 15 Priority.
#define | NVIC_SYS_HND_CTRL 0xE000ED24
System Handler Control and State.
#define | NVIC_FAULT_STAT 0xE000ED28
Configurable Fault Status Reg.
#define | NVIC_HFAULT_STAT 0xE000ED2C
Hard Fault Status Register.
#define | NVIC_DEBUG_STAT 0xE000ED30
Debug Status Register.
#define | NVIC_MM_ADDR 0xE000ED34
Mem Manage Address Register.
#define | NVIC_FAULT_ADDR 0xE000ED38
Bus Fault Address Register.
#define | NVIC_MPU_TYPE 0xE000ED90
MPU Type Register.
#define | NVIC_MPU_CTRL 0xE000ED94
MPU Control Register.
#define | NVIC_MPU_NUMBER 0xE000ED98
MPU Region Number Register.
#define | NVIC_MPU_BASE 0xE000ED9C
MPU Region Base Address Register.
#define | NVIC_MPU_ATTR 0xE000EDA0
MPU Region Attribute & Size Reg.
#define | NVIC_DBG_CTRL 0xE000EDF0
Debug Control and Status Reg.
#define | NVIC_DBG_XFER 0xE000EDF4
Debug Core Reg. Transfer Select.
#define | NVIC_DBG_DATA 0xE000EDF8
Debug Core Register Data.
#define | NVIC_DBG_INT 0xE000EDFC
Debug Reset Interrupt Control.
#define | NVIC_SW_TRIG 0xE000EF00
Software Trigger Interrupt Reg.
#define | NVIC_INT_TYPE_LINES_M 0x0000001F
The following are defines for the bit fields in the NVIC_INT_TYPE register.
#define | NVIC_INT_TYPE_LINES_S 0
The following are defines for the bit fields in the NVIC_INT_TYPE register.
#define | NVIC_ST_CTRL_COUNT 0x00010000
The following are defines for the bit fields in the NVIC_ST_CTRL register.
#define | NVIC_ST_CTRL_CLK_SRC 0x00000004
Clock Source.
#define | NVIC_ST_CTRL_INTEN 0x00000002
Interrupt enable.
#define | NVIC_ST_CTRL_ENABLE 0x00000001
Counter mode.
#define | NVIC_ST_RELOAD_M 0x00FFFFFF
The following are defines for the bit fields in the NVIC_ST_RELOAD register.
#define | NVIC_ST_RELOAD_S 0
The following are defines for the bit fields in the NVIC_ST_RELOAD register.
#define | NVIC_ST_CURRENT_M 0x00FFFFFF
The following are defines for the bit fields in the NVIC_ST_CURRENT register.
#define | NVIC_ST_CURRENT_S 0
The following are defines for the bit fields in the NVIC_ST_CURRENT register.
#define | NVIC_ST_CAL_NOREF 0x80000000
The following are defines for the bit fields in the NVIC_ST_CAL register.
#define | NVIC_ST_CAL_SKEW 0x40000000
Clock skew.
#define | NVIC_ST_CAL_ONEMS_M 0x00FFFFFF
1ms reference value
#define | NVIC_ST_CAL_ONEMS_S 0
The following are defines for the bit fields in the NVIC_ST_CAL register.
#define | NVIC_EN0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_EN0 register.
#define | NVIC_EN0_INT30 0x40000000
Interrupt 30 enable.
#define | NVIC_EN0_INT29 0x20000000
Interrupt 29 enable.
#define | NVIC_EN0_INT28 0x10000000
Interrupt 28 enable.
#define | NVIC_EN0_INT27 0x08000000
Interrupt 27 enable.
#define | NVIC_EN0_INT26 0x04000000
Interrupt 26 enable.
#define | NVIC_EN0_INT25 0x02000000
Interrupt 25 enable.
#define | NVIC_EN0_INT24 0x01000000
Interrupt 24 enable.
#define | NVIC_EN0_INT23 0x00800000
Interrupt 23 enable.
#define | NVIC_EN0_INT22 0x00400000
Interrupt 22 enable.
#define | NVIC_EN0_INT21 0x00200000
Interrupt 21 enable.
#define | NVIC_EN0_INT20 0x00100000
Interrupt 20 enable.
#define | NVIC_EN0_INT19 0x00080000
Interrupt 19 enable.
#define | NVIC_EN0_INT18 0x00040000
Interrupt 18 enable.
#define | NVIC_EN0_INT17 0x00020000
Interrupt 17 enable.
#define | NVIC_EN0_INT16 0x00010000
Interrupt 16 enable.
#define | NVIC_EN0_INT15 0x00008000
Interrupt 15 enable.
#define | NVIC_EN0_INT14 0x00004000
Interrupt 14 enable.
#define | NVIC_EN0_INT13 0x00002000
Interrupt 13 enable.
#define | NVIC_EN0_INT12 0x00001000
Interrupt 12 enable.
#define | NVIC_EN0_INT11 0x00000800
Interrupt 11 enable.
#define | NVIC_EN0_INT10 0x00000400
Interrupt 10 enable.
#define | NVIC_EN0_INT9 0x00000200
Interrupt 9 enable.
#define | NVIC_EN0_INT8 0x00000100
Interrupt 8 enable.
#define | NVIC_EN0_INT7 0x00000080
Interrupt 7 enable.
#define | NVIC_EN0_INT6 0x00000040
Interrupt 6 enable.
#define | NVIC_EN0_INT5 0x00000020
Interrupt 5 enable.
#define | NVIC_EN0_INT4 0x00000010
Interrupt 4 enable.
#define | NVIC_EN0_INT3 0x00000008
Interrupt 3 enable.
#define | NVIC_EN0_INT2 0x00000004
Interrupt 2 enable.
#define | NVIC_EN0_INT1 0x00000002
Interrupt 1 enable.
#define | NVIC_EN0_INT0 0x00000001
Interrupt 0 enable.
#define | NVIC_EN1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_EN1 register.
#define | NVIC_EN1_INT58 0x04000000
Interrupt 58 enable.
#define | NVIC_EN1_INT57 0x02000000
Interrupt 57 enable.
#define | NVIC_EN1_INT56 0x01000000
Interrupt 56 enable.
#define | NVIC_EN1_INT55 0x00800000
Interrupt 55 enable.
#define | NVIC_EN1_INT54 0x00400000
Interrupt 54 enable.
#define | NVIC_EN1_INT53 0x00200000
Interrupt 53 enable.
#define | NVIC_EN1_INT52 0x00100000
Interrupt 52 enable.
#define | NVIC_EN1_INT51 0x00080000
Interrupt 51 enable.
#define | NVIC_EN1_INT50 0x00040000
Interrupt 50 enable.
#define | NVIC_EN1_INT49 0x00020000
Interrupt 49 enable.
#define | NVIC_EN1_INT48 0x00010000
Interrupt 48 enable.
#define | NVIC_EN1_INT47 0x00008000
Interrupt 47 enable.
#define | NVIC_EN1_INT46 0x00004000
Interrupt 46 enable.
#define | NVIC_EN1_INT45 0x00002000
Interrupt 45 enable.
#define | NVIC_EN1_INT44 0x00001000
Interrupt 44 enable.
#define | NVIC_EN1_INT43 0x00000800
Interrupt 43 enable.
#define | NVIC_EN1_INT42 0x00000400
Interrupt 42 enable.
#define | NVIC_EN1_INT41 0x00000200
Interrupt 41 enable.
#define | NVIC_EN1_INT40 0x00000100
Interrupt 40 enable.
#define | NVIC_EN1_INT39 0x00000080
Interrupt 39 enable.
#define | NVIC_EN1_INT38 0x00000040
Interrupt 38 enable.
#define | NVIC_EN1_INT37 0x00000020
Interrupt 37 enable.
#define | NVIC_EN1_INT36 0x00000010
Interrupt 36 enable.
#define | NVIC_EN1_INT35 0x00000008
Interrupt 35 enable.
#define | NVIC_EN1_INT34 0x00000004
Interrupt 34 enable.
#define | NVIC_EN1_INT33 0x00000002
Interrupt 33 enable.
#define | NVIC_EN1_INT32 0x00000001
Interrupt 32 enable.
#define | NVIC_DIS0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_DIS0 register.
#define | NVIC_DIS0_INT30 0x40000000
Interrupt 30 disable.
#define | NVIC_DIS0_INT29 0x20000000
Interrupt 29 disable.
#define | NVIC_DIS0_INT28 0x10000000
Interrupt 28 disable.
#define | NVIC_DIS0_INT27 0x08000000
Interrupt 27 disable.
#define | NVIC_DIS0_INT26 0x04000000
Interrupt 26 disable.
#define | NVIC_DIS0_INT25 0x02000000
Interrupt 25 disable.
#define | NVIC_DIS0_INT24 0x01000000
Interrupt 24 disable.
#define | NVIC_DIS0_INT23 0x00800000
Interrupt 23 disable.
#define | NVIC_DIS0_INT22 0x00400000
Interrupt 22 disable.
#define | NVIC_DIS0_INT21 0x00200000
Interrupt 21 disable.
#define | NVIC_DIS0_INT20 0x00100000
Interrupt 20 disable.
#define | NVIC_DIS0_INT19 0x00080000
Interrupt 19 disable.
#define | NVIC_DIS0_INT18 0x00040000
Interrupt 18 disable.
#define | NVIC_DIS0_INT17 0x00020000
Interrupt 17 disable.
#define | NVIC_DIS0_INT16 0x00010000
Interrupt 16 disable.
#define | NVIC_DIS0_INT15 0x00008000
Interrupt 15 disable.
#define | NVIC_DIS0_INT14 0x00004000
Interrupt 14 disable.
#define | NVIC_DIS0_INT13 0x00002000
Interrupt 13 disable.
#define | NVIC_DIS0_INT12 0x00001000
Interrupt 12 disable.
#define | NVIC_DIS0_INT11 0x00000800
Interrupt 11 disable.
#define | NVIC_DIS0_INT10 0x00000400
Interrupt 10 disable.
#define | NVIC_DIS0_INT9 0x00000200
Interrupt 9 disable.
#define | NVIC_DIS0_INT8 0x00000100
Interrupt 8 disable.
#define | NVIC_DIS0_INT7 0x00000080
Interrupt 7 disable.
#define | NVIC_DIS0_INT6 0x00000040
Interrupt 6 disable.
#define | NVIC_DIS0_INT5 0x00000020
Interrupt 5 disable.
#define | NVIC_DIS0_INT4 0x00000010
Interrupt 4 disable.
#define | NVIC_DIS0_INT3 0x00000008
Interrupt 3 disable.
#define | NVIC_DIS0_INT2 0x00000004
Interrupt 2 disable.
#define | NVIC_DIS0_INT1 0x00000002
Interrupt 1 disable.
#define | NVIC_DIS0_INT0 0x00000001
Interrupt 0 disable.
#define | NVIC_DIS1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_DIS1 register.
#define | NVIC_DIS1_INT58 0x04000000
Interrupt 58 disable.
#define | NVIC_DIS1_INT57 0x02000000
Interrupt 57 disable.
#define | NVIC_DIS1_INT56 0x01000000
Interrupt 56 disable.
#define | NVIC_DIS1_INT55 0x00800000
Interrupt 55 disable.
#define | NVIC_DIS1_INT54 0x00400000
Interrupt 54 disable.
#define | NVIC_DIS1_INT53 0x00200000
Interrupt 53 disable.
#define | NVIC_DIS1_INT52 0x00100000
Interrupt 52 disable.
#define | NVIC_DIS1_INT51 0x00080000
Interrupt 51 disable.
#define | NVIC_DIS1_INT50 0x00040000
Interrupt 50 disable.
#define | NVIC_DIS1_INT49 0x00020000
Interrupt 49 disable.
#define | NVIC_DIS1_INT48 0x00010000
Interrupt 48 disable.
#define | NVIC_DIS1_INT47 0x00008000
Interrupt 47 disable.
#define | NVIC_DIS1_INT46 0x00004000
Interrupt 46 disable.
#define | NVIC_DIS1_INT45 0x00002000
Interrupt 45 disable.
#define | NVIC_DIS1_INT44 0x00001000
Interrupt 44 disable.
#define | NVIC_DIS1_INT43 0x00000800
Interrupt 43 disable.
#define | NVIC_DIS1_INT42 0x00000400
Interrupt 42 disable.
#define | NVIC_DIS1_INT41 0x00000200
Interrupt 41 disable.
#define | NVIC_DIS1_INT40 0x00000100
Interrupt 40 disable.
#define | NVIC_DIS1_INT39 0x00000080
Interrupt 39 disable.
#define | NVIC_DIS1_INT38 0x00000040
Interrupt 38 disable.
#define | NVIC_DIS1_INT37 0x00000020
Interrupt 37 disable.
#define | NVIC_DIS1_INT36 0x00000010
Interrupt 36 disable.
#define | NVIC_DIS1_INT35 0x00000008
Interrupt 35 disable.
#define | NVIC_DIS1_INT34 0x00000004
Interrupt 34 disable.
#define | NVIC_DIS1_INT33 0x00000002
Interrupt 33 disable.
#define | NVIC_DIS1_INT32 0x00000001
Interrupt 32 disable.
#define | NVIC_PEND0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_PEND0 register.
#define | NVIC_PEND0_INT30 0x40000000
Interrupt 30 pend.
#define | NVIC_PEND0_INT29 0x20000000
Interrupt 29 pend.
#define | NVIC_PEND0_INT28 0x10000000
Interrupt 28 pend.
#define | NVIC_PEND0_INT27 0x08000000
Interrupt 27 pend.
#define | NVIC_PEND0_INT26 0x04000000
Interrupt 26 pend.
#define | NVIC_PEND0_INT25 0x02000000
Interrupt 25 pend.
#define | NVIC_PEND0_INT24 0x01000000
Interrupt 24 pend.
#define | NVIC_PEND0_INT23 0x00800000
Interrupt 23 pend.
#define | NVIC_PEND0_INT22 0x00400000
Interrupt 22 pend.
#define | NVIC_PEND0_INT21 0x00200000
Interrupt 21 pend.
#define | NVIC_PEND0_INT20 0x00100000
Interrupt 20 pend.
#define | NVIC_PEND0_INT19 0x00080000
Interrupt 19 pend.
#define | NVIC_PEND0_INT18 0x00040000
Interrupt 18 pend.
#define | NVIC_PEND0_INT17 0x00020000
Interrupt 17 pend.
#define | NVIC_PEND0_INT16 0x00010000
Interrupt 16 pend.
#define | NVIC_PEND0_INT15 0x00008000
Interrupt 15 pend.
#define | NVIC_PEND0_INT14 0x00004000
Interrupt 14 pend.
#define | NVIC_PEND0_INT13 0x00002000
Interrupt 13 pend.
#define | NVIC_PEND0_INT12 0x00001000
Interrupt 12 pend.
#define | NVIC_PEND0_INT11 0x00000800
Interrupt 11 pend.
#define | NVIC_PEND0_INT10 0x00000400
Interrupt 10 pend.
#define | NVIC_PEND0_INT9 0x00000200
Interrupt 9 pend.
#define | NVIC_PEND0_INT8 0x00000100
Interrupt 8 pend.
#define | NVIC_PEND0_INT7 0x00000080
Interrupt 7 pend.
#define | NVIC_PEND0_INT6 0x00000040
Interrupt 6 pend.
#define | NVIC_PEND0_INT5 0x00000020
Interrupt 5 pend.
#define | NVIC_PEND0_INT4 0x00000010
Interrupt 4 pend.
#define | NVIC_PEND0_INT3 0x00000008
Interrupt 3 pend.
#define | NVIC_PEND0_INT2 0x00000004
Interrupt 2 pend.
#define | NVIC_PEND0_INT1 0x00000002
Interrupt 1 pend.
#define | NVIC_PEND0_INT0 0x00000001
Interrupt 0 pend.
#define | NVIC_PEND1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_PEND1 register.
#define | NVIC_PEND1_INT58 0x04000000
Interrupt 58 pend.
#define | NVIC_PEND1_INT57 0x02000000
Interrupt 57 pend.
#define | NVIC_PEND1_INT56 0x01000000
Interrupt 56 pend.
#define | NVIC_PEND1_INT55 0x00800000
Interrupt 55 pend.
#define | NVIC_PEND1_INT54 0x00400000
Interrupt 54 pend.
#define | NVIC_PEND1_INT53 0x00200000
Interrupt 53 pend.
#define | NVIC_PEND1_INT52 0x00100000
Interrupt 52 pend.
#define | NVIC_PEND1_INT51 0x00080000
Interrupt 51 pend.
#define | NVIC_PEND1_INT50 0x00040000
Interrupt 50 pend.
#define | NVIC_PEND1_INT49 0x00020000
Interrupt 49 pend.
#define | NVIC_PEND1_INT48 0x00010000
Interrupt 48 pend.
#define | NVIC_PEND1_INT47 0x00008000
Interrupt 47 pend.
#define | NVIC_PEND1_INT46 0x00004000
Interrupt 46 pend.
#define | NVIC_PEND1_INT45 0x00002000
Interrupt 45 pend.
#define | NVIC_PEND1_INT44 0x00001000
Interrupt 44 pend.
#define | NVIC_PEND1_INT43 0x00000800
Interrupt 43 pend.
#define | NVIC_PEND1_INT42 0x00000400
Interrupt 42 pend.
#define | NVIC_PEND1_INT41 0x00000200
Interrupt 41 pend.
#define | NVIC_PEND1_INT40 0x00000100
Interrupt 40 pend.
#define | NVIC_PEND1_INT39 0x00000080
Interrupt 39 pend.
#define | NVIC_PEND1_INT38 0x00000040
Interrupt 38 pend.
#define | NVIC_PEND1_INT37 0x00000020
Interrupt 37 pend.
#define | NVIC_PEND1_INT36 0x00000010
Interrupt 36 pend.
#define | NVIC_PEND1_INT35 0x00000008
Interrupt 35 pend.
#define | NVIC_PEND1_INT34 0x00000004
Interrupt 34 pend.
#define | NVIC_PEND1_INT33 0x00000002
Interrupt 33 pend.
#define | NVIC_PEND1_INT32 0x00000001
Interrupt 32 pend.
#define | NVIC_UNPEND0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_UNPEND0 register.
#define | NVIC_UNPEND0_INT30 0x40000000
Interrupt 30 unpend.
#define | NVIC_UNPEND0_INT29 0x20000000
Interrupt 29 unpend.
#define | NVIC_UNPEND0_INT28 0x10000000
Interrupt 28 unpend.
#define | NVIC_UNPEND0_INT27 0x08000000
Interrupt 27 unpend.
#define | NVIC_UNPEND0_INT26 0x04000000
Interrupt 26 unpend.
#define | NVIC_UNPEND0_INT25 0x02000000
Interrupt 25 unpend.
#define | NVIC_UNPEND0_INT24 0x01000000
Interrupt 24 unpend.
#define | NVIC_UNPEND0_INT23 0x00800000
Interrupt 23 unpend.
#define | NVIC_UNPEND0_INT22 0x00400000
Interrupt 22 unpend.
#define | NVIC_UNPEND0_INT21 0x00200000
Interrupt 21 unpend.
#define | NVIC_UNPEND0_INT20 0x00100000
Interrupt 20 unpend.
#define | NVIC_UNPEND0_INT19 0x00080000
Interrupt 19 unpend.
#define | NVIC_UNPEND0_INT18 0x00040000
Interrupt 18 unpend.
#define | NVIC_UNPEND0_INT17 0x00020000
Interrupt 17 unpend.
#define | NVIC_UNPEND0_INT16 0x00010000
Interrupt 16 unpend.
#define | NVIC_UNPEND0_INT15 0x00008000
Interrupt 15 unpend.
#define | NVIC_UNPEND0_INT14 0x00004000
Interrupt 14 unpend.
#define | NVIC_UNPEND0_INT13 0x00002000
Interrupt 13 unpend.
#define | NVIC_UNPEND0_INT12 0x00001000
Interrupt 12 unpend.
#define | NVIC_UNPEND0_INT11 0x00000800
Interrupt 11 unpend.
#define | NVIC_UNPEND0_INT10 0x00000400
Interrupt 10 unpend.
#define | NVIC_UNPEND0_INT9 0x00000200
Interrupt 9 unpend.
#define | NVIC_UNPEND0_INT8 0x00000100
Interrupt 8 unpend.
#define | NVIC_UNPEND0_INT7 0x00000080
Interrupt 7 unpend.
#define | NVIC_UNPEND0_INT6 0x00000040
Interrupt 6 unpend.
#define | NVIC_UNPEND0_INT5 0x00000020
Interrupt 5 unpend.
#define | NVIC_UNPEND0_INT4 0x00000010
Interrupt 4 unpend.
#define | NVIC_UNPEND0_INT3 0x00000008
Interrupt 3 unpend.
#define | NVIC_UNPEND0_INT2 0x00000004
Interrupt 2 unpend.
#define | NVIC_UNPEND0_INT1 0x00000002
Interrupt 1 unpend.
#define | NVIC_UNPEND0_INT0 0x00000001
Interrupt 0 unpend.
#define | NVIC_UNPEND1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_UNPEND1 register.
#define | NVIC_UNPEND1_INT58 0x04000000
Interrupt 58 unpend.
#define | NVIC_UNPEND1_INT57 0x02000000
Interrupt 57 unpend.
#define | NVIC_UNPEND1_INT56 0x01000000
Interrupt 56 unpend.
#define | NVIC_UNPEND1_INT55 0x00800000
Interrupt 55 unpend.
#define | NVIC_UNPEND1_INT54 0x00400000
Interrupt 54 unpend.
#define | NVIC_UNPEND1_INT53 0x00200000
Interrupt 53 unpend.
#define | NVIC_UNPEND1_INT52 0x00100000
Interrupt 52 unpend.
#define | NVIC_UNPEND1_INT51 0x00080000
Interrupt 51 unpend.
#define | NVIC_UNPEND1_INT50 0x00040000
Interrupt 50 unpend.
#define | NVIC_UNPEND1_INT49 0x00020000
Interrupt 49 unpend.
#define | NVIC_UNPEND1_INT48 0x00010000
Interrupt 48 unpend.
#define | NVIC_UNPEND1_INT47 0x00008000
Interrupt 47 unpend.
#define | NVIC_UNPEND1_INT46 0x00004000
Interrupt 46 unpend.
#define | NVIC_UNPEND1_INT45 0x00002000
Interrupt 45 unpend.
#define | NVIC_UNPEND1_INT44 0x00001000
Interrupt 44 unpend.
#define | NVIC_UNPEND1_INT43 0x00000800
Interrupt 43 unpend.
#define | NVIC_UNPEND1_INT42 0x00000400
Interrupt 42 unpend.
#define | NVIC_UNPEND1_INT41 0x00000200
Interrupt 41 unpend.
#define | NVIC_UNPEND1_INT40 0x00000100
Interrupt 40 unpend.
#define | NVIC_UNPEND1_INT39 0x00000080
Interrupt 39 unpend.
#define | NVIC_UNPEND1_INT38 0x00000040
Interrupt 38 unpend.
#define | NVIC_UNPEND1_INT37 0x00000020
Interrupt 37 unpend.
#define | NVIC_UNPEND1_INT36 0x00000010
Interrupt 36 unpend.
#define | NVIC_UNPEND1_INT35 0x00000008
Interrupt 35 unpend.
#define | NVIC_UNPEND1_INT34 0x00000004
Interrupt 34 unpend.
#define | NVIC_UNPEND1_INT33 0x00000002
Interrupt 33 unpend.
#define | NVIC_UNPEND1_INT32 0x00000001
Interrupt 32 unpend.
#define | NVIC_ACTIVE0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_ACTIVE0 register.
#define | NVIC_ACTIVE0_INT30 0x40000000
Interrupt 30 active.
#define | NVIC_ACTIVE0_INT29 0x20000000
Interrupt 29 active.
#define | NVIC_ACTIVE0_INT28 0x10000000
Interrupt 28 active.
#define | NVIC_ACTIVE0_INT27 0x08000000
Interrupt 27 active.
#define | NVIC_ACTIVE0_INT26 0x04000000
Interrupt 26 active.
#define | NVIC_ACTIVE0_INT25 0x02000000
Interrupt 25 active.
#define | NVIC_ACTIVE0_INT24 0x01000000
Interrupt 24 active.
#define | NVIC_ACTIVE0_INT23 0x00800000
Interrupt 23 active.
#define | NVIC_ACTIVE0_INT22 0x00400000
Interrupt 22 active.
#define | NVIC_ACTIVE0_INT21 0x00200000
Interrupt 21 active.
#define | NVIC_ACTIVE0_INT20 0x00100000
Interrupt 20 active.
#define | NVIC_ACTIVE0_INT19 0x00080000
Interrupt 19 active.
#define | NVIC_ACTIVE0_INT18 0x00040000
Interrupt 18 active.
#define | NVIC_ACTIVE0_INT17 0x00020000
Interrupt 17 active.
#define | NVIC_ACTIVE0_INT16 0x00010000
Interrupt 16 active.
#define | NVIC_ACTIVE0_INT15 0x00008000
Interrupt 15 active.
#define | NVIC_ACTIVE0_INT14 0x00004000
Interrupt 14 active.
#define | NVIC_ACTIVE0_INT13 0x00002000
Interrupt 13 active.
#define | NVIC_ACTIVE0_INT12 0x00001000
Interrupt 12 active.
#define | NVIC_ACTIVE0_INT11 0x00000800
Interrupt 11 active.
#define | NVIC_ACTIVE0_INT10 0x00000400
Interrupt 10 active.
#define | NVIC_ACTIVE0_INT9 0x00000200
Interrupt 9 active.
#define | NVIC_ACTIVE0_INT8 0x00000100
Interrupt 8 active.
#define | NVIC_ACTIVE0_INT7 0x00000080
Interrupt 7 active.
#define | NVIC_ACTIVE0_INT6 0x00000040
Interrupt 6 active.
#define | NVIC_ACTIVE0_INT5 0x00000020
Interrupt 5 active.
#define | NVIC_ACTIVE0_INT4 0x00000010
Interrupt 4 active.
#define | NVIC_ACTIVE0_INT3 0x00000008
Interrupt 3 active.
#define | NVIC_ACTIVE0_INT2 0x00000004
Interrupt 2 active.
#define | NVIC_ACTIVE0_INT1 0x00000002
Interrupt 1 active.
#define | NVIC_ACTIVE0_INT0 0x00000001
Interrupt 0 active.
#define | NVIC_ACTIVE1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_ACTIVE1 register.
#define | NVIC_ACTIVE1_INT58 0x04000000
Interrupt 58 active.
#define | NVIC_ACTIVE1_INT57 0x02000000
Interrupt 57 active.
#define | NVIC_ACTIVE1_INT56 0x01000000
Interrupt 56 active.
#define | NVIC_ACTIVE1_INT55 0x00800000
Interrupt 55 active.
#define | NVIC_ACTIVE1_INT54 0x00400000
Interrupt 54 active.
#define | NVIC_ACTIVE1_INT53 0x00200000
Interrupt 53 active.
#define | NVIC_ACTIVE1_INT52 0x00100000
Interrupt 52 active.
#define | NVIC_ACTIVE1_INT51 0x00080000
Interrupt 51 active.
#define | NVIC_ACTIVE1_INT50 0x00040000
Interrupt 50 active.
#define | NVIC_ACTIVE1_INT49 0x00020000
Interrupt 49 active.
#define | NVIC_ACTIVE1_INT48 0x00010000
Interrupt 48 active.
#define | NVIC_ACTIVE1_INT47 0x00008000
Interrupt 47 active.
#define | NVIC_ACTIVE1_INT46 0x00004000
Interrupt 46 active.
#define | NVIC_ACTIVE1_INT45 0x00002000
Interrupt 45 active.
#define | NVIC_ACTIVE1_INT44 0x00001000
Interrupt 44 active.
#define | NVIC_ACTIVE1_INT43 0x00000800
Interrupt 43 active.
#define | NVIC_ACTIVE1_INT42 0x00000400
Interrupt 42 active.
#define | NVIC_ACTIVE1_INT41 0x00000200
Interrupt 41 active.
#define | NVIC_ACTIVE1_INT40 0x00000100
Interrupt 40 active.
#define | NVIC_ACTIVE1_INT39 0x00000080
Interrupt 39 active.
#define | NVIC_ACTIVE1_INT38 0x00000040
Interrupt 38 active.
#define | NVIC_ACTIVE1_INT37 0x00000020
Interrupt 37 active.
#define | NVIC_ACTIVE1_INT36 0x00000010
Interrupt 36 active.
#define | NVIC_ACTIVE1_INT35 0x00000008
Interrupt 35 active.
#define | NVIC_ACTIVE1_INT34 0x00000004
Interrupt 34 active.
#define | NVIC_ACTIVE1_INT33 0x00000002
Interrupt 33 active.
#define | NVIC_ACTIVE1_INT32 0x00000001
Interrupt 32 active.
#define | NVIC_PRI0_INT3_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI0_INT2_M 0x00FF0000
Interrupt 2 priority mask.
#define | NVIC_PRI0_INT1_M 0x0000FF00
Interrupt 1 priority mask.
#define | NVIC_PRI0_INT0_M 0x000000FF
Interrupt 0 priority mask.
#define | NVIC_PRI0_INT3_S 24
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI0_INT2_S 16
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI0_INT1_S 8
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI0_INT0_S 0
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI1_INT7_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI1_INT6_M 0x00FF0000
Interrupt 6 priority mask.
#define | NVIC_PRI1_INT5_M 0x0000FF00
Interrupt 5 priority mask.
#define | NVIC_PRI1_INT4_M 0x000000FF
Interrupt 4 priority mask.
#define | NVIC_PRI1_INT7_S 24
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI1_INT6_S 16
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI1_INT5_S 8
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI1_INT4_S 0
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI2_INT11_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI2_INT10_M 0x00FF0000
Interrupt 10 priority mask.
#define | NVIC_PRI2_INT9_M 0x0000FF00
Interrupt 9 priority mask.
#define | NVIC_PRI2_INT8_M 0x000000FF
Interrupt 8 priority mask.
#define | NVIC_PRI2_INT11_S 24
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI2_INT10_S 16
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI2_INT9_S 8
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI2_INT8_S 0
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI3_INT15_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI3_INT14_M 0x00FF0000
Interrupt 14 priority mask.
#define | NVIC_PRI3_INT13_M 0x0000FF00
Interrupt 13 priority mask.
#define | NVIC_PRI3_INT12_M 0x000000FF
Interrupt 12 priority mask.
#define | NVIC_PRI3_INT15_S 24
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI3_INT14_S 16
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI3_INT13_S 8
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI3_INT12_S 0
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI4_INT19_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI4_INT18_M 0x00FF0000
Interrupt 18 priority mask.
#define | NVIC_PRI4_INT17_M 0x0000FF00
Interrupt 17 priority mask.
#define | NVIC_PRI4_INT16_M 0x000000FF
Interrupt 16 priority mask.
#define | NVIC_PRI4_INT19_S 24
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI4_INT18_S 16
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI4_INT17_S 8
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI4_INT16_S 0
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI5_INT23_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI5_INT22_M 0x00FF0000
Interrupt 22 priority mask.
#define | NVIC_PRI5_INT21_M 0x0000FF00
Interrupt 21 priority mask.
#define | NVIC_PRI5_INT20_M 0x000000FF
Interrupt 20 priority mask.
#define | NVIC_PRI5_INT23_S 24
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI5_INT22_S 16
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI5_INT21_S 8
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI5_INT20_S 0
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI6_INT27_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI6_INT26_M 0x00FF0000
Interrupt 26 priority mask.
#define | NVIC_PRI6_INT25_M 0x0000FF00
Interrupt 25 priority mask.
#define | NVIC_PRI6_INT24_M 0x000000FF
Interrupt 24 priority mask.
#define | NVIC_PRI6_INT27_S 24
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI6_INT26_S 16
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI6_INT25_S 8
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI6_INT24_S 0
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI7_INT31_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI7_INT30_M 0x00FF0000
Interrupt 30 priority mask.
#define | NVIC_PRI7_INT29_M 0x0000FF00
Interrupt 29 priority mask.
#define | NVIC_PRI7_INT28_M 0x000000FF
Interrupt 28 priority mask.
#define | NVIC_PRI7_INT31_S 24
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI7_INT30_S 16
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI7_INT29_S 8
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI7_INT28_S 0
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI8_INT35_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI8_INT34_M 0x00FF0000
Interrupt 34 priority mask.
#define | NVIC_PRI8_INT33_M 0x0000FF00
Interrupt 33 priority mask.
#define | NVIC_PRI8_INT32_M 0x000000FF
Interrupt 32 priority mask.
#define | NVIC_PRI8_INT35_S 24
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI8_INT34_S 16
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI8_INT33_S 8
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI8_INT32_S 0
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI9_INT39_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI9_INT38_M 0x00FF0000
Interrupt 38 priority mask.
#define | NVIC_PRI9_INT37_M 0x0000FF00
Interrupt 37 priority mask.
#define | NVIC_PRI9_INT36_M 0x000000FF
Interrupt 36 priority mask.
#define | NVIC_PRI9_INT39_S 24
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI9_INT38_S 16
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI9_INT37_S 8
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI9_INT36_S 0
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI10_INT43_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_PRI10_INT42_M 0x00FF0000
Interrupt 42 priority mask.
#define | NVIC_PRI10_INT41_M 0x0000FF00
Interrupt 41 priority mask.
#define | NVIC_PRI10_INT40_M 0x000000FF
Interrupt 40 priority mask.
#define | NVIC_PRI10_INT43_S 24
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_PRI10_INT42_S 16
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_PRI10_INT41_S 8
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_PRI10_INT40_S 0
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_CPUID_IMP_M 0xFF000000
The following are defines for the bit fields in the NVIC_CPUID register.
#define | NVIC_CPUID_VAR_M 0x00F00000
Variant.
#define | NVIC_CPUID_PARTNO_M 0x0000FFF0
Processor part number.
#define | NVIC_CPUID_REV_M 0x0000000F
Revision.
#define | NVIC_INT_CTRL_NMI_SET 0x80000000
The following are defines for the bit fields in the NVIC_INT_CTRL register.
#define | NVIC_INT_CTRL_PEND_SV 0x10000000
Pend a PendSV.
#define | NVIC_INT_CTRL_UNPEND_SV 0x08000000
Unpend a PendSV.
#define | NVIC_INT_CTRL_PENDSTSET 0x04000000
Set pending SysTick interrupt.
#define | NVIC_INT_CTRL_PENDSTCLR 0x02000000
Clear pending SysTick interrupt.
#define | NVIC_INT_CTRL_ISR_PRE 0x00800000
Debug interrupt handling.
#define | NVIC_INT_CTRL_ISR_PEND 0x00400000
Debug interrupt pending.
#define | NVIC_INT_CTRL_VEC_PEN_M 0x003FF000
Highest pending exception.
#define | NVIC_INT_CTRL_RET_BASE 0x00000800
Return to base.
#define | NVIC_INT_CTRL_VEC_ACT_M 0x000003FF
Current active exception.
#define | NVIC_INT_CTRL_VEC_PEN_S 12
The following are defines for the bit fields in the NVIC_INT_CTRL register.
#define | NVIC_INT_CTRL_VEC_ACT_S 0
The following are defines for the bit fields in the NVIC_INT_CTRL register.
#define | NVIC_VTABLE_BASE 0x20000000
The following are defines for the bit fields in the NVIC_VTABLE register.
#define | NVIC_VTABLE_OFFSET_M 0x1FFFFF00
Vector table offset.
#define | NVIC_VTABLE_OFFSET_S 8
The following are defines for the bit fields in the NVIC_VTABLE register.
#define | NVIC_APINT_VECTKEY_M 0xFFFF0000
The following are defines for the bit fields in the NVIC_APINT register.
#define | NVIC_APINT_VECTKEY 0x05FA0000
Vector key.
#define | NVIC_APINT_ENDIANESS 0x00008000
Data endianess.
#define | NVIC_APINT_PRIGROUP_M 0x00000700
Priority group.
#define | NVIC_APINT_PRIGROUP_0_8 0x00000700
Priority group 0.8 split.
#define | NVIC_APINT_PRIGROUP_1_7 0x00000600
Priority group 1.7 split.
#define | NVIC_APINT_PRIGROUP_2_6 0x00000500
Priority group 2.6 split.
#define | NVIC_APINT_PRIGROUP_3_5 0x00000400
Priority group 3.5 split.
#define | NVIC_APINT_PRIGROUP_4_4 0x00000300
Priority group 4.4 split.
#define | NVIC_APINT_PRIGROUP_5_3 0x00000200
Priority group 5.3 split.
#define | NVIC_APINT_PRIGROUP_6_2 0x00000100
Priority group 6.2 split.
#define | NVIC_APINT_SYSRESETREQ 0x00000004
System reset request.
#define | NVIC_APINT_VECT_CLR_ACT 0x00000002
Clear active NMI/fault info.
#define | NVIC_APINT_VECT_RESET 0x00000001
System reset.
#define | NVIC_APINT_PRIGROUP_7_1 0x00000000
Priority group 7.1 split.
#define | NVIC_SYS_CTRL_SEVONPEND 0x00000010
The following are defines for the bit fields in the NVIC_SYS_CTRL register.
#define | NVIC_SYS_CTRL_SLEEPDEEP 0x00000004
Deep sleep enable.
#define | NVIC_SYS_CTRL_SLEEPEXIT 0x00000002
Sleep on ISR exit.
#define | NVIC_CFG_CTRL_BFHFNMIGN 0x00000100
The following are defines for the bit fields in the NVIC_CFG_CTRL register.
#define | NVIC_CFG_CTRL_DIV0 0x00000010
Trap on divide by 0.
#define | NVIC_CFG_CTRL_UNALIGNED 0x00000008
Trap on unaligned access.
#define | NVIC_CFG_CTRL_DEEP_PEND 0x00000004
Allow deep interrupt trigger.
#define | NVIC_CFG_CTRL_MAIN_PEND 0x00000002
Allow main interrupt trigger.
#define | NVIC_CFG_CTRL_BASE_THR 0x00000001
Thread state control.
#define | NVIC_SYS_PRI1_RES_M 0xFF000000
The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
#define | NVIC_SYS_PRI1_USAGE_M 0x00FF0000
Priority of usage fault handler.
#define | NVIC_SYS_PRI1_BUS_M 0x0000FF00
Priority of bus fault handler.
#define | NVIC_SYS_PRI1_MEM_M 0x000000FF
Priority of mem manage handler.
#define | NVIC_SYS_PRI1_USAGE_S 16
The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
#define | NVIC_SYS_PRI1_BUS_S 8
The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
#define | NVIC_SYS_PRI1_MEM_S 0
The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
#define | NVIC_SYS_PRI2_SVC_M 0xFF000000
The following are defines for the bit fields in the NVIC_SYS_PRI2 register.
#define | NVIC_SYS_PRI2_RES_M 0x00FFFFFF
Priority of reserved handlers.
#define | NVIC_SYS_PRI2_SVC_S 24
The following are defines for the bit fields in the NVIC_SYS_PRI2 register.
#define | NVIC_SYS_PRI3_TICK_M 0xFF000000
The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
#define | NVIC_SYS_PRI3_PENDSV_M 0x00FF0000
Priority of PendSV handler.
#define | NVIC_SYS_PRI3_RES_M 0x0000FF00
Priority of reserved handler.
#define | NVIC_SYS_PRI3_DEBUG_M 0x000000FF
Priority of debug handler.
#define | NVIC_SYS_PRI3_TICK_S 24
The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
#define | NVIC_SYS_PRI3_PENDSV_S 16
The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
#define | NVIC_SYS_PRI3_DEBUG_S 0
The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
#define | NVIC_SYS_HND_CTRL_USAGE 0x00040000
The following are defines for the bit fields in the NVIC_SYS_HND_CTRL register.
#define | NVIC_SYS_HND_CTRL_BUS 0x00020000
Bus fault enable.
#define | NVIC_SYS_HND_CTRL_MEM 0x00010000
Mem manage fault enable.
#define | NVIC_SYS_HND_CTRL_SVC 0x00008000
SVCall is pended.
#define | NVIC_SYS_HND_CTRL_BUSP 0x00004000
Bus fault is pended.
#define | NVIC_SYS_HND_CTRL_TICK 0x00000800
Sys tick is active.
#define | NVIC_SYS_HND_CTRL_PNDSV 0x00000400
PendSV is active.
#define | NVIC_SYS_HND_CTRL_MON 0x00000100
Monitor is active.
#define | NVIC_SYS_HND_CTRL_SVCA 0x00000080
SVCall is active.
#define | NVIC_SYS_HND_CTRL_USGA 0x00000008
Usage fault is active.
#define | NVIC_SYS_HND_CTRL_BUSA 0x00000002
Bus fault is active.
#define | NVIC_SYS_HND_CTRL_MEMA 0x00000001
Mem manage is active.
#define | NVIC_FAULT_STAT_DIV0 0x02000000
The following are defines for the bit fields in the NVIC_FAULT_STAT register.
#define | NVIC_FAULT_STAT_UNALIGN 0x01000000
Unaligned access fault.
#define | NVIC_FAULT_STAT_NOCP 0x00080000
No coprocessor fault.
#define | NVIC_FAULT_STAT_INVPC 0x00040000
Invalid PC fault.
#define | NVIC_FAULT_STAT_INVSTAT 0x00020000
Invalid state fault.
#define | NVIC_FAULT_STAT_UNDEF 0x00010000
Undefined instruction fault.
#define | NVIC_FAULT_STAT_BFARV 0x00008000
BFAR is valid.
#define | NVIC_FAULT_STAT_BSTKE 0x00001000
Stack bus fault.
#define | NVIC_FAULT_STAT_BUSTKE 0x00000800
Unstack bus fault.
#define | NVIC_FAULT_STAT_IMPRE 0x00000400
Imprecise data bus error.
#define | NVIC_FAULT_STAT_PRECISE 0x00000200
Precise data bus error.
#define | NVIC_FAULT_STAT_IBUS 0x00000100
Instruction bus fault.
#define | NVIC_FAULT_STAT_MMARV 0x00000080
MMAR is valid.
#define | NVIC_FAULT_STAT_MSTKE 0x00000010
Stack access violation.
#define | NVIC_FAULT_STAT_MUSTKE 0x00000008
Unstack access violation.
#define | NVIC_FAULT_STAT_DERR 0x00000002
Data access violation.
#define | NVIC_FAULT_STAT_IERR 0x00000001
Instruction access violation.
#define | NVIC_HFAULT_STAT_DBG 0x80000000
The following are defines for the bit fields in the NVIC_HFAULT_STAT register.
#define | NVIC_HFAULT_STAT_FORCED 0x40000000
Cannot execute fault handler.
#define | NVIC_HFAULT_STAT_VECT 0x00000002
Vector table read fault.
#define | NVIC_DEBUG_STAT_EXTRNL 0x00000010
The following are defines for the bit fields in the NVIC_DEBUG_STAT register.
#define | NVIC_DEBUG_STAT_VCATCH 0x00000008
Vector catch.
#define | NVIC_DEBUG_STAT_DWTTRAP 0x00000004
DWT match.
#define | NVIC_DEBUG_STAT_BKPT 0x00000002
Breakpoint instruction.
#define | NVIC_DEBUG_STAT_HALTED 0x00000001
Halt request.
#define | NVIC_MM_ADDR_M 0xFFFFFFFF
The following are defines for the bit fields in the NVIC_MM_ADDR register.
#define | NVIC_MM_ADDR_S 0
The following are defines for the bit fields in the NVIC_MM_ADDR register.
#define | NVIC_FAULT_ADDR_M 0xFFFFFFFF
The following are defines for the bit fields in the NVIC_FAULT_ADDR register.
#define | NVIC_FAULT_ADDR_S 0
The following are defines for the bit fields in the NVIC_FAULT_ADDR register.
#define | NVIC_MPU_TYPE_IREGION_M 0x00FF0000
The following are defines for the bit fields in the NVIC_MPU_TYPE register.
#define | NVIC_MPU_TYPE_DREGION_M 0x0000FF00
Number of D regions.
#define | NVIC_MPU_TYPE_SEPARATE 0x00000001
Separate or unified MPU.
#define | NVIC_MPU_TYPE_IREGION_S 16
The following are defines for the bit fields in the NVIC_MPU_TYPE register.
#define | NVIC_MPU_TYPE_DREGION_S 8
The following are defines for the bit fields in the NVIC_MPU_TYPE register.
#define | NVIC_MPU_CTRL_PRIVDEFEN 0x00000004
The following are defines for the bit fields in the NVIC_MPU_CTRL register.
#define | NVIC_MPU_CTRL_HFNMIENA 0x00000002
MPU enabled during faults.
#define | NVIC_MPU_CTRL_ENABLE 0x00000001
MPU enable.
#define | NVIC_MPU_NUMBER_M 0x000000FF
The following are defines for the bit fields in the NVIC_MPU_NUMBER register.
#define | NVIC_MPU_NUMBER_S 0
The following are defines for the bit fields in the NVIC_MPU_NUMBER register.
#define | NVIC_MPU_BASE_ADDR_M 0xFFFFFFE0
The following are defines for the bit fields in the NVIC_MPU_BASE register.
#define | NVIC_MPU_BASE_VALID 0x00000010
Region number valid.
#define | NVIC_MPU_BASE_REGION_M 0x0000000F
Region number.
#define | NVIC_MPU_BASE_ADDR_S 8
The following are defines for the bit fields in the NVIC_MPU_BASE register.
#define | NVIC_MPU_BASE_REGION_S 0
The following are defines for the bit fields in the NVIC_MPU_BASE register.
#define | NVIC_MPU_ATTR_M 0xFFFF0000
The following are defines for the bit fields in the NVIC_MPU_ATTR register.
#define | NVIC_MPU_ATTR_AP_NO_NO 0x00000000
prv: no access, usr: no access
#define | NVIC_MPU_ATTR_BUFFRABLE 0x00010000
Bufferable.
#define | NVIC_MPU_ATTR_CACHEABLE 0x00020000
Cacheable.
#define | NVIC_MPU_ATTR_SHAREABLE 0x00040000
Shareable.
#define | NVIC_MPU_ATTR_TEX_M 0x00380000
Type extension mask.
#define | NVIC_MPU_ATTR_AP_RW_NO 0x01000000
prv: rw, usr: none
#define | NVIC_MPU_ATTR_AP_RW_RO 0x02000000
prv: rw, usr: read-only
#define | NVIC_MPU_ATTR_AP_RW_RW 0x03000000
prv: rw, usr: rw
#define | NVIC_MPU_ATTR_AP_RO_NO 0x05000000
prv: ro, usr: none
#define | NVIC_MPU_ATTR_AP_RO_RO 0x06000000
prv: ro, usr: ro
#define | NVIC_MPU_ATTR_AP_M 0x07000000
Access permissions mask.
#define | NVIC_MPU_ATTR_XN 0x10000000
Execute disable.
#define | NVIC_MPU_ATTR_SRD_M 0x0000FF00
Sub-region disable mask.
#define | NVIC_MPU_ATTR_SRD_0 0x00000100
Sub-region 0 disable.
#define | NVIC_MPU_ATTR_SRD_1 0x00000200
Sub-region 1 disable.
#define | NVIC_MPU_ATTR_SRD_2 0x00000400
Sub-region 2 disable.
#define | NVIC_MPU_ATTR_SRD_3 0x00000800
Sub-region 3 disable.
#define | NVIC_MPU_ATTR_SRD_4 0x00001000
Sub-region 4 disable.
#define | NVIC_MPU_ATTR_SRD_5 0x00002000
Sub-region 5 disable.
#define | NVIC_MPU_ATTR_SRD_6 0x00004000
Sub-region 6 disable.
#define | NVIC_MPU_ATTR_SRD_7 0x00008000
Sub-region 7 disable.
#define | NVIC_MPU_ATTR_SIZE_M 0x0000003E
Region size mask.
#define | NVIC_MPU_ATTR_SIZE_32B 0x00000008
Region size 32 bytes.
#define | NVIC_MPU_ATTR_SIZE_64B 0x0000000A
Region size 64 bytes.
#define | NVIC_MPU_ATTR_SIZE_128B 0x0000000C
Region size 128 bytes.
#define | NVIC_MPU_ATTR_SIZE_256B 0x0000000E
Region size 256 bytes.
#define | NVIC_MPU_ATTR_SIZE_512B 0x00000010
Region size 512 bytes.
#define | NVIC_MPU_ATTR_SIZE_1K 0x00000012
Region size 1 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_2K 0x00000014
Region size 2 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_4K 0x00000016
Region size 4 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_8K 0x00000018
Region size 8 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_16K 0x0000001A
Region size 16 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_32K 0x0000001C
Region size 32 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_64K 0x0000001E
Region size 64 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_128K 0x00000020
Region size 128 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_256K 0x00000022
Region size 256 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_512K 0x00000024
Region size 512 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_1M 0x00000026
Region size 1 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_2M 0x00000028
Region size 2 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_4M 0x0000002A
Region size 4 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_8M 0x0000002C
Region size 8 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_16M 0x0000002E
Region size 16 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_32M 0x00000030
Region size 32 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_64M 0x00000032
Region size 64 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_128M 0x00000034
Region size 128 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_256M 0x00000036
Region size 256 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_512M 0x00000038
Region size 512 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_1G 0x0000003A
Region size 1 Gbytes.
#define | NVIC_MPU_ATTR_SIZE_2G 0x0000003C
Region size 2 Gbytes.
#define | NVIC_MPU_ATTR_SIZE_4G 0x0000003E
Region size 4 Gbytes.
#define | NVIC_MPU_ATTR_ENABLE 0x00000001
Region enable.
#define | NVIC_DBG_CTRL_DBGKEY_M 0xFFFF0000
The following are defines for the bit fields in the NVIC_DBG_CTRL register.
#define | NVIC_DBG_CTRL_DBGKEY 0xA05F0000
Debug key.
#define | NVIC_DBG_CTRL_S_RESET_ST 0x02000000
Core has reset since last read.
#define | NVIC_DBG_CTRL_S_RETIRE_ST 0x01000000
Core has executed insruction.
#define | NVIC_DBG_CTRL_S_LOCKUP 0x00080000
Core is locked up.
#define | NVIC_DBG_CTRL_S_SLEEP 0x00040000
Core is sleeping.
#define | NVIC_DBG_CTRL_S_HALT 0x00020000
Core status on halt.
#define | NVIC_DBG_CTRL_S_REGRDY 0x00010000
Register read/write available.
#define | NVIC_DBG_CTRL_C_SNAPSTALL 0x00000020
Breaks a stalled load/store.
#define | NVIC_DBG_CTRL_C_MASKINT 0x00000008
Mask interrupts when stepping.
#define | NVIC_DBG_CTRL_C_STEP 0x00000004
Step the core.
#define | NVIC_DBG_CTRL_C_HALT 0x00000002
Halt the core.
#define | NVIC_DBG_CTRL_C_DEBUGEN 0x00000001
Enable debug.
#define | NVIC_DBG_XFER_REG_WNR 0x00010000
The following are defines for the bit fields in the NVIC_DBG_XFER register.
#define | NVIC_DBG_XFER_REG_SEL_M 0x0000001F
Register.
#define | NVIC_DBG_XFER_REG_CFBP 0x00000014
Control/Fault/BasePri/PriMask.
#define | NVIC_DBG_XFER_REG_DSP 0x00000013
Deep SP.
#define | NVIC_DBG_XFER_REG_PSP 0x00000012
Process SP.
#define | NVIC_DBG_XFER_REG_MSP 0x00000011
Main SP.
#define | NVIC_DBG_XFER_REG_FLAGS 0x00000010
xPSR/Flags register
#define | NVIC_DBG_XFER_REG_R15 0x0000000F
Register R15.
#define | NVIC_DBG_XFER_REG_R14 0x0000000E
Register R14.
#define | NVIC_DBG_XFER_REG_R13 0x0000000D
Register R13.
#define | NVIC_DBG_XFER_REG_R12 0x0000000C
Register R12.
#define | NVIC_DBG_XFER_REG_R11 0x0000000B
Register R11.
#define | NVIC_DBG_XFER_REG_R10 0x0000000A
Register R10.
#define | NVIC_DBG_XFER_REG_R9 0x00000009
Register R9.
#define | NVIC_DBG_XFER_REG_R8 0x00000008
Register R8.
#define | NVIC_DBG_XFER_REG_R7 0x00000007
Register R7.
#define | NVIC_DBG_XFER_REG_R6 0x00000006
Register R6.
#define | NVIC_DBG_XFER_REG_R5 0x00000005
Register R5.
#define | NVIC_DBG_XFER_REG_R4 0x00000004
Register R4.
#define | NVIC_DBG_XFER_REG_R3 0x00000003
Register R3.
#define | NVIC_DBG_XFER_REG_R2 0x00000002
Register R2.
#define | NVIC_DBG_XFER_REG_R1 0x00000001
Register R1.
#define | NVIC_DBG_XFER_REG_R0 0x00000000
Register R0.
#define | NVIC_DBG_DATA_M 0xFFFFFFFF
The following are defines for the bit fields in the NVIC_DBG_DATA register.
#define | NVIC_DBG_DATA_S 0
The following are defines for the bit fields in the NVIC_DBG_DATA register.
#define | NVIC_DBG_INT_HARDERR 0x00000400
The following are defines for the bit fields in the NVIC_DBG_INT register.
#define | NVIC_DBG_INT_INTERR 0x00000200
Debug trap on interrupt errors.
#define | NVIC_DBG_INT_BUSERR 0x00000100
Debug trap on bus error.
#define | NVIC_DBG_INT_STATERR 0x00000080
Debug trap on usage fault state.
#define | NVIC_DBG_INT_CHKERR 0x00000040
Debug trap on usage fault check.
#define | NVIC_DBG_INT_NOCPERR 0x00000020
Debug trap on coprocessor error.
#define | NVIC_DBG_INT_MMERR 0x00000010
Debug trap on mem manage fault.
#define | NVIC_DBG_INT_RESET 0x00000008
Core reset status.
#define | NVIC_DBG_INT_RSTPENDCLR 0x00000004
Clear pending core reset.
#define | NVIC_DBG_INT_RSTPENDING 0x00000002
Core reset is pending.
#define | NVIC_DBG_INT_RSTVCATCH 0x00000001
Reset vector catch.
#define | NVIC_SW_TRIG_INTID_M 0x000003FF
The following are defines for the bit fields in the NVIC_SW_TRIG register.
#define | NVIC_SW_TRIG_INTID_S 0
The following are defines for the bit fields in the NVIC_SW_TRIG register.

Detailed Description

LM3S1968 NVIC hardware.

Definition in file lm3s_nvic.h.

Define Documentation

#define NVIC_ACTIVE0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_ACTIVE0 register.

Interrupt 31 active

Definition at line 436 of file lm3s_nvic.h.

#define NVIC_ACTIVE1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_ACTIVE1 register.

Interrupt 59 active

Definition at line 474 of file lm3s_nvic.h.

#define NVIC_APINT_VECTKEY_M 0xFFFF0000

The following are defines for the bit fields in the NVIC_APINT register.

Vector key mask

Definition at line 699 of file lm3s_nvic.h.

#define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100

The following are defines for the bit fields in the NVIC_CFG_CTRL register.

Ignore bus fault in NMI/fault

Definition at line 729 of file lm3s_nvic.h.

#define NVIC_CPUID_IMP_M 0xFF000000

The following are defines for the bit fields in the NVIC_CPUID register.

Implementer

Definition at line 662 of file lm3s_nvic.h.

#define NVIC_DBG_CTRL_DBGKEY_M 0xFFFF0000

The following are defines for the bit fields in the NVIC_DBG_CTRL register.

Debug key mask

Definition at line 956 of file lm3s_nvic.h.

#define NVIC_DBG_CTRL_S_RETIRE_ST 0x01000000

Core has executed insruction.

since last read

Definition at line 960 of file lm3s_nvic.h.

#define NVIC_DBG_DATA_M 0xFFFFFFFF

The following are defines for the bit fields in the NVIC_DBG_DATA register.

Data temporary cache

Definition at line 1008 of file lm3s_nvic.h.

#define NVIC_DBG_DATA_S 0

The following are defines for the bit fields in the NVIC_DBG_DATA register.

Data temporary cache

Definition at line 1009 of file lm3s_nvic.h.

#define NVIC_DBG_INT_HARDERR 0x00000400

The following are defines for the bit fields in the NVIC_DBG_INT register.

Debug trap on hard fault

Definition at line 1016 of file lm3s_nvic.h.

#define NVIC_DBG_XFER_REG_WNR 0x00010000

The following are defines for the bit fields in the NVIC_DBG_XFER register.

Write or not read

Definition at line 979 of file lm3s_nvic.h.

#define NVIC_DEBUG_STAT_EXTRNL 0x00000010

The following are defines for the bit fields in the NVIC_DEBUG_STAT register.

EDBGRQ asserted

Definition at line 830 of file lm3s_nvic.h.

#define NVIC_DIS0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_DIS0 register.

Interrupt 31 disable

Definition at line 220 of file lm3s_nvic.h.

#define NVIC_DIS1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_DIS1 register.

Interrupt 59 disable

Definition at line 258 of file lm3s_nvic.h.

#define NVIC_EN0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_EN0 register.

Interrupt 31 enable

Definition at line 148 of file lm3s_nvic.h.

#define NVIC_EN1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_EN1 register.

Interrupt 59 enable

Definition at line 186 of file lm3s_nvic.h.

#define NVIC_FAULT_ADDR_M 0xFFFFFFFF

The following are defines for the bit fields in the NVIC_FAULT_ADDR register.

Data bus fault address

Definition at line 850 of file lm3s_nvic.h.

#define NVIC_FAULT_ADDR_S 0

The following are defines for the bit fields in the NVIC_FAULT_ADDR register.

Data bus fault address

Definition at line 851 of file lm3s_nvic.h.

#define NVIC_FAULT_STAT_DIV0 0x02000000

The following are defines for the bit fields in the NVIC_FAULT_STAT register.

Divide by zero fault

Definition at line 796 of file lm3s_nvic.h.

#define NVIC_HFAULT_STAT_DBG 0x80000000

The following are defines for the bit fields in the NVIC_HFAULT_STAT register.

Debug event

Definition at line 820 of file lm3s_nvic.h.

#define NVIC_INT_CTRL_NMI_SET 0x80000000

The following are defines for the bit fields in the NVIC_INT_CTRL register.

Pend a NMI

Definition at line 672 of file lm3s_nvic.h.

#define NVIC_INT_CTRL_VEC_ACT_S 0

The following are defines for the bit fields in the NVIC_INT_CTRL register.

Pend a NMI

Definition at line 683 of file lm3s_nvic.h.

#define NVIC_INT_CTRL_VEC_PEN_S 12

The following are defines for the bit fields in the NVIC_INT_CTRL register.

Pend a NMI

Definition at line 682 of file lm3s_nvic.h.

#define NVIC_INT_TYPE 0xE000E004

The following are defines for the NVIC register addresses.

Interrupt Controller Type Reg

Definition at line 43 of file lm3s_nvic.h.

#define NVIC_INT_TYPE_LINES_M 0x0000001F

The following are defines for the bit fields in the NVIC_INT_TYPE register.

Number of interrupt lines (x32)

Definition at line 103 of file lm3s_nvic.h.

#define NVIC_INT_TYPE_LINES_S 0

The following are defines for the bit fields in the NVIC_INT_TYPE register.

Number of interrupt lines (x32)

Definition at line 104 of file lm3s_nvic.h.

#define NVIC_MM_ADDR_M 0xFFFFFFFF

The following are defines for the bit fields in the NVIC_MM_ADDR register.

Data fault address

Definition at line 841 of file lm3s_nvic.h.

#define NVIC_MM_ADDR_S 0

The following are defines for the bit fields in the NVIC_MM_ADDR register.

Data fault address

Definition at line 842 of file lm3s_nvic.h.

#define NVIC_MPU_ATTR_M 0xFFFF0000

The following are defines for the bit fields in the NVIC_MPU_ATTR register.

Attributes

Definition at line 898 of file lm3s_nvic.h.

#define NVIC_MPU_BASE_ADDR_M 0xFFFFFFE0

The following are defines for the bit fields in the NVIC_MPU_BASE register.

Base address mask

Definition at line 887 of file lm3s_nvic.h.

#define NVIC_MPU_BASE_ADDR_S 8

The following are defines for the bit fields in the NVIC_MPU_BASE register.

Base address mask

Definition at line 890 of file lm3s_nvic.h.

#define NVIC_MPU_BASE_REGION_S 0

The following are defines for the bit fields in the NVIC_MPU_BASE register.

Base address mask

Definition at line 891 of file lm3s_nvic.h.

#define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004

The following are defines for the bit fields in the NVIC_MPU_CTRL register.

MPU default region in priv mode

Definition at line 869 of file lm3s_nvic.h.

#define NVIC_MPU_NUMBER_M 0x000000FF

The following are defines for the bit fields in the NVIC_MPU_NUMBER register.

MPU region to access

Definition at line 879 of file lm3s_nvic.h.

#define NVIC_MPU_NUMBER_S 0

The following are defines for the bit fields in the NVIC_MPU_NUMBER register.

MPU region to access

Definition at line 880 of file lm3s_nvic.h.

#define NVIC_MPU_TYPE_DREGION_S 8

The following are defines for the bit fields in the NVIC_MPU_TYPE register.

Number of I regions

Definition at line 862 of file lm3s_nvic.h.

#define NVIC_MPU_TYPE_IREGION_M 0x00FF0000

The following are defines for the bit fields in the NVIC_MPU_TYPE register.

Number of I regions

Definition at line 858 of file lm3s_nvic.h.

#define NVIC_MPU_TYPE_IREGION_S 16

The following are defines for the bit fields in the NVIC_MPU_TYPE register.

Number of I regions

Definition at line 861 of file lm3s_nvic.h.

#define NVIC_PEND0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_PEND0 register.

Interrupt 31 pend

Definition at line 292 of file lm3s_nvic.h.

#define NVIC_PEND1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_PEND1 register.

Interrupt 59 pend

Definition at line 330 of file lm3s_nvic.h.

#define NVIC_PRI0_INT0_S 0

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 515 of file lm3s_nvic.h.

#define NVIC_PRI0_INT1_S 8

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 514 of file lm3s_nvic.h.

#define NVIC_PRI0_INT2_S 16

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 513 of file lm3s_nvic.h.

#define NVIC_PRI0_INT3_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 508 of file lm3s_nvic.h.

#define NVIC_PRI0_INT3_S 24

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 512 of file lm3s_nvic.h.

#define NVIC_PRI10_INT40_S 0

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 655 of file lm3s_nvic.h.

#define NVIC_PRI10_INT41_S 8

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 654 of file lm3s_nvic.h.

#define NVIC_PRI10_INT42_S 16

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 653 of file lm3s_nvic.h.

#define NVIC_PRI10_INT43_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 648 of file lm3s_nvic.h.

#define NVIC_PRI10_INT43_S 24

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 652 of file lm3s_nvic.h.

#define NVIC_PRI1_INT4_S 0

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 529 of file lm3s_nvic.h.

#define NVIC_PRI1_INT5_S 8

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 528 of file lm3s_nvic.h.

#define NVIC_PRI1_INT6_S 16

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 527 of file lm3s_nvic.h.

#define NVIC_PRI1_INT7_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 522 of file lm3s_nvic.h.

#define NVIC_PRI1_INT7_S 24

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 526 of file lm3s_nvic.h.

#define NVIC_PRI2_INT10_S 16

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 541 of file lm3s_nvic.h.

#define NVIC_PRI2_INT11_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 536 of file lm3s_nvic.h.

#define NVIC_PRI2_INT11_S 24

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 540 of file lm3s_nvic.h.

#define NVIC_PRI2_INT8_S 0

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 543 of file lm3s_nvic.h.

#define NVIC_PRI2_INT9_S 8

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 542 of file lm3s_nvic.h.

#define NVIC_PRI3_INT12_S 0

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 557 of file lm3s_nvic.h.

#define NVIC_PRI3_INT13_S 8

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 556 of file lm3s_nvic.h.

#define NVIC_PRI3_INT14_S 16

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 555 of file lm3s_nvic.h.

#define NVIC_PRI3_INT15_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 550 of file lm3s_nvic.h.

#define NVIC_PRI3_INT15_S 24

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 554 of file lm3s_nvic.h.

#define NVIC_PRI4_INT16_S 0

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 571 of file lm3s_nvic.h.

#define NVIC_PRI4_INT17_S 8

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 570 of file lm3s_nvic.h.

#define NVIC_PRI4_INT18_S 16

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 569 of file lm3s_nvic.h.

#define NVIC_PRI4_INT19_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 564 of file lm3s_nvic.h.

#define NVIC_PRI4_INT19_S 24

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 568 of file lm3s_nvic.h.

#define NVIC_PRI5_INT20_S 0

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 585 of file lm3s_nvic.h.

#define NVIC_PRI5_INT21_S 8

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 584 of file lm3s_nvic.h.

#define NVIC_PRI5_INT22_S 16

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 583 of file lm3s_nvic.h.

#define NVIC_PRI5_INT23_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 578 of file lm3s_nvic.h.

#define NVIC_PRI5_INT23_S 24

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 582 of file lm3s_nvic.h.

#define NVIC_PRI6_INT24_S 0

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 599 of file lm3s_nvic.h.

#define NVIC_PRI6_INT25_S 8

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 598 of file lm3s_nvic.h.

#define NVIC_PRI6_INT26_S 16

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 597 of file lm3s_nvic.h.

#define NVIC_PRI6_INT27_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 592 of file lm3s_nvic.h.

#define NVIC_PRI6_INT27_S 24

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 596 of file lm3s_nvic.h.

#define NVIC_PRI7_INT28_S 0

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 613 of file lm3s_nvic.h.

#define NVIC_PRI7_INT29_S 8

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 612 of file lm3s_nvic.h.

#define NVIC_PRI7_INT30_S 16

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 611 of file lm3s_nvic.h.

#define NVIC_PRI7_INT31_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 606 of file lm3s_nvic.h.

#define NVIC_PRI7_INT31_S 24

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 610 of file lm3s_nvic.h.

#define NVIC_PRI8_INT32_S 0

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 627 of file lm3s_nvic.h.

#define NVIC_PRI8_INT33_S 8

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 626 of file lm3s_nvic.h.

#define NVIC_PRI8_INT34_S 16

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 625 of file lm3s_nvic.h.

#define NVIC_PRI8_INT35_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 620 of file lm3s_nvic.h.

#define NVIC_PRI8_INT35_S 24

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 624 of file lm3s_nvic.h.

#define NVIC_PRI9_INT36_S 0

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 641 of file lm3s_nvic.h.

#define NVIC_PRI9_INT37_S 8

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 640 of file lm3s_nvic.h.

#define NVIC_PRI9_INT38_S 16

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 639 of file lm3s_nvic.h.

#define NVIC_PRI9_INT39_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 634 of file lm3s_nvic.h.

#define NVIC_PRI9_INT39_S 24

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 638 of file lm3s_nvic.h.

#define NVIC_ST_CAL_NOREF 0x80000000

The following are defines for the bit fields in the NVIC_ST_CAL register.

No reference clock

Definition at line 138 of file lm3s_nvic.h.

#define NVIC_ST_CAL_ONEMS_S 0

The following are defines for the bit fields in the NVIC_ST_CAL register.

No reference clock

Definition at line 141 of file lm3s_nvic.h.

#define NVIC_ST_CTRL_COUNT 0x00010000

The following are defines for the bit fields in the NVIC_ST_CTRL register.

Count flag

Definition at line 111 of file lm3s_nvic.h.

#define NVIC_ST_CURRENT_M 0x00FFFFFF

The following are defines for the bit fields in the NVIC_ST_CURRENT register.

Counter current value

Definition at line 130 of file lm3s_nvic.h.

#define NVIC_ST_CURRENT_S 0

The following are defines for the bit fields in the NVIC_ST_CURRENT register.

Counter current value

Definition at line 131 of file lm3s_nvic.h.

#define NVIC_ST_RELOAD_M 0x00FFFFFF

The following are defines for the bit fields in the NVIC_ST_RELOAD register.

Counter load value

Definition at line 121 of file lm3s_nvic.h.

#define NVIC_ST_RELOAD_S 0

The following are defines for the bit fields in the NVIC_ST_RELOAD register.

Counter load value

Definition at line 122 of file lm3s_nvic.h.

#define NVIC_SW_TRIG_INTID_M 0x000003FF

The following are defines for the bit fields in the NVIC_SW_TRIG register.

Interrupt to trigger

Definition at line 1033 of file lm3s_nvic.h.

#define NVIC_SW_TRIG_INTID_S 0

The following are defines for the bit fields in the NVIC_SW_TRIG register.

Interrupt to trigger

Definition at line 1034 of file lm3s_nvic.h.

#define NVIC_SYS_CTRL_SEVONPEND 0x00000010

The following are defines for the bit fields in the NVIC_SYS_CTRL register.

Wakeup on pend

Definition at line 720 of file lm3s_nvic.h.

#define NVIC_SYS_HND_CTRL_USAGE 0x00040000

The following are defines for the bit fields in the NVIC_SYS_HND_CTRL register.

Usage fault enable

Definition at line 777 of file lm3s_nvic.h.

#define NVIC_SYS_PRI1_BUS_S 8

The following are defines for the bit fields in the NVIC_SYS_PRI1 register.

Priority of reserved handler

Definition at line 746 of file lm3s_nvic.h.

#define NVIC_SYS_PRI1_MEM_S 0

The following are defines for the bit fields in the NVIC_SYS_PRI1 register.

Priority of reserved handler

Definition at line 747 of file lm3s_nvic.h.

#define NVIC_SYS_PRI1_RES_M 0xFF000000

The following are defines for the bit fields in the NVIC_SYS_PRI1 register.

Priority of reserved handler

Definition at line 741 of file lm3s_nvic.h.

#define NVIC_SYS_PRI1_USAGE_S 16

The following are defines for the bit fields in the NVIC_SYS_PRI1 register.

Priority of reserved handler

Definition at line 745 of file lm3s_nvic.h.

#define NVIC_SYS_PRI2_SVC_M 0xFF000000

The following are defines for the bit fields in the NVIC_SYS_PRI2 register.

Priority of SVCall handler

Definition at line 754 of file lm3s_nvic.h.

#define NVIC_SYS_PRI2_SVC_S 24

The following are defines for the bit fields in the NVIC_SYS_PRI2 register.

Priority of SVCall handler

Definition at line 756 of file lm3s_nvic.h.

#define NVIC_SYS_PRI3_DEBUG_S 0

The following are defines for the bit fields in the NVIC_SYS_PRI3 register.

Priority of Sys Tick handler

Definition at line 769 of file lm3s_nvic.h.

#define NVIC_SYS_PRI3_PENDSV_S 16

The following are defines for the bit fields in the NVIC_SYS_PRI3 register.

Priority of Sys Tick handler

Definition at line 768 of file lm3s_nvic.h.

#define NVIC_SYS_PRI3_TICK_M 0xFF000000

The following are defines for the bit fields in the NVIC_SYS_PRI3 register.

Priority of Sys Tick handler

Definition at line 763 of file lm3s_nvic.h.

#define NVIC_SYS_PRI3_TICK_S 24

The following are defines for the bit fields in the NVIC_SYS_PRI3 register.

Priority of Sys Tick handler

Definition at line 767 of file lm3s_nvic.h.

#define NVIC_UNPEND0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_UNPEND0 register.

Interrupt 31 unpend

Definition at line 364 of file lm3s_nvic.h.

#define NVIC_UNPEND1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_UNPEND1 register.

Interrupt 59 unpend

Definition at line 402 of file lm3s_nvic.h.

#define NVIC_VTABLE_BASE 0x20000000

The following are defines for the bit fields in the NVIC_VTABLE register.

Vector table base

Definition at line 690 of file lm3s_nvic.h.

#define NVIC_VTABLE_OFFSET_S 8

The following are defines for the bit fields in the NVIC_VTABLE register.

Vector table base

Definition at line 692 of file lm3s_nvic.h.


BeRTOS: lm3s_nvic.h Source File

  • cpu
  • cortex-m3
  • io
lm3s_nvic.h
Go to the documentation of this file.
00001
00036 #ifndef LM3S_NVIC_H
00037 #define LM3S_NVIC_H
00038
00042 /*\{*/
00043 #define NVIC_INT_TYPE           0xE000E004  ///< Interrupt Controller Type Reg
00044 #define NVIC_ST_CTRL            0xE000E010  ///< SysTick Control and Status Reg
00045 #define NVIC_ST_RELOAD          0xE000E014  ///< SysTick Reload Value Register
00046 #define NVIC_ST_CURRENT         0xE000E018  ///< SysTick Current Value Register
00047 #define NVIC_ST_CAL             0xE000E01C  ///< SysTick Calibration Value Reg
00048 #define NVIC_EN0                0xE000E100  ///< IRQ 0 to 31 Set Enable Register
00049 #define NVIC_EN1                0xE000E104  ///< IRQ 32 to 63 Set Enable Register
00050 #define NVIC_DIS0               0xE000E180  ///< IRQ 0 to 31 Clear Enable Reg
00051 #define NVIC_DIS1               0xE000E184  ///< IRQ 32 to 63 Clear Enable Reg
00052 #define NVIC_PEND0              0xE000E200  ///< IRQ 0 to 31 Set Pending Register
00053 #define NVIC_PEND1              0xE000E204  ///< IRQ 32 to 63 Set Pending Reg
00054 #define NVIC_UNPEND0            0xE000E280  ///< IRQ 0 to 31 Clear Pending Reg
00055 #define NVIC_UNPEND1            0xE000E284  ///< IRQ 32 to 63 Clear Pending Reg
00056 #define NVIC_ACTIVE0            0xE000E300  ///< IRQ 0 to 31 Active Register
00057 #define NVIC_ACTIVE1            0xE000E304  ///< IRQ 32 to 63 Active Register
00058 #define NVIC_PRI0               0xE000E400  ///< IRQ 0 to 3 Priority Register
00059 #define NVIC_PRI1               0xE000E404  ///< IRQ 4 to 7 Priority Register
00060 #define NVIC_PRI2               0xE000E408  ///< IRQ 8 to 11 Priority Register
00061 #define NVIC_PRI3               0xE000E40C  ///< IRQ 12 to 15 Priority Register
00062 #define NVIC_PRI4               0xE000E410  ///< IRQ 16 to 19 Priority Register
00063 #define NVIC_PRI5               0xE000E414  ///< IRQ 20 to 23 Priority Register
00064 #define NVIC_PRI6               0xE000E418  ///< IRQ 24 to 27 Priority Register
00065 #define NVIC_PRI7               0xE000E41C  ///< IRQ 28 to 31 Priority Register
00066 #define NVIC_PRI8               0xE000E420  ///< IRQ 32 to 35 Priority Register
00067 #define NVIC_PRI9               0xE000E424  ///< IRQ 36 to 39 Priority Register
00068 #define NVIC_PRI10              0xE000E428  ///< IRQ 40 to 43 Priority Register
00069 #define NVIC_PRI11              0xE000E42C  ///< IRQ 44 to 47 Priority Register
00070 #define NVIC_PRI12              0xE000E430  ///< IRQ 48 to 51 Priority Register
00071 #define NVIC_PRI13              0xE000E434  ///< IRQ 52 to 55 Priority Register
00072 #define NVIC_CPUID              0xE000ED00  ///< CPUID Base Register
00073 #define NVIC_INT_CTRL           0xE000ED04  ///< Interrupt Control State Register
00074 #define NVIC_VTABLE             0xE000ED08  ///< Vector Table Offset Register
00075 #define NVIC_APINT              0xE000ED0C  ///< App. Int & Reset Control Reg
00076 #define NVIC_SYS_CTRL           0xE000ED10  ///< System Control Register
00077 #define NVIC_CFG_CTRL           0xE000ED14  ///< Configuration Control Register
00078 #define NVIC_SYS_PRI1           0xE000ED18  ///< Sys. Handlers 4 to 7 Priority
00079 #define NVIC_SYS_PRI2           0xE000ED1C  ///< Sys. Handlers 8 to 11 Priority
00080 #define NVIC_SYS_PRI3           0xE000ED20  ///< Sys. Handlers 12 to 15 Priority
00081 #define NVIC_SYS_HND_CTRL       0xE000ED24  ///< System Handler Control and State
00082 #define NVIC_FAULT_STAT         0xE000ED28  ///< Configurable Fault Status Reg
00083 #define NVIC_HFAULT_STAT        0xE000ED2C  ///< Hard Fault Status Register
00084 #define NVIC_DEBUG_STAT         0xE000ED30  ///< Debug Status Register
00085 #define NVIC_MM_ADDR            0xE000ED34  ///< Mem Manage Address Register
00086 #define NVIC_FAULT_ADDR         0xE000ED38  ///< Bus Fault Address Register
00087 #define NVIC_MPU_TYPE           0xE000ED90  ///< MPU Type Register
00088 #define NVIC_MPU_CTRL           0xE000ED94  ///< MPU Control Register
00089 #define NVIC_MPU_NUMBER         0xE000ED98  ///< MPU Region Number Register
00090 #define NVIC_MPU_BASE           0xE000ED9C  ///< MPU Region Base Address Register
00091 #define NVIC_MPU_ATTR           0xE000EDA0  ///< MPU Region Attribute & Size Reg
00092 #define NVIC_DBG_CTRL           0xE000EDF0  ///< Debug Control and Status Reg
00093 #define NVIC_DBG_XFER           0xE000EDF4  ///< Debug Core Reg. Transfer Select
00094 #define NVIC_DBG_DATA           0xE000EDF8  ///< Debug Core Register Data
00095 #define NVIC_DBG_INT            0xE000EDFC  ///< Debug Reset Interrupt Control
00096 #define NVIC_SW_TRIG            0xE000EF00  ///< Software Trigger Interrupt Reg
00097 /*\}*/
00098
00102 /*\{*/
00103 #define NVIC_INT_TYPE_LINES_M   0x0000001F  ///< Number of interrupt lines (x32)
00104 #define NVIC_INT_TYPE_LINES_S   0
00105 /*\}*/
00106
00110 /*\{*/
00111 #define NVIC_ST_CTRL_COUNT      0x00010000  ///< Count flag
00112 #define NVIC_ST_CTRL_CLK_SRC    0x00000004  ///< Clock Source
00113 #define NVIC_ST_CTRL_INTEN      0x00000002  ///< Interrupt enable
00114 #define NVIC_ST_CTRL_ENABLE     0x00000001  ///< Counter mode
00115 /*\}*/
00116
00120 /*\{*/
00121 #define NVIC_ST_RELOAD_M        0x00FFFFFF  ///< Counter load value
00122 #define NVIC_ST_RELOAD_S        0
00123 /*\}*/
00124
00129 /*\{*/
00130 #define NVIC_ST_CURRENT_M       0x00FFFFFF  ///< Counter current value
00131 #define NVIC_ST_CURRENT_S       0
00132 /*\}*/
00133
00137 /*\{*/
00138 #define NVIC_ST_CAL_NOREF       0x80000000  ///< No reference clock
00139 #define NVIC_ST_CAL_SKEW        0x40000000  ///< Clock skew
00140 #define NVIC_ST_CAL_ONEMS_M     0x00FFFFFF  ///< 1ms reference value
00141 #define NVIC_ST_CAL_ONEMS_S     0
00142 /*\}*/
00143
00147 /*\{*/
00148 #define NVIC_EN0_INT31          0x80000000  ///< Interrupt 31 enable
00149 #define NVIC_EN0_INT30          0x40000000  ///< Interrupt 30 enable
00150 #define NVIC_EN0_INT29          0x20000000  ///< Interrupt 29 enable
00151 #define NVIC_EN0_INT28          0x10000000  ///< Interrupt 28 enable
00152 #define NVIC_EN0_INT27          0x08000000  ///< Interrupt 27 enable
00153 #define NVIC_EN0_INT26          0x04000000  ///< Interrupt 26 enable
00154 #define NVIC_EN0_INT25          0x02000000  ///< Interrupt 25 enable
00155 #define NVIC_EN0_INT24          0x01000000  ///< Interrupt 24 enable
00156 #define NVIC_EN0_INT23          0x00800000  ///< Interrupt 23 enable
00157 #define NVIC_EN0_INT22          0x00400000  ///< Interrupt 22 enable
00158 #define NVIC_EN0_INT21          0x00200000  ///< Interrupt 21 enable
00159 #define NVIC_EN0_INT20          0x00100000  ///< Interrupt 20 enable
00160 #define NVIC_EN0_INT19          0x00080000  ///< Interrupt 19 enable
00161 #define NVIC_EN0_INT18          0x00040000  ///< Interrupt 18 enable
00162 #define NVIC_EN0_INT17          0x00020000  ///< Interrupt 17 enable
00163 #define NVIC_EN0_INT16          0x00010000  ///< Interrupt 16 enable
00164 #define NVIC_EN0_INT15          0x00008000  ///< Interrupt 15 enable
00165 #define NVIC_EN0_INT14          0x00004000  ///< Interrupt 14 enable
00166 #define NVIC_EN0_INT13          0x00002000  ///< Interrupt 13 enable
00167 #define NVIC_EN0_INT12          0x00001000  ///< Interrupt 12 enable
00168 #define NVIC_EN0_INT11          0x00000800  ///< Interrupt 11 enable
00169 #define NVIC_EN0_INT10          0x00000400  ///< Interrupt 10 enable
00170 #define NVIC_EN0_INT9           0x00000200  ///< Interrupt 9 enable
00171 #define NVIC_EN0_INT8           0x00000100  ///< Interrupt 8 enable
00172 #define NVIC_EN0_INT7           0x00000080  ///< Interrupt 7 enable
00173 #define NVIC_EN0_INT6           0x00000040  ///< Interrupt 6 enable
00174 #define NVIC_EN0_INT5           0x00000020  ///< Interrupt 5 enable
00175 #define NVIC_EN0_INT4           0x00000010  ///< Interrupt 4 enable
00176 #define NVIC_EN0_INT3           0x00000008  ///< Interrupt 3 enable
00177 #define NVIC_EN0_INT2           0x00000004  ///< Interrupt 2 enable
00178 #define NVIC_EN0_INT1           0x00000002  ///< Interrupt 1 enable
00179 #define NVIC_EN0_INT0           0x00000001  ///< Interrupt 0 enable
00180 /*\}*/
00181
00185 /*\{*/
00186 #define NVIC_EN1_INT59          0x08000000  ///< Interrupt 59 enable
00187 #define NVIC_EN1_INT58          0x04000000  ///< Interrupt 58 enable
00188 #define NVIC_EN1_INT57          0x02000000  ///< Interrupt 57 enable
00189 #define NVIC_EN1_INT56          0x01000000  ///< Interrupt 56 enable
00190 #define NVIC_EN1_INT55          0x00800000  ///< Interrupt 55 enable
00191 #define NVIC_EN1_INT54          0x00400000  ///< Interrupt 54 enable
00192 #define NVIC_EN1_INT53          0x00200000  ///< Interrupt 53 enable
00193 #define NVIC_EN1_INT52          0x00100000  ///< Interrupt 52 enable
00194 #define NVIC_EN1_INT51          0x00080000  ///< Interrupt 51 enable
00195 #define NVIC_EN1_INT50          0x00040000  ///< Interrupt 50 enable
00196 #define NVIC_EN1_INT49          0x00020000  ///< Interrupt 49 enable
00197 #define NVIC_EN1_INT48          0x00010000  ///< Interrupt 48 enable
00198 #define NVIC_EN1_INT47          0x00008000  ///< Interrupt 47 enable
00199 #define NVIC_EN1_INT46          0x00004000  ///< Interrupt 46 enable
00200 #define NVIC_EN1_INT45          0x00002000  ///< Interrupt 45 enable
00201 #define NVIC_EN1_INT44          0x00001000  ///< Interrupt 44 enable
00202 #define NVIC_EN1_INT43          0x00000800  ///< Interrupt 43 enable
00203 #define NVIC_EN1_INT42          0x00000400  ///< Interrupt 42 enable
00204 #define NVIC_EN1_INT41          0x00000200  ///< Interrupt 41 enable
00205 #define NVIC_EN1_INT40          0x00000100  ///< Interrupt 40 enable
00206 #define NVIC_EN1_INT39          0x00000080  ///< Interrupt 39 enable
00207 #define NVIC_EN1_INT38          0x00000040  ///< Interrupt 38 enable
00208 #define NVIC_EN1_INT37          0x00000020  ///< Interrupt 37 enable
00209 #define NVIC_EN1_INT36          0x00000010  ///< Interrupt 36 enable
00210 #define NVIC_EN1_INT35          0x00000008  ///< Interrupt 35 enable
00211 #define NVIC_EN1_INT34          0x00000004  ///< Interrupt 34 enable
00212 #define NVIC_EN1_INT33          0x00000002  ///< Interrupt 33 enable
00213 #define NVIC_EN1_INT32          0x00000001  ///< Interrupt 32 enable
00214 /*\}*/
00215
00219 /*\{*/
00220 #define NVIC_DIS0_INT31         0x80000000  ///< Interrupt 31 disable
00221 #define NVIC_DIS0_INT30         0x40000000  ///< Interrupt 30 disable
00222 #define NVIC_DIS0_INT29         0x20000000  ///< Interrupt 29 disable
00223 #define NVIC_DIS0_INT28         0x10000000  ///< Interrupt 28 disable
00224 #define NVIC_DIS0_INT27         0x08000000  ///< Interrupt 27 disable
00225 #define NVIC_DIS0_INT26         0x04000000  ///< Interrupt 26 disable
00226 #define NVIC_DIS0_INT25         0x02000000  ///< Interrupt 25 disable
00227 #define NVIC_DIS0_INT24         0x01000000  ///< Interrupt 24 disable
00228 #define NVIC_DIS0_INT23         0x00800000  ///< Interrupt 23 disable
00229 #define NVIC_DIS0_INT22         0x00400000  ///< Interrupt 22 disable
00230 #define NVIC_DIS0_INT21         0x00200000  ///< Interrupt 21 disable
00231 #define NVIC_DIS0_INT20         0x00100000  ///< Interrupt 20 disable
00232 #define NVIC_DIS0_INT19         0x00080000  ///< Interrupt 19 disable
00233 #define NVIC_DIS0_INT18         0x00040000  ///< Interrupt 18 disable
00234 #define NVIC_DIS0_INT17         0x00020000  ///< Interrupt 17 disable
00235 #define NVIC_DIS0_INT16         0x00010000  ///< Interrupt 16 disable
00236 #define NVIC_DIS0_INT15         0x00008000  ///< Interrupt 15 disable
00237 #define NVIC_DIS0_INT14         0x00004000  ///< Interrupt 14 disable
00238 #define NVIC_DIS0_INT13         0x00002000  ///< Interrupt 13 disable
00239 #define NVIC_DIS0_INT12         0x00001000  ///< Interrupt 12 disable
00240 #define NVIC_DIS0_INT11         0x00000800  ///< Interrupt 11 disable
00241 #define NVIC_DIS0_INT10         0x00000400  ///< Interrupt 10 disable
00242 #define NVIC_DIS0_INT9          0x00000200  ///< Interrupt 9 disable
00243 #define NVIC_DIS0_INT8          0x00000100  ///< Interrupt 8 disable
00244 #define NVIC_DIS0_INT7          0x00000080  ///< Interrupt 7 disable
00245 #define NVIC_DIS0_INT6          0x00000040  ///< Interrupt 6 disable
00246 #define NVIC_DIS0_INT5          0x00000020  ///< Interrupt 5 disable
00247 #define NVIC_DIS0_INT4          0x00000010  ///< Interrupt 4 disable
00248 #define NVIC_DIS0_INT3          0x00000008  ///< Interrupt 3 disable
00249 #define NVIC_DIS0_INT2          0x00000004  ///< Interrupt 2 disable
00250 #define NVIC_DIS0_INT1          0x00000002  ///< Interrupt 1 disable
00251 #define NVIC_DIS0_INT0          0x00000001  ///< Interrupt 0 disable
00252 /*\}*/
00253
00257 /*\{*/
00258 #define NVIC_DIS1_INT59         0x08000000  ///< Interrupt 59 disable
00259 #define NVIC_DIS1_INT58         0x04000000  ///< Interrupt 58 disable
00260 #define NVIC_DIS1_INT57         0x02000000  ///< Interrupt 57 disable
00261 #define NVIC_DIS1_INT56         0x01000000  ///< Interrupt 56 disable
00262 #define NVIC_DIS1_INT55         0x00800000  ///< Interrupt 55 disable
00263 #define NVIC_DIS1_INT54         0x00400000  ///< Interrupt 54 disable
00264 #define NVIC_DIS1_INT53         0x00200000  ///< Interrupt 53 disable
00265 #define NVIC_DIS1_INT52         0x00100000  ///< Interrupt 52 disable
00266 #define NVIC_DIS1_INT51         0x00080000  ///< Interrupt 51 disable
00267 #define NVIC_DIS1_INT50         0x00040000  ///< Interrupt 50 disable
00268 #define NVIC_DIS1_INT49         0x00020000  ///< Interrupt 49 disable
00269 #define NVIC_DIS1_INT48         0x00010000  ///< Interrupt 48 disable
00270 #define NVIC_DIS1_INT47         0x00008000  ///< Interrupt 47 disable
00271 #define NVIC_DIS1_INT46         0x00004000  ///< Interrupt 46 disable
00272 #define NVIC_DIS1_INT45         0x00002000  ///< Interrupt 45 disable
00273 #define NVIC_DIS1_INT44         0x00001000  ///< Interrupt 44 disable
00274 #define NVIC_DIS1_INT43         0x00000800  ///< Interrupt 43 disable
00275 #define NVIC_DIS1_INT42         0x00000400  ///< Interrupt 42 disable
00276 #define NVIC_DIS1_INT41         0x00000200  ///< Interrupt 41 disable
00277 #define NVIC_DIS1_INT40         0x00000100  ///< Interrupt 40 disable
00278 #define NVIC_DIS1_INT39         0x00000080  ///< Interrupt 39 disable
00279 #define NVIC_DIS1_INT38         0x00000040  ///< Interrupt 38 disable
00280 #define NVIC_DIS1_INT37         0x00000020  ///< Interrupt 37 disable
00281 #define NVIC_DIS1_INT36         0x00000010  ///< Interrupt 36 disable
00282 #define NVIC_DIS1_INT35         0x00000008  ///< Interrupt 35 disable
00283 #define NVIC_DIS1_INT34         0x00000004  ///< Interrupt 34 disable
00284 #define NVIC_DIS1_INT33         0x00000002  ///< Interrupt 33 disable
00285 #define NVIC_DIS1_INT32         0x00000001  ///< Interrupt 32 disable
00286 /*\}*/
00287
00291 /*\{*/
00292 #define NVIC_PEND0_INT31        0x80000000  ///< Interrupt 31 pend
00293 #define NVIC_PEND0_INT30        0x40000000  ///< Interrupt 30 pend
00294 #define NVIC_PEND0_INT29        0x20000000  ///< Interrupt 29 pend
00295 #define NVIC_PEND0_INT28        0x10000000  ///< Interrupt 28 pend
00296 #define NVIC_PEND0_INT27        0x08000000  ///< Interrupt 27 pend
00297 #define NVIC_PEND0_INT26        0x04000000  ///< Interrupt 26 pend
00298 #define NVIC_PEND0_INT25        0x02000000  ///< Interrupt 25 pend
00299 #define NVIC_PEND0_INT24        0x01000000  ///< Interrupt 24 pend
00300 #define NVIC_PEND0_INT23        0x00800000  ///< Interrupt 23 pend
00301 #define NVIC_PEND0_INT22        0x00400000  ///< Interrupt 22 pend
00302 #define NVIC_PEND0_INT21        0x00200000  ///< Interrupt 21 pend
00303 #define NVIC_PEND0_INT20        0x00100000  ///< Interrupt 20 pend
00304 #define NVIC_PEND0_INT19        0x00080000  ///< Interrupt 19 pend
00305 #define NVIC_PEND0_INT18        0x00040000  ///< Interrupt 18 pend
00306 #define NVIC_PEND0_INT17        0x00020000  ///< Interrupt 17 pend
00307 #define NVIC_PEND0_INT16        0x00010000  ///< Interrupt 16 pend
00308 #define NVIC_PEND0_INT15        0x00008000  ///< Interrupt 15 pend
00309 #define NVIC_PEND0_INT14        0x00004000  ///< Interrupt 14 pend
00310 #define NVIC_PEND0_INT13        0x00002000  ///< Interrupt 13 pend
00311 #define NVIC_PEND0_INT12        0x00001000  ///< Interrupt 12 pend
00312 #define NVIC_PEND0_INT11        0x00000800  ///< Interrupt 11 pend
00313 #define NVIC_PEND0_INT10        0x00000400  ///< Interrupt 10 pend
00314 #define NVIC_PEND0_INT9         0x00000200  ///< Interrupt 9 pend
00315 #define NVIC_PEND0_INT8         0x00000100  ///< Interrupt 8 pend
00316 #define NVIC_PEND0_INT7         0x00000080  ///< Interrupt 7 pend
00317 #define NVIC_PEND0_INT6         0x00000040  ///< Interrupt 6 pend
00318 #define NVIC_PEND0_INT5         0x00000020  ///< Interrupt 5 pend
00319 #define NVIC_PEND0_INT4         0x00000010  ///< Interrupt 4 pend
00320 #define NVIC_PEND0_INT3         0x00000008  ///< Interrupt 3 pend
00321 #define NVIC_PEND0_INT2         0x00000004  ///< Interrupt 2 pend
00322 #define NVIC_PEND0_INT1         0x00000002  ///< Interrupt 1 pend
00323 #define NVIC_PEND0_INT0         0x00000001  ///< Interrupt 0 pend
00324 /*\}*/
00325
00329 /*\{*/
00330 #define NVIC_PEND1_INT59        0x08000000  ///< Interrupt 59 pend
00331 #define NVIC_PEND1_INT58        0x04000000  ///< Interrupt 58 pend
00332 #define NVIC_PEND1_INT57        0x02000000  ///< Interrupt 57 pend
00333 #define NVIC_PEND1_INT56        0x01000000  ///< Interrupt 56 pend
00334 #define NVIC_PEND1_INT55        0x00800000  ///< Interrupt 55 pend
00335 #define NVIC_PEND1_INT54        0x00400000  ///< Interrupt 54 pend
00336 #define NVIC_PEND1_INT53        0x00200000  ///< Interrupt 53 pend
00337 #define NVIC_PEND1_INT52        0x00100000  ///< Interrupt 52 pend
00338 #define NVIC_PEND1_INT51        0x00080000  ///< Interrupt 51 pend
00339 #define NVIC_PEND1_INT50        0x00040000  ///< Interrupt 50 pend
00340 #define NVIC_PEND1_INT49        0x00020000  ///< Interrupt 49 pend
00341 #define NVIC_PEND1_INT48        0x00010000  ///< Interrupt 48 pend
00342 #define NVIC_PEND1_INT47        0x00008000  ///< Interrupt 47 pend
00343 #define NVIC_PEND1_INT46        0x00004000  ///< Interrupt 46 pend
00344 #define NVIC_PEND1_INT45        0x00002000  ///< Interrupt 45 pend
00345 #define NVIC_PEND1_INT44        0x00001000  ///< Interrupt 44 pend
00346 #define NVIC_PEND1_INT43        0x00000800  ///< Interrupt 43 pend
00347 #define NVIC_PEND1_INT42        0x00000400  ///< Interrupt 42 pend
00348 #define NVIC_PEND1_INT41        0x00000200  ///< Interrupt 41 pend
00349 #define NVIC_PEND1_INT40        0x00000100  ///< Interrupt 40 pend
00350 #define NVIC_PEND1_INT39        0x00000080  ///< Interrupt 39 pend
00351 #define NVIC_PEND1_INT38        0x00000040  ///< Interrupt 38 pend
00352 #define NVIC_PEND1_INT37        0x00000020  ///< Interrupt 37 pend
00353 #define NVIC_PEND1_INT36        0x00000010  ///< Interrupt 36 pend
00354 #define NVIC_PEND1_INT35        0x00000008  ///< Interrupt 35 pend
00355 #define NVIC_PEND1_INT34        0x00000004  ///< Interrupt 34 pend
00356 #define NVIC_PEND1_INT33        0x00000002  ///< Interrupt 33 pend
00357 #define NVIC_PEND1_INT32        0x00000001  ///< Interrupt 32 pend
00358 /*\}*/
00359
00363 /*\{*/
00364 #define NVIC_UNPEND0_INT31      0x80000000  ///< Interrupt 31 unpend
00365 #define NVIC_UNPEND0_INT30      0x40000000  ///< Interrupt 30 unpend
00366 #define NVIC_UNPEND0_INT29      0x20000000  ///< Interrupt 29 unpend
00367 #define NVIC_UNPEND0_INT28      0x10000000  ///< Interrupt 28 unpend
00368 #define NVIC_UNPEND0_INT27      0x08000000  ///< Interrupt 27 unpend
00369 #define NVIC_UNPEND0_INT26      0x04000000  ///< Interrupt 26 unpend
00370 #define NVIC_UNPEND0_INT25      0x02000000  ///< Interrupt 25 unpend
00371 #define NVIC_UNPEND0_INT24      0x01000000  ///< Interrupt 24 unpend
00372 #define NVIC_UNPEND0_INT23      0x00800000  ///< Interrupt 23 unpend
00373 #define NVIC_UNPEND0_INT22      0x00400000  ///< Interrupt 22 unpend
00374 #define NVIC_UNPEND0_INT21      0x00200000  ///< Interrupt 21 unpend
00375 #define NVIC_UNPEND0_INT20      0x00100000  ///< Interrupt 20 unpend
00376 #define NVIC_UNPEND0_INT19      0x00080000  ///< Interrupt 19 unpend
00377 #define NVIC_UNPEND0_INT18      0x00040000  ///< Interrupt 18 unpend
00378 #define NVIC_UNPEND0_INT17      0x00020000  ///< Interrupt 17 unpend
00379 #define NVIC_UNPEND0_INT16      0x00010000  ///< Interrupt 16 unpend
00380 #define NVIC_UNPEND0_INT15      0x00008000  ///< Interrupt 15 unpend
00381 #define NVIC_UNPEND0_INT14      0x00004000  ///< Interrupt 14 unpend
00382 #define NVIC_UNPEND0_INT13      0x00002000  ///< Interrupt 13 unpend
00383 #define NVIC_UNPEND0_INT12      0x00001000  ///< Interrupt 12 unpend
00384 #define NVIC_UNPEND0_INT11      0x00000800  ///< Interrupt 11 unpend
00385 #define NVIC_UNPEND0_INT10      0x00000400  ///< Interrupt 10 unpend
00386 #define NVIC_UNPEND0_INT9       0x00000200  ///< Interrupt 9 unpend
00387 #define NVIC_UNPEND0_INT8       0x00000100  ///< Interrupt 8 unpend
00388 #define NVIC_UNPEND0_INT7       0x00000080  ///< Interrupt 7 unpend
00389 #define NVIC_UNPEND0_INT6       0x00000040  ///< Interrupt 6 unpend
00390 #define NVIC_UNPEND0_INT5       0x00000020  ///< Interrupt 5 unpend
00391 #define NVIC_UNPEND0_INT4       0x00000010  ///< Interrupt 4 unpend
00392 #define NVIC_UNPEND0_INT3       0x00000008  ///< Interrupt 3 unpend
00393 #define NVIC_UNPEND0_INT2       0x00000004  ///< Interrupt 2 unpend
00394 #define NVIC_UNPEND0_INT1       0x00000002  ///< Interrupt 1 unpend
00395 #define NVIC_UNPEND0_INT0       0x00000001  ///< Interrupt 0 unpend
00396 /*\}*/
00397
00401 /*\{*/
00402 #define NVIC_UNPEND1_INT59      0x08000000  ///< Interrupt 59 unpend
00403 #define NVIC_UNPEND1_INT58      0x04000000  ///< Interrupt 58 unpend
00404 #define NVIC_UNPEND1_INT57      0x02000000  ///< Interrupt 57 unpend
00405 #define NVIC_UNPEND1_INT56      0x01000000  ///< Interrupt 56 unpend
00406 #define NVIC_UNPEND1_INT55      0x00800000  ///< Interrupt 55 unpend
00407 #define NVIC_UNPEND1_INT54      0x00400000  ///< Interrupt 54 unpend
00408 #define NVIC_UNPEND1_INT53      0x00200000  ///< Interrupt 53 unpend
00409 #define NVIC_UNPEND1_INT52      0x00100000  ///< Interrupt 52 unpend
00410 #define NVIC_UNPEND1_INT51      0x00080000  ///< Interrupt 51 unpend
00411 #define NVIC_UNPEND1_INT50      0x00040000  ///< Interrupt 50 unpend
00412 #define NVIC_UNPEND1_INT49      0x00020000  ///< Interrupt 49 unpend
00413 #define NVIC_UNPEND1_INT48      0x00010000  ///< Interrupt 48 unpend
00414 #define NVIC_UNPEND1_INT47      0x00008000  ///< Interrupt 47 unpend
00415 #define NVIC_UNPEND1_INT46      0x00004000  ///< Interrupt 46 unpend
00416 #define NVIC_UNPEND1_INT45      0x00002000  ///< Interrupt 45 unpend
00417 #define NVIC_UNPEND1_INT44      0x00001000  ///< Interrupt 44 unpend
00418 #define NVIC_UNPEND1_INT43      0x00000800  ///< Interrupt 43 unpend
00419 #define NVIC_UNPEND1_INT42      0x00000400  ///< Interrupt 42 unpend
00420 #define NVIC_UNPEND1_INT41      0x00000200  ///< Interrupt 41 unpend
00421 #define NVIC_UNPEND1_INT40      0x00000100  ///< Interrupt 40 unpend
00422 #define NVIC_UNPEND1_INT39      0x00000080  ///< Interrupt 39 unpend
00423 #define NVIC_UNPEND1_INT38      0x00000040  ///< Interrupt 38 unpend
00424 #define NVIC_UNPEND1_INT37      0x00000020  ///< Interrupt 37 unpend
00425 #define NVIC_UNPEND1_INT36      0x00000010  ///< Interrupt 36 unpend
00426 #define NVIC_UNPEND1_INT35      0x00000008  ///< Interrupt 35 unpend
00427 #define NVIC_UNPEND1_INT34      0x00000004  ///< Interrupt 34 unpend
00428 #define NVIC_UNPEND1_INT33      0x00000002  ///< Interrupt 33 unpend
00429 #define NVIC_UNPEND1_INT32      0x00000001  ///< Interrupt 32 unpend
00430 /*\}*/
00431
00435 /*\{*/
00436 #define NVIC_ACTIVE0_INT31      0x80000000  ///< Interrupt 31 active
00437 #define NVIC_ACTIVE0_INT30      0x40000000  ///< Interrupt 30 active
00438 #define NVIC_ACTIVE0_INT29      0x20000000  ///< Interrupt 29 active
00439 #define NVIC_ACTIVE0_INT28      0x10000000  ///< Interrupt 28 active
00440 #define NVIC_ACTIVE0_INT27      0x08000000  ///< Interrupt 27 active
00441 #define NVIC_ACTIVE0_INT26      0x04000000  ///< Interrupt 26 active
00442 #define NVIC_ACTIVE0_INT25      0x02000000  ///< Interrupt 25 active
00443 #define NVIC_ACTIVE0_INT24      0x01000000  ///< Interrupt 24 active
00444 #define NVIC_ACTIVE0_INT23      0x00800000  ///< Interrupt 23 active
00445 #define NVIC_ACTIVE0_INT22      0x00400000  ///< Interrupt 22 active
00446 #define NVIC_ACTIVE0_INT21      0x00200000  ///< Interrupt 21 active
00447 #define NVIC_ACTIVE0_INT20      0x00100000  ///< Interrupt 20 active
00448 #define NVIC_ACTIVE0_INT19      0x00080000  ///< Interrupt 19 active
00449 #define NVIC_ACTIVE0_INT18      0x00040000  ///< Interrupt 18 active
00450 #define NVIC_ACTIVE0_INT17      0x00020000  ///< Interrupt 17 active
00451 #define NVIC_ACTIVE0_INT16      0x00010000  ///< Interrupt 16 active
00452 #define NVIC_ACTIVE0_INT15      0x00008000  ///< Interrupt 15 active
00453 #define NVIC_ACTIVE0_INT14      0x00004000  ///< Interrupt 14 active
00454 #define NVIC_ACTIVE0_INT13      0x00002000  ///< Interrupt 13 active
00455 #define NVIC_ACTIVE0_INT12      0x00001000  ///< Interrupt 12 active
00456 #define NVIC_ACTIVE0_INT11      0x00000800  ///< Interrupt 11 active
00457 #define NVIC_ACTIVE0_INT10      0x00000400  ///< Interrupt 10 active
00458 #define NVIC_ACTIVE0_INT9       0x00000200  ///< Interrupt 9 active
00459 #define NVIC_ACTIVE0_INT8       0x00000100  ///< Interrupt 8 active
00460 #define NVIC_ACTIVE0_INT7       0x00000080  ///< Interrupt 7 active
00461 #define NVIC_ACTIVE0_INT6       0x00000040  ///< Interrupt 6 active
00462 #define NVIC_ACTIVE0_INT5       0x00000020  ///< Interrupt 5 active
00463 #define NVIC_ACTIVE0_INT4       0x00000010  ///< Interrupt 4 active
00464 #define NVIC_ACTIVE0_INT3       0x00000008  ///< Interrupt 3 active
00465 #define NVIC_ACTIVE0_INT2       0x00000004  ///< Interrupt 2 active
00466 #define NVIC_ACTIVE0_INT1       0x00000002  ///< Interrupt 1 active
00467 #define NVIC_ACTIVE0_INT0       0x00000001  ///< Interrupt 0 active
00468 /*\}*/
00469
00473 /*\{*/
00474 #define NVIC_ACTIVE1_INT59      0x08000000  ///< Interrupt 59 active
00475 #define NVIC_ACTIVE1_INT58      0x04000000  ///< Interrupt 58 active
00476 #define NVIC_ACTIVE1_INT57      0x02000000  ///< Interrupt 57 active
00477 #define NVIC_ACTIVE1_INT56      0x01000000  ///< Interrupt 56 active
00478 #define NVIC_ACTIVE1_INT55      0x00800000  ///< Interrupt 55 active
00479 #define NVIC_ACTIVE1_INT54      0x00400000  ///< Interrupt 54 active
00480 #define NVIC_ACTIVE1_INT53      0x00200000  ///< Interrupt 53 active
00481 #define NVIC_ACTIVE1_INT52      0x00100000  ///< Interrupt 52 active
00482 #define NVIC_ACTIVE1_INT51      0x00080000  ///< Interrupt 51 active
00483 #define NVIC_ACTIVE1_INT50      0x00040000  ///< Interrupt 50 active
00484 #define NVIC_ACTIVE1_INT49      0x00020000  ///< Interrupt 49 active
00485 #define NVIC_ACTIVE1_INT48      0x00010000  ///< Interrupt 48 active
00486 #define NVIC_ACTIVE1_INT47      0x00008000  ///< Interrupt 47 active
00487 #define NVIC_ACTIVE1_INT46      0x00004000  ///< Interrupt 46 active
00488 #define NVIC_ACTIVE1_INT45      0x00002000  ///< Interrupt 45 active
00489 #define NVIC_ACTIVE1_INT44      0x00001000  ///< Interrupt 44 active
00490 #define NVIC_ACTIVE1_INT43      0x00000800  ///< Interrupt 43 active
00491 #define NVIC_ACTIVE1_INT42      0x00000400  ///< Interrupt 42 active
00492 #define NVIC_ACTIVE1_INT41      0x00000200  ///< Interrupt 41 active
00493 #define NVIC_ACTIVE1_INT40      0x00000100  ///< Interrupt 40 active
00494 #define NVIC_ACTIVE1_INT39      0x00000080  ///< Interrupt 39 active
00495 #define NVIC_ACTIVE1_INT38      0x00000040  ///< Interrupt 38 active
00496 #define NVIC_ACTIVE1_INT37      0x00000020  ///< Interrupt 37 active
00497 #define NVIC_ACTIVE1_INT36      0x00000010  ///< Interrupt 36 active
00498 #define NVIC_ACTIVE1_INT35      0x00000008  ///< Interrupt 35 active
00499 #define NVIC_ACTIVE1_INT34      0x00000004  ///< Interrupt 34 active
00500 #define NVIC_ACTIVE1_INT33      0x00000002  ///< Interrupt 33 active
00501 #define NVIC_ACTIVE1_INT32      0x00000001  ///< Interrupt 32 active
00502 /*\}*/
00503
00507 /*\{*/
00508 #define NVIC_PRI0_INT3_M        0xFF000000  ///< Interrupt 3 priority mask
00509 #define NVIC_PRI0_INT2_M        0x00FF0000  ///< Interrupt 2 priority mask
00510 #define NVIC_PRI0_INT1_M        0x0000FF00  ///< Interrupt 1 priority mask
00511 #define NVIC_PRI0_INT0_M        0x000000FF  ///< Interrupt 0 priority mask
00512 #define NVIC_PRI0_INT3_S        24
00513 #define NVIC_PRI0_INT2_S        16
00514 #define NVIC_PRI0_INT1_S        8
00515 #define NVIC_PRI0_INT0_S        0
00516 /*\}*/
00517
00521 /*\{*/
00522 #define NVIC_PRI1_INT7_M        0xFF000000  ///< Interrupt 7 priority mask
00523 #define NVIC_PRI1_INT6_M        0x00FF0000  ///< Interrupt 6 priority mask
00524 #define NVIC_PRI1_INT5_M        0x0000FF00  ///< Interrupt 5 priority mask
00525 #define NVIC_PRI1_INT4_M        0x000000FF  ///< Interrupt 4 priority mask
00526 #define NVIC_PRI1_INT7_S        24
00527 #define NVIC_PRI1_INT6_S        16
00528 #define NVIC_PRI1_INT5_S        8
00529 #define NVIC_PRI1_INT4_S        0
00530 /*\}*/
00531
00535 /*\{*/
00536 #define NVIC_PRI2_INT11_M       0xFF000000  ///< Interrupt 11 priority mask
00537 #define NVIC_PRI2_INT10_M       0x00FF0000  ///< Interrupt 10 priority mask
00538 #define NVIC_PRI2_INT9_M        0x0000FF00  ///< Interrupt 9 priority mask
00539 #define NVIC_PRI2_INT8_M        0x000000FF  ///< Interrupt 8 priority mask
00540 #define NVIC_PRI2_INT11_S       24
00541 #define NVIC_PRI2_INT10_S       16
00542 #define NVIC_PRI2_INT9_S        8
00543 #define NVIC_PRI2_INT8_S        0
00544 /*\}*/
00545
00549 /*\{*/
00550 #define NVIC_PRI3_INT15_M       0xFF000000  ///< Interrupt 15 priority mask
00551 #define NVIC_PRI3_INT14_M       0x00FF0000  ///< Interrupt 14 priority mask
00552 #define NVIC_PRI3_INT13_M       0x0000FF00  ///< Interrupt 13 priority mask
00553 #define NVIC_PRI3_INT12_M       0x000000FF  ///< Interrupt 12 priority mask
00554 #define NVIC_PRI3_INT15_S       24
00555 #define NVIC_PRI3_INT14_S       16
00556 #define NVIC_PRI3_INT13_S       8
00557 #define NVIC_PRI3_INT12_S       0
00558 /*\}*/
00559
00563 /*\{*/
00564 #define NVIC_PRI4_INT19_M       0xFF000000  ///< Interrupt 19 priority mask
00565 #define NVIC_PRI4_INT18_M       0x00FF0000  ///< Interrupt 18 priority mask
00566 #define NVIC_PRI4_INT17_M       0x0000FF00  ///< Interrupt 17 priority mask
00567 #define NVIC_PRI4_INT16_M       0x000000FF  ///< Interrupt 16 priority mask
00568 #define NVIC_PRI4_INT19_S       24
00569 #define NVIC_PRI4_INT18_S       16
00570 #define NVIC_PRI4_INT17_S       8
00571 #define NVIC_PRI4_INT16_S       0
00572 /*\}*/
00573
00577 /*\{*/
00578 #define NVIC_PRI5_INT23_M       0xFF000000  ///< Interrupt 23 priority mask
00579 #define NVIC_PRI5_INT22_M       0x00FF0000  ///< Interrupt 22 priority mask
00580 #define NVIC_PRI5_INT21_M       0x0000FF00  ///< Interrupt 21 priority mask
00581 #define NVIC_PRI5_INT20_M       0x000000FF  ///< Interrupt 20 priority mask
00582 #define NVIC_PRI5_INT23_S       24
00583 #define NVIC_PRI5_INT22_S       16
00584 #define NVIC_PRI5_INT21_S       8
00585 #define NVIC_PRI5_INT20_S       0
00586 /*\}*/
00587
00591 /*\{*/
00592 #define NVIC_PRI6_INT27_M       0xFF000000  ///< Interrupt 27 priority mask
00593 #define NVIC_PRI6_INT26_M       0x00FF0000  ///< Interrupt 26 priority mask
00594 #define NVIC_PRI6_INT25_M       0x0000FF00  ///< Interrupt 25 priority mask
00595 #define NVIC_PRI6_INT24_M       0x000000FF  ///< Interrupt 24 priority mask
00596 #define NVIC_PRI6_INT27_S       24
00597 #define NVIC_PRI6_INT26_S       16
00598 #define NVIC_PRI6_INT25_S       8
00599 #define NVIC_PRI6_INT24_S       0
00600 /*\}*/
00601
00605 /*\{*/
00606 #define NVIC_PRI7_INT31_M       0xFF000000  ///< Interrupt 31 priority mask
00607 #define NVIC_PRI7_INT30_M       0x00FF0000  ///< Interrupt 30 priority mask
00608 #define NVIC_PRI7_INT29_M       0x0000FF00  ///< Interrupt 29 priority mask
00609 #define NVIC_PRI7_INT28_M       0x000000FF  ///< Interrupt 28 priority mask
00610 #define NVIC_PRI7_INT31_S       24
00611 #define NVIC_PRI7_INT30_S       16
00612 #define NVIC_PRI7_INT29_S       8
00613 #define NVIC_PRI7_INT28_S       0
00614 /*\}*/
00615
00619 /*\{*/
00620 #define NVIC_PRI8_INT35_M       0xFF000000  ///< Interrupt 35 priority mask
00621 #define NVIC_PRI8_INT34_M       0x00FF0000  ///< Interrupt 34 priority mask
00622 #define NVIC_PRI8_INT33_M       0x0000FF00  ///< Interrupt 33 priority mask
00623 #define NVIC_PRI8_INT32_M       0x000000FF  ///< Interrupt 32 priority mask
00624 #define NVIC_PRI8_INT35_S       24
00625 #define NVIC_PRI8_INT34_S       16
00626 #define NVIC_PRI8_INT33_S       8
00627 #define NVIC_PRI8_INT32_S       0
00628 /*\}*/
00629
00633 /*\{*/
00634 #define NVIC_PRI9_INT39_M       0xFF000000  ///< Interrupt 39 priority mask
00635 #define NVIC_PRI9_INT38_M       0x00FF0000  ///< Interrupt 38 priority mask
00636 #define NVIC_PRI9_INT37_M       0x0000FF00  ///< Interrupt 37 priority mask
00637 #define NVIC_PRI9_INT36_M       0x000000FF  ///< Interrupt 36 priority mask
00638 #define NVIC_PRI9_INT39_S       24
00639 #define NVIC_PRI9_INT38_S       16
00640 #define NVIC_PRI9_INT37_S       8
00641 #define NVIC_PRI9_INT36_S       0
00642 /*\}*/
00643
00647 /*\{*/
00648 #define NVIC_PRI10_INT43_M      0xFF000000  ///< Interrupt 43 priority mask
00649 #define NVIC_PRI10_INT42_M      0x00FF0000  ///< Interrupt 42 priority mask
00650 #define NVIC_PRI10_INT41_M      0x0000FF00  ///< Interrupt 41 priority mask
00651 #define NVIC_PRI10_INT40_M      0x000000FF  ///< Interrupt 40 priority mask
00652 #define NVIC_PRI10_INT43_S      24
00653 #define NVIC_PRI10_INT42_S      16
00654 #define NVIC_PRI10_INT41_S      8
00655 #define NVIC_PRI10_INT40_S      0
00656 /*\}*/
00657
00661 /*\{*/
00662 #define NVIC_CPUID_IMP_M        0xFF000000  ///< Implementer
00663 #define NVIC_CPUID_VAR_M        0x00F00000  ///< Variant
00664 #define NVIC_CPUID_PARTNO_M     0x0000FFF0  ///< Processor part number
00665 #define NVIC_CPUID_REV_M        0x0000000F  ///< Revision
00666 /*\}*/
00667
00671 /*\{*/
00672 #define NVIC_INT_CTRL_NMI_SET   0x80000000  ///< Pend a NMI
00673 #define NVIC_INT_CTRL_PEND_SV   0x10000000  ///< Pend a PendSV
00674 #define NVIC_INT_CTRL_UNPEND_SV 0x08000000  ///< Unpend a PendSV
00675 #define NVIC_INT_CTRL_PENDSTSET 0x04000000  ///< Set pending SysTick interrupt
00676 #define NVIC_INT_CTRL_PENDSTCLR 0x02000000  ///< Clear pending SysTick interrupt
00677 #define NVIC_INT_CTRL_ISR_PRE   0x00800000  ///< Debug interrupt handling
00678 #define NVIC_INT_CTRL_ISR_PEND  0x00400000  ///< Debug interrupt pending
00679 #define NVIC_INT_CTRL_VEC_PEN_M 0x003FF000  ///< Highest pending exception
00680 #define NVIC_INT_CTRL_RET_BASE  0x00000800  ///< Return to base
00681 #define NVIC_INT_CTRL_VEC_ACT_M 0x000003FF  ///< Current active exception
00682 #define NVIC_INT_CTRL_VEC_PEN_S 12
00683 #define NVIC_INT_CTRL_VEC_ACT_S 0
00684 /*\}*/
00685
00689 /*\{*/
00690 #define NVIC_VTABLE_BASE        0x20000000  ///< Vector table base
00691 #define NVIC_VTABLE_OFFSET_M    0x1FFFFF00  ///< Vector table offset
00692 #define NVIC_VTABLE_OFFSET_S    8
00693 /*\}*/
00694
00698 /*\{*/
00699 #define NVIC_APINT_VECTKEY_M    0xFFFF0000  ///< Vector key mask
00700 #define NVIC_APINT_VECTKEY      0x05FA0000  ///< Vector key
00701 #define NVIC_APINT_ENDIANESS    0x00008000  ///< Data endianess
00702 #define NVIC_APINT_PRIGROUP_M   0x00000700  ///< Priority group
00703 #define NVIC_APINT_PRIGROUP_0_8 0x00000700  ///< Priority group 0.8 split
00704 #define NVIC_APINT_PRIGROUP_1_7 0x00000600  ///< Priority group 1.7 split
00705 #define NVIC_APINT_PRIGROUP_2_6 0x00000500  ///< Priority group 2.6 split
00706 #define NVIC_APINT_PRIGROUP_3_5 0x00000400  ///< Priority group 3.5 split
00707 #define NVIC_APINT_PRIGROUP_4_4 0x00000300  ///< Priority group 4.4 split
00708 #define NVIC_APINT_PRIGROUP_5_3 0x00000200  ///< Priority group 5.3 split
00709 #define NVIC_APINT_PRIGROUP_6_2 0x00000100  ///< Priority group 6.2 split
00710 #define NVIC_APINT_SYSRESETREQ  0x00000004  ///< System reset request
00711 #define NVIC_APINT_VECT_CLR_ACT 0x00000002  ///< Clear active NMI/fault info
00712 #define NVIC_APINT_VECT_RESET   0x00000001  ///< System reset
00713 #define NVIC_APINT_PRIGROUP_7_1 0x00000000  ///< Priority group 7.1 split
00714 /*\}*/
00715
00719 /*\{*/
00720 #define NVIC_SYS_CTRL_SEVONPEND 0x00000010  ///< Wakeup on pend
00721 #define NVIC_SYS_CTRL_SLEEPDEEP 0x00000004  ///< Deep sleep enable
00722 #define NVIC_SYS_CTRL_SLEEPEXIT 0x00000002  ///< Sleep on ISR exit
00723 /*\}*/
00724
00728 /*\{*/
00729 #define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100  ///< Ignore bus fault in NMI/fault
00730 #define NVIC_CFG_CTRL_DIV0      0x00000010  ///< Trap on divide by 0
00731 #define NVIC_CFG_CTRL_UNALIGNED 0x00000008  ///< Trap on unaligned access
00732 #define NVIC_CFG_CTRL_DEEP_PEND 0x00000004  ///< Allow deep interrupt trigger
00733 #define NVIC_CFG_CTRL_MAIN_PEND 0x00000002  ///< Allow main interrupt trigger
00734 #define NVIC_CFG_CTRL_BASE_THR  0x00000001  ///< Thread state control
00735 /*\}*/
00736
00740 /*\{*/
00741 #define NVIC_SYS_PRI1_RES_M     0xFF000000  ///< Priority of reserved handler
00742 #define NVIC_SYS_PRI1_USAGE_M   0x00FF0000  ///< Priority of usage fault handler
00743 #define NVIC_SYS_PRI1_BUS_M     0x0000FF00  ///< Priority of bus fault handler
00744 #define NVIC_SYS_PRI1_MEM_M     0x000000FF  ///< Priority of mem manage handler
00745 #define NVIC_SYS_PRI1_USAGE_S   16
00746 #define NVIC_SYS_PRI1_BUS_S     8
00747 #define NVIC_SYS_PRI1_MEM_S     0
00748 /*\}*/
00749
00753 /*\{*/
00754 #define NVIC_SYS_PRI2_SVC_M     0xFF000000  ///< Priority of SVCall handler
00755 #define NVIC_SYS_PRI2_RES_M     0x00FFFFFF  ///< Priority of reserved handlers
00756 #define NVIC_SYS_PRI2_SVC_S     24
00757 /*\}*/
00758
00762 /*\{*/
00763 #define NVIC_SYS_PRI3_TICK_M    0xFF000000  ///< Priority of Sys Tick handler
00764 #define NVIC_SYS_PRI3_PENDSV_M  0x00FF0000  ///< Priority of PendSV handler
00765 #define NVIC_SYS_PRI3_RES_M     0x0000FF00  ///< Priority of reserved handler
00766 #define NVIC_SYS_PRI3_DEBUG_M   0x000000FF  ///< Priority of debug handler
00767 #define NVIC_SYS_PRI3_TICK_S    24
00768 #define NVIC_SYS_PRI3_PENDSV_S  16
00769 #define NVIC_SYS_PRI3_DEBUG_S   0
00770 /*\}*/
00771
00776 /*\{*/
00777 #define NVIC_SYS_HND_CTRL_USAGE 0x00040000  ///< Usage fault enable
00778 #define NVIC_SYS_HND_CTRL_BUS   0x00020000  ///< Bus fault enable
00779 #define NVIC_SYS_HND_CTRL_MEM   0x00010000  ///< Mem manage fault enable
00780 #define NVIC_SYS_HND_CTRL_SVC   0x00008000  ///< SVCall is pended
00781 #define NVIC_SYS_HND_CTRL_BUSP  0x00004000  ///< Bus fault is pended
00782 #define NVIC_SYS_HND_CTRL_TICK  0x00000800  ///< Sys tick is active
00783 #define NVIC_SYS_HND_CTRL_PNDSV 0x00000400  ///< PendSV is active
00784 #define NVIC_SYS_HND_CTRL_MON   0x00000100  ///< Monitor is active
00785 #define NVIC_SYS_HND_CTRL_SVCA  0x00000080  ///< SVCall is active
00786 #define NVIC_SYS_HND_CTRL_USGA  0x00000008  ///< Usage fault is active
00787 #define NVIC_SYS_HND_CTRL_BUSA  0x00000002  ///< Bus fault is active
00788 #define NVIC_SYS_HND_CTRL_MEMA  0x00000001  ///< Mem manage is active
00789 /*\}*/
00790
00795 /*\{*/
00796 #define NVIC_FAULT_STAT_DIV0    0x02000000  ///< Divide by zero fault
00797 #define NVIC_FAULT_STAT_UNALIGN 0x01000000  ///< Unaligned access fault
00798 #define NVIC_FAULT_STAT_NOCP    0x00080000  ///< No coprocessor fault
00799 #define NVIC_FAULT_STAT_INVPC   0x00040000  ///< Invalid PC fault
00800 #define NVIC_FAULT_STAT_INVSTAT 0x00020000  ///< Invalid state fault
00801 #define NVIC_FAULT_STAT_UNDEF   0x00010000  ///< Undefined instruction fault
00802 #define NVIC_FAULT_STAT_BFARV   0x00008000  ///< BFAR is valid
00803 #define NVIC_FAULT_STAT_BSTKE   0x00001000  ///< Stack bus fault
00804 #define NVIC_FAULT_STAT_BUSTKE  0x00000800  ///< Unstack bus fault
00805 #define NVIC_FAULT_STAT_IMPRE   0x00000400  ///< Imprecise data bus error
00806 #define NVIC_FAULT_STAT_PRECISE 0x00000200  ///< Precise data bus error
00807 #define NVIC_FAULT_STAT_IBUS    0x00000100  ///< Instruction bus fault
00808 #define NVIC_FAULT_STAT_MMARV   0x00000080  ///< MMAR is valid
00809 #define NVIC_FAULT_STAT_MSTKE   0x00000010  ///< Stack access violation
00810 #define NVIC_FAULT_STAT_MUSTKE  0x00000008  ///< Unstack access violation
00811 #define NVIC_FAULT_STAT_DERR    0x00000002  ///< Data access violation
00812 #define NVIC_FAULT_STAT_IERR    0x00000001  ///< Instruction access violation
00813 /*\}*/
00814
00819 /*\{*/
00820 #define NVIC_HFAULT_STAT_DBG    0x80000000  ///< Debug event
00821 #define NVIC_HFAULT_STAT_FORCED 0x40000000  ///< Cannot execute fault handler
00822 #define NVIC_HFAULT_STAT_VECT   0x00000002  ///< Vector table read fault
00823 /*\}*/
00824
00829 /*\{*/
00830 #define NVIC_DEBUG_STAT_EXTRNL  0x00000010  ///< EDBGRQ asserted
00831 #define NVIC_DEBUG_STAT_VCATCH  0x00000008  ///< Vector catch
00832 #define NVIC_DEBUG_STAT_DWTTRAP 0x00000004  ///< DWT match
00833 #define NVIC_DEBUG_STAT_BKPT    0x00000002  ///< Breakpoint instruction
00834 #define NVIC_DEBUG_STAT_HALTED  0x00000001  ///< Halt request
00835 /*\}*/
00836
00840 /*\{*/
00841 #define NVIC_MM_ADDR_M          0xFFFFFFFF  ///< Data fault address
00842 #define NVIC_MM_ADDR_S          0
00843 /*\}*/
00844
00849 /*\{*/
00850 #define NVIC_FAULT_ADDR_M       0xFFFFFFFF  ///< Data bus fault address
00851 #define NVIC_FAULT_ADDR_S       0
00852 /*\}*/
00853
00857 /*\{*/
00858 #define NVIC_MPU_TYPE_IREGION_M 0x00FF0000  ///< Number of I regions
00859 #define NVIC_MPU_TYPE_DREGION_M 0x0000FF00  ///< Number of D regions
00860 #define NVIC_MPU_TYPE_SEPARATE  0x00000001  ///< Separate or unified MPU
00861 #define NVIC_MPU_TYPE_IREGION_S 16
00862 #define NVIC_MPU_TYPE_DREGION_S 8
00863 /*\}*/
00864
00868 /*\{*/
00869 #define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004  ///< MPU default region in priv mode
00870 #define NVIC_MPU_CTRL_HFNMIENA  0x00000002  ///< MPU enabled during faults
00871 #define NVIC_MPU_CTRL_ENABLE    0x00000001  ///< MPU enable
00872 /*\}*/
00873
00878 /*\{*/
00879 #define NVIC_MPU_NUMBER_M       0x000000FF  ///< MPU region to access
00880 #define NVIC_MPU_NUMBER_S       0
00881 /*\}*/
00882
00886 /*\{*/
00887 #define NVIC_MPU_BASE_ADDR_M    0xFFFFFFE0  ///< Base address mask
00888 #define NVIC_MPU_BASE_VALID     0x00000010  ///< Region number valid
00889 #define NVIC_MPU_BASE_REGION_M  0x0000000F  ///< Region number
00890 #define NVIC_MPU_BASE_ADDR_S    8
00891 #define NVIC_MPU_BASE_REGION_S  0
00892 /*\}*/
00893
00897 /*\{*/
00898 #define NVIC_MPU_ATTR_M         0xFFFF0000  ///< Attributes
00899 #define NVIC_MPU_ATTR_AP_NO_NO  0x00000000  ///< prv: no access, usr: no access
00900 #define NVIC_MPU_ATTR_BUFFRABLE 0x00010000  ///< Bufferable
00901 #define NVIC_MPU_ATTR_CACHEABLE 0x00020000  ///< Cacheable
00902 #define NVIC_MPU_ATTR_SHAREABLE 0x00040000  ///< Shareable
00903 #define NVIC_MPU_ATTR_TEX_M     0x00380000  ///< Type extension mask
00904 #define NVIC_MPU_ATTR_AP_RW_NO  0x01000000  ///< prv: rw, usr: none
00905 #define NVIC_MPU_ATTR_AP_RW_RO  0x02000000  ///< prv: rw, usr: read-only
00906 #define NVIC_MPU_ATTR_AP_RW_RW  0x03000000  ///< prv: rw, usr: rw
00907 #define NVIC_MPU_ATTR_AP_RO_NO  0x05000000  ///< prv: ro, usr: none
00908 #define NVIC_MPU_ATTR_AP_RO_RO  0x06000000  ///< prv: ro, usr: ro
00909 #define NVIC_MPU_ATTR_AP_M      0x07000000  ///< Access permissions mask
00910 #define NVIC_MPU_ATTR_XN        0x10000000  ///< Execute disable
00911 #define NVIC_MPU_ATTR_SRD_M     0x0000FF00  ///< Sub-region disable mask
00912 #define NVIC_MPU_ATTR_SRD_0     0x00000100  ///< Sub-region 0 disable
00913 #define NVIC_MPU_ATTR_SRD_1     0x00000200  ///< Sub-region 1 disable
00914 #define NVIC_MPU_ATTR_SRD_2     0x00000400  ///< Sub-region 2 disable
00915 #define NVIC_MPU_ATTR_SRD_3     0x00000800  ///< Sub-region 3 disable
00916 #define NVIC_MPU_ATTR_SRD_4     0x00001000  ///< Sub-region 4 disable
00917 #define NVIC_MPU_ATTR_SRD_5     0x00002000  ///< Sub-region 5 disable
00918 #define NVIC_MPU_ATTR_SRD_6     0x00004000  ///< Sub-region 6 disable
00919 #define NVIC_MPU_ATTR_SRD_7     0x00008000  ///< Sub-region 7 disable
00920 #define NVIC_MPU_ATTR_SIZE_M    0x0000003E  ///< Region size mask
00921 #define NVIC_MPU_ATTR_SIZE_32B  0x00000008  ///< Region size 32 bytes
00922 #define NVIC_MPU_ATTR_SIZE_64B  0x0000000A  ///< Region size 64 bytes
00923 #define NVIC_MPU_ATTR_SIZE_128B 0x0000000C  ///< Region size 128 bytes
00924 #define NVIC_MPU_ATTR_SIZE_256B 0x0000000E  ///< Region size 256 bytes
00925 #define NVIC_MPU_ATTR_SIZE_512B 0x00000010  ///< Region size 512 bytes
00926 #define NVIC_MPU_ATTR_SIZE_1K   0x00000012  ///< Region size 1 Kbytes
00927 #define NVIC_MPU_ATTR_SIZE_2K   0x00000014  ///< Region size 2 Kbytes
00928 #define NVIC_MPU_ATTR_SIZE_4K   0x00000016  ///< Region size 4 Kbytes
00929 #define NVIC_MPU_ATTR_SIZE_8K   0x00000018  ///< Region size 8 Kbytes
00930 #define NVIC_MPU_ATTR_SIZE_16K  0x0000001A  ///< Region size 16 Kbytes
00931 #define NVIC_MPU_ATTR_SIZE_32K  0x0000001C  ///< Region size 32 Kbytes
00932 #define NVIC_MPU_ATTR_SIZE_64K  0x0000001E  ///< Region size 64 Kbytes
00933 #define NVIC_MPU_ATTR_SIZE_128K 0x00000020  ///< Region size 128 Kbytes
00934 #define NVIC_MPU_ATTR_SIZE_256K 0x00000022  ///< Region size 256 Kbytes
00935 #define NVIC_MPU_ATTR_SIZE_512K 0x00000024  ///< Region size 512 Kbytes
00936 #define NVIC_MPU_ATTR_SIZE_1M   0x00000026  ///< Region size 1 Mbytes
00937 #define NVIC_MPU_ATTR_SIZE_2M   0x00000028  ///< Region size 2 Mbytes
00938 #define NVIC_MPU_ATTR_SIZE_4M   0x0000002A  ///< Region size 4 Mbytes
00939 #define NVIC_MPU_ATTR_SIZE_8M   0x0000002C  ///< Region size 8 Mbytes
00940 #define NVIC_MPU_ATTR_SIZE_16M  0x0000002E  ///< Region size 16 Mbytes
00941 #define NVIC_MPU_ATTR_SIZE_32M  0x00000030  ///< Region size 32 Mbytes
00942 #define NVIC_MPU_ATTR_SIZE_64M  0x00000032  ///< Region size 64 Mbytes
00943 #define NVIC_MPU_ATTR_SIZE_128M 0x00000034  ///< Region size 128 Mbytes
00944 #define NVIC_MPU_ATTR_SIZE_256M 0x00000036  ///< Region size 256 Mbytes
00945 #define NVIC_MPU_ATTR_SIZE_512M 0x00000038  ///< Region size 512 Mbytes
00946 #define NVIC_MPU_ATTR_SIZE_1G   0x0000003A  ///< Region size 1 Gbytes
00947 #define NVIC_MPU_ATTR_SIZE_2G   0x0000003C  ///< Region size 2 Gbytes
00948 #define NVIC_MPU_ATTR_SIZE_4G   0x0000003E  ///< Region size 4 Gbytes
00949 #define NVIC_MPU_ATTR_ENABLE    0x00000001  ///< Region enable
00950 /*\}*/
00951
00955 /*\{*/
00956 #define NVIC_DBG_CTRL_DBGKEY_M  0xFFFF0000  ///< Debug key mask
00957 #define NVIC_DBG_CTRL_DBGKEY    0xA05F0000  ///< Debug key
00958 #define NVIC_DBG_CTRL_S_RESET_ST \
00959                                 0x02000000  ///< Core has reset since last read
00960 #define NVIC_DBG_CTRL_S_RETIRE_ST \
00961                                 0x01000000  ///< Core has executed insruction
00962
00963 #define NVIC_DBG_CTRL_S_LOCKUP  0x00080000  ///< Core is locked up
00964 #define NVIC_DBG_CTRL_S_SLEEP   0x00040000  ///< Core is sleeping
00965 #define NVIC_DBG_CTRL_S_HALT    0x00020000  ///< Core status on halt
00966 #define NVIC_DBG_CTRL_S_REGRDY  0x00010000  ///< Register read/write available
00967 #define NVIC_DBG_CTRL_C_SNAPSTALL \
00968                                 0x00000020  ///< Breaks a stalled load/store
00969 #define NVIC_DBG_CTRL_C_MASKINT 0x00000008  ///< Mask interrupts when stepping
00970 #define NVIC_DBG_CTRL_C_STEP    0x00000004  ///< Step the core
00971 #define NVIC_DBG_CTRL_C_HALT    0x00000002  ///< Halt the core
00972 #define NVIC_DBG_CTRL_C_DEBUGEN 0x00000001  ///< Enable debug
00973 /*\}*/
00974
00978 /*\{*/
00979 #define NVIC_DBG_XFER_REG_WNR   0x00010000  ///< Write or not read
00980 #define NVIC_DBG_XFER_REG_SEL_M 0x0000001F  ///< Register
00981 #define NVIC_DBG_XFER_REG_CFBP  0x00000014  ///< Control/Fault/BasePri/PriMask
00982 #define NVIC_DBG_XFER_REG_DSP   0x00000013  ///< Deep SP
00983 #define NVIC_DBG_XFER_REG_PSP   0x00000012  ///< Process SP
00984 #define NVIC_DBG_XFER_REG_MSP   0x00000011  ///< Main SP
00985 #define NVIC_DBG_XFER_REG_FLAGS 0x00000010  ///< xPSR/Flags register
00986 #define NVIC_DBG_XFER_REG_R15   0x0000000F  ///< Register R15
00987 #define NVIC_DBG_XFER_REG_R14   0x0000000E  ///< Register R14
00988 #define NVIC_DBG_XFER_REG_R13   0x0000000D  ///< Register R13
00989 #define NVIC_DBG_XFER_REG_R12   0x0000000C  ///< Register R12
00990 #define NVIC_DBG_XFER_REG_R11   0x0000000B  ///< Register R11
00991 #define NVIC_DBG_XFER_REG_R10   0x0000000A  ///< Register R10
00992 #define NVIC_DBG_XFER_REG_R9    0x00000009  ///< Register R9
00993 #define NVIC_DBG_XFER_REG_R8    0x00000008  ///< Register R8
00994 #define NVIC_DBG_XFER_REG_R7    0x00000007  ///< Register R7
00995 #define NVIC_DBG_XFER_REG_R6    0x00000006  ///< Register R6
00996 #define NVIC_DBG_XFER_REG_R5    0x00000005  ///< Register R5
00997 #define NVIC_DBG_XFER_REG_R4    0x00000004  ///< Register R4
00998 #define NVIC_DBG_XFER_REG_R3    0x00000003  ///< Register R3
00999 #define NVIC_DBG_XFER_REG_R2    0x00000002  ///< Register R2
01000 #define NVIC_DBG_XFER_REG_R1    0x00000001  ///< Register R1
01001 #define NVIC_DBG_XFER_REG_R0    0x00000000  ///< Register R0
01002 /*\}*/
01003
01007 /*\{*/
01008 #define NVIC_DBG_DATA_M         0xFFFFFFFF  ///< Data temporary cache
01009 #define NVIC_DBG_DATA_S         0
01010 /*\}*/
01011
01015 /*\{*/
01016 #define NVIC_DBG_INT_HARDERR    0x00000400  ///< Debug trap on hard fault
01017 #define NVIC_DBG_INT_INTERR     0x00000200  ///< Debug trap on interrupt errors
01018 #define NVIC_DBG_INT_BUSERR     0x00000100  ///< Debug trap on bus error
01019 #define NVIC_DBG_INT_STATERR    0x00000080  ///< Debug trap on usage fault state
01020 #define NVIC_DBG_INT_CHKERR     0x00000040  ///< Debug trap on usage fault check
01021 #define NVIC_DBG_INT_NOCPERR    0x00000020  ///< Debug trap on coprocessor error
01022 #define NVIC_DBG_INT_MMERR      0x00000010  ///< Debug trap on mem manage fault
01023 #define NVIC_DBG_INT_RESET      0x00000008  ///< Core reset status
01024 #define NVIC_DBG_INT_RSTPENDCLR 0x00000004  ///< Clear pending core reset
01025 #define NVIC_DBG_INT_RSTPENDING 0x00000002  ///< Core reset is pending
01026 #define NVIC_DBG_INT_RSTVCATCH  0x00000001  ///< Reset vector catch
01027 /*\}*/
01028
01032 /*\{*/
01033 #define NVIC_SW_TRIG_INTID_M    0x000003FF  ///< Interrupt to trigger
01034 #define NVIC_SW_TRIG_INTID_S    0
01035 /*\}*/
01036
01037 #endif /* LM3S_NVIC_H */


BeRTOS: lm3s_pwm.h File Reference

  • cpu
  • cortex-m3
  • io
Defines
lm3s_pwm.h File Reference

LM3S1968 PWM hardware definitions. More...

Go to the source code of this file.

Defines

#define | PWM_O_CTL (*((reg32_t *)(PWMC_BASE + 0x00000000)))
The following are defines for the PWM register offsets.
#define | PWM_CTL_GLOBALSYNC3 3
Defines for the bit fields in the PWM_O_CTL register.
#define | PWM_SYNC_SYNC3 3
Defines for the bit fields in the PWM_O_SYNC register.
#define | PWM_ENABLE_PWM7EN 7
Defines for the bit fields in the PWM_O_ENABLE register.
#define | PWM_INVERT_PWM7INV 7
Defines for the bit fields in the PWM_O_INVERT register.
#define | PWM_FAULT_FAULT7 7
Defines for the bit fields in the PWM_O_FAULT register.
#define | PWM_INTEN_INTFAULT3 19
Defines for the bit fields in the PWM_O_INTEN register.
#define | PWM_RIS_INTFAULT3 19
Defines for the bit fields in the PWM_O_RIS register.
#define | PWM_ISC_INTFAULT3 19
Defines for the bit fields in the PWM_O_ISC register.
#define | PWM_STATUS_FAULT3 3
Defines for the bit fields in the PWM_O_STATUS register.
#define | PWM_FAULTVAL_PWM7 7
Defines for the bit fields in the PWM_O_FAULTVAL register.
#define | PWM_ENUPD_ENUPD7_M 0x0000C000
Defines for the bit fields in the PWM_O_ENUPD register.
#define | PWM_X_CTL_LATCH 0x00040000
Defines for the bit fields in the PWM_O_X_CTL register.
#define | PWM_X_INTEN_TRCMPBD 0x00002000
Defines for the bit fields in the PWM_O_X_INTEN register.
#define | PWM_X_RIS_INTCMPBD 0x00000020
Defines for the bit fields in the PWM_O_X_RIS register.
#define | PWM_X_ISC_INTCMPBD 0x00000020
Defines for the bit fields in the PWM_O_X_ISC register.
#define | PWM_X_LOAD_M 0x0000FFFF
Defines for the bit fields in the PWM_O_X_LOAD register.
#define | PWM_X_COUNT_M 0x0000FFFF
Defines for the bit fields in the PWM_O_X_COUNT register.
#define | PWM_X_CMPA_M 0x0000FFFF
Defines for the bit fields in the PWM_O_X_CMPA register.
#define | PWM_X_CMPB_M 0x0000FFFF
Defines for the bit fields in the PWM_O_X_CMPB register.
#define | PWM_X_GENA_ACTCMPBD_M 0x00000C00
Defines for the bit fields in the PWM_O_X_GENA register.
#define | PWM_X_GENB_ACTCMPBD_M 0x00000C00
Defines for the bit fields in the PWM_O_X_GENB register.
#define | PWM_X_DBCTL_ENABLE 0x00000001
Defines for the bit fields in the PWM_O_X_DBCTL register.
#define | PWM_X_DBRISE_DELAY_M 0x00000FFF
Defines for the bit fields in the PWM_O_X_DBRISE register.
#define | PWM_X_DBFALL_DELAY_M 0x00000FFF
Defines for the bit fields in the PWM_O_X_DBFALL register.
#define | PWM_X_FLTSRC0_FAULT3 0x00000008
Defines for the bit fields in the PWM_O_X_FLTSRC0 register.
#define | PWM_X_FLTSRC1_DCMP7 0x00000080
The following are defines for the bit fields in the PWM_O_X_FLTSRC1 register.
#define | PWM_X_MINFLTPER_M 0x0000FFFF
Defines for the bit fields in the PWM_O_X_MINFLTPER register.
#define | PWM_X_FLTSEN_FAULT3 0x00000008
Defines for the bit fields in the PWM_O_X_FLTSEN register.
#define | PWM_X_FLTSTAT0_FAULT3 0x00000008
Defines for the bit fields in the PWM_O_X_FLTSTAT0 register.
#define | PWM_X_FLTSTAT1_DCMP7 0x00000080
Defines for the bit fields in the PWM_O_X_FLTSTAT1 register.
#define | PWM_O_X_CTL (*((reg32_t *)(PWMC_BASE + 0x00000000)))
Defines for the PWM Generator standard offsets.
#define | PWM_O_X_FLTSEN (*((reg32_t *)(PWMC_BASE + 0x00000000)))
Defines for the PWM Generator extended offsets.

Detailed Description

LM3S1968 PWM hardware definitions.

Definition in file lm3s_pwm.h.


BeRTOS: lm3s_pwm.h Source File

  • cpu
  • cortex-m3
  • io
lm3s_pwm.h
Go to the documentation of this file.
00001
00036 #ifndef L3MS_PWM_H
00037 #define L3MS_PWM_H
00038
00042 #define PWM_O_CTL               (*((reg32_t *)(PWMC_BASE + 0x00000000)))  //< PWM Master Control
00043 #define PWM_O_SYNC              (*((reg32_t *)(PWMC_BASE + 0x00000004)))  //< PWM Time Base Sync
00044 #define PWM_O_ENABLE            (*((reg32_t *)(PWMC_BASE + 0x00000008)))  //< PWM Output Enable
00045 #define PWM_O_INVERT            (*((reg32_t *)(PWMC_BASE + 0x0000000C)))  //< PWM Output Inversion
00046 #define PWM_O_FAULT             (*((reg32_t *)(PWMC_BASE + 0x00000010)))  //< PWM Output Fault
00047 #define PWM_O_INTEN             (*((reg32_t *)(PWMC_BASE + 0x00000014)))  //< PWM Interrupt Enable
00048 #define PWM_O_RIS               (*((reg32_t *)(PWMC_BASE + 0x00000018)))  //< PWM Raw Interrupt Status
00049 #define PWM_O_ISC               (*((reg32_t *)(PWMC_BASE + 0x0000001C)))  //< PWM Interrupt Status and Clear
00050 #define PWM_O_STATUS            (*((reg32_t *)(PWMC_BASE + 0x00000020)))  //< PWM Status
00051 #define PWM_O_FAULTVAL          (*((reg32_t *)(PWMC_BASE + 0x00000024)))  //< PWM Fault Condition Value
00052 #define PWM_O_ENUPD             (*((reg32_t *)(PWMC_BASE + 0x00000028)))  //< PWM Enable Update
00053 #define PWM_O_0_CTL             (*((reg32_t *)(PWMC_BASE + 0x00000040)))  //< PWM0 Control
00054 #define PWM_O_0_INTEN           (*((reg32_t *)(PWMC_BASE + 0x00000044)))  //< PWM0 Interrupt and Trigger Enable
00055 #define PWM_O_0_RIS             (*((reg32_t *)(PWMC_BASE + 0x00000048)))  //< PWM0 Raw Interrupt Status
00056 #define PWM_O_0_ISC             (*((reg32_t *)(PWMC_BASE + 0x0000004C)))  //< PWM0 Interrupt Status and Clear
00057 #define PWM_O_0_LOAD            (*((reg32_t *)(PWMC_BASE + 0x00000050)))  //< PWM0 Load
00058 #define PWM_O_0_COUNT           (*((reg32_t *)(PWMC_BASE + 0x00000054)))  //< PWM0 Counter
00059 #define PWM_O_0_CMPA            (*((reg32_t *)(PWMC_BASE + 0x00000058)))  //< PWM0 Compare A
00060 #define PWM_O_0_CMPB            (*((reg32_t *)(PWMC_BASE + 0x0000005C)))  //< PWM0 Compare B
00061 #define PWM_O_0_GENA            (*((reg32_t *)(PWMC_BASE + 0x00000060)))  //< PWM0 Generator A Control
00062 #define PWM_O_0_GENB            (*((reg32_t *)(PWMC_BASE + 0x00000064)))  //< PWM0 Generator B Control
00063 #define PWM_O_0_DBCTL           (*((reg32_t *)(PWMC_BASE + 0x00000068)))  //< PWM0 Dead-Band Control
00064 #define PWM_O_0_DBRISE          (*((reg32_t *)(PWMC_BASE + 0x0000006C)))  //< PWM0 Dead-Band Rising-Edge Delay
00065 #define PWM_O_0_DBFALL          (*((reg32_t *)(PWMC_BASE + 0x00000070)))  //< PWM0 Dead-Band Falling-Edge-Delay
00066 #define PWM_O_0_FLTSRC0         (*((reg32_t *)(PWMC_BASE + 0x00000074)))  //< PWM0 Fault Source 0
00067 #define PWM_O_0_FLTSRC1         (*((reg32_t *)(PWMC_BASE + 0x00000078)))  //< PWM0 Fault Source 1
00068 #define PWM_O_0_MINFLTPER       (*((reg32_t *)(PWMC_BASE + 0x0000007C)))  //< PWM0 Minimum Fault Period
00069 #define PWM_O_1_CTL             (*((reg32_t *)(PWMC_BASE + 0x00000080)))  //< PWM1 Control
00070 #define PWM_O_1_INTEN           (*((reg32_t *)(PWMC_BASE + 0x00000084)))  //< PWM1 Interrupt and Trigger Enable
00071 #define PWM_O_1_RIS             (*((reg32_t *)(PWMC_BASE + 0x00000088)))  //< PWM1 Raw Interrupt Status
00072 #define PWM_O_1_ISC             (*((reg32_t *)(PWMC_BASE + 0x0000008C)))  //< PWM1 Interrupt Status and Clear
00073 #define PWM_O_1_LOAD            (*((reg32_t *)(PWMC_BASE + 0x00000090)))  //< PWM1 Load
00074 #define PWM_O_1_COUNT           (*((reg32_t *)(PWMC_BASE + 0x00000094)))  //< PWM1 Counter
00075 #define PWM_O_1_CMPA            (*((reg32_t *)(PWMC_BASE + 0x00000098)))  //< PWM1 Compare A
00076 #define PWM_O_1_CMPB            (*((reg32_t *)(PWMC_BASE + 0x0000009C)))  //< PWM1 Compare B
00077 #define PWM_O_1_GENA            (*((reg32_t *)(PWMC_BASE + 0x000000A0)))  //< PWM1 Generator A Control
00078 #define PWM_O_1_GENB            (*((reg32_t *)(PWMC_BASE + 0x000000A4)))  //< PWM1 Generator B Control
00079 #define PWM_O_1_DBCTL           (*((reg32_t *)(PWMC_BASE + 0x000000A8)))  //< PWM1 Dead-Band Control
00080 #define PWM_O_1_DBRISE          (*((reg32_t *)(PWMC_BASE + 0x000000AC)))  //< PWM1 Dead-Band Rising-Edge Delay
00081 #define PWM_O_1_DBFALL          (*((reg32_t *)(PWMC_BASE + 0x000000B0)))  //< PWM1 Dead-Band Falling-Edge-Delay
00082 #define PWM_O_1_FLTSRC0         (*((reg32_t *)(PWMC_BASE + 0x000000B4)))  //< PWM1 Fault Source 0
00083 #define PWM_O_1_FLTSRC1         (*((reg32_t *)(PWMC_BASE + 0x000000B8)))  //< PWM1 Fault Source 1
00084 #define PWM_O_1_MINFLTPER       (*((reg32_t *)(PWMC_BASE + 0x000000BC)))  //< PWM1 Minimum Fault Period
00085 #define PWM_O_2_CTL             (*((reg32_t *)(PWMC_BASE + 0x000000C0)))  //< PWM2 Control
00086 #define PWM_O_2_INTEN           (*((reg32_t *)(PWMC_BASE + 0x000000C4)))  //< PWM2 Interrupt and Trigger Enable
00087 #define PWM_O_2_RIS             (*((reg32_t *)(PWMC_BASE + 0x000000C8)))  //< PWM2 Raw Interrupt Status
00088 #define PWM_O_2_ISC             (*((reg32_t *)(PWMC_BASE + 0x000000CC)))  //< PWM2 Interrupt Status and Clear
00089 #define PWM_O_2_LOAD            (*((reg32_t *)(PWMC_BASE + 0x000000D0)))  //< PWM2 Load
00090 #define PWM_O_2_COUNT           (*((reg32_t *)(PWMC_BASE + 0x000000D4)))  //< PWM2 Counter
00091 #define PWM_O_2_CMPA            (*((reg32_t *)(PWMC_BASE + 0x000000D8)))  //< PWM2 Compare A
00092 #define PWM_O_2_CMPB            (*((reg32_t *)(PWMC_BASE + 0x000000DC)))  //< PWM2 Compare B
00093 #define PWM_O_2_GENA            (*((reg32_t *)(PWMC_BASE + 0x000000E0)))  //< PWM2 Generator A Control
00094 #define PWM_O_2_GENB            (*((reg32_t *)(PWMC_BASE + 0x000000E4)))  //< PWM2 Generator B Control
00095 #define PWM_O_2_DBCTL           (*((reg32_t *)(PWMC_BASE + 0x000000E8)))  //< PWM2 Dead-Band Control
00096 #define PWM_O_2_DBRISE          (*((reg32_t *)(PWMC_BASE + 0x000000EC)))  //< PWM2 Dead-Band Rising-Edge Delay
00097 #define PWM_O_2_DBFALL          (*((reg32_t *)(PWMC_BASE + 0x000000F0)))  //< PWM2 Dead-Band Falling-Edge-Delay
00098 #define PWM_O_2_FLTSRC0         (*((reg32_t *)(PWMC_BASE + 0x000000F4)))  //< PWM2 Fault Source 0
00099 #define PWM_O_2_FLTSRC1         (*((reg32_t *)(PWMC_BASE + 0x000000F8)))  //< PWM2 Fault Source 1
00100 #define PWM_O_2_MINFLTPER       (*((reg32_t *)(PWMC_BASE + 0x000000FC)))  //< PWM2 Minimum Fault Period
00101 #define PWM_O_3_CTL             (*((reg32_t *)(PWMC_BASE + 0x00000100)))  //< PWM3 Control
00102 #define PWM_O_3_INTEN           (*((reg32_t *)(PWMC_BASE + 0x00000104)))  //< PWM3 Interrupt and Trigger Enable
00103 #define PWM_O_3_RIS             (*((reg32_t *)(PWMC_BASE + 0x00000108)))  //< PWM3 Raw Interrupt Status
00104 #define PWM_O_3_ISC             (*((reg32_t *)(PWMC_BASE + 0x0000010C)))  //< PWM3 Interrupt Status and Clear
00105 #define PWM_O_3_LOAD            (*((reg32_t *)(PWMC_BASE + 0x00000110)))  //< PWM3 Load
00106 #define PWM_O_3_COUNT           (*((reg32_t *)(PWMC_BASE + 0x00000114)))  //< PWM3 Counter
00107 #define PWM_O_3_CMPA            (*((reg32_t *)(PWMC_BASE + 0x00000118)))  //< PWM3 Compare A
00108 #define PWM_O_3_CMPB            (*((reg32_t *)(PWMC_BASE + 0x0000011C)))  //< PWM3 Compare B
00109 #define PWM_O_3_GENA            (*((reg32_t *)(PWMC_BASE + 0x00000120)))  //< PWM3 Generator A Control
00110 #define PWM_O_3_GENB            (*((reg32_t *)(PWMC_BASE + 0x00000124)))  //< PWM3 Generator B Control
00111 #define PWM_O_3_DBCTL           (*((reg32_t *)(PWMC_BASE + 0x00000128)))  //< PWM3 Dead-Band Control
00112 #define PWM_O_3_DBRISE          (*((reg32_t *)(PWMC_BASE + 0x0000012C)))  //< PWM3 Dead-Band Rising-Edge Delay
00113 #define PWM_O_3_DBFALL          (*((reg32_t *)(PWMC_BASE + 0x00000130)))  //< PWM3 Dead-Band Falling-Edge-Delay
00114 #define PWM_O_3_FLTSRC0         (*((reg32_t *)(PWMC_BASE + 0x00000134)))  //< PWM3 Fault Source 0
00115 #define PWM_O_3_FLTSRC1         (*((reg32_t *)(PWMC_BASE + 0x00000138)))  //< PWM3 Fault Source 1
00116 #define PWM_O_3_MINFLTPER       (*((reg32_t *)(PWMC_BASE + 0x0000013C)))  //< PWM3 Minimum Fault Period
00117 #define PWM_O_0_FLTSEN          (*((reg32_t *)(PWMC_BASE + 0x00000800)))  //< PWM0 Fault Pin Logic Sense
00118 #define PWM_O_0_FLTSTAT0        (*((reg32_t *)(PWMC_BASE + 0x00000804)))  //< PWM0 Fault Status 0
00119 #define PWM_O_0_FLTSTAT1        (*((reg32_t *)(PWMC_BASE + 0x00000808)))  //< PWM0 Fault Status 1
00120 #define PWM_O_1_FLTSEN          (*((reg32_t *)(PWMC_BASE + 0x00000880)))  //< PWM1 Fault Pin Logic Sense
00121 #define PWM_O_1_FLTSTAT0        (*((reg32_t *)(PWMC_BASE + 0x00000884)))  //< PWM1 Fault Status 0
00122 #define PWM_O_1_FLTSTAT1        (*((reg32_t *)(PWMC_BASE + 0x00000888)))  //< PWM1 Fault Status 1
00123 #define PWM_O_2_FLTSEN          (*((reg32_t *)(PWMC_BASE + 0x00000900)))  //< PWM2 Fault Pin Logic Sense
00124 #define PWM_O_2_FLTSTAT0        (*((reg32_t *)(PWMC_BASE + 0x00000904)))  //< PWM2 Fault Status 0
00125 #define PWM_O_2_FLTSTAT1        (*((reg32_t *)(PWMC_BASE + 0x00000908)))  //< PWM2 Fault Status 1
00126 #define PWM_O_3_FLTSEN          (*((reg32_t *)(PWMC_BASE + 0x00000980)))  //< PWM3 Fault Pin Logic Sense
00127 #define PWM_O_3_FLTSTAT0        (*((reg32_t *)(PWMC_BASE + 0x00000984)))  //< PWM3 Fault Status 0
00128 #define PWM_O_3_FLTSTAT1        (*((reg32_t *)(PWMC_BASE + 0x00000988)))  //< PWM3 Fault Status 1
00129
00133 #define PWM_CTL_GLOBALSYNC3              3  //< Update PWM Generator 3
00134 #define PWM_CTL_GLOBALSYNC2              2  //< Update PWM Generator 2
00135 #define PWM_CTL_GLOBALSYNC1              1  //< Update PWM Generator 1
00136 #define PWM_CTL_GLOBALSYNC0              0  //< Update PWM Generator 0
00137
00141 #define PWM_SYNC_SYNC3                   3  //< Reset Generator 3 Counter
00142 #define PWM_SYNC_SYNC2                   2  //< Reset Generator 2 Counter
00143 #define PWM_SYNC_SYNC1                   1  //< Reset Generator 1 Counter
00144 #define PWM_SYNC_SYNC0                   0  //< Reset Generator 0 Counter
00145
00149 #define PWM_ENABLE_PWM7EN                7  //< PWM7 Output Enable
00150 #define PWM_ENABLE_PWM6EN                6  //< PWM6 Output Enable
00151 #define PWM_ENABLE_PWM5EN                5  //< PWM5 Output Enable
00152 #define PWM_ENABLE_PWM4EN                4  //< PWM4 Output Enable
00153 #define PWM_ENABLE_PWM3EN                3  //< PWM3 Output Enable
00154 #define PWM_ENABLE_PWM2EN                2  //< PWM2 Output Enable
00155 #define PWM_ENABLE_PWM1EN                1  //< PWM1 Output Enable
00156 #define PWM_ENABLE_PWM0EN                0  //< PWM0 Output Enable
00157
00161 #define PWM_INVERT_PWM7INV               7  //< Invert PWM7 Signal
00162 #define PWM_INVERT_PWM6INV               6  //< Invert PWM6 Signal
00163 #define PWM_INVERT_PWM5INV               5  //< Invert PWM5 Signal
00164 #define PWM_INVERT_PWM4INV               4  //< Invert PWM4 Signal
00165 #define PWM_INVERT_PWM3INV               3  //< Invert PWM3 Signal
00166 #define PWM_INVERT_PWM2INV               2  //< Invert PWM2 Signal
00167 #define PWM_INVERT_PWM1INV               1  //< Invert PWM1 Signal
00168 #define PWM_INVERT_PWM0INV               0  //< Invert PWM0 Signal
00169
00173 #define PWM_FAULT_FAULT7                 7  //< PWM7 Fault
00174 #define PWM_FAULT_FAULT6                 6  //< PWM6 Fault
00175 #define PWM_FAULT_FAULT5                 5  //< PWM5 Fault
00176 #define PWM_FAULT_FAULT4                 4  //< PWM4 Fault
00177 #define PWM_FAULT_FAULT3                 3  //< PWM3 Fault
00178 #define PWM_FAULT_FAULT2                 2  //< PWM2 Fault
00179 #define PWM_FAULT_FAULT1                 1  //< PWM1 Fault
00180 #define PWM_FAULT_FAULT0                 0  //< PWM0 Fault
00181
00185 #define PWM_INTEN_INTFAULT3             19  //< Interrupt Fault 3
00186 #define PWM_INTEN_INTFAULT2             18  //< Interrupt Fault 2
00187 #define PWM_INTEN_INTFAULT1             17  //< Interrupt Fault 1
00188 #define PWM_INTEN_INTFAULT              16  //< Fault Interrupt Enable
00189 #define PWM_INTEN_INTFAULT0             16  //< Interrupt Fault 0
00190 #define PWM_INTEN_INTPWM3                3  //< PWM3 Interrupt Enable
00191 #define PWM_INTEN_INTPWM2                2  //< PWM2 Interrupt Enable
00192 #define PWM_INTEN_INTPWM1                1  //< PWM1 Interrupt Enable
00193 #define PWM_INTEN_INTPWM0                0  //< PWM0 Interrupt Enable
00194
00198 #define PWM_RIS_INTFAULT3               19  //< Interrupt Fault PWM 3
00199 #define PWM_RIS_INTFAULT2               18  //< Interrupt Fault PWM 2
00200 #define PWM_RIS_INTFAULT1               17  //< Interrupt Fault PWM 1
00201 #define PWM_RIS_INTFAULT0               16  //< Interrupt Fault PWM 0
00202 #define PWM_RIS_INTFAULT                16  //< Fault Interrupt Asserted
00203 #define PWM_RIS_INTPWM3                  3  //< PWM3 Interrupt Asserted
00204 #define PWM_RIS_INTPWM2                  2  //< PWM2 Interrupt Asserted
00205 #define PWM_RIS_INTPWM1                  1  //< PWM1 Interrupt Asserted
00206 #define PWM_RIS_INTPWM0                  0  //< PWM0 Interrupt Asserted
00207
00211 #define PWM_ISC_INTFAULT3               19   //< FAULT3 Interrupt Asserted
00212 #define PWM_ISC_INTFAULT2               18  //< FAULT2 Interrupt Asserted
00213 #define PWM_ISC_INTFAULT1               17  //< FAULT1 Interrupt Asserted
00214 #define PWM_ISC_INTFAULT                16  //< Fault Interrupt Asserted
00215 #define PWM_ISC_INTFAULT0               16  //< FAULT0 Interrupt Asserted
00216 #define PWM_ISC_INTPWM3                  3  //< PWM3 Interrupt Status
00217 #define PWM_ISC_INTPWM2                  2  //< PWM2 Interrupt Status
00218 #define PWM_ISC_INTPWM1                  1  //< PWM1 Interrupt Status
00219 #define PWM_ISC_INTPWM0                  0  //< PWM0 Interrupt Status
00220
00224 #define PWM_STATUS_FAULT3                3  //< Generator 3 Fault Status
00225 #define PWM_STATUS_FAULT2                2  //< Generator 2 Fault Status
00226 #define PWM_STATUS_FAULT1                1  //< Generator 1 Fault Status
00227 #define PWM_STATUS_FAULT0                0  //< Generator 0 Fault Status
00228
00232 #define PWM_FAULTVAL_PWM7                7  //< PWM7 Fault Value
00233 #define PWM_FAULTVAL_PWM6                6  //< PWM6 Fault Value
00234 #define PWM_FAULTVAL_PWM5                5  //< PWM5 Fault Value
00235 #define PWM_FAULTVAL_PWM4                4  //< PWM4 Fault Value
00236 #define PWM_FAULTVAL_PWM3                3  //< PWM3 Fault Value
00237 #define PWM_FAULTVAL_PWM2                2  //< PWM2 Fault Value
00238 #define PWM_FAULTVAL_PWM1                1  //< PWM1 Fault Value
00239 #define PWM_FAULTVAL_PWM0                0  //< PWM0 Fault Value
00240
00244 #define PWM_ENUPD_ENUPD7_M      0x0000C000  //< PWM7 Enable Update Mode
00245 #define PWM_ENUPD_ENUPD7_IMM    0x00000000  //< Immediate
00246 #define PWM_ENUPD_ENUPD7_LSYNC  0x00008000  //< Locally Synchronized
00247 #define PWM_ENUPD_ENUPD7_GSYNC  0x0000C000  //< Globally Synchronized
00248 #define PWM_ENUPD_ENUPD6_M      0x00003000  //< PWM6 Enable Update Mode
00249 #define PWM_ENUPD_ENUPD6_IMM    0x00000000  //< Immediate
00250 #define PWM_ENUPD_ENUPD6_LSYNC  0x00002000  //< Locally Synchronized
00251 #define PWM_ENUPD_ENUPD6_GSYNC  0x00003000  //< Globally Synchronized
00252 #define PWM_ENUPD_ENUPD5_M      0x00000C00  //< PWM5 Enable Update Mode
00253 #define PWM_ENUPD_ENUPD5_IMM    0x00000000  //< Immediate
00254 #define PWM_ENUPD_ENUPD5_LSYNC  0x00000800  //< Locally Synchronized
00255 #define PWM_ENUPD_ENUPD5_GSYNC  0x00000C00  //< Globally Synchronized
00256 #define PWM_ENUPD_ENUPD4_M      0x00000300  //< PWM4 Enable Update Mode
00257 #define PWM_ENUPD_ENUPD4_IMM    0x00000000  //< Immediate
00258 #define PWM_ENUPD_ENUPD4_LSYNC  0x00000200  //< Locally Synchronized
00259 #define PWM_ENUPD_ENUPD4_GSYNC  0x00000300  //< Globally Synchronized
00260 #define PWM_ENUPD_ENUPD3_M      0x000000C0  //< PWM3 Enable Update Mode
00261 #define PWM_ENUPD_ENUPD3_IMM    0x00000000  //< Immediate
00262 #define PWM_ENUPD_ENUPD3_LSYNC  0x00000080  //< Locally Synchronized
00263 #define PWM_ENUPD_ENUPD3_GSYNC  0x000000C0  //< Globally Synchronized
00264 #define PWM_ENUPD_ENUPD2_M      0x00000030  //< PWM2 Enable Update Mode
00265 #define PWM_ENUPD_ENUPD2_IMM    0x00000000  //< Immediate
00266 #define PWM_ENUPD_ENUPD2_LSYNC  0x00000020  //< Locally Synchronized
00267 #define PWM_ENUPD_ENUPD2_GSYNC  0x00000030  //< Globally Synchronized
00268 #define PWM_ENUPD_ENUPD1_M      0x0000000C  //< PWM1 Enable Update Mode
00269 #define PWM_ENUPD_ENUPD1_IMM    0x00000000  //< Immediate
00270 #define PWM_ENUPD_ENUPD1_LSYNC  0x00000008  //< Locally Synchronized
00271 #define PWM_ENUPD_ENUPD1_GSYNC  0x0000000C  //< Globally Synchronized
00272 #define PWM_ENUPD_ENUPD0_M      0x00000003  //< PWM0 Enable Update Mode
00273 #define PWM_ENUPD_ENUPD0_IMM    0x00000000  //< Immediate
00274 #define PWM_ENUPD_ENUPD0_LSYNC  0x00000002  //< Locally Synchronized
00275 #define PWM_ENUPD_ENUPD0_GSYNC  0x00000003  //< Globally Synchronized
00276
00280 #define PWM_X_CTL_LATCH         0x00040000  //< Latch Fault Input
00281 #define PWM_X_CTL_MINFLTPER     0x00020000  //< Minimum Fault Period
00282 #define PWM_X_CTL_FLTSRC        0x00010000  //< Fault Condition Source
00283 #define PWM_X_CTL_DBFALLUPD_M   0x0000C000  //< PWMnDBFALL Update Mode
00284 #define PWM_X_CTL_DBFALLUPD_I   0x00000000  //< Immediate
00285 #define PWM_X_CTL_DBFALLUPD_LS  0x00008000  //< Locally Synchronized
00286 #define PWM_X_CTL_DBFALLUPD_GS  0x0000C000  //< Globally Synchronized
00287 #define PWM_X_CTL_DBRISEUPD_M   0x00003000  //< PWMnDBRISE Update Mode
00288 #define PWM_X_CTL_DBRISEUPD_I   0x00000000  //< Immediate
00289 #define PWM_X_CTL_DBRISEUPD_LS  0x00002000  //< Locally Synchronized
00290 #define PWM_X_CTL_DBRISEUPD_GS  0x00003000  //< Globally Synchronized
00291 #define PWM_X_CTL_DBCTLUPD_M    0x00000C00  //< PWMnDBCTL Update Mode
00292 #define PWM_X_CTL_DBCTLUPD_I    0x00000000  //< Immediate
00293 #define PWM_X_CTL_DBCTLUPD_LS   0x00000800  //< Locally Synchronized
00294 #define PWM_X_CTL_DBCTLUPD_GS   0x00000C00  //< Globally Synchronized
00295 #define PWM_X_CTL_GENBUPD_M     0x00000300  //< PWMnGENB Update Mode
00296 #define PWM_X_CTL_GENBUPD_I     0x00000000  //< Immediate
00297 #define PWM_X_CTL_GENBUPD_LS    0x00000200  //< Locally Synchronized
00298 #define PWM_X_CTL_GENBUPD_GS    0x00000300  //< Globally Synchronized
00299 #define PWM_X_CTL_GENAUPD_M     0x000000C0  //< PWMnGENA Update Mode
00300 #define PWM_X_CTL_GENAUPD_I     0x00000000  //< Immediate
00301 #define PWM_X_CTL_GENAUPD_LS    0x00000080  //< Locally Synchronized
00302 #define PWM_X_CTL_GENAUPD_GS    0x000000C0  //< Globally Synchronized
00303 #define PWM_X_CTL_CMPBUPD       0x00000020  //< Comparator B Update Mode
00304 #define PWM_X_CTL_CMPAUPD       0x00000010  //< Comparator A Update Mode
00305 #define PWM_X_CTL_LOADUPD       0x00000008  //< Load Register Update Mode
00306 #define PWM_X_CTL_DEBUG         0x00000004  //< Debug Mode
00307 #define PWM_X_CTL_MODE          0x00000002  //< Counter Mode
00308 #define PWM_X_CTL_ENABLE        0x00000001  //< PWM Block Enable
00309
00313 #define PWM_X_INTEN_TRCMPBD     0x00002000  //< Trigger for Counter=PWMnCMPB  Down
00314 #define PWM_X_INTEN_TRCMPBU     0x00001000  //< Trigger for Counter=PWMnCMPB Up
00315 #define PWM_X_INTEN_TRCMPAD     0x00000800  //< Trigger for Counter=PWMnCMPA Down
00316 #define PWM_X_INTEN_TRCMPAU     0x00000400  //< Trigger for Counter=PWMnCMPA Up
00317 #define PWM_X_INTEN_TRCNTLOAD   0x00000200  //< Trigger for Counter=PWMnLOAD
00318 #define PWM_X_INTEN_TRCNTZERO   0x00000100  //< Trigger for Counter=0
00319 #define PWM_X_INTEN_INTCMPBD    0x00000020  //< Interrupt for Counter=PWMnCMPB Down
00320 #define PWM_X_INTEN_INTCMPBU    0x00000010  //< Interrupt for Counter=PWMnCMPB Up
00321 #define PWM_X_INTEN_INTCMPAD    0x00000008  //< Interrupt for Counter=PWMnCMPA Down
00322 #define PWM_X_INTEN_INTCMPAU    0x00000004  //< Interrupt for Counter=PWMnCMPA Up
00323 #define PWM_X_INTEN_INTCNTLOAD  0x00000002  //< Interrupt for Counter=PWMnLOAD
00324 #define PWM_X_INTEN_INTCNTZERO  0x00000001  //< Interrupt for Counter=0
00325
00329 #define PWM_X_RIS_INTCMPBD      0x00000020  //< Comparator B Down Interrupt Status
00330 #define PWM_X_RIS_INTCMPBU      0x00000010  //< Comparator B Up Interrupt Status
00331 #define PWM_X_RIS_INTCMPAD      0x00000008  //< Comparator A Down Interrupt Status
00332 #define PWM_X_RIS_INTCMPAU      0x00000004  //< Comparator A Up Interrupt Status
00333 #define PWM_X_RIS_INTCNTLOAD    0x00000002  //< Counter=Load Interrupt Status
00334 #define PWM_X_RIS_INTCNTZERO    0x00000001  //< Counter=0 Interrupt Status
00335
00339 #define PWM_X_ISC_INTCMPBD      0x00000020  //< Comparator B Down Interrupt
00340 #define PWM_X_ISC_INTCMPBU      0x00000010  //< Comparator B Up Interrupt
00341 #define PWM_X_ISC_INTCMPAD      0x00000008  //< Comparator A Down Interrupt
00342 #define PWM_X_ISC_INTCMPAU      0x00000004  //< Comparator A Up Interrupt
00343 #define PWM_X_ISC_INTCNTLOAD    0x00000002  //< Counter=Load Interrupt
00344 #define PWM_X_ISC_INTCNTZERO    0x00000001  //< Counter=0 Interrupt
00345
00349 #define PWM_X_LOAD_M            0x0000FFFF  //< Counter Load Value
00350 #define PWM_X_LOAD_S            0
00351
00355 #define PWM_X_COUNT_M           0x0000FFFF  //< Counter Value
00356 #define PWM_X_COUNT_S           0
00357
00361 #define PWM_X_CMPA_M            0x0000FFFF  //< Comparator A Value
00362 #define PWM_X_CMPA_S            0
00363
00367 #define PWM_X_CMPB_M            0x0000FFFF  //< Comparator B Value
00368 #define PWM_X_CMPB_S            0
00369
00373 #define PWM_X_GENA_ACTCMPBD_M    0x00000C00  //< Action for Comparator B Down
00374 #define PWM_X_GENA_ACTCMPBD_NONE 0x00000000  //< Do nothing
00375 #define PWM_X_GENA_ACTCMPBD_INV  0x00000400  //< Invert pwmA
00376 #define PWM_X_GENA_ACTCMPBD_ZERO 0x00000800  //< Drive pwmA Low
00377 #define PWM_X_GENA_ACTCMPBD_ONE  0x00000C00  //< Drive pwmA High
00378 #define PWM_X_GENA_ACTCMPBU_M    0x00000300  //< Action for Comparator B Up
00379 #define PWM_X_GENA_ACTCMPBU_NONE 0x00000000  //< Do nothing
00380 #define PWM_X_GENA_ACTCMPBU_INV  0x00000100  //< Invert pwmA
00381 #define PWM_X_GENA_ACTCMPBU_ZERO 0x00000200  //< Drive pwmA Low
00382 #define PWM_X_GENA_ACTCMPBU_ONE  0x00000300  //< Drive pwmA High
00383 #define PWM_X_GENA_ACTCMPAD_M    0x000000C0  //< Action for Comparator A Down
00384 #define PWM_X_GENA_ACTCMPAD_NONE 0x00000000  //< Do nothing
00385 #define PWM_X_GENA_ACTCMPAD_INV  0x00000040  //< Invert pwmA
00386 #define PWM_X_GENA_ACTCMPAD_ZERO 0x00000080  //< Drive pwmA Low
00387 #define PWM_X_GENA_ACTCMPAD_ONE  0x000000C0  //< Drive pwmA High
00388 #define PWM_X_GENA_ACTCMPAU_M    0x00000030  //< Action for Comparator A Up
00389 #define PWM_X_GENA_ACTCMPAU_NONE 0x00000000  //< Do nothing
00390 #define PWM_X_GENA_ACTCMPAU_INV  0x00000010  //< Invert pwmA
00391 #define PWM_X_GENA_ACTCMPAU_ZERO 0x00000020  //< Drive pwmA Low
00392 #define PWM_X_GENA_ACTCMPAU_ONE 0x00000030  //< Drive pwmA High
00393 #define PWM_X_GENA_ACTLOAD_M    0x0000000C  //< Action for Counter=LOAD
00394 #define PWM_X_GENA_ACTLOAD_NONE 0x00000000  //< Do nothing
00395 #define PWM_X_GENA_ACTLOAD_INV  0x00000004  //< Invert pwmA
00396 #define PWM_X_GENA_ACTLOAD_ZERO 0x00000008  //< Drive pwmA Low
00397 #define PWM_X_GENA_ACTLOAD_ONE  0x0000000C  //< Drive pwmA High
00398 #define PWM_X_GENA_ACTZERO_M    0x00000003  //< Action for Counter=0
00399 #define PWM_X_GENA_ACTZERO_NONE 0x00000000  //< Do nothing
00400 #define PWM_X_GENA_ACTZERO_INV  0x00000001  //< Invert pwmA
00401 #define PWM_X_GENA_ACTZERO_ZERO 0x00000002  //< Drive pwmA Low
00402 #define PWM_X_GENA_ACTZERO_ONE  0x00000003  //< Drive pwmA High
00403
00407 #define PWM_X_GENB_ACTCMPBD_M   0x00000C00  //< Action for Comparator B Down
00408 #define PWM_X_GENB_ACTCMPBD_NONE 0x00000000  //< Do nothing
00409 #define PWM_X_GENB_ACTCMPBD_INV 0x00000400  //< Invert pwmB
00410 #define PWM_X_GENB_ACTCMPBD_ZERO 0x00000800  //< Drive pwmB Low
00411 #define PWM_X_GENB_ACTCMPBD_ONE 0x00000C00  //< Drive pwmB High
00412 #define PWM_X_GENB_ACTCMPBU_M   0x00000300  //< Action for Comparator B Up
00413 #define PWM_X_GENB_ACTCMPBU_NONE 0x00000000  //< Do nothing
00414 #define PWM_X_GENB_ACTCMPBU_INV 0x00000100  //< Invert pwmB
00415 #define PWM_X_GENB_ACTCMPBU_ZERO 0x00000200  //< Drive pwmB Low
00416 #define PWM_X_GENB_ACTCMPBU_ONE 0x00000300  //< Drive pwmB High
00417 #define PWM_X_GENB_ACTCMPAD_M   0x000000C0  //< Action for Comparator A Down
00418 #define PWM_X_GENB_ACTCMPAD_NONE 0x00000000  //< Do nothing
00419 #define PWM_X_GENB_ACTCMPAD_INV 0x00000040  //< Invert pwmB
00420 #define PWM_X_GENB_ACTCMPAD_ZERO 0x00000080  //< Drive pwmB Low
00421 #define PWM_X_GENB_ACTCMPAD_ONE 0x000000C0  //< Drive pwmB High
00422 #define PWM_X_GENB_ACTCMPAU_M   0x00000030  //< Action for Comparator A Up
00423 #define PWM_X_GENB_ACTCMPAU_NONE 0x00000000  //< Do nothing
00424 #define PWM_X_GENB_ACTCMPAU_INV 0x00000010  //< Invert pwmB
00425 #define PWM_X_GENB_ACTCMPAU_ZERO 0x00000020  //< Drive pwmB Low
00426 #define PWM_X_GENB_ACTCMPAU_ONE 0x00000030  //< Drive pwmB High
00427 #define PWM_X_GENB_ACTLOAD_M    0x0000000C  //< Action for Counter=LOAD
00428 #define PWM_X_GENB_ACTLOAD_NONE 0x00000000  //< Do nothing
00429 #define PWM_X_GENB_ACTLOAD_INV  0x00000004  //< Invert pwmB
00430 #define PWM_X_GENB_ACTLOAD_ZERO 0x00000008  //< Drive pwmB Low
00431 #define PWM_X_GENB_ACTLOAD_ONE  0x0000000C  //< Drive pwmB High
00432 #define PWM_X_GENB_ACTZERO_M    0x00000003  //< Action for Counter=0
00433 #define PWM_X_GENB_ACTZERO_NONE 0x00000000  //< Do nothing
00434 #define PWM_X_GENB_ACTZERO_INV  0x00000001  //< Invert pwmB
00435 #define PWM_X_GENB_ACTZERO_ZERO 0x00000002  //< Drive pwmB Low
00436 #define PWM_X_GENB_ACTZERO_ONE  0x00000003  //< Drive pwmB High
00437
00441 #define PWM_X_DBCTL_ENABLE      0x00000001  //< Dead-Band Generator Enable
00442
00445 #define PWM_X_DBRISE_DELAY_M    0x00000FFF  //< Dead-Band Rise Delay
00446 #define PWM_X_DBRISE_DELAY_S    0
00447
00451 #define PWM_X_DBFALL_DELAY_M    0x00000FFF  //< Dead-Band Fall Delay
00452 #define PWM_X_DBFALL_DELAY_S    0
00453
00457 #define PWM_X_FLTSRC0_FAULT3    0x00000008  //< Fault3 Input
00458 #define PWM_X_FLTSRC0_FAULT2    0x00000004  //< Fault2 Input
00459 #define PWM_X_FLTSRC0_FAULT1    0x00000002  //< Fault1 Input
00460 #define PWM_X_FLTSRC0_FAULT0    0x00000001  //< Fault0 Input
00461
00465 #define PWM_X_FLTSRC1_DCMP7     0x00000080  //< Digital Comparator 7
00466 #define PWM_X_FLTSRC1_DCMP6     0x00000040  //< Digital Comparator 6
00467 #define PWM_X_FLTSRC1_DCMP5     0x00000020  //< Digital Comparator 5
00468 #define PWM_X_FLTSRC1_DCMP4     0x00000010  //< Digital Comparator 4
00469 #define PWM_X_FLTSRC1_DCMP3     0x00000008  //< Digital Comparator 3
00470 #define PWM_X_FLTSRC1_DCMP2     0x00000004  //< Digital Comparator 2
00471 #define PWM_X_FLTSRC1_DCMP1     0x00000002  //< Digital Comparator 1
00472 #define PWM_X_FLTSRC1_DCMP0     0x00000001  //< Digital Comparator 0
00473
00477 #define PWM_X_MINFLTPER_M       0x0000FFFF  //< Minimum Fault Period
00478 #define PWM_X_MINFLTPER_S       0
00479
00483 #define PWM_X_FLTSEN_FAULT3     0x00000008  //< Fault3 Sense
00484 #define PWM_X_FLTSEN_FAULT2     0x00000004  //< Fault2 Sense
00485 #define PWM_X_FLTSEN_FAULT1     0x00000002  //< Fault1 Sense
00486 #define PWM_X_FLTSEN_FAULT0     0x00000001  //< Fault0 Sense
00487
00491 #define PWM_X_FLTSTAT0_FAULT3   0x00000008  //< Fault Input 3
00492 #define PWM_X_FLTSTAT0_FAULT2   0x00000004  //< Fault Input 2
00493 #define PWM_X_FLTSTAT0_FAULT1   0x00000002  //< Fault Input 1
00494 #define PWM_X_FLTSTAT0_FAULT0   0x00000001  //< Fault Input 0
00495
00499 #define PWM_X_FLTSTAT1_DCMP7    0x00000080  //< Digital Comparator 7 Trigger
00500 #define PWM_X_FLTSTAT1_DCMP6    0x00000040  //< Digital Comparator 6 Trigger
00501 #define PWM_X_FLTSTAT1_DCMP5    0x00000020  //< Digital Comparator 5 Trigger
00502 #define PWM_X_FLTSTAT1_DCMP4    0x00000010  //< Digital Comparator 4 Trigger
00503 #define PWM_X_FLTSTAT1_DCMP3    0x00000008  //< Digital Comparator 3 Trigger
00504 #define PWM_X_FLTSTAT1_DCMP2    0x00000004  //< Digital Comparator 2 Trigger
00505 #define PWM_X_FLTSTAT1_DCMP1    0x00000002  //< Digital Comparator 1 Trigger
00506 #define PWM_X_FLTSTAT1_DCMP0    0x00000001  //< Digital Comparator 0 Trigger
00507
00511 #define PWM_O_X_CTL             (*((reg32_t *)(PWMC_BASE + 0x00000000)))  //< Gen Control Reg
00512 #define PWM_O_X_INTEN           (*((reg32_t *)(PWMC_BASE + 0x00000004)))  //< Gen Int/Trig Enable Reg
00513 #define PWM_O_X_RIS             (*((reg32_t *)(PWMC_BASE + 0x00000008)))  //< Gen Raw Int Status Reg
00514 #define PWM_O_X_ISC             (*((reg32_t *)(PWMC_BASE + 0x0000000C)))  //< Gen Int Status Reg
00515 #define PWM_O_X_LOAD            (*((reg32_t *)(PWMC_BASE + 0x00000010)))  //< Gen Load Reg
00516 #define PWM_O_X_COUNT           (*((reg32_t *)(PWMC_BASE + 0x00000014)))  //< Gen Counter Reg
00517 #define PWM_O_X_CMPA            (*((reg32_t *)(PWMC_BASE + 0x00000018)))  //< Gen Compare A Reg
00518 #define PWM_O_X_CMPB            (*((reg32_t *)(PWMC_BASE + 0x0000001C)))  //< Gen Compare B Reg
00519 #define PWM_O_X_GENA            (*((reg32_t *)(PWMC_BASE + 0x00000020)))  //< Gen Generator A Ctrl Reg
00520 #define PWM_O_X_GENB            (*((reg32_t *)(PWMC_BASE + 0x00000024)))  //< Gen Generator B Ctrl Reg
00521 #define PWM_O_X_DBCTL           (*((reg32_t *)(PWMC_BASE + 0x00000028)))  //< Gen Dead Band Ctrl Reg
00522 #define PWM_O_X_DBRISE          (*((reg32_t *)(PWMC_BASE + 0x0000002C)))  //< Gen DB Rising Edge Delay Reg
00523 #define PWM_O_X_DBFALL          (*((reg32_t *)(PWMC_BASE + 0x00000030)))  //< Gen DB Falling Edge Delay Reg
00524 #define PWM_O_X_FLTSRC0         (*((reg32_t *)(PWMC_BASE + 0x00000034)))  //< Fault pin, comparator condition
00525 #define PWM_O_X_FLTSRC1         (*((reg32_t *)(PWMC_BASE + 0x00000038)))  //< Digital comparator condition
00526 #define PWM_O_X_MINFLTPER       (*((reg32_t *)(PWMC_BASE + 0x0000003C)))  //< Fault minimum period extension
00527 #define PWM_GEN_0_OFFSET        (*((reg32_t *)(PWMC_BASE + 0x00000040)))  //< PWM0 base
00528 #define PWM_GEN_1_OFFSET        (*((reg32_t *)(PWMC_BASE + 0x00000080)))  //< PWM1 base
00529 #define PWM_GEN_2_OFFSET        (*((reg32_t *)(PWMC_BASE + 0x000000C0)))  //< PWM2 base
00530 #define PWM_GEN_3_OFFSET        (*((reg32_t *)(PWMC_BASE + 0x00000100)))  //< PWM3 base
00531
00535 #define PWM_O_X_FLTSEN          (*((reg32_t *)(PWMC_BASE + 0x00000000)))  //< Fault logic sense
00536 #define PWM_O_X_FLTSTAT0        (*((reg32_t *)(PWMC_BASE + 0x00000004)))  //< Pin and comparator status
00537 #define PWM_O_X_FLTSTAT1        (*((reg32_t *)(PWMC_BASE + 0x00000008)))  //< Digital comparator status
00538 #define PWM_EXT_0_OFFSET        (*((reg32_t *)(PWMC_BASE + 0x00000800)))  //< PWM0 extended base
00539 #define PWM_EXT_1_OFFSET        (*((reg32_t *)(PWMC_BASE + 0x00000880)))  //< PWM1 extended base
00540 #define PWM_EXT_2_OFFSET        (*((reg32_t *)(PWMC_BASE + 0x00000900)))  //< PWM2 extended base
00541 #define PWM_EXT_3_OFFSET        (*((reg32_t *)(PWMC_BASE + 0x00000980)))  //< PWM3 extended base
00542
00543 #endif /* LM3S_PWM_H */


BeRTOS: lm3s_ssi.h File Reference

  • cpu
  • cortex-m3
  • io
lm3s_ssi.h File Reference

LM3S1968 SSI hardware definitions. More...

Go to the source code of this file.

Defines

#define | SSI_O_CR0 0x00000000
The following are defines for the SSI register offsets.
#define | SSI_O_CR1 0x00000004
The following are defines for the SSI register offsets.
#define | SSI_O_DR 0x00000008
The following are defines for the SSI register offsets.
#define | SSI_O_SR 0x0000000C
The following are defines for the SSI register offsets.
#define | SSI_O_CPSR 0x00000010
The following are defines for the SSI register offsets.
#define | SSI_O_IM 0x00000014
The following are defines for the SSI register offsets.
#define | SSI_O_RIS 0x00000018
The following are defines for the SSI register offsets.
#define | SSI_O_MIS 0x0000001C
The following are defines for the SSI register offsets.
#define | SSI_O_ICR 0x00000020
The following are defines for the SSI register offsets.
#define | SSI_O_DMACTL 0x00000024
The following are defines for the SSI register offsets.
#define | SSI_CR0_SCR_M 0x0000FF00
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_SPH 0x00000080
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_SPO 0x00000040
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_FRF_M 0x00000030
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_FRF_MOTO 0x00000000
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_FRF_TI 0x00000010
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_FRF_NMW 0x00000020
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_DSS_M 0x0000000F
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_DSS_4 0x00000003
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_DSS_5 0x00000004
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_DSS_6 0x00000005
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_DSS_7 0x00000006
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_DSS_8 0x00000007
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_DSS_9 0x00000008
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_DSS_10 0x00000009
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_DSS_11 0x0000000A
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_DSS_12 0x0000000B
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_DSS_13 0x0000000C
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_DSS_14 0x0000000D
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_DSS_15 0x0000000E
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_DSS_16 0x0000000F
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR0_SCR_S 8
The following are defines for the bit fields in the SSI_O_CR0 register.
#define | SSI_CR1_EOT 0x00000010
The following are defines for the bit fields in the SSI_O_CR1 register.
#define | SSI_CR1_SOD 0x00000008
The following are defines for the bit fields in the SSI_O_CR1 register.
#define | SSI_CR1_MS 0x00000004
The following are defines for the bit fields in the SSI_O_CR1 register.
#define | SSI_CR1_SSE 0x00000002
The following are defines for the bit fields in the SSI_O_CR1 register.
#define | SSI_CR1_LBM 0x00000001
The following are defines for the bit fields in the SSI_O_CR1 register.
#define | SSI_DR_DATA_M 0x0000FFFF
The following are defines for the bit fields in the SSI_O_DR register.
#define | SSI_DR_DATA_S 0
The following are defines for the bit fields in the SSI_O_DR register.
#define | SSI_SR_BSY 0x00000010
The following are defines for the bit fields in the SSI_O_SR register.
#define | SSI_SR_RFF 0x00000008
The following are defines for the bit fields in the SSI_O_SR register.
#define | SSI_SR_RNE 0x00000004
The following are defines for the bit fields in the SSI_O_SR register.
#define | SSI_SR_TNF 0x00000002
The following are defines for the bit fields in the SSI_O_SR register.
#define | SSI_SR_TFE 0x00000001
The following are defines for the bit fields in the SSI_O_SR register.
#define | SSI_CPSR_CPSDVSR_M 0x000000FF
The following are defines for the bit fields in the SSI_O_CPSR register.
#define | SSI_CPSR_CPSDVSR_S 0
The following are defines for the bit fields in the SSI_O_CPSR register.
#define | SSI_IM_TXIM 0x00000008
The following are defines for the bit fields in the SSI_O_IM register.
#define | SSI_IM_RXIM 0x00000004
The following are defines for the bit fields in the SSI_O_IM register.
#define | SSI_IM_RTIM 0x00000002
The following are defines for the bit fields in the SSI_O_IM register.
#define | SSI_IM_RORIM 0x00000001
The following are defines for the bit fields in the SSI_O_IM register.
#define | SSI_RIS_TXRIS 0x00000008
The following are defines for the bit fields in the SSI_O_RIS register.
#define | SSI_RIS_RXRIS 0x00000004
The following are defines for the bit fields in the SSI_O_RIS register.
#define | SSI_RIS_RTRIS 0x00000002
The following are defines for the bit fields in the SSI_O_RIS register.
#define | SSI_RIS_RORRIS 0x00000001
The following are defines for the bit fields in the SSI_O_RIS register.
#define | SSI_MIS_TXMIS 0x00000008
The following are defines for the bit fields in the SSI_O_MIS register.
#define | SSI_MIS_RXMIS 0x00000004
The following are defines for the bit fields in the SSI_O_MIS register.
#define | SSI_MIS_RTMIS 0x00000002
The following are defines for the bit fields in the SSI_O_MIS register.
#define | SSI_MIS_RORMIS 0x00000001
The following are defines for the bit fields in the SSI_O_MIS register.
#define | SSI_ICR_RTIC 0x00000002
The following are defines for the bit fields in the SSI_O_ICR register.
#define | SSI_ICR_RORIC 0x00000001
The following are defines for the bit fields in the SSI_O_ICR register.
#define | SSI_DMACTL_TXDMAE 0x00000002
The following are defines for the bit fields in the SSI_O_DMACTL register.
#define | SSI_DMACTL_RXDMAE 0x00000001
The following are defines for the bit fields in the SSI_O_DMACTL register.
#define | SSI_CR0_SCR 0x0000FF00
The following definitions are deprecated.
#define | SSI_CR0_FRF_MASK 0x00000030
The following definitions are deprecated.
#define | SSI_CR0_DSS 0x0000000F
The following definitions are deprecated.
#define | SSI_CPSR_CPSDVSR_MASK 0x000000FF
The following are deprecated defines for the bit fields in the SSI_O_CPSR register.
#define | TX_FIFO_SIZE (8)
The following are deprecated defines for the SSI controller's FIFO size.
#define | RX_FIFO_SIZE (8)
The following are deprecated defines for the SSI controller's FIFO size.
#define | SSI_INT_TXFF 0x00000008
The following are deprecated defines for the bit fields in the interrupt mask set and clear, raw interrupt, masked interrupt, and interrupt clear registers.
#define | SSI_INT_RXFF 0x00000004
The following are deprecated defines for the bit fields in the interrupt mask set and clear, raw interrupt, masked interrupt, and interrupt clear registers.
#define | SSI_INT_RXTO 0x00000002
The following are deprecated defines for the bit fields in the interrupt mask set and clear, raw interrupt, masked interrupt, and interrupt clear registers.
#define | SSI_INT_RXOR 0x00000001
The following are deprecated defines for the bit fields in the interrupt mask set and clear, raw interrupt, masked interrupt, and interrupt clear registers.

Detailed Description

LM3S1968 SSI hardware definitions.

Definition in file lm3s_ssi.h.

Define Documentation

#define SSI_CR0_DSS 0x0000000F

The following definitions are deprecated.

The following are deprecated defines for the bit fields in the SSI_O_CR0 register.

Definition at line 195 of file lm3s_ssi.h.

#define SSI_CR0_FRF_MASK 0x00000030

The following definitions are deprecated.

The following are deprecated defines for the bit fields in the SSI_O_CR0 register.

Definition at line 194 of file lm3s_ssi.h.

#define SSI_CR0_SCR 0x0000FF00

The following definitions are deprecated.

The following are deprecated defines for the bit fields in the SSI_O_CR0 register.

Definition at line 193 of file lm3s_ssi.h.


BeRTOS: lm3s_ssi.h Source File

  • cpu
  • cortex-m3
  • io
lm3s_ssi.h
Go to the documentation of this file.
00001
00036 #ifndef LM3S_SSI_H
00037 #define LM3S_SSI_H
00038
00042 /*\{*/
00043 #define SSI_O_CR0               0x00000000  //< SSI Control 0
00044 #define SSI_O_CR1               0x00000004  //< SSI Control 1
00045 #define SSI_O_DR                0x00000008  //< SSI Data
00046 #define SSI_O_SR                0x0000000C  //< SSI Status
00047 #define SSI_O_CPSR              0x00000010  //< SSI Clock Prescale
00048 #define SSI_O_IM                0x00000014  //< SSI Interrupt Mask
00049 #define SSI_O_RIS               0x00000018  //< SSI Raw Interrupt Status
00050 #define SSI_O_MIS               0x0000001C  //< SSI Masked Interrupt Status
00051 #define SSI_O_ICR               0x00000020  //< SSI Interrupt Clear
00052 #define SSI_O_DMACTL            0x00000024  //< SSI DMA Control
00053 /*\}*/
00054
00058 /*\{*/
00059 #define SSI_CR0_SCR_M           0x0000FF00  //< SSI Serial Clock Rate
00060 #define SSI_CR0_SPH             0x00000080  //< SSI Serial Clock Phase
00061 #define SSI_CR0_SPO             0x00000040  //< SSI Serial Clock Polarity
00062 #define SSI_CR0_FRF_M           0x00000030  //< SSI Frame Format Select
00063 #define SSI_CR0_FRF_MOTO        0x00000000  //< Freescale SPI Frame Format
00064 #define SSI_CR0_FRF_TI          0x00000010  //< Texas Instruments Synchronous
00065                                             //< Serial Frame Format
00066 #define SSI_CR0_FRF_NMW         0x00000020  //< MICROWIRE Frame Format
00067 #define SSI_CR0_DSS_M           0x0000000F  //< SSI Data Size Select
00068 #define SSI_CR0_DSS_4           0x00000003  //< 4-bit data
00069 #define SSI_CR0_DSS_5           0x00000004  //< 5-bit data
00070 #define SSI_CR0_DSS_6           0x00000005  //< 6-bit data
00071 #define SSI_CR0_DSS_7           0x00000006  //< 7-bit data
00072 #define SSI_CR0_DSS_8           0x00000007  //< 8-bit data
00073 #define SSI_CR0_DSS_9           0x00000008  //< 9-bit data
00074 #define SSI_CR0_DSS_10          0x00000009  //< 10-bit data
00075 #define SSI_CR0_DSS_11          0x0000000A  //< 11-bit data
00076 #define SSI_CR0_DSS_12          0x0000000B  //< 12-bit data
00077 #define SSI_CR0_DSS_13          0x0000000C  //< 13-bit data
00078 #define SSI_CR0_DSS_14          0x0000000D  //< 14-bit data
00079 #define SSI_CR0_DSS_15          0x0000000E  //< 15-bit data
00080 #define SSI_CR0_DSS_16          0x0000000F  //< 16-bit data
00081 #define SSI_CR0_SCR_S           8
00082 /*\}*/
00083
00087 /*\{*/
00088 #define SSI_CR1_EOT             0x00000010  //< End of Transmission
00089 #define SSI_CR1_SOD             0x00000008  //< SSI Slave Mode Output Disable
00090 #define SSI_CR1_MS              0x00000004  //< SSI Master/Slave Select
00091 #define SSI_CR1_SSE             0x00000002  //< SSI Synchronous Serial Port
00092                                             //< Enable
00093 #define SSI_CR1_LBM             0x00000001  //< SSI Loopback Mode
00094 /*\}*/
00095
00099 /*\{*/
00100 #define SSI_DR_DATA_M           0x0000FFFF  //< SSI Receive/Transmit Data
00101 #define SSI_DR_DATA_S           0
00102 /*\}*/
00103
00107 /*\{*/
00108 #define SSI_SR_BSY              0x00000010  //< SSI Busy Bit
00109 #define SSI_SR_RFF              0x00000008  //< SSI Receive FIFO Full
00110 #define SSI_SR_RNE              0x00000004  //< SSI Receive FIFO Not Empty
00111 #define SSI_SR_TNF              0x00000002  //< SSI Transmit FIFO Not Full
00112 #define SSI_SR_TFE              0x00000001  //< SSI Transmit FIFO Empty
00113 /*\}*/
00114
00118 /*\{*/
00119 #define SSI_CPSR_CPSDVSR_M      0x000000FF  //< SSI Clock Prescale Divisor
00120 #define SSI_CPSR_CPSDVSR_S      0
00121 /*\}*/
00122
00126 /*\{*/
00127 #define SSI_IM_TXIM             0x00000008  //< SSI Transmit FIFO Interrupt Mask
00128 #define SSI_IM_RXIM             0x00000004  //< SSI Receive FIFO Interrupt Mask
00129 #define SSI_IM_RTIM             0x00000002  //< SSI Receive Time-Out Interrupt
00130                                             //< Mask
00131 #define SSI_IM_RORIM            0x00000001  //< SSI Receive Overrun Interrupt
00132                                             //< Mask
00133 /*\}*/
00134
00138 /*\{*/
00139 #define SSI_RIS_TXRIS           0x00000008  //< SSI Transmit FIFO Raw Interrupt
00140                                             //< Status
00141 #define SSI_RIS_RXRIS           0x00000004  //< SSI Receive FIFO Raw Interrupt
00142                                             //< Status
00143 #define SSI_RIS_RTRIS           0x00000002  //< SSI Receive Time-Out Raw
00144                                             //< Interrupt Status
00145 #define SSI_RIS_RORRIS          0x00000001  //< SSI Receive Overrun Raw
00146                                             //< Interrupt Status
00147 /*\}*/
00148
00152 /*\{*/
00153 #define SSI_MIS_TXMIS           0x00000008  //< SSI Transmit FIFO Masked
00154                                             //< Interrupt Status
00155 #define SSI_MIS_RXMIS           0x00000004  //< SSI Receive FIFO Masked
00156                                             //< Interrupt Status
00157 #define SSI_MIS_RTMIS           0x00000002  //< SSI Receive Time-Out Masked
00158                                             //< Interrupt Status
00159 #define SSI_MIS_RORMIS          0x00000001  //< SSI Receive Overrun Masked
00160                                             //< Interrupt Status
00161 /*\}*/
00162
00166 /*\{*/
00167 #define SSI_ICR_RTIC            0x00000002  //< SSI Receive Time-Out Interrupt
00168                                             //< Clear
00169 #define SSI_ICR_RORIC           0x00000001  //< SSI Receive Overrun Interrupt
00170                                             //< Clear
00171 /*\}*/
00172
00176 /*\{*/
00177 #define SSI_DMACTL_TXDMAE       0x00000002  //< Transmit DMA Enable
00178 #define SSI_DMACTL_RXDMAE       0x00000001  //< Receive DMA Enable
00179 /*\}*/
00180
00184 /*\{*/
00185 #ifndef DEPRECATED
00186 /*\}*/
00187
00192 /*\{*/
00193 #define SSI_CR0_SCR             0x0000FF00  //< Serial clock rate
00194 #define SSI_CR0_FRF_MASK        0x00000030  //< Frame format mask
00195 #define SSI_CR0_DSS             0x0000000F  //< Data size select
00196 /*\}*/
00197
00202 /*\{*/
00203 #define SSI_CPSR_CPSDVSR_MASK   0x000000FF  //< Clock prescale
00204 /*\}*/
00205
00209 /*\{*/
00210 #define TX_FIFO_SIZE            (8)         //< Number of entries in the TX FIFO
00211 #define RX_FIFO_SIZE            (8)         //< Number of entries in the RX FIFO
00212 /*\}*/
00213
00219 /*\{*/
00220 #define SSI_INT_TXFF            0x00000008  //< TX FIFO interrupt
00221 #define SSI_INT_RXFF            0x00000004  //< RX FIFO interrupt
00222 #define SSI_INT_RXTO            0x00000002  //< RX timeout interrupt
00223 #define SSI_INT_RXOR            0x00000001  //< RX overrun interrupt
00224 /*\}*/
00225
00226 #endif /* DEPRECATED */
00227
00228 #endif /* LM3S_SSI_H */


BeRTOS: lm3s_sysctl.h File Reference

  • cpu
  • cortex-m3
  • io
lm3s_sysctl.h File Reference

LM3S1968 system control hardware. More...

Go to the source code of this file.

Defines

#define | SYSCTL_DID0 0x400FE000
The following are defines for the System Control register addresses.
#define | SYSCTL_DID1 0x400FE004
Device Identification 1.
#define | SYSCTL_DC0 0x400FE008
Device Capabilities 0.
#define | SYSCTL_DC1 0x400FE010
Device Capabilities 1.
#define | SYSCTL_DC2 0x400FE014
Device Capabilities 2.
#define | SYSCTL_DC3 0x400FE018
Device Capabilities 3.
#define | SYSCTL_DC4 0x400FE01C
Device Capabilities 4.
#define | SYSCTL_DC5 0x400FE020
Device Capabilities 5.
#define | SYSCTL_DC6 0x400FE024
Device Capabilities 6.
#define | SYSCTL_DC7 0x400FE028
Device Capabilities 7.
#define | SYSCTL_DC8 0x400FE02C
Device Capabilities 8 ADC.
#define | SYSCTL_PBORCTL 0x400FE030
Brown-Out Reset Control.
#define | SYSCTL_LDOPCTL 0x400FE034
LDO Power Control.
#define | SYSCTL_SRCR0 0x400FE040
Software Reset Control 0.
#define | SYSCTL_SRCR1 0x400FE044
Software Reset Control 1.
#define | SYSCTL_SRCR2 0x400FE048
Software Reset Control 2.
#define | SYSCTL_RIS 0x400FE050
Raw Interrupt Status.
#define | SYSCTL_IMC 0x400FE054
Interrupt Mask Control.
#define | SYSCTL_MISC 0x400FE058
Masked Interrupt Status and.
#define | SYSCTL_RESC 0x400FE05C
Reset Cause.
#define | SYSCTL_RCC 0x400FE060
Run-Mode Clock Configuration.
#define | SYSCTL_PLLCFG 0x400FE064
XTAL to PLL Translation.
#define | SYSCTL_GPIOHSCTL 0x400FE06C
GPIO High-Speed Control.
#define | SYSCTL_GPIOHBCTL 0x400FE06C
GPIO High-Performance Bus.
#define | SYSCTL_RCC2 0x400FE070
Run-Mode Clock Configuration 2.
#define | SYSCTL_MOSCCTL 0x400FE07C
Main Oscillator Control.
#define | SYSCTL_RCGC0 0x400FE100
Run Mode Clock Gating Control.
#define | SYSCTL_RCGC1 0x400FE104
Run Mode Clock Gating Control.
#define | SYSCTL_RCGC2 0x400FE108
Run Mode Clock Gating Control.
#define | SYSCTL_SCGC0 0x400FE110
Sleep Mode Clock Gating Control.
#define | SYSCTL_SCGC1 0x400FE114
Sleep Mode Clock Gating Control.
#define | SYSCTL_SCGC2 0x400FE118
Sleep Mode Clock Gating Control.
#define | SYSCTL_DCGC0 0x400FE120
Deep Sleep Mode Clock Gating.
#define | SYSCTL_DCGC1 0x400FE124
Deep-Sleep Mode Clock Gating.
#define | SYSCTL_DCGC2 0x400FE128
Deep Sleep Mode Clock Gating.
#define | SYSCTL_DSLPCLKCFG 0x400FE144
Deep Sleep Clock Configuration.
#define | SYSCTL_CLKVCLR 0x400FE150
Clock Verification Clear.
#define | SYSCTL_PIOSCCAL 0x400FE150
Precision Internal Oscillator.
#define | SYSCTL_PIOSCSTAT 0x400FE154
Precision Internal Oscillator.
#define | SYSCTL_LDOARST 0x400FE160
Allow Unregulated LDO to Reset.
#define | SYSCTL_I2SMCLKCFG 0x400FE170
I2S MCLK Configuration.
#define | SYSCTL_DC9 0x400FE190
Device Capabilities 9 ADC.
#define | SYSCTL_NVMSTAT 0x400FE1A0
Non-Volatile Memory Information.
#define | SYSCTL_DID0_VER_M 0x70000000
The following are defines for the bit fields in the SYSCTL_DID0 register.
#define | SYSCTL_DID0_VER_0 0x00000000
Initial DID0 register format.
#define | SYSCTL_DID0_VER_1 0x10000000
Second version of the DID0.
#define | SYSCTL_DID0_CLASS_M 0x00FF0000
Device Class.
#define | SYSCTL_DID0_CLASS_SANDSTORM 0x00000000
Sandstorm-class Device.
#define | SYSCTL_DID0_CLASS_FURY 0x00010000
Stellaris(R) Fury-class devices.
#define | SYSCTL_DID0_CLASS_DUSTDEVIL 0x00030000
Stellaris(R) DustDevil-class.
#define | SYSCTL_DID0_CLASS_TEMPEST 0x00040000
Stellaris(R) Tempest-class.
#define | SYSCTL_DID0_MAJ_M 0x0000FF00
Major Revision.
#define | SYSCTL_DID0_MAJ_REVA 0x00000000
Revision A (initial device)
#define | SYSCTL_DID0_MAJ_REVB 0x00000100
Revision B (first base layer.
#define | SYSCTL_DID0_MAJ_REVC 0x00000200
Revision C (second base layer.
#define | SYSCTL_DID0_MIN_M 0x000000FF
Minor Revision.
#define | SYSCTL_DID0_MIN_0 0x00000000
Initial device, or a major.
#define | SYSCTL_DID0_MIN_1 0x00000001
First metal layer change.
#define | SYSCTL_DID0_MIN_2 0x00000002
Second metal layer change.
#define | SYSCTL_DID0_MIN_3 0x00000003
Minor revision 3.
#define | SYSCTL_DID0_MIN_4 0x00000004
Minor revision 4.
#define | SYSCTL_DID0_MIN_5 0x00000005
Minor revision 5.
#define | SYSCTL_DID1_VER_M 0xF0000000
The following are defines for the bit fields in the SYSCTL_DID1 register.
#define | SYSCTL_DID1_VER_0 0x00000000
Initial DID1 register format.
#define | SYSCTL_DID1_VER_1 0x10000000
Second version of the DID1.
#define | SYSCTL_DID1_FAM_M 0x0F000000
Family.
#define | SYSCTL_DID1_FAM_STELLARIS 0x00000000
Stellaris family of.
#define | SYSCTL_DID1_PRTNO_M 0x00FF0000
Part Number.
#define | SYSCTL_DID1_PRTNO_101 0x00010000
LM3S101.
#define | SYSCTL_DID1_PRTNO_102 0x00020000
LM3S102.
#define | SYSCTL_DID1_PRTNO_300 0x00190000
LM3S300.
#define | SYSCTL_DID1_PRTNO_301 0x00110000
LM3S301.
#define | SYSCTL_DID1_PRTNO_308 0x001A0000
LM3S308.
#define | SYSCTL_DID1_PRTNO_310 0x00120000
LM3S310.
#define | SYSCTL_DID1_PRTNO_315 0x00130000
LM3S315.
#define | SYSCTL_DID1_PRTNO_316 0x00140000
LM3S316.
#define | SYSCTL_DID1_PRTNO_317 0x00170000
LM3S317.
#define | SYSCTL_DID1_PRTNO_328 0x00150000
LM3S328.
#define | SYSCTL_DID1_PRTNO_600 0x002A0000
LM3S600.
#define | SYSCTL_DID1_PRTNO_601 0x00210000
LM3S601.
#define | SYSCTL_DID1_PRTNO_608 0x002B0000
LM3S608.
#define | SYSCTL_DID1_PRTNO_610 0x00220000
LM3S610.
#define | SYSCTL_DID1_PRTNO_611 0x00230000
LM3S611.
#define | SYSCTL_DID1_PRTNO_612 0x00240000
LM3S612.
#define | SYSCTL_DID1_PRTNO_613 0x00250000
LM3S613.
#define | SYSCTL_DID1_PRTNO_615 0x00260000
LM3S615.
#define | SYSCTL_DID1_PRTNO_617 0x00280000
LM3S617.
#define | SYSCTL_DID1_PRTNO_618 0x00290000
LM3S618.
#define | SYSCTL_DID1_PRTNO_628 0x00270000
LM3S628.
#define | SYSCTL_DID1_PRTNO_800 0x00380000
LM3S800.
#define | SYSCTL_DID1_PRTNO_801 0x00310000
LM3S801.
#define | SYSCTL_DID1_PRTNO_808 0x00390000
LM3S808.
#define | SYSCTL_DID1_PRTNO_811 0x00320000
LM3S811.
#define | SYSCTL_DID1_PRTNO_812 0x00330000
LM3S812.
#define | SYSCTL_DID1_PRTNO_815 0x00340000
LM3S815.
#define | SYSCTL_DID1_PRTNO_817 0x00360000
LM3S817.
#define | SYSCTL_DID1_PRTNO_818 0x00370000
LM3S818.
#define | SYSCTL_DID1_PRTNO_828 0x00350000
LM3S828.
#define | SYSCTL_DID1_PRTNO_1110 0x00BF0000
LM3S1110.
#define | SYSCTL_DID1_PRTNO_1133 0x00C30000
LM3S1133.
#define | SYSCTL_DID1_PRTNO_1138 0x00C50000
LM3S1138.
#define | SYSCTL_DID1_PRTNO_1150 0x00C10000
LM3S1150.
#define | SYSCTL_DID1_PRTNO_1162 0x00C40000
LM3S1162.
#define | SYSCTL_DID1_PRTNO_1165 0x00C20000
LM3S1165.
#define | SYSCTL_DID1_PRTNO_1332 0x00C60000
LM3S1332.
#define | SYSCTL_DID1_PRTNO_1435 0x00BC0000
LM3S1435.
#define | SYSCTL_DID1_PRTNO_1439 0x00BA0000
LM3S1439.
#define | SYSCTL_DID1_PRTNO_1512 0x00BB0000
LM3S1512.
#define | SYSCTL_DID1_PRTNO_1538 0x00C70000
LM3S1538.
#define | SYSCTL_DID1_PRTNO_1601 0x00DB0000
LM3S1601.
#define | SYSCTL_DID1_PRTNO_1607 0x00060000
LM3S1607.
#define | SYSCTL_DID1_PRTNO_1608 0x00DA0000
LM3S1608.
#define | SYSCTL_DID1_PRTNO_1620 0x00C00000
LM3S1620.
#define | SYSCTL_DID1_PRTNO_1625 0x00030000
LM3S1625.
#define | SYSCTL_DID1_PRTNO_1626 0x00040000
LM3S1626.
#define | SYSCTL_DID1_PRTNO_1627 0x00050000
LM3S1627.
#define | SYSCTL_DID1_PRTNO_1635 0x00B30000
LM3S1635.
#define | SYSCTL_DID1_PRTNO_1637 0x00BD0000
LM3S1637.
#define | SYSCTL_DID1_PRTNO_1751 0x00B90000
LM3S1751.
#define | SYSCTL_DID1_PRTNO_1776 0x00100000
LM3S1776.
#define | SYSCTL_DID1_PRTNO_1811 0x00160000
LM3S1811.
#define | SYSCTL_DID1_PRTNO_1816 0x003D0000
LM3S1816.
#define | SYSCTL_DID1_PRTNO_1850 0x00B40000
LM3S1850.
#define | SYSCTL_DID1_PRTNO_1911 0x00DD0000
LM3S1911.
#define | SYSCTL_DID1_PRTNO_1918 0x00DC0000
LM3S1918.
#define | SYSCTL_DID1_PRTNO_1937 0x00B70000
LM3S1937.
#define | SYSCTL_DID1_PRTNO_1958 0x00BE0000
LM3S1958.
#define | SYSCTL_DID1_PRTNO_1960 0x00B50000
LM3S1960.
#define | SYSCTL_DID1_PRTNO_1968 0x00B80000
LM3S1968.
#define | SYSCTL_DID1_PRTNO_1J11 0x000F0000
LM3S1J11.
#define | SYSCTL_DID1_PRTNO_1J16 0x003C0000
LM3S1J16.
#define | SYSCTL_DID1_PRTNO_1N11 0x000E0000
LM3S1N11.
#define | SYSCTL_DID1_PRTNO_1N16 0x003B0000
LM3S1N16.
#define | SYSCTL_DID1_PRTNO_1W16 0x00300000
LM3S1W16.
#define | SYSCTL_DID1_PRTNO_1Z16 0x002F0000
LM3S1Z16.
#define | SYSCTL_DID1_PRTNO_2110 0x00510000
LM3S2110.
#define | SYSCTL_DID1_PRTNO_2139 0x00840000
LM3S2139.
#define | SYSCTL_DID1_PRTNO_2276 0x00390000
LM3S2276.
#define | SYSCTL_DID1_PRTNO_2410 0x00A20000
LM3S2410.
#define | SYSCTL_DID1_PRTNO_2412 0x00590000
LM3S2412.
#define | SYSCTL_DID1_PRTNO_2432 0x00560000
LM3S2432.
#define | SYSCTL_DID1_PRTNO_2533 0x005A0000
LM3S2533.
#define | SYSCTL_DID1_PRTNO_2601 0x00E10000
LM3S2601.
#define | SYSCTL_DID1_PRTNO_2608 0x00E00000
LM3S2608.
#define | SYSCTL_DID1_PRTNO_2616 0x00330000
LM3S2616.
#define | SYSCTL_DID1_PRTNO_2620 0x00570000
LM3S2620.
#define | SYSCTL_DID1_PRTNO_2637 0x00850000
LM3S2637.
#define | SYSCTL_DID1_PRTNO_2651 0x00530000
LM3S2651.
#define | SYSCTL_DID1_PRTNO_2671 0x00800000
LM3S2671.
#define | SYSCTL_DID1_PRTNO_2678 0x00500000
LM3S2678.
#define | SYSCTL_DID1_PRTNO_2730 0x00A40000
LM3S2730.
#define | SYSCTL_DID1_PRTNO_2739 0x00520000
LM3S2739.
#define | SYSCTL_DID1_PRTNO_2776 0x003A0000
LM3S2776.
#define | SYSCTL_DID1_PRTNO_2793 0x006D0000
LM3S2793.
#define | SYSCTL_DID1_PRTNO_2911 0x00E30000
LM3S2911.
#define | SYSCTL_DID1_PRTNO_2918 0x00E20000
LM3S2918.
#define | SYSCTL_DID1_PRTNO_2939 0x00540000
LM3S2939.
#define | SYSCTL_DID1_PRTNO_2948 0x008F0000
LM3S2948.
#define | SYSCTL_DID1_PRTNO_2950 0x00580000
LM3S2950.
#define | SYSCTL_DID1_PRTNO_2965 0x00550000
LM3S2965.
#define | SYSCTL_DID1_PRTNO_2B93 0x006C0000
LM3S2B93.
#define | SYSCTL_DID1_PRTNO_3651 0x00430000
LM3S3651.
#define | SYSCTL_DID1_PRTNO_3739 0x00440000
LM3S3739.
#define | SYSCTL_DID1_PRTNO_3748 0x00490000
LM3S3748.
#define | SYSCTL_DID1_PRTNO_3749 0x00450000
LM3S3749.
#define | SYSCTL_DID1_PRTNO_3826 0x00420000
LM3S3826.
#define | SYSCTL_DID1_PRTNO_3J26 0x00410000
LM3S3J26.
#define | SYSCTL_DID1_PRTNO_3N26 0x00400000
LM3S3N26.
#define | SYSCTL_DID1_PRTNO_3W26 0x003F0000
LM3S3W26.
#define | SYSCTL_DID1_PRTNO_3Z26 0x003E0000
LM3S3Z26.
#define | SYSCTL_DID1_PRTNO_5632 0x00810000
LM3S5632.
#define | SYSCTL_DID1_PRTNO_5651 0x000C0000
LM3S5651.
#define | SYSCTL_DID1_PRTNO_5652 0x008A0000
LM3S5652.
#define | SYSCTL_DID1_PRTNO_5656 0x004D0000
LM3S5656.
#define | SYSCTL_DID1_PRTNO_5662 0x00910000
LM3S5662.
#define | SYSCTL_DID1_PRTNO_5732 0x00960000
LM3S5732.
#define | SYSCTL_DID1_PRTNO_5737 0x00970000
LM3S5737.
#define | SYSCTL_DID1_PRTNO_5739 0x00A00000
LM3S5739.
#define | SYSCTL_DID1_PRTNO_5747 0x00990000
LM3S5747.
#define | SYSCTL_DID1_PRTNO_5749 0x00A70000
LM3S5749.
#define | SYSCTL_DID1_PRTNO_5752 0x009A0000
LM3S5752.
#define | SYSCTL_DID1_PRTNO_5762 0x009C0000
LM3S5762.
#define | SYSCTL_DID1_PRTNO_5791 0x00690000
LM3S5791.
#define | SYSCTL_DID1_PRTNO_5951 0x000B0000
LM3S5951.
#define | SYSCTL_DID1_PRTNO_5956 0x004E0000
LM3S5956.
#define | SYSCTL_DID1_PRTNO_5B91 0x00680000
LM3S5B91.
#define | SYSCTL_DID1_PRTNO_5K31 0x00090000
LM3S5K31.
#define | SYSCTL_DID1_PRTNO_5K36 0x004A0000
LM3S5K36.
#define | SYSCTL_DID1_PRTNO_5P31 0x000A0000
LM3S5P31.
#define | SYSCTL_DID1_PRTNO_5P36 0x00480000
LM3S5P36.
#define | SYSCTL_DID1_PRTNO_5P51 0x000D0000
LM3S5P51.
#define | SYSCTL_DID1_PRTNO_5P56 0x004C0000
LM3S5P56.
#define | SYSCTL_DID1_PRTNO_5R31 0x00070000
LM3S5R31.
#define | SYSCTL_DID1_PRTNO_5R36 0x004B0000
LM3S5R36.
#define | SYSCTL_DID1_PRTNO_5T36 0x00470000
LM3S5T36.
#define | SYSCTL_DID1_PRTNO_5Y36 0x00460000
LM3S5Y36.
#define | SYSCTL_DID1_PRTNO_6100 0x00A10000
LM3S6100.
#define | SYSCTL_DID1_PRTNO_6110 0x00740000
LM3S6110.
#define | SYSCTL_DID1_PRTNO_6420 0x00A50000
LM3S6420.
#define | SYSCTL_DID1_PRTNO_6422 0x00820000
LM3S6422.
#define | SYSCTL_DID1_PRTNO_6432 0x00750000
LM3S6432.
#define | SYSCTL_DID1_PRTNO_6537 0x00760000
LM3S6537.
#define | SYSCTL_DID1_PRTNO_6610 0x00710000
LM3S6610.
#define | SYSCTL_DID1_PRTNO_6611 0x00E70000
LM3S6611.
#define | SYSCTL_DID1_PRTNO_6618 0x00E60000
LM3S6618.
#define | SYSCTL_DID1_PRTNO_6633 0x00830000
LM3S6633.
#define | SYSCTL_DID1_PRTNO_6637 0x008B0000
LM3S6637.
#define | SYSCTL_DID1_PRTNO_6730 0x00A30000
LM3S6730.
#define | SYSCTL_DID1_PRTNO_6753 0x00770000
LM3S6753.
#define | SYSCTL_DID1_PRTNO_6911 0x00E90000
LM3S6911.
#define | SYSCTL_DID1_PRTNO_6918 0x00E80000
LM3S6918.
#define | SYSCTL_DID1_PRTNO_6938 0x00890000
LM3S6938.
#define | SYSCTL_DID1_PRTNO_6950 0x00720000
LM3S6950.
#define | SYSCTL_DID1_PRTNO_6952 0x00780000
LM3S6952.
#define | SYSCTL_DID1_PRTNO_6965 0x00730000
LM3S6965.
#define | SYSCTL_DID1_PRTNO_8530 0x00640000
LM3S8530.
#define | SYSCTL_DID1_PRTNO_8538 0x008E0000
LM3S8538.
#define | SYSCTL_DID1_PRTNO_8630 0x00610000
LM3S8630.
#define | SYSCTL_DID1_PRTNO_8730 0x00630000
LM3S8730.
#define | SYSCTL_DID1_PRTNO_8733 0x008D0000
LM3S8733.
#define | SYSCTL_DID1_PRTNO_8738 0x00860000
LM3S8738.
#define | SYSCTL_DID1_PRTNO_8930 0x00650000
LM3S8930.
#define | SYSCTL_DID1_PRTNO_8933 0x008C0000
LM3S8933.
#define | SYSCTL_DID1_PRTNO_8938 0x00880000
LM3S8938.
#define | SYSCTL_DID1_PRTNO_8962 0x00A60000
LM3S8962.
#define | SYSCTL_DID1_PRTNO_8970 0x00620000
LM3S8970.
#define | SYSCTL_DID1_PRTNO_8971 0x00D70000
LM3S8971.
#define | SYSCTL_DID1_PRTNO_9790 0x00670000
LM3S9790.
#define | SYSCTL_DID1_PRTNO_9792 0x006B0000
LM3S9792.
#define | SYSCTL_DID1_PRTNO_9997 0x00200000
LM3S9997.
#define | SYSCTL_DID1_PRTNO_9B90 0x00660000
LM3S9B90.
#define | SYSCTL_DID1_PRTNO_9B92 0x006A0000
LM3S9B92.
#define | SYSCTL_DID1_PRTNO_9B95 0x006E0000
LM3S9B95.
#define | SYSCTL_DID1_PRTNO_9B96 0x006F0000
LM3S9B96.
#define | SYSCTL_DID1_PRTNO_9L97 0x00180000
LM3S9L97.
#define | SYSCTL_DID1_PINCNT_M 0x0000E000
Package Pin Count.
#define | SYSCTL_DID1_PINCNT_28 0x00000000
28 pin package
#define | SYSCTL_DID1_PINCNT_48 0x00002000
48 pin package
#define | SYSCTL_DID1_PINCNT_100 0x00004000
100-pin package
#define | SYSCTL_DID1_PINCNT_64 0x00006000
64-pin package
#define | SYSCTL_DID1_TEMP_M 0x000000E0
Temperature Range.
#define | SYSCTL_DID1_TEMP_C 0x00000000
Commercial temperature range (0C.
#define | SYSCTL_DID1_TEMP_I 0x00000020
Industrial temperature range.
#define | SYSCTL_DID1_TEMP_E 0x00000040
Extended temperature range (-40C.
#define | SYSCTL_DID1_PKG_M 0x00000018
Package Type.
#define | SYSCTL_DID1_PKG_SOIC 0x00000000
SOIC package.
#define | SYSCTL_DID1_PKG_QFP 0x00000008
LQFP package.
#define | SYSCTL_DID1_PKG_BGA 0x00000010
BGA package.
#define | SYSCTL_DID1_PKG_QFN 0x00000018
QFN package.
#define | SYSCTL_DID1_ROHS 0x00000004
RoHS-Compliance.
#define | SYSCTL_DID1_QUAL_M 0x00000003
Qualification Status.
#define | SYSCTL_DID1_QUAL_ES 0x00000000
Engineering Sample (unqualified)
#define | SYSCTL_DID1_QUAL_PP 0x00000001
Pilot Production (unqualified)
#define | SYSCTL_DID1_QUAL_FQ 0x00000002
Fully Qualified.
#define | SYSCTL_DID1_PRTNO_S 16
Part number shift.
#define | SYSCTL_DC0_SRAMSZ_M 0xFFFF0000
The following are defines for the bit fields in the SYSCTL_DC0 register.
#define | SYSCTL_DC0_SRAMSZ_2KB 0x00070000
2 KB of SRAM
#define | SYSCTL_DC0_SRAMSZ_4KB 0x000F0000
4 KB of SRAM
#define | SYSCTL_DC0_SRAMSZ_6KB 0x00170000
6 KB of SRAM
#define | SYSCTL_DC0_SRAMSZ_8KB 0x001F0000
8 KB of SRAM
#define | SYSCTL_DC0_SRAMSZ_12KB 0x002F0000
12 KB of SRAM
#define | SYSCTL_DC0_SRAMSZ_16KB 0x003F0000
16 KB of SRAM
#define | SYSCTL_DC0_SRAMSZ_20KB 0x004F0000
20 KB of SRAM
#define | SYSCTL_DC0_SRAMSZ_24KB 0x005F0000
24 KB of SRAM
#define | SYSCTL_DC0_SRAMSZ_32KB 0x007F0000
32 KB of SRAM
#define | SYSCTL_DC0_SRAMSZ_48KB 0x00BF0000
48 KB of SRAM
#define | SYSCTL_DC0_SRAMSZ_64KB 0x00FF0000
64 KB of SRAM
#define | SYSCTL_DC0_SRAMSZ_96KB 0x017F0000
96 KB of SRAM
#define | SYSCTL_DC0_FLASHSZ_M 0x0000FFFF
Flash Size.
#define | SYSCTL_DC0_FLASHSZ_8KB 0x00000003
8 KB of Flash
#define | SYSCTL_DC0_FLASHSZ_16KB 0x00000007
16 KB of Flash
#define | SYSCTL_DC0_FLASHSZ_32KB 0x0000000F
32 KB of Flash
#define | SYSCTL_DC0_FLASHSZ_64KB 0x0000001F
64 KB of Flash
#define | SYSCTL_DC0_FLASHSZ_96KB 0x0000002F
96 KB of Flash
#define | SYSCTL_DC0_FLASHSZ_128K 0x0000003F
128 KB of Flash
#define | SYSCTL_DC0_FLASHSZ_256K 0x0000007F
256 KB of Flash
#define | SYSCTL_DC0_SRAMSZ_S 16
SRAM size shift.
#define | SYSCTL_DC0_FLASHSZ_S 0
Flash size shift.
#define | SYSCTL_DC1_WDT1 0x10000000
The following are defines for the bit fields in the SYSCTL_DC1 register.
#define | SYSCTL_DC1_CAN2 0x04000000
CAN Module 2 Present.
#define | SYSCTL_DC1_CAN1 0x02000000
CAN Module 1 Present.
#define | SYSCTL_DC1_CAN0 0x01000000
CAN Module 0 Present.
#define | SYSCTL_DC1_PWM 0x00100000
PWM Module Present.
#define | SYSCTL_DC1_ADC1 0x00020000
ADC Module 1 Present.
#define | SYSCTL_DC1_ADC0 0x00010000
ADC Module 0 Present.
#define | SYSCTL_DC1_MINSYSDIV_M 0x0000F000
System Clock Divider.
#define | SYSCTL_DC1_MINSYSDIV_100 0x00001000
Divide VCO (400MHZ) by 5 minimum.
#define | SYSCTL_DC1_MINSYSDIV_66 0x00002000
Divide VCO (400MHZ) by 2*2 + 2 =.
#define | SYSCTL_DC1_MINSYSDIV_50 0x00003000
Specifies a 50-MHz CPU clock.
#define | SYSCTL_DC1_MINSYSDIV_25 0x00007000
Specifies a 25-MHz clock with a.
#define | SYSCTL_DC1_MINSYSDIV_20 0x00009000
Specifies a 20-MHz clock with a.
#define | SYSCTL_DC1_ADCSPD_M 0x00000F00
Max ADC Speed.
#define | SYSCTL_DC1_ADCSPD_125K 0x00000000
125Ksps ADC
#define | SYSCTL_DC1_ADCSPD_250K 0x00000100
250K samples/second
#define | SYSCTL_DC1_ADCSPD_500K 0x00000200
500K samples/second
#define | SYSCTL_DC1_ADCSPD_1M 0x00000300
1M samples/second
#define | SYSCTL_DC1_ADC1SPD_M 0x00000C00
Max ADC1 Speed.
#define | SYSCTL_DC1_ADC1SPD_1M 0x00000C00
1M samples/second
#define | SYSCTL_DC1_ADC0SPD_M 0x00000300
Max ADC0 Speed.
#define | SYSCTL_DC1_ADC0SPD_1M 0x00000300
1M samples/second
#define | SYSCTL_DC1_MPU 0x00000080
MPU Present.
#define | SYSCTL_DC1_HIB 0x00000040
Hibernation Module Present.
#define | SYSCTL_DC1_TEMP 0x00000020
Temp Sensor Present.
#define | SYSCTL_DC1_PLL 0x00000010
PLL Present.
#define | SYSCTL_DC1_WDT0 0x00000008
Watchdog Timer 0 Present.
#define | SYSCTL_DC1_SWO 0x00000004
SWO Trace Port Present.
#define | SYSCTL_DC1_SWD 0x00000002
SWD Present.
#define | SYSCTL_DC1_JTAG 0x00000001
JTAG Present.
#define | SYSCTL_DC2_EPI0 0x40000000
The following are defines for the bit fields in the SYSCTL_DC2 register.
#define | SYSCTL_DC2_I2S0 0x10000000
I2S Module 0 Present.
#define | SYSCTL_DC2_COMP2 0x04000000
Analog Comparator 2 Present.
#define | SYSCTL_DC2_COMP1 0x02000000
Analog Comparator 1 Present.
#define | SYSCTL_DC2_COMP0 0x01000000
Analog Comparator 0 Present.
#define | SYSCTL_DC2_TIMER3 0x00080000
Timer Module 3 Present.
#define | SYSCTL_DC2_TIMER2 0x00040000
Timer Module 2 Present.
#define | SYSCTL_DC2_TIMER1 0x00020000
Timer Module 1 Present.
#define | SYSCTL_DC2_TIMER0 0x00010000
Timer Module 0 Present.
#define | SYSCTL_DC2_I2C1 0x00004000
I2C Module 1 Present.
#define | SYSCTL_DC2_I2C0 0x00001000
I2C Module 0 Present.
#define | SYSCTL_DC2_QEI1 0x00000200
QEI Module 1 Present.
#define | SYSCTL_DC2_QEI0 0x00000100
QEI Module 0 Present.
#define | SYSCTL_DC2_SSI1 0x00000020
SSI Module 1 Present.
#define | SYSCTL_DC2_SSI0 0x00000010
SSI Module 0 Present.
#define | SYSCTL_DC2_UART2 0x00000004
UART Module 2 Present.
#define | SYSCTL_DC2_UART1 0x00000002
UART Module 1 Present.
#define | SYSCTL_DC2_UART0 0x00000001
UART Module 0 Present.
#define | SYSCTL_DC3_32KHZ 0x80000000
The following are defines for the bit fields in the SYSCTL_DC3 register.
#define | SYSCTL_DC3_CCP5 0x20000000
CCP5 Pin Present.
#define | SYSCTL_DC3_CCP4 0x10000000
CCP4 Pin Present.
#define | SYSCTL_DC3_CCP3 0x08000000
CCP3 Pin Present.
#define | SYSCTL_DC3_CCP2 0x04000000
CCP2 Pin Present.
#define | SYSCTL_DC3_CCP1 0x02000000
CCP1 Pin Present.
#define | SYSCTL_DC3_CCP0 0x01000000
CCP0 Pin Present.
#define | SYSCTL_DC3_ADC0AIN7 0x00800000
ADC Module 0 AIN7 Pin Present.
#define | SYSCTL_DC3_ADC0AIN6 0x00400000
ADC Module 0 AIN6 Pin Present.
#define | SYSCTL_DC3_ADC0AIN5 0x00200000
ADC Module 0 AIN5 Pin Present.
#define | SYSCTL_DC3_ADC0AIN4 0x00100000
ADC Module 0 AIN4 Pin Present.
#define | SYSCTL_DC3_ADC0AIN3 0x00080000
ADC Module 0 AIN3 Pin Present.
#define | SYSCTL_DC3_ADC0AIN2 0x00040000
ADC Module 0 AIN2 Pin Present.
#define | SYSCTL_DC3_ADC0AIN1 0x00020000
ADC Module 0 AIN1 Pin Present.
#define | SYSCTL_DC3_ADC0AIN0 0x00010000
ADC Module 0 AIN0 Pin Present.
#define | SYSCTL_DC3_PWMFAULT 0x00008000
PWM Fault Pin Present.
#define | SYSCTL_DC3_C2O 0x00004000
C2o Pin Present.
#define | SYSCTL_DC3_C2PLUS 0x00002000
C2+ Pin Present.
#define | SYSCTL_DC3_C2MINUS 0x00001000
C2- Pin Present.
#define | SYSCTL_DC3_C1O 0x00000800
C1o Pin Present.
#define | SYSCTL_DC3_C1PLUS 0x00000400
C1+ Pin Present.
#define | SYSCTL_DC3_C1MINUS 0x00000200
C1- Pin Present.
#define | SYSCTL_DC3_C0O 0x00000100
C0o Pin Present.
#define | SYSCTL_DC3_C0PLUS 0x00000080
C0+ Pin Present.
#define | SYSCTL_DC3_C0MINUS 0x00000040
C0- Pin Present.
#define | SYSCTL_DC3_PWM5 0x00000020
PWM5 Pin Present.
#define | SYSCTL_DC3_PWM4 0x00000010
PWM4 Pin Present.
#define | SYSCTL_DC3_PWM3 0x00000008
PWM3 Pin Present.
#define | SYSCTL_DC3_PWM2 0x00000004
PWM2 Pin Present.
#define | SYSCTL_DC3_PWM1 0x00000002
PWM1 Pin Present.
#define | SYSCTL_DC3_PWM0 0x00000001
PWM0 Pin Present.
#define | SYSCTL_DC4_ETH 0x50000000
The following are defines for the bit fields in the SYSCTL_DC4 register.
#define | SYSCTL_DC4_EPHY0 0x40000000
Ethernet PHY Layer 0 Present.
#define | SYSCTL_DC4_EMAC0 0x10000000
Ethernet MAC Layer 0 Present.
#define | SYSCTL_DC4_E1588 0x01000000
1588 Capable
#define | SYSCTL_DC4_PICAL 0x00040000
PIOSC Calibrate.
#define | SYSCTL_DC4_CCP7 0x00008000
CCP7 Pin Present.
#define | SYSCTL_DC4_CCP6 0x00004000
CCP6 Pin Present.
#define | SYSCTL_DC4_UDMA 0x00002000
Micro-DMA Module Present.
#define | SYSCTL_DC4_ROM 0x00001000
Internal Code ROM Present.
#define | SYSCTL_DC4_GPIOJ 0x00000100
GPIO Port J Present.
#define | SYSCTL_DC4_GPIOH 0x00000080
GPIO Port H Present.
#define | SYSCTL_DC4_GPIOG 0x00000040
GPIO Port G Present.
#define | SYSCTL_DC4_GPIOF 0x00000020
GPIO Port F Present.
#define | SYSCTL_DC4_GPIOE 0x00000010
GPIO Port E Present.
#define | SYSCTL_DC4_GPIOD 0x00000008
GPIO Port D Present.
#define | SYSCTL_DC4_GPIOC 0x00000004
GPIO Port C Present.
#define | SYSCTL_DC4_GPIOB 0x00000002
GPIO Port B Present.
#define | SYSCTL_DC4_GPIOA 0x00000001
GPIO Port A Present.
#define | SYSCTL_DC5_PWMFAULT3 0x08000000
The following are defines for the bit fields in the SYSCTL_DC5 register.
#define | SYSCTL_DC5_PWMFAULT2 0x04000000
PWM Fault 2 Pin Present.
#define | SYSCTL_DC5_PWMFAULT1 0x02000000
PWM Fault 1 Pin Present.
#define | SYSCTL_DC5_PWMFAULT0 0x01000000
PWM Fault 0 Pin Present.
#define | SYSCTL_DC5_PWMEFLT 0x00200000
PWM Extended Fault Active.
#define | SYSCTL_DC5_PWMESYNC 0x00100000
PWM Extended SYNC Active.
#define | SYSCTL_DC5_PWM7 0x00000080
PWM7 Pin Present.
#define | SYSCTL_DC5_PWM6 0x00000040
PWM6 Pin Present.
#define | SYSCTL_DC5_PWM5 0x00000020
PWM5 Pin Present.
#define | SYSCTL_DC5_PWM4 0x00000010
PWM4 Pin Present.
#define | SYSCTL_DC5_PWM3 0x00000008
PWM3 Pin Present.
#define | SYSCTL_DC5_PWM2 0x00000004
PWM2 Pin Present.
#define | SYSCTL_DC5_PWM1 0x00000002
PWM1 Pin Present.
#define | SYSCTL_DC5_PWM0 0x00000001
PWM0 Pin Present.
#define | SYSCTL_DC6_USB0PHY 0x00000010
The following are defines for the bit fields in the SYSCTL_DC6 register.
#define | SYSCTL_DC6_USB0_M 0x00000003
USB Module 0 Present.
#define | SYSCTL_DC6_USB0_DEV 0x00000001
USB0 is Device Only.
#define | SYSCTL_DC6_USB0_HOSTDEV 0x00000002
USB is Device or Host.
#define | SYSCTL_DC6_USB0_OTG 0x00000003
USB0 is OTG.
#define | SYSCTL_DC7_DMACH30 0x40000000
The following are defines for the bit fields in the SYSCTL_DC7 register.
#define | SYSCTL_DC7_DMACH29 0x20000000
I2S0_TX / CAN1_TX.
#define | SYSCTL_DC7_DMACH28 0x10000000
I2S0_RX / CAN1_RX.
#define | SYSCTL_DC7_DMACH27 0x08000000
CAN1_TX / ADC1_SS3.
#define | SYSCTL_DC7_DMACH26 0x04000000
CAN1_RX / ADC1_SS2.
#define | SYSCTL_DC7_DMACH25 0x02000000
SSI1_TX / ADC1_SS1.
#define | SYSCTL_DC7_SSI1_TX 0x02000000
SSI1 TX on uDMA Ch25.
#define | SYSCTL_DC7_SSI1_RX 0x01000000
SSI1 RX on uDMA Ch24.
#define | SYSCTL_DC7_DMACH24 0x01000000
SSI1_RX / ADC1_SS0.
#define | SYSCTL_DC7_UART1_TX 0x00800000
UART1 TX on uDMA Ch23.
#define | SYSCTL_DC7_DMACH23 0x00800000
UART1_TX / CAN2_TX.
#define | SYSCTL_DC7_DMACH22 0x00400000
UART1_RX / CAN2_RX.
#define | SYSCTL_DC7_UART1_RX 0x00400000
UART1 RX on uDMA Ch22.
#define | SYSCTL_DC7_DMACH21 0x00200000
Timer1B / EPI0_WFIFO.
#define | SYSCTL_DC7_DMACH20 0x00100000
Timer1A / EPI0_NBRFIFO.
#define | SYSCTL_DC7_DMACH19 0x00080000
Timer0B / Timer1B.
#define | SYSCTL_DC7_DMACH18 0x00040000
Timer0A / Timer1A.
#define | SYSCTL_DC7_DMACH17 0x00020000
ADC0_SS3.
#define | SYSCTL_DC7_DMACH16 0x00010000
ADC0_SS2.
#define | SYSCTL_DC7_DMACH15 0x00008000
ADC0_SS1 / Timer2B.
#define | SYSCTL_DC7_DMACH14 0x00004000
ADC0_SS0 / Timer2A.
#define | SYSCTL_DC7_DMACH13 0x00002000
CAN0_TX / UART2_TX.
#define | SYSCTL_DC7_DMACH12 0x00001000
CAN0_RX / UART2_RX.
#define | SYSCTL_DC7_SSI0_TX 0x00000800
SSI0 TX on uDMA Ch11.
#define | SYSCTL_DC7_DMACH11 0x00000800
SSI0_TX / SSI1_TX.
#define | SYSCTL_DC7_SSI0_RX 0x00000400
SSI0 RX on uDMA Ch10.
#define | SYSCTL_DC7_DMACH10 0x00000400
SSI0_RX / SSI1_RX.
#define | SYSCTL_DC7_UART0_TX 0x00000200
UART0 TX on uDMA Ch9.
#define | SYSCTL_DC7_DMACH9 0x00000200
UART0_TX / UART1_TX.
#define | SYSCTL_DC7_DMACH8 0x00000100
UART0_RX / UART1_RX.
#define | SYSCTL_DC7_UART0_RX 0x00000100
UART0 RX on uDMA Ch8.
#define | SYSCTL_DC7_DMACH7 0x00000080
ETH_TX / Timer2B.
#define | SYSCTL_DC7_DMACH6 0x00000040
ETH_RX / Timer2A.
#define | SYSCTL_DC7_DMACH5 0x00000020
USB_EP3_TX / Timer2B.
#define | SYSCTL_DC7_USB_EP3_TX 0x00000020
USB EP3 TX on uDMA Ch5.
#define | SYSCTL_DC7_USB_EP3_RX 0x00000010
USB EP3 RX on uDMA Ch4.
#define | SYSCTL_DC7_DMACH4 0x00000010
USB_EP3_RX / Timer2A.
#define | SYSCTL_DC7_USB_EP2_TX 0x00000008
USB EP2 TX on uDMA Ch3.
#define | SYSCTL_DC7_DMACH3 0x00000008
USB_EP2_TX / Timer3B.
#define | SYSCTL_DC7_USB_EP2_RX 0x00000004
USB EP2 RX on uDMA Ch2.
#define | SYSCTL_DC7_DMACH2 0x00000004
USB_EP2_RX / Timer3A.
#define | SYSCTL_DC7_USB_EP1_TX 0x00000002
USB EP1 TX on uDMA Ch1.
#define | SYSCTL_DC7_DMACH1 0x00000002
USB_EP1_TX / UART2_TX.
#define | SYSCTL_DC7_DMACH0 0x00000001
USB_EP1_RX / UART2_RX.
#define | SYSCTL_DC7_USB_EP1_RX 0x00000001
USB EP1 RX on uDMA Ch0.
#define | SYSCTL_DC8_ADC1AIN15 0x80000000
The following are defines for the bit fields in the SYSCTL_DC8 register.
#define | SYSCTL_DC8_ADC1AIN14 0x40000000
ADC Module 1 AIN14 Pin Present.
#define | SYSCTL_DC8_ADC1AIN13 0x20000000
ADC Module 1 AIN13 Pin Present.
#define | SYSCTL_DC8_ADC1AIN12 0x10000000
ADC Module 1 AIN12 Pin Present.
#define | SYSCTL_DC8_ADC1AIN11 0x08000000
ADC Module 1 AIN11 Pin Present.
#define | SYSCTL_DC8_ADC1AIN10 0x04000000
ADC Module 1 AIN10 Pin Present.
#define | SYSCTL_DC8_ADC1AIN9 0x02000000
ADC Module 1 AIN9 Pin Present.
#define | SYSCTL_DC8_ADC1AIN8 0x01000000
ADC Module 1 AIN8 Pin Present.
#define | SYSCTL_DC8_ADC1AIN7 0x00800000
ADC Module 1 AIN7 Pin Present.
#define | SYSCTL_DC8_ADC1AIN6 0x00400000
ADC Module 1 AIN6 Pin Present.
#define | SYSCTL_DC8_ADC1AIN5 0x00200000
ADC Module 1 AIN5 Pin Present.
#define | SYSCTL_DC8_ADC1AIN4 0x00100000
ADC Module 1 AIN4 Pin Present.
#define | SYSCTL_DC8_ADC1AIN3 0x00080000
ADC Module 1 AIN3 Pin Present.
#define | SYSCTL_DC8_ADC1AIN2 0x00040000
ADC Module 1 AIN2 Pin Present.
#define | SYSCTL_DC8_ADC1AIN1 0x00020000
ADC Module 1 AIN1 Pin Present.
#define | SYSCTL_DC8_ADC1AIN0 0x00010000
ADC Module 1 AIN0 Pin Present.
#define | SYSCTL_DC8_ADC0AIN15 0x00008000
ADC Module 0 AIN15 Pin Present.
#define | SYSCTL_DC8_ADC0AIN14 0x00004000
ADC Module 0 AIN14 Pin Present.
#define | SYSCTL_DC8_ADC0AIN13 0x00002000
ADC Module 0 AIN13 Pin Present.
#define | SYSCTL_DC8_ADC0AIN12 0x00001000
ADC Module 0 AIN12 Pin Present.
#define | SYSCTL_DC8_ADC0AIN11 0x00000800
ADC Module 0 AIN11 Pin Present.
#define | SYSCTL_DC8_ADC0AIN10 0x00000400
ADC Module 0 AIN10 Pin Present.
#define | SYSCTL_DC8_ADC0AIN9 0x00000200
ADC Module 0 AIN9 Pin Present.
#define | SYSCTL_DC8_ADC0AIN8 0x00000100
ADC Module 0 AIN8 Pin Present.
#define | SYSCTL_DC8_ADC0AIN7 0x00000080
ADC Module 0 AIN7 Pin Present.
#define | SYSCTL_DC8_ADC0AIN6 0x00000040
ADC Module 0 AIN6 Pin Present.
#define | SYSCTL_DC8_ADC0AIN5 0x00000020
ADC Module 0 AIN5 Pin Present.
#define | SYSCTL_DC8_ADC0AIN4 0x00000010
ADC Module 0 AIN4 Pin Present.
#define | SYSCTL_DC8_ADC0AIN3 0x00000008
ADC Module 0 AIN3 Pin Present.
#define | SYSCTL_DC8_ADC0AIN2 0x00000004
ADC Module 0 AIN2 Pin Present.
#define | SYSCTL_DC8_ADC0AIN1 0x00000002
ADC Module 0 AIN1 Pin Present.
#define | SYSCTL_DC8_ADC0AIN0 0x00000001
ADC Module 0 AIN0 Pin Present.
#define | SYSCTL_PBORCTL_BORTIM_M 0x0000FFFC
The following are defines for the bit fields in the SYSCTL_PBORCTL register.
#define | SYSCTL_PBORCTL_BORIOR 0x00000002
BOR Interrupt or Reset.
#define | SYSCTL_PBORCTL_BORWT 0x00000001
BOR Wait and Check for Noise.
#define | SYSCTL_PBORCTL_BORTIM_S 2
The following are defines for the bit fields in the SYSCTL_PBORCTL register.
#define | SYSCTL_LDOPCTL_M 0x0000003F
The following are defines for the bit fields in the SYSCTL_LDOPCTL register.
#define | SYSCTL_LDOPCTL_2_50V 0x00000000
2.50
#define | SYSCTL_LDOPCTL_2_45V 0x00000001
2.45
#define | SYSCTL_LDOPCTL_2_40V 0x00000002
2.40
#define | SYSCTL_LDOPCTL_2_35V 0x00000003
2.35
#define | SYSCTL_LDOPCTL_2_30V 0x00000004
2.30
#define | SYSCTL_LDOPCTL_2_25V 0x00000005
2.25
#define | SYSCTL_LDOPCTL_2_75V 0x0000001B
2.75
#define | SYSCTL_LDOPCTL_2_70V 0x0000001C
2.70
#define | SYSCTL_LDOPCTL_2_65V 0x0000001D
2.65
#define | SYSCTL_LDOPCTL_2_60V 0x0000001E
2.60
#define | SYSCTL_LDOPCTL_2_55V 0x0000001F
2.55
#define | SYSCTL_SRCR0_WDT1 0x10000000
The following are defines for the bit fields in the SYSCTL_SRCR0 register.
#define | SYSCTL_SRCR0_CAN2 0x04000000
CAN2 Reset Control.
#define | SYSCTL_SRCR0_CAN1 0x02000000
CAN1 Reset Control.
#define | SYSCTL_SRCR0_CAN0 0x01000000
CAN0 Reset Control.
#define | SYSCTL_SRCR0_PWM 0x00100000
PWM Reset Control.
#define | SYSCTL_SRCR0_ADC1 0x00020000
ADC1 Reset Control.
#define | SYSCTL_SRCR0_ADC0 0x00010000
ADC0 Reset Control.
#define | SYSCTL_SRCR0_HIB 0x00000040
HIB Reset Control.
#define | SYSCTL_SRCR0_WDT0 0x00000008
WDT0 Reset Control.
#define | SYSCTL_SRCR1_EPI0 0x40000000
The following are defines for the bit fields in the SYSCTL_SRCR1 register.
#define | SYSCTL_SRCR1_I2S0 0x10000000
I2S0 Reset Control.
#define | SYSCTL_SRCR1_COMP2 0x04000000
Analog Comp 2 Reset Control.
#define | SYSCTL_SRCR1_COMP1 0x02000000
Analog Comp 1 Reset Control.
#define | SYSCTL_SRCR1_COMP0 0x01000000
Analog Comp 0 Reset Control.
#define | SYSCTL_SRCR1_TIMER3 0x00080000
Timer 3 Reset Control.
#define | SYSCTL_SRCR1_TIMER2 0x00040000
Timer 2 Reset Control.
#define | SYSCTL_SRCR1_TIMER1 0x00020000
Timer 1 Reset Control.
#define | SYSCTL_SRCR1_TIMER0 0x00010000
Timer 0 Reset Control.
#define | SYSCTL_SRCR1_I2C1 0x00004000
I2C1 Reset Control.
#define | SYSCTL_SRCR1_I2C0 0x00001000
I2C0 Reset Control.
#define | SYSCTL_SRCR1_QEI1 0x00000200
QEI1 Reset Control.
#define | SYSCTL_SRCR1_QEI0 0x00000100
QEI0 Reset Control.
#define | SYSCTL_SRCR1_SSI1 0x00000020
SSI1 Reset Control.
#define | SYSCTL_SRCR1_SSI0 0x00000010
SSI0 Reset Control.
#define | SYSCTL_SRCR1_UART2 0x00000004
UART2 Reset Control.
#define | SYSCTL_SRCR1_UART1 0x00000002
UART1 Reset Control.
#define | SYSCTL_SRCR1_UART0 0x00000001
UART0 Reset Control.
#define | SYSCTL_SRCR2_EPHY0 0x40000000
The following are defines for the bit fields in the SYSCTL_SRCR2 register.
#define | SYSCTL_SRCR2_EMAC0 0x10000000
MAC0 Reset Control.
#define | SYSCTL_SRCR2_USB0 0x00010000
USB0 Reset Control.
#define | SYSCTL_SRCR2_UDMA 0x00002000
Micro-DMA Reset Control.
#define | SYSCTL_SRCR2_GPIOJ 0x00000100
Port J Reset Control.
#define | SYSCTL_SRCR2_GPIOH 0x00000080
Port H Reset Control.
#define | SYSCTL_SRCR2_GPIOG 0x00000040
Port G Reset Control.
#define | SYSCTL_SRCR2_GPIOF 0x00000020
Port F Reset Control.
#define | SYSCTL_SRCR2_GPIOE 0x00000010
Port E Reset Control.
#define | SYSCTL_SRCR2_GPIOD 0x00000008
Port D Reset Control.
#define | SYSCTL_SRCR2_GPIOC 0x00000004
Port C Reset Control.
#define | SYSCTL_SRCR2_GPIOB 0x00000002
Port B Reset Control.
#define | SYSCTL_SRCR2_GPIOA 0x00000001
Port A Reset Control.
#define | SYSCTL_RIS_MOSCPUPRIS 0x00000100
The following are defines for the bit fields in the SYSCTL_RIS register.
#define | SYSCTL_RIS_USBPLLLRIS 0x00000080
USB PLL Lock Raw Interrupt.
#define | SYSCTL_RIS_PLLLRIS 0x00000040
PLL Lock Raw Interrupt Status.
#define | SYSCTL_RIS_CLRIS 0x00000020
Current Limit Raw Interrupt.
#define | SYSCTL_RIS_IOFRIS 0x00000010
Internal Oscillator Fault Raw.
#define | SYSCTL_RIS_MOFRIS 0x00000008
Main Oscillator Fault Raw.
#define | SYSCTL_RIS_LDORIS 0x00000004
LDO Power Unregulated Raw.
#define | SYSCTL_RIS_BORRIS 0x00000002
Brown-Out Reset Raw Interrupt.
#define | SYSCTL_RIS_PLLFRIS 0x00000001
PLL Fault Raw Interrupt Status.
#define | SYSCTL_IMC_MOSCPUPIM 0x00000100
The following are defines for the bit fields in the SYSCTL_IMC register.
#define | SYSCTL_IMC_USBPLLLIM 0x00000080
USB PLL Lock Interrupt Mask.
#define | SYSCTL_IMC_PLLLIM 0x00000040
PLL Lock Interrupt Mask.
#define | SYSCTL_IMC_CLIM 0x00000020
Current Limit Interrupt Mask.
#define | SYSCTL_IMC_IOFIM 0x00000010
Internal Oscillator Fault.
#define | SYSCTL_IMC_MOFIM 0x00000008
Main Oscillator Fault Interrupt.
#define | SYSCTL_IMC_LDOIM 0x00000004
LDO Power Unregulated Interrupt.
#define | SYSCTL_IMC_BORIM 0x00000002
Brown-Out Reset Interrupt Mask.
#define | SYSCTL_IMC_PLLFIM 0x00000001
PLL Fault Interrupt Mask.
#define | SYSCTL_MISC_MOSCPUPMIS 0x00000100
The following are defines for the bit fields in the SYSCTL_MISC register.
#define | SYSCTL_MISC_USBPLLLMIS 0x00000080
USB PLL Lock Masked Interrupt.
#define | SYSCTL_MISC_PLLLMIS 0x00000040
PLL Lock Masked Interrupt Status.
#define | SYSCTL_MISC_CLMIS 0x00000020
Current Limit Masked Interrupt.
#define | SYSCTL_MISC_IOFMIS 0x00000010
Internal Oscillator Fault Masked.
#define | SYSCTL_MISC_MOFMIS 0x00000008
Main Oscillator Fault Masked.
#define | SYSCTL_MISC_LDOMIS 0x00000004
LDO Power Unregulated Masked.
#define | SYSCTL_MISC_BORMIS 0x00000002
BOR Masked Interrupt Status.
#define | SYSCTL_RESC_MOSCFAIL 0x00010000
The following are defines for the bit fields in the SYSCTL_RESC register.
#define | SYSCTL_RESC_LDO 0x00000020
LDO Reset.
#define | SYSCTL_RESC_WDT1 0x00000020
Watchdog Timer 1 Reset.
#define | SYSCTL_RESC_SW 0x00000010
Software Reset.
#define | SYSCTL_RESC_WDT0 0x00000008
Watchdog Timer 0 Reset.
#define | SYSCTL_RESC_BOR 0x00000004
Brown-Out Reset.
#define | SYSCTL_RESC_POR 0x00000002
Power-On Reset.
#define | SYSCTL_RESC_EXT 0x00000001
External Reset.
#define | SYSCTL_RCC_ACG 0x08000000
The following are defines for the bit fields in the SYSCTL_RCC register.
#define | SYSCTL_RCC_SYSDIV_M 0x07800000
System Clock Divisor.
#define | SYSCTL_RCC_SYSDIV_2 0x00800000
System clock /2.
#define | SYSCTL_RCC_SYSDIV_3 0x01000000
System clock /3.
#define | SYSCTL_RCC_SYSDIV_4 0x01800000
System clock /4.
#define | SYSCTL_RCC_SYSDIV_5 0x02000000
System clock /5.
#define | SYSCTL_RCC_SYSDIV_6 0x02800000
System clock /6.
#define | SYSCTL_RCC_SYSDIV_7 0x03000000
System clock /7.
#define | SYSCTL_RCC_SYSDIV_8 0x03800000
System clock /8.
#define | SYSCTL_RCC_SYSDIV_9 0x04000000
System clock /9.
#define | SYSCTL_RCC_SYSDIV_10 0x04800000
System clock /10.
#define | SYSCTL_RCC_SYSDIV_11 0x05000000
System clock /11.
#define | SYSCTL_RCC_SYSDIV_12 0x05800000
System clock /12.
#define | SYSCTL_RCC_SYSDIV_13 0x06000000
System clock /13.
#define | SYSCTL_RCC_SYSDIV_14 0x06800000
System clock /14.
#define | SYSCTL_RCC_SYSDIV_15 0x07000000
System clock /15.
#define | SYSCTL_RCC_SYSDIV_16 0x07800000
System clock /16.
#define | SYSCTL_RCC_USESYSDIV 0x00400000
Enable System Clock Divider.
#define | SYSCTL_RCC_USEPWMDIV 0x00100000
Enable PWM Clock Divisor.
#define | SYSCTL_RCC_PWMDIV_M 0x000E0000
PWM Unit Clock Divisor.
#define | SYSCTL_RCC_PWMDIV_2 0x00000000
PWM clock /2.
#define | SYSCTL_RCC_PWMDIV_4 0x00020000
PWM clock /4.
#define | SYSCTL_RCC_PWMDIV_8 0x00040000
PWM clock /8.
#define | SYSCTL_RCC_PWMDIV_16 0x00060000
PWM clock /16.
#define | SYSCTL_RCC_PWMDIV_32 0x00080000
PWM clock /32.
#define | SYSCTL_RCC_PWMDIV_64 0x000A0000
PWM clock /64.
#define | SYSCTL_RCC_PWRDN 0x00002000
PLL Power Down.
#define | SYSCTL_RCC_OEN 0x00001000
PLL Output Enable.
#define | SYSCTL_RCC_BYPASS 0x00000800
PLL Bypass.
#define | SYSCTL_RCC_XTAL_M 0x000007C0
Crystal Value.
#define | SYSCTL_RCC_XTAL_1MHZ 0x00000000
1 MHz
#define | SYSCTL_RCC_XTAL_1_84MHZ 0x00000040
1.8432 MHz
#define | SYSCTL_RCC_XTAL_2MHZ 0x00000080
2 MHz
#define | SYSCTL_RCC_XTAL_2_45MHZ 0x000000C0
2.4576 MHz
#define | SYSCTL_RCC_XTAL_3_57MHZ 0x00000100
3.579545 MHz
#define | SYSCTL_RCC_XTAL_3_68MHZ 0x00000140
3.6864 MHz
#define | SYSCTL_RCC_XTAL_4MHZ 0x00000180
4 MHz
#define | SYSCTL_RCC_XTAL_4_09MHZ 0x000001C0
4.096 MHz
#define | SYSCTL_RCC_XTAL_4_91MHZ 0x00000200
4.9152 MHz
#define | SYSCTL_RCC_XTAL_5MHZ 0x00000240
5 MHz
#define | SYSCTL_RCC_XTAL_5_12MHZ 0x00000280
5.12 MHz
#define | SYSCTL_RCC_XTAL_6MHZ 0x000002C0
6 MHz
#define | SYSCTL_RCC_XTAL_6_14MHZ 0x00000300
6.144 MHz
#define | SYSCTL_RCC_XTAL_7_37MHZ 0x00000340
7.3728 MHz
#define | SYSCTL_RCC_XTAL_8MHZ 0x00000380
8 MHz
#define | SYSCTL_RCC_XTAL_8_19MHZ 0x000003C0
8.192 MHz
#define | SYSCTL_RCC_XTAL_10MHZ 0x00000400
10 MHz
#define | SYSCTL_RCC_XTAL_12MHZ 0x00000440
12 MHz
#define | SYSCTL_RCC_XTAL_12_2MHZ 0x00000480
12.288 MHz
#define | SYSCTL_RCC_XTAL_13_5MHZ 0x000004C0
13.56 MHz
#define | SYSCTL_RCC_XTAL_14_3MHZ 0x00000500
14.31818 MHz
#define | SYSCTL_RCC_XTAL_16MHZ 0x00000540
16 MHz
#define | SYSCTL_RCC_XTAL_16_3MHZ 0x00000580
16.384 MHz
#define | SYSCTL_RCC_PLLVER 0x00000400
PLL Verification.
#define | SYSCTL_RCC_OSCSRC_M 0x00000030
Oscillator Source.
#define | SYSCTL_RCC_OSCSRC_MAIN 0x00000000
MOSC.
#define | SYSCTL_RCC_OSCSRC_INT 0x00000010
IOSC.
#define | SYSCTL_RCC_OSCSRC_INT4 0x00000020
IOSC/4.
#define | SYSCTL_RCC_OSCSRC_30 0x00000030
30 kHz
#define | SYSCTL_RCC_IOSCVER 0x00000008
Internal Oscillator Verification.
#define | SYSCTL_RCC_MOSCVER 0x00000004
Main Oscillator Verification.
#define | SYSCTL_RCC_IOSCDIS 0x00000002
Internal Oscillator Disable.
#define | SYSCTL_RCC_MOSCDIS 0x00000001
Main Oscillator Disable.
#define | SYSCTL_RCC_SYSDIV_S 23
The following are defines for the bit fields in the SYSCTL_RCC register.
#define | SYSCTL_RCC_PWMDIV_S 17
Shift to the PWMDIV field.
#define | SYSCTL_RCC_XTAL_S 6
Shift to the XTAL field.
#define | SYSCTL_RCC_OSCSRC_S 4
Shift to the OSCSRC field.
#define | SYSCTL_PLLCFG_OD_M 0x0000C000
The following are defines for the bit fields in the SYSCTL_PLLCFG register.
#define | SYSCTL_PLLCFG_OD_1 0x00000000
Divide by 1.
#define | SYSCTL_PLLCFG_OD_2 0x00004000
Divide by 2.
#define | SYSCTL_PLLCFG_OD_4 0x00008000
Divide by 4.
#define | SYSCTL_PLLCFG_F_M 0x00003FE0
PLL F Value.
#define | SYSCTL_PLLCFG_R_M 0x0000001F
PLL R Value.
#define | SYSCTL_PLLCFG_F_S 5
The following are defines for the bit fields in the SYSCTL_PLLCFG register.
#define | SYSCTL_PLLCFG_R_S 0
The following are defines for the bit fields in the SYSCTL_PLLCFG register.
#define | SYSCTL_GPIOHSCTL_PORTH 0x00000080
The following are defines for the bit fields in the SYSCTL_GPIOHSCTL register.
#define | SYSCTL_GPIOHSCTL_PORTG 0x00000040
Port G High-Speed.
#define | SYSCTL_GPIOHSCTL_PORTF 0x00000020
Port F High-Speed.
#define | SYSCTL_GPIOHSCTL_PORTE 0x00000010
Port E High-Speed.
#define | SYSCTL_GPIOHSCTL_PORTD 0x00000008
Port D High-Speed.
#define | SYSCTL_GPIOHSCTL_PORTC 0x00000004
Port C High-Speed.
#define | SYSCTL_GPIOHSCTL_PORTB 0x00000002
Port B High-Speed.
#define | SYSCTL_GPIOHSCTL_PORTA 0x00000001
Port A High-Speed.
#define | SYSCTL_GPIOHBCTL_PORTJ 0x00000100
The following are defines for the bit fields in the SYSCTL_GPIOHBCTL register.
#define | SYSCTL_GPIOHBCTL_PORTH 0x00000080
Port H Advanced High-Performance.
#define | SYSCTL_GPIOHBCTL_PORTG 0x00000040
Port G Advanced High-Performance.
#define | SYSCTL_GPIOHBCTL_PORTF 0x00000020
Port F Advanced High-Performance.
#define | SYSCTL_GPIOHBCTL_PORTE 0x00000010
Port E Advanced High-Performance.
#define | SYSCTL_GPIOHBCTL_PORTD 0x00000008
Port D Advanced High-Performance.
#define | SYSCTL_GPIOHBCTL_PORTC 0x00000004
Port C Advanced High-Performance.
#define | SYSCTL_GPIOHBCTL_PORTB 0x00000002
Port B Advanced High-Performance.
#define | SYSCTL_GPIOHBCTL_PORTA 0x00000001
Port A Advanced High-Performance.
#define | SYSCTL_RCC2_USERCC2 0x80000000
The following are defines for the bit fields in the SYSCTL_RCC2 register.
#define | SYSCTL_RCC2_DIV400 0x40000000
Divide PLL as 400 MHz vs.
#define | SYSCTL_RCC2_SYSDIV2_M 0x1F800000
System Clock Divisor 2.
#define | SYSCTL_RCC2_SYSDIV2_2 0x00800000
System clock /2.
#define | SYSCTL_RCC2_SYSDIV2_3 0x01000000
System clock /3.
#define | SYSCTL_RCC2_SYSDIV2_4 0x01800000
System clock /4.
#define | SYSCTL_RCC2_SYSDIV2_5 0x02000000
System clock /5.
#define | SYSCTL_RCC2_SYSDIV2_6 0x02800000
System clock /6.
#define | SYSCTL_RCC2_SYSDIV2_7 0x03000000
System clock /7.
#define | SYSCTL_RCC2_SYSDIV2_8 0x03800000
System clock /8.
#define | SYSCTL_RCC2_SYSDIV2_9 0x04000000
System clock /9.
#define | SYSCTL_RCC2_SYSDIV2_10 0x04800000
System clock /10.
#define | SYSCTL_RCC2_SYSDIV2_11 0x05000000
System clock /11.
#define | SYSCTL_RCC2_SYSDIV2_12 0x05800000
System clock /12.
#define | SYSCTL_RCC2_SYSDIV2_13 0x06000000
System clock /13.
#define | SYSCTL_RCC2_SYSDIV2_14 0x06800000
System clock /14.
#define | SYSCTL_RCC2_SYSDIV2_15 0x07000000
System clock /15.
#define | SYSCTL_RCC2_SYSDIV2_16 0x07800000
System clock /16.
#define | SYSCTL_RCC2_SYSDIV2_17 0x08000000
System clock /17.
#define | SYSCTL_RCC2_SYSDIV2_18 0x08800000
System clock /18.
#define | SYSCTL_RCC2_SYSDIV2_19 0x09000000
System clock /19.
#define | SYSCTL_RCC2_SYSDIV2_20 0x09800000
System clock /20.
#define | SYSCTL_RCC2_SYSDIV2_21 0x0A000000
System clock /21.
#define | SYSCTL_RCC2_SYSDIV2_22 0x0A800000
System clock /22.
#define | SYSCTL_RCC2_SYSDIV2_23 0x0B000000
System clock /23.
#define | SYSCTL_RCC2_SYSDIV2_24 0x0B800000
System clock /24.
#define | SYSCTL_RCC2_SYSDIV2_25 0x0C000000
System clock /25.
#define | SYSCTL_RCC2_SYSDIV2_26 0x0C800000
System clock /26.
#define | SYSCTL_RCC2_SYSDIV2_27 0x0D000000
System clock /27.
#define | SYSCTL_RCC2_SYSDIV2_28 0x0D800000
System clock /28.
#define | SYSCTL_RCC2_SYSDIV2_29 0x0E000000
System clock /29.
#define | SYSCTL_RCC2_SYSDIV2_30 0x0E800000
System clock /30.
#define | SYSCTL_RCC2_SYSDIV2_31 0x0F000000
System clock /31.
#define | SYSCTL_RCC2_SYSDIV2_32 0x0F800000
System clock /32.
#define | SYSCTL_RCC2_SYSDIV2_33 0x10000000
System clock /33.
#define | SYSCTL_RCC2_SYSDIV2_34 0x10800000
System clock /34.
#define | SYSCTL_RCC2_SYSDIV2_35 0x11000000
System clock /35.
#define | SYSCTL_RCC2_SYSDIV2_36 0x11800000
System clock /36.
#define | SYSCTL_RCC2_SYSDIV2_37 0x12000000
System clock /37.
#define | SYSCTL_RCC2_SYSDIV2_38 0x12800000
System clock /38.
#define | SYSCTL_RCC2_SYSDIV2_39 0x13000000
System clock /39.
#define | SYSCTL_RCC2_SYSDIV2_40 0x13800000
System clock /40.
#define | SYSCTL_RCC2_SYSDIV2_41 0x14000000
System clock /41.
#define | SYSCTL_RCC2_SYSDIV2_42 0x14800000
System clock /42.
#define | SYSCTL_RCC2_SYSDIV2_43 0x15000000
System clock /43.
#define | SYSCTL_RCC2_SYSDIV2_44 0x15800000
System clock /44.
#define | SYSCTL_RCC2_SYSDIV2_45 0x16000000
System clock /45.
#define | SYSCTL_RCC2_SYSDIV2_46 0x16800000
System clock /46.
#define | SYSCTL_RCC2_SYSDIV2_47 0x17000000
System clock /47.
#define | SYSCTL_RCC2_SYSDIV2_48 0x17800000
System clock /48.
#define | SYSCTL_RCC2_SYSDIV2_49 0x18000000
System clock /49.
#define | SYSCTL_RCC2_SYSDIV2_50 0x18800000
System clock /50.
#define | SYSCTL_RCC2_SYSDIV2_51 0x19000000
System clock /51.
#define | SYSCTL_RCC2_SYSDIV2_52 0x19800000
System clock /52.
#define | SYSCTL_RCC2_SYSDIV2_53 0x1A000000
System clock /53.
#define | SYSCTL_RCC2_SYSDIV2_54 0x1A800000
System clock /54.
#define | SYSCTL_RCC2_SYSDIV2_55 0x1B000000
System clock /55.
#define | SYSCTL_RCC2_SYSDIV2_56 0x1B800000
System clock /56.
#define | SYSCTL_RCC2_SYSDIV2_57 0x1C000000
System clock /57.
#define | SYSCTL_RCC2_SYSDIV2_58 0x1C800000
System clock /58.
#define | SYSCTL_RCC2_SYSDIV2_59 0x1D000000
System clock /59.
#define | SYSCTL_RCC2_SYSDIV2_60 0x1D800000
System clock /60.
#define | SYSCTL_RCC2_SYSDIV2_61 0x1E000000
System clock /61.
#define | SYSCTL_RCC2_SYSDIV2_62 0x1E800000
System clock /62.
#define | SYSCTL_RCC2_SYSDIV2_63 0x1F000000
System clock /63.
#define | SYSCTL_RCC2_SYSDIV2_64 0x1F800000
System clock /64.
#define | SYSCTL_RCC2_SYSDIV2LSB 0x00400000
Additional LSB for SYSDIV2.
#define | SYSCTL_RCC2_USBPWRDN 0x00004000
Power-Down USB PLL.
#define | SYSCTL_RCC2_PWRDN2 0x00002000
Power-Down PLL 2.
#define | SYSCTL_RCC2_BYPASS2 0x00000800
PLL Bypass 2.
#define | SYSCTL_RCC2_OSCSRC2_M 0x00000070
Oscillator Source 2.
#define | SYSCTL_RCC2_OSCSRC2_MO 0x00000000
MOSC.
#define | SYSCTL_RCC2_OSCSRC2_IO 0x00000010
PIOSC.
#define | SYSCTL_RCC2_OSCSRC2_IO4 0x00000020
PIOSC/4.
#define | SYSCTL_RCC2_OSCSRC2_30 0x00000030
30 kHz
#define | SYSCTL_RCC2_OSCSRC2_419 0x00000060
4.194304 MHz
#define | SYSCTL_RCC2_OSCSRC2_32 0x00000070
32.768 kHz
#define | SYSCTL_RCC2_SYSDIV2_S 23
The following are defines for the bit fields in the SYSCTL_RCC2 register.
#define | SYSCTL_MOSCCTL_CVAL 0x00000001
The following are defines for the bit fields in the SYSCTL_MOSCCTL register.
#define | SYSCTL_RCGC0_WDT1 0x10000000
The following are defines for the bit fields in the SYSCTL_RCGC0 register.
#define | SYSCTL_RCGC0_CAN2 0x04000000
CAN2 Clock Gating Control.
#define | SYSCTL_RCGC0_CAN1 0x02000000
CAN1 Clock Gating Control.
#define | SYSCTL_RCGC0_CAN0 0x01000000
CAN0 Clock Gating Control.
#define | SYSCTL_RCGC0_PWM 0x00100000
PWM Clock Gating Control.
#define | SYSCTL_RCGC0_ADC1 0x00020000
ADC1 Clock Gating Control.
#define | SYSCTL_RCGC0_ADC0 0x00010000
ADC0 Clock Gating Control.
#define | SYSCTL_RCGC0_ADCSPD_M 0x00000F00
ADC Sample Speed.
#define | SYSCTL_RCGC0_ADCSPD125K 0x00000000
125K samples/second
#define | SYSCTL_RCGC0_ADCSPD250K 0x00000100
250K samples/second
#define | SYSCTL_RCGC0_ADCSPD500K 0x00000200
500K samples/second
#define | SYSCTL_RCGC0_ADCSPD1M 0x00000300
1M samples/second
#define | SYSCTL_RCGC0_ADC1SPD_M 0x00000C00
ADC1 Sample Speed.
#define | SYSCTL_RCGC0_ADC1SPD_125K 0x00000000
125K samples/second
#define | SYSCTL_RCGC0_ADC1SPD_250K 0x00000400
250K samples/second
#define | SYSCTL_RCGC0_ADC1SPD_500K 0x00000800
500K samples/second
#define | SYSCTL_RCGC0_ADC1SPD_1M 0x00000C00
1M samples/second
#define | SYSCTL_RCGC0_ADC0SPD_M 0x00000300
ADC0 Sample Speed.
#define | SYSCTL_RCGC0_ADC0SPD_125K 0x00000000
125K samples/second
#define | SYSCTL_RCGC0_ADC0SPD_250K 0x00000100
250K samples/second
#define | SYSCTL_RCGC0_ADC0SPD_500K 0x00000200
500K samples/second
#define | SYSCTL_RCGC0_ADC0SPD_1M 0x00000300
1M samples/second
#define | SYSCTL_RCGC0_HIB 0x00000040
HIB Clock Gating Control.
#define | SYSCTL_RCGC0_WDT0 0x00000008
WDT0 Clock Gating Control.
#define | SYSCTL_RCGC1_EPI0 0x40000000
The following are defines for the bit fields in the SYSCTL_RCGC1 register.
#define | SYSCTL_RCGC1_I2S0 0x10000000
I2S0 Clock Gating.
#define | SYSCTL_RCGC1_COMP2 0x04000000
Analog Comparator 2 Clock Gating.
#define | SYSCTL_RCGC1_COMP1 0x02000000
Analog Comparator 1 Clock Gating.
#define | SYSCTL_RCGC1_COMP0 0x01000000
Analog Comparator 0 Clock Gating.
#define | SYSCTL_RCGC1_TIMER3 0x00080000
Timer 3 Clock Gating Control.
#define | SYSCTL_RCGC1_TIMER2 0x00040000
Timer 2 Clock Gating Control.
#define | SYSCTL_RCGC1_TIMER1 0x00020000
Timer 1 Clock Gating Control.
#define | SYSCTL_RCGC1_TIMER0 0x00010000
Timer 0 Clock Gating Control.
#define | SYSCTL_RCGC1_I2C1 0x00004000
I2C1 Clock Gating Control.
#define | SYSCTL_RCGC1_I2C0 0x00001000
I2C0 Clock Gating Control.
#define | SYSCTL_RCGC1_QEI1 0x00000200
QEI1 Clock Gating Control.
#define | SYSCTL_RCGC1_QEI0 0x00000100
QEI0 Clock Gating Control.
#define | SYSCTL_RCGC1_SSI1 0x00000020
SSI1 Clock Gating Control.
#define | SYSCTL_RCGC1_SSI0 0x00000010
SSI0 Clock Gating Control.
#define | SYSCTL_RCGC1_UART2 0x00000004
UART2 Clock Gating Control.
#define | SYSCTL_RCGC1_UART1 0x00000002
UART1 Clock Gating Control.
#define | SYSCTL_RCGC1_UART0 0x00000001
UART0 Clock Gating Control.
#define | SYSCTL_RCGC2_EPHY0 0x40000000
The following are defines for the bit fields in the SYSCTL_RCGC2 register.
#define | SYSCTL_RCGC2_EMAC0 0x10000000
MAC0 Clock Gating Control.
#define | SYSCTL_RCGC2_USB0 0x00010000
USB0 Clock Gating Control.
#define | SYSCTL_RCGC2_UDMA 0x00002000
Micro-DMA Clock Gating Control.
#define | SYSCTL_RCGC2_GPIOJ 0x00000100
Port J Clock Gating Control.
#define | SYSCTL_RCGC2_GPIOH 0x00000080
Port H Clock Gating Control.
#define | SYSCTL_RCGC2_GPIOG 0x00000040
Port G Clock Gating Control.
#define | SYSCTL_RCGC2_GPIOF 0x00000020
Port F Clock Gating Control.
#define | SYSCTL_RCGC2_GPIOE 0x00000010
Port E Clock Gating Control.
#define | SYSCTL_RCGC2_GPIOD 0x00000008
Port D Clock Gating Control.
#define | SYSCTL_RCGC2_GPIOC 0x00000004
Port C Clock Gating Control.
#define | SYSCTL_RCGC2_GPIOB 0x00000002
Port B Clock Gating Control.
#define | SYSCTL_RCGC2_GPIOA 0x00000001
Port A Clock Gating Control.
#define | SYSCTL_SCGC0_WDT1 0x10000000
The following are defines for the bit fields in the SYSCTL_SCGC0 register.
#define | SYSCTL_SCGC0_CAN2 0x04000000
CAN2 Clock Gating Control.
#define | SYSCTL_SCGC0_CAN1 0x02000000
CAN1 Clock Gating Control.
#define | SYSCTL_SCGC0_CAN0 0x01000000
CAN0 Clock Gating Control.
#define | SYSCTL_SCGC0_PWM 0x00100000
PWM Clock Gating Control.
#define | SYSCTL_SCGC0_ADC1 0x00020000
ADC1 Clock Gating Control.
#define | SYSCTL_SCGC0_ADC0 0x00010000
ADC0 Clock Gating Control.
#define | SYSCTL_SCGC0_ADCSPD_M 0x00000F00
ADC Sample Speed.
#define | SYSCTL_SCGC0_ADCSPD125K 0x00000000
125K samples/second
#define | SYSCTL_SCGC0_ADCSPD250K 0x00000100
250K samples/second
#define | SYSCTL_SCGC0_ADCSPD500K 0x00000200
500K samples/second
#define | SYSCTL_SCGC0_ADCSPD1M 0x00000300
1M samples/second
#define | SYSCTL_SCGC0_ADC1SPD_M 0x00000C00
ADC1 Sample Speed.
#define | SYSCTL_SCGC0_ADC1SPD_125K 0x00000000
125K samples/second
#define | SYSCTL_SCGC0_ADC1SPD_250K 0x00000400
250K samples/second
#define | SYSCTL_SCGC0_ADC1SPD_500K 0x00000800
500K samples/second
#define | SYSCTL_SCGC0_ADC1SPD_1M 0x00000C00
1M samples/second
#define | SYSCTL_SCGC0_ADC0SPD_M 0x00000300
ADC0 Sample Speed.
#define | SYSCTL_SCGC0_ADC0SPD_125K 0x00000000
125K samples/second
#define | SYSCTL_SCGC0_ADC0SPD_250K 0x00000100
250K samples/second
#define | SYSCTL_SCGC0_ADC0SPD_500K 0x00000200
500K samples/second
#define | SYSCTL_SCGC0_ADC0SPD_1M 0x00000300
1M samples/second
#define | SYSCTL_SCGC0_HIB 0x00000040
HIB Clock Gating Control.
#define | SYSCTL_SCGC0_WDT0 0x00000008
WDT0 Clock Gating Control.
#define | SYSCTL_SCGC1_EPI0 0x40000000
The following are defines for the bit fields in the SYSCTL_SCGC1 register.
#define | SYSCTL_SCGC1_I2S0 0x10000000
I2S0 Clock Gating.
#define | SYSCTL_SCGC1_COMP2 0x04000000
Analog Comparator 2 Clock Gating.
#define | SYSCTL_SCGC1_COMP1 0x02000000
Analog Comparator 1 Clock Gating.
#define | SYSCTL_SCGC1_COMP0 0x01000000
Analog Comparator 0 Clock Gating.
#define | SYSCTL_SCGC1_TIMER3 0x00080000
Timer 3 Clock Gating Control.
#define | SYSCTL_SCGC1_TIMER2 0x00040000
Timer 2 Clock Gating Control.
#define | SYSCTL_SCGC1_TIMER1 0x00020000
Timer 1 Clock Gating Control.
#define | SYSCTL_SCGC1_TIMER0 0x00010000
Timer 0 Clock Gating Control.
#define | SYSCTL_SCGC1_I2C1 0x00004000
I2C1 Clock Gating Control.
#define | SYSCTL_SCGC1_I2C0 0x00001000
I2C0 Clock Gating Control.
#define | SYSCTL_SCGC1_QEI1 0x00000200
QEI1 Clock Gating Control.
#define | SYSCTL_SCGC1_QEI0 0x00000100
QEI0 Clock Gating Control.
#define | SYSCTL_SCGC1_SSI1 0x00000020
SSI1 Clock Gating Control.
#define | SYSCTL_SCGC1_SSI0 0x00000010
SSI0 Clock Gating Control.
#define | SYSCTL_SCGC1_UART2 0x00000004
UART2 Clock Gating Control.
#define | SYSCTL_SCGC1_UART1 0x00000002
UART1 Clock Gating Control.
#define | SYSCTL_SCGC1_UART0 0x00000001
UART0 Clock Gating Control.
#define | SYSCTL_SCGC2_EPHY0 0x40000000
The following are defines for the bit fields in the SYSCTL_SCGC2 register.
#define | SYSCTL_SCGC2_EMAC0 0x10000000
MAC0 Clock Gating Control.
#define | SYSCTL_SCGC2_USB0 0x00010000
USB0 Clock Gating Control.
#define | SYSCTL_SCGC2_UDMA 0x00002000
Micro-DMA Clock Gating Control.
#define | SYSCTL_SCGC2_GPIOJ 0x00000100
Port J Clock Gating Control.
#define | SYSCTL_SCGC2_GPIOH 0x00000080
Port H Clock Gating Control.
#define | SYSCTL_SCGC2_GPIOG 0x00000040
Port G Clock Gating Control.
#define | SYSCTL_SCGC2_GPIOF 0x00000020
Port F Clock Gating Control.
#define | SYSCTL_SCGC2_GPIOE 0x00000010
Port E Clock Gating Control.
#define | SYSCTL_SCGC2_GPIOD 0x00000008
Port D Clock Gating Control.
#define | SYSCTL_SCGC2_GPIOC 0x00000004
Port C Clock Gating Control.
#define | SYSCTL_SCGC2_GPIOB 0x00000002
Port B Clock Gating Control.
#define | SYSCTL_SCGC2_GPIOA 0x00000001
Port A Clock Gating Control.
#define | SYSCTL_DCGC0_WDT1 0x10000000
The following are defines for the bit fields in the SYSCTL_DCGC0 register.
#define | SYSCTL_DCGC0_CAN2 0x04000000
CAN2 Clock Gating Control.
#define | SYSCTL_DCGC0_CAN1 0x02000000
CAN1 Clock Gating Control.
#define | SYSCTL_DCGC0_CAN0 0x01000000
CAN0 Clock Gating Control.
#define | SYSCTL_DCGC0_PWM 0x00100000
PWM Clock Gating Control.
#define | SYSCTL_DCGC0_ADC1 0x00020000
ADC1 Clock Gating Control.
#define | SYSCTL_DCGC0_ADC0 0x00010000
ADC0 Clock Gating Control.
#define | SYSCTL_DCGC0_HIB 0x00000040
HIB Clock Gating Control.
#define | SYSCTL_DCGC0_WDT0 0x00000008
WDT0 Clock Gating Control.
#define | SYSCTL_DCGC1_EPI0 0x40000000
The following are defines for the bit fields in the SYSCTL_DCGC1 register.
#define | SYSCTL_DCGC1_I2S0 0x10000000
I2S0 Clock Gating.
#define | SYSCTL_DCGC1_COMP2 0x04000000
Analog Comparator 2 Clock Gating.
#define | SYSCTL_DCGC1_COMP1 0x02000000
Analog Comparator 1 Clock Gating.
#define | SYSCTL_DCGC1_COMP0 0x01000000
Analog Comparator 0 Clock Gating.
#define | SYSCTL_DCGC1_TIMER3 0x00080000
Timer 3 Clock Gating Control.
#define | SYSCTL_DCGC1_TIMER2 0x00040000
Timer 2 Clock Gating Control.
#define | SYSCTL_DCGC1_TIMER1 0x00020000
Timer 1 Clock Gating Control.
#define | SYSCTL_DCGC1_TIMER0 0x00010000
Timer 0 Clock Gating Control.
#define | SYSCTL_DCGC1_I2C1 0x00004000
I2C1 Clock Gating Control.
#define | SYSCTL_DCGC1_I2C0 0x00001000
I2C0 Clock Gating Control.
#define | SYSCTL_DCGC1_QEI1 0x00000200
QEI1 Clock Gating Control.
#define | SYSCTL_DCGC1_QEI0 0x00000100
QEI0 Clock Gating Control.
#define | SYSCTL_DCGC1_SSI1 0x00000020
SSI1 Clock Gating Control.
#define | SYSCTL_DCGC1_SSI0 0x00000010
SSI0 Clock Gating Control.
#define | SYSCTL_DCGC1_UART2 0x00000004
UART2 Clock Gating Control.
#define | SYSCTL_DCGC1_UART1 0x00000002
UART1 Clock Gating Control.
#define | SYSCTL_DCGC1_UART0 0x00000001
UART0 Clock Gating Control.
#define | SYSCTL_DCGC2_EPHY0 0x40000000
The following are defines for the bit fields in the SYSCTL_DCGC2 register.
#define | SYSCTL_DCGC2_EMAC0 0x10000000
MAC0 Clock Gating Control.
#define | SYSCTL_DCGC2_USB0 0x00010000
USB0 Clock Gating Control.
#define | SYSCTL_DCGC2_UDMA 0x00002000
Micro-DMA Clock Gating Control.
#define | SYSCTL_DCGC2_GPIOJ 0x00000100
Port J Clock Gating Control.
#define | SYSCTL_DCGC2_GPIOH 0x00000080
Port H Clock Gating Control.
#define | SYSCTL_DCGC2_GPIOG 0x00000040
Port G Clock Gating Control.
#define | SYSCTL_DCGC2_GPIOF 0x00000020
Port F Clock Gating Control.
#define | SYSCTL_DCGC2_GPIOE 0x00000010
Port E Clock Gating Control.
#define | SYSCTL_DCGC2_GPIOD 0x00000008
Port D Clock Gating Control.
#define | SYSCTL_DCGC2_GPIOC 0x00000004
Port C Clock Gating Control.
#define | SYSCTL_DCGC2_GPIOB 0x00000002
Port B Clock Gating Control.
#define | SYSCTL_DCGC2_GPIOA 0x00000001
Port A Clock Gating Control.
#define | SYSCTL_DSLPCLKCFG_D_M 0x1F800000
The following are defines for the bit fields in the SYSCTL_DSLPCLKCFG register.
#define | SYSCTL_DSLPCLKCFG_D_1 0x00000000
System clock /1.
#define | SYSCTL_DSLPCLKCFG_D_2 0x00800000
System clock /2.
#define | SYSCTL_DSLPCLKCFG_D_3 0x01000000
System clock /3.
#define | SYSCTL_DSLPCLKCFG_D_4 0x01800000
System clock /4.
#define | SYSCTL_DSLPCLKCFG_D_5 0x02000000
System clock /5.
#define | SYSCTL_DSLPCLKCFG_D_6 0x02800000
System clock /6.
#define | SYSCTL_DSLPCLKCFG_D_7 0x03000000
System clock /7.
#define | SYSCTL_DSLPCLKCFG_D_8 0x03800000
System clock /8.
#define | SYSCTL_DSLPCLKCFG_D_9 0x04000000
System clock /9.
#define | SYSCTL_DSLPCLKCFG_D_10 0x04800000
System clock /10.
#define | SYSCTL_DSLPCLKCFG_D_11 0x05000000
System clock /11.
#define | SYSCTL_DSLPCLKCFG_D_12 0x05800000
System clock /12.
#define | SYSCTL_DSLPCLKCFG_D_13 0x06000000
System clock /13.
#define | SYSCTL_DSLPCLKCFG_D_14 0x06800000
System clock /14.
#define | SYSCTL_DSLPCLKCFG_D_15 0x07000000
System clock /15.
#define | SYSCTL_DSLPCLKCFG_D_16 0x07800000
System clock /16.
#define | SYSCTL_DSLPCLKCFG_D_17 0x08000000
System clock /17.
#define | SYSCTL_DSLPCLKCFG_D_18 0x08800000
System clock /18.
#define | SYSCTL_DSLPCLKCFG_D_19 0x09000000
System clock /19.
#define | SYSCTL_DSLPCLKCFG_D_20 0x09800000
System clock /20.
#define | SYSCTL_DSLPCLKCFG_D_21 0x0A000000
System clock /21.
#define | SYSCTL_DSLPCLKCFG_D_22 0x0A800000
System clock /22.
#define | SYSCTL_DSLPCLKCFG_D_23 0x0B000000
System clock /23.
#define | SYSCTL_DSLPCLKCFG_D_24 0x0B800000
System clock /24.
#define | SYSCTL_DSLPCLKCFG_D_25 0x0C000000
System clock /25.
#define | SYSCTL_DSLPCLKCFG_D_26 0x0C800000
System clock /26.
#define | SYSCTL_DSLPCLKCFG_D_27 0x0D000000
System clock /27.
#define | SYSCTL_DSLPCLKCFG_D_28 0x0D800000
System clock /28.
#define | SYSCTL_DSLPCLKCFG_D_29 0x0E000000
System clock /29.
#define | SYSCTL_DSLPCLKCFG_D_30 0x0E800000
System clock /30.
#define | SYSCTL_DSLPCLKCFG_D_31 0x0F000000
System clock /31.
#define | SYSCTL_DSLPCLKCFG_D_32 0x0F800000
System clock /32.
#define | SYSCTL_DSLPCLKCFG_D_33 0x10000000
System clock /33.
#define | SYSCTL_DSLPCLKCFG_D_34 0x10800000
System clock /34.
#define | SYSCTL_DSLPCLKCFG_D_35 0x11000000
System clock /35.
#define | SYSCTL_DSLPCLKCFG_D_36 0x11800000
System clock /36.
#define | SYSCTL_DSLPCLKCFG_D_37 0x12000000
System clock /37.
#define | SYSCTL_DSLPCLKCFG_D_38 0x12800000
System clock /38.
#define | SYSCTL_DSLPCLKCFG_D_39 0x13000000
System clock /39.
#define | SYSCTL_DSLPCLKCFG_D_40 0x13800000
System clock /40.
#define | SYSCTL_DSLPCLKCFG_D_41 0x14000000
System clock /41.
#define | SYSCTL_DSLPCLKCFG_D_42 0x14800000
System clock /42.
#define | SYSCTL_DSLPCLKCFG_D_43 0x15000000
System clock /43.
#define | SYSCTL_DSLPCLKCFG_D_44 0x15800000
System clock /44.
#define | SYSCTL_DSLPCLKCFG_D_45 0x16000000
System clock /45.
#define | SYSCTL_DSLPCLKCFG_D_46 0x16800000
System clock /46.
#define | SYSCTL_DSLPCLKCFG_D_47 0x17000000
System clock /47.
#define | SYSCTL_DSLPCLKCFG_D_48 0x17800000
System clock /48.
#define | SYSCTL_DSLPCLKCFG_D_49 0x18000000
System clock /49.
#define | SYSCTL_DSLPCLKCFG_D_50 0x18800000
System clock /50.
#define | SYSCTL_DSLPCLKCFG_D_51 0x19000000
System clock /51.
#define | SYSCTL_DSLPCLKCFG_D_52 0x19800000
System clock /52.
#define | SYSCTL_DSLPCLKCFG_D_53 0x1A000000
System clock /53.
#define | SYSCTL_DSLPCLKCFG_D_54 0x1A800000
System clock /54.
#define | SYSCTL_DSLPCLKCFG_D_55 0x1B000000
System clock /55.
#define | SYSCTL_DSLPCLKCFG_D_56 0x1B800000
System clock /56.
#define | SYSCTL_DSLPCLKCFG_D_57 0x1C000000
System clock /57.
#define | SYSCTL_DSLPCLKCFG_D_58 0x1C800000
System clock /58.
#define | SYSCTL_DSLPCLKCFG_D_59 0x1D000000
System clock /59.
#define | SYSCTL_DSLPCLKCFG_D_60 0x1D800000
System clock /60.
#define | SYSCTL_DSLPCLKCFG_D_61 0x1E000000
System clock /61.
#define | SYSCTL_DSLPCLKCFG_D_62 0x1E800000
System clock /62.
#define | SYSCTL_DSLPCLKCFG_D_63 0x1F000000
System clock /63.
#define | SYSCTL_DSLPCLKCFG_D_64 0x1F800000
System clock /64.
#define | SYSCTL_DSLPCLKCFG_O_M 0x00000070
Clock Source.
#define | SYSCTL_DSLPCLKCFG_O_IGN 0x00000000
MOSC.
#define | SYSCTL_DSLPCLKCFG_O_IO 0x00000010
PIOSC.
#define | SYSCTL_DSLPCLKCFG_O_30 0x00000030
30 kHz
#define | SYSCTL_DSLPCLKCFG_O_32 0x00000070
32.768 kHz
#define | SYSCTL_DSLPCLKCFG_IOSC 0x00000001
IOSC Clock Source.
#define | SYSCTL_DSLPCLKCFG_D_S 23
The following are defines for the bit fields in the SYSCTL_DSLPCLKCFG register.
#define | SYSCTL_CLKVCLR_VERCLR 0x00000001
The following are defines for the bit fields in the SYSCTL_CLKVCLR register.
#define | SYSCTL_PIOSCCAL_UTEN 0x80000000
The following are defines for the bit fields in the SYSCTL_PIOSCCAL register.
#define | SYSCTL_PIOSCCAL_CAL 0x00000200
Start Calibration.
#define | SYSCTL_PIOSCCAL_UPDATE 0x00000100
Update Trim.
#define | SYSCTL_PIOSCCAL_UT_M 0x0000007F
User Trim Value.
#define | SYSCTL_PIOSCCAL_UT_S 0
The following are defines for the bit fields in the SYSCTL_PIOSCCAL register.
#define | SYSCTL_PIOSCSTAT_DT_M 0x007F0000
The following are defines for the bit fields in the SYSCTL_PIOSCSTAT register.
#define | SYSCTL_PIOSCSTAT_CR_M 0x00000300
Calibration Result.
#define | SYSCTL_PIOSCSTAT_CRNONE 0x00000000
Calibration has not been.
#define | SYSCTL_PIOSCSTAT_CRPASS 0x00000100
The last calibration operation.
#define | SYSCTL_PIOSCSTAT_CRFAIL 0x00000200
The last calibration operation.
#define | SYSCTL_PIOSCSTAT_CT_M 0x0000007F
Calibration Trim Value.
#define | SYSCTL_PIOSCSTAT_DT_S 16
The following are defines for the bit fields in the SYSCTL_PIOSCSTAT register.
#define | SYSCTL_PIOSCSTAT_CT_S 0
The following are defines for the bit fields in the SYSCTL_PIOSCSTAT register.
#define | SYSCTL_LDOARST_LDOARST 0x00000001
The following are defines for the bit fields in the SYSCTL_LDOARST register.
#define | SYSCTL_I2SMCLKCFG_RXEN 0x80000000
The following are defines for the bit fields in the SYSCTL_I2SMCLKCFG register.
#define | SYSCTL_I2SMCLKCFG_RXI_M 0x3FF00000
RX Clock Integer Input.
#define | SYSCTL_I2SMCLKCFG_RXF_M 0x000F0000
RX Clock Fractional Input.
#define | SYSCTL_I2SMCLKCFG_TXEN 0x00008000
TX Clock Enable.
#define | SYSCTL_I2SMCLKCFG_TXI_M 0x00003FF0
TX Clock Integer Input.
#define | SYSCTL_I2SMCLKCFG_TXF_M 0x0000000F
TX Clock Fractional Input.
#define | SYSCTL_I2SMCLKCFG_RXI_S 20
The following are defines for the bit fields in the SYSCTL_I2SMCLKCFG register.
#define | SYSCTL_I2SMCLKCFG_RXF_S 16
The following are defines for the bit fields in the SYSCTL_I2SMCLKCFG register.
#define | SYSCTL_I2SMCLKCFG_TXI_S 4
The following are defines for the bit fields in the SYSCTL_I2SMCLKCFG register.
#define | SYSCTL_I2SMCLKCFG_TXF_S 0
The following are defines for the bit fields in the SYSCTL_I2SMCLKCFG register.
#define | SYSCTL_DC9_ADC1DC7 0x00800000
The following are defines for the bit fields in the SYSCTL_DC9 register.
#define | SYSCTL_DC9_ADC1DC6 0x00400000
ADC1 DC6 Present.
#define | SYSCTL_DC9_ADC1DC5 0x00200000
ADC1 DC5 Present.
#define | SYSCTL_DC9_ADC1DC4 0x00100000
ADC1 DC4 Present.
#define | SYSCTL_DC9_ADC1DC3 0x00080000
ADC1 DC3 Present.
#define | SYSCTL_DC9_ADC1DC2 0x00040000
ADC1 DC2 Present.
#define | SYSCTL_DC9_ADC1DC1 0x00020000
ADC1 DC1 Present.
#define | SYSCTL_DC9_ADC1DC0 0x00010000
ADC1 DC0 Present.
#define | SYSCTL_DC9_ADC0DC7 0x00000080
ADC0 DC7 Present.
#define | SYSCTL_DC9_ADC0DC6 0x00000040
ADC0 DC6 Present.
#define | SYSCTL_DC9_ADC0DC5 0x00000020
ADC0 DC5 Present.
#define | SYSCTL_DC9_ADC0DC4 0x00000010
ADC0 DC4 Present.
#define | SYSCTL_DC9_ADC0DC3 0x00000008
ADC0 DC3 Present.
#define | SYSCTL_DC9_ADC0DC2 0x00000004
ADC0 DC2 Present.
#define | SYSCTL_DC9_ADC0DC1 0x00000002
ADC0 DC1 Present.
#define | SYSCTL_DC9_ADC0DC0 0x00000001
ADC0 DC0 Present.
#define | SYSCTL_NVMSTAT_TPSW 0x00000010
The following are defines for the bit fields in the SYSCTL_NVMSTAT register.
#define | SYSCTL_NVMSTAT_FWB 0x00000001
32 Word Flash Write Buffer
#define | SYSCTL_USER0 0x400FE1E0
The following are deprecated defines for the System Control register addresses.
#define | SYSCTL_USER1 0x400FE1E4
NV User Register 1.
#define | SYSCTL_DID0_VER_MASK 0x70000000
The following are deprecated defines for the bit fields in the SYSCTL_DID0 register.
#define | SYSCTL_DID0_CLASS_MASK 0x00FF0000
Device Class.
#define | SYSCTL_DID0_MAJ_MASK 0x0000FF00
Major revision mask.
#define | SYSCTL_DID0_MAJ_A 0x00000000
Major revision A.
#define | SYSCTL_DID0_MAJ_B 0x00000100
Major revision B.
#define | SYSCTL_DID0_MAJ_C 0x00000200
Major revision C.
#define | SYSCTL_DID0_MIN_MASK 0x000000FF
Minor revision mask.
#define | SYSCTL_DID1_VER_MASK 0xF0000000
The following are deprecated defines for the bit fields in the SYSCTL_DID1 register.
#define | SYSCTL_DID1_FAM_MASK 0x0F000000
Family mask.
#define | SYSCTL_DID1_FAM_S 0x00000000
Stellaris family.
#define | SYSCTL_DID1_PRTNO_MASK 0x00FF0000
Part number mask.
#define | SYSCTL_DID1_PINCNT_MASK 0x0000E000
Pin count.
#define | SYSCTL_DID1_TEMP_MASK 0x000000E0
Temperature range mask.
#define | SYSCTL_DID1_PKG_MASK 0x00000018
Package mask.
#define | SYSCTL_DID1_PKG_48QFP 0x00000008
QFP package.
#define | SYSCTL_DID1_QUAL_MASK 0x00000003
Qualification status mask.
#define | SYSCTL_DID1_PKG_28SOIC 0x00000000
SOIC package.
#define | SYSCTL_DID1_PRTNO_SHIFT 16
The following are deprecated defines for the bit fields in the SYSCTL_DID1 register.
#define | SYSCTL_DC0_SRAMSZ_MASK 0xFFFF0000
The following are deprecated defines for the bit fields in the SYSCTL_DC0 register.
#define | SYSCTL_DC0_FLASHSZ_MASK 0x0000FFFF
Flash size mask.
#define | SYSCTL_DC1_ADC 0x00010000
The following are deprecated defines for the bit fields in the SYSCTL_DC1 register.
#define | SYSCTL_DC1_SYSDIV_MASK 0x0000F000
Minimum system divider mask.
#define | SYSCTL_DC1_ADCSPD_MASK 0x00000F00
ADC speed mask.
#define | SYSCTL_DC1_WDOG 0x00000008
Watchdog present.
#define | SYSCTL_DC1_WDT 0x00000008
Watchdog Timer Present.
#define | SYSCTL_DC2_I2C 0x00001000
The following are deprecated defines for the bit fields in the SYSCTL_DC2 register.
#define | SYSCTL_DC2_QEI 0x00000100
QEI present.
#define | SYSCTL_DC2_SSI 0x00000010
SSI present.
#define | SYSCTL_DC3_ADC7 0x00800000
The following are deprecated defines for the bit fields in the SYSCTL_DC3 register.
#define | SYSCTL_DC3_ADC6 0x00400000
ADC6 Pin Present.
#define | SYSCTL_DC3_ADC5 0x00200000
ADC5 Pin Present.
#define | SYSCTL_DC3_ADC4 0x00100000
ADC4 Pin Present.
#define | SYSCTL_DC3_ADC3 0x00080000
ADC3 Pin Present.
#define | SYSCTL_DC3_ADC2 0x00040000
ADC2 Pin Present.
#define | SYSCTL_DC3_ADC1 0x00020000
ADC1 Pin Present.
#define | SYSCTL_DC3_ADC0 0x00010000
ADC0 Pin Present.
#define | SYSCTL_DC3_MC_FAULT0 0x00008000
MC0 fault pin present.
#define | SYSCTL_PBORCTL_BOR_MASK 0x0000FFFC
The following are deprecated defines for the bit fields in the SYSCTL_PBORCTL register.
#define | SYSCTL_PBORCTL_BOR_SH 2
The following are deprecated defines for the bit fields in the SYSCTL_PBORCTL register.
#define | SYSCTL_LDOPCTL_MASK 0x0000003F
The following are deprecated defines for the bit fields in the SYSCTL_LDOPCTL register.
#define | SYSCTL_SRCR0_ADC 0x00010000
The following are deprecated defines for the bit fields in the SYSCTL_SRCR0 register.
#define | SYSCTL_SRCR0_WDT 0x00000008
WDT Reset Control.
#define | SYSCTL_RESC_WDOG 0x00000008
The following are deprecated defines for the bit fields in the SYSCTL_RESC register.
#define | SYSCTL_RESC_WDT 0x00000008
Watchdog Timer Reset.
#define | SYSCTL_RCC_SYSDIV_MASK 0x07800000
The following are deprecated defines for the bit fields in the SYSCTL_RCC register.
#define | SYSCTL_RCC_USE_SYSDIV 0x00400000
Use sytem clock divider.
#define | SYSCTL_RCC_USE_PWMDIV 0x00100000
Use PWM clock divider.
#define | SYSCTL_RCC_PWMDIV_MASK 0x000E0000
PWM clock divider.
#define | SYSCTL_RCC_OE 0x00001000
PLL output enable.
#define | SYSCTL_RCC_XTAL_3_68MHz 0x00000140
Using a 3.6864 MHz crystal.
#define | SYSCTL_RCC_XTAL_4MHz 0x00000180
Using a 4 MHz crystal.
#define | SYSCTL_RCC_XTAL_MASK 0x000003C0
Crystal attached to main osc.
#define | SYSCTL_RCC_OSCSRC_MASK 0x00000030
Oscillator input select.
#define | SYSCTL_RCC_SYSDIV_SHIFT 23
Shift to the SYSDIV field.
#define | SYSCTL_RCC_PWMDIV_SHIFT 17
Shift to the PWMDIV field.
#define | SYSCTL_RCC_XTAL_SHIFT 6
Shift to the XTAL field.
#define | SYSCTL_RCC_OSCSRC_SHIFT 4
Shift to the OSCSRC field.
#define | SYSCTL_PLLCFG_OD_MASK 0x0000C000
The following are deprecated defines for the bit fields in the SYSCTL_PLLCFG register.
#define | SYSCTL_PLLCFG_F_MASK 0x00003FE0
PLL multiplier.
#define | SYSCTL_PLLCFG_R_MASK 0x0000001F
Input predivider.
#define | SYSCTL_PLLCFG_F_SHIFT 5
The following are deprecated defines for the bit fields in the SYSCTL_PLLCFG register.
#define | SYSCTL_PLLCFG_R_SHIFT 0
The following are deprecated defines for the bit fields in the SYSCTL_PLLCFG register.
#define | SYSCTL_RCC2_USEFRACT 0x40000000
The following are deprecated defines for the bit fields in the SYSCTL_RCC2 register.
#define | SYSCTL_RCC2_SYSDIV2_MSK 0x1F800000
System clock divider.
#define | SYSCTL_RCC2_FRACT 0x00400000
Fractional divide.
#define | SYSCTL_RCC2_OSCSRC2_MSK 0x00000070
Oscillator input select.
#define | SYSCTL_RCGC0_ADC 0x00010000
The following are deprecated defines for the bit fields in the SYSCTL_RCGC0 register.
#define | SYSCTL_RCGC0_WDT 0x00000008
WDT Clock Gating Control.
#define | SYSCTL_SCGC0_ADC 0x00010000
The following are deprecated defines for the bit fields in the SYSCTL_SCGC0 register.
#define | SYSCTL_SCGC0_WDT 0x00000008
WDT Clock Gating Control.
#define | SYSCTL_DCGC0_ADC 0x00010000
The following are deprecated defines for the bit fields in the SYSCTL_DCGC0 register.
#define | SYSCTL_DCGC0_WDT 0x00000008
WDT Clock Gating Control.
#define | SYSCTL_DSLPCLKCFG_D_MSK 0x1F800000
The following are deprecated defines for the bit fields in the SYSCTL_DSLPCLKCFG register.
#define | SYSCTL_DSLPCLKCFG_O_MSK 0x00000070
Deep sleep oscillator override.
#define | SYSCTL_CLKVCLR_CLR 0x00000001
The following are deprecated defines for the bit fields in the SYSCTL_CLKVCLR register.
#define | SYSCTL_LDOARST_ARST 0x00000001
The following are deprecated defines for the bit fields in the SYSCTL_LDOARST register.
#define | SYSCTL_SET0_CAN2 0x04000000
The following are deprecated defines for the bit fields in the SYSCTL_SRCR0, SYSCTL_RCGC0, SYSCTL_SCGC0, and SYSCTL_DCGC0 registers.
#define | SYSCTL_SET0_CAN1 0x02000000
CAN 1 module.
#define | SYSCTL_SET0_CAN0 0x01000000
CAN 0 module.
#define | SYSCTL_SET0_PWM 0x00100000
PWM module.
#define | SYSCTL_SET0_ADC 0x00010000
ADC module.
#define | SYSCTL_SET0_ADCSPD_MASK 0x00000F00
ADC speed mask.
#define | SYSCTL_SET0_ADCSPD_125K 0x00000000
125Ksps ADC
#define | SYSCTL_SET0_ADCSPD_250K 0x00000100
250Ksps ADC
#define | SYSCTL_SET0_ADCSPD_500K 0x00000200
500Ksps ADC
#define | SYSCTL_SET0_ADCSPD_1M 0x00000300
1Msps ADC
#define | SYSCTL_SET0_HIB 0x00000040
Hibernation module.
#define | SYSCTL_SET0_WDOG 0x00000008
Watchdog module.
#define | SYSCTL_SET1_COMP2 0x04000000
The following are deprecated defines for the bit fields in the SYSCTL_SRCR1, SYSCTL_RCGC1, SYSCTL_SCGC1, and SYSCTL_DCGC1 registers.
#define | SYSCTL_SET1_COMP1 0x02000000
Analog comparator module 1.
#define | SYSCTL_SET1_COMP0 0x01000000
Analog comparator module 0.
#define | SYSCTL_SET1_TIMER3 0x00080000
Timer module 3.
#define | SYSCTL_SET1_TIMER2 0x00040000
Timer module 2.
#define | SYSCTL_SET1_TIMER1 0x00020000
Timer module 1.
#define | SYSCTL_SET1_TIMER0 0x00010000
Timer module 0.
#define | SYSCTL_SET1_I2C1 0x00002000
I2C module 1.
#define | SYSCTL_SET1_I2C0 0x00001000
I2C module 0.
#define | SYSCTL_SET1_I2C 0x00001000
I2C module.
#define | SYSCTL_SET1_QEI1 0x00000200
QEI module 1.
#define | SYSCTL_SET1_QEI 0x00000100
QEI module.
#define | SYSCTL_SET1_QEI0 0x00000100
QEI module 0.
#define | SYSCTL_SET1_SSI1 0x00000020
SSI module 1.
#define | SYSCTL_SET1_SSI0 0x00000010
SSI module 0.
#define | SYSCTL_SET1_SSI 0x00000010
SSI module.
#define | SYSCTL_SET1_UART2 0x00000004
UART module 2.
#define | SYSCTL_SET1_UART1 0x00000002
UART module 1.
#define | SYSCTL_SET1_UART0 0x00000001
UART module 0.
#define | SYSCTL_SET2_ETH 0x50000000
The following are deprecated defines for the bit fields in the SYSCTL_SRCR2, SYSCTL_RCGC2, SYSCTL_SCGC2, and SYSCTL_DCGC2 registers.
#define | SYSCTL_SET2_GPIOH 0x00000080
GPIO H module.
#define | SYSCTL_SET2_GPIOG 0x00000040
GPIO G module.
#define | SYSCTL_SET2_GPIOF 0x00000020
GPIO F module.
#define | SYSCTL_SET2_GPIOE 0x00000010
GPIO E module.
#define | SYSCTL_SET2_GPIOD 0x00000008
GPIO D module.
#define | SYSCTL_SET2_GPIOC 0x00000004
GPIO C module.
#define | SYSCTL_SET2_GPIOB 0x00000002
GPIO B module.
#define | SYSCTL_SET2_GPIOA 0x00000001
GIPO A module.
#define | SYSCTL_INT_PLL_LOCK 0x00000040
The following are deprecated defines for the bit fields in the SYSCTL_RIS, SYSCTL_IMC, and SYSCTL_IMS registers.
#define | SYSCTL_INT_CUR_LIMIT 0x00000020
Current limit interrupt.
#define | SYSCTL_INT_IOSC_FAIL 0x00000010
Internal oscillator failure int.
#define | SYSCTL_INT_MOSC_FAIL 0x00000008
Main oscillator failure int.
#define | SYSCTL_INT_POR 0x00000004
Power on reset interrupt.
#define | SYSCTL_INT_BOR 0x00000002
Brown out interrupt.
#define | SYSCTL_INT_PLL_FAIL 0x00000001
PLL failure interrupt.

Detailed Description

LM3S1968 system control hardware.

Definition in file lm3s_sysctl.h.

Define Documentation

#define SYSCTL_CLKVCLR_CLR 0x00000001

The following are deprecated defines for the bit fields in the SYSCTL_CLKVCLR register.

Clear clock verification fault

Definition at line 1599 of file lm3s_sysctl.h.

#define SYSCTL_CLKVCLR_VERCLR 0x00000001

The following are defines for the bit fields in the SYSCTL_CLKVCLR register.

Clock Verification Clear

Definition at line 1304 of file lm3s_sysctl.h.

#define SYSCTL_DC0_SRAMSZ_M 0xFFFF0000

The following are defines for the bit fields in the SYSCTL_DC0 register.

SRAM Size

Definition at line 353 of file lm3s_sysctl.h.

#define SYSCTL_DC0_SRAMSZ_MASK 0xFFFF0000

The following are deprecated defines for the bit fields in the SYSCTL_DC0 register.

SRAM size mask

Definition at line 1438 of file lm3s_sysctl.h.

#define SYSCTL_DC1_ADC 0x00010000

The following are deprecated defines for the bit fields in the SYSCTL_DC1 register.

ADC Module Present

Definition at line 1447 of file lm3s_sysctl.h.

#define SYSCTL_DC1_MINSYSDIV_20 0x00009000

Specifies a 20-MHz clock with a.

PLL divider of 10

Definition at line 398 of file lm3s_sysctl.h.

#define SYSCTL_DC1_MINSYSDIV_25 0x00007000

Specifies a 25-MHz clock with a.

PLL divider of 8

Definition at line 396 of file lm3s_sysctl.h.

#define SYSCTL_DC1_MINSYSDIV_50 0x00003000

Specifies a 50-MHz CPU clock.

with a PLL divider of 4

Definition at line 394 of file lm3s_sysctl.h.

#define SYSCTL_DC1_MINSYSDIV_66 0x00002000

Divide VCO (400MHZ) by 2*2 + 2 =.

6 minimum

Definition at line 392 of file lm3s_sysctl.h.

#define SYSCTL_DC1_WDT1 0x10000000

The following are defines for the bit fields in the SYSCTL_DC1 register.

Watchdog Timer1 Present

Definition at line 382 of file lm3s_sysctl.h.

#define SYSCTL_DC2_EPI0 0x40000000

The following are defines for the bit fields in the SYSCTL_DC2 register.

EPI Module 0 Present

Definition at line 423 of file lm3s_sysctl.h.

#define SYSCTL_DC2_I2C 0x00001000

The following are deprecated defines for the bit fields in the SYSCTL_DC2 register.

I2C present

Definition at line 1459 of file lm3s_sysctl.h.

#define SYSCTL_DC3_32KHZ 0x80000000

The following are defines for the bit fields in the SYSCTL_DC3 register.

32KHz Input Clock Available

Definition at line 447 of file lm3s_sysctl.h.

#define SYSCTL_DC3_ADC7 0x00800000

The following are deprecated defines for the bit fields in the SYSCTL_DC3 register.

ADC7 Pin Present

Definition at line 1469 of file lm3s_sysctl.h.

#define SYSCTL_DC4_ETH 0x50000000

The following are defines for the bit fields in the SYSCTL_DC4 register.

Ethernet present

Definition at line 484 of file lm3s_sysctl.h.

#define SYSCTL_DC5_PWMFAULT3 0x08000000

The following are defines for the bit fields in the SYSCTL_DC5 register.

PWM Fault 3 Pin Present

Definition at line 508 of file lm3s_sysctl.h.

#define SYSCTL_DC6_USB0PHY 0x00000010

The following are defines for the bit fields in the SYSCTL_DC6 register.

USB Module 0 PHY Present

Definition at line 528 of file lm3s_sysctl.h.

#define SYSCTL_DC7_DMACH30 0x40000000

The following are defines for the bit fields in the SYSCTL_DC7 register.

SW

Definition at line 539 of file lm3s_sysctl.h.

#define SYSCTL_DC8 0x400FE02C

Device Capabilities 8 ADC.

Channels

Definition at line 53 of file lm3s_sysctl.h.

#define SYSCTL_DC8_ADC1AIN15 0x80000000

The following are defines for the bit fields in the SYSCTL_DC8 register.

ADC Module 1 AIN15 Pin Present

Definition at line 590 of file lm3s_sysctl.h.

#define SYSCTL_DC9 0x400FE190

Device Capabilities 9 ADC.

Digital Comparators

Definition at line 99 of file lm3s_sysctl.h.

#define SYSCTL_DC9_ADC1DC7 0x00800000

The following are defines for the bit fields in the SYSCTL_DC9 register.

ADC1 DC7 Present

Definition at line 1365 of file lm3s_sysctl.h.

#define SYSCTL_DCGC0 0x400FE120

Deep Sleep Mode Clock Gating.

Control Register 0

Definition at line 84 of file lm3s_sysctl.h.

#define SYSCTL_DCGC0_ADC 0x00010000

The following are deprecated defines for the bit fields in the SYSCTL_DCGC0 register.

ADC0 Clock Gating Control

Definition at line 1581 of file lm3s_sysctl.h.

#define SYSCTL_DCGC0_WDT1 0x10000000

The following are defines for the bit fields in the SYSCTL_DCGC0 register.

WDT1 Clock Gating Control

Definition at line 1167 of file lm3s_sysctl.h.

#define SYSCTL_DCGC1 0x400FE124

Deep-Sleep Mode Clock Gating.

Control Register 1

Definition at line 86 of file lm3s_sysctl.h.

#define SYSCTL_DCGC1_EPI0 0x40000000

The following are defines for the bit fields in the SYSCTL_DCGC1 register.

EPI0 Clock Gating

Definition at line 1182 of file lm3s_sysctl.h.

#define SYSCTL_DCGC2 0x400FE128

Deep Sleep Mode Clock Gating.

Control Register 2

Definition at line 88 of file lm3s_sysctl.h.

#define SYSCTL_DCGC2_EPHY0 0x40000000

The following are defines for the bit fields in the SYSCTL_DCGC2 register.

PHY0 Clock Gating Control

Definition at line 1206 of file lm3s_sysctl.h.

#define SYSCTL_DID0 0x400FE000

The following are defines for the System Control register addresses.

Device Identification 0

Definition at line 43 of file lm3s_sysctl.h.

#define SYSCTL_DID0_CLASS_DUSTDEVIL 0x00030000

Stellaris(R) DustDevil-class.

devices

Definition at line 118 of file lm3s_sysctl.h.

#define SYSCTL_DID0_CLASS_TEMPEST 0x00040000

Stellaris(R) Tempest-class.

microcontrollers

Definition at line 121 of file lm3s_sysctl.h.

#define SYSCTL_DID0_MAJ_REVB 0x00000100

Revision B (first base layer.

revision)

Definition at line 126 of file lm3s_sysctl.h.

#define SYSCTL_DID0_MAJ_REVC 0x00000200

Revision C (second base layer.

revision)

Definition at line 128 of file lm3s_sysctl.h.

#define SYSCTL_DID0_MIN_0 0x00000000

Initial device, or a major.

revision update

Definition at line 131 of file lm3s_sysctl.h.

#define SYSCTL_DID0_VER_0 0x00000000

Initial DID0 register format.

definition for Stellaris(R) Sandstorm-class devices

Definition at line 109 of file lm3s_sysctl.h.

#define SYSCTL_DID0_VER_1 0x10000000

Second version of the DID0.

register format

Definition at line 112 of file lm3s_sysctl.h.

#define SYSCTL_DID0_VER_M 0x70000000

The following are defines for the bit fields in the SYSCTL_DID0 register.

DID0 Version

Definition at line 108 of file lm3s_sysctl.h.

#define SYSCTL_DID0_VER_MASK 0x70000000

The following are deprecated defines for the bit fields in the SYSCTL_DID0 register.

DID0 version mask

Definition at line 1406 of file lm3s_sysctl.h.

#define SYSCTL_DID1_FAM_STELLARIS 0x00000000

Stellaris family of.

microcontollers, that is, all devices with external part numbers starting with LM3S

Definition at line 151 of file lm3s_sysctl.h.

#define SYSCTL_DID1_PRTNO_SHIFT 16

The following are deprecated defines for the bit fields in the SYSCTL_DID1 register.

Register version mask

Definition at line 1430 of file lm3s_sysctl.h.

#define SYSCTL_DID1_TEMP_C 0x00000000

Commercial temperature range (0C.

to 70C)

Definition at line 330 of file lm3s_sysctl.h.

#define SYSCTL_DID1_TEMP_E 0x00000040

Extended temperature range (-40C.

to 105C)

Definition at line 334 of file lm3s_sysctl.h.

#define SYSCTL_DID1_TEMP_I 0x00000020

Industrial temperature range.

(-40C to 85C)

Definition at line 332 of file lm3s_sysctl.h.

#define SYSCTL_DID1_VER_0 0x00000000

Initial DID1 register format.

definition, indicating a Stellaris LM3Snnn device

Definition at line 145 of file lm3s_sysctl.h.

#define SYSCTL_DID1_VER_1 0x10000000

Second version of the DID1.

register format

Definition at line 148 of file lm3s_sysctl.h.

#define SYSCTL_DID1_VER_M 0xF0000000

The following are defines for the bit fields in the SYSCTL_DID1 register.

DID1 Version

Definition at line 144 of file lm3s_sysctl.h.

#define SYSCTL_DID1_VER_MASK 0xF0000000

The following are deprecated defines for the bit fields in the SYSCTL_DID1 register.

Register version mask

Definition at line 1420 of file lm3s_sysctl.h.

#define SYSCTL_DSLPCLKCFG_D_M 0x1F800000

The following are defines for the bit fields in the SYSCTL_DSLPCLKCFG register.

Divider Field Override

Definition at line 1226 of file lm3s_sysctl.h.

#define SYSCTL_DSLPCLKCFG_D_MSK 0x1F800000

The following are deprecated defines for the bit fields in the SYSCTL_DSLPCLKCFG register.

Deep sleep system clock override

Definition at line 1590 of file lm3s_sysctl.h.

#define SYSCTL_DSLPCLKCFG_D_S 23

The following are defines for the bit fields in the SYSCTL_DSLPCLKCFG register.

Divider Field Override

Definition at line 1297 of file lm3s_sysctl.h.

#define SYSCTL_GPIOHBCTL 0x400FE06C

GPIO High-Performance Bus.

Control

Definition at line 68 of file lm3s_sysctl.h.

#define SYSCTL_GPIOHBCTL_PORTA 0x00000001

Port A Advanced High-Performance.

Bus

Definition at line 909 of file lm3s_sysctl.h.

#define SYSCTL_GPIOHBCTL_PORTB 0x00000002

Port B Advanced High-Performance.

Bus

Definition at line 907 of file lm3s_sysctl.h.

#define SYSCTL_GPIOHBCTL_PORTC 0x00000004

Port C Advanced High-Performance.

Bus

Definition at line 905 of file lm3s_sysctl.h.

#define SYSCTL_GPIOHBCTL_PORTD 0x00000008

Port D Advanced High-Performance.

Bus

Definition at line 903 of file lm3s_sysctl.h.

#define SYSCTL_GPIOHBCTL_PORTE 0x00000010

Port E Advanced High-Performance.

Bus

Definition at line 901 of file lm3s_sysctl.h.

#define SYSCTL_GPIOHBCTL_PORTF 0x00000020

Port F Advanced High-Performance.

Bus

Definition at line 899 of file lm3s_sysctl.h.

#define SYSCTL_GPIOHBCTL_PORTG 0x00000040

Port G Advanced High-Performance.

Bus

Definition at line 897 of file lm3s_sysctl.h.

#define SYSCTL_GPIOHBCTL_PORTH 0x00000080

Port H Advanced High-Performance.

Bus

Definition at line 895 of file lm3s_sysctl.h.

#define SYSCTL_GPIOHBCTL_PORTJ 0x00000100

The following are defines for the bit fields in the SYSCTL_GPIOHBCTL register.

Port J Advanced High-Performance Bus

Definition at line 893 of file lm3s_sysctl.h.

#define SYSCTL_GPIOHSCTL_PORTH 0x00000080

The following are defines for the bit fields in the SYSCTL_GPIOHSCTL register.

Port H High-Speed

Definition at line 878 of file lm3s_sysctl.h.

#define SYSCTL_I2SMCLKCFG_RXEN 0x80000000

The following are defines for the bit fields in the SYSCTL_I2SMCLKCFG register.

RX Clock Enable

Definition at line 1349 of file lm3s_sysctl.h.

#define SYSCTL_I2SMCLKCFG_RXF_S 16

The following are defines for the bit fields in the SYSCTL_I2SMCLKCFG register.

RX Clock Enable

Definition at line 1356 of file lm3s_sysctl.h.

#define SYSCTL_I2SMCLKCFG_RXI_S 20

The following are defines for the bit fields in the SYSCTL_I2SMCLKCFG register.

RX Clock Enable

Definition at line 1355 of file lm3s_sysctl.h.

#define SYSCTL_I2SMCLKCFG_TXF_S 0

The following are defines for the bit fields in the SYSCTL_I2SMCLKCFG register.

RX Clock Enable

Definition at line 1358 of file lm3s_sysctl.h.

#define SYSCTL_I2SMCLKCFG_TXI_S 4

The following are defines for the bit fields in the SYSCTL_I2SMCLKCFG register.

RX Clock Enable

Definition at line 1357 of file lm3s_sysctl.h.

#define SYSCTL_IMC_IOFIM 0x00000010

Internal Oscillator Fault.

Interrupt Mask

Definition at line 740 of file lm3s_sysctl.h.

#define SYSCTL_IMC_LDOIM 0x00000004

LDO Power Unregulated Interrupt.

Mask

Definition at line 744 of file lm3s_sysctl.h.

#define SYSCTL_IMC_MOFIM 0x00000008

Main Oscillator Fault Interrupt.

Mask

Definition at line 742 of file lm3s_sysctl.h.

#define SYSCTL_IMC_MOSCPUPIM 0x00000100

The following are defines for the bit fields in the SYSCTL_IMC register.

MOSC Power Up Interrupt Mask

Definition at line 736 of file lm3s_sysctl.h.

#define SYSCTL_INT_PLL_LOCK 0x00000040

The following are deprecated defines for the bit fields in the SYSCTL_RIS, SYSCTL_IMC, and SYSCTL_IMS registers.

PLL lock interrupt

Definition at line 1676 of file lm3s_sysctl.h.

#define SYSCTL_LDOARST 0x400FE160

Allow Unregulated LDO to Reset.

the Part

Definition at line 96 of file lm3s_sysctl.h.

#define SYSCTL_LDOARST_ARST 0x00000001

The following are deprecated defines for the bit fields in the SYSCTL_LDOARST register.

Allow LDO to reset device

Definition at line 1607 of file lm3s_sysctl.h.

#define SYSCTL_LDOARST_LDOARST 0x00000001

The following are defines for the bit fields in the SYSCTL_LDOARST register.

LDO Reset

Definition at line 1341 of file lm3s_sysctl.h.

#define SYSCTL_LDOPCTL_M 0x0000003F

The following are defines for the bit fields in the SYSCTL_LDOPCTL register.

LDO Output Voltage

Definition at line 638 of file lm3s_sysctl.h.

#define SYSCTL_LDOPCTL_MASK 0x0000003F

The following are deprecated defines for the bit fields in the SYSCTL_LDOPCTL register.

Voltage adjust mask

Definition at line 1494 of file lm3s_sysctl.h.

#define SYSCTL_MISC 0x400FE058

Masked Interrupt Status and.

Clear

Definition at line 62 of file lm3s_sysctl.h.

#define SYSCTL_MISC_CLMIS 0x00000020

Current Limit Masked Interrupt.

Status

Definition at line 759 of file lm3s_sysctl.h.

#define SYSCTL_MISC_IOFMIS 0x00000010

Internal Oscillator Fault Masked.

Interrupt Status

Definition at line 761 of file lm3s_sysctl.h.

#define SYSCTL_MISC_LDOMIS 0x00000004

LDO Power Unregulated Masked.

Interrupt Status

Definition at line 765 of file lm3s_sysctl.h.

#define SYSCTL_MISC_MOFMIS 0x00000008

Main Oscillator Fault Masked.

Interrupt Status

Definition at line 763 of file lm3s_sysctl.h.

#define SYSCTL_MISC_MOSCPUPMIS 0x00000100

The following are defines for the bit fields in the SYSCTL_MISC register.

MOSC Power Up Masked Interrupt Status

Definition at line 754 of file lm3s_sysctl.h.

#define SYSCTL_MISC_USBPLLLMIS 0x00000080

USB PLL Lock Masked Interrupt.

Status

Definition at line 756 of file lm3s_sysctl.h.

#define SYSCTL_MOSCCTL_CVAL 0x00000001

The following are defines for the bit fields in the SYSCTL_MOSCCTL register.

Clock Validation for MOSC

Definition at line 1002 of file lm3s_sysctl.h.

#define SYSCTL_NVMSTAT_FWB 0x00000001

32 Word Flash Write Buffer

Active

Definition at line 1388 of file lm3s_sysctl.h.

#define SYSCTL_NVMSTAT_TPSW 0x00000010

The following are defines for the bit fields in the SYSCTL_NVMSTAT register.

Third Party Software Present

Definition at line 1387 of file lm3s_sysctl.h.

#define SYSCTL_PBORCTL_BOR_MASK 0x0000FFFC

The following are deprecated defines for the bit fields in the SYSCTL_PBORCTL register.

BOR wait timer

Definition at line 1485 of file lm3s_sysctl.h.

#define SYSCTL_PBORCTL_BOR_SH 2

The following are deprecated defines for the bit fields in the SYSCTL_PBORCTL register.

BOR wait timer

Definition at line 1486 of file lm3s_sysctl.h.

#define SYSCTL_PBORCTL_BORTIM_M 0x0000FFFC

The following are defines for the bit fields in the SYSCTL_PBORCTL register.

BOR Time Delay

Definition at line 628 of file lm3s_sysctl.h.

#define SYSCTL_PBORCTL_BORTIM_S 2

The following are defines for the bit fields in the SYSCTL_PBORCTL register.

BOR Time Delay

Definition at line 631 of file lm3s_sysctl.h.

#define SYSCTL_PIOSCCAL 0x400FE150

Precision Internal Oscillator.

Calibration

Definition at line 92 of file lm3s_sysctl.h.

#define SYSCTL_PIOSCCAL_UT_S 0

The following are defines for the bit fields in the SYSCTL_PIOSCCAL register.

Use User Trim Value

Definition at line 1316 of file lm3s_sysctl.h.

#define SYSCTL_PIOSCCAL_UTEN 0x80000000

The following are defines for the bit fields in the SYSCTL_PIOSCCAL register.

Use User Trim Value

Definition at line 1312 of file lm3s_sysctl.h.

#define SYSCTL_PIOSCSTAT 0x400FE154

Precision Internal Oscillator.

Statistics

Definition at line 94 of file lm3s_sysctl.h.

#define SYSCTL_PIOSCSTAT_CRFAIL 0x00000200

The last calibration operation.

failed to meet 1% accuracy

Definition at line 1330 of file lm3s_sysctl.h.

#define SYSCTL_PIOSCSTAT_CRNONE 0x00000000

Calibration has not been.

attempted

Definition at line 1326 of file lm3s_sysctl.h.

#define SYSCTL_PIOSCSTAT_CRPASS 0x00000100

The last calibration operation.

completed to meet 1% accuracy

Definition at line 1328 of file lm3s_sysctl.h.

#define SYSCTL_PIOSCSTAT_CT_S 0

The following are defines for the bit fields in the SYSCTL_PIOSCSTAT register.

Default Trim Value

Definition at line 1334 of file lm3s_sysctl.h.

#define SYSCTL_PIOSCSTAT_DT_M 0x007F0000

The following are defines for the bit fields in the SYSCTL_PIOSCSTAT register.

Default Trim Value

Definition at line 1324 of file lm3s_sysctl.h.

#define SYSCTL_PIOSCSTAT_DT_S 16

The following are defines for the bit fields in the SYSCTL_PIOSCSTAT register.

Default Trim Value

Definition at line 1333 of file lm3s_sysctl.h.

#define SYSCTL_PLLCFG_F_S 5

The following are defines for the bit fields in the SYSCTL_PLLCFG register.

PLL OD Value

Definition at line 869 of file lm3s_sysctl.h.

#define SYSCTL_PLLCFG_F_SHIFT 5

The following are deprecated defines for the bit fields in the SYSCTL_PLLCFG register.

Output divider

Definition at line 1543 of file lm3s_sysctl.h.

#define SYSCTL_PLLCFG_OD_M 0x0000C000

The following are defines for the bit fields in the SYSCTL_PLLCFG register.

PLL OD Value

Definition at line 863 of file lm3s_sysctl.h.

#define SYSCTL_PLLCFG_OD_MASK 0x0000C000

The following are deprecated defines for the bit fields in the SYSCTL_PLLCFG register.

Output divider

Definition at line 1540 of file lm3s_sysctl.h.

#define SYSCTL_PLLCFG_R_S 0

The following are defines for the bit fields in the SYSCTL_PLLCFG register.

PLL OD Value

Definition at line 870 of file lm3s_sysctl.h.

#define SYSCTL_PLLCFG_R_SHIFT 0

The following are deprecated defines for the bit fields in the SYSCTL_PLLCFG register.

Output divider

Definition at line 1544 of file lm3s_sysctl.h.

#define SYSCTL_RCC2_DIV400 0x40000000

Divide PLL as 400 MHz vs.

200 MHz

Definition at line 918 of file lm3s_sysctl.h.

#define SYSCTL_RCC2_SYSDIV2_S 23

The following are defines for the bit fields in the SYSCTL_RCC2 register.

Use RCC2

Definition at line 995 of file lm3s_sysctl.h.

#define SYSCTL_RCC2_USEFRACT 0x40000000

The following are deprecated defines for the bit fields in the SYSCTL_RCC2 register.

Use fractional divider

Definition at line 1552 of file lm3s_sysctl.h.

#define SYSCTL_RCC2_USERCC2 0x80000000

The following are defines for the bit fields in the SYSCTL_RCC2 register.

Use RCC2

Definition at line 917 of file lm3s_sysctl.h.

#define SYSCTL_RCC_ACG 0x08000000

The following are defines for the bit fields in the SYSCTL_RCC register.

Auto Clock Gating

Definition at line 788 of file lm3s_sysctl.h.

#define SYSCTL_RCC_IOSCVER 0x00000008

Internal Oscillator Verification.

Timer

Definition at line 847 of file lm3s_sysctl.h.

#define SYSCTL_RCC_MOSCVER 0x00000004

Main Oscillator Verification.

Timer

Definition at line 849 of file lm3s_sysctl.h.

#define SYSCTL_RCC_SYSDIV_MASK 0x07800000

The following are deprecated defines for the bit fields in the SYSCTL_RCC register.

System clock divider

Definition at line 1520 of file lm3s_sysctl.h.

#define SYSCTL_RCC_SYSDIV_S 23

The following are defines for the bit fields in the SYSCTL_RCC register.

Auto Clock Gating

Definition at line 853 of file lm3s_sysctl.h.

#define SYSCTL_RCGC0 0x400FE100

Run Mode Clock Gating Control.

Register 0

Definition at line 72 of file lm3s_sysctl.h.

#define SYSCTL_RCGC0_ADC 0x00010000

The following are deprecated defines for the bit fields in the SYSCTL_RCGC0 register.

ADC0 Clock Gating Control

Definition at line 1563 of file lm3s_sysctl.h.

#define SYSCTL_RCGC0_WDT1 0x10000000

The following are defines for the bit fields in the SYSCTL_RCGC0 register.

WDT1 Clock Gating Control

Definition at line 1009 of file lm3s_sysctl.h.

#define SYSCTL_RCGC1 0x400FE104

Run Mode Clock Gating Control.

Register 1

Definition at line 74 of file lm3s_sysctl.h.

#define SYSCTL_RCGC1_EPI0 0x40000000

The following are defines for the bit fields in the SYSCTL_RCGC1 register.

EPI0 Clock Gating

Definition at line 1045 of file lm3s_sysctl.h.

#define SYSCTL_RCGC2 0x400FE108

Run Mode Clock Gating Control.

Register 2

Definition at line 76 of file lm3s_sysctl.h.

#define SYSCTL_RCGC2_EPHY0 0x40000000

The following are defines for the bit fields in the SYSCTL_RCGC2 register.

PHY0 Clock Gating Control

Definition at line 1069 of file lm3s_sysctl.h.

#define SYSCTL_RESC_MOSCFAIL 0x00010000

The following are defines for the bit fields in the SYSCTL_RESC register.

MOSC Failure Reset

Definition at line 774 of file lm3s_sysctl.h.

#define SYSCTL_RESC_WDOG 0x00000008

The following are deprecated defines for the bit fields in the SYSCTL_RESC register.

Watchdog reset

Definition at line 1511 of file lm3s_sysctl.h.

#define SYSCTL_RIS_BORRIS 0x00000002

Brown-Out Reset Raw Interrupt.

Status

Definition at line 727 of file lm3s_sysctl.h.

#define SYSCTL_RIS_CLRIS 0x00000020

Current Limit Raw Interrupt.

Status

Definition at line 719 of file lm3s_sysctl.h.

#define SYSCTL_RIS_IOFRIS 0x00000010

Internal Oscillator Fault Raw.

Interrupt Status

Definition at line 721 of file lm3s_sysctl.h.

#define SYSCTL_RIS_LDORIS 0x00000004

LDO Power Unregulated Raw.

Interrupt Status

Definition at line 725 of file lm3s_sysctl.h.

#define SYSCTL_RIS_MOFRIS 0x00000008

Main Oscillator Fault Raw.

Interrupt Status

Definition at line 723 of file lm3s_sysctl.h.

#define SYSCTL_RIS_MOSCPUPRIS 0x00000100

The following are defines for the bit fields in the SYSCTL_RIS register.

MOSC Power Up Raw Interrupt Status

Definition at line 714 of file lm3s_sysctl.h.

#define SYSCTL_RIS_USBPLLLRIS 0x00000080

USB PLL Lock Raw Interrupt.

Status

Definition at line 716 of file lm3s_sysctl.h.

#define SYSCTL_SCGC0 0x400FE110

Sleep Mode Clock Gating Control.

Register 0

Definition at line 78 of file lm3s_sysctl.h.

#define SYSCTL_SCGC0_ADC 0x00010000

The following are deprecated defines for the bit fields in the SYSCTL_SCGC0 register.

ADC0 Clock Gating Control

Definition at line 1572 of file lm3s_sysctl.h.

#define SYSCTL_SCGC0_WDT1 0x10000000

The following are defines for the bit fields in the SYSCTL_SCGC0 register.

WDT1 Clock Gating Control

Definition at line 1088 of file lm3s_sysctl.h.

#define SYSCTL_SCGC1 0x400FE114

Sleep Mode Clock Gating Control.

Register 1

Definition at line 80 of file lm3s_sysctl.h.

#define SYSCTL_SCGC1_EPI0 0x40000000

The following are defines for the bit fields in the SYSCTL_SCGC1 register.

EPI0 Clock Gating

Definition at line 1124 of file lm3s_sysctl.h.

#define SYSCTL_SCGC2 0x400FE118

Sleep Mode Clock Gating Control.

Register 2

Definition at line 82 of file lm3s_sysctl.h.

#define SYSCTL_SCGC2_EPHY0 0x40000000

The following are defines for the bit fields in the SYSCTL_SCGC2 register.

PHY0 Clock Gating Control

Definition at line 1148 of file lm3s_sysctl.h.

#define SYSCTL_SET0_CAN2 0x04000000

The following are deprecated defines for the bit fields in the SYSCTL_SRCR0, SYSCTL_RCGC0, SYSCTL_SCGC0, and SYSCTL_DCGC0 registers.

CAN 2 module

Definition at line 1615 of file lm3s_sysctl.h.

#define SYSCTL_SET1_COMP2 0x04000000

The following are deprecated defines for the bit fields in the SYSCTL_SRCR1, SYSCTL_RCGC1, SYSCTL_SCGC1, and SYSCTL_DCGC1 registers.

Analog comparator module 2

Definition at line 1634 of file lm3s_sysctl.h.

#define SYSCTL_SET2_ETH 0x50000000

The following are deprecated defines for the bit fields in the SYSCTL_SRCR2, SYSCTL_RCGC2, SYSCTL_SCGC2, and SYSCTL_DCGC2 registers.

ETH module

Definition at line 1660 of file lm3s_sysctl.h.

#define SYSCTL_SRCR0_ADC 0x00010000

The following are deprecated defines for the bit fields in the SYSCTL_SRCR0 register.

ADC0 Reset Control

Definition at line 1502 of file lm3s_sysctl.h.

#define SYSCTL_SRCR0_WDT1 0x10000000

The following are defines for the bit fields in the SYSCTL_SRCR0 register.

WDT1 Reset Control

Definition at line 656 of file lm3s_sysctl.h.

#define SYSCTL_SRCR1_EPI0 0x40000000

The following are defines for the bit fields in the SYSCTL_SRCR1 register.

EPI0 Reset Control

Definition at line 671 of file lm3s_sysctl.h.

#define SYSCTL_SRCR2_EPHY0 0x40000000

The following are defines for the bit fields in the SYSCTL_SRCR2 register.

PHY0 Reset Control

Definition at line 695 of file lm3s_sysctl.h.

#define SYSCTL_USER0 0x400FE1E0

The following are deprecated defines for the System Control register addresses.

NV User Register 0

Definition at line 1397 of file lm3s_sysctl.h.


BeRTOS: lm3s_sysctl.h Source File

  • cpu
  • cortex-m3
  • io
lm3s_sysctl.h
Go to the documentation of this file.
00001
00036 #ifndef LM3S_SYSCTL_H
00037 #define LM3S_SYSCTL_H
00038
00042 /*\{*/
00043 #define SYSCTL_DID0             0x400FE000  ///< Device Identification 0
00044 #define SYSCTL_DID1             0x400FE004  ///< Device Identification 1
00045 #define SYSCTL_DC0              0x400FE008  ///< Device Capabilities 0
00046 #define SYSCTL_DC1              0x400FE010  ///< Device Capabilities 1
00047 #define SYSCTL_DC2              0x400FE014  ///< Device Capabilities 2
00048 #define SYSCTL_DC3              0x400FE018  ///< Device Capabilities 3
00049 #define SYSCTL_DC4              0x400FE01C  ///< Device Capabilities 4
00050 #define SYSCTL_DC5              0x400FE020  ///< Device Capabilities 5
00051 #define SYSCTL_DC6              0x400FE024  ///< Device Capabilities 6
00052 #define SYSCTL_DC7              0x400FE028  ///< Device Capabilities 7
00053 #define SYSCTL_DC8              0x400FE02C  ///< Device Capabilities 8 ADC
00054
00055 #define SYSCTL_PBORCTL          0x400FE030  ///< Brown-Out Reset Control
00056 #define SYSCTL_LDOPCTL          0x400FE034  ///< LDO Power Control
00057 #define SYSCTL_SRCR0            0x400FE040  ///< Software Reset Control 0
00058 #define SYSCTL_SRCR1            0x400FE044  ///< Software Reset Control 1
00059 #define SYSCTL_SRCR2            0x400FE048  ///< Software Reset Control 2
00060 #define SYSCTL_RIS              0x400FE050  ///< Raw Interrupt Status
00061 #define SYSCTL_IMC              0x400FE054  ///< Interrupt Mask Control
00062 #define SYSCTL_MISC             0x400FE058  ///< Masked Interrupt Status and
00063
00064 #define SYSCTL_RESC             0x400FE05C  ///< Reset Cause
00065 #define SYSCTL_RCC              0x400FE060  ///< Run-Mode Clock Configuration
00066 #define SYSCTL_PLLCFG           0x400FE064  ///< XTAL to PLL Translation
00067 #define SYSCTL_GPIOHSCTL        0x400FE06C  ///< GPIO High-Speed Control
00068 #define SYSCTL_GPIOHBCTL        0x400FE06C  ///< GPIO High-Performance Bus
00069
00070 #define SYSCTL_RCC2             0x400FE070  ///< Run-Mode Clock Configuration 2
00071 #define SYSCTL_MOSCCTL          0x400FE07C  ///< Main Oscillator Control
00072 #define SYSCTL_RCGC0            0x400FE100  ///< Run Mode Clock Gating Control
00073
00074 #define SYSCTL_RCGC1            0x400FE104  ///< Run Mode Clock Gating Control
00075
00076 #define SYSCTL_RCGC2            0x400FE108  ///< Run Mode Clock Gating Control
00077
00078 #define SYSCTL_SCGC0            0x400FE110  ///< Sleep Mode Clock Gating Control
00079
00080 #define SYSCTL_SCGC1            0x400FE114  ///< Sleep Mode Clock Gating Control
00081
00082 #define SYSCTL_SCGC2            0x400FE118  ///< Sleep Mode Clock Gating Control
00083
00084 #define SYSCTL_DCGC0            0x400FE120  ///< Deep Sleep Mode Clock Gating
00085
00086 #define SYSCTL_DCGC1            0x400FE124  ///< Deep-Sleep Mode Clock Gating
00087
00088 #define SYSCTL_DCGC2            0x400FE128  ///< Deep Sleep Mode Clock Gating
00089
00090 #define SYSCTL_DSLPCLKCFG       0x400FE144  ///< Deep Sleep Clock Configuration
00091 #define SYSCTL_CLKVCLR          0x400FE150  ///< Clock Verification Clear
00092 #define SYSCTL_PIOSCCAL         0x400FE150  ///< Precision Internal Oscillator
00093
00094 #define SYSCTL_PIOSCSTAT        0x400FE154  ///< Precision Internal Oscillator
00095
00096 #define SYSCTL_LDOARST          0x400FE160  ///< Allow Unregulated LDO to Reset
00097
00098 #define SYSCTL_I2SMCLKCFG       0x400FE170  ///< I2S MCLK Configuration
00099 #define SYSCTL_DC9              0x400FE190  ///< Device Capabilities 9 ADC
00100
00101 #define SYSCTL_NVMSTAT          0x400FE1A0  ///< Non-Volatile Memory Information
00102 /*\}*/
00103
00107 /*\{*/
00108 #define SYSCTL_DID0_VER_M       0x70000000  ///< DID0 Version
00109 #define SYSCTL_DID0_VER_0       0x00000000  ///< Initial DID0 register format
00110
00111
00112 #define SYSCTL_DID0_VER_1       0x10000000  ///< Second version of the DID0
00113
00114 #define SYSCTL_DID0_CLASS_M     0x00FF0000  ///< Device Class
00115 #define SYSCTL_DID0_CLASS_SANDSTORM \
00116                                 0x00000000  ///< Sandstorm-class Device
00117 #define SYSCTL_DID0_CLASS_FURY  0x00010000  ///< Stellaris(R) Fury-class devices
00118 #define SYSCTL_DID0_CLASS_DUSTDEVIL \
00119                                 0x00030000  ///< Stellaris(R) DustDevil-class
00120
00121 #define SYSCTL_DID0_CLASS_TEMPEST \
00122                                 0x00040000  ///< Stellaris(R) Tempest-class
00123
00124 #define SYSCTL_DID0_MAJ_M       0x0000FF00  ///< Major Revision
00125 #define SYSCTL_DID0_MAJ_REVA    0x00000000  ///< Revision A (initial device)
00126 #define SYSCTL_DID0_MAJ_REVB    0x00000100  ///< Revision B (first base layer
00127
00128 #define SYSCTL_DID0_MAJ_REVC    0x00000200  ///< Revision C (second base layer
00129
00130 #define SYSCTL_DID0_MIN_M       0x000000FF  ///< Minor Revision
00131 #define SYSCTL_DID0_MIN_0       0x00000000  ///< Initial device, or a major
00132
00133 #define SYSCTL_DID0_MIN_1       0x00000001  ///< First metal layer change
00134 #define SYSCTL_DID0_MIN_2       0x00000002  ///< Second metal layer change
00135 #define SYSCTL_DID0_MIN_3       0x00000003  ///< Minor revision 3
00136 #define SYSCTL_DID0_MIN_4       0x00000004  ///< Minor revision 4
00137 #define SYSCTL_DID0_MIN_5       0x00000005  ///< Minor revision 5
00138 /*\}*/
00139
00143 /*\{*/
00144 #define SYSCTL_DID1_VER_M       0xF0000000  ///< DID1 Version
00145 #define SYSCTL_DID1_VER_0       0x00000000  ///< Initial DID1 register format
00146
00147
00148 #define SYSCTL_DID1_VER_1       0x10000000  ///< Second version of the DID1
00149
00150 #define SYSCTL_DID1_FAM_M       0x0F000000  ///< Family
00151 #define SYSCTL_DID1_FAM_STELLARIS \
00152                                 0x00000000  ///< Stellaris family of
00153
00154
00155
00156 #define SYSCTL_DID1_PRTNO_M     0x00FF0000  ///< Part Number
00157 #define SYSCTL_DID1_PRTNO_101   0x00010000  ///< LM3S101
00158 #define SYSCTL_DID1_PRTNO_102   0x00020000  ///< LM3S102
00159 #define SYSCTL_DID1_PRTNO_300   0x00190000  ///< LM3S300
00160 #define SYSCTL_DID1_PRTNO_301   0x00110000  ///< LM3S301
00161 #define SYSCTL_DID1_PRTNO_308   0x001A0000  ///< LM3S308
00162 #define SYSCTL_DID1_PRTNO_310   0x00120000  ///< LM3S310
00163 #define SYSCTL_DID1_PRTNO_315   0x00130000  ///< LM3S315
00164 #define SYSCTL_DID1_PRTNO_316   0x00140000  ///< LM3S316
00165 #define SYSCTL_DID1_PRTNO_317   0x00170000  ///< LM3S317
00166 #define SYSCTL_DID1_PRTNO_328   0x00150000  ///< LM3S328
00167 #define SYSCTL_DID1_PRTNO_600   0x002A0000  ///< LM3S600
00168 #define SYSCTL_DID1_PRTNO_601   0x00210000  ///< LM3S601
00169 #define SYSCTL_DID1_PRTNO_608   0x002B0000  ///< LM3S608
00170 #define SYSCTL_DID1_PRTNO_610   0x00220000  ///< LM3S610
00171 #define SYSCTL_DID1_PRTNO_611   0x00230000  ///< LM3S611
00172 #define SYSCTL_DID1_PRTNO_612   0x00240000  ///< LM3S612
00173 #define SYSCTL_DID1_PRTNO_613   0x00250000  ///< LM3S613
00174 #define SYSCTL_DID1_PRTNO_615   0x00260000  ///< LM3S615
00175 #define SYSCTL_DID1_PRTNO_617   0x00280000  ///< LM3S617
00176 #define SYSCTL_DID1_PRTNO_618   0x00290000  ///< LM3S618
00177 #define SYSCTL_DID1_PRTNO_628   0x00270000  ///< LM3S628
00178 #define SYSCTL_DID1_PRTNO_800   0x00380000  ///< LM3S800
00179 #define SYSCTL_DID1_PRTNO_801   0x00310000  ///< LM3S801
00180 #define SYSCTL_DID1_PRTNO_808   0x00390000  ///< LM3S808
00181 #define SYSCTL_DID1_PRTNO_811   0x00320000  ///< LM3S811
00182 #define SYSCTL_DID1_PRTNO_812   0x00330000  ///< LM3S812
00183 #define SYSCTL_DID1_PRTNO_815   0x00340000  ///< LM3S815
00184 #define SYSCTL_DID1_PRTNO_817   0x00360000  ///< LM3S817
00185 #define SYSCTL_DID1_PRTNO_818   0x00370000  ///< LM3S818
00186 #define SYSCTL_DID1_PRTNO_828   0x00350000  ///< LM3S828
00187 #define SYSCTL_DID1_PRTNO_1110  0x00BF0000  ///< LM3S1110
00188 #define SYSCTL_DID1_PRTNO_1133  0x00C30000  ///< LM3S1133
00189 #define SYSCTL_DID1_PRTNO_1138  0x00C50000  ///< LM3S1138
00190 #define SYSCTL_DID1_PRTNO_1150  0x00C10000  ///< LM3S1150
00191 #define SYSCTL_DID1_PRTNO_1162  0x00C40000  ///< LM3S1162
00192 #define SYSCTL_DID1_PRTNO_1165  0x00C20000  ///< LM3S1165
00193 #define SYSCTL_DID1_PRTNO_1332  0x00C60000  ///< LM3S1332
00194 #define SYSCTL_DID1_PRTNO_1435  0x00BC0000  ///< LM3S1435
00195 #define SYSCTL_DID1_PRTNO_1439  0x00BA0000  ///< LM3S1439
00196 #define SYSCTL_DID1_PRTNO_1512  0x00BB0000  ///< LM3S1512
00197 #define SYSCTL_DID1_PRTNO_1538  0x00C70000  ///< LM3S1538
00198 #define SYSCTL_DID1_PRTNO_1601  0x00DB0000  ///< LM3S1601
00199 #define SYSCTL_DID1_PRTNO_1607  0x00060000  ///< LM3S1607
00200 #define SYSCTL_DID1_PRTNO_1608  0x00DA0000  ///< LM3S1608
00201 #define SYSCTL_DID1_PRTNO_1620  0x00C00000  ///< LM3S1620
00202 #define SYSCTL_DID1_PRTNO_1625  0x00030000  ///< LM3S1625
00203 #define SYSCTL_DID1_PRTNO_1626  0x00040000  ///< LM3S1626
00204 #define SYSCTL_DID1_PRTNO_1627  0x00050000  ///< LM3S1627
00205 #define SYSCTL_DID1_PRTNO_1635  0x00B30000  ///< LM3S1635
00206 #define SYSCTL_DID1_PRTNO_1637  0x00BD0000  ///< LM3S1637
00207 #define SYSCTL_DID1_PRTNO_1751  0x00B90000  ///< LM3S1751
00208 #define SYSCTL_DID1_PRTNO_1776  0x00100000  ///< LM3S1776
00209 #define SYSCTL_DID1_PRTNO_1811  0x00160000  ///< LM3S1811
00210 #define SYSCTL_DID1_PRTNO_1816  0x003D0000  ///< LM3S1816
00211 #define SYSCTL_DID1_PRTNO_1850  0x00B40000  ///< LM3S1850
00212 #define SYSCTL_DID1_PRTNO_1911  0x00DD0000  ///< LM3S1911
00213 #define SYSCTL_DID1_PRTNO_1918  0x00DC0000  ///< LM3S1918
00214 #define SYSCTL_DID1_PRTNO_1937  0x00B70000  ///< LM3S1937
00215 #define SYSCTL_DID1_PRTNO_1958  0x00BE0000  ///< LM3S1958
00216 #define SYSCTL_DID1_PRTNO_1960  0x00B50000  ///< LM3S1960
00217 #define SYSCTL_DID1_PRTNO_1968  0x00B80000  ///< LM3S1968
00218 #define SYSCTL_DID1_PRTNO_1J11  0x000F0000  ///< LM3S1J11
00219 #define SYSCTL_DID1_PRTNO_1J16  0x003C0000  ///< LM3S1J16
00220 #define SYSCTL_DID1_PRTNO_1N11  0x000E0000  ///< LM3S1N11
00221 #define SYSCTL_DID1_PRTNO_1N16  0x003B0000  ///< LM3S1N16
00222 #define SYSCTL_DID1_PRTNO_1W16  0x00300000  ///< LM3S1W16
00223 #define SYSCTL_DID1_PRTNO_1Z16  0x002F0000  ///< LM3S1Z16
00224 #define SYSCTL_DID1_PRTNO_2110  0x00510000  ///< LM3S2110
00225 #define SYSCTL_DID1_PRTNO_2139  0x00840000  ///< LM3S2139
00226 #define SYSCTL_DID1_PRTNO_2276  0x00390000  ///< LM3S2276
00227 #define SYSCTL_DID1_PRTNO_2410  0x00A20000  ///< LM3S2410
00228 #define SYSCTL_DID1_PRTNO_2412  0x00590000  ///< LM3S2412
00229 #define SYSCTL_DID1_PRTNO_2432  0x00560000  ///< LM3S2432
00230 #define SYSCTL_DID1_PRTNO_2533  0x005A0000  ///< LM3S2533
00231 #define SYSCTL_DID1_PRTNO_2601  0x00E10000  ///< LM3S2601
00232 #define SYSCTL_DID1_PRTNO_2608  0x00E00000  ///< LM3S2608
00233 #define SYSCTL_DID1_PRTNO_2616  0x00330000  ///< LM3S2616
00234 #define SYSCTL_DID1_PRTNO_2620  0x00570000  ///< LM3S2620
00235 #define SYSCTL_DID1_PRTNO_2637  0x00850000  ///< LM3S2637
00236 #define SYSCTL_DID1_PRTNO_2651  0x00530000  ///< LM3S2651
00237 #define SYSCTL_DID1_PRTNO_2671  0x00800000  ///< LM3S2671
00238 #define SYSCTL_DID1_PRTNO_2678  0x00500000  ///< LM3S2678
00239 #define SYSCTL_DID1_PRTNO_2730  0x00A40000  ///< LM3S2730
00240 #define SYSCTL_DID1_PRTNO_2739  0x00520000  ///< LM3S2739
00241 #define SYSCTL_DID1_PRTNO_2776  0x003A0000  ///< LM3S2776
00242 #define SYSCTL_DID1_PRTNO_2793  0x006D0000  ///< LM3S2793
00243 #define SYSCTL_DID1_PRTNO_2911  0x00E30000  ///< LM3S2911
00244 #define SYSCTL_DID1_PRTNO_2918  0x00E20000  ///< LM3S2918
00245 #define SYSCTL_DID1_PRTNO_2939  0x00540000  ///< LM3S2939
00246 #define SYSCTL_DID1_PRTNO_2948  0x008F0000  ///< LM3S2948
00247 #define SYSCTL_DID1_PRTNO_2950  0x00580000  ///< LM3S2950
00248 #define SYSCTL_DID1_PRTNO_2965  0x00550000  ///< LM3S2965
00249 #define SYSCTL_DID1_PRTNO_2B93  0x006C0000  ///< LM3S2B93
00250 #define SYSCTL_DID1_PRTNO_3651  0x00430000  ///< LM3S3651
00251 #define SYSCTL_DID1_PRTNO_3739  0x00440000  ///< LM3S3739
00252 #define SYSCTL_DID1_PRTNO_3748  0x00490000  ///< LM3S3748
00253 #define SYSCTL_DID1_PRTNO_3749  0x00450000  ///< LM3S3749
00254 #define SYSCTL_DID1_PRTNO_3826  0x00420000  ///< LM3S3826
00255 #define SYSCTL_DID1_PRTNO_3J26  0x00410000  ///< LM3S3J26
00256 #define SYSCTL_DID1_PRTNO_3N26  0x00400000  ///< LM3S3N26
00257 #define SYSCTL_DID1_PRTNO_3W26  0x003F0000  ///< LM3S3W26
00258 #define SYSCTL_DID1_PRTNO_3Z26  0x003E0000  ///< LM3S3Z26
00259 #define SYSCTL_DID1_PRTNO_5632  0x00810000  ///< LM3S5632
00260 #define SYSCTL_DID1_PRTNO_5651  0x000C0000  ///< LM3S5651
00261 #define SYSCTL_DID1_PRTNO_5652  0x008A0000  ///< LM3S5652
00262 #define SYSCTL_DID1_PRTNO_5656  0x004D0000  ///< LM3S5656
00263 #define SYSCTL_DID1_PRTNO_5662  0x00910000  ///< LM3S5662
00264 #define SYSCTL_DID1_PRTNO_5732  0x00960000  ///< LM3S5732
00265 #define SYSCTL_DID1_PRTNO_5737  0x00970000  ///< LM3S5737
00266 #define SYSCTL_DID1_PRTNO_5739  0x00A00000  ///< LM3S5739
00267 #define SYSCTL_DID1_PRTNO_5747  0x00990000  ///< LM3S5747
00268 #define SYSCTL_DID1_PRTNO_5749  0x00A70000  ///< LM3S5749
00269 #define SYSCTL_DID1_PRTNO_5752  0x009A0000  ///< LM3S5752
00270 #define SYSCTL_DID1_PRTNO_5762  0x009C0000  ///< LM3S5762
00271 #define SYSCTL_DID1_PRTNO_5791  0x00690000  ///< LM3S5791
00272 #define SYSCTL_DID1_PRTNO_5951  0x000B0000  ///< LM3S5951
00273 #define SYSCTL_DID1_PRTNO_5956  0x004E0000  ///< LM3S5956
00274 #define SYSCTL_DID1_PRTNO_5B91  0x00680000  ///< LM3S5B91
00275 #define SYSCTL_DID1_PRTNO_5K31  0x00090000  ///< LM3S5K31
00276 #define SYSCTL_DID1_PRTNO_5K36  0x004A0000  ///< LM3S5K36
00277 #define SYSCTL_DID1_PRTNO_5P31  0x000A0000  ///< LM3S5P31
00278 #define SYSCTL_DID1_PRTNO_5P36  0x00480000  ///< LM3S5P36
00279 #define SYSCTL_DID1_PRTNO_5P51  0x000D0000  ///< LM3S5P51
00280 #define SYSCTL_DID1_PRTNO_5P56  0x004C0000  ///< LM3S5P56
00281 #define SYSCTL_DID1_PRTNO_5R31  0x00070000  ///< LM3S5R31
00282 #define SYSCTL_DID1_PRTNO_5R36  0x004B0000  ///< LM3S5R36
00283 #define SYSCTL_DID1_PRTNO_5T36  0x00470000  ///< LM3S5T36
00284 #define SYSCTL_DID1_PRTNO_5Y36  0x00460000  ///< LM3S5Y36
00285 #define SYSCTL_DID1_PRTNO_6100  0x00A10000  ///< LM3S6100
00286 #define SYSCTL_DID1_PRTNO_6110  0x00740000  ///< LM3S6110
00287 #define SYSCTL_DID1_PRTNO_6420  0x00A50000  ///< LM3S6420
00288 #define SYSCTL_DID1_PRTNO_6422  0x00820000  ///< LM3S6422
00289 #define SYSCTL_DID1_PRTNO_6432  0x00750000  ///< LM3S6432
00290 #define SYSCTL_DID1_PRTNO_6537  0x00760000  ///< LM3S6537
00291 #define SYSCTL_DID1_PRTNO_6610  0x00710000  ///< LM3S6610
00292 #define SYSCTL_DID1_PRTNO_6611  0x00E70000  ///< LM3S6611
00293 #define SYSCTL_DID1_PRTNO_6618  0x00E60000  ///< LM3S6618
00294 #define SYSCTL_DID1_PRTNO_6633  0x00830000  ///< LM3S6633
00295 #define SYSCTL_DID1_PRTNO_6637  0x008B0000  ///< LM3S6637
00296 #define SYSCTL_DID1_PRTNO_6730  0x00A30000  ///< LM3S6730
00297 #define SYSCTL_DID1_PRTNO_6753  0x00770000  ///< LM3S6753
00298 #define SYSCTL_DID1_PRTNO_6911  0x00E90000  ///< LM3S6911
00299 #define SYSCTL_DID1_PRTNO_6918  0x00E80000  ///< LM3S6918
00300 #define SYSCTL_DID1_PRTNO_6938  0x00890000  ///< LM3S6938
00301 #define SYSCTL_DID1_PRTNO_6950  0x00720000  ///< LM3S6950
00302 #define SYSCTL_DID1_PRTNO_6952  0x00780000  ///< LM3S6952
00303 #define SYSCTL_DID1_PRTNO_6965  0x00730000  ///< LM3S6965
00304 #define SYSCTL_DID1_PRTNO_8530  0x00640000  ///< LM3S8530
00305 #define SYSCTL_DID1_PRTNO_8538  0x008E0000  ///< LM3S8538
00306 #define SYSCTL_DID1_PRTNO_8630  0x00610000  ///< LM3S8630
00307 #define SYSCTL_DID1_PRTNO_8730  0x00630000  ///< LM3S8730
00308 #define SYSCTL_DID1_PRTNO_8733  0x008D0000  ///< LM3S8733
00309 #define SYSCTL_DID1_PRTNO_8738  0x00860000  ///< LM3S8738
00310 #define SYSCTL_DID1_PRTNO_8930  0x00650000  ///< LM3S8930
00311 #define SYSCTL_DID1_PRTNO_8933  0x008C0000  ///< LM3S8933
00312 #define SYSCTL_DID1_PRTNO_8938  0x00880000  ///< LM3S8938
00313 #define SYSCTL_DID1_PRTNO_8962  0x00A60000  ///< LM3S8962
00314 #define SYSCTL_DID1_PRTNO_8970  0x00620000  ///< LM3S8970
00315 #define SYSCTL_DID1_PRTNO_8971  0x00D70000  ///< LM3S8971
00316 #define SYSCTL_DID1_PRTNO_9790  0x00670000  ///< LM3S9790
00317 #define SYSCTL_DID1_PRTNO_9792  0x006B0000  ///< LM3S9792
00318 #define SYSCTL_DID1_PRTNO_9997  0x00200000  ///< LM3S9997
00319 #define SYSCTL_DID1_PRTNO_9B90  0x00660000  ///< LM3S9B90
00320 #define SYSCTL_DID1_PRTNO_9B92  0x006A0000  ///< LM3S9B92
00321 #define SYSCTL_DID1_PRTNO_9B95  0x006E0000  ///< LM3S9B95
00322 #define SYSCTL_DID1_PRTNO_9B96  0x006F0000  ///< LM3S9B96
00323 #define SYSCTL_DID1_PRTNO_9L97  0x00180000  ///< LM3S9L97
00324 #define SYSCTL_DID1_PINCNT_M    0x0000E000  ///< Package Pin Count
00325 #define SYSCTL_DID1_PINCNT_28   0x00000000  ///< 28 pin package
00326 #define SYSCTL_DID1_PINCNT_48   0x00002000  ///< 48 pin package
00327 #define SYSCTL_DID1_PINCNT_100  0x00004000  ///< 100-pin package
00328 #define SYSCTL_DID1_PINCNT_64   0x00006000  ///< 64-pin package
00329 #define SYSCTL_DID1_TEMP_M      0x000000E0  ///< Temperature Range
00330 #define SYSCTL_DID1_TEMP_C      0x00000000  ///< Commercial temperature range (0C
00331
00332 #define SYSCTL_DID1_TEMP_I      0x00000020  ///< Industrial temperature range
00333
00334 #define SYSCTL_DID1_TEMP_E      0x00000040  ///< Extended temperature range (-40C
00335
00336 #define SYSCTL_DID1_PKG_M       0x00000018  ///< Package Type
00337 #define SYSCTL_DID1_PKG_SOIC    0x00000000  ///< SOIC package
00338 #define SYSCTL_DID1_PKG_QFP     0x00000008  ///< LQFP package
00339 #define SYSCTL_DID1_PKG_BGA     0x00000010  ///< BGA package
00340 #define SYSCTL_DID1_PKG_QFN     0x00000018  ///< QFN package
00341 #define SYSCTL_DID1_ROHS        0x00000004  ///< RoHS-Compliance
00342 #define SYSCTL_DID1_QUAL_M      0x00000003  ///< Qualification Status
00343 #define SYSCTL_DID1_QUAL_ES     0x00000000  ///< Engineering Sample (unqualified)
00344 #define SYSCTL_DID1_QUAL_PP     0x00000001  ///< Pilot Production (unqualified)
00345 #define SYSCTL_DID1_QUAL_FQ     0x00000002  ///< Fully Qualified
00346 #define SYSCTL_DID1_PRTNO_S     16          ///< Part number shift
00347 /*\}*/
00348
00352 /*\{*/
00353 #define SYSCTL_DC0_SRAMSZ_M     0xFFFF0000  ///< SRAM Size
00354 #define SYSCTL_DC0_SRAMSZ_2KB   0x00070000  ///< 2 KB of SRAM
00355 #define SYSCTL_DC0_SRAMSZ_4KB   0x000F0000  ///< 4 KB of SRAM
00356 #define SYSCTL_DC0_SRAMSZ_6KB   0x00170000  ///< 6 KB of SRAM
00357 #define SYSCTL_DC0_SRAMSZ_8KB   0x001F0000  ///< 8 KB of SRAM
00358 #define SYSCTL_DC0_SRAMSZ_12KB  0x002F0000  ///< 12 KB of SRAM
00359 #define SYSCTL_DC0_SRAMSZ_16KB  0x003F0000  ///< 16 KB of SRAM
00360 #define SYSCTL_DC0_SRAMSZ_20KB  0x004F0000  ///< 20 KB of SRAM
00361 #define SYSCTL_DC0_SRAMSZ_24KB  0x005F0000  ///< 24 KB of SRAM
00362 #define SYSCTL_DC0_SRAMSZ_32KB  0x007F0000  ///< 32 KB of SRAM
00363 #define SYSCTL_DC0_SRAMSZ_48KB  0x00BF0000  ///< 48 KB of SRAM
00364 #define SYSCTL_DC0_SRAMSZ_64KB  0x00FF0000  ///< 64 KB of SRAM
00365 #define SYSCTL_DC0_SRAMSZ_96KB  0x017F0000  ///< 96 KB of SRAM
00366 #define SYSCTL_DC0_FLASHSZ_M    0x0000FFFF  ///< Flash Size
00367 #define SYSCTL_DC0_FLASHSZ_8KB  0x00000003  ///< 8 KB of Flash
00368 #define SYSCTL_DC0_FLASHSZ_16KB 0x00000007  ///< 16 KB of Flash
00369 #define SYSCTL_DC0_FLASHSZ_32KB 0x0000000F  ///< 32 KB of Flash
00370 #define SYSCTL_DC0_FLASHSZ_64KB 0x0000001F  ///< 64 KB of Flash
00371 #define SYSCTL_DC0_FLASHSZ_96KB 0x0000002F  ///< 96 KB of Flash
00372 #define SYSCTL_DC0_FLASHSZ_128K 0x0000003F  ///< 128 KB of Flash
00373 #define SYSCTL_DC0_FLASHSZ_256K 0x0000007F  ///< 256 KB of Flash
00374 #define SYSCTL_DC0_SRAMSZ_S     16          ///< SRAM size shift
00375 #define SYSCTL_DC0_FLASHSZ_S    0           ///< Flash size shift
00376 /*\}*/
00377
00381 /*\{*/
00382 #define SYSCTL_DC1_WDT1         0x10000000  ///< Watchdog Timer1 Present
00383 #define SYSCTL_DC1_CAN2         0x04000000  ///< CAN Module 2 Present
00384 #define SYSCTL_DC1_CAN1         0x02000000  ///< CAN Module 1 Present
00385 #define SYSCTL_DC1_CAN0         0x01000000  ///< CAN Module 0 Present
00386 #define SYSCTL_DC1_PWM          0x00100000  ///< PWM Module Present
00387 #define SYSCTL_DC1_ADC1         0x00020000  ///< ADC Module 1 Present
00388 #define SYSCTL_DC1_ADC0         0x00010000  ///< ADC Module 0 Present
00389 #define SYSCTL_DC1_MINSYSDIV_M  0x0000F000  ///< System Clock Divider
00390 #define SYSCTL_DC1_MINSYSDIV_100 \
00391                                 0x00001000  ///< Divide VCO (400MHZ) by 5 minimum
00392 #define SYSCTL_DC1_MINSYSDIV_66 0x00002000  ///< Divide VCO (400MHZ) by 2*2 + 2 =
00393
00394 #define SYSCTL_DC1_MINSYSDIV_50 0x00003000  ///< Specifies a 50-MHz CPU clock
00395
00396 #define SYSCTL_DC1_MINSYSDIV_25 0x00007000  ///< Specifies a 25-MHz clock with a
00397
00398 #define SYSCTL_DC1_MINSYSDIV_20 0x00009000  ///< Specifies a 20-MHz clock with a
00399
00400 #define SYSCTL_DC1_ADCSPD_M     0x00000F00  ///< Max ADC Speed
00401 #define SYSCTL_DC1_ADCSPD_125K  0x00000000  ///< 125Ksps ADC
00402 #define SYSCTL_DC1_ADCSPD_250K  0x00000100  ///< 250K samples/second
00403 #define SYSCTL_DC1_ADCSPD_500K  0x00000200  ///< 500K samples/second
00404 #define SYSCTL_DC1_ADCSPD_1M    0x00000300  ///< 1M samples/second
00405 #define SYSCTL_DC1_ADC1SPD_M    0x00000C00  ///< Max ADC1 Speed
00406 #define SYSCTL_DC1_ADC1SPD_1M   0x00000C00  ///< 1M samples/second
00407 #define SYSCTL_DC1_ADC0SPD_M    0x00000300  ///< Max ADC0 Speed
00408 #define SYSCTL_DC1_ADC0SPD_1M   0x00000300  ///< 1M samples/second
00409 #define SYSCTL_DC1_MPU          0x00000080  ///< MPU Present
00410 #define SYSCTL_DC1_HIB          0x00000040  ///< Hibernation Module Present
00411 #define SYSCTL_DC1_TEMP         0x00000020  ///< Temp Sensor Present
00412 #define SYSCTL_DC1_PLL          0x00000010  ///< PLL Present
00413 #define SYSCTL_DC1_WDT0         0x00000008  ///< Watchdog Timer 0 Present
00414 #define SYSCTL_DC1_SWO          0x00000004  ///< SWO Trace Port Present
00415 #define SYSCTL_DC1_SWD          0x00000002  ///< SWD Present
00416 #define SYSCTL_DC1_JTAG         0x00000001  ///< JTAG Present
00417 /*\}*/
00418
00422 /*\{*/
00423 #define SYSCTL_DC2_EPI0         0x40000000  ///< EPI Module 0 Present
00424 #define SYSCTL_DC2_I2S0         0x10000000  ///< I2S Module 0 Present
00425 #define SYSCTL_DC2_COMP2        0x04000000  ///< Analog Comparator 2 Present
00426 #define SYSCTL_DC2_COMP1        0x02000000  ///< Analog Comparator 1 Present
00427 #define SYSCTL_DC2_COMP0        0x01000000  ///< Analog Comparator 0 Present
00428 #define SYSCTL_DC2_TIMER3       0x00080000  ///< Timer Module 3 Present
00429 #define SYSCTL_DC2_TIMER2       0x00040000  ///< Timer Module 2 Present
00430 #define SYSCTL_DC2_TIMER1       0x00020000  ///< Timer Module 1 Present
00431 #define SYSCTL_DC2_TIMER0       0x00010000  ///< Timer Module 0 Present
00432 #define SYSCTL_DC2_I2C1         0x00004000  ///< I2C Module 1 Present
00433 #define SYSCTL_DC2_I2C0         0x00001000  ///< I2C Module 0 Present
00434 #define SYSCTL_DC2_QEI1         0x00000200  ///< QEI Module 1 Present
00435 #define SYSCTL_DC2_QEI0         0x00000100  ///< QEI Module 0 Present
00436 #define SYSCTL_DC2_SSI1         0x00000020  ///< SSI Module 1 Present
00437 #define SYSCTL_DC2_SSI0         0x00000010  ///< SSI Module 0 Present
00438 #define SYSCTL_DC2_UART2        0x00000004  ///< UART Module 2 Present
00439 #define SYSCTL_DC2_UART1        0x00000002  ///< UART Module 1 Present
00440 #define SYSCTL_DC2_UART0        0x00000001  ///< UART Module 0 Present
00441 /*\}*/
00442
00446 /*\{*/
00447 #define SYSCTL_DC3_32KHZ        0x80000000  ///< 32KHz Input Clock Available
00448 #define SYSCTL_DC3_CCP5         0x20000000  ///< CCP5 Pin Present
00449 #define SYSCTL_DC3_CCP4         0x10000000  ///< CCP4 Pin Present
00450 #define SYSCTL_DC3_CCP3         0x08000000  ///< CCP3 Pin Present
00451 #define SYSCTL_DC3_CCP2         0x04000000  ///< CCP2 Pin Present
00452 #define SYSCTL_DC3_CCP1         0x02000000  ///< CCP1 Pin Present
00453 #define SYSCTL_DC3_CCP0         0x01000000  ///< CCP0 Pin Present
00454 #define SYSCTL_DC3_ADC0AIN7     0x00800000  ///< ADC Module 0 AIN7 Pin Present
00455 #define SYSCTL_DC3_ADC0AIN6     0x00400000  ///< ADC Module 0 AIN6 Pin Present
00456 #define SYSCTL_DC3_ADC0AIN5     0x00200000  ///< ADC Module 0 AIN5 Pin Present
00457 #define SYSCTL_DC3_ADC0AIN4     0x00100000  ///< ADC Module 0 AIN4 Pin Present
00458 #define SYSCTL_DC3_ADC0AIN3     0x00080000  ///< ADC Module 0 AIN3 Pin Present
00459 #define SYSCTL_DC3_ADC0AIN2     0x00040000  ///< ADC Module 0 AIN2 Pin Present
00460 #define SYSCTL_DC3_ADC0AIN1     0x00020000  ///< ADC Module 0 AIN1 Pin Present
00461 #define SYSCTL_DC3_ADC0AIN0     0x00010000  ///< ADC Module 0 AIN0 Pin Present
00462 #define SYSCTL_DC3_PWMFAULT     0x00008000  ///< PWM Fault Pin Present
00463 #define SYSCTL_DC3_C2O          0x00004000  ///< C2o Pin Present
00464 #define SYSCTL_DC3_C2PLUS       0x00002000  ///< C2+ Pin Present
00465 #define SYSCTL_DC3_C2MINUS      0x00001000  ///< C2- Pin Present
00466 #define SYSCTL_DC3_C1O          0x00000800  ///< C1o Pin Present
00467 #define SYSCTL_DC3_C1PLUS       0x00000400  ///< C1+ Pin Present
00468 #define SYSCTL_DC3_C1MINUS      0x00000200  ///< C1- Pin Present
00469 #define SYSCTL_DC3_C0O          0x00000100  ///< C0o Pin Present
00470 #define SYSCTL_DC3_C0PLUS       0x00000080  ///< C0+ Pin Present
00471 #define SYSCTL_DC3_C0MINUS      0x00000040  ///< C0- Pin Present
00472 #define SYSCTL_DC3_PWM5         0x00000020  ///< PWM5 Pin Present
00473 #define SYSCTL_DC3_PWM4         0x00000010  ///< PWM4 Pin Present
00474 #define SYSCTL_DC3_PWM3         0x00000008  ///< PWM3 Pin Present
00475 #define SYSCTL_DC3_PWM2         0x00000004  ///< PWM2 Pin Present
00476 #define SYSCTL_DC3_PWM1         0x00000002  ///< PWM1 Pin Present
00477 #define SYSCTL_DC3_PWM0         0x00000001  ///< PWM0 Pin Present
00478 /*\}*/
00479
00483 /*\{*/
00484 #define SYSCTL_DC4_ETH          0x50000000  ///< Ethernet present
00485 #define SYSCTL_DC4_EPHY0        0x40000000  ///< Ethernet PHY Layer 0 Present
00486 #define SYSCTL_DC4_EMAC0        0x10000000  ///< Ethernet MAC Layer 0 Present
00487 #define SYSCTL_DC4_E1588        0x01000000  ///< 1588 Capable
00488 #define SYSCTL_DC4_PICAL        0x00040000  ///< PIOSC Calibrate
00489 #define SYSCTL_DC4_CCP7         0x00008000  ///< CCP7 Pin Present
00490 #define SYSCTL_DC4_CCP6         0x00004000  ///< CCP6 Pin Present
00491 #define SYSCTL_DC4_UDMA         0x00002000  ///< Micro-DMA Module Present
00492 #define SYSCTL_DC4_ROM          0x00001000  ///< Internal Code ROM Present
00493 #define SYSCTL_DC4_GPIOJ        0x00000100  ///< GPIO Port J Present
00494 #define SYSCTL_DC4_GPIOH        0x00000080  ///< GPIO Port H Present
00495 #define SYSCTL_DC4_GPIOG        0x00000040  ///< GPIO Port G Present
00496 #define SYSCTL_DC4_GPIOF        0x00000020  ///< GPIO Port F Present
00497 #define SYSCTL_DC4_GPIOE        0x00000010  ///< GPIO Port E Present
00498 #define SYSCTL_DC4_GPIOD        0x00000008  ///< GPIO Port D Present
00499 #define SYSCTL_DC4_GPIOC        0x00000004  ///< GPIO Port C Present
00500 #define SYSCTL_DC4_GPIOB        0x00000002  ///< GPIO Port B Present
00501 #define SYSCTL_DC4_GPIOA        0x00000001  ///< GPIO Port A Present
00502 /*\}*/
00503
00507 /*\{*/
00508 #define SYSCTL_DC5_PWMFAULT3    0x08000000  ///< PWM Fault 3 Pin Present
00509 #define SYSCTL_DC5_PWMFAULT2    0x04000000  ///< PWM Fault 2 Pin Present
00510 #define SYSCTL_DC5_PWMFAULT1    0x02000000  ///< PWM Fault 1 Pin Present
00511 #define SYSCTL_DC5_PWMFAULT0    0x01000000  ///< PWM Fault 0 Pin Present
00512 #define SYSCTL_DC5_PWMEFLT      0x00200000  ///< PWM Extended Fault Active
00513 #define SYSCTL_DC5_PWMESYNC     0x00100000  ///< PWM Extended SYNC Active
00514 #define SYSCTL_DC5_PWM7         0x00000080  ///< PWM7 Pin Present
00515 #define SYSCTL_DC5_PWM6         0x00000040  ///< PWM6 Pin Present
00516 #define SYSCTL_DC5_PWM5         0x00000020  ///< PWM5 Pin Present
00517 #define SYSCTL_DC5_PWM4         0x00000010  ///< PWM4 Pin Present
00518 #define SYSCTL_DC5_PWM3         0x00000008  ///< PWM3 Pin Present
00519 #define SYSCTL_DC5_PWM2         0x00000004  ///< PWM2 Pin Present
00520 #define SYSCTL_DC5_PWM1         0x00000002  ///< PWM1 Pin Present
00521 #define SYSCTL_DC5_PWM0         0x00000001  ///< PWM0 Pin Present
00522 /*\}*/
00523
00527 /*\{*/
00528 #define SYSCTL_DC6_USB0PHY      0x00000010  ///< USB Module 0 PHY Present
00529 #define SYSCTL_DC6_USB0_M       0x00000003  ///< USB Module 0 Present
00530 #define SYSCTL_DC6_USB0_DEV     0x00000001  ///< USB0 is Device Only
00531 #define SYSCTL_DC6_USB0_HOSTDEV 0x00000002  ///< USB is Device or Host
00532 #define SYSCTL_DC6_USB0_OTG     0x00000003  ///< USB0 is OTG
00533 /*\}*/
00534
00538 /*\{*/
00539 #define SYSCTL_DC7_DMACH30      0x40000000  ///< SW
00540 #define SYSCTL_DC7_DMACH29      0x20000000  ///< I2S0_TX / CAN1_TX
00541 #define SYSCTL_DC7_DMACH28      0x10000000  ///< I2S0_RX / CAN1_RX
00542 #define SYSCTL_DC7_DMACH27      0x08000000  ///< CAN1_TX / ADC1_SS3
00543 #define SYSCTL_DC7_DMACH26      0x04000000  ///< CAN1_RX / ADC1_SS2
00544 #define SYSCTL_DC7_DMACH25      0x02000000  ///< SSI1_TX / ADC1_SS1
00545 #define SYSCTL_DC7_SSI1_TX      0x02000000  ///< SSI1 TX on uDMA Ch25
00546 #define SYSCTL_DC7_SSI1_RX      0x01000000  ///< SSI1 RX on uDMA Ch24
00547 #define SYSCTL_DC7_DMACH24      0x01000000  ///< SSI1_RX / ADC1_SS0
00548 #define SYSCTL_DC7_UART1_TX     0x00800000  ///< UART1 TX on uDMA Ch23
00549 #define SYSCTL_DC7_DMACH23      0x00800000  ///< UART1_TX / CAN2_TX
00550 #define SYSCTL_DC7_DMACH22      0x00400000  ///< UART1_RX / CAN2_RX
00551 #define SYSCTL_DC7_UART1_RX     0x00400000  ///< UART1 RX on uDMA Ch22
00552 #define SYSCTL_DC7_DMACH21      0x00200000  ///< Timer1B / EPI0_WFIFO
00553 #define SYSCTL_DC7_DMACH20      0x00100000  ///< Timer1A / EPI0_NBRFIFO
00554 #define SYSCTL_DC7_DMACH19      0x00080000  ///< Timer0B / Timer1B
00555 #define SYSCTL_DC7_DMACH18      0x00040000  ///< Timer0A / Timer1A
00556 #define SYSCTL_DC7_DMACH17      0x00020000  ///< ADC0_SS3
00557 #define SYSCTL_DC7_DMACH16      0x00010000  ///< ADC0_SS2
00558 #define SYSCTL_DC7_DMACH15      0x00008000  ///< ADC0_SS1 / Timer2B
00559 #define SYSCTL_DC7_DMACH14      0x00004000  ///< ADC0_SS0 / Timer2A
00560 #define SYSCTL_DC7_DMACH13      0x00002000  ///< CAN0_TX / UART2_TX
00561 #define SYSCTL_DC7_DMACH12      0x00001000  ///< CAN0_RX / UART2_RX
00562 #define SYSCTL_DC7_SSI0_TX      0x00000800  ///< SSI0 TX on uDMA Ch11
00563 #define SYSCTL_DC7_DMACH11      0x00000800  ///< SSI0_TX / SSI1_TX
00564 #define SYSCTL_DC7_SSI0_RX      0x00000400  ///< SSI0 RX on uDMA Ch10
00565 #define SYSCTL_DC7_DMACH10      0x00000400  ///< SSI0_RX / SSI1_RX
00566 #define SYSCTL_DC7_UART0_TX     0x00000200  ///< UART0 TX on uDMA Ch9
00567 #define SYSCTL_DC7_DMACH9       0x00000200  ///< UART0_TX / UART1_TX
00568 #define SYSCTL_DC7_DMACH8       0x00000100  ///< UART0_RX / UART1_RX
00569 #define SYSCTL_DC7_UART0_RX     0x00000100  ///< UART0 RX on uDMA Ch8
00570 #define SYSCTL_DC7_DMACH7       0x00000080  ///< ETH_TX / Timer2B
00571 #define SYSCTL_DC7_DMACH6       0x00000040  ///< ETH_RX / Timer2A
00572 #define SYSCTL_DC7_DMACH5       0x00000020  ///< USB_EP3_TX / Timer2B
00573 #define SYSCTL_DC7_USB_EP3_TX   0x00000020  ///< USB EP3 TX on uDMA Ch5
00574 #define SYSCTL_DC7_USB_EP3_RX   0x00000010  ///< USB EP3 RX on uDMA Ch4
00575 #define SYSCTL_DC7_DMACH4       0x00000010  ///< USB_EP3_RX / Timer2A
00576 #define SYSCTL_DC7_USB_EP2_TX   0x00000008  ///< USB EP2 TX on uDMA Ch3
00577 #define SYSCTL_DC7_DMACH3       0x00000008  ///< USB_EP2_TX / Timer3B
00578 #define SYSCTL_DC7_USB_EP2_RX   0x00000004  ///< USB EP2 RX on uDMA Ch2
00579 #define SYSCTL_DC7_DMACH2       0x00000004  ///< USB_EP2_RX / Timer3A
00580 #define SYSCTL_DC7_USB_EP1_TX   0x00000002  ///< USB EP1 TX on uDMA Ch1
00581 #define SYSCTL_DC7_DMACH1       0x00000002  ///< USB_EP1_TX / UART2_TX
00582 #define SYSCTL_DC7_DMACH0       0x00000001  ///< USB_EP1_RX / UART2_RX
00583 #define SYSCTL_DC7_USB_EP1_RX   0x00000001  ///< USB EP1 RX on uDMA Ch0
00584 /*\}*/
00585
00589 /*\{*/
00590 #define SYSCTL_DC8_ADC1AIN15    0x80000000  ///< ADC Module 1 AIN15 Pin Present
00591 #define SYSCTL_DC8_ADC1AIN14    0x40000000  ///< ADC Module 1 AIN14 Pin Present
00592 #define SYSCTL_DC8_ADC1AIN13    0x20000000  ///< ADC Module 1 AIN13 Pin Present
00593 #define SYSCTL_DC8_ADC1AIN12    0x10000000  ///< ADC Module 1 AIN12 Pin Present
00594 #define SYSCTL_DC8_ADC1AIN11    0x08000000  ///< ADC Module 1 AIN11 Pin Present
00595 #define SYSCTL_DC8_ADC1AIN10    0x04000000  ///< ADC Module 1 AIN10 Pin Present
00596 #define SYSCTL_DC8_ADC1AIN9     0x02000000  ///< ADC Module 1 AIN9 Pin Present
00597 #define SYSCTL_DC8_ADC1AIN8     0x01000000  ///< ADC Module 1 AIN8 Pin Present
00598 #define SYSCTL_DC8_ADC1AIN7     0x00800000  ///< ADC Module 1 AIN7 Pin Present
00599 #define SYSCTL_DC8_ADC1AIN6     0x00400000  ///< ADC Module 1 AIN6 Pin Present
00600 #define SYSCTL_DC8_ADC1AIN5     0x00200000  ///< ADC Module 1 AIN5 Pin Present
00601 #define SYSCTL_DC8_ADC1AIN4     0x00100000  ///< ADC Module 1 AIN4 Pin Present
00602 #define SYSCTL_DC8_ADC1AIN3     0x00080000  ///< ADC Module 1 AIN3 Pin Present
00603 #define SYSCTL_DC8_ADC1AIN2     0x00040000  ///< ADC Module 1 AIN2 Pin Present
00604 #define SYSCTL_DC8_ADC1AIN1     0x00020000  ///< ADC Module 1 AIN1 Pin Present
00605 #define SYSCTL_DC8_ADC1AIN0     0x00010000  ///< ADC Module 1 AIN0 Pin Present
00606 #define SYSCTL_DC8_ADC0AIN15    0x00008000  ///< ADC Module 0 AIN15 Pin Present
00607 #define SYSCTL_DC8_ADC0AIN14    0x00004000  ///< ADC Module 0 AIN14 Pin Present
00608 #define SYSCTL_DC8_ADC0AIN13    0x00002000  ///< ADC Module 0 AIN13 Pin Present
00609 #define SYSCTL_DC8_ADC0AIN12    0x00001000  ///< ADC Module 0 AIN12 Pin Present
00610 #define SYSCTL_DC8_ADC0AIN11    0x00000800  ///< ADC Module 0 AIN11 Pin Present
00611 #define SYSCTL_DC8_ADC0AIN10    0x00000400  ///< ADC Module 0 AIN10 Pin Present
00612 #define SYSCTL_DC8_ADC0AIN9     0x00000200  ///< ADC Module 0 AIN9 Pin Present
00613 #define SYSCTL_DC8_ADC0AIN8     0x00000100  ///< ADC Module 0 AIN8 Pin Present
00614 #define SYSCTL_DC8_ADC0AIN7     0x00000080  ///< ADC Module 0 AIN7 Pin Present
00615 #define SYSCTL_DC8_ADC0AIN6     0x00000040  ///< ADC Module 0 AIN6 Pin Present
00616 #define SYSCTL_DC8_ADC0AIN5     0x00000020  ///< ADC Module 0 AIN5 Pin Present
00617 #define SYSCTL_DC8_ADC0AIN4     0x00000010  ///< ADC Module 0 AIN4 Pin Present
00618 #define SYSCTL_DC8_ADC0AIN3     0x00000008  ///< ADC Module 0 AIN3 Pin Present
00619 #define SYSCTL_DC8_ADC0AIN2     0x00000004  ///< ADC Module 0 AIN2 Pin Present
00620 #define SYSCTL_DC8_ADC0AIN1     0x00000002  ///< ADC Module 0 AIN1 Pin Present
00621 #define SYSCTL_DC8_ADC0AIN0     0x00000001  ///< ADC Module 0 AIN0 Pin Present
00622 /*\}*/
00623
00627 /*\{*/
00628 #define SYSCTL_PBORCTL_BORTIM_M 0x0000FFFC  ///< BOR Time Delay
00629 #define SYSCTL_PBORCTL_BORIOR   0x00000002  ///< BOR Interrupt or Reset
00630 #define SYSCTL_PBORCTL_BORWT    0x00000001  ///< BOR Wait and Check for Noise
00631 #define SYSCTL_PBORCTL_BORTIM_S 2
00632 /*\}*/
00633
00637 /*\{*/
00638 #define SYSCTL_LDOPCTL_M        0x0000003F  ///< LDO Output Voltage
00639 #define SYSCTL_LDOPCTL_2_50V    0x00000000  ///< 2.50
00640 #define SYSCTL_LDOPCTL_2_45V    0x00000001  ///< 2.45
00641 #define SYSCTL_LDOPCTL_2_40V    0x00000002  ///< 2.40
00642 #define SYSCTL_LDOPCTL_2_35V    0x00000003  ///< 2.35
00643 #define SYSCTL_LDOPCTL_2_30V    0x00000004  ///< 2.30
00644 #define SYSCTL_LDOPCTL_2_25V    0x00000005  ///< 2.25
00645 #define SYSCTL_LDOPCTL_2_75V    0x0000001B  ///< 2.75
00646 #define SYSCTL_LDOPCTL_2_70V    0x0000001C  ///< 2.70
00647 #define SYSCTL_LDOPCTL_2_65V    0x0000001D  ///< 2.65
00648 #define SYSCTL_LDOPCTL_2_60V    0x0000001E  ///< 2.60
00649 #define SYSCTL_LDOPCTL_2_55V    0x0000001F  ///< 2.55
00650 /*\}*/
00651
00655 /*\{*/
00656 #define SYSCTL_SRCR0_WDT1       0x10000000  ///< WDT1 Reset Control
00657 #define SYSCTL_SRCR0_CAN2       0x04000000  ///< CAN2 Reset Control
00658 #define SYSCTL_SRCR0_CAN1       0x02000000  ///< CAN1 Reset Control
00659 #define SYSCTL_SRCR0_CAN0       0x01000000  ///< CAN0 Reset Control
00660 #define SYSCTL_SRCR0_PWM        0x00100000  ///< PWM Reset Control
00661 #define SYSCTL_SRCR0_ADC1       0x00020000  ///< ADC1 Reset Control
00662 #define SYSCTL_SRCR0_ADC0       0x00010000  ///< ADC0 Reset Control
00663 #define SYSCTL_SRCR0_HIB        0x00000040  ///< HIB Reset Control
00664 #define SYSCTL_SRCR0_WDT0       0x00000008  ///< WDT0 Reset Control
00665 /*\}*/
00666
00670 /*\{*/
00671 #define SYSCTL_SRCR1_EPI0       0x40000000  ///< EPI0 Reset Control
00672 #define SYSCTL_SRCR1_I2S0       0x10000000  ///< I2S0 Reset Control
00673 #define SYSCTL_SRCR1_COMP2      0x04000000  ///< Analog Comp 2 Reset Control
00674 #define SYSCTL_SRCR1_COMP1      0x02000000  ///< Analog Comp 1 Reset Control
00675 #define SYSCTL_SRCR1_COMP0      0x01000000  ///< Analog Comp 0 Reset Control
00676 #define SYSCTL_SRCR1_TIMER3     0x00080000  ///< Timer 3 Reset Control
00677 #define SYSCTL_SRCR1_TIMER2     0x00040000  ///< Timer 2 Reset Control
00678 #define SYSCTL_SRCR1_TIMER1     0x00020000  ///< Timer 1 Reset Control
00679 #define SYSCTL_SRCR1_TIMER0     0x00010000  ///< Timer 0 Reset Control
00680 #define SYSCTL_SRCR1_I2C1       0x00004000  ///< I2C1 Reset Control
00681 #define SYSCTL_SRCR1_I2C0       0x00001000  ///< I2C0 Reset Control
00682 #define SYSCTL_SRCR1_QEI1       0x00000200  ///< QEI1 Reset Control
00683 #define SYSCTL_SRCR1_QEI0       0x00000100  ///< QEI0 Reset Control
00684 #define SYSCTL_SRCR1_SSI1       0x00000020  ///< SSI1 Reset Control
00685 #define SYSCTL_SRCR1_SSI0       0x00000010  ///< SSI0 Reset Control
00686 #define SYSCTL_SRCR1_UART2      0x00000004  ///< UART2 Reset Control
00687 #define SYSCTL_SRCR1_UART1      0x00000002  ///< UART1 Reset Control
00688 #define SYSCTL_SRCR1_UART0      0x00000001  ///< UART0 Reset Control
00689 /*\}*/
00690
00694 /*\{*/
00695 #define SYSCTL_SRCR2_EPHY0      0x40000000  ///< PHY0 Reset Control
00696 #define SYSCTL_SRCR2_EMAC0      0x10000000  ///< MAC0 Reset Control
00697 #define SYSCTL_SRCR2_USB0       0x00010000  ///< USB0 Reset Control
00698 #define SYSCTL_SRCR2_UDMA       0x00002000  ///< Micro-DMA Reset Control
00699 #define SYSCTL_SRCR2_GPIOJ      0x00000100  ///< Port J Reset Control
00700 #define SYSCTL_SRCR2_GPIOH      0x00000080  ///< Port H Reset Control
00701 #define SYSCTL_SRCR2_GPIOG      0x00000040  ///< Port G Reset Control
00702 #define SYSCTL_SRCR2_GPIOF      0x00000020  ///< Port F Reset Control
00703 #define SYSCTL_SRCR2_GPIOE      0x00000010  ///< Port E Reset Control
00704 #define SYSCTL_SRCR2_GPIOD      0x00000008  ///< Port D Reset Control
00705 #define SYSCTL_SRCR2_GPIOC      0x00000004  ///< Port C Reset Control
00706 #define SYSCTL_SRCR2_GPIOB      0x00000002  ///< Port B Reset Control
00707 #define SYSCTL_SRCR2_GPIOA      0x00000001  ///< Port A Reset Control
00708 /*\}*/
00709
00713 /*\{*/
00714 #define SYSCTL_RIS_MOSCPUPRIS   0x00000100  ///< MOSC Power Up Raw Interrupt
00715
00716 #define SYSCTL_RIS_USBPLLLRIS   0x00000080  ///< USB PLL Lock Raw Interrupt
00717
00718 #define SYSCTL_RIS_PLLLRIS      0x00000040  ///< PLL Lock Raw Interrupt Status
00719 #define SYSCTL_RIS_CLRIS        0x00000020  ///< Current Limit Raw Interrupt
00720
00721 #define SYSCTL_RIS_IOFRIS       0x00000010  ///< Internal Oscillator Fault Raw
00722
00723 #define SYSCTL_RIS_MOFRIS       0x00000008  ///< Main Oscillator Fault Raw
00724
00725 #define SYSCTL_RIS_LDORIS       0x00000004  ///< LDO Power Unregulated Raw
00726
00727 #define SYSCTL_RIS_BORRIS       0x00000002  ///< Brown-Out Reset Raw Interrupt
00728
00729 #define SYSCTL_RIS_PLLFRIS      0x00000001  ///< PLL Fault Raw Interrupt Status
00730 /*\}*/
00731
00735 /*\{*/
00736 #define SYSCTL_IMC_MOSCPUPIM    0x00000100  ///< MOSC Power Up Interrupt Mask
00737 #define SYSCTL_IMC_USBPLLLIM    0x00000080  ///< USB PLL Lock Interrupt Mask
00738 #define SYSCTL_IMC_PLLLIM       0x00000040  ///< PLL Lock Interrupt Mask
00739 #define SYSCTL_IMC_CLIM         0x00000020  ///< Current Limit Interrupt Mask
00740 #define SYSCTL_IMC_IOFIM        0x00000010  ///< Internal Oscillator Fault
00741
00742 #define SYSCTL_IMC_MOFIM        0x00000008  ///< Main Oscillator Fault Interrupt
00743
00744 #define SYSCTL_IMC_LDOIM        0x00000004  ///< LDO Power Unregulated Interrupt
00745
00746 #define SYSCTL_IMC_BORIM        0x00000002  ///< Brown-Out Reset Interrupt Mask
00747 #define SYSCTL_IMC_PLLFIM       0x00000001  ///< PLL Fault Interrupt Mask
00748 /*\}*/
00749
00753 /*\{*/
00754 #define SYSCTL_MISC_MOSCPUPMIS  0x00000100  ///< MOSC Power Up Masked Interrupt
00755
00756 #define SYSCTL_MISC_USBPLLLMIS  0x00000080  ///< USB PLL Lock Masked Interrupt
00757
00758 #define SYSCTL_MISC_PLLLMIS     0x00000040  ///< PLL Lock Masked Interrupt Status
00759 #define SYSCTL_MISC_CLMIS       0x00000020  ///< Current Limit Masked Interrupt
00760
00761 #define SYSCTL_MISC_IOFMIS      0x00000010  ///< Internal Oscillator Fault Masked
00762
00763 #define SYSCTL_MISC_MOFMIS      0x00000008  ///< Main Oscillator Fault Masked
00764
00765 #define SYSCTL_MISC_LDOMIS      0x00000004  ///< LDO Power Unregulated Masked
00766
00767 #define SYSCTL_MISC_BORMIS      0x00000002  ///< BOR Masked Interrupt Status
00768 /*\}*/
00769
00773 /*\{*/
00774 #define SYSCTL_RESC_MOSCFAIL    0x00010000  ///< MOSC Failure Reset
00775 #define SYSCTL_RESC_LDO         0x00000020  ///< LDO Reset
00776 #define SYSCTL_RESC_WDT1        0x00000020  ///< Watchdog Timer 1 Reset
00777 #define SYSCTL_RESC_SW          0x00000010  ///< Software Reset
00778 #define SYSCTL_RESC_WDT0        0x00000008  ///< Watchdog Timer 0 Reset
00779 #define SYSCTL_RESC_BOR         0x00000004  ///< Brown-Out Reset
00780 #define SYSCTL_RESC_POR         0x00000002  ///< Power-On Reset
00781 #define SYSCTL_RESC_EXT         0x00000001  ///< External Reset
00782 /*\}*/
00783
00787 /*\{*/
00788 #define SYSCTL_RCC_ACG          0x08000000  ///< Auto Clock Gating
00789 #define SYSCTL_RCC_SYSDIV_M     0x07800000  ///< System Clock Divisor
00790 #define SYSCTL_RCC_SYSDIV_2     0x00800000  ///< System clock /2
00791 #define SYSCTL_RCC_SYSDIV_3     0x01000000  ///< System clock /3
00792 #define SYSCTL_RCC_SYSDIV_4     0x01800000  ///< System clock /4
00793 #define SYSCTL_RCC_SYSDIV_5     0x02000000  ///< System clock /5
00794 #define SYSCTL_RCC_SYSDIV_6     0x02800000  ///< System clock /6
00795 #define SYSCTL_RCC_SYSDIV_7     0x03000000  ///< System clock /7
00796 #define SYSCTL_RCC_SYSDIV_8     0x03800000  ///< System clock /8
00797 #define SYSCTL_RCC_SYSDIV_9     0x04000000  ///< System clock /9
00798 #define SYSCTL_RCC_SYSDIV_10    0x04800000  ///< System clock /10
00799 #define SYSCTL_RCC_SYSDIV_11    0x05000000  ///< System clock /11
00800 #define SYSCTL_RCC_SYSDIV_12    0x05800000  ///< System clock /12
00801 #define SYSCTL_RCC_SYSDIV_13    0x06000000  ///< System clock /13
00802 #define SYSCTL_RCC_SYSDIV_14    0x06800000  ///< System clock /14
00803 #define SYSCTL_RCC_SYSDIV_15    0x07000000  ///< System clock /15
00804 #define SYSCTL_RCC_SYSDIV_16    0x07800000  ///< System clock /16
00805 #define SYSCTL_RCC_USESYSDIV    0x00400000  ///< Enable System Clock Divider
00806 #define SYSCTL_RCC_USEPWMDIV    0x00100000  ///< Enable PWM Clock Divisor
00807 #define SYSCTL_RCC_PWMDIV_M     0x000E0000  ///< PWM Unit Clock Divisor
00808 #define SYSCTL_RCC_PWMDIV_2     0x00000000  ///< PWM clock /2
00809 #define SYSCTL_RCC_PWMDIV_4     0x00020000  ///< PWM clock /4
00810 #define SYSCTL_RCC_PWMDIV_8     0x00040000  ///< PWM clock /8
00811 #define SYSCTL_RCC_PWMDIV_16    0x00060000  ///< PWM clock /16
00812 #define SYSCTL_RCC_PWMDIV_32    0x00080000  ///< PWM clock /32
00813 #define SYSCTL_RCC_PWMDIV_64    0x000A0000  ///< PWM clock /64
00814 #define SYSCTL_RCC_PWRDN        0x00002000  ///< PLL Power Down
00815 #define SYSCTL_RCC_OEN          0x00001000  ///< PLL Output Enable
00816 #define SYSCTL_RCC_BYPASS       0x00000800  ///< PLL Bypass
00817 #define SYSCTL_RCC_XTAL_M       0x000007C0  ///< Crystal Value
00818 #define SYSCTL_RCC_XTAL_1MHZ    0x00000000  ///< 1 MHz
00819 #define SYSCTL_RCC_XTAL_1_84MHZ 0x00000040  ///< 1.8432 MHz
00820 #define SYSCTL_RCC_XTAL_2MHZ    0x00000080  ///< 2 MHz
00821 #define SYSCTL_RCC_XTAL_2_45MHZ 0x000000C0  ///< 2.4576 MHz
00822 #define SYSCTL_RCC_XTAL_3_57MHZ 0x00000100  ///< 3.579545 MHz
00823 #define SYSCTL_RCC_XTAL_3_68MHZ 0x00000140  ///< 3.6864 MHz
00824 #define SYSCTL_RCC_XTAL_4MHZ    0x00000180  ///< 4 MHz
00825 #define SYSCTL_RCC_XTAL_4_09MHZ 0x000001C0  ///< 4.096 MHz
00826 #define SYSCTL_RCC_XTAL_4_91MHZ 0x00000200  ///< 4.9152 MHz
00827 #define SYSCTL_RCC_XTAL_5MHZ    0x00000240  ///< 5 MHz
00828 #define SYSCTL_RCC_XTAL_5_12MHZ 0x00000280  ///< 5.12 MHz
00829 #define SYSCTL_RCC_XTAL_6MHZ    0x000002C0  ///< 6 MHz
00830 #define SYSCTL_RCC_XTAL_6_14MHZ 0x00000300  ///< 6.144 MHz
00831 #define SYSCTL_RCC_XTAL_7_37MHZ 0x00000340  ///< 7.3728 MHz
00832 #define SYSCTL_RCC_XTAL_8MHZ    0x00000380  ///< 8 MHz
00833 #define SYSCTL_RCC_XTAL_8_19MHZ 0x000003C0  ///< 8.192 MHz
00834 #define SYSCTL_RCC_XTAL_10MHZ   0x00000400  ///< 10 MHz
00835 #define SYSCTL_RCC_XTAL_12MHZ   0x00000440  ///< 12 MHz
00836 #define SYSCTL_RCC_XTAL_12_2MHZ 0x00000480  ///< 12.288 MHz
00837 #define SYSCTL_RCC_XTAL_13_5MHZ 0x000004C0  ///< 13.56 MHz
00838 #define SYSCTL_RCC_XTAL_14_3MHZ 0x00000500  ///< 14.31818 MHz
00839 #define SYSCTL_RCC_XTAL_16MHZ   0x00000540  ///< 16 MHz
00840 #define SYSCTL_RCC_XTAL_16_3MHZ 0x00000580  ///< 16.384 MHz
00841 #define SYSCTL_RCC_PLLVER       0x00000400  ///< PLL Verification
00842 #define SYSCTL_RCC_OSCSRC_M     0x00000030  ///< Oscillator Source
00843 #define SYSCTL_RCC_OSCSRC_MAIN  0x00000000  ///< MOSC
00844 #define SYSCTL_RCC_OSCSRC_INT   0x00000010  ///< IOSC
00845 #define SYSCTL_RCC_OSCSRC_INT4  0x00000020  ///< IOSC/4
00846 #define SYSCTL_RCC_OSCSRC_30    0x00000030  ///< 30 kHz
00847 #define SYSCTL_RCC_IOSCVER      0x00000008  ///< Internal Oscillator Verification
00848
00849 #define SYSCTL_RCC_MOSCVER      0x00000004  ///< Main Oscillator Verification
00850
00851 #define SYSCTL_RCC_IOSCDIS      0x00000002  ///< Internal Oscillator Disable
00852 #define SYSCTL_RCC_MOSCDIS      0x00000001  ///< Main Oscillator Disable
00853 #define SYSCTL_RCC_SYSDIV_S     23
00854 #define SYSCTL_RCC_PWMDIV_S     17          ///< Shift to the PWMDIV field
00855 #define SYSCTL_RCC_XTAL_S       6           ///< Shift to the XTAL field
00856 #define SYSCTL_RCC_OSCSRC_S     4           ///< Shift to the OSCSRC field
00857 /*\}*/
00858
00862 /*\{*/
00863 #define SYSCTL_PLLCFG_OD_M      0x0000C000  ///< PLL OD Value
00864 #define SYSCTL_PLLCFG_OD_1      0x00000000  ///< Divide by 1
00865 #define SYSCTL_PLLCFG_OD_2      0x00004000  ///< Divide by 2
00866 #define SYSCTL_PLLCFG_OD_4      0x00008000  ///< Divide by 4
00867 #define SYSCTL_PLLCFG_F_M       0x00003FE0  ///< PLL F Value
00868 #define SYSCTL_PLLCFG_R_M       0x0000001F  ///< PLL R Value
00869 #define SYSCTL_PLLCFG_F_S       5
00870 #define SYSCTL_PLLCFG_R_S       0
00871 /*\}*/
00872
00877 /*\{*/
00878 #define SYSCTL_GPIOHSCTL_PORTH  0x00000080  ///< Port H High-Speed
00879 #define SYSCTL_GPIOHSCTL_PORTG  0x00000040  ///< Port G High-Speed
00880 #define SYSCTL_GPIOHSCTL_PORTF  0x00000020  ///< Port F High-Speed
00881 #define SYSCTL_GPIOHSCTL_PORTE  0x00000010  ///< Port E High-Speed
00882 #define SYSCTL_GPIOHSCTL_PORTD  0x00000008  ///< Port D High-Speed
00883 #define SYSCTL_GPIOHSCTL_PORTC  0x00000004  ///< Port C High-Speed
00884 #define SYSCTL_GPIOHSCTL_PORTB  0x00000002  ///< Port B High-Speed
00885 #define SYSCTL_GPIOHSCTL_PORTA  0x00000001  ///< Port A High-Speed
00886 /*\}*/
00887
00892 /*\{*/
00893 #define SYSCTL_GPIOHBCTL_PORTJ  0x00000100  ///< Port J Advanced High-Performance
00894
00895 #define SYSCTL_GPIOHBCTL_PORTH  0x00000080  ///< Port H Advanced High-Performance
00896
00897 #define SYSCTL_GPIOHBCTL_PORTG  0x00000040  ///< Port G Advanced High-Performance
00898
00899 #define SYSCTL_GPIOHBCTL_PORTF  0x00000020  ///< Port F Advanced High-Performance
00900
00901 #define SYSCTL_GPIOHBCTL_PORTE  0x00000010  ///< Port E Advanced High-Performance
00902
00903 #define SYSCTL_GPIOHBCTL_PORTD  0x00000008  ///< Port D Advanced High-Performance
00904
00905 #define SYSCTL_GPIOHBCTL_PORTC  0x00000004  ///< Port C Advanced High-Performance
00906
00907 #define SYSCTL_GPIOHBCTL_PORTB  0x00000002  ///< Port B Advanced High-Performance
00908
00909 #define SYSCTL_GPIOHBCTL_PORTA  0x00000001  ///< Port A Advanced High-Performance
00910
00911 /*\}*/
00912
00916 /*\{*/
00917 #define SYSCTL_RCC2_USERCC2     0x80000000  ///< Use RCC2
00918 #define SYSCTL_RCC2_DIV400      0x40000000  ///< Divide PLL as 400 MHz vs. 200
00919
00920 #define SYSCTL_RCC2_SYSDIV2_M   0x1F800000  ///< System Clock Divisor 2
00921 #define SYSCTL_RCC2_SYSDIV2_2   0x00800000  ///< System clock /2
00922 #define SYSCTL_RCC2_SYSDIV2_3   0x01000000  ///< System clock /3
00923 #define SYSCTL_RCC2_SYSDIV2_4   0x01800000  ///< System clock /4
00924 #define SYSCTL_RCC2_SYSDIV2_5   0x02000000  ///< System clock /5
00925 #define SYSCTL_RCC2_SYSDIV2_6   0x02800000  ///< System clock /6
00926 #define SYSCTL_RCC2_SYSDIV2_7   0x03000000  ///< System clock /7
00927 #define SYSCTL_RCC2_SYSDIV2_8   0x03800000  ///< System clock /8
00928 #define SYSCTL_RCC2_SYSDIV2_9   0x04000000  ///< System clock /9
00929 #define SYSCTL_RCC2_SYSDIV2_10  0x04800000  ///< System clock /10
00930 #define SYSCTL_RCC2_SYSDIV2_11  0x05000000  ///< System clock /11
00931 #define SYSCTL_RCC2_SYSDIV2_12  0x05800000  ///< System clock /12
00932 #define SYSCTL_RCC2_SYSDIV2_13  0x06000000  ///< System clock /13
00933 #define SYSCTL_RCC2_SYSDIV2_14  0x06800000  ///< System clock /14
00934 #define SYSCTL_RCC2_SYSDIV2_15  0x07000000  ///< System clock /15
00935 #define SYSCTL_RCC2_SYSDIV2_16  0x07800000  ///< System clock /16
00936 #define SYSCTL_RCC2_SYSDIV2_17  0x08000000  ///< System clock /17
00937 #define SYSCTL_RCC2_SYSDIV2_18  0x08800000  ///< System clock /18
00938 #define SYSCTL_RCC2_SYSDIV2_19  0x09000000  ///< System clock /19
00939 #define SYSCTL_RCC2_SYSDIV2_20  0x09800000  ///< System clock /20
00940 #define SYSCTL_RCC2_SYSDIV2_21  0x0A000000  ///< System clock /21
00941 #define SYSCTL_RCC2_SYSDIV2_22  0x0A800000  ///< System clock /22
00942 #define SYSCTL_RCC2_SYSDIV2_23  0x0B000000  ///< System clock /23
00943 #define SYSCTL_RCC2_SYSDIV2_24  0x0B800000  ///< System clock /24
00944 #define SYSCTL_RCC2_SYSDIV2_25  0x0C000000  ///< System clock /25
00945 #define SYSCTL_RCC2_SYSDIV2_26  0x0C800000  ///< System clock /26
00946 #define SYSCTL_RCC2_SYSDIV2_27  0x0D000000  ///< System clock /27
00947 #define SYSCTL_RCC2_SYSDIV2_28  0x0D800000  ///< System clock /28
00948 #define SYSCTL_RCC2_SYSDIV2_29  0x0E000000  ///< System clock /29
00949 #define SYSCTL_RCC2_SYSDIV2_30  0x0E800000  ///< System clock /30
00950 #define SYSCTL_RCC2_SYSDIV2_31  0x0F000000  ///< System clock /31
00951 #define SYSCTL_RCC2_SYSDIV2_32  0x0F800000  ///< System clock /32
00952 #define SYSCTL_RCC2_SYSDIV2_33  0x10000000  ///< System clock /33
00953 #define SYSCTL_RCC2_SYSDIV2_34  0x10800000  ///< System clock /34
00954 #define SYSCTL_RCC2_SYSDIV2_35  0x11000000  ///< System clock /35
00955 #define SYSCTL_RCC2_SYSDIV2_36  0x11800000  ///< System clock /36
00956 #define SYSCTL_RCC2_SYSDIV2_37  0x12000000  ///< System clock /37
00957 #define SYSCTL_RCC2_SYSDIV2_38  0x12800000  ///< System clock /38
00958 #define SYSCTL_RCC2_SYSDIV2_39  0x13000000  ///< System clock /39
00959 #define SYSCTL_RCC2_SYSDIV2_40  0x13800000  ///< System clock /40
00960 #define SYSCTL_RCC2_SYSDIV2_41  0x14000000  ///< System clock /41
00961 #define SYSCTL_RCC2_SYSDIV2_42  0x14800000  ///< System clock /42
00962 #define SYSCTL_RCC2_SYSDIV2_43  0x15000000  ///< System clock /43
00963 #define SYSCTL_RCC2_SYSDIV2_44  0x15800000  ///< System clock /44
00964 #define SYSCTL_RCC2_SYSDIV2_45  0x16000000  ///< System clock /45
00965 #define SYSCTL_RCC2_SYSDIV2_46  0x16800000  ///< System clock /46
00966 #define SYSCTL_RCC2_SYSDIV2_47  0x17000000  ///< System clock /47
00967 #define SYSCTL_RCC2_SYSDIV2_48  0x17800000  ///< System clock /48
00968 #define SYSCTL_RCC2_SYSDIV2_49  0x18000000  ///< System clock /49
00969 #define SYSCTL_RCC2_SYSDIV2_50  0x18800000  ///< System clock /50
00970 #define SYSCTL_RCC2_SYSDIV2_51  0x19000000  ///< System clock /51
00971 #define SYSCTL_RCC2_SYSDIV2_52  0x19800000  ///< System clock /52
00972 #define SYSCTL_RCC2_SYSDIV2_53  0x1A000000  ///< System clock /53
00973 #define SYSCTL_RCC2_SYSDIV2_54  0x1A800000  ///< System clock /54
00974 #define SYSCTL_RCC2_SYSDIV2_55  0x1B000000  ///< System clock /55
00975 #define SYSCTL_RCC2_SYSDIV2_56  0x1B800000  ///< System clock /56
00976 #define SYSCTL_RCC2_SYSDIV2_57  0x1C000000  ///< System clock /57
00977 #define SYSCTL_RCC2_SYSDIV2_58  0x1C800000  ///< System clock /58
00978 #define SYSCTL_RCC2_SYSDIV2_59  0x1D000000  ///< System clock /59
00979 #define SYSCTL_RCC2_SYSDIV2_60  0x1D800000  ///< System clock /60
00980 #define SYSCTL_RCC2_SYSDIV2_61  0x1E000000  ///< System clock /61
00981 #define SYSCTL_RCC2_SYSDIV2_62  0x1E800000  ///< System clock /62
00982 #define SYSCTL_RCC2_SYSDIV2_63  0x1F000000  ///< System clock /63
00983 #define SYSCTL_RCC2_SYSDIV2_64  0x1F800000  ///< System clock /64
00984 #define SYSCTL_RCC2_SYSDIV2LSB  0x00400000  ///< Additional LSB for SYSDIV2
00985 #define SYSCTL_RCC2_USBPWRDN    0x00004000  ///< Power-Down USB PLL
00986 #define SYSCTL_RCC2_PWRDN2      0x00002000  ///< Power-Down PLL 2
00987 #define SYSCTL_RCC2_BYPASS2     0x00000800  ///< PLL Bypass 2
00988 #define SYSCTL_RCC2_OSCSRC2_M   0x00000070  ///< Oscillator Source 2
00989 #define SYSCTL_RCC2_OSCSRC2_MO  0x00000000  ///< MOSC
00990 #define SYSCTL_RCC2_OSCSRC2_IO  0x00000010  ///< PIOSC
00991 #define SYSCTL_RCC2_OSCSRC2_IO4 0x00000020  ///< PIOSC/4
00992 #define SYSCTL_RCC2_OSCSRC2_30  0x00000030  ///< 30 kHz
00993 #define SYSCTL_RCC2_OSCSRC2_419 0x00000060  ///< 4.194304 MHz
00994 #define SYSCTL_RCC2_OSCSRC2_32  0x00000070  ///< 32.768 kHz
00995 #define SYSCTL_RCC2_SYSDIV2_S   23
00996 /*\}*/
00997
01001 /*\{*/
01002 #define SYSCTL_MOSCCTL_CVAL     0x00000001  ///< Clock Validation for MOSC
01003 /*\}*/
01004
01008 /*\{*/
01009 #define SYSCTL_RCGC0_WDT1       0x10000000  ///< WDT1 Clock Gating Control
01010 #define SYSCTL_RCGC0_CAN2       0x04000000  ///< CAN2 Clock Gating Control
01011 #define SYSCTL_RCGC0_CAN1       0x02000000  ///< CAN1 Clock Gating Control
01012 #define SYSCTL_RCGC0_CAN0       0x01000000  ///< CAN0 Clock Gating Control
01013 #define SYSCTL_RCGC0_PWM        0x00100000  ///< PWM Clock Gating Control
01014 #define SYSCTL_RCGC0_ADC1       0x00020000  ///< ADC1 Clock Gating Control
01015 #define SYSCTL_RCGC0_ADC0       0x00010000  ///< ADC0 Clock Gating Control
01016 #define SYSCTL_RCGC0_ADCSPD_M   0x00000F00  ///< ADC Sample Speed
01017 #define SYSCTL_RCGC0_ADCSPD125K 0x00000000  ///< 125K samples/second
01018 #define SYSCTL_RCGC0_ADCSPD250K 0x00000100  ///< 250K samples/second
01019 #define SYSCTL_RCGC0_ADCSPD500K 0x00000200  ///< 500K samples/second
01020 #define SYSCTL_RCGC0_ADCSPD1M   0x00000300  ///< 1M samples/second
01021 #define SYSCTL_RCGC0_ADC1SPD_M  0x00000C00  ///< ADC1 Sample Speed
01022 #define SYSCTL_RCGC0_ADC1SPD_125K \
01023                                 0x00000000  ///< 125K samples/second
01024 #define SYSCTL_RCGC0_ADC1SPD_250K \
01025                                 0x00000400  ///< 250K samples/second
01026 #define SYSCTL_RCGC0_ADC1SPD_500K \
01027                                 0x00000800  ///< 500K samples/second
01028 #define SYSCTL_RCGC0_ADC1SPD_1M 0x00000C00  ///< 1M samples/second
01029 #define SYSCTL_RCGC0_ADC0SPD_M  0x00000300  ///< ADC0 Sample Speed
01030 #define SYSCTL_RCGC0_ADC0SPD_125K \
01031                                 0x00000000  ///< 125K samples/second
01032 #define SYSCTL_RCGC0_ADC0SPD_250K \
01033                                 0x00000100  ///< 250K samples/second
01034 #define SYSCTL_RCGC0_ADC0SPD_500K \
01035                                 0x00000200  ///< 500K samples/second
01036 #define SYSCTL_RCGC0_ADC0SPD_1M 0x00000300  ///< 1M samples/second
01037 #define SYSCTL_RCGC0_HIB        0x00000040  ///< HIB Clock Gating Control
01038 #define SYSCTL_RCGC0_WDT0       0x00000008  ///< WDT0 Clock Gating Control
01039 /*\}*/
01040
01044 /*\{*/
01045 #define SYSCTL_RCGC1_EPI0       0x40000000  ///< EPI0 Clock Gating
01046 #define SYSCTL_RCGC1_I2S0       0x10000000  ///< I2S0 Clock Gating
01047 #define SYSCTL_RCGC1_COMP2      0x04000000  ///< Analog Comparator 2 Clock Gating
01048 #define SYSCTL_RCGC1_COMP1      0x02000000  ///< Analog Comparator 1 Clock Gating
01049 #define SYSCTL_RCGC1_COMP0      0x01000000  ///< Analog Comparator 0 Clock Gating
01050 #define SYSCTL_RCGC1_TIMER3     0x00080000  ///< Timer 3 Clock Gating Control
01051 #define SYSCTL_RCGC1_TIMER2     0x00040000  ///< Timer 2 Clock Gating Control
01052 #define SYSCTL_RCGC1_TIMER1     0x00020000  ///< Timer 1 Clock Gating Control
01053 #define SYSCTL_RCGC1_TIMER0     0x00010000  ///< Timer 0 Clock Gating Control
01054 #define SYSCTL_RCGC1_I2C1       0x00004000  ///< I2C1 Clock Gating Control
01055 #define SYSCTL_RCGC1_I2C0       0x00001000  ///< I2C0 Clock Gating Control
01056 #define SYSCTL_RCGC1_QEI1       0x00000200  ///< QEI1 Clock Gating Control
01057 #define SYSCTL_RCGC1_QEI0       0x00000100  ///< QEI0 Clock Gating Control
01058 #define SYSCTL_RCGC1_SSI1       0x00000020  ///< SSI1 Clock Gating Control
01059 #define SYSCTL_RCGC1_SSI0       0x00000010  ///< SSI0 Clock Gating Control
01060 #define SYSCTL_RCGC1_UART2      0x00000004  ///< UART2 Clock Gating Control
01061 #define SYSCTL_RCGC1_UART1      0x00000002  ///< UART1 Clock Gating Control
01062 #define SYSCTL_RCGC1_UART0      0x00000001  ///< UART0 Clock Gating Control
01063 /*\}*/
01064
01068 /*\{*/
01069 #define SYSCTL_RCGC2_EPHY0      0x40000000  ///< PHY0 Clock Gating Control
01070 #define SYSCTL_RCGC2_EMAC0      0x10000000  ///< MAC0 Clock Gating Control
01071 #define SYSCTL_RCGC2_USB0       0x00010000  ///< USB0 Clock Gating Control
01072 #define SYSCTL_RCGC2_UDMA       0x00002000  ///< Micro-DMA Clock Gating Control
01073 #define SYSCTL_RCGC2_GPIOJ      0x00000100  ///< Port J Clock Gating Control
01074 #define SYSCTL_RCGC2_GPIOH      0x00000080  ///< Port H Clock Gating Control
01075 #define SYSCTL_RCGC2_GPIOG      0x00000040  ///< Port G Clock Gating Control
01076 #define SYSCTL_RCGC2_GPIOF      0x00000020  ///< Port F Clock Gating Control
01077 #define SYSCTL_RCGC2_GPIOE      0x00000010  ///< Port E Clock Gating Control
01078 #define SYSCTL_RCGC2_GPIOD      0x00000008  ///< Port D Clock Gating Control
01079 #define SYSCTL_RCGC2_GPIOC      0x00000004  ///< Port C Clock Gating Control
01080 #define SYSCTL_RCGC2_GPIOB      0x00000002  ///< Port B Clock Gating Control
01081 #define SYSCTL_RCGC2_GPIOA      0x00000001  ///< Port A Clock Gating Control
01082 /*\}*/
01083
01087 /*\{*/
01088 #define SYSCTL_SCGC0_WDT1       0x10000000  ///< WDT1 Clock Gating Control
01089 #define SYSCTL_SCGC0_CAN2       0x04000000  ///< CAN2 Clock Gating Control
01090 #define SYSCTL_SCGC0_CAN1       0x02000000  ///< CAN1 Clock Gating Control
01091 #define SYSCTL_SCGC0_CAN0       0x01000000  ///< CAN0 Clock Gating Control
01092 #define SYSCTL_SCGC0_PWM        0x00100000  ///< PWM Clock Gating Control
01093 #define SYSCTL_SCGC0_ADC1       0x00020000  ///< ADC1 Clock Gating Control
01094 #define SYSCTL_SCGC0_ADC0       0x00010000  ///< ADC0 Clock Gating Control
01095 #define SYSCTL_SCGC0_ADCSPD_M   0x00000F00  ///< ADC Sample Speed
01096 #define SYSCTL_SCGC0_ADCSPD125K 0x00000000  ///< 125K samples/second
01097 #define SYSCTL_SCGC0_ADCSPD250K 0x00000100  ///< 250K samples/second
01098 #define SYSCTL_SCGC0_ADCSPD500K 0x00000200  ///< 500K samples/second
01099 #define SYSCTL_SCGC0_ADCSPD1M   0x00000300  ///< 1M samples/second
01100 #define SYSCTL_SCGC0_ADC1SPD_M  0x00000C00  ///< ADC1 Sample Speed
01101 #define SYSCTL_SCGC0_ADC1SPD_125K \
01102                                 0x00000000  ///< 125K samples/second
01103 #define SYSCTL_SCGC0_ADC1SPD_250K \
01104                                 0x00000400  ///< 250K samples/second
01105 #define SYSCTL_SCGC0_ADC1SPD_500K \
01106                                 0x00000800  ///< 500K samples/second
01107 #define SYSCTL_SCGC0_ADC1SPD_1M 0x00000C00  ///< 1M samples/second
01108 #define SYSCTL_SCGC0_ADC0SPD_M  0x00000300  ///< ADC0 Sample Speed
01109 #define SYSCTL_SCGC0_ADC0SPD_125K \
01110                                 0x00000000  ///< 125K samples/second
01111 #define SYSCTL_SCGC0_ADC0SPD_250K \
01112                                 0x00000100  ///< 250K samples/second
01113 #define SYSCTL_SCGC0_ADC0SPD_500K \
01114                                 0x00000200  ///< 500K samples/second
01115 #define SYSCTL_SCGC0_ADC0SPD_1M 0x00000300  ///< 1M samples/second
01116 #define SYSCTL_SCGC0_HIB        0x00000040  ///< HIB Clock Gating Control
01117 #define SYSCTL_SCGC0_WDT0       0x00000008  ///< WDT0 Clock Gating Control
01118 /*\}*/
01119
01123 /*\{*/
01124 #define SYSCTL_SCGC1_EPI0       0x40000000  ///< EPI0 Clock Gating
01125 #define SYSCTL_SCGC1_I2S0       0x10000000  ///< I2S0 Clock Gating
01126 #define SYSCTL_SCGC1_COMP2      0x04000000  ///< Analog Comparator 2 Clock Gating
01127 #define SYSCTL_SCGC1_COMP1      0x02000000  ///< Analog Comparator 1 Clock Gating
01128 #define SYSCTL_SCGC1_COMP0      0x01000000  ///< Analog Comparator 0 Clock Gating
01129 #define SYSCTL_SCGC1_TIMER3     0x00080000  ///< Timer 3 Clock Gating Control
01130 #define SYSCTL_SCGC1_TIMER2     0x00040000  ///< Timer 2 Clock Gating Control
01131 #define SYSCTL_SCGC1_TIMER1     0x00020000  ///< Timer 1 Clock Gating Control
01132 #define SYSCTL_SCGC1_TIMER0     0x00010000  ///< Timer 0 Clock Gating Control
01133 #define SYSCTL_SCGC1_I2C1       0x00004000  ///< I2C1 Clock Gating Control
01134 #define SYSCTL_SCGC1_I2C0       0x00001000  ///< I2C0 Clock Gating Control
01135 #define SYSCTL_SCGC1_QEI1       0x00000200  ///< QEI1 Clock Gating Control
01136 #define SYSCTL_SCGC1_QEI0       0x00000100  ///< QEI0 Clock Gating Control
01137 #define SYSCTL_SCGC1_SSI1       0x00000020  ///< SSI1 Clock Gating Control
01138 #define SYSCTL_SCGC1_SSI0       0x00000010  ///< SSI0 Clock Gating Control
01139 #define SYSCTL_SCGC1_UART2      0x00000004  ///< UART2 Clock Gating Control
01140 #define SYSCTL_SCGC1_UART1      0x00000002  ///< UART1 Clock Gating Control
01141 #define SYSCTL_SCGC1_UART0      0x00000001  ///< UART0 Clock Gating Control
01142 /*\}*/
01143
01147 /*\{*/
01148 #define SYSCTL_SCGC2_EPHY0      0x40000000  ///< PHY0 Clock Gating Control
01149 #define SYSCTL_SCGC2_EMAC0      0x10000000  ///< MAC0 Clock Gating Control
01150 #define SYSCTL_SCGC2_USB0       0x00010000  ///< USB0 Clock Gating Control
01151 #define SYSCTL_SCGC2_UDMA       0x00002000  ///< Micro-DMA Clock Gating Control
01152 #define SYSCTL_SCGC2_GPIOJ      0x00000100  ///< Port J Clock Gating Control
01153 #define SYSCTL_SCGC2_GPIOH      0x00000080  ///< Port H Clock Gating Control
01154 #define SYSCTL_SCGC2_GPIOG      0x00000040  ///< Port G Clock Gating Control
01155 #define SYSCTL_SCGC2_GPIOF      0x00000020  ///< Port F Clock Gating Control
01156 #define SYSCTL_SCGC2_GPIOE      0x00000010  ///< Port E Clock Gating Control
01157 #define SYSCTL_SCGC2_GPIOD      0x00000008  ///< Port D Clock Gating Control
01158 #define SYSCTL_SCGC2_GPIOC      0x00000004  ///< Port C Clock Gating Control
01159 #define SYSCTL_SCGC2_GPIOB      0x00000002  ///< Port B Clock Gating Control
01160 #define SYSCTL_SCGC2_GPIOA      0x00000001  ///< Port A Clock Gating Control
01161 /*\}*/
01162
01166 /*\{*/
01167 #define SYSCTL_DCGC0_WDT1       0x10000000  ///< WDT1 Clock Gating Control
01168 #define SYSCTL_DCGC0_CAN2       0x04000000  ///< CAN2 Clock Gating Control
01169 #define SYSCTL_DCGC0_CAN1       0x02000000  ///< CAN1 Clock Gating Control
01170 #define SYSCTL_DCGC0_CAN0       0x01000000  ///< CAN0 Clock Gating Control
01171 #define SYSCTL_DCGC0_PWM        0x00100000  ///< PWM Clock Gating Control
01172 #define SYSCTL_DCGC0_ADC1       0x00020000  ///< ADC1 Clock Gating Control
01173 #define SYSCTL_DCGC0_ADC0       0x00010000  ///< ADC0 Clock Gating Control
01174 #define SYSCTL_DCGC0_HIB        0x00000040  ///< HIB Clock Gating Control
01175 #define SYSCTL_DCGC0_WDT0       0x00000008  ///< WDT0 Clock Gating Control
01176 /*\}*/
01177
01181 /*\{*/
01182 #define SYSCTL_DCGC1_EPI0       0x40000000  ///< EPI0 Clock Gating
01183 #define SYSCTL_DCGC1_I2S0       0x10000000  ///< I2S0 Clock Gating
01184 #define SYSCTL_DCGC1_COMP2      0x04000000  ///< Analog Comparator 2 Clock Gating
01185 #define SYSCTL_DCGC1_COMP1      0x02000000  ///< Analog Comparator 1 Clock Gating
01186 #define SYSCTL_DCGC1_COMP0      0x01000000  ///< Analog Comparator 0 Clock Gating
01187 #define SYSCTL_DCGC1_TIMER3     0x00080000  ///< Timer 3 Clock Gating Control
01188 #define SYSCTL_DCGC1_TIMER2     0x00040000  ///< Timer 2 Clock Gating Control
01189 #define SYSCTL_DCGC1_TIMER1     0x00020000  ///< Timer 1 Clock Gating Control
01190 #define SYSCTL_DCGC1_TIMER0     0x00010000  ///< Timer 0 Clock Gating Control
01191 #define SYSCTL_DCGC1_I2C1       0x00004000  ///< I2C1 Clock Gating Control
01192 #define SYSCTL_DCGC1_I2C0       0x00001000  ///< I2C0 Clock Gating Control
01193 #define SYSCTL_DCGC1_QEI1       0x00000200  ///< QEI1 Clock Gating Control
01194 #define SYSCTL_DCGC1_QEI0       0x00000100  ///< QEI0 Clock Gating Control
01195 #define SYSCTL_DCGC1_SSI1       0x00000020  ///< SSI1 Clock Gating Control
01196 #define SYSCTL_DCGC1_SSI0       0x00000010  ///< SSI0 Clock Gating Control
01197 #define SYSCTL_DCGC1_UART2      0x00000004  ///< UART2 Clock Gating Control
01198 #define SYSCTL_DCGC1_UART1      0x00000002  ///< UART1 Clock Gating Control
01199 #define SYSCTL_DCGC1_UART0      0x00000001  ///< UART0 Clock Gating Control
01200 /*\}*/
01201
01205 /*\{*/
01206 #define SYSCTL_DCGC2_EPHY0      0x40000000  ///< PHY0 Clock Gating Control
01207 #define SYSCTL_DCGC2_EMAC0      0x10000000  ///< MAC0 Clock Gating Control
01208 #define SYSCTL_DCGC2_USB0       0x00010000  ///< USB0 Clock Gating Control
01209 #define SYSCTL_DCGC2_UDMA       0x00002000  ///< Micro-DMA Clock Gating Control
01210 #define SYSCTL_DCGC2_GPIOJ      0x00000100  ///< Port J Clock Gating Control
01211 #define SYSCTL_DCGC2_GPIOH      0x00000080  ///< Port H Clock Gating Control
01212 #define SYSCTL_DCGC2_GPIOG      0x00000040  ///< Port G Clock Gating Control
01213 #define SYSCTL_DCGC2_GPIOF      0x00000020  ///< Port F Clock Gating Control
01214 #define SYSCTL_DCGC2_GPIOE      0x00000010  ///< Port E Clock Gating Control
01215 #define SYSCTL_DCGC2_GPIOD      0x00000008  ///< Port D Clock Gating Control
01216 #define SYSCTL_DCGC2_GPIOC      0x00000004  ///< Port C Clock Gating Control
01217 #define SYSCTL_DCGC2_GPIOB      0x00000002  ///< Port B Clock Gating Control
01218 #define SYSCTL_DCGC2_GPIOA      0x00000001  ///< Port A Clock Gating Control
01219 /*\}*/
01220
01225 /*\{*/
01226 #define SYSCTL_DSLPCLKCFG_D_M   0x1F800000  ///< Divider Field Override
01227 #define SYSCTL_DSLPCLKCFG_D_1   0x00000000  ///< System clock /1
01228 #define SYSCTL_DSLPCLKCFG_D_2   0x00800000  ///< System clock /2
01229 #define SYSCTL_DSLPCLKCFG_D_3   0x01000000  ///< System clock /3
01230 #define SYSCTL_DSLPCLKCFG_D_4   0x01800000  ///< System clock /4
01231 #define SYSCTL_DSLPCLKCFG_D_5   0x02000000  ///< System clock /5
01232 #define SYSCTL_DSLPCLKCFG_D_6   0x02800000  ///< System clock /6
01233 #define SYSCTL_DSLPCLKCFG_D_7   0x03000000  ///< System clock /7
01234 #define SYSCTL_DSLPCLKCFG_D_8   0x03800000  ///< System clock /8
01235 #define SYSCTL_DSLPCLKCFG_D_9   0x04000000  ///< System clock /9
01236 #define SYSCTL_DSLPCLKCFG_D_10  0x04800000  ///< System clock /10
01237 #define SYSCTL_DSLPCLKCFG_D_11  0x05000000  ///< System clock /11
01238 #define SYSCTL_DSLPCLKCFG_D_12  0x05800000  ///< System clock /12
01239 #define SYSCTL_DSLPCLKCFG_D_13  0x06000000  ///< System clock /13
01240 #define SYSCTL_DSLPCLKCFG_D_14  0x06800000  ///< System clock /14
01241 #define SYSCTL_DSLPCLKCFG_D_15  0x07000000  ///< System clock /15
01242 #define SYSCTL_DSLPCLKCFG_D_16  0x07800000  ///< System clock /16
01243 #define SYSCTL_DSLPCLKCFG_D_17  0x08000000  ///< System clock /17
01244 #define SYSCTL_DSLPCLKCFG_D_18  0x08800000  ///< System clock /18
01245 #define SYSCTL_DSLPCLKCFG_D_19  0x09000000  ///< System clock /19
01246 #define SYSCTL_DSLPCLKCFG_D_20  0x09800000  ///< System clock /20
01247 #define SYSCTL_DSLPCLKCFG_D_21  0x0A000000  ///< System clock /21
01248 #define SYSCTL_DSLPCLKCFG_D_22  0x0A800000  ///< System clock /22
01249 #define SYSCTL_DSLPCLKCFG_D_23  0x0B000000  ///< System clock /23
01250 #define SYSCTL_DSLPCLKCFG_D_24  0x0B800000  ///< System clock /24
01251 #define SYSCTL_DSLPCLKCFG_D_25  0x0C000000  ///< System clock /25
01252 #define SYSCTL_DSLPCLKCFG_D_26  0x0C800000  ///< System clock /26
01253 #define SYSCTL_DSLPCLKCFG_D_27  0x0D000000  ///< System clock /27
01254 #define SYSCTL_DSLPCLKCFG_D_28  0x0D800000  ///< System clock /28
01255 #define SYSCTL_DSLPCLKCFG_D_29  0x0E000000  ///< System clock /29
01256 #define SYSCTL_DSLPCLKCFG_D_30  0x0E800000  ///< System clock /30
01257 #define SYSCTL_DSLPCLKCFG_D_31  0x0F000000  ///< System clock /31
01258 #define SYSCTL_DSLPCLKCFG_D_32  0x0F800000  ///< System clock /32
01259 #define SYSCTL_DSLPCLKCFG_D_33  0x10000000  ///< System clock /33
01260 #define SYSCTL_DSLPCLKCFG_D_34  0x10800000  ///< System clock /34
01261 #define SYSCTL_DSLPCLKCFG_D_35  0x11000000  ///< System clock /35
01262 #define SYSCTL_DSLPCLKCFG_D_36  0x11800000  ///< System clock /36
01263 #define SYSCTL_DSLPCLKCFG_D_37  0x12000000  ///< System clock /37
01264 #define SYSCTL_DSLPCLKCFG_D_38  0x12800000  ///< System clock /38
01265 #define SYSCTL_DSLPCLKCFG_D_39  0x13000000  ///< System clock /39
01266 #define SYSCTL_DSLPCLKCFG_D_40  0x13800000  ///< System clock /40
01267 #define SYSCTL_DSLPCLKCFG_D_41  0x14000000  ///< System clock /41
01268 #define SYSCTL_DSLPCLKCFG_D_42  0x14800000  ///< System clock /42
01269 #define SYSCTL_DSLPCLKCFG_D_43  0x15000000  ///< System clock /43
01270 #define SYSCTL_DSLPCLKCFG_D_44  0x15800000  ///< System clock /44
01271 #define SYSCTL_DSLPCLKCFG_D_45  0x16000000  ///< System clock /45
01272 #define SYSCTL_DSLPCLKCFG_D_46  0x16800000  ///< System clock /46
01273 #define SYSCTL_DSLPCLKCFG_D_47  0x17000000  ///< System clock /47
01274 #define SYSCTL_DSLPCLKCFG_D_48  0x17800000  ///< System clock /48
01275 #define SYSCTL_DSLPCLKCFG_D_49  0x18000000  ///< System clock /49
01276 #define SYSCTL_DSLPCLKCFG_D_50  0x18800000  ///< System clock /50
01277 #define SYSCTL_DSLPCLKCFG_D_51  0x19000000  ///< System clock /51
01278 #define SYSCTL_DSLPCLKCFG_D_52  0x19800000  ///< System clock /52
01279 #define SYSCTL_DSLPCLKCFG_D_53  0x1A000000  ///< System clock /53
01280 #define SYSCTL_DSLPCLKCFG_D_54  0x1A800000  ///< System clock /54
01281 #define SYSCTL_DSLPCLKCFG_D_55  0x1B000000  ///< System clock /55
01282 #define SYSCTL_DSLPCLKCFG_D_56  0x1B800000  ///< System clock /56
01283 #define SYSCTL_DSLPCLKCFG_D_57  0x1C000000  ///< System clock /57
01284 #define SYSCTL_DSLPCLKCFG_D_58  0x1C800000  ///< System clock /58
01285 #define SYSCTL_DSLPCLKCFG_D_59  0x1D000000  ///< System clock /59
01286 #define SYSCTL_DSLPCLKCFG_D_60  0x1D800000  ///< System clock /60
01287 #define SYSCTL_DSLPCLKCFG_D_61  0x1E000000  ///< System clock /61
01288 #define SYSCTL_DSLPCLKCFG_D_62  0x1E800000  ///< System clock /62
01289 #define SYSCTL_DSLPCLKCFG_D_63  0x1F000000  ///< System clock /63
01290 #define SYSCTL_DSLPCLKCFG_D_64  0x1F800000  ///< System clock /64
01291 #define SYSCTL_DSLPCLKCFG_O_M   0x00000070  ///< Clock Source
01292 #define SYSCTL_DSLPCLKCFG_O_IGN 0x00000000  ///< MOSC
01293 #define SYSCTL_DSLPCLKCFG_O_IO  0x00000010  ///< PIOSC
01294 #define SYSCTL_DSLPCLKCFG_O_30  0x00000030  ///< 30 kHz
01295 #define SYSCTL_DSLPCLKCFG_O_32  0x00000070  ///< 32.768 kHz
01296 #define SYSCTL_DSLPCLKCFG_IOSC  0x00000001  ///< IOSC Clock Source
01297 #define SYSCTL_DSLPCLKCFG_D_S   23
01298 /*\}*/
01299
01303 /*\{*/
01304 #define SYSCTL_CLKVCLR_VERCLR   0x00000001  ///< Clock Verification Clear
01305 /*\}*/
01306
01311 /*\{*/
01312 #define SYSCTL_PIOSCCAL_UTEN    0x80000000  ///< Use User Trim Value
01313 #define SYSCTL_PIOSCCAL_CAL     0x00000200  ///< Start Calibration
01314 #define SYSCTL_PIOSCCAL_UPDATE  0x00000100  ///< Update Trim
01315 #define SYSCTL_PIOSCCAL_UT_M    0x0000007F  ///< User Trim Value
01316 #define SYSCTL_PIOSCCAL_UT_S    0
01317 /*\}*/
01318
01323 /*\{*/
01324 #define SYSCTL_PIOSCSTAT_DT_M   0x007F0000  ///< Default Trim Value
01325 #define SYSCTL_PIOSCSTAT_CR_M   0x00000300  ///< Calibration Result
01326 #define SYSCTL_PIOSCSTAT_CRNONE 0x00000000  ///< Calibration has not been
01327
01328 #define SYSCTL_PIOSCSTAT_CRPASS 0x00000100  ///< The last calibration operation
01329
01330 #define SYSCTL_PIOSCSTAT_CRFAIL 0x00000200  ///< The last calibration operation
01331
01332 #define SYSCTL_PIOSCSTAT_CT_M   0x0000007F  ///< Calibration Trim Value
01333 #define SYSCTL_PIOSCSTAT_DT_S   16
01334 #define SYSCTL_PIOSCSTAT_CT_S   0
01335 /*\}*/
01336
01340 /*\{*/
01341 #define SYSCTL_LDOARST_LDOARST  0x00000001  ///< LDO Reset
01342 /*\}*/
01343
01348 /*\{*/
01349 #define SYSCTL_I2SMCLKCFG_RXEN  0x80000000  ///< RX Clock Enable
01350 #define SYSCTL_I2SMCLKCFG_RXI_M 0x3FF00000  ///< RX Clock Integer Input
01351 #define SYSCTL_I2SMCLKCFG_RXF_M 0x000F0000  ///< RX Clock Fractional Input
01352 #define SYSCTL_I2SMCLKCFG_TXEN  0x00008000  ///< TX Clock Enable
01353 #define SYSCTL_I2SMCLKCFG_TXI_M 0x00003FF0  ///< TX Clock Integer Input
01354 #define SYSCTL_I2SMCLKCFG_TXF_M 0x0000000F  ///< TX Clock Fractional Input
01355 #define SYSCTL_I2SMCLKCFG_RXI_S 20
01356 #define SYSCTL_I2SMCLKCFG_RXF_S 16
01357 #define SYSCTL_I2SMCLKCFG_TXI_S 4
01358 #define SYSCTL_I2SMCLKCFG_TXF_S 0
01359 /*\}*/
01360
01364 /*\{*/
01365 #define SYSCTL_DC9_ADC1DC7      0x00800000  ///< ADC1 DC7 Present
01366 #define SYSCTL_DC9_ADC1DC6      0x00400000  ///< ADC1 DC6 Present
01367 #define SYSCTL_DC9_ADC1DC5      0x00200000  ///< ADC1 DC5 Present
01368 #define SYSCTL_DC9_ADC1DC4      0x00100000  ///< ADC1 DC4 Present
01369 #define SYSCTL_DC9_ADC1DC3      0x00080000  ///< ADC1 DC3 Present
01370 #define SYSCTL_DC9_ADC1DC2      0x00040000  ///< ADC1 DC2 Present
01371 #define SYSCTL_DC9_ADC1DC1      0x00020000  ///< ADC1 DC1 Present
01372 #define SYSCTL_DC9_ADC1DC0      0x00010000  ///< ADC1 DC0 Present
01373 #define SYSCTL_DC9_ADC0DC7      0x00000080  ///< ADC0 DC7 Present
01374 #define SYSCTL_DC9_ADC0DC6      0x00000040  ///< ADC0 DC6 Present
01375 #define SYSCTL_DC9_ADC0DC5      0x00000020  ///< ADC0 DC5 Present
01376 #define SYSCTL_DC9_ADC0DC4      0x00000010  ///< ADC0 DC4 Present
01377 #define SYSCTL_DC9_ADC0DC3      0x00000008  ///< ADC0 DC3 Present
01378 #define SYSCTL_DC9_ADC0DC2      0x00000004  ///< ADC0 DC2 Present
01379 #define SYSCTL_DC9_ADC0DC1      0x00000002  ///< ADC0 DC1 Present
01380 #define SYSCTL_DC9_ADC0DC0      0x00000001  ///< ADC0 DC0 Present
01381 /*\}*/
01382
01386 /*\{*/
01387 #define SYSCTL_NVMSTAT_TPSW     0x00000010  ///< Third Party Software Present
01388 #define SYSCTL_NVMSTAT_FWB      0x00000001  ///< 32 Word Flash Write Buffer
01389
01390 /*\}*/
01391
01396 /*\{*/
01397 #define SYSCTL_USER0            0x400FE1E0  ///< NV User Register 0
01398 #define SYSCTL_USER1            0x400FE1E4  ///< NV User Register 1
01399 /*\}*/
01400
01405 /*\{*/
01406 #define SYSCTL_DID0_VER_MASK    0x70000000  ///< DID0 version mask
01407 #define SYSCTL_DID0_CLASS_MASK  0x00FF0000  ///< Device Class
01408 #define SYSCTL_DID0_MAJ_MASK    0x0000FF00  ///< Major revision mask
01409 #define SYSCTL_DID0_MAJ_A       0x00000000  ///< Major revision A
01410 #define SYSCTL_DID0_MAJ_B       0x00000100  ///< Major revision B
01411 #define SYSCTL_DID0_MAJ_C       0x00000200  ///< Major revision C
01412 #define SYSCTL_DID0_MIN_MASK    0x000000FF  ///< Minor revision mask
01413 /*\}*/
01414
01419 /*\{*/
01420 #define SYSCTL_DID1_VER_MASK    0xF0000000  ///< Register version mask
01421 #define SYSCTL_DID1_FAM_MASK    0x0F000000  ///< Family mask
01422 #define SYSCTL_DID1_FAM_S       0x00000000  ///< Stellaris family
01423 #define SYSCTL_DID1_PRTNO_MASK  0x00FF0000  ///< Part number mask
01424 #define SYSCTL_DID1_PINCNT_MASK 0x0000E000  ///< Pin count
01425 #define SYSCTL_DID1_TEMP_MASK   0x000000E0  ///< Temperature range mask
01426 #define SYSCTL_DID1_PKG_MASK    0x00000018  ///< Package mask
01427 #define SYSCTL_DID1_PKG_48QFP   0x00000008  ///< QFP package
01428 #define SYSCTL_DID1_QUAL_MASK   0x00000003  ///< Qualification status mask
01429 #define SYSCTL_DID1_PKG_28SOIC  0x00000000  ///< SOIC package
01430 #define SYSCTL_DID1_PRTNO_SHIFT 16
01431 /*\}*/
01432
01437 /*\{*/
01438 #define SYSCTL_DC0_SRAMSZ_MASK  0xFFFF0000  ///< SRAM size mask
01439 #define SYSCTL_DC0_FLASHSZ_MASK 0x0000FFFF  ///< Flash size mask
01440 /*\}*/
01441
01446 /*\{*/
01447 #define SYSCTL_DC1_ADC          0x00010000  ///< ADC Module Present
01448 #define SYSCTL_DC1_SYSDIV_MASK  0x0000F000  ///< Minimum system divider mask
01449 #define SYSCTL_DC1_ADCSPD_MASK  0x00000F00  ///< ADC speed mask
01450 #define SYSCTL_DC1_WDOG         0x00000008  ///< Watchdog present
01451 #define SYSCTL_DC1_WDT          0x00000008  ///< Watchdog Timer Present
01452 /*\}*/
01453
01458 /*\{*/
01459 #define SYSCTL_DC2_I2C          0x00001000  ///< I2C present
01460 #define SYSCTL_DC2_QEI          0x00000100  ///< QEI present
01461 #define SYSCTL_DC2_SSI          0x00000010  ///< SSI present
01462 /*\}*/
01463
01468 /*\{*/
01469 #define SYSCTL_DC3_ADC7         0x00800000  ///< ADC7 Pin Present
01470 #define SYSCTL_DC3_ADC6         0x00400000  ///< ADC6 Pin Present
01471 #define SYSCTL_DC3_ADC5         0x00200000  ///< ADC5 Pin Present
01472 #define SYSCTL_DC3_ADC4         0x00100000  ///< ADC4 Pin Present
01473 #define SYSCTL_DC3_ADC3         0x00080000  ///< ADC3 Pin Present
01474 #define SYSCTL_DC3_ADC2         0x00040000  ///< ADC2 Pin Present
01475 #define SYSCTL_DC3_ADC1         0x00020000  ///< ADC1 Pin Present
01476 #define SYSCTL_DC3_ADC0         0x00010000  ///< ADC0 Pin Present
01477 #define SYSCTL_DC3_MC_FAULT0    0x00008000  ///< MC0 fault pin present
01478 /*\}*/
01479
01484 /*\{*/
01485 #define SYSCTL_PBORCTL_BOR_MASK 0x0000FFFC  ///< BOR wait timer
01486 #define SYSCTL_PBORCTL_BOR_SH   2
01487 /*\}*/
01488
01493 /*\{*/
01494 #define SYSCTL_LDOPCTL_MASK     0x0000003F  ///< Voltage adjust mask
01495 /*\}*/
01496
01501 /*\{*/
01502 #define SYSCTL_SRCR0_ADC        0x00010000  ///< ADC0 Reset Control
01503 #define SYSCTL_SRCR0_WDT        0x00000008  ///< WDT Reset Control
01504 /*\}*/
01505
01510 /*\{*/
01511 #define SYSCTL_RESC_WDOG        0x00000008  ///< Watchdog reset
01512 #define SYSCTL_RESC_WDT         0x00000008  ///< Watchdog Timer Reset
01513 /*\}*/
01514
01519 /*\{*/
01520 #define SYSCTL_RCC_SYSDIV_MASK  0x07800000  ///< System clock divider
01521 #define SYSCTL_RCC_USE_SYSDIV   0x00400000  ///< Use sytem clock divider
01522 #define SYSCTL_RCC_USE_PWMDIV   0x00100000  ///< Use PWM clock divider
01523 #define SYSCTL_RCC_PWMDIV_MASK  0x000E0000  ///< PWM clock divider
01524 #define SYSCTL_RCC_OE           0x00001000  ///< PLL output enable
01525 #define SYSCTL_RCC_XTAL_3_68MHz 0x00000140  ///< Using a 3.6864 MHz crystal
01526 #define SYSCTL_RCC_XTAL_4MHz    0x00000180  ///< Using a 4 MHz crystal
01527 #define SYSCTL_RCC_XTAL_MASK    0x000003C0  ///< Crystal attached to main osc
01528 #define SYSCTL_RCC_OSCSRC_MASK  0x00000030  ///< Oscillator input select
01529 #define SYSCTL_RCC_SYSDIV_SHIFT 23          ///< Shift to the SYSDIV field
01530 #define SYSCTL_RCC_PWMDIV_SHIFT 17          ///< Shift to the PWMDIV field
01531 #define SYSCTL_RCC_XTAL_SHIFT   6           ///< Shift to the XTAL field
01532 #define SYSCTL_RCC_OSCSRC_SHIFT 4           ///< Shift to the OSCSRC field
01533 /*\}*/
01534
01539 /*\{*/
01540 #define SYSCTL_PLLCFG_OD_MASK   0x0000C000  ///< Output divider
01541 #define SYSCTL_PLLCFG_F_MASK    0x00003FE0  ///< PLL multiplier
01542 #define SYSCTL_PLLCFG_R_MASK    0x0000001F  ///< Input predivider
01543 #define SYSCTL_PLLCFG_F_SHIFT   5
01544 #define SYSCTL_PLLCFG_R_SHIFT   0
01545 /*\}*/
01546
01551 /*\{*/
01552 #define SYSCTL_RCC2_USEFRACT    0x40000000  ///< Use fractional divider
01553 #define SYSCTL_RCC2_SYSDIV2_MSK 0x1F800000  ///< System clock divider
01554 #define SYSCTL_RCC2_FRACT       0x00400000  ///< Fractional divide
01555 #define SYSCTL_RCC2_OSCSRC2_MSK 0x00000070  ///< Oscillator input select
01556 /*\}*/
01557
01562 /*\{*/
01563 #define SYSCTL_RCGC0_ADC        0x00010000  ///< ADC0 Clock Gating Control
01564 #define SYSCTL_RCGC0_WDT        0x00000008  ///< WDT Clock Gating Control
01565 /*\}*/
01566
01571 /*\{*/
01572 #define SYSCTL_SCGC0_ADC        0x00010000  ///< ADC0 Clock Gating Control
01573 #define SYSCTL_SCGC0_WDT        0x00000008  ///< WDT Clock Gating Control
01574 /*\}*/
01575
01580 /*\{*/
01581 #define SYSCTL_DCGC0_ADC        0x00010000  ///< ADC0 Clock Gating Control
01582 #define SYSCTL_DCGC0_WDT        0x00000008  ///< WDT Clock Gating Control
01583 /*\}*/
01584
01589 /*\{*/
01590 #define SYSCTL_DSLPCLKCFG_D_MSK 0x1F800000  ///< Deep sleep system clock override
01591 #define SYSCTL_DSLPCLKCFG_O_MSK 0x00000070  ///< Deep sleep oscillator override
01592 /*\}*/
01593
01598 /*\{*/
01599 #define SYSCTL_CLKVCLR_CLR      0x00000001  ///< Clear clock verification fault
01600 /*\}*/
01601
01606 /*\{*/
01607 #define SYSCTL_LDOARST_ARST     0x00000001  ///< Allow LDO to reset device
01608 /*\}*/
01609
01614 /*\{*/
01615 #define SYSCTL_SET0_CAN2        0x04000000  ///< CAN 2 module
01616 #define SYSCTL_SET0_CAN1        0x02000000  ///< CAN 1 module
01617 #define SYSCTL_SET0_CAN0        0x01000000  ///< CAN 0 module
01618 #define SYSCTL_SET0_PWM         0x00100000  ///< PWM module
01619 #define SYSCTL_SET0_ADC         0x00010000  ///< ADC module
01620 #define SYSCTL_SET0_ADCSPD_MASK 0x00000F00  ///< ADC speed mask
01621 #define SYSCTL_SET0_ADCSPD_125K 0x00000000  ///< 125Ksps ADC
01622 #define SYSCTL_SET0_ADCSPD_250K 0x00000100  ///< 250Ksps ADC
01623 #define SYSCTL_SET0_ADCSPD_500K 0x00000200  ///< 500Ksps ADC
01624 #define SYSCTL_SET0_ADCSPD_1M   0x00000300  ///< 1Msps ADC
01625 #define SYSCTL_SET0_HIB         0x00000040  ///< Hibernation module
01626 #define SYSCTL_SET0_WDOG        0x00000008  ///< Watchdog module
01627 /*\}*/
01628
01633 /*\{*/
01634 #define SYSCTL_SET1_COMP2       0x04000000  ///< Analog comparator module 2
01635 #define SYSCTL_SET1_COMP1       0x02000000  ///< Analog comparator module 1
01636 #define SYSCTL_SET1_COMP0       0x01000000  ///< Analog comparator module 0
01637 #define SYSCTL_SET1_TIMER3      0x00080000  ///< Timer module 3
01638 #define SYSCTL_SET1_TIMER2      0x00040000  ///< Timer module 2
01639 #define SYSCTL_SET1_TIMER1      0x00020000  ///< Timer module 1
01640 #define SYSCTL_SET1_TIMER0      0x00010000  ///< Timer module 0
01641 #define SYSCTL_SET1_I2C1        0x00002000  ///< I2C module 1
01642 #define SYSCTL_SET1_I2C0        0x00001000  ///< I2C module 0
01643 #define SYSCTL_SET1_I2C         0x00001000  ///< I2C module
01644 #define SYSCTL_SET1_QEI1        0x00000200  ///< QEI module 1
01645 #define SYSCTL_SET1_QEI         0x00000100  ///< QEI module
01646 #define SYSCTL_SET1_QEI0        0x00000100  ///< QEI module 0
01647 #define SYSCTL_SET1_SSI1        0x00000020  ///< SSI module 1
01648 #define SYSCTL_SET1_SSI0        0x00000010  ///< SSI module 0
01649 #define SYSCTL_SET1_SSI         0x00000010  ///< SSI module
01650 #define SYSCTL_SET1_UART2       0x00000004  ///< UART module 2
01651 #define SYSCTL_SET1_UART1       0x00000002  ///< UART module 1
01652 #define SYSCTL_SET1_UART0       0x00000001  ///< UART module 0
01653 /*\}*/
01654
01659 /*\{*/
01660 #define SYSCTL_SET2_ETH         0x50000000  ///< ETH module
01661 #define SYSCTL_SET2_GPIOH       0x00000080  ///< GPIO H module
01662 #define SYSCTL_SET2_GPIOG       0x00000040  ///< GPIO G module
01663 #define SYSCTL_SET2_GPIOF       0x00000020  ///< GPIO F module
01664 #define SYSCTL_SET2_GPIOE       0x00000010  ///< GPIO E module
01665 #define SYSCTL_SET2_GPIOD       0x00000008  ///< GPIO D module
01666 #define SYSCTL_SET2_GPIOC       0x00000004  ///< GPIO C module
01667 #define SYSCTL_SET2_GPIOB       0x00000002  ///< GPIO B module
01668 #define SYSCTL_SET2_GPIOA       0x00000001  ///< GIPO A module
01669 /*\}*/
01670
01675 /*\{*/
01676 #define SYSCTL_INT_PLL_LOCK     0x00000040  ///< PLL lock interrupt
01677 #define SYSCTL_INT_CUR_LIMIT    0x00000020  ///< Current limit interrupt
01678 #define SYSCTL_INT_IOSC_FAIL    0x00000010  ///< Internal oscillator failure int
01679 #define SYSCTL_INT_MOSC_FAIL    0x00000008  ///< Main oscillator failure int
01680 #define SYSCTL_INT_POR          0x00000004  ///< Power on reset interrupt
01681 #define SYSCTL_INT_BOR          0x00000002  ///< Brown out interrupt
01682 #define SYSCTL_INT_PLL_FAIL     0x00000001  ///< PLL failure interrupt
01683 /*\}*/
01684
01685 #endif /* LM3S_SYSCTL_H */


BeRTOS: lm3s_types.h File Reference

  • cpu
  • cortex-m3
  • io
lm3s_types.h File Reference

LM3S generic hardware macros. More...

#include <cfg/compiler.h>
#include <cpu/types.h>

Go to the source code of this file.

Defines

#define | CLASS_IS_SANDSTORM
Helper Macros for determining the particular hardware revision.
#define | CLASS_IS_FURY
Helper Macros for determining the particular hardware revision.
#define | CLASS_IS_DUSTDEVIL
Helper Macros for determining the particular hardware revision.
#define | CLASS_IS_TEMPEST
Helper Macros for determining the particular hardware revision.
#define | REVISION_IS_A0
Helper Macros for determining the particular hardware revision.
#define | REVISION_IS_A1
Helper Macros for determining the particular hardware revision.
#define | REVISION_IS_A2
Helper Macros for determining the particular hardware revision.
#define | REVISION_IS_B0
Helper Macros for determining the particular hardware revision.
#define | REVISION_IS_B1
Helper Macros for determining the particular hardware revision.
#define | REVISION_IS_C0
Helper Macros for determining the particular hardware revision.
#define | REVISION_IS_C1
Helper Macros for determining the particular hardware revision.
#define | REVISION_IS_C2
Helper Macros for determining the particular hardware revision.

Detailed Description

LM3S generic hardware macros.

Definition in file lm3s_types.h.


BeRTOS: lm3s_types.h Source File

  • cpu
  • cortex-m3
  • io
lm3s_types.h
Go to the documentation of this file.
00001
00036 #ifndef LM3S_TYPES_H
00037 #define LM3S_TYPES_H
00038
00039 #include <cfg/compiler.h>
00040 #include <cpu/types.h>
00041
00045 /*\{*/
00046 #ifndef CLASS_IS_SANDSTORM
00047 #define CLASS_IS_SANDSTORM                                                    \
00048         (((HWREG(SYSCTL_DID0) & SYSCTL_DID0_VER_M) == SYSCTL_DID0_VER_0) ||   \
00049          ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \
00050           (SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_SANDSTORM)))
00051 #endif
00052
00053 #ifndef CLASS_IS_FURY
00054 #define CLASS_IS_FURY                                                        \
00055         ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \
00056          (SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_FURY))
00057 #endif
00058
00059 #ifndef CLASS_IS_DUSTDEVIL
00060 #define CLASS_IS_DUSTDEVIL                                                   \
00061         ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \
00062          (SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_DUSTDEVIL))
00063 #endif
00064
00065 #ifndef CLASS_IS_TEMPEST
00066 #define CLASS_IS_TEMPEST                                                     \
00067         ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \
00068          (SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_TEMPEST))
00069 #endif
00070
00071 #ifndef REVISION_IS_A0
00072 #define REVISION_IS_A0                                                     \
00073         ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
00074          (SYSCTL_DID0_MAJ_REVA | SYSCTL_DID0_MIN_0))
00075 #endif
00076
00077 #ifndef REVISION_IS_A1
00078 #define REVISION_IS_A1                                                     \
00079         ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
00080          (SYSCTL_DID0_MAJ_REVA | SYSCTL_DID0_MIN_0))
00081 #endif
00082
00083 #ifndef REVISION_IS_A2
00084 #define REVISION_IS_A2                                                     \
00085         ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
00086          (SYSCTL_DID0_MAJ_REVA | SYSCTL_DID0_MIN_2))
00087 #endif
00088
00089 #ifndef REVISION_IS_B0
00090 #define REVISION_IS_B0                                                     \
00091         ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
00092          (SYSCTL_DID0_MAJ_REVB | SYSCTL_DID0_MIN_0))
00093 #endif
00094
00095 #ifndef REVISION_IS_B1
00096 #define REVISION_IS_B1                                                     \
00097         ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
00098          (SYSCTL_DID0_MAJ_REVB | SYSCTL_DID0_MIN_1))
00099 #endif
00100
00101 #ifndef REVISION_IS_C0
00102 #define REVISION_IS_C0                                                     \
00103         ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
00104          (SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_0))
00105 #endif
00106
00107 #ifndef REVISION_IS_C1
00108 #define REVISION_IS_C1                                                     \
00109         ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
00110          (SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_1))
00111 #endif
00112
00113 #ifndef REVISION_IS_C2
00114 #define REVISION_IS_C2                                                     \
00115         ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
00116          (SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_2))
00117 #endif
00118 /*\}*/
00119
00120 #endif /* LM3S_TYPES_H */


BeRTOS: lm3s_uart.h File Reference

  • cpu
  • cortex-m3
  • io
lm3s_uart.h File Reference

LM3S1968 UART hardware. More...

Go to the source code of this file.

Defines

#define | UART_O_DR 0x00000000
The following are defines for the UART register offsets.
#define | UART_O_RSR 0x00000004
The following are defines for the UART register offsets.
#define | UART_O_ECR 0x00000004
The following are defines for the UART register offsets.
#define | UART_O_FR 0x00000018
The following are defines for the UART register offsets.
#define | UART_O_ILPR 0x00000020
The following are defines for the UART register offsets.
#define | UART_O_IBRD 0x00000024
The following are defines for the UART register offsets.
#define | UART_O_FBRD 0x00000028
The following are defines for the UART register offsets.
#define | UART_O_LCRH 0x0000002C
The following are defines for the UART register offsets.
#define | UART_O_CTL 0x00000030
The following are defines for the UART register offsets.
#define | UART_O_IFLS 0x00000034
The following are defines for the UART register offsets.
#define | UART_O_IM 0x00000038
The following are defines for the UART register offsets.
#define | UART_O_RIS 0x0000003C
The following are defines for the UART register offsets.
#define | UART_O_MIS 0x00000040
The following are defines for the UART register offsets.
#define | UART_O_ICR 0x00000044
The following are defines for the UART register offsets.
#define | UART_O_DMACTL 0x00000048
The following are defines for the UART register offsets.
#define | UART_O_LCTL 0x00000090
The following are defines for the UART register offsets.
#define | UART_O_LSS 0x00000094
The following are defines for the UART register offsets.
#define | UART_O_LTIM 0x00000098
The following are defines for the UART register offsets.
#define | UART_DR_OE 0x00000800
The following are defines for the bit fields in the UART_O_DR register.
#define | UART_DR_BE 0x00000400
The following are defines for the bit fields in the UART_O_DR register.
#define | UART_DR_PE 0x00000200
The following are defines for the bit fields in the UART_O_DR register.
#define | UART_DR_FE 0x00000100
The following are defines for the bit fields in the UART_O_DR register.
#define | UART_DR_DATA_M 0x000000FF
The following are defines for the bit fields in the UART_O_DR register.
#define | UART_DR_DATA_S 0
The following are defines for the bit fields in the UART_O_DR register.
#define | UART_RSR_OE 0x00000008
The following are defines for the bit fields in the UART_O_RSR register.
#define | UART_RSR_BE 0x00000004
The following are defines for the bit fields in the UART_O_RSR register.
#define | UART_RSR_PE 0x00000002
The following are defines for the bit fields in the UART_O_RSR register.
#define | UART_RSR_FE 0x00000001
The following are defines for the bit fields in the UART_O_RSR register.
#define | UART_ECR_DATA_M 0x000000FF
The following are defines for the bit fields in the UART_O_ECR register.
#define | UART_ECR_DATA_S 0
The following are defines for the bit fields in the UART_O_ECR register.
#define | UART_FR_RI 0x00000100
The following are defines for the bit fields in the UART_O_FR register.
#define | UART_FR_TXFE 0x00000080
The following are defines for the bit fields in the UART_O_FR register.
#define | UART_FR_RXFF 0x00000040
The following are defines for the bit fields in the UART_O_FR register.
#define | UART_FR_TXFF 0x00000020
The following are defines for the bit fields in the UART_O_FR register.
#define | UART_FR_RXFE 0x00000010
The following are defines for the bit fields in the UART_O_FR register.
#define | UART_FR_BUSY 0x00000008
The following are defines for the bit fields in the UART_O_FR register.
#define | UART_FR_DCD 0x00000004
The following are defines for the bit fields in the UART_O_FR register.
#define | UART_FR_DSR 0x00000002
The following are defines for the bit fields in the UART_O_FR register.
#define | UART_FR_CTS 0x00000001
The following are defines for the bit fields in the UART_O_FR register.
#define | UART_ILPR_ILPDVSR_M 0x000000FF
The following are defines for the bit fields in the UART_O_ILPR register.
#define | UART_ILPR_ILPDVSR_S 0
The following are defines for the bit fields in the UART_O_ILPR register.
#define | UART_IBRD_DIVINT_M 0x0000FFFF
The following are defines for the bit fields in the UART_O_IBRD register.
#define | UART_IBRD_DIVINT_S 0
The following are defines for the bit fields in the UART_O_IBRD register.
#define | UART_FBRD_DIVFRAC_M 0x0000003F
The following are defines for the bit fields in the UART_O_FBRD register.
#define | UART_FBRD_DIVFRAC_S 0
The following are defines for the bit fields in the UART_O_FBRD register.
#define | UART_LCRH_SPS 0x00000080
The following are defines for the bit fields in the UART_O_LCRH register.
#define | UART_LCRH_WLEN_M 0x00000060
The following are defines for the bit fields in the UART_O_LCRH register.
#define | UART_LCRH_WLEN_5 0x00000000
The following are defines for the bit fields in the UART_O_LCRH register.
#define | UART_LCRH_WLEN_6 0x00000020
The following are defines for the bit fields in the UART_O_LCRH register.
#define | UART_LCRH_WLEN_7 0x00000040
The following are defines for the bit fields in the UART_O_LCRH register.
#define | UART_LCRH_WLEN_8 0x00000060
The following are defines for the bit fields in the UART_O_LCRH register.
#define | UART_LCRH_FEN 0x00000010
The following are defines for the bit fields in the UART_O_LCRH register.
#define | UART_LCRH_STP2 0x00000008
The following are defines for the bit fields in the UART_O_LCRH register.
#define | UART_LCRH_EPS 0x00000004
The following are defines for the bit fields in the UART_O_LCRH register.
#define | UART_LCRH_PEN 0x00000002
The following are defines for the bit fields in the UART_O_LCRH register.
#define | UART_LCRH_BRK 0x00000001
The following are defines for the bit fields in the UART_O_LCRH register.
#define | UART_CTL_CTSEN 0x00008000
The following are defines for the bit fields in the UART_O_CTL register.
#define | UART_CTL_RTSEN 0x00004000
The following are defines for the bit fields in the UART_O_CTL register.
#define | UART_CTL_RTS 0x00000800
The following are defines for the bit fields in the UART_O_CTL register.
#define | UART_CTL_DTR 0x00000400
The following are defines for the bit fields in the UART_O_CTL register.
#define | UART_CTL_RXE 0x00000200
The following are defines for the bit fields in the UART_O_CTL register.
#define | UART_CTL_TXE 0x00000100
The following are defines for the bit fields in the UART_O_CTL register.
#define | UART_CTL_LBE 0x00000080
The following are defines for the bit fields in the UART_O_CTL register.
#define | UART_CTL_LIN 0x00000040
The following are defines for the bit fields in the UART_O_CTL register.
#define | UART_CTL_HSE 0x00000020
The following are defines for the bit fields in the UART_O_CTL register.
#define | UART_CTL_EOT 0x00000010
The following are defines for the bit fields in the UART_O_CTL register.
#define | UART_CTL_SMART 0x00000008
The following are defines for the bit fields in the UART_O_CTL register.
#define | UART_CTL_SIRLP 0x00000004
The following are defines for the bit fields in the UART_O_CTL register.
#define | UART_CTL_SIREN 0x00000002
The following are defines for the bit fields in the UART_O_CTL register.
#define | UART_CTL_UARTEN 0x00000001
The following are defines for the bit fields in the UART_O_CTL register.
#define | UART_IFLS_RX_M 0x00000038
The following are defines for the bit fields in the UART_O_IFLS register.
#define | UART_IFLS_RX1_8 0x00000000
The following are defines for the bit fields in the UART_O_IFLS register.
#define | UART_IFLS_RX2_8 0x00000008
The following are defines for the bit fields in the UART_O_IFLS register.
#define | UART_IFLS_RX4_8 0x00000010
The following are defines for the bit fields in the UART_O_IFLS register.
#define | UART_IFLS_RX6_8 0x00000018
The following are defines for the bit fields in the UART_O_IFLS register.
#define | UART_IFLS_RX7_8 0x00000020
The following are defines for the bit fields in the UART_O_IFLS register.
#define | UART_IFLS_TX_M 0x00000007
The following are defines for the bit fields in the UART_O_IFLS register.
#define | UART_IFLS_TX1_8 0x00000000
The following are defines for the bit fields in the UART_O_IFLS register.
#define | UART_IFLS_TX2_8 0x00000001
The following are defines for the bit fields in the UART_O_IFLS register.
#define | UART_IFLS_TX4_8 0x00000002
The following are defines for the bit fields in the UART_O_IFLS register.
#define | UART_IFLS_TX6_8 0x00000003
The following are defines for the bit fields in the UART_O_IFLS register.
#define | UART_IFLS_TX7_8 0x00000004
The following are defines for the bit fields in the UART_O_IFLS register.
#define | UART_IM_LME5IM 0x00008000
The following are defines for the bit fields in the UART_O_IM register.
#define | UART_IM_LME1IM 0x00004000
The following are defines for the bit fields in the UART_O_IM register.
#define | UART_IM_LMSBIM 0x00002000
The following are defines for the bit fields in the UART_O_IM register.
#define | UART_IM_OEIM 0x00000400
The following are defines for the bit fields in the UART_O_IM register.
#define | UART_IM_BEIM 0x00000200
The following are defines for the bit fields in the UART_O_IM register.
#define | UART_IM_PEIM 0x00000100
The following are defines for the bit fields in the UART_O_IM register.
#define | UART_IM_FEIM 0x00000080
The following are defines for the bit fields in the UART_O_IM register.
#define | UART_IM_RTIM 0x00000040
The following are defines for the bit fields in the UART_O_IM register.
#define | UART_IM_TXIM 0x00000020
The following are defines for the bit fields in the UART_O_IM register.
#define | UART_IM_RXIM 0x00000010
The following are defines for the bit fields in the UART_O_IM register.
#define | UART_IM_DSRMIM 0x00000008
The following are defines for the bit fields in the UART_O_IM register.
#define | UART_IM_DCDMIM 0x00000004
The following are defines for the bit fields in the UART_O_IM register.
#define | UART_IM_CTSMIM 0x00000002
The following are defines for the bit fields in the UART_O_IM register.
#define | UART_IM_RIMIM 0x00000001
The following are defines for the bit fields in the UART_O_IM register.
#define | UART_RIS_LME5RIS 0x00008000
The following are defines for the bit fields in the UART_O_RIS register.
#define | UART_RIS_LME1RIS 0x00004000
The following are defines for the bit fields in the UART_O_RIS register.
#define | UART_RIS_LMSBRIS 0x00002000
The following are defines for the bit fields in the UART_O_RIS register.
#define | UART_RIS_OERIS 0x00000400
The following are defines for the bit fields in the UART_O_RIS register.
#define | UART_RIS_BERIS 0x00000200
The following are defines for the bit fields in the UART_O_RIS register.
#define | UART_RIS_PERIS 0x00000100
The following are defines for the bit fields in the UART_O_RIS register.
#define | UART_RIS_FERIS 0x00000080
The following are defines for the bit fields in the UART_O_RIS register.
#define | UART_RIS_RTRIS 0x00000040
The following are defines for the bit fields in the UART_O_RIS register.
#define | UART_RIS_TXRIS 0x00000020
The following are defines for the bit fields in the UART_O_RIS register.
#define | UART_RIS_RXRIS 0x00000010
The following are defines for the bit fields in the UART_O_RIS register.
#define | UART_RIS_DSRRIS 0x00000008
The following are defines for the bit fields in the UART_O_RIS register.
#define | UART_RIS_DCDRIS 0x00000004
The following are defines for the bit fields in the UART_O_RIS register.
#define | UART_RIS_CTSRIS 0x00000002
The following are defines for the bit fields in the UART_O_RIS register.
#define | UART_RIS_RIRIS 0x00000001
The following are defines for the bit fields in the UART_O_RIS register.
#define | UART_MIS_LME5MIS 0x00008000
The following are defines for the bit fields in the UART_O_MIS register.
#define | UART_MIS_LME1MIS 0x00004000
The following are defines for the bit fields in the UART_O_MIS register.
#define | UART_MIS_LMSBMIS 0x00002000
The following are defines for the bit fields in the UART_O_MIS register.
#define | UART_MIS_OEMIS 0x00000400
The following are defines for the bit fields in the UART_O_MIS register.
#define | UART_MIS_BEMIS 0x00000200
The following are defines for the bit fields in the UART_O_MIS register.
#define | UART_MIS_PEMIS 0x00000100
The following are defines for the bit fields in the UART_O_MIS register.
#define | UART_MIS_FEMIS 0x00000080
The following are defines for the bit fields in the UART_O_MIS register.
#define | UART_MIS_RTMIS 0x00000040
The following are defines for the bit fields in the UART_O_MIS register.
#define | UART_MIS_TXMIS 0x00000020
The following are defines for the bit fields in the UART_O_MIS register.
#define | UART_MIS_RXMIS 0x00000010
The following are defines for the bit fields in the UART_O_MIS register.
#define | UART_MIS_DSRMIS 0x00000008
The following are defines for the bit fields in the UART_O_MIS register.
#define | UART_MIS_DCDMIS 0x00000004
The following are defines for the bit fields in the UART_O_MIS register.
#define | UART_MIS_CTSMIS 0x00000002
The following are defines for the bit fields in the UART_O_MIS register.
#define | UART_MIS_RIMIS 0x00000001
The following are defines for the bit fields in the UART_O_MIS register.
#define | UART_ICR_LME5MIC 0x00008000
The following are defines for the bit fields in the UART_O_ICR register.
#define | UART_ICR_LME1MIC 0x00004000
The following are defines for the bit fields in the UART_O_ICR register.
#define | UART_ICR_LMSBMIC 0x00002000
The following are defines for the bit fields in the UART_O_ICR register.
#define | UART_ICR_OEIC 0x00000400
The following are defines for the bit fields in the UART_O_ICR register.
#define | UART_ICR_BEIC 0x00000200
The following are defines for the bit fields in the UART_O_ICR register.
#define | UART_ICR_PEIC 0x00000100
The following are defines for the bit fields in the UART_O_ICR register.
#define | UART_ICR_FEIC 0x00000080
The following are defines for the bit fields in the UART_O_ICR register.
#define | UART_ICR_RTIC 0x00000040
The following are defines for the bit fields in the UART_O_ICR register.
#define | UART_ICR_TXIC 0x00000020
The following are defines for the bit fields in the UART_O_ICR register.
#define | UART_ICR_RXIC 0x00000010
The following are defines for the bit fields in the UART_O_ICR register.
#define | UART_ICR_DSRMIC 0x00000008
The following are defines for the bit fields in the UART_O_ICR register.
#define | UART_ICR_DCDMIC 0x00000004
The following are defines for the bit fields in the UART_O_ICR register.
#define | UART_ICR_CTSMIC 0x00000002
The following are defines for the bit fields in the UART_O_ICR register.
#define | UART_ICR_RIMIC 0x00000001
The following are defines for the bit fields in the UART_O_ICR register.
#define | UART_DMACTL_DMAERR 0x00000004
The following are defines for the bit fields in the UART_O_DMACTL register.
#define | UART_DMACTL_TXDMAE 0x00000002
The following are defines for the bit fields in the UART_O_DMACTL register.
#define | UART_DMACTL_RXDMAE 0x00000001
The following are defines for the bit fields in the UART_O_DMACTL register.
#define | UART_LCTL_BLEN_M 0x00000030
The following are defines for the bit fields in the UART_O_LCTL register.
#define | UART_LCTL_BLEN_13T 0x00000000
The following are defines for the bit fields in the UART_O_LCTL register.
#define | UART_LCTL_BLEN_14T 0x00000010
The following are defines for the bit fields in the UART_O_LCTL register.
#define | UART_LCTL_BLEN_15T 0x00000020
The following are defines for the bit fields in the UART_O_LCTL register.
#define | UART_LCTL_BLEN_16T 0x00000030
The following are defines for the bit fields in the UART_O_LCTL register.
#define | UART_LCTL_MASTER 0x00000001
The following are defines for the bit fields in the UART_O_LCTL register.
#define | UART_LSS_TSS_M 0x0000FFFF
The following are defines for the bit fields in the UART_O_LSS register.
#define | UART_LSS_TSS_S 0
The following are defines for the bit fields in the UART_O_LSS register.
#define | UART_LTIM_TIMER_M 0x0000FFFF
The following are defines for the bit fields in the UART_O_LTIM register.
#define | UART_LTIM_TIMER_S 0
The following are defines for the bit fields in the UART_O_LTIM register.
#define | UART_O_LCR_H 0x0000002C
The following definitions are deprecated.
#define | UART_O_PeriphID4 0x00000FD0
The following definitions are deprecated.
#define | UART_O_PeriphID5 0x00000FD4
The following definitions are deprecated.
#define | UART_O_PeriphID6 0x00000FD8
The following definitions are deprecated.
#define | UART_O_PeriphID7 0x00000FDC
The following definitions are deprecated.
#define | UART_O_PeriphID0 0x00000FE0
The following definitions are deprecated.
#define | UART_O_PeriphID1 0x00000FE4
The following definitions are deprecated.
#define | UART_O_PeriphID2 0x00000FE8
The following definitions are deprecated.
#define | UART_O_PeriphID3 0x00000FEC
The following definitions are deprecated.
#define | UART_O_PCellID0 0x00000FF0
The following definitions are deprecated.
#define | UART_O_PCellID1 0x00000FF4
The following definitions are deprecated.
#define | UART_O_PCellID2 0x00000FF8
The following definitions are deprecated.
#define | UART_O_PCellID3 0x00000FFC
The following definitions are deprecated.
#define | UART_DR_DATA_MASK 0x000000FF
The following are deprecated defines for the bit fields in the UART_O_DR register.
#define | UART_IBRD_DIVINT_MASK 0x0000FFFF
The following are deprecated defines for the bit fields in the UART_O_IBRD register.
#define | UART_FBRD_DIVFRAC_MASK 0x0000003F
The following are deprecated defines for the bit fields in the UART_O_FBRD register.
#define | UART_LCR_H_SPS 0x00000080
The following are deprecated defines for the bit fields in the UART_O_LCR_H register.
#define | UART_LCR_H_WLEN 0x00000060
The following are deprecated defines for the bit fields in the UART_O_LCR_H register.
#define | UART_LCR_H_WLEN_5 0x00000000
The following are deprecated defines for the bit fields in the UART_O_LCR_H register.
#define | UART_LCR_H_WLEN_6 0x00000020
The following are deprecated defines for the bit fields in the UART_O_LCR_H register.
#define | UART_LCR_H_WLEN_7 0x00000040
The following are deprecated defines for the bit fields in the UART_O_LCR_H register.
#define | UART_LCR_H_WLEN_8 0x00000060
The following are deprecated defines for the bit fields in the UART_O_LCR_H register.
#define | UART_LCR_H_FEN 0x00000010
The following are deprecated defines for the bit fields in the UART_O_LCR_H register.
#define | UART_LCR_H_STP2 0x00000008
The following are deprecated defines for the bit fields in the UART_O_LCR_H register.
#define | UART_LCR_H_EPS 0x00000004
The following are deprecated defines for the bit fields in the UART_O_LCR_H register.
#define | UART_LCR_H_PEN 0x00000002
The following are deprecated defines for the bit fields in the UART_O_LCR_H register.
#define | UART_LCR_H_BRK 0x00000001
The following are deprecated defines for the bit fields in the UART_O_LCR_H register.
#define | UART_IFLS_RX_MASK 0x00000038
The following are deprecated defines for the bit fields in the UART_O_IFLS register.
#define | UART_IFLS_TX_MASK 0x00000007
The following are deprecated defines for the bit fields in the UART_O_IFLS register.
#define | UART_RSR_ANY
The following are deprecated defines for the bit fields in the UART_O_ICR register.
#define | UART_RV_CTL 0x00000300
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_PCellID1 0x000000F0
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_PCellID3 0x000000B1
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_FR 0x00000090
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_PeriphID2 0x00000018
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_IFLS 0x00000012
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_PeriphID0 0x00000011
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_PCellID0 0x0000000D
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_PCellID2 0x00000005
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_PeriphID3 0x00000001
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_PeriphID4 0x00000000
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_LCR_H 0x00000000
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_PeriphID6 0x00000000
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_DR 0x00000000
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_RSR 0x00000000
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_ECR 0x00000000
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_PeriphID5 0x00000000
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_RIS 0x00000000
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_FBRD 0x00000000
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_IM 0x00000000
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_MIS 0x00000000
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_ICR 0x00000000
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_PeriphID1 0x00000000
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_PeriphID7 0x00000000
The following are deprecated defines for the Reset Values for UART Registers.
#define | UART_RV_IBRD 0x00000000
The following are deprecated defines for the Reset Values for UART Registers.

Detailed Description

LM3S1968 UART hardware.

Definition in file lm3s_uart.h.

Define Documentation

#define UART_O_LCR_H 0x0000002C

The following definitions are deprecated.

The following are deprecated defines for the UART register offsets.

Definition at line 360 of file lm3s_uart.h.

#define UART_O_PCellID0 0x00000FF0

The following definitions are deprecated.

The following are deprecated defines for the UART register offsets.

Definition at line 369 of file lm3s_uart.h.

#define UART_O_PCellID1 0x00000FF4

The following definitions are deprecated.

The following are deprecated defines for the UART register offsets.

Definition at line 370 of file lm3s_uart.h.

#define UART_O_PCellID2 0x00000FF8

The following definitions are deprecated.

The following are deprecated defines for the UART register offsets.

Definition at line 371 of file lm3s_uart.h.

#define UART_O_PCellID3 0x00000FFC

The following definitions are deprecated.

The following are deprecated defines for the UART register offsets.

Definition at line 372 of file lm3s_uart.h.

#define UART_O_PeriphID0 0x00000FE0

The following definitions are deprecated.

The following are deprecated defines for the UART register offsets.

Definition at line 365 of file lm3s_uart.h.

#define UART_O_PeriphID1 0x00000FE4

The following definitions are deprecated.

The following are deprecated defines for the UART register offsets.

Definition at line 366 of file lm3s_uart.h.

#define UART_O_PeriphID2 0x00000FE8

The following definitions are deprecated.

The following are deprecated defines for the UART register offsets.

Definition at line 367 of file lm3s_uart.h.

#define UART_O_PeriphID3 0x00000FEC

The following definitions are deprecated.

The following are deprecated defines for the UART register offsets.

Definition at line 368 of file lm3s_uart.h.

#define UART_O_PeriphID4 0x00000FD0

The following definitions are deprecated.

The following are deprecated defines for the UART register offsets.

Definition at line 361 of file lm3s_uart.h.

#define UART_O_PeriphID5 0x00000FD4

The following definitions are deprecated.

The following are deprecated defines for the UART register offsets.

Definition at line 362 of file lm3s_uart.h.

#define UART_O_PeriphID6 0x00000FD8

The following definitions are deprecated.

The following are deprecated defines for the UART register offsets.

Definition at line 363 of file lm3s_uart.h.

#define UART_O_PeriphID7 0x00000FDC

The following definitions are deprecated.

The following are deprecated defines for the UART register offsets.

Definition at line 364 of file lm3s_uart.h.


BeRTOS: lm3s_uart.h Source File

  • cpu
  • cortex-m3
  • io
lm3s_uart.h
Go to the documentation of this file.
00001
00036 #ifndef LM3S_UART_H
00037 #define LM3S_UART_H
00038
00042 /*\{*/
00043 #define UART_O_DR               0x00000000  //< UART Data
00044 #define UART_O_RSR              0x00000004  //< UART Receive Status/Error Clear
00045 #define UART_O_ECR              0x00000004  //< UART Receive Status/Error Clear
00046 #define UART_O_FR               0x00000018  //< UART Flag
00047 #define UART_O_ILPR             0x00000020  //< UART IrDA Low-Power Register
00048 #define UART_O_IBRD             0x00000024  //< UART Integer Baud-Rate Divisor
00049 #define UART_O_FBRD             0x00000028  //< UART Fractional Baud-Rate
00050                                             //< Divisor
00051 #define UART_O_LCRH             0x0000002C  //< UART Line Control
00052 #define UART_O_CTL              0x00000030  //< UART Control
00053 #define UART_O_IFLS             0x00000034  //< UART Interrupt FIFO Level Select
00054 #define UART_O_IM               0x00000038  //< UART Interrupt Mask
00055 #define UART_O_RIS              0x0000003C  //< UART Raw Interrupt Status
00056 #define UART_O_MIS              0x00000040  //< UART Masked Interrupt Status
00057 #define UART_O_ICR              0x00000044  //< UART Interrupt Clear
00058 #define UART_O_DMACTL           0x00000048  //< UART DMA Control
00059 #define UART_O_LCTL             0x00000090  //< UART LIN Control
00060 #define UART_O_LSS              0x00000094  //< UART LIN Snap Shot
00061 #define UART_O_LTIM             0x00000098  //< UART LIN Timer
00062 /*\}*/
00063
00067 /*\{*/
00068 #define UART_DR_OE              0x00000800  //< UART Overrun Error
00069 #define UART_DR_BE              0x00000400  //< UART Break Error
00070 #define UART_DR_PE              0x00000200  //< UART Parity Error
00071 #define UART_DR_FE              0x00000100  //< UART Framing Error
00072 #define UART_DR_DATA_M          0x000000FF  //< Data Transmitted or Received
00073 #define UART_DR_DATA_S          0
00074 /*\}*/
00075
00079 /*\{*/
00080 #define UART_RSR_OE             0x00000008  //< UART Overrun Error
00081 #define UART_RSR_BE             0x00000004  //< UART Break Error
00082 #define UART_RSR_PE             0x00000002  //< UART Parity Error
00083 #define UART_RSR_FE             0x00000001  //< UART Framing Error
00084 /*\}*/
00085
00089 /*\{*/
00090 #define UART_ECR_DATA_M         0x000000FF  //< Error Clear
00091 #define UART_ECR_DATA_S         0
00092 /*\}*/
00093
00097 /*\{*/
00098 #define UART_FR_RI              0x00000100  //< Ring Indicator
00099 #define UART_FR_TXFE            0x00000080  //< UART Transmit FIFO Empty
00100 #define UART_FR_RXFF            0x00000040  //< UART Receive FIFO Full
00101 #define UART_FR_TXFF            0x00000020  //< UART Transmit FIFO Full
00102 #define UART_FR_RXFE            0x00000010  //< UART Receive FIFO Empty
00103 #define UART_FR_BUSY            0x00000008  //< UART Busy
00104 #define UART_FR_DCD             0x00000004  //< Data Carrier Detect
00105 #define UART_FR_DSR             0x00000002  //< Data Set Ready
00106 #define UART_FR_CTS             0x00000001  //< Clear To Send
00107 /*\}*/
00108
00112 /*\{*/
00113 #define UART_ILPR_ILPDVSR_M     0x000000FF  //< IrDA Low-Power Divisor
00114 #define UART_ILPR_ILPDVSR_S     0
00115 /*\}*/
00116
00120 /*\{*/
00121 #define UART_IBRD_DIVINT_M      0x0000FFFF  //< Integer Baud-Rate Divisor
00122 #define UART_IBRD_DIVINT_S      0
00123 /*\}*/
00124
00128 /*\{*/
00129 #define UART_FBRD_DIVFRAC_M     0x0000003F  //< Fractional Baud-Rate Divisor
00130 #define UART_FBRD_DIVFRAC_S     0
00131 /*\}*/
00132
00136 /*\{*/
00137 #define UART_LCRH_SPS           0x00000080  //< UART Stick Parity Select
00138 #define UART_LCRH_WLEN_M        0x00000060  //< UART Word Length
00139 #define UART_LCRH_WLEN_5        0x00000000  //< 5 bits (default)
00140 #define UART_LCRH_WLEN_6        0x00000020  //< 6 bits
00141 #define UART_LCRH_WLEN_7        0x00000040  //< 7 bits
00142 #define UART_LCRH_WLEN_8        0x00000060  //< 8 bits
00143 #define UART_LCRH_FEN           0x00000010  //< UART Enable FIFOs
00144 #define UART_LCRH_STP2          0x00000008  //< UART Two Stop Bits Select
00145 #define UART_LCRH_EPS           0x00000004  //< UART Even Parity Select
00146 #define UART_LCRH_PEN           0x00000002  //< UART Parity Enable
00147 #define UART_LCRH_BRK           0x00000001  //< UART Send Break
00148 /*\}*/
00149
00153 /*\{*/
00154 #define UART_CTL_CTSEN          0x00008000  //< Enable Clear To Send
00155 #define UART_CTL_RTSEN          0x00004000  //< Enable Request to Send
00156 #define UART_CTL_RTS            0x00000800  //< Request to Send
00157 #define UART_CTL_DTR            0x00000400  //< Data Terminal Ready
00158 #define UART_CTL_RXE            0x00000200  //< UART Receive Enable
00159 #define UART_CTL_TXE            0x00000100  //< UART Transmit Enable
00160 #define UART_CTL_LBE            0x00000080  //< UART Loop Back Enable
00161 #define UART_CTL_LIN            0x00000040  //< LIN Mode Enable
00162 #define UART_CTL_HSE            0x00000020  //< High-Speed Enable
00163 #define UART_CTL_EOT            0x00000010  //< End of Transmission
00164 #define UART_CTL_SMART          0x00000008  //< ISO 7816 Smart Card Support
00165 #define UART_CTL_SIRLP          0x00000004  //< UART SIR Low-Power Mode
00166 #define UART_CTL_SIREN          0x00000002  //< UART SIR Enable
00167 #define UART_CTL_UARTEN         0x00000001  //< UART Enable
00168 /*\}*/
00169
00173 /*\{*/
00174 #define UART_IFLS_RX_M          0x00000038  //< UART Receive Interrupt FIFO
00175                                             //< Level Select
00176 #define UART_IFLS_RX1_8         0x00000000  //< RX FIFO >= 1/8 full
00177 #define UART_IFLS_RX2_8         0x00000008  //< RX FIFO >= 1/4 full
00178 #define UART_IFLS_RX4_8         0x00000010  //< RX FIFO >= 1/2 full (default)
00179 #define UART_IFLS_RX6_8         0x00000018  //< RX FIFO >= 3/4 full
00180 #define UART_IFLS_RX7_8         0x00000020  //< RX FIFO >= 7/8 full
00181 #define UART_IFLS_TX_M          0x00000007  //< UART Transmit Interrupt FIFO
00182                                             //< Level Select
00183 #define UART_IFLS_TX1_8         0x00000000  //< TX FIFO <= 1/8 full
00184 #define UART_IFLS_TX2_8         0x00000001  //< TX FIFO <= 1/4 full
00185 #define UART_IFLS_TX4_8         0x00000002  //< TX FIFO <= 1/2 full (default)
00186 #define UART_IFLS_TX6_8         0x00000003  //< TX FIFO <= 3/4 full
00187 #define UART_IFLS_TX7_8         0x00000004  //< TX FIFO <= 7/8 full
00188 /*\}*/
00189
00193 /*\{*/
00194 #define UART_IM_LME5IM          0x00008000  //< LIN Mode Edge 5 Interrupt Mask
00195 #define UART_IM_LME1IM          0x00004000  //< LIN Mode Edge 1 Interrupt Mask
00196 #define UART_IM_LMSBIM          0x00002000  //< LIN Mode Sync Break Interrupt
00197                                             //< Mask
00198 #define UART_IM_OEIM            0x00000400  //< UART Overrun Error Interrupt
00199                                             //< Mask
00200 #define UART_IM_BEIM            0x00000200  //< UART Break Error Interrupt Mask
00201 #define UART_IM_PEIM            0x00000100  //< UART Parity Error Interrupt Mask
00202 #define UART_IM_FEIM            0x00000080  //< UART Framing Error Interrupt
00203                                             //< Mask
00204 #define UART_IM_RTIM            0x00000040  //< UART Receive Time-Out Interrupt
00205                                             //< Mask
00206 #define UART_IM_TXIM            0x00000020  //< UART Transmit Interrupt Mask
00207 #define UART_IM_RXIM            0x00000010  //< UART Receive Interrupt Mask
00208 #define UART_IM_DSRMIM          0x00000008  //< UART Data Set Ready Modem
00209                                             //< Interrupt Mask
00210 #define UART_IM_DCDMIM          0x00000004  //< UART Data Carrier Detect Modem
00211                                             //< Interrupt Mask
00212 #define UART_IM_CTSMIM          0x00000002  //< UART Clear to Send Modem
00213                                             //< Interrupt Mask
00214 #define UART_IM_RIMIM           0x00000001  //< UART Ring Indicator Modem
00215                                             //< Interrupt Mask
00216 /*\}*/
00217
00221 /*\{*/
00222 #define UART_RIS_LME5RIS        0x00008000  //< LIN Mode Edge 5 Raw Interrupt
00223                                             //< Status
00224 #define UART_RIS_LME1RIS        0x00004000  //< LIN Mode Edge 1 Raw Interrupt
00225                                             //< Status
00226 #define UART_RIS_LMSBRIS        0x00002000  //< LIN Mode Sync Break Raw
00227                                             //< Interrupt Status
00228 #define UART_RIS_OERIS          0x00000400  //< UART Overrun Error Raw Interrupt
00229                                             //< Status
00230 #define UART_RIS_BERIS          0x00000200  //< UART Break Error Raw Interrupt
00231                                             //< Status
00232 #define UART_RIS_PERIS          0x00000100  //< UART Parity Error Raw Interrupt
00233                                             //< Status
00234 #define UART_RIS_FERIS          0x00000080  //< UART Framing Error Raw Interrupt
00235                                             //< Status
00236 #define UART_RIS_RTRIS          0x00000040  //< UART Receive Time-Out Raw
00237                                             //< Interrupt Status
00238 #define UART_RIS_TXRIS          0x00000020  //< UART Transmit Raw Interrupt
00239                                             //< Status
00240 #define UART_RIS_RXRIS          0x00000010  //< UART Receive Raw Interrupt
00241                                             //< Status
00242 #define UART_RIS_DSRRIS         0x00000008  //< UART Data Set Ready Modem Raw
00243                                             //< Interrupt Status
00244 #define UART_RIS_DCDRIS         0x00000004  //< UART Data Carrier Detect Modem
00245                                             //< Raw Interrupt Status
00246 #define UART_RIS_CTSRIS         0x00000002  //< UART Clear to Send Modem Raw
00247                                             //< Interrupt Status
00248 #define UART_RIS_RIRIS          0x00000001  //< UART Ring Indicator Modem Raw
00249                                             //< Interrupt Status
00250 /*\}*/
00251
00255 /*\{*/
00256 #define UART_MIS_LME5MIS        0x00008000  //< LIN Mode Edge 5 Masked Interrupt
00257                                             //< Status
00258 #define UART_MIS_LME1MIS        0x00004000  //< LIN Mode Edge 1 Masked Interrupt
00259                                             //< Status
00260 #define UART_MIS_LMSBMIS        0x00002000  //< LIN Mode Sync Break Masked
00261                                             //< Interrupt Status
00262 #define UART_MIS_OEMIS          0x00000400  //< UART Overrun Error Masked
00263                                             //< Interrupt Status
00264 #define UART_MIS_BEMIS          0x00000200  //< UART Break Error Masked
00265                                             //< Interrupt Status
00266 #define UART_MIS_PEMIS          0x00000100  //< UART Parity Error Masked
00267                                             //< Interrupt Status
00268 #define UART_MIS_FEMIS          0x00000080  //< UART Framing Error Masked
00269                                             //< Interrupt Status
00270 #define UART_MIS_RTMIS          0x00000040  //< UART Receive Time-Out Masked
00271                                             //< Interrupt Status
00272 #define UART_MIS_TXMIS          0x00000020  //< UART Transmit Masked Interrupt
00273                                             //< Status
00274 #define UART_MIS_RXMIS          0x00000010  //< UART Receive Masked Interrupt
00275                                             //< Status
00276 #define UART_MIS_DSRMIS         0x00000008  //< UART Data Set Ready Modem Masked
00277                                             //< Interrupt Status
00278 #define UART_MIS_DCDMIS         0x00000004  //< UART Data Carrier Detect Modem
00279                                             //< Masked Interrupt Status
00280 #define UART_MIS_CTSMIS         0x00000002  //< UART Clear to Send Modem Masked
00281                                             //< Interrupt Status
00282 #define UART_MIS_RIMIS          0x00000001  //< UART Ring Indicator Modem Masked
00283                                             //< Interrupt Status
00284 /*\}*/
00285
00289 /*\{*/
00290 #define UART_ICR_LME5MIC        0x00008000  //< LIN Mode Edge 5 Interrupt Clear
00291 #define UART_ICR_LME1MIC        0x00004000  //< LIN Mode Edge 1 Interrupt Clear
00292 #define UART_ICR_LMSBMIC        0x00002000  //< LIN Mode Sync Break Interrupt
00293                                             //< Clear
00294 #define UART_ICR_OEIC           0x00000400  //< Overrun Error Interrupt Clear
00295 #define UART_ICR_BEIC           0x00000200  //< Break Error Interrupt Clear
00296 #define UART_ICR_PEIC           0x00000100  //< Parity Error Interrupt Clear
00297 #define UART_ICR_FEIC           0x00000080  //< Framing Error Interrupt Clear
00298 #define UART_ICR_RTIC           0x00000040  //< Receive Time-Out Interrupt Clear
00299 #define UART_ICR_TXIC           0x00000020  //< Transmit Interrupt Clear
00300 #define UART_ICR_RXIC           0x00000010  //< Receive Interrupt Clear
00301 #define UART_ICR_DSRMIC         0x00000008  //< UART Data Set Ready Modem
00302                                             //< Interrupt Clear
00303 #define UART_ICR_DCDMIC         0x00000004  //< UART Data Carrier Detect Modem
00304                                             //< Interrupt Clear
00305 #define UART_ICR_CTSMIC         0x00000002  //< UART Clear to Send Modem
00306                                             //< Interrupt Clear
00307 #define UART_ICR_RIMIC          0x00000001  //< UART Ring Indicator Modem
00308                                             //< Interrupt Clear
00309 /*\}*/
00310
00314 /*\{*/
00315 #define UART_DMACTL_DMAERR      0x00000004  //< DMA on Error
00316 #define UART_DMACTL_TXDMAE      0x00000002  //< Transmit DMA Enable
00317 #define UART_DMACTL_RXDMAE      0x00000001  //< Receive DMA Enable
00318 /*\}*/
00319
00323 /*\{*/
00324 #define UART_LCTL_BLEN_M        0x00000030  //< Sync Break Length
00325 #define UART_LCTL_BLEN_13T      0x00000000  //< Sync break length is 13T bits
00326                                             //< (default)
00327 #define UART_LCTL_BLEN_14T      0x00000010  //< Sync break length is 14T bits
00328 #define UART_LCTL_BLEN_15T      0x00000020  //< Sync break length is 15T bits
00329 #define UART_LCTL_BLEN_16T      0x00000030  //< Sync break length is 16T bits
00330 #define UART_LCTL_MASTER        0x00000001  //< LIN Master Enable
00331 /*\}*/
00332
00336 /*\{*/
00337 #define UART_LSS_TSS_M          0x0000FFFF  //< Timer Snap Shot
00338 #define UART_LSS_TSS_S          0
00339 /*\}*/
00340
00344 /*\{*/
00345 #define UART_LTIM_TIMER_M       0x0000FFFF  //< Timer Value
00346 #define UART_LTIM_TIMER_S       0
00347 /*\}*/
00348
00352 /*\{*/
00353 #ifndef DEPRECATED
00354 /*\}*/
00355
00359 /*\{*/
00360 #define UART_O_LCR_H            0x0000002C  //< Line Control Register, HIGH byte
00361 #define UART_O_PeriphID4        0x00000FD0
00362 #define UART_O_PeriphID5        0x00000FD4
00363 #define UART_O_PeriphID6        0x00000FD8
00364 #define UART_O_PeriphID7        0x00000FDC
00365 #define UART_O_PeriphID0        0x00000FE0
00366 #define UART_O_PeriphID1        0x00000FE4
00367 #define UART_O_PeriphID2        0x00000FE8
00368 #define UART_O_PeriphID3        0x00000FEC
00369 #define UART_O_PCellID0         0x00000FF0
00370 #define UART_O_PCellID1         0x00000FF4
00371 #define UART_O_PCellID2         0x00000FF8
00372 #define UART_O_PCellID3         0x00000FFC
00373 /*\}*/
00374
00379 /*\{*/
00380 #define UART_DR_DATA_MASK       0x000000FF  //< UART data
00381 /*\}*/
00382
00387 /*\{*/
00388 #define UART_IBRD_DIVINT_MASK   0x0000FFFF  //< Integer baud-rate divisor
00389 /*\}*/
00390
00395 /*\{*/
00396 #define UART_FBRD_DIVFRAC_MASK  0x0000003F  //< Fractional baud-rate divisor
00397 /*\}*/
00398
00403 /*\{*/
00404 #define UART_LCR_H_SPS          0x00000080  //< Stick Parity Select
00405 #define UART_LCR_H_WLEN         0x00000060  //< Word length
00406 #define UART_LCR_H_WLEN_5       0x00000000  //< 5 bit data
00407 #define UART_LCR_H_WLEN_6       0x00000020  //< 6 bit data
00408 #define UART_LCR_H_WLEN_7       0x00000040  //< 7 bit data
00409 #define UART_LCR_H_WLEN_8       0x00000060  //< 8 bit data
00410 #define UART_LCR_H_FEN          0x00000010  //< Enable FIFO
00411 #define UART_LCR_H_STP2         0x00000008  //< Two Stop Bits Select
00412 #define UART_LCR_H_EPS          0x00000004  //< Even Parity Select
00413 #define UART_LCR_H_PEN          0x00000002  //< Parity Enable
00414 #define UART_LCR_H_BRK          0x00000001  //< Send Break
00415 /*\}*/
00416
00421 /*\{*/
00422 #define UART_IFLS_RX_MASK       0x00000038  //< RX FIFO level mask
00423 #define UART_IFLS_TX_MASK       0x00000007  //< TX FIFO level mask
00424 /*\}*/
00425
00430 /*\{*/
00431 #define UART_RSR_ANY            (UART_RSR_OE | UART_RSR_BE | UART_RSR_PE | \
00432                                  UART_RSR_FE)
00433 /*\}*/
00434
00439 /*\{*/
00440 #define UART_RV_CTL             0x00000300
00441 #define UART_RV_PCellID1        0x000000F0
00442 #define UART_RV_PCellID3        0x000000B1
00443 #define UART_RV_FR              0x00000090
00444 #define UART_RV_PeriphID2       0x00000018
00445 #define UART_RV_IFLS            0x00000012
00446 #define UART_RV_PeriphID0       0x00000011
00447 #define UART_RV_PCellID0        0x0000000D
00448 #define UART_RV_PCellID2        0x00000005
00449 #define UART_RV_PeriphID3       0x00000001
00450 #define UART_RV_PeriphID4       0x00000000
00451 #define UART_RV_LCR_H           0x00000000
00452 #define UART_RV_PeriphID6       0x00000000
00453 #define UART_RV_DR              0x00000000
00454 #define UART_RV_RSR             0x00000000
00455 #define UART_RV_ECR             0x00000000
00456 #define UART_RV_PeriphID5       0x00000000
00457 #define UART_RV_RIS             0x00000000
00458 #define UART_RV_FBRD            0x00000000
00459 #define UART_RV_IM              0x00000000
00460 #define UART_RV_MIS             0x00000000
00461 #define UART_RV_ICR             0x00000000
00462 #define UART_RV_PeriphID1       0x00000000
00463 #define UART_RV_PeriphID7       0x00000000
00464 #define UART_RV_IBRD            0x00000000
00465 /*\}*/
00466
00467 #endif /* DEPRECATED */
00468
00469 #endif /* LM3S_UART_H */


BeRTOS: lm75.c File Reference

  • drv
lm75.c File Reference

LM75 sensor temperature family. More...

#include "lm75.h"
#include "hw/hw_lm75.h"
#include "cfg/cfg_lm75.h"
#include <cfg/debug.h>
#include <cfg/module.h>
#include <cfg/log.h>
#include <drv/i2c.h>
#include <drv/ntc.h>

Go to the source code of this file.

Detailed Description

LM75 sensor temperature family.

Author:
Daniele Basile <asterix@develer.com>

Definition in file lm75.c.


BeRTOS: lm75.c Source File

  • drv
lm75.c
Go to the documentation of this file.
00001
00039 #include "lm75.h"
00040
00041 #include "hw/hw_lm75.h"
00042
00043 #include "cfg/cfg_lm75.h"
00044
00045 #include <cfg/debug.h>
00046 #include <cfg/module.h>
00047
00048 // Define logging setting (for cfg/log.h module).
00049 #define LOG_LEVEL   LM75_LOG_LEVEL
00050 #define LOG_FORMAT  LM75_LOG_FORMAT
00051
00052 #include <cfg/log.h>
00053
00054 #include <drv/i2c.h>
00055 #include <drv/ntc.h> // Macro and data type to manage celsius degree
00056
00057 #define SELECT_ADDRESS(addr)   LM75_ADDRESS_BYTE | (addr << 1)
00058 #define LM75_ADDRESS_BYTE    0x91
00059 #define LM75_PAD_BYTE        0x0
00060
00061
00062 #if !CONFIG_I2C_DISABLE_OLD_API
00063
00064 deg_t lm75_read_1(uint8_t sens_addr)
00065 {
00066     return lm75_read_2(&local_i2c_old_api, sens_addr);
00067 }
00068 #endif /* !CONFIG_I2C_DISABLE_OLD_API */
00069
00070
00071 /*
00072  * New API
00073  */
00074 deg_t lm75_read_2(I2c *i2c, uint8_t sens_addr)
00075 {
00076     uint8_t data[2];
00077     int16_t degree;
00078     int16_t deci_degree;
00079
00080     i2c_start_w(i2c, SELECT_ADDRESS(sens_addr), 1, I2C_NOSTOP);
00081     i2c_putc(i2c, LM75_PAD_BYTE);
00082     i2c_start_r(i2c, SELECT_ADDRESS(sens_addr), sizeof(data), I2C_STOP);
00083     i2c_read(i2c, data, sizeof(data));
00084
00085     if (i2c_error(i2c))
00086         return EOF;
00087
00088     degree = (int16_t)data[0];
00089     deci_degree = (int16_t)(((data[1] >> 7) & 1 ) * 5);
00090
00091     LOG_INFO("[%d.%d C]\n", degree, deci_degree);
00092
00093     return degree * 10 + deci_degree;
00094 }


BeRTOS: lm75.h File Reference

  • drv
lm75.h File Reference

LM75 sensor temperature family. More...

#include <cpu/types.h>
#include <drv/ntc.h>
#include <drv/i2c.h>
#include <cpu/attr.h>

Go to the source code of this file.

Detailed Description

LM75 sensor temperature family.

Author:
Daniele Basile <asterix@develer.com>

Definition in file lm75.h.


BeRTOS: lm75.h Source File

  • drv
lm75.h
Go to the documentation of this file.
00001
00043 #ifndef DRV_LM75_H
00044 #define DRV_LM75_H
00045
00046 #include <cpu/types.h>
00047
00048 #include <drv/ntc.h> // Macro and data type to manage celsius degree
00049 #include <drv/i2c.h>
00050
00051 #include <cpu/attr.h>
00052
00053 #define I2C_READBIT BV(0)
00054
00055 #if COMPILER_C99
00056     #define lm75_read(...)        PP_CAT(lm75_read ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__)
00057 #else
00058     #define lm75_read(args...)    PP_CAT(lm75_read ## _, COUNT_PARMS(args)) (args)
00059 #endif
00060
00061 #if !CONFIG_I2C_DISABLE_OLD_API
00062
00063 DEPRECATED deg_t lm75_read_1(uint8_t sens_addr);
00064 #endif /* !CONFIG_I2C_DISABLE_OLD_API */
00065
00066 deg_t lm75_read_2(I2c *i2c, uint8_t sens_addr);
00067
00068 #endif /* DRV_LM75_H */


BeRTOS: log.h File Reference

  • cfg
Defines
log.h File Reference
#include <cfg/debug.h>

Go to the source code of this file.

Defines

#define | LOG_ERR(str,...) LOG_PRINT("ERR", str, ## __VA_ARGS__)
Output an error message.
#define | LOG_ERRB(x) x
Define a code block that will be compiled only when LOG_LEVEL >= LOG_LVL_ERR.
#define | LOG_WARN(str,...) LOG_PRINT("WARN", str, ## __VA_ARGS__)
Output a warning message.
#define | LOG_WARNB(x) x
Define a code block that will be compiled only when LOG_LEVEL >= LOG_LVL_WARN.
#define | LOG_INFO(str,...) LOG_PRINT("INFO", str, ## __VA_ARGS__)
Output an informative message.
#define | LOG_INFOB(x) x
Define a code block that will be compiled only when LOG_LEVEL >= LOG_LVL_INFO.
Logging level definition

When you choose a log level messages you choose also which print function are linked.

When using a log level, you link all log functions that have a priority higher or equal than the level you chose. The priority level go from error (highest) to info (lowest).

#define | LOG_LVL_NONE 0
#define | LOG_LVL_ERR 1
#define | LOG_LVL_WARN 2
#define | LOG_LVL_INFO 3
Logging format

There are two logging format: terse and verbose.

The latter prepends function names and line number information to each log entry.

#define | LOG_FMT_VERBOSE 1
#define | LOG_FMT_TERSE 0

Detailed Description

Definition in file log.h.


BeRTOS: log.h Source File

  • cfg
log.h
Go to the documentation of this file.
00001
00102 #ifndef CFG_LOG_H
00103 #define CFG_LOG_H
00104
00105 #include <cfg/debug.h>
00106
00107 // Use a default setting if nobody defined a log level
00108 #ifndef LOG_LEVEL
00109 #define LOG_LEVEL       LOG_LVL_ERR
00110 #endif
00111
00112 // Use a default setting if nobody defined a log format
00113 #ifndef LOG_FORMAT
00114 #define LOG_FORMAT      LOG_FMT_TERSE
00115 #endif
00116
00129 #define LOG_LVL_NONE      0
00130 #define LOG_LVL_ERR       1
00131 #define LOG_LVL_WARN      2
00132 #define LOG_LVL_INFO      3
00133
00144 #define LOG_FMT_VERBOSE   1
00145 #define LOG_FMT_TERSE     0
00146
00148 #if LOG_FORMAT == LOG_FMT_VERBOSE
00149     #define LOG_PRINT(str_level, str,...)    kprintf("%s():%d:%s: " str, __func__, __LINE__, str_level, ## __VA_ARGS__)
00150 #elif LOG_FORMAT == LOG_FMT_TERSE
00151     #define LOG_PRINT(str_level, str,...)    kprintf("%s: " str, str_level, ## __VA_ARGS__)
00152 #else
00153     #error No LOG_FORMAT defined
00154 #endif
00155
00156 #if LOG_LEVEL >= LOG_LVL_ERR
00157
00160     #define LOG_ERR(str,...)       LOG_PRINT("ERR", str, ## __VA_ARGS__)
00161
00164     #define LOG_ERRB(x)            x
00165 #else
00166     INLINE void LOG_ERR(UNUSED_ARG(const char *, fmt), ...) { /* nop */ }
00167     #define LOG_ERRB(x)            /* Nothing */
00168 #endif
00169
00170 #if LOG_LEVEL >= LOG_LVL_WARN
00171
00174     #define LOG_WARN(str,...)       LOG_PRINT("WARN", str, ## __VA_ARGS__)
00175
00178     #define LOG_WARNB(x)            x
00179 #else
00180     INLINE void LOG_WARN(UNUSED_ARG(const char *, fmt), ...) { /* nop */ }
00181     #define LOG_WARNB(x)            /* Nothing */
00182 #endif
00183
00184 #if LOG_LEVEL >= LOG_LVL_INFO
00185
00188     #define LOG_INFO(str,...)       LOG_PRINT("INFO", str, ## __VA_ARGS__)
00189
00192     #define LOG_INFOB(x)            x
00193 #else
00194     INLINE void LOG_INFO(UNUSED_ARG(const char *, fmt), ...) { /* nop */ }
00195     #define LOG_INFOB(x)            /* Nothing */
00196 #endif
00197
00200 #endif /* CFG_LOG_H */


BeRTOS: logo.c Source File

  • icons
logo.c
00001
00002 #include "logo.h"
00003 #include <cfg/compiler.h>
00004 #include <cpu/pgm.h>
00005
00009 const PROGMEM uint8_t bertos_logo_raster[] = {
00010
00011     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00012     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00013     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00014     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00015     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00016     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00017     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00018     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00019     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00020     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00021     0x00, 0x00,
00022
00023     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00024     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00025     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00026     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00027     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00028     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00029     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00030     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00031     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00032     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00033     0x00, 0x00,
00034
00035     0x00, 0x00, 0xFE, 0xFE, 0xFE, 0xFE, 0x0E, 0x0E,
00036     0x0E, 0x0E, 0xFE, 0xFE, 0xFE, 0xFC, 0x00, 0x00,
00037     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00038     0x00, 0x00, 0x00, 0x00, 0xFE, 0xFE, 0xFE, 0xFE,
00039     0xFE, 0x0E, 0x0E, 0x0E, 0xFE, 0xFE, 0xFE, 0xFE,
00040     0xFC, 0x00, 0x1E, 0x1E, 0x1E, 0x1E, 0xFE, 0xFE,
00041     0xFE, 0xFE, 0x1E, 0x1E, 0x1E, 0x1E, 0x00, 0xFC,
00042     0xFE, 0xFE, 0xFE, 0xFE, 0x0E, 0x0E, 0x0E, 0x0E,
00043     0xFE, 0xFE, 0xFE, 0xFE, 0xFC, 0x00, 0xFC, 0xFE,
00044     0xFE, 0xFE, 0xFE, 0x0E, 0x0E, 0x0E, 0xFE, 0xFE,
00045     0xFE, 0xFE,
00046
00047     0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x78, 0x78,
00048     0x7C, 0xFC, 0xFF, 0xFF, 0xEF, 0xCF, 0x00, 0x00,
00049     0xFC, 0xFE, 0xFE, 0xFE, 0x1E, 0x1E, 0xFE, 0xFE,
00050     0xFE, 0xFE, 0xFC, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
00051     0xFF, 0xF8, 0xF8, 0xF8, 0xFF, 0xFF, 0x7F, 0x3F,
00052     0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF,
00053     0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
00054     0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00,
00055     0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x07, 0x0F,
00056     0x1F, 0x1F, 0x3F, 0x7E, 0xFC, 0xF8, 0xF1, 0xE1,
00057     0xC1, 0x81,
00058
00059     0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xC0, 0xC0,
00060     0xC0, 0xC0, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00,
00061     0xFF, 0xFF, 0xFF, 0xFF, 0xC7, 0xC7, 0xF7, 0xF7,
00062     0xF7, 0xF7, 0xF3, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
00063     0xFF, 0x01, 0x0F, 0x3F, 0xFF, 0xFF, 0xFE, 0xF0,
00064     0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF,
00065     0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
00066     0xFF, 0xFF, 0xFF, 0xFF, 0xC0, 0xC0, 0xC0, 0xC0,
00067     0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0xFE, 0xFE,
00068     0xFE, 0xFE, 0xFE, 0xC0, 0xC0, 0xC1, 0xFF, 0xFF,
00069     0xFF, 0xFF,
00070
00071     0x00, 0x00, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
00072     0x03, 0x03, 0x03, 0x03, 0x03, 0xF1, 0x60, 0x80,
00073     0xF1, 0x43, 0xE3, 0x13, 0x13, 0xE3, 0x13, 0x13,
00074     0xF3, 0x13, 0x01, 0x00, 0xE3, 0x13, 0x13, 0xF3,
00075     0x43, 0xF0, 0x60, 0xC0, 0xF1, 0x03, 0xF3, 0x03,
00076     0x03, 0x30, 0xC0, 0x60, 0x10, 0x00, 0x03, 0xF3,
00077     0x43, 0xB3, 0x00, 0xF0, 0x50, 0x50, 0x00, 0xF1,
00078     0x53, 0xF3, 0x03, 0xF3, 0x63, 0xC3, 0xF3, 0x03,
00079     0xF3, 0x53, 0x53, 0x03, 0xF0, 0x00, 0x01, 0x03,
00080     0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
00081     0x03, 0x03,
00082
00083     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00084     0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
00085     0x01, 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00,
00086     0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01,
00087     0x00, 0x01, 0x00, 0x00, 0x01, 0x00, 0x01, 0x01,
00088     0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01,
00089     0x00, 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, 0x01,
00090     0x00, 0x01, 0x01, 0x01, 0x00, 0x00, 0x01, 0x00,
00091     0x01, 0x01, 0x01, 0x00, 0x01, 0x01, 0x01, 0x00,
00092     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00093     0x00, 0x00,
00094
00095     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00096     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00097     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00098     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00099     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00100     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00101     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00102     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00103     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00104     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
00105     0x00, 0x00,
00106 };
00107
00108 EXTERN_CONST struct Image bertos_logo =
00109 {
00110     /* .raster = */ bertos_logo_raster,
00111     /* .width  = */ 82,
00112     /* .height = */ 64,
00113     /* .stride = */ 82
00114 };
00115


BeRTOS: logo.h Source File

  • icons
logo.h
00001 #include <gfx/gfx.h>
00002
00003 extern const struct Image bertos_logo;


BeRTOS: lpc23xx.h File Reference

  • cpu
  • arm
  • io
lpc23xx.h File Reference
#include <cfg/compiler.h>
#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

LPC23xx I/O registers.

Definition in file lpc23xx.h.


BeRTOS: lpc23xx.h Source File

  • cpu
  • arm
  • io
lpc23xx.h
Go to the documentation of this file.
00001
00038 #ifndef LPC23XX_H
00039 #define LPC23XX_H
00040
00041 #include <cfg/compiler.h>
00042
00043 #include <cpu/detect.h>
00044 /* Vectored Interrupt Controller (VIC) */
00045 #define VIC_BASE_ADDR   0xFFFFF000
00046 #define VICIRQStatus   (*(reg32_t *)(VIC_BASE_ADDR + 0x000))
00047 #define VICFIQStatus   (*(reg32_t *)(VIC_BASE_ADDR + 0x004))
00048 #define VICRawIntr     (*(reg32_t *)(VIC_BASE_ADDR + 0x008))
00049 #define VICIntSelect   (*(reg32_t *)(VIC_BASE_ADDR + 0x00C))
00050 #define VICIntEnable   (*(reg32_t *)(VIC_BASE_ADDR + 0x010))
00051 #define VICIntEnClr    (*(reg32_t *)(VIC_BASE_ADDR + 0x014))
00052 #define VICSoftInt     (*(reg32_t *)(VIC_BASE_ADDR + 0x018))
00053 #define VICSoftIntClr  (*(reg32_t *)(VIC_BASE_ADDR + 0x01C))
00054 #define VICProtection  (*(reg32_t *)(VIC_BASE_ADDR + 0x020))
00055 #define VICSWPrioMask  (*(reg32_t *)(VIC_BASE_ADDR + 0x024))
00056
00057 #define VICVectAddr0   (*(reg32_t *)(VIC_BASE_ADDR + 0x100))
00058 #define VICVectAddr1   (*(reg32_t *)(VIC_BASE_ADDR + 0x104))
00059 #define VICVectAddr2   (*(reg32_t *)(VIC_BASE_ADDR + 0x108))
00060 #define VICVectAddr3   (*(reg32_t *)(VIC_BASE_ADDR + 0x10C))
00061 #define VICVectAddr4   (*(reg32_t *)(VIC_BASE_ADDR + 0x110))
00062 #define VICVectAddr5   (*(reg32_t *)(VIC_BASE_ADDR + 0x114))
00063 #define VICVectAddr6   (*(reg32_t *)(VIC_BASE_ADDR + 0x118))
00064 #define VICVectAddr7   (*(reg32_t *)(VIC_BASE_ADDR + 0x11C))
00065 #define VICVectAddr8   (*(reg32_t *)(VIC_BASE_ADDR + 0x120))
00066 #define VICVectAddr9   (*(reg32_t *)(VIC_BASE_ADDR + 0x124))
00067 #define VICVectAddr10  (*(reg32_t *)(VIC_BASE_ADDR + 0x128))
00068 #define VICVectAddr11  (*(reg32_t *)(VIC_BASE_ADDR + 0x12C))
00069 #define VICVectAddr12  (*(reg32_t *)(VIC_BASE_ADDR + 0x130))
00070 #define VICVectAddr13  (*(reg32_t *)(VIC_BASE_ADDR + 0x134))
00071 #define VICVectAddr14  (*(reg32_t *)(VIC_BASE_ADDR + 0x138))
00072 #define VICVectAddr15  (*(reg32_t *)(VIC_BASE_ADDR + 0x13C))
00073 #define VICVectAddr16  (*(reg32_t *)(VIC_BASE_ADDR + 0x140))
00074 #define VICVectAddr17  (*(reg32_t *)(VIC_BASE_ADDR + 0x144))
00075 #define VICVectAddr18  (*(reg32_t *)(VIC_BASE_ADDR + 0x148))
00076 #define VICVectAddr19  (*(reg32_t *)(VIC_BASE_ADDR + 0x14C))
00077 #define VICVectAddr20  (*(reg32_t *)(VIC_BASE_ADDR + 0x150))
00078 #define VICVectAddr21  (*(reg32_t *)(VIC_BASE_ADDR + 0x154))
00079 #define VICVectAddr22  (*(reg32_t *)(VIC_BASE_ADDR + 0x158))
00080 #define VICVectAddr23  (*(reg32_t *)(VIC_BASE_ADDR + 0x15C))
00081 #define VICVectAddr24  (*(reg32_t *)(VIC_BASE_ADDR + 0x160))
00082 #define VICVectAddr25  (*(reg32_t *)(VIC_BASE_ADDR + 0x164))
00083 #define VICVectAddr26  (*(reg32_t *)(VIC_BASE_ADDR + 0x168))
00084 #define VICVectAddr27  (*(reg32_t *)(VIC_BASE_ADDR + 0x16C))
00085 #define VICVectAddr28  (*(reg32_t *)(VIC_BASE_ADDR + 0x170))
00086 #define VICVectAddr29  (*(reg32_t *)(VIC_BASE_ADDR + 0x174))
00087 #define VICVectAddr30  (*(reg32_t *)(VIC_BASE_ADDR + 0x178))
00088 #define VICVectAddr31  (*(reg32_t *)(VIC_BASE_ADDR + 0x17C))
00089
00090 /* The name convention below is from previous LPC2000 family MCUs, in LPC23xx/24xx,
00091 these registers are known as "VICVectPriority(x)". */
00092 #define VICVectCntl0   (*(reg32_t *)(VIC_BASE_ADDR + 0x200))
00093 #define VICVectCntl1   (*(reg32_t *)(VIC_BASE_ADDR + 0x204))
00094 #define VICVectCntl2   (*(reg32_t *)(VIC_BASE_ADDR + 0x208))
00095 #define VICVectCntl3   (*(reg32_t *)(VIC_BASE_ADDR + 0x20C))
00096 #define VICVectCntl4   (*(reg32_t *)(VIC_BASE_ADDR + 0x210))
00097 #define VICVectCntl5   (*(reg32_t *)(VIC_BASE_ADDR + 0x214))
00098 #define VICVectCntl6   (*(reg32_t *)(VIC_BASE_ADDR + 0x218))
00099 #define VICVectCntl7   (*(reg32_t *)(VIC_BASE_ADDR + 0x21C))
00100 #define VICVectCntl8   (*(reg32_t *)(VIC_BASE_ADDR + 0x220))
00101 #define VICVectCntl9   (*(reg32_t *)(VIC_BASE_ADDR + 0x224))
00102 #define VICVectCntl10  (*(reg32_t *)(VIC_BASE_ADDR + 0x228))
00103 #define VICVectCntl11  (*(reg32_t *)(VIC_BASE_ADDR + 0x22C))
00104 #define VICVectCntl12  (*(reg32_t *)(VIC_BASE_ADDR + 0x230))
00105 #define VICVectCntl13  (*(reg32_t *)(VIC_BASE_ADDR + 0x234))
00106 #define VICVectCntl14  (*(reg32_t *)(VIC_BASE_ADDR + 0x238))
00107 #define VICVectCntl15  (*(reg32_t *)(VIC_BASE_ADDR + 0x23C))
00108 #define VICVectCntl16  (*(reg32_t *)(VIC_BASE_ADDR + 0x240))
00109 #define VICVectCntl17  (*(reg32_t *)(VIC_BASE_ADDR + 0x244))
00110 #define VICVectCntl18  (*(reg32_t *)(VIC_BASE_ADDR + 0x248))
00111 #define VICVectCntl19  (*(reg32_t *)(VIC_BASE_ADDR + 0x24C))
00112 #define VICVectCntl20  (*(reg32_t *)(VIC_BASE_ADDR + 0x250))
00113 #define VICVectCntl21  (*(reg32_t *)(VIC_BASE_ADDR + 0x254))
00114 #define VICVectCntl22  (*(reg32_t *)(VIC_BASE_ADDR + 0x258))
00115 #define VICVectCntl23  (*(reg32_t *)(VIC_BASE_ADDR + 0x25C))
00116 #define VICVectCntl24  (*(reg32_t *)(VIC_BASE_ADDR + 0x260))
00117 #define VICVectCntl25  (*(reg32_t *)(VIC_BASE_ADDR + 0x264))
00118 #define VICVectCntl26  (*(reg32_t *)(VIC_BASE_ADDR + 0x268))
00119 #define VICVectCntl27  (*(reg32_t *)(VIC_BASE_ADDR + 0x26C))
00120 #define VICVectCntl28  (*(reg32_t *)(VIC_BASE_ADDR + 0x270))
00121 #define VICVectCntl29  (*(reg32_t *)(VIC_BASE_ADDR + 0x274))
00122 #define VICVectCntl30  (*(reg32_t *)(VIC_BASE_ADDR + 0x278))
00123 #define VICVectCntl31  (*(reg32_t *)(VIC_BASE_ADDR + 0x27C))
00124
00125 #define VICVectAddr    (*(reg32_t *)(VIC_BASE_ADDR + 0xF00))
00126
00127
00128 /* Pin Connect Block */
00129 #define PINSEL_BASE_ADDR 0xE002C000
00130 #define PINSEL0        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x00))
00131 #define PINSEL1        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x04))
00132 #define PINSEL2        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x08))
00133 #define PINSEL3        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x0C))
00134 #define PINSEL4        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x10))
00135 #define PINSEL5        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x14))
00136 #define PINSEL6        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x18))
00137 #define PINSEL7        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x1C))
00138 #define PINSEL8        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x20))
00139 #define PINSEL9        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x24))
00140 #define PINSEL10       (*(reg32_t *)(PINSEL_BASE_ADDR + 0x28))
00141
00142 #define PINSEL0_OFF        0x00
00143 #define PINSEL1_OFF        0x04
00144 #define PINSEL2_OFF        0x08
00145 #define PINSEL3_OFF        0x0C
00146 #define PINSEL4_OFF        0x10
00147 #define PINSEL5_OFF        0x14
00148 #define PINSEL6_OFF        0x18
00149 #define PINSEL7_OFF        0x1C
00150 #define PINSEL8_OFF        0x20
00151 #define PINSEL9_OFF        0x24
00152 #define PINSEL10_OFF       0x28
00153
00154 #define PINMODE0        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x40))
00155 #define PINMODE1        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x44))
00156 #define PINMODE2        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x48))
00157 #define PINMODE3        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x4C))
00158 #define PINMODE4        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x50))
00159 #define PINMODE5        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x54))
00160 #define PINMODE6        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x58))
00161 #define PINMODE7        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x5C))
00162 #define PINMODE8        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x60))
00163 #define PINMODE9        (*(reg32_t *)(PINSEL_BASE_ADDR + 0x64))
00164
00165 /* General Purpose Input/Output (GPIO) */
00166 #define GPIO_BASE_ADDR      0xE0028000
00167 #define IOPIN0         (*(reg32_t *)(GPIO_BASE_ADDR + 0x00))
00168 #define IOSET0         (*(reg32_t *)(GPIO_BASE_ADDR + 0x04))
00169 #define IODIR0         (*(reg32_t *)(GPIO_BASE_ADDR + 0x08))
00170 #define IOCLR0         (*(reg32_t *)(GPIO_BASE_ADDR + 0x0C))
00171 #define IOPIN1         (*(reg32_t *)(GPIO_BASE_ADDR + 0x10))
00172 #define IOSET1         (*(reg32_t *)(GPIO_BASE_ADDR + 0x14))
00173 #define IODIR1         (*(reg32_t *)(GPIO_BASE_ADDR + 0x18))
00174 #define IOCLR1         (*(reg32_t *)(GPIO_BASE_ADDR + 0x1C))
00175
00176 /* GPIO Interrupt Registers */
00177 #define IO0_INT_EN_R    (*(reg32_t *)(GPIO_BASE_ADDR + 0x90))
00178 #define IO0_INT_EN_F    (*(reg32_t *)(GPIO_BASE_ADDR + 0x94))
00179 #define IO0_INT_STAT_R  (*(reg32_t *)(GPIO_BASE_ADDR + 0x84))
00180 #define IO0_INT_STAT_F  (*(reg32_t *)(GPIO_BASE_ADDR + 0x88))
00181 #define IO0_INT_CLR     (*(reg32_t *)(GPIO_BASE_ADDR + 0x8C))
00182
00183 #define IO2_INT_EN_R    (*(reg32_t *)(GPIO_BASE_ADDR + 0xB0))
00184 #define IO2_INT_EN_F    (*(reg32_t *)(GPIO_BASE_ADDR + 0xB4))
00185 #define IO2_INT_STAT_R  (*(reg32_t *)(GPIO_BASE_ADDR + 0xA4))
00186 #define IO2_INT_STAT_F  (*(reg32_t *)(GPIO_BASE_ADDR + 0xA8))
00187 #define IO2_INT_CLR     (*(reg32_t *)(GPIO_BASE_ADDR + 0xAC))
00188
00189 #define IO_INT_STAT     (*(reg32_t *)(GPIO_BASE_ADDR + 0x80))
00190
00191 #define PARTCFG_BASE_ADDR       0x3FFF8000
00192 #define PARTCFG        (*(reg32_t *)(PARTCFG_BASE_ADDR + 0x00))
00193
00194 /* Fast I/O setup */
00195 #define FIO_BASE_ADDR       0x3FFFC000
00196 #define FIO0DIR        (*(reg32_t *)(FIO_BASE_ADDR + 0x00))
00197 #define FIO0MASK       (*(reg32_t *)(FIO_BASE_ADDR + 0x10))
00198 #define FIO0PIN        (*(reg32_t *)(FIO_BASE_ADDR + 0x14))
00199 #define FIO0SET        (*(reg32_t *)(FIO_BASE_ADDR + 0x18))
00200 #define FIO0CLR        (*(reg32_t *)(FIO_BASE_ADDR + 0x1C))
00201
00202 #define FIO1DIR        (*(reg32_t *)(FIO_BASE_ADDR + 0x20))
00203 #define FIO1MASK       (*(reg32_t *)(FIO_BASE_ADDR + 0x30))
00204 #define FIO1PIN        (*(reg32_t *)(FIO_BASE_ADDR + 0x34))
00205 #define FIO1SET        (*(reg32_t *)(FIO_BASE_ADDR + 0x38))
00206 #define FIO1CLR        (*(reg32_t *)(FIO_BASE_ADDR + 0x3C))
00207
00208 #define FIO2DIR        (*(reg32_t *)(FIO_BASE_ADDR + 0x40))
00209 #define FIO2MASK       (*(reg32_t *)(FIO_BASE_ADDR + 0x50))
00210 #define FIO2PIN        (*(reg32_t *)(FIO_BASE_ADDR + 0x54))
00211 #define FIO2SET        (*(reg32_t *)(FIO_BASE_ADDR + 0x58))
00212 #define FIO2CLR        (*(reg32_t *)(FIO_BASE_ADDR + 0x5C))
00213
00214 #define FIO3DIR        (*(reg32_t *)(FIO_BASE_ADDR + 0x60))
00215 #define FIO3MASK       (*(reg32_t *)(FIO_BASE_ADDR + 0x70))
00216 #define FIO3PIN        (*(reg32_t *)(FIO_BASE_ADDR + 0x74))
00217 #define FIO3SET        (*(reg32_t *)(FIO_BASE_ADDR + 0x78))
00218 #define FIO3CLR        (*(reg32_t *)(FIO_BASE_ADDR + 0x7C))
00219
00220 #define FIO4DIR        (*(reg32_t *)(FIO_BASE_ADDR + 0x80))
00221 #define FIO4MASK       (*(reg32_t *)(FIO_BASE_ADDR + 0x90))
00222 #define FIO4PIN        (*(reg32_t *)(FIO_BASE_ADDR + 0x94))
00223 #define FIO4SET        (*(reg32_t *)(FIO_BASE_ADDR + 0x98))
00224 #define FIO4CLR        (*(reg32_t *)(FIO_BASE_ADDR + 0x9C))
00225
00226 /* FIOs can be accessed through WORD, HALF-WORD or BYTE. */
00227 #define FIO0DIR0       (*(reg8_t *)(FIO_BASE_ADDR + 0x00))
00228 #define FIO1DIR0       (*(reg8_t *)(FIO_BASE_ADDR + 0x20))
00229 #define FIO2DIR0       (*(reg8_t *)(FIO_BASE_ADDR + 0x40))
00230 #define FIO3DIR0       (*(reg8_t *)(FIO_BASE_ADDR + 0x60))
00231 #define FIO4DIR0       (*(reg8_t *)(FIO_BASE_ADDR + 0x80))
00232
00233 #define FIO0DIR1       (*(reg8_t *)(FIO_BASE_ADDR + 0x01))
00234 #define FIO1DIR1       (*(reg8_t *)(FIO_BASE_ADDR + 0x21))
00235 #define FIO2DIR1       (*(reg8_t *)(FIO_BASE_ADDR + 0x41))
00236 #define FIO3DIR1       (*(reg8_t *)(FIO_BASE_ADDR + 0x61))
00237 #define FIO4DIR1       (*(reg8_t *)(FIO_BASE_ADDR + 0x81))
00238
00239 #define FIO0DIR2       (*(reg8_t *)(FIO_BASE_ADDR + 0x02))
00240 #define FIO1DIR2       (*(reg8_t *)(FIO_BASE_ADDR + 0x22))
00241 #define FIO2DIR2       (*(reg8_t *)(FIO_BASE_ADDR + 0x42))
00242 #define FIO3DIR2       (*(reg8_t *)(FIO_BASE_ADDR + 0x62))
00243 #define FIO4DIR2       (*(reg8_t *)(FIO_BASE_ADDR + 0x82))
00244
00245 #define FIO0DIR3       (*(reg8_t *)(FIO_BASE_ADDR + 0x03))
00246 #define FIO1DIR3       (*(reg8_t *)(FIO_BASE_ADDR + 0x23))
00247 #define FIO2DIR3       (*(reg8_t *)(FIO_BASE_ADDR + 0x43))
00248 #define FIO3DIR3       (*(reg8_t *)(FIO_BASE_ADDR + 0x63))
00249 #define FIO4DIR3       (*(reg8_t *)(FIO_BASE_ADDR + 0x83))
00250
00251 #define FIO0DIRL       (*(reg16_t *)(FIO_BASE_ADDR + 0x00))
00252 #define FIO1DIRL       (*(reg16_t *)(FIO_BASE_ADDR + 0x20))
00253 #define FIO2DIRL       (*(reg16_t *)(FIO_BASE_ADDR + 0x40))
00254 #define FIO3DIRL       (*(reg16_t *)(FIO_BASE_ADDR + 0x60))
00255 #define FIO4DIRL       (*(reg16_t *)(FIO_BASE_ADDR + 0x80))
00256
00257 #define FIO0DIRU       (*(reg16_t *)(FIO_BASE_ADDR + 0x02))
00258 #define FIO1DIRU       (*(reg16_t *)(FIO_BASE_ADDR + 0x22))
00259 #define FIO2DIRU       (*(reg16_t *)(FIO_BASE_ADDR + 0x42))
00260 #define FIO3DIRU       (*(reg16_t *)(FIO_BASE_ADDR + 0x62))
00261 #define FIO4DIRU       (*(reg16_t *)(FIO_BASE_ADDR + 0x82))
00262
00263 #define FIO0MASK0      (*(reg8_t *)(FIO_BASE_ADDR + 0x10))
00264 #define FIO1MASK0      (*(reg8_t *)(FIO_BASE_ADDR + 0x30))
00265 #define FIO2MASK0      (*(reg8_t *)(FIO_BASE_ADDR + 0x50))
00266 #define FIO3MASK0      (*(reg8_t *)(FIO_BASE_ADDR + 0x70))
00267 #define FIO4MASK0      (*(reg8_t *)(FIO_BASE_ADDR + 0x90))
00268
00269 #define FIO0MASK1      (*(reg8_t *)(FIO_BASE_ADDR + 0x11))
00270 #define FIO1MASK1      (*(reg8_t *)(FIO_BASE_ADDR + 0x21))
00271 #define FIO2MASK1      (*(reg8_t *)(FIO_BASE_ADDR + 0x51))
00272 #define FIO3MASK1      (*(reg8_t *)(FIO_BASE_ADDR + 0x71))
00273 #define FIO4MASK1      (*(reg8_t *)(FIO_BASE_ADDR + 0x91))
00274
00275 #define FIO0MASK2      (*(reg8_t *)(FIO_BASE_ADDR + 0x12))
00276 #define FIO1MASK2      (*(reg8_t *)(FIO_BASE_ADDR + 0x32))
00277 #define FIO2MASK2      (*(reg8_t *)(FIO_BASE_ADDR + 0x52))
00278 #define FIO3MASK2      (*(reg8_t *)(FIO_BASE_ADDR + 0x72))
00279 #define FIO4MASK2      (*(reg8_t *)(FIO_BASE_ADDR + 0x92))
00280
00281 #define FIO0MASK3      (*(reg8_t *)(FIO_BASE_ADDR + 0x13))
00282 #define FIO1MASK3      (*(reg8_t *)(FIO_BASE_ADDR + 0x33))
00283 #define FIO2MASK3      (*(reg8_t *)(FIO_BASE_ADDR + 0x53))
00284 #define FIO3MASK3      (*(reg8_t *)(FIO_BASE_ADDR + 0x73))
00285 #define FIO4MASK3      (*(reg8_t *)(FIO_BASE_ADDR + 0x93))
00286
00287 #define FIO0MASKL      (*(reg16_t *)(FIO_BASE_ADDR + 0x10))
00288 #define FIO1MASKL      (*(reg16_t *)(FIO_BASE_ADDR + 0x30))
00289 #define FIO2MASKL      (*(reg16_t *)(FIO_BASE_ADDR + 0x50))
00290 #define FIO3MASKL      (*(reg16_t *)(FIO_BASE_ADDR + 0x70))
00291 #define FIO4MASKL      (*(reg16_t *)(FIO_BASE_ADDR + 0x90))
00292
00293 #define FIO0MASKU      (*(reg16_t *)(FIO_BASE_ADDR + 0x12))
00294 #define FIO1MASKU      (*(reg16_t *)(FIO_BASE_ADDR + 0x32))
00295 #define FIO2MASKU      (*(reg16_t *)(FIO_BASE_ADDR + 0x52))
00296 #define FIO3MASKU      (*(reg16_t *)(FIO_BASE_ADDR + 0x72))
00297 #define FIO4MASKU      (*(reg16_t *)(FIO_BASE_ADDR + 0x92))
00298
00299 #define FIO0PIN0       (*(reg8_t *)(FIO_BASE_ADDR + 0x14))
00300 #define FIO1PIN0       (*(reg8_t *)(FIO_BASE_ADDR + 0x34))
00301 #define FIO2PIN0       (*(reg8_t *)(FIO_BASE_ADDR + 0x54))
00302 #define FIO3PIN0       (*(reg8_t *)(FIO_BASE_ADDR + 0x74))
00303 #define FIO4PIN0       (*(reg8_t *)(FIO_BASE_ADDR + 0x94))
00304
00305 #define FIO0PIN1       (*(reg8_t *)(FIO_BASE_ADDR + 0x15))
00306 #define FIO1PIN1       (*(reg8_t *)(FIO_BASE_ADDR + 0x25))
00307 #define FIO2PIN1       (*(reg8_t *)(FIO_BASE_ADDR + 0x55))
00308 #define FIO3PIN1       (*(reg8_t *)(FIO_BASE_ADDR + 0x75))
00309 #define FIO4PIN1       (*(reg8_t *)(FIO_BASE_ADDR + 0x95))
00310
00311 #define FIO0PIN2       (*(reg8_t *)(FIO_BASE_ADDR + 0x16))
00312 #define FIO1PIN2       (*(reg8_t *)(FIO_BASE_ADDR + 0x36))
00313 #define FIO2PIN2       (*(reg8_t *)(FIO_BASE_ADDR + 0x56))
00314 #define FIO3PIN2       (*(reg8_t *)(FIO_BASE_ADDR + 0x76))
00315 #define FIO4PIN2       (*(reg8_t *)(FIO_BASE_ADDR + 0x96))
00316
00317 #define FIO0PIN3       (*(reg8_t *)(FIO_BASE_ADDR + 0x17))
00318 #define FIO1PIN3       (*(reg8_t *)(FIO_BASE_ADDR + 0x37))
00319 #define FIO2PIN3       (*(reg8_t *)(FIO_BASE_ADDR + 0x57))
00320 #define FIO3PIN3       (*(reg8_t *)(FIO_BASE_ADDR + 0x77))
00321 #define FIO4PIN3       (*(reg8_t *)(FIO_BASE_ADDR + 0x97))
00322
00323 #define FIO0PINL       (*(reg16_t *)(FIO_BASE_ADDR + 0x14))
00324 #define FIO1PINL       (*(reg16_t *)(FIO_BASE_ADDR + 0x34))
00325 #define FIO2PINL       (*(reg16_t *)(FIO_BASE_ADDR + 0x54))
00326 #define FIO3PINL       (*(reg16_t *)(FIO_BASE_ADDR + 0x74))
00327 #define FIO4PINL       (*(reg16_t *)(FIO_BASE_ADDR + 0x94))
00328
00329 #define FIO0PINU       (*(reg16_t *)(FIO_BASE_ADDR + 0x16))
00330 #define FIO1PINU       (*(reg16_t *)(FIO_BASE_ADDR + 0x36))
00331 #define FIO2PINU       (*(reg16_t *)(FIO_BASE_ADDR + 0x56))
00332 #define FIO3PINU       (*(reg16_t *)(FIO_BASE_ADDR + 0x76))
00333 #define FIO4PINU       (*(reg16_t *)(FIO_BASE_ADDR + 0x96))
00334
00335 #define FIO0SET0       (*(reg8_t *)(FIO_BASE_ADDR + 0x18))
00336 #define FIO1SET0       (*(reg8_t *)(FIO_BASE_ADDR + 0x38))
00337 #define FIO2SET0       (*(reg8_t *)(FIO_BASE_ADDR + 0x58))
00338 #define FIO3SET0       (*(reg8_t *)(FIO_BASE_ADDR + 0x78))
00339 #define FIO4SET0       (*(reg8_t *)(FIO_BASE_ADDR + 0x98))
00340
00341 #define FIO0SET1       (*(reg8_t *)(FIO_BASE_ADDR + 0x19))
00342 #define FIO1SET1       (*(reg8_t *)(FIO_BASE_ADDR + 0x29))
00343 #define FIO2SET1       (*(reg8_t *)(FIO_BASE_ADDR + 0x59))
00344 #define FIO3SET1       (*(reg8_t *)(FIO_BASE_ADDR + 0x79))
00345 #define FIO4SET1       (*(reg8_t *)(FIO_BASE_ADDR + 0x99))
00346
00347 #define FIO0SET2       (*(reg8_t *)(FIO_BASE_ADDR + 0x1A))
00348 #define FIO1SET2       (*(reg8_t *)(FIO_BASE_ADDR + 0x3A))
00349 #define FIO2SET2       (*(reg8_t *)(FIO_BASE_ADDR + 0x5A))
00350 #define FIO3SET2       (*(reg8_t *)(FIO_BASE_ADDR + 0x7A))
00351 #define FIO4SET2       (*(reg8_t *)(FIO_BASE_ADDR + 0x9A))
00352
00353 #define FIO0SET3       (*(reg8_t *)(FIO_BASE_ADDR + 0x1B))
00354 #define FIO1SET3       (*(reg8_t *)(FIO_BASE_ADDR + 0x3B))
00355 #define FIO2SET3       (*(reg8_t *)(FIO_BASE_ADDR + 0x5B))
00356 #define FIO3SET3       (*(reg8_t *)(FIO_BASE_ADDR + 0x7B))
00357 #define FIO4SET3       (*(reg8_t *)(FIO_BASE_ADDR + 0x9B))
00358
00359 #define FIO0SETL       (*(reg16_t *)(FIO_BASE_ADDR + 0x18))
00360 #define FIO1SETL       (*(reg16_t *)(FIO_BASE_ADDR + 0x38))
00361 #define FIO2SETL       (*(reg16_t *)(FIO_BASE_ADDR + 0x58))
00362 #define FIO3SETL       (*(reg16_t *)(FIO_BASE_ADDR + 0x78))
00363 #define FIO4SETL       (*(reg16_t *)(FIO_BASE_ADDR + 0x98))
00364
00365 #define FIO0SETU       (*(reg16_t *)(FIO_BASE_ADDR + 0x1A))
00366 #define FIO1SETU       (*(reg16_t *)(FIO_BASE_ADDR + 0x3A))
00367 #define FIO2SETU       (*(reg16_t *)(FIO_BASE_ADDR + 0x5A))
00368 #define FIO3SETU       (*(reg16_t *)(FIO_BASE_ADDR + 0x7A))
00369 #define FIO4SETU       (*(reg16_t *)(FIO_BASE_ADDR + 0x9A))
00370
00371 #define FIO0CLR0       (*(reg8_t *)(FIO_BASE_ADDR + 0x1C))
00372 #define FIO1CLR0       (*(reg8_t *)(FIO_BASE_ADDR + 0x3C))
00373 #define FIO2CLR0       (*(reg8_t *)(FIO_BASE_ADDR + 0x5C))
00374 #define FIO3CLR0       (*(reg8_t *)(FIO_BASE_ADDR + 0x7C))
00375 #define FIO4CLR0       (*(reg8_t *)(FIO_BASE_ADDR + 0x9C))
00376
00377 #define FIO0CLR1       (*(reg8_t *)(FIO_BASE_ADDR + 0x1D))
00378 #define FIO1CLR1       (*(reg8_t *)(FIO_BASE_ADDR + 0x2D))
00379 #define FIO2CLR1       (*(reg8_t *)(FIO_BASE_ADDR + 0x5D))
00380 #define FIO3CLR1       (*(reg8_t *)(FIO_BASE_ADDR + 0x7D))
00381 #define FIO4CLR1       (*(reg8_t *)(FIO_BASE_ADDR + 0x9D))
00382
00383 #define FIO0CLR2       (*(reg8_t *)(FIO_BASE_ADDR + 0x1E))
00384 #define FIO1CLR2       (*(reg8_t *)(FIO_BASE_ADDR + 0x3E))
00385 #define FIO2CLR2       (*(reg8_t *)(FIO_BASE_ADDR + 0x5E))
00386 #define FIO3CLR2       (*(reg8_t *)(FIO_BASE_ADDR + 0x7E))
00387 #define FIO4CLR2       (*(reg8_t *)(FIO_BASE_ADDR + 0x9E))
00388
00389 #define FIO0CLR3       (*(reg8_t *)(FIO_BASE_ADDR + 0x1F))
00390 #define FIO1CLR3       (*(reg8_t *)(FIO_BASE_ADDR + 0x3F))
00391 #define FIO2CLR3       (*(reg8_t *)(FIO_BASE_ADDR + 0x5F))
00392 #define FIO3CLR3       (*(reg8_t *)(FIO_BASE_ADDR + 0x7F))
00393 #define FIO4CLR3       (*(reg8_t *)(FIO_BASE_ADDR + 0x9F))
00394
00395 #define FIO0CLRL       (*(reg16_t *)(FIO_BASE_ADDR + 0x1C))
00396 #define FIO1CLRL       (*(reg16_t *)(FIO_BASE_ADDR + 0x3C))
00397 #define FIO2CLRL       (*(reg16_t *)(FIO_BASE_ADDR + 0x5C))
00398 #define FIO3CLRL       (*(reg16_t *)(FIO_BASE_ADDR + 0x7C))
00399 #define FIO4CLRL       (*(reg16_t *)(FIO_BASE_ADDR + 0x9C))
00400
00401 #define FIO0CLRU       (*(reg16_t *)(FIO_BASE_ADDR + 0x1E))
00402 #define FIO1CLRU       (*(reg16_t *)(FIO_BASE_ADDR + 0x3E))
00403 #define FIO2CLRU       (*(reg16_t *)(FIO_BASE_ADDR + 0x5E))
00404 #define FIO3CLRU       (*(reg16_t *)(FIO_BASE_ADDR + 0x7E))
00405 #define FIO4CLRU       (*(reg16_t *)(FIO_BASE_ADDR + 0x9E))
00406
00407
00408 /* System Control Block(SCB) modules include Memory Accelerator Module,
00409 Phase Locked Loop, VPB divider, Power Control, External Interrupt,
00410 Reset, and Code Security/Debugging */
00411 #define SCB_BASE_ADDR   0xE01FC000
00412
00413 /* Memory Accelerator Module (MAM) */
00414 #define MAMCR          (*(reg32_t *)(SCB_BASE_ADDR + 0x000))
00415 #define MAMTIM         (*(reg32_t *)(SCB_BASE_ADDR + 0x004))
00416 #define MEMMAP         (*(reg32_t *)(SCB_BASE_ADDR + 0x040))
00417
00418 /* Phase Locked Loop (PLL) */
00419 #define PLLCON         (*(reg32_t *)(SCB_BASE_ADDR + 0x080))
00420 #define PLLCFG         (*(reg32_t *)(SCB_BASE_ADDR + 0x084))
00421 #define PLLSTAT        (*(reg32_t *)(SCB_BASE_ADDR + 0x088))
00422 #define PLLFEED        (*(reg32_t *)(SCB_BASE_ADDR + 0x08C))
00423
00424 /* Power Control */
00425 #define PCON           (*(reg32_t *)(SCB_BASE_ADDR + 0x0C0))
00426 #define PCONP          (*(reg32_t *)(SCB_BASE_ADDR + 0x0C4))
00427 #define PCONP_PCI2C0                                      7
00428 #define PCONP_PCI2C1                                     19
00429 #define PCONP_PCI2C2                                     26
00430
00431
00432 /* Clock Divider */
00433 // #define APBDIV         (*(reg32_t *)(SCB_BASE_ADDR + 0x100))
00434 #define CCLKCFG        (*(reg32_t *)(SCB_BASE_ADDR + 0x104))
00435 #define USBCLKCFG      (*(reg32_t *)(SCB_BASE_ADDR + 0x108))
00436 #define CLKSRCSEL      (*(reg32_t *)(SCB_BASE_ADDR + 0x10C))
00437 #define PCLKSEL0       (*(reg32_t *)(SCB_BASE_ADDR + 0x1A8))
00438 #define PCLKSEL1       (*(reg32_t *)(SCB_BASE_ADDR + 0x1AC))
00439
00440 #define CCLKCFG_OFF        0x104
00441 #define USBCLKCFG_OFF      0x108
00442 #define CLKSRCSEL_OFF      0x10C
00443 #define PCLKSEL0_OFF       0x1A8
00444 #define PCLKSEL1_OFF       0x1AC
00445
00446
00447 /* External Interrupts */
00448 #define EXTINT         (*(reg32_t *)(SCB_BASE_ADDR + 0x140))
00449 #define INTWAKE        (*(reg32_t *)(SCB_BASE_ADDR + 0x144))
00450 #define EXTMODE        (*(reg32_t *)(SCB_BASE_ADDR + 0x148))
00451 #define EXTPOLAR       (*(reg32_t *)(SCB_BASE_ADDR + 0x14C))
00452
00453 /* Reset, reset source identification */
00454 #define RSIR           (*(reg32_t *)(SCB_BASE_ADDR + 0x180))
00455
00456 /* RSID, code security protection */
00457 #define CSPR           (*(reg32_t *)(SCB_BASE_ADDR + 0x184))
00458
00459 /* AHB configuration */
00460 #define AHBCFG1        (*(reg32_t *)(SCB_BASE_ADDR + 0x188))
00461 #define AHBCFG2        (*(reg32_t *)(SCB_BASE_ADDR + 0x18C))
00462
00463 /* System Controls and Status */
00464 #define SCS            (*(reg32_t *)(SCB_BASE_ADDR + 0x1A0))
00465
00466 /* MPMC(EMC) registers, note: all the external memory controller(EMC) registers
00467 are for LPC24xx only. */
00468 #define STATIC_MEM0_BASE        0x80000000
00469 #define STATIC_MEM1_BASE        0x81000000
00470 #define STATIC_MEM2_BASE        0x82000000
00471 #define STATIC_MEM3_BASE        0x83000000
00472
00473 #define DYNAMIC_MEM0_BASE       0xA0000000
00474 #define DYNAMIC_MEM1_BASE       0xB0000000
00475 #define DYNAMIC_MEM2_BASE       0xC0000000
00476 #define DYNAMIC_MEM3_BASE       0xD0000000
00477
00478 /* External Memory Controller (EMC) */
00479 #define EMC_BASE_ADDR       0xFFE08000
00480 #define EMC_CTRL       (*(reg32_t *)(EMC_BASE_ADDR + 0x000))
00481 #define EMC_STAT       (*(reg32_t *)(EMC_BASE_ADDR + 0x004))
00482 #define EMC_CONFIG     (*(reg32_t *)(EMC_BASE_ADDR + 0x008))
00483
00484 /* Dynamic RAM access registers */
00485 #define EMC_DYN_CTRL     (*(reg32_t *)(EMC_BASE_ADDR + 0x020))
00486 #define EMC_DYN_RFSH     (*(reg32_t *)(EMC_BASE_ADDR + 0x024))
00487 #define EMC_DYN_RD_CFG   (*(reg32_t *)(EMC_BASE_ADDR + 0x028))
00488 #define EMC_DYN_RP       (*(reg32_t *)(EMC_BASE_ADDR + 0x030))
00489 #define EMC_DYN_RAS      (*(reg32_t *)(EMC_BASE_ADDR + 0x034))
00490 #define EMC_DYN_SREX     (*(reg32_t *)(EMC_BASE_ADDR + 0x038))
00491 #define EMC_DYN_APR      (*(reg32_t *)(EMC_BASE_ADDR + 0x03C))
00492 #define EMC_DYN_DAL      (*(reg32_t *)(EMC_BASE_ADDR + 0x040))
00493 #define EMC_DYN_WR       (*(reg32_t *)(EMC_BASE_ADDR + 0x044))
00494 #define EMC_DYN_RC       (*(reg32_t *)(EMC_BASE_ADDR + 0x048))
00495 #define EMC_DYN_RFC      (*(reg32_t *)(EMC_BASE_ADDR + 0x04C))
00496 #define EMC_DYN_XSR      (*(reg32_t *)(EMC_BASE_ADDR + 0x050))
00497 #define EMC_DYN_RRD      (*(reg32_t *)(EMC_BASE_ADDR + 0x054))
00498 #define EMC_DYN_MRD      (*(reg32_t *)(EMC_BASE_ADDR + 0x058))
00499
00500 #define EMC_DYN_CFG0     (*(reg32_t *)(EMC_BASE_ADDR + 0x100))
00501 #define EMC_DYN_RASCAS0  (*(reg32_t *)(EMC_BASE_ADDR + 0x104))
00502 #define EMC_DYN_CFG1     (*(reg32_t *)(EMC_BASE_ADDR + 0x140))
00503 #define EMC_DYN_RASCAS1  (*(reg32_t *)(EMC_BASE_ADDR + 0x144))
00504 #define EMC_DYN_CFG2     (*(reg32_t *)(EMC_BASE_ADDR + 0x160))
00505 #define EMC_DYN_RASCAS2  (*(reg32_t *)(EMC_BASE_ADDR + 0x164))
00506 #define EMC_DYN_CFG3     (*(reg32_t *)(EMC_BASE_ADDR + 0x180))
00507 #define EMC_DYN_RASCAS3  (*(reg32_t *)(EMC_BASE_ADDR + 0x184))
00508
00509 /* static RAM access registers */
00510 #define EMC_STA_CFG0      (*(reg32_t *)(EMC_BASE_ADDR + 0x200))
00511 #define EMC_STA_WAITWEN0  (*(reg32_t *)(EMC_BASE_ADDR + 0x204))
00512 #define EMC_STA_WAITOEN0  (*(reg32_t *)(EMC_BASE_ADDR + 0x208))
00513 #define EMC_STA_WAITRD0   (*(reg32_t *)(EMC_BASE_ADDR + 0x20C))
00514 #define EMC_STA_WAITPAGE0 (*(reg32_t *)(EMC_BASE_ADDR + 0x210))
00515 #define EMC_STA_WAITWR0   (*(reg32_t *)(EMC_BASE_ADDR + 0x214))
00516 #define EMC_STA_WAITTURN0 (*(reg32_t *)(EMC_BASE_ADDR + 0x218))
00517
00518 #define EMC_STA_CFG1      (*(reg32_t *)(EMC_BASE_ADDR + 0x220))
00519 #define EMC_STA_WAITWEN1  (*(reg32_t *)(EMC_BASE_ADDR + 0x224))
00520 #define EMC_STA_WAITOEN1  (*(reg32_t *)(EMC_BASE_ADDR + 0x228))
00521 #define EMC_STA_WAITRD1   (*(reg32_t *)(EMC_BASE_ADDR + 0x22C))
00522 #define EMC_STA_WAITPAGE1 (*(reg32_t *)(EMC_BASE_ADDR + 0x230))
00523 #define EMC_STA_WAITWR1   (*(reg32_t *)(EMC_BASE_ADDR + 0x234))
00524 #define EMC_STA_WAITTURN1 (*(reg32_t *)(EMC_BASE_ADDR + 0x238))
00525
00526 #define EMC_STA_CFG2      (*(reg32_t *)(EMC_BASE_ADDR + 0x240))
00527 #define EMC_STA_WAITWEN2  (*(reg32_t *)(EMC_BASE_ADDR + 0x244))
00528 #define EMC_STA_WAITOEN2  (*(reg32_t *)(EMC_BASE_ADDR + 0x248))
00529 #define EMC_STA_WAITRD2   (*(reg32_t *)(EMC_BASE_ADDR + 0x24C))
00530 #define EMC_STA_WAITPAGE2 (*(reg32_t *)(EMC_BASE_ADDR + 0x250))
00531 #define EMC_STA_WAITWR2   (*(reg32_t *)(EMC_BASE_ADDR + 0x254))
00532 #define EMC_STA_WAITTURN2 (*(reg32_t *)(EMC_BASE_ADDR + 0x258))
00533
00534 #define EMC_STA_CFG3      (*(reg32_t *)(EMC_BASE_ADDR + 0x260))
00535 #define EMC_STA_WAITWEN3  (*(reg32_t *)(EMC_BASE_ADDR + 0x264))
00536 #define EMC_STA_WAITOEN3  (*(reg32_t *)(EMC_BASE_ADDR + 0x268))
00537 #define EMC_STA_WAITRD3   (*(reg32_t *)(EMC_BASE_ADDR + 0x26C))
00538 #define EMC_STA_WAITPAGE3 (*(reg32_t *)(EMC_BASE_ADDR + 0x270))
00539 #define EMC_STA_WAITWR3   (*(reg32_t *)(EMC_BASE_ADDR + 0x274))
00540 #define EMC_STA_WAITTURN3 (*(reg32_t *)(EMC_BASE_ADDR + 0x278))
00541
00542 #define EMC_STA_EXT_WAIT  (*(reg32_t *)(EMC_BASE_ADDR + 0x880))
00543
00544
00545 /* Timer 0 */
00546 #define TMR0_BASE_ADDR      0xE0004000
00547 #define T0IR           (*(reg32_t *)(TMR0_BASE_ADDR + 0x00))
00548 #define T0TCR          (*(reg32_t *)(TMR0_BASE_ADDR + 0x04))
00549 #define T0TC           (*(reg32_t *)(TMR0_BASE_ADDR + 0x08))
00550 #define T0PR           (*(reg32_t *)(TMR0_BASE_ADDR + 0x0C))
00551 #define T0PC           (*(reg32_t *)(TMR0_BASE_ADDR + 0x10))
00552 #define T0MCR          (*(reg32_t *)(TMR0_BASE_ADDR + 0x14))
00553 #define T0MR0          (*(reg32_t *)(TMR0_BASE_ADDR + 0x18))
00554 #define T0MR1          (*(reg32_t *)(TMR0_BASE_ADDR + 0x1C))
00555 #define T0MR2          (*(reg32_t *)(TMR0_BASE_ADDR + 0x20))
00556 #define T0MR3          (*(reg32_t *)(TMR0_BASE_ADDR + 0x24))
00557 #define T0CCR          (*(reg32_t *)(TMR0_BASE_ADDR + 0x28))
00558 #define T0CR0          (*(reg32_t *)(TMR0_BASE_ADDR + 0x2C))
00559 #define T0CR1          (*(reg32_t *)(TMR0_BASE_ADDR + 0x30))
00560 #define T0CR2          (*(reg32_t *)(TMR0_BASE_ADDR + 0x34))
00561 #define T0CR3          (*(reg32_t *)(TMR0_BASE_ADDR + 0x38))
00562 #define T0EMR          (*(reg32_t *)(TMR0_BASE_ADDR + 0x3C))
00563 #define T0CTCR         (*(reg32_t *)(TMR0_BASE_ADDR + 0x70))
00564
00565 /* Timer 1 */
00566 #define TMR1_BASE_ADDR      0xE0008000
00567 #define T1IR           (*(reg32_t *)(TMR1_BASE_ADDR + 0x00))
00568 #define T1TCR          (*(reg32_t *)(TMR1_BASE_ADDR + 0x04))
00569 #define T1TC           (*(reg32_t *)(TMR1_BASE_ADDR + 0x08))
00570 #define T1PR           (*(reg32_t *)(TMR1_BASE_ADDR + 0x0C))
00571 #define T1PC           (*(reg32_t *)(TMR1_BASE_ADDR + 0x10))
00572 #define T1MCR          (*(reg32_t *)(TMR1_BASE_ADDR + 0x14))
00573 #define T1MR0          (*(reg32_t *)(TMR1_BASE_ADDR + 0x18))
00574 #define T1MR1          (*(reg32_t *)(TMR1_BASE_ADDR + 0x1C))
00575 #define T1MR2          (*(reg32_t *)(TMR1_BASE_ADDR + 0x20))
00576 #define T1MR3          (*(reg32_t *)(TMR1_BASE_ADDR + 0x24))
00577 #define T1CCR          (*(reg32_t *)(TMR1_BASE_ADDR + 0x28))
00578 #define T1CR0          (*(reg32_t *)(TMR1_BASE_ADDR + 0x2C))
00579 #define T1CR1          (*(reg32_t *)(TMR1_BASE_ADDR + 0x30))
00580 #define T1CR2          (*(reg32_t *)(TMR1_BASE_ADDR + 0x34))
00581 #define T1CR3          (*(reg32_t *)(TMR1_BASE_ADDR + 0x38))
00582 #define T1EMR          (*(reg32_t *)(TMR1_BASE_ADDR + 0x3C))
00583 #define T1CTCR         (*(reg32_t *)(TMR1_BASE_ADDR + 0x70))
00584
00585 /* Timer 2 */
00586 #define TMR2_BASE_ADDR      0xE0070000
00587 #define T2IR           (*(reg32_t *)(TMR2_BASE_ADDR + 0x00))
00588 #define T2TCR          (*(reg32_t *)(TMR2_BASE_ADDR + 0x04))
00589 #define T2TC           (*(reg32_t *)(TMR2_BASE_ADDR + 0x08))
00590 #define T2PR           (*(reg32_t *)(TMR2_BASE_ADDR + 0x0C))
00591 #define T2PC           (*(reg32_t *)(TMR2_BASE_ADDR + 0x10))
00592 #define T2MCR          (*(reg32_t *)(TMR2_BASE_ADDR + 0x14))
00593 #define T2MR0          (*(reg32_t *)(TMR2_BASE_ADDR + 0x18))
00594 #define T2MR1          (*(reg32_t *)(TMR2_BASE_ADDR + 0x1C))
00595 #define T2MR2          (*(reg32_t *)(TMR2_BASE_ADDR + 0x20))
00596 #define T2MR3          (*(reg32_t *)(TMR2_BASE_ADDR + 0x24))
00597 #define T2CCR          (*(reg32_t *)(TMR2_BASE_ADDR + 0x28))
00598 #define T2CR0          (*(reg32_t *)(TMR2_BASE_ADDR + 0x2C))
00599 #define T2CR1          (*(reg32_t *)(TMR2_BASE_ADDR + 0x30))
00600 #define T2CR2          (*(reg32_t *)(TMR2_BASE_ADDR + 0x34))
00601 #define T2CR3          (*(reg32_t *)(TMR2_BASE_ADDR + 0x38))
00602 #define T2EMR          (*(reg32_t *)(TMR2_BASE_ADDR + 0x3C))
00603 #define T2CTCR         (*(reg32_t *)(TMR2_BASE_ADDR + 0x70))
00604
00605 /* Timer 3 */
00606 #define TMR3_BASE_ADDR      0xE0074000
00607 #define T3IR           (*(reg32_t *)(TMR3_BASE_ADDR + 0x00))
00608 #define T3TCR          (*(reg32_t *)(TMR3_BASE_ADDR + 0x04))
00609 #define T3TC           (*(reg32_t *)(TMR3_BASE_ADDR + 0x08))
00610 #define T3PR           (*(reg32_t *)(TMR3_BASE_ADDR + 0x0C))
00611 #define T3PC           (*(reg32_t *)(TMR3_BASE_ADDR + 0x10))
00612 #define T3MCR          (*(reg32_t *)(TMR3_BASE_ADDR + 0x14))
00613 #define T3MR0          (*(reg32_t *)(TMR3_BASE_ADDR + 0x18))
00614 #define T3MR1          (*(reg32_t *)(TMR3_BASE_ADDR + 0x1C))
00615 #define T3MR2          (*(reg32_t *)(TMR3_BASE_ADDR + 0x20))
00616 #define T3MR3          (*(reg32_t *)(TMR3_BASE_ADDR + 0x24))
00617 #define T3CCR          (*(reg32_t *)(TMR3_BASE_ADDR + 0x28))
00618 #define T3CR0          (*(reg32_t *)(TMR3_BASE_ADDR + 0x2C))
00619 #define T3CR1          (*(reg32_t *)(TMR3_BASE_ADDR + 0x30))
00620 #define T3CR2          (*(reg32_t *)(TMR3_BASE_ADDR + 0x34))
00621 #define T3CR3          (*(reg32_t *)(TMR3_BASE_ADDR + 0x38))
00622 #define T3EMR          (*(reg32_t *)(TMR3_BASE_ADDR + 0x3C))
00623 #define T3CTCR         (*(reg32_t *)(TMR3_BASE_ADDR + 0x70))
00624
00625
00626 /* Pulse Width Modulator (PWM) */
00627 #define PWM0_BASE_ADDR      0xE0014000
00628 #define PWM0IR          (*(reg32_t *)(PWM0_BASE_ADDR + 0x00))
00629 #define PWM0TCR         (*(reg32_t *)(PWM0_BASE_ADDR + 0x04))
00630 #define PWM0TC          (*(reg32_t *)(PWM0_BASE_ADDR + 0x08))
00631 #define PWM0PR          (*(reg32_t *)(PWM0_BASE_ADDR + 0x0C))
00632 #define PWM0PC          (*(reg32_t *)(PWM0_BASE_ADDR + 0x10))
00633 #define PWM0MCR         (*(reg32_t *)(PWM0_BASE_ADDR + 0x14))
00634 #define PWM0MR0         (*(reg32_t *)(PWM0_BASE_ADDR + 0x18))
00635 #define PWM0MR1         (*(reg32_t *)(PWM0_BASE_ADDR + 0x1C))
00636 #define PWM0MR2         (*(reg32_t *)(PWM0_BASE_ADDR + 0x20))
00637 #define PWM0MR3         (*(reg32_t *)(PWM0_BASE_ADDR + 0x24))
00638 #define PWM0CCR         (*(reg32_t *)(PWM0_BASE_ADDR + 0x28))
00639 #define PWM0CR0         (*(reg32_t *)(PWM0_BASE_ADDR + 0x2C))
00640 #define PWM0CR1         (*(reg32_t *)(PWM0_BASE_ADDR + 0x30))
00641 #define PWM0CR2         (*(reg32_t *)(PWM0_BASE_ADDR + 0x34))
00642 #define PWM0CR3         (*(reg32_t *)(PWM0_BASE_ADDR + 0x38))
00643 #define PWM0EMR         (*(reg32_t *)(PWM0_BASE_ADDR + 0x3C))
00644 #define PWM0MR4         (*(reg32_t *)(PWM0_BASE_ADDR + 0x40))
00645 #define PWM0MR5         (*(reg32_t *)(PWM0_BASE_ADDR + 0x44))
00646 #define PWM0MR6         (*(reg32_t *)(PWM0_BASE_ADDR + 0x48))
00647 #define PWM0PCR         (*(reg32_t *)(PWM0_BASE_ADDR + 0x4C))
00648 #define PWM0LER         (*(reg32_t *)(PWM0_BASE_ADDR + 0x50))
00649 #define PWM0CTCR        (*(reg32_t *)(PWM0_BASE_ADDR + 0x70))
00650
00651 #define PWM1_BASE_ADDR      0xE0018000
00652 #define PWM1IR          (*(reg32_t *)(PWM1_BASE_ADDR + 0x00))
00653 #define PWM1TCR         (*(reg32_t *)(PWM1_BASE_ADDR + 0x04))
00654 #define PWM1TC          (*(reg32_t *)(PWM1_BASE_ADDR + 0x08))
00655 #define PWM1PR          (*(reg32_t *)(PWM1_BASE_ADDR + 0x0C))
00656 #define PWM1PC          (*(reg32_t *)(PWM1_BASE_ADDR + 0x10))
00657 #define PWM1MCR         (*(reg32_t *)(PWM1_BASE_ADDR + 0x14))
00658 #define PWM1MR0         (*(reg32_t *)(PWM1_BASE_ADDR + 0x18))
00659 #define PWM1MR1         (*(reg32_t *)(PWM1_BASE_ADDR + 0x1C))
00660 #define PWM1MR2         (*(reg32_t *)(PWM1_BASE_ADDR + 0x20))
00661 #define PWM1MR3         (*(reg32_t *)(PWM1_BASE_ADDR + 0x24))
00662 #define PWM1CCR         (*(reg32_t *)(PWM1_BASE_ADDR + 0x28))
00663 #define PWM1CR0         (*(reg32_t *)(PWM1_BASE_ADDR + 0x2C))
00664 #define PWM1CR1         (*(reg32_t *)(PWM1_BASE_ADDR + 0x30))
00665 #define PWM1CR2         (*(reg32_t *)(PWM1_BASE_ADDR + 0x34))
00666 #define PWM1CR3         (*(reg32_t *)(PWM1_BASE_ADDR + 0x38))
00667 #define PWM1EMR         (*(reg32_t *)(PWM1_BASE_ADDR + 0x3C))
00668 #define PWM1MR4         (*(reg32_t *)(PWM1_BASE_ADDR + 0x40))
00669 #define PWM1MR5         (*(reg32_t *)(PWM1_BASE_ADDR + 0x44))
00670 #define PWM1MR6         (*(reg32_t *)(PWM1_BASE_ADDR + 0x48))
00671 #define PWM1PCR         (*(reg32_t *)(PWM1_BASE_ADDR + 0x4C))
00672 #define PWM1LER         (*(reg32_t *)(PWM1_BASE_ADDR + 0x50))
00673 #define PWM1CTCR        (*(reg32_t *)(PWM1_BASE_ADDR + 0x70))
00674
00675
00676 /* Universal Asynchronous Receiver Transmitter 0 (UART0) */
00677 #define UART0_BASE_ADDR     0xE000C000
00678 #define U0RBR          (*(reg32_t *)(UART0_BASE_ADDR + 0x00))
00679 #define U0THR          (*(reg32_t *)(UART0_BASE_ADDR + 0x00))
00680 #define U0DLL          (*(reg32_t *)(UART0_BASE_ADDR + 0x00))
00681 #define U0DLM          (*(reg32_t *)(UART0_BASE_ADDR + 0x04))
00682 #define U0IER          (*(reg32_t *)(UART0_BASE_ADDR + 0x04))
00683 #define U0IIR          (*(reg32_t *)(UART0_BASE_ADDR + 0x08))
00684 #define U0FCR          (*(reg32_t *)(UART0_BASE_ADDR + 0x08))
00685 #define U0LCR          (*(reg32_t *)(UART0_BASE_ADDR + 0x0C))
00686 #define U0LSR          (*(reg32_t *)(UART0_BASE_ADDR + 0x14))
00687 #define U0SCR          (*(reg32_t *)(UART0_BASE_ADDR + 0x1C))
00688 #define U0ACR          (*(reg32_t *)(UART0_BASE_ADDR + 0x20))
00689 #define U0ICR          (*(reg32_t *)(UART0_BASE_ADDR + 0x24))
00690 #define U0FDR          (*(reg32_t *)(UART0_BASE_ADDR + 0x28))
00691 #define U0TER          (*(reg32_t *)(UART0_BASE_ADDR + 0x30))
00692
00693 /* Universal Asynchronous Receiver Transmitter 1 (UART1) */
00694 #define UART1_BASE_ADDR     0xE0010000
00695 #define U1RBR          (*(reg32_t *)(UART1_BASE_ADDR + 0x00))
00696 #define U1THR          (*(reg32_t *)(UART1_BASE_ADDR + 0x00))
00697 #define U1DLL          (*(reg32_t *)(UART1_BASE_ADDR + 0x00))
00698 #define U1DLM          (*(reg32_t *)(UART1_BASE_ADDR + 0x04))
00699 #define U1IER          (*(reg32_t *)(UART1_BASE_ADDR + 0x04))
00700 #define U1IIR          (*(reg32_t *)(UART1_BASE_ADDR + 0x08))
00701 #define U1FCR          (*(reg32_t *)(UART1_BASE_ADDR + 0x08))
00702 #define U1LCR          (*(reg32_t *)(UART1_BASE_ADDR + 0x0C))
00703 #define U1MCR          (*(reg32_t *)(UART1_BASE_ADDR + 0x10))
00704 #define U1LSR          (*(reg32_t *)(UART1_BASE_ADDR + 0x14))
00705 #define U1MSR          (*(reg32_t *)(UART1_BASE_ADDR + 0x18))
00706 #define U1SCR          (*(reg32_t *)(UART1_BASE_ADDR + 0x1C))
00707 #define U1ACR          (*(reg32_t *)(UART1_BASE_ADDR + 0x20))
00708 #define U1FDR          (*(reg32_t *)(UART1_BASE_ADDR + 0x28))
00709 #define U1TER          (*(reg32_t *)(UART1_BASE_ADDR + 0x30))
00710
00711 /* Universal Asynchronous Receiver Transmitter 2 (UART2) */
00712 #define UART2_BASE_ADDR     0xE0078000
00713 #define U2RBR          (*(reg32_t *)(UART2_BASE_ADDR + 0x00))
00714 #define U2THR          (*(reg32_t *)(UART2_BASE_ADDR + 0x00))
00715 #define U2DLL          (*(reg32_t *)(UART2_BASE_ADDR + 0x00))
00716 #define U2DLM          (*(reg32_t *)(UART2_BASE_ADDR + 0x04))
00717 #define U2IER          (*(reg32_t *)(UART2_BASE_ADDR + 0x04))
00718 #define U2IIR          (*(reg32_t *)(UART2_BASE_ADDR + 0x08))
00719 #define U2FCR          (*(reg32_t *)(UART2_BASE_ADDR + 0x08))
00720 #define U2LCR          (*(reg32_t *)(UART2_BASE_ADDR + 0x0C))
00721 #define U2LSR          (*(reg32_t *)(UART2_BASE_ADDR + 0x14))
00722 #define U2SCR          (*(reg32_t *)(UART2_BASE_ADDR + 0x1C))
00723 #define U2ACR          (*(reg32_t *)(UART2_BASE_ADDR + 0x20))
00724 #define U2ICR          (*(reg32_t *)(UART2_BASE_ADDR + 0x24))
00725 #define U2FDR          (*(reg32_t *)(UART2_BASE_ADDR + 0x28))
00726 #define U2TER          (*(reg32_t *)(UART2_BASE_ADDR + 0x30))
00727
00728 /* Universal Asynchronous Receiver Transmitter 3 (UART3) */
00729 #define UART3_BASE_ADDR     0xE007C000
00730 #define U3RBR          (*(reg32_t *)(UART3_BASE_ADDR + 0x00))
00731 #define U3THR          (*(reg32_t *)(UART3_BASE_ADDR + 0x00))
00732 #define U3DLL          (*(reg32_t *)(UART3_BASE_ADDR + 0x00))
00733 #define U3DLM          (*(reg32_t *)(UART3_BASE_ADDR + 0x04))
00734 #define U3IER          (*(reg32_t *)(UART3_BASE_ADDR + 0x04))
00735 #define U3IIR          (*(reg32_t *)(UART3_BASE_ADDR + 0x08))
00736 #define U3FCR          (*(reg32_t *)(UART3_BASE_ADDR + 0x08))
00737 #define U3LCR          (*(reg32_t *)(UART3_BASE_ADDR + 0x0C))
00738 #define U3LSR          (*(reg32_t *)(UART3_BASE_ADDR + 0x14))
00739 #define U3SCR          (*(reg32_t *)(UART3_BASE_ADDR + 0x1C))
00740 #define U3ACR          (*(reg32_t *)(UART3_BASE_ADDR + 0x20))
00741 #define U3ICR          (*(reg32_t *)(UART3_BASE_ADDR + 0x24))
00742 #define U3FDR          (*(reg32_t *)(UART3_BASE_ADDR + 0x28))
00743 #define U3TER          (*(reg32_t *)(UART3_BASE_ADDR + 0x30))
00744
00745 /* I2C Interface 0 */
00746 #define I2C0_BASE_ADDR 0xE001C000
00747 #define I20CONSET      (*(reg32_t *)(I2C0_BASE_ADDR + 0x00))
00748 #define I20STAT        (*(reg32_t *)(I2C0_BASE_ADDR + 0x04))
00749 #define I20DAT         (*(reg32_t *)(I2C0_BASE_ADDR + 0x08))
00750 #define I20ADR         (*(reg32_t *)(I2C0_BASE_ADDR + 0x0C))
00751 #define I20SCLH        (*(reg32_t *)(I2C0_BASE_ADDR + 0x10))
00752 #define I20SCLL        (*(reg32_t *)(I2C0_BASE_ADDR + 0x14))
00753 #define I20CONCLR      (*(reg32_t *)(I2C0_BASE_ADDR + 0x18))
00754
00755 /* I2C Interface 1 */
00756 #define I2C1_BASE_ADDR 0xE005C000
00757 #define I21CONSET      (*(reg32_t *)(I2C1_BASE_ADDR + 0x00))
00758 #define I21STAT        (*(reg32_t *)(I2C1_BASE_ADDR + 0x04))
00759 #define I21DAT         (*(reg32_t *)(I2C1_BASE_ADDR + 0x08))
00760 #define I21ADR         (*(reg32_t *)(I2C1_BASE_ADDR + 0x0C))
00761 #define I21SCLH        (*(reg32_t *)(I2C1_BASE_ADDR + 0x10))
00762 #define I21SCLL        (*(reg32_t *)(I2C1_BASE_ADDR + 0x14))
00763 #define I21CONCLR      (*(reg32_t *)(I2C1_BASE_ADDR + 0x18))
00764
00765 /* I2C Interface 2 */
00766 #define I2C2_BASE_ADDR 0xE0080000
00767 #define I22CONSET      (*(reg32_t *)(I2C2_BASE_ADDR + 0x00))
00768 #define I22STAT        (*(reg32_t *)(I2C2_BASE_ADDR + 0x04))
00769 #define I22DAT         (*(reg32_t *)(I2C2_BASE_ADDR + 0x08))
00770 #define I22ADR         (*(reg32_t *)(I2C2_BASE_ADDR + 0x0C))
00771 #define I22SCLH        (*(reg32_t *)(I2C2_BASE_ADDR + 0x10))
00772 #define I22SCLL        (*(reg32_t *)(I2C2_BASE_ADDR + 0x14))
00773 #define I22CONCLR      (*(reg32_t *)(I2C2_BASE_ADDR + 0x18))
00774
00775 /* I2C offesets */
00776 #define I2C_CONSET_OFF      0x00
00777 #define I2C_STAT_OFF        0x04
00778 #define I2C_DAT_OFF         0x08
00779 #define I2C_ADR_OFF         0x0C
00780 #define I2C_SCLH_OFF        0x10
00781 #define I2C_SCLL_OFF        0x14
00782 #define I2C_CONCLR_OFF      0x18
00783
00784 /* I2C register definition Clear */
00785 #define I2CON_I2ENC                                        6 // I2C interface Disable bit
00786 #define I2CON_STAC                                         5 // START flag Clear bit
00787 #define I2CON_SIC                                          3 // I2C interrupt Clear bit
00788 #define I2CON_AAC                                          2 // Assert acknowledge Clear bit
00789
00790 /* I2C register definition Set */
00791 #define I2CON_I2EN                                         6 // I2C interface enable
00792 #define I2CON_STA                                          5 // START flag Clear bit
00793 #define I2CON_STO                                          4 // STOP flag Clear bit
00794 #define I2CON_SI                                           3 // I2C interrupt Clear bit
00795 #define I2CON_AA                                           2 // Assert acknowledge Clear bit
00796
00797 /* I2C Status codes */
00798 #define I2C_STAT_ERROR                                  0x00
00799 #define I2C_STAT_UNKNOW                                 0xF8
00800 #define I2C_STAT_SEND                                   0x08
00801 #define I2C_STAT_RESEND                                 0x10
00802 #define I2C_STAT_SLAW_ACK                               0x18
00803 #define I2C_STAT_SLAW_NACK                              0x20
00804 #define I2C_STAT_SLAR_ACK                               0x40
00805 #define I2C_STAT_SLAR_NACK                              0x48
00806 #define I2C_STAT_DATA_ACK                               0x28
00807 #define I2C_STAT_DATA_NACK                              0x30
00808 #define I2C_STAT_RDATA_ACK                              0x50
00809 #define I2C_STAT_RDATA_NACK                             0x58
00810 #define I2C_STAT_ARB_LOST                               0x38
00811
00812 #define I2C0_PCLK_MASK                                0xC000
00813 #define I2C0_PCLK_DIV8                                0xC000
00814 #define I2C0_PCLK_DIV4                                0x4000
00815 #define I2C1_PCLK_MASK                                0x00C0
00816 #define I2C1_PCLK_DIV8                                0x00C0
00817 #define I2C1_PCLK_DIV4                                0x0040
00818 #define I2C2_PCLK_MASK                              0x300000
00819 #define I2C2_PCLK_DIV8                              0x300000
00820 #define I2C2_PCLK_DIV4                              0x100000
00821
00822 /* I2C pins defines */
00823 #define I2C0_PINSEL_MASK                           0x3C00000
00824 #define I2C0_PINSEL                                0x1400000
00825 #define I2C1_PINSEL_MASK                           0x000000F
00826 #define I2C1_PINSEL                                0x000000F
00827 #define I2C2_PINSEL_MASK                           0x0F00000
00828 #define I2C2_PINSEL                                0x0A00000
00829
00830 /* SPI0 (Serial Peripheral Interface 0) */
00831 #define SPI0_BASE_ADDR      0xE0020000
00832 #define S0SPCR         (*(reg32_t *)(SPI0_BASE_ADDR + 0x00))
00833 #define S0SPSR         (*(reg32_t *)(SPI0_BASE_ADDR + 0x04))
00834 #define S0SPDR         (*(reg32_t *)(SPI0_BASE_ADDR + 0x08))
00835 #define S0SPCCR        (*(reg32_t *)(SPI0_BASE_ADDR + 0x0C))
00836 #define S0SPINT        (*(reg32_t *)(SPI0_BASE_ADDR + 0x1C))
00837
00838 /* SSP0 Controller */
00839 #define SSP0_BASE_ADDR      0xE0068000
00840 #define SSP0CR0        (*(reg32_t *)(SSP0_BASE_ADDR + 0x00))
00841 #define SSP0CR1        (*(reg32_t *)(SSP0_BASE_ADDR + 0x04))
00842 #define SSP0DR         (*(reg32_t *)(SSP0_BASE_ADDR + 0x08))
00843 #define SSP0SR         (*(reg32_t *)(SSP0_BASE_ADDR + 0x0C))
00844 #define SSP0CPSR       (*(reg32_t *)(SSP0_BASE_ADDR + 0x10))
00845 #define SSP0IMSC       (*(reg32_t *)(SSP0_BASE_ADDR + 0x14))
00846 #define SSP0RIS        (*(reg32_t *)(SSP0_BASE_ADDR + 0x18))
00847 #define SSP0MIS        (*(reg32_t *)(SSP0_BASE_ADDR + 0x1C))
00848 #define SSP0ICR        (*(reg32_t *)(SSP0_BASE_ADDR + 0x20))
00849 #define SSP0DMACR      (*(reg32_t *)(SSP0_BASE_ADDR + 0x24))
00850
00851 /* SSP1 Controller */
00852 #define SSP1_BASE_ADDR      0xE0030000
00853 #define SSP1CR0        (*(reg32_t *)(SSP1_BASE_ADDR + 0x00))
00854 #define SSP1CR1        (*(reg32_t *)(SSP1_BASE_ADDR + 0x04))
00855 #define SSP1DR         (*(reg32_t *)(SSP1_BASE_ADDR + 0x08))
00856 #define SSP1SR         (*(reg32_t *)(SSP1_BASE_ADDR + 0x0C))
00857 #define SSP1CPSR       (*(reg32_t *)(SSP1_BASE_ADDR + 0x10))
00858 #define SSP1IMSC       (*(reg32_t *)(SSP1_BASE_ADDR + 0x14))
00859 #define SSP1RIS        (*(reg32_t *)(SSP1_BASE_ADDR + 0x18))
00860 #define SSP1MIS        (*(reg32_t *)(SSP1_BASE_ADDR + 0x1C))
00861 #define SSP1ICR        (*(reg32_t *)(SSP1_BASE_ADDR + 0x20))
00862 #define SSP1DMACR      (*(reg32_t *)(SSP1_BASE_ADDR + 0x24))
00863
00864
00865 /* Real Time Clock */
00866 #define RTC_BASE_ADDR       0xE0024000
00867 #define RTC_ILR         (*(reg32_t *)(RTC_BASE_ADDR + 0x00))
00868 #define RTC_CTC         (*(reg32_t *)(RTC_BASE_ADDR + 0x04))
00869 #define RTC_CCR         (*(reg32_t *)(RTC_BASE_ADDR + 0x08))
00870 #define RTC_CIIR        (*(reg32_t *)(RTC_BASE_ADDR + 0x0C))
00871 #define RTC_AMR         (*(reg32_t *)(RTC_BASE_ADDR + 0x10))
00872 #define RTC_CTIME0      (*(reg32_t *)(RTC_BASE_ADDR + 0x14))
00873 #define RTC_CTIME1      (*(reg32_t *)(RTC_BASE_ADDR + 0x18))
00874 #define RTC_CTIME2      (*(reg32_t *)(RTC_BASE_ADDR + 0x1C))
00875 #define RTC_SEC         (*(reg32_t *)(RTC_BASE_ADDR + 0x20))
00876 #define RTC_MIN         (*(reg32_t *)(RTC_BASE_ADDR + 0x24))
00877 #define RTC_HOUR        (*(reg32_t *)(RTC_BASE_ADDR + 0x28))
00878 #define RTC_DOM         (*(reg32_t *)(RTC_BASE_ADDR + 0x2C))
00879 #define RTC_DOW         (*(reg32_t *)(RTC_BASE_ADDR + 0x30))
00880 #define RTC_DOY         (*(reg32_t *)(RTC_BASE_ADDR + 0x34))
00881 #define RTC_MONTH       (*(reg32_t *)(RTC_BASE_ADDR + 0x38))
00882 #define RTC_YEAR        (*(reg32_t *)(RTC_BASE_ADDR + 0x3C))
00883 #define RTC_CISS        (*(reg32_t *)(RTC_BASE_ADDR + 0x40))
00884 #define RTC_ALSEC       (*(reg32_t *)(RTC_BASE_ADDR + 0x60))
00885 #define RTC_ALMIN       (*(reg32_t *)(RTC_BASE_ADDR + 0x64))
00886 #define RTC_ALHOUR      (*(reg32_t *)(RTC_BASE_ADDR + 0x68))
00887 #define RTC_ALDOM       (*(reg32_t *)(RTC_BASE_ADDR + 0x6C))
00888 #define RTC_ALDOW       (*(reg32_t *)(RTC_BASE_ADDR + 0x70))
00889 #define RTC_ALDOY       (*(reg32_t *)(RTC_BASE_ADDR + 0x74))
00890 #define RTC_ALMON       (*(reg32_t *)(RTC_BASE_ADDR + 0x78))
00891 #define RTC_ALYEAR      (*(reg32_t *)(RTC_BASE_ADDR + 0x7C))
00892 #define RTC_PREINT      (*(reg32_t *)(RTC_BASE_ADDR + 0x80))
00893 #define RTC_PREFRAC     (*(reg32_t *)(RTC_BASE_ADDR + 0x84))
00894
00895
00896 /* A/D Converter 0 (AD0) */
00897 #define AD0_BASE_ADDR       0xE0034000
00898 #define AD0CR          (*(reg32_t *)(AD0_BASE_ADDR + 0x00))
00899 #define AD0GDR         (*(reg32_t *)(AD0_BASE_ADDR + 0x04))
00900 #define AD0INTEN       (*(reg32_t *)(AD0_BASE_ADDR + 0x0C))
00901 #define AD0DR0         (*(reg32_t *)(AD0_BASE_ADDR + 0x10))
00902 #define AD0DR1         (*(reg32_t *)(AD0_BASE_ADDR + 0x14))
00903 #define AD0DR2         (*(reg32_t *)(AD0_BASE_ADDR + 0x18))
00904 #define AD0DR3         (*(reg32_t *)(AD0_BASE_ADDR + 0x1C))
00905 #define AD0DR4         (*(reg32_t *)(AD0_BASE_ADDR + 0x20))
00906 #define AD0DR5         (*(reg32_t *)(AD0_BASE_ADDR + 0x24))
00907 #define AD0DR6         (*(reg32_t *)(AD0_BASE_ADDR + 0x28))
00908 #define AD0DR7         (*(reg32_t *)(AD0_BASE_ADDR + 0x2C))
00909 #define AD0STAT        (*(reg32_t *)(AD0_BASE_ADDR + 0x30))
00910
00911
00912 /* D/A Converter */
00913 #define DAC_BASE_ADDR       0xE006C000
00914 #define DACR           (*(reg32_t *)(DAC_BASE_ADDR + 0x00))
00915
00916
00917 /* Watchdog */
00918 #define WDG_BASE_ADDR       0xE0000000
00919 #define WDMOD          (*(reg32_t *)(WDG_BASE_ADDR + 0x00))
00920 #define WDTC           (*(reg32_t *)(WDG_BASE_ADDR + 0x04))
00921 #define WDFEED         (*(reg32_t *)(WDG_BASE_ADDR + 0x08))
00922 #define WDTV           (*(reg32_t *)(WDG_BASE_ADDR + 0x0C))
00923 #define WDCLKSEL       (*(reg32_t *)(WDG_BASE_ADDR + 0x10))
00924
00925 /* CAN CONTROLLERS AND ACCEPTANCE FILTER */
00926 #define CAN_ACCEPT_BASE_ADDR        0xE003C000
00927 #define CAN_AFMR        (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x00))
00928 #define CAN_SFF_SA      (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x04))
00929 #define CAN_SFF_GRP_SA  (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x08))
00930 #define CAN_EFF_SA      (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x0C))
00931 #define CAN_EFF_GRP_SA  (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x10))
00932 #define CAN_EOT         (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x14))
00933 #define CAN_LUT_ERR_ADR (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x18))
00934 #define CAN_LUT_ERR     (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x1C))
00935
00936 #define CAN_CENTRAL_BASE_ADDR       0xE0040000
00937 #define CAN_TX_SR   (*(reg32_t *)(CAN_CENTRAL_BASE_ADDR + 0x00))
00938 #define CAN_RX_SR   (*(reg32_t *)(CAN_CENTRAL_BASE_ADDR + 0x04))
00939 #define CAN_MSR     (*(reg32_t *)(CAN_CENTRAL_BASE_ADDR + 0x08))
00940
00941 #define CAN1_BASE_ADDR      0xE0044000
00942 #define CAN1MOD     (*(reg32_t *)(CAN1_BASE_ADDR + 0x00))
00943 #define CAN1CMR     (*(reg32_t *)(CAN1_BASE_ADDR + 0x04))
00944 #define CAN1GSR     (*(reg32_t *)(CAN1_BASE_ADDR + 0x08))
00945 #define CAN1ICR     (*(reg32_t *)(CAN1_BASE_ADDR + 0x0C))
00946 #define CAN1IER     (*(reg32_t *)(CAN1_BASE_ADDR + 0x10))
00947 #define CAN1BTR     (*(reg32_t *)(CAN1_BASE_ADDR + 0x14))
00948 #define CAN1EWL     (*(reg32_t *)(CAN1_BASE_ADDR + 0x18))
00949 #define CAN1SR      (*(reg32_t *)(CAN1_BASE_ADDR + 0x1C))
00950 #define CAN1RFS     (*(reg32_t *)(CAN1_BASE_ADDR + 0x20))
00951 #define CAN1RID     (*(reg32_t *)(CAN1_BASE_ADDR + 0x24))
00952 #define CAN1RDA     (*(reg32_t *)(CAN1_BASE_ADDR + 0x28))
00953 #define CAN1RDB     (*(reg32_t *)(CAN1_BASE_ADDR + 0x2C))
00954
00955 #define CAN1TFI1    (*(reg32_t *)(CAN1_BASE_ADDR + 0x30))
00956 #define CAN1TID1    (*(reg32_t *)(CAN1_BASE_ADDR + 0x34))
00957 #define CAN1TDA1    (*(reg32_t *)(CAN1_BASE_ADDR + 0x38))
00958 #define CAN1TDB1    (*(reg32_t *)(CAN1_BASE_ADDR + 0x3C))
00959 #define CAN1TFI2    (*(reg32_t *)(CAN1_BASE_ADDR + 0x40))
00960 #define CAN1TID2    (*(reg32_t *)(CAN1_BASE_ADDR + 0x44))
00961 #define CAN1TDA2    (*(reg32_t *)(CAN1_BASE_ADDR + 0x48))
00962 #define CAN1TDB2    (*(reg32_t *)(CAN1_BASE_ADDR + 0x4C))
00963 #define CAN1TFI3    (*(reg32_t *)(CAN1_BASE_ADDR + 0x50))
00964 #define CAN1TID3    (*(reg32_t *)(CAN1_BASE_ADDR + 0x54))
00965 #define CAN1TDA3    (*(reg32_t *)(CAN1_BASE_ADDR + 0x58))
00966 #define CAN1TDB3    (*(reg32_t *)(CAN1_BASE_ADDR + 0x5C))
00967
00968 #define CAN2_BASE_ADDR      0xE0048000
00969 #define CAN2MOD     (*(reg32_t *)(CAN2_BASE_ADDR + 0x00))
00970 #define CAN2CMR     (*(reg32_t *)(CAN2_BASE_ADDR + 0x04))
00971 #define CAN2GSR     (*(reg32_t *)(CAN2_BASE_ADDR + 0x08))
00972 #define CAN2ICR     (*(reg32_t *)(CAN2_BASE_ADDR + 0x0C))
00973 #define CAN2IER     (*(reg32_t *)(CAN2_BASE_ADDR + 0x10))
00974 #define CAN2BTR     (*(reg32_t *)(CAN2_BASE_ADDR + 0x14))
00975 #define CAN2EWL     (*(reg32_t *)(CAN2_BASE_ADDR + 0x18))
00976 #define CAN2SR      (*(reg32_t *)(CAN2_BASE_ADDR + 0x1C))
00977 #define CAN2RFS     (*(reg32_t *)(CAN2_BASE_ADDR + 0x20))
00978 #define CAN2RID     (*(reg32_t *)(CAN2_BASE_ADDR + 0x24))
00979 #define CAN2RDA     (*(reg32_t *)(CAN2_BASE_ADDR + 0x28))
00980 #define CAN2RDB     (*(reg32_t *)(CAN2_BASE_ADDR + 0x2C))
00981
00982 #define CAN2TFI1    (*(reg32_t *)(CAN2_BASE_ADDR + 0x30))
00983 #define CAN2TID1    (*(reg32_t *)(CAN2_BASE_ADDR + 0x34))
00984 #define CAN2TDA1    (*(reg32_t *)(CAN2_BASE_ADDR + 0x38))
00985 #define CAN2TDB1    (*(reg32_t *)(CAN2_BASE_ADDR + 0x3C))
00986 #define CAN2TFI2    (*(reg32_t *)(CAN2_BASE_ADDR + 0x40))
00987 #define CAN2TID2    (*(reg32_t *)(CAN2_BASE_ADDR + 0x44))
00988 #define CAN2TDA2    (*(reg32_t *)(CAN2_BASE_ADDR + 0x48))
00989 #define CAN2TDB2    (*(reg32_t *)(CAN2_BASE_ADDR + 0x4C))
00990 #define CAN2TFI3    (*(reg32_t *)(CAN2_BASE_ADDR + 0x50))
00991 #define CAN2TID3    (*(reg32_t *)(CAN2_BASE_ADDR + 0x54))
00992 #define CAN2TDA3    (*(reg32_t *)(CAN2_BASE_ADDR + 0x58))
00993 #define CAN2TDB3    (*(reg32_t *)(CAN2_BASE_ADDR + 0x5C))
00994
00995
00996 /* MultiMedia Card Interface(MCI) Controller */
00997 #define MCI_BASE_ADDR       0xE008C000
00998 #define MCI_POWER      (*(reg32_t *)(MCI_BASE_ADDR + 0x00))
00999 #define MCI_CLOCK      (*(reg32_t *)(MCI_BASE_ADDR + 0x04))
01000 #define MCI_ARGUMENT   (*(reg32_t *)(MCI_BASE_ADDR + 0x08))
01001 #define MCI_COMMAND    (*(reg32_t *)(MCI_BASE_ADDR + 0x0C))
01002 #define MCI_RESP_CMD   (*(reg32_t *)(MCI_BASE_ADDR + 0x10))
01003 #define MCI_RESP0      (*(reg32_t *)(MCI_BASE_ADDR + 0x14))
01004 #define MCI_RESP1      (*(reg32_t *)(MCI_BASE_ADDR + 0x18))
01005 #define MCI_RESP2      (*(reg32_t *)(MCI_BASE_ADDR + 0x1C))
01006 #define MCI_RESP3      (*(reg32_t *)(MCI_BASE_ADDR + 0x20))
01007 #define MCI_DATA_TMR   (*(reg32_t *)(MCI_BASE_ADDR + 0x24))
01008 #define MCI_DATA_LEN   (*(reg32_t *)(MCI_BASE_ADDR + 0x28))
01009 #define MCI_DATA_CTRL  (*(reg32_t *)(MCI_BASE_ADDR + 0x2C))
01010 #define MCI_DATA_CNT   (*(reg32_t *)(MCI_BASE_ADDR + 0x30))
01011 #define MCI_STATUS     (*(reg32_t *)(MCI_BASE_ADDR + 0x34))
01012 #define MCI_CLEAR      (*(reg32_t *)(MCI_BASE_ADDR + 0x38))
01013 #define MCI_MASK0      (*(reg32_t *)(MCI_BASE_ADDR + 0x3C))
01014 #define MCI_MASK1      (*(reg32_t *)(MCI_BASE_ADDR + 0x40))
01015 #define MCI_FIFO_CNT   (*(reg32_t *)(MCI_BASE_ADDR + 0x48))
01016 #define MCI_FIFO       (*(reg32_t *)(MCI_BASE_ADDR + 0x80))
01017
01018
01019 /* I2S Interface Controller (I2S) */
01020 #define I2S_BASE_ADDR       0xE0088000
01021 #define I2S_DAO        (*(reg32_t *)(I2S_BASE_ADDR + 0x00))
01022 #define I2S_DAI        (*(reg32_t *)(I2S_BASE_ADDR + 0x04))
01023 #define I2S_TX_FIFO    (*(reg32_t *)(I2S_BASE_ADDR + 0x08))
01024 #define I2S_RX_FIFO    (*(reg32_t *)(I2S_BASE_ADDR + 0x0C))
01025 #define I2S_STATE      (*(reg32_t *)(I2S_BASE_ADDR + 0x10))
01026 #define I2S_DMA1       (*(reg32_t *)(I2S_BASE_ADDR + 0x14))
01027 #define I2S_DMA2       (*(reg32_t *)(I2S_BASE_ADDR + 0x18))
01028 #define I2S_IRQ        (*(reg32_t *)(I2S_BASE_ADDR + 0x1C))
01029 #define I2S_TXRATE     (*(reg32_t *)(I2S_BASE_ADDR + 0x20))
01030 #define I2S_RXRATE     (*(reg32_t *)(I2S_BASE_ADDR + 0x24))
01031
01032
01033 /* General-purpose DMA Controller */
01034 #define DMA_BASE_ADDR       0xFFE04000
01035 #define GPDMA_INT_STAT         (*(reg32_t *)(DMA_BASE_ADDR + 0x000))
01036 #define GPDMA_INT_TCSTAT       (*(reg32_t *)(DMA_BASE_ADDR + 0x004))
01037 #define GPDMA_INT_TCCLR        (*(reg32_t *)(DMA_BASE_ADDR + 0x008))
01038 #define GPDMA_INT_ERR_STAT     (*(reg32_t *)(DMA_BASE_ADDR + 0x00C))
01039 #define GPDMA_INT_ERR_CLR      (*(reg32_t *)(DMA_BASE_ADDR + 0x010))
01040 #define GPDMA_RAW_INT_TCSTAT   (*(reg32_t *)(DMA_BASE_ADDR + 0x014))
01041 #define GPDMA_RAW_INT_ERR_STAT (*(reg32_t *)(DMA_BASE_ADDR + 0x018))
01042 #define GPDMA_ENABLED_CHNS     (*(reg32_t *)(DMA_BASE_ADDR + 0x01C))
01043 #define GPDMA_SOFT_BREQ        (*(reg32_t *)(DMA_BASE_ADDR + 0x020))
01044 #define GPDMA_SOFT_SREQ        (*(reg32_t *)(DMA_BASE_ADDR + 0x024))
01045 #define GPDMA_SOFT_LBREQ       (*(reg32_t *)(DMA_BASE_ADDR + 0x028))
01046 #define GPDMA_SOFT_LSREQ       (*(reg32_t *)(DMA_BASE_ADDR + 0x02C))
01047 #define GPDMA_CONFIG           (*(reg32_t *)(DMA_BASE_ADDR + 0x030))
01048 #define GPDMA_SYNC             (*(reg32_t *)(DMA_BASE_ADDR + 0x034))
01049
01050 /* DMA channel 0 registers */
01051 #define GPDMA_CH0_SRC      (*(reg32_t *)(DMA_BASE_ADDR + 0x100))
01052 #define GPDMA_CH0_DEST     (*(reg32_t *)(DMA_BASE_ADDR + 0x104))
01053 #define GPDMA_CH0_LLI      (*(reg32_t *)(DMA_BASE_ADDR + 0x108))
01054 #define GPDMA_CH0_CTRL     (*(reg32_t *)(DMA_BASE_ADDR + 0x10C))
01055 #define GPDMA_CH0_CFG      (*(reg32_t *)(DMA_BASE_ADDR + 0x110))
01056
01057 /* DMA channel 1 registers */
01058 #define GPDMA_CH1_SRC      (*(reg32_t *)(DMA_BASE_ADDR + 0x120))
01059 #define GPDMA_CH1_DEST     (*(reg32_t *)(DMA_BASE_ADDR + 0x124))
01060 #define GPDMA_CH1_LLI      (*(reg32_t *)(DMA_BASE_ADDR + 0x128))
01061 #define GPDMA_CH1_CTRL     (*(reg32_t *)(DMA_BASE_ADDR + 0x12C))
01062 #define GPDMA_CH1_CFG      (*(reg32_t *)(DMA_BASE_ADDR + 0x130))
01063
01064
01065 /* USB Controller */
01066 #define USB_INT_BASE_ADDR   0xE01FC1C0
01067 #define USB_BASE_ADDR       0xFFE0C200      /* USB Base Address */
01068
01069 #define USB_INT_STAT    (*(reg32_t *)(USB_INT_BASE_ADDR + 0x00))
01070
01071 /* USB Device Interrupt Registers */
01072 #define DEV_INT_STAT    (*(reg32_t *)(USB_BASE_ADDR + 0x00))
01073 #define DEV_INT_EN      (*(reg32_t *)(USB_BASE_ADDR + 0x04))
01074 #define DEV_INT_CLR     (*(reg32_t *)(USB_BASE_ADDR + 0x08))
01075 #define DEV_INT_SET     (*(reg32_t *)(USB_BASE_ADDR + 0x0C))
01076 #define DEV_INT_PRIO    (*(reg32_t *)(USB_BASE_ADDR + 0x2C))
01077
01078 /* USB Device Endpoint Interrupt Registers */
01079 #define EP_INT_STAT     (*(reg32_t *)(USB_BASE_ADDR + 0x30))
01080 #define EP_INT_EN       (*(reg32_t *)(USB_BASE_ADDR + 0x34))
01081 #define EP_INT_CLR      (*(reg32_t *)(USB_BASE_ADDR + 0x38))
01082 #define EP_INT_SET      (*(reg32_t *)(USB_BASE_ADDR + 0x3C))
01083 #define EP_INT_PRIO     (*(reg32_t *)(USB_BASE_ADDR + 0x40))
01084
01085 /* USB Device Endpoint Realization Registers */
01086 #define REALIZE_EP      (*(reg32_t *)(USB_BASE_ADDR + 0x44))
01087 #define EP_INDEX        (*(reg32_t *)(USB_BASE_ADDR + 0x48))
01088 #define MAXPACKET_SIZE  (*(reg32_t *)(USB_BASE_ADDR + 0x4C))
01089
01090 /* USB Device Command Reagisters */
01091 #define CMD_CODE        (*(reg32_t *)(USB_BASE_ADDR + 0x10))
01092 #define CMD_DATA        (*(reg32_t *)(USB_BASE_ADDR + 0x14))
01093
01094 /* USB Device Data Transfer Registers */
01095 #define RX_DATA         (*(reg32_t *)(USB_BASE_ADDR + 0x18))
01096 #define TX_DATA         (*(reg32_t *)(USB_BASE_ADDR + 0x1C))
01097 #define RX_PLENGTH      (*(reg32_t *)(USB_BASE_ADDR + 0x20))
01098 #define TX_PLENGTH      (*(reg32_t *)(USB_BASE_ADDR + 0x24))
01099 #define USB_CTRL        (*(reg32_t *)(USB_BASE_ADDR + 0x28))
01100
01101 /* USB Device DMA Registers */
01102 #define DMA_REQ_STAT        (*(reg32_t *)(USB_BASE_ADDR + 0x50))
01103 #define DMA_REQ_CLR         (*(reg32_t *)(USB_BASE_ADDR + 0x54))
01104 #define DMA_REQ_SET         (*(reg32_t *)(USB_BASE_ADDR + 0x58))
01105 #define UDCA_HEAD           (*(reg32_t *)(USB_BASE_ADDR + 0x80))
01106 #define EP_DMA_STAT         (*(reg32_t *)(USB_BASE_ADDR + 0x84))
01107 #define EP_DMA_EN           (*(reg32_t *)(USB_BASE_ADDR + 0x88))
01108 #define EP_DMA_DIS          (*(reg32_t *)(USB_BASE_ADDR + 0x8C))
01109 #define DMA_INT_STAT        (*(reg32_t *)(USB_BASE_ADDR + 0x90))
01110 #define DMA_INT_EN          (*(reg32_t *)(USB_BASE_ADDR + 0x94))
01111 #define EOT_INT_STAT        (*(reg32_t *)(USB_BASE_ADDR + 0xA0))
01112 #define EOT_INT_CLR         (*(reg32_t *)(USB_BASE_ADDR + 0xA4))
01113 #define EOT_INT_SET         (*(reg32_t *)(USB_BASE_ADDR + 0xA8))
01114 #define NDD_REQ_INT_STAT    (*(reg32_t *)(USB_BASE_ADDR + 0xAC))
01115 #define NDD_REQ_INT_CLR     (*(reg32_t *)(USB_BASE_ADDR + 0xB0))
01116 #define NDD_REQ_INT_SET     (*(reg32_t *)(USB_BASE_ADDR + 0xB4))
01117 #define SYS_ERR_INT_STAT    (*(reg32_t *)(USB_BASE_ADDR + 0xB8))
01118 #define SYS_ERR_INT_CLR     (*(reg32_t *)(USB_BASE_ADDR + 0xBC))
01119 #define SYS_ERR_INT_SET     (*(reg32_t *)(USB_BASE_ADDR + 0xC0))
01120
01121 /* USB Host and OTG registers are for LPC24xx only */
01122 /* USB Host Controller */
01123 #define USBHC_BASE_ADDR     0xFFE0C000
01124 #define HC_REVISION         (*(reg32_t *)(USBHC_BASE_ADDR + 0x00))
01125 #define HC_CONTROL          (*(reg32_t *)(USBHC_BASE_ADDR + 0x04))
01126 #define HC_CMD_STAT         (*(reg32_t *)(USBHC_BASE_ADDR + 0x08))
01127 #define HC_INT_STAT         (*(reg32_t *)(USBHC_BASE_ADDR + 0x0C))
01128 #define HC_INT_EN           (*(reg32_t *)(USBHC_BASE_ADDR + 0x10))
01129 #define HC_INT_DIS          (*(reg32_t *)(USBHC_BASE_ADDR + 0x14))
01130 #define HC_HCCA             (*(reg32_t *)(USBHC_BASE_ADDR + 0x18))
01131 #define HC_PERIOD_CUR_ED    (*(reg32_t *)(USBHC_BASE_ADDR + 0x1C))
01132 #define HC_CTRL_HEAD_ED     (*(reg32_t *)(USBHC_BASE_ADDR + 0x20))
01133 #define HC_CTRL_CUR_ED      (*(reg32_t *)(USBHC_BASE_ADDR + 0x24))
01134 #define HC_BULK_HEAD_ED     (*(reg32_t *)(USBHC_BASE_ADDR + 0x28))
01135 #define HC_BULK_CUR_ED      (*(reg32_t *)(USBHC_BASE_ADDR + 0x2C))
01136 #define HC_DONE_HEAD        (*(reg32_t *)(USBHC_BASE_ADDR + 0x30))
01137 #define HC_FM_INTERVAL      (*(reg32_t *)(USBHC_BASE_ADDR + 0x34))
01138 #define HC_FM_REMAINING     (*(reg32_t *)(USBHC_BASE_ADDR + 0x38))
01139 #define HC_FM_NUMBER        (*(reg32_t *)(USBHC_BASE_ADDR + 0x3C))
01140 #define HC_PERIOD_START     (*(reg32_t *)(USBHC_BASE_ADDR + 0x40))
01141 #define HC_LS_THRHLD        (*(reg32_t *)(USBHC_BASE_ADDR + 0x44))
01142 #define HC_RH_DESCA         (*(reg32_t *)(USBHC_BASE_ADDR + 0x48))
01143 #define HC_RH_DESCB         (*(reg32_t *)(USBHC_BASE_ADDR + 0x4C))
01144 #define HC_RH_STAT          (*(reg32_t *)(USBHC_BASE_ADDR + 0x50))
01145 #define HC_RH_PORT_STAT1    (*(reg32_t *)(USBHC_BASE_ADDR + 0x54))
01146 #define HC_RH_PORT_STAT2    (*(reg32_t *)(USBHC_BASE_ADDR + 0x58))
01147
01148 /* USB OTG Controller */
01149 #define USBOTG_BASE_ADDR    0xFFE0C100
01150 #define OTG_INT_STAT        (*(reg32_t *)(USBOTG_BASE_ADDR + 0x00))
01151 #define OTG_INT_EN          (*(reg32_t *)(USBOTG_BASE_ADDR + 0x04))
01152 #define OTG_INT_SET         (*(reg32_t *)(USBOTG_BASE_ADDR + 0x08))
01153 #define OTG_INT_CLR         (*(reg32_t *)(USBOTG_BASE_ADDR + 0x0C))
01154 /* On LPC23xx, the name is USBPortSel, on LPC24xx, the name is OTG_STAT_CTRL */
01155 #define OTG_STAT_CTRL       (*(reg32_t *)(USBOTG_BASE_ADDR + 0x10))
01156 #define OTG_TIMER           (*(reg32_t *)(USBOTG_BASE_ADDR + 0x14))
01157
01158 #define USBOTG_I2C_BASE_ADDR    0xFFE0C300
01159 #define OTG_I2C_RX          (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x00))
01160 #define OTG_I2C_TX          (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x00))
01161 #define OTG_I2C_STS         (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x04))
01162 #define OTG_I2C_CTL         (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x08))
01163 #define OTG_I2C_CLKHI       (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x0C))
01164 #define OTG_I2C_CLKLO       (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x10))
01165
01166 /* On LPC23xx, the names are USBClkCtrl and USBClkSt; on LPC24xx, the names are
01167 OTG_CLK_CTRL and OTG_CLK_STAT respectively. */
01168 #define USBOTG_CLK_BASE_ADDR    0xFFE0CFF0
01169 #define OTG_CLK_CTRL        (*(reg32_t *)(USBOTG_CLK_BASE_ADDR + 0x04))
01170 #define OTG_CLK_STAT        (*(reg32_t *)(USBOTG_CLK_BASE_ADDR + 0x08))
01171
01172 /* Note: below three register name convention is for LPC23xx USB device only, match
01173 with the spec. update in USB Device Section. */
01174 #define USBPortSel          (*(reg32_t *)(USBOTG_BASE_ADDR + 0x10))
01175 #define USBClkCtrl          (*(reg32_t *)(USBOTG_CLK_BASE_ADDR + 0x04))
01176 #define USBClkSt            (*(reg32_t *)(USBOTG_CLK_BASE_ADDR + 0x08))
01177
01178 /* Ethernet MAC (32 bit data bus) -- all registers are RW unless indicated in parentheses */
01179 #define MAC_BASE_ADDR       0xFFE00000 /* AHB Peripheral # 0 */
01180 #define MAC_MAC1            (*(reg32_t *)(MAC_BASE_ADDR + 0x000)) /* MAC config reg 1 */
01181 #define MAC_MAC2            (*(reg32_t *)(MAC_BASE_ADDR + 0x004)) /* MAC config reg 2 */
01182 #define MAC_IPGT            (*(reg32_t *)(MAC_BASE_ADDR + 0x008)) /* b2b InterPacketGap reg */
01183 #define MAC_IPGR            (*(reg32_t *)(MAC_BASE_ADDR + 0x00C)) /* non b2b InterPacketGap reg */
01184 #define MAC_CLRT            (*(reg32_t *)(MAC_BASE_ADDR + 0x010)) /* CoLlision window/ReTry reg */
01185 #define MAC_MAXF            (*(reg32_t *)(MAC_BASE_ADDR + 0x014)) /* MAXimum Frame reg */
01186 #define MAC_SUPP            (*(reg32_t *)(MAC_BASE_ADDR + 0x018)) /* PHY SUPPort reg */
01187 #define MAC_TEST            (*(reg32_t *)(MAC_BASE_ADDR + 0x01C)) /* TEST reg */
01188 #define MAC_MCFG            (*(reg32_t *)(MAC_BASE_ADDR + 0x020)) /* MII Mgmt ConFiG reg */
01189 #define MAC_MCMD            (*(reg32_t *)(MAC_BASE_ADDR + 0x024)) /* MII Mgmt CoMmanD reg */
01190 #define MAC_MADR            (*(reg32_t *)(MAC_BASE_ADDR + 0x028)) /* MII Mgmt ADdRess reg */
01191 #define MAC_MWTD            (*(reg32_t *)(MAC_BASE_ADDR + 0x02C)) /* MII Mgmt WriTe Data reg (WO) */
01192 #define MAC_MRDD            (*(reg32_t *)(MAC_BASE_ADDR + 0x030)) /* MII Mgmt ReaD Data reg (RO) */
01193 #define MAC_MIND            (*(reg32_t *)(MAC_BASE_ADDR + 0x034)) /* MII Mgmt INDicators reg (RO) */
01194
01195 #define MAC_SA0             (*(reg32_t *)(MAC_BASE_ADDR + 0x040)) /* Station Address 0 reg */
01196 #define MAC_SA1             (*(reg32_t *)(MAC_BASE_ADDR + 0x044)) /* Station Address 1 reg */
01197 #define MAC_SA2             (*(reg32_t *)(MAC_BASE_ADDR + 0x048)) /* Station Address 2 reg */
01198
01199 #define MAC_COMMAND         (*(reg32_t *)(MAC_BASE_ADDR + 0x100)) /* Command reg */
01200 #define MAC_STATUS          (*(reg32_t *)(MAC_BASE_ADDR + 0x104)) /* Status reg (RO) */
01201 #define MAC_RXDESCRIPTOR    (*(reg32_t *)(MAC_BASE_ADDR + 0x108)) /* Rx descriptor base address reg */
01202 #define MAC_RXSTATUS        (*(reg32_t *)(MAC_BASE_ADDR + 0x10C)) /* Rx status base address reg */
01203 #define MAC_RXDESCRIPTORNUM (*(reg32_t *)(MAC_BASE_ADDR + 0x110)) /* Rx number of descriptors reg */
01204 #define MAC_RXPRODUCEINDEX  (*(reg32_t *)(MAC_BASE_ADDR + 0x114)) /* Rx produce index reg (RO) */
01205 #define MAC_RXCONSUMEINDEX  (*(reg32_t *)(MAC_BASE_ADDR + 0x118)) /* Rx consume index reg */
01206 #define MAC_TXDESCRIPTOR    (*(reg32_t *)(MAC_BASE_ADDR + 0x11C)) /* Tx descriptor base address reg */
01207 #define MAC_TXSTATUS        (*(reg32_t *)(MAC_BASE_ADDR + 0x120)) /* Tx status base address reg */
01208 #define MAC_TXDESCRIPTORNUM (*(reg32_t *)(MAC_BASE_ADDR + 0x124)) /* Tx number of descriptors reg */
01209 #define MAC_TXPRODUCEINDEX  (*(reg32_t *)(MAC_BASE_ADDR + 0x128)) /* Tx produce index reg */
01210 #define MAC_TXCONSUMEINDEX  (*(reg32_t *)(MAC_BASE_ADDR + 0x12C)) /* Tx consume index reg (RO) */
01211
01212 #define MAC_TSV0            (*(reg32_t *)(MAC_BASE_ADDR + 0x158)) /* Tx status vector 0 reg (RO) */
01213 #define MAC_TSV1            (*(reg32_t *)(MAC_BASE_ADDR + 0x15C)) /* Tx status vector 1 reg (RO) */
01214 #define MAC_RSV             (*(reg32_t *)(MAC_BASE_ADDR + 0x160)) /* Rx status vector reg (RO) */
01215
01216 #define MAC_FLOWCONTROLCNT  (*(reg32_t *)(MAC_BASE_ADDR + 0x170)) /* Flow control counter reg */
01217 #define MAC_FLOWCONTROLSTS  (*(reg32_t *)(MAC_BASE_ADDR + 0x174)) /* Flow control status reg */
01218
01219 #define MAC_RXFILTERCTRL    (*(reg32_t *)(MAC_BASE_ADDR + 0x200)) /* Rx filter ctrl reg */
01220 #define MAC_RXFILTERWOLSTS  (*(reg32_t *)(MAC_BASE_ADDR + 0x204)) /* Rx filter WoL status reg (RO) */
01221 #define MAC_RXFILTERWOLCLR  (*(reg32_t *)(MAC_BASE_ADDR + 0x208)) /* Rx filter WoL clear reg (WO) */
01222
01223 #define MAC_HASHFILTERL     (*(reg32_t *)(MAC_BASE_ADDR + 0x210)) /* Hash filter LSBs reg */
01224 #define MAC_HASHFILTERH     (*(reg32_t *)(MAC_BASE_ADDR + 0x214)) /* Hash filter MSBs reg */
01225
01226 #define MAC_INTSTATUS       (*(reg32_t *)(MAC_BASE_ADDR + 0xFE0)) /* Interrupt status reg (RO) */
01227 #define MAC_INTENABLE       (*(reg32_t *)(MAC_BASE_ADDR + 0xFE4)) /* Interrupt enable reg  */
01228 #define MAC_INTCLEAR        (*(reg32_t *)(MAC_BASE_ADDR + 0xFE8)) /* Interrupt clear reg (WO) */
01229 #define MAC_INTSET          (*(reg32_t *)(MAC_BASE_ADDR + 0xFEC)) /* Interrupt set reg (WO) */
01230
01231 #define MAC_POWERDOWN       (*(reg32_t *)(MAC_BASE_ADDR + 0xFF4)) /* Power-down reg */
01232 #define MAC_MODULEID        (*(reg32_t *)(MAC_BASE_ADDR + 0xFFC)) /* Module ID reg (RO) */
01233
01234
01235 /* IRQ numbers */
01236 #define INT_I2C0                     9
01237 #define INT_I2C1                    19
01238 #define INT_I2C2                    30
01239 #define INT_UART0                    6
01240 #define INT_UART1                    7
01241 #define INT_UART2                   28
01242 #define INT_UART3                   29
01243
01244 #endif /* LPC23XX_H */


BeRTOS: luBS14.c Source File

  • fonts
luBS14.c
00001 /* Generated by convbdf on Thu Apr  8 16:34:22 CEST 2010. */
00002 #include <gfx/font.h>
00003
00004 /* Font information:
00005
00006    name: -B&H-Lucida-Bold-R-Normal-Sans-14-140-75-75-P-92-ISO10646-1
00007    pixel size: 14
00008    ascent: 13
00009    descent: 2
00010 */
00011
00012 /* Font character bitmap data. */
00013 static const PROGMEM uint8_t font_luBS14_glyphs[] = {
00014
00015 /* Character (0x00): bbw=7, bbh=9, bbx=2, bby=0, width=12 */
00016 0x00, 0x00, 0x50, 0x00, 0x10, 0x00, 0x10, 0x00, 0x50, 0x00, 0x00, 0x00, /*                     * *             *               *               * *                          */
00017 0x00, 0x00, 0x15, 0x00, 0x10, 0x00, 0x10, 0x00, 0x15, 0x00, 0x00, 0x00, /*                     * *             *               *               * *                                       * * *             *             *         * * *                        */
00018
00019 /* Character (0x20): bbw=1, bbh=1, bbx=0, bby=0, width=4 */
00020 0x00, 0x00, 0x00, 0x00, /*                                  */
00021 0x00, 0x00, 0x00, 0x00, /*                                                              */
00022
00023 /* Character (0x21): bbw=2, bbh=10, bbx=1, bby=0, width=4 */
00024 0x00, 0xf8, 0xf8, 0x00, /*            *****   *****         */
00025 0x00, 0x1b, 0x18, 0x00, /*            *****   *****               ** **     **          */
00026
00027 /* Character (0x22): bbw=5, bbh=4, bbx=1, bby=7, width=7 */
00028 0x00, 0x3c, 0x0c, 0x00, 0x3c, 0x0c, 0x00, /*           ****    **              ****    **             */
00029 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           ****    **              ****    **                                                              */
00030
00031 /* Character (0x23): bbw=9, bbh=10, bbx=0, bby=0, width=10 */
00032 0x00, 0x40, 0xc0, 0xf8, 0x78, 0xc0, 0xf8, 0x78, 0x40, 0x00, /*               *       **   *****   ****       **   *****   ****       *          */
00033 0x02, 0x1e, 0x1f, 0x03, 0x1e, 0x1f, 0x03, 0x02, 0x02, 0x00, /*               *       **   *****   ****       **   *****   ****       *          *      ****  *****  **      ****  *****  **      *      *             */
00034
00035 /* Character (0x24): bbw=7, bbh=12, bbx=1, bby=-1, width=10 */
00036 0x00, 0x70, 0xf8, 0xc8, 0xfc, 0x08, 0x18, 0x10, 0x00, 0x00, /*             ***    *****   *  **  ******   *       **       *                    */
00037 0x00, 0x08, 0x18, 0x10, 0x3f, 0x13, 0x1f, 0x0e, 0x00, 0x00, /*             ***    *****   *  **  ******   *       **       *                             *      **      *  ****** **  *  *****   ***                  */
00038
00039 /* Character (0x25): bbw=10, bbh=10, bbx=1, bby=0, width=12 */
00040 0x00, 0x30, 0x78, 0x48, 0x78, 0x30, 0x80, 0x60, 0x30, 0x10, 0x00, 0x00, /*             **     ****    *  *    ****     **         *     **     **      *                    */
00041 0x00, 0x00, 0x08, 0x0c, 0x06, 0x01, 0x0c, 0x1e, 0x12, 0x1e, 0x0c, 0x00, /*             **     ****    *  *    ****     **         *     **     **      *                                    *     **    **    *        **    ****   *  *   ****    **           */
00042
00043 /* Character (0x26): bbw=9, bbh=10, bbx=1, bby=0, width=11 */
00044 0x00, 0x00, 0x70, 0xf8, 0x88, 0x88, 0x78, 0x30, 0x80, 0x80, 0x00, /*                     ***    *****   *   *   *   *   ****     **         *       *         */
00045 0x00, 0x0e, 0x1f, 0x18, 0x11, 0x13, 0x0e, 0x0c, 0x1b, 0x11, 0x00, /*                     ***    *****   *   *   *   *   ****     **         *       *                ***   *****     **  *   *  **  *   ***     **   ** **  *   *          */
00046
00047 /* Character (0x27): bbw=2, bbh=4, bbx=1, bby=7, width=4 */
00048 0x00, 0x3c, 0x0c, 0x00, /*           ****    **             */
00049 0x00, 0x00, 0x00, 0x00, /*           ****    **                                         */
00050
00051 /* Character (0x28): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */
00052 0x00, 0xe0, 0xf8, 0x1c, 0x04, 0x00, /*              ***   *****  ***     *              */
00053 0x00, 0x07, 0x1f, 0x38, 0x20, 0x00, /*              ***   *****  ***     *                    ***    *****     ***      *         */
00054
00055 /* Character (0x29): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */
00056 0x00, 0x04, 0x1c, 0xf8, 0xe0, 0x00, /*           *       ***      *****     ***         */
00057 0x00, 0x20, 0x38, 0x1f, 0x07, 0x00, /*           *       ***      *****     ***                    *    *** *****  ***            */
00058
00059 /* Character (0x2a): bbw=5, bbh=5, bbx=1, bby=5, width=7 */
00060 0x00, 0x50, 0x20, 0xf8, 0x20, 0x50, 0x00, /*             * *      *     *****     *      * *          */
00061 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*             * *      *     *****     *      * *                                                           */
00062
00063 /* Character (0x2b): bbw=7, bbh=7, bbx=1, bby=1, width=10 */
00064 0x00, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                      ***                                         */
00065 0x00, 0x01, 0x01, 0x01, 0x0f, 0x01, 0x01, 0x01, 0x00, 0x00, /*                                      ***                                               *      *      *      ****   *      *      *                     */
00066
00067 /* Character (0x2c): bbw=2, bbh=4, bbx=1, bby=-2, width=4 */
00068 0x00, 0x00, 0x00, 0x00, /*                                  */
00069 0x00, 0x58, 0x38, 0x00, /*                                           ** *   ***         */
00070
00071 /* Character (0x2d): bbw=3, bbh=1, bbx=1, bby=4, width=5 */
00072 0x00, 0x00, 0x00, 0x00, 0x00, /*                                          */
00073 0x00, 0x01, 0x01, 0x01, 0x00, /*                                                *      *      *              */
00074
00075 /* Character (0x2e): bbw=2, bbh=2, bbx=1, bby=0, width=4 */
00076 0x00, 0x00, 0x00, 0x00, /*                                  */
00077 0x00, 0x18, 0x18, 0x00, /*                                           **     **          */
00078
00079 /* Character (0x2f): bbw=8, bbh=12, bbx=0, bby=-1, width=8 */
00080 0x00, 0x00, 0x00, 0x80, 0xe0, 0x78, 0x1c, 0x04, /*                                *     ***   ****   ***     *      */
00081 0x20, 0x38, 0x1e, 0x07, 0x01, 0x00, 0x00, 0x00, /*                                *     ***   ****   ***     *          *    ***  ****  ***    *                            */
00082
00083 /* Character (0x30): bbw=8, bbh=10, bbx=1, bby=0, width=10 */
00084 0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /*              ***    ****   **      *       *       **       ****     ***         */
00085 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*              ***    ****   **      *       *       **       ****     ***               ***    ****      **      *      *     **  ****   ***            */
00086
00087 /* Character (0x31): bbw=5, bbh=10, bbx=2, bby=0, width=10 */
00088 0x00, 0x00, 0x10, 0x10, 0x10, 0xf8, 0xf8, 0x00, 0x00, 0x00, /*                     *       *       *      *****   *****                         */
00089 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, /*                     *       *       *      *****   *****                                                           *****  *****                        */
00090
00091 /* Character (0x32): bbw=8, bbh=10, bbx=1, bby=0, width=10 */
00092 0x00, 0x10, 0x18, 0x08, 0x08, 0x08, 0x98, 0xf8, 0x70, 0x00, /*             *      **      *       *       *       **  *   *****    ***          */
00093 0x00, 0x18, 0x1c, 0x1c, 0x1a, 0x1b, 0x19, 0x18, 0x18, 0x00, /*             *      **      *       *       *       **  *   *****    ***                   **    ***    ***   * **  ** **  *  **     **     **          */
00094
00095 /* Character (0x33): bbw=8, bbh=10, bbx=1, bby=0, width=10 */
00096 0x00, 0x10, 0x18, 0x88, 0x88, 0x88, 0xd8, 0x78, 0x30, 0x00, /*             *      **      *   *   *   *   *   *   ** **   ****     **           */
00097 0x00, 0x08, 0x18, 0x10, 0x10, 0x10, 0x19, 0x1f, 0x0e, 0x00, /*             *      **      *   *   *   *   *   *   ** **   ****     **                    *      **      *      *      *  *  **  *****   ***           */
00098
00099 /* Character (0x34): bbw=8, bbh=10, bbx=1, bby=0, width=10 */
00100 0x00, 0x80, 0x40, 0x20, 0x10, 0xf8, 0xf8, 0x00, 0x00, 0x00, /*                *      *      *      *      *****   *****                         */
00101 0x00, 0x03, 0x03, 0x03, 0x03, 0x1f, 0x1f, 0x03, 0x03, 0x00, /*                *      *      *      *      *****   *****                               **     **     **     **     *****  *****  **     **             */
00102
00103 /* Character (0x35): bbw=7, bbh=10, bbx=2, bby=0, width=10 */
00104 0x00, 0x00, 0xf8, 0x98, 0x98, 0x98, 0x98, 0x98, 0x00, 0x00, /*                    *****   **  *   **  *   **  *   **  *   **  *                 */
00105 0x00, 0x00, 0x08, 0x18, 0x10, 0x10, 0x19, 0x0f, 0x07, 0x00, /*                    *****   **  *   **  *   **  *   **  *   **  *                                 *      **      *      *  *  **  ****   ***            */
00106
00107 /* Character (0x36): bbw=8, bbh=10, bbx=1, bby=0, width=10 */
00108 0x00, 0xe0, 0xf0, 0x98, 0x48, 0x48, 0xc8, 0x98, 0x10, 0x00, /*              ***    ****   **  *   *  *    *  *    *  **   **  *    *            */
00109 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*              ***    ****   **  *   *  *    *  *    *  **   **  *    *                  ***    ****      **      *      *     **  ****   ***            */
00110
00111 /* Character (0x37): bbw=8, bbh=10, bbx=1, bby=0, width=10 */
00112 0x00, 0x18, 0x18, 0x18, 0x98, 0xd8, 0x78, 0x38, 0x18, 0x00, /*            **      **      **      **  *   ** **   ****    ***     **            */
00113 0x00, 0x00, 0x1c, 0x1f, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, /*            **      **      **      **  *   ** **   ****    ***     **                           ***  *****  **                                         */
00114
00115 /* Character (0x38): bbw=8, bbh=10, bbx=1, bby=0, width=10 */
00116 0x00, 0x30, 0x78, 0xc8, 0xc8, 0x88, 0x98, 0x78, 0x30, 0x00, /*             **     ****    *  **   *  **   *   *   **  *   ****     **           */
00117 0x00, 0x0e, 0x1f, 0x18, 0x10, 0x11, 0x13, 0x1f, 0x0e, 0x00, /*             **     ****    *  **   *  **   *   *   **  *   ****     **                  ***   *****     **      *  *   *  **  *  *****   ***           */
00118
00119 /* Character (0x39): bbw=8, bbh=10, bbx=1, bby=0, width=10 */
00120 0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /*              ***    ****   **      *       *       **       ****     ***         */
00121 0x00, 0x08, 0x19, 0x11, 0x12, 0x12, 0x19, 0x0f, 0x07, 0x00, /*              ***    ****   **      *       *       **       ****     ***                  *   *  **  *   *   *  *   *  *  *  **  ****   ***            */
00122
00123 /* Character (0x3a): bbw=2, bbh=7, bbx=1, bby=0, width=4 */
00124 0x00, 0xc0, 0xc0, 0x00, /*               **      **         */
00125 0x00, 0x18, 0x18, 0x00, /*               **      **                  **     **          */
00126
00127 /* Character (0x3b): bbw=2, bbh=9, bbx=1, bby=-2, width=4 */
00128 0x00, 0xc0, 0xc0, 0x00, /*               **      **         */
00129 0x00, 0x58, 0x38, 0x00, /*               **      **                  ** *   ***         */
00130
00131 /* Character (0x3c): bbw=6, bbh=7, bbx=2, bby=1, width=10 */
00132 0x00, 0x00, 0x00, 0x80, 0xc0, 0x40, 0x60, 0x20, 0x00, 0x00, /*                                *      **      *      **      *                   */
00133 0x00, 0x00, 0x01, 0x03, 0x06, 0x04, 0x0c, 0x08, 0x00, 0x00, /*                                *      **      *      **      *                                *      **      **      *      **      *                  */
00134
00135 /* Character (0x3d): bbw=7, bbh=3, bbx=1, bby=3, width=10 */
00136 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /*                *       *       *       *       *       *       *                 */
00137 0x00, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, 0x00, /*                *       *       *       *       *       *       *                        *      *      *      *      *      *      *                    */
00138
00139 /* Character (0x3e): bbw=6, bbh=7, bbx=2, bby=1, width=10 */
00140 0x00, 0x00, 0x20, 0x60, 0x40, 0xc0, 0x80, 0x00, 0x00, 0x00, /*                      *       **       *       **       *                         */
00141 0x00, 0x00, 0x08, 0x0c, 0x04, 0x06, 0x03, 0x01, 0x00, 0x00, /*                      *       **       *       **       *                                         *     **     *     **    **     *                     */
00142
00143 /* Character (0x3f): bbw=6, bbh=10, bbx=1, bby=0, width=8 */
00144 0x00, 0x10, 0x18, 0x08, 0x88, 0xf8, 0x70, 0x00, /*             *      **      *       *   *   *****    ***          */
00145 0x00, 0x00, 0x00, 0x1b, 0x1b, 0x00, 0x00, 0x00, /*             *      **      *       *   *   *****    ***                              ** **  ** **                        */
00146
00147 /* Character (0x40): bbw=10, bbh=10, bbx=1, bby=0, width=12 */
00148 0x00, 0xc0, 0x30, 0x10, 0x88, 0xc8, 0x48, 0x48, 0xf0, 0xe0, 0x00, 0x00, /*               **    **      *      *   *   *  **   *  *    *  *     ****     ***                 */
00149 0x00, 0x03, 0x0c, 0x08, 0x13, 0x17, 0x14, 0x14, 0x13, 0x07, 0x04, 0x00, /*               **    **      *      *   *   *  **   *  *    *  *     ****     ***                       **       **      *   **  *  *** *    * *    * *  **  *  ***      *            */
00150
00151 /* Character (0x41): bbw=9, bbh=10, bbx=1, bby=0, width=11 */
00152 0x00, 0x00, 0x80, 0xe0, 0x18, 0x18, 0x78, 0xe0, 0x80, 0x00, 0x00, /*                        *     ***   **      **      ****      ***       *                 */
00153 0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /*                        *     ***   **      **      ****      ***       *                        ****  *****   *      *      *      *     **     *****    ***          */
00154
00155 /* Character (0x42): bbw=7, bbh=10, bbx=2, bby=0, width=10 */
00156 0x00, 0x00, 0xf8, 0xf8, 0x88, 0x88, 0x48, 0x78, 0x30, 0x00, /*                    *****   *****   *   *   *   *   *  *    ****     **           */
00157 0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x11, 0x1f, 0x0e, 0x00, /*                    *****   *****   *   *   *   *   *  *    ****     **                        *****  *****      *      *  *   *  *****   ***           */
00158
00159 /* Character (0x43): bbw=8, bbh=10, bbx=2, bby=0, width=11 */
00160 0x00, 0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x08, 0x18, 0x10, 0x00, /*                      ***    ****   **      *       *       *       **       *            */
00161 0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x18, 0x08, 0x00, /*                      ***    ****   **      *       *       *       **       *                         ***    ****      **      *      *      *     **     *           */
00162
00163 /* Character (0x44): bbw=9, bbh=10, bbx=2, bby=0, width=12 */
00164 0x00, 0x00, 0xf8, 0xf8, 0x08, 0x08, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /*                    *****   *****   *       *       *       *       **       ****     ***         */
00165 0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*                    *****   *****   *       *       *       *       **       ****     ***                      *****  *****      *      *      *      *     **  ****   ***            */
00166
00167 /* Character (0x45): bbw=6, bbh=10, bbx=2, bby=0, width=9 */
00168 0x00, 0x00, 0xf8, 0xf8, 0x88, 0x88, 0x88, 0x08, 0x00, /*                    *****   *****   *   *   *   *   *   *   *             */
00169 0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /*                    *****   *****   *   *   *   *   *   *   *                          *****  *****      *      *      *      *          */
00170
00171 /* Character (0x46): bbw=6, bbh=10, bbx=2, bby=0, width=9 */
00172 0x00, 0x00, 0xf8, 0xf8, 0x88, 0x88, 0x88, 0x08, 0x00, /*                    *****   *****   *   *   *   *   *   *   *             */
00173 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, /*                    *****   *****   *   *   *   *   *   *   *                          *****  *****                                      */
00174
00175 /* Character (0x47): bbw=8, bbh=10, bbx=2, bby=0, width=11 */
00176 0x00, 0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x08, 0x18, 0x10, 0x00, /*                      ***    ****   **      *       *       *       **       *            */
00177 0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x1f, 0x1f, 0x00, /*                      ***    ****   **      *       *       *       **       *                         ***    ****      **      *      *      *  *****  *****          */
00178
00179 /* Character (0x48): bbw=8, bbh=10, bbx=2, bby=0, width=12 */
00180 0x00, 0x00, 0xf8, 0xf8, 0x80, 0x80, 0x80, 0x80, 0xf8, 0xf8, 0x00, 0x00, /*                    *****   *****       *       *       *       *   *****   *****                 */
00181 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /*                    *****   *****       *       *       *       *   *****   *****                              *****  *****                              *****  *****                 */
00182
00183 /* Character (0x49): bbw=2, bbh=10, bbx=2, bby=0, width=6 */
00184 0x00, 0x00, 0xf8, 0xf8, 0x00, 0x00, /*                    *****   *****                 */
00185 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /*                    *****   *****                              *****  *****                 */
00186
00187 /* Character (0x4a): bbw=4, bbh=12, bbx=0, bby=-2, width=6 */
00188 0x00, 0x00, 0xf8, 0xf8, 0x00, 0x00, /*                    *****   *****                 */
00189 0x40, 0x40, 0x7f, 0x3f, 0x00, 0x00, /*                    *****   *****                      *      **************                */
00190
00191 /* Character (0x4b): bbw=8, bbh=10, bbx=2, bby=0, width=11 */
00192 0x00, 0x00, 0xf8, 0xf8, 0x80, 0xc0, 0x60, 0x30, 0x18, 0x08, 0x00, /*                    *****   *****       *      **     **     **     **      *             */
00193 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x01, 0x03, 0x06, 0x1c, 0x18, 0x00, /*                    *****   *****       *      **     **     **     **      *                          *****  *****         *      **      **      ***     **          */
00194
00195 /* Character (0x4c): bbw=6, bbh=10, bbx=2, bby=0, width=9 */
00196 0x00, 0x00, 0xf8, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, /*                    *****   *****                                         */
00197 0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /*                    *****   *****                                                      *****  *****      *      *      *      *          */
00198
00199 /* Character (0x4d): bbw=11, bbh=10, bbx=2, bby=0, width=15 */
00200 0x00, 0x00, 0xf8, 0x18, 0xf8, 0xe0, 0x00, 0x00, 0x00, 0xe0, 0x18, 0xf8, 0xf8, 0x00, 0x00, /*                    *****   **      *****     ***                             ***   **      *****   *****                 */
00201 0x00, 0x00, 0x1f, 0x00, 0x00, 0x03, 0x0f, 0x0c, 0x03, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /*                    *****   **      *****     ***                             ***   **      *****   *****                              *****                **     ****     **   **                   *****  *****                 */
00202
00203 /* Character (0x4e): bbw=8, bbh=10, bbx=2, bby=0, width=12 */
00204 0x00, 0x00, 0xf8, 0x18, 0x78, 0xe0, 0x80, 0x00, 0x00, 0xf8, 0x00, 0x00, /*                    *****   **      ****      ***       *                   *****                 */
00205 0x00, 0x00, 0x1f, 0x00, 0x00, 0x01, 0x07, 0x1e, 0x18, 0x1f, 0x00, 0x00, /*                    *****   **      ****      ***       *                   *****                              *****                *      ***     ****     **  *****                 */
00206
00207 /* Character (0x4f): bbw=10, bbh=10, bbx=1, bby=0, width=12 */
00208 0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /*              ***    ****   **      *       *       *       *       **       ****     ***         */
00209 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*              ***    ****   **      *       *       *       *       **       ****     ***               ***    ****      **      *      *      *      *     **  ****   ***            */
00210
00211 /* Character (0x50): bbw=6, bbh=10, bbx=2, bby=0, width=9 */
00212 0x00, 0x00, 0xf8, 0xf8, 0x08, 0x08, 0xf8, 0xf0, 0x00, /*                    *****   *****   *       *       *****    ****         */
00213 0x00, 0x00, 0x1f, 0x1f, 0x01, 0x01, 0x01, 0x00, 0x00, /*                    *****   *****   *       *       *****    ****                      *****  *****  *      *      *                     */
00214
00215 /* Character (0x51): bbw=10, bbh=12, bbx=1, bby=-2, width=12 */
00216 0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /*              ***    ****   **      *       *       *       *       **       ****     ***         */
00217 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x30, 0x78, 0x4f, 0x07, 0x00, /*              ***    ****   **      *       *       *       *       **       ****     ***               ***    ****      **      *      *      *      **    ********  ****            */
00218
00219 /* Character (0x52): bbw=8, bbh=10, bbx=2, bby=0, width=11 */
00220 0x00, 0x00, 0xf8, 0xf8, 0x08, 0x08, 0x88, 0xf8, 0x30, 0x00, 0x00, /*                    *****   *****   *       *       *   *   *****    **                   */
00221 0x00, 0x00, 0x1f, 0x1f, 0x01, 0x01, 0x03, 0x06, 0x1c, 0x18, 0x00, /*                    *****   *****   *       *       *   *   *****    **                                *****  *****  *      *      **      **      ***     **          */
00222
00223 /* Character (0x53): bbw=7, bbh=10, bbx=1, bby=0, width=9 */
00224 0x00, 0x70, 0xf8, 0xc8, 0x88, 0x88, 0x18, 0x10, 0x00, /*             ***    *****   *  **   *   *   *   *   **       *            */
00225 0x00, 0x08, 0x18, 0x11, 0x11, 0x13, 0x1f, 0x0e, 0x00, /*             ***    *****   *  **   *   *   *   *   **       *                     *      **  *   *  *   *  **  *  *****   ***           */
00226
00227 /* Character (0x54): bbw=8, bbh=10, bbx=1, bby=0, width=10 */
00228 0x00, 0x08, 0x08, 0x08, 0xf8, 0xf8, 0x08, 0x08, 0x08, 0x00, /*            *       *       *       *****   *****   *       *       *             */
00229 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, /*            *       *       *       *****   *****   *       *       *                                        *****  *****                               */
00230
00231 /* Character (0x55): bbw=8, bbh=10, bbx=2, bby=0, width=12 */
00232 0x00, 0x00, 0xf8, 0xf8, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xf8, 0x00, 0x00, /*                    *****   *****                                   *****   *****                 */
00233 0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, 0x00, /*                    *****   *****                                   *****   *****                              ***    ****      **      *      *     **  ****   ***                   */
00234
00235 /* Character (0x56): bbw=9, bbh=10, bbx=1, bby=0, width=11 */
00236 0x00, 0x38, 0xf8, 0xc0, 0x00, 0x00, 0x00, 0x80, 0xf8, 0x38, 0x00, /*            ***     *****      **                               *   *****   ***           */
00237 0x00, 0x00, 0x01, 0x07, 0x1e, 0x18, 0x1c, 0x07, 0x01, 0x00, 0x00, /*            ***     *****      **                               *   *****   ***                        *      ***     ****     **    ***  ***    *                     */
00238
00239 /* Character (0x57): bbw=11, bbh=10, bbx=1, bby=0, width=13 */
00240 0x00, 0x78, 0xf8, 0x80, 0x00, 0x00, 0xe0, 0xe0, 0x00, 0x00, 0xf8, 0x78, 0x00, /*            ****    *****       *                     ***     ***                   *****   ****          */
00241 0x00, 0x00, 0x07, 0x1f, 0x1c, 0x07, 0x00, 0x07, 0x1f, 0x1c, 0x07, 0x00, 0x00, /*            ****    *****       *                     ***     ***                   *****   ****                       ***    *****    ***  ***           ***    *****    ***  ***                   */
00242
00243 /* Character (0x58): bbw=7, bbh=10, bbx=1, bby=0, width=9 */
00244 0x00, 0x18, 0x78, 0xe0, 0x80, 0xe0, 0x78, 0x18, 0x00, /*            **      ****      ***       *     ***   ****    **            */
00245 0x00, 0x18, 0x1e, 0x07, 0x01, 0x07, 0x1e, 0x18, 0x00, /*            **      ****      ***       *     ***   ****    **                     **   ****  ***    *      ***     ****     **          */
00246
00247 /* Character (0x59): bbw=8, bbh=10, bbx=1, bby=0, width=10 */
00248 0x00, 0x18, 0x78, 0xe0, 0x80, 0x00, 0xc0, 0x78, 0x18, 0x00, /*            **      ****      ***       *              **   ****    **            */
00249 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, /*            **      ****      ***       *              **   ****    **                                       *****  *****                               */
00250
00251 /* Character (0x5a): bbw=7, bbh=10, bbx=1, bby=0, width=9 */
00252 0x00, 0x08, 0x08, 0x08, 0xc8, 0xe8, 0x78, 0x18, 0x00, /*            *       *       *       *  **   * ***   ****    **            */
00253 0x00, 0x18, 0x1e, 0x17, 0x13, 0x10, 0x10, 0x10, 0x00, /*            *       *       *       *  **   * ***   ****    **                     **   ****  *** *  **  *      *      *      *          */
00254
00255 /* Character (0x5b): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */
00256 0x00, 0xfc, 0xfc, 0x04, 0x04, 0x00, /*           ******  ******  *       *              */
00257 0x00, 0x3f, 0x3f, 0x20, 0x20, 0x00, /*           ******  ******  *       *                    ****** ******      *      *         */
00258
00259 /* Character (0x5c): bbw=8, bbh=12, bbx=0, bby=-1, width=8 */
00260 0x04, 0x1c, 0x78, 0xe0, 0x80, 0x00, 0x00, 0x00, /*   *       ***      ****      ***       *                         */
00261 0x00, 0x00, 0x00, 0x01, 0x07, 0x1e, 0x38, 0x20, /*   *       ***      ****      ***       *                                             *      ***     ****     ***      *  */
00262
00263 /* Character (0x5d): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */
00264 0x00, 0x04, 0x04, 0xfc, 0xfc, 0x00, /*           *       *       ******  ******         */
00265 0x00, 0x20, 0x20, 0x3f, 0x3f, 0x00, /*           *       *       ******  ******                    *      * ****** ******         */
00266
00267 /* Character (0x5e): bbw=6, bbh=7, bbx=2, bby=3, width=10 */
00268 0x00, 0x00, 0x80, 0xe0, 0x38, 0x38, 0xe0, 0x80, 0x00, 0x00, /*                        *     ***   ***     ***       ***       *                 */
00269 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, /*                        *     ***   ***     ***       ***       *                              **                                 **                    */
00270
00271 /* Character (0x5f): bbw=9, bbh=1, bbx=1, bby=-1, width=11 */
00272 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                                          */
00273 0x00, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x00, /*                                                                                                     *      *      *      *      *      *      *      *      *         */
00274
00275 /* Character (0x60): bbw=5, bbh=2, bbx=2, bby=9, width=10 */
00276 0x00, 0x00, 0x04, 0x04, 0x0c, 0x08, 0x08, 0x00, 0x00, 0x00, /*                   *       *       **       *       *                             */
00277 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                   *       *       **       *       *                                                                                                   */
00278
00279 /* Character (0x61): bbw=8, bbh=8, bbx=1, bby=0, width=9 */
00280 0x00, 0x00, 0x20, 0x20, 0x20, 0x20, 0xe0, 0xc0, 0x00, /*                      *       *       *       *       ***      **         */
00281 0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /*                      *       *       *       *       ***      **                ***   *****  *   *  *   *  *  *   *****  *****      *   */
00282
00283 /* Character (0x62): bbw=8, bbh=11, bbx=1, bby=0, width=10 */
00284 0x00, 0xfc, 0xfc, 0x40, 0x20, 0x20, 0x60, 0xc0, 0x80, 0x00, /*           ******  ******      *      *       *       **       **       *         */
00285 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*           ******  ******      *      *       *       **       **       *               *****  *****      *      *      *     **  ****   ***            */
00286
00287 /* Character (0x63): bbw=7, bbh=8, bbx=1, bby=0, width=9 */
00288 0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x60, 0x40, 0x00, /*                *      **     **      *       *       **       *          */
00289 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x08, 0x00, /*                *      **     **      *       *       **       *                ***    ****      **      *      *      *     *           */
00290
00291 /* Character (0x64): bbw=8, bbh=11, bbx=1, bby=0, width=10 */
00292 0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x20, 0xfc, 0xfc, 0x00, /*                *      **     **      *       *       *    ******  ******         */
00293 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /*                *      **     **      *       *       *    ******  ******               ***    ****      **      *      *     *   *****  *****          */
00294
00295 /* Character (0x65): bbw=7, bbh=8, bbx=1, bby=0, width=9 */
00296 0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0xe0, 0xc0, 0x00, /*                *      **     **      *       *       ***      **         */
00297 0x00, 0x07, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /*                *      **     **      *       *       ***      **               ***    ****   *  **  *   *  *   *  *   *  *  *           */
00298
00299 /* Character (0x66): bbw=7, bbh=11, bbx=0, bby=0, width=7 */
00300 0x20, 0x20, 0xf8, 0xfc, 0x24, 0x24, 0x24, /*      *       *     *****  ******  *  *    *  *    *  *   */
00301 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, /*      *       *     *****  ******  *  *    *  *    *  *                *****  *****                        */
00302
00303 /* Character (0x67): bbw=8, bbh=10, bbx=1, bby=-2, width=10 */
00304 0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x20, 0xe0, 0xe0, 0x00, /*                *      **     **      *       *       *       ***     ***         */
00305 0x00, 0x23, 0x67, 0x4c, 0x48, 0x48, 0x64, 0x3f, 0x1f, 0x00, /*                *      **     **      *       *       *       ***     ***               **   * ***  **  **  *   *  *   *  *  *  ******** *****          */
00306
00307 /* Character (0x68): bbw=8, bbh=11, bbx=1, bby=0, width=10 */
00308 0x00, 0xfc, 0xfc, 0x40, 0x20, 0x20, 0x60, 0xe0, 0xc0, 0x00, /*           ******  ******      *      *       *       **      ***      **         */
00309 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, /*           ******  ******      *      *       *       **      ***      **               *****  *****                              *****  *****          */
00310
00311 /* Character (0x69): bbw=2, bbh=11, bbx=1, bby=0, width=4 */
00312 0x00, 0xec, 0xec, 0x00, /*           ** ***  ** ***         */
00313 0x00, 0x1f, 0x1f, 0x00, /*           ** ***  ** ***               *****  *****          */
00314
00315 /* Character (0x6a): bbw=4, bbh=13, bbx=0, bby=-2, width=5 */
00316 0x00, 0x00, 0xec, 0xec, 0x00, /*                   ** ***  ** ***         */
00317 0x40, 0x40, 0x7f, 0x3f, 0x00, /*                   ** ***  ** ***              *      **************         */
00318
00319 /* Character (0x6b): bbw=8, bbh=11, bbx=1, bby=0, width=9 */
00320 0x00, 0xfc, 0xfc, 0x00, 0x80, 0xc0, 0x60, 0x20, 0x00, /*           ******  ******               *      **     **      *           */
00321 0x00, 0x1f, 0x1f, 0x01, 0x03, 0x06, 0x1c, 0x18, 0x10, /*           ******  ******               *      **     **      *                 *****  *****  *      **      **      ***     **      *   */
00322
00323 /* Character (0x6c): bbw=2, bbh=11, bbx=1, bby=0, width=4 */
00324 0x00, 0xfc, 0xfc, 0x00, /*           ******  ******         */
00325 0x00, 0x1f, 0x1f, 0x00, /*           ******  ******               *****  *****          */
00326
00327 /* Character (0x6d): bbw=12, bbh=8, bbx=1, bby=0, width=14 */
00328 0x00, 0xe0, 0xe0, 0x40, 0x20, 0x60, 0xe0, 0xc0, 0x60, 0x20, 0x60, 0xe0, 0xc0, 0x00, /*              ***     ***      *      *       **      ***      **     **      *       **      ***      **         */
00329 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, /*              ***     ***      *      *       **      ***      **     **      *       **      ***      **               *****  *****                       *****  *****                       *****  *****          */
00330
00331 /* Character (0x6e): bbw=8, bbh=8, bbx=1, bby=0, width=10 */
00332 0x00, 0xe0, 0xe0, 0x40, 0x20, 0x20, 0x60, 0xe0, 0xc0, 0x00, /*              ***     ***      *      *       *       **      ***      **         */
00333 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, /*              ***     ***      *      *       *       **      ***      **               *****  *****                              *****  *****          */
00334
00335 /* Character (0x6f): bbw=8, bbh=8, bbx=1, bby=0, width=10 */
00336 0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x60, 0xc0, 0x80, 0x00, /*                *      **     **      *       *       **       **       *         */
00337 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*                *      **     **      *       *       **       **       *               ***    ****      **      *      *     **  ****   ***            */
00338
00339 /* Character (0x70): bbw=8, bbh=10, bbx=1, bby=-2, width=10 */
00340 0x00, 0xe0, 0xe0, 0x40, 0x20, 0x20, 0x60, 0xc0, 0x80, 0x00, /*              ***     ***      *      *       *       **       **       *         */
00341 0x00, 0x7f, 0x7f, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*              ***     ***      *      *       *       **       **       *               **************    *      *      *     **  ****   ***            */
00342
00343 /* Character (0x71): bbw=8, bbh=10, bbx=1, bby=-2, width=10 */
00344 0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x20, 0xe0, 0xe0, 0x00, /*                *      **     **      *       *       *       ***     ***         */
00345 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x08, 0x7f, 0x7f, 0x00, /*                *      **     **      *       *       *       ***     ***               ***    ****      **      *      *     *   **************        */
00346
00347 /* Character (0x72): bbw=5, bbh=8, bbx=2, bby=0, width=8 */
00348 0x00, 0x00, 0xe0, 0xe0, 0x80, 0x60, 0x60, 0x00, /*                      ***     ***       *     **      **          */
00349 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, /*                      ***     ***       *     **      **                       *****  *****                               */
00350
00351 /* Character (0x73): bbw=6, bbh=8, bbx=1, bby=0, width=8 */
00352 0x00, 0xc0, 0xe0, 0x20, 0x20, 0x20, 0x20, 0x00, /*               **     ***     *       *       *       *           */
00353 0x00, 0x11, 0x11, 0x13, 0x13, 0x1e, 0x0e, 0x00, /*               **     ***     *       *       *       *                 *   *  *   *  **  *  **  *   ****   ***           */
00354
00355 /* Character (0x74): bbw=5, bbh=10, bbx=1, bby=0, width=7 */
00356 0x00, 0x20, 0xf8, 0xf8, 0x20, 0x20, 0x00, /*              *     *****   *****     *       *           */
00357 0x00, 0x00, 0x0f, 0x1f, 0x10, 0x10, 0x00, /*              *     *****   *****     *       *                        ****   *****      *      *          */
00358
00359 /* Character (0x75): bbw=8, bbh=8, bbx=1, bby=0, width=10 */
00360 0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, /*              ***     ***                                     ***     ***         */
00361 0x00, 0x0f, 0x1f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /*              ***     ***                                     ***     ***               ****   *****     **      *      *     *   *****  *****          */
00362
00363 /* Character (0x76): bbw=7, bbh=8, bbx=1, bby=0, width=9 */
00364 0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, /*              ***     ***                             ***     ***         */
00365 0x00, 0x01, 0x07, 0x1e, 0x18, 0x1c, 0x03, 0x01, 0x00, /*              ***     ***                             ***     ***               *      ***     ****     **    ***  **     *              */
00366
00367 /* Character (0x77): bbw=11, bbh=8, bbx=1, bby=0, width=13 */
00368 0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, /*              ***     ***                              **                             ***     ***         */
00369 0x00, 0x00, 0x07, 0x1f, 0x1c, 0x07, 0x01, 0x07, 0x1c, 0x1f, 0x03, 0x00, 0x00, /*              ***     ***                              **                             ***     ***                      ***    *****    ***  ***    *      ***      ***  *****  **                    */
00370
00371 /* Character (0x78): bbw=7, bbh=8, bbx=1, bby=0, width=9 */
00372 0x00, 0x60, 0xe0, 0x80, 0x00, 0x00, 0xe0, 0x60, 0x00, /*              **      ***       *                     ***     **          */
00373 0x00, 0x18, 0x1c, 0x03, 0x03, 0x07, 0x1c, 0x18, 0x00, /*              **      ***       *                     ***     **                   **    ***  **     **     ***      ***     **          */
00374
00375 /* Character (0x79): bbw=7, bbh=10, bbx=1, bby=-2, width=9 */
00376 0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, /*              ***     ***                             ***     ***         */
00377 0x00, 0x41, 0x67, 0x7e, 0x18, 0x0e, 0x03, 0x01, 0x00, /*              ***     ***                             ***     ***               *     ****  ** ******   **   ***   **     *              */
00378
00379 /* Character (0x7a): bbw=7, bbh=8, bbx=1, bby=0, width=9 */
00380 0x00, 0x20, 0x20, 0x20, 0x20, 0xa0, 0xe0, 0x60, 0x00, /*              *       *       *       *       * *     ***     **          */
00381 0x00, 0x18, 0x1c, 0x16, 0x13, 0x11, 0x10, 0x10, 0x00, /*              *       *       *       *       * *     ***     **                   **    ***   ** *  **  *  *   *      *      *          */
00382
00383 /* Character (0x7b): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */
00384 0x00, 0x98, 0xbc, 0x64, 0x04, 0x00, /*            **  *  **** *  *  **   *              */
00385 0x00, 0x1c, 0x3e, 0x23, 0x20, 0x00, /*            **  *  **** *  *  **   *                      ***   ***** **   *      *         */
00386
00387 /* Character (0x7c): bbw=2, bbh=12, bbx=1, bby=-1, width=4 */
00388 0x00, 0xfc, 0xfc, 0x00, /*           ******  ******         */
00389 0x00, 0x3f, 0x3f, 0x00, /*           ******  ******               ****** ******         */
00390
00391 /* Character (0x7d): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */
00392 0x00, 0x04, 0x64, 0xbc, 0x98, 0x00, /*           *       *  **   **** *   **  *         */
00393 0x00, 0x20, 0x23, 0x3e, 0x1c, 0x00, /*           *       *  **   **** *   **  *                    * **   *  *****   ***          */
00394
00395 /* Character (0x7e): bbw=7, bbh=3, bbx=1, bby=3, width=9 */
00396 0x00, 0x00, 0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x00, /*                        *       *       *                       *         */
00397 0x00, 0x03, 0x00, 0x01, 0x03, 0x03, 0x02, 0x01, 0x00, /*                        *       *       *                       *               **            *      **     **      *     *              */
00398
00399 /* Character (0xa0): bbw=1, bbh=1, bbx=0, bby=0, width=4 */
00400 0x00, 0x00, 0x00, 0x00, /*                                  */
00401 0x00, 0x00, 0x00, 0x00, /*                                                              */
00402
00403 /* Character (0xa1): bbw=2, bbh=10, bbx=1, bby=-2, width=4 */
00404 0x00, 0x60, 0x60, 0x00, /*              **      **          */
00405 0x00, 0x7e, 0x7f, 0x00, /*              **      **                 *************        */
00406
00407 /* Character (0xa2): bbw=7, bbh=12, bbx=1, bby=-1, width=10 */
00408 0x00, 0xc0, 0xe0, 0x30, 0x10, 0xfc, 0x10, 0x30, 0x00, 0x00, /*               **     ***    **      *     ******    *       **                   */
00409 0x00, 0x03, 0x07, 0x0c, 0x08, 0x3f, 0x08, 0x08, 0x00, 0x00, /*               **     ***    **      *     ******    *       **                         **     ***      **      *   ******    *      *                  */
00410
00411 /* Character (0xa3): bbw=7, bbh=10, bbx=1, bby=0, width=10 */
00412 0x00, 0x80, 0x80, 0xf0, 0xf8, 0x88, 0x88, 0x10, 0x00, 0x00, /*                *       *    ****   *****   *   *   *   *    *                    */
00413 0x00, 0x10, 0x18, 0x1f, 0x17, 0x10, 0x10, 0x10, 0x00, 0x00, /*                *       *    ****   *****   *   *   *   *    *                              *     **  *****  *** *      *      *      *                 */
00414
00415 /* Character (0xa4): bbw=9, bbh=10, bbx=0, bby=0, width=10 */
00416 0x08, 0xd0, 0xe0, 0x20, 0x20, 0x20, 0xe0, 0xd0, 0x08, 0x00, /*    *        * **     ***     *       *       *       ***    * **   *             */
00417 0x10, 0x0b, 0x07, 0x04, 0x04, 0x04, 0x07, 0x0b, 0x10, 0x00, /*    *        * **     ***     *       *       *       ***    * **   *                *  ** *   ***      *      *      *    ***    ** *       *          */
00418
00419 /* Character (0xa5): bbw=8, bbh=10, bbx=1, bby=0, width=10 */
00420 0x00, 0x18, 0x78, 0xe0, 0x80, 0x00, 0xc0, 0x78, 0x18, 0x00, /*            **      ****      ***       *              **   ****    **            */
00421 0x00, 0x00, 0x05, 0x05, 0x1f, 0x1f, 0x05, 0x05, 0x00, 0x00, /*            **      ****      ***       *              **   ****    **                         * *    * *    *****  *****  * *    * *                   */
00422
00423 /* Character (0xa6): bbw=2, bbh=12, bbx=1, bby=-1, width=4 */
00424 0x00, 0x7c, 0x7c, 0x00, /*           *****   *****          */
00425 0x00, 0x3e, 0x3e, 0x00, /*           *****   *****                 *****  *****         */
00426
00427 /* Character (0xa7): bbw=6, bbh=11, bbx=2, bby=-1, width=10 */
00428 0x00, 0x00, 0xb0, 0xf8, 0x48, 0xc8, 0x98, 0x10, 0x00, 0x00, /*                     ** *   *****   *  *    *  **   **  *    *                    */
00429 0x00, 0x00, 0x11, 0x33, 0x26, 0x24, 0x3f, 0x1b, 0x00, 0x00, /*                     ** *   *****   *  *    *  **   **  *    *                                 *   *  **  **  **  *   *  * ****** ** **                 */
00430
00431 /* Character (0xa8): bbw=4, bbh=2, bbx=3, bby=9, width=10 */
00432 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, /*                           **                      **                             */
00433 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                           **                      **                                                                                                   */
00434
00435 /* Character (0xa9): bbw=10, bbh=10, bbx=1, bby=0, width=12 */
00436 0x00, 0xc0, 0x30, 0x10, 0x88, 0xc8, 0x48, 0x48, 0x10, 0x30, 0xc0, 0x00, /*               **    **      *      *   *   *  **   *  *    *  *     *       **        **         */
00437 0x00, 0x03, 0x0c, 0x08, 0x11, 0x13, 0x12, 0x12, 0x08, 0x0c, 0x03, 0x00, /*               **    **      *      *   *   *  **   *  *    *  *     *       **        **               **       **      *   *   *  **  *   *  *   *  *     *     **   **             */
00438
00439 /* Character (0xaa): bbw=6, bbh=6, bbx=1, bby=4, width=8 */
00440 0x00, 0xc0, 0xe8, 0x28, 0xf8, 0xf0, 0x00, 0x00, /*               **   * ***   * *     *****    ****                 */
00441 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0x00, /*               **   * ***   * *     *****    ****                              *      *             *      *              */
00442
00443 /* Character (0xab): bbw=8, bbh=5, bbx=0, bby=2, width=9 */
00444 0x00, 0x80, 0xc0, 0x40, 0x00, 0x80, 0xc0, 0x40, 0x00, /*                *      **      *                *      **      *          */
00445 0x01, 0x03, 0x06, 0x04, 0x01, 0x03, 0x06, 0x04, 0x00, /*                *      **      *                *      **      *         *      **      **      *    *      **      **      *            */
00446
00447 /* Character (0xac): bbw=7, bbh=4, bbx=1, bby=1, width=10 */
00448 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                                  */
00449 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x0f, 0x00, 0x00, /*                                                                                        *      *      *      *      *      *      ****                  */
00450
00451 /* Character (0xad): bbw=3, bbh=1, bbx=1, bby=4, width=5 */
00452 0x00, 0x00, 0x00, 0x00, 0x00, /*                                          */
00453 0x00, 0x01, 0x01, 0x01, 0x00, /*                                                *      *      *              */
00454
00455 /* Character (0xae): bbw=7, bbh=7, bbx=1, bby=3, width=10 */
00456 0x00, 0xe0, 0x10, 0xe8, 0x68, 0xa8, 0x10, 0xe0, 0x00, 0x00, /*              ***    *      * ***   * **    * * *    *        ***                 */
00457 0x00, 0x00, 0x01, 0x02, 0x02, 0x02, 0x01, 0x00, 0x00, 0x00, /*              ***    *      * ***   * **    * * *    *        ***                              *       *      *      *     *                            */
00458
00459 /* Character (0xaf): bbw=4, bbh=1, bbx=3, bby=9, width=10 */
00460 0x00, 0x00, 0x00, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00, 0x00, /*                            *       *       *       *                             */
00461 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                            *       *       *       *                                                                                                   */
00462
00463 /* Character (0xb0): bbw=4, bbh=3, bbx=0, bby=7, width=4 */
00464 0x10, 0x28, 0x28, 0x10, /*     *      * *     * *      *    */
00465 0x00, 0x00, 0x00, 0x00, /*     *      * *     * *      *                                */
00466
00467 /* Character (0xb1): bbw=7, bbh=7, bbx=1, bby=1, width=10 */
00468 0x00, 0x80, 0x80, 0x80, 0xe0, 0x80, 0x80, 0x80, 0x00, 0x00, /*                *       *       *     ***       *       *       *                 */
00469 0x00, 0x08, 0x08, 0x08, 0x0b, 0x08, 0x08, 0x08, 0x00, 0x00, /*                *       *       *     ***       *       *       *                          *      *      *   ** *      *      *      *                  */
00470
00471 /* Character (0xb2): bbw=5, bbh=6, bbx=1, bby=4, width=7 */
00472 0x00, 0x88, 0xc8, 0x48, 0x38, 0x30, 0x00, /*            *   *   *  **   *  *    ***      **           */
00473 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /*            *   *   *  **   *  *    ***      **                 *      *      *      *      *              */
00474
00475 /* Character (0xb3): bbw=5, bbh=6, bbx=1, bby=4, width=7 */
00476 0x00, 0x08, 0x28, 0x28, 0xf8, 0xd0, 0x00, /*            *       * *     * *     *****    * **         */
00477 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /*            *       * *     * *     *****    * **               *      *      *      *                     */
00478
00479 /* Character (0xb4): bbw=5, bbh=2, bbx=3, bby=9, width=10 */
00480 0x00, 0x00, 0x00, 0x08, 0x08, 0x0c, 0x04, 0x04, 0x00, 0x00, /*                            *       *      **      *       *                      */
00481 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                            *       *      **      *       *                                                                                            */
00482
00483 /* Character (0xb5): bbw=8, bbh=10, bbx=1, bby=-2, width=10 */
00484 0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, /*              ***     ***                                     ***     ***         */
00485 0x00, 0x7f, 0x7f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /*              ***     ***                                     ***     ***               **************   **      *      *     *   *****  *****          */
00486
00487 /* Character (0xb6): bbw=6, bbh=11, bbx=2, bby=-1, width=10 */
00488 0x00, 0x00, 0xf0, 0xf8, 0xf8, 0xf8, 0x08, 0xf8, 0x00, 0x00, /*                     ****   *****   *****   *****   *       *****                 */
00489 0x00, 0x00, 0x00, 0x01, 0x01, 0x3f, 0x00, 0x3f, 0x00, 0x00, /*                     ****   *****   *****   *****   *       *****                                     *      *      ******        ******                */
00490
00491 /* Character (0xb7): bbw=2, bbh=2, bbx=4, bby=3, width=10 */
00492 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                                  */
00493 0x00, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, /*                                                                                                             **     **                                  */
00494
00495 /* Character (0xb8): bbw=3, bbh=2, bbx=3, bby=-2, width=10 */
00496 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                                  */
00497 0x00, 0x00, 0x00, 0x40, 0x40, 0x20, 0x00, 0x00, 0x00, 0x00, /*                                                                                                            *      *     *                              */
00498
00499 /* Character (0xb9): bbw=4, bbh=6, bbx=1, bby=4, width=7 */
00500 0x00, 0x10, 0x10, 0xf8, 0xf8, 0x00, 0x00, /*             *       *      *****   *****                 */
00501 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /*             *       *      *****   *****                                     *      *                     */
00502
00503 /* Character (0xba): bbw=6, bbh=6, bbx=1, bby=4, width=8 */
00504 0x00, 0xf0, 0xf8, 0x08, 0x08, 0xf8, 0xf0, 0x00, /*             ****   *****   *       *       *****    ****         */
00505 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /*             ****   *****   *       *       *****    ****                      *      *      *      *                     */
00506
00507 /* Character (0xbb): bbw=8, bbh=5, bbx=1, bby=2, width=9 */
00508 0x00, 0x40, 0xc0, 0x80, 0x00, 0x40, 0xc0, 0x80, 0x00, /*               *       **       *              *       **       *         */
00509 0x00, 0x04, 0x06, 0x03, 0x01, 0x04, 0x06, 0x03, 0x01, /*               *       **       *              *       **       *                 *     **    **     *        *     **    **     *       */
00510
00511 /* Character (0xbc): bbw=12, bbh=10, bbx=1, bby=0, width=14 */
00512 0x00, 0x10, 0xf8, 0xf8, 0x00, 0x00, 0x80, 0x60, 0x18, 0x80, 0x80, 0x80, 0x00, 0x00, /*             *      *****   *****                       *     **    **          *       *       *                 */
00513 0x00, 0x00, 0x01, 0x01, 0x18, 0x06, 0x01, 0x06, 0x05, 0x04, 0x1f, 0x1f, 0x04, 0x00, /*             *      *****   *****                       *     **    **          *       *       *                              *      *         **   **    *       **    * *      *    *****  *****    *            */
00514
00515 /* Character (0xbd): bbw=12, bbh=10, bbx=1, bby=0, width=14 */
00516 0x00, 0x10, 0xf8, 0xf8, 0x00, 0x00, 0x80, 0x60, 0x18, 0x80, 0x80, 0x80, 0x00, 0x00, /*             *      *****   *****                       *     **    **          *       *       *                 */
00517 0x00, 0x00, 0x01, 0x01, 0x18, 0x06, 0x01, 0x00, 0x19, 0x1c, 0x16, 0x17, 0x13, 0x00, /*             *      *****   *****                       *     **    **          *       *       *                              *      *         **   **    *             *  **    ***   ** *  *** *  **  *          */
00518
00519 /* Character (0xbe): bbw=13, bbh=10, bbx=1, bby=0, width=15 */
00520 0x00, 0x90, 0x08, 0x28, 0xf8, 0xd0, 0x00, 0xc0, 0x20, 0x18, 0x80, 0x80, 0x80, 0x00, 0x00, /*             *  *   *       * *     *****    * **              **     *     **          *       *       *                 */
00521 0x00, 0x00, 0x01, 0x01, 0x19, 0x04, 0x03, 0x00, 0x06, 0x05, 0x04, 0x1f, 0x1f, 0x04, 0x00, /*             *  *   *       * *     *****    * **              **     *     **          *       *       *                              *      *      *  **    *    **             **    * *      *    *****  *****    *            */
00522
00523 /* Character (0xbf): bbw=6, bbh=10, bbx=1, bby=-2, width=8 */
00524 0x00, 0x00, 0x00, 0x60, 0x60, 0x00, 0x00, 0x00, /*                              **      **                          */
00525 0x00, 0x38, 0x7c, 0x47, 0x43, 0x60, 0x20, 0x00, /*                              **      **                                   ***   ********   ***    *     **     *         */
00526
00527 /* Character (0xc0): bbw=9, bbh=13, bbx=1, bby=0, width=11 */
00528 0x00, 0x00, 0x81, 0xe1, 0x1b, 0x1a, 0x7a, 0xe0, 0x80, 0x00, 0x00, /*                 *      **    ***** **    * **    * ****      ***       *                 */
00529 0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /*                 *      **    ***** **    * **    * ****      ***       *                        ****  *****   *      *      *      *     **     *****    ***          */
00530
00531 /* Character (0xc1): bbw=9, bbh=13, bbx=1, bby=0, width=11 */
00532 0x00, 0x00, 0x80, 0xe0, 0x1a, 0x1a, 0x7b, 0xe1, 0x81, 0x00, 0x00, /*                        *     *** * **    * **   ** **** *    ****      *                 */
00533 0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /*                        *     *** * **    * **   ** **** *    ****      *                        ****  *****   *      *      *      *     **     *****    ***          */
00534
00535 /* Character (0xc2): bbw=9, bbh=13, bbx=1, bby=0, width=11 */
00536 0x00, 0x00, 0x80, 0xe2, 0x19, 0x19, 0x7b, 0xe2, 0x80, 0x00, 0x00, /*                        * *   ****  **   *  **   ** ****  *   ***       *                 */
00537 0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /*                        * *   ****  **   *  **   ** ****  *   ***       *                        ****  *****   *      *      *      *     **     *****    ***          */
00538
00539 /* Character (0xc3): bbw=9, bbh=13, bbx=1, bby=0, width=11 */
00540 0x00, 0x00, 0x80, 0xe2, 0x19, 0x1b, 0x7a, 0xe1, 0x80, 0x00, 0x00, /*                        * *   ****  **   ** **    * **** *    ***       *                 */
00541 0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /*                        * *   ****  **   ** **    * **** *    ***       *                        ****  *****   *      *      *      *     **     *****    ***          */
00542
00543 /* Character (0xc4): bbw=8, bbh=13, bbx=1, bby=0, width=10 */
00544 0x00, 0x00, 0x80, 0xe3, 0x18, 0x78, 0xe3, 0x80, 0x00, 0x00, /*                        ***   ***   **      **** **   ***       *                 */
00545 0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /*                        ***   ***   **      **** **   ***       *                        ****  *****   *      *      *     **     *****    ***          */
00546
00547 /* Character (0xc5): bbw=9, bbh=13, bbx=1, bby=0, width=11 */
00548 0x00, 0x00, 0x80, 0xe2, 0x1d, 0x1d, 0x7f, 0xe2, 0x80, 0x00, 0x00, /*                        * *   **** ***   * ***   *******  *   ***       *                 */
00549 0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /*                        * *   **** ***   * ***   *******  *   ***       *                        ****  *****   *      *      *      *     **     *****    ***          */
00550
00551 /* Character (0xc6): bbw=11, bbh=10, bbx=1, bby=0, width=13 */
00552 0x00, 0x00, 0x80, 0xe0, 0x18, 0x08, 0xf8, 0xf8, 0x88, 0x88, 0x88, 0x08, 0x00, /*                        *     ***   **      *       *****   *****   *   *   *   *   *   *   *             */
00553 0x00, 0x1c, 0x1f, 0x02, 0x02, 0x02, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /*                        *     ***   **      *       *****   *****   *   *   *   *   *   *   *                     ***  *****   *      *      *     *****  *****      *      *      *      *          */
00554
00555 /* Character (0xc7): bbw=8, bbh=12, bbx=2, bby=-2, width=11 */
00556 0x00, 0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x08, 0x18, 0x10, 0x00, /*                      ***    ****   **      *       *       *       **       *            */
00557 0x00, 0x00, 0x07, 0x0f, 0x58, 0x50, 0x30, 0x10, 0x18, 0x08, 0x00, /*                      ***    ****   **      *       *       *       **       *                         ***    ****      ** *    * *    **     *     **     *           */
00558
00559 /* Character (0xc8): bbw=6, bbh=13, bbx=2, bby=0, width=9 */
00560 0x00, 0x00, 0xf8, 0xf9, 0x89, 0x8b, 0x8a, 0x0a, 0x00, /*                    ******  ******  *   *** *   * * *   * * *             */
00561 0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /*                    ******  ******  *   *** *   * * *   * * *                          *****  *****      *      *      *      *          */
00562
00563 /* Character (0xc9): bbw=6, bbh=13, bbx=2, bby=0, width=9 */
00564 0x00, 0x00, 0xf8, 0xfa, 0x8a, 0x8b, 0x89, 0x09, 0x00, /*                    ***** * ***** * *   *** *   **  *   **  *             */
00565 0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /*                    ***** * ***** * *   *** *   **  *   **  *                          *****  *****      *      *      *      *          */
00566
00567 /* Character (0xca): bbw=6, bbh=13, bbx=2, bby=0, width=9 */
00568 0x00, 0x00, 0xf8, 0xfa, 0x89, 0x8b, 0x8a, 0x08, 0x00, /*                    ***** * ******  *   *** *   * * *   *   *             */
00569 0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /*                    ***** * ******  *   *** *   * * *   *   *                          *****  *****      *      *      *      *          */
00570
00571 /* Character (0xcb): bbw=6, bbh=13, bbx=2, bby=0, width=9 */
00572 0x00, 0x00, 0xf8, 0xfb, 0x88, 0x88, 0x8b, 0x08, 0x00, /*                    ******* *****   *   *   *   *** *   *   *             */
00573 0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /*                    ******* *****   *   *   *   *** *   *   *                          *****  *****      *      *      *      *          */
00574
00575 /* Character (0xcc): bbw=4, bbh=13, bbx=1, bby=0, width=6 */
00576 0x00, 0x01, 0xf9, 0xfb, 0x02, 0x00, /*         *       *  ******* ***** *               */
00577 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /*         *       *  ******* ***** *                            *****  *****                 */
00578
00579 /* Character (0xcd): bbw=4, bbh=13, bbx=1, bby=0, width=6 */
00580 0x00, 0x02, 0xfb, 0xf9, 0x01, 0x00, /*          *      ** ******  ******                */
00581 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /*          *      ** ******  ******                             *****  *****                 */
00582
00583 /* Character (0xce): bbw=4, bbh=13, bbx=1, bby=0, width=6 */
00584 0x00, 0x02, 0xf9, 0xfb, 0x02, 0x00, /*          *      *  ******* ***** *               */
00585 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /*          *      *  ******* ***** *                            *****  *****                 */
00586
00587 /* Character (0xcf): bbw=4, bbh=13, bbx=1, bby=0, width=6 */
00588 0x00, 0x03, 0xf8, 0xf8, 0x03, 0x00, /*         **         *****   *******               */
00589 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /*         **         *****   *******                            *****  *****                 */
00590
00591 /* Character (0xd0): bbw=11, bbh=10, bbx=0, bby=0, width=12 */
00592 0x80, 0x80, 0xf8, 0xf8, 0x88, 0x88, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /*        *       *   *****   *****   *   *   *   *   *       *       **       ****     ***         */
00593 0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*        *       *   *****   *****   *   *   *   *   *       *       **       ****     ***                      *****  *****      *      *      *      *     **  ****   ***            */
00594
00595 /* Character (0xd1): bbw=8, bbh=13, bbx=2, bby=0, width=12 */
00596 0x00, 0x00, 0xf8, 0x18, 0x7a, 0xe1, 0x83, 0x02, 0x01, 0xf8, 0x00, 0x00, /*                    *****   **    * **** *    *****     * *      *          *****                 */
00597 0x00, 0x00, 0x1f, 0x00, 0x00, 0x01, 0x07, 0x1e, 0x18, 0x1f, 0x00, 0x00, /*                    *****   **    * **** *    *****     * *      *          *****                              *****                *      ***     ****     **  *****                 */
00598
00599 /* Character (0xd2): bbw=10, bbh=13, bbx=1, bby=0, width=12 */
00600 0x00, 0xe0, 0xf0, 0x19, 0x09, 0x0b, 0x0a, 0x0a, 0x18, 0xf0, 0xe0, 0x00, /*              ***    *****  **   *  *    ** *     * *     * *       **       ****     ***         */
00601 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*              ***    *****  **   *  *    ** *     * *     * *       **       ****     ***               ***    ****      **      *      *      *      *     **  ****   ***            */
00602
00603 /* Character (0xd3): bbw=10, bbh=13, bbx=1, bby=0, width=12 */
00604 0x00, 0xe0, 0xf0, 0x18, 0x0a, 0x0a, 0x0b, 0x09, 0x19, 0xf0, 0xe0, 0x00, /*              ***    ****   **    * *     * *    ** *    *  *    *  **       ****     ***         */
00605 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*              ***    ****   **    * *     * *    ** *    *  *    *  **       ****     ***               ***    ****      **      *      *      *      *     **  ****   ***            */
00606
00607 /* Character (0xd4): bbw=10, bbh=13, bbx=1, bby=0, width=12 */
00608 0x00, 0xe0, 0xf0, 0x18, 0x0a, 0x09, 0x0b, 0x0a, 0x18, 0xf0, 0xe0, 0x00, /*              ***    ****   **    * *    *  *    ** *     * *       **       ****     ***         */
00609 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*              ***    ****   **    * *    *  *    ** *     * *       **       ****     ***               ***    ****      **      *      *      *      *     **  ****   ***            */
00610
00611 /* Character (0xd5): bbw=10, bbh=13, bbx=1, bby=0, width=12 */
00612 0x00, 0xe0, 0xf0, 0x18, 0x0a, 0x09, 0x0b, 0x0a, 0x19, 0xf0, 0xe0, 0x00, /*              ***    ****   **    * *    *  *    ** *     * *    *  **       ****     ***         */
00613 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*              ***    ****   **    * *    *  *    ** *     * *    *  **       ****     ***               ***    ****      **      *      *      *      *     **  ****   ***            */
00614
00615 /* Character (0xd6): bbw=10, bbh=13, bbx=1, bby=0, width=12 */
00616 0x00, 0xe0, 0xf0, 0x1b, 0x08, 0x08, 0x08, 0x08, 0x1b, 0xf0, 0xe0, 0x00, /*              ***    ****** **      *       *       *       *    ** **       ****     ***         */
00617 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*              ***    ****** **      *       *       *       *    ** **       ****     ***               ***    ****      **      *      *      *      *     **  ****   ***            */
00618
00619 /* Character (0xd7): bbw=5, bbh=5, bbx=2, bby=2, width=10 */
00620 0x00, 0x00, 0x40, 0xc0, 0x80, 0x80, 0x40, 0x00, 0x00, 0x00, /*                       *       **       *       *      *                          */
00621 0x00, 0x00, 0x04, 0x02, 0x03, 0x06, 0x04, 0x00, 0x00, 0x00, /*                       *       **       *       *      *                                         *     *     **      **      *                          */
00622
00623 /* Character (0xd8): bbw=10, bbh=12, bbx=1, bby=-1, width=12 */
00624 0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x88, 0x68, 0x18, 0xf0, 0xec, 0x00, /*              ***    ****   **      *       *       *   *   * **    **       ****  ** ***         */
00625 0x00, 0x37, 0x0f, 0x18, 0x16, 0x11, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*              ***    ****   **      *       *       *   *   * **    **       ****  ** ***               *** ** ****      **   ** *  *   *      *      *     **  ****   ***            */
00626
00627 /* Character (0xd9): bbw=8, bbh=13, bbx=2, bby=0, width=12 */
00628 0x00, 0x00, 0xf8, 0xf9, 0x01, 0x03, 0x02, 0x02, 0xf8, 0xf8, 0x00, 0x00, /*                    ******  ******       **       *       *         *****   *****                 */
00629 0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, 0x00, /*                    ******  ******       **       *       *         *****   *****                              ***    ****      **      *      *     **  ****   ***                   */
00630
00631 /* Character (0xda): bbw=8, bbh=13, bbx=2, bby=0, width=12 */
00632 0x00, 0x00, 0xf8, 0xf8, 0x02, 0x02, 0x03, 0x01, 0xf9, 0xf8, 0x00, 0x00, /*                    *****   ***** *       *      **      *       *  *****   *****                 */
00633 0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, 0x00, /*                    *****   ***** *       *      **      *       *  *****   *****                              ***    ****      **      *      *     **  ****   ***                   */
00634
00635 /* Character (0xdb): bbw=8, bbh=13, bbx=2, bby=0, width=12 */
00636 0x00, 0x00, 0xf8, 0xf8, 0x02, 0x01, 0x03, 0x02, 0xf8, 0xf8, 0x00, 0x00, /*                    *****   ***** *      *       **       *         *****   *****                 */
00637 0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, 0x00, /*                    *****   ***** *      *       **       *         *****   *****                              ***    ****      **      *      *     **  ****   ***                   */
00638
00639 /* Character (0xdc): bbw=8, bbh=13, bbx=2, bby=0, width=12 */
00640 0x00, 0x00, 0xf8, 0xf8, 0x03, 0x00, 0x00, 0x03, 0xf8, 0xf8, 0x00, 0x00, /*                    *****   *******                      **         *****   *****                 */
00641 0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x07, 0x07, 0x00, 0x00, /*                    *****   *******                      **         *****   *****                              ***    ****      **      *      *     **  ***    ***                   */
00642
00643 /* Character (0xdd): bbw=8, bbh=13, bbx=1, bby=0, width=10 */
00644 0x00, 0x18, 0x78, 0xe2, 0x82, 0x03, 0xc1, 0x79, 0x18, 0x00, /*            **      ****  *   *** *     ***      *     ***  ****    **            */
00645 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, /*            **      ****  *   *** *     ***      *     ***  ****    **                                       *****  *****                               */
00646
00647 /* Character (0xde): bbw=6, bbh=10, bbx=2, bby=0, width=9 */
00648 0x00, 0x00, 0xf8, 0xf8, 0x20, 0x20, 0xe0, 0xc0, 0x00, /*                    *****   *****     *       *       ***      **         */
00649 0x00, 0x00, 0x1f, 0x1f, 0x04, 0x04, 0x07, 0x03, 0x00, /*                    *****   *****     *       *       ***      **                      *****  *****    *      *    ***    **             */
00650
00651 /* Character (0xdf): bbw=8, bbh=11, bbx=1, bby=0, width=10 */
00652 0x00, 0xf8, 0xfc, 0x04, 0x04, 0x44, 0xfc, 0x98, 0x00, 0x00, /*            *****  ******  *       *       *   *   ******   **  *                 */
00653 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x10, 0x10, 0x1f, 0x0f, 0x00, /*            *****  ******  *       *       *   *   ******   **  *                       *****  *****                    *      *  *****  ****           */
00654
00655 /* Character (0xe0): bbw=8, bbh=11, bbx=1, bby=0, width=9 */
00656 0x00, 0x00, 0x24, 0x24, 0x2c, 0x28, 0xe8, 0xc0, 0x00, /*                   *  *    *  *    ** *     * *     * ***      **         */
00657 0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /*                   *  *    *  *    ** *     * *     * ***      **                ***   *****  *   *  *   *  *  *   *****  *****      *   */
00658
00659 /* Character (0xe1): bbw=8, bbh=11, bbx=1, bby=0, width=9 */
00660 0x00, 0x00, 0x20, 0x28, 0x28, 0x2c, 0xe4, 0xc4, 0x00, /*                      *     * *     * *    ** *    *  ***  *   **         */
00661 0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /*                      *     * *     * *    ** *    *  ***  *   **                ***   *****  *   *  *   *  *  *   *****  *****      *   */
00662
00663 /* Character (0xe2): bbw=8, bbh=11, bbx=1, bby=0, width=9 */
00664 0x00, 0x00, 0x20, 0x28, 0x24, 0x2c, 0xe8, 0xc0, 0x00, /*                      *     * *    *  *    ** *     * ***      **         */
00665 0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /*                      *     * *    *  *    ** *     * ***      **                ***   *****  *   *  *   *  *  *   *****  *****      *   */
00666
00667 /* Character (0xe3): bbw=8, bbh=11, bbx=1, bby=0, width=9 */
00668 0x00, 0x00, 0x28, 0x24, 0x2c, 0x28, 0xe4, 0xc0, 0x00, /*                    * *    *  *    ** *     * *    *  ***      **         */
00669 0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /*                    * *    *  *    ** *     * *    *  ***      **                ***   *****  *   *  *   *  *  *   *****  *****      *   */
00670
00671 /* Character (0xe4): bbw=8, bbh=11, bbx=1, bby=0, width=9 */
00672 0x00, 0x00, 0x20, 0x2c, 0x20, 0x20, 0xec, 0xc0, 0x00, /*                      *    ** *       *       *    ** ***      **         */
00673 0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /*                      *    ** *       *       *    ** ***      **                ***   *****  *   *  *   *  *  *   *****  *****      *   */
00674
00675 /* Character (0xe5): bbw=8, bbh=11, bbx=1, bby=0, width=9 */
00676 0x00, 0x00, 0x20, 0x28, 0x34, 0x3c, 0xe8, 0xc0, 0x00, /*                      *     * *    * **    ****     * ***      **         */
00677 0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /*                      *     * *    * **    ****     * ***      **                ***   *****  *   *  *   *  *  *   *****  *****      *   */
00678
00679 /* Character (0xe6): bbw=12, bbh=8, bbx=1, bby=0, width=14 */
00680 0x00, 0x00, 0x20, 0x20, 0x20, 0x20, 0xe0, 0xc0, 0x60, 0x20, 0x20, 0xe0, 0xc0, 0x00, /*                      *       *       *       *       ***      **     **      *       *       ***      **         */
00681 0x00, 0x0e, 0x1f, 0x11, 0x11, 0x11, 0x0f, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /*                      *       *       *       *       ***      **     **      *       *       ***      **                ***   *****  *   *  *   *  *   *  ****   ****   *  **  *   *  *   *  *   *  *  *           */
00682
00683 /* Character (0xe7): bbw=7, bbh=10, bbx=1, bby=-2, width=9 */
00684 0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x60, 0x40, 0x00, /*                *      **     **      *       *       **       *          */
00685 0x00, 0x07, 0x4f, 0x58, 0x30, 0x10, 0x10, 0x08, 0x00, /*                *      **     **      *       *       **       *                ***    ****  *   ** *    **     *      *     *           */
00686
00687 /* Character (0xe8): bbw=7, bbh=11, bbx=1, bby=0, width=9 */
00688 0x00, 0x80, 0xc4, 0x64, 0x2c, 0x28, 0xe8, 0xc0, 0x00, /*                *  *   **  *  **   ** *     * *     * ***      **         */
00689 0x00, 0x07, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /*                *  *   **  *  **   ** *     * *     * ***      **               ***    ****   *  **  *   *  *   *  *   *  *  *           */
00690
00691 /* Character (0xe9): bbw=7, bbh=11, bbx=1, bby=0, width=9 */
00692 0x00, 0x80, 0xc0, 0x68, 0x28, 0x2c, 0xe4, 0xc4, 0x00, /*                *      **   * **    * *    ** *    *  ***  *   **         */
00693 0x00, 0x07, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /*                *      **   * **    * *    ** *    *  ***  *   **               ***    ****   *  **  *   *  *   *  *   *  *  *           */
00694
00695 /* Character (0xea): bbw=7, bbh=11, bbx=1, bby=0, width=9 */
00696 0x00, 0x80, 0xc0, 0x68, 0x24, 0x2c, 0xe8, 0xc0, 0x00, /*                *      **   * **   *  *    ** *     * ***      **         */
00697 0x00, 0x07, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /*                *      **   * **   *  *    ** *     * ***      **               ***    ****   *  **  *   *  *   *  *   *  *  *           */
00698
00699 /* Character (0xeb): bbw=7, bbh=11, bbx=1, bby=0, width=9 */
00700 0x00, 0x80, 0xcc, 0x60, 0x20, 0x20, 0xec, 0xc0, 0x00, /*                *  **  **     **      *       *    ** ***      **         */
00701 0x00, 0x07, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /*                *  **  **     **      *       *    ** ***      **               ***    ****   *  **  *   *  *   *  *   *  *  *           */
00702
00703 /* Character (0xec): bbw=4, bbh=11, bbx=0, bby=0, width=4 */
00704 0x04, 0xe4, 0xec, 0x08, /*   *       *  ***  ** ***   *     */
00705 0x00, 0x1f, 0x1f, 0x00, /*   *       *  ***  ** ***   *           *****  *****          */
00706
00707 /* Character (0xed): bbw=4, bbh=11, bbx=0, bby=0, width=4 */
00708 0x08, 0xec, 0xe4, 0x04, /*    *      ** ***  *  ***  *      */
00709 0x00, 0x1f, 0x1f, 0x00, /*    *      ** ***  *  ***  *            *****  *****          */
00710
00711 /* Character (0xee): bbw=4, bbh=11, bbx=0, bby=0, width=4 */
00712 0x08, 0xe4, 0xec, 0x08, /*    *      *  ***  ** ***   *     */
00713 0x00, 0x1f, 0x1f, 0x00, /*    *      *  ***  ** ***   *           *****  *****          */
00714
00715 /* Character (0xef): bbw=4, bbh=11, bbx=0, bby=0, width=4 */
00716 0x0c, 0xe0, 0xe0, 0x0c, /*   **         ***     ***  **     */
00717 0x00, 0x1f, 0x1f, 0x00, /*   **         ***     ***  **           *****  *****          */
00718
00719 /* Character (0xf0): bbw=8, bbh=11, bbx=1, bby=0, width=10 */
00720 0x00, 0x80, 0xc0, 0x68, 0x2c, 0x38, 0x78, 0xe8, 0x80, 0x00, /*                *      **   * **   ** *     ***     ****    * ***       *         */
00721 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*                *      **   * **   ** *     ***     ****    * ***       *               ***    ****      **      *      *     **  ****   ***            */
00722
00723 /* Character (0xf1): bbw=8, bbh=11, bbx=1, bby=0, width=10 */
00724 0x00, 0xe0, 0xe0, 0x48, 0x24, 0x2c, 0x68, 0xe4, 0xc0, 0x00, /*              ***     ***   *  *   *  *    ** *     * **   *  ***      **         */
00725 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, /*              ***     ***   *  *   *  *    ** *     * **   *  ***      **               *****  *****                              *****  *****          */
00726
00727 /* Character (0xf2): bbw=8, bbh=11, bbx=1, bby=0, width=10 */
00728 0x00, 0x80, 0xc4, 0x64, 0x2c, 0x28, 0x68, 0xc0, 0x80, 0x00, /*                *  *   **  *  **   ** *     * *     * **       **       *         */
00729 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*                *  *   **  *  **   ** *     * *     * **       **       *               ***    ****      **      *      *     **  ****   ***            */
00730
00731 /* Character (0xf3): bbw=8, bbh=11, bbx=1, bby=0, width=10 */
00732 0x00, 0x80, 0xc0, 0x68, 0x28, 0x2c, 0x64, 0xc4, 0x80, 0x00, /*                *      **   * **    * *    ** *    *  **   *   **       *         */
00733 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*                *      **   * **    * *    ** *    *  **   *   **       *               ***    ****      **      *      *     **  ****   ***            */
00734
00735 /* Character (0xf4): bbw=8, bbh=11, bbx=1, bby=0, width=10 */
00736 0x00, 0x80, 0xc0, 0x68, 0x24, 0x2c, 0x68, 0xc0, 0x80, 0x00, /*                *      **   * **   *  *    ** *     * **       **       *         */
00737 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*                *      **   * **   *  *    ** *     * **       **       *               ***    ****      **      *      *     **  ****   ***            */
00738
00739 /* Character (0xf5): bbw=8, bbh=11, bbx=1, bby=0, width=10 */
00740 0x00, 0x80, 0xc8, 0x64, 0x2c, 0x28, 0x64, 0xc0, 0x80, 0x00, /*                *   *  **  *  **   ** *     * *    *  **       **       *         */
00741 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*                *   *  **  *  **   ** *     * *    *  **       **       *               ***    ****      **      *      *     **  ****   ***            */
00742
00743 /* Character (0xf6): bbw=8, bbh=11, bbx=1, bby=0, width=10 */
00744 0x00, 0x80, 0xc0, 0x6c, 0x20, 0x20, 0x6c, 0xc0, 0x80, 0x00, /*                *      **  ** **      *       *    ** **       **       *         */
00745 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*                *      **  ** **      *       *    ** **       **       *               ***    ****      **      *      *     **  ****   ***            */
00746
00747 /* Character (0xf7): bbw=7, bbh=7, bbx=1, bby=1, width=10 */
00748 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                      **                                          */
00749 0x00, 0x01, 0x01, 0x01, 0x0d, 0x01, 0x01, 0x01, 0x00, 0x00, /*                                      **                                                *      *      *      * **   *      *      *                     */
00750
00751 /* Character (0xf8): bbw=8, bbh=10, bbx=1, bby=-1, width=10 */
00752 0x00, 0x80, 0xc0, 0x60, 0x20, 0xa0, 0x60, 0xc0, 0xb0, 0x00, /*                *      **     **      *       * *     **       **    ** *         */
00753 0x00, 0x37, 0x0f, 0x18, 0x16, 0x11, 0x18, 0x0f, 0x07, 0x00, /*                *      **     **      *       * *     **       **    ** *               *** ** ****      **   ** *  *   *     **  ****   ***            */
00754
00755 /* Character (0xf9): bbw=8, bbh=11, bbx=1, bby=0, width=10 */
00756 0x00, 0xe0, 0xe4, 0x04, 0x0c, 0x08, 0x08, 0xe0, 0xe0, 0x00, /*              ***  *  ***  *       **       *       *         ***     ***         */
00757 0x00, 0x0f, 0x1f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /*              ***  *  ***  *       **       *       *         ***     ***               ****   *****     **      *      *     *   *****  *****          */
00758
00759 /* Character (0xfa): bbw=8, bbh=11, bbx=1, bby=0, width=10 */
00760 0x00, 0xe0, 0xe8, 0x08, 0x0c, 0x04, 0x04, 0xe0, 0xe0, 0x00, /*              ***   * ***   *      **      *       *          ***     ***         */
00761 0x00, 0x0f, 0x1f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /*              ***   * ***   *      **      *       *          ***     ***               ****   *****     **      *      *     *   *****  *****          */
00762
00763 /* Character (0xfb): bbw=8, bbh=11, bbx=1, bby=0, width=10 */
00764 0x00, 0xe0, 0xe0, 0x08, 0x04, 0x0c, 0x08, 0xe0, 0xe0, 0x00, /*              ***     ***   *      *       **       *         ***     ***         */
00765 0x00, 0x0f, 0x1f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /*              ***     ***   *      *       **       *         ***     ***               ****   *****     **      *      *     *   *****  *****          */
00766
00767 /* Character (0xfc): bbw=8, bbh=11, bbx=1, bby=0, width=10 */
00768 0x00, 0xe0, 0xe0, 0x0c, 0x00, 0x00, 0x0c, 0xe0, 0xe0, 0x00, /*              ***     ***  **                      **         ***     ***         */
00769 0x00, 0x0f, 0x1f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /*              ***     ***  **                      **         ***     ***               ****   *****     **      *      *     *   *****  *****          */
00770
00771 /* Character (0xfd): bbw=7, bbh=13, bbx=1, bby=-2, width=9 */
00772 0x00, 0xe0, 0xe8, 0x08, 0x0c, 0x04, 0xe4, 0xe0, 0x00, /*              ***   * ***   *      **      *       *  ***     ***         */
00773 0x00, 0x41, 0x67, 0x7e, 0x18, 0x0e, 0x03, 0x01, 0x00, /*              ***   * ***   *      **      *       *  ***     ***               *     ****  ** ******   **   ***   **     *              */
00774
00775 /* Character (0xfe): bbw=8, bbh=12, bbx=1, bby=-2, width=10 */
00776 0x00, 0xf8, 0xf8, 0x40, 0x20, 0x20, 0x60, 0xc0, 0x80, 0x00, /*            *****   *****      *      *       *       **       **       *         */
00777 0x00, 0x7f, 0x7f, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /*            *****   *****      *      *       *       **       **       *               **************    *      *      *     **  ****   ***            */
00778
00779 /* Character (0xff): bbw=7, bbh=13, bbx=1, bby=-2, width=9 */
00780 0x00, 0xe0, 0xec, 0x00, 0x00, 0x00, 0xec, 0xe0, 0x00, /*              ***  ** ***                          ** ***     ***         */
00781 0x00, 0x41, 0x67, 0x7e, 0x18, 0x0e, 0x03, 0x01, 0x00, /*              ***  ** ***                          ** ***     ***               *     ****  ** ******   **   ***   **     *              */
00782 };
00783
00784 /* Character->glyph data. */
00785 static const PROGMEM uint16_t luBS14_offset[] = {
00786   0,    /* (0x00) */
00787   0,    /* (0x01) */
00788   0,    /* (0x02) */
00789   0,    /* (0x03) */
00790   0,    /* (0x04) */
00791   0,    /* (0x05) */
00792   0,    /* (0x06) */
00793   0,    /* (0x07) */
00794   0,    /* (0x08) */
00795   0,    /* (0x09) */
00796   0,    /* (0x0a) */
00797   0,    /* (0x0b) */
00798   0,    /* (0x0c) */
00799   0,    /* (0x0d) */
00800   0,    /* (0x0e) */
00801   0,    /* (0x0f) */
00802   0,    /* (0x10) */
00803   0,    /* (0x11) */
00804   0,    /* (0x12) */
00805   0,    /* (0x13) */
00806   0,    /* (0x14) */
00807   0,    /* (0x15) */
00808   0,    /* (0x16) */
00809   0,    /* (0x17) */
00810   0,    /* (0x18) */
00811   0,    /* (0x19) */
00812   0,    /* (0x1a) */
00813   0,    /* (0x1b) */
00814   0,    /* (0x1c) */
00815   0,    /* (0x1d) */
00816   0,    /* (0x1e) */
00817   0,    /* (0x1f) */
00818   24,   /* (0x20) */
00819   32,   /* (0x21) */
00820   40,   /* (0x22) */
00821   54,   /* (0x23) */
00822   74,   /* (0x24) */
00823   94,   /* (0x25) */
00824   118,  /* (0x26) */
00825   140,  /* (0x27) */
00826   148,  /* (0x28) */
00827   160,  /* (0x29) */
00828   172,  /* (0x2a) */
00829   186,  /* (0x2b) */
00830   206,  /* (0x2c) */
00831   214,  /* (0x2d) */
00832   224,  /* (0x2e) */
00833   232,  /* (0x2f) */
00834   248,  /* (0x30) */
00835   268,  /* (0x31) */
00836   288,  /* (0x32) */
00837   308,  /* (0x33) */
00838   328,  /* (0x34) */
00839   348,  /* (0x35) */
00840   368,  /* (0x36) */
00841   388,  /* (0x37) */
00842   408,  /* (0x38) */
00843   428,  /* (0x39) */
00844   448,  /* (0x3a) */
00845   456,  /* (0x3b) */
00846   464,  /* (0x3c) */
00847   484,  /* (0x3d) */
00848   504,  /* (0x3e) */
00849   524,  /* (0x3f) */
00850   540,  /* (0x40) */
00851   564,  /* (0x41) */
00852   586,  /* (0x42) */
00853   606,  /* (0x43) */
00854   628,  /* (0x44) */
00855   652,  /* (0x45) */
00856   670,  /* (0x46) */
00857   688,  /* (0x47) */
00858   710,  /* (0x48) */
00859   734,  /* (0x49) */
00860   746,  /* (0x4a) */
00861   758,  /* (0x4b) */
00862   780,  /* (0x4c) */
00863   798,  /* (0x4d) */
00864   828,  /* (0x4e) */
00865   852,  /* (0x4f) */
00866   876,  /* (0x50) */
00867   894,  /* (0x51) */
00868   918,  /* (0x52) */
00869   940,  /* (0x53) */
00870   958,  /* (0x54) */
00871   978,  /* (0x55) */
00872   1002, /* (0x56) */
00873   1024, /* (0x57) */
00874   1050, /* (0x58) */
00875   1068, /* (0x59) */
00876   1088, /* (0x5a) */
00877   1106, /* (0x5b) */
00878   1118, /* (0x5c) */
00879   1134, /* (0x5d) */
00880   1146, /* (0x5e) */
00881   1166, /* (0x5f) */
00882   1188, /* (0x60) */
00883   1208, /* (0x61) */
00884   1226, /* (0x62) */
00885   1246, /* (0x63) */
00886   1264, /* (0x64) */
00887   1284, /* (0x65) */
00888   1302, /* (0x66) */
00889   1316, /* (0x67) */
00890   1336, /* (0x68) */
00891   1356, /* (0x69) */
00892   1364, /* (0x6a) */
00893   1374, /* (0x6b) */
00894   1392, /* (0x6c) */
00895   1400, /* (0x6d) */
00896   1428, /* (0x6e) */
00897   1448, /* (0x6f) */
00898   1468, /* (0x70) */
00899   1488, /* (0x71) */
00900   1508, /* (0x72) */
00901   1524, /* (0x73) */
00902   1540, /* (0x74) */
00903   1554, /* (0x75) */
00904   1574, /* (0x76) */
00905   1592, /* (0x77) */
00906   1618, /* (0x78) */
00907   1636, /* (0x79) */
00908   1654, /* (0x7a) */
00909   1672, /* (0x7b) */
00910   1684, /* (0x7c) */
00911   1692, /* (0x7d) */
00912   1704, /* (0x7e) */
00913   0,    /* (0x7f) */
00914   0,    /* (0x80) */
00915   0,    /* (0x81) */
00916   0,    /* (0x82) */
00917   0,    /* (0x83) */
00918   0,    /* (0x84) */
00919   0,    /* (0x85) */
00920   0,    /* (0x86) */
00921   0,    /* (0x87) */
00922   0,    /* (0x88) */
00923   0,    /* (0x89) */
00924   0,    /* (0x8a) */
00925   0,    /* (0x8b) */
00926   0,    /* (0x8c) */
00927   0,    /* (0x8d) */
00928   0,    /* (0x8e) */
00929   0,    /* (0x8f) */
00930   0,    /* (0x90) */
00931   0,    /* (0x91) */
00932   0,    /* (0x92) */
00933   0,    /* (0x93) */
00934   0,    /* (0x94) */
00935   0,    /* (0x95) */
00936   0,    /* (0x96) */
00937   0,    /* (0x97) */
00938   0,    /* (0x98) */
00939   0,    /* (0x99) */
00940   0,    /* (0x9a) */
00941   0,    /* (0x9b) */
00942   0,    /* (0x9c) */
00943   0,    /* (0x9d) */
00944   0,    /* (0x9e) */
00945   0,    /* (0x9f) */
00946   1722, /* (0xa0) */
00947   1730, /* (0xa1) */
00948   1738, /* (0xa2) */
00949   1758, /* (0xa3) */
00950   1778, /* (0xa4) */
00951   1798, /* (0xa5) */
00952   1818, /* (0xa6) */
00953   1826, /* (0xa7) */
00954   1846, /* (0xa8) */
00955   1866, /* (0xa9) */
00956   1890, /* (0xaa) */
00957   1906, /* (0xab) */
00958   1924, /* (0xac) */
00959   1944, /* (0xad) */
00960   1954, /* (0xae) */
00961   1974, /* (0xaf) */
00962   1994, /* (0xb0) */
00963   2002, /* (0xb1) */
00964   2022, /* (0xb2) */
00965   2036, /* (0xb3) */
00966   2050, /* (0xb4) */
00967   2070, /* (0xb5) */
00968   2090, /* (0xb6) */
00969   2110, /* (0xb7) */
00970   2130, /* (0xb8) */
00971   2150, /* (0xb9) */
00972   2164, /* (0xba) */
00973   2180, /* (0xbb) */
00974   2198, /* (0xbc) */
00975   2226, /* (0xbd) */
00976   2254, /* (0xbe) */
00977   2284, /* (0xbf) */
00978   2300, /* (0xc0) */
00979   2322, /* (0xc1) */
00980   2344, /* (0xc2) */
00981   2366, /* (0xc3) */
00982   2388, /* (0xc4) */
00983   2408, /* (0xc5) */
00984   2430, /* (0xc6) */
00985   2456, /* (0xc7) */
00986   2478, /* (0xc8) */
00987   2496, /* (0xc9) */
00988   2514, /* (0xca) */
00989   2532, /* (0xcb) */
00990   2550, /* (0xcc) */
00991   2562, /* (0xcd) */
00992   2574, /* (0xce) */
00993   2586, /* (0xcf) */
00994   2598, /* (0xd0) */
00995   2622, /* (0xd1) */
00996   2646, /* (0xd2) */
00997   2670, /* (0xd3) */
00998   2694, /* (0xd4) */
00999   2718, /* (0xd5) */
01000   2742, /* (0xd6) */
01001   2766, /* (0xd7) */
01002   2786, /* (0xd8) */
01003   2810, /* (0xd9) */
01004   2834, /* (0xda) */
01005   2858, /* (0xdb) */
01006   2882, /* (0xdc) */
01007   2906, /* (0xdd) */
01008   2926, /* (0xde) */
01009   2944, /* (0xdf) */
01010   2964, /* (0xe0) */
01011   2982, /* (0xe1) */
01012   3000, /* (0xe2) */
01013   3018, /* (0xe3) */
01014   3036, /* (0xe4) */
01015   3054, /* (0xe5) */
01016   3072, /* (0xe6) */
01017   3100, /* (0xe7) */
01018   3118, /* (0xe8) */
01019   3136, /* (0xe9) */
01020   3154, /* (0xea) */
01021   3172, /* (0xeb) */
01022   3190, /* (0xec) */
01023   3198, /* (0xed) */
01024   3206, /* (0xee) */
01025   3214, /* (0xef) */
01026   3222, /* (0xf0) */
01027   3242, /* (0xf1) */
01028   3262, /* (0xf2) */
01029   3282, /* (0xf3) */
01030   3302, /* (0xf4) */
01031   3322, /* (0xf5) */
01032   3342, /* (0xf6) */
01033   3362, /* (0xf7) */
01034   3382, /* (0xf8) */
01035   3402, /* (0xf9) */
01036   3422, /* (0xfa) */
01037   3442, /* (0xfb) */
01038   3462, /* (0xfc) */
01039   3482, /* (0xfd) */
01040   3500, /* (0xfe) */
01041   3520, /* (0xff) */
01042 };
01043
01044 /* Character width data. */
01045 static const PROGMEM uint8_t luBS14_width[] = {
01046   12,   /* (0x00) */
01047   12,   /* (0x01) */
01048   12,   /* (0x02) */
01049   12,   /* (0x03) */
01050   12,   /* (0x04) */
01051   12,   /* (0x05) */
01052   12,   /* (0x06) */
01053   12,   /* (0x07) */
01054   12,   /* (0x08) */
01055   12,   /* (0x09) */
01056   12,   /* (0x0a) */
01057   12,   /* (0x0b) */
01058   12,   /* (0x0c) */
01059   12,   /* (0x0d) */
01060   12,   /* (0x0e) */
01061   12,   /* (0x0f) */
01062   12,   /* (0x10) */
01063   12,   /* (0x11) */
01064   12,   /* (0x12) */
01065   12,   /* (0x13) */
01066   12,   /* (0x14) */
01067   12,   /* (0x15) */
01068   12,   /* (0x16) */
01069   12,   /* (0x17) */
01070   12,   /* (0x18) */
01071   12,   /* (0x19) */
01072   12,   /* (0x1a) */
01073   12,   /* (0x1b) */
01074   12,   /* (0x1c) */
01075   12,   /* (0x1d) */
01076   12,   /* (0x1e) */
01077   12,   /* (0x1f) */
01078   4,    /* (0x20) */
01079   4,    /* (0x21) */
01080   7,    /* (0x22) */
01081   10,   /* (0x23) */
01082   10,   /* (0x24) */
01083   12,   /* (0x25) */
01084   11,   /* (0x26) */
01085   4,    /* (0x27) */
01086   6,    /* (0x28) */
01087   6,    /* (0x29) */
01088   7,    /* (0x2a) */
01089   10,   /* (0x2b) */
01090   4,    /* (0x2c) */
01091   5,    /* (0x2d) */
01092   4,    /* (0x2e) */
01093   8,    /* (0x2f) */
01094   10,   /* (0x30) */
01095   10,   /* (0x31) */
01096   10,   /* (0x32) */
01097   10,   /* (0x33) */
01098   10,   /* (0x34) */
01099   10,   /* (0x35) */
01100   10,   /* (0x36) */
01101   10,   /* (0x37) */
01102   10,   /* (0x38) */
01103   10,   /* (0x39) */
01104   4,    /* (0x3a) */
01105   4,    /* (0x3b) */
01106   10,   /* (0x3c) */
01107   10,   /* (0x3d) */
01108   10,   /* (0x3e) */
01109   8,    /* (0x3f) */
01110   12,   /* (0x40) */
01111   11,   /* (0x41) */
01112   10,   /* (0x42) */
01113   11,   /* (0x43) */
01114   12,   /* (0x44) */
01115   9,    /* (0x45) */
01116   9,    /* (0x46) */
01117   11,   /* (0x47) */
01118   12,   /* (0x48) */
01119   6,    /* (0x49) */
01120   6,    /* (0x4a) */
01121   11,   /* (0x4b) */
01122   9,    /* (0x4c) */
01123   15,   /* (0x4d) */
01124   12,   /* (0x4e) */
01125   12,   /* (0x4f) */
01126   9,    /* (0x50) */
01127   12,   /* (0x51) */
01128   11,   /* (0x52) */
01129   9,    /* (0x53) */
01130   10,   /* (0x54) */
01131   12,   /* (0x55) */
01132   11,   /* (0x56) */
01133   13,   /* (0x57) */
01134   9,    /* (0x58) */
01135   10,   /* (0x59) */
01136   9,    /* (0x5a) */
01137   6,    /* (0x5b) */
01138   8,    /* (0x5c) */
01139   6,    /* (0x5d) */
01140   10,   /* (0x5e) */
01141   11,   /* (0x5f) */
01142   10,   /* (0x60) */
01143   9,    /* (0x61) */
01144   10,   /* (0x62) */
01145   9,    /* (0x63) */
01146   10,   /* (0x64) */
01147   9,    /* (0x65) */
01148   7,    /* (0x66) */
01149   10,   /* (0x67) */
01150   10,   /* (0x68) */
01151   4,    /* (0x69) */
01152   5,    /* (0x6a) */
01153   9,    /* (0x6b) */
01154   4,    /* (0x6c) */
01155   14,   /* (0x6d) */
01156   10,   /* (0x6e) */
01157   10,   /* (0x6f) */
01158   10,   /* (0x70) */
01159   10,   /* (0x71) */
01160   8,    /* (0x72) */
01161   8,    /* (0x73) */
01162   7,    /* (0x74) */
01163   10,   /* (0x75) */
01164   9,    /* (0x76) */
01165   13,   /* (0x77) */
01166   9,    /* (0x78) */
01167   9,    /* (0x79) */
01168   9,    /* (0x7a) */
01169   6,    /* (0x7b) */
01170   4,    /* (0x7c) */
01171   6,    /* (0x7d) */
01172   9,    /* (0x7e) */
01173   12,   /* (0x7f) */
01174   12,   /* (0x80) */
01175   12,   /* (0x81) */
01176   12,   /* (0x82) */
01177   12,   /* (0x83) */
01178   12,   /* (0x84) */
01179   12,   /* (0x85) */
01180   12,   /* (0x86) */
01181   12,   /* (0x87) */
01182   12,   /* (0x88) */
01183   12,   /* (0x89) */
01184   12,   /* (0x8a) */
01185   12,   /* (0x8b) */
01186   12,   /* (0x8c) */
01187   12,   /* (0x8d) */
01188   12,   /* (0x8e) */
01189   12,   /* (0x8f) */
01190   12,   /* (0x90) */
01191   12,   /* (0x91) */
01192   12,   /* (0x92) */
01193   12,   /* (0x93) */
01194   12,   /* (0x94) */
01195   12,   /* (0x95) */
01196   12,   /* (0x96) */
01197   12,   /* (0x97) */
01198   12,   /* (0x98) */
01199   12,   /* (0x99) */
01200   12,   /* (0x9a) */
01201   12,   /* (0x9b) */
01202   12,   /* (0x9c) */
01203   12,   /* (0x9d) */
01204   12,   /* (0x9e) */
01205   12,   /* (0x9f) */
01206   4,    /* (0xa0) */
01207   4,    /* (0xa1) */
01208   10,   /* (0xa2) */
01209   10,   /* (0xa3) */
01210   10,   /* (0xa4) */
01211   10,   /* (0xa5) */
01212   4,    /* (0xa6) */
01213   10,   /* (0xa7) */
01214   10,   /* (0xa8) */
01215   12,   /* (0xa9) */
01216   8,    /* (0xaa) */
01217   9,    /* (0xab) */
01218   10,   /* (0xac) */
01219   5,    /* (0xad) */
01220   10,   /* (0xae) */
01221   10,   /* (0xaf) */
01222   4,    /* (0xb0) */
01223   10,   /* (0xb1) */
01224   7,    /* (0xb2) */
01225   7,    /* (0xb3) */
01226   10,   /* (0xb4) */
01227   10,   /* (0xb5) */
01228   10,   /* (0xb6) */
01229   10,   /* (0xb7) */
01230   10,   /* (0xb8) */
01231   7,    /* (0xb9) */
01232   8,    /* (0xba) */
01233   9,    /* (0xbb) */
01234   14,   /* (0xbc) */
01235   14,   /* (0xbd) */
01236   15,   /* (0xbe) */
01237   8,    /* (0xbf) */
01238   11,   /* (0xc0) */
01239   11,   /* (0xc1) */
01240   11,   /* (0xc2) */
01241   11,   /* (0xc3) */
01242   10,   /* (0xc4) */
01243   11,   /* (0xc5) */
01244   13,   /* (0xc6) */
01245   11,   /* (0xc7) */
01246   9,    /* (0xc8) */
01247   9,    /* (0xc9) */
01248   9,    /* (0xca) */
01249   9,    /* (0xcb) */
01250   6,    /* (0xcc) */
01251   6,    /* (0xcd) */
01252   6,    /* (0xce) */
01253   6,    /* (0xcf) */
01254   12,   /* (0xd0) */
01255   12,   /* (0xd1) */
01256   12,   /* (0xd2) */
01257   12,   /* (0xd3) */
01258   12,   /* (0xd4) */
01259   12,   /* (0xd5) */
01260   12,   /* (0xd6) */
01261   10,   /* (0xd7) */
01262   12,   /* (0xd8) */
01263   12,   /* (0xd9) */
01264   12,   /* (0xda) */
01265   12,   /* (0xdb) */
01266   12,   /* (0xdc) */
01267   10,   /* (0xdd) */
01268   9,    /* (0xde) */
01269   10,   /* (0xdf) */
01270   9,    /* (0xe0) */
01271   9,    /* (0xe1) */
01272   9,    /* (0xe2) */
01273   9,    /* (0xe3) */
01274   9,    /* (0xe4) */
01275   9,    /* (0xe5) */
01276   14,   /* (0xe6) */
01277   9,    /* (0xe7) */
01278   9,    /* (0xe8) */
01279   9,    /* (0xe9) */
01280   9,    /* (0xea) */
01281   9,    /* (0xeb) */
01282   4,    /* (0xec) */
01283   4,    /* (0xed) */
01284   4,    /* (0xee) */
01285   4,    /* (0xef) */
01286   10,   /* (0xf0) */
01287   10,   /* (0xf1) */
01288   10,   /* (0xf2) */
01289   10,   /* (0xf3) */
01290   10,   /* (0xf4) */
01291   10,   /* (0xf5) */
01292   10,   /* (0xf6) */
01293   10,   /* (0xf7) */
01294   10,   /* (0xf8) */
01295   10,   /* (0xf9) */
01296   10,   /* (0xfa) */
01297   10,   /* (0xfb) */
01298   10,   /* (0xfc) */
01299   9,    /* (0xfd) */
01300   10,   /* (0xfe) */
01301   9,    /* (0xff) */
01302 };
01303
01304 /* Font structure definition. */
01305 EXTERN_CONST Font font_luBS14 =
01306 {
01307     /* .glyph  = */ font_luBS14_glyphs,
01308     /* .name   =    "luBS14", */
01309     /* .width  = */ 15,
01310     /* .height = */ 15,
01311     /* .ascent =    13, */
01312     /* .first  = */ 0,
01313     /* .last   = */ 255,
01314     /* .offset = */ luBS14_offset,
01315     /* .width  = */ luBS14_width,
01316 };


BeRTOS: lwip.c File Reference

  • net
lwip.c File Reference

lwIP TCP/IP stack module More...

Go to the source code of this file.

Detailed Description

lwIP TCP/IP stack module

Author:
Andrea Righi <arighi@develer.com>

Definition in file lwip.c.


BeRTOS: lwip.c Source File

  • net
lwip.c
Go to the documentation of this file.
00001
00037 /*
00038  * Required by arm-2010.09-51-arm-none-eabi toolchain
00039  */
00040 #define __LINUX_ERRNO_EXTENSIONS__
00041
00042 /* XXX: exclude all the lwIP stuff from the BeRTOS documentation for now  */
00043 #ifndef __doxygen__
00044 /* Ensure that the lwIP compile-time options are included first. */
00045 #include "cfg/cfg_lwip.h"
00046
00047 /* Core lwIP TCP/IP stack */
00048 #if LWIP_DHCP
00049 #include "lwip/src/core/dhcp.c"
00050 #endif
00051 #if LWIP_DNS
00052 #include "lwip/src/core/dns.c"
00053 #endif
00054 #include "lwip/src/core/init.c"
00055 #include "lwip/src/core/mem.c"
00056 #include "lwip/src/core/memp.c"
00057 #include "lwip/src/core/netif.c"
00058 #include "lwip/src/core/pbuf.c"
00059 #include "lwip/src/core/raw.c"
00060 #include "lwip/src/core/stats.c"
00061 #include "lwip/src/core/sys.c"
00062 #if LWIP_TCP
00063 #include "lwip/src/core/tcp.c"
00064 #include "lwip/src/core/tcp_in.c"
00065 #include "lwip/src/core/tcp_out.c"
00066 #endif
00067 #if LWIP_UDP
00068 #include "lwip/src/core/udp.c"
00069 #endif
00070
00071 /* lwIP high-level API code */
00072 #include "lwip/src/api/api_lib.c"
00073 #include "lwip/src/api/api_msg.c"
00074 #include "lwip/src/api/err.c"
00075 #include "lwip/src/api/netbuf.c"
00076 #include "lwip/src/api/netdb.c"
00077 #include "lwip/src/api/netifapi.c"
00078 #include "lwip/src/api/sockets.c"
00079 #include "lwip/src/api/tcpip.c"
00080
00081 /* lwIP IPV4 implementation */
00082 #if LWIP_AUTOIP
00083 #include "lwip/src/core/ipv4/autoip.c"
00084 #endif
00085 #if LWIP_ICMP
00086 #include "lwip/src/core/ipv4/icmp.c"
00087 #endif
00088 #if LWIP_IGMP
00089 #include "lwip/src/core/ipv4/igmp.c"
00090 #endif
00091 #include "lwip/src/core/ipv4/inet.c"
00092 #include "lwip/src/core/ipv4/inet_chksum.c"
00093 #include "lwip/src/core/ipv4/ip.c"
00094 #include "lwip/src/core/ipv4/ip_addr.c"
00095 #include "lwip/src/core/ipv4/ip_frag.c"
00096
00097 /* lwIP SNMP implementation */
00098 #if LWIP_SNMP
00099 #include "lwip/src/core/snmp/asn1_dec.c"
00100 #include "lwip/src/core/snmp/asn1_enc.c"
00101 #include "lwip/src/core/snmp/mib2.c"
00102 #include "lwip/src/core/snmp/mib_structs.c"
00103 #include "lwip/src/core/snmp/msg_in.c"
00104 #include "lwip/src/core/snmp/msg_out.c"
00105 #endif
00106
00107 /* lwIP network interface */
00108 #include "lwip/src/netif/etharp.c"
00109 #include "lwip/src/netif/loopif.c"
00110
00111 /* lwIP PPP implementation */
00112 #if PPP_SUPPORT
00113 #include "lwip/src/netif/ppp/auth.c"
00114 #include "lwip/src/netif/ppp/chap.c"
00115 #include "lwip/src/netif/ppp/chpms.c"
00116 #include "lwip/src/netif/ppp/fsm.c"
00117 #include "lwip/src/netif/ppp/ipcp.c"
00118 #include "lwip/src/netif/ppp/lcp.c"
00119 #include "lwip/src/netif/ppp/magic.c"
00120 #include "lwip/src/netif/ppp/md5.c"
00121 #include "lwip/src/netif/ppp/pap.c"
00122 #include "lwip/src/netif/ppp/ppp.c"
00123 #include "lwip/src/netif/ppp/ppp_oe.c"
00124 #include "lwip/src/netif/ppp/randm.c"
00125 #include "lwip/src/netif/ppp/vj.c"
00126 #endif
00127
00128 /* BeRTOS-specific lwIP interface/porting layer */
00129 #include "lwip/src/netif/ethernetif.c"
00130 #include "lwip/src/arch/sys_arch.c"
00131 #endif /* __doxygen__ */


BeRTOS: lwip.h File Reference

  • net
lwip.h File Reference

lwIP TCP/IP stack module More...

#include "cfg/cfg_lwip.h"

Go to the source code of this file.

Detailed Description

lwIP TCP/IP stack module

Author:
Andrea Righi <arighi@develer.com>

Definition in file lwip.h.


BeRTOS: lwip.h Source File

  • net
lwip.h
Go to the documentation of this file.
00001
00041 #ifndef NET_LWIP_H
00042 #define NET_LWIP_H
00043
00044 #include "cfg/cfg_lwip.h"
00045
00046 #endif /* NET_LWIP_H */


BeRTOS: mac.h File Reference

  • sec
mac.h File Reference

Generic interface for message authentication algorithms. More...

#include <cfg/compiler.h>
#include <cfg/debug.h>

Go to the source code of this file.

Detailed Description

Generic interface for message authentication algorithms.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file mac.h.


BeRTOS: mac.h Source File

  • sec
mac.h
Go to the documentation of this file.
00001
00038 #ifndef SEC_MAC_H
00039 #define SEC_MAC_H
00040
00041 #include <cfg/compiler.h>
00042 #include <cfg/debug.h>
00043
00044 typedef struct Mac {
00045     uint8_t digest_len;
00046     uint8_t key_len;
00047
00048     void (*set_key)(struct Mac *m, const void *key, size_t len);
00049     void (*begin)(struct Mac *m);
00050     void (*update)(struct Mac *m, const void *data, size_t len);
00051     uint8_t* (*final)(struct Mac *m);
00052 } Mac;
00053
00054 INLINE void mac_set_key(Mac *m, const uint8_t* key, size_t len)
00055 {
00056     ASSERT(m->set_key);
00057     m->set_key(m, key, len);
00058 }
00059
00060 INLINE void mac_begin(Mac *m)
00061 {
00062     ASSERT(m->begin);
00063     m->begin(m);
00064 }
00065
00066 INLINE void mac_update(Mac *m, const void *data, size_t len)
00067 {
00068     ASSERT(m->update);
00069     m->update(m, data, len);
00070 }
00071
00072 INLINE uint8_t* mac_final(Mac *m)
00073 {
00074     ASSERT(m->final);
00075     return m->final(m);
00076 }
00077
00078 INLINE size_t mac_digest_len(Mac *m)
00079 {
00080     return m->digest_len;
00081 }
00082
00083 INLINE size_t mac_key_len(Mac *m)
00084 {
00085     return m->key_len;
00086 }
00087
00088 #endif


BeRTOS: macros.h File Reference

  • cfg
Defines | Typedefs | Functions
macros.h File Reference
#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define | ALIGN_UP(value, align)
Align value to the next align boundary.
#define | MINMAX(min, x, max) (MIN(MAX(min, x), max))
Bound x between min and max.
#define | SHUFFLE(array, len)
Shuffle the content of array that counts len elements.
#define | SWAP_T(a, b, T)
Macro to swap a with b, with explicit type T for dumb C89 compilers.
#define | REVERSE_UINT8(b) ((uint8_t)((((b) * 0x0802UL & 0x22110UL) | ((b) * 0x8020UL & 0x88440UL)) * 0x10101UL >> 16))
Reverse the bits contained in b (LSB becomes the MSB and so on).
#define | BV(x) (1<<(x))
Convert a bit value to a binary flag.
#define | BV32(x) ((uint32_t)1<<(x))
Same as BV() but with 32 bit result.
#define | BV16(x) ((uint16_t)1<<(x))
Same as BV() but with 16 bit result.
#define | BV8(x) ((uint8_t)1<<(x))
Same as BV() but with 8 bit result.
#define | DIV_ROUND(dividend, divisor) (((dividend) + (divisor) / 2) / (divisor))
Perform an integer division rounding the result to the nearest int value.
#define | DIV_ROUNDUP(dividend, divisor) (((dividend) + (divisor) - 1) / (divisor))
Perform an integer division rounding the result to the upper int value.
#define | INT_MULT(a, f, prec) (((a) * (long)((f) * (1 << (prec)) + 0.5)) >> (prec))
Perform a multiply between the integer a and the float constant f.
#define | ROUND_UP2(x, pad) (((x) + ((pad) - 1)) & ~((pad) - 1))
Round up x to an even multiple of the 2's power pad.
#define | IS_POW2(x) (!(bool)((x) & ((x)-1)))
Check if x is an integer power of 2.
#define | UINT8_LOG2(x)
Calculate a compile-time log2 for a uint8_t.
#define | UINT16_LOG2(x) ((x < 256) ? UINT8_LOG2(x) : UINT8_LOG2((x) >> 8) + 8)
Calculate a compile-time log2 for a uint16_t.
#define | UINT32_LOG2(x) ((x < 65536UL) ? UINT16_LOG2(x) : UINT16_LOG2((x) >> 16) + 16)
Calculate a compile-time log2 for a uint32_t.
#define | PP_COUNT(...) PP_COUNT__(__VA_ARGS__,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0)
Count the number of arguments (up to 16).
#define | BIT_CHANGE(reg,...) BIT_CHANGE__(reg, 0, __VA_ARGS__)
This macro allows for efficient and compact bit toggling in a hardware register.
#define | BIT_CHANGE_BV(reg,...) BIT_CHANGE__(reg, 1, __VA_ARGS__)
Similar to BIT_CHANGE(), but get bits instead of masks (and applies BV() to convert them to masks).
#define | MAKE_ID(a, b, c, d)
Make an id from 4 letters, useful for file formats and kfile ids.
Integer round macros.

Round x to a multiple of base.

Note:
If x is signed these macros generate a lot of code.
#define | ROUND_DOWN(x, base) ( (x) - ((x) % (base)) )
#define | ROUND_UP(x, base) ( ((x) + (base) - 1) - (((x) + (base) - 1) % (base)) )
#define | ROUND_NEAREST(x, base) ( ((x) + (base) / 2) - (((x) + (base) / 2) % (base)) )
#define | ROTR(var, rot) (((var) >> (rot)) | ((var) << ((sizeof(var) * 8) - (rot))))
Macro for rotating bit left or right.
#define | ROTL(var, rot) (((var) << (rot)) | ((var) >> ((sizeof(var) * 8) - (rot))))
Macro for rotating bit left or right.

Typedefs

typedef uint32_t | id_t
Type for id generated by MAKE_ID().

Functions

bool | is_aligned (const void *addr, size_t size)
Check if a pointer is aligned to a certain power-of-2 size.

Detailed Description

Definition in file macros.h.


BeRTOS: macros.h Source File

  • cfg
macros.h
Go to the documentation of this file.
00001
00042 #ifndef CFG_MACROS_H
00043 #define CFG_MACROS_H
00044
00045 #include <cfg/compiler.h>
00046
00047 /* avr-gcc does not seem to support libstdc++ */
00048 #if defined(__cplusplus) && !CPU_AVR
00049     /* Type-generic macros implemented with template functions. */
00050     #include <algorithm>
00051
00052     template<class T> inline T ABS(T n) { return n >= 0 ? n : -n; }
00053     #define MIN(a,b)   std::min(a, b)
00054     #define MAX(a,b)   std::max(a, b)
00055     #define SWAP(a,b)  std::swap(a, b)
00056 #elif (COMPILER_STATEMENT_EXPRESSIONS && COMPILER_TYPEOF)
00057     /* Type-generic macros implemented with statement expressions. */
00058     #define ABS(n) ({ \
00059         typeof(n) _n = (n); \
00060         (_n < 0) ? -_n : _n; \
00061     })
00062     #define MIN(a,b) ({ \
00063         typeof(a) _a = (a); \
00064         typeof(b) _b = (b); \
00065         ASSERT_TYPE_EQUAL(_a, _b); \
00066  \
00076         ((typeof(_a))((_a < _b) ? _a : _b)); \
00077     })
00078     #define MAX(a,b) ({ \
00079         typeof(a) _a = (a); \
00080         typeof(b) _b = (b); \
00081         ASSERT_TYPE_EQUAL(_a, _b); \
00082  \
00092         ((typeof(_a))((_a > _b) ? _a : _b)); \
00093     })
00094 #else /* !(COMPILER_STATEMENT_EXPRESSIONS && COMPILER_TYPEOF) */
00095     /* Buggy macros for inferior compilers.  */
00096     #define ABS(a)      (((a) < 0) ? -(a) : (a))
00097     #define MIN(a,b)    (((a) < (b)) ? (a) : (b))
00098     #define MAX(a,b)    (((a) > (b)) ? (a) : (b))
00099 #endif /* !(COMPILER_STATEMENT_EXPRESSIONS && COMPILER_TYPEOF) */
00100
00102 #define ALIGN_UP(value, align)  (((value) & ((align) - 1)) ? \
00103                 (((value) + ((align) - 1)) & ~((align) - 1)) : \
00104                 (value))
00105
00107 #define MINMAX(min,x,max)  (MIN(MAX(min, x), max))
00108
00109 #ifdef __cplusplus
00110     /* Use standard implementation from <algorithm> */
00111     #define SWAP(a,b)  std::swap(a, b)
00112 #elif COMPILER_TYPEOF
00113
00118     #define SWAP(a, b) \
00119         do { \
00120             typeof(a) tmp; \
00121             ASSERT_TYPE_EQUAL(a, b); \
00122             tmp = (a); \
00123             (a) = (b); \
00124             (b) = tmp; \
00125         } while (0)
00126 #else /* !COMPILER_TYPEOF */
00127     /* Sub-optimal implementation that only works with integral types. */
00128     #define SWAP(a, b) \
00129         do { \
00130             (a) ^= (b); \
00131             (b) ^= (a); \
00132             (a) ^= (b); \
00133         } while (0)
00134
00135 #endif /* COMPILER_TYPEOF */
00136
00140 #define SHUFFLE(array, len) \
00141     do { \
00142         int i, j; \
00143         for (i = (len) - 1; i > 0; i--) \
00144         { \
00145             j = ((i + 1) * (rand() / (RAND_MAX + 1.0))); \
00146             SWAP((array)[i], (array)[j]); \
00147         } \
00148     } while (0)
00149
00155 #define SWAP_T(a, b, T) \
00156     do { \
00157         T tmp; \
00158         ASSERT_TYPE_IS(a, T); \
00159         ASSERT_TYPE_IS(b, T); \
00160         tmp = (a); \
00161         (a) = (b); \
00162         (b) = tmp; \
00163     } while (0)
00164
00169 #define REVERSE_UINT8(b) \
00170     ((uint8_t)((((b) * 0x0802UL & 0x22110UL) | ((b) * 0x8020UL & 0x88440UL)) * 0x10101UL >> 16))
00171
00172 #ifndef BV
00173
00174     #define BV(x)  (1<<(x))
00175 #endif
00176
00178 #define BV32(x)  ((uint32_t)1<<(x))
00179
00181 #define BV16(x)  ((uint16_t)1<<(x))
00182
00184 #define BV8(x)  ((uint8_t)1<<(x))
00185
00191 #define DIV_ROUND(dividend, divisor)  (((dividend) + (divisor) / 2) / (divisor))
00192
00197 #define DIV_ROUNDUP(dividend, divisor)  (((dividend) + (divisor) - 1) / (divisor))
00198
00199
00232 #define INT_MULT(a, f, prec) (((a) * (long)((f) * (1 << (prec)) + 0.5)) >> (prec))
00233
00234
00236 #define ROUND_UP2(x, pad) (((x) + ((pad) - 1)) & ~((pad) - 1))
00237
00245 #define ROUND_DOWN(x, base)    ( (x) - ((x) % (base)) )
00246 #define ROUND_UP(x, base)      ( ((x) + (base) - 1) - (((x) + (base) - 1) % (base)) )
00247 #define ROUND_NEAREST(x, base) ( ((x) + (base) / 2) - (((x) + (base) / 2) % (base)) )
00248 /* \} */
00249
00251 #define IS_POW2(x)     (!(bool)((x) & ((x)-1)))
00252
00254 #define UINT8_LOG2(x) \
00255     ((x) < 2 ? 0 : \
00256      ((x) < 4 ? 1 : \
00257       ((x) < 8 ? 2 : \
00258        ((x) < 16 ? 3 : \
00259         ((x) < 32 ? 4 : \
00260          ((x) < 64 ? 5 : \
00261           ((x) < 128 ? 6 : 7)))))))
00262
00264 #define UINT16_LOG2(x) \
00265     ((x < 256) ? UINT8_LOG2(x) : UINT8_LOG2((x) >> 8) + 8)
00266
00268 #define UINT32_LOG2(x) \
00269     ((x < 65536UL) ? UINT16_LOG2(x) : UINT16_LOG2((x) >> 16) + 16)
00270
00271 #if COMPILER_VARIADIC_MACROS
00272
00273     #define PP_COUNT(...) \
00274         PP_COUNT__(__VA_ARGS__,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0)
00275     #define PP_COUNT__(a0,a1,a2,a3,a4,a5,a6,a7,a8,a9,a10,a11,a12,a13,a14,a15,count,...) \
00276         count
00277 #endif
00278
00279 #if COMPILER_VARIADIC_MACROS
00280
00326     #define BIT_EXTRACT_FLAG_0(bit, value)  bit
00327     #define BIT_EXTRACT_FLAG_1(bit, value)  BV(bit)
00328     #define BIT_EXTRACT_VALUE__(bit, value) value
00329
00330     #define BIT_MASK_SINGLE__(use_bv, index, max, arg) \
00331         ((index < max) ? (PP_CAT(BIT_EXTRACT_FLAG_, use_bv) arg) : 0) \
00332         /* */
00333
00334     #define BIT_MASK_IF_SINGLE__(use_bv, index, max, arg) \
00335         (((index < max) && (BIT_EXTRACT_VALUE__ arg)) ? (PP_CAT(BIT_EXTRACT_FLAG_, use_bv) arg) : 0) \
00336         /* */
00337
00338     #define BIT_ITER__2(macro, use_bv, max, a0,a1,a2,a3,a4,a5,a6,a7,a8,a9,a10,a11,a12,a13,a14,a15, ...) \
00339         (macro(use_bv, 0, max, a0) | \
00340         macro(use_bv, 1, max, a1) | \
00341         macro(use_bv, 2, max, a2) | \
00342         macro(use_bv, 3, max, a3) | \
00343         macro(use_bv, 4, max, a4) | \
00344         macro(use_bv, 5, max, a5) | \
00345         macro(use_bv, 6, max, a6) | \
00346         macro(use_bv, 7, max, a7) | \
00347         macro(use_bv, 8, max, a8) | \
00348         macro(use_bv, 9, max, a9) | \
00349         macro(use_bv, 10, max, a10) | \
00350         macro(use_bv, 11, max, a11) | \
00351         macro(use_bv, 12, max, a12) | \
00352         macro(use_bv, 13, max, a13) | \
00353         macro(use_bv, 14, max, a14) | \
00354         macro(use_bv, 15, max, a15)) \
00355         /* */
00356
00357     #define BIT_ITER__(macro, use_bv, ...) \
00358         BIT_ITER__2(macro, use_bv, PP_COUNT(__VA_ARGS__), __VA_ARGS__, (0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1)) \
00359         /* */
00360
00361     #define BIT_MASKS__(use_bv, ...) \
00362         BIT_ITER__(BIT_MASK_SINGLE__, use_bv, __VA_ARGS__)
00363         /* */
00364
00365     #define BIT_MASKS_CONDITIONAL__(use_bv, ...) \
00366         BIT_ITER__(BIT_MASK_IF_SINGLE__, use_bv, __VA_ARGS__)
00367         /* */
00368
00369     #define BIT_CHANGE__(reg, use_bv, ...) \
00370         ((reg) = ((reg) & ~BIT_MASKS__(use_bv, __VA_ARGS__)) | BIT_MASKS_CONDITIONAL__(use_bv, __VA_ARGS__)) \
00371         /* */
00372
00373     #define BIT_CHANGE(reg, ...)        BIT_CHANGE__(reg, 0, __VA_ARGS__)
00374     #define BIT_CHANGE_BV(reg, ...)     BIT_CHANGE__(reg, 1, __VA_ARGS__)
00375
00376 #endif /* COMPILER_VARIADIC_MACROS */
00377
00382 #define ROTR(var, rot) (((var) >> (rot)) | ((var) << ((sizeof(var) * 8) - (rot))))
00383 #define ROTL(var, rot) (((var) << (rot)) | ((var) >> ((sizeof(var) * 8) - (rot))))
00384 /*\}*/
00385
00390 #define MAKE_ID(a,b,c,d) \
00391     ( ((uint32_t)(a) << 24) \
00392     | ((uint32_t)(b) << 16) \
00393     | ((uint32_t)(c) <<  8) \
00394     | ((uint32_t)(d) <<  0) )
00395
00399 typedef uint32_t id_t;
00400
00404 INLINE bool is_aligned(const void *addr, size_t size)
00405 {
00406     return ((size_t)addr & (size - 1)) == 0;
00407 }
00408  //defgroup macros
00410
00411 #endif /* MACROS_H */
00412


BeRTOS: mcp41.c File Reference

  • drv
Functions
mcp41.c File Reference

MCP41xxx digital potentiomenter driver (implementation) More...

#include "hw/hw_mcp41.h"
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <drv/timer.h>
#include <drv/mcp41.h>
#include <io/kfile.h>

Go to the source code of this file.

Functions

void | mcp41_setResistance (Mcp41Dev dev, mcp41_res_t res)
Set resitance for digital pot dev.
void | mcp41_init (KFile *_ch)
Initialize mcp41 potentiometer driver.

Detailed Description

MCP41xxx digital potentiomenter driver (implementation)

Author:
Francesco Sacchi <batt@develer.com>

Definition in file mcp41.c.


BeRTOS: mcp41.c Source File

  • drv
mcp41.c
Go to the documentation of this file.
00001
00038 #include "hw/hw_mcp41.h"
00039
00040 #include <cfg/macros.h>
00041 #include <cfg/compiler.h>
00042
00043 #include <drv/timer.h>
00044 #include <drv/mcp41.h>
00045 #include <io/kfile.h>
00046
00047 static KFile *ch;
00048
00052 void mcp41_setResistance(Mcp41Dev dev, mcp41_res_t res)
00053 {
00054     MCP41_ON(dev);
00055     /* send command byte */
00056     kfile_putc(MCP41_WRITE_DATA, ch);
00057     kfile_putc(((MCP41_HW_MAX * (uint32_t)res)  + (MCP41_MAX / 2)) / MCP41_MAX, ch);
00058     kfile_flush(ch);
00059
00060     MCP41_OFF(dev);
00061 }
00062
00063
00067 void mcp41_init(KFile *_ch)
00068 {
00069     Mcp41Dev dev;
00070
00071     /* Init all potentiometer ports */
00072     for (dev = 0; dev < MCP41_CNT; dev++)
00073     {
00074         SET_MCP41_DDR(dev);
00075         MCP41_OFF(dev);
00076     }
00077
00078     ch = _ch;
00079 }


BeRTOS: mcp41.h File Reference

  • drv
Typedefs | Functions
mcp41.h File Reference

MCP41xxx digital potentiomenter driver. More...

#include "hw/mcp41_map.h"
#include <cfg/compiler.h>
#include <io/kfile.h>

Go to the source code of this file.

Typedefs

typedef uint16_t | mcp41_res_t
Type for digital potentiometer resistance.

Functions

void | mcp41_setResistance (Mcp41Dev dev, mcp41_res_t res)
Set resitance for digital pot dev.
void | mcp41_init (KFile *ch)
Initialize mcp41 potentiometer driver.

Detailed Description

MCP41xxx digital potentiomenter driver.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file mcp41.h.


BeRTOS: mcp41.h Source File

  • drv
mcp41.h
Go to the documentation of this file.
00001
00042 #ifndef DRV_MCP41_H
00043 #define DRV_MCP41_H
00044
00045 #include "hw/mcp41_map.h"
00046 #include <cfg/compiler.h>
00047
00048 #include <io/kfile.h>
00049
00050 #define MCP41_WRITE_DATA 0x11
00051 #define MCP41_HW_MAX     255
00052 #define MCP41_MAX        999
00053
00057 typedef uint16_t mcp41_res_t;
00058
00059 void mcp41_setResistance(Mcp41Dev dev, mcp41_res_t res);
00060 void mcp41_init(KFile *ch);
00061
00062 #endif /* DRV_MCP41_H */


BeRTOS: mcp41_map.h File Reference

  • hw
mcp41_map.h File Reference

MCP41 digital potentiometer map definitions. More...

Go to the source code of this file.

Enumerations

Enum for mcp41 pot evices.
enum Mcp41Dev

Detailed Description

MCP41 digital potentiometer map definitions.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file mcp41_map.h.


BeRTOS: mcp41_map.h Source File

  • hw
mcp41_map.h
Go to the documentation of this file.
00001
00039 #ifndef MCP41_MAP_H
00040 #define MCP41_MAP_H
00041
00042 #warning TODO:This is an example implentation, you must implement it!
00043
00048 typedef enum Mcp41Dev
00049 {
00050     MCP41_LED,
00051
00052     /* put here other mcp41 device */
00053
00054     MCP41_CNT,
00055 } Mcp41Dev;
00056 /* \} */
00057
00058 #endif /* MCP41_MAP_H */


BeRTOS: md2.c File Reference

  • algo
Functions
md2.c File Reference

MD2 Message-Digest algorithm. More...

#include "md2.h"
#include <string.h>
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cpu/pgm.h>

Go to the source code of this file.

Defines

#define | K1 5
Md2_perm() function generate an array of 256 "casual" permutation.
#define | K2 3
Md2_perm() function generate an array of 256 "casual" permutation.
#define | R 2
Md2_perm() function generate an array of 256 "casual" permutation.
#define | X 172
Md2_perm() function generate an array of 256 "casual" permutation.

Functions

static void | md2_pad (void *_block, size_t len_pad)
Pad function.
void | md2_init (Md2Context *context)
Algorithm initialization.
void | md2_update (Md2Context *context, const void *_block_in, size_t block_len)
Update block.
uint8_t * | md2_end (Md2Context *context)
Ends an MD2 message digest operation.
bool | md2_test (void)
MD2 test fuction.

Detailed Description

MD2 Message-Digest algorithm.

The MD2 algorithm work with a constant array of 256 permutationt defined in RFC1319. If you don't want to use a standard array of permutatione you can use a md2_perm() function that generate an array of 256 "casual" permutation. To swich from a standard array to md2_perm function you must chanche CONFIG_MD2_STD_PERM defined in appconfig.h. If you need to store array in program memory you must define a macro _PROGMEM (for more info see cpu/pgm.h).

Author:
Daniele Basile <asterix@develer.com>

Definition in file md2.c.

Define Documentation

#define K1 5

Md2_perm() function generate an array of 256 "casual" permutation.

Costant define for computing an array of 256 "casual" permutation.

Definition at line 94 of file md2.c.

#define K2 3

Md2_perm() function generate an array of 256 "casual" permutation.

Costant define for computing an array of 256 "casual" permutation.

Definition at line 95 of file md2.c.

#define R 2

Md2_perm() function generate an array of 256 "casual" permutation.

Costant define for computing an array of 256 "casual" permutation.

Definition at line 96 of file md2.c.

#define X 172

Md2_perm() function generate an array of 256 "casual" permutation.

Costant define for computing an array of 256 "casual" permutation.

Definition at line 97 of file md2.c.

Function Documentation

uint8_t* md2_end ( Md2Context * context )

Ends an MD2 message digest operation.

This fuction take an context and return a pointer to context state.

Parameters:
context in input.
Returns:
a pointer to context state (message digest).

Definition at line 256 of file md2.c.

void md2_init ( Md2Context * context )

Algorithm initialization.

Parameters:
context empty context.

Definition at line 196 of file md2.c.

static void md2_pad | ( | void * | _block,
 |  | size_t | len_pad
 | ) |  | [static]

Pad function.

Put len_pad unsigned char in input block.

Definition at line 120 of file md2.c.

bool md2_test ( void )

MD2 test fuction.

This function test MD2 algorithm with a standard string specified in RFC 1319.

Note:
This test work with official array of 256 byte pemutation contructed from digits of pi, defined in the RFC 1319.

Definition at line 288 of file md2.c.


BeRTOS: md2.c Source File

  • algo
md2.c
Go to the documentation of this file.
00001
00048 #include "md2.h"
00049
00050 #include <string.h>           //memset(), memcpy();
00051 #include <cfg/compiler.h>
00052 #include <cfg/debug.h>        //ASSERT()
00053 #include <cfg/macros.h>       //MIN(), countof(), ROTR();
00054 #include <cpu/pgm.h>
00055
00056
00057 #if CONFIG_MD2_STD_PERM
00058     /*
00059     * Official array of 256 byte pemutation contructed from digits of pi, defined
00060     * in the RFC 1319.
00061     */
00062     static const uint8_t PROGMEM md2_perm[256] =
00063     {
00064     41, 46, 67, 201, 162, 216, 124, 1, 61, 54, 84, 161, 236, 240, 6,
00065     19, 98, 167, 5, 243, 192, 199, 115, 140, 152, 147, 43, 217, 188,
00066     76, 130, 202, 30, 155, 87, 60, 253, 212, 224, 22, 103, 66, 111, 24,
00067     138, 23, 229, 18, 190, 78, 196, 214, 218, 158, 222, 73, 160, 251,
00068     245, 142, 187, 47, 238, 122, 169, 104, 121, 145, 21, 178, 7, 63,
00069     148, 194, 16, 137, 11, 34, 95, 33, 128, 127, 93, 154, 90, 144, 50,
00070     39, 53, 62, 204, 231, 191, 247, 151, 3, 255, 25, 48, 179, 72, 165,
00071     181, 209, 215, 94, 146, 42, 172, 86, 170, 198, 79, 184, 56, 210,
00072     150, 164, 125, 182, 118, 252, 107, 226, 156, 116, 4, 241, 69, 157,
00073     112, 89, 100, 113, 135, 32, 134, 91, 207, 101, 230, 45, 168, 2, 27,
00074     96, 37, 173, 174, 176, 185, 246, 28, 70, 97, 105, 52, 64, 126, 15,
00075     85, 71, 163, 35, 221, 81, 175, 58, 195, 92, 249, 206, 186, 197,
00076     234, 38, 44, 83, 13, 110, 133, 40, 132, 9, 211, 223, 205, 244, 65,
00077     129, 77, 82, 106, 220, 55, 200, 108, 193, 171, 250, 36, 225, 123,
00078     8, 12, 189, 177, 74, 120, 136, 149, 139, 227, 99, 232, 109, 233,
00079     203, 213, 254, 59, 0, 29, 57, 242, 239, 183, 14, 102, 88, 208, 228,
00080     166, 119, 114, 248, 235, 117, 75, 10, 49, 68, 80, 180, 143, 237,
00081     31, 26, 219, 153, 141, 51, 159, 17, 131, 20
00082     };
00083
00084     #define MD2_PERM(x) pgm_read8(&md2_perm[x])
00085 #else
00086
00094     #define K1 5
00095     #define K2 3
00096     #define R  2
00097     #define X  172
00098     /*\}*/
00099
00100     static uint8_t md2_perm(uint8_t i)
00101     {
00102
00103         i = i * K1;
00104         i = ROTR(i, R);
00105         i ^=  X;
00106         i = i * K2;
00107
00108         return i;
00109     }
00110
00111     #define MD2_PERM(x) md2_perm(x)
00112
00113 #endif
00114
00115
00120 static void md2_pad(void *_block, size_t len_pad)
00121 {
00122     uint8_t *block;
00123
00124     block = (uint8_t *)_block;
00125
00126     ASSERT(len_pad <= CONFIG_MD2_BLOCK_LEN);
00127
00128     /*
00129      * Fill input block with len_pad char.
00130      */
00131     memset(block, len_pad, len_pad);
00132
00133 }
00134
00135 static void md2_compute(void *_state, void *_checksum, void *_block)
00136 {
00137     int i = 0;
00138     uint16_t t = 0;
00139     uint8_t compute_array[COMPUTE_ARRAY_LEN];
00140     uint8_t *state;
00141     uint8_t *checksum;
00142     uint8_t *block;
00143
00144     state = (uint8_t *)_state;
00145     checksum  = (uint8_t *)_checksum;
00146     block = (uint8_t *)_block;
00147
00148     /*
00149      * Copy state and checksum context in compute array.
00150      */
00151     memcpy(compute_array, state, CONFIG_MD2_BLOCK_LEN);
00152     memcpy(compute_array + CONFIG_MD2_BLOCK_LEN, block, CONFIG_MD2_BLOCK_LEN);
00153
00154     /*
00155      * Fill compute array with state XOR block
00156      */
00157     for(i = 0; i < CONFIG_MD2_BLOCK_LEN; i++)
00158         compute_array[i + (CONFIG_MD2_BLOCK_LEN * 2)] = state[i] ^ block[i];
00159
00160     /*
00161      * Encryt block.
00162      */
00163     for(i = 0; i < NUM_COMPUTE_ROUNDS; i++)
00164     {
00165         for(int j = 0; j < COMPUTE_ARRAY_LEN; j++)
00166         {
00167             compute_array[j] ^= MD2_PERM(t);
00168             t = compute_array[j];
00169         }
00170
00171         t = (t + i) & 0xff; //modulo 256.
00172     }
00173     /*
00174      * Update checksum.
00175      */
00176     t = checksum[CONFIG_MD2_BLOCK_LEN - 1];
00177
00178     for(i = 0; i < CONFIG_MD2_BLOCK_LEN; i++)
00179     {
00180         checksum[i]  ^= MD2_PERM(block[i] ^ t);
00181         t = checksum[i];
00182     }
00183
00184     /*
00185      * Update state and clean compute array.
00186      */
00187     memcpy(state, compute_array, CONFIG_MD2_BLOCK_LEN);
00188     memset(compute_array, 0, sizeof(compute_array));
00189 }
00190
00196 void md2_init(Md2Context *context)
00197 {
00198
00199     memset(context, 0, sizeof(Md2Context));
00200
00201 }
00202
00206 void md2_update(Md2Context *context, const void *_block_in, size_t block_len)
00207 {
00208
00209     const uint8_t *block_in;
00210     size_t cpy_len;
00211
00212
00213     block_in = (const uint8_t *)_block_in;
00214
00215     while(block_len > 0)
00216     {
00217         /*
00218          * Choose a number of block that fill input context buffer.
00219          */
00220         cpy_len = MIN(block_len, CONFIG_MD2_BLOCK_LEN - context->counter);
00221
00222
00223         /*
00224          * Copy in the buffer input block.
00225          */
00226         memcpy(&context->buffer[context->counter], block_in, cpy_len);
00227
00228         /*
00229          * Update a context counter, input block length and remaning
00230          * context buffer block lenght.
00231          */
00232         context->counter += cpy_len;
00233         block_len -= cpy_len;
00234         block_in += cpy_len;
00235
00236         /*
00237          * If buffer is full, compute it.
00238          */
00239         if (context->counter >= CONFIG_MD2_BLOCK_LEN)
00240         {
00241             md2_compute(context->state, context->checksum, context->buffer);
00242             context->counter = 0;
00243         }
00244     }
00245
00246
00247 }
00256 uint8_t  *md2_end(Md2Context *context)
00257 {
00258
00259     uint8_t buf[CONFIG_MD2_BLOCK_LEN];
00260
00261     /*
00262      * Fill remaning empty context buffer.
00263      */
00264     md2_pad(buf, CONFIG_MD2_BLOCK_LEN - context->counter);
00265
00266     /*
00267      * Update context buffer and compute it.
00268      */
00269     md2_update(context, buf, CONFIG_MD2_BLOCK_LEN - context->counter);
00270
00271     /*
00272      * Add context checksum to message input.
00273      */
00274     md2_update(context, context->checksum, CONFIG_MD2_BLOCK_LEN);
00275
00276
00277     return context->state; //return a pointer to message digest.
00278 }
00288 bool md2_test(void)
00289 {
00290
00291     Md2Context context;
00292
00293     const char *test[] =
00294     {
00295         "",
00296         "message digest",
00297         "abcdefghijklmnopqrstuvwxyz",
00298         "12345678901234567890123456789012345678901234567890123456789012345678901234567890"
00299     };
00300
00301
00302     const char *result[] = {
00303         "\x83\x50\xe5\xa3\xe2\x4c\x15\x3d\xf2\x27\x5c\x9f\x80\x69\x27\x73",
00304         "\xab\x4f\x49\x6b\xfb\x2a\x53\x0b\x21\x9f\xf3\x30\x31\xfe\x06\xb0",
00305         "\x4e\x8d\xdf\xf3\x65\x02\x92\xab\x5a\x41\x08\xc3\xaa\x47\x94\x0b",
00306         "\xd5\x97\x6f\x79\xd8\x3d\x3a\x0d\xc9\x80\x6c\x3c\x66\xf3\xef\xd8",
00307     };
00308
00309
00310     for (size_t i = 0; i < countof(test); i++)
00311     {
00312         md2_init(&context);
00313         md2_update(&context, test[i], strlen(test[i]));
00314
00315         if(memcmp(result[i], md2_end(&context), MD2_DIGEST_LEN))
00316             return false;
00317     }
00318
00319     return true;
00320 }
00321
00322 #if 0
00323
00324 #include <stdio.h>
00325 int main(int argc, char * argv[])
00326 {
00327
00328     if(md2_test())
00329         printf("MD2 algorithm work well!\n");
00330     else
00331         printf("MD2 algorithm doesn't work well.\n");
00332
00333 }
00334
00335 #endif
00336


BeRTOS: md2.h File Reference

  • algo
Data Structures | Defines | Functions
md2.h File Reference

MD2 Message-Digest algorithm. More...

#include "cfg/cfg_md2.h"
#include <cfg/compiler.h>

Go to the source code of this file.

Data Structures

struct | Md2Context
Context for MD2 computation. More...

Defines

#define | NUM_COMPUTE_ROUNDS 18
Number of compute rounds.
#define | COMPUTE_ARRAY_LEN CONFIG_MD2_BLOCK_LEN * 3
Lenght of compute array.

Functions

void | md2_init (Md2Context *context)
Algorithm initialization.
void | md2_update (Md2Context *context, const void *block_in, size_t block_len)
Update block.
uint8_t * | md2_end (Md2Context *context)
Ends an MD2 message digest operation.
bool | md2_test (void)
MD2 test fuction.

Detailed Description

MD2 Message-Digest algorithm.

The algorithm takes as input a message of arbitrary length and produces as output a 128-bit message digest of the input. It is conjectured that it is computationally infeasible to produce two messages having the same message digest, or to produce any message having a given prespecified target message digest.

Author:
Daniele Basile <asterix@develer.com>

Definition in file md2.h.

Function Documentation

uint8_t* md2_end ( Md2Context * context )

Ends an MD2 message digest operation.

This fuction take an context and return a pointer to context state.

Parameters:
context in input.
Returns:
a pointer to context state (message digest).

Definition at line 256 of file md2.c.

void md2_init ( Md2Context * context )

Algorithm initialization.

Parameters:
context empty context.

Definition at line 196 of file md2.c.

bool md2_test ( void )

MD2 test fuction.

This function test MD2 algorithm with a standard string specified in RFC 1319.

Note:
This test work with official array of 256 byte pemutation contructed from digits of pi, defined in the RFC 1319.

Definition at line 288 of file md2.c.


BeRTOS: md2.h Source File

  • algo
md2.h
Go to the documentation of this file.
00001
00048 #ifndef ALGO_MD2_H
00049 #define ALGO_MD2_H
00050
00051 #include "cfg/cfg_md2.h"
00052 #include <cfg/compiler.h>
00053
00054 #define NUM_COMPUTE_ROUNDS 18                           ///< Number of compute rounds.
00055 #define COMPUTE_ARRAY_LEN  CONFIG_MD2_BLOCK_LEN * 3     ///< Lenght of compute array.
00056 #define MD2_DIGEST_LEN CONFIG_MD2_BLOCK_LEN
00057
00060 typedef struct Md2Context
00061 {
00062     uint8_t buffer[CONFIG_MD2_BLOCK_LEN];
00063     uint8_t state[CONFIG_MD2_BLOCK_LEN];
00064     uint8_t checksum[CONFIG_MD2_BLOCK_LEN];
00065     size_t counter;
00066
00067 } Md2Context;
00068
00069 void md2_init(Md2Context *context);
00070 void md2_update(Md2Context *context, const void *block_in, size_t block_len);
00071 uint8_t *md2_end(Md2Context *context);
00072 bool md2_test(void);
00073
00074 #endif /* ALGO_MD2_H */


BeRTOS: md5.c Source File

  • sec
  • hash
md5.c
00001 /*
00002  * This code implements the MD5 message-digest algorithm.
00003  * The algorithm is due to Ron Rivest.  This code was
00004  * written by Colin Plumb in 1993, no copyright is claimed.
00005  * This code is in the public domain; do with it what you wish.
00006  *
00007  * Equivalent code is available from RSA Data Security, Inc.
00008  * This code has been tested against that, and is equivalent,
00009  * except that you don't need to include two pages of legalese
00010  * with every copy.
00011  *
00012  * To compute the message digest of a chunk of bytes, declare an
00013  * MD5Context structure, pass it to MD5Init, call MD5Update as
00014  * needed on buffers full of bytes, and then call MD5Final, which
00015  * will fill a supplied 16-byte array with the digest.
00016  */
00017
00018 #include "md5.h"
00019 #include <sec/util.h>
00020 #include <cpu/byteorder.h>
00021 #include <string.h>
00022
00023 static void MD5Transform(uint32_t buf[4], uint32_t in[16]);
00024
00025 static void byteReverse(uint32_t *buf, unsigned longs)
00026 {
00027     do {
00028         *buf = le32_to_cpu(*buf);
00029         ++buf;
00030     } while (--longs);
00031 }
00032
00033 /*
00034  * Start MD5 accumulation.  Set bit count to 0 and buffer to mysterious
00035  * initialization constants.
00036  */
00037 static void MD5_begin(Hash *h)
00038 {
00039     MD5_Context *ctx = (MD5_Context *)h;
00040
00041     ctx->buf[0] = 0x67452301;
00042     ctx->buf[1] = 0xefcdab89;
00043     ctx->buf[2] = 0x98badcfe;
00044     ctx->buf[3] = 0x10325476;
00045
00046     ctx->bits = 0;
00047 }
00048
00049 /*
00050  * Update context to reflect the concatenation of another buffer full
00051  * of bytes.
00052  */
00053 static void MD5_update(Hash *h, const void* vbuf, size_t len)
00054 {
00055     MD5_Context *ctx = (MD5_Context *)h;
00056     const char *buf = (const char *)vbuf;
00057     uint32_t t;
00058
00059     /* Update bitcount */
00060     t = (ctx->bits >> 3) & 0x3f;        /* Bytes already in shsInfo->data */
00061     ctx->bits += len*8;
00062
00063     /* Handle any leading odd-sized chunks */
00064
00065     if (t) {
00066         uint8_t *p = (uint8_t*) ctx->in + t;
00067
00068         t = 64 - t;
00069         if (len < t) {
00070             memcpy(p, buf, len);
00071             return;
00072         }
00073         memcpy(p, buf, t);
00074         byteReverse((uint32_t*)ctx->in, 16);
00075         MD5Transform(ctx->buf, (uint32_t*)ctx->in);
00076         buf += t;
00077         len -= t;
00078     }
00079     /* Process data in 64-byte chunks */
00080
00081     while (len >= 64) {
00082         memcpy(ctx->in, buf, 64);
00083         byteReverse((uint32_t*)ctx->in, 16);
00084         MD5Transform(ctx->buf, (uint32_t*)ctx->in);
00085         buf += 64;
00086         len -= 64;
00087     }
00088
00089     /* Handle any remaining bytes of data. */
00090     memcpy(ctx->in, buf, len);
00091 }
00092
00093 /*
00094  * Final wrapup - pad to 64-byte boundary with the bit pattern
00095  * 1 0* (64-bit count of bits processed, MSB-first)
00096  */
00097 static uint8_t* MD5_final(struct Hash *h)
00098 {
00099     MD5_Context *ctx = (MD5_Context *)h;
00100     unsigned count;
00101     unsigned char *p;
00102
00103     /* Compute number of bytes mod 64 */
00104     count = (ctx->bits >> 3) & 0x3F;
00105
00106     /* Set the first char of padding to 0x80.  This is safe since there is
00107        always at least one byte free */
00108     p = ctx->in + count;
00109     *p++ = 0x80;
00110
00111     /* Bytes of padding needed to make 64 bytes */
00112     count = 64 - 1 - count;
00113
00114     /* Pad out to 56 mod 64 */
00115     if (count < 8) {
00116         /* Two lots of padding:  Pad the first block to 64 bytes */
00117         memset(p, 0, count);
00118         byteReverse((uint32_t*)ctx->in, 16);
00119         MD5Transform(ctx->buf, (uint32_t *) ctx->in);
00120
00121         /* Now fill the next block with 56 bytes */
00122         memset(ctx->in, 0, 56);
00123     } else {
00124         /* Pad block to 56 bytes */
00125         memset(p, 0, count - 8);
00126     }
00127     byteReverse((uint32_t*)ctx->in, 14);
00128
00129     /* Append length in bits and transform */
00130     ((uint32_t*) ctx->in)[14] = (uint32_t)ctx->bits;
00131     ((uint32_t*) ctx->in)[15] = (uint32_t)(ctx->bits >> 32);
00132
00133     MD5Transform(ctx->buf, (uint32_t *) ctx->in);
00134     byteReverse((uint32_t*)ctx->buf, 4);
00135
00136     PURGE(ctx->in);
00137     PURGE(ctx->bits);
00138
00139     return (uint8_t *)ctx->buf;
00140 }
00141
00142
00143 /* The four core functions - F1 is optimized somewhat */
00144
00145 /* #define F1(x, y, z) (x & y | ~x & z) */
00146 #define F1(x, y, z) (z ^ (x & (y ^ z)))
00147 #define F2(x, y, z) F1(z, x, y)
00148 #define F3(x, y, z) (x ^ y ^ z)
00149 #define F4(x, y, z) (y ^ (x | ~z))
00150
00151 /* This is the central step in the MD5 algorithm. */
00152 #define MD5STEP(f, w, x, y, z, data, s) \
00153         ( w += f(x, y, z) + data,  w = w<<s | w>>(32-s),  w += x )
00154
00155 /*
00156  * The core of the MD5 algorithm, this alters an existing MD5 hash to
00157  * reflect the addition of 16 longwords of new data.  MD5Update blocks
00158  * the data and converts bytes into longwords for this routine.
00159  */
00160 static void MD5Transform(uint32_t buf[4], uint32_t in[16])
00161 {
00162     register uint32_t a, b, c, d;
00163
00164     a = buf[0];
00165     b = buf[1];
00166     c = buf[2];
00167     d = buf[3];
00168
00169     MD5STEP(F1, a, b, c, d, in[0] + 0xd76aa478, 7);
00170     MD5STEP(F1, d, a, b, c, in[1] + 0xe8c7b756, 12);
00171     MD5STEP(F1, c, d, a, b, in[2] + 0x242070db, 17);
00172     MD5STEP(F1, b, c, d, a, in[3] + 0xc1bdceee, 22);
00173     MD5STEP(F1, a, b, c, d, in[4] + 0xf57c0faf, 7);
00174     MD5STEP(F1, d, a, b, c, in[5] + 0x4787c62a, 12);
00175     MD5STEP(F1, c, d, a, b, in[6] + 0xa8304613, 17);
00176     MD5STEP(F1, b, c, d, a, in[7] + 0xfd469501, 22);
00177     MD5STEP(F1, a, b, c, d, in[8] + 0x698098d8, 7);
00178     MD5STEP(F1, d, a, b, c, in[9] + 0x8b44f7af, 12);
00179     MD5STEP(F1, c, d, a, b, in[10] + 0xffff5bb1, 17);
00180     MD5STEP(F1, b, c, d, a, in[11] + 0x895cd7be, 22);
00181     MD5STEP(F1, a, b, c, d, in[12] + 0x6b901122, 7);
00182     MD5STEP(F1, d, a, b, c, in[13] + 0xfd987193, 12);
00183     MD5STEP(F1, c, d, a, b, in[14] + 0xa679438e, 17);
00184     MD5STEP(F1, b, c, d, a, in[15] + 0x49b40821, 22);
00185
00186     MD5STEP(F2, a, b, c, d, in[1] + 0xf61e2562, 5);
00187     MD5STEP(F2, d, a, b, c, in[6] + 0xc040b340, 9);
00188     MD5STEP(F2, c, d, a, b, in[11] + 0x265e5a51, 14);
00189     MD5STEP(F2, b, c, d, a, in[0] + 0xe9b6c7aa, 20);
00190     MD5STEP(F2, a, b, c, d, in[5] + 0xd62f105d, 5);
00191     MD5STEP(F2, d, a, b, c, in[10] + 0x02441453, 9);
00192     MD5STEP(F2, c, d, a, b, in[15] + 0xd8a1e681, 14);
00193     MD5STEP(F2, b, c, d, a, in[4] + 0xe7d3fbc8, 20);
00194     MD5STEP(F2, a, b, c, d, in[9] + 0x21e1cde6, 5);
00195     MD5STEP(F2, d, a, b, c, in[14] + 0xc33707d6, 9);
00196     MD5STEP(F2, c, d, a, b, in[3] + 0xf4d50d87, 14);
00197     MD5STEP(F2, b, c, d, a, in[8] + 0x455a14ed, 20);
00198     MD5STEP(F2, a, b, c, d, in[13] + 0xa9e3e905, 5);
00199     MD5STEP(F2, d, a, b, c, in[2] + 0xfcefa3f8, 9);
00200     MD5STEP(F2, c, d, a, b, in[7] + 0x676f02d9, 14);
00201     MD5STEP(F2, b, c, d, a, in[12] + 0x8d2a4c8a, 20);
00202
00203     MD5STEP(F3, a, b, c, d, in[5] + 0xfffa3942, 4);
00204     MD5STEP(F3, d, a, b, c, in[8] + 0x8771f681, 11);
00205     MD5STEP(F3, c, d, a, b, in[11] + 0x6d9d6122, 16);
00206     MD5STEP(F3, b, c, d, a, in[14] + 0xfde5380c, 23);
00207     MD5STEP(F3, a, b, c, d, in[1] + 0xa4beea44, 4);
00208     MD5STEP(F3, d, a, b, c, in[4] + 0x4bdecfa9, 11);
00209     MD5STEP(F3, c, d, a, b, in[7] + 0xf6bb4b60, 16);
00210     MD5STEP(F3, b, c, d, a, in[10] + 0xbebfbc70, 23);
00211     MD5STEP(F3, a, b, c, d, in[13] + 0x289b7ec6, 4);
00212     MD5STEP(F3, d, a, b, c, in[0] + 0xeaa127fa, 11);
00213     MD5STEP(F3, c, d, a, b, in[3] + 0xd4ef3085, 16);
00214     MD5STEP(F3, b, c, d, a, in[6] + 0x04881d05, 23);
00215     MD5STEP(F3, a, b, c, d, in[9] + 0xd9d4d039, 4);
00216     MD5STEP(F3, d, a, b, c, in[12] + 0xe6db99e5, 11);
00217     MD5STEP(F3, c, d, a, b, in[15] + 0x1fa27cf8, 16);
00218     MD5STEP(F3, b, c, d, a, in[2] + 0xc4ac5665, 23);
00219
00220     MD5STEP(F4, a, b, c, d, in[0] + 0xf4292244, 6);
00221     MD5STEP(F4, d, a, b, c, in[7] + 0x432aff97, 10);
00222     MD5STEP(F4, c, d, a, b, in[14] + 0xab9423a7, 15);
00223     MD5STEP(F4, b, c, d, a, in[5] + 0xfc93a039, 21);
00224     MD5STEP(F4, a, b, c, d, in[12] + 0x655b59c3, 6);
00225     MD5STEP(F4, d, a, b, c, in[3] + 0x8f0ccc92, 10);
00226     MD5STEP(F4, c, d, a, b, in[10] + 0xffeff47d, 15);
00227     MD5STEP(F4, b, c, d, a, in[1] + 0x85845dd1, 21);
00228     MD5STEP(F4, a, b, c, d, in[8] + 0x6fa87e4f, 6);
00229     MD5STEP(F4, d, a, b, c, in[15] + 0xfe2ce6e0, 10);
00230     MD5STEP(F4, c, d, a, b, in[6] + 0xa3014314, 15);
00231     MD5STEP(F4, b, c, d, a, in[13] + 0x4e0811a1, 21);
00232     MD5STEP(F4, a, b, c, d, in[4] + 0xf7537e82, 6);
00233     MD5STEP(F4, d, a, b, c, in[11] + 0xbd3af235, 10);
00234     MD5STEP(F4, c, d, a, b, in[2] + 0x2ad7d2bb, 15);
00235     MD5STEP(F4, b, c, d, a, in[9] + 0xeb86d391, 21);
00236
00237     buf[0] += a;
00238     buf[1] += b;
00239     buf[2] += c;
00240     buf[3] += d;
00241 }
00242
00243 /*******************************************************************/
00244
00245 void MD5_init(MD5_Context *ctx)
00246 {
00247     ctx->h.begin = MD5_begin;
00248     ctx->h.update = MD5_update;
00249     ctx->h.final = MD5_final;
00250     ctx->h.digest_len = 16;
00251     ctx->h.block_len = 64;
00252 }


BeRTOS: md5.h File Reference

  • sec
  • hash
md5.h File Reference

MD5 Hashing algorithm. More...

#include <sec/hash.h>
#include <cfg/compiler.h>
#include <alloca.h>

Go to the source code of this file.

Detailed Description

MD5 Hashing algorithm.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file md5.h.


BeRTOS: md5.h Source File

  • sec
  • hash
md5.h
Go to the documentation of this file.
00001
00039 #ifndef SEC_HASH_MD5_H
00040 #define SEC_HASH_MD5_H
00041
00042 #include <sec/hash.h>
00043 #include <cfg/compiler.h>
00044 #include <alloca.h>
00045
00046 typedef struct
00047 {
00048     Hash h;
00049     uint32_t buf[4];
00050     uint8_t in[64];
00051     uint64_t bits;
00052
00053 } MD5_Context;
00054
00055 void MD5_init(MD5_Context *ctx);
00056
00057 #define MD5_stackinit(...) \
00058     ({ MD5_Context *ctx = alloca(sizeof(MD5_Context)); MD5_init(ctx , ##__VA_ARGS__); &ctx->h; })
00059
00060 int MD5_testSetup(void);
00061 int MD5_testRun(void);
00062 int MD5_testTearDown(void);
00063
00064 #endif /* SEC_HASH_MD5_H */


BeRTOS: mean.h Source File

  • algo
mean.h
00001 #warning revise me!
00002
00003
00014 #define DECLARE_SMEAN(name, Type, SumType) \
00015     struct { \
00016         SumType sum; \
00017         Type result; \
00018         int count; \
00019     } name = { 0, 0, 0 }
00020
00026 #define SMEAN_ADD(mean, sample, max_samples) \
00027     do { \
00028         (mean).sum += (sample); \
00029         if ((mean).count++ >= (max_samples)) \
00030         { \
00031             (mean).result = (mean).sum / (max_samples); \
00032             (mean).sum = 0; \
00033             (mean).count = 0; \
00034         } \
00035     } while (0)
00036
00040 #define SMEAN_GET(mean)  ((mean).result)
00041


BeRTOS: menu.c File Reference

  • gui
Functions
menu.c File Reference

General pourpose menu handling functions. More...

#include "menu.h"
#include "cfg/cfg_menu.h"
#include "cfg/cfg_arch.h"
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <gfx/gfx.h>
#include <gfx/font.h>
#include <gfx/text.h>
#include <cpu/power.h>
#include <drv/kbd.h>
#include <string.h>

Go to the source code of this file.

Functions

static int | menu_count (const struct Menu *menu)
Return the total number of items in in a menu.
static void | menu_layout (const struct Menu *menu, int first_item, int selected, bool redraw)
Show a menu on the display.
static iptr_t | menu_doselect (const struct Menu *menu, struct MenuItem *item)
Handle menu item selection.
static int | menu_next_visible_item (const struct Menu *menu, int index)
Return the next visible item (rolls back to the first item)
static int | menu_prev_visible_item (const struct Menu *menu, int index)
Return the previous visible item (rolls back to the last item)
iptr_t | menu_handle (const struct Menu *menu)
Handle a menu and invoke hook functions for the selected menu items.
int | menu_setFlags (struct Menu *menu, int idx, int flags)
Set flags on a menuitem.
int | menu_clearFlags (struct Menu *menu, int idx, int flags)
Clear flags on a menuitem.

Detailed Description

General pourpose menu handling functions.

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file menu.c.


BeRTOS: menu.c Source File

  • gui
menu.c
Go to the documentation of this file.
00001
00040 #include "menu.h"
00041
00042 #include "cfg/cfg_menu.h"
00043 #include "cfg/cfg_arch.h"
00044
00045 #include <cfg/compiler.h>
00046 #include <cfg/debug.h>
00047
00048 #include <gfx/gfx.h>
00049 #include <gfx/font.h>
00050 #include <gfx/text.h>
00051
00052 #include <cpu/power.h>
00053
00054 #include <drv/kbd.h>
00055
00056 #include <string.h> /* strcpy() */
00057
00058 #if CPU_HARVARD
00059 #include <avr/pgmspace.h> /* strncpy_P() */
00060 #endif
00061
00062 #if (CONFIG_MENU_TIMEOUT != 0)
00063 #include <drv/timer.h>
00064 #endif
00065
00066 #if CONFIG_MENU_MENUBAR
00067 #include "menubar.h"
00068 #endif
00069
00070 #if defined(CONFIG_LOCALE) && (CONFIG_LOCALE == 1)
00071 #include "msg.h"
00072 #else
00073 #define PTRMSG(x) ((const char *)x)
00074 #endif
00075
00076
00077 /* Temporary fake defines for ABORT stuff... */
00078 #define abort_top  0
00079 #define PUSH_ABORT false
00080 #define POP_ABORT  do {} while(0)
00081 #define DO_ABORT   do {} while(0)
00082
00083
00087 static int menu_count(const struct Menu *menu)
00088 {
00089     int cnt = 0;
00090
00091     for (cnt = 0; /*NOP*/; ++cnt)
00092     {
00093         const MenuItem *item = &menu->items[cnt];
00094 #if CPU_HARVARD
00095         MenuItem ram_item;
00096         if (menu->flags & MF_ROMITEMS)
00097         {
00098             memcpy_P(&ram_item, item, sizeof(ram_item));
00099             item = &ram_item;
00100         }
00101 #endif
00102         if (!(item->label || item->hook))
00103             break;
00104     }
00105
00106     return cnt;
00107 }
00108
00109 #if CONFIG_MENU_MENUBAR
00110
00114 static void menu_update_menubar(
00115         const struct Menu *menu,
00116         struct MenuBar *mb,
00117         int selected)
00118 {
00119     int item_flags;
00120 #if CPU_HARVARD
00121     if (menu->flags & MF_ROMITEMS)
00122     {
00123         ASSERT(sizeof(menu->items[selected].flags) == sizeof(int));
00124         item_flags = pgm_read_int(&menu->items[selected].flags);
00125     }
00126     else
00127 #endif
00128         item_flags = menu->items[selected].flags;
00129
00130     const_iptr_t newlabel = (const_iptr_t)LABEL_OK;
00131
00132     if (item_flags & MIF_DISABLED)
00133         newlabel = (const_iptr_t)LABEL_EMPTY;
00134     else if (item_flags & MIF_TOGGLE)
00135         newlabel = (const_iptr_t)LABEL_SEL;
00136     else if (item_flags & MIF_CHECKIT)
00137     {
00138         newlabel = (item_flags & MIF_CHECKED) ?
00139             (const_iptr_t)LABEL_EMPTY : (const_iptr_t)LABEL_SEL;
00140     }
00141
00142     mb->labels[3] = newlabel;
00143     mbar_draw(mb);
00144 }
00145 #endif /* CONFIG_MENU_MENUBAR */
00146
00147
00148 static void menu_defaultRenderHook(struct Bitmap *bm, int ypos, bool selected, const struct MenuItem *item)
00149 {
00150     if (item->flags & MIF_CHECKIT)
00151     {
00152         gfx_rectClear(bm, 0, ypos,
00153                 bm->font->height, ypos + bm->font->height);
00154
00155         if (item->flags & MIF_TOGGLE)
00156             gfx_rectDraw(bm, 2, ypos + 2,
00157                     bm->font->height - 2, ypos + bm->font->height - 2);
00158         if (item->flags & MIF_CHECKED)
00159         {
00160             gfx_line(bm,
00161                     3, ypos + 3,
00162                     bm->font->height - 3, ypos + bm->font->height - 3);
00163             gfx_line(bm,
00164                     bm->font->height - 3, ypos + 3,
00165                     3, ypos + bm->font->height - 3);
00166         }
00167     }
00168
00169 #if CPU_HARVARD
00170     ((item->flags & MIF_RAMLABEL) ? text_xyprintf : text_xyprintf_P)
00171 #else
00172     text_xyprintf
00173 #endif
00174     (
00175         bm, (item->flags & MIF_CHECKIT) ? bm->font->height : 0, ypos,
00176         selected ? (STYLEF_INVERT | TEXT_FILL) : TEXT_FILL,
00177         PTRMSG(item->label)
00178     );
00179 }
00180
00184 static void menu_layout(
00185         const struct Menu *menu,
00186         int first_item,
00187         int selected,
00188         bool redraw)
00189 {
00190     coord_t ypos;
00191     int i;
00192     const char * PROGMEM title = PTRMSG(menu->title);
00193     Bitmap *bm = menu->bitmap;
00194
00195     ypos = bm->cr.ymin;
00196
00197     if (redraw)
00198     {
00199         /* Clear screen */
00200         text_clear(menu->bitmap);
00201     }
00202
00203     if (title)
00204     {
00205         if (redraw)
00206             text_xyprintf(bm, 0, ypos, STYLEF_UNDERLINE | STYLEF_BOLD | TEXT_CENTER | TEXT_FILL, title);
00207         ypos += bm->font->height;
00208     }
00209
00210 #if CONFIG_MENU_SMOOTH
00211     static coord_t yoffset = 0;
00212     static int old_first_item = 0;
00213     static int speed;
00214     coord_t old_ymin = bm->cr.ymin;
00215
00216     /* Clip drawing inside menu items area */
00217     gfx_setClipRect(bm,
00218         bm->cr.xmin, bm->cr.ymin + ypos,
00219         bm->cr.xmax, bm->cr.ymax);
00220
00221     if (old_first_item != first_item)
00222     {
00223         /* Speed proportional to distance */
00224         speed = ABS(old_first_item - first_item) * 3;
00225
00226         if (old_first_item > first_item)
00227         {
00228             yoffset += speed;
00229             if (yoffset > bm->font->height)
00230             {
00231                     yoffset = 0;
00232                     --old_first_item;
00233             }
00234         }
00235         else
00236         {
00237             yoffset -= speed;
00238             if (yoffset < -bm->font->height)
00239             {
00240                     yoffset = 0;
00241                     ++old_first_item;
00242             }
00243         }
00244         first_item = MIN(old_first_item, menu_count(menu));
00245
00246         ypos += yoffset;
00247         redraw = true;
00248     }
00249 #endif /* CONFIG_MENU_SMOOTH */
00250
00251     if (redraw) for (i = first_item; ; ++i)
00252     {
00253         const MenuItem *item = &menu->items[i];
00254 #if CPU_HARVARD
00255         MenuItem ram_item;
00256         if (menu->flags & MF_ROMITEMS)
00257         {
00258             memcpy_P(&ram_item, item, sizeof(ram_item));
00259             item = &ram_item;
00260         }
00261 #endif /* CPU_HARVARD */
00262
00263         /* Check for end of room */
00264         if (ypos > bm->cr.ymax)
00265             break;
00266
00267         /* Check for end of menu */
00268         if (!(item->label || item->hook))
00269             break;
00270
00271         /* Only print visible items */
00272         if (!(item->flags & MIF_HIDDEN))
00273         {
00274             #warning __FILTER_NEXT_WARNING__
00275             RenderHook renderhook = (item->flags & MIF_RENDERHOOK) ? (RenderHook)item->label : menu_defaultRenderHook;
00276
00277             /* Render menuitem */
00278             renderhook(menu->bitmap, ypos++, (i == selected), item);
00279
00280             ypos += bm->font->height;
00281         }
00282     }
00283
00284 #if CONFIG_MENU_SMOOTH
00285     if (redraw)
00286     {
00287         /* Clear rest of area */
00288         gfx_rectClear(bm, bm->cr.xmin, ypos, bm->cr.xmax, bm->cr.ymax);
00289
00290         menu->lcd_blitBitmap(bm);
00291     }
00292
00293     /* Restore old cliprect */
00294     gfx_setClipRect(bm,
00295             bm->cr.xmin, old_ymin,
00296             bm->cr.xmax, bm->cr.ymax);
00297
00298 #endif /* CONFIG_MENU_SMOOTH */
00299 }
00300
00301
00305 static iptr_t menu_doselect(const struct Menu *menu, struct MenuItem *item)
00306 {
00307     iptr_t result = 0;
00308
00309     /* Exclude other items */
00310     int mask, i;
00311     for (mask = item->flags & MIF_EXCLUDE_MASK, i = 0; mask; mask >>= 1, ++i)
00312     {
00313         if (mask & 1)
00314             menu->items[i].flags &= ~MIF_CHECKED;
00315     }
00316
00317     if (item->flags & MIF_DISABLED)
00318         return MENU_DISABLED;
00319
00320     /* Handle checkable items */
00321     if (item->flags & MIF_TOGGLE)
00322         item->flags ^= MIF_CHECKED;
00323     else if (item->flags & MIF_CHECKIT)
00324         item->flags |= MIF_CHECKED;
00325
00326     /* Handle items with callback hooks */
00327     if (item->hook)
00328     {
00329         /* Push a jmp buffer to abort the operation with the STOP/CANCEL key */
00330         if (!PUSH_ABORT)
00331         {
00332             result = item->hook(item->userdata);
00333             POP_ABORT;
00334         }
00335     }
00336     else
00337         result = item->userdata;
00338
00339     return result;
00340 }
00341
00342
00346 static int menu_next_visible_item(const struct Menu *menu, int index)
00347 {
00348     int total = menu_count(menu);
00349     int item_flags;
00350
00351     do
00352     {
00353         if (++index >= total)
00354            index = 0;
00355
00356 #if CPU_HARVARD
00357         if (menu->flags & MF_ROMITEMS)
00358         {
00359             ASSERT(sizeof(menu->items[index].flags) == sizeof(int));
00360             item_flags = pgm_read_int(&menu->items[index].flags);
00361         }
00362         else
00363 #endif
00364             item_flags = menu->items[index].flags;
00365     }
00366     while (item_flags & MIF_HIDDEN);
00367
00368     return index;
00369 }
00370
00371
00375 static int menu_prev_visible_item(const struct Menu *menu, int index)
00376 {
00377     int total = menu_count(menu);
00378     int item_flags;
00379
00380     do
00381     {
00382         if (--index < 0)
00383             index = total - 1;
00384
00385 #if CPU_HARVARD
00386         if (menu->flags & MF_ROMITEMS)
00387         {
00388             ASSERT(sizeof(menu->items[index].flags) == sizeof(int));
00389             item_flags = pgm_read_int(&menu->items[index].flags);
00390         }
00391         else
00392 #endif
00393             item_flags = menu->items[index].flags;
00394     }
00395     while (item_flags & MIF_HIDDEN);
00396
00397     return index;
00398 }
00399
00400
00404 iptr_t menu_handle(const struct Menu *menu)
00405 {
00406     uint8_t items_per_page;
00407     uint8_t first_item = 0;
00408     uint8_t selected;
00409     iptr_t result = 0;
00410     bool redraw = true;
00411
00412 #if (CONFIG_MENU_TIMEOUT != 0)
00413     ticks_t now, menu_idle_time = timer_clock();
00414 #endif
00415
00416 #if CONFIG_MENU_MENUBAR
00417     struct MenuBar mb;
00418     const_iptr_t labels[] =
00419     {
00420         (const_iptr_t)LABEL_BACK,
00421         (const_iptr_t)LABEL_UPARROW,
00422         (const_iptr_t)LABEL_DOWNARROW,
00423         (const_iptr_t)0
00424     };
00425
00426     /*
00427      * Initialize menu bar
00428      */
00429     if (menu->flags & MF_TOPLEVEL)
00430         labels[0] = (const_iptr_t)LABEL_EMPTY;
00431
00432     mbar_init(&mb, menu->bitmap, labels, countof(labels));
00433 #endif /* CONFIG_MENU_MENUBAR */
00434
00435
00436     items_per_page =
00437         (menu->bitmap->height / menu->bitmap->font->height - 1)
00438 #if CONFIG_MENU_MENUBAR
00439         - 1 /* menu bar labels */
00440 #endif
00441         - (menu->title ? 1 : 0);
00442
00443     /* Selected item should be a visible entry */
00444     //first_item = selected = menu_next_visible_item(menu, menu->selected - 1);
00445     selected = menu->selected;
00446     first_item = 0;
00447
00448     for(;;)
00449     {
00450         keymask_t key;
00451
00452         /*
00453          * Keep selected item visible
00454          */
00455         while (selected < first_item)
00456             first_item = menu_prev_visible_item(menu, first_item);
00457         while (selected >= first_item + items_per_page)
00458             first_item = menu_next_visible_item(menu, first_item);
00459
00460         menu_layout(menu, first_item, selected, redraw);
00461         redraw = false;
00462
00463         #if CONFIG_MENU_MENUBAR
00464             menu_update_menubar(menu, &mb, selected);
00465         #endif
00466
00467         #if CONFIG_MENU_SMOOTH || (CONFIG_MENU_TIMEOUT != 0)
00468             key = kbd_peek();
00469             cpu_relax();
00470         #else
00471             key = kbd_get();
00472         #endif
00473
00474         #if (CONFIG_MENU_TIMEOUT != 0)
00475             /* Reset idle timer on key press. */
00476             now = timer_clock();
00477             if (key)
00478                 menu_idle_time = now;
00479         #endif
00480
00481         if (key & K_OK)
00482         {
00483             struct MenuItem *item = &(menu->items[selected]);
00484 #if CPU_HARVARD
00485             MenuItem ram_item;
00486             if (menu->flags & MF_ROMITEMS)
00487             {
00488                 memcpy_P(&ram_item, item, sizeof(ram_item));
00489                 item = &ram_item;
00490             }
00491 #endif
00492             result = menu_doselect(menu, item);
00493             redraw = true;
00494
00495             /* Return immediately */
00496             if (!(menu->flags & MF_STICKY))
00497                 break;
00498
00499             #if (CONFIG_MENU_TIMEOUT != 0)
00500                 /* Chain timeout */
00501                 if ((result == MENU_TIMEOUT) && !(menu->flags & MF_TOPLEVEL))
00502                     break;
00503
00504                 /* Reset timeout */
00505                 menu_idle_time = timer_clock();
00506             #endif
00507         }
00508         else if (key & K_UP)
00509         {
00510             selected = menu_prev_visible_item(menu, selected);
00511             redraw = true;
00512         }
00513         else if (key & K_DOWN)
00514         {
00515             selected = menu_next_visible_item(menu, selected);
00516             redraw = true;
00517         }
00518         else if (!(menu->flags & MF_TOPLEVEL))
00519         {
00520             if (key & K_CANCEL)
00521             {
00522                 result = MENU_CANCEL;
00523                 break;
00524             }
00525
00526             #if CONFIG_MENU_TIMEOUT != 0
00527                 if (now - menu_idle_time > ms_to_ticks(CONFIG_MENU_TIMEOUT))
00528                 {
00529                     result = MENU_TIMEOUT;
00530                     break;
00531                 }
00532             #endif
00533         }
00534     }
00535
00536     /* Store currently selected item before leaving. */
00537     if (menu->flags & MF_SAVESEL)
00538         #warning __FILTER_NEXT_WARNING__
00539         CONST_CAST(struct Menu *, menu)->selected = selected;
00540
00541     return result;
00542 }
00543
00544
00554 int menu_setFlags(struct Menu *menu, int idx, int flags)
00555 {
00556     ASSERT(idx < menu_count(menu));
00557     ASSERT(!(menu->flags & MF_ROMITEMS));
00558
00559     int old = menu->items[idx].flags;
00560     menu->items[idx].flags |= flags;
00561     return old;
00562 }
00563
00564
00574 int menu_clearFlags(struct Menu *menu, int idx, int flags)
00575 {
00576     ASSERT(idx < menu_count(menu));
00577     ASSERT(!(menu->flags & MF_ROMITEMS));
00578
00579     int old = menu->items[idx].flags;
00580     menu->items[idx].flags &= ~flags;
00581     return old;
00582 }


BeRTOS: menu.h File Reference

  • gui
Data Structures | Typedefs | Functions
menu.h File Reference
#include <cfg/compiler.h>
#include <gfx/gfx.h>

Go to the source code of this file.

Data Structures

struct | MenuItem
Menu item description. More...
struct | Menu
Menu description. More...

Defines

Flags for MenuItem.flags.
#define | MIF_EXCLUDE_MASK 0x00FF
Mask for mutual exclusion map (shared with priority).
#define | MIF_PRI_MASK 0x00FF
Mask for priority value (shared with mutual exclusion).
#define | MIF_PRI(x) ((x) & MIF_PRI_MASK)
Set menu item priority.
#define | MIF_EXCLUDE_0 BV(0)
Exclude item 0 when this item is checked.
#define | MIF_EXCLUDE_1 BV(1)
Exclude item 1 when this item is checked.
#define | MIF_EXCLUDE_2 BV(2)
Exclude item 2 when this item is checked.
#define | MIF_EXCLUDE_3 BV(3)
Exclude item 3 when this item is checked.
#define | MIF_EXCLUDE_4 BV(4)
Exclude item 4 when this item is checked.
#define | MIF_EXCLUDE_5 BV(5)
Exclude item 5 when this item is checked.
#define | MIF_EXCLUDE_6 BV(6)
Exclude item 6 when this item is checked.
#define | MIF_EXCLUDE_7 BV(7)
Exclude item 7 when this item is checked.
#define | MIF_CHECKED BV(8)
Item is currently checked.
#define | MIF_CHECKIT BV(9)
Automatically check this item when selected.
#define | MIF_TOGGLE BV(10)
Toggle MIF_CHECKED when item is selected.
#define | MIF_HIDDEN BV(11)
This menu item is not visible.
#define | MIF_DISABLED BV(12)
This menu item is not visible.
#define | MIF_RAMLABEL BV(13)
Item label is stored in RAM, not in program memory.
#define | MIF_RENDERHOOK BV(14)
Menu render function is passed in label field.
Flags for Menu.flags.
#define | MF_STICKY BV(0)
Stay in the menu when the items called return.
#define | MF_TOPLEVEL BV(1)
Top-level menu (do not display "back" label)
#define | MF_ROMITEMS BV(2)
Menu items are stored in ROM (default is RAM)
#define | MF_SAVESEL BV(3)
Remember the selected item across invocations.
Special result codes for menu_handle().
#define | MENU_OK ((iptr_t)0)
#define | MENU_CANCEL ((iptr_t)-1)
#define | MENU_TIMEOUT ((iptr_t)-2)
#define | MENU_ABORT ((iptr_t)-3)
#define | MENU_DISABLED ((iptr_t)-4)

Typedefs

typedef iptr_t(* | MenuHook )(iptr_t userdata)
Menu callback function.
typedef void(* | RenderHook )(struct Bitmap *bitmap, int ypos, bool selected, const struct MenuItem *item)
Render hook callback function prototype.

Functions

iptr_t | menu_handle (const struct Menu *menu)
Handle a menu and invoke hook functions for the selected menu items.
int | menu_setFlags (struct Menu *menu, int idx, int flags)
Set flags on a menuitem.
int | menu_clearFlags (struct Menu *menu, int idx, int flags)
Clear flags on a menuitem.

Detailed Description

Definition in file menu.h.


BeRTOS: menu.h Source File

  • gui
menu.h
Go to the documentation of this file.
00001
00046 #ifndef GUI_MENU_H
00047 #define GUI_MENU_H
00048
00049 #include <cfg/compiler.h>
00050
00051 #include <gfx/gfx.h>
00052
00054 typedef iptr_t (*MenuHook)(iptr_t userdata);
00055 typedef void (*BlitBitmap)(const Bitmap *bm);
00056
00060 typedef struct MenuItem
00061 {
00062     const_iptr_t label;
00063     int          flags;
00064     MenuHook     hook;
00065     iptr_t       userdata;
00066 } MenuItem;
00067
00069 typedef void (*RenderHook)(struct Bitmap *bitmap, int ypos, bool selected, const struct MenuItem *item);
00070
00075 #define MIF_EXCLUDE_MASK    0x00FF
00076 #define MIF_PRI_MASK        0x00FF
00077 #define MIF_PRI(x)          ((x) & MIF_PRI_MASK)
00078 #define MIF_EXCLUDE_0       BV(0)
00079 #define MIF_EXCLUDE_1       BV(1)
00080 #define MIF_EXCLUDE_2       BV(2)
00081 #define MIF_EXCLUDE_3       BV(3)
00082 #define MIF_EXCLUDE_4       BV(4)
00083 #define MIF_EXCLUDE_5       BV(5)
00084 #define MIF_EXCLUDE_6       BV(6)
00085 #define MIF_EXCLUDE_7       BV(7)
00086 #define MIF_CHECKED         BV(8)
00087 #define MIF_CHECKIT         BV(9)
00088 #define MIF_TOGGLE          BV(10)
00089 #define MIF_HIDDEN          BV(11)
00090 #define MIF_DISABLED        BV(12)
00091 #define MIF_RAMLABEL        BV(13)
00092 #define MIF_RENDERHOOK      BV(14)
00093 /* \} */
00094
00098 typedef struct Menu
00099 {
00100     MenuItem        *items;
00101     const_iptr_t     title;
00102     int              flags;
00103     struct Bitmap   *bitmap;
00104     int              selected;
00105     BlitBitmap       lcd_blitBitmap;
00106 } Menu;
00107
00112 #define MF_STICKY   BV(0)
00113 #define MF_TOPLEVEL BV(1)
00114 #define MF_ROMITEMS BV(2)
00115 #define MF_SAVESEL  BV(3)
00116 /* \} */
00117
00122 #define MENU_OK       ((iptr_t)0)
00123 #define MENU_CANCEL   ((iptr_t)-1)
00124 #define MENU_TIMEOUT  ((iptr_t)-2)
00125 #define MENU_ABORT    ((iptr_t)-3)
00126 #define MENU_DISABLED ((iptr_t)-4)
00127 /* \} */
00128
00129 /* Function prototypes */
00130 iptr_t menu_handle(const struct Menu *menu);
00131 int menu_setFlags(struct Menu *menu, int idx, int flags);
00132 int menu_clearFlags(struct Menu *menu, int idx, int flags);
00133  //defgroup menu
00135 #endif /* GUI_MENU_H */


BeRTOS: menubar.c File Reference

  • gui
menubar.c File Reference

Graphics Menu bar widget. More...

#include "menubar.h"
#include <gfx/gfx.h>
#include <gfx/text.h>
#include <gfx/font.h>
#include <cfg/compiler.h>

Go to the source code of this file.

Detailed Description

Graphics Menu bar widget.

Author:
Stefano Fedrigo <aleph@develer.com>
Francesco Sacchi <batt@develer.com>

Definition in file menubar.c.


BeRTOS: menubar.c Source File

  • gui
menubar.c
Go to the documentation of this file.
00001
00040 #include "menubar.h"
00041
00042 #include <gfx/gfx.h>
00043 #include <gfx/text.h>
00044 #include <gfx/font.h>
00045 #include <cfg/compiler.h>
00046
00047 #warning FIXME:This module is obsolete, you must refactor it!
00048
00049 #if 0
00050 #if CPU_AVR
00051     #include <avr/pgmspace.h> /* strlen_P() */
00052 #else
00053     #define strlen_P(s)             strlen(s)
00054     #define text_puts_P(s, b)       text_puts(s, b)
00055     #define pgm_read_uint16_t(addr) (*(addr))
00056 #endif
00057
00058 #include <string.h> /* strlen, memcpy */
00059
00060
00062 static const pgm_char lab_1[]  = "";
00063 static const pgm_char lab_2[]  = "mute";
00064 static const pgm_char lab_3[]  = "menu";
00065 static const pgm_char lab_4[]  = "back";
00066 static const pgm_char lab_5[]  = " ok ";
00067 static const pgm_char lab_6[]  = "Ch 1";
00068 static const pgm_char lab_7[]  = "Ch 2";
00069 static const pgm_char lab_8[]  = "C1+2";
00070 static const pgm_char lab_9[]  = " "UP_ARROW" ";
00071 static const pgm_char lab_10[] = " "DOWN_ARROW" ";
00072 static const pgm_char lab_11[] = " - ";
00073 static const pgm_char lab_12[] = " + ";
00074 static const pgm_char lab_13[] = "sel ";
00075 static const pgm_char lab_14[] = "lock";
00076 static const pgm_char lab_15[] = "unlock";
00077 static const pgm_char lab_16[] = "more";
00078 static const pgm_char lab_17[] = "edit";
00079 static const pgm_char lab_18[] = "fast";
00080 static const pgm_char lab_19[] = LEFT_ARROW" ";
00081 static const pgm_char lab_20[] = " "RIGHT_ARROW;
00082 static const pgm_char lab_21[] = "slow";
00083 static const pgm_char lab_22[] = "yes";
00084 static const pgm_char lab_23[] = "no";
00085
00086
00087 static const pgm_char * PROGMEM label_strings[LABEL_CNT] = {
00088     lab_1, lab_2, lab_3, lab_4, lab_5, lab_6, lab_7, lab_8, lab_9,
00089     lab_10, lab_11, lab_12, lab_13, lab_14, lab_15, lab_16, lab_17,
00090     lab_18, lab_19, lab_20, lab_21, lab_22, lab_23
00091 };
00092
00098 #define PTRLBL(x) ((unsigned int)(x) < 256 ? \
00099     (const pgm_char *)pgm_read_uint16_t(label_strings + (unsigned int)(x)) \
00100     : (const pgm_char *)(x))
00101
00102
00107 void mbar_init(
00108         struct MenuBar *mb,
00109         struct Bitmap *bmp,
00110         const_iptr_t labels[],
00111         int num_labels)
00112 {
00113     mb->bitmap     = bmp;
00114     mb->labels     = labels;
00115     mb->num_labels = num_labels;
00116 }
00117
00118
00122 void mbar_draw(const struct MenuBar *mb)
00123 {
00124     uint8_t oldstyle;
00125     int i;
00126     size_t maxlen = 0;  /* Length of the longest label */
00127     coord_t x1, x2, y1, y2, label_padding;
00128
00129     /* Maximum space available for a label */
00130     coord_t slot_width = mb->bitmap->width / mb->num_labels;
00131
00132     /* Find longest label */
00133     for (i = 0; i < mb->num_labels; i++)
00134         if (strlen_P(PTRLBL(mb->labels[i])) > maxlen)
00135             maxlen = strlen_P(PTRLBL(mb->labels[i]));
00136
00137     oldstyle = text_style(mb->bitmap, STYLEF_INVERT, STYLEF_MASK);
00138
00139     /* y coords for menubar: bottom of the bitmap */
00140     y1 = mb->bitmap->height - FONT_HEIGHT;
00141     y2 = mb->bitmap->height;
00142
00143     /* Clear menubar area */
00144     gfx_rectClear(mb->bitmap, 0, y1, mb->bitmap->width, y2);
00145
00146     for (i = 0; i < mb->num_labels; i++)
00147     {
00148         size_t lablen = strlen_P(PTRLBL(mb->labels[i]));
00149
00150         /* Don't draw empty labels */
00151         if (mb->labels[i] == (const_iptr_t)LABEL_EMPTY)
00152             continue;
00153
00154         /* x coords: magic formula for equal distribution of the
00155          * labels along bitmap
00156          */
00157         label_padding = slot_width - (FONT_WIDTH * lablen + 2);
00158         x1 = i * (slot_width + (label_padding / (mb->num_labels - 1)));
00159         x2 = x1 + lablen * FONT_WIDTH + 1;
00160
00161         /* Draw vertical line before.
00162          * Uncomment +1 for "rounded" menubars */
00163         gfx_line(mb->bitmap, x1, y1 /* + 1 */, x1, y2);
00164
00165         /* Draw text */
00166         text_setCoord(mb->bitmap, x1 + 1, y1);
00167         text_puts_P(PTRLBL(mb->labels[i]), mb->bitmap);
00168
00169         /* Draw vertical line after
00170          * Uncomment +1 for "rounded" menubars */
00171         gfx_line(mb->bitmap, x2, y1 /* + 1 */, x2, y2);
00172     }
00173
00174     text_style(mb->bitmap, oldstyle, STYLEF_MASK);
00175 }
00176 #endif
00177


BeRTOS: menubar.h File Reference

  • gui
Enumerations
menubar.h File Reference

Graphic menu bar widget. More...

#include <cfg/compiler.h>

Go to the source code of this file.

Enumerations

enum LabelId
Predefined labels ids.

Detailed Description

Graphic menu bar widget.

Author:
Stefano Fedrigo <aleph@develer.com>

Definition in file menubar.h.


BeRTOS: menubar.h Source File

  • gui
menubar.h
Go to the documentation of this file.
00001
00039 #ifndef GUI_MENUBAR_H
00040 #define GUI_MENUBAR_H
00041
00042 #include <cfg/compiler.h>
00043
00045 enum LabelId
00046 {
00047     LABEL_EMPTY,  /* empty label */
00048     LABEL_MUTE,
00049     LABEL_MENU,
00050     LABEL_BACK,
00051     LABEL_OK,
00052     LABEL_CH_1,
00053     LABEL_CH_2,
00054     LABEL_C1PLUS2,
00055     LABEL_UPARROW,
00056     LABEL_DOWNARROW,
00057     LABEL_MINUS,
00058     LABEL_PLUS,
00059     LABEL_SEL,
00060     LABEL_LOCK,
00061     LABEL_UNLOCK,
00062     LABEL_MORE,
00063     LABEL_EDIT,
00064     LABEL_FAST,
00065     LABEL_PREV,
00066     LABEL_NEXT,
00067     LABEL_SLOW,
00068     LABEL_YES,
00069     LABEL_NO,
00070
00071
00072     LABEL_CNT
00073 };
00074
00075 #define UP_ARROW "\x18"
00076 #define DOWN_ARROW  "\x19"
00077 #define RIGHT_ARROW "\xC4\x1A"
00078 #define LEFT_ARROW  "\x10\xC4"
00079
00080 /* Forward decl */
00081 struct Bitmap;
00082
00083 typedef struct MenuBar
00084 {
00085     struct Bitmap *bitmap;
00086     const_iptr_t  *labels;
00087     int            num_labels;
00088 } MenuBar;
00089
00090 void mbar_init(
00091         struct MenuBar *mb,
00092         struct Bitmap *bmp,
00093         const_iptr_t *labels,
00094         int num_labels);
00095 void mbar_draw(const struct MenuBar *mb);
00096
00097 #endif /* GUI_MENUBAR_H */


BeRTOS: messages.c File Reference

  • mware
Variables
messages.c File Reference

Messages for LCD. More...

#include "messages.h"

Go to the source code of this file.

Variables

const char * | msg_strings [MSG_COUNT]
Array of pointers to localized strings.
const char | str_empty [] = ""
Untranslated constant strings used more than once are grouped here to save ROM space.

Detailed Description

Messages for LCD.

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file messages.c.

Variable Documentation

const char* msg_strings[MSG_COUNT]
Initial value:
 {
    0,

}

Array of pointers to localized strings.

Should be filled by localization stuff, but not for now.

Definition at line 46 of file messages.c.


BeRTOS: messages.c Source File

  • mware
messages.c
Go to the documentation of this file.
00001
00040 #include "messages.h"
00041
00046 const char *msg_strings[MSG_COUNT] = {
00047     0,
00048     // TODO: add your strings here
00049 };
00050
00051 /* Buffer for catalog file */
00052 /* char msg_buf[MSG_BUFSIZE]; */
00053
00054
00055 /* The following does not work (move string tables into the DMSG/CMSG segments)
00056  * #pragma memory=dataseg(DMSG)
00057  * #pragma memory=constseg(CMSG)
00058  */
00059
00060
00065 const char str_empty[] = "";
00066


BeRTOS: messages.h File Reference

  • mware
messages.h File Reference

Definitions of constant string messages. More...

Go to the source code of this file.

Detailed Description

Definitions of constant string messages.

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file messages.h.


BeRTOS: messages.h Source File

  • mware
messages.h
Go to the documentation of this file.
00001
00040 #ifndef MWARE_MESSAGES_H
00041 #define MWARE_MESSAGES_H
00042
00043 enum
00044 {
00045     MSG_NULL,
00046
00047     // TODO: add your labels here.
00048
00049     MSG_COUNT
00050 };
00051
00052 #warning FIXME:Revise me!
00053
00054 #define MSG_BUFSIZE 6144 /* FIXME: how much? */
00055
00056 /* String tables */
00057 /* extern const char *msg_strings const [MSG_COUNT]; */
00058 /* extern char msg_buf[MSG_BUFSIZE]; */
00059
00060
00061 /* Macros to access translated messages */
00062 #define MSG(x)     msg_strings[x]
00063 #define PTRMSG(x)  ((x) < (const_iptr_t)256 ? msg_strings[(unsigned int)(x)] : (const char *)(x))
00064
00065
00066 #endif /* MWARE_MESSAGES_H */
00067


BeRTOS: module.h File Reference

  • cfg
Defines
module.h File Reference

Debug macros for inter-module dependency checking. More...

#include <cfg/debug.h>

Go to the source code of this file.

Defines

#define | MOD_DEFINE(module) DB(extern bool module ## _initialized; bool module ## _initialized;)
Declare a global variable for module dependency check.
#define | MOD_CHECK(module)
Check that module was already initialized.
#define | MOD_INIT(module)
Mark module as initialized.
#define | MOD_CLEANUP(module)
Mark module as being no longer initialized.

Detailed Description

Debug macros for inter-module dependency checking.

These macros expand to nothing in release builds. In debug builds, they perform run-time dependency checks for modules.

The usage pattern looks like this:

 MOD_DEFINE(phaser)

 void phaser_init(void)
 {
     MOD_CHECK(computer);
     MOD_CHECK(warp_core);

    [...charge weapons...]

    MOD_INIT(phaser);
 }

 void phaser_cleanup(void)
 {
    MOD_CLEANUP(phaser);

    [...disarm phaser...]
 }
Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file module.h.

Define Documentation

#define MOD_CHECK ( module )
Value:
do { \
    DB(extern bool module ## _initialized;) \
    ASSERT(module ## _initialized); \
} while (0)

Check that module was already initialized.

Put this check just before accessing any facility provided by a module that requires prior initialization.

See also:
MOD_INIT()

Definition at line 84 of file module.h.

#define MOD_CLEANUP ( module )
Value:
do { \
    ASSERT(module ## _initialized); \
    DB(module ## _initialized = false;) \
} while (0)

Mark module as being no longer initialized.

Marking initialization requires the global data previously defined by MOD_DEFINE().

See also:
MOD_INIT(), MOD_CHECK(), MOD_DEFINE()

Definition at line 116 of file module.h.

#define MOD_DEFINE ( module ) DB(extern bool module ## _initialized; bool module ## _initialized;)

Declare a global variable for module dependency check.

See also:
MOD_INIT(), MOD_CHECK()

Definition at line 73 of file module.h.

#define MOD_INIT ( module )
Value:
do { \
    ASSERT(!module ## _initialized); \
    DB(module ## _initialized = true;) \
} while (0)

Mark module as initialized.

Marking initialization requires the global data previously defined by MOD_DEFINE().

To prevent double initialization bugs, an initialized module must first be cleaned up with MOD_CLEANUP() before calling MOD_INIT() another time.

See also:
MOD_CLEANUP(), MOD_CHECK(), MOD_DEFINE()

Definition at line 102 of file module.h.


BeRTOS: module.h Source File

  • cfg
module.h
Go to the documentation of this file.
00001
00063 #ifndef CFG_MODULE_H
00064 #define CFG_MODULE_H
00065
00066 #include <cfg/debug.h>
00067
00073 #define MOD_DEFINE(module)   DB(extern bool module ## _initialized; bool module ## _initialized;)
00074
00084 #define MOD_CHECK(module) \
00085 do { \
00086     DB(extern bool module ## _initialized;) \
00087     ASSERT(module ## _initialized); \
00088 } while (0)
00089
00102 #define MOD_INIT(module) \
00103 do { \
00104     ASSERT(!module ## _initialized); \
00105     DB(module ## _initialized = true;) \
00106 } while (0)
00107
00116 #define MOD_CLEANUP(module) \
00117 do { \
00118     ASSERT(module ## _initialized); \
00119     DB(module ## _initialized = false;) \
00120 } while (0)
00121
00122 #endif /* CFG_MODULE_H */
00123


BeRTOS: monitor.c File Reference

  • kern
monitor.c File Reference

Monitor to check for stack overflows. More...

#include "monitor.h"

Go to the source code of this file.

Detailed Description

Monitor to check for stack overflows.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file monitor.c.


BeRTOS: monitor.c Source File

  • kern
monitor.c
Go to the documentation of this file.
00001
00039 #include "monitor.h"
00040
00041 #if CONFIG_KERN_MONITOR
00042
00043 #include "proc_p.h"
00044 #include <cfg/macros.h>
00045 #include <cfg/debug.h>
00046
00047 #include <struct/list.h>
00048
00049 #include <drv/timer.h>
00050
00051 #include <kern/proc.h>
00052
00053 #include <cpu/frame.h> /* CPU_STACK_GROWS_UPWARD */
00054
00055 /* Access to this list must be protected against the scheduler */
00056 static List MonitorProcs;
00057
00058 void monitor_init(void)
00059 {
00060     LIST_INIT(&MonitorProcs);
00061 }
00062
00063
00064 void monitor_add(Process *proc, const char *name)
00065 {
00066     proc->monitor.name = name;
00067
00068     PROC_ATOMIC(ADDTAIL(&MonitorProcs, &proc->monitor.link));
00069 }
00070
00071
00072 void monitor_remove(Process *proc)
00073 {
00074     PROC_ATOMIC(REMOVE(&proc->monitor.link));
00075 }
00076
00077 void monitor_rename(Process *proc, const char *name)
00078 {
00079     proc->monitor.name = name;
00080 }
00081
00082 size_t monitor_checkStack(cpu_stack_t *stack_base, size_t stack_size)
00083 {
00084     cpu_stack_t *beg;
00085     cpu_stack_t *cur;
00086     cpu_stack_t *end;
00087     int inc;
00088     size_t sp_free;
00089
00090
00091     beg = stack_base;
00092     end = stack_base + stack_size / sizeof(cpu_stack_t);
00093     inc = +1;
00094
00095     if (CPU_STACK_GROWS_UPWARD)
00096     {
00097         SWAP(beg, end);
00098         inc = -1;
00099     }
00100
00101     cur = beg;
00102     while (cur != end)
00103     {
00104         if (*cur != CONFIG_KERN_STACKFILLCODE)
00105             break;
00106
00107         cur += inc;
00108     }
00109
00110     sp_free = ABS(cur - beg) * sizeof(cpu_stack_t);
00111     return sp_free;
00112 }
00113
00114
00115 void monitor_report(void)
00116 {
00117     Node *node;
00118     int i;
00119
00120     proc_forbid();
00121     kprintf("%-9s%-9s%-9s%-9s%s\n", "TCB", "SPbase", "SPsize", "SPfree", "Name");
00122     for (i = 0; i < 56; i++)
00123         kputchar('-');
00124     kputchar('\n');
00125
00126     FOREACH_NODE(node, &MonitorProcs)
00127     {
00128         Process *p = containerof(node, Process, monitor.link);
00129         size_t free = monitor_checkStack(p->stack_base, p->stack_size);
00130         kprintf("%-9p%-9p%-9zu%-9zu%s\n",
00131             p, p->stack_base, p->stack_size, free, p->monitor.name);
00132     }
00133     proc_permit();
00134 }
00135
00136
00137 static void NORETURN monitor(void)
00138 {
00139     Node *node;
00140
00141     for (;;)
00142     {
00143         proc_forbid();
00144         FOREACH_NODE(node, &MonitorProcs)
00145         {
00146             Process *p = containerof(node, Process, monitor.link);
00147             size_t free = monitor_checkStack(p->stack_base, p->stack_size);
00148
00149             if (p->stack_base && free < 0x20)
00150                 kprintf("MONITOR: Free stack of process '%s' is only %u chars\n",
00151                         p->monitor.name, (unsigned int)free);
00152         }
00153         proc_permit();
00154
00155         /* Give some rest to the system */
00156         timer_delay(500);
00157     }
00158 }
00159
00160 void monitor_start(size_t stacksize, cpu_stack_t *stack)
00161 {
00162     struct Process *p = proc_new(monitor, NULL, stacksize, stack);
00163     proc_setPri(p, -10);
00164 }
00165
00166 #endif /* CONFIG_KERN_MONITOR */


BeRTOS: monitor.h File Reference

  • kern
Functions
monitor.h File Reference

Monitor to check for stack overflows. More...

#include "cfg/cfg_monitor.h"
#include <cpu/types.h>

Go to the source code of this file.

Functions

void | monitor_start (size_t stacksize, cpu_stack_t *stack)
Start the kernel monitor.
size_t | monitor_checkStack (cpu_stack_t *stack_base, size_t stack_size)
Manually check if a given stack has overflown.
void | monitor_report (void)
Print a report of the stack status through kdebug.

Detailed Description

Monitor to check for stack overflows.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file monitor.h.

Function Documentation

size_t monitor_checkStack | ( | cpu_stack_t * | stack_base,
 |  | size_t | stack_size
 | ) |  |

Manually check if a given stack has overflown.

This is used to check for stacks of processes handled externally form the kernel, or for other stacks (for instance the interrupt supervisor stack).

Note:
For this function to work, the stack must have been filled at startup with CONFIG_KERN_STACKFILLCODE.
void monitor_start | ( | size_t | stacksize,
 |  | cpu_stack_t * | stack
 | ) |  |

Start the kernel monitor.

It is a special process which checks every second the stacks of the running processes trying to detect stack overflows.

Parameters:
stacksize | Size of stack in chars
stack | Pointer to the stack that will be used by the monitor
Note:
The stack is provided by the caller so that there is no wasted space if the monitor is not used.


BeRTOS: monitor.h Source File

  • kern
monitor.h
Go to the documentation of this file.
00001
00043 #ifndef KERN_MONITOR_H
00044 #define KERN_MONITOR_H
00045
00046 #include "cfg/cfg_monitor.h"
00047
00048 #include <cpu/types.h>
00049
00060 void monitor_start(size_t stacksize, cpu_stack_t *stack);
00061
00062
00071 size_t monitor_checkStack(cpu_stack_t *stack_base, size_t stack_size);
00072
00073
00075 void monitor_report(void);
00076
00077 #endif /* KERN_MONITOR_H */


BeRTOS: mpxx6115a.h File Reference

  • drv
Functions
mpxx6115a.h File Reference

MPXX6115A Pressure Sensor convert formula. More...

#include <drv/adc.h>

Go to the source code of this file.

Functions

int16_t mpxx6115a_press (adcread_t vout, adcread_t vref)
Convert read voltage from MPXX6115A Pressure Sensor in hPascal value.

Detailed Description

MPXX6115A Pressure Sensor convert formula.

This module convert read voltage value from MPXX6115A pressure sensor into hPascal value unit.

Author:
Daniele Basile <asterix@develer.com>

Definition in file mpxx6115a.h.

Function Documentation

int16_t mpxx6115a_press | ( | adcread_t | vout,
 |  | adcread_t | vref
 | ) |  | [inline]

Convert read voltage from MPXX6115A Pressure Sensor in hPascal value.

The conversion formula may be consulted on constructor datasheet (see Freescale Semiconductor MP3H6115A, MPXAZ6115A).

Parameters:
vout | output voltage read from pin sensor.
vref | reference voltage that supplies the MPXX6115A sensor.
Returns:
integer value that represent measured pressure in hPascal.
Note:
: To compute the pressure we use the Vout/Vref ratio, so these two values can be expressed in any unit, even ADC levels.

Definition at line 70 of file mpxx6115a.h.


BeRTOS: mpxx6115a.h Source File

  • drv
mpxx6115a.h
Go to the documentation of this file.
00001
00046 #ifndef DRV_MPXX6115A_H
00047 #define DRV_MPXX6115A_H
00048
00049 #include <drv/adc.h>
00050
00051 #define MPXX6115A_DIV_CONST    0.009f
00052 #define MPXX6115A_ADD_CONST    0.095f
00053
00054
00070 INLINE int16_t mpxx6115a_press(adcread_t vout,  adcread_t vref)
00071 {
00072     float tmp;
00073
00074     tmp = (float)vout/(float)vref  + MPXX6115A_ADD_CONST;
00075
00076     // To return hpascal we should multiply by 10 because the ratio is in kpascal
00077     return (int16_t)(tmp / MPXX6115A_DIV_CONST * 10);
00078 }
00079
00080 #endif /* DRV_MPXX6115A_H */


BeRTOS: msg.h File Reference

  • kern
Functions
msg.h File Reference
#include <mware/event.h>
#include <struct/list.h>
#include <kern/proc.h>

Go to the source code of this file.

Functions

void | msg_lockPort (UNUSED_ARG(MsgPort *, port))
Lock a message port.
void | msg_unlockPort (UNUSED_ARG(MsgPort *, port))
Unlock a message port.
void | msg_initPort (MsgPort *port, Event event)
Initialize a message port.
void | msg_put (MsgPort *port, Msg *msg)
Queue msg into port, triggering the associated event.
Msg * | msg_get (MsgPort *port)
Get the first message from the queue of port.
Msg * | msg_peek (MsgPort *port)
Peek the first message in the queue of port, or NULL if the port is empty.
void | msg_reply (Msg *msg)
Send back (reply) msg to its sender.

Detailed Description

Definition in file msg.h.


BeRTOS: msg.h Source File

  • kern
msg.h
Go to the documentation of this file.
00001
00188 #ifndef KERN_MSG_H
00189 #define KERN_MSG_H
00190
00191 #include <mware/event.h>
00192 #include <struct/list.h>
00193 #include <kern/proc.h>
00194
00195 typedef struct MsgPort
00196 {
00197     List  queue;
00198     Event event;
00199 } MsgPort;
00200
00201
00202 typedef struct Msg
00203 {
00204     Node     link;
00205     MsgPort *replyPort;
00206     /* User data may follow */
00207 } Msg;
00208
00209
00225 INLINE void msg_lockPort(UNUSED_ARG(MsgPort *, port))
00226 {
00227     proc_forbid();
00228 }
00229
00235 INLINE void msg_unlockPort(UNUSED_ARG(MsgPort *, port))
00236 {
00237     proc_permit();
00238 }
00239
00240
00242 INLINE void msg_initPort(MsgPort *port, Event event)
00243 {
00244     LIST_INIT(&port->queue);
00245     port->event = event;
00246 }
00247
00249 INLINE void msg_put(MsgPort *port, Msg *msg)
00250 {
00251     msg_lockPort(port);
00252     ADDTAIL(&port->queue, &msg->link);
00253     msg_unlockPort(port);
00254
00255     event_do(&port->event);
00256 }
00257
00263 INLINE Msg *msg_get(MsgPort *port)
00264 {
00265     Msg *msg;
00266
00267     msg_lockPort(port);
00268     msg = (Msg *)list_remHead(&port->queue);
00269     msg_unlockPort(port);
00270
00271     return msg;
00272 }
00273
00275 INLINE Msg *msg_peek(MsgPort *port)
00276 {
00277     Msg *msg;
00278
00279     msg_lockPort(port);
00280     msg = (Msg *)port->queue.head.succ;
00281     if (LIST_EMPTY(&port->queue))
00282         msg = NULL;
00283     msg_unlockPort(port);
00284
00285     return msg;
00286 }
00287
00289 INLINE void msg_reply(Msg *msg)
00290 {
00291     msg_put(msg->replyPort, msg);
00292 }
00293  //defgroup kern_msg
00295
00296 int msg_testRun(void);
00297 int msg_testSetup(void);
00298 int msg_testTearDown(void);
00299
00300 #endif /* KERN_MSG_H */


BeRTOS: mt29f.h File Reference

  • drv
Data Structures | Functions
mt29f.h File Reference

Micron MT29F serial NAND driver. More...

#include "cfg/cfg_mt29f.h"
#include <cfg/macros.h>

Go to the source code of this file.

Data Structures

struct | Mt29f
MT29F context. More...

Defines

Error codes.
#define | MT29F_ERR_ERASE BV(1)
Error erasing a block.
#define | MT29F_ERR_WRITE BV(2)
Error writing a page.
#define | MT29F_ERR_RD_TMOUT BV(2)
Read timeout.
#define | MT29F_ERR_WR_TMOUT BV(2)
Write timeout.

Functions

bool | mt29f_getDevId (Mt29f *chip, uint8_t dev_id[5])
Read Device ID and configuration codes.
int | mt29f_blockErase (Mt29f *chip, uint32_t blk)
Erase the whole block containing given page.

Detailed Description

Micron MT29F serial NAND driver.

This module allows read/write access to Micron MT29F serial NANDs. It is a block device, so it must be accessed using the KBlock interface functions (see kblock.h).

Once you have opened the flash for writing, you may want to use kblock_trim() to avoid overwriting data on other flash banks.

Example usage:

 Mt29f chip;
 mt29f_init(&chip);
 // enable access only on desired blocks
 // start block = 50, num blocks = 20
 kblock_trim(&chip.blk, 50, 20);
 // ...
 // now write to the flash
 // block number is automatically converted
 kblock_write(&chip.blk, 0, buf, 0, 128);
Author:
Stefano Fedrigo <aleph@develer.com>

Definition in file mt29f.h.


BeRTOS: mt29f.h Source File

  • drv
mt29f.h
Go to the documentation of this file.
00001
00062 #ifndef DRV_MT29F_H
00063 #define DRV_MT29F_H
00064
00065 #include "cfg/cfg_mt29f.h"
00066
00067 #include <cfg/macros.h>
00068 //#include <cfg/compiler.h>
00069
00070 //#include <cpu/attr.h>
00071
00072
00077 #define MT29F_ERR_ERASE     BV(1)   ///< Error erasing a block
00078 #define MT29F_ERR_WRITE     BV(2)   ///< Error writing a page
00079 #define MT29F_ERR_RD_TMOUT  BV(2)   ///< Read timeout
00080 #define MT29F_ERR_WR_TMOUT  BV(2)   ///< Write timeout
00081
00087 typedef struct Mt29f
00088 {
00089     uint8_t chip_select;
00090     uint8_t status;
00091 } Mt29f;
00092
00093 void mt29f_init(Mt29f *chip, uint8_t chip_select);
00094 bool mt29f_getDevId(Mt29f *chip, uint8_t dev_id[5]);
00095 int mt29f_blockErase(Mt29f *chip, uint32_t blk);
00096 bool mt29f_read(Mt29f *chip, uint32_t page, void *buf, uint16_t size);
00097 bool mt29f_write(Mt29f *chip, uint32_t page, const void *buf, uint16_t size);
00098 int mt29f_error(Mt29f *chip);
00099 void mt29f_clearError(Mt29f *chip);
00100
00101
00102 #endif /* DRV_MT29F_H */


BeRTOS: mt29f_sam3.c File Reference

  • cpu
  • cortex-m3
  • drv
Functions
mt29f_sam3.c File Reference

Micron MT29F serial NAND driver for SAM3's static memory controller. More...

#include "mt29f_sam3.h"
#include "cfg/cfg_mt29f.h"
#include <cfg/log.h>
#include <cfg/macros.h>
#include <io/sam3.h>
#include <drv/timer.h>
#include <drv/mt29f.h>
#include <cpu/power.h>
#include <cpu/types.h>
#include <string.h>

Go to the source code of this file.

Functions

int | mt29f_blockErase (Mt29f *chip, uint32_t page)
Erase the whole block containing given page.
bool | mt29f_getDevId (Mt29f *chip, uint8_t dev_id[5])
Read Device ID and configuration codes.

Detailed Description

Micron MT29F serial NAND driver for SAM3's static memory controller.

Author:
Stefano Fedrigo <aleph@develer.com>

Definition in file mt29f_sam3.c.


BeRTOS: mt29f_sam3.c Source File

  • cpu
  • cortex-m3
  • drv
mt29f_sam3.c
Go to the documentation of this file.
00001
00038 #include "mt29f_sam3.h"
00039 #include "cfg/cfg_mt29f.h"
00040
00041 // Define log settings for cfg/log.h
00042 #define LOG_LEVEL    CONFIG_MT29F_LOG_LEVEL
00043 #define LOG_FORMAT   CONFIG_MT29F_LOG_FORMAT
00044
00045 #include <cfg/log.h>
00046 #include <cfg/macros.h>
00047
00048 #include <io/sam3.h>
00049
00050 #include <drv/timer.h>
00051 #include <drv/mt29f.h>
00052
00053 #include <cpu/power.h> /* cpu_relax() */
00054 #include <cpu/types.h>
00055
00056 #include <string.h> /* memcpy() */
00057
00058 // Timeout for NAND operations in ms
00059 #define MT29F_TMOUT  100
00060
00061 // NAND flash status codes
00062 #define MT29F_STATUS_READY             BV(6)
00063 #define MT29F_STATUS_ERROR             BV(0)
00064
00065 // NAND flash commands
00066 #define MT29F_CMD_READ_1               0x00
00067 #define MT29F_CMD_READ_2               0x30
00068 #define MT29F_CMD_COPYBACK_READ_1      0x00
00069 #define MT29F_CMD_COPYBACK_READ_2      0x35
00070 #define MT29F_CMD_COPYBACK_PROGRAM_1   0x85
00071 #define MT29F_CMD_COPYBACK_PROGRAM_2   0x10
00072 #define MT29F_CMD_RANDOM_OUT           0x05
00073 #define MT29F_CMD_RANDOM_OUT_2         0xE0
00074 #define MT29F_CMD_RANDOM_IN            0x85
00075 #define MT29F_CMD_READID               0x90
00076 #define MT29F_CMD_WRITE_1              0x80
00077 #define MT29F_CMD_WRITE_2              0x10
00078 #define MT29F_CMD_ERASE_1              0x60
00079 #define MT29F_CMD_ERASE_2              0xD0
00080 #define MT29F_CMD_STATUS               0x70
00081 #define MT29F_CMD_RESET                0xFF
00082
00083 // Addresses for sending command, addresses and data bytes to flash
00084 #define MT29F_CMD_ADDR    0x60400000
00085 #define MT29F_ADDR_ADDR   0x60200000
00086 #define MT29F_DATA_ADDR   0x60000000
00087
00088 // Get chip select mask for command register
00089 #define MT29F_CSID(chip)  (((chip)->chip_select << NFC_CMD_CSID_SHIFT) & NFC_CMD_CSID_MASK)
00090
00091
00092 /*
00093  * Translate flash page index plus a byte offset
00094  * in the five address cycles format needed by NAND.
00095  *
00096  * Cycles in x8 mode as the MT29F2G08AAD
00097  * CA = column addr, PA = page addr, BA = block addr
00098  *
00099  * Cycle    I/O7  I/O6  I/O5  I/O4  I/O3  I/O2  I/O1  I/O0
00100  * -------------------------------------------------------
00101  * First    CA7   CA6   CA5   CA4   CA3   CA2   CA1   CA0
00102  * Second   LOW   LOW   LOW   LOW   CA11  CA10  CA9   CA8
00103  * Third    BA7   BA6   PA5   PA4   PA3   PA2   PA1   PA0
00104  * Fourth   BA15  BA14  BA13  BA12  BA11  BA10  BA9   BA8
00105  * Fifth    LOW   LOW   LOW   LOW   LOW   LOW   LOW   BA16
00106  */
00107 static void getAddrCycles(uint32_t page, uint16_t offset, uint32_t *cycle0, uint32_t *cycle1234)
00108 {
00109     ASSERT(offset < MT29F_PAGE_SIZE);
00110
00111     *cycle0 = offset & 0xff;
00112     *cycle1234 = (page << 8) | ((offset >> 8) & 0xf);
00113
00114     LOG_INFO("mt29f addr: %lx %lx\n", *cycle1234, *cycle0);
00115 }
00116
00117
00118 INLINE bool nfcIsBusy(void)
00119 {
00120     return HWREG(NFC_CMD_BASE_ADDR + NFC_CMD_NFCCMD) & 0x8000000;
00121 }
00122
00123 INLINE bool isCmdDone(void)
00124 {
00125     return SMC_SR & SMC_SR_CMDDONE;
00126 }
00127
00128 static bool waitReadyBusy(void)
00129 {
00130     time_t start = timer_clock();
00131
00132     while (!(SMC_SR & SMC_SR_RB_EDGE0))
00133     {
00134         cpu_relax();
00135         if (timer_clock() - start > MT29F_TMOUT)
00136         {
00137             LOG_INFO("mt29f: R/B timeout\n");
00138             return false;
00139         }
00140     }
00141
00142     return true;
00143 }
00144
00145 /*
00146  * Wait for transfer to complete until timeout.
00147  * If transfer completes return true, false in case of timeout.
00148  */
00149 static bool waitTransferComplete(void)
00150 {
00151     time_t start = timer_clock();
00152
00153     while (!(SMC_SR & SMC_SR_XFRDONE))
00154     {
00155         cpu_relax();
00156         if (timer_clock() - start > MT29F_TMOUT)
00157         {
00158             LOG_INFO("mt29f: xfer complete timeout\n");
00159             return false;
00160         }
00161     }
00162
00163     return true;
00164 }
00165
00166
00167 /*
00168  * Send command to NAND and wait for completion.
00169  */
00170 static void sendCommand(uint32_t cmd,
00171         int num_cycles, uint32_t cycle0, uint32_t cycle1234)
00172 {
00173     reg32_t *cmd_addr;
00174
00175     while (nfcIsBusy());
00176
00177     if (num_cycles == 5)
00178         SMC_ADDR = cycle0;
00179
00180     cmd_addr = (reg32_t *)(NFC_CMD_BASE_ADDR + cmd);
00181     *cmd_addr = cycle1234;
00182
00183     while (!isCmdDone());
00184 }
00185
00186
00187 static bool isOperationComplete(Mt29f *chip)
00188 {
00189     uint8_t status;
00190
00191     sendCommand(MT29F_CSID(chip) |
00192         NFC_CMD_NFCCMD | NFC_CMD_ACYCLE_NONE |
00193         MT29F_CMD_STATUS << 2,
00194         0, 0, 0);
00195
00196     status = (uint8_t)HWREG(MT29F_DATA_ADDR);
00197     return (status & MT29F_STATUS_READY) && !(status & MT29F_STATUS_ERROR);
00198 }
00199
00200
00201 static void chipReset(Mt29f *chip)
00202 {
00203     sendCommand(MT29F_CSID(chip) |
00204         NFC_CMD_NFCCMD | NFC_CMD_ACYCLE_NONE |
00205         MT29F_CMD_RESET << 2,
00206         0, 0, 0);
00207
00208     waitReadyBusy();
00209 }
00210
00211
00215 int mt29f_blockErase(Mt29f *chip, uint32_t page)
00216 {
00217     uint32_t cycle0;
00218     uint32_t cycle1234;
00219
00220     getAddrCycles(page, 0, &cycle0, &cycle1234);
00221
00222     sendCommand(MT29F_CSID(chip) |
00223         NFC_CMD_NFCCMD | NFC_CMD_ACYCLE_THREE | NFC_CMD_VCMD2 |
00224         (MT29F_CMD_ERASE_2 << 10) | (MT29F_CMD_ERASE_1 << 2),
00225         3, 0, cycle1234 >> 8);
00226
00227     waitReadyBusy();
00228
00229     if (!isOperationComplete(chip))
00230     {
00231         LOG_ERR("mt29f: error erasing block\n");
00232         chip->status |= MT29F_ERR_ERASE;
00233         return -1;
00234     }
00235
00236     return 0;
00237 }
00238
00239
00243 bool mt29f_getDevId(Mt29f *chip, uint8_t dev_id[5])
00244 {
00245     sendCommand(MT29F_CSID(chip) |
00246         NFC_CMD_NFCCMD | NFC_CMD_NFCEN | NFC_CMD_ACYCLE_ONE |
00247         MT29F_CMD_READID << 2,
00248         1, 0, 0);
00249
00250     waitReadyBusy();
00251     if (!waitTransferComplete())
00252     {
00253         LOG_ERR("mt29f: getDevId timeout\n");
00254         chip->status |= MT29F_ERR_RD_TMOUT;
00255         return false;
00256     }
00257
00258     memcpy(dev_id, (void *)NFC_SRAM_BASE_ADDR, 5);
00259     return true;
00260 }
00261
00262
00263 static bool checkEcc(void)
00264 {
00265     uint32_t sr1 = SMC_ECC_SR1;
00266
00267     if (sr1)
00268     {
00269         LOG_INFO("ECC error, ECC_SR1=0x%lx\n", sr1);
00270         return false;
00271     }
00272     else
00273         return true;
00274 }
00275
00276
00277 static bool mt29f_readPage(Mt29f *chip, uint32_t page, uint16_t offset)
00278 {
00279     uint32_t cycle0;
00280     uint32_t cycle1234;
00281
00282     LOG_INFO("mt29f_readPage: page 0x%lx off 0x%x\n", page, offset);
00283
00284     getAddrCycles(page, offset, &cycle0, &cycle1234);
00285
00286     sendCommand(MT29F_CSID(chip) |
00287         NFC_CMD_NFCCMD | NFC_CMD_NFCEN | NFC_CMD_ACYCLE_FIVE | NFC_CMD_VCMD2 |
00288         (MT29F_CMD_READ_2 << 10) | (MT29F_CMD_READ_1 << 2),
00289         5, cycle0, cycle1234);
00290
00291     waitReadyBusy();
00292     if (!waitTransferComplete())
00293     {
00294         LOG_ERR("mt29f: read timeout\n");
00295         chip->status |= MT29F_ERR_RD_TMOUT;
00296         return false;
00297     }
00298
00299     return true;
00300 }
00301
00302
00303 /*
00304  * Read page data and ECC, checking for errors.
00305  * TODO: fix errors with ECC when possible.
00306  */
00307 bool mt29f_read(Mt29f *chip, uint32_t page, void *buf, uint16_t size)
00308 {
00309     ASSERT(size <= MT29F_DATA_SIZE);
00310
00311     if (!mt29f_readPage(chip, page, 0))
00312         return false;
00313
00314     memcpy(buf, (void *)NFC_SRAM_BASE_ADDR, size);
00315
00316     return checkEcc();
00317 }
00318
00319
00320 /*
00321  * Write data in NFC SRAM buffer to a NAND page, starting at a given offset.
00322  * Usually offset will be 0 to write data or MT29F_DATA_SIZE to write the spare
00323  * area.
00324  *
00325  * According to datasheet to get ECC computed by hardware is sufficient
00326  * to write the main area.  But it seems that in that way the last ECC_PR
00327  * register is not generated.  The workaround is to write data and dummy (ff)
00328  * spare data in one write, at this point the last ECC_PR is correct and
00329  * ECC data can be written in the spare area with a second program operation.
00330  */
00331 static bool mt29f_writePage(Mt29f *chip, uint32_t page, uint16_t offset)
00332 {
00333     uint32_t cycle0;
00334     uint32_t cycle1234;
00335
00336     LOG_INFO("mt29f_writePage: page 0x%lx off 0x%x\n", page, offset);
00337
00338     getAddrCycles(page, offset, &cycle0, &cycle1234);
00339
00340     sendCommand(MT29F_CSID(chip) |
00341             NFC_CMD_NFCCMD | NFC_CMD_NFCWR | NFC_CMD_NFCEN | NFC_CMD_ACYCLE_FIVE |
00342             MT29F_CMD_WRITE_1 << 2,
00343             5, cycle0, cycle1234);
00344
00345     if (!waitTransferComplete())
00346     {
00347         LOG_ERR("mt29f: write timeout\n");
00348         chip->status |= MT29F_ERR_WR_TMOUT;
00349         return false;
00350     }
00351
00352     sendCommand(MT29F_CSID(chip) |
00353             NFC_CMD_NFCCMD | NFC_CMD_ACYCLE_NONE |
00354             MT29F_CMD_WRITE_2 << 2,
00355             0, 0, 0);
00356
00357     waitReadyBusy();
00358
00359     if (!isOperationComplete(chip))
00360     {
00361         LOG_ERR("mt29f: error writing page\n");
00362         chip->status |= MT29F_ERR_WRITE;
00363         return false;
00364     }
00365
00366     return true;
00367 }
00368
00369
00370 /*
00371  * Write data in a page.
00372  */
00373 static bool mt29f_writePageData(Mt29f *chip, uint32_t page, const void *buf, uint16_t size)
00374 {
00375     ASSERT(size <= MT29F_DATA_SIZE);
00376
00377     memset((void *)NFC_SRAM_BASE_ADDR, 0xff, MT29F_PAGE_SIZE);
00378     memcpy((void *)NFC_SRAM_BASE_ADDR, buf, size);
00379
00380     return mt29f_writePage(chip, page, 0);
00381 }
00382
00383
00384 /*
00385  * Write the ECC for a page.
00386  *
00387  * ECC data are extracted from ECC_PRx registers and written
00388  * in the page's spare area.
00389  * For 2048 bytes pages and 1 ECC word each 256 bytes,
00390  * 24 bytes of ECC data are stored.
00391  */
00392 static bool mt29f_writePageEcc(Mt29f *chip, uint32_t page)
00393 {
00394     int i;
00395     uint32_t *buf = (uint32_t *)NFC_SRAM_BASE_ADDR;
00396
00397     memset((void *)NFC_SRAM_BASE_ADDR, 0xff, MT29F_SPARE_SIZE);
00398
00399     for (i = 0; i < MT29F_ECC_NWORDS; i++)
00400         buf[i] = *((reg32_t *)(SMC_BASE + SMC_ECC_PR0_OFF) + i);
00401
00402     return mt29f_writePage(chip, page, MT29F_DATA_SIZE);
00403 }
00404
00405
00406 bool mt29f_write(Mt29f *chip, uint32_t page, const void *buf, uint16_t size)
00407 {
00408     return
00409         mt29f_writePageData(chip, page, buf, size) &&
00410         mt29f_writePageEcc(chip, page);
00411 }
00412
00413
00414 int mt29f_error(Mt29f *chip)
00415 {
00416     return chip->status;
00417 }
00418
00419
00420 void mt29f_clearError(Mt29f *chip)
00421 {
00422     chip->status = 0;
00423 }
00424
00425
00426 static void initPio(void)
00427 {
00428     /*
00429      * TODO: put following stuff in hw_ file dependent
00430      * Parameters for MT29F8G08AAD
00431      */
00432     pmc_periphEnable(PIOA_ID);
00433     pmc_periphEnable(PIOC_ID);
00434     pmc_periphEnable(PIOD_ID);
00435
00436     PIO_PERIPH_SEL(PIOA_BASE, MT29F_PINS_PORTA, MT29F_PERIPH_PORTA);
00437     PIOA_PDR = MT29F_PINS_PORTA;
00438     PIOA_PUER = MT29F_PINS_PORTA;
00439
00440     PIO_PERIPH_SEL(PIOC_BASE, MT29F_PINS_PORTC, MT29F_PERIPH_PORTC);
00441     PIOC_PDR = MT29F_PINS_PORTC;
00442     PIOC_PUER = MT29F_PINS_PORTC;
00443
00444     PIO_PERIPH_SEL(PIOD_BASE, MT29F_PINS_PORTD, MT29F_PERIPH_PORTD);
00445     PIOD_PDR = MT29F_PINS_PORTD;
00446     PIOD_PUER = MT29F_PINS_PORTD;
00447
00448     pmc_periphEnable(SMC_SDRAMC_ID);
00449 }
00450
00451
00452 static void initSmc(void)
00453 {
00454     SMC_SETUP0 = SMC_SETUP_NWE_SETUP(0)
00455         | SMC_SETUP_NCS_WR_SETUP(0)
00456         | SMC_SETUP_NRD_SETUP(0)
00457         | SMC_SETUP_NCS_RD_SETUP(0);
00458
00459     SMC_PULSE0 = SMC_PULSE_NWE_PULSE(2)
00460         | SMC_PULSE_NCS_WR_PULSE(3)
00461         | SMC_PULSE_NRD_PULSE(2)
00462         | SMC_PULSE_NCS_RD_PULSE(3);
00463
00464     SMC_CYCLE0 = SMC_CYCLE_NWE_CYCLE(3)
00465         | SMC_CYCLE_NRD_CYCLE(3);
00466
00467     SMC_TIMINGS0 = SMC_TIMINGS_TCLR(1)
00468         | SMC_TIMINGS_TADL(6)
00469         | SMC_TIMINGS_TAR(4)
00470         | SMC_TIMINGS_TRR(2)
00471         | SMC_TIMINGS_TWB(9)
00472         | SMC_TIMINGS_RBNSEL(7)
00473         | SMC_TIMINGS_NFSEL;
00474
00475     SMC_MODE0 = SMC_MODE_READ_MODE
00476         | SMC_MODE_WRITE_MODE;
00477
00478     SMC_CFG = SMC_CFG_PAGESIZE_PS2048_64
00479         | SMC_CFG_EDGECTRL
00480         | SMC_CFG_DTOMUL_X1048576
00481         | SMC_CFG_DTOCYC(0xF)
00482         | SMC_CFG_WSPARE
00483         | SMC_CFG_RSPARE;
00484
00485     // Disable SMC interrupts, reset and enable NFC controller
00486     SMC_IDR = ~0;
00487     SMC_CTRL = 0;
00488     SMC_CTRL = SMC_CTRL_NFCEN;
00489
00490     // Enable ECC, 1 ECC per 256 bytes
00491     SMC_ECC_CTRL = SMC_ECC_CTRL_SWRST;
00492     SMC_ECC_MD = SMC_ECC_MD_ECC_PAGESIZE_PS2048_64 | SMC_ECC_MD_TYPCORREC_C256B;
00493 }
00494
00495
00496 void mt29f_init(Mt29f *chip, uint8_t chip_select)
00497 {
00498     memset(chip, 0, sizeof(Mt29f));
00499
00500     chip->chip_select = chip_select;
00501
00502     initPio();
00503     initSmc();
00504     chipReset(chip);
00505 }
00506


BeRTOS: mt29f_sam3.h File Reference

  • cpu
  • cortex-m3
  • drv
mt29f_sam3.h File Reference

Micron MT29F serial NAND driver for SAM3's static memory controller (interface). More...

#include <drv/mt29f.h>

Go to the source code of this file.

Detailed Description

Micron MT29F serial NAND driver for SAM3's static memory controller (interface).

Author:
Stefano Fedrigo <aleph@develer.com>

Definition in file mt29f_sam3.h.


BeRTOS: mt29f_sam3.h Source File

  • cpu
  • cortex-m3
  • drv
mt29f_sam3.h
Go to the documentation of this file.
00001
00038 #ifndef MT29F_SAM3_H
00039 #define MT29F_SAM3_H
00040
00041 #include <drv/mt29f.h>
00042
00043
00044 // MT29F2G08AAD, FIXME: configurable
00045 #define MT29F_DATA_SIZE   0x800       // 2048 B
00046 #define MT29F_SPARE_SIZE  0x40        // 64 B
00047 #define MT29F_PAGE_SIZE   (MT29F_DATA_SIZE + MT29F_SPARE_SIZE)
00048 #define MT29F_BLOCK_SIZE  0x20000     // 128 kB
00049 #define MT29F_SIZE        0x10000000  // 256 MB
00050 #define MT29F_ECC_NWORDS  (MT29F_DATA_SIZE / 256)
00051
00052 /*
00053  * PIO definitions.
00054  */
00055 #define MT29F_PIN_CE        BV(6)
00056 #define MT29F_PIN_RB        BV(2)
00057 #define MT29F_PINS_PORTA    (MT29F_PIN_CE | MT29F_PIN_RB)
00058 #define MT29F_PERIPH_PORTA  PIO_PERIPH_B
00059
00060 #define MT29F_PIN_OE        BV(19)
00061 #define MT29F_PIN_WE        BV(20)
00062 #define MT29F_PIN_IO        0x0000FFFF
00063 #define MT29F_PINS_PORTC    (MT29F_PIN_OE | MT29F_PIN_WE | MT29F_PIN_IO)
00064 #define MT29F_PERIPH_PORTC  PIO_PERIPH_A
00065
00066 #define MT29F_PIN_CLE       BV(9)
00067 #define MT29F_PIN_ALE       BV(8)
00068 #define MT29F_PINS_PORTD    (MT29F_PIN_CLE | MT29F_PIN_ALE)
00069 #define MT29F_PERIPH_PORTD  PIO_PERIPH_A
00070
00071
00072 #endif /* MT29F_SAM3_H */
00073


BeRTOS: byteorder.h Source File

  • mware
mware/byteorder.h
00001 #warning This header is OBSOLETE
00002 #include <cpu/byteorder.h>


BeRTOS: pgm.h Source File

  • mware
mware/pgm.h
00001 #warning This header is OBSOLETE
00002 #include <cpu/pgm.h>


BeRTOS: rle.h Source File

  • mware
mware/rle.h
00001 #warning This header is OBSOLETE
00002 #include <algo/rle.h>


BeRTOS: ncenB18.c Source File

  • fonts
ncenB18.c
00001 /* Generated by convbdf on Thu Apr  8 18:53:54 CEST 2010. */
00002 #include <gfx/font.h>
00003
00004 /* Font information:
00005
00006    name: -Adobe-New Century Schoolbook-Bold-R-Normal--18-180-75-75-P-113-ISO10646-1
00007    pixel size: 18
00008    ascent: 16
00009    descent: 4
00010 */
00011
00012 /* Font character bitmap data. */
00013 static const PROGMEM uint8_t font_ncenB18_glyphs[] = {
00014
00015 /* Character (0x00): bbw=13, bbh=13, bbx=1, bby=0, width=16 */
00016 0x00, 0xa8, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00, 0xa8, 0x00, 0x00, /*            * * *           *               *               *               *               *               * * *                 */
00017 0x00, 0xaa, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, 0xaa, 0x00, 0x00, /*            * * *           *               *               *               *               *               * * *                         * * * *               *               *               *               *               *         * * * *                 */
00018 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*            * * *           *               *               *               *               *               * * *                         * * * *               *               *               *               *               *         * * * *                                                                                 */
00019
00020 /* Character (0x20): bbw=1, bbh=1, bbx=0, bby=0, width=5 */
00021 0x00, 0x00, 0x00, 0x00, 0x00, /*                                          */
00022 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                                  */
00023 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                                                      */
00024
00025 /* Character (0x21): bbw=4, bbh=14, bbx=1, bby=0, width=6 */
00026 0x00, 0xf8, 0xfc, 0xfc, 0xf8, 0x00, /*            *****  ******  ******   *****         */
00027 0x00, 0x60, 0xf7, 0xf7, 0x60, 0x00, /*            *****  ******  ******   *****                     ** *** ******* ****     **          */
00028 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*            *****  ******  ******   *****                     ** *** ******* ****     **                                  */
00029
00030 /* Character (0x22): bbw=5, bbh=5, bbx=1, bby=9, width=8 */
00031 0x00, 0x7c, 0x7c, 0x00, 0x7c, 0x7c, 0x00, 0x00, /*           *****   *****           *****   *****                  */
00032 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *****   *****           *****   *****                                                                                  */
00033 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *****   *****           *****   *****                                                                                                                  */
00034
00035 /* Character (0x23): bbw=11, bbh=13, bbx=0, bby=0, width=12 */
00036 0x00, 0xc0, 0xc0, 0xc0, 0xf8, 0xf8, 0xc0, 0xf8, 0xf8, 0xc0, 0xc0, 0x00, /*               **      **      **   *****   *****      **   *****   *****      **      **         */
00037 0x0c, 0x0c, 0xfc, 0xff, 0x0f, 0xfc, 0xff, 0x0f, 0x0c, 0x0c, 0x00, 0x00, /*               **      **      **   *****   *****      **   *****   *****      **      **          **      **      ******************      ******************      **      **                     */
00038 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*               **      **      **   *****   *****      **   *****   *****      **      **          **      **      ******************      ******************      **      **                                                                     */
00039
00040 /* Character (0x24): bbw=9, bbh=18, bbx=1, bby=-2, width=11 */
00041 0x00, 0xf0, 0xf8, 0xcc, 0x84, 0xff, 0x04, 0x0c, 0x38, 0x38, 0x00, /*             ****   *****  **  **  *    *********  *       **       ***     ***           */
00042 0x00, 0x70, 0xf1, 0xc3, 0x83, 0xff, 0x87, 0xcf, 0xfe, 0x7c, 0x00, /*             ****   *****  **  **  *    *********  *       **       ***     ***                      *** *   ******    ****     ************    *****  ** *******  *****          */
00043 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, /*             ****   *****  **  **  *    *********  *       **       ***     ***                      *** *   ******    ****     ************    *****  ** *******  *****                             **                       */
00044
00045 /* Character (0x25): bbw=14, bbh=14, bbx=0, bby=0, width=15 */
00046 0xf0, 0xf8, 0x0c, 0x04, 0x84, 0x78, 0x08, 0xc8, 0x74, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, /*     ****   *****  **      *       *    *   ****    *       *  **  * ***   ***                                            */
00047 0x00, 0x01, 0x01, 0xc1, 0x70, 0x1c, 0x07, 0x01, 0x78, 0xfc, 0x86, 0x82, 0x42, 0x3c, 0x00, /*     ****   *****  **      *       *    *   ****    *       *  **  * ***   ***                                                   *       *       *     **    ***   ***   ***     *          ****   ****** **    * *     * *    *   ****           */
00048 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*     ****   *****  **      *       *    *   ****    *       *  **  * ***   ***                                                   *       *       *     **    ***   ***   ***     *          ****   ****** **    * *     * *    *   ****                                                                       */
00049
00050 /* Character (0x26): bbw=16, bbh=14, bbx=0, bby=0, width=17 */
00051 0x00, 0x00, 0x00, 0xf0, 0xf8, 0xcc, 0x84, 0xc4, 0x6c, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                             ****   *****  **  **  *    *  *   **  ** **    ***                                                           */
00052 0x78, 0x7c, 0xfe, 0xc6, 0x83, 0x87, 0x8f, 0xde, 0x7c, 0x78, 0x79, 0xe7, 0xc3, 0xc1, 0x41, 0x20, 0x00, /*                             ****   *****  **  **  *    *  *   **  ** **    ***                                                             ****   *****  ******* **   ****     ****    *****   * **** **  *****    **** *  **** ***  *****    ***     ***     *      *           */
00053 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                             ****   *****  **  **  *    *  *   **  ** **    ***                                                             ****   *****  ******* **   ****     ****    *****   * **** **  *****    **** *  **** ***  *****    ***     ***     *      *                                                                               */
00054
00055 /* Character (0x27): bbw=2, bbh=5, bbx=1, bby=9, width=5 */
00056 0x00, 0x7c, 0x7c, 0x00, 0x00, /*           *****   *****                  */
00057 0x00, 0x00, 0x00, 0x00, 0x00, /*           *****   *****                                                          */
00058 0x00, 0x00, 0x00, 0x00, 0x00, /*           *****   *****                                                                              */
00059
00060 /* Character (0x28): bbw=5, bbh=16, bbx=1, bby=-2, width=6 */
00061 0x00, 0xc0, 0xf0, 0x38, 0x0c, 0x04, /*               **    ****   ***    **      *      */
00062 0x00, 0x3f, 0xff, 0xc0, 0x00, 0x00, /*               **    ****   ***    **      *             ******  ********      **                 */
00063 0x00, 0x00, 0x00, 0x01, 0x03, 0x02, /*               **    ****   ***    **      *             ******  ********      **                            *   **   *   */
00064
00065 /* Character (0x29): bbw=5, bbh=16, bbx=0, bby=-2, width=6 */
00066 0x04, 0x0c, 0x38, 0xf0, 0xc0, 0x00, /*   *       **       ***      ****      **         */
00067 0x00, 0x00, 0xc0, 0xff, 0x3f, 0x00, /*   *       **       ***      ****      **                              ****************           */
00068 0x02, 0x03, 0x01, 0x00, 0x00, 0x00, /*   *       **       ***      ****      **                              ****************           *  **  *                */
00069
00070 /* Character (0x2a): bbw=7, bbh=7, bbx=0, bby=7, width=8 */
00071 0xd8, 0x50, 0x24, 0xfc, 0x24, 0x50, 0xd8, 0x00, /*    ** **    * *   *  *    ******  *  *      * *    ** **         */
00072 0x00, 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00, /*    ** **    * *   *  *    ******  *  *      * *    ** **                        *       *       *                                */
00073 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*    ** **    * *   *  *    ******  *  *      * *    ** **                        *       *       *                                                                */
00074
00075 /* Character (0x2b): bbw=10, bbh=10, bbx=0, bby=0, width=11 */
00076 0x00, 0x00, 0x00, 0x00, 0xc0, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                       **      **                                         */
00077 0x0c, 0x0c, 0x0c, 0x0c, 0xff, 0xff, 0x0c, 0x0c, 0x0c, 0x0c, 0x00, /*                                       **      **                                          **      **      **      **    ****************  **      **      **      **             */
00078 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                       **      **                                          **      **      **      **    ****************  **      **      **      **                                                         */
00079
00080 /* Character (0x2c): bbw=4, bbh=7, bbx=0, bby=-3, width=5 */
00081 0x00, 0x00, 0x00, 0x00, 0x00, /*                                          */
00082 0x60, 0xf0, 0xf0, 0xe0, 0x00, /*                                              **     ****    ****     ***         */
00083 0x04, 0x02, 0x01, 0x00, 0x00, /*                                              **     ****    ****     ***          *  *  *            */
00084
00085 /* Character (0x2d): bbw=5, bbh=2, bbx=0, bby=4, width=6 */
00086 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                  */
00087 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x00, /*                                                   **      **      **      **      **             */
00088 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                   **      **      **      **      **                                     */
00089
00090 /* Character (0x2e): bbw=4, bbh=4, bbx=0, bby=0, width=5 */
00091 0x00, 0x00, 0x00, 0x00, 0x00, /*                                          */
00092 0x60, 0xf0, 0xf0, 0x60, 0x00, /*                                              **     ****    ****     **          */
00093 0x00, 0x00, 0x00, 0x00, 0x00, /*                                              **     ****    ****     **                              */
00094
00095 /* Character (0x2f): bbw=6, bbh=14, bbx=0, bby=0, width=7 */
00096 0x00, 0x00, 0x00, 0xe0, 0xfc, 0x1c, 0x00, /*                              ***  ******  ***            */
00097 0xc0, 0xf8, 0x3f, 0x07, 0x00, 0x00, 0x00, /*                              ***  ******  ***                 **   ***********  ***                              */
00098 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                              ***  ******  ***                 **   ***********  ***                                                          */
00099
00100 /* Character (0x30): bbw=9, bbh=14, bbx=1, bby=0, width=11 */
00101 0x00, 0xe0, 0xf8, 0xf8, 0x0c, 0x04, 0x0c, 0xf8, 0xf8, 0xe0, 0x00, /*              ***   *****   *****  **      *       **       *****   *****     ***         */
00102 0x00, 0x1f, 0x7f, 0x7f, 0xc0, 0x80, 0xc0, 0x7f, 0x7f, 0x1f, 0x00, /*              ***   *****   *****  **      *       **       *****   *****     ***                *****   ******* *******       **       *      ********* ******* *****            */
00103 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*              ***   *****   *****  **      *       **       *****   *****     ***                *****   ******* *******       **       *      ********* ******* *****                                                        */
00104
00105 /* Character (0x31): bbw=7, bbh=14, bbx=2, bby=0, width=11 */
00106 0x00, 0x00, 0x10, 0x10, 0xf8, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0x00, /*                     *       *      *****  ******  ******                                 */
00107 0x00, 0x00, 0x80, 0x80, 0xff, 0xff, 0xff, 0x80, 0x80, 0x00, 0x00, /*                     *       *      *****  ******  ******                                                       *       *************************       *       *                 */
00108 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                     *       *      *****  ******  ******                                                       *       *************************       *       *                                                             */
00109
00110 /* Character (0x32): bbw=9, bbh=14, bbx=1, bby=0, width=11 */
00111 0x00, 0x30, 0x78, 0x78, 0x04, 0x04, 0x0c, 0xfc, 0xf8, 0xf0, 0x00, /*             **     ****    ****   *       *       **      ******   *****    ****         */
00112 0x00, 0xc0, 0xe0, 0xf0, 0xd8, 0xcc, 0xc7, 0xc7, 0xc3, 0xe0, 0x00, /*             **     ****    ****   *       *       **      ******   *****    ****                      **     ***    ****   ** **  **  *****   *****   ****    **     ***         */
00113 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*             **     ****    ****   *       *       **      ******   *****    ****                      **     ***    ****   ** **  **  *****   *****   ****    **     ***                                                     */
00114
00115 /* Character (0x33): bbw=9, bbh=14, bbx=1, bby=0, width=11 */
00116 0x00, 0x30, 0x78, 0x78, 0x04, 0x04, 0x0c, 0xfc, 0xf8, 0x70, 0x00, /*             **     ****    ****   *       *       **      ******   *****    ***          */
00117 0x00, 0x30, 0x78, 0xf8, 0x81, 0x81, 0xc1, 0xfe, 0x7e, 0x3c, 0x00, /*             **     ****    ****   *       *       **      ******   *****    ***                     **     ****    ******      **      **     ** ******* ******   ****           */
00118 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*             **     ****    ****   *       *       **      ******   *****    ***                     **     ****    ******      **      **     ** ******* ******   ****                                                       */
00119
00120 /* Character (0x34): bbw=9, bbh=14, bbx=1, bby=0, width=11 */
00121 0x00, 0x00, 0x00, 0x80, 0x60, 0x18, 0xfc, 0xfc, 0xfc, 0x00, 0x00, /*                                *     **    **     ******  ******  ******                 */
00122 0x00, 0x18, 0x16, 0x11, 0x10, 0x90, 0xff, 0xff, 0xff, 0x90, 0x00, /*                                *     **    **     ******  ******  ******                           **    ** *   *   *       *       *  *************************    *  *         */
00123 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                *     **    **     ******  ******  ******                           **    ** *   *   *       *       *  *************************    *  *                                                     */
00124
00125 /* Character (0x35): bbw=9, bbh=14, bbx=1, bby=0, width=11 */
00126 0x00, 0x00, 0xfc, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x0c, 0x04, 0x00, /*                   ******  **   *  **   *  **   *  **   *  **   *  **      *              */
00127 0x00, 0x30, 0x79, 0xf8, 0x80, 0x80, 0xc1, 0xff, 0x7f, 0x3e, 0x00, /*                   ******  **   *  **   *  **   *  **   *  **   *  **      *                         **  *  ****    *****       *       **     *****************  *****           */
00128 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                   ******  **   *  **   *  **   *  **   *  **   *  **      *                         **  *  ****    *****       *       **     *****************  *****                                                       */
00129
00130 /* Character (0x36): bbw=9, bbh=14, bbx=1, bby=0, width=11 */
00131 0x00, 0xe0, 0xf8, 0xf8, 0x0c, 0x84, 0x84, 0xbc, 0x3c, 0x18, 0x00, /*              ***   *****   *****  **      *    *  *    *  **** *  ****     **            */
00132 0x00, 0x1f, 0x7f, 0x7f, 0xc1, 0x80, 0x81, 0x7f, 0x7f, 0x3e, 0x00, /*              ***   *****   *****  **      *    *  *    *  **** *  ****     **                   *****   ******* ******* *     **       **      ******** *******  *****           */
00133 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*              ***   *****   *****  **      *    *  *    *  **** *  ****     **                   *****   ******* ******* *     **       **      ******** *******  *****                                                       */
00134
00135 /* Character (0x37): bbw=9, bbh=14, bbx=1, bby=0, width=11 */
00136 0x00, 0x3c, 0x1c, 0x1c, 0x1c, 0x1c, 0xdc, 0xfc, 0x3c, 0x1c, 0x00, /*           ****    ***     ***     ***     ***     *** **  ******  ****    ***            */
00137 0x00, 0x00, 0x00, 0xf0, 0xfc, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, /*           ****    ***     ***     ***     ***     *** **  ******  ****    ***                                       ****  ******************                                     */
00138 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           ****    ***     ***     ***     ***     *** **  ******  ****    ***                                       ****  ******************                                                                                 */
00139
00140 /* Character (0x38): bbw=9, bbh=14, bbx=1, bby=0, width=11 */
00141 0x00, 0xf0, 0xf8, 0xc8, 0x84, 0x84, 0x04, 0x88, 0xf8, 0x70, 0x00, /*             ****   *****   *  **  *    *  *    *  *        *   *   *****    ***          */
00142 0x00, 0x78, 0x7d, 0xc3, 0x83, 0x87, 0x87, 0x4f, 0x7e, 0x3c, 0x00, /*             ****   *****   *  **  *    *  *    *  *        *   *   *****    ***                    **** * ***** **    ****     ****    ****    *****  *  ******   ****           */
00143 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*             ****   *****   *  **  *    *  *    *  *        *   *   *****    ***                    **** * ***** **    ****     ****    ****    *****  *  ******   ****                                                       */
00144
00145 /* Character (0x39): bbw=9, bbh=14, bbx=1, bby=0, width=11 */
00146 0x00, 0xf0, 0xf8, 0xf8, 0x04, 0x04, 0x0c, 0xf8, 0xf8, 0xe0, 0x00, /*             ****   *****   *****  *       *       **       *****   *****     ***         */
00147 0x00, 0x61, 0xf3, 0xf7, 0x86, 0x84, 0xc2, 0x7f, 0x7f, 0x1f, 0x00, /*             ****   *****   *****  *       *       **       *****   *****     ***                *    ** **  ******* **** **    *  *    * *    ********* ******* *****            */
00148 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*             ****   *****   *****  *       *       **       *****   *****     ***                *    ** **  ******* **** **    *  *    * *    ********* ******* *****                                                        */
00149
00150 /* Character (0x3a): bbw=4, bbh=9, bbx=1, bby=0, width=6 */
00151 0x00, 0x00, 0x80, 0x80, 0x00, 0x00, /*                        *       *                 */
00152 0x00, 0x63, 0xf7, 0xf7, 0x63, 0x00, /*                        *       *                        **   ** *** ******* ******   **          */
00153 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                        *       *                        **   ** *** ******* ******   **                                  */
00154
00155 /* Character (0x3b): bbw=4, bbh=12, bbx=1, bby=-3, width=6 */
00156 0x00, 0x00, 0x80, 0x80, 0x00, 0x00, /*                        *       *                 */
00157 0x00, 0x63, 0xf7, 0xf7, 0xe3, 0x00, /*                        *       *                        **   ** *** ******* ******   ***         */
00158 0x00, 0x04, 0x02, 0x01, 0x00, 0x00, /*                        *       *                        **   ** *** ******* ******   ***              *  *  *            */
00159
00160 /* Character (0x3c): bbw=10, bbh=10, bbx=0, bby=0, width=11 */
00161 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x80, 0xc0, 0xc0, 0x00, /*                                                        *       *      **      **         */
00162 0x0c, 0x0c, 0x1e, 0x1e, 0x33, 0x33, 0x61, 0x61, 0xc0, 0xc0, 0x00, /*                                                        *       *      **      **          **      **     ****    ****   **  **  **  **  *    ** *    **       **      **         */
00163 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                        *       *      **      **          **      **     ****    ****   **  **  **  **  *    ** *    **       **      **                                                     */
00164
00165 /* Character (0x3d): bbw=9, bbh=6, bbx=1, bby=2, width=11 */
00166 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                                          */
00167 0x00, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x00, /*                                                                                                 **  **  **  **  **  **  **  **  **  **  **  **  **  **  **  **  **  **           */
00168 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                                                 **  **  **  **  **  **  **  **  **  **  **  **  **  **  **  **  **  **                                                       */
00169
00170 /* Character (0x3e): bbw=10, bbh=10, bbx=0, bby=0, width=11 */
00171 0xc0, 0xc0, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*       **      **       *       *                                                         */
00172 0xc0, 0xc0, 0x61, 0x61, 0x33, 0x33, 0x1e, 0x1e, 0x0c, 0x0c, 0x00, /*       **      **       *       *                                                              **      ***    ** *    ** **  **  **  **   ****    ****     **      **             */
00173 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*       **      **       *       *                                                              **      ***    ** *    ** **  **  **  **   ****    ****     **      **                                                         */
00174
00175 /* Character (0x3f): bbw=9, bbh=14, bbx=0, bby=0, width=10 */
00176 0x30, 0x78, 0x78, 0x04, 0x04, 0x0c, 0xfc, 0xfc, 0x78, 0x00, /*     **     ****    ****   *       *       **      ******  ******   ****          */
00177 0x00, 0x00, 0x60, 0xf4, 0xf6, 0x63, 0x01, 0x00, 0x00, 0x00, /*     **     ****    ****   *       *       **      ******  ******   ****                              **   * **** ** ******   ** *                                */
00178 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*     **     ****    ****   *       *       **      ******  ******   ****                              **   * **** ** ******   ** *                                                                        */
00179
00180 /* Character (0x40): bbw=15, bbh=14, bbx=0, bby=0, width=16 */
00181 0x80, 0xe0, 0x70, 0x18, 0x88, 0xcc, 0x64, 0x24, 0x24, 0xe4, 0xe4, 0x0c, 0x18, 0xf8, 0xe0, 0x00, /*        *     ***    ***    **      *   *  **  **  *  **   *  *    *  *    *  ***  *  ***  **       **      *****     ***         */
00182 0x1f, 0x7f, 0x60, 0xce, 0xdf, 0x91, 0x90, 0x88, 0x9e, 0xdf, 0x51, 0x58, 0x2e, 0x07, 0x01, 0x00, /*        *     ***    ***    **      *   *  **  **  *  **   *  *    *  *    *  ***  *  ***  **       **      *****     ***        *****   *******      **  ***  ******* ***   *  *    *  *   *   * ****  ****** ***   * *    ** *  *** *  ***     *                */
00183 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *     ***    ***    **      *   *  **  **  *  **   *  *    *  *    *  ***  *  ***  **       **      *****     ***        *****   *******      **  ***  ******* ***   *  *    *  *   *   * ****  ****** ***   * *    ** *  *** *  ***     *                                                                                */
00184
00185 /* Character (0x41): bbw=14, bbh=14, bbx=0, bby=0, width=14 */
00186 0x00, 0x00, 0x00, 0x00, 0xc0, 0x70, 0x7c, 0xfc, 0xf0, 0x80, 0x00, 0x00, 0x00, 0x00, /*                                       **    ***   *****   ******    ****       *                                 */
00187 0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /*                                       **    ***   *****   ******    ****       *                                       *     ***   *** * ***    ** *       *       *    ** *    *****  ********* *******    ****      **       * */
00188 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                       **    ***   *****   ******    ****       *                                       *     ***   *** * ***    ** *       *       *    ** *    *****  ********* *******    ****      **       *                                                         */
00189
00190 /* Character (0x42): bbw=12, bbh=14, bbx=1, bby=0, width=14 */
00191 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x04, 0x8c, 0xfc, 0xfc, 0x78, 0x00, 0x00, /*           *       ******  ******  ******  *       *       *       **   *  ******  ******   ****                  */
00192 0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x81, 0x81, 0xc7, 0x7e, 0x7e, 0x3c, 0x00, /*           *       ******  ******  ******  *       *       *       **   *  ******  ******   ****                                **************************      **      **      **      ****   ** ******  ******   ****           */
00193 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *       *       *       **   *  ******  ******   ****                                **************************      **      **      **      ****   ** ******  ******   ****                                                                   */
00194
00195 /* Character (0x43): bbw=12, bbh=14, bbx=1, bby=0, width=14 */
00196 0x00, 0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x04, 0x04, 0x08, 0x38, 0xfc, 0x00, /*               **    ****   *****   ****   ***     **      *       *       *        *       ***    ******         */
00197 0x00, 0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0x40, 0x60, 0x18, 0x00, /*               **    ****   *****   ****   ***     **      *       *       *        *       ***    ******                ****    ******  *******    ****      ***      **       *       *       *      *      **    **            */
00198 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*               **    ****   *****   ****   ***     **      *       *       *        *       ***    ******                ****    ******  *******    ****      ***      **       *       *       *      *      **    **                                                                    */
00199
00200 /* Character (0x44): bbw=14, bbh=14, bbx=1, bby=0, width=16 */
00201 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x04, 0x04, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /*           *       ******  ******  ******  *       *       *       *       **      ***      ****    *****    ****      **         */
00202 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /*           *       ******  ******  ******  *       *       *       *       **      ***      ****    *****    ****      **                       *************************       *       *       *       *      **     ***   **** ******* ******  ****             */
00203 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *       *       *       *       **      ***      ****    *****    ****      **                       *************************       *       *       *       *      **     ***   **** ******* ******  ****                                                                             */
00204
00205 /* Character (0x45): bbw=11, bbh=14, bbx=1, bby=0, width=13 */
00206 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x84, 0xe4, 0x0c, 0x1c, 0x7c, 0x00, /*           *       ******  ******  ******  *       *       *    *  *  ***  **      ***     *****          */
00207 0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /*           *       ******  ******  ******  *       *       *    *  *  ***  **      ***     *****                        **************************      **      ***     *****   *      **     ***   *****         */
00208 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *       *       *    *  *  ***  **      ***     *****                        **************************      **      ***     *****   *      **     ***   *****                                                             */
00209
00210 /* Character (0x46): bbw=11, bbh=14, bbx=1, bby=0, width=13 */
00211 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x84, 0xe4, 0x0c, 0x1c, 0xfc, 0x00, /*           *       ******  ******  ******  *       *       *    *  *  ***  **      ***     ******         */
00212 0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x01, 0x03, 0x0f, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *       *       *    *  *  ***  **      ***     ******                       **************************      **       **      ****                                     */
00213 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *       *       *    *  *  ***  **      ***     ******                       **************************      **       **      ****                                                                                         */
00214
00215 /* Character (0x47): bbw=13, bbh=14, bbx=1, bby=0, width=15 */
00216 0x00, 0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x04, 0x04, 0x08, 0x38, 0xfc, 0x00, 0x00, /*               **    ****   *****   ****   ***     **      *       *       *        *       ***    ******                 */
00217 0x00, 0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0xc4, 0x7c, 0x7c, 0xfc, 0x04, 0x00, /*               **    ****   *****   ****   ***     **      *       *       *        *       ***    ******                        ****    ******  *******    ****      ***      **       *       *  *   **  *****   *****   ******  *              */
00218 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*               **    ****   *****   ****   ***     **      *       *       *        *       ***    ******                        ****    ******  *******    ****      ***      **       *       *  *   **  *****   *****   ******  *                                                                          */
00219
00220 /* Character (0x48): bbw=14, bbh=14, bbx=1, bby=0, width=16 */
00221 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x00, 0x00, 0x04, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, /*           *       ******  ******  ******  *       *                       *       *       ******  ******  ******  *              */
00222 0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x01, 0x01, 0x81, 0x81, 0xff, 0xff, 0xff, 0x80, 0x00, /*           *       ******  ******  ******  *       *                       *       *       ******  ******  ******  *                            **************************      **      **       *       *      **      *************************       *         */
00223 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *       *                       *       *       ******  ******  ******  *                            **************************      **      **       *       *      **      *************************       *                                                                         */
00224
00225 /* Character (0x49): bbw=5, bbh=14, bbx=2, bby=0, width=9 */
00226 0x00, 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, 0x00, /*                   *       ******  ******  ******  *                      */
00227 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /*                   *       ******  ******  ******  *                                            *************************       *                 */
00228 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                   *       ******  ******  ******  *                                            *************************       *                                                     */
00229
00230 /* Character (0x4a): bbw=11, bbh=14, bbx=0, bby=0, width=12 */
00231 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, /*                                           *       *       ******  ******  ******  *              */
00232 0x38, 0x7c, 0x9c, 0x98, 0x80, 0xc0, 0xe0, 0x7f, 0x7f, 0x3f, 0x00, 0x00, /*                                           *       *       ******  ******  ******  *                ***    *****   ***  *   **  *       *      **     ********** ******* ******                   */
00233 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                           *       *       ******  ******  ******  *                ***    *****   ***  *   **  *       *      **     ********** ******* ******                                                                   */
00234
00235 /* Character (0x4b): bbw=15, bbh=14, bbx=1, bby=0, width=16 */
00236 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x80, 0xc0, 0x60, 0x34, 0x1c, 0x0c, 0x04, 0x04, 0x00, /*           *       ******  ******  ******  *       *            *      **     **   * **    ***     **      *       *              */
00237 0x00, 0x80, 0xff, 0xff, 0xff, 0x86, 0x83, 0x07, 0x0f, 0xbf, 0xfe, 0xf8, 0xf0, 0xe0, 0xc0, 0x80, /*           *       ******  ******  ******  *       *            *      **     **   * **    ***     **      *       *                            ************************* **    ***     ****     ****    ****** * *******   *****    ****     ***      **       * */
00238 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *       *            *      **     **   * **    ***     **      *       *                            ************************* **    ***     ****     ****    ****** * *******   *****    ****     ***      **       *                                                                 */
00239
00240 /* Character (0x4c): bbw=11, bbh=14, bbx=1, bby=0, width=12 */
00241 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *       *                                              */
00242 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0xf8, /*           *       ******  ******  ******  *       *                                                            *************************       *       *       *       *      **     ***   ***** */
00243 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *       *                                                            *************************       *       *       *       *      **     ***   *****                                                 */
00244
00245 /* Character (0x4d): bbw=17, bbh=14, bbx=1, bby=0, width=19 */
00246 0x00, 0x00, 0x04, 0xfc, 0x1c, 0xfc, 0xfc, 0xf0, 0xc0, 0x00, 0x00, 0x00, 0xe0, 0x38, 0xfc, 0xfc, 0xfc, 0x04, 0x00, /*                   *       ******  ***     ******  ******    ****      **                             ***   ***    ******  ******  ******  *              */
00247 0x00, 0x80, 0xc0, 0xff, 0xc0, 0x80, 0x03, 0x1f, 0x7f, 0xfe, 0x3c, 0x07, 0x01, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /*                   *       ******  ***     ******  ******    ****      **                             ***   ***    ******  ******  ******  *                            *      **********      **       ***      *****   *******  *******  ****  ***     *              *************************       *         */
00248 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                   *       ******  ***     ******  ******    ****      **                             ***   ***    ******  ******  ******  *                            *      **********      **       ***      *****   *******  *******  ****  ***     *              *************************       *                                                                                     */
00249
00250 /* Character (0x4e): bbw=15, bbh=14, bbx=1, bby=0, width=16 */
00251 0x00, 0x04, 0x0c, 0xfc, 0x3c, 0x7c, 0xf8, 0xe0, 0xc0, 0x80, 0x00, 0x04, 0x0c, 0xfc, 0x0c, 0x04, /*           *       **      ******  ****    *****    *****     ***      **       *          *       **      ******  **      *      */
00252 0x00, 0x80, 0xc0, 0xff, 0xc0, 0x80, 0x00, 0x01, 0x07, 0x0f, 0x3e, 0x7c, 0xf0, 0xff, 0x00, 0x00, /*           *       **      ******  ****    *****    *****     ***      **       *          *       **      ******  **      *                    *      **********      **       *        *       ***     ****     *****    *****     ************                 */
00253 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       **      ******  ****    *****    *****     ***      **       *          *       **      ******  **      *                    *      **********      **       *        *       ***     ****     *****    *****     ************                                                                                 */
00254
00255 /* Character (0x4f): bbw=15, bbh=14, bbx=0, bby=0, width=16 */
00256 0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x04, 0x04, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /*       **    ****   *****   ****   ***     **      *       *       *       **      ***      ****    *****    ****      **         */
00257 0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /*       **    ****   *****   ****   ***     **      *       *       *       **      ***      ****    *****    ****      **        ****    ******  *******    ****      ***      **       *       *       *      **     ***   **** ******* ******  ****             */
00258 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*       **    ****   *****   ****   ***     **      *       *       *       **      ***      ****    *****    ****      **        ****    ******  *******    ****      ***      **       *       *       *      **     ***   **** ******* ******  ****                                                                             */
00259
00260 /* Character (0x50): bbw=12, bbh=14, bbx=1, bby=0, width=14 */
00261 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x04, 0x04, 0x8c, 0xfc, 0xfc, 0xf8, 0x00, /*           *       ******  ******  ******  *       *       *       *       **   *  ******  ******   *****         */
00262 0x00, 0x80, 0xff, 0xff, 0xff, 0x82, 0x82, 0x02, 0x03, 0x03, 0x01, 0x01, 0x00, 0x00, /*           *       ******  ******  ******  *       *       *       *       **   *  ******  ******   *****                       ************************* *     * *     * *      **      **      *       *                        */
00263 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *       *       *       *       **   *  ******  ******   *****                       ************************* *     * *     * *      **      **      *       *                                                                                */
00264
00265 /* Character (0x51): bbw=15, bbh=18, bbx=0, bby=-4, width=16 */
00266 0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x04, 0x04, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /*       **    ****   *****   ****   ***     **      *       *       *       **      ***      ****    *****    ****      **         */
00267 0x0f, 0x3f, 0x7f, 0x78, 0xd0, 0xc8, 0x88, 0x98, 0xf8, 0xf0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /*       **    ****   *****   ****   ***     **      *       *       *       **      ***      ****    *****    ****      **        ****    ******  *******    ****     * **   *  **   *   *   **  *   *****    ****     ***   **** ******* ******  ****             */
00268 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x0f, 0x0e, 0x0c, 0x06, 0x00, 0x00, /*       **    ****   *****   ****   ***     **      *       *       *       **      ***      ****    *****    ****      **        ****    ******  *******    ****     * **   *  **   *   *   **  *   *****    ****     ***   **** ******* ******  ****                                                *** **** ***  ** **          */
00269
00270 /* Character (0x52): bbw=14, bbh=14, bbx=1, bby=0, width=16 */
00271 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x04, 0x84, 0xcc, 0xfc, 0xfc, 0x78, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *       *       *       *    *  **  **  ******  ******   ****                          */
00272 0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x01, 0x01, 0x07, 0x3f, 0xfe, 0xfc, 0xe0, 0x80, 0x40, 0x00, /*           *       ******  ******  ******  *       *       *       *    *  **  **  ******  ******   ****                                        **************************      **       *       ***     ******   *******  ******     ***       *      *          */
00273 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *       *       *       *    *  **  **  ******  ******   ****                                        **************************      **       *       ***     ******   *******  ******     ***       *      *                                                                          */
00274
00275 /* Character (0x53): bbw=11, bbh=14, bbx=0, bby=0, width=12 */
00276 0xf0, 0xf8, 0xcc, 0x84, 0x84, 0x84, 0x84, 0x0c, 0x18, 0x3c, 0x00, 0x00, /*     ****   *****  **  **  *    *  *    *  *    *  *    *  **       **     ****                   */
00277 0xf8, 0x63, 0xc3, 0x83, 0x87, 0x87, 0x87, 0x87, 0xcf, 0x7f, 0x3e, 0x00, /*     ****   *****  **  **  *    *  *    *  *    *  *    *  **       **     ****                     *******   ** **    ****     ****    ****    ****    ****    *****  *********  *****           */
00278 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*     ****   *****  **  **  *    *  *    *  *    *  *    *  **       **     ****                     *******   ** **    ****     ****    ****    ****    ****    *****  *********  *****                                                           */
00279
00280 /* Character (0x54): bbw=11, bbh=14, bbx=1, bby=0, width=13 */
00281 0x00, 0x7c, 0x1c, 0x04, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x1c, 0x7c, 0x00, /*           *****   ***     *       *       ******  ******  ******  *       *       ***     *****          */
00282 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, 0x00, 0x00, /*           *****   ***     *       *       ******  ******  ******  *       *       ***     *****                                                *************************       *                                 */
00283 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *****   ***     *       *       ******  ******  ******  *       *       ***     *****                                                *************************       *                                                                                     */
00284
00285 /* Character (0x55): bbw=14, bbh=14, bbx=1, bby=0, width=16 */
00286 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, 0x00, 0x00, 0x00, 0x04, 0x0c, 0xfc, 0x0c, 0x04, 0x00, /*           *       ******  ******  ******  *                                       *       **      ******  **      *              */
00287 0x00, 0x00, 0x3f, 0x7f, 0xff, 0xc0, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x3f, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *                                       *       **      ******  **      *                             ******  ******* ********      **       *       *       *       *       *      * ******                           */
00288 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *                                       *       **      ******  **      *                             ******  ******* ********      **       *       *       *       *       *      * ******                                                                                           */
00289
00290 /* Character (0x56): bbw=14, bbh=14, bbx=0, bby=0, width=14 */
00291 0x04, 0x1c, 0xfc, 0xfc, 0xf4, 0x80, 0x00, 0x00, 0x00, 0x84, 0xfc, 0x1c, 0x0c, 0x04, /*   *       ***     ******  ******  * ****       *                          *    *  ******  ***     **      *      */
00292 0x00, 0x00, 0x00, 0x03, 0x0f, 0x3f, 0xfe, 0xf0, 0x3c, 0x07, 0x00, 0x00, 0x00, 0x00, /*   *       ***     ******  ******  * ****       *                          *    *  ******  ***     **      *                             **      ****    ******   *******    ****  ****  ***                                      */
00293 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*   *       ***     ******  ******  * ****       *                          *    *  ******  ***     **      *                             **      ****    ******   *******    ****  ****  ***                                                                                              */
00294
00295 /* Character (0x57): bbw=19, bbh=14, bbx=0, bby=0, width=19 */
00296 0x04, 0x3c, 0xfc, 0xfc, 0xe4, 0x00, 0x04, 0x8c, 0xfc, 0xfc, 0xfc, 0xc4, 0x00, 0x00, 0x84, 0xfc, 0x1c, 0x0c, 0x04, /*   *       ****    ******  ******  *  ***          *       **   *  ******  ******  ******  *   **                  *    *  ******  ***     **      *      */
00297 0x00, 0x00, 0x01, 0x0f, 0x7f, 0xff, 0x3c, 0x07, 0x00, 0x01, 0x0f, 0x7f, 0xfe, 0x3c, 0x07, 0x00, 0x00, 0x00, 0x00, /*   *       ****    ******  ******  *  ***          *       **   *  ******  ******  ******  *   **                  *    *  ******  ***     **      *                     *       ****    ******* ********  ****  ***             *       ****    *******  *******  ****  ***                                      */
00298 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*   *       ****    ******  ******  *  ***          *       **   *  ******  ******  ******  *   **                  *    *  ******  ***     **      *                     *       ****    ******* ********  ****  ***             *       ****    *******  *******  ****  ***                                                                                                                  */
00299
00300 /* Character (0x58): bbw=16, bbh=14, bbx=0, bby=0, width=17 */
00301 0x00, 0x04, 0x0c, 0x1c, 0x7c, 0xfc, 0xf4, 0xc0, 0x80, 0xc0, 0x64, 0x3c, 0x1c, 0x0c, 0x04, 0x04, 0x00, /*           *       **      ***     *****   ******  * ****      **       *      **  *  **   ****    ***     **      *       *              */
00302 0x80, 0xc0, 0xe0, 0xf0, 0x98, 0x0c, 0x07, 0x03, 0x07, 0x9f, 0xfe, 0xfc, 0xf0, 0xe0, 0xc0, 0x80, 0x00, /*           *       **      ***     *****   ******  * ****      **       *      **  *  **   ****    ***     **      *       *                    *      **     ***    ****   **  *  **    ***     **      ***     *****  * *******  ******    ****     ***      **       *         */
00303 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       **      ***     *****   ******  * ****      **       *      **  *  **   ****    ***     **      *       *                    *      **     ***    ****   **  *  **    ***     **      ***     *****  * *******  ******    ****     ***      **       *                                                                             */
00304
00305 /* Character (0x59): bbw=13, bbh=14, bbx=1, bby=0, width=15 */
00306 0x00, 0x04, 0x1c, 0x7c, 0xfc, 0xf4, 0xc0, 0x00, 0x00, 0x80, 0xe4, 0x3c, 0x0c, 0x04, 0x00, /*           *       ***     *****   ******  * ****      **                       *  *  ***  ****    **      *              */
00307 0x00, 0x00, 0x00, 0x00, 0x01, 0x87, 0xff, 0xff, 0xff, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ***     *****   ******  * ****      **                       *  *  ***  ****    **      *                                             *       ***    ***************************     *                                         */
00308 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ***     *****   ******  * ****      **                       *  *  ***  ****    **      *                                             *       ***    ***************************     *                                                                                                     */
00309
00310 /* Character (0x5a): bbw=11, bbh=14, bbx=1, bby=0, width=13 */
00311 0x00, 0x7c, 0x1c, 0x0c, 0x04, 0x04, 0xc4, 0xe4, 0xfc, 0x7c, 0x3c, 0x0c, 0x00, /*           *****   ***     **      *       *       *   **  *  ***  ******  *****   ****    **             */
00312 0x00, 0xc0, 0xf0, 0xf8, 0xfe, 0x9f, 0x8f, 0x83, 0x81, 0xc0, 0xe0, 0xf8, 0x00, /*           *****   ***     **      *       *       *   **  *  ***  ******  *****   ****    **                          **    ****   ***** ************  *****   ***     **      *      **     ***   *****         */
00313 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *****   ***     **      *       *       *   **  *  ***  ******  *****   ****    **                          **    ****   ***** ************  *****   ***     **      *      **     ***   *****                                                             */
00314
00315 /* Character (0x5b): bbw=4, bbh=16, bbx=1, bby=-2, width=5 */
00316 0x00, 0xfc, 0xfc, 0x04, 0x04, /*           ******  ******  *       *      */
00317 0x00, 0xff, 0xff, 0x00, 0x00, /*           ******  ******  *       *             ****************                 */
00318 0x00, 0x03, 0x03, 0x02, 0x02, /*           ******  ******  *       *             ****************                    **  **   *   *   */
00319
00320 /* Character (0x5c): bbw=8, bbh=14, bbx=0, bby=0, width=9 */
00321 0x0c, 0x3c, 0xf0, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, /*   **      ****      ****      **                                         */
00322 0x00, 0x00, 0x00, 0x03, 0x0f, 0x3c, 0xf0, 0xc0, 0x00, /*   **      ****      ****      **                                                                **      ****      ****      ****      **         */
00323 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*   **      ****      ****      **                                                                **      ****      ****      ****      **                                             */
00324
00325 /* Character (0x5d): bbw=4, bbh=16, bbx=0, bby=-2, width=5 */
00326 0x04, 0x04, 0xfc, 0xfc, 0x00, /*   *       *       ******  ******         */
00327 0x00, 0x00, 0xff, 0xff, 0x00, /*   *       *       ******  ******                        ****************         */
00328 0x02, 0x02, 0x03, 0x03, 0x00, /*   *       *       ******  ******                        ****************         *   *  **  **       */
00329
00330 /* Character (0x5e): bbw=8, bbh=8, bbx=0, bby=6, width=9 */
00331 0x00, 0xc0, 0xf0, 0x3c, 0x3c, 0xf0, 0xc0, 0x00, 0x00, /*               **    ****  ****    ****      ****      **                 */
00332 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, /*               **    ****  ****    ****      ****      **                **      **                                      **      **               */
00333 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*               **    ****  ****    ****      ****      **                **      **                                      **      **                                                   */
00334
00335 /* Character (0x5f): bbw=10, bbh=2, bbx=0, bby=-3, width=10 */
00336 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                                  */
00337 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                                                                                                                  */
00338 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, /*                                                                                                                                                                  **  **  **  **  **  **  **  **  **  **  */
00339
00340 /* Character (0x60): bbw=5, bbh=4, bbx=1, bby=10, width=7 */
00341 0x00, 0x0c, 0x1c, 0x18, 0x30, 0x20, 0x00, /*           **      ***      **       **       *           */
00342 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           **      ***      **       **       *                                                                   */
00343 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           **      ***      **       **       *                                                                                               */
00344
00345 /* Character (0x61): bbw=10, bbh=9, bbx=0, bby=0, width=11 */
00346 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /*                *       *       *       *       *       *       *                         */
00347 0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /*                *       *       *       *       *       *       *                        **  *** **  *****  *****   *   *   *   *  *   * ************************       *         */
00348 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                *       *       *       *       *       *       *                        **  *** **  *****  *****   *   *   *   *  *   * ************************       *                                                     */
00349
00350 /* Character (0x62): bbw=12, bbh=14, bbx=0, bby=0, width=13 */
00351 0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /*   *       ******  ******  ******               *       *       *       *                                 */
00352 0x00, 0xff, 0xff, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /*   *       ******  ******  ******               *       *       *       *                                        *********************** *     **       *       *       **     ********* *******  *****           */
00353 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*   *       ******  ******  ******               *       *       *       *                                        *********************** *     **       *       *       **     ********* *******  *****                                                               */
00354
00355 /* Character (0x63): bbw=9, bbh=9, bbx=0, bby=0, width=10 */
00356 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /*                                *       *       *       *       *                 */
00357 0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x81, 0x43, 0x63, 0x00, /*                                *       *       *       *       *                 *****  ******* ******* *     **       *       **      ***    * **   **          */
00358 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                *       *       *       *       *                 *****  ******* ******* *     **       *       **      ***    * **   **                                                  */
00359
00360 /* Character (0x64): bbw=12, bbh=14, bbx=0, bby=0, width=13 */
00361 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x00, /*                                *       *       *       *  *       ******  ******  ******                 */
00362 0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0x41, 0xff, 0xff, 0xff, 0x80, 0x00, /*                                *       *       *       *  *       ******  ******  ******                 *****  ******* ******* *     **       *       *       **     * ************************       *         */
00363 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                *       *       *       *  *       ******  ******  ******                 *****  ******* ******* *     **       *       *       **     * ************************       *                                                             */
00364
00365 /* Character (0x65): bbw=10, bbh=9, bbx=0, bby=0, width=11 */
00366 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /*                                *       *       *       *                                 */
00367 0x3e, 0x7f, 0x7f, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /*                                *       *       *       *                                 *****  ******* ******* *  *  **   *   *   *   **  *   *****   *****  *  *** **          */
00368 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                *       *       *       *                                 *****  ******* ******* *  *  **   *   *   *   **  *   *****   *****  *  *** **                                                      */
00369
00370 /* Character (0x66): bbw=8, bbh=14, bbx=0, bby=0, width=7 */
00371 0x80, 0xf0, 0xf8, 0xfc, 0x84, 0x9c, 0x1c, /*        *    ****   *****  ******  *    *  ***  *  ***    */
00372 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /*        *    ****   *****  ******  *    *  ***  *  ***          *************************       *                 */
00373 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *    ****   *****  ******  *    *  ***  *  ***          *************************       *                                             */
00374
00375 /* Character (0x67): bbw=11, bbh=15, bbx=0, bby=-4, width=11 */
00376 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x60, 0x60, /*                        *       *       *       *       *       *      *      **      **  */
00377 0x00, 0x6f, 0xff, 0xd9, 0xd0, 0xd0, 0xd9, 0xdf, 0xcf, 0x80, 0x00, /*                        *       *       *       *       *       *      *      **      **         **** ** *********  ** **    * **    * ***  ** ******* ******  **       *         */
00378 0x07, 0x0f, 0x0c, 0x08, 0x08, 0x08, 0x08, 0x0d, 0x07, 0x03, 0x00, /*                        *       *       *       *       *       *      *      **      **         **** ** *********  ** **    * **    * ***  ** ******* ******  **       *        *** ****  **   *   *   *   ** ***** **       */
00379
00380 /* Character (0x68): bbw=12, bbh=14, bbx=0, bby=0, width=13 */
00381 0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /*   *       ******  ******  ******               *       *       *       *       *                         */
00382 0x80, 0xff, 0xff, 0xff, 0x81, 0x00, 0x00, 0x81, 0xff, 0xff, 0xff, 0x80, 0x00, /*   *       ******  ******  ******               *       *       *       *       *                               **************************      *                *      *************************       *         */
00383 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*   *       ******  ******  ******               *       *       *       *       *                               **************************      *                *      *************************       *                                                             */
00384
00385 /* Character (0x69): bbw=5, bbh=14, bbx=0, bby=0, width=6 */
00386 0x80, 0x9c, 0x9c, 0x9c, 0x00, 0x00, /*        *  ***  *  ***  *  ***  *                 */
00387 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /*        *  ***  *  ***  *  ***  *                       *************************       *         */
00388 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *  ***  *  ***  *  ***  *                       *************************       *                                 */
00389
00390 /* Character (0x6a): bbw=7, bbh=18, bbx=0, bby=-4, width=9 */
00391 0x00, 0x00, 0x00, 0x80, 0x9c, 0x9c, 0x9c, 0x00, 0x00, /*                                *  ***  *  ***  *  ***  *                 */
00392 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, /*                                *  ***  *  ***  *  ***  *                                                ************************                 */
00393 0x06, 0x0e, 0x0e, 0x08, 0x0f, 0x07, 0x03, 0x00, 0x00, /*                                *  ***  *  ***  *  ***  *                                                ************************                 **  *** ***   ******** **           */
00394
00395 /* Character (0x6b): bbw=12, bbh=14, bbx=0, bby=0, width=13 */
00396 0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /*   *       ******  ******  ******                       *       *       *       *       *                 */
00397 0x80, 0xff, 0xff, 0xff, 0x88, 0x1c, 0xbe, 0xf9, 0xf1, 0xe0, 0xc0, 0x80, 0x00, /*   *       ******  ******  ******                       *       *       *       *       *                       *************************   *   *  ***    ***** **  ******   ****     ***      **       *         */
00398 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*   *       ******  ******  ******                       *       *       *       *       *                       *************************   *   *  ***    ***** **  ******   ****     ***      **       *                                                             */
00399
00400 /* Character (0x6c): bbw=5, bbh=14, bbx=0, bby=0, width=6 */
00401 0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x00, /*   *       ******  ******  ******                 */
00402 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /*   *       ******  ******  ******                       *************************       *         */
00403 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*   *       ******  ******  ******                       *************************       *                                 */
00404
00405 /* Character (0x6d): bbw=19, bbh=9, bbx=0, bby=0, width=20 */
00406 0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /*        *       *       *       *               *       *       *       *       *               *       *       *       *       *       *                         */
00407 0x80, 0xff, 0xff, 0xff, 0x81, 0x00, 0x00, 0x81, 0xff, 0xff, 0xff, 0x81, 0x00, 0x00, 0x81, 0xff, 0xff, 0xff, 0x80, 0x00, /*        *       *       *       *               *       *       *       *       *               *       *       *       *       *       *                               **************************      *                *      **************************      *                *      *************************       *         */
00408 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *       *       *               *       *       *       *       *               *       *       *       *       *       *                               **************************      *                *      **************************      *                *      *************************       *                                                                                         */
00409
00410 /* Character (0x6e): bbw=12, bbh=9, bbx=0, bby=0, width=13 */
00411 0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /*        *       *       *       *               *       *       *       *       *                         */
00412 0x80, 0xff, 0xff, 0xff, 0x81, 0x00, 0x00, 0x81, 0xff, 0xff, 0xff, 0x80, 0x00, /*        *       *       *       *               *       *       *       *       *                               **************************      *                *      *************************       *         */
00413 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *       *       *               *       *       *       *       *                               **************************      *                *      *************************       *                                                             */
00414
00415 /* Character (0x6f): bbw=11, bbh=9, bbx=0, bby=0, width=12 */
00416 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /*                                *       *       *       *       *                                 */
00417 0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /*                                *       *       *       *       *                                 *****  ******* ******* *     **       *       *       **     ********* *******  *****           */
00418 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                *       *       *       *       *                                 *****  ******* ******* *     **       *       *       **     ********* *******  *****                                                           */
00419
00420 /* Character (0x70): bbw=12, bbh=13, bbx=0, bby=-4, width=13 */
00421 0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /*        *       *       *                       *       *       *       *                                 */
00422 0x00, 0xff, 0xff, 0xff, 0x41, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /*        *       *       *                       *       *       *       *                                        *************************     *        *       *       **     ********* *******  *****           */
00423 0x08, 0x0f, 0x0f, 0x0f, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *       *                       *       *       *       *                                        *************************     *        *       *       **     ********* *******  *****             *************   *                                 */
00424
00425 /* Character (0x71): bbw=12, bbh=13, bbx=0, bby=-4, width=12 */
00426 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x80, 0x00, /*                                *       *       *       *                       *       *         */
00427 0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0x41, 0xff, 0xff, 0xff, 0x00, /*                                *       *       *       *                       *       *         *****  ******* ******* *     **       *       *       **     * ************************         */
00428 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0f, 0x0f, 0x0f, 0x08, /*                                *       *       *       *                       *       *         *****  ******* ******* *     **       *       *       **     * ************************                                       *************   * */
00429
00430 /* Character (0x72): bbw=8, bbh=9, bbx=0, bby=0, width=9 */
00431 0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x00, /*        *       *       *       *               *       *       *         */
00432 0x80, 0xff, 0xff, 0xff, 0x81, 0x00, 0x03, 0x03, 0x00, /*        *       *       *       *               *       *       *               **************************      *        **      **               */
00433 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *       *       *               *       *       *               **************************      *        **      **                                                   */
00434
00435 /* Character (0x73): bbw=9, bbh=9, bbx=0, bby=0, width=10 */
00436 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x00, 0x00, /*                        *       *       *       *               *                 */
00437 0xe6, 0x4f, 0x8f, 0x8c, 0x9c, 0x9c, 0xf9, 0x7b, 0x30, 0x00, /*                        *       *       *       *               *                 **  *******  * ****   *  **   *  ***  *  ***  **  ******* ****     **           */
00438 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                        *       *       *       *               *                 **  *******  * ****   *  **   *  ***  *  ***  **  ******* ****     **                                                   */
00439
00440 /* Character (0x74): bbw=7, bbh=13, bbx=0, bby=0, width=8 */
00441 0x80, 0xc0, 0xf0, 0xf8, 0x80, 0x80, 0x00, 0x00, /*        *      **    ****   *****       *       *                 */
00442 0x00, 0x7f, 0xff, 0xff, 0x80, 0x80, 0x60, 0x00, /*        *      **    ****   *****       *       *                        ******* ****************       *       *     **          */
00443 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *      **    ****   *****       *       *                        ******* ****************       *       *     **                                          */
00444
00445 /* Character (0x75): bbw=12, bbh=9, bbx=0, bby=0, width=13 */
00446 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /*        *       *       *       *                               *       *       *       *                 */
00447 0x00, 0x7f, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /*        *       *       *       *                               *       *       *       *                        ******* ****************      **       *       *      * ************************       *         */
00448 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *       *       *                               *       *       *       *                        ******* ****************      **       *       *      * ************************       *                                                             */
00449
00450 /* Character (0x76): bbw=10, bbh=9, bbx=0, bby=0, width=10 */
00451 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x80, 0x80, /*        *       *       *       *       *                       *       *       * */
00452 0x00, 0x03, 0x0f, 0x3f, 0xfc, 0xf0, 0x30, 0x0c, 0x03, 0x00, /*        *       *       *       *       *                       *       *       *        **      ****    ******    ******    ****    **    **    **               */
00453 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *       *       *       *                       *       *       *        **      ****    ******    ******    ****    **    **    **                                                       */
00454
00455 /* Character (0x77): bbw=16, bbh=9, bbx=0, bby=0, width=16 */
00456 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x80, 0x80, /*        *       *       *       *       *               *       *       *       *       *                       *       *       * */
00457 0x00, 0x03, 0x0f, 0x3f, 0xfc, 0xf0, 0x30, 0x0f, 0x0f, 0x3f, 0xfc, 0xf0, 0x30, 0x0c, 0x03, 0x00, /*        *       *       *       *       *               *       *       *       *       *                       *       *       *        **      ****    ******    ******    ****    **  ****    ****    ******    ******    ****    **    **    **               */
00458 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *       *       *       *               *       *       *       *       *                       *       *       *        **      ****    ******    ******    ****    **  ****    ****    ******    ******    ****    **    **    **                                                                               */
00459
00460 /* Character (0x78): bbw=11, bbh=9, bbx=0, bby=0, width=12 */
00461 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x80, 0x80, 0x00, /*        *       *       *       *       *       *                       *       *       *         */
00462 0x80, 0xc1, 0xc3, 0x27, 0x1f, 0xbe, 0xfc, 0xf2, 0xe1, 0xc1, 0x80, 0x00, /*        *       *       *       *       *       *                       *       *       *               **     ****    *****  *  *****    ***** *  ****** *  *****    ****     **       *         */
00463 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *       *       *       *       *                       *       *       *               **     ****    *****  *  *****    ***** *  ****** *  *****    ****     **       *                                                         */
00464
00465 /* Character (0x79): bbw=11, bbh=13, bbx=0, bby=-4, width=12 */
00466 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x00, /*        *       *       *       *       *                               *       *       *         */
00467 0x00, 0x03, 0x0f, 0x3f, 0xfc, 0xf0, 0xc0, 0x30, 0x0c, 0x03, 0x00, 0x00, /*        *       *       *       *       *                               *       *       *                **      ****    ******    ******    ****      **    **    **    **                       */
00468 0x06, 0x0e, 0x0c, 0x08, 0x04, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *       *       *       *                               *       *       *                **      ****    ******    ******    ****      **    **    **    **                       **  ***  **   *  * **                           */
00469
00470 /* Character (0x7a): bbw=8, bbh=9, bbx=0, bby=0, width=10 */
00471 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /*        *       *       *       *       *       *       *       *                 */
00472 0xc3, 0xe1, 0xf8, 0xfc, 0x9f, 0x87, 0xc3, 0xf1, 0x00, 0x00, /*        *       *       *       *       *       *       *       *                **    ***    ***   *****  ***********  ****    ***    ***   ****                 */
00473 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *       *       *       *       *       *       *                **    ***    ***   *****  ***********  ****    ***    ***   ****                                                         */
00474
00475 /* Character (0x7b): bbw=5, bbh=16, bbx=0, bby=-2, width=6 */
00476 0x00, 0xf0, 0xf8, 0x04, 0x04, 0x00, /*             ****   *****  *       *              */
00477 0x02, 0xff, 0xfd, 0x00, 0x00, 0x00, /*             ****   *****  *       *              *      ********* ******                         */
00478 0x00, 0x00, 0x01, 0x02, 0x02, 0x00, /*             ****   *****  *       *              *      ********* ******                                *    *   *       */
00479
00480 /* Character (0x7c): bbw=2, bbh=14, bbx=4, bby=0, width=11 */
00481 0x00, 0x00, 0x00, 0x00, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                   ******  ******                                         */
00482 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                   ******  ******                                                                        ****************                                         */
00483 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                   ******  ******                                                                        ****************                                                                                     */
00484
00485 /* Character (0x7d): bbw=5, bbh=16, bbx=0, bby=-2, width=6 */
00486 0x04, 0x04, 0xf8, 0xf0, 0x00, 0x00, /*   *       *        *****    ****                 */
00487 0x00, 0x00, 0xfd, 0xff, 0x02, 0x00, /*   *       *        *****    ****                                * ************** *               */
00488 0x02, 0x02, 0x01, 0x00, 0x00, 0x00, /*   *       *        *****    ****                                * ************** *               *   *  *                */
00489
00490 /* Character (0x7e): bbw=10, bbh=3, bbx=1, bby=4, width=12 */
00491 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                                                  */
00492 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x06, 0x0c, 0x0c, 0x0e, 0x06, 0x02, 0x00, /*                                                                                                            *      **     ***     **      **       **      **     ***     **      *               */
00493 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                                                            *      **     ***     **      **       **      **     ***     **      *                                                               */
00494
00495 /* Character (0xa0): bbw=1, bbh=1, bbx=0, bby=0, width=5 */
00496 0x00, 0x00, 0x00, 0x00, 0x00, /*                                          */
00497 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                                  */
00498 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                                                      */
00499
00500 /* Character (0xa1): bbw=4, bbh=14, bbx=1, bby=-4, width=7 */
00501 0x00, 0x80, 0xc0, 0xc0, 0x80, 0x00, 0x00, /*                *      **      **       *                 */
00502 0x00, 0xc1, 0xfb, 0xfb, 0xc1, 0x00, 0x00, /*                *      **      **       *                        *     **** ******* ******     **                 */
00503 0x00, 0x07, 0x0f, 0x0f, 0x07, 0x00, 0x00, /*                *      **      **       *                        *     **** ******* ******     **                    *** ***********          */
00504
00505 /* Character (0xa2): bbw=9, bbh=13, bbx=1, bby=-2, width=11 */
00506 0x00, 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x60, 0x00, /*                                        *       *       *       *       *     **          */
00507 0x00, 0x3e, 0x7f, 0x7f, 0xc1, 0xb0, 0x8c, 0x83, 0x43, 0x63, 0x00, /*                                        *       *       *       *       *     **                  *****  ******* ******* *     **    ** *  **   ***     ***    * **   **          */
00508 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                        *       *       *       *       *     **                  *****  ******* ******* *     **    ** *  **   ***     ***    * **   **                     **                               */
00509
00510 /* Character (0xa3): bbw=10, bbh=14, bbx=0, bby=0, width=11 */
00511 0x00, 0xf0, 0xf8, 0xfc, 0x04, 0x04, 0x34, 0x3c, 0x38, 0x00, 0x00, /*             ****   *****  ******  *       *       * **    ****     ***                   */
00512 0xc2, 0xa2, 0xa3, 0x7f, 0xdf, 0xce, 0xc2, 0xc2, 0xe2, 0x70, 0x00, /*             ****   *****  ******  *       *       * **    ****     ***                   *    ** *   * ***   * ******** ***** ** ***  ** *    ** *    ** *   ***    ***          */
00513 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*             ****   *****  ******  *       *       * **    ****     ***                   *    ** *   * ***   * ******** ***** ** ***  ** *    ** *    ** *   ***    ***                                                      */
00514
00515 /* Character (0xa4): bbw=9, bbh=9, bbx=0, bby=2, width=10 */
00516 0x60, 0xe0, 0xc0, 0x60, 0x60, 0x60, 0xc0, 0xe0, 0x60, 0x00, /*      **      ***      **     **      **      **       **     ***     **          */
00517 0x37, 0x3f, 0x18, 0x30, 0x30, 0x30, 0x18, 0x3f, 0x37, 0x00, /*      **      ***      **     **      **      **       **     ***     **         *** **  ******     **       **      **      **     **   ******  *** **           */
00518 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*      **      ***      **     **      **      **       **     ***     **         *** **  ******     **       **      **      **     **   ******  *** **                                                   */
00519
00520 /* Character (0xa5): bbw=13, bbh=14, bbx=1, bby=0, width=15 */
00521 0x00, 0x04, 0x1c, 0x3c, 0xfc, 0xf4, 0xc0, 0x00, 0x00, 0x80, 0xe4, 0x3c, 0x0c, 0x04, 0x00, /*           *       ***     ****    ******  * ****      **                       *  *  ***  ****    **      *              */
00522 0x00, 0x00, 0x00, 0x00, 0x0a, 0x8b, 0xff, 0xff, 0xff, 0x8b, 0x0a, 0x00, 0x00, 0x00, 0x00, /*           *       ***     ****    ******  * ****      **                       *  *  ***  ****    **      *                                              * *    ** *   *************************** *   * * *                                     */
00523 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ***     ****    ******  * ****      **                       *  *  ***  ****    **      *                                              * *    ** *   *************************** *   * * *                                                                                                 */
00524
00525 /* Character (0xa6): bbw=2, bbh=14, bbx=4, bby=0, width=11 */
00526 0x00, 0x00, 0x00, 0x00, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                   ******  ******                                         */
00527 0x00, 0x00, 0x00, 0x00, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                   ******  ******                                                                          ******  ******                                         */
00528 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                   ******  ******                                                                          ******  ******                                                                                     */
00529
00530 /* Character (0xa7): bbw=7, bbh=16, bbx=0, bby=-2, width=8 */
00531 0x38, 0xec, 0xc4, 0xc4, 0x9c, 0x98, 0x00, 0x00, /*    ***    ** ***  *   **  *   **  ***  *   **  *                 */
00532 0x8f, 0x9c, 0x18, 0x39, 0x31, 0xf3, 0x0f, 0x00, /*    ***    ** ***  *   **  *   **  ***  *   **  *                ****   *  ***  *   **   *  ***  *   **  **  ********             */
00533 0x01, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, 0x00, /*    ***    ** ***  *   **  *   **  ***  *   **  *                ****   *  ***  *   **   *  ***  *   **  **  ********            *   **   *   *  **  *            */
00534
00535 /* Character (0xa8): bbw=6, bbh=2, bbx=2, bby=10, width=10 */
00536 0x00, 0x00, 0x30, 0x30, 0x00, 0x00, 0x30, 0x30, 0x00, 0x00, /*                     **      **                      **      **                   */
00537 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                     **      **                      **      **                                                                                                   */
00538 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                     **      **                      **      **                                                                                                                                           */
00539
00540 /* Character (0xa9): bbw=14, bbh=14, bbx=0, bby=0, width=15 */
00541 0x80, 0x60, 0x10, 0x88, 0xc8, 0x64, 0x24, 0x24, 0x64, 0xe8, 0x08, 0x10, 0x60, 0x80, 0x00, /*        *     **     *      *   *   *  **  *  **   *  *    *  *    *  **    * ***   *        *        **        *         */
00542 0x07, 0x18, 0x20, 0x47, 0x4f, 0x98, 0x90, 0x90, 0x90, 0x48, 0x40, 0x20, 0x18, 0x07, 0x00, /*        *     **     *      *   *   *  **  *  **   *  *    *  *    *  **    * ***   *        *        **        *        ***        **        *  ***   * ****  *    **  *    *  *    *  *    *  *   *  *       *      *     **   ***              */
00543 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *     **     *      *   *   *  **  *  **   *  *    *  *    *  **    * ***   *        *        **        *        ***        **        *  ***   * ****  *    **  *    *  *    *  *    *  *   *  *       *      *     **   ***                                                                          */
00544
00545 /* Character (0xaa): bbw=7, bbh=8, bbx=0, bby=6, width=8 */
00546 0x68, 0xec, 0x94, 0x54, 0xfc, 0xf8, 0x80, 0x00, /*    * **   ** ***  * *  *  * * *   ******   *****       *         */
00547 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, /*    * **   ** ***  * *  *  * * *   ******   *****       *         *       *       *       *       *       *       *               */
00548 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*    * **   ** ***  * *  *  * * *   ******   *****       *         *       *       *       *       *       *       *                                               */
00549
00550 /* Character (0xab): bbw=8, bbh=5, bbx=0, bby=3, width=9 */
00551 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                          */
00552 0x04, 0x0e, 0x0a, 0x11, 0x04, 0x0e, 0x0a, 0x11, 0x00, /*                                                                           *      ***     * *    *   *     *      ***     * *    *   *            */
00553 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                           *      ***     * *    *   *     *      ***     * *    *   *                                                */
00554
00555 /* Character (0xac): bbw=9, bbh=6, bbx=0, bby=2, width=10 */
00556 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                                  */
00557 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x3f, 0x3f, 0x00, /*                                                                                 **      **      **      **      **      **      **      ******  ******           */
00558 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                                 **      **      **      **      **      **      **      ******  ******                                                   */
00559
00560 /* Character (0xad): bbw=5, bbh=2, bbx=0, bby=4, width=6 */
00561 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                  */
00562 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x00, /*                                                   **      **      **      **      **             */
00563 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                   **      **      **      **      **                                     */
00564
00565 /* Character (0xae): bbw=14, bbh=14, bbx=0, bby=0, width=15 */
00566 0x80, 0x60, 0x10, 0x28, 0xe8, 0xe4, 0x24, 0x24, 0xe4, 0xc8, 0x08, 0x10, 0x60, 0x80, 0x00, /*        *     **     *      * *     * ***  *  ***  *  *    *  *    *  ***   *  **   *        *        **        *         */
00567 0x07, 0x18, 0x20, 0x48, 0x4f, 0x8f, 0x89, 0x83, 0x8f, 0x4c, 0x48, 0x20, 0x18, 0x07, 0x00, /*        *     **     *      * *     * ***  *  ***  *  *    *  *    *  ***   *  **   *        *        **        *        ***        **        *     *  * ****  * ****   **  *   ***     *****   *  **  *    *  *      *     **   ***              */
00568 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *     **     *      * *     * ***  *  ***  *  *    *  *    *  ***   *  **   *        *        **        *        ***        **        *     *  * ****  * ****   **  *   ***     *****   *  **  *    *  *      *     **   ***                                                                          */
00569
00570 /* Character (0xaf): bbw=6, bbh=2, bbx=1, bby=10, width=8 */
00571 0x00, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x00, /*             **      **      **      **      **      **           */
00572 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*             **      **      **      **      **      **                                                                           */
00573 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*             **      **      **      **      **      **                                                                                                           */
00574
00575 /* Character (0xb0): bbw=6, bbh=6, bbx=0, bby=8, width=7 */
00576 0x78, 0xcc, 0x84, 0x84, 0xcc, 0x78, 0x00, /*    ****   **  **  *    *  *    *  **  **   ****          */
00577 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*    ****   **  **  *    *  *    *  **  **   ****                                                                  */
00578 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*    ****   **  **  *    *  *    *  **  **   ****                                                                                              */
00579
00580 /* Character (0xb1): bbw=10, bbh=11, bbx=0, bby=0, width=11 */
00581 0x00, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                      ***     ***                                         */
00582 0xc3, 0xc3, 0xc3, 0xc3, 0xdf, 0xdf, 0xc3, 0xc3, 0xc3, 0xc3, 0x00, /*                                      ***     ***                                        **    ****    ****    ****    ******* ******* ****    ****    ****    ****    **         */
00583 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                      ***     ***                                        **    ****    ****    ****    ******* ******* ****    ****    ****    ****    **                                                     */
00584
00585 /* Character (0xb2): bbw=6, bbh=8, bbx=0, bby=6, width=6 */
00586 0x18, 0x9c, 0xc4, 0x64, 0x3c, 0x18, /*    **     ***  *  *   **  *  **   ****     **    */
00587 0x03, 0x03, 0x02, 0x02, 0x02, 0x03, /*    **     ***  *  *   **  *  **   ****     **   **      **       *       *       *      **       */
00588 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*    **     ***  *  *   **  *  **   ****     **   **      **       *       *       *      **                               */
00589
00590 /* Character (0xb3): bbw=6, bbh=8, bbx=0, bby=6, width=6 */
00591 0x88, 0x8c, 0x24, 0x24, 0xfc, 0xd8, /*    *   *  **   *  *  *    *  *    ******   ** ** */
00592 0x01, 0x03, 0x02, 0x02, 0x03, 0x01, /*    *   *  **   *  *  *    *  *    ******   ** ***       **       *       *      **      *        */
00593 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*    *   *  **   *  *  *    *  *    ******   ** ***       **       *       *      **      *                                */
00594
00595 /* Character (0xb4): bbw=5, bbh=4, bbx=1, bby=10, width=7 */
00596 0x00, 0x20, 0x30, 0x18, 0x1c, 0x0c, 0x00, /*              *      **     **     ***     **             */
00597 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*              *      **     **     ***     **                                                                     */
00598 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*              *      **     **     ***     **                                                                                                 */
00599
00600 /* Character (0xb5): bbw=12, bbh=13, bbx=0, bby=-4, width=13 */
00601 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /*        *       *       *       *                               *       *       *       *                 */
00602 0x00, 0xff, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /*        *       *       *       *                               *       *       *       *                        ************************      **       *       *      * ************************       *         */
00603 0x00, 0x07, 0x0f, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *       *       *                               *       *       *       *                        ************************      **       *       *      * ************************       *            *** **** **                                      */
00604
00605 /* Character (0xb6): bbw=13, bbh=14, bbx=0, bby=0, width=14 */
00606 0xf0, 0xf8, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, /*     ****   *****  ******  ******  ******  ******  ******  *       *       ******  ******  ******  *              */
00607 0x00, 0x01, 0x03, 0x83, 0xff, 0xff, 0xff, 0x80, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /*     ****   *****  ******  ******  ******  ******  ******  *       *       ******  ******  ******  *                     *       **      **     *************************       *       *************************       *         */
00608 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*     ****   *****  ******  ******  ******  ******  ******  *       *       ******  ******  ******  *                     *       **      **     *************************       *       *************************       *                                                                 */
00609
00610 /* Character (0xb7): bbw=4, bbh=4, bbx=0, bby=3, width=5 */
00611 0x00, 0x00, 0x00, 0x00, 0x00, /*                                          */
00612 0x0c, 0x1e, 0x1e, 0x0c, 0x00, /*                                           **     ****    ****     **             */
00613 0x00, 0x00, 0x00, 0x00, 0x00, /*                                           **     ****    ****     **                                 */
00614
00615 /* Character (0xb8): bbw=4, bbh=4, bbx=1, bby=-4, width=6 */
00616 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                  */
00617 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                                                  */
00618 0x00, 0x08, 0x0b, 0x0e, 0x06, 0x00, /*                                                                                                        *** * *** **      */
00619
00620 /* Character (0xb9): bbw=6, bbh=8, bbx=0, bby=6, width=6 */
00621 0x08, 0x08, 0xfc, 0xfc, 0x00, 0x00, /*    *       *      ******  ******                 */
00622 0x02, 0x02, 0x03, 0x03, 0x02, 0x02, /*    *       *      ******  ******                 *       *      **      **       *       *       */
00623 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*    *       *      ******  ******                 *       *      **      **       *       *                               */
00624
00625 /* Character (0xba): bbw=6, bbh=8, bbx=0, bby=6, width=7 */
00626 0x78, 0xfc, 0x84, 0x84, 0xfc, 0x78, 0x00, /*    ****   ******  *    *  *    *  ******   ****          */
00627 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, /*    ****   ******  *    *  *    *  ******   ****          *       *       *       *       *       *               */
00628 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*    ****   ******  *    *  *    *  ******   ****          *       *       *       *       *       *                                           */
00629
00630 /* Character (0xbb): bbw=8, bbh=5, bbx=0, bby=3, width=9 */
00631 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                          */
00632 0x11, 0x0a, 0x0e, 0x04, 0x11, 0x0a, 0x0e, 0x04, 0x00, /*                                                                         *   *    * *     ***      *     *   *    * *     ***      *              */
00633 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                                         *   *    * *     ***      *     *   *    * *     ***      *                                                  */
00634
00635 /* Character (0xbc): bbw=14, bbh=14, bbx=0, bby=0, width=15 */
00636 0x08, 0x08, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0xc0, 0xf0, 0x3c, 0x0c, 0x00, 0x00, 0x00, 0x00, /*    *       *      ******  ******                              **    ****  ****    **                                     */
00637 0x02, 0x02, 0x03, 0xc3, 0xf2, 0x3e, 0x0f, 0x33, 0x38, 0x2c, 0xa6, 0xff, 0xff, 0xa0, 0x00, /*    *       *      ******  ******                              **    ****  ****    **                                     *       *      **      **    ** *  **** *****  ****    **  **     ***    ** *   **  * *****************     * *         */
00638 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*    *       *      ******  ******                              **    ****  ****    **                                     *       *      **      **    ** *  **** *****  ****    **  **     ***    ** *   **  * *****************     * *                                                                     */
00639
00640 /* Character (0xbd): bbw=14, bbh=14, bbx=0, bby=0, width=15 */
00641 0x08, 0x08, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0xc0, 0xf0, 0x3c, 0x0c, 0x00, 0x00, 0x00, 0x00, /*    *       *      ******  ******                              **    ****  ****    **                                     */
00642 0x02, 0x02, 0x03, 0xc3, 0xf2, 0x3e, 0x0f, 0x03, 0xc6, 0xe7, 0xb1, 0x99, 0x8f, 0xc6, 0x00, /*    *       *      ******  ******                              **    ****  ****    **                                     *       *      **      **    ** *  **** *****  ****    **       **   *****  ****   ** **  **  *****   * **   **         */
00643 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*    *       *      ******  ******                              **    ****  ****    **                                     *       *      **      **    ** *  **** *****  ****    **       **   *****  ****   ** **  **  *****   * **   **                                                                     */
00644
00645 /* Character (0xbe): bbw=14, bbh=14, bbx=0, bby=0, width=15 */
00646 0x88, 0x8c, 0x24, 0x24, 0xfc, 0xd8, 0x00, 0xc0, 0xf0, 0x3c, 0x0c, 0x00, 0x00, 0x00, 0x00, /*    *   *  **   *  *  *    *  *    ******   ** **              **    ****  ****    **                                     */
00647 0x01, 0x03, 0x02, 0xc2, 0xf3, 0x3d, 0x0f, 0x33, 0x38, 0x2c, 0xa6, 0xff, 0xff, 0xa0, 0x00, /*    *   *  **   *  *  *    *  *    ******   ** **              **    ****  ****    **                                    *       **       *       *    ****  ***** ****  ****    **  **     ***    ** *   **  * *****************     * *         */
00648 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*    *   *  **   *  *  *    *  *    ******   ** **              **    ****  ****    **                                    *       **       *       *    ****  ***** ****  ****    **  **     ***    ** *   **  * *****************     * *                                                                     */
00649
00650 /* Character (0xbf): bbw=9, bbh=14, bbx=0, bby=-4, width=10 */
00651 0x00, 0x00, 0x00, 0x80, 0xc0, 0xc0, 0x80, 0x00, 0x00, 0x00, /*                                *      **      **       *                         */
00652 0x80, 0xc0, 0xe0, 0x31, 0x1b, 0x0b, 0x81, 0x80, 0x00, 0x00, /*                                *      **      **       *                               *      **     ****   **  ** **   ** *    *      *       *                 */
00653 0x07, 0x0f, 0x0f, 0x0c, 0x08, 0x08, 0x07, 0x07, 0x03, 0x00, /*                                *      **      **       *                               *      **     ****   **  ** **   ** *    *      *       *                *** ********  **   *   **** *** **       */
00654
00655 /* Character (0xc0): bbw=14, bbh=19, bbx=0, bby=0, width=14 */
00656 0x00, 0x00, 0x00, 0x00, 0xc0, 0x70, 0x7d, 0xfd, 0xf0, 0x80, 0x00, 0x00, 0x00, 0x00, /*                                       **    *** * ***** * ******    ****       *                                 */
00657 0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /*                                       **    *** * ***** * ******    ****       *                                       *     ***   *** * ***    ** *       *       *    ** *    *****  ********* *******    ****      **       * */
00658 0x00, 0x00, 0x00, 0x06, 0x0e, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                       **    *** * ***** * ******    ****       *                                       *     ***   *** * ***    ** *       *       *    ** *    *****  ********* *******    ****      **       *             **  ***  **   *                             */
00659
00660 /* Character (0xc1): bbw=14, bbh=19, bbx=0, bby=0, width=14 */
00661 0x00, 0x00, 0x00, 0x00, 0xc0, 0x70, 0x7d, 0xfd, 0xf0, 0x80, 0x00, 0x00, 0x00, 0x00, /*                                       **    *** * ***** * ******    ****       *                                 */
00662 0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /*                                       **    *** * ***** * ******    ****       *                                       *     ***   *** * ***    ** *       *       *    ** *    *****  ********* *******    ****      **       * */
00663 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, 0x00, 0x00, /*                                       **    *** * ***** * ******    ****       *                                       *     ***   *** * ***    ** *       *       *    ** *    *****  ********* *******    ****      **       *                               *  ** *** **              */
00664
00665 /* Character (0xc2): bbw=14, bbh=18, bbx=0, bby=0, width=14 */
00666 0x00, 0x00, 0x00, 0x00, 0xc1, 0x71, 0x7c, 0xfc, 0xf0, 0x81, 0x01, 0x00, 0x00, 0x00, /*                                 *     ***   ***   *****   ******    *****      **                                */
00667 0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /*                                 *     ***   ***   *****   ******    *****      **                                      *     ***   *** * ***    ** *       *       *    ** *    *****  ********* *******    ****      **       * */
00668 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, /*                                 *     ***   ***   *****   ******    *****      **                                      *     ***   *** * ***    ** *       *       *    ** *    *****  ********* *******    ****      **       *                       *  **  **  **   *                 */
00669
00670 /* Character (0xc3): bbw=14, bbh=18, bbx=0, bby=0, width=14 */
00671 0x00, 0x00, 0x00, 0x01, 0xc0, 0x70, 0x7c, 0xfd, 0xf1, 0x80, 0x00, 0x00, 0x00, 0x00, /*                         *             **    ***   ***** * *******   ****       *                                 */
00672 0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /*                         *             **    ***   ***** * *******   ****       *                                       *     ***   *** * ***    ** *       *       *    ** *    *****  ********* *******    ****      **       * */
00673 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x08, 0x08, 0x08, 0x04, 0x00, 0x00, 0x00, /*                         *             **    ***   ***** * *******   ****       *                                       *     ***   *** * ***    ** *       *       *    ** *    *****  ********* *******    ****      **       *                   *  **  **   *   *   *  *              */
00674
00675 /* Character (0xc4): bbw=14, bbh=17, bbx=0, bby=0, width=14 */
00676 0x00, 0x00, 0x00, 0x00, 0xc1, 0x71, 0x7c, 0xfc, 0xf1, 0x81, 0x00, 0x00, 0x00, 0x00, /*                                 *     ***   ***   *****   *******   *****      *                                 */
00677 0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /*                                 *     ***   ***   *****   *******   *****      *                                       *     ***   *** * ***    ** *       *       *    ** *    *****  ********* *******    ****      **       * */
00678 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, /*                                 *     ***   ***   *****   *******   *****      *                                       *     ***   *** * ***    ** *       *       *    ** *    *****  ********* *******    ****      **       *                   *   *           *   *                 */
00679
00680 /* Character (0xc5): bbw=14, bbh=18, bbx=0, bby=0, width=14 */
00681 0x00, 0x00, 0x00, 0x00, 0xc0, 0x71, 0x7e, 0xfe, 0xf1, 0x80, 0x00, 0x00, 0x00, 0x00, /*                                       ***   ***  ******  ********   ****       *                                 */
00682 0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /*                                       ***   ***  ******  ********   ****       *                                       *     ***   *** * ***    ** *       *       *    ** *    *****  ********* *******    ****      **       * */
00683 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x04, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                       ***   ***  ******  ********   ****       *                                       *     ***   *** * ***    ** *       *       *    ** *    *****  ********* *******    ****      **       *                       *  *   *    *                     */
00684
00685 /* Character (0xc6): bbw=20, bbh=14, bbx=0, bby=0, width=21 */
00686 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xc4, 0x74, 0x1c, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x84, 0xe4, 0x0c, 0x1c, 0x7c, 0x00, /*                                                *  *   **  * ***   ***     *       ******  ******  ******  *       *       *    *  *  ***  **      ***     *****          */
00687 0x80, 0xc0, 0xf0, 0x8c, 0x06, 0x07, 0x04, 0x84, 0x84, 0x84, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /*                                                *  *   **  * ***   ***     *       ******  ******  ******  *       *       *    *  *  ***  **      ***     *****                *      **    ****  **   * **     ***       *       *    *  *    *  *    **************************      **      ***     *****   *      **     ***   *****         */
00688 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                                *  *   **  * ***   ***     *       ******  ******  ******  *       *       *    *  *  ***  **      ***     *****                *      **    ****  **   * **     ***       *       *    *  *    *  *    **************************      **      ***     *****   *      **     ***   *****                                                                                             */
00689
00690 /* Character (0xc7): bbw=12, bbh=18, bbx=1, bby=-4, width=14 */
00691 0x00, 0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x04, 0x04, 0x08, 0x38, 0xfc, 0x00, /*               **    ****   *****   ****   ***     **      *       *       *        *       ***    ******         */
00692 0x00, 0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0x40, 0x60, 0x18, 0x00, /*               **    ****   *****   ****   ***     **      *       *       *        *       ***    ******                ****    ******  *******    ****      ***      **       *       *       *      *      **    **            */
00693 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0b, 0x0e, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, /*               **    ****   *****   ****   ***     **      *       *       *        *       ***    ******                ****    ******  *******    ****      ***      **       *       *       *      *      **    **                                  *** * *** **                      */
00694
00695 /* Character (0xc8): bbw=11, bbh=19, bbx=1, bby=0, width=13 */
00696 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x05, 0x85, 0xe4, 0x0c, 0x1c, 0x7c, 0x00, /*           *       ******  ******  ******  *     * *     * *    *  *  ***  **      ***     *****          */
00697 0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /*           *       ******  ******  ******  *     * *     * *    *  *  ***  **      ***     *****                        **************************      **      ***     *****   *      **     ***   *****         */
00698 0x00, 0x00, 0x00, 0x06, 0x0e, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *     * *     * *    *  *  ***  **      ***     *****                        **************************      **      ***     *****   *      **     ***   *****                     **  ***  **   *                         */
00699
00700 /* Character (0xc9): bbw=11, bbh=19, bbx=1, bby=0, width=13 */
00701 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x05, 0x05, 0x84, 0xe4, 0x0c, 0x1c, 0x7c, 0x00, /*           *       ******  ******  ******* *     * *       *    *  *  ***  **      ***     *****          */
00702 0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /*           *       ******  ******  ******* *     * *       *    *  *  ***  **      ***     *****                        **************************      **      ***     *****   *      **     ***   *****         */
00703 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, 0x00, 0x00, /*           *       ******  ******  ******* *     * *       *    *  *  ***  **      ***     *****                        **************************      **      ***     *****   *      **     ***   *****                                   *  ** *** **              */
00704
00705 /* Character (0xca): bbw=11, bbh=18, bbx=1, bby=0, width=13 */
00706 0x00, 0x04, 0xfc, 0xfd, 0xfd, 0x04, 0x04, 0x84, 0xe5, 0x0d, 0x1c, 0x7c, 0x00, /*           *       ******* ******* ******  *       *       *    ** *  **** **      ***     *****          */
00707 0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /*           *       ******* ******* ******  *       *       *    ** *  **** **      ***     *****                        **************************      **      ***     *****   *      **     ***   *****         */
00708 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, /*           *       ******* ******* ******  *       *       *    ** *  **** **      ***     *****                        **************************      **      ***     *****   *      **     ***   *****                           *  **  **  **   *                 */
00709
00710 /* Character (0xcb): bbw=11, bbh=17, bbx=1, bby=0, width=13 */
00711 0x00, 0x04, 0xfc, 0xfc, 0xfd, 0x05, 0x04, 0x84, 0xe5, 0x0d, 0x1c, 0x7c, 0x00, /*           *       ******  ******* ******* *       *       *    ** *  **** **      ***     *****          */
00712 0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /*           *       ******  ******* ******* *       *       *    ** *  **** **      ***     *****                        **************************      **      ***     *****   *      **     ***   *****         */
00713 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, /*           *       ******  ******* ******* *       *       *    ** *  **** **      ***     *****                        **************************      **      ***     *****   *      **     ***   *****                           *   *           *   *             */
00714
00715 /* Character (0xcc): bbw=5, bbh=19, bbx=2, bby=0, width=9 */
00716 0x00, 0x00, 0x04, 0xfc, 0xfc, 0xfd, 0x05, 0x00, 0x00, /*                   *       ******  ******* ******* *                      */
00717 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /*                   *       ******  ******* ******* *                                            *************************       *                 */
00718 0x00, 0x00, 0x06, 0x0e, 0x0c, 0x08, 0x00, 0x00, 0x00, /*                   *       ******  ******* ******* *                                            *************************       *                         **  ***  **   *             */
00719
00720 /* Character (0xcd): bbw=6, bbh=19, bbx=2, bby=0, width=9 */
00721 0x00, 0x00, 0x04, 0xfd, 0xfd, 0xfc, 0x04, 0x00, 0x00, /*                   *     * ******* ******  ******  *                      */
00722 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /*                   *     * ******* ******  ******  *                                            *************************       *                 */
00723 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, /*                   *     * ******* ******  ******  *                                            *************************       *                                   *  ** *** **      */
00724
00725 /* Character (0xce): bbw=7, bbh=18, bbx=1, bby=0, width=9 */
00726 0x00, 0x01, 0x05, 0xfc, 0xfc, 0xfc, 0x05, 0x01, 0x00, /*         *       * *       ******  ******  ******* *     *                */
00727 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /*         *       * *       ******  ******  ******* *     *                                      *************************       *                 */
00728 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x0c, 0x08, 0x00, 0x00, /*         *       * *       ******  ******  ******* *     *                                      *************************       *                           *  **  **  **   *         */
00729
00730 /* Character (0xcf): bbw=6, bbh=17, bbx=2, bby=0, width=9 */
00731 0x00, 0x00, 0x05, 0xfd, 0xfc, 0xfc, 0x05, 0x01, 0x00, /*                 * *     * ******  ******  ******* *     *                */
00732 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /*                 * *     * ******  ******  ******* *     *                                      *************************       *                 */
00733 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x08, 0x08, 0x00, /*                 * *     * ******  ******  ******* *     *                                      *************************       *                           *   *           *   *     */
00734
00735 /* Character (0xd0): bbw=15, bbh=14, bbx=0, bby=0, width=16 */
00736 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x04, 0x04, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /*           *       ******  ******  ******  *       *       *       *       **      ***      ****    *****    ****      **         */
00737 0x01, 0x81, 0xff, 0xff, 0xff, 0x81, 0x81, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /*           *       ******  ******  ******  *       *       *       *       **      ***      ****    *****    ****      **        *       *      **************************      **      *       *       *      **     ***   **** ******* ******  ****             */
00738 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *       *       *       *       **      ***      ****    *****    ****      **        *       *      **************************      **      *       *       *      **     ***   **** ******* ******  ****                                                                             */
00739
00740 /* Character (0xd1): bbw=15, bbh=18, bbx=1, bby=0, width=16 */
00741 0x00, 0x04, 0x0c, 0xfc, 0x3c, 0x7d, 0xf8, 0xe0, 0xc0, 0x81, 0x01, 0x04, 0x0c, 0xfc, 0x0c, 0x04, /*           *       **      ******  ****  * *****    *****     ***      ***      **         *       **      ******  **      *      */
00742 0x00, 0x80, 0xc0, 0xff, 0xc0, 0x80, 0x00, 0x01, 0x07, 0x0f, 0x3e, 0x7c, 0xf0, 0xff, 0x00, 0x00, /*           *       **      ******  ****  * *****    *****     ***      ***      **         *       **      ******  **      *                    *      **********      **       *        *       ***     ****     *****    *****     ************                 */
00743 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x08, 0x08, 0x08, 0x04, 0x00, 0x00, 0x00, /*           *       **      ******  ****  * *****    *****     ***      ***      **         *       **      ******  **      *                    *      **********      **       *        *       ***     ****     *****    *****     ************                                           *  **  **   *   *   *  *              */
00744
00745 /* Character (0xd2): bbw=15, bbh=19, bbx=0, bby=0, width=16 */
00746 0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x05, 0x05, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /*       **    ****   *****   ****   ***     **      *     * *     * *       **      ***      ****    *****    ****      **         */
00747 0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /*       **    ****   *****   ****   ***     **      *     * *     * *       **      ***      ****    *****    ****      **        ****    ******  *******    ****      ***      **       *       *       *      **     ***   **** ******* ******  ****             */
00748 0x00, 0x00, 0x00, 0x00, 0x06, 0x0e, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*       **    ****   *****   ****   ***     **      *     * *     * *       **      ***      ****    *****    ****      **        ****    ******  *******    ****      ***      **       *       *       *      **     ***   **** ******* ******  ****                             **  ***  **   *                                 */
00749
00750 /* Character (0xd3): bbw=15, bbh=19, bbx=0, bby=0, width=16 */
00751 0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x05, 0x05, 0x04, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /*       **    ****   *****   ****   ***     **    * *     * *       *       **      ***      ****    *****    ****      **         */
00752 0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /*       **    ****   *****   ****   ***     **    * *     * *       *       **      ***      ****    *****    ****      **        ****    ******  *******    ****      ***      **       *       *       *      **     ***   **** ******* ******  ****             */
00753 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, /*       **    ****   *****   ****   ***     **    * *     * *       *       **      ***      ****    *****    ****      **        ****    ******  *******    ****      ***      **       *       *       *      **     ***   **** ******* ******  ****                                           *  ** *** **                      */
00754
00755 /* Character (0xd4): bbw=15, bbh=18, bbx=0, bby=0, width=16 */
00756 0xc0, 0xf0, 0xf8, 0x78, 0x1d, 0x0d, 0x04, 0x04, 0x04, 0x0d, 0x1d, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /*       **    ****   *****   **** * ***   * **      *       *       *     * **    * ***      ****    *****    ****      **         */
00757 0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /*       **    ****   *****   **** * ***   * **      *       *       *     * **    * ***      ****    *****    ****      **        ****    ******  *******    ****      ***      **       *       *       *      **     ***   **** ******* ******  ****             */
00758 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*       **    ****   *****   **** * ***   * **      *       *       *     * **    * ***      ****    *****    ****      **        ****    ******  *******    ****      ***      **       *       *       *      **     ***   **** ******* ******  ****                                   *  **  **  **   *                         */
00759
00760 /* Character (0xd5): bbw=15, bbh=18, bbx=0, bby=0, width=16 */
00761 0xc0, 0xf0, 0xf8, 0x78, 0x1d, 0x0c, 0x04, 0x04, 0x05, 0x0d, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /*       **    ****   *****   **** * ***     **      *       *     * *     * **      ***      ****    *****    ****      **         */
00762 0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /*       **    ****   *****   **** * ***     **      *       *     * *     * **      ***      ****    *****    ****      **        ****    ******  *******    ****      ***      **       *       *       *      **     ***   **** ******* ******  ****             */
00763 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x08, 0x08, 0x08, 0x04, 0x00, 0x00, 0x00, 0x00, /*       **    ****   *****   **** * ***     **      *       *     * *     * **      ***      ****    *****    ****      **        ****    ******  *******    ****      ***      **       *       *       *      **     ***   **** ******* ******  ****                                   *  **  **   *   *   *  *                  */
00764
00765 /* Character (0xd6): bbw=15, bbh=17, bbx=0, bby=0, width=16 */
00766 0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0d, 0x05, 0x04, 0x04, 0x0d, 0x1d, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /*       **    ****   *****   ****   ***   * **    * *       *       *     * **    * ***      ****    *****    ****      **         */
00767 0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /*       **    ****   *****   ****   ***   * **    * *       *       *     * **    * ***      ****    *****    ****      **        ****    ******  *******    ****      ***      **       *       *       *      **     ***   **** ******* ******  ****             */
00768 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, /*       **    ****   *****   ****   ***   * **    * *       *       *     * **    * ***      ****    *****    ****      **        ****    ******  *******    ****      ***      **       *       *       *      **     ***   **** ******* ******  ****                                   *   *           *   *                     */
00769
00770 /* Character (0xd7): bbw=10, bbh=10, bbx=0, bby=0, width=11 */
00771 0xc0, 0xc0, 0x80, 0x00, 0x00, 0x00, 0x00, 0x80, 0xc0, 0xc0, 0x00, /*       **      **       *                                       *      **      **         */
00772 0xc0, 0xe1, 0x73, 0x3f, 0x1e, 0x1e, 0x3f, 0x73, 0xe1, 0xc0, 0x00, /*       **      **       *                                       *      **      **              ***    *****  *** ******   ****    ****   ******  **  *** *    ***      **         */
00773 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*       **      **       *                                       *      **      **              ***    *****  *** ******   ****    ****   ******  **  *** *    ***      **                                                     */
00774
00775 /* Character (0xd8): bbw=14, bbh=14, bbx=1, bby=0, width=16 */
00776 0x00, 0xc0, 0xf0, 0xf8, 0x38, 0x0c, 0x04, 0x04, 0x84, 0x4c, 0x3c, 0x78, 0xf8, 0xf4, 0xc0, 0x00, /*               **    ****   *****   ***    **      *       *       *    *  **  *   ****     ****    *****  * ****      **         */
00777 0x00, 0x8f, 0x7f, 0x7f, 0x70, 0xc8, 0x84, 0x83, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /*               **    ****   *****   ***    **      *       *       *    *  **  *   ****     ****    *****  * ****      **                ****   ******** *******     ***    *  **  *    ***     *       *      **     ***   **** ******* ******  ****             */
00778 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*               **    ****   *****   ***    **      *       *       *    *  **  *   ****     ****    *****  * ****      **                ****   ******** *******     ***    *  **  *    ***     *       *      **     ***   **** ******* ******  ****                                                                             */
00779
00780 /* Character (0xd9): bbw=14, bbh=19, bbx=1, bby=0, width=16 */
00781 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, 0x00, 0x01, 0x01, 0x04, 0x0c, 0xfc, 0x0c, 0x04, 0x00, /*           *       ******  ******  ******  *                     *       *         *       **      ******  **      *              */
00782 0x00, 0x00, 0x3f, 0x7f, 0xff, 0xc0, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x3f, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *                     *       *         *       **      ******  **      *                             ******  ******* ********      **       *       *       *       *       *      * ******                           */
00783 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x0e, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *                     *       *         *       **      ******  **      *                             ******  ******* ********      **       *       *       *       *       *      * ******                                               **  ***  **   *                             */
00784
00785 /* Character (0xda): bbw=14, bbh=19, bbx=1, bby=0, width=16 */
00786 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x01, 0x01, 0x00, 0x00, 0x04, 0x0c, 0xfc, 0x0c, 0x04, 0x00, /*           *       ******  ******  ******  *     *       *                         *       **      ******  **      *              */
00787 0x00, 0x00, 0x3f, 0x7f, 0xff, 0xc0, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x3f, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *     *       *                         *       **      ******  **      *                             ******  ******* ********      **       *       *       *       *       *      * ******                           */
00788 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *     *       *                         *       **      ******  **      *                             ******  ******* ********      **       *       *       *       *       *      * ******                                                         *  ** *** **                      */
00789
00790 /* Character (0xdb): bbw=14, bbh=18, bbx=1, bby=0, width=16 */
00791 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x05, 0x01, 0x00, 0x00, 0x00, 0x05, 0x0d, 0xfc, 0x0c, 0x04, 0x00, /*           *       ******  ******  ******* *     *                               * *     * **      ******  **      *              */
00792 0x00, 0x00, 0x3f, 0x7f, 0xff, 0xc0, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x3f, 0x00, 0x00, 0x00, /*           *       ******  ******  ******* *     *                               * *     * **      ******  **      *                             ******  ******* ********      **       *       *       *       *       *      * ******                           */
00793 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******* *     *                               * *     * **      ******  **      *                             ******  ******* ********      **       *       *       *       *       *      * ******                                                     *  **  **  **   *                     */
00794
00795 /* Character (0xdc): bbw=14, bbh=17, bbx=1, bby=0, width=16 */
00796 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x05, 0x01, 0x00, 0x00, 0x01, 0x05, 0x0c, 0xfc, 0x0c, 0x04, 0x00, /*           *       ******  ******  ******* *     *                       *       * *       **      ******  **      *              */
00797 0x00, 0x00, 0x3f, 0x7f, 0xff, 0xc0, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x3f, 0x00, 0x00, 0x00, /*           *       ******  ******  ******* *     *                       *       * *       **      ******  **      *                             ******  ******* ********      **       *       *       *       *       *      * ******                           */
00798 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******* *     *                       *       * *       **      ******  **      *                             ******  ******* ********      **       *       *       *       *       *      * ******                                                 *   *           *   *                     */
00799
00800 /* Character (0xdd): bbw=13, bbh=19, bbx=1, bby=0, width=15 */
00801 0x00, 0x04, 0x1c, 0x7c, 0xfc, 0xf4, 0xc0, 0x01, 0x01, 0x80, 0xe4, 0x3c, 0x0c, 0x04, 0x00, /*           *       ***     *****   ******  * ****      ***       *              *  *  ***  ****    **      *              */
00802 0x00, 0x00, 0x00, 0x00, 0x01, 0x87, 0xff, 0xff, 0xff, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ***     *****   ******  * ****      ***       *              *  *  ***  ****    **      *                                             *       ***    ***************************     *                                         */
00803 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, 0x00, 0x00, /*           *       ***     *****   ******  * ****      ***       *              *  *  ***  ****    **      *                                             *       ***    ***************************     *                                                                           *  ** *** **              */
00804
00805 /* Character (0xde): bbw=12, bbh=14, bbx=1, bby=0, width=14 */
00806 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x24, 0x20, 0x20, 0x20, 0x60, 0xe0, 0xc0, 0xc0, 0x00, /*           *       ******  ******  ******  *  *       *       *       *       **      ***      **      **         */
00807 0x00, 0x80, 0xff, 0xff, 0xff, 0x90, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x0f, 0x07, 0x00, /*           *       ******  ******  ******  *  *       *       *       *       **      ***      **      **                       *************************    *  *    *       *       *      **   ****    ****    ***              */
00808 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *       ******  ******  ******  *  *       *       *       *       **      ***      **      **                       *************************    *  *    *       *       *      **   ****    ****    ***                                                                      */
00809
00810 /* Character (0xdf): bbw=11, bbh=14, bbx=0, bby=0, width=12 */
00811 0x00, 0xf0, 0xf8, 0xfc, 0x04, 0x04, 0x0c, 0xf8, 0xf8, 0x70, 0x00, 0x00, /*             ****   *****  ******  *       *       **       *****   *****    ***                  */
00812 0x80, 0xff, 0xff, 0xff, 0x00, 0x81, 0x81, 0xc3, 0x7e, 0x7e, 0x3c, 0x00, /*             ****   *****  ******  *       *       **       *****   *****    ***                        *************************        *      **      ***    ** ******  ******   ****           */
00813 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*             ****   *****  ******  *       *       **       *****   *****    ***                        *************************        *      **      ***    ** ******  ******   ****                                                           */
00814
00815 /* Character (0xe0): bbw=10, bbh=14, bbx=0, bby=0, width=11 */
00816 0x00, 0x80, 0x8c, 0x9c, 0x98, 0xb0, 0xa0, 0x80, 0x00, 0x00, 0x00, /*                *  **   *  ***  *   **  *    ** *     * *       *                         */
00817 0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /*                *  **   *  ***  *   **  *    ** *     * *       *                        **  *** **  *****  *****   *   *   *   *  *   * ************************       *         */
00818 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                *  **   *  ***  *   **  *    ** *     * *       *                        **  *** **  *****  *****   *   *   *   *  *   * ************************       *                                                     */
00819
00820 /* Character (0xe1): bbw=10, bbh=14, bbx=0, bby=0, width=11 */
00821 0x00, 0x80, 0xa0, 0xb0, 0x98, 0x9c, 0x8c, 0x80, 0x00, 0x00, 0x00, /*                *     * *    ** *   **  *  ***  *  **   *       *                         */
00822 0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /*                *     * *    ** *   **  *  ***  *  **   *       *                        **  *** **  *****  *****   *   *   *   *  *   * ************************       *         */
00823 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                *     * *    ** *   **  *  ***  *  **   *       *                        **  *** **  *****  *****   *   *   *   *  *   * ************************       *                                                     */
00824
00825 /* Character (0xe2): bbw=10, bbh=13, bbx=0, bby=0, width=11 */
00826 0x00, 0xa0, 0xb0, 0x98, 0x98, 0x98, 0xb0, 0xa0, 0x00, 0x00, 0x00, /*              * *    ** *   **  *   **  *   **  *    ** *     * *                         */
00827 0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /*              * *    ** *   **  *   **  *   **  *    ** *     * *                        **  *** **  *****  *****   *   *   *   *  *   * ************************       *         */
00828 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*              * *    ** *   **  *   **  *   **  *    ** *     * *                        **  *** **  *****  *****   *   *   *   *  *   * ************************       *                                                     */
00829
00830 /* Character (0xe3): bbw=10, bbh=13, bbx=0, bby=0, width=11 */
00831 0x00, 0xa0, 0x90, 0x98, 0x98, 0xb0, 0xb0, 0x90, 0x08, 0x00, 0x00, /*              * *    *  *   **  *   **  *    ** *    ** *    *  *   *                     */
00832 0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /*              * *    *  *   **  *   **  *    ** *    ** *    *  *   *                    **  *** **  *****  *****   *   *   *   *  *   * ************************       *         */
00833 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*              * *    *  *   **  *   **  *    ** *    ** *    *  *   *                    **  *** **  *****  *****   *   *   *   *  *   * ************************       *                                                     */
00834
00835 /* Character (0xe4): bbw=10, bbh=12, bbx=0, bby=0, width=11 */
00836 0x00, 0x80, 0xb0, 0xb0, 0x80, 0x80, 0xb0, 0xb0, 0x00, 0x00, 0x00, /*                *    ** *    ** *       *       *    ** *    ** *                         */
00837 0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /*                *    ** *    ** *       *       *    ** *    ** *                        **  *** **  *****  *****   *   *   *   *  *   * ************************       *         */
00838 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                *    ** *    ** *       *       *    ** *    ** *                        **  *** **  *****  *****   *   *   *   *  *   * ************************       *                                                     */
00839
00840 /* Character (0xe5): bbw=10, bbh=14, bbx=0, bby=0, width=11 */
00841 0x00, 0x80, 0x80, 0x98, 0xa4, 0xa4, 0x98, 0x80, 0x00, 0x00, 0x00, /*                *       *   **  *  *  * *  *  * *   **  *       *                         */
00842 0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /*                *       *   **  *  *  * *  *  * *   **  *       *                        **  *** **  *****  *****   *   *   *   *  *   * ************************       *         */
00843 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                *       *   **  *  *  * *  *  * *   **  *       *                        **  *** **  *****  *****   *   *   *   *  *   * ************************       *                                                     */
00844
00845 /* Character (0xe6): bbw=16, bbh=9, bbx=0, bby=0, width=17 */
00846 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /*                        *       *       *       *       *       *               *       *       *       *                                 */
00847 0x72, 0xf3, 0xfb, 0x88, 0x88, 0x44, 0x7f, 0x7f, 0xff, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /*                        *       *       *       *       *       *               *       *       *       *                                 *  *** **  ****** *****   *   *   *   *  *   * ******* ******* *********  *  **   *   *   *   **  *   *****   *****  *  *** **          */
00848 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                        *       *       *       *       *       *               *       *       *       *                                 *  *** **  ****** *****   *   *   *   *  *   * ******* ******* *********  *  **   *   *   *   **  *   *****   *****  *  *** **                                                                              */
00849
00850 /* Character (0xe7): bbw=9, bbh=13, bbx=0, bby=-4, width=10 */
00851 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /*                                *       *       *       *       *                 */
00852 0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x81, 0x43, 0x63, 0x00, /*                                *       *       *       *       *                 *****  ******* ******* *     **       *       **      ***    * **   **          */
00853 0x00, 0x00, 0x08, 0x0b, 0x0e, 0x06, 0x00, 0x00, 0x00, 0x00, /*                                *       *       *       *       *                 *****  ******* ******* *     **       *       **      ***    * **   **                    *** * *** **                  */
00854
00855 /* Character (0xe8): bbw=10, bbh=14, bbx=0, bby=0, width=11 */
00856 0x00, 0x00, 0x0c, 0x9c, 0x98, 0xb0, 0xa0, 0x00, 0x00, 0x00, 0x00, /*                   **      ***  *   **  *    ** *     * *                                 */
00857 0x3e, 0x7f, 0x7f, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /*                   **      ***  *   **  *    ** *     * *                                 *****  ******* ******* *  *  **   *   *   *   **  *   *****   *****  *  *** **          */
00858 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                   **      ***  *   **  *    ** *     * *                                 *****  ******* ******* *  *  **   *   *   *   **  *   *****   *****  *  *** **                                                      */
00859
00860 /* Character (0xe9): bbw=10, bbh=14, bbx=0, bby=0, width=11 */
00861 0x00, 0x00, 0x20, 0xb0, 0x98, 0x9c, 0x8c, 0x00, 0x00, 0x00, 0x00, /*                      *      ** *   **  *  ***  *  **   *                                 */
00862 0x3e, 0x7f, 0x7f, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /*                      *      ** *   **  *  ***  *  **   *                                 *****  ******* ******* *  *  **   *   *   *   **  *   *****   *****  *  *** **          */
00863 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                      *      ** *   **  *  ***  *  **   *                                 *****  ******* ******* *  *  **   *   *   *   **  *   *****   *****  *  *** **                                                      */
00864
00865 /* Character (0xea): bbw=10, bbh=13, bbx=0, bby=0, width=11 */
00866 0x00, 0x00, 0x20, 0xb0, 0x98, 0x98, 0x98, 0x30, 0x20, 0x00, 0x00, /*                      *      ** *   **  *   **  *   **  *    **       *                   */
00867 0x3e, 0x7f, 0x7f, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /*                      *      ** *   **  *   **  *   **  *    **       *                   *****  ******* ******* *  *  **   *   *   *   **  *   *****   *****  *  *** **          */
00868 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                      *      ** *   **  *   **  *   **  *    **       *                   *****  ******* ******* *  *  **   *   *   *   **  *   *****   *****  *  *** **                                                      */
00869
00870 /* Character (0xeb): bbw=10, bbh=12, bbx=0, bby=0, width=11 */
00871 0x00, 0x00, 0x30, 0xb0, 0x80, 0x80, 0xb0, 0x30, 0x00, 0x00, 0x00, /*                     **      ** *       *       *    ** *    **                           */
00872 0x3e, 0x7f, 0x7f, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /*                     **      ** *       *       *    ** *    **                           *****  ******* ******* *  *  **   *   *   *   **  *   *****   *****  *  *** **          */
00873 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                     **      ** *       *       *    ** *    **                           *****  ******* ******* *  *  **   *   *   *   **  *   *****   *****  *  *** **                                                      */
00874
00875 /* Character (0xec): bbw=5, bbh=14, bbx=0, bby=0, width=6 */
00876 0x8c, 0x9c, 0x98, 0xb0, 0x20, 0x00, /*   **   *  ***  *   **  *    ** *     *           */
00877 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /*   **   *  ***  *   **  *    ** *     *                 *************************       *         */
00878 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*   **   *  ***  *   **  *    ** *     *                 *************************       *                                 */
00879
00880 /* Character (0xed): bbw=5, bbh=14, bbx=0, bby=0, width=6 */
00881 0xa0, 0xb0, 0x98, 0x9c, 0x0c, 0x00, /*      * *    ** *   **  *  ***  *  **             */
00882 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /*      * *    ** *   **  *  ***  *  **                   *************************       *         */
00883 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*      * *    ** *   **  *  ***  *  **                   *************************       *                                 */
00884
00885 /* Character (0xee): bbw=7, bbh=13, bbx=0, bby=0, width=7 */
00886 0x20, 0xb0, 0x98, 0x98, 0x98, 0x30, 0x20, /*      *      ** *   **  *   **  *   **  *    **       *   */
00887 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /*      *      ** *   **  *   **  *   **  *    **       *                 *************************       *         */
00888 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*      *      ** *   **  *   **  *   **  *    **       *                 *************************       *                                     */
00889
00890 /* Character (0xef): bbw=6, bbh=12, bbx=0, bby=0, width=6 */
00891 0xb0, 0xb0, 0x80, 0x80, 0x30, 0x30, /*     ** *    ** *       *       *    **      **   */
00892 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /*     ** *    ** *       *       *    **      **         *************************       *         */
00893 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*     ** *    ** *       *       *    **      **         *************************       *                                 */
00894
00895 /* Character (0xf0): bbw=11, bbh=14, bbx=0, bby=0, width=12 */
00896 0x00, 0x24, 0x24, 0x98, 0x98, 0xb0, 0xe8, 0xc8, 0x80, 0x00, 0x00, 0x00, /*           *  *    *  *     **  *   **  *    ** *   * ***   *  **       *                         */
00897 0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /*           *  *    *  *     **  *   **  *    ** *   * ***   *  **       *                         *****  ******* ******* *     **       *       *       **     ********* *******  *****           */
00898 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*           *  *    *  *     **  *   **  *    ** *   * ***   *  **       *                         *****  ******* ******* *     **       *       *       **     ********* *******  *****                                                           */
00899
00900 /* Character (0xf1): bbw=12, bbh=13, bbx=0, bby=0, width=13 */
00901 0x80, 0x80, 0xa0, 0x90, 0x18, 0x98, 0xb0, 0xb0, 0x90, 0x88, 0x00, 0x00, 0x00, /*        *       *     * *    *  *   **      **  *    ** *    ** *    *  *   *   *                         */
00902 0x80, 0xff, 0xff, 0xff, 0x81, 0x00, 0x00, 0x81, 0xff, 0xff, 0xff, 0x80, 0x00, /*        *       *     * *    *  *   **      **  *    ** *    ** *    *  *   *   *                               **************************      *                *      *************************       *         */
00903 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *     * *    *  *   **      **  *    ** *    ** *    *  *   *   *                               **************************      *                *      *************************       *                                                             */
00904
00905 /* Character (0xf2): bbw=11, bbh=14, bbx=0, bby=0, width=12 */
00906 0x00, 0x00, 0x00, 0x8c, 0x9c, 0x98, 0xb0, 0xa0, 0x00, 0x00, 0x00, 0x00, /*                           **   *  ***  *   **  *    ** *     * *                                 */
00907 0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /*                           **   *  ***  *   **  *    ** *     * *                                 *****  ******* ******* *     **       *       *       **     ********* *******  *****           */
00908 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                           **   *  ***  *   **  *    ** *     * *                                 *****  ******* ******* *     **       *       *       **     ********* *******  *****                                                           */
00909
00910 /* Character (0xf3): bbw=11, bbh=14, bbx=0, bby=0, width=12 */
00911 0x00, 0x00, 0x00, 0xa0, 0xb0, 0x98, 0x9c, 0x8c, 0x00, 0x00, 0x00, 0x00, /*                              * *    ** *   **  *  ***  *  **   *                                 */
00912 0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /*                              * *    ** *   **  *  ***  *  **   *                                 *****  ******* ******* *     **       *       *       **     ********* *******  *****           */
00913 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                              * *    ** *   **  *  ***  *  **   *                                 *****  ******* ******* *     **       *       *       **     ********* *******  *****                                                           */
00914
00915 /* Character (0xf4): bbw=11, bbh=13, bbx=0, bby=0, width=12 */
00916 0x00, 0x00, 0x20, 0xb0, 0x98, 0x98, 0x98, 0xb0, 0x20, 0x00, 0x00, 0x00, /*                      *      ** *   **  *   **  *   **  *    ** *     *                           */
00917 0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /*                      *      ** *   **  *   **  *   **  *    ** *     *                           *****  ******* ******* *     **       *       *       **     ********* *******  *****           */
00918 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                      *      ** *   **  *   **  *   **  *    ** *     *                           *****  ******* ******* *     **       *       *       **     ********* *******  *****                                                           */
00919
00920 /* Character (0xf5): bbw=11, bbh=13, bbx=0, bby=0, width=12 */
00921 0x00, 0x20, 0x10, 0x98, 0x98, 0xb0, 0xb0, 0x90, 0x08, 0x00, 0x00, 0x00, /*              *      *      **  *   **  *    ** *    ** *    *  *   *                             */
00922 0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /*              *      *      **  *   **  *    ** *    ** *    *  *   *                             *****  ******* ******* *     **       *       *       **     ********* *******  *****           */
00923 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*              *      *      **  *   **  *    ** *    ** *    *  *   *                             *****  ******* ******* *     **       *       *       **     ********* *******  *****                                                           */
00924
00925 /* Character (0xf6): bbw=11, bbh=12, bbx=0, bby=0, width=12 */
00926 0x00, 0x00, 0x00, 0xb0, 0xb0, 0x80, 0x80, 0xb0, 0x30, 0x00, 0x00, 0x00, /*                             ** *    ** *       *       *    ** *    **                           */
00927 0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /*                             ** *    ** *       *       *    ** *    **                           *****  ******* ******* *     **       *       *       **     ********* *******  *****           */
00928 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                             ** *    ** *       *       *    ** *    **                           *****  ******* ******* *     **       *       *       **     ********* *******  *****                                                           */
00929
00930 /* Character (0xf7): bbw=10, bbh=10, bbx=0, bby=0, width=11 */
00931 0x00, 0x00, 0x00, 0x00, 0xc0, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                       **      **                                         */
00932 0x0c, 0x0c, 0x0c, 0x0c, 0xcc, 0xcc, 0x0c, 0x0c, 0x0c, 0x0c, 0x00, /*                                       **      **                                          **      **      **      **      **  **  **  **  **      **      **      **             */
00933 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                       **      **                                          **      **      **      **      **  **  **  **  **      **      **      **                                                         */
00934
00935 /* Character (0xf8): bbw=10, bbh=11, bbx=0, bby=-1, width=11 */
00936 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0xc0, 0x00, 0x00, 0x00, /*                                *       *       *       *      **                         */
00937 0x3e, 0x7f, 0xff, 0xc1, 0xb0, 0x8c, 0xc3, 0x7f, 0x7f, 0x3e, 0x00, /*                                *       *       *       *      **                         *****  ******* *********     **    ** *  **   ***    ********* *******  *****           */
00938 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*                                *       *       *       *      **                         *****  ******* *********     **    ** *  **   ***    ********* *******  *****                  *                                    */
00939
00940 /* Character (0xf9): bbw=12, bbh=14, bbx=0, bby=0, width=13 */
00941 0x80, 0x80, 0x80, 0x8c, 0x1c, 0x18, 0x30, 0xa0, 0x80, 0x80, 0x80, 0x00, 0x00, /*        *       *       *  **   *  ***      **       **       * *       *       *       *                 */
00942 0x00, 0x7f, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /*        *       *       *  **   *  ***      **       **       * *       *       *       *                        ******* ****************      **       *       *      * ************************       *         */
00943 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *       *  **   *  ***      **       **       * *       *       *       *                        ******* ****************      **       *       *      * ************************       *                                                             */
00944
00945 /* Character (0xfa): bbw=12, bbh=14, bbx=0, bby=0, width=13 */
00946 0x80, 0x80, 0x80, 0x80, 0x20, 0x30, 0x18, 0x9c, 0x8c, 0x80, 0x80, 0x00, 0x00, /*        *       *       *       *     *      **     **     ***  *  **   *       *       *                 */
00947 0x00, 0x7f, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /*        *       *       *       *     *      **     **     ***  *  **   *       *       *                        ******* ****************      **       *       *      * ************************       *         */
00948 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *       *       *     *      **     **     ***  *  **   *       *       *                        ******* ****************      **       *       *      * ************************       *                                                             */
00949
00950 /* Character (0xfb): bbw=12, bbh=13, bbx=0, bby=0, width=13 */
00951 0x80, 0x80, 0x80, 0xa0, 0x30, 0x18, 0x18, 0x98, 0xb0, 0xa0, 0x80, 0x00, 0x00, /*        *       *       *     * *    **     **      **      **  *    ** *     * *       *                 */
00952 0x00, 0x7f, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /*        *       *       *     * *    **     **      **      **  *    ** *     * *       *                        ******* ****************      **       *       *      * ************************       *         */
00953 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *       *     * *    **     **      **      **  *    ** *     * *       *                        ******* ****************      **       *       *      * ************************       *                                                             */
00954
00955 /* Character (0xfc): bbw=12, bbh=12, bbx=0, bby=0, width=13 */
00956 0x80, 0x80, 0x80, 0xb0, 0x30, 0x00, 0x00, 0xb0, 0xb0, 0x80, 0x80, 0x00, 0x00, /*        *       *       *    ** *    **                      ** *    ** *       *       *                 */
00957 0x00, 0x7f, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /*        *       *       *    ** *    **                      ** *    ** *       *       *                        ******* ****************      **       *       *      * ************************       *         */
00958 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *       *    ** *    **                      ** *    ** *       *       *                        ******* ****************      **       *       *      * ************************       *                                                             */
00959
00960 /* Character (0xfd): bbw=11, bbh=18, bbx=0, bby=-4, width=12 */
00961 0x80, 0x80, 0x80, 0x80, 0xa0, 0x30, 0x18, 0x1c, 0x8c, 0x80, 0x80, 0x00, /*        *       *       *       *     * *    **     **     ***     **   *       *       *         */
00962 0x00, 0x03, 0x0f, 0x3f, 0xfc, 0xf0, 0xc0, 0x30, 0x0c, 0x03, 0x00, 0x00, /*        *       *       *       *     * *    **     **     ***     **   *       *       *                **      ****    ******    ******    ****      **    **    **    **                       */
00963 0x06, 0x0e, 0x0c, 0x08, 0x04, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *       *       *     * *    **     **     ***     **   *       *       *                **      ****    ******    ******    ****      **    **    **    **                       **  ***  **   *  * **                           */
00964
00965 /* Character (0xfe): bbw=12, bbh=18, bbx=0, bby=-4, width=13 */
00966 0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /*   *       ******  ******  ******               *       *       *       *                                 */
00967 0x00, 0xff, 0xff, 0xff, 0x41, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /*   *       ******  ******  ******               *       *       *       *                                        *************************     *        *       *       **     ********* *******  *****           */
00968 0x08, 0x0f, 0x0f, 0x0f, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*   *       ******  ******  ******               *       *       *       *                                        *************************     *        *       *       **     ********* *******  *****             *************   *                                 */
00969
00970 /* Character (0xff): bbw=11, bbh=16, bbx=0, bby=-4, width=12 */
00971 0x80, 0x80, 0x80, 0xb0, 0xb0, 0x00, 0x00, 0x30, 0xb0, 0x80, 0x80, 0x00, /*        *       *       *    ** *    ** *                    **      ** *       *       *         */
00972 0x00, 0x03, 0x0f, 0x3f, 0xfc, 0xf0, 0xc0, 0x30, 0x0c, 0x03, 0x00, 0x00, /*        *       *       *    ** *    ** *                    **      ** *       *       *                **      ****    ******    ******    ****      **    **    **    **                       */
00973 0x06, 0x0e, 0x0c, 0x08, 0x04, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*        *       *       *    ** *    ** *                    **      ** *       *       *                **      ****    ******    ******    ****      **    **    **    **                       **  ***  **   *  * **                           */
00974 };
00975
00976 /* Character->glyph data. */
00977 static const PROGMEM uint16_t ncenB18_offset[] = {
00978   0,    /* (0x00) */
00979   0,    /* (0x01) */
00980   0,    /* (0x02) */
00981   0,    /* (0x03) */
00982   0,    /* (0x04) */
00983   0,    /* (0x05) */
00984   0,    /* (0x06) */
00985   0,    /* (0x07) */
00986   0,    /* (0x08) */
00987   0,    /* (0x09) */
00988   0,    /* (0x0a) */
00989   0,    /* (0x0b) */
00990   0,    /* (0x0c) */
00991   0,    /* (0x0d) */
00992   0,    /* (0x0e) */
00993   0,    /* (0x0f) */
00994   0,    /* (0x10) */
00995   0,    /* (0x11) */
00996   0,    /* (0x12) */
00997   0,    /* (0x13) */
00998   0,    /* (0x14) */
00999   0,    /* (0x15) */
01000   0,    /* (0x16) */
01001   0,    /* (0x17) */
01002   0,    /* (0x18) */
01003   0,    /* (0x19) */
01004   0,    /* (0x1a) */
01005   0,    /* (0x1b) */
01006   0,    /* (0x1c) */
01007   0,    /* (0x1d) */
01008   0,    /* (0x1e) */
01009   0,    /* (0x1f) */
01010   48,   /* (0x20) */
01011   63,   /* (0x21) */
01012   81,   /* (0x22) */
01013   105,  /* (0x23) */
01014   141,  /* (0x24) */
01015   174,  /* (0x25) */
01016   219,  /* (0x26) */
01017   270,  /* (0x27) */
01018   285,  /* (0x28) */
01019   303,  /* (0x29) */
01020   321,  /* (0x2a) */
01021   345,  /* (0x2b) */
01022   378,  /* (0x2c) */
01023   393,  /* (0x2d) */
01024   411,  /* (0x2e) */
01025   426,  /* (0x2f) */
01026   447,  /* (0x30) */
01027   480,  /* (0x31) */
01028   513,  /* (0x32) */
01029   546,  /* (0x33) */
01030   579,  /* (0x34) */
01031   612,  /* (0x35) */
01032   645,  /* (0x36) */
01033   678,  /* (0x37) */
01034   711,  /* (0x38) */
01035   744,  /* (0x39) */
01036   777,  /* (0x3a) */
01037   795,  /* (0x3b) */
01038   813,  /* (0x3c) */
01039   846,  /* (0x3d) */
01040   879,  /* (0x3e) */
01041   912,  /* (0x3f) */
01042   942,  /* (0x40) */
01043   990,  /* (0x41) */
01044   1032, /* (0x42) */
01045   1074, /* (0x43) */
01046   1116, /* (0x44) */
01047   1164, /* (0x45) */
01048   1203, /* (0x46) */
01049   1242, /* (0x47) */
01050   1287, /* (0x48) */
01051   1335, /* (0x49) */
01052   1362, /* (0x4a) */
01053   1398, /* (0x4b) */
01054   1446, /* (0x4c) */
01055   1482, /* (0x4d) */
01056   1539, /* (0x4e) */
01057   1587, /* (0x4f) */
01058   1635, /* (0x50) */
01059   1677, /* (0x51) */
01060   1725, /* (0x52) */
01061   1773, /* (0x53) */
01062   1809, /* (0x54) */
01063   1848, /* (0x55) */
01064   1896, /* (0x56) */
01065   1938, /* (0x57) */
01066   1995, /* (0x58) */
01067   2046, /* (0x59) */
01068   2091, /* (0x5a) */
01069   2130, /* (0x5b) */
01070   2145, /* (0x5c) */
01071   2172, /* (0x5d) */
01072   2187, /* (0x5e) */
01073   2214, /* (0x5f) */
01074   2244, /* (0x60) */
01075   2265, /* (0x61) */
01076   2298, /* (0x62) */
01077   2337, /* (0x63) */
01078   2367, /* (0x64) */
01079   2406, /* (0x65) */
01080   2439, /* (0x66) */
01081   2460, /* (0x67) */
01082   2493, /* (0x68) */
01083   2532, /* (0x69) */
01084   2550, /* (0x6a) */
01085   2577, /* (0x6b) */
01086   2616, /* (0x6c) */
01087   2634, /* (0x6d) */
01088   2694, /* (0x6e) */
01089   2733, /* (0x6f) */
01090   2769, /* (0x70) */
01091   2808, /* (0x71) */
01092   2844, /* (0x72) */
01093   2871, /* (0x73) */
01094   2901, /* (0x74) */
01095   2925, /* (0x75) */
01096   2964, /* (0x76) */
01097   2994, /* (0x77) */
01098   3042, /* (0x78) */
01099   3078, /* (0x79) */
01100   3114, /* (0x7a) */
01101   3144, /* (0x7b) */
01102   3162, /* (0x7c) */
01103   3195, /* (0x7d) */
01104   3213, /* (0x7e) */
01105   0,    /* (0x7f) */
01106   0,    /* (0x80) */
01107   0,    /* (0x81) */
01108   0,    /* (0x82) */
01109   0,    /* (0x83) */
01110   0,    /* (0x84) */
01111   0,    /* (0x85) */
01112   0,    /* (0x86) */
01113   0,    /* (0x87) */
01114   0,    /* (0x88) */
01115   0,    /* (0x89) */
01116   0,    /* (0x8a) */
01117   0,    /* (0x8b) */
01118   0,    /* (0x8c) */
01119   0,    /* (0x8d) */
01120   0,    /* (0x8e) */
01121   0,    /* (0x8f) */
01122   0,    /* (0x90) */
01123   0,    /* (0x91) */
01124   0,    /* (0x92) */
01125   0,    /* (0x93) */
01126   0,    /* (0x94) */
01127   0,    /* (0x95) */
01128   0,    /* (0x96) */
01129   0,    /* (0x97) */
01130   0,    /* (0x98) */
01131   0,    /* (0x99) */
01132   0,    /* (0x9a) */
01133   0,    /* (0x9b) */
01134   0,    /* (0x9c) */
01135   0,    /* (0x9d) */
01136   0,    /* (0x9e) */
01137   0,    /* (0x9f) */
01138   3249, /* (0xa0) */
01139   3264, /* (0xa1) */
01140   3285, /* (0xa2) */
01141   3318, /* (0xa3) */
01142   3351, /* (0xa4) */
01143   3381, /* (0xa5) */
01144   3426, /* (0xa6) */
01145   3459, /* (0xa7) */
01146   3483, /* (0xa8) */
01147   3513, /* (0xa9) */
01148   3558, /* (0xaa) */
01149   3582, /* (0xab) */
01150   3609, /* (0xac) */
01151   3639, /* (0xad) */
01152   3657, /* (0xae) */
01153   3702, /* (0xaf) */
01154   3726, /* (0xb0) */
01155   3747, /* (0xb1) */
01156   3780, /* (0xb2) */
01157   3798, /* (0xb3) */
01158   3816, /* (0xb4) */
01159   3837, /* (0xb5) */
01160   3876, /* (0xb6) */
01161   3918, /* (0xb7) */
01162   3933, /* (0xb8) */
01163   3951, /* (0xb9) */
01164   3969, /* (0xba) */
01165   3990, /* (0xbb) */
01166   4017, /* (0xbc) */
01167   4062, /* (0xbd) */
01168   4107, /* (0xbe) */
01169   4152, /* (0xbf) */
01170   4182, /* (0xc0) */
01171   4224, /* (0xc1) */
01172   4266, /* (0xc2) */
01173   4308, /* (0xc3) */
01174   4350, /* (0xc4) */
01175   4392, /* (0xc5) */
01176   4434, /* (0xc6) */
01177   4497, /* (0xc7) */
01178   4539, /* (0xc8) */
01179   4578, /* (0xc9) */
01180   4617, /* (0xca) */
01181   4656, /* (0xcb) */
01182   4695, /* (0xcc) */
01183   4722, /* (0xcd) */
01184   4749, /* (0xce) */
01185   4776, /* (0xcf) */
01186   4803, /* (0xd0) */
01187   4851, /* (0xd1) */
01188   4899, /* (0xd2) */
01189   4947, /* (0xd3) */
01190   4995, /* (0xd4) */
01191   5043, /* (0xd5) */
01192   5091, /* (0xd6) */
01193   5139, /* (0xd7) */
01194   5172, /* (0xd8) */
01195   5220, /* (0xd9) */
01196   5268, /* (0xda) */
01197   5316, /* (0xdb) */
01198   5364, /* (0xdc) */
01199   5412, /* (0xdd) */
01200   5457, /* (0xde) */
01201   5499, /* (0xdf) */
01202   5535, /* (0xe0) */
01203   5568, /* (0xe1) */
01204   5601, /* (0xe2) */
01205   5634, /* (0xe3) */
01206   5667, /* (0xe4) */
01207   5700, /* (0xe5) */
01208   5733, /* (0xe6) */
01209   5784, /* (0xe7) */
01210   5814, /* (0xe8) */
01211   5847, /* (0xe9) */
01212   5880, /* (0xea) */
01213   5913, /* (0xeb) */
01214   5946, /* (0xec) */
01215   5964, /* (0xed) */
01216   5982, /* (0xee) */
01217   6003, /* (0xef) */
01218   6021, /* (0xf0) */
01219   6057, /* (0xf1) */
01220   6096, /* (0xf2) */
01221   6132, /* (0xf3) */
01222   6168, /* (0xf4) */
01223   6204, /* (0xf5) */
01224   6240, /* (0xf6) */
01225   6276, /* (0xf7) */
01226   6309, /* (0xf8) */
01227   6342, /* (0xf9) */
01228   6381, /* (0xfa) */
01229   6420, /* (0xfb) */
01230   6459, /* (0xfc) */
01231   6498, /* (0xfd) */
01232   6534, /* (0xfe) */
01233   6573, /* (0xff) */
01234 };
01235
01236 /* Character width data. */
01237 static const PROGMEM uint8_t ncenB18_width[] = {
01238   16,   /* (0x00) */
01239   16,   /* (0x01) */
01240   16,   /* (0x02) */
01241   16,   /* (0x03) */
01242   16,   /* (0x04) */
01243   16,   /* (0x05) */
01244   16,   /* (0x06) */
01245   16,   /* (0x07) */
01246   16,   /* (0x08) */
01247   16,   /* (0x09) */
01248   16,   /* (0x0a) */
01249   16,   /* (0x0b) */
01250   16,   /* (0x0c) */
01251   16,   /* (0x0d) */
01252   16,   /* (0x0e) */
01253   16,   /* (0x0f) */
01254   16,   /* (0x10) */
01255   16,   /* (0x11) */
01256   16,   /* (0x12) */
01257   16,   /* (0x13) */
01258   16,   /* (0x14) */
01259   16,   /* (0x15) */
01260   16,   /* (0x16) */
01261   16,   /* (0x17) */
01262   16,   /* (0x18) */
01263   16,   /* (0x19) */
01264   16,   /* (0x1a) */
01265   16,   /* (0x1b) */
01266   16,   /* (0x1c) */
01267   16,   /* (0x1d) */
01268   16,   /* (0x1e) */
01269   16,   /* (0x1f) */
01270   5,    /* (0x20) */
01271   6,    /* (0x21) */
01272   8,    /* (0x22) */
01273   12,   /* (0x23) */
01274   11,   /* (0x24) */
01275   15,   /* (0x25) */
01276   17,   /* (0x26) */
01277   5,    /* (0x27) */
01278   6,    /* (0x28) */
01279   6,    /* (0x29) */
01280   8,    /* (0x2a) */
01281   11,   /* (0x2b) */
01282   5,    /* (0x2c) */
01283   6,    /* (0x2d) */
01284   5,    /* (0x2e) */
01285   7,    /* (0x2f) */
01286   11,   /* (0x30) */
01287   11,   /* (0x31) */
01288   11,   /* (0x32) */
01289   11,   /* (0x33) */
01290   11,   /* (0x34) */
01291   11,   /* (0x35) */
01292   11,   /* (0x36) */
01293   11,   /* (0x37) */
01294   11,   /* (0x38) */
01295   11,   /* (0x39) */
01296   6,    /* (0x3a) */
01297   6,    /* (0x3b) */
01298   11,   /* (0x3c) */
01299   11,   /* (0x3d) */
01300   11,   /* (0x3e) */
01301   10,   /* (0x3f) */
01302   16,   /* (0x40) */
01303   14,   /* (0x41) */
01304   14,   /* (0x42) */
01305   14,   /* (0x43) */
01306   16,   /* (0x44) */
01307   13,   /* (0x45) */
01308   13,   /* (0x46) */
01309   15,   /* (0x47) */
01310   16,   /* (0x48) */
01311   9,    /* (0x49) */
01312   12,   /* (0x4a) */
01313   16,   /* (0x4b) */
01314   12,   /* (0x4c) */
01315   19,   /* (0x4d) */
01316   16,   /* (0x4e) */
01317   16,   /* (0x4f) */
01318   14,   /* (0x50) */
01319   16,   /* (0x51) */
01320   16,   /* (0x52) */
01321   12,   /* (0x53) */
01322   13,   /* (0x54) */
01323   16,   /* (0x55) */
01324   14,   /* (0x56) */
01325   19,   /* (0x57) */
01326   17,   /* (0x58) */
01327   15,   /* (0x59) */
01328   13,   /* (0x5a) */
01329   5,    /* (0x5b) */
01330   9,    /* (0x5c) */
01331   5,    /* (0x5d) */
01332   9,    /* (0x5e) */
01333   10,   /* (0x5f) */
01334   7,    /* (0x60) */
01335   11,   /* (0x61) */
01336   13,   /* (0x62) */
01337   10,   /* (0x63) */
01338   13,   /* (0x64) */
01339   11,   /* (0x65) */
01340   7,    /* (0x66) */
01341   11,   /* (0x67) */
01342   13,   /* (0x68) */
01343   6,    /* (0x69) */
01344   9,    /* (0x6a) */
01345   13,   /* (0x6b) */
01346   6,    /* (0x6c) */
01347   20,   /* (0x6d) */
01348   13,   /* (0x6e) */
01349   12,   /* (0x6f) */
01350   13,   /* (0x70) */
01351   12,   /* (0x71) */
01352   9,    /* (0x72) */
01353   10,   /* (0x73) */
01354   8,    /* (0x74) */
01355   13,   /* (0x75) */
01356   10,   /* (0x76) */
01357   16,   /* (0x77) */
01358   12,   /* (0x78) */
01359   12,   /* (0x79) */
01360   10,   /* (0x7a) */
01361   6,    /* (0x7b) */
01362   11,   /* (0x7c) */
01363   6,    /* (0x7d) */
01364   12,   /* (0x7e) */
01365   16,   /* (0x7f) */
01366   16,   /* (0x80) */
01367   16,   /* (0x81) */
01368   16,   /* (0x82) */
01369   16,   /* (0x83) */
01370   16,   /* (0x84) */
01371   16,   /* (0x85) */
01372   16,   /* (0x86) */
01373   16,   /* (0x87) */
01374   16,   /* (0x88) */
01375   16,   /* (0x89) */
01376   16,   /* (0x8a) */
01377   16,   /* (0x8b) */
01378   16,   /* (0x8c) */
01379   16,   /* (0x8d) */
01380   16,   /* (0x8e) */
01381   16,   /* (0x8f) */
01382   16,   /* (0x90) */
01383   16,   /* (0x91) */
01384   16,   /* (0x92) */
01385   16,   /* (0x93) */
01386   16,   /* (0x94) */
01387   16,   /* (0x95) */
01388   16,   /* (0x96) */
01389   16,   /* (0x97) */
01390   16,   /* (0x98) */
01391   16,   /* (0x99) */
01392   16,   /* (0x9a) */
01393   16,   /* (0x9b) */
01394   16,   /* (0x9c) */
01395   16,   /* (0x9d) */
01396   16,   /* (0x9e) */
01397   16,   /* (0x9f) */
01398   5,    /* (0xa0) */
01399   7,    /* (0xa1) */
01400   11,   /* (0xa2) */
01401   11,   /* (0xa3) */
01402   10,   /* (0xa4) */
01403   15,   /* (0xa5) */
01404   11,   /* (0xa6) */
01405   8,    /* (0xa7) */
01406   10,   /* (0xa8) */
01407   15,   /* (0xa9) */
01408   8,    /* (0xaa) */
01409   9,    /* (0xab) */
01410   10,   /* (0xac) */
01411   6,    /* (0xad) */
01412   15,   /* (0xae) */
01413   8,    /* (0xaf) */
01414   7,    /* (0xb0) */
01415   11,   /* (0xb1) */
01416   6,    /* (0xb2) */
01417   6,    /* (0xb3) */
01418   7,    /* (0xb4) */
01419   13,   /* (0xb5) */
01420   14,   /* (0xb6) */
01421   5,    /* (0xb7) */
01422   6,    /* (0xb8) */
01423   6,    /* (0xb9) */
01424   7,    /* (0xba) */
01425   9,    /* (0xbb) */
01426   15,   /* (0xbc) */
01427   15,   /* (0xbd) */
01428   15,   /* (0xbe) */
01429   10,   /* (0xbf) */
01430   14,   /* (0xc0) */
01431   14,   /* (0xc1) */
01432   14,   /* (0xc2) */
01433   14,   /* (0xc3) */
01434   14,   /* (0xc4) */
01435   14,   /* (0xc5) */
01436   21,   /* (0xc6) */
01437   14,   /* (0xc7) */
01438   13,   /* (0xc8) */
01439   13,   /* (0xc9) */
01440   13,   /* (0xca) */
01441   13,   /* (0xcb) */
01442   9,    /* (0xcc) */
01443   9,    /* (0xcd) */
01444   9,    /* (0xce) */
01445   9,    /* (0xcf) */
01446   16,   /* (0xd0) */
01447   16,   /* (0xd1) */
01448   16,   /* (0xd2) */
01449   16,   /* (0xd3) */
01450   16,   /* (0xd4) */
01451   16,   /* (0xd5) */
01452   16,   /* (0xd6) */
01453   11,   /* (0xd7) */
01454   16,   /* (0xd8) */
01455   16,   /* (0xd9) */
01456   16,   /* (0xda) */
01457   16,   /* (0xdb) */
01458   16,   /* (0xdc) */
01459   15,   /* (0xdd) */
01460   14,   /* (0xde) */
01461   12,   /* (0xdf) */
01462   11,   /* (0xe0) */
01463   11,   /* (0xe1) */
01464   11,   /* (0xe2) */
01465   11,   /* (0xe3) */
01466   11,   /* (0xe4) */
01467   11,   /* (0xe5) */
01468   17,   /* (0xe6) */
01469   10,   /* (0xe7) */
01470   11,   /* (0xe8) */
01471   11,   /* (0xe9) */
01472   11,   /* (0xea) */
01473   11,   /* (0xeb) */
01474   6,    /* (0xec) */
01475   6,    /* (0xed) */
01476   7,    /* (0xee) */
01477   6,    /* (0xef) */
01478   12,   /* (0xf0) */
01479   13,   /* (0xf1) */
01480   12,   /* (0xf2) */
01481   12,   /* (0xf3) */
01482   12,   /* (0xf4) */
01483   12,   /* (0xf5) */
01484   12,   /* (0xf6) */
01485   11,   /* (0xf7) */
01486   11,   /* (0xf8) */
01487   13,   /* (0xf9) */
01488   13,   /* (0xfa) */
01489   13,   /* (0xfb) */
01490   13,   /* (0xfc) */
01491   12,   /* (0xfd) */
01492   13,   /* (0xfe) */
01493   12,   /* (0xff) */
01494 };
01495
01496 /* Font structure definition. */
01497 EXTERN_CONST Font font_ncenB18 =
01498 {
01499     /* .glyph  = */ font_ncenB18_glyphs,
01500     /* .name   =    "ncenB18", */
01501     /* .width  = */ 21,
01502     /* .height = */ 20,
01503     /* .ascent =    16, */
01504     /* .first  = */ 0,
01505     /* .last   = */ 255,
01506     /* .offset = */ ncenB18_offset,
01507     /* .width  = */ ncenB18_width,
01508 };


BeRTOS: nmea.c File Reference

  • net
Functions
nmea.c File Reference

NMEA parser implementation. More...

#include "nmea.h"
#include "cfg/cfg_nmea.h"
#include <cfg/debug.h>
#include <cfg/log.h>
#include <net/nmeap/inc/nmeap.h>
#include <ctype.h>
#include <time.h>
#include <string.h>
#include <stdlib.h>

Go to the source code of this file.

Functions

void | gpgga_callout (nmeap_context_t *context, void *data, void *user_data)
Callout example for GGA data.
void | gprmc_callout (nmeap_context_t *context, void *data, void *user_data)
Callout example for RMC.
void | gpgsv_callout (nmeap_context_t *context, void *data, void *user_data)
Callout example for GSV data.
void | gpvtg_callout (nmeap_context_t *context, void *data, void *user_data)
Callout example for VTG data.
int | nmea_gpgga (nmeap_context_t *context, nmeap_sentence_t *sentence)
standard GPGGA sentence parser
int | nmea_gprmc (nmeap_context_t *context, nmeap_sentence_t *sentence)
standard GPRMCntence parser
int | nmea_gpvtg (nmeap_context_t *context, nmeap_sentence_t *sentence)
standard GPVTG sentence parser
int | nmea_gpgsv (nmeap_context_t *context, nmeap_sentence_t *sentence)
standard GPGDSV sentence parser
void | nmea_poll (nmeap_context_t *context, KFile *channel)
Parse NMEA sentence from a channel.

Detailed Description

NMEA parser implementation.

NMEA 0183 is acronym of National Marine Electronics Association that combined electrical and data specification for communication between marine electronic devices such as echo sounder, sonars, anemometer (wind speed and direction), gyrocompass, autopilot, GPS receivers and many other types of instruments. It has been defined by, and is controlled by, the U.S.-based National Marine Electronics Association. The NMEA 0183 standard uses a simple ASCII, serial communications protocol that defines how data is transmitted in a "sentence" from one "talker" to multiple "listeners" at a time. At the application layer, the standard also defines the contents of each sentence (message) type so that all listeners can parse messages accurately.

Author:
Daniele Basile <asterix@develer.com>

Definition in file nmea.c.


BeRTOS: nmea.c Source File

  • net
nmea.c
Go to the documentation of this file.
00001
00053 #include "nmea.h"
00054
00055 #include "cfg/cfg_nmea.h"
00056
00057 #include <cfg/debug.h>
00058
00059 #define LOG_LEVEL  NMEA_LOG_LEVEL
00060 #define LOG_FORMAT NMEA_LOG_FORMAT
00061 #include <cfg/log.h>
00062
00063 #include <net/nmeap/inc/nmeap.h>
00064
00065 #include <ctype.h>
00066 #include <time.h>
00067 #include <string.h>
00068 #include <stdlib.h>
00069
00070 /*
00071  * Make conversion from one string to int.
00072  *
00073  * You can specify the precision if the string is a float
00074  * number. The result is an int multiplied to 10^precision.
00075  */
00076 static uint32_t tokenToInt(const char *s, int precision)
00077 {
00078     uint32_t num = 0;
00079     bool sep_found = false;
00080     int i;
00081
00082     if (!s)
00083         return 0;
00084
00085     for(i = 0; i < NMEAP_MAX_SENTENCE_LENGTH; i++)
00086     {
00087         unsigned char c = *s++;
00088
00089         if (c == '.')
00090         {
00091             sep_found = true;
00092             continue;
00093         }
00094
00095         if (c == '\0' || !isdigit(c) || (precision == 0 && sep_found))
00096             break;
00097
00098         if (sep_found)
00099             precision--;
00100
00101         num *= 10;
00102         num += c - '0';
00103     }
00104
00105     while (precision--)
00106         num *= 10;
00107
00108     return num;
00109 }
00110
00111 /*
00112  * Convert a string to micro degree.
00113  */
00114 static udegree_t convertToDegree(const char *str)
00115 {
00116     uint32_t dec;
00117     uint32_t deg;
00118     uint32_t min;
00119
00120     if (*str == 0)
00121         return 0;
00122
00123     dec = tokenToInt(str, 4);
00124     deg = dec / 1000000;
00125     min = dec - deg * 1000000;
00126     dec = deg * 1000000 + ((min * 5) + 1) / 3;
00127
00128     return dec;
00129 }
00130
00131 /*
00132  * Retun latitude in micro degree from a string.
00133  */
00134 static udegree_t nmea_latitude(const char *plat, const char *phem)
00135 {
00136     int ns;
00137
00138     if (*phem == 0)
00139         return 0;
00140
00141     /* north lat is +, south lat is - */
00142     ns = (*phem == 'N') ? 1 : -1;
00143
00144
00145     return ns * convertToDegree(plat);
00146 }
00147
00148 /*
00149  * Retun longitude in micro degree from a string.
00150  */
00151 static udegree_t nmea_longitude(const char *plot, const char *phem)
00152 {
00153     int ew;
00154
00155     if (*phem == 0)
00156         return 0;
00157
00158     /* west long is negative, east long is positive */
00159     ew = (*phem == 'E') ? 1 : -1;
00160
00161     return ew * convertToDegree(plot);
00162 }
00163
00164 /*
00165  * Return altitude in meter from a string.
00166  *
00167  */
00168 static int32_t nmea_altitude(const char *palt, const char *punits)
00169 {
00170     int32_t alt;
00171
00172     if (*palt == 0)
00173         return 0;
00174
00175     alt = atoi(palt);
00176
00177     if (*punits == 'F')
00178     {
00179         /* convert to feet */
00180         /* alt = alt * 3.2808399 */
00181         alt = alt * 3 +  /* 3.0 */
00182             (alt >> 2) + /* 0.25 */
00183             (alt >> 6) + /* 0.015625 */
00184             (alt >> 7) + /* 0.0078125 */
00185             (alt >> 8); /* 0,00390625 */
00186
00187     }
00188
00189     return alt;
00190 }
00191
00192 /*
00193  * Convert time and date stamp string to unix time.
00194  */
00195 static time_t timestampToSec(uint32_t time_stamp, uint32_t date_stamp)
00196 {
00197     struct tm t;
00198     uint16_t msec;
00199     uint16_t tmr[3];
00200     uint16_t date[3];
00201
00202     memset(&t, 0, sizeof(t));
00203     memset(&tmr, 0, sizeof(tmr));
00204     memset(&date, 0, sizeof(date));
00205
00206     LOG_INFO("time_s[%lu],date[%lu]\n", (long)time_stamp, (long)date_stamp);
00207     uint32_t res = time_stamp / 1000;
00208     uint32_t all = time_stamp;
00209     msec = all - res * 1000;
00210
00211     for (int i = 0; i < 3; i++)
00212     {
00213         all = res;
00214         res = all / 100;
00215         tmr[i]  = all - res * 100;
00216         LOG_INFO("t[%d]%d\n", tmr[i],i);
00217     }
00218
00219     t.tm_sec = tmr[0] + (ROUND_UP(msec, 1000) / 1000);
00220     t.tm_min = tmr[1];
00221     t.tm_hour = tmr[2];
00222     //If we do not have refence data, we set 1/1/1970 as default
00223     t.tm_mday = 1;
00224     t.tm_mon = 0;
00225     t.tm_year = 70;
00226
00227     if (date_stamp)
00228     {
00229         res = all = date_stamp;
00230         for (int i = 0; i < 3; i++)
00231         {
00232             all = res;
00233             res = all / 100;
00234             date[i]  = all - res * 100;
00235             LOG_INFO("d[%d]%d\n", date[i],i);
00236         }
00237         t.tm_mday = date[2];
00238         t.tm_mon = date[1] - 1; // time struct count month from 0 to 11;
00239         // we should specify the number of years from 1900, but the year field
00240         // is only two digits, so we add 100 (2000 - 1900)..
00241         t.tm_year = date[0] + 100;
00242     }
00243     LOG_INFO("times=%d,%d,%d,%d,%d,%d\n",t.tm_sec, t.tm_min, t.tm_hour, t.tm_year, t.tm_mon, t.tm_mday);
00244
00245     return  mktime(&t);
00246 }
00247
00251 void gpgga_callout(nmeap_context_t *context, void *data, void *user_data)
00252 {
00253     (void)context;
00254     (void)user_data;
00255     (void)data;
00256     LOG_INFOB(
00257         NmeaGga *gga = (NmeaGga *)data;
00258         LOG_INFO("Found GPGGA message %ld %ld %d %lu %d %d %d %d\n",
00259             (long)gga->latitude,
00260             (long)gga->longitude,
00261             gga->altitude,
00262             gga->time,
00263             gga->satellites,
00264             gga->quality,
00265             gga->hdop,
00266             gga->geoid);
00267     );
00268 }
00269
00273 void gprmc_callout(nmeap_context_t *context, void *data, void *user_data)
00274 {
00275     (void)context;
00276     (void)user_data;
00277     (void)data;
00278     LOG_INFOB(
00279         NmeaRmc *rmc = (NmeaRmc *)data;
00280
00281         LOG_INFO("Found GPRMC message %lu %c %ld %ld %d %d %d\n",
00282             rmc->time,
00283             rmc->warn,
00284             (long)rmc->latitude,
00285             (long)rmc->longitude,
00286             rmc->speed,
00287             rmc->course,
00288             rmc->mag_var);
00289     );
00290 }
00291
00295 void gpgsv_callout(nmeap_context_t *context, void *data, void *user_data)
00296 {
00297     (void)context;
00298     (void)user_data;
00299     (void)data;
00300     LOG_INFOB(
00301         NmeaGsv *gsv = (NmeaGsv *)data;
00302
00303         LOG_INFO("Found GPGSV message %d %d %d\n", gsv->tot_message, gsv->message_num, gsv->tot_svv);
00304
00305         for (int i = 0; i < 4; i++)
00306             LOG_INFO("%d %d %d %d\n", gsv->info[i].sv_prn, gsv->info[i].elevation, gsv->info[i].azimut, gsv->info[i].snr);
00307     );
00308 }
00309
00313 void gpvtg_callout(nmeap_context_t *context, void *data, void *user_data)
00314 {
00315     (void)context;
00316     (void)user_data;
00317     (void)data;
00318     LOG_INFOB(
00319         NmeaVtg *vtg = (NmeaVtg *)data;
00320         LOG_INFO("Found GPVTG message %d %d %d\n", vtg->track_good, vtg->knot_speed, vtg->km_speed);
00321     );
00322 }
00323
00324
00325
00329 int nmea_gpgga(nmeap_context_t *context, nmeap_sentence_t *sentence)
00330 {
00331     /*
00332      * get pointer to sentence data
00333      */
00334     NmeaGga *gga = (NmeaGga *)sentence->data;
00335
00336     ASSERT(gga);
00337     ASSERT(context->tokens >= 12);
00338
00339     gga->latitude   = nmea_latitude(context->token[2],context->token[3]);
00340     gga->longitude  = nmea_longitude(context->token[4],context->token[5]);
00341     gga->altitude   = nmea_altitude(context->token[9],context->token[10]);
00342     gga->time       = timestampToSec(tokenToInt(context->token[1], 3), 0);
00343     gga->satellites = atoi(context->token[7]);
00344     gga->quality    = atoi(context->token[6]);
00345     gga->hdop       = tokenToInt(context->token[8], 1);
00346     gga->geoid      = nmea_altitude(context->token[11],context->token[12]);
00347
00348     /*
00349      * if the sentence has a callout, call it
00350      */
00351
00352     if (sentence->callout != 0)
00353         (*sentence->callout)(context, gga, context->user_data);
00354
00355     return NMEA_GPGGA;
00356 }
00357
00361 int nmea_gprmc(nmeap_context_t *context, nmeap_sentence_t *sentence)
00362 {
00363
00364     /*
00365      * get pointer to sentence data
00366      */
00367     NmeaRmc *rmc = (NmeaRmc *)sentence->data;
00368
00369     ASSERT(rmc);
00370     ASSERT(context->tokens >= 10);
00371
00372     /*
00373      * extract data from the tokens
00374      */
00375     rmc->time       = timestampToSec(tokenToInt(context->token[1], 3), tokenToInt(context->token[9], 0));
00376     rmc->warn       = *context->token[2];
00377     rmc->latitude   = nmea_latitude(context->token[3],context->token[4]);
00378     rmc->longitude  = nmea_longitude(context->token[5],context->token[6]);
00379     rmc->speed      = atoi(context->token[7]);
00380     rmc->course     = atoi(context->token[8]);
00381     rmc->mag_var    = atoi(context->token[10]);
00382
00383     if (sentence->callout != 0)
00384         (*sentence->callout)(context, rmc, context->user_data);
00385
00386     return NMEA_GPRMC;
00387 }
00388
00389
00393 int nmea_gpvtg(nmeap_context_t *context, nmeap_sentence_t *sentence)
00394 {
00395
00396     /*
00397      * get pointer to sentence data
00398      */
00399     NmeaVtg *vtg = (NmeaVtg *)sentence->data;
00400
00401     ASSERT(vtg);
00402     ASSERT(context->tokens >= 7);
00403
00404     /*
00405      * extract data from the tokens
00406      */
00407     vtg->track_good  = atoi(context->token[1]);
00408     vtg->knot_speed  = atoi(context->token[5]);
00409     vtg->km_speed    = atoi(context->token[7]);
00410
00411     /*
00412      * if the sentence has a callout, call it
00413      */
00414     if (sentence->callout != 0)
00415         (*sentence->callout)(context, vtg, context->user_data);
00416
00417     return NMEA_GPVTG;
00418 }
00419
00423 int nmea_gpgsv(nmeap_context_t *context, nmeap_sentence_t *sentence)
00424 {
00425     /*
00426      * get pointer to sentence data
00427      */
00428     NmeaGsv *gsv = (NmeaGsv *)sentence->data;
00429
00430
00431     /*
00432      * extract data from the tokens
00433      */
00434     gsv->tot_message     = atoi(context->token[1]);
00435     gsv->message_num     = atoi(context->token[2]);
00436     gsv->tot_svv         = atoi(context->token[3]);
00437
00438     // Fill remaning member until we have token
00439     int  j = 0;
00440     for (int i = 4; i < context->tokens - 3; i += 4, j++)
00441     {
00442
00443         gsv->info[j].sv_prn     = atoi(context->token[i]);
00444         gsv->info[j].elevation  = atoi(context->token[i + 1]);
00445         gsv->info[j].azimut     = atoi(context->token[i + 2]);
00446         gsv->info[j].snr        = atoi(context->token[i + 3]);
00447     }
00448
00449     /*
00450      * if the sentence has a callout, call it
00451      */
00452     if (sentence->callout != 0)
00453         (*sentence->callout)(context, gsv, context->user_data);
00454
00455     return NMEA_GPGSV;
00456 }
00457
00458
00462 void nmea_poll(nmeap_context_t *context, KFile *channel)
00463 {
00464     int c, e;
00465     while ((c = kfile_getc(channel)) != EOF)
00466         nmeap_parse(context, c);
00467
00468     if ((e = kfile_error(channel)))
00469     {
00470         LOG_ERR("ch error [%0X]\n", e);
00471         kfile_clearerr(channel);
00472     }
00473 }
00474


BeRTOS: nmea.h File Reference

  • net
Data Structures | Functions
nmea.h File Reference

NMEA Parser. More...

#include "cfg/cfg_nmea.h"
#include <net/nmeap/inc/nmeap.h>
#include <io/kfile.h>
#include <time.h>

Go to the source code of this file.

Data Structures

struct | NmeaGga
Global Positioning System Fix Data. More...
struct | NmeaRmc
Recommended minimum specific GPS/Transit data. More...
struct | NmeaVtg
Extracted data from an vtg message. More...
struct | SvInfo
Extracted data from an gsv message. More...

Functions

void | nmea_poll (nmeap_context_t *context, KFile *channel)
Parse NMEA sentence from a channel.
int | nmea_gpgsv (nmeap_context_t *context, nmeap_sentence_t *sentence)
standard GPGDSV sentence parser
int | nmea_gpvtg (nmeap_context_t *context, nmeap_sentence_t *sentence)
standard GPVTG sentence parser
int | nmea_gprmc (nmeap_context_t *context, nmeap_sentence_t *sentence)
standard GPRMCntence parser
int | nmea_gpgga (nmeap_context_t *context, nmeap_sentence_t *sentence)
standard GPGGA sentence parser
void | gpgga_callout (nmeap_context_t *context, void *data, void *user_data)
Callout example for GGA data.
void | gprmc_callout (nmeap_context_t *context, void *data, void *user_data)
Callout example for RMC.
void | gpgsv_callout (nmeap_context_t *context, void *data, void *user_data)
Callout example for GSV data.
void | gpvtg_callout (nmeap_context_t *context, void *data, void *user_data)
Callout example for VTG data.

Detailed Description

NMEA Parser.

Author:
Daniele Basile <asterix@develer.com>

Definition in file nmea.h.


BeRTOS: nmea.h Source File

  • net
nmea.h
Go to the documentation of this file.
00001
00041 #ifndef NET_NMEA_H
00042 #define NET_NMEA_H
00043
00044 #include "cfg/cfg_nmea.h"
00045
00046 #include <net/nmeap/inc/nmeap.h>
00047
00048 #include <io/kfile.h>
00049
00050 #include <time.h>
00051
00052 /*
00053  * Implemented NMEA parser strings.
00054  */
00055 #define NMEA_GPGGA 1   // GGA MESSAGE ID
00056 #define NMEA_GPRMC 2   // RMC MESSAGE ID
00057 #define NMEA_GPVTG 3   // VTG MESSAGE ID
00058 #define NMEA_GPGSV 4   // GSV MESSAGE ID
00059
00060 // Standart type to rappresent fiels.
00061 typedef int32_t udegree_t;    // Micro degrees
00062 typedef int32_t mdegree_t;    // Milli degrees
00063 typedef int16_t degree_t;     // Degrees
00064
00065
00075 typedef struct NmeaGga
00076 {
00077     udegree_t     latitude;   /* Latitude (micro degree) */
00078     udegree_t     longitude;  /* Longitude (micro degree) */
00079     int32_t       altitude;   /* Altitude (Meter) */
00080     time_t        time;       /* UTC of position  (Unix time) */
00081     uint16_t      satellites; /* Satellites are in view */
00082     uint16_t      quality;    /* Fix Quality: 0 = Invalid; 1 = GPS fix; 2 = DGPS fix; */
00083     uint16_t      hdop;       /* Relative accuracy of horizontal position (hdop * 10) */
00084     int16_t       geoid;      /* Height of geoid above WGS84 ellipsoid (Meter) */
00085 } NmeaGga;
00086
00094 typedef struct NmeaRmc
00095 {
00096     time_t        time;       /* UTC of position  (Unix time) */
00097     char          warn;       /* Navigation receiver warning A = OK, V = warning */
00098     udegree_t     latitude;   /* Latitude (micro degree) */
00099     udegree_t     longitude;  /* Longitude (micro degree) */
00100     uint16_t      speed;      /* Speed over ground (knots) */
00101     degree_t      course;     /* Track made good in degrees True (degree) */
00102     degree_t      mag_var;    /* Magnetic variation degrees (degree) */
00103 } NmeaRmc;
00104
00108 typedef struct NmeaVtg
00109 {
00110     degree_t     track_good;  /* True track made good (degree) */
00111     uint16_t     knot_speed;  /* Speed over ground (knots) */
00112     uint16_t     km_speed;    /* Speed over ground in kilometers/hour */
00113 } NmeaVtg;
00114
00118 struct SvInfo
00119 {
00120     uint16_t    sv_prn;       /* SV PRN number */
00121     degree_t    elevation;    /* Elevation in degrees, 90 maximum */
00122     degree_t    azimut;       /* Azimuth, degrees from true north, 000 to 359 */
00123     uint16_t    snr;          /* SNR, 00-99 dB (null when not tracking) */
00124 };
00125
00126 typedef struct NmeaGsv
00127 {
00128     uint16_t    tot_message;  /* Total number of messages of this type in this cycle */
00129     uint16_t    message_num;  /* Message number */
00130     uint16_t    tot_svv;      /* Total number of SVs in view */
00131     struct SvInfo info[4];    /* Stanrd gsv nmea report up to 4 sv info */
00132 } NmeaGsv;
00133
00134 void nmea_poll(nmeap_context_t *context, KFile *channel);
00135
00136 int nmea_gpgsv(nmeap_context_t *context, nmeap_sentence_t *sentence);
00137 int nmea_gpvtg(nmeap_context_t *context, nmeap_sentence_t *sentence);
00138 int nmea_gprmc(nmeap_context_t *context, nmeap_sentence_t *sentence);
00139 int nmea_gpgga(nmeap_context_t *context, nmeap_sentence_t *sentence);
00140
00141 // Example of callout
00142 void gpgga_callout(nmeap_context_t *context, void *data, void *user_data);
00143 void gprmc_callout(nmeap_context_t *context, void *data, void *user_data);
00144 void gpgsv_callout(nmeap_context_t *context, void *data, void *user_data);
00145 void gpvtg_callout(nmeap_context_t *context, void *data, void *user_data);
00146
00147 int nmea_testSetup(void);
00148 int nmea_testTearDown(void);
00149 int nmea_testRun(void);
00150
00151 #endif /* NET_NMEA_H */


BeRTOS: nmeap01.c Source File

  • net
  • nmeap
  • src
nmeap01.c
00001 /*
00002 Copyright (c) 2005, David M Howard (daveh at dmh2000.com)
00003 All rights reserved.
00004
00005 This product is licensed for use and distribution under the BSD Open Source License.
00006 see the file COPYING for more details.
00007
00008 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00009 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00010 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00011 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
00012 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
00013 OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
00014 OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
00015 OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00016 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
00017 OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
00018 EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00019
00020 */
00021
00029 #include <stdio.h>
00030 #include <stdlib.h>
00031 #include <string.h>
00032 #include <ctype.h>
00033
00034 #include "../inc/nmeap.h"
00035
00036 #include <cfg/debug.h>
00037
00038 #define assert(x)    ASSERT(x)
00039
00040 #include "cfg/cfg_nmea.h"
00041
00042 #define LOG_LEVEL  NMEA_LOG_LEVEL
00043 #define LOG_FORMAT NMEA_LOG_FORMAT
00044 #include <cfg/log.h>
00045
00046 #ifdef _DEBUG
00047     #undef NDEBUG
00048     #define printf(str,...)  LOG_INFO(str, ## __VA_ARGS__)
00049 #endif
00050
00051 /* this only works if you are sure you have an upper case hex digit */
00052 #define HEXTOBIN(ch) ((ch <= '9') ? ch - '0' : ch - ('A' - 10))
00053
00054 /* forward references */
00055 int nmeap_init(nmeap_context_t *context,void *user_data);
00056 int nmeap_addParser(nmeap_context_t         *context,
00057                      const char             *sentence_name,
00058                      nmeap_sentence_parser_t sentence_parser,
00059                      nmeap_callout_t         sentence_callout,
00060                      void                  *sentence_data
00061                      );
00062 int nmeap_tokenize(nmeap_context_t *context);
00063 int nmeap_process(nmeap_context_t *context);
00064 int nmeap_parse(nmeap_context_t *context,char ch);
00065 int nmeap_parseBuffer(nmeap_context_t *context,const char *buffer,int *length);
00066
00070 double nmeap_latitude(const char *plat,const char *phem)
00071 {
00072     double lat;
00073     int    deg;
00074     double min;
00075     int    ns;
00076
00077     assert(plat != 0);
00078     assert(phem != 0);
00079
00080     if (*plat == 0) {
00081         return 0.0;
00082     }
00083     if (*phem == 0) {
00084         return 0.0;
00085     }
00086
00087     /* north lat is +, south lat is - */
00088     if (*phem == 'N') {
00089         ns = 1;
00090     }
00091     else {
00092         ns = -1;
00093     }
00094
00095     /* latitude is degrees, minutes, fractional minutes */
00096     /* no validation is performed on the token. it better be good.*/
00097     /* if it comes back 0.0 then probably the token was bad */
00098     lat = atof(plat);
00099
00100     /* extract the degree part */
00101     deg = (int)(lat / 100.0);
00102
00103     /* mask out the degrees */
00104     min = lat - (deg * 100.0);
00105
00106     /* compute the actual latitude in degrees.decimal-degrees */
00107     lat = (deg + (min / 60.0)) * ns;
00108
00109     return lat;
00110 }
00111
00115 double nmeap_longitude(const char *plon,const char *phem)
00116 {
00117     double lon;
00118     int    deg;
00119     double min;
00120     int    ew;
00121
00122     assert(plon != 0);
00123     assert(phem != 0);
00124
00125     if (*plon == 0) {
00126         return 0.0;
00127     }
00128     if (*phem == 0) {
00129         return 0.0;
00130     }
00131
00132     /* west long is negative, east long is positive */
00133     if (*phem == 'E') {
00134         ew = 1;
00135     }
00136     else {
00137         ew = -1;
00138     }
00139
00140     /* longitude is degrees, minutes, fractional minutes */
00141     /* no validation is performed on the token. it better be good.*/
00142     /* if it comes back 0.0 then probably the token was bad */
00143     lon = atof(plon);
00144
00145     /* extract the degree part */
00146     deg = (int)(lon / 100.0);
00147
00148     /* mask out the degrees */
00149     min = lon - (deg * 100.0);
00150
00151     /* compute the actual lonitude in degrees.decimal-degrees */
00152     lon = (deg + (min / 60.0)) * ew;
00153
00154
00155     return lon;
00156 }
00157
00162 double nmeap_altitude(const char *palt,const char *punits)
00163 {
00164     double alt;
00165
00166     if (*palt == 0) {
00167         return 0.0;
00168     }
00169
00170     /* convert with no error checking */
00171     alt = atof(palt);
00172
00173     if (*punits == 'M') {
00174         /* already in meters */
00175     }
00176     else if (*punits == 'F') {
00177         /* convert to feet */
00178         alt = alt * 3.2808399;
00179     }
00180
00181     return alt;
00182 }
00183
00187 int nmeap_init(nmeap_context_t *context,void *user_data)
00188 {
00189     assert(context != 0);
00190
00191     memset(context,0,sizeof(*context));
00192
00193     context->user_data = user_data;
00194
00195     return 0;
00196 }
00197
00201 int nmeap_addParser(nmeap_context_t         *context,
00202                      const char             *sentence_name,
00203                      nmeap_sentence_parser_t sentence_parser,
00204                      nmeap_callout_t         sentence_callout,
00205                      void                  *sentence_data
00206                      )
00207 {
00208     nmeap_sentence_t *s = 0;
00209
00210     /* runtime error */
00211     assert(context != 0);
00212
00213     /* sentence capacity overflow */
00214     if (context->sentence_count >= NMEAP_MAX_SENTENCES) {
00215         return -1;
00216     }
00217
00218     /* point at next empty sentence buffer */
00219     s = &context->sentence[context->sentence_count];
00220
00221     /* advance sentence data count */
00222     context->sentence_count++;
00223
00224     /* clear the sentence data */
00225     memset(s,0,sizeof(*s));
00226
00227     /* name */
00228     strncpy(s->name,sentence_name,NMEAP_MAX_SENTENCE_NAME_LENGTH);
00229
00230     /* parser */
00231     s->parser = sentence_parser;
00232
00233     /* callout */
00234     s->callout = sentence_callout;
00235
00236     /* data */
00237     s->data    = sentence_data;
00238
00239     return 0;
00240 }
00241
00245 int nmeap_tokenize(nmeap_context_t *context)
00246 {
00247     char *s;
00248     int   tokens;
00249     int   state;
00250
00251     /* first token is header. assume it is there */
00252     tokens = 0;
00253     s = context->input;
00254     context->token[tokens] = s;
00255
00256     /* get rest of tokens */
00257     tokens = 1;
00258     state = 0;
00259     while((*s != 0)&&(tokens < NMEAP_MAX_TOKENS)) {
00260         switch(state) {
00261         case 0:
00262             /* looking for end of a token */
00263             if (*s == ',') {
00264                 /* delimit at the comma */
00265                 *s    = 0;
00266                 /* new token */
00267                 state = 1;
00268             }
00269             break;
00270         case 1:
00271             /* start of next token, might be another comma */
00272             context->token[tokens++] = s;
00273             if (*s == ',') {
00274                 /* delimit at the comma */
00275                 *s    = 0;
00276             }
00277             else {
00278                 /* not a comma */
00279                 state = 0;
00280             }
00281             break;
00282         default:
00283             state = 0;
00284             break;
00285         }
00286
00287         // next character
00288         s++;
00289     }
00290     return tokens;
00291 }
00292
00296 int nmeap_process(nmeap_context_t *context)
00297 {
00298     int id = 0;
00299     int i;
00300     nmeap_sentence_t *s;
00301
00302     /* copy the input to a debug buffer */
00303     /* remove debug_input when everything is working. */
00304     strncpy(context->debug_input,context->input,sizeof(context->debug_input));
00305
00306     /* tokenize the input */
00307     context->tokens = nmeap_tokenize(context);
00308
00309     /* try to find a matching sentence parser */
00310     /* this search is O(n). it has a lot of potential for optimization, at the expense of complexity, if you have a lot of sentences */
00311     /* binary search instead of linear (have to keep sentences in sorted order) O(NlogN) */
00312     /* OR, when sentences are added, create a TRIE structure to find the names with a constant time search O(5) */
00313     for(i=0;i<context->sentence_count;i++) {
00314         s = &context->sentence[i];
00315         assert(s != 0);
00316         if (strncmp(context->input_name,s->name,5) == 0) {
00317             /* found a match, call its parser */
00318             id = (*context->sentence[i].parser)(context,s);
00319             if (id > 0) {
00320                 break;
00321             }
00322         }
00323     }
00324
00325     return id;
00326 }
00327
00351 int nmeap_parse(nmeap_context_t *context,char ch)
00352 {
00353     int status = 0;
00354
00355     /* check for input buffer overrun first to avoid duplicating code in the
00356     individual states
00357     */
00358     if ((size_t)context->input_count >= (sizeof(context->input)-1)) {
00359         /* input buffer overrun, restart state machine */
00360         context->input_state = 0;
00361         /* reset input count */
00362         context->input_count = 0;
00363     }
00364
00365     /* store the byte */
00366     context->input[context->input_count] = ch;
00367
00368     /* next buffer position */
00369     context->input_count++;
00370
00371     /* run it through the lexical scanner */
00372     switch(context->input_state) {
00373     /* LOOKING FOR $ */
00374     case 0:
00375         if (ch == '$') {
00376             /*look for id */
00377             context->input_state = 1;
00378             context->ccks        = 0;
00379             context->icks        = 0;
00380         }
00381         else {
00382             /* header error, start over */
00383             context->err_hdr++;
00384             context->input_state = 0;
00385             context->input_count = 0;
00386         }
00387         break;
00388     /* LOOKING FOR 5 CHARACTER SENTENCE ID */
00389     case 1:
00390         /* allow numbers even though it isn't usually done */
00391         /* a proprietary id might have a numeral */
00392         if (isalnum((unsigned char)ch)) {
00393             /* store name separately */
00394             context->input_name[context->input_count - 2] = ch;
00395             /* checksum */
00396             context->ccks ^= ch;
00397             /* end of header? */
00398             if (context->input_count >= 6) {
00399                 /* yes, get body */
00400                 context->input_state = 2;
00401             }
00402         }
00403         else {
00404             /* bad character, start over */
00405             context->err_id++;
00406             context->input_state = 0;
00407             context->input_count = 0;
00408         }
00409         break;
00410     /* LOOKING FOR CR OR CHECKSUM INDICATOR */
00411     case 2:
00412         if (ch == '*') {
00413             /* this sentence has a checksum */
00414             context->input_state = 3;
00415         }
00416         else if (ch == '\r') {
00417             /* carriage return, no checksum, force a match */
00418             context->icks = 0;
00419             context->ccks = 0;
00420             context->input_state = 6;
00421         }
00422         else {
00423             /* continue accumulating data */
00424             /* checksum */
00425             context->ccks ^= ch;
00426         }
00427         break;
00428     /* LOOKING FOR FIRST CHECKSUM CHARACTER */
00429     case 3:
00430         /* must be upper case hex digit */
00431         if (isxdigit((unsigned char)ch) && (ch <= 'F')) {
00432             /* got first checksum byte */
00433             context->input_state = 4;
00434             context->icks = HEXTOBIN(ch) << 4;
00435         }
00436         else {
00437             /* input error, restart */
00438             context->err_cks++;
00439             context->input_state = 0;
00440             context->input_count = 0;
00441         }
00442         break;
00443         /* LOOKING FOR SECOND CHECKSUM CHARACTER */
00444     case 4:
00445         /* must be upper case hex digit */
00446         if (isxdigit((unsigned char)ch) && (ch <= 'F')) {
00447             /* got second checksum byte */
00448             context->input_state = 5;
00449             context->icks += HEXTOBIN(ch);
00450         }
00451         else {
00452             /* input error, restart */
00453             context->err_cks++;
00454             context->input_state = 0;
00455             context->input_count = 0;
00456         }
00457         break;
00458     /* LOOKING FOR CR */
00459     case 5:
00460         if (ch == '\r') {
00461             /* carriage return */
00462             context->input_state = 6;
00463         }
00464         else {
00465             /* input error, restart */
00466             context->err_crl++;
00467             context->input_state = 0;
00468             context->input_count = 0;
00469         }
00470         break;
00471     /* LOOKING FOR LINE FEED */
00472     case 6:
00473         if (ch == '\n') {
00474             /* linefeed, line complete */
00475
00476             /* delimit buffer */
00477             context->input[context->input_count] = 0;
00478
00479             /* if the checksums match, process the sentence */
00480             if (context->ccks == context->icks) {
00481                 /* process */
00482                 status = nmeap_process(context);
00483
00484                 /* count good messages */
00485                 context->msgs++;
00486             }
00487             else {
00488                 /* count checksum errors */
00489                 context->err_cks++;
00490             }
00491
00492             /* restart next time */
00493             context->input_state = 0;
00494             context->input_count = 0;
00495         }
00496         else {
00497             /* input error, restart */
00498             context->err_crl++;
00499             context->input_state = 0;
00500             context->input_count = 0;
00501         }
00502         break;
00503     default:
00504         context->err_unk++;
00505         context->input_state = 0;
00506         break;
00507     }
00508
00509     return status;
00510 }
00511
00515 int nmeap_parseBuffer(nmeap_context_t *context,const char *buffer,int *length)
00516 {
00517     int  i;
00518     int  status;
00519     int  rem;
00520     int  tlen;
00521
00522     tlen   = *length;
00523     rem    = *length;
00524     status = 0;
00525     /* for each byte in the buffer */
00526     for(i=0;i<tlen;i++) {
00527         /* decrement remaining byte count */
00528         rem--;
00529         /* parse the byte */
00530         status = nmeap_parse(context,buffer[i]);
00531         if (status != 0) {
00532             /* message found or error */
00533             break;
00534         }
00535     }
00536
00537     /* return remaining byte count */
00538     *length = rem;
00539
00540     return status;
00541 }
00542
00546 int nmeap_gpgga(nmeap_context_t *context,nmeap_sentence_t *sentence)
00547 {
00548 #ifndef NDEBUG
00549     int i;
00550 #endif
00551
00552     /* get pointer to sentence data */
00553     nmeap_gga_t *gga = (nmeap_gga_t *)sentence->data;
00554
00555     /* if there is a data element, extract data from the tokens */
00556     if (gga != 0) {
00557         gga->latitude  = nmeap_latitude(context->token[2],context->token[3]);
00558         gga->longitude = nmeap_longitude(context->token[4],context->token[5]);
00559         gga->altitude  = nmeap_altitude(context->token[9],context->token[10]);
00560         gga->time       = atoi(context->token[1]);
00561         gga->satellites = atoi(context->token[7]);
00562         gga->quality    = atoi(context->token[6]);
00563         gga->hdop       = atof(context->token[8]);
00564         gga->geoid      = nmeap_altitude(context->token[11],context->token[12]);
00565     }
00566
00567 #ifndef NDEBUG
00568     /* print raw input string */
00569     printf("%s",context->debug_input);
00570
00571     /* print some validation data */
00572     printf("%s==%s %02x==%02x\n",context->input_name,sentence->name,context->icks,context->ccks);
00573
00574     /* print the tokens */
00575     for(i=0;i<context->tokens;i++) {
00576         printf("%d:%s\n",i,context->token[i]);
00577     }
00578 #endif
00579
00580     /* if the sentence has a callout, call it */
00581     if (sentence->callout != 0) {
00582         (*sentence->callout)(context,gga,context->user_data);
00583     }
00584
00585     return NMEAP_GPGGA;
00586 }
00587
00591 int nmeap_gprmc(nmeap_context_t *context,nmeap_sentence_t *sentence)
00592 {
00593 #ifndef NDEBUG
00594     int i;
00595 #endif
00596
00597     /* get pointer to sentence data */
00598     nmeap_rmc_t *rmc = (nmeap_rmc_t *)sentence->data;
00599
00600     /* if there is a data element, use it */
00601     if (rmc != 0) {
00602         /* extract data from the tokens */
00603         rmc->time       = atoi(context->token[1]);
00604         rmc->warn       = *context->token[2];
00605         rmc->latitude  = nmeap_latitude(context->token[3],context->token[4]);
00606         rmc->longitude = nmeap_longitude(context->token[5],context->token[6]);
00607         rmc->speed      = atof(context->token[7]);
00608         rmc->course     = atof(context->token[8]);
00609         rmc->date       = atoi(context->token[9]);
00610         rmc->magvar     = atof(context->token[10]);
00611     }
00612
00613 #ifndef NDEBUG
00614     /* print raw input string */
00615     printf("%s",context->debug_input);
00616
00617     /* print some validation data */
00618     printf("%s==%s %02x==%02x\n",context->input_name,sentence->name,context->icks,context->ccks);
00619
00620     /* print the tokens */
00621     for(i=0;i<context->tokens;i++) {
00622         printf("%d:%s\n",i,context->token[i]);
00623     }
00624 #endif
00625
00626     /* if the sentence has a callout, call it */
00627     if (sentence->callout != 0) {
00628         (*sentence->callout)(context,rmc,context->user_data);
00629     }
00630
00631     return NMEAP_GPRMC;
00632 }
00633
00634


BeRTOS: nmeap.h Source File

  • net
  • nmeap
  • inc
nmeap.h
00001 /*
00002 Copyright (c) 2005, David M Howard (daveh at dmh2000.com)
00003 All rights reserved.
00004
00005 This product is licensed for use and distribution under the BSD Open Source License.
00006 see the file COPYING for more details.
00007
00008 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00009 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00010 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00011 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
00012 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
00013 OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
00014 OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
00015 OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00016 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
00017 OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
00018 EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00019
00020 */
00021
00022 #ifndef __NMEAP_H__
00023 #define __NMEAP_H__
00024
00025 #ifdef __cplusplus
00026 extern "C" {
00027 #endif
00028
00029 #include "cfg/cfg_nmea.h"
00030
00031 /*
00032 ============================================
00033 COMPILE TIME CONFIGURATION CONSTANTS
00034 ============================================
00035 */
00036
00037 /* these constants affect the size of the context object. tweak them as desired but know what you are doing */
00038
00040 #define NMEAP_MAX_SENTENCES            CONFIG_NMEAP_MAX_SENTENCES
00041
00042 #define NMEAP_MAX_SENTENCE_NAME_LENGTH 5
00043
00045 #define NMEAP_MAX_SENTENCE_LENGTH      CONFIG_NMEAP_MAX_SENTENCE_LENGTH
00046
00047 #define NMEAP_MAX_TOKENS               CONFIG_NMEAP_MAX_TOKENS
00048
00049 /* predefined message ID's */
00050
00051 /* GGA MESSAGE ID */
00052 #define NMEAP_GPGGA 1
00053 /* RMC MESSAGE ID */
00054 #define NMEAP_GPRMC 2
00055
00057 #define NMEAP_USER  100
00058
00059 /* forward references */
00060 struct nmeap_context;
00061 struct nmeap_sentence;
00062
00063 /*
00064 ============================================
00065 CALLOUTS
00066 ============================================
00067 */
00068
00077 typedef void (*nmeap_callout_t)(struct nmeap_context *context,void *sentence_data,void *user_data);
00078
00089 typedef int (*nmeap_sentence_parser_t)(struct nmeap_context *context,struct nmeap_sentence *sentence);
00090
00091
00092 /* ==== opaque types === */
00093 #include "nmeap_def.h"
00094
00095
00096 /*
00097 ============================================
00098 STANDARD SENTENCE DATA STRUCTURES
00099 ============================================
00100 */
00101
00103 struct nmeap_gga {
00104     double        latitude;
00105     double        longitude;
00106     double        altitude;
00107     unsigned long time;
00108     int           satellites;
00109     int           quality;
00110     double        hdop;
00111     double        geoid;
00112 };
00113 typedef struct nmeap_gga nmeap_gga_t;
00114
00116 struct nmeap_rmc {
00117     unsigned long time;
00118     char          warn;
00119     double        latitude;
00120     double        longitude;
00121     double        speed;
00122     double        course;
00123     unsigned long date;
00124     double        magvar;
00125 };
00126
00127 typedef struct nmeap_rmc nmeap_rmc_t;
00128
00129 /*
00130 ============================================
00131 METHODS
00132 ============================================
00133 */
00134
00141 int nmeap_init(nmeap_context_t *context,void *user_data);
00142
00155 int nmeap_addParser(nmeap_context_t         *context,
00156                      const char             *sentence_name,
00157                      nmeap_sentence_parser_t sentence_parser,
00158                      nmeap_callout_t         sentence_callout,
00159                      void                   *sentence_data
00160                      );
00161
00170 int nmeap_parseBuffer(nmeap_context_t *context,const char *buffer,int *length);
00171
00178 int nmeap_parse(nmeap_context_t *context,char ch);
00179
00180
00186 int nmeap_gpgga(nmeap_context_t *context,nmeap_sentence_t *sentence);
00187
00193 int nmeap_gprmc(nmeap_context_t *context,nmeap_sentence_t *sentence);
00194
00201 double nmeap_latitude(const char *plat,const char *phem);
00202
00203
00210 double nmeap_longitude(const char *plat,const char *phem);
00211
00212
00219 double nmeap_altitude(const char *palt,const char *punits);
00220
00221 #ifdef __cplusplus
00222 } // extern C
00223 #endif
00224
00225
00226 #endif
00227


BeRTOS: nmeap_def.h Source File

  • net
  • nmeap
  • inc
nmeap_def.h
00001 /*
00002 Copyright (c) 2005, David M Howard (daveh at dmh2000.com)
00003 All rights reserved.
00004
00005 This product is licensed for use and distribution under the BSD Open Source License.
00006 see the file COPYING for more details.
00007
00008 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00009 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00010 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00011 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
00012 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
00013 OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
00014 OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
00015 OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00016 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
00017 OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
00018 EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00019
00020 */
00021
00022 #ifndef __NMEAP_DEF_H__
00023 #define __NMEAP_DEF_H__
00024
00028 typedef struct nmeap_sentence {
00029     char                    name[NMEAP_MAX_SENTENCE_NAME_LENGTH + 1];
00030     int                     id;
00031     nmeap_sentence_parser_t parser;
00032     nmeap_callout_t         callout;
00033     void                   *data;
00034 } nmeap_sentence_t;
00035
00039 struct nmeap_context {
00041     nmeap_sentence_t sentence[NMEAP_MAX_SENTENCES];     /* sentence descriptors */
00042     int              sentence_count;                        /* number of initialized descriptors */
00043
00045     char             input[NMEAP_MAX_SENTENCE_LENGTH + 1];   /* input line buffer */
00046     int              input_count;                           /* index into 'input */
00047     int              input_state;                           /* current lexical scanner state */
00048     char             input_name[6];                        /* sentence name */
00049     char             icks;                                  /* input checksum    */
00050     char             ccks;                                  /* computed checksum */
00051
00052     /* tokenization */
00053     char            *token[NMEAP_MAX_TOKENS];              /* list of delimited tokens */
00054     int              tokens;                                 /* list of tokens */
00055
00057     unsigned long    msgs;    /* count of good messages */
00058     unsigned long    err_hdr; /* header error */
00059     unsigned long    err_ovr; /* overrun error */
00060     unsigned long    err_unk; /* unknown error */
00061     unsigned long    err_id;  /* bad character in id */
00062     unsigned long    err_cks; /* bad checksum */
00063     unsigned long    err_crl; /* expecting cr or lf, got something else */
00064     char             debug_input[NMEAP_MAX_SENTENCE_LENGTH + 1];     /* input line buffer for debug */
00065
00067     void *user_data;
00068 };
00069
00070 typedef struct nmeap_context nmeap_context_t;
00071
00072 #endif /* __NMEAP_DEF_H__ */


BeRTOS: ntc.c File Reference

  • drv
Functions
ntc.c File Reference

Driver for NTC (reads a temperature through an ADC) More...

#include "hw/hw_ntc.h"
#include "hw/ntc_map.h"
#include "cfg/cfg_ntc.h"
#include <cfg/log.h>
#include <cfg/debug.h>
#include <drv/ntc.h>

Go to the source code of this file.

Functions

static size_t | upper_bound (const res_t *orig_table, size_t size, res_t val)
Find in a table of values orig_table of size size, the index which value is less or equal to val.
deg_t | ntc_read (NtcDev dev)
Read the temperature for the NTC channel dev.
void | ntc_init (void)
Init NTC hardware.

Detailed Description

Driver for NTC (reads a temperature through an ADC)

Author:
Giovanni Bajo <rasky@develer.com>
Francesco Sacchi <batt@develer.com>

This module handles an external NTC bound to an AD converter. As usual, it relies on a low-level API (ntc_hw_*) (see below):

Definition in file ntc.c.

Function Documentation

void ntc_init ( void )

Init NTC hardware.

Initialize the NTC module.

Definition at line 149 of file ntc.c.

deg_t ntc_read ( NtcDev dev )

Read the temperature for the NTC channel dev.

Read a single temperature value from the NTC.

First read the resistence of the NTC through ntc_hw_read(), then, for the conversion from resistance to temperature, since the formula varies from device to device, we implemented a generic system using a table of data which maps temperature (index) to resistance (data). The range of the table (min/max temperature) and the step (temperature difference between two consecutive elements of the table) is variable and can be specified. Notice that values inbetween the table elements are still possible as the library does a linear interpolation using the actual calculated resistance to find out the exact temperature.

The low-level API provides a function to get access to a description of the NTC (ntc_hw_getInfo()), including the resistance table.

Definition at line 104 of file ntc.c.

static size_t upper_bound | ( | const res_t * | orig_table,
 |  | size_t | size,
 |  | res_t | val
 | ) |  | [static]

Find in a table of values orig_table of size size, the index which value is less or equal to val.

Return values:
0 | When val is higher than the first table entry.
size | When val is lower than the last table entry.
1..size-1 | When val is within the table.

Definition at line 67 of file ntc.c.


BeRTOS: ntc.c Source File

  • drv
ntc.c
Go to the documentation of this file.
00001
00044 #include "hw/hw_ntc.h"
00045 #include "hw/ntc_map.h"
00046
00047 #include "cfg/cfg_ntc.h"
00048
00049 // Define logging setting (for cfg/log.h module).
00050 #define LOG_LEVEL         CONFIG_NTC_LOG_LEVEL
00051 #define LOG_VERBOSITY     CONFIG_NTC_LOG_FORMAT
00052 #include <cfg/log.h>
00053 #include <cfg/debug.h>
00054
00055 #include <drv/ntc.h>
00056
00057 DB(bool ntc_initialized;)
00058
00067 static size_t upper_bound(const res_t *orig_table, size_t size, res_t val)
00068 {
00069     const res_t *table = orig_table;
00070
00071     while (size)
00072     {
00073         size_t pos = size / 2;
00074         if (val > table[pos])
00075             size = pos;
00076         else
00077         {
00078             table += pos+1;
00079             size -= pos+1;
00080         }
00081     }
00082
00083     return table - orig_table;
00084 }
00085
00086
00104 deg_t ntc_read(NtcDev dev)
00105 {
00106     const NtcHwInfo* hw = ntc_hw_getInfo(dev);
00107     const res_t* r = hw->resistances;
00108
00109     res_t rx;
00110     size_t i;
00111     deg_t degrees = 0;
00112
00113     rx = ntc_hw_read(dev);
00114
00115
00116     i = upper_bound(r, hw->num_resistances, rx);
00117     ASSERT(i <= hw->num_resistances);
00118
00119     if (i >= hw->num_resistances)
00120         return NTC_SHORT_CIRCUIT;
00121     else if (i == 0)
00122         return NTC_OPEN_CIRCUIT;
00123
00124     /*
00125      * Interpolated value in 0.1 degrees multiplied by 10:
00126      *   delta t          step t
00127      * ----------  = ----------------
00128      * (rx - r[i])   (r[i-1] - r [i])
00129      */
00130     float tmp;
00131     tmp = 10 * hw->degrees_step * (rx - r[i]) / (r[i - 1] - r[i]);
00132
00133     /*
00134      * degrees = integer part corresponding to the superior index
00135      *           in the table multiplied by 10
00136      *           - decimal part interpolated (already multiplied by 10)
00137      */
00138     degrees = (i * hw->degrees_step + hw->degrees_min) * 10 - (int)(tmp);
00139
00140     //kprintf("dev= %d, I=%d, degrees = %d\n", dev, i , degrees);
00141
00142     return degrees;
00143 }
00144
00145
00149 void ntc_init(void)
00150 {
00151     NTC_HW_INIT;
00152     DB(ntc_initialized = true;)
00153 }
00154


BeRTOS: ntc.h File Reference

  • drv
Data Structures | Defines | Typedefs | Functions
ntc.h File Reference

Driver for NTC sensors (reads a temperature through an ADC). More...

#include "hw/ntc_map.h"
#include <cfg/compiler.h>
#include <cfg/debug.h>

Go to the source code of this file.

Data Structures

struct | NtcHwInfo
type for defining amplifications amp_t = A, where A is a pure number More...

Defines

#define | DEG_TO_DEG_T(x) ((deg_t)((x) * 10))
type for celsius degrees deg_t = °C * 10
#define | DEG_T_TO_INTDEG(x) ((x) / 10)
Macro for converting from deg_t to celsius degrees (returns only the integer part)
#define | DEG_T_TO_DECIMALDEG(x) ((x) % 10)
Macro for converting from deg_t to celsius degrees (returns only the decimal part)
#define | DEG_T_TO_FLOATDEG(x) ((x) / 10.0)
Macro for converting from deg_t to celsius degrees (returns type is float)

Typedefs

typedef float | amp_t
type for resistor res_t = Ohm * 100

Functions

void | ntc_init (void)
Initialize the NTC module.
deg_t | ntc_read (NtcDev dev)
Read a single temperature value from the NTC.

Detailed Description

Driver for NTC sensors (reads a temperature through an ADC).

Author:
Giovanni Bajo <rasky@develer.com>
Francesco Sacchi <batt@develer.com>

Definition in file ntc.h.

Define Documentation

#define DEG_TO_DEG_T ( x ) ((deg_t)((x) * 10))

type for celsius degrees deg_t = °C * 10

Macro for converting from deg to deg_t type

Definition at line 57 of file ntc.h.

Function Documentation

deg_t ntc_read ( NtcDev dev )

Read a single temperature value from the NTC.

Read a single temperature value from the NTC.

First read the resistence of the NTC through ntc_hw_read(), then, for the conversion from resistance to temperature, since the formula varies from device to device, we implemented a generic system using a table of data which maps temperature (index) to resistance (data). The range of the table (min/max temperature) and the step (temperature difference between two consecutive elements of the table) is variable and can be specified. Notice that values inbetween the table elements are still possible as the library does a linear interpolation using the actual calculated resistance to find out the exact temperature.

The low-level API provides a function to get access to a description of the NTC (ntc_hw_getInfo()), including the resistance table.

Definition at line 104 of file ntc.c.


BeRTOS: ntc.h Source File

  • drv
ntc.h
Go to the documentation of this file.
00001
00043 #ifndef DRV_NTC_H
00044 #define DRV_NTC_H
00045
00046 #include "hw/ntc_map.h"
00047
00048 #include <cfg/compiler.h>
00049 #include <cfg/debug.h>
00050
00051 #define NTC_OPEN_CIRCUIT  -32768
00052 #define NTC_SHORT_CIRCUIT 32767
00053
00054 typedef int16_t  deg_t;
00057 #define DEG_TO_DEG_T(x)         ((deg_t)((x) * 10))
00058
00060 #define DEG_T_TO_INTDEG(x)      ((x) / 10)
00061
00063 #define DEG_T_TO_DECIMALDEG(x)  ((x) % 10)
00064
00066 #define DEG_T_TO_FLOATDEG(x)    ((x) / 10.0)
00067
00068
00069 typedef uint32_t res_t;
00070 typedef float    amp_t;
00072 DB(extern bool ntc_initialized;)
00073
00074
00076 typedef struct NtcHwInfo
00077 {
00078     const res_t *resistances;
00079     size_t num_resistances;
00080     deg_t degrees_min;
00081     deg_t degrees_step;
00082 } NtcHwInfo;
00083
00085 void ntc_init(void);
00086
00088 deg_t ntc_read(NtcDev dev);
00089
00090 #endif /* DRV_NTC_H */


BeRTOS: ntc_map.h File Reference

  • hw
ntc_map.h File Reference

NTC map definitions. More...

#include <cfg/compiler.h>

Go to the source code of this file.

Enumerations

Enum for ntc devices.
enum NtcDev

Detailed Description

NTC map definitions.

Author:
Giovanni Bajo <rasky@develer.com>
Francesco Sacchi <batt@develer.com>

Definition in file ntc_map.h.


BeRTOS: ntc_map.h Source File

  • hw
ntc_map.h
Go to the documentation of this file.
00001
00040 #ifndef NTC_MAP_H
00041 #define NTC_MAP_H
00042
00043 #include <cfg/compiler.h>
00044
00045 #warning TODO:This is an example implentation, you must implement it!
00046
00050 typedef enum NtcDev
00051 {
00052     NTC_TEST,
00053
00054     /* Put here your thermo device */
00055
00056     NTC_CNT
00057 } NtcDev;
00058 /* \} */
00059
00060 #endif /* NTC_MAP_H */


BeRTOS: observer.c File Reference

  • mware
Functions
observer.c File Reference

Simple notifier for the observer/subject pattern (implementation) More...

#include "observer.h"
#include <cpu/irq.h>

Go to the source code of this file.

Functions

void | observer_Subscribe (Subject *subject, Observer *observer)
Aggiunge un Observer all'insieme.
void | observer_notify (Subject *subject, int event_id, void *param)
per tutti gli elementi nel set notifica l'evento, chiamando la relativa funzione event

Detailed Description

Simple notifier for the observer/subject pattern (implementation)

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file observer.c.


BeRTOS: observer.c Source File

  • mware
observer.c
Go to the documentation of this file.
00001
00038 #include "observer.h"
00039 #include <cpu/irq.h>  // IRQ_DISABLE/IRQ_ENABLE
00040
00041
00042 void observer_SetEvent(Observer *observer, void (*event)(int event_id, void *param))
00043 {
00044     observer->event = event;
00045 }
00046
00047 void observer_InitSubject(Subject *subject)
00048 {
00049     LIST_INIT(&subject->observers);
00050 }
00051
00052 void observer_Subscribe(Subject *subject, Observer *observer)
00053 {
00054     ATOMIC(ADDHEAD(&subject->observers, &observer->link));
00055 }
00056
00057 void observer_Unsubscribe(UNUSED_ARG(Subject *,subject), Observer *observer)
00058 {
00059     ATOMIC(REMOVE(&observer->link));
00060 }
00061
00062 void observer_notify(Subject *subject, int event_id, void *param)
00063 {
00064     Observer *observer;
00065     cpu_flags_t irqstate;
00066     IRQ_SAVE_DISABLE(irqstate);
00067
00068     /*
00069      * Run over list with protection against other
00070      * threads, but re-enable irqs in callbacks.
00071      */
00072     FOREACH_NODE(observer, &subject->observers)
00073     {
00074         IRQ_RESTORE(irqstate);
00075         observer->event(event_id, param);
00076         IRQ_SAVE_DISABLE(irqstate);
00077     }
00078
00079     IRQ_RESTORE(irqstate);
00080 }


BeRTOS: observer.h File Reference

  • mware
Data Structures | Functions
observer.h File Reference

Simple notifier for the subject/observer pattern (interface) More...

#include <struct/list.h>

Go to the source code of this file.

Data Structures

struct | Observer
Here's a simple example: More...

Functions

void | observer_Subscribe (Subject *subject, Observer *observer)
Aggiunge un Observer all'insieme.
void | observer_Unsubscribe (Subject *subject, Observer *observer)
Rimuove un Observer dall'insieme.
void | observer_notify (Subject *subject, int event_id, void *param)
per tutti gli elementi nel set notifica l'evento, chiamando la relativa funzione event

Detailed Description

Simple notifier for the subject/observer pattern (interface)

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file observer.h.


BeRTOS: observer.h Source File

  • mware
observer.h
Go to the documentation of this file.
00001
00037 #ifndef MWARE_OBSERVER_H
00038 #define MWARE_OBSERVER_H
00039
00040 #include <struct/list.h>
00041
00066 typedef struct Observer
00067 {
00068     Node link;
00069     void (*event)(int event_id, void *param);
00070 } Observer;
00071
00072 typedef struct Subject
00073 {
00075     List observers;
00076
00077 } Subject;
00078
00079 void observer_SetEvent(Observer *observer, void (*event)(int event_id, void *param));
00080
00081 #define OBSERVER_INITIALIZER(callback) { { NULL, NULL }, callback }
00082
00083 void observer_InitSubject(Subject *subject);
00084
00086 void observer_Subscribe(Subject *subject, Observer *observer);
00087
00089 void observer_Unsubscribe(Subject *subject, Observer *observer);
00090
00093 void observer_notify(Subject *subject, int event_id, void *param);
00094
00095 #endif /* MWARE_OBSERVER_H */


BeRTOS: omac.c File Reference

  • sec
  • mac
omac.c File Reference

OMAC implementation. More...

#include "omac.h"
#include <cfg/macros.h>
#include <sec/util.h>

Go to the source code of this file.

Detailed Description

OMAC implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file omac.c.


BeRTOS: omac.c Source File

  • sec
  • mac
omac.c
Go to the documentation of this file.
00001
00037 #include "omac.h"
00038 #include <cfg/macros.h>
00039 #include <sec/util.h>
00040
00041 static void omac_set_key(Mac *ctx_, const void* key, size_t len)
00042 {
00043     OmacContext *ctx = (OmacContext *)ctx_;
00044     cipher_set_vkey(ctx->c, key, len);
00045 }
00046
00047 static void omac_begin(Mac *ctx_)
00048 {
00049     OmacContext *ctx = (OmacContext *)ctx_;
00050
00051     ctx->acc = 0;
00052
00053     memset(ctx->Y, 0, cipher_block_len(ctx->c));
00054     cipher_cbc_begin(ctx->c, ctx->Y);
00055 }
00056
00057 static void omac_update(Mac *ctx_, const void *data_, size_t len)
00058 {
00059     OmacContext *ctx = (OmacContext *)ctx_;
00060     size_t blen = cipher_block_len(ctx->c);
00061     const uint8_t *data = (const uint8_t *)data_;
00062
00063     while (len)
00064     {
00065         ASSERT(ctx->acc <= blen);
00066         if (ctx->acc == blen)
00067         {
00068             cipher_cbc_encrypt(ctx->c, ctx->accum);
00069             ctx->acc = 0;
00070         }
00071
00072         size_t L = MIN(len, blen - ctx->acc);
00073         memcpy(ctx->accum + ctx->acc, data, L);
00074         data += L;
00075         len -= L;
00076         ctx->acc += L;
00077     }
00078 }
00079
00080 static void omac_shift_left(uint8_t *L, size_t len)
00081 {
00082     int firstbit = L[0] >> 7;
00083     size_t i;
00084
00085     for (i=0; i<len-1; ++i)
00086         L[i] = (L[i] << 1) | (L[i+1] >> 7);
00087     L[i] <<= 1;
00088
00089     if (firstbit)
00090     {
00091         if (len == 16)
00092             L[i] ^= 0x87;
00093         else if (len == 8)
00094             L[i] ^= 0x1B;
00095         else
00096             ASSERT(0);
00097     }
00098 }
00099
00100 static void omac_shift_right(uint8_t *L, size_t len)
00101 {
00102     int firstbit = L[len-1] & 1;
00103     size_t i;
00104
00105     for (i=len-1; i>0; --i)
00106         L[i] = (L[i] >> 1) | (L[i-1] << 7);
00107     L[i] >>= 1;
00108
00109     if (firstbit)
00110     {
00111         L[i] |= 0x80;
00112         if (len == 16)
00113             L[len-1] ^= 0x43;
00114         else if (len == 8)
00115             L[len-1] ^= 0x0D;
00116         else
00117             ASSERT(0);
00118     }
00119 }
00120
00121 static uint8_t *omac1_final(Mac *ctx_)
00122 {
00123     OmacContext *ctx = (OmacContext *)ctx_;
00124     size_t blen = cipher_block_len(ctx->c);
00125
00126     uint8_t L[blen];
00127     memset(L, 0, blen);
00128     cipher_ecb_encrypt(ctx->c, L);
00129
00130     omac_shift_left(L, blen);
00131     if (ctx->acc < blen)
00132     {
00133         ctx->accum[ctx->acc++] = 0x80;
00134         memset(ctx->accum + ctx->acc, 0, blen - ctx->acc);
00135         omac_shift_left(L, blen);
00136     }
00137
00138     xor_block(ctx->accum, ctx->accum, L, blen);
00139     cipher_cbc_encrypt(ctx->c, ctx->accum);
00140     return ctx->accum;
00141 }
00142
00143 static uint8_t *omac2_final(Mac *ctx_)
00144 {
00145     OmacContext *ctx = (OmacContext *)ctx_;
00146     size_t blen = cipher_block_len(ctx->c);
00147
00148     uint8_t L[blen];
00149     memset(L, 0, blen);
00150     cipher_ecb_encrypt(ctx->c, L);
00151
00152     if (ctx->acc < blen)
00153     {
00154         ctx->accum[ctx->acc++] = 0x80;
00155         memset(ctx->accum + ctx->acc, 0, blen - ctx->acc);
00156         omac_shift_right(L, blen);
00157     }
00158     else
00159         omac_shift_left(L, blen);
00160
00161     xor_block(ctx->accum, ctx->accum, L, blen);
00162     cipher_cbc_encrypt(ctx->c, ctx->accum);
00163     return ctx->accum;
00164 }
00165
00166
00167 /****************************************************************************/
00168
00169 static void omac_init(OmacContext *ctx, BlockCipher *c)
00170 {
00171     ctx->mac.set_key = omac_set_key;
00172     ctx->mac.begin = omac_begin;
00173     ctx->mac.update = omac_update;
00174     ctx->mac.key_len = cipher_key_len(c);
00175     ctx->mac.digest_len = cipher_block_len(c);
00176     ctx->c = c;
00177
00178     ASSERT(cipher_block_len(c) == 8 || cipher_block_len(c) == 16);
00179     ASSERT(sizeof(ctx->Y) >= cipher_block_len(c));
00180     ASSERT(sizeof(ctx->accum) >= cipher_block_len(c));
00181 }
00182
00183 void omac1_init(OmacContext *ctx, BlockCipher *c)
00184 {
00185     omac_init(ctx, c);
00186     ctx->mac.final = omac1_final;
00187 }
00188
00189 void omac2_init(OmacContext *ctx, BlockCipher *c)
00190 {
00191     omac_init(ctx, c);
00192     ctx->mac.final = omac2_final;
00193 }


BeRTOS: omac.h File Reference

  • sec
  • mac
omac.h File Reference

OMAC implementation. More...

#include <sec/mac.h>
#include <sec/cipher.h>

Go to the source code of this file.

Detailed Description

OMAC implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file omac.h.


BeRTOS: omac.h Source File

  • sec
  • mac
omac.h
Go to the documentation of this file.
00001
00037 #ifndef SEC_MAC_OMAC_H
00038 #define SEC_MAC_OMAC_H
00039
00040 #include <sec/mac.h>
00041 #include <sec/cipher.h>
00042
00043 typedef struct OmacContext
00044 {
00045     Mac mac;
00046     BlockCipher *c;
00047     uint8_t Y[16];
00048     uint8_t accum[16];
00049     uint8_t acc;
00050 } OmacContext;
00051
00052 void omac1_init(OmacContext *ctx, BlockCipher *c);
00053 void omac2_init(OmacContext *ctx, BlockCipher *c);
00054
00055 #define omac1_stackinit(...) \
00056     ({ OmacContext *ctx = alloca(sizeof(OmacContext)); omac1_init(ctx, ##__VA_ARGS__); &ctx->mac; })
00057 #define omac2_stackinit(...) \
00058     ({ OmacContext *ctx = alloca(sizeof(OmacContext)); omac2_init(ctx, ##__VA_ARGS__); &ctx->mac; })
00059
00060 int omac_testSetup(void);
00061 int omac_testTearDown(void);
00062 int omac_testRun(void);
00063
00064 #endif /* SEC_MAC_OMAC_H */


BeRTOS: os.h File Reference

  • cfg
Defines
os.h File Reference

OS-specific definitions. More...

#include "cfg/cfg_proc.h"
#include <signal.h>
#include "cfg/cfg_arch.h"

Go to the source code of this file.

Defines

#define | OS_HEADER(module) PP_STRINGIZE(emul/PP_CAT3(module, _, OS_ID).h)
Macro to include OS-specific headers.
#define | OS_CSOURCE(module) PP_STRINGIZE(emul/PP_CAT3(module, _, OS_ID).c)
Macro to include OS-specific source files.

Detailed Description

OS-specific definitions.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file os.h.


BeRTOS: os.h Source File

  • cfg
os.h
Go to the documentation of this file.
00001
00038 #ifndef CFG_OS_H
00039 #define CFG_OS_H
00040
00041 #include "cfg/cfg_proc.h"
00042
00043 /*
00044  * OS autodetection (Some systems trigger multiple OS definitions)
00045  */
00046 #ifdef _WIN32
00047     #define OS_WIN32  1
00048     #define OS_ID     win32
00049
00050     // FIXME: Maybe disable Win32 exceptions?
00051     typedef int cpu_flags_t;
00052     #define IRQ_DISABLE                FIXME
00053     #define IRQ_ENABLE                 FIXME
00054     #define IRQ_SAVE_DISABLE(old_sigs) FIXME
00055     #define IRQ_RESTORE(old_sigs)      FIXME
00056
00057 #else
00058     #define OS_WIN32  0
00059 #endif
00060
00061 #if defined(__unix__) || (defined(__APPLE__) && defined(__MACH__))
00062     #define OS_UNIX   1
00063     #define OS_POSIX  1  /* Not strictly UNIX, but no way to autodetect it. */
00064     #define OS_ID     posix
00065
00066     /*
00067      * The POSIX moral equivalent of disabling IRQs is disabling signals.
00068      */
00069     #include <signal.h>
00070     typedef sigset_t cpu_flags_t;
00071
00072     #define SET_ALL_SIGNALS(sigs) \
00073     do { \
00074         sigfillset(&sigs); \
00075         sigdelset(&sigs, SIGINT); \
00076         sigdelset(&sigs, SIGSTOP); \
00077         sigdelset(&sigs, SIGCONT); \
00078     } while(0)
00079
00080     #define IRQ_DISABLE \
00081     do { \
00082         sigset_t sigs; \
00083         SET_ALL_SIGNALS(sigs); \
00084         sigprocmask(SIG_BLOCK, &sigs, NULL); \
00085     } while (0)
00086
00087     #define IRQ_ENABLE \
00088     do { \
00089         sigset_t sigs; \
00090         SET_ALL_SIGNALS(sigs); \
00091         sigprocmask(SIG_UNBLOCK, &sigs, NULL); \
00092     } while (0)
00093
00094     #define IRQ_SAVE_DISABLE(old_sigs) \
00095     do { \
00096         sigset_t sigs; \
00097         SET_ALL_SIGNALS(sigs); \
00098         sigprocmask(SIG_BLOCK, &sigs, &old_sigs); \
00099     } while (0)
00100
00101     #define IRQ_RESTORE(old_sigs) \
00102     do { \
00103         sigprocmask(SIG_SETMASK, &old_sigs, NULL); \
00104     } while (0)
00105
00106     #define IRQ_ENABLED() \
00107     ({ \
00108         sigset_t sigs__; \
00109         sigprocmask(SIG_SETMASK, NULL, &sigs__); \
00110         sigismember(&sigs__, SIGALRM) ? false : true; \
00111      })
00112
00113     #if (CONFIG_KERN && CONFIG_KERN_PREEMPT)
00114         #define DECLARE_ISR_CONTEXT_SWITCH(vect)    \
00115             void vect(UNUSED_ARG(int, arg));    \
00116             INLINE void __isr_##vect(void);     \
00117             void vect(UNUSED_ARG(int, arg))     \
00118             {                   \
00119                 __isr_##vect();         \
00120                 IRQ_PREEMPT_HANDLER();      \
00121             }                   \
00122             INLINE void __isr_##vect(void)
00123
00133         #if CONFIG_KERN_PRI
00134             #define DECLARE_ISR(vect) \
00135                 DECLARE_ISR_CONTEXT_SWITCH(vect)
00136         #endif /* CONFIG_KERN_PRI */
00137     #endif
00138     #ifndef DECLARE_ISR
00139         #define DECLARE_ISR(vect) \
00140                 void vect(UNUSED_ARG(int, arg))
00141     #endif
00142     #ifndef DECLARE_ISR_CONTEXT_SWITCH
00143         #define DECLARE_ISR_CONTEXT_SWITCH(vect) \
00144                 void vect(UNUSED_ARG(int, arg))
00145     #endif
00146
00147 #else
00148     #define OS_UNIX   0
00149     #define OS_POSIX  0
00150 #endif
00151
00152 #ifdef __linux__
00153     #define OS_LINUX  1
00154 #else
00155     #define OS_LINUX  0
00156 #endif
00157
00158 #if defined(__APPLE__) && defined(__MACH__)
00159     #define OS_DARWIN 1
00160 #else
00161     #define OS_DARWIN 0
00162 #endif
00163
00164
00165 #include "cfg/cfg_arch.h" /* For ARCH_QT */
00166
00167 /*
00168  * We want Qt and other frameworks to look like OSes because you would
00169  * tipically want their portable abstractions if you're using one of these.
00170  */
00171 #if defined(_QT) || (defined(ARCH_QT) && (ARCH & ARCH_QT))
00172     #define OS_QT 1
00173     #undef  OS_ID
00174     #define OS_ID qt
00175 #else
00176     #define OS_QT 0
00177 #endif
00178
00179 /*
00180  * Summarize hosted environments as OS_HOSTED and embedded
00181  * environment with OS_EMBEDDED.
00182  */
00183 #if OS_WIN32 || OS_UNIX || OS_DARWIN || OS_QT
00184     #define OS_HOSTED   1
00185     #define OS_EMBEDDED 0
00186 #else
00187     #define OS_HOSTED   0
00188     #define OS_EMBEDDED 1
00189
00190     /* Embedded environments fall back to CPU-specific code. */
00191     #define OS_ID       CPU_ID
00192 #endif
00193
00194 /* Self-check for the detection */
00195 #if !defined(OS_ID)
00196     #error OS_ID not defined
00197 #endif
00198 #if OS_HOSTED && OS_EMBEDDED
00199     #error Both hosted and embedded OS environment
00200 #endif
00201 #if !OS_HOSTED && !OS_EMBEDDED
00202     #error Neither hosted nor embedded OS environment
00203 #endif
00204
00205 #if OS_HOSTED
00206
00208     #define OS_HEADER(module)  PP_STRINGIZE(emul/PP_CAT3(module, _, OS_ID).h)
00209
00211     #define OS_CSOURCE(module) PP_STRINGIZE(emul/PP_CAT3(module, _, OS_ID).c)
00212
00213 #else
00214     // Fallbacks for embedded systems
00215     #define OS_HEADER(module)  CPU_HEADER(module)
00216     #define OS_CSOURCE(module) CPU_CSOURCE(module)
00217 #endif
00218
00219 #endif /* CFG_OS_H */


BeRTOS: parser.c File Reference

  • mware
Functions
parser.c File Reference

Channel protocol parser and commands. More...

#include "parser.h"
#include "cfg/cfg_parser.h"
#include <io/kfile.h>
#include <struct/hashtable.h>
#include <stdlib.h>
#include <string.h>

Go to the source code of this file.

Functions

static const void * | get_key_from_command (const void *cmd, uint8_t *length)
Hashtable hook to extract the key from a command.
DECLARE_HASHTABLE_STATIC (commands, CONFIG_MAX_COMMANDS_NUMBER, get_key_from_command)
Hashtable that handles the commands that can be executed.
static bool | get_word (const char **begin, const char **end)
Tokenize one word at a time from a text.
static bool | parseArgs (const char *fmt, const char *input, parms argv[])
Command arguments parser.
const char * | parser_rl_match (UNUSED_ARG(void *, dummy), const char *word, int word_len)
Hook provided by the parser for matching of command names (TAB completion) for readline.
struct CmdTemplate * | parser_get_cmd_template (const char *input)
Find the template for the command contained in the text line.
bool | parser_get_cmd_arguments (const char *input, const struct CmdTemplate *cmdp, parms args[CONFIG_PARSER_MAX_ARGS])
Extract the arguments for the command contained in the text line.
bool | parser_process_line (const char *input)
Command input handler.
void | parser_register_cmd (const struct CmdTemplate *cmd)
Register a new command into the parser.
void | parser_init (void)
Initialize the parser module.

Detailed Description

Channel protocol parser and commands.

This file contains the channel protocol parser and the definition of the protocol commands. Commands are defined in a "CmdTemplate" type array, containing:

  • the name of the command,
  • the arguments it expects to receive,
  • the output values,
  • the name of the function implementing the command.

The arguments and results are passed to command function using an union: the element of the union to use for each argument is determined by format strings present in the CmdTemplate table.

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>
Giovanni Bajo <rasky@develer.com>

Definition in file parser.c.

Function Documentation

static bool get_word | ( | const char ** | begin,
 |  | const char ** | end
 | ) |  | [static]

Tokenize one word at a time from a text.

This function is similar to strtok, but does not use any implicit context, nor it does modify the input buffer in any form. The word is returned as a STL-like [begin,end) range.

To extract the first word, make both begin and end point at the start of the text, and call the function. Then, subsequent calls will return the following words (assuming the begin/end variable are not modified between calls).

Parameters:
begin | Will contain the index of the first character of the word
end | Will contain the index of the character after the last character of the word
Returns:
True if a word was extracted, false if we got to the end of the string without extracting any word.

Definition at line 92 of file parser.c.

static bool parseArgs | ( | const char * | fmt,
 |  | const char * | input,
 |  | parms | argv[]
 | ) |  | [static]

Command arguments parser.

Using the format pointed by the argument fmt parses the input string filling the array argv with input parameters of the correct type.

Parameters:
fmt | Parameters format string.
input | Input string.
argv | Array filled with parameters.
Returns:
False in case of errors, otherwise true.

Definition at line 123 of file parser.c.


BeRTOS: parser.c Source File

  • mware
parser.c
Go to the documentation of this file.
00001
00056 #include "parser.h"
00057
00058 #include "cfg/cfg_parser.h"
00059
00060 #include <io/kfile.h>
00061 #include <struct/hashtable.h>
00062
00063 #include <stdlib.h> // atol(), NULL
00064 #include <string.h> // strchr(), strcmp()
00065
00067 static const void* get_key_from_command(const void* cmd, uint8_t* length);
00068
00070 DECLARE_HASHTABLE_STATIC(commands, CONFIG_MAX_COMMANDS_NUMBER, get_key_from_command);
00071
00072
00092 static bool get_word(const char **begin, const char **end)
00093 {
00094     const char *cur = *end;
00095
00096     while ((*cur == ' ' || *cur == '\t') && *cur)
00097         ++cur;
00098
00099     *begin = cur;
00100
00101     while ((*cur != ' ' && *cur != '\t') && *cur)
00102         ++cur;
00103
00104     *end = cur;
00105
00106     return (*end != *begin);
00107 }
00108
00109
00123 static bool parseArgs(const char *fmt, const char *input, parms argv[])
00124 {
00125     const char *begin = input, *end = input;
00126
00127     while (*fmt)
00128     {
00129         // Extract the argument
00130         if (!get_word(&begin, &end))
00131             return false;
00132
00133         switch (*fmt)
00134         {
00135             case 'd':
00136                 (*argv++).l = atol(begin);
00137                 break;
00138
00139             case 's':
00140                 (*argv++).s = begin;
00141                 break;
00142
00143             default:
00144                 ASSERT2(0, "Unknown format for argument");
00145                 return false;
00146         }
00147
00148         ++fmt;
00149     }
00150
00151     /* check if there are remaining args */
00152     if (get_word(&begin, &end))
00153         return false;
00154
00155     return true;
00156 }
00157
00159 const char* parser_rl_match(UNUSED_ARG(void *,dummy), const char *word, int word_len)
00160 {
00161     HashIterator cur;
00162     HashIterator end = ht_iter_end(&commands);
00163     const char *found = NULL;
00164
00165     for (cur = ht_iter_begin(&commands);
00166          !ht_iter_cmp(cur, end);
00167          cur = ht_iter_next(cur))
00168     {
00169         const struct CmdTemplate* cmdp = (const struct CmdTemplate*)ht_iter_get(cur);
00170         if (strncmp(cmdp->name, word, word_len) == 0)
00171         {
00172             // If there was another matching word, it means that we have a multiple
00173             //  match: then return NULL.
00174             if (found)
00175                 return NULL;
00176
00177             found = cmdp->name;
00178         }
00179     }
00180
00181     return found;
00182 }
00183
00184 #if CONFIG_ENABLE_COMPAT_BEHAVIOUR
00185 bool parser_get_cmd_id(const char* line, unsigned long* ID)
00186 {
00187     const char *begin = line, *end = line;
00188     char *end2;
00189
00190     // The first word is the ID
00191     if (!get_word(&begin, &end))
00192         return false;
00193
00194     *ID = strtoul(begin, &end2, 10);
00195     if (end2 != end)
00196         return false;
00197
00198     return true;
00199 }
00200 #endif
00201
00216 const struct CmdTemplate* parser_get_cmd_template(const char *input)
00217 {
00218     const char *begin = input, *end = input;
00219
00220 #if CONFIG_ENABLE_COMPAT_BEHAVIOUR
00221     // Skip the ID, and get the command
00222     if (!get_word(&begin, &end))
00223         return NULL;
00224 #endif
00225     if (!get_word(&begin, &end))
00226         return NULL;
00227
00228     return (const struct CmdTemplate*)ht_find(&commands, begin, end-begin);
00229 }
00230
00231 static const char *skip_to_params(const char *input, const struct CmdTemplate *cmdp)
00232 {
00233     const char *begin = input, *end = input;
00234
00235 #if CONFIG_ENABLE_COMPAT_BEHAVIOUR
00236     // Skip the ID, and get the command
00237     if (!get_word(&begin, &end))
00238         return NULL;
00239 #endif
00240     if (!get_word(&begin, &end))
00241         return NULL;
00242
00243     ASSERT2(strlen(cmdp->name) == (size_t)(end-begin), "Invalid command template specified");
00244     ASSERT2(!strncmp(begin, cmdp->name, end-begin), "Invalid command template specified");
00245
00246     return end;
00247 }
00248
00261 bool parser_get_cmd_arguments(const char* input, const struct CmdTemplate* cmdp, parms args[CONFIG_PARSER_MAX_ARGS])
00262 {
00263     input = skip_to_params(input, cmdp);
00264     if (!input)
00265         return false;
00266
00267     args[0].s = cmdp->name;
00268     if (!parseArgs(cmdp->arg_fmt, input, args + 1))
00269         return false;
00270
00271     return true;
00272 }
00273
00274 static const void* get_key_from_command(const void* cmd, uint8_t* length)
00275 {
00276     const struct CmdTemplate* c = cmd;
00277     *length = strlen(c->name);
00278     return c->name;
00279 }
00280
00290 bool parser_process_line(const char* input)
00291 {
00292     const struct CmdTemplate *cmdp;
00293     parms args[CONFIG_PARSER_MAX_ARGS];
00294
00295     cmdp = parser_get_cmd_template(input);
00296     if (!cmdp)
00297         return false;
00298
00299     if (!parser_get_cmd_arguments(input, cmdp, args))
00300         return false;
00301
00302     if (!parser_execute_cmd(cmdp, args))
00303         return false;
00304
00305     return true;
00306 }
00307
00313 void parser_register_cmd(const struct CmdTemplate* cmd)
00314 {
00315     ht_insert(&commands, cmd);
00316 }
00317
00318 void parser_init(void)
00319 {
00320     // Initialize the hashtable used to store the command description
00321     ht_init(&commands);
00322 }


BeRTOS: parser.h File Reference

  • mware
Data Structures | Defines | Typedefs | Enumerations | Functions
parser.h File Reference
#include "cfg/cfg_parser.h"
#include <cpu/types.h>

Go to the source code of this file.

Data Structures

union | parms
union that contains parameters passed to and from commands More...
struct | CmdTemplate
Define a command that can be tokenized by the parser. More...

Defines

#define | REGISTER_CMD(NAME) REGISTER_FUNCTION(&cmd_ ## NAME ## _template)
Utility function to register a command.
#define | MAKE_TEMPLATE(NAME, ARGS, RES, FLAGS)
Utility macro to create a command template.
#define | MAKE_CMD(NAME, ARGS, RES, BODY, FLAGS)
Utility macro to create command templates and callback functions.

Typedefs

typedef ResultCode(* | CmdFuncPtr )(parms args_results[])
pointer to commands

Enumerations

enum | ResultCode { RC_ERROR = -1, RC_OK = 0, RC_REPLY = 1, RC_SKIP = 2 }
Error generated by the commands through the return code. More...

Functions

void | parser_init (void)
Initialize the parser module.
void | parser_register_cmd (const struct CmdTemplate *cmd)
Register a new command into the parser.
const char * | parser_rl_match (void *dummy, const char *word, int word_len)
Hook for readline to provide completion support for the commands registered in the parser.
bool | parser_process_line (const char *line)
Command input handler.
bool | parser_execute_cmd (const struct CmdTemplate *templ, parms args[CONFIG_PARSER_MAX_ARGS])
Execute a command with its arguments, and fetch its results.
struct CmdTemplate * | parser_get_cmd_template (const char *line)
Find the template for the command contained in the text line.
bool | parser_get_cmd_arguments (const char *line, const struct CmdTemplate *templ, parms args[CONFIG_PARSER_MAX_ARGS])
Extract the arguments for the command contained in the text line.

Detailed Description

Definition in file parser.h.


BeRTOS: parser.h Source File

  • mware
parser.h
Go to the documentation of this file.
00001
00115 #ifndef MWARE_PARSER_H
00116 #define MWARE_PARSER_H
00117
00118 #include "cfg/cfg_parser.h"
00119
00120 #include <cpu/types.h>
00121
00125 typedef enum
00126 {
00127     RC_ERROR  = -1,
00128     RC_OK     = 0,
00129     RC_REPLY  = 1,
00130     RC_SKIP   = 2
00131 } ResultCode;
00132
00134 typedef union { long l; const char *s; } parms;
00136 typedef ResultCode (*CmdFuncPtr)(parms args_results[]);
00137
00150 struct CmdTemplate
00151 {
00152     const char *name;
00153     const char *arg_fmt;
00154     const char *result_fmt;
00155     CmdFuncPtr func;
00156     uint16_t   flags;
00157 };
00158
00159 #define REGISTER_FUNCTION parser_register_cmd
00160
00166 #define REGISTER_CMD(NAME) REGISTER_FUNCTION(&cmd_ ## NAME ## _template)
00167
00178 #define MAKE_TEMPLATE(NAME, ARGS, RES, FLAGS)          \
00179 const struct CmdTemplate cmd_ ## NAME ## _template =   \
00180 {                                                      \
00181     #NAME, ARGS, RES, cmd_ ## NAME, FLAGS          \
00182 };
00183
00208 #define MAKE_CMD(NAME, ARGS, RES, BODY, FLAGS)  \
00209 static ResultCode cmd_ ## NAME (parms *args)    \
00210 {                                               \
00211     return (ResultCode)BODY;                \
00212 }                                               \
00213 MAKE_TEMPLATE(NAME, ARGS, RES, FLAGS)
00214
00220 void parser_init(void);
00221
00222 void parser_register_cmd(const struct CmdTemplate* cmd);
00223
00224
00232 const char* parser_rl_match(void* dummy, const char* word, int word_len);
00233
00234 bool parser_process_line(const char* line);
00235
00247 INLINE bool parser_execute_cmd(const struct CmdTemplate* templ, parms args[CONFIG_PARSER_MAX_ARGS])
00248 {
00249     return (templ->func(args) == 0);
00250 }
00251
00252 const struct CmdTemplate* parser_get_cmd_template(const char* line);
00253
00254 bool parser_get_cmd_arguments(const char* line, const struct CmdTemplate* templ, parms args[CONFIG_PARSER_MAX_ARGS]);
00255
00256 #if CONFIG_ENABLE_COMPAT_BEHAVIOUR
00257
00266 bool parser_get_cmd_id(const char* line, unsigned long* ID);
00267 #endif
00268
00269  // defgroup parser
00271 #endif /* MWARE_PARSER_H */
00272


BeRTOS: pbkdf1.c File Reference

  • sec
  • kdf
pbkdf1.c File Reference

PBKDF1 implementation. More...

#include "pbkdf1.h"
#include <sec/hash.h>
#include <sec/util.h>

Go to the source code of this file.

Detailed Description

PBKDF1 implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file pbkdf1.c.


BeRTOS: pbkdf1.c Source File

  • sec
  • kdf
pbkdf1.c
Go to the documentation of this file.
00001
00038 #include "pbkdf1.h"
00039 #include <sec/hash.h>
00040 #include <sec/util.h>
00041
00042
00043 static void PBKDF1_begin(Kdf *ctx_, const char *pwd, size_t pwd_len,
00044                          const uint8_t *salt, size_t salt_len)
00045 {
00046     PBKDF1_Context *ctx = (PBKDF1_Context *)ctx_;
00047
00048     hash_begin(ctx->hash);
00049     hash_update(ctx->hash, pwd, pwd_len);
00050     hash_update(ctx->hash, salt, salt_len);
00051
00052     ctx->kdf.to_read = 0;
00053     ctx->kdf.block = NULL;
00054 }
00055
00056 static void PBKDF1_next(Kdf *ctx_)
00057 {
00058     PBKDF1_Context *ctx = (PBKDF1_Context *)ctx_;
00059
00060     // PBKDF1 will generate only one block of data (whose len depends
00061     // on the underlying hash function). After that, the generation stops
00062     // with an ASSERT. If you use PKBDF1, you are supposed to be aware
00063     // of this limit while designing your algorithm.
00064     ASSERT(ctx->kdf.block == NULL);
00065
00066     int hlen = hash_digest_len(ctx->hash);
00067     uint8_t temp[hlen];
00068     uint8_t *final = hash_final(ctx->hash);
00069
00070     for (uint32_t i=0; i<ctx->iterations-1; i++)
00071     {
00072         memcpy(temp, final, hlen);
00073         hash_begin(ctx->hash);
00074         hash_update(ctx->hash, temp, hlen);
00075         final = hash_final(ctx->hash);
00076     }
00077
00078     PURGE(temp);
00079
00080     ctx->kdf.to_read = ctx->kdf.block_len;
00081     ctx->kdf.block = final;
00082 }
00083
00084 /**********************************************************************/
00085
00086 // Default iteration count. The RFC does not specify a "good" default
00087 // value; it just says that this should be a high value to slow down
00088 // computations. Since slowing down is not much of a concern for an
00089 // embedded system, we settle for a value which is not too big.
00090 #define PBKDF1_DEFAULT_ITERATIONS      100
00091
00092
00093 void PBKDF1_init(PBKDF1_Context *ctx, Hash *h)
00094 {
00095     ctx->hash = h;
00096     ctx->iterations = PBKDF1_DEFAULT_ITERATIONS;
00097     ctx->kdf.begin = PBKDF1_begin;
00098     ctx->kdf.next = PBKDF1_next;
00099     ctx->kdf.block_len = hash_digest_len(h);
00100 }
00101
00102 void PBKDF1_set_iterations(Kdf *ctx_, uint32_t iterations)
00103 {
00104     PBKDF1_Context *ctx = (PBKDF1_Context *)ctx_;
00105     ctx->iterations = iterations;
00106 }


BeRTOS: pbkdf1.h File Reference

  • sec
  • kdf
pbkdf1.h File Reference

PBKDF1 implementation. More...

#include <sec/kdf.h>
#include <sec/hash.h>

Go to the source code of this file.

Detailed Description

PBKDF1 implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file pbkdf1.h.


BeRTOS: pbkdf1.h Source File

  • sec
  • kdf
pbkdf1.h
Go to the documentation of this file.
00001
00038 #ifndef SEC_KDF_PBKDF1_H
00039 #define SEC_KDF_PBKDF1_H
00040
00041 #include <sec/kdf.h>
00042 #include <sec/hash.h>
00043
00044 typedef struct
00045 {
00046     Kdf kdf;
00047     Hash *hash;
00048     uint32_t iterations;
00049 } PBKDF1_Context;
00050
00051 void PBKDF1_init(PBKDF1_Context *ctx, Hash *h);
00052 void PBKDF1_set_iterations(Kdf *kdf, uint32_t iterations);
00053
00054 #define PBKDF1_stackinit(...) \
00055     ({ PBKDF1_Context *ctx = alloca(sizeof(PBKDF1_Context)); PBKDF1_init(ctx , ##__VA_ARGS__); &ctx->kdf; })
00056
00057 int PBKDF1_testSetup(void);
00058 int PBKDF1_testRun(void);
00059 int PBKDF1_testTearDown(void);
00060
00061 #endif /* SEC_KDF_PBKDF1_H */


BeRTOS: pbkdf2.c File Reference

  • sec
  • kdf
pbkdf2.c File Reference

PBKDF2 implementation. More...

#include "pbkdf2.h"
#include <cpu/byteorder.h>
#include <sec/util.h>
#include <cfg/debug.h>

Go to the source code of this file.

Detailed Description

PBKDF2 implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file pbkdf2.c.


BeRTOS: pbkdf2.c Source File

  • sec
  • kdf
pbkdf2.c
Go to the documentation of this file.
00001
00038 #include "pbkdf2.h"
00039 #include <cpu/byteorder.h>
00040 #include <sec/util.h>
00041 #include <cfg/debug.h>
00042
00043 static void PBKDF2_begin(Kdf *ctx_, const char *pwd, size_t pwd_len,
00044                          const uint8_t *salt, size_t salt_len)
00045 {
00046     PBKDF2_Context *ctx = (PBKDF2_Context*)ctx_;
00047
00048     ASSERT(sizeof(ctx->salt) >= salt_len);
00049
00050     mac_set_key(ctx->mac, (const uint8_t*)pwd, pwd_len);
00051     ctx->salt_len = salt_len;
00052     memcpy(ctx->salt, salt, salt_len);
00053     ctx->c = 0;
00054     ctx->kdf.to_read = 0;
00055     ctx->kdf.block = NULL;
00056 }
00057
00058 static void PBKDF2_next(Kdf *ctx_)
00059 {
00060     PBKDF2_Context *ctx = (PBKDF2_Context*)ctx_;
00061     int dlen = mac_digest_len(ctx->mac);
00062     uint8_t last[dlen];
00063
00064     ++ctx->c;
00065     uint32_t bec = cpu_to_be32(ctx->c);
00066
00067     mac_begin(ctx->mac);
00068     mac_update(ctx->mac, ctx->salt, ctx->salt_len);
00069     mac_update(ctx->mac, &bec, 4);
00070     memcpy(last, mac_final(ctx->mac), dlen);
00071     memcpy(ctx->block, last, dlen);
00072
00073     for (uint32_t i=0; i<ctx->iterations-1; ++i)
00074     {
00075         mac_begin(ctx->mac);
00076         mac_update(ctx->mac, last, dlen);
00077         memcpy(last, mac_final(ctx->mac), dlen);
00078         xor_block(ctx->block, ctx->block, last, dlen);
00079     }
00080
00081     ctx->kdf.to_read = dlen;
00082     ctx->kdf.block = ctx->block;
00083
00084     PURGE(last);
00085 }
00086
00087
00088 /**********************************************************************/
00089
00090 // Default iteration count. The RFC does not specify a "good" default
00091 // value; it just says that this should be a high value to slow down
00092 // computations. Since slowing down is not much of a concern for an
00093 // embedded system, we settle for a value which is not too big.
00094 #define PBKDF2_DEFAULT_ITERATIONS      100
00095
00096
00097 void PBKDF2_init(PBKDF2_Context *ctx, Mac *mac)
00098 {
00099     ctx->salt_len = 0;
00100     ctx->mac = mac;
00101     ctx->iterations = PBKDF2_DEFAULT_ITERATIONS;
00102     ctx->kdf.begin = PBKDF2_begin;
00103     ctx->kdf.next = PBKDF2_next;
00104     ctx->kdf.block_len = mac_digest_len(mac);
00105     ASSERT(ctx->kdf.block_len <= sizeof(ctx->block));
00106 }
00107
00108 void PBKDF2_set_iterations(Kdf *ctx_, uint32_t iterations)
00109 {
00110     PBKDF2_Context *ctx = (PBKDF2_Context*)ctx_;
00111     ctx->iterations = iterations;
00112 }
00113


BeRTOS: pbkdf2.h File Reference

  • sec
  • kdf
pbkdf2.h File Reference

PBKDF2 implementation. More...

#include <sec/kdf.h>
#include <sec/mac.h>

Go to the source code of this file.

Detailed Description

PBKDF2 implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file pbkdf2.h.


BeRTOS: pbkdf2.h Source File

  • sec
  • kdf
pbkdf2.h
Go to the documentation of this file.
00001
00038 #ifndef SEC_KDF_PBKDF2_H
00039 #define SEC_KDF_PBKDF2_H
00040
00041 #include <sec/kdf.h>
00042 #include <sec/mac.h>
00043
00044 typedef struct
00045 {
00046     Kdf kdf;
00047     Mac *mac;
00048     uint8_t block[20];
00049     uint32_t c;
00050     uint32_t iterations;
00051     uint8_t salt_len;
00052     uint8_t salt[48];
00053 } PBKDF2_Context;
00054
00055 void PBKDF2_init(PBKDF2_Context *ctx, Mac *mac);
00056 void PBKDF2_set_iterations(Kdf *kdf, uint32_t iterations);
00057
00058 #define PBKDF2_stackinit(...) \
00059     ({ PBKDF2_Context *ctx = alloca(sizeof(PBKDF2_Context)); PBKDF2_init(ctx , ##__VA_ARGS__); &ctx->kdf; })
00060
00061 int PBKDF2_testSetup(void);
00062 int PBKDF2_testRun(void);
00063 int PBKDF2_testTearDown(void);
00064
00065 #endif /* SEC_KDF_PBKDF2_H */


BeRTOS: pcf8574.c File Reference

  • drv
Functions
pcf8574.c File Reference

PCF8574 i2c port expander driver. More...

#include "pcf8574.h"
#include "cfg/cfg_i2c.h"
#include <cfg/module.h>
#include <drv/i2c.h>

Go to the source code of this file.

Functions

int | pcf8574_get_2 (I2c *i2c, Pcf8574 *pcf)
Read PCF8574 pcf bit status.
bool | pcf8574_put_3 (I2c *i2c, Pcf8574 *pcf, uint8_t data)
Write to PCF8574 pcf port data.
bool | pcf8574_init_3 (I2c *i2c, Pcf8574 *pcf, pcf8574_addr addr)
Init a PCF8574 on the bus with addr addr.

Detailed Description

PCF8574 i2c port expander driver.

This driver controls the PCF8574. The PCF8574 is an 8bit i2c port expander. You can read/write 8 pins through an i2c bus. The pins are quasi-bidirectionals, this mean that without the need of a direction register you can use each pin as input or output, see datasheet on how this is achieved.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file pcf8574.c.

Function Documentation

int pcf8574_get_2 | ( | I2c * | i2c,
 |  | Pcf8574 * | pcf
 | ) |  |

Read PCF8574 pcf bit status.

Returns:
the pins status or EOF on errors.

Definition at line 58 of file pcf8574.c.

bool pcf8574_init_3 | ( | I2c * | i2c,
 |  | Pcf8574 * | pcf,
 |  | pcf8574_addr | addr
 | ) |  |

Init a PCF8574 on the bus with addr addr.

Returns:
true if device is found, false otherwise.

Definition at line 89 of file pcf8574.c.

bool pcf8574_put_3 | ( | I2c * | i2c,
 |  | Pcf8574 * | pcf,
 |  | uint8_t | data
 | ) |  |

Write to PCF8574 pcf port data.

Returns:
true if ok, false on errors.

Definition at line 74 of file pcf8574.c.


BeRTOS: pcf8574.c Source File

  • drv
pcf8574.c
Go to the documentation of this file.
00001
00046 #include "pcf8574.h"
00047
00048 #include "cfg/cfg_i2c.h"
00049
00050 #include <cfg/module.h>
00051
00052 #include <drv/i2c.h>
00053
00058 int pcf8574_get_2(I2c *i2c, Pcf8574 *pcf)
00059 {
00060     i2c_start_r(i2c, PCF8574ID | ((pcf->addr << 1) & 0xF7), 1, I2C_STOP);
00061
00062     int data = i2c_getc(i2c);
00063
00064     if (i2c_error(i2c))
00065         data = EOF;
00066
00067     return data;
00068 }
00069
00074 bool pcf8574_put_3(I2c *i2c, Pcf8574 *pcf, uint8_t data)
00075 {
00076     i2c_start_w(i2c, PCF8574ID | ((pcf->addr << 1) & 0xF7), 1, I2C_STOP);
00077     i2c_putc(i2c, data);
00078
00079     if (i2c_error(i2c))
00080         return false;
00081
00082     return true;
00083 }
00084
00089 bool pcf8574_init_3(I2c *i2c, Pcf8574 *pcf, pcf8574_addr addr)
00090 {
00091     ASSERT(i2c);
00092     pcf->addr = addr;
00093
00094     return (pcf8574_get(i2c, pcf) != EOF);
00095 }
00096


BeRTOS: pcf8574.h File Reference

  • drv
Data Structures | Defines | Functions
pcf8574.h File Reference

PCF8574 i2c port expander driver. More...

#include "cfg/cfg_i2c.h"
#include <cfg/compiler.h>
#include <drv/i2c.h>

Go to the source code of this file.

Data Structures

struct | Pcf8574
Context for accessing a PCF8574. More...

Defines

#define | PCF8574ID 0x40
I2C address.

Functions

int | pcf8574_get_2 (I2c *i2c, Pcf8574 *pcf)
Read PCF8574 pcf bit status.
bool | pcf8574_put_3 (I2c *i2c, Pcf8574 *pcf, uint8_t data)
Write to PCF8574 pcf port data.
bool | pcf8574_init_3 (I2c *i2c, Pcf8574 *pcf, pcf8574_addr addr)
Init a PCF8574 on the bus with addr addr.

Detailed Description

PCF8574 i2c port expander driver.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file pcf8574.h.

Function Documentation

int pcf8574_get_2 | ( | I2c * | i2c,
 |  | Pcf8574 * | pcf
 | ) |  |

Read PCF8574 pcf bit status.

Returns:
the pins status or EOF on errors.

Definition at line 58 of file pcf8574.c.

bool pcf8574_init_3 | ( | I2c * | i2c,
 |  | Pcf8574 * | pcf,
 |  | pcf8574_addr | addr
 | ) |  |

Init a PCF8574 on the bus with addr addr.

Returns:
true if device is found, false otherwise.

Definition at line 89 of file pcf8574.c.

bool pcf8574_put_3 | ( | I2c * | i2c,
 |  | Pcf8574 * | pcf,
 |  | uint8_t | data
 | ) |  |

Write to PCF8574 pcf port data.

Returns:
true if ok, false on errors.

Definition at line 74 of file pcf8574.c.


BeRTOS: pcf8574.h Source File

  • drv
pcf8574.h
Go to the documentation of this file.
00001
00041 #ifndef DRV_PCF8574_H
00042 #define DRV_PCF8574_H
00043
00044 #include "cfg/cfg_i2c.h"
00045
00046 #include <cfg/compiler.h>
00047
00048 #include <drv/i2c.h>
00049
00050 #if COMPILER_C99
00051     #define pcf8574_init(...)       PP_CAT(pcf8574_init ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__)
00052     #define pcf8574_get(...)        PP_CAT(pcf8574_get ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__)
00053     #define pcf8574_put(...)        PP_CAT(pcf8574_put ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__)
00054 #else
00055     #define pcf8574_init(args...)   PP_CAT(pcf8574_init ## _, COUNT_PARMS(args)) (args)
00056     #define pcf8574_get(args...)    PP_CAT(pcf8574_get ## _, COUNT_PARMS(args)) (args)
00057     #define pcf8574_put(args...)    PP_CAT(pcf8574_put ## _, COUNT_PARMS(args)) (args)
00058 #endif
00059
00060 typedef uint8_t pcf8574_addr;
00061
00065 typedef struct Pcf8574
00066 {
00067     pcf8574_addr addr;
00068 } Pcf8574;
00069
00070 #define PCF8574ID 0x40 ///< I2C address
00071
00076 int pcf8574_get_2(I2c *i2c, Pcf8574 *pcf);
00077
00082 bool pcf8574_put_3(I2c *i2c, Pcf8574 *pcf, uint8_t data);
00083
00088 bool pcf8574_init_3(I2c *i2c, Pcf8574 *pcf, pcf8574_addr addr);
00089
00090 #if !CONFIG_I2C_DISABLE_OLD_API
00091
00092 DEPRECATED INLINE int pcf8574_get_1(Pcf8574 *pcf)
00093 {
00094     return pcf8574_get_2(&local_i2c_old_api, pcf);
00095 }
00096
00097 DEPRECATED INLINE bool pcf8574_put_2(Pcf8574 *pcf, uint8_t data)
00098 {
00099     return pcf8574_put_3(&local_i2c_old_api, pcf, data);
00100 }
00101
00102 DEPRECATED INLINE bool pcf8574_init_2(Pcf8574 *pcf, pcf8574_addr addr)
00103 {
00104     return pcf8574_init_3(&local_i2c_old_api, pcf, addr);
00105 }
00106 #endif /* !CONFIG_I2C_DISABLE_OLD_API */
00107
00108 #endif /* DRV_PCF8574_H */


BeRTOS: phase.c File Reference

  • drv
Functions | Variables
phase.c File Reference

Phase control driver (implementation) More...

#include "hw/hw_phase.h"
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <cpu/irq.h>
#include <cpu/types.h>
#include <drv/timer.h>
#include <drv/phase.h>
#include <math.h>

Go to the source code of this file.

Functions

DEFINE_ZEROCROSS_ISR ()
Zerocross interrupt, call when 220V cross zero.
void | phase_setDuty (TriacDev dev, triac_duty_t duty)
Set duty of the triac channel dev (interrupt safe).
void | phase_setDutyUnlock (TriacDev dev, triac_duty_t duty)
Set duty of the triac channel dev (NOT INTERRUPT SAFE).
void | phase_setPower (TriacDev dev, triac_power_t power)
Set power of the triac channel dev (interrupt safe).
static void | phase_softint (void *_dev)
Soft int for each _dev triac.
void | phase_init (void)
Initialize phase control driver.

Variables

static Triac | triacs [TRIAC_CNT]
Array of triacs.

Detailed Description

Phase control driver (implementation)

Author:
Francesco Sacchi <batt@develer.com>

Definition in file phase.c.

Function Documentation

DEFINE_ZEROCROSS_ISR ( )

Zerocross interrupt, call when 220V cross zero.

This function turn off all triacs that have duty < 100% and arm the triac timers for phase control. This function is frequency adaptive so can work both at 50 or 60Hz.

Definition at line 64 of file phase.c.

void phase_setPower | ( | TriacDev | dev,
 |  | triac_power_t | power
 | ) |  |

Set power of the triac channel dev (interrupt safe).

This function approsimate the sine wave to a triangular wave to compute RMS power.

Definition at line 128 of file phase.c.

static void phase_softint ( void * _dev ) [static]

Soft int for each _dev triac.

The triacs are turned on at different time to achieve phase control.

Definition at line 155 of file phase.c.


BeRTOS: phase.c Source File

  • drv
phase.c
Go to the documentation of this file.
00001
00039 #include "hw/hw_phase.h"
00040
00041 #include <cfg/macros.h>
00042 #include <cfg/compiler.h>
00043
00044 #include <cpu/irq.h>
00045 #include <cpu/types.h>
00046
00047 #include <drv/timer.h>
00048 #include <drv/phase.h>
00049
00050 #include <math.h>
00051
00053 static Triac triacs[TRIAC_CNT];
00054
00055 DB(bool phase_initialized;)
00056
00064 DEFINE_ZEROCROSS_ISR()
00065 {
00066     ticks_t period, now;
00067     static ticks_t prev_time;
00068     TriacDev dev;
00069
00070     now = timer_clock_unlocked();
00071     period = now - prev_time;
00072
00073     for (dev = 0; dev < TRIAC_CNT; dev++)
00074     {
00075         /* Only turn off triac if duty is != 100% */
00076         if (triacs[dev].duty != CONFIG_TRIAC_MAX_DUTY)
00077             TRIAC_OFF(dev);
00078         /* Compute delay from duty */
00079         timer_setDelay(&triacs[dev].timer, DIV_ROUND(period * (CONFIG_TRIAC_MAX_DUTY - triacs[dev].duty), CONFIG_TRIAC_MAX_DUTY));
00080
00081         /* This check avoids inserting the same timer twice
00082          * in case of an intempestive zerocross or spike */
00083         if (triacs[dev].running)
00084         {
00085             timer_abort(&triacs[dev].timer);
00086             //kprintf("[%lu]\n", timer_clock());
00087         }
00088
00089         triacs[dev].running = true;
00090         timer_add(&triacs[dev].timer);
00091     }
00092     prev_time = now;
00093 }
00094
00095
00096
00100 void phase_setDuty(TriacDev dev, triac_duty_t duty)
00101 {
00102     cpu_flags_t flags;
00103     IRQ_SAVE_DISABLE(flags);
00104
00105     phase_setDutyUnlock(dev,duty);
00106
00107     IRQ_RESTORE(flags);
00108 }
00109
00110
00111
00115 void phase_setDutyUnlock(TriacDev dev, triac_duty_t duty)
00116 {
00117     triacs[dev].duty = MIN(duty, (triac_duty_t)CONFIG_TRIAC_MAX_DUTY);
00118 }
00119
00120
00121
00128 void phase_setPower(TriacDev dev, triac_power_t power)
00129 {
00130     bool greater_fifty = false;
00131     triac_duty_t duty;
00132
00133     power = MIN(power, (triac_power_t)CONFIG_TRIAC_MAX_POWER);
00134
00135     if (power > CONFIG_TRIAC_MAX_POWER / 2)
00136     {
00137         greater_fifty = true;
00138         power = CONFIG_TRIAC_MAX_POWER - power;
00139     }
00140
00141     duty = TRIAC_POWER_K * sqrt(power);
00142
00143     if (greater_fifty)
00144         duty = CONFIG_TRIAC_MAX_DUTY - duty;
00145     phase_setDuty(dev, duty);
00146 }
00147
00148
00149
00155 static void phase_softint(void *_dev)
00156 {
00157     TriacDev dev = (TriacDev)_dev;
00158
00159     /* Only turn on if duty is !=0 */
00160     if (triacs[dev].duty)
00161         TRIAC_ON(dev);
00162     triacs[dev].running = false;
00163 }
00164
00165
00166
00170 void phase_init(void)
00171 {
00172     cpu_flags_t flags;
00173     TriacDev dev;
00174
00175     /* Init timers and ensure that all triac are off */
00176     for (dev = 0; dev < TRIAC_CNT; dev++)
00177     {
00178         triacs[dev].duty = 0;
00179         triacs[dev].running = false;
00180         SET_TRIAC_DDR(dev);
00181         TRIAC_OFF(dev);
00182         timer_setSoftint(&triacs[dev].timer, (Hook)phase_softint, (void *)dev);
00183     }
00184     IRQ_SAVE_DISABLE(flags);
00185
00186     /* Init zero cross interrupt */
00187     PHASE_HW_INIT;
00188     DB(phase_initialized = true;)
00189     IRQ_RESTORE(flags);
00190 }
00191


BeRTOS: phase.h File Reference

  • drv
Functions
phase.h File Reference

Phase partialization driver with TRIACs. More...

#include "hw/phase_map.h"
#include "cfg/cfg_phase.h"
#include <drv/timer.h>

Go to the source code of this file.

Typedefs

Types for duty and power.
typedef uint16_t | triac_duty_t
typedef uint16_t | triac_power_t

Functions

void | phase_setDutyUnlock (TriacDev dev, triac_duty_t duty)
Set duty of the triac channel dev (NOT INTERRUPT SAFE).
void | phase_setDuty (TriacDev dev, triac_duty_t duty)
Set duty of the triac channel dev (interrupt safe).
void | phase_setPower (TriacDev dev, triac_power_t power)
Set power of the triac channel dev (interrupt safe).
void | phase_init (void)
Initialize phase control driver.

Detailed Description

Phase partialization driver with TRIACs.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file phase.h.

Function Documentation

void phase_setPower | ( | TriacDev | dev,
 |  | triac_power_t | power
 | ) |  |

Set power of the triac channel dev (interrupt safe).

This function approsimate the sine wave to a triangular wave to compute RMS power.

Definition at line 128 of file phase.c.


BeRTOS: phase.h Source File

  • drv
phase.h
Go to the documentation of this file.
00001
00043 #ifndef DRV_PHASE_H
00044 #define DRV_PHASE_H
00045
00046 #include "hw/phase_map.h"
00047
00048 #include "cfg/cfg_phase.h"
00049
00050 #include <drv/timer.h>
00051
00052 #define TRIAC_POWER_K   CONFIG_TRIAC_MAX_DUTY * (1 / sqrt(2 * CONFIG_TRIAC_MAX_POWER))
00053
00058 typedef uint16_t triac_duty_t;
00059 typedef uint16_t triac_power_t;
00060 /* \} */
00061
00062
00063 DB(extern bool phase_initialized;)
00064
00069 typedef struct Triac
00070 {
00071     Timer  timer;
00072     triac_duty_t duty;
00073     bool   running;
00074 } Triac;
00075 /* \} */
00076
00077 void phase_setDutyUnlock(TriacDev dev, triac_duty_t duty);
00078 void phase_setDuty(TriacDev dev, triac_duty_t duty);
00079 void phase_setPower(TriacDev dev, triac_power_t power);
00080
00081 void phase_init(void);
00082
00083
00084 #endif /* DRV_PHASE_H */


BeRTOS: phase_map.h File Reference

  • hw
phase_map.h File Reference

Triac map definitions. More...

Go to the source code of this file.

Enumerations

Enum for triac devices.
enum TriacDev

Detailed Description

Triac map definitions.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file phase_map.h.


BeRTOS: phase_map.h Source File

  • hw
phase_map.h
Go to the documentation of this file.
00001
00039 #ifndef PHASE_MAP_H
00040 #define PHASE_MAP_H
00041
00042 #warning TODO:This is an example implentation, you must implement it!
00043
00047 typedef enum TriacDev
00048 {
00049     TRIAC_TEST,
00050
00051     /* Put here other triac device */
00052
00053     TRIAC_CNT
00054 } TriacDev;
00055 /* \} */
00056
00057 #endif /* PHASE_MAP_H */


BeRTOS: pid_control.c File Reference

  • algo
Functions
pid_control.c File Reference

Proportional, integral, derivative controller (PID controller) (implementation) More...

#include "pid_control.h"
#include "cfg/cfg_pid.h"
#include <cfg/log.h>
#include <cfg/debug.h>

Go to the source code of this file.

Functions

piddata_t | pid_control_update (PidContext *pid_ctx, piddata_t target, piddata_t curr_pos)
Compute next value for reaching target point.
void | pid_control_init (PidContext *pid_ctx, const PidCfg *pid_cfg)
Init PID control.

Detailed Description

Proportional, integral, derivative controller (PID controller) (implementation)

Author:
Daniele Basile <asterix@develer.com>

Definition in file pid_control.c.


BeRTOS: pid_control.c Source File

  • algo
pid_control.c
Go to the documentation of this file.
00001
00039 #include "pid_control.h"
00040
00041 #include "cfg/cfg_pid.h"
00042
00043 // Define logging setting (for cfg/log.h module).
00044 #define LOG_LEVEL         PID_LOG_LEVEL
00045 #define LOG_VERBOSITY     PID_LOG_FORMAT
00046
00047 #include <cfg/log.h>
00048 #include <cfg/debug.h>
00049
00053 piddata_t pid_control_update(PidContext *pid_ctx, piddata_t target, piddata_t curr_pos)
00054 {
00055     piddata_t P;
00056     piddata_t I;
00057     piddata_t D;
00058     piddata_t err;
00059
00060     //Compute current error.
00061     err = target - curr_pos;
00062
00063     /*
00064      * Compute Proportional contribute
00065      */
00066     P = err * pid_ctx->cfg->kp;
00067
00068     //Update integral state error
00069     pid_ctx->i_state += err;
00070
00071     //Clamp integral state between i_min and i_max
00072     pid_ctx->i_state  = MINMAX(pid_ctx->cfg->i_min, pid_ctx->i_state, pid_ctx->cfg->i_max);
00073
00074     /*
00075      * Compute Integral contribute
00076      *
00077      * note: for computing the integral contribute we use a sample period in seconds
00078      * and so we divide sample_period in microsenconds for 1000.
00079      */
00080     I = pid_ctx->i_state * pid_ctx->cfg->ki * ((piddata_t)pid_ctx->cfg->sample_period / 1000);
00081
00082
00083     /*
00084      * Compute derivative contribute
00085      */
00086     D = (err - pid_ctx->prev_err) * pid_ctx->cfg->kd / ((piddata_t)pid_ctx->cfg->sample_period / 1000);
00087
00088
00089     LOG_INFO("curr_pos[%lf],tgt[%lf],err[%f],P[%f],I[%f],D[%f]", curr_pos, target, err, P, I, D);
00090
00091
00092     //Store the last error value
00093     pid_ctx->prev_err = err;
00094     piddata_t pid = MINMAX(pid_ctx->cfg->out_min, (P + I + D), pid_ctx->cfg->out_max);
00095
00096     LOG_INFO("pid[%lf]",pid);
00097
00098     //Clamp out between out_min and out_max
00099     return pid;
00100 }
00101
00105 void pid_control_init(PidContext *pid_ctx, const PidCfg *pid_cfg)
00106 {
00107     /*
00108      * Init all values of pid control struct
00109      */
00110     pid_ctx->cfg = pid_cfg;
00111
00112     pid_control_reset(pid_ctx);
00113
00114 }
00115


BeRTOS: pid_control.h File Reference

  • algo
Data Structures | Typedefs | Functions
pid_control.h File Reference

Proportional, integral, derivative controller (PID controller). More...

#include <drv/timer.h>

Go to the source code of this file.

Data Structures

struct | PidCfg
PID context structure. More...
struct | PidContext
PID context structure. More...

Typedefs

typedef float | pidk_t
Data type for pid coefficient.

Functions

void | pid_control_setPid (PidCfg *pid_cfg, pidk_t kp, pidk_t ki, pidk_t kd)
Set Kp, Ki, Kd constants of PID control.
void | pid_control_setPeriod (PidCfg *pid_cfg, mtime_t sample_period)
Set sample period for PID control.
void | pid_control_reset (PidContext *pid_ctx)
Clear a pid control structure.
piddata_t | pid_control_update (PidContext *pid_ctx, piddata_t target, piddata_t curr_pos)
Compute next value for reaching target point.
void | pid_control_init (PidContext *pid_ctx, const PidCfg *pid_cfg)
Init PID control.

Detailed Description

Proportional, integral, derivative controller (PID controller).

Author:
Daniele Basile <asterix@develer.com>

Definition in file pid_control.h.


BeRTOS: pid_control.h Source File

  • algo
pid_control.h
Go to the documentation of this file.
00001
00042 #ifndef ALGO_PID_CONTROL_H
00043 #define ALGO_PID_CONTROL_H
00044
00045 #include <drv/timer.h>
00046
00050 typedef float pidk_t;
00051 typedef float piddata_t;
00052
00056 typedef struct PidCfg
00057 {
00058     pidk_t kp;
00059     pidk_t ki;
00060     pidk_t kd;
00061
00062     piddata_t i_max;
00063     piddata_t i_min;
00064
00065     piddata_t out_max;
00066     piddata_t out_min;
00067
00068     mtime_t sample_period;
00069
00070 } PidCfg;
00071
00072
00076 typedef struct PidContext
00077 {
00078     const PidCfg *cfg;
00079
00080     piddata_t prev_err;
00081     piddata_t i_state;
00082
00083 } PidContext;
00084
00088 INLINE void pid_control_setPid(PidCfg *pid_cfg, pidk_t kp, pidk_t ki, pidk_t kd)
00089 {
00090     pid_cfg->kp = kp;
00091     pid_cfg->ki = ki;
00092     pid_cfg->kd = kd;
00093 }
00094
00098 INLINE void pid_control_setPeriod(PidCfg *pid_cfg, mtime_t sample_period)
00099 {
00100     pid_cfg->sample_period = sample_period;
00101 }
00102
00106 INLINE void pid_control_reset(PidContext *pid_ctx)
00107 {
00108     pid_ctx->i_state = 0;
00109     pid_ctx->prev_err = 0;
00110 }
00111
00112 piddata_t pid_control_update(PidContext *pid_ctx, piddata_t target, piddata_t curr_pos);
00113 void pid_control_init(PidContext *pid_ctx, const PidCfg *pid_cfg);
00114
00115 #endif /* ALGO_PID_CONTROL_H */


BeRTOS: pll_at91.h File Reference

  • cpu
  • arm
  • hw
pll_at91.h File Reference

AT91SAM7S256 CRT. More...

#include <io/arm.h>
#include <cfg/macros.h>

Go to the source code of this file.

Detailed Description

AT91SAM7S256 CRT.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file pll_at91.h.


BeRTOS: pll_at91.h Source File

  • cpu
  • arm
  • hw
pll_at91.h
Go to the documentation of this file.
00001
00039 #include <io/arm.h>
00040 #include <cfg/macros.h>
00041
00042 #if 1
00043 // Versione completamente unrollata
00044
00045 #define CREATE_PLL_STEP(xtal, cpufreq)
00046
00047 #define PLL_STEP(xtal, cpufreq, d, k) \
00048     do { \
00049         uint32_t m = (((cpufreq * (1LL << k) * (d))  + (xtal / 2)) / xtal) - 1; \
00050         if (m < 2048) \
00051         { \
00052             uint32_t pll = (d != 0) ? (xtal * (m + 1)) / (d) : 0; \
00053             if (80000000 <= pll && pll <= 160000000) \
00054             { \
00055         uint32_t err = ABS((int32_t)((pll >> k) - cpufreq)); \
00056                 if (err < best_err) \
00057                 { \
00058                     best_err=err; best_m=m; best_k=k; best_d=d; \
00059                 } \
00060             } \
00061         } \
00062     } while (0)
00063
00064 #else
00065
00066 // Versione con funzione nestata (GCC only)
00067 // Tempo di compilazione più rapido
00068
00069 #define CREATE_PLL_STEP(xtal, cpufreq) \
00070     void __attribute__((always_inline)) PLL_STEP(int u1, int u2, int32_t d, long long k)  \
00071     { \
00072         (void)u1; (void)u2; \
00073         uint32_t m = ((((cpufreq * (1LL << k) * (d))  + (xtal / 2)) / xtal) - 1; \
00074         if (m < 2048) \
00075         { \
00076             uint32_t pll = (xtal * (m + 1)) / (d); \
00077             if (80000000UL <= pll && pll <= 160000000UL) \
00078             { \
00079                 uint32_t err = ABS((int32_t)((pll >> k) - cpufreq)); \
00080                 if (err < best_err) \
00081                 { \
00082                     best_err=err; best_m=m; best_k=k; best_d=d; \
00083                 } \
00084             } \
00085         } \
00086     }
00087
00088 #endif
00089
00090 #define PLL_MACRO_STEP(xtal, cpufreq, d) \
00091     do { \
00092         if ((d) > 0 && (d) <= 255 && \
00093             (d) <= xtal / 1000000 && (d) >= xtal / 32000000) \
00094         { \
00095             PLL_STEP(xtal, cpufreq, d, 0); \
00096             PLL_STEP(xtal, cpufreq, d, 1); \
00097             PLL_STEP(xtal, cpufreq, d, 2); \
00098             PLL_STEP(xtal, cpufreq, d, 3); \
00099             PLL_STEP(xtal, cpufreq, d, 4); \
00100             PLL_STEP(xtal, cpufreq, d, 5); \
00101             PLL_STEP(xtal, cpufreq, d, 6); \
00102         } \
00103     } while (0)
00104
00105 #define PLL_ITERATION_4(xtal, cpufreq, d) \
00106     PLL_MACRO_STEP(xtal, cpufreq, d)
00107
00108 #define PLL_ITERATION_3(xtal, cpufreq, d) \
00109     PLL_ITERATION_4(xtal, cpufreq, (d)*4+0); \
00110     PLL_ITERATION_4(xtal, cpufreq, (d)*4+1); \
00111     PLL_ITERATION_4(xtal, cpufreq, (d)*4+2); \
00112     PLL_ITERATION_4(xtal, cpufreq, (d)*4+3);
00113
00114 #define PLL_ITERATION_2(xtal, cpufreq, d) \
00115     PLL_ITERATION_3(xtal, cpufreq, (d)*4+0); \
00116     PLL_ITERATION_3(xtal, cpufreq, (d)*4+1); \
00117     PLL_ITERATION_3(xtal, cpufreq, (d)*4+2); \
00118     PLL_ITERATION_3(xtal, cpufreq, (d)*4+3);
00119
00120 #define PLL_ITERATION_1(xtal, cpufreq, d) \
00121     PLL_ITERATION_2(xtal, cpufreq, (d)*4+0); \
00122     PLL_ITERATION_2(xtal, cpufreq, (d)*4+1); \
00123     PLL_ITERATION_2(xtal, cpufreq, (d)*4+2); \
00124     PLL_ITERATION_2(xtal, cpufreq, (d)*4+3);
00125
00126 #define PLL_ITERATION(xtal, cpufreq) \
00127     PLL_ITERATION_1(xtal, cpufreq, 0); \
00128     PLL_ITERATION_1(xtal, cpufreq, 1); \
00129     PLL_ITERATION_1(xtal, cpufreq, 2); \
00130     PLL_ITERATION_1(xtal, cpufreq, 3)
00131
00132 #define PLL_CALC(xtal, cpufreq, m, d, k) do \
00133     { \
00134         uint32_t best_err=cpufreq, best_m, best_k, best_d; \
00135         CREATE_PLL_STEP(xtal, cpufreq) \
00136         PLL_ITERATION(xtal, cpufreq); \
00137         *(m)=best_m; *(d)=best_d; *(k)=best_k; \
00138     } while (0)
00139
00140 #if 0
00141 int main(int argc, char *argv[])
00142 {
00143     int32_t m, d, k;
00144     PLL_CALC(18432000, 48054857, &m, &d, &k);
00145
00146     if (__builtin_constant_p(m) && __builtin_constant_p(k) && __builtin_constant_p(d))
00147         printf("SUCCESS -- compile time evaluation\n");
00148     else
00149         printf("FAILURE -- run time evaluation\n");
00150
00151     printf("M:%d D:%d K:%d\n", m, d, k);
00152 }
00153 #endif


BeRTOS: pocketbus.c File Reference

  • net
Functions
pocketbus.c File Reference

pocketBus protocol implementation. More...

#include "pocketbus.h"
#include "cfg/cfg_pocketbus.h"
#include <cfg/log.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <io/kfile.h>
#include <cpu/byteorder.h>
#include <string.h>

Go to the source code of this file.

Functions

void | pocketbus_putchar (struct PocketBusCtx *ctx, uint8_t c)
Send a character over pocketBus channel stream, handling escape mode.
void | pocketbus_begin (struct PocketBusCtx *ctx, pocketbus_addr_t addr)
Send pocketBus packet header.
void | pocketbus_write (struct PocketBusCtx *ctx, const void *_data, size_t len)
Send buffer _data over bus, handling escape.
void | pocketbus_end (struct PocketBusCtx *ctx)
Send pocketBus packet tail.
void | pocketbus_send (struct PocketBusCtx *ctx, pocketbus_addr_t addr, const void *data, size_t len)
Send buffer of data to address addr with a pocketBus packet over channel stream.
bool | pocketbus_recv (struct PocketBusCtx *ctx, struct PocketMsg *msg)
Try to read a packet from the pocketBus.
void | pocketbus_init (struct PocketBusCtx *ctx, struct KFile *fd)
Initialize pocketBus protocol handler.

Detailed Description

pocketBus protocol implementation.

pocketBus protocol is a simple strictly master-slave protocol, usable in embedded systems. pocketBus frame is as follows:

 +----------------------------------------+
 | STX | VER | ADDR | PAYLOAD | CKS | ETX |
 +----------------------------------------+
 |     |     |      |         |     |     |
 + 1B  + 1B  +  2B  + N Byte  + 2B  + 1B  +
  • STX, 1 byte (0x02), packet start
  • VER, 1 byte, packet version
  • ADDR, 2 byte, slave address
  • PAYLOAD, N byte, data field
  • CKS, 2 byte, checksum
  • ETX, 1 byte, (0x03) packet end

Protocol parsing start on STX reception. When the receiving routine finds an STX char, it starts to read characters from the bus until an ETX is received. Once a packet is received, the parser checks packet correctness and checksum. If all is OK the payload is returned.

STX (0x02), ETX(0x03) and ESC(0x1B) are special characters and cannot be transmitted inside payload without escaping them. To escape a character you must precede it by the ESC char. E.G. STX -> ESC + STX ETX -> ESC + ETX ESC -> ESC + ESC

In the ADDR field is always specified the slave address. In the case of master trasmitting, ADDR contains the slave destination address. In case of slave replying, ADDR contains the slave address itself. Thus, the master device does not have an address. Packet must be routed to master by hardware bus design.

The checksum algorithm used is rotating hash algortihm, quite simple but more reliable than simple checksum. The checksum in computed on all fields excluding STX, ETX and CHK fields itself. Checksum is computed on the packet *before* escaping. Escape sequence counts for 1 character only (the escaped one).

Definition in file pocketbus.c.

Function Documentation

bool pocketbus_recv | ( | struct PocketBusCtx * | ctx,
 |  | struct PocketMsg * | msg
 | ) |  |

Try to read a packet from the pocketBus.

Returns:
true if a packet is received, false otherwise.

Definition at line 171 of file pocketbus.c.


BeRTOS: pocketbus.c Source File

  • net
pocketbus.c
Go to the documentation of this file.
00001
00079 #include "pocketbus.h"
00080
00081 #include "cfg/cfg_pocketbus.h"
00082
00083 // Define logging setting (for cfg/log.h module).
00084 #define LOG_LEVEL         POCKETBUS_LOG_LEVEL
00085 #define LOG_VERBOSITY     POCKETBUS_LOG_FORMAT
00086 #include <cfg/log.h>
00087 #include <cfg/debug.h>
00088 #include <cfg/macros.h>
00089
00090 #include <io/kfile.h>
00091
00092 #include <cpu/byteorder.h>
00093
00094 #include <string.h>
00095
00099 void pocketbus_putchar(struct PocketBusCtx *ctx, uint8_t c)
00100 {
00101     /* Update checksum */
00102     rotating_update1(c, &ctx->out_cks);
00103
00104     /* Escape characters with special meaning */
00105     if (c == POCKETBUS_ESC || c == POCKETBUS_STX || c == POCKETBUS_ETX)
00106         kfile_putc(POCKETBUS_ESC, ctx->fd);
00107
00108     kfile_putc(c, ctx->fd);
00109 }
00110
00114 void pocketbus_begin(struct PocketBusCtx *ctx, pocketbus_addr_t addr)
00115 {
00116     PocketBusHdr hdr;
00117
00118     hdr.ver = POCKETBUS_VER;
00119     hdr.addr = cpu_to_be16(addr);
00120     rotating_init(&ctx->out_cks);
00121
00122     /* Send STX */
00123     kfile_putc(POCKETBUS_STX, ctx->fd);
00124
00125     /* Send header */
00126     pocketbus_write(ctx, &hdr, sizeof(hdr));
00127 }
00128
00132 void pocketbus_write(struct PocketBusCtx *ctx, const void *_data, size_t len)
00133 {
00134     const uint8_t *data = (const uint8_t *)_data;
00135
00136     while (len--)
00137         pocketbus_putchar(ctx, *data++);
00138 }
00139
00143 void pocketbus_end(struct PocketBusCtx *ctx)
00144 {
00145     /* Send checksum */
00146     rotating_t cks = cpu_to_be16(ctx->out_cks);
00147     pocketbus_write(ctx, &cks, sizeof(cks));
00148
00149     /* Send ETX */
00150     kfile_putc(POCKETBUS_ETX, ctx->fd);
00151 }
00152
00156 void pocketbus_send(struct PocketBusCtx *ctx, pocketbus_addr_t addr, const void *data, size_t len)
00157 {
00158     pocketbus_begin(ctx, addr);
00159
00160     /* Send data */
00161     pocketbus_write(ctx, data, len);
00162
00163     pocketbus_end(ctx);
00164 }
00165
00166
00171 bool pocketbus_recv(struct PocketBusCtx *ctx, struct PocketMsg *msg)
00172 {
00173     int c;
00174
00175     /* Process incoming characters until buffer is not empty */
00176     while ((c = kfile_getc(ctx->fd)) != EOF)
00177     {
00178         /* Look for STX char */
00179         if (c == POCKETBUS_STX && !ctx->escape)
00180         {
00181             /* When an STX is found, inconditionally start a new packet */
00182             if (ctx->sync)
00183                 kprintf("pocketBus double sync!\n");
00184
00185             ctx->sync = true;
00186             ctx->len = 0;
00187             rotating_init(&ctx->in_cks);
00188             continue;
00189         }
00190
00191         if (ctx->sync)
00192         {
00193             /* Handle escape mode */
00194             if (c == POCKETBUS_ESC && !ctx->escape)
00195             {
00196                 ctx->escape = true;
00197                 continue;
00198             }
00199
00200             /* Handle message end */
00201             if (c == POCKETBUS_ETX && !ctx->escape)
00202             {
00203                 ctx->sync = false;
00204
00205                 /* Check minimum size */
00206                 if (ctx->len < sizeof(PocketBusHdr) + sizeof(rotating_t))
00207                 {
00208                     kprintf("pocketBus short pkt!\n");
00209                     continue;
00210                 }
00211
00212                 /* Remove checksum bytes from packet len */
00213                 ctx->len -= sizeof(rotating_t);
00214
00215                 /* Compute checksum */
00216                 rotating_update(ctx->buf, ctx->len, &ctx->in_cks);
00217                 uint8_t cks_h = *(ctx->buf + ctx->len);
00218                 uint8_t cks_l = *(ctx->buf + ctx->len + 1);
00219
00220                 rotating_t recv_cks = (cks_h << 8) | cks_l;
00221
00222                 /* Checksum check */
00223                 if (recv_cks == ctx->in_cks)
00224                 {
00225                     PocketBusHdr *hdr = (PocketBusHdr *)ctx;
00226
00227                     /* Check packet version */
00228                     if (hdr->ver == POCKETBUS_VER)
00229                     {
00230                         /* Packet received, set msg fields */
00231                         msg->payload = ctx->buf + sizeof(PocketBusHdr);
00232                         msg->addr = be16_to_cpu(hdr->addr);
00233                         msg->len = ctx->len - sizeof(PocketBusHdr);
00234                         msg->ctx = ctx;
00235                         return true;
00236                     }
00237                     else
00238                     {
00239                         kprintf("pocketBus version mismatch, here[%d], there[%d]\n", POCKETBUS_VER, hdr->ver);
00240                         continue;
00241                     }
00242                 }
00243                 else
00244                 {
00245                     kprintf("pocketBus cks error, here[%04X], there[%04X]\n", ctx->in_cks, recv_cks);
00246                     continue;
00247                 }
00248
00249             }
00250
00251             ctx->escape = false;
00252
00253             /* Check buffer overflow: simply ignore
00254                received data and go to unsynced state. */
00255             if (ctx->len >= CONFIG_POCKETBUS_BUFLEN)
00256             {
00257                 kprintf("pocketBus buffer overflow\n");
00258                 ctx->sync = false;
00259                 continue;
00260             }
00261
00262             /* Put received data in the buffer */
00263             ctx->buf[ctx->len] = c;
00264             ctx->len++;
00265         }
00266     }
00267
00268     /*
00269      * Check stream status.
00270      */
00271     if (kfile_error(ctx->fd))
00272     {
00273         LOG_ERR("fd status[%04X]\n", kfile_error(ctx->fd));
00274         kfile_clearerr(ctx->fd);
00275     }
00276
00277     return false;
00278 }
00279
00280
00284 void pocketbus_init(struct PocketBusCtx *ctx, struct KFile *fd)
00285 {
00286     ASSERT(ctx);
00287     ASSERT(fd);
00288
00289     memset(ctx, 0, sizeof(*ctx));
00290     ctx->fd = fd;
00291 }


BeRTOS: pocketbus.h File Reference

  • net
Data Structures | Defines | Typedefs | Functions
pocketbus.h File Reference

Basical functions to use pocketBus protocol. More...

#include "cfg/cfg_pocketbus.h"
#include <cfg/compiler.h>
#include <algo/rotating_hash.h>
#include <io/kfile.h>

Go to the source code of this file.

Data Structures

struct | PocketBusHdr
Header of pocketBus messages. More...
struct | PocketBusCtx
pocketBus context structure. More...
struct | PocketMsg
Structure holding pocketBus message parameters. More...

Defines

#define | POCKETBUS_BROADCAST_ADDR 0xFFFF
pocketBus broadcast address
#define | POCKETBUS_STX 0x02
pocketBus special characters definitions.
#define | POCKETBUS_ETX 0x03
pocketBus special characters definitions.
#define | POCKETBUS_ESC 0x1B
pocketBus special characters definitions.
#define | POCKETBUS_ACK 0x06
pocketBus special characters definitions.
#define | POCKETBUS_NAK 0x15
pocketBus special characters definitions.

Typedefs

typedef uint16_t | pocketbus_len_t
Type for pocketBus length.
typedef uint16_t | pocketbus_addr_t
Type for pocketBus addresses.

Functions

void | pocketbus_putchar (struct PocketBusCtx *ctx, uint8_t c)
Send a character over pocketBus channel stream, handling escape mode.
void | pocketbus_begin (struct PocketBusCtx *ctx, pocketbus_addr_t addr)
Send pocketBus packet header.
void | pocketbus_write (struct PocketBusCtx *ctx, const void *_data, size_t len)
Send buffer _data over bus, handling escape.
void | pocketbus_end (struct PocketBusCtx *ctx)
Send pocketBus packet tail.
void | pocketbus_send (struct PocketBusCtx *ctx, pocketbus_addr_t addr, const void *data, size_t len)
Send buffer of data to address addr with a pocketBus packet over channel stream.
bool | pocketbus_recv (struct PocketBusCtx *ctx, struct PocketMsg *msg)
Try to read a packet from the pocketBus.
void | pocketbus_init (struct PocketBusCtx *ctx, struct KFile *fd)
Initialize pocketBus protocol handler.
STATIC_ASSERT (sizeof(pocketbus_addr_t)==sizeof(uint16_t))
This ensure that endianess convertion functions work on the right data size.

Detailed Description

Basical functions to use pocketBus protocol.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file pocketbus.h.

Function Documentation

bool pocketbus_recv | ( | struct PocketBusCtx * | ctx,
 |  | struct PocketMsg * | msg
 | ) |  |

Try to read a packet from the pocketBus.

Returns:
true if a packet is received, false otherwise.

Definition at line 171 of file pocketbus.c.


BeRTOS: pocketbus.h Source File

  • net
pocketbus.h
Go to the documentation of this file.
00001
00042 #ifndef NET_POCKETBUS_H
00043 #define NET_POCKETBUS_H
00044
00045 #include "cfg/cfg_pocketbus.h"        /* for CONFIG_POCKETBUS_BUFLEN */
00046 #include <cfg/compiler.h>
00047
00048 #include <algo/rotating_hash.h>
00049
00050 #include <io/kfile.h>
00051
00056 #define POCKETBUS_STX 0x02 //ASCII STX
00057 #define POCKETBUS_ETX 0x03 //ASCII ETX
00058 #define POCKETBUS_ESC 0x1B //ASCII ESC
00059 #define POCKETBUS_ACK 0x06 //ASCII ACK
00060 #define POCKETBUS_NAK 0x15 //ASCII NAK
00061 /*\}*/
00062
00063 #define POCKETBUS_BROADCAST_ADDR 0xFFFF ///< pocketBus broadcast address
00064
00068 typedef uint16_t pocketbus_len_t;
00069
00073 typedef uint16_t pocketbus_addr_t;
00074
00078 typedef struct PocketBusHdr
00079 {
00080     #define POCKETBUS_VER 1
00081     uint8_t ver;
00082     pocketbus_addr_t addr;
00083 } PocketBusHdr;
00084
00088 typedef struct PocketBusCtx
00089 {
00090     uint8_t buf[CONFIG_POCKETBUS_BUFLEN];
00091     struct KFile *fd;
00092     bool sync;
00093     bool escape;
00094     rotating_t in_cks;
00095     rotating_t out_cks;
00096     pocketbus_len_t len;
00097 } PocketBusCtx;
00098
00099 STATIC_ASSERT(offsetof(PocketBusCtx, buf) == 0);
00103 typedef struct PocketMsg
00104 {
00105     struct PocketBusCtx *ctx;
00106     pocketbus_addr_t addr;
00107     pocketbus_len_t len;
00108     const uint8_t *payload;
00109 } PocketMsg;
00110
00116 STATIC_ASSERT(sizeof(pocketbus_addr_t) == sizeof(uint16_t));
00117 STATIC_ASSERT(sizeof(rotating_t) == sizeof(uint16_t));
00118 /*\}*/
00119
00120 void pocketbus_putchar(struct PocketBusCtx *ctx, uint8_t c);
00121 void pocketbus_begin(struct PocketBusCtx *ctx, pocketbus_addr_t addr);
00122 void pocketbus_write(struct PocketBusCtx *ctx, const void *_data, size_t len);
00123 void pocketbus_end(struct PocketBusCtx *ctx);
00124
00125 void pocketbus_send(struct PocketBusCtx *ctx, pocketbus_addr_t addr, const void *data, size_t len);
00126 bool pocketbus_recv(struct PocketBusCtx *ctx, struct PocketMsg *msg);
00127 void pocketbus_init(struct PocketBusCtx *ctx, struct KFile *fd);
00128
00129 #endif /* NET_POCKETBUS_H */


BeRTOS: pocketcmd.c File Reference

  • net
Functions
pocketcmd.c File Reference

pocketBus protocol Command layer implementation. More...

#include "pocketcmd.h"
#include "pocketbus.h"
#include "cfg/cfg_pocketbus.h"
#include <cfg/log.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cfg/module.h>
#include <drv/timer.h>
#include <cpu/byteorder.h>
#include <cpu/detect.h>
#include <string.h>

Go to the source code of this file.

Functions

void | pocketcmd_poll (struct PocketCmdCtx *ctx)
pocketBus Command poll function.
bool | pocketcmd_recv (struct PocketCmdCtx *ctx, PocketCmdMsg *recv_msg)
pocketBus Command recv function.
bool | pocketcmd_send (struct PocketCmdCtx *ctx, pocketcmd_t cmd, const void *buf, size_t len, bool wait_reply)
Send command cmd to/from slave adding len arguments in buf.
void | pocketcmd_init (struct PocketCmdCtx *ctx, struct PocketBusCtx *bus_ctx, pocketbus_addr_t addr, pocketcmd_lookup_t search)
Init pocketBus command layer.
void | pocketcmd_replyAck (struct PocketCmdMsg *msg)
Helper function used to reply to master with an ACK.
void | pocketcmd_replyNak (struct PocketCmdMsg *msg)
Helper function used to reply to master with a NAK.

Detailed Description

pocketBus protocol Command layer implementation.

This module implements command layer over pocketBus protocol. Payload packets received by pocketBus are first checked for address matching. If a packet is addressed to us we look for a suitable callback function to call.

The received payload format is as follows:

 +----------------------------------------+
 |  CMD |            DATA                 |
 +----------------------------------------+
 |      |                                 |
 +  2B  +           0..N Byte             +

The CMD ID used is the same supplied by the master when the command was sent.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file pocketcmd.c.

Function Documentation

void pocketcmd_init | ( | struct PocketCmdCtx * | ctx,
 |  | struct PocketBusCtx * | bus_ctx,
 |  | pocketbus_addr_t | addr,
 |  | pocketcmd_lookup_t | search
 | ) |  |

Init pocketBus command layer.

ctx is pocketBus command layer context. bus_ctx is pocketBus context. addr is slave address (see pocketcmd_setAddr for details.) search is the lookup function used to search command ID callbacks.

Definition at line 197 of file pocketcmd.c.

void pocketcmd_poll ( struct PocketCmdCtx * ctx )

pocketBus Command poll function.

Call it to read and process pocketBus commands.

Definition at line 80 of file pocketcmd.c.

bool pocketcmd_recv | ( | struct PocketCmdCtx * | ctx,
 |  | PocketCmdMsg * | recv_msg
 | ) |  |

pocketBus Command recv function.

Call it to read and process pocketBus commands.

Definition at line 100 of file pocketcmd.c.

bool pocketcmd_send | ( | struct PocketCmdCtx * | ctx,
 |  | pocketcmd_t | cmd,
 |  | const void * | buf,
 |  | size_t | len,
 |  | bool | wait_reply
 | ) |  |

Send command cmd to/from slave adding len arguments in buf.

Address used is contained in ctx->addr . If we are master and the message has a reply, you must set wait_reply to true.

Returns:
true if all is ok, false if we are already waiting a replay from another slave.

Definition at line 154 of file pocketcmd.c.


BeRTOS: pocketcmd.c Source File

  • net
pocketcmd.c
Go to the documentation of this file.
00001
00056 #include "pocketcmd.h"
00057 #include "pocketbus.h"
00058
00059 #include "cfg/cfg_pocketbus.h"
00060
00061 // Define logging setting (for cfg/log.h module).
00062 #define LOG_LEVEL         POCKETBUS_LOG_LEVEL
00063 #define LOG_VERBOSITY     POCKETBUS_LOG_FORMAT
00064 #include <cfg/log.h>
00065 #include <cfg/debug.h>
00066 #include <cfg/macros.h>
00067 #include <cfg/module.h>
00068
00069 #include <drv/timer.h>
00070
00071 #include <cpu/byteorder.h>
00072 #include <cpu/detect.h>
00073
00074 #include <string.h>
00075
00080 void pocketcmd_poll(struct PocketCmdCtx *ctx)
00081 {
00082     PocketCmdMsg msg;
00083     while (pocketcmd_recv(ctx, &msg))
00084     {
00085         /* Check for command callback */
00086         pocketcmd_hook_t callback = ctx->search(msg.cmd);
00087
00088         /* Call it if exists */
00089         if (callback)
00090             callback(&msg);
00091     }
00092 }
00093
00094
00095
00100 bool pocketcmd_recv(struct PocketCmdCtx *ctx, PocketCmdMsg *recv_msg)
00101 {
00102     PocketMsg msg;
00103
00104     /* Try to read a packet from pocketBus */
00105     while (pocketbus_recv(ctx->bus_ctx, &msg))
00106     {
00107         /* Check address */
00108         if (msg.addr == ctx->addr ||
00109             msg.addr == POCKETBUS_BROADCAST_ADDR)
00110         {
00111
00112             #if CPU_AVR
00113                 const PocketCmdHdr *hdr = (const PocketCmdHdr *)msg.payload;
00114             #else
00115                 #if !CPU_ARM
00116                     #warning Fix alignment problem..
00117                     /*
00118                      * The code below make one memcopy, this the only way to
00119                      * solve alignment problem on ARM. If you are use other
00120                      * architecture you should find other way to optimize
00121                      * this code.
00122                      */
00123                 #endif
00124                 PocketCmdHdr hd;
00125                 memcpy(&hd, msg.payload, sizeof(PocketCmdHdr));
00126                 const PocketCmdHdr *hdr =  &hd;
00127             #endif
00128
00129             pocketcmd_t cmd = be16_to_cpu(hdr->cmd);
00130
00131             /* We're no longer waiting for a reply (in case we were) */
00132             if (cmd == ctx->waiting)
00133                 ctx->waiting = PKTCMD_NULL;
00134
00135             recv_msg->cmd_ctx = ctx;
00136             recv_msg->cmd = cmd;
00137             recv_msg->len = msg.len - sizeof(PocketCmdHdr);
00138             recv_msg->buf = msg.payload + sizeof(PocketCmdHdr);
00139
00140             return true;
00141         }
00142     }
00143
00144     return false;
00145 }
00146
00147
00154 bool pocketcmd_send(struct PocketCmdCtx *ctx, pocketcmd_t cmd, const void *buf, size_t len, bool wait_reply)
00155 {
00156     /* Check if we are waiting a reply from someone */
00157     if (ctx->waiting != PKTCMD_NULL)
00158     {
00159         /* Check is reply timeout is elapsed */
00160         if (timer_clock() - ctx->reply_timer < ms_to_ticks(CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT))
00161         {
00162             LOG_ERR("Pkt discard! waiting cmd[%04X]\n", ctx->waiting);
00163             return false;
00164         }
00165         else
00166         {
00167             LOG_INFO("Timeout waiting cmd[%04X]\n", ctx->waiting);
00168             ctx->waiting = PKTCMD_NULL;
00169         }
00170     }
00171
00172     /* Endianess! */
00173     cmd = cpu_to_be16(cmd);
00174
00175     /* Send packet */
00176     pocketbus_begin(ctx->bus_ctx, ctx->addr);
00177     pocketbus_write(ctx->bus_ctx, &cmd, sizeof(cmd));
00178     pocketbus_write(ctx->bus_ctx, buf, len);
00179     pocketbus_end(ctx->bus_ctx);
00180
00181     if (wait_reply)
00182     {
00183         ctx->waiting = be16_to_cpu(cmd);
00184         ctx->reply_timer = timer_clock();
00185     }
00186
00187     return true;
00188 }
00189
00197 void pocketcmd_init(struct PocketCmdCtx *ctx, struct PocketBusCtx *bus_ctx, pocketbus_addr_t addr, pocketcmd_lookup_t search)
00198 {
00199     ASSERT(ctx);
00200     ASSERT(bus_ctx);
00201     ASSERT(search);
00202     MOD_CHECK(timer);
00203
00204     memset(ctx, 0, sizeof(*ctx));
00205     ctx->bus_ctx = bus_ctx;
00206     ctx->search = search;
00207     pocketcmd_setAddr(ctx, addr);
00208 }
00209
00213 void pocketcmd_replyAck(struct PocketCmdMsg *msg)
00214 {
00215     uint8_t ack[] = { POCKETBUS_ACK };
00216
00217     pocketcmd_slaveReply(msg->cmd_ctx, msg->cmd, ack, sizeof(ack));
00218 }
00219
00223 void pocketcmd_replyNak(struct PocketCmdMsg *msg)
00224 {
00225     uint8_t nak[] = { POCKETBUS_NAK };
00226
00227     pocketcmd_slaveReply(msg->cmd_ctx, msg->cmd, nak, sizeof(nak));
00228 }
00229


BeRTOS: pocketcmd.h File Reference

  • net
Data Structures | Defines | Typedefs | Functions
pocketcmd.h File Reference

PocketBus command abstraction layer. More...

#include "pocketbus.h"
#include <cfg/compiler.h>

Go to the source code of this file.

Data Structures

struct | PocketCmdHdr
Header for transmitted pocketBus Commands. More...
struct | PocketCmdMsg
pocketBus command message structure. More...
struct | PocketCmdCtx
pocketBus context for command layer communications. More...

Defines

#define | PKTCMD_NULL 0
pocketBus Null command

Typedefs

typedef uint16_t | pocketcmd_t
Type for Command IDs.
typedef void(* | pocketcmd_hook_t )(struct PocketCmdMsg *cmd_msg)
Type for command hooks.
typedef pocketcmd_hook_t(* | pocketcmd_lookup_t )(pocketcmd_t cmd)
Type for lookup function hooks.

Functions

void | pocketcmd_setAddr (struct PocketCmdCtx *ctx, pocketbus_addr_t addr)
Set slave address addr for pocketBus command layer.
void | pocketcmd_init (struct PocketCmdCtx *ctx, struct PocketBusCtx *bus_ctx, pocketbus_addr_t addr, pocketcmd_lookup_t search)
Init pocketBus command layer.
void | pocketcmd_poll (struct PocketCmdCtx *ctx)
pocketBus Command poll function.
bool | pocketcmd_send (struct PocketCmdCtx *ctx, pocketcmd_t cmd, const void *buf, size_t len, bool has_replay)
Send command cmd to/from slave adding len arguments in buf.
bool | pocketcmd_recv (struct PocketCmdCtx *ctx, PocketCmdMsg *recv_msg)
pocketBus Command recv function.
void | pocketcmd_replyNak (struct PocketCmdMsg *msg)
Helper function used to reply to master with a NAK.
void | pocketcmd_replyAck (struct PocketCmdMsg *msg)
Helper function used to reply to master with an ACK.
bool | pocketcmd_masterSend (struct PocketCmdCtx *ctx, pocketbus_addr_t addr, pocketcmd_t cmd, const void *buf, size_t len)
Helper function used by master to send a command to slave addr.
bool | pocketcmd_slaveReply (struct PocketCmdCtx *ctx, pocketcmd_t cmd, const void *buf, size_t len)
Helper function used by slave to reply to a master command.
bool | pocketcmd_checkNak (struct PocketCmdMsg *msg)
Return true if message contain NAK.
STATIC_ASSERT (sizeof(pocketcmd_t)==sizeof(uint16_t))
This ensure that endianess convertion functions work on the right data size.

Detailed Description

PocketBus command abstraction layer.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file pocketcmd.h.

Function Documentation

void pocketcmd_init | ( | struct PocketCmdCtx * | ctx,
 |  | struct PocketBusCtx * | bus_ctx,
 |  | pocketbus_addr_t | addr,
 |  | pocketcmd_lookup_t | search
 | ) |  |

Init pocketBus command layer.

ctx is pocketBus command layer context. bus_ctx is pocketBus context. addr is slave address (see pocketcmd_setAddr for details.) search is the lookup function used to search command ID callbacks.

Definition at line 197 of file pocketcmd.c.

void pocketcmd_poll ( struct PocketCmdCtx * ctx )

pocketBus Command poll function.

Call it to read and process pocketBus commands.

Definition at line 80 of file pocketcmd.c.

bool pocketcmd_recv | ( | struct PocketCmdCtx * | ctx,
 |  | PocketCmdMsg * | recv_msg
 | ) |  |

pocketBus Command recv function.

Call it to read and process pocketBus commands.

Definition at line 100 of file pocketcmd.c.

bool pocketcmd_send | ( | struct PocketCmdCtx * | ctx,
 |  | pocketcmd_t | cmd,
 |  | const void * | buf,
 |  | size_t | len,
 |  | bool | wait_reply
 | ) |  |

Send command cmd to/from slave adding len arguments in buf.

Address used is contained in ctx->addr . If we are master and the message has a reply, you must set wait_reply to true.

Returns:
true if all is ok, false if we are already waiting a replay from another slave.

Definition at line 154 of file pocketcmd.c.

void pocketcmd_setAddr | ( | struct PocketCmdCtx * | ctx,
 |  | pocketbus_addr_t | addr
 | ) |  | [inline]

Set slave address addr for pocketBus command layer.

If we are a slave this is *our* address. If we are the master this is the slave address to send messages to.

Definition at line 107 of file pocketcmd.h.


BeRTOS: pocketcmd.h Source File

  • net
pocketcmd.h
Go to the documentation of this file.
00001
00040 #ifndef NET_POCKETCMD_H
00041 #define NET_POCKETCMD_H
00042
00043 #include "pocketbus.h"
00044 #include <cfg/compiler.h>
00045
00046 #define PKTCMD_NULL 0 ///< pocketBus Null command
00047
00048 typedef uint16_t pocketcmd_t;
00049
00053 typedef struct PocketCmdHdr
00054 {
00055     pocketcmd_t cmd;
00056 } PocketCmdHdr;
00057
00063 STATIC_ASSERT(sizeof(pocketcmd_t) == sizeof(uint16_t));
00064 /*\}*/
00065
00066 /* fwd declaration */
00067 struct PocketCmdCtx;
00068
00072 typedef struct PocketCmdMsg
00073 {
00074     struct PocketCmdCtx *cmd_ctx;
00075     pocketcmd_t cmd;
00076     pocketbus_len_t len;
00077     const uint8_t *buf;
00078 } PocketCmdMsg;
00079
00083 typedef void (*pocketcmd_hook_t)(struct PocketCmdMsg *cmd_msg);
00084
00088 typedef pocketcmd_hook_t (*pocketcmd_lookup_t)(pocketcmd_t cmd);
00089
00093 typedef struct PocketCmdCtx
00094 {
00095     struct PocketBusCtx *bus_ctx;
00096     pocketbus_addr_t addr;
00097     pocketcmd_lookup_t search;
00098     pocketcmd_t waiting;
00099     ticks_t reply_timer;
00100 } PocketCmdCtx;
00101
00107 INLINE void pocketcmd_setAddr(struct PocketCmdCtx *ctx, pocketbus_addr_t addr)
00108 {
00109     ctx->addr = addr;
00110 }
00111
00112 void pocketcmd_init(struct PocketCmdCtx *ctx, struct PocketBusCtx *bus_ctx, pocketbus_addr_t addr, pocketcmd_lookup_t search);
00113 void pocketcmd_poll(struct PocketCmdCtx *ctx);
00114 bool pocketcmd_send(struct PocketCmdCtx *ctx, pocketcmd_t cmd, const void *buf, size_t len, bool has_replay);
00115 bool pocketcmd_recv(struct PocketCmdCtx *ctx, PocketCmdMsg *recv_msg);
00116 void pocketcmd_replyNak(struct PocketCmdMsg *msg);
00117 void pocketcmd_replyAck(struct PocketCmdMsg *msg);
00118
00122 INLINE bool pocketcmd_masterSend(struct PocketCmdCtx *ctx, pocketbus_addr_t addr, pocketcmd_t cmd, const void *buf, size_t len)
00123 {
00124     pocketcmd_setAddr(ctx, addr);
00125     return pocketcmd_send(ctx, cmd, buf, len, true);
00126 }
00127
00131 INLINE bool pocketcmd_slaveReply(struct PocketCmdCtx *ctx, pocketcmd_t cmd, const void *buf, size_t len)
00132 {
00133     return pocketcmd_send(ctx, cmd, buf, len, false);
00134 }
00135
00139 INLINE bool pocketcmd_checkNak(struct PocketCmdMsg *msg)
00140 {
00141     if (msg->buf[0] == POCKETBUS_NAK)
00142         return true;
00143
00144     return false;
00145 }
00146
00147
00148
00149 #endif /* NET_POCKETCMD_H */


BeRTOS: pool.h File Reference

  • struct
Defines
pool.h File Reference
#include <cfg/macros.h>
#include <struct/list.h>

Go to the source code of this file.

Defines

#define | EXTERN_POOL(name) extern List name
Extern pool declaration.
#define | DECLARE_POOL(name, type, num) DECLARE_POOL_WITH_STORAGE(name, type, num, List)
Helper macro to declare a Pool data type.
#define | DECLARE_POOL_STATIC(name, type, num) DECLARE_POOL_WITH_STORAGE(name, type, num, static List)
Static Pool declaration.
#define | pool_init(name, init_func) (*(name##_init))(init_func)
Initialize the pool name, calling init_func on each element.
#define | pool_alloc(name) list_remHead(name)
Allocate an element from the pool.
#define | pool_free(name, elem) ADDHEAD(name, (Node*)elem)
Recycle an element into the pool.
#define | pool_empty(name) LIST_EMPTY(name)
Test if the pool is empty.

Detailed Description

Definition in file pool.h.


BeRTOS: pool.h Source File

  • struct
pool.h
Go to the documentation of this file.
00001
00079 #ifndef STRUCT_POOL_H
00080 #define STRUCT_POOL_H
00081
00082 #include <cfg/macros.h>
00083 #include <struct/list.h>
00084
00088 #define EXTERN_POOL(name) \
00089     extern List name
00090
00091 #define DECLARE_POOL_WITH_STORAGE(name, type, num, storage) \
00092     static type name##_items[num]; \
00093     storage name; \
00094     INLINE void name##_init(void (*init_func)(type*)) \
00095     { \
00096         size_t i; \
00097         LIST_INIT(&name); \
00098         for (i=0;i<countof(name##_items);++i) \
00099         { \
00100             if (init_func) init_func(&name##_items[i]); \
00101             ADDTAIL(&name, (Node*)&name##_items[i]); \
00102         } \
00103     } \
00104     INLINE void name##_init(void (*init_func)(type*)) \
00105
00106
00117 #define DECLARE_POOL(name, type, num) \
00118     DECLARE_POOL_WITH_STORAGE(name, type, num, List)
00119
00125 #define DECLARE_POOL_STATIC(name, type, num) \
00126     DECLARE_POOL_WITH_STORAGE(name, type, num, static List)
00127
00140 #define pool_init(name, init_func)     (*(name##_init))(init_func)
00141
00154 #define pool_alloc(name)               list_remHead(name)
00155
00165 #define pool_free(name, elem)          ADDHEAD(name, (Node*)elem)
00166
00173 #define pool_empty(name)               LIST_EMPTY(name)
00174  /* defgroup pool */
00176
00177 #endif /* STRUCT_POOL_H */


BeRTOS: power.h File Reference

  • cpu
Defines | Functions
power.h File Reference

CPU power management functions. More...

#include "cfg/cfg_proc.h"
#include "cfg/cfg_wdt.h"
#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define | CPU_PAUSE_ON(COND) ATOMIC(while (!(COND)) { cpu_pause(); })
Safely call cpu_pause() until the COND predicate becomes true.

Functions

void | cpu_relax (void)
Let the CPU rest in tight busy loops.
void | cpu_pause (void)
Stop the processor until the next interrupt occurs.

Detailed Description

CPU power management functions.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file power.h.

Function Documentation

void cpu_pause ( void ) [inline]

Stop the processor until the next interrupt occurs.

Pausing the CPU effectively reduces power usage, and should be used whenever the program is idle waiting for the next event to occur.

To avoid deadlocking, the caller should normally check for the desired condition with interrupts disabled, and enter this function while interrupts are still disabled:

     IRQ_DISABLE();
     while (!event_occurred)
         cpu_pause();
     IRQ_ENABLE();
Note:
Some implementations of cpu_pause() may return before any interrupt has occurred. Calling code should take this possibility into account.
This function is currently unimplemented
See also:
cpu_relax() cpu_yield()

Definition at line 106 of file power.h.

void cpu_relax ( void ) [inline]

Let the CPU rest in tight busy loops.

User code that sits in a busy loop should call cpu_relax() every once in a while to perform system-dependent idle processing.

Depending on the system configuration, this might perform different actions:

  • yield the CPU to other processes
  • reset the watchdog timer to avoid it from triggering
  • scale the CPU speed down to save power (unimplemented)
  • let the event loop of the emulator process a few events
See also:
proc_yield() cpu_pause()

Definition at line 69 of file power.h.


BeRTOS: power.h Source File

  • cpu
power.h
Go to the documentation of this file.
00001
00037 #ifndef CPU_POWER_H
00038 #define CPU_POWER_H
00039
00040 #include "cfg/cfg_proc.h"
00041 #include "cfg/cfg_wdt.h"
00042
00043 #include <cfg/compiler.h>
00044
00045 #if CONFIG_KERN
00046     #include <kern/proc.h>
00047 #endif
00048
00049 #if CONFIG_WATCHDOG
00050     #include <drv/wdt.h>
00051 #endif
00052
00069 INLINE void cpu_relax(void)
00070 {
00071     MEMORY_BARRIER;
00072 #if CONFIG_KERN
00073     if (proc_preemptAllowed())
00074         proc_yield();
00075 #endif
00076
00077 #if CONFIG_WATCHDOG
00078     wdt_reset();
00079 #endif
00080 }
00081
00106 INLINE void cpu_pause(void)
00107 {
00108     //ASSERT_IRQ_DISABLED();
00109     //IRQ_ENABLE();
00110     cpu_relax();
00111     //IRQ_DISABLE();
00112 }
00113
00117 #define CPU_PAUSE_ON(COND) ATOMIC(while (!(COND)) { cpu_pause(); })
00118
00119 #endif /* CPU_POWER_H */


BeRTOS: preempt.c File Reference

  • kern
preempt.c File Reference

Go to the source code of this file.

Detailed Description

Definition in file preempt.c.


BeRTOS: preempt.c Source File

  • kern
preempt.c
Go to the documentation of this file.
00001


BeRTOS: prng.h File Reference

  • sec
Functions
prng.h File Reference

Generic interface for cryptographically-secure pseudo-RNG. More...

#include <cfg/compiler.h>
#include <cfg/debug.h>

Go to the source code of this file.

Functions

void | prng_reseed (PRNG *ctx, const uint8_t *seed)
Feed a new seed into the PRNG.
size_t | prng_seed_len (PRNG *ctx)
Get the length of the seed in bytes required by this generator.
void | prng_generate (PRNG *ctx, uint8_t *data, size_t len)
Generate some cryptographically-secure random bytes into the specified buffer.

Detailed Description

Generic interface for cryptographically-secure pseudo-RNG.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file prng.h.

Function Documentation

void prng_reseed | ( | PRNG * | ctx,
 |  | const uint8_t * | seed
 | ) |  | [inline]

Feed a new seed into the PRNG.

Note:
: Being a cryptographically-secure PRNG, the seed will be mixed to the current state of the generator, so it is NOT possible to generate the same sequence simply by using the same seed. If you need such a property, use a normale PRGN like rand().

Definition at line 60 of file prng.h.


BeRTOS: prng.h Source File

  • sec
prng.h
Go to the documentation of this file.
00001
00038 #ifndef SEC_PRNG_H
00039 #define SEC_PRNG_H
00040
00041 #include <cfg/compiler.h>
00042 #include <cfg/debug.h>
00043
00044 typedef struct PRNG
00045 {
00046     void (*reseed)(struct PRNG *ctx, const uint8_t *seed);
00047     void (*generate)(struct PRNG *ctx, uint8_t *data, size_t len);
00048     uint8_t seed_len;
00049     uint8_t seeded;
00050 } PRNG;
00051
00060 INLINE void prng_reseed(PRNG *ctx, const uint8_t *seed)
00061 {
00062     ASSERT(ctx->reseed);
00063     ctx->reseed(ctx, seed);
00064     ctx->seeded = 1;
00065 }
00066
00070 INLINE size_t prng_seed_len(PRNG *ctx)
00071 {
00072     return ctx->seed_len;
00073 }
00074
00079 INLINE void prng_generate(PRNG *ctx, uint8_t *data, size_t len)
00080 {
00081     ASSERT(ctx->generate);
00082     ASSERT(ctx->seeded);
00083     ctx->generate(ctx, data, len);
00084 }
00085
00086
00087 #endif /* SEC_PRNG_H */


BeRTOS: proc.c File Reference

  • kern
Functions | Variables
proc.c File Reference

Simple cooperative and preemptive multitasking scheduler. More...

#include "proc_p.h"
#include "proc.h"
#include "cfg/cfg_proc.h"
#include <cfg/log.h>
#include "cfg/cfg_monitor.h"
#include <cfg/macros.h>
#include <cfg/module.h>
#include <cfg/depend.h>
#include <cpu/irq.h>
#include <cpu/types.h>
#include <cpu/attr.h>
#include <cpu/frame.h>
#include <string.h>

Go to the source code of this file.

Functions

void | proc_init (void)
Initialize the process subsystem (kernel).
struct Process * | proc_new_with_name (UNUSED_ARG(const char *, name), void(*entry)(void), iptr_t data, size_t stack_size, cpu_stack_t *stack_base)
Create a new process, starting at the provided entry point.
const char * | proc_name (struct Process *proc)
Return the name of the specified process.
const char * | proc_currentName (void)
Return the name of the currently running process.
void | proc_rename (struct Process *proc, const char *name)
Rename a process.
void | proc_setPri (struct Process *proc, int pri)
Change the scheduling priority of a process.
void | proc_entry (void)
Entry point for all the processes.
void | proc_exit (void)
Terminate the current process.
static void | proc_schedule (void)
Call the scheduler and eventually replace the current running process.
bool | proc_needPreempt (void)
Check if we need to schedule another task.
void | proc_preempt (void)
Preempt the current task.
void | proc_switch (void)
Give the control of the CPU to another process.
void | proc_wakeup (Process *proc)
Immediately wakeup a process, dispatching it to the CPU.
void | proc_yield (void)
Voluntarily release the CPU.

Variables

REGISTER List | proc_ready_list
Track ready processes.
REGISTER Process * | current_process
Track running processes.
static struct Process | main_process
The main process (the one that executes main()).

Detailed Description

Simple cooperative and preemptive multitasking scheduler.

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>
Andrea Righi <arighi@develer.com>

Definition in file proc.c.

Function Documentation

struct Process* proc_new_with_name | ( | UNUSED_ARG(const char *, name) | ,
 |  | void(*)(void) | entry,
 |  | iptr_t | data,
 |  | size_t | stack_size,
 |  | cpu_stack_t * | stack_base
 | ) |  | [read]

Create a new process, starting at the provided entry point.

Note:
The function
 proc_new(entry, data, stacksize, stack)
is a more convenient way to create a process, as you don't have to specify the name.
Returns:
Process structure of new created process if successful, NULL otherwise.

Definition at line 284 of file proc.c.

void proc_switch ( void )

Give the control of the CPU to another process.

Note:
Assume the current process has been already added to a wait queue.
Warning:
This should be considered an internal kernel function, even if it is allowed, usage from application code is strongly discouraged.

Definition at line 604 of file proc.c.

Variable Documentation

REGISTER Process* current_process

Track running processes.

Definition at line 127 of file proc.c.

struct Process main_process [static]

The main process (the one that executes main()).

Definition at line 130 of file proc.c.

REGISTER List proc_ready_list

Track ready processes.

Access to this list must be performed with interrupts disabled

Definition at line 120 of file proc.c.


BeRTOS: proc.c Source File

  • kern
proc.c
Go to the documentation of this file.
00001
00088 #include "proc_p.h"
00089 #include "proc.h"
00090
00091 #include "cfg/cfg_proc.h"
00092 #define LOG_LEVEL KERN_LOG_LEVEL
00093 #define LOG_FORMAT KERN_LOG_FORMAT
00094 #include <cfg/log.h>
00095
00096 #include "cfg/cfg_monitor.h"
00097 #include <cfg/macros.h>    // ROUND_UP2
00098 #include <cfg/module.h>
00099 #include <cfg/depend.h>    // CONFIG_DEPEND()
00100
00101 #include <cpu/irq.h>
00102 #include <cpu/types.h>
00103 #include <cpu/attr.h>
00104 #include <cpu/frame.h>
00105
00106 #if CONFIG_KERN_HEAP
00107     #include <struct/heap.h>
00108 #endif
00109
00110 #include <string.h>           /* memset() */
00111
00112 #define PROC_SIZE_WORDS (ROUND_UP2(sizeof(Process), sizeof(cpu_stack_t)) / sizeof(cpu_stack_t))
00113
00114 /*
00115  * The scheduer tracks ready processes by enqueuing them in the
00116  * ready list.
00117  *
00118  * \note Access to the list must occur while interrupts are disabled.
00119  */
00120 REGISTER List proc_ready_list;
00121
00122 /*
00123  * Holds a pointer to the TCB of the currently running process.
00124  *
00125  * \note User applications should use proc_current() to retrieve this value.
00126  */
00127 REGISTER Process *current_process;
00128
00130 static struct Process main_process;
00131
00132 #if CONFIG_KERN_HEAP
00133
00137 static HEAP_DEFINE_BUF(heap_buf, CONFIG_KERN_HEAP_SIZE);
00138 static Heap proc_heap;
00139
00140 /*
00141  * Keep track of zombie processes (processes that are exiting and need to
00142  * release some resources).
00143  *
00144  * \note Access to the list must occur while kernel preemption is disabled.
00145  */
00146 static List zombie_list;
00147
00148 #endif /* CONFIG_KERN_HEAP */
00149
00150 /*
00151  * Check if the process context switch can be performed directly by the
00152  * architecture-dependent asm_switch_context() or if it must be delayed
00153  * because we're in the middle of an ISR.
00154  *
00155  * Return true if asm_switch_context() can be executed, false
00156  * otherwise.
00157  *
00158  * NOTE: if an architecture does not implement IRQ_RUNNING() this function
00159  * always returns true.
00160  */
00161 #define CONTEXT_SWITCH_FROM_ISR()   (!IRQ_RUNNING())
00162
00163 /*
00164  * Save context of old process and switch to new process.
00165   */
00166 static void proc_context_switch(Process *next, Process *prev)
00167 {
00168     cpu_stack_t *dummy;
00169
00170     if (UNLIKELY(next == prev))
00171         return;
00172     /*
00173      * If there is no old process, we save the old stack pointer into a
00174      * dummy variable that we ignore.  In fact, this happens only when the
00175      * old process has just exited.
00176      */
00177     asm_switch_context(&next->stack, prev ? &prev->stack : &dummy);
00178 }
00179
00180 static void proc_initStruct(Process *proc)
00181 {
00182     /* Avoid warning for unused argument. */
00183     (void)proc;
00184
00185 #if CONFIG_KERN_SIGNALS
00186     proc->sig.recv = 0;
00187     proc->sig.wait = 0;
00188 #endif
00189
00190 #if CONFIG_KERN_HEAP
00191     proc->flags = 0;
00192 #endif
00193
00194 #if CONFIG_KERN_PRI
00195     proc->link.pri = 0;
00196 #endif
00197 }
00198
00199 MOD_DEFINE(proc);
00200
00201 void proc_init(void)
00202 {
00203     LIST_INIT(&proc_ready_list);
00204
00205 #if CONFIG_KERN_HEAP
00206     LIST_INIT(&zombie_list);
00207     heap_init(&proc_heap, heap_buf, sizeof(heap_buf));
00208 #endif
00209     /*
00210      * We "promote" the current context into a real process. The only thing we have
00211      * to do is create a PCB and make it current. We don't need to setup the stack
00212      * pointer because it will be written the first time we switch to another process.
00213      */
00214     proc_initStruct(&main_process);
00215     current_process = &main_process;
00216
00217 #if CONFIG_KERN_MONITOR
00218     monitor_init();
00219     monitor_add(current_process, "main");
00220 #endif
00221     MOD_INIT(proc);
00222 }
00223
00224
00225 #if CONFIG_KERN_HEAP
00226
00231 static void proc_freeZombies(void)
00232 {
00233     Process *proc;
00234
00235     while (1)
00236     {
00237         PROC_ATOMIC(proc = (Process *)list_remHead(&zombie_list));
00238         if (proc == NULL)
00239             return;
00240
00241         if (proc->flags & PF_FREESTACK)
00242         {
00243             PROC_ATOMIC(heap_freemem(&proc_heap, proc->stack_base,
00244                 proc->stack_size + PROC_SIZE_WORDS * sizeof(cpu_stack_t)));
00245         }
00246     }
00247 }
00248
00252 static void proc_addZombie(Process *proc)
00253 {
00254     Node *node;
00255 #if CONFIG_KERN_PREEMPT
00256     ASSERT(!proc_preemptAllowed());
00257 #endif
00258
00259 #if CONFIG_KERN_PRI
00260     node = &(proc)->link.link;
00261 #else
00262     node = &(proc)->link;
00263 #endif
00264     LIST_ASSERT_VALID(&zombie_list);
00265     ADDTAIL(&zombie_list, node);
00266 }
00267
00268 #endif /* CONFIG_KERN_HEAP */
00269
00284 struct Process *proc_new_with_name(UNUSED_ARG(const char *, name), void (*entry)(void), iptr_t data, size_t stack_size, cpu_stack_t *stack_base)
00285 {
00286     Process *proc;
00287     LOG_INFO("name=%s", name);
00288 #if CONFIG_KERN_HEAP
00289     bool free_stack = false;
00290
00291     /*
00292      * Free up resources of a zombie process.
00293      *
00294      * We're implementing a kind of lazy garbage collector here for
00295      * efficiency reasons: we can avoid to introduce overhead into another
00296      * kernel task dedicated to free up resources (e.g., idle) and we're
00297      * not introducing any overhead into the scheduler after a context
00298      * switch (that would be *very* bad, because the scheduler runs with
00299      * IRQ disabled).
00300      *
00301      * In this way we are able to release the memory of the zombie tasks
00302      * without disabling IRQs and without introducing any significant
00303      * overhead in any other kernel task.
00304      */
00305     proc_freeZombies();
00306
00307     /* Did the caller provide a stack for us? */
00308     if (!stack_base)
00309     {
00310         /* Did the caller specify the desired stack size? */
00311         if (!stack_size)
00312             stack_size = KERN_MINSTACKSIZE;
00313
00314         /* Allocate stack dinamically */
00315         PROC_ATOMIC(stack_base =
00316             (cpu_stack_t *)heap_allocmem(&proc_heap, stack_size));
00317         if (stack_base == NULL)
00318             return NULL;
00319
00320         free_stack = true;
00321     }
00322
00323 #else // CONFIG_KERN_HEAP
00324
00325     /* Stack must have been provided by the user */
00326     ASSERT2(IS_VALID_PTR(stack_base), "Invalid stack pointer. Did you forget to \
00327         enable CONFIG_KERN_HEAP?");
00328     ASSERT2(stack_size, "Stack size cannot be 0.");
00329
00330 #endif // CONFIG_KERN_HEAP
00331
00332 #if CONFIG_KERN_MONITOR
00333     /*
00334      * Fill-in the stack with a special marker to help debugging.
00335      * On 64bit platforms, CONFIG_KERN_STACKFILLCODE is larger
00336      * than an int, so the (int) cast is required to silence the
00337      * warning for truncating its size.
00338      */
00339     memset(stack_base, (int)CONFIG_KERN_STACKFILLCODE, stack_size);
00340 #endif
00341
00342     /* Initialize the process control block */
00343     if (CPU_STACK_GROWS_UPWARD)
00344     {
00345         proc = (Process *)stack_base;
00346         proc->stack = stack_base + PROC_SIZE_WORDS;
00347         // On some architecture stack should be aligned, so we do it.
00348         proc->stack = (cpu_stack_t *)((uintptr_t)proc->stack + (sizeof(cpu_aligned_stack_t) - ((uintptr_t)proc->stack % sizeof(cpu_aligned_stack_t))));
00349         if (CPU_SP_ON_EMPTY_SLOT)
00350             proc->stack++;
00351     }
00352     else
00353     {
00354         proc = (Process *)(stack_base + stack_size / sizeof(cpu_stack_t) - PROC_SIZE_WORDS);
00355         // On some architecture stack should be aligned, so we do it.
00356         proc->stack = (cpu_stack_t *)((uintptr_t)proc - ((uintptr_t)proc % sizeof(cpu_aligned_stack_t)));
00357         if (CPU_SP_ON_EMPTY_SLOT)
00358             proc->stack--;
00359     }
00360     /* Ensure stack is aligned */
00361     ASSERT((uintptr_t)proc->stack % sizeof(cpu_aligned_stack_t) == 0);
00362
00363     stack_size -= PROC_SIZE_WORDS * sizeof(cpu_stack_t);
00364     proc_initStruct(proc);
00365     proc->user_data = data;
00366
00367 #if CONFIG_KERN_HEAP | CONFIG_KERN_MONITOR
00368     proc->stack_base = stack_base;
00369     proc->stack_size = stack_size;
00370     #if CONFIG_KERN_HEAP
00371     if (free_stack)
00372         proc->flags |= PF_FREESTACK;
00373     #endif
00374 #endif
00375     proc->user_entry = entry;
00376     CPU_CREATE_NEW_STACK(proc->stack);
00377
00378 #if CONFIG_KERN_MONITOR
00379     monitor_add(proc, name);
00380 #endif
00381
00382     /* Add to ready list */
00383     ATOMIC(SCHED_ENQUEUE(proc));
00384
00385     return proc;
00386 }
00387
00393 const char *proc_name(struct Process *proc)
00394 {
00395 #if CONFIG_KERN_MONITOR
00396     return proc ? proc->monitor.name : "<NULL>";
00397 #else
00398     (void)proc;
00399     return "---";
00400 #endif
00401 }
00402
00404 const char *proc_currentName(void)
00405 {
00406     return proc_name(proc_current());
00407 }
00408
00410 void proc_rename(struct Process *proc, const char *name)
00411 {
00412 #if CONFIG_KERN_MONITOR
00413     monitor_rename(proc, name);
00414 #else
00415     (void)proc; (void)name;
00416 #endif
00417 }
00418
00419
00420 #if CONFIG_KERN_PRI
00421
00440 void proc_setPri(struct Process *proc, int pri)
00441 {
00442     if (proc->link.pri == pri)
00443         return;
00444
00445     proc->link.pri = pri;
00446
00447     if (proc != current_process)
00448         ATOMIC(sched_reenqueue(proc));
00449 }
00450 #endif // CONFIG_KERN_PRI
00451
00452 INLINE void proc_run(void)
00453 {
00454     void (*entry)(void) = current_process->user_entry;
00455
00456     LOG_INFO("New process starting at %p", entry);
00457     entry();
00458 }
00459
00463 void proc_entry(void)
00464 {
00465     /*
00466      * Return from a context switch assumes interrupts are disabled, so
00467      * we need to explicitly re-enable them as soon as possible.
00468      */
00469     IRQ_ENABLE;
00470     /* Call the actual process's entry point */
00471     proc_run();
00472     proc_exit();
00473 }
00474
00478 void proc_exit(void)
00479 {
00480     LOG_INFO("%p:%s", current_process, proc_currentName());
00481
00482 #if CONFIG_KERN_MONITOR
00483     monitor_remove(current_process);
00484 #endif
00485
00486     proc_forbid();
00487 #if CONFIG_KERN_HEAP
00488     /*
00489      * Set the task as zombie, its resources will be freed in proc_new() in
00490      * a lazy way, when another process will be created.
00491      */
00492     proc_addZombie(current_process);
00493 #endif
00494     current_process = NULL;
00495     proc_permit();
00496
00497     proc_switch();
00498
00499     /* never reached */
00500     ASSERT(0);
00501 }
00502
00506 static void proc_schedule(void)
00507 {
00508     Process *old_process = current_process;
00509
00510     IRQ_ASSERT_DISABLED();
00511
00512     /* Poll on the ready queue for the first ready process */
00513     LIST_ASSERT_VALID(&proc_ready_list);
00514     while (!(current_process = (struct Process *)list_remHead(&proc_ready_list)))
00515     {
00516         /*
00517          * Make sure we physically reenable interrupts here, no matter what
00518          * the current task status is. This is important because if we
00519          * are idle-spinning, we must allow interrupts, otherwise no
00520          * process will ever wake up.
00521          *
00522          * During idle-spinning, an interrupt can occur and it may
00523          * modify \p proc_ready_list. To ensure that compiler reload this
00524          * variable every while cycle we call CPU_MEMORY_BARRIER.
00525          * The memory barrier ensure that all variables used in this context
00526          * are reloaded.
00527          * \todo If there was a way to write sig_wait() so that it does not
00528          * disable interrupts while waiting, there would not be any
00529          * reason to do this.
00530          */
00531         IRQ_ENABLE;
00532         CPU_IDLE;
00533         MEMORY_BARRIER;
00534         IRQ_DISABLE;
00535     }
00536     if (CONTEXT_SWITCH_FROM_ISR())
00537         proc_context_switch(current_process, old_process);
00538     /* This RET resumes the execution on the new process */
00539     LOG_INFO("resuming %p:%s\n", current_process, proc_currentName());
00540 }
00541
00542 #if CONFIG_KERN_PREEMPT
00543 /* Global preemption nesting counter */
00544 cpu_atomic_t preempt_count;
00545
00546 /*
00547  * The time sharing interval: when a process is scheduled on a CPU it gets an
00548  * amount of CONFIG_KERN_QUANTUM clock ticks. When these ticks expires and
00549  * preemption is enabled a new process is selected to run.
00550  */
00551 int _proc_quantum;
00552
00556 bool proc_needPreempt(void)
00557 {
00558     if (UNLIKELY(current_process == NULL))
00559         return false;
00560     if (!proc_preemptAllowed())
00561         return false;
00562     if (LIST_EMPTY(&proc_ready_list))
00563         return false;
00564     return preempt_quantum() ? prio_next() > prio_curr() :
00565             prio_next() >= prio_curr();
00566 }
00567
00571 void proc_preempt(void)
00572 {
00573     IRQ_ASSERT_DISABLED();
00574     ASSERT(current_process);
00575
00576     /* Perform the kernel preemption */
00577     LOG_INFO("preempting %p:%s\n", current_process, proc_currentName());
00578     /* We are inside a IRQ context, so ATOMIC is not needed here */
00579     SCHED_ENQUEUE(current_process);
00580     preempt_reset_quantum();
00581     proc_schedule();
00582 }
00583 #endif /* CONFIG_KERN_PREEMPT */
00584
00585 /* Immediately switch to a particular process */
00586 static void proc_switchTo(Process *proc)
00587 {
00588     Process *old_process = current_process;
00589
00590     SCHED_ENQUEUE(current_process);
00591     preempt_reset_quantum();
00592     current_process = proc;
00593     proc_context_switch(current_process, old_process);
00594 }
00595
00604 void proc_switch(void)
00605 {
00606     ASSERT(proc_preemptAllowed());
00607     ATOMIC(
00608         preempt_reset_quantum();
00609         proc_schedule();
00610     );
00611 }
00612
00616 void proc_wakeup(Process *proc)
00617 {
00618     ASSERT(proc_preemptAllowed());
00619     ASSERT(current_process);
00620     IRQ_ASSERT_DISABLED();
00621
00622     if (prio_proc(proc) >= prio_curr())
00623         proc_switchTo(proc);
00624     else
00625         SCHED_ENQUEUE_HEAD(proc);
00626 }
00627
00631 void proc_yield(void)
00632 {
00633     Process *proc;
00634
00635     /*
00636      * Voluntary preemption while preemption is disabled is considered
00637      * illegal, as not very useful in practice.
00638      *
00639      * ASSERT if it happens.
00640      */
00641     ASSERT(proc_preemptAllowed());
00642     IRQ_ASSERT_ENABLED();
00643
00644     IRQ_DISABLE;
00645     proc = (struct Process *)list_remHead(&proc_ready_list);
00646     if (proc)
00647         proc_switchTo(proc);
00648     IRQ_ENABLE;
00649 }


BeRTOS: proc.h File Reference

  • kern
Defines | Functions
proc.h File Reference
#include "cfg/cfg_proc.h"
#include "cfg/cfg_signal.h"
#include "cfg/cfg_monitor.h"
#include <struct/list.h>
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <cpu/types.h>
#include <cpu/frame.h>

Go to the source code of this file.

Defines

#define | proc_new(entry, data, size, stack) proc_new_with_name(NULL,(entry),(data),(size),(stack))
Create a new named process and schedules it for execution.
#define | proc_allowed() proc_preemptAllowed()
Deprecated, use the proc_preemptAllowed() macro.
#define | PROC_ATOMIC(CODE)
Execute a block of CODE atomically with respect to task scheduling.
#define | KERN_MINSTACKSIZE
Default stack size for each thread, in bytes.
#define | PROC_DEFINE_STACK(name, size)
Utility macro to allocate a stack of size size.

Functions

void | proc_init (void)
Initialize the process subsystem (kernel).
void | proc_exit (void)
Terminate the execution of the current process.
void | proc_yield (void)
Voluntarily release the CPU.
bool | proc_needPreempt (void)
Check if we need to schedule another task.
void | proc_preempt (void)
Preempt the current task.
void | proc_rename (struct Process *proc, const char *name)
Rename a process.
const char * | proc_name (struct Process *proc)
Return the name of the specified process.
const char * | proc_currentName (void)
Return the name of the currently running process.
iptr_t | proc_currentUserData (void)
Return a pointer to the user data of the current process.
struct Process * | proc_current (void)
Return the context structure of the currently running process.
void | proc_setPri (struct Process *proc, int pri)
Change the scheduling priority of a process.
void | proc_forbid (void)
Disable preemptive task switching.
void | proc_permit (void)
Re-enable preemptive task switching.
bool | proc_preemptAllowed (void)

Detailed Description

Definition in file proc.h.


BeRTOS: proc.h Source File

  • kern
proc.h
Go to the documentation of this file.
00001
00092 #ifndef KERN_PROC_H
00093 #define KERN_PROC_H
00094
00095 #include "cfg/cfg_proc.h"
00096 #include "cfg/cfg_signal.h"
00097 #include "cfg/cfg_monitor.h"
00098
00099 #include <struct/list.h> // Node, PriNode
00100
00101 #include <cfg/compiler.h>
00102 #include <cfg/debug.h> // ASSERT()
00103
00104 #include <cpu/types.h> // cpu_stack_t
00105 #include <cpu/frame.h> // CPU_SAVED_REGS_CNT
00106
00107 /*
00108  * WARNING: struct Process is considered private, so its definition can change any time
00109  * without notice. DO NOT RELY on any field defined here, use only the interface
00110  * functions below.
00111  *
00112  * You have been warned.
00113  */
00114 typedef struct Process
00115 {
00116 #if CONFIG_KERN_PRI
00117     PriNode      link;
00118 #else
00119     Node         link;
00120 #endif
00121     cpu_stack_t  *stack;
00122     iptr_t       user_data;
00124 #if CONFIG_KERN_SIGNALS
00125     Signal       sig;
00126 #endif
00127
00128 #if CONFIG_KERN_HEAP
00129     uint16_t     flags;
00130 #endif
00131
00132 #if CONFIG_KERN_HEAP | CONFIG_KERN_MONITOR
00133     cpu_stack_t  *stack_base;
00134     size_t       stack_size;
00135 #endif
00136
00137     /* The actual process entry point */
00138     void (*user_entry)(void);
00139
00140 #if CONFIG_KERN_MONITOR
00141     struct ProcMonitor
00142     {
00143         Node        link;
00144         const char *name;
00145     } monitor;
00146 #endif
00147
00148 } Process;
00149
00154 void proc_init(void);
00155
00156 struct Process *proc_new_with_name(const char *name, void (*entry)(void), iptr_t data, size_t stacksize, cpu_stack_t *stack);
00157
00158 #if !CONFIG_KERN_MONITOR
00159
00178     #define proc_new(entry,data,size,stack) proc_new_with_name(NULL,(entry),(data),(size),(stack))
00179 #else
00180     #define proc_new(entry,data,size,stack) proc_new_with_name(#entry,(entry),(data),(size),(stack))
00181 #endif
00182
00186 void proc_exit(void);
00187
00188 /*
00189  * Public scheduling class methods.
00190  */
00191 void proc_yield(void);
00192
00193 #if CONFIG_KERN_PREEMPT
00194 bool proc_needPreempt(void);
00195 void proc_preempt(void);
00196 #else
00197 INLINE bool proc_needPreempt(void)
00198 {
00199     return false;
00200 }
00201
00202 INLINE void proc_preempt(void)
00203 {
00204 }
00205 #endif
00206
00207 void proc_rename(struct Process *proc, const char *name);
00208 const char *proc_name(struct Process *proc);
00209 const char *proc_currentName(void);
00210
00218 INLINE iptr_t proc_currentUserData(void)
00219 {
00220     extern struct Process *current_process;
00221     return current_process->user_data;
00222 }
00223
00224 int proc_testSetup(void);
00225 int proc_testRun(void);
00226 int proc_testTearDown(void);
00227
00235 INLINE struct Process *proc_current(void)
00236 {
00237     extern struct Process *current_process;
00238     return current_process;
00239 }
00240
00241 #if CONFIG_KERN_PRI
00242     void proc_setPri(struct Process *proc, int pri);
00243 #else
00244     INLINE void proc_setPri(UNUSED_ARG(struct Process *,proc), UNUSED_ARG(int, pri))
00245     {
00246     }
00247 #endif
00248
00249 #if CONFIG_KERN_PREEMPT
00250
00268     INLINE void proc_forbid(void)
00269     {
00270         extern cpu_atomic_t preempt_count;
00271         /*
00272          * We don't need to protect the counter against other processes.
00273          * The reason why is a bit subtle.
00274          *
00275          * If a process gets here, preempt_forbid_cnt can be either 0,
00276          * or != 0.  In the latter case, preemption is already disabled
00277          * and no concurrency issues can occur.
00278          *
00279          * In the former case, we could be preempted just after reading the
00280          * value 0 from memory, and a concurrent process might, in fact,
00281          * bump the value of preempt_forbid_cnt under our nose!
00282          *
00283          * BUT: if this ever happens, then we won't get another chance to
00284          * run until the other process calls proc_permit() to re-enable
00285          * preemption.  At this point, the value of preempt_forbid_cnt
00286          * must be back to 0, and thus what we had originally read from
00287          * memory happens to be valid.
00288          *
00289          * No matter how hard you think about it, and how complicated you
00290          * make your scenario, the above holds true as long as
00291          * "preempt_forbid_cnt != 0" means that no task switching is
00292          * possible.
00293          */
00294         ++preempt_count;
00295
00296         /*
00297          * Make sure preempt_count is flushed to memory so the preemption
00298          * softirq will see the correct value from now on.
00299          */
00300         MEMORY_BARRIER;
00301     }
00302
00308     INLINE void proc_permit(void)
00309     {
00310         extern cpu_atomic_t preempt_count;
00311
00312         /*
00313          * This is to ensure any global state changed by the process gets
00314          * flushed to memory before task switching is re-enabled.
00315          */
00316         MEMORY_BARRIER;
00317         /* No need to protect against interrupts here. */
00318         ASSERT(preempt_count > 0);
00319         --preempt_count;
00320         /*
00321          * This ensures preempt_count is flushed to memory immediately so the
00322          * preemption interrupt sees the correct value.
00323          */
00324         MEMORY_BARRIER;
00325     }
00326
00332     INLINE bool proc_preemptAllowed(void)
00333     {
00334         extern cpu_atomic_t preempt_count;
00335         return (preempt_count == 0);
00336     }
00337 #else /* CONFIG_KERN_PREEMPT */
00338     #define proc_forbid() /* NOP */
00339     #define proc_permit() /* NOP */
00340     #define proc_preemptAllowed() (true)
00341 #endif /* CONFIG_KERN_PREEMPT */
00342
00344 #define proc_allowed() proc_preemptAllowed()
00345
00349 #define PROC_ATOMIC(CODE) \
00350     do { \
00351         proc_forbid(); \
00352         CODE; \
00353         proc_permit(); \
00354     } while(0)
00355
00374 #if (ARCH & ARCH_EMUL)
00375     /* We need a large stack because system libraries are bloated */
00376     #define KERN_MINSTACKSIZE 65536
00377 #else
00378     #if CONFIG_KERN_PREEMPT
00379         /*
00380          * A preemptible kernel needs a larger stack compared to the
00381          * cooperative case. A task can be interrupted anytime in each
00382          * node of the call graph, at any level of depth. This may
00383          * result in a higher stack consumption, to call the ISR, save
00384          * the current user context and to execute the kernel
00385          * preemption routines implemented as ISR prologue and
00386          * epilogue. All these calls are nested into the process stack.
00387          *
00388          * So, to reduce the risk of stack overflow/underflow problems
00389          * add a x2 to the portion stack reserved to the user process.
00390          */
00391         #define KERN_MINSTACKSIZE \
00392             (sizeof(Process) + CPU_SAVED_REGS_CNT * 2 * sizeof(cpu_stack_t) \
00393             + 32 * sizeof(int) * 2)
00394     #else
00395         #define KERN_MINSTACKSIZE \
00396             (sizeof(Process) + CPU_SAVED_REGS_CNT * 2 * sizeof(cpu_stack_t) \
00397             + 32 * sizeof(int))
00398     #endif /* CONFIG_KERN_PREEMPT */
00399
00400 #endif
00401
00402 #ifndef CONFIG_KERN_MINSTACKSIZE
00403     /* For backward compatibility */
00404     #define CONFIG_KERN_MINSTACKSIZE KERN_MINSTACKSIZE
00405 #else
00406     #warning FIXME: This macro is deprecated, use KERN_MINSTACKSIZE instead
00407 #endif
00408
00420 #define PROC_DEFINE_STACK(name, size) \
00421     cpu_stack_t name[((size) + sizeof(cpu_stack_t) - 1) / sizeof(cpu_stack_t)]; \
00422     STATIC_ASSERT((size) >= KERN_MINSTACKSIZE);
00423
00424 /* Memory fill codes to help debugging */
00425 #if CONFIG_KERN_MONITOR
00426     #include <cpu/types.h>
00427     #if (SIZEOF_CPUSTACK_T == 1)
00428         /* 8bit cpu_stack_t */
00429         #define CONFIG_KERN_STACKFILLCODE  0xA5
00430         #define CONFIG_KERN_MEMFILLCODE    0xDB
00431     #elif (SIZEOF_CPUSTACK_T == 2)
00432         /* 16bit cpu_stack_t */
00433         #define CONFIG_KERN_STACKFILLCODE  0xA5A5
00434         #define CONFIG_KERN_MEMFILLCODE    0xDBDB
00435     #elif (SIZEOF_CPUSTACK_T == 4)
00436         /* 32bit cpu_stack_t */
00437         #define CONFIG_KERN_STACKFILLCODE  0xA5A5A5A5UL
00438         #define CONFIG_KERN_MEMFILLCODE    0xDBDBDBDBUL
00439     #elif (SIZEOF_CPUSTACK_T == 8)
00440         /* 64bit cpu_stack_t */
00441         #define CONFIG_KERN_STACKFILLCODE  0xA5A5A5A5A5A5A5A5ULL
00442         #define CONFIG_KERN_MEMFILLCODE    0xDBDBDBDBDBDBDBDBULL
00443     #else
00444         #error No cpu_stack_t size supported!
00445     #endif
00446 #endif
00447  //defgroup kern_proc
00448
00449 #endif /* KERN_PROC_H */


BeRTOS: proc_p.h File Reference

  • kern
Defines | Functions | Variables
proc_p.h File Reference

Internal scheduler structures and definitions for processes. More...

#include "cfg/cfg_proc.h"
#include "cfg/cfg_monitor.h"
#include <cfg/compiler.h>
#include <cpu/types.h>
#include <cpu/irq.h>
#include <kern/proc.h>

Go to the source code of this file.

Defines

#define | SCHED_ENQUEUE(proc)
Enqueue a process in the ready list.
Flags for Process.flags.
#define | PF_FREESTACK BV(0)
Free the stack when process dies.

Functions

EXTERN_C void | asm_switch_context (cpu_stack_t **new_sp, cpu_stack_t **save_sp)
CPU dependent context switching routines.
void | sched_reenqueue (struct Process *proc)
Changes the priority of an already enqueued process.
void | proc_entry (void)
Entry point for all the processes.
void | proc_switch (void)
Give the control of the CPU to another process.
void | proc_wakeup (Process *proc)
Immediately wakeup a process, dispatching it to the CPU.

Variables

REGISTER Process * | current_process
Track running processes.
REGISTER List | proc_ready_list
Track ready processes.

Detailed Description

Internal scheduler structures and definitions for processes.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file proc_p.h.

Define Documentation

#define SCHED_ENQUEUE ( proc )
Value:
do { \
        IRQ_ASSERT_DISABLED(); \
        LIST_ASSERT_VALID(&proc_ready_list); \
        SCHED_ENQUEUE_INTERNAL(proc); \
    } while (0)

Enqueue a process in the ready list.

Always use this macro to instert a process in the ready list, as its might vary to implement a different scheduling algorithms.

Note:
Access to the scheduler ready list must be performed with interrupts disabled.

Definition at line 108 of file proc_p.h.

Function Documentation

EXTERN_C void asm_switch_context | ( | cpu_stack_t ** | new_sp,
 |  | cpu_stack_t ** | save_sp
 | ) |  |

CPU dependent context switching routines.

Saving and restoring the context on the stack is done by a CPU-dependent support routine which usually needs to be written in assembly.

void proc_switch ( void )

Give the control of the CPU to another process.

Note:
Assume the current process has been already added to a wait queue.
Warning:
This should be considered an internal kernel function, even if it is allowed, usage from application code is strongly discouraged.

Definition at line 604 of file proc.c.

void sched_reenqueue ( struct Process * proc ) [inline]

Changes the priority of an already enqueued process.

Searches and removes the process from the ready list, then uses LIST_ENQUEUE(() to insert again to fix priority.

No action is performed for processes that aren't in the ready list, eg. in semaphore queues.

Note:
Performance could be improved with a different implementation of priority list.

Definition at line 132 of file proc_p.h.

Variable Documentation

REGISTER Process* current_process

Track running processes.

Definition at line 127 of file proc.c.

REGISTER List proc_ready_list

Track ready processes.

Access to this list must be performed with interrupts disabled

Definition at line 120 of file proc.c.


BeRTOS: proc_p.h Source File

  • kern
proc_p.h
Go to the documentation of this file.
00001
00039 #ifndef KERN_PROC_P_H
00040 #define KERN_PROC_P_H
00041
00042 #include "cfg/cfg_proc.h"
00043 #include "cfg/cfg_monitor.h"
00044
00045 #include <cfg/compiler.h>
00046
00047 #include <cpu/types.h>        /* for cpu_stack_t */
00048 #include <cpu/irq.h>          // IRQ_ASSERT_DISABLED()
00049
00050 #include <kern/proc.h>   // struct Process
00051
00052 #ifndef asm_switch_context
00053
00059 EXTERN_C void asm_switch_context(cpu_stack_t **new_sp, cpu_stack_t **save_sp);
00060 #endif
00061
00066 #define PF_FREESTACK  BV(0)
00067 /*\}*/
00068
00069
00071 extern REGISTER Process *current_process;
00072
00078 extern REGISTER List     proc_ready_list;
00079
00080 #if CONFIG_KERN_PRI
00081     #define prio_next() (LIST_EMPTY(&proc_ready_list) ? INT_MIN : \
00082                     ((PriNode *)LIST_HEAD(&proc_ready_list))->pri)
00083     #define prio_proc(proc) (proc->link.pri)
00084     #define prio_curr() prio_proc(current_process)
00085
00086     #define SCHED_ENQUEUE_INTERNAL(proc) \
00087             LIST_ENQUEUE(&proc_ready_list, &(proc)->link)
00088     #define SCHED_ENQUEUE_HEAD_INTERNAL(proc) \
00089             LIST_ENQUEUE_HEAD(&proc_ready_list, &(proc)->link)
00090 #else
00091     #define prio_next() 0
00092     #define prio_proc(proc) 0
00093     #define prio_curr() 0
00094
00095     #define SCHED_ENQUEUE_INTERNAL(proc) ADDTAIL(&proc_ready_list, &(proc)->link)
00096     #define SCHED_ENQUEUE_HEAD_INTERNAL(proc) ADDHEAD(&proc_ready_list, &(proc)->link)
00097 #endif
00098
00108 #define SCHED_ENQUEUE(proc)  do { \
00109         IRQ_ASSERT_DISABLED(); \
00110         LIST_ASSERT_VALID(&proc_ready_list); \
00111         SCHED_ENQUEUE_INTERNAL(proc); \
00112     } while (0)
00113
00114 #define SCHED_ENQUEUE_HEAD(proc)  do { \
00115         IRQ_ASSERT_DISABLED(); \
00116         LIST_ASSERT_VALID(&proc_ready_list); \
00117         SCHED_ENQUEUE_HEAD_INTERNAL(proc); \
00118     } while (0)
00119
00120
00121 #if CONFIG_KERN_PRI
00122
00132 INLINE void sched_reenqueue(struct Process *proc)
00133 {
00134     IRQ_ASSERT_DISABLED();
00135     LIST_ASSERT_VALID(&proc_ready_list);
00136     Node *n;
00137     PriNode *pos = NULL;
00138     FOREACH_NODE(n, &proc_ready_list)
00139     {
00140         if (n == &proc->link.link)
00141         {
00142             pos = (PriNode *)n;
00143             break;
00144         }
00145     }
00146
00147     // only remove and enqueue again if process is already in the ready list
00148     // otherwise leave it alone
00149     if (pos)
00150     {
00151         REMOVE(&proc->link.link);
00152         LIST_ENQUEUE(&proc_ready_list, &proc->link);
00153     }
00154 }
00155 #endif //CONFIG_KERN_PRI
00156
00157 /* Process trampoline */
00158 void proc_entry(void);
00159
00160 /* Schedule another process *without* adding the current one to the ready list. */
00161 void proc_switch(void);
00162
00163 /* Immediately schedule a particular process bypassing the scheduler. */
00164 void proc_wakeup(Process *proc);
00165
00166 /* Initialize a scheduler class. */
00167 void proc_schedInit(void);
00168
00169 #if CONFIG_KERN_MONITOR
00170
00171     void monitor_init(void);
00172
00174     void monitor_add(Process *proc, const char *name);
00175
00177     void monitor_remove(Process *proc);
00178
00180     void monitor_rename(Process *proc, const char *name);
00181 #endif /* CONFIG_KERN_MONITOR */
00182
00183 /*
00184  * Quantum related macros are used in the
00185  * timer module and must be empty when
00186  * kernel is disabled.
00187  */
00188 #if (CONFIG_KERN && CONFIG_KERN_PREEMPT)
00189 INLINE int preempt_quantum(void)
00190 {
00191     extern int _proc_quantum;
00192     return _proc_quantum;
00193 }
00194
00195 INLINE void proc_decQuantum(void)
00196 {
00197     extern int _proc_quantum;
00198     if (_proc_quantum > 0)
00199         _proc_quantum--;
00200 }
00201
00202 INLINE void preempt_reset_quantum(void)
00203 {
00204     extern int _proc_quantum;
00205     _proc_quantum = CONFIG_KERN_QUANTUM;
00206 }
00207 #else /* !(CONFIG_KERN && CONFIG_KERN_PREEMPT) */
00208 INLINE int preempt_quantum(void)
00209 {
00210     return 0;
00211 }
00212
00213 INLINE void proc_decQuantum(void)
00214 {
00215 }
00216
00217 INLINE void preempt_reset_quantum(void)
00218 {
00219 }
00220 #endif /* (CONFIG_KERN && CONFIG_KERN_PREEMPT) */
00221
00222 #endif /* KERN_PROC_P_H */


BeRTOS: pwm.c File Reference

  • drv
Functions
pwm.c File Reference

PWM driver (implementation) More...

#include "cfg/cfg_pwm.h"
#include <cfg/macros.h>
#include <cfg/module.h>
#include <cfg/log.h>
#include <cfg/debug.h>
#include <drv/pwm.h>
#include <PP_STRINGIZE(drv/PP_CAT3(pwm, _, CPU_ID).h)>
#include <cpu/types.h>
#include <cpu/irq.h>
#include <string.h>

Go to the source code of this file.

Functions

void | pwm_setDuty (Pwm *ctx, pwm_duty_t duty)
Set the duty cycle of the PWM channel linked to ctx.
void | pwm_setFrequency (Pwm *ctx, pwm_freq_t freq)
Set PWM frequency of channel linked to ctx.
void | pwm_setPolarity (Pwm *ctx, PwmPolarity pol)
Set PWM polarity of pwm channel linked to ctx.
void | pwm_enable (Pwm *ctx, bool enable)
Enable/Disable the pwm channel linked to ctx.
void | pwm_init (Pwm *ctx, unsigned channel)
Initialize PWM driver.

Detailed Description

PWM driver (implementation)

Author:
Francesco Sacchi <batt@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file pwm.c.


BeRTOS: pwm.c Source File

  • drv
pwm.c
Go to the documentation of this file.
00001
00040 #include "cfg/cfg_pwm.h"
00041
00042 #include <cfg/macros.h>
00043 #include <cfg/module.h>
00044
00045 // Define logging setting (for cfg/log.h module).
00046 #define LOG_LEVEL         PWM_LOG_LEVEL
00047 #define LOG_VERBOSITY     PWM_LOG_FORMAT
00048
00049 #include <cfg/log.h>
00050 #include <cfg/debug.h>
00051
00052 #include <drv/pwm.h>
00053
00054 #include CPU_HEADER(pwm)
00055
00056 #include <cpu/types.h>
00057 #include <cpu/irq.h>
00058
00059 #include <string.h>
00060
00061 #if CFG_PWM_ENABLE_OLD_API
00062
00069     void pwm_setDuty(PwmDev dev, pwm_duty_t duty)
00070     {
00071         pwm_period_t period = 0;
00072         pwm_duty_t real_duty = 0;
00073
00074         duty = MIN(duty, PWM_MAX_DUTY);
00075
00076         period = pwm_hw_getPeriod(dev);
00077
00078         real_duty = (uint64_t)(duty * period) >> (uint64_t)PWM_MAX_PERIOD_LOG2;
00079
00080         LOG_INFO("real_duty[%d] duty[%d], period[%d]\n", real_duty, duty, period);
00081         pwm_hw_setDutyUnlock(dev, real_duty);
00082     }
00083
00093     void pwm_setFrequency(PwmDev dev, pwm_freq_t freq)
00094     {
00095         pwm_hw_setFrequency(dev, freq);
00096     }
00097
00103     void pwm_enable(PwmDev dev, bool state)
00104     {
00105         if (state)
00106             pwm_hw_enable(dev);
00107         else
00108             pwm_hw_disable(dev);
00109     }
00110
00111     MOD_DEFINE(pwm);
00112
00117     void pwm_init(void)
00118     {
00119         cpu_flags_t flags;
00120         PwmDev dev;
00121
00122         IRQ_SAVE_DISABLE(flags);
00123
00124         pwm_hw_init();
00125
00126         /* set all pwm to 0 */
00127         for (dev = 0; dev < PWM_CNT; dev++)
00128             pwm_setDuty(dev, 0);
00129
00130         IRQ_RESTORE(flags);
00131         MOD_INIT(pwm);
00132     }
00133 #endif
00134
00135 #if !CFG_PWM_ENABLE_OLD_API || defined(__doxygen__)
00136
00137     INLINE void setRealDuty(Pwm *ctx, pwm_duty_t duty)
00138     {
00139         if (ctx->pol == PWM_POL_LOW_PULSE)
00140             duty = PWM_MAX_DUTY - duty;
00141
00142         pwm_hwreg_t period = pwm_hw_getPeriod(ctx);
00143         pwm_hwreg_t hw_duty;
00144
00145         switch (duty)
00146         {
00147         case 0:
00148             hw_duty = 0;
00149             break;
00150         case PWM_MAX_DUTY:
00151             hw_duty = period;
00152             break;
00153         default:
00154             hw_duty = (uint64_t)(duty * period) >> (uint64_t)PWM_MAX_PERIOD_LOG2;
00155         }
00156
00157         pwm_hw_setDuty(ctx, hw_duty);
00158     }
00159
00168     void pwm_setDuty(Pwm *ctx, pwm_duty_t duty)
00169     {
00170         ctx->duty = duty;
00171
00172         if (ctx->enabled)
00173             setRealDuty(ctx, duty);
00174     }
00175
00185     void pwm_setFrequency(Pwm *ctx, pwm_freq_t freq)
00186     {
00187         pwm_hw_setFrequency(ctx, freq);
00188         pwm_enable(ctx, ctx->enabled);
00189     }
00190
00202     void pwm_setPolarity(Pwm *ctx, PwmPolarity pol)
00203     {
00204         ctx->pol = pol;
00205         pwm_enable(ctx, ctx->enabled);
00206     }
00207
00220     void pwm_enable(Pwm *ctx, bool enable)
00221     {
00222         ctx->enabled = enable;
00223
00224         if (enable)
00225             setRealDuty(ctx, ctx->duty);
00226         else
00227             setRealDuty(ctx, 0);
00228     }
00229
00237     void pwm_init(Pwm *ctx, unsigned channel)
00238     {
00239         memset(ctx, 0, sizeof(*ctx));
00240         ctx->ch = channel;
00241
00242         pwm_hw_init(ctx, channel);
00243     }
00244
00245 #endif
00246
00247


BeRTOS: pwm.h File Reference

  • drv
Data Structures | Defines | Typedefs | Enumerations | Functions
pwm.h File Reference
#include <cpu/attr.h>
#include <cfg/compiler.h>
#include "cfg/cfg_pwm.h"

Go to the source code of this file.

Data Structures

struct | Pwm
PWM context structure. More...

Defines

#define | PWM_MAX_DUTY ((pwm_duty_t)0xFFFF)
Maximum PWM duty cycle value (100%)

Typedefs

typedef uint16_t | pwm_duty_t
Type for PWM duty cycle.
typedef uint32_t | pwm_freq_t
Type for PWM frequency.

Enumerations

enum | PwmPolarity { PWM_POL_HIGH_PULSE, PWM_POL_POSITIVE = PWM_POL_HIGH_PULSE, PWM_POL_LOW_PULSE, PWM_POL_NEGATIVE = PWM_POL_LOW_PULSE }
Enum describing PWM polarities. More...

Functions

void | pwm_setDuty (Pwm *ctx, pwm_duty_t duty)
Set the duty cycle of the PWM channel linked to ctx.
void | pwm_setFrequency (Pwm *ctx, pwm_freq_t freq)
Set PWM frequency of channel linked to ctx.
void | pwm_setPolarity (Pwm *ctx, PwmPolarity pol)
Set PWM polarity of pwm channel linked to ctx.
void | pwm_enable (Pwm *ctx, bool state)
Enable/Disable the pwm channel linked to ctx.
void | pwm_init (Pwm *ctx, unsigned channel)
Initialize PWM driver.

Detailed Description

Definition in file pwm.h.


BeRTOS: pwm.h Source File

  • drv
pwm.h
Go to the documentation of this file.
00001
00045 #ifndef DRV_PWM_H
00046 #define DRV_PWM_H
00047
00048 #include <cpu/attr.h>
00049
00050 #include <cfg/compiler.h>
00051 #include "cfg/cfg_pwm.h"
00052
00056 #define PWM_MAX_DUTY              ((pwm_duty_t)0xFFFF)
00057 #define PWM_MAX_PERIOD                         0xFFFF
00058 #define PWM_MAX_PERIOD_LOG2                        16
00059
00065 typedef uint16_t pwm_duty_t;
00066
00071 typedef uint32_t pwm_freq_t;
00072
00073 #if !CFG_PWM_ENABLE_OLD_API || defined(__doxygen__)
00074
00094     typedef enum PwmPolarity
00095     {
00097         PWM_POL_HIGH_PULSE,
00099         PWM_POL_POSITIVE = PWM_POL_HIGH_PULSE,
00101         PWM_POL_LOW_PULSE,
00103         PWM_POL_NEGATIVE = PWM_POL_LOW_PULSE,
00104     } PwmPolarity;
00105
00106     struct PwmHardware; //Fwd declaration
00107
00111     typedef struct Pwm
00112     {
00113         unsigned ch;
00114         pwm_duty_t duty;
00115         PwmPolarity pol;
00116         bool enabled;
00117         struct PwmHardware *hw;
00118     } Pwm;
00119
00120     void pwm_setDuty(Pwm *ctx, pwm_duty_t duty);
00121     void pwm_setFrequency(Pwm *ctx, pwm_freq_t freq);
00122     void pwm_setPolarity(Pwm *ctx, PwmPolarity pol);
00123     void pwm_enable(Pwm *ctx, bool state);
00124     void pwm_init(Pwm *ctx, unsigned channel); //defgroup pwm_api
00126 #endif
00127
00128
00129 #if CFG_PWM_ENABLE_OLD_API
00130
00141     #include CPU_HEADER(pwm)
00142     #include "hw/pwm_map.h"
00143
00152     INLINE void pwm_setPolarity(PwmDev dev, bool pol)
00153     {
00154         pwm_hw_setPolarity(dev, pol);
00155     }
00156
00157     void pwm_setDuty(PwmDev dev, pwm_duty_t duty);
00158     void pwm_setFrequency(PwmDev dev, pwm_freq_t freq);
00159     void pwm_enable(PwmDev dev, bool state);
00160     void pwm_init(void); //defgroup pwm_old_api
00162 #endif
00163
00164 /*
00165  * Test function prototypes.
00166  *
00167  * See pwm_test.c for implemntation of these functions.
00168  */
00169 void pwm_testRun(void);
00170 int pwm_testSetup(void);
00171 /* For backward compatibility */
00172 #define pwm_testSetUp() pwm_testSetup()
00173 int pwm_testTearDown(void);
00174
00175  //defgroup pwm_driver
00177
00178 #endif /* DRV_PWM_H */


BeRTOS: pwm_arm.c File Reference

  • cpu
  • arm
  • drv
pwm_arm.c File Reference

Low-level PWM module for ARM (inplementation). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level PWM module for ARM (inplementation).

Author:
Daniele Basile <asterix@develer.com>

This module is automatically included so no need to include in test list.

Definition in file pwm_arm.c.


BeRTOS: pwm_arm.c Source File

  • cpu
  • arm
  • drv
pwm_arm.c
Go to the documentation of this file.
00001
00044 #ifndef WIZ_AUTOGEN
00045     #warning This file is deprecated, you should use pwm_at91.c
00046
00047     #include <cpu/detect.h>
00048
00049     #if CPU_ARM_AT91
00050         #include "pwm_at91.c"
00051     /*#elif  Add other ARM families here */
00052     #else
00053         #error Unknown CPU
00054     #endif
00055 #endif  /* WIZ_AUTOGEN */
00056


BeRTOS: pwm_arm.h File Reference

  • cpu
  • arm
  • drv
pwm_arm.h File Reference

Low-level PWM module for ARM (interface). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level PWM module for ARM (interface).

Author:
Daniele Basile <asterix@develer.com>

Definition in file pwm_arm.h.


BeRTOS: pwm_arm.h Source File

  • cpu
  • arm
  • drv
pwm_arm.h
Go to the documentation of this file.
00001
00040 #include <cpu/detect.h>
00041
00042 #if CPU_ARM_AT91
00043     #include "pwm_at91.h"
00044 /*#elif  Add other ARM families here */
00045 #else
00046     #error Unknown CPU
00047 #endif


BeRTOS: pwm_at91.c File Reference

  • cpu
  • arm
  • drv
pwm_at91.c File Reference

PWM hardware-specific implementation. More...

#include <drv/pwm.h>
#include "pwm_at91.h"
#include <hw/hw_cpufreq.h>
#include "cfg/cfg_pwm.h"
#include <cfg/log.h>
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <io/arm.h>
#include <cpu/irq.h>

Go to the source code of this file.

Detailed Description

PWM hardware-specific implementation.

Author:
Daniele Basile <asterix@develer.com>
Francesco Sacchi <batt@develer.com>

Definition in file pwm_at91.c.


BeRTOS: pwm_at91.c Source File

  • cpu
  • arm
  • drv
pwm_at91.c
Go to the documentation of this file.
00001
00040 #include <drv/pwm.h>
00041 #include "pwm_at91.h"
00042 #include <hw/hw_cpufreq.h>
00043 #include "cfg/cfg_pwm.h"
00044
00045 // Define logging setting (for cfg/log.h module).
00046 #define LOG_LEVEL         PWM_LOG_LEVEL
00047 #define LOG_FORMAT        PWM_LOG_FORMAT
00048 #include <cfg/log.h>
00049
00050 #include <cfg/macros.h>
00051 #include <cfg/debug.h>
00052
00053 #include <io/arm.h>
00054 #include <cpu/irq.h>
00055
00056 #define PWM_HW_MAX_PRESCALER_STEP         10
00057 #define PWM_HW_MAX_PERIOD             0xFFFF
00058
00059 #if CFG_PWM_ENABLE_OLD_API
00060     #include "hw/pwm_map.h"
00061
00067     static PwmChannel pwm_map[PWM_CNT] =
00068     {
00069         {//PWM Channel 0
00070             .duty_zero = false,
00071             .pol = false,
00072             .pwm_pin = BV(PWM0),
00073             .mode_reg = &PWM_CMR0,
00074             .duty_reg = &PWM_CDTY0,
00075             .period_reg = &PWM_CPRD0,
00076             .update_reg = &PWM_CUPD0,
00077         },
00078         {//PWM Channel 1
00079             .duty_zero = false,
00080             .pol = false,
00081             .pwm_pin = BV(PWM1),
00082             .mode_reg = &PWM_CMR1,
00083             .duty_reg = &PWM_CDTY1,
00084             .period_reg = &PWM_CPRD1,
00085             .update_reg = &PWM_CUPD1,
00086         },
00087         {//PWM Channel 2
00088             .duty_zero = false,
00089             .pol = false,
00090             .pwm_pin = BV(PWM2),
00091             .mode_reg = &PWM_CMR2,
00092             .duty_reg = &PWM_CDTY2,
00093             .period_reg = &PWM_CPRD2,
00094             .update_reg = &PWM_CUPD2,
00095         },
00096         {//PWM Channel 3
00097             .duty_zero = false,
00098             .pol = false,
00099             .pwm_pin = BV(PWM3),
00100             .mode_reg = &PWM_CMR3,
00101             .duty_reg = &PWM_CDTY3,
00102             .period_reg = &PWM_CPRD3,
00103             .update_reg = &PWM_CUPD3,
00104         }
00105     };
00106
00107
00113     pwm_period_t pwm_hw_getPeriod(PwmDev dev)
00114     {
00115         return *pwm_map[dev].period_reg;
00116     }
00117
00123     void pwm_hw_setFrequency(PwmDev dev, uint32_t freq)
00124     {
00125         uint32_t period = 0;
00126
00127         for(int i = 0; i <= PWM_HW_MAX_PRESCALER_STEP; i++)
00128         {
00129             period = CPU_FREQ / (BV(i) * freq);
00130             LOG_INFO("period[%ld], prescale[%d]\n", period, i);
00131             if ((period < PWM_HW_MAX_PERIOD) && (period != 0))
00132             {
00133                 //Clean previous channel prescaler, and set new
00134                 *pwm_map[dev].mode_reg &= ~PWM_CPRE_MCK_MASK;
00135                 *pwm_map[dev].mode_reg |= i;
00136                 //Set pwm period
00137                 *pwm_map[dev].period_reg = period;
00138                 break;
00139             }
00140         }
00141
00142         LOG_INFO("PWM ch[%d] period[%ld]\n", dev, period);
00143     }
00144
00150     void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty)
00151     {
00152         ASSERT(duty <= (uint16_t)*pwm_map[dev].period_reg);
00153
00154
00155         /*
00156          * If polarity flag is true we must invert
00157          * PWM polarity.
00158          */
00159         if (pwm_map[dev].pol)
00160         {
00161             duty = (uint16_t)*pwm_map[dev].period_reg - duty;
00162             LOG_INFO("Inverted duty[%d], pol[%d]\n", duty, pwm_map[dev].pol);
00163         }
00164
00165         /*
00166          * WARNING: is forbidden to write 0 to duty cycle value,
00167          * and so for duty = 0 we must enable PIO and clear output!
00168          */
00169         if (!duty)
00170         {
00171             PWM_PIO_CODR = pwm_map[dev].pwm_pin;
00172             PWM_PIO_PER  = pwm_map[dev].pwm_pin;
00173             pwm_map[dev].duty_zero = true;
00174         }
00175         else
00176         {
00177             PWM_PIO_PDR = pwm_map[dev].pwm_pin;
00178             PWM_PIO_ABSR = pwm_map[dev].pwm_pin;
00179
00180             *pwm_map[dev].update_reg = duty;
00181             pwm_map[dev].duty_zero = false;
00182         }
00183
00184         PWM_ENA = BV(dev);
00185         LOG_INFO("PWM ch[%d] duty[%d], period[%ld]\n", dev, duty, *pwm_map[dev].period_reg);
00186     }
00187
00188
00192     void pwm_hw_enable(PwmDev dev)
00193     {
00194         if (!pwm_map[dev].duty_zero)
00195         {
00196             PWM_PIO_PDR  = pwm_map[dev].pwm_pin;
00197             PWM_PIO_ABSR = pwm_map[dev].pwm_pin;
00198         }
00199     }
00200
00204     void pwm_hw_disable(PwmDev dev)
00205     {
00206         PWM_PIO_PER = pwm_map[dev].pwm_pin;
00207     }
00208
00212     void pwm_hw_setPolarity(PwmDev dev, bool pol)
00213     {
00214             pwm_map[dev].pol = pol;
00215             LOG_INFO("Set pol[%d]\n", pwm_map[dev].pol);
00216     }
00217
00221     void pwm_hw_init(void)
00222     {
00223
00224         /*
00225          * Init pwm:
00226          * WARNING: is forbidden to write 0 to duty cycle value,
00227          * and so for duty = 0 we must enable PIO and clear output!
00228          * - clear PIO outputs
00229          * - enable PIO outputs
00230          * - Disable PIO and enable PWM functions
00231          * - Power on PWM
00232          */
00233         PWM_PIO_CODR = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3);
00234         PWM_PIO_OER  = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3);
00235         PWM_PIO_PDR  = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3);
00236         PWM_PIO_ABSR = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3);
00237         PMC_PCER |= BV(PWMC_ID);
00238
00239         /* Disable all channels. */
00240         PWM_DIS = 0xFFFFFFFF;
00241         /* Disable prescalers A and B */
00242         PWM_MR = 0;
00243
00244         /*
00245          * Set pwm mode:
00246          * - set period alidned to left
00247          * - set output waveform to start at high level
00248          * - allow duty cycle modify at next period event
00249          */
00250         for (int ch = 0; ch < PWM_CNT; ch++)
00251         {
00252             *pwm_map[ch].mode_reg = 0;
00253             *pwm_map[ch].mode_reg = BV(PWM_CPOL);
00254         }
00255
00256     }
00257
00258 #else
00259
00260     typedef struct PwmChannelRegs
00261     {
00262         reg32_t CMR;
00263         reg32_t CDTY;
00264         reg32_t CPRD;
00265         reg32_t CCNT;
00266         reg32_t CUPD;
00267     } PwmChannelRegs;
00268
00269
00270     /*
00271      * Set pwm waveform frequecy.
00272      */
00273     void pwm_hw_setFrequency(Pwm *ctx, pwm_freq_t freq)
00274     {
00275         uint32_t period = 0;
00276
00277         for(int i = 0; i <= PWM_HW_MAX_PRESCALER_STEP; i++)
00278         {
00279             period = CPU_FREQ / (BV(i) * freq);
00280             LOG_INFO("period[%ld], prescale[%d]\n", period, i);
00281             if ((period < PWM_HW_MAX_PERIOD) && (period != 0))
00282             {
00283                 //Clear previous channel prescaler, and set new
00284                 ctx->hw->base->CMR &= ~PWM_CPRE_MCK_MASK;
00285                 ctx->hw->base->CMR |= i;
00286                 //Set pwm period
00287                 ATOMIC(
00288                     ctx->hw->base->CPRD = period;
00289                     ctx->hw->base->CDTY = period;
00290                 );
00291                 break;
00292             }
00293         }
00294
00295         LOG_INFO("PWM ch[%d] period[%ld]\n", ctx->ch, period);
00296     }
00297
00298     pwm_hwreg_t pwm_hw_getPeriod(Pwm *ctx)
00299     {
00300         return ctx->hw->base->CPRD;
00301     }
00302
00303     /*
00304      * Set pwm duty cycle.
00305      *
00306      * duty value 0 - (2^16 - 1)
00307      */
00308     void pwm_hw_setDuty(Pwm *ctx, pwm_hwreg_t hw_duty)
00309     {
00310         ASSERT(hw_duty <= ctx->hw->base->CPRD);
00311
00312         /*
00313          * WARNING: is forbidden to write 0 or 1 to duty cycle value,
00314          * and so for duty < 2 we must enable PIO and clear output!
00315          */
00316         if (hw_duty < 2)
00317         {
00318             hw_duty = 2;
00319             PWM_PIO_PER = ctx->hw->pwm_pin;
00320         }
00321         else
00322             PWM_PIO_PDR = ctx->hw->pwm_pin;
00323
00324         ctx->hw->base->CUPD = hw_duty;
00325         LOG_INFO("PWM ch[%d] duty[%d], period[%ld]\n", ctx->ch, hw_duty, ctx->hw->base->CPRD);
00326     }
00327
00328     static PwmHardware pwm_channels[] =
00329     {
00330         {//PWM Channel 0
00331             .pwm_pin = BV(PWM0),
00332             .base = (volatile PwmChannelRegs *)&PWM_CMR0,
00333         },
00334         {//PWM Channel 1
00335             .pwm_pin = BV(PWM1),
00336             .base = (volatile PwmChannelRegs *)&PWM_CMR1,
00337         },
00338         {//PWM Channel 2
00339             .pwm_pin = BV(PWM2),
00340             .base = (volatile PwmChannelRegs *)&PWM_CMR2,
00341         },
00342         {//PWM Channel 3
00343             .pwm_pin = BV(PWM3),
00344             .base = (volatile PwmChannelRegs *)&PWM_CMR3,
00345         },
00346     };
00347
00348     /*
00349      * Init pwm.
00350      */
00351     void pwm_hw_init(Pwm *ctx, unsigned ch)
00352     {
00353
00354         ctx->hw = &pwm_channels[ch];
00355
00356         /*
00357          * Init pwm:
00358          * - clear PIO outputs
00359          * - enable PIO outputs
00360          * - Enable PWM functions
00361          * - Power on PWM
00362          */
00363         PWM_PIO_CODR = ctx->hw->pwm_pin;
00364         PWM_PIO_OER  = ctx->hw->pwm_pin;
00365         PWM_PIO_PER  = ctx->hw->pwm_pin;
00366         PWM_PIO_ABSR = ctx->hw->pwm_pin;
00367
00368         PMC_PCER |= BV(PWMC_ID);
00369
00370         /* Disable prescalers A and B */
00371         PWM_MR = 0;
00372
00373         /*
00374          * Set pwm mode:
00375          * WARNING: is forbidden to write 0 or 1 to duty cycle value,
00376          * and so for start we set duty to 2.
00377          * Also:
00378          * - set period aligned to left
00379          * - set output waveform to start at high level
00380          * - allow duty cycle modify at next period event
00381          */
00382         ctx->hw->base->CDTY = 2;
00383         ctx->hw->base->CMR = BV(PWM_CPOL);
00384         PWM_ENA = BV(ch);
00385     }
00386
00387 #endif


BeRTOS: pwm_at91.h File Reference

  • cpu
  • arm
  • drv
pwm_at91.h File Reference

PWM hardware-specific definition. More...

#include <cfg/compiler.h>
#include <cfg/macros.h>
#include "cfg/cfg_pwm.h"
#include <io/arm.h>
#include <drv/pwm.h>

Go to the source code of this file.

Detailed Description

PWM hardware-specific definition.

Author:
Daniele Basile <asterix@develer.com>

Definition in file pwm_at91.h.


BeRTOS: pwm_at91.h Source File

  • cpu
  • arm
  • drv
pwm_at91.h
Go to the documentation of this file.
00001
00040 #ifndef DRV_PWM_AT91_H
00041 #define DRV_PWM_AT91_H
00042
00043 #include <cfg/compiler.h>
00044 #include <cfg/macros.h>
00045
00046 #include "cfg/cfg_pwm.h"
00047
00048 #include <io/arm.h>
00049
00050 #if CFG_PWM_ENABLE_OLD_API
00051
00052     #include "hw/pwm_map.h"
00053
00057     typedef uint16_t pwm_period_t;
00058
00062     typedef struct PwmChannel
00063     {
00064         bool duty_zero;
00065         bool pol;
00066         int pwm_pin;
00067         reg32_t *mode_reg;
00068         reg32_t *duty_reg;
00069         reg32_t *period_reg;
00070         reg32_t *update_reg;
00071
00072     } PwmChannel;
00073
00074
00075     void pwm_hw_init(void);
00076     void pwm_hw_setFrequency(PwmDev dev, uint32_t freq);
00077     void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty);
00078     void pwm_hw_disable(PwmDev dev);
00079     void pwm_hw_enable(PwmDev dev);
00080     void pwm_hw_setPolarity(PwmDev dev, bool pol);
00081     pwm_period_t pwm_hw_getPeriod(PwmDev dev);
00082
00083 #else
00084     #include <drv/pwm.h>
00085
00086     typedef uint16_t pwm_hwreg_t;
00087
00088     struct PwmChannelRegs; //fwd decl
00089
00090     typedef struct PwmHardware
00091     {
00092         uint32_t pwm_pin;
00093         volatile struct PwmChannelRegs *base;
00094     } PwmHardware;
00095
00096     pwm_hwreg_t pwm_hw_getPeriod(Pwm *ctx);
00097     void pwm_hw_setFrequency(struct Pwm *ctx, pwm_freq_t freq);
00098     void pwm_hw_setDuty(Pwm *ctx, pwm_hwreg_t duty);
00099     void pwm_hw_init(struct Pwm *ctx, unsigned ch);
00100
00101 #endif
00102
00103 #endif /* DRV_ADC_AT91_H */


BeRTOS: pwm_avr.c File Reference

  • cpu
  • avr
  • drv
Functions
pwm_avr.c File Reference

Low-level PWM module for AVR (inplementation). More...

#include "pwm_avr.h"
#include <hw/hw_cpufreq.h>

Go to the source code of this file.

Functions

void | pwm_hw_setPolarity (PwmDev dev, bool pol)
Set PWM polarity to select pwm channel.
pwm_period_t | pwm_hw_getPeriod (PwmDev dev)
Get preiod from select channel.
void | pwm_hw_setFrequency (PwmDev dev, uint32_t freq)
Set pwm waveform frequecy.
void | pwm_hw_setDutyUnlock (PwmDev dev, uint16_t duty)
Set pwm duty cycle.
void | pwm_hw_enable (PwmDev dev)
Enable select pwm channel.
void | pwm_hw_disable (PwmDev dev)
Disable select pwm channel.
void | pwm_hw_init (void)
Init pwm.

Detailed Description

Low-level PWM module for AVR (inplementation).

Author:
Daniele Basile <asterix@develer.com>

Definition in file pwm_avr.c.

Function Documentation

pwm_period_t pwm_hw_getPeriod ( PwmDev dev )

Get preiod from select channel.

dev channel

Definition at line 67 of file pwm_avr.c.

void pwm_hw_setDutyUnlock | ( | PwmDev | dev,
 |  | uint16_t | duty
 | ) |  |

Set pwm duty cycle.

duty value 0 - 2^16

Definition at line 103 of file pwm_avr.c.

void pwm_hw_setFrequency | ( | PwmDev | dev,
 |  | uint32_t | freq
 | ) |  |

Set pwm waveform frequecy.

freq in Hz

Definition at line 85 of file pwm_avr.c.


BeRTOS: pwm_avr.c Source File

  • cpu
  • avr
  • drv
pwm_avr.c
Go to the documentation of this file.
00001
00041 #include "pwm_avr.h"
00042 #include <hw/hw_cpufreq.h>
00043
00044 #warning TODO:This is an exmple of implementation of PWM low level channel for AVR, implemnt it!
00045
00049 void pwm_hw_setPolarity(PwmDev dev, bool pol)
00050 {
00051
00052     /*
00053      * Put here a code to PWM polarity of select
00054      * PWM channel
00055      */
00056
00057     //Only for test remove when implement this function
00058     (void)dev;
00059     (void)pol;
00060 }
00061
00067 pwm_period_t pwm_hw_getPeriod(PwmDev dev)
00068 {
00069     /*
00070      * Put here a code to get period value of select
00071      * PWM channel
00072      */
00073
00074     //Only for test remove when implement this function
00075     (void)dev;
00076
00077     return 0;
00078 }
00079
00085 void pwm_hw_setFrequency(PwmDev dev, uint32_t freq)
00086 {
00087     /*
00088      * Put here a code to set frequency of select
00089      * PWM channel
00090      */
00091
00092     //Only for test remove when implement this function
00093     (void)dev;
00094     (void)freq;
00095
00096 }
00097
00103 void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty)
00104 {
00105     /*
00106      * Put here a code to set duty of select
00107      * PWM channel
00108      */
00109
00110     //Only for test remove when implement this function
00111     (void)dev;
00112     (void)duty;
00113
00114 }
00115
00116
00120 void pwm_hw_enable(PwmDev dev)
00121 {
00122     /*
00123      * Put here a code to enable
00124      * a select PWM channel
00125      */
00126
00127     //Only for test remove when implement this function
00128     (void)dev;
00129 }
00130
00134 void pwm_hw_disable(PwmDev dev)
00135 {
00136     /*
00137      * Put here a code to disable
00138      * a select PWM channel
00139      */
00140
00141     //Only for test remove when implement this function
00142     (void)dev;
00143 }
00144
00145
00149 void pwm_hw_init(void)
00150 {
00151     /*
00152      * Put here a code to init
00153      * a PWM hawdware
00154      */
00155 }
00156
00157
00158
00159


BeRTOS: pwm_avr.h File Reference

  • cpu
  • avr
  • drv
Data Structures | Typedefs | Functions
pwm_avr.h File Reference

Low-level PWM module for AVR (interface). More...

#include "hw/pwm_map.h"
#include <cpu/types.h>

Go to the source code of this file.

Data Structures

struct | PwmChannel
Structur definition for pwm driver. More...

Typedefs

typedef uint16_t | pwm_period_t
Type definition for pwm period.

Functions

void | pwm_hw_init (void)
Init pwm.
void | pwm_hw_setFrequency (PwmDev dev, uint32_t freq)
Set pwm waveform frequecy.
void | pwm_hw_setDutyUnlock (PwmDev dev, uint16_t duty)
Set pwm duty cycle.
void | pwm_hw_disable (PwmDev dev)
Disable select pwm channel.
void | pwm_hw_enable (PwmDev dev)
Enable select pwm channel.
void | pwm_hw_setPolarity (PwmDev dev, bool pol)
Set PWM polarity to select pwm channel.
pwm_period_t | pwm_hw_getPeriod (PwmDev dev)
Get preiod from select channel.

Detailed Description

Low-level PWM module for AVR (interface).

Author:
Daniele Basile <asterix@develer.com>

Definition in file pwm_avr.h.

Function Documentation

pwm_period_t pwm_hw_getPeriod ( PwmDev dev )

Get preiod from select channel.

dev channel

Definition at line 67 of file pwm_avr.c.

void pwm_hw_setDutyUnlock | ( | PwmDev | dev,
 |  | uint16_t | duty
 | ) |  |

Set pwm duty cycle.

duty value 0 - 2^16

Definition at line 103 of file pwm_avr.c.

void pwm_hw_setFrequency | ( | PwmDev | dev,
 |  | uint32_t | freq
 | ) |  |

Set pwm waveform frequecy.

freq in Hz

Definition at line 85 of file pwm_avr.c.


BeRTOS: pwm_avr.h Source File

  • cpu
  • avr
  • drv
pwm_avr.h
Go to the documentation of this file.
00001
00040 #ifndef DRV_PWM_AVR_H
00041 #define DRV_PWM_AVR_H
00042
00043 #include "hw/pwm_map.h"
00044
00045 #include <cpu/types.h>
00046
00047 #define PWM_HW_MAX_PRESCALER_STEP         10
00048 #define PWM_HW_MAX_PERIOD             0xFFFF
00049
00053 typedef uint16_t pwm_period_t;
00054
00058 typedef struct PwmChannel
00059 {
00060     /*  */
00061 } PwmChannel;
00062
00063
00064 void pwm_hw_init(void);
00065 void pwm_hw_setFrequency(PwmDev dev, uint32_t freq);
00066 void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty);
00067 void pwm_hw_disable(PwmDev dev);
00068 void pwm_hw_enable(PwmDev dev);
00069 void pwm_hw_setPolarity(PwmDev dev, bool pol);
00070 pwm_period_t pwm_hw_getPeriod(PwmDev dev);
00071
00072 #endif /* DRV_ADC_AT91_H */


BeRTOS: pwm_hwtest.c File Reference

  • drv
pwm_hwtest.c File Reference

Test for PWM driver (implementation) More...

#include "hw/pwm_map.h"
#include "cfg/cfg_pwm.h"
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <cfg/log.h>
#include <cpu/types.h>
#include <cpu/irq.h>
#include <drv/pwm.h>
#include <PP_STRINGIZE(drv/PP_CAT3(pwm, _, CPU_ID).h)>

Go to the source code of this file.

Detailed Description

Test for PWM driver (implementation)

This is a simple test for PWM driver. This module is target independent, so you can test all target that BeRTOS support. To use this test you should include a pwm_map.h header where are defined the PWM channels for your target. Then you should add or remove a test setting in pwm_test_cfg array, and edit a value for your specific test. Afther this, all is ready and you can test PWM driver.

The test check first if all PWM channel starts, and then try to change a PWM duty cicle for all channel. The change of duty cycle is operate when a PWM channel is enable, in this way you can see if a pwm signal is clean and work properly. The duty value is change incrementaly, and when it arrive to 100% or 0%, we reset the duty value and restart the test. Further the duty test, we check also a PWM polarity, infact when we reach a reset duty value, we invert a polary of PWM wavform. So you can see if the hardware manage correctly this situation.

Note: To be simple and target independently we not use a timer module, and so the delay is do with a for cycle.

Author:
Daniele Basile <asterix@develer.com>

Definition in file pwm_hwtest.c.


BeRTOS: pwm_hwtest.c Source File

  • drv
pwm_hwtest.c
Go to the documentation of this file.
00001
00060 #include "hw/pwm_map.h" // For PwmDev and channel avaible on thi target
00061 #include "cfg/cfg_pwm.h"
00062 #include <cfg/macros.h>
00063 #include <cfg/debug.h>
00064
00065 // Define logging setting (for cfg/log.h module).
00066 #define LOG_LEVEL         PWM_LOG_LEVEL
00067 #define LOG_FORMAT        PWM_LOG_FORMAT
00068 #include <cfg/log.h>   // for logging system
00069
00070 #include <cpu/types.h>
00071 #include <cpu/irq.h>
00072
00073 #include <drv/pwm.h>
00074 #include CPU_HEADER(pwm)
00075
00076 #define DELAY_TIME   10000  // This is a number of for cycle before to set a new value of duty
00077 #define PWM_DUTY_INC   200  // Incremental value for duty
00078
00079
00080 /*
00081  * Simple struct to store
00082  * the testing value.
00083  */
00084 typedef struct PwmTest
00085 {
00086         int ch;
00087         bool pol;
00088         pwm_freq_t freq;
00089         pwm_duty_t duty;
00090 } PwmTest;
00091
00092 /*
00093  * Test settings for each channel.
00094  *
00095  * Frequency value is in Hz.
00096  *
00097  * Esample of value for duty cycle"
00098  *
00099  * - 100% => 0xFFFFFFFF
00100  * - 80%  => 0xCCCCCCCC
00101  * - 75%  => 0xBFFFFFFF
00102  * - 50%  => 0x7FFFFFFF
00103  * - 25%  => 0x3FFFFFFF
00104  * - 33%  => 0x55555555
00105  * - 16%  => 0x2AAAAAAA
00106  */
00107 static PwmTest pwm_test_cfg[PWM_CNT] =
00108 {
00109         /* Channel, polarity, frequecy,   duty */
00110         {        0,    false,    100UL,      0 }, /*     100Hz,  0% duty */
00111         {        1,    false,   1000UL, 0x7FFF }, /*      1KHz, 50% duty */
00112         {        2,    false,  12356UL, 0x5555 }, /* 12,356KHz, 33% duty */
00113         {        3,    false, 100000UL, 0xCCCC }  /*    100KHz, 80% duty */
00114 };
00115
00116 /*
00117  * Setup all needed to test PWM on AT91
00118  *
00119  */
00120 int pwm_testSetup(void)
00121 {
00122     LOG_INFO("Init pwm..");
00123     pwm_init();
00124     LOG_INFO("done.\n");
00125
00126     return 0;
00127 }
00128
00129
00130 /*
00131  * Test suit for genation of pwm waveform.
00132  *
00133  */
00134 void NORETURN pwm_testRun(void)
00135 {
00136         pwm_duty_t duty = 0;
00137         int delay = 0;
00138
00139         pwm_testSetup();
00140
00141         LOG_INFO("\n\n===== BeRTOS PWM test =====\n\n");
00142
00143         for (int i = 0; i < PWM_CNT; i++)
00144         {
00145                 LOG_INFO("PWM test ch[%d]\n", pwm_test_cfg[i].ch);
00146                 LOG_INFO("--> set pol[%d]", pwm_test_cfg[i].pol);
00147                 LOG_INFO("\n(Note: if polarity is false the output waveform start at high level,\n see low level implentation for detail)i\n");
00148                 pwm_setPolarity(pwm_test_cfg[i].ch, pwm_test_cfg[i].pol);
00149                 LOG_INFO("..ok\n");
00150
00151                 LOG_INFO("--> set freq[%ld]", pwm_test_cfg[i].freq);
00152                 pwm_setFrequency(pwm_test_cfg[i].ch, pwm_test_cfg[i].freq);
00153                 LOG_INFO("..ok\n");
00154
00155                 LOG_INFO("--> set duty[%d]", pwm_test_cfg[i].duty);
00156                 pwm_setDuty(pwm_test_cfg[i].ch, pwm_test_cfg[i].duty);
00157                 LOG_INFO("..ok\n");
00158
00159                 LOG_INFO("--> Enable pwm");
00160                 pwm_enable(pwm_test_cfg[i].ch, true);
00161                 LOG_INFO("..ok\n");
00162         }
00163
00164         LOG_INFO("\n-------------------------- Dinamic PWM test --------------------------\n");
00165         LOG_INFO("We test if driver change correctly the duty cycle durind it working.\n");
00166         LOG_INFO("On your oscilloscope you should see the pwm singal that increase until\n");
00167         LOG_INFO("the duty value is 100%%. After this value we invert a polarity of pwm,\n");
00168         LOG_INFO("and repeat the test. But now you should see that pwm duty decreasing until\n");
00169         LOG_INFO("0%% duty value.\nAfter that, we repeat the test from beginning.\n\n");
00170
00171         for (;;)
00172         {
00173                 if (delay == DELAY_TIME)
00174                 {
00175                         for (int i = 0; i < PWM_CNT; i++)
00176                         {
00177                                 LOG_INFO("PWM test ch[%d]\n", pwm_test_cfg[i].ch);
00178                                 LOG_INFO("--> set duty[%d]", duty);
00179                                 pwm_setDuty(pwm_test_cfg[i].ch, duty);
00180                                 LOG_INFO("..ok\n");
00181                         }
00182                         LOG_INFO("\n++++++++++++++++++++\n");
00183                         duty += PWM_DUTY_INC;
00184                         delay = 0;
00185                 }
00186
00187                 //Reset duty cycle overflow
00188                 if (duty >= (pwm_duty_t)0xFFFF)
00189                 {
00190                         duty = 0;
00191                         for (int i = 0; i < PWM_CNT; i++)
00192                         {
00193                                 LOG_INFO("Duty reset, swap polarity:\n");
00194                                 LOG_INFO("--> pol from [%d] to [%d]", pwm_test_cfg[i].pol, !pwm_test_cfg[i].pol);
00195
00196                                 pwm_test_cfg[i].pol = !pwm_test_cfg[i].pol;
00197                                 pwm_setPolarity(pwm_test_cfg[i].ch, pwm_test_cfg[i].pol);
00198
00199                                 LOG_INFO("..ok\n");
00200                         }
00201                         LOG_INFO("\n++++++++++++++++++++\n");
00202                 }
00203                 delay++;
00204         }
00205 }
00206
00207 /*
00208  * End a PWM Test.
00209  * (Unused)
00210  */
00211 int pwm_testTearDown(void)
00212 {
00213     /*    */
00214     return 0;
00215 }
00216
00217 /*
00218  * Empty main.
00219  *
00220  * Look it as exmple or use it if
00221  * you want test a PWM driver stand alone.
00222  */
00223 #if 0
00224 int main(void)
00225 {
00226     IRQ_ENABLE;
00227     kdbg_init();
00228
00229     pwm_testRun();
00230
00231     for(;;)
00232     {
00233     }
00234
00235 }
00236 #endif
00237
00238


BeRTOS: pwm_map.h File Reference

  • hw
pwm_map.h File Reference

PWM map device. More...

Go to the source code of this file.

Detailed Description

PWM map device.

Author:
Daniele Basile <asterix@develer.com>

Definition in file pwm_map.h.


BeRTOS: pwm_map.h Source File

  • hw
pwm_map.h
Go to the documentation of this file.
00001
00040 #ifndef HW_PWM_MAP_H
00041 #define HW_PWM_MAP_H
00042
00043 #warning TODO:This is an example implentation, you must implement it!
00044
00045 typedef enum
00046 {
00047     PWM_CH0 = 0,
00048     PWM_CH1,
00049     PWM_CH2,
00050     PWM_CH3,
00051
00052 /*
00053  *  add other PWM channel or
00054  *  change above.
00055  */
00056
00057     PWM_CNT
00058 } PwmDev;
00059
00060 #endif /* HW_PWM_MAP_H */


BeRTOS: ramp.c File Reference

  • algo
Functions
ramp.c File Reference

Compute, save and load ramps for stepper motors (implementation) More...

#include "ramp.h"
#include <cfg/debug.h>
#include <string.h>

Go to the source code of this file.

Functions

void | ramp_setup (struct Ramp *ramp, uint32_t length, uint32_t minFreq, uint32_t maxFreq)
Setup an acceleration ramp for a stepper motor.
void | ramp_default (struct Ramp *ramp)
Initialize a new ramp with default values.
uint16_t FAST_FUNC | ramp_evaluate (const struct Ramp *ramp, uint32_t curClock)
Evaluate the ramp at the given point.

Detailed Description

Compute, save and load ramps for stepper motors (implementation)

Author:
Simone Zinanni <s.zinanni@develer.com>
Bernie Innocenti <bernie@codewiz.org>
Giovanni Bajo <rasky@develer.com>
Daniele Basile <asterix@develer.com>

The formula used by the ramp is the following:

            a * b
 f(t) = -------------
         lerp(a,b,t)

Where a and b are the maximum and minimum speed respectively (minimum and maximum wavelength respectively), and lerp is a linear interpolation with a factor:

 lerp(a,b,t) =  a + t * (b - a)  =  (a * (1 - t)) + (b * t)

t must be in the [0,1] interval. It is easy to see that the following holds true:

 f(0) = b,   f(1) = a

And that the function is monotonic. So, the function effectively interpolates between the maximum and minimum speed through its domain ([0,1] -> [b,a]).

The curve drawn by this function is similar to 1 / (sqrt(n)), so it is slower than a linear acceleration (which would be 1/n).

The floating point version uses a slightly modified function which accepts the parameter in the domain [0, MT] (where MT is maxTime, the length of the ramp, which is a setup parameter for the ramp). This is done to reduce the number of operations per step. The formula looks like this:

               a * b * MT
 g(t) = ----------------------------
           (a * MT) + t * (b - a)

It can be shown that this g(t) = f(t * MT). The denominator is a linear interpolation in the range [b*MT, a*MT], as t moves in the interval [0, MT]. So the interpolation interval of the function is again [b, a]. The implementation caches the value of the numerator and parts of the denominator, so that the formula becomes:

 alpha = a * b * MT
 beta = a * MT
 gamma = b - a
                alpha
 g(t) = ----------------------
           beta + t * gamma

and t is exactly the parameter that ramp_evaluate() gets, that is the current time (in range [0, MT]). The operations performed for each step are just an addition, a multiplication and a division.

The fixed point version of the formula instead transforms the original function as follows:

                   a * b                         a
  f(t) =  -------------------------  =  --------------------
                 a                         a
           b * ( - * (1 - t) + t )         - * (1 - t) + t
                 b                         b

t must be computed by dividing the current time (24 bit integer) by the maximum time (24 bit integer). This is done by precomputing the reciprocal of the maximum time as a 0.32 fixed point number, and multiplying it to the current time. Multiplication is performed 8-bits a time by FIX_MULT32(), so that we end up with a 0.16 fixed point number for t (and 1-t is just its twos-complement negation). a/b is in the range [0,1] (because a is always less than b, being the minimum wavelength), so it is precomputed as a 0.16 fixed point. The final step is then computing the denominator and executing the division (32 cycles using the 1-step division instruction in the DSP).

The assembly implementation is needed for efficiency, but a C version of it can be easily written, in case it is needed in the future.

Definition in file ramp.c.

Function Documentation

uint16_t FAST_FUNC ramp_evaluate | ( | const struct Ramp * | ramp,
 |  | uint32_t | curClock
 | ) |  |

Evaluate the ramp at the given point.

Given a ramp, and the current clock since the start of the acceleration, compute the next step, that is the interval at which send the signal to the motor.

Note:
The fixed point version does not work when curClock is zero. Anyway, the first step is always clocksMaxWL, as stored within the ramp structure.

Definition at line 189 of file ramp.c.

void ramp_setup | ( | struct Ramp * | ramp,
 |  | uint32_t | length,
 |  | uint32_t | minFreq,
 |  | uint32_t | maxFreq
 | ) |  |

Setup an acceleration ramp for a stepper motor.

Parameters:
ramp | Ramp to fill
length | Length of the ramp (milliseconds)
minFreq | Minimum operating frequency of the motor (hertz)
maxFreq | Maximum operating frequency of the motor (hertz)

Definition at line 139 of file ramp.c.


BeRTOS: ramp.c Source File

  • algo
ramp.c
Go to the documentation of this file.
00001
00104 #include "ramp.h"
00105 #include <cfg/debug.h>
00106
00107 #include <string.h> // memcpy()
00108
00109 void ramp_compute(struct Ramp *ramp, uint32_t clocksRamp, uint16_t clocksMinWL, uint16_t clocksMaxWL)
00110 {
00111     ASSERT(clocksMaxWL >= clocksMinWL);
00112
00113     // Save values in ramp struct
00114     ramp->clocksRamp = clocksRamp;
00115     ramp->clocksMinWL = clocksMinWL;
00116     ramp->clocksMaxWL = clocksMaxWL;
00117
00118 #if RAMP_USE_FLOATING_POINT
00119     ramp->precalc.gamma = ramp->clocksMaxWL - ramp->clocksMinWL;
00120     ramp->precalc.beta = (float)ramp->clocksMinWL * (float)ramp->clocksRamp;
00121     ramp->precalc.alpha = ramp->precalc.beta * (float)ramp->clocksMaxWL;
00122
00123 #else
00124     ramp->precalc.max_div_min = ((uint32_t)clocksMinWL << 16) / (uint32_t)clocksMaxWL;
00125
00126     /* Calcola 1/total_time in fixed point .32. Assumiamo che la rampa possa al
00127      * massimo avere 25 bit (cioé valore in tick fino a 2^25, che con il
00128      * prescaler=3 sono circa 7 secondi). Inoltre, togliamo qualche bit di precisione
00129      * da destra (secondo quanto specificato in RAMP_CLOCK_SHIFT_PRECISION).
00130      */
00131     ASSERT(ramp->clocksRamp < (1UL << (24 + RAMP_CLOCK_SHIFT_PRECISION)));
00132     ramp->precalc.inv_total_time = 0xFFFFFFFFUL / (ramp->clocksRamp >> RAMP_CLOCK_SHIFT_PRECISION);
00133     ASSERT(ramp->precalc.inv_total_time < 0x1000000UL);
00134
00135 #endif
00136 }
00137
00138
00139 void ramp_setup(struct Ramp* ramp, uint32_t length, uint32_t minFreq, uint32_t maxFreq)
00140 {
00141     uint32_t minWL, maxWL;
00142
00143     minWL = TIME2CLOCKS(FREQ2MICROS(maxFreq));
00144     maxWL = TIME2CLOCKS(FREQ2MICROS(minFreq));
00145
00146     ASSERT2(minWL < 65536UL, "Maximum frequency too high");
00147     ASSERT2(maxWL < 65536UL, "Minimum frequency too high");
00148     ASSERT(maxFreq > minFreq);
00149
00150     ramp_compute(
00151         ramp,
00152         TIME2CLOCKS(length),
00153         TIME2CLOCKS(FREQ2MICROS(maxFreq)),
00154         TIME2CLOCKS(FREQ2MICROS(minFreq))
00155     );
00156 }
00157
00158 void ramp_default(struct Ramp *ramp)
00159 {
00160     ramp_setup(ramp, RAMP_DEF_TIME, RAMP_DEF_MINFREQ, RAMP_DEF_MAXFREQ);
00161 }
00162
00163 #if RAMP_USE_FLOATING_POINT
00164
00165 float ramp_evaluate(const struct Ramp* ramp, float curClock)
00166 {
00167     return ramp->precalc.alpha / (curClock * ramp->precalc.gamma + ramp->precalc.beta);
00168 }
00169
00170 #else
00171
00172 INLINE uint32_t fix_mult32(uint32_t m1, uint32_t m2)
00173 {
00174     uint32_t accum = 0;
00175     accum += m1 * ((m2 >> 0) & 0xFF);
00176     accum >>= 8;
00177     accum += m1 * ((m2 >> 8) & 0xFF);
00178     accum >>= 8;
00179     accum += m1 * ((m2 >> 16) & 0xFF);
00180     return accum;
00181 }
00182
00183 //   a*b >> 16
00184 INLINE uint16_t fix_mult16(uint16_t a, uint32_t b)
00185 {
00186     return (b*(uint32_t)a) >> 16;
00187 }
00188
00189 uint16_t FAST_FUNC ramp_evaluate(const struct Ramp* ramp, uint32_t curClock)
00190 {
00191     uint16_t t = FIX_MULT32(curClock >> RAMP_CLOCK_SHIFT_PRECISION, ramp->precalc.inv_total_time);
00192     uint16_t denom =  fix_mult16((uint16_t)~t + 1, ramp->precalc.max_div_min) + t;
00193     uint16_t cur_delta = ((uint32_t)ramp->clocksMinWL << 16) / denom;
00194
00195     return cur_delta;
00196 }
00197
00198 #endif
00199
00200


BeRTOS: ramp.h File Reference

  • algo
Data Structures | Defines | Functions
ramp.h File Reference

Compute, save and load ramps for stepper motors. More...

#include "hw/hw_stepper.h"
#include "cfg/cfg_ramp.h"
#include <cfg/compiler.h>

Go to the source code of this file.

Data Structures

struct | RampPrecalc
Structure holding pre-calculated data for speeding up real-time evaluation of the ramp. More...
struct | Ramp
Ramp structure. More...

Defines

#define | TIME2CLOCKS(micros) ((uint32_t)(micros) * (STEPPER_CLOCK / 1000000))
Convert microseconds to timer clock ticks.
#define | CLOCKS2TIME(clocks) ((uint32_t)(clocks) / (STEPPER_CLOCK / 1000000))
Convert timer clock ticks back to microseconds.
#define | MICROS2FREQ(micros) (1000000UL / ((uint32_t)(micros)))
Convert microseconds to Hz.
#define | FREQ2MICROS(hz) (1000000UL / ((uint32_t)(hz)))
Convert frequency (in Hz) to time (in microseconds)
#define | FIX_MULT32(a, b) (((uint64_t)(a)*(uint32_t)(b)) >> 16)
Multiply a and b two integer at 32 bit and extract the high 16 bit word.

Functions

void | ramp_setup (struct Ramp *ramp, uint32_t length, uint32_t minFreq, uint32_t maxFreq)
Setup an acceleration ramp for a stepper motor.
void | ramp_default (struct Ramp *ramp)
Initialize a new ramp with default values.
uint16_t | ramp_evaluate (const struct Ramp *ramp, uint32_t curClock)
Evaluate the ramp at the given point.
int | ramp_testSetup (void)
Self test.

Detailed Description

Compute, save and load ramps for stepper motors.

The acceleration ramp is used to properly accelerate a stepper motor. The main entry point is the function ramp_evaluate(), which must be called at every step of the motor: it gets as input the time elapsed since the stepper started accelerating, and returns the time to wait before sending the next step. A pseudo usage pattern is as follows:

  float time = 0;
  while (1)
  {
      float delta = ramp_evaluate(&my_ramp, time);
      sleep(delta);
      do_motor_step();
      time += delta;
  }

A similar pattern can be used to decelerate (it is sufficient to move the total time backward, such as "time -= delta").

The ramp can be configured with ramp_setup(), providing it with the minimum and maximum operating frequency of the motor, and the total acceleration time in milliseconds (that is, the time that will be needed to accelerate from the minimum frequency to the maximum frequency).

Both a very precise floating point and a very fast fixed point implementation of the ramp evaluation are provided. The fixed point is hand-optimized assembly for DSP56000 (but a portable C version of it can be easily written, see the comments in the code).

Author:
Simone Zinanni <s.zinanni@develer.com>
Giovanni Bajo <rasky@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file ramp.h.

Function Documentation

uint16_t ramp_evaluate | ( | const struct Ramp * | ramp,
 |  | uint32_t | curClock
 | ) |  |

Evaluate the ramp at the given point.

Given a ramp, and the current clock since the start of the acceleration, compute the next step, that is the interval at which send the signal to the motor.

Note:
The fixed point version does not work when curClock is zero. Anyway, the first step is always clocksMaxWL, as stored within the ramp structure.

Definition at line 189 of file ramp.c.

void ramp_setup | ( | struct Ramp * | ramp,
 |  | uint32_t | length,
 |  | uint32_t | minFreq,
 |  | uint32_t | maxFreq
 | ) |  |

Setup an acceleration ramp for a stepper motor.

Parameters:
ramp | Ramp to fill
length | Length of the ramp (milliseconds)
minFreq | Minimum operating frequency of the motor (hertz)
maxFreq | Maximum operating frequency of the motor (hertz)

Definition at line 139 of file ramp.c.


BeRTOS: ramp.h Source File

  • algo
ramp.h
Go to the documentation of this file.
00001
00049 #ifndef ALGO_RAMP_H
00050 #define ALGO_RAMP_H
00051
00052 #include "hw/hw_stepper.h"
00053
00054 #include "cfg/cfg_ramp.h"
00055
00056 #include <cfg/compiler.h>
00057
00058
00062 #define TIME2CLOCKS(micros) ((uint32_t)(micros) * (STEPPER_CLOCK / 1000000))
00063
00067 #define CLOCKS2TIME(clocks) ((uint32_t)(clocks) / (STEPPER_CLOCK / 1000000))
00068
00072 #define MICROS2FREQ(micros) (1000000UL / ((uint32_t)(micros)))
00073
00077 #define FREQ2MICROS(hz) (1000000UL / ((uint32_t)(hz)))
00078
00082 #define FIX_MULT32(a,b)  (((uint64_t)(a)*(uint32_t)(b)) >> 16)
00083
00092 struct RampPrecalc
00093 {
00094 #if RAMP_USE_FLOATING_POINT
00095     float beta;
00096     float alpha;
00097     float gamma;
00098 #else
00099     uint16_t max_div_min;
00100     uint32_t inv_total_time;
00101 #endif
00102 };
00103
00104
00108 struct Ramp
00109 {
00110     uint32_t clocksRamp;
00111     uint16_t clocksMinWL;
00112     uint16_t clocksMaxWL;
00113
00114     struct RampPrecalc precalc;
00115 };
00116
00117
00118 /*
00119  * Function prototypes
00120  */
00121 void ramp_compute(
00122     struct Ramp * ramp,
00123     uint32_t clocksInRamp,
00124     uint16_t clocksInMinWavelength,
00125     uint16_t clocksInMaxWavelength);
00126
00127
00136 void ramp_setup(struct Ramp* ramp, uint32_t length, uint32_t minFreq, uint32_t maxFreq);
00137
00138
00142 void ramp_default(struct Ramp *ramp);
00143
00144
00153 #if RAMP_USE_FLOATING_POINT
00154     float ramp_evaluate(const struct Ramp* ramp, float curClock);
00155 #else
00156     uint16_t ramp_evaluate(const struct Ramp* ramp, uint32_t curClock);
00157 #endif
00158
00159
00161 int ramp_testSetup(void);
00162 int ramp_testRun(void);
00163 int ramp_testTearDown(void);
00164
00165 #endif /* ALGO_RAMP_H */
00166


BeRTOS: rand.c File Reference

  • algo
Functions
rand.c File Reference

Very simple rand() algorithm. More...

#include "rand.h"

Go to the source code of this file.

Functions

int rand (void)
This would really belong to libc.

Detailed Description

Very simple rand() algorithm.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file rand.c.


BeRTOS: rand.c Source File

  • algo
rand.c
Go to the documentation of this file.
00001
00039 #include "rand.h"
00040
00044 int rand(void)
00045 {
00046     static unsigned long seed;
00047
00048     /* Randomize seed */
00049     seed = (seed ^ 0x4BAD5A39UL) + 6513973UL;
00050
00051     return (int)(seed>>16);
00052 }


BeRTOS: rand.h File Reference

  • algo
Functions
rand.h File Reference

Very simple rand() algorithm. More...

Go to the source code of this file.

Functions

int rand (void)
This would really belong to libc.

Detailed Description

Very simple rand() algorithm.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file rand.h.


BeRTOS: rand.h Source File

  • algo
rand.h
Go to the documentation of this file.
00001
00039 #ifndef RAND_H
00040 #define RAND_H
00041
00042 int rand(void);
00043
00044 #endif


BeRTOS: random.c File Reference

  • sec
random.c File Reference

High-level random number generation functions. More...

#include "random.h"
#include "random_p.h"
#include <cfg/macros.h>
#include <drv/timer.h>
#include <sec/prng.h>
#include <sec/entropy.h>
#include <sec/util.h>
#include <sec/hash/sha1.h>
#include <sec/prng/isaac.h>
#include <sec/prng/x917.h>
#include <sec/prng/yarrow.h>
#include <sec/entropy/yarrow_pool.h>

Go to the source code of this file.

Detailed Description

High-level random number generation functions.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file random.c.


BeRTOS: random.c Source File

  • sec
random.c
Go to the documentation of this file.
00001
00038 #include "random.h"
00039 #include "random_p.h"
00040
00041 #include <cfg/macros.h>
00042 #include <drv/timer.h>
00043 #include <sec/random.h>
00044 #include <sec/prng.h>
00045 #include <sec/entropy.h>
00046 #include <sec/util.h>
00047 #include <sec/hash/sha1.h>
00048 #include <sec/prng/isaac.h>
00049 #include <sec/prng/x917.h>
00050 #include <sec/prng/yarrow.h>
00051 #include <sec/entropy/yarrow_pool.h>
00052
00053 /********************************************************************************/
00054 /* Configuration of the random module                                           */
00055 /********************************************************************************/
00056
00057 #define POOL_CONTEXT          PP_CAT(PP_CAT(POOL_NAMEU, CONFIG_RANDOM_POOL), Context)
00058 #define POOL_INIT             PP_CAT(PP_CAT(POOL_NAMEL, CONFIG_RANDOM_POOL), _init)
00059
00060 #define EXTRACTOR_STACKINIT   PP_CAT(PP_CAT(EXTRACTOR_NAME, CONFIG_RANDOM_EXTRACTOR), _stackinit)
00061
00062 #define PRNG_CONTEXT          PP_CAT(PP_CAT(PRNG_NAMEU, CONFIG_RANDOM_PRNG), Context)
00063 #define PRNG_INIT             PP_CAT(PP_CAT(PRNG_NAMEL, CONFIG_RANDOM_PRNG), _init)
00064
00065
00066 /********************************************************************************/
00067 /* Global state                                                                 */
00068 /********************************************************************************/
00069
00070 #if CONFIG_RANDOM_POOL != POOL_NONE
00071 static POOL_CONTEXT epool_ctx;
00072 static EntropyPool * const epool = (EntropyPool *)&epool_ctx;
00073 #endif
00074
00075 static PRNG_CONTEXT prng_ctx;
00076 static PRNG * const prng = (PRNG*)&prng_ctx;
00077
00078 static bool initialized = 0;
00079
00080
00081 /********************************************************************************/
00082 /* Code                                                                         */
00083 /********************************************************************************/
00084
00085 /*
00086  * Reseed the PRNG if there is enough entropy available at this time.
00087  *
00088  * Some designs (eg: fortuna) suggest to artificially limit the frequency of
00089  * this operation to something like 0.1s, to avoid attacks that try to exhaust
00090  * the entropy pool.
00091  *
00092  * We don't believe such attacks are available in an embedded system (as an attacker
00093  * does not have a way to ask random numbers from the pool) but we will play safe
00094  * here in case eg. the user does something wrong.
00095  */
00096 static void optional_reseeding(void)
00097 {
00098 #if CONFIG_RANDOM_POOL != POOL_NONE
00099     static ticks_t last_reseed = -1000;
00100
00101     // We don't allow more than 10 reseedings per second
00102     // (as suggested by Fortuna)
00103     ticks_t current = timer_clock();
00104     if (ticks_to_ms(current - last_reseed) < 100)
00105         return;
00106
00107     if (entropy_seeding_ready(epool))
00108     {
00109         uint8_t seed[prng_seed_len(prng)];
00110
00111         entropy_make_seed(epool, seed, sizeof(seed));
00112         prng_reseed(prng, seed);
00113
00114         last_reseed = current;
00115         PURGE(seed);
00116     }
00117 #endif
00118 }
00119
00120
00121 /*
00122  * Perform the initial seeding of the PRNG.
00123  *
00124  * At startup, we want to immediately seed the PRNG to a point where it can
00125  * generate safe-enough random numbers. To do this, we rely on a hw-dependent
00126  * function to pull entropy from available hw sources, and then feed it
00127  * through an extractor (if any is configured).
00128  */
00129 static void initial_seeding(void)
00130 {
00131 #if CONFIG_RANDOM_POOL != POOL_NONE
00132
00133     // We feed entropy into the pool, until it is ready to perform a seeding.
00134     do
00135     {
00136         uint8_t buf[16];
00137         random_pull_entropy(buf, sizeof(buf));
00138         entropy_add(epool, 0, buf, sizeof(buf), sizeof(buf)*8);
00139     } while (!entropy_seeding_ready(epool));
00140
00141     optional_reseeding();
00142
00143 #elif CONFIG_RANDOM_EXTRACTOR != EXTRACTOR_NONE
00144
00145     uint8_t seed[prng_seed_len(prng)];
00146     Hash *h = EXTRACTOR_STACKINIT();
00147
00148     // "Randomness Extraction and Key Derivation Using the CBC, Cascade and
00149     // HMAC Modes" by Yevgeniy Dodis et al. suggests that an padded cascaded hash
00150     // function with N bits of output must have at least 2n bits of min-entropy as input
00151     // to be a randomness extractor (it generates an output that is computationally
00152     // indistiguishable from an uniform distribution).
00153     size_t hlen = hash_digest_len(h);
00154     uint8_t buf[hlen*2];
00155     size_t sidx = 0;
00156
00157     while (sidx < sizeof(seed))
00158     {
00159         size_t cnt = MIN(sizeof(seed) - sidx, hlen);
00160
00161         random_pull_entropy(buf, sizeof(buf));
00162
00163         hash_begin(h);
00164         hash_update(h, buf, sizeof(buf));
00165         memcpy(seed+sidx, hash_final(h), cnt);
00166         sidx += cnt;
00167     }
00168
00169     prng_reseed(prng, seed);
00170     PURGE(buf);
00171     PURGE(seed);
00172
00173 #else
00174
00175     // If we have been configured without a proper randomness extractor, we do not
00176     // have many solutions but feeding the entropy bits directly to the PRNG, and
00177     // hoping for the best.
00178     uint8_t seed[prng_seed_len(prng)];
00179     random_pull_entropy(seed, sizeof(seed));
00180     prng_reseed(prng, seed);
00181     PURGE(seed);
00182
00183 #endif
00184 }
00185
00186 void random_init(void)
00187 {
00188 #if CONFIG_RANDOM_POOL != POOL_NONE
00189     POOL_INIT(&epool_ctx);
00190 #endif
00191     PRNG_INIT(&prng_ctx);
00192
00193     initialized = 1;
00194     initial_seeding();
00195 }
00196
00197 void random_gen(uint8_t *out, size_t len)
00198 {
00199     ASSERT(initialized);
00200
00201     optional_reseeding();
00202     prng_generate(prng, out, len);
00203 }
00204
00205 #if CONFIG_RANDOM_POOL != POOL_NONE
00206
00207 void random_add_entropy(enum EntropySource source_idx,
00208                         const uint8_t *data, size_t len,
00209                         int entropy)
00210 {
00211     entropy_add(epool, source_idx, data, len, entropy);
00212 }
00213
00214 #endif


BeRTOS: random.h File Reference

  • sec
random.h File Reference

High-level random number generation functions. More...

#include "cfg/cfg_random.h"
#include <cfg/compiler.h>

Go to the source code of this file.

Defines

Security level definition

Configure the security level required by the application.

Application developers are suggested to keep the strongest setting (default) unless there are memory or code size issues.

Available settings are:

* RANDOM_SECURITY_STRONG: The random library will use an entropy pool, automatically feeded by drivers, to gather entropy from hardware sources. Data from the pool will be used to reseed a secure random number generator. Moreover, the generator will be automatically initialised with enough entropy to generate safe random numbers even immediately after hw reset. The overall structure is the same as used by modern desktop PCs for generating secure random numbers.

* RANDOM_SECURITY_MEDIUM: This intermediate settings will avoid usage of an entropy pool, to reduce memory and code usage. The security of this settings relies only on the good behaviour of the random number generator (even though it will be well-seeded at startup).

* RANDOM_SECURITY_MINIMUM: This is the lighter setting that allows minimal memory and code usage, and it suggested only for extremely constrained systems, that only generates few random numbers. Even if the generator is still secure on paper, its seeding will not be safe (though still entropic to allow different sequences to be generated after each reset).

#define | RANDOM_SECURITY_MINIMUM 0
#define | RANDOM_SECURITY_MEDIUM 1
#define | RANDOM_SECURITY_STRONG 2

Detailed Description

High-level random number generation functions.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file random.h.


BeRTOS: random.h Source File

  • sec
random.h
Go to the documentation of this file.
00001
00042 #ifndef SEC_RANDOM_H
00043 #define SEC_RANDOM_H
00044
00045 #include "cfg/cfg_random.h"
00046 #include <cfg/compiler.h>
00047
00085 #define RANDOM_SECURITY_MINIMUM        0
00086 #define RANDOM_SECURITY_MEDIUM         1
00087 #define RANDOM_SECURITY_STRONG         2
00088
00090 void random_init(void);
00091
00092 void random_gen(uint8_t *out, size_t len);
00093
00094 INLINE uint8_t random_gen8(void)
00095 {
00096     uint8_t x;
00097     random_gen(&x, 1);
00098     return x;
00099 }
00100
00101 INLINE uint16_t random_gen16(void)
00102 {
00103     uint8_t x;
00104     random_gen(&x, 2);
00105     return x;
00106 }
00107
00108 INLINE uint32_t random_gen32(void)
00109 {
00110     uint8_t x;
00111     random_gen(&x, 4);
00112     return x;
00113 }
00114
00115 #endif /* SEC_RANDOM_H */


BeRTOS: random_lm3s.c File Reference

  • cpu
  • cortex-m3
  • drv
random_lm3s.c File Reference

LM3 backend implementation entropy pulling. More...

#include "random_p.h"
#include <cpu/power.h>
#include <io/cm3.h>
#include <drv/clock_cm3.h>

Go to the source code of this file.

Detailed Description

LM3 backend implementation entropy pulling.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file random_lm3s.c.


BeRTOS: random_lm3s.c Source File

  • cpu
  • cortex-m3
  • drv
random_lm3s.c
Go to the documentation of this file.
00001
00037 #include "random_p.h"
00038
00039 #include <cpu/power.h>
00040
00041 #include <io/cm3.h>
00042
00043 #include <drv/clock_cm3.h>
00044
00045 /*
00046  * Return the cpu core temperature in raw format
00047  */
00048 INLINE uint16_t hw_readRawTemp(void)
00049 {
00050     /* Trig the temperature sampling */
00051     HWREG(ADC0_BASE + ADC_O_PSSI) |= ADC_PSSI_SS3;
00052
00053     while (!(HWREG(ADC0_BASE + ADC_O_SSFSTAT3) & ADC_SSFSTAT3_FULL))
00054         cpu_relax();
00055
00056     return (uint16_t)HWREG(ADC0_BASE + ADC_O_SSFIFO3);
00057 }
00058
00059 INLINE void hw_initIntTemp(void)
00060 {
00061     SYSCTL_RCGC0_R |= SYSCTL_RCGC0_ADC0;
00062
00063     lm3s_busyWait(10);
00064
00065     /* Disable all sequence */
00066     HWREG(ADC0_BASE + ADC_O_ACTSS) = 0;
00067     /* Set trigger event to programmed (for all sequence) */
00068     HWREG(ADC0_BASE + ADC_O_EMUX) = 0;
00069     /* Enalbe read of temperature sensor */
00070     HWREG(ADC0_BASE + ADC_O_SSCTL3) |= ADC_SSCTL3_TS0;
00071     /* Enable sequence S03 (single sample on select channel) */
00072     HWREG(ADC0_BASE + ADC_O_ACTSS) |= ADC_ACTSS_ASEN3;
00073 }
00074
00075
00076 void random_pull_entropy(uint8_t *entropy, size_t len)
00077 {
00078     // We use the internal temperature sensor of LM3S as a source of entropy.
00079     // The last bit of the acquisition is very variable and with a decent distribution
00080     // to consider it "entropic". It does not really matter because it will
00081     // go through a randomness extractor anyway.
00082     hw_initIntTemp();
00083
00084     for (size_t j=0; j<len; j++)
00085     {
00086         uint8_t accum = 0;
00087         for (int b=0; b<8; ++b)
00088             if (hw_readRawTemp() & 1)
00089                 accum |= 1<<b;
00090
00091         *entropy++ = accum;
00092     }
00093 }


BeRTOS: random_p.h File Reference

  • sec
random_p.h File Reference

Internal function definitions for random. More...

#include <cfg/compiler.h>
#include <sec/random.h>

Go to the source code of this file.

Detailed Description

Internal function definitions for random.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file random_p.h.


BeRTOS: random_p.h Source File

  • sec
random_p.h
Go to the documentation of this file.
00001
00038 #ifndef SEC_RANDOM_P_H
00039 #define SEC_RANDOM_P_H
00040
00041 #include <cfg/compiler.h>
00042 #include <sec/random.h>
00043
00044 /********************************************************************************/
00045 /* Configuration of the random module                                           */
00046 /********************************************************************************/
00047
00048 #define POOL_NONE       0
00049 #define POOL_YARROW     1
00050 #define POOL_NAMEU1     YarrowPool
00051 #define POOL_NAMEL1     yarrowpool
00052
00053 #define PRNG_ISAAC      1
00054 #define PRNG_X917       2
00055 #define PRNG_YARROW     3
00056 #define PRNG_NAMEU1     Isaac
00057 #define PRNG_NAMEL1     isaac
00058 #define PRNG_NAMEU2     X917
00059 #define PRNG_NAMEL2     x917
00060 #define PRNG_NAMEU3     Yarrow
00061 #define PRNG_NAMEL3     yarrow
00062
00063 #define EXTRACTOR_NONE  0
00064 #define EXTRACTOR_SHA1  1
00065 #define EXTRACTOR_NAME1 SHA1
00066
00067 #if RANDOM_SECURITY_LEVEL == RANDOM_SECURITY_STRONG
00068     #define CONFIG_RANDOM_POOL          POOL_YARROW
00069     #define CONFIG_RANDOM_EXTRACTOR     EXTRACTOR_NONE   // not required with a pool
00070     #define CONFIG_RANDOM_PRNG          PRNG_YARROW
00071 #elif RANDOM_SECURITY_LEVEL == RANDOM_SECURITY_MEDIUM
00072     #define CONFIG_RANDOM_POOL          POOL_NONE
00073     #define CONFIG_RANDOM_EXTRACTOR     EXTRACTOR_SHA1
00074     #define CONFIG_RANDOM_PRNG          PRNG_X917
00075 #elif RANDOM_SECURITY_LEVEL == RANDOM_SECURITY_MINIMUM
00076     #define CONFIG_RANDOM_POOL          POOL_NONE
00077     #define CONFIG_RANDOM_EXTRACTOR     EXTRACTOR_NONE
00078     #define CONFIG_RANDOM_PRNG          PRNG_ISAAC
00079 #else
00080     #error Unsupported random security level value
00081 #endif
00082
00083 /***************************************************************************/
00084 /* Internal functions used by BeRTOS drivers to push data into             */
00085 /* the entropy pool                                                        */
00086 /***************************************************************************/
00087
00088 #if CONFIG_RANDOM_POOL != POOL_NONE
00089
00090 enum EntropySource
00091 {
00092     ENTROPY_SOURCE_IRQ,
00093     ENTROPY_SOURCE_ADC,
00094 };
00095
00096 /*
00097  * Add entropy to the global entropy pool.
00098  */
00099 void random_add_entropy(enum EntropySource source_idx,
00100                         const uint8_t *data, size_t len,
00101                         int entropy);
00102
00103
00104 /*
00105  * Add entropy to the global interrupt pool based on the IRQ
00106  * call time.
00107  *
00108  * This function can be called from interrupt handlers that are
00109  * triggered at unpredictable intervals (so it should not be
00110  * called from clock-driven interrupts like ADC, PWM, etc.).
00111  *
00112  */
00113 void random_add_entropy_irq(int irq);
00114
00115 #endif
00116
00117 /*
00118  * This hardware-dependent function can be used to pull raw
00119  * entropy from a hardware source at startup only. It is used
00120  * for initial seeding of the random generator and should not
00121  * be used in different situations.
00122  */
00123 void random_pull_entropy(uint8_t *entropy, size_t len);
00124
00125 #endif /* SEC_RANDOM_P_H */


BeRTOS: random_stm32.c File Reference

  • cpu
  • cortex-m3
  • drv
random_stm32.c File Reference

STM32 backend implementation entropy pulling. More...

#include <sec/random_p.h>
#include <cpu/power.h>
#include <drv/clock_cm3.h>
#include <io/cm3.h>

Go to the source code of this file.

Detailed Description

STM32 backend implementation entropy pulling.

Author:
Daniele Basile <asterix@develer.com>

Definition in file random_stm32.c.


BeRTOS: random_stm32.c Source File

  • cpu
  • cortex-m3
  • drv
random_stm32.c
Go to the documentation of this file.
00001
00038 #include <sec/random_p.h>
00039
00040 #include <cpu/power.h>
00041
00042 #include <drv/clock_cm3.h>
00043
00044 #include <io/cm3.h>
00045
00046 struct stm32_adc *adc = (struct stm32_adc *)ADC1_BASE;
00047
00048 /*
00049  * Return the cpu core temperature in raw format
00050  */
00051 INLINE uint16_t hw_readRawTemp(void)
00052 {
00053     /* We sample only from one channel */
00054     adc->SQR1 |= BV(SQR1_SQ_LEN_SHIFT);
00055     adc->SQR3 = (ADC_TEMP_CH & SQR3_SQ_MASK);
00056
00057     /* Start convertion */
00058     adc->CR2 |= CR2_EXTTRIG_SWSTRT_SET;
00059
00060     /* Wait in polling until conversion is done */
00061     while (!(adc->SR & BV(SR_EOC)))
00062         cpu_relax();
00063
00064     /* Return the last converted data */
00065     return (uint16_t)adc->DR;
00066 }
00067
00068 INLINE void hw_initIntTemp(void)
00069 {
00070     RCC->APB2ENR |= RCC_APB2_ADC1;
00071
00072     /* Reset registry */
00073     adc->CR1 = 0;
00074     adc->CR2 = 0;
00075     adc->SQR1 = 0;
00076     adc->SQR2 = 0;
00077     adc->SQR3 = 0;
00078
00079     /*
00080      * Configure ADC
00081      *  - Regular mode
00082      *  - Wake up adc
00083      *  - Wake up temperature and Vrefint
00084      */
00085     adc->CR2 |= BV(CR2_ADON) | ADC_EXTERNALTRIGCONV_NONE | BV(CR2_TSVREFE);
00086
00087     /* Set 17.1usec sampling time*/
00088     adc->SMPR1 |= ((ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH17) | (ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH16));
00089 }
00090
00091
00092 void random_pull_entropy(uint8_t *entropy, size_t len)
00093 {
00094     // We use the internal temperature sensor of LM3S as a source of entropy.
00095     // The last bit of the acquisition is very variable and with a decent distribution
00096     // to consider it "entropic". It does not really matter because it will
00097     // go through a randomness extractor anyway.
00098     hw_initIntTemp();
00099
00100     for (size_t j=0; j<len; j++)
00101     {
00102         uint8_t accum = 0;
00103         for (int b=0; b<8; ++b)
00104             if (hw_readRawTemp() & 1)
00105                 accum |= 1<<b;
00106
00107         *entropy++ = accum;
00108     }
00109 }


BeRTOS: randpool.c File Reference

  • algo
Functions
randpool.c File Reference

API function for to manage entropy pool. More...

#include "randpool.h"
#include "md2.h"
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <stdio.h>
#include <string.h>

Go to the source code of this file.

Functions

void | randpool_add (EntropyPool *pool, void *data, size_t entropy)
Add.
void | randpool_init (EntropyPool *pool, void *_data, size_t len)
Randpool function initialization.
size_t | randpool_size (EntropyPool *pool)
Get the actual value of entropy.
void | randpool_get (EntropyPool *pool, void *_data, size_t n_byte)
Get.
uint8_t * | randpool_pool (EntropyPool *pool)
Return a pointer to entropy pool.

Detailed Description

API function for to manage entropy pool.

Author:
Daniele Basile <asterix@develer.com>

Definition in file randpool.c.

Function Documentation

void randpool_add | ( | EntropyPool * | pool,
 |  | void * | data,
 |  | size_t | entropy
 | ) |  |

Add.

Parameters:
entropy | bits from
data | buffer to the entropy
pool

Definition at line 120 of file randpool.c.

void randpool_get | ( | EntropyPool * | pool,
 |  | void * | _data,
 |  | size_t | n_byte
 | ) |  |

Get.

Parameters:
n_byte | from entropy pool. If n_byte is larger than number byte of entropy in entropy pool, randpool_get continue to generate pseudocasual value from previous state of pool.
n_byte | number fo bytes to read.
pool | is the pool entropy context.
_data | is the pointer to write the random data to.

Definition at line 205 of file randpool.c.

void randpool_init | ( | EntropyPool * | pool,
 |  | void * | _data,
 |  | size_t | len
 | ) |  |

Randpool function initialization.

The entropy pool can be initialize also with a previous entropy pool.

Definition at line 161 of file randpool.c.


BeRTOS: randpool.c Source File

  • algo
randpool.c
Go to the documentation of this file.
00001
00038 #include "randpool.h"
00039 #include "md2.h"
00040
00041 #include <cfg/compiler.h>
00042 #include <cfg/debug.h>       //ASSERT()
00043 #include <cfg/macros.h>      //MIN(), ROUND_UP();
00044
00045 #include <stdio.h>           //sprintf();
00046 #include <string.h>          //memset(), memcpy();
00047
00048 #if CONFIG_RANDPOOL_TIMER
00049     #include <drv/timer.h>       //timer_clock();
00050 #endif
00051
00052
00053
00054 /*
00055  * Insert bytes in entropy pool, making a XOR of bytes present
00056  * in entropy pool.
00057  */
00058 static void randpool_push(EntropyPool *pool, void *_byte, size_t n_byte)
00059 {
00060     size_t i = pool->pos_add; // Current number of byte insert in entropy pool.
00061     uint8_t *byte;
00062
00063     byte = (uint8_t *)_byte;
00064
00065     /*
00066      * Insert a bytes in entropy pool.
00067      */
00068     for(size_t j = 0; j < n_byte; j++)
00069     {
00070         pool->pool_entropy[i] = pool->pool_entropy[i] ^ byte[j];
00071         i++;
00072         i = i % CONFIG_SIZE_ENTROPY_POOL;
00073     }
00074
00075     pool->pos_add  =  i; // Update a insert bytes.
00076 }
00077
00078
00079 /*
00080  * This function stir entropy pool with MD2 function hash.
00081  *
00082  */
00083 static void randpool_stir(EntropyPool *pool)
00084 {
00085     size_t entropy = pool->entropy; //Save current calue of entropy.
00086     Md2Context context;
00087     uint8_t tmp_buf[((sizeof(size_t) * 2) + sizeof(int)) * 2 + 1]; //Temporary buffer.
00088
00089     md2_init(&context); //Init MD2 algorithm.
00090
00091     randpool_add(pool, NULL, 0);
00092
00093     for (int i = 0; i < (CONFIG_SIZE_ENTROPY_POOL / MD2_DIGEST_LEN); i++)
00094     {
00095         sprintf((char *)tmp_buf, "%0x%0x%0x", pool->counter, i, pool->pos_add);
00096
00097         /*
00098          * Hash with MD2 algorithm the entropy pool.
00099          */
00100         md2_update(&context, pool->pool_entropy, CONFIG_SIZE_ENTROPY_POOL);
00101
00102         md2_update(&context, tmp_buf, sizeof(tmp_buf) - 1);
00103
00104         /*Insert a message digest in entropy pool.*/
00105         randpool_push(pool, md2_end(&context), MD2_DIGEST_LEN);
00106
00107         pool->counter = pool->counter + 1;
00108
00109     }
00110
00111     /*Insert in pool the difference between a two call of this function (see above).*/
00112     randpool_add(pool, NULL, 0);
00113
00114     pool->entropy = entropy; //Restore old value of entropy. We haven't add entropy.
00115 }
00116
00120 void randpool_add(EntropyPool *pool, void *data, size_t entropy)
00121 {
00122     uint8_t sep[] = "\xaa\xaa\xaa\xaa";  // ??
00123     size_t data_len = ROUND_UP(entropy, 8) / 8; //Number of entropy byte in input.
00124
00125     randpool_push(pool, data, data_len); //Insert data to entropy pool.
00126
00127 #if CONFIG_RANDPOOL_TIMER
00128
00129     ticks_t event = timer_clock();
00130     ticks_t delta;
00131
00132     /*Difference of time between a two accese to entropy pool.*/
00133     delta = event - pool->last_counter;
00134
00135     randpool_push(pool, &event, sizeof(ticks_t));
00136     randpool_push(pool, sep, sizeof(sep) - 1); // ??
00137     randpool_push(pool, &delta, sizeof(delta));
00138
00139     /*
00140      * Count of number entropy bit add with delta.
00141      */
00142     delta = delta & 0xff;
00143     while(delta)
00144     {
00145         delta >>= 1;
00146         entropy++;
00147     }
00148
00149     pool->last_counter = event;
00150
00151 #endif
00152
00153     pool->entropy += entropy;      //Update a entropy of the pool.
00154 }
00155
00161 void randpool_init(EntropyPool *pool, void *_data, size_t len)
00162 {
00163     uint8_t *data;
00164
00165     data = (uint8_t *)_data;
00166
00167     memset(pool, 0, sizeof(EntropyPool));
00168     pool->pos_get = MD2_DIGEST_LEN;
00169
00170 #if CONFIG_RANDPOOL_TIMER
00171     pool->last_counter = timer_clock();
00172 #endif
00173
00174     if(data)
00175     {
00176         /*
00177          * Initialize a entropy pool with a
00178          * previous pool, and assume all pool as
00179          * entropy.
00180          */
00181         len = MIN(len,(size_t)CONFIG_SIZE_ENTROPY_POOL);
00182         memcpy(pool->pool_entropy, data, len);
00183         pool->entropy = len;
00184     }
00185
00186 }
00187
00191 size_t randpool_size(EntropyPool *pool)
00192 {
00193     return pool->entropy;
00194 }
00195
00205 void randpool_get(EntropyPool *pool, void *_data, size_t n_byte)
00206 {
00207     Md2Context context;
00208     size_t i = pool->pos_get;
00209     size_t n = n_byte;
00210     size_t pos_write = 0;  //Number of block has been written in data.
00211     size_t len = MIN((size_t)MD2_DIGEST_LEN, n_byte);
00212     uint8_t *data;
00213
00214     data = (uint8_t *)_data;
00215
00216     /* Test if i + CONFIG_MD2_BLOCK_LEN  is inside of entropy pool.*/
00217     ASSERT((MD2_DIGEST_LEN + i) <= CONFIG_SIZE_ENTROPY_POOL);
00218
00219     md2_init(&context);
00220
00221     while(n > 0)
00222     {
00223
00224         /*Hash previous state of pool*/
00225         md2_update(&context, &pool->pool_entropy[i], MD2_DIGEST_LEN);
00226
00227         memcpy(&data[pos_write], md2_end(&context), len);
00228
00229         pos_write += len;   //Update number of block has been written in data.
00230         n -= len;           //Number of byte copied in data.
00231
00232         len = MIN(n,(size_t)MD2_DIGEST_LEN);
00233
00234         i = (i + MD2_DIGEST_LEN) % CONFIG_SIZE_ENTROPY_POOL;
00235
00236         /* If we haven't more entropy pool to hash, we stir it.*/
00237         if(i < MD2_DIGEST_LEN)
00238         {
00239             randpool_stir(pool);
00240             i = pool->pos_get;
00241         }
00242
00243     }
00244
00245     pool->pos_get = i; //Current number of byte we get from pool.
00246     pool->entropy -= n_byte; //Update a entropy.
00247
00248 }
00249
00253 uint8_t *randpool_pool(EntropyPool *pool)
00254 {
00255     return pool->pool_entropy;
00256 }
00257


BeRTOS: randpool.h File Reference

  • algo
Data Structures | Functions
randpool.h File Reference

Collection of functions to manage entropy pool. More...

#include "cfg/cfg_randpool.h"
#include <cfg/compiler.h>

Go to the source code of this file.

Data Structures

struct | EntropyPool
Sturct data of entropy pool. More...

Functions

void | randpool_add (EntropyPool *pool, void *data, size_t entropy)
Add.
void | randpool_init (EntropyPool *pool, void *_data, size_t len)
Randpool function initialization.
size_t | randpool_size (EntropyPool *pool)
Get the actual value of entropy.
void | randpool_get (EntropyPool *pool, void *data, size_t n_byte)
Get.
uint8_t * | randpool_pool (EntropyPool *pool)
Return a pointer to entropy pool.

Detailed Description

Collection of functions to manage entropy pool.

Author:
Daniele Basile <asterix@develer.com>

Definition in file randpool.h.

Function Documentation

void randpool_add | ( | EntropyPool * | pool,
 |  | void * | data,
 |  | size_t | entropy
 | ) |  |

Add.

Parameters:
entropy | bits from
data | buffer to the entropy
pool

Definition at line 120 of file randpool.c.

void randpool_get | ( | EntropyPool * | pool,
 |  | void * | _data,
 |  | size_t | n_byte
 | ) |  |

Get.

Parameters:
n_byte | from entropy pool. If n_byte is larger than number byte of entropy in entropy pool, randpool_get continue to generate pseudocasual value from previous state of pool.
n_byte | number fo bytes to read.
pool | is the pool entropy context.
_data | is the pointer to write the random data to.

Definition at line 205 of file randpool.c.

void randpool_init | ( | EntropyPool * | pool,
 |  | void * | _data,
 |  | size_t | len
 | ) |  |

Randpool function initialization.

The entropy pool can be initialize also with a previous entropy pool.

Definition at line 161 of file randpool.c.


BeRTOS: randpool.h Source File

  • algo
randpool.h
Go to the documentation of this file.
00001
00043 #ifndef ALGO_RANDPOOL_H
00044 #define ALGO_RANDPOOL_H
00045
00046 #include "cfg/cfg_randpool.h"
00047 #include <cfg/compiler.h>
00048
00049
00053 typedef struct EntropyPool
00054 {
00055     size_t entropy;
00056     size_t pos_add;
00057     size_t pos_get;
00058     size_t counter;
00059
00060 #if CONFIG_RANDPOOL_TIMER
00061     size_t last_counter;
00062 #endif
00063
00064     uint8_t pool_entropy[CONFIG_SIZE_ENTROPY_POOL];
00065
00066 } EntropyPool;
00067
00068
00069 void randpool_add(EntropyPool *pool, void *data, size_t entropy);
00070 void randpool_init(EntropyPool *pool, void *_data, size_t len);
00071 size_t randpool_size(EntropyPool *pool);
00072 void randpool_get(EntropyPool *pool, void *data, size_t n_byte);
00073 uint8_t *randpool_pool(EntropyPool *pool);
00074
00075 #endif /* ALGO_RANDPOOL_H */


BeRTOS: readline.c File Reference

  • mware
Defines | Enumerations | Functions
readline.c File Reference

Line editing support with history. More...

#include "readline.h"
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <stdio.h>

Go to the source code of this file.

Defines

#define | DEBUG_UNIT_TEST 0
Enable compilation of the unit test code.
#define | DEBUG_DUMP_HISTORY 0
Enable dump of the history after each line.
#define | IS_WORD_SEPARATOR(c) ((c) == ' ' || (c) == '\0')
Check if c is a separator between words.

Enumerations

enum | RL_KEYS
Special keys (escape sequences converted to a single code)

Functions

void | rl_puts (const struct RLContext *ctx, const char *txt)
Write the string txt to the IO output (without any kind of termination)
void | rl_putc (const struct RLContext *ctx, char ch)
Write character ch to the IO output.
static bool | rl_getc (const struct RLContext *ctx, int *ch)
Read a character from the IO into ch.
bool | is_history_begin (struct RLContext *ctx, int i)
Check if index i points to the begin of the history.
bool | is_history_end (struct RLContext *ctx, int i)
Check if index i points to the (exclusive) end of history.
bool | is_history_past_end (struct RLContext *ctx, int i)
Check if index i points to the (exclusive) end of history, or somewhere past the end.
static bool | insert_chars (struct RLContext *ctx, size_t *curpos, const char *ch, int num_chars)
Insert num_chars characters from ch into the history buffer at the position indicated by curpos.
static bool | insert_char (struct RLContext *ctx, size_t *curpos, char ch)
Insert a single character ch into the buffer (with the same semantic of insert_chars())
static bool | complete_word (struct RLContext *ctx, size_t *curpos)
Complete the current word. Return false if no unambiguous completion was found.

Detailed Description

Line editing support with history.

Rationale for basic implementation choices:

  • The history is implemented storing consecutive ASCIIZ strings within an array of memory. When the history is full, the first (oldest) line is cancelled and the whole buffer is memmoved to overwrite it and make room. while this is is obviously not the fastest algorithm (which would require the use of a circular buffer) it is surely good enough for this module, which does not aim at fast performances (line editing does not require to be blazingly fast).
  • The first character in the history is always \0, and it is used as a guard. By 'wasting' it in this way, the code actually gets much simpler in that we remove many checks when moving backward (i>0 and similar).
  • While editing, the current index points to the position of the buffer which contains the last character typed in (exactly like a stack pointer). This also allows to simplify calculations and to make easier using the last byte of history.
  • While editing, the current line is always kept null-terminated. This is important because if the user press ENTER, we must have room to add a \0 to terminate the line. If the line is as long as the whole history buffer, there would not be space for it. By always keeping the \0 at the end, we properly ensure this without making index checks harder.
  • When removing a line from the history (see pop_history()), instead of updating all the indices we have around, we move backward the pointer to the history we use. This way, we don't have to update anything. This means that we keep two pointers to the history: real_history always points to the physical start, while history is the adjusted pointer (that is dereference to read/write to it).
Author:
Giovanni Bajo <rasky@develer.com>

Definition in file readline.c.

Define Documentation

#define IS_WORD_SEPARATOR ( c ) ((c) == ' ' || (c) == '\0')

Check if c is a separator between words.

Note:
Parameter c is evaluated multiple times

Definition at line 139 of file readline.c.

Function Documentation

static bool insert_chars | ( | struct RLContext * | ctx,
 |  | size_t * | curpos,
 |  | const char * | ch,
 |  | int | num_chars
 | ) |  | [static]

Insert num_chars characters from ch into the history buffer at the position indicated by curpos.

If needed, remove old history to make room. Returns true if everything was successful, false if there was no room to add the characters.

Note:
num_chars can be 0, in which case we just make sure the line is correctly zero-terminated (ASCIIZ format).

Definition at line 270 of file readline.c.

static bool rl_getc | ( | const struct RLContext * | ctx,
 |  | int * | ch
 | ) |  | [static]

Read a character from the IO into ch.

This function also takes care of converting the ANSI escape sequences into one of the codes defined in RL_KEYS.

Definition at line 162 of file readline.c.


BeRTOS: readline.c Source File

  • mware
readline.c
Go to the documentation of this file.
00001
00070 #include "readline.h"
00071
00072 #include <cfg/compiler.h>
00073 #include <cfg/debug.h>
00074
00075 #include <stdio.h>
00076
00078 #define DEBUG_UNIT_TEST       0
00079
00081 #define DEBUG_DUMP_HISTORY    0
00082
00083
00085 enum RL_KEYS {
00086     SPECIAL_KEYS = 0x1000,
00087
00088     /*
00089      * Three byte keys:
00090      * #################
00091      * UpArrow:     0x1B 0x5B 0X41
00092      * DownArrow:   0x1B 0x5B 0X42
00093      * RightArrow:  0x1B 0x5B 0x43
00094      * LeftArrow:   0x1b 0x5B 0x44
00095      * Beak(Pause): 0x1b 0x5B 0x50
00096     */
00097     KEY_UP_ARROW,
00098     KEY_DOWN_ARROW,
00099     KEY_LEFT_ARROW,
00100     KEY_RIGHT_ARROW,
00101     KEY_PAUSE,
00102
00103     /*
00104      * Four byte keys:
00105      * ################
00106      * F1:          0x1b 0x5B 0x5B 0x41
00107      * F2:          0x1b 0x5B 0x5B 0x42
00108      * F3:          0x1b 0x5B 0x5B 0x43
00109      * F4:          0x1b 0x5B 0x5B 0x44
00110      * F5:          0x1b 0x5B 0x5B 0x45
00111      * Ins:         0x1b 0x5B 0x32 0x7E
00112      * Home:        0x1b 0x5B 0x31 0x7E
00113      * PgUp:        0x1b 0x5B 0x35 0x7E
00114      * Del:         0x1b 0x5B 0x33 0x7E
00115      * End:         0x1b 0x5B 0x34 0x7E
00116      * PgDn:        0x1b 0x5B 0x36 0x7E
00117      */
00118     KEY_F1, KEY_F2, KEY_F3, KEY_F4, KEY_F5,
00119     KEY_INS, KEY_HOME, KEY_PGUP, KEY_DEL, KEY_END, KEY_PGDN,
00120
00121     /*
00122      * Five byte keys:
00123      * ################
00124      * F6:          0x1b 0x5B 0x31 0x37 0x7E
00125      * F7:          0x1b 0x5B 0x31 0x38 0x7E
00126      * F8:          0x1b 0x5B 0x31 0x39 0x7E
00127      * F9:          0x1b 0x5B 0x32 0x30 0x7E
00128      * F10:         0x1b 0x5B 0x32 0x31 0x7E
00129      * F11:         0x1b 0x5B 0x32 0x33 0x7E
00130      * F12:         0x1b 0x5B 0x32 0x34 0x7E
00131      */
00132     KEY_F6, KEY_F7, KEY_F8, KEY_F9,
00133     KEY_F10, KEY_F11, KEY_F12,
00134 };
00135
00139 #define IS_WORD_SEPARATOR(c) ((c) == ' ' || (c) == '\0')
00140
00142 INLINE void rl_puts(const struct RLContext* ctx, const char* txt)
00143 {
00144     if (!ctx->put)
00145         return;
00146
00147     while (*txt)
00148         ctx->put(*txt++, ctx->put_param);
00149 }
00150
00152 INLINE void rl_putc(const struct RLContext* ctx, char ch)
00153 {
00154     if (ctx->put)
00155         ctx->put(ch, ctx->put_param);
00156 }
00157
00162 static bool rl_getc(const struct RLContext* ctx, int* ch)
00163 {
00164     int c = ctx->get(ctx->get_param);
00165
00166     if (c == EOF)
00167     {
00168         if (ctx->clear)
00169             ctx->clear(ctx->clear_param);
00170
00171         return false;
00172     }
00173
00174     if (c == 0x1B)
00175     {
00176         // Unknown ESC sequence. Ignore it and read
00177         //  return next character.
00178         if (ctx->get(ctx->get_param) != 0x5B)
00179             return rl_getc(ctx, ch);
00180
00181         /* To be added:
00182             * Home:        0x1b 0x5B 0x31 0x7E
00183             * F6:          0x1b 0x5B 0x31 0x37 0x7E
00184             * F7:          0x1b 0x5B 0x31 0x38 0x7E
00185             * F8:          0x1b 0x5B 0x31 0x39 0x7E
00186             * Ins:         0x1b 0x5B 0x32 0x7E
00187             * F9:          0x1b 0x5B 0x32 0x30 0x7E
00188             * F10:         0x1b 0x5B 0x32 0x31 0x7E
00189             * F11:         0x1b 0x5B 0x32 0x33 0x7E
00190             * F12:         0x1b 0x5B 0x32 0x34 0x7E
00191             * Del:         0x1b 0x5B 0x33 0x7E
00192             * End:         0x1b 0x5B 0x34 0x7E
00193             * PgUp:        0x1b 0x5B 0x35 0x7E
00194             * PgDn:        0x1b 0x5B 0x36 0x7E
00195         */
00196
00197         c = ctx->get(ctx->get_param);
00198         switch (c)
00199         {
00200         case 0x41: c = KEY_UP_ARROW; break;
00201         case 0x42: c = KEY_DOWN_ARROW; break;
00202         case 0x43: c = KEY_RIGHT_ARROW; break;
00203         case 0x44: c = KEY_LEFT_ARROW; break;
00204         case 0x50: c = KEY_PAUSE; break;
00205         case 0x5B:
00206             c = ctx->get(ctx->get_param);
00207             switch (c)
00208             {
00209             case 0x41: c = KEY_F1; break;
00210             case 0x42: c = KEY_F2; break;
00211             case 0x43: c = KEY_F3; break;
00212             case 0x44: c = KEY_F4; break;
00213             case 0x45: c = KEY_F5; break;
00214             default: return rl_getc(ctx, ch);
00215             }
00216             break;
00217         default: return rl_getc(ctx, ch);
00218         }
00219     }
00220
00221     *ch = c;
00222     return true;
00223 }
00224
00225 INLINE void beep(struct RLContext* ctx)
00226 {
00227     rl_putc(ctx, '\a');
00228 }
00229
00230 static bool pop_history(struct RLContext* ctx, int total_len)
00231 {
00232     // Compute the length of the first command (including terminator).
00233     int len = strlen(ctx->real_history+1)+1;
00234
00235     // (the first byte of the history should always be 0)
00236     ASSERT(ctx->real_history[0] == '\0');
00237
00238     // If it is the only one in the history, do nothing
00239     if (len == total_len)
00240         return false;
00241
00242     // Overwrite the first command with the second one
00243     memmove(ctx->real_history, ctx->real_history+len, HISTORY_SIZE-len);
00244
00245     // Move back the ctx->buffer pointer so that all the indices are still valid
00246     ctx->history -= len;
00247
00248     return true;
00249 }
00250
00252 INLINE bool is_history_begin(struct RLContext* ctx, int i)
00253 { return ctx->history + i == ctx->real_history; }
00254
00256 INLINE bool is_history_end(struct RLContext* ctx, int i)
00257 { return ctx->history + i == ctx->real_history + HISTORY_SIZE; }
00258
00260 INLINE bool is_history_past_end(struct RLContext* ctx, int i)
00261 { return ctx->history + i >= ctx->real_history + HISTORY_SIZE; }
00262
00270 static bool insert_chars(struct RLContext* ctx, size_t *curpos, const char* ch, int num_chars)
00271 {
00272     ASSERT(!is_history_past_end(ctx, *curpos));
00273
00274     while (is_history_past_end(ctx, *curpos+num_chars+1))
00275     {
00276         if (!pop_history(ctx, *curpos))
00277             return false;
00278     }
00279
00280     while (num_chars--)
00281         ctx->history[++(*curpos)] = *ch++;
00282
00283     ASSERT(!is_history_past_end(ctx, *curpos + 1));
00284     ctx->history[*curpos+1] = '\0';
00285     return true;
00286 }
00287
00289 static bool insert_char(struct RLContext* ctx, size_t *curpos, char ch)
00290 {
00291     return insert_chars(ctx, curpos, &ch, 1);
00292 }
00293
00294 #if DEBUG_DUMP_HISTORY
00295
00296 static void dump_history(struct RLContext* ctx)
00297 {
00298     int k;
00299     char buf[8];
00300     ASSERT(ctx->real_history[0] == '\0');
00301     rl_puts(ctx, "History dump:");
00302     rl_puts(ctx, "\r\n");
00303     for (k = 1;
00304          ctx->real_history + k != ctx->history + ctx->history_pos + 1;
00305          k += strlen(&ctx->real_history[k]) + 1)
00306     {
00307         rl_puts(ctx, &ctx->real_history[k]);
00308         rl_puts(ctx, "\r\n");
00309     }
00310
00311     sprintf(buf, "%d\r\n", ctx->history_pos + (ctx->history - ctx->real_history));
00312     rl_puts(ctx, buf);
00313 }
00314 #endif /* DEBUG_DUMP_HISTORY */
00315
00317 static bool complete_word(struct RLContext *ctx, size_t *curpos)
00318 {
00319     const char* completed_word;
00320     size_t wstart;
00321
00322     // If the current character is a separator,
00323     //  there is nothing to complete
00324     wstart = *curpos;
00325     if (IS_WORD_SEPARATOR(ctx->history[wstart]))
00326     {
00327         beep(ctx);
00328         return false;
00329     }
00330
00331     // Find the separator before the current word
00332     do
00333         --wstart;
00334     while (!IS_WORD_SEPARATOR(ctx->history[wstart]));
00335
00336     // Complete the word through the hook
00337     completed_word = ctx->match(ctx->match_param, ctx->history + wstart + 1, *curpos - wstart);
00338     if (!completed_word)
00339         return false;
00340
00341     // Move back the terminal cursor to the separator
00342     while (*curpos != wstart)
00343     {
00344         rl_putc(ctx, '\b');
00345         --*curpos;
00346     }
00347
00348     // Insert the completed command
00349     insert_chars(ctx, curpos, completed_word, strlen(completed_word));
00350     rl_puts(ctx, completed_word);
00351     insert_char(ctx, curpos, ' ');
00352     rl_putc(ctx, ' ');
00353
00354     return true;
00355 }
00356
00357 void rl_refresh(struct RLContext* ctx)
00358 {
00359     rl_puts(ctx, "\r\n");
00360     if (ctx->prompt)
00361         rl_puts(ctx, ctx->prompt);
00362     rl_puts(ctx, ctx->history + ctx->history_pos + 1);
00363 }
00364
00365 const char* rl_readline(struct RLContext* ctx)
00366 {
00367     while (1)
00368     {
00369         char ch;
00370         int c;
00371
00372         ASSERT(ctx->history - ctx->real_history + ctx->line_pos < HISTORY_SIZE);
00373
00374         if (!rl_getc(ctx, &c))
00375             return NULL;
00376
00377         // Just ignore special keys for now
00378         if (c > SPECIAL_KEYS)
00379             continue;
00380
00381         if (c == '\t')
00382         {
00383             // Ask the match hook if available
00384             if (!ctx->match)
00385                 return NULL;
00386
00387             complete_word(ctx, &ctx->line_pos);
00388             continue;
00389         }
00390
00391         // Backspace cancels a character, or it is ignored if at
00392         //  the start of the line
00393         if (c == '\b')
00394         {
00395             if (ctx->history[ctx->line_pos] != '\0')
00396             {
00397                 --ctx->line_pos;
00398                 rl_puts(ctx, "\b \b");
00399             }
00400             continue;
00401         }
00402
00403         if (c == '\r' || c == '\n')
00404         {
00405             rl_puts(ctx, "\r\n");
00406             break;
00407         }
00408
00409
00410         // Add a character to the buffer, if possible
00411         ch = (char)c;
00412         ASSERT2(ch == c, "a special key was not properly handled");
00413         if (insert_chars(ctx, &ctx->line_pos, &ch, 1))
00414             rl_putc(ctx, ch);
00415         else
00416             beep(ctx);
00417     }
00418
00419     ctx->history_pos = ctx->line_pos + 1;
00420     while (ctx->history[ctx->line_pos] != '\0')
00421         --ctx->line_pos;
00422
00423     // Do not store empty lines in the history
00424     if (ctx->line_pos == ctx->history_pos - 1)
00425         ctx->history_pos -= 1;
00426
00427 #if DEBUG_DUMP_HISTORY
00428     dump_history(ctx);
00429 #endif
00430
00431     const char *buf = &ctx->history[ctx->line_pos + 1];
00432
00433     ctx->line_pos = ctx->history_pos;
00434
00435     if (ctx->prompt)
00436         rl_puts(ctx, ctx->prompt);
00437
00438     insert_chars(ctx, &ctx->line_pos, NULL, 0);
00439
00440     // Since the current pointer now points to the separator, we need
00441     //  to return the first character
00442     return buf;
00443 }
00444
00445
00446 #if DEBUG_UNIT_TEST
00447
00449 void rl_test(void);
00450
00451 #if HISTORY_SIZE != 32
00452     #error This test needs HISTORY_SIZE to be set at 32
00453 #endif
00454
00455 static struct RLContext test_ctx;
00456
00457 static char* test_getc_ptr;
00458 static int test_getc(void* data)
00459 {
00460     return *test_getc_ptr++;
00461 }
00462
00467 static bool do_test(char* input_buffer, char* expected_history)
00468 {
00469     rl_init_ctx(&test_ctx);
00470     rl_sethook_get(&test_ctx, test_getc, NULL);
00471
00472     test_getc_ptr = input_buffer;
00473     while (*test_getc_ptr)
00474         rl_readline(&test_ctx);
00475
00476     if (memcmp(test_ctx.real_history, expected_history, HISTORY_SIZE) != 0)
00477     {
00478         ASSERT2(0, "history compare failed");
00479         return false;
00480     }
00481
00482     return true;
00483 }
00484
00485 void rl_test(void)
00486 {
00487     char* test1_in = "a\nb\nc\nd\ne\nf\ng\nh\ni\nj\nk\nl\nm\nn\no\np\nq\nr\ns\nt\nu\nv\nw\nx\ny\nz\n";
00488     char test1_hist[HISTORY_SIZE] = "\0l\0m\0n\0o\0p\0q\0r\0s\0t\0u\0v\0w\0x\0y\0z";
00489
00490     if (!do_test(test1_in, test1_hist))
00491         return;
00492
00493     kprintf("rl_test successful\n");
00494 }
00495
00496 #endif /* DEBUG_UNIT_TEST */
00497


BeRTOS: readline.h File Reference

  • mware
readline.h File Reference

Line editing support with history. More...

#include <cfg/compiler.h>
#include <string.h>

Go to the source code of this file.

Detailed Description

Line editing support with history.

This file implements a kernel for line editing through a terminal, with history of the typed lines. Basic feature of this module:

  • Abstracted from I/O. The user must provide hooks for getc and putc functions.
  • Basic support for ANSI escape sequences for input of special codes.
  • Support for command name completion (through a hook).
Author:
Giovanni Bajo <rasky@develer.com>

Definition in file readline.h.


BeRTOS: readline.h Source File

  • mware
readline.h
Go to the documentation of this file.
00001
00051 #ifndef MWARE_READLINE_H
00052 #define MWARE_READLINE_H
00053
00054 #include <cfg/compiler.h>
00055
00056 #include <string.h>
00057
00058 #define HISTORY_SIZE 32
00059
00060 typedef int (*getc_hook)(void* user_data);
00061 typedef void (*putc_hook)(char ch, void* user_data);
00062 typedef const char* (*match_hook)(void* user_data, const char* word, int word_len);
00063 typedef void (*clear_hook)(void* user_data);
00064
00065 struct RLContext
00066 {
00067     getc_hook get;
00068     void* get_param;
00069
00070     putc_hook put;
00071     void* put_param;
00072
00073     match_hook match;
00074     void* match_param;
00075
00076     clear_hook clear;
00077     void* clear_param;
00078
00079     const char* prompt;
00080
00081     char real_history[HISTORY_SIZE];
00082     char* history;
00083     size_t history_pos;
00084     size_t line_pos;
00085 };
00086
00087 INLINE void rl_init_ctx(struct RLContext *ctx)
00088 {
00089     memset(ctx, 0, sizeof(*ctx));
00090     ctx->history = ctx->real_history;
00091 }
00092
00093 INLINE void rl_clear_history(struct RLContext *ctx)
00094 {
00095     memset(ctx->real_history, 0, sizeof(ctx->real_history));
00096     ctx->history_pos = 0;
00097     ctx->line_pos = ctx->history_pos;
00098     ctx->history = ctx->real_history;
00099 }
00100
00101 INLINE void rl_sethook_get(struct RLContext* ctx, getc_hook get, void* get_param)
00102 { ctx->get = get; ctx->get_param = get_param; }
00103
00104 INLINE void rl_sethook_put(struct RLContext* ctx, putc_hook put, void* put_param)
00105 { ctx->put = put; ctx->put_param = put_param; }
00106
00107 INLINE void rl_sethook_match(struct RLContext* ctx, match_hook match, void* match_param)
00108 { ctx->match = match; ctx->match_param = match_param; }
00109
00110 INLINE void rl_sethook_clear(struct RLContext* ctx, clear_hook clear, void* clear_param)
00111 { ctx->clear = clear; ctx->clear_param = clear_param; }
00112
00113 INLINE void rl_setprompt(struct RLContext* ctx, const char* prompt)
00114 { ctx->prompt = prompt; }
00115
00116 const char* rl_readline(struct RLContext* ctx);
00117
00118 void rl_refresh(struct RLContext* ctx);
00119
00120 #endif /* MWARE_READLINE_H */


BeRTOS: README.bertos Source File

  • doc
README.bertos
00001


BeRTOS: resource.c Source File

  • mware
resource.c
00001
00002 #include "resource.h"
00003 #include <mware/observer.h>
00004
00009 typedef struct ResourceWaiter
00010 {
00011     PriNode link;
00012     struct Observer *owner;
00013
00014 } ResourceWaiter;
00015
00016
00017 bool ResMan_Alloc(Resource *res, int pri, ResMan_time_t timeout, struct Observer *releaseRequest)
00018 {
00019     bool success = false;
00020
00021     ASSERT(releaseRequest);
00022
00023     sem_obtain(&res->lock);
00024
00025     if (res->owner == releaseRequest)
00026     {
00027         // Already ours
00028         res->pri = pri;
00029         success = true;
00030     }
00031     else if (!res->owner)
00032     {
00033         // Trivial acquire: nobody was owning the resource
00034         res->pri = pri;
00035         res->owner = releaseRequest;
00036         success = true;
00037     }
00038     else
00039     {
00040         ResourceWaiter waiter;
00041
00042         // Setup waiter structure and enqueue it to resource
00043         waiter.owner = releaseRequest;
00044         waiter.link.pri = pri;
00045         LIST_ENQUEUE(&res->queue, &waiter.link);
00046
00047         // Resource busy: are we eligible for preemption?
00048         if ((res->pri < pri) && res->owner->event)
00049             res->owner->event(EVENT_RELEASE, res);
00050
00051         // Wait in the queue until the timeout occurs.
00052         do
00053         {
00054             sem_release(&res->lock);
00055             // TODO: use a semaphore here instead
00056             ResMan_sleep();
00057             sem_obtain(&res->lock);
00058
00059             // Check for ownership
00060             if (res->owner == releaseRequest)
00061             {
00062                 success = true;
00063                 break;
00064             }
00065         }
00066         while (timeout--);
00067
00068         // Remove pending waiter
00069         if (!success)
00070             REMOVE(&waiter.link.link);
00071     }
00072
00073     sem_release(&res->lock);
00074     return success;
00075 }
00076
00077 void ResMan_Free(Resource *res)
00078 {
00079     ResourceWaiter *waiter;
00080
00081     sem_obtain(&res->lock);
00082
00083
00084     ASSERT(res->owner);
00085     //TODO: check for real owner calling free
00086
00087     // Check for new owner candidates.
00088     if ((waiter = (ResourceWaiter *)list_remHead(&res->queue)))
00089     {
00090         // Transfer ownership of the resource
00091         res->owner = waiter->owner;
00092         res->pri = waiter->link.pri;
00093         //ResMan_wakeup(waiter);
00094     }
00095     else
00096     {
00097         // Nobody waiting, free the resource
00098         res->owner = NULL;
00099         res->pri = -1;
00100     }
00101
00102     sem_release(&res->lock);
00103 }
00104
00105 void ResMan_Init(Resource *res)
00106 {
00107     res->owner = NULL;
00108     res->pri = -1;
00109
00110     sem_init(&res->lock);
00111     LIST_INIT(&res->queue);
00112 }
00113


BeRTOS: resource.h File Reference

  • mware
Data Structures | Enumerations | Functions
resource.h File Reference

TODO: More...

#include <drv/timer.h>
#include <kern/sem.h>

Go to the source code of this file.

Data Structures

struct | Resource
Hold context information for a resource such as an audio channel. More...

Enumerations

enum
Event sent by ResMan to owners when to request resource release.

Functions

bool | ResMan_Alloc (Resource *res, int pri, ResMan_time_t timeout, struct Observer *releaseRequest)
Try to allocate a resource res with priority pri for at most timeout ticks.
void | ResMan_Free (Resource *res)
Free resource res. Will eventually wake-up other queued owners.

Detailed Description

TODO:

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file resource.h.


BeRTOS: resource.h Source File

  • mware
resource.h
Go to the documentation of this file.
00001
00040 #ifndef MWARE_RESOURCE_H
00041 #define MWARE_RESOURCE_H
00042
00043 #include <drv/timer.h> // time_t
00044 #include <kern/sem.h>
00045
00046 #warning FIXME:Revise me!
00047
00048 /*
00049  * Abstract locking primitives used by host OS.
00050  */
00051 typedef Semaphore ResourceLock;
00052 #define ResMan_sleep()         timer_delay(1)
00053 #define ResMan_time_t          mtime_t
00054
00055
00056
00057 // Forward decl
00058 struct Observer;
00059
00078 typedef struct Resource
00079 {
00080 //Private
00082     Semaphore lock;
00083
00085     struct Observer *owner;
00086
00088     int pri;
00089
00091     List queue;
00092 } Resource;
00093
00095 enum { EVENT_RELEASE = 1 };
00096
00098 bool ResMan_Alloc(Resource *res, int pri, ResMan_time_t timeout, struct Observer *releaseRequest);
00099
00101 void ResMan_Free(Resource *res);
00102
00103 void ResMan_Init(Resource *res);
00104
00105 #endif /* MWARE_RESOURCE_H */


BeRTOS: ripemd.c File Reference

  • sec
  • hash
ripemd.c File Reference

RIPEMD-160 Hashing algorithm. More...

#include "ripemd.h"
#include <cfg/debug.h>
#include <cfg/compiler.h>
#include <cpu/byteorder.h>
#include <string.h>

Go to the source code of this file.

Detailed Description

RIPEMD-160 Hashing algorithm.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file ripemd.c.


BeRTOS: ripemd.c Source File

  • sec
  • hash
ripemd.c
Go to the documentation of this file.
00001
00037 /*
00038  *
00039  *  RIPEMD160.c : RIPEMD-160 implementation
00040  *
00041  * Written in 2008 by Dwayne C. Litzenberger <dlitz@dlitz.net>
00042  *
00043  * ===================================================================
00044  * The contents of this file are dedicated to the public domain.  To
00045  * the extent that dedication to the public domain is not available,
00046  * everyone is granted a worldwide, perpetual, royalty-free,
00047  * non-exclusive license to exercise all rights associated with the
00048  * contents of this file for any purpose whatsoever.
00049  * No rights are reserved.
00050  * ===================================================================
00051  */
00052
00053 #include "ripemd.h"
00054 #include <cfg/debug.h>
00055 #include <cfg/compiler.h>
00056 #include <cpu/byteorder.h>
00057 #include <string.h>
00058
00059 #define RIPEMD160_DIGEST_SIZE   20
00060
00061
00062 /* cyclic left-shift the 32-bit word n left by s bits */
00063 #define ROL(s, n)  ROTL(n, s)
00064
00065 /* Initial values for the chaining variables.
00066  * This is just 0123456789ABCDEFFEDCBA9876543210F0E1D2C3 in little-endian. */
00067 static const uint32_t initial_h[5] = { 0x67452301u, 0xEFCDAB89u, 0x98BADCFEu, 0x10325476u, 0xC3D2E1F0u };
00068
00069 /* Ordering of message words.  Based on the permutations rho(i) and pi(i), defined as follows:
00070  *
00071  *  rho(i) := { 7, 4, 13, 1, 10, 6, 15, 3, 12, 0, 9, 5, 2, 14, 11, 8 }[i]  0 <= i <= 15
00072  *
00073  *  pi(i) := 9*i + 5 (mod 16)
00074  *
00075  *  Line  |  Round 1  |  Round 2  |  Round 3  |  Round 4  |  Round 5
00076  * -------+-----------+-----------+-----------+-----------+-----------
00077  *  left  |    id     |    rho    |   rho^2   |   rho^3   |   rho^4
00078  *  right |    pi     |   rho pi  |  rho^2 pi |  rho^3 pi |  rho^4 pi
00079  */
00080
00081 /* Left line */
00082 static const uint8_t RL[5][16] = {
00083     { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },   /* Round 1: id */
00084     { 7, 4, 13, 1, 10, 6, 15, 3, 12, 0, 9, 5, 2, 14, 11, 8 },   /* Round 2: rho */
00085     { 3, 10, 14, 4, 9, 15, 8, 1, 2, 7, 0, 6, 13, 11, 5, 12 },   /* Round 3: rho^2 */
00086     { 1, 9, 11, 10, 0, 8, 12, 4, 13, 3, 7, 15, 14, 5, 6, 2 },   /* Round 4: rho^3 */
00087     { 4, 0, 5, 9, 7, 12, 2, 10, 14, 1, 3, 8, 11, 6, 15, 13 }    /* Round 5: rho^4 */
00088 };
00089
00090 /* Right line */
00091 static const uint8_t RR[5][16] = {
00092     { 5, 14, 7, 0, 9, 2, 11, 4, 13, 6, 15, 8, 1, 10, 3, 12 },   /* Round 1: pi */
00093     { 6, 11, 3, 7, 0, 13, 5, 10, 14, 15, 8, 12, 4, 9, 1, 2 },   /* Round 2: rho pi */
00094     { 15, 5, 1, 3, 7, 14, 6, 9, 11, 8, 12, 2, 10, 0, 4, 13 },   /* Round 3: rho^2 pi */
00095     { 8, 6, 4, 1, 3, 11, 15, 0, 5, 12, 2, 13, 9, 7, 10, 14 },   /* Round 4: rho^3 pi */
00096     { 12, 15, 10, 4, 1, 5, 8, 7, 6, 2, 13, 14, 0, 3, 9, 11 }    /* Round 5: rho^4 pi */
00097 };
00098
00099 /*
00100  * Shifts - Since we don't actually re-order the message words according to
00101  * the permutations above (we could, but it would be slower), these tables
00102  * come with the permutations pre-applied.
00103  */
00104
00105 /* Shifts, left line */
00106 static const uint8_t SL[5][16] = {
00107     { 11, 14, 15, 12, 5, 8, 7, 9, 11, 13, 14, 15, 6, 7, 9, 8 }, /* Round 1 */
00108     { 7, 6, 8, 13, 11, 9, 7, 15, 7, 12, 15, 9, 11, 7, 13, 12 }, /* Round 2 */
00109     { 11, 13, 6, 7, 14, 9, 13, 15, 14, 8, 13, 6, 5, 12, 7, 5 }, /* Round 3 */
00110     { 11, 12, 14, 15, 14, 15, 9, 8, 9, 14, 5, 6, 8, 6, 5, 12 }, /* Round 4 */
00111     { 9, 15, 5, 11, 6, 8, 13, 12, 5, 12, 13, 14, 11, 8, 5, 6 }  /* Round 5 */
00112 };
00113
00114 /* Shifts, right line */
00115 static const uint8_t SR[5][16] = {
00116     { 8, 9, 9, 11, 13, 15, 15, 5, 7, 7, 8, 11, 14, 14, 12, 6 }, /* Round 1 */
00117     { 9, 13, 15, 7, 12, 8, 9, 11, 7, 7, 12, 7, 6, 15, 13, 11 }, /* Round 2 */
00118     { 9, 7, 15, 11, 8, 6, 6, 14, 12, 13, 5, 14, 13, 13, 7, 5 }, /* Round 3 */
00119     { 15, 5, 8, 11, 14, 14, 6, 14, 6, 9, 12, 9, 12, 5, 15, 8 }, /* Round 4 */
00120     { 8, 5, 12, 9, 12, 5, 14, 6, 8, 13, 6, 5, 15, 13, 11, 11 }  /* Round 5 */
00121 };
00122
00123 /* Boolean functions */
00124
00125 #define F1(x, y, z) ((x) ^ (y) ^ (z))
00126 #define F2(x, y, z) (((x) & (y)) | (~(x) & (z)))
00127 #define F3(x, y, z) (((x) | ~(y)) ^ (z))
00128 #define F4(x, y, z) (((x) & (z)) | ((y) & ~(z)))
00129 #define F5(x, y, z) ((x) ^ ((y) | ~(z)))
00130
00131 /* Round constants, left line */
00132 static const uint32_t KL[5] = {
00133     0x00000000u,    /* Round 1: 0 */
00134     0x5A827999u,    /* Round 2: floor(2**30 * sqrt(2)) */
00135     0x6ED9EBA1u,    /* Round 3: floor(2**30 * sqrt(3)) */
00136     0x8F1BBCDCu,    /* Round 4: floor(2**30 * sqrt(5)) */
00137     0xA953FD4Eu     /* Round 5: floor(2**30 * sqrt(7)) */
00138 };
00139
00140 /* Round constants, right line */
00141 static const uint32_t KR[5] = {
00142     0x50A28BE6u,    /* Round 1: floor(2**30 * cubert(2)) */
00143     0x5C4DD124u,    /* Round 2: floor(2**30 * cubert(3)) */
00144     0x6D703EF3u,    /* Round 3: floor(2**30 * cubert(5)) */
00145     0x7A6D76E9u,    /* Round 4: floor(2**30 * cubert(7)) */
00146     0x00000000u     /* Round 5: 0 */
00147 };
00148
00149 static void ripemd160_init(Hash *h)
00150 {
00151     RIPEMD_Context *self = (RIPEMD_Context *)h;
00152
00153     memcpy(self->h, initial_h, RIPEMD160_DIGEST_SIZE);
00154     memset(&self->buf, 0, sizeof(self->buf));
00155     self->length = 0;
00156     self->bufpos = 0;
00157 }
00158
00159 static inline void byteswap_digest(uint32_t *p)
00160 {
00161     unsigned int i;
00162
00163     for (i = 0; i < 4; i++) {
00164         p[0] = SWAB32(p[0]);
00165         p[1] = SWAB32(p[1]);
00166         p[2] = SWAB32(p[2]);
00167         p[3] = SWAB32(p[3]);
00168         p += 4;
00169     }
00170 }
00171
00172 /* The RIPEMD160 compression function.  Operates on self->buf */
00173 static void ripemd160_compress(RIPEMD_Context *self)
00174 {
00175     uint8_t w, round;
00176     uint32_t T;
00177     uint32_t AL, BL, CL, DL, EL;    /* left line */
00178     uint32_t AR, BR, CR, DR, ER;    /* right line */
00179
00180     /* Sanity check */
00181     ASSERT(self->bufpos == 64);
00182
00183     /* Byte-swap the buffer if we're on a big-endian machine */
00184 #if CPU_BYTE_ORDER == CPU_BIG_ENDIAN
00185     byteswap_digest(self->buf.w);
00186 #endif
00187
00188     /* Load the left and right lines with the initial state */
00189     AL = AR = self->h[0];
00190     BL = BR = self->h[1];
00191     CL = CR = self->h[2];
00192     DL = DR = self->h[3];
00193     EL = ER = self->h[4];
00194
00195     /* Round 1 */
00196     round = 0;
00197     for (w = 0; w < 16; w++) { /* left line */
00198         T = ROL(SL[round][w], AL + F1(BL, CL, DL) + self->buf.w[RL[round][w]] + KL[round]) + EL;
00199         AL = EL; EL = DL; DL = ROL(10, CL); CL = BL; BL = T;
00200     }
00201     for (w = 0; w < 16; w++) { /* right line */
00202         T = ROL(SR[round][w], AR + F5(BR, CR, DR) + self->buf.w[RR[round][w]] + KR[round]) + ER;
00203         AR = ER; ER = DR; DR = ROL(10, CR); CR = BR; BR = T;
00204     }
00205
00206     /* Round 2 */
00207     round++;
00208     for (w = 0; w < 16; w++) { /* left line */
00209         T = ROL(SL[round][w], AL + F2(BL, CL, DL) + self->buf.w[RL[round][w]] + KL[round]) + EL;
00210         AL = EL; EL = DL; DL = ROL(10, CL); CL = BL; BL = T;
00211     }
00212     for (w = 0; w < 16; w++) { /* right line */
00213         T = ROL(SR[round][w], AR + F4(BR, CR, DR) + self->buf.w[RR[round][w]] + KR[round]) + ER;
00214         AR = ER; ER = DR; DR = ROL(10, CR); CR = BR; BR = T;
00215     }
00216
00217     /* Round 3 */
00218     round++;
00219     for (w = 0; w < 16; w++) { /* left line */
00220         T = ROL(SL[round][w], AL + F3(BL, CL, DL) + self->buf.w[RL[round][w]] + KL[round]) + EL;
00221         AL = EL; EL = DL; DL = ROL(10, CL); CL = BL; BL = T;
00222     }
00223     for (w = 0; w < 16; w++) { /* right line */
00224         T = ROL(SR[round][w], AR + F3(BR, CR, DR) + self->buf.w[RR[round][w]] + KR[round]) + ER;
00225         AR = ER; ER = DR; DR = ROL(10, CR); CR = BR; BR = T;
00226     }
00227
00228     /* Round 4 */
00229     round++;
00230     for (w = 0; w < 16; w++) { /* left line */
00231         T = ROL(SL[round][w], AL + F4(BL, CL, DL) + self->buf.w[RL[round][w]] + KL[round]) + EL;
00232         AL = EL; EL = DL; DL = ROL(10, CL); CL = BL; BL = T;
00233     }
00234     for (w = 0; w < 16; w++) { /* right line */
00235         T = ROL(SR[round][w], AR + F2(BR, CR, DR) + self->buf.w[RR[round][w]] + KR[round]) + ER;
00236         AR = ER; ER = DR; DR = ROL(10, CR); CR = BR; BR = T;
00237     }
00238
00239     /* Round 5 */
00240     round++;
00241     for (w = 0; w < 16; w++) { /* left line */
00242         T = ROL(SL[round][w], AL + F5(BL, CL, DL) + self->buf.w[RL[round][w]] + KL[round]) + EL;
00243         AL = EL; EL = DL; DL = ROL(10, CL); CL = BL; BL = T;
00244     }
00245     for (w = 0; w < 16; w++) { /* right line */
00246         T = ROL(SR[round][w], AR + F1(BR, CR, DR) + self->buf.w[RR[round][w]] + KR[round]) + ER;
00247         AR = ER; ER = DR; DR = ROL(10, CR); CR = BR; BR = T;
00248     }
00249
00250     /* Final mixing stage */
00251     T = self->h[1] + CL + DR;
00252     self->h[1] = self->h[2] + DL + ER;
00253     self->h[2] = self->h[3] + EL + AR;
00254     self->h[3] = self->h[4] + AL + BR;
00255     self->h[4] = self->h[0] + BL + CR;
00256     self->h[0] = T;
00257
00258     /* Clear the buffer and wipe the temporary variables */
00259     T = AL = BL = CL = DL = EL = AR = BR = CR = DR = ER = 0;
00260     memset(&self->buf, 0, sizeof(self->buf));
00261     self->bufpos = 0;
00262 }
00263
00264 static void ripemd160_update(Hash *h, const void *data, size_t length)
00265 {
00266     RIPEMD_Context *self = (RIPEMD_Context *)h;
00267     const uint8_t *p = (const uint8_t *)data;
00268     unsigned int bytes_needed;
00269
00270     /* Some assertions */
00271     ASSERT(p != NULL);
00272
00273     /* We never leave a full buffer */
00274     ASSERT(self->bufpos < 64);
00275
00276     while (length > 0) {
00277         /* Figure out how many bytes we need to fill the internal buffer. */
00278         bytes_needed = 64 - self->bufpos;
00279
00280         if (length >= bytes_needed) {
00281             /* We have enough bytes, so copy them into the internal buffer and run
00282              * the compression function. */
00283             memcpy(&self->buf.b[self->bufpos], p, bytes_needed);
00284             self->bufpos += bytes_needed;
00285             self->length += bytes_needed << 3;    /* length is in bits */
00286             p += bytes_needed;
00287             ripemd160_compress(self);
00288             length -= bytes_needed;
00289             continue;
00290         }
00291
00292         /* We do not have enough bytes to fill the internal buffer.
00293          * Copy what's there and return. */
00294         memcpy(&self->buf.b[self->bufpos], p, length);
00295         self->bufpos += length;
00296         self->length += length << 3;    /* length is in bits */
00297         return;
00298     }
00299 }
00300
00301 static uint8_t* ripemd160_digest(Hash *h)
00302 {
00303     RIPEMD_Context *self = (RIPEMD_Context *)h;
00304
00305     /* Append the padding */
00306     self->buf.b[self->bufpos++] = 0x80;
00307
00308     if (self->bufpos > 56) {
00309         self->bufpos = 64;
00310         ripemd160_compress(self);
00311     }
00312
00313     /* Append the length */
00314     self->buf.w[14] = cpu_to_le32((uint32_t)(self->length & 0xFFFFffffu));
00315     self->buf.w[15] = cpu_to_le32((uint32_t)((self->length >> 32) & 0xFFFFffffu));
00316
00317     self->bufpos = 64;
00318     ripemd160_compress(self);
00319
00320     /* Copy the final state into the output buffer */
00321 #if CPU_BYTE_ORDER == CPU_BIG_ENDIAN
00322     byteswap_digest(self->h);
00323 #endif
00324
00325     return (uint8_t*)&self->h;
00326 }
00327
00328 /**************************************************************************************/
00329
00330
00331 void RIPEMD_init(RIPEMD_Context *ctx)
00332 {
00333     ctx->hash.begin = ripemd160_init;
00334     ctx->hash.update = ripemd160_update;
00335     ctx->hash.final = ripemd160_digest;
00336     ctx->hash.digest_len = RIPEMD160_DIGEST_SIZE;
00337     ctx->hash.block_len = 64;
00338 }


BeRTOS: ripemd.h Source File

  • sec
  • hash
ripemd.h
00001 #ifndef SEC_HASH_RIPEMD_H
00002 #define SEC_HASH_RIPEMD_H
00003
00004 #include <cfg/compiler.h>
00005 #include <sec/hash.h>
00006 #include <alloca.h>
00007
00008 typedef struct {
00009     Hash hash;
00010     uint32_t h[5];      /* The current hash state */
00011     uint64_t length;    /* Total number of _bits_ (not bytes) added to the
00012                            hash.  This includes bits that have been buffered
00013                            but not not fed through the compression function yet. */
00014     union {
00015         uint32_t w[16];
00016         uint8_t b[64];
00017     } buf;
00018     uint8_t bufpos;     /* number of bytes currently in the buffer */
00019
00020 } RIPEMD_Context;
00021
00022 void RIPEMD_init(RIPEMD_Context *ctx);
00023
00024 #define RIPEMD_stackinit(...) \
00025     ({ RIPEMD_Context *ctx = alloca(sizeof(RIPEMD_Context)); RIPEMD_init(ctx , ##__VA_ARGS__); &ctx->hash; })
00026
00027 int RIPEMD_testSetup(void);
00028 int RIPEMD_testRun(void);
00029 int RIPEMD_testTearDown(void);
00030
00031
00032 #endif /* SEC_HASH_RIPEMD_H */


BeRTOS: rle.c File Reference

  • algo
Functions
rle.c File Reference

General-purpose run-length {en,de}coding algorithm (implementation) More...

#include "rle.h"

Go to the source code of this file.

Functions

int | rle (unsigned char *output, const unsigned char *input, int len)
Run-length encode len bytes from the input buffer to the output buffer.
int | unrle (unsigned char *output, const unsigned char *input)
Run-length decode from the input buffer to the output buffer.

Detailed Description

General-purpose run-length {en,de}coding algorithm (implementation)

Original source code from http://www.compuphase.com/compress.htm

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file rle.c.

Function Documentation

int unrle | ( | unsigned char * | output,
 |  | const unsigned char * | input
 | ) |  |

Run-length decode from the input buffer to the output buffer.

Note:
The output buffer must be large enough to accomodate all decoded output.

Definition at line 119 of file rle.c.


BeRTOS: rle.c Source File

  • algo
rle.c
Go to the documentation of this file.
00001
00041 #include "rle.h"
00042
00043
00048 int rle(unsigned char *output, const unsigned char *input, int len)
00049 {
00050     int count, index, i;
00051     unsigned char first;
00052     unsigned char *out;
00053
00054
00055     out = output;
00056     count = 0;
00057     while (count < len)
00058     {
00059         index = count;
00060         first = input[index++];
00061
00062         /* Scan for bytes identical to the first one */
00063         while ((index < len) && (index - count < 127) && (input[index] == first))
00064             index++;
00065
00066         if (index - count == 1)
00067         {
00068             /* Failed to "replicate" the current byte. See how many to copy.
00069              */
00070             while ((index < len) && (index - count < 127))
00071             {
00072                 /* Avoid a replicate run of only 2-bytes after a literal run.
00073                  * There is no gain in this, and there is a risc of loss if the
00074                  * run after the two identical bytes is another literal run.
00075                  * So search for 3 identical bytes.
00076                  */
00077                 if ((input[index] == input[index - 1]) &&
00078                     ((index > 1) && (input[index] == input[index - 2])))
00079                 {
00080                     /* Reset the index so we can back up these three identical
00081                      * bytes in the next run.
00082                      */
00083                     index -= 2;
00084                     break;
00085                 }
00086
00087                 index++;
00088             }
00089
00090             /* Output a run of uncompressed bytes: write length and values */
00091             *out++ = (unsigned char)(count - index);
00092             for (i = count; i < index; i++)
00093                 *out++ = input[i];
00094         }
00095         else
00096         {
00097             /* Output a compressed run: write length and value */
00098             *out++ = (unsigned char)(index - count);
00099             *out++ = first;
00100         }
00101
00102         count = index;
00103     }
00104
00105     /* Output EOF marker */
00106     *out++ = 0;
00107
00108     return (out - output);
00109 }
00110
00111
00119 int unrle(unsigned char *output, const unsigned char *input)
00120 {
00121     signed char count;
00122     unsigned char *out;
00123     unsigned char value;
00124
00125
00126     out = output;
00127
00128     for (;;)
00129     {
00130         count = (signed char)*input++;
00131         if (count > 0)
00132         {
00133             /* replicate run */
00134             value = *input++;
00135             while (count--)
00136                 *out++ = value;
00137         }
00138         else if (count < 0)
00139         {
00140             /* literal run */
00141             while (count++)
00142                 *out++ = *input++;
00143         }
00144         else
00145             /* EOF */
00146             break;
00147     }
00148
00149     return (out - output);
00150 }


BeRTOS: rotating_hash.h File Reference

  • algo
Functions
rotating_hash.h File Reference

Rotating Hash algorithm. More...

#include <cfg/compiler.h>

Go to the source code of this file.

Functions

void | rotating_init (rotating_t *rot)
Init rotating checksum.
void | rotating_update1 (uint8_t c, rotating_t *rot)
Update checksum pointed by rot with c data.
void | rotating_update (const void *_buf, size_t len, rotating_t *rot)
Update checksum pointed by rot with data supplied in buf.

Detailed Description

Rotating Hash algorithm.

This is a simple yet powerfull checksum algorithm. Instead of just xor-ing the data, rotating hash circular shift the checksum 4 place left before xoring. This is a bit more stronger than simply sum the data.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file rotating_hash.h.


BeRTOS: rotating_hash.h Source File

  • algo
rotating_hash.h
Go to the documentation of this file.
00001
00047 #ifndef ALGO_ROTATING_H
00048 #define ALGO_ROTATING_H
00049
00050 #include <cfg/compiler.h>
00051
00052 typedef uint16_t rotating_t;
00053
00054
00058 INLINE void rotating_init(rotating_t *rot)
00059 {
00060     *rot = 0;
00061 }
00062
00066 INLINE void rotating_update1(uint8_t c, rotating_t *rot)
00067 {
00068     *rot = (*rot << 4) ^ (*rot >> 12) ^ c;
00069 }
00070
00074 INLINE void rotating_update(const void *_buf, size_t len, rotating_t *rot)
00075 {
00076     const uint8_t *buf = (const uint8_t *)_buf;
00077
00078     while (len--)
00079         rotating_update1(*buf++, rot);
00080 }
00081
00082
00083 #endif // ALGO_ROTATING_H


BeRTOS: rtc.h File Reference

  • drv
rtc.h File Reference

Real-time clock interface. More...

#include <cfg/compiler.h>

Go to the source code of this file.

Detailed Description

Real-time clock interface.

Abstract real-time clock interface.

Attention:
The API is work in progress and may change in future versions.

Definition in file rtc.h.


BeRTOS: rtc.h Source File

  • drv
rtc.h
Go to the documentation of this file.
00001
00043 #ifndef RTC_H
00044 #define RTC_H
00045
00046 #include <cfg/compiler.h>
00047
00048 typedef uint32_t rtc_clock_t;
00049
00050 rtc_clock_t rtc_time(void);
00051
00052 void rtc_setTime(rtc_clock_t date);
00053
00054 int rtc_init(void);
00055
00056 #endif /* RTC_H */


BeRTOS: rtc_stm32.c File Reference

  • cpu
  • cortex-m3
  • drv
rtc_stm32.c File Reference

STM32 RTC driver. More...

#include "clock_stm32.h"
#include <cfg/compiler.h>
#include <cfg/module.h>
#include <cfg/debug.h>
#include <io/stm32.h>
#include <io/stm32_pwr.h>
#include <cpu/power.h>
#include <drv/rtc.h>

Go to the source code of this file.

Detailed Description

STM32 RTC driver.

Author:
Andrea Righi <arighi@develer.com>

Definition in file rtc_stm32.c.


BeRTOS: rtc_stm32.c Source File

  • cpu
  • cortex-m3
  • drv
rtc_stm32.c
Go to the documentation of this file.
00001
00038 #include "clock_stm32.h"
00039
00040 #include <cfg/compiler.h>
00041 #include <cfg/module.h>
00042 #include <cfg/debug.h>
00043
00044 #include <io/stm32.h>
00045 #include <io/stm32_pwr.h>
00046
00047 #include <cpu/power.h> // cpu_relax()
00048
00049 #include <drv/rtc.h>
00050
00051 /* PWR registers base */
00052 static struct PWR *PWR = (struct PWR *)PWR_BASE;
00053
00054 /* RTC clock source: LSE */
00055 #define RTC_CLKSRC  0x00000100
00056 /* RTC clock: 32768 Hz */
00057 #define RTC_CLOCK   32768
00058 /* RTC clock period (in ms) */
00059 #define RTC_PERIOD      1000
00060
00061 /* RTC control register */
00062 #define RTC_CRH     (*(reg16_t *)(RTC_BASE + 0x00))
00063 #define RTC_CRL     (*(reg16_t *)(RTC_BASE + 0x04))
00064
00065 #define RTC_CRL_SECIE         BV(0)
00066 #define RTC_CRL_ALRIE         BV(1)
00067 #define RTC_CRL_OWIE          BV(2)
00068
00069 #define RTC_CRL_SECF          BV(0)
00070 #define RTC_CRL_ALRF          BV(1)
00071 #define RTC_CRL_OWF           BV(2)
00072 #define RTC_CRL_RSF           BV(3)
00073 #define RTC_CRL_CNF           BV(4)
00074 #define RTC_CRL_RTOFF         BV(5)
00075
00076 /* RTC prescaler load register */
00077 #define RTC_PRLH    (*(reg16_t *)(RTC_BASE + 0x08))
00078 #define RTC_PRLL    (*(reg16_t *)(RTC_BASE + 0x0c))
00079
00080 /* RTC prescaler divider register */
00081 #define RTC_DIVH    (*(reg16_t *)(RTC_BASE + 0x10))
00082 #define RTC_DIVL    (*(reg16_t *)(RTC_BASE + 0x14))
00083
00084 /* RTC counter register */
00085 #define RTC_CNTH    (*(reg16_t *)(RTC_BASE + 0x18))
00086 #define RTC_CNTL    (*(reg16_t *)(RTC_BASE + 0x1c))
00087
00088 /* RTC alarm register */
00089 #define RTC_ALRH    (*(reg16_t *)(RTC_BASE + 0x20))
00090 #define RTC_ALRL    (*(reg16_t *)(RTC_BASE + 0x24))
00091
00092 static void rtc_enterConfig(void)
00093 {
00094     /* Enter configuration mode */
00095     RTC_CRL |= RTC_CRL_CNF;
00096 }
00097
00098 static void rtc_exitConfig(void)
00099 {
00100     /* Exit from configuration mode */
00101     RTC_CRL &= ~RTC_CRL_CNF;
00102     while (!(RTC_CRL & RTC_CRL_RTOFF))
00103         cpu_relax();
00104 }
00105
00106 uint32_t rtc_time(void)
00107 {
00108     return (RTC_CNTH << 16) | RTC_CNTL;
00109 }
00110
00111 void rtc_setTime(uint32_t val)
00112 {
00113     rtc_enterConfig();
00114     RTC_CNTH = (val >> 16) & 0xffff;
00115     RTC_CNTL = val & 0xffff;
00116     rtc_exitConfig();
00117 }
00118
00119 /* Initialize the RTC clock */
00120 int rtc_init(void)
00121 {
00122 #if CONFIG_KERN
00123     MOD_CHECK(proc);
00124 #endif
00125     /* Enable clock for Power interface */
00126     RCC->APB1ENR |= RCC_APB1_PWR;
00127
00128     /* Enable access to RTC registers */
00129     PWR->CR |= PWR_CR_DBP;
00130
00131     /* Enable LSE */
00132     RCC->BDCR |= RCC_BDCR_LSEON;
00133     /* Wait for LSE ready */
00134     while (!(RCC->BDCR & RCC_BDCR_LSERDY))
00135         cpu_relax();
00136
00137     /* Set clock source and enable RTC peripheral */
00138     RCC->BDCR |= RTC_CLKSRC | RCC_BDCR_RTCEN;
00139
00140     rtc_enterConfig();
00141
00142     /* Set prescaler */
00143     RTC_PRLH = ((RTC_PERIOD * RTC_CLOCK / 1000 - 1) >> 16) & 0xff;
00144     RTC_PRLL = ((RTC_PERIOD * RTC_CLOCK / 1000 - 1)) & 0xffff;
00145
00146     rtc_exitConfig();
00147
00148     /* Disable access to the RTC registers */
00149     PWR->CR &= ~PWR_CR_DBP;
00150
00151     return 0;
00152 }


BeRTOS: sam3.h File Reference

  • cpu
  • cortex-m3
  • io
sam3.h File Reference
#include <cpu/detect.h>
#include <cfg/compiler.h>
#include "sam3_sysctl.h"
#include "sam3_pmc.h"
#include "sam3_smc.h"
#include "sam3_sdramc.h"
#include "sam3_ints.h"
#include "sam3_pio.h"
#include "sam3_nvic.h"
#include "sam3_uart.h"
#include "sam3_usart.h"
#include "sam3_spi.h"
#include "sam3_flash.h"
#include "sam3_wdt.h"
#include "sam3_emac.h"
#include "sam3_rstc.h"
#include "sam3_adc.h"
#include "sam3_dacc.h"
#include "sam3_tc.h"

Go to the source code of this file.

Defines

#define | SPI0_SPCK 14
U(S)ART I/O pins.
#define | SPI0_MOSI 13
U(S)ART I/O pins.
#define | SPI0_MISO 12
U(S)ART I/O pins.

Detailed Description

Author:
Stefano Fedrigo <aleph@develer.com>

Definition in file sam3.h.

Define Documentation

#define SPI0_MISO 12

U(S)ART I/O pins.

PIO I/O pins

Definition at line 263 of file sam3.h.

#define SPI0_MOSI 13

U(S)ART I/O pins.

PIO I/O pins

Definition at line 262 of file sam3.h.

#define SPI0_SPCK 14

U(S)ART I/O pins.

PIO I/O pins

Definition at line 261 of file sam3.h.


BeRTOS: sam3.h Source File

  • cpu
  • cortex-m3
  • io
sam3.h
Go to the documentation of this file.
00001
00036 #ifndef SAM3_H
00037 #define SAM3_H
00038
00039 #include <cpu/detect.h>
00040 #include <cfg/compiler.h>
00041
00042 /*
00043  * Peripherals IDs.
00044  */
00045 /*\{*/
00046 #if CPU_CM3_SAM3N
00047     #define SUPC_ID      0   ///< Supply Controller (SUPC)
00048     #define RSTC_ID      1   ///< Reset Controller (RSTC)
00049     #define RTC_ID       2   ///< Real Time Clock (RTC)
00050     #define RTT_ID       3   ///< Real Time Timer (RTT)
00051     #define WDT_ID       4   ///< Watchdog Timer (WDT)
00052     #define PMC_ID       5   ///< Power Management Controller (PMC)
00053     #define EEFC0_ID     6   ///< Enhanced Flash Controller
00054     #define UART0_ID     8   ///< UART 0 (UART0)
00055     #define UART1_ID     9   ///< UART 1 (UART1)
00056     #define PIOA_ID     11   ///< Parallel I/O Controller A (PIOA)
00057     #define PIOB_ID     12   ///< Parallel I/O Controller B (PIOB)
00058     #define PIOC_ID     13   ///< Parallel I/O Controller C (PIOC)
00059     #define US0_ID      14   ///< USART 0 (USART0)
00060     #define US1_ID      15   ///< USART 1 (USART1)
00061     #define TWI0_ID     19   ///< Two Wire Interface 0 (TWI0)
00062     #define TWI1_ID     20   ///< Two Wire Interface 1 (TWI1)
00063     #define SPI0_ID     21   ///< Serial Peripheral Interface (SPI)
00064     #define TC0_ID      23   ///< Timer/Counter 0 (TC0)
00065     #define TC1_ID      24   ///< Timer/Counter 1 (TC1)
00066     #define TC2_ID      25   ///< Timer/Counter 2 (TC2)
00067     #define TC3_ID      26   ///< Timer/Counter 3 (TC3)
00068     #define TC4_ID      27   ///< Timer/Counter 4 (TC4)
00069     #define TC5_ID      28   ///< Timer/Counter 5 (TC5)
00070     #define ADC_ID      29   ///< Analog To Digital Converter (ADC)
00071     #define DACC_ID     30   ///< Digital To Analog Converter (DACC)
00072     #define PWM_ID      31   ///< Pulse Width Modulation (PWM)
00073 #elif CPU_CM3_SAM3X
00074     #define SUPC_ID        0   ///< Supply Controller (SUPC)
00075     #define RSTC_ID        1   ///< Reset Controller (RSTC)
00076     #define RTC_ID         2   ///< Real Time Clock (RTC)
00077     #define RTT_ID         3   ///< Real Time Timer (RTT)
00078     #define WDT_ID         4   ///< Watchdog Timer (WDT)
00079     #define PMC_ID         5   ///< Power Management Controller (PMC)
00080     #define EEFC0_ID       6   ///< Enhanced Flash Controller
00081     #define EEFC1_ID       7   ///< Enhanced Flash Controller
00082     #define UART0_ID       8   ///< UART 0 (UART0)
00083     #define SMC_SDRAMC_ID  9   ///< Satic memory controller / SDRAM controller
00084     #define SDRAMC_ID     10   ///< Satic memory controller / SDRAM controller
00085     #define PIOA_ID       11   ///< Parallel I/O Controller A
00086     #define PIOB_ID       12   ///< Parallel I/O Controller B
00087     #define PIOC_ID       13   ///< Parallel I/O Controller C
00088     #define PIOD_ID       14   ///< Parallel I/O Controller D
00089     #define PIOE_ID       15   ///< Parallel I/O Controller E
00090     #define PIOF_ID       16   ///< Parallel I/O Controller F
00091     #define US0_ID        17   ///< USART 0
00092     #define US1_ID        18   ///< USART 1
00093     #define US2_ID        19   ///< USART 2
00094     #define US3_ID        20   ///< USART 3
00095     #define HSMCI_ID      21   ///< High speed multimedia card interface
00096     #define TWI0_ID       22   ///< Two Wire Interface 0
00097     #define TWI1_ID       23   ///< Two Wire Interface 1
00098     #define SPI0_ID       24   ///< Serial Peripheral Interface
00099     #define SPI1_ID       25   ///< Serial Peripheral Interface
00100     #define SSC_ID        26   ///< Synchronous serial controller
00101     #define TC0_ID        27   ///< Timer/Counter 0
00102     #define TC1_ID        28   ///< Timer/Counter 1
00103     #define TC2_ID        29   ///< Timer/Counter 2
00104     #define TC3_ID        30   ///< Timer/Counter 3
00105     #define TC4_ID        31   ///< Timer/Counter 4
00106     #define TC5_ID        32   ///< Timer/Counter 5
00107     #define TC6_ID        33   ///< Timer/Counter 6
00108     #define TC7_ID        34   ///< Timer/Counter 7
00109     #define TC8_ID        35   ///< Timer/Counter 8
00110     #define PWM_ID        36   ///< Pulse width modulation controller
00111     #define ADC_ID        37   ///< ADC controller
00112     #define DACC_ID       38   ///< DAC controller
00113     #define DMAC_ID       39   ///< DMA controller
00114     #define UOTGHS_ID     40   ///< USB OTG high speed
00115     #define TRNG_ID       41   ///< True random number generator
00116     #define EMAC_ID       42   ///< Ethernet MAC
00117     #define CAN0_ID       43   ///< CAN controller 0
00118     #define CAN1_ID       44   ///< CAN controller 1
00119 #else
00120     #error Peripheral IDs undefined
00121 #endif
00122 /*\}*/
00123
00124 /*
00125  * Hardware features for drivers.
00126  */
00127 #define USART_HAS_PDC  1
00128 #define SPI_HAS_PDC    1
00129
00130 #if CPU_CM3_SAM3X || CPU_CM3_SAM3U
00131     #define USART_PORTS    1
00132     #define UART_PORTS     4
00133 #elif CPU_CM3_SAM3N || CPU_CM3_SAM3S
00134     #define USART_PORTS    2
00135     #define UART_PORTS     2
00136 #else
00137     #error undefined U(S)ART_PORTS for this cpu
00138 #endif
00139
00140 /* PDC registers */
00141 #define PERIPH_RPR_OFF  0x100  // Receive Pointer Register.
00142 #define PERIPH_RCR_OFF  0x104  // Receive Counter Register.
00143 #define PERIPH_TPR_OFF  0x108  // Transmit Pointer Register.
00144 #define PERIPH_TCR_OFF  0x10C  // Transmit Counter Register.
00145 #define PERIPH_RNPR_OFF 0x110  // Receive Next Pointer Register.
00146 #define PERIPH_RNCR_OFF 0x114  // Receive Next Counter Register.
00147 #define PERIPH_TNPR_OFF 0x118  // Transmit Next Pointer Register.
00148 #define PERIPH_TNCR_OFF 0x11C  // Transmit Next Counter Register.
00149 #define PERIPH_PTCR_OFF 0x120  // PDC Transfer Control Register.
00150 #define PERIPH_PTSR_OFF 0x124  // PDC Transfer Status Register.
00151
00152 #define PDC_RXTEN  0
00153 #define PDC_RXTDIS 1
00154 #define PDC_TXTEN  8
00155 #define PDC_TXTDIS 9
00156
00157
00158 #include "sam3_sysctl.h"
00159 #include "sam3_pmc.h"
00160 #include "sam3_smc.h"
00161 #include "sam3_sdramc.h"
00162 #include "sam3_ints.h"
00163 #include "sam3_pio.h"
00164 #include "sam3_nvic.h"
00165 #include "sam3_uart.h"
00166 #include "sam3_usart.h"
00167 #include "sam3_spi.h"
00168 #include "sam3_flash.h"
00169 #include "sam3_wdt.h"
00170 #include "sam3_emac.h"
00171 #include "sam3_rstc.h"
00172 #include "sam3_adc.h"
00173 #include "sam3_dacc.h"
00174 #include "sam3_tc.h"
00175
00179 /*\{*/
00180 #if CPU_CM3_SAM3U
00181     #define UART0_PORT   PIOA_BASE
00182     #define USART0_PORT  PIOA_BASE
00183     #define USART1_PORT  PIOA_BASE
00184     #define USART2_PORT  PIOA_BASE
00185     #define USART3_PORT  PIOC_BASE
00186
00187     #define UART0_PERIPH   PIO_PERIPH_A
00188     #define USART0_PERIPH  PIO_PERIPH_A
00189     #define USART1_PERIPH  PIO_PERIPH_A
00190     #define USART2_PERIPH  PIO_PERIPH_A
00191     #define USART3_PERIPH  PIO_PERIPH_B
00192
00193     #define URXD0   11
00194     #define UTXD0   12
00195     #define RXD0    19
00196     #define TXD0    18
00197     #define RXD1    21
00198     #define TXD1    20
00199     #define RXD2    23
00200     #define TXD2    22
00201     #define RXD3    13
00202     #define TXD3    12
00203 #elif CPU_CM3_SAM3X
00204     #define UART0_PORT   PIOA_BASE
00205     #define USART0_PORT  PIOA_BASE
00206     #define USART1_PORT  PIOA_BASE
00207     #define USART2_PORT  PIOB_BASE
00208     #define USART3_PORT  PIOD_BASE
00209
00210     #define UART0_PERIPH   PIO_PERIPH_A
00211     #define USART0_PERIPH  PIO_PERIPH_A
00212     #define USART1_PERIPH  PIO_PERIPH_A
00213     #define USART2_PERIPH  PIO_PERIPH_A
00214     #define USART3_PERIPH  PIO_PERIPH_B
00215
00216     #define URXD0    8
00217     #define UTXD0    9
00218     #define RXD0    10
00219     #define TXD0    11
00220     #define RXD1    12
00221     #define TXD1    13
00222     #define RXD2    21
00223     #define TXD2    20
00224     #define RXD3     5
00225     #define TXD3     4
00226 #elif CPU_CM3_SAM3N || CPU_CM3_SAM3S
00227     #define UART0_PORT   PIOA_BASE
00228     #define UART1_PORT   PIOB_BASE
00229     #define USART0_PORT  PIOA_BASE
00230     #define USART1_PORT  PIOA_BASE
00231
00232     #define UART0_PERIPH   PIO_PERIPH_A
00233     #define UART1_PERIPH   PIO_PERIPH_A
00234     #define USART0_PERIPH  PIO_PERIPH_A
00235     #define USART1_PERIPH  PIO_PERIPH_A
00236
00237     #define URXD0    9
00238     #define UTXD0   10
00239     #define URXD1    2
00240     #define UTXD1    3
00241     #define RXD0     5
00242     #define TXD0     6
00243     #define RXD1    21
00244     #define TXD1    22
00245 #endif
00246 /*\}*/
00247
00251 /*\{*/
00252 #if CPU_CM3_SAM3U
00253     #define SPI0_SPCK   15
00254     #define SPI0_MOSI   14
00255     #define SPI0_MISO   13
00256 #elif CPU_CM3_SAM3X
00257     #define SPI0_SPCK   27
00258     #define SPI0_MOSI   26
00259     #define SPI0_MISO   25
00260 #else
00261     #define SPI0_SPCK   14
00262     #define SPI0_MOSI   13
00263     #define SPI0_MISO   12
00264 #endif
00265 /*\}*/
00266 #endif /* SAM3_H */


BeRTOS: sam3_adc.h File Reference

  • cpu
  • cortex-m3
  • io
Defines
sam3_adc.h File Reference

Go to the source code of this file.

Defines

#define | ADC_BASE 0x400C0000
ADC registers base.
#define | ADC_SETTLING_MASK 0x00300000
Analog Settling Time.
#define | ADC_SETTLING_SHIFT 20
Analog Settling Time shift.
#define | ADC_AST3 0
3 period of ADCClock
#define | ADC_AST5 1
5 period of ADCClock
#define | ADC_AST9 2
9 period of ADCClock
#define | ADC_AST17 3
17 period of ADCClock
#define | ADC_TRACKTIM_MASK 0x0F000000
Tracking Time.
#define | ADC_TRACKTIM_SHIFT 24
Tracking Time shift.
#define | ADC_TRANSFER_MASK 0x30000000
Transfer Period.
#define | ADC_TRANSFER_SHIFT 28
Transfer Period shift.
#define | ADC_CHER_OFF 0x00000010
ADC channel enable register.
#define | ADC_CHER (*((reg32_t *)(ADC_BASE + ADC_CHER_OFF)))
Channel enable register address.
#define | ADC_CHDR_OFF 0x00000014
ADC channel disable register.
#define | ADC_CHDR (*((reg32_t *)(ADC_BASE + ADC_CHDR_OFF)))
Channel disable register address.
#define | ADC_CHSR_OFF 0x00000018
ADC channel status register.
#define | ADC_CHSR (*((reg32_t *)(ADC_BASE + ADC_CHSR_OFF)))
Channel status register address.
#define | ADC_SR_OFF 0x0000001C
ADC status register.
#define | ADC_SR (*((reg32_t *)(ADC_BASE + ADC_SR_OFF)))
Status register address.
#define | ADC_CH_MASK 0x000000FF
Channel mask.
#define | ADC_CH0 0
Channel 0.
#define | ADC_CH1 1
Channel 1.
#define | ADC_CH2 2
Channel 2.
#define | ADC_CH3 3
Channel 3.
#define | ADC_CH4 4
Channel 4.
#define | ADC_CH5 5
Channel 5.
#define | ADC_CH6 6
Channel 6.
#define | ADC_CH7 7
Channel 7.
#define | ADC_IER_OFF 0x00000024
ADC Interrupt enable register.
#define | ADC_IER (*((reg32_t *)(ADC_BASE + ADC_IER_OFF)))
Interrupt enable register.
#define | ADC_IDR_OFF 0x00000028
ADC Interrupt disable register.
#define | ADC_IDR (*((reg32_t *)(ADC_BASE + ADC_IDR_OFF)))
Interrupt disable register.
#define | ADC_IMR_OFF 0x0000002C
ADC Interrupt mask register.
#define | ADC_IMR (*((reg32_t *)(ADC_BASE + ADC_IMR_OFF)))
Interrupt mask register.
#define | ADC_ISR_OFF 0x00000030
ADC Interrupt status register.
#define | ADC_ISR (*((reg32_t *)(ADC_BASE + ADC_ISR_OFF)))
Interrupt status register.
#define | ADC_EOC_MASK 0x000000FF
End of converison mask.
#define | ADC_EOC0 0
End of conversion channel 0.
#define | ADC_EOC1 1
End of conversion channel 1.
#define | ADC_EOC2 2
End of conversion channel 2.
#define | ADC_EOC3 3
End of conversion channel 3.
#define | ADC_EOC4 4
End of conversion channel 4.
#define | ADC_EOC5 5
End of conversion channel 5.
#define | ADC_EOC6 6
End of conversion channel 6.
#define | ADC_EOC7 7
End of conversion channel 7.
#define | ADC_OVRE0 8
Overrun error channel 0.
#define | ADC_OVRE1 9
Overrun error channel 1.
#define | ADC_OVRE2 10
Overrun error channel 2.
#define | ADC_OVRE3 11
Overrun error channel 3.
#define | ADC_OVRE4 12
Overrun error channel 4.
#define | ADC_OVRE5 13
Overrun error channel 5.
#define | ADC_OVRE6 14
Overrun error channel 6.
#define | ADC_OVRE7 15
Overrun error channel 7.
#define | ADC_DRDY 24
Data ready.
#define | ADC_GOVRE 25
General overrun error.
#define | ADC_COMPE 26
Comparition event interrupt mask.
#define | ADC_ENDRX 27
End of RX buffer.
#define | ADC_RXBUFF 28
Rx buffer full.
#define | ADC_CR_OFF 0x00000000
ADC control register.
#define | ADC_CR (*((reg32_t *)(ADC_BASE + ADC_CR_OFF)))
Control register address.
#define | ADC_SWRST 0
Software reset.
#define | ADC_START 1
Start conversion.
#define | ADC_MR_OFF 0x00000004
ADC mode register.
#define | ADC_MR (*((reg32_t *)(ADC_BASE + ADC_MR_OFF)))
Mode register address.
#define | ADC_TRGEN 0
Trigger enable.
#define | ADC_TRGSEL_TIOA0 0x00000000
TIOA output of the timer counter channel 0.
#define | ADC_TRGSEL_TIOA1 0x00000002
TIOA output of the timer counter channel 1.
#define | ADC_TRGSEL_TIOA2 0x00000004
TIOA output of the timer counter channel 2.
#define | ADC_TRGSEL_PWM0 0x0000000A
PWM Event Line 0.
#define | ADC_TRGSEL_PWM1 0x0000000C
PWM Event Line 1.
#define | ADC_LOWRES 4
Resolution 0: 12-bit, 1: 10-bit.
#define | ADC_SLEEP 5
Sleep mode.
#define | ADC_FREERUN 7
Freerun.
#define | ADC_PRESCALER_MASK 0x0000FF00
Prescaler rate selection.
#define | ADC_PRESCALER_SHIFT 8
Prescale rate selection shift.
#define | ADC_STARTUP_MASK 0x000F0000
Start up timer.
#define | ADC_STARTUP_SHIFT 16
Start up timer shift.
#define | ADC_SUT0 0
Start up timer.
#define | ADC_SUT8 1
8 period of ADCClock.
#define | ADC_SUT16 2
16 period of ADCClock.
#define | ADC_SUT24 3
24 period of ADCClock.
#define | ADC_SUT64 4
64 period of ADCClock.
#define | ADC_SUT80 5
80 period of ADCClock.
#define | ADC_SUT96 6
96 period of ADCClock.
#define | ADC_SUT112 7
112 period of ADCClock.
#define | ADC_SUT512 8
512 period of ADCClock.
#define | ADC_SUT576 9
576 period of ADCClock.
#define | ADC_SUT640 10
640 period of ADCClock.
#define | ADC_SUT704 11
704 period of ADCClock.
#define | ADC_SUT768 12
768 period of ADCClock.
#define | ADC_SUT832 13
832 period of ADCClock.
#define | ADC_SUT896 14
896 period of ADCClock.
#define | ADC_SUT960 15
896 period of ADCClock.
#define | ADC_LCDR_OFF 0x00000020
ADC last convert data register.
#define | ADC_LCDR (*((reg32_t *)(ADC_BASE + ADC_LCDR_OFF)))
Last converted RAW data register.
#define | ADC_LDATA (ADC_LCDR & 0xFFF)
Last data converted register.
#define | ADC_CHNB ((ADC_LCDR & 0xF000) >> 12)
Channel number.
#define | ADC_CDR_OFF 0x00000050
ADC Channel data register.
#define | ADC_CDR (*((reg32_t *)(ADC_BASE + ADC_CDR_OFF)))
Channel data register.
#define | ADC_ACR_OFF 0x00000094
ADC Analog Control register.
#define | ADC_ACR (*((reg32_t *)(ADC_BASE + ADC_ACR_OFF)))
Analog control register.
#define | ADC_TSON 4
Temperature Sensor On.
#define | ADC_TEMPERATURE_CH 15
Channel where is the internal sensor temperature.

Detailed Description

Author:
Daniele Basile <asterix@develer.com>

SAM3 Analog to Digital Converter.

Definition in file sam3_adc.h.

Define Documentation

#define ADC_ACR_OFF 0x00000094

ADC Analog Control register.

Analog control register offeset.

Definition at line 248 of file sam3_adc.h.

#define ADC_BASE 0x400C0000

ADC registers base.

Definition at line 46 of file sam3_adc.h.

#define ADC_CDR_OFF 0x00000050

ADC Channel data register.

Channel data register offeset.

Definition at line 239 of file sam3_adc.h.

#define ADC_CHDR_OFF 0x00000014

ADC channel disable register.

Channel disable register offeset.

Definition at line 148 of file sam3_adc.h.

#define ADC_CHER_OFF 0x00000010

ADC channel enable register.

Channel enable register offeset.

Definition at line 142 of file sam3_adc.h.

#define ADC_CHSR_OFF 0x00000018

ADC channel status register.

Channel status register offeset.

Definition at line 154 of file sam3_adc.h.

#define ADC_CR_OFF 0x00000000

ADC control register.

Control register offeset.

Definition at line 52 of file sam3_adc.h.

#define ADC_IDR_OFF 0x00000028

ADC Interrupt disable register.

Interrupt disable register offeset.

Definition at line 184 of file sam3_adc.h.

#define ADC_IER_OFF 0x00000024

ADC Interrupt enable register.

Interrupt enable register offeset.

Definition at line 178 of file sam3_adc.h.

#define ADC_IMR_OFF 0x0000002C

ADC Interrupt mask register.

Interrupt mask register offeset.

Definition at line 190 of file sam3_adc.h.

#define ADC_ISR_OFF 0x00000030

ADC Interrupt status register.

Interrupt status register offeset.

Definition at line 196 of file sam3_adc.h.

#define ADC_LCDR_OFF 0x00000020

ADC last convert data register.

Last converted data register offeset.

Definition at line 228 of file sam3_adc.h.

#define ADC_MR_OFF 0x00000004

ADC mode register.

Mode register offeset.

Definition at line 62 of file sam3_adc.h.

#define ADC_PRESCALER_MASK 0x0000FF00

Prescaler rate selection.

ADCClock = MCK / ((ADC_PRESCALER_VALUE + 1) * 2) Prescaler rate selection mask.

Definition at line 80 of file sam3_adc.h.

#define ADC_SETTLING_MASK 0x00300000

Analog Settling Time.

Analog Settling Time mask.

Definition at line 116 of file sam3_adc.h.

#define ADC_SR_OFF 0x0000001C

ADC status register.

Status register offeset.

Definition at line 161 of file sam3_adc.h.

#define ADC_STARTUP_MASK 0x000F0000

Start up timer.

Start up timer mask.

Definition at line 86 of file sam3_adc.h.

#define ADC_SUT0 0

Start up timer.

0 period of ADCClock.

Definition at line 94 of file sam3_adc.h.

#define ADC_TRACKTIM_MASK 0x0F000000

Tracking Time.

Tracking Time = (TRACKTIM + 1) * ADCClock periods. Tracking Time mask.

Definition at line 127 of file sam3_adc.h.

#define ADC_TRANSFER_MASK 0x30000000

Transfer Period.

Transfer Period = (TRANSFER * 2 + 3) ADCClock periods. Transfer Period mask.

Definition at line 134 of file sam3_adc.h.


BeRTOS: sam3_adc.h Source File

  • cpu
  • cortex-m3
  • io
sam3_adc.h
Go to the documentation of this file.
00001
00042 #ifndef SAM3_ADC_H
00043 #define SAM3_ADC_H
00044
00046 #define ADC_BASE                0x400C0000
00047
00052 #define ADC_CR_OFF              0x00000000     ///< Control register offeset.
00053 #define ADC_CR          (*((reg32_t *)(ADC_BASE + ADC_CR_OFF))) ///< Control register address.
00054 #define ADC_SWRST                        0      ///< Software reset.
00055 #define ADC_START                        1      ///< Start conversion.
00056 /* \} */
00057
00062 #define ADC_MR_OFF              0x00000004     ///< Mode register offeset.
00063 #define ADC_MR          (*((reg32_t *)(ADC_BASE + ADC_MR_OFF))) ///< Mode register address.
00064 #define ADC_TRGEN                        0     ///< Trigger enable.
00065
00066 #define ADC_TRGSEL_TIOA0         0x00000000    ///< TIOA output of the timer counter channel 0.
00067 #define ADC_TRGSEL_TIOA1         0x00000002    ///< TIOA output of the timer counter channel 1.
00068 #define ADC_TRGSEL_TIOA2         0x00000004    ///< TIOA output of the timer counter channel 2.
00069 #define ADC_TRGSEL_PWM0          0x0000000A    ///< PWM Event Line 0.
00070 #define ADC_TRGSEL_PWM1          0x0000000C    ///< PWM Event Line 1.
00071
00072 #define ADC_LOWRES                        4   ///< Resolution 0: 12-bit, 1: 10-bit.
00073 #define ADC_SLEEP                         5   ///< Sleep mode.
00074 #define ADC_FREERUN                       7   ///< Freerun.
00075
00080 #define ADC_PRESCALER_MASK       0x0000FF00   ///< Prescaler rate selection mask.
00081 #define ADC_PRESCALER_SHIFT               8   ///< Prescale  rate selection shift.
00082
00086 #define ADC_STARTUP_MASK         0x000F0000    ///< Start up timer mask.
00087 #define ADC_STARTUP_SHIFT                16    ///< Start up timer shift.
00088
00094 #define ADC_SUT0                          0    ///< 0 period of ADCClock.
00095 #define ADC_SUT8                          1    ///< 8 period of ADCClock.
00096 #define ADC_SUT16                         2    ///< 16 period of ADCClock.
00097 #define ADC_SUT24                         3    ///< 24 period of ADCClock.
00098 #define ADC_SUT64                         4    ///< 64 period of ADCClock.
00099 #define ADC_SUT80                         5    ///< 80 period of ADCClock.
00100 #define ADC_SUT96                         6    ///< 96 period of ADCClock.
00101 #define ADC_SUT112                        7    ///< 112 period of ADCClock.
00102 #define ADC_SUT512                        8    ///< 512 period of ADCClock.
00103 #define ADC_SUT576                        9    ///< 576 period of ADCClock.
00104 #define ADC_SUT640                        10   ///< 640 period of ADCClock.
00105 #define ADC_SUT704                        11   ///< 704 period of ADCClock.
00106 #define ADC_SUT768                        12   ///< 768 period of ADCClock.
00107 #define ADC_SUT832                        13   ///< 832 period of ADCClock.
00108 #define ADC_SUT896                        14   ///< 896 period of ADCClock.
00109 #define ADC_SUT960                        15   ///< 896 period of ADCClock.
00110
00116 #define ADC_SETTLING_MASK        0x00300000    ///< Analog Settling Time mask.
00117 #define ADC_SETTLING_SHIFT               20    ///< Analog Settling Time shift.
00118 #define ADC_AST3                          0    ///< 3 period of ADCClock
00119 #define ADC_AST5                          1    ///< 5 period of ADCClock
00120 #define ADC_AST9                          2    ///< 9 period of ADCClock
00121 #define ADC_AST17                         3    ///< 17 period of ADCClock
00122
00127 #define ADC_TRACKTIM_MASK          0x0F000000   ///< Tracking Time mask.
00128 #define ADC_TRACKTIM_SHIFT                 24   ///< Tracking Time shift.
00129
00134 #define ADC_TRANSFER_MASK          0x30000000   ///< Transfer Period mask.
00135 #define ADC_TRANSFER_SHIFT                 28   ///< Transfer Period shift.
00136 /* \} */
00137
00138
00142 #define ADC_CHER_OFF             0x00000010     ///< Channel enable register offeset.
00143 #define ADC_CHER          (*((reg32_t *)(ADC_BASE + ADC_CHER_OFF))) ///<  Channel enable register address.
00144
00148 #define ADC_CHDR_OFF             0x00000014     ///< Channel disable register offeset.
00149 #define ADC_CHDR          (*((reg32_t *)(ADC_BASE + ADC_CHDR_OFF))) ///<  Channel disable register address.
00150
00154 #define ADC_CHSR_OFF             0x00000018     ///< Channel status register offeset.
00155 #define ADC_CHSR          (*((reg32_t *)(ADC_BASE + ADC_CHSR_OFF))) ///<  Channel status register address.
00156
00157
00161 #define ADC_SR_OFF               0x0000001C     ///< Status register offeset.
00162 #define ADC_SR          (*((reg32_t *)(ADC_BASE + ADC_SR_OFF))) ///< Status register address.
00163
00164
00165 #define ADC_CH_MASK              0x000000FF    ///< Channel mask.
00166 #define ADC_CH0                           0    ///< Channel 0
00167 #define ADC_CH1                           1    ///< Channel 1
00168 #define ADC_CH2                           2    ///< Channel 2
00169 #define ADC_CH3                           3    ///< Channel 3
00170 #define ADC_CH4                           4    ///< Channel 4
00171 #define ADC_CH5                           5    ///< Channel 5
00172 #define ADC_CH6                           6    ///< Channel 6
00173 #define ADC_CH7                           7    ///< Channel 7
00174
00178 #define ADC_IER_OFF              0x00000024     ///< Interrupt enable register offeset.
00179 #define ADC_IER          (*((reg32_t *)(ADC_BASE + ADC_IER_OFF))) ///<  Interrupt enable register.
00180
00184 #define ADC_IDR_OFF              0x00000028     ///< Interrupt disable register offeset.
00185 #define ADC_IDR          (*((reg32_t *)(ADC_BASE + ADC_IDR_OFF))) ///<  Interrupt disable register.
00186
00190 #define ADC_IMR_OFF              0x0000002C     ///< Interrupt mask register offeset.
00191 #define ADC_IMR          (*((reg32_t *)(ADC_BASE + ADC_IMR_OFF))) ///<  Interrupt mask register.
00192
00196 #define ADC_ISR_OFF              0x00000030     ///< Interrupt status register offeset.
00197 #define ADC_ISR          (*((reg32_t *)(ADC_BASE + ADC_ISR_OFF))) ///<  Interrupt status register.
00198
00199 #define ADC_EOC_MASK             0x000000FF    ///< End of converison mask.
00200 #define ADC_EOC0                          0    ///< End of conversion channel 0.
00201 #define ADC_EOC1                          1    ///< End of conversion channel 1.
00202 #define ADC_EOC2                          2    ///< End of conversion channel 2.
00203 #define ADC_EOC3                          3    ///< End of conversion channel 3.
00204 #define ADC_EOC4                          4    ///< End of conversion channel 4.
00205 #define ADC_EOC5                          5    ///< End of conversion channel 5.
00206 #define ADC_EOC6                          6    ///< End of conversion channel 6.
00207 #define ADC_EOC7                          7    ///< End of conversion channel 7.
00208
00209 #define ADC_OVRE0                         8    ///< Overrun error channel 0.
00210 #define ADC_OVRE1                         9    ///< Overrun error channel 1.
00211 #define ADC_OVRE2                        10    ///< Overrun error channel 2.
00212 #define ADC_OVRE3                        11    ///< Overrun error channel 3.
00213 #define ADC_OVRE4                        12    ///< Overrun error channel 4.
00214 #define ADC_OVRE5                        13    ///< Overrun error channel 5.
00215 #define ADC_OVRE6                        14    ///< Overrun error channel 6.
00216 #define ADC_OVRE7                        15    ///< Overrun error channel 7.
00217
00218 #define ADC_DRDY                         24    ///< Data ready.
00219 #define ADC_GOVRE                        25    ///< General overrun error.
00220 #define ADC_COMPE                        26    ///< Comparition event interrupt mask.
00221 #define ADC_ENDRX                        27    ///< End of RX buffer.
00222 #define ADC_RXBUFF                       28    ///< Rx buffer full.
00223
00228 #define ADC_LCDR_OFF             0x00000020     ///< Last converted data register offeset.
00229 #define ADC_LCDR          (*((reg32_t *)(ADC_BASE + ADC_LCDR_OFF))) ///< Last converted RAW data register.
00230 #define ADC_LDATA         (ADC_LCDR & 0xFFF)  ///< Last data converted register.
00231 #define ADC_CHNB          ((ADC_LCDR & 0xF000) >> 12) ///< Channel number.
00232 /* \} */
00233
00234
00239 #define ADC_CDR_OFF             0x00000050     ///< Channel data register offeset.
00240 #define ADC_CDR          (*((reg32_t *)(ADC_BASE + ADC_CDR_OFF))) ///< Channel data register.
00241 /* \} */
00242
00243
00248 #define ADC_ACR_OFF              0x00000094     ///< Analog control register offeset.
00249 #define ADC_ACR          (*((reg32_t *)(ADC_BASE + ADC_ACR_OFF))) ///< Analog control register.
00250 #define ADC_TSON                          4     ///< Temperature Sensor On.
00251 #define ADC_TEMPERATURE_CH               15     ///< Channel where is the internal sensor temperature
00252 /* \} */
00253
00254 #endif /* SAM3_ADC_H */


BeRTOS: sam3_dacc.h File Reference

  • cpu
  • cortex-m3
  • io
Defines
sam3_dacc.h File Reference

Go to the source code of this file.

Defines

#define | DACC_BASE 0x400C8000
DACC registers base.
#define | DACC_MR_STARTUP_0 0
0 periods of DACClock
#define | DACC_MR_STARTUP_8 1
8 periods of DACClock
#define | DACC_MR_STARTUP_16 2
16 periods of of DACClock
#define | DACC_MR_STARTUP_24 3
24 periods of of DACClock
#define | DACC_MR_STARTUP_64 4
64 periods of of DACClock
#define | DACC_MR_STARTUP_80 5
70 periods of of DACClock
#define | DACC_MR_STARTUP_96 6
96 periods of of DACClock
#define | DACC_MR_STARTUP_112 7
112 periods of of DACClock
#define | DACC_MR_STARTUP_512 8
512 periods of DACClock
#define | DACC_MR_STARTUP_576 9
576 periods of DACClock
#define | DACC_MR_STARTUP_640 10
640 periods of DACClock
#define | DACC_MR_STARTUP_704 11
704 periods of DACClock
#define | DACC_MR_STARTUP_768 12
768 periods of DACClock
#define | DACC_MR_STARTUP_832 13
832 periods of DACClock
#define | DACC_MR_STARTUP_896 14
896 periods of DACClock
#define | DACC_MR_STARTUP_960 15
960 periods of DACClock
#define | DACC_MR_STARTUP_1024 16
1024 periods of DACClock
#define | DACC_MR_STARTUP_1088 17
1088 periods of DACClock
#define | DACC_MR_STARTUP_1152 18
1152 periods of DACClock
#define | DACC_MR_STARTUP_1216 19
1216 periods of DACClock
#define | DACC_MR_STARTUP_1280 20
1280 periods of DACClock
#define | DACC_MR_STARTUP_1344 21
1344 periods of DACClock
#define | DACC_MR_STARTUP_1408 22
1408 periods of DACClock
#define | DACC_MR_STARTUP_1472 23
1472 periods of DACClock
#define | DACC_MR_STARTUP_1536 24
1536 periods of DACClock
#define | DACC_MR_STARTUP_1600 25
1600 periods of DACClock
#define | DACC_MR_STARTUP_1664 26
1664 periods of DACClock
#define | DACC_MR_STARTUP_1728 27
1728 periods of DACClock
#define | DACC_MR_STARTUP_1792 28
1792 periods of DACClock
#define | DACC_MR_STARTUP_1856 29
1856 periods of DACClock
#define | DACC_MR_STARTUP_1920 30
1920 periods of DACClock
#define | DACC_MR_STARTUP_1984 31
1984 periods of DACClock
#define | DACC_CHER_OFF 0x00000010
DACC channel enable register.
#define | DACC_CHER (*((reg32_t*) (DACC_BASE + DACC_CHER_OFF)))
Channel enable register address.
#define | DACC_CHDR_OFF 0x00000014
DACC channel disable register.
#define | DACC_CHDR (*((reg32_t*) (DACC_BASE + DACC_CHDR_OFF)))
Channel disable register address.
#define | DACC_CHSR_OFF 0x00000018
DACC channel status register.
#define | DACC_CHSR (*((reg32_t*) (DACC_BASE + DACC_CHSR_OFF)))
Channel status register address.
#define | DACC_CH0 0
Channel 0.
#define | DACC_CH1 1
Channel 1.
#define | DACC_CDR_OFF 0x00000020
DACC Conversion data register.
#define | DACC_CDR (*((reg32_t*) (DACC_BASE + DACC_CDR_OFF)))
Conversion data register address.
#define | DACC_IER_OFF 0x00000024
DACC Interrupt enable register.
#define | DACC_IER (*((reg32_t*) (DACC_BASE + DACC_IER_OFF)))
Interrupt enable register address.
#define | DACC_IDR_OFF 0x00000028
DACC Interrupt disable register.
#define | DACC_IDR (*((reg32_t*) (DACC_BASE + DACC_IDR_OFF)))
Interrupt disable register address.
#define | DACC_IMR_OFF 0x0000002C
DACC Interrupt disable register.
#define | DACC_IMR (*((reg32_t*) (DACC_BASE + DACC_IMR_OFF)))
Interrupt disable register address.
#define | DACC_ISR_OFF 0x00000030
DACC Interrupt status register.
#define | DACC_ISR (*((reg32_t*) (DACC_BASE + DACC_ISR_OFF)))
Interrupt status register address.
#define | DACC_TXRDY 0
Transmit ready interrupt.
#define | DACC_EOC 1
End of conversion interrupt.
#define | DACC_ENDTX 2
End of transmit buffer interrupt.
#define | DACC_TXBUFE 3
Transmit buffer empty interrupt.
#define | DACC_RPR_OFF 0x100
DMA controller for DACC DACC PDC register.
#define | DACC_RPR (*((reg32_t*) (DACC_BASE + DACC_RPR_OFF)))
Receive Pointer Register.
#define | DACC_RCR_OFF 0x104
Receive Counter Register.
#define | DACC_RCR (*((reg32_t*) (DACC_BASE + DACC_RCR_OFF)))
Receive Counter Register.
#define | DACC_TPR_OFF 0x108
Transmit Pointer Register.
#define | DACC_TPR (*((reg32_t*) (DACC_BASE + DACC_TPR_OFF)))
Transmit Pointer Register.
#define | DACC_TCR_OFF 0x10C
Transmit Counter Register.
#define | DACC_TCR (*((reg32_t*) (DACC_BASE + DACC_TCR_OFF)))
Transmit Counter Register.
#define | DACC_RNPR_OFF 0x110
Receive Next Pointer Register.
#define | DACC_RNPR (*((reg32_t*) (DACC_BASE + DACC_RNPR_OFF)))
Receive Next Pointer Register.
#define | DACC_RNCR_OFF 0x114
Receive Next Counter Register.
#define | DACC_RNCR (*((reg32_t*) (DACC_BASE + DACC_RNCR_OFF)))
Receive Next Counter Register.
#define | DACC_TNPR_OFF 0x118
Transmit Next Pointer Register.
#define | DACC_TNPR (*((reg32_t*) (DACC_BASE + DACC_TNPR_OFF)))
Transmit Next Pointer Register.
#define | DACC_TNCR_OFF 0x11C
Transmit Next Counter Register.
#define | DACC_TNCR (*((reg32_t*) (DACC_BASE + DACC_TNCR_OFF)))
Transmit Next Counter Register.
#define | DACC_PTCR_OFF 0x120
Transfer Control Register.
#define | DACC_PTCR (*((reg32_t*) (DACC_BASE + DACC_PTCR_OFF)))
Transfer Control Register.
#define | DACC_PTSR_OFF 0x124
Transfer Status Register.
#define | DACC_PTSR (*((reg32_t*) (DACC_BASE + DACC_PTSR_OFF)))
Transfer Status Register.
#define | DACC_PTCR_RXTEN 0
DACC_PTCR Receiver Transfer Enable.
#define | DACC_PTCR_RXTDIS 1
DACC_PTCR Receiver Transfer Disable.
#define | DACC_PTCR_TXTEN 8
DACC_PTCR Transmitter Transfer Enable.
#define | DACC_PTCR_TXTDIS 9
DACC_PTCR Transmitter Transfer Disable.
#define | DACC_PTSR_RXTEN 0
DACC_PTSR Receiver Transfer Enable.
#define | DACC_PTSR_TXTEN 8
DACC_PTSR Transmitter Transfer Enable.
#define | DACC_CR_OFF 0x00000000
DACC control register.
#define | DACC_CR (*((reg32_t*)(DACC_BASE + DACC_CR_OFF)))
Control register address.
#define | DACC_SWRST 0
Software reset.
#define | DACC_MR_OFF 0x00000004
DACC mode register.
#define | DACC_MR (*((reg32_t*) (DACC_BASE + DACC_MR_OFF)))
Mode register address.
#define | DACC_TRGEN 0
Trigger enable.
#define | DACC_TRGSEL_MASK 0x14
Trigger selection mask.
#define | DACC_TRGSEL_SHIFT 1
Trigger selection shift.
#define | DACC_WORD 4
Word transfer.
#define | DACC_SLEEP 5
Sleep mode.Fast Wake up Mode.
#define | DACC_FASTWKUP 6
Fast Wake up Mode.
#define | DACC_REFRESH_MASK 0xFF00
Refresh Period mask.
#define | DACC_REFRESH_SHIFT 8
Refresh Period shift.
#define | DACC_USER_SEL_MASK 0x30000
User Channel Selection mask.
#define | DACC_USER_SEL_SHIFT 16
User Channel Selection shift.
#define | DACC_TAG 20
Tag selection mode.
#define | DACC_MAXS 21
Max speed mode.
#define | DACC_STARTUP_MASK 0x3F000000
Startup time selection.
#define | DACC_STARTUP_SHIFT 24
Startup time selsection shift.
#define | DACC_TRGSEL_TIO_CH0 1
Trigger selection.
#define | DACC_TRGSEL_TIO_CH1 2
DACC mode register.
#define | DACC_TRGSEL_TIO_CH2 3
DACC mode register.
#define | DACC_TRGSEL_PWM0 4
DACC mode register.
#define | DACC_TRGSEL_PWM1 5
DACC mode register.

Detailed Description

Author:
Daniele Basile <asterix@develer.com>

SAM3 Digital to Analog to Converter.

Definition in file sam3_dacc.h.

Define Documentation

#define DACC_BASE 0x400C8000

DACC registers base.

Definition at line 45 of file sam3_dacc.h.

#define DACC_CDR_OFF 0x00000020

DACC Conversion data register.

Conversion data register offeset.

Definition at line 149 of file sam3_dacc.h.

#define DACC_CHDR_OFF 0x00000014

DACC channel disable register.

Channel disable register offeset.

Definition at line 133 of file sam3_dacc.h.

#define DACC_CHER_OFF 0x00000010

DACC channel enable register.

Channel enable register offeset.

Definition at line 127 of file sam3_dacc.h.

#define DACC_CHSR_OFF 0x00000018

DACC channel status register.

Channel status register offeset.

Definition at line 139 of file sam3_dacc.h.

#define DACC_CR_OFF 0x00000000

DACC control register.

Control register offeset.

Definition at line 51 of file sam3_dacc.h.

#define DACC_IDR_OFF 0x00000028

DACC Interrupt disable register.

Interrupt disable register offeset.

Definition at line 162 of file sam3_dacc.h.

#define DACC_IER_OFF 0x00000024

DACC Interrupt enable register.

Interrupt enable register offeset.

Definition at line 156 of file sam3_dacc.h.

#define DACC_IMR_OFF 0x0000002C

DACC Interrupt disable register.

Interrupt disable register offeset.

Definition at line 168 of file sam3_dacc.h.

#define DACC_ISR_OFF 0x00000030

DACC Interrupt status register.

Interrupt disable status offeset.

Definition at line 174 of file sam3_dacc.h.

#define DACC_MR_OFF 0x00000004

DACC mode register.

Mode register offeset.

Definition at line 60 of file sam3_dacc.h.

#define DACC_RPR_OFF 0x100

DMA controller for DACC DACC PDC register.

Receive Pointer Register.

Definition at line 187 of file sam3_dacc.h.

#define DACC_TRGSEL_PWM0 4

DACC mode register.

Mode register offeset.

Definition at line 86 of file sam3_dacc.h.

#define DACC_TRGSEL_PWM1 5

DACC mode register.

Mode register offeset.

Definition at line 87 of file sam3_dacc.h.

#define DACC_TRGSEL_TIO_CH1 2

DACC mode register.

Mode register offeset.

Definition at line 84 of file sam3_dacc.h.

#define DACC_TRGSEL_TIO_CH2 3

DACC mode register.

Mode register offeset.

Definition at line 85 of file sam3_dacc.h.


BeRTOS: sam3_dacc.h Source File

  • cpu
  • cortex-m3
  • io
sam3_dacc.h
Go to the documentation of this file.
00001
00041 #ifndef SAM3_DACC_H
00042 #define SAM3_DACC_H
00043
00045 #define DACC_BASE               0x400C8000
00046
00051 #define DACC_CR_OFF              0x00000000     ///< Control register offeset.
00052 #define DACC_CR          (*((reg32_t*)(DACC_BASE + DACC_CR_OFF)))    ///< Control register address.
00053 #define DACC_SWRST                        0      ///< Software reset.
00054 /* \} */
00055
00060 #define DACC_MR_OFF              0x00000004     ///< Mode register offeset.
00061 #define DACC_MR          (*((reg32_t*) (DACC_BASE + DACC_MR_OFF)))    ///< Mode register address.
00062 #define DACC_TRGEN                        0      ///< Trigger enable.
00063 #define DACC_TRGSEL_MASK               0x14      ///< Trigger selection mask.
00064 #define DACC_TRGSEL_SHIFT                 1      ///< Trigger selection shift.
00065 #define DACC_WORD                         4      ///< Word transfer.
00066 #define DACC_SLEEP                        5      ///< Sleep mode.Fast Wake up Mode
00067 #define DACC_FASTWKUP                     6      ///< Fast Wake up Mode
00068 #define DACC_REFRESH_MASK            0xFF00      ///< Refresh Period mask
00069 #define DACC_REFRESH_SHIFT                8      ///< Refresh Period shift
00070 #define DACC_USER_SEL_MASK          0x30000      ///< User Channel Selection mask
00071 #define DACC_USER_SEL_SHIFT              16      ///< User Channel Selection shift
00072 #define DACC_TAG                         20      ///< Tag selection mode
00073 #define DACC_MAXS                        21      ///< Max speed mode
00074 #define DACC_STARTUP_MASK        0x3F000000      ///< Startup time selection
00075 #define DACC_STARTUP_SHIFT               24      ///< Startup time selsection shift
00076
00077
00083  #define DACC_TRGSEL_TIO_CH0    1
00084  #define DACC_TRGSEL_TIO_CH1    2
00085  #define DACC_TRGSEL_TIO_CH2    3
00086  #define DACC_TRGSEL_PWM0       4
00087  #define DACC_TRGSEL_PWM1       5
00088 /* \} */
00089
00090 #define DACC_MR_STARTUP_0                 0      ///< 0 periods of DACClock
00091 #define DACC_MR_STARTUP_8                 1      ///< 8 periods of DACClock
00092 #define DACC_MR_STARTUP_16                2      ///< 16 periods of of DACClock
00093 #define DACC_MR_STARTUP_24                3      ///< 24 periods of of DACClock
00094 #define DACC_MR_STARTUP_64                4      ///< 64 periods of of DACClock
00095 #define DACC_MR_STARTUP_80                5      ///< 70 periods of of DACClock
00096 #define DACC_MR_STARTUP_96                6      ///< 96 periods of of DACClock
00097 #define DACC_MR_STARTUP_112               7      ///< 112 periods of of DACClock
00098 #define DACC_MR_STARTUP_512               8      ///< 512 periods of DACClock
00099 #define DACC_MR_STARTUP_576               9      ///< 576 periods of DACClock
00100 #define DACC_MR_STARTUP_640               10     ///< 640 periods of DACClock
00101 #define DACC_MR_STARTUP_704               11     ///< 704 periods of DACClock
00102 #define DACC_MR_STARTUP_768               12     ///< 768 periods of DACClock
00103 #define DACC_MR_STARTUP_832               13     ///< 832 periods of DACClock
00104 #define DACC_MR_STARTUP_896               14     ///< 896 periods of DACClock
00105 #define DACC_MR_STARTUP_960               15     ///< 960 periods of DACClock
00106 #define DACC_MR_STARTUP_1024              16     ///< 1024 periods of DACClock
00107 #define DACC_MR_STARTUP_1088              17     ///< 1088 periods of DACClock
00108 #define DACC_MR_STARTUP_1152              18     ///< 1152 periods of DACClock
00109 #define DACC_MR_STARTUP_1216              19     ///< 1216 periods of DACClock
00110 #define DACC_MR_STARTUP_1280              20     ///< 1280 periods of DACClock
00111 #define DACC_MR_STARTUP_1344              21     ///< 1344 periods of DACClock
00112 #define DACC_MR_STARTUP_1408              22     ///< 1408 periods of DACClock
00113 #define DACC_MR_STARTUP_1472              23     ///< 1472 periods of DACClock
00114 #define DACC_MR_STARTUP_1536              24     ///< 1536 periods of DACClock
00115 #define DACC_MR_STARTUP_1600              25     ///< 1600 periods of DACClock
00116 #define DACC_MR_STARTUP_1664              26     ///< 1664 periods of DACClock
00117 #define DACC_MR_STARTUP_1728              27     ///< 1728 periods of DACClock
00118 #define DACC_MR_STARTUP_1792              28     ///< 1792 periods of DACClock
00119 #define DACC_MR_STARTUP_1856              29     ///< 1856 periods of DACClock
00120 #define DACC_MR_STARTUP_1920              30     ///< 1920 periods of DACClock
00121 #define DACC_MR_STARTUP_1984              31     ///< 1984 periods of DACClock
00122 /* \} */
00123
00127 #define DACC_CHER_OFF             0x00000010     ///< Channel enable register offeset.
00128 #define DACC_CHER          (*((reg32_t*) (DACC_BASE + DACC_CHER_OFF)))    ///< Channel enable register address.
00129
00133 #define DACC_CHDR_OFF             0x00000014     ///< Channel disable register offeset.
00134 #define DACC_CHDR          (*((reg32_t*) (DACC_BASE + DACC_CHDR_OFF)))    ///< Channel  disable register address.
00135
00139 #define DACC_CHSR_OFF             0x00000018     ///< Channel status register offeset.
00140 #define DACC_CHSR          (*((reg32_t*) (DACC_BASE + DACC_CHSR_OFF)))    ///< Channel  status register address.
00141
00142 #define DACC_CH0                           0      ///< Channel 0.
00143 #define DACC_CH1                           1      ///< Channel 1.
00144 /* \} */
00145
00149 #define DACC_CDR_OFF             0x00000020     ///< Conversion data register offeset.
00150 #define DACC_CDR          (*((reg32_t*) (DACC_BASE + DACC_CDR_OFF)))    ///< Conversion data register address.
00151
00152
00156 #define DACC_IER_OFF             0x00000024     ///< Interrupt enable register offeset.
00157 #define DACC_IER          (*((reg32_t*) (DACC_BASE + DACC_IER_OFF)))    ///< Interrupt enable register address.
00158
00162 #define DACC_IDR_OFF             0x00000028     ///< Interrupt disable register offeset.
00163 #define DACC_IDR          (*((reg32_t*) (DACC_BASE + DACC_IDR_OFF)))    ///< Interrupt disable register address.
00164
00168 #define DACC_IMR_OFF             0x0000002C     ///< Interrupt disable register offeset.
00169 #define DACC_IMR          (*((reg32_t*) (DACC_BASE + DACC_IMR_OFF)))    ///< Interrupt disable register address.
00170
00174 #define DACC_ISR_OFF             0x00000030    ///< Interrupt disable status offeset.
00175 #define DACC_ISR          (*((reg32_t*) (DACC_BASE + DACC_ISR_OFF)))    ///< Interrupt status register address.
00176
00177 #define DACC_TXRDY                        0     ///< Transmit ready interrupt
00178 #define DACC_EOC                          1     ///< End of conversion interrupt
00179 #define DACC_ENDTX                        2     ///< End of transmit buffer interrupt
00180 #define DACC_TXBUFE                       3     ///< Transmit buffer empty interrupt
00181
00182
00187 #define DACC_RPR_OFF                     0x100 ///< Receive Pointer Register.
00188 #define DACC_RPR        (*((reg32_t*) (DACC_BASE + DACC_RPR_OFF)))    ///< Receive Pointer Register.
00189
00190 #define DACC_RCR_OFF                     0x104 ///< Receive Counter Register.
00191 #define DACC_RCR       (*((reg32_t*) (DACC_BASE + DACC_RCR_OFF)))   ///<  Receive Counter Register.
00192
00193 #define DACC_TPR_OFF                     0x108 ///< Transmit Pointer Register.
00194 #define DACC_TPR       (*((reg32_t*) (DACC_BASE + DACC_TPR_OFF)))   ///<  Transmit Pointer Register.
00195
00196 #define DACC_TCR_OFF                     0x10C ///< Transmit Counter Register.
00197 #define DACC_TCR       (*((reg32_t*) (DACC_BASE + DACC_TCR_OFF)))   ///< Transmit Counter Register.
00198
00199 #define DACC_RNPR_OFF                    0x110 ///< Receive Next Pointer Register.
00200 #define DACC_RNPR      (*((reg32_t*) (DACC_BASE + DACC_RNPR_OFF)))   ///< Receive Next Pointer Register.
00201
00202 #define DACC_RNCR_OFF                    0x114 ///< Receive Next Counter Register.
00203 #define DACC_RNCR      (*((reg32_t*) (DACC_BASE + DACC_RNCR_OFF)))   ///< Receive Next Counter Register.
00204
00205 #define DACC_TNPR_OFF                    0x118 ///< Transmit Next Pointer Register.
00206 #define DACC_TNPR      (*((reg32_t*) (DACC_BASE + DACC_TNPR_OFF)))   ///< Transmit Next Pointer Register.
00207
00208 #define DACC_TNCR_OFF                    0x11C ///< Transmit Next Counter Register.
00209 #define DACC_TNCR      (*((reg32_t*) (DACC_BASE + DACC_TNCR_OFF)))   ///< Transmit Next Counter Register.
00210
00211 #define DACC_PTCR_OFF                    0x120 ///< Transfer Control Register.
00212 #define DACC_PTCR      (*((reg32_t*) (DACC_BASE + DACC_PTCR_OFF)))  ///< Transfer Control Register.
00213
00214 #define DACC_PTSR_OFF                    0x124 ///< Transfer Status Register.
00215 #define DACC_PTSR      (*((reg32_t*) (DACC_BASE + DACC_PTSR_OFF)))    ///< Transfer Status Register.
00216
00217
00218 #define DACC_PTCR_RXTEN               0  ///< DACC_PTCR  Receiver Transfer Enable.
00219 #define DACC_PTCR_RXTDIS              1  ///< DACC_PTCR  Receiver Transfer Disable.
00220 #define DACC_PTCR_TXTEN               8  ///< DACC_PTCR  Transmitter Transfer Enable.
00221 #define DACC_PTCR_TXTDIS              9  ///< DACC_PTCR  Transmitter Transfer Disable.
00222 #define DACC_PTSR_RXTEN               0  ///< DACC_PTSR  Receiver Transfer Enable.
00223 #define DACC_PTSR_TXTEN               8  ///< DACC_PTSR  Transmitter Transfer Enable.
00224
00225 #endif /* SAM3_DACC_H */


BeRTOS: sam3_emac.h File Reference

  • cpu
  • cortex-m3
  • io
sam3_emac.h File Reference

SAM3 EMAC definitions. More...

Go to the source code of this file.

Detailed Description

SAM3 EMAC definitions.

This file is based on NUT/OS implementation. See license below.

Definition in file sam3_emac.h.


BeRTOS: sam3_emac.h Source File

  • cpu
  • cortex-m3
  • io
sam3_emac.h
Go to the documentation of this file.
00001
00038 /*
00039  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00040  *
00041  * Redistribution and use in source and binary forms, with or without
00042  * modification, are permitted provided that the following conditions
00043  * are met:
00044  *
00045  * 1. Redistributions of source code must retain the above copyright
00046  *    notice, this list of conditions and the following disclaimer.
00047  * 2. Redistributions in binary form must reproduce the above copyright
00048  *    notice, this list of conditions and the following disclaimer in the
00049  *    documentation and/or other materials provided with the distribution.
00050  * 3. Neither the name of the copyright holders nor the names of
00051  *    contributors may be used to endorse or promote products derived
00052  *    from this software without specific prior written permission.
00053  *
00054  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00055  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00056  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00057  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00058  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00059  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00060  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00061  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00062  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00063  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00064  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00065  * SUCH DAMAGE.
00066  *
00067  * For additional information see http://www.ethernut.de/
00068  */
00069
00070 #ifndef SAM3_EMAC_H
00071 #define SAM3_EMAC_H
00072
00073 #if CPU_CM3_SAM3X
00074
00075 #include <cfg/macros.h>
00076
00078 #define EMAC_BASE  0x400B0000
00079
00080
00086 /* \{ */
00087 #define EMAC_NCR_OFF                0x00000000  ///< Network control register offset.
00088 #define EMAC_NCR    (*((reg32_t *)(EMAC_BASE +  EMAC_NCR_OFF)))  ///< Network Control register address.
00089 #define EMAC_LB                              0  ///< PHY loopback.
00090 #define EMAC_LLB                             1   ///< EMAC loopback.
00091 #define EMAC_RE                              2  ///< Receive enable.
00092 #define EMAC_TE                              3  ///< Transmit enable.
00093 #define EMAC_MPE                             4  ///< Management port enable.
00094 #define EMAC_CLRSTAT                         5  ///< Clear statistics registers.
00095 #define EMAC_INCSTAT                         6  ///< Increment statistics registers.
00096 #define EMAC_WESTAT                          7  ///< Write enable for statistics registers.
00097 #define EMAC_BP                              8  ///< Back pressure.
00098 #define EMAC_TSTART                          9  ///< Start Transmission.
00099 #define EMAC_THALT                          10  ///< Transmission halt.
00100 // Not in sam7x
00101 //#define EMAC_TPFR                           11  ///< Transmit pause frame.
00102 //#define EMAC_TZQ                            12  ///< Transmit zero quantum pause frame.
00103 /* \} */
00104
00109 /* \{ */
00110 #define EMAC_NCFGR_OFF              0x00000004  ///< Network configuration register offset.
00111 #define EMAC_NCFGR   (*((reg32_t *)(EMAC_BASE +  EMAC_NCFGR_OFF))) ///< Network configuration register address.
00112 #define EMAC_SPD                             0  ///< Speed, set for 100Mb.
00113 #define EMAC_FD                              1  ///< Full duplex.
00114 #define EMAC_JFRAME                          3  ///< Jumbo Frames.
00115 #define EMAC_CAF                             4  ///< Copy all frames.
00116 #define EMAC_NBC                             5  ///< No broadcast.
00117 #define EMAC_MTI                             6  ///< Multicast hash event enable.
00118 #define EMAC_UNI                             7  ///< Unicast hash enable.
00119 #define EMAC_BIG                             8  ///< Receive 1522 bytes.
00120 // Not in sam7x
00121 //#define EMAC_EAE                           9  ///< External address match enable.
00122 #define EMAC_CLK                    0x00000C00  ///< Clock divider mask.
00123 #define EMAC_CLK_HCLK_8             0x00000000  ///< HCLK divided by 8.
00124 #define EMAC_CLK_HCLK_16            0x00000400  ///< HCLK divided by 16.
00125 #define EMAC_CLK_HCLK_32            0x00000800  ///< HCLK divided by 32.
00126 #define EMAC_CLK_HCLK_64            0x00000C00  ///< HCLK divided by 64.
00127 #define EMAC_RTY                            12  ///< Retry test.
00128 #define EMAC_PAE                            13  ///< Pause enable.
00129 #define EMAC_RBOF                   0x0000C000  ///< Receive buffer offset.
00130 #define EMAC_RBOF_OFFSET_0          0x00000000  ///< No offset from start of receive buffer.
00131 #define EMAC_RBOF_OFFSET_1          0x00004000  ///< One byte offset from start of receive buffer.
00132 #define EMAC_RBOF_OFFSET_2          0x00008000  ///< Two bytes offset from start of receive buffer.
00133 #define EMAC_RBOF_OFFSET_3          0x0000C000  ///< Three bytes offset from start of receive buffer.
00134 #define EMAC_RLCE                           16  ///< Receive length field checking enable.
00135 #define EMAC_DRFCS                          17  ///< Discard receive FCS.
00136 #define EMAC_EFRHD                          18  ///< Allow receive during transmit in half duplex.
00137 #define EMAC_IRXFCS                         19  ///< Ignore received FCS.
00138 /* \} */
00139
00144 /* \{ */
00145 #define EMAC_NSR_OFF                0x00000008  ///< Network Status register offset.
00146 #define EMAC_NSR    (*((reg32_t *)(EMAC_BASE +  EMAC_NSR_OFF)))  ///< Network Status register address.
00147 // Not in sam7x
00148 //#define EMAC_LINKR                         0  ///< .
00149 #define EMAC_MDIO                            1  ///< Status of MDIO input pin.
00150 #define EMAC_IDLE                            2  ///< Set when PHY is running.
00151 /* \} */
00152
00156 /* \{ */
00157 #define EMAC_TSR_OFF                0x00000014  ///< Transmit Status register offset.
00158 #define EMAC_TSR    (*((reg32_t *)(EMAC_BASE +  EMAC_TSR_OFF)))  ///< Transmit Status register address.
00159
00160 #define EMAC_UBR                             0  ///< Used bit read.
00161 #define EMAC_COL                             1  ///< Collision occurred.
00162 #define EMAC_RLES                            2  ///< Retry limit exceeded.
00163 #define EMAC_TGO                             3  ///< Transmit active.
00164 #define EMAC_BEX                             4  ///< Buffers exhausted mid frame.
00165 #define EMAC_COMP                            5  ///< Transmit complete.
00166 #define EMAC_UND                             6  ///< Transmit underrun.
00167 /* \} */
00168
00173 /* \{ */
00174 #define EMAC_RBQP_OFF               0x00000018  ///< Receive buffer queue pointer.
00175 #define EMAC_RBQP   (*((reg32_t *)(EMAC_BASE +  EMAC_RBQP_OFF))) ///< Receive buffer queue pointer.
00176 #define EMAC_TBQP_OFF               0x0000001C  ///< Transmit buffer queue pointer.
00177 #define EMAC_TBQP   (*((reg32_t *)(EMAC_BASE +  EMAC_TBQP_OFF))) ///< Transmit buffer queue pointer.
00178 /* \} */
00179
00183 /* \{ */
00184 #define EMAC_RSR_OFF                0x00000020  ///< Receive status register offset.
00185 #define EMAC_RSR    (*((reg32_t *)(EMAC_BASE +  EMAC_RSR_OFF)))  ///< Receive status register address.
00186 #define EMAC_BNA                             0  ///< Buffer not available.
00187 #define EMAC_REC                             1  ///< Frame received.
00188 #define EMAC_OVR                             2  ///< Receive overrun.
00189 /* \} */
00190
00192 /* \{ */
00193 #define EMAC_ISR_OFF                0x00000024  ///< Status register offset.
00194 #define EMAC_ISR    (*((reg32_t *)(EMAC_BASE +  EMAC_ISR_OFF)))  ///< Status register address.
00195 #define EMAC_IER_OFF                0x00000028  ///< Enable register offset.
00196 #define EMAC_IER    (*((reg32_t *)(EMAC_BASE +  EMAC_IER_OFF)))  ///< Enable register address.
00197 #define EMAC_IDR_OFF                0x0000002C  ///< Disable register offset.
00198 #define EMAC_IDR    (*((reg32_t *)(EMAC_BASE +  EMAC_IDR_OFF)))  ///< Disable register address.
00199 #define EMAC_IMR_OFF                0x00000030  ///< Mask register offset.
00200 #define EMAC_IMR    (*((reg32_t *)(EMAC_BASE +  EMAC_IMR_OFF)))  ///< Mask register address.
00201
00202 #define EMAC_MFD                             0  ///< Management frame done.
00203 #define EMAC_RCOMP                           1  ///< Receive complete.
00204 #define EMAC_RXUBR                           2  ///< Receive used bit read.
00205 #define EMAC_TXUBR                           3  ///< Transmit used bit read.
00206 #define EMAC_TUND                            4  ///< Ethernet transmit buffer underrun.
00207 #define EMAC_RLEX                            5  ///< Retry limit exceeded.
00208 #define EMAC_TXERR                           6  ///< Transmit error.
00209 #define EMAC_TCOMP                           7  ///< Transmit complete.
00210 //Not in sam7x
00211 //#define EMAC_LINK                          8  ///< .
00212 #define EMAC_ROVR                           10  ///< Receive overrun.
00213 #define EMAC_HRESP                          11  ///< DMA bus error.
00214 #define EMAC_PFR                            12  ///< Pause frame received.
00215 #define EMAC_PTZ                            13  ///< Pause time zero.
00216 /* \} */
00217
00222 /* \{ */
00223 #define EMAC_MAN_OFF                0x00000034  ///< PHY maintenance register offset.
00224 #define EMAC_MAN    (*((reg32_t *)(EMAC_BASE +  EMAC_MAN_OFF)))  ///< PHY maintenance register address.
00225 #define EMAC_DATA                   0x0000FFFF  ///< PHY data mask.
00226 #define EMAC_CODE                   0x00020000  ///< Fixed value.
00227 #define EMAC_REGA                   0x007C0000  ///< PHY register address mask.
00228 #define EMAC_REGA_SHIFT                     18  ///< PHY register address mask.
00229 #define EMAC_PHYA                   0x0F800000  ///< PHY address mask.
00230 #define EMAC_PHYA_SHIFT                     23  ///< PHY address mask.
00231 #define EMAC_RW                     0x30000000  ///< PHY read/write command mask.
00232 #define EMAC_RW_READ                0x20000000  ///< PHY read command.
00233 #define EMAC_RW_WRITE               0x10000000  ///< PHY write command.
00234 #define EMAC_SOF                    0x40000000  ///< Fixed value.
00235 /* \} */
00236
00241 /* \{ */
00242 #define EMAC_PTR_OFF                0x00000038  ///< Pause time register offset.
00243 #define EMAC_PTR    (*((reg32_t *)(EMAC_BASE +  EMAC_PTR_OFF)))  ///< Pause time register address.
00244 #define EMAC_PTIME                  0x0000FFFF  ///< Pause time mask.
00245 /* \} */
00246
00250 /* \{ */
00251 #define EMAC_PFRR_OFF               0x0000003C  ///< Pause frames received register offset.
00252 #define EMAC_PFRR  (*((reg32_t *)(EMAC_BASE +  EMAC_PFRR_OFF)))  ///< Pause frames received register address.
00253 #define EMAC_FTO_OFF                0x00000040  ///< Frames transmitted OK register offset.
00254 #define EMAC_FTO    (*((reg32_t *)(EMAC_BASE +  EMAC_FTO_OFF)))  ///< Frames transmitted OK register address.
00255 #define EMAC_SCF_OFF                0x00000044  ///< Single collision frame register offset.
00256 #define EMAC_SCF    (*((reg32_t *)(EMAC_BASE +  EMAC_SCF_OFF)))  ///< Single collision frame register address.
00257 #define EMAC_MCF_OFF                0x00000048  ///< Multiple collision frame register offset.
00258 #define EMAC_MCF    (*((reg32_t *)(EMAC_BASE +  EMAC_MCF_OFF)))  ///< Multiple collision frame register address.
00259 #define EMAC_FRO_OFF                0x0000004C  ///< Frames received OK register offset.
00260 #define EMAC_FRO    (*((reg32_t *)(EMAC_BASE +  EMAC_FRO_OFF)))  ///< Frames received OK register address.
00261 #define EMAC_FCSE_OFF               0x00000050  ///< Frame check sequence error register offset.
00262 #define EMAC_FCSE   (*((reg32_t *)(EMAC_BASE +  EMAC_FCSE_OFF))) ///< Frame check sequence error register address.
00263 #define EMAC_ALE_OFF                0x00000054  ///< Alignment error register offset.
00264 #define EMAC_ALE    (*((reg32_t *)(EMAC_BASE +  EMAC_ALE_OFF)))  ///< Alignment error register address.
00265 #define EMAC_DTF_OFF                0x00000058  ///< Deferred transmission frame register offset.
00266 #define EMAC_DTF    (*((reg32_t *)(EMAC_BASE +  EMAC_DTF_OFF)))  ///< Deferred transmission frame register address.
00267 #define EMAC_LCOL_OFF               0x0000005C  ///< Late collision register offset.
00268 #define EMAC_LCOL   (*((reg32_t *)(EMAC_BASE +  EMAC_LCOL_OFF))) ///< Late collision register address.
00269 #define EMAC_ECOL_OFF               0x00000060  ///< Excessive collision register offset.
00270 #define EMAC_ECOL   (*((reg32_t *)(EMAC_BASE +  EMAC_ECOL_OFF))) ///< Excessive collision register address.
00271 #define EMAC_TUNDR_OFF              0x00000064  ///< Transmit underrun error register offset.
00272 #define EMAC_TUNDR (*((reg32_t *)(EMAC_BASE +  EMAC_TUNDR_OFF))) ///< Transmit underrun error register address.
00273 #define EMAC_CSE_OFF                0x00000068  ///< Carrier sense error register offset.
00274 #define EMAC_CSE    (*((reg32_t *)(EMAC_BASE +  EMAC_CSE_OFF)))  ///< Carrier sense error register address.
00275 #define EMAC_RRE_OFF                0x0000006C  ///< Receive resource error register offset.
00276 #define EMAC_RRE    (*((reg32_t *)(EMAC_BASE +  EMAC_RRE_OFF)))  ///< Receive resource error register address.
00277 #define EMAC_ROV_OFF                0x00000070  ///< Receive overrun errors register offset.
00278 #define EMAC_ROV    (*((reg32_t *)(EMAC_BASE +  EMAC_ROV_OFF)))  ///< Receive overrun errors register address.
00279 #define EMAC_RSE_OFF                0x00000074  ///< Receive symbol errors register offset.
00280 #define EMAC_RSE    (*((reg32_t *)(EMAC_BASE +  EMAC_RSE_OFF)))  ///< Receive symbol errors register address.
00281 #define EMAC_ELE_OFF                0x00000078  ///< Excessive length errors register offset.
00282 #define EMAC_ELE    (*((reg32_t *)(EMAC_BASE +  EMAC_ELE_OFF)))  ///< Excessive length errors register address.
00283 #define EMAC_RJA_OFF                0x0000007C  ///< Receive jabbers register offset.
00284 #define EMAC_RJA    (*((reg32_t *)(EMAC_BASE +  EMAC_RJA_OFF)))  ///< Receive jabbers register address.
00285 #define EMAC_USF_OFF                0x00000080  ///< Undersize frames register offset.
00286 #define EMAC_USF    (*((reg32_t *)(EMAC_BASE +  EMAC_USF_OFF)))  ///< Undersize frames register address.
00287 #define EMAC_STE_OFF                0x00000084  ///< SQE test error register offset.
00288 #define EMAC_STE    (*((reg32_t *)(EMAC_BASE +  EMAC_STE_OFF)))  ///< SQE test error register address.
00289 #define EMAC_RLE_OFF                0x00000088  ///< Receive length field mismatch register offset.
00290 #define EMAC_RLE    (*((reg32_t *)(EMAC_BASE +  EMAC_RLE_OFF)))  ///< Receive length field mismatch register address.
00291 // Not in sam7x
00292 //#define EMAC_TPF_OFF                0x0000008C  ///< Transmitted pause frames register offset.
00293 //#define EMAC_TPF    (*((reg32_t *)(EMAC_BASE +  EMAC_TPF_OFF)  ///< Transmitted pause frames register address.
00294 /* \} */
00295
00300 /* \{ */
00301 #define EMAC_HRB_OFF                0x00000090  ///< Hash address bottom[31:0].
00302 #define EMAC_HRB    (*((reg32_t *)(EMAC_BASE +  EMAC_HRB_OFF)))  ///< Hash address bottom[31:0].
00303 #define EMAC_HRT_OFF                0x00000094  ///< Hash address top[63:32].
00304 #define EMAC_HRT    (*((reg32_t *)(EMAC_BASE +  EMAC_HRT_OFF)))  ///< Hash address top[63:32].
00305 #define EMAC_SA1L_OFF               0x00000098  ///< Specific address 1 bottom, first 4 bytes.
00306 #define EMAC_SA1L   (*((reg32_t *)(EMAC_BASE +  EMAC_SA1L_OFF))) ///< Specific address 1 bottom, first 4 bytes.
00307 #define EMAC_SA1H_OFF               0x0000009C  ///< Specific address 1 top, last 2 bytes.
00308 #define EMAC_SA1H   (*((reg32_t *)(EMAC_BASE +  EMAC_SA1H_OFF))) ///< Specific address 1 top, last 2 bytes.
00309 #define EMAC_SA2L_OFF               0x000000A0  ///< Specific address 2 bottom, first 4 bytes.
00310 #define EMAC_SA2L   (*((reg32_t *)(EMAC_BASE +  EMAC_SA2L_OFF))) ///< Specific address 2 bottom, first 4 bytes.
00311 #define EMAC_SA2H_OFF               0x000000A4  ///< Specific address 2 top, last 2 bytes.
00312 #define EMAC_SA2H   (*((reg32_t *)(EMAC_BASE +  EMAC_SA2H_OFF))) ///< Specific address 2 top, last 2 bytes.
00313 #define EMAC_SA3L_OFF               0x000000A8  ///< Specific address 3 bottom, first 4 bytes.
00314 #define EMAC_SA3L   (*((reg32_t *)(EMAC_BASE +  EMAC_SA3L_OFF))) ///< Specific address 3 bottom, first 4 bytes.
00315 #define EMAC_SA3H_OFF               0x000000AC  ///< Specific address 3 top, last 2 bytes.
00316 #define EMAC_SA3H   (*((reg32_t *)(EMAC_BASE +  EMAC_SA3H_OFF))) ///< Specific address 3 top, last 2 bytes.
00317 #define EMAC_SA4L_OFF               0x000000B0  ///< Specific address 4 bottom, first 4 bytes.
00318 #define EMAC_SA4L   (*((reg32_t *)(EMAC_BASE +  EMAC_SA4L_OFF))) ///< Specific address 4 bottom, first 4 bytes.
00319 #define EMAC_SA4H_OFF               0x000000B4  ///< Specific address 4 top, last 2 bytes.
00320 #define EMAC_SA4H   (*((reg32_t *)(EMAC_BASE +  EMAC_SA4H_OFF))) ///< Specific address 4 top, last 2 bytes.
00321 /* \} */
00322
00327 /* \{ */
00328 #define EMAC_TID_OFF                0x000000B8  ///< Type ID checking register offset.
00329 #define EMAC_TID    (*((reg32_t *)(EMAC_BASE +  EMAC_TID_OFF))) ///< Type ID checking register address.
00330 // Not in sam7x
00331 //#define EMAC_TPQ_OFF                0x000000BC  ///< Transmit pause quantum register offset.
00332 //#define EMAC_TPQ    (*((reg32_t *)(EMAC_BASE +  EMAC_TPQ_OFF)))  ///< Transmit pause quantum register address.
00333 /* \} */
00334
00339 /* \{ */
00340 #define EMAC_USRIO_OFF              0x000000C0  ///< User input/output register offset.
00341 #define EMAC_USRIO (*((reg32_t *)(EMAC_BASE +  EMAC_USRIO_OFF))) ///< User input/output register address.
00342
00343 #define EMAC_RMII                            0  ///< Enable reduced MII.
00344 #define EMAC_CLKEN                           1  ///< Enable tranceiver input clock.
00345 /* \} */
00346
00347 // Not in sam7x
00348 /*
00349  * Wake On LAN Register
00350  *
00351  *
00352 * \{ *
00353 #define EMAC_WOL_OFF                0x000000C4  ///< Wake On LAN register offset.
00354 #define EMAC_WOL    (*((reg32_t *)(EMAC_BASE +  EMAC_WOL_OFF)  ///< Wake On LAN register address.
00355 #define EMAC_IP                     0x0000FFFF  ///< ARP request IP address mask.
00356 #define EMAC_MAG                    0x00010000  ///< Magic packet event enable.
00357 #define EMAC_ARP                    0x00020000  ///< ARP request event enable.
00358 #define EMAC_SA1                    0x00040000  ///< Specific address register 1 event enable.
00359 * \} *
00360
00361 ** Revision Register *
00362 * \{ *
00363 #define EMAC_REV_OFF                0x000000FC  ///< Revision register offset.
00364 #define EMAC_REV    (*((reg32_t *)(EMAC_BASE +  EMAC_REV_OFF)  ///< Revision register address.
00365 #define EMAC_REVREF                 0x0000FFFF  ///< Revision.
00366 #define EMAC_PARTREF                0xFFFF0000  ///< Part.
00367 * \} *
00368 */
00369
00370 #endif /* CPU_CM3_SAM3X */
00371
00372 #endif /* SAM3_EMAC_H */


BeRTOS: sam3_flash.h File Reference

  • cpu
  • cortex-m3
  • io
sam3_flash.h File Reference

Atmel SAM3 enhanced embedded flash controller definitions. More...

Go to the source code of this file.

Defines

#define | EEFC0_BASE 0x400E0A00
EEFC base registers addresses.
#define | EEFC_FMR_OFF 0x0
EFC register offsets.
#define | EEFC_FCR_OFF 0x4
Flash Command Register.
#define | EEFC_FSR_OFF 0x8
Flash Status Register.
#define | EEFC_FRR_OFF 0xC
Flash Result Register.
#define | EEFC0_FMR (*((reg32_t *)(EEFC0_BASE + EEFC_FMR_OFF)))
EEFC registers.
#define | EEFC0_FCR (*((reg32_t *)(EEFC0_BASE + EEFC_FCR_OFF)))
Flash Command Register.
#define | EEFC0_FSR (*((reg32_t *)(EEFC0_BASE + EEFC_FSR_OFF)))
Flash Status Register.
#define | EEFC0_FRR (*((reg32_t *)(EEFC0_BASE + EEFC_FRR_OFF)))
Flash Result Register.
#define | EEFC_FMR_FRDY 0
Defines for bit fields in EEFC_FMR register.
#define | EEFC_FMR_FWS_SHIFT 8
Defines for bit fields in EEFC_FMR register.
#define | EEFC_FMR_FWS_MASK (0xf << EEFC_FMR_FWS_SHIFT)
Flash Wait State.
#define | EEFC_FMR_FWS(value) (EEFC_FMR_FWS_MASK & ((value) << EEFC_FMR_FWS_SHIFT))
Defines for bit fields in EEFC_FMR register.
#define | EEFC_FMR_FAM 24
Flash Access Mode.
#define | EEFC_FCR_FCMD_MASK 0xff
Defines for bit fields in EEFC_FCR register.
#define | EEFC_FCR_FCMD(value) (EEFC_FCR_FCMD_MASK & (value))
Defines for bit fields in EEFC_FCR register.
#define | EEFC_FCR_FARG_SHIFT 8
Defines for bit fields in EEFC_FCR register.
#define | EEFC_FCR_FARG_MASK (0xffff << EEFC_FCR_FARG_SHIFT)
Flash Command Argument.
#define | EEFC_FCR_FARG(value) (EEFC_FCR_FARG_MASK & ((value) << EEFC_FCR_FARG_SHIFT))
Defines for bit fields in EEFC_FCR register.
#define | EEFC_FCR_FKEY_SHIFT 24
Defines for bit fields in EEFC_FCR register.
#define | EEFC_FCR_FKEY_MASK (0xff << EEFC_FCR_FKEY_SHIFT)
Flash Writing Protection Key.
#define | EEFC_FCR_FKEY(value) (EEFC_FCR_FKEY_MASK & ((value) << EEFC_FCR_FKEY_SHIFT))
Defines for bit fields in EEFC_FCR register.
#define | EEFC_FSR_FRDY 0
Defines for bit fields in EEFC_FSR register.
#define | EEFC_FSR_FCMDE 1
Flash Command Error Status.
#define | EEFC_FSR_FLOCKE 2
Flash Lock Error Status.

Detailed Description

Atmel SAM3 enhanced embedded flash controller definitions.

Definition in file sam3_flash.h.

Define Documentation

#define EEFC0_FMR (*((reg32_t *)(EEFC0_BASE + EEFC_FMR_OFF)))

EEFC registers.

Flash Mode Register

Definition at line 64 of file sam3_flash.h.

#define EEFC_FCR_FARG ( value ) (EEFC_FCR_FARG_MASK & ((value) << EEFC_FCR_FARG_SHIFT))

Defines for bit fields in EEFC_FCR register.

Flash Command

Definition at line 98 of file sam3_flash.h.

#define EEFC_FCR_FARG_SHIFT 8

Defines for bit fields in EEFC_FCR register.

Flash Command

Definition at line 96 of file sam3_flash.h.

#define EEFC_FCR_FCMD ( value ) (EEFC_FCR_FCMD_MASK & (value))

Defines for bit fields in EEFC_FCR register.

Flash Command

Definition at line 95 of file sam3_flash.h.

#define EEFC_FCR_FCMD_MASK 0xff

Defines for bit fields in EEFC_FCR register.

Flash Command

Definition at line 94 of file sam3_flash.h.

#define EEFC_FCR_FKEY ( value ) (EEFC_FCR_FKEY_MASK & ((value) << EEFC_FCR_FKEY_SHIFT))

Defines for bit fields in EEFC_FCR register.

Flash Command

Definition at line 101 of file sam3_flash.h.

#define EEFC_FCR_FKEY_SHIFT 24

Defines for bit fields in EEFC_FCR register.

Flash Command

Definition at line 99 of file sam3_flash.h.

#define EEFC_FMR_FRDY 0

Defines for bit fields in EEFC_FMR register.

Ready Interrupt Enable

Definition at line 83 of file sam3_flash.h.

#define EEFC_FMR_FWS ( value ) (EEFC_FMR_FWS_MASK & ((value) << EEFC_FMR_FWS_SHIFT))

Defines for bit fields in EEFC_FMR register.

Ready Interrupt Enable

Definition at line 86 of file sam3_flash.h.

#define EEFC_FMR_FWS_SHIFT 8

Defines for bit fields in EEFC_FMR register.

Ready Interrupt Enable

Definition at line 84 of file sam3_flash.h.

#define EEFC_FMR_OFF 0x0

EFC register offsets.

Flash Mode Register

Definition at line 54 of file sam3_flash.h.

#define EEFC_FSR_FRDY 0

Defines for bit fields in EEFC_FSR register.

Flash Ready Status

Definition at line 108 of file sam3_flash.h.


BeRTOS: sam3_flash.h Source File

  • cpu
  • cortex-m3
  • io
sam3_flash.h
Go to the documentation of this file.
00001
00036 #ifndef SAM3_FLASH_H
00037 #define SAM3_FLASH_H
00038
00042 /*\{*/
00043 #define EEFC0_BASE  0x400E0A00
00044 #ifdef CPU_CM3_SAM3X
00045     #define EEFC1_BASE  0x400E0C00
00046 #endif
00047 /*\}*/
00048
00049
00053 /*\{*/
00054 #define EEFC_FMR_OFF  0x0   ///< Flash Mode Register
00055 #define EEFC_FCR_OFF  0x4   ///< Flash Command Register
00056 #define EEFC_FSR_OFF  0x8   ///< Flash Status Register
00057 #define EEFC_FRR_OFF  0xC   ///< Flash Result Register
00058 /*\}*/
00059
00063 /*\{*/
00064 #define EEFC0_FMR  (*((reg32_t *)(EEFC0_BASE + EEFC_FMR_OFF)))  ///< Flash Mode Register
00065 #define EEFC0_FCR  (*((reg32_t *)(EEFC0_BASE + EEFC_FCR_OFF)))  ///< Flash Command Register
00066 #define EEFC0_FSR  (*((reg32_t *)(EEFC0_BASE + EEFC_FSR_OFF)))  ///< Flash Status Register
00067 #define EEFC0_FRR  (*((reg32_t *)(EEFC0_BASE + EEFC_FRR_OFF)))  ///< Flash Result Register
00068
00069 #ifdef CPU_CM3_SAM3X
00070     #define EEFC1_FMR  (*((reg32_t *)(EEFC1_BASE + EEFC_FMR_OFF)))  ///< Flash Mode Register
00071     #define EEFC1_FCR  (*((reg32_t *)(EEFC1_BASE + EEFC_FCR_OFF)))  ///< Flash Command Register
00072     #define EEFC1_FSR  (*((reg32_t *)(EEFC1_BASE + EEFC_FSR_OFF)))  ///< Flash Status Register
00073     #define EEFC1_FRR  (*((reg32_t *)(EEFC1_BASE + EEFC_FRR_OFF)))  ///< Flash Result Register
00074 #endif
00075 /*\}*/
00076
00077
00078
00082 /*\{*/
00083 #define EEFC_FMR_FRDY        0                       ///< Ready Interrupt Enable
00084 #define EEFC_FMR_FWS_SHIFT   8
00085 #define EEFC_FMR_FWS_MASK    (0xf << EEFC_FMR_FWS_SHIFT) ///< Flash Wait State
00086 #define EEFC_FMR_FWS(value)  (EEFC_FMR_FWS_MASK & ((value) << EEFC_FMR_FWS_SHIFT))
00087 #define EEFC_FMR_FAM         24                      ///< Flash Access Mode
00088 /*\}*/
00089
00093 /*\{*/
00094 #define EEFC_FCR_FCMD_MASK    0xff                        ///< Flash Command
00095 #define EEFC_FCR_FCMD(value)  (EEFC_FCR_FCMD_MASK & (value))
00096 #define EEFC_FCR_FARG_SHIFT   8
00097 #define EEFC_FCR_FARG_MASK    (0xffff << EEFC_FCR_FARG_SHIFT) ///< Flash Command Argument
00098 #define EEFC_FCR_FARG(value)  (EEFC_FCR_FARG_MASK & ((value) << EEFC_FCR_FARG_SHIFT))
00099 #define EEFC_FCR_FKEY_SHIFT   24
00100 #define EEFC_FCR_FKEY_MASK    (0xff << EEFC_FCR_FKEY_SHIFT)   ///< Flash Writing Protection Key
00101 #define EEFC_FCR_FKEY(value)  (EEFC_FCR_FKEY_MASK & ((value) << EEFC_FCR_FKEY_SHIFT))
00102 /*\}*/
00103
00107 /*\{*/
00108 #define EEFC_FSR_FRDY       0  ///< Flash Ready Status
00109 #define EEFC_FSR_FCMDE      1  ///< Flash Command Error Status
00110 #define EEFC_FSR_FLOCKE     2  ///< Flash Lock Error Status
00111 /*\}*/
00112
00113 #endif /* SAM3_FLASH_H */


BeRTOS: sam3_ints.h File Reference

  • cpu
  • cortex-m3
  • io
sam3_ints.h File Reference

SAM3 interrupt definitions. More...

Go to the source code of this file.

Defines

#define | FAULT_NMI 2
Defines for the fault assignments.
#define | FAULT_HARD 3
Hard fault.
#define | FAULT_MPU 4
MPU fault.
#define | FAULT_BUS 5
Bus fault.
#define | FAULT_USAGE 6
Usage fault.
#define | FAULT_SVCALL 11
SVCall.
#define | FAULT_DEBUG 12
Debug monitor.
#define | FAULT_PENDSV 14
PendSV.
#define | FAULT_SYSTICK 15
System Tick.
#define | INT_PERIPH_BASE 16
Defines for the interrupt assignments.

Detailed Description

SAM3 interrupt definitions.

Definition in file sam3_ints.h.

Define Documentation

#define FAULT_NMI 2

Defines for the fault assignments.

NMI fault

Definition at line 43 of file sam3_ints.h.


BeRTOS: sam3_ints.h Source File

  • cpu
  • cortex-m3
  • io
sam3_ints.h
Go to the documentation of this file.
00001
00036 #ifndef SAM3_INTS_H
00037 #define SAM3_INTS_H
00038
00042 /*\{*/
00043 #define FAULT_NMI               2           ///< NMI fault
00044 #define FAULT_HARD              3           ///< Hard fault
00045 #define FAULT_MPU               4           ///< MPU fault
00046 #define FAULT_BUS               5           ///< Bus fault
00047 #define FAULT_USAGE             6           ///< Usage fault
00048 #define FAULT_SVCALL            11          ///< SVCall
00049 #define FAULT_DEBUG             12          ///< Debug monitor
00050 #define FAULT_PENDSV            14          ///< PendSV
00051 #define FAULT_SYSTICK           15          ///< System Tick
00052 /*\}*/
00053
00057 /*\{*/
00058 #define INT_PERIPH_BASE  16
00059
00060 #if CPU_CM3_SAM3N
00061     #define INT_SUPC        (INT_PERIPH_BASE + SUPC_ID)
00062     #define INT_RSTC        (INT_PERIPH_BASE + RSTC_ID)
00063     #define INT_RTC         (INT_PERIPH_BASE + RTC_ID)
00064     #define INT_RTT         (INT_PERIPH_BASE + RTT_ID)
00065     #define INT_WDT         (INT_PERIPH_BASE + WDT_ID)
00066     #define INT_PMC         (INT_PERIPH_BASE + PMC_ID)
00067     #define INT_EFC         (INT_PERIPH_BASE + EFC_ID)
00068     #define INT_UART0       (INT_PERIPH_BASE + UART0_ID)
00069     #define INT_UART1       (INT_PERIPH_BASE + UART1_ID)
00070     #define INT_PIOA        (INT_PERIPH_BASE + PIOA_ID)
00071     #define INT_PIOB        (INT_PERIPH_BASE + PIOB_ID)
00072     #define INT_PIOC        (INT_PERIPH_BASE + PIOC_ID)
00073     #define INT_US0         (INT_PERIPH_BASE + US0_ID)
00074     #define INT_US1         (INT_PERIPH_BASE + US1_ID)
00075     #define INT_TWI0        (INT_PERIPH_BASE + TWI0_ID)
00076     #define INT_TWI1        (INT_PERIPH_BASE + TWI1_ID)
00077     #define INT_SPI0        (INT_PERIPH_BASE + SPI0_ID)
00078     #define INT_TC0         (INT_PERIPH_BASE + TC0_ID)
00079     #define INT_TC1         (INT_PERIPH_BASE + TC1_ID)
00080     #define INT_TC2         (INT_PERIPH_BASE + TC2_ID)
00081     #define INT_TC3         (INT_PERIPH_BASE + TC3_ID)
00082     #define INT_TC4         (INT_PERIPH_BASE + TC4_ID)
00083     #define INT_TC5         (INT_PERIPH_BASE + TC5_ID)
00084     #define INT_ADC         (INT_PERIPH_BASE + ADC_ID)
00085     #define INT_DACC        (INT_PERIPH_BASE + DACC_ID)
00086     #define INT_PWM         (INT_PERIPH_BASE + PWM_ID)
00087
00088     // Total number of interrupts.
00089     #define NUM_INTERRUPTS  48
00090
00091 #elif CPU_CM3_SAM3X
00092     #define INT_SUPC        (INT_PERIPH_BASE + SUPC_ID)
00093     #define INT_RSTC        (INT_PERIPH_BASE + RSTC_ID)
00094     #define INT_RTC         (INT_PERIPH_BASE + RTC_ID)
00095     #define INT_RTT         (INT_PERIPH_BASE + RTT_ID)
00096     #define INT_WDT         (INT_PERIPH_BASE + WDT_ID)
00097     #define INT_PMC         (INT_PERIPH_BASE + PMC_ID)
00098     #define INT_EEFC0       (INT_PERIPH_BASE + EEFC0_ID)
00099     #define INT_EEFC1       (INT_PERIPH_BASE + EEFC1_ID)
00100     #define INT_UART0       (INT_PERIPH_BASE + UART0_ID)
00101     #define INT_SMC_SDRAMC  (INT_PERIPH_BASE + SMC_SDRAMC_ID)
00102     #define INT_SDRAMC      (INT_PERIPH_BASE + SDRAMC_ID)
00103     #define INT_PIOA        (INT_PERIPH_BASE + PIOA_ID)
00104     #define INT_PIOB        (INT_PERIPH_BASE + PIOB_ID)
00105     #define INT_PIOC        (INT_PERIPH_BASE + PIOC_ID)
00106     #define INT_PIOD        (INT_PERIPH_BASE + PIOD_ID)
00107     #define INT_PIOE        (INT_PERIPH_BASE + PIOE_ID)
00108     #define INT_PIOF        (INT_PERIPH_BASE + PIOF_ID)
00109     #define INT_US0         (INT_PERIPH_BASE + US0_ID)
00110     #define INT_US1         (INT_PERIPH_BASE + US1_ID)
00111     #define INT_US2         (INT_PERIPH_BASE + US2_ID)
00112     #define INT_US3         (INT_PERIPH_BASE + US3_ID)
00113     #define INT_HSMCI       (INT_PERIPH_BASE + HSMCI_ID)
00114     #define INT_TWI0        (INT_PERIPH_BASE + TWI0_ID)
00115     #define INT_TWI1        (INT_PERIPH_BASE + TWI1_ID)
00116     #define INT_SPI0        (INT_PERIPH_BASE + SPI0_ID)
00117     #define INT_SPI1        (INT_PERIPH_BASE + SPI1_ID)
00118     #define INT_SSC         (INT_PERIPH_BASE + SSC_ID)
00119     #define INT_TC0         (INT_PERIPH_BASE + TC0_ID)
00120     #define INT_TC1         (INT_PERIPH_BASE + TC1_ID)
00121     #define INT_TC2         (INT_PERIPH_BASE + TC2_ID)
00122     #define INT_TC3         (INT_PERIPH_BASE + TC3_ID)
00123     #define INT_TC4         (INT_PERIPH_BASE + TC4_ID)
00124     #define INT_TC5         (INT_PERIPH_BASE + TC5_ID)
00125     #define INT_TC6         (INT_PERIPH_BASE + TC6_ID)
00126     #define INT_TC7         (INT_PERIPH_BASE + TC7_ID)
00127     #define INT_TC8         (INT_PERIPH_BASE + TC8_ID)
00128     #define INT_PWM         (INT_PERIPH_BASE + PWM_ID)
00129     #define INT_ADC         (INT_PERIPH_BASE + ADC_ID)
00130     #define INT_DACC        (INT_PERIPH_BASE + DACC_ID)
00131     #define INT_DMAC        (INT_PERIPH_BASE + DMAC_ID)
00132     #define INT_UOTGHS      (INT_PERIPH_BASE + UOTGHS_ID)
00133     #define INT_TRNG        (INT_PERIPH_BASE + TRNG_ID)
00134     #define INT_EMAC        (INT_PERIPH_BASE + EMAC_ID)
00135     #define INT_CAN0        (INT_PERIPH_BASE + CAN0_ID)
00136     #define INT_CAN1        (INT_PERIPH_BASE + CAN1_ID)
00137
00138     // Total number of interrupts.
00139     #define NUM_INTERRUPTS  61
00140
00141 #else
00142     #error Peripheral IDs undefined
00143 #endif
00144 /*\}*/
00145
00146 #endif /* SAM3_INTS_H */


BeRTOS: sam3_nvic.h File Reference

  • cpu
  • cortex-m3
  • io
sam3_nvic.h File Reference

Atmel SAM3 NVIC hardware. More...

Go to the source code of this file.

Defines

#define | FAULT_NMI 2
The following are defines for the fault assignments.
#define | FAULT_HARD 3
Hard fault.
#define | FAULT_MPU 4
MPU fault.
#define | FAULT_BUS 5
Bus fault.
#define | FAULT_USAGE 6
Usage fault.
#define | FAULT_SVCALL 11
SVCall.
#define | FAULT_DEBUG 12
Debug monitor.
#define | FAULT_PENDSV 14
PendSV.
#define | FAULT_SYSTICK 15
System Tick.
#define | NVIC_INT_TYPE_R (*((reg32_t *)0xE000E004))
NVIC registers (NVIC)
#define | NVIC_ST_CTRL_R (*((reg32_t *)0xE000E010))
NVIC registers (NVIC)
#define | NVIC_ST_RELOAD_R (*((reg32_t *)0xE000E014))
NVIC registers (NVIC)
#define | NVIC_ST_CURRENT_R (*((reg32_t *)0xE000E018))
NVIC registers (NVIC)
#define | NVIC_ST_CAL_R (*((reg32_t *)0xE000E01C))
NVIC registers (NVIC)
#define | NVIC_EN0_R (*((reg32_t *)0xE000E100))
NVIC registers (NVIC)
#define | NVIC_EN1_R (*((reg32_t *)0xE000E104))
NVIC registers (NVIC)
#define | NVIC_DIS0_R (*((reg32_t *)0xE000E180))
NVIC registers (NVIC)
#define | NVIC_DIS1_R (*((reg32_t *)0xE000E184))
NVIC registers (NVIC)
#define | NVIC_PEND0_R (*((reg32_t *)0xE000E200))
NVIC registers (NVIC)
#define | NVIC_PEND1_R (*((reg32_t *)0xE000E204))
NVIC registers (NVIC)
#define | NVIC_UNPEND0_R (*((reg32_t *)0xE000E280))
NVIC registers (NVIC)
#define | NVIC_UNPEND1_R (*((reg32_t *)0xE000E284))
NVIC registers (NVIC)
#define | NVIC_ACTIVE0_R (*((reg32_t *)0xE000E300))
NVIC registers (NVIC)
#define | NVIC_ACTIVE1_R (*((reg32_t *)0xE000E304))
NVIC registers (NVIC)
#define | NVIC_PRI0_R (*((reg32_t *)0xE000E400))
NVIC registers (NVIC)
#define | NVIC_PRI1_R (*((reg32_t *)0xE000E404))
NVIC registers (NVIC)
#define | NVIC_PRI2_R (*((reg32_t *)0xE000E408))
NVIC registers (NVIC)
#define | NVIC_PRI3_R (*((reg32_t *)0xE000E40C))
NVIC registers (NVIC)
#define | NVIC_PRI4_R (*((reg32_t *)0xE000E410))
NVIC registers (NVIC)
#define | NVIC_PRI5_R (*((reg32_t *)0xE000E414))
NVIC registers (NVIC)
#define | NVIC_PRI6_R (*((reg32_t *)0xE000E418))
NVIC registers (NVIC)
#define | NVIC_PRI7_R (*((reg32_t *)0xE000E41C))
NVIC registers (NVIC)
#define | NVIC_PRI8_R (*((reg32_t *)0xE000E420))
NVIC registers (NVIC)
#define | NVIC_PRI9_R (*((reg32_t *)0xE000E424))
NVIC registers (NVIC)
#define | NVIC_PRI10_R (*((reg32_t *)0xE000E428))
NVIC registers (NVIC)
#define | NVIC_CPUID_R (*((reg32_t *)0xE000ED00))
NVIC registers (NVIC)
#define | NVIC_INT_CTRL_R (*((reg32_t *)0xE000ED04))
NVIC registers (NVIC)
#define | NVIC_VTABLE_R (*((reg32_t *)0xE000ED08))
NVIC registers (NVIC)
#define | NVIC_APINT_R (*((reg32_t *)0xE000ED0C))
NVIC registers (NVIC)
#define | NVIC_SYS_CTRL_R (*((reg32_t *)0xE000ED10))
NVIC registers (NVIC)
#define | NVIC_CFG_CTRL_R (*((reg32_t *)0xE000ED14))
NVIC registers (NVIC)
#define | NVIC_SYS_PRI1_R (*((reg32_t *)0xE000ED18))
NVIC registers (NVIC)
#define | NVIC_SYS_PRI2_R (*((reg32_t *)0xE000ED1C))
NVIC registers (NVIC)
#define | NVIC_SYS_PRI3_R (*((reg32_t *)0xE000ED20))
NVIC registers (NVIC)
#define | NVIC_SYS_HND_CTRL_R (*((reg32_t *)0xE000ED24))
NVIC registers (NVIC)
#define | NVIC_FAULT_STAT_R (*((reg32_t *)0xE000ED28))
NVIC registers (NVIC)
#define | NVIC_HFAULT_STAT_R (*((reg32_t *)0xE000ED2C))
NVIC registers (NVIC)
#define | NVIC_DEBUG_STAT_R (*((reg32_t *)0xE000ED30))
NVIC registers (NVIC)
#define | NVIC_MM_ADDR_R (*((reg32_t *)0xE000ED34))
NVIC registers (NVIC)
#define | NVIC_FAULT_ADDR_R (*((reg32_t *)0xE000ED38))
NVIC registers (NVIC)
#define | NVIC_MPU_TYPE_R (*((reg32_t *)0xE000ED90))
NVIC registers (NVIC)
#define | NVIC_MPU_CTRL_R (*((reg32_t *)0xE000ED94))
NVIC registers (NVIC)
#define | NVIC_MPU_NUMBER_R (*((reg32_t *)0xE000ED98))
NVIC registers (NVIC)
#define | NVIC_MPU_BASE_R (*((reg32_t *)0xE000ED9C))
NVIC registers (NVIC)
#define | NVIC_MPU_ATTR_R (*((reg32_t *)0xE000EDA0))
NVIC registers (NVIC)
#define | NVIC_DBG_CTRL_R (*((reg32_t *)0xE000EDF0))
NVIC registers (NVIC)
#define | NVIC_DBG_XFER_R (*((reg32_t *)0xE000EDF4))
NVIC registers (NVIC)
#define | NVIC_DBG_DATA_R (*((reg32_t *)0xE000EDF8))
NVIC registers (NVIC)
#define | NVIC_DBG_INT_R (*((reg32_t *)0xE000EDFC))
NVIC registers (NVIC)
#define | NVIC_SW_TRIG_R (*((reg32_t *)0xE000EF00))
NVIC registers (NVIC)
#define | NVIC_INT_TYPE 0xE000E004
The following are defines for the NVIC register addresses.
#define | NVIC_ST_CTRL 0xE000E010
SysTick Control and Status Reg.
#define | NVIC_ST_RELOAD 0xE000E014
SysTick Reload Value Register.
#define | NVIC_ST_CURRENT 0xE000E018
SysTick Current Value Register.
#define | NVIC_ST_CAL 0xE000E01C
SysTick Calibration Value Reg.
#define | NVIC_EN0 0xE000E100
IRQ 0 to 31 Set Enable Register.
#define | NVIC_EN1 0xE000E104
IRQ 32 to 63 Set Enable Register.
#define | NVIC_DIS0 0xE000E180
IRQ 0 to 31 Clear Enable Reg.
#define | NVIC_DIS1 0xE000E184
IRQ 32 to 63 Clear Enable Reg.
#define | NVIC_PEND0 0xE000E200
IRQ 0 to 31 Set Pending Register.
#define | NVIC_PEND1 0xE000E204
IRQ 32 to 63 Set Pending Reg.
#define | NVIC_UNPEND0 0xE000E280
IRQ 0 to 31 Clear Pending Reg.
#define | NVIC_UNPEND1 0xE000E284
IRQ 32 to 63 Clear Pending Reg.
#define | NVIC_ACTIVE0 0xE000E300
IRQ 0 to 31 Active Register.
#define | NVIC_ACTIVE1 0xE000E304
IRQ 32 to 63 Active Register.
#define | NVIC_PRI0 0xE000E400
IRQ 0 to 3 Priority Register.
#define | NVIC_PRI1 0xE000E404
IRQ 4 to 7 Priority Register.
#define | NVIC_PRI2 0xE000E408
IRQ 8 to 11 Priority Register.
#define | NVIC_PRI3 0xE000E40C
IRQ 12 to 15 Priority Register.
#define | NVIC_PRI4 0xE000E410
IRQ 16 to 19 Priority Register.
#define | NVIC_PRI5 0xE000E414
IRQ 20 to 23 Priority Register.
#define | NVIC_PRI6 0xE000E418
IRQ 24 to 27 Priority Register.
#define | NVIC_PRI7 0xE000E41C
IRQ 28 to 31 Priority Register.
#define | NVIC_PRI8 0xE000E420
IRQ 32 to 35 Priority Register.
#define | NVIC_PRI9 0xE000E424
IRQ 36 to 39 Priority Register.
#define | NVIC_PRI10 0xE000E428
IRQ 40 to 43 Priority Register.
#define | NVIC_PRI11 0xE000E42C
IRQ 44 to 47 Priority Register.
#define | NVIC_PRI12 0xE000E430
IRQ 48 to 51 Priority Register.
#define | NVIC_PRI13 0xE000E434
IRQ 52 to 55 Priority Register.
#define | NVIC_CPUID 0xE000ED00
CPUID Base Register.
#define | NVIC_INT_CTRL 0xE000ED04
Interrupt Control State Register.
#define | NVIC_VTABLE 0xE000ED08
Vector Table Offset Register.
#define | NVIC_APINT 0xE000ED0C
App. Int & Reset Control Reg.
#define | NVIC_SYS_CTRL 0xE000ED10
System Control Register.
#define | NVIC_CFG_CTRL 0xE000ED14
Configuration Control Register.
#define | NVIC_SYS_PRI1 0xE000ED18
Sys. Handlers 4 to 7 Priority.
#define | NVIC_SYS_PRI2 0xE000ED1C
Sys. Handlers 8 to 11 Priority.
#define | NVIC_SYS_PRI3 0xE000ED20
Sys. Handlers 12 to 15 Priority.
#define | NVIC_SYS_HND_CTRL 0xE000ED24
System Handler Control and State.
#define | NVIC_FAULT_STAT 0xE000ED28
Configurable Fault Status Reg.
#define | NVIC_HFAULT_STAT 0xE000ED2C
Hard Fault Status Register.
#define | NVIC_DEBUG_STAT 0xE000ED30
Debug Status Register.
#define | NVIC_MM_ADDR 0xE000ED34
Mem Manage Address Register.
#define | NVIC_FAULT_ADDR 0xE000ED38
Bus Fault Address Register.
#define | NVIC_MPU_TYPE 0xE000ED90
MPU Type Register.
#define | NVIC_MPU_CTRL 0xE000ED94
MPU Control Register.
#define | NVIC_MPU_NUMBER 0xE000ED98
MPU Region Number Register.
#define | NVIC_MPU_BASE 0xE000ED9C
MPU Region Base Address Register.
#define | NVIC_MPU_ATTR 0xE000EDA0
MPU Region Attribute & Size Reg.
#define | NVIC_DBG_CTRL 0xE000EDF0
Debug Control and Status Reg.
#define | NVIC_DBG_XFER 0xE000EDF4
Debug Core Reg. Transfer Select.
#define | NVIC_DBG_DATA 0xE000EDF8
Debug Core Register Data.
#define | NVIC_DBG_INT 0xE000EDFC
Debug Reset Interrupt Control.
#define | NVIC_SW_TRIG 0xE000EF00
Software Trigger Interrupt Reg.
#define | NVIC_INT_TYPE_LINES_M 0x0000001F
The following are defines for the bit fields in the NVIC_INT_TYPE register.
#define | NVIC_INT_TYPE_LINES_S 0
The following are defines for the bit fields in the NVIC_INT_TYPE register.
#define | NVIC_ST_CTRL_COUNT 0x00010000
The following are defines for the bit fields in the NVIC_ST_CTRL register.
#define | NVIC_ST_CTRL_CLK_SRC 0x00000004
Clock Source.
#define | NVIC_ST_CTRL_INTEN 0x00000002
Interrupt enable.
#define | NVIC_ST_CTRL_ENABLE 0x00000001
Counter mode.
#define | NVIC_ST_RELOAD_M 0x00FFFFFF
The following are defines for the bit fields in the NVIC_ST_RELOAD register.
#define | NVIC_ST_RELOAD_S 0
The following are defines for the bit fields in the NVIC_ST_RELOAD register.
#define | NVIC_ST_CURRENT_M 0x00FFFFFF
The following are defines for the bit fields in the NVIC_ST_CURRENT register.
#define | NVIC_ST_CURRENT_S 0
The following are defines for the bit fields in the NVIC_ST_CURRENT register.
#define | NVIC_ST_CAL_NOREF 0x80000000
The following are defines for the bit fields in the NVIC_ST_CAL register.
#define | NVIC_ST_CAL_SKEW 0x40000000
Clock skew.
#define | NVIC_ST_CAL_ONEMS_M 0x00FFFFFF
1ms reference value
#define | NVIC_ST_CAL_ONEMS_S 0
The following are defines for the bit fields in the NVIC_ST_CAL register.
#define | NVIC_EN0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_EN0 register.
#define | NVIC_EN0_INT30 0x40000000
Interrupt 30 enable.
#define | NVIC_EN0_INT29 0x20000000
Interrupt 29 enable.
#define | NVIC_EN0_INT28 0x10000000
Interrupt 28 enable.
#define | NVIC_EN0_INT27 0x08000000
Interrupt 27 enable.
#define | NVIC_EN0_INT26 0x04000000
Interrupt 26 enable.
#define | NVIC_EN0_INT25 0x02000000
Interrupt 25 enable.
#define | NVIC_EN0_INT24 0x01000000
Interrupt 24 enable.
#define | NVIC_EN0_INT23 0x00800000
Interrupt 23 enable.
#define | NVIC_EN0_INT22 0x00400000
Interrupt 22 enable.
#define | NVIC_EN0_INT21 0x00200000
Interrupt 21 enable.
#define | NVIC_EN0_INT20 0x00100000
Interrupt 20 enable.
#define | NVIC_EN0_INT19 0x00080000
Interrupt 19 enable.
#define | NVIC_EN0_INT18 0x00040000
Interrupt 18 enable.
#define | NVIC_EN0_INT17 0x00020000
Interrupt 17 enable.
#define | NVIC_EN0_INT16 0x00010000
Interrupt 16 enable.
#define | NVIC_EN0_INT15 0x00008000
Interrupt 15 enable.
#define | NVIC_EN0_INT14 0x00004000
Interrupt 14 enable.
#define | NVIC_EN0_INT13 0x00002000
Interrupt 13 enable.
#define | NVIC_EN0_INT12 0x00001000
Interrupt 12 enable.
#define | NVIC_EN0_INT11 0x00000800
Interrupt 11 enable.
#define | NVIC_EN0_INT10 0x00000400
Interrupt 10 enable.
#define | NVIC_EN0_INT9 0x00000200
Interrupt 9 enable.
#define | NVIC_EN0_INT8 0x00000100
Interrupt 8 enable.
#define | NVIC_EN0_INT7 0x00000080
Interrupt 7 enable.
#define | NVIC_EN0_INT6 0x00000040
Interrupt 6 enable.
#define | NVIC_EN0_INT5 0x00000020
Interrupt 5 enable.
#define | NVIC_EN0_INT4 0x00000010
Interrupt 4 enable.
#define | NVIC_EN0_INT3 0x00000008
Interrupt 3 enable.
#define | NVIC_EN0_INT2 0x00000004
Interrupt 2 enable.
#define | NVIC_EN0_INT1 0x00000002
Interrupt 1 enable.
#define | NVIC_EN0_INT0 0x00000001
Interrupt 0 enable.
#define | NVIC_EN1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_EN1 register.
#define | NVIC_EN1_INT58 0x04000000
Interrupt 58 enable.
#define | NVIC_EN1_INT57 0x02000000
Interrupt 57 enable.
#define | NVIC_EN1_INT56 0x01000000
Interrupt 56 enable.
#define | NVIC_EN1_INT55 0x00800000
Interrupt 55 enable.
#define | NVIC_EN1_INT54 0x00400000
Interrupt 54 enable.
#define | NVIC_EN1_INT53 0x00200000
Interrupt 53 enable.
#define | NVIC_EN1_INT52 0x00100000
Interrupt 52 enable.
#define | NVIC_EN1_INT51 0x00080000
Interrupt 51 enable.
#define | NVIC_EN1_INT50 0x00040000
Interrupt 50 enable.
#define | NVIC_EN1_INT49 0x00020000
Interrupt 49 enable.
#define | NVIC_EN1_INT48 0x00010000
Interrupt 48 enable.
#define | NVIC_EN1_INT47 0x00008000
Interrupt 47 enable.
#define | NVIC_EN1_INT46 0x00004000
Interrupt 46 enable.
#define | NVIC_EN1_INT45 0x00002000
Interrupt 45 enable.
#define | NVIC_EN1_INT44 0x00001000
Interrupt 44 enable.
#define | NVIC_EN1_INT43 0x00000800
Interrupt 43 enable.
#define | NVIC_EN1_INT42 0x00000400
Interrupt 42 enable.
#define | NVIC_EN1_INT41 0x00000200
Interrupt 41 enable.
#define | NVIC_EN1_INT40 0x00000100
Interrupt 40 enable.
#define | NVIC_EN1_INT39 0x00000080
Interrupt 39 enable.
#define | NVIC_EN1_INT38 0x00000040
Interrupt 38 enable.
#define | NVIC_EN1_INT37 0x00000020
Interrupt 37 enable.
#define | NVIC_EN1_INT36 0x00000010
Interrupt 36 enable.
#define | NVIC_EN1_INT35 0x00000008
Interrupt 35 enable.
#define | NVIC_EN1_INT34 0x00000004
Interrupt 34 enable.
#define | NVIC_EN1_INT33 0x00000002
Interrupt 33 enable.
#define | NVIC_EN1_INT32 0x00000001
Interrupt 32 enable.
#define | NVIC_DIS0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_DIS0 register.
#define | NVIC_DIS0_INT30 0x40000000
Interrupt 30 disable.
#define | NVIC_DIS0_INT29 0x20000000
Interrupt 29 disable.
#define | NVIC_DIS0_INT28 0x10000000
Interrupt 28 disable.
#define | NVIC_DIS0_INT27 0x08000000
Interrupt 27 disable.
#define | NVIC_DIS0_INT26 0x04000000
Interrupt 26 disable.
#define | NVIC_DIS0_INT25 0x02000000
Interrupt 25 disable.
#define | NVIC_DIS0_INT24 0x01000000
Interrupt 24 disable.
#define | NVIC_DIS0_INT23 0x00800000
Interrupt 23 disable.
#define | NVIC_DIS0_INT22 0x00400000
Interrupt 22 disable.
#define | NVIC_DIS0_INT21 0x00200000
Interrupt 21 disable.
#define | NVIC_DIS0_INT20 0x00100000
Interrupt 20 disable.
#define | NVIC_DIS0_INT19 0x00080000
Interrupt 19 disable.
#define | NVIC_DIS0_INT18 0x00040000
Interrupt 18 disable.
#define | NVIC_DIS0_INT17 0x00020000
Interrupt 17 disable.
#define | NVIC_DIS0_INT16 0x00010000
Interrupt 16 disable.
#define | NVIC_DIS0_INT15 0x00008000
Interrupt 15 disable.
#define | NVIC_DIS0_INT14 0x00004000
Interrupt 14 disable.
#define | NVIC_DIS0_INT13 0x00002000
Interrupt 13 disable.
#define | NVIC_DIS0_INT12 0x00001000
Interrupt 12 disable.
#define | NVIC_DIS0_INT11 0x00000800
Interrupt 11 disable.
#define | NVIC_DIS0_INT10 0x00000400
Interrupt 10 disable.
#define | NVIC_DIS0_INT9 0x00000200
Interrupt 9 disable.
#define | NVIC_DIS0_INT8 0x00000100
Interrupt 8 disable.
#define | NVIC_DIS0_INT7 0x00000080
Interrupt 7 disable.
#define | NVIC_DIS0_INT6 0x00000040
Interrupt 6 disable.
#define | NVIC_DIS0_INT5 0x00000020
Interrupt 5 disable.
#define | NVIC_DIS0_INT4 0x00000010
Interrupt 4 disable.
#define | NVIC_DIS0_INT3 0x00000008
Interrupt 3 disable.
#define | NVIC_DIS0_INT2 0x00000004
Interrupt 2 disable.
#define | NVIC_DIS0_INT1 0x00000002
Interrupt 1 disable.
#define | NVIC_DIS0_INT0 0x00000001
Interrupt 0 disable.
#define | NVIC_DIS1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_DIS1 register.
#define | NVIC_DIS1_INT58 0x04000000
Interrupt 58 disable.
#define | NVIC_DIS1_INT57 0x02000000
Interrupt 57 disable.
#define | NVIC_DIS1_INT56 0x01000000
Interrupt 56 disable.
#define | NVIC_DIS1_INT55 0x00800000
Interrupt 55 disable.
#define | NVIC_DIS1_INT54 0x00400000
Interrupt 54 disable.
#define | NVIC_DIS1_INT53 0x00200000
Interrupt 53 disable.
#define | NVIC_DIS1_INT52 0x00100000
Interrupt 52 disable.
#define | NVIC_DIS1_INT51 0x00080000
Interrupt 51 disable.
#define | NVIC_DIS1_INT50 0x00040000
Interrupt 50 disable.
#define | NVIC_DIS1_INT49 0x00020000
Interrupt 49 disable.
#define | NVIC_DIS1_INT48 0x00010000
Interrupt 48 disable.
#define | NVIC_DIS1_INT47 0x00008000
Interrupt 47 disable.
#define | NVIC_DIS1_INT46 0x00004000
Interrupt 46 disable.
#define | NVIC_DIS1_INT45 0x00002000
Interrupt 45 disable.
#define | NVIC_DIS1_INT44 0x00001000
Interrupt 44 disable.
#define | NVIC_DIS1_INT43 0x00000800
Interrupt 43 disable.
#define | NVIC_DIS1_INT42 0x00000400
Interrupt 42 disable.
#define | NVIC_DIS1_INT41 0x00000200
Interrupt 41 disable.
#define | NVIC_DIS1_INT40 0x00000100
Interrupt 40 disable.
#define | NVIC_DIS1_INT39 0x00000080
Interrupt 39 disable.
#define | NVIC_DIS1_INT38 0x00000040
Interrupt 38 disable.
#define | NVIC_DIS1_INT37 0x00000020
Interrupt 37 disable.
#define | NVIC_DIS1_INT36 0x00000010
Interrupt 36 disable.
#define | NVIC_DIS1_INT35 0x00000008
Interrupt 35 disable.
#define | NVIC_DIS1_INT34 0x00000004
Interrupt 34 disable.
#define | NVIC_DIS1_INT33 0x00000002
Interrupt 33 disable.
#define | NVIC_DIS1_INT32 0x00000001
Interrupt 32 disable.
#define | NVIC_PEND0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_PEND0 register.
#define | NVIC_PEND0_INT30 0x40000000
Interrupt 30 pend.
#define | NVIC_PEND0_INT29 0x20000000
Interrupt 29 pend.
#define | NVIC_PEND0_INT28 0x10000000
Interrupt 28 pend.
#define | NVIC_PEND0_INT27 0x08000000
Interrupt 27 pend.
#define | NVIC_PEND0_INT26 0x04000000
Interrupt 26 pend.
#define | NVIC_PEND0_INT25 0x02000000
Interrupt 25 pend.
#define | NVIC_PEND0_INT24 0x01000000
Interrupt 24 pend.
#define | NVIC_PEND0_INT23 0x00800000
Interrupt 23 pend.
#define | NVIC_PEND0_INT22 0x00400000
Interrupt 22 pend.
#define | NVIC_PEND0_INT21 0x00200000
Interrupt 21 pend.
#define | NVIC_PEND0_INT20 0x00100000
Interrupt 20 pend.
#define | NVIC_PEND0_INT19 0x00080000
Interrupt 19 pend.
#define | NVIC_PEND0_INT18 0x00040000
Interrupt 18 pend.
#define | NVIC_PEND0_INT17 0x00020000
Interrupt 17 pend.
#define | NVIC_PEND0_INT16 0x00010000
Interrupt 16 pend.
#define | NVIC_PEND0_INT15 0x00008000
Interrupt 15 pend.
#define | NVIC_PEND0_INT14 0x00004000
Interrupt 14 pend.
#define | NVIC_PEND0_INT13 0x00002000
Interrupt 13 pend.
#define | NVIC_PEND0_INT12 0x00001000
Interrupt 12 pend.
#define | NVIC_PEND0_INT11 0x00000800
Interrupt 11 pend.
#define | NVIC_PEND0_INT10 0x00000400
Interrupt 10 pend.
#define | NVIC_PEND0_INT9 0x00000200
Interrupt 9 pend.
#define | NVIC_PEND0_INT8 0x00000100
Interrupt 8 pend.
#define | NVIC_PEND0_INT7 0x00000080
Interrupt 7 pend.
#define | NVIC_PEND0_INT6 0x00000040
Interrupt 6 pend.
#define | NVIC_PEND0_INT5 0x00000020
Interrupt 5 pend.
#define | NVIC_PEND0_INT4 0x00000010
Interrupt 4 pend.
#define | NVIC_PEND0_INT3 0x00000008
Interrupt 3 pend.
#define | NVIC_PEND0_INT2 0x00000004
Interrupt 2 pend.
#define | NVIC_PEND0_INT1 0x00000002
Interrupt 1 pend.
#define | NVIC_PEND0_INT0 0x00000001
Interrupt 0 pend.
#define | NVIC_PEND1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_PEND1 register.
#define | NVIC_PEND1_INT58 0x04000000
Interrupt 58 pend.
#define | NVIC_PEND1_INT57 0x02000000
Interrupt 57 pend.
#define | NVIC_PEND1_INT56 0x01000000
Interrupt 56 pend.
#define | NVIC_PEND1_INT55 0x00800000
Interrupt 55 pend.
#define | NVIC_PEND1_INT54 0x00400000
Interrupt 54 pend.
#define | NVIC_PEND1_INT53 0x00200000
Interrupt 53 pend.
#define | NVIC_PEND1_INT52 0x00100000
Interrupt 52 pend.
#define | NVIC_PEND1_INT51 0x00080000
Interrupt 51 pend.
#define | NVIC_PEND1_INT50 0x00040000
Interrupt 50 pend.
#define | NVIC_PEND1_INT49 0x00020000
Interrupt 49 pend.
#define | NVIC_PEND1_INT48 0x00010000
Interrupt 48 pend.
#define | NVIC_PEND1_INT47 0x00008000
Interrupt 47 pend.
#define | NVIC_PEND1_INT46 0x00004000
Interrupt 46 pend.
#define | NVIC_PEND1_INT45 0x00002000
Interrupt 45 pend.
#define | NVIC_PEND1_INT44 0x00001000
Interrupt 44 pend.
#define | NVIC_PEND1_INT43 0x00000800
Interrupt 43 pend.
#define | NVIC_PEND1_INT42 0x00000400
Interrupt 42 pend.
#define | NVIC_PEND1_INT41 0x00000200
Interrupt 41 pend.
#define | NVIC_PEND1_INT40 0x00000100
Interrupt 40 pend.
#define | NVIC_PEND1_INT39 0x00000080
Interrupt 39 pend.
#define | NVIC_PEND1_INT38 0x00000040
Interrupt 38 pend.
#define | NVIC_PEND1_INT37 0x00000020
Interrupt 37 pend.
#define | NVIC_PEND1_INT36 0x00000010
Interrupt 36 pend.
#define | NVIC_PEND1_INT35 0x00000008
Interrupt 35 pend.
#define | NVIC_PEND1_INT34 0x00000004
Interrupt 34 pend.
#define | NVIC_PEND1_INT33 0x00000002
Interrupt 33 pend.
#define | NVIC_PEND1_INT32 0x00000001
Interrupt 32 pend.
#define | NVIC_UNPEND0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_UNPEND0 register.
#define | NVIC_UNPEND0_INT30 0x40000000
Interrupt 30 unpend.
#define | NVIC_UNPEND0_INT29 0x20000000
Interrupt 29 unpend.
#define | NVIC_UNPEND0_INT28 0x10000000
Interrupt 28 unpend.
#define | NVIC_UNPEND0_INT27 0x08000000
Interrupt 27 unpend.
#define | NVIC_UNPEND0_INT26 0x04000000
Interrupt 26 unpend.
#define | NVIC_UNPEND0_INT25 0x02000000
Interrupt 25 unpend.
#define | NVIC_UNPEND0_INT24 0x01000000
Interrupt 24 unpend.
#define | NVIC_UNPEND0_INT23 0x00800000
Interrupt 23 unpend.
#define | NVIC_UNPEND0_INT22 0x00400000
Interrupt 22 unpend.
#define | NVIC_UNPEND0_INT21 0x00200000
Interrupt 21 unpend.
#define | NVIC_UNPEND0_INT20 0x00100000
Interrupt 20 unpend.
#define | NVIC_UNPEND0_INT19 0x00080000
Interrupt 19 unpend.
#define | NVIC_UNPEND0_INT18 0x00040000
Interrupt 18 unpend.
#define | NVIC_UNPEND0_INT17 0x00020000
Interrupt 17 unpend.
#define | NVIC_UNPEND0_INT16 0x00010000
Interrupt 16 unpend.
#define | NVIC_UNPEND0_INT15 0x00008000
Interrupt 15 unpend.
#define | NVIC_UNPEND0_INT14 0x00004000
Interrupt 14 unpend.
#define | NVIC_UNPEND0_INT13 0x00002000
Interrupt 13 unpend.
#define | NVIC_UNPEND0_INT12 0x00001000
Interrupt 12 unpend.
#define | NVIC_UNPEND0_INT11 0x00000800
Interrupt 11 unpend.
#define | NVIC_UNPEND0_INT10 0x00000400
Interrupt 10 unpend.
#define | NVIC_UNPEND0_INT9 0x00000200
Interrupt 9 unpend.
#define | NVIC_UNPEND0_INT8 0x00000100
Interrupt 8 unpend.
#define | NVIC_UNPEND0_INT7 0x00000080
Interrupt 7 unpend.
#define | NVIC_UNPEND0_INT6 0x00000040
Interrupt 6 unpend.
#define | NVIC_UNPEND0_INT5 0x00000020
Interrupt 5 unpend.
#define | NVIC_UNPEND0_INT4 0x00000010
Interrupt 4 unpend.
#define | NVIC_UNPEND0_INT3 0x00000008
Interrupt 3 unpend.
#define | NVIC_UNPEND0_INT2 0x00000004
Interrupt 2 unpend.
#define | NVIC_UNPEND0_INT1 0x00000002
Interrupt 1 unpend.
#define | NVIC_UNPEND0_INT0 0x00000001
Interrupt 0 unpend.
#define | NVIC_UNPEND1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_UNPEND1 register.
#define | NVIC_UNPEND1_INT58 0x04000000
Interrupt 58 unpend.
#define | NVIC_UNPEND1_INT57 0x02000000
Interrupt 57 unpend.
#define | NVIC_UNPEND1_INT56 0x01000000
Interrupt 56 unpend.
#define | NVIC_UNPEND1_INT55 0x00800000
Interrupt 55 unpend.
#define | NVIC_UNPEND1_INT54 0x00400000
Interrupt 54 unpend.
#define | NVIC_UNPEND1_INT53 0x00200000
Interrupt 53 unpend.
#define | NVIC_UNPEND1_INT52 0x00100000
Interrupt 52 unpend.
#define | NVIC_UNPEND1_INT51 0x00080000
Interrupt 51 unpend.
#define | NVIC_UNPEND1_INT50 0x00040000
Interrupt 50 unpend.
#define | NVIC_UNPEND1_INT49 0x00020000
Interrupt 49 unpend.
#define | NVIC_UNPEND1_INT48 0x00010000
Interrupt 48 unpend.
#define | NVIC_UNPEND1_INT47 0x00008000
Interrupt 47 unpend.
#define | NVIC_UNPEND1_INT46 0x00004000
Interrupt 46 unpend.
#define | NVIC_UNPEND1_INT45 0x00002000
Interrupt 45 unpend.
#define | NVIC_UNPEND1_INT44 0x00001000
Interrupt 44 unpend.
#define | NVIC_UNPEND1_INT43 0x00000800
Interrupt 43 unpend.
#define | NVIC_UNPEND1_INT42 0x00000400
Interrupt 42 unpend.
#define | NVIC_UNPEND1_INT41 0x00000200
Interrupt 41 unpend.
#define | NVIC_UNPEND1_INT40 0x00000100
Interrupt 40 unpend.
#define | NVIC_UNPEND1_INT39 0x00000080
Interrupt 39 unpend.
#define | NVIC_UNPEND1_INT38 0x00000040
Interrupt 38 unpend.
#define | NVIC_UNPEND1_INT37 0x00000020
Interrupt 37 unpend.
#define | NVIC_UNPEND1_INT36 0x00000010
Interrupt 36 unpend.
#define | NVIC_UNPEND1_INT35 0x00000008
Interrupt 35 unpend.
#define | NVIC_UNPEND1_INT34 0x00000004
Interrupt 34 unpend.
#define | NVIC_UNPEND1_INT33 0x00000002
Interrupt 33 unpend.
#define | NVIC_UNPEND1_INT32 0x00000001
Interrupt 32 unpend.
#define | NVIC_ACTIVE0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_ACTIVE0 register.
#define | NVIC_ACTIVE0_INT30 0x40000000
Interrupt 30 active.
#define | NVIC_ACTIVE0_INT29 0x20000000
Interrupt 29 active.
#define | NVIC_ACTIVE0_INT28 0x10000000
Interrupt 28 active.
#define | NVIC_ACTIVE0_INT27 0x08000000
Interrupt 27 active.
#define | NVIC_ACTIVE0_INT26 0x04000000
Interrupt 26 active.
#define | NVIC_ACTIVE0_INT25 0x02000000
Interrupt 25 active.
#define | NVIC_ACTIVE0_INT24 0x01000000
Interrupt 24 active.
#define | NVIC_ACTIVE0_INT23 0x00800000
Interrupt 23 active.
#define | NVIC_ACTIVE0_INT22 0x00400000
Interrupt 22 active.
#define | NVIC_ACTIVE0_INT21 0x00200000
Interrupt 21 active.
#define | NVIC_ACTIVE0_INT20 0x00100000
Interrupt 20 active.
#define | NVIC_ACTIVE0_INT19 0x00080000
Interrupt 19 active.
#define | NVIC_ACTIVE0_INT18 0x00040000
Interrupt 18 active.
#define | NVIC_ACTIVE0_INT17 0x00020000
Interrupt 17 active.
#define | NVIC_ACTIVE0_INT16 0x00010000
Interrupt 16 active.
#define | NVIC_ACTIVE0_INT15 0x00008000
Interrupt 15 active.
#define | NVIC_ACTIVE0_INT14 0x00004000
Interrupt 14 active.
#define | NVIC_ACTIVE0_INT13 0x00002000
Interrupt 13 active.
#define | NVIC_ACTIVE0_INT12 0x00001000
Interrupt 12 active.
#define | NVIC_ACTIVE0_INT11 0x00000800
Interrupt 11 active.
#define | NVIC_ACTIVE0_INT10 0x00000400
Interrupt 10 active.
#define | NVIC_ACTIVE0_INT9 0x00000200
Interrupt 9 active.
#define | NVIC_ACTIVE0_INT8 0x00000100
Interrupt 8 active.
#define | NVIC_ACTIVE0_INT7 0x00000080
Interrupt 7 active.
#define | NVIC_ACTIVE0_INT6 0x00000040
Interrupt 6 active.
#define | NVIC_ACTIVE0_INT5 0x00000020
Interrupt 5 active.
#define | NVIC_ACTIVE0_INT4 0x00000010
Interrupt 4 active.
#define | NVIC_ACTIVE0_INT3 0x00000008
Interrupt 3 active.
#define | NVIC_ACTIVE0_INT2 0x00000004
Interrupt 2 active.
#define | NVIC_ACTIVE0_INT1 0x00000002
Interrupt 1 active.
#define | NVIC_ACTIVE0_INT0 0x00000001
Interrupt 0 active.
#define | NVIC_ACTIVE1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_ACTIVE1 register.
#define | NVIC_ACTIVE1_INT58 0x04000000
Interrupt 58 active.
#define | NVIC_ACTIVE1_INT57 0x02000000
Interrupt 57 active.
#define | NVIC_ACTIVE1_INT56 0x01000000
Interrupt 56 active.
#define | NVIC_ACTIVE1_INT55 0x00800000
Interrupt 55 active.
#define | NVIC_ACTIVE1_INT54 0x00400000
Interrupt 54 active.
#define | NVIC_ACTIVE1_INT53 0x00200000
Interrupt 53 active.
#define | NVIC_ACTIVE1_INT52 0x00100000
Interrupt 52 active.
#define | NVIC_ACTIVE1_INT51 0x00080000
Interrupt 51 active.
#define | NVIC_ACTIVE1_INT50 0x00040000
Interrupt 50 active.
#define | NVIC_ACTIVE1_INT49 0x00020000
Interrupt 49 active.
#define | NVIC_ACTIVE1_INT48 0x00010000
Interrupt 48 active.
#define | NVIC_ACTIVE1_INT47 0x00008000
Interrupt 47 active.
#define | NVIC_ACTIVE1_INT46 0x00004000
Interrupt 46 active.
#define | NVIC_ACTIVE1_INT45 0x00002000
Interrupt 45 active.
#define | NVIC_ACTIVE1_INT44 0x00001000
Interrupt 44 active.
#define | NVIC_ACTIVE1_INT43 0x00000800
Interrupt 43 active.
#define | NVIC_ACTIVE1_INT42 0x00000400
Interrupt 42 active.
#define | NVIC_ACTIVE1_INT41 0x00000200
Interrupt 41 active.
#define | NVIC_ACTIVE1_INT40 0x00000100
Interrupt 40 active.
#define | NVIC_ACTIVE1_INT39 0x00000080
Interrupt 39 active.
#define | NVIC_ACTIVE1_INT38 0x00000040
Interrupt 38 active.
#define | NVIC_ACTIVE1_INT37 0x00000020
Interrupt 37 active.
#define | NVIC_ACTIVE1_INT36 0x00000010
Interrupt 36 active.
#define | NVIC_ACTIVE1_INT35 0x00000008
Interrupt 35 active.
#define | NVIC_ACTIVE1_INT34 0x00000004
Interrupt 34 active.
#define | NVIC_ACTIVE1_INT33 0x00000002
Interrupt 33 active.
#define | NVIC_ACTIVE1_INT32 0x00000001
Interrupt 32 active.
#define | NVIC_PRI0_INT3_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI0_INT2_M 0x00FF0000
Interrupt 2 priority mask.
#define | NVIC_PRI0_INT1_M 0x0000FF00
Interrupt 1 priority mask.
#define | NVIC_PRI0_INT0_M 0x000000FF
Interrupt 0 priority mask.
#define | NVIC_PRI0_INT3_S 24
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI0_INT2_S 16
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI0_INT1_S 8
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI0_INT0_S 0
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI1_INT7_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI1_INT6_M 0x00FF0000
Interrupt 6 priority mask.
#define | NVIC_PRI1_INT5_M 0x0000FF00
Interrupt 5 priority mask.
#define | NVIC_PRI1_INT4_M 0x000000FF
Interrupt 4 priority mask.
#define | NVIC_PRI1_INT7_S 24
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI1_INT6_S 16
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI1_INT5_S 8
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI1_INT4_S 0
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI2_INT11_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI2_INT10_M 0x00FF0000
Interrupt 10 priority mask.
#define | NVIC_PRI2_INT9_M 0x0000FF00
Interrupt 9 priority mask.
#define | NVIC_PRI2_INT8_M 0x000000FF
Interrupt 8 priority mask.
#define | NVIC_PRI2_INT11_S 24
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI2_INT10_S 16
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI2_INT9_S 8
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI2_INT8_S 0
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI3_INT15_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI3_INT14_M 0x00FF0000
Interrupt 14 priority mask.
#define | NVIC_PRI3_INT13_M 0x0000FF00
Interrupt 13 priority mask.
#define | NVIC_PRI3_INT12_M 0x000000FF
Interrupt 12 priority mask.
#define | NVIC_PRI3_INT15_S 24
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI3_INT14_S 16
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI3_INT13_S 8
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI3_INT12_S 0
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI4_INT19_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI4_INT18_M 0x00FF0000
Interrupt 18 priority mask.
#define | NVIC_PRI4_INT17_M 0x0000FF00
Interrupt 17 priority mask.
#define | NVIC_PRI4_INT16_M 0x000000FF
Interrupt 16 priority mask.
#define | NVIC_PRI4_INT19_S 24
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI4_INT18_S 16
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI4_INT17_S 8
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI4_INT16_S 0
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI5_INT23_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI5_INT22_M 0x00FF0000
Interrupt 22 priority mask.
#define | NVIC_PRI5_INT21_M 0x0000FF00
Interrupt 21 priority mask.
#define | NVIC_PRI5_INT20_M 0x000000FF
Interrupt 20 priority mask.
#define | NVIC_PRI5_INT23_S 24
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI5_INT22_S 16
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI5_INT21_S 8
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI5_INT20_S 0
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI6_INT27_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI6_INT26_M 0x00FF0000
Interrupt 26 priority mask.
#define | NVIC_PRI6_INT25_M 0x0000FF00
Interrupt 25 priority mask.
#define | NVIC_PRI6_INT24_M 0x000000FF
Interrupt 24 priority mask.
#define | NVIC_PRI6_INT27_S 24
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI6_INT26_S 16
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI6_INT25_S 8
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI6_INT24_S 0
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI7_INT31_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI7_INT30_M 0x00FF0000
Interrupt 30 priority mask.
#define | NVIC_PRI7_INT29_M 0x0000FF00
Interrupt 29 priority mask.
#define | NVIC_PRI7_INT28_M 0x000000FF
Interrupt 28 priority mask.
#define | NVIC_PRI7_INT31_S 24
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI7_INT30_S 16
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI7_INT29_S 8
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI7_INT28_S 0
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI8_INT35_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI8_INT34_M 0x00FF0000
Interrupt 34 priority mask.
#define | NVIC_PRI8_INT33_M 0x0000FF00
Interrupt 33 priority mask.
#define | NVIC_PRI8_INT32_M 0x000000FF
Interrupt 32 priority mask.
#define | NVIC_PRI8_INT35_S 24
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI8_INT34_S 16
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI8_INT33_S 8
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI8_INT32_S 0
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI9_INT39_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI9_INT38_M 0x00FF0000
Interrupt 38 priority mask.
#define | NVIC_PRI9_INT37_M 0x0000FF00
Interrupt 37 priority mask.
#define | NVIC_PRI9_INT36_M 0x000000FF
Interrupt 36 priority mask.
#define | NVIC_PRI9_INT39_S 24
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI9_INT38_S 16
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI9_INT37_S 8
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI9_INT36_S 0
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI10_INT43_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_PRI10_INT42_M 0x00FF0000
Interrupt 42 priority mask.
#define | NVIC_PRI10_INT41_M 0x0000FF00
Interrupt 41 priority mask.
#define | NVIC_PRI10_INT40_M 0x000000FF
Interrupt 40 priority mask.
#define | NVIC_PRI10_INT43_S 24
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_PRI10_INT42_S 16
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_PRI10_INT41_S 8
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_PRI10_INT40_S 0
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_CPUID_IMP_M 0xFF000000
The following are defines for the bit fields in the NVIC_CPUID register.
#define | NVIC_CPUID_VAR_M 0x00F00000
Variant.
#define | NVIC_CPUID_PARTNO_M 0x0000FFF0
Processor part number.
#define | NVIC_CPUID_REV_M 0x0000000F
Revision.
#define | NVIC_INT_CTRL_NMI_SET 0x80000000
The following are defines for the bit fields in the NVIC_INT_CTRL register.
#define | NVIC_INT_CTRL_PEND_SV 0x10000000
Pend a PendSV.
#define | NVIC_INT_CTRL_UNPEND_SV 0x08000000
Unpend a PendSV.
#define | NVIC_INT_CTRL_PENDSTSET 0x04000000
Set pending SysTick interrupt.
#define | NVIC_INT_CTRL_PENDSTCLR 0x02000000
Clear pending SysTick interrupt.
#define | NVIC_INT_CTRL_ISR_PRE 0x00800000
Debug interrupt handling.
#define | NVIC_INT_CTRL_ISR_PEND 0x00400000
Debug interrupt pending.
#define | NVIC_INT_CTRL_VEC_PEN_M 0x003FF000
Highest pending exception.
#define | NVIC_INT_CTRL_RET_BASE 0x00000800
Return to base.
#define | NVIC_INT_CTRL_VEC_ACT_M 0x000003FF
Current active exception.
#define | NVIC_INT_CTRL_VEC_PEN_S 12
The following are defines for the bit fields in the NVIC_INT_CTRL register.
#define | NVIC_INT_CTRL_VEC_ACT_S 0
The following are defines for the bit fields in the NVIC_INT_CTRL register.
#define | NVIC_VTABLE_BASE 0x20000000
The following are defines for the bit fields in the NVIC_VTABLE register.
#define | NVIC_VTABLE_OFFSET_M 0x1FFFFF00
Vector table offset.
#define | NVIC_VTABLE_OFFSET_S 8
The following are defines for the bit fields in the NVIC_VTABLE register.
#define | NVIC_APINT_VECTKEY_M 0xFFFF0000
The following are defines for the bit fields in the NVIC_APINT register.
#define | NVIC_APINT_VECTKEY 0x05FA0000
Vector key.
#define | NVIC_APINT_ENDIANESS 0x00008000
Data endianess.
#define | NVIC_APINT_PRIGROUP_M 0x00000700
Priority group.
#define | NVIC_APINT_PRIGROUP_0_8 0x00000700
Priority group 0.8 split.
#define | NVIC_APINT_PRIGROUP_1_7 0x00000600
Priority group 1.7 split.
#define | NVIC_APINT_PRIGROUP_2_6 0x00000500
Priority group 2.6 split.
#define | NVIC_APINT_PRIGROUP_3_5 0x00000400
Priority group 3.5 split.
#define | NVIC_APINT_PRIGROUP_4_4 0x00000300
Priority group 4.4 split.
#define | NVIC_APINT_PRIGROUP_5_3 0x00000200
Priority group 5.3 split.
#define | NVIC_APINT_PRIGROUP_6_2 0x00000100
Priority group 6.2 split.
#define | NVIC_APINT_SYSRESETREQ 0x00000004
System reset request.
#define | NVIC_APINT_VECT_CLR_ACT 0x00000002
Clear active NMI/fault info.
#define | NVIC_APINT_VECT_RESET 0x00000001
System reset.
#define | NVIC_APINT_PRIGROUP_7_1 0x00000000
Priority group 7.1 split.
#define | NVIC_SYS_CTRL_SEVONPEND 0x00000010
The following are defines for the bit fields in the NVIC_SYS_CTRL register.
#define | NVIC_SYS_CTRL_SLEEPDEEP 0x00000004
Deep sleep enable.
#define | NVIC_SYS_CTRL_SLEEPEXIT 0x00000002
Sleep on ISR exit.
#define | NVIC_CFG_CTRL_BFHFNMIGN 0x00000100
The following are defines for the bit fields in the NVIC_CFG_CTRL register.
#define | NVIC_CFG_CTRL_DIV0 0x00000010
Trap on divide by 0.
#define | NVIC_CFG_CTRL_UNALIGNED 0x00000008
Trap on unaligned access.
#define | NVIC_CFG_CTRL_DEEP_PEND 0x00000004
Allow deep interrupt trigger.
#define | NVIC_CFG_CTRL_MAIN_PEND 0x00000002
Allow main interrupt trigger.
#define | NVIC_CFG_CTRL_BASE_THR 0x00000001
Thread state control.
#define | NVIC_SYS_PRI1_RES_M 0xFF000000
The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
#define | NVIC_SYS_PRI1_USAGE_M 0x00FF0000
Priority of usage fault handler.
#define | NVIC_SYS_PRI1_BUS_M 0x0000FF00
Priority of bus fault handler.
#define | NVIC_SYS_PRI1_MEM_M 0x000000FF
Priority of mem manage handler.
#define | NVIC_SYS_PRI1_USAGE_S 16
The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
#define | NVIC_SYS_PRI1_BUS_S 8
The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
#define | NVIC_SYS_PRI1_MEM_S 0
The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
#define | NVIC_SYS_PRI2_SVC_M 0xFF000000
The following are defines for the bit fields in the NVIC_SYS_PRI2 register.
#define | NVIC_SYS_PRI2_RES_M 0x00FFFFFF
Priority of reserved handlers.
#define | NVIC_SYS_PRI2_SVC_S 24
The following are defines for the bit fields in the NVIC_SYS_PRI2 register.
#define | NVIC_SYS_PRI3_TICK_M 0xFF000000
The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
#define | NVIC_SYS_PRI3_PENDSV_M 0x00FF0000
Priority of PendSV handler.
#define | NVIC_SYS_PRI3_RES_M 0x0000FF00
Priority of reserved handler.
#define | NVIC_SYS_PRI3_DEBUG_M 0x000000FF
Priority of debug handler.
#define | NVIC_SYS_PRI3_TICK_S 24
The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
#define | NVIC_SYS_PRI3_PENDSV_S 16
The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
#define | NVIC_SYS_PRI3_DEBUG_S 0
The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
#define | NVIC_SYS_HND_CTRL_USAGE 0x00040000
The following are defines for the bit fields in the NVIC_SYS_HND_CTRL register.
#define | NVIC_SYS_HND_CTRL_BUS 0x00020000
Bus fault enable.
#define | NVIC_SYS_HND_CTRL_MEM 0x00010000
Mem manage fault enable.
#define | NVIC_SYS_HND_CTRL_SVC 0x00008000
SVCall is pended.
#define | NVIC_SYS_HND_CTRL_BUSP 0x00004000
Bus fault is pended.
#define | NVIC_SYS_HND_CTRL_TICK 0x00000800
Sys tick is active.
#define | NVIC_SYS_HND_CTRL_PNDSV 0x00000400
PendSV is active.
#define | NVIC_SYS_HND_CTRL_MON 0x00000100
Monitor is active.
#define | NVIC_SYS_HND_CTRL_SVCA 0x00000080
SVCall is active.
#define | NVIC_SYS_HND_CTRL_USGA 0x00000008
Usage fault is active.
#define | NVIC_SYS_HND_CTRL_BUSA 0x00000002
Bus fault is active.
#define | NVIC_SYS_HND_CTRL_MEMA 0x00000001
Mem manage is active.
#define | NVIC_FAULT_STAT_DIV0 0x02000000
The following are defines for the bit fields in the NVIC_FAULT_STAT register.
#define | NVIC_FAULT_STAT_UNALIGN 0x01000000
Unaligned access fault.
#define | NVIC_FAULT_STAT_NOCP 0x00080000
No coprocessor fault.
#define | NVIC_FAULT_STAT_INVPC 0x00040000
Invalid PC fault.
#define | NVIC_FAULT_STAT_INVSTAT 0x00020000
Invalid state fault.
#define | NVIC_FAULT_STAT_UNDEF 0x00010000
Undefined instruction fault.
#define | NVIC_FAULT_STAT_BFARV 0x00008000
BFAR is valid.
#define | NVIC_FAULT_STAT_BSTKE 0x00001000
Stack bus fault.
#define | NVIC_FAULT_STAT_BUSTKE 0x00000800
Unstack bus fault.
#define | NVIC_FAULT_STAT_IMPRE 0x00000400
Imprecise data bus error.
#define | NVIC_FAULT_STAT_PRECISE 0x00000200
Precise data bus error.
#define | NVIC_FAULT_STAT_IBUS 0x00000100
Instruction bus fault.
#define | NVIC_FAULT_STAT_MMARV 0x00000080
MMAR is valid.
#define | NVIC_FAULT_STAT_MSTKE 0x00000010
Stack access violation.
#define | NVIC_FAULT_STAT_MUSTKE 0x00000008
Unstack access violation.
#define | NVIC_FAULT_STAT_DERR 0x00000002
Data access violation.
#define | NVIC_FAULT_STAT_IERR 0x00000001
Instruction access violation.
#define | NVIC_HFAULT_STAT_DBG 0x80000000
The following are defines for the bit fields in the NVIC_HFAULT_STAT register.
#define | NVIC_HFAULT_STAT_FORCED 0x40000000
Cannot execute fault handler.
#define | NVIC_HFAULT_STAT_VECT 0x00000002
Vector table read fault.
#define | NVIC_DEBUG_STAT_EXTRNL 0x00000010
The following are defines for the bit fields in the NVIC_DEBUG_STAT register.
#define | NVIC_DEBUG_STAT_VCATCH 0x00000008
Vector catch.
#define | NVIC_DEBUG_STAT_DWTTRAP 0x00000004
DWT match.
#define | NVIC_DEBUG_STAT_BKPT 0x00000002
Breakpoint instruction.
#define | NVIC_DEBUG_STAT_HALTED 0x00000001
Halt request.
#define | NVIC_MM_ADDR_M 0xFFFFFFFF
The following are defines for the bit fields in the NVIC_MM_ADDR register.
#define | NVIC_MM_ADDR_S 0
The following are defines for the bit fields in the NVIC_MM_ADDR register.
#define | NVIC_FAULT_ADDR_M 0xFFFFFFFF
The following are defines for the bit fields in the NVIC_FAULT_ADDR register.
#define | NVIC_FAULT_ADDR_S 0
The following are defines for the bit fields in the NVIC_FAULT_ADDR register.
#define | NVIC_MPU_TYPE_IREGION_M 0x00FF0000
The following are defines for the bit fields in the NVIC_MPU_TYPE register.
#define | NVIC_MPU_TYPE_DREGION_M 0x0000FF00
Number of D regions.
#define | NVIC_MPU_TYPE_SEPARATE 0x00000001
Separate or unified MPU.
#define | NVIC_MPU_TYPE_IREGION_S 16
The following are defines for the bit fields in the NVIC_MPU_TYPE register.
#define | NVIC_MPU_TYPE_DREGION_S 8
The following are defines for the bit fields in the NVIC_MPU_TYPE register.
#define | NVIC_MPU_CTRL_PRIVDEFEN 0x00000004
The following are defines for the bit fields in the NVIC_MPU_CTRL register.
#define | NVIC_MPU_CTRL_HFNMIENA 0x00000002
MPU enabled during faults.
#define | NVIC_MPU_CTRL_ENABLE 0x00000001
MPU enable.
#define | NVIC_MPU_NUMBER_M 0x000000FF
The following are defines for the bit fields in the NVIC_MPU_NUMBER register.
#define | NVIC_MPU_NUMBER_S 0
The following are defines for the bit fields in the NVIC_MPU_NUMBER register.
#define | NVIC_MPU_BASE_ADDR_M 0xFFFFFFE0
The following are defines for the bit fields in the NVIC_MPU_BASE register.
#define | NVIC_MPU_BASE_VALID 0x00000010
Region number valid.
#define | NVIC_MPU_BASE_REGION_M 0x0000000F
Region number.
#define | NVIC_MPU_BASE_ADDR_S 8
The following are defines for the bit fields in the NVIC_MPU_BASE register.
#define | NVIC_MPU_BASE_REGION_S 0
The following are defines for the bit fields in the NVIC_MPU_BASE register.
#define | NVIC_MPU_ATTR_M 0xFFFF0000
The following are defines for the bit fields in the NVIC_MPU_ATTR register.
#define | NVIC_MPU_ATTR_AP_NO_NO 0x00000000
prv: no access, usr: no access
#define | NVIC_MPU_ATTR_BUFFRABLE 0x00010000
Bufferable.
#define | NVIC_MPU_ATTR_CACHEABLE 0x00020000
Cacheable.
#define | NVIC_MPU_ATTR_SHAREABLE 0x00040000
Shareable.
#define | NVIC_MPU_ATTR_TEX_M 0x00380000
Type extension mask.
#define | NVIC_MPU_ATTR_AP_RW_NO 0x01000000
prv: rw, usr: none
#define | NVIC_MPU_ATTR_AP_RW_RO 0x02000000
prv: rw, usr: read-only
#define | NVIC_MPU_ATTR_AP_RW_RW 0x03000000
prv: rw, usr: rw
#define | NVIC_MPU_ATTR_AP_RO_NO 0x05000000
prv: ro, usr: none
#define | NVIC_MPU_ATTR_AP_RO_RO 0x06000000
prv: ro, usr: ro
#define | NVIC_MPU_ATTR_AP_M 0x07000000
Access permissions mask.
#define | NVIC_MPU_ATTR_XN 0x10000000
Execute disable.
#define | NVIC_MPU_ATTR_SRD_M 0x0000FF00
Sub-region disable mask.
#define | NVIC_MPU_ATTR_SRD_0 0x00000100
Sub-region 0 disable.
#define | NVIC_MPU_ATTR_SRD_1 0x00000200
Sub-region 1 disable.
#define | NVIC_MPU_ATTR_SRD_2 0x00000400
Sub-region 2 disable.
#define | NVIC_MPU_ATTR_SRD_3 0x00000800
Sub-region 3 disable.
#define | NVIC_MPU_ATTR_SRD_4 0x00001000
Sub-region 4 disable.
#define | NVIC_MPU_ATTR_SRD_5 0x00002000
Sub-region 5 disable.
#define | NVIC_MPU_ATTR_SRD_6 0x00004000
Sub-region 6 disable.
#define | NVIC_MPU_ATTR_SRD_7 0x00008000
Sub-region 7 disable.
#define | NVIC_MPU_ATTR_SIZE_M 0x0000003E
Region size mask.
#define | NVIC_MPU_ATTR_SIZE_32B 0x00000008
Region size 32 bytes.
#define | NVIC_MPU_ATTR_SIZE_64B 0x0000000A
Region size 64 bytes.
#define | NVIC_MPU_ATTR_SIZE_128B 0x0000000C
Region size 128 bytes.
#define | NVIC_MPU_ATTR_SIZE_256B 0x0000000E
Region size 256 bytes.
#define | NVIC_MPU_ATTR_SIZE_512B 0x00000010
Region size 512 bytes.
#define | NVIC_MPU_ATTR_SIZE_1K 0x00000012
Region size 1 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_2K 0x00000014
Region size 2 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_4K 0x00000016
Region size 4 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_8K 0x00000018
Region size 8 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_16K 0x0000001A
Region size 16 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_32K 0x0000001C
Region size 32 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_64K 0x0000001E
Region size 64 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_128K 0x00000020
Region size 128 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_256K 0x00000022
Region size 256 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_512K 0x00000024
Region size 512 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_1M 0x00000026
Region size 1 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_2M 0x00000028
Region size 2 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_4M 0x0000002A
Region size 4 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_8M 0x0000002C
Region size 8 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_16M 0x0000002E
Region size 16 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_32M 0x00000030
Region size 32 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_64M 0x00000032
Region size 64 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_128M 0x00000034
Region size 128 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_256M 0x00000036
Region size 256 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_512M 0x00000038
Region size 512 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_1G 0x0000003A
Region size 1 Gbytes.
#define | NVIC_MPU_ATTR_SIZE_2G 0x0000003C
Region size 2 Gbytes.
#define | NVIC_MPU_ATTR_SIZE_4G 0x0000003E
Region size 4 Gbytes.
#define | NVIC_MPU_ATTR_ENABLE 0x00000001
Region enable.
#define | NVIC_DBG_CTRL_DBGKEY_M 0xFFFF0000
The following are defines for the bit fields in the NVIC_DBG_CTRL register.
#define | NVIC_DBG_CTRL_DBGKEY 0xA05F0000
Debug key.
#define | NVIC_DBG_CTRL_S_RESET_ST 0x02000000
Core has reset since last read.
#define | NVIC_DBG_CTRL_S_RETIRE_ST 0x01000000
Core has executed insruction.
#define | NVIC_DBG_CTRL_S_LOCKUP 0x00080000
Core is locked up.
#define | NVIC_DBG_CTRL_S_SLEEP 0x00040000
Core is sleeping.
#define | NVIC_DBG_CTRL_S_HALT 0x00020000
Core status on halt.
#define | NVIC_DBG_CTRL_S_REGRDY 0x00010000
Register read/write available.
#define | NVIC_DBG_CTRL_C_SNAPSTALL 0x00000020
Breaks a stalled load/store.
#define | NVIC_DBG_CTRL_C_MASKINT 0x00000008
Mask interrupts when stepping.
#define | NVIC_DBG_CTRL_C_STEP 0x00000004
Step the core.
#define | NVIC_DBG_CTRL_C_HALT 0x00000002
Halt the core.
#define | NVIC_DBG_CTRL_C_DEBUGEN 0x00000001
Enable debug.
#define | NVIC_DBG_XFER_REG_WNR 0x00010000
The following are defines for the bit fields in the NVIC_DBG_XFER register.
#define | NVIC_DBG_XFER_REG_SEL_M 0x0000001F
Register.
#define | NVIC_DBG_XFER_REG_CFBP 0x00000014
Control/Fault/BasePri/PriMask.
#define | NVIC_DBG_XFER_REG_DSP 0x00000013
Deep SP.
#define | NVIC_DBG_XFER_REG_PSP 0x00000012
Process SP.
#define | NVIC_DBG_XFER_REG_MSP 0x00000011
Main SP.
#define | NVIC_DBG_XFER_REG_FLAGS 0x00000010
xPSR/Flags register
#define | NVIC_DBG_XFER_REG_R15 0x0000000F
Register R15.
#define | NVIC_DBG_XFER_REG_R14 0x0000000E
Register R14.
#define | NVIC_DBG_XFER_REG_R13 0x0000000D
Register R13.
#define | NVIC_DBG_XFER_REG_R12 0x0000000C
Register R12.
#define | NVIC_DBG_XFER_REG_R11 0x0000000B
Register R11.
#define | NVIC_DBG_XFER_REG_R10 0x0000000A
Register R10.
#define | NVIC_DBG_XFER_REG_R9 0x00000009
Register R9.
#define | NVIC_DBG_XFER_REG_R8 0x00000008
Register R8.
#define | NVIC_DBG_XFER_REG_R7 0x00000007
Register R7.
#define | NVIC_DBG_XFER_REG_R6 0x00000006
Register R6.
#define | NVIC_DBG_XFER_REG_R5 0x00000005
Register R5.
#define | NVIC_DBG_XFER_REG_R4 0x00000004
Register R4.
#define | NVIC_DBG_XFER_REG_R3 0x00000003
Register R3.
#define | NVIC_DBG_XFER_REG_R2 0x00000002
Register R2.
#define | NVIC_DBG_XFER_REG_R1 0x00000001
Register R1.
#define | NVIC_DBG_XFER_REG_R0 0x00000000
Register R0.
#define | NVIC_DBG_DATA_M 0xFFFFFFFF
The following are defines for the bit fields in the NVIC_DBG_DATA register.
#define | NVIC_DBG_DATA_S 0
The following are defines for the bit fields in the NVIC_DBG_DATA register.
#define | NVIC_DBG_INT_HARDERR 0x00000400
The following are defines for the bit fields in the NVIC_DBG_INT register.
#define | NVIC_DBG_INT_INTERR 0x00000200
Debug trap on interrupt errors.
#define | NVIC_DBG_INT_BUSERR 0x00000100
Debug trap on bus error.
#define | NVIC_DBG_INT_STATERR 0x00000080
Debug trap on usage fault state.
#define | NVIC_DBG_INT_CHKERR 0x00000040
Debug trap on usage fault check.
#define | NVIC_DBG_INT_NOCPERR 0x00000020
Debug trap on coprocessor error.
#define | NVIC_DBG_INT_MMERR 0x00000010
Debug trap on mem manage fault.
#define | NVIC_DBG_INT_RESET 0x00000008
Core reset status.
#define | NVIC_DBG_INT_RSTPENDCLR 0x00000004
Clear pending core reset.
#define | NVIC_DBG_INT_RSTPENDING 0x00000002
Core reset is pending.
#define | NVIC_DBG_INT_RSTVCATCH 0x00000001
Reset vector catch.
#define | NVIC_SW_TRIG_INTID_M 0x000003FF
The following are defines for the bit fields in the NVIC_SW_TRIG register.
#define | NVIC_SW_TRIG_INTID_S 0
The following are defines for the bit fields in the NVIC_SW_TRIG register.

Detailed Description

Atmel SAM3 NVIC hardware.

This file does not follow the BeRTOS AT91 register naming convention, because the NVIC subsystem is in common with other Cortex-M3 ports. Take care when using bit definition macros, they don't define bit numbers but values, i.e. you must not use BV(). Moreover register names have the _R suffix and offsets don't have the _OFF one. Someday we will fix this incoherence...

Definition in file sam3_nvic.h.

Define Documentation

#define FAULT_NMI 2

The following are defines for the fault assignments.

NMI fault

Definition at line 50 of file sam3_nvic.h.

#define NVIC_ACTIVE0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_ACTIVE0 register.

Interrupt 31 active

Definition at line 515 of file sam3_nvic.h.

#define NVIC_ACTIVE1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_ACTIVE1 register.

Interrupt 59 active

Definition at line 553 of file sam3_nvic.h.

#define NVIC_APINT_VECTKEY_M 0xFFFF0000

The following are defines for the bit fields in the NVIC_APINT register.

Vector key mask

Definition at line 778 of file sam3_nvic.h.

#define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100

The following are defines for the bit fields in the NVIC_CFG_CTRL register.

Ignore bus fault in NMI/fault

Definition at line 808 of file sam3_nvic.h.

#define NVIC_CPUID_IMP_M 0xFF000000

The following are defines for the bit fields in the NVIC_CPUID register.

Implementer

Definition at line 741 of file sam3_nvic.h.

#define NVIC_DBG_CTRL_DBGKEY_M 0xFFFF0000

The following are defines for the bit fields in the NVIC_DBG_CTRL register.

Debug key mask

Definition at line 1035 of file sam3_nvic.h.

#define NVIC_DBG_CTRL_S_RETIRE_ST 0x01000000

Core has executed insruction.

since last read

Definition at line 1039 of file sam3_nvic.h.

#define NVIC_DBG_DATA_M 0xFFFFFFFF

The following are defines for the bit fields in the NVIC_DBG_DATA register.

Data temporary cache

Definition at line 1087 of file sam3_nvic.h.

#define NVIC_DBG_DATA_S 0

The following are defines for the bit fields in the NVIC_DBG_DATA register.

Data temporary cache

Definition at line 1088 of file sam3_nvic.h.

#define NVIC_DBG_INT_HARDERR 0x00000400

The following are defines for the bit fields in the NVIC_DBG_INT register.

Debug trap on hard fault

Definition at line 1095 of file sam3_nvic.h.

#define NVIC_DBG_XFER_REG_WNR 0x00010000

The following are defines for the bit fields in the NVIC_DBG_XFER register.

Write or not read

Definition at line 1058 of file sam3_nvic.h.

#define NVIC_DEBUG_STAT_EXTRNL 0x00000010

The following are defines for the bit fields in the NVIC_DEBUG_STAT register.

EDBGRQ asserted

Definition at line 909 of file sam3_nvic.h.

#define NVIC_DIS0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_DIS0 register.

Interrupt 31 disable

Definition at line 299 of file sam3_nvic.h.

#define NVIC_DIS1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_DIS1 register.

Interrupt 59 disable

Definition at line 337 of file sam3_nvic.h.

#define NVIC_EN0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_EN0 register.

Interrupt 31 enable

Definition at line 227 of file sam3_nvic.h.

#define NVIC_EN1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_EN1 register.

Interrupt 59 enable

Definition at line 265 of file sam3_nvic.h.

#define NVIC_FAULT_ADDR_M 0xFFFFFFFF

The following are defines for the bit fields in the NVIC_FAULT_ADDR register.

Data bus fault address

Definition at line 929 of file sam3_nvic.h.

#define NVIC_FAULT_ADDR_S 0

The following are defines for the bit fields in the NVIC_FAULT_ADDR register.

Data bus fault address

Definition at line 930 of file sam3_nvic.h.

#define NVIC_FAULT_STAT_DIV0 0x02000000

The following are defines for the bit fields in the NVIC_FAULT_STAT register.

Divide by zero fault

Definition at line 875 of file sam3_nvic.h.

#define NVIC_HFAULT_STAT_DBG 0x80000000

The following are defines for the bit fields in the NVIC_HFAULT_STAT register.

Debug event

Definition at line 899 of file sam3_nvic.h.

#define NVIC_INT_CTRL_NMI_SET 0x80000000

The following are defines for the bit fields in the NVIC_INT_CTRL register.

Pend a NMI

Definition at line 751 of file sam3_nvic.h.

#define NVIC_INT_CTRL_VEC_ACT_S 0

The following are defines for the bit fields in the NVIC_INT_CTRL register.

Pend a NMI

Definition at line 762 of file sam3_nvic.h.

#define NVIC_INT_CTRL_VEC_PEN_S 12

The following are defines for the bit fields in the NVIC_INT_CTRL register.

Pend a NMI

Definition at line 761 of file sam3_nvic.h.

#define NVIC_INT_TYPE 0xE000E004

The following are defines for the NVIC register addresses.

Interrupt Controller Type Reg

Definition at line 122 of file sam3_nvic.h.

#define NVIC_INT_TYPE_LINES_M 0x0000001F

The following are defines for the bit fields in the NVIC_INT_TYPE register.

Number of interrupt lines (x32)

Definition at line 182 of file sam3_nvic.h.

#define NVIC_INT_TYPE_LINES_S 0

The following are defines for the bit fields in the NVIC_INT_TYPE register.

Number of interrupt lines (x32)

Definition at line 183 of file sam3_nvic.h.

#define NVIC_MM_ADDR_M 0xFFFFFFFF

The following are defines for the bit fields in the NVIC_MM_ADDR register.

Data fault address

Definition at line 920 of file sam3_nvic.h.

#define NVIC_MM_ADDR_S 0

The following are defines for the bit fields in the NVIC_MM_ADDR register.

Data fault address

Definition at line 921 of file sam3_nvic.h.

#define NVIC_MPU_ATTR_M 0xFFFF0000

The following are defines for the bit fields in the NVIC_MPU_ATTR register.

Attributes

Definition at line 977 of file sam3_nvic.h.

#define NVIC_MPU_BASE_ADDR_M 0xFFFFFFE0

The following are defines for the bit fields in the NVIC_MPU_BASE register.

Base address mask

Definition at line 966 of file sam3_nvic.h.

#define NVIC_MPU_BASE_ADDR_S 8

The following are defines for the bit fields in the NVIC_MPU_BASE register.

Base address mask

Definition at line 969 of file sam3_nvic.h.

#define NVIC_MPU_BASE_REGION_S 0

The following are defines for the bit fields in the NVIC_MPU_BASE register.

Base address mask

Definition at line 970 of file sam3_nvic.h.

#define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004

The following are defines for the bit fields in the NVIC_MPU_CTRL register.

MPU default region in priv mode

Definition at line 948 of file sam3_nvic.h.

#define NVIC_MPU_NUMBER_M 0x000000FF

The following are defines for the bit fields in the NVIC_MPU_NUMBER register.

MPU region to access

Definition at line 958 of file sam3_nvic.h.

#define NVIC_MPU_NUMBER_S 0

The following are defines for the bit fields in the NVIC_MPU_NUMBER register.

MPU region to access

Definition at line 959 of file sam3_nvic.h.

#define NVIC_MPU_TYPE_DREGION_S 8

The following are defines for the bit fields in the NVIC_MPU_TYPE register.

Number of I regions

Definition at line 941 of file sam3_nvic.h.

#define NVIC_MPU_TYPE_IREGION_M 0x00FF0000

The following are defines for the bit fields in the NVIC_MPU_TYPE register.

Number of I regions

Definition at line 937 of file sam3_nvic.h.

#define NVIC_MPU_TYPE_IREGION_S 16

The following are defines for the bit fields in the NVIC_MPU_TYPE register.

Number of I regions

Definition at line 940 of file sam3_nvic.h.

#define NVIC_PEND0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_PEND0 register.

Interrupt 31 pend

Definition at line 371 of file sam3_nvic.h.

#define NVIC_PEND1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_PEND1 register.

Interrupt 59 pend

Definition at line 409 of file sam3_nvic.h.

#define NVIC_PRI0_INT0_S 0

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 594 of file sam3_nvic.h.

#define NVIC_PRI0_INT1_S 8

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 593 of file sam3_nvic.h.

#define NVIC_PRI0_INT2_S 16

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 592 of file sam3_nvic.h.

#define NVIC_PRI0_INT3_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 587 of file sam3_nvic.h.

#define NVIC_PRI0_INT3_S 24

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 591 of file sam3_nvic.h.

#define NVIC_PRI10_INT40_S 0

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 734 of file sam3_nvic.h.

#define NVIC_PRI10_INT41_S 8

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 733 of file sam3_nvic.h.

#define NVIC_PRI10_INT42_S 16

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 732 of file sam3_nvic.h.

#define NVIC_PRI10_INT43_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 727 of file sam3_nvic.h.

#define NVIC_PRI10_INT43_S 24

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 731 of file sam3_nvic.h.

#define NVIC_PRI1_INT4_S 0

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 608 of file sam3_nvic.h.

#define NVIC_PRI1_INT5_S 8

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 607 of file sam3_nvic.h.

#define NVIC_PRI1_INT6_S 16

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 606 of file sam3_nvic.h.

#define NVIC_PRI1_INT7_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 601 of file sam3_nvic.h.

#define NVIC_PRI1_INT7_S 24

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 605 of file sam3_nvic.h.

#define NVIC_PRI2_INT10_S 16

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 620 of file sam3_nvic.h.

#define NVIC_PRI2_INT11_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 615 of file sam3_nvic.h.

#define NVIC_PRI2_INT11_S 24

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 619 of file sam3_nvic.h.

#define NVIC_PRI2_INT8_S 0

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 622 of file sam3_nvic.h.

#define NVIC_PRI2_INT9_S 8

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 621 of file sam3_nvic.h.

#define NVIC_PRI3_INT12_S 0

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 636 of file sam3_nvic.h.

#define NVIC_PRI3_INT13_S 8

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 635 of file sam3_nvic.h.

#define NVIC_PRI3_INT14_S 16

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 634 of file sam3_nvic.h.

#define NVIC_PRI3_INT15_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 629 of file sam3_nvic.h.

#define NVIC_PRI3_INT15_S 24

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 633 of file sam3_nvic.h.

#define NVIC_PRI4_INT16_S 0

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 650 of file sam3_nvic.h.

#define NVIC_PRI4_INT17_S 8

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 649 of file sam3_nvic.h.

#define NVIC_PRI4_INT18_S 16

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 648 of file sam3_nvic.h.

#define NVIC_PRI4_INT19_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 643 of file sam3_nvic.h.

#define NVIC_PRI4_INT19_S 24

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 647 of file sam3_nvic.h.

#define NVIC_PRI5_INT20_S 0

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 664 of file sam3_nvic.h.

#define NVIC_PRI5_INT21_S 8

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 663 of file sam3_nvic.h.

#define NVIC_PRI5_INT22_S 16

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 662 of file sam3_nvic.h.

#define NVIC_PRI5_INT23_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 657 of file sam3_nvic.h.

#define NVIC_PRI5_INT23_S 24

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 661 of file sam3_nvic.h.

#define NVIC_PRI6_INT24_S 0

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 678 of file sam3_nvic.h.

#define NVIC_PRI6_INT25_S 8

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 677 of file sam3_nvic.h.

#define NVIC_PRI6_INT26_S 16

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 676 of file sam3_nvic.h.

#define NVIC_PRI6_INT27_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 671 of file sam3_nvic.h.

#define NVIC_PRI6_INT27_S 24

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 675 of file sam3_nvic.h.

#define NVIC_PRI7_INT28_S 0

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 692 of file sam3_nvic.h.

#define NVIC_PRI7_INT29_S 8

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 691 of file sam3_nvic.h.

#define NVIC_PRI7_INT30_S 16

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 690 of file sam3_nvic.h.

#define NVIC_PRI7_INT31_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 685 of file sam3_nvic.h.

#define NVIC_PRI7_INT31_S 24

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 689 of file sam3_nvic.h.

#define NVIC_PRI8_INT32_S 0

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 706 of file sam3_nvic.h.

#define NVIC_PRI8_INT33_S 8

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 705 of file sam3_nvic.h.

#define NVIC_PRI8_INT34_S 16

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 704 of file sam3_nvic.h.

#define NVIC_PRI8_INT35_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 699 of file sam3_nvic.h.

#define NVIC_PRI8_INT35_S 24

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 703 of file sam3_nvic.h.

#define NVIC_PRI9_INT36_S 0

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 720 of file sam3_nvic.h.

#define NVIC_PRI9_INT37_S 8

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 719 of file sam3_nvic.h.

#define NVIC_PRI9_INT38_S 16

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 718 of file sam3_nvic.h.

#define NVIC_PRI9_INT39_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 713 of file sam3_nvic.h.

#define NVIC_PRI9_INT39_S 24

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 717 of file sam3_nvic.h.

#define NVIC_ST_CAL_NOREF 0x80000000

The following are defines for the bit fields in the NVIC_ST_CAL register.

No reference clock

Definition at line 217 of file sam3_nvic.h.

#define NVIC_ST_CAL_ONEMS_S 0

The following are defines for the bit fields in the NVIC_ST_CAL register.

No reference clock

Definition at line 220 of file sam3_nvic.h.

#define NVIC_ST_CTRL_COUNT 0x00010000

The following are defines for the bit fields in the NVIC_ST_CTRL register.

Count flag

Definition at line 190 of file sam3_nvic.h.

#define NVIC_ST_CURRENT_M 0x00FFFFFF

The following are defines for the bit fields in the NVIC_ST_CURRENT register.

Counter current value

Definition at line 209 of file sam3_nvic.h.

#define NVIC_ST_CURRENT_S 0

The following are defines for the bit fields in the NVIC_ST_CURRENT register.

Counter current value

Definition at line 210 of file sam3_nvic.h.

#define NVIC_ST_RELOAD_M 0x00FFFFFF

The following are defines for the bit fields in the NVIC_ST_RELOAD register.

Counter load value

Definition at line 200 of file sam3_nvic.h.

#define NVIC_ST_RELOAD_S 0

The following are defines for the bit fields in the NVIC_ST_RELOAD register.

Counter load value

Definition at line 201 of file sam3_nvic.h.

#define NVIC_SW_TRIG_INTID_M 0x000003FF

The following are defines for the bit fields in the NVIC_SW_TRIG register.

Interrupt to trigger

Definition at line 1112 of file sam3_nvic.h.

#define NVIC_SW_TRIG_INTID_S 0

The following are defines for the bit fields in the NVIC_SW_TRIG register.

Interrupt to trigger

Definition at line 1113 of file sam3_nvic.h.

#define NVIC_SYS_CTRL_SEVONPEND 0x00000010

The following are defines for the bit fields in the NVIC_SYS_CTRL register.

Wakeup on pend

Definition at line 799 of file sam3_nvic.h.

#define NVIC_SYS_HND_CTRL_USAGE 0x00040000

The following are defines for the bit fields in the NVIC_SYS_HND_CTRL register.

Usage fault enable

Definition at line 856 of file sam3_nvic.h.

#define NVIC_SYS_PRI1_BUS_S 8

The following are defines for the bit fields in the NVIC_SYS_PRI1 register.

Priority of reserved handler

Definition at line 825 of file sam3_nvic.h.

#define NVIC_SYS_PRI1_MEM_S 0

The following are defines for the bit fields in the NVIC_SYS_PRI1 register.

Priority of reserved handler

Definition at line 826 of file sam3_nvic.h.

#define NVIC_SYS_PRI1_RES_M 0xFF000000

The following are defines for the bit fields in the NVIC_SYS_PRI1 register.

Priority of reserved handler

Definition at line 820 of file sam3_nvic.h.

#define NVIC_SYS_PRI1_USAGE_S 16

The following are defines for the bit fields in the NVIC_SYS_PRI1 register.

Priority of reserved handler

Definition at line 824 of file sam3_nvic.h.

#define NVIC_SYS_PRI2_SVC_M 0xFF000000

The following are defines for the bit fields in the NVIC_SYS_PRI2 register.

Priority of SVCall handler

Definition at line 833 of file sam3_nvic.h.

#define NVIC_SYS_PRI2_SVC_S 24

The following are defines for the bit fields in the NVIC_SYS_PRI2 register.

Priority of SVCall handler

Definition at line 835 of file sam3_nvic.h.

#define NVIC_SYS_PRI3_DEBUG_S 0

The following are defines for the bit fields in the NVIC_SYS_PRI3 register.

Priority of Sys Tick handler

Definition at line 848 of file sam3_nvic.h.

#define NVIC_SYS_PRI3_PENDSV_S 16

The following are defines for the bit fields in the NVIC_SYS_PRI3 register.

Priority of Sys Tick handler

Definition at line 847 of file sam3_nvic.h.

#define NVIC_SYS_PRI3_TICK_M 0xFF000000

The following are defines for the bit fields in the NVIC_SYS_PRI3 register.

Priority of Sys Tick handler

Definition at line 842 of file sam3_nvic.h.

#define NVIC_SYS_PRI3_TICK_S 24

The following are defines for the bit fields in the NVIC_SYS_PRI3 register.

Priority of Sys Tick handler

Definition at line 846 of file sam3_nvic.h.

#define NVIC_UNPEND0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_UNPEND0 register.

Interrupt 31 unpend

Definition at line 443 of file sam3_nvic.h.

#define NVIC_UNPEND1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_UNPEND1 register.

Interrupt 59 unpend

Definition at line 481 of file sam3_nvic.h.

#define NVIC_VTABLE_BASE 0x20000000

The following are defines for the bit fields in the NVIC_VTABLE register.

Vector table base

Definition at line 769 of file sam3_nvic.h.

#define NVIC_VTABLE_OFFSET_S 8

The following are defines for the bit fields in the NVIC_VTABLE register.

Vector table base

Definition at line 771 of file sam3_nvic.h.


BeRTOS: sam3_nvic.h Source File

  • cpu
  • cortex-m3
  • io
sam3_nvic.h
Go to the documentation of this file.
00001
00043 #ifndef SAM3_NVIC_H
00044 #define SAM3_NVIC_H
00045
00049 /*\{*/
00050 #define FAULT_NMI               2           ///< NMI fault
00051 #define FAULT_HARD              3           ///< Hard fault
00052 #define FAULT_MPU               4           ///< MPU fault
00053 #define FAULT_BUS               5           ///< Bus fault
00054 #define FAULT_USAGE             6           ///< Usage fault
00055 #define FAULT_SVCALL            11          ///< SVCall
00056 #define FAULT_DEBUG             12          ///< Debug monitor
00057 #define FAULT_PENDSV            14          ///< PendSV
00058 #define FAULT_SYSTICK           15          ///< System Tick
00059 /*\}*/
00060
00064 /*\{*/
00065 #define NVIC_INT_TYPE_R         (*((reg32_t *)0xE000E004))
00066 #define NVIC_ST_CTRL_R          (*((reg32_t *)0xE000E010))
00067 #define NVIC_ST_RELOAD_R        (*((reg32_t *)0xE000E014))
00068 #define NVIC_ST_CURRENT_R       (*((reg32_t *)0xE000E018))
00069 #define NVIC_ST_CAL_R           (*((reg32_t *)0xE000E01C))
00070 #define NVIC_EN0_R              (*((reg32_t *)0xE000E100))
00071 #define NVIC_EN1_R              (*((reg32_t *)0xE000E104))
00072 #define NVIC_DIS0_R             (*((reg32_t *)0xE000E180))
00073 #define NVIC_DIS1_R             (*((reg32_t *)0xE000E184))
00074 #define NVIC_PEND0_R            (*((reg32_t *)0xE000E200))
00075 #define NVIC_PEND1_R            (*((reg32_t *)0xE000E204))
00076 #define NVIC_UNPEND0_R          (*((reg32_t *)0xE000E280))
00077 #define NVIC_UNPEND1_R          (*((reg32_t *)0xE000E284))
00078 #define NVIC_ACTIVE0_R          (*((reg32_t *)0xE000E300))
00079 #define NVIC_ACTIVE1_R          (*((reg32_t *)0xE000E304))
00080 #define NVIC_PRI0_R             (*((reg32_t *)0xE000E400))
00081 #define NVIC_PRI1_R             (*((reg32_t *)0xE000E404))
00082 #define NVIC_PRI2_R             (*((reg32_t *)0xE000E408))
00083 #define NVIC_PRI3_R             (*((reg32_t *)0xE000E40C))
00084 #define NVIC_PRI4_R             (*((reg32_t *)0xE000E410))
00085 #define NVIC_PRI5_R             (*((reg32_t *)0xE000E414))
00086 #define NVIC_PRI6_R             (*((reg32_t *)0xE000E418))
00087 #define NVIC_PRI7_R             (*((reg32_t *)0xE000E41C))
00088 #define NVIC_PRI8_R             (*((reg32_t *)0xE000E420))
00089 #define NVIC_PRI9_R             (*((reg32_t *)0xE000E424))
00090 #define NVIC_PRI10_R            (*((reg32_t *)0xE000E428))
00091 #define NVIC_CPUID_R            (*((reg32_t *)0xE000ED00))
00092 #define NVIC_INT_CTRL_R         (*((reg32_t *)0xE000ED04))
00093 #define NVIC_VTABLE_R           (*((reg32_t *)0xE000ED08))
00094 #define NVIC_APINT_R            (*((reg32_t *)0xE000ED0C))
00095 #define NVIC_SYS_CTRL_R         (*((reg32_t *)0xE000ED10))
00096 #define NVIC_CFG_CTRL_R         (*((reg32_t *)0xE000ED14))
00097 #define NVIC_SYS_PRI1_R         (*((reg32_t *)0xE000ED18))
00098 #define NVIC_SYS_PRI2_R         (*((reg32_t *)0xE000ED1C))
00099 #define NVIC_SYS_PRI3_R         (*((reg32_t *)0xE000ED20))
00100 #define NVIC_SYS_HND_CTRL_R     (*((reg32_t *)0xE000ED24))
00101 #define NVIC_FAULT_STAT_R       (*((reg32_t *)0xE000ED28))
00102 #define NVIC_HFAULT_STAT_R      (*((reg32_t *)0xE000ED2C))
00103 #define NVIC_DEBUG_STAT_R       (*((reg32_t *)0xE000ED30))
00104 #define NVIC_MM_ADDR_R          (*((reg32_t *)0xE000ED34))
00105 #define NVIC_FAULT_ADDR_R       (*((reg32_t *)0xE000ED38))
00106 #define NVIC_MPU_TYPE_R         (*((reg32_t *)0xE000ED90))
00107 #define NVIC_MPU_CTRL_R         (*((reg32_t *)0xE000ED94))
00108 #define NVIC_MPU_NUMBER_R       (*((reg32_t *)0xE000ED98))
00109 #define NVIC_MPU_BASE_R         (*((reg32_t *)0xE000ED9C))
00110 #define NVIC_MPU_ATTR_R         (*((reg32_t *)0xE000EDA0))
00111 #define NVIC_DBG_CTRL_R         (*((reg32_t *)0xE000EDF0))
00112 #define NVIC_DBG_XFER_R         (*((reg32_t *)0xE000EDF4))
00113 #define NVIC_DBG_DATA_R         (*((reg32_t *)0xE000EDF8))
00114 #define NVIC_DBG_INT_R          (*((reg32_t *)0xE000EDFC))
00115 #define NVIC_SW_TRIG_R          (*((reg32_t *)0xE000EF00))
00116 /*\}*/
00117
00121 /*\{*/
00122 #define NVIC_INT_TYPE           0xE000E004  ///< Interrupt Controller Type Reg
00123 #define NVIC_ST_CTRL            0xE000E010  ///< SysTick Control and Status Reg
00124 #define NVIC_ST_RELOAD          0xE000E014  ///< SysTick Reload Value Register
00125 #define NVIC_ST_CURRENT         0xE000E018  ///< SysTick Current Value Register
00126 #define NVIC_ST_CAL             0xE000E01C  ///< SysTick Calibration Value Reg
00127 #define NVIC_EN0                0xE000E100  ///< IRQ 0 to 31 Set Enable Register
00128 #define NVIC_EN1                0xE000E104  ///< IRQ 32 to 63 Set Enable Register
00129 #define NVIC_DIS0               0xE000E180  ///< IRQ 0 to 31 Clear Enable Reg
00130 #define NVIC_DIS1               0xE000E184  ///< IRQ 32 to 63 Clear Enable Reg
00131 #define NVIC_PEND0              0xE000E200  ///< IRQ 0 to 31 Set Pending Register
00132 #define NVIC_PEND1              0xE000E204  ///< IRQ 32 to 63 Set Pending Reg
00133 #define NVIC_UNPEND0            0xE000E280  ///< IRQ 0 to 31 Clear Pending Reg
00134 #define NVIC_UNPEND1            0xE000E284  ///< IRQ 32 to 63 Clear Pending Reg
00135 #define NVIC_ACTIVE0            0xE000E300  ///< IRQ 0 to 31 Active Register
00136 #define NVIC_ACTIVE1            0xE000E304  ///< IRQ 32 to 63 Active Register
00137 #define NVIC_PRI0               0xE000E400  ///< IRQ 0 to 3 Priority Register
00138 #define NVIC_PRI1               0xE000E404  ///< IRQ 4 to 7 Priority Register
00139 #define NVIC_PRI2               0xE000E408  ///< IRQ 8 to 11 Priority Register
00140 #define NVIC_PRI3               0xE000E40C  ///< IRQ 12 to 15 Priority Register
00141 #define NVIC_PRI4               0xE000E410  ///< IRQ 16 to 19 Priority Register
00142 #define NVIC_PRI5               0xE000E414  ///< IRQ 20 to 23 Priority Register
00143 #define NVIC_PRI6               0xE000E418  ///< IRQ 24 to 27 Priority Register
00144 #define NVIC_PRI7               0xE000E41C  ///< IRQ 28 to 31 Priority Register
00145 #define NVIC_PRI8               0xE000E420  ///< IRQ 32 to 35 Priority Register
00146 #define NVIC_PRI9               0xE000E424  ///< IRQ 36 to 39 Priority Register
00147 #define NVIC_PRI10              0xE000E428  ///< IRQ 40 to 43 Priority Register
00148 #define NVIC_PRI11              0xE000E42C  ///< IRQ 44 to 47 Priority Register
00149 #define NVIC_PRI12              0xE000E430  ///< IRQ 48 to 51 Priority Register
00150 #define NVIC_PRI13              0xE000E434  ///< IRQ 52 to 55 Priority Register
00151 #define NVIC_CPUID              0xE000ED00  ///< CPUID Base Register
00152 #define NVIC_INT_CTRL           0xE000ED04  ///< Interrupt Control State Register
00153 #define NVIC_VTABLE             0xE000ED08  ///< Vector Table Offset Register
00154 #define NVIC_APINT              0xE000ED0C  ///< App. Int & Reset Control Reg
00155 #define NVIC_SYS_CTRL           0xE000ED10  ///< System Control Register
00156 #define NVIC_CFG_CTRL           0xE000ED14  ///< Configuration Control Register
00157 #define NVIC_SYS_PRI1           0xE000ED18  ///< Sys. Handlers 4 to 7 Priority
00158 #define NVIC_SYS_PRI2           0xE000ED1C  ///< Sys. Handlers 8 to 11 Priority
00159 #define NVIC_SYS_PRI3           0xE000ED20  ///< Sys. Handlers 12 to 15 Priority
00160 #define NVIC_SYS_HND_CTRL       0xE000ED24  ///< System Handler Control and State
00161 #define NVIC_FAULT_STAT         0xE000ED28  ///< Configurable Fault Status Reg
00162 #define NVIC_HFAULT_STAT        0xE000ED2C  ///< Hard Fault Status Register
00163 #define NVIC_DEBUG_STAT         0xE000ED30  ///< Debug Status Register
00164 #define NVIC_MM_ADDR            0xE000ED34  ///< Mem Manage Address Register
00165 #define NVIC_FAULT_ADDR         0xE000ED38  ///< Bus Fault Address Register
00166 #define NVIC_MPU_TYPE           0xE000ED90  ///< MPU Type Register
00167 #define NVIC_MPU_CTRL           0xE000ED94  ///< MPU Control Register
00168 #define NVIC_MPU_NUMBER         0xE000ED98  ///< MPU Region Number Register
00169 #define NVIC_MPU_BASE           0xE000ED9C  ///< MPU Region Base Address Register
00170 #define NVIC_MPU_ATTR           0xE000EDA0  ///< MPU Region Attribute & Size Reg
00171 #define NVIC_DBG_CTRL           0xE000EDF0  ///< Debug Control and Status Reg
00172 #define NVIC_DBG_XFER           0xE000EDF4  ///< Debug Core Reg. Transfer Select
00173 #define NVIC_DBG_DATA           0xE000EDF8  ///< Debug Core Register Data
00174 #define NVIC_DBG_INT            0xE000EDFC  ///< Debug Reset Interrupt Control
00175 #define NVIC_SW_TRIG            0xE000EF00  ///< Software Trigger Interrupt Reg
00176 /*\}*/
00177
00181 /*\{*/
00182 #define NVIC_INT_TYPE_LINES_M   0x0000001F  ///< Number of interrupt lines (x32)
00183 #define NVIC_INT_TYPE_LINES_S   0
00184 /*\}*/
00185
00189 /*\{*/
00190 #define NVIC_ST_CTRL_COUNT      0x00010000  ///< Count flag
00191 #define NVIC_ST_CTRL_CLK_SRC    0x00000004  ///< Clock Source
00192 #define NVIC_ST_CTRL_INTEN      0x00000002  ///< Interrupt enable
00193 #define NVIC_ST_CTRL_ENABLE     0x00000001  ///< Counter mode
00194 /*\}*/
00195
00199 /*\{*/
00200 #define NVIC_ST_RELOAD_M        0x00FFFFFF  ///< Counter load value
00201 #define NVIC_ST_RELOAD_S        0
00202 /*\}*/
00203
00208 /*\{*/
00209 #define NVIC_ST_CURRENT_M       0x00FFFFFF  ///< Counter current value
00210 #define NVIC_ST_CURRENT_S       0
00211 /*\}*/
00212
00216 /*\{*/
00217 #define NVIC_ST_CAL_NOREF       0x80000000  ///< No reference clock
00218 #define NVIC_ST_CAL_SKEW        0x40000000  ///< Clock skew
00219 #define NVIC_ST_CAL_ONEMS_M     0x00FFFFFF  ///< 1ms reference value
00220 #define NVIC_ST_CAL_ONEMS_S     0
00221 /*\}*/
00222
00226 /*\{*/
00227 #define NVIC_EN0_INT31          0x80000000  ///< Interrupt 31 enable
00228 #define NVIC_EN0_INT30          0x40000000  ///< Interrupt 30 enable
00229 #define NVIC_EN0_INT29          0x20000000  ///< Interrupt 29 enable
00230 #define NVIC_EN0_INT28          0x10000000  ///< Interrupt 28 enable
00231 #define NVIC_EN0_INT27          0x08000000  ///< Interrupt 27 enable
00232 #define NVIC_EN0_INT26          0x04000000  ///< Interrupt 26 enable
00233 #define NVIC_EN0_INT25          0x02000000  ///< Interrupt 25 enable
00234 #define NVIC_EN0_INT24          0x01000000  ///< Interrupt 24 enable
00235 #define NVIC_EN0_INT23          0x00800000  ///< Interrupt 23 enable
00236 #define NVIC_EN0_INT22          0x00400000  ///< Interrupt 22 enable
00237 #define NVIC_EN0_INT21          0x00200000  ///< Interrupt 21 enable
00238 #define NVIC_EN0_INT20          0x00100000  ///< Interrupt 20 enable
00239 #define NVIC_EN0_INT19          0x00080000  ///< Interrupt 19 enable
00240 #define NVIC_EN0_INT18          0x00040000  ///< Interrupt 18 enable
00241 #define NVIC_EN0_INT17          0x00020000  ///< Interrupt 17 enable
00242 #define NVIC_EN0_INT16          0x00010000  ///< Interrupt 16 enable
00243 #define NVIC_EN0_INT15          0x00008000  ///< Interrupt 15 enable
00244 #define NVIC_EN0_INT14          0x00004000  ///< Interrupt 14 enable
00245 #define NVIC_EN0_INT13          0x00002000  ///< Interrupt 13 enable
00246 #define NVIC_EN0_INT12          0x00001000  ///< Interrupt 12 enable
00247 #define NVIC_EN0_INT11          0x00000800  ///< Interrupt 11 enable
00248 #define NVIC_EN0_INT10          0x00000400  ///< Interrupt 10 enable
00249 #define NVIC_EN0_INT9           0x00000200  ///< Interrupt 9 enable
00250 #define NVIC_EN0_INT8           0x00000100  ///< Interrupt 8 enable
00251 #define NVIC_EN0_INT7           0x00000080  ///< Interrupt 7 enable
00252 #define NVIC_EN0_INT6           0x00000040  ///< Interrupt 6 enable
00253 #define NVIC_EN0_INT5           0x00000020  ///< Interrupt 5 enable
00254 #define NVIC_EN0_INT4           0x00000010  ///< Interrupt 4 enable
00255 #define NVIC_EN0_INT3           0x00000008  ///< Interrupt 3 enable
00256 #define NVIC_EN0_INT2           0x00000004  ///< Interrupt 2 enable
00257 #define NVIC_EN0_INT1           0x00000002  ///< Interrupt 1 enable
00258 #define NVIC_EN0_INT0           0x00000001  ///< Interrupt 0 enable
00259 /*\}*/
00260
00264 /*\{*/
00265 #define NVIC_EN1_INT59          0x08000000  ///< Interrupt 59 enable
00266 #define NVIC_EN1_INT58          0x04000000  ///< Interrupt 58 enable
00267 #define NVIC_EN1_INT57          0x02000000  ///< Interrupt 57 enable
00268 #define NVIC_EN1_INT56          0x01000000  ///< Interrupt 56 enable
00269 #define NVIC_EN1_INT55          0x00800000  ///< Interrupt 55 enable
00270 #define NVIC_EN1_INT54          0x00400000  ///< Interrupt 54 enable
00271 #define NVIC_EN1_INT53          0x00200000  ///< Interrupt 53 enable
00272 #define NVIC_EN1_INT52          0x00100000  ///< Interrupt 52 enable
00273 #define NVIC_EN1_INT51          0x00080000  ///< Interrupt 51 enable
00274 #define NVIC_EN1_INT50          0x00040000  ///< Interrupt 50 enable
00275 #define NVIC_EN1_INT49          0x00020000  ///< Interrupt 49 enable
00276 #define NVIC_EN1_INT48          0x00010000  ///< Interrupt 48 enable
00277 #define NVIC_EN1_INT47          0x00008000  ///< Interrupt 47 enable
00278 #define NVIC_EN1_INT46          0x00004000  ///< Interrupt 46 enable
00279 #define NVIC_EN1_INT45          0x00002000  ///< Interrupt 45 enable
00280 #define NVIC_EN1_INT44          0x00001000  ///< Interrupt 44 enable
00281 #define NVIC_EN1_INT43          0x00000800  ///< Interrupt 43 enable
00282 #define NVIC_EN1_INT42          0x00000400  ///< Interrupt 42 enable
00283 #define NVIC_EN1_INT41          0x00000200  ///< Interrupt 41 enable
00284 #define NVIC_EN1_INT40          0x00000100  ///< Interrupt 40 enable
00285 #define NVIC_EN1_INT39          0x00000080  ///< Interrupt 39 enable
00286 #define NVIC_EN1_INT38          0x00000040  ///< Interrupt 38 enable
00287 #define NVIC_EN1_INT37          0x00000020  ///< Interrupt 37 enable
00288 #define NVIC_EN1_INT36          0x00000010  ///< Interrupt 36 enable
00289 #define NVIC_EN1_INT35          0x00000008  ///< Interrupt 35 enable
00290 #define NVIC_EN1_INT34          0x00000004  ///< Interrupt 34 enable
00291 #define NVIC_EN1_INT33          0x00000002  ///< Interrupt 33 enable
00292 #define NVIC_EN1_INT32          0x00000001  ///< Interrupt 32 enable
00293 /*\}*/
00294
00298 /*\{*/
00299 #define NVIC_DIS0_INT31         0x80000000  ///< Interrupt 31 disable
00300 #define NVIC_DIS0_INT30         0x40000000  ///< Interrupt 30 disable
00301 #define NVIC_DIS0_INT29         0x20000000  ///< Interrupt 29 disable
00302 #define NVIC_DIS0_INT28         0x10000000  ///< Interrupt 28 disable
00303 #define NVIC_DIS0_INT27         0x08000000  ///< Interrupt 27 disable
00304 #define NVIC_DIS0_INT26         0x04000000  ///< Interrupt 26 disable
00305 #define NVIC_DIS0_INT25         0x02000000  ///< Interrupt 25 disable
00306 #define NVIC_DIS0_INT24         0x01000000  ///< Interrupt 24 disable
00307 #define NVIC_DIS0_INT23         0x00800000  ///< Interrupt 23 disable
00308 #define NVIC_DIS0_INT22         0x00400000  ///< Interrupt 22 disable
00309 #define NVIC_DIS0_INT21         0x00200000  ///< Interrupt 21 disable
00310 #define NVIC_DIS0_INT20         0x00100000  ///< Interrupt 20 disable
00311 #define NVIC_DIS0_INT19         0x00080000  ///< Interrupt 19 disable
00312 #define NVIC_DIS0_INT18         0x00040000  ///< Interrupt 18 disable
00313 #define NVIC_DIS0_INT17         0x00020000  ///< Interrupt 17 disable
00314 #define NVIC_DIS0_INT16         0x00010000  ///< Interrupt 16 disable
00315 #define NVIC_DIS0_INT15         0x00008000  ///< Interrupt 15 disable
00316 #define NVIC_DIS0_INT14         0x00004000  ///< Interrupt 14 disable
00317 #define NVIC_DIS0_INT13         0x00002000  ///< Interrupt 13 disable
00318 #define NVIC_DIS0_INT12         0x00001000  ///< Interrupt 12 disable
00319 #define NVIC_DIS0_INT11         0x00000800  ///< Interrupt 11 disable
00320 #define NVIC_DIS0_INT10         0x00000400  ///< Interrupt 10 disable
00321 #define NVIC_DIS0_INT9          0x00000200  ///< Interrupt 9 disable
00322 #define NVIC_DIS0_INT8          0x00000100  ///< Interrupt 8 disable
00323 #define NVIC_DIS0_INT7          0x00000080  ///< Interrupt 7 disable
00324 #define NVIC_DIS0_INT6          0x00000040  ///< Interrupt 6 disable
00325 #define NVIC_DIS0_INT5          0x00000020  ///< Interrupt 5 disable
00326 #define NVIC_DIS0_INT4          0x00000010  ///< Interrupt 4 disable
00327 #define NVIC_DIS0_INT3          0x00000008  ///< Interrupt 3 disable
00328 #define NVIC_DIS0_INT2          0x00000004  ///< Interrupt 2 disable
00329 #define NVIC_DIS0_INT1          0x00000002  ///< Interrupt 1 disable
00330 #define NVIC_DIS0_INT0          0x00000001  ///< Interrupt 0 disable
00331 /*\}*/
00332
00336 /*\{*/
00337 #define NVIC_DIS1_INT59         0x08000000  ///< Interrupt 59 disable
00338 #define NVIC_DIS1_INT58         0x04000000  ///< Interrupt 58 disable
00339 #define NVIC_DIS1_INT57         0x02000000  ///< Interrupt 57 disable
00340 #define NVIC_DIS1_INT56         0x01000000  ///< Interrupt 56 disable
00341 #define NVIC_DIS1_INT55         0x00800000  ///< Interrupt 55 disable
00342 #define NVIC_DIS1_INT54         0x00400000  ///< Interrupt 54 disable
00343 #define NVIC_DIS1_INT53         0x00200000  ///< Interrupt 53 disable
00344 #define NVIC_DIS1_INT52         0x00100000  ///< Interrupt 52 disable
00345 #define NVIC_DIS1_INT51         0x00080000  ///< Interrupt 51 disable
00346 #define NVIC_DIS1_INT50         0x00040000  ///< Interrupt 50 disable
00347 #define NVIC_DIS1_INT49         0x00020000  ///< Interrupt 49 disable
00348 #define NVIC_DIS1_INT48         0x00010000  ///< Interrupt 48 disable
00349 #define NVIC_DIS1_INT47         0x00008000  ///< Interrupt 47 disable
00350 #define NVIC_DIS1_INT46         0x00004000  ///< Interrupt 46 disable
00351 #define NVIC_DIS1_INT45         0x00002000  ///< Interrupt 45 disable
00352 #define NVIC_DIS1_INT44         0x00001000  ///< Interrupt 44 disable
00353 #define NVIC_DIS1_INT43         0x00000800  ///< Interrupt 43 disable
00354 #define NVIC_DIS1_INT42         0x00000400  ///< Interrupt 42 disable
00355 #define NVIC_DIS1_INT41         0x00000200  ///< Interrupt 41 disable
00356 #define NVIC_DIS1_INT40         0x00000100  ///< Interrupt 40 disable
00357 #define NVIC_DIS1_INT39         0x00000080  ///< Interrupt 39 disable
00358 #define NVIC_DIS1_INT38         0x00000040  ///< Interrupt 38 disable
00359 #define NVIC_DIS1_INT37         0x00000020  ///< Interrupt 37 disable
00360 #define NVIC_DIS1_INT36         0x00000010  ///< Interrupt 36 disable
00361 #define NVIC_DIS1_INT35         0x00000008  ///< Interrupt 35 disable
00362 #define NVIC_DIS1_INT34         0x00000004  ///< Interrupt 34 disable
00363 #define NVIC_DIS1_INT33         0x00000002  ///< Interrupt 33 disable
00364 #define NVIC_DIS1_INT32         0x00000001  ///< Interrupt 32 disable
00365 /*\}*/
00366
00370 /*\{*/
00371 #define NVIC_PEND0_INT31        0x80000000  ///< Interrupt 31 pend
00372 #define NVIC_PEND0_INT30        0x40000000  ///< Interrupt 30 pend
00373 #define NVIC_PEND0_INT29        0x20000000  ///< Interrupt 29 pend
00374 #define NVIC_PEND0_INT28        0x10000000  ///< Interrupt 28 pend
00375 #define NVIC_PEND0_INT27        0x08000000  ///< Interrupt 27 pend
00376 #define NVIC_PEND0_INT26        0x04000000  ///< Interrupt 26 pend
00377 #define NVIC_PEND0_INT25        0x02000000  ///< Interrupt 25 pend
00378 #define NVIC_PEND0_INT24        0x01000000  ///< Interrupt 24 pend
00379 #define NVIC_PEND0_INT23        0x00800000  ///< Interrupt 23 pend
00380 #define NVIC_PEND0_INT22        0x00400000  ///< Interrupt 22 pend
00381 #define NVIC_PEND0_INT21        0x00200000  ///< Interrupt 21 pend
00382 #define NVIC_PEND0_INT20        0x00100000  ///< Interrupt 20 pend
00383 #define NVIC_PEND0_INT19        0x00080000  ///< Interrupt 19 pend
00384 #define NVIC_PEND0_INT18        0x00040000  ///< Interrupt 18 pend
00385 #define NVIC_PEND0_INT17        0x00020000  ///< Interrupt 17 pend
00386 #define NVIC_PEND0_INT16        0x00010000  ///< Interrupt 16 pend
00387 #define NVIC_PEND0_INT15        0x00008000  ///< Interrupt 15 pend
00388 #define NVIC_PEND0_INT14        0x00004000  ///< Interrupt 14 pend
00389 #define NVIC_PEND0_INT13        0x00002000  ///< Interrupt 13 pend
00390 #define NVIC_PEND0_INT12        0x00001000  ///< Interrupt 12 pend
00391 #define NVIC_PEND0_INT11        0x00000800  ///< Interrupt 11 pend
00392 #define NVIC_PEND0_INT10        0x00000400  ///< Interrupt 10 pend
00393 #define NVIC_PEND0_INT9         0x00000200  ///< Interrupt 9 pend
00394 #define NVIC_PEND0_INT8         0x00000100  ///< Interrupt 8 pend
00395 #define NVIC_PEND0_INT7         0x00000080  ///< Interrupt 7 pend
00396 #define NVIC_PEND0_INT6         0x00000040  ///< Interrupt 6 pend
00397 #define NVIC_PEND0_INT5         0x00000020  ///< Interrupt 5 pend
00398 #define NVIC_PEND0_INT4         0x00000010  ///< Interrupt 4 pend
00399 #define NVIC_PEND0_INT3         0x00000008  ///< Interrupt 3 pend
00400 #define NVIC_PEND0_INT2         0x00000004  ///< Interrupt 2 pend
00401 #define NVIC_PEND0_INT1         0x00000002  ///< Interrupt 1 pend
00402 #define NVIC_PEND0_INT0         0x00000001  ///< Interrupt 0 pend
00403 /*\}*/
00404
00408 /*\{*/
00409 #define NVIC_PEND1_INT59        0x08000000  ///< Interrupt 59 pend
00410 #define NVIC_PEND1_INT58        0x04000000  ///< Interrupt 58 pend
00411 #define NVIC_PEND1_INT57        0x02000000  ///< Interrupt 57 pend
00412 #define NVIC_PEND1_INT56        0x01000000  ///< Interrupt 56 pend
00413 #define NVIC_PEND1_INT55        0x00800000  ///< Interrupt 55 pend
00414 #define NVIC_PEND1_INT54        0x00400000  ///< Interrupt 54 pend
00415 #define NVIC_PEND1_INT53        0x00200000  ///< Interrupt 53 pend
00416 #define NVIC_PEND1_INT52        0x00100000  ///< Interrupt 52 pend
00417 #define NVIC_PEND1_INT51        0x00080000  ///< Interrupt 51 pend
00418 #define NVIC_PEND1_INT50        0x00040000  ///< Interrupt 50 pend
00419 #define NVIC_PEND1_INT49        0x00020000  ///< Interrupt 49 pend
00420 #define NVIC_PEND1_INT48        0x00010000  ///< Interrupt 48 pend
00421 #define NVIC_PEND1_INT47        0x00008000  ///< Interrupt 47 pend
00422 #define NVIC_PEND1_INT46        0x00004000  ///< Interrupt 46 pend
00423 #define NVIC_PEND1_INT45        0x00002000  ///< Interrupt 45 pend
00424 #define NVIC_PEND1_INT44        0x00001000  ///< Interrupt 44 pend
00425 #define NVIC_PEND1_INT43        0x00000800  ///< Interrupt 43 pend
00426 #define NVIC_PEND1_INT42        0x00000400  ///< Interrupt 42 pend
00427 #define NVIC_PEND1_INT41        0x00000200  ///< Interrupt 41 pend
00428 #define NVIC_PEND1_INT40        0x00000100  ///< Interrupt 40 pend
00429 #define NVIC_PEND1_INT39        0x00000080  ///< Interrupt 39 pend
00430 #define NVIC_PEND1_INT38        0x00000040  ///< Interrupt 38 pend
00431 #define NVIC_PEND1_INT37        0x00000020  ///< Interrupt 37 pend
00432 #define NVIC_PEND1_INT36        0x00000010  ///< Interrupt 36 pend
00433 #define NVIC_PEND1_INT35        0x00000008  ///< Interrupt 35 pend
00434 #define NVIC_PEND1_INT34        0x00000004  ///< Interrupt 34 pend
00435 #define NVIC_PEND1_INT33        0x00000002  ///< Interrupt 33 pend
00436 #define NVIC_PEND1_INT32        0x00000001  ///< Interrupt 32 pend
00437 /*\}*/
00438
00442 /*\{*/
00443 #define NVIC_UNPEND0_INT31      0x80000000  ///< Interrupt 31 unpend
00444 #define NVIC_UNPEND0_INT30      0x40000000  ///< Interrupt 30 unpend
00445 #define NVIC_UNPEND0_INT29      0x20000000  ///< Interrupt 29 unpend
00446 #define NVIC_UNPEND0_INT28      0x10000000  ///< Interrupt 28 unpend
00447 #define NVIC_UNPEND0_INT27      0x08000000  ///< Interrupt 27 unpend
00448 #define NVIC_UNPEND0_INT26      0x04000000  ///< Interrupt 26 unpend
00449 #define NVIC_UNPEND0_INT25      0x02000000  ///< Interrupt 25 unpend
00450 #define NVIC_UNPEND0_INT24      0x01000000  ///< Interrupt 24 unpend
00451 #define NVIC_UNPEND0_INT23      0x00800000  ///< Interrupt 23 unpend
00452 #define NVIC_UNPEND0_INT22      0x00400000  ///< Interrupt 22 unpend
00453 #define NVIC_UNPEND0_INT21      0x00200000  ///< Interrupt 21 unpend
00454 #define NVIC_UNPEND0_INT20      0x00100000  ///< Interrupt 20 unpend
00455 #define NVIC_UNPEND0_INT19      0x00080000  ///< Interrupt 19 unpend
00456 #define NVIC_UNPEND0_INT18      0x00040000  ///< Interrupt 18 unpend
00457 #define NVIC_UNPEND0_INT17      0x00020000  ///< Interrupt 17 unpend
00458 #define NVIC_UNPEND0_INT16      0x00010000  ///< Interrupt 16 unpend
00459 #define NVIC_UNPEND0_INT15      0x00008000  ///< Interrupt 15 unpend
00460 #define NVIC_UNPEND0_INT14      0x00004000  ///< Interrupt 14 unpend
00461 #define NVIC_UNPEND0_INT13      0x00002000  ///< Interrupt 13 unpend
00462 #define NVIC_UNPEND0_INT12      0x00001000  ///< Interrupt 12 unpend
00463 #define NVIC_UNPEND0_INT11      0x00000800  ///< Interrupt 11 unpend
00464 #define NVIC_UNPEND0_INT10      0x00000400  ///< Interrupt 10 unpend
00465 #define NVIC_UNPEND0_INT9       0x00000200  ///< Interrupt 9 unpend
00466 #define NVIC_UNPEND0_INT8       0x00000100  ///< Interrupt 8 unpend
00467 #define NVIC_UNPEND0_INT7       0x00000080  ///< Interrupt 7 unpend
00468 #define NVIC_UNPEND0_INT6       0x00000040  ///< Interrupt 6 unpend
00469 #define NVIC_UNPEND0_INT5       0x00000020  ///< Interrupt 5 unpend
00470 #define NVIC_UNPEND0_INT4       0x00000010  ///< Interrupt 4 unpend
00471 #define NVIC_UNPEND0_INT3       0x00000008  ///< Interrupt 3 unpend
00472 #define NVIC_UNPEND0_INT2       0x00000004  ///< Interrupt 2 unpend
00473 #define NVIC_UNPEND0_INT1       0x00000002  ///< Interrupt 1 unpend
00474 #define NVIC_UNPEND0_INT0       0x00000001  ///< Interrupt 0 unpend
00475 /*\}*/
00476
00480 /*\{*/
00481 #define NVIC_UNPEND1_INT59      0x08000000  ///< Interrupt 59 unpend
00482 #define NVIC_UNPEND1_INT58      0x04000000  ///< Interrupt 58 unpend
00483 #define NVIC_UNPEND1_INT57      0x02000000  ///< Interrupt 57 unpend
00484 #define NVIC_UNPEND1_INT56      0x01000000  ///< Interrupt 56 unpend
00485 #define NVIC_UNPEND1_INT55      0x00800000  ///< Interrupt 55 unpend
00486 #define NVIC_UNPEND1_INT54      0x00400000  ///< Interrupt 54 unpend
00487 #define NVIC_UNPEND1_INT53      0x00200000  ///< Interrupt 53 unpend
00488 #define NVIC_UNPEND1_INT52      0x00100000  ///< Interrupt 52 unpend
00489 #define NVIC_UNPEND1_INT51      0x00080000  ///< Interrupt 51 unpend
00490 #define NVIC_UNPEND1_INT50      0x00040000  ///< Interrupt 50 unpend
00491 #define NVIC_UNPEND1_INT49      0x00020000  ///< Interrupt 49 unpend
00492 #define NVIC_UNPEND1_INT48      0x00010000  ///< Interrupt 48 unpend
00493 #define NVIC_UNPEND1_INT47      0x00008000  ///< Interrupt 47 unpend
00494 #define NVIC_UNPEND1_INT46      0x00004000  ///< Interrupt 46 unpend
00495 #define NVIC_UNPEND1_INT45      0x00002000  ///< Interrupt 45 unpend
00496 #define NVIC_UNPEND1_INT44      0x00001000  ///< Interrupt 44 unpend
00497 #define NVIC_UNPEND1_INT43      0x00000800  ///< Interrupt 43 unpend
00498 #define NVIC_UNPEND1_INT42      0x00000400  ///< Interrupt 42 unpend
00499 #define NVIC_UNPEND1_INT41      0x00000200  ///< Interrupt 41 unpend
00500 #define NVIC_UNPEND1_INT40      0x00000100  ///< Interrupt 40 unpend
00501 #define NVIC_UNPEND1_INT39      0x00000080  ///< Interrupt 39 unpend
00502 #define NVIC_UNPEND1_INT38      0x00000040  ///< Interrupt 38 unpend
00503 #define NVIC_UNPEND1_INT37      0x00000020  ///< Interrupt 37 unpend
00504 #define NVIC_UNPEND1_INT36      0x00000010  ///< Interrupt 36 unpend
00505 #define NVIC_UNPEND1_INT35      0x00000008  ///< Interrupt 35 unpend
00506 #define NVIC_UNPEND1_INT34      0x00000004  ///< Interrupt 34 unpend
00507 #define NVIC_UNPEND1_INT33      0x00000002  ///< Interrupt 33 unpend
00508 #define NVIC_UNPEND1_INT32      0x00000001  ///< Interrupt 32 unpend
00509 /*\}*/
00510
00514 /*\{*/
00515 #define NVIC_ACTIVE0_INT31      0x80000000  ///< Interrupt 31 active
00516 #define NVIC_ACTIVE0_INT30      0x40000000  ///< Interrupt 30 active
00517 #define NVIC_ACTIVE0_INT29      0x20000000  ///< Interrupt 29 active
00518 #define NVIC_ACTIVE0_INT28      0x10000000  ///< Interrupt 28 active
00519 #define NVIC_ACTIVE0_INT27      0x08000000  ///< Interrupt 27 active
00520 #define NVIC_ACTIVE0_INT26      0x04000000  ///< Interrupt 26 active
00521 #define NVIC_ACTIVE0_INT25      0x02000000  ///< Interrupt 25 active
00522 #define NVIC_ACTIVE0_INT24      0x01000000  ///< Interrupt 24 active
00523 #define NVIC_ACTIVE0_INT23      0x00800000  ///< Interrupt 23 active
00524 #define NVIC_ACTIVE0_INT22      0x00400000  ///< Interrupt 22 active
00525 #define NVIC_ACTIVE0_INT21      0x00200000  ///< Interrupt 21 active
00526 #define NVIC_ACTIVE0_INT20      0x00100000  ///< Interrupt 20 active
00527 #define NVIC_ACTIVE0_INT19      0x00080000  ///< Interrupt 19 active
00528 #define NVIC_ACTIVE0_INT18      0x00040000  ///< Interrupt 18 active
00529 #define NVIC_ACTIVE0_INT17      0x00020000  ///< Interrupt 17 active
00530 #define NVIC_ACTIVE0_INT16      0x00010000  ///< Interrupt 16 active
00531 #define NVIC_ACTIVE0_INT15      0x00008000  ///< Interrupt 15 active
00532 #define NVIC_ACTIVE0_INT14      0x00004000  ///< Interrupt 14 active
00533 #define NVIC_ACTIVE0_INT13      0x00002000  ///< Interrupt 13 active
00534 #define NVIC_ACTIVE0_INT12      0x00001000  ///< Interrupt 12 active
00535 #define NVIC_ACTIVE0_INT11      0x00000800  ///< Interrupt 11 active
00536 #define NVIC_ACTIVE0_INT10      0x00000400  ///< Interrupt 10 active
00537 #define NVIC_ACTIVE0_INT9       0x00000200  ///< Interrupt 9 active
00538 #define NVIC_ACTIVE0_INT8       0x00000100  ///< Interrupt 8 active
00539 #define NVIC_ACTIVE0_INT7       0x00000080  ///< Interrupt 7 active
00540 #define NVIC_ACTIVE0_INT6       0x00000040  ///< Interrupt 6 active
00541 #define NVIC_ACTIVE0_INT5       0x00000020  ///< Interrupt 5 active
00542 #define NVIC_ACTIVE0_INT4       0x00000010  ///< Interrupt 4 active
00543 #define NVIC_ACTIVE0_INT3       0x00000008  ///< Interrupt 3 active
00544 #define NVIC_ACTIVE0_INT2       0x00000004  ///< Interrupt 2 active
00545 #define NVIC_ACTIVE0_INT1       0x00000002  ///< Interrupt 1 active
00546 #define NVIC_ACTIVE0_INT0       0x00000001  ///< Interrupt 0 active
00547 /*\}*/
00548
00552 /*\{*/
00553 #define NVIC_ACTIVE1_INT59      0x08000000  ///< Interrupt 59 active
00554 #define NVIC_ACTIVE1_INT58      0x04000000  ///< Interrupt 58 active
00555 #define NVIC_ACTIVE1_INT57      0x02000000  ///< Interrupt 57 active
00556 #define NVIC_ACTIVE1_INT56      0x01000000  ///< Interrupt 56 active
00557 #define NVIC_ACTIVE1_INT55      0x00800000  ///< Interrupt 55 active
00558 #define NVIC_ACTIVE1_INT54      0x00400000  ///< Interrupt 54 active
00559 #define NVIC_ACTIVE1_INT53      0x00200000  ///< Interrupt 53 active
00560 #define NVIC_ACTIVE1_INT52      0x00100000  ///< Interrupt 52 active
00561 #define NVIC_ACTIVE1_INT51      0x00080000  ///< Interrupt 51 active
00562 #define NVIC_ACTIVE1_INT50      0x00040000  ///< Interrupt 50 active
00563 #define NVIC_ACTIVE1_INT49      0x00020000  ///< Interrupt 49 active
00564 #define NVIC_ACTIVE1_INT48      0x00010000  ///< Interrupt 48 active
00565 #define NVIC_ACTIVE1_INT47      0x00008000  ///< Interrupt 47 active
00566 #define NVIC_ACTIVE1_INT46      0x00004000  ///< Interrupt 46 active
00567 #define NVIC_ACTIVE1_INT45      0x00002000  ///< Interrupt 45 active
00568 #define NVIC_ACTIVE1_INT44      0x00001000  ///< Interrupt 44 active
00569 #define NVIC_ACTIVE1_INT43      0x00000800  ///< Interrupt 43 active
00570 #define NVIC_ACTIVE1_INT42      0x00000400  ///< Interrupt 42 active
00571 #define NVIC_ACTIVE1_INT41      0x00000200  ///< Interrupt 41 active
00572 #define NVIC_ACTIVE1_INT40      0x00000100  ///< Interrupt 40 active
00573 #define NVIC_ACTIVE1_INT39      0x00000080  ///< Interrupt 39 active
00574 #define NVIC_ACTIVE1_INT38      0x00000040  ///< Interrupt 38 active
00575 #define NVIC_ACTIVE1_INT37      0x00000020  ///< Interrupt 37 active
00576 #define NVIC_ACTIVE1_INT36      0x00000010  ///< Interrupt 36 active
00577 #define NVIC_ACTIVE1_INT35      0x00000008  ///< Interrupt 35 active
00578 #define NVIC_ACTIVE1_INT34      0x00000004  ///< Interrupt 34 active
00579 #define NVIC_ACTIVE1_INT33      0x00000002  ///< Interrupt 33 active
00580 #define NVIC_ACTIVE1_INT32      0x00000001  ///< Interrupt 32 active
00581 /*\}*/
00582
00586 /*\{*/
00587 #define NVIC_PRI0_INT3_M        0xFF000000  ///< Interrupt 3 priority mask
00588 #define NVIC_PRI0_INT2_M        0x00FF0000  ///< Interrupt 2 priority mask
00589 #define NVIC_PRI0_INT1_M        0x0000FF00  ///< Interrupt 1 priority mask
00590 #define NVIC_PRI0_INT0_M        0x000000FF  ///< Interrupt 0 priority mask
00591 #define NVIC_PRI0_INT3_S        24
00592 #define NVIC_PRI0_INT2_S        16
00593 #define NVIC_PRI0_INT1_S        8
00594 #define NVIC_PRI0_INT0_S        0
00595 /*\}*/
00596
00600 /*\{*/
00601 #define NVIC_PRI1_INT7_M        0xFF000000  ///< Interrupt 7 priority mask
00602 #define NVIC_PRI1_INT6_M        0x00FF0000  ///< Interrupt 6 priority mask
00603 #define NVIC_PRI1_INT5_M        0x0000FF00  ///< Interrupt 5 priority mask
00604 #define NVIC_PRI1_INT4_M        0x000000FF  ///< Interrupt 4 priority mask
00605 #define NVIC_PRI1_INT7_S        24
00606 #define NVIC_PRI1_INT6_S        16
00607 #define NVIC_PRI1_INT5_S        8
00608 #define NVIC_PRI1_INT4_S        0
00609 /*\}*/
00610
00614 /*\{*/
00615 #define NVIC_PRI2_INT11_M       0xFF000000  ///< Interrupt 11 priority mask
00616 #define NVIC_PRI2_INT10_M       0x00FF0000  ///< Interrupt 10 priority mask
00617 #define NVIC_PRI2_INT9_M        0x0000FF00  ///< Interrupt 9 priority mask
00618 #define NVIC_PRI2_INT8_M        0x000000FF  ///< Interrupt 8 priority mask
00619 #define NVIC_PRI2_INT11_S       24
00620 #define NVIC_PRI2_INT10_S       16
00621 #define NVIC_PRI2_INT9_S        8
00622 #define NVIC_PRI2_INT8_S        0
00623 /*\}*/
00624
00628 /*\{*/
00629 #define NVIC_PRI3_INT15_M       0xFF000000  ///< Interrupt 15 priority mask
00630 #define NVIC_PRI3_INT14_M       0x00FF0000  ///< Interrupt 14 priority mask
00631 #define NVIC_PRI3_INT13_M       0x0000FF00  ///< Interrupt 13 priority mask
00632 #define NVIC_PRI3_INT12_M       0x000000FF  ///< Interrupt 12 priority mask
00633 #define NVIC_PRI3_INT15_S       24
00634 #define NVIC_PRI3_INT14_S       16
00635 #define NVIC_PRI3_INT13_S       8
00636 #define NVIC_PRI3_INT12_S       0
00637 /*\}*/
00638
00642 /*\{*/
00643 #define NVIC_PRI4_INT19_M       0xFF000000  ///< Interrupt 19 priority mask
00644 #define NVIC_PRI4_INT18_M       0x00FF0000  ///< Interrupt 18 priority mask
00645 #define NVIC_PRI4_INT17_M       0x0000FF00  ///< Interrupt 17 priority mask
00646 #define NVIC_PRI4_INT16_M       0x000000FF  ///< Interrupt 16 priority mask
00647 #define NVIC_PRI4_INT19_S       24
00648 #define NVIC_PRI4_INT18_S       16
00649 #define NVIC_PRI4_INT17_S       8
00650 #define NVIC_PRI4_INT16_S       0
00651 /*\}*/
00652
00656 /*\{*/
00657 #define NVIC_PRI5_INT23_M       0xFF000000  ///< Interrupt 23 priority mask
00658 #define NVIC_PRI5_INT22_M       0x00FF0000  ///< Interrupt 22 priority mask
00659 #define NVIC_PRI5_INT21_M       0x0000FF00  ///< Interrupt 21 priority mask
00660 #define NVIC_PRI5_INT20_M       0x000000FF  ///< Interrupt 20 priority mask
00661 #define NVIC_PRI5_INT23_S       24
00662 #define NVIC_PRI5_INT22_S       16
00663 #define NVIC_PRI5_INT21_S       8
00664 #define NVIC_PRI5_INT20_S       0
00665 /*\}*/
00666
00670 /*\{*/
00671 #define NVIC_PRI6_INT27_M       0xFF000000  ///< Interrupt 27 priority mask
00672 #define NVIC_PRI6_INT26_M       0x00FF0000  ///< Interrupt 26 priority mask
00673 #define NVIC_PRI6_INT25_M       0x0000FF00  ///< Interrupt 25 priority mask
00674 #define NVIC_PRI6_INT24_M       0x000000FF  ///< Interrupt 24 priority mask
00675 #define NVIC_PRI6_INT27_S       24
00676 #define NVIC_PRI6_INT26_S       16
00677 #define NVIC_PRI6_INT25_S       8
00678 #define NVIC_PRI6_INT24_S       0
00679 /*\}*/
00680
00684 /*\{*/
00685 #define NVIC_PRI7_INT31_M       0xFF000000  ///< Interrupt 31 priority mask
00686 #define NVIC_PRI7_INT30_M       0x00FF0000  ///< Interrupt 30 priority mask
00687 #define NVIC_PRI7_INT29_M       0x0000FF00  ///< Interrupt 29 priority mask
00688 #define NVIC_PRI7_INT28_M       0x000000FF  ///< Interrupt 28 priority mask
00689 #define NVIC_PRI7_INT31_S       24
00690 #define NVIC_PRI7_INT30_S       16
00691 #define NVIC_PRI7_INT29_S       8
00692 #define NVIC_PRI7_INT28_S       0
00693 /*\}*/
00694
00698 /*\{*/
00699 #define NVIC_PRI8_INT35_M       0xFF000000  ///< Interrupt 35 priority mask
00700 #define NVIC_PRI8_INT34_M       0x00FF0000  ///< Interrupt 34 priority mask
00701 #define NVIC_PRI8_INT33_M       0x0000FF00  ///< Interrupt 33 priority mask
00702 #define NVIC_PRI8_INT32_M       0x000000FF  ///< Interrupt 32 priority mask
00703 #define NVIC_PRI8_INT35_S       24
00704 #define NVIC_PRI8_INT34_S       16
00705 #define NVIC_PRI8_INT33_S       8
00706 #define NVIC_PRI8_INT32_S       0
00707 /*\}*/
00708
00712 /*\{*/
00713 #define NVIC_PRI9_INT39_M       0xFF000000  ///< Interrupt 39 priority mask
00714 #define NVIC_PRI9_INT38_M       0x00FF0000  ///< Interrupt 38 priority mask
00715 #define NVIC_PRI9_INT37_M       0x0000FF00  ///< Interrupt 37 priority mask
00716 #define NVIC_PRI9_INT36_M       0x000000FF  ///< Interrupt 36 priority mask
00717 #define NVIC_PRI9_INT39_S       24
00718 #define NVIC_PRI9_INT38_S       16
00719 #define NVIC_PRI9_INT37_S       8
00720 #define NVIC_PRI9_INT36_S       0
00721 /*\}*/
00722
00726 /*\{*/
00727 #define NVIC_PRI10_INT43_M      0xFF000000  ///< Interrupt 43 priority mask
00728 #define NVIC_PRI10_INT42_M      0x00FF0000  ///< Interrupt 42 priority mask
00729 #define NVIC_PRI10_INT41_M      0x0000FF00  ///< Interrupt 41 priority mask
00730 #define NVIC_PRI10_INT40_M      0x000000FF  ///< Interrupt 40 priority mask
00731 #define NVIC_PRI10_INT43_S      24
00732 #define NVIC_PRI10_INT42_S      16
00733 #define NVIC_PRI10_INT41_S      8
00734 #define NVIC_PRI10_INT40_S      0
00735 /*\}*/
00736
00740 /*\{*/
00741 #define NVIC_CPUID_IMP_M        0xFF000000  ///< Implementer
00742 #define NVIC_CPUID_VAR_M        0x00F00000  ///< Variant
00743 #define NVIC_CPUID_PARTNO_M     0x0000FFF0  ///< Processor part number
00744 #define NVIC_CPUID_REV_M        0x0000000F  ///< Revision
00745 /*\}*/
00746
00750 /*\{*/
00751 #define NVIC_INT_CTRL_NMI_SET   0x80000000  ///< Pend a NMI
00752 #define NVIC_INT_CTRL_PEND_SV   0x10000000  ///< Pend a PendSV
00753 #define NVIC_INT_CTRL_UNPEND_SV 0x08000000  ///< Unpend a PendSV
00754 #define NVIC_INT_CTRL_PENDSTSET 0x04000000  ///< Set pending SysTick interrupt
00755 #define NVIC_INT_CTRL_PENDSTCLR 0x02000000  ///< Clear pending SysTick interrupt
00756 #define NVIC_INT_CTRL_ISR_PRE   0x00800000  ///< Debug interrupt handling
00757 #define NVIC_INT_CTRL_ISR_PEND  0x00400000  ///< Debug interrupt pending
00758 #define NVIC_INT_CTRL_VEC_PEN_M 0x003FF000  ///< Highest pending exception
00759 #define NVIC_INT_CTRL_RET_BASE  0x00000800  ///< Return to base
00760 #define NVIC_INT_CTRL_VEC_ACT_M 0x000003FF  ///< Current active exception
00761 #define NVIC_INT_CTRL_VEC_PEN_S 12
00762 #define NVIC_INT_CTRL_VEC_ACT_S 0
00763 /*\}*/
00764
00768 /*\{*/
00769 #define NVIC_VTABLE_BASE        0x20000000  ///< Vector table base
00770 #define NVIC_VTABLE_OFFSET_M    0x1FFFFF00  ///< Vector table offset
00771 #define NVIC_VTABLE_OFFSET_S    8
00772 /*\}*/
00773
00777 /*\{*/
00778 #define NVIC_APINT_VECTKEY_M    0xFFFF0000  ///< Vector key mask
00779 #define NVIC_APINT_VECTKEY      0x05FA0000  ///< Vector key
00780 #define NVIC_APINT_ENDIANESS    0x00008000  ///< Data endianess
00781 #define NVIC_APINT_PRIGROUP_M   0x00000700  ///< Priority group
00782 #define NVIC_APINT_PRIGROUP_0_8 0x00000700  ///< Priority group 0.8 split
00783 #define NVIC_APINT_PRIGROUP_1_7 0x00000600  ///< Priority group 1.7 split
00784 #define NVIC_APINT_PRIGROUP_2_6 0x00000500  ///< Priority group 2.6 split
00785 #define NVIC_APINT_PRIGROUP_3_5 0x00000400  ///< Priority group 3.5 split
00786 #define NVIC_APINT_PRIGROUP_4_4 0x00000300  ///< Priority group 4.4 split
00787 #define NVIC_APINT_PRIGROUP_5_3 0x00000200  ///< Priority group 5.3 split
00788 #define NVIC_APINT_PRIGROUP_6_2 0x00000100  ///< Priority group 6.2 split
00789 #define NVIC_APINT_SYSRESETREQ  0x00000004  ///< System reset request
00790 #define NVIC_APINT_VECT_CLR_ACT 0x00000002  ///< Clear active NMI/fault info
00791 #define NVIC_APINT_VECT_RESET   0x00000001  ///< System reset
00792 #define NVIC_APINT_PRIGROUP_7_1 0x00000000  ///< Priority group 7.1 split
00793 /*\}*/
00794
00798 /*\{*/
00799 #define NVIC_SYS_CTRL_SEVONPEND 0x00000010  ///< Wakeup on pend
00800 #define NVIC_SYS_CTRL_SLEEPDEEP 0x00000004  ///< Deep sleep enable
00801 #define NVIC_SYS_CTRL_SLEEPEXIT 0x00000002  ///< Sleep on ISR exit
00802 /*\}*/
00803
00807 /*\{*/
00808 #define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100  ///< Ignore bus fault in NMI/fault
00809 #define NVIC_CFG_CTRL_DIV0      0x00000010  ///< Trap on divide by 0
00810 #define NVIC_CFG_CTRL_UNALIGNED 0x00000008  ///< Trap on unaligned access
00811 #define NVIC_CFG_CTRL_DEEP_PEND 0x00000004  ///< Allow deep interrupt trigger
00812 #define NVIC_CFG_CTRL_MAIN_PEND 0x00000002  ///< Allow main interrupt trigger
00813 #define NVIC_CFG_CTRL_BASE_THR  0x00000001  ///< Thread state control
00814 /*\}*/
00815
00819 /*\{*/
00820 #define NVIC_SYS_PRI1_RES_M     0xFF000000  ///< Priority of reserved handler
00821 #define NVIC_SYS_PRI1_USAGE_M   0x00FF0000  ///< Priority of usage fault handler
00822 #define NVIC_SYS_PRI1_BUS_M     0x0000FF00  ///< Priority of bus fault handler
00823 #define NVIC_SYS_PRI1_MEM_M     0x000000FF  ///< Priority of mem manage handler
00824 #define NVIC_SYS_PRI1_USAGE_S   16
00825 #define NVIC_SYS_PRI1_BUS_S     8
00826 #define NVIC_SYS_PRI1_MEM_S     0
00827 /*\}*/
00828
00832 /*\{*/
00833 #define NVIC_SYS_PRI2_SVC_M     0xFF000000  ///< Priority of SVCall handler
00834 #define NVIC_SYS_PRI2_RES_M     0x00FFFFFF  ///< Priority of reserved handlers
00835 #define NVIC_SYS_PRI2_SVC_S     24
00836 /*\}*/
00837
00841 /*\{*/
00842 #define NVIC_SYS_PRI3_TICK_M    0xFF000000  ///< Priority of Sys Tick handler
00843 #define NVIC_SYS_PRI3_PENDSV_M  0x00FF0000  ///< Priority of PendSV handler
00844 #define NVIC_SYS_PRI3_RES_M     0x0000FF00  ///< Priority of reserved handler
00845 #define NVIC_SYS_PRI3_DEBUG_M   0x000000FF  ///< Priority of debug handler
00846 #define NVIC_SYS_PRI3_TICK_S    24
00847 #define NVIC_SYS_PRI3_PENDSV_S  16
00848 #define NVIC_SYS_PRI3_DEBUG_S   0
00849 /*\}*/
00850
00855 /*\{*/
00856 #define NVIC_SYS_HND_CTRL_USAGE 0x00040000  ///< Usage fault enable
00857 #define NVIC_SYS_HND_CTRL_BUS   0x00020000  ///< Bus fault enable
00858 #define NVIC_SYS_HND_CTRL_MEM   0x00010000  ///< Mem manage fault enable
00859 #define NVIC_SYS_HND_CTRL_SVC   0x00008000  ///< SVCall is pended
00860 #define NVIC_SYS_HND_CTRL_BUSP  0x00004000  ///< Bus fault is pended
00861 #define NVIC_SYS_HND_CTRL_TICK  0x00000800  ///< Sys tick is active
00862 #define NVIC_SYS_HND_CTRL_PNDSV 0x00000400  ///< PendSV is active
00863 #define NVIC_SYS_HND_CTRL_MON   0x00000100  ///< Monitor is active
00864 #define NVIC_SYS_HND_CTRL_SVCA  0x00000080  ///< SVCall is active
00865 #define NVIC_SYS_HND_CTRL_USGA  0x00000008  ///< Usage fault is active
00866 #define NVIC_SYS_HND_CTRL_BUSA  0x00000002  ///< Bus fault is active
00867 #define NVIC_SYS_HND_CTRL_MEMA  0x00000001  ///< Mem manage is active
00868 /*\}*/
00869
00874 /*\{*/
00875 #define NVIC_FAULT_STAT_DIV0    0x02000000  ///< Divide by zero fault
00876 #define NVIC_FAULT_STAT_UNALIGN 0x01000000  ///< Unaligned access fault
00877 #define NVIC_FAULT_STAT_NOCP    0x00080000  ///< No coprocessor fault
00878 #define NVIC_FAULT_STAT_INVPC   0x00040000  ///< Invalid PC fault
00879 #define NVIC_FAULT_STAT_INVSTAT 0x00020000  ///< Invalid state fault
00880 #define NVIC_FAULT_STAT_UNDEF   0x00010000  ///< Undefined instruction fault
00881 #define NVIC_FAULT_STAT_BFARV   0x00008000  ///< BFAR is valid
00882 #define NVIC_FAULT_STAT_BSTKE   0x00001000  ///< Stack bus fault
00883 #define NVIC_FAULT_STAT_BUSTKE  0x00000800  ///< Unstack bus fault
00884 #define NVIC_FAULT_STAT_IMPRE   0x00000400  ///< Imprecise data bus error
00885 #define NVIC_FAULT_STAT_PRECISE 0x00000200  ///< Precise data bus error
00886 #define NVIC_FAULT_STAT_IBUS    0x00000100  ///< Instruction bus fault
00887 #define NVIC_FAULT_STAT_MMARV   0x00000080  ///< MMAR is valid
00888 #define NVIC_FAULT_STAT_MSTKE   0x00000010  ///< Stack access violation
00889 #define NVIC_FAULT_STAT_MUSTKE  0x00000008  ///< Unstack access violation
00890 #define NVIC_FAULT_STAT_DERR    0x00000002  ///< Data access violation
00891 #define NVIC_FAULT_STAT_IERR    0x00000001  ///< Instruction access violation
00892 /*\}*/
00893
00898 /*\{*/
00899 #define NVIC_HFAULT_STAT_DBG    0x80000000  ///< Debug event
00900 #define NVIC_HFAULT_STAT_FORCED 0x40000000  ///< Cannot execute fault handler
00901 #define NVIC_HFAULT_STAT_VECT   0x00000002  ///< Vector table read fault
00902 /*\}*/
00903
00908 /*\{*/
00909 #define NVIC_DEBUG_STAT_EXTRNL  0x00000010  ///< EDBGRQ asserted
00910 #define NVIC_DEBUG_STAT_VCATCH  0x00000008  ///< Vector catch
00911 #define NVIC_DEBUG_STAT_DWTTRAP 0x00000004  ///< DWT match
00912 #define NVIC_DEBUG_STAT_BKPT    0x00000002  ///< Breakpoint instruction
00913 #define NVIC_DEBUG_STAT_HALTED  0x00000001  ///< Halt request
00914 /*\}*/
00915
00919 /*\{*/
00920 #define NVIC_MM_ADDR_M          0xFFFFFFFF  ///< Data fault address
00921 #define NVIC_MM_ADDR_S          0
00922 /*\}*/
00923
00928 /*\{*/
00929 #define NVIC_FAULT_ADDR_M       0xFFFFFFFF  ///< Data bus fault address
00930 #define NVIC_FAULT_ADDR_S       0
00931 /*\}*/
00932
00936 /*\{*/
00937 #define NVIC_MPU_TYPE_IREGION_M 0x00FF0000  ///< Number of I regions
00938 #define NVIC_MPU_TYPE_DREGION_M 0x0000FF00  ///< Number of D regions
00939 #define NVIC_MPU_TYPE_SEPARATE  0x00000001  ///< Separate or unified MPU
00940 #define NVIC_MPU_TYPE_IREGION_S 16
00941 #define NVIC_MPU_TYPE_DREGION_S 8
00942 /*\}*/
00943
00947 /*\{*/
00948 #define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004  ///< MPU default region in priv mode
00949 #define NVIC_MPU_CTRL_HFNMIENA  0x00000002  ///< MPU enabled during faults
00950 #define NVIC_MPU_CTRL_ENABLE    0x00000001  ///< MPU enable
00951 /*\}*/
00952
00957 /*\{*/
00958 #define NVIC_MPU_NUMBER_M       0x000000FF  ///< MPU region to access
00959 #define NVIC_MPU_NUMBER_S       0
00960 /*\}*/
00961
00965 /*\{*/
00966 #define NVIC_MPU_BASE_ADDR_M    0xFFFFFFE0  ///< Base address mask
00967 #define NVIC_MPU_BASE_VALID     0x00000010  ///< Region number valid
00968 #define NVIC_MPU_BASE_REGION_M  0x0000000F  ///< Region number
00969 #define NVIC_MPU_BASE_ADDR_S    8
00970 #define NVIC_MPU_BASE_REGION_S  0
00971 /*\}*/
00972
00976 /*\{*/
00977 #define NVIC_MPU_ATTR_M         0xFFFF0000  ///< Attributes
00978 #define NVIC_MPU_ATTR_AP_NO_NO  0x00000000  ///< prv: no access, usr: no access
00979 #define NVIC_MPU_ATTR_BUFFRABLE 0x00010000  ///< Bufferable
00980 #define NVIC_MPU_ATTR_CACHEABLE 0x00020000  ///< Cacheable
00981 #define NVIC_MPU_ATTR_SHAREABLE 0x00040000  ///< Shareable
00982 #define NVIC_MPU_ATTR_TEX_M     0x00380000  ///< Type extension mask
00983 #define NVIC_MPU_ATTR_AP_RW_NO  0x01000000  ///< prv: rw, usr: none
00984 #define NVIC_MPU_ATTR_AP_RW_RO  0x02000000  ///< prv: rw, usr: read-only
00985 #define NVIC_MPU_ATTR_AP_RW_RW  0x03000000  ///< prv: rw, usr: rw
00986 #define NVIC_MPU_ATTR_AP_RO_NO  0x05000000  ///< prv: ro, usr: none
00987 #define NVIC_MPU_ATTR_AP_RO_RO  0x06000000  ///< prv: ro, usr: ro
00988 #define NVIC_MPU_ATTR_AP_M      0x07000000  ///< Access permissions mask
00989 #define NVIC_MPU_ATTR_XN        0x10000000  ///< Execute disable
00990 #define NVIC_MPU_ATTR_SRD_M     0x0000FF00  ///< Sub-region disable mask
00991 #define NVIC_MPU_ATTR_SRD_0     0x00000100  ///< Sub-region 0 disable
00992 #define NVIC_MPU_ATTR_SRD_1     0x00000200  ///< Sub-region 1 disable
00993 #define NVIC_MPU_ATTR_SRD_2     0x00000400  ///< Sub-region 2 disable
00994 #define NVIC_MPU_ATTR_SRD_3     0x00000800  ///< Sub-region 3 disable
00995 #define NVIC_MPU_ATTR_SRD_4     0x00001000  ///< Sub-region 4 disable
00996 #define NVIC_MPU_ATTR_SRD_5     0x00002000  ///< Sub-region 5 disable
00997 #define NVIC_MPU_ATTR_SRD_6     0x00004000  ///< Sub-region 6 disable
00998 #define NVIC_MPU_ATTR_SRD_7     0x00008000  ///< Sub-region 7 disable
00999 #define NVIC_MPU_ATTR_SIZE_M    0x0000003E  ///< Region size mask
01000 #define NVIC_MPU_ATTR_SIZE_32B  0x00000008  ///< Region size 32 bytes
01001 #define NVIC_MPU_ATTR_SIZE_64B  0x0000000A  ///< Region size 64 bytes
01002 #define NVIC_MPU_ATTR_SIZE_128B 0x0000000C  ///< Region size 128 bytes
01003 #define NVIC_MPU_ATTR_SIZE_256B 0x0000000E  ///< Region size 256 bytes
01004 #define NVIC_MPU_ATTR_SIZE_512B 0x00000010  ///< Region size 512 bytes
01005 #define NVIC_MPU_ATTR_SIZE_1K   0x00000012  ///< Region size 1 Kbytes
01006 #define NVIC_MPU_ATTR_SIZE_2K   0x00000014  ///< Region size 2 Kbytes
01007 #define NVIC_MPU_ATTR_SIZE_4K   0x00000016  ///< Region size 4 Kbytes
01008 #define NVIC_MPU_ATTR_SIZE_8K   0x00000018  ///< Region size 8 Kbytes
01009 #define NVIC_MPU_ATTR_SIZE_16K  0x0000001A  ///< Region size 16 Kbytes
01010 #define NVIC_MPU_ATTR_SIZE_32K  0x0000001C  ///< Region size 32 Kbytes
01011 #define NVIC_MPU_ATTR_SIZE_64K  0x0000001E  ///< Region size 64 Kbytes
01012 #define NVIC_MPU_ATTR_SIZE_128K 0x00000020  ///< Region size 128 Kbytes
01013 #define NVIC_MPU_ATTR_SIZE_256K 0x00000022  ///< Region size 256 Kbytes
01014 #define NVIC_MPU_ATTR_SIZE_512K 0x00000024  ///< Region size 512 Kbytes
01015 #define NVIC_MPU_ATTR_SIZE_1M   0x00000026  ///< Region size 1 Mbytes
01016 #define NVIC_MPU_ATTR_SIZE_2M   0x00000028  ///< Region size 2 Mbytes
01017 #define NVIC_MPU_ATTR_SIZE_4M   0x0000002A  ///< Region size 4 Mbytes
01018 #define NVIC_MPU_ATTR_SIZE_8M   0x0000002C  ///< Region size 8 Mbytes
01019 #define NVIC_MPU_ATTR_SIZE_16M  0x0000002E  ///< Region size 16 Mbytes
01020 #define NVIC_MPU_ATTR_SIZE_32M  0x00000030  ///< Region size 32 Mbytes
01021 #define NVIC_MPU_ATTR_SIZE_64M  0x00000032  ///< Region size 64 Mbytes
01022 #define NVIC_MPU_ATTR_SIZE_128M 0x00000034  ///< Region size 128 Mbytes
01023 #define NVIC_MPU_ATTR_SIZE_256M 0x00000036  ///< Region size 256 Mbytes
01024 #define NVIC_MPU_ATTR_SIZE_512M 0x00000038  ///< Region size 512 Mbytes
01025 #define NVIC_MPU_ATTR_SIZE_1G   0x0000003A  ///< Region size 1 Gbytes
01026 #define NVIC_MPU_ATTR_SIZE_2G   0x0000003C  ///< Region size 2 Gbytes
01027 #define NVIC_MPU_ATTR_SIZE_4G   0x0000003E  ///< Region size 4 Gbytes
01028 #define NVIC_MPU_ATTR_ENABLE    0x00000001  ///< Region enable
01029 /*\}*/
01030
01034 /*\{*/
01035 #define NVIC_DBG_CTRL_DBGKEY_M  0xFFFF0000  ///< Debug key mask
01036 #define NVIC_DBG_CTRL_DBGKEY    0xA05F0000  ///< Debug key
01037 #define NVIC_DBG_CTRL_S_RESET_ST \
01038                                 0x02000000  ///< Core has reset since last read
01039 #define NVIC_DBG_CTRL_S_RETIRE_ST \
01040                                 0x01000000  ///< Core has executed insruction
01041
01042 #define NVIC_DBG_CTRL_S_LOCKUP  0x00080000  ///< Core is locked up
01043 #define NVIC_DBG_CTRL_S_SLEEP   0x00040000  ///< Core is sleeping
01044 #define NVIC_DBG_CTRL_S_HALT    0x00020000  ///< Core status on halt
01045 #define NVIC_DBG_CTRL_S_REGRDY  0x00010000  ///< Register read/write available
01046 #define NVIC_DBG_CTRL_C_SNAPSTALL \
01047                                 0x00000020  ///< Breaks a stalled load/store
01048 #define NVIC_DBG_CTRL_C_MASKINT 0x00000008  ///< Mask interrupts when stepping
01049 #define NVIC_DBG_CTRL_C_STEP    0x00000004  ///< Step the core
01050 #define NVIC_DBG_CTRL_C_HALT    0x00000002  ///< Halt the core
01051 #define NVIC_DBG_CTRL_C_DEBUGEN 0x00000001  ///< Enable debug
01052 /*\}*/
01053
01057 /*\{*/
01058 #define NVIC_DBG_XFER_REG_WNR   0x00010000  ///< Write or not read
01059 #define NVIC_DBG_XFER_REG_SEL_M 0x0000001F  ///< Register
01060 #define NVIC_DBG_XFER_REG_CFBP  0x00000014  ///< Control/Fault/BasePri/PriMask
01061 #define NVIC_DBG_XFER_REG_DSP   0x00000013  ///< Deep SP
01062 #define NVIC_DBG_XFER_REG_PSP   0x00000012  ///< Process SP
01063 #define NVIC_DBG_XFER_REG_MSP   0x00000011  ///< Main SP
01064 #define NVIC_DBG_XFER_REG_FLAGS 0x00000010  ///< xPSR/Flags register
01065 #define NVIC_DBG_XFER_REG_R15   0x0000000F  ///< Register R15
01066 #define NVIC_DBG_XFER_REG_R14   0x0000000E  ///< Register R14
01067 #define NVIC_DBG_XFER_REG_R13   0x0000000D  ///< Register R13
01068 #define NVIC_DBG_XFER_REG_R12   0x0000000C  ///< Register R12
01069 #define NVIC_DBG_XFER_REG_R11   0x0000000B  ///< Register R11
01070 #define NVIC_DBG_XFER_REG_R10   0x0000000A  ///< Register R10
01071 #define NVIC_DBG_XFER_REG_R9    0x00000009  ///< Register R9
01072 #define NVIC_DBG_XFER_REG_R8    0x00000008  ///< Register R8
01073 #define NVIC_DBG_XFER_REG_R7    0x00000007  ///< Register R7
01074 #define NVIC_DBG_XFER_REG_R6    0x00000006  ///< Register R6
01075 #define NVIC_DBG_XFER_REG_R5    0x00000005  ///< Register R5
01076 #define NVIC_DBG_XFER_REG_R4    0x00000004  ///< Register R4
01077 #define NVIC_DBG_XFER_REG_R3    0x00000003  ///< Register R3
01078 #define NVIC_DBG_XFER_REG_R2    0x00000002  ///< Register R2
01079 #define NVIC_DBG_XFER_REG_R1    0x00000001  ///< Register R1
01080 #define NVIC_DBG_XFER_REG_R0    0x00000000  ///< Register R0
01081 /*\}*/
01082
01086 /*\{*/
01087 #define NVIC_DBG_DATA_M         0xFFFFFFFF  ///< Data temporary cache
01088 #define NVIC_DBG_DATA_S         0
01089 /*\}*/
01090
01094 /*\{*/
01095 #define NVIC_DBG_INT_HARDERR    0x00000400  ///< Debug trap on hard fault
01096 #define NVIC_DBG_INT_INTERR     0x00000200  ///< Debug trap on interrupt errors
01097 #define NVIC_DBG_INT_BUSERR     0x00000100  ///< Debug trap on bus error
01098 #define NVIC_DBG_INT_STATERR    0x00000080  ///< Debug trap on usage fault state
01099 #define NVIC_DBG_INT_CHKERR     0x00000040  ///< Debug trap on usage fault check
01100 #define NVIC_DBG_INT_NOCPERR    0x00000020  ///< Debug trap on coprocessor error
01101 #define NVIC_DBG_INT_MMERR      0x00000010  ///< Debug trap on mem manage fault
01102 #define NVIC_DBG_INT_RESET      0x00000008  ///< Core reset status
01103 #define NVIC_DBG_INT_RSTPENDCLR 0x00000004  ///< Clear pending core reset
01104 #define NVIC_DBG_INT_RSTPENDING 0x00000002  ///< Core reset is pending
01105 #define NVIC_DBG_INT_RSTVCATCH  0x00000001  ///< Reset vector catch
01106 /*\}*/
01107
01111 /*\{*/
01112 #define NVIC_SW_TRIG_INTID_M    0x000003FF  ///< Interrupt to trigger
01113 #define NVIC_SW_TRIG_INTID_S    0
01114 /*\}*/
01115
01116 #endif /* SAM3_NVIC_H */


BeRTOS: sam3_pio.h File Reference

  • cpu
  • cortex-m3
  • io
Defines
sam3_pio.h File Reference

Go to the source code of this file.

Defines

#define | PIO_PERIPH_SEL(base, mask, function)
Set peripheral on I/O ports.
#define | PIOA_BASE 0x400E0E00
PIO registers base addresses.
#define | PIOB_BASE 0x400E1000
PIO registers base addresses.
#define | PIOC_BASE 0x400E1200
PIO registers base addresses.
#define | PIO_PER_OFF 0x00000000
PIO Register Offsets.
#define | PIO_PDR_OFF 0x00000004
PIO disable register offset.
#define | PIO_PSR_OFF 0x00000008
PIO status register offset.
#define | PIO_OER_OFF 0x00000010
Output enable register offset.
#define | PIO_ODR_OFF 0x00000014
Output disable register offset.
#define | PIO_OSR_OFF 0x00000018
Output status register offset.
#define | PIO_IFER_OFF 0x00000020
Input filter enable register offset.
#define | PIO_IFDR_OFF 0x00000024
Input filter disable register offset.
#define | PIO_IFSR_OFF 0x00000028
Input filter status register offset.
#define | PIO_SODR_OFF 0x00000030
Set output data register offset.
#define | PIO_CODR_OFF 0x00000034
Clear output data register offset.
#define | PIO_ODSR_OFF 0x00000038
Output data status register offset.
#define | PIO_PDSR_OFF 0x0000003C
Pin data status register offset.
#define | PIO_IER_OFF 0x00000040
Interrupt enable register offset.
#define | PIO_IDR_OFF 0x00000044
Interrupt disable register offset.
#define | PIO_IMR_OFF 0x00000048
Interrupt mask register offset.
#define | PIO_ISR_OFF 0x0000004C
Interrupt status register offset.
#define | PIO_MDER_OFF 0x00000050
Multi-driver enable register offset.
#define | PIO_MDDR_OFF 0x00000054
Multi-driver disable register offset.
#define | PIO_MDSR_OFF 0x00000058
Multi-driver status register offset.
#define | PIO_PUDR_OFF 0x00000060
Pull-up disable register offset.
#define | PIO_PUER_OFF 0x00000064
Pull-up enable register offset.
#define | PIO_PUSR_OFF 0x00000068
Pull-up status register offset.
#define | PIO_OWER_OFF 0x000000A0
PIO output write enable register offset.
#define | PIO_OWDR_OFF 0x000000A4
PIO output write disable register offset.
#define | PIO_OWSR_OFF 0x000000A8
PIO output write status register offset.
#define | PIOA_ACCESS(offset) (*((reg32_t *)(PIOA_BASE + (offset))))
PIO A Register Addresses.
#define | PIOA_PER PIOA_ACCESS(PIO_PER_OFF)
PIO enable register address.
#define | PIOA_PDR PIOA_ACCESS(PIO_PDR_OFF)
PIO disable register address.
#define | PIOA_PSR PIOA_ACCESS(PIO_PSR_OFF)
PIO status register address.
#define | PIOA_OER PIOA_ACCESS(PIO_OER_OFF)
Output enable register address.
#define | PIOA_ODR PIOA_ACCESS(PIO_ODR_OFF)
Output disable register address.
#define | PIOA_OSR PIOA_ACCESS(PIO_OSR_OFF)
Output status register address.
#define | PIOA_IFER PIOA_ACCESS(PIO_IFER_OFF)
Input filter enable register address.
#define | PIOA_IFDR PIOA_ACCESS(PIO_IFDR_OFF)
Input filter disable register address.
#define | PIOA_IFSR PIOA_ACCESS(PIO_IFSR_OFF)
Input filter status register address.
#define | PIOA_SODR PIOA_ACCESS(PIO_SODR_OFF)
Set output data register address.
#define | PIOA_CODR PIOA_ACCESS(PIO_CODR_OFF)
Clear output data register address.
#define | PIOA_ODSR PIOA_ACCESS(PIO_ODSR_OFF)
Output data status register address.
#define | PIOA_PDSR PIOA_ACCESS(PIO_PDSR_OFF)
Pin data status register address.
#define | PIOA_IER PIOA_ACCESS(PIO_IER_OFF)
Interrupt enable register address.
#define | PIOA_IDR PIOA_ACCESS(PIO_IDR_OFF)
Interrupt disable register address.
#define | PIOA_IMR PIOA_ACCESS(PIO_IMR_OFF)
Interrupt mask register address.
#define | PIOA_ISR PIOA_ACCESS(PIO_ISR_OFF)
Interrupt status register address.
#define | PIOA_MDER PIOA_ACCESS(PIO_MDER_OFF)
Multi-driver enable register address.
#define | PIOA_MDDR PIOA_ACCESS(PIO_MDDR_OFF)
Multi-driver disable register address.
#define | PIOA_MDSR PIOA_ACCESS(PIO_MDSR_OFF)
Multi-driver status register address.
#define | PIOA_PUDR PIOA_ACCESS(PIO_PUDR_OFF)
Pull-up disable register address.
#define | PIOA_PUER PIOA_ACCESS(PIO_PUER_OFF)
Pull-up enable register address.
#define | PIOA_PUSR PIOA_ACCESS(PIO_PUSR_OFF)
Pull-up status register address.
#define | PIOA_ABCDSR1 PIOA_ACCESS(PIO_ABCDSR1_OFF)
PIO peripheral select register 1 address.
#define | PIOA_ABCDSR2 PIOA_ACCESS(PIO_ABCDSR2_OFF)
PIO peripheral select register 2 address.
#define | PIOA_OWER PIOA_ACCESS(PIO_OWER_OFF)
PIO output write enable register address.
#define | PIOA_OWDR PIOA_ACCESS(PIO_OWDR_OFF)
PIO output write disable register address.
#define | PIOA_OWSR PIOA_ACCESS(PIO_OWSR_OFF)
PIO output write status register address.
#define | PIOB_ACCESS(offset) (*((reg32_t *)(PIOB_BASE + (offset))))
PIO B Register Addresses.
#define | PIOB_PER PIOB_ACCESS(PIO_PER_OFF)
PIO enable register address.
#define | PIOB_PDR PIOB_ACCESS(PIO_PDR_OFF)
PIO disable register address.
#define | PIOB_PSR PIOB_ACCESS(PIO_PSR_OFF)
PIO status register address.
#define | PIOB_OER PIOB_ACCESS(PIO_OER_OFF)
Output enable register address.
#define | PIOB_ODR PIOB_ACCESS(PIO_ODR_OFF)
Output disable register address.
#define | PIOB_OSR PIOB_ACCESS(PIO_OSR_OFF)
Output status register address.
#define | PIOB_IFER PIOB_ACCESS(PIO_IFER_OFF)
Input filter enable register address.
#define | PIOB_IFDR PIOB_ACCESS(PIO_IFDR_OFF)
Input filter disable register address.
#define | PIOB_IFSR PIOB_ACCESS(PIO_IFSR_OFF)
Input filter status register address.
#define | PIOB_SODR PIOB_ACCESS(PIO_SODR_OFF)
Set output data register address.
#define | PIOB_CODR PIOB_ACCESS(PIO_CODR_OFF)
Clear output data register address.
#define | PIOB_ODSR PIOB_ACCESS(PIO_ODSR_OFF)
Output data status register address.
#define | PIOB_PDSR PIOB_ACCESS(PIO_PDSR_OFF)
Pin data status register address.
#define | PIOB_IER PIOB_ACCESS(PIO_IER_OFF)
Interrupt enable register address.
#define | PIOB_IDR PIOB_ACCESS(PIO_IDR_OFF)
Interrupt disable register address.
#define | PIOB_IMR PIOB_ACCESS(PIO_IMR_OFF)
Interrupt mask register address.
#define | PIOB_ISR PIOB_ACCESS(PIO_ISR_OFF)
Interrupt status register address.
#define | PIOB_MDER PIOB_ACCESS(PIO_MDER_OFF)
Multi-driver enable register address.
#define | PIOB_MDDR PIOB_ACCESS(PIO_MDDR_OFF)
Multi-driver disable register address.
#define | PIOB_MDSR PIOB_ACCESS(PIO_MDSR_OFF)
Multi-driver status register address.
#define | PIOB_PUDR PIOB_ACCESS(PIO_PUDR_OFF)
Pull-up disable register address.
#define | PIOB_PUER PIOB_ACCESS(PIO_PUER_OFF)
Pull-up enable register address.
#define | PIOB_PUSR PIOB_ACCESS(PIO_PUSR_OFF)
Pull-up status register address.
#define | PIOB_ABCDSR1 PIOB_ACCESS(PIO_ABCDSR1_OFF)
PIO peripheral select register 1 address.
#define | PIOB_ABCDSR2 PIOB_ACCESS(PIO_ABCDSR2_OFF)
PIO peripheral select register 2 address.
#define | PIOB_OWER PIOB_ACCESS(PIO_OWER_OFF)
PIO output write enable register address.
#define | PIOB_OWDR PIOB_ACCESS(PIO_OWDR_OFF)
PIO output write disable register address.
#define | PIOB_OWSR PIOB_ACCESS(PIO_OWSR_OFF)
PIO output write status register address.
#define | PIOC_ACCESS(offset) (*((reg32_t *)(PIOC_BASE + (offset))))
PIO C Register Addresses.
#define | PIOC_PER PIOC_ACCESS(PIO_PER_OFF)
PIO enable register address.
#define | PIOC_PDR PIOC_ACCESS(PIO_PDR_OFF)
PIO disable register address.
#define | PIOC_PSR PIOC_ACCESS(PIO_PSR_OFF)
PIO status register address.
#define | PIOC_OER PIOC_ACCESS(PIO_OER_OFF)
Output enable register address.
#define | PIOC_ODR PIOC_ACCESS(PIO_ODR_OFF)
Output disable register address.
#define | PIOC_OSR PIOC_ACCESS(PIO_OSR_OFF)
Output status register address.
#define | PIOC_IFER PIOC_ACCESS(PIO_IFER_OFF)
Input filter enable register address.
#define | PIOC_IFDR PIOC_ACCESS(PIO_IFDR_OFF)
Input filter disable register address.
#define | PIOC_IFSR PIOC_ACCESS(PIO_IFSR_OFF)
Input filter status register address.
#define | PIOC_SODR PIOC_ACCESS(PIO_SODR_OFF)
Set output data register address.
#define | PIOC_CODR PIOC_ACCESS(PIO_CODR_OFF)
Clear output data register address.
#define | PIOC_ODSR PIOC_ACCESS(PIO_ODSR_OFF)
Output data status register address.
#define | PIOC_PDSR PIOC_ACCESS(PIO_PDSR_OFF)
Pin data status register address.
#define | PIOC_IER PIOC_ACCESS(PIO_IER_OFF)
Interrupt enable register address.
#define | PIOC_IDR PIOC_ACCESS(PIO_IDR_OFF)
Interrupt disable register address.
#define | PIOC_IMR PIOC_ACCESS(PIO_IMR_OFF)
Interrupt mask register address.
#define | PIOC_ISR PIOC_ACCESS(PIO_ISR_OFF)
Interrupt status register address.
#define | PIOC_MDER PIOC_ACCESS(PIO_MDER_OFF)
Multi-driver enable register address.
#define | PIOC_MDDR PIOC_ACCESS(PIO_MDDR_OFF)
Multi-driver disable register address.
#define | PIOC_MDSR PIOC_ACCESS(PIO_MDSR_OFF)
Multi-driver status register address.
#define | PIOC_PUDR PIOC_ACCESS(PIO_PUDR_OFF)
Pull-up disable register address.
#define | PIOC_PUER PIOC_ACCESS(PIO_PUER_OFF)
Pull-up enable register address.
#define | PIOC_PUSR PIOC_ACCESS(PIO_PUSR_OFF)
Pull-up status register address.
#define | PIOC_ABCDSR1 PIOC_ACCESS(PIO_ABCDSR1_OFF)
PIO peripheral select register 1 address.
#define | PIOC_ABCDSR2 PIOC_ACCESS(PIO_ABCDSR2_OFF)
PIO peripheral select register 2 address.
#define | PIOC_OWER PIOC_ACCESS(PIO_OWER_OFF)
PIO output write enable register address.
#define | PIOC_OWDR PIOC_ACCESS(PIO_OWDR_OFF)
PIO output write disable register address.
#define | PIOC_OWSR PIOC_ACCESS(PIO_OWSR_OFF)
PIO output write status register address.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

Atmel SAM3 Parallel input/output controller. This file is based on NUT/OS implementation. See license below.

Definition in file sam3_pio.h.

Define Documentation

#define PIO_PER_OFF 0x00000000

PIO Register Offsets.

PIO enable register offset.

Definition at line 92 of file sam3_pio.h.

#define PIO_PERIPH_SEL | ( | base,
 |  | mask,
 |  | function
 | ) |
Value:
do { \
        HWREG((base) + PIO_ABSR_OFF) &= ~(mask); \
        if ((function) & 1) \
            HWREG((base) + PIO_ABSR_OFF) |= (mask); \
    } while (0)

Set peripheral on I/O ports.

Parameters:
base | PIO port base
mask | mask of I/O pin to manipulate
function | function to assign to selected pins (PIO_PERIPH_A, B, ...)

Definition at line 394 of file sam3_pio.h.


BeRTOS: sam3_pio.h Source File

  • cpu
  • cortex-m3
  • io
sam3_pio.h
Go to the documentation of this file.
00001
00040 /*
00041  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00042  *
00043  * Redistribution and use in source and binary forms, with or without
00044  * modification, are permitted provided that the following conditions
00045  * are met:
00046  *
00047  * 1. Redistributions of source code must retain the above copyright
00048  *    notice, this list of conditions and the following disclaimer.
00049  * 2. Redistributions in binary form must reproduce the above copyright
00050  *    notice, this list of conditions and the following disclaimer in the
00051  *    documentation and/or other materials provided with the distribution.
00052  * 3. Neither the name of the copyright holders nor the names of
00053  *    contributors may be used to endorse or promote products derived
00054  *    from this software without specific prior written permission.
00055  *
00056  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00057  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00058  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00059  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00060  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00062  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00063  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00064  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00065  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00066  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00067  * SUCH DAMAGE.
00068  *
00069  * For additional information see http://www.ethernut.de/
00070  */
00071
00072 #ifndef SAM3_PIO_H
00073 #define SAM3_PIO_H
00074
00078 /*\{*/
00079 #define PIOA_BASE  0x400E0E00
00080 #define PIOB_BASE  0x400E1000
00081 #define PIOC_BASE  0x400E1200
00082
00083 #if CPU_CM3_SAM3X
00084     #define PIOD_BASE  0x400E1400
00085     #define PIOE_BASE  0x400E1600
00086     #define PIOF_BASE  0x400E1800
00087 #endif
00088 /*\}*/
00089
00091 /*\{*/
00092 #define PIO_PER_OFF     0x00000000  ///< PIO enable register offset.
00093 #define PIO_PDR_OFF     0x00000004  ///< PIO disable register offset.
00094 #define PIO_PSR_OFF     0x00000008  ///< PIO status register offset.
00095 #define PIO_OER_OFF     0x00000010  ///< Output enable register offset.
00096 #define PIO_ODR_OFF     0x00000014  ///< Output disable register offset.
00097 #define PIO_OSR_OFF     0x00000018  ///< Output status register offset.
00098 #define PIO_IFER_OFF    0x00000020  ///< Input filter enable register offset.
00099 #define PIO_IFDR_OFF    0x00000024  ///< Input filter disable register offset.
00100 #define PIO_IFSR_OFF    0x00000028  ///< Input filter status register offset.
00101 #define PIO_SODR_OFF    0x00000030  ///< Set output data register offset.
00102 #define PIO_CODR_OFF    0x00000034  ///< Clear output data register offset.
00103 #define PIO_ODSR_OFF    0x00000038  ///< Output data status register offset.
00104 #define PIO_PDSR_OFF    0x0000003C  ///< Pin data status register offset.
00105 #define PIO_IER_OFF     0x00000040  ///< Interrupt enable register offset.
00106 #define PIO_IDR_OFF     0x00000044  ///< Interrupt disable register offset.
00107 #define PIO_IMR_OFF     0x00000048  ///< Interrupt mask register offset.
00108 #define PIO_ISR_OFF     0x0000004C  ///< Interrupt status register offset.
00109 #define PIO_MDER_OFF    0x00000050  ///< Multi-driver enable register offset.
00110 #define PIO_MDDR_OFF    0x00000054  ///< Multi-driver disable register offset.
00111 #define PIO_MDSR_OFF    0x00000058  ///< Multi-driver status register offset.
00112 #define PIO_PUDR_OFF    0x00000060  ///< Pull-up disable register offset.
00113 #define PIO_PUER_OFF    0x00000064  ///< Pull-up enable register offset.
00114 #define PIO_PUSR_OFF    0x00000068  ///< Pull-up status register offset.
00115 #if CPU_CM3_SAM3X || CPU_CM3_SAM3U
00116     #define PIO_ABSR_OFF     0x00000070  ///< PIO peripheral select register offset.
00117 #elif CPU_CM3_SAM3N || CPU_CM3_SAM3S
00118     #define PIO_ABCDSR1_OFF  0x00000070  ///< PIO peripheral select register 1 offset.
00119     #define PIO_ABCDSR2_OFF  0x00000074  ///< PIO peripheral select register 2 offset.
00120 #else
00121     #error Undefined PIO peripheral select register for selected cpu
00122 #endif
00123 #define PIO_OWER_OFF    0x000000A0  ///< PIO output write enable register offset.
00124 #define PIO_OWDR_OFF    0x000000A4  ///< PIO output write disable register offset.
00125 #define PIO_OWSR_OFF    0x000000A8  ///< PIO output write status register offset.
00126 /*\}*/
00127
00128
00129 #if defined(PIOA_BASE)
00130
00131     /*\{*/
00132     #define PIOA_ACCESS(offset) (*((reg32_t *)(PIOA_BASE + (offset))))
00133
00134     #define PIOA_PER      PIOA_ACCESS(PIO_PER_OFF)       ///< PIO enable register address.
00135     #define PIOA_PDR      PIOA_ACCESS(PIO_PDR_OFF)       ///< PIO disable register address.
00136     #define PIOA_PSR      PIOA_ACCESS(PIO_PSR_OFF)       ///< PIO status register address.
00137     #define PIOA_OER      PIOA_ACCESS(PIO_OER_OFF)       ///< Output enable register address.
00138     #define PIOA_ODR      PIOA_ACCESS(PIO_ODR_OFF)       ///< Output disable register address.
00139     #define PIOA_OSR      PIOA_ACCESS(PIO_OSR_OFF)       ///< Output status register address.
00140     #define PIOA_IFER     PIOA_ACCESS(PIO_IFER_OFF)      ///< Input filter enable register address.
00141     #define PIOA_IFDR     PIOA_ACCESS(PIO_IFDR_OFF)      ///< Input filter disable register address.
00142     #define PIOA_IFSR     PIOA_ACCESS(PIO_IFSR_OFF)      ///< Input filter status register address.
00143     #define PIOA_SODR     PIOA_ACCESS(PIO_SODR_OFF)      ///< Set output data register address.
00144     #define PIOA_CODR     PIOA_ACCESS(PIO_CODR_OFF)      ///< Clear output data register address.
00145     #define PIOA_ODSR     PIOA_ACCESS(PIO_ODSR_OFF)      ///< Output data status register address.
00146     #define PIOA_PDSR     PIOA_ACCESS(PIO_PDSR_OFF)      ///< Pin data status register address.
00147     #define PIOA_IER      PIOA_ACCESS(PIO_IER_OFF)       ///< Interrupt enable register address.
00148     #define PIOA_IDR      PIOA_ACCESS(PIO_IDR_OFF)       ///< Interrupt disable register address.
00149     #define PIOA_IMR      PIOA_ACCESS(PIO_IMR_OFF)       ///< Interrupt mask register address.
00150     #define PIOA_ISR      PIOA_ACCESS(PIO_ISR_OFF)       ///< Interrupt status register address.
00151     #define PIOA_MDER     PIOA_ACCESS(PIO_MDER_OFF)      ///< Multi-driver enable register address.
00152     #define PIOA_MDDR     PIOA_ACCESS(PIO_MDDR_OFF)      ///< Multi-driver disable register address.
00153     #define PIOA_MDSR     PIOA_ACCESS(PIO_MDSR_OFF)      ///< Multi-driver status register address.
00154     #define PIOA_PUDR     PIOA_ACCESS(PIO_PUDR_OFF)      ///< Pull-up disable register address.
00155     #define PIOA_PUER     PIOA_ACCESS(PIO_PUER_OFF)      ///< Pull-up enable register address.
00156     #define PIOA_PUSR     PIOA_ACCESS(PIO_PUSR_OFF)      ///< Pull-up status register address.
00157 #ifdef PIO_ABSR_OFF
00158     #define PIOA_ABSR     PIOA_ACCESS(PIO_ABSR_OFF)      ///< PIO peripheral select register address.
00159 #else
00160     #define PIOA_ABCDSR1  PIOA_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 1 address.
00161     #define PIOA_ABCDSR2  PIOA_ACCESS(PIO_ABCDSR2_OFF)   ///< PIO peripheral select register 2 address.
00162 #endif
00163     #define PIOA_OWER     PIOA_ACCESS(PIO_OWER_OFF)      ///< PIO output write enable register address.
00164     #define PIOA_OWDR     PIOA_ACCESS(PIO_OWDR_OFF)      ///< PIO output write disable register address.
00165     #define PIOA_OWSR     PIOA_ACCESS(PIO_OWSR_OFF)      ///< PIO output write status register address.
00166     /*\}*/
00167 #endif /* PIOA_BASE */
00168
00169 #if defined(PIOB_BASE)
00170
00171     /*\{*/
00172     #define PIOB_ACCESS(offset) (*((reg32_t *)(PIOB_BASE + (offset))))
00173
00174     #define PIOB_PER      PIOB_ACCESS(PIO_PER_OFF)       ///< PIO enable register address.
00175     #define PIOB_PDR      PIOB_ACCESS(PIO_PDR_OFF)       ///< PIO disable register address.
00176     #define PIOB_PSR      PIOB_ACCESS(PIO_PSR_OFF)       ///< PIO status register address.
00177     #define PIOB_OER      PIOB_ACCESS(PIO_OER_OFF)       ///< Output enable register address.
00178     #define PIOB_ODR      PIOB_ACCESS(PIO_ODR_OFF)       ///< Output disable register address.
00179     #define PIOB_OSR      PIOB_ACCESS(PIO_OSR_OFF)       ///< Output status register address.
00180     #define PIOB_IFER     PIOB_ACCESS(PIO_IFER_OFF)      ///< Input filter enable register address.
00181     #define PIOB_IFDR     PIOB_ACCESS(PIO_IFDR_OFF)      ///< Input filter disable register address.
00182     #define PIOB_IFSR     PIOB_ACCESS(PIO_IFSR_OFF)      ///< Input filter status register address.
00183     #define PIOB_SODR     PIOB_ACCESS(PIO_SODR_OFF)      ///< Set output data register address.
00184     #define PIOB_CODR     PIOB_ACCESS(PIO_CODR_OFF)      ///< Clear output data register address.
00185     #define PIOB_ODSR     PIOB_ACCESS(PIO_ODSR_OFF)      ///< Output data status register address.
00186     #define PIOB_PDSR     PIOB_ACCESS(PIO_PDSR_OFF)      ///< Pin data status register address.
00187     #define PIOB_IER      PIOB_ACCESS(PIO_IER_OFF)       ///< Interrupt enable register address.
00188     #define PIOB_IDR      PIOB_ACCESS(PIO_IDR_OFF)       ///< Interrupt disable register address.
00189     #define PIOB_IMR      PIOB_ACCESS(PIO_IMR_OFF)       ///< Interrupt mask register address.
00190     #define PIOB_ISR      PIOB_ACCESS(PIO_ISR_OFF)       ///< Interrupt status register address.
00191     #define PIOB_MDER     PIOB_ACCESS(PIO_MDER_OFF)      ///< Multi-driver enable register address.
00192     #define PIOB_MDDR     PIOB_ACCESS(PIO_MDDR_OFF)      ///< Multi-driver disable register address.
00193     #define PIOB_MDSR     PIOB_ACCESS(PIO_MDSR_OFF)      ///< Multi-driver status register address.
00194     #define PIOB_PUDR     PIOB_ACCESS(PIO_PUDR_OFF)      ///< Pull-up disable register address.
00195     #define PIOB_PUER     PIOB_ACCESS(PIO_PUER_OFF)      ///< Pull-up enable register address.
00196     #define PIOB_PUSR     PIOB_ACCESS(PIO_PUSR_OFF)      ///< Pull-up status register address.
00197 #ifdef PIO_ABSR_OFF
00198     #define PIOB_ABSR     PIOB_ACCESS(PIO_ABSR_OFF)      ///< PIO peripheral select register address.
00199 #else
00200     #define PIOB_ABCDSR1  PIOB_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 1 address.
00201     #define PIOB_ABCDSR2  PIOB_ACCESS(PIO_ABCDSR2_OFF)   ///< PIO peripheral select register 2 address.
00202 #endif
00203     #define PIOB_OWER     PIOB_ACCESS(PIO_OWER_OFF)      ///< PIO output write enable register address.
00204     #define PIOB_OWDR     PIOB_ACCESS(PIO_OWDR_OFF)      ///< PIO output write disable register address.
00205     #define PIOB_OWSR     PIOB_ACCESS(PIO_OWSR_OFF)      ///< PIO output write status register address.
00206     /*\}*/
00207 #endif /* PIOB_BASE */
00208
00209 #if defined(PIOC_BASE)
00210
00211     /*\{*/
00212     #define PIOC_ACCESS(offset) (*((reg32_t *)(PIOC_BASE + (offset))))
00213
00214     #define PIOC_PER      PIOC_ACCESS(PIO_PER_OFF)       ///< PIO enable register address.
00215     #define PIOC_PDR      PIOC_ACCESS(PIO_PDR_OFF)       ///< PIO disable register address.
00216     #define PIOC_PSR      PIOC_ACCESS(PIO_PSR_OFF)       ///< PIO status register address.
00217     #define PIOC_OER      PIOC_ACCESS(PIO_OER_OFF)       ///< Output enable register address.
00218     #define PIOC_ODR      PIOC_ACCESS(PIO_ODR_OFF)       ///< Output disable register address.
00219     #define PIOC_OSR      PIOC_ACCESS(PIO_OSR_OFF)       ///< Output status register address.
00220     #define PIOC_IFER     PIOC_ACCESS(PIO_IFER_OFF)      ///< Input filter enable register address.
00221     #define PIOC_IFDR     PIOC_ACCESS(PIO_IFDR_OFF)      ///< Input filter disable register address.
00222     #define PIOC_IFSR     PIOC_ACCESS(PIO_IFSR_OFF)      ///< Input filter status register address.
00223     #define PIOC_SODR     PIOC_ACCESS(PIO_SODR_OFF)      ///< Set output data register address.
00224     #define PIOC_CODR     PIOC_ACCESS(PIO_CODR_OFF)      ///< Clear output data register address.
00225     #define PIOC_ODSR     PIOC_ACCESS(PIO_ODSR_OFF)      ///< Output data status register address.
00226     #define PIOC_PDSR     PIOC_ACCESS(PIO_PDSR_OFF)      ///< Pin data status register address.
00227     #define PIOC_IER      PIOC_ACCESS(PIO_IER_OFF)       ///< Interrupt enable register address.
00228     #define PIOC_IDR      PIOC_ACCESS(PIO_IDR_OFF)       ///< Interrupt disable register address.
00229     #define PIOC_IMR      PIOC_ACCESS(PIO_IMR_OFF)       ///< Interrupt mask register address.
00230     #define PIOC_ISR      PIOC_ACCESS(PIO_ISR_OFF)       ///< Interrupt status register address.
00231     #define PIOC_MDER     PIOC_ACCESS(PIO_MDER_OFF)      ///< Multi-driver enable register address.
00232     #define PIOC_MDDR     PIOC_ACCESS(PIO_MDDR_OFF)      ///< Multi-driver disable register address.
00233     #define PIOC_MDSR     PIOC_ACCESS(PIO_MDSR_OFF)      ///< Multi-driver status register address.
00234     #define PIOC_PUDR     PIOC_ACCESS(PIO_PUDR_OFF)      ///< Pull-up disable register address.
00235     #define PIOC_PUER     PIOC_ACCESS(PIO_PUER_OFF)      ///< Pull-up enable register address.
00236     #define PIOC_PUSR     PIOC_ACCESS(PIO_PUSR_OFF)      ///< Pull-up status register address.
00237 #ifdef PIO_ABSR_OFF
00238     #define PIOC_ABSR     PIOC_ACCESS(PIO_ABSR_OFF)      ///< PIO peripheral select register address.
00239 #else
00240     #define PIOC_ABCDSR1  PIOC_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 1 address.
00241     #define PIOC_ABCDSR2  PIOC_ACCESS(PIO_ABCDSR2_OFF)   ///< PIO peripheral select register 2 address.
00242 #endif
00243     #define PIOC_OWER     PIOC_ACCESS(PIO_OWER_OFF)      ///< PIO output write enable register address.
00244     #define PIOC_OWDR     PIOC_ACCESS(PIO_OWDR_OFF)      ///< PIO output write disable register address.
00245     #define PIOC_OWSR     PIOC_ACCESS(PIO_OWSR_OFF)      ///< PIO output write status register address.
00246     /*\}*/
00247 #endif /* PIOC_BASE */
00248
00249 #if defined(PIOD_BASE)
00250
00251     /*\{*/
00252     #define PIOD_ACCESS(offset) (*((reg32_t *)(PIOD_BASE + (offset))))
00253
00254     #define PIOD_PER      PIOD_ACCESS(PIO_PER_OFF)       ///< PIO enable register address.
00255     #define PIOD_PDR      PIOD_ACCESS(PIO_PDR_OFF)       ///< PIO disable register address.
00256     #define PIOD_PSR      PIOD_ACCESS(PIO_PSR_OFF)       ///< PIO status register address.
00257     #define PIOD_OER      PIOD_ACCESS(PIO_OER_OFF)       ///< Output enable register address.
00258     #define PIOD_ODR      PIOD_ACCESS(PIO_ODR_OFF)       ///< Output disable register address.
00259     #define PIOD_OSR      PIOD_ACCESS(PIO_OSR_OFF)       ///< Output status register address.
00260     #define PIOD_IFER     PIOD_ACCESS(PIO_IFER_OFF)      ///< Input filter enable register address.
00261     #define PIOD_IFDR     PIOD_ACCESS(PIO_IFDR_OFF)      ///< Input filter disable register address.
00262     #define PIOD_IFSR     PIOD_ACCESS(PIO_IFSR_OFF)      ///< Input filter status register address.
00263     #define PIOD_SODR     PIOD_ACCESS(PIO_SODR_OFF)      ///< Set output data register address.
00264     #define PIOD_CODR     PIOD_ACCESS(PIO_CODR_OFF)      ///< Clear output data register address.
00265     #define PIOD_ODSR     PIOD_ACCESS(PIO_ODSR_OFF)      ///< Output data status register address.
00266     #define PIOD_PDSR     PIOD_ACCESS(PIO_PDSR_OFF)      ///< Pin data status register address.
00267     #define PIOD_IER      PIOD_ACCESS(PIO_IER_OFF)       ///< Interrupt enable register address.
00268     #define PIOD_IDR      PIOD_ACCESS(PIO_IDR_OFF)       ///< Interrupt disable register address.
00269     #define PIOD_IMR      PIOD_ACCESS(PIO_IMR_OFF)       ///< Interrupt mask register address.
00270     #define PIOD_ISR      PIOD_ACCESS(PIO_ISR_OFF)       ///< Interrupt status register address.
00271     #define PIOD_MDER     PIOD_ACCESS(PIO_MDER_OFF)      ///< Multi-driver enable register address.
00272     #define PIOD_MDDR     PIOD_ACCESS(PIO_MDDR_OFF)      ///< Multi-driver disable register address.
00273     #define PIOD_MDSR     PIOD_ACCESS(PIO_MDSR_OFF)      ///< Multi-driver status register address.
00274     #define PIOD_PUDR     PIOD_ACCESS(PIO_PUDR_OFF)      ///< Pull-up disable register address.
00275     #define PIOD_PUER     PIOD_ACCESS(PIO_PUER_OFF)      ///< Pull-up enable register address.
00276     #define PIOD_PUSR     PIOD_ACCESS(PIO_PUSR_OFF)      ///< Pull-up status register address.
00277 #ifdef PIO_ABSR_OFF
00278     #define PIOD_ABSR     PIOD_ACCESS(PIO_ABSR_OFF)      ///< PIO peripheral select register address.
00279 #else
00280     #define PIOD_ABCDSR1  PIOD_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 1 address.
00281     #define PIOD_ABCDSR2  PIOD_ACCESS(PIO_ABCDSR2_OFF)   ///< PIO peripheral select register 2 address.
00282 #endif
00283     #define PIOD_OWER     PIOD_ACCESS(PIO_OWER_OFF)      ///< PIO output write enable register address.
00284     #define PIOD_OWDR     PIOD_ACCESS(PIO_OWDR_OFF)      ///< PIO output write disable register address.
00285     #define PIOD_OWSR     PIOD_ACCESS(PIO_OWSR_OFF)      ///< PIO output write status register address.
00286     /*\}*/
00287 #endif /* PIOD_BASE */
00288
00289 #if defined(PIOE_BASE)
00290
00291     /*\{*/
00292     #define PIOE_ACCESS(offset) (*((reg32_t *)(PIOE_BASE + (offset))))
00293
00294     #define PIOE_PER      PIOE_ACCESS(PIO_PER_OFF)       ///< PIO enable register address.
00295     #define PIOE_PDR      PIOE_ACCESS(PIO_PDR_OFF)       ///< PIO disable register address.
00296     #define PIOE_PSR      PIOE_ACCESS(PIO_PSR_OFF)       ///< PIO status register address.
00297     #define PIOE_OER      PIOE_ACCESS(PIO_OER_OFF)       ///< Output enable register address.
00298     #define PIOE_ODR      PIOE_ACCESS(PIO_ODR_OFF)       ///< Output disable register address.
00299     #define PIOE_OSR      PIOE_ACCESS(PIO_OSR_OFF)       ///< Output status register address.
00300     #define PIOE_IFER     PIOE_ACCESS(PIO_IFER_OFF)      ///< Input filter enable register address.
00301     #define PIOE_IFDR     PIOE_ACCESS(PIO_IFDR_OFF)      ///< Input filter disable register address.
00302     #define PIOE_IFSR     PIOE_ACCESS(PIO_IFSR_OFF)      ///< Input filter status register address.
00303     #define PIOE_SODR     PIOE_ACCESS(PIO_SODR_OFF)      ///< Set output data register address.
00304     #define PIOE_CODR     PIOE_ACCESS(PIO_CODR_OFF)      ///< Clear output data register address.
00305     #define PIOE_ODSR     PIOE_ACCESS(PIO_ODSR_OFF)      ///< Output data status register address.
00306     #define PIOE_PDSR     PIOE_ACCESS(PIO_PDSR_OFF)      ///< Pin data status register address.
00307     #define PIOE_IER      PIOE_ACCESS(PIO_IER_OFF)       ///< Interrupt enable register address.
00308     #define PIOE_IDR      PIOE_ACCESS(PIO_IDR_OFF)       ///< Interrupt disable register address.
00309     #define PIOE_IMR      PIOE_ACCESS(PIO_IMR_OFF)       ///< Interrupt mask register address.
00310     #define PIOE_ISR      PIOE_ACCESS(PIO_ISR_OFF)       ///< Interrupt status register address.
00311     #define PIOE_MDER     PIOE_ACCESS(PIO_MDER_OFF)      ///< Multi-driver enable register address.
00312     #define PIOE_MDDR     PIOE_ACCESS(PIO_MDDR_OFF)      ///< Multi-driver disable register address.
00313     #define PIOE_MDSR     PIOE_ACCESS(PIO_MDSR_OFF)      ///< Multi-driver status register address.
00314     #define PIOE_PUDR     PIOE_ACCESS(PIO_PUDR_OFF)      ///< Pull-up disable register address.
00315     #define PIOE_PUER     PIOE_ACCESS(PIO_PUER_OFF)      ///< Pull-up enable register address.
00316     #define PIOE_PUSR     PIOE_ACCESS(PIO_PUSR_OFF)      ///< Pull-up status register address.
00317 #ifdef PIO_ABSR_OFF
00318     #define PIOE_ABSR     PIOE_ACCESS(PIO_ABSR_OFF)      ///< PIO peripheral select register address.
00319 #else
00320     #define PIOE_ABCDSR1  PIOE_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 1 address.
00321     #define PIOE_ABCDSR2  PIOE_ACCESS(PIO_ABCDSR2_OFF)   ///< PIO peripheral select register 2 address.
00322 #endif
00323     #define PIOE_OWER     PIOE_ACCESS(PIO_OWER_OFF)      ///< PIO output write enable register address.
00324     #define PIOE_OWDR     PIOE_ACCESS(PIO_OWDR_OFF)      ///< PIO output write disable register address.
00325     #define PIOE_OWSR     PIOE_ACCESS(PIO_OWSR_OFF)      ///< PIO output write status register address.
00326     /*\}*/
00327 #endif /* PIOE_BASE */
00328
00329 #if defined(PIOF_BASE)
00330
00331     /*\{*/
00332     #define PIOF_ACCESS(offset) (*((reg32_t *)(PIOF_BASE + (offset))))
00333
00334     #define PIOF_PER      PIOF_ACCESS(PIO_PER_OFF)       ///< PIO enable register address.
00335     #define PIOF_PDR      PIOF_ACCESS(PIO_PDR_OFF)       ///< PIO disable register address.
00336     #define PIOF_PSR      PIOF_ACCESS(PIO_PSR_OFF)       ///< PIO status register address.
00337     #define PIOF_OER      PIOF_ACCESS(PIO_OER_OFF)       ///< Output enable register address.
00338     #define PIOF_ODR      PIOF_ACCESS(PIO_ODR_OFF)       ///< Output disable register address.
00339     #define PIOF_OSR      PIOF_ACCESS(PIO_OSR_OFF)       ///< Output status register address.
00340     #define PIOF_IFER     PIOF_ACCESS(PIO_IFER_OFF)      ///< Input filter enable register address.
00341     #define PIOF_IFDR     PIOF_ACCESS(PIO_IFDR_OFF)      ///< Input filter disable register address.
00342     #define PIOF_IFSR     PIOF_ACCESS(PIO_IFSR_OFF)      ///< Input filter status register address.
00343     #define PIOF_SODR     PIOF_ACCESS(PIO_SODR_OFF)      ///< Set output data register address.
00344     #define PIOF_CODR     PIOF_ACCESS(PIO_CODR_OFF)      ///< Clear output data register address.
00345     #define PIOF_ODSR     PIOF_ACCESS(PIO_ODSR_OFF)      ///< Output data status register address.
00346     #define PIOF_PDSR     PIOF_ACCESS(PIO_PDSR_OFF)      ///< Pin data status register address.
00347     #define PIOF_IER      PIOF_ACCESS(PIO_IER_OFF)       ///< Interrupt enable register address.
00348     #define PIOF_IDR      PIOF_ACCESS(PIO_IDR_OFF)       ///< Interrupt disable register address.
00349     #define PIOF_IMR      PIOF_ACCESS(PIO_IMR_OFF)       ///< Interrupt mask register address.
00350     #define PIOF_ISR      PIOF_ACCESS(PIO_ISR_OFF)       ///< Interrupt status register address.
00351     #define PIOF_MDER     PIOF_ACCESS(PIO_MDER_OFF)      ///< Multi-driver enable register address.
00352     #define PIOF_MDDR     PIOF_ACCESS(PIO_MDDR_OFF)      ///< Multi-driver disable register address.
00353     #define PIOF_MDSR     PIOF_ACCESS(PIO_MDSR_OFF)      ///< Multi-driver status register address.
00354     #define PIOF_PUDR     PIOF_ACCESS(PIO_PUDR_OFF)      ///< Pull-up disable register address.
00355     #define PIOF_PUER     PIOF_ACCESS(PIO_PUER_OFF)      ///< Pull-up enable register address.
00356     #define PIOF_PUSR     PIOF_ACCESS(PIO_PUSR_OFF)      ///< Pull-up status register address.
00357 #ifdef PIO_ABSR_OFF
00358     #define PIOF_ABSR     PIOF_ACCESS(PIO_ABSR_OFF)      ///< PIO peripheral select register address.
00359 #else
00360     #define PIOF_ABCDSR1  PIOF_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 1 address.
00361     #define PIOF_ABCDSR2  PIOF_ACCESS(PIO_ABCDSR2_OFF)   ///< PIO peripheral select register 2 address.
00362 #endif
00363     #define PIOF_OWER     PIOF_ACCESS(PIO_OWER_OFF)      ///< PIO output write enable register address.
00364     #define PIOF_OWDR     PIOF_ACCESS(PIO_OWDR_OFF)      ///< PIO output write disable register address.
00365     #define PIOF_OWSR     PIOF_ACCESS(PIO_OWSR_OFF)      ///< PIO output write status register address.
00366     /*\}*/
00367 #endif /* PIOF_BASE */
00368
00369
00370 #define PIO_PERIPH_A  0
00371 #define PIO_PERIPH_B  1
00372 #ifdef PIO_ABCDSR1_OFF
00373     #define PIO_PERIPH_C  2
00374     #define PIO_PERIPH_D  3
00375 #endif
00376
00384 #ifdef PIO_ABCDSR1_OFF
00385     #define PIO_PERIPH_SEL(base, mask, function) do { \
00386         HWREG((base) + PIO_ABCDSR1_OFF) &= ~(mask); \
00387         HWREG((base) + PIO_ABCDSR2_OFF) &= ~(mask); \
00388         if ((function) & 1) \
00389             HWREG((base) + PIO_ABCDSR1_OFF) |= (mask); \
00390         if ((function) & 2) \
00391             HWREG((base) + PIO_ABCDSR2_OFF) |= (mask); \
00392     } while (0)
00393 #else
00394     #define PIO_PERIPH_SEL(base, mask, function) do { \
00395         HWREG((base) + PIO_ABSR_OFF) &= ~(mask); \
00396         if ((function) & 1) \
00397             HWREG((base) + PIO_ABSR_OFF) |= (mask); \
00398     } while (0)
00399 #endif
00400
00401
00402 #endif /* SAM3_PIO_H */


BeRTOS: sam3_pmc.h File Reference

  • cpu
  • cortex-m3
  • io
Defines | Functions
sam3_pmc.h File Reference

SAM3 PMC hardware. More...

#include <cfg/macros.h>
#include <cfg/debug.h>

Go to the source code of this file.

Defines

#define | PMC_BASE 0x400E0400
PMC registers base.
#define | PMC_SCER_OFF 0x00
PMC register offsets.
#define | PMC_SCDR_OFF 0x04
System Clock Disable Register.
#define | PMC_SCSR_OFF 0x08
System Clock Status Register.
#define | PMC_MOR_OFF 0x20
Main Oscillator Register.
#define | PMC_MCFR_OFF 0x24
Main Clock Frequency Register.
#define | PMC_MCKR_OFF 0x30
Master Clock Register.
#define | PMC_IER_OFF 0x60
Interrupt Enable Register.
#define | PMC_IDR_OFF 0x64
Interrupt Disable Register.
#define | PMC_SR_OFF 0x68
Status Register.
#define | PMC_IMR_OFF 0x6C
Interrupt Mask Register.
#define | PMC_FSMR_OFF 0x70
Fast Startup Mode Register.
#define | PMC_FSPR_OFF 0x74
Fast Startup Polarity Register.
#define | PMC_FOCR_OFF 0x78
Fault Output Clear Register.
#define | PMC_WPMR_OFF 0xE4
Write Protect Mode Register.
#define | PMC_WPSR_OFF 0xE8
Write Protect Status Register.
#define | PMC_SCER (*((reg32_t *)(PMC_BASE + PMC_SCER_OFF)))
PMC registers.
#define | PMC_SCDR (*((reg32_t *)(PMC_BASE + PMC_SCDR_OFF)))
System Clock Disable Register.
#define | PMC_SCSR (*((reg32_t *)(PMC_BASE + PMC_SCSR_OFF)))
System Clock Status Register.
#define | CKGR_MOR (*((reg32_t *)(PMC_BASE + PMC_MOR_OFF )))
Main Oscillator Register.
#define | CKGR_MCFR (*((reg32_t *)(PMC_BASE + PMC_MCFR_OFF)))
Main Clock Frequency Register.
#define | PMC_MCKR (*((reg32_t *)(PMC_BASE + PMC_MCKR_OFF)))
Master Clock Register.
#define | PMC_IER (*((reg32_t *)(PMC_BASE + PMC_IER_OFF )))
Interrupt Enable Register.
#define | PMC_IDR (*((reg32_t *)(PMC_BASE + PMC_IDR_OFF )))
Interrupt Disable Register.
#define | PMC_SR (*((reg32_t *)(PMC_BASE + PMC_SR_OFF )))
Status Register.
#define | PMC_IMR (*((reg32_t *)(PMC_BASE + PMC_IMR_OFF )))
Interrupt Mask Register.
#define | PMC_FSMR (*((reg32_t *)(PMC_BASE + PMC_FSMR_OFF)))
Fast Startup Mode Register.
#define | PMC_FSPR (*((reg32_t *)(PMC_BASE + PMC_FSPR_OFF)))
Fast Startup Polarity Register.
#define | PMC_FOCR (*((reg32_t *)(PMC_BASE + PMC_FOCR_OFF)))
Fault Output Clear Register.
#define | PMC_WPMR (*((reg32_t *)(PMC_BASE + PMC_WPMR_OFF)))
Write Protect Mode Register.
#define | PMC_WPSR (*((reg32_t *)(PMC_BASE + PMC_WPSR_OFF)))
Write Protect Status Register.
#define | PMC_SCER_PCK0 8
Defines for bit fields in PMC_SCER register.
#define | PMC_SCER_PCK1 9
Programmable Clock 1 Output Enable.
#define | PMC_SCER_PCK2 10
Programmable Clock 2 Output Enable.
#define | PMC_SCDR_PCK0 8
Defines for bit fields in PMC_SCDR register.
#define | PMC_SCDR_PCK1 9
Programmable Clock 1 Output Disable.
#define | PMC_SCDR_PCK2 10
Programmable Clock 2 Output Disable.
#define | PMC_SCSR_PCK0 8
Defines for bit fields in PMC_SCSR register.
#define | PMC_SCSR_PCK1 9
Programmable Clock 1 Output Status.
#define | PMC_SCSR_PCK2 10
Programmable Clock 2 Output Status.
#define | CKGR_MOR_MOSCXTEN 0
Defines for bit fields in CKGR_MOR register.
#define | CKGR_MOR_MOSCXTBY 1
Main Crystal Oscillator Bypass.
#define | CKGR_MOR_WAITMODE 2
Wait Mode Command.
#define | CKGR_MOR_MOSCRCEN 3
Main On-Chip RC Oscillator Enable.
#define | CKGR_MOR_MOSCRCF_SHIFT 4
Defines for bit fields in CKGR_MOR register.
#define | CKGR_MOR_MOSCRCF_MASK (0x7 << CKGR_MOR_MOSCRCF_SHIFT)
Main On-Chip RC Oscillator Frequency Selection.
#define | CKGR_MOR_MOSCRCF(value) ((CKGR_MOR_MOSCRCF_MASK & ((value) << CKGR_MOR_MOSCRCF_SHIFT)))
Defines for bit fields in CKGR_MOR register.
#define | CKGR_MOR_MOSCRCF_4MHZ (0x0 << CKGR_MOR_MOSCRCF_SHIFT)
Defines for bit fields in CKGR_MOR register.
#define | CKGR_MOR_MOSCRCF_8MHZ (0x1 << CKGR_MOR_MOSCRCF_SHIFT)
Defines for bit fields in CKGR_MOR register.
#define | CKGR_MOR_MOSCRCF_12MHZ (0x2 << CKGR_MOR_MOSCRCF_SHIFT)
Defines for bit fields in CKGR_MOR register.
#define | CKGR_MOR_MOSCXTST_SHIFT 8
Defines for bit fields in CKGR_MOR register.
#define | CKGR_MOR_MOSCXTST_MASK (0xff << CKGR_MOR_MOSCXTST_SHIFT)
Main Crystal Oscillator Start-up Time.
#define | CKGR_MOR_MOSCXTST(value) ((CKGR_MOR_MOSCXTST_MASK & ((value) << CKGR_MOR_MOSCXTST_SHIFT)))
Defines for bit fields in CKGR_MOR register.
#define | CKGR_MOR_KEY_SHIFT 16
Defines for bit fields in CKGR_MOR register.
#define | CKGR_MOR_KEY_MASK (0xffu << CKGR_MOR_KEY_SHIFT)
Password.
#define | CKGR_MOR_KEY(value) ((CKGR_MOR_KEY_MASK & ((value) << CKGR_MOR_KEY_SHIFT)))
Defines for bit fields in CKGR_MOR register.
#define | CKGR_MOR_MOSCSEL 24
Main Oscillator Selection.
#define | CKGR_MOR_CFDEN 25
Clock Failure Detector Enable.
#define | CKGR_MCFR_MAINF_MASK 0xffff
Defines for bit fields in CKGR_MCFR register.
#define | CKGR_MCFR_MAINFRDY 16
Main Clock Ready.
#define | CKGR_PLLR_DIV_MASK 0xff
Defines for bit fields in CKGR_PLLR register.
#define | CKGR_PLLR_DIV(value) (CKGR_PLLR_DIV_MASK & (value))
Defines for bit fields in CKGR_PLLR register.
#define | CKGR_PLLR_PLLCOUNT_SHIFT 8
Defines for bit fields in CKGR_PLLR register.
#define | CKGR_PLLR_PLLCOUNT_MASK (0x3f << CKGR_PLLR_PLLCOUNT_SHIFT)
PLL Counter mask.
#define | CKGR_PLLR_PLLCOUNT(value) (CKGR_PLLR_PLLCOUNT_MASK & ((value) << CKGR_PLLR_PLLCOUNT_SHIFT))
Defines for bit fields in CKGR_PLLR register.
#define | CKGR_PLLR_MUL_SHIFT 16
Defines for bit fields in CKGR_PLLR register.
#define | CKGR_PLLR_MUL_MASK (0x7ff << CKGR_PLLR_MUL_SHIFT)
PLL Multiplier mask.
#define | CKGR_PLLR_MUL(value) (CKGR_PLLR_MUL_MASK & ((value) << CKGR_PLLR_MUL_SHIFT))
Defines for bit fields in CKGR_PLLR register.
#define | CKGR_PLLR_STUCKTO1 29
Defines for bit fields in CKGR_PLLR register.
#define | PMC_MCKR_CSS_MASK 0x3
Defines for bit fields in PMC_MCKR register.
#define | PMC_MCKR_CSS_SLOW_CLK 0x0
Slow Clock is selected.
#define | PMC_MCKR_CSS_MAIN_CLK 0x1
Main Clock is selected.
#define | PMC_MCKR_CSS_PLL_CLK 0x2
PLL Clock is selected.
#define | PMC_MCKR_PRES_SHIFT 4
Defines for bit fields in PMC_MCKR register.
#define | PMC_MCKR_PRES_MASK (0x7 << PMC_MCKR_PRES_SHIFT)
Processor Clock Prescaler mask.
#define | PMC_MCKR_PRES_CLK (0x0 << PMC_MCKR_PRES_SHIFT)
Selected clock.
#define | PMC_MCKR_PRES_CLK_2 (0x1 << PMC_MCKR_PRES_SHIFT)
Selected clock divided by 2.
#define | PMC_MCKR_PRES_CLK_4 (0x2 << PMC_MCKR_PRES_SHIFT)
Selected clock divided by 4.
#define | PMC_MCKR_PRES_CLK_8 (0x3 << PMC_MCKR_PRES_SHIFT)
Selected clock divided by 8.
#define | PMC_MCKR_PRES_CLK_16 (0x4 << PMC_MCKR_PRES_SHIFT)
Selected clock divided by 16.
#define | PMC_MCKR_PRES_CLK_32 (0x5 << PMC_MCKR_PRES_SHIFT)
Selected clock divided by 32.
#define | PMC_MCKR_PRES_CLK_64 (0x6 << PMC_MCKR_PRES_SHIFT)
Selected clock divided by 64.
#define | PMC_MCKR_PRES_CLK_3 (0x7 << PMC_MCKR_PRES_SHIFT)
Selected clock divided by 3.
#define | PMC_MCKR_PLLDIV2 12
PLL Divisor by 2.
#define | PMC_PCK_CSS_MASK 0x7
Defines for bit fields in PMC_PCK[3] register.
#define | PMC_PCK_CSS_SLOW 0x0
Slow Clock is selected.
#define | PMC_PCK_CSS_MAIN 0x1
Main Clock is selected.
#define | PMC_PCK_CSS_PLL 0x2
PLL Clock is selected.
#define | PMC_PCK_CSS_MCK 0x4
Master Clock is selected.
#define | PMC_PCK_PRES_SHIFT 4
Defines for bit fields in PMC_PCK[3] register.
#define | PMC_PCK_PRES_MASK (0x7 << PMC_PCK_PRES_SHIFT)
Programmable Clock Prescaler.
#define | PMC_PCK_PRES_CLK (0x0 << PMC_PCK_PRES_SHIFT)
Selected clock.
#define | PMC_PCK_PRES_CLK_2 (0x1 << PMC_PCK_PRES_SHIFT)
Selected clock divided by 2.
#define | PMC_PCK_PRES_CLK_4 (0x2 << PMC_PCK_PRES_SHIFT)
Selected clock divided by 4.
#define | PMC_PCK_PRES_CLK_8 (0x3 << PMC_PCK_PRES_SHIFT)
Selected clock divided by 8.
#define | PMC_PCK_PRES_CLK_16 (0x4 << PMC_PCK_PRES_SHIFT)
Selected clock divided by 16.
#define | PMC_PCK_PRES_CLK_32 (0x5 << PMC_PCK_PRES_SHIFT)
Selected clock divided by 32.
#define | PMC_PCK_PRES_CLK_64 (0x6 << PMC_PCK_PRES_SHIFT)
Selected clock divided by 64.
#define | PMC_IER_MOSCXTS 0
Defines for bit fields in PMC_IER register.
#define | PMC_IER_LOCK 1
PLL Lock Interrupt Enable.
#define | PMC_IER_MCKRDY 3
Master Clock Ready Interrupt Enable.
#define | PMC_IER_PCKRDY0 8
Programmable Clock Ready 0 Interrupt Enable.
#define | PMC_IER_PCKRDY1 9
Programmable Clock Ready 1 Interrupt Enable.
#define | PMC_IER_PCKRDY2 10
Programmable Clock Ready 2 Interrupt Enable.
#define | PMC_IER_MOSCSELS 16
Main Oscillator Selection Status Interrupt Enable.
#define | PMC_IER_MOSCRCS 17
Main On-Chip RC Status Interrupt Enable.
#define | PMC_IER_CFDEV 18
Clock Failure Detector Event Interrupt Enable.
#define | PMC_IDR_MOSCXTS 0
Defines for bit fields in PMC_IDR register.
#define | PMC_IDR_LOCK 1
PLL Lock Interrupt Disable.
#define | PMC_IDR_MCKRDY 3
Master Clock Ready Interrupt Disable.
#define | PMC_IDR_PCKRDY0 8
Programmable Clock Ready 0 Interrupt Disable.
#define | PMC_IDR_PCKRDY1 9
Programmable Clock Ready 1 Interrupt Disable.
#define | PMC_IDR_PCKRDY2 10
Programmable Clock Ready 2 Interrupt Disable.
#define | PMC_IDR_MOSCSELS 16
Main Oscillator Selection Status Interrupt Disable.
#define | PMC_IDR_MOSCRCS 17
Main On-Chip RC Status Interrupt Disable.
#define | PMC_IDR_CFDEV 18
Clock Failure Detector Event Interrupt Disable.
#define | PMC_SR_MOSCXTS 0
Defines for bit fields in PMC_SR register.
#define | PMC_SR_LOCK 1
PLL Lock Status.
#define | PMC_SR_MCKRDY 3
Master Clock Status.
#define | PMC_SR_OSCSELS 7
Slow Clock Oscillator Selection.
#define | PMC_SR_PCKRDY0 8
Programmable Clock Ready Status.
#define | PMC_SR_PCKRDY1 9
Programmable Clock Ready Status.
#define | PMC_SR_PCKRDY2 10
Programmable Clock Ready Status.
#define | PMC_SR_MOSCSELS 16
Main Oscillator Selection Status.
#define | PMC_SR_MOSCRCS 17
Main On-Chip RC Oscillator Status.
#define | PMC_SR_CFDEV 18
Clock Failure Detector Event.
#define | PMC_SR_CFDS 19
Clock Failure Detector Status.
#define | PMC_SR_FOS 20
Clock Failure Detector Fault Output Status.
#define | PMC_IMR_MOSCXTS 0
Defines for bit fields in PMC_IMR register.
#define | PMC_IMR_LOCK 1
PLL Lock Interrupt Mask.
#define | PMC_IMR_MCKRDY 3
Master Clock Ready Interrupt Mask.
#define | PMC_IMR_PCKRDY0 8
Programmable Clock Ready 0 Interrupt Mask.
#define | PMC_IMR_PCKRDY1 9
Programmable Clock Ready 1 Interrupt Mask.
#define | PMC_IMR_PCKRDY2 10
Programmable Clock Ready 2 Interrupt Mask.
#define | PMC_IMR_MOSCSELS 16
Main Oscillator Selection Status Interrupt Mask.
#define | PMC_IMR_MOSCRCS 17
Main On-Chip RC Status Interrupt Mask.
#define | PMC_IMR_CFDEV 18
Clock Failure Detector Event Interrupt Mask.
#define | PMC_FSMR_FSTT0 0
Defines for bit fields in PMC_FSMR register.
#define | PMC_FSMR_FSTT1 1
Fast Startup Input Enable 1.
#define | PMC_FSMR_FSTT2 2
Fast Startup Input Enable 2.
#define | PMC_FSMR_FSTT3 3
Fast Startup Input Enable 3.
#define | PMC_FSMR_FSTT4 4
Fast Startup Input Enable 4.
#define | PMC_FSMR_FSTT5 5
Fast Startup Input Enable 5.
#define | PMC_FSMR_FSTT6 6
Fast Startup Input Enable 6.
#define | PMC_FSMR_FSTT7 7
Fast Startup Input Enable 7.
#define | PMC_FSMR_FSTT8 8
Fast Startup Input Enable 8.
#define | PMC_FSMR_FSTT9 9
Fast Startup Input Enable 9.
#define | PMC_FSMR_FSTT10 10
Fast Startup Input Enable 10.
#define | PMC_FSMR_FSTT11 11
Fast Startup Input Enable 11.
#define | PMC_FSMR_FSTT12 12
Fast Startup Input Enable 12.
#define | PMC_FSMR_FSTT13 13
Fast Startup Input Enable 13.
#define | PMC_FSMR_FSTT14 14
Fast Startup Input Enable 14.
#define | PMC_FSMR_FSTT15 15
Fast Startup Input Enable 15.
#define | PMC_FSMR_RTTAL 16
RTT Alarm Enable.
#define | PMC_FSMR_RTCAL 17
RTC Alarm Enable.
#define | PMC_FSMR_LPM 20
Low Power Mode.
#define | PMC_FSPR_FSTP0 0
Defines for bit fields in PMC_FSPR register.
#define | PMC_FSPR_FSTP1 1
Fast Startup Input Polarityx.
#define | PMC_FSPR_FSTP2 2
Fast Startup Input Polarityx.
#define | PMC_FSPR_FSTP3 3
Fast Startup Input Polarityx.
#define | PMC_FSPR_FSTP4 4
Fast Startup Input Polarityx.
#define | PMC_FSPR_FSTP5 5
Fast Startup Input Polarityx.
#define | PMC_FSPR_FSTP6 6
Fast Startup Input Polarityx.
#define | PMC_FSPR_FSTP7 7
Fast Startup Input Polarityx.
#define | PMC_FSPR_FSTP8 8
Fast Startup Input Polarityx.
#define | PMC_FSPR_FSTP9 9
Fast Startup Input Polarityx.
#define | PMC_FSPR_FSTP10 10
Fast Startup Input Polarityx.
#define | PMC_FSPR_FSTP11 11
Fast Startup Input Polarityx.
#define | PMC_FSPR_FSTP12 12
Fast Startup Input Polarityx.
#define | PMC_FSPR_FSTP13 13
Fast Startup Input Polarityx.
#define | PMC_FSPR_FSTP14 14
Fast Startup Input Polarityx.
#define | PMC_FSPR_FSTP15 15
Fast Startup Input Polarityx.
#define | PMC_FOCR_FOCLR 0
Defines for bit fields in PMC_FOCR register.
#define | PMC_WPMR_WPEN 0
Defines for bit fields in PMC_WPMR register.
#define | PMC_WPMR_WPKEY_SHIFT 8
Defines for bit fields in PMC_WPMR register.
#define | PMC_WPMR_WPKEY_MASK (0xffffff << PMC_WPMR_WPKEY_SHIFT)
Write Protect key mask.
#define | PMC_WPMR_WPKEY(value) ((PMC_WPMR_WPKEY_MASK & ((value) << PMC_WPMR_WPKEY_SHIFT)))
Defines for bit fields in PMC_WPMR register.
#define | PMC_WPSR_WPVS 0
Defines for bit fields in PMC_WPSR register.
#define | PMC_WPSR_WPVSRC_SHIFT 8
Defines for bit fields in PMC_WPSR register.
#define | PMC_WPSR_WPVSRC_MASK (0xffff << PMC_WPSR_WPVSRC_SHIFT)
Write Protect Violation Source mask.
#define | PMC_OCR_CAL4_MASK 0x7f
Defines for bit fields in PMC_OCR register.
#define | PMC_OCR_CAL4(value) (PMC_OCR_CAL4_MASK & (value))
Defines for bit fields in PMC_OCR register.
#define | PMC_OCR_SEL4 7
Selection of RC Oscillator Calibration bits for 4 MHz.
#define | PMC_OCR_CAL8_SHIFT 8
Defines for bit fields in PMC_OCR register.
#define | PMC_OCR_CAL8_MASK (0x7f << PMC_OCR_CAL8_SHIFT)
RC Oscillator Calibration bits for 8 MHz mask.
#define | PMC_OCR_CAL8(value) ((PMC_OCR_CAL8_MASK & ((value) << PMC_OCR_CAL8_SHIFT)))
Defines for bit fields in PMC_OCR register.
#define | PMC_OCR_SEL8 15
Selection of RC Oscillator Calibration bits for 8 MHz.
#define | PMC_OCR_CAL12_SHIFT 16
Defines for bit fields in PMC_OCR register.
#define | PMC_OCR_CAL12_MASK (0x7f << PMC_OCR_CAL12_SHIFT)
RC Oscillator Calibration bits for 12 MHz mask.
#define | PMC_OCR_CAL12(value) ((PMC_OCR_CAL12_MASK & ((value) << PMC_OCR_CAL12_SHIFT)))
Defines for bit fields in PMC_OCR register.
#define | PMC_OCR_SEL12 23
Selection of RC Oscillator Calibration bits for 12 MHz.

Functions

void | pmc_periphEnable (unsigned id)
Enable a peripheral clock.
void | pmc_periphDisable (unsigned id)
Disable a peripheral clock.

Detailed Description

SAM3 PMC hardware.

Definition in file sam3_pmc.h.

Define Documentation

#define CKGR_MCFR_MAINF_MASK 0xffff

Defines for bit fields in CKGR_MCFR register.

Main Clock Frequency mask

Definition at line 251 of file sam3_pmc.h.

#define CKGR_MOR_KEY ( value ) ((CKGR_MOR_KEY_MASK & ((value) << CKGR_MOR_KEY_SHIFT)))

Defines for bit fields in CKGR_MOR register.

Main Crystal Oscillator Enable

Definition at line 242 of file sam3_pmc.h.

#define CKGR_MOR_KEY_SHIFT 16

Defines for bit fields in CKGR_MOR register.

Main Crystal Oscillator Enable

Definition at line 240 of file sam3_pmc.h.

#define CKGR_MOR_MOSCRCF ( value ) ((CKGR_MOR_MOSCRCF_MASK & ((value) << CKGR_MOR_MOSCRCF_SHIFT)))

Defines for bit fields in CKGR_MOR register.

Main Crystal Oscillator Enable

Definition at line 233 of file sam3_pmc.h.

#define CKGR_MOR_MOSCRCF_12MHZ (0x2 << CKGR_MOR_MOSCRCF_SHIFT)

Defines for bit fields in CKGR_MOR register.

Main Crystal Oscillator Enable

Definition at line 236 of file sam3_pmc.h.

#define CKGR_MOR_MOSCRCF_4MHZ (0x0 << CKGR_MOR_MOSCRCF_SHIFT)

Defines for bit fields in CKGR_MOR register.

Main Crystal Oscillator Enable

Definition at line 234 of file sam3_pmc.h.

#define CKGR_MOR_MOSCRCF_8MHZ (0x1 << CKGR_MOR_MOSCRCF_SHIFT)

Defines for bit fields in CKGR_MOR register.

Main Crystal Oscillator Enable

Definition at line 235 of file sam3_pmc.h.

#define CKGR_MOR_MOSCRCF_SHIFT 4

Defines for bit fields in CKGR_MOR register.

Main Crystal Oscillator Enable

Definition at line 231 of file sam3_pmc.h.

#define CKGR_MOR_MOSCXTEN 0

Defines for bit fields in CKGR_MOR register.

Main Crystal Oscillator Enable

Definition at line 227 of file sam3_pmc.h.

#define CKGR_MOR_MOSCXTST ( value ) ((CKGR_MOR_MOSCXTST_MASK & ((value) << CKGR_MOR_MOSCXTST_SHIFT)))

Defines for bit fields in CKGR_MOR register.

Main Crystal Oscillator Enable

Definition at line 239 of file sam3_pmc.h.

#define CKGR_MOR_MOSCXTST_SHIFT 8

Defines for bit fields in CKGR_MOR register.

Main Crystal Oscillator Enable

Definition at line 237 of file sam3_pmc.h.

#define CKGR_PLLR_DIV ( value ) (CKGR_PLLR_DIV_MASK & (value))

Defines for bit fields in CKGR_PLLR register.

Divider mask

Definition at line 260 of file sam3_pmc.h.

#define CKGR_PLLR_DIV_MASK 0xff

Defines for bit fields in CKGR_PLLR register.

Divider mask

Definition at line 259 of file sam3_pmc.h.

#define CKGR_PLLR_MUL ( value ) (CKGR_PLLR_MUL_MASK & ((value) << CKGR_PLLR_MUL_SHIFT))

Defines for bit fields in CKGR_PLLR register.

Divider mask

Definition at line 266 of file sam3_pmc.h.

#define CKGR_PLLR_MUL_SHIFT 16

Defines for bit fields in CKGR_PLLR register.

Divider mask

Definition at line 264 of file sam3_pmc.h.

#define CKGR_PLLR_PLLCOUNT ( value ) (CKGR_PLLR_PLLCOUNT_MASK & ((value) << CKGR_PLLR_PLLCOUNT_SHIFT))

Defines for bit fields in CKGR_PLLR register.

Divider mask

Definition at line 263 of file sam3_pmc.h.

#define CKGR_PLLR_PLLCOUNT_SHIFT 8

Defines for bit fields in CKGR_PLLR register.

Divider mask

Definition at line 261 of file sam3_pmc.h.

#define CKGR_PLLR_STUCKTO1 29

Defines for bit fields in CKGR_PLLR register.

Divider mask

Definition at line 267 of file sam3_pmc.h.

#define PMC_BASE 0x400E0400

PMC registers base.

Definition at line 47 of file sam3_pmc.h.

#define PMC_FOCR_FOCLR 0

Defines for bit fields in PMC_FOCR register.

Fault Output Clear

Definition at line 425 of file sam3_pmc.h.

#define PMC_FSMR_FSTT0 0

Defines for bit fields in PMC_FSMR register.

Fast Startup Input Enable 0

Definition at line 378 of file sam3_pmc.h.

#define PMC_FSPR_FSTP0 0

Defines for bit fields in PMC_FSPR register.

Fast Startup Input Polarityx

Definition at line 403 of file sam3_pmc.h.

#define PMC_IDR_MOSCXTS 0

Defines for bit fields in PMC_IDR register.

Main Crystal Oscillator Status Interrupt Disable

Definition at line 330 of file sam3_pmc.h.

#define PMC_IER_MOSCXTS 0

Defines for bit fields in PMC_IER register.

Main Crystal Oscillator Status Interrupt Enable

Definition at line 315 of file sam3_pmc.h.

#define PMC_IMR_MOSCXTS 0

Defines for bit fields in PMC_IMR register.

Main Crystal Oscillator Status Interrupt Mask

Definition at line 363 of file sam3_pmc.h.

#define PMC_MCKR_CSS_MASK 0x3

Defines for bit fields in PMC_MCKR register.

Master Clock Source Selection mask

Definition at line 274 of file sam3_pmc.h.

#define PMC_MCKR_PRES_SHIFT 4

Defines for bit fields in PMC_MCKR register.

Master Clock Source Selection mask

Definition at line 278 of file sam3_pmc.h.

#define PMC_OCR_CAL12 ( value ) ((PMC_OCR_CAL12_MASK & ((value) << PMC_OCR_CAL12_SHIFT)))

Defines for bit fields in PMC_OCR register.

RC Oscillator Calibration bits for 4 MHz mask

Definition at line 460 of file sam3_pmc.h.

#define PMC_OCR_CAL12_SHIFT 16

Defines for bit fields in PMC_OCR register.

RC Oscillator Calibration bits for 4 MHz mask

Definition at line 458 of file sam3_pmc.h.

#define PMC_OCR_CAL4 ( value ) (PMC_OCR_CAL4_MASK & (value))

Defines for bit fields in PMC_OCR register.

RC Oscillator Calibration bits for 4 MHz mask

Definition at line 452 of file sam3_pmc.h.

#define PMC_OCR_CAL4_MASK 0x7f

Defines for bit fields in PMC_OCR register.

RC Oscillator Calibration bits for 4 MHz mask

Definition at line 451 of file sam3_pmc.h.

#define PMC_OCR_CAL8 ( value ) ((PMC_OCR_CAL8_MASK & ((value) << PMC_OCR_CAL8_SHIFT)))

Defines for bit fields in PMC_OCR register.

RC Oscillator Calibration bits for 4 MHz mask

Definition at line 456 of file sam3_pmc.h.

#define PMC_OCR_CAL8_SHIFT 8

Defines for bit fields in PMC_OCR register.

RC Oscillator Calibration bits for 4 MHz mask

Definition at line 454 of file sam3_pmc.h.

#define PMC_PCK_CSS_MASK 0x7

Defines for bit fields in PMC_PCK[3] register.

Master Clock Source Selection mask

Definition at line 295 of file sam3_pmc.h.

#define PMC_PCK_PRES_SHIFT 4

Defines for bit fields in PMC_PCK[3] register.

Master Clock Source Selection mask

Definition at line 300 of file sam3_pmc.h.

#define PMC_SCDR_PCK0 8

Defines for bit fields in PMC_SCDR register.

Programmable Clock 0 Output Disable

Definition at line 209 of file sam3_pmc.h.

#define PMC_SCER (*((reg32_t *)(PMC_BASE + PMC_SCER_OFF)))

PMC registers.

System Clock Enable Register

Definition at line 102 of file sam3_pmc.h.

#define PMC_SCER_OFF 0x00

PMC register offsets.

System Clock Enable Register

Definition at line 54 of file sam3_pmc.h.

#define PMC_SCER_PCK0 8

Defines for bit fields in PMC_SCER register.

Programmable Clock 0 Output Enable

Definition at line 200 of file sam3_pmc.h.

#define PMC_SCSR_PCK0 8

Defines for bit fields in PMC_SCSR register.

Programmable Clock 0 Output Status

Definition at line 218 of file sam3_pmc.h.

#define PMC_SR_MOSCXTS 0

Defines for bit fields in PMC_SR register.

Main XTAL Oscillator Status

Definition at line 345 of file sam3_pmc.h.

#define PMC_WPMR_WPEN 0

Defines for bit fields in PMC_WPMR register.

Write Protect Enable

Definition at line 432 of file sam3_pmc.h.

#define PMC_WPMR_WPKEY ( value ) ((PMC_WPMR_WPKEY_MASK & ((value) << PMC_WPMR_WPKEY_SHIFT)))

Defines for bit fields in PMC_WPMR register.

Write Protect Enable

Definition at line 435 of file sam3_pmc.h.

#define PMC_WPMR_WPKEY_SHIFT 8

Defines for bit fields in PMC_WPMR register.

Write Protect Enable

Definition at line 433 of file sam3_pmc.h.

#define PMC_WPSR_WPVS 0

Defines for bit fields in PMC_WPSR register.

Write Protect Violation Status

Definition at line 442 of file sam3_pmc.h.

#define PMC_WPSR_WPVSRC_SHIFT 8

Defines for bit fields in PMC_WPSR register.

Write Protect Violation Status

Definition at line 443 of file sam3_pmc.h.

Function Documentation

void pmc_periphDisable ( unsigned id ) [inline]

Disable a peripheral clock.

Parameters:
id peripheral id of the peripheral whose clock is enabled

Definition at line 188 of file sam3_pmc.h.

void pmc_periphEnable ( unsigned id ) [inline]

Enable a peripheral clock.

Parameters:
id peripheral id of the peripheral whose clock is enabled

Definition at line 162 of file sam3_pmc.h.


BeRTOS: sam3_pmc.h Source File

  • cpu
  • cortex-m3
  • io
sam3_pmc.h
Go to the documentation of this file.
00001
00036 #ifndef SAM3_PMC_H
00037 #define SAM3_PMC_H
00038
00039 #include <cfg/macros.h>
00040 #include <cfg/debug.h>
00041
00042
00044 #if CPU_CM3_SAM3X
00045     #define PMC_BASE  0x400E0600
00046 #else
00047     #define PMC_BASE  0x400E0400
00048 #endif
00049
00053 /*\{*/
00054 #define PMC_SCER_OFF  0x00         ///< System Clock Enable Register
00055 #define PMC_SCDR_OFF  0x04         ///< System Clock Disable Register
00056 #define PMC_SCSR_OFF  0x08         ///< System Clock Status Register
00057 #define PMC_MOR_OFF   0x20         ///< Main Oscillator Register
00058 #define PMC_MCFR_OFF  0x24         ///< Main Clock Frequency Register
00059 #define PMC_MCKR_OFF  0x30         ///< Master Clock Register
00060 #define PMC_IER_OFF   0x60         ///< Interrupt Enable Register
00061 #define PMC_IDR_OFF   0x64         ///< Interrupt Disable Register
00062 #define PMC_SR_OFF    0x68         ///< Status Register
00063 #define PMC_IMR_OFF   0x6C         ///< Interrupt Mask Register
00064 #define PMC_FSMR_OFF  0x70         ///< Fast Startup Mode Register
00065 #define PMC_FSPR_OFF  0x74         ///< Fast Startup Polarity Register
00066 #define PMC_FOCR_OFF  0x78         ///< Fault Output Clear Register
00067 #define PMC_WPMR_OFF  0xE4         ///< Write Protect Mode Register
00068 #define PMC_WPSR_OFF  0xE8         ///< Write Protect Status Register
00069
00070 #if CPU_CM3_SAM3N
00071     #define PMC_PCER_OFF   0x10    ///< Peripheral Clock Enable Register
00072     #define PMC_PCDR_OFF   0x14    ///< Peripheral Clock Disable Register
00073     #define PMC_PCSR_OFF   0x18    ///< Peripheral Clock Status Register
00074     #define PMC_PLLR_OFF   0x28    ///< PLL Register
00075     #define PMC_PCK_OFF    0x40    ///< Programmable Clock 0 Register
00076     #define PMC_OCR_OFF    0x110   ///< Oscillator Calibration Register
00077 #elif CPU_CM3_SAM3X
00078     #define PMC_PCER0_OFF  0x10    ///< Peripheral Clock Enable Register
00079     #define PMC_PCDR0_OFF  0x14    ///< Peripheral Clock Disable Register
00080     #define PMC_PCSR0_OFF  0x18    ///< Peripheral Clock Status Register
00081     #define PMC_UCKR_OFF   0x1C    ///< UTMI clock register
00082     #define PMC_PLLAR_OFF  0x28    ///< PLL Register
00083     #define PMC_USB_OFF    0x38    ///< USB clock register
00084     #define PMC_PCK0_OFF   0x40    ///< Programmable Clock 0 Register
00085     #define PMC_PCK1_OFF   0x44    ///< Programmable Clock 1 Register
00086     #define PMC_PCK2_OFF   0x48    ///< Programmable Clock 2 Register
00087     #define PMC_PCER1_OFF  0x100   ///< Peripheral Clock Enable Register
00088     #define PMC_PCDR1_OFF  0x104   ///< Peripheral Clock Disable Register
00089     #define PMC_PCSR1_OFF  0x108   ///< Peripheral Clock Status Register
00090     #define PMC_PCR_OFF    0x10C   ///< Oscillator Calibration Register
00091
00092     #define PMC_PLLROFF    PMC_PLLAR_OFF
00093 #else
00094     #warning Some PMC registers undefined for the selected CPU
00095 #endif
00096 /*\}*/
00097
00101 /*\{*/
00102 #define PMC_SCER  (*((reg32_t *)(PMC_BASE + PMC_SCER_OFF)))   ///< System Clock Enable Register
00103 #define PMC_SCDR  (*((reg32_t *)(PMC_BASE + PMC_SCDR_OFF)))   ///< System Clock Disable Register
00104 #define PMC_SCSR  (*((reg32_t *)(PMC_BASE + PMC_SCSR_OFF)))   ///< System Clock Status Register
00105 #define CKGR_MOR  (*((reg32_t *)(PMC_BASE + PMC_MOR_OFF )))   ///< Main Oscillator Register
00106 #define CKGR_MCFR (*((reg32_t *)(PMC_BASE + PMC_MCFR_OFF)))   ///< Main Clock Frequency Register
00107 #define PMC_MCKR  (*((reg32_t *)(PMC_BASE + PMC_MCKR_OFF)))   ///< Master Clock Register
00108 #define PMC_IER   (*((reg32_t *)(PMC_BASE + PMC_IER_OFF )))   ///< Interrupt Enable Register
00109 #define PMC_IDR   (*((reg32_t *)(PMC_BASE + PMC_IDR_OFF )))   ///< Interrupt Disable Register
00110 #define PMC_SR    (*((reg32_t *)(PMC_BASE + PMC_SR_OFF  )))   ///< Status Register
00111 #define PMC_IMR   (*((reg32_t *)(PMC_BASE + PMC_IMR_OFF )))   ///< Interrupt Mask Register
00112 #define PMC_FSMR  (*((reg32_t *)(PMC_BASE + PMC_FSMR_OFF)))   ///< Fast Startup Mode Register
00113 #define PMC_FSPR  (*((reg32_t *)(PMC_BASE + PMC_FSPR_OFF)))   ///< Fast Startup Polarity Register
00114 #define PMC_FOCR  (*((reg32_t *)(PMC_BASE + PMC_FOCR_OFF)))   ///< Fault Output Clear Register
00115 #define PMC_WPMR  (*((reg32_t *)(PMC_BASE + PMC_WPMR_OFF)))   ///< Write Protect Mode Register
00116 #define PMC_WPSR  (*((reg32_t *)(PMC_BASE + PMC_WPSR_OFF)))   ///< Write Protect Status Register
00117
00118 #if CPU_CM3_SAM3N
00119     #define PMC_PCER   (*((reg32_t *)(PMC_BASE + PMC_PCER_OFF)))  ///< Peripheral Clock Enable Register
00120     #define PMC_PCDR   (*((reg32_t *)(PMC_BASE + PMC_PCDR_OFF)))  ///< Peripheral Clock Disable Register
00121     #define PMC_PCSR   (*((reg32_t *)(PMC_BASE + PMC_PCSR_OFF)))  ///< Peripheral Clock Status Register
00122     #define CKGR_PLLR  (*((reg32_t *)(PMC_BASE + PMC_PLLR_OFF)))  ///< PLL Register
00123     #define PMC_PCK    (*((reg32_t *)(PMC_BASE + PMC_PCK_OFF )))  ///< Programmable Clock 0 Register
00124     #define PMC_OCR    (*((reg32_t *)(PMC_BASE + PMC_OCR_OFF )))  ///< Oscillator Calibration Register
00125 #elif CPU_CM3_SAM3X
00126     #define PMC_PCER0  (*((reg32_t *)(PMC_BASE + PMC_PCER0_OFF)))     ///< Peripheral Clock Enable Register
00127     #define PMC_PCDR0  (*((reg32_t *)(PMC_BASE + PMC_PCDR0_OFF)))     ///< Peripheral Clock Disable Register
00128     #define PMC_PCSR0  (*((reg32_t *)(PMC_BASE + PMC_PCSR0_OFF)))     ///< Peripheral Clock Status Register
00129     #define PMC_UCKR   (*((reg32_t *)(PMC_BASE + PMC_UCKR _OFF)))     ///< UTMI clock register
00130     #define CKGR_PLLAR (*((reg32_t *)(PMC_BASE + PMC_PLLAR_OFF)))     ///< PLL Register
00131     #define PMC_USB_O  (*((reg32_t *)(PMC_BASE + PMC_USB_O_OFF)))     ///< USB clock register
00132     #define PMC_PCK0   (*((reg32_t *)(PMC_BASE + PMC_PCK0 _OFF)))     ///< Programmable Clock 0 Register
00133     #define PMC_PCK1   (*((reg32_t *)(PMC_BASE + PMC_PCK1 _OFF)))     ///< Programmable Clock 1 Register
00134     #define PMC_PCK2   (*((reg32_t *)(PMC_BASE + PMC_PCK2 _OFF)))     ///< Programmable Clock 2 Register
00135     #define PMC_PCER1  (*((reg32_t *)(PMC_BASE + PMC_PCER1_OFF)))     ///< Peripheral Clock Enable Register
00136     #define PMC_PCDR1  (*((reg32_t *)(PMC_BASE + PMC_PCDR1_OFF)))     ///< Peripheral Clock Disable Register
00137     #define PMC_PCSR1  (*((reg32_t *)(PMC_BASE + PMC_PCSR1_OFF)))     ///< Peripheral Clock Status Register
00138     #define PMC_PCR    (*((reg32_t *)(PMC_BASE + PMC_PCR  _OFF)))     ///< Oscillator Calibration Register
00139
00140     #define CKGR_PLLR  CKGR_PLLAR
00141 #endif
00142 /*\}*/
00143
00149 #ifdef PMC_PCER1
00150
00151 INLINE void pmc_periphEnable(unsigned id)
00152 {
00153     ASSERT(id < 64);
00154     if (id < 32)
00155         PMC_PCER0 = BV(id);
00156     else
00157         PMC_PCER1 = BV(id - 32);
00158 }
00159
00160 #else
00161
00162 INLINE void pmc_periphEnable(unsigned id)
00163 {
00164     ASSERT(id < 32);
00165     PMC_PCER = BV(id);
00166 }
00167
00168 #endif
00169
00175 #ifdef PMC_PCER1
00176
00177 INLINE void pmc_periphDisable(unsigned id)
00178 {
00179     ASSERT(id < 64);
00180     if (id < 32)
00181         PMC_PCDR0 = BV(id);
00182     else
00183         PMC_PCDR1 = BV(id - 32);
00184 }
00185
00186 #else
00187
00188 INLINE void pmc_periphDisable(unsigned id)
00189 {
00190     ASSERT(id < 32);
00191     PMC_PCDR = BV(id);
00192 }
00193
00194 #endif
00195
00199 /*\{*/
00200 #define PMC_SCER_PCK0  8   ///< Programmable Clock 0 Output Enable
00201 #define PMC_SCER_PCK1  9   ///< Programmable Clock 1 Output Enable
00202 #define PMC_SCER_PCK2  10  ///< Programmable Clock 2 Output Enable
00203 /*\}*/
00204
00208 /*\{*/
00209 #define PMC_SCDR_PCK0  8   ///< Programmable Clock 0 Output Disable
00210 #define PMC_SCDR_PCK1  9   ///< Programmable Clock 1 Output Disable
00211 #define PMC_SCDR_PCK2  10  ///< Programmable Clock 2 Output Disable
00212 /*\}*/
00213
00217 /*\{*/
00218 #define PMC_SCSR_PCK0  8   ///< Programmable Clock 0 Output Status
00219 #define PMC_SCSR_PCK1  9   ///< Programmable Clock 1 Output Status
00220 #define PMC_SCSR_PCK2  10  ///< Programmable Clock 2 Output Status
00221 /*\}*/
00222
00226 /*\{*/
00227 #define CKGR_MOR_MOSCXTEN         0   ///< Main Crystal Oscillator Enable
00228 #define CKGR_MOR_MOSCXTBY         1   ///< Main Crystal Oscillator Bypass
00229 #define CKGR_MOR_WAITMODE         2   ///< Wait Mode Command
00230 #define CKGR_MOR_MOSCRCEN         3   ///< Main On-Chip RC Oscillator Enable
00231 #define CKGR_MOR_MOSCRCF_SHIFT    4
00232 #define CKGR_MOR_MOSCRCF_MASK     (0x7 << CKGR_MOR_MOSCRCF_SHIFT)   ///< Main On-Chip RC Oscillator Frequency Selection
00233 #define CKGR_MOR_MOSCRCF(value)   ((CKGR_MOR_MOSCRCF_MASK & ((value) << CKGR_MOR_MOSCRCF_SHIFT)))
00234 #define   CKGR_MOR_MOSCRCF_4MHZ   (0x0 << CKGR_MOR_MOSCRCF_SHIFT)
00235 #define   CKGR_MOR_MOSCRCF_8MHZ   (0x1 << CKGR_MOR_MOSCRCF_SHIFT)
00236 #define   CKGR_MOR_MOSCRCF_12MHZ  (0x2 << CKGR_MOR_MOSCRCF_SHIFT)
00237 #define CKGR_MOR_MOSCXTST_SHIFT   8
00238 #define CKGR_MOR_MOSCXTST_MASK    (0xff << CKGR_MOR_MOSCXTST_SHIFT)   ///< Main Crystal Oscillator Start-up Time
00239 #define CKGR_MOR_MOSCXTST(value)  ((CKGR_MOR_MOSCXTST_MASK & ((value) << CKGR_MOR_MOSCXTST_SHIFT)))
00240 #define CKGR_MOR_KEY_SHIFT        16
00241 #define CKGR_MOR_KEY_MASK         (0xffu << CKGR_MOR_KEY_SHIFT)   ///< Password
00242 #define CKGR_MOR_KEY(value)       ((CKGR_MOR_KEY_MASK & ((value) << CKGR_MOR_KEY_SHIFT)))
00243 #define CKGR_MOR_MOSCSEL          24   ///< Main Oscillator Selection
00244 #define CKGR_MOR_CFDEN            25   ///< Clock Failure Detector Enable
00245 /*\}*/
00246
00250 /*\{*/
00251 #define CKGR_MCFR_MAINF_MASK  0xffff    ///< Main Clock Frequency mask
00252 #define CKGR_MCFR_MAINFRDY    16        ///< Main Clock Ready
00253 /*\}*/
00254
00258 /*\{*/
00259 #define CKGR_PLLR_DIV_MASK        0xff   ///< Divider mask
00260 #define CKGR_PLLR_DIV(value)      (CKGR_PLLR_DIV_MASK & (value))
00261 #define CKGR_PLLR_PLLCOUNT_SHIFT  8
00262 #define CKGR_PLLR_PLLCOUNT_MASK   (0x3f << CKGR_PLLR_PLLCOUNT_SHIFT)   ///< PLL Counter mask
00263 #define CKGR_PLLR_PLLCOUNT(value) (CKGR_PLLR_PLLCOUNT_MASK & ((value) << CKGR_PLLR_PLLCOUNT_SHIFT))
00264 #define CKGR_PLLR_MUL_SHIFT       16
00265 #define CKGR_PLLR_MUL_MASK        (0x7ff << CKGR_PLLR_MUL_SHIFT)   ///< PLL Multiplier mask
00266 #define CKGR_PLLR_MUL(value)      (CKGR_PLLR_MUL_MASK & ((value) << CKGR_PLLR_MUL_SHIFT))
00267 #define CKGR_PLLR_STUCKTO1        29
00268 /*\}*/
00269
00273 /*\{*/
00274 #define PMC_MCKR_CSS_MASK        0x3   ///< Master Clock Source Selection mask
00275 #define   PMC_MCKR_CSS_SLOW_CLK  0x0   ///< Slow Clock is selected
00276 #define   PMC_MCKR_CSS_MAIN_CLK  0x1   ///< Main Clock is selected
00277 #define   PMC_MCKR_CSS_PLL_CLK   0x2   ///< PLL Clock is selected
00278 #define PMC_MCKR_PRES_SHIFT      4
00279 #define PMC_MCKR_PRES_MASK       (0x7 << PMC_MCKR_PRES_SHIFT)    ///< Processor Clock Prescaler mask
00280 #define   PMC_MCKR_PRES_CLK      (0x0 << PMC_MCKR_PRES_SHIFT)   ///< Selected clock
00281 #define   PMC_MCKR_PRES_CLK_2    (0x1 << PMC_MCKR_PRES_SHIFT)   ///< Selected clock divided by 2
00282 #define   PMC_MCKR_PRES_CLK_4    (0x2 << PMC_MCKR_PRES_SHIFT)   ///< Selected clock divided by 4
00283 #define   PMC_MCKR_PRES_CLK_8    (0x3 << PMC_MCKR_PRES_SHIFT)   ///< Selected clock divided by 8
00284 #define   PMC_MCKR_PRES_CLK_16   (0x4 << PMC_MCKR_PRES_SHIFT)   ///< Selected clock divided by 16
00285 #define   PMC_MCKR_PRES_CLK_32   (0x5 << PMC_MCKR_PRES_SHIFT)   ///< Selected clock divided by 32
00286 #define   PMC_MCKR_PRES_CLK_64   (0x6 << PMC_MCKR_PRES_SHIFT)   ///< Selected clock divided by 64
00287 #define   PMC_MCKR_PRES_CLK_3    (0x7 << PMC_MCKR_PRES_SHIFT)   ///< Selected clock divided by 3
00288 #define PMC_MCKR_PLLDIV2         12   ///< PLL Divisor by 2
00289 /*\}*/
00290
00294 /*\{*/
00295 #define PMC_PCK_CSS_MASK       0x7   ///< Master Clock Source Selection mask
00296 #define   PMC_PCK_CSS_SLOW     0x0   ///< Slow Clock is selected
00297 #define   PMC_PCK_CSS_MAIN     0x1   ///< Main Clock is selected
00298 #define   PMC_PCK_CSS_PLL      0x2   ///< PLL Clock is selected
00299 #define   PMC_PCK_CSS_MCK      0x4   ///< Master Clock is selected
00300 #define PMC_PCK_PRES_SHIFT 4
00301 #define PMC_PCK_PRES_MASK      (0x7 << PMC_PCK_PRES_SHIFT)   ///< Programmable Clock Prescaler
00302 #define   PMC_PCK_PRES_CLK     (0x0 << PMC_PCK_PRES_SHIFT)   ///< Selected clock
00303 #define   PMC_PCK_PRES_CLK_2   (0x1 << PMC_PCK_PRES_SHIFT)   ///< Selected clock divided by 2
00304 #define   PMC_PCK_PRES_CLK_4   (0x2 << PMC_PCK_PRES_SHIFT)   ///< Selected clock divided by 4
00305 #define   PMC_PCK_PRES_CLK_8   (0x3 << PMC_PCK_PRES_SHIFT)   ///< Selected clock divided by 8
00306 #define   PMC_PCK_PRES_CLK_16  (0x4 << PMC_PCK_PRES_SHIFT)   ///< Selected clock divided by 16
00307 #define   PMC_PCK_PRES_CLK_32  (0x5 << PMC_PCK_PRES_SHIFT)   ///< Selected clock divided by 32
00308 #define   PMC_PCK_PRES_CLK_64  (0x6 << PMC_PCK_PRES_SHIFT)   ///< Selected clock divided by 64
00309 /*\}*/
00310
00314 /*\{*/
00315 #define PMC_IER_MOSCXTS   0   ///< Main Crystal Oscillator Status Interrupt Enable
00316 #define PMC_IER_LOCK      1   ///< PLL Lock Interrupt Enable
00317 #define PMC_IER_MCKRDY    3   ///< Master Clock Ready Interrupt Enable
00318 #define PMC_IER_PCKRDY0   8   ///< Programmable Clock Ready 0 Interrupt Enable
00319 #define PMC_IER_PCKRDY1   9   ///< Programmable Clock Ready 1 Interrupt Enable
00320 #define PMC_IER_PCKRDY2   10  ///< Programmable Clock Ready 2 Interrupt Enable
00321 #define PMC_IER_MOSCSELS  16  ///< Main Oscillator Selection Status Interrupt Enable
00322 #define PMC_IER_MOSCRCS   17  ///< Main On-Chip RC Status Interrupt Enable
00323 #define PMC_IER_CFDEV     18  ///< Clock Failure Detector Event Interrupt Enable
00324 /*\}*/
00325
00329 /*\{*/
00330 #define PMC_IDR_MOSCXTS   0   ///< Main Crystal Oscillator Status Interrupt Disable
00331 #define PMC_IDR_LOCK      1   ///< PLL Lock Interrupt Disable
00332 #define PMC_IDR_MCKRDY    3   ///< Master Clock Ready Interrupt Disable
00333 #define PMC_IDR_PCKRDY0   8   ///< Programmable Clock Ready 0 Interrupt Disable
00334 #define PMC_IDR_PCKRDY1   9   ///< Programmable Clock Ready 1 Interrupt Disable
00335 #define PMC_IDR_PCKRDY2   10  ///< Programmable Clock Ready 2 Interrupt Disable
00336 #define PMC_IDR_MOSCSELS  16  ///< Main Oscillator Selection Status Interrupt Disable
00337 #define PMC_IDR_MOSCRCS   17  ///< Main On-Chip RC Status Interrupt Disable
00338 #define PMC_IDR_CFDEV     18  ///< Clock Failure Detector Event Interrupt Disable
00339 /*\}*/
00340
00344 /*\{*/
00345 #define PMC_SR_MOSCXTS   0   ///< Main XTAL Oscillator Status
00346 #define PMC_SR_LOCK      1   ///< PLL Lock Status
00347 #define PMC_SR_MCKRDY    3   ///< Master Clock Status
00348 #define PMC_SR_OSCSELS   7   ///< Slow Clock Oscillator Selection
00349 #define PMC_SR_PCKRDY0   8   ///< Programmable Clock Ready Status
00350 #define PMC_SR_PCKRDY1   9   ///< Programmable Clock Ready Status
00351 #define PMC_SR_PCKRDY2   10  ///< Programmable Clock Ready Status
00352 #define PMC_SR_MOSCSELS  16  ///< Main Oscillator Selection Status
00353 #define PMC_SR_MOSCRCS   17  ///< Main On-Chip RC Oscillator Status
00354 #define PMC_SR_CFDEV     18  ///< Clock Failure Detector Event
00355 #define PMC_SR_CFDS      19  ///< Clock Failure Detector Status
00356 #define PMC_SR_FOS       20  ///< Clock Failure Detector Fault Output Status
00357 /*\}*/
00358
00362 /*\{*/
00363 #define PMC_IMR_MOSCXTS   0   ///< Main Crystal Oscillator Status Interrupt Mask
00364 #define PMC_IMR_LOCK      1   ///< PLL Lock Interrupt Mask
00365 #define PMC_IMR_MCKRDY    3   ///< Master Clock Ready Interrupt Mask
00366 #define PMC_IMR_PCKRDY0   8   ///< Programmable Clock Ready 0 Interrupt Mask
00367 #define PMC_IMR_PCKRDY1   9   ///< Programmable Clock Ready 1 Interrupt Mask
00368 #define PMC_IMR_PCKRDY2   10  ///< Programmable Clock Ready 2 Interrupt Mask
00369 #define PMC_IMR_MOSCSELS  16  ///< Main Oscillator Selection Status Interrupt Mask
00370 #define PMC_IMR_MOSCRCS   17  ///< Main On-Chip RC Status Interrupt Mask
00371 #define PMC_IMR_CFDEV     18  ///< Clock Failure Detector Event Interrupt Mask
00372 /*\}*/
00373
00377 /*\{*/
00378 #define PMC_FSMR_FSTT0   0   ///< Fast Startup Input Enable 0
00379 #define PMC_FSMR_FSTT1   1   ///< Fast Startup Input Enable 1
00380 #define PMC_FSMR_FSTT2   2   ///< Fast Startup Input Enable 2
00381 #define PMC_FSMR_FSTT3   3   ///< Fast Startup Input Enable 3
00382 #define PMC_FSMR_FSTT4   4   ///< Fast Startup Input Enable 4
00383 #define PMC_FSMR_FSTT5   5   ///< Fast Startup Input Enable 5
00384 #define PMC_FSMR_FSTT6   6   ///< Fast Startup Input Enable 6
00385 #define PMC_FSMR_FSTT7   7   ///< Fast Startup Input Enable 7
00386 #define PMC_FSMR_FSTT8   8   ///< Fast Startup Input Enable 8
00387 #define PMC_FSMR_FSTT9   9   ///< Fast Startup Input Enable 9
00388 #define PMC_FSMR_FSTT10  10  ///< Fast Startup Input Enable 10
00389 #define PMC_FSMR_FSTT11  11  ///< Fast Startup Input Enable 11
00390 #define PMC_FSMR_FSTT12  12  ///< Fast Startup Input Enable 12
00391 #define PMC_FSMR_FSTT13  13  ///< Fast Startup Input Enable 13
00392 #define PMC_FSMR_FSTT14  14  ///< Fast Startup Input Enable 14
00393 #define PMC_FSMR_FSTT15  15  ///< Fast Startup Input Enable 15
00394 #define PMC_FSMR_RTTAL   16  ///< RTT Alarm Enable
00395 #define PMC_FSMR_RTCAL   17  ///< RTC Alarm Enable
00396 #define PMC_FSMR_LPM     20  ///< Low Power Mode
00397 /*\}*/
00398
00402 /*\{*/
00403 #define PMC_FSPR_FSTP0   0   ///< Fast Startup Input Polarityx
00404 #define PMC_FSPR_FSTP1   1   ///< Fast Startup Input Polarityx
00405 #define PMC_FSPR_FSTP2   2   ///< Fast Startup Input Polarityx
00406 #define PMC_FSPR_FSTP3   3   ///< Fast Startup Input Polarityx
00407 #define PMC_FSPR_FSTP4   4   ///< Fast Startup Input Polarityx
00408 #define PMC_FSPR_FSTP5   5   ///< Fast Startup Input Polarityx
00409 #define PMC_FSPR_FSTP6   6   ///< Fast Startup Input Polarityx
00410 #define PMC_FSPR_FSTP7   7   ///< Fast Startup Input Polarityx
00411 #define PMC_FSPR_FSTP8   8   ///< Fast Startup Input Polarityx
00412 #define PMC_FSPR_FSTP9   9   ///< Fast Startup Input Polarityx
00413 #define PMC_FSPR_FSTP10  10  ///< Fast Startup Input Polarityx
00414 #define PMC_FSPR_FSTP11  11  ///< Fast Startup Input Polarityx
00415 #define PMC_FSPR_FSTP12  12  ///< Fast Startup Input Polarityx
00416 #define PMC_FSPR_FSTP13  13  ///< Fast Startup Input Polarityx
00417 #define PMC_FSPR_FSTP14  14  ///< Fast Startup Input Polarityx
00418 #define PMC_FSPR_FSTP15  15  ///< Fast Startup Input Polarityx
00419 /*\}*/
00420
00424 /*\{*/
00425 #define PMC_FOCR_FOCLR  0   ///< Fault Output Clear
00426 /*\}*/
00427
00431 /*\{*/
00432 #define PMC_WPMR_WPEN          0   ///< Write Protect Enable
00433 #define PMC_WPMR_WPKEY_SHIFT   8
00434 #define PMC_WPMR_WPKEY_MASK    (0xffffff << PMC_WPMR_WPKEY_SHIFT)   ///< Write Protect key mask
00435 #define PMC_WPMR_WPKEY(value)  ((PMC_WPMR_WPKEY_MASK & ((value) << PMC_WPMR_WPKEY_SHIFT)))
00436 /*\}*/
00437
00441 /*\{*/
00442 #define PMC_WPSR_WPVS          0   ///< Write Protect Violation Status
00443 #define PMC_WPSR_WPVSRC_SHIFT  8
00444 #define PMC_WPSR_WPVSRC_MASK   (0xffff << PMC_WPSR_WPVSRC_SHIFT)   ///< Write Protect Violation Source mask
00445 /*\}*/
00446
00450 /*\{*/
00451 #define PMC_OCR_CAL4_MASK     0x7f  ///< RC Oscillator Calibration bits for 4 MHz mask
00452 #define PMC_OCR_CAL4(value)   (PMC_OCR_CAL4_MASK & (value))
00453 #define PMC_OCR_SEL4          7   ///< Selection of RC Oscillator Calibration bits for 4 MHz
00454 #define PMC_OCR_CAL8_SHIFT    8
00455 #define PMC_OCR_CAL8_MASK     (0x7f << PMC_OCR_CAL8_SHIFT)   ///< RC Oscillator Calibration bits for 8 MHz mask
00456 #define PMC_OCR_CAL8(value)   ((PMC_OCR_CAL8_MASK & ((value) << PMC_OCR_CAL8_SHIFT)))
00457 #define PMC_OCR_SEL8          15  ///< Selection of RC Oscillator Calibration bits for 8 MHz
00458 #define PMC_OCR_CAL12_SHIFT   16
00459 #define PMC_OCR_CAL12_MASK    (0x7f << PMC_OCR_CAL12_SHIFT)   ///< RC Oscillator Calibration bits for 12 MHz mask
00460 #define PMC_OCR_CAL12(value)  ((PMC_OCR_CAL12_MASK & ((value) << PMC_OCR_CAL12_SHIFT)))
00461 #define PMC_OCR_SEL12         23   ///< Selection of RC Oscillator Calibration bits for 12 MHz
00462 /*\}*/
00463
00464
00465 #endif /* SAM3_PMC_H */


BeRTOS: sam3_rstc.h File Reference

  • cpu
  • cortex-m3
  • io
sam3_rstc.h File Reference

Go to the source code of this file.

Defines

#define | RSTC_CR (*((reg32_t *)(RSTC_BASE + 0x00)))
Reset Controller Control Register.
#define | RSTC_PROCRST 0
Processor reset.
#define | RSTC_PERRST 2
Peripheral reset.
#define | RSTC_EXTRST 3
External reset.
#define | RSTC_KEY 0xA5000000
Password.
#define | RSTC_SR (*((reg32_t *)(RSTC_BASE + 0x04)))
Reset Controller Status Register.
#define | RSTC_URSTS 0
User reset status.
#define | RSTC_BODSTS 1
Brownout detection status.
#define | RSTC_RSTTYP_MASK 0x00000700
Reset type.
#define | RSTC_RSTTYP_POWERUP 0x00000000
Power-up reset.
#define | RSTC_RSTTYP_WATCHDOG 0x00000200
Watchdog reset.
#define | RSTC_RSTTYP_SOFTWARE 0x00000300
Software reset.
#define | RSTC_RSTTYP_USER 0x00000400
User reset.
#define | RSTC_RSTTYP_BROWNOUT 0x00000500
Brownout reset.
#define | RSTC_NRSTL 16
NRST pin level.
#define | RSTC_SRCMP 17
Software reset command in progress.
#define | RSTC_MR (*((reg32_t *)(RSTC_BASE + 0x08)))
Reset Controller Mode Register.
#define | RSTC_URSTEN 0
User reset enable.
#define | RSTC_URSTIEN 4
User reset interrupt enable.
#define | RSTC_ERSTL_MASK 0x00000F00
External reset length.
#define | RSTC_ERSTL_SHIFT 8
Least significant bit of external reset length.
#define | RSTC_BODIEN 16
Brown-out detection interrupt enable.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

SAM3 reset controller. This file is based on NUT/OS implementation. See license below.

Definition in file sam3_rstc.h.

Define Documentation

#define RSTC_CR (*((reg32_t *)(RSTC_BASE + 0x00)))

Reset Controller Control Register.

Reset controller control register address.

Definition at line 79 of file sam3_rstc.h.

#define RSTC_MR (*((reg32_t *)(RSTC_BASE + 0x08)))

Reset Controller Mode Register.

Reset controller mode register address.

Definition at line 104 of file sam3_rstc.h.

#define RSTC_SR (*((reg32_t *)(RSTC_BASE + 0x04)))

Reset Controller Status Register.

Reset controller status register address.

Definition at line 88 of file sam3_rstc.h.


BeRTOS: sam3_rstc.h Source File

  • cpu
  • cortex-m3
  • io
sam3_rstc.h
Go to the documentation of this file.
00001
00040 /*
00041  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00042  *
00043  * Redistribution and use in source and binary forms, with or without
00044  * modification, are permitted provided that the following conditions
00045  * are met:
00046  *
00047  * 1. Redistributions of source code must retain the above copyright
00048  *    notice, this list of conditions and the following disclaimer.
00049  * 2. Redistributions in binary form must reproduce the above copyright
00050  *    notice, this list of conditions and the following disclaimer in the
00051  *    documentation and/or other materials provided with the distribution.
00052  * 3. Neither the name of the copyright holders nor the names of
00053  *    contributors may be used to endorse or promote products derived
00054  *    from this software without specific prior written permission.
00055  *
00056  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00057  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00058  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00059  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00060  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00062  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00063  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00064  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00065  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00066  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00067  * SUCH DAMAGE.
00068  *
00069  * For additional information see http://www.ethernut.de/
00070  */
00071
00072 #ifndef SAM3_RTSC_H
00073 #define SAM3_RTSC_H
00074
00075 #define RSTC_BASE  0x400E1A00
00076
00078 /*\{*/
00079 #define RSTC_CR         (*((reg32_t *)(RSTC_BASE + 0x00)))      ///< Reset controller control register address.
00080 #define RSTC_PROCRST                     0  ///< Processor reset.
00081 #define RSTC_PERRST                      2  ///< Peripheral reset.
00082 #define RSTC_EXTRST                      3  ///< External reset.
00083 #define RSTC_KEY                0xA5000000  ///< Password.
00084 /*\}*/
00085
00087 /*\{*/
00088 #define RSTC_SR         (*((reg32_t *)(RSTC_BASE + 0x04)))      ///< Reset controller status register address.
00089 #define RSTC_URSTS                       0  ///< User reset status.
00090 #define RSTC_BODSTS                      1  ///< Brownout detection status.
00091 #define RSTC_RSTTYP_MASK        0x00000700  ///< Reset type.
00092 #define RSTC_RSTTYP_POWERUP     0x00000000  ///< Power-up reset.
00093 //#define RSTC_RSTTYP_WAKEUP      0x00000100      ///< VDDCORE rising.
00094 #define RSTC_RSTTYP_WATCHDOG    0x00000200  ///< Watchdog reset.
00095 #define RSTC_RSTTYP_SOFTWARE    0x00000300  ///< Software reset.
00096 #define RSTC_RSTTYP_USER        0x00000400  ///< User reset.
00097 #define RSTC_RSTTYP_BROWNOUT    0x00000500  ///< Brownout reset.
00098 #define RSTC_NRSTL                      16  ///< NRST pin level.
00099 #define RSTC_SRCMP                      17  ///< Software reset command in progress.
00100 /*\}*/
00101
00103 /*\{*/
00104 #define RSTC_MR         (*((reg32_t *)(RSTC_BASE + 0x08)))      ///< Reset controller mode register address.
00105 #define RSTC_URSTEN                      0  ///< User reset enable.
00106 #define RSTC_URSTIEN                     4  ///< User reset interrupt enable.
00107 #define RSTC_ERSTL_MASK         0x00000F00  ///< External reset length.
00108 #define RSTC_ERSTL_SHIFT                 8  ///< Least significant bit of external reset length.
00109 #define RSTC_BODIEN                     16  ///< Brown-out detection interrupt enable.
00110 /*\}*/
00111
00112
00113 #endif /* SAM3_RTSC_H */


BeRTOS: sam3_sdramc.h File Reference

  • cpu
  • cortex-m3
  • io
sam3_sdramc.h File Reference

SAM3 SDRAM controller definitions. More...

#include <cfg/macros.h>

Go to the source code of this file.

Detailed Description

SAM3 SDRAM controller definitions.

Definition in file sam3_sdramc.h.


BeRTOS: sam3_sdramc.h Source File

  • cpu
  • cortex-m3
  • io
sam3_sdramc.h
Go to the documentation of this file.
00001
00036 #ifndef SAM3_SDRAMC_H
00037 #define SAM3_SDRAMC_H
00038
00039 #include <cfg/macros.h>
00040
00041
00042 #if CPU_CM3_SAM3X
00043
00045 #define SDRAMC_BASE  0x400E0200
00046
00047
00051 /*\{*/
00052 #define SDRAMC_MR_OFF    0x00   ///< Mode Register
00053 #define SDRAMC_TR_OFF    0x04   ///< Refresh Timer Register
00054 #define SDRAMC_CR_OFF    0x08   ///< Configuration Register
00055 #define SDRAMC_LPR_OFF   0x10   ///< Low Power Register
00056 #define SDRAMC_IER_OFF   0x14   ///< Interrupt Enable Register
00057 #define SDRAMC_IDR_OFF   0x18   ///< Interrupt Disable Register
00058 #define SDRAMC_IMR_OFF   0x1C   ///< Interrupt Mask Register
00059 #define SDRAMC_ISR_OFF   0x20   ///< Interrupt Status Register
00060 #define SDRAMC_MDR_OFF   0x24   ///< Memory Device Register
00061 #define SDRAMC_CR1_OFF   0x28   ///< Configuration Register 1
00062 #define SDRAMC_OCMS_OFF  0x2C   ///< OCMS Register 1
00063 /*\}*/
00064
00068 /*\{*/
00069 #define SDRAMC_MR    (*(reg32_t *)(SDRAMC_BASE + SDRAMC_MR_OFF  ))
00070 #define SDRAMC_TR    (*(reg32_t *)(SDRAMC_BASE + SDRAMC_TR_OFF  ))
00071 #define SDRAMC_CR    (*(reg32_t *)(SDRAMC_BASE + SDRAMC_CR_OFF  ))
00072 #define SDRAMC_LPR   (*(reg32_t *)(SDRAMC_BASE + SDRAMC_LPR_OFF ))
00073 #define SDRAMC_IER   (*(reg32_t *)(SDRAMC_BASE + SDRAMC_IER_OFF ))
00074 #define SDRAMC_IDR   (*(reg32_t *)(SDRAMC_BASE + SDRAMC_IDR_OFF ))
00075 #define SDRAMC_IMR   (*(reg32_t *)(SDRAMC_BASE + SDRAMC_IMR_OFF ))
00076 #define SDRAMC_ISR   (*(reg32_t *)(SDRAMC_BASE + SDRAMC_ISR_OFF ))
00077 #define SDRAMC_MDR   (*(reg32_t *)(SDRAMC_BASE + SDRAMC_MDR_OFF ))
00078 #define SDRAMC_CR1   (*(reg32_t *)(SDRAMC_BASE + SDRAMC_CR1_OFF ))
00079 #define SDRAMC_OCMS  (*(reg32_t *)(SDRAMC_BASE + SDRAMC_OCMS_OFF))
00080 /*\}*/
00081
00082
00086 /*\{*/
00087 #define SDRAMC_MR_MODE_MASK                0x7
00088 #define SDRAMC_MR_MODE_NORMAL              0x0  ///< Normal mode. Any access to the SDRAM is decoded normally. To activate this mode, command must be followed by a write to the SDRAM.
00089 #define SDRAMC_MR_MODE_NOP                 0x1  ///< The SDRAM Controller issues a NOP command when the SDRAM device is accessed regardless of the cycle. To activate this mode, command must be followed by a write to the SDRAM.
00090 #define SDRAMC_MR_MODE_ALLBANKS_PRECHARGE  0x2  ///< The SDRAM Controller issues an "All Banks Precharge" command when the SDRAM device is accessed regardless of the cycle. To activate this mode, command must be followed by a write to the SDRAM.
00091 #define SDRAMC_MR_MODE_LOAD_MODEREG        0x3  ///< The SDRAM Controller issues a "Load Mode Register" command when the SDRAM device is accessed regardless of the cycle. To activate this mode, command must be followed by a write to the SDRAM.
00092 #define SDRAMC_MR_MODE_AUTO_REFRESH        0x4  ///< The SDRAM Controller issues an "Auto-Refresh" Command when the SDRAM device is accessed regardless of the cycle. Previously, an "All Banks Precharge" command must be issued. To activate this mode, command must be followed by a write to the SDRAM.
00093 #define SDRAMC_MR_MODE_EXT_LOAD_MODEREG    0x5  ///< The SDRAM Controller issues an "Extended Load Mode Register" command when the SDRAM device is accessed regardless of the cycle. To activate this mode, the "Extended Load Mode Register" command must be followed by a write to the SDRAM. The write in the SDRAM must be done in the appropriate bank; most low-power SDRAM devices use the bank 1.
00094 #define SDRAMC_MR_MODE_DEEP_POWERDOWN      0x6  ///< Deep power-down mode. Enters deep power-down mode.
00095 /*\}*/
00096
00100 /*\{*/
00101 #define SDRAMC_TR_COUNT_MASK    0xfff
00102 #define SDRAMC_TR_COUNT(value)  (SDRAMC_TR_COUNT_MASK & (value))
00103 /*\}*/
00104
00108 /*\{*/
00109 #define SDRAMC_CR_NC_SHIFT         0
00110 #define SDRAMC_CR_NC_MASK          0x3 ///< Number of Column Bits
00111 #define SDRAMC_CR_NC_COL8          0x0 ///< 8 column bits
00112 #define SDRAMC_CR_NC_COL9          0x1 ///< 9 column bits
00113 #define SDRAMC_CR_NC_COL10         0x2 ///< 10 column bits
00114 #define SDRAMC_CR_NC_COL11         0x3 ///< 11 column bits
00115 #define SDRAMC_CR_NR_SHIFT         2
00116 #define SDRAMC_CR_NR_MASK          (0x3 << 2) ///< Number of Row Bits
00117 #define SDRAMC_CR_NR_ROW11         (0x0 << 2) ///< 11 row bits
00118 #define SDRAMC_CR_NR_ROW12         (0x1 << 2) ///< 12 row bits
00119 #define SDRAMC_CR_NR_ROW13         (0x2 << 2) ///< 13 row bits
00120 #define SDRAMC_CR_NB               (0x1 << 4) ///< Number of Banks
00121 #define SDRAMC_CR_NB_BANK2         (0x0 << 4) ///< 2 banks
00122 #define SDRAMC_CR_NB_BANK4         (0x1 << 4) ///< 4 banks
00123 #define SDRAMC_CR_CAS_SHIFT        5
00124 #define SDRAMC_CR_CAS_MASK         (0x3 << SDRAMC_CR_CAS_SHIFT) ///< CAS Latency
00125 #define SDRAMC_CR_CAS_LATENCY1     (0x1 << 5) ///< 1 cycle CAS latency
00126 #define SDRAMC_CR_CAS_LATENCY2     (0x2 << 5) ///< 2 cycle CAS latency
00127 #define SDRAMC_CR_CAS_LATENCY3     (0x3 << 5) ///< 3 cycle CAS latency
00128 #define SDRAMC_CR_DBW              (0x1 << 7) ///< Data Bus Width
00129 #define SDRAMC_CR_TWR_SHIFT        8
00130 #define SDRAMC_CR_TWR_MASK         (0xf << SDRAMC_CR_TWR_SHIFT) ///< Write Recovery Delay
00131 #define SDRAMC_CR_TWR(value)       (SDRAMC_CR_TWR_MASK & ((value) << SDRAMC_CR_TWR_SHIFT))
00132 #define SDRAMC_CR_TRC_TRFC_SHIFT   12
00133 #define SDRAMC_CR_TRC_TRFC_MASK    (0xf << SDRAMC_CR_TRC_TRFC_SHIFT) ///< Row Cycle Delay and Row Refresh Cycle
00134 #define SDRAMC_CR_TRC_TRFC(value)  (SDRAMC_CR_TRC_TRFC_MASK & ((value) << SDRAMC_CR_TRC_TRFC_SHIFT))
00135 #define SDRAMC_CR_TRP_SHIFT        16
00136 #define SDRAMC_CR_TRP_MASK         (0xf << SDRAMC_CR_TRP_SHIFT) ///< Row Precharge Delay
00137 #define SDRAMC_CR_TRP(value)       (SDRAMC_CR_TRP_MASK & ((value) << SDRAMC_CR_TRP_SHIFT))
00138 #define SDRAMC_CR_TRCD_SHIFT       20
00139 #define SDRAMC_CR_TRCD_MASK        (0xf << SDRAMC_CR_TRCD_SHIFT) ///< Row to Column Delay
00140 #define SDRAMC_CR_TRCD(value)      (SDRAMC_CR_TRCD_MASK & ((value) << SDRAMC_CR_TRCD_SHIFT))
00141 #define SDRAMC_CR_TRAS_SHIFT       24
00142 #define SDRAMC_CR_TRAS_MASK        (0xf << SDRAMC_CR_TRAS_SHIFT) ///< Active to Precharge Delay
00143 #define SDRAMC_CR_TRAS(value)      (SDRAMC_CR_TRAS_MASK & ((value) << SDRAMC_CR_TRAS_SHIFT))
00144 #define SDRAMC_CR_TXSR_SHIFT       28
00145 #define SDRAMC_CR_TXSR_MASK        (0xf << SDRAMC_CR_TXSR_SHIFT) ///< Exit Self Refresh to Active Delay
00146 #define SDRAMC_CR_TXSR(value)      (SDRAMC_CR_TXSR_MASK & ((value) << SDRAMC_CR_TXSR_SHIFT))
00147 /*\}*/
00148
00152 /*\{*/
00153 #define SDRAMC_MDR_MD_MASK     0x3
00154 #define SDRAMC_MDR_MD_SDRAM    0x0
00155 #define SDRAMC_MDR_MD_LPSDRAM  0x1
00156 /*\}*/
00157
00158 #endif /* CPU_CM_SAM3X */
00159
00160 #endif /* SAM3_SDRAMC_H */


BeRTOS: sam3_smc.h File Reference

  • cpu
  • cortex-m3
  • io
sam3_smc.h File Reference

SAM3X/A/U Static Memory Controller definitions. More...

Go to the source code of this file.

Detailed Description

SAM3X/A/U Static Memory Controller definitions.

Definition in file sam3_smc.h.


BeRTOS: sam3_smc.h Source File

  • cpu
  • cortex-m3
  • io
sam3_smc.h
Go to the documentation of this file.
00001
00036 #ifndef SAM3_SMC_H
00037 #define SAM3_SMC_H
00038
00039 /*
00040  * SMC registers defined only for SAM3X/A and U for now
00041  */
00042 #if CPU_CM3_SAM3X || CPU_CM3_SAM3U
00043
00045 #define SMC_BASE  0x400E0000
00046
00047
00051 /*\{*/
00052 #define SMC_CFG_OFF         0x000  ///< NFC Configuration
00053 #define SMC_CTRL_OFF        0x004  ///< NFC Control
00054 #define SMC_SR_OFF          0x008  ///< NFC Status
00055 #define SMC_IER_OFF         0x00C  ///< NFC Interrupt Enable
00056 #define SMC_IDR_OFF         0x010  ///< NFC Interrupt Disable
00057 #define SMC_IMR_OFF         0x014  ///< NFC Interrupt Mask
00058 #define SMC_ADDR_OFF        0x018  ///< NFC Address Cycle Zero
00059 #define SMC_BANK_OFF        0x01C  ///< Bank Address
00060 #define SMC_ECC_CTRL_OFF    0x020  ///< ECC Control
00061 #define SMC_ECC_MD_OFF      0x024  ///< ECC Mode
00062 #define SMC_ECC_SR1_OFF     0x028  ///< ECC Status 1
00063 #define SMC_ECC_PR0_OFF     0x02C  ///< ECC Parity 0
00064 #define SMC_ECC_PR1_OFF     0x030  ///< ECC parity 1
00065 #define SMC_ECC_SR2_OFF     0x034  ///< ECC status 2
00066 #define SMC_ECC_PR2_OFF     0x038  ///< ECC parity 2
00067 #define SMC_ECC_PR3_OFF     0x03C  ///< ECC parity 3
00068 #define SMC_ECC_PR4_OFF     0x040  ///< ECC parity 4
00069 #define SMC_ECC_PR5_OFF     0x044  ///< ECC parity 5
00070 #define SMC_ECC_PR6_OFF     0x048  ///< ECC parity 6
00071 #define SMC_ECC_PR7_OFF     0x04C  ///< ECC parity 7
00072 #define SMC_ECC_PR8_OFF     0x050  ///< ECC parity 8
00073 #define SMC_ECC_PR9_OFF     0x054  ///< ECC parity 9
00074 #define SMC_ECC_PR10_OFF    0x058  ///< ECC parity 10
00075 #define SMC_ECC_PR11_OFF    0x05C  ///< ECC parity 11
00076 #define SMC_ECC_PR12_OFF    0x060  ///< ECC parity 12
00077 #define SMC_ECC_PR13_OFF    0x064  ///< ECC parity 13
00078 #define SMC_ECC_PR14_OFF    0x068  ///< ECC parity 14
00079 #define SMC_ECC_PR15_OFF    0x06C  ///< ECC parity 15
00080 #define SMC_SETUP0_OFF      0x070  ///< SETUP (CS_number = 0)
00081 #define SMC_PULSE0_OFF      0x074  ///< PULSE (CS_number = 0)
00082 #define SMC_CYCLE0_OFF      0x078  ///< CYCLE (CS_number = 0)
00083 #define SMC_TIMINGS0_OFF    0x07C  ///< TIMINGS (CS_number = 0)
00084 #define SMC_MODE0_OFF       0x080  ///< MODE (CS_number = 0)
00085 #define SMC_SETUP1_OFF      0x084  ///< SETUP (CS_number = 1)
00086 #define SMC_PULSE1_OFF      0x088  ///< PULSE (CS_number = 1)
00087 #define SMC_CYCLE1_OFF      0x08C  ///< CYCLE (CS_number = 1)
00088 #define SMC_TIMINGS1_OFF    0x090  ///< TIMINGS (CS_number = 1)
00089 #define SMC_MODE1_OFF       0x094  ///< MODE (CS_number = 1)
00090 #define SMC_SETUP2_OFF      0x098  ///< SETUP (CS_number = 2)
00091 #define SMC_PULSE2_OFF      0x09C  ///< PULSE (CS_number = 2)
00092 #define SMC_CYCLE2_OFF      0x0A0  ///< CYCLE (CS_number = 2)
00093 #define SMC_TIMINGS2_OFF    0x0A4  ///< TIMINGS (CS_number = 2)
00094 #define SMC_MODE2_OFF       0x0A8  ///< MODE (CS_number = 2)
00095 #define SMC_SETUP3_OFF      0x0AC  ///< SETUP (CS_number = 3)
00096 #define SMC_PULSE3_OFF      0x0B0  ///< PULSE (CS_number = 3)
00097 #define SMC_CYCLE3_OFF      0x0B4  ///< CYCLE (CS_number = 3)
00098 #define SMC_TIMINGS3_OFF    0x0B8  ///< TIMINGS (CS_number = 3)
00099 #define SMC_MODE3_OFF       0x0BC  ///< MODE (CS_number = 3)
00100 #define SMC_SETUP4_OFF      0x0C0  ///< SETUP (CS_number = 4)
00101 #define SMC_PULSE4_OFF      0x0C4  ///< PULSE (CS_number = 4)
00102 #define SMC_CYCLE4_OFF      0x0C8  ///< CYCLE (CS_number = 4)
00103 #define SMC_TIMINGS4_OFF    0x0CC  ///< TIMINGS (CS_number = 4)
00104 #define SMC_MODE4_OFF       0x0D0  ///< MODE (CS_number = 4)
00105 #define SMC_SETUP5_OFF      0x0D4  ///< SETUP (CS_number = 5)
00106 #define SMC_PULSE5_OFF      0x0D8  ///< PULSE (CS_number = 5)
00107 #define SMC_CYCLE5_OFF      0x0DC  ///< CYCLE (CS_number = 5)
00108 #define SMC_TIMINGS5_OFF    0x0E0  ///< TIMINGS (CS_number = 5)
00109 #define SMC_MODE5_OFF       0x0E4  ///< MODE (CS_number = 5)
00110 #define SMC_SETUP6_OFF      0x0E8  ///< SETUP (CS_number = 6)
00111 #define SMC_PULSE6_OFF      0x0EC  ///< PULSE (CS_number = 6)
00112 #define SMC_CYCLE6_OFF      0x0F0  ///< CYCLE (CS_number = 6)
00113 #define SMC_TIMINGS6_OFF    0x0F4  ///< TIMINGS (CS_number = 6)
00114 #define SMC_MODE6_OFF       0x0F8  ///< MODE (CS_number = 6)
00115 #define SMC_SETUP7_OFF      0x0FC  ///< SETUP (CS_number = 7)
00116 #define SMC_PULSE7_OFF      0x100  ///< PULSE (CS_number = 7)
00117 #define SMC_CYCLE7_OFF      0x104  ///< CYCLE (CS_number = 7)
00118 #define SMC_TIMINGS7_OFF    0x108  ///< TIMINGS (CS_number = 7)
00119 #define SMC_MODE7_OFF       0x10C  ///< MODE (CS_number = 7)
00120 #define SMC_OCMS_OFF        0x110  ///< OCMS MODE
00121 #define SMC_KEY1_OFF        0x114  ///< KEY1
00122 #define SMC_KEY2_OFF        0x118  ///< KEY2
00123 #define SMC_WPCR_OFF        0x1E4  ///< Write Protection Control
00124 #define SMC_WPSR_OFF        0x1E8  ///< Write Protection Status
00125 /*\}*/
00126
00130 /*\{*/
00131 #define SMC_CFG        (*((reg32_t *)(SMC_BASE + SMC_CFG_OFF)))
00132 #define SMC_CTRL       (*((reg32_t *)(SMC_BASE + SMC_CTRL_OFF)))
00133 #define SMC_SR         (*((reg32_t *)(SMC_BASE + SMC_SR_OFF)))
00134 #define SMC_IER        (*((reg32_t *)(SMC_BASE + SMC_IER_OFF)))
00135 #define SMC_IDR        (*((reg32_t *)(SMC_BASE + SMC_IDR_OFF)))
00136 #define SMC_IMR        (*((reg32_t *)(SMC_BASE + SMC_IMR_OFF)))
00137 #define SMC_ADDR       (*((reg32_t *)(SMC_BASE + SMC_ADDR_OFF)))
00138 #define SMC_BANK       (*((reg32_t *)(SMC_BASE + SMC_BANK_OFF)))
00139 #define SMC_ECC_CTRL   (*((reg32_t *)(SMC_BASE + SMC_ECC_CTRL_OFF)))
00140 #define SMC_ECC_MD     (*((reg32_t *)(SMC_BASE + SMC_ECC_MD_OFF)))
00141 #define SMC_ECC_SR1    (*((reg32_t *)(SMC_BASE + SMC_ECC_SR1_OFF)))
00142 #define SMC_ECC_PR0    (*((reg32_t *)(SMC_BASE + SMC_ECC_PR0_OFF)))
00143 #define SMC_ECC_PR1    (*((reg32_t *)(SMC_BASE + SMC_ECC_PR1_OFF)))
00144 #define SMC_ECC_SR2    (*((reg32_t *)(SMC_BASE + SMC_ECC_SR2_OFF)))
00145 #define SMC_ECC_PR2    (*((reg32_t *)(SMC_BASE + SMC_ECC_PR2_OFF)))
00146 #define SMC_ECC_PR3    (*((reg32_t *)(SMC_BASE + SMC_ECC_PR3_OFF)))
00147 #define SMC_ECC_PR4    (*((reg32_t *)(SMC_BASE + SMC_ECC_PR4_OFF)))
00148 #define SMC_ECC_PR5    (*((reg32_t *)(SMC_BASE + SMC_ECC_PR5_OFF)))
00149 #define SMC_ECC_PR6    (*((reg32_t *)(SMC_BASE + SMC_ECC_PR6_OFF)))
00150 #define SMC_ECC_PR7    (*((reg32_t *)(SMC_BASE + SMC_ECC_PR7_OFF)))
00151 #define SMC_ECC_PR8    (*((reg32_t *)(SMC_BASE + SMC_ECC_PR8_OFF)))
00152 #define SMC_ECC_PR9    (*((reg32_t *)(SMC_BASE + SMC_ECC_PR9_OFF)))
00153 #define SMC_ECC_PR10   (*((reg32_t *)(SMC_BASE + SMC_ECC_PR10_OFF)))
00154 #define SMC_ECC_PR11   (*((reg32_t *)(SMC_BASE + SMC_ECC_PR11_OFF)))
00155 #define SMC_ECC_PR12   (*((reg32_t *)(SMC_BASE + SMC_ECC_PR12_OFF)))
00156 #define SMC_ECC_PR13   (*((reg32_t *)(SMC_BASE + SMC_ECC_PR13_OFF)))
00157 #define SMC_ECC_PR14   (*((reg32_t *)(SMC_BASE + SMC_ECC_PR14_OFF)))
00158 #define SMC_ECC_PR15   (*((reg32_t *)(SMC_BASE + SMC_ECC_PR15_OFF)))
00159 #define SMC_SETUP0     (*((reg32_t *)(SMC_BASE + SMC_SETUP0_OFF)))
00160 #define SMC_PULSE0     (*((reg32_t *)(SMC_BASE + SMC_PULSE0_OFF)))
00161 #define SMC_CYCLE0     (*((reg32_t *)(SMC_BASE + SMC_CYCLE0_OFF)))
00162 #define SMC_TIMINGS0   (*((reg32_t *)(SMC_BASE + SMC_TIMINGS0_OFF)))
00163 #define SMC_MODE0      (*((reg32_t *)(SMC_BASE + SMC_MODE0_OFF)))
00164 #define SMC_SETUP1     (*((reg32_t *)(SMC_BASE + SMC_SETUP1_OFF)))
00165 #define SMC_PULSE1     (*((reg32_t *)(SMC_BASE + SMC_PULSE1_OFF)))
00166 #define SMC_CYCLE1     (*((reg32_t *)(SMC_BASE + SMC_CYCLE1_OFF)))
00167 #define SMC_TIMINGS1   (*((reg32_t *)(SMC_BASE + SMC_TIMINGS1_OFF)))
00168 #define SMC_MODE1      (*((reg32_t *)(SMC_BASE + SMC_MODE1_OFF)))
00169 #define SMC_SETUP2     (*((reg32_t *)(SMC_BASE + SMC_SETUP2_OFF)))
00170 #define SMC_PULSE2     (*((reg32_t *)(SMC_BASE + SMC_PULSE2_OFF)))
00171 #define SMC_CYCLE2     (*((reg32_t *)(SMC_BASE + SMC_CYCLE2_OFF)))
00172 #define SMC_TIMINGS2   (*((reg32_t *)(SMC_BASE + SMC_TIMINGS2_OFF)))
00173 #define SMC_MODE2      (*((reg32_t *)(SMC_BASE + SMC_MODE2_OFF)))
00174 #define SMC_SETUP3     (*((reg32_t *)(SMC_BASE + SMC_SETUP3_OFF)))
00175 #define SMC_PULSE3     (*((reg32_t *)(SMC_BASE + SMC_PULSE3_OFF)))
00176 #define SMC_CYCLE3     (*((reg32_t *)(SMC_BASE + SMC_CYCLE3_OFF)))
00177 #define SMC_TIMINGS3   (*((reg32_t *)(SMC_BASE + SMC_TIMINGS3_OFF)))
00178 #define SMC_MODE3      (*((reg32_t *)(SMC_BASE + SMC_MODE3_OFF)))
00179 #define SMC_SETUP4     (*((reg32_t *)(SMC_BASE + SMC_SETUP4_OFF)))
00180 #define SMC_PULSE4     (*((reg32_t *)(SMC_BASE + SMC_PULSE4_OFF)))
00181 #define SMC_CYCLE4     (*((reg32_t *)(SMC_BASE + SMC_CYCLE4_OFF)))
00182 #define SMC_TIMINGS4   (*((reg32_t *)(SMC_BASE + SMC_TIMINGS4_OFF)))
00183 #define SMC_MODE4      (*((reg32_t *)(SMC_BASE + SMC_MODE4_OFF)))
00184 #define SMC_SETUP5     (*((reg32_t *)(SMC_BASE + SMC_SETUP5_OFF)))
00185 #define SMC_PULSE5     (*((reg32_t *)(SMC_BASE + SMC_PULSE5_OFF)))
00186 #define SMC_CYCLE5     (*((reg32_t *)(SMC_BASE + SMC_CYCLE5_OFF)))
00187 #define SMC_TIMINGS5   (*((reg32_t *)(SMC_BASE + SMC_TIMINGS5_OFF)))
00188 #define SMC_MODE5      (*((reg32_t *)(SMC_BASE + SMC_MODE5_OFF)))
00189 #define SMC_SETUP6     (*((reg32_t *)(SMC_BASE + SMC_SETUP6_OFF)))
00190 #define SMC_PULSE6     (*((reg32_t *)(SMC_BASE + SMC_PULSE6_OFF)))
00191 #define SMC_CYCLE6     (*((reg32_t *)(SMC_BASE + SMC_CYCLE6_OFF)))
00192 #define SMC_TIMINGS6   (*((reg32_t *)(SMC_BASE + SMC_TIMINGS6_OFF)))
00193 #define SMC_MODE6      (*((reg32_t *)(SMC_BASE + SMC_MODE6_OFF)))
00194 #define SMC_SETUP7     (*((reg32_t *)(SMC_BASE + SMC_SETUP7_OFF)))
00195 #define SMC_PULSE7     (*((reg32_t *)(SMC_BASE + SMC_PULSE7_OFF)))
00196 #define SMC_CYCLE7     (*((reg32_t *)(SMC_BASE + SMC_CYCLE7_OFF)))
00197 #define SMC_TIMINGS7   (*((reg32_t *)(SMC_BASE + SMC_TIMINGS7_OFF)))
00198 #define SMC_MODE7      (*((reg32_t *)(SMC_BASE + SMC_MODE7_OFF)))
00199 #define SMC_OCMS       (*((reg32_t *)(SMC_BASE + SMC_OCMS_OFF)))
00200 #define SMC_KEY1       (*((reg32_t *)(SMC_BASE + SMC_KEY1_OFF)))
00201 #define SMC_KEY2       (*((reg32_t *)(SMC_BASE + SMC_KEY2_OFF)))
00202 #define SMC_WPCR       (*((reg32_t *)(SMC_BASE + SMC_WPCR_OFF)))
00203 #define SMC_WPSR       (*((reg32_t *)(SMC_BASE + SMC_WPSR_OFF)))
00204 /*\}*/
00205
00209 /*\{*/
00210 #define NFC_SRAM_BASE_ADDR  0x20100000  ///< Base address of NFC SRAM
00211 #define NFC_CMD_BASE_ADDR   0x60000000  ///< Base address for NFC Address Command
00212 /*\}*/
00213
00217 /*\{*/
00218 #define NFC_CMD_CMD1           (0xFF <<  2)  ///< Command Register Value for Cycle 1
00219 #define NFC_CMD_CMD2           (0xFF << 10)  ///< Command Register Value for Cycle 2
00220 #define NFC_CMD_VCMD2          BV(18)        ///< Valid Cycle 2 Command
00221 #define NFC_CMD_ACYCLE_MASK    (0x7 << 19)   ///< Number of Address required for the current command
00222 #define NFC_CMD_ACYCLE_NONE    (0x0 << 19)   ///< No address cycle
00223 #define NFC_CMD_ACYCLE_ONE     (0x1 << 19)   ///< One address cycle
00224 #define NFC_CMD_ACYCLE_TWO     (0x2 << 19)   ///< Two address cycles
00225 #define NFC_CMD_ACYCLE_THREE   (0x3 << 19)   ///< Three address cycles
00226 #define NFC_CMD_ACYCLE_FOUR    (0x4 << 19)   ///< Four address cycles
00227 #define NFC_CMD_ACYCLE_FIVE    (0x5 << 19)   ///< Five address cycles
00228 #define NFC_CMD_CSID_SHIFT     22            ///< Chip Select shift
00229 #define NFC_CMD_CSID_MASK      (0x7 << NFC_CMD_CSID_SHIFT)   ///< Chip Select mask
00230 #define NFC_CMD_NFCEN          BV(25)        ///< NFC Enable
00231 #define NFC_CMD_NFCWR          BV(26)        ///< NFC Write Enable
00232 #define NFC_CMD_NFCCMD         BV(27)        ///< NFC Command Enable
00233 /*\}*/
00234
00235
00239 /*\{*/
00240 #define SMC_CFG_PAGESIZE_SHIFT       0
00241 #define SMC_CFG_PAGESIZE_MASK        (0x3 << SMC_CFG_PAGESIZE_SHIFT)
00242 #define SMC_CFG_PAGESIZE_PS512_16    (0x0 << 0)
00243 #define SMC_CFG_PAGESIZE_PS1024_32   (0x1 << 0)
00244 #define SMC_CFG_PAGESIZE_PS2048_64   (0x2 << 0)
00245 #define SMC_CFG_PAGESIZE_PS4096_128  (0x3 << 0)
00246 #define SMC_CFG_WSPARE               (0x1 << 8)
00247 #define SMC_CFG_RSPARE               (0x1 << 9)
00248 #define SMC_CFG_EDGECTRL             (0x1 << 12)
00249 #define SMC_CFG_RBEDGE               (0x1 << 13)
00250 #define SMC_CFG_DTOCYC_SHIFT         16
00251 #define SMC_CFG_DTOCYC_MASK          (0xf << SMC_CFG_DTOCYC_SHIFT)
00252 #define SMC_CFG_DTOCYC(value)        (SMC_CFG_DTOCYC_MASK & ((value) << SMC_CFG_DTOCYC_SHIFT))
00253 #define SMC_CFG_DTOMUL_SHIFT         20
00254 #define SMC_CFG_DTOMUL_MASK          (0x7 << SMC_CFG_DTOMUL_SHIFT)
00255 #define SMC_CFG_DTOMUL_X1            (0x0 << 20)
00256 #define SMC_CFG_DTOMUL_X16           (0x1 << 20)
00257 #define SMC_CFG_DTOMUL_X128          (0x2 << 20)
00258 #define SMC_CFG_DTOMUL_X256          (0x3 << 20)
00259 #define SMC_CFG_DTOMUL_X1024         (0x4 << 20)
00260 #define SMC_CFG_DTOMUL_X4096         (0x5 << 20)
00261 #define SMC_CFG_DTOMUL_X65536        (0x6 << 20)
00262 #define SMC_CFG_DTOMUL_X1048576      (0x7 << 20)
00263 /*\}*/
00264
00268 /*\{*/
00269 #define SMC_CTRL_NFCEN   BV(0)
00270 #define SMC_CTRL_NFCDIS  BV(1)
00271 /*\}*/
00272
00276 /*\{*/
00277 #define SMC_SR_SMCSTS        BV(0)
00278 #define SMC_SR_RB_RISE       BV(4)
00279 #define SMC_SR_RB_FALL       BV(5)
00280 #define SMC_SR_NFCBUSY       BV(8)
00281 #define SMC_SR_NFCWR         BV(11)
00282 #define SMC_SR_NFCSID_SHIFT  12
00283 #define SMC_SR_NFCSID_MASK   (0x7 << SMC_SR_NFCSID_SHIFT)
00284 #define SMC_SR_XFRDONE       BV(16)
00285 #define SMC_SR_CMDDONE       BV(17)
00286 #define SMC_SR_DTOE          BV(20)
00287 #define SMC_SR_UNDEF         BV(21)
00288 #define SMC_SR_AWB           BV(22)
00289 #define SMC_SR_NFCASE        BV(23)
00290 #define SMC_SR_RB_EDGE0      BV(24)
00291 /*\}*/
00292
00296 /*\{*/
00297 #define SMC_ECC_CTRL_RST    BV(0)
00298 #define SMC_ECC_CTRL_SWRST  BV(1)
00299 /*\}*/
00300
00304 /*\{*/
00305 #define SMC_ECC_MD_ECC_PAGESIZE_SHIFT        0
00306 #define SMC_ECC_MD_ECC_PAGESIZE_MASK         0x3
00307 #define SMC_ECC_MD_ECC_PAGESIZE_PS512_16     0x0
00308 #define SMC_ECC_MD_ECC_PAGESIZE_PS1024_32    0x1
00309 #define SMC_ECC_MD_ECC_PAGESIZE_PS2048_64    0x2
00310 #define SMC_ECC_MD_ECC_PAGESIZE_PS4096_128   0x3
00311 #define SMC_ECC_MD_TYPCORREC_SHIFT           4
00312 #define SMC_ECC_MD_TYPCORREC_MASK            (0x3 << SMC_ECC_MD_TYPCORREC_SHIFT)
00313 #define SMC_ECC_MD_TYPCORREC_CPAGE           (0x0 << SMC_ECC_MD_TYPCORREC_SHIFT)
00314 #define SMC_ECC_MD_TYPCORREC_C256B           (0x1 << SMC_ECC_MD_TYPCORREC_SHIFT)
00315 #define SMC_ECC_MD_TYPCORREC_C512B           (0x2 << SMC_ECC_MD_TYPCORREC_SHIFT)
00316 /*\}*/
00317
00321 /*\{*/
00322 #define SMC_SETUP_NWE_SETUP_MASK      0x3f
00323 #define SMC_SETUP_NWE_SETUP(x)        (SMC_SETUP_NWE_SETUP_MASK & (x))
00324 #define SMC_SETUP_NCS_WR_SETUP_SHIFT  8
00325 #define SMC_SETUP_NCS_WR_SETUP_MASK   (0x3f << SMC_SETUP_NCS_WR_SETUP_SHIFT)
00326 #define SMC_SETUP_NCS_WR_SETUP(x)     (SMC_SETUP_NCS_WR_SETUP_MASK & ((x) << SMC_SETUP_NCS_WR_SETUP_SHIFT))
00327 #define SMC_SETUP_NRD_SETUP_SHIFT     16
00328 #define SMC_SETUP_NRD_SETUP_MASK      (0x3f << SMC_SETUP_NRD_SETUP_SHIFT)
00329 #define SMC_SETUP_NRD_SETUP(x)        (SMC_SETUP_NRD_SETUP_MASK & ((x) << SMC_SETUP_NRD_SETUP_SHIFT))
00330 #define SMC_SETUP_NCS_RD_SETUP_SHIFT  24
00331 #define SMC_SETUP_NCS_RD_SETUP_MASK   (0x3f << SMC_SETUP_NCS_RD_SETUP_SHIFT)
00332 #define SMC_SETUP_NCS_RD_SETUP(x)     (SMC_SETUP_NCS_RD_SETUP_MASK & ((x) << SMC_SETUP_NCS_RD_SETUP_SHIFT))
00333 /*\}*/
00334
00338 /*\{*/
00339 #define SMC_PULSE_NWE_PULSE_MASK      0x3f
00340 #define SMC_PULSE_NWE_PULSE(x)        (SMC_PULSE_NWE_PULSE_MASK & (x))
00341 #define SMC_PULSE_NCS_WR_PULSE_SHIFT  8
00342 #define SMC_PULSE_NCS_WR_PULSE_MASK   (0x3f << SMC_PULSE_NCS_WR_PULSE_SHIFT)
00343 #define SMC_PULSE_NCS_WR_PULSE(x)     (SMC_PULSE_NCS_WR_PULSE_MASK & ((x) << SMC_PULSE_NCS_WR_PULSE_SHIFT))
00344 #define SMC_PULSE_NRD_PULSE_SHIFT     16
00345 #define SMC_PULSE_NRD_PULSE_MASK      (0x3f << SMC_PULSE_NRD_PULSE_SHIFT)
00346 #define SMC_PULSE_NRD_PULSE(x)        (SMC_PULSE_NRD_PULSE_MASK & ((x) << SMC_PULSE_NRD_PULSE_SHIFT))
00347 #define SMC_PULSE_NCS_RD_PULSE_SHIFT  24
00348 #define SMC_PULSE_NCS_RD_PULSE_MASK   (0x3f << SMC_PULSE_NCS_RD_PULSE_SHIFT)
00349 #define SMC_PULSE_NCS_RD_PULSE(x)     (SMC_PULSE_NCS_RD_PULSE_MASK & ((x) << SMC_PULSE_NCS_RD_PULSE_SHIFT))
00350 /*\}*/
00351
00355 /*\{*/
00356 #define SMC_CYCLE_NWE_CYCLE_MASK      0x1ff
00357 #define SMC_CYCLE_NWE_CYCLE(x)        (SMC_CYCLE_NWE_CYCLE_MASK & (x))
00358 #define SMC_CYCLE_NRD_CYCLE_SHIFT     16
00359 #define SMC_CYCLE_NRD_CYCLE_MASK      (0x1ff << SMC_CYCLE_NRD_CYCLE_SHIFT)
00360 #define SMC_CYCLE_NRD_CYCLE(x)        (SMC_CYCLE_NRD_CYCLE_MASK & ((x) << SMC_CYCLE_NRD_CYCLE_SHIFT))
00361 /*\}*/
00362
00366 /*\{*/
00367 #define SMC_TIMINGS_TCLR_SHIFT     0
00368 #define SMC_TIMINGS_TCLR_MASK      (0xf << SMC_TIMINGS_TCLR_SHIFT)
00369 #define SMC_TIMINGS_TCLR(value)    (SMC_TIMINGS_TCLR_MASK & ((value) << SMC_TIMINGS_TCLR_SHIFT))
00370 #define SMC_TIMINGS_TADL_SHIFT     4
00371 #define SMC_TIMINGS_TADL_MASK      (0xf << SMC_TIMINGS_TADL_SHIFT)
00372 #define SMC_TIMINGS_TADL(value)    (SMC_TIMINGS_TADL_MASK & ((value) << SMC_TIMINGS_TADL_SHIFT))
00373 #define SMC_TIMINGS_TAR_SHIFT      8
00374 #define SMC_TIMINGS_TAR_MASK       (0xf << SMC_TIMINGS_TAR_SHIFT)
00375 #define SMC_TIMINGS_TAR(value)     (SMC_TIMINGS_TAR_MASK & ((value) << SMC_TIMINGS_TAR_SHIFT))
00376 #define SMC_TIMINGS_OCMS           BV(12)
00377 #define SMC_TIMINGS_TRR_SHIFT      16
00378 #define SMC_TIMINGS_TRR_MASK       (0xf << SMC_TIMINGS_TRR_SHIFT)
00379 #define SMC_TIMINGS_TRR(value)     (SMC_TIMINGS_TRR_MASK & ((value) << SMC_TIMINGS_TRR_SHIFT))
00380 #define SMC_TIMINGS_TWB_SHIFT      24
00381 #define SMC_TIMINGS_TWB_MASK       (0xf << SMC_TIMINGS_TWB_SHIFT)
00382 #define SMC_TIMINGS_TWB(value)     (SMC_TIMINGS_TWB_MASK & ((value) << SMC_TIMINGS_TWB_SHIFT))
00383 #define SMC_TIMINGS_RBNSEL_SHIFT   28
00384 #define SMC_TIMINGS_RBNSEL_MASK    (0x7 << SMC_TIMINGS_RBNSEL_SHIFT)
00385 #define SMC_TIMINGS_RBNSEL(value)  (SMC_TIMINGS_RBNSEL_MASK & ((value) << SMC_TIMINGS_RBNSEL_SHIFT))
00386 #define SMC_TIMINGS_NFSEL          BV(31)
00387 /*\}*/
00388
00392 /*\{*/
00393 #define SMC_MODE_READ_MODE            BV(0)
00394 #define SMC_MODE_WRITE_MODE           BV(1)
00395 #define SMC_MODE_EXNW_MODE_SHIFT      4
00396 #define SMC_MODE_EXNW_MODE_MASK       (0x3 << SMC_MODE_EXNW_MODE_SHIFT)
00397 #define   SMC_MODE_EXNW_MODE_DISABLED (0x0 << SNC_MODE_EXNW_MODE_SHIFT)
00398 #define   SMC_MODE_EXNW_MODE_FROZEN   (0x2 << SNC_MODE_EXNW_MODE_SHIFT)
00399 #define   SMC_MODE_EXNW_MODE_READY    (0x3 << SNC_MODE_EXNW_MODE_SHIFT)
00400 #define SMC_MODE_BAT                  BV(8)
00401 #define SMC_MODE_DBW                  BV(12)
00402 #define SMC_MODE_TDF_CYCLES_SHIFT     16
00403 #define SMC_MODE_TDF_CYCLES_MASK      (0xf << SMC_MODE_TDF_CYCLES_SHIFT)
00404 #define SMC_MODE_TDF_CYCLES(x)        (SMC_MODE_TDF_CYCLES_MASK & ((x) << SMC_MODE_TDF_CYCLES_SHIFT))
00405 #define SMC_MODE_TDF_MODE             BV(20)
00406 /*\}*/
00407
00408 #endif /* CPU_CM3_SAM3X || CPU_CM3_SAM3U */
00409
00410 #endif /* SAM3_SMC_H */


BeRTOS: sam3_spi.h File Reference

  • cpu
  • cortex-m3
  • io
Defines
sam3_spi.h File Reference

Go to the source code of this file.

Defines

#define | SPI0_BASE 0x40008000
SPI base addresses.
#define | SPI_CR_OFF 0x00000000
SPI Control Register.
#define | SPI_SPIEN 0
SPI enable.
#define | SPI_SPIDIS 1
SPI disable.
#define | SPI_SWRST 7
Software reset.
#define | SPI_LASTXFER 24
Last transfer.
#define | SPI_MR_OFF 0x00000004
SPI Mode Register.
#define | SPI_MSTR 0
Master mode.
#define | SPI_PS 1
Peripheral select.
#define | SPI_PCSDEC 2
Chip select decode.
#define | SPI_FDIV 3
Clock selection.
#define | SPI_MODFDIS 4
Mode fault detection.
#define | SPI_LLB 7
Local loopback enable.
#define | SPI_PCS 0x000F0000
Peripheral chip select mask.
#define | SPI_PCS_0 0x000E0000
Peripheral chip select 0.
#define | SPI_PCS_1 0x000D0000
Peripheral chip select 1.
#define | SPI_PCS_2 0x000B0000
Peripheral chip select 2.
#define | SPI_PCS_3 0x00070000
Peripheral chip select 3.
#define | SPI_PCS_SHIFT 16
Least significant bit of peripheral chip select.
#define | SPI_DLYBCS 0xFF000000
Mask for delay between chip selects.
#define | SPI_DLYBCS_SHIFT 24
Least significant bit of delay between chip selects.
#define | SPI_RDR_OFF 0x00000008
SPI Receive Data Register.
#define | SPI_RD 0x0000FFFF
Receive data mask.
#define | SPI_RD_SHIFT 0
Least significant bit of receive data.
#define | SPI_TDR_OFF 0x0000000C
SPI Transmit Data Register.
#define | SPI_TD 0x0000FFFF
Transmit data mask.
#define | SPI_TD_SHIFT 0
Least significant bit of transmit data.
#define | SPI_SR_OFF 0x00000010
SPI Status and Interrupt Register.
#define | SPI_IER_OFF 0x00000014
Interrupt enable register offset.
#define | SPI_IDR_OFF 0x00000018
Interrupt disable register offset.
#define | SPI_IMR_OFF 0x0000001C
Interrupt mask register offset.
#define | SPI_RDRF 0
Receive data register full.
#define | SPI_TDRE 1
Transmit data register empty.
#define | SPI_MODF 2
Mode fault error.
#define | SPI_OVRES 3
Overrun error status.
#define | SPI_ENDRX 4
End of RX buffer.
#define | SPI_ENDTX 5
End of TX buffer.
#define | SPI_RXBUFF 6
RX buffer full.
#define | SPI_TXBUFE 7
TX buffer empty.
#define | SPI_NSSR 8
NSS rising.
#define | SPI_TXEMPTY 9
Transmission register empty.
#define | SPI_SPIENS 16
SPI enable status.
#define | SPI_CSR0_OFF 0x00000030
SPI Chip Select Registers.
#define | SPI_CSR1_OFF 0x00000034
Chip select register 1 offset.
#define | SPI_CSR2_OFF 0x00000038
Chip select register 2 offset.
#define | SPI_CSR3_OFF 0x0000003C
Chip select register 3 offset.
#define | SPI_CPOL 0
Clock polarity.
#define | SPI_NCPHA 1
Clock phase.
#define | SPI_CSAAT 3
Chip select active after transfer.
#define | SPI_BITS 0x000000F0
Bits per transfer mask.
#define | SPI_BITS_8 0x00000000
8 bits per transfer.
#define | SPI_BITS_9 0x00000010
9 bits per transfer.
#define | SPI_BITS_10 0x00000020
10 bits per transfer.
#define | SPI_BITS_11 0x00000030
11 bits per transfer.
#define | SPI_BITS_12 0x00000040
12 bits per transfer.
#define | SPI_BITS_13 0x00000050
13 bits per transfer.
#define | SPI_BITS_14 0x00000060
14 bits per transfer.
#define | SPI_BITS_15 0x00000070
15 bits per transfer.
#define | SPI_BITS_16 0x00000080
16 bits per transfer.
#define | SPI_BITS_SHIFT 4
Least significant bit of bits per transfer.
#define | SPI_SCBR 0x0000FF00
Serial clock baud rate mask.
#define | SPI_SCBR_SHIFT 8
Least significant bit of serial clock baud rate.
#define | SPI_DLYBS 0x00FF0000
Delay before SPCK mask.
#define | SPI_DLYBS_SHIFT 16
Least significant bit of delay before SPCK.
#define | SPI_DLYBCT 0xFF000000
Delay between consecutive transfers mask.
#define | SPI_DLYBCT_SHIFT 24
Least significant bit of delay between consecutive transfers.
#define | SPI0_CR (*((reg32_t *)(SPI0_BASE + SPI_CR_OFF)))
Single SPI Register Addresses.
#define | SPI0_MR (*((reg32_t *)(SPI0_BASE + SPI_MR_OFF)))
SPI Mode Register Read/Write Reset=0x0.
#define | SPI0_RDR (*((reg32_t *)(SPI0_BASE + SPI_RDR_OFF)))
SPI Receive Data Register Read-only Reset=0x0.
#define | SPI0_TDR (*((reg32_t *)(SPI0_BASE + SPI_TDR_OFF)))
SPI Transmit Data Register Write-only .
#define | SPI0_SR (*((reg32_t *)(SPI0_BASE + SPI_SR_OFF)))
SPI Status Register Read-only Reset=0x000000F0.
#define | SPI0_IER (*((reg32_t *)(SPI0_BASE + SPI_IER_OFF)))
SPI Interrupt Enable Register Write-only.
#define | SPI0_IDR (*((reg32_t *)(SPI0_BASE + SPI_IDR_OFF)))
SPI Interrupt Disable Register Write-only.
#define | SPI0_IMR (*((reg32_t *)(SPI0_BASE + SPI_IMR_OFF)))
SPI Interrupt Mask Register Read-only Reset=0x0.
#define | SPI0_CSR0 (*((reg32_t *)(SPI0_BASE + SPI_CSR0_OFF)))
SPI Chip Select Register 0 Read/Write Reset=0x0.
#define | SPI0_CSR1 (*((reg32_t *)(SPI0_BASE + SPI_CSR1_OFF)))
SPI Chip Select Register 1 Read/Write Reset=0x0.
#define | SPI0_CSR2 (*((reg32_t *)(SPI0_BASE + SPI_CSR2_OFF)))
SPI Chip Select Register 2 Read/Write Reset=0x0.
#define | SPI0_CSR3 (*((reg32_t *)(SPI0_BASE + SPI_CSR3_OFF)))
SPI Chip Select Register 3 Read/Write Reset=0x0.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

Atmel SAM3 SPI register definitions. This file is based on NUT/OS implementation. See license below.

Definition in file sam3_spi.h.

Define Documentation

#define SPI0_CR (*((reg32_t *)(SPI0_BASE + SPI_CR_OFF)))

Single SPI Register Addresses.

SPI 0 Register Addresses SPI Control Register Write-only.

Definition at line 230 of file sam3_spi.h.

#define SPI_CR_OFF 0x00000000

SPI Control Register.

Control register offset.

Definition at line 89 of file sam3_spi.h.

#define SPI_CSR0_OFF 0x00000030

SPI Chip Select Registers.

Chip select register 0 offset.

Definition at line 165 of file sam3_spi.h.

#define SPI_MR_OFF 0x00000004

SPI Mode Register.

Mode register offset.

Definition at line 101 of file sam3_spi.h.

#define SPI_RDR_OFF 0x00000008

SPI Receive Data Register.

Receive data register offset.

Definition at line 123 of file sam3_spi.h.

#define SPI_SR_OFF 0x00000010

SPI Status and Interrupt Register.

Status register offset.

Definition at line 143 of file sam3_spi.h.

#define SPI_TDR_OFF 0x0000000C

SPI Transmit Data Register.

Transmit data register offset.

Definition at line 133 of file sam3_spi.h.


BeRTOS: sam3_spi.h Source File

  • cpu
  • cortex-m3
  • io
sam3_spi.h
Go to the documentation of this file.
00001
00041 /*
00042  * Copyright (C) 2006-2007 by egnite Software GmbH. All rights reserved.
00043  *
00044  * Redistribution and use in source and binary forms, with or without
00045  * modification, are permitted provided that the following conditions
00046  * are met:
00047  *
00048  * 1. Redistributions of source code must retain the above copyright
00049  *    notice, this list of conditions and the following disclaimer.
00050  * 2. Redistributions in binary form must reproduce the above copyright
00051  *    notice, this list of conditions and the following disclaimer in the
00052  *    documentation and/or other materials provided with the distribution.
00053  * 3. Neither the name of the copyright holders nor the names of
00054  *    contributors may be used to endorse or promote products derived
00055  *    from this software without specific prior written permission.
00056  *
00057  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00058  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00059  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00060  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00061  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00062  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00063  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00064  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00065  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00066  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00067  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00068  * SUCH DAMAGE.
00069  *
00070  * For additional information see http://www.ethernut.de/
00071
00072  */
00073
00074 #ifndef SAM3_SPI_H
00075 #define SAM3_SPI_H
00076
00080 #define SPI0_BASE  0x40008000
00081 #if CPU_CM3_SAM3X
00082     #define SPI1_BASE  0x4000C000
00083 #endif
00084
00088 /*\{*/
00089 #define SPI_CR_OFF      0x00000000  ///< Control register offset.
00090
00091 #define SPI_SPIEN                0  ///< SPI enable.
00092 #define SPI_SPIDIS               1  ///< SPI disable.
00093 #define SPI_SWRST                7  ///< Software reset.
00094 #define SPI_LASTXFER            24  ///< Last transfer.
00095 /*\}*/
00096
00100 /*\{*/
00101 #define SPI_MR_OFF      0x00000004  ///< Mode register offset.
00102
00103 #define SPI_MSTR                 0  ///< Master mode.
00104 #define SPI_PS                   1  ///< Peripheral select.
00105 #define SPI_PCSDEC               2 ///< Chip select decode.
00106 #define SPI_FDIV                 3  ///< Clock selection.
00107 #define SPI_MODFDIS              4  ///< Mode fault detection.
00108 #define SPI_LLB                  7  ///< Local loopback enable.
00109 #define SPI_PCS         0x000F0000  ///< Peripheral chip select mask.
00110 #define SPI_PCS_0       0x000E0000  ///< Peripheral chip select 0.
00111 #define SPI_PCS_1       0x000D0000  ///< Peripheral chip select 1.
00112 #define SPI_PCS_2       0x000B0000  ///< Peripheral chip select 2.
00113 #define SPI_PCS_3       0x00070000  ///< Peripheral chip select 3.
00114 #define SPI_PCS_SHIFT           16  ///< Least significant bit of peripheral chip select.
00115 #define SPI_DLYBCS      0xFF000000  ///< Mask for delay between chip selects.
00116 #define SPI_DLYBCS_SHIFT        24  ///< Least significant bit of delay between chip selects.
00117 /*\}*/
00118
00122 /*\{*/
00123 #define SPI_RDR_OFF     0x00000008  ///< Receive data register offset.
00124
00125 #define SPI_RD          0x0000FFFF  ///< Receive data mask.
00126 #define SPI_RD_SHIFT             0  ///< Least significant bit of receive data.
00127 /*\}*/
00128
00132 /*\{*/
00133 #define SPI_TDR_OFF     0x0000000C  ///< Transmit data register offset.
00134
00135 #define SPI_TD          0x0000FFFF  ///< Transmit data mask.
00136 #define SPI_TD_SHIFT             0  ///< Least significant bit of transmit data.
00137 /*\}*/
00138
00142 /*\{*/
00143 #define SPI_SR_OFF      0x00000010  ///< Status register offset.
00144 #define SPI_IER_OFF     0x00000014  ///< Interrupt enable register offset.
00145 #define SPI_IDR_OFF     0x00000018  ///< Interrupt disable register offset.
00146 #define SPI_IMR_OFF     0x0000001C  ///< Interrupt mask register offset.
00147
00148 #define SPI_RDRF                 0  ///< Receive data register full.
00149 #define SPI_TDRE                 1  ///< Transmit data register empty.
00150 #define SPI_MODF                 2  ///< Mode fault error.
00151 #define SPI_OVRES                3  ///< Overrun error status.
00152 #define SPI_ENDRX                4  ///< End of RX buffer.
00153 #define SPI_ENDTX                5  ///< End of TX buffer.
00154 #define SPI_RXBUFF               6  ///< RX buffer full.
00155 #define SPI_TXBUFE               7  ///< TX buffer empty.
00156 #define SPI_NSSR                 8  ///< NSS rising.
00157 #define SPI_TXEMPTY              9  ///< Transmission register empty.
00158 #define SPI_SPIENS              16  ///< SPI enable status.
00159 /*\}*/
00160
00164 /*\{*/
00165 #define SPI_CSR0_OFF    0x00000030  ///< Chip select register 0 offset.
00166 #define SPI_CSR1_OFF    0x00000034  ///< Chip select register 1 offset.
00167 #define SPI_CSR2_OFF    0x00000038  ///< Chip select register 2 offset.
00168 #define SPI_CSR3_OFF    0x0000003C  ///< Chip select register 3 offset.
00169
00170 #define SPI_CPOL                 0  ///< Clock polarity.
00171 #define SPI_NCPHA                1  ///< Clock phase.
00172 #define SPI_CSAAT                3  ///< Chip select active after transfer.
00173 #define SPI_BITS        0x000000F0  ///< Bits per transfer mask.
00174 #define SPI_BITS_8      0x00000000  ///< 8 bits per transfer.
00175 #define SPI_BITS_9      0x00000010  ///< 9 bits per transfer.
00176 #define SPI_BITS_10     0x00000020  ///< 10 bits per transfer.
00177 #define SPI_BITS_11     0x00000030  ///< 11 bits per transfer.
00178 #define SPI_BITS_12     0x00000040  ///< 12 bits per transfer.
00179 #define SPI_BITS_13     0x00000050  ///< 13 bits per transfer.
00180 #define SPI_BITS_14     0x00000060  ///< 14 bits per transfer.
00181 #define SPI_BITS_15     0x00000070  ///< 15 bits per transfer.
00182 #define SPI_BITS_16     0x00000080  ///< 16 bits per transfer.
00183 #define SPI_BITS_SHIFT           4  ///< Least significant bit of bits per transfer.
00184 #define SPI_SCBR        0x0000FF00  ///< Serial clock baud rate mask.
00185 #define SPI_SCBR_SHIFT           8  ///< Least significant bit of serial clock baud rate.
00186 #define SPI_DLYBS       0x00FF0000  ///< Delay before SPCK mask.
00187 #define SPI_DLYBS_SHIFT         16  ///< Least significant bit of delay before SPCK.
00188 #define SPI_DLYBCT      0xFF000000  ///< Delay between consecutive transfers mask.
00189 #define SPI_DLYBCT_SHIFT        24  ///< Least significant bit of delay between consecutive transfers.
00190 /*\}*/
00191
00195 /*\{*/
00196 #if defined(SPI_BASE)
00197     #define SPI0_BASE   SPI_BASE
00198     #define SPI_CR      (*((reg32_t *)(SPI0_BASE + SPI0_CR_OFF)))     ///< SPI Control Register Write-only.
00199     #define SPI_MR      (*((reg32_t *)(SPI0_BASE + SPI0_MR_OFF)))     ///< SPI Mode Register Read/Write Reset=0x0.
00200     #define SPI_RDR     (*((reg32_t *)(SPI0_BASE + SPI0_RDR_OFF)))    ///< SPI Receive Data Register Read-only Reset=0x0.
00201     #define SPI_TDR     (*((reg32_t *)(SPI0_BASE + SPI0_TDR_OFF)))    ///< SPI Transmit Data Register Write-only .
00202     #define SPI_SR      (*((reg32_t *)(SPI0_BASE + SPI0_SR_OFF)))     ///< SPI Status Register Read-only Reset=0x000000F0.
00203     #define SPI_IER     (*((reg32_t *)(SPI0_BASE + SPI0_IER_OFF)))    ///< SPI Interrupt Enable Register Write-only.
00204     #define SPI_IDR     (*((reg32_t *)(SPI0_BASE + SPI0_IDR_OFF)))    ///< SPI Interrupt Disable Register Write-only.
00205     #define SPI_IMR     (*((reg32_t *)(SPI0_BASE + SPI0_IMR_OFF)))    ///< SPI Interrupt Mask Register Read-only Reset=0x0.
00206     #define SPI_CSR0    (*((reg32_t *)(SPI0_BASE + SPI0_CSR0_OFF)))   ///< SPI Chip Select Register 0 Read/Write Reset=0x0.
00207     #define SPI_CSR1    (*((reg32_t *)(SPI0_BASE + SPI0_CSR1_OFF)))   ///< SPI Chip Select Register 1 Read/Write Reset=0x0.
00208     #define SPI_CSR2    (*((reg32_t *)(SPI0_BASE + SPI0_CSR2_OFF)))   ///< SPI Chip Select Register 2 Read/Write Reset=0x0.
00209     #define SPI_CSR3    (*((reg32_t *)(SPI0_BASE + SPI0_CSR3_OFF)))   ///< SPI Chip Select Register 3 Read/Write Reset=0x0.
00210     #if defined(SPI_HAS_PDC)
00211         #define SPI_RPR     (*((reg32_t *)(SPI0_BASE + SPI0_RPR_OFF)))    ///< PDC channel 0 receive pointer register.
00212         #define SPI_RCR     (*((reg32_t *)(SPI0_BASE + SPI0_RCR_OFF)))    ///< PDC channel 0 receive counter register.
00213         #define SPI_TPR     (*((reg32_t *)(SPI0_BASE + SPI0_TPR_OFF)))    ///< PDC channel 0 transmit pointer register.
00214         #define SPI_TCR     (*((reg32_t *)(SPI0_BASE + SPI0_TCR_OFF)))    ///< PDC channel 0 transmit counter register.
00215         #define SPI_RNPR    (*((reg32_t *)(SPI0_BASE + SPI0_RNPR_OFF)))   ///< PDC channel 0 receive next pointer register.
00216         #define SPI_RNCR    (*((reg32_t *)(SPI0_BASE + SPI0_RNCR_OFF)))   ///< PDC channel 0 receive next counter register.
00217         #define SPI_TNPR    (*((reg32_t *)(SPI0_BASE + SPI0_TNPR_OFF)))   ///< PDC channel 0 transmit next pointer register.
00218         #define SPI_TNCR    (*((reg32_t *)(SPI0_BASE + SPI0_TNCR_OFF)))   ///< PDC channel 0 transmit next counter register.
00219         #define SPI_PTCR    (*((reg32_t *)(SPI0_BASE + SPI0_PTCR_OFF)))   ///< PDC channel 0 transfer control register.
00220         #define SPI_PTSR    (*((reg32_t *)(SPI0_BASE + SPI0_PTSR_OFF)))   ///< PDC channel 0 transfer status register.
00221     #endif /* SPI_HAS_PDC */
00222 #endif /* SPI_BASE */
00223 /*\}*/
00224
00228 /*\{*/
00229 #if defined(SPI0_BASE)
00230     #define SPI0_CR     (*((reg32_t *)(SPI0_BASE + SPI_CR_OFF)))        ///< SPI Control Register Write-only.
00231     #define SPI0_MR     (*((reg32_t *)(SPI0_BASE + SPI_MR_OFF)))        ///< SPI Mode Register Read/Write Reset=0x0.
00232     #define SPI0_RDR    (*((reg32_t *)(SPI0_BASE + SPI_RDR_OFF)))       ///< SPI Receive Data Register Read-only Reset=0x0.
00233     #define SPI0_TDR    (*((reg32_t *)(SPI0_BASE + SPI_TDR_OFF)))       ///< SPI Transmit Data Register Write-only .
00234     #define SPI0_SR     (*((reg32_t *)(SPI0_BASE + SPI_SR_OFF)))        ///< SPI Status Register Read-only Reset=0x000000F0.
00235     #define SPI0_IER    (*((reg32_t *)(SPI0_BASE + SPI_IER_OFF)))       ///< SPI Interrupt Enable Register Write-only.
00236     #define SPI0_IDR    (*((reg32_t *)(SPI0_BASE + SPI_IDR_OFF)))       ///< SPI Interrupt Disable Register Write-only.
00237     #define SPI0_IMR    (*((reg32_t *)(SPI0_BASE + SPI_IMR_OFF)))       ///< SPI Interrupt Mask Register Read-only Reset=0x0.
00238     #define SPI0_CSR0   (*((reg32_t *)(SPI0_BASE + SPI_CSR0_OFF)))      ///< SPI Chip Select Register 0 Read/Write Reset=0x0.
00239     #define SPI0_CSR1   (*((reg32_t *)(SPI0_BASE + SPI_CSR1_OFF)))      ///< SPI Chip Select Register 1 Read/Write Reset=0x0.
00240     #define SPI0_CSR2   (*((reg32_t *)(SPI0_BASE + SPI_CSR2_OFF)))      ///< SPI Chip Select Register 2 Read/Write Reset=0x0.
00241     #define SPI0_CSR3   (*((reg32_t *)(SPI0_BASE + SPI_CSR3_OFF)))      ///< SPI Chip Select Register 3 Read/Write Reset=0x0.
00242     #if defined(SPI_HAS_PDC)
00243         #define SPI0_RPR    (*((reg32_t *)(SPI0_BASE + PERIPH_RPR_OFF)))    ///< PDC channel 0 receive pointer register.
00244         #define SPI0_RCR    (*((reg32_t *)(SPI0_BASE + PERIPH_RCR_OFF)))    ///< PDC channel 0 receive counter register.
00245         #define SPI0_TPR    (*((reg32_t *)(SPI0_BASE + PERIPH_TPR_OFF)))    ///< PDC channel 0 transmit pointer register.
00246         #define SPI0_TCR    (*((reg32_t *)(SPI0_BASE + PERIPH_TCR_OFF)))    ///< PDC channel 0 transmit counter register.
00247         #define SPI0_RNPR   (*((reg32_t *)(SPI0_BASE + PERIPH_RNPR_OFF)))   ///< PDC channel 0 receive next pointer register.
00248         #define SPI0_RNCR   (*((reg32_t *)(SPI0_BASE + PERIPH_RNCR_OFF)))   ///< PDC channel 0 receive next counter register.
00249         #define SPI0_TNPR   (*((reg32_t *)(SPI0_BASE + PERIPH_TNPR_OFF)))   ///< PDC channel 0 transmit next pointer register.
00250         #define SPI0_TNCR   (*((reg32_t *)(SPI0_BASE + PERIPH_TNCR_OFF)))   ///< PDC channel 0 transmit next counter register.
00251         #define SPI0_PTCR   (*((reg32_t *)(SPI0_BASE + PERIPH_PTCR_OFF)))   ///< PDC channel 0 transfer control register.
00252         #define SPI0_PTSR   (*((reg32_t *)(SPI0_BASE + PERIPH_PTSR_OFF)))   ///< PDC channel 0 transfer status register.
00253     #endif /* SPI_HAS_PDC */
00254 #endif /* SPI0_BASE */
00255 /*\}*/
00256
00260 /*\{*/
00261 #if defined(SPI1_BASE)
00262     #define SPI1_CR     (*((reg32_t *)(SPI1_BASE + SPI_CR_OFF)))        ///< SPI Control Register Write-only.
00263     #define SPI1_MR     (*((reg32_t *)(SPI1_BASE + SPI_MR_OFF)))        ///< SPI Mode Register Read/Write Reset=0x0.
00264     #define SPI1_RDR    (*((reg32_t *)(SPI1_BASE + SPI_RDR_OFF)))       ///< SPI Receive Data Register Read-only Reset=0x0.
00265     #define SPI1_TDR    (*((reg32_t *)(SPI1_BASE + SPI_TDR_OFF)))       ///< SPI Transmit Data Register Write-only .
00266     #define SPI1_SR     (*((reg32_t *)(SPI1_BASE + SPI_SR_OFF)))        ///< SPI Status Register Read-only Reset=0x000000F0.
00267     #define SPI1_IER    (*((reg32_t *)(SPI1_BASE + SPI_IER_OFF)))       ///< SPI Interrupt Enable Register Write-only.
00268     #define SPI1_IDR    (*((reg32_t *)(SPI1_BASE + SPI_IDR_OFF)))       ///< SPI Interrupt Disable Register Write-only.
00269     #define SPI1_IMR    (*((reg32_t *)(SPI1_BASE + SPI_IMR_OFF)))       ///< SPI Interrupt Mask Register Read-only Reset=0x0.
00270     #define SPI1_CSR0   (*((reg32_t *)(SPI1_BASE + SPI_CSR0_OFF)))      ///< SPI Chip Select Register 0 Read/Write Reset=0x0.
00271     #define SPI1_CSR1   (*((reg32_t *)(SPI1_BASE + SPI_CSR1_OFF)))      ///< SPI Chip Select Register 1 Read/Write Reset=0x0.
00272     #define SPI1_CSR2   (*((reg32_t *)(SPI1_BASE + SPI_CSR2_OFF)))      ///< SPI Chip Select Register 2 Read/Write Reset=0x0.
00273     #define SPI1_CSR3   (*((reg32_t *)(SPI1_BASE + SPI_CSR3_OFF)))      ///< SPI Chip Select Register 3 Read/Write Reset=0x0.
00274     #if defined(SPI_HAS_PDC)
00275         #define SPI1_RPR    (*((reg32_t *)(SPI1_BASE + PERIPH_RPR_OFF)))    ///< PDC channel 1 receive pointer register.
00276         #define SPI1_RCR    (*((reg32_t *)(SPI1_BASE + PERIPH_RCR_OFF)))    ///< PDC channel 1 receive counter register.
00277         #define SPI1_TPR    (*((reg32_t *)(SPI1_BASE + PERIPH_TPR_OFF)))    ///< PDC channel 1 transmit pointer register.
00278         #define SPI1_TCR    (*((reg32_t *)(SPI1_BASE + PERIPH_TCR_OFF)))    ///< PDC channel 1 transmit counter register.
00279         #define SPI1_RNPR   (*((reg32_t *)(SPI1_BASE + PERIPH_RNPR_OFF)))   ///< PDC channel 1 receive next pointer register.
00280         #define SPI1_RNCR   (*((reg32_t *)(SPI1_BASE + PERIPH_RNCR_OFF)))   ///< PDC channel 1 receive next counter register.
00281         #define SPI1_TNPR   (*((reg32_t *)(SPI1_BASE + PERIPH_TNPR_OFF)))   ///< PDC channel 1 transmit next pointer register.
00282         #define SPI1_TNCR   (*((reg32_t *)(SPI1_BASE + PERIPH_TNCR_OFF)))   ///< PDC channel 1 transmit next counter register.
00283         #define SPI1_PTCR   (*((reg32_t *)(SPI1_BASE + PERIPH_PTCR_OFF)))   ///< PDC channel 1 transfer control register.
00284         #define SPI1_PTSR   (*((reg32_t *)(SPI1_BASE + PERIPH_PTSR_OFF)))   ///< PDC channel 1 transfer status register.
00285     #endif /* SPI_HAS_PDC */
00286 #endif /* SPI1_BASE */
00287 /*\}*/
00288
00289 #endif  /* SAM3_SPI_H */


BeRTOS: sam3_sysctl.h File Reference

  • cpu
  • cortex-m3
  • io
Defines
sam3_sysctl.h File Reference

Atmel SAM3 system controller registers. More...

Go to the source code of this file.

Defines

#define | SUPC_BASE 0x400E1410
Supply controller base.
#define | SUPC_CR_OFF 0x0
Supply controller offsets.
#define | SUPC_SMMR_OFF 0x4
Supply Controller Supply Monitor Mode.
#define | SUPC_MR_OFF 0x8
Supply Controller Mode.
#define | SUPC_WUMR_OFF 0xC
Supply Controller Wake Up Mode.
#define | SUPC_WUIR_OFF 0x10
Supply Controller Wake Up Inputs.
#define | SUPC_SR_OFF 0x14
Supply Controller Status.
#define | SUPC_CR (*((reg32_t *)(SUPC_BASE + SUPC_CR_OFF )))
Supply controller registers.
#define | SUPC_SMMR (*((reg32_t *)(SUPC_BASE + SUPC_SMMR_OFF)))
Supply Controller Supply Monitor Mode.
#define | SUPC_MR (*((reg32_t *)(SUPC_BASE + SUPC_MR_OFF )))
Supply Controller Mode.
#define | SUPC_WUMR (*((reg32_t *)(SUPC_BASE + SUPC_WUMR_OFF)))
Supply Controller Wake Up Mode.
#define | SUPC_WUIR (*((reg32_t *)(SUPC_BASE + SUPC_WUIR_OFF)))
Supply Controller Wake Up Inputs.
#define | SUPC_SR (*((reg32_t *)(SUPC_BASE + SUPC_SR_OFF )))
Supply Controller Status.
#define | SUPC_CR_VROFF 2
Defines for bit fields in SUPC_CR register.
#define | SUPC_CR_XTALSEL 3
Crystal Oscillator Select.
#define | SUPC_CR_KEY_P 24
Defines for bit fields in SUPC_CR register.
#define | SUPC_CR_KEY_MASK (0xff << SUPC_CR_KEY_P)
SUPC_CR key.
#define | SUPC_CR_KEY(value) (SUPC_CR_KEY_MASK & ((value) << SUPC_CR_KEY_P))
Defines for bit fields in SUPC_CR register.
#define | SUPC_SR_WKUPS 1
Defines for bit fields in SUPC_SR register.
#define | SUPC_SR_SMWS 2
Supply Monitor Detection Wake Up Status.
#define | SUPC_SR_BODRSTS 3
Brownout Detector Reset Status.
#define | SUPC_SR_SMRSTS 4
Supply Monitor Reset Status.
#define | SUPC_SR_SMS 5
Supply Monitor Status.
#define | SUPC_SR_SMOS 6
Supply Monitor Output Status.
#define | SUPC_SR_OSCSEL 7
32-kHz Oscillator Selection Status
#define | SUPC_SR_WKUPIS0 16
WKUP Input Status 0.
#define | SUPC_SR_WKUPIS1 17
WKUP Input Status 1.
#define | SUPC_SR_WKUPIS2 18
WKUP Input Status 2.
#define | SUPC_SR_WKUPIS3 19
WKUP Input Status 3.
#define | SUPC_SR_WKUPIS4 20
WKUP Input Status 4.
#define | SUPC_SR_WKUPIS5 21
WKUP Input Status 5.
#define | SUPC_SR_WKUPIS6 22
WKUP Input Status 6.
#define | SUPC_SR_WKUPIS7 23
WKUP Input Status 7.
#define | SUPC_SR_WKUPIS8 24
WKUP Input Status 8.
#define | SUPC_SR_WKUPIS9 25
WKUP Input Status 9.
#define | SUPC_SR_WKUPIS10 26
WKUP Input Status 10.
#define | SUPC_SR_WKUPIS11 27
WKUP Input Status 11.
#define | SUPC_SR_WKUPIS12 28
WKUP Input Status 12.
#define | SUPC_SR_WKUPIS13 29
WKUP Input Status 13.
#define | SUPC_SR_WKUPIS14 30
WKUP Input Status 14.
#define | SUPC_SR_WKUPIS15 31
WKUP Input Status 15.

Detailed Description

Atmel SAM3 system controller registers.

Definition in file sam3_sysctl.h.

Define Documentation

#define SUPC_CR (*((reg32_t *)(SUPC_BASE + SUPC_CR_OFF )))

Supply controller registers.

Supply Controller Control

Definition at line 62 of file sam3_sysctl.h.

#define SUPC_CR_KEY ( value ) (SUPC_CR_KEY_MASK & ((value) << SUPC_CR_KEY_P))

Defines for bit fields in SUPC_CR register.

Voltage Regulator Off

Definition at line 78 of file sam3_sysctl.h.

#define SUPC_CR_KEY_P 24

Defines for bit fields in SUPC_CR register.

Voltage Regulator Off

Definition at line 76 of file sam3_sysctl.h.

#define SUPC_CR_OFF 0x0

Supply controller offsets.

Supply Controller Control

Definition at line 50 of file sam3_sysctl.h.

#define SUPC_CR_VROFF 2

Defines for bit fields in SUPC_CR register.

Voltage Regulator Off

Definition at line 74 of file sam3_sysctl.h.

#define SUPC_SR_WKUPS 1

Defines for bit fields in SUPC_SR register.

WKUP Wake Up Status

Definition at line 85 of file sam3_sysctl.h.


BeRTOS: sam3_sysctl.h Source File

  • cpu
  • cortex-m3
  • io
sam3_sysctl.h
Go to the documentation of this file.
00001
00036 #ifndef SAM3_SYSCTL_H
00037 #define SAM3_SYSCTL_H
00038
00040 #if CPU_CM3_SAM3X
00041     #define SUPC_BASE  0x400E1A10
00042 #else
00043     #define SUPC_BASE  0x400E1410
00044 #endif
00045
00049 /*\{*/
00050 #define SUPC_CR_OFF    0x0   ///< Supply Controller Control
00051 #define SUPC_SMMR_OFF  0x4   ///< Supply Controller Supply Monitor Mode
00052 #define SUPC_MR_OFF    0x8   ///< Supply Controller Mode
00053 #define SUPC_WUMR_OFF  0xC   ///< Supply Controller Wake Up Mode
00054 #define SUPC_WUIR_OFF  0x10  ///< Supply Controller Wake Up Inputs
00055 #define SUPC_SR_OFF    0x14  ///< Supply Controller Status
00056 /*\}*/
00057
00061 /*\{*/
00062 #define SUPC_CR   (*((reg32_t *)(SUPC_BASE + SUPC_CR_OFF  )))  ///< Supply Controller Control
00063 #define SUPC_SMMR (*((reg32_t *)(SUPC_BASE + SUPC_SMMR_OFF)))  ///< Supply Controller Supply Monitor Mode
00064 #define SUPC_MR   (*((reg32_t *)(SUPC_BASE + SUPC_MR_OFF  )))  ///< Supply Controller Mode
00065 #define SUPC_WUMR (*((reg32_t *)(SUPC_BASE + SUPC_WUMR_OFF)))  ///< Supply Controller Wake Up Mode
00066 #define SUPC_WUIR (*((reg32_t *)(SUPC_BASE + SUPC_WUIR_OFF)))  ///< Supply Controller Wake Up Inputs
00067 #define SUPC_SR   (*((reg32_t *)(SUPC_BASE + SUPC_SR_OFF  )))  ///< Supply Controller Status
00068 /*\}*/
00069
00073 /*\{*/
00074 #define SUPC_CR_VROFF       2                     ///< Voltage Regulator Off
00075 #define SUPC_CR_XTALSEL     3                     ///< Crystal Oscillator Select
00076 #define SUPC_CR_KEY_P       24
00077 #define SUPC_CR_KEY_MASK    (0xff << SUPC_CR_KEY_P)   ///< SUPC_CR key
00078 #define SUPC_CR_KEY(value)  (SUPC_CR_KEY_MASK & ((value) << SUPC_CR_KEY_P))
00079 /*\}*/
00080
00084 /*\{*/
00085 #define SUPC_SR_WKUPS     1   ///< WKUP Wake Up Status
00086 #define SUPC_SR_SMWS      2   ///< Supply Monitor Detection Wake Up Status
00087 #define SUPC_SR_BODRSTS   3   ///< Brownout Detector Reset Status
00088 #define SUPC_SR_SMRSTS    4   ///< Supply Monitor Reset Status
00089 #define SUPC_SR_SMS       5   ///< Supply Monitor Status
00090 #define SUPC_SR_SMOS      6   ///< Supply Monitor Output Status
00091 #define SUPC_SR_OSCSEL    7   ///< 32-kHz Oscillator Selection Status
00092 #define SUPC_SR_WKUPIS0   16  ///< WKUP Input Status 0
00093 #define SUPC_SR_WKUPIS1   17  ///< WKUP Input Status 1
00094 #define SUPC_SR_WKUPIS2   18  ///< WKUP Input Status 2
00095 #define SUPC_SR_WKUPIS3   19  ///< WKUP Input Status 3
00096 #define SUPC_SR_WKUPIS4   20  ///< WKUP Input Status 4
00097 #define SUPC_SR_WKUPIS5   21  ///< WKUP Input Status 5
00098 #define SUPC_SR_WKUPIS6   22  ///< WKUP Input Status 6
00099 #define SUPC_SR_WKUPIS7   23  ///< WKUP Input Status 7
00100 #define SUPC_SR_WKUPIS8   24  ///< WKUP Input Status 8
00101 #define SUPC_SR_WKUPIS9   25  ///< WKUP Input Status 9
00102 #define SUPC_SR_WKUPIS10  26  ///< WKUP Input Status 10
00103 #define SUPC_SR_WKUPIS11  27  ///< WKUP Input Status 11
00104 #define SUPC_SR_WKUPIS12  28  ///< WKUP Input Status 12
00105 #define SUPC_SR_WKUPIS13  29  ///< WKUP Input Status 13
00106 #define SUPC_SR_WKUPIS14  30  ///< WKUP Input Status 14
00107 #define SUPC_SR_WKUPIS15  31  ///< WKUP Input Status 15
00108 /*\}*/
00109
00110 #endif /* SAM3_SYSCTL_H */


BeRTOS: sam3_tc.h File Reference

  • cpu
  • cortex-m3
  • io
Defines
sam3_tc.h File Reference

Go to the source code of this file.

Defines

#define | TC0_BASE 0x40080000
Timer conter register bases.
#define | TC1_BASE 0x40084000
TC1 Base Address.
#define | TC2_BASE 0x40088000
TC2 Base Address.
#define | TC0_CCR0_OFF 0x00
Timer conter control register.
#define | TC0_CCR0 (*((reg32_t*)(TC0_BASE + TC0_CCR0_OFF)))
TC0 Channel Control Register (channel = 0).
#define | TC0_CMR0_OFF 0x04
TC0 Channel Mode Register (channel = 0).
#define | TC0_CMR0 (*((reg32_t*)(TC0_BASE + TC0_CMR0_OFF)))
TC0 Channel Mode Register (channel = 0).
#define | TC_CMR_CPCTRG 14
RC Compare Trigger Enable.
#define | TC_CMR_WAVE 15
Waveform mode is enabled.
#define | TC_CMR_ACPA_SET 0x10000
RA Compare Effect: set.
#define | TC_CMR_ACPA_CLEAR 0x20000
RA Compare Effect: clear.
#define | TC_CMR_ACPA_TOGGLE 0x30000
RA Compare Effect: toggle.
#define | TC_CMR_ACPC_SET 0x40000
RC Compare Effect: set.
#define | TC_CMR_ACPC_CLEAR 0x80000
RC Compare Effect: clear.
#define | TC_CMR_ACPC_TOGGLE 0xC0000
RC Compare Effect: toggle.
#define | TC_CCR_CLKEN 0
Counter Clock Enable Command.
#define | TC_CCR_CLKDIS 1
Counter Clock Disable Command.
#define | TC_CCR_SWTRG 2
Software Trigger Command.
#define | TC_TIMER_CLOCK1 0
Select timer clock TCLK1.
#define | TC_TIMER_CLOCK2 1
Select timer clock TCLK2.
#define | TC0_SMMR0_OFF 0x08
TC0 Stepper Motor Mode Register (channel = 0).
#define | TC0_SMMR0 (*((reg32_t*)(TC0_BASE + TC0_SMMR0_OFF)))
TC0 Stepper Motor Mode Register (channel = 0).
#define | TC0_CV0_OFF 0x10
TC0 Conter Vale (channel = 0).
#define | TC0_CV0 (*((reg32_t*)(TC0_BASE + TC0_CV0_OFF)))
TC0 Conter Vale (channel = 0).
#define | TC0_RA0_OFF 0x14
TC0 Register A (channel = 0).
#define | TC0_RA0 (*((reg32_t*)(TC0_BASE + TC0_RA0_OFF)))
TC0 Register A (channel = 0).
#define | TC0_RB0_OFF 0x18
TC0 Register B (channel = 0).
#define | TC0_RB0 (*((reg32_t*)(TC0_BASE + TC0_RB0_OFF)))
TC0 Register B (channel = 0).
#define | TC0_RC0_OFF 0x1C
TC0 Register C (channel = 0).
#define | TC0_RC0 (*((reg32_t*)(TC0_BASE + TC0_RC0_OFF)))
TC0 Register C (channel = 0).
#define | TC0_SR0_OFF 0x20
TC0 Stats Register (channel = 0).
#define | TC0_SR0 (*((reg32_t*)(TC0_BASE + TC0_SR0_OFF)))
TC0 Stats Register (channel = 0).
#define | TC0_IER0_OFF 0x24
TC0 Interrpt Enable Register (channel = 0).
#define | TC0_IER0 (*((reg32_t*)(TC0_BASE + TC0_IER0_OFF)))
TC0 Interrpt Enable Register (channel = 0).
#define | TC0_IDR0_OFF 0x28
TC0 Interrpt Disable Register (channel = 0).
#define | TC0_IDR0 (*((reg32_t*)(TC0_BASE + TC0_IDR0_OFF)))
TC0 Interrpt Disable Register (channel = 0).
#define | TC0_IMR0_OFF 0x2C
TC0 Interrpt Mask Register (channel = 0).
#define | TC0_IMR0 (*((reg32_t*)(TC0_BASE + TC0_IMR0_OFF)))
TC0 Interrpt Mask Register (channel = 0).
#define | TC0_CCR1_OFF 0x40
TC0 Channel Control Register (channel = 1).
#define | TC0_CCR1 (*((reg32_t*)(TC0_BASE + TC0_CCR1_OFF)))
TC0 Channel Control Register (channel = 1).
#define | TC0_CMR1_OFF 0x44
TC0 Channel Mode Register (channel = 1).
#define | TC0_CMR1 (*((reg32_t*)(TC0_BASE + TC0_CMR1_OFF)))
TC0 Channel Mode Register (channel = 1).
#define | TC0_SMMR1_OFF 0x48
TC0 Stepper Motor Mode Register (channel = 1).
#define | TC0_SMMR1 (*((reg32_t*)(TC0_BASE + TC0_SMMR1_OFF)))
TC0 Stepper Motor Mode Register (channel = 1).
#define | TC0_CV1_OFF 0x50
TC0 Conter Vale (channel = 1).
#define | TC0_CV1 (*((reg32_t*)(TC0_BASE + TC0_CV1_OFF)))
TC0 Conter Vale (channel = 1).
#define | TC0_RA1_OFF 0x54
TC0 Register A (channel = 1).
#define | TC0_RA1 (*((reg32_t*)(TC0_BASE + TC0_RA1_OFF)))
TC0 Register A (channel = 1).
#define | TC0_RB1_OFF 0x58
TC0 Register B (channel = 1).
#define | TC0_RB1 (*((reg32_t*)(TC0_BASE + TC0_RB1_OFF)))
TC0 Register B (channel = 1).
#define | TC0_RC1_OFF 0x5C
TC0 Register C (channel = 1).
#define | TC0_RC1 (*((reg32_t*)(TC0_BASE + TC0_RC1_OFF)))
TC0 Register C (channel = 1).
#define | TC0_SR1_OFF 0x60
TC0 Stats Register (channel = 1).
#define | TC0_SR1 (*((reg32_t*)(TC0_BASE + TC0_SR1_OFF)))
TC0 Stats Register (channel = 1).
#define | TC0_IER1_OFF 0x64
TC0 Interrpt Enable Register (channel = 1).
#define | TC0_IER1 (*((reg32_t*)(TC0_BASE + TC0_IER1_OFF)))
TC0 Interrpt Enable Register (channel = 1).
#define | TC0_IDR1_OFF 0x68
TC0 Interrpt Disable Register (channel = 1).
#define | TC0_IDR1 (*((reg32_t*)(TC0_BASE + TC0_IDR1_OFF)))
TC0 Interrpt Disable Register (channel = 1).
#define | TC0_IMR1_OFF 0x6C
TC0 Interrpt Mask Register (channel = 1).
#define | TC0_IMR1 (*((reg32_t*)(TC0_BASE + TC0_IMR1_OFF)))
TC0 Interrpt Mask Register (channel = 1).
#define | TC0_CCR2_OFF 0x80
TC0 Channel Control Register (channel = 2).
#define | TC0_CCR2 (*((reg32_t*)(TC0_BASE + TC0_CCR2_OFF)))
TC0 Channel Control Register (channel = 2).
#define | TC0_CMR2_OFF 0x84
TC0 Channel Mode Register (channel = 2).
#define | TC0_CMR2 (*((reg32_t*)(TC0_BASE + TC0_CMR2_OFF)))
TC0 Channel Mode Register (channel = 2).
#define | TC0_SMMR2_OFF 0x88
TC0 Stepper Motor Mode Register (channel = 2).
#define | TC0_SMMR2 (*((reg32_t*)(TC0_BASE + TC0_SMMR2_OFF)))
TC0 Stepper Motor Mode Register (channel = 2).
#define | TC0_CV2_OFF 0x90
TC0 Conter Vale (channel = 2).
#define | TC0_CV2 (*((reg32_t*)(TC0_BASE + TC0_CV2_OFF)))
TC0 Conter Vale (channel = 2).
#define | TC0_RA2_OFF 0x94
TC0 Register A (channel = 2).
#define | TC0_RA2 (*((reg32_t*)(TC0_BASE + TC0_RA2_OFF)))
TC0 Register A (channel = 2).
#define | TC0_RB2_OFF 0x98
TC0 Register B (channel = 2).
#define | TC0_RB2 (*((reg32_t*)(TC0_BASE + TC0_RB2_OFF)))
TC0 Register B (channel = 2).
#define | TC0_RC2_OFF 0x9C
TC0 Register C (channel = 2).
#define | TC0_RC2 (*((reg32_t*)(TC0_BASE + TC0_RC2_OFF)))
TC0 Register C (channel = 2).
#define | TC0_SR2_OFF 0xA0
TC0 Stats Register (channel = 2).
#define | TC0_SR2 (*((reg32_t*)(TC0_BASE + TC0_SR2_OFF)))
TC0 Stats Register (channel = 2).
#define | TC0_IER2_OFF 0xA4
TC0 Interrpt Enable Register (channel = 2).
#define | TC0_IER2 (*((reg32_t*)(TC0_BASE + TC0_IER2_OFF)))
TC0 Interrpt Enable Register (channel = 2).
#define | TC0_IDR2_OFF 0xA8
TC0 Interrpt Disable Register (channel = 2).
#define | TC0_IDR2 (*((reg32_t*)(TC0_BASE + TC0_IDR2_OFF)))
TC0 Interrpt Disable Register (channel = 2).
#define | TC0_IMR2_OFF 0xAC
TC0 Interrpt Mask Register (channel = 2).
#define | TC0_IMR2 (*((reg32_t*)(TC0_BASE + TC0_IMR2_OFF)))
TC0 Interrpt Mask Register (channel = 2).
#define | TC0_BCR_OFF 0xC0
TC0 Block Control Register.
#define | TC0_BCR (*((reg32_t*)(TC0_BASE + TC0_BCR_OFF)))
TC0 Block Control Register.
#define | TC0_BMR_OFF 0xC4
TC0 Block Mode Register.
#define | TC0_BMR (*((reg32_t*)(TC0_BASE + TC0_BMR_OFF)))
TC0 Block Mode Register.
#define | TC0_QIER_OFF 0xC8
TC0 QDEC Interrpt Enable Register.
#define | TC0_QIER (*((reg32_t*)(TC0_BASE + TC0_QIER_OFF)))
TC0 QDEC Interrpt Enable Register.
#define | TC0_QIDR_OFF 0xCC
TC0 QDEC Interrpt Disable Register.
#define | TC0_QIDR (*((reg32_t*)(TC0_BASE + TC0_QIDR_OFF)))
TC0 QDEC Interrpt Disable Register.
#define | TC0_QIMR_OFF 0xD0
TC0 QDEC Interrpt Mask Register.
#define | TC0_QIMR (*((reg32_t*)(TC0_BASE + TC0_QIMR_OFF)))
TC0 QDEC Interrpt Mask Register.
#define | TC0_QISR_OFF 0xD4
TC0 QDEC Interrpt Stats Register.
#define | TC0_QISR (*((reg32_t*)(TC0_BASE + TC0_QISR_OFF)))
TC0 QDEC Interrpt Stats Register.
#define | TC0_FMR_OFF 0xD8
TC0 Falt Mode Register.
#define | TC0_FMR (*((reg32_t*)(TC0_BASE + TC0_FMR_OFF)))
TC0 Falt Mode Register.
#define | TC0_WPMR_OFF 0xE4
TC0 Write Protect Mode Register.
#define | TC0_WPMR (*((reg32_t*)(TC0_BASE + TC0_WPMR_OFF)))
TC0 Write Protect Mode Register.

Detailed Description

Author:
Daniele Basile <asterix@develer.com>

SAM3 Timer counter

Definition in file sam3_tc.h.

Define Documentation

#define TC0_BASE 0x40080000

Timer conter register bases.

TC0 Base Address.

Definition at line 45 of file sam3_tc.h.

#define TC0_CCR0_OFF 0x00

Timer conter control register.

TC0 Channel Control Register (channel = 0).

Definition at line 52 of file sam3_tc.h.


BeRTOS: sam3_tc.h Source File

  • cpu
  • cortex-m3
  • io
sam3_tc.h
Go to the documentation of this file.
00001
00041 #ifndef SAM3_TC_H
00042 #define SAM3_TC_H
00043
00045 #define TC0_BASE        0x40080000  ///< TC0 Base Address.
00046 #define TC1_BASE        0x40084000  ///< TC1 Base Address.
00047 #define TC2_BASE        0x40088000  ///< TC2 Base Address.
00048
00052 #define TC0_CCR0_OFF              0x00  ///< TC0 Channel Control Register (channel = 0).
00053 #define TC0_CCR0              (*((reg32_t*)(TC0_BASE + TC0_CCR0_OFF)))     ///< TC0 Channel Control Register (channel = 0).
00054
00055 #define TC0_CMR0_OFF              0x04  ///< TC0 Channel Mode Register (channel = 0).
00056 #define TC0_CMR0              (*((reg32_t*)(TC0_BASE + TC0_CMR0_OFF))) ///< TC0 Channel Mode Register (channel = 0).
00057
00058 #define TC_CMR_CPCTRG              14   ///< RC Compare Trigger Enable
00059 #define TC_CMR_WAVE                15   ///< Waveform mode is enabled
00060
00061 #define TC_CMR_ACPA_SET          0x10000 ///< RA Compare Effect: set
00062 #define TC_CMR_ACPA_CLEAR        0x20000 ///< RA Compare Effect: clear
00063 #define TC_CMR_ACPA_TOGGLE       0x30000 ///< RA Compare Effect: toggle
00064
00065 #define TC_CMR_ACPC_SET          0x40000 ///< RC Compare Effect: set
00066 #define TC_CMR_ACPC_CLEAR        0x80000 ///< RC Compare Effect: clear
00067 #define TC_CMR_ACPC_TOGGLE       0xC0000 ///< RC Compare Effect: toggle
00068
00069 #define TC_CCR_CLKEN                 0 ///< Counter Clock Enable Command
00070 #define TC_CCR_CLKDIS                1 ///< Counter Clock Disable Command
00071 #define TC_CCR_SWTRG                 2 ///< Software Trigger Command
00072
00073 #define TC_TIMER_CLOCK1              0 ///< Select timer clock TCLK1
00074 #define TC_TIMER_CLOCK2              1 ///< Select timer clock TCLK2
00075
00076 #define TC0_SMMR0_OFF             0x08  ///< TC0 Stepper Motor Mode Register (channel = 0).
00077 #define TC0_SMMR0             (*((reg32_t*)(TC0_BASE + TC0_SMMR0_OFF)))  ///< TC0 Stepper Motor Mode Register (channel = 0).
00078
00079 #define TC0_CV0_OFF               0x10  ///< TC0 Conter Vale (channel = 0).
00080 #define TC0_CV0               (*((reg32_t*)(TC0_BASE + TC0_CV0_OFF)))  ///< TC0 Conter Vale (channel = 0).
00081
00082 #define TC0_RA0_OFF               0x14  ///< TC0 Register A (channel = 0).
00083 #define TC0_RA0               (*((reg32_t*)(TC0_BASE + TC0_RA0_OFF)))  ///< TC0 Register A (channel = 0).
00084
00085 #define TC0_RB0_OFF               0x18  ///< TC0 Register B (channel = 0).
00086 #define TC0_RB0               (*((reg32_t*)(TC0_BASE + TC0_RB0_OFF)))  ///< TC0 Register B (channel = 0).
00087
00088 #define TC0_RC0_OFF               0x1C  ///< TC0 Register C (channel = 0).
00089 #define TC0_RC0               (*((reg32_t*)(TC0_BASE + TC0_RC0_OFF)))  ///< TC0 Register C (channel = 0).
00090
00091 #define TC0_SR0_OFF               0x20  ///< TC0 Stats Register (channel = 0).
00092 #define TC0_SR0               (*((reg32_t*)(TC0_BASE + TC0_SR0_OFF)))  ///< TC0 Stats Register (channel = 0).
00093
00094 #define TC0_IER0_OFF              0x24  ///< TC0 Interrpt Enable Register (channel = 0).
00095 #define TC0_IER0              (*((reg32_t*)(TC0_BASE + TC0_IER0_OFF)))  ///< TC0 Interrpt Enable Register (channel = 0).
00096
00097 #define TC0_IDR0_OFF              0x28  ///< TC0 Interrpt Disable Register (channel = 0).
00098 #define TC0_IDR0              (*((reg32_t*)(TC0_BASE + TC0_IDR0_OFF)))  ///< TC0 Interrpt Disable Register (channel = 0).
00099
00100 #define TC0_IMR0_OFF              0x2C  ///< TC0 Interrpt Mask Register (channel = 0).
00101 #define TC0_IMR0              (*((reg32_t*)(TC0_BASE + TC0_IMR0_OFF)))  ///< TC0 Interrpt Mask Register (channel = 0).
00102
00103 #define TC0_CCR1_OFF              0x40  ///< TC0 Channel Control Register (channel = 1).
00104 #define TC0_CCR1              (*((reg32_t*)(TC0_BASE + TC0_CCR1_OFF)))  ///< TC0 Channel Control Register (channel = 1).
00105
00106 #define TC0_CMR1_OFF              0x44  ///< TC0 Channel Mode Register (channel = 1).
00107 #define TC0_CMR1              (*((reg32_t*)(TC0_BASE + TC0_CMR1_OFF)))  ///< TC0 Channel Mode Register (channel = 1).
00108
00109 #define TC0_SMMR1_OFF             0x48  ///< TC0 Stepper Motor Mode Register (channel = 1).
00110 #define TC0_SMMR1             (*((reg32_t*)(TC0_BASE + TC0_SMMR1_OFF)))  ///< TC0 Stepper Motor Mode Register (channel = 1).
00111
00112 #define TC0_CV1_OFF               0x50  ///< TC0 Conter Vale (channel = 1).
00113 #define TC0_CV1               (*((reg32_t*)(TC0_BASE + TC0_CV1_OFF)))  ///< TC0 Conter Vale (channel = 1).
00114
00115 #define TC0_RA1_OFF               0x54  ///< TC0 Register A (channel = 1).
00116 #define TC0_RA1               (*((reg32_t*)(TC0_BASE + TC0_RA1_OFF)))  ///< TC0 Register A (channel = 1).
00117
00118 #define TC0_RB1_OFF               0x58  ///< TC0 Register B (channel = 1).
00119 #define TC0_RB1               (*((reg32_t*)(TC0_BASE + TC0_RB1_OFF)))  ///< TC0 Register B (channel = 1).
00120
00121 #define TC0_RC1_OFF               0x5C  ///< TC0 Register C (channel = 1).
00122 #define TC0_RC1               (*((reg32_t*)(TC0_BASE + TC0_RC1_OFF)))  ///< TC0 Register C (channel = 1).
00123
00124 #define TC0_SR1_OFF               0x60  ///< TC0 Stats Register (channel = 1).
00125 #define TC0_SR1               (*((reg32_t*)(TC0_BASE + TC0_SR1_OFF)))  ///< TC0 Stats Register (channel = 1).
00126
00127 #define TC0_IER1_OFF              0x64  ///< TC0 Interrpt Enable Register (channel = 1).
00128 #define TC0_IER1              (*((reg32_t*)(TC0_BASE + TC0_IER1_OFF)))  ///< TC0 Interrpt Enable Register (channel = 1).
00129
00130 #define TC0_IDR1_OFF              0x68  ///< TC0 Interrpt Disable Register (channel = 1).
00131 #define TC0_IDR1              (*((reg32_t*)(TC0_BASE + TC0_IDR1_OFF)))  ///< TC0 Interrpt Disable Register (channel = 1).
00132
00133 #define TC0_IMR1_OFF              0x6C  ///< TC0 Interrpt Mask Register (channel = 1).
00134 #define TC0_IMR1              (*((reg32_t*)(TC0_BASE + TC0_IMR1_OFF)))  ///< TC0 Interrpt Mask Register (channel = 1).
00135
00136 #define TC0_CCR2_OFF              0x80  ///< TC0 Channel Control Register (channel = 2).
00137 #define TC0_CCR2              (*((reg32_t*)(TC0_BASE + TC0_CCR2_OFF)))  ///< TC0 Channel Control Register (channel = 2).
00138
00139 #define TC0_CMR2_OFF              0x84  ///< TC0 Channel Mode Register (channel = 2).
00140 #define TC0_CMR2              (*((reg32_t*)(TC0_BASE + TC0_CMR2_OFF)))  ///< TC0 Channel Mode Register (channel = 2).
00141
00142 #define TC0_SMMR2_OFF             0x88  ///< TC0 Stepper Motor Mode Register (channel = 2).
00143 #define TC0_SMMR2             (*((reg32_t*)(TC0_BASE + TC0_SMMR2_OFF)))  ///< TC0 Stepper Motor Mode Register (channel = 2).
00144
00145 #define TC0_CV2_OFF               0x90  ///< TC0 Conter Vale (channel = 2).
00146 #define TC0_CV2               (*((reg32_t*)(TC0_BASE + TC0_CV2_OFF)))  ///< TC0 Conter Vale (channel = 2).
00147
00148 #define TC0_RA2_OFF               0x94  ///< TC0 Register A (channel = 2).
00149 #define TC0_RA2               (*((reg32_t*)(TC0_BASE + TC0_RA2_OFF)))  ///< TC0 Register A (channel = 2).
00150
00151 #define TC0_RB2_OFF               0x98  ///< TC0 Register B (channel = 2).
00152 #define TC0_RB2               (*((reg32_t*)(TC0_BASE + TC0_RB2_OFF)))  ///< TC0 Register B (channel = 2).
00153
00154 #define TC0_RC2_OFF               0x9C  ///< TC0 Register C (channel = 2).
00155 #define TC0_RC2               (*((reg32_t*)(TC0_BASE + TC0_RC2_OFF)))  ///< TC0 Register C (channel = 2).
00156
00157 #define TC0_SR2_OFF               0xA0  ///< TC0 Stats Register (channel = 2).
00158 #define TC0_SR2               (*((reg32_t*)(TC0_BASE + TC0_SR2_OFF)))  ///< TC0 Stats Register (channel = 2).
00159
00160 #define TC0_IER2_OFF              0xA4  ///< TC0 Interrpt Enable Register (channel = 2).
00161 #define TC0_IER2              (*((reg32_t*)(TC0_BASE + TC0_IER2_OFF)))  ///< TC0 Interrpt Enable Register (channel = 2).
00162
00163 #define TC0_IDR2_OFF              0xA8  ///< TC0 Interrpt Disable Register (channel = 2).
00164 #define TC0_IDR2              (*((reg32_t*)(TC0_BASE + TC0_IDR2_OFF)))  ///< TC0 Interrpt Disable Register (channel = 2).
00165
00166 #define TC0_IMR2_OFF              0xAC  ///< TC0 Interrpt Mask Register (channel = 2).
00167 #define TC0_IMR2              (*((reg32_t*)(TC0_BASE + TC0_IMR2_OFF)))  ///< TC0 Interrpt Mask Register (channel = 2).
00168
00169 #define TC0_BCR_OFF               0xC0  ///< TC0 Block Control Register.
00170 #define TC0_BCR               (*((reg32_t*)(TC0_BASE + TC0_BCR_OFF)))  ///< TC0 Block Control Register.
00171
00172 #define TC0_BMR_OFF               0xC4  ///< TC0 Block Mode Register.
00173 #define TC0_BMR               (*((reg32_t*)(TC0_BASE + TC0_BMR_OFF)))  ///< TC0 Block Mode Register.
00174
00175 #define TC0_QIER_OFF              0xC8  ///< TC0 QDEC Interrpt Enable Register.
00176 #define TC0_QIER              (*((reg32_t*)(TC0_BASE + TC0_QIER_OFF)))  ///< TC0 QDEC Interrpt Enable Register.
00177
00178 #define TC0_QIDR_OFF              0xCC  ///< TC0 QDEC Interrpt Disable Register.
00179 #define TC0_QIDR              (*((reg32_t*)(TC0_BASE + TC0_QIDR_OFF)))  ///< TC0 QDEC Interrpt Disable Register.
00180
00181 #define TC0_QIMR_OFF              0xD0  ///< TC0 QDEC Interrpt Mask Register.
00182 #define TC0_QIMR              (*((reg32_t*)(TC0_BASE + TC0_QIMR_OFF)))  ///< TC0 QDEC Interrpt Mask Register.
00183
00184 #define TC0_QISR_OFF              0xD4  ///< TC0 QDEC Interrpt Stats Register.
00185 #define TC0_QISR              (*((reg32_t*)(TC0_BASE + TC0_QISR_OFF)))  ///< TC0 QDEC Interrpt Stats Register.
00186
00187 #define TC0_FMR_OFF               0xD8  ///< TC0 Falt Mode Register.
00188 #define TC0_FMR               (*((reg32_t*)(TC0_BASE + TC0_FMR_OFF)))  ///< TC0 Falt Mode Register.
00189
00190 #define TC0_WPMR_OFF              0xE4  ///< TC0 Write Protect Mode Register.
00191 #define TC0_WPMR              (*((reg32_t*)(TC0_BASE + TC0_WPMR_OFF)))  ///< TC0 Write Protect Mode Register.
00192
00193 #endif /* SAM3_TC_H */


BeRTOS: sam3_uart.h File Reference

  • cpu
  • cortex-m3
  • io
sam3_uart.h File Reference

SAM3 UART hardware. More...

Go to the source code of this file.

Defines

#define | UART_CR_OFF 0x000
UART registers base addresses.
#define | UART_MR_OFF 0x004
UART registers base addresses.
#define | UART_IER_OFF 0x008
UART registers base addresses.
#define | UART_IDR_OFF 0x00C
UART registers base addresses.
#define | UART_IMR_OFF 0x010
UART registers base addresses.
#define | UART_SR_OFF 0x014
UART registers base addresses.
#define | UART_RHR_OFF 0x018
UART registers base addresses.
#define | UART_THR_OFF 0x01C
UART registers base addresses.
#define | UART_BRGR_OFF 0x020
UART registers base addresses.
#define | UART_RPR_OFF 0x100
UART registers base addresses.
#define | UART_RCR_OFF 0x104
UART registers base addresses.
#define | UART_TPR_OFF 0x108
UART registers base addresses.
#define | UART_TCR_OFF 0x10C
UART registers base addresses.
#define | UART_RNPR_OFF 0x110
UART registers base addresses.
#define | UART_RNCR_OFF 0x114
UART registers base addresses.
#define | UART_TNPR_OFF 0x118
UART registers base addresses.
#define | UART_TNCR_OFF 0x11C
UART registers base addresses.
#define | UART_PTCR_OFF 0x120
UART registers base addresses.
#define | UART_PTSR_OFF 0x124
UART registers base addresses.
#define | UART_CR_RSTRX 2
UART register addresses.
#define | UART_CR_RSTTX 3
UART register addresses.
#define | UART_CR_RXEN 4
UART register addresses.
#define | UART_CR_RXDIS 5
UART register addresses.
#define | UART_CR_TXEN 6
UART register addresses.
#define | UART_CR_TXDIS 7
UART register addresses.
#define | UART_CR_RSTSTA 8
UART register addresses.
#define | UART_MR_PAR_SHIFT 9
Bit fields in the UART_MR register.
#define | UART_MR_PAR_MASK (0x7 << UART_MR_PAR_SHIFT)
Bit fields in the UART_MR register.
#define | UART_MR_PAR_EVEN (0x0 << UART_MR_PAR_SHIFT)
Bit fields in the UART_MR register.
#define | UART_MR_PAR_ODD (0x1 << UART_MR_PAR_SHIFT)
Bit fields in the UART_MR register.
#define | UART_MR_PAR_SPACE (0x2 << UART_MR_PAR_SHIFT)
Bit fields in the UART_MR register.
#define | UART_MR_PAR_MARK (0x3 << UART_MR_PAR_SHIFT)
Bit fields in the UART_MR register.
#define | UART_MR_PAR_NO (0x4 << UART_MR_PAR_SHIFT)
Bit fields in the UART_MR register.
#define | UART_MR_CHMODE_SHIFT 14
Bit fields in the UART_MR register.
#define | UART_MR_CHMODE_MASK (0x3 << UART_MR_CHMODE_SHIFT)
Bit fields in the UART_MR register.
#define | UART_MR_CHMODE_NORMAL (0x0 << UART_MR_CHMODE_SHIFT)
Bit fields in the UART_MR register.
#define | UART_MR_CHMODE_AUTOMATIC (0x1 << UART_MR_CHMODE_SHIFT)
Bit fields in the UART_MR register.
#define | UART_MR_CHMODE_LOCAL_LOOPBACK (0x2 << UART_MR_CHMODE_SHIFT)
Bit fields in the UART_MR register.
#define | UART_MR_CHMODE_REMOTE_LOOPBACK (0x3 << UART_MR_CHMODE_SHIFT)
Bit fields in the UART_MR register.
#define | UART_IER_RXRDY 0
Bit fields in the UART_IER register.
#define | UART_IER_TXRDY 1
Bit fields in the UART_IER register.
#define | UART_IER_ENDRX 3
Bit fields in the UART_IER register.
#define | UART_IER_ENDTX 4
Bit fields in the UART_IER register.
#define | UART_IER_OVRE 5
Bit fields in the UART_IER register.
#define | UART_IER_FRAME 6
Bit fields in the UART_IER register.
#define | UART_IER_PARE 7
Bit fields in the UART_IER register.
#define | UART_IER_TXEMPTY 9
Bit fields in the UART_IER register.
#define | UART_IER_TXBUFE 11
Bit fields in the UART_IER register.
#define | UART_IER_RXBUFF 12
Bit fields in the UART_IER register.
#define | UART_IDR_RXRDY 0
Bit fields in the UART_IDR register.
#define | UART_IDR_TXRDY 1
Bit fields in the UART_IDR register.
#define | UART_IDR_ENDRX 3
Bit fields in the UART_IDR register.
#define | UART_IDR_ENDTX 4
Bit fields in the UART_IDR register.
#define | UART_IDR_OVRE 5
Bit fields in the UART_IDR register.
#define | UART_IDR_FRAME 6
Bit fields in the UART_IDR register.
#define | UART_IDR_PARE 7
Bit fields in the UART_IDR register.
#define | UART_IDR_TXEMPTY 9
Bit fields in the UART_IDR register.
#define | UART_IDR_TXBUFE 11
Bit fields in the UART_IDR register.
#define | UART_IDR_RXBUFF 12
Bit fields in the UART_IDR register.
#define | UART_IMR_RXRDY 0
Bit fields in the UART_IMR register.
#define | UART_IMR_TXRDY 1
Bit fields in the UART_IMR register.
#define | UART_IMR_ENDRX 3
Bit fields in the UART_IMR register.
#define | UART_IMR_ENDTX 4
Bit fields in the UART_IMR register.
#define | UART_IMR_OVRE 5
Bit fields in the UART_IMR register.
#define | UART_IMR_FRAME 6
Bit fields in the UART_IMR register.
#define | UART_IMR_PARE 7
Bit fields in the UART_IMR register.
#define | UART_IMR_TXEMPTY 9
Bit fields in the UART_IMR register.
#define | UART_IMR_TXBUFE 11
Bit fields in the UART_IMR register.
#define | UART_IMR_RXBUFF 12
Bit fields in the UART_IMR register.
#define | UART_SR_RXRDY 0
Bit fields in the UART_SR register.
#define | UART_SR_TXRDY 1
Bit fields in the UART_SR register.
#define | UART_SR_ENDRX 3
Bit fields in the UART_SR register.
#define | UART_SR_ENDTX 4
Bit fields in the UART_SR register.
#define | UART_SR_OVRE 5
Bit fields in the UART_SR register.
#define | UART_SR_FRAME 6
Bit fields in the UART_SR register.
#define | UART_SR_PARE 7
Bit fields in the UART_SR register.
#define | UART_SR_TXEMPTY 9
Bit fields in the UART_SR register.
#define | UART_SR_TXBUFE 11
Bit fields in the UART_SR register.
#define | UART_SR_RXBUFF 12
Bit fields in the UART_SR register.
#define | UART_RHR_RXCHR_MASK 0xFF
Bit fields in the UART_RHR register.
#define | UART_RHR_RXCHR_SHIFT 0
Bit fields in the UART_RHR register.
#define | UART_THR_TXCHR_MASK 0xFF
Bit fields in the UART_THR register.
#define | UART_THR_TXCHR_SHIFT 0
Bit fields in the UART_THR register.
#define | UART_BRGR_CD_MASK 0xFFFF
Bit fields in the UART_BRGR register.
#define | UART_BRGR_CD_SHIFT 0
Bit fields in the UART_BRGR register.
#define | UART_RPR_RXPTR_MASK 0xFFFFFFFF
Bit fields in the UART_RPR register.
#define | UART_RPR_RXPTR_SHIFT 0
Bit fields in the UART_RPR register.
#define | UART_RCR_RXCTR_MASK 0xFFFF
Bit fields in the UART_RCR register.
#define | UART_RCR_RXCTR_SHIFT 0
Bit fields in the UART_RCR register.
#define | UART_TPR_TXPTR_MASK 0xFFFFFFFF
Bit fields in the UART_TPR register.
#define | UART_TPR_TXPTR_SHIFT 0
Bit fields in the UART_TPR register.
#define | UART_TCR_TXCTR_MASK 0xFFFF
Bit fields in the UART_TCR register.
#define | UART_TCR_TXCTR_SHIFT 0
Bit fields in the UART_TCR register.
#define | UART_RNPR_RXNPTR_MASK 0xFFFFFFFF
Bit fields in the UART_RNPR register.
#define | UART_RNPR_RXNPTR_SHIFT 0
Bit fields in the UART_RNPR register.
#define | UART_RNCR_RXNCTR_MASK 0xFFFF
Bit fields in the UART_RNCR register.
#define | UART_RNCR_RXNCTR_SHIFT 0
Bit fields in the UART_RNCR register.
#define | UART_TNPR_TXNPTR_MASK 0xFFFFFFFF
Bit fields in the UART_TNPR register.
#define | UART_TNPR_TXNPTR_SHIFT 0
Bit fields in the UART_TNPR register.
#define | UART_TNCR_TXNCTR_MASK 0xFFFF
Bit fields in the UART_TNCR register.
#define | UART_TNCR_TXNCTR_SHIFT 0
Bit fields in the UART_TNCR register.
#define | UART_PTCR_RXTEN 0
Bit fields in the UART_PTCR register.
#define | UART_PTCR_RXTDIS 1
Bit fields in the UART_PTCR register.
#define | UART_PTCR_TXTEN 8
Bit fields in the UART_PTCR register.
#define | UART_PTCR_TXTDIS 9
Bit fields in the UART_PTCR register.
#define | UART_PTSR_RXTEN 0
Bit fields in the UART_PTSR register.
#define | UART_PTSR_TXTEN 8
Bit fields in the UART_PTSR register.

Detailed Description

SAM3 UART hardware.

Definition in file sam3_uart.h.

Define Documentation

#define UART_BRGR_OFF 0x020

UART registers base addresses.

UART register offsets.

Definition at line 65 of file sam3_uart.h.

#define UART_CR_OFF 0x000

UART registers base addresses.

UART register offsets.

Definition at line 57 of file sam3_uart.h.

#define UART_CR_RSTRX 2

UART register addresses.

Bit fields in the UART_CR register.

Definition at line 138 of file sam3_uart.h.

#define UART_CR_RSTSTA 8

UART register addresses.

Bit fields in the UART_CR register.

Definition at line 144 of file sam3_uart.h.

#define UART_CR_RSTTX 3

UART register addresses.

Bit fields in the UART_CR register.

Definition at line 139 of file sam3_uart.h.

#define UART_CR_RXDIS 5

UART register addresses.

Bit fields in the UART_CR register.

Definition at line 141 of file sam3_uart.h.

#define UART_CR_RXEN 4

UART register addresses.

Bit fields in the UART_CR register.

Definition at line 140 of file sam3_uart.h.

#define UART_CR_TXDIS 7

UART register addresses.

Bit fields in the UART_CR register.

Definition at line 143 of file sam3_uart.h.

#define UART_CR_TXEN 6

UART register addresses.

Bit fields in the UART_CR register.

Definition at line 142 of file sam3_uart.h.

#define UART_IDR_OFF 0x00C

UART registers base addresses.

UART register offsets.

Definition at line 60 of file sam3_uart.h.

#define UART_IER_OFF 0x008

UART registers base addresses.

UART register offsets.

Definition at line 59 of file sam3_uart.h.

#define UART_IMR_OFF 0x010

UART registers base addresses.

UART register offsets.

Definition at line 61 of file sam3_uart.h.

#define UART_MR_OFF 0x004

UART registers base addresses.

UART register offsets.

Definition at line 58 of file sam3_uart.h.

#define UART_PTCR_OFF 0x120

UART registers base addresses.

UART register offsets.

Definition at line 75 of file sam3_uart.h.

#define UART_PTSR_OFF 0x124

UART registers base addresses.

UART register offsets.

Definition at line 76 of file sam3_uart.h.

#define UART_RCR_OFF 0x104

UART registers base addresses.

UART register offsets.

Definition at line 68 of file sam3_uart.h.

#define UART_RHR_OFF 0x018

UART registers base addresses.

UART register offsets.

Definition at line 63 of file sam3_uart.h.

#define UART_RNCR_OFF 0x114

UART registers base addresses.

UART register offsets.

Definition at line 72 of file sam3_uart.h.

#define UART_RNPR_OFF 0x110

UART registers base addresses.

UART register offsets.

Definition at line 71 of file sam3_uart.h.

#define UART_RPR_OFF 0x100

UART registers base addresses.

UART register offsets.

Definition at line 67 of file sam3_uart.h.

#define UART_SR_OFF 0x014

UART registers base addresses.

UART register offsets.

Definition at line 62 of file sam3_uart.h.

#define UART_TCR_OFF 0x10C

UART registers base addresses.

UART register offsets.

Definition at line 70 of file sam3_uart.h.

#define UART_THR_OFF 0x01C

UART registers base addresses.

UART register offsets.

Definition at line 64 of file sam3_uart.h.

#define UART_TNCR_OFF 0x11C

UART registers base addresses.

UART register offsets.

Definition at line 74 of file sam3_uart.h.

#define UART_TNPR_OFF 0x118

UART registers base addresses.

UART register offsets.

Definition at line 73 of file sam3_uart.h.

#define UART_TPR_OFF 0x108

UART registers base addresses.

UART register offsets.

Definition at line 69 of file sam3_uart.h.


BeRTOS: sam3_uart.h Source File

  • cpu
  • cortex-m3
  • io
sam3_uart.h
Go to the documentation of this file.
00001
00036 #ifndef SAM3_UART_H
00037 #define SAM3_UART_H
00038
00042 /*\{*/
00043 #if CPU_CM3_SAM3N
00044     #define UART0_BASE  0x400E0600
00045 #elif CPU_CM3_SAM3U
00046     #define UART0_BASE  0x400E0600
00047     #define UART1_BASE  0x400E0800
00048 #elif CPU_CM3_SAM3X
00049     #define UART0_BASE  0x400E0800
00050 #endif
00051 /*\}*/
00052
00056 /*\{*/
00057 #define UART_CR_OFF       0x000  //< Control Register
00058 #define UART_MR_OFF       0x004  //< Mode Register
00059 #define UART_IER_OFF      0x008  //< Interrupt Enable Register
00060 #define UART_IDR_OFF      0x00C  //< Interrupt Disable Register
00061 #define UART_IMR_OFF      0x010  //< Interrupt Mask Register
00062 #define UART_SR_OFF       0x014  //< Status Register
00063 #define UART_RHR_OFF      0x018  //< Receive Holding Register
00064 #define UART_THR_OFF      0x01C  //< Transmit Holding Register
00065 #define UART_BRGR_OFF     0x020  //< Baud Rate Generator Register
00066
00067 #define UART_RPR_OFF      0x100  //< Receive Pointer Register
00068 #define UART_RCR_OFF      0x104  //< Receive Counter Register
00069 #define UART_TPR_OFF      0x108  //< Transmit Pointer Register
00070 #define UART_TCR_OFF      0x10C  //< Transmit Counter Register
00071 #define UART_RNPR_OFF     0x110  //< Receive Next Pointer Register
00072 #define UART_RNCR_OFF     0x114  //< Receive Next Counter Register
00073 #define UART_TNPR_OFF     0x118  //< Transmit Next Pointer Register
00074 #define UART_TNCR_OFF     0x11C  //< Transmit Next Counter Register
00075 #define UART_PTCR_OFF     0x120  //< Transfer Control Register
00076 #define UART_PTSR_OFF     0x124  //< Transfer Status Register
00077 /*\}*/
00078
00082 /*\{*/
00083 #if defined(UART0_BASE)
00084     #define UART0_ACCESS(offset) (*((reg32_t *)(UART0_BASE + (offset))))
00085
00086     #define UART_CR     UART0_ACCESS(UART_CR_OFF)   //< Control Register
00087     #define UART_MR     UART0_ACCESS(UART_MR_OFF)   //< Mode Register
00088     #define UART_IER    UART0_ACCESS(UART_IER_OFF)  //< Interrupt Enable Register
00089     #define UART_IDR    UART0_ACCESS(UART_IDR_OFF)  //< Interrupt Disable Register
00090     #define UART_IMR    UART0_ACCESS(UART_IMR_OFF)  //< Interrupt Mask Register
00091     #define UART_SR     UART0_ACCESS(UART_SR_OFF)   //< Status Register
00092     #define UART_RHR    UART0_ACCESS(UART_RHR_OFF)  //< Receive Holding Register
00093     #define UART_THR    UART0_ACCESS(UART_THR_OFF)  //< Transmit Holding Register
00094     #define UART_BRGR   UART0_ACCESS(UART_BRGR_OFF) //< Baud Rate Generator Register
00095
00096     #define UART_RPR    UART0_ACCESS(UART_RPR_OFF)  //< Receive Pointer Register
00097     #define UART_RCR    UART0_ACCESS(UART_RCR_OFF)  //< Receive Counter Register
00098     #define UART_TPR    UART0_ACCESS(UART_TPR_OFF)  //< Transmit Pointer Register
00099     #define UART_TCR    UART0_ACCESS(UART_TCR_OFF)  //< Transmit Counter Register
00100     #define UART_RNPR   UART0_ACCESS(UART_RNPR_OFF) //< Receive Next Pointer Register
00101     #define UART_RNCR   UART0_ACCESS(UART_RNCR_OFF) //< Receive Next Counter Register
00102     #define UART_TNPR   UART0_ACCESS(UART_TNPR_OFF) //< Transmit Next Pointer Register
00103     #define UART_TNCR   UART0_ACCESS(UART_TNCR_OFF) //< Transmit Next Counter Register
00104     #define UART_PTCR   UART0_ACCESS(UART_PTCR_OFF) //< Transfer Control Register
00105     #define UART_PTSR   UART0_ACCESS(UART_PTSR_OFF) //< Transfer Status Register
00106 #endif /* UART0_BASE */
00107
00108 #if defined(UART1_BASE)
00109     #define UART1_ACCESS(offset) (*((reg32_t *)(UART1_BASE + (offset))))
00110
00111     #define UART_CR     UART1_ACCESS(UART_CR_OFF)   //< Control Register
00112     #define UART_MR     UART1_ACCESS(UART_MR_OFF)   //< Mode Register
00113     #define UART_IER    UART1_ACCESS(UART_IER_OFF)  //< Interrupt Enable Register
00114     #define UART_IDR    UART1_ACCESS(UART_IDR_OFF)  //< Interrupt Disable Register
00115     #define UART_IMR    UART1_ACCESS(UART_IMR_OFF)  //< Interrupt Mask Register
00116     #define UART_SR     UART1_ACCESS(UART_SR_OFF)   //< Status Register
00117     #define UART_RHR    UART1_ACCESS(UART_RHR_OFF)  //< Receive Holding Register
00118     #define UART_THR    UART1_ACCESS(UART_THR_OFF)  //< Transmit Holding Register
00119     #define UART_BRGR   UART1_ACCESS(UART_BRGR_OFF) //< Baud Rate Generator Register
00120
00121     #define UART_RPR    UART1_ACCESS(UART_RPR_OFF)  //< Receive Pointer Register
00122     #define UART_RCR    UART1_ACCESS(UART_RCR_OFF)  //< Receive Counter Register
00123     #define UART_TPR    UART1_ACCESS(UART_TPR_OFF)  //< Transmit Pointer Register
00124     #define UART_TCR    UART1_ACCESS(UART_TCR_OFF)  //< Transmit Counter Register
00125     #define UART_RNPR   UART1_ACCESS(UART_RNPR_OFF) //< Receive Next Pointer Register
00126     #define UART_RNCR   UART1_ACCESS(UART_RNCR_OFF) //< Receive Next Counter Register
00127     #define UART_TNPR   UART1_ACCESS(UART_TNPR_OFF) //< Transmit Next Pointer Register
00128     #define UART_TNCR   UART1_ACCESS(UART_TNCR_OFF) //< Transmit Next Counter Register
00129     #define UART_PTCR   UART1_ACCESS(UART_PTCR_OFF) //< Transfer Control Register
00130     #define UART_PTSR   UART1_ACCESS(UART_PTSR_OFF) //< Transfer Status Register
00131 #endif /* UART0_BASE */
00132 /*\}*/
00133
00137 /*\{*/
00138 #define UART_CR_RSTRX     2  //< Reset Receiver
00139 #define UART_CR_RSTTX     3  //< Reset Transmitter
00140 #define UART_CR_RXEN      4  //< Receiver Enable
00141 #define UART_CR_RXDIS     5  //< Receiver Disable
00142 #define UART_CR_TXEN      6  //< Transmitter Enable
00143 #define UART_CR_TXDIS     7  //< Transmitter Disable
00144 #define UART_CR_RSTSTA    8  //< Reset Status Bits
00145 /*\}*/
00146
00150 /*\{*/
00151 #define UART_MR_PAR_SHIFT                9                             //< Parity Type shift
00152 #define UART_MR_PAR_MASK                 (0x7 << UART_MR_PAR_SHIFT)    //< Parity Type mask
00153 #define   UART_MR_PAR_EVEN               (0x0 << UART_MR_PAR_SHIFT)    //< Even parity
00154 #define   UART_MR_PAR_ODD                (0x1 << UART_MR_PAR_SHIFT)    //< Odd parity
00155 #define   UART_MR_PAR_SPACE              (0x2 << UART_MR_PAR_SHIFT)    //< Space: parity forced to 0
00156 #define   UART_MR_PAR_MARK               (0x3 << UART_MR_PAR_SHIFT)    //< Mark: parity forced to 1
00157 #define   UART_MR_PAR_NO                 (0x4 << UART_MR_PAR_SHIFT)    //< No parity
00158 #define UART_MR_CHMODE_SHIFT             14                            //< Channel Mode shift
00159 #define UART_MR_CHMODE_MASK              (0x3 << UART_MR_CHMODE_SHIFT) //< Channel Mode mask
00160 #define   UART_MR_CHMODE_NORMAL          (0x0 << UART_MR_CHMODE_SHIFT) //< Normal Mode
00161 #define   UART_MR_CHMODE_AUTOMATIC       (0x1 << UART_MR_CHMODE_SHIFT) //< Automatic Echo
00162 #define   UART_MR_CHMODE_LOCAL_LOOPBACK  (0x2 << UART_MR_CHMODE_SHIFT) //< Local Loopback
00163 #define   UART_MR_CHMODE_REMOTE_LOOPBACK (0x3 << UART_MR_CHMODE_SHIFT) //< Remote Loopback
00164 /*\}*/
00165
00169 /*\{*/
00170 #define UART_IER_RXRDY    0   //< Enable RXRDY Interrupt
00171 #define UART_IER_TXRDY    1   //< Enable TXRDY Interrupt
00172 #define UART_IER_ENDRX    3   //< Enable End of Receive Transfer Interrupt
00173 #define UART_IER_ENDTX    4   //< Enable End of Transmit Interrupt
00174 #define UART_IER_OVRE     5   //< Enable Overrun Error Interrupt
00175 #define UART_IER_FRAME    6   //< Enable Framing Error Interrupt
00176 #define UART_IER_PARE     7   //< Enable Parity Error Interrupt
00177 #define UART_IER_TXEMPTY  9   //< Enable TXEMPTY Interrupt
00178 #define UART_IER_TXBUFE   11  //< Enable Buffer Empty Interrupt
00179 #define UART_IER_RXBUFF   12  //< Enable Buffer Full Interrupt
00180 /*\}*/
00181
00185 /*\{*/
00186 #define UART_IDR_RXRDY    0   //< Disable RXRDY Interrupt
00187 #define UART_IDR_TXRDY    1   //< Disable TXRDY Interrupt
00188 #define UART_IDR_ENDRX    3   //< Disable End of Receive Transfer Interrupt
00189 #define UART_IDR_ENDTX    4   //< Disable End of Transmit Interrupt
00190 #define UART_IDR_OVRE     5   //< Disable Overrun Error Interrupt
00191 #define UART_IDR_FRAME    6   //< Disable Framing Error Interrupt
00192 #define UART_IDR_PARE     7   //< Disable Parity Error Interrupt
00193 #define UART_IDR_TXEMPTY  9   //< Disable TXEMPTY Interrupt
00194 #define UART_IDR_TXBUFE   11  //< Disable Buffer Empty Interrupt
00195 #define UART_IDR_RXBUFF   12  //< Disable Buffer Full Interrupt
00196 /*\}*/
00197
00201 /*\{*/
00202 #define UART_IMR_RXRDY    0   //< Mask RXRDY Interrupt
00203 #define UART_IMR_TXRDY    1   //< Disable TXRDY Interrupt
00204 #define UART_IMR_ENDRX    3   //< Mask End of Receive Transfer Interrupt
00205 #define UART_IMR_ENDTX    4   //< Mask End of Transmit Interrupt
00206 #define UART_IMR_OVRE     5   //< Mask Overrun Error Interrupt
00207 #define UART_IMR_FRAME    6   //< Mask Framing Error Interrupt
00208 #define UART_IMR_PARE     7   //< Mask Parity Error Interrupt
00209 #define UART_IMR_TXEMPTY  9   //< Mask TXEMPTY Interrupt
00210 #define UART_IMR_TXBUFE   11  //< Mask TXBUFE Interrupt
00211 #define UART_IMR_RXBUFF   12  //< Mask RXBUFF Interrupt
00212 /*\}*/
00213
00217 /*\{*/
00218 #define UART_SR_RXRDY     0   //< Receiver Ready
00219 #define UART_SR_TXRDY     1   //< Transmitter Ready
00220 #define UART_SR_ENDRX     3   //< End of Receiver Transfer
00221 #define UART_SR_ENDTX     4   //< End of Transmitter Transfer
00222 #define UART_SR_OVRE      5   //< Overrun Error
00223 #define UART_SR_FRAME     6   //< Framing Error
00224 #define UART_SR_PARE      7   //< Parity Error
00225 #define UART_SR_TXEMPTY   9   //< Transmitter Empty
00226 #define UART_SR_TXBUFE    11  //< Transmission Buffer Empty
00227 #define UART_SR_RXBUFF    12  //< Receive Buffer Full
00228 /*\}*/
00229
00233 /*\{*/
00234 #define UART_RHR_RXCHR_MASK   0xFF  //< Received Character mask
00235 #define UART_RHR_RXCHR_SHIFT  0     //< Received Character shift
00236 /*\}*/
00237
00241 /*\{*/
00242 #define UART_THR_TXCHR_MASK   0xFF  //< Character to be Transmitted mask
00243 #define UART_THR_TXCHR_SHIFT  0     //< Character to be Transmitted shift
00244 /*\}*/
00245
00249 /*\{*/
00250 #define UART_BRGR_CD_MASK   0xFFFF  //< Clock Divisor mask
00251 #define UART_BRGR_CD_SHIFT  0       //< Clock Divisor shift
00252 /*\}*/
00253
00257 /*\{*/
00258 #define UART_RPR_RXPTR_MASK  0xFFFFFFFF  //< Receive Pointer Register mask
00259 #define UART_RPR_RXPTR_SHIFT 0           //< Receive Pointer Register shift
00260 /*\}*/
00261
00265 /*\{*/
00266 #define UART_RCR_RXCTR_MASK  0xFFFF  //< Receive Counter Register mask
00267 #define UART_RCR_RXCTR_SHIFT 0       //< Receive Counter Register shift
00268 /*\}*/
00269
00273 /*\{*/
00274 #define UART_TPR_TXPTR_MASK  0xFFFFFFFF  //< Transmit Counter Register mask
00275 #define UART_TPR_TXPTR_SHIFT 0           //< Transmit Counter Register shift
00276 /*\}*/
00277
00281 /*\{*/
00282 #define UART_TCR_TXCTR_MASK  0xFFFF  //< Transmit Counter Register mask
00283 #define UART_TCR_TXCTR_SHIFT 0       //< Transmit Counter Register shift
00284 /*\}*/
00285
00289 /*\{*/
00290 #define UART_RNPR_RXNPTR_MASK  0xFFFFFFFF  //< Receive Next Pointer mask
00291 #define UART_RNPR_RXNPTR_SHIFT 0           //< Receive Next Pointer shift
00292 /*\}*/
00293
00297 /*\{*/
00298 #define UART_RNCR_RXNCTR_MASK  0xFFFF  //< Receive Next Counter mask
00299 #define UART_RNCR_RXNCTR_SHIFT 0       //< Receive Next Counter shift
00300 /*\}*/
00301
00305 /*\{*/
00306 #define UART_TNPR_TXNPTR_MASK  0xFFFFFFFF  //< Transmit Next Pointer mask
00307 #define UART_TNPR_TXNPTR_SHIFT 0           //< Transmit Next Pointer shift
00308 /*\}*/
00309
00313 /*\{*/
00314 #define UART_TNCR_TXNCTR_MASK  0xFFFF  //< Transmit Counter Next mask
00315 #define UART_TNCR_TXNCTR_SHIFT 0       //< Transmit Counter Next shift
00316 /*\}*/
00317
00321 /*\{*/
00322 #define UART_PTCR_RXTEN   0  //< Receiver Transfer Enable
00323 #define UART_PTCR_RXTDIS  1  //< Receiver Transfer Disable
00324 #define UART_PTCR_TXTEN   8  //< Transmitter Transfer Enable
00325 #define UART_PTCR_TXTDIS  9  //< Transmitter Transfer Disable
00326 /*\}*/
00327
00331 /*\{*/
00332 #define UART_PTSR_RXTEN   0  //< Receiver Transfer Enable
00333 #define UART_PTSR_TXTEN   8  //< Transmitter Transfer Enable
00334 /*\}*/
00335
00336 #endif /* SAM3_UART_H */


BeRTOS: sam3_usart.h File Reference

  • cpu
  • cortex-m3
  • io
sam3_usart.h File Reference

Go to the source code of this file.

Defines

#define | US_CR_OFF 0x00000000
USART base addresses.
#define | US0_CR (*((reg32_t *)(USART0_BASE + US_CR_OFF)))
Channel 0 control register address.
#define | US1_CR (*((reg32_t *)(USART1_BASE + US_CR_OFF)))
Channel 1 control register address.
#define | US_RSTRX 2
Reset receiver.
#define | US_RSTTX 3
Reset transmitter.
#define | US_RXEN 4
Receiver enable.
#define | US_RXDIS 5
Receiver disable.
#define | US_TXEN 6
Transmitter enable.
#define | US_TXDIS 7
Transmitter disable.
#define | US_RSTSTA 8
Reset status bits.
#define | US_STTBRK 9
Start break.
#define | US_STPBRK 10
Stop break.
#define | US_STTTO 11
Start timeout.
#define | US_SENDA 12
Send next byte with address bit set.
#define | US_RSTIT 13
Reset interations.
#define | US_RSTNAK 14
Reset non acknowledge.
#define | US_RETTO 15
Rearm time out.
#define | US_DTREN 16
Data terminal ready enable.
#define | US_DTRDIS 17
Data terminal ready disable.
#define | US_RTSEN 18
Request to send enable.
#define | US_RTSDIS 19
Request to send disable.
#define | US_MR_OFF 0x00000004
Mode Register.
#define | US0_MR (*((reg32_t *)(USART0_BASE + US_MR_OFF)))
Channel 0 mode register address.
#define | US1_MR (*((reg32_t *)(USART1_BASE + US_MR_OFF)))
Channel 1 mode register address.
#define | US_USART_MODE_MASK 0x0000000F
USART mode mask.
#define | US_USART_MODE_NORMA 0x00000000
Normal.
#define | US_USART_MODE_RS485 0x00000001
RS485.
#define | US_USART_MODE_HW_HDSH 0x00000002
Hardware handshaking.
#define | US_USART_MODE_MODEM 0x00000003
Modem.
#define | US_USART_MODE_ISO7816T0 0x00000004
ISO7816 protocol: T=0.
#define | US_USART_MODE_ISO7816T1 0x00000006
ISO7816 protocol: T=1.
#define | US_USART_MODE_IRDA 0x00000008
IrDA.
#define | US_CLKS_MASK 0x00000030
Clock selection mask.
#define | US_CLKS_MCK 0x00000000
Master clock.
#define | US_CLKS_MCK8 0x00000010
Master clock divided by 8.
#define | US_CLKS_SCK 0x00000020
External clock.
#define | US_CLKS_SLCK 0x00000030
Slow clock.
#define | US_CHRL_MASK 0x000000C0
Masks data length.
#define | US_CHRL_5 0x00000000
5 data bits.
#define | US_CHRL_6 0x00000040
6 data bits.
#define | US_CHRL_7 0x00000080
7 data bits.
#define | US_CHRL_8 0x000000C0
8 data bits.
#define | US_SYNC 8
Synchronous mode enable.
#define | US_PAR_MASK 0x00000E00
Parity mode mask.
#define | US_PAR_EVEN 0x00000000
Even parity.
#define | US_PAR_ODD 0x00000200
Odd parity.
#define | US_PAR_SPACE 0x00000400
Space parity.
#define | US_PAR_MARK 0x00000600
Marked parity.
#define | US_PAR_NO 0x00000800
No parity.
#define | US_PAR_MULTIDROP 0x00000C00
Multi-drop mode.
#define | US_NBSTOP_MASK 0x00003000
Masks stop bit length.
#define | US_NBSTOP_1 0x00000000
1 stop bit.
#define | US_NBSTOP_1_5 0x00001000
1.5 stop bits.
#define | US_NBSTOP_2 0x00002000
2 stop bits.
#define | US_CHMODE_MASK 0x0000C000
Channel mode mask.
#define | US_CHMODE_NORMAL 0x00000000
Normal mode.
#define | US_CHMODE_AUTOMATIC_ECHO 0x00004000
Automatic echo.
#define | US_CHMODE_LOCAL_LOOPBACK 0x00008000
Local loopback.
#define | US_CHMODE_REMOTE_LOOPBACK 0x0000C000
Remote loopback.
#define | US_MSBF 16
Bit order.
#define | US_MODE9 17
9 bit mode.
#define | US_CLKO 18
Clock output select.
#define | US_OVER 19
Oversampling mode.
#define | US_INACK 20
Inhibit non acknowledge.
#define | US_DSNACK 21
Disable successive nack.
#define | US_MAX_INTERATION_MASK 0x07000000
Max numer of interation in mode ISO7816 T=0.
#define | US_FILTER 28
Infrared receive line filter.
#define | US_IER_OFF 0x00000008
Status and Interrupt Register.
#define | US0_IER (*((reg32_t *)(USART0_BASE + US_IER_OFF)))
Channel 0 interrupt enable register address.
#define | US1_IER (*((reg32_t *)(USART1_BASE + US_IER_OFF)))
Channel 1 interrupt enable register address.
#define | US_IDR_OFF 0x0000000C
USART interrupt disable register offset.
#define | US0_IDR (*((reg32_t *)(USART0_BASE + US_IDR_OFF)))
Channel 0 interrupt disable register address.
#define | US1_IDR (*((reg32_t *)(USART1_BASE + US_IDR_OFF)))
Channel 1 interrupt disable register address.
#define | US_IMR_OFF 0x00000010
USART interrupt mask register offset.
#define | US0_IMR (*((reg32_t *)(USART0_BASE + US_IMR_OFF)))
Channel 0 interrupt mask register address.
#define | US1_IMR (*((reg32_t *)(USART1_BASE + US_IMR_OFF)))
Channel 1 interrupt mask register address.
#define | US_CSR_OFF 0x00000014
USART status register offset.
#define | US0_CSR (*((reg32_t *)(USART0_BASE + US_CSR_OFF)))
Channel 0 status register address.
#define | US1_CSR (*((reg32_t *)(USART1_BASE + US_CSR_OFF)))
Channel 1 status register address.
#define | US_CSR_RI 20
Image of RI input.
#define | US_CSR_DSR 21
Image of DSR input.
#define | US_CSR_DCD 22
Image of DCD input.
#define | US_CSR_CTS 23
Image of CTS input.
#define | US_RXRDY 0
Receiver ready.
#define | US_TXRDY 1
Transmitter ready.
#define | US_RXBRK 2
Receiver break.
#define | US_ENDRX 3
End of receiver PDC transfer.
#define | US_ENDTX 4
End of transmitter PDC transfer.
#define | US_OVRE 5
Overrun error.
#define | US_FRAME 6
Framing error.
#define | US_PARE 7
Parity error.
#define | US_TIMEOUT 8
Receiver timeout.
#define | US_TXEMPTY 9
Transmitter empty.
#define | US_ITERATION 10
Iteration interrupt enable.
#define | US_TXBUFE 11
Buffer empty interrupt enable.
#define | US_RXBUFF 12
Buffer full interrupt enable.
#define | US_NACK 13
Non acknowledge interrupt enable.
#define | US_RIIC 16
Ring indicator input change enable.
#define | US_DSRIC 17
Data set ready input change enable.
#define | US_DCDIC 18
Data carrier detect input change interrupt enable.
#define | US_CTSIC 19
Clear to send input change interrupt enable.
#define | US_RHR_OFF 0x00000018
Receiver Holding Register.
#define | US0_RHR (*((reg32_t *)(USART0_BASE + US_RHR_OFF)))
Channel 0 receiver holding register address.
#define | US1_RHR (*((reg32_t *)(USART1_BASE + US_RHR_OFF)))
Channel 1 receiver holding register address.
#define | US_RHR_RXCHR_MASK 0x000001FF
Last char received if US_RXRDY is set.
#define | US_RHR_RXSYNH 15
Received sync.
#define | US_THR_OFF 0x0000001C
Transmitter Holding Register.
#define | US0_THR (*((reg32_t *)(USART0_BASE + US_THR_OFF)))
Channel 0 transmitter holding register address.
#define | US1_THR (*((reg32_t *)(USART1_BASE + US_THR_OFF)))
Channel 1 transmitter holding register address.
#define | US_THR_TXCHR_MASK 0x000001FF
Next char to be trasmitted.
#define | US_THR_TXSYNH 15
Sync field to be trasmitted.
#define | US_BRGR_OFF 0x00000020
Baud Rate Generator Register.
#define | US0_BRGR (*((reg32_t *)(USART0_BASE + US_BRGR_OFF)))
Channel 0 baud rate register address.
#define | US1_BRGR (*((reg32_t *)(USART1_BASE + US_BRGR_OFF)))
Channel 1 baud rate register address.
#define | US_RTOR_OFF 0x00000024
Receiver Timeout Register.
#define | US0_RTOR (*((reg32_t *)(USART0_BASE + US_RTOR_OFF)))
Channel 0 receiver timeout register address.
#define | US1_RTOR (*((reg32_t *)(USART1_BASE + US_RTOR_OFF)))
Channel 1 receiver timeout register address.
#define | US_TTGR_OFF 0x00000028
Transmitter Time Guard Register.
#define | US0_TTGR (*((reg32_t *)(USART0_BASE + US_TTGR_OFF)))
Channel 0 transmitter time guard register address.
#define | US1_TTGR (*((reg32_t *)(USART1_BASE + US_TTGR_OFF)))
Channel 1 transmitter time guard register address.
#define | US_FIDI_OFF 0x00000040
FI DI Ratio Register.
#define | US0_FIDI (*((reg32_t *)(USART0_BASE + US_FIDI_OFF)))
Channel 0 FI DI ratio register address.
#define | US1_FIDI (*((reg32_t *)(USART1_BASE + US_FIDI_OFF)))
Channel 1 FI DI ratio register address.
#define | US_NER_OFF 0x00000044
Error Counter Register.
#define | US0_NER (*((reg32_t *)(USART0_BASE + US_NER_OFF)))
Channel 0 error counter register address.
#define | US1_NER (*((reg32_t *)(USART1_BASE + US_NER_OFF)))
Channel 1 error counter register address.
#define | US_IF_OFF 0x0000004C
IrDA Filter Register.
#define | US0_IF (*((reg32_t *)(USART0_BASE + US_IF_OFF)))
Channel 0 IrDA filter register address.
#define | US1_IF (*((reg32_t *)(USART1_BASE + US_IF_OFF)))
Channel 1 IrDA filter register address.

Detailed Description

Author:
Daniele Basile <asterix@develer.com>

Atmel SAM3 USART User interface. This file is based on NUT/OS implementation. See license below.

Definition in file sam3_usart.h.

Define Documentation

#define US_BRGR_OFF 0x00000020

Baud Rate Generator Register.

USART baud rate register offset.

Definition at line 251 of file sam3_usart.h.

#define US_CR_OFF 0x00000000

USART base addresses.

USART Control Register USART control register offset.

Definition at line 96 of file sam3_usart.h.

#define US_FIDI_OFF 0x00000040

FI DI Ratio Register.

USART FI DI ratio register offset.

Definition at line 278 of file sam3_usart.h.

#define US_IER_OFF 0x00000008

Status and Interrupt Register.

USART interrupt enable register offset.

Definition at line 186 of file sam3_usart.h.

#define US_IF_OFF 0x0000004C

IrDA Filter Register.

USART IrDA filter register offset.

Definition at line 296 of file sam3_usart.h.

#define US_MR_OFF 0x00000004

Mode Register.

USART mode register offset.

Definition at line 123 of file sam3_usart.h.

#define US_NER_OFF 0x00000044

Error Counter Register.

USART error counter register offset.

Definition at line 287 of file sam3_usart.h.

#define US_RHR_OFF 0x00000018

Receiver Holding Register.

USART receiver holding register offset.

Definition at line 229 of file sam3_usart.h.

#define US_RTOR_OFF 0x00000024

Receiver Timeout Register.

USART receiver timeout register offset.

Definition at line 260 of file sam3_usart.h.

#define US_THR_OFF 0x0000001C

Transmitter Holding Register.

USART transmitter holding register offset.

Definition at line 240 of file sam3_usart.h.

#define US_TTGR_OFF 0x00000028

Transmitter Time Guard Register.

USART transmitter time guard register offset.

Definition at line 269 of file sam3_usart.h.


BeRTOS: sam3_usart.h Source File

  • cpu
  • cortex-m3
  • io
sam3_usart.h
Go to the documentation of this file.
00001
00039 /*
00040  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00041  *
00042  * Redistribution and use in source and binary forms, with or without
00043  * modification, are permitted provided that the following conditions
00044  * are met:
00045  *
00046  * 1. Redistributions of source code must retain the above copyright
00047  *    notice, this list of conditions and the following disclaimer.
00048  * 2. Redistributions in binary form must reproduce the above copyright
00049  *    notice, this list of conditions and the following disclaimer in the
00050  *    documentation and/or other materials provided with the distribution.
00051  * 3. Neither the name of the copyright holders nor the names of
00052  *    contributors may be used to endorse or promote products derived
00053  *    from this software without specific prior written permission.
00054  *
00055  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00056  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00057  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00058  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00059  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00060  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00061  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00062  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00063  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00064  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00065  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00066  * SUCH DAMAGE.
00067  *
00068  * For additional information see http://www.ethernut.de/
00069  */
00070
00071 #ifndef SAM3_USART_H
00072 #define SAM3_USART_H
00073
00077 #if CPU_CM3_SAM3N
00078     #define USART0_BASE  0x40024000
00079     #define USART1_BASE  0x40028000
00080 #elif CPU_CM3_SAM3U
00081     #define USART0_BASE  0x40090000
00082     #define USART1_BASE  0x40094000
00083     #define USART2_BASE  0x40098000
00084     #define USART3_BASE  0x4009C000
00085 #elif CPU_CM3_SAM3X
00086     #define USART0_BASE  0x40098000
00087     #define USART1_BASE  0x4009C000
00088     #define USART2_BASE  0x400A0000
00089     #define USART3_BASE  0x400A4000
00090 #endif
00091
00095 /*\{*/
00096 #define US_CR_OFF               0x00000000      ///< USART control register offset.
00097 #define US0_CR  (*((reg32_t *)(USART0_BASE + US_CR_OFF)))       ///< Channel 0 control register address.
00098 #define US1_CR  (*((reg32_t *)(USART1_BASE + US_CR_OFF)))       ///< Channel 1 control register address.
00099 #define US_RSTRX                         2      ///< Reset receiver.
00100 #define US_RSTTX                         3      ///< Reset transmitter.
00101 #define US_RXEN                          4      ///< Receiver enable.
00102 #define US_RXDIS                         5      ///< Receiver disable.
00103 #define US_TXEN                          6      ///< Transmitter enable.
00104 #define US_TXDIS                         7      ///< Transmitter disable.
00105 #define US_RSTSTA                        8      ///< Reset status bits.
00106 #define US_STTBRK                        9      ///< Start break.
00107 #define US_STPBRK                        10     ///< Stop break.
00108 #define US_STTTO                         11     ///< Start timeout.
00109 #define US_SENDA                         12     ///< Send next byte with address bit set.
00110 #define US_RSTIT                         13     ///< Reset interations.
00111 #define US_RSTNAK                        14     ///< Reset non acknowledge.
00112 #define US_RETTO                         15     ///< Rearm time out.
00113 #define US_DTREN                         16     ///< Data terminal ready enable.
00114 #define US_DTRDIS                        17     ///< Data terminal ready disable.
00115 #define US_RTSEN                         18     ///< Request to send enable.
00116 #define US_RTSDIS                        19     ///< Request to send disable.
00117 /*\}*/
00118
00122 /*\{*/
00123 #define US_MR_OFF               0x00000004      ///< USART mode register offset.
00124 #define US0_MR  (*((reg32_t *)(USART0_BASE + US_MR_OFF)))       ///< Channel 0 mode register address.
00125 #define US1_MR  (*((reg32_t *)(USART1_BASE + US_MR_OFF)))       ///< Channel 1 mode register address.
00126
00127 #define US_USART_MODE_MASK      0x0000000F      ///< USART mode mask.
00128 #define US_USART_MODE_NORMA     0x00000000      ///< Normal.
00129 #define US_USART_MODE_RS485     0x00000001      ///< RS485.
00130 #define US_USART_MODE_HW_HDSH   0x00000002      ///< Hardware handshaking.
00131 #define US_USART_MODE_MODEM     0x00000003      ///< Modem.
00132 #define US_USART_MODE_ISO7816T0 0x00000004      ///< ISO7816 protocol: T=0.
00133 #define US_USART_MODE_ISO7816T1 0x00000006      ///< ISO7816 protocol: T=1.
00134 #define US_USART_MODE_IRDA      0x00000008      ///< IrDA.
00135
00136 #define US_CLKS_MASK            0x00000030      ///< Clock selection mask.
00137 #define US_CLKS_MCK             0x00000000      ///< Master clock.
00138 #define US_CLKS_MCK8            0x00000010      ///< Master clock divided by 8.
00139 #define US_CLKS_SCK             0x00000020      ///< External clock.
00140 #define US_CLKS_SLCK            0x00000030      ///< Slow clock.
00141
00142 #define US_CHRL_MASK            0x000000C0      ///< Masks data length.
00143 #define US_CHRL_5               0x00000000      ///< 5 data bits.
00144 #define US_CHRL_6               0x00000040      ///< 6 data bits.
00145 #define US_CHRL_7               0x00000080      ///< 7 data bits.
00146 #define US_CHRL_8               0x000000C0      ///< 8 data bits.
00147
00148 #define US_SYNC                          8      ///< Synchronous mode enable.
00149
00150 #define US_PAR_MASK             0x00000E00      ///< Parity mode mask.
00151 #define US_PAR_EVEN             0x00000000      ///< Even parity.
00152 #define US_PAR_ODD              0x00000200      ///< Odd parity.
00153 #define US_PAR_SPACE            0x00000400      ///< Space parity.
00154 #define US_PAR_MARK             0x00000600      ///< Marked parity.
00155 #define US_PAR_NO               0x00000800      ///< No parity.
00156 #define US_PAR_MULTIDROP        0x00000C00      ///< Multi-drop mode.
00157
00158 #define US_NBSTOP_MASK          0x00003000      ///< Masks stop bit length.
00159 #define US_NBSTOP_1             0x00000000      ///< 1 stop bit.
00160 #define US_NBSTOP_1_5           0x00001000      ///< 1.5 stop bits.
00161 #define US_NBSTOP_2             0x00002000      ///< 2 stop bits.
00162
00163 #define US_CHMODE_MASK              0x0000C000  ///< Channel mode mask.
00164 #define US_CHMODE_NORMAL            0x00000000  ///< Normal mode.
00165 #define US_CHMODE_AUTOMATIC_ECHO    0x00004000  ///< Automatic echo.
00166 #define US_CHMODE_LOCAL_LOOPBACK    0x00008000  ///< Local loopback.
00167 #define US_CHMODE_REMOTE_LOOPBACK   0x0000C000  ///< Remote loopback.
00168
00169 #define US_MSBF                         16      ///< Bit order.
00170 #define US_MODE9                        17      ///< 9 bit mode.
00171 #define US_CLKO                         18      ///< Clock output select.
00172 #define US_OVER                         19      ///< Oversampling mode.
00173 #define US_INACK                        20      ///< Inhibit non acknowledge.
00174 #define US_DSNACK                       21      ///< Disable successive nack.
00175
00176 #define US_MAX_INTERATION_MASK      0x07000000  ///< Max numer of interation in mode ISO7816 T=0.
00177
00178 #define US_FILTER                       28      ///< Infrared receive line filter.
00179
00180 /*\}*/
00181
00185 /*\{*/
00186 #define US_IER_OFF              0x00000008      ///< USART interrupt enable register offset.
00187 #define US0_IER (*((reg32_t *)(USART0_BASE + US_IER_OFF)))      ///< Channel 0 interrupt enable register address.
00188 #define US1_IER (*((reg32_t *)(USART1_BASE + US_IER_OFF)))      ///< Channel 1 interrupt enable register address.
00189
00190 #define US_IDR_OFF              0x0000000C      ///< USART interrupt disable register offset.
00191 #define US0_IDR (*((reg32_t *)(USART0_BASE + US_IDR_OFF)))      ///< Channel 0 interrupt disable register address.
00192 #define US1_IDR (*((reg32_t *)(USART1_BASE + US_IDR_OFF)))      ///< Channel 1 interrupt disable register address.
00193
00194 #define US_IMR_OFF              0x00000010      ///< USART interrupt mask register offset.
00195 #define US0_IMR (*((reg32_t *)(USART0_BASE + US_IMR_OFF)))      ///< Channel 0 interrupt mask register address.
00196 #define US1_IMR (*((reg32_t *)(USART1_BASE + US_IMR_OFF)))      ///< Channel 1 interrupt mask register address.
00197
00198 #define US_CSR_OFF              0x00000014      ///< USART status register offset.
00199 #define US0_CSR (*((reg32_t *)(USART0_BASE + US_CSR_OFF)))      ///< Channel 0 status register address.
00200 #define US1_CSR (*((reg32_t *)(USART1_BASE + US_CSR_OFF)))      ///< Channel 1 status register address.
00201 #define US_CSR_RI                       20      ///< Image of RI input.
00202 #define US_CSR_DSR                      21      ///< Image of DSR input.
00203 #define US_CSR_DCD                      22      ///< Image of DCD input.
00204 #define US_CSR_CTS                      23      ///< Image of CTS input.
00205
00206 #define US_RXRDY                         0      ///< Receiver ready.
00207 #define US_TXRDY                         1      ///< Transmitter ready.
00208 #define US_RXBRK                         2      ///< Receiver break.
00209 #define US_ENDRX                         3      ///< End of receiver PDC transfer.
00210 #define US_ENDTX                         4      ///< End of transmitter PDC transfer.
00211 #define US_OVRE                          5      ///< Overrun error.
00212 #define US_FRAME                         6      ///< Framing error.
00213 #define US_PARE                          7      ///< Parity error.
00214 #define US_TIMEOUT                       8      ///< Receiver timeout.
00215 #define US_TXEMPTY                       9      ///< Transmitter empty.
00216 #define US_ITERATION                    10      ///< Iteration interrupt enable.
00217 #define US_TXBUFE                       11      ///< Buffer empty interrupt enable.
00218 #define US_RXBUFF                       12      ///< Buffer full interrupt enable.
00219 #define US_NACK                         13      ///< Non acknowledge interrupt enable.
00220 #define US_RIIC                         16      ///< Ring indicator input change enable.
00221 #define US_DSRIC                        17      ///< Data set ready input change enable.
00222 #define US_DCDIC                        18      ///< Data carrier detect input change interrupt enable.
00223 #define US_CTSIC                        19      ///< Clear to send input change interrupt enable.
00224
00228 /*\{*/
00229 #define US_RHR_OFF              0x00000018      ///< USART receiver holding register offset.
00230 #define US0_RHR (*((reg32_t *)(USART0_BASE + US_RHR_OFF)))      ///< Channel 0 receiver holding register address.
00231 #define US1_RHR (*((reg32_t *)(USART1_BASE + US_RHR_OFF)))      ///< Channel 1 receiver holding register address.
00232 #define US_RHR_RXCHR_MASK       0x000001FF      ///< Last char received if US_RXRDY is set.
00233 #define US_RHR_RXSYNH                   15      ///< Received sync.
00234 /*\}*/
00235
00239 /*\{*/
00240 #define US_THR_OFF              0x0000001C      ///< USART transmitter holding register offset.
00241 #define US0_THR (*((reg32_t *)(USART0_BASE + US_THR_OFF)))      ///< Channel 0 transmitter holding register address.
00242 #define US1_THR (*((reg32_t *)(USART1_BASE + US_THR_OFF)))      ///< Channel 1 transmitter holding register address.
00243 #define US_THR_TXCHR_MASK       0x000001FF      ///< Next char to be trasmitted.
00244 #define US_THR_TXSYNH                   15      ///< Sync field to be trasmitted.
00245 /*\}*/
00246
00250 /*\{*/
00251 #define US_BRGR_OFF             0x00000020      ///< USART baud rate register offset.
00252 #define US0_BRGR (*((reg32_t *)(USART0_BASE + US_BRGR_OFF)))    ///< Channel 0 baud rate register address.
00253 #define US1_BRGR (*((reg32_t *)(USART1_BASE + US_BRGR_OFF)))    ///< Channel 1 baud rate register address.
00254 /*\}*/
00255
00259 /*\{*/
00260 #define US_RTOR_OFF             0x00000024      ///< USART receiver timeout register offset.
00261 #define US0_RTOR (*((reg32_t *)(USART0_BASE + US_RTOR_OFF)))    ///< Channel 0 receiver timeout register address.
00262 #define US1_RTOR (*((reg32_t *)(USART1_BASE + US_RTOR_OFF)))    ///< Channel 1 receiver timeout register address.
00263 /*\}*/
00264
00268 /*\{*/
00269 #define US_TTGR_OFF             0x00000028      ///< USART transmitter time guard register offset.
00270 #define US0_TTGR (*((reg32_t *)(USART0_BASE + US_TTGR_OFF)))    ///< Channel 0 transmitter time guard register address.
00271 #define US1_TTGR (*((reg32_t *)(USART1_BASE + US_TTGR_OFF)))    ///< Channel 1 transmitter time guard register address.
00272 /*\}*/
00273
00277 /*\{*/
00278 #define US_FIDI_OFF             0x00000040      ///< USART FI DI ratio register offset.
00279 #define US0_FIDI (*((reg32_t *)(USART0_BASE + US_FIDI_OFF)))    ///< Channel 0 FI DI ratio register address.
00280 #define US1_FIDI (*((reg32_t *)(USART1_BASE + US_FIDI_OFF)))    ///< Channel 1 FI DI ratio register address.
00281 /*\}*/
00282
00286 /*\{*/
00287 #define US_NER_OFF              0x00000044      ///< USART error counter register offset.
00288 #define US0_NER  (*((reg32_t *)(USART0_BASE + US_NER_OFF)))     ///< Channel 0 error counter register address.
00289 #define US1_NER  (*((reg32_t *)(USART1_BASE + US_NER_OFF)))     ///< Channel 1 error counter register address.
00290 /*\}*/
00291
00295 /*\{*/
00296 #define US_IF_OFF               0x0000004C      ///< USART IrDA filter register offset.
00297 #define US0_IF (*((reg32_t *)(USART0_BASE + US_IF_OFF)))        ///< Channel 0 IrDA filter register address.
00298 #define US1_IF (*((reg32_t *)(USART1_BASE + US_IF_OFF)))        ///< Channel 1 IrDA filter register address.
00299 /*\}*/
00300
00301 #if USART_HAS_PDC
00302
00306     /*\{*/
00307     #define US0_RPR (*((reg32_t *)(USART0_BASE + PERIPH_RPR_OFF)))      ///< Channel 0 receive pointer register address.
00308     #define US1_RPR (*((reg32_t *)(USART1_BASE + PERIPH_RPR_OFF)))      ///< Channel 1 receive pointer register address.
00309     /*\}*/
00310
00314     /*\{*/
00315     #define US0_RCR (*((reg32_t *)(USART0_BASE + PERIPH_RCR_OFF)))      ///< Channel 0 receive counter register address.
00316     #define US1_RCR (*((reg32_t *)(USART1_BASE + PERIPH_RCR_OFF)))      ///< Channel 1 receive counter register address.
00317     /*\}*/
00318
00322     /*\{*/
00323     #define US0_TPR (*((reg32_t *)(USART0_BASE + PERIPH_TPR_OFF)))      ///< Channel 0 transmit pointer register address.
00324     #define US1_TPR (*((reg32_t *)(USART1_BASE + PERIPH_TPR_OFF)))      ///< Channel 1 transmit pointer register address.
00325     /*\}*/
00326
00330     /*\{*/
00331     #define US0_TCR (*((reg32_t *)(USART0_BASE + PERIPH_TCR_OFF)))      ///< Channel 0 transmit counter register address.
00332     #define US1_TCR (*((reg32_t *)(USART1_BASE + PERIPH_TCR_OFF)))      ///< Channel 1 transmit counter register address.
00333     /*\}*/
00334
00335     #if defined(PERIPH_RNPR_OFF) && defined(PERIPH_RNCR_OFF)
00336     #define US0_RNPR   (*((reg32_t *)(USART0_BASE + PERIPH_RNPR_OFF)))  ///< PDC channel 0 receive next pointer register.
00337     #define US1_RNPR   (*((reg32_t *)(USART1_BASE + PERIPH_RNPR_OFF)))  ///< PDC channel 1 receive next pointer register.
00338     #define US0_RNCR   (*((reg32_t *)(USART0_BASE + PERIPH_RNCR_OFF)))  ///< PDC channel 0 receive next counter register.
00339     #define US1_RNCR   (*((reg32_t *)(USART1_BASE + PERIPH_RNCR_OFF)))  ///< PDC channel 1 receive next counter register.
00340     #endif
00341
00342     #if defined(PERIPH_TNPR_OFF) && defined(PERIPH_TNCR_OFF)
00343     #define US0_TNPR   (*((reg32_t *)(USART0_BASE + PERIPH_TNPR_OFF)))  ///< PDC channel 0 transmit next pointer register.
00344     #define US1_TNPR   (*((reg32_t *)(USART1_BASE + PERIPH_TNPR_OFF)))  ///< PDC channel 1 transmit next pointer register.
00345     #define US0_TNCR   (*((reg32_t *)(USART0_BASE + PERIPH_TNCR_OFF)))  ///< PDC channel 0 transmit next counter register.
00346     #define US1_TNCR   (*((reg32_t *)(USART1_BASE + PERIPH_TNCR_OFF)))  ///< PDC channel 1 transmit next counter register.
00347     #endif
00348
00349     #if defined(PERIPH_PTCR_OFF)
00350     #define US0_PTCR   (*((reg32_t *)(USART0_BASE + PERIPH_PTCR_OFF)))  ///< PDC channel 0 transfer control register.
00351     #define US1_PTCR   (*((reg32_t *)(USART1_BASE + PERIPH_PTCR_OFF)))  ///< PDC channel 1 transfer control register.
00352     #endif
00353
00354     #if defined(PERIPH_PTSR_OFF)
00355     #define US0_PTSR   (*((reg32_t *)(USART0_BASE + PERIPH_PTSR_OFF)))  ///< PDC channel 0 transfer status register.
00356     #define US1_PTSR   (*((reg32_t *)(USART1_BASE + PERIPH_PTSR_OFF)))  ///< PDC channel 1 transfer status register.
00357     #endif
00358
00359 #endif  /* USART_HAS_PDC */
00360
00361 #endif /* SAM3_USART_H */


BeRTOS: sam3_wdt.h File Reference

  • cpu
  • cortex-m3
  • io
sam3_wdt.h File Reference

Go to the source code of this file.

Defines

#define | WDT_CR_OFF 0x00000000
Watch Dog registers base address.
#define | WDT_CR (*((reg32_t *)(WDT_BASE + WDT_CR_OFF)))
Watchdog control register address.
#define | WDT_WDRSTT 0
Watchdog restart.
#define | WDT_KEY 0xA5000000
Watchdog password.
#define | WDT_MR_OFF 0x00000004
Watch Dog Mode Register.
#define | WDT_MR (*((reg32_t *)(WDT_BASE + WDT_MR_OFF)))
Mode register address.
#define | WDT_WDV_MASK 0x00000FFF
Counter value mask.
#define | WDT_WDV_SHIFT 0
Counter value LSB.
#define | WDT_WDFIEN 12
Fault interrupt enable.
#define | WDT_WDRSTEN 13
Reset enable.
#define | WDT_WDRPROC 14
Eset processor enable.
#define | WDT_WDDIS 15
Watchdog disable.
#define | WDT_WDD_MASK 0x0FFF0000
Delta value mask.
#define | WDT_WDD_SHIFT 16
Delta value LSB.
#define | WDT_WDDBGHLT 28
Watchdog debug halt.
#define | WDT_WDIDLEHLT 29
Watchdog idle halt.
#define | WDT_SR_OFF 0x00000008
Watch Dog Status Register.
#define | WDT_SR (*((reg32_t *)(WDT_BASE + WDT_SR_OFF)))
Status register address.
#define | WDT_WDUNF 0
Watchdog underflow.
#define | WDT_WDERR 1
Watchdog error.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

Atmel SAM3 Watchdog. This file is based on NUT/OS implementation. See license below.

Definition in file sam3_wdt.h.

Define Documentation

#define WDT_CR_OFF 0x00000000

Watch Dog registers base address.

Watch Dog Control Register Watchdog control register offset.

Definition at line 84 of file sam3_wdt.h.

#define WDT_MR_OFF 0x00000004

Watch Dog Mode Register.

Mode register offset.

Definition at line 92 of file sam3_wdt.h.

#define WDT_SR_OFF 0x00000008

Watch Dog Status Register.

Status register offset.

Definition at line 108 of file sam3_wdt.h.


BeRTOS: sam3_wdt.h Source File

  • cpu
  • cortex-m3
  • io
sam3_wdt.h
Go to the documentation of this file.
00001
00040 /*
00041  * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
00042  *
00043  * Redistribution and use in source and binary forms, with or without
00044  * modification, are permitted provided that the following conditions
00045  * are met:
00046  *
00047  * 1. Redistributions of source code must retain the above copyright
00048  *    notice, this list of conditions and the following disclaimer.
00049  * 2. Redistributions in binary form must reproduce the above copyright
00050  *    notice, this list of conditions and the following disclaimer in the
00051  *    documentation and/or other materials provided with the distribution.
00052  * 3. Neither the name of the copyright holders nor the names of
00053  *    contributors may be used to endorse or promote products derived
00054  *    from this software without specific prior written permission.
00055  *
00056  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00057  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00058  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00059  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00060  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00061  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00062  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00063  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00064  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00065  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00066  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00067  * SUCH DAMAGE.
00068  *
00069  * For additional information see http://www.ethernut.de/
00070  */
00071
00072 #ifndef SAM3_WDT_H
00073 #define SAM3_WDT_H
00074
00076 #if CPU_CM3_SAM3N
00077     #define WDT_BASE  0x400E1450
00078 #elif CPU_CM3_SAM3X
00079     #define WDT_BASE  0x400E1A50
00080 #endif
00081
00083 /*\{*/
00084 #define WDT_CR_OFF          0x00000000  ///< Watchdog control register offset.
00085 #define WDT_CR              (*((reg32_t *)(WDT_BASE + WDT_CR_OFF))) ///< Watchdog control register address.
00086 #define WDT_WDRSTT          0           ///< Watchdog restart.
00087 #define WDT_KEY             0xA5000000  ///< Watchdog password.
00088 /*\}*/
00089
00091 /*\{*/
00092 #define WDT_MR_OFF          0x00000004  ///< Mode register offset.
00093 #define WDT_MR              (*((reg32_t *)(WDT_BASE + WDT_MR_OFF))) ///< Mode register address.
00094 #define WDT_WDV_MASK        0x00000FFF  ///< Counter value mask.
00095 #define WDT_WDV_SHIFT       0           ///< Counter value LSB.
00096 #define WDT_WDFIEN          12          ///< Fault interrupt enable.
00097 #define WDT_WDRSTEN         13          ///< Reset enable.
00098 #define WDT_WDRPROC         14          ///< Eset processor enable.
00099 #define WDT_WDDIS           15          ///< Watchdog disable.
00100 #define WDT_WDD_MASK        0x0FFF0000  ///< Delta value mask.
00101 #define WDT_WDD_SHIFT       16          ///< Delta value LSB.
00102 #define WDT_WDDBGHLT        28          ///< Watchdog debug halt.
00103 #define WDT_WDIDLEHLT       29          ///< Watchdog idle halt.
00104 /*\}*/
00105
00107 /*\{*/
00108 #define WDT_SR_OFF          0x00000008  ///< Status register offset.
00109 #define WDT_SR              (*((reg32_t *)(WDT_BASE + WDT_SR_OFF))) ///< Status register address.
00110 #define WDT_WDUNF           0  ///< Watchdog underflow.
00111 #define WDT_WDERR           1  ///< Watchdog error.
00112 /*\}*/
00113
00114 #endif /* SAM3_WDT_H */


BeRTOS: sam3n.h File Reference

  • cpu
  • cortex-m3
  • io
Data Structures
sam3n.h File Reference

Atmel's SAM3 registers definitions. More...

#include <stdint.h>

Go to the source code of this file.

Data Structures

struct Pwm
PWM context structure. More...

Detailed Description

Atmel's SAM3 registers definitions.

This file derives from the one included in Atmel softpack, and defines registers not yet written in standard BeRTOS include file (io/sam3_*.h) with some minor modifications for BeRTOS compatibility. You should normally use standard BeRTOS include file for register definitions (i.e. io/sam3.h, io/sam3_pio.h, io/sam3_uart.h, etc.) but in case you need register definitions for SAM3 hardware not yet supported by BeRTOS you can include this file.

Definition in file sam3n.h.


BeRTOS: sam3n.h Source File

  • cpu
  • cortex-m3
  • io
sam3n.h
Go to the documentation of this file.
00001
00044 /* ---------------------------------------------------------------------------- */
00045 /*                  Atmel Microcontroller Software Support                      */
00046 /* ---------------------------------------------------------------------------- */
00047 /* Copyright (c) 2010, Atmel Corporation                                        */
00048 /*                                                                              */
00049 /* All rights reserved.                                                         */
00050 /*                                                                              */
00051 /* Redistribution and use in source and binary forms, with or without           */
00052 /* modification, are permitted provided that the following condition is met:    */
00053 /*                                                                              */
00054 /* - Redistributions of source code must retain the above copyright notice,     */
00055 /* this list of conditions and the disclaimer below.                            */
00056 /*                                                                              */
00057 /* Atmel's name may not be used to endorse or promote products derived from     */
00058 /* this software without specific prior written permission.                     */
00059 /*                                                                              */
00060 /* DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR   */
00061 /* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
00062 /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE   */
00063 /* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,      */
00064 /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
00065 /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,  */
00066 /* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF    */
00067 /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING         */
00068 /* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
00069 /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                           */
00070 /* ---------------------------------------------------------------------------- */
00071 /*                                                                              */
00072 /* File Name    : SAM3N.h */
00073 /* Object       : SAM3N definitions */
00074 /* Generated by : AT91 SW Application Group */
00075 /* Generated on : 2010-09-06 */
00076
00077 #ifndef SAM3N_H
00078 #define SAM3N_H
00079
00080 /* SAM3N_definitions SAM3N definitions
00081   This file defines all structures and symbols for SAM3N:
00082     - registers and bitfields
00083     - peripheral base address
00084     - peripheral ID
00085     - PIO definitions
00086 */
00087
00088 #ifdef __cplusplus
00089  extern "C" {
00090 #endif
00091
00092 #ifndef __ASSEMBLY__
00093 #include <stdint.h>
00094 #ifndef __cplusplus
00095 typedef volatile const uint32_t RoReg; /* Read only 32-bit register (volatile const unsigned int) */
00096 #else
00097 typedef volatile       uint32_t RoReg; /* Read only 32-bit register (volatile const unsigned int) */
00098 #endif
00099 typedef volatile       uint32_t WoReg; /* Write only 32-bit register (volatile unsigned int) */
00100 typedef volatile       uint32_t RwReg; /* Read-Write 32-bit register (volatile unsigned int) */
00101 #define CAST(type, value) ((type *) value)
00102 #define REG_ACCESS(type, address) (*(type*)address) /* C code: Register value */
00103 #else
00104 #define CAST(type, value) (value)
00105 #define REG_ACCESS(type, address) (address) /* Assembly code: Register address */
00106 #endif
00107
00108 /* ************************************************************************** */
00109 /*   CMSIS DEFINITIONS FOR SAM3N */
00110 /* ************************************************************************** */
00111
00112 /* Interrupt Number Definition */
00113 typedef enum IRQn
00114 {
00115 /******  Cortex-M3 Processor Exceptions Numbers ******************************/
00116   NonMaskableInt_IRQn   = -14, /*  2 Non Maskable Interrupt                */
00117   MemoryManagement_IRQn = -12, /*  4 Cortex-M3 Memory Management Interrupt */
00118   BusFault_IRQn         = -11, /*  5 Cortex-M3 Bus Fault Interrupt         */
00119   UsageFault_IRQn       = -10, /*  6 Cortex-M3 Usage Fault Interrupt       */
00120   SVCall_IRQn           = -5,  /* 11 Cortex-M3 SV Call Interrupt           */
00121   DebugMonitor_IRQn     = -4,  /* 12 Cortex-M3 Debug Monitor Interrupt     */
00122   PendSV_IRQn           = -2,  /* 14 Cortex-M3 Pend SV Interrupt           */
00123   SysTick_IRQn          = -1,  /* 15 Cortex-M3 System Tick Interrupt       */
00124 /******  SAM3N specific Interrupt Numbers *********************************/
00125
00126   SUPC_IRQn            =  0, /*  0 SAM3N Supply Controller (SUPC) */
00127   RSTC_IRQn            =  1, /*  1 SAM3N Reset Controller (RSTC) */
00128   RTC_IRQn             =  2, /*  2 SAM3N Real Time Clock (RTC) */
00129   RTT_IRQn             =  3, /*  3 SAM3N Real Time Timer (RTT) */
00130   WDT_IRQn             =  4, /*  4 SAM3N Watchdog Timer (WDT) */
00131   PMC_IRQn             =  5, /*  5 SAM3N Power Management Controller (PMC) */
00132   EFC_IRQn             =  6, /*  6 SAM3N Enhanced Flash Controller (EFC) */
00133   UART0_IRQn           =  8, /*  8 SAM3N UART 0 (UART0) */
00134   UART1_IRQn           =  9, /*  9 SAM3N UART 1 (UART1) */
00135   PIOA_IRQn            = 11, /* 11 SAM3N Parallel I/O Controller A (PIOA) */
00136   PIOB_IRQn            = 12, /* 12 SAM3N Parallel I/O Controller B (PIOB) */
00137   PIOC_IRQn            = 13, /* 13 SAM3N Parallel I/O Controller C (PIOC) */
00138   USART0_IRQn          = 14, /* 14 SAM3N USART 0 (USART0) */
00139   USART1_IRQn          = 15, /* 15 SAM3N USART 1 (USART1) */
00140   TWI0_IRQn            = 19, /* 19 SAM3N Two Wire Interface 0 (TWI0) */
00141   TWI1_IRQn            = 20, /* 20 SAM3N Two Wire Interface 1 (TWI1) */
00142   SPI_IRQn             = 21, /* 21 SAM3N Serial Peripheral Interface (SPI) */
00143   TC0_IRQn             = 23, /* 23 SAM3N Timer/Counter 0 (TC0) */
00144   TC1_IRQn             = 24, /* 24 SAM3N Timer/Counter 1 (TC1) */
00145   TC2_IRQn             = 25, /* 25 SAM3N Timer/Counter 2 (TC2) */
00146   TC3_IRQn             = 26, /* 26 SAM3N Timer/Counter 3 (TC3) */
00147   TC4_IRQn             = 27, /* 27 SAM3N Timer/Counter 4 (TC4) */
00148   TC5_IRQn             = 28, /* 28 SAM3N Timer/Counter 5 (TC5) */
00149   ADC_IRQn             = 29, /* 29 SAM3N Analog To Digital Converter (ADC) */
00150   DACC_IRQn            = 30, /* 30 SAM3N Digital To Analog Converter (DACC) */
00151   PWM_IRQn             = 31  /* 31 SAM3N Pulse Width Modulation (PWM) */
00152 } IRQn_Type;
00153
00154 /*
00155  *  Configuration of the Cortex-M3 Processor and Core Peripherals
00156  */
00157
00158 #define __MPU_PRESENT          0 /* $product does not provide a MPU */
00159 #define __NVIC_PRIO_BITS       4 /* $product uses 4 Bits for the Priority Levels */
00160 #define __Vendor_SysTickConfig 0 /* Set to 1 if different SysTick Config is used */
00161
00162
00163 /* ************************************************************************** */
00164 /*  SOFTWARE PERIPHERAL API DEFINITION FOR SAM3N */
00165 /* ************************************************************************** */
00166 /* ============================================================================= */
00167 /*  SOFTWARE API DEFINITION FOR Analog-to-digital Converter */
00168 /* ============================================================================= */
00169
00170 #ifndef __ASSEMBLY__
00171 /* Adc hardware registers */
00172 typedef struct {
00173   WoReg ADC_CR;        /*  (Adc Offset: 0x00) Control Register */
00174   RwReg ADC_MR;        /*  (Adc Offset: 0x04) Mode Register */
00175   RwReg ADC_SEQR1;     /*  (Adc Offset: 0x08) Channel Sequence Register 1 */
00176   RwReg ADC_SEQR2;     /*  (Adc Offset: 0x0C) Channel Sequence Register 2 */
00177   WoReg ADC_CHER;      /*  (Adc Offset: 0x10) Channel Enable Register */
00178   WoReg ADC_CHDR;      /*  (Adc Offset: 0x14) Channel Disable Register */
00179   RoReg ADC_CHSR;      /*  (Adc Offset: 0x18) Channel Status Register */
00180   RwReg Reserved1[1];
00181   RoReg ADC_LCDR;      /*  (Adc Offset: 0x20) Last Converted Data Register */
00182   WoReg ADC_IER;       /*  (Adc Offset: 0x24) Interrupt Enable Register */
00183   WoReg ADC_IDR;       /*  (Adc Offset: 0x28) Interrupt Disable Register */
00184   RoReg ADC_IMR;       /*  (Adc Offset: 0x2C) Interrupt Mask Register */
00185   RoReg ADC_ISR;       /*  (Adc Offset: 0x30) Interrupt Status Register */
00186   RwReg Reserved2[2];
00187   RoReg ADC_OVER;      /*  (Adc Offset: 0x3C) Overrun Status Register */
00188   RwReg ADC_EMR;       /*  (Adc Offset: 0x40) Extended Mode Register */
00189   RwReg ADC_CWR;       /*  (Adc Offset: 0x44) Compare Window Register */
00190   RwReg Reserved3[2];
00191   RoReg ADC_CDR[16];   /*  (Adc Offset: 0x50) Channel Data Register */
00192   RwReg Reserved4[21];
00193   RwReg ADC_WPMR;      /*  (Adc Offset: 0xE4) Write Protect Mode Register */
00194   RoReg ADC_WPSR;      /*  (Adc Offset: 0xE8) Write Protect Status Register */
00195   RwReg Reserved5[5];
00196   RwReg ADC_RPR;       /*  (Adc Offset: 0x100) Receive Pointer Register */
00197   RwReg ADC_RCR;       /*  (Adc Offset: 0x104) Receive Counter Register */
00198   RwReg ADC_TPR;       /*  (Adc Offset: 0x108) Transmit Pointer Register */
00199   RwReg ADC_TCR;       /*  (Adc Offset: 0x10C) Transmit Counter Register */
00200   RwReg ADC_RNPR;      /*  (Adc Offset: 0x110) Receive Next Pointer Register */
00201   RwReg ADC_RNCR;      /*  (Adc Offset: 0x114) Receive Next Counter Register */
00202   RwReg ADC_TNPR;      /*  (Adc Offset: 0x118) Transmit Next Pointer Register */
00203   RwReg ADC_TNCR;      /*  (Adc Offset: 0x11C) Transmit Next Counter Register */
00204   WoReg ADC_PTCR;      /*  (Adc Offset: 0x120) Transfer Control Register */
00205   RoReg ADC_PTSR;      /*  (Adc Offset: 0x124) Transfer Status Register */
00206 } Adc;
00207 #endif /* __ASSEMBLY__ */
00208 /* -------- ADC_CR : (ADC Offset: 0x00) Control Register -------- */
00209 #define ADC_CR_SWRST (0x1u << 0) /*  (ADC_CR) Software Reset */
00210 #define ADC_CR_START (0x1u << 1) /*  (ADC_CR) Start Conversion */
00211 /* -------- ADC_MR : (ADC Offset: 0x04) Mode Register -------- */
00212 #define ADC_MR_TRGEN (0x1u << 0) /*  (ADC_MR) Trigger Enable */
00213 #define   ADC_MR_TRGEN_DIS (0x0u << 0) /*  (ADC_MR) Hardware triggers are disabled. Starting a conversion is only possible by software. */
00214 #define   ADC_MR_TRGEN_EN (0x1u << 0) /*  (ADC_MR) Hardware trigger selected by TRGSEL field is enabled. */
00215 #define ADC_MR_TRGSEL_Pos 1
00216 #define ADC_MR_TRGSEL_Msk (0x7u << ADC_MR_TRGSEL_Pos) /*  (ADC_MR) Trigger Selection */
00217 #define   ADC_MR_TRGSEL_ADC_TRIG0 (0x0u << 1) /*  (ADC_MR) External trigger */
00218 #define   ADC_MR_TRGSEL_ADC_TRIG1 (0x1u << 1) /*  (ADC_MR) TIO Output of the Timer Counter Channel 0 */
00219 #define   ADC_MR_TRGSEL_ADC_TRIG2 (0x2u << 1) /*  (ADC_MR) TIO Output of the Timer Counter Channel 1 */
00220 #define   ADC_MR_TRGSEL_ADC_TRIG3 (0x3u << 1) /*  (ADC_MR) TIO Output of the Timer Counter Channel 2 */
00221 #define ADC_MR_LOWRES (0x1u << 4) /*  (ADC_MR) Resolution */
00222 #define   ADC_MR_LOWRES_BITS_10 (0x0u << 4) /*  (ADC_MR) 10-bit resolution */
00223 #define   ADC_MR_LOWRES_BITS_8 (0x1u << 4) /*  (ADC_MR) 8-bit resolution */
00224 #define ADC_MR_SLEEP (0x1u << 5) /*  (ADC_MR) Sleep Mode */
00225 #define   ADC_MR_SLEEP_NORMAL (0x0u << 5) /*  (ADC_MR) Normal Mode: The ADC Core and reference voltage circuitry are kept ON between conversions */
00226 #define   ADC_MR_SLEEP_SLEEP (0x1u << 5) /*  (ADC_MR) Sleep Mode: The ADC Core and reference voltage circuitry are OFF between conversions */
00227 #define ADC_MR_FWUP (0x1u << 6) /*  (ADC_MR) Fast Wake Up */
00228 #define   ADC_MR_FWUP_OFF (0x0u << 6) /*  (ADC_MR) Normal Sleep Mode: The sleep mode is defined by the SLEEP bit */
00229 #define   ADC_MR_FWUP_ON (0x1u << 6) /*  (ADC_MR) Fast Wake Up Sleep Mode: The Voltage reference is ON between conversions and ADC Core is OFF */
00230 #define ADC_MR_FREERUN (0x1u << 7) /*  (ADC_MR) Free Run Mode */
00231 #define   ADC_MR_FREERUN_OFF (0x0u << 7) /*  (ADC_MR) Normal Mode */
00232 #define   ADC_MR_FREERUN_ON (0x1u << 7) /*  (ADC_MR) Free Run Mode: Never wait for any trigger. */
00233 #define ADC_MR_PRESCAL_Pos 8
00234 #define ADC_MR_PRESCAL_Msk (0xffu << ADC_MR_PRESCAL_Pos) /*  (ADC_MR) Prescaler Rate Selection */
00235 #define ADC_MR_PRESCAL(value) ((ADC_MR_PRESCAL_Msk & ((value) << ADC_MR_PRESCAL_Pos)))
00236 #define ADC_MR_STARTUP_Pos 16
00237 #define ADC_MR_STARTUP_Msk (0xfu << ADC_MR_STARTUP_Pos) /*  (ADC_MR) Start Up Time */
00238 #define   ADC_MR_STARTUP_SUT0 (0x0u << 16) /*  (ADC_MR) 0 periods of ADCClock */
00239 #define   ADC_MR_STARTUP_SUT8 (0x1u << 16) /*  (ADC_MR) 8 periods of ADCClock */
00240 #define   ADC_MR_STARTUP_SUT16 (0x2u << 16) /*  (ADC_MR) 16 periods of ADCClock */
00241 #define   ADC_MR_STARTUP_SUT24 (0x3u << 16) /*  (ADC_MR) 24 periods of ADCClock */
00242 #define   ADC_MR_STARTUP_SUT64 (0x4u << 16) /*  (ADC_MR) 64 periods of ADCClock */
00243 #define   ADC_MR_STARTUP_SUT80 (0x5u << 16) /*  (ADC_MR) 80 periods of ADCClock */
00244 #define   ADC_MR_STARTUP_SUT96 (0x6u << 16) /*  (ADC_MR) 96 periods of ADCClock */
00245 #define   ADC_MR_STARTUP_SUT112 (0x7u << 16) /*  (ADC_MR) 112 periods of ADCClock */
00246 #define   ADC_MR_STARTUP_SUT512 (0x8u << 16) /*  (ADC_MR) 512 periods of ADCClock */
00247 #define   ADC_MR_STARTUP_SUT576 (0x9u << 16) /*  (ADC_MR) 576 periods of ADCClock */
00248 #define   ADC_MR_STARTUP_SUT640 (0xAu << 16) /*  (ADC_MR) 640 periods of ADCClock */
00249 #define   ADC_MR_STARTUP_SUT704 (0xBu << 16) /*  (ADC_MR) 704 periods of ADCClock */
00250 #define   ADC_MR_STARTUP_SUT768 (0xCu << 16) /*  (ADC_MR) 768 periods of ADCClock */
00251 #define   ADC_MR_STARTUP_SUT832 (0xDu << 16) /*  (ADC_MR) 832 periods of ADCClock */
00252 #define   ADC_MR_STARTUP_SUT896 (0xEu << 16) /*  (ADC_MR) 896 periods of ADCClock */
00253 #define   ADC_MR_STARTUP_SUT960 (0xFu << 16) /*  (ADC_MR) 960 periods of ADCClock */
00254 #define ADC_MR_TRACKTIM_Pos 24
00255 #define ADC_MR_TRACKTIM_Msk (0xfu << ADC_MR_TRACKTIM_Pos) /*  (ADC_MR) Tracking Time */
00256 #define ADC_MR_TRACKTIM(value) ((ADC_MR_TRACKTIM_Msk & ((value) << ADC_MR_TRACKTIM_Pos)))
00257 #define ADC_MR_USEQ (0x1u << 31) /*  (ADC_MR) Use Sequence Enable */
00258 #define   ADC_MR_USEQ_NUM_ORDER (0x0u << 31) /*  (ADC_MR) Normal Mode: The controller converts channels in a simple numeric order. */
00259 #define   ADC_MR_USEQ_REG_ORDER (0x1u << 31) /*  (ADC_MR) User Sequence Mode: The sequence respects what is defined in ADC_SEQR1 and ADC_SEQR2 registers. */
00260 /* -------- ADC_SEQR1 : (ADC Offset: 0x08) Channel Sequence Register 1 -------- */
00261 #define ADC_SEQR1_USCH1_Pos 0
00262 #define ADC_SEQR1_USCH1_Msk (0xfu << ADC_SEQR1_USCH1_Pos) /*  (ADC_SEQR1) User Sequence Number 1 */
00263 #define ADC_SEQR1_USCH1(value) ((ADC_SEQR1_USCH1_Msk & ((value) << ADC_SEQR1_USCH1_Pos)))
00264 #define ADC_SEQR1_USCH2_Pos 4
00265 #define ADC_SEQR1_USCH2_Msk (0xfu << ADC_SEQR1_USCH2_Pos) /*  (ADC_SEQR1) User Sequence Number 2 */
00266 #define ADC_SEQR1_USCH2(value) ((ADC_SEQR1_USCH2_Msk & ((value) << ADC_SEQR1_USCH2_Pos)))
00267 #define ADC_SEQR1_USCH3_Pos 8
00268 #define ADC_SEQR1_USCH3_Msk (0xfu << ADC_SEQR1_USCH3_Pos) /*  (ADC_SEQR1) User Sequence Number 3 */
00269 #define ADC_SEQR1_USCH3(value) ((ADC_SEQR1_USCH3_Msk & ((value) << ADC_SEQR1_USCH3_Pos)))
00270 #define ADC_SEQR1_USCH4_Pos 12
00271 #define ADC_SEQR1_USCH4_Msk (0xfu << ADC_SEQR1_USCH4_Pos) /*  (ADC_SEQR1) User Sequence Number 4 */
00272 #define ADC_SEQR1_USCH4(value) ((ADC_SEQR1_USCH4_Msk & ((value) << ADC_SEQR1_USCH4_Pos)))
00273 #define ADC_SEQR1_USCH5_Pos 16
00274 #define ADC_SEQR1_USCH5_Msk (0xfu << ADC_SEQR1_USCH5_Pos) /*  (ADC_SEQR1) User Sequence Number 5 */
00275 #define ADC_SEQR1_USCH5(value) ((ADC_SEQR1_USCH5_Msk & ((value) << ADC_SEQR1_USCH5_Pos)))
00276 #define ADC_SEQR1_USCH6_Pos 20
00277 #define ADC_SEQR1_USCH6_Msk (0xfu << ADC_SEQR1_USCH6_Pos) /*  (ADC_SEQR1) User Sequence Number 6 */
00278 #define ADC_SEQR1_USCH6(value) ((ADC_SEQR1_USCH6_Msk & ((value) << ADC_SEQR1_USCH6_Pos)))
00279 #define ADC_SEQR1_USCH7_Pos 24
00280 #define ADC_SEQR1_USCH7_Msk (0xfu << ADC_SEQR1_USCH7_Pos) /*  (ADC_SEQR1) User Sequence Number 7 */
00281 #define ADC_SEQR1_USCH7(value) ((ADC_SEQR1_USCH7_Msk & ((value) << ADC_SEQR1_USCH7_Pos)))
00282 #define ADC_SEQR1_USCH8_Pos 28
00283 #define ADC_SEQR1_USCH8_Msk (0xfu << ADC_SEQR1_USCH8_Pos) /*  (ADC_SEQR1) User Sequence Number 8 */
00284 #define ADC_SEQR1_USCH8(value) ((ADC_SEQR1_USCH8_Msk & ((value) << ADC_SEQR1_USCH8_Pos)))
00285 /* -------- ADC_SEQR2 : (ADC Offset: 0x0C) Channel Sequence Register 2 -------- */
00286 #define ADC_SEQR2_USCH9_Pos 0
00287 #define ADC_SEQR2_USCH9_Msk (0xfu << ADC_SEQR2_USCH9_Pos) /*  (ADC_SEQR2) User Sequence Number 9 */
00288 #define ADC_SEQR2_USCH9(value) ((ADC_SEQR2_USCH9_Msk & ((value) << ADC_SEQR2_USCH9_Pos)))
00289 #define ADC_SEQR2_USCH10_Pos 4
00290 #define ADC_SEQR2_USCH10_Msk (0xfu << ADC_SEQR2_USCH10_Pos) /*  (ADC_SEQR2) User Sequence Number 10 */
00291 #define ADC_SEQR2_USCH10(value) ((ADC_SEQR2_USCH10_Msk & ((value) << ADC_SEQR2_USCH10_Pos)))
00292 #define ADC_SEQR2_USCH11_Pos 8
00293 #define ADC_SEQR2_USCH11_Msk (0xfu << ADC_SEQR2_USCH11_Pos) /*  (ADC_SEQR2) User Sequence Number 11 */
00294 #define ADC_SEQR2_USCH11(value) ((ADC_SEQR2_USCH11_Msk & ((value) << ADC_SEQR2_USCH11_Pos)))
00295 #define ADC_SEQR2_USCH12_Pos 12
00296 #define ADC_SEQR2_USCH12_Msk (0xfu << ADC_SEQR2_USCH12_Pos) /*  (ADC_SEQR2) User Sequence Number 12 */
00297 #define ADC_SEQR2_USCH12(value) ((ADC_SEQR2_USCH12_Msk & ((value) << ADC_SEQR2_USCH12_Pos)))
00298 #define ADC_SEQR2_USCH13_Pos 16
00299 #define ADC_SEQR2_USCH13_Msk (0xfu << ADC_SEQR2_USCH13_Pos) /*  (ADC_SEQR2) User Sequence Number 13 */
00300 #define ADC_SEQR2_USCH13(value) ((ADC_SEQR2_USCH13_Msk & ((value) << ADC_SEQR2_USCH13_Pos)))
00301 #define ADC_SEQR2_USCH14_Pos 20
00302 #define ADC_SEQR2_USCH14_Msk (0xfu << ADC_SEQR2_USCH14_Pos) /*  (ADC_SEQR2) User Sequence Number 14 */
00303 #define ADC_SEQR2_USCH14(value) ((ADC_SEQR2_USCH14_Msk & ((value) << ADC_SEQR2_USCH14_Pos)))
00304 #define ADC_SEQR2_USCH15_Pos 24
00305 #define ADC_SEQR2_USCH15_Msk (0xfu << ADC_SEQR2_USCH15_Pos) /*  (ADC_SEQR2) User Sequence Number 15 */
00306 #define ADC_SEQR2_USCH15(value) ((ADC_SEQR2_USCH15_Msk & ((value) << ADC_SEQR2_USCH15_Pos)))
00307 #define ADC_SEQR2_USCH16_Pos 28
00308 #define ADC_SEQR2_USCH16_Msk (0xfu << ADC_SEQR2_USCH16_Pos) /*  (ADC_SEQR2) User Sequence Number 16 */
00309 #define ADC_SEQR2_USCH16(value) ((ADC_SEQR2_USCH16_Msk & ((value) << ADC_SEQR2_USCH16_Pos)))
00310 /* -------- ADC_CHER : (ADC Offset: 0x10) Channel Enable Register -------- */
00311 #define ADC_CHER_CH0 (0x1u << 0) /*  (ADC_CHER) Channel 0 Enable */
00312 #define ADC_CHER_CH1 (0x1u << 1) /*  (ADC_CHER) Channel 1 Enable */
00313 #define ADC_CHER_CH2 (0x1u << 2) /*  (ADC_CHER) Channel 2 Enable */
00314 #define ADC_CHER_CH3 (0x1u << 3) /*  (ADC_CHER) Channel 3 Enable */
00315 #define ADC_CHER_CH4 (0x1u << 4) /*  (ADC_CHER) Channel 4 Enable */
00316 #define ADC_CHER_CH5 (0x1u << 5) /*  (ADC_CHER) Channel 5 Enable */
00317 #define ADC_CHER_CH6 (0x1u << 6) /*  (ADC_CHER) Channel 6 Enable */
00318 #define ADC_CHER_CH7 (0x1u << 7) /*  (ADC_CHER) Channel 7 Enable */
00319 #define ADC_CHER_CH8 (0x1u << 8) /*  (ADC_CHER) Channel 8 Enable */
00320 #define ADC_CHER_CH9 (0x1u << 9) /*  (ADC_CHER) Channel 9 Enable */
00321 #define ADC_CHER_CH10 (0x1u << 10) /*  (ADC_CHER) Channel 10 Enable */
00322 #define ADC_CHER_CH11 (0x1u << 11) /*  (ADC_CHER) Channel 11 Enable */
00323 #define ADC_CHER_CH12 (0x1u << 12) /*  (ADC_CHER) Channel 12 Enable */
00324 #define ADC_CHER_CH13 (0x1u << 13) /*  (ADC_CHER) Channel 13 Enable */
00325 #define ADC_CHER_CH14 (0x1u << 14) /*  (ADC_CHER) Channel 14 Enable */
00326 #define ADC_CHER_CH15 (0x1u << 15) /*  (ADC_CHER) Channel 15 Enable */
00327 /* -------- ADC_CHDR : (ADC Offset: 0x14) Channel Disable Register -------- */
00328 #define ADC_CHDR_CH0 (0x1u << 0) /*  (ADC_CHDR) Channel 0 Disable */
00329 #define ADC_CHDR_CH1 (0x1u << 1) /*  (ADC_CHDR) Channel 1 Disable */
00330 #define ADC_CHDR_CH2 (0x1u << 2) /*  (ADC_CHDR) Channel 2 Disable */
00331 #define ADC_CHDR_CH3 (0x1u << 3) /*  (ADC_CHDR) Channel 3 Disable */
00332 #define ADC_CHDR_CH4 (0x1u << 4) /*  (ADC_CHDR) Channel 4 Disable */
00333 #define ADC_CHDR_CH5 (0x1u << 5) /*  (ADC_CHDR) Channel 5 Disable */
00334 #define ADC_CHDR_CH6 (0x1u << 6) /*  (ADC_CHDR) Channel 6 Disable */
00335 #define ADC_CHDR_CH7 (0x1u << 7) /*  (ADC_CHDR) Channel 7 Disable */
00336 #define ADC_CHDR_CH8 (0x1u << 8) /*  (ADC_CHDR) Channel 8 Disable */
00337 #define ADC_CHDR_CH9 (0x1u << 9) /*  (ADC_CHDR) Channel 9 Disable */
00338 #define ADC_CHDR_CH10 (0x1u << 10) /*  (ADC_CHDR) Channel 10 Disable */
00339 #define ADC_CHDR_CH11 (0x1u << 11) /*  (ADC_CHDR) Channel 11 Disable */
00340 #define ADC_CHDR_CH12 (0x1u << 12) /*  (ADC_CHDR) Channel 12 Disable */
00341 #define ADC_CHDR_CH13 (0x1u << 13) /*  (ADC_CHDR) Channel 13 Disable */
00342 #define ADC_CHDR_CH14 (0x1u << 14) /*  (ADC_CHDR) Channel 14 Disable */
00343 #define ADC_CHDR_CH15 (0x1u << 15) /*  (ADC_CHDR) Channel 15 Disable */
00344 /* -------- ADC_CHSR : (ADC Offset: 0x18) Channel Status Register -------- */
00345 #define ADC_CHSR_CH0 (0x1u << 0) /*  (ADC_CHSR) Channel 0 Status */
00346 #define ADC_CHSR_CH1 (0x1u << 1) /*  (ADC_CHSR) Channel 1 Status */
00347 #define ADC_CHSR_CH2 (0x1u << 2) /*  (ADC_CHSR) Channel 2 Status */
00348 #define ADC_CHSR_CH3 (0x1u << 3) /*  (ADC_CHSR) Channel 3 Status */
00349 #define ADC_CHSR_CH4 (0x1u << 4) /*  (ADC_CHSR) Channel 4 Status */
00350 #define ADC_CHSR_CH5 (0x1u << 5) /*  (ADC_CHSR) Channel 5 Status */
00351 #define ADC_CHSR_CH6 (0x1u << 6) /*  (ADC_CHSR) Channel 6 Status */
00352 #define ADC_CHSR_CH7 (0x1u << 7) /*  (ADC_CHSR) Channel 7 Status */
00353 #define ADC_CHSR_CH8 (0x1u << 8) /*  (ADC_CHSR) Channel 8 Status */
00354 #define ADC_CHSR_CH9 (0x1u << 9) /*  (ADC_CHSR) Channel 9 Status */
00355 #define ADC_CHSR_CH10 (0x1u << 10) /*  (ADC_CHSR) Channel 10 Status */
00356 #define ADC_CHSR_CH11 (0x1u << 11) /*  (ADC_CHSR) Channel 11 Status */
00357 #define ADC_CHSR_CH12 (0x1u << 12) /*  (ADC_CHSR) Channel 12 Status */
00358 #define ADC_CHSR_CH13 (0x1u << 13) /*  (ADC_CHSR) Channel 13 Status */
00359 #define ADC_CHSR_CH14 (0x1u << 14) /*  (ADC_CHSR) Channel 14 Status */
00360 #define ADC_CHSR_CH15 (0x1u << 15) /*  (ADC_CHSR) Channel 15 Status */
00361 /* -------- ADC_LCDR : (ADC Offset: 0x20) Last Converted Data Register -------- */
00362 #define ADC_LCDR_LDATA_Pos 0
00363 #define ADC_LCDR_LDATA_Msk (0xfffu << ADC_LCDR_LDATA_Pos) /*  (ADC_LCDR) Last Data Converted */
00364 #define ADC_LCDR_CHNB_Pos 12
00365 #define ADC_LCDR_CHNB_Msk (0xfu << ADC_LCDR_CHNB_Pos) /*  (ADC_LCDR) Channel Number */
00366 /* -------- ADC_IER : (ADC Offset: 0x24) Interrupt Enable Register -------- */
00367 #define ADC_IER_EOC0 (0x1u << 0) /*  (ADC_IER) End of Conversion Interrupt Enable 0 */
00368 #define ADC_IER_EOC1 (0x1u << 1) /*  (ADC_IER) End of Conversion Interrupt Enable 1 */
00369 #define ADC_IER_EOC2 (0x1u << 2) /*  (ADC_IER) End of Conversion Interrupt Enable 2 */
00370 #define ADC_IER_EOC3 (0x1u << 3) /*  (ADC_IER) End of Conversion Interrupt Enable 3 */
00371 #define ADC_IER_EOC4 (0x1u << 4) /*  (ADC_IER) End of Conversion Interrupt Enable 4 */
00372 #define ADC_IER_EOC5 (0x1u << 5) /*  (ADC_IER) End of Conversion Interrupt Enable 5 */
00373 #define ADC_IER_EOC6 (0x1u << 6) /*  (ADC_IER) End of Conversion Interrupt Enable 6 */
00374 #define ADC_IER_EOC7 (0x1u << 7) /*  (ADC_IER) End of Conversion Interrupt Enable 7 */
00375 #define ADC_IER_EOC8 (0x1u << 8) /*  (ADC_IER) End of Conversion Interrupt Enable 8 */
00376 #define ADC_IER_EOC9 (0x1u << 9) /*  (ADC_IER) End of Conversion Interrupt Enable 9 */
00377 #define ADC_IER_EOC10 (0x1u << 10) /*  (ADC_IER) End of Conversion Interrupt Enable 10 */
00378 #define ADC_IER_EOC11 (0x1u << 11) /*  (ADC_IER) End of Conversion Interrupt Enable 11 */
00379 #define ADC_IER_EOC12 (0x1u << 12) /*  (ADC_IER) End of Conversion Interrupt Enable 12 */
00380 #define ADC_IER_EOC13 (0x1u << 13) /*  (ADC_IER) End of Conversion Interrupt Enable 13 */
00381 #define ADC_IER_EOC14 (0x1u << 14) /*  (ADC_IER) End of Conversion Interrupt Enable 14 */
00382 #define ADC_IER_EOC15 (0x1u << 15) /*  (ADC_IER) End of Conversion Interrupt Enable 15 */
00383 #define ADC_IER_DRDY (0x1u << 24) /*  (ADC_IER) Data Ready Interrupt Enable */
00384 #define ADC_IER_GOVRE (0x1u << 25) /*  (ADC_IER) General Overrun Error Interrupt Enable */
00385 #define ADC_IER_COMPE (0x1u << 26) /*  (ADC_IER) Comparison Event Interrupt Enable */
00386 #define ADC_IER_ENDRX (0x1u << 27) /*  (ADC_IER) End of Receive Buffer Interrupt Enable */
00387 #define ADC_IER_RXBUFF (0x1u << 28) /*  (ADC_IER) Receive Buffer Full Interrupt Enable */
00388 /* -------- ADC_IDR : (ADC Offset: 0x28) Interrupt Disable Register -------- */
00389 #define ADC_IDR_EOC0 (0x1u << 0) /*  (ADC_IDR) End of Conversion Interrupt Disable 0 */
00390 #define ADC_IDR_EOC1 (0x1u << 1) /*  (ADC_IDR) End of Conversion Interrupt Disable 1 */
00391 #define ADC_IDR_EOC2 (0x1u << 2) /*  (ADC_IDR) End of Conversion Interrupt Disable 2 */
00392 #define ADC_IDR_EOC3 (0x1u << 3) /*  (ADC_IDR) End of Conversion Interrupt Disable 3 */
00393 #define ADC_IDR_EOC4 (0x1u << 4) /*  (ADC_IDR) End of Conversion Interrupt Disable 4 */
00394 #define ADC_IDR_EOC5 (0x1u << 5) /*  (ADC_IDR) End of Conversion Interrupt Disable 5 */
00395 #define ADC_IDR_EOC6 (0x1u << 6) /*  (ADC_IDR) End of Conversion Interrupt Disable 6 */
00396 #define ADC_IDR_EOC7 (0x1u << 7) /*  (ADC_IDR) End of Conversion Interrupt Disable 7 */
00397 #define ADC_IDR_EOC8 (0x1u << 8) /*  (ADC_IDR) End of Conversion Interrupt Disable 8 */
00398 #define ADC_IDR_EOC9 (0x1u << 9) /*  (ADC_IDR) End of Conversion Interrupt Disable 9 */
00399 #define ADC_IDR_EOC10 (0x1u << 10) /*  (ADC_IDR) End of Conversion Interrupt Disable 10 */
00400 #define ADC_IDR_EOC11 (0x1u << 11) /*  (ADC_IDR) End of Conversion Interrupt Disable 11 */
00401 #define ADC_IDR_EOC12 (0x1u << 12) /*  (ADC_IDR) End of Conversion Interrupt Disable 12 */
00402 #define ADC_IDR_EOC13 (0x1u << 13) /*  (ADC_IDR) End of Conversion Interrupt Disable 13 */
00403 #define ADC_IDR_EOC14 (0x1u << 14) /*  (ADC_IDR) End of Conversion Interrupt Disable 14 */
00404 #define ADC_IDR_EOC15 (0x1u << 15) /*  (ADC_IDR) End of Conversion Interrupt Disable 15 */
00405 #define ADC_IDR_DRDY (0x1u << 24) /*  (ADC_IDR) Data Ready Interrupt Disable */
00406 #define ADC_IDR_GOVRE (0x1u << 25) /*  (ADC_IDR) General Overrun Error Interrupt Disable */
00407 #define ADC_IDR_COMPE (0x1u << 26) /*  (ADC_IDR) Comparison Event Interrupt Disable */
00408 #define ADC_IDR_ENDRX (0x1u << 27) /*  (ADC_IDR) End of Receive Buffer Interrupt Disable */
00409 #define ADC_IDR_RXBUFF (0x1u << 28) /*  (ADC_IDR) Receive Buffer Full Interrupt Disable */
00410 /* -------- ADC_IMR : (ADC Offset: 0x2C) Interrupt Mask Register -------- */
00411 #define ADC_IMR_EOC0 (0x1u << 0) /*  (ADC_IMR) End of Conversion Interrupt Mask 0 */
00412 #define ADC_IMR_EOC1 (0x1u << 1) /*  (ADC_IMR) End of Conversion Interrupt Mask 1 */
00413 #define ADC_IMR_EOC2 (0x1u << 2) /*  (ADC_IMR) End of Conversion Interrupt Mask 2 */
00414 #define ADC_IMR_EOC3 (0x1u << 3) /*  (ADC_IMR) End of Conversion Interrupt Mask 3 */
00415 #define ADC_IMR_EOC4 (0x1u << 4) /*  (ADC_IMR) End of Conversion Interrupt Mask 4 */
00416 #define ADC_IMR_EOC5 (0x1u << 5) /*  (ADC_IMR) End of Conversion Interrupt Mask 5 */
00417 #define ADC_IMR_EOC6 (0x1u << 6) /*  (ADC_IMR) End of Conversion Interrupt Mask 6 */
00418 #define ADC_IMR_EOC7 (0x1u << 7) /*  (ADC_IMR) End of Conversion Interrupt Mask 7 */
00419 #define ADC_IMR_EOC8 (0x1u << 8) /*  (ADC_IMR) End of Conversion Interrupt Mask 8 */
00420 #define ADC_IMR_EOC9 (0x1u << 9) /*  (ADC_IMR) End of Conversion Interrupt Mask 9 */
00421 #define ADC_IMR_EOC10 (0x1u << 10) /*  (ADC_IMR) End of Conversion Interrupt Mask 10 */
00422 #define ADC_IMR_EOC11 (0x1u << 11) /*  (ADC_IMR) End of Conversion Interrupt Mask 11 */
00423 #define ADC_IMR_EOC12 (0x1u << 12) /*  (ADC_IMR) End of Conversion Interrupt Mask 12 */
00424 #define ADC_IMR_EOC13 (0x1u << 13) /*  (ADC_IMR) End of Conversion Interrupt Mask 13 */
00425 #define ADC_IMR_EOC14 (0x1u << 14) /*  (ADC_IMR) End of Conversion Interrupt Mask 14 */
00426 #define ADC_IMR_EOC15 (0x1u << 15) /*  (ADC_IMR) End of Conversion Interrupt Mask 15 */
00427 #define ADC_IMR_DRDY (0x1u << 24) /*  (ADC_IMR) Data Ready Interrupt Mask */
00428 #define ADC_IMR_GOVRE (0x1u << 25) /*  (ADC_IMR) General Overrun Error Interrupt Mask */
00429 #define ADC_IMR_COMPE (0x1u << 26) /*  (ADC_IMR) Comparison Event Interrupt Mask */
00430 #define ADC_IMR_ENDRX (0x1u << 27) /*  (ADC_IMR) End of Receive Buffer Interrupt Mask */
00431 #define ADC_IMR_RXBUFF (0x1u << 28) /*  (ADC_IMR) Receive Buffer Full Interrupt Mask */
00432 /* -------- ADC_ISR : (ADC Offset: 0x30) Interrupt Status Register -------- */
00433 #define ADC_ISR_EOC0 (0x1u << 0) /*  (ADC_ISR) End of Conversion 0 */
00434 #define ADC_ISR_EOC1 (0x1u << 1) /*  (ADC_ISR) End of Conversion 1 */
00435 #define ADC_ISR_EOC2 (0x1u << 2) /*  (ADC_ISR) End of Conversion 2 */
00436 #define ADC_ISR_EOC3 (0x1u << 3) /*  (ADC_ISR) End of Conversion 3 */
00437 #define ADC_ISR_EOC4 (0x1u << 4) /*  (ADC_ISR) End of Conversion 4 */
00438 #define ADC_ISR_EOC5 (0x1u << 5) /*  (ADC_ISR) End of Conversion 5 */
00439 #define ADC_ISR_EOC6 (0x1u << 6) /*  (ADC_ISR) End of Conversion 6 */
00440 #define ADC_ISR_EOC7 (0x1u << 7) /*  (ADC_ISR) End of Conversion 7 */
00441 #define ADC_ISR_EOC8 (0x1u << 8) /*  (ADC_ISR) End of Conversion 8 */
00442 #define ADC_ISR_EOC9 (0x1u << 9) /*  (ADC_ISR) End of Conversion 9 */
00443 #define ADC_ISR_EOC10 (0x1u << 10) /*  (ADC_ISR) End of Conversion 10 */
00444 #define ADC_ISR_EOC11 (0x1u << 11) /*  (ADC_ISR) End of Conversion 11 */
00445 #define ADC_ISR_EOC12 (0x1u << 12) /*  (ADC_ISR) End of Conversion 12 */
00446 #define ADC_ISR_EOC13 (0x1u << 13) /*  (ADC_ISR) End of Conversion 13 */
00447 #define ADC_ISR_EOC14 (0x1u << 14) /*  (ADC_ISR) End of Conversion 14 */
00448 #define ADC_ISR_EOC15 (0x1u << 15) /*  (ADC_ISR) End of Conversion 15 */
00449 #define ADC_ISR_DRDY (0x1u << 24) /*  (ADC_ISR) Data Ready */
00450 #define ADC_ISR_GOVRE (0x1u << 25) /*  (ADC_ISR) General Overrun Error */
00451 #define ADC_ISR_COMPE (0x1u << 26) /*  (ADC_ISR) Comparison Error */
00452 #define ADC_ISR_ENDRX (0x1u << 27) /*  (ADC_ISR) End of RX Buffer */
00453 #define ADC_ISR_RXBUFF (0x1u << 28) /*  (ADC_ISR) RX Buffer Full */
00454 /* -------- ADC_OVER : (ADC Offset: 0x3C) Overrun Status Register -------- */
00455 #define ADC_OVER_OVRE0 (0x1u << 0) /*  (ADC_OVER) Overrun Error 0 */
00456 #define ADC_OVER_OVRE1 (0x1u << 1) /*  (ADC_OVER) Overrun Error 1 */
00457 #define ADC_OVER_OVRE2 (0x1u << 2) /*  (ADC_OVER) Overrun Error 2 */
00458 #define ADC_OVER_OVRE3 (0x1u << 3) /*  (ADC_OVER) Overrun Error 3 */
00459 #define ADC_OVER_OVRE4 (0x1u << 4) /*  (ADC_OVER) Overrun Error 4 */
00460 #define ADC_OVER_OVRE5 (0x1u << 5) /*  (ADC_OVER) Overrun Error 5 */
00461 #define ADC_OVER_OVRE6 (0x1u << 6) /*  (ADC_OVER) Overrun Error 6 */
00462 #define ADC_OVER_OVRE7 (0x1u << 7) /*  (ADC_OVER) Overrun Error 7 */
00463 #define ADC_OVER_OVRE8 (0x1u << 8) /*  (ADC_OVER) Overrun Error 8 */
00464 #define ADC_OVER_OVRE9 (0x1u << 9) /*  (ADC_OVER) Overrun Error 9 */
00465 #define ADC_OVER_OVRE10 (0x1u << 10) /*  (ADC_OVER) Overrun Error 10 */
00466 #define ADC_OVER_OVRE11 (0x1u << 11) /*  (ADC_OVER) Overrun Error 11 */
00467 #define ADC_OVER_OVRE12 (0x1u << 12) /*  (ADC_OVER) Overrun Error 12 */
00468 #define ADC_OVER_OVRE13 (0x1u << 13) /*  (ADC_OVER) Overrun Error 13 */
00469 #define ADC_OVER_OVRE14 (0x1u << 14) /*  (ADC_OVER) Overrun Error 14 */
00470 #define ADC_OVER_OVRE15 (0x1u << 15) /*  (ADC_OVER) Overrun Error 15 */
00471 /* -------- ADC_EMR : (ADC Offset: 0x40) Extended Mode Register -------- */
00472 #define ADC_EMR_CMPMODE_Pos 0
00473 #define ADC_EMR_CMPMODE_Msk (0x3u << ADC_EMR_CMPMODE_Pos) /*  (ADC_EMR) Comparison Mode */
00474 #define   ADC_EMR_CMPMODE_LOW (0x0u << 0) /*  (ADC_EMR) Generates an event when the converted data is lower than the low threshold of the window. */
00475 #define   ADC_EMR_CMPMODE_HIGH (0x1u << 0) /*  (ADC_EMR) Generates an event when the converted data is higher than the high threshold of the window. */
00476 #define   ADC_EMR_CMPMODE_IN (0x2u << 0) /*  (ADC_EMR) Generates an event when the converted data is in the comparison window. */
00477 #define   ADC_EMR_CMPMODE_OUT (0x3u << 0) /*  (ADC_EMR) Generates an event when the converted data is out of the comparison window. */
00478 #define ADC_EMR_CMPSEL_Pos 4
00479 #define ADC_EMR_CMPSEL_Msk (0xfu << ADC_EMR_CMPSEL_Pos) /*  (ADC_EMR) Comparison Selected Channel */
00480 #define ADC_EMR_CMPSEL(value) ((ADC_EMR_CMPSEL_Msk & ((value) << ADC_EMR_CMPSEL_Pos)))
00481 #define ADC_EMR_CMPALL (0x1u << 9) /*  (ADC_EMR) Compare All Channels */
00482 #define ADC_EMR_TAG (0x1u << 24) /*  (ADC_EMR) TAG of ADC_LDCR register */
00483 /* -------- ADC_CWR : (ADC Offset: 0x44) Compare Window Register -------- */
00484 #define ADC_CWR_LOWTHRES_Pos 0
00485 #define ADC_CWR_LOWTHRES_Msk (0xfffu << ADC_CWR_LOWTHRES_Pos) /*  (ADC_CWR) Low Threshold */
00486 #define ADC_CWR_LOWTHRES(value) ((ADC_CWR_LOWTHRES_Msk & ((value) << ADC_CWR_LOWTHRES_Pos)))
00487 #define ADC_CWR_HIGHTHRES_Pos 16
00488 #define ADC_CWR_HIGHTHRES_Msk (0xfffu << ADC_CWR_HIGHTHRES_Pos) /*  (ADC_CWR) High Threshold */
00489 #define ADC_CWR_HIGHTHRES(value) ((ADC_CWR_HIGHTHRES_Msk & ((value) << ADC_CWR_HIGHTHRES_Pos)))
00490 /* -------- ADC_CDR[16] : (ADC Offset: 0x50) Channel Data Register -------- */
00491 #define ADC_CDR_DATA_Pos 0
00492 #define ADC_CDR_DATA_Msk (0x3ffu << ADC_CDR_DATA_Pos) /*  (ADC_CDR[16]) Converted Data */
00493 /* -------- ADC_WPMR : (ADC Offset: 0xE4) Write Protect Mode Register -------- */
00494 #define ADC_WPMR_WPEN (0x1u << 0) /*  (ADC_WPMR) Write Protect Enable */
00495 #define ADC_WPMR_WPKEY_Pos 8
00496 #define ADC_WPMR_WPKEY_Msk (0xffffffu << ADC_WPMR_WPKEY_Pos) /*  (ADC_WPMR) Write Protect KEY */
00497 #define ADC_WPMR_WPKEY(value) ((ADC_WPMR_WPKEY_Msk & ((value) << ADC_WPMR_WPKEY_Pos)))
00498 /* -------- ADC_WPSR : (ADC Offset: 0xE8) Write Protect Status Register -------- */
00499 #define ADC_WPSR_WPVS (0x1u << 0) /*  (ADC_WPSR) Write Protect Violation Status */
00500 #define ADC_WPSR_WPVSRC_Pos 8
00501 #define ADC_WPSR_WPVSRC_Msk (0xffffu << ADC_WPSR_WPVSRC_Pos) /*  (ADC_WPSR) Write Protect Violation Source */
00502 /* -------- ADC_RPR : (ADC Offset: 0x100) Receive Pointer Register -------- */
00503 #define ADC_RPR_RXPTR_Pos 0
00504 #define ADC_RPR_RXPTR_Msk (0xffffffffu << ADC_RPR_RXPTR_Pos) /*  (ADC_RPR) Receive Pointer Register */
00505 #define ADC_RPR_RXPTR(value) ((ADC_RPR_RXPTR_Msk & ((value) << ADC_RPR_RXPTR_Pos)))
00506 /* -------- ADC_RCR : (ADC Offset: 0x104) Receive Counter Register -------- */
00507 #define ADC_RCR_RXCTR_Pos 0
00508 #define ADC_RCR_RXCTR_Msk (0xffffu << ADC_RCR_RXCTR_Pos) /*  (ADC_RCR) Receive Counter Register */
00509 #define ADC_RCR_RXCTR(value) ((ADC_RCR_RXCTR_Msk & ((value) << ADC_RCR_RXCTR_Pos)))
00510 /* -------- ADC_TPR : (ADC Offset: 0x108) Transmit Pointer Register -------- */
00511 #define ADC_TPR_TXPTR_Pos 0
00512 #define ADC_TPR_TXPTR_Msk (0xffffffffu << ADC_TPR_TXPTR_Pos) /*  (ADC_TPR) Transmit Counter Register */
00513 #define ADC_TPR_TXPTR(value) ((ADC_TPR_TXPTR_Msk & ((value) << ADC_TPR_TXPTR_Pos)))
00514 /* -------- ADC_TCR : (ADC Offset: 0x10C) Transmit Counter Register -------- */
00515 #define ADC_TCR_TXCTR_Pos 0
00516 #define ADC_TCR_TXCTR_Msk (0xffffu << ADC_TCR_TXCTR_Pos) /*  (ADC_TCR) Transmit Counter Register */
00517 #define ADC_TCR_TXCTR(value) ((ADC_TCR_TXCTR_Msk & ((value) << ADC_TCR_TXCTR_Pos)))
00518 /* -------- ADC_RNPR : (ADC Offset: 0x110) Receive Next Pointer Register -------- */
00519 #define ADC_RNPR_RXNPTR_Pos 0
00520 #define ADC_RNPR_RXNPTR_Msk (0xffffffffu << ADC_RNPR_RXNPTR_Pos) /*  (ADC_RNPR) Receive Next Pointer */
00521 #define ADC_RNPR_RXNPTR(value) ((ADC_RNPR_RXNPTR_Msk & ((value) << ADC_RNPR_RXNPTR_Pos)))
00522 /* -------- ADC_RNCR : (ADC Offset: 0x114) Receive Next Counter Register -------- */
00523 #define ADC_RNCR_RXNCTR_Pos 0
00524 #define ADC_RNCR_RXNCTR_Msk (0xffffu << ADC_RNCR_RXNCTR_Pos) /*  (ADC_RNCR) Receive Next Counter */
00525 #define ADC_RNCR_RXNCTR(value) ((ADC_RNCR_RXNCTR_Msk & ((value) << ADC_RNCR_RXNCTR_Pos)))
00526 /* -------- ADC_TNPR : (ADC Offset: 0x118) Transmit Next Pointer Register -------- */
00527 #define ADC_TNPR_TXNPTR_Pos 0
00528 #define ADC_TNPR_TXNPTR_Msk (0xffffffffu << ADC_TNPR_TXNPTR_Pos) /*  (ADC_TNPR) Transmit Next Pointer */
00529 #define ADC_TNPR_TXNPTR(value) ((ADC_TNPR_TXNPTR_Msk & ((value) << ADC_TNPR_TXNPTR_Pos)))
00530 /* -------- ADC_TNCR : (ADC Offset: 0x11C) Transmit Next Counter Register -------- */
00531 #define ADC_TNCR_TXNCTR_Pos 0
00532 #define ADC_TNCR_TXNCTR_Msk (0xffffu << ADC_TNCR_TXNCTR_Pos) /*  (ADC_TNCR) Transmit Counter Next */
00533 #define ADC_TNCR_TXNCTR(value) ((ADC_TNCR_TXNCTR_Msk & ((value) << ADC_TNCR_TXNCTR_Pos)))
00534 /* -------- ADC_PTCR : (ADC Offset: 0x120) Transfer Control Register -------- */
00535 #define ADC_PTCR_RXTEN (0x1u << 0) /*  (ADC_PTCR) Receiver Transfer Enable */
00536 #define ADC_PTCR_RXTDIS (0x1u << 1) /*  (ADC_PTCR) Receiver Transfer Disable */
00537 #define ADC_PTCR_TXTEN (0x1u << 8) /*  (ADC_PTCR) Transmitter Transfer Enable */
00538 #define ADC_PTCR_TXTDIS (0x1u << 9) /*  (ADC_PTCR) Transmitter Transfer Disable */
00539 /* -------- ADC_PTSR : (ADC Offset: 0x124) Transfer Status Register -------- */
00540 #define ADC_PTSR_RXTEN (0x1u << 0) /*  (ADC_PTSR) Receiver Transfer Enable */
00541 #define ADC_PTSR_TXTEN (0x1u << 8) /*  (ADC_PTSR) Transmitter Transfer Enable */
00542
00543
00544 /* ============================================================================= */
00545 /*  SOFTWARE API DEFINITION FOR Chip Identifier */
00546 /* ============================================================================= */
00547
00548 #ifndef __ASSEMBLY__
00549 /* Chipid hardware registers */
00550 typedef struct {
00551   RoReg CHIPID_CIDR; /*  (Chipid Offset: 0x0) Chip ID Register */
00552   RoReg CHIPID_EXID; /*  (Chipid Offset: 0x4) Chip ID Extension Register */
00553 } Chipid;
00554 #endif /* __ASSEMBLY__ */
00555 /* -------- CHIPID_CIDR : (CHIPID Offset: 0x0) Chip ID Register -------- */
00556 #define CHIPID_CIDR_VERSION_Pos 0
00557 #define CHIPID_CIDR_VERSION_Msk (0x1fu << CHIPID_CIDR_VERSION_Pos) /*  (CHIPID_CIDR) Version of the Device */
00558 #define CHIPID_CIDR_EPROC_Pos 5
00559 #define CHIPID_CIDR_EPROC_Msk (0x7u << CHIPID_CIDR_EPROC_Pos) /*  (CHIPID_CIDR) Embedded Processor */
00560 #define   CHIPID_CIDR_EPROC_ARM946ES (0x1u << 5) /*  (CHIPID_CIDR) ARM946ES */
00561 #define   CHIPID_CIDR_EPROC_ARM7TDMI (0x2u << 5) /*  (CHIPID_CIDR) ARM7TDMI */
00562 #define   CHIPID_CIDR_EPROC_CM3 (0x3u << 5) /*  (CHIPID_CIDR) Cortex-M3 */
00563 #define   CHIPID_CIDR_EPROC_ARM920T (0x4u << 5) /*  (CHIPID_CIDR) ARM920T */
00564 #define   CHIPID_CIDR_EPROC_ARM926EJS (0x5u << 5) /*  (CHIPID_CIDR) ARM926EJS */
00565 #define   CHIPID_CIDR_EPROC_CA5 (0x6u << 5) /*  (CHIPID_CIDR) Cortex-A5 */
00566 #define CHIPID_CIDR_NVPSIZ_Pos 8
00567 #define CHIPID_CIDR_NVPSIZ_Msk (0xfu << CHIPID_CIDR_NVPSIZ_Pos) /*  (CHIPID_CIDR) Nonvolatile Program Memory Size */
00568 #define   CHIPID_CIDR_NVPSIZ_NONE (0x0u << 8) /*  (CHIPID_CIDR) None */
00569 #define   CHIPID_CIDR_NVPSIZ_8K (0x1u << 8) /*  (CHIPID_CIDR) 8K bytes */
00570 #define   CHIPID_CIDR_NVPSIZ_16K (0x2u << 8) /*  (CHIPID_CIDR) 16K bytes */
00571 #define   CHIPID_CIDR_NVPSIZ_32K (0x3u << 8) /*  (CHIPID_CIDR) 32K bytes */
00572 #define   CHIPID_CIDR_NVPSIZ_64K (0x5u << 8) /*  (CHIPID_CIDR) 64K bytes */
00573 #define   CHIPID_CIDR_NVPSIZ_128K (0x7u << 8) /*  (CHIPID_CIDR) 128K bytes */
00574 #define   CHIPID_CIDR_NVPSIZ_256K (0x9u << 8) /*  (CHIPID_CIDR) 256K bytes */
00575 #define   CHIPID_CIDR_NVPSIZ_512K (0xAu << 8) /*  (CHIPID_CIDR) 512K bytes */
00576 #define   CHIPID_CIDR_NVPSIZ_1024K (0xCu << 8) /*  (CHIPID_CIDR) 1024K bytes */
00577 #define   CHIPID_CIDR_NVPSIZ_2048K (0xEu << 8) /*  (CHIPID_CIDR) 2048K bytes */
00578 #define CHIPID_CIDR_NVPSIZ2_Pos 12
00579 #define CHIPID_CIDR_NVPSIZ2_Msk (0xfu << CHIPID_CIDR_NVPSIZ2_Pos) /*  (CHIPID_CIDR)  */
00580 #define   CHIPID_CIDR_NVPSIZ2_NONE (0x0u << 12) /*  (CHIPID_CIDR) None */
00581 #define   CHIPID_CIDR_NVPSIZ2_8K (0x1u << 12) /*  (CHIPID_CIDR) 8K bytes */
00582 #define   CHIPID_CIDR_NVPSIZ2_16K (0x2u << 12) /*  (CHIPID_CIDR) 16K bytes */
00583 #define   CHIPID_CIDR_NVPSIZ2_32K (0x3u << 12) /*  (CHIPID_CIDR) 32K bytes */
00584 #define   CHIPID_CIDR_NVPSIZ2_64K (0x5u << 12) /*  (CHIPID_CIDR) 64K bytes */
00585 #define   CHIPID_CIDR_NVPSIZ2_128K (0x7u << 12) /*  (CHIPID_CIDR) 128K bytes */
00586 #define   CHIPID_CIDR_NVPSIZ2_256K (0x9u << 12) /*  (CHIPID_CIDR) 256K bytes */
00587 #define   CHIPID_CIDR_NVPSIZ2_512K (0xAu << 12) /*  (CHIPID_CIDR) 512K bytes */
00588 #define   CHIPID_CIDR_NVPSIZ2_1024K (0xCu << 12) /*  (CHIPID_CIDR) 1024K bytes */
00589 #define   CHIPID_CIDR_NVPSIZ2_2048K (0xEu << 12) /*  (CHIPID_CIDR) 2048K bytes */
00590 #define CHIPID_CIDR_SRAMSIZ_Pos 16
00591 #define CHIPID_CIDR_SRAMSIZ_Msk (0xfu << CHIPID_CIDR_SRAMSIZ_Pos) /*  (CHIPID_CIDR) Internal SRAM Size */
00592 #define   CHIPID_CIDR_SRAMSIZ_48K (0x0u << 16) /*  (CHIPID_CIDR) 48K bytes */
00593 #define   CHIPID_CIDR_SRAMSIZ_1K (0x1u << 16) /*  (CHIPID_CIDR) 1K bytes */
00594 #define   CHIPID_CIDR_SRAMSIZ_2K (0x2u << 16) /*  (CHIPID_CIDR) 2K bytes */
00595 #define   CHIPID_CIDR_SRAMSIZ_6K (0x3u << 16) /*  (CHIPID_CIDR) 6K bytes */
00596 #define   CHIPID_CIDR_SRAMSIZ_112K (0x4u << 16) /*  (CHIPID_CIDR) 112K bytes */
00597 #define   CHIPID_CIDR_SRAMSIZ_4K (0x5u << 16) /*  (CHIPID_CIDR) 4K bytes */
00598 #define   CHIPID_CIDR_SRAMSIZ_80K (0x6u << 16) /*  (CHIPID_CIDR) 80K bytes */
00599 #define   CHIPID_CIDR_SRAMSIZ_160K (0x7u << 16) /*  (CHIPID_CIDR) 160K bytes */
00600 #define   CHIPID_CIDR_SRAMSIZ_8K (0x8u << 16) /*  (CHIPID_CIDR) 8K bytes */
00601 #define   CHIPID_CIDR_SRAMSIZ_16K (0x9u << 16) /*  (CHIPID_CIDR) 16K bytes */
00602 #define   CHIPID_CIDR_SRAMSIZ_32K (0xAu << 16) /*  (CHIPID_CIDR) 32K bytes */
00603 #define   CHIPID_CIDR_SRAMSIZ_64K (0xBu << 16) /*  (CHIPID_CIDR) 64K bytes */
00604 #define   CHIPID_CIDR_SRAMSIZ_128K (0xCu << 16) /*  (CHIPID_CIDR) 128K bytes */
00605 #define   CHIPID_CIDR_SRAMSIZ_256K (0xDu << 16) /*  (CHIPID_CIDR) 256K bytes */
00606 #define   CHIPID_CIDR_SRAMSIZ_96K (0xEu << 16) /*  (CHIPID_CIDR) 96K bytes */
00607 #define   CHIPID_CIDR_SRAMSIZ_512K (0xFu << 16) /*  (CHIPID_CIDR) 512K bytes */
00608 #define CHIPID_CIDR_ARCH_Pos 20
00609 #define CHIPID_CIDR_ARCH_Msk (0xffu << CHIPID_CIDR_ARCH_Pos) /*  (CHIPID_CIDR) Architecture Identifier */
00610 #define   CHIPID_CIDR_ARCH_AT91SAM9xx (0x19u << 20) /*  (CHIPID_CIDR) AT91SAM9xx Series */
00611 #define   CHIPID_CIDR_ARCH_AT91SAM9XExx (0x29u << 20) /*  (CHIPID_CIDR) AT91SAM9XExx Series */
00612 #define   CHIPID_CIDR_ARCH_AT91x34 (0x34u << 20) /*  (CHIPID_CIDR) AT91x34 Series */
00613 #define   CHIPID_CIDR_ARCH_CAP7 (0x37u << 20) /*  (CHIPID_CIDR) CAP7 Series */
00614 #define   CHIPID_CIDR_ARCH_CAP9 (0x39u << 20) /*  (CHIPID_CIDR) CAP9 Series */
00615 #define   CHIPID_CIDR_ARCH_CAP11 (0x3Bu << 20) /*  (CHIPID_CIDR) CAP11 Series */
00616 #define   CHIPID_CIDR_ARCH_AT91x40 (0x40u << 20) /*  (CHIPID_CIDR) AT91x40 Series */
00617 #define   CHIPID_CIDR_ARCH_AT91x42 (0x42u << 20) /*  (CHIPID_CIDR) AT91x42 Series */
00618 #define   CHIPID_CIDR_ARCH_AT91x55 (0x55u << 20) /*  (CHIPID_CIDR) AT91x55 Series */
00619 #define   CHIPID_CIDR_ARCH_AT91SAM7Axx (0x60u << 20) /*  (CHIPID_CIDR) AT91SAM7Axx Series */
00620 #define   CHIPID_CIDR_ARCH_AT91SAM7AQxx (0x61u << 20) /*  (CHIPID_CIDR) AT91SAM7AQxx Series */
00621 #define   CHIPID_CIDR_ARCH_AT91x63 (0x63u << 20) /*  (CHIPID_CIDR) AT91x63 Series */
00622 #define   CHIPID_CIDR_ARCH_AT91SAM7Sxx (0x70u << 20) /*  (CHIPID_CIDR) AT91SAM7Sxx Series */
00623 #define   CHIPID_CIDR_ARCH_AT91SAM7XCxx (0x71u << 20) /*  (CHIPID_CIDR) AT91SAM7XCxx Series */
00624 #define   CHIPID_CIDR_ARCH_AT91SAM7SExx (0x72u << 20) /*  (CHIPID_CIDR) AT91SAM7SExx Series */
00625 #define   CHIPID_CIDR_ARCH_AT91SAM7Lxx (0x73u << 20) /*  (CHIPID_CIDR) AT91SAM7Lxx Series */
00626 #define   CHIPID_CIDR_ARCH_AT91SAM7Xxx (0x75u << 20) /*  (CHIPID_CIDR) AT91SAM7Xxx Series */
00627 #define   CHIPID_CIDR_ARCH_AT91SAM7SLxx (0x76u << 20) /*  (CHIPID_CIDR) AT91SAM7SLxx Series */
00628 #define   CHIPID_CIDR_ARCH_SAM3UxC (0x80u << 20) /*  (CHIPID_CIDR) SAM3UxC Series (100-pin version) */
00629 #define   CHIPID_CIDR_ARCH_SAM3UxE (0x81u << 20) /*  (CHIPID_CIDR) SAM3UxE Series (144-pin version) */
00630 #define   CHIPID_CIDR_ARCH_SAM3AxC (0x83u << 20) /*  (CHIPID_CIDR) SAM3AxC Series (100-pin version) */
00631 #define   CHIPID_CIDR_ARCH_SAM3XxC (0x84u << 20) /*  (CHIPID_CIDR) SAM3XxC Series (100-pin version) */
00632 #define   CHIPID_CIDR_ARCH_SAM3XxE (0x85u << 20) /*  (CHIPID_CIDR) SAM3XxE Series (144-pin version) */
00633 #define   CHIPID_CIDR_ARCH_SAM3XxG (0x86u << 20) /*  (CHIPID_CIDR) SAM3XxG Series (208/217-pin version) */
00634 #define   CHIPID_CIDR_ARCH_SAM3SxA (0x88u << 20) /*  (CHIPID_CIDR) SAM3SxA Series (48-pin version) */
00635 #define   CHIPID_CIDR_ARCH_SAM3SxB (0x89u << 20) /*  (CHIPID_CIDR) SAM3SxB Series (64-pin version) */
00636 #define   CHIPID_CIDR_ARCH_SAM3SxC (0x8Au << 20) /*  (CHIPID_CIDR) SAM3SxC Series (100-pin version) */
00637 #define   CHIPID_CIDR_ARCH_AT91x92 (0x92u << 20) /*  (CHIPID_CIDR) AT91x92 Series */
00638 #define   CHIPID_CIDR_ARCH_SAM3NxA (0x93u << 20) /*  (CHIPID_CIDR) SAM3NxA Series (48-pin version) */
00639 #define   CHIPID_CIDR_ARCH_SAM3NxB (0x94u << 20) /*  (CHIPID_CIDR) SAM3NxB Series (64-pin version) */
00640 #define   CHIPID_CIDR_ARCH_SAM3NxC (0x95u << 20) /*  (CHIPID_CIDR) SAM3NxC Series (100-pin version) */
00641 #define   CHIPID_CIDR_ARCH_SAM3SDxA (0x98u << 20) /*  (CHIPID_CIDR) SAM3SDxA Series (48-pin version) */
00642 #define   CHIPID_CIDR_ARCH_SAM3SDxB (0x99u << 20) /*  (CHIPID_CIDR) SAM3SDxB Series (64-pin version) */
00643 #define   CHIPID_CIDR_ARCH_SAM3SDxC (0x9Au << 20) /*  (CHIPID_CIDR) SAM3SDxC Series (100-pin version) */
00644 #define   CHIPID_CIDR_ARCH_SAM5A (0xA5u << 20) /*  (CHIPID_CIDR) SAM5A */
00645 #define   CHIPID_CIDR_ARCH_AT75Cxx (0xF0u << 20) /*  (CHIPID_CIDR) AT75Cxx Series */
00646 #define CHIPID_CIDR_NVPTYP_Pos 28
00647 #define CHIPID_CIDR_NVPTYP_Msk (0x7u << CHIPID_CIDR_NVPTYP_Pos) /*  (CHIPID_CIDR) Nonvolatile Program Memory Type */
00648 #define   CHIPID_CIDR_NVPTYP_ROM (0x0u << 28) /*  (CHIPID_CIDR) ROM */
00649 #define   CHIPID_CIDR_NVPTYP_ROMLESS (0x1u << 28) /*  (CHIPID_CIDR) ROMless or on-chip Flash */
00650 #define   CHIPID_CIDR_NVPTYP_FLASH (0x2u << 28) /*  (CHIPID_CIDR) Embedded Flash Memory */
00651 #define   CHIPID_CIDR_NVPTYP_ROM_FLASH (0x3u << 28) /*  (CHIPID_CIDR) ROM and Embedded Flash MemoryNVPSIZ is ROM size NVPSIZ2 is Flash size */
00652 #define   CHIPID_CIDR_NVPTYP_SRAM (0x4u << 28) /*  (CHIPID_CIDR) SRAM emulating ROM */
00653 #define CHIPID_CIDR_EXT (0x1u << 31) /*  (CHIPID_CIDR) Extension Flag */
00654 /* -------- CHIPID_EXID : (CHIPID Offset: 0x4) Chip ID Extension Register -------- */
00655 #define CHIPID_EXID_EXID_Pos 0
00656 #define CHIPID_EXID_EXID_Msk (0xffffffffu << CHIPID_EXID_EXID_Pos) /*  (CHIPID_EXID) Chip ID Extension */
00657
00658
00659 /* ============================================================================= */
00660 /*  SOFTWARE API DEFINITION FOR Digital-to-Analog Converter Controller */
00661 /* ============================================================================= */
00662
00663 #ifndef __ASSEMBLY__
00664 /* Dacc hardware registers */
00665 typedef struct {
00666   WoReg DACC_CR;       /*  (Dacc Offset: 0x00) Control Register */
00667   RwReg DACC_MR;       /*  (Dacc Offset: 0x04) Mode Register */
00668   WoReg DACC_CDR;      /*  (Dacc Offset: 0x08) Conversion Data Register */
00669   WoReg DACC_IER;      /*  (Dacc Offset: 0x0C) Interrupt Enable Register */
00670   WoReg DACC_IDR;      /*  (Dacc Offset: 0x10) Interrupt Disable Register */
00671   RoReg DACC_IMR;      /*  (Dacc Offset: 0x14) Interrupt Mask Register */
00672   RoReg DACC_ISR;      /*  (Dacc Offset: 0x18) Interrupt Status Register */
00673   RwReg Reserved1[50];
00674   RwReg DACC_WPMR;     /*  (Dacc Offset: 0xE4) Write Protect Mode Register */
00675   RoReg DACC_WPSR;     /*  (Dacc Offset: 0xE8) Write Protect Status Register */
00676   RwReg Reserved2[5];
00677   RwReg DACC_RPR;      /*  (Dacc Offset: 0x100) Receive Pointer Register */
00678   RwReg DACC_RCR;      /*  (Dacc Offset: 0x104) Receive Counter Register */
00679   RwReg DACC_TPR;      /*  (Dacc Offset: 0x108) Transmit Pointer Register */
00680   RwReg DACC_TCR;      /*  (Dacc Offset: 0x10C) Transmit Counter Register */
00681   RwReg DACC_RNPR;     /*  (Dacc Offset: 0x110) Receive Next Pointer Register */
00682   RwReg DACC_RNCR;     /*  (Dacc Offset: 0x114) Receive Next Counter Register */
00683   RwReg DACC_TNPR;     /*  (Dacc Offset: 0x118) Transmit Next Pointer Register */
00684   RwReg DACC_TNCR;     /*  (Dacc Offset: 0x11C) Transmit Next Counter Register */
00685   WoReg DACC_PTCR;     /*  (Dacc Offset: 0x120) Transfer Control Register */
00686   RoReg DACC_PTSR;     /*  (Dacc Offset: 0x124) Transfer Status Register */
00687 } Dacc;
00688 #endif /* __ASSEMBLY__ */
00689 /* -------- DACC_CR : (DACC Offset: 0x00) Control Register -------- */
00690 #define DACC_CR_SWRST (0x1u << 0) /*  (DACC_CR) Software Reset */
00691 /* -------- DACC_MR : (DACC Offset: 0x04) Mode Register -------- */
00692 #define DACC_MR_TRGEN (0x1u << 0) /*  (DACC_MR) Trigger Enable */
00693 #define   DACC_MR_TRGEN_DIS (0x0u << 0) /*  (DACC_MR) External trigger mode disabled. DACC in free running mode. */
00694 #define   DACC_MR_TRGEN_EN (0x1u << 0) /*  (DACC_MR) External trigger mode enabled. */
00695 #define DACC_MR_TRGSEL_Pos 1
00696 #define DACC_MR_TRGSEL_Msk (0x7u << DACC_MR_TRGSEL_Pos) /*  (DACC_MR) Trigger Selection */
00697 #define   DACC_MR_TRGSEL_TRGSEL0 (0x0u << 1) /*  (DACC_MR) External trigger */
00698 #define   DACC_MR_TRGSEL_TRGSEL1 (0x1u << 1) /*  (DACC_MR) TIO Output of the Timer Counter Channel 0 */
00699 #define   DACC_MR_TRGSEL_TRGSEL2 (0x2u << 1) /*  (DACC_MR) TIO Output of the Timer Counter Channel 1 */
00700 #define   DACC_MR_TRGSEL_TRGSEL3 (0x3u << 1) /*  (DACC_MR) TIO Output of the Timer Counter Channel 2 */
00701 #define DACC_MR_DACEN (0x1u << 4) /*  (DACC_MR) DAC enable */
00702 #define DACC_MR_WORD (0x1u << 5) /*  (DACC_MR) Word Transfer */
00703 #define   DACC_MR_WORD_HALF (0x0u << 5) /*  (DACC_MR) Half-Word transfer */
00704 #define   DACC_MR_WORD_WORD (0x1u << 5) /*  (DACC_MR) Word Transfer */
00705 #define DACC_MR_STARTUP_Pos 8
00706 #define DACC_MR_STARTUP_Msk (0xffu << DACC_MR_STARTUP_Pos) /*  (DACC_MR) Startup Time Selection */
00707 #define DACC_MR_STARTUP(value) ((DACC_MR_STARTUP_Msk & ((value) << DACC_MR_STARTUP_Pos)))
00708 #define DACC_MR_CLKDIV_Pos 16
00709 #define DACC_MR_CLKDIV_Msk (0xffffu << DACC_MR_CLKDIV_Pos) /*  (DACC_MR) DAC Clock Divider for Internal Trigger */
00710 #define DACC_MR_CLKDIV(value) ((DACC_MR_CLKDIV_Msk & ((value) << DACC_MR_CLKDIV_Pos)))
00711 /* -------- DACC_CDR : (DACC Offset: 0x08) Conversion Data Register -------- */
00712 #define DACC_CDR_DATA_Pos 0
00713 #define DACC_CDR_DATA_Msk (0xffffffffu << DACC_CDR_DATA_Pos) /*  (DACC_CDR) Data to Convert */
00714 #define DACC_CDR_DATA(value) ((DACC_CDR_DATA_Msk & ((value) << DACC_CDR_DATA_Pos)))
00715 /* -------- DACC_IER : (DACC Offset: 0x0C) Interrupt Enable Register -------- */
00716 #define DACC_IER_TXRDY (0x1u << 0) /*  (DACC_IER) Transmission Ready Interrupt Enable */
00717 #define DACC_IER_ENDTX (0x1u << 1) /*  (DACC_IER) End of PDC Interrupt Enable */
00718 #define DACC_IER_TXBUFE (0x1u << 2) /*  (DACC_IER) Buffer Empty Interrupt Enable */
00719 /* -------- DACC_IDR : (DACC Offset: 0x10) Interrupt Disable Register -------- */
00720 #define DACC_IDR_TXRDY (0x1u << 0) /*  (DACC_IDR) Transmission Ready Interrupt Disable */
00721 #define DACC_IDR_ENDTX (0x1u << 1) /*  (DACC_IDR) End of PDC Interrupt Disable */
00722 #define DACC_IDR_TXBUFE (0x1u << 2) /*  (DACC_IDR) Buffer Empty Interrupt Disable */
00723 /* -------- DACC_IMR : (DACC Offset: 0x14) Interrupt Mask Register -------- */
00724 #define DACC_IMR_TXRDY (0x1u << 0) /*  (DACC_IMR) Transmission Ready Interrupt Mask */
00725 #define DACC_IMR_ENDTX (0x1u << 1) /*  (DACC_IMR) End of PDC Interrupt Mask */
00726 #define DACC_IMR_TXBUFE (0x1u << 2) /*  (DACC_IMR) Buffer Empty Interrupt Mask */
00727 /* -------- DACC_ISR : (DACC Offset: 0x18) Interrupt Status Register -------- */
00728 #define DACC_ISR_TXRDY (0x1u << 0) /*  (DACC_ISR) Transmission Ready Interrupt Flag */
00729 #define DACC_ISR_ENDTX (0x1u << 1) /*  (DACC_ISR) End of PDC Interrupt Flag */
00730 #define DACC_ISR_TXBUFE (0x1u << 2) /*  (DACC_ISR) Buffer Empty Interrupt Flag */
00731 /* -------- DACC_WPMR : (DACC Offset: 0xE4) Write Protect Mode Register -------- */
00732 #define DACC_WPMR_WPEN (0x1u << 0) /*  (DACC_WPMR) Write Protect Enable */
00733 #define DACC_WPMR_WPKEY_Pos 8
00734 #define DACC_WPMR_WPKEY_Msk (0xffffffu << DACC_WPMR_WPKEY_Pos) /*  (DACC_WPMR) Write Protect KEY */
00735 #define DACC_WPMR_WPKEY(value) ((DACC_WPMR_WPKEY_Msk & ((value) << DACC_WPMR_WPKEY_Pos)))
00736 /* -------- DACC_WPSR : (DACC Offset: 0xE8) Write Protect Status Register -------- */
00737 #define DACC_WPSR_WPROTERR (0x1u << 0) /*  (DACC_WPSR) Write protection error */
00738 #define DACC_WPSR_WPROTADDR_Pos 8
00739 #define DACC_WPSR_WPROTADDR_Msk (0xffu << DACC_WPSR_WPROTADDR_Pos) /*  (DACC_WPSR) Write protection error address */
00740 /* -------- DACC_RPR : (DACC Offset: 0x100) Receive Pointer Register -------- */
00741 #define DACC_RPR_RXPTR_Pos 0
00742 #define DACC_RPR_RXPTR_Msk (0xffffffffu << DACC_RPR_RXPTR_Pos) /*  (DACC_RPR) Receive Pointer Register */
00743 #define DACC_RPR_RXPTR(value) ((DACC_RPR_RXPTR_Msk & ((value) << DACC_RPR_RXPTR_Pos)))
00744 /* -------- DACC_RCR : (DACC Offset: 0x104) Receive Counter Register -------- */
00745 #define DACC_RCR_RXCTR_Pos 0
00746 #define DACC_RCR_RXCTR_Msk (0xffffu << DACC_RCR_RXCTR_Pos) /*  (DACC_RCR) Receive Counter Register */
00747 #define DACC_RCR_RXCTR(value) ((DACC_RCR_RXCTR_Msk & ((value) << DACC_RCR_RXCTR_Pos)))
00748 /* -------- DACC_TPR : (DACC Offset: 0x108) Transmit Pointer Register -------- */
00749 #define DACC_TPR_TXPTR_Pos 0
00750 #define DACC_TPR_TXPTR_Msk (0xffffffffu << DACC_TPR_TXPTR_Pos) /*  (DACC_TPR) Transmit Counter Register */
00751 #define DACC_TPR_TXPTR(value) ((DACC_TPR_TXPTR_Msk & ((value) << DACC_TPR_TXPTR_Pos)))
00752 /* -------- DACC_TCR : (DACC Offset: 0x10C) Transmit Counter Register -------- */
00753 #define DACC_TCR_TXCTR_Pos 0
00754 #define DACC_TCR_TXCTR_Msk (0xffffu << DACC_TCR_TXCTR_Pos) /*  (DACC_TCR) Transmit Counter Register */
00755 #define DACC_TCR_TXCTR(value) ((DACC_TCR_TXCTR_Msk & ((value) << DACC_TCR_TXCTR_Pos)))
00756 /* -------- DACC_RNPR : (DACC Offset: 0x110) Receive Next Pointer Register -------- */
00757 #define DACC_RNPR_RXNPTR_Pos 0
00758 #define DACC_RNPR_RXNPTR_Msk (0xffffffffu << DACC_RNPR_RXNPTR_Pos) /*  (DACC_RNPR) Receive Next Pointer */
00759 #define DACC_RNPR_RXNPTR(value) ((DACC_RNPR_RXNPTR_Msk & ((value) << DACC_RNPR_RXNPTR_Pos)))
00760 /* -------- DACC_RNCR : (DACC Offset: 0x114) Receive Next Counter Register -------- */
00761 #define DACC_RNCR_RXNCTR_Pos 0
00762 #define DACC_RNCR_RXNCTR_Msk (0xffffu << DACC_RNCR_RXNCTR_Pos) /*  (DACC_RNCR) Receive Next Counter */
00763 #define DACC_RNCR_RXNCTR(value) ((DACC_RNCR_RXNCTR_Msk & ((value) << DACC_RNCR_RXNCTR_Pos)))
00764 /* -------- DACC_TNPR : (DACC Offset: 0x118) Transmit Next Pointer Register -------- */
00765 #define DACC_TNPR_TXNPTR_Pos 0
00766 #define DACC_TNPR_TXNPTR_Msk (0xffffffffu << DACC_TNPR_TXNPTR_Pos) /*  (DACC_TNPR) Transmit Next Pointer */
00767 #define DACC_TNPR_TXNPTR(value) ((DACC_TNPR_TXNPTR_Msk & ((value) << DACC_TNPR_TXNPTR_Pos)))
00768 /* -------- DACC_TNCR : (DACC Offset: 0x11C) Transmit Next Counter Register -------- */
00769 #define DACC_TNCR_TXNCTR_Pos 0
00770 #define DACC_TNCR_TXNCTR_Msk (0xffffu << DACC_TNCR_TXNCTR_Pos) /*  (DACC_TNCR) Transmit Counter Next */
00771 #define DACC_TNCR_TXNCTR(value) ((DACC_TNCR_TXNCTR_Msk & ((value) << DACC_TNCR_TXNCTR_Pos)))
00772 /* -------- DACC_PTCR : (DACC Offset: 0x120) Transfer Control Register -------- */
00773 #define DACC_PTCR_RXTEN (0x1u << 0) /*  (DACC_PTCR) Receiver Transfer Enable */
00774 #define DACC_PTCR_RXTDIS (0x1u << 1) /*  (DACC_PTCR) Receiver Transfer Disable */
00775 #define DACC_PTCR_TXTEN (0x1u << 8) /*  (DACC_PTCR) Transmitter Transfer Enable */
00776 #define DACC_PTCR_TXTDIS (0x1u << 9) /*  (DACC_PTCR) Transmitter Transfer Disable */
00777 /* -------- DACC_PTSR : (DACC Offset: 0x124) Transfer Status Register -------- */
00778 #define DACC_PTSR_RXTEN (0x1u << 0) /*  (DACC_PTSR) Receiver Transfer Enable */
00779 #define DACC_PTSR_TXTEN (0x1u << 8) /*  (DACC_PTSR) Transmitter Transfer Enable */
00780
00781
00782
00783 /* ============================================================================= */
00784 /*  SOFTWARE API DEFINITION FOR General Purpose Backup Register */
00785 /* ============================================================================= */
00786
00787 #ifndef __ASSEMBLY__
00788 /* Gpbr hardware registers */
00789 typedef struct {
00790   RwReg SYS_GPBR0; /*  (Gpbr Offset: 0x0) General Purpose Backup Register 0 */
00791   RwReg SYS_GPBR1; /*  (Gpbr Offset: 0x4) General Purpose Backup Register 1 */
00792   RwReg SYS_GPBR2; /*  (Gpbr Offset: 0x8) General Purpose Backup Register 2 */
00793   RwReg SYS_GPBR3; /*  (Gpbr Offset: 0xC) General Purpose Backup Register 3 */
00794   RwReg SYS_GPBR4; /*  (Gpbr Offset: 0x10) General Purpose Backup Register 4 */
00795   RwReg SYS_GPBR5; /*  (Gpbr Offset: 0x14) General Purpose Backup Register 5 */
00796   RwReg SYS_GPBR6; /*  (Gpbr Offset: 0x18) General Purpose Backup Register 6 */
00797   RwReg SYS_GPBR7; /*  (Gpbr Offset: 0x1C) General Purpose Backup Register 7 */
00798 } Gpbr;
00799 #endif /* __ASSEMBLY__ */
00800 /* -------- SYS_GPBR0 : (GPBR Offset: 0x0) General Purpose Backup Register 0 -------- */
00801 #define SYS_GPBR0_GPBR_VALUE0_Pos 0
00802 #define SYS_GPBR0_GPBR_VALUE0_Msk (0xffffffffu << SYS_GPBR0_GPBR_VALUE0_Pos) /*  (SYS_GPBR0) Value of GPBR x */
00803 #define SYS_GPBR0_GPBR_VALUE0(value) ((SYS_GPBR0_GPBR_VALUE0_Msk & ((value) << SYS_GPBR0_GPBR_VALUE0_Pos)))
00804 /* -------- SYS_GPBR1 : (GPBR Offset: 0x4) General Purpose Backup Register 1 -------- */
00805 #define SYS_GPBR1_GPBR_VALUE1_Pos 0
00806 #define SYS_GPBR1_GPBR_VALUE1_Msk (0xffffffffu << SYS_GPBR1_GPBR_VALUE1_Pos) /*  (SYS_GPBR1) Value of GPBR x */
00807 #define SYS_GPBR1_GPBR_VALUE1(value) ((SYS_GPBR1_GPBR_VALUE1_Msk & ((value) << SYS_GPBR1_GPBR_VALUE1_Pos)))
00808 /* -------- SYS_GPBR2 : (GPBR Offset: 0x8) General Purpose Backup Register 2 -------- */
00809 #define SYS_GPBR2_GPBR_VALUE2_Pos 0
00810 #define SYS_GPBR2_GPBR_VALUE2_Msk (0xffffffffu << SYS_GPBR2_GPBR_VALUE2_Pos) /*  (SYS_GPBR2) Value of GPBR x */
00811 #define SYS_GPBR2_GPBR_VALUE2(value) ((SYS_GPBR2_GPBR_VALUE2_Msk & ((value) << SYS_GPBR2_GPBR_VALUE2_Pos)))
00812 /* -------- SYS_GPBR3 : (GPBR Offset: 0xC) General Purpose Backup Register 3 -------- */
00813 #define SYS_GPBR3_GPBR_VALUE3_Pos 0
00814 #define SYS_GPBR3_GPBR_VALUE3_Msk (0xffffffffu << SYS_GPBR3_GPBR_VALUE3_Pos) /*  (SYS_GPBR3) Value of GPBR x */
00815 #define SYS_GPBR3_GPBR_VALUE3(value) ((SYS_GPBR3_GPBR_VALUE3_Msk & ((value) << SYS_GPBR3_GPBR_VALUE3_Pos)))
00816 /* -------- SYS_GPBR4 : (GPBR Offset: 0x10) General Purpose Backup Register 4 -------- */
00817 #define SYS_GPBR4_GPBR_VALUE4_Pos 0
00818 #define SYS_GPBR4_GPBR_VALUE4_Msk (0xffffffffu << SYS_GPBR4_GPBR_VALUE4_Pos) /*  (SYS_GPBR4) Value of GPBR x */
00819 #define SYS_GPBR4_GPBR_VALUE4(value) ((SYS_GPBR4_GPBR_VALUE4_Msk & ((value) << SYS_GPBR4_GPBR_VALUE4_Pos)))
00820 /* -------- SYS_GPBR5 : (GPBR Offset: 0x14) General Purpose Backup Register 5 -------- */
00821 #define SYS_GPBR5_GPBR_VALUE5_Pos 0
00822 #define SYS_GPBR5_GPBR_VALUE5_Msk (0xffffffffu << SYS_GPBR5_GPBR_VALUE5_Pos) /*  (SYS_GPBR5) Value of GPBR x */
00823 #define SYS_GPBR5_GPBR_VALUE5(value) ((SYS_GPBR5_GPBR_VALUE5_Msk & ((value) << SYS_GPBR5_GPBR_VALUE5_Pos)))
00824 /* -------- SYS_GPBR6 : (GPBR Offset: 0x18) General Purpose Backup Register 6 -------- */
00825 #define SYS_GPBR6_GPBR_VALUE6_Pos 0
00826 #define SYS_GPBR6_GPBR_VALUE6_Msk (0xffffffffu << SYS_GPBR6_GPBR_VALUE6_Pos) /*  (SYS_GPBR6) Value of GPBR x */
00827 #define SYS_GPBR6_GPBR_VALUE6(value) ((SYS_GPBR6_GPBR_VALUE6_Msk & ((value) << SYS_GPBR6_GPBR_VALUE6_Pos)))
00828 /* -------- SYS_GPBR7 : (GPBR Offset: 0x1C) General Purpose Backup Register 7 -------- */
00829 #define SYS_GPBR7_GPBR_VALUE7_Pos 0
00830 #define SYS_GPBR7_GPBR_VALUE7_Msk (0xffffffffu << SYS_GPBR7_GPBR_VALUE7_Pos) /*  (SYS_GPBR7) Value of GPBR x */
00831 #define SYS_GPBR7_GPBR_VALUE7(value) ((SYS_GPBR7_GPBR_VALUE7_Msk & ((value) << SYS_GPBR7_GPBR_VALUE7_Pos)))
00832
00833
00834 /* ============================================================================= */
00835 /*  SOFTWARE API DEFINITION FOR AHB Bus Matrix */
00836 /* ============================================================================= */
00837
00838 #ifndef __ASSEMBLY__
00839 /* Matrix hardware registers */
00840 typedef struct {
00841   RwReg MATRIX_MCFG[3]; /*  (Matrix Offset: 0x0000) Master Configuration Register */
00842   RwReg Reserved1[13];
00843   RwReg MATRIX_SCFG[4]; /*  (Matrix Offset: 0x0040) Slave Configuration Register */
00844   RwReg Reserved2[12];
00845   RwReg MATRIX_PRAS0;   /*  (Matrix Offset: 0x0080) Priority Register A for Slave 0 */
00846   RwReg Reserved3[1];
00847   RwReg MATRIX_PRAS1;   /*  (Matrix Offset: 0x0088) Priority Register A for Slave 1 */
00848   RwReg Reserved4[1];
00849   RwReg MATRIX_PRAS2;   /*  (Matrix Offset: 0x0090) Priority Register A for Slave 2 */
00850   RwReg Reserved5[1];
00851   RwReg MATRIX_PRAS3;   /*  (Matrix Offset: 0x0098) Priority Register A for Slave 3 */
00852   RwReg Reserved6[1];
00853   RwReg Reserved7[29];
00854   RwReg CCFG_SYSIO;     /*  (Matrix Offset: 0x0114) System I/O Configuration register */
00855   RwReg Reserved8[51];
00856   RwReg MATRIX_WPMR;    /*  (Matrix Offset: 0x1E4) Write Protect Mode Register */
00857   RoReg MATRIX_WPSR;    /*  (Matrix Offset: 0x1E8) Write Protect Status Register */
00858 } Matrix;
00859 #endif /* __ASSEMBLY__ */
00860 /* -------- MATRIX_MCFG[3] : (MATRIX Offset: 0x0000) Master Configuration Register -------- */
00861 #define MATRIX_MCFG_ULBT_Pos 0
00862 #define MATRIX_MCFG_ULBT_Msk (0x7u << MATRIX_MCFG_ULBT_Pos) /*  (MATRIX_MCFG[3]) Undefined Length Burst Type */
00863 #define MATRIX_MCFG_ULBT(value) ((MATRIX_MCFG_ULBT_Msk & ((value) << MATRIX_MCFG_ULBT_Pos)))
00864 /* -------- MATRIX_SCFG[4] : (MATRIX Offset: 0x0040) Slave Configuration Register -------- */
00865 #define MATRIX_SCFG_SLOT_CYCLE_Pos 0
00866 #define MATRIX_SCFG_SLOT_CYCLE_Msk (0xffu << MATRIX_SCFG_SLOT_CYCLE_Pos) /*  (MATRIX_SCFG[4]) Maximum Number of Allowed Cycles for a Burst */
00867 #define MATRIX_SCFG_SLOT_CYCLE(value) ((MATRIX_SCFG_SLOT_CYCLE_Msk & ((value) << MATRIX_SCFG_SLOT_CYCLE_Pos)))
00868 #define MATRIX_SCFG_DEFMSTR_TYPE_Pos 16
00869 #define MATRIX_SCFG_DEFMSTR_TYPE_Msk (0x3u << MATRIX_SCFG_DEFMSTR_TYPE_Pos) /*  (MATRIX_SCFG[4]) Default Master Type */
00870 #define MATRIX_SCFG_DEFMSTR_TYPE(value) ((MATRIX_SCFG_DEFMSTR_TYPE_Msk & ((value) << MATRIX_SCFG_DEFMSTR_TYPE_Pos)))
00871 #define MATRIX_SCFG_FIXED_DEFMSTR_Pos 18
00872 #define MATRIX_SCFG_FIXED_DEFMSTR_Msk (0x7u << MATRIX_SCFG_FIXED_DEFMSTR_Pos) /*  (MATRIX_SCFG[4]) Fixed Default Master */
00873 #define MATRIX_SCFG_FIXED_DEFMSTR(value) ((MATRIX_SCFG_FIXED_DEFMSTR_Msk & ((value) << MATRIX_SCFG_FIXED_DEFMSTR_Pos)))
00874 #define MATRIX_SCFG_ARBT_Pos 24
00875 #define MATRIX_SCFG_ARBT_Msk (0x3u << MATRIX_SCFG_ARBT_Pos) /*  (MATRIX_SCFG[4]) Arbitration Type */
00876 #define MATRIX_SCFG_ARBT(value) ((MATRIX_SCFG_ARBT_Msk & ((value) << MATRIX_SCFG_ARBT_Pos)))
00877 /* -------- MATRIX_PRAS0 : (MATRIX Offset: 0x0080) Priority Register A for Slave 0 -------- */
00878 #define MATRIX_PRAS0_M0PR_Pos 0
00879 #define MATRIX_PRAS0_M0PR_Msk (0x3u << MATRIX_PRAS0_M0PR_Pos) /*  (MATRIX_PRAS0) Master 0 Priority */
00880 #define MATRIX_PRAS0_M0PR(value) ((MATRIX_PRAS0_M0PR_Msk & ((value) << MATRIX_PRAS0_M0PR_Pos)))
00881 #define MATRIX_PRAS0_M1PR_Pos 4
00882 #define MATRIX_PRAS0_M1PR_Msk (0x3u << MATRIX_PRAS0_M1PR_Pos) /*  (MATRIX_PRAS0) Master 1 Priority */
00883 #define MATRIX_PRAS0_M1PR(value) ((MATRIX_PRAS0_M1PR_Msk & ((value) << MATRIX_PRAS0_M1PR_Pos)))
00884 #define MATRIX_PRAS0_M2PR_Pos 8
00885 #define MATRIX_PRAS0_M2PR_Msk (0x3u << MATRIX_PRAS0_M2PR_Pos) /*  (MATRIX_PRAS0) Master 2 Priority */
00886 #define MATRIX_PRAS0_M2PR(value) ((MATRIX_PRAS0_M2PR_Msk & ((value) << MATRIX_PRAS0_M2PR_Pos)))
00887 #define MATRIX_PRAS0_M3PR_Pos 12
00888 #define MATRIX_PRAS0_M3PR_Msk (0x3u << MATRIX_PRAS0_M3PR_Pos) /*  (MATRIX_PRAS0) Master 3 Priority */
00889 #define MATRIX_PRAS0_M3PR(value) ((MATRIX_PRAS0_M3PR_Msk & ((value) << MATRIX_PRAS0_M3PR_Pos)))
00890 /* -------- MATRIX_PRAS1 : (MATRIX Offset: 0x0088) Priority Register A for Slave 1 -------- */
00891 #define MATRIX_PRAS1_M0PR_Pos 0
00892 #define MATRIX_PRAS1_M0PR_Msk (0x3u << MATRIX_PRAS1_M0PR_Pos) /*  (MATRIX_PRAS1) Master 0 Priority */
00893 #define MATRIX_PRAS1_M0PR(value) ((MATRIX_PRAS1_M0PR_Msk & ((value) << MATRIX_PRAS1_M0PR_Pos)))
00894 #define MATRIX_PRAS1_M1PR_Pos 4
00895 #define MATRIX_PRAS1_M1PR_Msk (0x3u << MATRIX_PRAS1_M1PR_Pos) /*  (MATRIX_PRAS1) Master 1 Priority */
00896 #define MATRIX_PRAS1_M1PR(value) ((MATRIX_PRAS1_M1PR_Msk & ((value) << MATRIX_PRAS1_M1PR_Pos)))
00897 #define MATRIX_PRAS1_M2PR_Pos 8
00898 #define MATRIX_PRAS1_M2PR_Msk (0x3u << MATRIX_PRAS1_M2PR_Pos) /*  (MATRIX_PRAS1) Master 2 Priority */
00899 #define MATRIX_PRAS1_M2PR(value) ((MATRIX_PRAS1_M2PR_Msk & ((value) << MATRIX_PRAS1_M2PR_Pos)))
00900 #define MATRIX_PRAS1_M3PR_Pos 12
00901 #define MATRIX_PRAS1_M3PR_Msk (0x3u << MATRIX_PRAS1_M3PR_Pos) /*  (MATRIX_PRAS1) Master 3 Priority */
00902 #define MATRIX_PRAS1_M3PR(value) ((MATRIX_PRAS1_M3PR_Msk & ((value) << MATRIX_PRAS1_M3PR_Pos)))
00903 /* -------- MATRIX_PRAS2 : (MATRIX Offset: 0x0090) Priority Register A for Slave 2 -------- */
00904 #define MATRIX_PRAS2_M0PR_Pos 0
00905 #define MATRIX_PRAS2_M0PR_Msk (0x3u << MATRIX_PRAS2_M0PR_Pos) /*  (MATRIX_PRAS2) Master 0 Priority */
00906 #define MATRIX_PRAS2_M0PR(value) ((MATRIX_PRAS2_M0PR_Msk & ((value) << MATRIX_PRAS2_M0PR_Pos)))
00907 #define MATRIX_PRAS2_M1PR_Pos 4
00908 #define MATRIX_PRAS2_M1PR_Msk (0x3u << MATRIX_PRAS2_M1PR_Pos) /*  (MATRIX_PRAS2) Master 1 Priority */
00909 #define MATRIX_PRAS2_M1PR(value) ((MATRIX_PRAS2_M1PR_Msk & ((value) << MATRIX_PRAS2_M1PR_Pos)))
00910 #define MATRIX_PRAS2_M2PR_Pos 8
00911 #define MATRIX_PRAS2_M2PR_Msk (0x3u << MATRIX_PRAS2_M2PR_Pos) /*  (MATRIX_PRAS2) Master 2 Priority */
00912 #define MATRIX_PRAS2_M2PR(value) ((MATRIX_PRAS2_M2PR_Msk & ((value) << MATRIX_PRAS2_M2PR_Pos)))
00913 #define MATRIX_PRAS2_M3PR_Pos 12
00914 #define MATRIX_PRAS2_M3PR_Msk (0x3u << MATRIX_PRAS2_M3PR_Pos) /*  (MATRIX_PRAS2) Master 3 Priority */
00915 #define MATRIX_PRAS2_M3PR(value) ((MATRIX_PRAS2_M3PR_Msk & ((value) << MATRIX_PRAS2_M3PR_Pos)))
00916 /* -------- MATRIX_PRAS3 : (MATRIX Offset: 0x0098) Priority Register A for Slave 3 -------- */
00917 #define MATRIX_PRAS3_M0PR_Pos 0
00918 #define MATRIX_PRAS3_M0PR_Msk (0x3u << MATRIX_PRAS3_M0PR_Pos) /*  (MATRIX_PRAS3) Master 0 Priority */
00919 #define MATRIX_PRAS3_M0PR(value) ((MATRIX_PRAS3_M0PR_Msk & ((value) << MATRIX_PRAS3_M0PR_Pos)))
00920 #define MATRIX_PRAS3_M1PR_Pos 4
00921 #define MATRIX_PRAS3_M1PR_Msk (0x3u << MATRIX_PRAS3_M1PR_Pos) /*  (MATRIX_PRAS3) Master 1 Priority */
00922 #define MATRIX_PRAS3_M1PR(value) ((MATRIX_PRAS3_M1PR_Msk & ((value) << MATRIX_PRAS3_M1PR_Pos)))
00923 #define MATRIX_PRAS3_M2PR_Pos 8
00924 #define MATRIX_PRAS3_M2PR_Msk (0x3u << MATRIX_PRAS3_M2PR_Pos) /*  (MATRIX_PRAS3) Master 2 Priority */
00925 #define MATRIX_PRAS3_M2PR(value) ((MATRIX_PRAS3_M2PR_Msk & ((value) << MATRIX_PRAS3_M2PR_Pos)))
00926 #define MATRIX_PRAS3_M3PR_Pos 12
00927 #define MATRIX_PRAS3_M3PR_Msk (0x3u << MATRIX_PRAS3_M3PR_Pos) /*  (MATRIX_PRAS3) Master 3 Priority */
00928 #define MATRIX_PRAS3_M3PR(value) ((MATRIX_PRAS3_M3PR_Msk & ((value) << MATRIX_PRAS3_M3PR_Pos)))
00929 /* -------- CCFG_SYSIO : (MATRIX Offset: 0x0114) System I/O Configuration register -------- */
00930 #define CCFG_SYSIO_SYSIO4 (0x1u << 4) /*  (CCFG_SYSIO) PB4 or TDI Assignment */
00931 #define CCFG_SYSIO_SYSIO5 (0x1u << 5) /*  (CCFG_SYSIO) PB5 or TDO/TRACESWO Assignment */
00932 #define CCFG_SYSIO_SYSIO6 (0x1u << 6) /*  (CCFG_SYSIO) PB6 or TMS/SWDIO Assignment */
00933 #define CCFG_SYSIO_SYSIO7 (0x1u << 7) /*  (CCFG_SYSIO) PB7 or TCK/SWCLK Assignment */
00934 #define CCFG_SYSIO_SYSIO12 (0x1u << 12) /*  (CCFG_SYSIO) PB12 or ERASE Assignment */
00935 /* -------- MATRIX_WPMR : (MATRIX Offset: 0x1E4) Write Protect Mode Register -------- */
00936 #define MATRIX_WPMR_WPEN (0x1u << 0) /*  (MATRIX_WPMR) Write Protect ENable */
00937 #define MATRIX_WPMR_WPKEY_Pos 8
00938 #define MATRIX_WPMR_WPKEY_Msk (0xffffffu << MATRIX_WPMR_WPKEY_Pos) /*  (MATRIX_WPMR) Write Protect KEY (Write-only) */
00939 #define MATRIX_WPMR_WPKEY(value) ((MATRIX_WPMR_WPKEY_Msk & ((value) << MATRIX_WPMR_WPKEY_Pos)))
00940 /* -------- MATRIX_WPSR : (MATRIX Offset: 0x1E8) Write Protect Status Register -------- */
00941 #define MATRIX_WPSR_WPVS (0x1u << 0) /*  (MATRIX_WPSR) Write Protect Violation Status */
00942 #define MATRIX_WPSR_WPVSRC_Pos 8
00943 #define MATRIX_WPSR_WPVSRC_Msk (0xffffu << MATRIX_WPSR_WPVSRC_Pos) /*  (MATRIX_WPSR) Write Protect Violation Source */
00944
00945
00946 /* ============================================================================= */
00947 /*  SOFTWARE API DEFINITION FOR Peripheral DMA Controller */
00948 /* ============================================================================= */
00949
00950 #ifndef __ASSEMBLY__
00951 /* Pdc hardware registers */
00952 typedef struct {
00953   RwReg Reserved1[64];
00954   RwReg PERIPH_RPR;    /*  (Pdc Offset: 0x100) Receive Pointer Register */
00955   RwReg PERIPH_RCR;    /*  (Pdc Offset: 0x104) Receive Counter Register */
00956   RwReg PERIPH_TPR;    /*  (Pdc Offset: 0x108) Transmit Pointer Register */
00957   RwReg PERIPH_TCR;    /*  (Pdc Offset: 0x10C) Transmit Counter Register */
00958   RwReg PERIPH_RNPR;   /*  (Pdc Offset: 0x110) Receive Next Pointer Register */
00959   RwReg PERIPH_RNCR;   /*  (Pdc Offset: 0x114) Receive Next Counter Register */
00960   RwReg PERIPH_TNPR;   /*  (Pdc Offset: 0x118) Transmit Next Pointer Register */
00961   RwReg PERIPH_TNCR;   /*  (Pdc Offset: 0x11C) Transmit Next Counter Register */
00962   WoReg PERIPH_PTCR;   /*  (Pdc Offset: 0x120) Transfer Control Register */
00963   RoReg PERIPH_PTSR;   /*  (Pdc Offset: 0x124) Transfer Status Register */
00964 } Pdc;
00965 #endif /* __ASSEMBLY__ */
00966 /* -------- PERIPH_RPR : (PDC Offset: 0x100) Receive Pointer Register -------- */
00967 #define PERIPH_RPR_RXPTR_Pos 0
00968 #define PERIPH_RPR_RXPTR_Msk (0xffffffffu << PERIPH_RPR_RXPTR_Pos) /*  (PERIPH_RPR) Receive Pointer Register */
00969 #define PERIPH_RPR_RXPTR(value) ((PERIPH_RPR_RXPTR_Msk & ((value) << PERIPH_RPR_RXPTR_Pos)))
00970 /* -------- PERIPH_RCR : (PDC Offset: 0x104) Receive Counter Register -------- */
00971 #define PERIPH_RCR_RXCTR_Pos 0
00972 #define PERIPH_RCR_RXCTR_Msk (0xffffu << PERIPH_RCR_RXCTR_Pos) /*  (PERIPH_RCR) Receive Counter Register */
00973 #define PERIPH_RCR_RXCTR(value) ((PERIPH_RCR_RXCTR_Msk & ((value) << PERIPH_RCR_RXCTR_Pos)))
00974 /* -------- PERIPH_TPR : (PDC Offset: 0x108) Transmit Pointer Register -------- */
00975 #define PERIPH_TPR_TXPTR_Pos 0
00976 #define PERIPH_TPR_TXPTR_Msk (0xffffffffu << PERIPH_TPR_TXPTR_Pos) /*  (PERIPH_TPR) Transmit Counter Register */
00977 #define PERIPH_TPR_TXPTR(value) ((PERIPH_TPR_TXPTR_Msk & ((value) << PERIPH_TPR_TXPTR_Pos)))
00978 /* -------- PERIPH_TCR : (PDC Offset: 0x10C) Transmit Counter Register -------- */
00979 #define PERIPH_TCR_TXCTR_Pos 0
00980 #define PERIPH_TCR_TXCTR_Msk (0xffffu << PERIPH_TCR_TXCTR_Pos) /*  (PERIPH_TCR) Transmit Counter Register */
00981 #define PERIPH_TCR_TXCTR(value) ((PERIPH_TCR_TXCTR_Msk & ((value) << PERIPH_TCR_TXCTR_Pos)))
00982 /* -------- PERIPH_RNPR : (PDC Offset: 0x110) Receive Next Pointer Register -------- */
00983 #define PERIPH_RNPR_RXNPTR_Pos 0
00984 #define PERIPH_RNPR_RXNPTR_Msk (0xffffffffu << PERIPH_RNPR_RXNPTR_Pos) /*  (PERIPH_RNPR) Receive Next Pointer */
00985 #define PERIPH_RNPR_RXNPTR(value) ((PERIPH_RNPR_RXNPTR_Msk & ((value) << PERIPH_RNPR_RXNPTR_Pos)))
00986 /* -------- PERIPH_RNCR : (PDC Offset: 0x114) Receive Next Counter Register -------- */
00987 #define PERIPH_RNCR_RXNCTR_Pos 0
00988 #define PERIPH_RNCR_RXNCTR_Msk (0xffffu << PERIPH_RNCR_RXNCTR_Pos) /*  (PERIPH_RNCR) Receive Next Counter */
00989 #define PERIPH_RNCR_RXNCTR(value) ((PERIPH_RNCR_RXNCTR_Msk & ((value) << PERIPH_RNCR_RXNCTR_Pos)))
00990 /* -------- PERIPH_TNPR : (PDC Offset: 0x118) Transmit Next Pointer Register -------- */
00991 #define PERIPH_TNPR_TXNPTR_Pos 0
00992 #define PERIPH_TNPR_TXNPTR_Msk (0xffffffffu << PERIPH_TNPR_TXNPTR_Pos) /*  (PERIPH_TNPR) Transmit Next Pointer */
00993 #define PERIPH_TNPR_TXNPTR(value) ((PERIPH_TNPR_TXNPTR_Msk & ((value) << PERIPH_TNPR_TXNPTR_Pos)))
00994 /* -------- PERIPH_TNCR : (PDC Offset: 0x11C) Transmit Next Counter Register -------- */
00995 #define PERIPH_TNCR_TXNCTR_Pos 0
00996 #define PERIPH_TNCR_TXNCTR_Msk (0xffffu << PERIPH_TNCR_TXNCTR_Pos) /*  (PERIPH_TNCR) Transmit Counter Next */
00997 #define PERIPH_TNCR_TXNCTR(value) ((PERIPH_TNCR_TXNCTR_Msk & ((value) << PERIPH_TNCR_TXNCTR_Pos)))
00998 /* -------- PERIPH_PTCR : (PDC Offset: 0x120) Transfer Control Register -------- */
00999 #define PERIPH_PTCR_RXTEN (0x1u << 0) /*  (PERIPH_PTCR) Receiver Transfer Enable */
01000 #define PERIPH_PTCR_RXTDIS (0x1u << 1) /*  (PERIPH_PTCR) Receiver Transfer Disable */
01001 #define PERIPH_PTCR_TXTEN (0x1u << 8) /*  (PERIPH_PTCR) Transmitter Transfer Enable */
01002 #define PERIPH_PTCR_TXTDIS (0x1u << 9) /*  (PERIPH_PTCR) Transmitter Transfer Disable */
01003 /* -------- PERIPH_PTSR : (PDC Offset: 0x124) Transfer Status Register -------- */
01004 #define PERIPH_PTSR_RXTEN (0x1u << 0) /*  (PERIPH_PTSR) Receiver Transfer Enable */
01005 #define PERIPH_PTSR_TXTEN (0x1u << 8) /*  (PERIPH_PTSR) Transmitter Transfer Enable */
01006
01007
01008 /* ============================================================================= */
01009 /*  SOFTWARE API DEFINITION FOR Parallel Input/Output */
01010 /* ============================================================================= */
01011
01012 #ifndef __ASSEMBLY__
01013 /* Pio hardware registers */
01014 typedef struct {
01015   WoReg PIO_PER;       /*  (Pio Offset: 0x0000) PIO Enable Register */
01016   WoReg PIO_PDR;       /*  (Pio Offset: 0x0004) PIO Disable Register */
01017   RoReg PIO_PSR;       /*  (Pio Offset: 0x0008) PIO Status Register */
01018   RwReg Reserved1[1];
01019   WoReg PIO_OER;       /*  (Pio Offset: 0x0010) Output Enable Register */
01020   WoReg PIO_ODR;       /*  (Pio Offset: 0x0014) Output Disable Register */
01021   RoReg PIO_OSR;       /*  (Pio Offset: 0x0018) Output Status Register */
01022   RwReg Reserved2[1];
01023   WoReg PIO_IFER;      /*  (Pio Offset: 0x0020) Glitch Input Filter Enable Register */
01024   WoReg PIO_IFDR;      /*  (Pio Offset: 0x0024) Glitch Input Filter Disable Register */
01025   RoReg PIO_IFSR;      /*  (Pio Offset: 0x0028) Glitch Input Filter Status Register */
01026   RwReg Reserved3[1];
01027   WoReg PIO_SODR;      /*  (Pio Offset: 0x0030) Set Output Data Register */
01028   WoReg PIO_CODR;      /*  (Pio Offset: 0x0034) Clear Output Data Register */
01029   RwReg PIO_ODSR;      /*  (Pio Offset: 0x0038) Output Data Status Register */
01030   RoReg PIO_PDSR;      /*  (Pio Offset: 0x003C) Pin Data Status Register */
01031   WoReg PIO_IER;       /*  (Pio Offset: 0x0040) Interrupt Enable Register */
01032   WoReg PIO_IDR;       /*  (Pio Offset: 0x0044) Interrupt Disable Register */
01033   RoReg PIO_IMR;       /*  (Pio Offset: 0x0048) Interrupt Mask Register */
01034   RoReg PIO_ISR;       /*  (Pio Offset: 0x004C) Interrupt Status Register */
01035   WoReg PIO_MDER;      /*  (Pio Offset: 0x0050) Multi-driver Enable Register */
01036   WoReg PIO_MDDR;      /*  (Pio Offset: 0x0054) Multi-driver Disable Register */
01037   RoReg PIO_MDSR;      /*  (Pio Offset: 0x0058) Multi-driver Status Register */
01038   RwReg Reserved4[1];
01039   WoReg PIO_PUDR;      /*  (Pio Offset: 0x0060) Pull-up Disable Register */
01040   WoReg PIO_PUER;      /*  (Pio Offset: 0x0064) Pull-up Enable Register */
01041   RoReg PIO_PUSR;      /*  (Pio Offset: 0x0068) Pad Pull-up Status Register */
01042   RwReg Reserved5[1];
01043   RwReg PIO_ABCDSR[2]; /*  (Pio Offset: 0x0070) Peripheral Select Register */
01044   RwReg Reserved6[2];
01045   WoReg PIO_IFSCDR;    /*  (Pio Offset: 0x0080) Input Filter Slow Clock Disable Register */
01046   WoReg PIO_IFSCER;    /*  (Pio Offset: 0x0084) Input Filter Slow Clock Enable Register */
01047   RoReg PIO_IFSCSR;    /*  (Pio Offset: 0x0088) Input Filter Slow Clock Status Register */
01048   RwReg PIO_SCDR;      /*  (Pio Offset: 0x008C) Slow Clock Divider Debouncing Register */
01049   WoReg PIO_PPDDR;     /*  (Pio Offset: 0x0090) Pad Pull-down Disable Register */
01050   WoReg PIO_PPDER;     /*  (Pio Offset: 0x0094) Pad Pull-down Enable Register */
01051   RoReg PIO_PPDSR;     /*  (Pio Offset: 0x0098) Pad Pull-down Status Register */
01052   RwReg Reserved7[1];
01053   WoReg PIO_OWER;      /*  (Pio Offset: 0x00A0) Output Write Enable */
01054   WoReg PIO_OWDR;      /*  (Pio Offset: 0x00A4) Output Write Disable */
01055   RoReg PIO_OWSR;      /*  (Pio Offset: 0x00A8) Output Write Status Register */
01056   RwReg Reserved8[1];
01057   WoReg PIO_AIMER;     /*  (Pio Offset: 0x00B0) Additional Interrupt Modes Enable Register */
01058   WoReg PIO_AIMDR;     /*  (Pio Offset: 0x00B4) Additional Interrupt Modes Disables Register */
01059   RoReg PIO_AIMMR;     /*  (Pio Offset: 0x00B8) Additional Interrupt Modes Mask Register */
01060   RwReg Reserved9[1];
01061   WoReg PIO_ESR;       /*  (Pio Offset: 0x00C0) Edge Select Register */
01062   WoReg PIO_LSR;       /*  (Pio Offset: 0x00C4) Level Select Register */
01063   RoReg PIO_ELSR;      /*  (Pio Offset: 0x00C8) Edge/Level Status Register */
01064   RwReg Reserved10[1];
01065   WoReg PIO_FELLSR;    /*  (Pio Offset: 0x00D0) Falling Edge/Low Level Select Register */
01066   WoReg PIO_REHLSR;    /*  (Pio Offset: 0x00D4) Rising Edge/ High Level Select Register */
01067   RoReg PIO_FRLHSR;    /*  (Pio Offset: 0x00D8) Fall/Rise - Low/High Status Register */
01068   RwReg Reserved11[1];
01069   RoReg PIO_LOCKSR;    /*  (Pio Offset: 0x00E0) Lock Status */
01070   RwReg PIO_WPMR;      /*  (Pio Offset: 0x00E4) Write Protect Mode Register */
01071   RoReg PIO_WPSR;      /*  (Pio Offset: 0x00E8) Write Protect Status Register */
01072   RwReg Reserved12[5];
01073   RwReg PIO_SCHMITT;   /*  (Pio Offset: 0x0100) Schmitt Trigger Register */
01074 } Pio;
01075 #endif /* __ASSEMBLY__ */
01076 /* -------- PIO_PER : (PIO Offset: 0x0000) PIO Enable Register -------- */
01077 #define PIO_PER_P0 (0x1u << 0) /*  (PIO_PER) PIO Enable */
01078 #define PIO_PER_P1 (0x1u << 1) /*  (PIO_PER) PIO Enable */
01079 #define PIO_PER_P2 (0x1u << 2) /*  (PIO_PER) PIO Enable */
01080 #define PIO_PER_P3 (0x1u << 3) /*  (PIO_PER) PIO Enable */
01081 #define PIO_PER_P4 (0x1u << 4) /*  (PIO_PER) PIO Enable */
01082 #define PIO_PER_P5 (0x1u << 5) /*  (PIO_PER) PIO Enable */
01083 #define PIO_PER_P6 (0x1u << 6) /*  (PIO_PER) PIO Enable */
01084 #define PIO_PER_P7 (0x1u << 7) /*  (PIO_PER) PIO Enable */
01085 #define PIO_PER_P8 (0x1u << 8) /*  (PIO_PER) PIO Enable */
01086 #define PIO_PER_P9 (0x1u << 9) /*  (PIO_PER) PIO Enable */
01087 #define PIO_PER_P10 (0x1u << 10) /*  (PIO_PER) PIO Enable */
01088 #define PIO_PER_P11 (0x1u << 11) /*  (PIO_PER) PIO Enable */
01089 #define PIO_PER_P12 (0x1u << 12) /*  (PIO_PER) PIO Enable */
01090 #define PIO_PER_P13 (0x1u << 13) /*  (PIO_PER) PIO Enable */
01091 #define PIO_PER_P14 (0x1u << 14) /*  (PIO_PER) PIO Enable */
01092 #define PIO_PER_P15 (0x1u << 15) /*  (PIO_PER) PIO Enable */
01093 #define PIO_PER_P16 (0x1u << 16) /*  (PIO_PER) PIO Enable */
01094 #define PIO_PER_P17 (0x1u << 17) /*  (PIO_PER) PIO Enable */
01095 #define PIO_PER_P18 (0x1u << 18) /*  (PIO_PER) PIO Enable */
01096 #define PIO_PER_P19 (0x1u << 19) /*  (PIO_PER) PIO Enable */
01097 #define PIO_PER_P20 (0x1u << 20) /*  (PIO_PER) PIO Enable */
01098 #define PIO_PER_P21 (0x1u << 21) /*  (PIO_PER) PIO Enable */
01099 #define PIO_PER_P22 (0x1u << 22) /*  (PIO_PER) PIO Enable */
01100 #define PIO_PER_P23 (0x1u << 23) /*  (PIO_PER) PIO Enable */
01101 #define PIO_PER_P24 (0x1u << 24) /*  (PIO_PER) PIO Enable */
01102 #define PIO_PER_P25 (0x1u << 25) /*  (PIO_PER) PIO Enable */
01103 #define PIO_PER_P26 (0x1u << 26) /*  (PIO_PER) PIO Enable */
01104 #define PIO_PER_P27 (0x1u << 27) /*  (PIO_PER) PIO Enable */
01105 #define PIO_PER_P28 (0x1u << 28) /*  (PIO_PER) PIO Enable */
01106 #define PIO_PER_P29 (0x1u << 29) /*  (PIO_PER) PIO Enable */
01107 #define PIO_PER_P30 (0x1u << 30) /*  (PIO_PER) PIO Enable */
01108 #define PIO_PER_P31 (0x1u << 31) /*  (PIO_PER) PIO Enable */
01109 /* -------- PIO_PDR : (PIO Offset: 0x0004) PIO Disable Register -------- */
01110 #define PIO_PDR_P0 (0x1u << 0) /*  (PIO_PDR) PIO Disable */
01111 #define PIO_PDR_P1 (0x1u << 1) /*  (PIO_PDR) PIO Disable */
01112 #define PIO_PDR_P2 (0x1u << 2) /*  (PIO_PDR) PIO Disable */
01113 #define PIO_PDR_P3 (0x1u << 3) /*  (PIO_PDR) PIO Disable */
01114 #define PIO_PDR_P4 (0x1u << 4) /*  (PIO_PDR) PIO Disable */
01115 #define PIO_PDR_P5 (0x1u << 5) /*  (PIO_PDR) PIO Disable */
01116 #define PIO_PDR_P6 (0x1u << 6) /*  (PIO_PDR) PIO Disable */
01117 #define PIO_PDR_P7 (0x1u << 7) /*  (PIO_PDR) PIO Disable */
01118 #define PIO_PDR_P8 (0x1u << 8) /*  (PIO_PDR) PIO Disable */
01119 #define PIO_PDR_P9 (0x1u << 9) /*  (PIO_PDR) PIO Disable */
01120 #define PIO_PDR_P10 (0x1u << 10) /*  (PIO_PDR) PIO Disable */
01121 #define PIO_PDR_P11 (0x1u << 11) /*  (PIO_PDR) PIO Disable */
01122 #define PIO_PDR_P12 (0x1u << 12) /*  (PIO_PDR) PIO Disable */
01123 #define PIO_PDR_P13 (0x1u << 13) /*  (PIO_PDR) PIO Disable */
01124 #define PIO_PDR_P14 (0x1u << 14) /*  (PIO_PDR) PIO Disable */
01125 #define PIO_PDR_P15 (0x1u << 15) /*  (PIO_PDR) PIO Disable */
01126 #define PIO_PDR_P16 (0x1u << 16) /*  (PIO_PDR) PIO Disable */
01127 #define PIO_PDR_P17 (0x1u << 17) /*  (PIO_PDR) PIO Disable */
01128 #define PIO_PDR_P18 (0x1u << 18) /*  (PIO_PDR) PIO Disable */
01129 #define PIO_PDR_P19 (0x1u << 19) /*  (PIO_PDR) PIO Disable */
01130 #define PIO_PDR_P20 (0x1u << 20) /*  (PIO_PDR) PIO Disable */
01131 #define PIO_PDR_P21 (0x1u << 21) /*  (PIO_PDR) PIO Disable */
01132 #define PIO_PDR_P22 (0x1u << 22) /*  (PIO_PDR) PIO Disable */
01133 #define PIO_PDR_P23 (0x1u << 23) /*  (PIO_PDR) PIO Disable */
01134 #define PIO_PDR_P24 (0x1u << 24) /*  (PIO_PDR) PIO Disable */
01135 #define PIO_PDR_P25 (0x1u << 25) /*  (PIO_PDR) PIO Disable */
01136 #define PIO_PDR_P26 (0x1u << 26) /*  (PIO_PDR) PIO Disable */
01137 #define PIO_PDR_P27 (0x1u << 27) /*  (PIO_PDR) PIO Disable */
01138 #define PIO_PDR_P28 (0x1u << 28) /*  (PIO_PDR) PIO Disable */
01139 #define PIO_PDR_P29 (0x1u << 29) /*  (PIO_PDR) PIO Disable */
01140 #define PIO_PDR_P30 (0x1u << 30) /*  (PIO_PDR) PIO Disable */
01141 #define PIO_PDR_P31 (0x1u << 31) /*  (PIO_PDR) PIO Disable */
01142 /* -------- PIO_PSR : (PIO Offset: 0x0008) PIO Status Register -------- */
01143 #define PIO_PSR_P0 (0x1u << 0) /*  (PIO_PSR) PIO Status */
01144 #define PIO_PSR_P1 (0x1u << 1) /*  (PIO_PSR) PIO Status */
01145 #define PIO_PSR_P2 (0x1u << 2) /*  (PIO_PSR) PIO Status */
01146 #define PIO_PSR_P3 (0x1u << 3) /*  (PIO_PSR) PIO Status */
01147 #define PIO_PSR_P4 (0x1u << 4) /*  (PIO_PSR) PIO Status */
01148 #define PIO_PSR_P5 (0x1u << 5) /*  (PIO_PSR) PIO Status */
01149 #define PIO_PSR_P6 (0x1u << 6) /*  (PIO_PSR) PIO Status */
01150 #define PIO_PSR_P7 (0x1u << 7) /*  (PIO_PSR) PIO Status */
01151 #define PIO_PSR_P8 (0x1u << 8) /*  (PIO_PSR) PIO Status */
01152 #define PIO_PSR_P9 (0x1u << 9) /*  (PIO_PSR) PIO Status */
01153 #define PIO_PSR_P10 (0x1u << 10) /*  (PIO_PSR) PIO Status */
01154 #define PIO_PSR_P11 (0x1u << 11) /*  (PIO_PSR) PIO Status */
01155 #define PIO_PSR_P12 (0x1u << 12) /*  (PIO_PSR) PIO Status */
01156 #define PIO_PSR_P13 (0x1u << 13) /*  (PIO_PSR) PIO Status */
01157 #define PIO_PSR_P14 (0x1u << 14) /*  (PIO_PSR) PIO Status */
01158 #define PIO_PSR_P15 (0x1u << 15) /*  (PIO_PSR) PIO Status */
01159 #define PIO_PSR_P16 (0x1u << 16) /*  (PIO_PSR) PIO Status */
01160 #define PIO_PSR_P17 (0x1u << 17) /*  (PIO_PSR) PIO Status */
01161 #define PIO_PSR_P18 (0x1u << 18) /*  (PIO_PSR) PIO Status */
01162 #define PIO_PSR_P19 (0x1u << 19) /*  (PIO_PSR) PIO Status */
01163 #define PIO_PSR_P20 (0x1u << 20) /*  (PIO_PSR) PIO Status */
01164 #define PIO_PSR_P21 (0x1u << 21) /*  (PIO_PSR) PIO Status */
01165 #define PIO_PSR_P22 (0x1u << 22) /*  (PIO_PSR) PIO Status */
01166 #define PIO_PSR_P23 (0x1u << 23) /*  (PIO_PSR) PIO Status */
01167 #define PIO_PSR_P24 (0x1u << 24) /*  (PIO_PSR) PIO Status */
01168 #define PIO_PSR_P25 (0x1u << 25) /*  (PIO_PSR) PIO Status */
01169 #define PIO_PSR_P26 (0x1u << 26) /*  (PIO_PSR) PIO Status */
01170 #define PIO_PSR_P27 (0x1u << 27) /*  (PIO_PSR) PIO Status */
01171 #define PIO_PSR_P28 (0x1u << 28) /*  (PIO_PSR) PIO Status */
01172 #define PIO_PSR_P29 (0x1u << 29) /*  (PIO_PSR) PIO Status */
01173 #define PIO_PSR_P30 (0x1u << 30) /*  (PIO_PSR) PIO Status */
01174 #define PIO_PSR_P31 (0x1u << 31) /*  (PIO_PSR) PIO Status */
01175 /* -------- PIO_OER : (PIO Offset: 0x0010) Output Enable Register -------- */
01176 #define PIO_OER_P0 (0x1u << 0) /*  (PIO_OER) Output Enable */
01177 #define PIO_OER_P1 (0x1u << 1) /*  (PIO_OER) Output Enable */
01178 #define PIO_OER_P2 (0x1u << 2) /*  (PIO_OER) Output Enable */
01179 #define PIO_OER_P3 (0x1u << 3) /*  (PIO_OER) Output Enable */
01180 #define PIO_OER_P4 (0x1u << 4) /*  (PIO_OER) Output Enable */
01181 #define PIO_OER_P5 (0x1u << 5) /*  (PIO_OER) Output Enable */
01182 #define PIO_OER_P6 (0x1u << 6) /*  (PIO_OER) Output Enable */
01183 #define PIO_OER_P7 (0x1u << 7) /*  (PIO_OER) Output Enable */
01184 #define PIO_OER_P8 (0x1u << 8) /*  (PIO_OER) Output Enable */
01185 #define PIO_OER_P9 (0x1u << 9) /*  (PIO_OER) Output Enable */
01186 #define PIO_OER_P10 (0x1u << 10) /*  (PIO_OER) Output Enable */
01187 #define PIO_OER_P11 (0x1u << 11) /*  (PIO_OER) Output Enable */
01188 #define PIO_OER_P12 (0x1u << 12) /*  (PIO_OER) Output Enable */
01189 #define PIO_OER_P13 (0x1u << 13) /*  (PIO_OER) Output Enable */
01190 #define PIO_OER_P14 (0x1u << 14) /*  (PIO_OER) Output Enable */
01191 #define PIO_OER_P15 (0x1u << 15) /*  (PIO_OER) Output Enable */
01192 #define PIO_OER_P16 (0x1u << 16) /*  (PIO_OER) Output Enable */
01193 #define PIO_OER_P17 (0x1u << 17) /*  (PIO_OER) Output Enable */
01194 #define PIO_OER_P18 (0x1u << 18) /*  (PIO_OER) Output Enable */
01195 #define PIO_OER_P19 (0x1u << 19) /*  (PIO_OER) Output Enable */
01196 #define PIO_OER_P20 (0x1u << 20) /*  (PIO_OER) Output Enable */
01197 #define PIO_OER_P21 (0x1u << 21) /*  (PIO_OER) Output Enable */
01198 #define PIO_OER_P22 (0x1u << 22) /*  (PIO_OER) Output Enable */
01199 #define PIO_OER_P23 (0x1u << 23) /*  (PIO_OER) Output Enable */
01200 #define PIO_OER_P24 (0x1u << 24) /*  (PIO_OER) Output Enable */
01201 #define PIO_OER_P25 (0x1u << 25) /*  (PIO_OER) Output Enable */
01202 #define PIO_OER_P26 (0x1u << 26) /*  (PIO_OER) Output Enable */
01203 #define PIO_OER_P27 (0x1u << 27) /*  (PIO_OER) Output Enable */
01204 #define PIO_OER_P28 (0x1u << 28) /*  (PIO_OER) Output Enable */
01205 #define PIO_OER_P29 (0x1u << 29) /*  (PIO_OER) Output Enable */
01206 #define PIO_OER_P30 (0x1u << 30) /*  (PIO_OER) Output Enable */
01207 #define PIO_OER_P31 (0x1u << 31) /*  (PIO_OER) Output Enable */
01208 /* -------- PIO_ODR : (PIO Offset: 0x0014) Output Disable Register -------- */
01209 #define PIO_ODR_P0 (0x1u << 0) /*  (PIO_ODR) Output Disable */
01210 #define PIO_ODR_P1 (0x1u << 1) /*  (PIO_ODR) Output Disable */
01211 #define PIO_ODR_P2 (0x1u << 2) /*  (PIO_ODR) Output Disable */
01212 #define PIO_ODR_P3 (0x1u << 3) /*  (PIO_ODR) Output Disable */
01213 #define PIO_ODR_P4 (0x1u << 4) /*  (PIO_ODR) Output Disable */
01214 #define PIO_ODR_P5 (0x1u << 5) /*  (PIO_ODR) Output Disable */
01215 #define PIO_ODR_P6 (0x1u << 6) /*  (PIO_ODR) Output Disable */
01216 #define PIO_ODR_P7 (0x1u << 7) /*  (PIO_ODR) Output Disable */
01217 #define PIO_ODR_P8 (0x1u << 8) /*  (PIO_ODR) Output Disable */
01218 #define PIO_ODR_P9 (0x1u << 9) /*  (PIO_ODR) Output Disable */
01219 #define PIO_ODR_P10 (0x1u << 10) /*  (PIO_ODR) Output Disable */
01220 #define PIO_ODR_P11 (0x1u << 11) /*  (PIO_ODR) Output Disable */
01221 #define PIO_ODR_P12 (0x1u << 12) /*  (PIO_ODR) Output Disable */
01222 #define PIO_ODR_P13 (0x1u << 13) /*  (PIO_ODR) Output Disable */
01223 #define PIO_ODR_P14 (0x1u << 14) /*  (PIO_ODR) Output Disable */
01224 #define PIO_ODR_P15 (0x1u << 15) /*  (PIO_ODR) Output Disable */
01225 #define PIO_ODR_P16 (0x1u << 16) /*  (PIO_ODR) Output Disable */
01226 #define PIO_ODR_P17 (0x1u << 17) /*  (PIO_ODR) Output Disable */
01227 #define PIO_ODR_P18 (0x1u << 18) /*  (PIO_ODR) Output Disable */
01228 #define PIO_ODR_P19 (0x1u << 19) /*  (PIO_ODR) Output Disable */
01229 #define PIO_ODR_P20 (0x1u << 20) /*  (PIO_ODR) Output Disable */
01230 #define PIO_ODR_P21 (0x1u << 21) /*  (PIO_ODR) Output Disable */
01231 #define PIO_ODR_P22 (0x1u << 22) /*  (PIO_ODR) Output Disable */
01232 #define PIO_ODR_P23 (0x1u << 23) /*  (PIO_ODR) Output Disable */
01233 #define PIO_ODR_P24 (0x1u << 24) /*  (PIO_ODR) Output Disable */
01234 #define PIO_ODR_P25 (0x1u << 25) /*  (PIO_ODR) Output Disable */
01235 #define PIO_ODR_P26 (0x1u << 26) /*  (PIO_ODR) Output Disable */
01236 #define PIO_ODR_P27 (0x1u << 27) /*  (PIO_ODR) Output Disable */
01237 #define PIO_ODR_P28 (0x1u << 28) /*  (PIO_ODR) Output Disable */
01238 #define PIO_ODR_P29 (0x1u << 29) /*  (PIO_ODR) Output Disable */
01239 #define PIO_ODR_P30 (0x1u << 30) /*  (PIO_ODR) Output Disable */
01240 #define PIO_ODR_P31 (0x1u << 31) /*  (PIO_ODR) Output Disable */
01241 /* -------- PIO_OSR : (PIO Offset: 0x0018) Output Status Register -------- */
01242 #define PIO_OSR_P0 (0x1u << 0) /*  (PIO_OSR) Output Status */
01243 #define PIO_OSR_P1 (0x1u << 1) /*  (PIO_OSR) Output Status */
01244 #define PIO_OSR_P2 (0x1u << 2) /*  (PIO_OSR) Output Status */
01245 #define PIO_OSR_P3 (0x1u << 3) /*  (PIO_OSR) Output Status */
01246 #define PIO_OSR_P4 (0x1u << 4) /*  (PIO_OSR) Output Status */
01247 #define PIO_OSR_P5 (0x1u << 5) /*  (PIO_OSR) Output Status */
01248 #define PIO_OSR_P6 (0x1u << 6) /*  (PIO_OSR) Output Status */
01249 #define PIO_OSR_P7 (0x1u << 7) /*  (PIO_OSR) Output Status */
01250 #define PIO_OSR_P8 (0x1u << 8) /*  (PIO_OSR) Output Status */
01251 #define PIO_OSR_P9 (0x1u << 9) /*  (PIO_OSR) Output Status */
01252 #define PIO_OSR_P10 (0x1u << 10) /*  (PIO_OSR) Output Status */
01253 #define PIO_OSR_P11 (0x1u << 11) /*  (PIO_OSR) Output Status */
01254 #define PIO_OSR_P12 (0x1u << 12) /*  (PIO_OSR) Output Status */
01255 #define PIO_OSR_P13 (0x1u << 13) /*  (PIO_OSR) Output Status */
01256 #define PIO_OSR_P14 (0x1u << 14) /*  (PIO_OSR) Output Status */
01257 #define PIO_OSR_P15 (0x1u << 15) /*  (PIO_OSR) Output Status */
01258 #define PIO_OSR_P16 (0x1u << 16) /*  (PIO_OSR) Output Status */
01259 #define PIO_OSR_P17 (0x1u << 17) /*  (PIO_OSR) Output Status */
01260 #define PIO_OSR_P18 (0x1u << 18) /*  (PIO_OSR) Output Status */
01261 #define PIO_OSR_P19 (0x1u << 19) /*  (PIO_OSR) Output Status */
01262 #define PIO_OSR_P20 (0x1u << 20) /*  (PIO_OSR) Output Status */
01263 #define PIO_OSR_P21 (0x1u << 21) /*  (PIO_OSR) Output Status */
01264 #define PIO_OSR_P22 (0x1u << 22) /*  (PIO_OSR) Output Status */
01265 #define PIO_OSR_P23 (0x1u << 23) /*  (PIO_OSR) Output Status */
01266 #define PIO_OSR_P24 (0x1u << 24) /*  (PIO_OSR) Output Status */
01267 #define PIO_OSR_P25 (0x1u << 25) /*  (PIO_OSR) Output Status */
01268 #define PIO_OSR_P26 (0x1u << 26) /*  (PIO_OSR) Output Status */
01269 #define PIO_OSR_P27 (0x1u << 27) /*  (PIO_OSR) Output Status */
01270 #define PIO_OSR_P28 (0x1u << 28) /*  (PIO_OSR) Output Status */
01271 #define PIO_OSR_P29 (0x1u << 29) /*  (PIO_OSR) Output Status */
01272 #define PIO_OSR_P30 (0x1u << 30) /*  (PIO_OSR) Output Status */
01273 #define PIO_OSR_P31 (0x1u << 31) /*  (PIO_OSR) Output Status */
01274 /* -------- PIO_IFER : (PIO Offset: 0x0020) Glitch Input Filter Enable Register -------- */
01275 #define PIO_IFER_P0 (0x1u << 0) /*  (PIO_IFER) Input Filter Enable */
01276 #define PIO_IFER_P1 (0x1u << 1) /*  (PIO_IFER) Input Filter Enable */
01277 #define PIO_IFER_P2 (0x1u << 2) /*  (PIO_IFER) Input Filter Enable */
01278 #define PIO_IFER_P3 (0x1u << 3) /*  (PIO_IFER) Input Filter Enable */
01279 #define PIO_IFER_P4 (0x1u << 4) /*  (PIO_IFER) Input Filter Enable */
01280 #define PIO_IFER_P5 (0x1u << 5) /*  (PIO_IFER) Input Filter Enable */
01281 #define PIO_IFER_P6 (0x1u << 6) /*  (PIO_IFER) Input Filter Enable */
01282 #define PIO_IFER_P7 (0x1u << 7) /*  (PIO_IFER) Input Filter Enable */
01283 #define PIO_IFER_P8 (0x1u << 8) /*  (PIO_IFER) Input Filter Enable */
01284 #define PIO_IFER_P9 (0x1u << 9) /*  (PIO_IFER) Input Filter Enable */
01285 #define PIO_IFER_P10 (0x1u << 10) /*  (PIO_IFER) Input Filter Enable */
01286 #define PIO_IFER_P11 (0x1u << 11) /*  (PIO_IFER) Input Filter Enable */
01287 #define PIO_IFER_P12 (0x1u << 12) /*  (PIO_IFER) Input Filter Enable */
01288 #define PIO_IFER_P13 (0x1u << 13) /*  (PIO_IFER) Input Filter Enable */
01289 #define PIO_IFER_P14 (0x1u << 14) /*  (PIO_IFER) Input Filter Enable */
01290 #define PIO_IFER_P15 (0x1u << 15) /*  (PIO_IFER) Input Filter Enable */
01291 #define PIO_IFER_P16 (0x1u << 16) /*  (PIO_IFER) Input Filter Enable */
01292 #define PIO_IFER_P17 (0x1u << 17) /*  (PIO_IFER) Input Filter Enable */
01293 #define PIO_IFER_P18 (0x1u << 18) /*  (PIO_IFER) Input Filter Enable */
01294 #define PIO_IFER_P19 (0x1u << 19) /*  (PIO_IFER) Input Filter Enable */
01295 #define PIO_IFER_P20 (0x1u << 20) /*  (PIO_IFER) Input Filter Enable */
01296 #define PIO_IFER_P21 (0x1u << 21) /*  (PIO_IFER) Input Filter Enable */
01297 #define PIO_IFER_P22 (0x1u << 22) /*  (PIO_IFER) Input Filter Enable */
01298 #define PIO_IFER_P23 (0x1u << 23) /*  (PIO_IFER) Input Filter Enable */
01299 #define PIO_IFER_P24 (0x1u << 24) /*  (PIO_IFER) Input Filter Enable */
01300 #define PIO_IFER_P25 (0x1u << 25) /*  (PIO_IFER) Input Filter Enable */
01301 #define PIO_IFER_P26 (0x1u << 26) /*  (PIO_IFER) Input Filter Enable */
01302 #define PIO_IFER_P27 (0x1u << 27) /*  (PIO_IFER) Input Filter Enable */
01303 #define PIO_IFER_P28 (0x1u << 28) /*  (PIO_IFER) Input Filter Enable */
01304 #define PIO_IFER_P29 (0x1u << 29) /*  (PIO_IFER) Input Filter Enable */
01305 #define PIO_IFER_P30 (0x1u << 30) /*  (PIO_IFER) Input Filter Enable */
01306 #define PIO_IFER_P31 (0x1u << 31) /*  (PIO_IFER) Input Filter Enable */
01307 /* -------- PIO_IFDR : (PIO Offset: 0x0024) Glitch Input Filter Disable Register -------- */
01308 #define PIO_IFDR_P0 (0x1u << 0) /*  (PIO_IFDR) Input Filter Disable */
01309 #define PIO_IFDR_P1 (0x1u << 1) /*  (PIO_IFDR) Input Filter Disable */
01310 #define PIO_IFDR_P2 (0x1u << 2) /*  (PIO_IFDR) Input Filter Disable */
01311 #define PIO_IFDR_P3 (0x1u << 3) /*  (PIO_IFDR) Input Filter Disable */
01312 #define PIO_IFDR_P4 (0x1u << 4) /*  (PIO_IFDR) Input Filter Disable */
01313 #define PIO_IFDR_P5 (0x1u << 5) /*  (PIO_IFDR) Input Filter Disable */
01314 #define PIO_IFDR_P6 (0x1u << 6) /*  (PIO_IFDR) Input Filter Disable */
01315 #define PIO_IFDR_P7 (0x1u << 7) /*  (PIO_IFDR) Input Filter Disable */
01316 #define PIO_IFDR_P8 (0x1u << 8) /*  (PIO_IFDR) Input Filter Disable */
01317 #define PIO_IFDR_P9 (0x1u << 9) /*  (PIO_IFDR) Input Filter Disable */
01318 #define PIO_IFDR_P10 (0x1u << 10) /*  (PIO_IFDR) Input Filter Disable */
01319 #define PIO_IFDR_P11 (0x1u << 11) /*  (PIO_IFDR) Input Filter Disable */
01320 #define PIO_IFDR_P12 (0x1u << 12) /*  (PIO_IFDR) Input Filter Disable */
01321 #define PIO_IFDR_P13 (0x1u << 13) /*  (PIO_IFDR) Input Filter Disable */
01322 #define PIO_IFDR_P14 (0x1u << 14) /*  (PIO_IFDR) Input Filter Disable */
01323 #define PIO_IFDR_P15 (0x1u << 15) /*  (PIO_IFDR) Input Filter Disable */
01324 #define PIO_IFDR_P16 (0x1u << 16) /*  (PIO_IFDR) Input Filter Disable */
01325 #define PIO_IFDR_P17 (0x1u << 17) /*  (PIO_IFDR) Input Filter Disable */
01326 #define PIO_IFDR_P18 (0x1u << 18) /*  (PIO_IFDR) Input Filter Disable */
01327 #define PIO_IFDR_P19 (0x1u << 19) /*  (PIO_IFDR) Input Filter Disable */
01328 #define PIO_IFDR_P20 (0x1u << 20) /*  (PIO_IFDR) Input Filter Disable */
01329 #define PIO_IFDR_P21 (0x1u << 21) /*  (PIO_IFDR) Input Filter Disable */
01330 #define PIO_IFDR_P22 (0x1u << 22) /*  (PIO_IFDR) Input Filter Disable */
01331 #define PIO_IFDR_P23 (0x1u << 23) /*  (PIO_IFDR) Input Filter Disable */
01332 #define PIO_IFDR_P24 (0x1u << 24) /*  (PIO_IFDR) Input Filter Disable */
01333 #define PIO_IFDR_P25 (0x1u << 25) /*  (PIO_IFDR) Input Filter Disable */
01334 #define PIO_IFDR_P26 (0x1u << 26) /*  (PIO_IFDR) Input Filter Disable */
01335 #define PIO_IFDR_P27 (0x1u << 27) /*  (PIO_IFDR) Input Filter Disable */
01336 #define PIO_IFDR_P28 (0x1u << 28) /*  (PIO_IFDR) Input Filter Disable */
01337 #define PIO_IFDR_P29 (0x1u << 29) /*  (PIO_IFDR) Input Filter Disable */
01338 #define PIO_IFDR_P30 (0x1u << 30) /*  (PIO_IFDR) Input Filter Disable */
01339 #define PIO_IFDR_P31 (0x1u << 31) /*  (PIO_IFDR) Input Filter Disable */
01340 /* -------- PIO_IFSR : (PIO Offset: 0x0028) Glitch Input Filter Status Register -------- */
01341 #define PIO_IFSR_P0 (0x1u << 0) /*  (PIO_IFSR) Input Filer Status */
01342 #define PIO_IFSR_P1 (0x1u << 1) /*  (PIO_IFSR) Input Filer Status */
01343 #define PIO_IFSR_P2 (0x1u << 2) /*  (PIO_IFSR) Input Filer Status */
01344 #define PIO_IFSR_P3 (0x1u << 3) /*  (PIO_IFSR) Input Filer Status */
01345 #define PIO_IFSR_P4 (0x1u << 4) /*  (PIO_IFSR) Input Filer Status */
01346 #define PIO_IFSR_P5 (0x1u << 5) /*  (PIO_IFSR) Input Filer Status */
01347 #define PIO_IFSR_P6 (0x1u << 6) /*  (PIO_IFSR) Input Filer Status */
01348 #define PIO_IFSR_P7 (0x1u << 7) /*  (PIO_IFSR) Input Filer Status */
01349 #define PIO_IFSR_P8 (0x1u << 8) /*  (PIO_IFSR) Input Filer Status */
01350 #define PIO_IFSR_P9 (0x1u << 9) /*  (PIO_IFSR) Input Filer Status */
01351 #define PIO_IFSR_P10 (0x1u << 10) /*  (PIO_IFSR) Input Filer Status */
01352 #define PIO_IFSR_P11 (0x1u << 11) /*  (PIO_IFSR) Input Filer Status */
01353 #define PIO_IFSR_P12 (0x1u << 12) /*  (PIO_IFSR) Input Filer Status */
01354 #define PIO_IFSR_P13 (0x1u << 13) /*  (PIO_IFSR) Input Filer Status */
01355 #define PIO_IFSR_P14 (0x1u << 14) /*  (PIO_IFSR) Input Filer Status */
01356 #define PIO_IFSR_P15 (0x1u << 15) /*  (PIO_IFSR) Input Filer Status */
01357 #define PIO_IFSR_P16 (0x1u << 16) /*  (PIO_IFSR) Input Filer Status */
01358 #define PIO_IFSR_P17 (0x1u << 17) /*  (PIO_IFSR) Input Filer Status */
01359 #define PIO_IFSR_P18 (0x1u << 18) /*  (PIO_IFSR) Input Filer Status */
01360 #define PIO_IFSR_P19 (0x1u << 19) /*  (PIO_IFSR) Input Filer Status */
01361 #define PIO_IFSR_P20 (0x1u << 20) /*  (PIO_IFSR) Input Filer Status */
01362 #define PIO_IFSR_P21 (0x1u << 21) /*  (PIO_IFSR) Input Filer Status */
01363 #define PIO_IFSR_P22 (0x1u << 22) /*  (PIO_IFSR) Input Filer Status */
01364 #define PIO_IFSR_P23 (0x1u << 23) /*  (PIO_IFSR) Input Filer Status */
01365 #define PIO_IFSR_P24 (0x1u << 24) /*  (PIO_IFSR) Input Filer Status */
01366 #define PIO_IFSR_P25 (0x1u << 25) /*  (PIO_IFSR) Input Filer Status */
01367 #define PIO_IFSR_P26 (0x1u << 26) /*  (PIO_IFSR) Input Filer Status */
01368 #define PIO_IFSR_P27 (0x1u << 27) /*  (PIO_IFSR) Input Filer Status */
01369 #define PIO_IFSR_P28 (0x1u << 28) /*  (PIO_IFSR) Input Filer Status */
01370 #define PIO_IFSR_P29 (0x1u << 29) /*  (PIO_IFSR) Input Filer Status */
01371 #define PIO_IFSR_P30 (0x1u << 30) /*  (PIO_IFSR) Input Filer Status */
01372 #define PIO_IFSR_P31 (0x1u << 31) /*  (PIO_IFSR) Input Filer Status */
01373 /* -------- PIO_SODR : (PIO Offset: 0x0030) Set Output Data Register -------- */
01374 #define PIO_SODR_P0 (0x1u << 0) /*  (PIO_SODR) Set Output Data */
01375 #define PIO_SODR_P1 (0x1u << 1) /*  (PIO_SODR) Set Output Data */
01376 #define PIO_SODR_P2 (0x1u << 2) /*  (PIO_SODR) Set Output Data */
01377 #define PIO_SODR_P3 (0x1u << 3) /*  (PIO_SODR) Set Output Data */
01378 #define PIO_SODR_P4 (0x1u << 4) /*  (PIO_SODR) Set Output Data */
01379 #define PIO_SODR_P5 (0x1u << 5) /*  (PIO_SODR) Set Output Data */
01380 #define PIO_SODR_P6 (0x1u << 6) /*  (PIO_SODR) Set Output Data */
01381 #define PIO_SODR_P7 (0x1u << 7) /*  (PIO_SODR) Set Output Data */
01382 #define PIO_SODR_P8 (0x1u << 8) /*  (PIO_SODR) Set Output Data */
01383 #define PIO_SODR_P9 (0x1u << 9) /*  (PIO_SODR) Set Output Data */
01384 #define PIO_SODR_P10 (0x1u << 10) /*  (PIO_SODR) Set Output Data */
01385 #define PIO_SODR_P11 (0x1u << 11) /*  (PIO_SODR) Set Output Data */
01386 #define PIO_SODR_P12 (0x1u << 12) /*  (PIO_SODR) Set Output Data */
01387 #define PIO_SODR_P13 (0x1u << 13) /*  (PIO_SODR) Set Output Data */
01388 #define PIO_SODR_P14 (0x1u << 14) /*  (PIO_SODR) Set Output Data */
01389 #define PIO_SODR_P15 (0x1u << 15) /*  (PIO_SODR) Set Output Data */
01390 #define PIO_SODR_P16 (0x1u << 16) /*  (PIO_SODR) Set Output Data */
01391 #define PIO_SODR_P17 (0x1u << 17) /*  (PIO_SODR) Set Output Data */
01392 #define PIO_SODR_P18 (0x1u << 18) /*  (PIO_SODR) Set Output Data */
01393 #define PIO_SODR_P19 (0x1u << 19) /*  (PIO_SODR) Set Output Data */
01394 #define PIO_SODR_P20 (0x1u << 20) /*  (PIO_SODR) Set Output Data */
01395 #define PIO_SODR_P21 (0x1u << 21) /*  (PIO_SODR) Set Output Data */
01396 #define PIO_SODR_P22 (0x1u << 22) /*  (PIO_SODR) Set Output Data */
01397 #define PIO_SODR_P23 (0x1u << 23) /*  (PIO_SODR) Set Output Data */
01398 #define PIO_SODR_P24 (0x1u << 24) /*  (PIO_SODR) Set Output Data */
01399 #define PIO_SODR_P25 (0x1u << 25) /*  (PIO_SODR) Set Output Data */
01400 #define PIO_SODR_P26 (0x1u << 26) /*  (PIO_SODR) Set Output Data */
01401 #define PIO_SODR_P27 (0x1u << 27) /*  (PIO_SODR) Set Output Data */
01402 #define PIO_SODR_P28 (0x1u << 28) /*  (PIO_SODR) Set Output Data */
01403 #define PIO_SODR_P29 (0x1u << 29) /*  (PIO_SODR) Set Output Data */
01404 #define PIO_SODR_P30 (0x1u << 30) /*  (PIO_SODR) Set Output Data */
01405 #define PIO_SODR_P31 (0x1u << 31) /*  (PIO_SODR) Set Output Data */
01406 /* -------- PIO_CODR : (PIO Offset: 0x0034) Clear Output Data Register -------- */
01407 #define PIO_CODR_P0 (0x1u << 0) /*  (PIO_CODR) Clear Output Data */
01408 #define PIO_CODR_P1 (0x1u << 1) /*  (PIO_CODR) Clear Output Data */
01409 #define PIO_CODR_P2 (0x1u << 2) /*  (PIO_CODR) Clear Output Data */
01410 #define PIO_CODR_P3 (0x1u << 3) /*  (PIO_CODR) Clear Output Data */
01411 #define PIO_CODR_P4 (0x1u << 4) /*  (PIO_CODR) Clear Output Data */
01412 #define PIO_CODR_P5 (0x1u << 5) /*  (PIO_CODR) Clear Output Data */
01413 #define PIO_CODR_P6 (0x1u << 6) /*  (PIO_CODR) Clear Output Data */
01414 #define PIO_CODR_P7 (0x1u << 7) /*  (PIO_CODR) Clear Output Data */
01415 #define PIO_CODR_P8 (0x1u << 8) /*  (PIO_CODR) Clear Output Data */
01416 #define PIO_CODR_P9 (0x1u << 9) /*  (PIO_CODR) Clear Output Data */
01417 #define PIO_CODR_P10 (0x1u << 10) /*  (PIO_CODR) Clear Output Data */
01418 #define PIO_CODR_P11 (0x1u << 11) /*  (PIO_CODR) Clear Output Data */
01419 #define PIO_CODR_P12 (0x1u << 12) /*  (PIO_CODR) Clear Output Data */
01420 #define PIO_CODR_P13 (0x1u << 13) /*  (PIO_CODR) Clear Output Data */
01421 #define PIO_CODR_P14 (0x1u << 14) /*  (PIO_CODR) Clear Output Data */
01422 #define PIO_CODR_P15 (0x1u << 15) /*  (PIO_CODR) Clear Output Data */
01423 #define PIO_CODR_P16 (0x1u << 16) /*  (PIO_CODR) Clear Output Data */
01424 #define PIO_CODR_P17 (0x1u << 17) /*  (PIO_CODR) Clear Output Data */
01425 #define PIO_CODR_P18 (0x1u << 18) /*  (PIO_CODR) Clear Output Data */
01426 #define PIO_CODR_P19 (0x1u << 19) /*  (PIO_CODR) Clear Output Data */
01427 #define PIO_CODR_P20 (0x1u << 20) /*  (PIO_CODR) Clear Output Data */
01428 #define PIO_CODR_P21 (0x1u << 21) /*  (PIO_CODR) Clear Output Data */
01429 #define PIO_CODR_P22 (0x1u << 22) /*  (PIO_CODR) Clear Output Data */
01430 #define PIO_CODR_P23 (0x1u << 23) /*  (PIO_CODR) Clear Output Data */
01431 #define PIO_CODR_P24 (0x1u << 24) /*  (PIO_CODR) Clear Output Data */
01432 #define PIO_CODR_P25 (0x1u << 25) /*  (PIO_CODR) Clear Output Data */
01433 #define PIO_CODR_P26 (0x1u << 26) /*  (PIO_CODR) Clear Output Data */
01434 #define PIO_CODR_P27 (0x1u << 27) /*  (PIO_CODR) Clear Output Data */
01435 #define PIO_CODR_P28 (0x1u << 28) /*  (PIO_CODR) Clear Output Data */
01436 #define PIO_CODR_P29 (0x1u << 29) /*  (PIO_CODR) Clear Output Data */
01437 #define PIO_CODR_P30 (0x1u << 30) /*  (PIO_CODR) Clear Output Data */
01438 #define PIO_CODR_P31 (0x1u << 31) /*  (PIO_CODR) Clear Output Data */
01439 /* -------- PIO_ODSR : (PIO Offset: 0x0038) Output Data Status Register -------- */
01440 #define PIO_ODSR_P0 (0x1u << 0) /*  (PIO_ODSR) Output Data Status */
01441 #define PIO_ODSR_P1 (0x1u << 1) /*  (PIO_ODSR) Output Data Status */
01442 #define PIO_ODSR_P2 (0x1u << 2) /*  (PIO_ODSR) Output Data Status */
01443 #define PIO_ODSR_P3 (0x1u << 3) /*  (PIO_ODSR) Output Data Status */
01444 #define PIO_ODSR_P4 (0x1u << 4) /*  (PIO_ODSR) Output Data Status */
01445 #define PIO_ODSR_P5 (0x1u << 5) /*  (PIO_ODSR) Output Data Status */
01446 #define PIO_ODSR_P6 (0x1u << 6) /*  (PIO_ODSR) Output Data Status */
01447 #define PIO_ODSR_P7 (0x1u << 7) /*  (PIO_ODSR) Output Data Status */
01448 #define PIO_ODSR_P8 (0x1u << 8) /*  (PIO_ODSR) Output Data Status */
01449 #define PIO_ODSR_P9 (0x1u << 9) /*  (PIO_ODSR) Output Data Status */
01450 #define PIO_ODSR_P10 (0x1u << 10) /*  (PIO_ODSR) Output Data Status */
01451 #define PIO_ODSR_P11 (0x1u << 11) /*  (PIO_ODSR) Output Data Status */
01452 #define PIO_ODSR_P12 (0x1u << 12) /*  (PIO_ODSR) Output Data Status */
01453 #define PIO_ODSR_P13 (0x1u << 13) /*  (PIO_ODSR) Output Data Status */
01454 #define PIO_ODSR_P14 (0x1u << 14) /*  (PIO_ODSR) Output Data Status */
01455 #define PIO_ODSR_P15 (0x1u << 15) /*  (PIO_ODSR) Output Data Status */
01456 #define PIO_ODSR_P16 (0x1u << 16) /*  (PIO_ODSR) Output Data Status */
01457 #define PIO_ODSR_P17 (0x1u << 17) /*  (PIO_ODSR) Output Data Status */
01458 #define PIO_ODSR_P18 (0x1u << 18) /*  (PIO_ODSR) Output Data Status */
01459 #define PIO_ODSR_P19 (0x1u << 19) /*  (PIO_ODSR) Output Data Status */
01460 #define PIO_ODSR_P20 (0x1u << 20) /*  (PIO_ODSR) Output Data Status */
01461 #define PIO_ODSR_P21 (0x1u << 21) /*  (PIO_ODSR) Output Data Status */
01462 #define PIO_ODSR_P22 (0x1u << 22) /*  (PIO_ODSR) Output Data Status */
01463 #define PIO_ODSR_P23 (0x1u << 23) /*  (PIO_ODSR) Output Data Status */
01464 #define PIO_ODSR_P24 (0x1u << 24) /*  (PIO_ODSR) Output Data Status */
01465 #define PIO_ODSR_P25 (0x1u << 25) /*  (PIO_ODSR) Output Data Status */
01466 #define PIO_ODSR_P26 (0x1u << 26) /*  (PIO_ODSR) Output Data Status */
01467 #define PIO_ODSR_P27 (0x1u << 27) /*  (PIO_ODSR) Output Data Status */
01468 #define PIO_ODSR_P28 (0x1u << 28) /*  (PIO_ODSR) Output Data Status */
01469 #define PIO_ODSR_P29 (0x1u << 29) /*  (PIO_ODSR) Output Data Status */
01470 #define PIO_ODSR_P30 (0x1u << 30) /*  (PIO_ODSR) Output Data Status */
01471 #define PIO_ODSR_P31 (0x1u << 31) /*  (PIO_ODSR) Output Data Status */
01472 /* -------- PIO_PDSR : (PIO Offset: 0x003C) Pin Data Status Register -------- */
01473 #define PIO_PDSR_P0 (0x1u << 0) /*  (PIO_PDSR) Output Data Status */
01474 #define PIO_PDSR_P1 (0x1u << 1) /*  (PIO_PDSR) Output Data Status */
01475 #define PIO_PDSR_P2 (0x1u << 2) /*  (PIO_PDSR) Output Data Status */
01476 #define PIO_PDSR_P3 (0x1u << 3) /*  (PIO_PDSR) Output Data Status */
01477 #define PIO_PDSR_P4 (0x1u << 4) /*  (PIO_PDSR) Output Data Status */
01478 #define PIO_PDSR_P5 (0x1u << 5) /*  (PIO_PDSR) Output Data Status */
01479 #define PIO_PDSR_P6 (0x1u << 6) /*  (PIO_PDSR) Output Data Status */
01480 #define PIO_PDSR_P7 (0x1u << 7) /*  (PIO_PDSR) Output Data Status */
01481 #define PIO_PDSR_P8 (0x1u << 8) /*  (PIO_PDSR) Output Data Status */
01482 #define PIO_PDSR_P9 (0x1u << 9) /*  (PIO_PDSR) Output Data Status */
01483 #define PIO_PDSR_P10 (0x1u << 10) /*  (PIO_PDSR) Output Data Status */
01484 #define PIO_PDSR_P11 (0x1u << 11) /*  (PIO_PDSR) Output Data Status */
01485 #define PIO_PDSR_P12 (0x1u << 12) /*  (PIO_PDSR) Output Data Status */
01486 #define PIO_PDSR_P13 (0x1u << 13) /*  (PIO_PDSR) Output Data Status */
01487 #define PIO_PDSR_P14 (0x1u << 14) /*  (PIO_PDSR) Output Data Status */
01488 #define PIO_PDSR_P15 (0x1u << 15) /*  (PIO_PDSR) Output Data Status */
01489 #define PIO_PDSR_P16 (0x1u << 16) /*  (PIO_PDSR) Output Data Status */
01490 #define PIO_PDSR_P17 (0x1u << 17) /*  (PIO_PDSR) Output Data Status */
01491 #define PIO_PDSR_P18 (0x1u << 18) /*  (PIO_PDSR) Output Data Status */
01492 #define PIO_PDSR_P19 (0x1u << 19) /*  (PIO_PDSR) Output Data Status */
01493 #define PIO_PDSR_P20 (0x1u << 20) /*  (PIO_PDSR) Output Data Status */
01494 #define PIO_PDSR_P21 (0x1u << 21) /*  (PIO_PDSR) Output Data Status */
01495 #define PIO_PDSR_P22 (0x1u << 22) /*  (PIO_PDSR) Output Data Status */
01496 #define PIO_PDSR_P23 (0x1u << 23) /*  (PIO_PDSR) Output Data Status */
01497 #define PIO_PDSR_P24 (0x1u << 24) /*  (PIO_PDSR) Output Data Status */
01498 #define PIO_PDSR_P25 (0x1u << 25) /*  (PIO_PDSR) Output Data Status */
01499 #define PIO_PDSR_P26 (0x1u << 26) /*  (PIO_PDSR) Output Data Status */
01500 #define PIO_PDSR_P27 (0x1u << 27) /*  (PIO_PDSR) Output Data Status */
01501 #define PIO_PDSR_P28 (0x1u << 28) /*  (PIO_PDSR) Output Data Status */
01502 #define PIO_PDSR_P29 (0x1u << 29) /*  (PIO_PDSR) Output Data Status */
01503 #define PIO_PDSR_P30 (0x1u << 30) /*  (PIO_PDSR) Output Data Status */
01504 #define PIO_PDSR_P31 (0x1u << 31) /*  (PIO_PDSR) Output Data Status */
01505 /* -------- PIO_IER : (PIO Offset: 0x0040) Interrupt Enable Register -------- */
01506 #define PIO_IER_P0 (0x1u << 0) /*  (PIO_IER) Input Change Interrupt Enable */
01507 #define PIO_IER_P1 (0x1u << 1) /*  (PIO_IER) Input Change Interrupt Enable */
01508 #define PIO_IER_P2 (0x1u << 2) /*  (PIO_IER) Input Change Interrupt Enable */
01509 #define PIO_IER_P3 (0x1u << 3) /*  (PIO_IER) Input Change Interrupt Enable */
01510 #define PIO_IER_P4 (0x1u << 4) /*  (PIO_IER) Input Change Interrupt Enable */
01511 #define PIO_IER_P5 (0x1u << 5) /*  (PIO_IER) Input Change Interrupt Enable */
01512 #define PIO_IER_P6 (0x1u << 6) /*  (PIO_IER) Input Change Interrupt Enable */
01513 #define PIO_IER_P7 (0x1u << 7) /*  (PIO_IER) Input Change Interrupt Enable */
01514 #define PIO_IER_P8 (0x1u << 8) /*  (PIO_IER) Input Change Interrupt Enable */
01515 #define PIO_IER_P9 (0x1u << 9) /*  (PIO_IER) Input Change Interrupt Enable */
01516 #define PIO_IER_P10 (0x1u << 10) /*  (PIO_IER) Input Change Interrupt Enable */
01517 #define PIO_IER_P11 (0x1u << 11) /*  (PIO_IER) Input Change Interrupt Enable */
01518 #define PIO_IER_P12 (0x1u << 12) /*  (PIO_IER) Input Change Interrupt Enable */
01519 #define PIO_IER_P13 (0x1u << 13) /*  (PIO_IER) Input Change Interrupt Enable */
01520 #define PIO_IER_P14 (0x1u << 14) /*  (PIO_IER) Input Change Interrupt Enable */
01521 #define PIO_IER_P15 (0x1u << 15) /*  (PIO_IER) Input Change Interrupt Enable */
01522 #define PIO_IER_P16 (0x1u << 16) /*  (PIO_IER) Input Change Interrupt Enable */
01523 #define PIO_IER_P17 (0x1u << 17) /*  (PIO_IER) Input Change Interrupt Enable */
01524 #define PIO_IER_P18 (0x1u << 18) /*  (PIO_IER) Input Change Interrupt Enable */
01525 #define PIO_IER_P19 (0x1u << 19) /*  (PIO_IER) Input Change Interrupt Enable */
01526 #define PIO_IER_P20 (0x1u << 20) /*  (PIO_IER) Input Change Interrupt Enable */
01527 #define PIO_IER_P21 (0x1u << 21) /*  (PIO_IER) Input Change Interrupt Enable */
01528 #define PIO_IER_P22 (0x1u << 22) /*  (PIO_IER) Input Change Interrupt Enable */
01529 #define PIO_IER_P23 (0x1u << 23) /*  (PIO_IER) Input Change Interrupt Enable */
01530 #define PIO_IER_P24 (0x1u << 24) /*  (PIO_IER) Input Change Interrupt Enable */
01531 #define PIO_IER_P25 (0x1u << 25) /*  (PIO_IER) Input Change Interrupt Enable */
01532 #define PIO_IER_P26 (0x1u << 26) /*  (PIO_IER) Input Change Interrupt Enable */
01533 #define PIO_IER_P27 (0x1u << 27) /*  (PIO_IER) Input Change Interrupt Enable */
01534 #define PIO_IER_P28 (0x1u << 28) /*  (PIO_IER) Input Change Interrupt Enable */
01535 #define PIO_IER_P29 (0x1u << 29) /*  (PIO_IER) Input Change Interrupt Enable */
01536 #define PIO_IER_P30 (0x1u << 30) /*  (PIO_IER) Input Change Interrupt Enable */
01537 #define PIO_IER_P31 (0x1u << 31) /*  (PIO_IER) Input Change Interrupt Enable */
01538 /* -------- PIO_IDR : (PIO Offset: 0x0044) Interrupt Disable Register -------- */
01539 #define PIO_IDR_P0 (0x1u << 0) /*  (PIO_IDR) Input Change Interrupt Disable */
01540 #define PIO_IDR_P1 (0x1u << 1) /*  (PIO_IDR) Input Change Interrupt Disable */
01541 #define PIO_IDR_P2 (0x1u << 2) /*  (PIO_IDR) Input Change Interrupt Disable */
01542 #define PIO_IDR_P3 (0x1u << 3) /*  (PIO_IDR) Input Change Interrupt Disable */
01543 #define PIO_IDR_P4 (0x1u << 4) /*  (PIO_IDR) Input Change Interrupt Disable */
01544 #define PIO_IDR_P5 (0x1u << 5) /*  (PIO_IDR) Input Change Interrupt Disable */
01545 #define PIO_IDR_P6 (0x1u << 6) /*  (PIO_IDR) Input Change Interrupt Disable */
01546 #define PIO_IDR_P7 (0x1u << 7) /*  (PIO_IDR) Input Change Interrupt Disable */
01547 #define PIO_IDR_P8 (0x1u << 8) /*  (PIO_IDR) Input Change Interrupt Disable */
01548 #define PIO_IDR_P9 (0x1u << 9) /*  (PIO_IDR) Input Change Interrupt Disable */
01549 #define PIO_IDR_P10 (0x1u << 10) /*  (PIO_IDR) Input Change Interrupt Disable */
01550 #define PIO_IDR_P11 (0x1u << 11) /*  (PIO_IDR) Input Change Interrupt Disable */
01551 #define PIO_IDR_P12 (0x1u << 12) /*  (PIO_IDR) Input Change Interrupt Disable */
01552 #define PIO_IDR_P13 (0x1u << 13) /*  (PIO_IDR) Input Change Interrupt Disable */
01553 #define PIO_IDR_P14 (0x1u << 14) /*  (PIO_IDR) Input Change Interrupt Disable */
01554 #define PIO_IDR_P15 (0x1u << 15) /*  (PIO_IDR) Input Change Interrupt Disable */
01555 #define PIO_IDR_P16 (0x1u << 16) /*  (PIO_IDR) Input Change Interrupt Disable */
01556 #define PIO_IDR_P17 (0x1u << 17) /*  (PIO_IDR) Input Change Interrupt Disable */
01557 #define PIO_IDR_P18 (0x1u << 18) /*  (PIO_IDR) Input Change Interrupt Disable */
01558 #define PIO_IDR_P19 (0x1u << 19) /*  (PIO_IDR) Input Change Interrupt Disable */
01559 #define PIO_IDR_P20 (0x1u << 20) /*  (PIO_IDR) Input Change Interrupt Disable */
01560 #define PIO_IDR_P21 (0x1u << 21) /*  (PIO_IDR) Input Change Interrupt Disable */
01561 #define PIO_IDR_P22 (0x1u << 22) /*  (PIO_IDR) Input Change Interrupt Disable */
01562 #define PIO_IDR_P23 (0x1u << 23) /*  (PIO_IDR) Input Change Interrupt Disable */
01563 #define PIO_IDR_P24 (0x1u << 24) /*  (PIO_IDR) Input Change Interrupt Disable */
01564 #define PIO_IDR_P25 (0x1u << 25) /*  (PIO_IDR) Input Change Interrupt Disable */
01565 #define PIO_IDR_P26 (0x1u << 26) /*  (PIO_IDR) Input Change Interrupt Disable */
01566 #define PIO_IDR_P27 (0x1u << 27) /*  (PIO_IDR) Input Change Interrupt Disable */
01567 #define PIO_IDR_P28 (0x1u << 28) /*  (PIO_IDR) Input Change Interrupt Disable */
01568 #define PIO_IDR_P29 (0x1u << 29) /*  (PIO_IDR) Input Change Interrupt Disable */
01569 #define PIO_IDR_P30 (0x1u << 30) /*  (PIO_IDR) Input Change Interrupt Disable */
01570 #define PIO_IDR_P31 (0x1u << 31) /*  (PIO_IDR) Input Change Interrupt Disable */
01571 /* -------- PIO_IMR : (PIO Offset: 0x0048) Interrupt Mask Register -------- */
01572 #define PIO_IMR_P0 (0x1u << 0) /*  (PIO_IMR) Input Change Interrupt Mask */
01573 #define PIO_IMR_P1 (0x1u << 1) /*  (PIO_IMR) Input Change Interrupt Mask */
01574 #define PIO_IMR_P2 (0x1u << 2) /*  (PIO_IMR) Input Change Interrupt Mask */
01575 #define PIO_IMR_P3 (0x1u << 3) /*  (PIO_IMR) Input Change Interrupt Mask */
01576 #define PIO_IMR_P4 (0x1u << 4) /*  (PIO_IMR) Input Change Interrupt Mask */
01577 #define PIO_IMR_P5 (0x1u << 5) /*  (PIO_IMR) Input Change Interrupt Mask */
01578 #define PIO_IMR_P6 (0x1u << 6) /*  (PIO_IMR) Input Change Interrupt Mask */
01579 #define PIO_IMR_P7 (0x1u << 7) /*  (PIO_IMR) Input Change Interrupt Mask */
01580 #define PIO_IMR_P8 (0x1u << 8) /*  (PIO_IMR) Input Change Interrupt Mask */
01581 #define PIO_IMR_P9 (0x1u << 9) /*  (PIO_IMR) Input Change Interrupt Mask */
01582 #define PIO_IMR_P10 (0x1u << 10) /*  (PIO_IMR) Input Change Interrupt Mask */
01583 #define PIO_IMR_P11 (0x1u << 11) /*  (PIO_IMR) Input Change Interrupt Mask */
01584 #define PIO_IMR_P12 (0x1u << 12) /*  (PIO_IMR) Input Change Interrupt Mask */
01585 #define PIO_IMR_P13 (0x1u << 13) /*  (PIO_IMR) Input Change Interrupt Mask */
01586 #define PIO_IMR_P14 (0x1u << 14) /*  (PIO_IMR) Input Change Interrupt Mask */
01587 #define PIO_IMR_P15 (0x1u << 15) /*  (PIO_IMR) Input Change Interrupt Mask */
01588 #define PIO_IMR_P16 (0x1u << 16) /*  (PIO_IMR) Input Change Interrupt Mask */
01589 #define PIO_IMR_P17 (0x1u << 17) /*  (PIO_IMR) Input Change Interrupt Mask */
01590 #define PIO_IMR_P18 (0x1u << 18) /*  (PIO_IMR) Input Change Interrupt Mask */
01591 #define PIO_IMR_P19 (0x1u << 19) /*  (PIO_IMR) Input Change Interrupt Mask */
01592 #define PIO_IMR_P20 (0x1u << 20) /*  (PIO_IMR) Input Change Interrupt Mask */
01593 #define PIO_IMR_P21 (0x1u << 21) /*  (PIO_IMR) Input Change Interrupt Mask */
01594 #define PIO_IMR_P22 (0x1u << 22) /*  (PIO_IMR) Input Change Interrupt Mask */
01595 #define PIO_IMR_P23 (0x1u << 23) /*  (PIO_IMR) Input Change Interrupt Mask */
01596 #define PIO_IMR_P24 (0x1u << 24) /*  (PIO_IMR) Input Change Interrupt Mask */
01597 #define PIO_IMR_P25 (0x1u << 25) /*  (PIO_IMR) Input Change Interrupt Mask */
01598 #define PIO_IMR_P26 (0x1u << 26) /*  (PIO_IMR) Input Change Interrupt Mask */
01599 #define PIO_IMR_P27 (0x1u << 27) /*  (PIO_IMR) Input Change Interrupt Mask */
01600 #define PIO_IMR_P28 (0x1u << 28) /*  (PIO_IMR) Input Change Interrupt Mask */
01601 #define PIO_IMR_P29 (0x1u << 29) /*  (PIO_IMR) Input Change Interrupt Mask */
01602 #define PIO_IMR_P30 (0x1u << 30) /*  (PIO_IMR) Input Change Interrupt Mask */
01603 #define PIO_IMR_P31 (0x1u << 31) /*  (PIO_IMR) Input Change Interrupt Mask */
01604 /* -------- PIO_ISR : (PIO Offset: 0x004C) Interrupt Status Register -------- */
01605 #define PIO_ISR_P0 (0x1u << 0) /*  (PIO_ISR) Input Change Interrupt Status */
01606 #define PIO_ISR_P1 (0x1u << 1) /*  (PIO_ISR) Input Change Interrupt Status */
01607 #define PIO_ISR_P2 (0x1u << 2) /*  (PIO_ISR) Input Change Interrupt Status */
01608 #define PIO_ISR_P3 (0x1u << 3) /*  (PIO_ISR) Input Change Interrupt Status */
01609 #define PIO_ISR_P4 (0x1u << 4) /*  (PIO_ISR) Input Change Interrupt Status */
01610 #define PIO_ISR_P5 (0x1u << 5) /*  (PIO_ISR) Input Change Interrupt Status */
01611 #define PIO_ISR_P6 (0x1u << 6) /*  (PIO_ISR) Input Change Interrupt Status */
01612 #define PIO_ISR_P7 (0x1u << 7) /*  (PIO_ISR) Input Change Interrupt Status */
01613 #define PIO_ISR_P8 (0x1u << 8) /*  (PIO_ISR) Input Change Interrupt Status */
01614 #define PIO_ISR_P9 (0x1u << 9) /*  (PIO_ISR) Input Change Interrupt Status */
01615 #define PIO_ISR_P10 (0x1u << 10) /*  (PIO_ISR) Input Change Interrupt Status */
01616 #define PIO_ISR_P11 (0x1u << 11) /*  (PIO_ISR) Input Change Interrupt Status */
01617 #define PIO_ISR_P12 (0x1u << 12) /*  (PIO_ISR) Input Change Interrupt Status */
01618 #define PIO_ISR_P13 (0x1u << 13) /*  (PIO_ISR) Input Change Interrupt Status */
01619 #define PIO_ISR_P14 (0x1u << 14) /*  (PIO_ISR) Input Change Interrupt Status */
01620 #define PIO_ISR_P15 (0x1u << 15) /*  (PIO_ISR) Input Change Interrupt Status */
01621 #define PIO_ISR_P16 (0x1u << 16) /*  (PIO_ISR) Input Change Interrupt Status */
01622 #define PIO_ISR_P17 (0x1u << 17) /*  (PIO_ISR) Input Change Interrupt Status */
01623 #define PIO_ISR_P18 (0x1u << 18) /*  (PIO_ISR) Input Change Interrupt Status */
01624 #define PIO_ISR_P19 (0x1u << 19) /*  (PIO_ISR) Input Change Interrupt Status */
01625 #define PIO_ISR_P20 (0x1u << 20) /*  (PIO_ISR) Input Change Interrupt Status */
01626 #define PIO_ISR_P21 (0x1u << 21) /*  (PIO_ISR) Input Change Interrupt Status */
01627 #define PIO_ISR_P22 (0x1u << 22) /*  (PIO_ISR) Input Change Interrupt Status */
01628 #define PIO_ISR_P23 (0x1u << 23) /*  (PIO_ISR) Input Change Interrupt Status */
01629 #define PIO_ISR_P24 (0x1u << 24) /*  (PIO_ISR) Input Change Interrupt Status */
01630 #define PIO_ISR_P25 (0x1u << 25) /*  (PIO_ISR) Input Change Interrupt Status */
01631 #define PIO_ISR_P26 (0x1u << 26) /*  (PIO_ISR) Input Change Interrupt Status */
01632 #define PIO_ISR_P27 (0x1u << 27) /*  (PIO_ISR) Input Change Interrupt Status */
01633 #define PIO_ISR_P28 (0x1u << 28) /*  (PIO_ISR) Input Change Interrupt Status */
01634 #define PIO_ISR_P29 (0x1u << 29) /*  (PIO_ISR) Input Change Interrupt Status */
01635 #define PIO_ISR_P30 (0x1u << 30) /*  (PIO_ISR) Input Change Interrupt Status */
01636 #define PIO_ISR_P31 (0x1u << 31) /*  (PIO_ISR) Input Change Interrupt Status */
01637 /* -------- PIO_MDER : (PIO Offset: 0x0050) Multi-driver Enable Register -------- */
01638 #define PIO_MDER_P0 (0x1u << 0) /*  (PIO_MDER) Multi Drive Enable. */
01639 #define PIO_MDER_P1 (0x1u << 1) /*  (PIO_MDER) Multi Drive Enable. */
01640 #define PIO_MDER_P2 (0x1u << 2) /*  (PIO_MDER) Multi Drive Enable. */
01641 #define PIO_MDER_P3 (0x1u << 3) /*  (PIO_MDER) Multi Drive Enable. */
01642 #define PIO_MDER_P4 (0x1u << 4) /*  (PIO_MDER) Multi Drive Enable. */
01643 #define PIO_MDER_P5 (0x1u << 5) /*  (PIO_MDER) Multi Drive Enable. */
01644 #define PIO_MDER_P6 (0x1u << 6) /*  (PIO_MDER) Multi Drive Enable. */
01645 #define PIO_MDER_P7 (0x1u << 7) /*  (PIO_MDER) Multi Drive Enable. */
01646 #define PIO_MDER_P8 (0x1u << 8) /*  (PIO_MDER) Multi Drive Enable. */
01647 #define PIO_MDER_P9 (0x1u << 9) /*  (PIO_MDER) Multi Drive Enable. */
01648 #define PIO_MDER_P10 (0x1u << 10) /*  (PIO_MDER) Multi Drive Enable. */
01649 #define PIO_MDER_P11 (0x1u << 11) /*  (PIO_MDER) Multi Drive Enable. */
01650 #define PIO_MDER_P12 (0x1u << 12) /*  (PIO_MDER) Multi Drive Enable. */
01651 #define PIO_MDER_P13 (0x1u << 13) /*  (PIO_MDER) Multi Drive Enable. */
01652 #define PIO_MDER_P14 (0x1u << 14) /*  (PIO_MDER) Multi Drive Enable. */
01653 #define PIO_MDER_P15 (0x1u << 15) /*  (PIO_MDER) Multi Drive Enable. */
01654 #define PIO_MDER_P16 (0x1u << 16) /*  (PIO_MDER) Multi Drive Enable. */
01655 #define PIO_MDER_P17 (0x1u << 17) /*  (PIO_MDER) Multi Drive Enable. */
01656 #define PIO_MDER_P18 (0x1u << 18) /*  (PIO_MDER) Multi Drive Enable. */
01657 #define PIO_MDER_P19 (0x1u << 19) /*  (PIO_MDER) Multi Drive Enable. */
01658 #define PIO_MDER_P20 (0x1u << 20) /*  (PIO_MDER) Multi Drive Enable. */
01659 #define PIO_MDER_P21 (0x1u << 21) /*  (PIO_MDER) Multi Drive Enable. */
01660 #define PIO_MDER_P22 (0x1u << 22) /*  (PIO_MDER) Multi Drive Enable. */
01661 #define PIO_MDER_P23 (0x1u << 23) /*  (PIO_MDER) Multi Drive Enable. */
01662 #define PIO_MDER_P24 (0x1u << 24) /*  (PIO_MDER) Multi Drive Enable. */
01663 #define PIO_MDER_P25 (0x1u << 25) /*  (PIO_MDER) Multi Drive Enable. */
01664 #define PIO_MDER_P26 (0x1u << 26) /*  (PIO_MDER) Multi Drive Enable. */
01665 #define PIO_MDER_P27 (0x1u << 27) /*  (PIO_MDER) Multi Drive Enable. */
01666 #define PIO_MDER_P28 (0x1u << 28) /*  (PIO_MDER) Multi Drive Enable. */
01667 #define PIO_MDER_P29 (0x1u << 29) /*  (PIO_MDER) Multi Drive Enable. */
01668 #define PIO_MDER_P30 (0x1u << 30) /*  (PIO_MDER) Multi Drive Enable. */
01669 #define PIO_MDER_P31 (0x1u << 31) /*  (PIO_MDER) Multi Drive Enable. */
01670 /* -------- PIO_MDDR : (PIO Offset: 0x0054) Multi-driver Disable Register -------- */
01671 #define PIO_MDDR_P0 (0x1u << 0) /*  (PIO_MDDR) Multi Drive Disable. */
01672 #define PIO_MDDR_P1 (0x1u << 1) /*  (PIO_MDDR) Multi Drive Disable. */
01673 #define PIO_MDDR_P2 (0x1u << 2) /*  (PIO_MDDR) Multi Drive Disable. */
01674 #define PIO_MDDR_P3 (0x1u << 3) /*  (PIO_MDDR) Multi Drive Disable. */
01675 #define PIO_MDDR_P4 (0x1u << 4) /*  (PIO_MDDR) Multi Drive Disable. */
01676 #define PIO_MDDR_P5 (0x1u << 5) /*  (PIO_MDDR) Multi Drive Disable. */
01677 #define PIO_MDDR_P6 (0x1u << 6) /*  (PIO_MDDR) Multi Drive Disable. */
01678 #define PIO_MDDR_P7 (0x1u << 7) /*  (PIO_MDDR) Multi Drive Disable. */
01679 #define PIO_MDDR_P8 (0x1u << 8) /*  (PIO_MDDR) Multi Drive Disable. */
01680 #define PIO_MDDR_P9 (0x1u << 9) /*  (PIO_MDDR) Multi Drive Disable. */
01681 #define PIO_MDDR_P10 (0x1u << 10) /*  (PIO_MDDR) Multi Drive Disable. */
01682 #define PIO_MDDR_P11 (0x1u << 11) /*  (PIO_MDDR) Multi Drive Disable. */
01683 #define PIO_MDDR_P12 (0x1u << 12) /*  (PIO_MDDR) Multi Drive Disable. */
01684 #define PIO_MDDR_P13 (0x1u << 13) /*  (PIO_MDDR) Multi Drive Disable. */
01685 #define PIO_MDDR_P14 (0x1u << 14) /*  (PIO_MDDR) Multi Drive Disable. */
01686 #define PIO_MDDR_P15 (0x1u << 15) /*  (PIO_MDDR) Multi Drive Disable. */
01687 #define PIO_MDDR_P16 (0x1u << 16) /*  (PIO_MDDR) Multi Drive Disable. */
01688 #define PIO_MDDR_P17 (0x1u << 17) /*  (PIO_MDDR) Multi Drive Disable. */
01689 #define PIO_MDDR_P18 (0x1u << 18) /*  (PIO_MDDR) Multi Drive Disable. */
01690 #define PIO_MDDR_P19 (0x1u << 19) /*  (PIO_MDDR) Multi Drive Disable. */
01691 #define PIO_MDDR_P20 (0x1u << 20) /*  (PIO_MDDR) Multi Drive Disable. */
01692 #define PIO_MDDR_P21 (0x1u << 21) /*  (PIO_MDDR) Multi Drive Disable. */
01693 #define PIO_MDDR_P22 (0x1u << 22) /*  (PIO_MDDR) Multi Drive Disable. */
01694 #define PIO_MDDR_P23 (0x1u << 23) /*  (PIO_MDDR) Multi Drive Disable. */
01695 #define PIO_MDDR_P24 (0x1u << 24) /*  (PIO_MDDR) Multi Drive Disable. */
01696 #define PIO_MDDR_P25 (0x1u << 25) /*  (PIO_MDDR) Multi Drive Disable. */
01697 #define PIO_MDDR_P26 (0x1u << 26) /*  (PIO_MDDR) Multi Drive Disable. */
01698 #define PIO_MDDR_P27 (0x1u << 27) /*  (PIO_MDDR) Multi Drive Disable. */
01699 #define PIO_MDDR_P28 (0x1u << 28) /*  (PIO_MDDR) Multi Drive Disable. */
01700 #define PIO_MDDR_P29 (0x1u << 29) /*  (PIO_MDDR) Multi Drive Disable. */
01701 #define PIO_MDDR_P30 (0x1u << 30) /*  (PIO_MDDR) Multi Drive Disable. */
01702 #define PIO_MDDR_P31 (0x1u << 31) /*  (PIO_MDDR) Multi Drive Disable. */
01703 /* -------- PIO_MDSR : (PIO Offset: 0x0058) Multi-driver Status Register -------- */
01704 #define PIO_MDSR_P0 (0x1u << 0) /*  (PIO_MDSR) Multi Drive Status. */
01705 #define PIO_MDSR_P1 (0x1u << 1) /*  (PIO_MDSR) Multi Drive Status. */
01706 #define PIO_MDSR_P2 (0x1u << 2) /*  (PIO_MDSR) Multi Drive Status. */
01707 #define PIO_MDSR_P3 (0x1u << 3) /*  (PIO_MDSR) Multi Drive Status. */
01708 #define PIO_MDSR_P4 (0x1u << 4) /*  (PIO_MDSR) Multi Drive Status. */
01709 #define PIO_MDSR_P5 (0x1u << 5) /*  (PIO_MDSR) Multi Drive Status. */
01710 #define PIO_MDSR_P6 (0x1u << 6) /*  (PIO_MDSR) Multi Drive Status. */
01711 #define PIO_MDSR_P7 (0x1u << 7) /*  (PIO_MDSR) Multi Drive Status. */
01712 #define PIO_MDSR_P8 (0x1u << 8) /*  (PIO_MDSR) Multi Drive Status. */
01713 #define PIO_MDSR_P9 (0x1u << 9) /*  (PIO_MDSR) Multi Drive Status. */
01714 #define PIO_MDSR_P10 (0x1u << 10) /*  (PIO_MDSR) Multi Drive Status. */
01715 #define PIO_MDSR_P11 (0x1u << 11) /*  (PIO_MDSR) Multi Drive Status. */
01716 #define PIO_MDSR_P12 (0x1u << 12) /*  (PIO_MDSR) Multi Drive Status. */
01717 #define PIO_MDSR_P13 (0x1u << 13) /*  (PIO_MDSR) Multi Drive Status. */
01718 #define PIO_MDSR_P14 (0x1u << 14) /*  (PIO_MDSR) Multi Drive Status. */
01719 #define PIO_MDSR_P15 (0x1u << 15) /*  (PIO_MDSR) Multi Drive Status. */
01720 #define PIO_MDSR_P16 (0x1u << 16) /*  (PIO_MDSR) Multi Drive Status. */
01721 #define PIO_MDSR_P17 (0x1u << 17) /*  (PIO_MDSR) Multi Drive Status. */
01722 #define PIO_MDSR_P18 (0x1u << 18) /*  (PIO_MDSR) Multi Drive Status. */
01723 #define PIO_MDSR_P19 (0x1u << 19) /*  (PIO_MDSR) Multi Drive Status. */
01724 #define PIO_MDSR_P20 (0x1u << 20) /*  (PIO_MDSR) Multi Drive Status. */
01725 #define PIO_MDSR_P21 (0x1u << 21) /*  (PIO_MDSR) Multi Drive Status. */
01726 #define PIO_MDSR_P22 (0x1u << 22) /*  (PIO_MDSR) Multi Drive Status. */
01727 #define PIO_MDSR_P23 (0x1u << 23) /*  (PIO_MDSR) Multi Drive Status. */
01728 #define PIO_MDSR_P24 (0x1u << 24) /*  (PIO_MDSR) Multi Drive Status. */
01729 #define PIO_MDSR_P25 (0x1u << 25) /*  (PIO_MDSR) Multi Drive Status. */
01730 #define PIO_MDSR_P26 (0x1u << 26) /*  (PIO_MDSR) Multi Drive Status. */
01731 #define PIO_MDSR_P27 (0x1u << 27) /*  (PIO_MDSR) Multi Drive Status. */
01732 #define PIO_MDSR_P28 (0x1u << 28) /*  (PIO_MDSR) Multi Drive Status. */
01733 #define PIO_MDSR_P29 (0x1u << 29) /*  (PIO_MDSR) Multi Drive Status. */
01734 #define PIO_MDSR_P30 (0x1u << 30) /*  (PIO_MDSR) Multi Drive Status. */
01735 #define PIO_MDSR_P31 (0x1u << 31) /*  (PIO_MDSR) Multi Drive Status. */
01736 /* -------- PIO_PUDR : (PIO Offset: 0x0060) Pull-up Disable Register -------- */
01737 #define PIO_PUDR_P0 (0x1u << 0) /*  (PIO_PUDR) Pull Up Disable. */
01738 #define PIO_PUDR_P1 (0x1u << 1) /*  (PIO_PUDR) Pull Up Disable. */
01739 #define PIO_PUDR_P2 (0x1u << 2) /*  (PIO_PUDR) Pull Up Disable. */
01740 #define PIO_PUDR_P3 (0x1u << 3) /*  (PIO_PUDR) Pull Up Disable. */
01741 #define PIO_PUDR_P4 (0x1u << 4) /*  (PIO_PUDR) Pull Up Disable. */
01742 #define PIO_PUDR_P5 (0x1u << 5) /*  (PIO_PUDR) Pull Up Disable. */
01743 #define PIO_PUDR_P6 (0x1u << 6) /*  (PIO_PUDR) Pull Up Disable. */
01744 #define PIO_PUDR_P7 (0x1u << 7) /*  (PIO_PUDR) Pull Up Disable. */
01745 #define PIO_PUDR_P8 (0x1u << 8) /*  (PIO_PUDR) Pull Up Disable. */
01746 #define PIO_PUDR_P9 (0x1u << 9) /*  (PIO_PUDR) Pull Up Disable. */
01747 #define PIO_PUDR_P10 (0x1u << 10) /*  (PIO_PUDR) Pull Up Disable. */
01748 #define PIO_PUDR_P11 (0x1u << 11) /*  (PIO_PUDR) Pull Up Disable. */
01749 #define PIO_PUDR_P12 (0x1u << 12) /*  (PIO_PUDR) Pull Up Disable. */
01750 #define PIO_PUDR_P13 (0x1u << 13) /*  (PIO_PUDR) Pull Up Disable. */
01751 #define PIO_PUDR_P14 (0x1u << 14) /*  (PIO_PUDR) Pull Up Disable. */
01752 #define PIO_PUDR_P15 (0x1u << 15) /*  (PIO_PUDR) Pull Up Disable. */
01753 #define PIO_PUDR_P16 (0x1u << 16) /*  (PIO_PUDR) Pull Up Disable. */
01754 #define PIO_PUDR_P17 (0x1u << 17) /*  (PIO_PUDR) Pull Up Disable. */
01755 #define PIO_PUDR_P18 (0x1u << 18) /*  (PIO_PUDR) Pull Up Disable. */
01756 #define PIO_PUDR_P19 (0x1u << 19) /*  (PIO_PUDR) Pull Up Disable. */
01757 #define PIO_PUDR_P20 (0x1u << 20) /*  (PIO_PUDR) Pull Up Disable. */
01758 #define PIO_PUDR_P21 (0x1u << 21) /*  (PIO_PUDR) Pull Up Disable. */
01759 #define PIO_PUDR_P22 (0x1u << 22) /*  (PIO_PUDR) Pull Up Disable. */
01760 #define PIO_PUDR_P23 (0x1u << 23) /*  (PIO_PUDR) Pull Up Disable. */
01761 #define PIO_PUDR_P24 (0x1u << 24) /*  (PIO_PUDR) Pull Up Disable. */
01762 #define PIO_PUDR_P25 (0x1u << 25) /*  (PIO_PUDR) Pull Up Disable. */
01763 #define PIO_PUDR_P26 (0x1u << 26) /*  (PIO_PUDR) Pull Up Disable. */
01764 #define PIO_PUDR_P27 (0x1u << 27) /*  (PIO_PUDR) Pull Up Disable. */
01765 #define PIO_PUDR_P28 (0x1u << 28) /*  (PIO_PUDR) Pull Up Disable. */
01766 #define PIO_PUDR_P29 (0x1u << 29) /*  (PIO_PUDR) Pull Up Disable. */
01767 #define PIO_PUDR_P30 (0x1u << 30) /*  (PIO_PUDR) Pull Up Disable. */
01768 #define PIO_PUDR_P31 (0x1u << 31) /*  (PIO_PUDR) Pull Up Disable. */
01769 /* -------- PIO_PUER : (PIO Offset: 0x0064) Pull-up Enable Register -------- */
01770 #define PIO_PUER_P0 (0x1u << 0) /*  (PIO_PUER) Pull Up Enable. */
01771 #define PIO_PUER_P1 (0x1u << 1) /*  (PIO_PUER) Pull Up Enable. */
01772 #define PIO_PUER_P2 (0x1u << 2) /*  (PIO_PUER) Pull Up Enable. */
01773 #define PIO_PUER_P3 (0x1u << 3) /*  (PIO_PUER) Pull Up Enable. */
01774 #define PIO_PUER_P4 (0x1u << 4) /*  (PIO_PUER) Pull Up Enable. */
01775 #define PIO_PUER_P5 (0x1u << 5) /*  (PIO_PUER) Pull Up Enable. */
01776 #define PIO_PUER_P6 (0x1u << 6) /*  (PIO_PUER) Pull Up Enable. */
01777 #define PIO_PUER_P7 (0x1u << 7) /*  (PIO_PUER) Pull Up Enable. */
01778 #define PIO_PUER_P8 (0x1u << 8) /*  (PIO_PUER) Pull Up Enable. */
01779 #define PIO_PUER_P9 (0x1u << 9) /*  (PIO_PUER) Pull Up Enable. */
01780 #define PIO_PUER_P10 (0x1u << 10) /*  (PIO_PUER) Pull Up Enable. */
01781 #define PIO_PUER_P11 (0x1u << 11) /*  (PIO_PUER) Pull Up Enable. */
01782 #define PIO_PUER_P12 (0x1u << 12) /*  (PIO_PUER) Pull Up Enable. */
01783 #define PIO_PUER_P13 (0x1u << 13) /*  (PIO_PUER) Pull Up Enable. */
01784 #define PIO_PUER_P14 (0x1u << 14) /*  (PIO_PUER) Pull Up Enable. */
01785 #define PIO_PUER_P15 (0x1u << 15) /*  (PIO_PUER) Pull Up Enable. */
01786 #define PIO_PUER_P16 (0x1u << 16) /*  (PIO_PUER) Pull Up Enable. */
01787 #define PIO_PUER_P17 (0x1u << 17) /*  (PIO_PUER) Pull Up Enable. */
01788 #define PIO_PUER_P18 (0x1u << 18) /*  (PIO_PUER) Pull Up Enable. */
01789 #define PIO_PUER_P19 (0x1u << 19) /*  (PIO_PUER) Pull Up Enable. */
01790 #define PIO_PUER_P20 (0x1u << 20) /*  (PIO_PUER) Pull Up Enable. */
01791 #define PIO_PUER_P21 (0x1u << 21) /*  (PIO_PUER) Pull Up Enable. */
01792 #define PIO_PUER_P22 (0x1u << 22) /*  (PIO_PUER) Pull Up Enable. */
01793 #define PIO_PUER_P23 (0x1u << 23) /*  (PIO_PUER) Pull Up Enable. */
01794 #define PIO_PUER_P24 (0x1u << 24) /*  (PIO_PUER) Pull Up Enable. */
01795 #define PIO_PUER_P25 (0x1u << 25) /*  (PIO_PUER) Pull Up Enable. */
01796 #define PIO_PUER_P26 (0x1u << 26) /*  (PIO_PUER) Pull Up Enable. */
01797 #define PIO_PUER_P27 (0x1u << 27) /*  (PIO_PUER) Pull Up Enable. */
01798 #define PIO_PUER_P28 (0x1u << 28) /*  (PIO_PUER) Pull Up Enable. */
01799 #define PIO_PUER_P29 (0x1u << 29) /*  (PIO_PUER) Pull Up Enable. */
01800 #define PIO_PUER_P30 (0x1u << 30) /*  (PIO_PUER) Pull Up Enable. */
01801 #define PIO_PUER_P31 (0x1u << 31) /*  (PIO_PUER) Pull Up Enable. */
01802 /* -------- PIO_PUSR : (PIO Offset: 0x0068) Pad Pull-up Status Register -------- */
01803 #define PIO_PUSR_P0 (0x1u << 0) /*  (PIO_PUSR) Pull Up Status. */
01804 #define PIO_PUSR_P1 (0x1u << 1) /*  (PIO_PUSR) Pull Up Status. */
01805 #define PIO_PUSR_P2 (0x1u << 2) /*  (PIO_PUSR) Pull Up Status. */
01806 #define PIO_PUSR_P3 (0x1u << 3) /*  (PIO_PUSR) Pull Up Status. */
01807 #define PIO_PUSR_P4 (0x1u << 4) /*  (PIO_PUSR) Pull Up Status. */
01808 #define PIO_PUSR_P5 (0x1u << 5) /*  (PIO_PUSR) Pull Up Status. */
01809 #define PIO_PUSR_P6 (0x1u << 6) /*  (PIO_PUSR) Pull Up Status. */
01810 #define PIO_PUSR_P7 (0x1u << 7) /*  (PIO_PUSR) Pull Up Status. */
01811 #define PIO_PUSR_P8 (0x1u << 8) /*  (PIO_PUSR) Pull Up Status. */
01812 #define PIO_PUSR_P9 (0x1u << 9) /*  (PIO_PUSR) Pull Up Status. */
01813 #define PIO_PUSR_P10 (0x1u << 10) /*  (PIO_PUSR) Pull Up Status. */
01814 #define PIO_PUSR_P11 (0x1u << 11) /*  (PIO_PUSR) Pull Up Status. */
01815 #define PIO_PUSR_P12 (0x1u << 12) /*  (PIO_PUSR) Pull Up Status. */
01816 #define PIO_PUSR_P13 (0x1u << 13) /*  (PIO_PUSR) Pull Up Status. */
01817 #define PIO_PUSR_P14 (0x1u << 14) /*  (PIO_PUSR) Pull Up Status. */
01818 #define PIO_PUSR_P15 (0x1u << 15) /*  (PIO_PUSR) Pull Up Status. */
01819 #define PIO_PUSR_P16 (0x1u << 16) /*  (PIO_PUSR) Pull Up Status. */
01820 #define PIO_PUSR_P17 (0x1u << 17) /*  (PIO_PUSR) Pull Up Status. */
01821 #define PIO_PUSR_P18 (0x1u << 18) /*  (PIO_PUSR) Pull Up Status. */
01822 #define PIO_PUSR_P19 (0x1u << 19) /*  (PIO_PUSR) Pull Up Status. */
01823 #define PIO_PUSR_P20 (0x1u << 20) /*  (PIO_PUSR) Pull Up Status. */
01824 #define PIO_PUSR_P21 (0x1u << 21) /*  (PIO_PUSR) Pull Up Status. */
01825 #define PIO_PUSR_P22 (0x1u << 22) /*  (PIO_PUSR) Pull Up Status. */
01826 #define PIO_PUSR_P23 (0x1u << 23) /*  (PIO_PUSR) Pull Up Status. */
01827 #define PIO_PUSR_P24 (0x1u << 24) /*  (PIO_PUSR) Pull Up Status. */
01828 #define PIO_PUSR_P25 (0x1u << 25) /*  (PIO_PUSR) Pull Up Status. */
01829 #define PIO_PUSR_P26 (0x1u << 26) /*  (PIO_PUSR) Pull Up Status. */
01830 #define PIO_PUSR_P27 (0x1u << 27) /*  (PIO_PUSR) Pull Up Status. */
01831 #define PIO_PUSR_P28 (0x1u << 28) /*  (PIO_PUSR) Pull Up Status. */
01832 #define PIO_PUSR_P29 (0x1u << 29) /*  (PIO_PUSR) Pull Up Status. */
01833 #define PIO_PUSR_P30 (0x1u << 30) /*  (PIO_PUSR) Pull Up Status. */
01834 #define PIO_PUSR_P31 (0x1u << 31) /*  (PIO_PUSR) Pull Up Status. */
01835 /* -------- PIO_ABCDSR[2] : (PIO Offset: 0x0070) Peripheral Select Register -------- */
01836 #define PIO_ABCDSR_P0 (0x1u << 0) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01837 #define PIO_ABCDSR_P1 (0x1u << 1) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01838 #define PIO_ABCDSR_P2 (0x1u << 2) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01839 #define PIO_ABCDSR_P3 (0x1u << 3) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01840 #define PIO_ABCDSR_P4 (0x1u << 4) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01841 #define PIO_ABCDSR_P5 (0x1u << 5) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01842 #define PIO_ABCDSR_P6 (0x1u << 6) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01843 #define PIO_ABCDSR_P7 (0x1u << 7) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01844 #define PIO_ABCDSR_P8 (0x1u << 8) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01845 #define PIO_ABCDSR_P9 (0x1u << 9) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01846 #define PIO_ABCDSR_P10 (0x1u << 10) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01847 #define PIO_ABCDSR_P11 (0x1u << 11) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01848 #define PIO_ABCDSR_P12 (0x1u << 12) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01849 #define PIO_ABCDSR_P13 (0x1u << 13) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01850 #define PIO_ABCDSR_P14 (0x1u << 14) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01851 #define PIO_ABCDSR_P15 (0x1u << 15) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01852 #define PIO_ABCDSR_P16 (0x1u << 16) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01853 #define PIO_ABCDSR_P17 (0x1u << 17) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01854 #define PIO_ABCDSR_P18 (0x1u << 18) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01855 #define PIO_ABCDSR_P19 (0x1u << 19) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01856 #define PIO_ABCDSR_P20 (0x1u << 20) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01857 #define PIO_ABCDSR_P21 (0x1u << 21) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01858 #define PIO_ABCDSR_P22 (0x1u << 22) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01859 #define PIO_ABCDSR_P23 (0x1u << 23) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01860 #define PIO_ABCDSR_P24 (0x1u << 24) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01861 #define PIO_ABCDSR_P25 (0x1u << 25) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01862 #define PIO_ABCDSR_P26 (0x1u << 26) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01863 #define PIO_ABCDSR_P27 (0x1u << 27) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01864 #define PIO_ABCDSR_P28 (0x1u << 28) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01865 #define PIO_ABCDSR_P29 (0x1u << 29) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01866 #define PIO_ABCDSR_P30 (0x1u << 30) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01867 #define PIO_ABCDSR_P31 (0x1u << 31) /*  (PIO_ABCDSR[2]) Peripheral Select. */
01868 /* -------- PIO_IFSCDR : (PIO Offset: 0x0080) Input Filter Slow Clock Disable Register -------- */
01869 #define PIO_IFSCDR_P0 (0x1u << 0) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01870 #define PIO_IFSCDR_P1 (0x1u << 1) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01871 #define PIO_IFSCDR_P2 (0x1u << 2) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01872 #define PIO_IFSCDR_P3 (0x1u << 3) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01873 #define PIO_IFSCDR_P4 (0x1u << 4) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01874 #define PIO_IFSCDR_P5 (0x1u << 5) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01875 #define PIO_IFSCDR_P6 (0x1u << 6) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01876 #define PIO_IFSCDR_P7 (0x1u << 7) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01877 #define PIO_IFSCDR_P8 (0x1u << 8) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01878 #define PIO_IFSCDR_P9 (0x1u << 9) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01879 #define PIO_IFSCDR_P10 (0x1u << 10) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01880 #define PIO_IFSCDR_P11 (0x1u << 11) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01881 #define PIO_IFSCDR_P12 (0x1u << 12) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01882 #define PIO_IFSCDR_P13 (0x1u << 13) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01883 #define PIO_IFSCDR_P14 (0x1u << 14) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01884 #define PIO_IFSCDR_P15 (0x1u << 15) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01885 #define PIO_IFSCDR_P16 (0x1u << 16) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01886 #define PIO_IFSCDR_P17 (0x1u << 17) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01887 #define PIO_IFSCDR_P18 (0x1u << 18) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01888 #define PIO_IFSCDR_P19 (0x1u << 19) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01889 #define PIO_IFSCDR_P20 (0x1u << 20) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01890 #define PIO_IFSCDR_P21 (0x1u << 21) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01891 #define PIO_IFSCDR_P22 (0x1u << 22) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01892 #define PIO_IFSCDR_P23 (0x1u << 23) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01893 #define PIO_IFSCDR_P24 (0x1u << 24) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01894 #define PIO_IFSCDR_P25 (0x1u << 25) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01895 #define PIO_IFSCDR_P26 (0x1u << 26) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01896 #define PIO_IFSCDR_P27 (0x1u << 27) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01897 #define PIO_IFSCDR_P28 (0x1u << 28) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01898 #define PIO_IFSCDR_P29 (0x1u << 29) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01899 #define PIO_IFSCDR_P30 (0x1u << 30) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01900 #define PIO_IFSCDR_P31 (0x1u << 31) /*  (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */
01901 /* -------- PIO_IFSCER : (PIO Offset: 0x0084) Input Filter Slow Clock Enable Register -------- */
01902 #define PIO_IFSCER_P0 (0x1u << 0) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01903 #define PIO_IFSCER_P1 (0x1u << 1) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01904 #define PIO_IFSCER_P2 (0x1u << 2) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01905 #define PIO_IFSCER_P3 (0x1u << 3) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01906 #define PIO_IFSCER_P4 (0x1u << 4) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01907 #define PIO_IFSCER_P5 (0x1u << 5) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01908 #define PIO_IFSCER_P6 (0x1u << 6) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01909 #define PIO_IFSCER_P7 (0x1u << 7) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01910 #define PIO_IFSCER_P8 (0x1u << 8) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01911 #define PIO_IFSCER_P9 (0x1u << 9) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01912 #define PIO_IFSCER_P10 (0x1u << 10) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01913 #define PIO_IFSCER_P11 (0x1u << 11) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01914 #define PIO_IFSCER_P12 (0x1u << 12) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01915 #define PIO_IFSCER_P13 (0x1u << 13) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01916 #define PIO_IFSCER_P14 (0x1u << 14) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01917 #define PIO_IFSCER_P15 (0x1u << 15) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01918 #define PIO_IFSCER_P16 (0x1u << 16) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01919 #define PIO_IFSCER_P17 (0x1u << 17) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01920 #define PIO_IFSCER_P18 (0x1u << 18) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01921 #define PIO_IFSCER_P19 (0x1u << 19) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01922 #define PIO_IFSCER_P20 (0x1u << 20) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01923 #define PIO_IFSCER_P21 (0x1u << 21) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01924 #define PIO_IFSCER_P22 (0x1u << 22) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01925 #define PIO_IFSCER_P23 (0x1u << 23) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01926 #define PIO_IFSCER_P24 (0x1u << 24) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01927 #define PIO_IFSCER_P25 (0x1u << 25) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01928 #define PIO_IFSCER_P26 (0x1u << 26) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01929 #define PIO_IFSCER_P27 (0x1u << 27) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01930 #define PIO_IFSCER_P28 (0x1u << 28) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01931 #define PIO_IFSCER_P29 (0x1u << 29) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01932 #define PIO_IFSCER_P30 (0x1u << 30) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01933 #define PIO_IFSCER_P31 (0x1u << 31) /*  (PIO_IFSCER) Debouncing Filtering Select. */
01934 /* -------- PIO_IFSCSR : (PIO Offset: 0x0088) Input Filter Slow Clock Status Register -------- */
01935 #define PIO_IFSCSR_P0 (0x1u << 0) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01936 #define PIO_IFSCSR_P1 (0x1u << 1) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01937 #define PIO_IFSCSR_P2 (0x1u << 2) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01938 #define PIO_IFSCSR_P3 (0x1u << 3) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01939 #define PIO_IFSCSR_P4 (0x1u << 4) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01940 #define PIO_IFSCSR_P5 (0x1u << 5) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01941 #define PIO_IFSCSR_P6 (0x1u << 6) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01942 #define PIO_IFSCSR_P7 (0x1u << 7) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01943 #define PIO_IFSCSR_P8 (0x1u << 8) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01944 #define PIO_IFSCSR_P9 (0x1u << 9) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01945 #define PIO_IFSCSR_P10 (0x1u << 10) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01946 #define PIO_IFSCSR_P11 (0x1u << 11) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01947 #define PIO_IFSCSR_P12 (0x1u << 12) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01948 #define PIO_IFSCSR_P13 (0x1u << 13) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01949 #define PIO_IFSCSR_P14 (0x1u << 14) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01950 #define PIO_IFSCSR_P15 (0x1u << 15) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01951 #define PIO_IFSCSR_P16 (0x1u << 16) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01952 #define PIO_IFSCSR_P17 (0x1u << 17) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01953 #define PIO_IFSCSR_P18 (0x1u << 18) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01954 #define PIO_IFSCSR_P19 (0x1u << 19) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01955 #define PIO_IFSCSR_P20 (0x1u << 20) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01956 #define PIO_IFSCSR_P21 (0x1u << 21) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01957 #define PIO_IFSCSR_P22 (0x1u << 22) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01958 #define PIO_IFSCSR_P23 (0x1u << 23) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01959 #define PIO_IFSCSR_P24 (0x1u << 24) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01960 #define PIO_IFSCSR_P25 (0x1u << 25) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01961 #define PIO_IFSCSR_P26 (0x1u << 26) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01962 #define PIO_IFSCSR_P27 (0x1u << 27) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01963 #define PIO_IFSCSR_P28 (0x1u << 28) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01964 #define PIO_IFSCSR_P29 (0x1u << 29) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01965 #define PIO_IFSCSR_P30 (0x1u << 30) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01966 #define PIO_IFSCSR_P31 (0x1u << 31) /*  (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */
01967 /* -------- PIO_SCDR : (PIO Offset: 0x008C) Slow Clock Divider Debouncing Register -------- */
01968 #define PIO_SCDR_DIV0 (0x1u << 0) /*  (PIO_SCDR) Slow Clock Divider Selection for Debouncing */
01969 #define PIO_SCDR_DIV1 (0x1u << 1) /*  (PIO_SCDR) Slow Clock Divider Selection for Debouncing */
01970 #define PIO_SCDR_DIV2 (0x1u << 2) /*  (PIO_SCDR) Slow Clock Divider Selection for Debouncing */
01971 #define PIO_SCDR_DIV3 (0x1u << 3) /*  (PIO_SCDR) Slow Clock Divider Selection for Debouncing */
01972 #define PIO_SCDR_DIV4 (0x1u << 4) /*  (PIO_SCDR) Slow Clock Divider Selection for Debouncing */
01973 #define PIO_SCDR_DIV5 (0x1u << 5) /*  (PIO_SCDR) Slow Clock Divider Selection for Debouncing */
01974 #define PIO_SCDR_DIV6 (0x1u << 6) /*  (PIO_SCDR) Slow Clock Divider Selection for Debouncing */
01975 #define PIO_SCDR_DIV7 (0x1u << 7) /*  (PIO_SCDR) Slow Clock Divider Selection for Debouncing */
01976 #define PIO_SCDR_DIV8 (0x1u << 8) /*  (PIO_SCDR) Slow Clock Divider Selection for Debouncing */
01977 #define PIO_SCDR_DIV9 (0x1u << 9) /*  (PIO_SCDR) Slow Clock Divider Selection for Debouncing */
01978 #define PIO_SCDR_DIV10 (0x1u << 10) /*  (PIO_SCDR) Slow Clock Divider Selection for Debouncing */
01979 #define PIO_SCDR_DIV11 (0x1u << 11) /*  (PIO_SCDR) Slow Clock Divider Selection for Debouncing */
01980 #define PIO_SCDR_DIV12 (0x1u << 12) /*  (PIO_SCDR) Slow Clock Divider Selection for Debouncing */
01981 #define PIO_SCDR_DIV13 (0x1u << 13) /*  (PIO_SCDR) Slow Clock Divider Selection for Debouncing */
01982 /* -------- PIO_PPDDR : (PIO Offset: 0x0090) Pad Pull-down Disable Register -------- */
01983 #define PIO_PPDDR_P0 (0x1u << 0) /*  (PIO_PPDDR) Pull Down Disable. */
01984 #define PIO_PPDDR_P1 (0x1u << 1) /*  (PIO_PPDDR) Pull Down Disable. */
01985 #define PIO_PPDDR_P2 (0x1u << 2) /*  (PIO_PPDDR) Pull Down Disable. */
01986 #define PIO_PPDDR_P3 (0x1u << 3) /*  (PIO_PPDDR) Pull Down Disable. */
01987 #define PIO_PPDDR_P4 (0x1u << 4) /*  (PIO_PPDDR) Pull Down Disable. */
01988 #define PIO_PPDDR_P5 (0x1u << 5) /*  (PIO_PPDDR) Pull Down Disable. */
01989 #define PIO_PPDDR_P6 (0x1u << 6) /*  (PIO_PPDDR) Pull Down Disable. */
01990 #define PIO_PPDDR_P7 (0x1u << 7) /*  (PIO_PPDDR) Pull Down Disable. */
01991 #define PIO_PPDDR_P8 (0x1u << 8) /*  (PIO_PPDDR) Pull Down Disable. */
01992 #define PIO_PPDDR_P9 (0x1u << 9) /*  (PIO_PPDDR) Pull Down Disable. */
01993 #define PIO_PPDDR_P10 (0x1u << 10) /*  (PIO_PPDDR) Pull Down Disable. */
01994 #define PIO_PPDDR_P11 (0x1u << 11) /*  (PIO_PPDDR) Pull Down Disable. */
01995 #define PIO_PPDDR_P12 (0x1u << 12) /*  (PIO_PPDDR) Pull Down Disable. */
01996 #define PIO_PPDDR_P13 (0x1u << 13) /*  (PIO_PPDDR) Pull Down Disable. */
01997 #define PIO_PPDDR_P14 (0x1u << 14) /*  (PIO_PPDDR) Pull Down Disable. */
01998 #define PIO_PPDDR_P15 (0x1u << 15) /*  (PIO_PPDDR) Pull Down Disable. */
01999 #define PIO_PPDDR_P16 (0x1u << 16) /*  (PIO_PPDDR) Pull Down Disable. */
02000 #define PIO_PPDDR_P17 (0x1u << 17) /*  (PIO_PPDDR) Pull Down Disable. */
02001 #define PIO_PPDDR_P18 (0x1u << 18) /*  (PIO_PPDDR) Pull Down Disable. */
02002 #define PIO_PPDDR_P19 (0x1u << 19) /*  (PIO_PPDDR) Pull Down Disable. */
02003 #define PIO_PPDDR_P20 (0x1u << 20) /*  (PIO_PPDDR) Pull Down Disable. */
02004 #define PIO_PPDDR_P21 (0x1u << 21) /*  (PIO_PPDDR) Pull Down Disable. */
02005 #define PIO_PPDDR_P22 (0x1u << 22) /*  (PIO_PPDDR) Pull Down Disable. */
02006 #define PIO_PPDDR_P23 (0x1u << 23) /*  (PIO_PPDDR) Pull Down Disable. */
02007 #define PIO_PPDDR_P24 (0x1u << 24) /*  (PIO_PPDDR) Pull Down Disable. */
02008 #define PIO_PPDDR_P25 (0x1u << 25) /*  (PIO_PPDDR) Pull Down Disable. */
02009 #define PIO_PPDDR_P26 (0x1u << 26) /*  (PIO_PPDDR) Pull Down Disable. */
02010 #define PIO_PPDDR_P27 (0x1u << 27) /*  (PIO_PPDDR) Pull Down Disable. */
02011 #define PIO_PPDDR_P28 (0x1u << 28) /*  (PIO_PPDDR) Pull Down Disable. */
02012 #define PIO_PPDDR_P29 (0x1u << 29) /*  (PIO_PPDDR) Pull Down Disable. */
02013 #define PIO_PPDDR_P30 (0x1u << 30) /*  (PIO_PPDDR) Pull Down Disable. */
02014 #define PIO_PPDDR_P31 (0x1u << 31) /*  (PIO_PPDDR) Pull Down Disable. */
02015 /* -------- PIO_PPDER : (PIO Offset: 0x0094) Pad Pull-down Enable Register -------- */
02016 #define PIO_PPDER_P0 (0x1u << 0) /*  (PIO_PPDER) Pull Down Enable. */
02017 #define PIO_PPDER_P1 (0x1u << 1) /*  (PIO_PPDER) Pull Down Enable. */
02018 #define PIO_PPDER_P2 (0x1u << 2) /*  (PIO_PPDER) Pull Down Enable. */
02019 #define PIO_PPDER_P3 (0x1u << 3) /*  (PIO_PPDER) Pull Down Enable. */
02020 #define PIO_PPDER_P4 (0x1u << 4) /*  (PIO_PPDER) Pull Down Enable. */
02021 #define PIO_PPDER_P5 (0x1u << 5) /*  (PIO_PPDER) Pull Down Enable. */
02022 #define PIO_PPDER_P6 (0x1u << 6) /*  (PIO_PPDER) Pull Down Enable. */
02023 #define PIO_PPDER_P7 (0x1u << 7) /*  (PIO_PPDER) Pull Down Enable. */
02024 #define PIO_PPDER_P8 (0x1u << 8) /*  (PIO_PPDER) Pull Down Enable. */
02025 #define PIO_PPDER_P9 (0x1u << 9) /*  (PIO_PPDER) Pull Down Enable. */
02026 #define PIO_PPDER_P10 (0x1u << 10) /*  (PIO_PPDER) Pull Down Enable. */
02027 #define PIO_PPDER_P11 (0x1u << 11) /*  (PIO_PPDER) Pull Down Enable. */
02028 #define PIO_PPDER_P12 (0x1u << 12) /*  (PIO_PPDER) Pull Down Enable. */
02029 #define PIO_PPDER_P13 (0x1u << 13) /*  (PIO_PPDER) Pull Down Enable. */
02030 #define PIO_PPDER_P14 (0x1u << 14) /*  (PIO_PPDER) Pull Down Enable. */
02031 #define PIO_PPDER_P15 (0x1u << 15) /*  (PIO_PPDER) Pull Down Enable. */
02032 #define PIO_PPDER_P16 (0x1u << 16) /*  (PIO_PPDER) Pull Down Enable. */
02033 #define PIO_PPDER_P17 (0x1u << 17) /*  (PIO_PPDER) Pull Down Enable. */
02034 #define PIO_PPDER_P18 (0x1u << 18) /*  (PIO_PPDER) Pull Down Enable. */
02035 #define PIO_PPDER_P19 (0x1u << 19) /*  (PIO_PPDER) Pull Down Enable. */
02036 #define PIO_PPDER_P20 (0x1u << 20) /*  (PIO_PPDER) Pull Down Enable. */
02037 #define PIO_PPDER_P21 (0x1u << 21) /*  (PIO_PPDER) Pull Down Enable. */
02038 #define PIO_PPDER_P22 (0x1u << 22) /*  (PIO_PPDER) Pull Down Enable. */
02039 #define PIO_PPDER_P23 (0x1u << 23) /*  (PIO_PPDER) Pull Down Enable. */
02040 #define PIO_PPDER_P24 (0x1u << 24) /*  (PIO_PPDER) Pull Down Enable. */
02041 #define PIO_PPDER_P25 (0x1u << 25) /*  (PIO_PPDER) Pull Down Enable. */
02042 #define PIO_PPDER_P26 (0x1u << 26) /*  (PIO_PPDER) Pull Down Enable. */
02043 #define PIO_PPDER_P27 (0x1u << 27) /*  (PIO_PPDER) Pull Down Enable. */
02044 #define PIO_PPDER_P28 (0x1u << 28) /*  (PIO_PPDER) Pull Down Enable. */
02045 #define PIO_PPDER_P29 (0x1u << 29) /*  (PIO_PPDER) Pull Down Enable. */
02046 #define PIO_PPDER_P30 (0x1u << 30) /*  (PIO_PPDER) Pull Down Enable. */
02047 #define PIO_PPDER_P31 (0x1u << 31) /*  (PIO_PPDER) Pull Down Enable. */
02048 /* -------- PIO_PPDSR : (PIO Offset: 0x0098) Pad Pull-down Status Register -------- */
02049 #define PIO_PPDSR_P0 (0x1u << 0) /*  (PIO_PPDSR) Pull Down Status. */
02050 #define PIO_PPDSR_P1 (0x1u << 1) /*  (PIO_PPDSR) Pull Down Status. */
02051 #define PIO_PPDSR_P2 (0x1u << 2) /*  (PIO_PPDSR) Pull Down Status. */
02052 #define PIO_PPDSR_P3 (0x1u << 3) /*  (PIO_PPDSR) Pull Down Status. */
02053 #define PIO_PPDSR_P4 (0x1u << 4) /*  (PIO_PPDSR) Pull Down Status. */
02054 #define PIO_PPDSR_P5 (0x1u << 5) /*  (PIO_PPDSR) Pull Down Status. */
02055 #define PIO_PPDSR_P6 (0x1u << 6) /*  (PIO_PPDSR) Pull Down Status. */
02056 #define PIO_PPDSR_P7 (0x1u << 7) /*  (PIO_PPDSR) Pull Down Status. */
02057 #define PIO_PPDSR_P8 (0x1u << 8) /*  (PIO_PPDSR) Pull Down Status. */
02058 #define PIO_PPDSR_P9 (0x1u << 9) /*  (PIO_PPDSR) Pull Down Status. */
02059 #define PIO_PPDSR_P10 (0x1u << 10) /*  (PIO_PPDSR) Pull Down Status. */
02060 #define PIO_PPDSR_P11 (0x1u << 11) /*  (PIO_PPDSR) Pull Down Status. */
02061 #define PIO_PPDSR_P12 (0x1u << 12) /*  (PIO_PPDSR) Pull Down Status. */
02062 #define PIO_PPDSR_P13 (0x1u << 13) /*  (PIO_PPDSR) Pull Down Status. */
02063 #define PIO_PPDSR_P14 (0x1u << 14) /*  (PIO_PPDSR) Pull Down Status. */
02064 #define PIO_PPDSR_P15 (0x1u << 15) /*  (PIO_PPDSR) Pull Down Status. */
02065 #define PIO_PPDSR_P16 (0x1u << 16) /*  (PIO_PPDSR) Pull Down Status. */
02066 #define PIO_PPDSR_P17 (0x1u << 17) /*  (PIO_PPDSR) Pull Down Status. */
02067 #define PIO_PPDSR_P18 (0x1u << 18) /*  (PIO_PPDSR) Pull Down Status. */
02068 #define PIO_PPDSR_P19 (0x1u << 19) /*  (PIO_PPDSR) Pull Down Status. */
02069 #define PIO_PPDSR_P20 (0x1u << 20) /*  (PIO_PPDSR) Pull Down Status. */
02070 #define PIO_PPDSR_P21 (0x1u << 21) /*  (PIO_PPDSR) Pull Down Status. */
02071 #define PIO_PPDSR_P22 (0x1u << 22) /*  (PIO_PPDSR) Pull Down Status. */
02072 #define PIO_PPDSR_P23 (0x1u << 23) /*  (PIO_PPDSR) Pull Down Status. */
02073 #define PIO_PPDSR_P24 (0x1u << 24) /*  (PIO_PPDSR) Pull Down Status. */
02074 #define PIO_PPDSR_P25 (0x1u << 25) /*  (PIO_PPDSR) Pull Down Status. */
02075 #define PIO_PPDSR_P26 (0x1u << 26) /*  (PIO_PPDSR) Pull Down Status. */
02076 #define PIO_PPDSR_P27 (0x1u << 27) /*  (PIO_PPDSR) Pull Down Status. */
02077 #define PIO_PPDSR_P28 (0x1u << 28) /*  (PIO_PPDSR) Pull Down Status. */
02078 #define PIO_PPDSR_P29 (0x1u << 29) /*  (PIO_PPDSR) Pull Down Status. */
02079 #define PIO_PPDSR_P30 (0x1u << 30) /*  (PIO_PPDSR) Pull Down Status. */
02080 #define PIO_PPDSR_P31 (0x1u << 31) /*  (PIO_PPDSR) Pull Down Status. */
02081 /* -------- PIO_OWER : (PIO Offset: 0x00A0) Output Write Enable -------- */
02082 #define PIO_OWER_P0 (0x1u << 0) /*  (PIO_OWER) Output Write Enable. */
02083 #define PIO_OWER_P1 (0x1u << 1) /*  (PIO_OWER) Output Write Enable. */
02084 #define PIO_OWER_P2 (0x1u << 2) /*  (PIO_OWER) Output Write Enable. */
02085 #define PIO_OWER_P3 (0x1u << 3) /*  (PIO_OWER) Output Write Enable. */
02086 #define PIO_OWER_P4 (0x1u << 4) /*  (PIO_OWER) Output Write Enable. */
02087 #define PIO_OWER_P5 (0x1u << 5) /*  (PIO_OWER) Output Write Enable. */
02088 #define PIO_OWER_P6 (0x1u << 6) /*  (PIO_OWER) Output Write Enable. */
02089 #define PIO_OWER_P7 (0x1u << 7) /*  (PIO_OWER) Output Write Enable. */
02090 #define PIO_OWER_P8 (0x1u << 8) /*  (PIO_OWER) Output Write Enable. */
02091 #define PIO_OWER_P9 (0x1u << 9) /*  (PIO_OWER) Output Write Enable. */
02092 #define PIO_OWER_P10 (0x1u << 10) /*  (PIO_OWER) Output Write Enable. */
02093 #define PIO_OWER_P11 (0x1u << 11) /*  (PIO_OWER) Output Write Enable. */
02094 #define PIO_OWER_P12 (0x1u << 12) /*  (PIO_OWER) Output Write Enable. */
02095 #define PIO_OWER_P13 (0x1u << 13) /*  (PIO_OWER) Output Write Enable. */
02096 #define PIO_OWER_P14 (0x1u << 14) /*  (PIO_OWER) Output Write Enable. */
02097 #define PIO_OWER_P15 (0x1u << 15) /*  (PIO_OWER) Output Write Enable. */
02098 #define PIO_OWER_P16 (0x1u << 16) /*  (PIO_OWER) Output Write Enable. */
02099 #define PIO_OWER_P17 (0x1u << 17) /*  (PIO_OWER) Output Write Enable. */
02100 #define PIO_OWER_P18 (0x1u << 18) /*  (PIO_OWER) Output Write Enable. */
02101 #define PIO_OWER_P19 (0x1u << 19) /*  (PIO_OWER) Output Write Enable. */
02102 #define PIO_OWER_P20 (0x1u << 20) /*  (PIO_OWER) Output Write Enable. */
02103 #define PIO_OWER_P21 (0x1u << 21) /*  (PIO_OWER) Output Write Enable. */
02104 #define PIO_OWER_P22 (0x1u << 22) /*  (PIO_OWER) Output Write Enable. */
02105 #define PIO_OWER_P23 (0x1u << 23) /*  (PIO_OWER) Output Write Enable. */
02106 #define PIO_OWER_P24 (0x1u << 24) /*  (PIO_OWER) Output Write Enable. */
02107 #define PIO_OWER_P25 (0x1u << 25) /*  (PIO_OWER) Output Write Enable. */
02108 #define PIO_OWER_P26 (0x1u << 26) /*  (PIO_OWER) Output Write Enable. */
02109 #define PIO_OWER_P27 (0x1u << 27) /*  (PIO_OWER) Output Write Enable. */
02110 #define PIO_OWER_P28 (0x1u << 28) /*  (PIO_OWER) Output Write Enable. */
02111 #define PIO_OWER_P29 (0x1u << 29) /*  (PIO_OWER) Output Write Enable. */
02112 #define PIO_OWER_P30 (0x1u << 30) /*  (PIO_OWER) Output Write Enable. */
02113 #define PIO_OWER_P31 (0x1u << 31) /*  (PIO_OWER) Output Write Enable. */
02114 /* -------- PIO_OWDR : (PIO Offset: 0x00A4) Output Write Disable -------- */
02115 #define PIO_OWDR_P0 (0x1u << 0) /*  (PIO_OWDR) Output Write Disable. */
02116 #define PIO_OWDR_P1 (0x1u << 1) /*  (PIO_OWDR) Output Write Disable. */
02117 #define PIO_OWDR_P2 (0x1u << 2) /*  (PIO_OWDR) Output Write Disable. */
02118 #define PIO_OWDR_P3 (0x1u << 3) /*  (PIO_OWDR) Output Write Disable. */
02119 #define PIO_OWDR_P4 (0x1u << 4) /*  (PIO_OWDR) Output Write Disable. */
02120 #define PIO_OWDR_P5 (0x1u << 5) /*  (PIO_OWDR) Output Write Disable. */
02121 #define PIO_OWDR_P6 (0x1u << 6) /*  (PIO_OWDR) Output Write Disable. */
02122 #define PIO_OWDR_P7 (0x1u << 7) /*  (PIO_OWDR) Output Write Disable. */
02123 #define PIO_OWDR_P8 (0x1u << 8) /*  (PIO_OWDR) Output Write Disable. */
02124 #define PIO_OWDR_P9 (0x1u << 9) /*  (PIO_OWDR) Output Write Disable. */
02125 #define PIO_OWDR_P10 (0x1u << 10) /*  (PIO_OWDR) Output Write Disable. */
02126 #define PIO_OWDR_P11 (0x1u << 11) /*  (PIO_OWDR) Output Write Disable. */
02127 #define PIO_OWDR_P12 (0x1u << 12) /*  (PIO_OWDR) Output Write Disable. */
02128 #define PIO_OWDR_P13 (0x1u << 13) /*  (PIO_OWDR) Output Write Disable. */
02129 #define PIO_OWDR_P14 (0x1u << 14) /*  (PIO_OWDR) Output Write Disable. */
02130 #define PIO_OWDR_P15 (0x1u << 15) /*  (PIO_OWDR) Output Write Disable. */
02131 #define PIO_OWDR_P16 (0x1u << 16) /*  (PIO_OWDR) Output Write Disable. */
02132 #define PIO_OWDR_P17 (0x1u << 17) /*  (PIO_OWDR) Output Write Disable. */
02133 #define PIO_OWDR_P18 (0x1u << 18) /*  (PIO_OWDR) Output Write Disable. */
02134 #define PIO_OWDR_P19 (0x1u << 19) /*  (PIO_OWDR) Output Write Disable. */
02135 #define PIO_OWDR_P20 (0x1u << 20) /*  (PIO_OWDR) Output Write Disable. */
02136 #define PIO_OWDR_P21 (0x1u << 21) /*  (PIO_OWDR) Output Write Disable. */
02137 #define PIO_OWDR_P22 (0x1u << 22) /*  (PIO_OWDR) Output Write Disable. */
02138 #define PIO_OWDR_P23 (0x1u << 23) /*  (PIO_OWDR) Output Write Disable. */
02139 #define PIO_OWDR_P24 (0x1u << 24) /*  (PIO_OWDR) Output Write Disable. */
02140 #define PIO_OWDR_P25 (0x1u << 25) /*  (PIO_OWDR) Output Write Disable. */
02141 #define PIO_OWDR_P26 (0x1u << 26) /*  (PIO_OWDR) Output Write Disable. */
02142 #define PIO_OWDR_P27 (0x1u << 27) /*  (PIO_OWDR) Output Write Disable. */
02143 #define PIO_OWDR_P28 (0x1u << 28) /*  (PIO_OWDR) Output Write Disable. */
02144 #define PIO_OWDR_P29 (0x1u << 29) /*  (PIO_OWDR) Output Write Disable. */
02145 #define PIO_OWDR_P30 (0x1u << 30) /*  (PIO_OWDR) Output Write Disable. */
02146 #define PIO_OWDR_P31 (0x1u << 31) /*  (PIO_OWDR) Output Write Disable. */
02147 /* -------- PIO_OWSR : (PIO Offset: 0x00A8) Output Write Status Register -------- */
02148 #define PIO_OWSR_P0 (0x1u << 0) /*  (PIO_OWSR) Output Write Status. */
02149 #define PIO_OWSR_P1 (0x1u << 1) /*  (PIO_OWSR) Output Write Status. */
02150 #define PIO_OWSR_P2 (0x1u << 2) /*  (PIO_OWSR) Output Write Status. */
02151 #define PIO_OWSR_P3 (0x1u << 3) /*  (PIO_OWSR) Output Write Status. */
02152 #define PIO_OWSR_P4 (0x1u << 4) /*  (PIO_OWSR) Output Write Status. */
02153 #define PIO_OWSR_P5 (0x1u << 5) /*  (PIO_OWSR) Output Write Status. */
02154 #define PIO_OWSR_P6 (0x1u << 6) /*  (PIO_OWSR) Output Write Status. */
02155 #define PIO_OWSR_P7 (0x1u << 7) /*  (PIO_OWSR) Output Write Status. */
02156 #define PIO_OWSR_P8 (0x1u << 8) /*  (PIO_OWSR) Output Write Status. */
02157 #define PIO_OWSR_P9 (0x1u << 9) /*  (PIO_OWSR) Output Write Status. */
02158 #define PIO_OWSR_P10 (0x1u << 10) /*  (PIO_OWSR) Output Write Status. */
02159 #define PIO_OWSR_P11 (0x1u << 11) /*  (PIO_OWSR) Output Write Status. */
02160 #define PIO_OWSR_P12 (0x1u << 12) /*  (PIO_OWSR) Output Write Status. */
02161 #define PIO_OWSR_P13 (0x1u << 13) /*  (PIO_OWSR) Output Write Status. */
02162 #define PIO_OWSR_P14 (0x1u << 14) /*  (PIO_OWSR) Output Write Status. */
02163 #define PIO_OWSR_P15 (0x1u << 15) /*  (PIO_OWSR) Output Write Status. */
02164 #define PIO_OWSR_P16 (0x1u << 16) /*  (PIO_OWSR) Output Write Status. */
02165 #define PIO_OWSR_P17 (0x1u << 17) /*  (PIO_OWSR) Output Write Status. */
02166 #define PIO_OWSR_P18 (0x1u << 18) /*  (PIO_OWSR) Output Write Status. */
02167 #define PIO_OWSR_P19 (0x1u << 19) /*  (PIO_OWSR) Output Write Status. */
02168 #define PIO_OWSR_P20 (0x1u << 20) /*  (PIO_OWSR) Output Write Status. */
02169 #define PIO_OWSR_P21 (0x1u << 21) /*  (PIO_OWSR) Output Write Status. */
02170 #define PIO_OWSR_P22 (0x1u << 22) /*  (PIO_OWSR) Output Write Status. */
02171 #define PIO_OWSR_P23 (0x1u << 23) /*  (PIO_OWSR) Output Write Status. */
02172 #define PIO_OWSR_P24 (0x1u << 24) /*  (PIO_OWSR) Output Write Status. */
02173 #define PIO_OWSR_P25 (0x1u << 25) /*  (PIO_OWSR) Output Write Status. */
02174 #define PIO_OWSR_P26 (0x1u << 26) /*  (PIO_OWSR) Output Write Status. */
02175 #define PIO_OWSR_P27 (0x1u << 27) /*  (PIO_OWSR) Output Write Status. */
02176 #define PIO_OWSR_P28 (0x1u << 28) /*  (PIO_OWSR) Output Write Status. */
02177 #define PIO_OWSR_P29 (0x1u << 29) /*  (PIO_OWSR) Output Write Status. */
02178 #define PIO_OWSR_P30 (0x1u << 30) /*  (PIO_OWSR) Output Write Status. */
02179 #define PIO_OWSR_P31 (0x1u << 31) /*  (PIO_OWSR) Output Write Status. */
02180 /* -------- PIO_AIMER : (PIO Offset: 0x00B0) Additional Interrupt Modes Enable Register -------- */
02181 #define PIO_AIMER_P0 (0x1u << 0) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02182 #define PIO_AIMER_P1 (0x1u << 1) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02183 #define PIO_AIMER_P2 (0x1u << 2) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02184 #define PIO_AIMER_P3 (0x1u << 3) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02185 #define PIO_AIMER_P4 (0x1u << 4) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02186 #define PIO_AIMER_P5 (0x1u << 5) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02187 #define PIO_AIMER_P6 (0x1u << 6) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02188 #define PIO_AIMER_P7 (0x1u << 7) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02189 #define PIO_AIMER_P8 (0x1u << 8) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02190 #define PIO_AIMER_P9 (0x1u << 9) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02191 #define PIO_AIMER_P10 (0x1u << 10) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02192 #define PIO_AIMER_P11 (0x1u << 11) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02193 #define PIO_AIMER_P12 (0x1u << 12) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02194 #define PIO_AIMER_P13 (0x1u << 13) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02195 #define PIO_AIMER_P14 (0x1u << 14) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02196 #define PIO_AIMER_P15 (0x1u << 15) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02197 #define PIO_AIMER_P16 (0x1u << 16) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02198 #define PIO_AIMER_P17 (0x1u << 17) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02199 #define PIO_AIMER_P18 (0x1u << 18) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02200 #define PIO_AIMER_P19 (0x1u << 19) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02201 #define PIO_AIMER_P20 (0x1u << 20) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02202 #define PIO_AIMER_P21 (0x1u << 21) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02203 #define PIO_AIMER_P22 (0x1u << 22) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02204 #define PIO_AIMER_P23 (0x1u << 23) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02205 #define PIO_AIMER_P24 (0x1u << 24) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02206 #define PIO_AIMER_P25 (0x1u << 25) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02207 #define PIO_AIMER_P26 (0x1u << 26) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02208 #define PIO_AIMER_P27 (0x1u << 27) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02209 #define PIO_AIMER_P28 (0x1u << 28) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02210 #define PIO_AIMER_P29 (0x1u << 29) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02211 #define PIO_AIMER_P30 (0x1u << 30) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02212 #define PIO_AIMER_P31 (0x1u << 31) /*  (PIO_AIMER) Additional Interrupt Modes Enable. */
02213 /* -------- PIO_AIMDR : (PIO Offset: 0x00B4) Additional Interrupt Modes Disables Register -------- */
02214 #define PIO_AIMDR_P0 (0x1u << 0) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02215 #define PIO_AIMDR_P1 (0x1u << 1) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02216 #define PIO_AIMDR_P2 (0x1u << 2) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02217 #define PIO_AIMDR_P3 (0x1u << 3) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02218 #define PIO_AIMDR_P4 (0x1u << 4) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02219 #define PIO_AIMDR_P5 (0x1u << 5) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02220 #define PIO_AIMDR_P6 (0x1u << 6) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02221 #define PIO_AIMDR_P7 (0x1u << 7) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02222 #define PIO_AIMDR_P8 (0x1u << 8) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02223 #define PIO_AIMDR_P9 (0x1u << 9) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02224 #define PIO_AIMDR_P10 (0x1u << 10) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02225 #define PIO_AIMDR_P11 (0x1u << 11) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02226 #define PIO_AIMDR_P12 (0x1u << 12) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02227 #define PIO_AIMDR_P13 (0x1u << 13) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02228 #define PIO_AIMDR_P14 (0x1u << 14) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02229 #define PIO_AIMDR_P15 (0x1u << 15) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02230 #define PIO_AIMDR_P16 (0x1u << 16) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02231 #define PIO_AIMDR_P17 (0x1u << 17) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02232 #define PIO_AIMDR_P18 (0x1u << 18) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02233 #define PIO_AIMDR_P19 (0x1u << 19) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02234 #define PIO_AIMDR_P20 (0x1u << 20) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02235 #define PIO_AIMDR_P21 (0x1u << 21) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02236 #define PIO_AIMDR_P22 (0x1u << 22) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02237 #define PIO_AIMDR_P23 (0x1u << 23) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02238 #define PIO_AIMDR_P24 (0x1u << 24) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02239 #define PIO_AIMDR_P25 (0x1u << 25) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02240 #define PIO_AIMDR_P26 (0x1u << 26) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02241 #define PIO_AIMDR_P27 (0x1u << 27) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02242 #define PIO_AIMDR_P28 (0x1u << 28) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02243 #define PIO_AIMDR_P29 (0x1u << 29) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02244 #define PIO_AIMDR_P30 (0x1u << 30) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02245 #define PIO_AIMDR_P31 (0x1u << 31) /*  (PIO_AIMDR) Additional Interrupt Modes Disable. */
02246 /* -------- PIO_AIMMR : (PIO Offset: 0x00B8) Additional Interrupt Modes Mask Register -------- */
02247 #define PIO_AIMMR_P0 (0x1u << 0) /*  (PIO_AIMMR) Peripheral CD Status. */
02248 #define PIO_AIMMR_P1 (0x1u << 1) /*  (PIO_AIMMR) Peripheral CD Status. */
02249 #define PIO_AIMMR_P2 (0x1u << 2) /*  (PIO_AIMMR) Peripheral CD Status. */
02250 #define PIO_AIMMR_P3 (0x1u << 3) /*  (PIO_AIMMR) Peripheral CD Status. */
02251 #define PIO_AIMMR_P4 (0x1u << 4) /*  (PIO_AIMMR) Peripheral CD Status. */
02252 #define PIO_AIMMR_P5 (0x1u << 5) /*  (PIO_AIMMR) Peripheral CD Status. */
02253 #define PIO_AIMMR_P6 (0x1u << 6) /*  (PIO_AIMMR) Peripheral CD Status. */
02254 #define PIO_AIMMR_P7 (0x1u << 7) /*  (PIO_AIMMR) Peripheral CD Status. */
02255 #define PIO_AIMMR_P8 (0x1u << 8) /*  (PIO_AIMMR) Peripheral CD Status. */
02256 #define PIO_AIMMR_P9 (0x1u << 9) /*  (PIO_AIMMR) Peripheral CD Status. */
02257 #define PIO_AIMMR_P10 (0x1u << 10) /*  (PIO_AIMMR) Peripheral CD Status. */
02258 #define PIO_AIMMR_P11 (0x1u << 11) /*  (PIO_AIMMR) Peripheral CD Status. */
02259 #define PIO_AIMMR_P12 (0x1u << 12) /*  (PIO_AIMMR) Peripheral CD Status. */
02260 #define PIO_AIMMR_P13 (0x1u << 13) /*  (PIO_AIMMR) Peripheral CD Status. */
02261 #define PIO_AIMMR_P14 (0x1u << 14) /*  (PIO_AIMMR) Peripheral CD Status. */
02262 #define PIO_AIMMR_P15 (0x1u << 15) /*  (PIO_AIMMR) Peripheral CD Status. */
02263 #define PIO_AIMMR_P16 (0x1u << 16) /*  (PIO_AIMMR) Peripheral CD Status. */
02264 #define PIO_AIMMR_P17 (0x1u << 17) /*  (PIO_AIMMR) Peripheral CD Status. */
02265 #define PIO_AIMMR_P18 (0x1u << 18) /*  (PIO_AIMMR) Peripheral CD Status. */
02266 #define PIO_AIMMR_P19 (0x1u << 19) /*  (PIO_AIMMR) Peripheral CD Status. */
02267 #define PIO_AIMMR_P20 (0x1u << 20) /*  (PIO_AIMMR) Peripheral CD Status. */
02268 #define PIO_AIMMR_P21 (0x1u << 21) /*  (PIO_AIMMR) Peripheral CD Status. */
02269 #define PIO_AIMMR_P22 (0x1u << 22) /*  (PIO_AIMMR) Peripheral CD Status. */
02270 #define PIO_AIMMR_P23 (0x1u << 23) /*  (PIO_AIMMR) Peripheral CD Status. */
02271 #define PIO_AIMMR_P24 (0x1u << 24) /*  (PIO_AIMMR) Peripheral CD Status. */
02272 #define PIO_AIMMR_P25 (0x1u << 25) /*  (PIO_AIMMR) Peripheral CD Status. */
02273 #define PIO_AIMMR_P26 (0x1u << 26) /*  (PIO_AIMMR) Peripheral CD Status. */
02274 #define PIO_AIMMR_P27 (0x1u << 27) /*  (PIO_AIMMR) Peripheral CD Status. */
02275 #define PIO_AIMMR_P28 (0x1u << 28) /*  (PIO_AIMMR) Peripheral CD Status. */
02276 #define PIO_AIMMR_P29 (0x1u << 29) /*  (PIO_AIMMR) Peripheral CD Status. */
02277 #define PIO_AIMMR_P30 (0x1u << 30) /*  (PIO_AIMMR) Peripheral CD Status. */
02278 #define PIO_AIMMR_P31 (0x1u << 31) /*  (PIO_AIMMR) Peripheral CD Status. */
02279 /* -------- PIO_ESR : (PIO Offset: 0x00C0) Edge Select Register -------- */
02280 #define PIO_ESR_P0 (0x1u << 0) /*  (PIO_ESR) Edge Interrupt Selection. */
02281 #define PIO_ESR_P1 (0x1u << 1) /*  (PIO_ESR) Edge Interrupt Selection. */
02282 #define PIO_ESR_P2 (0x1u << 2) /*  (PIO_ESR) Edge Interrupt Selection. */
02283 #define PIO_ESR_P3 (0x1u << 3) /*  (PIO_ESR) Edge Interrupt Selection. */
02284 #define PIO_ESR_P4 (0x1u << 4) /*  (PIO_ESR) Edge Interrupt Selection. */
02285 #define PIO_ESR_P5 (0x1u << 5) /*  (PIO_ESR) Edge Interrupt Selection. */
02286 #define PIO_ESR_P6 (0x1u << 6) /*  (PIO_ESR) Edge Interrupt Selection. */
02287 #define PIO_ESR_P7 (0x1u << 7) /*  (PIO_ESR) Edge Interrupt Selection. */
02288 #define PIO_ESR_P8 (0x1u << 8) /*  (PIO_ESR) Edge Interrupt Selection. */
02289 #define PIO_ESR_P9 (0x1u << 9) /*  (PIO_ESR) Edge Interrupt Selection. */
02290 #define PIO_ESR_P10 (0x1u << 10) /*  (PIO_ESR) Edge Interrupt Selection. */
02291 #define PIO_ESR_P11 (0x1u << 11) /*  (PIO_ESR) Edge Interrupt Selection. */
02292 #define PIO_ESR_P12 (0x1u << 12) /*  (PIO_ESR) Edge Interrupt Selection. */
02293 #define PIO_ESR_P13 (0x1u << 13) /*  (PIO_ESR) Edge Interrupt Selection. */
02294 #define PIO_ESR_P14 (0x1u << 14) /*  (PIO_ESR) Edge Interrupt Selection. */
02295 #define PIO_ESR_P15 (0x1u << 15) /*  (PIO_ESR) Edge Interrupt Selection. */
02296 #define PIO_ESR_P16 (0x1u << 16) /*  (PIO_ESR) Edge Interrupt Selection. */
02297 #define PIO_ESR_P17 (0x1u << 17) /*  (PIO_ESR) Edge Interrupt Selection. */
02298 #define PIO_ESR_P18 (0x1u << 18) /*  (PIO_ESR) Edge Interrupt Selection. */
02299 #define PIO_ESR_P19 (0x1u << 19) /*  (PIO_ESR) Edge Interrupt Selection. */
02300 #define PIO_ESR_P20 (0x1u << 20) /*  (PIO_ESR) Edge Interrupt Selection. */
02301 #define PIO_ESR_P21 (0x1u << 21) /*  (PIO_ESR) Edge Interrupt Selection. */
02302 #define PIO_ESR_P22 (0x1u << 22) /*  (PIO_ESR) Edge Interrupt Selection. */
02303 #define PIO_ESR_P23 (0x1u << 23) /*  (PIO_ESR) Edge Interrupt Selection. */
02304 #define PIO_ESR_P24 (0x1u << 24) /*  (PIO_ESR) Edge Interrupt Selection. */
02305 #define PIO_ESR_P25 (0x1u << 25) /*  (PIO_ESR) Edge Interrupt Selection. */
02306 #define PIO_ESR_P26 (0x1u << 26) /*  (PIO_ESR) Edge Interrupt Selection. */
02307 #define PIO_ESR_P27 (0x1u << 27) /*  (PIO_ESR) Edge Interrupt Selection. */
02308 #define PIO_ESR_P28 (0x1u << 28) /*  (PIO_ESR) Edge Interrupt Selection. */
02309 #define PIO_ESR_P29 (0x1u << 29) /*  (PIO_ESR) Edge Interrupt Selection. */
02310 #define PIO_ESR_P30 (0x1u << 30) /*  (PIO_ESR) Edge Interrupt Selection. */
02311 #define PIO_ESR_P31 (0x1u << 31) /*  (PIO_ESR) Edge Interrupt Selection. */
02312 /* -------- PIO_LSR : (PIO Offset: 0x00C4) Level Select Register -------- */
02313 #define PIO_LSR_P0 (0x1u << 0) /*  (PIO_LSR) Level Interrupt Selection. */
02314 #define PIO_LSR_P1 (0x1u << 1) /*  (PIO_LSR) Level Interrupt Selection. */
02315 #define PIO_LSR_P2 (0x1u << 2) /*  (PIO_LSR) Level Interrupt Selection. */
02316 #define PIO_LSR_P3 (0x1u << 3) /*  (PIO_LSR) Level Interrupt Selection. */
02317 #define PIO_LSR_P4 (0x1u << 4) /*  (PIO_LSR) Level Interrupt Selection. */
02318 #define PIO_LSR_P5 (0x1u << 5) /*  (PIO_LSR) Level Interrupt Selection. */
02319 #define PIO_LSR_P6 (0x1u << 6) /*  (PIO_LSR) Level Interrupt Selection. */
02320 #define PIO_LSR_P7 (0x1u << 7) /*  (PIO_LSR) Level Interrupt Selection. */
02321 #define PIO_LSR_P8 (0x1u << 8) /*  (PIO_LSR) Level Interrupt Selection. */
02322 #define PIO_LSR_P9 (0x1u << 9) /*  (PIO_LSR) Level Interrupt Selection. */
02323 #define PIO_LSR_P10 (0x1u << 10) /*  (PIO_LSR) Level Interrupt Selection. */
02324 #define PIO_LSR_P11 (0x1u << 11) /*  (PIO_LSR) Level Interrupt Selection. */
02325 #define PIO_LSR_P12 (0x1u << 12) /*  (PIO_LSR) Level Interrupt Selection. */
02326 #define PIO_LSR_P13 (0x1u << 13) /*  (PIO_LSR) Level Interrupt Selection. */
02327 #define PIO_LSR_P14 (0x1u << 14) /*  (PIO_LSR) Level Interrupt Selection. */
02328 #define PIO_LSR_P15 (0x1u << 15) /*  (PIO_LSR) Level Interrupt Selection. */
02329 #define PIO_LSR_P16 (0x1u << 16) /*  (PIO_LSR) Level Interrupt Selection. */
02330 #define PIO_LSR_P17 (0x1u << 17) /*  (PIO_LSR) Level Interrupt Selection. */
02331 #define PIO_LSR_P18 (0x1u << 18) /*  (PIO_LSR) Level Interrupt Selection. */
02332 #define PIO_LSR_P19 (0x1u << 19) /*  (PIO_LSR) Level Interrupt Selection. */
02333 #define PIO_LSR_P20 (0x1u << 20) /*  (PIO_LSR) Level Interrupt Selection. */
02334 #define PIO_LSR_P21 (0x1u << 21) /*  (PIO_LSR) Level Interrupt Selection. */
02335 #define PIO_LSR_P22 (0x1u << 22) /*  (PIO_LSR) Level Interrupt Selection. */
02336 #define PIO_LSR_P23 (0x1u << 23) /*  (PIO_LSR) Level Interrupt Selection. */
02337 #define PIO_LSR_P24 (0x1u << 24) /*  (PIO_LSR) Level Interrupt Selection. */
02338 #define PIO_LSR_P25 (0x1u << 25) /*  (PIO_LSR) Level Interrupt Selection. */
02339 #define PIO_LSR_P26 (0x1u << 26) /*  (PIO_LSR) Level Interrupt Selection. */
02340 #define PIO_LSR_P27 (0x1u << 27) /*  (PIO_LSR) Level Interrupt Selection. */
02341 #define PIO_LSR_P28 (0x1u << 28) /*  (PIO_LSR) Level Interrupt Selection. */
02342 #define PIO_LSR_P29 (0x1u << 29) /*  (PIO_LSR) Level Interrupt Selection. */
02343 #define PIO_LSR_P30 (0x1u << 30) /*  (PIO_LSR) Level Interrupt Selection. */
02344 #define PIO_LSR_P31 (0x1u << 31) /*  (PIO_LSR) Level Interrupt Selection. */
02345 /* -------- PIO_ELSR : (PIO Offset: 0x00C8) Edge/Level Status Register -------- */
02346 #define PIO_ELSR_P0 (0x1u << 0) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02347 #define PIO_ELSR_P1 (0x1u << 1) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02348 #define PIO_ELSR_P2 (0x1u << 2) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02349 #define PIO_ELSR_P3 (0x1u << 3) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02350 #define PIO_ELSR_P4 (0x1u << 4) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02351 #define PIO_ELSR_P5 (0x1u << 5) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02352 #define PIO_ELSR_P6 (0x1u << 6) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02353 #define PIO_ELSR_P7 (0x1u << 7) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02354 #define PIO_ELSR_P8 (0x1u << 8) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02355 #define PIO_ELSR_P9 (0x1u << 9) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02356 #define PIO_ELSR_P10 (0x1u << 10) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02357 #define PIO_ELSR_P11 (0x1u << 11) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02358 #define PIO_ELSR_P12 (0x1u << 12) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02359 #define PIO_ELSR_P13 (0x1u << 13) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02360 #define PIO_ELSR_P14 (0x1u << 14) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02361 #define PIO_ELSR_P15 (0x1u << 15) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02362 #define PIO_ELSR_P16 (0x1u << 16) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02363 #define PIO_ELSR_P17 (0x1u << 17) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02364 #define PIO_ELSR_P18 (0x1u << 18) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02365 #define PIO_ELSR_P19 (0x1u << 19) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02366 #define PIO_ELSR_P20 (0x1u << 20) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02367 #define PIO_ELSR_P21 (0x1u << 21) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02368 #define PIO_ELSR_P22 (0x1u << 22) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02369 #define PIO_ELSR_P23 (0x1u << 23) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02370 #define PIO_ELSR_P24 (0x1u << 24) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02371 #define PIO_ELSR_P25 (0x1u << 25) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02372 #define PIO_ELSR_P26 (0x1u << 26) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02373 #define PIO_ELSR_P27 (0x1u << 27) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02374 #define PIO_ELSR_P28 (0x1u << 28) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02375 #define PIO_ELSR_P29 (0x1u << 29) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02376 #define PIO_ELSR_P30 (0x1u << 30) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02377 #define PIO_ELSR_P31 (0x1u << 31) /*  (PIO_ELSR) Edge/Level Interrupt source selection. */
02378 /* -------- PIO_FELLSR : (PIO Offset: 0x00D0) Falling Edge/Low Level Select Register -------- */
02379 #define PIO_FELLSR_P0 (0x1u << 0) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02380 #define PIO_FELLSR_P1 (0x1u << 1) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02381 #define PIO_FELLSR_P2 (0x1u << 2) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02382 #define PIO_FELLSR_P3 (0x1u << 3) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02383 #define PIO_FELLSR_P4 (0x1u << 4) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02384 #define PIO_FELLSR_P5 (0x1u << 5) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02385 #define PIO_FELLSR_P6 (0x1u << 6) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02386 #define PIO_FELLSR_P7 (0x1u << 7) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02387 #define PIO_FELLSR_P8 (0x1u << 8) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02388 #define PIO_FELLSR_P9 (0x1u << 9) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02389 #define PIO_FELLSR_P10 (0x1u << 10) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02390 #define PIO_FELLSR_P11 (0x1u << 11) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02391 #define PIO_FELLSR_P12 (0x1u << 12) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02392 #define PIO_FELLSR_P13 (0x1u << 13) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02393 #define PIO_FELLSR_P14 (0x1u << 14) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02394 #define PIO_FELLSR_P15 (0x1u << 15) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02395 #define PIO_FELLSR_P16 (0x1u << 16) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02396 #define PIO_FELLSR_P17 (0x1u << 17) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02397 #define PIO_FELLSR_P18 (0x1u << 18) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02398 #define PIO_FELLSR_P19 (0x1u << 19) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02399 #define PIO_FELLSR_P20 (0x1u << 20) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02400 #define PIO_FELLSR_P21 (0x1u << 21) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02401 #define PIO_FELLSR_P22 (0x1u << 22) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02402 #define PIO_FELLSR_P23 (0x1u << 23) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02403 #define PIO_FELLSR_P24 (0x1u << 24) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02404 #define PIO_FELLSR_P25 (0x1u << 25) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02405 #define PIO_FELLSR_P26 (0x1u << 26) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02406 #define PIO_FELLSR_P27 (0x1u << 27) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02407 #define PIO_FELLSR_P28 (0x1u << 28) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02408 #define PIO_FELLSR_P29 (0x1u << 29) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02409 #define PIO_FELLSR_P30 (0x1u << 30) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02410 #define PIO_FELLSR_P31 (0x1u << 31) /*  (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */
02411 /* -------- PIO_REHLSR : (PIO Offset: 0x00D4) Rising Edge/ High Level Select Register -------- */
02412 #define PIO_REHLSR_P0 (0x1u << 0) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02413 #define PIO_REHLSR_P1 (0x1u << 1) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02414 #define PIO_REHLSR_P2 (0x1u << 2) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02415 #define PIO_REHLSR_P3 (0x1u << 3) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02416 #define PIO_REHLSR_P4 (0x1u << 4) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02417 #define PIO_REHLSR_P5 (0x1u << 5) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02418 #define PIO_REHLSR_P6 (0x1u << 6) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02419 #define PIO_REHLSR_P7 (0x1u << 7) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02420 #define PIO_REHLSR_P8 (0x1u << 8) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02421 #define PIO_REHLSR_P9 (0x1u << 9) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02422 #define PIO_REHLSR_P10 (0x1u << 10) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02423 #define PIO_REHLSR_P11 (0x1u << 11) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02424 #define PIO_REHLSR_P12 (0x1u << 12) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02425 #define PIO_REHLSR_P13 (0x1u << 13) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02426 #define PIO_REHLSR_P14 (0x1u << 14) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02427 #define PIO_REHLSR_P15 (0x1u << 15) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02428 #define PIO_REHLSR_P16 (0x1u << 16) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02429 #define PIO_REHLSR_P17 (0x1u << 17) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02430 #define PIO_REHLSR_P18 (0x1u << 18) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02431 #define PIO_REHLSR_P19 (0x1u << 19) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02432 #define PIO_REHLSR_P20 (0x1u << 20) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02433 #define PIO_REHLSR_P21 (0x1u << 21) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02434 #define PIO_REHLSR_P22 (0x1u << 22) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02435 #define PIO_REHLSR_P23 (0x1u << 23) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02436 #define PIO_REHLSR_P24 (0x1u << 24) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02437 #define PIO_REHLSR_P25 (0x1u << 25) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02438 #define PIO_REHLSR_P26 (0x1u << 26) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02439 #define PIO_REHLSR_P27 (0x1u << 27) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02440 #define PIO_REHLSR_P28 (0x1u << 28) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02441 #define PIO_REHLSR_P29 (0x1u << 29) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02442 #define PIO_REHLSR_P30 (0x1u << 30) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02443 #define PIO_REHLSR_P31 (0x1u << 31) /*  (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */
02444 /* -------- PIO_FRLHSR : (PIO Offset: 0x00D8) Fall/Rise - Low/High Status Register -------- */
02445 #define PIO_FRLHSR_P0 (0x1u << 0) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02446 #define PIO_FRLHSR_P1 (0x1u << 1) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02447 #define PIO_FRLHSR_P2 (0x1u << 2) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02448 #define PIO_FRLHSR_P3 (0x1u << 3) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02449 #define PIO_FRLHSR_P4 (0x1u << 4) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02450 #define PIO_FRLHSR_P5 (0x1u << 5) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02451 #define PIO_FRLHSR_P6 (0x1u << 6) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02452 #define PIO_FRLHSR_P7 (0x1u << 7) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02453 #define PIO_FRLHSR_P8 (0x1u << 8) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02454 #define PIO_FRLHSR_P9 (0x1u << 9) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02455 #define PIO_FRLHSR_P10 (0x1u << 10) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02456 #define PIO_FRLHSR_P11 (0x1u << 11) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02457 #define PIO_FRLHSR_P12 (0x1u << 12) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02458 #define PIO_FRLHSR_P13 (0x1u << 13) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02459 #define PIO_FRLHSR_P14 (0x1u << 14) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02460 #define PIO_FRLHSR_P15 (0x1u << 15) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02461 #define PIO_FRLHSR_P16 (0x1u << 16) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02462 #define PIO_FRLHSR_P17 (0x1u << 17) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02463 #define PIO_FRLHSR_P18 (0x1u << 18) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02464 #define PIO_FRLHSR_P19 (0x1u << 19) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02465 #define PIO_FRLHSR_P20 (0x1u << 20) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02466 #define PIO_FRLHSR_P21 (0x1u << 21) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02467 #define PIO_FRLHSR_P22 (0x1u << 22) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02468 #define PIO_FRLHSR_P23 (0x1u << 23) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02469 #define PIO_FRLHSR_P24 (0x1u << 24) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02470 #define PIO_FRLHSR_P25 (0x1u << 25) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02471 #define PIO_FRLHSR_P26 (0x1u << 26) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02472 #define PIO_FRLHSR_P27 (0x1u << 27) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02473 #define PIO_FRLHSR_P28 (0x1u << 28) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02474 #define PIO_FRLHSR_P29 (0x1u << 29) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02475 #define PIO_FRLHSR_P30 (0x1u << 30) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02476 #define PIO_FRLHSR_P31 (0x1u << 31) /*  (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */
02477 /* -------- PIO_LOCKSR : (PIO Offset: 0x00E0) Lock Status -------- */
02478 #define PIO_LOCKSR_P0 (0x1u << 0) /*  (PIO_LOCKSR) Lock Status. */
02479 #define PIO_LOCKSR_P1 (0x1u << 1) /*  (PIO_LOCKSR) Lock Status. */
02480 #define PIO_LOCKSR_P2 (0x1u << 2) /*  (PIO_LOCKSR) Lock Status. */
02481 #define PIO_LOCKSR_P3 (0x1u << 3) /*  (PIO_LOCKSR) Lock Status. */
02482 #define PIO_LOCKSR_P4 (0x1u << 4) /*  (PIO_LOCKSR) Lock Status. */
02483 #define PIO_LOCKSR_P5 (0x1u << 5) /*  (PIO_LOCKSR) Lock Status. */
02484 #define PIO_LOCKSR_P6 (0x1u << 6) /*  (PIO_LOCKSR) Lock Status. */
02485 #define PIO_LOCKSR_P7 (0x1u << 7) /*  (PIO_LOCKSR) Lock Status. */
02486 #define PIO_LOCKSR_P8 (0x1u << 8) /*  (PIO_LOCKSR) Lock Status. */
02487 #define PIO_LOCKSR_P9 (0x1u << 9) /*  (PIO_LOCKSR) Lock Status. */
02488 #define PIO_LOCKSR_P10 (0x1u << 10) /*  (PIO_LOCKSR) Lock Status. */
02489 #define PIO_LOCKSR_P11 (0x1u << 11) /*  (PIO_LOCKSR) Lock Status. */
02490 #define PIO_LOCKSR_P12 (0x1u << 12) /*  (PIO_LOCKSR) Lock Status. */
02491 #define PIO_LOCKSR_P13 (0x1u << 13) /*  (PIO_LOCKSR) Lock Status. */
02492 #define PIO_LOCKSR_P14 (0x1u << 14) /*  (PIO_LOCKSR) Lock Status. */
02493 #define PIO_LOCKSR_P15 (0x1u << 15) /*  (PIO_LOCKSR) Lock Status. */
02494 #define PIO_LOCKSR_P16 (0x1u << 16) /*  (PIO_LOCKSR) Lock Status. */
02495 #define PIO_LOCKSR_P17 (0x1u << 17) /*  (PIO_LOCKSR) Lock Status. */
02496 #define PIO_LOCKSR_P18 (0x1u << 18) /*  (PIO_LOCKSR) Lock Status. */
02497 #define PIO_LOCKSR_P19 (0x1u << 19) /*  (PIO_LOCKSR) Lock Status. */
02498 #define PIO_LOCKSR_P20 (0x1u << 20) /*  (PIO_LOCKSR) Lock Status. */
02499 #define PIO_LOCKSR_P21 (0x1u << 21) /*  (PIO_LOCKSR) Lock Status. */
02500 #define PIO_LOCKSR_P22 (0x1u << 22) /*  (PIO_LOCKSR) Lock Status. */
02501 #define PIO_LOCKSR_P23 (0x1u << 23) /*  (PIO_LOCKSR) Lock Status. */
02502 #define PIO_LOCKSR_P24 (0x1u << 24) /*  (PIO_LOCKSR) Lock Status. */
02503 #define PIO_LOCKSR_P25 (0x1u << 25) /*  (PIO_LOCKSR) Lock Status. */
02504 #define PIO_LOCKSR_P26 (0x1u << 26) /*  (PIO_LOCKSR) Lock Status. */
02505 #define PIO_LOCKSR_P27 (0x1u << 27) /*  (PIO_LOCKSR) Lock Status. */
02506 #define PIO_LOCKSR_P28 (0x1u << 28) /*  (PIO_LOCKSR) Lock Status. */
02507 #define PIO_LOCKSR_P29 (0x1u << 29) /*  (PIO_LOCKSR) Lock Status. */
02508 #define PIO_LOCKSR_P30 (0x1u << 30) /*  (PIO_LOCKSR) Lock Status. */
02509 #define PIO_LOCKSR_P31 (0x1u << 31) /*  (PIO_LOCKSR) Lock Status. */
02510 /* -------- PIO_WPMR : (PIO Offset: 0x00E4) Write Protect Mode Register -------- */
02511 #define PIO_WPMR_WPEN (0x1u << 0) /*  (PIO_WPMR) Write Protect Enable */
02512 #define PIO_WPMR_WPKEY_Pos 8
02513 #define PIO_WPMR_WPKEY_Msk (0xffffffu << PIO_WPMR_WPKEY_Pos) /*  (PIO_WPMR) Write Protect KEY */
02514 #define PIO_WPMR_WPKEY(value) ((PIO_WPMR_WPKEY_Msk & ((value) << PIO_WPMR_WPKEY_Pos)))
02515 /* -------- PIO_WPSR : (PIO Offset: 0x00E8) Write Protect Status Register -------- */
02516 #define PIO_WPSR_WPVS (0x1u << 0) /*  (PIO_WPSR) Write Protect Violation Status */
02517 #define PIO_WPSR_WPVSRC_Pos 8
02518 #define PIO_WPSR_WPVSRC_Msk (0xffffu << PIO_WPSR_WPVSRC_Pos) /*  (PIO_WPSR) Write Protect Violation Source */
02519 /* -------- PIO_SCHMITT : (PIO Offset: 0x0100) Schmitt Trigger Register -------- */
02520 #define PIO_SCHMITT_SCHMITT0 (0x1u << 0) /*  (PIO_SCHMITT)  */
02521 #define PIO_SCHMITT_SCHMITT1 (0x1u << 1) /*  (PIO_SCHMITT)  */
02522 #define PIO_SCHMITT_SCHMITT2 (0x1u << 2) /*  (PIO_SCHMITT)  */
02523 #define PIO_SCHMITT_SCHMITT3 (0x1u << 3) /*  (PIO_SCHMITT)  */
02524 #define PIO_SCHMITT_SCHMITT4 (0x1u << 4) /*  (PIO_SCHMITT)  */
02525 #define PIO_SCHMITT_SCHMITT5 (0x1u << 5) /*  (PIO_SCHMITT)  */
02526 #define PIO_SCHMITT_SCHMITT6 (0x1u << 6) /*  (PIO_SCHMITT)  */
02527 #define PIO_SCHMITT_SCHMITT7 (0x1u << 7) /*  (PIO_SCHMITT)  */
02528 #define PIO_SCHMITT_SCHMITT8 (0x1u << 8) /*  (PIO_SCHMITT)  */
02529 #define PIO_SCHMITT_SCHMITT9 (0x1u << 9) /*  (PIO_SCHMITT)  */
02530 #define PIO_SCHMITT_SCHMITT10 (0x1u << 10) /*  (PIO_SCHMITT)  */
02531 #define PIO_SCHMITT_SCHMITT11 (0x1u << 11) /*  (PIO_SCHMITT)  */
02532 #define PIO_SCHMITT_SCHMITT12 (0x1u << 12) /*  (PIO_SCHMITT)  */
02533 #define PIO_SCHMITT_SCHMITT13 (0x1u << 13) /*  (PIO_SCHMITT)  */
02534 #define PIO_SCHMITT_SCHMITT14 (0x1u << 14) /*  (PIO_SCHMITT)  */
02535 #define PIO_SCHMITT_SCHMITT15 (0x1u << 15) /*  (PIO_SCHMITT)  */
02536 #define PIO_SCHMITT_SCHMITT16 (0x1u << 16) /*  (PIO_SCHMITT)  */
02537 #define PIO_SCHMITT_SCHMITT17 (0x1u << 17) /*  (PIO_SCHMITT)  */
02538 #define PIO_SCHMITT_SCHMITT18 (0x1u << 18) /*  (PIO_SCHMITT)  */
02539 #define PIO_SCHMITT_SCHMITT19 (0x1u << 19) /*  (PIO_SCHMITT)  */
02540 #define PIO_SCHMITT_SCHMITT20 (0x1u << 20) /*  (PIO_SCHMITT)  */
02541 #define PIO_SCHMITT_SCHMITT21 (0x1u << 21) /*  (PIO_SCHMITT)  */
02542 #define PIO_SCHMITT_SCHMITT22 (0x1u << 22) /*  (PIO_SCHMITT)  */
02543 #define PIO_SCHMITT_SCHMITT23 (0x1u << 23) /*  (PIO_SCHMITT)  */
02544 #define PIO_SCHMITT_SCHMITT24 (0x1u << 24) /*  (PIO_SCHMITT)  */
02545 #define PIO_SCHMITT_SCHMITT25 (0x1u << 25) /*  (PIO_SCHMITT)  */
02546 #define PIO_SCHMITT_SCHMITT26 (0x1u << 26) /*  (PIO_SCHMITT)  */
02547 #define PIO_SCHMITT_SCHMITT27 (0x1u << 27) /*  (PIO_SCHMITT)  */
02548 #define PIO_SCHMITT_SCHMITT28 (0x1u << 28) /*  (PIO_SCHMITT)  */
02549 #define PIO_SCHMITT_SCHMITT29 (0x1u << 29) /*  (PIO_SCHMITT)  */
02550 #define PIO_SCHMITT_SCHMITT30 (0x1u << 30) /*  (PIO_SCHMITT)  */
02551 #define PIO_SCHMITT_SCHMITT31 (0x1u << 31) /*  (PIO_SCHMITT)  */
02552
02553
02554
02555 /* ============================================================================= */
02556 /*  SOFTWARE API DEFINITION FOR Pulse Width Modulation Controller */
02557 /* ============================================================================= */
02558
02559 #ifndef __ASSEMBLY__
02560 /* PwmCh_num hardware registers */
02561 typedef struct {
02562   RwReg      PWM_CMR;        /*  (PwmCh_num Offset: 0x0) PWM Channel Mode Register */
02563   RwReg      PWM_CDTY;       /*  (PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register */
02564   RwReg      PWM_CPRD;       /*  (PwmCh_num Offset: 0x8) PWM Channel Period Register */
02565   RwReg      PWM_CCNT;       /*  (PwmCh_num Offset: 0xC) PWM Channel Counter Register */
02566   RwReg      PWM_CUPD;       /*  (PwmCh_num Offset: 0x10) PWM Channel Update Register */
02567   RwReg      Reserved1[3];
02568 } PwmCh_num;
02569 /* Pwm hardware registers */
02570 typedef struct {
02571   RwReg      PWM_MR;         /*  (Pwm Offset: 0x00) PWM Mode Register */
02572   WoReg      PWM_ENA;        /*  (Pwm Offset: 0x04) PWM Enable Register */
02573   WoReg      PWM_DIS;        /*  (Pwm Offset: 0x08) PWM Disable Register */
02574   RoReg      PWM_SR;         /*  (Pwm Offset: 0x0C) PWM Status Register */
02575   WoReg      PWM_IER;        /*  (Pwm Offset: 0x10) PWM Interrupt Enable Register */
02576   WoReg      PWM_IDR;        /*  (Pwm Offset: 0x14) PWM Interrupt Disable Register */
02577   RoReg      PWM_IMR;        /*  (Pwm Offset: 0x18) PWM Interrupt Mask Register */
02578   RoReg      PWM_ISR;        /*  (Pwm Offset: 0x1C) PWM Interrupt Status Register */
02579   RwReg      Reserved1[120];
02580   PwmCh_num  PWM_CH_NUM[4];  /*  (Pwm Offset: 0x200) ch_num = 0 .. 3 */
02581 } Pwm;
02582 #endif /* __ASSEMBLY__ */
02583 /* -------- PWM_MR : (PWM Offset: 0x00) PWM Mode Register -------- */
02584 #define PWM_MR_DIVA_Pos 0
02585 #define PWM_MR_DIVA_Msk (0xffu << PWM_MR_DIVA_Pos) /*  (PWM_MR) CLKA, CLKB Divide Factor */
02586 #define   PWM_MR_DIVA_CLK_OFF (0x0u << 0) /*  (PWM_MR) CLKA, CLKB clock is turned off */
02587 #define   PWM_MR_DIVA_CLK_DIV1 (0x1u << 0) /*  (PWM_MR) CLKA, CLKB clock is clock selected by PREA, PREB */
02588 #define PWM_MR_PREA_Pos 8
02589 #define PWM_MR_PREA_Msk (0xfu << PWM_MR_PREA_Pos) /*  (PWM_MR)  */
02590 #define   PWM_MR_PREA_MCK (0x0u << 8) /*  (PWM_MR) Master Clock */
02591 #define   PWM_MR_PREA_MCKDIV2 (0x1u << 8) /*  (PWM_MR) Master Clock divided by 2 */
02592 #define   PWM_MR_PREA_MCKDIV4 (0x2u << 8) /*  (PWM_MR) Master Clock divided by 4 */
02593 #define   PWM_MR_PREA_MCKDIV8 (0x3u << 8) /*  (PWM_MR) Master Clock divided by 8 */
02594 #define   PWM_MR_PREA_MCKDIV16 (0x4u << 8) /*  (PWM_MR) Master Clock divided by 16 */
02595 #define   PWM_MR_PREA_MCKDIV32 (0x5u << 8) /*  (PWM_MR) Master Clock divided by 32 */
02596 #define   PWM_MR_PREA_MCKDIV64 (0x6u << 8) /*  (PWM_MR) Master Clock divided by 64 */
02597 #define   PWM_MR_PREA_MCKDIV128 (0x7u << 8) /*  (PWM_MR) Master Clock divided by 128 */
02598 #define   PWM_MR_PREA_MCKDIV256 (0x8u << 8) /*  (PWM_MR) Master Clock divided by 256 */
02599 #define   PWM_MR_PREA_MCKDIV512 (0x9u << 8) /*  (PWM_MR) Master Clock divided by 512 */
02600 #define   PWM_MR_PREA_MCKDIV1024 (0xAu << 8) /*  (PWM_MR) Master Clock divided by 1024 */
02601 #define PWM_MR_DIVB_Pos 16
02602 #define PWM_MR_DIVB_Msk (0xffu << PWM_MR_DIVB_Pos) /*  (PWM_MR) CLKA, CLKB Divide Factor */
02603 #define   PWM_MR_DIVB_CLK_OFF (0x0u << 16) /*  (PWM_MR) CLKA, CLKB clock is turned off */
02604 #define   PWM_MR_DIVB_CLK_DIV1 (0x1u << 16) /*  (PWM_MR) CLKA, CLKB clock is clock selected by PREA, PREB */
02605 #define PWM_MR_PREB_Pos 24
02606 #define PWM_MR_PREB_Msk (0xfu << PWM_MR_PREB_Pos) /*  (PWM_MR)  */
02607 #define   PWM_MR_PREB_MCK (0x0u << 24) /*  (PWM_MR) Master Clock */
02608 #define   PWM_MR_PREB_MCKDIV2 (0x1u << 24) /*  (PWM_MR) Master Clock divided by 2 */
02609 #define   PWM_MR_PREB_MCKDIV4 (0x2u << 24) /*  (PWM_MR) Master Clock divided by 4 */
02610 #define   PWM_MR_PREB_MCKDIV8 (0x3u << 24) /*  (PWM_MR) Master Clock divided by 8 */
02611 #define   PWM_MR_PREB_MCKDIV16 (0x4u << 24) /*  (PWM_MR) Master Clock divided by 16 */
02612 #define   PWM_MR_PREB_MCKDIV32 (0x5u << 24) /*  (PWM_MR) Master Clock divided by 32 */
02613 #define   PWM_MR_PREB_MCKDIV64 (0x6u << 24) /*  (PWM_MR) Master Clock divided by 64 */
02614 #define   PWM_MR_PREB_MCKDIV128 (0x7u << 24) /*  (PWM_MR) Master Clock divided by 128 */
02615 #define   PWM_MR_PREB_MCKDIV256 (0x8u << 24) /*  (PWM_MR) Master Clock divided by 256 */
02616 #define   PWM_MR_PREB_MCKDIV512 (0x9u << 24) /*  (PWM_MR) Master Clock divided by 512 */
02617 #define   PWM_MR_PREB_MCKDIV1024 (0xAu << 24) /*  (PWM_MR) Master Clock divided by 1024 */
02618 /* -------- PWM_ENA : (PWM Offset: 0x04) PWM Enable Register -------- */
02619 #define PWM_ENA_CHID0 (0x1u << 0) /*  (PWM_ENA) Channel ID */
02620 #define PWM_ENA_CHID1 (0x1u << 1) /*  (PWM_ENA) Channel ID */
02621 #define PWM_ENA_CHID2 (0x1u << 2) /*  (PWM_ENA) Channel ID */
02622 #define PWM_ENA_CHID3 (0x1u << 3) /*  (PWM_ENA) Channel ID */
02623 /* -------- PWM_DIS : (PWM Offset: 0x08) PWM Disable Register -------- */
02624 #define PWM_DIS_CHID0 (0x1u << 0) /*  (PWM_DIS) Channel ID */
02625 #define PWM_DIS_CHID1 (0x1u << 1) /*  (PWM_DIS) Channel ID */
02626 #define PWM_DIS_CHID2 (0x1u << 2) /*  (PWM_DIS) Channel ID */
02627 #define PWM_DIS_CHID3 (0x1u << 3) /*  (PWM_DIS) Channel ID */
02628 /* -------- PWM_SR : (PWM Offset: 0x0C) PWM Status Register -------- */
02629 #define PWM_SR_CHID0 (0x1u << 0) /*  (PWM_SR) Channel ID */
02630 #define PWM_SR_CHID1 (0x1u << 1) /*  (PWM_SR) Channel ID */
02631 #define PWM_SR_CHID2 (0x1u << 2) /*  (PWM_SR) Channel ID */
02632 #define PWM_SR_CHID3 (0x1u << 3) /*  (PWM_SR) Channel ID */
02633 /* -------- PWM_IER : (PWM Offset: 0x10) PWM Interrupt Enable Register -------- */
02634 #define PWM_IER_CHID0 (0x1u << 0) /*  (PWM_IER) Channel ID. */
02635 #define PWM_IER_CHID1 (0x1u << 1) /*  (PWM_IER) Channel ID. */
02636 #define PWM_IER_CHID2 (0x1u << 2) /*  (PWM_IER) Channel ID. */
02637 #define PWM_IER_CHID3 (0x1u << 3) /*  (PWM_IER) Channel ID. */
02638 /* -------- PWM_IDR : (PWM Offset: 0x14) PWM Interrupt Disable Register -------- */
02639 #define PWM_IDR_CHID0 (0x1u << 0) /*  (PWM_IDR) Channel ID. */
02640 #define PWM_IDR_CHID1 (0x1u << 1) /*  (PWM_IDR) Channel ID. */
02641 #define PWM_IDR_CHID2 (0x1u << 2) /*  (PWM_IDR) Channel ID. */
02642 #define PWM_IDR_CHID3 (0x1u << 3) /*  (PWM_IDR) Channel ID. */
02643 /* -------- PWM_IMR : (PWM Offset: 0x18) PWM Interrupt Mask Register -------- */
02644 #define PWM_IMR_CHID0 (0x1u << 0) /*  (PWM_IMR) Channel ID. */
02645 #define PWM_IMR_CHID1 (0x1u << 1) /*  (PWM_IMR) Channel ID. */
02646 #define PWM_IMR_CHID2 (0x1u << 2) /*  (PWM_IMR) Channel ID. */
02647 #define PWM_IMR_CHID3 (0x1u << 3) /*  (PWM_IMR) Channel ID. */
02648 /* -------- PWM_ISR : (PWM Offset: 0x1C) PWM Interrupt Status Register -------- */
02649 #define PWM_ISR_CHID0 (0x1u << 0) /*  (PWM_ISR) Channel ID */
02650 #define PWM_ISR_CHID1 (0x1u << 1) /*  (PWM_ISR) Channel ID */
02651 #define PWM_ISR_CHID2 (0x1u << 2) /*  (PWM_ISR) Channel ID */
02652 #define PWM_ISR_CHID3 (0x1u << 3) /*  (PWM_ISR) Channel ID */
02653 /* -------- PWM_CMR : (PWM Offset: N/A) PWM Channel Mode Register -------- */
02654 #define PWM_CMR_CPRE_Pos 0
02655 #define PWM_CMR_CPRE_Msk (0xfu << PWM_CMR_CPRE_Pos) /*  (PWM_CMR) Channel Pre-scaler */
02656 #define   PWM_CMR_CPRE_MCK (0x0u << 0) /*  (PWM_CMR) Master Clock */
02657 #define   PWM_CMR_CPRE_MCKDIV2 (0x1u << 0) /*  (PWM_CMR) Master Clock divided by 2 */
02658 #define   PWM_CMR_CPRE_MCKDIV4 (0x2u << 0) /*  (PWM_CMR) Master Clock divided by 4 */
02659 #define   PWM_CMR_CPRE_MCKDIV8 (0x3u << 0) /*  (PWM_CMR) Master Clock divided by 8 */
02660 #define   PWM_CMR_CPRE_MCKDIV16 (0x4u << 0) /*  (PWM_CMR) Master Clock divided by 16 */
02661 #define   PWM_CMR_CPRE_MCKDIV32 (0x5u << 0) /*  (PWM_CMR) Master Clock divided by 32 */
02662 #define   PWM_CMR_CPRE_MCKDIV64 (0x6u << 0) /*  (PWM_CMR) Master Clock divided by 64 */
02663 #define   PWM_CMR_CPRE_MCKDIV128 (0x7u << 0) /*  (PWM_CMR) Master Clock divided by 128 */
02664 #define   PWM_CMR_CPRE_MCKDIV256 (0x8u << 0) /*  (PWM_CMR) Master Clock divided by 256 */
02665 #define   PWM_CMR_CPRE_MCKDIV512 (0x9u << 0) /*  (PWM_CMR) Master Clock divided by 512 */
02666 #define   PWM_CMR_CPRE_MCKDIV1024 (0xAu << 0) /*  (PWM_CMR) Master Clock divided by 1024 */
02667 #define   PWM_CMR_CPRE_CLKA (0xBu << 0) /*  (PWM_CMR) Clock A */
02668 #define   PWM_CMR_CPRE_CLKB (0xCu << 0) /*  (PWM_CMR) Clock B */
02669 #define PWM_CMR_CALG (0x1u << 8) /*  (PWM_CMR) Channel Alignment */
02670 #define PWM_CMR_CPOL (0x1u << 9) /*  (PWM_CMR) Channel Polarity */
02671 #define PWM_CMR_CPD (0x1u << 10) /*  (PWM_CMR) Channel Update Period */
02672 /* -------- PWM_CDTY : (PWM Offset: N/A) PWM Channel Duty Cycle Register -------- */
02673 #define PWM_CDTY_CDTY_Pos 0
02674 #define PWM_CDTY_CDTY_Msk (0xffffffffu << PWM_CDTY_CDTY_Pos) /*  (PWM_CDTY) Channel Duty Cycle */
02675 #define PWM_CDTY_CDTY(value) ((PWM_CDTY_CDTY_Msk & ((value) << PWM_CDTY_CDTY_Pos)))
02676 /* -------- PWM_CPRD : (PWM Offset: N/A) PWM Channel Period Register -------- */
02677 #define PWM_CPRD_CPRD_Pos 0
02678 #define PWM_CPRD_CPRD_Msk (0xffffffffu << PWM_CPRD_CPRD_Pos) /*  (PWM_CPRD) Channel Period */
02679 #define PWM_CPRD_CPRD(value) ((PWM_CPRD_CPRD_Msk & ((value) << PWM_CPRD_CPRD_Pos)))
02680 /* -------- PWM_CCNT : (PWM Offset: N/A) PWM Channel Counter Register -------- */
02681 #define PWM_CCNT_CNT_Pos 0
02682 #define PWM_CCNT_CNT_Msk (0xffffffffu << PWM_CCNT_CNT_Pos) /*  (PWM_CCNT) Channel Counter Register */
02683 /* -------- PWM_CUPD : (PWM Offset: N/A) PWM Channel Update Register -------- */
02684 #define PWM_CUPD_CUPD_Pos 0
02685 #define PWM_CUPD_CUPD_Msk (0xffffffffu << PWM_CUPD_CUPD_Pos) /*  (PWM_CUPD)  */
02686 #define PWM_CUPD_CUPD(value) ((PWM_CUPD_CUPD_Msk & ((value) << PWM_CUPD_CUPD_Pos)))
02687
02688
02689 /* ============================================================================= */
02690 /*  SOFTWARE API DEFINITION FOR Reset Controller */
02691 /* ============================================================================= */
02692
02693 #ifndef __ASSEMBLY__
02694 /* Rstc hardware registers */
02695 typedef struct {
02696   WoReg RSTC_CR; /*  (Rstc Offset: 0x00) Control Register */
02697   RoReg RSTC_SR; /*  (Rstc Offset: 0x04) Status Register */
02698   RwReg RSTC_MR; /*  (Rstc Offset: 0x08) Mode Register */
02699 } Rstc;
02700 #endif /* __ASSEMBLY__ */
02701 /* -------- RSTC_CR : (RSTC Offset: 0x00) Control Register -------- */
02702 #define RSTC_CR_PROCRST (0x1u << 0) /*  (RSTC_CR) Processor Reset */
02703 #define RSTC_CR_PERRST (0x1u << 2) /*  (RSTC_CR) Peripheral Reset */
02704 #define RSTC_CR_EXTRST (0x1u << 3) /*  (RSTC_CR) External Reset */
02705 #define RSTC_CR_KEY_Pos 24
02706 #define RSTC_CR_KEY_Msk (0xffu << RSTC_CR_KEY_Pos) /*  (RSTC_CR) Password */
02707 #define RSTC_CR_KEY(value) ((RSTC_CR_KEY_Msk & ((value) << RSTC_CR_KEY_Pos)))
02708 /* -------- RSTC_SR : (RSTC Offset: 0x04) Status Register -------- */
02709 #define RSTC_SR_URSTS (0x1u << 0) /*  (RSTC_SR) User Reset Status */
02710 #define RSTC_SR_RSTTYP_Pos 8
02711 #define RSTC_SR_RSTTYP_Msk (0x7u << RSTC_SR_RSTTYP_Pos) /*  (RSTC_SR) Reset Type */
02712 #define RSTC_SR_NRSTL (0x1u << 16) /*  (RSTC_SR) NRST Pin Level */
02713 #define RSTC_SR_SRCMP (0x1u << 17) /*  (RSTC_SR) Software Reset Command in Progress */
02714 /* -------- RSTC_MR : (RSTC Offset: 0x08) Mode Register -------- */
02715 #define RSTC_MR_URSTEN (0x1u << 0) /*  (RSTC_MR) User Reset Enable */
02716 #define RSTC_MR_URSTIEN (0x1u << 4) /*  (RSTC_MR) User Reset Interrupt Enable */
02717 #define RSTC_MR_ERSTL_Pos 8
02718 #define RSTC_MR_ERSTL_Msk (0xfu << RSTC_MR_ERSTL_Pos) /*  (RSTC_MR) External Reset Length */
02719 #define RSTC_MR_ERSTL(value) ((RSTC_MR_ERSTL_Msk & ((value) << RSTC_MR_ERSTL_Pos)))
02720 #define RSTC_MR_KEY_Pos 24
02721 #define RSTC_MR_KEY_Msk (0xffu << RSTC_MR_KEY_Pos) /*  (RSTC_MR) Password */
02722 #define RSTC_MR_KEY(value) ((RSTC_MR_KEY_Msk & ((value) << RSTC_MR_KEY_Pos)))
02723
02724
02725 /* ============================================================================= */
02726 /*  SOFTWARE API DEFINITION FOR Real-time Clock */
02727 /* ============================================================================= */
02728
02729 #ifndef __ASSEMBLY__
02730 /* Rtc hardware registers */
02731 typedef struct {
02732   RwReg RTC_CR;        /*  (Rtc Offset: 0x00) Control Register */
02733   RwReg RTC_MR;        /*  (Rtc Offset: 0x04) Mode Register */
02734   RwReg RTC_TIMR;      /*  (Rtc Offset: 0x08) Time Register */
02735   RwReg RTC_CALR;      /*  (Rtc Offset: 0x0C) Calendar Register */
02736   RwReg RTC_TIMALR;    /*  (Rtc Offset: 0x10) Time Alarm Register */
02737   RwReg RTC_CALALR;    /*  (Rtc Offset: 0x14) Calendar Alarm Register */
02738   RoReg RTC_SR;        /*  (Rtc Offset: 0x18) Status Register */
02739   WoReg RTC_SCCR;      /*  (Rtc Offset: 0x1C) Status Clear Command Register */
02740   WoReg RTC_IER;       /*  (Rtc Offset: 0x20) Interrupt Enable Register */
02741   WoReg RTC_IDR;       /*  (Rtc Offset: 0x24) Interrupt Disable Register */
02742   RoReg RTC_IMR;       /*  (Rtc Offset: 0x28) Interrupt Mask Register */
02743   RoReg RTC_VER;       /*  (Rtc Offset: 0x2C) Valid Entry Register */
02744   RwReg Reserved1[45];
02745   RwReg RTC_WPMR;      /*  (Rtc Offset: 0xE4) Write Protect Mode Register */
02746 } Rtc;
02747 #endif /* __ASSEMBLY__ */
02748 /* -------- RTC_CR : (RTC Offset: 0x00) Control Register -------- */
02749 #define RTC_CR_UPDTIM (0x1u << 0) /*  (RTC_CR) Update Request Time Register */
02750 #define RTC_CR_UPDCAL (0x1u << 1) /*  (RTC_CR) Update Request Calendar Register */
02751 #define RTC_CR_TIMEVSEL_Pos 8
02752 #define RTC_CR_TIMEVSEL_Msk (0x3u << RTC_CR_TIMEVSEL_Pos) /*  (RTC_CR) Time Event Selection */
02753 #define   RTC_CR_TIMEVSEL_MINUTE (0x0u << 8) /*  (RTC_CR) Minute change */
02754 #define   RTC_CR_TIMEVSEL_HOUR (0x1u << 8) /*  (RTC_CR) Hour change */
02755 #define   RTC_CR_TIMEVSEL_MIDNIGHT (0x2u << 8) /*  (RTC_CR) Every day at midnight */
02756 #define   RTC_CR_TIMEVSEL_NOON (0x3u << 8) /*  (RTC_CR) Every day at noon */
02757 #define RTC_CR_CALEVSEL_Pos 16
02758 #define RTC_CR_CALEVSEL_Msk (0x3u << RTC_CR_CALEVSEL_Pos) /*  (RTC_CR) Calendar Event Selection */
02759 #define   RTC_CR_CALEVSEL_WEEK (0x0u << 16) /*  (RTC_CR) Week change (every Monday at time 00:00:00) */
02760 #define   RTC_CR_CALEVSEL_MONTH (0x1u << 16) /*  (RTC_CR) Month change (every 01 of each month at time 00:00:00) */
02761 #define   RTC_CR_CALEVSEL_YEAR (0x2u << 16) /*  (RTC_CR) Year change (every January 1 at time 00:00:00) */
02762 /* -------- RTC_MR : (RTC Offset: 0x04) Mode Register -------- */
02763 #define RTC_MR_HRMOD (0x1u << 0) /*  (RTC_MR) 12-/24-hour Mode */
02764 /* -------- RTC_TIMR : (RTC Offset: 0x08) Time Register -------- */
02765 #define RTC_TIMR_SEC_Pos 0
02766 #define RTC_TIMR_SEC_Msk (0x7fu << RTC_TIMR_SEC_Pos) /*  (RTC_TIMR) Current Second */
02767 #define RTC_TIMR_SEC(value) ((RTC_TIMR_SEC_Msk & ((value) << RTC_TIMR_SEC_Pos)))
02768 #define RTC_TIMR_MIN_Pos 8
02769 #define RTC_TIMR_MIN_Msk (0x7fu << RTC_TIMR_MIN_Pos) /*  (RTC_TIMR) Current Minute */
02770 #define RTC_TIMR_MIN(value) ((RTC_TIMR_MIN_Msk & ((value) << RTC_TIMR_MIN_Pos)))
02771 #define RTC_TIMR_HOUR_Pos 16
02772 #define RTC_TIMR_HOUR_Msk (0x3fu << RTC_TIMR_HOUR_Pos) /*  (RTC_TIMR) Current Hour */
02773 #define RTC_TIMR_HOUR(value) ((RTC_TIMR_HOUR_Msk & ((value) << RTC_TIMR_HOUR_Pos)))
02774 #define RTC_TIMR_AMPM (0x1u << 22) /*  (RTC_TIMR) Ante Meridiem Post Meridiem Indicator */
02775 /* -------- RTC_CALR : (RTC Offset: 0x0C) Calendar Register -------- */
02776 #define RTC_CALR_CENT_Pos 0
02777 #define RTC_CALR_CENT_Msk (0x7fu << RTC_CALR_CENT_Pos) /*  (RTC_CALR) Current Century */
02778 #define RTC_CALR_CENT(value) ((RTC_CALR_CENT_Msk & ((value) << RTC_CALR_CENT_Pos)))
02779 #define RTC_CALR_YEAR_Pos 8
02780 #define RTC_CALR_YEAR_Msk (0xffu << RTC_CALR_YEAR_Pos) /*  (RTC_CALR) Current Year */
02781 #define RTC_CALR_YEAR(value) ((RTC_CALR_YEAR_Msk & ((value) << RTC_CALR_YEAR_Pos)))
02782 #define RTC_CALR_MONTH_Pos 16
02783 #define RTC_CALR_MONTH_Msk (0x1fu << RTC_CALR_MONTH_Pos) /*  (RTC_CALR) Current Month */
02784 #define RTC_CALR_MONTH(value) ((RTC_CALR_MONTH_Msk & ((value) << RTC_CALR_MONTH_Pos)))
02785 #define RTC_CALR_DAY_Pos 21
02786 #define RTC_CALR_DAY_Msk (0x7u << RTC_CALR_DAY_Pos) /*  (RTC_CALR) Current Day in Current Week */
02787 #define RTC_CALR_DAY(value) ((RTC_CALR_DAY_Msk & ((value) << RTC_CALR_DAY_Pos)))
02788 #define RTC_CALR_DATE_Pos 24
02789 #define RTC_CALR_DATE_Msk (0x3fu << RTC_CALR_DATE_Pos) /*  (RTC_CALR) Current Day in Current Month */
02790 #define RTC_CALR_DATE(value) ((RTC_CALR_DATE_Msk & ((value) << RTC_CALR_DATE_Pos)))
02791 /* -------- RTC_TIMALR : (RTC Offset: 0x10) Time Alarm Register -------- */
02792 #define RTC_TIMALR_SEC_Pos 0
02793 #define RTC_TIMALR_SEC_Msk (0x7fu << RTC_TIMALR_SEC_Pos) /*  (RTC_TIMALR) Second Alarm */
02794 #define RTC_TIMALR_SEC(value) ((RTC_TIMALR_SEC_Msk & ((value) << RTC_TIMALR_SEC_Pos)))
02795 #define RTC_TIMALR_SECEN (0x1u << 7) /*  (RTC_TIMALR) Second Alarm Enable */
02796 #define RTC_TIMALR_MIN_Pos 8
02797 #define RTC_TIMALR_MIN_Msk (0x7fu << RTC_TIMALR_MIN_Pos) /*  (RTC_TIMALR) Minute Alarm */
02798 #define RTC_TIMALR_MIN(value) ((RTC_TIMALR_MIN_Msk & ((value) << RTC_TIMALR_MIN_Pos)))
02799 #define RTC_TIMALR_MINEN (0x1u << 15) /*  (RTC_TIMALR) Minute Alarm Enable */
02800 #define RTC_TIMALR_HOUR_Pos 16
02801 #define RTC_TIMALR_HOUR_Msk (0x3fu << RTC_TIMALR_HOUR_Pos) /*  (RTC_TIMALR) Hour Alarm */
02802 #define RTC_TIMALR_HOUR(value) ((RTC_TIMALR_HOUR_Msk & ((value) << RTC_TIMALR_HOUR_Pos)))
02803 #define RTC_TIMALR_AMPM (0x1u << 22) /*  (RTC_TIMALR) AM/PM Indicator */
02804 #define RTC_TIMALR_HOUREN (0x1u << 23) /*  (RTC_TIMALR) Hour Alarm Enable */
02805 /* -------- RTC_CALALR : (RTC Offset: 0x14) Calendar Alarm Register -------- */
02806 #define RTC_CALALR_MONTH_Pos 16
02807 #define RTC_CALALR_MONTH_Msk (0x1fu << RTC_CALALR_MONTH_Pos) /*  (RTC_CALALR) Month Alarm */
02808 #define RTC_CALALR_MONTH(value) ((RTC_CALALR_MONTH_Msk & ((value) << RTC_CALALR_MONTH_Pos)))
02809 #define RTC_CALALR_MTHEN (0x1u << 23) /*  (RTC_CALALR) Month Alarm Enable */
02810 #define RTC_CALALR_DATE_Pos 24
02811 #define RTC_CALALR_DATE_Msk (0x3fu << RTC_CALALR_DATE_Pos) /*  (RTC_CALALR) Date Alarm */
02812 #define RTC_CALALR_DATE(value) ((RTC_CALALR_DATE_Msk & ((value) << RTC_CALALR_DATE_Pos)))
02813 #define RTC_CALALR_DATEEN (0x1u << 31) /*  (RTC_CALALR) Date Alarm Enable */
02814 /* -------- RTC_SR : (RTC Offset: 0x18) Status Register -------- */
02815 #define RTC_SR_ACKUPD (0x1u << 0) /*  (RTC_SR) Acknowledge for Update */
02816 #define RTC_SR_ALARM (0x1u << 1) /*  (RTC_SR) Alarm Flag */
02817 #define RTC_SR_SEC (0x1u << 2) /*  (RTC_SR) Second Event */
02818 #define RTC_SR_TIMEV (0x1u << 3) /*  (RTC_SR) Time Event */
02819 #define RTC_SR_CALEV (0x1u << 4) /*  (RTC_SR) Calendar Event */
02820 /* -------- RTC_SCCR : (RTC Offset: 0x1C) Status Clear Command Register -------- */
02821 #define RTC_SCCR_ACKCLR (0x1u << 0) /*  (RTC_SCCR) Acknowledge Clear */
02822 #define RTC_SCCR_ALRCLR (0x1u << 1) /*  (RTC_SCCR) Alarm Clear */
02823 #define RTC_SCCR_SECCLR (0x1u << 2) /*  (RTC_SCCR) Second Clear */
02824 #define RTC_SCCR_TIMCLR (0x1u << 3) /*  (RTC_SCCR) Time Clear */
02825 #define RTC_SCCR_CALCLR (0x1u << 4) /*  (RTC_SCCR) Calendar Clear */
02826 /* -------- RTC_IER : (RTC Offset: 0x20) Interrupt Enable Register -------- */
02827 #define RTC_IER_ACKEN (0x1u << 0) /*  (RTC_IER) Acknowledge Update Interrupt Enable */
02828 #define RTC_IER_ALREN (0x1u << 1) /*  (RTC_IER) Alarm Interrupt Enable */
02829 #define RTC_IER_SECEN (0x1u << 2) /*  (RTC_IER) Second Event Interrupt Enable */
02830 #define RTC_IER_TIMEN (0x1u << 3) /*  (RTC_IER) Time Event Interrupt Enable */
02831 #define RTC_IER_CALEN (0x1u << 4) /*  (RTC_IER) Calendar Event Interrupt Enable */
02832 /* -------- RTC_IDR : (RTC Offset: 0x24) Interrupt Disable Register -------- */
02833 #define RTC_IDR_ACKDIS (0x1u << 0) /*  (RTC_IDR) Acknowledge Update Interrupt Disable */
02834 #define RTC_IDR_ALRDIS (0x1u << 1) /*  (RTC_IDR) Alarm Interrupt Disable */
02835 #define RTC_IDR_SECDIS (0x1u << 2) /*  (RTC_IDR) Second Event Interrupt Disable */
02836 #define RTC_IDR_TIMDIS (0x1u << 3) /*  (RTC_IDR) Time Event Interrupt Disable */
02837 #define RTC_IDR_CALDIS (0x1u << 4) /*  (RTC_IDR) Calendar Event Interrupt Disable */
02838 /* -------- RTC_IMR : (RTC Offset: 0x28) Interrupt Mask Register -------- */
02839 #define RTC_IMR_ACK (0x1u << 0) /*  (RTC_IMR) Acknowledge Update Interrupt Mask */
02840 #define RTC_IMR_ALR (0x1u << 1) /*  (RTC_IMR) Alarm Interrupt Mask */
02841 #define RTC_IMR_SEC (0x1u << 2) /*  (RTC_IMR) Second Event Interrupt Mask */
02842 #define RTC_IMR_TIM (0x1u << 3) /*  (RTC_IMR) Time Event Interrupt Mask */
02843 #define RTC_IMR_CAL (0x1u << 4) /*  (RTC_IMR) Calendar Event Interrupt Mask */
02844 /* -------- RTC_VER : (RTC Offset: 0x2C) Valid Entry Register -------- */
02845 #define RTC_VER_NVTIM (0x1u << 0) /*  (RTC_VER) Non-valid Time */
02846 #define RTC_VER_NVCAL (0x1u << 1) /*  (RTC_VER) Non-valid Calendar */
02847 #define RTC_VER_NVTIMALR (0x1u << 2) /*  (RTC_VER) Non-valid Time Alarm */
02848 #define RTC_VER_NVCALALR (0x1u << 3) /*  (RTC_VER) Non-valid Calendar Alarm */
02849 /* -------- RTC_WPMR : (RTC Offset: 0xE4) Write Protect Mode Register -------- */
02850 #define RTC_WPMR_WPEN (0x1u << 0) /*  (RTC_WPMR) Write Protect Enable */
02851 #define RTC_WPMR_WPKEY_Pos 8
02852 #define RTC_WPMR_WPKEY_Msk (0xffffffu << RTC_WPMR_WPKEY_Pos) /*  (RTC_WPMR)  */
02853 #define RTC_WPMR_WPKEY(value) ((RTC_WPMR_WPKEY_Msk & ((value) << RTC_WPMR_WPKEY_Pos)))
02854
02855
02856 /* ============================================================================= */
02857 /*  SOFTWARE API DEFINITION FOR Real-time Timer */
02858 /* ============================================================================= */
02859
02860 #ifndef __ASSEMBLY__
02861 /* Rtt hardware registers */
02862 typedef struct {
02863   RwReg RTT_MR; /*  (Rtt Offset: 0x00) Mode Register */
02864   RwReg RTT_AR; /*  (Rtt Offset: 0x04) Alarm Register */
02865   RoReg RTT_VR; /*  (Rtt Offset: 0x08) Value Register */
02866   RoReg RTT_SR; /*  (Rtt Offset: 0x0C) Status Register */
02867 } Rtt;
02868 #endif /* __ASSEMBLY__ */
02869 /* -------- RTT_MR : (RTT Offset: 0x00) Mode Register -------- */
02870 #define RTT_MR_RTPRES_Pos 0
02871 #define RTT_MR_RTPRES_Msk (0xffffu << RTT_MR_RTPRES_Pos) /*  (RTT_MR) Real-time Timer Prescaler Value */
02872 #define RTT_MR_RTPRES(value) ((RTT_MR_RTPRES_Msk & ((value) << RTT_MR_RTPRES_Pos)))
02873 #define RTT_MR_ALMIEN (0x1u << 16) /*  (RTT_MR) Alarm Interrupt Enable */
02874 #define RTT_MR_RTTINCIEN (0x1u << 17) /*  (RTT_MR) Real-time Timer Increment Interrupt Enable */
02875 #define RTT_MR_RTTRST (0x1u << 18) /*  (RTT_MR) Real-time Timer Restart */
02876 /* -------- RTT_AR : (RTT Offset: 0x04) Alarm Register -------- */
02877 #define RTT_AR_ALMV_Pos 0
02878 #define RTT_AR_ALMV_Msk (0xffffffffu << RTT_AR_ALMV_Pos) /*  (RTT_AR) Alarm Value */
02879 #define RTT_AR_ALMV(value) ((RTT_AR_ALMV_Msk & ((value) << RTT_AR_ALMV_Pos)))
02880 /* -------- RTT_VR : (RTT Offset: 0x08) Value Register -------- */
02881 #define RTT_VR_CRTV_Pos 0
02882 #define RTT_VR_CRTV_Msk (0xffffffffu << RTT_VR_CRTV_Pos) /*  (RTT_VR) Current Real-time Value */
02883 /* -------- RTT_SR : (RTT Offset: 0x0C) Status Register -------- */
02884 #define RTT_SR_ALMS (0x1u << 0) /*  (RTT_SR) Real-time Alarm Status */
02885 #define RTT_SR_RTTINC (0x1u << 1) /*  (RTT_SR) Real-time Timer Increment */
02886
02887
02888 /* ============================================================================= */
02889 /*  SOFTWARE API DEFINITION FOR Serial Peripheral Interface */
02890 /* ============================================================================= */
02891
02892 #ifndef __ASSEMBLY__
02893 /* Spi hardware registers */
02894 typedef struct {
02895   WoReg SPI_CR;        /*  (Spi Offset: 0x00) Control Register */
02896   RwReg SPI_MR;        /*  (Spi Offset: 0x04) Mode Register */
02897   RoReg SPI_RDR;       /*  (Spi Offset: 0x08) Receive Data Register */
02898   WoReg SPI_TDR;       /*  (Spi Offset: 0x0C) Transmit Data Register */
02899   RoReg SPI_SR;        /*  (Spi Offset: 0x10) Status Register */
02900   WoReg SPI_IER;       /*  (Spi Offset: 0x14) Interrupt Enable Register */
02901   WoReg SPI_IDR;       /*  (Spi Offset: 0x18) Interrupt Disable Register */
02902   RoReg SPI_IMR;       /*  (Spi Offset: 0x1C) Interrupt Mask Register */
02903   RwReg Reserved1[4];
02904   RwReg SPI_CSR[4];    /*  (Spi Offset: 0x30) Chip Select Register */
02905   RwReg Reserved2[41];
02906   RwReg SPI_WPMR;      /*  (Spi Offset: 0xE4) Write Protection Control Register */
02907   RoReg SPI_WPSR;      /*  (Spi Offset: 0xE8) Write Protection Status Register */
02908   RwReg Reserved3[5];
02909   RwReg SPI_RPR;       /*  (Spi Offset: 0x100) Receive Pointer Register */
02910   RwReg SPI_RCR;       /*  (Spi Offset: 0x104) Receive Counter Register */
02911   RwReg SPI_TPR;       /*  (Spi Offset: 0x108) Transmit Pointer Register */
02912   RwReg SPI_TCR;       /*  (Spi Offset: 0x10C) Transmit Counter Register */
02913   RwReg SPI_RNPR;      /*  (Spi Offset: 0x110) Receive Next Pointer Register */
02914   RwReg SPI_RNCR;      /*  (Spi Offset: 0x114) Receive Next Counter Register */
02915   RwReg SPI_TNPR;      /*  (Spi Offset: 0x118) Transmit Next Pointer Register */
02916   RwReg SPI_TNCR;      /*  (Spi Offset: 0x11C) Transmit Next Counter Register */
02917   WoReg SPI_PTCR;      /*  (Spi Offset: 0x120) Transfer Control Register */
02918   RoReg SPI_PTSR;      /*  (Spi Offset: 0x124) Transfer Status Register */
02919 } Spi;
02920 #endif /* __ASSEMBLY__ */
02921 /* -------- SPI_CR : (SPI Offset: 0x00) Control Register -------- */
02922 #define SPI_CR_SPIEN (0x1u << 0) /*  (SPI_CR) SPI Enable */
02923 #define SPI_CR_SPIDIS (0x1u << 1) /*  (SPI_CR) SPI Disable */
02924 #define SPI_CR_SWRST (0x1u << 7) /*  (SPI_CR) SPI Software Reset */
02925 #define SPI_CR_LASTXFER (0x1u << 24) /*  (SPI_CR) Last Transfer */
02926 /* -------- SPI_MR : (SPI Offset: 0x04) Mode Register -------- */
02927 #define SPI_MR_MSTR (0x1u << 0) /*  (SPI_MR) Master/Slave Mode */
02928 #define SPI_MR_PS (0x1u << 1) /*  (SPI_MR) Peripheral Select */
02929 #define SPI_MR_PCSDEC (0x1u << 2) /*  (SPI_MR) Chip Select Decode */
02930 #define SPI_MR_MODFDIS (0x1u << 4) /*  (SPI_MR) Mode Fault Detection */
02931 #define SPI_MR_WDRBT (0x1u << 5) /*  (SPI_MR) Wait Data Read Before Transfer */
02932 #define SPI_MR_LLB (0x1u << 7) /*  (SPI_MR) Local Loopback Enable */
02933 #define SPI_MR_PCS_Pos 16
02934 #define SPI_MR_PCS_Msk (0xfu << SPI_MR_PCS_Pos) /*  (SPI_MR) Peripheral Chip Select */
02935 #define SPI_MR_PCS(value) ((SPI_MR_PCS_Msk & ((value) << SPI_MR_PCS_Pos)))
02936 #define SPI_MR_DLYBCS_Pos 24
02937 #define SPI_MR_DLYBCS_Msk (0xffu << SPI_MR_DLYBCS_Pos) /*  (SPI_MR) Delay Between Chip Selects */
02938 #define SPI_MR_DLYBCS(value) ((SPI_MR_DLYBCS_Msk & ((value) << SPI_MR_DLYBCS_Pos)))
02939 /* -------- SPI_RDR : (SPI Offset: 0x08) Receive Data Register -------- */
02940 #define SPI_RDR_RD_Pos 0
02941 #define SPI_RDR_RD_Msk (0xffffu << SPI_RDR_RD_Pos) /*  (SPI_RDR) Receive Data */
02942 #define SPI_RDR_PCS_Pos 16
02943 #define SPI_RDR_PCS_Msk (0xfu << SPI_RDR_PCS_Pos) /*  (SPI_RDR) Peripheral Chip Select */
02944 /* -------- SPI_TDR : (SPI Offset: 0x0C) Transmit Data Register -------- */
02945 #define SPI_TDR_TD_Pos 0
02946 #define SPI_TDR_TD_Msk (0xffffu << SPI_TDR_TD_Pos) /*  (SPI_TDR) Transmit Data */
02947 #define SPI_TDR_TD(value) ((SPI_TDR_TD_Msk & ((value) << SPI_TDR_TD_Pos)))
02948 #define SPI_TDR_PCS_Pos 16
02949 #define SPI_TDR_PCS_Msk (0xfu << SPI_TDR_PCS_Pos) /*  (SPI_TDR) Peripheral Chip Select */
02950 #define SPI_TDR_PCS(value) ((SPI_TDR_PCS_Msk & ((value) << SPI_TDR_PCS_Pos)))
02951 #define SPI_TDR_LASTXFER (0x1u << 24) /*  (SPI_TDR) Last Transfer */
02952 /* -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- */
02953 #define SPI_SR_RDRF (0x1u << 0) /*  (SPI_SR) Receive Data Register Full */
02954 #define SPI_SR_TDRE (0x1u << 1) /*  (SPI_SR) Transmit Data Register Empty */
02955 #define SPI_SR_MODF (0x1u << 2) /*  (SPI_SR) Mode Fault Error */
02956 #define SPI_SR_OVRES (0x1u << 3) /*  (SPI_SR) Overrun Error Status */
02957 #define SPI_SR_ENDRX (0x1u << 4) /*  (SPI_SR) End of RX buffer */
02958 #define SPI_SR_ENDTX (0x1u << 5) /*  (SPI_SR) End of TX buffer */
02959 #define SPI_SR_RXBUFF (0x1u << 6) /*  (SPI_SR) RX Buffer Full */
02960 #define SPI_SR_TXBUFE (0x1u << 7) /*  (SPI_SR) TX Buffer Empty */
02961 #define SPI_SR_NSSR (0x1u << 8) /*  (SPI_SR) NSS Rising */
02962 #define SPI_SR_TXEMPTY (0x1u << 9) /*  (SPI_SR) Transmission Registers Empty */
02963 #define SPI_SR_UNDES (0x1u << 10) /*  (SPI_SR) Underrun Error Status (Slave Mode Only) */
02964 #define SPI_SR_SPIENS (0x1u << 16) /*  (SPI_SR) SPI Enable Status */
02965 /* -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- */
02966 #define SPI_IER_RDRF (0x1u << 0) /*  (SPI_IER) Receive Data Register Full Interrupt Enable */
02967 #define SPI_IER_TDRE (0x1u << 1) /*  (SPI_IER) SPI Transmit Data Register Empty Interrupt Enable */
02968 #define SPI_IER_MODF (0x1u << 2) /*  (SPI_IER) Mode Fault Error Interrupt Enable */
02969 #define SPI_IER_OVRES (0x1u << 3) /*  (SPI_IER) Overrun Error Interrupt Enable */
02970 #define SPI_IER_ENDRX (0x1u << 4) /*  (SPI_IER) End of Receive Buffer Interrupt Enable */
02971 #define SPI_IER_ENDTX (0x1u << 5) /*  (SPI_IER) End of Transmit Buffer Interrupt Enable */
02972 #define SPI_IER_RXBUFF (0x1u << 6) /*  (SPI_IER) Receive Buffer Full Interrupt Enable */
02973 #define SPI_IER_TXBUFE (0x1u << 7) /*  (SPI_IER) Transmit Buffer Empty Interrupt Enable */
02974 #define SPI_IER_NSSR (0x1u << 8) /*  (SPI_IER) NSS Rising Interrupt Enable */
02975 #define SPI_IER_TXEMPTY (0x1u << 9) /*  (SPI_IER) Transmission Registers Empty Enable */
02976 #define SPI_IER_UNDES (0x1u << 10) /*  (SPI_IER) Underrun Error Interrupt Enable */
02977 /* -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- */
02978 #define SPI_IDR_RDRF (0x1u << 0) /*  (SPI_IDR) Receive Data Register Full Interrupt Disable */
02979 #define SPI_IDR_TDRE (0x1u << 1) /*  (SPI_IDR) SPI Transmit Data Register Empty Interrupt Disable */
02980 #define SPI_IDR_MODF (0x1u << 2) /*  (SPI_IDR) Mode Fault Error Interrupt Disable */
02981 #define SPI_IDR_OVRES (0x1u << 3) /*  (SPI_IDR) Overrun Error Interrupt Disable */
02982 #define SPI_IDR_ENDRX (0x1u << 4) /*  (SPI_IDR) End of Receive Buffer Interrupt Disable */
02983 #define SPI_IDR_ENDTX (0x1u << 5) /*  (SPI_IDR) End of Transmit Buffer Interrupt Disable */
02984 #define SPI_IDR_RXBUFF (0x1u << 6) /*  (SPI_IDR) Receive Buffer Full Interrupt Disable */
02985 #define SPI_IDR_TXBUFE (0x1u << 7) /*  (SPI_IDR) Transmit Buffer Empty Interrupt Disable */
02986 #define SPI_IDR_NSSR (0x1u << 8) /*  (SPI_IDR) NSS Rising Interrupt Disable */
02987 #define SPI_IDR_TXEMPTY (0x1u << 9) /*  (SPI_IDR) Transmission Registers Empty Disable */
02988 #define SPI_IDR_UNDES (0x1u << 10) /*  (SPI_IDR) Underrun Error Interrupt Disable */
02989 /* -------- SPI_IMR : (SPI Offset: 0x1C) Interrupt Mask Register -------- */
02990 #define SPI_IMR_RDRF (0x1u << 0) /*  (SPI_IMR) Receive Data Register Full Interrupt Mask */
02991 #define SPI_IMR_TDRE (0x1u << 1) /*  (SPI_IMR) SPI Transmit Data Register Empty Interrupt Mask */
02992 #define SPI_IMR_MODF (0x1u << 2) /*  (SPI_IMR) Mode Fault Error Interrupt Mask */
02993 #define SPI_IMR_OVRES (0x1u << 3) /*  (SPI_IMR) Overrun Error Interrupt Mask */
02994 #define SPI_IMR_ENDRX (0x1u << 4) /*  (SPI_IMR) End of Receive Buffer Interrupt Mask */
02995 #define SPI_IMR_ENDTX (0x1u << 5) /*  (SPI_IMR) End of Transmit Buffer Interrupt Mask */
02996 #define SPI_IMR_RXBUFF (0x1u << 6) /*  (SPI_IMR) Receive Buffer Full Interrupt Mask */
02997 #define SPI_IMR_TXBUFE (0x1u << 7) /*  (SPI_IMR) Transmit Buffer Empty Interrupt Mask */
02998 #define SPI_IMR_NSSR (0x1u << 8) /*  (SPI_IMR) NSS Rising Interrupt Mask */
02999 #define SPI_IMR_TXEMPTY (0x1u << 9) /*  (SPI_IMR) Transmission Registers Empty Mask */
03000 #define SPI_IMR_UNDES (0x1u << 10) /*  (SPI_IMR) Underrun Error Interrupt Mask */
03001 /* -------- SPI_CSR[4] : (SPI Offset: 0x30) Chip Select Register -------- */
03002 #define SPI_CSR_CPOL (0x1u << 0) /*  (SPI_CSR[4]) Clock Polarity */
03003 #define SPI_CSR_NCPHA (0x1u << 1) /*  (SPI_CSR[4]) Clock Phase */
03004 #define SPI_CSR_CSNAAT (0x1u << 2) /*  (SPI_CSR[4]) Chip Select Not Active After Transfer (Ignored if CSAAT = 1) */
03005 #define SPI_CSR_CSAAT (0x1u << 3) /*  (SPI_CSR[4]) Chip Select Not Active After Transfer (Ignored if CSAAT = 1) */
03006 #define SPI_CSR_BITS_Pos 4
03007 #define SPI_CSR_BITS_Msk (0xfu << SPI_CSR_BITS_Pos) /*  (SPI_CSR[4]) Bits Per Transfer */
03008 #define   SPI_CSR_BITS_8_BIT (0x0u << 4) /*  (SPI_CSR[4]) 8_bits for transfer */
03009 #define   SPI_CSR_BITS_9_BIT (0x1u << 4) /*  (SPI_CSR[4]) 9_bits for transfer */
03010 #define   SPI_CSR_BITS_10_BIT (0x2u << 4) /*  (SPI_CSR[4]) 8_bits for transfer */
03011 #define   SPI_CSR_BITS_11_BIT (0x3u << 4) /*  (SPI_CSR[4]) 8_bits for transfer */
03012 #define   SPI_CSR_BITS_12_BIT (0x4u << 4) /*  (SPI_CSR[4]) 8_bits for transfer */
03013 #define   SPI_CSR_BITS_13_BIT (0x5u << 4) /*  (SPI_CSR[4]) 8_bits for transfer */
03014 #define   SPI_CSR_BITS_14_BIT (0x6u << 4) /*  (SPI_CSR[4]) 8_bits for transfer */
03015 #define   SPI_CSR_BITS_15_BIT (0x7u << 4) /*  (SPI_CSR[4]) 8_bits for transfer */
03016 #define   SPI_CSR_BITS_16_BIT (0x8u << 4) /*  (SPI_CSR[4]) 8_bits for transfer */
03017 #define SPI_CSR_SCBR_Pos 8
03018 #define SPI_CSR_SCBR_Msk (0xffu << SPI_CSR_SCBR_Pos) /*  (SPI_CSR[4]) Serial Clock Baud Rate */
03019 #define SPI_CSR_SCBR(value) ((SPI_CSR_SCBR_Msk & ((value) << SPI_CSR_SCBR_Pos)))
03020 #define SPI_CSR_DLYBS_Pos 16
03021 #define SPI_CSR_DLYBS_Msk (0xffu << SPI_CSR_DLYBS_Pos) /*  (SPI_CSR[4]) Delay Before SPCK */
03022 #define SPI_CSR_DLYBS(value) ((SPI_CSR_DLYBS_Msk & ((value) << SPI_CSR_DLYBS_Pos)))
03023 #define SPI_CSR_DLYBCT_Pos 24
03024 #define SPI_CSR_DLYBCT_Msk (0xffu << SPI_CSR_DLYBCT_Pos) /*  (SPI_CSR[4]) Delay Between Consecutive Transfers */
03025 #define SPI_CSR_DLYBCT(value) ((SPI_CSR_DLYBCT_Msk & ((value) << SPI_CSR_DLYBCT_Pos)))
03026 /* -------- SPI_WPMR : (SPI Offset: 0xE4) Write Protection Control Register -------- */
03027 #define SPI_WPMR_SPIWPEN (0x1u << 0) /*  (SPI_WPMR) SPI Write Protection Enable */
03028 #define SPI_WPMR_SPIWPKEY_Pos 8
03029 #define SPI_WPMR_SPIWPKEY_Msk (0xffffffu << SPI_WPMR_SPIWPKEY_Pos) /*  (SPI_WPMR) SPI Write Protection Key Password */
03030 #define SPI_WPMR_SPIWPKEY(value) ((SPI_WPMR_SPIWPKEY_Msk & ((value) << SPI_WPMR_SPIWPKEY_Pos)))
03031 /* -------- SPI_WPSR : (SPI Offset: 0xE8) Write Protection Status Register -------- */
03032 #define SPI_WPSR_SPIWPVS_Pos 0
03033 #define SPI_WPSR_SPIWPVS_Msk (0x7u << SPI_WPSR_SPIWPVS_Pos) /*  (SPI_WPSR) SPI Write Protection Violation Status */
03034 #define SPI_WPSR_SPIWPVSRC_Pos 8
03035 #define SPI_WPSR_SPIWPVSRC_Msk (0xffu << SPI_WPSR_SPIWPVSRC_Pos) /*  (SPI_WPSR) SPI Write Protection Violation Source */
03036 /* -------- SPI_RPR : (SPI Offset: 0x100) Receive Pointer Register -------- */
03037 #define SPI_RPR_RXPTR_Pos 0
03038 #define SPI_RPR_RXPTR_Msk (0xffffffffu << SPI_RPR_RXPTR_Pos) /*  (SPI_RPR) Receive Pointer Register */
03039 #define SPI_RPR_RXPTR(value) ((SPI_RPR_RXPTR_Msk & ((value) << SPI_RPR_RXPTR_Pos)))
03040 /* -------- SPI_RCR : (SPI Offset: 0x104) Receive Counter Register -------- */
03041 #define SPI_RCR_RXCTR_Pos 0
03042 #define SPI_RCR_RXCTR_Msk (0xffffu << SPI_RCR_RXCTR_Pos) /*  (SPI_RCR) Receive Counter Register */
03043 #define SPI_RCR_RXCTR(value) ((SPI_RCR_RXCTR_Msk & ((value) << SPI_RCR_RXCTR_Pos)))
03044 /* -------- SPI_TPR : (SPI Offset: 0x108) Transmit Pointer Register -------- */
03045 #define SPI_TPR_TXPTR_Pos 0
03046 #define SPI_TPR_TXPTR_Msk (0xffffffffu << SPI_TPR_TXPTR_Pos) /*  (SPI_TPR) Transmit Counter Register */
03047 #define SPI_TPR_TXPTR(value) ((SPI_TPR_TXPTR_Msk & ((value) << SPI_TPR_TXPTR_Pos)))
03048 /* -------- SPI_TCR : (SPI Offset: 0x10C) Transmit Counter Register -------- */
03049 #define SPI_TCR_TXCTR_Pos 0
03050 #define SPI_TCR_TXCTR_Msk (0xffffu << SPI_TCR_TXCTR_Pos) /*  (SPI_TCR) Transmit Counter Register */
03051 #define SPI_TCR_TXCTR(value) ((SPI_TCR_TXCTR_Msk & ((value) << SPI_TCR_TXCTR_Pos)))
03052 /* -------- SPI_RNPR : (SPI Offset: 0x110) Receive Next Pointer Register -------- */
03053 #define SPI_RNPR_RXNPTR_Pos 0
03054 #define SPI_RNPR_RXNPTR_Msk (0xffffffffu << SPI_RNPR_RXNPTR_Pos) /*  (SPI_RNPR) Receive Next Pointer */
03055 #define SPI_RNPR_RXNPTR(value) ((SPI_RNPR_RXNPTR_Msk & ((value) << SPI_RNPR_RXNPTR_Pos)))
03056 /* -------- SPI_RNCR : (SPI Offset: 0x114) Receive Next Counter Register -------- */
03057 #define SPI_RNCR_RXNCTR_Pos 0
03058 #define SPI_RNCR_RXNCTR_Msk (0xffffu << SPI_RNCR_RXNCTR_Pos) /*  (SPI_RNCR) Receive Next Counter */
03059 #define SPI_RNCR_RXNCTR(value) ((SPI_RNCR_RXNCTR_Msk & ((value) << SPI_RNCR_RXNCTR_Pos)))
03060 /* -------- SPI_TNPR : (SPI Offset: 0x118) Transmit Next Pointer Register -------- */
03061 #define SPI_TNPR_TXNPTR_Pos 0
03062 #define SPI_TNPR_TXNPTR_Msk (0xffffffffu << SPI_TNPR_TXNPTR_Pos) /*  (SPI_TNPR) Transmit Next Pointer */
03063 #define SPI_TNPR_TXNPTR(value) ((SPI_TNPR_TXNPTR_Msk & ((value) << SPI_TNPR_TXNPTR_Pos)))
03064 /* -------- SPI_TNCR : (SPI Offset: 0x11C) Transmit Next Counter Register -------- */
03065 #define SPI_TNCR_TXNCTR_Pos 0
03066 #define SPI_TNCR_TXNCTR_Msk (0xffffu << SPI_TNCR_TXNCTR_Pos) /*  (SPI_TNCR) Transmit Counter Next */
03067 #define SPI_TNCR_TXNCTR(value) ((SPI_TNCR_TXNCTR_Msk & ((value) << SPI_TNCR_TXNCTR_Pos)))
03068 /* -------- SPI_PTCR : (SPI Offset: 0x120) Transfer Control Register -------- */
03069 #define SPI_PTCR_RXTEN (0x1u << 0) /*  (SPI_PTCR) Receiver Transfer Enable */
03070 #define SPI_PTCR_RXTDIS (0x1u << 1) /*  (SPI_PTCR) Receiver Transfer Disable */
03071 #define SPI_PTCR_TXTEN (0x1u << 8) /*  (SPI_PTCR) Transmitter Transfer Enable */
03072 #define SPI_PTCR_TXTDIS (0x1u << 9) /*  (SPI_PTCR) Transmitter Transfer Disable */
03073 /* -------- SPI_PTSR : (SPI Offset: 0x124) Transfer Status Register -------- */
03074 #define SPI_PTSR_RXTEN (0x1u << 0) /*  (SPI_PTSR) Receiver Transfer Enable */
03075 #define SPI_PTSR_TXTEN (0x1u << 8) /*  (SPI_PTSR) Transmitter Transfer Enable */
03076
03077
03078
03079 /* ============================================================================= */
03080 /*  SOFTWARE API DEFINITION FOR Timer Counter */
03081 /* ============================================================================= */
03082
03083 #ifndef __ASSEMBLY__
03084 /* TcChannel hardware registers */
03085 typedef struct {
03086   RwReg      TC_CCR;        /*  (TcChannel Offset: 0x0) Channel Control Register */
03087   RwReg      TC_CMR;        /*  (TcChannel Offset: 0x4) Channel Mode Register */
03088   RwReg      TC_SMMR;       /*  (TcChannel Offset: 0x8) Stepper Motor Mode Register */
03089   RwReg      Reserved1[1];
03090   RwReg      TC_CV;         /*  (TcChannel Offset: 0x10) Counter Value */
03091   RwReg      TC_RA;         /*  (TcChannel Offset: 0x14) Register A */
03092   RwReg      TC_RB;         /*  (TcChannel Offset: 0x18) Register B */
03093   RwReg      TC_RC;         /*  (TcChannel Offset: 0x1C) Register C */
03094   RwReg      TC_SR;         /*  (TcChannel Offset: 0x20) Status Register */
03095   RwReg      TC_IER;        /*  (TcChannel Offset: 0x24) Interrupt Enable Register */
03096   RwReg      TC_IDR;        /*  (TcChannel Offset: 0x28) Interrupt Disable Register */
03097   RwReg      TC_IMR;        /*  (TcChannel Offset: 0x2C) Interrupt Mask Register */
03098   RwReg      Reserved2[4];
03099 } TcChannel;
03100 /* Tc hardware registers */
03101 typedef struct {
03102   TcChannel  TC_CHANNEL[3]; /*  (Tc Offset: 0x0) channel = 0 .. 2 */
03103   WoReg      TC_BCR;        /*  (Tc Offset: 0xC0) Block Control Register */
03104   RwReg      TC_BMR;        /*  (Tc Offset: 0xC4) Block Mode Register */
03105   WoReg      TC_QIER;       /*  (Tc Offset: 0xC8) QDEC Interrupt Enable Register */
03106   WoReg      TC_QIDR;       /*  (Tc Offset: 0xCC) QDEC Interrupt Disable Register */
03107   RoReg      TC_QIMR;       /*  (Tc Offset: 0xD0) QDEC Interrupt Mask Register */
03108   RoReg      TC_QISR;       /*  (Tc Offset: 0xD4) QDEC Interrupt Status Register */
03109   RwReg      Reserved1[3];
03110   RwReg      TC_WPMR;       /*  (Tc Offset: 0xE4) Write Protect Mode Register */
03111 } Tc;
03112 #endif /* __ASSEMBLY__ */
03113 /* -------- TC_CCR : (TC Offset: N/A) Channel Control Register -------- */
03114 #define TC_CCR_CLKEN (0x1u << 0) /*  (TC_CCR) Counter Clock Enable Command */
03115 #define TC_CCR_CLKDIS (0x1u << 1) /*  (TC_CCR) Counter Clock Disable Command */
03116 #define TC_CCR_SWTRG (0x1u << 2) /*  (TC_CCR) Software Trigger Command */
03117 /* -------- TC_CMR : (TC Offset: N/A) Channel Mode Register -------- */
03118 #define TC_CMR_TCCLKS_Pos 0
03119 #define TC_CMR_TCCLKS_Msk (0x7u << TC_CMR_TCCLKS_Pos) /*  (TC_CMR) Clock Selection */
03120 #define   TC_CMR_TCCLKS_TIMER_CLOCK1 (0x0u << 0) /*  (TC_CMR) Clock selected: TCLK1 */
03121 #define   TC_CMR_TCCLKS_TIMER_CLOCK2 (0x1u << 0) /*  (TC_CMR) Clock selected: TCLK2 */
03122 #define   TC_CMR_TCCLKS_TIMER_CLOCK3 (0x2u << 0) /*  (TC_CMR) Clock selected: TCLK3 */
03123 #define   TC_CMR_TCCLKS_TIMER_CLOCK4 (0x3u << 0) /*  (TC_CMR) Clock selected: TCLK4 */
03124 #define   TC_CMR_TCCLKS_TIMER_CLOCK5 (0x4u << 0) /*  (TC_CMR) Clock selected: TCLK5 */
03125 #define   TC_CMR_TCCLKS_XC0 (0x5u << 0) /*  (TC_CMR) Clock selected: XC0 */
03126 #define   TC_CMR_TCCLKS_XC1 (0x6u << 0) /*  (TC_CMR) Clock selected: XC1 */
03127 #define   TC_CMR_TCCLKS_XC2 (0x7u << 0) /*  (TC_CMR) Clock selected: XC2 */
03128 #define TC_CMR_CLKI (0x1u << 3) /*  (TC_CMR) Clock Invert */
03129 #define TC_CMR_BURST_Pos 4
03130 #define TC_CMR_BURST_Msk (0x3u << TC_CMR_BURST_Pos) /*  (TC_CMR) Burst Signal Selection */
03131 #define   TC_CMR_BURST_NONE (0x0u << 4) /*  (TC_CMR) The clock is not gated by an external signal. */
03132 #define   TC_CMR_BURST_XC0 (0x1u << 4) /*  (TC_CMR) XC0 is ANDed with the selected clock. */
03133 #define   TC_CMR_BURST_XC1 (0x2u << 4) /*  (TC_CMR) XC1 is ANDed with the selected clock. */
03134 #define   TC_CMR_BURST_XC2 (0x3u << 4) /*  (TC_CMR) XC2 is ANDed with the selected clock. */
03135 #define TC_CMR_LDBSTOP (0x1u << 6) /*  (TC_CMR) Counter Clock Stopped with RB Loading */
03136 #define TC_CMR_LDBDIS (0x1u << 7) /*  (TC_CMR) Counter Clock Disable with RB Loading */
03137 #define TC_CMR_ETRGEDG_Pos 8
03138 #define TC_CMR_ETRGEDG_Msk (0x3u << TC_CMR_ETRGEDG_Pos) /*  (TC_CMR) External Trigger Edge Selection */
03139 #define   TC_CMR_ETRGEDG_NONE (0x0u << 8) /*  (TC_CMR) The clock is not gated by an external signal. */
03140 #define   TC_CMR_ETRGEDG_RISING (0x1u << 8) /*  (TC_CMR) Rising edge */
03141 #define   TC_CMR_ETRGEDG_FALLING (0x2u << 8) /*  (TC_CMR) Falling edge */
03142 #define   TC_CMR_ETRGEDG_EDGE (0x3u << 8) /*  (TC_CMR) Each edge */
03143 #define TC_CMR_ABETRG (0x1u << 10) /*  (TC_CMR) TIOA or TIOB External Trigger Selection */
03144 #define TC_CMR_CPCTRG (0x1u << 14) /*  (TC_CMR) RC Compare Trigger Enable */
03145 #define TC_CMR_WAVE (0x1u << 15) /*  (TC_CMR)  */
03146 #define TC_CMR_LDRA_Pos 16
03147 #define TC_CMR_LDRA_Msk (0x3u << TC_CMR_LDRA_Pos) /*  (TC_CMR) RA Loading Selection */
03148 #define   TC_CMR_LDRA_NONE (0x0u << 16) /*  (TC_CMR) None */
03149 #define   TC_CMR_LDRA_RISING (0x1u << 16) /*  (TC_CMR) Rising edge of TIOA */
03150 #define   TC_CMR_LDRA_FALLING (0x2u << 16) /*  (TC_CMR) Falling edge of TIOA */
03151 #define   TC_CMR_LDRA_EDGE (0x3u << 16) /*  (TC_CMR) Each edge of TIOA */
03152 #define TC_CMR_LDRB_Pos 18
03153 #define TC_CMR_LDRB_Msk (0x3u << TC_CMR_LDRB_Pos) /*  (TC_CMR) RB Loading Selection */
03154 #define   TC_CMR_LDRB_NONE (0x0u << 18) /*  (TC_CMR) None */
03155 #define   TC_CMR_LDRB_RISING (0x1u << 18) /*  (TC_CMR) Rising edge of TIOA */
03156 #define   TC_CMR_LDRB_FALLING (0x2u << 18) /*  (TC_CMR) Falling edge of TIOA */
03157 #define   TC_CMR_LDRB_EDGE (0x3u << 18) /*  (TC_CMR) Each edge of TIOA */
03158 #define TC_CMR_CPCSTOP (0x1u << 6) /*  (TC_CMR) Counter Clock Stopped with RC Compare */
03159 #define TC_CMR_CPCDIS (0x1u << 7) /*  (TC_CMR) Counter Clock Disable with RC Compare */
03160 #define TC_CMR_EEVTEDG_Pos 8
03161 #define TC_CMR_EEVTEDG_Msk (0x3u << TC_CMR_EEVTEDG_Pos) /*  (TC_CMR) External Event Edge Selection */
03162 #define   TC_CMR_EEVTEDG_NONE (0x0u << 8) /*  (TC_CMR) None */
03163 #define   TC_CMR_EEVTEDG_RISING (0x1u << 8) /*  (TC_CMR) Rising edge */
03164 #define   TC_CMR_EEVTEDG_FALLING (0x2u << 8) /*  (TC_CMR) Falling edge */
03165 #define   TC_CMR_EEVTEDG_EDGE (0x3u << 8) /*  (TC_CMR) Each edge */
03166 #define TC_CMR_EEVT_Pos 10
03167 #define TC_CMR_EEVT_Msk (0x3u << TC_CMR_EEVT_Pos) /*  (TC_CMR) External Event Selection */
03168 #define   TC_CMR_EEVT_TIOB (0x0u << 10) /*  (TC_CMR) TIOB */
03169 #define   TC_CMR_EEVT_XC0 (0x1u << 10) /*  (TC_CMR) XC0 */
03170 #define   TC_CMR_EEVT_XC1 (0x2u << 10) /*  (TC_CMR) XC1 */
03171 #define   TC_CMR_EEVT_XC2 (0x3u << 10) /*  (TC_CMR) XC2 */
03172 #define TC_CMR_ENETRG (0x1u << 12) /*  (TC_CMR) External Event Trigger Enable */
03173 #define TC_CMR_WAVSEL_Pos 13
03174 #define TC_CMR_WAVSEL_Msk (0x3u << TC_CMR_WAVSEL_Pos) /*  (TC_CMR) Waveform Selection */
03175 #define   TC_CMR_WAVSEL_UP (0x0u << 13) /*  (TC_CMR) UP mode without automatic trigger on RC Compare */
03176 #define   TC_CMR_WAVSEL_UPDOWN (0x1u << 13) /*  (TC_CMR) UPDOWN mode without automatic trigger on RC Compare */
03177 #define   TC_CMR_WAVSEL_UP_RC (0x2u << 13) /*  (TC_CMR) UP mode with automatic trigger on RC Compare */
03178 #define   TC_CMR_WAVSEL_UPDOWN_RC (0x3u << 13) /*  (TC_CMR) UPDOWN mode with automatic trigger on RC Compare */
03179 #define TC_CMR_ACPA_Pos 16
03180 #define TC_CMR_ACPA_Msk (0x3u << TC_CMR_ACPA_Pos) /*  (TC_CMR) RA Compare Effect on TIOA */
03181 #define   TC_CMR_ACPA_NONE (0x0u << 16) /*  (TC_CMR) None */
03182 #define   TC_CMR_ACPA_SET (0x1u << 16) /*  (TC_CMR) Set */
03183 #define   TC_CMR_ACPA_CLEAR (0x2u << 16) /*  (TC_CMR) Clear */
03184 #define   TC_CMR_ACPA_TOGGLE (0x3u << 16) /*  (TC_CMR) Toggle */
03185 #define TC_CMR_ACPC_Pos 18
03186 #define TC_CMR_ACPC_Msk (0x3u << TC_CMR_ACPC_Pos) /*  (TC_CMR) RC Compare Effect on TIOA */
03187 #define   TC_CMR_ACPC_NONE (0x0u << 18) /*  (TC_CMR) None */
03188 #define   TC_CMR_ACPC_SET (0x1u << 18) /*  (TC_CMR) Set */
03189 #define   TC_CMR_ACPC_CLEAR (0x2u << 18) /*  (TC_CMR) Clear */
03190 #define   TC_CMR_ACPC_TOGGLE (0x3u << 18) /*  (TC_CMR) Toggle */
03191 #define TC_CMR_AEEVT_Pos 20
03192 #define TC_CMR_AEEVT_Msk (0x3u << TC_CMR_AEEVT_Pos) /*  (TC_CMR) External Event Effect on TIOA */
03193 #define   TC_CMR_AEEVT_NONE (0x0u << 20) /*  (TC_CMR) None */
03194 #define   TC_CMR_AEEVT_SET (0x1u << 20) /*  (TC_CMR) Set */
03195 #define   TC_CMR_AEEVT_CLEAR (0x2u << 20) /*  (TC_CMR) Clear */
03196 #define   TC_CMR_AEEVT_TOGGLE (0x3u << 20) /*  (TC_CMR) Toggle */
03197 #define TC_CMR_ASWTRG_Pos 22
03198 #define TC_CMR_ASWTRG_Msk (0x3u << TC_CMR_ASWTRG_Pos) /*  (TC_CMR) Software Trigger Effect on TIOA */
03199 #define   TC_CMR_ASWTRG_NONE (0x0u << 22) /*  (TC_CMR) None */
03200 #define   TC_CMR_ASWTRG_SET (0x1u << 22) /*  (TC_CMR) Set */
03201 #define   TC_CMR_ASWTRG_CLEAR (0x2u << 22) /*  (TC_CMR) Clear */
03202 #define   TC_CMR_ASWTRG_TOGGLE (0x3u << 22) /*  (TC_CMR) Toggle */
03203 #define TC_CMR_BCPB_Pos 24
03204 #define TC_CMR_BCPB_Msk (0x3u << TC_CMR_BCPB_Pos) /*  (TC_CMR) RB Compare Effect on TIOB */
03205 #define   TC_CMR_BCPB_NONE (0x0u << 24) /*  (TC_CMR) None */
03206 #define   TC_CMR_BCPB_SET (0x1u << 24) /*  (TC_CMR) Set */
03207 #define   TC_CMR_BCPB_CLEAR (0x2u << 24) /*  (TC_CMR) Clear */
03208 #define   TC_CMR_BCPB_TOGGLE (0x3u << 24) /*  (TC_CMR) Toggle */
03209 #define TC_CMR_BCPC_Pos 26
03210 #define TC_CMR_BCPC_Msk (0x3u << TC_CMR_BCPC_Pos) /*  (TC_CMR) RC Compare Effect on TIOB */
03211 #define   TC_CMR_BCPC_NONE (0x0u << 26) /*  (TC_CMR) None */
03212 #define   TC_CMR_BCPC_SET (0x1u << 26) /*  (TC_CMR) Set */
03213 #define   TC_CMR_BCPC_CLEAR (0x2u << 26) /*  (TC_CMR) Clear */
03214 #define   TC_CMR_BCPC_TOGGLE (0x3u << 26) /*  (TC_CMR) Toggle */
03215 #define TC_CMR_BEEVT_Pos 28
03216 #define TC_CMR_BEEVT_Msk (0x3u << TC_CMR_BEEVT_Pos) /*  (TC_CMR) External Event Effect on TIOB */
03217 #define   TC_CMR_BEEVT_NONE (0x0u << 28) /*  (TC_CMR) None */
03218 #define   TC_CMR_BEEVT_SET (0x1u << 28) /*  (TC_CMR) Set */
03219 #define   TC_CMR_BEEVT_CLEAR (0x2u << 28) /*  (TC_CMR) Clear */
03220 #define   TC_CMR_BEEVT_TOGGLE (0x3u << 28) /*  (TC_CMR) Toggle */
03221 #define TC_CMR_BSWTRG_Pos 30
03222 #define TC_CMR_BSWTRG_Msk (0x3u << TC_CMR_BSWTRG_Pos) /*  (TC_CMR) Software Trigger Effect on TIOB */
03223 #define   TC_CMR_BSWTRG_NONE (0x0u << 30) /*  (TC_CMR) None */
03224 #define   TC_CMR_BSWTRG_SET (0x1u << 30) /*  (TC_CMR) Set */
03225 #define   TC_CMR_BSWTRG_CLEAR (0x2u << 30) /*  (TC_CMR) Clear */
03226 #define   TC_CMR_BSWTRG_TOGGLE (0x3u << 30) /*  (TC_CMR) Toggle */
03227 /* -------- TC_SMMR : (TC Offset: N/A) Stepper Motor Mode Register -------- */
03228 #define TC_SMMR_GCEN (0x1u << 0) /*  (TC_SMMR) Gray Count Enable */
03229 #define TC_SMMR_DOWN (0x1u << 1) /*  (TC_SMMR) DOWN Count */
03230 /* -------- TC_CV : (TC Offset: N/A) Counter Value -------- */
03231 #define TC_CV_CV_Pos 0
03232 #define TC_CV_CV_Msk (0xffffffffu << TC_CV_CV_Pos) /*  (TC_CV) Counter Value */
03233 /* -------- TC_RA : (TC Offset: N/A) Register A -------- */
03234 #define TC_RA_RA_Pos 0
03235 #define TC_RA_RA_Msk (0xffffffffu << TC_RA_RA_Pos) /*  (TC_RA) Register A */
03236 #define TC_RA_RA(value) ((TC_RA_RA_Msk & ((value) << TC_RA_RA_Pos)))
03237 /* -------- TC_RB : (TC Offset: N/A) Register B -------- */
03238 #define TC_RB_RB_Pos 0
03239 #define TC_RB_RB_Msk (0xffffffffu << TC_RB_RB_Pos) /*  (TC_RB) Register B */
03240 #define TC_RB_RB(value) ((TC_RB_RB_Msk & ((value) << TC_RB_RB_Pos)))
03241 /* -------- TC_RC : (TC Offset: N/A) Register C -------- */
03242 #define TC_RC_RC_Pos 0
03243 #define TC_RC_RC_Msk (0xffffffffu << TC_RC_RC_Pos) /*  (TC_RC) Register C */
03244 #define TC_RC_RC(value) ((TC_RC_RC_Msk & ((value) << TC_RC_RC_Pos)))
03245 /* -------- TC_SR : (TC Offset: N/A) Status Register -------- */
03246 #define TC_SR_COVFS (0x1u << 0) /*  (TC_SR) Counter Overflow Status */
03247 #define TC_SR_LOVRS (0x1u << 1) /*  (TC_SR) Load Overrun Status */
03248 #define TC_SR_CPAS (0x1u << 2) /*  (TC_SR) RA Compare Status */
03249 #define TC_SR_CPBS (0x1u << 3) /*  (TC_SR) RB Compare Status */
03250 #define TC_SR_CPCS (0x1u << 4) /*  (TC_SR) RC Compare Status */
03251 #define TC_SR_LDRAS (0x1u << 5) /*  (TC_SR) RA Loading Status */
03252 #define TC_SR_LDRBS (0x1u << 6) /*  (TC_SR) RB Loading Status */
03253 #define TC_SR_ETRGS (0x1u << 7) /*  (TC_SR) External Trigger Status */
03254 #define TC_SR_CLKSTA (0x1u << 16) /*  (TC_SR) Clock Enabling Status */
03255 #define TC_SR_MTIOA (0x1u << 17) /*  (TC_SR) TIOA Mirror */
03256 #define TC_SR_MTIOB (0x1u << 18) /*  (TC_SR) TIOB Mirror */
03257 /* -------- TC_IER : (TC Offset: N/A) Interrupt Enable Register -------- */
03258 #define TC_IER_COVFS (0x1u << 0) /*  (TC_IER) Counter Overflow */
03259 #define TC_IER_LOVRS (0x1u << 1) /*  (TC_IER) Load Overrun */
03260 #define TC_IER_CPAS (0x1u << 2) /*  (TC_IER) RA Compare */
03261 #define TC_IER_CPBS (0x1u << 3) /*  (TC_IER) RB Compare */
03262 #define TC_IER_CPCS (0x1u << 4) /*  (TC_IER) RC Compare */
03263 #define TC_IER_LDRAS (0x1u << 5) /*  (TC_IER) RA Loading */
03264 #define TC_IER_LDRBS (0x1u << 6) /*  (TC_IER) RB Loading */
03265 #define TC_IER_ETRGS (0x1u << 7) /*  (TC_IER) External Trigger */
03266 /* -------- TC_IDR : (TC Offset: N/A) Interrupt Disable Register -------- */
03267 #define TC_IDR_COVFS (0x1u << 0) /*  (TC_IDR) Counter Overflow */
03268 #define TC_IDR_LOVRS (0x1u << 1) /*  (TC_IDR) Load Overrun */
03269 #define TC_IDR_CPAS (0x1u << 2) /*  (TC_IDR) RA Compare */
03270 #define TC_IDR_CPBS (0x1u << 3) /*  (TC_IDR) RB Compare */
03271 #define TC_IDR_CPCS (0x1u << 4) /*  (TC_IDR) RC Compare */
03272 #define TC_IDR_LDRAS (0x1u << 5) /*  (TC_IDR) RA Loading */
03273 #define TC_IDR_LDRBS (0x1u << 6) /*  (TC_IDR) RB Loading */
03274 #define TC_IDR_ETRGS (0x1u << 7) /*  (TC_IDR) External Trigger */
03275 /* -------- TC_IMR : (TC Offset: N/A) Interrupt Mask Register -------- */
03276 #define TC_IMR_COVFS (0x1u << 0) /*  (TC_IMR) Counter Overflow */
03277 #define TC_IMR_LOVRS (0x1u << 1) /*  (TC_IMR) Load Overrun */
03278 #define TC_IMR_CPAS (0x1u << 2) /*  (TC_IMR) RA Compare */
03279 #define TC_IMR_CPBS (0x1u << 3) /*  (TC_IMR) RB Compare */
03280 #define TC_IMR_CPCS (0x1u << 4) /*  (TC_IMR) RC Compare */
03281 #define TC_IMR_LDRAS (0x1u << 5) /*  (TC_IMR) RA Loading */
03282 #define TC_IMR_LDRBS (0x1u << 6) /*  (TC_IMR) RB Loading */
03283 #define TC_IMR_ETRGS (0x1u << 7) /*  (TC_IMR) External Trigger */
03284 /* -------- TC_BCR : (TC Offset: 0xC0) Block Control Register -------- */
03285 #define TC_BCR_SYNC (0x1u << 0) /*  (TC_BCR) Synchro Command */
03286 /* -------- TC_BMR : (TC Offset: 0xC4) Block Mode Register -------- */
03287 #define TC_BMR_TC0XC0S_Pos 0
03288 #define TC_BMR_TC0XC0S_Msk (0x3u << TC_BMR_TC0XC0S_Pos) /*  (TC_BMR) External Clock Signal 0 Selection */
03289 #define   TC_BMR_TC0XC0S_TCLK0 (0x0u << 0) /*  (TC_BMR) Signal connected to XC0: TCLK0 */
03290 #define   TC_BMR_TC0XC0S_TIOA1 (0x2u << 0) /*  (TC_BMR) Signal connected to XC0: TIOA1 */
03291 #define   TC_BMR_TC0XC0S_TIOA2 (0x3u << 0) /*  (TC_BMR) Signal connected to XC0: TIOA2 */
03292 #define TC_BMR_TC1XC1S_Pos 2
03293 #define TC_BMR_TC1XC1S_Msk (0x3u << TC_BMR_TC1XC1S_Pos) /*  (TC_BMR) External Clock Signal 1 Selection */
03294 #define   TC_BMR_TC1XC1S_TCLK1 (0x0u << 2) /*  (TC_BMR) Signal connected to XC1: TCLK1 */
03295 #define   TC_BMR_TC1XC1S_TIOA0 (0x2u << 2) /*  (TC_BMR) Signal connected to XC1: TIOA0 */
03296 #define   TC_BMR_TC1XC1S_TIOA2 (0x3u << 2) /*  (TC_BMR) Signal connected to XC1: TIOA2 */
03297 #define TC_BMR_TC2XC2S_Pos 4
03298 #define TC_BMR_TC2XC2S_Msk (0x3u << TC_BMR_TC2XC2S_Pos) /*  (TC_BMR) External Clock Signal 2 Selection */
03299 #define   TC_BMR_TC2XC2S_TCLK2 (0x0u << 4) /*  (TC_BMR) Signal connected to XC2: TCLK2 */
03300 #define   TC_BMR_TC2XC2S_TIOA1 (0x2u << 4) /*  (TC_BMR) Signal connected to XC2: TIOA1 */
03301 #define   TC_BMR_TC2XC2S_TIOA2 (0x3u << 4) /*  (TC_BMR) Signal connected to XC2: TIOA2 */
03302 #define TC_BMR_QDEN (0x1u << 8) /*  (TC_BMR) Quadrature Decoder ENabled */
03303 #define TC_BMR_POSEN (0x1u << 9) /*  (TC_BMR) POSition ENabled */
03304 #define TC_BMR_SPEEDEN (0x1u << 10) /*  (TC_BMR) SPEED ENabled */
03305 #define TC_BMR_QDTRANS (0x1u << 11) /*  (TC_BMR) Quadrature Decoding TRANSparent */
03306 #define TC_BMR_EDGPHA (0x1u << 12) /*  (TC_BMR) EDGe on PHA count mode */
03307 #define TC_BMR_INVA (0x1u << 13) /*  (TC_BMR) INVerted phA */
03308 #define TC_BMR_INVB (0x1u << 14) /*  (TC_BMR) INVerted phB */
03309 #define TC_BMR_INVIDX (0x1u << 15) /*  (TC_BMR) INVerted InDeX */
03310 #define TC_BMR_SWAP (0x1u << 16) /*  (TC_BMR) SWAP PHA and PHB */
03311 #define TC_BMR_IDXPHB (0x1u << 17) /*  (TC_BMR) InDeX pin is PHB pin */
03312 #define TC_BMR_FILTER (0x1u << 19) /*  (TC_BMR)  */
03313 #define TC_BMR_MAXFILT_Pos 20
03314 #define TC_BMR_MAXFILT_Msk (0x3fu << TC_BMR_MAXFILT_Pos) /*  (TC_BMR) MAXimum FILTer */
03315 #define TC_BMR_MAXFILT(value) ((TC_BMR_MAXFILT_Msk & ((value) << TC_BMR_MAXFILT_Pos)))
03316 /* -------- TC_QIER : (TC Offset: 0xC8) QDEC Interrupt Enable Register -------- */
03317 #define TC_QIER_IDX (0x1u << 0) /*  (TC_QIER) InDeX */
03318 #define TC_QIER_DIRCHG (0x1u << 1) /*  (TC_QIER) DIRection CHanGe */
03319 #define TC_QIER_QERR (0x1u << 2) /*  (TC_QIER) Quadrature ERRor */
03320 /* -------- TC_QIDR : (TC Offset: 0xCC) QDEC Interrupt Disable Register -------- */
03321 #define TC_QIDR_IDX (0x1u << 0) /*  (TC_QIDR) InDeX */
03322 #define TC_QIDR_DIRCHG (0x1u << 1) /*  (TC_QIDR) DIRection CHanGe */
03323 #define TC_QIDR_QERR (0x1u << 2) /*  (TC_QIDR) Quadrature ERRor */
03324 /* -------- TC_QIMR : (TC Offset: 0xD0) QDEC Interrupt Mask Register -------- */
03325 #define TC_QIMR_IDX (0x1u << 0) /*  (TC_QIMR) InDeX */
03326 #define TC_QIMR_DIRCHG (0x1u << 1) /*  (TC_QIMR) DIRection CHanGe */
03327 #define TC_QIMR_QERR (0x1u << 2) /*  (TC_QIMR) Quadrature ERRor */
03328 /* -------- TC_QISR : (TC Offset: 0xD4) QDEC Interrupt Status Register -------- */
03329 #define TC_QISR_IDX (0x1u << 0) /*  (TC_QISR) InDeX */
03330 #define TC_QISR_DIRCHG (0x1u << 1) /*  (TC_QISR) DIRection CHanGe */
03331 #define TC_QISR_QERR (0x1u << 2) /*  (TC_QISR) Quadrature ERRor */
03332 #define TC_QISR_DIR (0x1u << 8) /*  (TC_QISR) Direction */
03333 /* -------- TC_WPMR : (TC Offset: 0xE4) Write Protect Mode Register -------- */
03334 #define TC_WPMR_WPEN (0x1u << 0) /*  (TC_WPMR) Write Protect Enable */
03335 #define TC_WPMR_WPKEY_Pos 8
03336 #define TC_WPMR_WPKEY_Msk (0xffffffu << TC_WPMR_WPKEY_Pos) /*  (TC_WPMR) Write Protect KEY */
03337 #define TC_WPMR_WPKEY(value) ((TC_WPMR_WPKEY_Msk & ((value) << TC_WPMR_WPKEY_Pos)))
03338
03339
03340 /* ============================================================================= */
03341 /*  SOFTWARE API DEFINITION FOR Two-wire Interface */
03342 /* ============================================================================= */
03343
03344 #ifndef __ASSEMBLY__
03345 /* Twi hardware registers */
03346 typedef struct {
03347   WoReg TWI_CR;        /*  (Twi Offset: 0x00) Control Register */
03348   RwReg TWI_MMR;       /*  (Twi Offset: 0x04) Master Mode Register */
03349   RwReg TWI_SMR;       /*  (Twi Offset: 0x08) Slave Mode Register */
03350   RwReg TWI_IADR;      /*  (Twi Offset: 0x0C) Internal Address Register */
03351   RwReg TWI_CWGR;      /*  (Twi Offset: 0x10) Clock Waveform Generator Register */
03352   RwReg Reserved1[3];
03353   RoReg TWI_SR;        /*  (Twi Offset: 0x20) Status Register */
03354   WoReg TWI_IER;       /*  (Twi Offset: 0x24) Interrupt Enable Register */
03355   WoReg TWI_IDR;       /*  (Twi Offset: 0x28) Interrupt Disable Register */
03356   RoReg TWI_IMR;       /*  (Twi Offset: 0x2C) Interrupt Mask Register */
03357   RoReg TWI_RHR;       /*  (Twi Offset: 0x30) Receive Holding Register */
03358   WoReg TWI_THR;       /*  (Twi Offset: 0x34) Transmit Holding Register */
03359   RwReg Reserved2[50];
03360   RwReg TWI_RPR;       /*  (Twi Offset: 0x100) Receive Pointer Register */
03361   RwReg TWI_RCR;       /*  (Twi Offset: 0x104) Receive Counter Register */
03362   RwReg TWI_TPR;       /*  (Twi Offset: 0x108) Transmit Pointer Register */
03363   RwReg TWI_TCR;       /*  (Twi Offset: 0x10C) Transmit Counter Register */
03364   RwReg TWI_RNPR;      /*  (Twi Offset: 0x110) Receive Next Pointer Register */
03365   RwReg TWI_RNCR;      /*  (Twi Offset: 0x114) Receive Next Counter Register */
03366   RwReg TWI_TNPR;      /*  (Twi Offset: 0x118) Transmit Next Pointer Register */
03367   RwReg TWI_TNCR;      /*  (Twi Offset: 0x11C) Transmit Next Counter Register */
03368   WoReg TWI_PTCR;      /*  (Twi Offset: 0x120) Transfer Control Register */
03369   RoReg TWI_PTSR;      /*  (Twi Offset: 0x124) Transfer Status Register */
03370 } Twi;
03371 #endif /* __ASSEMBLY__ */
03372 /* -------- TWI_CR : (TWI Offset: 0x00) Control Register -------- */
03373 #define TWI_CR_START (0x1u << 0) /*  (TWI_CR) Send a START Condition */
03374 #define TWI_CR_STOP (0x1u << 1) /*  (TWI_CR) Send a STOP Condition */
03375 #define TWI_CR_MSEN (0x1u << 2) /*  (TWI_CR) TWI Master Mode Enabled */
03376 #define TWI_CR_MSDIS (0x1u << 3) /*  (TWI_CR) TWI Master Mode Disabled */
03377 #define TWI_CR_SVEN (0x1u << 4) /*  (TWI_CR) TWI Slave Mode Enabled */
03378 #define TWI_CR_SVDIS (0x1u << 5) /*  (TWI_CR) TWI Slave Mode Disabled */
03379 #define TWI_CR_QUICK (0x1u << 6) /*  (TWI_CR) SMBUS Quick Command */
03380 #define TWI_CR_SWRST (0x1u << 7) /*  (TWI_CR) Software Reset */
03381 /* -------- TWI_MMR : (TWI Offset: 0x04) Master Mode Register -------- */
03382 #define TWI_MMR_IADRSZ_Pos 8
03383 #define TWI_MMR_IADRSZ_Msk (0x3u << TWI_MMR_IADRSZ_Pos) /*  (TWI_MMR) Internal Device Address Size */
03384 #define   TWI_MMR_IADRSZ_NONE (0x0u << 8) /*  (TWI_MMR) No internal device address */
03385 #define   TWI_MMR_IADRSZ_1_BYTE (0x1u << 8) /*  (TWI_MMR) One-byte internal device address */
03386 #define   TWI_MMR_IADRSZ_2_BYTE (0x2u << 8) /*  (TWI_MMR) Two-byte internal device address */
03387 #define   TWI_MMR_IADRSZ_3_BYTE (0x3u << 8) /*  (TWI_MMR) Three-byte internal device address */
03388 #define TWI_MMR_MREAD (0x1u << 12) /*  (TWI_MMR) Master Read Direction */
03389 #define TWI_MMR_DADR_Pos 16
03390 #define TWI_MMR_DADR_Msk (0x7fu << TWI_MMR_DADR_Pos) /*  (TWI_MMR) Device Address */
03391 #define TWI_MMR_DADR(value) ((TWI_MMR_DADR_Msk & ((value) << TWI_MMR_DADR_Pos)))
03392 /* -------- TWI_SMR : (TWI Offset: 0x08) Slave Mode Register -------- */
03393 #define TWI_SMR_SADR_Pos 16
03394 #define TWI_SMR_SADR_Msk (0x7fu << TWI_SMR_SADR_Pos) /*  (TWI_SMR) Slave Address */
03395 #define TWI_SMR_SADR(value) ((TWI_SMR_SADR_Msk & ((value) << TWI_SMR_SADR_Pos)))
03396 /* -------- TWI_IADR : (TWI Offset: 0x0C) Internal Address Register -------- */
03397 #define TWI_IADR_IADR_Pos 0
03398 #define TWI_IADR_IADR_Msk (0xffffffu << TWI_IADR_IADR_Pos) /*  (TWI_IADR) Internal Address */
03399 #define TWI_IADR_IADR(value) ((TWI_IADR_IADR_Msk & ((value) << TWI_IADR_IADR_Pos)))
03400 /* -------- TWI_CWGR : (TWI Offset: 0x10) Clock Waveform Generator Register -------- */
03401 #define TWI_CWGR_CLDIV_Pos 0
03402 #define TWI_CWGR_CLDIV_Msk (0xffu << TWI_CWGR_CLDIV_Pos) /*  (TWI_CWGR) Clock Low Divider */
03403 #define TWI_CWGR_CLDIV(value) ((TWI_CWGR_CLDIV_Msk & ((value) << TWI_CWGR_CLDIV_Pos)))
03404 #define TWI_CWGR_CHDIV_Pos 8
03405 #define TWI_CWGR_CHDIV_Msk (0xffu << TWI_CWGR_CHDIV_Pos) /*  (TWI_CWGR) Clock High Divider */
03406 #define TWI_CWGR_CHDIV(value) ((TWI_CWGR_CHDIV_Msk & ((value) << TWI_CWGR_CHDIV_Pos)))
03407 #define TWI_CWGR_CKDIV_Pos 16
03408 #define TWI_CWGR_CKDIV_Msk (0x7u << TWI_CWGR_CKDIV_Pos) /*  (TWI_CWGR) Clock Divider */
03409 #define TWI_CWGR_CKDIV(value) ((TWI_CWGR_CKDIV_Msk & ((value) << TWI_CWGR_CKDIV_Pos)))
03410 /* -------- TWI_SR : (TWI Offset: 0x20) Status Register -------- */
03411 #define TWI_SR_TXCOMP (0x1u << 0) /*  (TWI_SR) Transmission Completed (automatically set / reset) */
03412 #define TWI_SR_RXRDY (0x1u << 1) /*  (TWI_SR) Receive Holding Register Ready (automatically set / reset) */
03413 #define TWI_SR_TXRDY (0x1u << 2) /*  (TWI_SR) Transmit Holding Register Ready (automatically set / reset) */
03414 #define TWI_SR_SVREAD (0x1u << 3) /*  (TWI_SR) Slave Read (automatically set / reset) */
03415 #define TWI_SR_SVACC (0x1u << 4) /*  (TWI_SR) Slave Access (automatically set / reset) */
03416 #define TWI_SR_GACC (0x1u << 5) /*  (TWI_SR) General Call Access (clear on read) */
03417 #define TWI_SR_OVRE (0x1u << 6) /*  (TWI_SR) Overrun Error (clear on read) */
03418 #define TWI_SR_NACK (0x1u << 8) /*  (TWI_SR) Not Acknowledged (clear on read) */
03419 #define TWI_SR_ARBLST (0x1u << 9) /*  (TWI_SR) Arbitration Lost (clear on read) */
03420 #define TWI_SR_SCLWS (0x1u << 10) /*  (TWI_SR) Clock Wait State (automatically set / reset) */
03421 #define TWI_SR_EOSACC (0x1u << 11) /*  (TWI_SR) End Of Slave Access (clear on read) */
03422 #define TWI_SR_ENDRX (0x1u << 12) /*  (TWI_SR) End of RX buffer */
03423 #define TWI_SR_ENDTX (0x1u << 13) /*  (TWI_SR) End of TX buffer */
03424 #define TWI_SR_RXBUFF (0x1u << 14) /*  (TWI_SR) RX Buffer Full */
03425 #define TWI_SR_TXBUFE (0x1u << 15) /*  (TWI_SR) TX Buffer Empty */
03426 /* -------- TWI_IER : (TWI Offset: 0x24) Interrupt Enable Register -------- */
03427 #define TWI_IER_TXCOMP (0x1u << 0) /*  (TWI_IER) Transmission Completed Interrupt Enable */
03428 #define TWI_IER_RXRDY (0x1u << 1) /*  (TWI_IER) Receive Holding Register Ready Interrupt Enable */
03429 #define TWI_IER_TXRDY (0x1u << 2) /*  (TWI_IER) Transmit Holding Register Ready Interrupt Enable */
03430 #define TWI_IER_SVACC (0x1u << 4) /*  (TWI_IER) Slave Access Interrupt Enable */
03431 #define TWI_IER_GACC (0x1u << 5) /*  (TWI_IER) General Call Access Interrupt Enable */
03432 #define TWI_IER_OVRE (0x1u << 6) /*  (TWI_IER) Overrun Error Interrupt Enable */
03433 #define TWI_IER_NACK (0x1u << 8) /*  (TWI_IER) Not Acknowledge Interrupt Enable */
03434 #define TWI_IER_ARBLST (0x1u << 9) /*  (TWI_IER) Arbitration Lost Interrupt Enable */
03435 #define TWI_IER_SCL_WS (0x1u << 10) /*  (TWI_IER) Clock Wait State Interrupt Enable */
03436 #define TWI_IER_EOSACC (0x1u << 11) /*  (TWI_IER) End Of Slave Access Interrupt Enable */
03437 #define TWI_IER_ENDRX (0x1u << 12) /*  (TWI_IER) End of Receive Buffer Interrupt Enable */
03438 #define TWI_IER_ENDTX (0x1u << 13) /*  (TWI_IER) End of Transmit Buffer Interrupt Enable */
03439 #define TWI_IER_RXBUFF (0x1u << 14) /*  (TWI_IER) Receive Buffer Full Interrupt Enable */
03440 #define TWI_IER_TXBUFE (0x1u << 15) /*  (TWI_IER) Transmit Buffer Empty Interrupt Enable */
03441 /* -------- TWI_IDR : (TWI Offset: 0x28) Interrupt Disable Register -------- */
03442 #define TWI_IDR_TXCOMP (0x1u << 0) /*  (TWI_IDR) Transmission Completed Interrupt Disable */
03443 #define TWI_IDR_RXRDY (0x1u << 1) /*  (TWI_IDR) Receive Holding Register Ready Interrupt Disable */
03444 #define TWI_IDR_TXRDY (0x1u << 2) /*  (TWI_IDR) Transmit Holding Register Ready Interrupt Disable */
03445 #define TWI_IDR_SVACC (0x1u << 4) /*  (TWI_IDR) Slave Access Interrupt Disable */
03446 #define TWI_IDR_GACC (0x1u << 5) /*  (TWI_IDR) General Call Access Interrupt Disable */
03447 #define TWI_IDR_OVRE (0x1u << 6) /*  (TWI_IDR) Overrun Error Interrupt Disable */
03448 #define TWI_IDR_NACK (0x1u << 8) /*  (TWI_IDR) Not Acknowledge Interrupt Disable */
03449 #define TWI_IDR_ARBLST (0x1u << 9) /*  (TWI_IDR) Arbitration Lost Interrupt Disable */
03450 #define TWI_IDR_SCL_WS (0x1u << 10) /*  (TWI_IDR) Clock Wait State Interrupt Disable */
03451 #define TWI_IDR_EOSACC (0x1u << 11) /*  (TWI_IDR) End Of Slave Access Interrupt Disable */
03452 #define TWI_IDR_ENDRX (0x1u << 12) /*  (TWI_IDR) End of Receive Buffer Interrupt Disable */
03453 #define TWI_IDR_ENDTX (0x1u << 13) /*  (TWI_IDR) End of Transmit Buffer Interrupt Disable */
03454 #define TWI_IDR_RXBUFF (0x1u << 14) /*  (TWI_IDR) Receive Buffer Full Interrupt Disable */
03455 #define TWI_IDR_TXBUFE (0x1u << 15) /*  (TWI_IDR) Transmit Buffer Empty Interrupt Disable */
03456 /* -------- TWI_IMR : (TWI Offset: 0x2C) Interrupt Mask Register -------- */
03457 #define TWI_IMR_TXCOMP (0x1u << 0) /*  (TWI_IMR) Transmission Completed Interrupt Mask */
03458 #define TWI_IMR_RXRDY (0x1u << 1) /*  (TWI_IMR) Receive Holding Register Ready Interrupt Mask */
03459 #define TWI_IMR_TXRDY (0x1u << 2) /*  (TWI_IMR) Transmit Holding Register Ready Interrupt Mask */
03460 #define TWI_IMR_SVACC (0x1u << 4) /*  (TWI_IMR) Slave Access Interrupt Mask */
03461 #define TWI_IMR_GACC (0x1u << 5) /*  (TWI_IMR) General Call Access Interrupt Mask */
03462 #define TWI_IMR_OVRE (0x1u << 6) /*  (TWI_IMR) Overrun Error Interrupt Mask */
03463 #define TWI_IMR_NACK (0x1u << 8) /*  (TWI_IMR) Not Acknowledge Interrupt Mask */
03464 #define TWI_IMR_ARBLST (0x1u << 9) /*  (TWI_IMR) Arbitration Lost Interrupt Mask */
03465 #define TWI_IMR_SCL_WS (0x1u << 10) /*  (TWI_IMR) Clock Wait State Interrupt Mask */
03466 #define TWI_IMR_EOSACC (0x1u << 11) /*  (TWI_IMR) End Of Slave Access Interrupt Mask */
03467 #define TWI_IMR_ENDRX (0x1u << 12) /*  (TWI_IMR) End of Receive Buffer Interrupt Mask */
03468 #define TWI_IMR_ENDTX (0x1u << 13) /*  (TWI_IMR) End of Transmit Buffer Interrupt Mask */
03469 #define TWI_IMR_RXBUFF (0x1u << 14) /*  (TWI_IMR) Receive Buffer Full Interrupt Mask */
03470 #define TWI_IMR_TXBUFE (0x1u << 15) /*  (TWI_IMR) Transmit Buffer Empty Interrupt Mask */
03471 /* -------- TWI_RHR : (TWI Offset: 0x30) Receive Holding Register -------- */
03472 #define TWI_RHR_RXDATA_Pos 0
03473 #define TWI_RHR_RXDATA_Msk (0xffu << TWI_RHR_RXDATA_Pos) /*  (TWI_RHR) Master or Slave Receive Holding Data */
03474 /* -------- TWI_THR : (TWI Offset: 0x34) Transmit Holding Register -------- */
03475 #define TWI_THR_TXDATA_Pos 0
03476 #define TWI_THR_TXDATA_Msk (0xffu << TWI_THR_TXDATA_Pos) /*  (TWI_THR) Master or Slave Transmit Holding Data */
03477 #define TWI_THR_TXDATA(value) ((TWI_THR_TXDATA_Msk & ((value) << TWI_THR_TXDATA_Pos)))
03478 /* -------- TWI_RPR : (TWI Offset: 0x100) Receive Pointer Register -------- */
03479 #define TWI_RPR_RXPTR_Pos 0
03480 #define TWI_RPR_RXPTR_Msk (0xffffffffu << TWI_RPR_RXPTR_Pos) /*  (TWI_RPR) Receive Pointer Register */
03481 #define TWI_RPR_RXPTR(value) ((TWI_RPR_RXPTR_Msk & ((value) << TWI_RPR_RXPTR_Pos)))
03482 /* -------- TWI_RCR : (TWI Offset: 0x104) Receive Counter Register -------- */
03483 #define TWI_RCR_RXCTR_Pos 0
03484 #define TWI_RCR_RXCTR_Msk (0xffffu << TWI_RCR_RXCTR_Pos) /*  (TWI_RCR) Receive Counter Register */
03485 #define TWI_RCR_RXCTR(value) ((TWI_RCR_RXCTR_Msk & ((value) << TWI_RCR_RXCTR_Pos)))
03486 /* -------- TWI_TPR : (TWI Offset: 0x108) Transmit Pointer Register -------- */
03487 #define TWI_TPR_TXPTR_Pos 0
03488 #define TWI_TPR_TXPTR_Msk (0xffffffffu << TWI_TPR_TXPTR_Pos) /*  (TWI_TPR) Transmit Counter Register */
03489 #define TWI_TPR_TXPTR(value) ((TWI_TPR_TXPTR_Msk & ((value) << TWI_TPR_TXPTR_Pos)))
03490 /* -------- TWI_TCR : (TWI Offset: 0x10C) Transmit Counter Register -------- */
03491 #define TWI_TCR_TXCTR_Pos 0
03492 #define TWI_TCR_TXCTR_Msk (0xffffu << TWI_TCR_TXCTR_Pos) /*  (TWI_TCR) Transmit Counter Register */
03493 #define TWI_TCR_TXCTR(value) ((TWI_TCR_TXCTR_Msk & ((value) << TWI_TCR_TXCTR_Pos)))
03494 /* -------- TWI_RNPR : (TWI Offset: 0x110) Receive Next Pointer Register -------- */
03495 #define TWI_RNPR_RXNPTR_Pos 0
03496 #define TWI_RNPR_RXNPTR_Msk (0xffffffffu << TWI_RNPR_RXNPTR_Pos) /*  (TWI_RNPR) Receive Next Pointer */
03497 #define TWI_RNPR_RXNPTR(value) ((TWI_RNPR_RXNPTR_Msk & ((value) << TWI_RNPR_RXNPTR_Pos)))
03498 /* -------- TWI_RNCR : (TWI Offset: 0x114) Receive Next Counter Register -------- */
03499 #define TWI_RNCR_RXNCTR_Pos 0
03500 #define TWI_RNCR_RXNCTR_Msk (0xffffu << TWI_RNCR_RXNCTR_Pos) /*  (TWI_RNCR) Receive Next Counter */
03501 #define TWI_RNCR_RXNCTR(value) ((TWI_RNCR_RXNCTR_Msk & ((value) << TWI_RNCR_RXNCTR_Pos)))
03502 /* -------- TWI_TNPR : (TWI Offset: 0x118) Transmit Next Pointer Register -------- */
03503 #define TWI_TNPR_TXNPTR_Pos 0
03504 #define TWI_TNPR_TXNPTR_Msk (0xffffffffu << TWI_TNPR_TXNPTR_Pos) /*  (TWI_TNPR) Transmit Next Pointer */
03505 #define TWI_TNPR_TXNPTR(value) ((TWI_TNPR_TXNPTR_Msk & ((value) << TWI_TNPR_TXNPTR_Pos)))
03506 /* -------- TWI_TNCR : (TWI Offset: 0x11C) Transmit Next Counter Register -------- */
03507 #define TWI_TNCR_TXNCTR_Pos 0
03508 #define TWI_TNCR_TXNCTR_Msk (0xffffu << TWI_TNCR_TXNCTR_Pos) /*  (TWI_TNCR) Transmit Counter Next */
03509 #define TWI_TNCR_TXNCTR(value) ((TWI_TNCR_TXNCTR_Msk & ((value) << TWI_TNCR_TXNCTR_Pos)))
03510 /* -------- TWI_PTCR : (TWI Offset: 0x120) Transfer Control Register -------- */
03511 #define TWI_PTCR_RXTEN (0x1u << 0) /*  (TWI_PTCR) Receiver Transfer Enable */
03512 #define TWI_PTCR_RXTDIS (0x1u << 1) /*  (TWI_PTCR) Receiver Transfer Disable */
03513 #define TWI_PTCR_TXTEN (0x1u << 8) /*  (TWI_PTCR) Transmitter Transfer Enable */
03514 #define TWI_PTCR_TXTDIS (0x1u << 9) /*  (TWI_PTCR) Transmitter Transfer Disable */
03515 /* -------- TWI_PTSR : (TWI Offset: 0x124) Transfer Status Register -------- */
03516 #define TWI_PTSR_RXTEN (0x1u << 0) /*  (TWI_PTSR) Receiver Transfer Enable */
03517 #define TWI_PTSR_TXTEN (0x1u << 8) /*  (TWI_PTSR) Transmitter Transfer Enable */
03518
03519
03520
03521
03522 /* ************************************************************************** */
03523 /*   REGISTER ACCESS DEFINITIONS FOR SAM3N */
03524 /* ************************************************************************** */
03525
03526 /* ========== Register definition for SPI peripheral ========== */
03527 #define REG_SPI_CR         REG_ACCESS(WoReg, 0x40008000U) /*  (SPI) Control Register */
03528 #define REG_SPI_MR         REG_ACCESS(RwReg, 0x40008004U) /*  (SPI) Mode Register */
03529 #define REG_SPI_RDR        REG_ACCESS(RoReg, 0x40008008U) /*  (SPI) Receive Data Register */
03530 #define REG_SPI_TDR        REG_ACCESS(WoReg, 0x4000800CU) /*  (SPI) Transmit Data Register */
03531 #define REG_SPI_SR         REG_ACCESS(RoReg, 0x40008010U) /*  (SPI) Status Register */
03532 #define REG_SPI_IER        REG_ACCESS(WoReg, 0x40008014U) /*  (SPI) Interrupt Enable Register */
03533 #define REG_SPI_IDR        REG_ACCESS(WoReg, 0x40008018U) /*  (SPI) Interrupt Disable Register */
03534 #define REG_SPI_IMR        REG_ACCESS(RoReg, 0x4000801CU) /*  (SPI) Interrupt Mask Register */
03535 #define REG_SPI_CSR        REG_ACCESS(RwReg, 0x40008030U) /*  (SPI) Chip Select Register */
03536 #define REG_SPI_WPMR       REG_ACCESS(RwReg, 0x400080E4U) /*  (SPI) Write Protection Control Register */
03537 #define REG_SPI_WPSR       REG_ACCESS(RoReg, 0x400080E8U) /*  (SPI) Write Protection Status Register */
03538 #define REG_SPI_RPR        REG_ACCESS(RwReg, 0x40008100U) /*  (SPI) Receive Pointer Register */
03539 #define REG_SPI_RCR        REG_ACCESS(RwReg, 0x40008104U) /*  (SPI) Receive Counter Register */
03540 #define REG_SPI_TPR        REG_ACCESS(RwReg, 0x40008108U) /*  (SPI) Transmit Pointer Register */
03541 #define REG_SPI_TCR        REG_ACCESS(RwReg, 0x4000810CU) /*  (SPI) Transmit Counter Register */
03542 #define REG_SPI_RNPR       REG_ACCESS(RwReg, 0x40008110U) /*  (SPI) Receive Next Pointer Register */
03543 #define REG_SPI_RNCR       REG_ACCESS(RwReg, 0x40008114U) /*  (SPI) Receive Next Counter Register */
03544 #define REG_SPI_TNPR       REG_ACCESS(RwReg, 0x40008118U) /*  (SPI) Transmit Next Pointer Register */
03545 #define REG_SPI_TNCR       REG_ACCESS(RwReg, 0x4000811CU) /*  (SPI) Transmit Next Counter Register */
03546 #define REG_SPI_PTCR       REG_ACCESS(WoReg, 0x40008120U) /*  (SPI) Transfer Control Register */
03547 #define REG_SPI_PTSR       REG_ACCESS(RoReg, 0x40008124U) /*  (SPI) Transfer Status Register */
03548 /* ========== Register definition for TC0 peripheral ========== */
03549 #define REG_TC0_CCR0       REG_ACCESS(WoReg, 0x40010000U) /*  (TC0) Channel Control Register (channel = 0) */
03550 #define REG_TC0_CMR0       REG_ACCESS(RwReg, 0x40010004U) /*  (TC0) Channel Mode Register (channel = 0) */
03551 #define REG_TC0_SMMR0      REG_ACCESS(RwReg, 0x40010008U) /*  (TC0) Stepper Motor Mode Register (channel = 0) */
03552 #define REG_TC0_CV0        REG_ACCESS(RoReg, 0x40010010U) /*  (TC0) Counter Value (channel = 0) */
03553 #define REG_TC0_RA0        REG_ACCESS(RwReg, 0x40010014U) /*  (TC0) Register A (channel = 0) */
03554 #define REG_TC0_RB0        REG_ACCESS(RwReg, 0x40010018U) /*  (TC0) Register B (channel = 0) */
03555 #define REG_TC0_RC0        REG_ACCESS(RwReg, 0x4001001CU) /*  (TC0) Register C (channel = 0) */
03556 #define REG_TC0_SR0        REG_ACCESS(RoReg, 0x40010020U) /*  (TC0) Status Register (channel = 0) */
03557 #define REG_TC0_IER0       REG_ACCESS(WoReg, 0x40010024U) /*  (TC0) Interrupt Enable Register (channel = 0) */
03558 #define REG_TC0_IDR0       REG_ACCESS(WoReg, 0x40010028U) /*  (TC0) Interrupt Disable Register (channel = 0) */
03559 #define REG_TC0_IMR0       REG_ACCESS(RoReg, 0x4001002CU) /*  (TC0) Interrupt Mask Register (channel = 0) */
03560 #define REG_TC0_CCR1       REG_ACCESS(WoReg, 0x40010040U) /*  (TC0) Channel Control Register (channel = 1) */
03561 #define REG_TC0_CMR1       REG_ACCESS(RwReg, 0x40010044U) /*  (TC0) Channel Mode Register (channel = 1) */
03562 #define REG_TC0_SMMR1      REG_ACCESS(RwReg, 0x40010048U) /*  (TC0) Stepper Motor Mode Register (channel = 1) */
03563 #define REG_TC0_CV1        REG_ACCESS(RoReg, 0x40010050U) /*  (TC0) Counter Value (channel = 1) */
03564 #define REG_TC0_RA1        REG_ACCESS(RwReg, 0x40010054U) /*  (TC0) Register A (channel = 1) */
03565 #define REG_TC0_RB1        REG_ACCESS(RwReg, 0x40010058U) /*  (TC0) Register B (channel = 1) */
03566 #define REG_TC0_RC1        REG_ACCESS(RwReg, 0x4001005CU) /*  (TC0) Register C (channel = 1) */
03567 #define REG_TC0_SR1        REG_ACCESS(RoReg, 0x40010060U) /*  (TC0) Status Register (channel = 1) */
03568 #define REG_TC0_IER1       REG_ACCESS(WoReg, 0x40010064U) /*  (TC0) Interrupt Enable Register (channel = 1) */
03569 #define REG_TC0_IDR1       REG_ACCESS(WoReg, 0x40010068U) /*  (TC0) Interrupt Disable Register (channel = 1) */
03570 #define REG_TC0_IMR1       REG_ACCESS(RoReg, 0x4001006CU) /*  (TC0) Interrupt Mask Register (channel = 1) */
03571 #define REG_TC0_CCR2       REG_ACCESS(WoReg, 0x40010080U) /*  (TC0) Channel Control Register (channel = 2) */
03572 #define REG_TC0_CMR2       REG_ACCESS(RwReg, 0x40010084U) /*  (TC0) Channel Mode Register (channel = 2) */
03573 #define REG_TC0_SMMR2      REG_ACCESS(RwReg, 0x40010088U) /*  (TC0) Stepper Motor Mode Register (channel = 2) */
03574 #define REG_TC0_CV2        REG_ACCESS(RoReg, 0x40010090U) /*  (TC0) Counter Value (channel = 2) */
03575 #define REG_TC0_RA2        REG_ACCESS(RwReg, 0x40010094U) /*  (TC0) Register A (channel = 2) */
03576 #define REG_TC0_RB2        REG_ACCESS(RwReg, 0x40010098U) /*  (TC0) Register B (channel = 2) */
03577 #define REG_TC0_RC2        REG_ACCESS(RwReg, 0x4001009CU) /*  (TC0) Register C (channel = 2) */
03578 #define REG_TC0_SR2        REG_ACCESS(RoReg, 0x400100A0U) /*  (TC0) Status Register (channel = 2) */
03579 #define REG_TC0_IER2       REG_ACCESS(WoReg, 0x400100A4U) /*  (TC0) Interrupt Enable Register (channel = 2) */
03580 #define REG_TC0_IDR2       REG_ACCESS(WoReg, 0x400100A8U) /*  (TC0) Interrupt Disable Register (channel = 2) */
03581 #define REG_TC0_IMR2       REG_ACCESS(RoReg, 0x400100ACU) /*  (TC0) Interrupt Mask Register (channel = 2) */
03582 #define REG_TC0_BCR        REG_ACCESS(WoReg, 0x400100C0U) /*  (TC0) Block Control Register */
03583 #define REG_TC0_BMR        REG_ACCESS(RwReg, 0x400100C4U) /*  (TC0) Block Mode Register */
03584 #define REG_TC0_QIER       REG_ACCESS(WoReg, 0x400100C8U) /*  (TC0) QDEC Interrupt Enable Register */
03585 #define REG_TC0_QIDR       REG_ACCESS(WoReg, 0x400100CCU) /*  (TC0) QDEC Interrupt Disable Register */
03586 #define REG_TC0_QIMR       REG_ACCESS(RoReg, 0x400100D0U) /*  (TC0) QDEC Interrupt Mask Register */
03587 #define REG_TC0_QISR       REG_ACCESS(RoReg, 0x400100D4U) /*  (TC0) QDEC Interrupt Status Register */
03588 #define REG_TC0_WPMR       REG_ACCESS(RwReg, 0x400100E4U) /*  (TC0) Write Protect Mode Register */
03589 /* ========== Register definition for TC1 peripheral ========== */
03590 #define REG_TC1_CCR0       REG_ACCESS(WoReg, 0x40014000U) /*  (TC1) Channel Control Register (channel = 0) */
03591 #define REG_TC1_CMR0       REG_ACCESS(RwReg, 0x40014004U) /*  (TC1) Channel Mode Register (channel = 0) */
03592 #define REG_TC1_SMMR0      REG_ACCESS(RwReg, 0x40014008U) /*  (TC1) Stepper Motor Mode Register (channel = 0) */
03593 #define REG_TC1_CV0        REG_ACCESS(RoReg, 0x40014010U) /*  (TC1) Counter Value (channel = 0) */
03594 #define REG_TC1_RA0        REG_ACCESS(RwReg, 0x40014014U) /*  (TC1) Register A (channel = 0) */
03595 #define REG_TC1_RB0        REG_ACCESS(RwReg, 0x40014018U) /*  (TC1) Register B (channel = 0) */
03596 #define REG_TC1_RC0        REG_ACCESS(RwReg, 0x4001401CU) /*  (TC1) Register C (channel = 0) */
03597 #define REG_TC1_SR0        REG_ACCESS(RoReg, 0x40014020U) /*  (TC1) Status Register (channel = 0) */
03598 #define REG_TC1_IER0       REG_ACCESS(WoReg, 0x40014024U) /*  (TC1) Interrupt Enable Register (channel = 0) */
03599 #define REG_TC1_IDR0       REG_ACCESS(WoReg, 0x40014028U) /*  (TC1) Interrupt Disable Register (channel = 0) */
03600 #define REG_TC1_IMR0       REG_ACCESS(RoReg, 0x4001402CU) /*  (TC1) Interrupt Mask Register (channel = 0) */
03601 #define REG_TC1_CCR1       REG_ACCESS(WoReg, 0x40014040U) /*  (TC1) Channel Control Register (channel = 1) */
03602 #define REG_TC1_CMR1       REG_ACCESS(RwReg, 0x40014044U) /*  (TC1) Channel Mode Register (channel = 1) */
03603 #define REG_TC1_SMMR1      REG_ACCESS(RwReg, 0x40014048U) /*  (TC1) Stepper Motor Mode Register (channel = 1) */
03604 #define REG_TC1_CV1        REG_ACCESS(RoReg, 0x40014050U) /*  (TC1) Counter Value (channel = 1) */
03605 #define REG_TC1_RA1        REG_ACCESS(RwReg, 0x40014054U) /*  (TC1) Register A (channel = 1) */
03606 #define REG_TC1_RB1        REG_ACCESS(RwReg, 0x40014058U) /*  (TC1) Register B (channel = 1) */
03607 #define REG_TC1_RC1        REG_ACCESS(RwReg, 0x4001405CU) /*  (TC1) Register C (channel = 1) */
03608 #define REG_TC1_SR1        REG_ACCESS(RoReg, 0x40014060U) /*  (TC1) Status Register (channel = 1) */
03609 #define REG_TC1_IER1       REG_ACCESS(WoReg, 0x40014064U) /*  (TC1) Interrupt Enable Register (channel = 1) */
03610 #define REG_TC1_IDR1       REG_ACCESS(WoReg, 0x40014068U) /*  (TC1) Interrupt Disable Register (channel = 1) */
03611 #define REG_TC1_IMR1       REG_ACCESS(RoReg, 0x4001406CU) /*  (TC1) Interrupt Mask Register (channel = 1) */
03612 #define REG_TC1_CCR2       REG_ACCESS(WoReg, 0x40014080U) /*  (TC1) Channel Control Register (channel = 2) */
03613 #define REG_TC1_CMR2       REG_ACCESS(RwReg, 0x40014084U) /*  (TC1) Channel Mode Register (channel = 2) */
03614 #define REG_TC1_SMMR2      REG_ACCESS(RwReg, 0x40014088U) /*  (TC1) Stepper Motor Mode Register (channel = 2) */
03615 #define REG_TC1_CV2        REG_ACCESS(RoReg, 0x40014090U) /*  (TC1) Counter Value (channel = 2) */
03616 #define REG_TC1_RA2        REG_ACCESS(RwReg, 0x40014094U) /*  (TC1) Register A (channel = 2) */
03617 #define REG_TC1_RB2        REG_ACCESS(RwReg, 0x40014098U) /*  (TC1) Register B (channel = 2) */
03618 #define REG_TC1_RC2        REG_ACCESS(RwReg, 0x4001409CU) /*  (TC1) Register C (channel = 2) */
03619 #define REG_TC1_SR2        REG_ACCESS(RoReg, 0x400140A0U) /*  (TC1) Status Register (channel = 2) */
03620 #define REG_TC1_IER2       REG_ACCESS(WoReg, 0x400140A4U) /*  (TC1) Interrupt Enable Register (channel = 2) */
03621 #define REG_TC1_IDR2       REG_ACCESS(WoReg, 0x400140A8U) /*  (TC1) Interrupt Disable Register (channel = 2) */
03622 #define REG_TC1_IMR2       REG_ACCESS(RoReg, 0x400140ACU) /*  (TC1) Interrupt Mask Register (channel = 2) */
03623 #define REG_TC1_BCR        REG_ACCESS(WoReg, 0x400140C0U) /*  (TC1) Block Control Register */
03624 #define REG_TC1_BMR        REG_ACCESS(RwReg, 0x400140C4U) /*  (TC1) Block Mode Register */
03625 #define REG_TC1_QIER       REG_ACCESS(WoReg, 0x400140C8U) /*  (TC1) QDEC Interrupt Enable Register */
03626 #define REG_TC1_QIDR       REG_ACCESS(WoReg, 0x400140CCU) /*  (TC1) QDEC Interrupt Disable Register */
03627 #define REG_TC1_QIMR       REG_ACCESS(RoReg, 0x400140D0U) /*  (TC1) QDEC Interrupt Mask Register */
03628 #define REG_TC1_QISR       REG_ACCESS(RoReg, 0x400140D4U) /*  (TC1) QDEC Interrupt Status Register */
03629 #define REG_TC1_WPMR       REG_ACCESS(RwReg, 0x400140E4U) /*  (TC1) Write Protect Mode Register */
03630 /* ========== Register definition for TWI0 peripheral ========== */
03631 #define REG_TWI0_CR        REG_ACCESS(WoReg, 0x40018000U) /*  (TWI0) Control Register */
03632 #define REG_TWI0_MMR       REG_ACCESS(RwReg, 0x40018004U) /*  (TWI0) Master Mode Register */
03633 #define REG_TWI0_SMR       REG_ACCESS(RwReg, 0x40018008U) /*  (TWI0) Slave Mode Register */
03634 #define REG_TWI0_IADR      REG_ACCESS(RwReg, 0x4001800CU) /*  (TWI0) Internal Address Register */
03635 #define REG_TWI0_CWGR      REG_ACCESS(RwReg, 0x40018010U) /*  (TWI0) Clock Waveform Generator Register */
03636 #define REG_TWI0_SR        REG_ACCESS(RoReg, 0x40018020U) /*  (TWI0) Status Register */
03637 #define REG_TWI0_IER       REG_ACCESS(WoReg, 0x40018024U) /*  (TWI0) Interrupt Enable Register */
03638 #define REG_TWI0_IDR       REG_ACCESS(WoReg, 0x40018028U) /*  (TWI0) Interrupt Disable Register */
03639 #define REG_TWI0_IMR       REG_ACCESS(RoReg, 0x4001802CU) /*  (TWI0) Interrupt Mask Register */
03640 #define REG_TWI0_RHR       REG_ACCESS(RoReg, 0x40018030U) /*  (TWI0) Receive Holding Register */
03641 #define REG_TWI0_THR       REG_ACCESS(WoReg, 0x40018034U) /*  (TWI0) Transmit Holding Register */
03642 #define REG_TWI0_RPR       REG_ACCESS(RwReg, 0x40018100U) /*  (TWI0) Receive Pointer Register */
03643 #define REG_TWI0_RCR       REG_ACCESS(RwReg, 0x40018104U) /*  (TWI0) Receive Counter Register */
03644 #define REG_TWI0_TPR       REG_ACCESS(RwReg, 0x40018108U) /*  (TWI0) Transmit Pointer Register */
03645 #define REG_TWI0_TCR       REG_ACCESS(RwReg, 0x4001810CU) /*  (TWI0) Transmit Counter Register */
03646 #define REG_TWI0_RNPR      REG_ACCESS(RwReg, 0x40018110U) /*  (TWI0) Receive Next Pointer Register */
03647 #define REG_TWI0_RNCR      REG_ACCESS(RwReg, 0x40018114U) /*  (TWI0) Receive Next Counter Register */
03648 #define REG_TWI0_TNPR      REG_ACCESS(RwReg, 0x40018118U) /*  (TWI0) Transmit Next Pointer Register */
03649 #define REG_TWI0_TNCR      REG_ACCESS(RwReg, 0x4001811CU) /*  (TWI0) Transmit Next Counter Register */
03650 #define REG_TWI0_PTCR      REG_ACCESS(WoReg, 0x40018120U) /*  (TWI0) Transfer Control Register */
03651 #define REG_TWI0_PTSR      REG_ACCESS(RoReg, 0x40018124U) /*  (TWI0) Transfer Status Register */
03652 /* ========== Register definition for TWI1 peripheral ========== */
03653 #define REG_TWI1_CR        REG_ACCESS(WoReg, 0x4001C000U) /*  (TWI1) Control Register */
03654 #define REG_TWI1_MMR       REG_ACCESS(RwReg, 0x4001C004U) /*  (TWI1) Master Mode Register */
03655 #define REG_TWI1_SMR       REG_ACCESS(RwReg, 0x4001C008U) /*  (TWI1) Slave Mode Register */
03656 #define REG_TWI1_IADR      REG_ACCESS(RwReg, 0x4001C00CU) /*  (TWI1) Internal Address Register */
03657 #define REG_TWI1_CWGR      REG_ACCESS(RwReg, 0x4001C010U) /*  (TWI1) Clock Waveform Generator Register */
03658 #define REG_TWI1_SR        REG_ACCESS(RoReg, 0x4001C020U) /*  (TWI1) Status Register */
03659 #define REG_TWI1_IER       REG_ACCESS(WoReg, 0x4001C024U) /*  (TWI1) Interrupt Enable Register */
03660 #define REG_TWI1_IDR       REG_ACCESS(WoReg, 0x4001C028U) /*  (TWI1) Interrupt Disable Register */
03661 #define REG_TWI1_IMR       REG_ACCESS(RoReg, 0x4001C02CU) /*  (TWI1) Interrupt Mask Register */
03662 #define REG_TWI1_RHR       REG_ACCESS(RoReg, 0x4001C030U) /*  (TWI1) Receive Holding Register */
03663 #define REG_TWI1_THR       REG_ACCESS(WoReg, 0x4001C034U) /*  (TWI1) Transmit Holding Register */
03664 /* ========== Register definition for PWM peripheral ========== */
03665 #define REG_PWM_MR         REG_ACCESS(RwReg, 0x40020000U) /*  (PWM) PWM Mode Register */
03666 #define REG_PWM_ENA        REG_ACCESS(WoReg, 0x40020004U) /*  (PWM) PWM Enable Register */
03667 #define REG_PWM_DIS        REG_ACCESS(WoReg, 0x40020008U) /*  (PWM) PWM Disable Register */
03668 #define REG_PWM_SR         REG_ACCESS(RoReg, 0x4002000CU) /*  (PWM) PWM Status Register */
03669 #define REG_PWM_IER        REG_ACCESS(WoReg, 0x40020010U) /*  (PWM) PWM Interrupt Enable Register */
03670 #define REG_PWM_IDR        REG_ACCESS(WoReg, 0x40020014U) /*  (PWM) PWM Interrupt Disable Register */
03671 #define REG_PWM_IMR        REG_ACCESS(RoReg, 0x40020018U) /*  (PWM) PWM Interrupt Mask Register */
03672 #define REG_PWM_ISR        REG_ACCESS(RoReg, 0x4002001CU) /*  (PWM) PWM Interrupt Status Register */
03673 #define REG_PWM_CMR0       REG_ACCESS(RwReg, 0x40020200U) /*  (PWM) PWM Channel Mode Register (ch_num = 0) */
03674 #define REG_PWM_CDTY0      REG_ACCESS(RwReg, 0x40020204U) /*  (PWM) PWM Channel Duty Cycle Register (ch_num = 0) */
03675 #define REG_PWM_CPRD0      REG_ACCESS(RwReg, 0x40020208U) /*  (PWM) PWM Channel Period Register (ch_num = 0) */
03676 #define REG_PWM_CCNT0      REG_ACCESS(RoReg, 0x4002020CU) /*  (PWM) PWM Channel Counter Register (ch_num = 0) */
03677 #define REG_PWM_CUPD0      REG_ACCESS(WoReg, 0x40020210U) /*  (PWM) PWM Channel Update Register (ch_num = 0) */
03678 #define REG_PWM_CMR1       REG_ACCESS(RwReg, 0x40020220U) /*  (PWM) PWM Channel Mode Register (ch_num = 1) */
03679 #define REG_PWM_CDTY1      REG_ACCESS(RwReg, 0x40020224U) /*  (PWM) PWM Channel Duty Cycle Register (ch_num = 1) */
03680 #define REG_PWM_CPRD1      REG_ACCESS(RwReg, 0x40020228U) /*  (PWM) PWM Channel Period Register (ch_num = 1) */
03681 #define REG_PWM_CCNT1      REG_ACCESS(RoReg, 0x4002022CU) /*  (PWM) PWM Channel Counter Register (ch_num = 1) */
03682 #define REG_PWM_CUPD1      REG_ACCESS(WoReg, 0x40020230U) /*  (PWM) PWM Channel Update Register (ch_num = 1) */
03683 #define REG_PWM_CMR2       REG_ACCESS(RwReg, 0x40020240U) /*  (PWM) PWM Channel Mode Register (ch_num = 2) */
03684 #define REG_PWM_CDTY2      REG_ACCESS(RwReg, 0x40020244U) /*  (PWM) PWM Channel Duty Cycle Register (ch_num = 2) */
03685 #define REG_PWM_CPRD2      REG_ACCESS(RwReg, 0x40020248U) /*  (PWM) PWM Channel Period Register (ch_num = 2) */
03686 #define REG_PWM_CCNT2      REG_ACCESS(RoReg, 0x4002024CU) /*  (PWM) PWM Channel Counter Register (ch_num = 2) */
03687 #define REG_PWM_CUPD2      REG_ACCESS(WoReg, 0x40020250U) /*  (PWM) PWM Channel Update Register (ch_num = 2) */
03688 #define REG_PWM_CMR3       REG_ACCESS(RwReg, 0x40020260U) /*  (PWM) PWM Channel Mode Register (ch_num = 3) */
03689 #define REG_PWM_CDTY3      REG_ACCESS(RwReg, 0x40020264U) /*  (PWM) PWM Channel Duty Cycle Register (ch_num = 3) */
03690 #define REG_PWM_CPRD3      REG_ACCESS(RwReg, 0x40020268U) /*  (PWM) PWM Channel Period Register (ch_num = 3) */
03691 #define REG_PWM_CCNT3      REG_ACCESS(RoReg, 0x4002026CU) /*  (PWM) PWM Channel Counter Register (ch_num = 3) */
03692 #define REG_PWM_CUPD3      REG_ACCESS(WoReg, 0x40020270U) /*  (PWM) PWM Channel Update Register (ch_num = 3) */
03693 /* ========== Register definition for USART0 peripheral ========== */
03694 #define REG_USART0_CR      REG_ACCESS(WoReg, 0x40024000U) /*  (USART0) Control Register */
03695 #define REG_USART0_MR      REG_ACCESS(RwReg, 0x40024004U) /*  (USART0) Mode Register */
03696 #define REG_USART0_IER     REG_ACCESS(WoReg, 0x40024008U) /*  (USART0) Interrupt Enable Register */
03697 #define REG_USART0_IDR     REG_ACCESS(WoReg, 0x4002400CU) /*  (USART0) Interrupt Disable Register */
03698 #define REG_USART0_IMR     REG_ACCESS(RoReg, 0x40024010U) /*  (USART0) Interrupt Mask Register */
03699 #define REG_USART0_CSR     REG_ACCESS(RoReg, 0x40024014U) /*  (USART0) Channel Status Register */
03700 #define REG_USART0_RHR     REG_ACCESS(RoReg, 0x40024018U) /*  (USART0) Receiver Holding Register */
03701 #define REG_USART0_THR     REG_ACCESS(WoReg, 0x4002401CU) /*  (USART0) Transmitter Holding Register */
03702 #define REG_USART0_BRGR    REG_ACCESS(RwReg, 0x40024020U) /*  (USART0) Baud Rate Generator Register */
03703 #define REG_USART0_RTOR    REG_ACCESS(RwReg, 0x40024024U) /*  (USART0) Receiver Time-out Register */
03704 #define REG_USART0_TTGR    REG_ACCESS(RwReg, 0x40024028U) /*  (USART0) Transmitter Timeguard Register */
03705 #define REG_USART0_FIDI    REG_ACCESS(RwReg, 0x40024040U) /*  (USART0) FI DI Ratio Register */
03706 #define REG_USART0_NER     REG_ACCESS(RoReg, 0x40024044U) /*  (USART0) Number of Errors Register */
03707 #define REG_USART0_IF      REG_ACCESS(RwReg, 0x4002404CU) /*  (USART0) IrDA Filter Register */
03708 #define REG_USART0_WPMR    REG_ACCESS(RwReg, 0x400240E4U) /*  (USART0) Write Protect Mode Register */
03709 #define REG_USART0_WPSR    REG_ACCESS(RoReg, 0x400240E8U) /*  (USART0) Write Protect Status Register */
03710 #define REG_USART0_RPR     REG_ACCESS(RwReg, 0x40024100U) /*  (USART0) Receive Pointer Register */
03711 #define REG_USART0_RCR     REG_ACCESS(RwReg, 0x40024104U) /*  (USART0) Receive Counter Register */
03712 #define REG_USART0_TPR     REG_ACCESS(RwReg, 0x40024108U) /*  (USART0) Transmit Pointer Register */
03713 #define REG_USART0_TCR     REG_ACCESS(RwReg, 0x4002410CU) /*  (USART0) Transmit Counter Register */
03714 #define REG_USART0_RNPR    REG_ACCESS(RwReg, 0x40024110U) /*  (USART0) Receive Next Pointer Register */
03715 #define REG_USART0_RNCR    REG_ACCESS(RwReg, 0x40024114U) /*  (USART0) Receive Next Counter Register */
03716 #define REG_USART0_TNPR    REG_ACCESS(RwReg, 0x40024118U) /*  (USART0) Transmit Next Pointer Register */
03717 #define REG_USART0_TNCR    REG_ACCESS(RwReg, 0x4002411CU) /*  (USART0) Transmit Next Counter Register */
03718 #define REG_USART0_PTCR    REG_ACCESS(WoReg, 0x40024120U) /*  (USART0) Transfer Control Register */
03719 #define REG_USART0_PTSR    REG_ACCESS(RoReg, 0x40024124U) /*  (USART0) Transfer Status Register */
03720 /* ========== Register definition for USART1 peripheral ========== */
03721 #define REG_USART1_CR      REG_ACCESS(WoReg, 0x40028000U) /*  (USART1) Control Register */
03722 #define REG_USART1_MR      REG_ACCESS(RwReg, 0x40028004U) /*  (USART1) Mode Register */
03723 #define REG_USART1_IER     REG_ACCESS(WoReg, 0x40028008U) /*  (USART1) Interrupt Enable Register */
03724 #define REG_USART1_IDR     REG_ACCESS(WoReg, 0x4002800CU) /*  (USART1) Interrupt Disable Register */
03725 #define REG_USART1_IMR     REG_ACCESS(RoReg, 0x40028010U) /*  (USART1) Interrupt Mask Register */
03726 #define REG_USART1_CSR     REG_ACCESS(RoReg, 0x40028014U) /*  (USART1) Channel Status Register */
03727 #define REG_USART1_RHR     REG_ACCESS(RoReg, 0x40028018U) /*  (USART1) Receiver Holding Register */
03728 #define REG_USART1_THR     REG_ACCESS(WoReg, 0x4002801CU) /*  (USART1) Transmitter Holding Register */
03729 #define REG_USART1_BRGR    REG_ACCESS(RwReg, 0x40028020U) /*  (USART1) Baud Rate Generator Register */
03730 #define REG_USART1_RTOR    REG_ACCESS(RwReg, 0x40028024U) /*  (USART1) Receiver Time-out Register */
03731 #define REG_USART1_TTGR    REG_ACCESS(RwReg, 0x40028028U) /*  (USART1) Transmitter Timeguard Register */
03732 #define REG_USART1_FIDI    REG_ACCESS(RwReg, 0x40028040U) /*  (USART1) FI DI Ratio Register */
03733 #define REG_USART1_NER     REG_ACCESS(RoReg, 0x40028044U) /*  (USART1) Number of Errors Register */
03734 #define REG_USART1_IF      REG_ACCESS(RwReg, 0x4002804CU) /*  (USART1) IrDA Filter Register */
03735 #define REG_USART1_WPMR    REG_ACCESS(RwReg, 0x400280E4U) /*  (USART1) Write Protect Mode Register */
03736 #define REG_USART1_WPSR    REG_ACCESS(RoReg, 0x400280E8U) /*  (USART1) Write Protect Status Register */
03737 /* ========== Register definition for ADC peripheral ========== */
03738 #define REG_ADC_CR         REG_ACCESS(WoReg, 0x40038000U) /*  (ADC) Control Register */
03739 #define REG_ADC_MR         REG_ACCESS(RwReg, 0x40038004U) /*  (ADC) Mode Register */
03740 #define REG_ADC_SEQR1      REG_ACCESS(RwReg, 0x40038008U) /*  (ADC) Channel Sequence Register 1 */
03741 #define REG_ADC_SEQR2      REG_ACCESS(RwReg, 0x4003800CU) /*  (ADC) Channel Sequence Register 2 */
03742 #define REG_ADC_CHER       REG_ACCESS(WoReg, 0x40038010U) /*  (ADC) Channel Enable Register */
03743 #define REG_ADC_CHDR       REG_ACCESS(WoReg, 0x40038014U) /*  (ADC) Channel Disable Register */
03744 #define REG_ADC_CHSR       REG_ACCESS(RoReg, 0x40038018U) /*  (ADC) Channel Status Register */
03745 #define REG_ADC_LCDR       REG_ACCESS(RoReg, 0x40038020U) /*  (ADC) Last Converted Data Register */
03746 #define REG_ADC_IER        REG_ACCESS(WoReg, 0x40038024U) /*  (ADC) Interrupt Enable Register */
03747 #define REG_ADC_IDR        REG_ACCESS(WoReg, 0x40038028U) /*  (ADC) Interrupt Disable Register */
03748 #define REG_ADC_IMR        REG_ACCESS(RoReg, 0x4003802CU) /*  (ADC) Interrupt Mask Register */
03749 #define REG_ADC_ISR        REG_ACCESS(RoReg, 0x40038030U) /*  (ADC) Interrupt Status Register */
03750 #define REG_ADC_OVER       REG_ACCESS(RoReg, 0x4003803CU) /*  (ADC) Overrun Status Register */
03751 #define REG_ADC_EMR        REG_ACCESS(RwReg, 0x40038040U) /*  (ADC) Extended Mode Register */
03752 #define REG_ADC_CWR        REG_ACCESS(RwReg, 0x40038044U) /*  (ADC) Compare Window Register */
03753 #define REG_ADC_CDR        REG_ACCESS(RoReg, 0x40038050U) /*  (ADC) Channel Data Register */
03754 #define REG_ADC_WPMR       REG_ACCESS(RwReg, 0x400380E4U) /*  (ADC) Write Protect Mode Register */
03755 #define REG_ADC_WPSR       REG_ACCESS(RoReg, 0x400380E8U) /*  (ADC) Write Protect Status Register */
03756 #define REG_ADC_RPR        REG_ACCESS(RwReg, 0x40038100U) /*  (ADC) Receive Pointer Register */
03757 #define REG_ADC_RCR        REG_ACCESS(RwReg, 0x40038104U) /*  (ADC) Receive Counter Register */
03758 #define REG_ADC_TPR        REG_ACCESS(RwReg, 0x40038108U) /*  (ADC) Transmit Pointer Register */
03759 #define REG_ADC_TCR        REG_ACCESS(RwReg, 0x4003810CU) /*  (ADC) Transmit Counter Register */
03760 #define REG_ADC_RNPR       REG_ACCESS(RwReg, 0x40038110U) /*  (ADC) Receive Next Pointer Register */
03761 #define REG_ADC_RNCR       REG_ACCESS(RwReg, 0x40038114U) /*  (ADC) Receive Next Counter Register */
03762 #define REG_ADC_TNPR       REG_ACCESS(RwReg, 0x40038118U) /*  (ADC) Transmit Next Pointer Register */
03763 #define REG_ADC_TNCR       REG_ACCESS(RwReg, 0x4003811CU) /*  (ADC) Transmit Next Counter Register */
03764 #define REG_ADC_PTCR       REG_ACCESS(WoReg, 0x40038120U) /*  (ADC) Transfer Control Register */
03765 #define REG_ADC_PTSR       REG_ACCESS(RoReg, 0x40038124U) /*  (ADC) Transfer Status Register */
03766 /* ========== Register definition for DACC peripheral ========== */
03767 #define REG_DACC_CR        REG_ACCESS(WoReg, 0x4003C000U) /*  (DACC) Control Register */
03768 #define REG_DACC_MR        REG_ACCESS(RwReg, 0x4003C004U) /*  (DACC) Mode Register */
03769 #define REG_DACC_CDR       REG_ACCESS(WoReg, 0x4003C008U) /*  (DACC) Conversion Data Register */
03770 #define REG_DACC_IER       REG_ACCESS(WoReg, 0x4003C00CU) /*  (DACC) Interrupt Enable Register */
03771 #define REG_DACC_IDR       REG_ACCESS(WoReg, 0x4003C010U) /*  (DACC) Interrupt Disable Register */
03772 #define REG_DACC_IMR       REG_ACCESS(RoReg, 0x4003C014U) /*  (DACC) Interrupt Mask Register */
03773 #define REG_DACC_ISR       REG_ACCESS(RoReg, 0x4003C018U) /*  (DACC) Interrupt Status Register */
03774 #define REG_DACC_WPMR      REG_ACCESS(RwReg, 0x4003C0E4U) /*  (DACC) Write Protect Mode Register */
03775 #define REG_DACC_WPSR      REG_ACCESS(RoReg, 0x4003C0E8U) /*  (DACC) Write Protect Status Register */
03776 #define REG_DACC_RPR       REG_ACCESS(RwReg, 0x4003C100U) /*  (DACC) Receive Pointer Register */
03777 #define REG_DACC_RCR       REG_ACCESS(RwReg, 0x4003C104U) /*  (DACC) Receive Counter Register */
03778 #define REG_DACC_TPR       REG_ACCESS(RwReg, 0x4003C108U) /*  (DACC) Transmit Pointer Register */
03779 #define REG_DACC_TCR       REG_ACCESS(RwReg, 0x4003C10CU) /*  (DACC) Transmit Counter Register */
03780 #define REG_DACC_RNPR      REG_ACCESS(RwReg, 0x4003C110U) /*  (DACC) Receive Next Pointer Register */
03781 #define REG_DACC_RNCR      REG_ACCESS(RwReg, 0x4003C114U) /*  (DACC) Receive Next Counter Register */
03782 #define REG_DACC_TNPR      REG_ACCESS(RwReg, 0x4003C118U) /*  (DACC) Transmit Next Pointer Register */
03783 #define REG_DACC_TNCR      REG_ACCESS(RwReg, 0x4003C11CU) /*  (DACC) Transmit Next Counter Register */
03784 #define REG_DACC_PTCR      REG_ACCESS(WoReg, 0x4003C120U) /*  (DACC) Transfer Control Register */
03785 #define REG_DACC_PTSR      REG_ACCESS(RoReg, 0x4003C124U) /*  (DACC) Transfer Status Register */
03786 /* ========== Register definition for MATRIX peripheral ========== */
03787 #define REG_MATRIX_MCFG    REG_ACCESS(RwReg, 0x400E0200U) /*  (MATRIX) Master Configuration Register */
03788 #define REG_MATRIX_SCFG    REG_ACCESS(RwReg, 0x400E0240U) /*  (MATRIX) Slave Configuration Register */
03789 #define REG_MATRIX_PRAS0   REG_ACCESS(RwReg, 0x400E0280U) /*  (MATRIX) Priority Register A for Slave 0 */
03790 #define REG_MATRIX_PRAS1   REG_ACCESS(RwReg, 0x400E0288U) /*  (MATRIX) Priority Register A for Slave 1 */
03791 #define REG_MATRIX_PRAS2   REG_ACCESS(RwReg, 0x400E0290U) /*  (MATRIX) Priority Register A for Slave 2 */
03792 #define REG_MATRIX_PRAS3   REG_ACCESS(RwReg, 0x400E0298U) /*  (MATRIX) Priority Register A for Slave 3 */
03793 #define REG_MATRIX_SYSIO   REG_ACCESS(RwReg, 0x400E0314U) /*  (MATRIX) System I/O Configuration register */
03794 #define REG_MATRIX_WPMR    REG_ACCESS(RwReg, 0x400E03E4U) /*  (MATRIX) Write Protect Mode Register */
03795 #define REG_MATRIX_WPSR    REG_ACCESS(RoReg, 0x400E03E8U) /*  (MATRIX) Write Protect Status Register */
03796 /* ========== Register definition for PMC peripheral ========== */
03797 #define REG_PMC_SCER       REG_ACCESS(WoReg, 0x400E0400U) /*  (PMC) System Clock Enable Register */
03798 #define REG_PMC_SCDR       REG_ACCESS(WoReg, 0x400E0404U) /*  (PMC) System Clock Disable Register */
03799 #define REG_PMC_SCSR       REG_ACCESS(RoReg, 0x400E0408U) /*  (PMC) System Clock Status Register */
03800 #define REG_PMC_PCER       REG_ACCESS(WoReg, 0x400E0410U) /*  (PMC) Peripheral Clock Enable Register */
03801 #define REG_PMC_PCDR       REG_ACCESS(WoReg, 0x400E0414U) /*  (PMC) Peripheral Clock Disable Register */
03802 #define REG_PMC_PCSR       REG_ACCESS(RoReg, 0x400E0418U) /*  (PMC) Peripheral Clock Status Register */
03803 #define REG_PMC_MOR        REG_ACCESS(RwReg, 0x400E0420U) /*  (PMC) Main Oscillator Register */
03804 #define REG_PMC_MCFR       REG_ACCESS(RoReg, 0x400E0424U) /*  (PMC) Main Clock Frequency Register */
03805 #define REG_PMC_PLLR       REG_ACCESS(RwReg, 0x400E0428U) /*  (PMC) PLL Register */
03806 #define REG_PMC_MCKR       REG_ACCESS(RwReg, 0x400E0430U) /*  (PMC) Master Clock Register */
03807 #define REG_PMC_PCK        REG_ACCESS(RwReg, 0x400E0440U) /*  (PMC) Programmable Clock 0 Register */
03808 #define REG_PMC_IER        REG_ACCESS(WoReg, 0x400E0460U) /*  (PMC) Interrupt Enable Register */
03809 #define REG_PMC_IDR        REG_ACCESS(WoReg, 0x400E0464U) /*  (PMC) Interrupt Disable Register */
03810 #define REG_PMC_SR         REG_ACCESS(RoReg, 0x400E0468U) /*  (PMC) Status Register */
03811 #define REG_PMC_IMR        REG_ACCESS(RoReg, 0x400E046CU) /*  (PMC) Interrupt Mask Register */
03812 #define REG_PMC_FSMR       REG_ACCESS(RwReg, 0x400E0470U) /*  (PMC) Fast Startup Mode Register */
03813 #define REG_PMC_FSPR       REG_ACCESS(RwReg, 0x400E0474U) /*  (PMC) Fast Startup Polarity Register */
03814 #define REG_PMC_FOCR       REG_ACCESS(WoReg, 0x400E0478U) /*  (PMC) Fault Output Clear Register */
03815 #define REG_PMC_WPMR       REG_ACCESS(RwReg, 0x400E04E4U) /*  (PMC) Write Protect Mode Register */
03816 #define REG_PMC_WPSR       REG_ACCESS(RoReg, 0x400E04E8U) /*  (PMC) Write Protect Status Register */
03817 #define REG_PMC_OCR        REG_ACCESS(RwReg, 0x400E0510U) /*  (PMC) Oscillator Calibration Register */
03818 /* ========== Register definition for UART0 peripheral ========== */
03819 #define REG_UART0_CR       REG_ACCESS(WoReg, 0x400E0600U) /*  (UART0) Control Register */
03820 #define REG_UART0_MR       REG_ACCESS(RwReg, 0x400E0604U) /*  (UART0) Mode Register */
03821 #define REG_UART0_IER      REG_ACCESS(WoReg, 0x400E0608U) /*  (UART0) Interrupt Enable Register */
03822 #define REG_UART0_IDR      REG_ACCESS(WoReg, 0x400E060CU) /*  (UART0) Interrupt Disable Register */
03823 #define REG_UART0_IMR      REG_ACCESS(RoReg, 0x400E0610U) /*  (UART0) Interrupt Mask Register */
03824 #define REG_UART0_SR       REG_ACCESS(RoReg, 0x400E0614U) /*  (UART0) Status Register */
03825 #define REG_UART0_RHR      REG_ACCESS(RoReg, 0x400E0618U) /*  (UART0) Receive Holding Register */
03826 #define REG_UART0_THR      REG_ACCESS(WoReg, 0x400E061CU) /*  (UART0) Transmit Holding Register */
03827 #define REG_UART0_BRGR     REG_ACCESS(RwReg, 0x400E0620U) /*  (UART0) Baud Rate Generator Register */
03828 #define REG_UART0_RPR      REG_ACCESS(RwReg, 0x400E0700U) /*  (UART0) Receive Pointer Register */
03829 #define REG_UART0_RCR      REG_ACCESS(RwReg, 0x400E0704U) /*  (UART0) Receive Counter Register */
03830 #define REG_UART0_TPR      REG_ACCESS(RwReg, 0x400E0708U) /*  (UART0) Transmit Pointer Register */
03831 #define REG_UART0_TCR      REG_ACCESS(RwReg, 0x400E070CU) /*  (UART0) Transmit Counter Register */
03832 #define REG_UART0_RNPR     REG_ACCESS(RwReg, 0x400E0710U) /*  (UART0) Receive Next Pointer Register */
03833 #define REG_UART0_RNCR     REG_ACCESS(RwReg, 0x400E0714U) /*  (UART0) Receive Next Counter Register */
03834 #define REG_UART0_TNPR     REG_ACCESS(RwReg, 0x400E0718U) /*  (UART0) Transmit Next Pointer Register */
03835 #define REG_UART0_TNCR     REG_ACCESS(RwReg, 0x400E071CU) /*  (UART0) Transmit Next Counter Register */
03836 #define REG_UART0_PTCR     REG_ACCESS(WoReg, 0x400E0720U) /*  (UART0) Transfer Control Register */
03837 #define REG_UART0_PTSR     REG_ACCESS(RoReg, 0x400E0724U) /*  (UART0) Transfer Status Register */
03838 /* ========== Register definition for CHIPID peripheral ========== */
03839 #define REG_CHIPID_CIDR    REG_ACCESS(RoReg, 0x400E0740U) /*  (CHIPID) Chip ID Register */
03840 #define REG_CHIPID_EXID    REG_ACCESS(RoReg, 0x400E0744U) /*  (CHIPID) Chip ID Extension Register */
03841 /* ========== Register definition for UART1 peripheral ========== */
03842 #define REG_UART1_CR       REG_ACCESS(WoReg, 0x400E0800U) /*  (UART1) Control Register */
03843 #define REG_UART1_MR       REG_ACCESS(RwReg, 0x400E0804U) /*  (UART1) Mode Register */
03844 #define REG_UART1_IER      REG_ACCESS(WoReg, 0x400E0808U) /*  (UART1) Interrupt Enable Register */
03845 #define REG_UART1_IDR      REG_ACCESS(WoReg, 0x400E080CU) /*  (UART1) Interrupt Disable Register */
03846 #define REG_UART1_IMR      REG_ACCESS(RoReg, 0x400E0810U) /*  (UART1) Interrupt Mask Register */
03847 #define REG_UART1_SR       REG_ACCESS(RoReg, 0x400E0814U) /*  (UART1) Status Register */
03848 #define REG_UART1_RHR      REG_ACCESS(RoReg, 0x400E0818U) /*  (UART1) Receive Holding Register */
03849 #define REG_UART1_THR      REG_ACCESS(WoReg, 0x400E081CU) /*  (UART1) Transmit Holding Register */
03850 #define REG_UART1_BRGR     REG_ACCESS(RwReg, 0x400E0820U) /*  (UART1) Baud Rate Generator Register */
03851 /* ========== Register definition for EFC peripheral ========== */
03852 #define REG_EFC_FMR        REG_ACCESS(RwReg, 0x400E0A00U) /*  (EFC) EEFC Flash Mode Register */
03853 #define REG_EFC_FCR        REG_ACCESS(WoReg, 0x400E0A04U) /*  (EFC) EEFC Flash Command Register */
03854 #define REG_EFC_FSR        REG_ACCESS(RoReg, 0x400E0A08U) /*  (EFC) EEFC Flash Status Register */
03855 #define REG_EFC_FRR        REG_ACCESS(RoReg, 0x400E0A0CU) /*  (EFC) EEFC Flash Result Register */
03856 /* ========== Register definition for PIOA peripheral ========== */
03857 #define REG_PIOA_PER       REG_ACCESS(WoReg, 0x400E0E00U) /*  (PIOA) PIO Enable Register */
03858 #define REG_PIOA_PDR       REG_ACCESS(WoReg, 0x400E0E04U) /*  (PIOA) PIO Disable Register */
03859 #define REG_PIOA_PSR       REG_ACCESS(RoReg, 0x400E0E08U) /*  (PIOA) PIO Status Register */
03860 #define REG_PIOA_OER       REG_ACCESS(WoReg, 0x400E0E10U) /*  (PIOA) Output Enable Register */
03861 #define REG_PIOA_ODR       REG_ACCESS(WoReg, 0x400E0E14U) /*  (PIOA) Output Disable Register */
03862 #define REG_PIOA_OSR       REG_ACCESS(RoReg, 0x400E0E18U) /*  (PIOA) Output Status Register */
03863 #define REG_PIOA_IFER      REG_ACCESS(WoReg, 0x400E0E20U) /*  (PIOA) Glitch Input Filter Enable Register */
03864 #define REG_PIOA_IFDR      REG_ACCESS(WoReg, 0x400E0E24U) /*  (PIOA) Glitch Input Filter Disable Register */
03865 #define REG_PIOA_IFSR      REG_ACCESS(RoReg, 0x400E0E28U) /*  (PIOA) Glitch Input Filter Status Register */
03866 #define REG_PIOA_SODR      REG_ACCESS(WoReg, 0x400E0E30U) /*  (PIOA) Set Output Data Register */
03867 #define REG_PIOA_CODR      REG_ACCESS(WoReg, 0x400E0E34U) /*  (PIOA) Clear Output Data Register */
03868 #define REG_PIOA_ODSR      REG_ACCESS(RwReg, 0x400E0E38U) /*  (PIOA) Output Data Status Register */
03869 #define REG_PIOA_PDSR      REG_ACCESS(RoReg, 0x400E0E3CU) /*  (PIOA) Pin Data Status Register */
03870 #define REG_PIOA_IER       REG_ACCESS(WoReg, 0x400E0E40U) /*  (PIOA) Interrupt Enable Register */
03871 #define REG_PIOA_IDR       REG_ACCESS(WoReg, 0x400E0E44U) /*  (PIOA) Interrupt Disable Register */
03872 #define REG_PIOA_IMR       REG_ACCESS(RoReg, 0x400E0E48U) /*  (PIOA) Interrupt Mask Register */
03873 #define REG_PIOA_ISR       REG_ACCESS(RoReg, 0x400E0E4CU) /*  (PIOA) Interrupt Status Register */
03874 #define REG_PIOA_MDER      REG_ACCESS(WoReg, 0x400E0E50U) /*  (PIOA) Multi-driver Enable Register */
03875 #define REG_PIOA_MDDR      REG_ACCESS(WoReg, 0x400E0E54U) /*  (PIOA) Multi-driver Disable Register */
03876 #define REG_PIOA_MDSR      REG_ACCESS(RoReg, 0x400E0E58U) /*  (PIOA) Multi-driver Status Register */
03877 #define REG_PIOA_PUDR      REG_ACCESS(WoReg, 0x400E0E60U) /*  (PIOA) Pull-up Disable Register */
03878 #define REG_PIOA_PUER      REG_ACCESS(WoReg, 0x400E0E64U) /*  (PIOA) Pull-up Enable Register */
03879 #define REG_PIOA_PUSR      REG_ACCESS(RoReg, 0x400E0E68U) /*  (PIOA) Pad Pull-up Status Register */
03880 #define REG_PIOA_ABCDSR    REG_ACCESS(RwReg, 0x400E0E70U) /*  (PIOA) Peripheral Select Register */
03881 #define REG_PIOA_IFSCDR    REG_ACCESS(WoReg, 0x400E0E80U) /*  (PIOA) Input Filter Slow Clock Disable Register */
03882 #define REG_PIOA_IFSCER    REG_ACCESS(WoReg, 0x400E0E84U) /*  (PIOA) Input Filter Slow Clock Enable Register */
03883 #define REG_PIOA_IFSCSR    REG_ACCESS(RoReg, 0x400E0E88U) /*  (PIOA) Input Filter Slow Clock Status Register */
03884 #define REG_PIOA_SCDR      REG_ACCESS(RwReg, 0x400E0E8CU) /*  (PIOA) Slow Clock Divider Debouncing Register */
03885 #define REG_PIOA_PPDDR     REG_ACCESS(WoReg, 0x400E0E90U) /*  (PIOA) Pad Pull-down Disable Register */
03886 #define REG_PIOA_PPDER     REG_ACCESS(WoReg, 0x400E0E94U) /*  (PIOA) Pad Pull-down Enable Register */
03887 #define REG_PIOA_PPDSR     REG_ACCESS(RoReg, 0x400E0E98U) /*  (PIOA) Pad Pull-down Status Register */
03888 #define REG_PIOA_OWER      REG_ACCESS(WoReg, 0x400E0EA0U) /*  (PIOA) Output Write Enable */
03889 #define REG_PIOA_OWDR      REG_ACCESS(WoReg, 0x400E0EA4U) /*  (PIOA) Output Write Disable */
03890 #define REG_PIOA_OWSR      REG_ACCESS(RoReg, 0x400E0EA8U) /*  (PIOA) Output Write Status Register */
03891 #define REG_PIOA_AIMER     REG_ACCESS(WoReg, 0x400E0EB0U) /*  (PIOA) Additional Interrupt Modes Enable Register */
03892 #define REG_PIOA_AIMDR     REG_ACCESS(WoReg, 0x400E0EB4U) /*  (PIOA) Additional Interrupt Modes Disables Register */
03893 #define REG_PIOA_AIMMR     REG_ACCESS(RoReg, 0x400E0EB8U) /*  (PIOA) Additional Interrupt Modes Mask Register */
03894 #define REG_PIOA_ESR       REG_ACCESS(WoReg, 0x400E0EC0U) /*  (PIOA) Edge Select Register */
03895 #define REG_PIOA_LSR       REG_ACCESS(WoReg, 0x400E0EC4U) /*  (PIOA) Level Select Register */
03896 #define REG_PIOA_ELSR      REG_ACCESS(RoReg, 0x400E0EC8U) /*  (PIOA) Edge/Level Status Register */
03897 #define REG_PIOA_FELLSR    REG_ACCESS(WoReg, 0x400E0ED0U) /*  (PIOA) Falling Edge/Low Level Select Register */
03898 #define REG_PIOA_REHLSR    REG_ACCESS(WoReg, 0x400E0ED4U) /*  (PIOA) Rising Edge/ High Level Select Register */
03899 #define REG_PIOA_FRLHSR    REG_ACCESS(RoReg, 0x400E0ED8U) /*  (PIOA) Fall/Rise - Low/High Status Register */
03900 #define REG_PIOA_LOCKSR    REG_ACCESS(RoReg, 0x400E0EE0U) /*  (PIOA) Lock Status */
03901 #define REG_PIOA_WPMR      REG_ACCESS(RwReg, 0x400E0EE4U) /*  (PIOA) Write Protect Mode Register */
03902 #define REG_PIOA_WPSR      REG_ACCESS(RoReg, 0x400E0EE8U) /*  (PIOA) Write Protect Status Register */
03903 #define REG_PIOA_SCHMITT   REG_ACCESS(RwReg, 0x400E0F00U) /*  (PIOA) Schmitt Trigger Register */
03904 /* ========== Register definition for PIOB peripheral ========== */
03905 #define REG_PIOB_PER       REG_ACCESS(WoReg, 0x400E1000U) /*  (PIOB) PIO Enable Register */
03906 #define REG_PIOB_PDR       REG_ACCESS(WoReg, 0x400E1004U) /*  (PIOB) PIO Disable Register */
03907 #define REG_PIOB_PSR       REG_ACCESS(RoReg, 0x400E1008U) /*  (PIOB) PIO Status Register */
03908 #define REG_PIOB_OER       REG_ACCESS(WoReg, 0x400E1010U) /*  (PIOB) Output Enable Register */
03909 #define REG_PIOB_ODR       REG_ACCESS(WoReg, 0x400E1014U) /*  (PIOB) Output Disable Register */
03910 #define REG_PIOB_OSR       REG_ACCESS(RoReg, 0x400E1018U) /*  (PIOB) Output Status Register */
03911 #define REG_PIOB_IFER      REG_ACCESS(WoReg, 0x400E1020U) /*  (PIOB) Glitch Input Filter Enable Register */
03912 #define REG_PIOB_IFDR      REG_ACCESS(WoReg, 0x400E1024U) /*  (PIOB) Glitch Input Filter Disable Register */
03913 #define REG_PIOB_IFSR      REG_ACCESS(RoReg, 0x400E1028U) /*  (PIOB) Glitch Input Filter Status Register */
03914 #define REG_PIOB_SODR      REG_ACCESS(WoReg, 0x400E1030U) /*  (PIOB) Set Output Data Register */
03915 #define REG_PIOB_CODR      REG_ACCESS(WoReg, 0x400E1034U) /*  (PIOB) Clear Output Data Register */
03916 #define REG_PIOB_ODSR      REG_ACCESS(RwReg, 0x400E1038U) /*  (PIOB) Output Data Status Register */
03917 #define REG_PIOB_PDSR      REG_ACCESS(RoReg, 0x400E103CU) /*  (PIOB) Pin Data Status Register */
03918 #define REG_PIOB_IER       REG_ACCESS(WoReg, 0x400E1040U) /*  (PIOB) Interrupt Enable Register */
03919 #define REG_PIOB_IDR       REG_ACCESS(WoReg, 0x400E1044U) /*  (PIOB) Interrupt Disable Register */
03920 #define REG_PIOB_IMR       REG_ACCESS(RoReg, 0x400E1048U) /*  (PIOB) Interrupt Mask Register */
03921 #define REG_PIOB_ISR       REG_ACCESS(RoReg, 0x400E104CU) /*  (PIOB) Interrupt Status Register */
03922 #define REG_PIOB_MDER      REG_ACCESS(WoReg, 0x400E1050U) /*  (PIOB) Multi-driver Enable Register */
03923 #define REG_PIOB_MDDR      REG_ACCESS(WoReg, 0x400E1054U) /*  (PIOB) Multi-driver Disable Register */
03924 #define REG_PIOB_MDSR      REG_ACCESS(RoReg, 0x400E1058U) /*  (PIOB) Multi-driver Status Register */
03925 #define REG_PIOB_PUDR      REG_ACCESS(WoReg, 0x400E1060U) /*  (PIOB) Pull-up Disable Register */
03926 #define REG_PIOB_PUER      REG_ACCESS(WoReg, 0x400E1064U) /*  (PIOB) Pull-up Enable Register */
03927 #define REG_PIOB_PUSR      REG_ACCESS(RoReg, 0x400E1068U) /*  (PIOB) Pad Pull-up Status Register */
03928 #define REG_PIOB_ABCDSR    REG_ACCESS(RwReg, 0x400E1070U) /*  (PIOB) Peripheral Select Register */
03929 #define REG_PIOB_IFSCDR    REG_ACCESS(WoReg, 0x400E1080U) /*  (PIOB) Input Filter Slow Clock Disable Register */
03930 #define REG_PIOB_IFSCER    REG_ACCESS(WoReg, 0x400E1084U) /*  (PIOB) Input Filter Slow Clock Enable Register */
03931 #define REG_PIOB_IFSCSR    REG_ACCESS(RoReg, 0x400E1088U) /*  (PIOB) Input Filter Slow Clock Status Register */
03932 #define REG_PIOB_SCDR      REG_ACCESS(RwReg, 0x400E108CU) /*  (PIOB) Slow Clock Divider Debouncing Register */
03933 #define REG_PIOB_PPDDR     REG_ACCESS(WoReg, 0x400E1090U) /*  (PIOB) Pad Pull-down Disable Register */
03934 #define REG_PIOB_PPDER     REG_ACCESS(WoReg, 0x400E1094U) /*  (PIOB) Pad Pull-down Enable Register */
03935 #define REG_PIOB_PPDSR     REG_ACCESS(RoReg, 0x400E1098U) /*  (PIOB) Pad Pull-down Status Register */
03936 #define REG_PIOB_OWER      REG_ACCESS(WoReg, 0x400E10A0U) /*  (PIOB) Output Write Enable */
03937 #define REG_PIOB_OWDR      REG_ACCESS(WoReg, 0x400E10A4U) /*  (PIOB) Output Write Disable */
03938 #define REG_PIOB_OWSR      REG_ACCESS(RoReg, 0x400E10A8U) /*  (PIOB) Output Write Status Register */
03939 #define REG_PIOB_AIMER     REG_ACCESS(WoReg, 0x400E10B0U) /*  (PIOB) Additional Interrupt Modes Enable Register */
03940 #define REG_PIOB_AIMDR     REG_ACCESS(WoReg, 0x400E10B4U) /*  (PIOB) Additional Interrupt Modes Disables Register */
03941 #define REG_PIOB_AIMMR     REG_ACCESS(RoReg, 0x400E10B8U) /*  (PIOB) Additional Interrupt Modes Mask Register */
03942 #define REG_PIOB_ESR       REG_ACCESS(WoReg, 0x400E10C0U) /*  (PIOB) Edge Select Register */
03943 #define REG_PIOB_LSR       REG_ACCESS(WoReg, 0x400E10C4U) /*  (PIOB) Level Select Register */
03944 #define REG_PIOB_ELSR      REG_ACCESS(RoReg, 0x400E10C8U) /*  (PIOB) Edge/Level Status Register */
03945 #define REG_PIOB_FELLSR    REG_ACCESS(WoReg, 0x400E10D0U) /*  (PIOB) Falling Edge/Low Level Select Register */
03946 #define REG_PIOB_REHLSR    REG_ACCESS(WoReg, 0x400E10D4U) /*  (PIOB) Rising Edge/ High Level Select Register */
03947 #define REG_PIOB_FRLHSR    REG_ACCESS(RoReg, 0x400E10D8U) /*  (PIOB) Fall/Rise - Low/High Status Register */
03948 #define REG_PIOB_LOCKSR    REG_ACCESS(RoReg, 0x400E10E0U) /*  (PIOB) Lock Status */
03949 #define REG_PIOB_WPMR      REG_ACCESS(RwReg, 0x400E10E4U) /*  (PIOB) Write Protect Mode Register */
03950 #define REG_PIOB_WPSR      REG_ACCESS(RoReg, 0x400E10E8U) /*  (PIOB) Write Protect Status Register */
03951 #define REG_PIOB_SCHMITT   REG_ACCESS(RwReg, 0x400E1100U) /*  (PIOB) Schmitt Trigger Register */
03952 /* ========== Register definition for PIOC peripheral ========== */
03953 #define REG_PIOC_PER       REG_ACCESS(WoReg, 0x400E1200U) /*  (PIOC) PIO Enable Register */
03954 #define REG_PIOC_PDR       REG_ACCESS(WoReg, 0x400E1204U) /*  (PIOC) PIO Disable Register */
03955 #define REG_PIOC_PSR       REG_ACCESS(RoReg, 0x400E1208U) /*  (PIOC) PIO Status Register */
03956 #define REG_PIOC_OER       REG_ACCESS(WoReg, 0x400E1210U) /*  (PIOC) Output Enable Register */
03957 #define REG_PIOC_ODR       REG_ACCESS(WoReg, 0x400E1214U) /*  (PIOC) Output Disable Register */
03958 #define REG_PIOC_OSR       REG_ACCESS(RoReg, 0x400E1218U) /*  (PIOC) Output Status Register */
03959 #define REG_PIOC_IFER      REG_ACCESS(WoReg, 0x400E1220U) /*  (PIOC) Glitch Input Filter Enable Register */
03960 #define REG_PIOC_IFDR      REG_ACCESS(WoReg, 0x400E1224U) /*  (PIOC) Glitch Input Filter Disable Register */
03961 #define REG_PIOC_IFSR      REG_ACCESS(RoReg, 0x400E1228U) /*  (PIOC) Glitch Input Filter Status Register */
03962 #define REG_PIOC_SODR      REG_ACCESS(WoReg, 0x400E1230U) /*  (PIOC) Set Output Data Register */
03963 #define REG_PIOC_CODR      REG_ACCESS(WoReg, 0x400E1234U) /*  (PIOC) Clear Output Data Register */
03964 #define REG_PIOC_ODSR      REG_ACCESS(RwReg, 0x400E1238U) /*  (PIOC) Output Data Status Register */
03965 #define REG_PIOC_PDSR      REG_ACCESS(RoReg, 0x400E123CU) /*  (PIOC) Pin Data Status Register */
03966 #define REG_PIOC_IER       REG_ACCESS(WoReg, 0x400E1240U) /*  (PIOC) Interrupt Enable Register */
03967 #define REG_PIOC_IDR       REG_ACCESS(WoReg, 0x400E1244U) /*  (PIOC) Interrupt Disable Register */
03968 #define REG_PIOC_IMR       REG_ACCESS(RoReg, 0x400E1248U) /*  (PIOC) Interrupt Mask Register */
03969 #define REG_PIOC_ISR       REG_ACCESS(RoReg, 0x400E124CU) /*  (PIOC) Interrupt Status Register */
03970 #define REG_PIOC_MDER      REG_ACCESS(WoReg, 0x400E1250U) /*  (PIOC) Multi-driver Enable Register */
03971 #define REG_PIOC_MDDR      REG_ACCESS(WoReg, 0x400E1254U) /*  (PIOC) Multi-driver Disable Register */
03972 #define REG_PIOC_MDSR      REG_ACCESS(RoReg, 0x400E1258U) /*  (PIOC) Multi-driver Status Register */
03973 #define REG_PIOC_PUDR      REG_ACCESS(WoReg, 0x400E1260U) /*  (PIOC) Pull-up Disable Register */
03974 #define REG_PIOC_PUER      REG_ACCESS(WoReg, 0x400E1264U) /*  (PIOC) Pull-up Enable Register */
03975 #define REG_PIOC_PUSR      REG_ACCESS(RoReg, 0x400E1268U) /*  (PIOC) Pad Pull-up Status Register */
03976 #define REG_PIOC_ABCDSR    REG_ACCESS(RwReg, 0x400E1270U) /*  (PIOC) Peripheral Select Register */
03977 #define REG_PIOC_IFSCDR    REG_ACCESS(WoReg, 0x400E1280U) /*  (PIOC) Input Filter Slow Clock Disable Register */
03978 #define REG_PIOC_IFSCER    REG_ACCESS(WoReg, 0x400E1284U) /*  (PIOC) Input Filter Slow Clock Enable Register */
03979 #define REG_PIOC_IFSCSR    REG_ACCESS(RoReg, 0x400E1288U) /*  (PIOC) Input Filter Slow Clock Status Register */
03980 #define REG_PIOC_SCDR      REG_ACCESS(RwReg, 0x400E128CU) /*  (PIOC) Slow Clock Divider Debouncing Register */
03981 #define REG_PIOC_PPDDR     REG_ACCESS(WoReg, 0x400E1290U) /*  (PIOC) Pad Pull-down Disable Register */
03982 #define REG_PIOC_PPDER     REG_ACCESS(WoReg, 0x400E1294U) /*  (PIOC) Pad Pull-down Enable Register */
03983 #define REG_PIOC_PPDSR     REG_ACCESS(RoReg, 0x400E1298U) /*  (PIOC) Pad Pull-down Status Register */
03984 #define REG_PIOC_OWER      REG_ACCESS(WoReg, 0x400E12A0U) /*  (PIOC) Output Write Enable */
03985 #define REG_PIOC_OWDR      REG_ACCESS(WoReg, 0x400E12A4U) /*  (PIOC) Output Write Disable */
03986 #define REG_PIOC_OWSR      REG_ACCESS(RoReg, 0x400E12A8U) /*  (PIOC) Output Write Status Register */
03987 #define REG_PIOC_AIMER     REG_ACCESS(WoReg, 0x400E12B0U) /*  (PIOC) Additional Interrupt Modes Enable Register */
03988 #define REG_PIOC_AIMDR     REG_ACCESS(WoReg, 0x400E12B4U) /*  (PIOC) Additional Interrupt Modes Disables Register */
03989 #define REG_PIOC_AIMMR     REG_ACCESS(RoReg, 0x400E12B8U) /*  (PIOC) Additional Interrupt Modes Mask Register */
03990 #define REG_PIOC_ESR       REG_ACCESS(WoReg, 0x400E12C0U) /*  (PIOC) Edge Select Register */
03991 #define REG_PIOC_LSR       REG_ACCESS(WoReg, 0x400E12C4U) /*  (PIOC) Level Select Register */
03992 #define REG_PIOC_ELSR      REG_ACCESS(RoReg, 0x400E12C8U) /*  (PIOC) Edge/Level Status Register */
03993 #define REG_PIOC_FELLSR    REG_ACCESS(WoReg, 0x400E12D0U) /*  (PIOC) Falling Edge/Low Level Select Register */
03994 #define REG_PIOC_REHLSR    REG_ACCESS(WoReg, 0x400E12D4U) /*  (PIOC) Rising Edge/ High Level Select Register */
03995 #define REG_PIOC_FRLHSR    REG_ACCESS(RoReg, 0x400E12D8U) /*  (PIOC) Fall/Rise - Low/High Status Register */
03996 #define REG_PIOC_LOCKSR    REG_ACCESS(RoReg, 0x400E12E0U) /*  (PIOC) Lock Status */
03997 #define REG_PIOC_WPMR      REG_ACCESS(RwReg, 0x400E12E4U) /*  (PIOC) Write Protect Mode Register */
03998 #define REG_PIOC_WPSR      REG_ACCESS(RoReg, 0x400E12E8U) /*  (PIOC) Write Protect Status Register */
03999 #define REG_PIOC_SCHMITT   REG_ACCESS(RwReg, 0x400E1300U) /*  (PIOC) Schmitt Trigger Register */
04000 /* ========== Register definition for RSTC peripheral ========== */
04001 #define REG_RSTC_CR        REG_ACCESS(WoReg, 0x400E1400U) /*  (RSTC) Control Register */
04002 #define REG_RSTC_SR        REG_ACCESS(RoReg, 0x400E1404U) /*  (RSTC) Status Register */
04003 #define REG_RSTC_MR        REG_ACCESS(RwReg, 0x400E1408U) /*  (RSTC) Mode Register */
04004 /* ========== Register definition for SUPC peripheral ========== */
04005 #define REG_SUPC_CR        REG_ACCESS(WoReg, 0x400E1410U) /*  (SUPC) Supply Controller Control Register */
04006 #define REG_SUPC_SMMR      REG_ACCESS(RwReg, 0x400E1414U) /*  (SUPC) Supply Controller Supply Monitor Mode Register */
04007 #define REG_SUPC_MR        REG_ACCESS(RwReg, 0x400E1418U) /*  (SUPC) Supply Controller Mode Register */
04008 #define REG_SUPC_WUMR      REG_ACCESS(RwReg, 0x400E141CU) /*  (SUPC) Supply Controller Wake Up Mode Register */
04009 #define REG_SUPC_WUIR      REG_ACCESS(RwReg, 0x400E1420U) /*  (SUPC) Supply Controller Wake Up Inputs Register */
04010 #define REG_SUPC_SR        REG_ACCESS(RoReg, 0x400E1424U) /*  (SUPC) Supply Controller Status Register */
04011 /* ========== Register definition for RTT peripheral ========== */
04012 #define REG_RTT_MR         REG_ACCESS(RwReg, 0x400E1430U) /*  (RTT) Mode Register */
04013 #define REG_RTT_AR         REG_ACCESS(RwReg, 0x400E1434U) /*  (RTT) Alarm Register */
04014 #define REG_RTT_VR         REG_ACCESS(RoReg, 0x400E1438U) /*  (RTT) Value Register */
04015 #define REG_RTT_SR         REG_ACCESS(RoReg, 0x400E143CU) /*  (RTT) Status Register */
04016 /* ========== Register definition for WDT peripheral ========== */
04017 #define REG_WDT_CR         REG_ACCESS(WoReg, 0x400E1450U) /*  (WDT) Control Register */
04018 #define REG_WDT_MR         REG_ACCESS(RwReg, 0x400E1454U) /*  (WDT) Mode Register */
04019 #define REG_WDT_SR         REG_ACCESS(RoReg, 0x400E1458U) /*  (WDT) Status Register */
04020 /* ========== Register definition for RTC peripheral ========== */
04021 #define REG_RTC_CR         REG_ACCESS(RwReg, 0x400E1460U) /*  (RTC) Control Register */
04022 #define REG_RTC_MR         REG_ACCESS(RwReg, 0x400E1464U) /*  (RTC) Mode Register */
04023 #define REG_RTC_TIMR       REG_ACCESS(RwReg, 0x400E1468U) /*  (RTC) Time Register */
04024 #define REG_RTC_CALR       REG_ACCESS(RwReg, 0x400E146CU) /*  (RTC) Calendar Register */
04025 #define REG_RTC_TIMALR     REG_ACCESS(RwReg, 0x400E1470U) /*  (RTC) Time Alarm Register */
04026 #define REG_RTC_CALALR     REG_ACCESS(RwReg, 0x400E1474U) /*  (RTC) Calendar Alarm Register */
04027 #define REG_RTC_SR         REG_ACCESS(RoReg, 0x400E1478U) /*  (RTC) Status Register */
04028 #define REG_RTC_SCCR       REG_ACCESS(WoReg, 0x400E147CU) /*  (RTC) Status Clear Command Register */
04029 #define REG_RTC_IER        REG_ACCESS(WoReg, 0x400E1480U) /*  (RTC) Interrupt Enable Register */
04030 #define REG_RTC_IDR        REG_ACCESS(WoReg, 0x400E1484U) /*  (RTC) Interrupt Disable Register */
04031 #define REG_RTC_IMR        REG_ACCESS(RoReg, 0x400E1488U) /*  (RTC) Interrupt Mask Register */
04032 #define REG_RTC_VER        REG_ACCESS(RoReg, 0x400E148CU) /*  (RTC) Valid Entry Register */
04033 #define REG_RTC_WPMR       REG_ACCESS(RwReg, 0x400E1544U) /*  (RTC) Write Protect Mode Register */
04034 /* ========== Register definition for GPBR peripheral ========== */
04035 #define REG_GPBR_GPBR0     REG_ACCESS(RwReg, 0x400E1490U) /*  (GPBR) General Purpose Backup Register 0 */
04036 #define REG_GPBR_GPBR1     REG_ACCESS(RwReg, 0x400E1494U) /*  (GPBR) General Purpose Backup Register 1 */
04037 #define REG_GPBR_GPBR2     REG_ACCESS(RwReg, 0x400E1498U) /*  (GPBR) General Purpose Backup Register 2 */
04038 #define REG_GPBR_GPBR3     REG_ACCESS(RwReg, 0x400E149CU) /*  (GPBR) General Purpose Backup Register 3 */
04039 #define REG_GPBR_GPBR4     REG_ACCESS(RwReg, 0x400E14A0U) /*  (GPBR) General Purpose Backup Register 4 */
04040 #define REG_GPBR_GPBR5     REG_ACCESS(RwReg, 0x400E14A4U) /*  (GPBR) General Purpose Backup Register 5 */
04041 #define REG_GPBR_GPBR6     REG_ACCESS(RwReg, 0x400E14A8U) /*  (GPBR) General Purpose Backup Register 6 */
04042 #define REG_GPBR_GPBR7     REG_ACCESS(RwReg, 0x400E14ACU) /*  (GPBR) General Purpose Backup Register 7 */
04043
04044 /* ************************************************************************** */
04045 /*   PERIPHERAL ID DEFINITIONS FOR SAM3N */
04046 /* ************************************************************************** */
04047
04048 #define ID_SUPC   ( 0) /*  Supply Controller (SUPC) */
04049 #define ID_RSTC   ( 1) /*  Reset Controller (RSTC) */
04050 #define ID_RTC    ( 2) /*  Real Time Clock (RTC) */
04051 #define ID_RTT    ( 3) /*  Real Time Timer (RTT) */
04052 #define ID_WDT    ( 4) /*  Watchdog Timer (WDT) */
04053 #define ID_PMC    ( 5) /*  Power Management Controller (PMC) */
04054 #define ID_EFC    ( 6) /*  Enhanced Flash Controller (EFC) */
04055 #define ID_UART0  ( 8) /*  UART 0 (UART0) */
04056 #define ID_UART1  ( 9) /*  UART 1 (UART1) */
04057 #define ID_PIOA   (11) /*  Parallel I/O Controller A (PIOA) */
04058 #define ID_PIOB   (12) /*  Parallel I/O Controller B (PIOB) */
04059 #define ID_PIOC   (13) /*  Parallel I/O Controller C (PIOC) */
04060 #define ID_USART0 (14) /*  USART 0 (USART0) */
04061 #define ID_USART1 (15) /*  USART 1 (USART1) */
04062 #define ID_TWI0   (19) /*  Two Wire Interface 0 (TWI0) */
04063 #define ID_TWI1   (20) /*  Two Wire Interface 1 (TWI1) */
04064 #define ID_SPI    (21) /*  Serial Peripheral Interface (SPI) */
04065 #define ID_TC0    (23) /*  Timer/Counter 0 (TC0) */
04066 #define ID_TC1    (24) /*  Timer/Counter 1 (TC1) */
04067 #define ID_TC2    (25) /*  Timer/Counter 2 (TC2) */
04068 #define ID_TC3    (26) /*  Timer/Counter 3 (TC3) */
04069 #define ID_TC4    (27) /*  Timer/Counter 4 (TC4) */
04070 #define ID_TC5    (28) /*  Timer/Counter 5 (TC5) */
04071 #define ID_ADC    (29) /*  Analog To Digital Converter (ADC) */
04072 #define ID_DACC   (30) /*  Digital To Analog Converter (DACC) */
04073 #define ID_PWM    (31) /*  Pulse Width Modulation (PWM) */
04074
04075 /* ************************************************************************** */
04076 /*   BASE ADDRESS DEFINITIONS FOR SAM3N */
04077 /* ************************************************************************** */
04078
04079 #define SPI        CAST(Spi       , 0x40008000U) /*  (SPI       ) Base Address */
04080 #define PDC_SPI    CAST(Pdc       , 0x40008100U) /*  (PDC_SPI   ) Base Address */
04081 #define TC0        CAST(Tc        , 0x40010000U) /*  (TC0       ) Base Address */
04082 #define TC1        CAST(Tc        , 0x40014000U) /*  (TC1       ) Base Address */
04083 #define TWI0       CAST(Twi       , 0x40018000U) /*  (TWI0      ) Base Address */
04084 #define PDC_TWI0   CAST(Pdc       , 0x40018100U) /*  (PDC_TWI0  ) Base Address */
04085 #define TWI1       CAST(Twi       , 0x4001C000U) /*  (TWI1      ) Base Address */
04086 #define PWM        CAST(Pwm       , 0x40020000U) /*  (PWM       ) Base Address */
04087 #define USART0     CAST(Usart     , 0x40024000U) /*  (USART0    ) Base Address */
04088 #define PDC_USART0 CAST(Pdc       , 0x40024100U) /*  (PDC_USART0) Base Address */
04089 #define USART1     CAST(Usart     , 0x40028000U) /*  (USART1    ) Base Address */
04090 #define ADC        CAST(Adc       , 0x40038000U) /*  (ADC       ) Base Address */
04091 #define PDC_ADC    CAST(Pdc       , 0x40038100U) /*  (PDC_ADC   ) Base Address */
04092 #define DACC       CAST(Dacc      , 0x4003C000U) /*  (DACC      ) Base Address */
04093 #define PDC_DACC   CAST(Pdc       , 0x4003C100U) /*  (PDC_DACC  ) Base Address */
04094 #define MATRIX     CAST(Matrix    , 0x400E0200U) /*  (MATRIX    ) Base Address */
04095 #define PMC        CAST(Pmc       , 0x400E0400U) /*  (PMC       ) Base Address */
04096 #define UART0      CAST(Uart      , 0x400E0600U) /*  (UART0     ) Base Address */
04097 #define PDC_UART0  CAST(Pdc       , 0x400E0700U) /*  (PDC_UART0 ) Base Address */
04098 #define CHIPID     CAST(Chipid    , 0x400E0740U) /*  (CHIPID    ) Base Address */
04099 #define UART1      CAST(Uart      , 0x400E0800U) /*  (UART1     ) Base Address */
04100 #define EFC        CAST(Efc       , 0x400E0A00U) /*  (EFC       ) Base Address */
04101 #define PIOA       CAST(Pio       , 0x400E0E00U) /*  (PIOA      ) Base Address */
04102 #define PIOB       CAST(Pio       , 0x400E1000U) /*  (PIOB      ) Base Address */
04103 #define PIOC       CAST(Pio       , 0x400E1200U) /*  (PIOC      ) Base Address */
04104 #define RSTC       CAST(Rstc      , 0x400E1400U) /*  (RSTC      ) Base Address */
04105 #define SUPC       CAST(Supc      , 0x400E1410U) /*  (SUPC      ) Base Address */
04106 #define RTT        CAST(Rtt       , 0x400E1430U) /*  (RTT       ) Base Address */
04107 #define WDT        CAST(Wdt       , 0x400E1450U) /*  (WDT       ) Base Address */
04108 #define RTC        CAST(Rtc       , 0x400E1460U) /*  (RTC       ) Base Address */
04109 #define GPBR       CAST(Gpbr      , 0x400E1490U) /*  (GPBR      ) Base Address */
04110
04111 /* ************************************************************************** */
04112 /*   PIO DEFINITIONS FOR SAM3N */
04113 /* ************************************************************************** */
04114
04115 #define PIO_PA0          (1u << 0) /*  Pin Controlled by PA0 */
04116 #define PIO_PA1          (1u << 1) /*  Pin Controlled by PA1 */
04117 #define PIO_PA2          (1u << 2) /*  Pin Controlled by PA2 */
04118 #define PIO_PA3          (1u << 3) /*  Pin Controlled by PA3 */
04119 #define PIO_PA4          (1u << 4) /*  Pin Controlled by PA4 */
04120 #define PIO_PA5          (1u << 5) /*  Pin Controlled by PA5 */
04121 #define PIO_PA6          (1u << 6) /*  Pin Controlled by PA6 */
04122 #define PIO_PA7          (1u << 7) /*  Pin Controlled by PA7 */
04123 #define PIO_PA8          (1u << 8) /*  Pin Controlled by PA8 */
04124 #define PIO_PA9          (1u << 9) /*  Pin Controlled by PA9 */
04125 #define PIO_PA10         (1u << 10) /*  Pin Controlled by PA10 */
04126 #define PIO_PA11         (1u << 11) /*  Pin Controlled by PA11 */
04127 #define PIO_PA12         (1u << 12) /*  Pin Controlled by PA12 */
04128 #define PIO_PA13         (1u << 13) /*  Pin Controlled by PA13 */
04129 #define PIO_PA14         (1u << 14) /*  Pin Controlled by PA14 */
04130 #define PIO_PA15         (1u << 15) /*  Pin Controlled by PA15 */
04131 #define PIO_PA16         (1u << 16) /*  Pin Controlled by PA16 */
04132 #define PIO_PA17         (1u << 17) /*  Pin Controlled by PA17 */
04133 #define PIO_PA18         (1u << 18) /*  Pin Controlled by PA18 */
04134 #define PIO_PA19         (1u << 19) /*  Pin Controlled by PA19 */
04135 #define PIO_PA20         (1u << 20) /*  Pin Controlled by PA20 */
04136 #define PIO_PA21         (1u << 21) /*  Pin Controlled by PA21 */
04137 #define PIO_PA22         (1u << 22) /*  Pin Controlled by PA22 */
04138 #define PIO_PA23         (1u << 23) /*  Pin Controlled by PA23 */
04139 #define PIO_PA24         (1u << 24) /*  Pin Controlled by PA24 */
04140 #define PIO_PA25         (1u << 25) /*  Pin Controlled by PA25 */
04141 #define PIO_PA26         (1u << 26) /*  Pin Controlled by PA26 */
04142 #define PIO_PA27         (1u << 27) /*  Pin Controlled by PA27 */
04143 #define PIO_PA28         (1u << 28) /*  Pin Controlled by PA28 */
04144 #define PIO_PA29         (1u << 29) /*  Pin Controlled by PA29 */
04145 #define PIO_PA30         (1u << 30) /*  Pin Controlled by PA30 */
04146 #define PIO_PA31         (1u << 31) /*  Pin Controlled by PA31 */
04147 #define PIO_PB0          (1u << 0) /*  Pin Controlled by PB0 */
04148 #define PIO_PB1          (1u << 1) /*  Pin Controlled by PB1 */
04149 #define PIO_PB2          (1u << 2) /*  Pin Controlled by PB2 */
04150 #define PIO_PB3          (1u << 3) /*  Pin Controlled by PB3 */
04151 #define PIO_PB4          (1u << 4) /*  Pin Controlled by PB4 */
04152 #define PIO_PB5          (1u << 5) /*  Pin Controlled by PB5 */
04153 #define PIO_PB6          (1u << 6) /*  Pin Controlled by PB6 */
04154 #define PIO_PB7          (1u << 7) /*  Pin Controlled by PB7 */
04155 #define PIO_PB8          (1u << 8) /*  Pin Controlled by PB8 */
04156 #define PIO_PB9          (1u << 9) /*  Pin Controlled by PB9 */
04157 #define PIO_PB10         (1u << 10) /*  Pin Controlled by PB10 */
04158 #define PIO_PB11         (1u << 11) /*  Pin Controlled by PB11 */
04159 #define PIO_PB12         (1u << 12) /*  Pin Controlled by PB12 */
04160 #define PIO_PB13         (1u << 13) /*  Pin Controlled by PB13 */
04161 #define PIO_PB14         (1u << 14) /*  Pin Controlled by PB14 */
04162 #define PIO_PC0          (1u << 0) /*  Pin Controlled by PC0 */
04163 #define PIO_PC1          (1u << 1) /*  Pin Controlled by PC1 */
04164 #define PIO_PC2          (1u << 2) /*  Pin Controlled by PC2 */
04165 #define PIO_PC3          (1u << 3) /*  Pin Controlled by PC3 */
04166 #define PIO_PC4          (1u << 4) /*  Pin Controlled by PC4 */
04167 #define PIO_PC5          (1u << 5) /*  Pin Controlled by PC5 */
04168 #define PIO_PC6          (1u << 6) /*  Pin Controlled by PC6 */
04169 #define PIO_PC7          (1u << 7) /*  Pin Controlled by PC7 */
04170 #define PIO_PC8          (1u << 8) /*  Pin Controlled by PC8 */
04171 #define PIO_PC9          (1u << 9) /*  Pin Controlled by PC9 */
04172 #define PIO_PC10         (1u << 10) /*  Pin Controlled by PC10 */
04173 #define PIO_PC11         (1u << 11) /*  Pin Controlled by PC11 */
04174 #define PIO_PC12         (1u << 12) /*  Pin Controlled by PC12 */
04175 #define PIO_PC13         (1u << 13) /*  Pin Controlled by PC13 */
04176 #define PIO_PC14         (1u << 14) /*  Pin Controlled by PC14 */
04177 #define PIO_PC15         (1u << 15) /*  Pin Controlled by PC15 */
04178 #define PIO_PC16         (1u << 16) /*  Pin Controlled by PC16 */
04179 #define PIO_PC17         (1u << 17) /*  Pin Controlled by PC17 */
04180 #define PIO_PC18         (1u << 18) /*  Pin Controlled by PC18 */
04181 #define PIO_PC19         (1u << 19) /*  Pin Controlled by PC19 */
04182 #define PIO_PC20         (1u << 20) /*  Pin Controlled by PC20 */
04183 #define PIO_PC21         (1u << 21) /*  Pin Controlled by PC21 */
04184 #define PIO_PC22         (1u << 22) /*  Pin Controlled by PC22 */
04185 #define PIO_PC23         (1u << 23) /*  Pin Controlled by PC23 */
04186 #define PIO_PC24         (1u << 24) /*  Pin Controlled by PC24 */
04187 #define PIO_PC25         (1u << 25) /*  Pin Controlled by PC25 */
04188 #define PIO_PC26         (1u << 26) /*  Pin Controlled by PC26 */
04189 #define PIO_PC27         (1u << 27) /*  Pin Controlled by PC27 */
04190 #define PIO_PC28         (1u << 28) /*  Pin Controlled by PC28 */
04191 #define PIO_PC29         (1u << 29) /*  Pin Controlled by PC29 */
04192 #define PIO_PC30         (1u << 30) /*  Pin Controlled by PC30 */
04193 #define PIO_PC31         (1u << 31) /*  Pin Controlled by PC31 */
04194 /* ========== Pio definition for SPI peripheral ========== */
04195 #define PIO_PA12A_MISO       (1u << 12)  /*  Spi signal: MISO */
04196 #define PIO_PA13A_MOSI       (1u << 13)  /*  Spi signal: MOSI */
04197 #define PIO_PA11A_NPCS0      (1u << 11)  /*  Spi signal: NPCS0 */
04198 #define PIO_PA9B_NPCS1       (1u << 9)   /*  Spi signal: NPCS1 */
04199 #define PIO_PA31A_NPCS1      (1u << 31)  /*  Spi signal: NPCS1 */
04200 #define PIO_PB14A_NPCS1      (1u << 14)  /*  Spi signal: NPCS1 */
04201 #define PIO_PC4B_NPCS1       (1u << 4)   /*  Spi signal: NPCS1 */
04202 #define PIO_PA10B_NPCS2      (1u << 10)  /*  Spi signal: NPCS2 */
04203 #define PIO_PA30B_NPCS2      (1u << 30)  /*  Spi signal: NPCS2 */
04204 #define PIO_PB2B_NPCS2       (1u << 2)   /*  Spi signal: NPCS2 */
04205 #define PIO_PC7B_NPCS2       (1u << 7)   /*  Spi signal: NPCS2 */
04206 #define PIO_PA3B_NPCS3       (1u << 3)   /*  Spi signal: NPCS3 */
04207 #define PIO_PA5B_NPCS3       (1u << 5)   /*  Spi signal: NPCS3 */
04208 #define PIO_PA22B_NPCS3      (1u << 22)  /*  Spi signal: NPCS3 */
04209 #define PIO_PA14A_SPCK       (1u << 14)  /*  Spi signal: SPCK */
04210 /* ========== Pio definition for TC0 peripheral ========== */
04211 #define PIO_PA4B_TCLK0       (1u << 4)   /*  Tc0 signal: TCLK0 */
04212 #define PIO_PA28B_TCLK1      (1u << 28)  /*  Tc0 signal: TCLK1 */
04213 #define PIO_PA29B_TCLK2      (1u << 29)  /*  Tc0 signal: TCLK2 */
04214 #define PIO_PA0B_TIOA0       (1u << 0)   /*  Tc0 signal: TIOA0 */
04215 #define PIO_PA15B_TIOA1      (1u << 15)  /*  Tc0 signal: TIOA1 */
04216 #define PIO_PA26B_TIOA2      (1u << 26)  /*  Tc0 signal: TIOA2 */
04217 #define PIO_PA1B_TIOB0       (1u << 1)   /*  Tc0 signal: TIOB0 */
04218 #define PIO_PA16B_TIOB1      (1u << 16)  /*  Tc0 signal: TIOB1 */
04219 #define PIO_PA27B_TIOB2      (1u << 27)  /*  Tc0 signal: TIOB2 */
04220 /* ========== Pio definition for TC1 peripheral ========== */
04221 #define PIO_PC25B_TCLK3      (1u << 25)  /*  Tc1 signal: TCLK3 */
04222 #define PIO_PC28B_TCLK4      (1u << 28)  /*  Tc1 signal: TCLK4 */
04223 #define PIO_PC31B_TCLK5      (1u << 31)  /*  Tc1 signal: TCLK5 */
04224 #define PIO_PC23B_TIOA3      (1u << 23)  /*  Tc1 signal: TIOA3 */
04225 #define PIO_PC26B_TIOA4      (1u << 26)  /*  Tc1 signal: TIOA4 */
04226 #define PIO_PC29B_TIOA5      (1u << 29)  /*  Tc1 signal: TIOA5 */
04227 #define PIO_PC24B_TIOB3      (1u << 24)  /*  Tc1 signal: TIOB3 */
04228 #define PIO_PC27B_TIOB4      (1u << 27)  /*  Tc1 signal: TIOB4 */
04229 #define PIO_PC30B_TIOB5      (1u << 30)  /*  Tc1 signal: TIOB5 */
04230 /* ========== Pio definition for TWI0 peripheral ========== */
04231 #define PIO_PA4A_TWCK0       (1u << 4)   /*  Twi0 signal: TWCK0 */
04232 #define PIO_PA3A_TWD0        (1u << 3)   /*  Twi0 signal: TWD0 */
04233 /* ========== Pio definition for TWI1 peripheral ========== */
04234 #define PIO_PB5A_TWCK1       (1u << 5)   /*  Twi1 signal: TWCK1 */
04235 #define PIO_PB4A_TWD1        (1u << 4)   /*  Twi1 signal: TWD1 */
04236 /* ========== Pio definition for PWM peripheral ========== */
04237 #define PIO_PA0A_PWM0        (1u << 0)   /*  Pwm signal: PWM0 */
04238 #define PIO_PA11B_PWM0       (1u << 11)  /*  Pwm signal: PWM0 */
04239 #define PIO_PA23B_PWM0       (1u << 23)  /*  Pwm signal: PWM0 */
04240 #define PIO_PB0A_PWM0        (1u << 0)   /*  Pwm signal: PWM0 */
04241 #define PIO_PC8B_PWM0        (1u << 8)   /*  Pwm signal: PWM0 */
04242 #define PIO_PC18B_PWM0       (1u << 18)  /*  Pwm signal: PWM0 */
04243 #define PIO_PC22B_PWM0       (1u << 22)  /*  Pwm signal: PWM0 */
04244 #define PIO_PA1A_PWM1        (1u << 1)   /*  Pwm signal: PWM1 */
04245 #define PIO_PA12B_PWM1       (1u << 12)  /*  Pwm signal: PWM1 */
04246 #define PIO_PA24B_PWM1       (1u << 24)  /*  Pwm signal: PWM1 */
04247 #define PIO_PB1A_PWM1        (1u << 1)   /*  Pwm signal: PWM1 */
04248 #define PIO_PC9B_PWM1        (1u << 9)   /*  Pwm signal: PWM1 */
04249 #define PIO_PC19B_PWM1       (1u << 19)  /*  Pwm signal: PWM1 */
04250 #define PIO_PA2A_PWM2        (1u << 2)   /*  Pwm signal: PWM2 */
04251 #define PIO_PA13B_PWM2       (1u << 13)  /*  Pwm signal: PWM2 */
04252 #define PIO_PA25B_PWM2       (1u << 25)  /*  Pwm signal: PWM2 */
04253 #define PIO_PB4B_PWM2        (1u << 4)   /*  Pwm signal: PWM2 */
04254 #define PIO_PC10B_PWM2       (1u << 10)  /*  Pwm signal: PWM2 */
04255 #define PIO_PC20B_PWM2       (1u << 20)  /*  Pwm signal: PWM2 */
04256 #define PIO_PA7B_PWM3        (1u << 7)   /*  Pwm signal: PWM3 */
04257 #define PIO_PA14B_PWM3       (1u << 14)  /*  Pwm signal: PWM3 */
04258 #define PIO_PB14B_PWM3       (1u << 14)  /*  Pwm signal: PWM3 */
04259 #define PIO_PC11B_PWM3       (1u << 11)  /*  Pwm signal: PWM3 */
04260 #define PIO_PC21B_PWM3       (1u << 21)  /*  Pwm signal: PWM3 */
04261 /* ========== Pio definition for USART0 peripheral ========== */
04262 #define PIO_PA8A_CTS0        (1u << 8)   /*  Usart0 signal: CTS0 */
04263 #define PIO_PA7A_RTS0        (1u << 7)   /*  Usart0 signal: RTS0 */
04264 #define PIO_PA5A_RXD0        (1u << 5)   /*  Usart0 signal: RXD0 */
04265 #define PIO_PA2B_SCK0        (1u << 2)   /*  Usart0 signal: SCK0 */
04266 #define PIO_PA6A_TXD0        (1u << 6)   /*  Usart0 signal: TXD0 */
04267 /* ========== Pio definition for USART1 peripheral ========== */
04268 #define PIO_PA25A_CTS1       (1u << 25)  /*  Usart1 signal: CTS1 */
04269 #define PIO_PA24A_RTS1       (1u << 24)  /*  Usart1 signal: RTS1 */
04270 #define PIO_PA21A_RXD1       (1u << 21)  /*  Usart1 signal: RXD1 */
04271 #define PIO_PA23A_SCK1       (1u << 23)  /*  Usart1 signal: SCK1 */
04272 #define PIO_PA22A_TXD1       (1u << 22)  /*  Usart1 signal: TXD1 */
04273 /* ========== Pio definition for ADC peripheral ========== */
04274 #define PIO_PA17X1_AD0       (1u << 17)  /*  Adc signal: AD0 */
04275 #define PIO_PA18X1_AD1       (1u << 18)  /*  Adc signal: AD1 */
04276 #define PIO_PC13X1_AD10      (1u << 13)  /*  Adc signal: AD10 */
04277 #define PIO_PC15X1_AD11      (1u << 15)  /*  Adc signal: AD11 */
04278 #define PIO_PC12X1_AD12      (1u << 12)  /*  Adc signal: AD12 */
04279 #define PIO_PC29X1_AD13      (1u << 29)  /*  Adc signal: AD13 */
04280 #define PIO_PC30X1_AD14      (1u << 30)  /*  Adc signal: AD14 */
04281 #define PIO_PC31X1_AD15      (1u << 31)  /*  Adc signal: AD15 */
04282 #define PIO_PA19X1_AD2_WKUP9 (1u << 19)  /*  Adc signal: AD2/WKUP9 */
04283 #define PIO_PA20X1_AD3_WKUP10 (1u << 20) /*  Adc signal: AD3/WKUP10 */
04284 #define PIO_PB0X1_AD4        (1u << 0)   /*  Adc signal: AD4 */
04285 #define PIO_PB1X1_AD5        (1u << 1)   /*  Adc signal: AD5 */
04286 #define PIO_PB2X1_AD6_WKUP12 (1u << 2)   /*  Adc signal: AD6/WKUP12 */
04287 #define PIO_PB3X1_AD7        (1u << 3)   /*  Adc signal: AD7 */
04288 #define PIO_PA21X1_AD8       (1u << 21)  /*  Adc signal: AD8 */
04289 #define PIO_PA22X1_AD9       (1u << 22)  /*  Adc signal: AD9 */
04290 #define PIO_PA8B_ADTRG       (1u << 8)   /*  Adc signal: ADTRG */
04291 /* ========== Pio definition for DACC peripheral ========== */
04292 #define PIO_PB13X1_DAC0      (1u << 13)  /*  Dacc signal: DAC0 */
04293 /* ========== Pio definition for PMC peripheral ========== */
04294 #define PIO_PA6B_PCK0        (1u << 6)   /*  Pmc signal: PCK0 */
04295 #define PIO_PB13B_PCK0       (1u << 13)  /*  Pmc signal: PCK0 */
04296 #define PIO_PC16B_PCK0       (1u << 16)  /*  Pmc signal: PCK0 */
04297 #define PIO_PA17B_PCK1       (1u << 17)  /*  Pmc signal: PCK1 */
04298 #define PIO_PA21B_PCK1       (1u << 21)  /*  Pmc signal: PCK1 */
04299 #define PIO_PC17B_PCK1       (1u << 17)  /*  Pmc signal: PCK1 */
04300 #define PIO_PA18B_PCK2       (1u << 18)  /*  Pmc signal: PCK2 */
04301 #define PIO_PA31B_PCK2       (1u << 31)  /*  Pmc signal: PCK2 */
04302 #define PIO_PB3B_PCK2        (1u << 3)   /*  Pmc signal: PCK2 */
04303 #define PIO_PC14B_PCK2       (1u << 14)  /*  Pmc signal: PCK2 */
04304 /* ========== Pio definition for UART0 peripheral ========== */
04305 #define PIO_PA9A_URXD0       (1u << 9)   /*  Uart0 signal: URXD0 */
04306 #define PIO_PA10A_UTXD0      (1u << 10)  /*  Uart0 signal: UTXD0 */
04307 /* ========== Pio definition for UART1 peripheral ========== */
04308 #define PIO_PB2A_URXD1       (1u << 2)   /*  Uart1 signal: URXD1 */
04309 #define PIO_PB3A_UTXD1       (1u << 3)   /*  Uart1 signal: UTXD1 */
04310
04311 /* ************************************************************************** */
04312 /*   MEMORY MAPPING DEFINITIONS FOR SAM3N */
04313 /* ************************************************************************** */
04314
04315 #define IFLASH_ADDR (0x00400000u) /* Internal Flash base address */
04316 #define IROM_ADDR   (0x00800000u) /* Internal ROM base address */
04317 #define IRAM_ADDR   (0x20000000u) /* Internal RAM base address */
04318
04319 #if CPU_CM3_SAM3N1
04320 #define IFLASH_SIZE 0x10000
04321 #define IFLASH_PAGE_SIZE              (256) /* Internal FLASH 0 Page Size: 256 bytes */
04322 #define IFLASH_LOCK_REGION_SIZE     (16384) /* Internal FLASH 0 Lock Region Size: 16 Kbytes */
04323 #define IFLASH_NB_OF_PAGES            (256) /* Internal FLASH 0 Number of Pages: 256 */
04324 #define IFLASH_NB_OF_LOCK_BITS          (4) /* Internal FLASH 0 Number of Lock Bits: 4 */
04325 #define IRAM_SIZE 0x2000
04326 #elif CPU_CM3_SAM3N2
04327 #define IFLASH_SIZE 0x20000
04328 #define IFLASH_PAGE_SIZE              (256) /* Internal FLASH 0 Page Size: 256 bytes */
04329 #define IFLASH_LOCK_REGION_SIZE     (16384) /* Internal FLASH 0 Lock Region Size: 16 Kbytes */
04330 #define IFLASH_NB_OF_PAGES            (512) /* Internal FLASH 0 Number of Pages: 512 */
04331 #define IFLASH_NB_OF_LOCK_BITS          (8) /* Internal FLASH 0 Number of Lock Bits: 8 */
04332 #define IRAM_SIZE 0x4000
04333 #elif CPU_CM3_SAM3N4
04334 #define IFLASH_SIZE 0x40000
04335 #define IFLASH_PAGE_SIZE              (256) /* Internal FLASH 0 Page Size: 256 bytes */
04336 #define IFLASH_LOCK_REGION_SIZE     (16384) /* Internal FLASH 0 Lock Region Size: 16 Kbytes */
04337 #define IFLASH_NB_OF_PAGES           (1024) /* Internal FLASH 0 Number of Pages: 1024 */
04338 #define IFLASH_NB_OF_LOCK_BITS         (16) /* Internal FLASH 0 Number of Lock Bits: 16 */
04339 #define IRAM_SIZE 0x6000
04340 #else
04341   #error Library does not support the specified device.
04342 #endif
04343
04344 #ifdef __cplusplus
04345 }
04346 #endif
04347
04348
04349 #endif /* SAM3N_H */


BeRTOS: sd.c File Reference

  • drv
Data Structures
sd.c File Reference

Function library for secure digital memory. More...

#include "sd.h"
#include "hw/hw_sd.h"
#include <io/kfile.h>
#include <io/kblock.h>
#include <drv/timer.h>
#include <fs/fat.h>
#include "cfg/cfg_sd.h"
#include <cfg/log.h>
#include <cpu/power.h>
#include <string.h>

Go to the source code of this file.

Data Structures

struct CardCSD
Card Specific Data read directly from the card. More...

Detailed Description

Function library for secure digital memory.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file sd.c.


BeRTOS: sd.c Source File

  • drv
sd.c
Go to the documentation of this file.
00001
00038 #include "sd.h"
00039 #include "hw/hw_sd.h"
00040 #include <io/kfile.h>
00041 #include <io/kblock.h>
00042 #include <drv/timer.h>
00043
00044 #include <fs/fat.h>
00045
00046 #include "cfg/cfg_sd.h"
00047
00048 #define LOG_LEVEL  SD_LOG_LEVEL
00049 #define LOG_FORMAT SD_LOG_FORMAT
00050 #include <cfg/log.h>
00051 #include <cpu/power.h>
00052
00053 #include <string.h> /* memset */
00054
00059 typedef struct CardCSD
00060 {
00061     uint16_t block_len;
00062     uint32_t block_num;
00063     uint16_t capacity;
00064 } CardCSD;
00065
00066 #define SD_IN_IDLE    0x01
00067 #define SD_STARTTOKEN 0xFE
00068
00069 #define TIMEOUT_NAC   16384
00070 #define SD_DEFAULT_BLOCKLEN 512
00071
00072 #define SD_BUSY_TIMEOUT ms_to_ticks(200)
00073
00074 static bool sd_select(Sd *sd, bool state)
00075 {
00076     KFile *fd = sd->ch;
00077
00078     if (state)
00079     {
00080         SD_CS_ON();
00081
00082         ticks_t start = timer_clock();
00083         do
00084         {
00085             if (kfile_getc(fd) == 0xff)
00086                 return true;
00087
00088             cpu_relax();
00089         }
00090         while (timer_clock() - start < SD_BUSY_TIMEOUT);
00091
00092         SD_CS_OFF();
00093         LOG_ERR("sd_select timeout\n");
00094         return false;
00095     }
00096     else
00097     {
00098         kfile_putc(0xff, fd);
00099         kfile_flush(fd);
00100         SD_CS_OFF();
00101         return true;
00102     }
00103 }
00104
00105 static int16_t sd_waitR1(Sd *sd)
00106 {
00107     uint8_t datain;
00108
00109     for (int i = 0; i < TIMEOUT_NAC; i++)
00110     {
00111         datain = kfile_getc(sd->ch);
00112         if (datain != 0xff)
00113             return (int16_t)datain;
00114     }
00115     LOG_ERR("Timeout waiting R1\n");
00116     return EOF;
00117 }
00118
00119 static int16_t sd_sendCommand(Sd *sd, uint8_t cmd, uint32_t param, uint8_t crc)
00120 {
00121     KFile *fd = sd->ch;
00122     /* The 7th bit of command must be a 1 */
00123     kfile_putc(cmd | 0x40, fd);
00124
00125     /* send parameter */
00126     kfile_putc((param >> 24) & 0xFF, fd);
00127     kfile_putc((param >> 16) & 0xFF, fd);
00128     kfile_putc((param >> 8) & 0xFF, fd);
00129     kfile_putc((param) & 0xFF, fd);
00130
00131     kfile_putc(crc, fd);
00132
00133     return sd_waitR1(sd);
00134 }
00135
00136 static bool sd_getBlock(Sd *sd, void *buf, size_t len)
00137 {
00138     uint8_t token;
00139     uint16_t crc;
00140
00141     KFile *fd = sd->ch;
00142
00143     for (int i = 0; i < TIMEOUT_NAC; i++)
00144     {
00145         token = kfile_getc(fd);
00146         if (token != 0xff)
00147         {
00148             if (token == SD_STARTTOKEN)
00149             {
00150                 if (kfile_read(fd, buf, len) == len)
00151                 {
00152                     if (kfile_read(fd, &crc, sizeof(crc)) == sizeof(crc))
00153                         /* check CRC here if needed */
00154                         return true;
00155                     else
00156                         LOG_ERR("get_block error getting crc\n");
00157                 }
00158                 else
00159                     LOG_ERR("get_block len error: %d\n", (int)len);
00160             }
00161             else
00162                 LOG_ERR("get_block token error: %02X\n", token);
00163
00164             return false;
00165         }
00166     }
00167
00168     LOG_ERR("get_block timeout waiting token\n");
00169     return false;
00170 }
00171
00172 #define SD_SELECT(sd) \
00173 do \
00174 { \
00175     if (!sd_select((sd), true)) \
00176     { \
00177         LOG_ERR("%s failed, card busy\n", __func__); \
00178         return EOF; \
00179     } \
00180 } \
00181 while (0)
00182
00183 #define SD_SETBLOCKLEN 0x50
00184
00185 static int16_t sd_setBlockLen(Sd *sd, uint32_t newlen)
00186 {
00187     SD_SELECT(sd);
00188
00189     sd->r1 = sd_sendCommand(sd, SD_SETBLOCKLEN, newlen, 0);
00190
00191     sd_select(sd, false);
00192     return sd->r1;
00193 }
00194
00195 #define SD_SEND_CSD 0x49
00196
00197 static int16_t sd_getCSD(Sd *sd, CardCSD *csd)
00198 {
00199     SD_SELECT(sd);
00200
00201     int16_t r1 = sd_sendCommand(sd, SD_SEND_CSD, 0, 0);
00202
00203     if (r1)
00204     {
00205         LOG_ERR("send_csd failed: %04X\n", sd->r1);
00206         sd_select(sd, false);
00207         return r1;
00208     }
00209
00210     uint8_t buf[16];
00211     bool res = sd_getBlock(sd, buf, sizeof(buf));
00212     sd_select(sd, false);
00213
00214     if (res)
00215     {
00216         #if LOG_LEVEL >= LOG_LVL_INFO
00217             LOG_INFO("CSD: [");
00218             for (int i = 0; i < 16; i++)
00219                 kprintf("%02X ", buf[i]);
00220             kprintf("]\n");
00221         #endif
00222
00223         uint16_t mult = (1L << ((((buf[9] & 0x03) << 1) | ((buf[10] & 0x80) >> 7)) + 2));
00224         uint16_t c_size = (((uint16_t)(buf[6] & 0x03)) << 10) | (((uint16_t)buf[7]) << 2) |
00225                   (((uint16_t)(buf[8] & 0xC0)) >> 6);
00226
00227         csd->block_len = (1L << (buf[5] & 0x0F));
00228         csd->block_num = (c_size + 1) * mult;
00229         csd->capacity = (csd->block_len * csd->block_num) >> 20; // in MB
00230
00231         LOG_INFO("block_len %d bytes, block_num %ld, total capacity %dMB\n", csd->block_len, csd->block_num, csd->capacity);
00232         return 0;
00233     }
00234     else
00235         return EOF;
00236 }
00237
00238
00239 #define SD_READ_SINGLEBLOCK 0x51
00240
00241 static size_t sd_readDirect(struct KBlock *b, block_idx_t idx, void *buf, size_t offset, size_t size)
00242 {
00243     Sd *sd = SD_CAST(b);
00244     LOG_INFO("reading from block %ld, offset %d, size %d\n", idx, offset, size);
00245
00246     if (sd->tranfer_len != size)
00247     {
00248         if ((sd->r1 = sd_setBlockLen(sd, size)))
00249         {
00250             LOG_ERR("setBlockLen failed: %04X\n", sd->r1);
00251             return 0;
00252         }
00253         sd->tranfer_len = size;
00254     }
00255
00256     SD_SELECT(sd);
00257
00258     sd->r1 = sd_sendCommand(sd, SD_READ_SINGLEBLOCK, idx * SD_DEFAULT_BLOCKLEN + offset, 0);
00259
00260     if (sd->r1)
00261     {
00262         LOG_ERR("read single block failed: %04X\n", sd->r1);
00263         sd_select(sd, false);
00264         return 0;
00265     }
00266
00267     bool res = sd_getBlock(sd, buf, size);
00268     sd_select(sd, false);
00269     if (!res)
00270     {
00271         LOG_ERR("read single block failed reading data\n");
00272         return 0;
00273     }
00274     else
00275         return size;
00276 }
00277
00278 #define SD_WRITE_SINGLEBLOCK 0x58
00279 #define SD_DATA_ACCEPTED     0x05
00280
00281 static size_t sd_writeDirect(KBlock *b, block_idx_t idx, const void *buf, size_t offset, size_t size)
00282 {
00283     Sd *sd = SD_CAST(b);
00284     KFile *fd = sd->ch;
00285     ASSERT(offset == 0);
00286     ASSERT(size == SD_DEFAULT_BLOCKLEN);
00287
00288     LOG_INFO("writing block %ld\n", idx);
00289     if (sd->tranfer_len != SD_DEFAULT_BLOCKLEN)
00290     {
00291         if ((sd->r1 = sd_setBlockLen(sd, SD_DEFAULT_BLOCKLEN)))
00292         {
00293             LOG_ERR("setBlockLen failed: %04X\n", sd->r1);
00294             return 0;
00295         }
00296         sd->tranfer_len = SD_DEFAULT_BLOCKLEN;
00297     }
00298
00299     SD_SELECT(sd);
00300
00301     sd->r1 = sd_sendCommand(sd, SD_WRITE_SINGLEBLOCK, idx * SD_DEFAULT_BLOCKLEN, 0);
00302
00303     if (sd->r1)
00304     {
00305         LOG_ERR("write single block failed: %04X\n", sd->r1);
00306         sd_select(sd, false);
00307         return 0;
00308     }
00309
00310     kfile_putc(SD_STARTTOKEN, fd);
00311     kfile_write(fd, buf, SD_DEFAULT_BLOCKLEN);
00312     /* send fake crc */
00313     kfile_putc(0, fd);
00314     kfile_putc(0, fd);
00315
00316     uint8_t dataresp = kfile_getc(fd);
00317     sd_select(sd, false);
00318
00319     if ((dataresp & 0x1f) != SD_DATA_ACCEPTED)
00320     {
00321         LOG_ERR("write block %ld failed: %02X\n", idx, dataresp);
00322         return EOF;
00323     }
00324
00325     return SD_DEFAULT_BLOCKLEN;
00326 }
00327
00328 void sd_writeTest(Sd *sd)
00329 {
00330     uint8_t buf[SD_DEFAULT_BLOCKLEN];
00331     memset(buf, 0, sizeof(buf));
00332
00333     for (block_idx_t i = 0; i < sd->b.blk_cnt; i++)
00334     {
00335         LOG_INFO("writing block %ld: %s\n", i, (sd_writeDirect(&sd->b, i, buf, 0, SD_DEFAULT_BLOCKLEN) == SD_DEFAULT_BLOCKLEN) ? "OK" : "FAIL");
00336     }
00337 }
00338
00339
00340 bool sd_test(Sd *sd)
00341 {
00342     uint8_t buf[SD_DEFAULT_BLOCKLEN];
00343
00344     if (sd_readDirect(&sd->b, 0, buf, 0, sd->b.blk_size) != sd->b.blk_size)
00345         return false;
00346
00347     kputchar('\n');
00348     for (int i = 0; i < SD_DEFAULT_BLOCKLEN; i++)
00349     {
00350         kprintf("%02X ", buf[i]);
00351         buf[i] = i;
00352         if (!((i+1) % 16))
00353             kputchar('\n');
00354     }
00355
00356     if (sd_writeDirect(&sd->b, 0, buf, 0, SD_DEFAULT_BLOCKLEN) != SD_DEFAULT_BLOCKLEN)
00357         return false;
00358
00359     memset(buf, 0, sizeof(buf));
00360     if (sd_readDirect(&sd->b, 0, buf, 0, sd->b.blk_size) != sd->b.blk_size)
00361         return false;
00362
00363     kputchar('\n');
00364     for (block_idx_t i = 0; i < sd->b.blk_size; i++)
00365     {
00366         kprintf("%02X ", buf[i]);
00367         buf[i] = i;
00368         if (!((i+1) % 16))
00369             kputchar('\n');
00370     }
00371
00372     return true;
00373 }
00374
00375 static int sd_error(KBlock *b)
00376 {
00377     Sd *sd = SD_CAST(b);
00378     return sd->r1;
00379 }
00380
00381 static void sd_clearerr(KBlock *b)
00382 {
00383     Sd *sd = SD_CAST(b);
00384     sd->r1 = 0;
00385 }
00386
00387 static const KBlockVTable sd_unbuffered_vt =
00388 {
00389     .readDirect = sd_readDirect,
00390     .writeDirect = sd_writeDirect,
00391
00392     .error = sd_error,
00393     .clearerr = sd_clearerr,
00394 };
00395
00396 static const KBlockVTable sd_buffered_vt =
00397 {
00398     .readDirect = sd_readDirect,
00399     .writeDirect = sd_writeDirect,
00400
00401     .readBuf = kblock_swReadBuf,
00402     .writeBuf = kblock_swWriteBuf,
00403     .load = kblock_swLoad,
00404     .store = kblock_swStore,
00405
00406     .error = sd_error,
00407     .clearerr = sd_clearerr,
00408 };
00409
00410 #define SD_GO_IDLE_STATE     0x40
00411 #define SD_GO_IDLE_STATE_CRC 0x95
00412 #define SD_SEND_OP_COND      0x41
00413 #define SD_SEND_OP_COND_CRC  0xF9
00414
00415 #define SD_START_DELAY  ms_to_ticks(10)
00416 #define SD_INIT_TIMEOUT ms_to_ticks(1000)
00417 #define SD_IDLE_RETRIES 4
00418
00419 static bool sd_blockInit(Sd *sd, KFile *ch)
00420 {
00421     ASSERT(sd);
00422     ASSERT(ch);
00423     memset(sd, 0, sizeof(*sd));
00424     DB(sd->b.priv.type = KBT_SD);
00425     sd->ch = ch;
00426
00427     SD_CS_INIT();
00428     SD_CS_OFF();
00429
00430     /* Wait a few moments for supply voltage to stabilize */
00431     timer_delay(SD_START_DELAY);
00432
00433     /* Give 80 clk pulses to wake up the card */
00434     for (int i = 0; i < 10; i++)
00435         kfile_putc(0xff, ch);
00436     kfile_flush(ch);
00437
00438     for (int i = 0; i < SD_IDLE_RETRIES; i++)
00439     {
00440         SD_SELECT(sd);
00441         sd->r1 = sd_sendCommand(sd, SD_GO_IDLE_STATE, 0, SD_GO_IDLE_STATE_CRC);
00442         sd_select(sd, false);
00443
00444         if (sd->r1 == SD_IN_IDLE)
00445             break;
00446     }
00447
00448     if (sd->r1 != SD_IN_IDLE)
00449     {
00450         LOG_ERR("go_idle_state failed: %04X\n", sd->r1);
00451         return false;
00452     }
00453
00454     ticks_t start = timer_clock();
00455
00456     /* Wait for card to start */
00457     do
00458     {
00459         SD_SELECT(sd);
00460         sd->r1 = sd_sendCommand(sd, SD_SEND_OP_COND, 0, SD_SEND_OP_COND_CRC);
00461         sd_select(sd, false);
00462         cpu_relax();
00463     }
00464     while (sd->r1 != 0 && timer_clock() - start < SD_INIT_TIMEOUT);
00465
00466     if (sd->r1)
00467     {
00468         LOG_ERR("send_op_cond failed: %04X\n", sd->r1);
00469         return false;
00470     }
00471
00472     sd->r1 = sd_setBlockLen(sd, SD_DEFAULT_BLOCKLEN);
00473     sd->tranfer_len = SD_DEFAULT_BLOCKLEN;
00474
00475     if (sd->r1)
00476     {
00477         LOG_ERR("setBlockLen failed: %04X\n", sd->r1);
00478         return false;
00479     }
00480
00481     /* Avoid warning for uninitialized csd use (gcc bug?) */
00482     CardCSD csd = csd;
00483
00484     sd->r1 = sd_getCSD(sd, &csd);
00485
00486     if (sd->r1)
00487     {
00488         LOG_ERR("getCSD failed: %04X\n", sd->r1);
00489         return false;
00490     }
00491
00492     sd->b.blk_size = SD_DEFAULT_BLOCKLEN;
00493     sd->b.blk_cnt = csd.block_num * (csd.block_len / SD_DEFAULT_BLOCKLEN);
00494     LOG_INFO("blk_size %d, blk_cnt %ld\n", sd->b.blk_size, sd->b.blk_cnt);
00495
00496 #if CONFIG_SD_AUTOASSIGN_FAT
00497     disk_assignDrive(&sd->b, 0);
00498 #endif
00499
00500     return true;
00501 }
00502
00503 bool sd_initUnbuf(Sd *sd, KFile *ch)
00504 {
00505     if (sd_blockInit(sd, ch))
00506     {
00507         sd->b.priv.vt = &sd_unbuffered_vt;
00508         return true;
00509     }
00510     else
00511         return false;
00512 }
00513
00514 static uint8_t sd_buf[SD_DEFAULT_BLOCKLEN];
00515
00516 bool sd_initBuf(Sd *sd, KFile *ch)
00517 {
00518     if (sd_blockInit(sd, ch))
00519     {
00520         sd->b.priv.buf = sd_buf;
00521         sd->b.priv.flags |= KB_BUFFERED | KB_PARTIAL_WRITE;
00522         sd->b.priv.vt = &sd_buffered_vt;
00523         sd->b.priv.vt->load(&sd->b, 0);
00524         return true;
00525     }
00526     else
00527         return false;
00528 }
00529


BeRTOS: sd.h File Reference

  • drv
Data Structures | Defines
sd.h File Reference

Function library for secure digital memory. More...

#include "cfg/cfg_sd.h"
#include <io/kfile.h>
#include <io/kblock.h>
#include <fs/fatfs/diskio.h>

Go to the source code of this file.

Data Structures

struct | Sd
SD Card context structure. More...

Defines

#define | SD_UNBUFFERED BV(0)
Open SD memory disabling page caching, no modification and partial write are allowed.
#define | sd_init(sd, ch, buffered) ((buffered & SD_UNBUFFERED) ? sd_initUnbuf((sd), (ch)) : sd_initBuf((sd), (ch)))
Initializes the SD driver.

Detailed Description

Function library for secure digital memory.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file sd.h.

Define Documentation

#define sd_init | ( | sd,
 |  | ch,
 |  | buffered
 | ) | ((buffered & SD_UNBUFFERED) ? sd_initUnbuf((sd), (ch)) : sd_initBuf((sd), (ch)))

Initializes the SD driver.

Parameters:
sd | The SD KBlock context.
ch | A pointer to a SPI channel where the SD will read/write to.
buffered | Set to true if you want the KBlock to be buffered, to false otherwise. The FatFs module does not require the device to be buffered because it has an internal cache. This will save 512 bytes of RAM in this case.
Returns:
true if initialization succeds, false otherwise.

Definition at line 105 of file sd.h.


BeRTOS: sd.h Source File

  • drv
sd.h
Go to the documentation of this file.
00001
00044 #ifndef DRV_SD_H
00045 #define DRV_SD_H
00046
00047 #include "cfg/cfg_sd.h"
00048
00049 #include <io/kfile.h>
00050 #include <io/kblock.h>
00051
00052 #include <fs/fatfs/diskio.h>
00053
00054
00055 #define SD_UNBUFFERED     BV(0) ///< Open SD memory disabling page caching, no modification and partial write are allowed.
00056
00060 typedef struct Sd
00061 {
00062     KBlock b;
00063     KFile *ch;
00064     uint16_t r1;
00065     uint16_t tranfer_len;
00066 } Sd;
00067
00068 bool sd_initUnbuf(Sd *sd, KFile *ch);
00069 bool sd_initBuf(Sd *sd, KFile *ch);
00070
00071 #if CONFIG_SD_OLD_INIT
00072     #if !(ARCH & ARCH_NIGHTTEST)
00073         #warning "Deprecated: this API will be removed in the next major release,"
00074         #warning "please disable CONFIG_SD_OLD_INIT and pass explicitly the SD context to sd_init()."
00075     #endif
00076
00089     #define sd_init(ch) {static struct Sd sd; sd_initUnbuf(&sd, (ch));}
00090
00091 #else
00092
00105     #define sd_init(sd, ch, buffered) ((buffered & SD_UNBUFFERED) ? sd_initUnbuf((sd), (ch)) : sd_initBuf((sd), (ch)))
00106
00107 #endif
00108
00109
00110 #define KBT_SD MAKE_ID('S', 'D', 'B', 'K')
00111
00112 bool sd_test(Sd *sd);
00113 void sd_writeTest(Sd *sd);
00114
00115 INLINE Sd *SD_CAST(KBlock *b)
00116 {
00117     ASSERT(b->priv.type == KBT_SD);
00118     return (Sd *)b;
00119 }
00120
00121
00122 #endif /* DRV_SD_H */


BeRTOS: sem.c File Reference

  • kern
Functions
sem.c File Reference

Semaphore based synchronization services. More...

#include "sem.h"
#include <cfg/debug.h>
#include <cpu/irq.h>
#include <kern/proc.h>
#include <kern/proc_p.h>
#include <kern/signal.h>

Go to the source code of this file.

Functions

void | sem_init (struct Semaphore *s)
Initialize a Semaphore structure.
bool | sem_attempt (struct Semaphore *s)
Attempt to lock a semaphore without waiting.
void | sem_obtain (struct Semaphore *s)
Lock a semaphore.
void | sem_release (struct Semaphore *s)
Release a lock on a previously locked semaphore.

Detailed Description

Semaphore based synchronization services.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file sem.c.


BeRTOS: sem.c Source File

  • kern
sem.c
Go to the documentation of this file.
00001
00038 #include "sem.h"
00039 #include <cfg/debug.h>
00040
00041 #include <cpu/irq.h> // ASSERT_IRQ_DISABLED()
00042
00043 #include <kern/proc.h>
00044 #include <kern/proc_p.h>
00045 #include <kern/signal.h>
00046
00047 INLINE void sem_verify(struct Semaphore *s)
00048 {
00049     (void)s;
00050     ASSERT(s);
00051     LIST_ASSERT_VALID(&s->wait_queue);
00052     ASSERT(s->nest_count >= 0);
00053     ASSERT(s->nest_count < 128);   // heuristic max
00054 }
00055
00059 void sem_init(struct Semaphore *s)
00060 {
00061     LIST_INIT(&s->wait_queue);
00062     s->owner = NULL;
00063     s->nest_count = 0;
00064 }
00065
00066
00078 bool sem_attempt(struct Semaphore *s)
00079 {
00080     bool result = false;
00081
00082     proc_forbid();
00083     sem_verify(s);
00084     if ((!s->owner) || (s->owner == current_process))
00085     {
00086         s->owner = current_process;
00087         s->nest_count++;
00088         result = true;
00089     }
00090     proc_permit();
00091
00092     return result;
00093 }
00094
00095
00113 void sem_obtain(struct Semaphore *s)
00114 {
00115     proc_forbid();
00116     sem_verify(s);
00117
00118     /* Is the semaphore already locked by another process? */
00119     if (UNLIKELY(s->owner && (s->owner != current_process)))
00120     {
00121         /* Append calling process to the wait queue */
00122         ADDTAIL(&s->wait_queue, (Node *)current_process);
00123
00124         /*
00125          * We will wake up only when the current owner calls
00126          * sem_release(). Then, the semaphore will already
00127          * be locked for us.
00128          */
00129         proc_permit();
00130         proc_switch();
00131     }
00132     else
00133     {
00134         ASSERT(LIST_EMPTY(&s->wait_queue));
00135
00136         /* The semaphore was free: lock it */
00137         s->owner = current_process;
00138         s->nest_count++;
00139         proc_permit();
00140     }
00141 }
00142
00143
00157 void sem_release(struct Semaphore *s)
00158 {
00159     Process *proc = NULL;
00160
00161     proc_forbid();
00162     sem_verify(s);
00163
00164     ASSERT(s->owner == current_process);
00165
00166     /*
00167      * Decrement nesting count and check if the semaphore
00168      * has been fully unlocked.
00169      */
00170     if (--s->nest_count == 0)
00171     {
00172         /* Disown semaphore */
00173         s->owner = NULL;
00174
00175         /* Give semaphore to the first applicant, if any */
00176         if (UNLIKELY((proc = (Process *)list_remHead(&s->wait_queue))))
00177         {
00178             s->nest_count = 1;
00179             s->owner = proc;
00180         }
00181     }
00182     proc_permit();
00183
00184     if (proc)
00185         ATOMIC(proc_wakeup(proc));
00186 }


BeRTOS: sem.h File Reference

  • kern
sem.h File Reference
#include <cfg/compiler.h>
#include <struct/list.h>

Go to the source code of this file.

Functions

Process synchronization services
void | sem_init (struct Semaphore *s)
Initialize a Semaphore structure.
bool | sem_attempt (struct Semaphore *s)
Attempt to lock a semaphore without waiting.
void | sem_obtain (struct Semaphore *s)
Lock a semaphore.
void | sem_release (struct Semaphore *s)
Release a lock on a previously locked semaphore.

Detailed Description

Definition in file sem.h.


BeRTOS: sem.h Source File

  • kern
sem.h
Go to the documentation of this file.
00001
00049 #ifndef KERN_SEM_H
00050 #define KERN_SEM_H
00051
00052 #include <cfg/compiler.h>
00053 #include <struct/list.h>
00054
00055 /* Fwd decl */
00056 struct Process;
00057
00058
00059 typedef struct Semaphore
00060 {
00061     struct Process *owner;
00062     List            wait_queue;
00063     int             nest_count;
00064 } Semaphore;
00065
00070 void sem_init(struct Semaphore *s);
00071 bool sem_attempt(struct Semaphore *s);
00072 void sem_obtain(struct Semaphore *s);
00073 void sem_release(struct Semaphore *s);
00074 /* \} */
00075 /* \} */ //defgroup kern_sem
00076
00077 int sem_testRun(void);
00078 int sem_testSetup(void);
00079 int sem_testTearDown(void);
00080
00081 #endif /* KERN_SEM_H */


BeRTOS: ser.c File Reference

  • drv
Functions
ser.c File Reference

Buffered serial I/O driver. More...

#include "ser.h"
#include "wdt.h"
#include "timer.h"
#include "ser_p.h"
#include "cfg/cfg_ser.h"
#include "cfg/cfg_proc.h"
#include <cfg/debug.h>
#include <mware/formatwr.h>
#include <cpu/power.h>
#include <string.h>

Go to the source code of this file.

Functions

static int | ser_putchar (int c, struct Serial *port)
Insert c in tx FIFO buffer.
static int | ser_getchar (struct Serial *port)
Fetch a character from the rx FIFO buffer.
int | ser_getchar_nowait (struct Serial *fd)
Fetch a character from the rx FIFO buffer.
static size_t | ser_read (struct KFile *fd, void *_buf, size_t size)
Read at most size bytes from port and put them in buf.
static size_t | ser_write (struct KFile *fd, const void *_buf, size_t size)
Write a buffer to serial.
void | ser_setbaudrate (struct Serial *fd, unsigned long rate)
Set the baudrate for the serial port.
void | ser_setparity (struct Serial *fd, int parity)
Set the parity for the fd serial port.
void | ser_purge (struct Serial *fd)
Flush both the RX and TX buffers.
void | ser_purgeRx (struct Serial *fd)
Flush RX buffer.
void | ser_purgeTx (struct Serial *fd)
Flush TX buffer.
static int | ser_flush (struct KFile *fd)
Wait until all pending output is completely transmitted to the other end.
static struct Serial * | ser_open (struct Serial *fd, unsigned int unit)
Initialize a serial port.
static int | ser_close (struct KFile *fd)
Clean up serial port, disabling the associated hardware.
static struct KFile * | ser_reopen (struct KFile *fd)
Reopen serial port.
void | ser_init (struct Serial *fds, unsigned int unit)
Init serial driver for unit.
static size_t | spimaster_read (struct KFile *fd, void *_buf, size_t size)
Read data from SPI bus.
static size_t | spimaster_write (struct KFile *fd, const void *buf, size_t size)
Write data to SPI bus.
void | spimaster_init (Serial *fds, unsigned int unit)
Init SPI serial driver unit in master mode.

Detailed Description

Buffered serial I/O driver.

The serial rx interrupt buffers incoming data in a software FIFO to decouple the higher level protocols from the line speed. Outgoing data is buffered as well for better performance. This driver is not optimized for best performance, but it has proved to be fast enough to handle transfer rates up to 38400bps on a 16MHz 80196.

MODULE CONFIGURATION

  • CONFIG_SER_HWHANDSHAKE - set to 1 to enable RTS/CTS handshake. Support is incomplete/untested.
  • CONFIG_SER_TXTIMEOUT - Enable software serial transmission timeouts
Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file ser.c.

Function Documentation

static int ser_flush ( struct KFile * fd ) [static]

Wait until all pending output is completely transmitted to the other end.

Note:
The current implementation only checks the software transmission queue. Any hardware FIFOs are ignored.

Definition at line 323 of file ser.c.

static int ser_getchar ( struct Serial * port ) [static]

Fetch a character from the rx FIFO buffer.

Note:
This function will switch out the calling process if the rx buffer is empty. If the buffer is empty and port->rxtimeout is 0 return EOF immediatly.
Returns:
EOF on error or timeout, c otherwise.

Definition at line 140 of file ser.c.

int ser_getchar_nowait ( struct Serial * fd )

Fetch a character from the rx FIFO buffer.

If the buffer is empty, ser_getchar_nowait() returns EOF immediatly.

Note:
Deprecated, use ser_getchar with rx_timeout set to 0.

Definition at line 183 of file ser.c.

void ser_init | ( | struct Serial * | fds,
 |  | unsigned int | unit
 | ) |  |

Init serial driver for unit.

Use values SER_UARTn as values for unit.

Definition at line 421 of file ser.c.

static struct Serial* ser_open | ( | struct Serial * | fd,
 |  | unsigned int | unit
 | ) |  | [static, read]

Initialize a serial port.

Parameters:
fd | KFile Serial struct interface.
unit | Serial unit to open. Possible values are architecture dependant.

Definition at line 344 of file ser.c.

static int ser_putchar | ( | int | c,
 |  | struct Serial * | port
 | ) |  | [static]

Insert c in tx FIFO buffer.

Note:
This function will switch out the calling process if the tx buffer is full. If the buffer is full and port->txtimeout is 0 return EOF immediatly.
Returns:
EOF on error or timeout, c otherwise.

Definition at line 94 of file ser.c.

static size_t ser_read | ( | struct KFile * | fd,
 |  | void * | _buf,
 |  | size_t | size
 | ) |  | [static]

Read at most size bytes from port and put them in buf.

Returns:
number of bytes actually read.

Definition at line 199 of file ser.c.

static size_t ser_write | ( | struct KFile * | fd,
 |  | const void * | _buf,
 |  | size_t | size
 | ) |  | [static]

Write a buffer to serial.

Returns:
0 if OK, EOF in case of error.

Definition at line 224 of file ser.c.

void spimaster_init | ( | Serial * | fds,
 |  | unsigned int | unit
 | ) |  |

Init SPI serial driver unit in master mode.

Use SER_SPIn for unit parameter.

This interface implements the SPI master protocol over a serial SPI driver. This is needed because normal serial driver send/receive data at the same time. SPI slaves like memories and other peripherals first receive and *then* send response back instead. To achieve this, when we are master and we are *sending*, we have to discard all incoming data. Then, when we want to receive, we must write fake data to SPI to trigger slave devices.

Definition at line 496 of file ser.c.

static size_t spimaster_read | ( | struct KFile * | fd,
 |  | void * | _buf,
 |  | size_t | size
 | ) |  | [static]

Read data from SPI bus.

Since we are master, we have to trigger slave by sending fake chars on the bus.

Definition at line 442 of file ser.c.


BeRTOS: ser.c Source File

  • drv
ser.c
Go to the documentation of this file.
00001
00052 #include "ser.h"
00053 #include "wdt.h"
00054 #include "timer.h"
00055 #include "ser_p.h"
00056
00057 #include "cfg/cfg_ser.h"
00058 #include "cfg/cfg_proc.h"
00059 #include <cfg/debug.h>
00060
00061 #include <mware/formatwr.h>
00062
00063 #include <cpu/power.h> /* cpu_relax() */
00064
00065 #include <string.h> /* memset() */
00066
00067 /*
00068  * Sanity check for config parameters required by this module.
00069  */
00070 #if !defined(CONFIG_KERN) || ((CONFIG_KERN != 0) && CONFIG_KERN != 1)
00071     #error CONFIG_KERN must be set to either 0 or 1 in cfg_kern.h
00072 #endif
00073 #if !defined(CONFIG_SER_RXTIMEOUT)
00074     #error CONFIG_SER_TXTIMEOUT missing in cfg_ser.h
00075 #endif
00076 #if !defined(CONFIG_SER_RXTIMEOUT)
00077     #error CONFIG_SER_RXTIMEOUT missing in cfg_ser.h
00078 #endif
00079 #if !defined(CONFIG_SER_DEFBAUDRATE)
00080     #error CONFIG_SER_DEFBAUDRATE missing in cfg_ser.h
00081 #endif
00082
00083
00084 struct Serial *ser_handles[SER_CNT];
00085
00094 static int ser_putchar(int c, struct Serial *port)
00095 {
00096     if (fifo_isfull_locked(&port->txfifo))
00097     {
00098 #if CONFIG_SER_TXTIMEOUT != -1
00099         /* If timeout == 0 we don't want to wait */
00100         if (port->txtimeout == 0)
00101             return EOF;
00102
00103         ticks_t start_time = timer_clock();
00104 #endif
00105
00106         /* Wait while buffer is full... */
00107         do
00108         {
00109             cpu_relax();
00110
00111 #if CONFIG_SER_TXTIMEOUT != -1
00112             if (timer_clock() - start_time >= port->txtimeout)
00113             {
00114                 ATOMIC(port->status |= SERRF_TXTIMEOUT);
00115                 return EOF;
00116             }
00117 #endif /* CONFIG_SER_TXTIMEOUT */
00118         }
00119         while (fifo_isfull_locked(&port->txfifo));
00120     }
00121
00122     fifo_push_locked(&port->txfifo, (unsigned char)c);
00123
00124     /* (re)trigger tx interrupt */
00125     port->hw->table->txStart(port->hw);
00126
00127     /* Avoid returning signed extended char */
00128     return (int)((unsigned char)c);
00129 }
00130
00131
00140 static int ser_getchar(struct Serial *port)
00141 {
00142     if (fifo_isempty_locked(&port->rxfifo))
00143     {
00144 #if CONFIG_SER_RXTIMEOUT != -1
00145         /* If timeout == 0 we don't want to wait for chars */
00146         if (port->rxtimeout == 0)
00147             return EOF;
00148
00149         ticks_t start_time = timer_clock();
00150 #endif
00151
00152         /* Wait while buffer is empty */
00153         do
00154         {
00155             cpu_relax();
00156
00157 #if CONFIG_SER_RXTIMEOUT != -1
00158             if (timer_clock() - start_time >= port->rxtimeout)
00159             {
00160                 ATOMIC(port->status |= SERRF_RXTIMEOUT);
00161                 return EOF;
00162             }
00163 #endif /* CONFIG_SER_RXTIMEOUT */
00164         }
00165         while (fifo_isempty_locked(&port->rxfifo) && (ser_getstatus(port) & SERRF_RX) == 0);
00166     }
00167
00168     /*
00169      * Get a byte from the FIFO (avoiding sign-extension),
00170      * re-enable RTS, then return result.
00171      */
00172     if (ser_getstatus(port) & SERRF_RX)
00173         return EOF;
00174     return (int)(unsigned char)fifo_pop_locked(&port->rxfifo);
00175 }
00176
00183 int ser_getchar_nowait(struct Serial *fd)
00184 {
00185     if (fifo_isempty_locked(&fd->rxfifo))
00186         return EOF;
00187
00188     /* NOTE: the double cast prevents unwanted sign extension */
00189     return (int)(unsigned char)fifo_pop_locked(&fd->rxfifo);
00190 }
00191
00192
00193
00199 static size_t ser_read(struct KFile *fd, void *_buf, size_t size)
00200 {
00201     Serial *fds = SERIAL_CAST(fd);
00202
00203     size_t i = 0;
00204     char *buf = (char *)_buf;
00205     int c;
00206
00207     while (i < size)
00208     {
00209         if ((c = ser_getchar(fds)) == EOF)
00210             break;
00211         buf[i++] = c;
00212     }
00213
00214     return i;
00215 }
00216
00224 static size_t ser_write(struct KFile *fd, const void *_buf, size_t size)
00225 {
00226     Serial *fds = SERIAL_CAST(fd);
00227     const char *buf = (const char *)_buf;
00228     size_t i = 0;
00229
00230     while (size--)
00231     {
00232         if (ser_putchar(*buf++, fds) == EOF)
00233             break;
00234         i++;
00235     }
00236     return i;
00237 }
00238
00239
00240 #if CONFIG_SER_RXTIMEOUT != -1 || CONFIG_SER_TXTIMEOUT != -1
00241 void ser_settimeouts(struct Serial *fd, mtime_t rxtimeout, mtime_t txtimeout)
00242 {
00243     #if CONFIG_SER_RXTIMEOUT != -1
00244         fd->rxtimeout = ms_to_ticks(rxtimeout);
00245     #else
00246         (void)rxtimeout;
00247     #endif
00248
00249     #if CONFIG_SER_TXTIMEOUT != -1
00250         fd->txtimeout = ms_to_ticks(txtimeout);
00251     #else
00252         (void)txtimeout;
00253     #endif
00254 }
00255 #endif /* CONFIG_SER_RXTIMEOUT || CONFIG_SER_TXTIMEOUT */
00256
00257
00261 void ser_setbaudrate(struct Serial *fd, unsigned long rate)
00262 {
00263     fd->hw->table->setBaudrate(fd->hw, rate);
00264 }
00265
00266
00270 void ser_setparity(struct Serial *fd, int parity)
00271 {
00272     fd->hw->table->setParity(fd->hw, parity);
00273 }
00274
00275 static int ser_error(struct KFile *fd)
00276 {
00277     Serial *fds = SERIAL_CAST(fd);
00278     return ser_getstatus(fds);
00279 }
00280
00281 static void ser_clearerr(struct KFile *fd)
00282 {
00283     Serial *fds = SERIAL_CAST(fd);
00284     ser_setstatus(fds, 0);
00285 }
00286
00287
00288
00292 void ser_purge(struct Serial *fd)
00293 {
00294     ser_purgeRx(fd);
00295     ser_purgeTx(fd);
00296 }
00297
00301 void ser_purgeRx(struct Serial *fd)
00302 {
00303     fifo_flush_locked(&fd->rxfifo);
00304 }
00305
00309 void ser_purgeTx(struct Serial *fd)
00310 {
00311     fifo_flush_locked(&fd->txfifo);
00312 }
00313
00314
00323 static int ser_flush(struct KFile *fd)
00324 {
00325     Serial *fds = SERIAL_CAST(fd);
00326
00327     /*
00328      * Wait until the FIFO becomes empty, and then until the byte currently in
00329      * the hardware register gets shifted out.
00330      */
00331     while (!fifo_isempty(&fds->txfifo)
00332            || fds->hw->table->txSending(fds->hw))
00333         cpu_relax();
00334     return 0;
00335 }
00336
00337
00344 static struct Serial *ser_open(struct Serial *fd, unsigned int unit)
00345 {
00346     ASSERT(unit < countof(ser_handles));
00347
00348     ser_handles[unit] = fd;
00349     ASSERT(!fd->is_open);
00350     DB(fd->is_open = true);
00351
00352     fd->unit = unit;
00353
00354     fd->hw = ser_hw_getdesc(unit);
00355
00356     /* Initialize circular buffers */
00357     ASSERT(fd->hw->txbuffer);
00358     ASSERT(fd->hw->rxbuffer);
00359     fifo_init(&fd->txfifo, fd->hw->txbuffer, fd->hw->txbuffer_size);
00360     fifo_init(&fd->rxfifo, fd->hw->rxbuffer, fd->hw->rxbuffer_size);
00361
00362     fd->hw->table->init(fd->hw, fd);
00363
00364     /* Set default values */
00365 #if CONFIG_SER_RXTIMEOUT != -1 || CONFIG_SER_TXTIMEOUT != -1
00366     ser_settimeouts(fd, CONFIG_SER_RXTIMEOUT, CONFIG_SER_TXTIMEOUT);
00367 #endif
00368 #if CONFIG_SER_DEFBAUDRATE
00369     ser_setbaudrate(fd, CONFIG_SER_DEFBAUDRATE);
00370 #endif
00371
00372     /* Clear error flags */
00373     ser_setstatus(fd, 0);
00374
00375     return fd;
00376 }
00377
00378
00382 static int ser_close(struct KFile *fd)
00383 {
00384     Serial *fds = SERIAL_CAST(fd);
00385     Serial *port = fds;
00386
00387     ASSERT(port->is_open);
00388     DB(port->is_open = false);
00389
00390     // Wait until we finish sending everything
00391     ser_flush(fd);
00392
00393     port->hw->table->cleanup(port->hw);
00394     DB(port->hw = NULL);
00395
00396     /*
00397      * We purge the FIFO buffer only after the low-level cleanup, so that
00398      * we are sure that there are no more interrupts.
00399      */
00400     ser_purge(fds);
00401     return 0;
00402 }
00403
00407 static struct KFile *ser_reopen(struct KFile *fd)
00408 {
00409     Serial *fds = SERIAL_CAST(fd);
00410
00411     ser_close(fd);
00412     ser_open(fds, fds->unit);
00413     return (KFile *)fds;
00414 }
00415
00421 void ser_init(struct Serial *fds, unsigned int unit)
00422 {
00423     memset(fds, 0, sizeof(*fds));
00424
00425     DB(fds->fd._type = KFT_SERIAL);
00426     fds->fd.reopen = ser_reopen;
00427     fds->fd.close = ser_close;
00428     fds->fd.read = ser_read;
00429     fds->fd.write = ser_write;
00430     fds->fd.flush = ser_flush;
00431     fds->fd.error = ser_error;
00432     fds->fd.clearerr = ser_clearerr;
00433     ser_open(fds, unit);
00434 }
00435
00436
00442 static size_t spimaster_read(struct KFile *fd, void *_buf, size_t size)
00443 {
00444     Serial *fd_spi = SERIAL_CAST(fd);
00445
00446     ser_flush(&fd_spi->fd);
00447     ser_purgeRx(fd_spi);
00448
00449     size_t total_rd = 0;
00450     uint8_t *buf = (uint8_t *)_buf;
00451     int c;
00452
00453     while (size--)
00454     {
00455         /*
00456          * Send and receive chars 1 by 1, otherwise the rxfifo
00457          * will overrun.
00458          */
00459         ser_putchar(0, fd_spi);
00460
00461         if ((c = ser_getchar(fd_spi)) == EOF)
00462             break;
00463
00464         *buf++ = c;
00465         total_rd++;
00466     }
00467     return total_rd;
00468 }
00469
00473 static size_t spimaster_write(struct KFile *fd, const void *buf, size_t size)
00474 {
00475     Serial *fd_spi = SERIAL_CAST(fd);
00476
00477     ser_purgeRx(fd_spi);
00478
00479     return ser_write(&fd_spi->fd, buf, size);
00480 }
00481
00482
00496 void spimaster_init(Serial *fds, unsigned int unit)
00497 {
00498     ser_init(fds, unit);
00499     fds->fd.read = spimaster_read;
00500     fds->fd.write = spimaster_write;
00501 }
00502
00503


BeRTOS: ser.h File Reference

  • drv
Data Structures | Defines | Functions | Variables
ser.h File Reference

High level serial I/O API. More...

#include <io/kfile.h>
#include <struct/fifobuf.h>
#include <cfg/compiler.h>
#include <CPU_HEADER(ser)>
#include "cfg/cfg_ser.h"

Go to the source code of this file.

Data Structures

struct | Serial
Serial handle structure. More...

Defines

#define | KFT_SERIAL MAKE_ID('S', 'E', 'R', 'L')
ID for serial.
Masks to group TX/RX errors.
#define | SERRF_RX
All possible rx errors.
#define | SERRF_TX (SERRF_TXTIMEOUT)
All possible tx errors.
LSB or MSB first data order for SPI driver.
#define | SER_MSB_FIRST 0
#define | SER_LSB_FIRST 1
Parity settings for ser_setparity().
Note:
Values are AVR-specific for performance reasons. Other processors should either decode them or redefine these macros.
#define | SER_PARITY_NONE 0
#define | SER_PARITY_EVEN 2
#define | SER_PARITY_ODD 3
Additional functions implemented as macros
#define | ser_getstatus(serial) ((serial)->status)
#define | ser_setstatus(serial, new_status) ((serial)->status = (new_status))

Functions

void | ser_setbaudrate (struct Serial *fd, unsigned long rate)
Set the baudrate for the serial port.
void | ser_setparity (struct Serial *fd, int parity)
Set the parity for the fd serial port.
int | ser_getchar_nowait (struct Serial *fd)
Fetch a character from the rx FIFO buffer.
void | ser_purgeRx (struct Serial *fd)
Flush RX buffer.
void | ser_purgeTx (struct Serial *fd)
Flush TX buffer.
void | ser_purge (struct Serial *fd)
Flush both the RX and TX buffers.
void | ser_init (struct Serial *fds, unsigned int unit)
Init serial driver for unit.
void | spimaster_init (Serial *fds, unsigned int unit)
Init SPI serial driver unit in master mode.

Variables

const char *const | serial_errors [8]
Human-readable serial error descriptions.

Detailed Description

High level serial I/O API.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file ser.h.

Function Documentation

int ser_getchar_nowait ( struct Serial * fd )

Fetch a character from the rx FIFO buffer.

If the buffer is empty, ser_getchar_nowait() returns EOF immediatly.

Note:
Deprecated, use ser_getchar with rx_timeout set to 0.

Definition at line 183 of file ser.c.

void ser_init | ( | struct Serial * | fds,
 |  | unsigned int | unit
 | ) |  |

Init serial driver for unit.

Use values SER_UARTn as values for unit.

Definition at line 421 of file ser.c.

void spimaster_init | ( | Serial * | fds,
 |  | unsigned int | unit
 | ) |  |

Init SPI serial driver unit in master mode.

Use SER_SPIn for unit parameter.

This interface implements the SPI master protocol over a serial SPI driver. This is needed because normal serial driver send/receive data at the same time. SPI slaves like memories and other peripherals first receive and *then* send response back instead. To achieve this, when we are master and we are *sending*, we have to discard all incoming data. Then, when we want to receive, we must write fake data to SPI to trigger slave devices.

Definition at line 496 of file ser.c.


BeRTOS: ser.h Source File

  • drv
ser.h
Go to the documentation of this file.
00001
00045 #ifndef DRV_SER_H
00046 #define DRV_SER_H
00047
00048 #include <io/kfile.h>
00049 #include <struct/fifobuf.h>
00050 #include <cfg/compiler.h>
00051
00052 #if OS_HOSTED
00053     #include <cfg/macros.h> /* BV() */
00054
00055     typedef uint16_t serstatus_t;
00056
00057     /* Software errors */
00058     #define SERRF_RXFIFOOVERRUN  BV(0)
00059     #define SERRF_RXTIMEOUT      BV(1)
00060     #define SERRF_TXTIMEOUT      BV(2)
00062     /* Hardware errors */
00063     #define SERRF_RXSROVERRUN    0
00064     #define SERRF_FRAMEERROR     0
00065     #define SERRF_PARITYERROR    0
00066     #define SERRF_NOISEERROR     0
00068     enum
00069     {
00070         SER_UART0,
00071         SER_UART1,
00072
00073         SER_CNT
00074     };
00075
00076 #else
00077     #include CPU_HEADER(ser)
00078 #endif
00079
00080 #include "cfg/cfg_ser.h"
00081
00082
00083
00088 #define SERRF_RX \
00089     ( SERRF_RXFIFOOVERRUN \
00090     | SERRF_RXTIMEOUT \
00091     | SERRF_RXSROVERRUN \
00092     | SERRF_PARITYERROR \
00093     | SERRF_FRAMEERROR \
00094     | SERRF_NOISEERROR)
00095 #define SERRF_TX  (SERRF_TXTIMEOUT)
00096 /*\}*/
00097
00103 #define SER_MSB_FIRST 0
00104 #define SER_LSB_FIRST 1
00105
00114 #define SER_PARITY_NONE  0
00115 #define SER_PARITY_EVEN  2
00116 #define SER_PARITY_ODD   3
00117 /*\}*/
00118
00119
00130 #if !defined(CONFIG_SER_STROBE) || !CONFIG_SER_STROBE
00131     #define SER_STROBE_ON    do {/*nop*/} while(0)
00132     #define SER_STROBE_OFF   do {/*nop*/} while(0)
00133     #define SER_STROBE_INIT  do {/*nop*/} while(0)
00134 #endif
00135
00136 struct SerialHardware;
00137
00139 extern const char * const serial_errors[8];
00140
00142 typedef struct Serial
00143 {
00145     KFile fd;
00146
00148     unsigned int unit;
00149
00150 #ifdef _DEBUG
00151     bool is_open;
00152 #endif
00153
00161     FIFOBuffer txfifo;
00162     FIFOBuffer rxfifo;
00163     /* \} */
00164
00165 #if CONFIG_SER_RXTIMEOUT != -1
00166     ticks_t rxtimeout;
00167 #endif
00168 #if CONFIG_SER_TXTIMEOUT != -1
00169     ticks_t txtimeout;
00170 #endif
00171
00173     volatile serstatus_t status;
00174
00176     struct SerialHardware* hw;
00177 } Serial;
00178
00179
00183 #define KFT_SERIAL MAKE_ID('S', 'E', 'R', 'L')
00184
00185
00186 INLINE Serial * SERIAL_CAST(KFile *fd)
00187 {
00188     ASSERT(fd->_type == KFT_SERIAL);
00189     return (Serial *)fd;
00190 }
00191
00192 /* Function prototypes */
00193 //extern int ser_getchar_nowait(struct Serial *port);
00194
00195 void ser_setbaudrate(struct Serial *fd, unsigned long rate);
00196 void ser_setparity(struct Serial *fd, int parity);
00197 void ser_settimeouts(struct Serial *fd, mtime_t rxtimeout, mtime_t txtimeout);
00198 void ser_resync(struct Serial *fd, mtime_t delay);
00199 int ser_getchar_nowait(struct Serial *fd);
00200
00201 void ser_purgeRx(struct Serial *fd);
00202 void ser_purgeTx(struct Serial *fd);
00203 void ser_purge(struct Serial *fd);
00204 void ser_init(struct Serial *fds, unsigned int unit);
00205 void spimaster_init(Serial *fds, unsigned int unit);
00206
00207
00213 #define ser_getstatus(serial)    ((serial)->status)
00214 #define ser_setstatus(serial, new_status) ((serial)->status = (new_status))
00215 /* \} */
00216
00217 #endif /* DRV_SER_H */


BeRTOS: ser_arm.c File Reference

  • cpu
  • arm
  • drv
ser_arm.c File Reference

Low-level serial module for ARM (inplementation). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level serial module for ARM (inplementation).

Author:
Daniele Basile <asterix@develer.com>

This module is automatically included so no need to include in test list.

Definition in file ser_arm.c.


BeRTOS: ser_arm.c Source File

  • cpu
  • arm
  • drv
ser_arm.c
Go to the documentation of this file.
00001
00043 #ifndef WIZ_AUTOGEN
00044     #warning This file is deprecated, you should use ser_at91.c
00045
00046     #include <cpu/detect.h>
00047
00048     #if CPU_ARM_AT91
00049         #include "ser_at91.c"
00050     #elif CPU_ARM_LPC2378
00051         #include "ser_lpc2.c"
00052     /*#elif  Add other ARM families here */
00053     #else
00054         #error Unknown CPU
00055     #endif
00056 #endif /* WIZ_AUTOGEN */


BeRTOS: ser_arm.h File Reference

  • cpu
  • arm
  • drv
ser_arm.h File Reference

Low-level serial module for ARM (interface). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level serial module for ARM (interface).

Author:
Daniele Basile <asterix@develer.com>

Definition in file ser_arm.h.


BeRTOS: ser_arm.h Source File

  • cpu
  • arm
  • drv
ser_arm.h
Go to the documentation of this file.
00001
00040 #include <cpu/detect.h>
00041
00042 #if CPU_ARM_AT91
00043     #include "ser_at91.h"
00044 #elif CPU_ARM_LPC2378
00045     #include "ser_lpc2.h"
00046 /*#elif  Add other ARM families here */
00047 #else
00048     #error Unknown CPU
00049 #endif


BeRTOS: ser_at91.c File Reference

  • cpu
  • arm
  • drv
Data Structures | Defines | Functions
ser_at91.c File Reference

ARM UART and SPI I/O driver. More...

#include "hw/hw_ser.h"
#include <hw/hw_cpufreq.h>
#include "cfg/cfg_ser.h"
#include <cfg/debug.h>
#include <io/arm.h>
#include <cpu/attr.h>
#include <drv/ser.h>
#include <drv/ser_p.h>
#include <struct/fifobuf.h>

Go to the source code of this file.

Data Structures

struct | ArmSerial
Internal hardware state structure. More...

Defines

#define | SERIRQ_PRIORITY 4
default priority for serial irqs.
Overridable serial bus hooks

These can be redefined in hw.h to implement special bus policies such as half-duplex, 485, etc.

  TXBEGIN      TXCHAR      TXEND  TXOFF
    |   __________|__________ |     |
    |   |   |   |   |   |   | |     |
    v   v   v   v   v   v   v v     v
 ______  __  __  __  __  __  __  ________________
       \/  \/  \/  \/  \/  \/  \/
 ______/\__/\__/\__/\__/\__/\__/
#define | SER_UART0_BUS_TXINIT
Default TXINIT macro - invoked in uart0_init()
#define | SER_UART0_BUS_TXBEGIN
Invoked before starting a transmission.
#define | SER_UART0_BUS_TXCHAR(c)
Invoked to send one character.
#define | SER_UART0_BUS_TXEND
Invoked as soon as the txfifo becomes empty.
#define | SER_UART1_BUS_TXINIT
Default TXINIT macro - invoked in uart1_init()
#define | SER_UART1_BUS_TXBEGIN
Invoked before starting a transmission.
#define | SER_UART1_BUS_TXCHAR(c)
Invoked to send one character.
#define | SER_UART1_BUS_TXEND
Invoked as soon as the txfifo becomes empty.
Overridable SPI hooks

These can be redefined in hw.h to implement special bus policies such as slave select pin handling, etc.

#define | SER_SPI0_BUS_TXINIT
Default TXINIT macro - invoked in spi_init() The default is no action.
#define | SER_SPI0_BUS_TXCLOSE
Invoked after the last character has been transmitted.

Functions

void | uart0_irq_tx (void)
Serial 0 TX interrupt handler.
void | uart0_irq_rx (void)
Serial 0 RX complete interrupt handler.
static | DECLARE_ISR (uart0_irq_dispatcher)
Serial IRQ dispatcher for USART0.
void | uart1_irq_tx (void)
Serial 1 TX interrupt handler.
void | uart1_irq_rx (void)
Serial 1 RX complete interrupt handler.
static | DECLARE_ISR (uart1_irq_dispatcher)
Serial IRQ dispatcher for USART1.
static | DECLARE_ISR (spi0_irq_handler)
SPI0 interrupt handler.

Detailed Description

ARM UART and SPI I/O driver.

Author:
Daniele Basile <asterix@develer.com>

Definition in file ser_at91.c.

Define Documentation

#define SER_SPI0_BUS_TXCLOSE

Invoked after the last character has been transmitted.

The default is no action.

Definition at line 180 of file ser_at91.c.

#define SER_UART0_BUS_TXINIT
Value:
do { \
        PIOA_PDR = BV(RXD0) | BV(TXD0); \
    } while (0)

Default TXINIT macro - invoked in uart0_init()

  • Disable GPIO on USART0 tx/rx pins

Definition at line 89 of file ser_at91.c.

#define SER_UART1_BUS_TXINIT
Value:
do { \
        PIOA_PDR = BV(RXD1) | BV(TXD1); \
    } while (0)

Default TXINIT macro - invoked in uart1_init()

  • Disable GPIO on USART1 tx/rx pins

Definition at line 129 of file ser_at91.c.


BeRTOS: ser_at91.c Source File

  • cpu
  • arm
  • drv
ser_at91.c
Go to the documentation of this file.
00001
00040 #include "hw/hw_ser.h"  /* Required for bus macros overrides */
00041 #include <hw/hw_cpufreq.h>  /* CPU_FREQ */
00042
00043 #include "cfg/cfg_ser.h"
00044 #include <cfg/debug.h>
00045
00046
00047 #include <io/arm.h>
00048
00049 #include <cpu/attr.h>
00050
00051 #include <drv/ser.h>
00052 #include <drv/ser_p.h>
00053
00054 #include <struct/fifobuf.h>
00055
00056
00057 #define SERIRQ_PRIORITY 4 ///< default priority for serial irqs.
00058
00080 #ifndef SER_UART0_BUS_TXINIT
00081
00086     #if !CPU_ARM_SAM7S_LARGE && !CPU_ARM_SAM7X
00087         #warning Check USART0 pins!
00088     #endif
00089     #define SER_UART0_BUS_TXINIT do { \
00090         PIOA_PDR = BV(RXD0) | BV(TXD0); \
00091     } while (0)
00092
00093 #endif
00094
00095 #ifndef SER_UART0_BUS_TXBEGIN
00096
00099     #define SER_UART0_BUS_TXBEGIN
00100 #endif
00101
00102 #ifndef SER_UART0_BUS_TXCHAR
00103
00106     #define SER_UART0_BUS_TXCHAR(c) do { \
00107         US0_THR = (c); \
00108     } while (0)
00109 #endif
00110
00111 #ifndef SER_UART0_BUS_TXEND
00112
00115     #define SER_UART0_BUS_TXEND
00116 #endif
00117
00118 /* End USART0 macros */
00119
00120 #ifndef SER_UART1_BUS_TXINIT
00121
00126     #if !CPU_ARM_SAM7S_LARGE && !CPU_ARM_SAM7X
00127         #warning Check USART1 pins!
00128     #endif
00129     #define SER_UART1_BUS_TXINIT do { \
00130         PIOA_PDR = BV(RXD1) | BV(TXD1); \
00131     } while (0)
00132
00133 #endif
00134
00135 #ifndef SER_UART1_BUS_TXBEGIN
00136
00139     #define SER_UART1_BUS_TXBEGIN
00140 #endif
00141
00142 #ifndef SER_UART1_BUS_TXCHAR
00143
00146     #define SER_UART1_BUS_TXCHAR(c) do { \
00147         US1_THR = (c); \
00148     } while (0)
00149 #endif
00150
00151 #ifndef SER_UART1_BUS_TXEND
00152
00155     #define SER_UART1_BUS_TXEND
00156 #endif
00157
00167 #ifndef SER_SPI0_BUS_TXINIT
00168
00172     #define SER_SPI0_BUS_TXINIT
00173 #endif
00174
00175 #ifndef SER_SPI0_BUS_TXCLOSE
00176
00180     #define SER_SPI0_BUS_TXCLOSE
00181 #endif
00182
00183 #if CPU_ARM_SAM7X
00184
00185     #ifndef SER_SPI1_BUS_TXINIT
00186
00190         #define SER_SPI1_BUS_TXINIT
00191     #endif
00192
00193     #ifndef SER_SPI1_BUS_TXCLOSE
00194
00198         #define SER_SPI1_BUS_TXCLOSE
00199     #endif
00200 #endif
00201 /*\}*/
00202
00203
00204
00205
00206 /* From the high-level serial driver */
00207 extern struct Serial *ser_handles[SER_CNT];
00208
00209 /* TX and RX buffers */
00210 static unsigned char uart0_txbuffer[CONFIG_UART0_TXBUFSIZE];
00211 static unsigned char uart0_rxbuffer[CONFIG_UART0_RXBUFSIZE];
00212
00213 static unsigned char uart1_txbuffer[CONFIG_UART1_TXBUFSIZE];
00214 static unsigned char uart1_rxbuffer[CONFIG_UART1_RXBUFSIZE];
00215
00216 static unsigned char spi0_txbuffer[CONFIG_SPI0_TXBUFSIZE];
00217 static unsigned char spi0_rxbuffer[CONFIG_SPI0_RXBUFSIZE];
00218 #if CPU_ARM_SAM7X
00219 static unsigned char spi1_txbuffer[CONFIG_SPI1_TXBUFSIZE];
00220 static unsigned char spi1_rxbuffer[CONFIG_SPI1_RXBUFSIZE];
00221 #endif
00222
00239 struct ArmSerial
00240 {
00241     struct SerialHardware hw;
00242     volatile bool sending;
00243 };
00244
00245 static ISR_PROTO(uart0_irq_dispatcher);
00246 static ISR_PROTO(uart1_irq_dispatcher);
00247 static ISR_PROTO(spi0_irq_handler);
00248 #if CPU_ARM_SAM7X
00249 static ISR_PROTO(spi1_irq_handler);
00250 #endif
00251 /*
00252  * Callbacks for USART0
00253  */
00254 static void uart0_init(
00255     UNUSED_ARG(struct SerialHardware *, _hw),
00256     UNUSED_ARG(struct Serial *, ser))
00257 {
00258     US0_IDR = 0xFFFFFFFF;
00259     /* Set the vector. */
00260     AIC_SVR(US0_ID) = uart0_irq_dispatcher;
00261     /* Initialize to level sensitive with defined priority. */
00262     AIC_SMR(US0_ID) = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | SERIRQ_PRIORITY;
00263     PMC_PCER = BV(US0_ID);
00264
00265     /*
00266      * - Reset USART0
00267      * - Set serial param: mode Normal, 8bit data, 1bit stop, parity none
00268      * - Enable both the receiver and the transmitter
00269      * - Enable only the RX complete interrupt
00270      */
00271     US0_CR = BV(US_RSTRX) | BV(US_RSTTX);
00272     US0_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1 | US_PAR_NO;
00273     US0_CR = BV(US_RXEN) | BV(US_TXEN);
00274     US0_IER = BV(US_RXRDY);
00275
00276     SER_UART0_BUS_TXINIT;
00277
00278     /* Enable the USART IRQ */
00279     AIC_IECR = BV(US0_ID);
00280
00281     SER_STROBE_INIT;
00282 }
00283
00284 static void uart0_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
00285 {
00286     US0_CR = BV(US_RSTRX) | BV(US_RSTTX) | BV(US_RXDIS) | BV(US_TXDIS) | BV(US_RSTSTA);
00287 }
00288
00289 static void uart0_enabletxirq(struct SerialHardware *_hw)
00290 {
00291     struct ArmSerial *hw = (struct ArmSerial *)_hw;
00292
00293     /*
00294      * WARNING: racy code here!  The tx interrupt sets hw->sending to false
00295      * when it runs with an empty fifo.  The order of statements in the
00296      * if-block matters.
00297      */
00298     if (!hw->sending)
00299     {
00300         hw->sending = true;
00301         /*
00302          * - Enable the transmitter
00303          * - Enable TX empty interrupt
00304          */
00305         SER_UART0_BUS_TXBEGIN;
00306         US0_IER = BV(US_TXEMPTY);
00307     }
00308 }
00309
00310 static void uart0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
00311 {
00312     /* Compute baud-rate period */
00313     US0_BRGR = CPU_FREQ / (16 * rate);
00314     //DB(kprintf("uart0_setbaudrate(rate=%lu): period=%d\n", rate, period);)
00315 }
00316
00317 static void uart0_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity)
00318 {
00319     US0_MR &= ~US_PAR_MASK;
00320     /* Set UART parity */
00321     switch(parity)
00322     {
00323         case SER_PARITY_NONE:
00324         {
00325             /* Parity none. */
00326             US0_MR |= US_PAR_NO;
00327             break;
00328         }
00329         case SER_PARITY_EVEN:
00330         {
00331             /* Even parity. */
00332             US0_MR |= US_PAR_EVEN;
00333             break;
00334         }
00335         case SER_PARITY_ODD:
00336         {
00337             /* Odd parity. */
00338             US0_MR |= US_PAR_ODD;
00339             break;
00340         }
00341         default:
00342             ASSERT(0);
00343     }
00344
00345 }
00346 /*
00347  * Callbacks for USART1
00348  */
00349 static void uart1_init(
00350     UNUSED_ARG(struct SerialHardware *, _hw),
00351     UNUSED_ARG(struct Serial *, ser))
00352 {
00353     US1_IDR = 0xFFFFFFFF;
00354     /* Set the vector. */
00355     AIC_SVR(US1_ID) = uart1_irq_dispatcher;
00356     /* Initialize to level sensitive with defined priority. */
00357     AIC_SMR(US1_ID) = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | SERIRQ_PRIORITY;
00358     PMC_PCER = BV(US1_ID);
00359
00360     /*
00361      * - Reset USART1
00362      * - Set serial param: mode Normal, 8bit data, 1bit stop, parity none
00363      * - Enable both the receiver and the transmitter
00364      * - Enable only the RX complete interrupt
00365      */
00366     US1_CR = BV(US_RSTRX) | BV(US_RSTTX);
00367     US1_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1 | US_PAR_NO;
00368     US1_CR = BV(US_RXEN) | BV(US_TXEN);
00369     US1_IER = BV(US_RXRDY);
00370
00371     SER_UART1_BUS_TXINIT;
00372
00373     /* Enable the USART IRQ */
00374     AIC_IECR = BV(US1_ID);
00375
00376     SER_STROBE_INIT;
00377 }
00378
00379 static void uart1_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
00380 {
00381     US1_CR = BV(US_RSTRX) | BV(US_RSTTX) | BV(US_RXDIS) | BV(US_TXDIS) | BV(US_RSTSTA);
00382 }
00383
00384 static void uart1_enabletxirq(struct SerialHardware *_hw)
00385 {
00386     struct ArmSerial *hw = (struct ArmSerial *)_hw;
00387
00388     /*
00389      * WARNING: racy code here!  The tx interrupt sets hw->sending to false
00390      * when it runs with an empty fifo.  The order of statements in the
00391      * if-block matters.
00392      */
00393     if (!hw->sending)
00394     {
00395         hw->sending = true;
00396         /*
00397          * - Enable the transmitter
00398          * - Enable TX empty interrupt
00399          */
00400         SER_UART1_BUS_TXBEGIN;
00401         US1_IER = BV(US_TXEMPTY);
00402     }
00403 }
00404
00405 static void uart1_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
00406 {
00407     /* Compute baud-rate period */
00408     US1_BRGR = CPU_FREQ / (16 * rate);
00409     //DB(kprintf("uart0_setbaudrate(rate=%lu): period=%d\n", rate, period);)
00410 }
00411
00412 static void uart1_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity)
00413 {
00414     US1_MR &= ~US_PAR_MASK;
00415     /* Set UART parity */
00416     switch(parity)
00417     {
00418         case SER_PARITY_NONE:
00419         {
00420             /* Parity none. */
00421             US1_MR |= US_PAR_NO;
00422             break;
00423         }
00424         case SER_PARITY_EVEN:
00425         {
00426             /* Even parity. */
00427             US1_MR |= US_PAR_EVEN;
00428             break;
00429         }
00430         case SER_PARITY_ODD:
00431         {
00432             /* Odd parity. */
00433             US1_MR |= US_PAR_ODD;
00434             break;
00435         }
00436         default:
00437             ASSERT(0);
00438     }
00439
00440 }
00441
00442 /* SPI driver */
00443 static void spi0_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser))
00444 {
00445     /* Disable PIO on SPI pins */
00446     PIOA_PDR = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO);
00447
00448     /* Reset device */
00449     SPI0_CR = BV(SPI_SWRST);
00450
00451     /*
00452      * Set SPI to master mode, fixed peripheral select, chip select directly connected to a peripheral device,
00453      * SPI clock set to MCK, mode fault detection disabled, loopback disable, NPCS0 active, Delay between CS = 0
00454      */
00455     SPI0_MR = BV(SPI_MSTR) | BV(SPI_MODFDIS);
00456
00457     /*
00458      * Set SPI mode.
00459      * At reset clock division factor is set to 0, that is
00460      * *forbidden*. Set SPI clock to minimum to keep it valid.
00461      */
00462     SPI0_CSR0 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT);
00463
00464     /* Disable all irqs */
00465     SPI0_IDR = 0xFFFFFFFF;
00466     /* Set the vector. */
00467     AIC_SVR(SPI0_ID) = spi0_irq_handler;
00468     /* Initialize to edge triggered with defined priority. */
00469     AIC_SMR(SPI0_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED | SERIRQ_PRIORITY;
00470     /* Enable the USART IRQ */
00471     AIC_IECR = BV(SPI0_ID);
00472     PMC_PCER = BV(SPI0_ID);
00473
00474     /* Enable interrupt on tx buffer empty */
00475     SPI0_IER = BV(SPI_TXEMPTY);
00476
00477     /* Enable SPI */
00478     SPI0_CR = BV(SPI_SPIEN);
00479
00480
00481     SER_SPI0_BUS_TXINIT;
00482
00483     SER_STROBE_INIT;
00484 }
00485
00486 static void spi0_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
00487 {
00488     /* Disable SPI */
00489     SPI0_CR = BV(SPI_SPIDIS);
00490
00491     /* Disable all irqs */
00492     SPI0_IDR = 0xFFFFFFFF;
00493
00494     SER_SPI0_BUS_TXCLOSE;
00495
00496     /* Enable PIO on SPI pins */
00497     PIOA_PER = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO);
00498 }
00499
00500 static void spi0_starttx(struct SerialHardware *_hw)
00501 {
00502     struct ArmSerial *hw = (struct ArmSerial *)_hw;
00503
00504     cpu_flags_t flags;
00505     IRQ_SAVE_DISABLE(flags);
00506
00507     /* Send data only if the SPI is not already transmitting */
00508     if (!hw->sending && !fifo_isempty(&ser_handles[SER_SPI0]->txfifo))
00509     {
00510         hw->sending = true;
00511         SPI0_TDR = fifo_pop(&ser_handles[SER_SPI0]->txfifo);
00512     }
00513
00514     IRQ_RESTORE(flags);
00515 }
00516
00517 static void spi0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
00518 {
00519     SPI0_CSR0 &= ~SPI_SCBR;
00520
00521     ASSERT((uint8_t)DIV_ROUND(CPU_FREQ, rate));
00522     SPI0_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT;
00523 }
00524
00525 #if CPU_ARM_SAM7X
00526 /* SPI driver */
00527 static void spi1_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser))
00528 {
00529     /* Disable PIO on SPI pins */
00530     PIOA_PDR = BV(SPI1_SPCK) | BV(SPI1_MOSI) | BV(SPI1_MISO);
00531
00532     /* SPI1 pins are on B peripheral function! */
00533     PIOA_BSR = BV(SPI1_SPCK) | BV(SPI1_MOSI) | BV(SPI1_MISO);
00534
00535     /* Reset device */
00536     SPI1_CR = BV(SPI_SWRST);
00537
00538     /*
00539      * Set SPI to master mode, fixed peripheral select, chip select directly connected to a peripheral device,
00540      * SPI clock set to MCK, mode fault detection disabled, loopback disable, NPCS0 active, Delay between CS = 0
00541      */
00542     SPI1_MR = BV(SPI_MSTR) | BV(SPI_MODFDIS);
00543
00544     /*
00545      * Set SPI mode.
00546      * At reset clock division factor is set to 0, that is
00547      * *forbidden*. Set SPI clock to minimum to keep it valid.
00548      */
00549     SPI1_CSR0 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT);
00550
00551     /* Disable all irqs */
00552     SPI1_IDR = 0xFFFFFFFF;
00553     /* Set the vector. */
00554     AIC_SVR(SPI1_ID) = spi1_irq_handler;
00555     /* Initialize to edge triggered with defined priority. */
00556     AIC_SMR(SPI1_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED | SERIRQ_PRIORITY;
00557     /* Enable the USART IRQ */
00558     AIC_IECR = BV(SPI1_ID);
00559     PMC_PCER = BV(SPI1_ID);
00560
00561     /* Enable interrupt on tx buffer empty */
00562     SPI1_IER = BV(SPI_TXEMPTY);
00563
00564     /* Enable SPI */
00565     SPI1_CR = BV(SPI_SPIEN);
00566
00567
00568     SER_SPI1_BUS_TXINIT;
00569
00570     SER_STROBE_INIT;
00571 }
00572
00573 static void spi1_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
00574 {
00575     /* Disable SPI */
00576     SPI1_CR = BV(SPI_SPIDIS);
00577
00578     /* Disable all irqs */
00579     SPI1_IDR = 0xFFFFFFFF;
00580
00581     SER_SPI1_BUS_TXCLOSE;
00582
00583     /* Enable PIO on SPI pins */
00584     PIOA_PER = BV(SPI1_SPCK) | BV(SPI1_MOSI) | BV(SPI1_MISO);
00585 }
00586
00587 static void spi1_starttx(struct SerialHardware *_hw)
00588 {
00589     struct ArmSerial *hw = (struct ArmSerial *)_hw;
00590
00591     cpu_flags_t flags;
00592     IRQ_SAVE_DISABLE(flags);
00593
00594     /* Send data only if the SPI is not already transmitting */
00595     if (!hw->sending && !fifo_isempty(&ser_handles[SER_SPI1]->txfifo))
00596     {
00597         hw->sending = true;
00598         SPI1_TDR = fifo_pop(&ser_handles[SER_SPI1]->txfifo);
00599     }
00600
00601     IRQ_RESTORE(flags);
00602 }
00603
00604 static void spi1_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
00605 {
00606     SPI1_CSR0 &= ~SPI_SCBR;
00607
00608     ASSERT((uint8_t)DIV_ROUND(CPU_FREQ, rate));
00609     SPI1_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT;
00610 }
00611 #endif
00612
00613 static void spi_setparity(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(int, parity))
00614 {
00615     // nop
00616 }
00617
00618
00619 static bool tx_sending(struct SerialHardware* _hw)
00620 {
00621     struct ArmSerial *hw = (struct ArmSerial *)_hw;
00622     return hw->sending;
00623 }
00624
00625 // FIXME: move into compiler.h?  Ditch?
00626 #if COMPILER_C99
00627     #define C99INIT(name,val) .name = val
00628 #elif defined(__GNUC__)
00629     #define C99INIT(name,val) name: val
00630 #else
00631     #warning No designated initializers, double check your code
00632     #define C99INIT(name,val) (val)
00633 #endif
00634
00635 /*
00636  * High-level interface data structures
00637  */
00638 static const struct SerialHardwareVT UART0_VT =
00639 {
00640     C99INIT(init, uart0_init),
00641     C99INIT(cleanup, uart0_cleanup),
00642     C99INIT(setBaudrate, uart0_setbaudrate),
00643     C99INIT(setParity, uart0_setparity),
00644     C99INIT(txStart, uart0_enabletxirq),
00645     C99INIT(txSending, tx_sending),
00646 };
00647
00648 static const struct SerialHardwareVT UART1_VT =
00649 {
00650     C99INIT(init, uart1_init),
00651     C99INIT(cleanup, uart1_cleanup),
00652     C99INIT(setBaudrate, uart1_setbaudrate),
00653     C99INIT(setParity, uart1_setparity),
00654     C99INIT(txStart, uart1_enabletxirq),
00655     C99INIT(txSending, tx_sending),
00656 };
00657
00658 static const struct SerialHardwareVT SPI0_VT =
00659 {
00660     C99INIT(init, spi0_init),
00661     C99INIT(cleanup, spi0_cleanup),
00662     C99INIT(setBaudrate, spi0_setbaudrate),
00663     C99INIT(setParity, spi_setparity),
00664     C99INIT(txStart, spi0_starttx),
00665     C99INIT(txSending, tx_sending),
00666 };
00667 #if CPU_ARM_SAM7X
00668 static const struct SerialHardwareVT SPI1_VT =
00669 {
00670     C99INIT(init, spi1_init),
00671     C99INIT(cleanup, spi1_cleanup),
00672     C99INIT(setBaudrate, spi1_setbaudrate),
00673     C99INIT(setParity, spi_setparity),
00674     C99INIT(txStart, spi1_starttx),
00675     C99INIT(txSending, tx_sending),
00676 };
00677 #endif
00678
00679 static struct ArmSerial UARTDescs[SER_CNT] =
00680 {
00681     {
00682         C99INIT(hw, ) {
00683             C99INIT(table, &UART0_VT),
00684             C99INIT(txbuffer, uart0_txbuffer),
00685             C99INIT(rxbuffer, uart0_rxbuffer),
00686             C99INIT(txbuffer_size, sizeof(uart0_txbuffer)),
00687             C99INIT(rxbuffer_size, sizeof(uart0_rxbuffer)),
00688         },
00689         C99INIT(sending, false),
00690     },
00691     {
00692         C99INIT(hw, ) {
00693             C99INIT(table, &UART1_VT),
00694             C99INIT(txbuffer, uart1_txbuffer),
00695             C99INIT(rxbuffer, uart1_rxbuffer),
00696             C99INIT(txbuffer_size, sizeof(uart1_txbuffer)),
00697             C99INIT(rxbuffer_size, sizeof(uart1_rxbuffer)),
00698         },
00699         C99INIT(sending, false),
00700     },
00701
00702     {
00703         C99INIT(hw, ) {
00704             C99INIT(table, &SPI0_VT),
00705             C99INIT(txbuffer, spi0_txbuffer),
00706             C99INIT(rxbuffer, spi0_rxbuffer),
00707             C99INIT(txbuffer_size, sizeof(spi0_txbuffer)),
00708             C99INIT(rxbuffer_size, sizeof(spi0_rxbuffer)),
00709         },
00710         C99INIT(sending, false),
00711     },
00712     #if CPU_ARM_SAM7X
00713     {
00714         C99INIT(hw, ) {
00715             C99INIT(table, &SPI1_VT),
00716             C99INIT(txbuffer, spi1_txbuffer),
00717             C99INIT(rxbuffer, spi1_rxbuffer),
00718             C99INIT(txbuffer_size, sizeof(spi1_txbuffer)),
00719             C99INIT(rxbuffer_size, sizeof(spi1_rxbuffer)),
00720         },
00721         C99INIT(sending, false),
00722     }
00723
00724     #endif
00725 };
00726
00727 struct SerialHardware *ser_hw_getdesc(int unit)
00728 {
00729     ASSERT(unit < SER_CNT);
00730     return &UARTDescs[unit].hw;
00731 }
00732
00736 INLINE void uart0_irq_tx(void)
00737 {
00738     SER_STROBE_ON;
00739
00740     struct FIFOBuffer * const txfifo = &ser_handles[SER_UART0]->txfifo;
00741
00742     if (fifo_isempty(txfifo))
00743     {
00744         /*
00745          * - Disable the TX empty interrupts
00746          */
00747         US0_IDR = BV(US_TXEMPTY);
00748         SER_UART0_BUS_TXEND;
00749         UARTDescs[SER_UART0].sending = false;
00750     }
00751     else
00752     {
00753         char c = fifo_pop(txfifo);
00754         SER_UART0_BUS_TXCHAR(c);
00755     }
00756
00757     SER_STROBE_OFF;
00758 }
00759
00763 INLINE void uart0_irq_rx(void)
00764 {
00765     SER_STROBE_ON;
00766
00767     /* Should be read before US_CRS */
00768     ser_handles[SER_UART0]->status |= US0_CSR & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR);
00769     US0_CR = BV(US_RSTSTA);
00770
00771     char c = US0_RHR;
00772     struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART0]->rxfifo;
00773
00774     if (fifo_isfull(rxfifo))
00775         ser_handles[SER_UART0]->status |= SERRF_RXFIFOOVERRUN;
00776     else
00777         fifo_push(rxfifo, c);
00778
00779     SER_STROBE_OFF;
00780 }
00781
00785 static DECLARE_ISR(uart0_irq_dispatcher)
00786 {
00787     if (US0_CSR & BV(US_RXRDY))
00788         uart0_irq_rx();
00789
00790     if (US0_CSR & BV(US_TXEMPTY))
00791         uart0_irq_tx();
00792
00793     /* Inform hw that we have served the IRQ */
00794     AIC_EOICR = 0;
00795 }
00796
00800 INLINE void uart1_irq_tx(void)
00801 {
00802     SER_STROBE_ON;
00803
00804     struct FIFOBuffer * const txfifo = &ser_handles[SER_UART1]->txfifo;
00805
00806     if (fifo_isempty(txfifo))
00807     {
00808         /*
00809          * - Disable the TX empty interrupts
00810          */
00811         US1_IDR = BV(US_TXEMPTY);
00812         SER_UART1_BUS_TXEND;
00813         UARTDescs[SER_UART1].sending = false;
00814     }
00815     else
00816     {
00817         char c = fifo_pop(txfifo);
00818         SER_UART1_BUS_TXCHAR(c);
00819     }
00820
00821     SER_STROBE_OFF;
00822 }
00823
00827 INLINE void uart1_irq_rx(void)
00828 {
00829     SER_STROBE_ON;
00830
00831     /* Should be read before US_CRS */
00832     ser_handles[SER_UART1]->status |= US1_CSR & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR);
00833     US1_CR = BV(US_RSTSTA);
00834
00835     char c = US1_RHR;
00836     struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART1]->rxfifo;
00837
00838     if (fifo_isfull(rxfifo))
00839         ser_handles[SER_UART1]->status |= SERRF_RXFIFOOVERRUN;
00840     else
00841         fifo_push(rxfifo, c);
00842
00843     SER_STROBE_OFF;
00844 }
00845
00849 static DECLARE_ISR(uart1_irq_dispatcher)
00850 {
00851     if (US1_CSR & BV(US_RXRDY))
00852         uart1_irq_rx();
00853
00854     if (US1_CSR & BV(US_TXEMPTY))
00855         uart1_irq_tx();
00856
00857     /* Inform hw that we have served the IRQ */
00858     AIC_EOICR = 0;
00859 }
00860
00864 static DECLARE_ISR(spi0_irq_handler)
00865 {
00866     SER_STROBE_ON;
00867
00868     char c = SPI0_RDR;
00869     /* Read incoming byte. */
00870     if (!fifo_isfull(&ser_handles[SER_SPI0]->rxfifo))
00871         fifo_push(&ser_handles[SER_SPI0]->rxfifo, c);
00872     /*
00873      * FIXME
00874     else
00875         ser_handles[SER_SPI0]->status |= SERRF_RXFIFOOVERRUN;
00876     */
00877
00878     /* Send */
00879     if (!fifo_isempty(&ser_handles[SER_SPI0]->txfifo))
00880         SPI0_TDR = fifo_pop(&ser_handles[SER_SPI0]->txfifo);
00881     else
00882         UARTDescs[SER_SPI0].sending = false;
00883
00884     /* Inform hw that we have served the IRQ */
00885     AIC_EOICR = 0;
00886     SER_STROBE_OFF;
00887 }
00888
00889
00890 #if CPU_ARM_SAM7X
00891
00894 static DECLARE_ISR(spi1_irq_handler)
00895 {
00896     SER_STROBE_ON;
00897
00898     char c = SPI1_RDR;
00899     /* Read incoming byte. */
00900     if (!fifo_isfull(&ser_handles[SER_SPI1]->rxfifo))
00901         fifo_push(&ser_handles[SER_SPI1]->rxfifo, c);
00902     /*
00903      * FIXME
00904     else
00905         ser_handles[SER_SPI1]->status |= SERRF_RXFIFOOVERRUN;
00906     */
00907
00908     /* Send */
00909     if (!fifo_isempty(&ser_handles[SER_SPI1]->txfifo))
00910         SPI1_TDR = fifo_pop(&ser_handles[SER_SPI1]->txfifo);
00911     else
00912         UARTDescs[SER_SPI1].sending = false;
00913
00914     /* Inform hw that we have served the IRQ */
00915     AIC_EOICR = 0;
00916     SER_STROBE_OFF;
00917 }
00918 #endif


BeRTOS: ser_at91.h File Reference

  • cpu
  • arm
  • drv
ser_at91.h File Reference

High level serial I/O API. More...

#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <cpu/detect.h>

Go to the source code of this file.

Enumerations

Serial hw numbers
enum | { , SER_CNT }

Serial Error/status flags.

#define | SERRF_RXFIFOOVERRUN BV(0)
Rx FIFO buffer overrun.
#define | SERRF_RXTIMEOUT BV(1)
Receive timeout.
#define | SERRF_TXTIMEOUT BV(2)
Transmit timeout.
#define | SERRF_RXSROVERRUN BV(5)
Rx shift register overrun.
#define | SERRF_FRAMEERROR BV(6)
Stop bit missing.
#define | SERRF_PARITYERROR BV(7)
Parity error.
#define | SERRF_NOISEERROR 0
Unsupported.
typedef uint32_t | serstatus_t
Rx FIFO buffer overrun.

Detailed Description

High level serial I/O API.

Author:
Daniele Basile <asterix@develer.com>

Definition in file ser_at91.h.

Enumeration Type Documentation

anonymous enum
Enumerator:
SER_CNT

Number of serial ports.

Definition at line 70 of file ser_at91.h.


BeRTOS: ser_at91.h Source File

  • cpu
  • arm
  • drv
ser_at91.h
Go to the documentation of this file.
00001
00039 #ifndef SER_AT91_H
00040 #define SER_AT91_H
00041
00042 #include <cfg/macros.h> /* BV() */
00043 #include <cfg/compiler.h>  /* uint32_t */
00044 #include <cpu/detect.h>  /* CPU_* */
00045
00047 /*\{*/
00048 typedef uint32_t serstatus_t;
00049
00050 /* Software errors */
00051 #define SERRF_RXFIFOOVERRUN  BV(0)
00052 #define SERRF_RXTIMEOUT      BV(1)
00053 #define SERRF_TXTIMEOUT      BV(2)
00055 /*
00056  * Hardware errors.
00057  * These flags map directly to the ARM USART Channel Status Register (US_CSR).
00058  */
00059 #define SERRF_RXSROVERRUN    BV(5)
00060 #define SERRF_FRAMEERROR     BV(6)
00061 #define SERRF_PARITYERROR    BV(7)
00062 #define SERRF_NOISEERROR     0
00063 /*\}*/
00064
00070 enum
00071 {
00072 SER_UART0,
00073 SER_UART1,
00074 SER_SPI0,
00075 #if CPU_ARM_SAM7X
00076 SER_SPI1,
00077 #endif
00078 SER_CNT
00079 };
00080 /*\}*/
00081
00082 #endif /* SER_AT91_H */


BeRTOS: ser_avr.c File Reference

  • cpu
  • avr
  • drv
ser_avr.c File Reference

AVR UART and SPI I/O driver (Implementation) More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

AVR UART and SPI I/O driver (Implementation)

Author:
Onno <developer@gorgoz.org>

This module is automatically included so no need to include in test list.

Definition in file ser_avr.c.


BeRTOS: ser_avr.c Source File

  • cpu
  • avr
  • drv
ser_avr.c
Go to the documentation of this file.
00001
00043 #ifndef WIZ_AUTOGEN
00044     #warning This file is deprecated, you should probably use ser_mega.c
00045
00046     #include <cpu/detect.h>
00047
00048     #if CPU_AVR_MEGA
00049         #include "ser_mega.c"
00050     #elif CPU_AVR_XMEGA
00051         #include "ser_xmega.c"
00052     /*#elif  Add other AVR families here */
00053     #else
00054         #error Unknown CPU
00055     #endif
00056 #endif /* WIZ_AUTOGEN */


BeRTOS: ser_avr.h File Reference

  • cpu
  • avr
  • drv
ser_avr.h File Reference

Low-level serial module for AVR (interface). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level serial module for AVR (interface).

Author:
Onno <developer@gorgoz.org>

Definition in file ser_avr.h.


BeRTOS: ser_avr.h Source File

  • cpu
  • avr
  • drv
ser_avr.h
Go to the documentation of this file.
00001
00039 #ifndef SER_AVR_H_
00040 #define SER_AVR_H_
00041
00042 #include <cpu/detect.h>
00043
00044 #if CPU_AVR_MEGA
00045     #include "ser_mega.h"
00046 #elif CPU_AVR_XMEGA
00047     #include "ser_xmega.h"
00048 /*#elif  Add other AVR families here */
00049 #else
00050     #error Unknown CPU
00051 #endif
00052
00053 #endif /* SER_AVR_H_ */


BeRTOS: ser_cm3.h File Reference

  • cpu
  • cortex-m3
  • drv
ser_cm3.h File Reference

Low-level serial module for Cortex-M3 (interface). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level serial module for Cortex-M3 (interface).

Author:
Andrea Righi <arighi@develer.com>

Definition in file ser_cm3.h.


BeRTOS: ser_cm3.h Source File

  • cpu
  • cortex-m3
  • drv
ser_cm3.h
Go to the documentation of this file.
00001
00038 #include <cpu/detect.h>
00039
00040 #if CPU_CM3_LM3S
00041     #include "ser_lm3s.h"
00042 #elif CPU_CM3_STM32
00043     #include "ser_stm32.h"
00044 #elif CPU_CM3_SAM3
00045     #include "ser_sam3.h"
00046 /*#elif  Add other Cortex-M3 CPUs here */
00047 #else
00048     #error Unknown CPU
00049 #endif


BeRTOS: ser_dsp56k.c File Reference

  • cpu
  • dsp56k
  • drv
ser_dsp56k.c File Reference

DSP5680x CPU specific serial I/O driver. More...

#include <drv/ser.h>
#include <drv/ser_p.h>
#include <drv/irq.h>
#include <cfg/debug.h>
#include <hw.h>
#include <DSP56F807.h>

Go to the source code of this file.

Detailed Description

DSP5680x CPU specific serial I/O driver.

Author:
Stefano Fedrigo <aleph@develer.com>
Giovanni Bajo <rasky@develer.com>

Definition in file ser_dsp56k.c.


BeRTOS: ser_dsp56k.c Source File

  • cpu
  • dsp56k
  • drv
ser_dsp56k.c
Go to the documentation of this file.
00001
00041 #include <drv/ser.h>
00042 #include <drv/ser_p.h>
00043 #include <drv/irq.h>
00044 #include <cfg/debug.h>
00045 #include <hw.h>
00046 #include <DSP56F807.h>
00047
00048 // GPIO E is shared with SPI (in DSP56807). Pins 0&1 are TXD0 and RXD0. To use
00049 //  the serial, we need to disable the GPIO functions on them.
00050 #define REG_GPIO_SERIAL_0       REG_GPIO_E
00051 #define REG_GPIO_SERIAL_MASK_0  0x03
00052
00053 #define REG_GPIO_SERIAL_1       REG_GPIO_D
00054 #define REG_GPIO_SERIAL_MASK_1  0xC0
00055
00056
00057 // Check flag consistency
00058 #if (SERRF_PARITYERROR != REG_SCI_SR_PF) || \
00059     (SERRF_RXSROVERRUN != REG_SCI_SR_OR) || \
00060     (SERRF_FRAMEERROR  != REG_SCI_SR_FE) || \
00061     (SERRF_NOISEERROR  != REG_SCI_SR_NF)
00062     #error error flags do not match with register bits
00063 #endif
00064
00065 static unsigned char ser0_fifo_rx[CONFIG_SER0_FIFOSIZE_RX];
00066 static unsigned char ser0_fifo_tx[CONFIG_SER0_FIFOSIZE_TX];
00067 static unsigned char ser1_fifo_rx[CONFIG_SER1_FIFOSIZE_RX];
00068 static unsigned char ser1_fifo_tx[CONFIG_SER1_FIFOSIZE_TX];
00069
00070 #if CONFIG_SER_MULTI
00071     #include <kern/sem.h>
00072
00073     #define MAX_MULTI_GROUPS     1
00074
00075     struct Semaphore multi_sems[MAX_MULTI_GROUPS];
00076 #endif
00077
00078
00079 struct SCI
00080 {
00081     struct SerialHardware hw;
00082     struct Serial* serial;
00083     volatile struct REG_SCI_STRUCT* regs;
00084     IRQ_VECTOR irq_tx;
00085     IRQ_VECTOR irq_rx;
00086     int num_group;
00087     int id;
00088 };
00089
00090 static inline void enable_tx_irq_bare(volatile struct REG_SCI_STRUCT* regs)
00091 {
00092     regs->CR |= REG_SCI_CR_TEIE | REG_SCI_CR_TIIE;
00093 }
00094
00095 static inline void enable_rx_irq_bare(volatile struct REG_SCI_STRUCT* regs)
00096 {
00097     regs->CR |= REG_SCI_CR_RIE;
00098 }
00099
00100 static inline void disable_tx_irq_bare(volatile struct REG_SCI_STRUCT* regs)
00101 {
00102     regs->CR &= ~(REG_SCI_CR_TEIE | REG_SCI_CR_TIIE);
00103 }
00104
00105 static inline void disable_rx_irq_bare(volatile struct REG_SCI_STRUCT* regs)
00106 {
00107     regs->CR &= ~(REG_SCI_CR_RIE | REG_SCI_CR_REIE);
00108 }
00109
00110 static inline void disable_tx_irq(struct SerialHardware* _hw)
00111 {
00112     struct SCI* hw = (struct SCI*)_hw;
00113
00114     disable_tx_irq_bare(hw->regs);
00115 }
00116
00117 static inline void disable_rx_irq(struct SerialHardware* _hw)
00118 {
00119     struct SCI* hw = (struct SCI*)_hw;
00120
00121     disable_rx_irq_bare(hw->regs);
00122 }
00123
00124 static inline void enable_tx_irq(struct SerialHardware* _hw)
00125 {
00126     struct SCI* hw = (struct SCI*)_hw;
00127
00128     enable_tx_irq_bare(hw->regs);
00129 }
00130
00131 static inline void enable_rx_irq(struct SerialHardware* _hw)
00132 {
00133     struct SCI* hw = (struct SCI*)_hw;
00134
00135     enable_rx_irq_bare(hw->regs);
00136 }
00137
00138 static inline bool tx_irq_enabled(struct SerialHardware* _hw)
00139 {
00140     struct SCI* hw = (struct SCI*)_hw;
00141
00142     return (hw->regs->CR & REG_SCI_CR_TEIE);
00143 }
00144
00145 static void tx_isr(const struct SCI *hw)
00146 {
00147 #pragma interrupt warn
00148     volatile struct REG_SCI_STRUCT* regs = hw->regs;
00149
00150     if (fifo_isempty(&hw->serial->txfifo))
00151         disable_tx_irq_bare(regs);
00152     else
00153     {
00154         // Clear transmitter flags before sending data
00155         (void)regs->SR;
00156         regs->DR = fifo_pop(&hw->serial->txfifo);
00157     }
00158 }
00159
00160 static void rx_isr(const struct SCI *hw)
00161 {
00162 #pragma interrupt warn
00163     volatile struct REG_SCI_STRUCT* regs = hw->regs;
00164
00165     // Propagate errors
00166     hw->serial->status |= regs->SR & (SERRF_PARITYERROR |
00167                                       SERRF_RXSROVERRUN |
00168                                       SERRF_FRAMEERROR |
00169                                       SERRF_NOISEERROR);
00170
00171     /*
00172      * Serial IRQ can happen for two reason: data ready (RDRF) or overrun (OR)
00173      * If the data is ready, we need to fetch it from the data register or
00174      * the interrupt will retrigger immediatly. In case of overrun, instead,
00175      * the value of the data register is meaningless.
00176      */
00177     if (regs->SR & REG_SCI_SR_RDRF)
00178     {
00179         unsigned char data = regs->DR;
00180
00181         if (fifo_isfull(&hw->serial->rxfifo))
00182             hw->serial->status |= SERRF_RXFIFOOVERRUN;
00183         else
00184             fifo_push(&hw->serial->rxfifo, data);
00185     }
00186
00187     // Writing anything to the status register clear the error bits.
00188     regs->SR = 0;
00189 }
00190
00191 static void init(struct SerialHardware* _hw, struct Serial* ser)
00192 {
00193     struct SCI* hw = (struct SCI*)_hw;
00194     volatile struct REG_SCI_STRUCT* regs = hw->regs;
00195
00196     // Clear status register (IRQ/status flags)
00197     (void)regs->SR;
00198     regs->SR = 0;
00199
00200     // Clear data register
00201     (void)regs->DR;
00202
00203     // Install the handlers and set priorities for both IRQs
00204     irq_install(hw->irq_tx, (isr_t)tx_isr, hw);
00205     irq_install(hw->irq_rx, (isr_t)rx_isr, hw);
00206     irq_setpriority(hw->irq_tx, IRQ_PRIORITY_SCI_TX);
00207     irq_setpriority(hw->irq_rx, IRQ_PRIORITY_SCI_RX);
00208
00209     // Activate the RX error interrupts, and RX/TX transmissions
00210     regs->CR = REG_SCI_CR_TE | REG_SCI_CR_RE;
00211     enable_rx_irq_bare(regs);
00212
00213     // Disable GPIO pins for TX and RX lines
00214     // \todo this should be divided into serial 0 and 1
00215     REG_GPIO_SERIAL_0->PER |= REG_GPIO_SERIAL_MASK_0;
00216     REG_GPIO_SERIAL_1->PER |= REG_GPIO_SERIAL_MASK_1;
00217
00218     hw->serial = ser;
00219 }
00220
00221 static void cleanup(struct SerialHardware* _hw)
00222 {
00223     struct SCI* hw = (struct SCI*)_hw;
00224
00225     // Uninstall the ISRs
00226     disable_rx_irq(_hw);
00227     disable_tx_irq(_hw);
00228     irq_uninstall(hw->irq_tx);
00229     irq_uninstall(hw->irq_rx);
00230 }
00231
00232 static void setbaudrate(struct SerialHardware* _hw, unsigned long rate)
00233 {
00234     struct SCI* hw = (struct SCI*)_hw;
00235
00236     // SCI has an internal 16x divider on the input clock, which comes
00237     //  from the IPbus (see the scheme in user manual, 12.7.3). We apply
00238     //  it to calculate the period to store in the register.
00239     hw->regs->BR = (IPBUS_FREQ + rate * 8ul) / (rate * 16ul);
00240 }
00241
00242 static void setparity(struct SerialHardware* _hw, int parity)
00243 {
00244     // ???
00245     ASSERT(0);
00246 }
00247
00248
00249 #if CONFIG_SER_MULTI
00250
00251 static void multi_init(void)
00252 {
00253     static bool flag = false;
00254     int i;
00255
00256     if (flag)
00257         return;
00258
00259     for (i = 0; i < MAX_MULTI_GROUPS; ++i)
00260         sem_init(&multi_sems[i]);
00261     flag = true;
00262 }
00263
00264 static void init_lock(struct SerialHardware* _hw, struct Serial *ser)
00265 {
00266     struct SCI* hw = (struct SCI*)_hw;
00267
00268     // Initialize the multi engine (if needed)
00269     multi_init();
00270
00271     // Acquire the lock of the semaphore for this group
00272     ASSERT(hw->num_group >= 0);
00273     ASSERT(hw->num_group < MAX_MULTI_GROUPS);
00274     sem_obtain(&multi_sems[hw->num_group]);
00275
00276     // Do a hardware switch to the given serial
00277     ser_hw_switch(hw->num_group, hw->id);
00278
00279     init(_hw, ser);
00280 }
00281
00282 static void cleanup_unlock(struct SerialHardware* _hw)
00283 {
00284     struct SCI* hw = (struct SCI*)_hw;
00285
00286     cleanup(_hw);
00287
00288     sem_release(&multi_sems[hw->num_group]);
00289 }
00290
00291 #endif /* CONFIG_SER_MULTI */
00292
00293
00294 static const struct SerialHardwareVT SCI_VT =
00295 {
00296     .init = init,
00297     .cleanup = cleanup,
00298     .setBaudrate = setbaudrate,
00299     .setParity = setparity,
00300     .txStart = enable_tx_irq,
00301     .txSending = tx_irq_enabled,
00302 };
00303
00304 #if CONFIG_SER_MULTI
00305 static const struct SerialHardwareVT SCI_MULTI_VT =
00306 {
00307     .init = init_lock,
00308     .cleanup = cleanup_unlock,
00309     .setBaudrate = setbaudrate,
00310     .setParity = setparity,
00311     .txStart = enable_tx_irq,
00312     .txSending = tx_irq_enabled,
00313 };
00314 #endif /* CONFIG_SER_MULTI */
00315
00316 #define SCI_DESC_NORMAL(hwch) \
00317     { \
00318         .hw = \
00319         { \
00320             .table = &SCI_VT, \
00321             .rxbuffer = ser ## hwch ## _fifo_rx, \
00322             .txbuffer = ser ## hwch ## _fifo_tx, \
00323             .rxbuffer_size = countof(ser ## hwch ## _fifo_rx), \
00324             .txbuffer_size = countof(ser ## hwch ## _fifo_tx), \
00325         }, \
00326         .regs = &REG_SCI[hwch], \
00327         .irq_rx = IRQ_SCI ## hwch ## _RECEIVER_FULL, \
00328         .irq_tx = IRQ_SCI ## hwch ## _TRANSMITTER_READY, \
00329         .num_group = -1, \
00330         .id = -1, \
00331     } \
00332
00333
00334 #if CONFIG_SER_MULTI
00335 #define SCI_DESC_MULTI(hwch, group_, id_) \
00336     { \
00337         .hw = \
00338         { \
00339             .table = &SCI_MULTI_VT, \
00340             .rxbuffer = ser ## hwch ## _fifo_rx, \
00341             .txbuffer = ser ## hwch ## _fifo_tx, \
00342             .rxbuffer_size = countof(ser ## hwch ## _fifo_rx), \
00343             .txbuffer_size = countof(ser ## hwch ## _fifo_tx), \
00344         }, \
00345         .regs = &REG_SCI[hwch], \
00346         .irq_rx = IRQ_SCI ## hwch ## _RECEIVER_FULL, \
00347         .irq_tx = IRQ_SCI ## hwch ## _TRANSMITTER_READY, \
00348         .num_group = group_, \
00349         .id = id_, \
00350     } \
00351
00352 #endif /* CONFIG_SER_MULTI */
00353
00354 // \todo Move this into hw.h, with a little preprocessor magic
00355 static struct SCI SCIDescs[] =
00356 {
00357     SCI_DESC_NORMAL(0),
00358     SCI_DESC_MULTI(1, 0, 0),
00359     SCI_DESC_MULTI(1, 0, 1),
00360 };
00361
00362 struct SerialHardware* ser_hw_getdesc(int unit)
00363 {
00364     ASSERT(unit < countof(SCIDescs));
00365     return &SCIDescs[unit].hw;
00366 }


BeRTOS: ser_dsp56k.h File Reference

  • cpu
  • dsp56k
  • drv
Defines
ser_dsp56k.h File Reference

Low-level serial module for ARM (interface). More...

#include <cfg/macros.h>
#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define | SERRF_RXFIFOOVERRUN BV(0)
Rx FIFO buffer overrun.
#define | SERRF_RXTIMEOUT BV(1)
Receive timeout.
#define | SERRF_TXTIMEOUT BV(2)
Transmit timeout.
#define | SERRF_PARITYERROR BV(8)
Parity error.
#define | SERRF_FRAMEERROR BV(9)
Stop bit missing.
#define | SERRF_NOISEERROR BV(10)
Noise error.
#define | SERRF_RXSROVERRUN BV(11)
Rx shift register overrun.

Enumerations

Serial hw numbers
enum | { , SER_CNT }

Detailed Description

Low-level serial module for ARM (interface).

Author:
Daniele Basile <asterix@develer.com>

Definition in file ser_dsp56k.h.

Enumeration Type Documentation

anonymous enum
Enumerator:
SER_CNT

Number of serial ports.

Definition at line 63 of file ser_dsp56k.h.


BeRTOS: ser_dsp56k.h Source File

  • cpu
  • dsp56k
  • drv
ser_dsp56k.h
Go to the documentation of this file.
00001
00039 #include <cfg/macros.h> /* BV() */
00040 #include <cfg/compiler.h>  /* uint32_t */
00041
00042 typedef uint16_t serstatus_t;
00043
00044 /* Software errors */
00045 #define SERRF_RXFIFOOVERRUN  BV(0)
00046 #define SERRF_RXTIMEOUT      BV(1)
00047 #define SERRF_TXTIMEOUT      BV(2)
00049 /*
00050     * Hardware errors.
00051     * These flags map directly to the SCI Control Register.
00052     */
00053 #define SERRF_PARITYERROR    BV(8)
00054 #define SERRF_FRAMEERROR     BV(9)
00055 #define SERRF_NOISEERROR     BV(10)
00056 #define SERRF_RXSROVERRUN    BV(11)
00063 enum
00064 {
00065 // \todo since we now support "fake" multiplexed serials, this should be moved to hw.h
00066 SER_UART0,
00067 SER_PUNTALI,
00068 SER_BARCODE,
00069 SER_CNT
00070 };
00071 /*\}*/


BeRTOS: ser_i196.c File Reference

  • cpu
  • i196
  • drv
ser_i196.c File Reference

CPU specific serial I/O driver. More...

#include "hw.h"
#include "serhw.h"

Go to the source code of this file.

Detailed Description

CPU specific serial I/O driver.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file ser_i196.c.


BeRTOS: ser_i196.c Source File

  • cpu
  • i196
  • drv
ser_i196.c
Go to the documentation of this file.
00001
00040 /*#*
00041  *#* $Log$
00042  *#* Revision 1.7  2006/07/19 12:56:26  bernie
00043  *#* Convert to new Doxygen style.
00044  *#*
00045  *#* Revision 1.6  2005/11/04 16:20:02  bernie
00046  *#* Fix reference to README.devlib in header.
00047  *#*
00048  *#* Revision 1.5  2004/12/13 11:51:08  bernie
00049  *#* DISABLE_INTS/ENABLE_INTS: Convert to IRQ_DISABLE/IRQ_ENABLE.
00050  *#*
00051  *#* Revision 1.4  2004/08/25 14:12:08  rasky
00052  *#* Aggiornato il comment block dei log RCS
00053  *#*
00054  *#* Revision 1.3  2004/06/03 11:27:09  bernie
00055  *#* Add dual-license information.
00056  *#*
00057  *#* Revision 1.2  2004/05/23 18:21:53  bernie
00058  *#* Trim CVS logs and cleanup header info.
00059  *#*
00060  *#*/
00061
00062 #include "hw.h"
00063 #include "serhw.h"
00064
00065 #define SER_HW_ENABLE_TX \
00066     ATOMIC( \
00067         if (!ser_sending) \
00068         { \
00069             ser_sending = true; \
00070             (INT_PEND1 |= INT1F_TI) \
00071         } \
00072     );
00073
00074 static volatile bool ser_sending;
00075
00076 // Serial TX intr
00077 INTERRUPT(0x30) void TI_interrupt(void)
00078 {
00079     if (CANT_SEND)
00080     {
00081         ser_sending = false;
00082         return;
00083     }
00084
00085     /* Can we send two bytes at the same time? */
00086     if (SP_STAT & SPSF_TX_EMPTY)
00087     {
00088         SBUF = fifo_pop(&ser_txfifo);
00089
00090         if (CANT_SEND)
00091         {
00092             ser_sending = false;
00093             return;
00094         }
00095     }
00096
00097     SBUF = fifo_pop(&ser_txfifo);
00098 }
00099
00100 INTERRUPT(0x32) void RI_interrupt(void)
00101 {
00102     ser_status |= SP_STAT &
00103         (SPSF_OVERRUN_ERROR | SPSF_PARITY_ERROR | SPSF_FRAMING_ERROR);
00104     if (fifo_isfull(&ser_rxfifo))
00105         ser_status |= SERRF_RXFIFOOVERRUN;
00106     else
00107         fifo_push(&ser_rxfifo, SBUF);
00108 }
00109
00110 static void ser_setbaudrate(unsigned long rate)
00111 {
00112     // Calcola il periodo per la generazione del baud rate richiesto
00113     uint16_t baud = (uint16_t)(((CPU_FREQ / 16) / rate) - 1) | 0x8000;
00114     BAUD_RATE = (uint8_t)baud;
00115     BAUD_RATE = (uint8_t)(baud >> 8);
00116 }
00117
00118 static void ser_hw_init(void)
00119 {
00120     // Inizializza la porta seriale
00121     SP_CON = SPCF_RECEIVE_ENABLE | SPCF_MODE1;
00122     ioc1_img |= IOC1F_TXD_SEL | IOC1F_EXTINT_SRC;
00123     IOC1 = ioc1_img;
00124
00125     // Svuota il buffer di ricezione
00126     {
00127         uint8_t dummy = SBUF;
00128     }
00129
00130     // Abilita gli interrupt
00131     INT_MASK1 |= INT1F_TI | INT1F_RI;
00132 }
00133


BeRTOS: ser_lm3s.c File Reference

  • cpu
  • cortex-m3
  • drv
ser_lm3s.c File Reference

LM3S1968 UART interface driver. More...

#include <cfg/macros.h>
#include <drv/gpio_lm3s.h>
#include <drv/ser_p.h>
#include <drv/ser.h>
#include <drv/irq_cm3.h>
#include "cfg/cfg_ser.h"
#include "ser_lm3s.h"

Go to the source code of this file.

Detailed Description

LM3S1968 UART interface driver.

Author:
Andrea Righi <arighi@develer.com>

Definition in file ser_lm3s.c.


BeRTOS: ser_lm3s.c Source File

  • cpu
  • cortex-m3
  • drv
ser_lm3s.c
Go to the documentation of this file.
00001
00038 #include <cfg/macros.h> /* for BV() */
00039 #include <drv/gpio_lm3s.h>
00040 #include <drv/ser_p.h>
00041 #include <drv/ser.h>
00042 #include <drv/irq_cm3.h>
00043 #include "cfg/cfg_ser.h"
00044 #include "ser_lm3s.h"
00045
00046 /* From the high-level serial driver */
00047 extern struct Serial *ser_handles[SER_CNT];
00048
00049 struct CM3Serial
00050 {
00051     struct SerialHardware hw;
00052     bool sending;
00053     uint32_t base;
00054     sysirq_t irq;
00055 };
00056
00057 /* Forward declaration */
00058 static struct CM3Serial UARTDesc[SER_CNT];
00059
00060 /* GPIO descriptor for UART pins */
00061 struct gpio_uart_info
00062 {
00063     /* Sysctl */
00064     uint32_t sysctl;
00065     /* GPIO base address register */
00066     uint32_t base;
00067     /* Pin(s) bitmask */
00068     uint8_t pins;
00069 };
00070
00071 /* Table to retrieve GPIO pins configuration to work as UART pins */
00072 static const struct gpio_uart_info gpio_uart[SER_CNT] =
00073 {
00074     /* UART0 */
00075     {
00076         .base = GPIO_PORTA_BASE,
00077         .pins = BV(1) | BV(0),
00078         .sysctl = SYSCTL_RCGC2_GPIOA,
00079     },
00080     /* UART1 */
00081     {
00082         .base = GPIO_PORTD_BASE,
00083         .pins = BV(3) | BV(2),
00084         .sysctl = SYSCTL_RCGC2_GPIOD,
00085     },
00086     /* UART2 */
00087     {
00088         .base = GPIO_PORTG_BASE,
00089         .pins = BV(1) | BV(0),
00090         .sysctl = SYSCTL_RCGC2_GPIOG,
00091     },
00092 };
00093
00094 void lm3s_uartSetBaudRate(uint32_t base, unsigned long baud)
00095 {
00096     unsigned long div;
00097     bool hi_speed;
00098
00099     if (baud * 16 > CPU_FREQ)
00100     {
00101         hi_speed = true;
00102         baud /= 2;
00103     }
00104     div = (CPU_FREQ * 8 / baud + 1) / 2;
00105
00106     lm3s_uartDisable(base);
00107     if (hi_speed)
00108         HWREG(base + UART_O_CTL) |= UART_CTL_HSE;
00109     else
00110         HWREG(base + UART_O_CTL) &= ~UART_CTL_HSE;
00111     /* Set the baud rate */
00112     HWREG(base + UART_O_IBRD) = div / 64;
00113     HWREG(base + UART_O_FBRD) = div % 64;
00114     lm3s_uartClear(base);
00115     lm3s_uartEnable(base);
00116 }
00117
00118 void lm3s_uartSetParity(uint32_t base, int parity)
00119 {
00120     /* Set 8-bit word, one stop bit by default */
00121     uint32_t config = UART_LCRH_WLEN_8;
00122
00123     switch(parity)
00124     {
00125     case SER_PARITY_NONE:
00126         break;
00127     case SER_PARITY_ODD:
00128         config |= UART_LCRH_PEN;
00129         break;
00130     case SER_PARITY_EVEN:
00131         config |= UART_LCRH_EPS | UART_LCRH_PEN;
00132         break;
00133     default:
00134         ASSERT(0);
00135         return;
00136     }
00137     lm3s_uartDisable(base);
00138     HWREG(base + UART_O_LCRH) = config;
00139     lm3s_uartClear(base);
00140     lm3s_uartEnable(base);
00141 }
00142
00143 void lm3s_uartInit(int port)
00144 {
00145     uint32_t reg_clock, base;
00146
00147     ASSERT(port >= 0 && port < SER_CNT);
00148
00149     base = UARTDesc[port].base;
00150     reg_clock = 1 << port;
00151
00152     /* Enable the peripheral clock */
00153     SYSCTL_RCGC1_R |= reg_clock;
00154     SYSCTL_RCGC2_R |= gpio_uart[port].sysctl;
00155     lm3s_busyWait(512);
00156
00157     /* Configure GPIO pins to work as UART pins */
00158     lm3s_gpioPinConfig(gpio_uart[port].base, gpio_uart[port].pins,
00159             GPIO_DIR_MODE_HW, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
00160
00161     /* Set serial param: 115.200 bps, no parity */
00162     lm3s_uartSetBaudRate(base, 115200);
00163     lm3s_uartSetParity(base, SER_PARITY_NONE);
00164 }
00165
00166 static bool tx_sending(struct SerialHardware *_hw)
00167 {
00168     struct CM3Serial *hw = (struct CM3Serial *)_hw;
00169     return hw->sending;
00170 }
00171
00172 static void uart_irq_rx(int port)
00173 {
00174     struct FIFOBuffer *rxfifo = &ser_handles[port]->rxfifo;
00175     uint32_t base = UARTDesc[port].base;
00176     char c;
00177
00178     while (lm3s_uartRxReady(base))
00179     {
00180         c = HWREG(base + UART_O_DR);
00181         if (fifo_isfull(rxfifo))
00182             ser_handles[port]->status |= SERRF_RXFIFOOVERRUN;
00183         else
00184             fifo_push(rxfifo, c);
00185     }
00186 }
00187
00188 static void uart_irq_tx(int port)
00189 {
00190     struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo;
00191     uint32_t base = UARTDesc[port].base;
00192
00193     while (lm3s_uartTxReady(base))
00194     {
00195         if (fifo_isempty(txfifo))
00196         {
00197             /*
00198              * Disable TX empty interrupts if there're no more
00199              * characters to transmit.
00200              */
00201             HWREG(base + UART_O_IM) &= ~UART_IM_TXIM;
00202             UARTDesc[port].sending = false;
00203             break;
00204         }
00205         HWREG(base + UART_O_DR) = fifo_pop(txfifo);
00206     }
00207 }
00208
00209 static void uart_common_irq_handler(int port)
00210 {
00211     uint32_t base = UARTDesc[port].base;
00212     uint32_t status;
00213
00214     /* Read and clear the IRQ status */
00215     status = HWREG(base + UART_O_RIS);
00216
00217     /* Process the IRQ */
00218     if (status & (UART_RIS_RXRIS | UART_RIS_RTRIS))
00219         uart_irq_rx(port);
00220     if (status & UART_RIS_TXRIS)
00221         uart_irq_tx(port);
00222 }
00223
00224 static void lm3s_uartIRQEnable(int port, sysirq_handler_t handler)
00225 {
00226     uint32_t base = UARTDesc[port].base;
00227     sysirq_t irq = UARTDesc[port].irq;
00228
00229     /* Register the IRQ handler */
00230     sysirq_setHandler(irq, handler);
00231     /* Enable RX interrupt in the UART interrupt mask register */
00232     HWREG(base + UART_O_IM) |= UART_IM_RXIM | UART_IM_RTIM;
00233 }
00234
00235 static void lm3s_uartIRQDisable(int port)
00236 {
00237     uint32_t base = UARTDesc[port].base;
00238
00239     HWREG(base + UART_O_IM) &=
00240             ~(UART_IM_TXIM | UART_IM_RXIM | UART_IM_RTIM);
00241 }
00242
00243 /* UART class definition */
00244 #define UART_PORT(port)                             \
00245     /* UART TX and RX buffers */                        \
00246     static unsigned char                            \
00247         uart ## port ## _txbuffer[CONFIG_UART ## port ## _TXBUFSIZE];   \
00248     static unsigned char                            \
00249         uart ## port ## _rxbuffer[CONFIG_UART ## port ## _RXBUFSIZE];   \
00250                                         \
00251     /* UART interrupt handler */                        \
00252     static DECLARE_ISR(uart ## port ## _irq_handler)            \
00253     {                                   \
00254         uart_common_irq_handler(port);                  \
00255     }                                   \
00256                                         \
00257     /* UART public methods */                       \
00258     static void                             \
00259     uart ## port ## _txStart(struct SerialHardware *_hw)            \
00260     {                                   \
00261         struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo;     \
00262         struct CM3Serial *hw = (struct CM3Serial *)_hw;         \
00263                                         \
00264                 if (hw->sending)                        \
00265                         return;                         \
00266         lm3s_uartPutChar(UART ## port ## _BASE, fifo_pop(txfifo));  \
00267         if (!fifo_isempty(txfifo))                  \
00268         {                               \
00269             HWREG(UART ## port ## _BASE + UART_O_IM) |=     \
00270                          UART_IM_TXIM;          \
00271             hw->sending = true;                 \
00272         }                               \
00273     }                                   \
00274                                         \
00275     static void                             \
00276     uart ## port ## _setbaudrate(UNUSED_ARG(struct SerialHardware *, hw),   \
00277                         unsigned long baud)     \
00278     {                                   \
00279         lm3s_uartSetBaudRate(UART ## port ## _BASE, baud);      \
00280     }                                   \
00281                                         \
00282     static void                             \
00283     uart ## port ## _setparity(UNUSED_ARG(struct SerialHardware *, hw), \
00284                         int parity)         \
00285     {                                   \
00286         lm3s_uartSetParity(UART ## port ## _BASE, parity);      \
00287     }                                   \
00288                                         \
00289     static void                             \
00290     uart ## port ## _cleanup(struct SerialHardware *_hw)            \
00291     {                                   \
00292         struct CM3Serial *hw = (struct CM3Serial *)_hw;         \
00293                                         \
00294         hw->sending = false;                        \
00295         lm3s_uartIRQDisable(port);                  \
00296         lm3s_uartClear(UART ## port ## _BASE);              \
00297         lm3s_uartDisable(UART ## port ## _BASE);            \
00298     }                                   \
00299                                         \
00300     static void                             \
00301     uart ## port ## _init(UNUSED_ARG(struct SerialHardware *, hw),      \
00302                 UNUSED_ARG(struct Serial *, ser))       \
00303     {                                   \
00304         lm3s_uartInit(port);                        \
00305         lm3s_uartEnable(UART ## port ## _BASE);             \
00306         lm3s_uartIRQEnable(port, uart ## port ## _irq_handler);     \
00307     }                                   \
00308                                         \
00309     /* UART operations */                           \
00310     static const struct SerialHardwareVT UART ## port ## _VT =      \
00311     {                                   \
00312         .init = uart ## port ## _init,                  \
00313         .cleanup = uart ## port ## _cleanup,                \
00314         .setBaudrate = uart ## port ## _setbaudrate,            \
00315         .setParity = uart ## port ## _setparity,            \
00316         .txStart = uart ## port ## _txStart,                \
00317         .txSending = tx_sending,                    \
00318     };
00319
00320 /* UART port instances */
00321 UART_PORT(0)
00322 UART_PORT(1)
00323 UART_PORT(2)
00324
00325 static struct CM3Serial UARTDesc[SER_CNT] =
00326 {
00327     {
00328         .hw = {
00329             .table = &UART0_VT,
00330             .txbuffer = uart0_txbuffer,
00331             .rxbuffer = uart0_rxbuffer,
00332             .txbuffer_size = sizeof(uart0_txbuffer),
00333             .rxbuffer_size = sizeof(uart0_rxbuffer),
00334         },
00335         .sending = false,
00336         .base = UART0_BASE,
00337         .irq = INT_UART0,
00338     },
00339     {
00340         .hw = {
00341             .table = &UART1_VT,
00342             .txbuffer = uart1_txbuffer,
00343             .rxbuffer = uart1_rxbuffer,
00344             .txbuffer_size = sizeof(uart1_txbuffer),
00345             .rxbuffer_size = sizeof(uart1_rxbuffer),
00346         },
00347         .sending = false,
00348         .base = UART1_BASE,
00349         .irq = INT_UART1,
00350     },
00351     {
00352         .hw = {
00353             .table = &UART2_VT,
00354             .txbuffer = uart2_txbuffer,
00355             .rxbuffer = uart2_rxbuffer,
00356             .txbuffer_size = sizeof(uart2_txbuffer),
00357             .rxbuffer_size = sizeof(uart2_rxbuffer),
00358         },
00359         .sending = false,
00360         .base = UART2_BASE,
00361         .irq = INT_UART2,
00362     },
00363 };
00364
00365 struct SerialHardware *ser_hw_getdesc(int port)
00366 {
00367     ASSERT(port >= 0 && port < SER_CNT);
00368     return &UARTDesc[port].hw;
00369 }


BeRTOS: ser_lm3s.h File Reference

  • cpu
  • cortex-m3
  • drv
ser_lm3s.h File Reference

LM3S1968 UART interface driver. More...

#include <cfg/cfg_debug.h>
#include <cpu/power.h>
#include <drv/clock_lm3s.h>
#include <io/lm3s.h>

Go to the source code of this file.

Detailed Description

LM3S1968 UART interface driver.

Author:
Andrea Righi <arighi@develer.com>

Definition in file ser_lm3s.h.


BeRTOS: ser_lm3s.h Source File

  • cpu
  • cortex-m3
  • drv
ser_lm3s.h
Go to the documentation of this file.
00001
00038 #ifndef SER_LM3S_H
00039 #define SER_LM3S_H
00040
00041 #include <cfg/cfg_debug.h>
00042 #include <cpu/power.h> /* cpu_relax() */
00043 #include <drv/clock_lm3s.h> /* lm3s_busyWait() */
00044 #include <io/lm3s.h>
00045
00046 /* Serial hardware numbers */
00047 enum
00048 {
00049     SER_UART0,
00050     SER_UART1,
00051     SER_UART2,
00052
00053     SER_CNT //< Number of serial ports
00054 };
00055
00056 /* Software errors */
00057 #define SERRF_RXFIFOOVERRUN  BV(0) //< Rx FIFO buffer overrun
00058 #define SERRF_RXTIMEOUT      BV(1) //< Receive timeout
00059 #define SERRF_TXTIMEOUT      BV(2) //< Transmit timeout
00060
00061 /*
00062  * Hardware errors.
00063  */
00064 #define SERRF_RXSROVERRUN    0 //< Input overrun
00065 #define SERRF_FRAMEERROR     0 //< Stop bit missing
00066 #define SERRF_PARITYERROR    0 //< Parity error
00067 #define SERRF_NOISEERROR     0 //< Noise error
00068
00069 /* Serial error/status flags */
00070 typedef uint32_t serstatus_t;
00071
00072 INLINE void lm3s_uartDisable(uint32_t base)
00073 {
00074     /* Disable the hardware FIFO */
00075     HWREG(base + UART_O_LCRH) &= ~UART_LCRH_FEN;
00076
00077     /* Disable the UART */
00078     HWREG(base + UART_O_CTL) &=
00079         ~(UART_CTL_UARTEN | UART_CTL_TXE | UART_CTL_RXE);
00080     lm3s_busyWait(512);
00081 }
00082
00083 INLINE void lm3s_uartEnable(uint32_t base)
00084 {
00085     /* Enable the hardware FIFO */
00086     HWREG(base + UART_O_LCRH) |= UART_LCRH_FEN;
00087
00088     /* Enable RX, TX, and the UART */
00089     HWREG(base + UART_O_CTL) |=
00090             UART_CTL_UARTEN | UART_CTL_TXE | UART_CTL_RXE;
00091     lm3s_busyWait(512);
00092 }
00093
00094 /* Clear the flags register */
00095 INLINE void lm3s_uartClear(uint32_t base)
00096 {
00097     HWREG(base + UART_O_FR) = 0;
00098 }
00099
00100 INLINE bool lm3s_uartTxDone(uint32_t base)
00101 {
00102     return HWREG(base + UART_O_FR) & UART_FR_TXFE ? true : false;
00103 }
00104
00105 INLINE bool lm3s_uartTxReady(uint32_t base)
00106 {
00107     return HWREG(base + UART_O_FR) & UART_FR_TXFF ? false : true;
00108 }
00109
00110 INLINE bool lm3s_uartRxReady(uint32_t base)
00111 {
00112     return HWREG(base + UART_O_FR) & UART_FR_RXFE ? false : true;
00113 }
00114
00115 INLINE bool lm3s_uartReady(uint32_t base)
00116 {
00117     return HWREG(base + UART_O_FR) & UART_FR_BUSY ? false : true;
00118 }
00119
00120 INLINE int lm3s_uartPutCharNonBlocking(uint32_t base, unsigned char c)
00121 {
00122     if (!lm3s_uartTxReady(base))
00123         return EOF;
00124     HWREG(base + UART_O_DR) = c;
00125     return c;
00126 }
00127
00128 INLINE int lm3s_uartPutChar(uint32_t base, unsigned char c)
00129 {
00130     while (!lm3s_uartTxReady(base))
00131         cpu_relax();
00132     HWREG(base + UART_O_DR) = c;
00133     return c;
00134 }
00135
00136 INLINE int lm3s_uartGetCharNonBlocking(uint32_t base)
00137 {
00138     if (!lm3s_uartRxReady(base))
00139         return EOF;
00140     return HWREG(base + UART_O_DR);
00141 }
00142
00143 INLINE int lm3s_uartGetChar(uint32_t base)
00144 {
00145     while (!lm3s_uartRxReady(base))
00146         cpu_relax();
00147     return HWREG(base + UART_O_DR);
00148 }
00149
00150 void lm3s_uartSetBaudRate(uint32_t base, unsigned long baud);
00151 void lm3s_uartSetParity(uint32_t base, int parity);
00152 void lm3s_uartInit(int port);
00153
00154 #endif /* SER_LM3S_H */


BeRTOS: ser_lpc2.c File Reference

  • cpu
  • arm
  • drv
ser_lpc2.c File Reference

LPC23xx UART driver. More...

#include "ser_lpc2.h"
#include "cfg/cfg_ser.h"
#include <cfg/macros.h>
#include <cpu/power.h>
#include <drv/ser_p.h>
#include <drv/ser.h>
#include <drv/vic_lpc2.h>
#include <io/lpc23xx.h>

Go to the source code of this file.

Detailed Description

LPC23xx UART driver.

Author:
Andrea Righi <arighi@develer.com>

Definition in file ser_lpc2.c.


BeRTOS: ser_lpc2.c Source File

  • cpu
  • arm
  • drv
ser_lpc2.c
Go to the documentation of this file.
00001
00040 #include "ser_lpc2.h"
00041
00042 #include "cfg/cfg_ser.h"
00043
00044 #include <cfg/macros.h> /* for BV() */
00045
00046 #include <cpu/power.h> /* cpu_relax() */
00047
00048 #include <drv/ser_p.h>
00049 #include <drv/ser.h>
00050 #include <drv/vic_lpc2.h> /* vic_handler_t */
00051
00052 #include <io/lpc23xx.h>
00053
00054
00055 /* Register offsets */
00056 #define RBR 0x00
00057 #define THR 0x00
00058 #define DLL 0x00
00059 #define DLM 0x04
00060 #define IER 0x04
00061 #define IIR 0x08
00062 #define FCR 0x08
00063 #define LCR 0x0c
00064 #define LSR 0x14
00065 #define SCR 0x1c
00066 #define ACR 0x20
00067 #define ICR 0x24
00068 #define FDR 0x28
00069 #define TER 0x30
00070
00071 /* From the high-level serial driver */
00072 extern struct Serial *ser_handles[SER_CNT];
00073
00074 struct LPC2Serial
00075 {
00076     struct SerialHardware hw;
00077     bool sending;
00078     int irq;
00079 };
00080
00081 /* Forward declaration */
00082 static struct LPC2Serial UARTDesc[SER_CNT];
00083
00084 struct uart_config
00085 {
00086     uint32_t base;
00087     uint32_t pconp;
00088     uint32_t pclksel0;
00089     uint32_t pclksel0_mask;
00090     uint32_t pclksel1;
00091     uint32_t pclksel1_mask;
00092     uint32_t pinsel0;
00093     uint32_t pinsel0_mask;
00094     uint32_t pinsel4;
00095     uint32_t pinsel4_mask;
00096 };
00097
00098 /* UART registers configuration */
00099 static const struct uart_config uart_param[] =
00100 {
00101     /* UART0 */
00102     {
00103         .base = UART0_BASE_ADDR,
00104         .pconp = BV(3),
00105
00106         .pclksel0 = BV(6),
00107         .pclksel0_mask = BV(7) | BV(6),
00108
00109         .pclksel1 = 0,
00110         .pclksel1_mask = 0,
00111
00112         .pinsel0 = BV(6) | BV(4),
00113         .pinsel0_mask = BV(7) | BV(6) | BV(5) | BV(4),
00114
00115         .pinsel4 = 0,
00116         .pinsel4_mask = 0,
00117     },
00118     /* UART1 */
00119     {
00120         .base = UART1_BASE_ADDR,
00121         .pconp = BV(4),
00122
00123         .pclksel0 = BV(8),
00124         .pclksel0_mask = BV(9) | BV(8),
00125
00126         .pclksel1 = 0,
00127         .pclksel1_mask = 0,
00128
00129         .pinsel0 = 0,
00130         .pinsel0_mask = 0,
00131
00132         .pinsel4 = BV(3) | BV(1),
00133         .pinsel4_mask = BV(3) | BV(2) | BV(1) | BV(0),
00134     },
00135     /* UART2 */
00136     {
00137         .base = UART2_BASE_ADDR,
00138         .pconp = BV(24),
00139
00140         .pclksel0 = 0,
00141         .pclksel0_mask = 0,
00142
00143         .pclksel1 = BV(16),
00144         .pclksel1_mask = BV(17) | BV(16),
00145
00146         .pinsel0 = 0,
00147         .pinsel0_mask = 0,
00148
00149         .pinsel4 = BV(19) | BV(17),
00150         .pinsel4_mask = BV(19) | BV(18) | BV(17) | BV(16),
00151     },
00152     /* UART3 */
00153     {
00154         .base = UART3_BASE_ADDR,
00155         .pconp = BV(25),
00156
00157         .pclksel0 = 0,
00158         .pclksel0_mask = 0,
00159
00160         .pclksel1 = BV(18),
00161         .pclksel1_mask = BV(19) | BV(18),
00162
00163         .pinsel0 = BV(3) | BV(1),
00164         .pinsel0_mask = BV(3) | BV(2) | BV(1) | BV(0),
00165
00166         .pinsel4 = 0,
00167         .pinsel4_mask = 0,
00168     },
00169 };
00170
00171 static void lpc2_uartSetBaudRate(int port, unsigned long baud)
00172 {
00173     cpu_flags_t flags;
00174
00175     IRQ_SAVE_DISABLE(flags);
00176
00177     /* LCR: DLAB = 1 (enable divisor modify) */
00178     *(reg8_t *)(uart_param[port].base + LCR) |= 0x80;
00179     /* DLL */
00180     *(reg8_t *)(uart_param[port].base + DLL) =
00181         DIV_ROUND(CPU_FREQ, 16 * baud) & 0xFF;
00182     /* DLM */
00183     *(reg8_t *)(uart_param[port].base + DLM) =
00184         (DIV_ROUND(CPU_FREQ, 16 * baud) >> 8) & 0xFF;
00185     *(reg32_t *)(uart_param[port].base + LCR) &= ~0x80;
00186     /* LCR: DLAB = 0 (disable divisor modify) */
00187     *(reg8_t *)(uart_param[port].base + LCR) &= ~0x80;
00188
00189     IRQ_RESTORE(flags);
00190 }
00191
00192 static void lpc2_uartSetParity(int port, int parity)
00193 {
00194         /* Set 8-bit word, one stop bit by default */
00195         uint32_t config = BV(1) | BV(0);
00196
00197     cpu_flags_t flags;
00198
00199     IRQ_SAVE_DISABLE(flags);
00200
00201         switch(parity)
00202         {
00203         case SER_PARITY_NONE:
00204                 break;
00205         case SER_PARITY_ODD:
00206                 config |= BV(3);
00207                 break;
00208         case SER_PARITY_EVEN:
00209                 config |= BV(4) | BV(3);
00210                 break;
00211         default:
00212                 ASSERT(0);
00213         IRQ_RESTORE(flags);
00214                 return;
00215         }
00216     /* LCR */
00217     *(reg8_t *)(uart_param[port].base + LCR) = config;
00218
00219     IRQ_RESTORE(flags);
00220 }
00221
00222 static void lpc2_uartPutChar(uint32_t base, uint8_t c)
00223 {
00224     reg8_t *lsr = (reg8_t *)base + LSR;
00225     reg8_t *thr = (reg8_t *)base + THR;
00226
00227     while (!(*lsr & BV(6)))
00228         cpu_relax();
00229     *thr = c;
00230 }
00231
00232 void lpc2_uartInit(int port)
00233 {
00234     cpu_flags_t flags;
00235
00236     IRQ_SAVE_DISABLE(flags);
00237
00238     /* Power-on the device */
00239     PCONP |= uart_param[port].pconp;
00240     /* Set UART clk to CPU_FREQ */
00241     PCLKSEL0 &= ~uart_param[port].pclksel0_mask;
00242     PCLKSEL0 |= uart_param[port].pclksel0;
00243     PCLKSEL1 &= ~uart_param[port].pclksel1_mask;
00244     PCLKSEL1 |= uart_param[port].pclksel1;
00245
00246     /* LCR: 8bit, 1 stop bit, no parity, DLAB = 1 (enable divisor modify) */
00247     *(reg8_t *)(uart_param[port].base + LCR) = 0x83;
00248     /* DLL */
00249     *(reg8_t *)(uart_param[port].base + DLL) =
00250         DIV_ROUND(CPU_FREQ, 16 * CONFIG_KDEBUG_BAUDRATE) & 0xFF;
00251     /* DLM */
00252     *(reg8_t *)(uart_param[port].base + DLM) =
00253         (DIV_ROUND(CPU_FREQ, 16 * CONFIG_KDEBUG_BAUDRATE) >> 8) & 0xFF;
00254     /* FDR */
00255     *(reg32_t *)(uart_param[port].base + FDR) = 0x10;
00256
00257     /* Assign TX pin to UART0*/
00258     PINSEL0 &= ~uart_param[port].pinsel0_mask;
00259     PINSEL0 |= uart_param[port].pinsel0;
00260     PINSEL4 &= ~uart_param[port].pinsel4_mask;
00261     PINSEL4 |= uart_param[port].pinsel4;
00262     /* LCR: set 8bit, 1 stop bit, no parity, DLAB = 0 (disable divisor modify) */
00263     *(reg8_t *)(uart_param[port].base + LCR) = 0x03;
00264
00265     /* TER: Enable transmitter */
00266     *(reg8_t *)(uart_param[port].base + TER) = BV(7);
00267     /* IER: Enable RBR interrupt */
00268     *(reg8_t *)(uart_param[port].base + IER) = BV(0);
00269
00270     IRQ_RESTORE(flags);
00271 }
00272
00273 static bool tx_sending(struct SerialHardware *_hw)
00274 {
00275     struct LPC2Serial *hw = (struct LPC2Serial *)_hw;
00276     return hw->sending;
00277 }
00278
00279 INLINE bool lpc2_uartRxReady(int port)
00280 {
00281     /* LSR: check Receiver Data Ready (RDR) bit */
00282     return *(reg8_t *)(uart_param[port].base + LSR) & BV(0) ? true : false;
00283 }
00284
00285 static void uart_irq_rx(int port)
00286 {
00287     struct FIFOBuffer *rxfifo = &ser_handles[port]->rxfifo;
00288     char c;
00289
00290     while (lpc2_uartRxReady(port))
00291     {
00292         /* RBR: read a character from the Receiver Buffer Register */
00293         c = *(reg8_t *)(uart_param[port].base + RBR);
00294         if (fifo_isfull(rxfifo))
00295             ser_handles[port]->status |= SERRF_RXFIFOOVERRUN;
00296         else
00297             fifo_push(rxfifo, c);
00298     }
00299 }
00300
00301 INLINE bool lpc2_uartTxReady(int port)
00302 {
00303     /* LSR: check Transmitter Holding Register Empty (THRE) bit */
00304     return *(reg8_t *)(uart_param[port].base + LSR) & BV(5) ? true : false;
00305 }
00306
00307 static void uart_irq_tx(int port)
00308 {
00309     struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo;
00310
00311     while (lpc2_uartTxReady(port))
00312     {
00313         /*
00314          * Disable TX empty interrupts if there're no more
00315          * characters to transmit.
00316          */
00317         if (fifo_isempty(txfifo))
00318         {
00319             /* IER: Disable THRE interrupt */
00320             *(reg8_t *)(uart_param[port].base + IER) &= ~BV(1);
00321             UARTDesc[port].sending = false;
00322             break;
00323         }
00324         /* THR: put a character to the Transmit Holding Register */
00325         *(reg8_t *)(uart_param[port].base + THR) = fifo_pop(txfifo);
00326     }
00327 }
00328
00329 static void uart_common_irq_handler(int port)
00330 {
00331     /* IIR: identify the interrupt source */
00332     uint32_t status = *(reg32_t *)(uart_param[port].base + IIR) >> 1 & 0x7;
00333
00334     /* Receiver Data Ready (RDR) */
00335     if (status == 0x02)
00336         uart_irq_rx(port);
00337     /* Transmit Holding Register Empty (THRE) */
00338     else if (status == 0x01)
00339         uart_irq_tx(port);
00340     /* Signal the VIC we have completed the ISR */
00341     VICVectAddr = 0;
00342 }
00343
00344 static void lpc2_uartIRQEnable(int port, vic_handler_t handler)
00345 {
00346     vic_setVector(UARTDesc[port].irq, handler);
00347     vic_enable(UARTDesc[port].irq);
00348 }
00349
00350 static void lpc2_uartIRQDisable(int port)
00351 {
00352     vic_disable(UARTDesc[port].irq);
00353 }
00354
00355 /* UART class definition */
00356 #define UART_PORT(port)                             \
00357     /* UART TX and RX buffers */                        \
00358     static unsigned char                            \
00359         uart ## port ## _txbuffer[CONFIG_UART ## port ## _TXBUFSIZE];   \
00360     static unsigned char                            \
00361         uart ## port ## _rxbuffer[CONFIG_UART ## port ## _RXBUFSIZE];   \
00362                                         \
00363     /* UART interrupt handler */                        \
00364     static DECLARE_ISR(uart ## port ## _irq_handler)            \
00365     {                                   \
00366         uart_common_irq_handler(port);                  \
00367     }                                   \
00368                                         \
00369     /* UART public methods */                       \
00370     static void                             \
00371     uart ## port ## _txStart(struct SerialHardware *_hw)            \
00372     {                                   \
00373         struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo;     \
00374         struct LPC2Serial *hw = (struct LPC2Serial *)_hw;       \
00375                                         \
00376                 if (hw->sending)                        \
00377                         return;                         \
00378         lpc2_uartPutChar(UART ## port ## _BASE_ADDR, fifo_pop(txfifo)); \
00379         if (!fifo_isempty(txfifo))                  \
00380         {                               \
00381             hw->sending = true;                 \
00382             /* IER: Enable THRE interrupt */            \
00383             *(reg8_t *)(uart_param[port].base + IER) |= BV(1);  \
00384         }                               \
00385     }                                   \
00386                                         \
00387     static void                             \
00388     uart ## port ## _setbaudrate(UNUSED_ARG(struct SerialHardware *, hw),   \
00389                         unsigned long baud)     \
00390     {                                   \
00391         lpc2_uartSetBaudRate(port, baud);               \
00392     }                                   \
00393                                         \
00394     static void                             \
00395     uart ## port ## _setparity(UNUSED_ARG(struct SerialHardware *, hw), \
00396                         int parity)         \
00397     {                                   \
00398         lpc2_uartSetParity(port, parity);               \
00399     }                                   \
00400                                         \
00401     static void                             \
00402     uart ## port ## _cleanup(struct SerialHardware *_hw)            \
00403     {                                   \
00404         struct LPC2Serial *hw = (struct LPC2Serial *)_hw;       \
00405                                         \
00406         hw->sending = false;                        \
00407         lpc2_uartIRQDisable(port);                  \
00408     }                                   \
00409                                         \
00410     static void                             \
00411     uart ## port ## _init(UNUSED_ARG(struct SerialHardware *, hw),      \
00412                 UNUSED_ARG(struct Serial *, ser))       \
00413     {                                   \
00414         lpc2_uartInit(port);                        \
00415         lpc2_uartIRQEnable(port, uart ## port ## _irq_handler);     \
00416     }                                   \
00417                                         \
00418     /* UART operations */                           \
00419     static const struct SerialHardwareVT UART ## port ## _VT =      \
00420     {                                   \
00421         .init = uart ## port ## _init,                  \
00422         .cleanup = uart ## port ## _cleanup,                \
00423         .setBaudrate = uart ## port ## _setbaudrate,            \
00424         .setParity = uart ## port ## _setparity,            \
00425         .txStart = uart ## port ## _txStart,                \
00426         .txSending = tx_sending,                    \
00427     };
00428
00429 /* UART port instances */
00430 UART_PORT(0)
00431 UART_PORT(1)
00432 UART_PORT(2)
00433 UART_PORT(3)
00434
00435 static struct LPC2Serial UARTDesc[SER_CNT] =
00436 {
00437     {
00438         .hw = {
00439             .table = &UART0_VT,
00440             .txbuffer = uart0_txbuffer,
00441             .rxbuffer = uart0_rxbuffer,
00442             .txbuffer_size = sizeof(uart0_txbuffer),
00443             .rxbuffer_size = sizeof(uart0_rxbuffer),
00444         },
00445         .sending = false,
00446         .irq = INT_UART0,
00447     },
00448     {
00449         .hw = {
00450             .table = &UART1_VT,
00451             .txbuffer = uart1_txbuffer,
00452             .rxbuffer = uart1_rxbuffer,
00453             .txbuffer_size = sizeof(uart1_txbuffer),
00454             .rxbuffer_size = sizeof(uart1_rxbuffer),
00455         },
00456         .sending = false,
00457         .irq = INT_UART1,
00458     },
00459     {
00460         .hw = {
00461             .table = &UART2_VT,
00462             .txbuffer = uart2_txbuffer,
00463             .rxbuffer = uart2_rxbuffer,
00464             .txbuffer_size = sizeof(uart2_txbuffer),
00465             .rxbuffer_size = sizeof(uart2_rxbuffer),
00466         },
00467         .sending = false,
00468         .irq = INT_UART2,
00469     },
00470     {
00471         .hw = {
00472             .table = &UART3_VT,
00473             .txbuffer = uart3_txbuffer,
00474             .rxbuffer = uart3_rxbuffer,
00475             .txbuffer_size = sizeof(uart3_txbuffer),
00476             .rxbuffer_size = sizeof(uart3_rxbuffer),
00477         },
00478         .sending = false,
00479         .irq = INT_UART3,
00480     },
00481 };
00482
00483 struct SerialHardware *ser_hw_getdesc(int port)
00484 {
00485     ASSERT(port >= 0 && port < SER_CNT);
00486     return &UARTDesc[port].hw;
00487 }


BeRTOS: ser_lpc2.h File Reference

  • cpu
  • arm
  • drv
ser_lpc2.h File Reference

LPC23xx UART driver. More...

#include <cfg/cfg_debug.h>
#include <io/lpc23xx.h>

Go to the source code of this file.

Detailed Description

LPC23xx UART driver.

Author:
Andrea Righi <arighi@develer.com>

Definition in file ser_lpc2.h.


BeRTOS: ser_lpc2.h Source File

  • cpu
  • arm
  • drv
ser_lpc2.h
Go to the documentation of this file.
00001
00038 #ifndef SER_LPC2_H
00039 #define SER_LPC2_H
00040
00041 #include <cfg/cfg_debug.h>
00042 #include <io/lpc23xx.h>
00043
00044 /* Serial hardware numbers */
00045 enum
00046 {
00047     SER_UART0,
00048     SER_UART1,
00049     SER_UART2,
00050     SER_UART3,
00051
00052     SER_CNT //< Number of serial ports
00053 };
00054
00055 /* Software errors */
00056 #define SERRF_RXFIFOOVERRUN  BV(0) //< Rx FIFO buffer overrun
00057 #define SERRF_RXTIMEOUT      BV(1) //< Receive timeout
00058 #define SERRF_TXTIMEOUT      BV(2) //< Transmit timeout
00059
00060 /*
00061  * Hardware errors.
00062  */
00063 #define SERRF_RXSROVERRUN    0 //< Input overrun
00064 #define SERRF_FRAMEERROR     0 //< Stop bit missing
00065 #define SERRF_PARITYERROR    0 //< Parity error
00066 #define SERRF_NOISEERROR     0 //< Noise error
00067
00068 /* Serial error/status flags */
00069 typedef uint32_t serstatus_t;
00070
00071 void lpc2_uartInit(int port);
00072
00073 #endif /* SER_LPC2_H */


BeRTOS: ser_mega.c File Reference

  • cpu
  • avr
  • drv
Data Structures | Functions
ser_mega.c File Reference

AVR MEGA UART and SPI I/O driver (Implementation) More...

#include "hw/hw_ser.h"
#include <hw/hw_cpufreq.h>
#include "cfg/cfg_ser.h"
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <cfg/cfg_arch.h>
#include <drv/ser.h>
#include <drv/ser_p.h>
#include <drv/timer.h>
#include <struct/fifobuf.h>
#include <avr/io.h>
#include <avr/signal.h>

Go to the source code of this file.

Data Structures

struct | AvrSerial
Internal hardware state structure. More...

Defines

Hardware handshake (RTS/CTS).
#define | RTS_ON do {} while (0)
Dummy value, must be overridden.
#define | RTS_OFF do {} while (0)
Dummy value, must be overridden.
#define | IS_CTS_ON true
Dummy value, must be overridden.
#define | EIMSKF_CTS 0
Dummy value, must be overridden.
Overridable serial bus hooks

These can be redefined in hw.h to implement special bus policies such as half-duplex, 485, etc.

  TXBEGIN      TXCHAR      TXEND  TXOFF
    |   __________|__________ |     |
    |   |   |   |   |   |   | |     |
    v   v   v   v   v   v   v v     v
 ______  __  __  __  __  __  __  ________________
       \/  \/  \/  \/  \/  \/  \/
 ______/\__/\__/\__/\__/\__/\__/
#define | SER_UART0_BUS_TXINIT
Default TXINIT macro - invoked in uart0_init()
#define | SER_UART0_BUS_TXBEGIN
Invoked before starting a transmission.
#define | SER_UART0_BUS_TXCHAR(c)
Invoked to send one character.
#define | SER_UART0_BUS_TXEND
Invoked as soon as the txfifo becomes empty.
#define | SER_UART0_BUS_TXOFF
Invoked after the last character has been transmitted.
#define | SER_UART1_BUS_TXINIT
#define | SER_UART1_BUS_TXBEGIN
#define | SER_UART1_BUS_TXCHAR(c)
#define | SER_UART1_BUS_TXEND
#define | SER_UART1_BUS_TXOFF
#define | SER_UART2_BUS_TXINIT
#define | SER_UART2_BUS_TXBEGIN
#define | SER_UART2_BUS_TXCHAR(c)
#define | SER_UART2_BUS_TXEND
#define | SER_UART2_BUS_TXOFF
#define | SER_UART3_BUS_TXINIT
#define | SER_UART3_BUS_TXBEGIN
#define | SER_UART3_BUS_TXCHAR(c)
#define | SER_UART3_BUS_TXEND
#define | SER_UART3_BUS_TXOFF
Overridable SPI hooks

These can be redefined in hw.h to implement special bus policies such as slave select pin handling, etc.

#define | SER_SPI_BUS_TXINIT
Default TXINIT macro - invoked in spi_init() The default is no action.
#define | SER_SPI_BUS_TXCLOSE
Invoked after the last character has been transmitted.

Functions

DECLARE_ISR (USART0_UDRE_vect)
Serial 0 TX interrupt handler.
DECLARE_ISR (USART0_TX_vect)
Serial port 0 TX complete interrupt handler.
DECLARE_ISR (USART0_RX_vect)
Serial 0 RX complete interrupt handler.
DECLARE_ISR (SPI_STC_vect)
SPI interrupt handler.

Detailed Description

AVR MEGA UART and SPI I/O driver (Implementation)

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>
Luca Ottaviano <lottaviano@develer.com>

Definition in file ser_mega.c.

Define Documentation

#define SER_SPI_BUS_TXCLOSE

Invoked after the last character has been transmitted.

The default is no action.

Definition at line 329 of file ser_mega.c.

#define SER_UART0_BUS_TXBEGIN
Value:
do { \
        UCSR0B = BV(BIT_RXCIE0) | BV(BIT_UDRIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); \
    } while (0)

Invoked before starting a transmission.

  • Enable both the receiver and the transmitter
  • Enable both the RX complete and UDR empty interrupts

Definition at line 161 of file ser_mega.c.

#define SER_UART0_BUS_TXEND
Value:
do { \
        UCSR0B = BV(BIT_RXCIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); \
    } while (0)

Invoked as soon as the txfifo becomes empty.

  • Keep both the receiver and the transmitter enabled
  • Keep the RX complete interrupt enabled
  • Disable the UDR empty interrupt

Definition at line 183 of file ser_mega.c.

#define SER_UART0_BUS_TXINIT
Value:
do { \
        UCSR0A = 0; /* The Arduino Uno bootloader turns on U2X0 */ \
        UCSR0B = BV(BIT_RXCIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); \
    } while (0)

Default TXINIT macro - invoked in uart0_init()

  • Enable both the receiver and the transmitter
  • Enable only the RX complete interrupt

Definition at line 148 of file ser_mega.c.

#define SER_UART0_BUS_TXOFF

Invoked after the last character has been transmitted.

The default is no action.

Definition at line 197 of file ser_mega.c.

#define SER_UART1_BUS_TXBEGIN
Value:
do { \
        UCSR1B = BV(BIT_RXCIE1) | BV(BIT_UDRIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1); \
    } while (0)
See also:
SER_UART0_BUS_TXBEGIN

Definition at line 209 of file ser_mega.c.

#define SER_UART1_BUS_TXCHAR ( c )
Value:
do { \
        UDR1 = (c); \
    } while (0)
See also:
SER_UART0_BUS_TXCHAR

Definition at line 215 of file ser_mega.c.

#define SER_UART1_BUS_TXEND
Value:
do { \
        UCSR1B = BV(BIT_RXCIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1); \
    } while (0)
See also:
SER_UART0_BUS_TXEND

Definition at line 221 of file ser_mega.c.

#define SER_UART1_BUS_TXINIT
Value:
do { \
        UCSR1B = BV(BIT_RXCIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1); \
    } while (0)
See also:
SER_UART0_BUS_TXINIT

Definition at line 203 of file ser_mega.c.

#define SER_UART1_BUS_TXOFF
See also:
SER_UART0_BUS_TXOFF

Definition at line 232 of file ser_mega.c.

#define SER_UART2_BUS_TXBEGIN
Value:
do { \
        UCSR2B = BV(BIT_RXCIE2) | BV(BIT_UDRIE2) | BV(BIT_RXEN2) | BV(BIT_TXEN2); \
    } while (0)
See also:
SER_UART0_BUS_TXBEGIN

Definition at line 244 of file ser_mega.c.

#define SER_UART2_BUS_TXCHAR ( c )
Value:
do { \
        UDR2 = (c); \
    } while (0)
See also:
SER_UART0_BUS_TXCHAR

Definition at line 250 of file ser_mega.c.

#define SER_UART2_BUS_TXEND
Value:
do { \
        UCSR2B = BV(BIT_RXCIE2) | BV(BIT_RXEN2) | BV(BIT_TXEN2); \
    } while (0)
See also:
SER_UART0_BUS_TXEND

Definition at line 256 of file ser_mega.c.

#define SER_UART2_BUS_TXINIT
Value:
do { \
        UCSR2B = BV(BIT_RXCIE2) | BV(BIT_RXEN2) | BV(BIT_TXEN2); \
    } while (0)
See also:
SER_UART0_BUS_TXINIT

Definition at line 238 of file ser_mega.c.

#define SER_UART2_BUS_TXOFF
See also:
SER_UART0_BUS_TXOFF

Definition at line 267 of file ser_mega.c.

#define SER_UART3_BUS_TXBEGIN
Value:
do { \
        UCSR3B = BV(BIT_RXCIE3) | BV(BIT_UDRIE3) | BV(BIT_RXEN3) | BV(BIT_TXEN3); \
    } while (0)
See also:
SER_UART0_BUS_TXBEGIN

Definition at line 279 of file ser_mega.c.

#define SER_UART3_BUS_TXCHAR ( c )
Value:
do { \
        UDR3 = (c); \
    } while (0)
See also:
SER_UART0_BUS_TXCHAR

Definition at line 285 of file ser_mega.c.

#define SER_UART3_BUS_TXEND
Value:
do { \
        UCSR3B = BV(BIT_RXCIE3) | BV(BIT_RXEN3) | BV(BIT_TXEN3); \
    } while (0)
See also:
SER_UART0_BUS_TXEND

Definition at line 291 of file ser_mega.c.

#define SER_UART3_BUS_TXINIT
Value:
do { \
        UCSR3B = BV(BIT_RXCIE3) | BV(BIT_RXEN3) | BV(BIT_TXEN3); \
    } while (0)
See also:
SER_UART0_BUS_TXINIT

Definition at line 273 of file ser_mega.c.

#define SER_UART3_BUS_TXOFF
See also:
SER_UART0_BUS_TXOFF

Definition at line 302 of file ser_mega.c.

Function Documentation

DECLARE_ISR ( USART0_RX_vect )

Serial 0 RX complete interrupt handler.

This handler is interruptible. Interrupt are reenabled as soon as recv complete interrupt is disabled. Using INTERRUPT() is troublesome when the serial is heavily loaded, because an interrupt could be retriggered when executing the handler prologue before RXCIE is disabled.

Note:
The code that re-enables interrupts is commented out because in some nasty cases the interrupt is retriggered. This is probably due to the RXC flag being set before RXCIE is cleared. Unfortunately the RXC flag is read-only and can't be cleared by code.

Definition at line 1193 of file ser_mega.c.

DECLARE_ISR ( USART0_TX_vect )

Serial port 0 TX complete interrupt handler.

This IRQ is usually disabled. The UDR-empty interrupt enables it when there's no more data to transmit. We need to wait until the last character has been transmitted before switching the 485 transceiver to receive mode.

The txfifo might have been refilled by putchar() while we were waiting for the transmission complete interrupt. In this case, we must restart the UDR empty interrupt, otherwise we'd stop the serial port with some data still pending in the buffer.

Definition at line 993 of file ser_mega.c.


BeRTOS: ser_mega.c Source File

  • cpu
  • avr
  • drv
ser_mega.c
Go to the documentation of this file.
00001
00041 #include "hw/hw_ser.h"  /* Required for bus macros overrides */
00042 #include <hw/hw_cpufreq.h>  /* CPU_FREQ */
00043
00044 #include "cfg/cfg_ser.h"
00045
00046 #include <cfg/macros.h> /* DIV_ROUND */
00047 #include <cfg/debug.h>
00048 #include <cfg/cfg_arch.h> // ARCH_NIGHTTEST
00049
00050 #include <drv/ser.h>
00051 #include <drv/ser_p.h>
00052 #include <drv/timer.h>
00053
00054 #include <struct/fifobuf.h>
00055
00056 #include <avr/io.h>
00057
00058 #if defined(__AVR_LIBC_VERSION__) && (__AVR_LIBC_VERSION__ >= 10400UL)
00059     #include <avr/interrupt.h>
00060 #else
00061     #include <avr/signal.h>
00062 #endif
00063
00064
00065 #if !CONFIG_SER_HWHANDSHAKE
00066
00070     #define RTS_ON      do {} while (0)
00071     #define RTS_OFF     do {} while (0)
00072     #define IS_CTS_ON   true
00073     #define EIMSKF_CTS  0
00074     /*\}*/
00075 #endif
00076
00077 #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
00078     #define BIT_RXCIE0 RXCIE0
00079     #define BIT_RXEN0  RXEN0
00080     #define BIT_TXEN0  TXEN0
00081     #define BIT_UDRIE0 UDRIE0
00082
00083     #define BIT_RXCIE1 RXCIE1
00084     #define BIT_RXEN1  RXEN1
00085     #define BIT_TXEN1  TXEN1
00086     #define BIT_UDRIE1 UDRIE1
00087     #if CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
00088         #define BIT_RXCIE2 RXCIE2
00089         #define BIT_RXEN2  RXEN2
00090         #define BIT_TXEN2  TXEN2
00091         #define BIT_UDRIE2 UDRIE2
00092
00093         #define BIT_RXCIE3 RXCIE3
00094         #define BIT_RXEN3  RXEN3
00095         #define BIT_TXEN3  TXEN3
00096         #define BIT_UDRIE3 UDRIE3
00097     #endif
00098 #elif CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
00099     #define BIT_RXCIE0 RXCIE0
00100     #define BIT_RXEN0  RXEN0
00101     #define BIT_TXEN0  TXEN0
00102     #define BIT_UDRIE0 UDRIE0
00103
00104     #define BIT_RXCIE1 RXCIE0
00105     #define BIT_RXEN1  RXEN0
00106     #define BIT_TXEN1  TXEN0
00107     #define BIT_UDRIE1 UDRIE0
00108 #else
00109     #define BIT_RXCIE0 RXCIE
00110     #define BIT_RXEN0  RXEN
00111     #define BIT_TXEN0  TXEN
00112     #define BIT_UDRIE0 UDRIE
00113
00114     #define BIT_RXCIE1 RXCIE
00115     #define BIT_RXEN1  RXEN
00116     #define BIT_TXEN1  TXEN
00117     #define BIT_UDRIE1 UDRIE
00118 #endif
00119
00120
00141 #ifndef SER_UART0_BUS_TXINIT
00142
00148     #define SER_UART0_BUS_TXINIT do { \
00149         UCSR0A = 0; /* The Arduino Uno bootloader turns on U2X0 */ \
00150         UCSR0B = BV(BIT_RXCIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); \
00151     } while (0)
00152 #endif
00153
00154 #ifndef SER_UART0_BUS_TXBEGIN
00155
00161     #define SER_UART0_BUS_TXBEGIN do { \
00162         UCSR0B = BV(BIT_RXCIE0) | BV(BIT_UDRIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); \
00163     } while (0)
00164 #endif
00165
00166 #ifndef SER_UART0_BUS_TXCHAR
00167
00170     #define SER_UART0_BUS_TXCHAR(c) do { \
00171         UDR0 = (c); \
00172     } while (0)
00173 #endif
00174
00175 #ifndef SER_UART0_BUS_TXEND
00176
00183     #define SER_UART0_BUS_TXEND do { \
00184         UCSR0B = BV(BIT_RXCIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); \
00185     } while (0)
00186 #endif
00187
00188 #ifndef SER_UART0_BUS_TXOFF
00189
00196     #ifdef __doxygen__
00197     #define SER_UART0_BUS_TXOFF
00198     #endif
00199 #endif
00200
00201 #ifndef SER_UART1_BUS_TXINIT
00202
00203     #define SER_UART1_BUS_TXINIT do { \
00204         UCSR1B = BV(BIT_RXCIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1); \
00205     } while (0)
00206 #endif
00207 #ifndef SER_UART1_BUS_TXBEGIN
00208
00209     #define SER_UART1_BUS_TXBEGIN do { \
00210         UCSR1B = BV(BIT_RXCIE1) | BV(BIT_UDRIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1); \
00211     } while (0)
00212 #endif
00213 #ifndef SER_UART1_BUS_TXCHAR
00214
00215     #define SER_UART1_BUS_TXCHAR(c) do { \
00216         UDR1 = (c); \
00217     } while (0)
00218 #endif
00219 #ifndef SER_UART1_BUS_TXEND
00220
00221     #define SER_UART1_BUS_TXEND do { \
00222         UCSR1B = BV(BIT_RXCIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1); \
00223     } while (0)
00224 #endif
00225 #ifndef SER_UART1_BUS_TXOFF
00226
00231     #ifdef __doxygen__
00232     #define SER_UART1_BUS_TXOFF
00233     #endif
00234 #endif
00235
00236 #ifndef SER_UART2_BUS_TXINIT
00237
00238     #define SER_UART2_BUS_TXINIT do { \
00239         UCSR2B = BV(BIT_RXCIE2) | BV(BIT_RXEN2) | BV(BIT_TXEN2); \
00240     } while (0)
00241 #endif
00242 #ifndef SER_UART2_BUS_TXBEGIN
00243
00244     #define SER_UART2_BUS_TXBEGIN do { \
00245         UCSR2B = BV(BIT_RXCIE2) | BV(BIT_UDRIE2) | BV(BIT_RXEN2) | BV(BIT_TXEN2); \
00246     } while (0)
00247 #endif
00248 #ifndef SER_UART2_BUS_TXCHAR
00249
00250     #define SER_UART2_BUS_TXCHAR(c) do { \
00251         UDR2 = (c); \
00252     } while (0)
00253 #endif
00254 #ifndef SER_UART2_BUS_TXEND
00255
00256     #define SER_UART2_BUS_TXEND do { \
00257         UCSR2B = BV(BIT_RXCIE2) | BV(BIT_RXEN2) | BV(BIT_TXEN2); \
00258     } while (0)
00259 #endif
00260 #ifndef SER_UART2_BUS_TXOFF
00261
00266     #ifdef __doxygen__
00267     #define SER_UART2_BUS_TXOFF
00268     #endif
00269 #endif
00270
00271 #ifndef SER_UART3_BUS_TXINIT
00272
00273     #define SER_UART3_BUS_TXINIT do { \
00274         UCSR3B = BV(BIT_RXCIE3) | BV(BIT_RXEN3) | BV(BIT_TXEN3); \
00275     } while (0)
00276 #endif
00277 #ifndef SER_UART3_BUS_TXBEGIN
00278
00279     #define SER_UART3_BUS_TXBEGIN do { \
00280         UCSR3B = BV(BIT_RXCIE3) | BV(BIT_UDRIE3) | BV(BIT_RXEN3) | BV(BIT_TXEN3); \
00281     } while (0)
00282 #endif
00283 #ifndef SER_UART3_BUS_TXCHAR
00284
00285     #define SER_UART3_BUS_TXCHAR(c) do { \
00286         UDR3 = (c); \
00287     } while (0)
00288 #endif
00289 #ifndef SER_UART3_BUS_TXEND
00290
00291     #define SER_UART3_BUS_TXEND do { \
00292         UCSR3B = BV(BIT_RXCIE3) | BV(BIT_RXEN3) | BV(BIT_TXEN3); \
00293     } while (0)
00294 #endif
00295 #ifndef SER_UART3_BUS_TXOFF
00296
00301     #ifdef __doxygen__
00302     #define SER_UART3_BUS_TXOFF
00303     #endif
00304 #endif
00305 /*\}*/
00306
00307
00316 #ifndef SER_SPI_BUS_TXINIT
00317
00321     #define SER_SPI_BUS_TXINIT
00322 #endif
00323
00324 #ifndef SER_SPI_BUS_TXCLOSE
00325
00329     #define SER_SPI_BUS_TXCLOSE
00330 #endif
00331 /*\}*/
00332
00333
00334 /* SPI port and pin configuration */
00335 #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA103 || CPU_AVR_ATMEGA1281 \
00336     || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
00337     #define SPI_PORT      PORTB
00338     #define SPI_DDR       DDRB
00339     #define SPI_SS_BIT    PB0
00340     #define SPI_SCK_BIT   PB1
00341     #define SPI_MOSI_BIT  PB2
00342     #define SPI_MISO_BIT  PB3
00343 // TODO: these bits are the same as ATMEGA8 but the defines in avr-gcc are different.
00344 // They should be the same!
00345 #elif CPU_AVR_ATMEGA328P
00346     #define SPI_PORT      PORTB
00347     #define SPI_DDR       DDRB
00348     #define SPI_SS_BIT    PORTB2
00349     #define SPI_SCK_BIT   PORTB5
00350     #define SPI_MOSI_BIT  PORTB3
00351     #define SPI_MISO_BIT  PORTB4
00352 #elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA168
00353     #define SPI_PORT      PORTB
00354     #define SPI_DDR       DDRB
00355     #define SPI_SS_BIT    PB2
00356     #define SPI_SCK_BIT   PB5
00357     #define SPI_MOSI_BIT  PB3
00358     #define SPI_MISO_BIT  PB4
00359 #elif CPU_AVR_ATMEGA32
00360     #define SPI_PORT      PORTB
00361     #define SPI_DDR       DDRB
00362     #define SPI_SS_BIT    PB4
00363     #define SPI_SCK_BIT   PB7
00364     #define SPI_MOSI_BIT  PB5
00365     #define SPI_MISO_BIT  PB6
00366 #else
00367     #error Unknown architecture
00368 #endif
00369
00370 /* USART register definitions */
00371 #if CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
00372     #define AVR_HAS_UART1 1
00373     #define AVR_HAS_UART2 1
00374     #define AVR_HAS_UART3 1
00375 #elif CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281
00376     #define AVR_HAS_UART1 1
00377     #define AVR_HAS_UART2 0
00378     #define AVR_HAS_UART3 0
00379 #elif CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
00380     #define AVR_HAS_UART1 0
00381     #define AVR_HAS_UART2 0
00382     #define AVR_HAS_UART3 0
00383     #define USART0_UDRE_vect USART_UDRE_vect
00384     #define USART0_RX_vect USART_RX_vect
00385     #define USART0_TX_vect USART_TX_vect
00386 #elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32
00387     #define AVR_HAS_UART1 0
00388     #define AVR_HAS_UART2 0
00389     #define AVR_HAS_UART3 0
00390     #define UCSR0A UCSRA
00391     #define UCSR0B UCSRB
00392     #define UCSR0C UCSRC
00393     #define UDR0   UDR
00394     #define UBRR0L UBRRL
00395     #define UBRR0H UBRRH
00396     #define UPM01  UPM1
00397     #define UPM00  UPM0
00398     #define USART0_UDRE_vect USART_UDRE_vect
00399     #define USART0_RX_vect USART_RXC_vect
00400     #define USART0_TX_vect USART_TXC_vect
00401 #elif CPU_AVR_ATMEGA103
00402     #define AVR_HAS_UART1 0
00403     #define AVR_HAS_UART2 0
00404     #define AVR_HAS_UART3 0
00405     #define UCSR0B UCR
00406     #define UDR0   UDR
00407     #define UCSR0A USR
00408     #define UBRR0L UBRR
00409     #define USART0_UDRE_vect USART_UDRE_vect
00410     #define USART0_RX_vect USART_RX_vect
00411     #define USART0_TX_vect USART_TX_vect
00412 #else
00413     #error Unknown architecture
00414 #endif
00415
00416
00417 /* From the high-level serial driver */
00418 extern struct Serial *ser_handles[SER_CNT];
00419
00420 /* TX and RX buffers */
00421 static unsigned char uart0_txbuffer[CONFIG_UART0_TXBUFSIZE];
00422 static unsigned char uart0_rxbuffer[CONFIG_UART0_RXBUFSIZE];
00423 #if AVR_HAS_UART1
00424     static unsigned char uart1_txbuffer[CONFIG_UART1_TXBUFSIZE];
00425     static unsigned char uart1_rxbuffer[CONFIG_UART1_RXBUFSIZE];
00426 #endif
00427 #if AVR_HAS_UART2
00428     static unsigned char uart2_txbuffer[CONFIG_UART2_TXBUFSIZE];
00429     static unsigned char uart2_rxbuffer[CONFIG_UART2_RXBUFSIZE];
00430 #endif
00431 #if AVR_HAS_UART3
00432     static unsigned char uart3_txbuffer[CONFIG_UART3_TXBUFSIZE];
00433     static unsigned char uart3_rxbuffer[CONFIG_UART3_RXBUFSIZE];
00434 #endif
00435 static unsigned char spi_txbuffer[CONFIG_SPI_TXBUFSIZE];
00436 static unsigned char spi_rxbuffer[CONFIG_SPI_RXBUFSIZE];
00437
00438
00455 struct AvrSerial
00456 {
00457     struct SerialHardware hw;
00458     volatile bool sending;
00459 };
00460
00461 static uint16_t uart_period(unsigned long bps)
00462 {
00463     uint16_t period = DIV_ROUND(CPU_FREQ / 16UL, bps) - 1;
00464
00465     #ifdef _DEBUG
00466         long skew = bps - (long)(period + 1) * (CPU_FREQ / 16);
00467         /* 8N1 is reliable within 3% skew */
00468         if ((unsigned long)ABS(skew) > bps / (100 / 3))
00469             kprintf("Baudrate off by %ldbps\n", skew);
00470     #endif
00471
00472     //DB(kprintf("uart_period(bps=%lu): period=%u\n", bps, period);)
00473     return period;
00474 }
00475
00476 /*
00477  * Callbacks
00478  */
00479 static void uart0_init(
00480     UNUSED_ARG(struct SerialHardware *, _hw),
00481     UNUSED_ARG(struct Serial *, ser))
00482 {
00483     SER_UART0_BUS_TXINIT;
00484     RTS_ON;
00485     SER_STROBE_INIT;
00486 }
00487
00488 static void uart0_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
00489 {
00490     UCSR0B = 0;
00491 }
00492
00493 static void uart0_enabletxirq(struct SerialHardware *_hw)
00494 {
00495     struct AvrSerial *hw = (struct AvrSerial *)_hw;
00496
00497     /*
00498      * WARNING: racy code here!  The tx interrupt sets hw->sending to false
00499      * when it runs with an empty fifo.  The order of statements in the
00500      * if-block matters.
00501      */
00502     if (!hw->sending)
00503     {
00504         hw->sending = true;
00505         SER_UART0_BUS_TXBEGIN;
00506     }
00507 }
00508
00509 static void uart0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
00510 {
00511     uint16_t period = uart_period(rate);
00512
00513 #if !CPU_AVR_ATMEGA103
00514     UBRR0H = period >> 8;
00515 #endif
00516     UBRR0L = period;
00517 }
00518
00519 static void uart0_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity)
00520 {
00521 #if !CPU_AVR_ATMEGA103
00522     UCSR0C = (UCSR0C & ~(BV(UPM01) | BV(UPM00))) | ((parity) << UPM00);
00523 #endif
00524 }
00525
00526 #if AVR_HAS_UART1
00527
00528 static void uart1_init(
00529     UNUSED_ARG(struct SerialHardware *, _hw),
00530     UNUSED_ARG(struct Serial *, ser))
00531 {
00532     SER_UART1_BUS_TXINIT;
00533     RTS_ON;
00534     SER_STROBE_INIT;
00535 }
00536
00537 static void uart1_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
00538 {
00539     UCSR1B = 0;
00540 }
00541
00542 static void uart1_enabletxirq(struct SerialHardware *_hw)
00543 {
00544     struct AvrSerial *hw = (struct AvrSerial *)_hw;
00545
00546     /*
00547      * WARNING: racy code here!  The tx interrupt
00548      * sets hw->sending to false when it runs with
00549      * an empty fifo.  The order of the statements
00550      * in the if-block matters.
00551      */
00552     if (!hw->sending)
00553     {
00554         hw->sending = true;
00555         SER_UART1_BUS_TXBEGIN;
00556     }
00557 }
00558
00559 static void uart1_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
00560 {
00561     uint16_t period = uart_period(rate);
00562     UBRR1H = period >> 8;
00563     UBRR1L = period;
00564 }
00565
00566 static void uart1_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity)
00567 {
00568     UCSR1C = (UCSR1C & ~(BV(UPM11) | BV(UPM10))) | ((parity) << UPM10);
00569 }
00570
00571 #endif // AVR_HAS_UART1
00572
00573 #if AVR_HAS_UART2
00574
00575 static void uart2_init(
00576     UNUSED_ARG(struct SerialHardware *, _hw),
00577     UNUSED_ARG(struct Serial *, ser))
00578 {
00579     SER_UART2_BUS_TXINIT;
00580     RTS_ON;
00581     SER_STROBE_INIT;
00582 }
00583
00584 static void uart2_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
00585 {
00586     UCSR2B = 0;
00587 }
00588
00589 static void uart2_enabletxirq(struct SerialHardware *_hw)
00590 {
00591     struct AvrSerial *hw = (struct AvrSerial *)_hw;
00592
00593     /*
00594      * WARNING: racy code here!  The tx interrupt
00595      * sets hw->sending to false when it runs with
00596      * an empty fifo.  The order of the statements
00597      * in the if-block matters.
00598      */
00599     if (!hw->sending)
00600     {
00601         hw->sending = true;
00602         SER_UART2_BUS_TXBEGIN;
00603     }
00604 }
00605
00606 static void uart2_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
00607 {
00608     uint16_t period = uart_period(rate);
00609     UBRR2H = period >> 8;
00610     UBRR2L = period;
00611 }
00612
00613 static void uart2_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity)
00614 {
00615     UCSR2C = (UCSR2C & ~(BV(UPM21) | BV(UPM20))) | ((parity) << UPM20);
00616 }
00617
00618 #endif // AVR_HAS_UART2
00619
00620 #if AVR_HAS_UART3
00621
00622 static void uart3_init(
00623     UNUSED_ARG(struct SerialHardware *, _hw),
00624     UNUSED_ARG(struct Serial *, ser))
00625 {
00626     SER_UART3_BUS_TXINIT;
00627     RTS_ON;
00628     SER_STROBE_INIT;
00629 }
00630
00631 static void uart3_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
00632 {
00633     UCSR3B = 0;
00634 }
00635
00636 static void uart3_enabletxirq(struct SerialHardware *_hw)
00637 {
00638     struct AvrSerial *hw = (struct AvrSerial *)_hw;
00639
00640     /*
00641      * WARNING: racy code here!  The tx interrupt
00642      * sets hw->sending to false when it runs with
00643      * an empty fifo.  The order of the statements
00644      * in the if-block matters.
00645      */
00646     if (!hw->sending)
00647     {
00648         hw->sending = true;
00649         SER_UART3_BUS_TXBEGIN;
00650     }
00651 }
00652
00653 static void uart3_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
00654 {
00655     uint16_t period = uart_period(rate);
00656     UBRR3H = period >> 8;
00657     UBRR3L = period;
00658 }
00659
00660 static void uart3_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity)
00661 {
00662     UCSR3C = (UCSR3C & ~(BV(UPM31) | BV(UPM30))) | ((parity) << UPM30);
00663 }
00664
00665 #endif // AVR_HAS_UART3
00666
00667
00668 static void spi_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser))
00669 {
00670     /*
00671      * Set MOSI and SCK ports out, MISO in.
00672      *
00673      * The ATmega64/128 datasheet explicitly states that the input/output
00674      * state of the SPI pins is not significant, as when the SPI is
00675      * active the I/O port are overrided.
00676      * This is *blatantly FALSE*.
00677      *
00678      * Moreover, the MISO pin on the board_kc *must* be in high impedance
00679      * state even when the SPI is off, because the line is wired together
00680      * with the KBus serial RX, and the transmitter of the slave boards
00681      * would be unable to drive the line.
00682      */
00683     ATOMIC(SPI_DDR |= (BV(SPI_MOSI_BIT) | BV(SPI_SCK_BIT)));
00684
00685     /*
00686      * If the SPI master mode is activated and the SS pin is in input and tied low,
00687      * the SPI hardware will automatically switch to slave mode!
00688      * For proper communication this pins should therefore be:
00689      * - as output
00690      * - as input but tied high forever!
00691      * This driver set the pin as output.
00692      */
00693     #warning FIXME:SPI SS pin set as output for proper operation, check schematics for possible conflicts.
00694     ATOMIC(SPI_DDR |= BV(SPI_SS_BIT));
00695
00696     ATOMIC(SPI_DDR &= ~BV(SPI_MISO_BIT));
00697     /* Enable SPI, IRQ on, Master */
00698     SPCR = BV(SPE) | BV(SPIE) | BV(MSTR);
00699
00700     /* Set data order */
00701     #if CONFIG_SPI_DATA_ORDER == SER_LSB_FIRST
00702         SPCR |= BV(DORD);
00703     #endif
00704
00705     /* Set SPI clock rate */
00706     #if CONFIG_SPI_CLOCK_DIV == 128
00707         SPCR |= (BV(SPR1) | BV(SPR0));
00708     #elif (CONFIG_SPI_CLOCK_DIV == 64 || CONFIG_SPI_CLOCK_DIV == 32)
00709         SPCR |= BV(SPR1);
00710     #elif (CONFIG_SPI_CLOCK_DIV == 16 || CONFIG_SPI_CLOCK_DIV == 8)
00711         SPCR |= BV(SPR0);
00712     #elif (CONFIG_SPI_CLOCK_DIV == 4 || CONFIG_SPI_CLOCK_DIV == 2)
00713         // SPR0 & SDPR1 both at 0
00714     #else
00715         #error Unsupported SPI clock division factor.
00716     #endif
00717
00718     /* Set SPI2X bit (spi double frequency) */
00719     #if (CONFIG_SPI_CLOCK_DIV == 128 || CONFIG_SPI_CLOCK_DIV == 64 \
00720       || CONFIG_SPI_CLOCK_DIV == 16 || CONFIG_SPI_CLOCK_DIV == 4)
00721         SPSR &= ~BV(SPI2X);
00722     #elif (CONFIG_SPI_CLOCK_DIV == 32 || CONFIG_SPI_CLOCK_DIV == 8 || CONFIG_SPI_CLOCK_DIV == 2)
00723         SPSR |= BV(SPI2X);
00724     #else
00725         #error Unsupported SPI clock division factor.
00726     #endif
00727
00728     /* Set clock polarity */
00729     #if CONFIG_SPI_CLOCK_POL == 1
00730         SPCR |= BV(CPOL);
00731     #endif
00732
00733     /* Set clock phase */
00734     #if CONFIG_SPI_CLOCK_PHASE == 1
00735         SPCR |= BV(CPHA);
00736     #endif
00737     SER_SPI_BUS_TXINIT;
00738
00739     SER_STROBE_INIT;
00740 }
00741
00742 static void spi_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
00743 {
00744     SPCR = 0;
00745
00746     SER_SPI_BUS_TXCLOSE;
00747
00748     /* Set all pins as inputs */
00749     ATOMIC(SPI_DDR &= ~(BV(SPI_MISO_BIT) | BV(SPI_MOSI_BIT) | BV(SPI_SCK_BIT) | BV(SPI_SS_BIT)));
00750 }
00751
00752 static void spi_starttx(struct SerialHardware *_hw)
00753 {
00754     struct AvrSerial *hw = (struct AvrSerial *)_hw;
00755
00756     cpu_flags_t flags;
00757     IRQ_SAVE_DISABLE(flags);
00758
00759     /* Send data only if the SPI is not already transmitting */
00760     if (!hw->sending && !fifo_isempty(&ser_handles[SER_SPI]->txfifo))
00761     {
00762         hw->sending = true;
00763         SPDR = fifo_pop(&ser_handles[SER_SPI]->txfifo);
00764     }
00765
00766     IRQ_RESTORE(flags);
00767 }
00768
00769 static void spi_setbaudrate(
00770     UNUSED_ARG(struct SerialHardware *, _hw),
00771     UNUSED_ARG(unsigned long, rate))
00772 {
00773     // nop
00774 }
00775
00776 static void spi_setparity(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(int, parity))
00777 {
00778     // nop
00779 }
00780
00781 static bool tx_sending(struct SerialHardware* _hw)
00782 {
00783     struct AvrSerial *hw = (struct AvrSerial *)_hw;
00784     return hw->sending;
00785 }
00786
00787
00788
00789 // FIXME: move into compiler.h?  Ditch?
00790 #if COMPILER_C99
00791     #define C99INIT(name,val) .name = val
00792 #elif defined(__GNUC__)
00793     #define C99INIT(name,val) name: val
00794 #else
00795     #warning No designated initializers, double check your code
00796     #define C99INIT(name,val) (val)
00797 #endif
00798
00799 /*
00800  * High-level interface data structures
00801  */
00802 static const struct SerialHardwareVT UART0_VT =
00803 {
00804     C99INIT(init, uart0_init),
00805     C99INIT(cleanup, uart0_cleanup),
00806     C99INIT(setBaudrate, uart0_setbaudrate),
00807     C99INIT(setParity, uart0_setparity),
00808     C99INIT(txStart, uart0_enabletxirq),
00809     C99INIT(txSending, tx_sending),
00810 };
00811
00812 #if AVR_HAS_UART1
00813 static const struct SerialHardwareVT UART1_VT =
00814 {
00815     C99INIT(init, uart1_init),
00816     C99INIT(cleanup, uart1_cleanup),
00817     C99INIT(setBaudrate, uart1_setbaudrate),
00818     C99INIT(setParity, uart1_setparity),
00819     C99INIT(txStart, uart1_enabletxirq),
00820     C99INIT(txSending, tx_sending),
00821 };
00822 #endif // AVR_HAS_UART1
00823
00824 #if AVR_HAS_UART2
00825 static const struct SerialHardwareVT UART2_VT =
00826 {
00827     C99INIT(init, uart2_init),
00828     C99INIT(cleanup, uart2_cleanup),
00829     C99INIT(setBaudrate, uart2_setbaudrate),
00830     C99INIT(setParity, uart2_setparity),
00831     C99INIT(txStart, uart2_enabletxirq),
00832     C99INIT(txSending, tx_sending),
00833 };
00834 #endif // AVR_HAS_UART2
00835
00836 #if AVR_HAS_UART3
00837 static const struct SerialHardwareVT UART3_VT =
00838 {
00839     C99INIT(init, uart3_init),
00840     C99INIT(cleanup, uart3_cleanup),
00841     C99INIT(setBaudrate, uart3_setbaudrate),
00842     C99INIT(setParity, uart3_setparity),
00843     C99INIT(txStart, uart3_enabletxirq),
00844     C99INIT(txSending, tx_sending),
00845 };
00846 #endif // AVR_HAS_UART3
00847
00848 static const struct SerialHardwareVT SPI_VT =
00849 {
00850     C99INIT(init, spi_init),
00851     C99INIT(cleanup, spi_cleanup),
00852     C99INIT(setBaudrate, spi_setbaudrate),
00853     C99INIT(setParity, spi_setparity),
00854     C99INIT(txStart, spi_starttx),
00855     C99INIT(txSending, tx_sending),
00856 };
00857
00858 static struct AvrSerial UARTDescs[SER_CNT] =
00859 {
00860     {
00861         C99INIT(hw, ) {
00862             C99INIT(table, &UART0_VT),
00863             C99INIT(txbuffer, uart0_txbuffer),
00864             C99INIT(rxbuffer, uart0_rxbuffer),
00865             C99INIT(txbuffer_size, sizeof(uart0_txbuffer)),
00866             C99INIT(rxbuffer_size, sizeof(uart0_rxbuffer)),
00867         },
00868         C99INIT(sending, false),
00869     },
00870 #if AVR_HAS_UART1
00871     {
00872         C99INIT(hw, ) {
00873             C99INIT(table, &UART1_VT),
00874             C99INIT(txbuffer, uart1_txbuffer),
00875             C99INIT(rxbuffer, uart1_rxbuffer),
00876             C99INIT(txbuffer_size, sizeof(uart1_txbuffer)),
00877             C99INIT(rxbuffer_size, sizeof(uart1_rxbuffer)),
00878         },
00879         C99INIT(sending, false),
00880     },
00881 #endif
00882 #if AVR_HAS_UART2
00883     {
00884         C99INIT(hw, ) {
00885             C99INIT(table, &UART2_VT),
00886             C99INIT(txbuffer, uart2_txbuffer),
00887             C99INIT(rxbuffer, uart2_rxbuffer),
00888             C99INIT(txbuffer_size, sizeof(uart2_txbuffer)),
00889             C99INIT(rxbuffer_size, sizeof(uart2_rxbuffer)),
00890         },
00891         C99INIT(sending, false),
00892     },
00893 #endif
00894 #if AVR_HAS_UART3
00895     {
00896         C99INIT(hw, ) {
00897             C99INIT(table, &UART3_VT),
00898             C99INIT(txbuffer, uart3_txbuffer),
00899             C99INIT(rxbuffer, uart3_rxbuffer),
00900             C99INIT(txbuffer_size, sizeof(uart3_txbuffer)),
00901             C99INIT(rxbuffer_size, sizeof(uart3_rxbuffer)),
00902         },
00903         C99INIT(sending, false),
00904     },
00905 #endif
00906     {
00907         C99INIT(hw, ) {
00908             C99INIT(table, &SPI_VT),
00909             C99INIT(txbuffer, spi_txbuffer),
00910             C99INIT(rxbuffer, spi_rxbuffer),
00911             C99INIT(txbuffer_size, sizeof(spi_txbuffer)),
00912             C99INIT(rxbuffer_size, sizeof(spi_rxbuffer)),
00913         },
00914         C99INIT(sending, false),
00915     }
00916 };
00917
00918 struct SerialHardware *ser_hw_getdesc(int unit)
00919 {
00920     ASSERT(unit < SER_CNT);
00921     return &UARTDescs[unit].hw;
00922 }
00923
00924
00925 /*
00926  * Interrupt handlers
00927  */
00928
00929 #if CONFIG_SER_HWHANDSHAKE
00930
00932 DECLARE_ISR(SIG_CTS)
00933 {
00934     // Re-enable UDR empty interrupt and TX, then disable CTS interrupt
00935     UCSR0B = BV(BIT_RXCIE0) | BV(BIT_UDRIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0);
00936     EIMSK &= ~EIMSKF_CTS;
00937 }
00938
00939 #endif // CONFIG_SER_HWHANDSHAKE
00940
00941
00945 DECLARE_ISR(USART0_UDRE_vect)
00946 {
00947     SER_STROBE_ON;
00948
00949     struct FIFOBuffer * const txfifo = &ser_handles[SER_UART0]->txfifo;
00950
00951     if (fifo_isempty(txfifo))
00952     {
00953         SER_UART0_BUS_TXEND;
00954 #ifndef SER_UART0_BUS_TXOFF
00955         UARTDescs[SER_UART0].sending = false;
00956 #endif
00957     }
00958 #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA103
00959     else if (!IS_CTS_ON)
00960     {
00961         // Disable rx interrupt and tx, enable CTS interrupt
00962         // UNTESTED
00963         UCSR0B = BV(BIT_RXCIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0);
00964         EIFR |= EIMSKF_CTS;
00965         EIMSK |= EIMSKF_CTS;
00966     }
00967 #endif
00968     else
00969     {
00970         char c = fifo_pop(txfifo);
00971         SER_UART0_BUS_TXCHAR(c);
00972     }
00973
00974     SER_STROBE_OFF;
00975 }
00976
00977 #ifdef SER_UART0_BUS_TXOFF
00978
00993 DECLARE_ISR(USART0_TX_vect)
00994 {
00995     SER_STROBE_ON;
00996
00997     struct FIFOBuffer * const txfifo = &ser_handles[SER_UART0]->txfifo;
00998     if (fifo_isempty(txfifo))
00999     {
01000         SER_UART0_BUS_TXOFF;
01001         UARTDescs[SER_UART0].sending = false;
01002     }
01003     else
01004         UCSR0B = BV(BIT_RXCIE0) | BV(BIT_UDRIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0);
01005
01006     SER_STROBE_OFF;
01007 }
01008 #endif /* SER_UART0_BUS_TXOFF */
01009
01010
01011 #if AVR_HAS_UART1
01012
01016 DECLARE_ISR(USART1_UDRE_vect)
01017 {
01018     SER_STROBE_ON;
01019
01020     struct FIFOBuffer * const txfifo = &ser_handles[SER_UART1]->txfifo;
01021
01022     if (fifo_isempty(txfifo))
01023     {
01024         SER_UART1_BUS_TXEND;
01025 #ifndef SER_UART1_BUS_TXOFF
01026         UARTDescs[SER_UART1].sending = false;
01027 #endif
01028     }
01029 #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA103
01030     else if (!IS_CTS_ON)
01031     {
01032         // Disable rx interrupt and tx, enable CTS interrupt
01033         // UNTESTED
01034         UCSR1B = BV(BIT_RXCIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1);
01035         EIFR |= EIMSKF_CTS;
01036         EIMSK |= EIMSKF_CTS;
01037     }
01038 #endif
01039     else
01040     {
01041         char c = fifo_pop(txfifo);
01042         SER_UART1_BUS_TXCHAR(c);
01043     }
01044
01045     SER_STROBE_OFF;
01046 }
01047
01048 #ifdef SER_UART1_BUS_TXOFF
01049
01054 DECLARE_ISR(USART1_TX_vect)
01055 {
01056     SER_STROBE_ON;
01057
01058     struct FIFOBuffer * const txfifo = &ser_handles[SER_UART1]->txfifo;
01059     if (fifo_isempty(txfifo))
01060     {
01061         SER_UART1_BUS_TXOFF;
01062         UARTDescs[SER_UART1].sending = false;
01063     }
01064     else
01065         UCSR1B = BV(BIT_RXCIE1) | BV(BIT_UDRIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1);
01066
01067     SER_STROBE_OFF;
01068 }
01069 #endif /* SER_UART1_BUS_TXOFF */
01070
01071 #endif // AVR_HAS_UART1
01072
01073 #if AVR_HAS_UART2
01074
01078 DECLARE_ISR(USART2_UDRE_vect)
01079 {
01080     SER_STROBE_ON;
01081
01082     struct FIFOBuffer * const txfifo = &ser_handles[SER_UART2]->txfifo;
01083
01084     if (fifo_isempty(txfifo))
01085     {
01086         SER_UART2_BUS_TXEND;
01087 #ifndef SER_UART2_BUS_TXOFF
01088         UARTDescs[SER_UART2].sending = false;
01089 #endif
01090     }
01091     else
01092     {
01093         char c = fifo_pop(txfifo);
01094         SER_UART2_BUS_TXCHAR(c);
01095     }
01096
01097     SER_STROBE_OFF;
01098 }
01099
01100 #ifdef SER_UART2_BUS_TXOFF
01101
01106 DECLARE_ISR(USART2_TX_vect)
01107 {
01108     SER_STROBE_ON;
01109
01110     struct FIFOBuffer * const txfifo = &ser_handles[SER_UART2]->txfifo;
01111     if (fifo_isempty(txfifo))
01112     {
01113         SER_UART2_BUS_TXOFF;
01114         UARTDescs[SER_UART2].sending = false;
01115     }
01116     else
01117         UCSR2B = BV(BIT_RXCIE2) | BV(BIT_UDRIE2) | BV(BIT_RXEN2) | BV(BIT_TXEN2);
01118
01119     SER_STROBE_OFF;
01120 }
01121 #endif /* SER_UART2_BUS_TXOFF */
01122
01123 #endif // AVR_HAS_UART2
01124
01125 #if AVR_HAS_UART3
01126
01130 DECLARE_ISR(USART3_UDRE_vect)
01131 {
01132     SER_STROBE_ON;
01133
01134     struct FIFOBuffer * const txfifo = &ser_handles[SER_UART3]->txfifo;
01135
01136     if (fifo_isempty(txfifo))
01137     {
01138         SER_UART3_BUS_TXEND;
01139 #ifndef SER_UART3_BUS_TXOFF
01140         UARTDescs[SER_UART3].sending = false;
01141 #endif
01142     }
01143     else
01144     {
01145         char c = fifo_pop(txfifo);
01146         SER_UART3_BUS_TXCHAR(c);
01147     }
01148
01149     SER_STROBE_OFF;
01150 }
01151
01152 #ifdef SER_UART3_BUS_TXOFF
01153
01158 DECLARE_ISR(USART3_TX_vect)
01159 {
01160     SER_STROBE_ON;
01161
01162     struct FIFOBuffer * const txfifo = &ser_handles[SER_UART3]->txfifo;
01163     if (fifo_isempty(txfifo))
01164     {
01165         SER_UART3_BUS_TXOFF;
01166         UARTDescs[SER_UART3].sending = false;
01167     }
01168     else
01169         UCSR3B = BV(BIT_RXCIE3) | BV(BIT_UDRIE3) | BV(BIT_RXEN3) | BV(BIT_TXEN3);
01170
01171     SER_STROBE_OFF;
01172 }
01173 #endif /* SER_UART3_BUS_TXOFF */
01174
01175 #endif // AVR_HAS_UART3
01176
01177
01193 DECLARE_ISR(USART0_RX_vect)
01194 {
01195     SER_STROBE_ON;
01196
01197     /* Disable Recv complete IRQ */
01198     //UCSR0B &= ~BV(RXCIE);
01199     //IRQ_ENABLE;
01200
01201     /* Should be read before UDR */
01202     ser_handles[SER_UART0]->status |= UCSR0A & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR);
01203
01204     /* To clear the RXC flag we must _always_ read the UDR even when we're
01205      * not going to accept the incoming data, otherwise a new interrupt
01206      * will occur once the handler terminates.
01207      */
01208     char c = UDR0;
01209     struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART0]->rxfifo;
01210
01211     if (fifo_isfull(rxfifo))
01212         ser_handles[SER_UART0]->status |= SERRF_RXFIFOOVERRUN;
01213     else
01214     {
01215         fifo_push(rxfifo, c);
01216 #if CONFIG_SER_HWHANDSHAKE
01217         if (fifo_isfull(rxfifo))
01218             RTS_OFF;
01219 #endif
01220     }
01221
01222     /* Reenable receive complete int */
01223     //IRQ_DISABLE;
01224     //UCSR0B |= BV(RXCIE);
01225
01226     SER_STROBE_OFF;
01227 }
01228
01229
01230 #if AVR_HAS_UART1
01231
01243 DECLARE_ISR(USART1_RX_vect)
01244 {
01245     SER_STROBE_ON;
01246
01247     /* Disable Recv complete IRQ */
01248     //UCSR1B &= ~BV(RXCIE);
01249     //IRQ_ENABLE;
01250
01251     /* Should be read before UDR */
01252     ser_handles[SER_UART1]->status |= UCSR1A & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR);
01253
01254     /* To avoid an IRQ storm, we must _always_ read the UDR even when we're
01255      * not going to accept the incoming data
01256      */
01257     char c = UDR1;
01258     struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART1]->rxfifo;
01259     //ASSERT_VALID_FIFO(rxfifo);
01260
01261     if (UNLIKELY(fifo_isfull(rxfifo)))
01262         ser_handles[SER_UART1]->status |= SERRF_RXFIFOOVERRUN;
01263     else
01264     {
01265         fifo_push(rxfifo, c);
01266 #if CONFIG_SER_HWHANDSHAKE
01267         if (fifo_isfull(rxfifo))
01268             RTS_OFF;
01269 #endif
01270     }
01271     /* Re-enable receive complete int */
01272     //IRQ_DISABLE;
01273     //UCSR1B |= BV(RXCIE);
01274
01275     SER_STROBE_OFF;
01276 }
01277
01278 #endif // AVR_HAS_UART1
01279
01280 #if AVR_HAS_UART2
01281
01293 DECLARE_ISR(USART2_RX_vect)
01294 {
01295     SER_STROBE_ON;
01296
01297     /* Disable Recv complete IRQ */
01298     //UCSR1B &= ~BV(RXCIE);
01299     //IRQ_ENABLE;
01300
01301     /* Should be read before UDR */
01302     ser_handles[SER_UART2]->status |= UCSR2A & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR);
01303
01304     /* To avoid an IRQ storm, we must _always_ read the UDR even when we're
01305      * not going to accept the incoming data
01306      */
01307     char c = UDR2;
01308     struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART2]->rxfifo;
01309     //ASSERT_VALID_FIFO(rxfifo);
01310
01311     if (UNLIKELY(fifo_isfull(rxfifo)))
01312         ser_handles[SER_UART2]->status |= SERRF_RXFIFOOVERRUN;
01313     else
01314     {
01315         fifo_push(rxfifo, c);
01316 #if CONFIG_SER_HWHANDSHAKE
01317         if (fifo_isfull(rxfifo))
01318             RTS_OFF;
01319 #endif
01320     }
01321     /* Re-enable receive complete int */
01322     //IRQ_DISABLE;
01323     //UCSR1B |= BV(RXCIE);
01324
01325     SER_STROBE_OFF;
01326 }
01327
01328 #endif // AVR_HAS_UART2
01329
01330 #if AVR_HAS_UART3
01331
01343 DECLARE_ISR(USART3_RX_vect)
01344 {
01345     SER_STROBE_ON;
01346
01347     /* Disable Recv complete IRQ */
01348     //UCSR1B &= ~BV(RXCIE);
01349     //IRQ_ENABLE;
01350
01351     /* Should be read before UDR */
01352     ser_handles[SER_UART3]->status |= UCSR3A & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR);
01353
01354     /* To avoid an IRQ storm, we must _always_ read the UDR even when we're
01355      * not going to accept the incoming data
01356      */
01357     char c = UDR3;
01358     struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART3]->rxfifo;
01359     //ASSERT_VALID_FIFO(rxfifo);
01360
01361     if (UNLIKELY(fifo_isfull(rxfifo)))
01362         ser_handles[SER_UART3]->status |= SERRF_RXFIFOOVERRUN;
01363     else
01364     {
01365         fifo_push(rxfifo, c);
01366 #if CONFIG_SER_HWHANDSHAKE
01367         if (fifo_isfull(rxfifo))
01368             RTS_OFF;
01369 #endif
01370     }
01371     /* Re-enable receive complete int */
01372     //IRQ_DISABLE;
01373     //UCSR1B |= BV(RXCIE);
01374
01375     SER_STROBE_OFF;
01376 }
01377
01378 #endif // AVR_HAS_UART3
01379
01380
01384 DECLARE_ISR(SPI_STC_vect)
01385 {
01386     SER_STROBE_ON;
01387
01388     /* Read incoming byte. */
01389     if (!fifo_isfull(&ser_handles[SER_SPI]->rxfifo))
01390         fifo_push(&ser_handles[SER_SPI]->rxfifo, SPDR);
01391     /*
01392      * FIXME
01393     else
01394         ser_handles[SER_SPI]->status |= SERRF_RXFIFOOVERRUN;
01395     */
01396
01397     /* Send */
01398     if (!fifo_isempty(&ser_handles[SER_SPI]->txfifo))
01399         SPDR = fifo_pop(&ser_handles[SER_SPI]->txfifo);
01400     else
01401         UARTDescs[SER_SPI].sending = false;
01402
01403     SER_STROBE_OFF;
01404 }


BeRTOS: ser_mega.h File Reference

  • cpu
  • avr
  • drv
Defines
ser_mega.h File Reference

Low-level serial module for AVR MEGA(interface). More...

#include <cfg/macros.h>
#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define | SERRF_RXFIFOOVERRUN BV(0)
Rx FIFO buffer overrun.
#define | SERRF_RXTIMEOUT BV(5)
Receive timeout.
#define | SERRF_TXTIMEOUT BV(6)
Transmit timeout.
#define | SERRF_RXSROVERRUN BV(3)
Rx shift register overrun.
#define | SERRF_FRAMEERROR BV(4)
Stop bit missing.
#define | SERRF_PARITYERROR BV(7)
Parity error.
#define | SERRF_NOISEERROR 0
Unsupported.
#define | SPI_NORMAL_LOW 0
SPI clock polarity.
#define | SPI_SAMPLE_ON_FIRST_EDGE 0
SPI clock phase.

Enumerations

Serial hw numbers
enum | { SER_CNT }

Detailed Description

Low-level serial module for AVR MEGA(interface).

Author:
Daniele Basile <asterix@develer.com>
Luca Ottaviano <lottaviano@develer.com>

Definition in file ser_mega.h.

Define Documentation

#define SPI_NORMAL_LOW 0

SPI clock polarity.

}

Definition at line 70 of file ser_mega.h.

#define SPI_SAMPLE_ON_FIRST_EDGE 0

SPI clock phase.

}

Definition at line 79 of file ser_mega.h.

Enumeration Type Documentation

anonymous enum
Enumerator:
SER_CNT

Number of serial ports.

Definition at line 87 of file ser_mega.h.


BeRTOS: ser_mega.h Source File

  • cpu
  • avr
  • drv
ser_mega.h
Go to the documentation of this file.
00001
00041 #ifndef DRV_SER_MEGA_H
00042 #define DRV_SER_MEGA_H
00043
00044 #include <cfg/macros.h> /* BV() */
00045 #include <cfg/compiler.h>  /* uint32_t */
00046
00047 typedef uint8_t serstatus_t;
00048
00049 /* Software errors */
00050 #define SERRF_RXFIFOOVERRUN  BV(0)
00051 #define SERRF_RXTIMEOUT      BV(5)
00052 #define SERRF_TXTIMEOUT      BV(6)
00054 /*
00055 * Hardware errors.
00056 * These flags map directly to the AVR UART Status Register (USR).
00057 */
00058 #define SERRF_RXSROVERRUN    BV(3)
00059 #define SERRF_FRAMEERROR     BV(4)
00060 #define SERRF_PARITYERROR    BV(7)
00061 #define SERRF_NOISEERROR     0
00070 #define SPI_NORMAL_LOW      0
00071 #define SPI_NORMAL_HIGH     1
00072
00079 #define SPI_SAMPLE_ON_FIRST_EDGE    0
00080 #define SPI_SAMPLE_ON_SECOND_EDGE   1
00081
00087 enum
00088 {
00089 #if  CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
00090     SER_UART0,
00091     SER_UART1,
00092     SER_UART2,
00093     SER_UART3,
00094     SER_SPI,
00095 #elif  CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281
00096     SER_UART0,
00097     SER_UART1,
00098     SER_SPI,
00099 #elif CPU_AVR_ATMEGA103 || CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 || CPU_AVR_ATMEGA168 \
00100         || CPU_AVR_ATMEGA328P
00101     SER_UART0,
00102     SER_SPI,
00103 #else
00104     #error unknown architecture
00105 #endif
00106     SER_CNT
00107 };
00108 /*\}*/
00109
00110 #endif /* DRV_SER_MEGA_H */


BeRTOS: ser_p.h File Reference

  • drv
ser_p.h File Reference

Hardware dependent serial driver (interface) More...

#include <cfg/compiler.h>

Go to the source code of this file.

Detailed Description

Hardware dependent serial driver (interface)

Author:
Stefano Fedrigo <aleph@develer.com>
Giovanni Bajo <rasky@develer.com>

Definition in file ser_p.h.


BeRTOS: ser_p.h Source File

  • drv
ser_p.h
Go to the documentation of this file.
00001
00041 #ifndef DRV_SER_P_H
00042 #define DRV_SER_P_H
00043
00044 #include <cfg/compiler.h> /* size_t */
00045
00046
00047
00048 struct SerialHardware;
00049 struct Serial;
00050
00051 struct SerialHardwareVT
00052 {
00053     void (*init)(struct SerialHardware *ctx, struct Serial *ser);
00054     void (*cleanup)(struct SerialHardware *ctx);
00055     void (*setBaudrate)(struct SerialHardware *ctx, unsigned long rate);
00056     void (*setParity)(struct SerialHardware *ctx, int parity);
00057     void (*txStart)(struct SerialHardware *ctx);
00058     bool (*txSending)(struct SerialHardware *ctx);
00059 };
00060
00061 struct SerialHardware
00062 {
00063     const struct SerialHardwareVT *table;
00064     unsigned char *txbuffer;
00065     unsigned char *rxbuffer;
00066     size_t         txbuffer_size;
00067     size_t         rxbuffer_size;
00068 };
00069
00070 struct SerialHardware *ser_hw_getdesc(int unit);
00071
00072
00073
00074 #endif /* DRV_SER_P_H */


BeRTOS: ser_posix.c File Reference

  • emul
Data Structures
ser_posix.c File Reference

Serial port emulator for hosted environments. More...

#include "cfg/cfg_ser.h"
#include <cfg/debug.h>
#include <cfg/compiler.h>
#include <drv/ser.h>
#include <drv/ser_p.h>
#include <struct/fifobuf.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <unistd.h>

Go to the source code of this file.

Data Structures

struct EmulSerial
Internal state structure. More...

Detailed Description

Serial port emulator for hosted environments.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file ser_posix.c.


BeRTOS: ser_posix.c Source File

  • emul
ser_posix.c
Go to the documentation of this file.
00001
00038 #include "cfg/cfg_ser.h"
00039
00040 #include <cfg/debug.h>
00041 #include <cfg/compiler.h>
00042
00043 #include <drv/ser.h>
00044 #include <drv/ser_p.h>
00045
00046 #include <struct/fifobuf.h>
00047
00048 #include <sys/types.h>
00049 #include <sys/stat.h>
00050
00051 #include <fcntl.h> /* open() */
00052 #include <unistd.h> /* read(), write() */
00053
00054
00055 /* From the high-level serial driver */
00056 extern struct Serial ser_handles[SER_CNT];
00057
00058 /* TX and RX buffers */
00059 static unsigned char uart0_txbuffer[CONFIG_UART0_TXBUFSIZE];
00060 static unsigned char uart0_rxbuffer[CONFIG_UART0_RXBUFSIZE];
00061 static unsigned char uart1_txbuffer[CONFIG_UART1_TXBUFSIZE];
00062 static unsigned char uart1_rxbuffer[CONFIG_UART1_RXBUFSIZE];
00063
00064
00068 struct EmulSerial
00069 {
00070     struct SerialHardware hw;
00071     struct Serial *ser;
00072     int fd;
00073 };
00074
00075
00076 /*
00077  * Callbacks
00078  */
00079 static void uart_init(struct SerialHardware *_hw, struct Serial *ser)
00080 {
00081     struct EmulSerial *hw = (struct EmulSerial *)_hw;
00082
00083     hw->ser = ser;
00084     hw->fd = open("/dev/ttyS0", O_RDWR);
00085 }
00086
00087 static void uart_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
00088 {
00089     struct EmulSerial *hw = (struct EmulSerial *)_hw;
00090
00091     close(hw->fd);
00092     hw->fd = -1;
00093 }
00094
00095 static void uart_txStart(struct SerialHardware * _hw)
00096 {
00097     struct EmulSerial *hw = (struct EmulSerial *)_hw;
00098
00099     while(!fifo_isempty(&hw->ser->txfifo))
00100     {
00101         char c = fifo_pop(&hw->ser->txfifo);
00102         write(hw->fd, &c, 1);
00103     }
00104 }
00105
00106 static bool uart_txSending(UNUSED_ARG(struct SerialHardware *, _hw))
00107 {
00108     return false;
00109 }
00110
00111
00112 static void uart_setBaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
00113 {
00114     TRACEMSG("rate=%lu", rate);
00115     // TODO
00116
00117 }
00118
00119 static void uart_setParity(UNUSED_ARG(struct SerialHardware *, _hw), int parity)
00120 {
00121     TRACEMSG("parity=%d", parity);
00122     // TODO
00123 }
00124
00125 // FIXME: move into compiler.h?  Ditch?
00126 #if COMPILER_C99
00127     #define C99INIT(name,val) .name = val
00128 #elif defined(__GNUC__)
00129     #define C99INIT(name,val) name: val
00130 #else
00131     #warning No designated initializers, double check your code
00132     #define C99INIT(name,val) (val)
00133 #endif
00134
00135 /*
00136  * High-level interface data structures.
00137  */
00138 static const struct SerialHardwareVT uart_vtable =
00139 {
00140     C99INIT(init, uart_init),
00141     C99INIT(cleanup, uart_cleanup),
00142     C99INIT(setBaudrate, uart_setBaudrate),
00143     C99INIT(setParity, uart_setParity),
00144     C99INIT(txStart, uart_txStart),
00145     C99INIT(txSending, uart_txSending),
00146 };
00147
00148 static struct EmulSerial UARTDescs[SER_CNT] =
00149 {
00150     {
00151         C99INIT(hw, ) {
00152             C99INIT(table, &uart_vtable),
00153             C99INIT(txbuffer, uart0_txbuffer),
00154             C99INIT(rxbuffer, uart0_rxbuffer),
00155             C99INIT(txbuffer_size, sizeof(uart0_txbuffer)),
00156             C99INIT(rxbuffer_size, sizeof(uart0_rxbuffer)),
00157         },
00158         C99INIT(ser, NULL),
00159         C99INIT(fd, -1),
00160     },
00161     {
00162         C99INIT(hw, ) {
00163             C99INIT(table, &uart_vtable),
00164             C99INIT(txbuffer, uart1_txbuffer),
00165             C99INIT(rxbuffer, uart1_rxbuffer),
00166             C99INIT(txbuffer_size, sizeof(uart1_txbuffer)),
00167             C99INIT(rxbuffer_size, sizeof(uart1_rxbuffer)),
00168         },
00169         C99INIT(ser, NULL),
00170         C99INIT(fd, -1),
00171     },
00172 };
00173
00174 struct SerialHardware *ser_hw_getdesc(int unit)
00175 {
00176     ASSERT(unit < SER_CNT);
00177     return &UARTDescs[unit].hw;
00178 }


BeRTOS: ser_sam3.c File Reference

  • cpu
  • cortex-m3
  • drv
Data Structures | Defines | Functions
ser_sam3.c File Reference

ARM UART and SPI I/O driver. More...

#include "hw/hw_ser.h"
#include <hw/hw_cpufreq.h>
#include "cfg/cfg_ser.h"
#include <cfg/debug.h>
#include <io/cm3.h>
#include <drv/irq_cm3.h>
#include <cpu/attr.h>
#include <drv/ser.h>
#include <drv/ser_p.h>
#include <struct/fifobuf.h>

Go to the source code of this file.

Data Structures

struct | ArmSerial
Internal hardware state structure. More...

Defines

#define | SERIRQ_PRIORITY 4
default priority for serial irqs.
Overridable serial bus hooks

These can be redefined in hw.h to implement special bus policies such as half-duplex, 485, etc.

  TXBEGIN      TXCHAR      TXEND  TXOFF
    |   __________|__________ |     |
    |   |   |   |   |   |   | |     |
    v   v   v   v   v   v   v v     v
 ______  __  __  __  __  __  __  ________________
       \/  \/  \/  \/  \/  \/  \/
 ______/\__/\__/\__/\__/\__/\__/
#define | SER_UART0_BUS_TXINIT
Default TXINIT macro - invoked in uart0_init()
#define | SER_UART0_BUS_TXBEGIN
Invoked before starting a transmission.
#define | SER_UART0_BUS_TXCHAR(c)
Invoked to send one character.
#define | SER_UART0_BUS_TXEND
Invoked as soon as the txfifo becomes empty.
Overridable SPI hooks

These can be redefined in hw.h to implement special bus policies such as slave select pin handling, etc.

#define | SER_SPI0_BUS_TXINIT
Default TXINIT macro - invoked in spi_init() The default is no action.
#define | SER_SPI0_BUS_TXCLOSE
Invoked after the last character has been transmitted.

Functions

void | uart0_irq_tx (void)
Serial 0 TX interrupt handler.
void | uart0_irq_rx (void)
Serial 0 RX complete interrupt handler.
static | DECLARE_ISR (uart0_irq_dispatcher)
Serial IRQ dispatcher for USART0.
static | DECLARE_ISR (spi0_irq_handler)
SPI0 interrupt handler.

Detailed Description

ARM UART and SPI I/O driver.

Author:
Daniele Basile <asterix@develer.com>
Stefano Fedrigo <aleph@develer.com>

Definition in file ser_sam3.c.

Define Documentation

#define SER_SPI0_BUS_TXCLOSE
Value:
do { \
        /* Enable PIO on SPI pins */ \
        PIOA_PER = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO); \
    } while (0)

Invoked after the last character has been transmitted.

The default is no action.

Definition at line 199 of file ser_sam3.c.

#define SER_UART0_BUS_TXINIT
Value:
do { \
        PIOA_PDR = BV(RXD0) | BV(TXD0); \
        PIO_PERIPH_SEL(PIOA_BASE, BV(RXD0) | BV(TXD0), USART0_PERIPH); \
    } while (0)

Default TXINIT macro - invoked in uart0_init()

  • Disable GPIO on USART0 tx/rx pins

Definition at line 92 of file ser_sam3.c.


BeRTOS: ser_sam3.c Source File

  • cpu
  • cortex-m3
  • drv
ser_sam3.c
Go to the documentation of this file.
00001
00041 #include "hw/hw_ser.h"  /* Required for bus macros overrides */
00042 #include <hw/hw_cpufreq.h>  /* CPU_FREQ */
00043
00044 #include "cfg/cfg_ser.h"
00045 #include <cfg/debug.h>
00046
00047
00048 //#include <io/arm.h>
00049 #include <io/cm3.h>
00050 #include <drv/irq_cm3.h>
00051
00052 #include <cpu/attr.h>
00053
00054 #include <drv/ser.h>
00055 #include <drv/ser_p.h>
00056
00057 #include <struct/fifobuf.h>
00058
00059
00060 #define SERIRQ_PRIORITY 4 ///< default priority for serial irqs.
00061
00083 #ifndef SER_UART0_BUS_TXINIT
00084
00089     #if CPU_ARM_AT91 && !CPU_ARM_SAM7S_LARGE && !CPU_ARM_SAM7X
00090         #warning Check USART0 pins!
00091     #endif
00092     #define SER_UART0_BUS_TXINIT do { \
00093         PIOA_PDR = BV(RXD0) | BV(TXD0); \
00094         PIO_PERIPH_SEL(PIOA_BASE, BV(RXD0) | BV(TXD0), USART0_PERIPH); \
00095     } while (0)
00096 #endif
00097
00098 #ifndef SER_UART0_BUS_TXBEGIN
00099
00102     #define SER_UART0_BUS_TXBEGIN
00103 #endif
00104
00105 #ifndef SER_UART0_BUS_TXCHAR
00106
00109     #define SER_UART0_BUS_TXCHAR(c) do { \
00110         US0_THR = (c); \
00111     } while (0)
00112 #endif
00113
00114 #ifndef SER_UART0_BUS_TXEND
00115
00118     #define SER_UART0_BUS_TXEND
00119 #endif
00120
00121 /* End USART0 macros */
00122
00123 #if USART_PORTS > 1
00124
00125     #ifndef SER_UART1_BUS_TXINIT
00126
00131         #if CPU_ARM_AT91 && !CPU_ARM_SAM7S_LARGE && !CPU_ARM_SAM7X
00132             #warning Check USART1 pins!
00133         #endif
00134         #define SER_UART1_BUS_TXINIT do { \
00135             PIOA_PDR = BV(RXD1) | BV(TXD1); \
00136             PIO_PERIPH_SEL(PIOA_BASE, BV(RXD1) | BV(TXD1), USART1_PERIPH); \
00137         } while (0)
00138     #endif
00139
00140     #ifndef SER_UART1_BUS_TXBEGIN
00141
00144         #define SER_UART1_BUS_TXBEGIN
00145     #endif
00146
00147     #ifndef SER_UART1_BUS_TXCHAR
00148
00151         #define SER_UART1_BUS_TXCHAR(c) do { \
00152             US1_THR = (c); \
00153         } while (0)
00154     #endif
00155
00156     #ifndef SER_UART1_BUS_TXEND
00157
00160         #define SER_UART1_BUS_TXEND
00161     #endif
00162
00163 #endif
00164
00174 #ifndef SER_SPI0_BUS_TXINIT
00175
00179     #if CPU_CM3_SAM3
00180         #define SER_SPI0_BUS_TXINIT do { \
00181             /* Disable PIO on SPI pins */ \
00182             PIOA_PDR = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO); \
00183             /* SPI is peripheral A on SAM3X,A,N,S,U */ \
00184             PIO_PERIPH_SEL(PIOA_BASE, BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO), PIO_PERIPH_A); \
00185         } while (0)
00186     #else
00187         #define SER_SPI0_BUS_TXINIT do { \
00188             /* Disable PIO on SPI pins */ \
00189             PIOA_PDR = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO); \
00190         } while (0)
00191     #endif
00192 #endif
00193
00194 #ifndef SER_SPI0_BUS_TXCLOSE
00195
00199     #define SER_SPI0_BUS_TXCLOSE do { \
00200         /* Enable PIO on SPI pins */ \
00201         PIOA_PER = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO); \
00202     } while (0)
00203 #endif
00204
00205 #if CPU_ARM_SAM7X
00206
00207     #ifndef SER_SPI1_BUS_TXINIT
00208
00212         #define SER_SPI1_BUS_TXINIT do { \
00213             /* Disable PIO on SPI pins */ \
00214             PIOA_PDR = BV(SPI1_SPCK) | BV(SPI1_MOSI) | BV(SPI1_MISO); \
00215             /* SPI1 pins are on B peripheral function! */ \
00216             PIOA_BSR = BV(SPI1_SPCK) | BV(SPI1_MOSI) | BV(SPI1_MISO); \
00217         } while (0)
00218     #endif
00219
00220     #ifndef SER_SPI1_BUS_TXCLOSE
00221
00225         #define SER_SPI1_BUS_TXCLOSE do { \
00226             /* Enable PIO on SPI pins */ \
00227             PIOA_PER = BV(SPI1_SPCK) | BV(SPI1_MOSI) | BV(SPI1_MISO); \
00228         } while (0)
00229     #endif
00230 #endif
00231 /*\}*/
00232
00233
00244 #if CPU_ARM_AT91
00245
00246 INLINE void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler)
00247 {
00248     /* Set the vector. */
00249     AIC_SVR(irq) = uart0_irq_dispatcher;
00250
00251     /* Initialize to level/edge sensitive with defined priority. */
00252 #if CPU_ARM_SAM7X
00253     if (irq == SPI0_ID || irq == SPI1_ID)
00254 #else
00255     if (irq == SPI0_ID)
00256 #endif
00257         AIC_SMR(irq) = (AIC_SMR(irq) & ~AIC_SRCTYPE_MASK) | AIC_SRCTYPE_INT_EDGE_TRIGGERED;
00258     else // USART/UART
00259         AIC_SMR(irq) = (AIC_SMR(irq) & ~AIC_SRCTYPE_MASK) | AIC_SRCTYPE_INT_LEVEL_SENSITIVE;
00260
00261     /* Enable IRQ */
00262     AIC_IECR = BV(irq);
00263 }
00264
00265 INLINE void sysirq_setPriority(sysirq_t irq, int prio)
00266 {
00267     AIC_SMR(irq) = (AIC_SMR(irq) & ~AIC_PRIOR_MASK) | SERIRQ_PRIORITY;
00268 }
00269
00271 #define SER_INT_ACK do { \
00272     AIC_EOICR = 0; \
00273 } while (0)
00274
00275 #elif CPU_CM3_SAM3
00276
00278 #define SER_INT_ACK do { /* nop */ } while (0)
00279
00280 #else
00281     #error No interrupt handling macros defined for current architecture
00282 #endif
00283
00284 /*\}*/
00285
00286 /* From the high-level serial driver */
00287 extern struct Serial *ser_handles[SER_CNT];
00288
00289 /* TX and RX buffers */
00290 static unsigned char uart0_txbuffer[CONFIG_UART0_TXBUFSIZE];
00291 static unsigned char uart0_rxbuffer[CONFIG_UART0_RXBUFSIZE];
00292 #if USART_PORTS > 1
00293 static unsigned char uart1_txbuffer[CONFIG_UART1_TXBUFSIZE];
00294 static unsigned char uart1_rxbuffer[CONFIG_UART1_RXBUFSIZE];
00295 #endif
00296 static unsigned char spi0_txbuffer[CONFIG_SPI0_TXBUFSIZE];
00297 static unsigned char spi0_rxbuffer[CONFIG_SPI0_RXBUFSIZE];
00298 #if CPU_ARM_SAM7X
00299 static unsigned char spi1_txbuffer[CONFIG_SPI1_TXBUFSIZE];
00300 static unsigned char spi1_rxbuffer[CONFIG_SPI1_RXBUFSIZE];
00301 #endif
00302
00319 struct ArmSerial
00320 {
00321     struct SerialHardware hw;
00322     volatile bool sending;
00323 };
00324
00325 static ISR_PROTO(uart0_irq_dispatcher);
00326 #if USART_PORTS > 1
00327 static ISR_PROTO(uart1_irq_dispatcher);
00328 #endif
00329 static ISR_PROTO(spi0_irq_handler);
00330 #if CPU_ARM_SAM7X
00331 static ISR_PROTO(spi1_irq_handler);
00332 #endif
00333 /*
00334  * Callbacks for USART0
00335  */
00336 static void uart0_init(
00337     UNUSED_ARG(struct SerialHardware *, _hw),
00338     UNUSED_ARG(struct Serial *, ser))
00339 {
00340     US0_IDR = 0xFFFFFFFF;
00341     pmc_periphEnable(US0_ID);
00342
00343     /*
00344      * - Reset USART0
00345      * - Set serial param: mode Normal, 8bit data, 1bit stop, parity none
00346      * - Enable both the receiver and the transmitter
00347      * - Enable only the RX complete interrupt
00348      */
00349     US0_CR = BV(US_RSTRX) | BV(US_RSTTX);
00350     US0_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1 | US_PAR_NO;
00351     US0_CR = BV(US_RXEN) | BV(US_TXEN);
00352     US0_IER = BV(US_RXRDY);
00353
00354     SER_UART0_BUS_TXINIT;
00355
00356     sysirq_setPriority(INT_US0, SERIRQ_PRIORITY);
00357     sysirq_setHandler(INT_US0, uart0_irq_dispatcher);
00358
00359     SER_STROBE_INIT;
00360 }
00361
00362 static void uart0_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
00363 {
00364     US0_CR = BV(US_RSTRX) | BV(US_RSTTX) | BV(US_RXDIS) | BV(US_TXDIS) | BV(US_RSTSTA);
00365 }
00366
00367 static void uart0_enabletxirq(struct SerialHardware *_hw)
00368 {
00369     struct ArmSerial *hw = (struct ArmSerial *)_hw;
00370
00371     /*
00372      * WARNING: racy code here!  The tx interrupt sets hw->sending to false
00373      * when it runs with an empty fifo.  The order of statements in the
00374      * if-block matters.
00375      */
00376     if (!hw->sending)
00377     {
00378         hw->sending = true;
00379         /*
00380          * - Enable the transmitter
00381          * - Enable TX empty interrupt
00382          */
00383         SER_UART0_BUS_TXBEGIN;
00384         US0_IER = BV(US_TXEMPTY);
00385     }
00386 }
00387
00388 static void uart0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
00389 {
00390     /* Compute baud-rate period */
00391     US0_BRGR = CPU_FREQ / (16 * rate);
00392     //DB(kprintf("uart0_setbaudrate(rate=%lu): period=%d\n", rate, period);)
00393 }
00394
00395 static void uart0_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity)
00396 {
00397     US0_MR &= ~US_PAR_MASK;
00398     /* Set UART parity */
00399     switch(parity)
00400     {
00401         case SER_PARITY_NONE:
00402         {
00403             /* Parity none. */
00404             US0_MR |= US_PAR_NO;
00405             break;
00406         }
00407         case SER_PARITY_EVEN:
00408         {
00409             /* Even parity. */
00410             US0_MR |= US_PAR_EVEN;
00411             break;
00412         }
00413         case SER_PARITY_ODD:
00414         {
00415             /* Odd parity. */
00416             US0_MR |= US_PAR_ODD;
00417             break;
00418         }
00419         default:
00420             ASSERT(0);
00421     }
00422 }
00423
00424 #if USART_PORTS > 1
00425
00426 /*
00427  * Callbacks for USART1
00428  */
00429 static void uart1_init(
00430     UNUSED_ARG(struct SerialHardware *, _hw),
00431     UNUSED_ARG(struct Serial *, ser))
00432 {
00433     US1_IDR = 0xFFFFFFFF;
00434     pmc_periphEnable(US1_ID);
00435
00436     /*
00437      * - Reset USART1
00438      * - Set serial param: mode Normal, 8bit data, 1bit stop, parity none
00439      * - Enable both the receiver and the transmitter
00440      * - Enable only the RX complete interrupt
00441      */
00442     US1_CR = BV(US_RSTRX) | BV(US_RSTTX);
00443     US1_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1 | US_PAR_NO;
00444     US1_CR = BV(US_RXEN) | BV(US_TXEN);
00445     US1_IER = BV(US_RXRDY);
00446
00447     SER_UART1_BUS_TXINIT;
00448
00449     sysirq_setPriority(INT_US1, SERIRQ_PRIORITY);
00450     sysirq_setHandler(INT_US1, uart1_irq_dispatcher);
00451
00452     SER_STROBE_INIT;
00453 }
00454
00455 static void uart1_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
00456 {
00457     US1_CR = BV(US_RSTRX) | BV(US_RSTTX) | BV(US_RXDIS) | BV(US_TXDIS) | BV(US_RSTSTA);
00458 }
00459
00460 static void uart1_enabletxirq(struct SerialHardware *_hw)
00461 {
00462     struct ArmSerial *hw = (struct ArmSerial *)_hw;
00463
00464     /*
00465      * WARNING: racy code here!  The tx interrupt sets hw->sending to false
00466      * when it runs with an empty fifo.  The order of statements in the
00467      * if-block matters.
00468      */
00469     if (!hw->sending)
00470     {
00471         hw->sending = true;
00472         /*
00473          * - Enable the transmitter
00474          * - Enable TX empty interrupt
00475          */
00476         SER_UART1_BUS_TXBEGIN;
00477         US1_IER = BV(US_TXEMPTY);
00478     }
00479 }
00480
00481 static void uart1_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
00482 {
00483     /* Compute baud-rate period */
00484     US1_BRGR = CPU_FREQ / (16 * rate);
00485     //DB(kprintf("uart0_setbaudrate(rate=%lu): period=%d\n", rate, period);)
00486 }
00487
00488 static void uart1_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity)
00489 {
00490     US1_MR &= ~US_PAR_MASK;
00491     /* Set UART parity */
00492     switch(parity)
00493     {
00494         case SER_PARITY_NONE:
00495         {
00496             /* Parity none. */
00497             US1_MR |= US_PAR_NO;
00498             break;
00499         }
00500         case SER_PARITY_EVEN:
00501         {
00502             /* Even parity. */
00503             US1_MR |= US_PAR_EVEN;
00504             break;
00505         }
00506         case SER_PARITY_ODD:
00507         {
00508             /* Odd parity. */
00509             US1_MR |= US_PAR_ODD;
00510             break;
00511         }
00512         default:
00513             ASSERT(0);
00514     }
00515 }
00516
00517 #endif /* USART_PORTS > 1 */
00518
00519 /* SPI driver */
00520 static void spi0_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser))
00521 {
00522     SER_SPI0_BUS_TXINIT;
00523
00524     /* Reset device */
00525     SPI0_CR = BV(SPI_SWRST);
00526
00527     /*
00528      * Set SPI to master mode, fixed peripheral select, chip select directly connected to a peripheral device,
00529      * SPI clock set to MCK, mode fault detection disabled, loopback disable, NPCS0 active, Delay between CS = 0
00530      */
00531     SPI0_MR = BV(SPI_MSTR) | BV(SPI_MODFDIS);
00532
00533     /*
00534      * Set SPI mode.
00535      * At reset clock division factor is set to 0, that is
00536      * *forbidden*. Set SPI clock to minimum to keep it valid.
00537      * Set all possible chip select registers in case user manually
00538      * change CPS field in SPI_MR.
00539      */
00540     SPI0_CSR0 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT);
00541     SPI0_CSR1 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT);
00542     SPI0_CSR2 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT);
00543     SPI0_CSR3 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT);
00544
00545     /* Disable all irqs */
00546     SPI0_IDR = 0xFFFFFFFF;
00547
00548     //sysirq_setPriority(INT_SPI0, SERIRQ_PRIORITY);
00549     sysirq_setHandler(INT_SPI0, spi0_irq_handler);
00550     pmc_periphEnable(SPI0_ID);
00551
00552     /* Enable SPI */
00553     SPI0_CR = BV(SPI_SPIEN);
00554
00555     SER_STROBE_INIT;
00556 }
00557
00558 static void spi0_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
00559 {
00560     /* Disable SPI */
00561     SPI0_CR = BV(SPI_SPIDIS);
00562
00563     /* Disable all irqs */
00564     SPI0_IDR = 0xFFFFFFFF;
00565
00566     SER_SPI0_BUS_TXCLOSE;
00567 }
00568
00569 static void spi0_starttx(struct SerialHardware *_hw)
00570 {
00571     struct ArmSerial *hw = (struct ArmSerial *)_hw;
00572
00573     cpu_flags_t flags;
00574     IRQ_SAVE_DISABLE(flags);
00575
00576     /* Send data only if the SPI is not already transmitting */
00577     if (!hw->sending && !fifo_isempty(&ser_handles[SER_SPI0]->txfifo))
00578     {
00579         hw->sending = true;
00580         SPI0_TDR = fifo_pop(&ser_handles[SER_SPI0]->txfifo);
00581         /* Enable interrupt on tx buffer empty */
00582         SPI0_IER = BV(SPI_TXEMPTY);
00583     }
00584
00585     IRQ_RESTORE(flags);
00586 }
00587
00588 static void spi0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
00589 {
00590     SPI0_CSR0 &= ~SPI_SCBR;
00591
00592     ASSERT((uint8_t)DIV_ROUND(CPU_FREQ, rate));
00593     SPI0_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT;
00594 }
00595
00596 #if CPU_ARM_SAM7X
00597 /* SPI driver */
00598 static void spi1_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser))
00599 {
00600     SER_SPI1_BUS_TXINIT;
00601
00602     /* Reset device */
00603     SPI1_CR = BV(SPI_SWRST);
00604
00605     /*
00606      * Set SPI to master mode, fixed peripheral select, chip select directly connected to a peripheral device,
00607      * SPI clock set to MCK, mode fault detection disabled, loopback disable, NPCS0 active, Delay between CS = 0
00608      */
00609     SPI1_MR = BV(SPI_MSTR) | BV(SPI_MODFDIS);
00610
00611     /*
00612      * Set SPI mode.
00613      * At reset clock division factor is set to 0, that is
00614      * *forbidden*. Set SPI clock to minimum to keep it valid.
00615      * Set all possible chip select registers in case user manually
00616      * change chip select.
00617      */
00618     SPI1_CSR0 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT);
00619     SPI1_CSR1 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT);
00620     SPI1_CSR2 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT);
00621     SPI1_CSR3 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT);
00622
00623     /* Disable all SPI irqs */
00624     SPI1_IDR = 0xFFFFFFFF;
00625
00626     sysirq_setPriority(INT_SPI1, SERIRQ_PRIORITY);
00627     sysirq_setHandler(INT_SPI1, spi1_irq_dispatcher);
00628     pmc_periphEnable(SPI1_ID);
00629
00630     /* Enable SPI */
00631     SPI1_CR = BV(SPI_SPIEN);
00632
00633     SER_STROBE_INIT;
00634 }
00635
00636 static void spi1_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
00637 {
00638     /* Disable SPI */
00639     SPI1_CR = BV(SPI_SPIDIS);
00640
00641     /* Disable all irqs */
00642     SPI1_IDR = 0xFFFFFFFF;
00643
00644     SER_SPI1_BUS_TXCLOSE;
00645 }
00646
00647 static void spi1_starttx(struct SerialHardware *_hw)
00648 {
00649     struct ArmSerial *hw = (struct ArmSerial *)_hw;
00650
00651     cpu_flags_t flags;
00652     IRQ_SAVE_DISABLE(flags);
00653
00654     /* Send data only if the SPI is not already transmitting */
00655     if (!hw->sending && !fifo_isempty(&ser_handles[SER_SPI1]->txfifo))
00656     {
00657         hw->sending = true;
00658         SPI1_TDR = fifo_pop(&ser_handles[SER_SPI1]->txfifo);
00659         /* Enable interrupt on tx buffer empty */
00660         SPI1_IER = BV(SPI_TXEMPTY);
00661     }
00662
00663     IRQ_RESTORE(flags);
00664 }
00665
00666 static void spi1_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
00667 {
00668     SPI1_CSR0 &= ~SPI_SCBR;
00669
00670     ASSERT((uint8_t)DIV_ROUND(CPU_FREQ, rate));
00671     SPI1_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT;
00672 }
00673 #endif
00674
00675 static void spi_setparity(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(int, parity))
00676 {
00677     // nop
00678 }
00679
00680
00681 static bool tx_sending(struct SerialHardware* _hw)
00682 {
00683     struct ArmSerial *hw = (struct ArmSerial *)_hw;
00684     return hw->sending;
00685 }
00686
00687 // FIXME: move into compiler.h?  Ditch?
00688 #if COMPILER_C99
00689     #define C99INIT(name,val) .name = val
00690 #elif defined(__GNUC__)
00691     #define C99INIT(name,val) name: val
00692 #else
00693     #warning No designated initializers, double check your code
00694     #define C99INIT(name,val) (val)
00695 #endif
00696
00697 /*
00698  * High-level interface data structures
00699  */
00700 static const struct SerialHardwareVT UART0_VT =
00701 {
00702     C99INIT(init, uart0_init),
00703     C99INIT(cleanup, uart0_cleanup),
00704     C99INIT(setBaudrate, uart0_setbaudrate),
00705     C99INIT(setParity, uart0_setparity),
00706     C99INIT(txStart, uart0_enabletxirq),
00707     C99INIT(txSending, tx_sending),
00708 };
00709
00710 #if USART_PORTS > 1
00711
00712 static const struct SerialHardwareVT UART1_VT =
00713 {
00714     C99INIT(init, uart1_init),
00715     C99INIT(cleanup, uart1_cleanup),
00716     C99INIT(setBaudrate, uart1_setbaudrate),
00717     C99INIT(setParity, uart1_setparity),
00718     C99INIT(txStart, uart1_enabletxirq),
00719     C99INIT(txSending, tx_sending),
00720 };
00721
00722 #endif /* USART_PORTS > 1 */
00723
00724 static const struct SerialHardwareVT SPI0_VT =
00725 {
00726     C99INIT(init, spi0_init),
00727     C99INIT(cleanup, spi0_cleanup),
00728     C99INIT(setBaudrate, spi0_setbaudrate),
00729     C99INIT(setParity, spi_setparity),
00730     C99INIT(txStart, spi0_starttx),
00731     C99INIT(txSending, tx_sending),
00732 };
00733 #if CPU_ARM_SAM7X
00734 static const struct SerialHardwareVT SPI1_VT =
00735 {
00736     C99INIT(init, spi1_init),
00737     C99INIT(cleanup, spi1_cleanup),
00738     C99INIT(setBaudrate, spi1_setbaudrate),
00739     C99INIT(setParity, spi_setparity),
00740     C99INIT(txStart, spi1_starttx),
00741     C99INIT(txSending, tx_sending),
00742 };
00743 #endif
00744
00745 static struct ArmSerial UARTDescs[SER_CNT] =
00746 {
00747     {
00748         C99INIT(hw, ) {
00749             C99INIT(table, &UART0_VT),
00750             C99INIT(txbuffer, uart0_txbuffer),
00751             C99INIT(rxbuffer, uart0_rxbuffer),
00752             C99INIT(txbuffer_size, sizeof(uart0_txbuffer)),
00753             C99INIT(rxbuffer_size, sizeof(uart0_rxbuffer)),
00754         },
00755         C99INIT(sending, false),
00756     },
00757 #if USART_PORTS > 1
00758     {
00759         C99INIT(hw, ) {
00760             C99INIT(table, &UART1_VT),
00761             C99INIT(txbuffer, uart1_txbuffer),
00762             C99INIT(rxbuffer, uart1_rxbuffer),
00763             C99INIT(txbuffer_size, sizeof(uart1_txbuffer)),
00764             C99INIT(rxbuffer_size, sizeof(uart1_rxbuffer)),
00765         },
00766         C99INIT(sending, false),
00767     },
00768 #endif
00769
00770     {
00771         C99INIT(hw, ) {
00772             C99INIT(table, &SPI0_VT),
00773             C99INIT(txbuffer, spi0_txbuffer),
00774             C99INIT(rxbuffer, spi0_rxbuffer),
00775             C99INIT(txbuffer_size, sizeof(spi0_txbuffer)),
00776             C99INIT(rxbuffer_size, sizeof(spi0_rxbuffer)),
00777         },
00778         C99INIT(sending, false),
00779     },
00780     #if CPU_ARM_SAM7X
00781     {
00782         C99INIT(hw, ) {
00783             C99INIT(table, &SPI1_VT),
00784             C99INIT(txbuffer, spi1_txbuffer),
00785             C99INIT(rxbuffer, spi1_rxbuffer),
00786             C99INIT(txbuffer_size, sizeof(spi1_txbuffer)),
00787             C99INIT(rxbuffer_size, sizeof(spi1_rxbuffer)),
00788         },
00789         C99INIT(sending, false),
00790     }
00791
00792     #endif
00793 };
00794
00795 struct SerialHardware *ser_hw_getdesc(int unit)
00796 {
00797     ASSERT(unit < SER_CNT);
00798     return &UARTDescs[unit].hw;
00799 }
00800
00804 INLINE void uart0_irq_tx(void)
00805 {
00806     SER_STROBE_ON;
00807
00808     struct FIFOBuffer * const txfifo = &ser_handles[SER_UART0]->txfifo;
00809
00810     if (fifo_isempty(txfifo))
00811     {
00812         /*
00813          * - Disable the TX empty interrupts
00814          */
00815         US0_IDR = BV(US_TXEMPTY);
00816         SER_UART0_BUS_TXEND;
00817         UARTDescs[SER_UART0].sending = false;
00818     }
00819     else
00820     {
00821         char c = fifo_pop(txfifo);
00822         SER_UART0_BUS_TXCHAR(c);
00823     }
00824
00825     SER_STROBE_OFF;
00826 }
00827
00831 INLINE void uart0_irq_rx(void)
00832 {
00833     SER_STROBE_ON;
00834
00835     /* Should be read before US_CRS */
00836     ser_handles[SER_UART0]->status |= US0_CSR & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR);
00837     US0_CR = BV(US_RSTSTA);
00838
00839     char c = US0_RHR;
00840     struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART0]->rxfifo;
00841
00842     if (fifo_isfull(rxfifo))
00843         ser_handles[SER_UART0]->status |= SERRF_RXFIFOOVERRUN;
00844     else
00845         fifo_push(rxfifo, c);
00846
00847     SER_STROBE_OFF;
00848 }
00849
00853 static DECLARE_ISR(uart0_irq_dispatcher)
00854 {
00855     if (US0_CSR & BV(US_RXRDY))
00856         uart0_irq_rx();
00857
00858     if (US0_CSR & BV(US_TXEMPTY))
00859         uart0_irq_tx();
00860
00861     SER_INT_ACK;
00862 }
00863
00864 #if USART_PORTS > 1
00865
00869 INLINE void uart1_irq_tx(void)
00870 {
00871     SER_STROBE_ON;
00872
00873     struct FIFOBuffer * const txfifo = &ser_handles[SER_UART1]->txfifo;
00874
00875     if (fifo_isempty(txfifo))
00876     {
00877         /*
00878          * - Disable the TX empty interrupts
00879          */
00880         US1_IDR = BV(US_TXEMPTY);
00881         SER_UART1_BUS_TXEND;
00882         UARTDescs[SER_UART1].sending = false;
00883     }
00884     else
00885     {
00886         char c = fifo_pop(txfifo);
00887         SER_UART1_BUS_TXCHAR(c);
00888     }
00889
00890     SER_STROBE_OFF;
00891 }
00892
00896 INLINE void uart1_irq_rx(void)
00897 {
00898     SER_STROBE_ON;
00899
00900     /* Should be read before US_CRS */
00901     ser_handles[SER_UART1]->status |= US1_CSR & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR);
00902     US1_CR = BV(US_RSTSTA);
00903
00904     char c = US1_RHR;
00905     struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART1]->rxfifo;
00906
00907     if (fifo_isfull(rxfifo))
00908         ser_handles[SER_UART1]->status |= SERRF_RXFIFOOVERRUN;
00909     else
00910         fifo_push(rxfifo, c);
00911
00912     SER_STROBE_OFF;
00913 }
00914
00918 static DECLARE_ISR(uart1_irq_dispatcher)
00919 {
00920     if (US1_CSR & BV(US_RXRDY))
00921         uart1_irq_rx();
00922
00923     if (US1_CSR & BV(US_TXEMPTY))
00924         uart1_irq_tx();
00925
00926     SER_INT_ACK;
00927 }
00928
00929 #endif /* USART_PORTS > 1 */
00930
00934 static DECLARE_ISR(spi0_irq_handler)
00935 {
00936     SER_STROBE_ON;
00937
00938     char c = SPI0_RDR;
00939     /* Read incoming byte. */
00940     if (!fifo_isfull(&ser_handles[SER_SPI0]->rxfifo))
00941         fifo_push(&ser_handles[SER_SPI0]->rxfifo, c);
00942     /*
00943      * FIXME
00944     else
00945         ser_handles[SER_SPI0]->status |= SERRF_RXFIFOOVERRUN;
00946     */
00947
00948     /* Send */
00949     if (!fifo_isempty(&ser_handles[SER_SPI0]->txfifo))
00950         SPI0_TDR = fifo_pop(&ser_handles[SER_SPI0]->txfifo);
00951     else
00952     {
00953         UARTDescs[SER_SPI0].sending = false;
00954         /* Disable interrupt on tx buffer empty */
00955         SPI0_IDR = BV(SPI_TXEMPTY);
00956     }
00957
00958     SER_INT_ACK;
00959
00960     SER_STROBE_OFF;
00961 }
00962
00963
00964 #if CPU_ARM_SAM7X
00965
00968 static DECLARE_ISR(spi1_irq_handler)
00969 {
00970     SER_STROBE_ON;
00971
00972     char c = SPI1_RDR;
00973     /* Read incoming byte. */
00974     if (!fifo_isfull(&ser_handles[SER_SPI1]->rxfifo))
00975         fifo_push(&ser_handles[SER_SPI1]->rxfifo, c);
00976     /*
00977      * FIXME
00978     else
00979         ser_handles[SER_SPI1]->status |= SERRF_RXFIFOOVERRUN;
00980     */
00981
00982     /* Send */
00983     if (!fifo_isempty(&ser_handles[SER_SPI1]->txfifo))
00984         SPI1_TDR = fifo_pop(&ser_handles[SER_SPI1]->txfifo);
00985     else
00986     {
00987         UARTDescs[SER_SPI1].sending = false;
00988         /* Disable interrupt on tx buffer empty */
00989         SPI1_IDR = BV(SPI_TXEMPTY);
00990     }
00991
00992     SER_INT_ACK;
00993
00994     SER_STROBE_OFF;
00995 }
00996 #endif


BeRTOS: ser_sam3.h File Reference

  • cpu
  • cortex-m3
  • drv
ser_sam3.h File Reference

High level serial I/O API. More...

#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <cpu/detect.h>

Go to the source code of this file.

Enumerations

Serial hw numbers
enum | { , SER_CNT }

Serial Error/status flags.

#define | SERRF_RXFIFOOVERRUN BV(0)
Rx FIFO buffer overrun.
#define | SERRF_RXTIMEOUT BV(1)
Receive timeout.
#define | SERRF_TXTIMEOUT BV(2)
Transmit timeout.
#define | SERRF_RXSROVERRUN BV(5)
Rx shift register overrun.
#define | SERRF_FRAMEERROR BV(6)
Stop bit missing.
#define | SERRF_PARITYERROR BV(7)
Parity error.
#define | SERRF_NOISEERROR 0
Unsupported.
typedef uint32_t | serstatus_t
Rx FIFO buffer overrun.

Detailed Description

High level serial I/O API.

Author:
Daniele Basile <asterix@develer.com>

Definition in file ser_sam3.h.

Enumeration Type Documentation

anonymous enum
Enumerator:
SER_CNT

Number of serial ports.

Definition at line 70 of file ser_sam3.h.


BeRTOS: ser_sam3.h Source File

  • cpu
  • cortex-m3
  • drv
ser_sam3.h
Go to the documentation of this file.
00001
00039 #ifndef SER_SAM3_H
00040 #define SER_SAM3_H
00041
00042 #include <cfg/macros.h> /* BV() */
00043 #include <cfg/compiler.h>  /* uint32_t */
00044 #include <cpu/detect.h>  /* CPU_* */
00045
00047 /*\{*/
00048 typedef uint32_t serstatus_t;
00049
00050 /* Software errors */
00051 #define SERRF_RXFIFOOVERRUN  BV(0)
00052 #define SERRF_RXTIMEOUT      BV(1)
00053 #define SERRF_TXTIMEOUT      BV(2)
00055 /*
00056  * Hardware errors.
00057  * These flags map directly to the ARM USART Channel Status Register (US_CSR).
00058  */
00059 #define SERRF_RXSROVERRUN    BV(5)
00060 #define SERRF_FRAMEERROR     BV(6)
00061 #define SERRF_PARITYERROR    BV(7)
00062 #define SERRF_NOISEERROR     0
00063 /*\}*/
00064
00070 enum
00071 {
00072     SER_UART0,
00073 #if !CPU_CM3_SAM3U
00074     SER_UART1,
00075 #endif
00076     SER_SPI0,
00077     SER_CNT
00078 };
00079 /*\}*/
00080
00081 #endif /* SER_SAM3_H */


BeRTOS: ser_simple_avr.c File Reference

  • cpu
  • avr
  • drv
ser_simple_avr.c File Reference

Simple serial I/O driver. More...

Go to the source code of this file.

Detailed Description

Simple serial I/O driver.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file ser_simple_avr.c.


BeRTOS: ser_simple_avr.c Source File

  • cpu
  • avr
  • drv
ser_simple_avr.c
Go to the documentation of this file.
00001
00039 #warning FIXME:This module is obsolete, yuo must refactor it.
00040
00041 #if 0
00042 #include "ser_simple_avr.h"
00043
00044 #include <cfg/compiler.h>
00045 #include <appconfig.h>
00046 #include <cfg/macros.h> /* BV() */
00047 #include <hw/hw_cpufreq.h>
00048
00049 #include <avr/io.h>
00050
00056 int _ser_putchar(int c)
00057 {
00058     /* Disable Rx to avoid echo*/
00059     UCSR0B &= ~BV(RXEN);
00060     /* Enable tx*/
00061     UCSR0B |= BV(TXEN);
00062     /* Prepare transmission */
00063     UDR0 = c;
00064     /* Wait until byte sent */
00065     while (!(UCSR0A & BV(TXC))) {}
00066     /* Disable tx to avoid short circuit when tx and rx share the same wire. */
00067     UCSR0B &= ~BV(TXEN);
00068     /* Enable Rx */
00069     UCSR0B |= BV(RXEN);
00070     /* Delete TRANSMIT_COMPLETE_BIT flag */
00071     UCSR0A |= BV(TXC);
00072     return c;
00073 }
00074
00075
00083 int _ser_getchar(void)
00084 {
00085     /* Wait for data */
00086     while (!(UCSR0A & BV(RXC))) {}
00087     return UDR0;
00088
00089 }
00090
00091
00097 int _ser_getchar_nowait(void)
00098 {
00099     if (!(UCSR0A & BV(RXC))) return EOF;
00100     else return UDR0;
00101 }
00102
00103 void _ser_settimeouts(void)
00104 {
00105 }
00106
00110 void _ser_setbaudrate(unsigned long rate)
00111 {
00112     /* Compute baud-rate period */
00113     uint16_t period = DIV_ROUND(CPU_FREQ / 16UL, rate) - 1;
00114
00115     UBRR0H = (period) >> 8;
00116     UBRR0L = (period);
00117 }
00118
00122 int _ser_print(const char *s)
00123 {
00124     while(*s) _ser_putchar(*s++);
00125     return 0;
00126 }
00127
00128
00129 void _ser_setparity(int parity)
00130 {
00131     /* Set the new parity */
00132     UCSR0C |= (UCSR0C & ~(BV(UPM1) | BV(UPM0))) | (parity << UPM0);
00133 }
00134
00138 void _ser_purge(void)
00139 {
00140     while (_ser_getchar_nowait() != EOF) {}
00141 }
00142
00146 struct Serial * _ser_open(void)
00147 {
00148     /*
00149      * Set Rx and Tx pins as input to avoid short
00150      * circuit when serial is disabled.
00151      */
00152     DDRE  &= ~(BV(PE0)|BV(PE1));
00153     PORTE &= ~BV(PE0);
00154     PORTE |=  BV(PE1);
00155     /* Enable only Rx section */
00156     UCSR0B = BV(RXEN);
00157     return NULL;
00158 }
00159
00160
00164 void _ser_close(void)
00165 {
00166     /* Disable Rx & Tx. */
00167     UCSR0B &= ~(BV(RXEN) | BV(TXEN));
00168 }
00169
00170 #endif
00171


BeRTOS: ser_simple_avr.h File Reference

  • cpu
  • avr
  • drv
ser_simple_avr.h File Reference

Simple serial I/O driver. More...

Go to the source code of this file.

Detailed Description

Simple serial I/O driver.

Author:
Bernie Innocenti <bernie@codewiz.org>
Francesco Sacchi <batt@develer.com>

Definition in file ser_simple_avr.h.


BeRTOS: ser_simple_avr.h Source File

  • cpu
  • avr
  • drv
ser_simple_avr.h
Go to the documentation of this file.
00001
00039 #ifndef DRV_SER_SIMPLE_AVR_H
00040 #define DRV_SER_SIMPLE_AVR_H
00041
00042 #warning FIXME:This module is obsolete, yuo must refactor it.
00043
00044 #if 0
00045 /* For checking which serial driver is linked */
00046 #define SER_SIMPLE
00047
00048 #include <appconfig.h>
00049 #include <cfg/compiler.h>
00050
00051
00052 #if 0
00053 #if CPU_AVR
00054     typedef uint8_t serstatus_t;
00055
00056     /* Software errors */
00057     #define SERRF_RXFIFOOVERRUN  BV(0)
00058     #define SERRF_RXTIMEOUT      BV(5)
00059     #define SERRF_TXTIMEOUT      BV(6)
00061     /* Hardware errors */
00062     #define SERRF_RXSROVERRUN    BV(3)
00063     #define SERRF_FRAMEERROR     BV(4)
00064     #define SERRF_PARITYERROR    BV(7)
00065 #else
00066     #error unknown architecture
00067 #endif
00068 /*\}*/
00069
00075 enum
00076 {
00077 #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128
00078     SER_UART0,
00079     SER_UART1,
00080     SER_SPI,
00081 #elif CPU_AVR_ATMEGA103 || CPU_AVR_ATMEGA8
00082     SER_UART0,
00083     SER_SPI,
00084 #else
00085     #error unknown architecture
00086 #endif
00087     SER_CNT
00088 };
00089 /*\}*/
00090 #endif
00091
00093 /*\{*/
00094 #define SER_PARITY_NONE  0
00095 #define SER_PARITY_EVEN  2
00096 #define SER_PARITY_ODD   3
00097 /*\}*/
00098
00099
00101 struct Serial;
00102
00103 /* Function prototypes */
00104 extern int _ser_putchar(int c);
00105 extern int _ser_getchar(void);
00106 extern int _ser_getchar_nowait(void);
00107 /*
00108 extern int ser_write(struct Serial *port, const void *buf, size_t len);
00109 extern int ser_read(struct Serial *port, void *buf, size_t size);
00110
00111 extern int ser_printf(struct Serial *port, const char *format, ...) FORMAT(__printf__, 2, 3);
00112
00113 extern int ser_gets(struct Serial *port, char *buf, int size);
00114 extern int ser_gets_echo(struct Serial *port, char *buf, int size, bool echo);
00115 */
00116 extern int _ser_print(const char *s);
00117
00118 extern void _ser_setbaudrate(unsigned long rate);
00119 extern void _ser_setparity(int parity);
00120 extern void _ser_settimeouts(void);
00121 extern void _ser_setstatus(void);
00122 /*
00123 extern void ser_resync(struct Serial *port, time_t delay);
00124 extern void ser_drain(struct Serial *port);
00125 */
00126 extern void _ser_purge(void);
00127 extern struct Serial *_ser_open(void);
00128 extern void _ser_close(void);
00129
00135 #define ser_putchar(c, port)        _ser_putchar(c)
00136 #define ser_getchar(port)           _ser_getchar()
00137 #define ser_getchar_nowait(port)    _ser_getchar_nowait()
00138 #define ser_print(port, s)          _ser_print(s)
00139 #define ser_setbaudrate(port, y)    _ser_setbaudrate(y)
00140 #define ser_setparity(port, par)    _ser_setparity(par)
00141 #define ser_settimeouts(port, y, z) _ser_settimeouts()
00142 #define ser_purge(port)             _ser_purge()
00143 #define ser_open(port)              _ser_open()
00144 #define ser_getstatus(h)            0
00145 #define ser_setstatus(h, x)         do {(void)(x);} while(0)
00146 /* \} */
00147
00148 #endif /* DRV_SER_SIMPLE_AVR_H */
00149
00150 #endif


BeRTOS: ser_stm32.c File Reference

  • cpu
  • cortex-m3
  • drv
ser_stm32.c File Reference

STM32 UART interface driver. More...

#include "ser_stm32.h"
#include "cfg/cfg_ser.h"
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <drv/gpio_stm32.h>
#include <drv/irq_cm3.h>
#include <drv/clock_stm32.h>
#include <drv/ser_p.h>
#include <drv/ser.h>

Go to the source code of this file.

Detailed Description

STM32 UART interface driver.

Author:
Daniele Basile <asterix@develer.com>

Definition in file ser_stm32.c.


BeRTOS: ser_stm32.c Source File

  • cpu
  • cortex-m3
  • drv
ser_stm32.c
Go to the documentation of this file.
00001
00038 #include "ser_stm32.h"
00039
00040 #include "cfg/cfg_ser.h"
00041
00042 #include <cfg/macros.h> /* for BV() */
00043 #include <cfg/debug.h>
00044
00045 #include <drv/gpio_stm32.h>
00046 #include <drv/irq_cm3.h>
00047 #include <drv/clock_stm32.h>
00048 #include <drv/ser_p.h>
00049 #include <drv/ser.h>
00050
00051
00052 /* From the high-level serial driver */
00053 extern struct Serial *ser_handles[SER_CNT];
00054
00055 struct CM3Serial
00056 {
00057     struct SerialHardware hw;
00058     volatile bool sending;
00059     uint32_t base;
00060     sysirq_t irq;
00061 };
00062
00063 /* Forward declaration */
00064 static struct CM3Serial UARTDesc[SER_CNT];
00065
00066 /* GPIO descriptor for UART pins */
00067 struct gpio_uart_info
00068 {
00069     /* GPIO base address register */
00070     uint32_t base;
00071     /* Pin(s) bitmask */
00072     uint32_t rx_pin;
00073     uint32_t tx_pin;
00074     /* Sysctl */
00075     uint32_t sysctl_gpio;
00076     uint32_t sysctl_usart;
00077
00078 };
00079
00080 /* Table to retrieve GPIO pins configuration to work as UART pins */
00081 static const struct gpio_uart_info gpio_uart[SER_CNT] =
00082 {
00083     /* UART1 */
00084     {
00085         .base = GPIOA_BASE,
00086         .rx_pin = GPIO_USART1_RX_PIN,
00087         .tx_pin = GPIO_USART1_TX_PIN,
00088         .sysctl_gpio = RCC_APB2_GPIOA,
00089         .sysctl_usart = RCC_APB2_USART1,
00090     },
00091     /* UART2 */
00092     {
00093         .base = GPIOA_BASE,
00094         .rx_pin = GPIO_USART2_RX_PIN,
00095         .tx_pin = GPIO_USART2_TX_PIN,
00096         .sysctl_gpio = RCC_APB2_GPIOA,
00097         .sysctl_usart = RCC_APB1_USART2,
00098     },
00099 #if CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE
00100     /* UART3 */
00101     {
00102         .base = GPIOB_BASE,
00103         .rx_pin = GPIO_USART3_RX_PIN,
00104         .tx_pin = GPIO_USART3_TX_PIN,
00105         .sysctl_gpio = RCC_APB2_GPIOB,
00106         .sysctl_usart = RCC_APB1_USART3,
00107     },
00108 #endif
00109 };
00110
00111 #define USART1_PORT                0
00112 #define USART2_PORT                1
00113 #define USART3_PORT                2
00114
00115 void stm32_uartSetBaudRate(uint32_t base, unsigned long baud)
00116 {
00117     struct stm32_usart *_base = (struct stm32_usart *)base;
00118     _base->BRR = evaluate_brr(_base, CPU_FREQ, baud);
00119 }
00120
00121 void stm32_uartSetParity(uint32_t base, int parity)
00122 {
00123     struct stm32_usart *_base = (struct stm32_usart *)base;
00124
00125     /*  USART_WORD_LEN_8B */
00126     _base->CR1 &= ~BV(CR1_M);
00127
00128     switch(parity)
00129     {
00130     case SER_PARITY_NONE:
00131         _base->CR1 &= ~BV(CR1_PCE);
00132         break;
00133     case SER_PARITY_ODD:
00134         _base->CR1 |= (BV(CR1_PCE) | BV(CR1_PS));
00135         break;
00136     case SER_PARITY_EVEN:
00137         _base->CR1 |= BV(CR1_PCE);
00138         _base->CR1 &= ~BV(CR1_PS);
00139         break;
00140     default:
00141         ASSERT(0);
00142         return;
00143     }
00144 }
00145
00146 void stm32_uartInit(int port)
00147 {
00148     struct stm32_usart *base = (struct stm32_usart *)UARTDesc[port].base;
00149
00150     ASSERT(port >= 0 && port < SER_CNT);
00151
00152     /* Enable clocking on AFIO */
00153     RCC->APB2ENR |= RCC_APB2_AFIO;
00154     RCC->APB2ENR |= gpio_uart[port].sysctl_gpio;
00155
00156     /* Configure USART pins */
00157     if (port == USART1_PORT)
00158     {
00159         RCC->APB2ENR |=  gpio_uart[port].sysctl_usart;
00160     }
00161     else
00162     {
00163         RCC->APB1ENR |=  gpio_uart[port].sysctl_usart;
00164     }
00165
00166     stm32_gpioPinConfig((struct stm32_gpio *)gpio_uart[port].base,  gpio_uart[port].tx_pin,
00167                 GPIO_MODE_AF_PP, GPIO_SPEED_50MHZ);
00168
00169     stm32_gpioPinConfig((struct stm32_gpio *)gpio_uart[port].base,  gpio_uart[port].rx_pin,
00170                 GPIO_MODE_IN_FLOATING, GPIO_SPEED_50MHZ);
00171
00172     /* Clear control registry */
00173     base->CR2 = 0;
00174     base->CR1 = 0;
00175     base->CR3 = 0;
00176     base->SR = 0;
00177
00178     /* Set serial param: 115.200 bps, no parity */
00179     stm32_uartSetBaudRate(UARTDesc[port].base, 115200);
00180     stm32_uartSetParity(UARTDesc[port].base, SER_PARITY_NONE);
00181
00182
00183     /* Enable trasmision and receiver */
00184     base->CR1 |= (BV(CR1_TE) | BV(CR1_RE));
00185
00186 }
00187
00188 static bool tx_sending(struct SerialHardware *_hw)
00189 {
00190     struct CM3Serial *hw = (struct CM3Serial *)_hw;
00191     return hw->sending;
00192 }
00193
00194 static void uart_irq_rx(int port)
00195 {
00196     struct FIFOBuffer *rxfifo = &ser_handles[port]->rxfifo;
00197     struct stm32_usart *base = (struct stm32_usart *)UARTDesc[port].base;
00198     char c;
00199
00200     while (stm32_uartRxReady(UARTDesc[port].base))
00201     {
00202         c = base->DR;
00203         if (fifo_isfull(rxfifo))
00204             ser_handles[port]->status |= SERRF_RXFIFOOVERRUN;
00205         else
00206             fifo_push(rxfifo, c);
00207     }
00208 }
00209
00210 static void uart_irq_tx(int port)
00211 {
00212     struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo;
00213     struct stm32_usart *base = (struct stm32_usart *)UARTDesc[port].base;
00214
00215     if (fifo_isempty(txfifo))
00216     {
00217         /*
00218          * Disable TX empty interrupts if there're no more
00219          * characters to transmit.
00220          */
00221         base->CR1 &= ~BV(CR1_TXEIE);
00222         UARTDesc[port].sending = false;
00223     }
00224     else
00225     {
00226         base->DR = fifo_pop(txfifo);
00227     }
00228 }
00229
00230 static void uart_common_irq_handler(int port)
00231 {
00232     struct stm32_usart *base = (struct stm32_usart *)UARTDesc[port].base;
00233     uint32_t status;
00234
00235     /* Read and clear the IRQ status */
00236     status = base->SR;
00237
00238     /* Check hw errors */
00239     ser_handles[port]->status = status &
00240         (BV(SR_ORE) | BV(SR_FE) | BV(SR_PE) | BV(SR_NE));
00241
00242     /* Process the IRQ */
00243     if (status & BV(CR1_RXNEIE))
00244     {
00245         uart_irq_rx(port);
00246     }
00247     if (status & (BV(CR1_TXEIE) | BV(CR1_TCIE)))
00248     {
00249         uart_irq_tx(port);
00250     }
00251 }
00252
00253 static void stm32_uartIRQEnable(int port, sysirq_handler_t handler)
00254 {
00255     struct stm32_usart *base = (struct stm32_usart *)UARTDesc[port].base;
00256
00257     /* Register the IRQ handler */
00258     sysirq_setHandler(UARTDesc[port].irq, handler);
00259
00260     base->CR1 |= BV(CR1_RXNEIE);
00261 }
00262
00263 static void stm32_uartIRQDisable(int port)
00264 {
00265     struct stm32_usart *base = (struct stm32_usart *)UARTDesc[port].base;
00266
00267     base->CR1 &= ~(BV(CR1_RXNEIE) | USART_FLAG_TXE);
00268 }
00269
00270
00271 /* UART class definition */
00272 #define UART_PORT(port)          \
00273     /* UART TX and RX buffers */ \
00274     static unsigned char uart ## port ## _txbuffer[CONFIG_UART ## port ## _TXBUFSIZE]; \
00275     static unsigned char uart ## port ## _rxbuffer[CONFIG_UART ## port ## _RXBUFSIZE];  \
00276                                         \
00277     /* UART interrupt handler */                        \
00278     static DECLARE_ISR(uart ## port ## _irq_handler)    \
00279     {                                   \
00280         uart_common_irq_handler(USART ## port ## _PORT);    \
00281     }                                   \
00282                                         \
00283     /* UART public methods */ \
00284     static void uart ## port ## _txStart(struct SerialHardware *_hw) \
00285     {                                                                \
00286         struct FIFOBuffer *txfifo = &ser_handles[USART ## port ## _PORT]->txfifo;        \
00287         struct CM3Serial *hw = (struct CM3Serial *)_hw;              \
00288         struct stm32_usart *base = (struct stm32_usart *)USART## port ## _BASE; \
00289         if (hw->sending)                        \
00290             return;                         \
00291         stm32_uartPutChar(USART ## port ## _BASE, fifo_pop(txfifo));    \
00292         if (!fifo_isempty(txfifo))                  \
00293         {                               \
00294             hw->sending = true;  \
00295             base->CR1 |= BV(CR1_TXEIE); \
00296         } \
00297     }                                   \
00298                                         \
00299     static void uart ## port ## _setbaudrate(UNUSED_ARG(struct SerialHardware *, hw), \
00300                         unsigned long baud)     \
00301     {                                   \
00302         stm32_uartSetBaudRate(USART## port ## _BASE, baud);     \
00303     }                                   \
00304                                         \
00305     static void uart ## port ## _setparity(UNUSED_ARG(struct SerialHardware *, hw), \
00306                         int parity)         \
00307     {                                   \
00308         stm32_uartSetParity(USART## port ## _BASE, parity);     \
00309     }                                   \
00310                                         \
00311     static void uart ## port ## _cleanup(struct SerialHardware *_hw)            \
00312     {                                   \
00313         struct CM3Serial *hw = (struct CM3Serial *)_hw;         \
00314         hw->sending = false; \
00315         stm32_uartIRQDisable(USART ## port ## _PORT);                   \
00316         stm32_uartClear(USART## port ## _BASE);             \
00317         stm32_uartDisable(USART## port ## _BASE);           \
00318     }                                   \
00319                                         \
00320     static void uart ## port ## _init(UNUSED_ARG(struct SerialHardware *, hw),      \
00321                 UNUSED_ARG(struct Serial *, ser))       \
00322     {                                   \
00323         stm32_uartInit(USART ## port ## _PORT);                     \
00324         stm32_uartEnable(USART## port ## _BASE);                \
00325         stm32_uartIRQEnable(USART ## port ## _PORT, uart ## port ## _irq_handler);      \
00326     }                                   \
00327                                         \
00328     /* UART operations */                           \
00329     static const struct SerialHardwareVT USART ## port ## _VT =     \
00330     {                                   \
00331         .init = uart ## port ## _init,                  \
00332         .cleanup = uart ## port ## _cleanup,                \
00333         .setBaudrate = uart ## port ## _setbaudrate,            \
00334         .setParity = uart ## port ## _setparity,            \
00335         .txStart = uart ## port ## _txStart,                \
00336         .txSending = tx_sending,                    \
00337     };
00338
00339 /* UART port instances */
00340 UART_PORT(1)
00341 UART_PORT(2)
00342 #if CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE
00343 UART_PORT(3)
00344 #endif
00345
00346 static struct CM3Serial UARTDesc[SER_CNT] =
00347 {
00348     {
00349         .hw = {
00350             .table = &USART1_VT,
00351             .txbuffer = uart1_txbuffer,
00352             .rxbuffer = uart1_rxbuffer,
00353             .txbuffer_size = sizeof(uart1_txbuffer),
00354             .rxbuffer_size = sizeof(uart1_rxbuffer),
00355         },
00356         .sending = false,
00357         .base = USART1_BASE,
00358         .irq = USART1_IRQHANDLER,
00359     },
00360     {
00361         .hw = {
00362             .table = &USART2_VT,
00363             .txbuffer = uart2_txbuffer,
00364             .rxbuffer = uart2_rxbuffer,
00365             .txbuffer_size = sizeof(uart2_txbuffer),
00366             .rxbuffer_size = sizeof(uart2_rxbuffer),
00367         },
00368         .sending = false,
00369         .base = USART2_BASE,
00370         .irq = USART2_IRQHANDLER,
00371     },
00372 #if CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE
00373     {
00374         .hw = {
00375             .table = &USART3_VT,
00376             .txbuffer = uart3_txbuffer,
00377             .rxbuffer = uart3_rxbuffer,
00378             .txbuffer_size = sizeof(uart3_txbuffer),
00379             .rxbuffer_size = sizeof(uart3_rxbuffer),
00380         },
00381         .sending = false,
00382         .base = USART3_BASE,
00383         .irq = USART3_IRQHANDLER,
00384     },
00385 #endif
00386 };
00387
00388 struct SerialHardware *ser_hw_getdesc(int port)
00389 {
00390     ASSERT(port >= 0 && port < SER_CNT);
00391     return &UARTDesc[port].hw;
00392 }


BeRTOS: ser_stm32.h File Reference

  • cpu
  • cortex-m3
  • drv
ser_stm32.h File Reference

STM32F10xx UART interface driver. More...

#include <cfg/debug.h>
#include <cpu/power.h>
#include <io/stm32.h>

Go to the source code of this file.

Detailed Description

STM32F10xx UART interface driver.

Author:
Daniele Basile <asterix@develer.com>

Definition in file ser_stm32.h.


BeRTOS: ser_stm32.h Source File

  • cpu
  • cortex-m3
  • drv
ser_stm32.h
Go to the documentation of this file.
00001
00038 #ifndef SER_STM32_H
00039 #define SER_STM32_H
00040
00041 #include <cfg/debug.h>
00042
00043 #include <cpu/power.h> /* cpu_relax() */
00044
00045 #include <io/stm32.h>
00046
00047 /* Serial hardware numbers */
00048 enum
00049 {
00050     SER_UART1 = 0,
00051     SER_UART2,
00052 #if CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE
00053     SER_UART3,
00054 #endif
00055     SER_CNT //< Number of serial ports
00056 };
00057
00058 /* Software errors */
00059 #define SERRF_RXFIFOOVERRUN  BV(6) //< Rx FIFO buffer overrun
00060 #define SERRF_RXTIMEOUT      BV(5) //< Receive timeout
00061 #define SERRF_TXTIMEOUT      BV(4) //< Transmit timeout
00062
00063 /*
00064  * Hardware errors.
00065  */
00066 #define SERRF_RXSROVERRUN    SR_ORE  //< Input overrun
00067 #define SERRF_FRAMEERROR     SR_FE   //< Stop bit missing
00068 #define SERRF_PARITYERROR    SR_PE   //< Parity error
00069 #define SERRF_NOISEERROR     SR_NE   //< Noise error
00070
00071 /* Serial error/status flags */
00072 typedef uint32_t serstatus_t;
00073
00074 INLINE void stm32_uartDisable(uint32_t base)
00075 {
00076     struct stm32_usart *_base = (struct stm32_usart *)base;
00077     _base->CR1 &= ~CR1_RUN_RESET;
00078 }
00079
00080 INLINE void stm32_uartEnable(uint32_t base)
00081 {
00082     struct stm32_usart *_base = (struct stm32_usart *)base;
00083     _base->CR1 |= CR1_RUN_SET;
00084 }
00085
00086 /* Clear the flags register */
00087 INLINE void stm32_uartClear(uint32_t base)
00088 {
00089     struct stm32_usart *_base = (struct stm32_usart *)base;
00090     _base->SR &= ~USART_FLAG_MASK;
00091 }
00092
00093 INLINE bool stm32_uartTxDone(uint32_t base)
00094 {
00095     struct stm32_usart *_base = (struct stm32_usart *)base;
00096     return (_base->SR & USART_FLAG_TC);
00097 }
00098
00099 INLINE bool stm32_uartTxReady(uint32_t base)
00100 {
00101     struct stm32_usart *_base = (struct stm32_usart *)base;
00102     return (_base->SR & (BV(CR1_TXEIE) | BV(CR1_TCIE)));
00103 }
00104
00105 INLINE bool stm32_uartRxReady(uint32_t base)
00106 {
00107     struct stm32_usart *_base = (struct stm32_usart *)base;
00108     return (_base->SR & BV(CR1_RXNEIE));
00109 }
00110
00111 INLINE int stm32_uartPutChar(uint32_t base, unsigned char c)
00112 {
00113     struct stm32_usart *_base = (struct stm32_usart *)base;
00114     while (!stm32_uartTxReady(base))
00115         cpu_relax();
00116     _base->DR = c;
00117     return c;
00118 }
00119
00120 INLINE int stm32_uartGetChar(uint32_t base)
00121 {
00122     struct stm32_usart * _base = (struct stm32_usart *)base;
00123     return _base->DR;
00124 }
00125
00126 void stm32_uartSetBaudRate(uint32_t base, unsigned long baud);
00127 void stm32_uartSetParity(uint32_t base, int parity);
00128 void stm32_uartInit(int port);
00129
00130 #endif /* SER_STM32_H */


BeRTOS: ser_xmega.c File Reference

  • cpu
  • avr
  • drv
ser_xmega.c File Reference

AVR XMEGA USART driver (Implementation) More...

#include "hw/hw_ser.h"
#include <hw/hw_cpufreq.h>
#include "cfg/cfg_ser.h"
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <drv/ser.h>
#include <drv/ser_p.h>
#include <drv/timer.h>
#include <struct/fifobuf.h>
#include <avr/io.h>
#include <avr/interrupt.h>

Go to the source code of this file.

Defines

Hardware handshake (RTS/CTS).
#define | RTS_ON do {} while (0)
Dummy value, must be overridden.
#define | RTS_OFF do {} while (0)
Dummy value, must be overridden.
#define | IS_CTS_ON true
Dummy value, must be overridden.
#define | EIMSKF_CTS 0
Dummy value, must be overridden.

Detailed Description

AVR XMEGA USART driver (Implementation)

This file is heavily inspired by the AVR implementation for BeRTOS, but uses a different approach for implementing the different debug ports, by using the USART_t structs.

Author:
Onno <developer@gorgoz.org>

Definition in file ser_xmega.c.


BeRTOS: ser_xmega.c Source File

  • cpu
  • avr
  • drv
ser_xmega.c
Go to the documentation of this file.
00001
00043 #include "hw/hw_ser.h"     /* Required for bus macros overrides */
00044 #include <hw/hw_cpufreq.h> /* CPU_FREQ */
00045
00046 #include "cfg/cfg_ser.h"   /* Serialport configuration settings */
00047
00048 #include <cfg/macros.h>    /* DIV_ROUND */
00049 #include <cfg/debug.h>     /* debug configuration */
00050
00051 #include <drv/ser.h>
00052 #include <drv/ser_p.h>
00053 #include <drv/timer.h>
00054
00055 #include <struct/fifobuf.h>
00056
00057 #include <avr/io.h>        /* AVR IO ports and structures */
00058 #include <avr/interrupt.h> /* AVR Interrupt methods */
00059
00060 /*
00061  * Scalefactor to use for computing the baudrate
00062  * this scalefactor should be an integer value between -7
00063  * and 7
00064  */
00065 #ifndef USART_SCALE_FACTOR
00066     #define USART_SCALE_FACTOR (-7)
00067 #else
00068     #if USART_SCALE_FACTOR > 7 || USART_SCALE_FACTOR < -7
00069         #error USART_SCALE_FACTOR should be an integer between -7 and 7
00070     #endif
00071 #endif
00072
00073 /* Helper macros, mostly taken from the Atmel Examples
00074  * Slightly alterd to match the BeRTOS naming convention
00075  */
00076
00077 /* \brief Set USART baud rate.
00078  *
00079  *  Sets the USART's baud rate register.
00080  *
00081  *  UBRR_Value   : Value written to UBRR
00082  *  ScaleFactor  : Time Base Generator Scale Factor
00083  *
00084  *  Equation for calculation of BSEL value in asynchronous normal speed mode:
00085  *      If ScaleFactor >= 0
00086  *          BSEL = ((I/O clock frequency)/(2^(ScaleFactor)*16*Baudrate))-1
00087  *      If ScaleFactor < 0
00088  *          BSEL = (1/(2^(ScaleFactor)*16))*(((I/O clock frequency)/Baudrate)-1)
00089  *
00090  *  \note See XMEGA manual for equations for calculation of BSEL value in other
00091  *        modes.
00092  *
00093  *  \param _usart          Pointer to the USART module.
00094  *  \param _bselValue      Value to write to BSEL part of Baud control register.
00095  *                         Use uint16_t type.
00096  *  \param _bScaleFactor   USART baud rate scale factor.
00097  *                         Use uint8_t type
00098  */
00099 #define USART_SET_BAUDRATE(_usart, _bselValue, _bScaleFactor)                  \
00100     (_usart)->BAUDCTRLA =(uint8_t)_bselValue;                                           \
00101     (_usart)->BAUDCTRLB =(_bScaleFactor << USART_BSCALE0_bp)|(_bselValue >> 8)
00102
00103 /* \brief Enable USART receiver.
00104  *
00105  *  \param _usart    Pointer to the USART module
00106  */
00107 #define USART_RX_ENABLE(_usart) ((_usart)->CTRLB |= USART_RXEN_bm)
00108
00109 /* \brief Disable USART receiver.
00110  *
00111  *  \param _usart Pointer to the USART module.
00112  */
00113 #define USART_RX_DISABLE(_usart) ((_usart)->CTRLB &= ~USART_RXEN_bm)
00114
00115 /* \brief Enable USART transmitter.
00116  *
00117  *  \param _usart Pointer to the USART module.
00118  */
00119 #define USART_TX_ENABLE(_usart) ((_usart)->CTRLB |= USART_TXEN_bm)
00120
00121 /* \brief Disable USART transmitter.
00122  *
00123  *  \param _usart Pointer to the USART module.
00124  */
00125 #define USART_TX_DISABLE(_usart) ((_usart)->CTRLB &= ~USART_TXEN_bm)
00126
00127 /* \brief Set USART RXD interrupt level.
00128  *
00129  *  Sets the interrupt level on RX Complete interrupt.
00130  *
00131  *  \param _usart        Pointer to the USART module.
00132  *  \param _rxdIntLevel  Interrupt level of the RXD interrupt.
00133  *                       Use USART_RXCINTLVL_t type.
00134  */
00135 #define USART_SET_RX_INTERRUPT_LEVEL(_usart, _rxdIntLevel)                      \
00136     ((_usart)->CTRLA = ((_usart)->CTRLA & ~USART_RXCINTLVL_gm) | _rxdIntLevel)
00137
00138 /* \brief Set USART TXD interrupt level.
00139  *
00140  *  Sets the interrupt level on TX Complete interrupt.
00141  *
00142  *  \param _usart        Pointer to the USART module.
00143  *  \param _txdIntLevel  Interrupt level of the TXD interrupt.
00144  *                       Use USART_TXCINTLVL_t type.
00145  */
00146 #define USART_SET_TX_INTERRUPT_LEVEL(_usart, _txdIntLevel)                      \
00147     (_usart)->CTRLA = ((_usart)->CTRLA & ~USART_TXCINTLVL_gm) | _txdIntLevel
00148
00149 /* \brief Set USART DRE interrupt level.
00150  *
00151  *  Sets the interrupt level on Data Register interrupt.
00152  *
00153  *  \param _usart        Pointer to the USART module.
00154  *  \param _dreIntLevel  Interrupt level of the DRE interrupt.
00155  *                       Use USART_DREINTLVL_t type.
00156  */
00157 #define USART_SET_DRE_INTERRUPT_LEVEL(_usart, _dreIntLevel)                      \
00158     (_usart)->CTRLA = ((_usart)->CTRLA & ~USART_DREINTLVL_gm) | _dreIntLevel
00159
00160 /* \brief Set the mode the USART run in.
00161  *
00162  * Set the mode the USART run in. The default mode is asynchronous mode.
00163  *
00164  *  \param  _usart       Pointer to the USART module register section.
00165  *  \param  _usartMode   Selects the USART mode. Use  USART_CMODE_t type.
00166  *
00167  *  USART modes:
00168  *  - 0x0        : Asynchronous mode.
00169  *  - 0x1        : Synchronous mode.
00170  *  - 0x2        : IrDA mode.
00171  *  - 0x3        : Master SPI mode.
00172  */
00173 #define USART_SET_MODE(_usart, _usartMode)                                      \
00174     ((_usart)->CTRLC = ((_usart)->CTRLC & (~USART_CMODE_gm)) | _usartMode)
00175
00176 /* \brief Check if data register empty flag is set.
00177  *
00178  *  \param _usart      The USART module.
00179  */
00180 #define USART_IS_TX_DATA_REGISTER_EMPTY(_usart) (((_usart)->STATUS & USART_DREIF_bm) != 0)
00181
00182 /* \brief Put data (5-8 bit character).
00183  *
00184  *  Use the macro USART_IsTXDataRegisterEmpty before using this function to
00185  *  put data to the TX register.
00186  *
00187  *  \param _usart      The USART module.
00188  *  \param _data       The data to send.
00189  */
00190 #define USART_PUT_CHAR(_usart, _data) ((_usart)->DATA = _data)
00191
00192 /* \brief Checks if the RX complete interrupt flag is set.
00193  *
00194  *   Checks if the RX complete interrupt flag is set.
00195  *
00196  *  \param _usart     The USART module.
00197  */
00198 #define USART_IS_RX_COMPLETE(_usart) (((_usart)->STATUS & USART_RXCIF_bm) != 0)
00199
00200 /* \brief Get received data (5-8 bit character).
00201  *
00202  *  This macro reads out the RX register.
00203  *  Use the macro USART_RX_Complete to check if anything is received.
00204  *
00205  *  \param _usart     The USART module.
00206  *
00207  *  \retval           Received data.
00208  */
00209 #define USART_GET_CHAR(_usart)  ((_usart)->DATA)
00210
00211 /* configurable macros */
00212
00213 #if !CONFIG_SER_HWHANDSHAKE
00214
00218     #define RTS_ON      do {} while (0)
00219     #define RTS_OFF     do {} while (0)
00220     #define IS_CTS_ON   true
00221     #define EIMSKF_CTS  0
00222     /*\}*/
00223 #endif
00224
00225 /*
00226  * \name Overridable serial bus hooks
00227  *
00228  * These can be redefined in hw.h to implement
00229  * special bus policies such as half-duplex, 485, etc.
00230  *
00231  *
00232  * \code
00233  *  TXBEGIN      TXCHAR      TXEND  TXOFF
00234  *    |   __________|__________ |     |
00235  *    |   |   |   |   |   |   | |     |
00236  *    v   v   v   v   v   v   v v     v
00237  * ______  __  __  __  __  __  __  ________________
00238  *       \/  \/  \/  \/  \/  \/  \/
00239  * ______/\__/\__/\__/\__/\__/\__/
00240  *
00241  * \endcode
00242  *
00243  * \{
00244  */
00245
00246 #ifndef SER_UART_BUS_TXINIT
00247     /*
00248      * Default TXINIT macro - invoked in uart_init()
00249      *
00250      * - Enable both the receiver and the transmitter
00251      * - Enable only the RX complete interrupt
00252      */
00253     #define SER_UART_BUS_TXINIT(_usart) do { \
00254         USART_RX_ENABLE(_usart); \
00255         USART_TX_ENABLE(_usart); \
00256         USART_SET_RX_INTERRUPT_LEVEL(_usart, USART_RXCINTLVL_MED_gc); \
00257     } while (0)
00258 #endif
00259
00260 #ifndef SER_UART_BUS_TXBEGIN
00261     /*
00262      * Invoked before starting a transmission
00263      *
00264      * - Enable both the receiver and the transmitter
00265      * - Enable both the RX complete and UDR empty interrupts
00266      */
00267     #define SER_UART_BUS_TXBEGIN(_usart) do { \
00268         USART_SET_RX_INTERRUPT_LEVEL(_usart, USART_RXCINTLVL_MED_gc); \
00269         USART_SET_DRE_INTERRUPT_LEVEL(_usart, USART_DREINTLVL_MED_gc);\
00270     } while (0)
00271 #endif
00272
00273 #ifndef SER_UART_BUS_TXCHAR
00274     /*
00275      * Invoked to send one character.
00276      */
00277     #define SER_UART_BUS_TXCHAR(_usart, c) do { \
00278         USART_PUT_CHAR(_usart, c); \
00279     } while (0)
00280 #endif
00281
00282 #ifndef SER_UART_BUS_TXEND
00283     /*
00284      * Invoked as soon as the txfifo becomes empty
00285      *
00286      * - Keep both the receiver and the transmitter enabled
00287      * - Keep the RX complete interrupt enabled
00288      * - Disable the UDR empty interrupt
00289      */
00290     #define SER_UART_BUS_TXEND(_usart) do { \
00291         USART_SET_DRE_INTERRUPT_LEVEL(_usart, USART_DREINTLVL_OFF_gc); \
00292     } while (0)
00293 #endif
00294
00295 #ifndef SER_UART_BUS_TXOFF
00296     /*
00297      * \def SER_UART_BUS_TXOFF
00298      *
00299      * Invoked after the last character has been transmitted
00300      *
00301      * The default is no action.
00302      */
00303     #ifdef __doxygen__
00304     #define SER_UART_BUS_TXOFF(_usart)
00305     #endif
00306 #endif
00307
00308 /*\}*/
00309
00310 /* From the high-level serial driver */
00311 extern struct Serial *ser_handles[SER_CNT];
00312
00313 /* TX and RX buffers */
00314 static unsigned char uart0_txbuffer[CONFIG_UART0_TXBUFSIZE];
00315 static unsigned char uart0_rxbuffer[CONFIG_UART0_RXBUFSIZE];
00316 static unsigned char uart1_txbuffer[CONFIG_UART1_TXBUFSIZE];
00317 static unsigned char uart1_rxbuffer[CONFIG_UART1_RXBUFSIZE];
00318 #ifdef CPU_AVR_XMEGA_A
00319 static unsigned char uart2_txbuffer[CONFIG_UART2_TXBUFSIZE];
00320 static unsigned char uart2_rxbuffer[CONFIG_UART2_RXBUFSIZE];
00321 static unsigned char uart3_txbuffer[CONFIG_UART3_TXBUFSIZE];
00322 static unsigned char uart3_rxbuffer[CONFIG_UART3_RXBUFSIZE];
00323 static unsigned char uart4_txbuffer[CONFIG_UART4_TXBUFSIZE];
00324 static unsigned char uart4_rxbuffer[CONFIG_UART4_RXBUFSIZE];
00325 #endif
00326
00327 /*
00328  * Internal hardware state structure
00329  *
00330  * The \a sending variable is true while the transmission
00331  * interrupt is retriggering itself.
00332  *
00333  * the \a usart variable will point to the USART_t structure
00334  * that should be used.
00335  *
00336  * the \a port variable will point to the PORT_t structure
00337  * that should be modified to set the tx pin as an output and the
00338  * rx pin as an input
00339  *
00340  * the \a txpin variable will hold the pinnumber of the pin to use
00341  * as the tx output
00342  *
00343  * the \a rxpin variable will hold the pinnumber of the pin to use
00344  * as the rx input
00345  *
00346  * For the USARTs the \a sending flag is useful for taking specific
00347  * actions before sending a burst of data, at the start of a trasmission
00348  * but not before every char sent.
00349  *
00350  * For the SPI, this flag is necessary because the SPI sends and receives
00351  * bytes at the same time and the SPI IRQ is unique for send/receive.
00352  * The only way to start transmission is to write data in SPDR (this
00353  * is done by spi_starttx()). We do this *only* if a transfer is
00354  * not already started.
00355  */
00356 struct AvrxmegaSerial
00357 {
00358     struct SerialHardware hw;
00359     volatile bool sending;
00360     volatile USART_t* usart;
00361     volatile PORT_t* port;
00362     uint8_t txpin;
00363     uint8_t rxpin;
00364 };
00365
00366 /*
00367  * Callbacks
00368  * The same callbacks are used for all USARTS.
00369  * By casting the SerialHardware structure to the AvrxmegaSerial
00370  * structure a pointer to the USART_t structure can be obtained,
00371  * to perform the callback for the specific USART.
00372  * This methode might cost some more cpu time, but saves on
00373  * code duplication and code size.
00374  */
00375
00376
00377 /*
00378  * \brief Initializes the uart
00379  *
00380  * The TX pin of the uart will be set as an outputpin
00381  * The RX pin of the uart will be set as an inputpin
00382  * The usart will be initialized
00383  * \see SER_UART_BUS_TXINIT
00384  *
00385  * \param _hw struct AvrxmegaSerial
00386  * \param ser Unused
00387  */
00388 static void uart_init(struct SerialHardware * _hw, UNUSED_ARG(struct Serial *, ser))
00389 {
00390     struct AvrxmegaSerial *hw = (struct AvrxmegaSerial *)_hw;
00391     //set transmit pin as output
00392     hw->port->DIRSET = BV(hw->txpin);
00393     hw->port->OUTCLR = BV(hw->txpin);
00394     //set receive pin as input
00395     hw->port->DIRCLR = BV(hw->rxpin);
00396     //initialize the USART
00397     SER_UART_BUS_TXINIT(hw->usart);
00398     RTS_ON;
00399     SER_STROBE_INIT;
00400 }
00401
00402 /*
00403  * \brief Cleans up / Disables the uart
00404  *
00405  * \param _hw struct AvrxmegaSerial
00406  */
00407 static void uart_cleanup(struct SerialHardware * _hw)
00408 {
00409     struct AvrxmegaSerial *hw = (struct AvrxmegaSerial *)_hw;
00410     hw->usart->CTRLA = 0;
00411     hw->usart->CTRLB = 0;
00412 }
00413
00414 /*
00415  * \brief Enableds the TX interrupt
00416  *
00417  * \param _hw struct AvrxmegaSerial
00418  */
00419 static void uart_enabletxirq(struct SerialHardware *_hw)
00420 {
00421     struct AvrxmegaSerial *hw = (struct AvrxmegaSerial *)_hw;
00422
00423     /*
00424      * WARNING: racy code here!  The tx interrupt sets hw->sending to false
00425      * when it runs with an empty fifo.  The order of statements in the
00426      * if-block matters.
00427      */
00428     if (!hw->sending)
00429     {
00430         hw->sending = true;
00431         SER_UART_BUS_TXBEGIN(hw->usart);
00432     }
00433 }
00434
00435 /*
00436  * \brief  sets the uart to the provided baudrate
00437  *
00438  * For setting the baudrate an scale factor (bscale) and a period
00439  * setting (BSEL) is required.
00440  *
00441  * The scale factor should be privided by defining USART_SCALE_FACTOR
00442  *
00443  * Atmel specifies BSEL for normal speed mode and bscale >= 0 as:
00444  * BSEL = (cpu_freq / ((2^bscale) * 16 * rate)) - 1
00445  * To allow BSEL to be calculated with an power function this can be
00446  * rewriten to:
00447  * BSEL = BSEL = (cpu_freq / ((1 << bscale) * 16 * rate)) - 1
00448  *
00449  * Atmel specifies BSEL for normal speed mode and bscale < 0 as:
00450  * BSEL = (1 / (2^bscale)) * ( (cpu_freq / (16 * rate)) - 1)
00451  * To calculte this float atheritmic is required as the second product will be smaller
00452  * than zero in a lot of cases.
00453  * To allow BSEL to be calculated with interger devision and no power function
00454  * this can be rewriten by folowing simple math rules to:
00455  * BSEL = ((1 << -bscale) * (cpu_freq - (16 * rate)) / (16 * rate)
00456  *
00457  * \param _hw struct AvrxmegaSerial
00458  * \param _rate the required baudrate
00459  *
00460  */
00461 static void uart_setbaudrate(struct SerialHardware * _hw, unsigned long _rate)
00462 {
00463     struct AvrxmegaSerial *hw = (struct AvrxmegaSerial *)_hw;
00464     /* Compute baud-rate period, this requires a valid USART_SCALE_FACTOR */
00465     #if USART_SCALE_FACTOR < 0
00466         uint16_t bsel = DIV_ROUND((1 << (-(USART_SCALE_FACTOR))) * (CPU_FREQ - (16 * _rate)), 16 * _rate);
00467     #else
00468         uint16_t bsel = DIV_ROUND(CPU_FREQ, (1 << (USART_SCALE_FACTOR)) * 16 * _rate) - 1;
00469     #endif
00470     USART_SET_BAUDRATE(hw->usart, bsel, USART_SCALE_FACTOR);
00471 }
00472
00473 /*
00474  * \brief Sets the parity of the uart
00475  *
00476  * \param _hw struct AvrxmegaSerial
00477  * \param _parity the parity to set
00478  */
00479 static void uart_setparity(struct SerialHardware * _hw, int _parity)
00480 {
00481     struct AvrxmegaSerial *hw = (struct AvrxmegaSerial *)_hw;
00482     USART_SET_MODE(hw->usart, _parity);
00483 }
00484
00485 /*
00486  * \brief Returns true if Transmitter is sending
00487  *
00488  * \param _hw struct AvrxmegaSerial
00489  * \return true if transmitter is sending
00490  */
00491 static bool tx_sending(struct SerialHardware* _hw)
00492 {
00493     struct AvrxmegaSerial *hw = (struct AvrxmegaSerial *)_hw;
00494     return hw->sending;
00495 }
00496
00497
00498 // FIXME: move into compiler.h?  Ditch?
00499 #if COMPILER_C99
00500     #define C99INIT(name,val) .name = val
00501 #elif defined(__GNUC__)
00502     #define C99INIT(name,val) name: val
00503 #else
00504     #warning No designated initializers, double check your code
00505     #define C99INIT(name,val) (val)
00506 #endif
00507
00508 /*
00509  * High-level interface data structures
00510  */
00511 static const struct SerialHardwareVT UART_VT =
00512 {
00513     C99INIT(init, uart_init),
00514     C99INIT(cleanup, uart_cleanup),
00515     C99INIT(setBaudrate, uart_setbaudrate),
00516     C99INIT(setParity, uart_setparity),
00517     C99INIT(txStart, uart_enabletxirq),
00518     C99INIT(txSending, tx_sending)
00519 };
00520
00521 static struct AvrxmegaSerial UARTDescs[SER_CNT] =
00522 {
00523     {
00524         C99INIT(hw, ) {
00525             C99INIT(table, &UART_VT),
00526             C99INIT(txbuffer, uart0_txbuffer),
00527             C99INIT(rxbuffer, uart0_rxbuffer),
00528             C99INIT(txbuffer_size, sizeof(uart0_txbuffer)),
00529             C99INIT(rxbuffer_size, sizeof(uart0_rxbuffer)),
00530         },
00531         C99INIT(sending, false),
00532         C99INIT(usart, &USARTC0),
00533         C99INIT(port, &PORTC),
00534         C99INIT(txpin, PIN3_bp),
00535         C99INIT(rxpin, PIN2_bp),
00536     },
00537     {
00538         C99INIT(hw, ) {
00539             C99INIT(table, &UART_VT),
00540             C99INIT(txbuffer, uart1_txbuffer),
00541             C99INIT(rxbuffer, uart1_rxbuffer),
00542             C99INIT(txbuffer_size, sizeof(uart1_txbuffer)),
00543             C99INIT(rxbuffer_size, sizeof(uart1_rxbuffer)),
00544         },
00545         C99INIT(sending, false),
00546         C99INIT(usart, &USARTD0),
00547         C99INIT(port, &PORTD),
00548         C99INIT(txpin, PIN3_bp),
00549         C99INIT(rxpin, PIN2_bp),
00550     },
00551 #ifdef CPU_AVR_XMEGA_A
00552     {
00553         C99INIT(hw, ) {
00554             C99INIT(table, &UART_VT),
00555             C99INIT(txbuffer, uart2_txbuffer),
00556             C99INIT(rxbuffer, uart2_rxbuffer),
00557             C99INIT(txbuffer_size, sizeof(uart2_txbuffer)),
00558             C99INIT(rxbuffer_size, sizeof(uart2_rxbuffer)),
00559         },
00560         C99INIT(sending, false),
00561         C99INIT(usart, &USARTC1),
00562         C99INIT(port, &PORTC),
00563         C99INIT(txpin, PIN7_bp),
00564         C99INIT(rxpin, PIN6_bp),
00565     },
00566     {
00567         C99INIT(hw, ) {
00568             C99INIT(table, &UART_VT),
00569             C99INIT(txbuffer, uart3_txbuffer),
00570             C99INIT(rxbuffer, uart3_rxbuffer),
00571             C99INIT(txbuffer_size, sizeof(uart3_txbuffer)),
00572             C99INIT(rxbuffer_size, sizeof(uart3_rxbuffer)),
00573         },
00574         C99INIT(sending, false),
00575         C99INIT(usart, &USARTD1),
00576         C99INIT(port, &PORTD),
00577         C99INIT(txpin, PIN7_bp),
00578         C99INIT(rxpin, PIN6_bp),
00579     },
00580     {
00581         C99INIT(hw, ) {
00582             C99INIT(table, &UART_VT),
00583             C99INIT(txbuffer, uart4_txbuffer),
00584             C99INIT(rxbuffer, uart4_rxbuffer),
00585             C99INIT(txbuffer_size, sizeof(uart4_txbuffer)),
00586             C99INIT(rxbuffer_size, sizeof(uart4_rxbuffer)),
00587         },
00588         C99INIT(sending, false),
00589         C99INIT(usart, &USARTE0),
00590         C99INIT(port, &PORTE),
00591         C99INIT(txpin, PIN3_bp),
00592         C99INIT(rxpin, PIN2_bp),
00593     },
00594 #endif //CPU_AVR_XMEGA_A
00595 };
00596
00597 struct SerialHardware *ser_hw_getdesc(int unit)
00598 {
00599     ASSERT(unit < SER_CNT);
00600     return &UARTDescs[unit].hw;
00601 }
00602
00603
00604 /*
00605  * Interrupt handlers
00606  */
00607 static inline void usart_handleDreInterrupt(uint8_t usartNumber)
00608 {
00609     SER_STROBE_ON;
00610     struct FIFOBuffer * const txfifo = &ser_handles[usartNumber]->txfifo;
00611     if (fifo_isempty(txfifo))
00612     {
00613         SER_UART_BUS_TXEND(UARTDescs[usartNumber].usart);
00614         #ifndef SER_UART_BUS_TXOFF
00615             UARTDescs[usartNumber].sending = false;
00616         #endif
00617     }
00618     else
00619     {
00620         char c = fifo_pop(txfifo);
00621         SER_UART_BUS_TXCHAR(UARTDescs[usartNumber].usart, c);
00622     }
00623     SER_STROBE_OFF;
00624 }
00625
00626 #define USART_DRE_INTERRUPT_VECTOR(_vector, _usart)     \
00627 DECLARE_ISR(_vector)                                        \
00628 {                                                           \
00629     usart_handleDreInterrupt( _usart ); \
00630 }
00631
00632 USART_DRE_INTERRUPT_VECTOR(USARTC0_DRE_vect, SER_UART0)
00633 USART_DRE_INTERRUPT_VECTOR(USARTD0_DRE_vect, SER_UART1)
00634 #ifdef CPU_AVR_XMEGA_A
00635     USART_DRE_INTERRUPT_VECTOR(USARTC1_DRE_vect, SER_UART2)
00636     USART_DRE_INTERRUPT_VECTOR(USARTD1_DRE_VECT, SER_UART3)
00637     USART_DRE_INTERRUPT_VECTOR(USARTE0_DRE_vect, SER_UART4)
00638 #endif
00639
00640 #ifdef SER_UART_BUS_TXOFF
00641     static inline void USART_handleTXCInterrupt(uint8_t usartNumber)
00642     {
00643         SER_STROBE_ON;
00644         struct FIFOBuffer * const txfifo = &ser_handles[usartNumber]->txfifo;
00645         if (fifo_isempty(txfifo))
00646         {
00647             SER_UART_BUS_TXOFF(UARTDescs[usartNumber].usart);
00648             UARTDescs[usartNumber].sending = false;
00649         }
00650         else
00651         {
00652             SER_UART_BUS_TXBEGIN(UARTDescs[usartNumber].usart);
00653         }
00654         SER_STROBE_OFF;
00655     }
00656
00657     /*
00658      * Serial port 0 TX complete interrupt handler.
00659      *
00660      * This IRQ is usually disabled.  The UDR-empty interrupt
00661      * enables it when there's no more data to transmit.
00662      * We need to wait until the last character has been
00663      * transmitted before switching the 485 transceiver to
00664      * receive mode.
00665      *
00666      * The txfifo might have been refilled by putchar() while
00667      * we were waiting for the transmission complete interrupt.
00668      * In this case, we must restart the UDR empty interrupt,
00669      * otherwise we'd stop the serial port with some data
00670      * still pending in the buffer.
00671      */
00672     #define USART_TXC_INTERRUPT_VECTOR(_vector, _usart) \
00673     DECLARE_ISR(_vector)                                \
00674     {                                                   \
00675         USART_handleTXCInterrupt( _usart );             \
00676     }
00677
00678     USART_TXC_INTERRUPT_VECTOR(USARTC0_TXC_vect, SER_UART0)
00679     USART_TXC_INTERRUPT_VECTOR(USARTD0_TXC_vect, SER_UART1)
00680     #ifdef CPU_AVR_XMEGA_A
00681         USART_TXC_INTERRUPT_VECTOR(USARTC1_TXC_vect, SER_UART2)
00682         USART_TXC_INTERRUPT_VECTOR(USARTD1_TXC_vect, SER_UART3)
00683         USART_TXC_INTERRUPT_VECTOR(USARTE0_TXC_vect, SER_UART4)
00684     #endif /* CPU_AVR_XMEGA_A */
00685 #endif /* SER_UART_BUS_TXOFF */
00686
00687 /*
00688  * Serial RX complete interrupt handler.
00689  *
00690  * This handler is interruptible.
00691  * Interrupt are reenabled as soon as recv complete interrupt is
00692  * disabled. Using INTERRUPT() is troublesome when the serial
00693  * is heavily loaded, because an interrupt could be retriggered
00694  * when executing the handler prologue before RXCIE is disabled.
00695  */
00696 static inline void USART_handleRXCInterrupt(uint8_t usartNumber)
00697 {
00698     SER_STROBE_ON;
00699     /* read status */
00700     ser_handles[usartNumber]->status |= (UARTDescs[usartNumber].usart)->STATUS & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR);
00701     /* To clear the RXC flag we must _always_ read the UDR even when we're
00702      * not going to accept the incoming data, otherwise a new interrupt
00703      * will occur once the handler terminates.
00704      */
00705     char c = (UARTDescs[usartNumber].usart)->DATA;
00706     struct FIFOBuffer * const rxfifo = &ser_handles[usartNumber]->rxfifo;
00707     if (fifo_isfull(rxfifo))
00708     {
00709         ser_handles[usartNumber]->status |= SERRF_RXFIFOOVERRUN;
00710     }
00711     else
00712     {
00713         fifo_push(rxfifo, c);
00714         #if CONFIG_SER_HWHANDSHAKE
00715             if (fifo_isfull(rxfifo))
00716             {
00717                 RTS_OFF(UARTDescs[usartNumber].usart);
00718             }
00719         #endif
00720     }
00721     SER_STROBE_OFF;
00722 }
00723
00724 #define USART_RXC_INTERRUPT_VECTOR(_vector, _usart) \
00725 DECLARE_ISR(_vector)                                \
00726 {                                                   \
00727     USART_handleRXCInterrupt( _usart );             \
00728 }
00729 USART_RXC_INTERRUPT_VECTOR(USARTC0_RXC_vect, SER_UART0)
00730 USART_RXC_INTERRUPT_VECTOR(USARTD0_RXC_vect, SER_UART1)
00731 #ifdef CPU_AVR_XMEGA_A
00732     USART_RXC_INTERRUPT_VECTOR(USARTC1_RXC_vect, SER_UART2)
00733     USART_RXC_INTERRUPT_VECTOR(USARTD1_RXC_vect, SER_UART3)
00734     USART_RXC_INTERRUPT_VECTOR(USARTE0_RXC_vect, SER_UART4)
00735 #endif


BeRTOS: ser_xmega.h File Reference

  • cpu
  • avr
  • drv
Defines | Enumerations
ser_xmega.h File Reference

Low-level serial module for AVR XMEGA (interface). More...

#include <cfg/macros.h>
#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define | SERRF_RXFIFOOVERRUN BV(0)
Rx FIFO buffer overrun.
#define | SERRF_RXTIMEOUT BV(5)
Receive timeout.
#define | SERRF_TXTIMEOUT BV(6)
Transmit timeout.
#define | SERRF_RXSROVERRUN BV(3)
Rx shift register overrun.
#define | SERRF_FRAMEERROR BV(4)
Stop bit missing.
#define | SERRF_PARITYERROR BV(2)
Parity error.
#define | SERRF_NOISEERROR 0
Unsupported.

Enumerations

enum | { , SER_CNT }

Detailed Description

Low-level serial module for AVR XMEGA (interface).

This file is heavily inspired by the AVR implementation for BeRTOS, but uses a different approach for implementing the different debug ports, by using the USART_t structs.

Author:
Onno <developer@gorgoz.org>

Definition in file ser_xmega.h.

Enumeration Type Documentation

anonymous enum
Enumerator:
SER_CNT

Number of serial ports.

Definition at line 71 of file ser_xmega.h.


BeRTOS: ser_xmega.h Source File

  • cpu
  • avr
  • drv
ser_xmega.h
Go to the documentation of this file.
00001
00044 #ifndef DRV_SER_XMEGA_H
00045 #define DRV_SER_XMEGA_H
00046
00047 #include <cfg/macros.h>   /* BV() */
00048 #include <cfg/compiler.h> /* uint8_t */
00049
00050 typedef uint8_t serstatus_t;
00051
00052 /* Software errors */
00053 #define SERRF_RXFIFOOVERRUN  BV(0)
00054 #define SERRF_RXTIMEOUT      BV(5)
00055 #define SERRF_TXTIMEOUT      BV(6)
00057 /*
00058 * Hardware errors.
00059 * These flags map directly to the AVR XMEGA UART Status Register.
00060 */
00061 #define SERRF_RXSROVERRUN    BV(3)
00062 #define SERRF_FRAMEERROR     BV(4)
00063 #define SERRF_PARITYERROR    BV(2)
00064 #define SERRF_NOISEERROR     0
00066 /*
00067  * \name Serial hw numbers
00068  *
00069  * \{
00070  */
00071 enum
00072 {
00073     SER_UART0,
00074     SER_UART1,
00075 #ifdef CPU_AVR_XMEGA_A
00076     //the XMEGA A Family have 5 USART ports
00077     SER_UART2,
00078     SER_UART3,
00079     SER_UART4,
00080 #endif
00081     SER_CNT
00082 };
00083 /*\}*/
00084
00085 #endif /* DRV_SER_XMEGA_H */


BeRTOS: sha1.c File Reference

  • sec
  • hash
sha1.c File Reference

SHA-1 Hashing algorithm. More...

#include "sha1.h"
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cpu/byteorder.h>
#include <string.h>
#include <stdlib.h>
#include <sec/util.h>

Go to the source code of this file.

Detailed Description

SHA-1 Hashing algorithm.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file sha1.c.


BeRTOS: sha1.c Source File

  • sec
  • hash
sha1.c
Go to the documentation of this file.
00001
00037 /*
00038  * Derived from:
00039  * SHA-1 in C
00040  * By Steve Reid <steve@edmweb.com>
00041  * 100% Public Domain
00042  */
00043
00044 /* #define LITTLE_ENDIAN * This should be #define'd if true. */
00045 /* #define SHA1HANDSOFF * Copies data before messing with it. */
00046
00047 #include "sha1.h"
00048
00049 #include <cfg/compiler.h>
00050 #include <cfg/debug.h>
00051 #include <cfg/macros.h>
00052 #include <cpu/byteorder.h>  // CPU_BYTE_ORDER
00053 #include <string.h>
00054 #include <stdlib.h>
00055 #include <sec/util.h>
00056
00057 #define SHA1_BLOCK_LEN          64
00058 #define SHA1_DIGEST_LEN         20
00059
00060 static void SHA1Transform(uint32_t state[5], const uint8_t buffer[64]);
00061
00062 #define rol(value, bits)  ROTL(value, bits)
00063
00064 /* blk0() and blk() perform the initial expand. */
00065 /* I got the idea of expanding during the round function from SSLeay */
00066 #define blk0(i) (block[i] = be32_to_cpu(block[i]))
00067 #define blk(i) (block[i&15] = rol(block[(i+13)&15]^block[(i+8)&15] \
00068                                      ^block[(i+2)&15]^block[i&15],1))
00069
00070 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */
00071 #define R0(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk0(i)+0x5A827999+rol(v,5);w=rol(w,30);
00072 #define R1(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk(i)+0x5A827999+rol(v,5);w=rol(w,30);
00073 #define R2(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0x6ED9EBA1+rol(v,5);w=rol(w,30);
00074 #define R3(v,w,x,y,z,i) z+=(((w|x)&y)|(w&x))+blk(i)+0x8F1BBCDC+rol(v,5);w=rol(w,30);
00075 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30);
00076
00077
00078 /* Hash a single 512-bit block. This is the core of the algorithm. */
00079 static void SHA1Transform(uint32_t state[5], const uint8_t buffer[64])
00080 {
00081     uint32_t a, b, c, d, e;
00082     uint32_t block[16];
00083
00084     memcpy(&block, buffer, 64);
00085
00086     /* Copy context->state[] to working vars */
00087     a = state[0];
00088     b = state[1];
00089     c = state[2];
00090     d = state[3];
00091     e = state[4];
00092     /* 4 rounds of 20 operations each. Loop unrolled. */
00093     R0(a,b,c,d,e, 0);
00094     R0(e,a,b,c,d, 1);
00095     R0(d,e,a,b,c, 2);
00096     R0(c,d,e,a,b, 3);
00097     R0(b,c,d,e,a, 4);
00098     R0(a,b,c,d,e, 5);
00099     R0(e,a,b,c,d, 6);
00100     R0(d,e,a,b,c, 7);
00101     R0(c,d,e,a,b, 8);
00102     R0(b,c,d,e,a, 9);
00103     R0(a,b,c,d,e,10);
00104     R0(e,a,b,c,d,11);
00105     R0(d,e,a,b,c,12);
00106     R0(c,d,e,a,b,13);
00107     R0(b,c,d,e,a,14);
00108     R0(a,b,c,d,e,15);
00109     R1(e,a,b,c,d,16);
00110     R1(d,e,a,b,c,17);
00111     R1(c,d,e,a,b,18);
00112     R1(b,c,d,e,a,19);
00113     R2(a,b,c,d,e,20);
00114     R2(e,a,b,c,d,21);
00115     R2(d,e,a,b,c,22);
00116     R2(c,d,e,a,b,23);
00117     R2(b,c,d,e,a,24);
00118     R2(a,b,c,d,e,25);
00119     R2(e,a,b,c,d,26);
00120     R2(d,e,a,b,c,27);
00121     R2(c,d,e,a,b,28);
00122     R2(b,c,d,e,a,29);
00123     R2(a,b,c,d,e,30);
00124     R2(e,a,b,c,d,31);
00125     R2(d,e,a,b,c,32);
00126     R2(c,d,e,a,b,33);
00127     R2(b,c,d,e,a,34);
00128     R2(a,b,c,d,e,35);
00129     R2(e,a,b,c,d,36);
00130     R2(d,e,a,b,c,37);
00131     R2(c,d,e,a,b,38);
00132     R2(b,c,d,e,a,39);
00133     R3(a,b,c,d,e,40);
00134     R3(e,a,b,c,d,41);
00135     R3(d,e,a,b,c,42);
00136     R3(c,d,e,a,b,43);
00137     R3(b,c,d,e,a,44);
00138     R3(a,b,c,d,e,45);
00139     R3(e,a,b,c,d,46);
00140     R3(d,e,a,b,c,47);
00141     R3(c,d,e,a,b,48);
00142     R3(b,c,d,e,a,49);
00143     R3(a,b,c,d,e,50);
00144     R3(e,a,b,c,d,51);
00145     R3(d,e,a,b,c,52);
00146     R3(c,d,e,a,b,53);
00147     R3(b,c,d,e,a,54);
00148     R3(a,b,c,d,e,55);
00149     R3(e,a,b,c,d,56);
00150     R3(d,e,a,b,c,57);
00151     R3(c,d,e,a,b,58);
00152     R3(b,c,d,e,a,59);
00153     R4(a,b,c,d,e,60);
00154     R4(e,a,b,c,d,61);
00155     R4(d,e,a,b,c,62);
00156     R4(c,d,e,a,b,63);
00157     R4(b,c,d,e,a,64);
00158     R4(a,b,c,d,e,65);
00159     R4(e,a,b,c,d,66);
00160     R4(d,e,a,b,c,67);
00161     R4(c,d,e,a,b,68);
00162     R4(b,c,d,e,a,69);
00163     R4(a,b,c,d,e,70);
00164     R4(e,a,b,c,d,71);
00165     R4(d,e,a,b,c,72);
00166     R4(c,d,e,a,b,73);
00167     R4(b,c,d,e,a,74);
00168     R4(a,b,c,d,e,75);
00169     R4(e,a,b,c,d,76);
00170     R4(d,e,a,b,c,77);
00171     R4(c,d,e,a,b,78);
00172     R4(b,c,d,e,a,79);
00173     /* Add the working vars back into context.state[] */
00174     state[0] += a;
00175     state[1] += b;
00176     state[2] += c;
00177     state[3] += d;
00178     state[4] += e;
00179     /* Wipe variables */
00180     a = b = c = d = e = 0;
00181 }
00182
00183 static void SHA1_begin(Hash* h)
00184 {
00185     SHA1_Context *context = (SHA1_Context*)h;
00186     /* SHA1 initialization constants */
00187     context->state[0] = 0x67452301;
00188     context->state[1] = 0xEFCDAB89;
00189     context->state[2] = 0x98BADCFE;
00190     context->state[3] = 0x10325476;
00191     context->state[4] = 0xC3D2E1F0;
00192     context->count[0] = context->count[1] = 0;
00193 }
00194
00195 /* Run your data through this. */
00196
00197 static void SHA1_update(Hash* h, const void* vdata, size_t len)
00198 {
00199     SHA1_Context *context = (SHA1_Context*)h;
00200     const uint8_t *data = (const uint8_t*)vdata;
00201     size_t i, j;
00202
00203     j = (context->count[0] >> 3) & 63;
00204     if ((context->count[0] += len << 3) < (len << 3))
00205         context->count[1]++;
00206     context->count[1] += (len >> 29);
00207     if ((j + len) > 63) {
00208         memcpy(&context->buffer[j], data, (i = 64-j));
00209         SHA1Transform(context->state, context->buffer);
00210         for ( ; i + 63 < len; i += 64) {
00211             SHA1Transform(context->state, &data[i]);
00212         }
00213         j = 0;
00214     } else
00215         i = 0;
00216     memcpy(&context->buffer[j], &data[i], len - i);
00217 }
00218
00219
00220 /* Add padding and return the message digest. */
00221
00222 static uint8_t *SHA1_final(Hash* h)
00223 {
00224     SHA1_Context *context = (SHA1_Context*)h;
00225     uint32_t i;
00226     uint8_t finalcount[8];
00227
00228     for (i = 0; i < 8; i++)
00229         finalcount[i] = (uint8_t)((context->count[(i >= 4 ? 0 : 1)]
00230                                    >> ((3-(i & 3)) * 8) ) & 255);  /* Endian independent */
00231
00232     SHA1_update(h, "\200", 1);
00233     while ((context->count[0] & 504) != 448)
00234         SHA1_update(h, "\0", 1);
00235     SHA1_update(h, finalcount, 8);  /* Should cause a SHA1Transform() */
00236
00237     for (i = 0; i < 20; i++)
00238         context->buffer[i] = (uint8_t)
00239                              ((context->state[i>>2] >> ((3-(i & 3)) * 8) ) & 255);
00240
00241     PURGE(i);
00242     PURGE(finalcount);
00243     return context->buffer;
00244 }
00245
00246
00247 /*************************************************************/
00248
00249 void SHA1_init(SHA1_Context* ctx)
00250 {
00251     ctx->h.block_len = SHA1_BLOCK_LEN;
00252     ctx->h.digest_len = SHA1_DIGEST_LEN;
00253     ctx->h.begin = SHA1_begin;
00254     ctx->h.update = SHA1_update;
00255     ctx->h.final = SHA1_final;
00256 }


BeRTOS: sha1.h File Reference

  • sec
  • hash
Data Structures
sha1.h File Reference

SHA-1 Hashing algorithm. More...

#include <cfg/compiler.h>
#include <sec/hash.h>
#include <alloca.h>

Go to the source code of this file.

Data Structures

struct SHA1_Context
Context for SHA1 computation. More...

Detailed Description

SHA-1 Hashing algorithm.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file sha1.h.


BeRTOS: sha1.h Source File

  • sec
  • hash
sha1.h
Go to the documentation of this file.
00001
00039 #ifndef SEC_HASH_SHA1
00040 #define SEC_HASH_SHA1
00041
00042 #include <cfg/compiler.h>
00043 #include <sec/hash.h>
00044 #include <alloca.h>
00045
00049 typedef struct {
00050     Hash h;
00051     uint32_t state[5];
00052     uint32_t count[2];
00053     uint8_t buffer[64];
00054 } SHA1_Context;
00055
00056 void SHA1_init(SHA1_Context *context);
00057
00058 #define SHA1_stackinit(...) \
00059     ({ SHA1_Context *ctx = alloca(sizeof(SHA1_Context)); SHA1_init(ctx, ##__VA_ARGS__); &ctx->h; })
00060
00061 int SHA1_testSetup(void);
00062 int SHA1_testRun(void);
00063 int SHA1_testTearDown(void);
00064
00065 #endif


BeRTOS: signal.c File Reference

  • kern
signal.c File Reference

IPC signals implementation. More...

#include "signal.h"
#include "cfg/cfg_timer.h"
#include <cfg/debug.h>
#include <cfg/depend.h>
#include <cpu/irq.h>
#include <kern/proc.h>
#include <kern/proc_p.h>
#include <drv/timer.h>

Go to the source code of this file.

Detailed Description

IPC signals implementation.

Signals are a low-level IPC primitive. A process receives a signal when some external event has happened. Like interrupt requests, signals do not carry any additional information. If processing a specific event requires additional data, the process must obtain it through some other mechanism.

Despite the name, one shouldn't confuse these signals with POSIX signals. POSIX signals are usually executed synchronously, like software interrupts.

Signals are very low overhead. Using them exclusively to wait for multiple asynchronous events results in very simple dispatch logic with low processor and resource usage.

The "event" module is a higher-level interface that can optionally deliver signals to processes. Messages provide even higher-level IPC services built on signals. Semaphore arbitration is also implemented using signals.

In this implementation, each process has a limited set of signal bits (usually 32) and can wait for multiple signals at the same time using sig_wait(). Signals can also be polled using sig_check(), but a process spinning on its signals usually defeats their purpose of providing a multitasking-friendly infrastructure for event-driven applications.

Signals are like flags: they are either active or inactive. After an external event has delivered a particular signal, it remains raised until the process acknowledges it using either sig_wait() or sig_check(). Counting signals is not a reliable way to count how many times a particular event has occurred, because the same signal may be delivered twice before the process can notice.

Signals can be delivered synchronously via sig_send() or asynchronously via sig_post().

In the synchronous case the process is awakened if it was waiting for any signal and immediately dispatched for execution via a direct context switch, if its priority is greater than the running process.

  • Synchronous-signal delivery:
    •

     [P1]____sig_send()____proc_wakeup()____[P2]

In the asynchronous case, the process is scheduled for execution as a consequence of the delivery, but it will be dispatched by the scheduler as usual, according to the scheduling policy.

  • Asynchronous-signal delivery:
    •

     [P1]____sig_post()____[P1]____proc_schedule()____[P2]

In this way, any execution context, including an interrupt handler, can deliver a signal to a process. However, synchronous signal delivery from a non-sleepable context (like an interrupt handler) is forbidden in order to avoid potential deadlock conditions. Instead, sig_post() can be used from any context, expecially from interrupt context or when the preemption is disabled.

Multiple independent signals may be delivered at once with a single invocation of sig_send() or sig_post(), although this is rarely useful.

Signal Allocation

There's no hardcoded mapping of specific events to signal bits. The meaning of a particular signal bit is defined by an agreement between the delivering entity and the receiving process. For instance, a terminal driver may be designed to deliver a signal bit called SIG_INT when it reads the CTRL-C sequence from the keyboard, and a process may react to it by quitting.

SIG_SINGLE

The SIG_SINGLE bit is reserved as a convenient shortcut in those simple scenarios where a process needs to wait on just one event synchronously. By using SIG_SINGLE, there's no need to allocate a specific signal from the free pool. The constraints for safely accessing SIG_SINGLE are:

  • The process MUST sig_wait() exclusively on SIG_SINGLE
  • SIG_SIGNAL MUST NOT be left pending after use (sig_wait() will reset it automatically)
  • Do not sleep between starting the asynchronous task that will fire SIG_SINGLE, and the call to sig_wait().
  • Do not call system functions that may implicitly sleep, such as timer_delayTicks().
Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file signal.c.


BeRTOS: signal.c Source File

  • kern
signal.c
Go to the documentation of this file.
00001
00128 #include "signal.h"
00129
00130 #include "cfg/cfg_timer.h"
00131 #include <cfg/debug.h>
00132 #include <cfg/depend.h>
00133
00134 #include <cpu/irq.h>
00135 #include <kern/proc.h>
00136 #include <kern/proc_p.h>
00137
00138
00139 #if CONFIG_KERN_SIGNALS
00140
00141 // Check config dependencies
00142 CONFIG_DEPEND(CONFIG_KERN_SIGNALS, CONFIG_KERN);
00143
00144 sigmask_t sig_waitSignal(Signal *s, sigmask_t sigs)
00145 {
00146     sigmask_t result;
00147
00148     /* Sleeping with IRQs disabled or preemption forbidden is illegal */
00149     IRQ_ASSERT_ENABLED();
00150     ASSERT(proc_preemptAllowed());
00151
00152     /*
00153      * This is subtle: there's a race condition where a concurrent process
00154      * or an interrupt may call sig_send()/sig_post() to set a bit in
00155      * Process.sig_recv just after we have checked for it, but before we've
00156      * set Process.sig_wait to let them know we want to be awaken.
00157      *
00158      * In this case, we'd deadlock with the signal bit already set and the
00159      * process never being reinserted into the ready list.
00160      */
00161     IRQ_DISABLE;
00162
00163     /* Loop until we get at least one of the signals */
00164     while (!(result = s->recv & sigs))
00165     {
00166         /*
00167          * Tell "them" that we want to be awaken when any of these
00168          * signals arrives.
00169          */
00170         s->wait = sigs;
00171
00172         /* Go to sleep and proc_switch() to another process. */
00173         proc_switch();
00174         /*
00175          * When we come back here, the wait mask must have been
00176          * cleared by someone through sig_send()/sig_post(), and at
00177          * least one of the signals we were expecting must have been
00178          * delivered to us.
00179          */
00180         ASSERT(!s->wait);
00181         ASSERT(s->recv & sigs);
00182     }
00183
00184     /* Signals found: clear them and return */
00185     s->recv &= ~sigs;
00186
00187     IRQ_ENABLE;
00188     return result;
00189 }
00190
00191 #if CONFIG_TIMER_EVENTS
00192
00193 #include <drv/timer.h>
00194
00195 sigmask_t sig_waitTimeoutSignal(Signal *s, sigmask_t sigs, ticks_t timeout,
00196                 Hook func, iptr_t data)
00197 {
00198     Timer t;
00199     sigmask_t res;
00200     cpu_flags_t flags;
00201
00202     ASSERT(!sig_checkSignal(s, SIG_TIMEOUT));
00203     ASSERT(!(sigs & SIG_TIMEOUT));
00204     /* IRQ are needed to run timer */
00205     ASSERT(IRQ_ENABLED());
00206
00207     if (func)
00208         timer_setSoftint(&t, func, data);
00209     else
00210         timer_set_event_signal(&t, proc_current(), SIG_TIMEOUT);
00211     timer_setDelay(&t, timeout);
00212     timer_add(&t);
00213     res = sig_waitSignal(s, SIG_TIMEOUT | sigs);
00214
00215     IRQ_SAVE_DISABLE(flags);
00216     /* Remove timer if sigs occur before timer signal */
00217     if (!(res & SIG_TIMEOUT) && !sig_checkSignal(s, SIG_TIMEOUT))
00218         timer_abort(&t);
00219     IRQ_RESTORE(flags);
00220     return res;
00221 }
00222
00223 #endif // CONFIG_TIMER_EVENTS
00224
00225 INLINE void __sig_signal(Signal *s, Process *proc, sigmask_t sigs, bool wakeup)
00226 {
00227     cpu_flags_t flags;
00228
00229     IRQ_SAVE_DISABLE(flags);
00230
00231     /* Set the signals */
00232     s->recv |= sigs;
00233
00234     /* Check if process needs to be awoken */
00235     if (s->recv & s->wait)
00236     {
00237         ASSERT(proc != current_process);
00238
00239         s->wait = 0;
00240         if (wakeup)
00241             proc_wakeup(proc);
00242         else
00243             SCHED_ENQUEUE_HEAD(proc);
00244     }
00245     IRQ_RESTORE(flags);
00246 }
00247
00248 void sig_sendSignal(Signal *s, Process *proc, sigmask_t sigs)
00249 {
00250     ASSERT_USER_CONTEXT();
00251     IRQ_ASSERT_ENABLED();
00252     ASSERT(proc_preemptAllowed());
00253
00254     __sig_signal(s, proc, sigs, true);
00255 }
00256
00257 void sig_postSignal(Signal *s, Process *proc, sigmask_t sigs)
00258 {
00259     __sig_signal(s, proc, sigs, false);
00260 }
00261
00262 #endif /* CONFIG_KERN_SIGNALS */


BeRTOS: signal.h File Reference

  • kern
Functions
signal.h File Reference
#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <cpu/irq.h>
#include <kern/proc.h>

Go to the source code of this file.

Defines

Signal definitions
#define | SIG_USER0 BV(0)
Free for user usage.
#define | SIG_USER1 BV(1)
Free for user usage.
#define | SIG_USER2 BV(2)
Free for user usage.
#define | SIG_USER3 BV(3)
Free for user usage.
#define | SIG_SINGLE BV(4)
Used to wait for a single event.
#define | SIG_SYSTEM5 BV(5)
Reserved for internal system use.
#define | SIG_SYSTEM6 BV(6)
Reserved for internal system use.
#define | SIG_TIMEOUT BV(7)
Reserved for timeout use.
#define | SIG_USER_MAX SIG_SINGLE
Max number of signals that can be used by drivers or user applications.

Functions

sigmask_t | sig_checkSignal (Signal *s, sigmask_t sigs)
Check if any of the signals in sigs has occurred and clear them.
sigmask_t | sig_check (sigmask_t sigs)
Check if any of the signals in sigs has occurred and clear them.
void | sig_send (Process *proc, sigmask_t sig)
Send the signals sigs to the process proc and immeditaly dispatch it for execution.
void | sig_post (Process *proc, sigmask_t sig)
Send the signals sigs to the process proc.
sigmask_t | sig_wait (sigmask_t sigs)
Sleep until any of the signals in sigs occurs.
sigmask_t | sig_waitTimeout (sigmask_t sigs, ticks_t timeout)
Sleep until any of the signals in sigs or timeout ticks elapse.

Detailed Description

Definition in file signal.h.


BeRTOS: signal.h Source File

  • kern
signal.h
Go to the documentation of this file.
00001
00048 #ifndef KERN_SIGNAL_H
00049 #define KERN_SIGNAL_H
00050
00051 #include <cfg/compiler.h>
00052 #include <cfg/macros.h>    // BV()
00053
00054 #include <cpu/irq.h>
00055
00056 #include <kern/proc.h>
00057
00058 #if CONFIG_KERN_SIGNALS
00059
00060 INLINE sigmask_t __sig_checkSignal(Signal *s, sigmask_t sigs)
00061 {
00062     sigmask_t result;
00063
00064     result = s->recv & sigs;
00065     s->recv &= ~sigs;
00066
00067     return result;
00068 }
00069
00075 INLINE sigmask_t sig_checkSignal(Signal *s, sigmask_t sigs)
00076 {
00077     cpu_flags_t flags;
00078     sigmask_t result;
00079
00080     IRQ_SAVE_DISABLE(flags);
00081     result = __sig_checkSignal(s, sigs);
00082     IRQ_RESTORE(flags);
00083
00084     return result;
00085 }
00086
00092 INLINE sigmask_t sig_check(sigmask_t sigs)
00093 {
00094     Process *proc = proc_current();
00095     return sig_checkSignal(&proc->sig, sigs);
00096 }
00097
00098 void sig_sendSignal(Signal *s, Process *proc, sigmask_t sig);
00099
00110 INLINE void sig_send(Process *proc, sigmask_t sig)
00111 {
00112     sig_sendSignal(&proc->sig, proc, sig);
00113 }
00114
00115 void sig_postSignal(Signal *s, Process *proc, sigmask_t sig);
00116
00123 INLINE void sig_post(Process *proc, sigmask_t sig)
00124 {
00125     sig_postSignal(&proc->sig, proc, sig);
00126 }
00127
00128 /*
00129  * XXX: this is provided for backword compatibility, consider to make this
00130  * deprecated for the future.
00131  */
00132 INLINE void sig_signal(Process *proc, sigmask_t sig)
00133 {
00134     sig_postSignal(&proc->sig, proc, sig);
00135 }
00136
00137 sigmask_t sig_waitSignal(Signal *s, sigmask_t sigs);
00138
00144 INLINE sigmask_t sig_wait(sigmask_t sigs)
00145 {
00146     Process *proc = proc_current();
00147     return sig_waitSignal(&proc->sig, sigs);
00148 }
00149
00150 sigmask_t sig_waitTimeoutSignal(Signal *s, sigmask_t sigs, ticks_t timeout,
00151                 Hook func, iptr_t data);
00152
00159 INLINE sigmask_t sig_waitTimeout(sigmask_t sigs, ticks_t timeout)
00160 {
00161     Process *proc = proc_current();
00162     return sig_waitTimeoutSignal(&proc->sig, sigs, timeout,
00163             NULL, NULL);
00164 }
00165
00166 #endif /* CONFIG_KERN_SIGNALS */
00167
00168 int signal_testRun(void);
00169 int signal_testSetup(void);
00170 int signal_testTearDown(void);
00171
00176 #define SIG_USER0    BV(0)
00177 #define SIG_USER1    BV(1)
00178 #define SIG_USER2    BV(2)
00179 #define SIG_USER3    BV(3)
00180 #define SIG_SINGLE   BV(4)
00181 #define SIG_SYSTEM5  BV(5)
00182 #define SIG_SYSTEM6  BV(6)
00183 #define SIG_TIMEOUT  BV(7)
00188 #define SIG_USER_MAX SIG_SINGLE
00189 /*\}*/
00190
00191 /* \} */ //defgroup kern_signal
00192
00193 #endif /* KERN_SIGNAL_H */


BeRTOS: sipo.c File Reference

  • drv
Functions
sipo.c File Reference

SIPO Module. More...

#include "sipo.h"
#include "hw/hw_sipo.h"
#include <cfg/compiler.h>
#include <cfg/log.h>
#include <io/kfile.h>
#include <string.h>

Go to the source code of this file.

Functions

void | sipo_putchar (uint8_t c, uint8_t bit_order, uint8_t clock_pol)
Write a char in sipo shift register.
static size_t | sipo_write (struct KFile *_fd, const void *_buf, size_t size)
Write a buffer into the sipo register and, when finished, give a load pulse.
void | sipo_init (Sipo *fd)
Initialize the SIPO.

Detailed Description

SIPO Module.

The SIPO module transforms a serial input in a parallel output. Please check hw_sipo.h file to customize hardware related parameters.

Author:
Andrea Grandi <andrea@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file sipo.c.


BeRTOS: sipo.c Source File

  • drv
sipo.c
Go to the documentation of this file.
00001
00043 #include "sipo.h"
00044
00045 #include "hw/hw_sipo.h"
00046
00047 #include <cfg/compiler.h>
00048 #include <cfg/log.h>
00049
00050 #include <io/kfile.h>
00051
00052 #include <string.h>
00053
00054
00055 #define SIPO_DATAORDER_START(order)          (order ? SIPO_DATAORDER_START_LSB : SIPO_DATAORDER_START_MSB)
00056 #define SIPO_DATAORDER_SHIFT(shift, order)   (order ?  ((shift) <<= 1) : ((shift) >>= 1))
00057
00061 INLINE void sipo_putchar(uint8_t c, uint8_t bit_order, uint8_t clock_pol)
00062 {
00063     uint8_t shift = SIPO_DATAORDER_START(bit_order);
00064
00065     for(int i = 0; i < 8; i++)
00066     {
00067         if((c & shift) == 0)
00068             SIPO_SI_LOW();
00069         else
00070             SIPO_SI_HIGH();
00071
00072         SIPO_SI_CLOCK(clock_pol);
00073
00074         SIPO_DATAORDER_SHIFT(shift, bit_order);
00075     }
00076 }
00077
00081 static size_t sipo_write(struct KFile *_fd, const void *_buf, size_t size)
00082 {
00083     const uint8_t *buf = (const uint8_t *)_buf;
00084     Sipo *fd = SIPO_CAST(_fd);
00085     size_t write_len = size;
00086
00087     ASSERT(buf);
00088
00089     SIPO_SET_SI_LEVEL();
00090     SIPO_SET_CLK_LEVEL(fd->clock_pol);
00091     SIPO_SET_LD_LEVEL(fd->load_device, fd->load_pol);
00092
00093     // Load into the shift register all the buffer bytes
00094     while(size--)
00095         sipo_putchar(*buf++, fd->bit_order, fd->clock_pol);
00096
00097     // We finsh to load bytes, so load it.
00098     SIPO_LOAD(fd->load_device, fd->load_pol);
00099
00100     return write_len;
00101 }
00102
00106 void sipo_init(Sipo *fd)
00107 {
00108     ASSERT(fd);
00109
00110     memset(fd, 0, sizeof(Sipo));
00111
00112     //Set kfile struct type as a generic kfile structure.
00113     DB(fd->fd._type = KFT_SIPO);
00114
00115     // Set up SIPO writing functions.
00116     fd->fd.write = sipo_write;
00117
00118     SIPO_INIT_PIN();
00119
00120     /* Enable sipo output */
00121     SIPO_ENABLE();
00122 }


BeRTOS: sipo.h File Reference

  • drv
Data Structures | Defines | Enumerations | Functions
sipo.h File Reference

Generic Serial-in, Parallel-out implementation (SIPO). More...

#include "hw/hw_sipo.h"
#include <io/kfile.h>

Go to the source code of this file.

Data Structures

struct | Sipo
Sipo KFile context structure. More...

Defines

#define | KFT_SIPO MAKE_ID('S', 'I', 'P', 'O')
ID for sipo.

Enumerations

enum | SipoBitOrder
Define enum to set sipo data order.
enum | SipoClkPol
Define enum to set the start level of clock.
enum | SipoLoadPol
Define enum to set load signal level.

Functions

Sipo * | SIPO_CAST (KFile *fd)
Convert + ASSERT from generic KFile to Sipo.
void | sipo_init (Sipo *fd)
Initialize the SIPO.

Detailed Description

Generic Serial-in, Parallel-out implementation (SIPO).

Author:
Andrea Grandi <andrea@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file sipo.h.


BeRTOS: sipo.h Source File

  • drv
sipo.h
Go to the documentation of this file.
00001
00049 #ifndef DRV_SIPO_H
00050 #define DRV_SIPO_H
00051
00052 #include "hw/hw_sipo.h"
00053
00054 #include <io/kfile.h>
00055
00056 #define SIPO_DATAORDER_START_LSB        1
00057 #define SIPO_DATAORDER_START_MSB     0x80
00058
00062 typedef enum SipoBitOrder
00063 {
00064     SIPO_DATAORDER_MSB = 0,
00065     SIPO_DATAORDER_LSB = 1
00066 } SipoBitOrder;
00067
00071 typedef enum SipoClockPol
00072 {
00073     SIPO_START_LOW = 0,
00074     SIPO_START_HIGH = 1
00075
00076 } SipoClkPol;
00077
00081 typedef enum SipoLoadPol
00082 {
00083     SIPO_LOW_TO_HIGH = 0,
00084     SIPO_HIGH_TO_LOW = 1
00085
00086 } SipoLoadPol;
00087
00091 typedef struct Sipo
00092 {
00093     KFile fd;
00094     SipoMap load_device;
00095     SipoLoadPol load_pol;
00096     SipoClkPol clock_pol;
00097     SipoBitOrder bit_order;
00098
00099 } Sipo;
00100
00104 #define KFT_SIPO MAKE_ID('S', 'I', 'P', 'O')
00105
00109 INLINE Sipo * SIPO_CAST(KFile *fd)
00110 {
00111     ASSERT(fd->_type == KFT_SIPO);
00112     return (Sipo *)fd;
00113 }
00114
00115 void sipo_init(Sipo *fd);
00116
00117 #endif // DRV_SIPO_H
00118


BeRTOS: spi_bitbang.c File Reference

  • drv
Functions
spi_bitbang.c File Reference

Emulated SPI Master for DSP firmware download (impl.) More...

#include "spi_bitbang.h"
#include "hw/hw_spi.h"
#include "cfg/cfg_spi_bitbang.h"
#include <cfg/module.h>
#include <cpu/irq.h>

Go to the source code of this file.

Functions

uint8_t | spi_sendRecv (uint8_t c)
Send byte c over MOSI line, CONFIG_SPI_DATAORDER first.
void | spi_read (void *_buff, size_t len)
Read.
void | spi_write (const void *_buff, size_t len)
Write.

Detailed Description

Emulated SPI Master for DSP firmware download (impl.)

Author:
Francesco Sacchi <batt@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file spi_bitbang.c.

Function Documentation

void spi_read | ( | void * | _buff,
 |  | size_t | len
 | ) |  |

Read.

Parameters:
len from spi, and put it in
_buff .

Definition at line 99 of file spi_bitbang.c.

uint8_t spi_sendRecv ( uint8_t c )

Send byte c over MOSI line, CONFIG_SPI_DATAORDER first.

SS pin state is left unchanged.

Definition at line 64 of file spi_bitbang.c.

void spi_write | ( | const void * | _buff,
 |  | size_t | len
 | ) |  |

Write.

Parameters:
len to spi, and take it from
_buff .

Definition at line 112 of file spi_bitbang.c.


BeRTOS: spi_bitbang.c Source File

  • drv
spi_bitbang.c
Go to the documentation of this file.
00001
00042 #include "spi_bitbang.h"
00043 #include "hw/hw_spi.h"
00044
00045 #include "cfg/cfg_spi_bitbang.h"
00046 #include <cfg/module.h>
00047
00048 #include <cpu/irq.h>
00049
00050 void spi_assertSS(void)
00051 {
00052     ATOMIC(SS_ACTIVE());
00053 }
00054
00055 void spi_deassertSS(void)
00056 {
00057     ATOMIC(SS_INACTIVE());
00058 }
00059
00064 uint8_t spi_sendRecv(uint8_t c)
00065 {
00066     uint8_t data = 0;
00067     uint8_t shift = SPI_DATAORDER_START;
00068
00069
00070     ATOMIC(
00071         for (int i = 0; i < 8; i++)
00072         {
00073             /* Shift the i-th bit to MOSI */
00074             if (c & shift)
00075                 MOSI_HIGH();
00076             else
00077                 MOSI_LOW();
00078             /* Assert clock */
00079             SCK_ACTIVE();
00080             data |= IS_MISO_HIGH() ? shift : 0;
00081             /* De-assert clock */
00082             SCK_INACTIVE();
00083             SPI_DATAORDER_SHIFT(shift);
00084         }
00085     );
00086     return data;
00087 }
00088
00089 MOD_DEFINE(spi);
00090 void spi_init(void)
00091 {
00092     ATOMIC(SPI_HW_INIT());
00093     MOD_INIT(spi);
00094 }
00095
00099 void spi_read(void *_buff, size_t len)
00100 {
00101     uint8_t *buff = (uint8_t *)_buff;
00102
00103     while (len--)
00104         /* Read byte from spi and put it in buffer. */
00105         *buff++ = spi_sendRecv(0);
00106
00107 }
00108
00112 void spi_write(const void *_buff, size_t len)
00113 {
00114     const uint8_t *buff = (const uint8_t *)_buff;
00115
00116     while (len--)
00117         /* Write byte pointed at by *buff to spi */
00118         spi_sendRecv(*buff++);
00119
00120 }


BeRTOS: spi_bitbang.h File Reference

  • drv
Defines | Functions
spi_bitbang.h File Reference

Emulated SPI driver. More...

#include "cfg/cfg_spi_bitbang.h"
#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define | SPI_LSB_FIRST 1
Define send and receive order bit.

Functions

void | spi_write (const void *buf, size_t len)
Write.
void | spi_read (void *buf, size_t len)
Read.
uint8_t | spi_sendRecv (uint8_t c)
Send byte c over MOSI line, CONFIG_SPI_DATAORDER first.

Detailed Description

Emulated SPI driver.

Author:
Francesco Sacchi <batt@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file spi_bitbang.h.

Function Documentation

void spi_read | ( | void * | _buff,
 |  | size_t | len
 | ) |  |

Read.

Parameters:
len from spi, and put it in
_buff .

Definition at line 99 of file spi_bitbang.c.

uint8_t spi_sendRecv ( uint8_t c )

Send byte c over MOSI line, CONFIG_SPI_DATAORDER first.

SS pin state is left unchanged.

Definition at line 64 of file spi_bitbang.c.

void spi_write | ( | const void * | _buff,
 |  | size_t | len
 | ) |  |

Write.

Parameters:
len to spi, and take it from
_buff .

Definition at line 112 of file spi_bitbang.c.


BeRTOS: spi_bitbang.h Source File

  • drv
spi_bitbang.h
Go to the documentation of this file.
00001
00046 #ifndef DRV_SPI_BITBANG_H
00047 #define DRV_SPI_BITBANG_H
00048
00049 #include "cfg/cfg_spi_bitbang.h"
00050
00051 #include <cfg/compiler.h>
00052
00058 #define SPI_LSB_FIRST 1
00059 #define SPI_MSB_FIRST 2
00060
00061 #if CONFIG_SPI_DATAORDER == SPI_LSB_FIRST
00062     #define  SPI_DATAORDER_START    1
00063     #define  SPI_DATAORDER_SHIFT(i) ((i) <<= 1)
00064 #elif CONFIG_SPI_DATAORDER == SPI_MSB_FIRST
00065     #define  SPI_DATAORDER_START    0x80
00066     #define  SPI_DATAORDER_SHIFT(i) ((i) >>= 1)
00067 #endif
00068
00069 void spi_write(const void *buf, size_t len);
00070 void spi_read(void *buf, size_t len);
00071 uint8_t spi_sendRecv(uint8_t c);
00072 void spi_init(void);
00073 void spi_assertSS(void);
00074 void spi_deassertSS(void);
00075
00076 #endif /* DRV_SPI_BITBANG_H */


BeRTOS: spi_dma_at91.c File Reference

  • cpu
  • arm
  • drv
Functions
spi_dma_at91.c File Reference

SPI driver with DMA. More...

#include "cfg/cfg_spi_dma.h"
#include "spi_dma_at91.h"
#include "hw/hw_spi_dma.h"
#include <io/kfile.h>
#include <struct/fifobuf.h>
#include <struct/kfile_fifo.h>
#include <drv/timer.h>
#include <cpu/attr.h>
#include <cpu/power.h>
#include <string.h>

Go to the source code of this file.

Functions

void | spi_dma_setclock (uint32_t rate)
Set the clock rate for SPI bus.
void | spi_dma_init (SpiDmaAt91 *spi)
Init DMA SPI driver.

Detailed Description

SPI driver with DMA.

Author:
Francesco Sacchi <batt@develer.com>
Luca Ottaviano <lottaviano@develer.com>

Definition in file spi_dma_at91.c.

Function Documentation

void spi_dma_init ( SpiDmaAt91 * spi )

Init DMA SPI driver.

Parameters:
spi A pointer to a SpiDmaAt91 structure.

Definition at line 132 of file spi_dma_at91.c.

void spi_dma_setclock ( uint32_t rate )

Set the clock rate for SPI bus.

Parameters:
rate The rate you want to set for SPI.

Definition at line 55 of file spi_dma_at91.c.


BeRTOS: spi_dma_at91.c Source File

  • cpu
  • arm
  • drv
spi_dma_at91.c
Go to the documentation of this file.
00001
00039 #include "cfg/cfg_spi_dma.h"
00040
00041 #include "spi_dma_at91.h"
00042 #include "hw/hw_spi_dma.h"
00043
00044 #include <io/kfile.h>
00045 #include <struct/fifobuf.h>
00046 #include <struct/kfile_fifo.h>
00047 #include <drv/timer.h>
00048
00049 #include <cpu/attr.h>
00050 #include <cpu/power.h>
00051
00052 #include <string.h> /* memset */
00053
00054
00055 void spi_dma_setclock(uint32_t rate)
00056 {
00057     SPI0_CSR0 &= ~SPI_SCBR;
00058
00059     ASSERT((uint8_t)DIV_ROUND(CPU_FREQ, rate));
00060     SPI0_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT;
00061 }
00062
00063
00064 static int spi_dma_flush(UNUSED_ARG(struct KFile *, fd))
00065 {
00066     /* Wait for DMA to finish */
00067     while (!(SPI0_SR & BV(SPI_TXBUFE)))
00068         cpu_relax();
00069
00070     /* Wait until last bit has been shifted out */
00071     while (!(SPI0_SR & BV(SPI_TXEMPTY)))
00072         cpu_relax();
00073
00074     return 0;
00075 }
00076
00077 static size_t spi_dma_write(struct KFile *fd, const void *_buf, size_t size)
00078 {
00079     SPI0_PTCR = BV(PDC_TXTDIS);
00080     SPI0_TPR = (reg32_t)_buf;
00081     SPI0_TCR = size;
00082     SPI0_PTCR = BV(PDC_TXTEN);
00083     spi_dma_flush(fd);
00084     return size;
00085 }
00086
00087
00088 /*
00089  * Dummy buffer used to transmit 0xff chars while receiving data.
00090  * This buffer is completetly constant and the compiler should allocate it
00091  * in flash memory.
00092  */
00093 static const uint8_t tx_dummy_buf[CONFIG_SPI_DMA_MAX_RX] = { [0 ... (CONFIG_SPI_DMA_MAX_RX - 1)] = 0xFF };
00094
00095 static size_t spi_dma_read(UNUSED_ARG(struct KFile *, fd), void *_buf, size_t size)
00096 {
00097     size_t count, total_rx = 0;
00098     uint8_t *buf = (uint8_t *)_buf;
00099
00100     while (size)
00101     {
00102         count = MIN(size, (size_t)CONFIG_SPI_DMA_MAX_RX);
00103
00104         SPI0_PTCR = BV(PDC_TXTDIS) | BV(PDC_RXTDIS);
00105
00106         SPI0_RPR = (reg32_t)buf;
00107         SPI0_RCR = count;
00108         SPI0_TPR = (reg32_t)tx_dummy_buf;
00109         SPI0_TCR = count;
00110
00111         /* Avoid reading the previous sent char */
00112         *buf = SPI0_RDR;
00113
00114         /* Start transfer */
00115         SPI0_PTCR = BV(PDC_RXTEN) | BV(PDC_TXTEN);
00116
00117         /* wait for transfer to finish */
00118         while (!(SPI0_SR & BV(SPI_ENDRX)))
00119             cpu_relax();
00120
00121         size -= count;
00122         total_rx += count;
00123         buf += count;
00124     }
00125     SPI0_PTCR = BV(PDC_RXTDIS) | BV(PDC_TXTDIS);
00126
00127     return total_rx;
00128 }
00129
00130 #define SPI_DMA_IRQ_PRIORITY 4
00131
00132 void spi_dma_init(SpiDmaAt91 *spi)
00133 {
00134     /* Disable PIO on SPI pins */
00135     PIOA_PDR = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO);
00136
00137     /* Reset device */
00138     SPI0_CR = BV(SPI_SWRST);
00139
00140     /*
00141      * Set SPI to master mode, fixed peripheral select, chip select directly connected to a peripheral device,
00142      * SPI clock set to MCK, mode fault detection disabled, loopback disable, NPCS0 active, Delay between CS = 0
00143      */
00144     SPI0_MR = BV(SPI_MSTR) | BV(SPI_MODFDIS);
00145
00146     /*
00147      * Set SPI mode.
00148      * At reset clock division factor is set to 0, that is
00149      * *forbidden*. Set SPI clock to minimum to keep it valid.
00150      */
00151     SPI0_CSR0 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT);
00152
00153     /* Disable all irqs */
00154     SPI0_IDR = 0xFFFFFFFF;
00155     /* Enable SPI clock. */
00156     PMC_PCER = BV(SPI0_ID);
00157
00158     /* Enable SPI */
00159     SPI0_CR = BV(SPI_SPIEN);
00160
00161     DB(spi->fd._type = KFT_SPIDMAAT91);
00162     spi->fd.write = spi_dma_write;
00163     spi->fd.read = spi_dma_read;
00164     spi->fd.flush = spi_dma_flush;
00165
00166     SPI_DMA_STROBE_INIT();
00167 }


BeRTOS: spi_dma_at91.h File Reference

  • cpu
  • arm
  • drv
Functions
spi_dma_at91.h File Reference

SPI driver with DMA. More...

#include <io/kfile.h>

Go to the source code of this file.

Functions

void | spi_dma_init (SpiDmaAt91 *spi)
Init DMA SPI driver.
void | spi_dma_setclock (uint32_t rate)
Set the clock rate for SPI bus.

Detailed Description

SPI driver with DMA.

Note:
Only one copy of SpiDmaAt91 is allowed for each application.
Author:
Francesco Sacchi <batt@develer.com>
Luca Ottaviano <lottaviano@develer.com>

Definition in file spi_dma_at91.h.

Function Documentation

void spi_dma_init ( SpiDmaAt91 * spi )

Init DMA SPI driver.

Parameters:
spi A pointer to a SpiDmaAt91 structure.

Definition at line 132 of file spi_dma_at91.c.

void spi_dma_setclock ( uint32_t rate )

Set the clock rate for SPI bus.

Parameters:
rate The rate you want to set for SPI.

Definition at line 55 of file spi_dma_at91.c.


BeRTOS: spi_dma_at91.h Source File

  • cpu
  • arm
  • drv
spi_dma_at91.h
Go to the documentation of this file.
00001
00041 #ifndef DRV_SPI_DMA_AT91_H
00042 #define DRV_SPI_DMA_AT91_H
00043
00044 #include <io/kfile.h>
00045
00046 typedef struct SpiDmaAt91
00047 {
00048     KFile fd;
00049 } SpiDmaAt91;
00050
00051 #define KFT_SPIDMAAT91 MAKE_ID('S', 'P', 'I', 'A')
00052
00053 INLINE SpiDmaAt91 * SPIDMAAT91_CAST(KFile *fd)
00054 {
00055   ASSERT(fd->_type == KFT_SPIDMAAT91);
00056   return (SpiDmaAt91 *)fd;
00057 }
00058
00063 void spi_dma_init(SpiDmaAt91 *spi);
00064
00070 void spi_dma_setclock(uint32_t rate);
00071
00072 #endif /* DRV_SPI_DMA_AT91_H */


BeRTOS: sprintf.c File Reference

  • mware
Data Structures | Functions
sprintf.c File Reference

sprintf() implementation based on _formatted_write() More...

#include <mware/formatwr.h>
#include <cpu/pgm.h>
#include <cfg/compiler.h>
#include <stdio.h>

Go to the source code of this file.

Data Structures

struct | __sn_state
State information for __sn_put_char() More...

Functions

static void | __sn_put_char (char c, void *ptr)
formatted_write() callback used [v]snprintf().

Detailed Description

sprintf() implementation based on _formatted_write()

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file sprintf.c.


BeRTOS: sprintf.c Source File

  • mware
sprintf.c
Go to the documentation of this file.
00001
00042 #include <mware/formatwr.h>
00043 #include <cpu/pgm.h>
00044 #include <cfg/compiler.h>
00045
00046 #include <stdio.h>
00047
00048
00049 static void __str_put_char(char c, void *ptr)
00050 {
00051     /*
00052      * This Does not work on Code Warrior. Hmm...
00053      *  *(*((char **)ptr))++ = c;
00054      */
00055
00056     **((char **)ptr) = c;
00057     (*((char **)ptr))++;
00058 }
00059
00060 static void __null_put_char(UNUSED_ARG(char, c), UNUSED_ARG(void *, ptr))
00061 {
00062     /* nop */
00063 }
00064
00065
00066 int PGM_FUNC(vsprintf)(char *str, const char * PGM_ATTR fmt, va_list ap)
00067 {
00068     int result;
00069
00070     if (str)
00071     {
00072         result = PGM_FUNC(_formatted_write)(fmt, __str_put_char, &str, ap);
00073
00074         /* Terminate string */
00075         *str = '\0';
00076     }
00077     else
00078         result = PGM_FUNC(_formatted_write)(fmt, __null_put_char, 0, ap);
00079
00080
00081     return result;
00082 }
00083
00084
00085 int PGM_FUNC(sprintf)(char *str, const char * fmt, ...)
00086 {
00087     int result;
00088     va_list ap;
00089
00090     va_start(ap, fmt);
00091     result = PGM_FUNC(vsprintf)(str, fmt, ap);
00092     va_end(ap);
00093
00094     return result;
00095 }
00096
00100 struct __sn_state
00101 {
00102     char *str;
00103     size_t len;
00104 };
00105
00109 static void __sn_put_char(char c, void *ptr)
00110 {
00111     struct __sn_state *state = (struct __sn_state *)ptr;
00112
00113     if (state->len)
00114     {
00115         --state->len;
00116         *state->str++ = c;
00117     }
00118 }
00119
00120
00121 int PGM_FUNC(vsnprintf)(char *str, size_t size, const char * PGM_ATTR fmt, va_list ap)
00122 {
00123     int result = 0;
00124
00125     /* Make room for traling '\0'. */
00126     if (size--)
00127     {
00128         if (str)
00129         {
00130             struct __sn_state state;
00131             state.str = str;
00132             state.len = size;
00133
00134             result = PGM_FUNC(_formatted_write)(fmt, __sn_put_char, &state, ap);
00135
00136             /* Terminate string. */
00137             *state.str = '\0';
00138         }
00139         else
00140             result = PGM_FUNC(_formatted_write)(fmt, __null_put_char, 0, ap);
00141     }
00142
00143     return result;
00144 }
00145
00146
00147 int PGM_FUNC(snprintf)(char *str, size_t size, const char * fmt, ...)
00148 {
00149     int result;
00150     va_list ap;
00151
00152     va_start(ap, fmt);
00153     result = PGM_FUNC(vsnprintf)(str, size, fmt, ap);
00154     va_end(ap);
00155
00156     return result;
00157 }


BeRTOS: ssi_lm3s.c File Reference

  • cpu
  • cortex-m3
  • drv
Functions
ssi_lm3s.c File Reference

LM3S1968 Synchronous Serial Interface (SSI) driver. More...

#include "ssi_lm3s.h"
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <string.h>

Go to the source code of this file.

Functions

void lm3s_ssiInit (struct LM3SSSI *fds, uint32_t addr, uint32_t frame, int mode, int bitrate, uint32_t data_width)
Initialize a LM3S SSI driver.

Detailed Description

LM3S1968 Synchronous Serial Interface (SSI) driver.

Author:
Andrea Righi <arighi@develer.com>

Definition in file ssi_lm3s.c.


BeRTOS: ssi_lm3s.c Source File

  • cpu
  • cortex-m3
  • drv
ssi_lm3s.c
Go to the documentation of this file.
00001
00039 #include "ssi_lm3s.h"
00040
00041 #include <cfg/compiler.h>
00042 #include <cfg/debug.h>
00043
00044 #include <string.h> /* memset() */
00045
00046 /* SSI clocking informations (CPSDVSR + SCR) */
00047 struct SSIClock
00048 {
00049     unsigned int cpsdvsr;
00050     unsigned int scr;
00051 };
00052
00053 /*
00054  * Evaluate the SSI clock prescale (SSICPSR) and SSI serial clock rate (SCR).
00055  */
00056 INLINE struct SSIClock
00057 lm3s_ssiPrescale(unsigned int bitrate)
00058 {
00059     struct SSIClock ret;
00060
00061     for (ret.cpsdvsr = 2, ret.scr = CPU_FREQ / bitrate / ret.cpsdvsr - 1;
00062             ret.scr > 255; ret.cpsdvsr += 2);
00063     ASSERT(ret.cpsdvsr < 255);
00064
00065     return ret;
00066 }
00067
00068 /*
00069  * Initialize the SSI interface.
00070  *
00071  * Return 0 in case of success, a negative value otherwise.
00072  */
00073 int lm3s_ssiOpen(uint32_t addr, uint32_t frame, int mode,
00074             int bitrate, uint32_t data_width)
00075 {
00076     struct SSIClock ssi_clock;
00077
00078     ASSERT(addr == SSI0_BASE || addr == SSI1_BASE);
00079     /* Configure the SSI operating mode */
00080     switch (mode)
00081     {
00082         /* SSI Slave Mode Output Disable */
00083         case SSI_MODE_SLAVE_OD:
00084             HWREG(addr + SSI_O_CR1) = SSI_CR1_SOD;
00085             break;
00086         /* SSI Slave */
00087         case SSI_MODE_SLAVE:
00088             HWREG(addr + SSI_O_CR1) = SSI_CR1_MS;
00089             break;
00090         /* SSI Master */
00091         case SSI_MODE_MASTER:
00092             HWREG(addr + SSI_O_CR1) = 0;
00093             break;
00094         default:
00095             ASSERT(0);
00096             return -1;
00097     }
00098     /* Configure the peripheral clock and frame format */
00099     ssi_clock = lm3s_ssiPrescale(bitrate);
00100     HWREG(addr + SSI_O_CPSR) = ssi_clock.cpsdvsr;
00101     HWREG(addr + SSI_O_CR0) =
00102             (ssi_clock.scr << 8)        |
00103             ((frame & 3) << 6)      |
00104             (frame & SSI_CR0_FRF_M)     |
00105             (data_width - 1);
00106     /* Enable the SSI interface */
00107     HWREG(addr + SSI_O_CR1) |= SSI_CR1_SSE;
00108
00109     return 0;
00110 }
00111
00112 /*
00113  * Write data to the SSI bus.
00114  *
00115  * Return the number of bytes written to the bus.
00116  */
00117 static size_t lm3s_ssiWrite(struct KFile *fd, const void *buf, size_t size)
00118 {
00119     LM3SSSI *fds = LM3SSSI_CAST(fd);
00120     const char *p = (const char *)buf;
00121     uint32_t frame;
00122     size_t count = 0;
00123
00124     while (count < size)
00125     {
00126         frame = p[count];
00127         if (fds->flags & LM3S_SSI_NONBLOCK)
00128         {
00129             if (!lm3s_ssiWriteFrameNonBlocking(fds->addr,
00130                                 frame))
00131                 break;
00132         }
00133         else
00134             lm3s_ssiWriteFrame(fds->addr, frame);
00135         count++;
00136     }
00137     return count;
00138 }
00139
00140 /*
00141  * Read data from the SSI bus.
00142  *
00143  * Return the number of bytes read from the bus.
00144  */
00145 static size_t lm3s_ssiRead(struct KFile *fd, void *buf, size_t size)
00146 {
00147     LM3SSSI *fds = LM3SSSI_CAST(fd);
00148
00149     uint8_t *p = (uint8_t *)buf;
00150     uint32_t frame;
00151     size_t count = 0;
00152
00153     while (count < size)
00154     {
00155         if (fds->flags & LM3S_SSI_NONBLOCK)
00156         {
00157             if (!lm3s_ssiReadFrameNonBlocking(fds->addr, &frame))
00158                 break;
00159         }
00160         else
00161             lm3s_ssiReadFrame(fds->addr, &frame);
00162         *p++ = (uint8_t)frame;
00163         count++;
00164     }
00165     return count;
00166 }
00167
00168
00169 /* Wait for data in the TX FIFO being actually transmitted */
00170 static int lm3s_ssiFlush(struct KFile *fd)
00171 {
00172     LM3SSSI *fds = LM3SSSI_CAST(fd);
00173
00174     while (!lm3s_ssiTxDone(fds->addr))
00175         cpu_relax();
00176     return 0;
00177 }
00178
00179 /* Disable the SSI interface */
00180 static int lm3s_ssiClose(struct KFile *fd)
00181 {
00182     LM3SSSI *fds = LM3SSSI_CAST(fd);
00183
00184     lm3s_ssiFlush(fd);
00185     HWREG(fds->addr + SSI_O_CR1) &= ~SSI_CR1_SSE;
00186     return 0;
00187 }
00188
00192 void lm3s_ssiInit(struct LM3SSSI *fds, uint32_t addr, uint32_t frame, int mode,
00193             int bitrate, uint32_t data_width)
00194 {
00195     memset(fds, 0, sizeof(*fds));
00196     DB(fds->fd._type = KFT_LM3SSSI);
00197
00198     /* TODO: only 8-bit frame size is supported */
00199     ASSERT(data_width == 8);
00200
00201     fds->fd.write = lm3s_ssiWrite;
00202     fds->fd.read = lm3s_ssiRead;
00203     fds->fd.close = lm3s_ssiClose;
00204     fds->fd.flush = lm3s_ssiFlush;
00205
00206     fds->addr = addr;
00207     lm3s_ssiOpen(addr, frame, mode, bitrate, data_width);
00208 }


BeRTOS: ssi_lm3s.h File Reference

  • cpu
  • cortex-m3
  • drv
Data Structures | Defines | Functions
ssi_lm3s.h File Reference

LM3S1968 Synchronous Serial Interface (SSI) driver. More...

#include <cpu/power.h>
#include <io/kfile.h>
#include <io/lm3s.h>

Go to the source code of this file.

Data Structures

struct | LM3SSSI
LM3S1968 SSI handle structure. More...

Defines

#define | KFT_LM3SSSI MAKE_ID('L', 'S', 'S', 'I')
ID for LM3S SSI.
#define | SSI_FRF_MOTO_MODE_0 0x00000000
LM3S1968 SSI frame format.
#define | SSI_FRF_MOTO_MODE_1 0x00000002
LM3S1968 SSI frame format.
#define | SSI_FRF_MOTO_MODE_2 0x00000001
LM3S1968 SSI frame format.
#define | SSI_FRF_MOTO_MODE_3 0x00000003
LM3S1968 SSI frame format.
#define | SSI_FRF_TI 0x00000010
LM3S1968 SSI frame format.
#define | SSI_FRF_NMW 0x00000020
LM3S1968 SSI frame format.
#define | SSI_MODE_MASTER 0x00000000
LM3S1968 SSI operational mode.
#define | SSI_MODE_SLAVE 0x00000001
LM3S1968 SSI operational mode.
#define | SSI_MODE_SLAVE_OD 0x00000002
LM3S1968 SSI operational mode.

Functions

void | lm3s_ssiInit (struct LM3SSSI *fds, uint32_t addr, uint32_t frame, int mode, int bitrate, uint32_t data_width)
Initialize a LM3S SSI driver.

Detailed Description

LM3S1968 Synchronous Serial Interface (SSI) driver.

Definition in file ssi_lm3s.h.


BeRTOS: ssi_lm3s.h Source File

  • cpu
  • cortex-m3
  • drv
ssi_lm3s.h
Go to the documentation of this file.
00001
00037 #ifndef SSI_LM3S_H
00038 #define SSI_LM3S_H
00039
00040 #include <cpu/power.h> /* cpu_relax() */
00041 #include <io/kfile.h> /* KFile */
00042 #include <io/lm3s.h>
00043
00047 /*\{*/
00048 #define SSI_FRF_MOTO_MODE_0     0x00000000  //< Moto fmt, polarity 0, phase 0
00049 #define SSI_FRF_MOTO_MODE_1     0x00000002  //< Moto fmt, polarity 0, phase 1
00050 #define SSI_FRF_MOTO_MODE_2     0x00000001  //< Moto fmt, polarity 1, phase 0
00051 #define SSI_FRF_MOTO_MODE_3     0x00000003  //< Moto fmt, polarity 1, phase 1
00052 #define SSI_FRF_TI              0x00000010  //< TI frame format
00053 #define SSI_FRF_NMW             0x00000020  //< National MicroWire frame format
00054 /*\}*/
00055
00059 /*\{*/
00060 #define SSI_MODE_MASTER         0x00000000  //< SSI master
00061 #define SSI_MODE_SLAVE          0x00000001  //< SSI slave
00062 #define SSI_MODE_SLAVE_OD       0x00000002  //< SSI slave with output disabled
00063 /*\}*/
00064
00065 /* LM3S SSI handle properties */
00066 enum
00067 {
00068     /* Non-blocking I/O */
00069     LM3S_SSI_NONBLOCK = 1,
00070 };
00071
00073 typedef struct LM3SSSI
00074 {
00075     /* SSI Kfile structure */
00076     KFile fd;
00077
00078     /* Handle properties */
00079     uint32_t flags;
00080
00081     /* SSI port address */
00082     uint32_t addr;
00083 } LM3SSSI;
00084
00088 #define KFT_LM3SSSI MAKE_ID('L', 'S', 'S', 'I')
00089
00090 INLINE LM3SSSI *LM3SSSI_CAST(KFile *fd)
00091 {
00092     ASSERT(fd->_type == KFT_LM3SSSI);
00093     return (LM3SSSI *)fd;
00094 }
00095
00096 /* KFile interface to LM3S SSI */
00097 void lm3s_ssiInit(struct LM3SSSI *fds, uint32_t addr, uint32_t frame, int mode,
00098             int bitrate, uint32_t data_width);
00099
00100 /* Raw interface to LM3S SSI */
00101 int lm3s_ssiOpen(uint32_t addr, uint32_t frame, int mode,
00102             int bitrate, uint32_t data_width);
00103
00104 /*
00105  * Check if the SSI transmitter is busy or not
00106  *
00107  * This allows to determine whether the TX FIFO have been cleared by the
00108  * hardware, so the transmission can be safely considered completed.
00109  */
00110 INLINE bool lm3s_ssiTxDone(uint32_t base)
00111 {
00112     return (HWREG(base + SSI_O_SR) & SSI_SR_BSY) ? true : false;
00113 }
00114
00115 /*
00116  * Check if the SSI TX FIFO is full
00117  */
00118 INLINE bool lm3s_ssiTxReady(uint32_t base)
00119 {
00120     return (HWREG(base + SSI_O_SR) & SSI_SR_TNF) ? true : false;
00121 }
00122
00123 /*
00124  * Check for data available in the RX FIFO
00125  */
00126 INLINE bool lm3s_ssiRxReady(uint32_t base)
00127 {
00128     return (HWREG(base + SSI_O_SR) & SSI_SR_RNE) ? true : false;
00129 }
00130
00131 /*
00132  * Get a frame into the SSI receive FIFO without blocking.
00133  *
00134  * Return the number of frames read from the RX FIFO.
00135  */
00136 INLINE int lm3s_ssiReadFrameNonBlocking(uint32_t base, uint32_t *val)
00137 {
00138     /* Check for data available in the RX FIFO */
00139     if (!lm3s_ssiRxReady(base))
00140         return 0;
00141     /* Read data from SSI RX FIFO */
00142     *val = HWREG(base + SSI_O_DR);
00143     return 1;
00144 }
00145
00146 /*
00147  * Get a frame from the SSI receive FIFO.
00148  */
00149 INLINE void lm3s_ssiReadFrame(uint32_t base, uint32_t *val)
00150 {
00151     /* Wait for data available in the RX FIFO */
00152     while (!lm3s_ssiRxReady(base))
00153         cpu_relax();
00154     /* Read data from SSI RX FIFO */
00155     *val = HWREG(base + SSI_O_DR);
00156 }
00157
00158 /*
00159  * Put a frame into the SSI transmit FIFO without blocking.
00160  *
00161  * NOTE: the upper bits of the frame will be automatically discarded by the
00162  * hardware according to the frame data width.
00163  *
00164  * Return the number of frames written to the TX FIFO.
00165  */
00166 INLINE int lm3s_ssiWriteFrameNonBlocking(uint32_t base, uint32_t val)
00167 {
00168     /* Check for available space in the TX FIFO */
00169     if (!lm3s_ssiTxReady(base))
00170         return 0;
00171     /* Enqueue data to the TX FIFO */
00172     HWREG(base + SSI_O_DR) = val;
00173     return 1;
00174 }
00175
00176 /*
00177  * Put a frame into the SSI transmit FIFO.
00178  *
00179  * NOTE: the upper bits of the frame will be automatically discarded by the
00180  * hardware according to the frame data width.
00181  */
00182 INLINE void lm3s_ssiWriteFrame(uint32_t base, uint32_t val)
00183 {
00184     /* Wait for available space in the TX FIFO */
00185     while (!lm3s_ssiTxReady(base))
00186         cpu_relax();
00187     /* Enqueue data to the TX FIFO */
00188     HWREG(base + SSI_O_DR) = val;
00189 }
00190
00191 #endif /* SSI_LM3S_H */


BeRTOS: STATUS Source File

  • doc
STATUS
00001 ﻿


BeRTOS: stepper.c File Reference

  • drv
Functions | Variables
stepper.c File Reference

Driver to control stepper motor. More...

#include "stepper.h"
#include "hw/hw_stepper.h"
#include "hw/hw_sensor.h"
#include "cfg/cfg_stepper.h"
#include <cfg/debug.h>
#include <cfg/log.h>
#include <kern/proc.h>
#include <algo/ramp.h>
#include <PP_STRINGIZE(drv/PP_CAT3(stepper, _, CPU_ID).h)>
#include <string.h>

Go to the source code of this file.

Defines

Motor timings
#define | MOTOR_SWITCH_TICKS 60000
Timer ticks to wait for 10ms.
#define | MOTOR_SWITCH_COUNT 5
Number of intervals, long 10ms, to wait before/after switching current off/on.
#define | MOTOR_HOME_MAX_STEPS 30000
Steps before giving up when trying to reach home.
#define | MOTOR_CURRENT_TICKS 6000
Number of intervals, long 10ms, to mantain high current.

Functions

void FAST_FUNC | stepper_schedule_irq (struct Stepper *motor, stepper_time_t delay, bool do_step)
Schedule a new stepper IRQ to happen after delay (number of clocks), and optionally doing a step at the same time (if do_step is true).
void | stepper_init (void)
Initialize the stepper module.
struct Stepper * | stepper_setup (int index, struct StepperConfig *cfg)
Apply a setup config to motor structure context.
void | stepper_disable (void)
Set the enable for all the motors to 0 before switching on the power.
void | stepper_reset (struct Stepper *motor)
Reset the motor.
void | stepper_home (struct Stepper *motor)
Find the home of a motor assuming no current knowledge about its position.
int16_t | stepper_move (struct Stepper *motor, int16_t steps, uint16_t speed, int16_t deafstep)
Move motor to absolute position at specified speed.
void | stepper_stop (struct Stepper *motor)
Stop motor gracefully.
void | stepper_break (struct Stepper *motor, enum StepperState state)
Stop motor immediately, changing the status.
bool | stepper_idle (struct Stepper *motor)
Returns true if the stepper is in error mode.
bool | stepper_error (struct Stepper *motor)
check the home sensor in zero position

Variables

static struct Stepper | all_motors [CONFIG_NUM_STEPPER_MOTORS]
< Stepper motors

Detailed Description

Driver to control stepper motor.

Author:
Francesco Michelini <francesco.michelini@seacfi.com>
Giovanni Bajo <rasky@develer.com>
Bernie Innocenti <bernie@codewiz.org>
Simone Zinanni <s.zinanni@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file stepper.c.

Function Documentation

void stepper_break | ( | struct Stepper * | motor,
 |  | enum StepperState | state
 | ) |  |

Stop motor immediately, changing the status.

Returns true if the stepper is in idle at the final position or in error:

Definition at line 946 of file stepper.c.

void stepper_home ( struct Stepper * motor )

Find the home of a motor assuming no current knowledge about its position.

This must be done when the motor is desynchronized with the firmware and we do not know anymore where it is.

In normal operation mode, to go back to the home, it is sufficient to use move to step #0 with stepper_move, since the home is always at step #0.

Definition at line 765 of file stepper.c.

int16_t stepper_move | ( | struct Stepper * | motor,
 |  | int16_t | steps,
 |  | uint16_t | speed,
 |  | int16_t | deafstep
 | ) |  |

Move motor to absolute position at specified speed.

  • steps position to reach in steps
  • speed speed in timer ticks (use TIME2CLOCKS() to convert)

Definition at line 887 of file stepper.c.

Variable Documentation

struct Stepper all_motors[CONFIG_NUM_STEPPER_MOTORS] [static]

< Stepper motors

General FSM states (or NULL if state is not handled)

Definition at line 73 of file stepper.c.


BeRTOS: stepper.c Source File

  • drv
stepper.c
Go to the documentation of this file.
00001
00041 #include "stepper.h"
00042
00043 #include "hw/hw_stepper.h"
00044 #include "hw/hw_sensor.h"
00045
00046 #include "cfg/cfg_stepper.h"
00047 #include <cfg/debug.h>
00048
00049 // Define logging setting (for cfg/log.h module).
00050 #define LOG_LEVEL   STEPPER_LOG_LEVEL
00051 #define LOG_FORMAT  STEPPER_LOG_FORMAT
00052 #include <cfg/log.h>
00053
00054 #include <kern/proc.h>
00055
00056 #include <algo/ramp.h>
00057
00058 #include CPU_HEADER(stepper)
00059
00060 #include <string.h>  // memset
00061
00066 #define MOTOR_SWITCH_TICKS      60000   ///< Timer ticks to wait for 10ms
00067 #define MOTOR_SWITCH_COUNT          5   ///< Number of intervals, long 10ms, to wait before/after switching current off/on
00068 #define MOTOR_HOME_MAX_STEPS    30000   ///< Steps before giving up when trying to reach home
00069 #define MOTOR_CURRENT_TICKS      6000   ///< Number of intervals, long 10ms, to mantain high current
00070 // \}
00071
00073 static struct Stepper all_motors[CONFIG_NUM_STEPPER_MOTORS];
00074
00076 static fsm_state general_states[STEPPER_MAX_STATES];
00077
00078 // IRQ functions for stepper motors
00079 static void stepper_interrupt(struct Stepper *motor);
00080
00081 static void stepper_accel(struct Stepper *motor);
00082 static void stepper_decel(struct Stepper *motor);
00083
00084 static bool stepper_isState(struct Stepper *motor, enum StepperState state);
00085 INLINE void stepper_changeState(struct Stepper *motor, enum StepperState newState);
00086
00087 static void stepper_enableCheckHome(struct Stepper *motor, bool bDirPositive);
00088
00089 #define MOTOR_INDEX(motor)     (motor->index)
00090
00091 //------------------------------------------------------------------------
00092
00093 INLINE bool setLowCurrent(struct Stepper* motor)
00094 {
00095     if (motor->power == motor->cfg->powerIdle)
00096         return false;
00097
00098     motor->power = motor->cfg->powerIdle;
00099     STEPPER_SET_POWER_CURRENT(MOTOR_INDEX(motor), motor->cfg->powerIdle);
00100
00101     return true;
00102 }
00103
00104 INLINE bool setHighCurrent(struct Stepper* motor)
00105 {
00106     if (motor->power == motor->cfg->powerRun)
00107         return false;
00108
00109     motor->power = motor->cfg->powerRun;
00110     STEPPER_SET_POWER_CURRENT(MOTOR_INDEX(motor), motor->cfg->powerRun);
00111     return true;
00112 }
00113
00114 INLINE void setCheckSensor(struct Stepper* motor, enum MotorHomeSensorCheck value)
00115 {
00116     motor->enableCheckHome = value;
00117 }
00118
00119 INLINE int8_t getCheckSensor(struct Stepper* motor)
00120 {
00121     return motor->enableCheckHome;
00122 }
00123
00124 INLINE void setDirection(struct Stepper* motor, enum MotorDirection dir)
00125 {
00126     ASSERT(dir == DIR_POSITIVE || dir == DIR_NEGATIVE);
00127     motor->dir = dir;
00128
00129     if (!motor->cfg->flags.axisInverted)
00130     {
00131         STEPPER_SET_DIRECTION(MOTOR_INDEX(motor), (dir == DIR_POSITIVE));
00132     }
00133     else
00134     {
00135         STEPPER_SET_DIRECTION(MOTOR_INDEX(motor), (dir != DIR_POSITIVE));
00136     }
00137 }
00138
00143 INLINE void FAST_FUNC stepper_schedule_irq(struct Stepper* motor, stepper_time_t delay, bool do_step)
00144 {
00145
00146     if (do_step)
00147     {
00148         // Record the step we just did
00149         motor->step += motor->dir;
00150         stepper_tc_doPulse(motor->timer);
00151     }
00152     else
00153         stepper_tc_skipPulse(motor->timer);
00154
00155     stepper_tc_setDelay(motor->timer, delay);
00156 }
00157
00158
00159 static void stepper_accel(struct Stepper *motor)
00160 {
00161     DB(uint16_t old_val = motor->rampValue;)
00162     DB(uint32_t old_clock = motor->rampClock;)
00163
00164     const struct Ramp *ramp = &motor->cfg->ramp;
00165
00166     ASSERT(motor->rampClock != 0);
00167
00168     motor->rampValue = ramp_evaluate(ramp, motor->rampClock);
00169     motor->rampClock += motor->rampValue;
00170     motor->rampStep++;
00171
00172     DB(if (old_val && motor->rampValue > old_val)
00173     {
00174         LOG_ERR("Runtime ramp error: (max=%x, min=%x)\n", ramp->clocksMaxWL, ramp->clocksMinWL);
00175         LOG_ERR("    %04x @ %lu   -->   %04x @ %lu\n", old_val, old_clock, motor->rampValue, motor->rampClock);
00176     })
00177
00178 }
00179
00180 static void stepper_decel(struct Stepper *motor)
00181 {
00182     const struct Ramp *ramp = &motor->cfg->ramp;
00183     DB(uint16_t old_val = motor->rampValue;)
00184
00185     motor->rampClock -= motor->rampValue;
00186     ASSERT(motor->rampClock != 0);
00187     motor->rampValue = ramp_evaluate(ramp, motor->rampClock);
00188     motor->rampStep--;
00189     DB(ASSERT(!old_val || motor->rampValue >= old_val););
00190 }
00191
00192 INLINE void stepper_enable_irq(struct Stepper* motor)
00193 {
00194     stepper_tc_irq_enable(motor->timer);
00195 }
00196
00197 INLINE void stepper_disable_irq(struct Stepper* motor)
00198 {
00199     stepper_tc_irq_disable(motor->timer);
00200 }
00201
00202 // the home sensor can be in the standard home list or in the digital
00203 // sensor list
00204 bool stepper_readHome(struct Stepper* motor)
00205 {
00206     return (motor->cfg->homeSensorIndex < NUM_HOME_SENSORS) ?
00207         hw_home_sensor_read(motor->cfg->homeSensorIndex) :
00208         bld_hw_sensor_read(motor->cfg->homeSensorIndex - NUM_HOME_SENSORS);
00209 }
00210
00211 bool stepper_readLevel(struct Stepper* motor)
00212 {
00213     return hw_level_sensor_read(motor->cfg->levelSensorIndex);
00214 }
00215
00216 /************************************************************************/
00217 /* Finite-state machine to drive stepper logic from IRQ                 */
00218 /************************************************************************/
00219
00220 INLINE void stepper_changeState(struct Stepper* motor, enum StepperState newState)
00221 {
00222     ASSERT(newState < STEPPER_MAX_STATES);
00223
00224     motor->state = motor->cfg->states[newState];
00225     if (!motor->state)
00226         motor->state = general_states[newState];
00227     ASSERT(motor->state);
00228 }
00229
00230 static bool stepper_isState(struct Stepper* motor, enum StepperState state)
00231 {
00232     return (motor->cfg->states[state]
00233             ? motor->cfg->states[state] == motor->state
00234             : general_states[state] == motor->state);
00235 }
00236
00237 static bool stepper_checkHomeErrors(struct Stepper* motor)
00238 {
00239     bool home;
00240
00241     home = stepper_readHome(motor);
00242
00243     if (motor->enableCheckHome == MOTOR_HOMESENSOR_INCHECK && home
00244         && (!motor->stepCircular || motor->step < motor->stepCircular / 2))
00245         /*
00246         * if home Sensor check enabled in movement to 0 position and
00247         * the motor is in home increase the counter
00248         * for rotating motor we include the check that the motor is
00249         * inside the last "lap" (FIXME: check it better)
00250         */
00251         motor->stepsErrorHome++;
00252     else if (motor->enableCheckHome == MOTOR_HOMESENSOR_OUTCHECK && !home)
00253         /*
00254         * if home Sensor check enabled in movement from 0 position and
00255         * the motor is not in home increase the counter
00256         */
00257         motor->stepsErrorHome++;
00258     else
00259         // clear error steps counter
00260         motor->stepsErrorHome = 0;
00261
00262     // if this is the last consecutive position in which the motor is in/out home ...
00263     ASSERT(motor->stepsErrorHome <= MOTOR_CONSECUTIVE_ERROR_STEPS);
00264     if (motor->stepsErrorHome >= MOTOR_CONSECUTIVE_ERROR_STEPS)
00265     {
00266         // if the position at which the motor first saw/didn't see the home
00267         // is out of tolerance -> breakmotor -> ERROR
00268         if (motor->step > motor->stepsTollMax || motor->step < motor->stepsTollMin )
00269         {
00270             // break motor and error
00271             motor->speed = SPEED_STOPPED;
00272             motor->stepToReach = motor->step;
00273
00274             stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false);
00275             motor->skipIrqs = MOTOR_SWITCH_COUNT;
00276             return false;
00277         }
00278
00279         // the motor reached the home crossing -> disable error check
00280         setCheckSensor(motor, MOTOR_HOMESENSOR_NOCHECK);
00281     }
00282
00283     return true;
00284 }
00285
00286 static void stepper_checkLevelSensor(struct Stepper* motor)
00287 {
00288     // level sensor check
00289     if (motor->step > motor->stepsDeaf)
00290     {
00291         if (stepper_readLevel(motor))
00292         {
00293             // record current position, disable check and stop motor
00294             motor->stepsDeaf = DEAFSTEPS_DEFAULT;
00295             motor->stepsLevel = motor->step;
00296                         //motor->stepToReach = motor->step + motor->rampStep * motor->dir;
00297
00298             motor->stepToReach = motor->step;
00299             motor->rampClock = motor->cfg->ramp.clocksMaxWL;
00300             motor->rampValue = motor->cfg->ramp.clocksMaxWL;
00301         }
00302     }
00303 }
00304
00305 static enum StepperState FAST_FUNC FSM_run(struct Stepper *motor)
00306 {
00307     uint16_t distance;
00308
00309     if (!stepper_checkHomeErrors(motor))
00310         return MSTS_ERROR;
00311
00312     stepper_checkLevelSensor(motor);
00313
00314     if ((motor->stepToReach != STEPS_INFINITE_POSITIVE) &&
00315         (motor->stepToReach != STEPS_INFINITE_NEGATIVE ))
00316     {
00317         // Calculate (always positive) distance between current position and destination step
00318         distance = (uint16_t)((motor->stepToReach - motor->step) * motor->dir);
00319     }
00320     else
00321     {
00322         // We're at a very long distance ;-)
00323         distance = 0xFFFF;
00324         // if the motor is rotating and it has just ran a complete round
00325         // the position is set to 0
00326         if(motor->step == motor->stepCircular)
00327             motor->step = 0;
00328     }
00329
00330     if (distance == 0)
00331         // Position reached - stop motor
00332         //motor->speed = SPEED_STOPPED;
00333         motor->rampStep = -1;
00334         //motor->rampClock = motor->ramp->clocksMaxWL;
00335         //motor->rampValue = 0;
00336         //motor->rampClock = motor->rampValue = motor->ramp->clocksMaxWL;
00337
00338     else if (distance <= (uint16_t)motor->rampStep)
00339         stepper_decel(motor);
00340
00341     // check whether the velocity must be changed
00342     else if (motor->speed < (uint16_t)motor->rampValue)
00343     {
00344         stepper_accel(motor);
00345         if (motor->speed > (uint16_t)motor->rampValue)
00346             motor->speed = (uint16_t)motor->rampValue;
00347     }
00348     else if (motor->speed > (uint16_t)motor->rampValue)
00349         stepper_decel(motor);
00350
00351     // If rampStep == -1, leave output pin high and wait for low current
00352     if (motor->rampStep < 0)
00353     {
00354         // Wait before switching to low current
00355         motor->speed = SPEED_STOPPED;
00356
00357         stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false);
00358         motor->skipIrqs = MOTOR_SWITCH_COUNT;
00359
00360         /*
00361          * If there was a home sensor check activated, and the check has not
00362          * been done yet, it means that we reached the end position without
00363          * finding the home (or exiting from it). This is bad!
00364          */
00365         if (motor->enableCheckHome != MOTOR_HOMESENSOR_NOCHECK)
00366             return MSTS_ERROR;
00367
00368         // check if the motor has to stay in high current
00369         if(motor->cfg->flags.highcurrentBit)
00370         {
00371             motor->changeCurrentIrqs = MOTOR_CURRENT_TICKS;
00372             return MSTS_IDLE;
00373         }
00374
00375         return MSTS_PREIDLE;
00376     }
00377
00378     // Wait for high->low transition
00379     ASSERT(motor->rampValue > motor->cfg->pulse);
00380     stepper_schedule_irq(motor, motor->rampValue, true);
00381
00382     return MSTS_RUN;
00383 }
00384
00385 static enum StepperState FSM_idle(struct Stepper* motor)
00386 {
00387     stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false);
00388
00389     if (motor->speed == SPEED_STOPPED)
00390     {
00391         // check if it's time to switch to low current
00392         if(motor->changeCurrentIrqs > 0)
00393         {
00394             if(--motor->changeCurrentIrqs == 0)
00395                 setLowCurrent(motor);
00396         }
00397         return MSTS_IDLE;
00398     }
00399
00400     // Switch to high current and wait for stabilization
00401     // (if the motor is in low current)
00402     if(motor->changeCurrentIrqs == 0)
00403     {
00404         setHighCurrent(motor);
00405         motor->skipIrqs = MOTOR_SWITCH_COUNT;
00406     }
00407
00408     return MSTS_PRERUN;
00409 }
00410
00411 static enum StepperState FSM_preidle(struct Stepper* motor)
00412 {
00413     // Normal operation mode
00414     motor->changeCurrentIrqs = 0;
00415     setLowCurrent(motor);
00416     stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false);
00417     return MSTS_IDLE;
00418 }
00419
00420 static enum StepperState FSM_error(struct Stepper* motor)
00421 {
00422     // Error condition mode
00423     setLowCurrent(motor);
00424     stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false);
00425     return MSTS_ERROR;
00426 }
00427
00428 static enum StepperState FSM_prerun(struct Stepper* motor)
00429 {
00430     enum MotorDirection dir;
00431
00432     // distance != 0?
00433     if ((motor->stepToReach != motor->step) ||
00434         (motor->stepToReach == STEPS_INFINITE_POSITIVE) ||
00435         (motor->stepToReach == STEPS_INFINITE_NEGATIVE)  )
00436     {
00437         // Setup for first step
00438         motor->rampStep = 0;
00439
00440         // Setup Direction
00441         if(motor->stepToReach == STEPS_INFINITE_POSITIVE)
00442             dir = DIR_POSITIVE;
00443         else if(motor->stepToReach == STEPS_INFINITE_NEGATIVE)
00444              dir = DIR_NEGATIVE;
00445         else if(motor->stepToReach > motor->step)
00446             dir = DIR_POSITIVE;
00447         else
00448              dir = DIR_NEGATIVE;
00449
00450         setDirection(motor, dir);
00451
00452         // Enable of the home sensor control, if necessary
00453         // (before calling this function set the motor direction as above)
00454         stepper_enableCheckHome(motor, (dir == DIR_POSITIVE));
00455
00456         // if the movement is infinite negative set the sw direction positive
00457         // (not the hw: see below) to count the steps
00458         if(motor->stepToReach == STEPS_INFINITE_NEGATIVE) motor->dir = DIR_POSITIVE;
00459
00460         stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false);
00461         return MSTS_RUN;
00462     }
00463     else
00464     {
00465         /*
00466          * If we are here we should do at least one step.
00467          *  anyway ....
00468          */
00469         stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false);
00470         motor->skipIrqs = MOTOR_SWITCH_COUNT;
00471         return MSTS_PREIDLE;
00472     }
00473 }
00474
00475 static enum StepperState FSM_preinit(struct Stepper* motor)
00476 {
00477     // Set current high, and wait for stabilization
00478     if (setHighCurrent(motor))
00479     {
00480         motor->skipIrqs = MOTOR_SWITCH_COUNT;
00481         return MSTS_PREINIT;
00482     }
00483
00484     /*
00485      * This state is used when initializing the motor, to bring back
00486      * to the home. The idea is that we do not know where the motor
00487      * is at this point, so there can be two possibilities:
00488      *
00489      * - The motor is already in home. We do not know how much into the
00490      *   home we are. So we need to get out of the home (MSTS_LEAVING)
00491      *   and then get back into it of the desired number of steps.
00492      *
00493      * - The motor is not in home: we need to look for it (MSTS_INIT).
00494      *   We can safely assume that we will find the home in the negative
00495      *   direction. For circular motors, any direction would do. For
00496      *   other motors, the home is set at zero, so the current position
00497      *   has to be a positive value.
00498      *
00499      */
00500     if (stepper_readHome(motor))
00501     {
00502         setDirection(motor, DIR_POSITIVE);
00503         stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false);
00504         return MSTS_LEAVING;
00505     }
00506
00507     setDirection(motor, DIR_NEGATIVE);
00508     stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false);
00509     return MSTS_INIT;
00510 }
00511
00512
00513 static enum StepperState FSM_init(struct Stepper* motor)
00514 {
00515     // If we are not in home, keep looking
00516     if (!stepper_readHome(motor))
00517     {
00518         stepper_schedule_irq(motor, motor->cfg->clocksHome, true);
00519         return MSTS_INIT;
00520     }
00521
00522     /*
00523      * Home! We still need to enter the home of the specified number of steps.
00524      * That will be our absolute zero.
00525      */
00526
00527     motor->step = motor->cfg->stepsInHome - 1; // start counting down steps in home
00528     motor->stepToReach = 0;
00529
00530     stepper_schedule_irq(motor, motor->cfg->clocksHome, true);
00531     return MSTS_ENTERING;
00532 }
00533
00534 static enum StepperState FSM_entering(struct Stepper* motor)
00535 {
00536     // We must be in home
00537     //ASSERT(stepper_readHome(motor));
00538
00539     // if while entering the sensor we are no more in home we reset the steps
00540     // counter (optical sensor)
00541     if(!stepper_readHome(motor))
00542         motor->step = motor->cfg->stepsInHome - 1;
00543
00544     // Current Position must be non-negative
00545     ASSERT(motor->step >= 0);
00546
00547     if(motor->step == 0)
00548     {
00549         // reach the final target inside home sensor
00550         motor->step = 0;
00551         return MSTS_PREIDLE;
00552     }
00553
00554     // keep doing steps
00555     stepper_schedule_irq(motor, motor->cfg->clocksHome, true);
00556     return MSTS_ENTERING;
00557 }
00558
00559 static enum StepperState FSM_leaving(struct Stepper* motor)
00560 {
00561     ASSERT(motor->dir == DIR_POSITIVE);
00562
00563     motor->step = 0;
00564     if (!stepper_readHome(motor))
00565     {
00566         // we are out of home : change state and going far from sensor
00567         stepper_schedule_irq(motor, motor->cfg->clocksHome, true);
00568         return MSTS_OUTHOME;
00569     }
00570     else
00571     {
00572         // Still at home. Just wait here and keep doing steps
00573         stepper_schedule_irq(motor, motor->cfg->clocksHome, true);
00574         return MSTS_LEAVING;
00575     }
00576 }
00577
00578 static enum StepperState FSM_outhome(struct Stepper* motor)
00579 {
00580     ASSERT(motor->dir == DIR_POSITIVE);
00581
00582     // We must be out of home: once we are no more in home
00583     // we just need to move away, even if not very precide (optical sensor)
00584     // ASSERT(!stepper_readHome(motor));
00585
00586     if(motor->step >= motor->cfg->stepsOutHome)
00587     {
00588         // reach the final target outside home sensor
00589         motor->step = 0;
00590
00591         // start home entering procedure (delay in executing step)
00592         setDirection(motor, DIR_NEGATIVE);
00593         stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false);
00594         motor->skipIrqs = MOTOR_SWITCH_COUNT;
00595         return MSTS_INIT;
00596     }
00597
00598     // keep doing steps
00599     stepper_schedule_irq(motor, motor->cfg->clocksHome, true);
00600     return MSTS_OUTHOME;
00601 }
00602
00603 static void FAST_FUNC stepper_interrupt(struct Stepper *motor)
00604 {
00605     enum StepperState newState;
00606
00607     // Check if we need to skip a certain number of IRQs
00608     if (motor->skipIrqs)
00609     {
00610         --motor->skipIrqs;
00611         stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false);
00612         return;
00613     }
00614
00615     ASSERT(motor->state);
00616     newState = motor->state(motor);
00617     stepper_changeState(motor, newState);
00618 }
00619
00620
00621
00622
00623 /************************************************************************/
00624 /* Public API                                                           */
00625 /************************************************************************/
00626
00630 void stepper_init(void)
00631 {
00632     STEPPER_INIT();
00633
00634     // before starting the power all the stepper enable must be surely low
00635     stepper_disable();
00636
00637     // Bind functions to general states
00638     memset(general_states, 0, sizeof(general_states));
00639     general_states[MSTS_IDLE] = FSM_idle;
00640     general_states[MSTS_PREIDLE] = FSM_preidle;
00641     general_states[MSTS_PRERUN] = FSM_prerun;
00642     general_states[MSTS_RUN] = FSM_run;
00643     general_states[MSTS_PREINIT] = FSM_preinit;
00644     general_states[MSTS_INIT] = FSM_init;
00645     general_states[MSTS_ENTERING] = FSM_entering;
00646     general_states[MSTS_LEAVING]= FSM_leaving;
00647     general_states[MSTS_OUTHOME]= FSM_outhome;
00648     general_states[MSTS_ERROR]= FSM_error;
00649 }
00650
00651 void stepper_end(void)
00652 {
00653     // Disable all stepper timer interrupt to stop motors
00654     for (int i = 0; i < CONFIG_NUM_STEPPER_MOTORS; i++)
00655         stepper_disable_irq(&all_motors[i]);
00656 }
00657
00661 struct Stepper* stepper_setup(int index, struct StepperConfig *cfg)
00662 {
00663     struct Stepper* motor;
00664
00665     ASSERT(index < CONFIG_NUM_STEPPER_MOTORS);
00666
00667     motor = &all_motors[index];
00668     motor->index = index;
00669     motor->cfg = cfg;
00670
00671     //Register timer to stepper, and enable irq
00672     stepper_tc_setup(motor->index, &stepper_interrupt, motor);
00673
00674     stepper_reset(motor);
00675
00676     stepper_enable_irq(motor);
00677
00678     return motor;
00679 }
00680
00684 void stepper_disable(void)
00685 {
00686     STEPPER_DISABLE_ALL();
00687 }
00688
00692 void stepper_reset(struct Stepper *motor)
00693 {
00694     /*
00695      * To stop motor diable stepper irq.
00696      */
00697     stepper_disable_irq(motor);
00698
00699     //Disable a stepper motor
00700     STEPPER_DISABLE(MOTOR_INDEX(motor));
00701
00702     // Setup context variables
00703     motor->power = 0;
00704     motor->step = 0;
00705     motor->rampStep = -1;
00706     // We cannot set the clock at zero at start because of a limit in the fixed point ramp
00707     motor->rampClock = motor->cfg->ramp.clocksMaxWL;
00708     motor->rampValue = motor->cfg->ramp.clocksMaxWL;
00709     motor->speed = SPEED_STOPPED;
00710     motor->stepToReach = 0;
00711     motor->skipIrqs = 0;
00712     motor->stepCircular = 0;
00713     setDirection(motor, DIR_POSITIVE);
00714     setLowCurrent(motor);
00715
00716     motor->changeCurrentIrqs = 0;
00717
00718     // default value (disable level sensor check)
00719     motor->stepsDeaf = DEAFSTEPS_DEFAULT;
00720
00721     STEPPER_SET_HALF_STEP(MOTOR_INDEX(motor), motor->cfg->flags.halfStep);
00722     STEPPER_SET_CONTROL_BIT(MOTOR_INDEX(motor), motor->cfg->flags.controlBit);
00723
00724     if (motor->cfg->homeSensorIndex < NUM_HOME_SENSORS)
00725         hw_home_sensor_set_inverted(motor->cfg->homeSensorIndex, motor->cfg->flags.homeInverted);
00726
00727     if (motor->cfg->levelSensorIndex != MOTOR_NO_LEVEL_SENSOR)
00728         hw_level_sensor_set_inverted(motor->cfg->levelSensorIndex, motor->cfg->flags.levelInverted);
00729
00730     stepper_changeState(motor, MSTS_IDLE);
00731
00732     // Reset stepper timer counter
00733     stepper_tc_resetTimer(motor->timer);
00734
00735     // reset hw to the stepper motor
00736     STEPPER_RESET(MOTOR_INDEX(motor));
00737     STEPPER_ENABLE(MOTOR_INDEX(motor));
00738 }
00739
00740
00741 void stepper_updateHalfStep(struct Stepper *motor)
00742 {
00743     STEPPER_SET_HALF_STEP(MOTOR_INDEX(motor), motor->cfg->flags.halfStep);
00744 }
00745
00746 void stepper_updateControlBit(struct Stepper *motor)
00747 {
00748     STEPPER_SET_CONTROL_BIT(MOTOR_INDEX(motor), motor->cfg->flags.controlBit);
00749 }
00750
00751 void stepper_updateControlMoveBit(struct Stepper *motor)
00752 {
00753     STEPPER_SET_CONTROL_BIT(MOTOR_INDEX(motor), motor->cfg->flags.controlMoveBit);
00754 }
00755
00765 void stepper_home(struct Stepper *motor)
00766 {
00767
00768     // Begin home procedure
00769     stepper_disable_irq(motor);
00770
00771     // disable home sensor check (default)
00772     setCheckSensor(motor, MOTOR_HOMESENSOR_NOCHECK);
00773     // deafult value (disable level sensor check)
00774     motor->stepsDeaf = DEAFSTEPS_DEFAULT;
00775
00776     setDirection(motor, DIR_POSITIVE);
00777     stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false);
00778     stepper_changeState(motor, MSTS_PREINIT);
00779
00780     stepper_enable_irq(motor);
00781 }
00782
00783
00784 void stepper_setStep(struct Stepper *motor, int16_t step)
00785 {
00786     motor->step = step;
00787 }
00788
00789
00790 int16_t stepper_getStep(struct Stepper *motor)
00791 {
00792     return motor->step;
00793 }
00794
00795 int16_t stepper_getLevelStep(struct Stepper *motor)
00796 {
00797     return motor->stepsLevel;
00798 }
00799
00800 void stepper_set_stepCircular(struct Stepper *motor, int16_t steps)
00801 {
00802     motor->stepCircular = steps;
00803 }
00804
00805 int16_t stepper_get_stepCircular(struct Stepper *motor)
00806 {
00807     return motor->stepCircular;
00808 }
00809
00810 int16_t stepper_scaleSteps(struct Stepper *motor, int16_t dir)
00811 {
00812     int16_t steps;
00813
00814     // scale the current position inside the motor lap
00815     if(!motor->stepCircular) return 0;
00816
00817     // to be sure ....
00818     while(motor->step > motor->stepCircular) motor->step -= motor->stepCircular;
00819
00820     if(dir == DIR_NEGATIVE)
00821     {
00822         steps = ((motor->stepCircular - motor->step) % motor->stepCircular);
00823         motor->step = steps;
00824     }
00825     /*
00826     else
00827         steps = (motor->step % motor->stepCircular);
00828     motor->step = steps;
00829     */
00830     return motor->step;
00831 }
00832
00833 static void stepper_enableCheckHome(struct Stepper *motor, bool bDirPositive)
00834 {
00835     enum MotorHomeSensorCheck value = MOTOR_HOMESENSOR_NOCHECK; // default
00836
00837     motor->stepsTollMin = 0;
00838
00839     if((motor->stepToReach != STEPS_INFINITE_POSITIVE) &&
00840         (motor->stepToReach != STEPS_INFINITE_NEGATIVE)  )
00841     {
00842         if(bDirPositive) // else if(motor->dir == DIR_POSITIVE)
00843         {
00844             /* if the direction is positive (movement from 0 position),
00845              * if the starting position is inside home and the target position
00846              * is outside home -> the motor has to cross the home sensor -> enable the control
00847              */
00848             if (motor->step < motor->cfg->stepsInHome - motor->cfg->stepsTollOutHome &&
00849                 motor->stepToReach > motor->cfg->stepsInHome + motor->cfg->stepsTollOutHome)
00850             {
00851                 value = MOTOR_HOMESENSOR_OUTCHECK;
00852                 // home sensor out max position
00853                 motor->stepsTollMax = motor->cfg->stepsInHome + motor->cfg->stepsTollOutHome + MOTOR_CONSECUTIVE_ERROR_STEPS;
00854                 // home sensor in max position
00855                 if(motor->cfg->stepsInHome + MOTOR_CONSECUTIVE_ERROR_STEPS > motor->cfg->stepsTollOutHome)
00856                     motor->stepsTollMin = motor->cfg->stepsInHome + MOTOR_CONSECUTIVE_ERROR_STEPS - motor->cfg->stepsTollOutHome;
00857             }
00858         }
00859         else // if(motor->dir == DIR_NEGATIVE)
00860         {
00861             /*
00862              * if the direction is negative (movement to 0 position),
00863              * if the starting position is far from home and the target position
00864              * is inside home -> the motor has to cross the home sensor -> enable the control
00865              */
00866             if (motor->step > motor->cfg->stepsInHome + motor->cfg->stepsTollInHome &&
00867                 motor->stepToReach < motor->cfg->stepsInHome - motor->cfg->stepsTollInHome)
00868             {
00869                 value = MOTOR_HOMESENSOR_INCHECK;
00870                 // home sensor out max position
00871                 motor->stepsTollMax = motor->cfg->stepsInHome + motor->cfg->stepsTollInHome - MOTOR_CONSECUTIVE_ERROR_STEPS;
00872                 // home sensor in max position
00873                 if(motor->cfg->stepsInHome > motor->cfg->stepsTollInHome + MOTOR_CONSECUTIVE_ERROR_STEPS)
00874                     motor->stepsTollMin = motor->cfg->stepsInHome - (motor->cfg->stepsTollInHome + MOTOR_CONSECUTIVE_ERROR_STEPS);
00875             }
00876         }
00877     }
00878     setCheckSensor(motor, value);
00879 }
00880
00887 int16_t stepper_move(struct Stepper *motor, int16_t steps, uint16_t speed, int16_t deafstep)
00888 {
00889     // if the stepper already is in the desired position -> nothing to do
00890     if (motor->step == steps)
00891         return 0;
00892
00893     stepper_disable_irq(motor);
00894
00895     // final position
00896     motor->stepToReach = steps;
00897
00898     // clear error steps
00899     motor->stepsErrorHome = 0;
00900
00901     // position to start level check
00902     motor->stepsDeaf = deafstep;
00903
00904     // clear level position
00905     motor->stepsLevel = 0;
00906
00907     if (speed < motor->cfg->ramp.clocksMinWL)
00908     {
00909         ASSERT2(0, "speed too fast (small number)");
00910         speed = motor->cfg->ramp.clocksMinWL;
00911     }
00912
00913     motor->rampClock = motor->cfg->ramp.clocksMaxWL;
00914     motor->rampValue = motor->cfg->ramp.clocksMaxWL;
00915
00916     // TODO: find the exact value for motor->speed searching  in the ramp array.
00917     motor->speed = speed;
00918
00919     stepper_enable_irq(motor);
00920
00921     return 0;
00922 }
00923
00924
00928 void stepper_stop(struct Stepper *motor)
00929 {
00930     /*
00931      * The best way is to set the target of the movement to the minimum
00932      * distance needed to decelerate. The logic in FSM_run will do the rest.
00933      */
00934     if(stepper_idle(motor))
00935         return;
00936
00937     stepper_disable_irq(motor);
00938     motor->stepToReach = motor->step + motor->rampStep * motor->dir;
00939     stepper_enable_irq(motor);
00940 }
00941
00942
00946 void stepper_break(struct Stepper *motor, enum StepperState state)
00947 {
00948     // The best way to abort any operation is to go back to pre-idle mode
00949     stepper_disable_irq(motor);
00950
00951     // Set of Speed disabled and Steps reached so that the function
00952     // stepper_idle() succeeds
00953     motor->speed = SPEED_STOPPED;
00954     motor->stepToReach = motor->step;
00955     stepper_changeState(motor, state);
00956     stepper_enable_irq(motor);
00957 }
00958
00960 //  this means anyway that the motor is not moving
00961 bool stepper_idle(struct Stepper *motor)
00962 {
00963     return (stepper_isState(motor, MSTS_ERROR) ||
00964             (stepper_isState(motor, MSTS_IDLE) && motor->step == motor->stepToReach) );
00965 }
00966
00968 bool stepper_error(struct Stepper *motor)
00969 {
00970     return (stepper_isState(motor, MSTS_ERROR));
00971 }
00972
00974 bool stepper_inhome(struct Stepper *motor)
00975 {
00976     return(stepper_getStep(motor) == 0 &&
00977            !stepper_readHome(motor) );
00978 }


BeRTOS: stepper.h File Reference

  • drv
Data Structures | Defines | Typedefs | Enumerations | Functions
stepper.h File Reference

Driver to control stepper motor. More...

#include <cfg/compiler.h>
#include <algo/ramp.h>

Go to the source code of this file.

Data Structures

struct | StepperConfig
Stepper configuration. More...
struct | Stepper
Motor context structure. More...

Defines

#define | STEPS_INFINITE_POSITIVE ((int16_t)0xFFFF)
Special value for steps to move the motor continuously.
#define | STEPS_INFINITE_NEGATIVE ((int16_t)0x8FFF)
Maximum value for stepper steps.
#define | MAX_STEPS 0x7FFF
Default value -> no level sensor associated to the motor.
#define | MOTOR_NO_LEVEL_SENSOR 0xFFFF
Default value -> no home sensor associated to the motor.
#define | MOTOR_NO_HOME_SENSOR 0xFFFF
Default value for deafsteps in normal movement (no level sensor)
#define | DEAFSTEPS_DEFAULT MAX_STEPS
Out-of-band values for speed.
#define | SPEED_STOPPED 0xFFFF
motor is stopped
#define | SPEED_HOMING 0xFFFE
motor is homing

Typedefs

typedef enum StepperState(* | fsm_state )(struct Stepper *)
Pointer to a isr stepper function.
typedef void(* | stepper_isr_t )(struct Stepper *)
Time for steppers motor.

Enumerations

enum | MotorDirection { DIR_POSITIVE = 1, DIR_NONE = 0, DIR_NEGATIVE = -1 }
Motor direction. More...
enum StepperState {
MSTS_UNINIT, MSTS_RUN, MSTS_IDLE, MSTS_PREIDLE,
MSTS_PRERUN, MSTS_PREINIT, MSTS_INIT, MSTS_ENTERING,
MSTS_LEAVING, MSTS_OUTHOME, MSTS_ERROR
}
Stepper state-machine conditions. More...

Functions

void | stepper_init (void)
Initialize the stepper module.
struct Stepper * | stepper_setup (int index, struct StepperConfig *cfg)
Apply a setup config to motor structure context.
void | stepper_disable (void)
Set the enable for all the motors to 0 before switching on the power.
void | stepper_reset (struct Stepper *motor)
Reset the motor.
void | stepper_home (struct Stepper *motor)
Find the home of a motor assuming no current knowledge about its position.
int16_t | stepper_move (struct Stepper *motor, int16_t step, uint16_t speed, int16_t deafstep)
Move motor to absolute position at specified speed.
void | stepper_stop (struct Stepper *motor)
Stop motor gracefully.
void | stepper_break (struct Stepper *motor, enum StepperState state)
Stop motor immediately, changing the status.
bool | stepper_idle (struct Stepper *motor)
Returns true if the stepper is in error mode.
bool | stepper_error (struct Stepper *motor)
check the home sensor in zero position

Detailed Description

Driver to control stepper motor.

Author:
Francesco Michelini <francesco.michelini@seacfi.com>
Giovanni Bajo <rasky@develer.com>
Bernie Innocenti <bernie@codewiz.org>
Simone Zinanni <s.zinanni@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file stepper.h.

Enumeration Type Documentation

enum MotorDirection

Motor direction.

Enumerator:
DIR_POSITIVE

moving away from zero (which is the home)

DIR_NONE

no movement

DIR_NEGATIVE

moving towards towards zero (which is the home)

Definition at line 80 of file stepper.h.

enum StepperState

Stepper state-machine conditions.

Enumerator:
MSTS_UNINIT

stepper_init() not yet called

MSTS_RUN

running

MSTS_IDLE

waiting for a command

MSTS_PREIDLE

waiting before going low-current

MSTS_PRERUN

waiting after high-current

MSTS_PREINIT

preparing to initialize ;-)

MSTS_INIT

initializing home procedure

MSTS_ENTERING

entering home sensor

MSTS_LEAVING

moving away from home (inside the sensor)

MSTS_OUTHOME

moving away from home (outside the sensor)

MSTS_ERROR

error status

Dummy entry to guarantee the right underlying size for the enum

Definition at line 93 of file stepper.h.

Function Documentation

void stepper_break | ( | struct Stepper * | motor,
 |  | enum StepperState | state
 | ) |  |

Stop motor immediately, changing the status.

Returns true if the stepper is in idle at the final position or in error:

Definition at line 946 of file stepper.c.

void stepper_home ( struct Stepper * motor )

Find the home of a motor assuming no current knowledge about its position.

This must be done when the motor is desynchronized with the firmware and we do not know anymore where it is.

In normal operation mode, to go back to the home, it is sufficient to use move to step #0 with stepper_move, since the home is always at step #0.

Definition at line 765 of file stepper.c.

int16_t stepper_move | ( | struct Stepper * | motor,
 |  | int16_t | steps,
 |  | uint16_t | speed,
 |  | int16_t | deafstep
 | ) |  |

Move motor to absolute position at specified speed.

  • steps position to reach in steps
  • speed speed in timer ticks (use TIME2CLOCKS() to convert)

Definition at line 887 of file stepper.c.


BeRTOS: stepper.h Source File

  • drv
stepper.h
Go to the documentation of this file.
00001
00024 #ifndef DRV_STEPPER_H
00025 #define DRV_STEPPER_H
00026
00027 #include <cfg/compiler.h>
00028
00029 #include <algo/ramp.h>
00030
00031 // Forward declaration
00032 struct Stepper;
00033
00035 #define STEPS_INFINITE_POSITIVE        ((int16_t)0xFFFF)
00036 #define STEPS_INFINITE_NEGATIVE        ((int16_t)0x8FFF)
00037
00039 #define MAX_STEPS                      0x7FFF
00040
00042 #define MOTOR_NO_LEVEL_SENSOR          0xFFFF
00043
00045 #define MOTOR_NO_HOME_SENSOR           0xFFFF
00046
00048 #define DEAFSTEPS_DEFAULT              MAX_STEPS
00049
00051 //\{
00052 #define SPEED_STOPPED                  0xFFFF    ///< motor is stopped
00053 #define SPEED_HOMING                   0xFFFE    ///< motor is homing
00054 //\}
00055
00056 // default values for steps inside and outside home sensor
00057 #define MOTOR_INSIDE_HOME_STEPS        10
00058 #define MOTOR_OUTSIDE_HOME_STEPS       40
00059
00060 // default value for home sensor tolerance
00061 #define MOTOR_TOLERANCE_HOME_STEPS      2
00062
00063 // default value for consecutive error
00064 #define MOTOR_CONSECUTIVE_ERROR_STEPS   3
00065
00066 // values for the home control enabling
00067 enum MotorHomeSensorCheck
00068 {
00069     MOTOR_HOMESENSOR_NOCHECK = 0,
00070     MOTOR_HOMESENSOR_INCHECK,
00071     MOTOR_HOMESENSOR_OUTCHECK
00072 };
00073
00074 // default value in ms for home procedure timeout
00075 #define MOTOR_TIMEOUT_HOME              20000
00076
00080 enum MotorDirection
00081 {
00082     DIR_POSITIVE = 1,
00083     DIR_NONE = 0,
00084     DIR_NEGATIVE = -1
00085 };
00086
00087 #define STEPPER_MAX_STATES    32
00088
00089
00093 enum StepperState
00094 {
00095     MSTS_UNINIT,
00096     MSTS_RUN,
00097     MSTS_IDLE,
00098     MSTS_PREIDLE,
00099     MSTS_PRERUN,
00100
00101 // Home procedure
00102     MSTS_PREINIT,
00103     MSTS_INIT,
00104     MSTS_ENTERING,
00105     MSTS_LEAVING,
00106     MSTS_OUTHOME,
00107
00108     MSTS_ERROR,
00109
00111     MSTS_DUMMY_ALIGN = STEPPER_MAX_STATES - 1
00112 };
00113
00115 typedef enum StepperState (*fsm_state)(struct Stepper* );
00116
00118 typedef void (*stepper_isr_t)(struct Stepper* );
00119
00121 typedef uint16_t stepper_time_t;
00122
00126 struct StepperConfig
00127 {
00128     struct Ramp ramp;
00129     uint16_t pulse;
00130
00131     fsm_state states[STEPPER_MAX_STATES];
00132
00133     int16_t stepsInHome;
00134     int16_t stepsOutHome;
00135     uint16_t clocksHome;
00136
00137     int16_t stepsTollOutHome;
00138     int16_t stepsTollInHome;
00139
00140     int16_t timeoutHome;
00141
00142     uint8_t powerRun;
00143     uint8_t powerIdle;
00144
00145     uint16_t homeSensorIndex;
00146     uint16_t levelSensorIndex;
00147
00148     struct
00149     {
00150         bool homeInverted : 1;
00151         bool halfStep : 1;
00152         bool axisInverted : 1;
00153         bool levelInverted : 1;
00154         bool controlBit : 1;
00155         bool controlMoveBit : 1;
00156         bool highcurrentBit : 1;
00157     } flags;
00158 };
00159
00160
00164 struct Stepper
00165 {
00166     const struct StepperConfig *cfg;
00167     fsm_state state;
00168
00169     struct TimerCounter *timer;
00170     uint16_t index;
00171
00172     volatile int16_t step;
00173     volatile int16_t rampStep;
00174 #if RAMP_USE_FLOATING_POINT
00175     float rampValue;
00176     float rampClock;
00177 #else
00178     uint16_t rampValue;
00179     uint32_t rampClock;
00180 #endif
00181
00182     enum MotorDirection dir;
00183     uint8_t power;
00184
00185     uint16_t speed;
00186     int16_t stepToReach;
00187
00188     int16_t skipIrqs;
00189     int16_t changeCurrentIrqs;
00190
00191     int8_t  enableCheckHome;
00192     int8_t  stepsErrorHome;
00193     int16_t stepsTollMax;
00194     int16_t stepsTollMin;
00195
00196     int16_t stepsDeaf;
00197     int16_t stepsLevel;
00198
00199     int16_t stepCircular;
00200 };
00201
00202
00203 void stepper_init(void);
00204 void stepper_end(void);
00205 struct Stepper *stepper_setup(int index, struct StepperConfig *cfg);
00206 void stepper_disable(void);
00207 void stepper_reset(struct Stepper *motor);
00208 void stepper_home(struct Stepper *motor);
00209 void stepper_setStep(struct Stepper *motor, int16_t step);
00210 int16_t stepper_getStep(struct Stepper *motor);
00211 int16_t stepper_move(struct Stepper *motor, int16_t step, uint16_t speed, int16_t deafstep);
00212 void stepper_stop(struct Stepper *motor);
00213 void stepper_break(struct Stepper *motor, enum StepperState state);
00214 bool stepper_idle(struct Stepper *motor);
00215 bool stepper_readHome(struct Stepper *motor);
00216 bool stepper_readLevel(struct Stepper *motor);
00217 void stepper_updateHalfStep(struct Stepper *motor);
00218 void stepper_updateControlBit(struct Stepper *motor);
00219 void stepper_updateControlMoveBit(struct Stepper *motor);
00220 bool stepper_error(struct Stepper *motor);
00221 bool stepper_inhome(struct Stepper *motor);
00222 int16_t stepper_getLevelStep(struct Stepper *motor);
00223 void stepper_set_stepCircular(struct Stepper *motor, int16_t steps);
00224 int16_t stepper_get_stepCircular(struct Stepper *motor);
00225 int16_t stepper_scaleSteps(struct Stepper *motor, int16_t dir);
00226
00227 #endif /* DRV_STEPPER_H */


BeRTOS: stepper_arm.c File Reference

  • cpu
  • arm
  • drv
stepper_arm.c File Reference

Low-level stepper timer module for ARM (inplementation). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level stepper timer module for ARM (inplementation).

Author:
Daniele Basile <asterix@develer.com>

This module is automatically included so no need to include in test list.

Definition in file stepper_arm.c.


BeRTOS: stepper_arm.c Source File

  • cpu
  • arm
  • drv
stepper_arm.c
Go to the documentation of this file.
00001
00042 #ifndef WIZ_AUTOGEN
00043     #warning This file is deprecated, you should use stepper_at91.c
00044
00045     #include <cpu/detect.h>
00046
00047     #if CPU_ARM_AT91
00048         #include "stepper_at91.c"
00049     /*#elif  Add other ARM families here */
00050     #else
00051         #error Unknown CPU
00052     #endif
00053 #endif /* WIZ_AUTOGEN */
00054


BeRTOS: stepper_arm.h File Reference

  • cpu
  • arm
  • drv
stepper_arm.h File Reference

Low-level stepper timer module for ARM (inplementation). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level stepper timer module for ARM (inplementation).

Author:
Daniele Basile <asterix@develer.com>

Definition in file stepper_arm.h.


BeRTOS: stepper_arm.h Source File

  • cpu
  • arm
  • drv
stepper_arm.h
Go to the documentation of this file.
00001
00040 #include <cpu/detect.h>
00041
00042 #if CPU_ARM_AT91
00043     #include "stepper_at91.h"
00044 /*#elif  Add other ARM families here */
00045 #else
00046     #error Unknown CPU
00047 #endif


BeRTOS: stepper_at91.c File Reference

  • cpu
  • arm
  • drv
Functions
stepper_at91.c File Reference

Stepper driver interface implementation. More...

#include "stepper_at91.h"
#include "cfg/cfg_stepper.h"
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <cpu/types.h>
#include <cpu/irq.h>
#include <io/arm.h>

Go to the source code of this file.

Functions

static | ISR_PROTO (stepper_tc2_irq)
Static array of timer counter struct for stepper.
void | stepper_tc_tio_irq (struct TimerCounter *t)
Generic TIO interrupt handler.
void | stepper_tc_setup (int index, stepper_isr_t callback, struct Stepper *motor)
Timer couter setup.
void | stepper_tc_init (void)
Timer counter init.

Detailed Description

Stepper driver interface implementation.

This module use the three timer on the at91 family, to generate a six periodic variable pwm waveform. The pulse width is fix, and could change by setting the STEPPER_DELAY_ON_COMPARE_C define, but you make an attention to do this, becouse the pulse width is not exactly STEPPER_DELAY_ON_COMPARE_C. The pulse width depend also to latency time of cpu to serve an interrupt, this generate an pwm waveform affect to noise. This noise not effect the period but only the pulse width, becouse the raising edge is generate by hardware comply with the our period settings.

Note: is most important to set STEPPER_DELAY_ON_COMPARE_C value minor than a interrupt time service, becouse the falling edge must be happen inside to inerrupt service to guarantee a correct functionaly of pwm generator.

Author:
Daniele Basile <asterix@develer.com>

Definition in file stepper_at91.c.

Function Documentation

void stepper_tc_setup | ( | int | index,
 |  | stepper_isr_t | callback,
 |  | struct Stepper * | motor
 | ) |  |

Timer couter setup.

This function apply to select timer couter all needed settings. Every settings are stored in stepper_timers[].

Definition at line 332 of file stepper_at91.c.


BeRTOS: stepper_at91.c Source File

  • cpu
  • arm
  • drv
stepper_at91.c
Go to the documentation of this file.
00001
00055 #include "stepper_at91.h"
00056
00057 #include "cfg/cfg_stepper.h"
00058 #include <cfg/macros.h>
00059 #include <cfg/debug.h>
00060
00061 #include <cpu/types.h>
00062 #include <cpu/irq.h>
00063
00064 #include <io/arm.h>
00065
00066
00067 /*
00068  * Delay to set C compare to clear output
00069  * on select TIO output
00070  */
00071 #define STEPPER_DELAY_ON_COMPARE_C 20
00072
00073 /*
00074  * Forward declaration for interrupt handler
00075  */
00076 static ISR_PROTO(stepper_tc0_irq);
00077 static ISR_PROTO(stepper_tc1_irq);
00078 static ISR_PROTO(stepper_tc2_irq);
00079
00081 static struct TimerCounter stepper_timers[CONFIG_TC_STEPPER_MAX_NUM] =
00082 {
00083     { //Timer Counter settings for TIOA0 output pin
00084         .timer_id = TC0_ID,
00085         .blk_ctrl_set = TC_NONEXC0,
00086         .chl_mode_reg = &TC0_CMR,
00087         .chl_ctrl_reg = &TC0_CCR,
00088         .comp_effect_mask = TC_ACPA_MASK,
00089         .comp_effect_set = TC_ACPA_SET_OUTPUT,
00090         .comp_effect_clear = TC_ACPA_CLEAR_OUTPUT,
00091         .comp_effect_c_mask = TC_ACPC_MASK,
00092         .comp_effect_c_clear = TC_ACPC_CLEAR_OUTPUT,
00093         .ext_event_set = TC_EEVT_XC0,
00094         .comp_reg = &TC0_RA,
00095         .comp_c_reg = &TC0_RC,
00096         .count_val_reg = &TC0_CV,
00097         .irq_enable_reg = &TC0_IER,
00098         .irq_disable_reg = &TC0_IDR,
00099         .irq_set_mask = BV(TC_CPAS),
00100         .irq_mask_reg = &TC0_IMR,
00101         .isr = stepper_tc0_irq,
00102         .status_reg = &TC0_SR,
00103         .tio_pin = TIOA0,
00104         .callback = NULL,
00105         .motor = NULL,
00106     },
00107     { //Timer Counter settings for TIOB0 output pin
00108         .timer_id = TC0_ID,
00109         .blk_ctrl_set = TC_NONEXC0,
00110         .chl_mode_reg = &TC0_CMR,
00111         .chl_ctrl_reg = &TC0_CCR,
00112         .comp_reg = &TC0_RB,
00113         .comp_c_reg = &TC0_RC,
00114         .count_val_reg = &TC0_CV,
00115         .comp_effect_mask = TC_BCPB_MASK,
00116         .comp_effect_set = TC_BCPB_SET_OUTPUT,
00117         .comp_effect_clear = TC_BCPB_CLEAR_OUTPUT,
00118         .comp_effect_c_mask = TC_BCPC_MASK,
00119         .comp_effect_c_clear = TC_BCPC_CLEAR_OUTPUT,
00120         .ext_event_set = TC_EEVT_XC0,
00121         .irq_enable_reg = &TC0_IER,
00122         .irq_disable_reg = &TC0_IDR,
00123         .irq_set_mask = BV(TC_CPBS),
00124         .irq_mask_reg = &TC0_IMR,
00125         .isr = stepper_tc0_irq,
00126         .status_reg = &TC0_SR,
00127         .tio_pin = TIOB0,
00128         .callback = NULL,
00129         .motor = NULL,
00130     },
00131     { //Timer Counter settings for TIOA1 output pin
00132         .timer_id = TC1_ID,
00133         .blk_ctrl_set = TC_NONEXC1,
00134         .chl_mode_reg = &TC1_CMR,
00135         .chl_ctrl_reg = &TC1_CCR,
00136         .comp_reg = &TC1_RA,
00137         .comp_c_reg = &TC1_RC,
00138         .count_val_reg = &TC1_CV,
00139         .comp_effect_mask = TC_ACPA_MASK,
00140         .comp_effect_set = TC_ACPA_SET_OUTPUT,
00141         .comp_effect_clear = TC_ACPA_CLEAR_OUTPUT,
00142         .comp_effect_c_mask = TC_ACPC_MASK,
00143         .comp_effect_c_clear = TC_ACPC_CLEAR_OUTPUT,
00144         .ext_event_set = TC_EEVT_XC1,
00145         .irq_enable_reg = &TC1_IER,
00146         .irq_disable_reg = &TC1_IDR,
00147         .irq_set_mask = BV(TC_CPAS),
00148         .irq_mask_reg = &TC1_IMR,
00149         .isr = stepper_tc1_irq,
00150         .status_reg = &TC1_SR,
00151         .tio_pin = TIOA1,
00152         .callback = NULL,
00153         .motor = NULL,
00154     },
00155     { //Timer Counter settings for TIOB1 output pin
00156         .timer_id = TC1_ID,
00157         .blk_ctrl_set = TC_NONEXC1,
00158         .chl_mode_reg = &TC1_CMR,
00159         .chl_ctrl_reg = &TC1_CCR,
00160         .comp_reg = &TC1_RB,
00161         .comp_c_reg = &TC1_RC,
00162         .count_val_reg = &TC1_CV,
00163         .comp_effect_mask = TC_BCPB_MASK,
00164         .comp_effect_set = TC_BCPB_SET_OUTPUT,
00165         .comp_effect_clear = TC_BCPB_CLEAR_OUTPUT,
00166         .comp_effect_c_mask = TC_BCPC_MASK,
00167         .comp_effect_c_clear = TC_BCPC_CLEAR_OUTPUT,
00168         .ext_event_set = TC_EEVT_XC1,
00169         .irq_enable_reg = &TC1_IER,
00170         .irq_disable_reg = &TC1_IDR,
00171         .irq_set_mask = BV(TC_CPBS),
00172         .irq_mask_reg = &TC1_IMR,
00173         .isr = stepper_tc1_irq,
00174         .status_reg = &TC1_SR,
00175         .tio_pin = TIOB1,
00176         .callback = NULL,
00177         .motor = NULL,
00178     },
00179     { //Timer Counter settings for TIOA2 output pin
00180         .timer_id = TC2_ID,
00181         .blk_ctrl_set = TC_NONEXC2,
00182         .chl_mode_reg = &TC2_CMR,
00183         .chl_ctrl_reg = &TC2_CCR,
00184         .comp_reg = &TC2_RA,
00185         .comp_c_reg = &TC2_RC,
00186         .count_val_reg = &TC2_CV,
00187         .comp_effect_mask = TC_ACPA_MASK,
00188         .comp_effect_set = TC_ACPA_SET_OUTPUT,
00189         .comp_effect_clear = TC_ACPA_CLEAR_OUTPUT,
00190         .comp_effect_c_mask = TC_ACPC_MASK,
00191         .comp_effect_c_clear = TC_ACPC_CLEAR_OUTPUT,
00192         .ext_event_set = TC_EEVT_XC2,
00193         .irq_enable_reg = &TC2_IER,
00194         .irq_disable_reg = &TC2_IDR,
00195         .irq_set_mask = BV(TC_CPAS),
00196         .irq_mask_reg = &TC2_IMR,
00197         .isr = stepper_tc2_irq,
00198         .status_reg = &TC2_SR,
00199         .tio_pin = TIOA2,
00200         .callback = NULL,
00201         .motor = NULL,
00202     },
00203     { //Timer Counter settings for TIOB2 output pin
00204         .timer_id = TC2_ID,
00205         .blk_ctrl_set = TC_NONEXC2,
00206         .chl_mode_reg = &TC2_CMR,
00207         .chl_ctrl_reg = &TC2_CCR,
00208         .comp_reg = &TC2_RB,
00209         .comp_c_reg = &TC2_RC,
00210         .count_val_reg = &TC2_CV,
00211         .comp_effect_mask = TC_BCPB_MASK,
00212         .comp_effect_set = TC_BCPB_SET_OUTPUT,
00213         .comp_effect_clear = TC_BCPB_CLEAR_OUTPUT,
00214         .comp_effect_c_mask = TC_BCPC_MASK,
00215         .comp_effect_c_clear = TC_BCPC_CLEAR_OUTPUT,
00216         .ext_event_set = TC_EEVT_XC2,
00217         .irq_enable_reg = &TC2_IER,
00218         .irq_disable_reg = &TC2_IDR,
00219         .irq_set_mask = BV(TC_CPBS),
00220         .irq_mask_reg = &TC2_IMR,
00221         .isr = stepper_tc2_irq,
00222         .status_reg = &TC2_SR,
00223         .tio_pin = TIOB2,
00224         .callback = NULL,
00225         .motor = NULL,
00226     }
00227 };
00228
00232 INLINE void stepper_tc_tio_irq(struct TimerCounter * t)
00233 {
00234     //
00235     *t->chl_mode_reg &= ~t->comp_effect_c_mask;
00236     *t->chl_mode_reg |= t->comp_effect_c_clear;
00237
00238     /*
00239      * Cleat TIO output on c register compare.
00240      * This generate an pulse with variable lenght, this
00241      * depend to delay that interrupt is realy service.
00242      */
00243     *t->comp_c_reg = *t->count_val_reg + STEPPER_DELAY_ON_COMPARE_C;
00244
00245     //Call the associate callback
00246     t->callback(t->motor);
00247
00248     *t->chl_mode_reg &= ~t->comp_effect_c_mask;
00249 }
00250
00251
00252 /*
00253  * Interrupt handler for timer counter TCKL0
00254  */
00255 DECLARE_ISR(stepper_tc0_irq)
00256 {
00257     /*
00258      * Warning: when we read the status_reg register, we reset it.
00259      * That mean if is occur an interrupt event we can read only
00260      * the last that has been occur. To not miss an interrupt event
00261      * we save the status_reg register and then we read it.
00262      */
00263     uint32_t  status_reg = TC0_SR & TC0_IMR;
00264
00265     if (status_reg & BV(TC_CPAS))
00266         stepper_tc_tio_irq(&stepper_timers[TC_TIOA0]);
00267
00268     if (status_reg & BV(TC_CPBS))
00269         stepper_tc_tio_irq(&stepper_timers[TC_TIOB0]);
00270
00271     /* Inform hw that we have served the IRQ */
00272     AIC_EOICR = 0;
00273
00274 }
00275
00276 /*
00277  * Interrupt handler for timer counter TCKL1
00278  */
00279 DECLARE_ISR(stepper_tc1_irq)
00280 {
00281     /*
00282      * Warning: when we read the status_reg register, we reset it.
00283      * That mean if is occur an interrupt event we can read only
00284      * the last that has been occur. To not miss an interrupt event
00285      * we save the status_reg register and then we read it.
00286      */
00287     uint32_t  status_reg = TC1_SR & TC1_IMR;
00288
00289     if (status_reg & BV(TC_CPAS))
00290         stepper_tc_tio_irq(&stepper_timers[TC_TIOA1]);
00291
00292     if (status_reg & BV(TC_CPBS))
00293         stepper_tc_tio_irq(&stepper_timers[TC_TIOB1]);
00294
00295
00296     /* Inform hw that we have served the IRQ */
00297     AIC_EOICR = 0;
00298 }
00299
00300
00301 /*
00302  * Interrupt handler for timer counter TCKL2
00303  */
00304 DECLARE_ISR(stepper_tc2_irq)
00305 {
00306
00307     /*
00308      * Warning: when we read the status_reg register, we reset it.
00309      * That mean if is occur an interrupt event we can read only
00310      * the last that has been occur. To not miss an interrupt event
00311      * we save the status_reg register and then we read it.
00312      */
00313     uint32_t  status_reg = TC2_SR & TC2_IMR;
00314
00315     if (status_reg & BV(TC_CPAS))
00316         stepper_tc_tio_irq(&stepper_timers[TC_TIOA2]);
00317
00318     if (status_reg & BV(TC_CPBS))
00319         stepper_tc_tio_irq(&stepper_timers[TC_TIOB2]);
00320
00321     /* Inform hw that we have served the IRQ */
00322     AIC_EOICR = 0;
00323
00324 }
00325
00332 void stepper_tc_setup(int index, stepper_isr_t callback, struct Stepper *motor)
00333 {
00334     ASSERT(index < CONFIG_TC_STEPPER_MAX_NUM);
00335
00336     motor->timer = &stepper_timers[index];
00337
00338     //Disable PIO controller and enable TIO function
00339     TIO_PIO_PDR = BV(motor->timer->tio_pin);
00340     TIO_PIO_ABSR = BV(motor->timer->tio_pin);
00341
00342     /*
00343      * Sets timer counter in waveform mode.
00344      * We set as default:
00345      * - Waveform mode 00 (see datasheet for more detail.)
00346      * - Master clock prescaler to STEPPER_MCK_PRESCALER
00347      * - Set none external event
00348      * - Clear pin output on comp_reg
00349      * - None effect on reg C compare
00350      */
00351     *motor->timer->chl_mode_reg = BV(TC_WAVE);
00352     *motor->timer->chl_mode_reg |= motor->timer->ext_event_set;
00353     *motor->timer->chl_mode_reg &= ~TC_WAVSEL_MASK;
00354     *motor->timer->chl_mode_reg |= TC_WAVSEL_UP;
00355     *motor->timer->chl_mode_reg |= STEPPER_MCK_PRESCALER;
00356     *motor->timer->chl_mode_reg |= motor->timer->comp_effect_clear;
00357     *motor->timer->chl_mode_reg &= ~motor->timer->comp_effect_c_mask;
00358
00359     //Reset comp_reg and C compare register
00360     *motor->timer->comp_reg = 0;
00361     *motor->timer->comp_c_reg = 0;
00362
00363     //Register interrupt vector
00364     cpu_flags_t flags;
00365     IRQ_SAVE_DISABLE(flags);
00366
00367     /*
00368      * Warning: To guarantee a correct management of interrupt event, we must
00369      * trig the interrupt on level sensitive. This becouse, we have only a common
00370      * line for interrupt request, and if we have at the same time two interrupt
00371      * request could be that the is service normaly but the second will never
00372      *  been detected and interrupt will stay active but never serviced.
00373      */
00374     AIC_SVR(motor->timer->timer_id) = motor->timer->isr;
00375     AIC_SMR(motor->timer->timer_id) = AIC_SRCTYPE_INT_LEVEL_SENSITIVE;
00376     AIC_IECR = BV(motor->timer->timer_id);
00377
00378     // Disable interrupt on select timer counter
00379     stepper_tc_irq_disable(motor->timer);
00380
00381     IRQ_RESTORE(flags);
00382
00383     //Register callback
00384     motor->timer->callback = callback;
00385     motor->timer->motor = motor;
00386 }
00387
00391 void stepper_tc_init(void)
00392 {
00393     STEPPER_STROBE_INIT;
00394
00395     ASSERT(CONFIG_NUM_STEPPER_MOTORS <= CONFIG_TC_STEPPER_MAX_NUM);
00396
00397     /*
00398      * Enable timer counter:
00399      * - power on all timer counter
00400      * - disable all interrupt
00401      * - disable all external event/timer source
00402      */
00403     for (int i = 0; i < CONFIG_TC_STEPPER_MAX_NUM; i++)
00404     {
00405         PMC_PCER = BV(stepper_timers[i].timer_id);
00406         *stepper_timers[i].irq_disable_reg = 0xFFFFFFFF;
00407         TC_BMR = stepper_timers[i].blk_ctrl_set;
00408     }
00409
00410     /*
00411      * Enable timer counter and start it.
00412      */
00413     for (int i = 0; i < CONFIG_TC_STEPPER_MAX_NUM; i++)
00414         *stepper_timers[i].chl_ctrl_reg = (BV(TC_CLKEN) | BV(TC_SWTRG));
00415
00416 }
00417


BeRTOS: stepper_at91.h File Reference

  • cpu
  • arm
  • drv
Data Structures | Typedefs | Enumerations | Functions
stepper_at91.h File Reference

Stepper hardware-specific definitions. More...

#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <drv/stepper.h>
#include <io/arm.h>

Go to the source code of this file.

Data Structures

struct | TimerCounter
Timer contex structure. More...

Typedefs

typedef void(* | irq_t )(void)
IRQ callback function type definition.

Enumerations

enum
Setting master clock prescaler for all timer couter. More...

Functions

void | stepper_tc_irq_enable (struct TimerCounter *timer)
Enable interrupt for timer counter compare event.
void | stepper_tc_irq_disable (struct TimerCounter *timer)
Disable interrupt for timer counter compare event.
void | stepper_tc_setDelay (struct TimerCounter *timer, stepper_time_t delay)
Set delay for next interrupt compare event.
void | stepper_tc_resetTimer (struct TimerCounter *timer)
Set delay for next interrupt compare event.
void FAST_FUNC | stepper_tc_doPulse (struct TimerCounter *timer)
Programm timer counter to generate a pulse on select TIO output.
void FAST_FUNC | stepper_tc_skipPulse (struct TimerCounter *timer)
Programm timer counter to not generate a pulse on select TIO output.
void | stepper_tc_setup (int index, stepper_isr_t callback, struct Stepper *motor)
Timer couter setup.
void | stepper_tc_init (void)
Timer counter init.

Detailed Description

Stepper hardware-specific definitions.

Author:
Daniele Basile <asterix@develer.com>

Definition in file stepper_at91.h.

Enumeration Type Documentation

anonymous enum

Setting master clock prescaler for all timer couter.

You could choise one of these:

  • TC_CLKS_MCK2: Selects MCK / 2
  • TC_CLKS_MCK8: Selects MCK / 8
  • TC_CLKS_MCK32: Selects MCK / 32
  • TC_CLKS_MCK128: Selects MCK / 128
  • TC_CLKS_MCK1024: Selects MCK / 1024 Timer counter hw enumeration.

Definition at line 72 of file stepper_at91.h.

Function Documentation

void stepper_tc_setup | ( | int | index,
 |  | stepper_isr_t | callback,
 |  | struct Stepper * | motor
 | ) |  |

Timer couter setup.

This function apply to select timer couter all needed settings. Every settings are stored in stepper_timers[].

Timer couter setup.

Timer couter setup.

This function apply to select timer couter all needed settings. Every settings are stored in stepper_timers[].

Definition at line 332 of file stepper_at91.c.


BeRTOS: stepper_at91.h Source File

  • cpu
  • arm
  • drv
stepper_at91.h
Go to the documentation of this file.
00001
00040 #include <cfg/compiler.h>
00041 #include <cfg/macros.h>
00042 #include <drv/stepper.h>
00043 #include <io/arm.h>
00044
00055 #if STEPPER_PRESCALER_LOG2 == 1
00056     #define STEPPER_MCK_PRESCALER TC_CLKS_MCK2
00057 #elif STEPPER_PRESCALER_LOG2 == 3
00058     #define STEPPER_MCK_PRESCALER TC_CLKS_MCK8
00059 #elif STEPPER_PRESCALER_LOG2 == 5
00060     #define STEPPER_MCK_PRESCALER TC_CLKS_MCK32
00061 #elif STEPPER_PRESCALER_LOG2 == 7
00062     #define STEPPER_MCK_PRESCALER TC_CLKS_MCK128
00063 #elif STEPPER_PRESCALER_LOG2 == 10
00064     #define STEPPER_MCK_PRESCALER TC_CLKS_MCK1024
00065 #else
00066     #error Unsupported stepper prescaler value.
00067 #endif
00068
00072 enum
00073 {
00074     TC_TIOA0 = 0,
00075     TC_TIOB0,
00076     TC_TIOA1,
00077     TC_TIOB1,
00078     TC_TIOA2,
00079     TC_TIOB2,
00080
00081     TC_CNT
00082 };
00083
00087 typedef void (*irq_t)(void);
00088
00092 typedef struct TimerCounter
00093 {
00094     int timer_id;
00095     uint32_t blk_ctrl_set;
00096     reg32_t *chl_mode_reg;
00097     reg32_t *chl_ctrl_reg;
00098     reg32_t *comp_reg;
00099     reg32_t *comp_c_reg;
00100     reg32_t *count_val_reg;
00101     uint32_t comp_effect_mask;
00102     uint32_t comp_effect_set;
00103     uint32_t comp_effect_clear;
00104     uint32_t comp_effect_c_mask;
00105     uint32_t comp_effect_c_clear;
00106     uint32_t ext_event_set;
00107     reg32_t *irq_enable_reg;
00108     reg32_t *irq_disable_reg;
00109     uint32_t irq_set_mask;
00110     reg32_t *irq_mask_reg;
00111     irq_t isr;
00112     reg32_t *status_reg;
00113     int tio_pin;
00114     stepper_isr_t callback;
00115     struct Stepper *motor;
00116
00117 } TimerCounter;
00118
00122 INLINE void stepper_tc_irq_enable(struct TimerCounter *timer)
00123 {
00124     *timer->irq_enable_reg = timer->irq_set_mask;
00125 }
00126
00130 INLINE void  stepper_tc_irq_disable(struct TimerCounter *timer)
00131 {
00132     *timer->irq_disable_reg = timer->irq_set_mask;
00133 }
00134
00138 INLINE void  stepper_tc_setDelay(struct TimerCounter *timer, stepper_time_t delay)
00139 {
00140     *timer->comp_reg += delay;
00141 }
00142
00143
00147 INLINE void  stepper_tc_resetTimer(struct TimerCounter *timer)
00148 {
00149     *timer->comp_reg = 0;
00150 }
00151
00155 INLINE void FAST_FUNC stepper_tc_doPulse(struct TimerCounter *timer)
00156 {
00157     *timer->chl_mode_reg &= ~timer->comp_effect_mask;
00158     *timer->chl_mode_reg |= timer->comp_effect_set;
00159 }
00160
00164 INLINE void FAST_FUNC stepper_tc_skipPulse(struct TimerCounter *timer)
00165 {
00166     *timer->chl_mode_reg &= ~timer->comp_effect_mask;
00167 }
00168
00169 void stepper_tc_setup(int index, stepper_isr_t callback, struct Stepper *motor);
00170 void stepper_tc_init(void);
00171
00172 /*
00173  * Test the hardware timer counter on board.
00174  * This test generate a square waveform through irq, setting
00175  * the timer register.
00176  */
00177 void stepper_timer_test_brute(void);
00178 /*
00179  * Test the timer driver structure.
00180  * This test generate a square waveform through irq.
00181  * The irq callback is programmable, and all timer setting
00182  * are save in one data structure. Every pulse is generate through
00183  * a call of this irq callback.
00184  */
00185 void stepper_timer_test_prestepper(struct Stepper *local_motor, struct StepperConfig *local_cfg, int index);


BeRTOS: stepper_at91_hwtest.c File Reference

  • cpu
  • arm
  • drv
stepper_at91_hwtest.c File Reference

Low level test for stepper driver interface implementation. More...

#include "stepper_at91.h"
#include "cfg/cfg_stepper.h"
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <cpu/types.h>
#include <cpu/irq.h>
#include <io/arm.h>

Go to the source code of this file.

Detailed Description

Low level test for stepper driver interface implementation.

Author:
Daniele Basile <asterix@develer.com>

Definition in file stepper_at91_hwtest.c.


BeRTOS: stepper_at91_hwtest.c Source File

  • cpu
  • arm
  • drv
stepper_at91_hwtest.c
Go to the documentation of this file.
00001
00039 #include "stepper_at91.h"
00040
00041 #include "cfg/cfg_stepper.h"
00042 #include <cfg/macros.h>
00043 #include <cfg/debug.h>
00044
00045 #include <cpu/types.h>
00046 #include <cpu/irq.h>
00047
00048 #include <io/arm.h>
00049
00050
00051 #warning FIXME:This test is incomplete.. you MUST review..
00052
00053 #if 0
00054 static void stepper_test_irq_schedule(struct Stepper *motor, stepper_time_t delay)
00055 {
00056     stepper_tc_doPulse(motor->timer);
00057     stepper_tc_setDelay(motor->timer, delay);
00058 }
00059
00060 static void stepper_test_irq(struct Stepper *motor)
00061 {
00062
00063     stepper_test_irq_schedule(motor, 300);
00064 }
00065 /*
00066  * Test a timer couter driver
00067  */
00068 void stepper_timer_test_prestepper(struct Stepper *local_motor, struct StepperConfig *local_cfg, int index)
00069 {
00070     local_cfg->pulse = 300;
00071
00072     local_motor->cfg = local_cfg;
00073     stepper_tc_init(index, &stepper_test_irq, local_motor);
00074     stepper_tc_irq_enable(local_motor->timer);
00075 }
00076
00077
00078 bool su = true;
00079 bool sub = true;
00080 uint16_t periodo_st0 = 100;
00081 uint16_t periodo_st1 = 233;
00082
00083 static void tc_irq(void) __attribute__ ((interrupt));
00084 static void tc_irq(void)
00085 {
00086     uint32_t status_reg = TC2_SR & TC2_IMR;
00087
00088     if (status_reg & BV(TC_CPAS))
00089     {
00090         TC2_CMR &= ~TC_ACPA_MASK;
00091         if (su)
00092         {
00093             TC2_CMR |= TC_ACPA_CLEAR_OUTPUT;
00094             TC2_RA += periodo_st0;
00095         }
00096         else
00097         {
00098             TC2_CMR |= TC_ACPA_SET_OUTPUT;
00099             TC2_RA += periodo_st1;
00100         }
00101         su = !su;
00102     }
00103     if (status_reg & BV(TC_CPBS))
00104     {
00105         TC2_CMR &= ~TC_BCPB_MASK ;
00106         if (sub)
00107         {
00108             TC2_CMR |= TC_BCPB_CLEAR_OUTPUT;
00109             TC2_RB += periodo_st0;
00110         }
00111         else
00112         {
00113             TC2_CMR |= TC_BCPB_SET_OUTPUT;
00114             TC2_RB += periodo_st1;
00115         }
00116         sub = !sub;
00117     }
00118     /* Inform hw that we have served the IRQ */
00119     AIC_EOICR = 0;
00120 }
00121
00122 /*
00123  * Test a timer couter hardware
00124  */
00125 void stepper_timer_test_brute(void)
00126 {
00127     PIOA_PDR |= BV(26) | BV(27);
00128     PIOA_BSR |= BV(26) | BV(27);
00129
00130     // Power on TCLK0
00131     PMC_PCER |= BV(TC2_ID);// | BV(TC1_ID) | BV(TC2_ID);
00132
00133     TC_BCR = 1;
00134     TC_BMR |= TC_NONEXC2;
00135
00136     // Select waveform mode
00137     TC2_CMR = BV(TC_WAVE);
00138
00139     TC2_CMR |= TC_EEVT_XC2;
00140     TC2_CMR |= TC_WAVSEL_UP;
00141     TC2_CMR |= TC_CLKS_MCK8;
00142
00143     //Set waveform on TIOA and TIOB
00144     TC2_CMR |= TC_ACPA_SET_OUTPUT;
00145     TC2_CMR |= TC_BCPB_SET_OUTPUT;
00146
00147
00148     //Reset all comp_reg register
00149     TC2_RA = 0;
00150     TC2_RB = 0;
00151
00152     cpuflags_t flags;
00153     IRQ_SAVE_DISABLE(flags);
00154
00155     /* Set the vector. */
00156     AIC_SVR(TC2_ID) = tc_irq;
00157     /* Initialize to edge triggered with defined priority. */
00158     AIC_SMR(TC2_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED;
00159     /* Enable the USART IRQ */
00160     AIC_IECR = BV(TC2_ID);
00161
00162     IRQ_RESTORE(flags);
00163
00164     // Disable all interrupt
00165     TC2_IDR = 0xFFFFFFFF;
00166
00167     //Enable interrupt on RA, RB
00168     TC2_IER = BV(TC_CPAS) | BV(TC_CPBS);
00169
00170     //Enable timer and trig it
00171     TC2_CCR = BV(TC_CLKEN) | BV(TC_SWTRG);
00172 }
00173 #endif
00174


BeRTOS: stepper_avr.c File Reference

  • cpu
  • avr
  • drv
Functions
stepper_avr.c File Reference

Low-level stepper timer module for AVR (inplementation). More...

#include "stepper_avr.h"
#include "cfg/cfg_stepper.h"
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <cpu/types.h>
#include <cpu/irq.h>

Go to the source code of this file.

Functions

void | stepper_tc_setup (int index, stepper_isr_t callback, struct Stepper *motor)
< Static array of timer counter struct for stepper.
void | stepper_tc_init (void)
Timer counter init.

Detailed Description

Low-level stepper timer module for AVR (inplementation).

Author:
Daniele Basile <asterix@develer.com>

Definition in file stepper_avr.c.

Function Documentation

void stepper_tc_setup | ( | int | index,
 |  | stepper_isr_t | callback,
 |  | struct Stepper * | motor
 | ) |  |

< Static array of timer counter struct for stepper.

Timer couter setup.

Timer couter setup.

This function apply to select timer couter all needed settings. Every settings are stored in stepper_timers[].

Definition at line 70 of file stepper_avr.c.


BeRTOS: stepper_avr.c Source File

  • cpu
  • avr
  • drv
stepper_avr.c
Go to the documentation of this file.
00001
00040 #include "stepper_avr.h"
00041
00042 #include "cfg/cfg_stepper.h"
00043 #include <cfg/macros.h>
00044 #include <cfg/debug.h>
00045
00046 #include <cpu/types.h>
00047 #include <cpu/irq.h>
00048
00049
00050 #warning TODO:This is an example, you must implement it!
00051
00053 /*
00054     static struct TimerCounter stepper_timers[CONFIG_TC_STEPPER_MAX_NUM] =
00055     {
00056         { //Timer Counter settings for TIO0 output pin
00057                 // fill with stepper timer channel settings
00058         }
00059
00060         // Add here other stepper timer channel settings
00061     };
00062 */
00063
00070 void stepper_tc_setup(int index, stepper_isr_t callback, struct Stepper *motor)
00071 {
00072     /* Put here the code to setup the stepper timer drive */
00073
00074     //Only for test remove when implement this function
00075     (void)index;
00076     (void)callback;
00077     (void)motor;
00078 }
00079
00083 void stepper_tc_init(void)
00084 {
00085     /* Put here the code to init the stepper timer drive */
00086 }
00087


BeRTOS: stepper_avr.h File Reference

  • cpu
  • avr
  • drv
Data Structures | Typedefs | Functions
stepper_avr.h File Reference

Low-level stepper timer module for AVR (inplementation). More...

#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <drv/stepper.h>

Go to the source code of this file.

Data Structures

struct | TimerCounter
Timer contex structure. More...

Typedefs

typedef void(* | irq_t )(void)
IRQ callback function type definition.

Functions

void | stepper_tc_irq_enable (struct TimerCounter *timer)
Enable interrupt for timer counter compare event.
void | stepper_tc_irq_disable (struct TimerCounter *timer)
Disable interrupt for timer counter compare event.
void | stepper_tc_setDelay (struct TimerCounter *timer, stepper_time_t delay)
Set delay for next interrupt compare event.
void | stepper_tc_resetTimer (struct TimerCounter *timer)
Set delay for next interrupt compare event.
void FAST_FUNC | stepper_tc_doPulse (struct TimerCounter *timer)
Programm timer counter to generate a pulse on select TIO output.
void FAST_FUNC | stepper_tc_skipPulse (struct TimerCounter *timer)
Programm timer counter to not generate a pulse on select TIO output.
void | stepper_tc_setup (int index, stepper_isr_t callback, struct Stepper *motor)
Timer couter setup.
void | stepper_tc_init (void)
Timer counter init.

Detailed Description

Low-level stepper timer module for AVR (inplementation).

Author:
Daniele Basile <asterix@develer.com>

Definition in file stepper_avr.h.

Function Documentation

void stepper_tc_setup | ( | int | index,
 |  | stepper_isr_t | callback,
 |  | struct Stepper * | motor
 | ) |  |

Timer couter setup.

This function apply to select timer couter all needed settings. Every settings are stored in stepper_timers[].

Timer couter setup.

Timer couter setup.

This function apply to select timer couter all needed settings. Every settings are stored in stepper_timers[].

Definition at line 332 of file stepper_at91.c.


BeRTOS: stepper_avr.h Source File

  • cpu
  • avr
  • drv
stepper_avr.h
Go to the documentation of this file.
00001
00040 #ifndef DRV_STEPPER_AVR_H
00041 #define DRV_STEPPER_AVR_H
00042
00043
00044 #include <cfg/compiler.h>
00045 #include <cfg/macros.h>
00046
00047 #include <drv/stepper.h>
00048
00049 #warning TODO:This is an example, you must implement it!
00050
00054 typedef void (*irq_t)(void);
00055
00059 typedef struct TimerCounter
00060 {
00061     int timer_id;
00062     irq_t isr;
00063     stepper_isr_t callback;
00064     struct Stepper *motor;
00065
00066 } TimerCounter;
00067
00071 INLINE void stepper_tc_irq_enable(struct TimerCounter *timer)
00072 {
00073         /* put here code to enable timer irq */
00074
00075         //Only for test remove when implement this function
00076         (void)timer;
00077 }
00078
00079
00083 INLINE void  stepper_tc_irq_disable(struct TimerCounter *timer)
00084 {
00085         /* put here code to disable timer irq */
00086
00087         //Only for test remove when implement this function
00088         (void)timer;
00089 }
00090
00094 INLINE void  stepper_tc_setDelay(struct TimerCounter *timer, stepper_time_t delay)
00095 {
00096         /* put here code to set the delay for next irq */
00097
00098         //Only for test remove when implement this function
00099         (void)timer;
00100         (void)delay;
00101 }
00102
00103
00107 INLINE void  stepper_tc_resetTimer(struct TimerCounter *timer)
00108 {
00109         /* put here code to reset the timer */
00110
00111         //Only for test remove when implement this function
00112         (void)timer;
00113 }
00114
00118 INLINE void FAST_FUNC stepper_tc_doPulse(struct TimerCounter *timer)
00119 {
00120         /* put here code to generate a pulse */
00121
00122         //Only for test remove when implement this function
00123         (void)timer;
00124 }
00125
00129 INLINE void FAST_FUNC stepper_tc_skipPulse(struct TimerCounter *timer)
00130 {
00131         /* put here code to skip a pulse */
00132
00133         //Only for test remove when implement this function
00134         (void)timer;
00135 }
00136
00137 void stepper_tc_setup(int index, stepper_isr_t callback, struct Stepper *motor);
00138 void stepper_tc_init(void);
00139
00140 #endif /*DRV_STEPPER_AVR_H */


BeRTOS: stm32.h File Reference

  • cpu
  • cortex-m3
  • io
stm32.h File Reference

STM32F10XX registers definition. More...

#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <cpu/types.h>
#include <io/stm32_memmap.h>
#include "stm32_nvic.h"
#include "stm32_ints.h"
#include "stm32_gpio.h"
#include "stm32_uart.h"
#include "stm32_adc.h"
#include "stm32_i2c.h"
#include "stm32_flash.h"

Go to the source code of this file.

Detailed Description

STM32F10XX registers definition.

Definition in file stm32.h.


BeRTOS: stm32.h Source File

  • cpu
  • cortex-m3
  • io
stm32.h
Go to the documentation of this file.
00001
00036 #ifndef STM32_H
00037 #define STM32_H
00038
00039 #include <cfg/compiler.h>
00040 #include <cfg/macros.h>
00041
00042 #include <cpu/types.h>
00043
00044 #include <io/stm32_memmap.h>
00045
00046 #include "stm32_nvic.h"
00047 #include "stm32_ints.h"
00048 #include "stm32_gpio.h"
00049 #include "stm32_uart.h"
00050 #include "stm32_adc.h"
00051 #include "stm32_i2c.h"
00052 #include "stm32_flash.h"
00053
00054 #if CPU_CM3_STM32F101C4
00055     #define GPIO_USART1_TX_PIN  BV(9)
00056     #define GPIO_USART1_RX_PIN  BV(10)
00057     #define GPIO_USART2_TX_PIN  BV(2)
00058     #define GPIO_USART2_RX_PIN  BV(3)
00059 #elif CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE
00060     #define GPIO_USART1_TX_PIN  BV(9)
00061     #define GPIO_USART1_RX_PIN  BV(10)
00062     #define GPIO_USART2_TX_PIN  BV(2)
00063     #define GPIO_USART2_RX_PIN  BV(3)
00064     #define GPIO_USART3_TX_PIN  BV(10)
00065     #define GPIO_USART3_RX_PIN  BV(11)
00066 #else
00067     #error No USART pins are defined for select cpu
00068 #endif
00069
00070 #if CPU_CM3_STM32F101C4
00071     #define GPIO_I2C1_SCL_PIN   BV(6)
00072     #define GPIO_I2C1_SDA_PIN   BV(7)
00073 #elif CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE
00074     #define GPIO_I2C1_SCL_PIN   BV(6)
00075     #define GPIO_I2C1_SDA_PIN   BV(7)
00076     #define GPIO_I2C2_SCL_PIN   BV(10)
00077     #define GPIO_I2C2_SDA_PIN   BV(11)
00078 #else
00079     #error No i2c pins are defined for select cpu
00080 #endif
00081
00082 #if CPU_CM3_STM32F101C4 || CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE
00083     #define FLASH_PAGE_SIZE   1024
00084 #else
00085     #error No embedded definition for select cpu
00086 #endif
00087
00088 #endif /* STM32_H */


BeRTOS: stm32_adc.h File Reference

  • cpu
  • cortex-m3
  • io
stm32_adc.h File Reference

STM32F103xx adc definition. More...

#include <cpu/types.h>

Go to the source code of this file.

Detailed Description

STM32F103xx adc definition.

Definition in file stm32_adc.h.


BeRTOS: stm32_adc.h Source File

  • cpu
  • cortex-m3
  • io
stm32_adc.h
Go to the documentation of this file.
00001
00036 #ifndef STM32_ADC_H
00037 #define STM32_ADC_H
00038
00039 #include <cpu/types.h>
00040
00041 /* ADC dual mode */
00042 #define ADC_MODE_INDEPENDENT                       ((uint32_t)0x00000000)
00043 #define ADC_MODE_REGINJECSIMULT                    ((uint32_t)0x00010000)
00044 #define ADC_MODE_REGSIMULT_ALTERTRIG               ((uint32_t)0x00020000)
00045 #define ADC_MODE_INJECSIMULT_FASTINTERL            ((uint32_t)0x00030000)
00046 #define ADC_MODE_INJECSIMULT_SLOWINTERL            ((uint32_t)0x00040000)
00047 #define ADC_MODE_INJECSIMULT                       ((uint32_t)0x00050000)
00048 #define ADC_MODE_REGSIMULT                         ((uint32_t)0x00060000)
00049 #define ADC_MODE_FASTINTERL                        ((uint32_t)0x00070000)
00050 #define ADC_MODE_SLOWINTERL                        ((uint32_t)0x00080000)
00051 #define ADC_MODE_ALTERTRIG                         ((uint32_t)0x00090000)
00052
00053 /* ADC extrenal trigger sources for regular channels conversion */
00054 #define ADC_EXTERNALTRIGCONV_T1_CC1                ((uint32_t)0x00000000)
00055 #define ADC_EXTERNALTRIGCONV_T1_CC2                ((uint32_t)0x00020000)
00056 #define ADC_EXTERNALTRIGCONV_T1_CC3                ((uint32_t)0x00040000)
00057 #define ADC_EXTERNALTRIGCONV_T2_CC2                ((uint32_t)0x00060000)
00058 #define ADC_EXTERNALTRIGCONV_T3_TRGO               ((uint32_t)0x00080000)
00059 #define ADC_EXTERNALTRIGCONV_T4_CC4                ((uint32_t)0x000A0000)
00060 #define ADC_EXTERNALTRIGCONV_EXT_IT11              ((uint32_t)0x000C0000)
00061 #define ADC_EXTERNALTRIGCONV_NONE                  ((uint32_t)0x000E0000)
00062
00063 /* ADC data align */
00064 #define ADC_DATAALIGN_RIGHT                        ((uint32_t)0x00000000)
00065 #define ADC_DATAALIGN_LEFT                         ((uint32_t)0x00000800)
00066
00067 /* ADC channels */
00068 #define ADC_CHANNEL_0                               ((uint8_t)0x00)
00069 #define ADC_CHANNEL_1                               ((uint8_t)0x01)
00070 #define ADC_CHANNEL_2                               ((uint8_t)0x02)
00071 #define ADC_CHANNEL_3                               ((uint8_t)0x03)
00072 #define ADC_CHANNEL_4                               ((uint8_t)0x04)
00073 #define ADC_CHANNEL_5                               ((uint8_t)0x05)
00074 #define ADC_CHANNEL_6                               ((uint8_t)0x06)
00075 #define ADC_CHANNEL_7                               ((uint8_t)0x07)
00076 #define ADC_CHANNEL_8                               ((uint8_t)0x08)
00077 #define ADC_CHANNEL_9                               ((uint8_t)0x09)
00078 #define ADC_CHANNEL_10                              ((uint8_t)0x0A)
00079 #define ADC_CHANNEL_11                              ((uint8_t)0x0B)
00080 #define ADC_CHANNEL_12                              ((uint8_t)0x0C)
00081 #define ADC_CHANNEL_13                              ((uint8_t)0x0D)
00082 #define ADC_CHANNEL_14                              ((uint8_t)0x0E)
00083 #define ADC_CHANNEL_15                              ((uint8_t)0x0F)
00084 #define ADC_CHANNEL_16                              ((uint8_t)0x10)
00085 #define ADC_CHANNEL_17                              ((uint8_t)0x11)
00086
00087 /* ADC sampling times */
00088 #define ADC_SAMPLETIME_1CYCLES5                    ((uint8_t)0x00)
00089 #define ADC_SAMPLETIME_7CYCLES5                    ((uint8_t)0x01)
00090 #define ADC_SAMPLETIME_13CYCLES5                   ((uint8_t)0x02)
00091 #define ADC_SAMPLETIME_28CYCLES5                   ((uint8_t)0x03)
00092 #define ADC_SAMPLETIME_41CYCLES5                   ((uint8_t)0x04)
00093 #define ADC_SAMPLETIME_55CYCLES5                   ((uint8_t)0x05)
00094 #define ADC_SAMPLETIME_71CYCLES5                   ((uint8_t)0x06)
00095 #define ADC_SAMPLETIME_239CYCLES5                  ((uint8_t)0x07)
00096
00097 /* ADC extrenal trigger sources for injected channels conversion */
00098 #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO          ((uint32_t)0x00000000)
00099 #define ADC_EXTERNALTRIGINJECCONV_T1_CC4           ((uint32_t)0x00001000)
00100 #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO          ((uint32_t)0x00002000)
00101 #define ADC_EXTERNALTRIGINJECCONV_T2_CC1           ((uint32_t)0x00003000)
00102 #define ADC_EXTERNALTRIGINJECCONV_T3_CC4           ((uint32_t)0x00004000)
00103 #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO          ((uint32_t)0x00005000)
00104 #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15         ((uint32_t)0x00006000)
00105 #define ADC_EXTERNALTRIGINJECCONV_NONE             ((uint32_t)0x00007000)
00106
00107 /* ADC injected channel selection */
00108 #define ADC_INJECTEDCHANNEL_1                       ((uint8_t)0x14)
00109 #define ADC_INJECTEDCHANNEL_2                       ((uint8_t)0x18)
00110 #define ADC_INJECTEDCHANNEL_3                       ((uint8_t)0x1C)
00111 #define ADC_INJECTEDCHANNEL_4                       ((uint8_t)0x20)
00112
00113 /* ADC analog watchdog selection */
00114 #define ADC_ANALOGWATCHDOG_SINGLEREGENABLE         ((uint32_t)0x00800200)
00115 #define ADC_ANALOGWATCHDOG_SINGLEINJECENABLE       ((uint32_t)0x00400200)
00116 #define ADC_ANALOGWATCHDOG_SINGLEREGORINJECENABLE  ((uint32_t)0x00C00200)
00117 #define ADC_ANALOGWATCHDOG_ALLREGENABLE            ((uint32_t)0x00800000)
00118 #define ADC_ANALOGWATCHDOG_ALLINJECENABLE          ((uint32_t)0x00400000)
00119 #define ADC_ANALOGWATCHDOG_ALLREGALLINJECENABLE    ((uint32_t)0x00C00000)
00120 #define ADC_ANALOGWATCHDOG_NONE                    ((uint32_t)0x00000000)
00121
00122 /* ADC interrupts definition */
00123 #define ADC_IT_EOC                                 ((uint16_t)0x0220)
00124 #define ADC_IT_AWD                                 ((uint16_t)0x0140)
00125 #define ADC_IT_JEOC                                ((uint16_t)0x0480)
00126
00127 /* ADC flags definition */
00128 #define ADC_FLAG_AWD                               ((uint8_t)0x01)
00129 #define ADC_FLAG_EOC                               ((uint8_t)0x02)
00130 #define ADC_FLAG_JEOC                              ((uint8_t)0x04)
00131 #define ADC_FLAG_JSTRT                             ((uint8_t)0x08)
00132 #define ADC_FLAG_STRT                              ((uint8_t)0X10)
00133
00134
00135 /* ADC ADON mask */
00136 #define CR2_ADON_SET               ((uint32_t)0x00000001)
00137 #define CR2_ADON_RESET             ((uint32_t)0xFFFFFFFE)
00138
00139 /* ADC DMA mask */
00140 #define CR2_DMA_SET                ((uint16_t)0x0100)
00141 #define CR2_DMA_RESET              ((uint16_t)0xFEFF)
00142
00143 /* ADC RSTCAL mask */
00144 #define CR2_RSTCAL_SET             ((uint16_t)0x0008)
00145
00146 /* ADC CAL mask */
00147 #define CR2_CAL_SET                ((uint16_t)0x0004)
00148
00149 /* ADC SWSTRT mask */
00150 #define CR2_SWSTRT_SET             ((uint32_t)0x00400000)
00151
00152 /* ADC DISCNUM mask */
00153 #define CR1_DISCNUM_RESET          ((uint32_t)0xFFFF1FFF)
00154
00155 /* ADC DISCEN mask */
00156 #define CR1_DISCEN_SET             ((uint32_t)0x00000800)
00157 #define CR1_DISCEN_RESET           ((uint32_t)0xFFFFF7FF)
00158
00159 /* ADC EXTTRIG mask */
00160 #define CR2_EXTTRIG_SET            ((uint32_t)0x00100000)
00161 #define CR2_EXTTRIG_RESET          ((uint32_t)0xFFEFFFFF)
00162
00163 /* ADC Software start mask */
00164 #define CR2_EXTTRIG_SWSTRT_SET     ((uint32_t)0x00500000)
00165 #define CR2_EXTTRIG_SWSTRT_RESET   ((uint32_t)0xFFAFFFFF)
00166
00167 /* ADC JAUTO mask */
00168 #define CR1_JAUTO_SET              ((uint32_t)0x00000400)
00169 #define CR1_JAUTO_RESET            ((uint32_t)0xFFFFFBFF)
00170
00171 /* ADC JDISCEN mask */
00172 #define CR1_JDISCEN_SET            ((uint32_t)0x00001000)
00173 #define CR1_JDISCEN_RESET          ((uint32_t)0xFFFFEFFF)
00174
00175 /* ADC JEXTSEL mask */
00176 #define CR2_JEXTSEL_RESET          ((uint32_t)0xFFFF8FFF)
00177
00178 /* ADC JEXTTRIG mask */
00179 #define CR2_JEXTTRIG_SET           ((uint32_t)0x00008000)
00180 #define CR2_JEXTTRIG_RESET         ((uint32_t)0xFFFF7FFF)
00181
00182 /* ADC JSWSTRT mask */
00183 #define CR2_JSWSTRT_SET            ((uint32_t)0x00200000)
00184
00185 /* ADC injected software start mask */
00186 #define CR2_JEXTTRIG_JSWSTRT_SET   ((uint32_t)0x00208000)
00187 #define CR2_JEXTTRIG_JSWSTRT_RESET ((uint32_t)0xFFDF7FFF)
00188
00189 /* ADC AWDCH mask */
00190 #define CR1_AWDCH_RESET            ((uint32_t)0xFFFFFFE0)
00191
00192 /* ADC SQx mask */
00193 #define SQR3_SQ_MASK                ((uint8_t)0x1F)
00194 #define SQR2_SQ_MASK                ((uint8_t)0x1F)
00195 #define SQR1_SQ_MASK                ((uint8_t)0x1F)
00196 #define SQR1_SQ_LEN_MASK                       0xF
00197 #define SQR1_SQ_LEN_SHIFT                       20
00198
00199 /* ADC JSQx mask */
00200 #define JSQR_JSQ_SET               ((uint8_t)0x1F)
00201
00202 /* ADC JL mask */
00203 #define JSQR_JL_RESET              ((uint32_t)0xFFCFFFFF)
00204
00205 /* ADC SMPx mask */
00206 #define SMPR1_SMP_SET              ((uint8_t)0x07)
00207 #define SMPR2_SMP_SET              ((uint8_t)0x07)
00208
00209 /* ADC Analog watchdog enable mode mask */
00210 #define CR1_AWDMODE_RESET          ((uint32_t)0xFF3FFDFF)
00211
00212 /* ADC TSPD mask */
00213 #define CR2_TSVREFE_SET            ((uint32_t)0x00800000)
00214 #define CR2_TSVREFE_RESET          ((uint32_t)0xFF7FFFFF)
00215
00216 /* ADC JDRx registers= offset */
00217 #define JDR_OFFSET                 ((uint8_t)0x28)
00218
00219 /* ADC CR1 register */
00220 #define CR1_EOCIE                                      5
00221 #define CR1_AWDIE                                      6
00222 #define CR1_JEOCIE                                     7
00223 #define CR1_SCAN                                       8
00224 #define CR1_AWDSGL                                     9
00225 #define CR1_JAUTO                                     10
00226 #define CR1_DISCEN                                    11
00227 #define CR1_JDISCEN                                   12
00228 #define CR1_JAWDEN                                    22
00229 #define CR1_AWDEN                                     23
00230
00231 /* ADC CR2 register */
00232 #define CR2_ADON                                       0
00233 #define CR2_CONT                                       1
00234 #define CR2_CAL                                        2
00235 #define CR2_RTSCAL                                     3
00236 #define CR2_DMA                                        8
00237 #define CR2_ALIGN                                     11
00238 #define CR2_JEXTTRIG                                  15
00239 #define CR2_EXTTRIG                                   20
00240 #define CR2_JSWSTART                                  21
00241 #define CR2_SWSTART                                   22
00242 #define CR2_TSVREFE                                   23
00243
00244 /* ADC status */
00245 #define SR_AWD                                         0
00246 #define SR_EOC                                         1
00247 #define SR_JEOC                                        2
00248 #define SR_JSTRT                                       3
00249 #define SR_STRT                                        4
00250
00251 /* ADC sample time */
00252 #define SMPR1_CH17                                    21
00253 #define SMPR1_CH16                                    18
00254 #define SMPR1_CH15                                    15
00255 #define SMPR1_CH14                                    12
00256 #define SMPR1_CH13                                     9
00257 #define SMPR1_CH12                                     6
00258 #define SMPR1_CH11                                     3
00259 #define SMPR1_CH10                                     0
00260
00261 #define SMPR2_CH9                                     27
00262 #define SMPR2_CH8                                     24
00263 #define SMPR2_CH7                                     21
00264 #define SMPR2_CH6                                     18
00265 #define SMPR2_CH5                                     15
00266 #define SMPR2_CH4                                     12
00267 #define SMPR2_CH3                                      9
00268 #define SMPR2_CH2                                      6
00269 #define SMPR2_CH1                                      3
00270 #define SMPR2_CH0                                      0
00271
00272 /* ADC registers Masks */
00273 #define CR1_ADC_CLEAR_MASK             ((uint32_t)0xFFF0FEFF)
00274 #define CR2_ADC_CLEAR_MASK             ((uint32_t)0xFFF1F7FD)
00275 #define SQR1_CLEAR_MASK                ((uint32_t)0xFF0FFFFF)
00276
00277
00278
00279 /* ADC defines for SMT32F103Bxx */
00280 #define ADC_TEMP_V25         4300  // uV / C
00281 #define ADC_TEMP_SLOPE       1430  // mV
00282 #define ADC_TEMP_CONST      25000
00283 #define ADC_TEMP_CH            16
00284 #define ADC_VREFINT_CH         17
00285
00286 struct stm32_adc
00287 {
00288     reg32_t SR;
00289     reg32_t CR1;
00290     reg32_t CR2;
00291     reg32_t SMPR1;
00292     reg32_t SMPR2;
00293     reg32_t JOFR1;
00294     reg32_t JOFR2;
00295     reg32_t JOFR3;
00296     reg32_t JOFR4;
00297     reg32_t HTR;
00298     reg32_t LTR;
00299     reg32_t SQR1;
00300     reg32_t SQR2;
00301     reg32_t SQR3;
00302     reg32_t JSQR;
00303     reg32_t JDR1;
00304     reg32_t JDR2;
00305     reg32_t JDR3;
00306     reg32_t JDR4;
00307     reg32_t DR;
00308 };
00309
00310 #endif /* STM32_ADC_H */


BeRTOS: stm32_flash.h File Reference

  • cpu
  • cortex-m3
  • io
Data Structures | Defines
stm32_flash.h File Reference

STM32F103xx Embedded flash definition. More...

#include <cfg/compiler.h>
#include <cpu/types.h>

Go to the source code of this file.

Data Structures

struct | stm32_flash
Embbeded flash configuration registers structure. More...

Defines

#define | F_SIZE ((*(reg32_t *) 0x1FFFF7E0) & 0xFFFF)
Return the embedded flash size in kB.

Detailed Description

STM32F103xx Embedded flash definition.

Definition in file stm32_flash.h.


BeRTOS: stm32_flash.h Source File

  • cpu
  • cortex-m3
  • io
stm32_flash.h
Go to the documentation of this file.
00001
00036 #ifndef STM32_FLASH_H
00037 #define STM32_FLASH_H
00038
00039 #include <cfg/compiler.h>
00040
00041 #include <cpu/types.h>
00042
00044 #define F_SIZE                   ((*(reg32_t *) 0x1FFFF7E0) & 0xFFFF)
00045
00046
00047 /* Flash Access Control Register bits */
00048 #define ACR_LATENCY_MASK         ((uint32_t)0x00000038)
00049 #define ACR_HLFCYA_MASK          ((uint32_t)0xFFFFFFF7)
00050 #define ACR_PRFTBE_MASK          ((uint32_t)0xFFFFFFEF)
00051
00052 /* Flash Access Control Register bits */
00053 #define ACR_PRFTBS_MASK          ((uint32_t)0x00000020)
00054
00055 /* Flash Control Register bits */
00056 #define CR_PG_SET                ((uint32_t)0x00000001)
00057 #define CR_PG_RESET              ((uint32_t)0x00001FFE)
00058
00059 #define CR_PER_SET               ((uint32_t)0x00000002)
00060 #define CR_PER_RESET             ((uint32_t)0x00001FFD)
00061
00062 #define CR_MER_SET               ((uint32_t)0x00000004)
00063 #define CR_MER_RESET             ((uint32_t)0x00001FFB)
00064
00065 #define CR_OPTPG_SET             ((uint32_t)0x00000010)
00066 #define CR_OPTPG_RESET           ((uint32_t)0x00001FEF)
00067
00068 #define CR_OPTER_SET             ((uint32_t)0x00000020)
00069 #define CR_OPTER_RESET           ((uint32_t)0x00001FDF)
00070
00071 #define CR_STRT_SET              ((uint32_t)0x00000040)
00072
00073 #define CR_LOCK_SET              ((uint32_t)0x00000080)
00074
00075 /* FLASH Mask */
00076 #define RDPRT_MASK               ((uint32_t)0x00000002)
00077 #define WRP0_MASK                ((uint32_t)0x000000FF)
00078 #define WRP1_MASK                ((uint32_t)0x0000FF00)
00079 #define WRP2_MASK                ((uint32_t)0x00FF0000)
00080 #define WRP3_MASK                ((uint32_t)0xFF000000)
00081
00082 /* FLASH Keys */
00083 #define RDP_KEY                  ((uint16_t)0x00A5)
00084 #define FLASH_KEY1               ((uint32_t)0x45670123)
00085 #define FLASH_KEY2               ((uint32_t)0xCDEF89AB)
00086
00087 /* Flash Latency */
00088 #define FLASH_LATENCY_0                ((uint32_t)0x00000000)  /* FLASH Zero Latency cycle */
00089 #define FLASH_LATENCY_1                ((uint32_t)0x00000001)  /* FLASH One Latency cycle */
00090 #define FLASH_LATENCY_2                ((uint32_t)0x00000002)  /* FLASH Two Latency cycles */
00091
00092 /* Half Cycle Enable/Disable */
00093 #define FLASH_HALFCYCLEACCESS_ENABLE   ((uint32_t)0x00000008)  /* FLASH Half Cycle Enable */
00094 #define FLASH_HALFCYCLEACCESS_DISABLE  ((uint32_t)0x00000000)  /* FLASH Half Cycle Disable */
00095
00096 /* Prefetch Buffer Enable/Disable */
00097 #define FLASH_PREFETCHBUFFER_ENABLE    ((uint32_t)0x00000010)  /* FLASH Prefetch Buffer Enable */
00098 #define FLASH_PREFETCHBUFFER_DISABLE   ((uint32_t)0x00000000)  /* FLASH Prefetch Buffer Disable */
00099
00100 /* Option Bytes Write Protection */
00101 #define FLASH_WRPROT_PAGES0TO3      ((uint32_t)0x00000001) /* Write protection of page 0 to 3 */
00102 #define FLASH_WRPROT_PAGES4TO7      ((uint32_t)0x00000002) /* Write protection of page 4 to 7 */
00103 #define FLASH_WRPROT_PAGES8TO11     ((uint32_t)0x00000004) /* Write protection of page 8 to 11 */
00104 #define FLASH_WRPROT_PAGES12TO15    ((uint32_t)0x00000008) /* Write protection of page 12 to 15 */
00105 #define FLASH_WRPROT_PAGES16TO19    ((uint32_t)0x00000010) /* Write protection of page 16 to 19 */
00106 #define FLASH_WRPROT_PAGES20TO23    ((uint32_t)0x00000020) /* Write protection of page 20 to 23 */
00107 #define FLASH_WRPROT_PAGES24TO27    ((uint32_t)0x00000040) /* Write protection of page 24 to 27 */
00108 #define FLASH_WRPROT_PAGES28TO31    ((uint32_t)0x00000080) /* Write protection of page 28 to 31 */
00109 #define FLASH_WRPROT_PAGES32TO35    ((uint32_t)0x00000100) /* Write protection of page 32 to 35 */
00110 #define FLASH_WRPROT_PAGES36TO39    ((uint32_t)0x00000200) /* Write protection of page 36 to 39 */
00111 #define FLASH_WRPROT_PAGES40TO43    ((uint32_t)0x00000400) /* Write protection of page 40 to 43 */
00112 #define FLASH_WRPROT_PAGES44TO47    ((uint32_t)0x00000800) /* Write protection of page 44 to 47 */
00113 #define FLASH_WRPROT_PAGES48TO51    ((uint32_t)0x00001000) /* Write protection of page 48 to 51 */
00114 #define FLASH_WRPROT_PAGES52TO55    ((uint32_t)0x00002000) /* Write protection of page 52 to 55 */
00115 #define FLASH_WRPROT_PAGES56TO59    ((uint32_t)0x00004000) /* Write protection of page 56 to 59 */
00116 #define FLASH_WRPROT_PAGES60TO63    ((uint32_t)0x00008000) /* Write protection of page 60 to 63 */
00117 #define FLASH_WRPROT_PAGES64TO67    ((uint32_t)0x00010000) /* Write protection of page 64 to 67 */
00118 #define FLASH_WRPROT_PAGES68TO71    ((uint32_t)0x00020000) /* Write protection of page 68 to 71 */
00119 #define FLASH_WRPROT_PAGES72TO75    ((uint32_t)0x00040000) /* Write protection of page 72 to 75 */
00120 #define FLASH_WRPROT_PAGES76TO79    ((uint32_t)0x00080000) /* Write protection of page 76 to 79 */
00121 #define FLASH_WRPROT_PAGES80TO83    ((uint32_t)0x00100000) /* Write protection of page 80 to 83 */
00122 #define FLASH_WRPROT_PAGES84TO87    ((uint32_t)0x00200000) /* Write protection of page 84 to 87 */
00123 #define FLASH_WRPROT_PAGES88TO91    ((uint32_t)0x00400000) /* Write protection of page 88 to 91 */
00124 #define FLASH_WRPROT_PAGES92TO95    ((uint32_t)0x00800000) /* Write protection of page 92 to 95 */
00125 #define FLASH_WRPROT_PAGES96TO99    ((uint32_t)0x01000000) /* Write protection of page 96 to 99 */
00126 #define FLASH_WRPROT_PAGES100TO103  ((uint32_t)0x02000000) /* Write protection of page 100 to 103 */
00127 #define FLASH_WRPROT_PAGES104TO107  ((uint32_t)0x04000000) /* Write protection of page 104 to 107 */
00128 #define FLASH_WRPROT_PAGES108TO111  ((uint32_t)0x08000000) /* Write protection of page 108 to 111 */
00129 #define FLASH_WRPROT_PAGES112TO115  ((uint32_t)0x10000000) /* Write protection of page 112 to 115 */
00130 #define FLASH_WRPROT_PAGES116TO119  ((uint32_t)0x20000000) /* Write protection of page 115 to 119 */
00131 #define FLASH_WRPROT_PAGES120TO123  ((uint32_t)0x40000000) /* Write protection of page 120 to 123 */
00132 #define FLASH_WRPROT_PAGES124TO127  ((uint32_t)0x80000000) /* Write protection of page 124 to 127 */
00133 #define FLASH_WRPROT_ALLPAGES       ((uint32_t)0xFFFFFFFF) /* Write protection All Pages */
00134
00135 /* Option Bytes IWatchdog */
00136 #define OB_IWDG_SW                  ((uint16_t)0x0001)  /* Software IWDG selected */
00137 #define OB_IWDG_HW                  ((uint16_t)0x0000)  /* Hardware IWDG selected */
00138
00139 /* Option Bytes nRST_STOP */
00140 #define OB_STOP_NORST               ((uint16_t)0x0002) /* No reset generated when entering in STOP */
00141 #define OB_STOP_RST                 ((uint16_t)0x0000) /* Reset generated when entering in STOP */
00142
00143 /* Option Bytes nRST_STDBY */
00144 #define OB_STDBY_NORST              ((uint16_t)0x0004) /* No reset generated when entering in STANDBY */
00145 #define OB_STDBY_RST                ((uint16_t)0x0000) /* Reset generated when entering in STANDBY */
00146
00147 /* FLASH Interrupts */
00148 #define FLASH_IT_ERROR           ((uint32_t)0x00000400)  /* FPEC error interrupt source */
00149 #define FLASH_IT_EOP             ((uint32_t)0x00001000)  /* End of FLASH Operation Interrupt source */
00150
00151 /* FLASH Flags */
00152 #define FLASH_FLAG_BSY           ((uint32_t)0x00000001)  /* FLASH Busy flag */
00153 #define FLASH_FLAG_EOP           ((uint32_t)0x00000020)  /* FLASH End of Operation flag */
00154 #define FLASH_FLAG_PGERR         ((uint32_t)0x00000004)  /* FLASH Program error flag */
00155 #define FLASH_FLAG_WRPRTERR      ((uint32_t)0x00000010)  /* FLASH Write protected error flag */
00156 #define FLASH_FLAG_OPTERR        ((uint32_t)0x00000001)  /* FLASH Option Byte error flag */
00157
00158
00159
00163 struct stm32_flash
00164 {
00165   reg32_t ACR;
00166   reg32_t KEYR;
00167   reg32_t OPTKEYR;
00168   reg32_t SR;
00169   reg32_t CR;
00170   reg32_t AR;
00171   reg32_t RESERVED;
00172   reg32_t OBR;
00173   reg32_t WRPR;
00174 };
00175
00176 #endif /* STM32_FLASH_H */


BeRTOS: stm32_gpio.h File Reference

  • cpu
  • cortex-m3
  • io
Data Structures
stm32_gpio.h File Reference

STM32F103xx GPIO definition. More...

#include <cpu/types.h>

Go to the source code of this file.

Data Structures

struct stm32_gpio
GPIO configuration registers structure. More...

Detailed Description

STM32F103xx GPIO definition.

Definition in file stm32_gpio.h.


BeRTOS: stm32_gpio.h Source File

  • cpu
  • cortex-m3
  • io
stm32_gpio.h
Go to the documentation of this file.
00001
00036 #ifndef STM32_GPIO_H
00037 #define STM32_GPIO_H
00038
00039 #include <cpu/types.h>
00040
00044 struct stm32_gpio
00045 {
00046     reg32_t CRL;
00047     reg32_t CRH;
00048     reg32_t IDR;
00049     reg32_t ODR;
00050     reg32_t BSRR;
00051     reg32_t BRR;
00052     reg32_t LCKR;
00053 };
00054
00055 #endif /* STM32_GPIO_H */


BeRTOS: stm32_i2c.h File Reference

  • cpu
  • cortex-m3
  • io
stm32_i2c.h File Reference

STM32F103xx I2C definition. More...

#include <cpu/types.h>

Go to the source code of this file.

Detailed Description

STM32F103xx I2C definition.

Definition in file stm32_i2c.h.


BeRTOS: stm32_i2c.h Source File

  • cpu
  • cortex-m3
  • io
stm32_i2c.h
Go to the documentation of this file.
00001
00036 #ifndef STM32_I2C_H
00037 #define STM32_I2C_H
00038
00039 #include <cpu/types.h>
00040
00041
00042 /* I2C_modes */
00043 #define I2C_MODE_I2C                    ((uint16_t)0x0000)
00044 #define I2C_MODE_SMBUSDEVICE            ((uint16_t)0x0002)
00045 #define I2C_MODE_SMBUSHOST              ((uint16_t)0x000A)
00046
00047 /* I2C_duty_cycle_in_fast_mode */
00048 #define I2C_DUTYCYCLE_16_9              ((uint16_t)0x4000)
00049 #define I2C_DUTYCYCLE_2                 ((uint16_t)0xBFFF)
00050
00051 /* I2C_cknowledgementy */
00052 #define I2C_ACK_ENABLE                  ((uint16_t)0x0400)
00053 #define I2C_ACK_DISABLE                 ((uint16_t)0x0000)
00054
00055 /* I2C_transfer_direction */
00056 #define I2C_DIRECTION_TRANSMITTER      ((uint8_t)0x00)
00057 #define I2C_DIRECTION_RECEIVER         ((uint8_t)0x01)
00058
00059 /* I2C_acknowledged_address_defines  */
00060 #define I2C_ACKNOWLEDGEDADDRESS_7BIT    ((uint16_t)0x4000)
00061 #define I2C_ACKNOWLEDGEDADDRESS_10BIT   ((uint16_t)0xC000)
00062
00063 /* I2C_registers */
00064 #define I2C_REGISTER_CR1                ((uint8_t)0x00)
00065 #define I2C_REGISTER_CR2                ((uint8_t)0x04)
00066 #define I2C_REGISTER_OAR1               ((uint8_t)0x08)
00067 #define I2C_REGISTER_OAR2               ((uint8_t)0x0C)
00068 #define I2C_REGISTER_DR                 ((uint8_t)0x10)
00069 #define I2C_REGISTER_SR1                ((uint8_t)0x14)
00070 #define I2C_REGISTER_SR2                ((uint8_t)0x18)
00071 #define I2C_REGISTER_CCR                ((uint8_t)0x1C)
00072 #define I2C_REGISTER_TRISE              ((uint8_t)0x20)
00073
00074 /* I2C_SMBus_alert_pin_level  */
00075 #define I2C_SMBUSALERT_LOW              ((uint16_t)0x2000)
00076 #define I2C_SMBUSALERT_HIGH             ((uint16_t)0xDFFF)
00077
00078 /* I2C_PEC_position  */
00079 #define I2C_PECPOSITION_NEXT            ((uint16_t)0x0800)
00080 #define I2C_PECPOSITION_CURRENT         ((uint16_t)0xF7FF)
00081
00082 /* I2C_interrupts_definition  */
00083 #define I2C_IT_BUF                      ((uint16_t)0x0400)
00084 #define I2C_IT_EVT                      ((uint16_t)0x0200)
00085 #define I2C_IT_ERR                      ((uint16_t)0x0100)
00086
00087 /* I2C_interrupts_definition  */
00088 #define I2C_IT_SMBALERT                 ((uint32_t)0x01008000)
00089 #define I2C_IT_TIMEOUT                  ((uint32_t)0x01004000)
00090 #define I2C_IT_PECERR                   ((uint32_t)0x01001000)
00091 #define I2C_IT_OVR                      ((uint32_t)0x01000800)
00092 #define I2C_IT_AF                       ((uint32_t)0x01000400)
00093 #define I2C_IT_ARLO                     ((uint32_t)0x01000200)
00094 #define I2C_IT_BERR                     ((uint32_t)0x01000100)
00095 #define I2C_IT_TXE                      ((uint32_t)0x06000080)
00096 #define I2C_IT_RXNE                     ((uint32_t)0x06000040)
00097 #define I2C_IT_STOPF                    ((uint32_t)0x02000010)
00098 #define I2C_IT_ADD10                    ((uint32_t)0x02000008)
00099 #define I2C_IT_BTF                      ((uint32_t)0x02000004)
00100 #define I2C_IT_ADDR                     ((uint32_t)0x02000002)
00101 #define I2C_IT_SB                       ((uint32_t)0x02000001)
00102
00103 /* SR2 register flags  */
00104 #define I2C_FLAG_DUALF                  ((uint32_t)0x00800000)
00105 #define I2C_FLAG_SMBHOST                ((uint32_t)0x00400000)
00106 #define I2C_FLAG_SMBDEFAULT             ((uint32_t)0x00200000)
00107 #define I2C_FLAG_GENCALL                ((uint32_t)0x00100000)
00108 #define I2C_FLAG_TRA                    ((uint32_t)0x00040000)
00109 #define I2C_FLAG_BUSY                   ((uint32_t)0x00020000)
00110 #define I2C_FLAG_MSL                    ((uint32_t)0x00010000)
00111
00112 /* SR1 register flags  */
00113 #define I2C_FLAG_SMBALERT               ((uint32_t)0x10008000)
00114 #define I2C_FLAG_TIMEOUT                ((uint32_t)0x10004000)
00115 #define I2C_FLAG_PECERR                 ((uint32_t)0x10001000)
00116 #define I2C_FLAG_OVR                    ((uint32_t)0x10000800)
00117 #define I2C_FLAG_AF                     ((uint32_t)0x10000400)
00118 #define I2C_FLAG_ARLO                   ((uint32_t)0x10000200)
00119 #define I2C_FLAG_BERR                   ((uint32_t)0x10000100)
00120 #define I2C_FLAG_TXE                    ((uint32_t)0x10000080)
00121 #define I2C_FLAG_RXNE                   ((uint32_t)0x10000040)
00122 #define I2C_FLAG_STOPF                  ((uint32_t)0x10000010)
00123 #define I2C_FLAG_ADD10                  ((uint32_t)0x10000008)
00124 #define I2C_FLAG_BTF                    ((uint32_t)0x10000004)
00125 #define I2C_FLAG_ADDR                   ((uint32_t)0x10000002)
00126 #define I2C_FLAG_SB                     ((uint32_t)0x10000001)
00127
00128 /* EV1  */
00129 #define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED       ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
00130 #define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED          ((uint32_t)0x00020002) /* BUSY and ADDR flags */
00131 #define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080)  /* DUALF, TRA, BUSY and TXE flags */
00132 #define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED    ((uint32_t)0x00820000)  /* DUALF and BUSY flags */
00133 #define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED        ((uint32_t)0x00120000)  /* GENCALL and BUSY flags */
00134
00135 /* EV2  */
00136 #define I2C_EVENT_SLAVE_BYTE_RECEIVED                     ((uint32_t)0x00020040)  /* BUSY and RXNE flags */
00137
00138 /* EV3 */
00139 #define I2C_EVENT_SLAVE_BYTE_TRANSMITTED                  ((uint32_t)0x00060084)  /* TRA, BUSY, TXE and BTF flags */
00140
00141 /* EV4 */
00142 #define I2C_EVENT_SLAVE_STOP_DETECTED                     ((uint32_t)0x00000010)  /* STOPF flag */
00143
00144 /* EV5 */
00145 #define I2C_EVENT_MASTER_MODE_SELECT                      ((uint32_t)0x00030001)  /* BUSY, MSL and SB flag */
00146
00147
00148 /* EV6 */
00149 #define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED        ((uint32_t)0x00070082)  /* BUSY, MSL, ADDR, TXE and TRA flags */
00150 #define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED           ((uint32_t)0x00030002)  /* BUSY, MSL and ADDR flags */
00151
00152 /* EV7 */
00153 #define I2C_EVENT_MASTER_BYTE_RECEIVED                    ((uint32_t)0x00030040)  /* BUSY, MSL and RXNE flags */
00154
00155 /* EV8 */
00156 #define I2C_EVENT_MASTER_BYTE_TRANSMITTING                 ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */
00157
00158 /* EV8_2 */
00159 #define I2C_EVENT_MASTER_BYTE_TRANSMITTED                 ((uint32_t)0x00070084)  /* TRA, BUSY, MSL, TXE and BTF flags */
00160
00161 /* EV9 */
00162 #define I2C_EVENT_MASTER_MODE_ADDRESS10                   ((uint32_t)0x00030008)  /* BUSY, MSL and ADD10 flags */
00163
00164 /* EV3_2 */
00165 #define I2C_EVENT_SLAVE_ACK_FAILURE                       ((uint32_t)0x00000400)  /* AF flag */
00166
00167
00168
00169 /* I2C SPE mask */
00170 #define CR1_PE_SET              ((uint16_t)0x0001)
00171 #define CR1_PE_RESET            ((uint16_t)0xFFFE)
00172
00173 /* I2C START mask */
00174 #define CR1_START_SET           ((uint16_t)0x0100)
00175 #define CR1_START_RESET         ((uint16_t)0xFEFF)
00176
00177 /* I2C STOP mask */
00178 #define CR1_STOP_SET            ((uint16_t)0x0200)
00179 #define CR1_STOP_RESET          ((uint16_t)0xFDFF)
00180
00181 /* I2C ACK mask */
00182 #define CR1_ACK_SET             ((uint16_t)0x0400)
00183 #define CR1_ACK_RESET           ((uint16_t)0xFBFF)
00184
00185 /* I2C ENGC mask */
00186 #define CR1_ENGC_SET            ((uint16_t)0x0040)
00187 #define CR1_ENGC_RESET          ((uint16_t)0xFFBF)
00188
00189 /* I2C SWRST mask */
00190 #define CR1_SWRST_SET           ((uint16_t)0x8000)
00191 #define CR1_SWRST_RESET         ((uint16_t)0x7FFF)
00192
00193 /* I2C PEC mask */
00194 #define CR1_PEC_SET             ((uint16_t)0x1000)
00195 #define CR1_PEC_RESET           ((uint16_t)0xEFFF)
00196
00197 /* I2C ENPEC mask */
00198 #define CR1_ENPEC_SET           ((uint16_t)0x0020)
00199 #define CR1_ENPEC_RESET         ((uint16_t)0xFFDF)
00200
00201 /* I2C ENARP mask */
00202 #define CR1_ENARP_SET           ((uint16_t)0x0010)
00203 #define CR1_ENARP_RESET         ((uint16_t)0xFFEF)
00204
00205 /* I2C NOSTRETCH mask */
00206 #define CR1_NOSTRETCH_SET       ((uint16_t)0x0080)
00207 #define CR1_NOSTRETCH_RESET     ((uint16_t)0xFF7F)
00208
00209 /* I2C registers Masks */
00210 #define CR1_CLEAR_MASK          ((uint16_t)0xFBF5)
00211
00212 /* I2C DMAEN mask */
00213 #define CR2_DMAEN_SET           ((uint16_t)0x0800)
00214 #define CR2_DMAEN_RESET         ((uint16_t)0xF7FF)
00215
00216 /* I2C LAST mask */
00217 #define CR2_LAST_SET            ((uint16_t)0x1000)
00218 #define CR2_LAST_RESET          ((uint16_t)0xEFFF)
00219
00220 /* I2C FREQ mask */
00221 #define CR2_FREQ_RESET          ((uint16_t)0xFFC0)
00222
00223 #define CR2_FREQ_36MHZ          ((uint16_t)0x100100)
00224
00225 /* I2C ADD0 mask */
00226 #define OAR1_ADD0_SET           ((uint16_t)0x0001)
00227 #define OAR1_ADD0_RESET         ((uint16_t)0xFFFE)
00228
00229 /* I2C ENDUAL mask */
00230 #define OAR2_ENDUAL_SET         ((uint16_t)0x0001)
00231 #define OAR2_ENDUAL_RESET       ((uint16_t)0xFFFE)
00232
00233 /* I2C ADD2 mask */
00234 #define OAR2_ADD2_RESET         ((uint16_t)0xFF01)
00235
00236 /* I2C F/S mask */
00237 #define CCR_FS_SET              ((uint16_t)0x8000)
00238
00239 /* I2C CCR mask */
00240 #define CCR_CCR_SET             ((uint16_t)0x0FFF)
00241
00242
00243 /* I2C CR1 */
00244 #define CR1_POS_SET                ((uint16_t)0x800)
00245 #define CR1_POS_RESET                 (~CR1_POS_SET)
00246
00247 /* I2C Status */
00248 #define SR1_PECERR                              12
00249 #define SR1_OVR                                 11
00250 #define SR1_AF                                  10
00251 #define SR1_ARLO                                 9
00252 #define SR1_BERR                                 8
00253 #define SR1_TXE                                  7
00254 #define SR1_RXNE                                 6
00255 #define SR1_ADDR                                 1
00256 #define SR1_BTF                                  2
00257 #define SR1_SB                                   0
00258
00259 #define SR2_TRA                                  2
00260 #define SR2_BUSY                                 1
00261 #define SR2_MSL                                  0
00262
00263
00264 #define SR1_ERR_MASK        (BV(SR1_PECERR) | \
00265                              BV(SR1_OVR)    | \
00266                              BV(SR1_AF)     | \
00267                              BV(SR1_ARLO)   | \
00268                              BV(SR1_BERR))
00269
00270 struct stm32_i2c
00271 {
00272     reg16_t CR1;
00273     uint16_t  RESERVED0;
00274     reg16_t CR2;
00275     uint16_t  RESERVED1;
00276     reg16_t OAR1;
00277     uint16_t  RESERVED2;
00278     reg16_t OAR2;
00279     uint16_t  RESERVED3;
00280     reg16_t DR;
00281     uint16_t  RESERVED4;
00282     reg16_t SR1;
00283     uint16_t  RESERVED5;
00284     reg16_t SR2;
00285     uint16_t  RESERVED6;
00286     reg16_t CCR;
00287     uint16_t  RESERVED7;
00288     reg16_t TRISE;
00289     uint16_t  RESERVED8;
00290 };
00291
00292 #endif /* STM32_I2C_H */


BeRTOS: stm32_ints.h File Reference

  • cpu
  • cortex-m3
  • io
stm32_ints.h File Reference

STM32F10xx interrupts definition. More...

Go to the source code of this file.

Defines

#define | WWDG_IRQHANDLER 16
The following are defines for the interrupt assignments.
#define | PVD_IRQHANDLER 17
The following are defines for the interrupt assignments.
#define | TAMPER_IRQHANDLER 18
The following are defines for the interrupt assignments.
#define | RTC_IRQHANDLER 19
The following are defines for the interrupt assignments.
#define | FLASH_IRQHANDLER 20
The following are defines for the interrupt assignments.
#define | RCC_IRQHANDLER 21
The following are defines for the interrupt assignments.
#define | EXTI0_IRQHANDLER 22
The following are defines for the interrupt assignments.
#define | EXTI1_IRQHANDLER 23
The following are defines for the interrupt assignments.
#define | EXTI2_IRQHANDLER 24
The following are defines for the interrupt assignments.
#define | EXTI3_IRQHANDLER 25
The following are defines for the interrupt assignments.
#define | EXTI4_IRQHANDLER 26
The following are defines for the interrupt assignments.
#define | DMACHANNEL1_IRQHANDLER 27
The following are defines for the interrupt assignments.
#define | DMACHANNEL2_IRQHANDLER 28
The following are defines for the interrupt assignments.
#define | DMACHANNEL3_IRQHANDLER 29
The following are defines for the interrupt assignments.
#define | DMACHANNEL4_IRQHANDLER 30
The following are defines for the interrupt assignments.
#define | DMACHANNEL5_IRQHANDLER 31
The following are defines for the interrupt assignments.
#define | DMACHANNEL6_IRQHANDLER 32
The following are defines for the interrupt assignments.
#define | DMACHANNEL7_IRQHANDLER 33
The following are defines for the interrupt assignments.
#define | ADC_IRQHANDLER 34
The following are defines for the interrupt assignments.
#define | USB_HP_CAN_TX_IRQHANDLER 35
The following are defines for the interrupt assignments.
#define | USB_LP_CAN_RX0_IRQHANDLER 36
The following are defines for the interrupt assignments.
#define | CAN_RX1_IRQHANDLER 37
The following are defines for the interrupt assignments.
#define | CAN_SCE_IRQHANDLER 38
The following are defines for the interrupt assignments.
#define | EXTI9_5_IRQHANDLER 39
The following are defines for the interrupt assignments.
#define | TIM1_BRK_IRQHANDLER 40
The following are defines for the interrupt assignments.
#define | TIM1_UP_IRQHANDLER 41
The following are defines for the interrupt assignments.
#define | TIM1_TRG_COM_IRQHANDLER 42
The following are defines for the interrupt assignments.
#define | TIM1_CC_IRQHANDLER 43
The following are defines for the interrupt assignments.
#define | TIM2_IRQHANDLER 44
The following are defines for the interrupt assignments.
#define | TIM3_IRQHANDLER 45
The following are defines for the interrupt assignments.
#define | TIM4_IRQHANDLER 46
The following are defines for the interrupt assignments.
#define | I2C1_EV_IRQHANDLER 47
The following are defines for the interrupt assignments.
#define | I2C1_ER_IRQHANDLER 48
The following are defines for the interrupt assignments.
#define | I2C2_EV_IRQHANDLER 49
The following are defines for the interrupt assignments.
#define | I2C2_ER_IRQHANDLER 50
The following are defines for the interrupt assignments.
#define | SPI1_IRQHANDLER 51
The following are defines for the interrupt assignments.
#define | SPI2_IRQHANDLER 52
The following are defines for the interrupt assignments.
#define | USART1_IRQHANDLER 53
The following are defines for the interrupt assignments.
#define | USART2_IRQHANDLER 54
The following are defines for the interrupt assignments.
#define | USART3_IRQHANDLER 55
The following are defines for the interrupt assignments.
#define | EXTI15_10_IRQHANDLER 56
The following are defines for the interrupt assignments.
#define | RTCALARM_IRQHANDLER 57
The following are defines for the interrupt assignments.
#define | USBWAKEUP_IRQHANDLER 58
The following are defines for the interrupt assignments.

Detailed Description

STM32F10xx interrupts definition.

Definition in file stm32_ints.h.


BeRTOS: stm32_ints.h Source File

  • cpu
  • cortex-m3
  • io
stm32_ints.h
Go to the documentation of this file.
00001
00036 #ifndef STM32_INTS_H
00037 #define STM32_INTS_H
00038
00042 /*\{*/
00043 #define WWDG_IRQHANDLER                 16  /* Window WatchDog Interrupt */
00044 #define PVD_IRQHANDLER                  17  /* PVD through EXTI Line detection Interrupt */
00045 #define TAMPER_IRQHANDLER               18  /* Tamper Interrupt */
00046 #define RTC_IRQHANDLER                  19  /* RTC global Interrupt */
00047 #define FLASH_IRQHANDLER                20  /* FLASH global Interrupt */
00048 #define RCC_IRQHANDLER                  21  /* RCC global Interrupt */
00049 #define EXTI0_IRQHANDLER                22  /* EXTI Line0 Interrupt */
00050 #define EXTI1_IRQHANDLER                23  /* EXTI Line1 Interrupt */
00051 #define EXTI2_IRQHANDLER                24  /* EXTI Line2 Interrupt */
00052 #define EXTI3_IRQHANDLER                25  /* EXTI Line3 Interrupt */
00053 #define EXTI4_IRQHANDLER                26  /* EXTI Line4 Interrupt */
00054 #define DMACHANNEL1_IRQHANDLER          27  /* DMA Channel 1 global Interrupt */
00055 #define DMACHANNEL2_IRQHANDLER          28  /* DMA Channel 2 global Interrupt */
00056 #define DMACHANNEL3_IRQHANDLER          29  /* DMA Channel 3 global Interrupt */
00057 #define DMACHANNEL4_IRQHANDLER          30  /* DMA Channel 4 global Interrupt */
00058 #define DMACHANNEL5_IRQHANDLER          31  /* DMA Channel 5 global Interrupt */
00059 #define DMACHANNEL6_IRQHANDLER          32  /* DMA Channel 6 global Interrupt */
00060 #define DMACHANNEL7_IRQHANDLER          33  /* DMA Channel 7 global Interrupt */
00061 #define ADC_IRQHANDLER                  34  /* ADC global Interrupt */
00062 #define USB_HP_CAN_TX_IRQHANDLER        35  /* USB High Priority or CAN TX Interrupts */
00063 #define USB_LP_CAN_RX0_IRQHANDLER       36  /* USB Low Priority or CAN RX0 Interrupts */
00064 #define CAN_RX1_IRQHANDLER              37  /* CAN RX1 Interrupt */
00065 #define CAN_SCE_IRQHANDLER              38  /* CAN SCE Interrupt */
00066 #define EXTI9_5_IRQHANDLER              39  /* External Line[9:5] Interrupts */
00067 #define TIM1_BRK_IRQHANDLER             40  /* TIM1 Break Interrupt */
00068 #define TIM1_UP_IRQHANDLER              41  /* TIM1 Update Interrupt */
00069 #define TIM1_TRG_COM_IRQHANDLER         42  /* TIM1 Trigger and Commutation Interrupt */
00070 #define TIM1_CC_IRQHANDLER              43  /* TIM1 Capture Compare Interrupt */
00071 #define TIM2_IRQHANDLER                 44  /* TIM2 global Interrupt */
00072 #define TIM3_IRQHANDLER                 45  /* TIM3 global Interrupt */
00073 #define TIM4_IRQHANDLER                 46  /* TIM4 global Interrupt */
00074 #define I2C1_EV_IRQHANDLER              47  /* I2C1 Event Interrupt */
00075 #define I2C1_ER_IRQHANDLER              48  /* I2C1 Error Interrupt */
00076 #define I2C2_EV_IRQHANDLER              49  /* I2C2 Event Interrupt */
00077 #define I2C2_ER_IRQHANDLER              50  /* I2C2 Error Interrupt */
00078 #define SPI1_IRQHANDLER                 51  /* SPI1 global Interrupt */
00079 #define SPI2_IRQHANDLER                 52  /* SPI2 global Interrupt */
00080 #define USART1_IRQHANDLER               53  /* USART1 global Interrupt */
00081 #define USART2_IRQHANDLER               54  /* USART2 global Interrupt */
00082 #define USART3_IRQHANDLER               55  /* USART3 global Interrupt */
00083 #define EXTI15_10_IRQHANDLER            56  /* External Line[15:10] Interrupts */
00084 #define RTCALARM_IRQHANDLER             57  /* RTC Alarm through EXTI Line Interrupt */
00085 #define USBWAKEUP_IRQHANDLER            58  /* USB WakeUp from suspend through EXTI Line Interrupt */
00086 /*\}*/
00087
00088 #define NUM_INTERRUPTS  66
00089
00090 #endif /* STM32_INTS_H */


BeRTOS: stm32_memmap.h File Reference

  • cpu
  • cortex-m3
  • io
Defines
stm32_memmap.h File Reference

STM32 memory map. More...

Go to the source code of this file.

Defines

#define | FLASH_R_BASE (AHBPERIPH_BASE + 0x2000)
Flash registers base address.
#define | FSMC_BANK1_R_BASE (FSMC_R_BASE + 0x0000)
FSMC Bank1 registers base address.
#define | FSMC_BANK1E_R_BASE (FSMC_R_BASE + 0x0104)
FSMC Bank1E registers base address.
#define | FSMC_BANK2_R_BASE (FSMC_R_BASE + 0x0060)
FSMC Bank2 registers base address.
#define | FSMC_BANK3_R_BASE (FSMC_R_BASE + 0x0080)
FSMC Bank3 registers base address.
#define | FSMC_BANK4_R_BASE (FSMC_R_BASE + 0x00A0)
FSMC Bank4 registers base address.
#define | DBGMCU_BASE ((uint32_t)0xE0042000)
Debug MCU registers base address.

Detailed Description

STM32 memory map.

Definition in file stm32_memmap.h.


BeRTOS: stm32_memmap.h Source File

  • cpu
  • cortex-m3
  • io
stm32_memmap.h
Go to the documentation of this file.
00001
00036 #ifndef STM32_MEMMAP_H
00037 #define STM32_MEMMAP_H
00038
00039 /* Peripheral and SRAM base address in the alias region */
00040 #define PERIPH_BB_BASE        (0x42000000)
00041 #define SRAM_BB_BASE          (0x22000000)
00042
00043 /* Peripheral and SRAM base address in the bit-band region */
00044 #define SRAM_BASE             (0x20000000)
00045 #define PERIPH_BASE           (0x40000000)
00046
00047 /* Flash refisters base address */
00048 #define FLASH_BASE            (0x40022000)
00049 /* Flash Option Bytes base address */
00050 #define OB_BASE               (0x1FFFF800)
00051
00052 /* Peripheral memory map */
00053 #define APB1PERIPH_BASE       (PERIPH_BASE)
00054 #define APB2PERIPH_BASE       (PERIPH_BASE + 0x10000)
00055 #define AHBPERIPH_BASE        (PERIPH_BASE + 0x20000)
00056
00057 #define TIM2_BASE             (APB1PERIPH_BASE + 0x0000)
00058 #define TIM3_BASE             (APB1PERIPH_BASE + 0x0400)
00059 #define TIM4_BASE             (APB1PERIPH_BASE + 0x0800)
00060 #define TIM5_BASE             (APB1PERIPH_BASE + 0x0C00)
00061 #define TIM6_BASE             (APB1PERIPH_BASE + 0x1000)
00062 #define TIM7_BASE             (APB1PERIPH_BASE + 0x1400)
00063 #define RTC_BASE              (APB1PERIPH_BASE + 0x2800)
00064 #define WWDG_BASE             (APB1PERIPH_BASE + 0x2C00)
00065 #define IWDG_BASE             (APB1PERIPH_BASE + 0x3000)
00066 #define SPI2_BASE             (APB1PERIPH_BASE + 0x3800)
00067 #define SPI3_BASE             (APB1PERIPH_BASE + 0x3C00)
00068 #define USART2_BASE           (APB1PERIPH_BASE + 0x4400)
00069 #define USART3_BASE           (APB1PERIPH_BASE + 0x4800)
00070 #define UART4_BASE            (APB1PERIPH_BASE + 0x4C00)
00071 #define UART5_BASE            (APB1PERIPH_BASE + 0x5000)
00072 #define I2C1_BASE             (APB1PERIPH_BASE + 0x5400)
00073 #define I2C2_BASE             (APB1PERIPH_BASE + 0x5800)
00074 #define CAN1_BASE             (APB1PERIPH_BASE + 0x6400)
00075 #define CAN2_BASE             (APB1PERIPH_BASE + 0x6800)
00076 #define BKP_BASE              (APB1PERIPH_BASE + 0x6C00)
00077 #define PWR_BASE              (APB1PERIPH_BASE + 0x7000)
00078 #define DAC_BASE              (APB1PERIPH_BASE + 0x7400)
00079 #define CEC_BASE              (APB1PERIPH_BASE + 0x7800)
00080
00081 #define AFIO_BASE             (APB2PERIPH_BASE + 0x0000)
00082 #define EXTI_BASE             (APB2PERIPH_BASE + 0x0400)
00083 #define GPIOA_BASE            (APB2PERIPH_BASE + 0x0800)
00084 #define GPIOB_BASE            (APB2PERIPH_BASE + 0x0C00)
00085 #define GPIOC_BASE            (APB2PERIPH_BASE + 0x1000)
00086 #define GPIOD_BASE            (APB2PERIPH_BASE + 0x1400)
00087 #define GPIOE_BASE            (APB2PERIPH_BASE + 0x1800)
00088 #define GPIOF_BASE            (APB2PERIPH_BASE + 0x1C00)
00089 #define GPIOG_BASE            (APB2PERIPH_BASE + 0x2000)
00090 #define ADC1_BASE             (APB2PERIPH_BASE + 0x2400)
00091 #define ADC2_BASE             (APB2PERIPH_BASE + 0x2800)
00092 #define TIM1_BASE             (APB2PERIPH_BASE + 0x2C00)
00093 #define SPI1_BASE             (APB2PERIPH_BASE + 0x3000)
00094 #define TIM8_BASE             (APB2PERIPH_BASE + 0x3400)
00095 #define USART1_BASE           (APB2PERIPH_BASE + 0x3800)
00096 #define ADC3_BASE             (APB2PERIPH_BASE + 0x3C00)
00097 #define TIM15_BASE            (APB2PERIPH_BASE + 0x4000)
00098 #define TIM16_BASE            (APB2PERIPH_BASE + 0x4400)
00099 #define TIM17_BASE            (APB2PERIPH_BASE + 0x4800)
00100
00101 #define SDIO_BASE             (PERIPH_BASE + 0x18000)
00102
00103
00104 #define DMA1_BASE             (AHBPERIPH_BASE + 0X0000)
00105 #define DMA1_CHANNEL1_BASE    (AHBPERIPH_BASE + 0X0008)
00106 #define DMA1_CHANNEL2_BASE    (AHBPERIPH_BASE + 0X001C)
00107 #define DMA1_CHANNEL3_BASE    (AHBPERIPH_BASE + 0X0030)
00108 #define DMA1_CHANNEL4_BASE    (AHBPERIPH_BASE + 0X0044)
00109 #define DMA1_CHANNEL5_BASE    (AHBPERIPH_BASE + 0X0058)
00110 #define DMA1_CHANNEL6_BASE    (AHBPERIPH_BASE + 0X006C)
00111 #define DMA1_CHANNEL7_BASE    (AHBPERIPH_BASE + 0X0080)
00112 #define DMA2_BASE             (AHBPERIPH_BASE + 0X0400)
00113 #define DMA2_CHANNEL1_BASE    (AHBPERIPH_BASE + 0X0408)
00114 #define DMA2_CHANNEL2_BASE    (AHBPERIPH_BASE + 0X041C)
00115 #define DMA2_CHANNEL3_BASE    (AHBPERIPH_BASE + 0X0430)
00116 #define DMA2_CHANNEL4_BASE    (AHBPERIPH_BASE + 0X0444)
00117 #define DMA2_CHANNEL5_BASE    (AHBPERIPH_BASE + 0X0458)
00118 #define RCC_BASE              (AHBPERIPH_BASE + 0X1000)
00119 #define CRC_BASE              (AHBPERIPH_BASE + 0X3000)
00120
00121 #define FLASH_R_BASE          (AHBPERIPH_BASE + 0x2000) ///< Flash registers base address
00122
00123 #define ETH_BASE              (AHBPERIPH_BASE + 0x8000)
00124 #define ETH_MAC_BASE          (ETH_BASE)
00125 #define ETH_MMC_BASE          (ETH_BASE + 0x0100)
00126 #define ETH_PTP_BASE          (ETH_BASE + 0x0700)
00127 #define ETH_DMA_BASE          (ETH_BASE + 0x1000)
00128
00129 #define FSMC_BANK1_R_BASE     (FSMC_R_BASE + 0x0000) ///< FSMC Bank1 registers base address
00130 #define FSMC_BANK1E_R_BASE    (FSMC_R_BASE + 0x0104) ///< FSMC Bank1E registers base address
00131 #define FSMC_BANK2_R_BASE     (FSMC_R_BASE + 0x0060) ///< FSMC Bank2 registers base address
00132 #define FSMC_BANK3_R_BASE     (FSMC_R_BASE + 0x0080) ///< FSMC Bank3 registers base address
00133 #define FSMC_BANK4_R_BASE     (FSMC_R_BASE + 0x00A0) ///< FSMC Bank4 registers base address
00134
00135 #define DBGMCU_BASE          ((uint32_t)0xE0042000) ///< Debug MCU registers base address
00136
00137 /* System Control Space memory map */
00138 #define SCS_BASE              (0xE000E000)
00139
00140 #define SYSTICK_BASE          (SCS_BASE + 0x0010)
00141 #define NVIC_BASE             (SCS_BASE + 0x0100)
00142 #define SCB_BASE              (SCS_BASE + 0x0D00)
00143
00144 #endif /* STM32_MEMMAP_H */


BeRTOS: stm32_nvic.h File Reference

  • cpu
  • cortex-m3
  • io
stm32_nvic.h File Reference

NVIC STM32F10xx registers definition. More...

Go to the source code of this file.

Defines

#define | FAULT_NMI 2
The following are defines for the fault assignments.
#define | FAULT_HARD 3
Hard fault.
#define | FAULT_MPU 4
MPU fault.
#define | FAULT_BUS 5
Bus fault.
#define | FAULT_USAGE 6
Usage fault.
#define | FAULT_SVCALL 11
SVCall.
#define | FAULT_DEBUG 12
Debug monitor.
#define | FAULT_PENDSV 14
PendSV.
#define | FAULT_SYSTICK 15
System Tick.
#define | NVIC_INT_TYPE_R (*((reg32_t *)0xE000E004))
NVIC registers (NVIC)
#define | NVIC_ST_CTRL_R (*((reg32_t *)0xE000E010))
NVIC registers (NVIC)
#define | NVIC_ST_RELOAD_R (*((reg32_t *)0xE000E014))
NVIC registers (NVIC)
#define | NVIC_ST_CURRENT_R (*((reg32_t *)0xE000E018))
NVIC registers (NVIC)
#define | NVIC_ST_CAL_R (*((reg32_t *)0xE000E01C))
NVIC registers (NVIC)
#define | NVIC_EN0_R (*((reg32_t *)0xE000E100))
NVIC registers (NVIC)
#define | NVIC_EN1_R (*((reg32_t *)0xE000E104))
NVIC registers (NVIC)
#define | NVIC_DIS0_R (*((reg32_t *)0xE000E180))
NVIC registers (NVIC)
#define | NVIC_DIS1_R (*((reg32_t *)0xE000E184))
NVIC registers (NVIC)
#define | NVIC_PEND0_R (*((reg32_t *)0xE000E200))
NVIC registers (NVIC)
#define | NVIC_PEND1_R (*((reg32_t *)0xE000E204))
NVIC registers (NVIC)
#define | NVIC_UNPEND0_R (*((reg32_t *)0xE000E280))
NVIC registers (NVIC)
#define | NVIC_UNPEND1_R (*((reg32_t *)0xE000E284))
NVIC registers (NVIC)
#define | NVIC_ACTIVE0_R (*((reg32_t *)0xE000E300))
NVIC registers (NVIC)
#define | NVIC_ACTIVE1_R (*((reg32_t *)0xE000E304))
NVIC registers (NVIC)
#define | NVIC_PRI0_R (*((reg32_t *)0xE000E400))
NVIC registers (NVIC)
#define | NVIC_PRI1_R (*((reg32_t *)0xE000E404))
NVIC registers (NVIC)
#define | NVIC_PRI2_R (*((reg32_t *)0xE000E408))
NVIC registers (NVIC)
#define | NVIC_PRI3_R (*((reg32_t *)0xE000E40C))
NVIC registers (NVIC)
#define | NVIC_PRI4_R (*((reg32_t *)0xE000E410))
NVIC registers (NVIC)
#define | NVIC_PRI5_R (*((reg32_t *)0xE000E414))
NVIC registers (NVIC)
#define | NVIC_PRI6_R (*((reg32_t *)0xE000E418))
NVIC registers (NVIC)
#define | NVIC_PRI7_R (*((reg32_t *)0xE000E41C))
NVIC registers (NVIC)
#define | NVIC_PRI8_R (*((reg32_t *)0xE000E420))
NVIC registers (NVIC)
#define | NVIC_PRI9_R (*((reg32_t *)0xE000E424))
NVIC registers (NVIC)
#define | NVIC_PRI10_R (*((reg32_t *)0xE000E428))
NVIC registers (NVIC)
#define | NVIC_CPUID_R (*((reg32_t *)0xE000ED00))
NVIC registers (NVIC)
#define | NVIC_INT_CTRL_R (*((reg32_t *)0xE000ED04))
NVIC registers (NVIC)
#define | NVIC_VTABLE_R (*((reg32_t *)0xE000ED08))
NVIC registers (NVIC)
#define | NVIC_APINT_R (*((reg32_t *)0xE000ED0C))
NVIC registers (NVIC)
#define | NVIC_SYS_CTRL_R (*((reg32_t *)0xE000ED10))
NVIC registers (NVIC)
#define | NVIC_CFG_CTRL_R (*((reg32_t *)0xE000ED14))
NVIC registers (NVIC)
#define | NVIC_SYS_PRI1_R (*((reg32_t *)0xE000ED18))
NVIC registers (NVIC)
#define | NVIC_SYS_PRI2_R (*((reg32_t *)0xE000ED1C))
NVIC registers (NVIC)
#define | NVIC_SYS_PRI3_R (*((reg32_t *)0xE000ED20))
NVIC registers (NVIC)
#define | NVIC_SYS_HND_CTRL_R (*((reg32_t *)0xE000ED24))
NVIC registers (NVIC)
#define | NVIC_FAULT_STAT_R (*((reg32_t *)0xE000ED28))
NVIC registers (NVIC)
#define | NVIC_HFAULT_STAT_R (*((reg32_t *)0xE000ED2C))
NVIC registers (NVIC)
#define | NVIC_DEBUG_STAT_R (*((reg32_t *)0xE000ED30))
NVIC registers (NVIC)
#define | NVIC_MM_ADDR_R (*((reg32_t *)0xE000ED34))
NVIC registers (NVIC)
#define | NVIC_FAULT_ADDR_R (*((reg32_t *)0xE000ED38))
NVIC registers (NVIC)
#define | NVIC_MPU_TYPE_R (*((reg32_t *)0xE000ED90))
NVIC registers (NVIC)
#define | NVIC_MPU_CTRL_R (*((reg32_t *)0xE000ED94))
NVIC registers (NVIC)
#define | NVIC_MPU_NUMBER_R (*((reg32_t *)0xE000ED98))
NVIC registers (NVIC)
#define | NVIC_MPU_BASE_R (*((reg32_t *)0xE000ED9C))
NVIC registers (NVIC)
#define | NVIC_MPU_ATTR_R (*((reg32_t *)0xE000EDA0))
NVIC registers (NVIC)
#define | NVIC_DBG_CTRL_R (*((reg32_t *)0xE000EDF0))
NVIC registers (NVIC)
#define | NVIC_DBG_XFER_R (*((reg32_t *)0xE000EDF4))
NVIC registers (NVIC)
#define | NVIC_DBG_DATA_R (*((reg32_t *)0xE000EDF8))
NVIC registers (NVIC)
#define | NVIC_DBG_INT_R (*((reg32_t *)0xE000EDFC))
NVIC registers (NVIC)
#define | NVIC_SW_TRIG_R (*((reg32_t *)0xE000EF00))
NVIC registers (NVIC)
#define | NVIC_INT_TYPE 0xE000E004
The following are defines for the NVIC register addresses.
#define | NVIC_ST_CTRL 0xE000E010
SysTick Control and Status Reg.
#define | NVIC_ST_RELOAD 0xE000E014
SysTick Reload Value Register.
#define | NVIC_ST_CURRENT 0xE000E018
SysTick Current Value Register.
#define | NVIC_ST_CAL 0xE000E01C
SysTick Calibration Value Reg.
#define | NVIC_EN0 0xE000E100
IRQ 0 to 31 Set Enable Register.
#define | NVIC_EN1 0xE000E104
IRQ 32 to 63 Set Enable Register.
#define | NVIC_DIS0 0xE000E180
IRQ 0 to 31 Clear Enable Reg.
#define | NVIC_DIS1 0xE000E184
IRQ 32 to 63 Clear Enable Reg.
#define | NVIC_PEND0 0xE000E200
IRQ 0 to 31 Set Pending Register.
#define | NVIC_PEND1 0xE000E204
IRQ 32 to 63 Set Pending Reg.
#define | NVIC_UNPEND0 0xE000E280
IRQ 0 to 31 Clear Pending Reg.
#define | NVIC_UNPEND1 0xE000E284
IRQ 32 to 63 Clear Pending Reg.
#define | NVIC_ACTIVE0 0xE000E300
IRQ 0 to 31 Active Register.
#define | NVIC_ACTIVE1 0xE000E304
IRQ 32 to 63 Active Register.
#define | NVIC_PRI0 0xE000E400
IRQ 0 to 3 Priority Register.
#define | NVIC_PRI1 0xE000E404
IRQ 4 to 7 Priority Register.
#define | NVIC_PRI2 0xE000E408
IRQ 8 to 11 Priority Register.
#define | NVIC_PRI3 0xE000E40C
IRQ 12 to 15 Priority Register.
#define | NVIC_PRI4 0xE000E410
IRQ 16 to 19 Priority Register.
#define | NVIC_PRI5 0xE000E414
IRQ 20 to 23 Priority Register.
#define | NVIC_PRI6 0xE000E418
IRQ 24 to 27 Priority Register.
#define | NVIC_PRI7 0xE000E41C
IRQ 28 to 31 Priority Register.
#define | NVIC_PRI8 0xE000E420
IRQ 32 to 35 Priority Register.
#define | NVIC_PRI9 0xE000E424
IRQ 36 to 39 Priority Register.
#define | NVIC_PRI10 0xE000E428
IRQ 40 to 43 Priority Register.
#define | NVIC_PRI11 0xE000E42C
IRQ 44 to 47 Priority Register.
#define | NVIC_PRI12 0xE000E430
IRQ 48 to 51 Priority Register.
#define | NVIC_PRI13 0xE000E434
IRQ 52 to 55 Priority Register.
#define | NVIC_CPUID 0xE000ED00
CPUID Base Register.
#define | NVIC_INT_CTRL 0xE000ED04
Interrupt Control State Register.
#define | NVIC_VTABLE 0xE000ED08
Vector Table Offset Register.
#define | NVIC_APINT 0xE000ED0C
App. Int & Reset Control Reg.
#define | NVIC_SYS_CTRL 0xE000ED10
System Control Register.
#define | NVIC_CFG_CTRL 0xE000ED14
Configuration Control Register.
#define | NVIC_SYS_PRI1 0xE000ED18
Sys. Handlers 4 to 7 Priority.
#define | NVIC_SYS_PRI2 0xE000ED1C
Sys. Handlers 8 to 11 Priority.
#define | NVIC_SYS_PRI3 0xE000ED20
Sys. Handlers 12 to 15 Priority.
#define | NVIC_SYS_HND_CTRL 0xE000ED24
System Handler Control and State.
#define | NVIC_FAULT_STAT 0xE000ED28
Configurable Fault Status Reg.
#define | NVIC_HFAULT_STAT 0xE000ED2C
Hard Fault Status Register.
#define | NVIC_DEBUG_STAT 0xE000ED30
Debug Status Register.
#define | NVIC_MM_ADDR 0xE000ED34
Mem Manage Address Register.
#define | NVIC_FAULT_ADDR 0xE000ED38
Bus Fault Address Register.
#define | NVIC_MPU_TYPE 0xE000ED90
MPU Type Register.
#define | NVIC_MPU_CTRL 0xE000ED94
MPU Control Register.
#define | NVIC_MPU_NUMBER 0xE000ED98
MPU Region Number Register.
#define | NVIC_MPU_BASE 0xE000ED9C
MPU Region Base Address Register.
#define | NVIC_MPU_ATTR 0xE000EDA0
MPU Region Attribute & Size Reg.
#define | NVIC_DBG_CTRL 0xE000EDF0
Debug Control and Status Reg.
#define | NVIC_DBG_XFER 0xE000EDF4
Debug Core Reg. Transfer Select.
#define | NVIC_DBG_DATA 0xE000EDF8
Debug Core Register Data.
#define | NVIC_DBG_INT 0xE000EDFC
Debug Reset Interrupt Control.
#define | NVIC_SW_TRIG 0xE000EF00
Software Trigger Interrupt Reg.
#define | NVIC_INT_TYPE_LINES_M 0x0000001F
The following are defines for the bit fields in the NVIC_INT_TYPE register.
#define | NVIC_INT_TYPE_LINES_S 0
The following are defines for the bit fields in the NVIC_INT_TYPE register.
#define | NVIC_ST_CTRL_COUNT 0x00010000
The following are defines for the bit fields in the NVIC_ST_CTRL register.
#define | NVIC_ST_CTRL_CLK_SRC 0x00000004
Clock Source.
#define | NVIC_ST_CTRL_INTEN 0x00000002
Interrupt enable.
#define | NVIC_ST_CTRL_ENABLE 0x00000001
Counter mode.
#define | NVIC_ST_RELOAD_M 0x00FFFFFF
The following are defines for the bit fields in the NVIC_ST_RELOAD register.
#define | NVIC_ST_RELOAD_S 0
The following are defines for the bit fields in the NVIC_ST_RELOAD register.
#define | NVIC_ST_CURRENT_M 0x00FFFFFF
The following are defines for the bit fields in the NVIC_ST_CURRENT register.
#define | NVIC_ST_CURRENT_S 0
The following are defines for the bit fields in the NVIC_ST_CURRENT register.
#define | NVIC_ST_CAL_NOREF 0x80000000
The following are defines for the bit fields in the NVIC_ST_CAL register.
#define | NVIC_ST_CAL_SKEW 0x40000000
Clock skew.
#define | NVIC_ST_CAL_ONEMS_M 0x00FFFFFF
1ms reference value
#define | NVIC_ST_CAL_ONEMS_S 0
The following are defines for the bit fields in the NVIC_ST_CAL register.
#define | NVIC_EN0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_EN0 register.
#define | NVIC_EN0_INT30 0x40000000
Interrupt 30 enable.
#define | NVIC_EN0_INT29 0x20000000
Interrupt 29 enable.
#define | NVIC_EN0_INT28 0x10000000
Interrupt 28 enable.
#define | NVIC_EN0_INT27 0x08000000
Interrupt 27 enable.
#define | NVIC_EN0_INT26 0x04000000
Interrupt 26 enable.
#define | NVIC_EN0_INT25 0x02000000
Interrupt 25 enable.
#define | NVIC_EN0_INT24 0x01000000
Interrupt 24 enable.
#define | NVIC_EN0_INT23 0x00800000
Interrupt 23 enable.
#define | NVIC_EN0_INT22 0x00400000
Interrupt 22 enable.
#define | NVIC_EN0_INT21 0x00200000
Interrupt 21 enable.
#define | NVIC_EN0_INT20 0x00100000
Interrupt 20 enable.
#define | NVIC_EN0_INT19 0x00080000
Interrupt 19 enable.
#define | NVIC_EN0_INT18 0x00040000
Interrupt 18 enable.
#define | NVIC_EN0_INT17 0x00020000
Interrupt 17 enable.
#define | NVIC_EN0_INT16 0x00010000
Interrupt 16 enable.
#define | NVIC_EN0_INT15 0x00008000
Interrupt 15 enable.
#define | NVIC_EN0_INT14 0x00004000
Interrupt 14 enable.
#define | NVIC_EN0_INT13 0x00002000
Interrupt 13 enable.
#define | NVIC_EN0_INT12 0x00001000
Interrupt 12 enable.
#define | NVIC_EN0_INT11 0x00000800
Interrupt 11 enable.
#define | NVIC_EN0_INT10 0x00000400
Interrupt 10 enable.
#define | NVIC_EN0_INT9 0x00000200
Interrupt 9 enable.
#define | NVIC_EN0_INT8 0x00000100
Interrupt 8 enable.
#define | NVIC_EN0_INT7 0x00000080
Interrupt 7 enable.
#define | NVIC_EN0_INT6 0x00000040
Interrupt 6 enable.
#define | NVIC_EN0_INT5 0x00000020
Interrupt 5 enable.
#define | NVIC_EN0_INT4 0x00000010
Interrupt 4 enable.
#define | NVIC_EN0_INT3 0x00000008
Interrupt 3 enable.
#define | NVIC_EN0_INT2 0x00000004
Interrupt 2 enable.
#define | NVIC_EN0_INT1 0x00000002
Interrupt 1 enable.
#define | NVIC_EN0_INT0 0x00000001
Interrupt 0 enable.
#define | NVIC_EN1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_EN1 register.
#define | NVIC_EN1_INT58 0x04000000
Interrupt 58 enable.
#define | NVIC_EN1_INT57 0x02000000
Interrupt 57 enable.
#define | NVIC_EN1_INT56 0x01000000
Interrupt 56 enable.
#define | NVIC_EN1_INT55 0x00800000
Interrupt 55 enable.
#define | NVIC_EN1_INT54 0x00400000
Interrupt 54 enable.
#define | NVIC_EN1_INT53 0x00200000
Interrupt 53 enable.
#define | NVIC_EN1_INT52 0x00100000
Interrupt 52 enable.
#define | NVIC_EN1_INT51 0x00080000
Interrupt 51 enable.
#define | NVIC_EN1_INT50 0x00040000
Interrupt 50 enable.
#define | NVIC_EN1_INT49 0x00020000
Interrupt 49 enable.
#define | NVIC_EN1_INT48 0x00010000
Interrupt 48 enable.
#define | NVIC_EN1_INT47 0x00008000
Interrupt 47 enable.
#define | NVIC_EN1_INT46 0x00004000
Interrupt 46 enable.
#define | NVIC_EN1_INT45 0x00002000
Interrupt 45 enable.
#define | NVIC_EN1_INT44 0x00001000
Interrupt 44 enable.
#define | NVIC_EN1_INT43 0x00000800
Interrupt 43 enable.
#define | NVIC_EN1_INT42 0x00000400
Interrupt 42 enable.
#define | NVIC_EN1_INT41 0x00000200
Interrupt 41 enable.
#define | NVIC_EN1_INT40 0x00000100
Interrupt 40 enable.
#define | NVIC_EN1_INT39 0x00000080
Interrupt 39 enable.
#define | NVIC_EN1_INT38 0x00000040
Interrupt 38 enable.
#define | NVIC_EN1_INT37 0x00000020
Interrupt 37 enable.
#define | NVIC_EN1_INT36 0x00000010
Interrupt 36 enable.
#define | NVIC_EN1_INT35 0x00000008
Interrupt 35 enable.
#define | NVIC_EN1_INT34 0x00000004
Interrupt 34 enable.
#define | NVIC_EN1_INT33 0x00000002
Interrupt 33 enable.
#define | NVIC_EN1_INT32 0x00000001
Interrupt 32 enable.
#define | NVIC_DIS0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_DIS0 register.
#define | NVIC_DIS0_INT30 0x40000000
Interrupt 30 disable.
#define | NVIC_DIS0_INT29 0x20000000
Interrupt 29 disable.
#define | NVIC_DIS0_INT28 0x10000000
Interrupt 28 disable.
#define | NVIC_DIS0_INT27 0x08000000
Interrupt 27 disable.
#define | NVIC_DIS0_INT26 0x04000000
Interrupt 26 disable.
#define | NVIC_DIS0_INT25 0x02000000
Interrupt 25 disable.
#define | NVIC_DIS0_INT24 0x01000000
Interrupt 24 disable.
#define | NVIC_DIS0_INT23 0x00800000
Interrupt 23 disable.
#define | NVIC_DIS0_INT22 0x00400000
Interrupt 22 disable.
#define | NVIC_DIS0_INT21 0x00200000
Interrupt 21 disable.
#define | NVIC_DIS0_INT20 0x00100000
Interrupt 20 disable.
#define | NVIC_DIS0_INT19 0x00080000
Interrupt 19 disable.
#define | NVIC_DIS0_INT18 0x00040000
Interrupt 18 disable.
#define | NVIC_DIS0_INT17 0x00020000
Interrupt 17 disable.
#define | NVIC_DIS0_INT16 0x00010000
Interrupt 16 disable.
#define | NVIC_DIS0_INT15 0x00008000
Interrupt 15 disable.
#define | NVIC_DIS0_INT14 0x00004000
Interrupt 14 disable.
#define | NVIC_DIS0_INT13 0x00002000
Interrupt 13 disable.
#define | NVIC_DIS0_INT12 0x00001000
Interrupt 12 disable.
#define | NVIC_DIS0_INT11 0x00000800
Interrupt 11 disable.
#define | NVIC_DIS0_INT10 0x00000400
Interrupt 10 disable.
#define | NVIC_DIS0_INT9 0x00000200
Interrupt 9 disable.
#define | NVIC_DIS0_INT8 0x00000100
Interrupt 8 disable.
#define | NVIC_DIS0_INT7 0x00000080
Interrupt 7 disable.
#define | NVIC_DIS0_INT6 0x00000040
Interrupt 6 disable.
#define | NVIC_DIS0_INT5 0x00000020
Interrupt 5 disable.
#define | NVIC_DIS0_INT4 0x00000010
Interrupt 4 disable.
#define | NVIC_DIS0_INT3 0x00000008
Interrupt 3 disable.
#define | NVIC_DIS0_INT2 0x00000004
Interrupt 2 disable.
#define | NVIC_DIS0_INT1 0x00000002
Interrupt 1 disable.
#define | NVIC_DIS0_INT0 0x00000001
Interrupt 0 disable.
#define | NVIC_DIS1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_DIS1 register.
#define | NVIC_DIS1_INT58 0x04000000
Interrupt 58 disable.
#define | NVIC_DIS1_INT57 0x02000000
Interrupt 57 disable.
#define | NVIC_DIS1_INT56 0x01000000
Interrupt 56 disable.
#define | NVIC_DIS1_INT55 0x00800000
Interrupt 55 disable.
#define | NVIC_DIS1_INT54 0x00400000
Interrupt 54 disable.
#define | NVIC_DIS1_INT53 0x00200000
Interrupt 53 disable.
#define | NVIC_DIS1_INT52 0x00100000
Interrupt 52 disable.
#define | NVIC_DIS1_INT51 0x00080000
Interrupt 51 disable.
#define | NVIC_DIS1_INT50 0x00040000
Interrupt 50 disable.
#define | NVIC_DIS1_INT49 0x00020000
Interrupt 49 disable.
#define | NVIC_DIS1_INT48 0x00010000
Interrupt 48 disable.
#define | NVIC_DIS1_INT47 0x00008000
Interrupt 47 disable.
#define | NVIC_DIS1_INT46 0x00004000
Interrupt 46 disable.
#define | NVIC_DIS1_INT45 0x00002000
Interrupt 45 disable.
#define | NVIC_DIS1_INT44 0x00001000
Interrupt 44 disable.
#define | NVIC_DIS1_INT43 0x00000800
Interrupt 43 disable.
#define | NVIC_DIS1_INT42 0x00000400
Interrupt 42 disable.
#define | NVIC_DIS1_INT41 0x00000200
Interrupt 41 disable.
#define | NVIC_DIS1_INT40 0x00000100
Interrupt 40 disable.
#define | NVIC_DIS1_INT39 0x00000080
Interrupt 39 disable.
#define | NVIC_DIS1_INT38 0x00000040
Interrupt 38 disable.
#define | NVIC_DIS1_INT37 0x00000020
Interrupt 37 disable.
#define | NVIC_DIS1_INT36 0x00000010
Interrupt 36 disable.
#define | NVIC_DIS1_INT35 0x00000008
Interrupt 35 disable.
#define | NVIC_DIS1_INT34 0x00000004
Interrupt 34 disable.
#define | NVIC_DIS1_INT33 0x00000002
Interrupt 33 disable.
#define | NVIC_DIS1_INT32 0x00000001
Interrupt 32 disable.
#define | NVIC_PEND0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_PEND0 register.
#define | NVIC_PEND0_INT30 0x40000000
Interrupt 30 pend.
#define | NVIC_PEND0_INT29 0x20000000
Interrupt 29 pend.
#define | NVIC_PEND0_INT28 0x10000000
Interrupt 28 pend.
#define | NVIC_PEND0_INT27 0x08000000
Interrupt 27 pend.
#define | NVIC_PEND0_INT26 0x04000000
Interrupt 26 pend.
#define | NVIC_PEND0_INT25 0x02000000
Interrupt 25 pend.
#define | NVIC_PEND0_INT24 0x01000000
Interrupt 24 pend.
#define | NVIC_PEND0_INT23 0x00800000
Interrupt 23 pend.
#define | NVIC_PEND0_INT22 0x00400000
Interrupt 22 pend.
#define | NVIC_PEND0_INT21 0x00200000
Interrupt 21 pend.
#define | NVIC_PEND0_INT20 0x00100000
Interrupt 20 pend.
#define | NVIC_PEND0_INT19 0x00080000
Interrupt 19 pend.
#define | NVIC_PEND0_INT18 0x00040000
Interrupt 18 pend.
#define | NVIC_PEND0_INT17 0x00020000
Interrupt 17 pend.
#define | NVIC_PEND0_INT16 0x00010000
Interrupt 16 pend.
#define | NVIC_PEND0_INT15 0x00008000
Interrupt 15 pend.
#define | NVIC_PEND0_INT14 0x00004000
Interrupt 14 pend.
#define | NVIC_PEND0_INT13 0x00002000
Interrupt 13 pend.
#define | NVIC_PEND0_INT12 0x00001000
Interrupt 12 pend.
#define | NVIC_PEND0_INT11 0x00000800
Interrupt 11 pend.
#define | NVIC_PEND0_INT10 0x00000400
Interrupt 10 pend.
#define | NVIC_PEND0_INT9 0x00000200
Interrupt 9 pend.
#define | NVIC_PEND0_INT8 0x00000100
Interrupt 8 pend.
#define | NVIC_PEND0_INT7 0x00000080
Interrupt 7 pend.
#define | NVIC_PEND0_INT6 0x00000040
Interrupt 6 pend.
#define | NVIC_PEND0_INT5 0x00000020
Interrupt 5 pend.
#define | NVIC_PEND0_INT4 0x00000010
Interrupt 4 pend.
#define | NVIC_PEND0_INT3 0x00000008
Interrupt 3 pend.
#define | NVIC_PEND0_INT2 0x00000004
Interrupt 2 pend.
#define | NVIC_PEND0_INT1 0x00000002
Interrupt 1 pend.
#define | NVIC_PEND0_INT0 0x00000001
Interrupt 0 pend.
#define | NVIC_PEND1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_PEND1 register.
#define | NVIC_PEND1_INT58 0x04000000
Interrupt 58 pend.
#define | NVIC_PEND1_INT57 0x02000000
Interrupt 57 pend.
#define | NVIC_PEND1_INT56 0x01000000
Interrupt 56 pend.
#define | NVIC_PEND1_INT55 0x00800000
Interrupt 55 pend.
#define | NVIC_PEND1_INT54 0x00400000
Interrupt 54 pend.
#define | NVIC_PEND1_INT53 0x00200000
Interrupt 53 pend.
#define | NVIC_PEND1_INT52 0x00100000
Interrupt 52 pend.
#define | NVIC_PEND1_INT51 0x00080000
Interrupt 51 pend.
#define | NVIC_PEND1_INT50 0x00040000
Interrupt 50 pend.
#define | NVIC_PEND1_INT49 0x00020000
Interrupt 49 pend.
#define | NVIC_PEND1_INT48 0x00010000
Interrupt 48 pend.
#define | NVIC_PEND1_INT47 0x00008000
Interrupt 47 pend.
#define | NVIC_PEND1_INT46 0x00004000
Interrupt 46 pend.
#define | NVIC_PEND1_INT45 0x00002000
Interrupt 45 pend.
#define | NVIC_PEND1_INT44 0x00001000
Interrupt 44 pend.
#define | NVIC_PEND1_INT43 0x00000800
Interrupt 43 pend.
#define | NVIC_PEND1_INT42 0x00000400
Interrupt 42 pend.
#define | NVIC_PEND1_INT41 0x00000200
Interrupt 41 pend.
#define | NVIC_PEND1_INT40 0x00000100
Interrupt 40 pend.
#define | NVIC_PEND1_INT39 0x00000080
Interrupt 39 pend.
#define | NVIC_PEND1_INT38 0x00000040
Interrupt 38 pend.
#define | NVIC_PEND1_INT37 0x00000020
Interrupt 37 pend.
#define | NVIC_PEND1_INT36 0x00000010
Interrupt 36 pend.
#define | NVIC_PEND1_INT35 0x00000008
Interrupt 35 pend.
#define | NVIC_PEND1_INT34 0x00000004
Interrupt 34 pend.
#define | NVIC_PEND1_INT33 0x00000002
Interrupt 33 pend.
#define | NVIC_PEND1_INT32 0x00000001
Interrupt 32 pend.
#define | NVIC_UNPEND0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_UNPEND0 register.
#define | NVIC_UNPEND0_INT30 0x40000000
Interrupt 30 unpend.
#define | NVIC_UNPEND0_INT29 0x20000000
Interrupt 29 unpend.
#define | NVIC_UNPEND0_INT28 0x10000000
Interrupt 28 unpend.
#define | NVIC_UNPEND0_INT27 0x08000000
Interrupt 27 unpend.
#define | NVIC_UNPEND0_INT26 0x04000000
Interrupt 26 unpend.
#define | NVIC_UNPEND0_INT25 0x02000000
Interrupt 25 unpend.
#define | NVIC_UNPEND0_INT24 0x01000000
Interrupt 24 unpend.
#define | NVIC_UNPEND0_INT23 0x00800000
Interrupt 23 unpend.
#define | NVIC_UNPEND0_INT22 0x00400000
Interrupt 22 unpend.
#define | NVIC_UNPEND0_INT21 0x00200000
Interrupt 21 unpend.
#define | NVIC_UNPEND0_INT20 0x00100000
Interrupt 20 unpend.
#define | NVIC_UNPEND0_INT19 0x00080000
Interrupt 19 unpend.
#define | NVIC_UNPEND0_INT18 0x00040000
Interrupt 18 unpend.
#define | NVIC_UNPEND0_INT17 0x00020000
Interrupt 17 unpend.
#define | NVIC_UNPEND0_INT16 0x00010000
Interrupt 16 unpend.
#define | NVIC_UNPEND0_INT15 0x00008000
Interrupt 15 unpend.
#define | NVIC_UNPEND0_INT14 0x00004000
Interrupt 14 unpend.
#define | NVIC_UNPEND0_INT13 0x00002000
Interrupt 13 unpend.
#define | NVIC_UNPEND0_INT12 0x00001000
Interrupt 12 unpend.
#define | NVIC_UNPEND0_INT11 0x00000800
Interrupt 11 unpend.
#define | NVIC_UNPEND0_INT10 0x00000400
Interrupt 10 unpend.
#define | NVIC_UNPEND0_INT9 0x00000200
Interrupt 9 unpend.
#define | NVIC_UNPEND0_INT8 0x00000100
Interrupt 8 unpend.
#define | NVIC_UNPEND0_INT7 0x00000080
Interrupt 7 unpend.
#define | NVIC_UNPEND0_INT6 0x00000040
Interrupt 6 unpend.
#define | NVIC_UNPEND0_INT5 0x00000020
Interrupt 5 unpend.
#define | NVIC_UNPEND0_INT4 0x00000010
Interrupt 4 unpend.
#define | NVIC_UNPEND0_INT3 0x00000008
Interrupt 3 unpend.
#define | NVIC_UNPEND0_INT2 0x00000004
Interrupt 2 unpend.
#define | NVIC_UNPEND0_INT1 0x00000002
Interrupt 1 unpend.
#define | NVIC_UNPEND0_INT0 0x00000001
Interrupt 0 unpend.
#define | NVIC_UNPEND1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_UNPEND1 register.
#define | NVIC_UNPEND1_INT58 0x04000000
Interrupt 58 unpend.
#define | NVIC_UNPEND1_INT57 0x02000000
Interrupt 57 unpend.
#define | NVIC_UNPEND1_INT56 0x01000000
Interrupt 56 unpend.
#define | NVIC_UNPEND1_INT55 0x00800000
Interrupt 55 unpend.
#define | NVIC_UNPEND1_INT54 0x00400000
Interrupt 54 unpend.
#define | NVIC_UNPEND1_INT53 0x00200000
Interrupt 53 unpend.
#define | NVIC_UNPEND1_INT52 0x00100000
Interrupt 52 unpend.
#define | NVIC_UNPEND1_INT51 0x00080000
Interrupt 51 unpend.
#define | NVIC_UNPEND1_INT50 0x00040000
Interrupt 50 unpend.
#define | NVIC_UNPEND1_INT49 0x00020000
Interrupt 49 unpend.
#define | NVIC_UNPEND1_INT48 0x00010000
Interrupt 48 unpend.
#define | NVIC_UNPEND1_INT47 0x00008000
Interrupt 47 unpend.
#define | NVIC_UNPEND1_INT46 0x00004000
Interrupt 46 unpend.
#define | NVIC_UNPEND1_INT45 0x00002000
Interrupt 45 unpend.
#define | NVIC_UNPEND1_INT44 0x00001000
Interrupt 44 unpend.
#define | NVIC_UNPEND1_INT43 0x00000800
Interrupt 43 unpend.
#define | NVIC_UNPEND1_INT42 0x00000400
Interrupt 42 unpend.
#define | NVIC_UNPEND1_INT41 0x00000200
Interrupt 41 unpend.
#define | NVIC_UNPEND1_INT40 0x00000100
Interrupt 40 unpend.
#define | NVIC_UNPEND1_INT39 0x00000080
Interrupt 39 unpend.
#define | NVIC_UNPEND1_INT38 0x00000040
Interrupt 38 unpend.
#define | NVIC_UNPEND1_INT37 0x00000020
Interrupt 37 unpend.
#define | NVIC_UNPEND1_INT36 0x00000010
Interrupt 36 unpend.
#define | NVIC_UNPEND1_INT35 0x00000008
Interrupt 35 unpend.
#define | NVIC_UNPEND1_INT34 0x00000004
Interrupt 34 unpend.
#define | NVIC_UNPEND1_INT33 0x00000002
Interrupt 33 unpend.
#define | NVIC_UNPEND1_INT32 0x00000001
Interrupt 32 unpend.
#define | NVIC_ACTIVE0_INT31 0x80000000
The following are defines for the bit fields in the NVIC_ACTIVE0 register.
#define | NVIC_ACTIVE0_INT30 0x40000000
Interrupt 30 active.
#define | NVIC_ACTIVE0_INT29 0x20000000
Interrupt 29 active.
#define | NVIC_ACTIVE0_INT28 0x10000000
Interrupt 28 active.
#define | NVIC_ACTIVE0_INT27 0x08000000
Interrupt 27 active.
#define | NVIC_ACTIVE0_INT26 0x04000000
Interrupt 26 active.
#define | NVIC_ACTIVE0_INT25 0x02000000
Interrupt 25 active.
#define | NVIC_ACTIVE0_INT24 0x01000000
Interrupt 24 active.
#define | NVIC_ACTIVE0_INT23 0x00800000
Interrupt 23 active.
#define | NVIC_ACTIVE0_INT22 0x00400000
Interrupt 22 active.
#define | NVIC_ACTIVE0_INT21 0x00200000
Interrupt 21 active.
#define | NVIC_ACTIVE0_INT20 0x00100000
Interrupt 20 active.
#define | NVIC_ACTIVE0_INT19 0x00080000
Interrupt 19 active.
#define | NVIC_ACTIVE0_INT18 0x00040000
Interrupt 18 active.
#define | NVIC_ACTIVE0_INT17 0x00020000
Interrupt 17 active.
#define | NVIC_ACTIVE0_INT16 0x00010000
Interrupt 16 active.
#define | NVIC_ACTIVE0_INT15 0x00008000
Interrupt 15 active.
#define | NVIC_ACTIVE0_INT14 0x00004000
Interrupt 14 active.
#define | NVIC_ACTIVE0_INT13 0x00002000
Interrupt 13 active.
#define | NVIC_ACTIVE0_INT12 0x00001000
Interrupt 12 active.
#define | NVIC_ACTIVE0_INT11 0x00000800
Interrupt 11 active.
#define | NVIC_ACTIVE0_INT10 0x00000400
Interrupt 10 active.
#define | NVIC_ACTIVE0_INT9 0x00000200
Interrupt 9 active.
#define | NVIC_ACTIVE0_INT8 0x00000100
Interrupt 8 active.
#define | NVIC_ACTIVE0_INT7 0x00000080
Interrupt 7 active.
#define | NVIC_ACTIVE0_INT6 0x00000040
Interrupt 6 active.
#define | NVIC_ACTIVE0_INT5 0x00000020
Interrupt 5 active.
#define | NVIC_ACTIVE0_INT4 0x00000010
Interrupt 4 active.
#define | NVIC_ACTIVE0_INT3 0x00000008
Interrupt 3 active.
#define | NVIC_ACTIVE0_INT2 0x00000004
Interrupt 2 active.
#define | NVIC_ACTIVE0_INT1 0x00000002
Interrupt 1 active.
#define | NVIC_ACTIVE0_INT0 0x00000001
Interrupt 0 active.
#define | NVIC_ACTIVE1_INT59 0x08000000
The following are defines for the bit fields in the NVIC_ACTIVE1 register.
#define | NVIC_ACTIVE1_INT58 0x04000000
Interrupt 58 active.
#define | NVIC_ACTIVE1_INT57 0x02000000
Interrupt 57 active.
#define | NVIC_ACTIVE1_INT56 0x01000000
Interrupt 56 active.
#define | NVIC_ACTIVE1_INT55 0x00800000
Interrupt 55 active.
#define | NVIC_ACTIVE1_INT54 0x00400000
Interrupt 54 active.
#define | NVIC_ACTIVE1_INT53 0x00200000
Interrupt 53 active.
#define | NVIC_ACTIVE1_INT52 0x00100000
Interrupt 52 active.
#define | NVIC_ACTIVE1_INT51 0x00080000
Interrupt 51 active.
#define | NVIC_ACTIVE1_INT50 0x00040000
Interrupt 50 active.
#define | NVIC_ACTIVE1_INT49 0x00020000
Interrupt 49 active.
#define | NVIC_ACTIVE1_INT48 0x00010000
Interrupt 48 active.
#define | NVIC_ACTIVE1_INT47 0x00008000
Interrupt 47 active.
#define | NVIC_ACTIVE1_INT46 0x00004000
Interrupt 46 active.
#define | NVIC_ACTIVE1_INT45 0x00002000
Interrupt 45 active.
#define | NVIC_ACTIVE1_INT44 0x00001000
Interrupt 44 active.
#define | NVIC_ACTIVE1_INT43 0x00000800
Interrupt 43 active.
#define | NVIC_ACTIVE1_INT42 0x00000400
Interrupt 42 active.
#define | NVIC_ACTIVE1_INT41 0x00000200
Interrupt 41 active.
#define | NVIC_ACTIVE1_INT40 0x00000100
Interrupt 40 active.
#define | NVIC_ACTIVE1_INT39 0x00000080
Interrupt 39 active.
#define | NVIC_ACTIVE1_INT38 0x00000040
Interrupt 38 active.
#define | NVIC_ACTIVE1_INT37 0x00000020
Interrupt 37 active.
#define | NVIC_ACTIVE1_INT36 0x00000010
Interrupt 36 active.
#define | NVIC_ACTIVE1_INT35 0x00000008
Interrupt 35 active.
#define | NVIC_ACTIVE1_INT34 0x00000004
Interrupt 34 active.
#define | NVIC_ACTIVE1_INT33 0x00000002
Interrupt 33 active.
#define | NVIC_ACTIVE1_INT32 0x00000001
Interrupt 32 active.
#define | NVIC_PRI0_INT3_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI0_INT2_M 0x00FF0000
Interrupt 2 priority mask.
#define | NVIC_PRI0_INT1_M 0x0000FF00
Interrupt 1 priority mask.
#define | NVIC_PRI0_INT0_M 0x000000FF
Interrupt 0 priority mask.
#define | NVIC_PRI0_INT3_S 24
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI0_INT2_S 16
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI0_INT1_S 8
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI0_INT0_S 0
The following are defines for the bit fields in the NVIC_PRI0 register.
#define | NVIC_PRI1_INT7_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI1_INT6_M 0x00FF0000
Interrupt 6 priority mask.
#define | NVIC_PRI1_INT5_M 0x0000FF00
Interrupt 5 priority mask.
#define | NVIC_PRI1_INT4_M 0x000000FF
Interrupt 4 priority mask.
#define | NVIC_PRI1_INT7_S 24
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI1_INT6_S 16
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI1_INT5_S 8
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI1_INT4_S 0
The following are defines for the bit fields in the NVIC_PRI1 register.
#define | NVIC_PRI2_INT11_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI2_INT10_M 0x00FF0000
Interrupt 10 priority mask.
#define | NVIC_PRI2_INT9_M 0x0000FF00
Interrupt 9 priority mask.
#define | NVIC_PRI2_INT8_M 0x000000FF
Interrupt 8 priority mask.
#define | NVIC_PRI2_INT11_S 24
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI2_INT10_S 16
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI2_INT9_S 8
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI2_INT8_S 0
The following are defines for the bit fields in the NVIC_PRI2 register.
#define | NVIC_PRI3_INT15_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI3_INT14_M 0x00FF0000
Interrupt 14 priority mask.
#define | NVIC_PRI3_INT13_M 0x0000FF00
Interrupt 13 priority mask.
#define | NVIC_PRI3_INT12_M 0x000000FF
Interrupt 12 priority mask.
#define | NVIC_PRI3_INT15_S 24
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI3_INT14_S 16
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI3_INT13_S 8
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI3_INT12_S 0
The following are defines for the bit fields in the NVIC_PRI3 register.
#define | NVIC_PRI4_INT19_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI4_INT18_M 0x00FF0000
Interrupt 18 priority mask.
#define | NVIC_PRI4_INT17_M 0x0000FF00
Interrupt 17 priority mask.
#define | NVIC_PRI4_INT16_M 0x000000FF
Interrupt 16 priority mask.
#define | NVIC_PRI4_INT19_S 24
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI4_INT18_S 16
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI4_INT17_S 8
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI4_INT16_S 0
The following are defines for the bit fields in the NVIC_PRI4 register.
#define | NVIC_PRI5_INT23_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI5_INT22_M 0x00FF0000
Interrupt 22 priority mask.
#define | NVIC_PRI5_INT21_M 0x0000FF00
Interrupt 21 priority mask.
#define | NVIC_PRI5_INT20_M 0x000000FF
Interrupt 20 priority mask.
#define | NVIC_PRI5_INT23_S 24
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI5_INT22_S 16
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI5_INT21_S 8
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI5_INT20_S 0
The following are defines for the bit fields in the NVIC_PRI5 register.
#define | NVIC_PRI6_INT27_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI6_INT26_M 0x00FF0000
Interrupt 26 priority mask.
#define | NVIC_PRI6_INT25_M 0x0000FF00
Interrupt 25 priority mask.
#define | NVIC_PRI6_INT24_M 0x000000FF
Interrupt 24 priority mask.
#define | NVIC_PRI6_INT27_S 24
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI6_INT26_S 16
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI6_INT25_S 8
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI6_INT24_S 0
The following are defines for the bit fields in the NVIC_PRI6 register.
#define | NVIC_PRI7_INT31_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI7_INT30_M 0x00FF0000
Interrupt 30 priority mask.
#define | NVIC_PRI7_INT29_M 0x0000FF00
Interrupt 29 priority mask.
#define | NVIC_PRI7_INT28_M 0x000000FF
Interrupt 28 priority mask.
#define | NVIC_PRI7_INT31_S 24
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI7_INT30_S 16
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI7_INT29_S 8
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI7_INT28_S 0
The following are defines for the bit fields in the NVIC_PRI7 register.
#define | NVIC_PRI8_INT35_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI8_INT34_M 0x00FF0000
Interrupt 34 priority mask.
#define | NVIC_PRI8_INT33_M 0x0000FF00
Interrupt 33 priority mask.
#define | NVIC_PRI8_INT32_M 0x000000FF
Interrupt 32 priority mask.
#define | NVIC_PRI8_INT35_S 24
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI8_INT34_S 16
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI8_INT33_S 8
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI8_INT32_S 0
The following are defines for the bit fields in the NVIC_PRI8 register.
#define | NVIC_PRI9_INT39_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI9_INT38_M 0x00FF0000
Interrupt 38 priority mask.
#define | NVIC_PRI9_INT37_M 0x0000FF00
Interrupt 37 priority mask.
#define | NVIC_PRI9_INT36_M 0x000000FF
Interrupt 36 priority mask.
#define | NVIC_PRI9_INT39_S 24
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI9_INT38_S 16
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI9_INT37_S 8
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI9_INT36_S 0
The following are defines for the bit fields in the NVIC_PRI9 register.
#define | NVIC_PRI10_INT43_M 0xFF000000
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_PRI10_INT42_M 0x00FF0000
Interrupt 42 priority mask.
#define | NVIC_PRI10_INT41_M 0x0000FF00
Interrupt 41 priority mask.
#define | NVIC_PRI10_INT40_M 0x000000FF
Interrupt 40 priority mask.
#define | NVIC_PRI10_INT43_S 24
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_PRI10_INT42_S 16
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_PRI10_INT41_S 8
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_PRI10_INT40_S 0
The following are defines for the bit fields in the NVIC_PRI10 register.
#define | NVIC_CPUID_IMP_M 0xFF000000
The following are defines for the bit fields in the NVIC_CPUID register.
#define | NVIC_CPUID_VAR_M 0x00F00000
Variant.
#define | NVIC_CPUID_PARTNO_M 0x0000FFF0
Processor part number.
#define | NVIC_CPUID_REV_M 0x0000000F
Revision.
#define | NVIC_INT_CTRL_NMI_SET 0x80000000
The following are defines for the bit fields in the NVIC_INT_CTRL register.
#define | NVIC_INT_CTRL_PEND_SV 0x10000000
Pend a PendSV.
#define | NVIC_INT_CTRL_UNPEND_SV 0x08000000
Unpend a PendSV.
#define | NVIC_INT_CTRL_PENDSTSET 0x04000000
Set pending SysTick interrupt.
#define | NVIC_INT_CTRL_PENDSTCLR 0x02000000
Clear pending SysTick interrupt.
#define | NVIC_INT_CTRL_ISR_PRE 0x00800000
Debug interrupt handling.
#define | NVIC_INT_CTRL_ISR_PEND 0x00400000
Debug interrupt pending.
#define | NVIC_INT_CTRL_VEC_PEN_M 0x003FF000
Highest pending exception.
#define | NVIC_INT_CTRL_RET_BASE 0x00000800
Return to base.
#define | NVIC_INT_CTRL_VEC_ACT_M 0x000003FF
Current active exception.
#define | NVIC_INT_CTRL_VEC_PEN_S 12
The following are defines for the bit fields in the NVIC_INT_CTRL register.
#define | NVIC_INT_CTRL_VEC_ACT_S 0
The following are defines for the bit fields in the NVIC_INT_CTRL register.
#define | NVIC_VTABLE_BASE 0x20000000
The following are defines for the bit fields in the NVIC_VTABLE register.
#define | NVIC_VTABLE_OFFSET_M 0x1FFFFF00
Vector table offset.
#define | NVIC_VTABLE_OFFSET_S 8
The following are defines for the bit fields in the NVIC_VTABLE register.
#define | NVIC_APINT_VECTKEY_M 0xFFFF0000
The following are defines for the bit fields in the NVIC_APINT register.
#define | NVIC_APINT_VECTKEY 0x05FA0000
Vector key.
#define | NVIC_APINT_ENDIANESS 0x00008000
Data endianess.
#define | NVIC_APINT_PRIGROUP_M 0x00000700
Priority group.
#define | NVIC_APINT_PRIGROUP_0_8 0x00000700
Priority group 0.8 split.
#define | NVIC_APINT_PRIGROUP_1_7 0x00000600
Priority group 1.7 split.
#define | NVIC_APINT_PRIGROUP_2_6 0x00000500
Priority group 2.6 split.
#define | NVIC_APINT_PRIGROUP_3_5 0x00000400
Priority group 3.5 split.
#define | NVIC_APINT_PRIGROUP_4_4 0x00000300
Priority group 4.4 split.
#define | NVIC_APINT_PRIGROUP_5_3 0x00000200
Priority group 5.3 split.
#define | NVIC_APINT_PRIGROUP_6_2 0x00000100
Priority group 6.2 split.
#define | NVIC_APINT_SYSRESETREQ 0x00000004
System reset request.
#define | NVIC_APINT_VECT_CLR_ACT 0x00000002
Clear active NMI/fault info.
#define | NVIC_APINT_VECT_RESET 0x00000001
System reset.
#define | NVIC_APINT_PRIGROUP_7_1 0x00000000
Priority group 7.1 split.
#define | NVIC_SYS_CTRL_SEVONPEND 0x00000010
The following are defines for the bit fields in the NVIC_SYS_CTRL register.
#define | NVIC_SYS_CTRL_SLEEPDEEP 0x00000004
Deep sleep enable.
#define | NVIC_SYS_CTRL_SLEEPEXIT 0x00000002
Sleep on ISR exit.
#define | NVIC_CFG_CTRL_BFHFNMIGN 0x00000100
The following are defines for the bit fields in the NVIC_CFG_CTRL register.
#define | NVIC_CFG_CTRL_DIV0 0x00000010
Trap on divide by 0.
#define | NVIC_CFG_CTRL_UNALIGNED 0x00000008
Trap on unaligned access.
#define | NVIC_CFG_CTRL_DEEP_PEND 0x00000004
Allow deep interrupt trigger.
#define | NVIC_CFG_CTRL_MAIN_PEND 0x00000002
Allow main interrupt trigger.
#define | NVIC_CFG_CTRL_BASE_THR 0x00000001
Thread state control.
#define | NVIC_SYS_PRI1_RES_M 0xFF000000
The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
#define | NVIC_SYS_PRI1_USAGE_M 0x00FF0000
Priority of usage fault handler.
#define | NVIC_SYS_PRI1_BUS_M 0x0000FF00
Priority of bus fault handler.
#define | NVIC_SYS_PRI1_MEM_M 0x000000FF
Priority of mem manage handler.
#define | NVIC_SYS_PRI1_USAGE_S 16
The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
#define | NVIC_SYS_PRI1_BUS_S 8
The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
#define | NVIC_SYS_PRI1_MEM_S 0
The following are defines for the bit fields in the NVIC_SYS_PRI1 register.
#define | NVIC_SYS_PRI2_SVC_M 0xFF000000
The following are defines for the bit fields in the NVIC_SYS_PRI2 register.
#define | NVIC_SYS_PRI2_RES_M 0x00FFFFFF
Priority of reserved handlers.
#define | NVIC_SYS_PRI2_SVC_S 24
The following are defines for the bit fields in the NVIC_SYS_PRI2 register.
#define | NVIC_SYS_PRI3_TICK_M 0xFF000000
The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
#define | NVIC_SYS_PRI3_PENDSV_M 0x00FF0000
Priority of PendSV handler.
#define | NVIC_SYS_PRI3_RES_M 0x0000FF00
Priority of reserved handler.
#define | NVIC_SYS_PRI3_DEBUG_M 0x000000FF
Priority of debug handler.
#define | NVIC_SYS_PRI3_TICK_S 24
The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
#define | NVIC_SYS_PRI3_PENDSV_S 16
The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
#define | NVIC_SYS_PRI3_DEBUG_S 0
The following are defines for the bit fields in the NVIC_SYS_PRI3 register.
#define | NVIC_SYS_HND_CTRL_USAGE 0x00040000
The following are defines for the bit fields in the NVIC_SYS_HND_CTRL register.
#define | NVIC_SYS_HND_CTRL_BUS 0x00020000
Bus fault enable.
#define | NVIC_SYS_HND_CTRL_MEM 0x00010000
Mem manage fault enable.
#define | NVIC_SYS_HND_CTRL_SVC 0x00008000
SVCall is pended.
#define | NVIC_SYS_HND_CTRL_BUSP 0x00004000
Bus fault is pended.
#define | NVIC_SYS_HND_CTRL_TICK 0x00000800
Sys tick is active.
#define | NVIC_SYS_HND_CTRL_PNDSV 0x00000400
PendSV is active.
#define | NVIC_SYS_HND_CTRL_MON 0x00000100
Monitor is active.
#define | NVIC_SYS_HND_CTRL_SVCA 0x00000080
SVCall is active.
#define | NVIC_SYS_HND_CTRL_USGA 0x00000008
Usage fault is active.
#define | NVIC_SYS_HND_CTRL_BUSA 0x00000002
Bus fault is active.
#define | NVIC_SYS_HND_CTRL_MEMA 0x00000001
Mem manage is active.
#define | NVIC_FAULT_STAT_DIV0 0x02000000
The following are defines for the bit fields in the NVIC_FAULT_STAT register.
#define | NVIC_FAULT_STAT_UNALIGN 0x01000000
Unaligned access fault.
#define | NVIC_FAULT_STAT_NOCP 0x00080000
No coprocessor fault.
#define | NVIC_FAULT_STAT_INVPC 0x00040000
Invalid PC fault.
#define | NVIC_FAULT_STAT_INVSTAT 0x00020000
Invalid state fault.
#define | NVIC_FAULT_STAT_UNDEF 0x00010000
Undefined instruction fault.
#define | NVIC_FAULT_STAT_BFARV 0x00008000
BFAR is valid.
#define | NVIC_FAULT_STAT_BSTKE 0x00001000
Stack bus fault.
#define | NVIC_FAULT_STAT_BUSTKE 0x00000800
Unstack bus fault.
#define | NVIC_FAULT_STAT_IMPRE 0x00000400
Imprecise data bus error.
#define | NVIC_FAULT_STAT_PRECISE 0x00000200
Precise data bus error.
#define | NVIC_FAULT_STAT_IBUS 0x00000100
Instruction bus fault.
#define | NVIC_FAULT_STAT_MMARV 0x00000080
MMAR is valid.
#define | NVIC_FAULT_STAT_MSTKE 0x00000010
Stack access violation.
#define | NVIC_FAULT_STAT_MUSTKE 0x00000008
Unstack access violation.
#define | NVIC_FAULT_STAT_DERR 0x00000002
Data access violation.
#define | NVIC_FAULT_STAT_IERR 0x00000001
Instruction access violation.
#define | NVIC_HFAULT_STAT_DBG 0x80000000
The following are defines for the bit fields in the NVIC_HFAULT_STAT register.
#define | NVIC_HFAULT_STAT_FORCED 0x40000000
Cannot execute fault handler.
#define | NVIC_HFAULT_STAT_VECT 0x00000002
Vector table read fault.
#define | NVIC_DEBUG_STAT_EXTRNL 0x00000010
The following are defines for the bit fields in the NVIC_DEBUG_STAT register.
#define | NVIC_DEBUG_STAT_VCATCH 0x00000008
Vector catch.
#define | NVIC_DEBUG_STAT_DWTTRAP 0x00000004
DWT match.
#define | NVIC_DEBUG_STAT_BKPT 0x00000002
Breakpoint instruction.
#define | NVIC_DEBUG_STAT_HALTED 0x00000001
Halt request.
#define | NVIC_MM_ADDR_M 0xFFFFFFFF
The following are defines for the bit fields in the NVIC_MM_ADDR register.
#define | NVIC_MM_ADDR_S 0
The following are defines for the bit fields in the NVIC_MM_ADDR register.
#define | NVIC_FAULT_ADDR_M 0xFFFFFFFF
The following are defines for the bit fields in the NVIC_FAULT_ADDR register.
#define | NVIC_FAULT_ADDR_S 0
The following are defines for the bit fields in the NVIC_FAULT_ADDR register.
#define | NVIC_MPU_TYPE_IREGION_M 0x00FF0000
The following are defines for the bit fields in the NVIC_MPU_TYPE register.
#define | NVIC_MPU_TYPE_DREGION_M 0x0000FF00
Number of D regions.
#define | NVIC_MPU_TYPE_SEPARATE 0x00000001
Separate or unified MPU.
#define | NVIC_MPU_TYPE_IREGION_S 16
The following are defines for the bit fields in the NVIC_MPU_TYPE register.
#define | NVIC_MPU_TYPE_DREGION_S 8
The following are defines for the bit fields in the NVIC_MPU_TYPE register.
#define | NVIC_MPU_CTRL_PRIVDEFEN 0x00000004
The following are defines for the bit fields in the NVIC_MPU_CTRL register.
#define | NVIC_MPU_CTRL_HFNMIENA 0x00000002
MPU enabled during faults.
#define | NVIC_MPU_CTRL_ENABLE 0x00000001
MPU enable.
#define | NVIC_MPU_NUMBER_M 0x000000FF
The following are defines for the bit fields in the NVIC_MPU_NUMBER register.
#define | NVIC_MPU_NUMBER_S 0
The following are defines for the bit fields in the NVIC_MPU_NUMBER register.
#define | NVIC_MPU_BASE_ADDR_M 0xFFFFFFE0
The following are defines for the bit fields in the NVIC_MPU_BASE register.
#define | NVIC_MPU_BASE_VALID 0x00000010
Region number valid.
#define | NVIC_MPU_BASE_REGION_M 0x0000000F
Region number.
#define | NVIC_MPU_BASE_ADDR_S 8
The following are defines for the bit fields in the NVIC_MPU_BASE register.
#define | NVIC_MPU_BASE_REGION_S 0
The following are defines for the bit fields in the NVIC_MPU_BASE register.
#define | NVIC_MPU_ATTR_M 0xFFFF0000
The following are defines for the bit fields in the NVIC_MPU_ATTR register.
#define | NVIC_MPU_ATTR_AP_NO_NO 0x00000000
prv: no access, usr: no access
#define | NVIC_MPU_ATTR_BUFFRABLE 0x00010000
Bufferable.
#define | NVIC_MPU_ATTR_CACHEABLE 0x00020000
Cacheable.
#define | NVIC_MPU_ATTR_SHAREABLE 0x00040000
Shareable.
#define | NVIC_MPU_ATTR_TEX_M 0x00380000
Type extension mask.
#define | NVIC_MPU_ATTR_AP_RW_NO 0x01000000
prv: rw, usr: none
#define | NVIC_MPU_ATTR_AP_RW_RO 0x02000000
prv: rw, usr: read-only
#define | NVIC_MPU_ATTR_AP_RW_RW 0x03000000
prv: rw, usr: rw
#define | NVIC_MPU_ATTR_AP_RO_NO 0x05000000
prv: ro, usr: none
#define | NVIC_MPU_ATTR_AP_RO_RO 0x06000000
prv: ro, usr: ro
#define | NVIC_MPU_ATTR_AP_M 0x07000000
Access permissions mask.
#define | NVIC_MPU_ATTR_XN 0x10000000
Execute disable.
#define | NVIC_MPU_ATTR_SRD_M 0x0000FF00
Sub-region disable mask.
#define | NVIC_MPU_ATTR_SRD_0 0x00000100
Sub-region 0 disable.
#define | NVIC_MPU_ATTR_SRD_1 0x00000200
Sub-region 1 disable.
#define | NVIC_MPU_ATTR_SRD_2 0x00000400
Sub-region 2 disable.
#define | NVIC_MPU_ATTR_SRD_3 0x00000800
Sub-region 3 disable.
#define | NVIC_MPU_ATTR_SRD_4 0x00001000
Sub-region 4 disable.
#define | NVIC_MPU_ATTR_SRD_5 0x00002000
Sub-region 5 disable.
#define | NVIC_MPU_ATTR_SRD_6 0x00004000
Sub-region 6 disable.
#define | NVIC_MPU_ATTR_SRD_7 0x00008000
Sub-region 7 disable.
#define | NVIC_MPU_ATTR_SIZE_M 0x0000003E
Region size mask.
#define | NVIC_MPU_ATTR_SIZE_32B 0x00000008
Region size 32 bytes.
#define | NVIC_MPU_ATTR_SIZE_64B 0x0000000A
Region size 64 bytes.
#define | NVIC_MPU_ATTR_SIZE_128B 0x0000000C
Region size 128 bytes.
#define | NVIC_MPU_ATTR_SIZE_256B 0x0000000E
Region size 256 bytes.
#define | NVIC_MPU_ATTR_SIZE_512B 0x00000010
Region size 512 bytes.
#define | NVIC_MPU_ATTR_SIZE_1K 0x00000012
Region size 1 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_2K 0x00000014
Region size 2 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_4K 0x00000016
Region size 4 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_8K 0x00000018
Region size 8 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_16K 0x0000001A
Region size 16 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_32K 0x0000001C
Region size 32 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_64K 0x0000001E
Region size 64 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_128K 0x00000020
Region size 128 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_256K 0x00000022
Region size 256 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_512K 0x00000024
Region size 512 Kbytes.
#define | NVIC_MPU_ATTR_SIZE_1M 0x00000026
Region size 1 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_2M 0x00000028
Region size 2 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_4M 0x0000002A
Region size 4 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_8M 0x0000002C
Region size 8 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_16M 0x0000002E
Region size 16 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_32M 0x00000030
Region size 32 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_64M 0x00000032
Region size 64 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_128M 0x00000034
Region size 128 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_256M 0x00000036
Region size 256 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_512M 0x00000038
Region size 512 Mbytes.
#define | NVIC_MPU_ATTR_SIZE_1G 0x0000003A
Region size 1 Gbytes.
#define | NVIC_MPU_ATTR_SIZE_2G 0x0000003C
Region size 2 Gbytes.
#define | NVIC_MPU_ATTR_SIZE_4G 0x0000003E
Region size 4 Gbytes.
#define | NVIC_MPU_ATTR_ENABLE 0x00000001
Region enable.
#define | NVIC_DBG_CTRL_DBGKEY_M 0xFFFF0000
The following are defines for the bit fields in the NVIC_DBG_CTRL register.
#define | NVIC_DBG_CTRL_DBGKEY 0xA05F0000
Debug key.
#define | NVIC_DBG_CTRL_S_RESET_ST 0x02000000
Core has reset since last read.
#define | NVIC_DBG_CTRL_S_RETIRE_ST 0x01000000
Core has executed insruction.
#define | NVIC_DBG_CTRL_S_LOCKUP 0x00080000
Core is locked up.
#define | NVIC_DBG_CTRL_S_SLEEP 0x00040000
Core is sleeping.
#define | NVIC_DBG_CTRL_S_HALT 0x00020000
Core status on halt.
#define | NVIC_DBG_CTRL_S_REGRDY 0x00010000
Register read/write available.
#define | NVIC_DBG_CTRL_C_SNAPSTALL 0x00000020
Breaks a stalled load/store.
#define | NVIC_DBG_CTRL_C_MASKINT 0x00000008
Mask interrupts when stepping.
#define | NVIC_DBG_CTRL_C_STEP 0x00000004
Step the core.
#define | NVIC_DBG_CTRL_C_HALT 0x00000002
Halt the core.
#define | NVIC_DBG_CTRL_C_DEBUGEN 0x00000001
Enable debug.
#define | NVIC_DBG_XFER_REG_WNR 0x00010000
The following are defines for the bit fields in the NVIC_DBG_XFER register.
#define | NVIC_DBG_XFER_REG_SEL_M 0x0000001F
Register.
#define | NVIC_DBG_XFER_REG_CFBP 0x00000014
Control/Fault/BasePri/PriMask.
#define | NVIC_DBG_XFER_REG_DSP 0x00000013
Deep SP.
#define | NVIC_DBG_XFER_REG_PSP 0x00000012
Process SP.
#define | NVIC_DBG_XFER_REG_MSP 0x00000011
Main SP.
#define | NVIC_DBG_XFER_REG_FLAGS 0x00000010
xPSR/Flags register
#define | NVIC_DBG_XFER_REG_R15 0x0000000F
Register R15.
#define | NVIC_DBG_XFER_REG_R14 0x0000000E
Register R14.
#define | NVIC_DBG_XFER_REG_R13 0x0000000D
Register R13.
#define | NVIC_DBG_XFER_REG_R12 0x0000000C
Register R12.
#define | NVIC_DBG_XFER_REG_R11 0x0000000B
Register R11.
#define | NVIC_DBG_XFER_REG_R10 0x0000000A
Register R10.
#define | NVIC_DBG_XFER_REG_R9 0x00000009
Register R9.
#define | NVIC_DBG_XFER_REG_R8 0x00000008
Register R8.
#define | NVIC_DBG_XFER_REG_R7 0x00000007
Register R7.
#define | NVIC_DBG_XFER_REG_R6 0x00000006
Register R6.
#define | NVIC_DBG_XFER_REG_R5 0x00000005
Register R5.
#define | NVIC_DBG_XFER_REG_R4 0x00000004
Register R4.
#define | NVIC_DBG_XFER_REG_R3 0x00000003
Register R3.
#define | NVIC_DBG_XFER_REG_R2 0x00000002
Register R2.
#define | NVIC_DBG_XFER_REG_R1 0x00000001
Register R1.
#define | NVIC_DBG_XFER_REG_R0 0x00000000
Register R0.
#define | NVIC_DBG_DATA_M 0xFFFFFFFF
The following are defines for the bit fields in the NVIC_DBG_DATA register.
#define | NVIC_DBG_DATA_S 0
The following are defines for the bit fields in the NVIC_DBG_DATA register.
#define | NVIC_DBG_INT_HARDERR 0x00000400
The following are defines for the bit fields in the NVIC_DBG_INT register.
#define | NVIC_DBG_INT_INTERR 0x00000200
Debug trap on interrupt errors.
#define | NVIC_DBG_INT_BUSERR 0x00000100
Debug trap on bus error.
#define | NVIC_DBG_INT_STATERR 0x00000080
Debug trap on usage fault state.
#define | NVIC_DBG_INT_CHKERR 0x00000040
Debug trap on usage fault check.
#define | NVIC_DBG_INT_NOCPERR 0x00000020
Debug trap on coprocessor error.
#define | NVIC_DBG_INT_MMERR 0x00000010
Debug trap on mem manage fault.
#define | NVIC_DBG_INT_RESET 0x00000008
Core reset status.
#define | NVIC_DBG_INT_RSTPENDCLR 0x00000004
Clear pending core reset.
#define | NVIC_DBG_INT_RSTPENDING 0x00000002
Core reset is pending.
#define | NVIC_DBG_INT_RSTVCATCH 0x00000001
Reset vector catch.
#define | NVIC_SW_TRIG_INTID_M 0x000003FF
The following are defines for the bit fields in the NVIC_SW_TRIG register.
#define | NVIC_SW_TRIG_INTID_S 0
The following are defines for the bit fields in the NVIC_SW_TRIG register.

Detailed Description

NVIC STM32F10xx registers definition.

Definition in file stm32_nvic.h.

Define Documentation

#define FAULT_NMI 2

The following are defines for the fault assignments.

NMI fault

Definition at line 44 of file stm32_nvic.h.

#define NVIC_ACTIVE0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_ACTIVE0 register.

Interrupt 31 active

Definition at line 509 of file stm32_nvic.h.

#define NVIC_ACTIVE1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_ACTIVE1 register.

Interrupt 59 active

Definition at line 547 of file stm32_nvic.h.

#define NVIC_APINT_VECTKEY_M 0xFFFF0000

The following are defines for the bit fields in the NVIC_APINT register.

Vector key mask

Definition at line 772 of file stm32_nvic.h.

#define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100

The following are defines for the bit fields in the NVIC_CFG_CTRL register.

Ignore bus fault in NMI/fault

Definition at line 802 of file stm32_nvic.h.

#define NVIC_CPUID_IMP_M 0xFF000000

The following are defines for the bit fields in the NVIC_CPUID register.

Implementer

Definition at line 735 of file stm32_nvic.h.

#define NVIC_DBG_CTRL_DBGKEY_M 0xFFFF0000

The following are defines for the bit fields in the NVIC_DBG_CTRL register.

Debug key mask

Definition at line 1029 of file stm32_nvic.h.

#define NVIC_DBG_CTRL_S_RETIRE_ST 0x01000000

Core has executed insruction.

since last read

Definition at line 1033 of file stm32_nvic.h.

#define NVIC_DBG_DATA_M 0xFFFFFFFF

The following are defines for the bit fields in the NVIC_DBG_DATA register.

Data temporary cache

Definition at line 1081 of file stm32_nvic.h.

#define NVIC_DBG_DATA_S 0

The following are defines for the bit fields in the NVIC_DBG_DATA register.

Data temporary cache

Definition at line 1082 of file stm32_nvic.h.

#define NVIC_DBG_INT_HARDERR 0x00000400

The following are defines for the bit fields in the NVIC_DBG_INT register.

Debug trap on hard fault

Definition at line 1089 of file stm32_nvic.h.

#define NVIC_DBG_XFER_REG_WNR 0x00010000

The following are defines for the bit fields in the NVIC_DBG_XFER register.

Write or not read

Definition at line 1052 of file stm32_nvic.h.

#define NVIC_DEBUG_STAT_EXTRNL 0x00000010

The following are defines for the bit fields in the NVIC_DEBUG_STAT register.

EDBGRQ asserted

Definition at line 903 of file stm32_nvic.h.

#define NVIC_DIS0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_DIS0 register.

Interrupt 31 disable

Definition at line 293 of file stm32_nvic.h.

#define NVIC_DIS1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_DIS1 register.

Interrupt 59 disable

Definition at line 331 of file stm32_nvic.h.

#define NVIC_EN0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_EN0 register.

Interrupt 31 enable

Definition at line 221 of file stm32_nvic.h.

#define NVIC_EN1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_EN1 register.

Interrupt 59 enable

Definition at line 259 of file stm32_nvic.h.

#define NVIC_FAULT_ADDR_M 0xFFFFFFFF

The following are defines for the bit fields in the NVIC_FAULT_ADDR register.

Data bus fault address

Definition at line 923 of file stm32_nvic.h.

#define NVIC_FAULT_ADDR_S 0

The following are defines for the bit fields in the NVIC_FAULT_ADDR register.

Data bus fault address

Definition at line 924 of file stm32_nvic.h.

#define NVIC_FAULT_STAT_DIV0 0x02000000

The following are defines for the bit fields in the NVIC_FAULT_STAT register.

Divide by zero fault

Definition at line 869 of file stm32_nvic.h.

#define NVIC_HFAULT_STAT_DBG 0x80000000

The following are defines for the bit fields in the NVIC_HFAULT_STAT register.

Debug event

Definition at line 893 of file stm32_nvic.h.

#define NVIC_INT_CTRL_NMI_SET 0x80000000

The following are defines for the bit fields in the NVIC_INT_CTRL register.

Pend a NMI

Definition at line 745 of file stm32_nvic.h.

#define NVIC_INT_CTRL_VEC_ACT_S 0

The following are defines for the bit fields in the NVIC_INT_CTRL register.

Pend a NMI

Definition at line 756 of file stm32_nvic.h.

#define NVIC_INT_CTRL_VEC_PEN_S 12

The following are defines for the bit fields in the NVIC_INT_CTRL register.

Pend a NMI

Definition at line 755 of file stm32_nvic.h.

#define NVIC_INT_TYPE 0xE000E004

The following are defines for the NVIC register addresses.

Interrupt Controller Type Reg

Definition at line 116 of file stm32_nvic.h.

#define NVIC_INT_TYPE_LINES_M 0x0000001F

The following are defines for the bit fields in the NVIC_INT_TYPE register.

Number of interrupt lines (x32)

Definition at line 176 of file stm32_nvic.h.

#define NVIC_INT_TYPE_LINES_S 0

The following are defines for the bit fields in the NVIC_INT_TYPE register.

Number of interrupt lines (x32)

Definition at line 177 of file stm32_nvic.h.

#define NVIC_MM_ADDR_M 0xFFFFFFFF

The following are defines for the bit fields in the NVIC_MM_ADDR register.

Data fault address

Definition at line 914 of file stm32_nvic.h.

#define NVIC_MM_ADDR_S 0

The following are defines for the bit fields in the NVIC_MM_ADDR register.

Data fault address

Definition at line 915 of file stm32_nvic.h.

#define NVIC_MPU_ATTR_M 0xFFFF0000

The following are defines for the bit fields in the NVIC_MPU_ATTR register.

Attributes

Definition at line 971 of file stm32_nvic.h.

#define NVIC_MPU_BASE_ADDR_M 0xFFFFFFE0

The following are defines for the bit fields in the NVIC_MPU_BASE register.

Base address mask

Definition at line 960 of file stm32_nvic.h.

#define NVIC_MPU_BASE_ADDR_S 8

The following are defines for the bit fields in the NVIC_MPU_BASE register.

Base address mask

Definition at line 963 of file stm32_nvic.h.

#define NVIC_MPU_BASE_REGION_S 0

The following are defines for the bit fields in the NVIC_MPU_BASE register.

Base address mask

Definition at line 964 of file stm32_nvic.h.

#define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004

The following are defines for the bit fields in the NVIC_MPU_CTRL register.

MPU default region in priv mode

Definition at line 942 of file stm32_nvic.h.

#define NVIC_MPU_NUMBER_M 0x000000FF

The following are defines for the bit fields in the NVIC_MPU_NUMBER register.

MPU region to access

Definition at line 952 of file stm32_nvic.h.

#define NVIC_MPU_NUMBER_S 0

The following are defines for the bit fields in the NVIC_MPU_NUMBER register.

MPU region to access

Definition at line 953 of file stm32_nvic.h.

#define NVIC_MPU_TYPE_DREGION_S 8

The following are defines for the bit fields in the NVIC_MPU_TYPE register.

Number of I regions

Definition at line 935 of file stm32_nvic.h.

#define NVIC_MPU_TYPE_IREGION_M 0x00FF0000

The following are defines for the bit fields in the NVIC_MPU_TYPE register.

Number of I regions

Definition at line 931 of file stm32_nvic.h.

#define NVIC_MPU_TYPE_IREGION_S 16

The following are defines for the bit fields in the NVIC_MPU_TYPE register.

Number of I regions

Definition at line 934 of file stm32_nvic.h.

#define NVIC_PEND0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_PEND0 register.

Interrupt 31 pend

Definition at line 365 of file stm32_nvic.h.

#define NVIC_PEND1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_PEND1 register.

Interrupt 59 pend

Definition at line 403 of file stm32_nvic.h.

#define NVIC_PRI0_INT0_S 0

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 588 of file stm32_nvic.h.

#define NVIC_PRI0_INT1_S 8

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 587 of file stm32_nvic.h.

#define NVIC_PRI0_INT2_S 16

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 586 of file stm32_nvic.h.

#define NVIC_PRI0_INT3_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 581 of file stm32_nvic.h.

#define NVIC_PRI0_INT3_S 24

The following are defines for the bit fields in the NVIC_PRI0 register.

Interrupt 3 priority mask

Definition at line 585 of file stm32_nvic.h.

#define NVIC_PRI10_INT40_S 0

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 728 of file stm32_nvic.h.

#define NVIC_PRI10_INT41_S 8

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 727 of file stm32_nvic.h.

#define NVIC_PRI10_INT42_S 16

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 726 of file stm32_nvic.h.

#define NVIC_PRI10_INT43_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 721 of file stm32_nvic.h.

#define NVIC_PRI10_INT43_S 24

The following are defines for the bit fields in the NVIC_PRI10 register.

Interrupt 43 priority mask

Definition at line 725 of file stm32_nvic.h.

#define NVIC_PRI1_INT4_S 0

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 602 of file stm32_nvic.h.

#define NVIC_PRI1_INT5_S 8

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 601 of file stm32_nvic.h.

#define NVIC_PRI1_INT6_S 16

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 600 of file stm32_nvic.h.

#define NVIC_PRI1_INT7_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 595 of file stm32_nvic.h.

#define NVIC_PRI1_INT7_S 24

The following are defines for the bit fields in the NVIC_PRI1 register.

Interrupt 7 priority mask

Definition at line 599 of file stm32_nvic.h.

#define NVIC_PRI2_INT10_S 16

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 614 of file stm32_nvic.h.

#define NVIC_PRI2_INT11_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 609 of file stm32_nvic.h.

#define NVIC_PRI2_INT11_S 24

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 613 of file stm32_nvic.h.

#define NVIC_PRI2_INT8_S 0

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 616 of file stm32_nvic.h.

#define NVIC_PRI2_INT9_S 8

The following are defines for the bit fields in the NVIC_PRI2 register.

Interrupt 11 priority mask

Definition at line 615 of file stm32_nvic.h.

#define NVIC_PRI3_INT12_S 0

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 630 of file stm32_nvic.h.

#define NVIC_PRI3_INT13_S 8

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 629 of file stm32_nvic.h.

#define NVIC_PRI3_INT14_S 16

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 628 of file stm32_nvic.h.

#define NVIC_PRI3_INT15_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 623 of file stm32_nvic.h.

#define NVIC_PRI3_INT15_S 24

The following are defines for the bit fields in the NVIC_PRI3 register.

Interrupt 15 priority mask

Definition at line 627 of file stm32_nvic.h.

#define NVIC_PRI4_INT16_S 0

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 644 of file stm32_nvic.h.

#define NVIC_PRI4_INT17_S 8

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 643 of file stm32_nvic.h.

#define NVIC_PRI4_INT18_S 16

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 642 of file stm32_nvic.h.

#define NVIC_PRI4_INT19_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 637 of file stm32_nvic.h.

#define NVIC_PRI4_INT19_S 24

The following are defines for the bit fields in the NVIC_PRI4 register.

Interrupt 19 priority mask

Definition at line 641 of file stm32_nvic.h.

#define NVIC_PRI5_INT20_S 0

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 658 of file stm32_nvic.h.

#define NVIC_PRI5_INT21_S 8

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 657 of file stm32_nvic.h.

#define NVIC_PRI5_INT22_S 16

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 656 of file stm32_nvic.h.

#define NVIC_PRI5_INT23_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 651 of file stm32_nvic.h.

#define NVIC_PRI5_INT23_S 24

The following are defines for the bit fields in the NVIC_PRI5 register.

Interrupt 23 priority mask

Definition at line 655 of file stm32_nvic.h.

#define NVIC_PRI6_INT24_S 0

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 672 of file stm32_nvic.h.

#define NVIC_PRI6_INT25_S 8

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 671 of file stm32_nvic.h.

#define NVIC_PRI6_INT26_S 16

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 670 of file stm32_nvic.h.

#define NVIC_PRI6_INT27_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 665 of file stm32_nvic.h.

#define NVIC_PRI6_INT27_S 24

The following are defines for the bit fields in the NVIC_PRI6 register.

Interrupt 27 priority mask

Definition at line 669 of file stm32_nvic.h.

#define NVIC_PRI7_INT28_S 0

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 686 of file stm32_nvic.h.

#define NVIC_PRI7_INT29_S 8

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 685 of file stm32_nvic.h.

#define NVIC_PRI7_INT30_S 16

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 684 of file stm32_nvic.h.

#define NVIC_PRI7_INT31_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 679 of file stm32_nvic.h.

#define NVIC_PRI7_INT31_S 24

The following are defines for the bit fields in the NVIC_PRI7 register.

Interrupt 31 priority mask

Definition at line 683 of file stm32_nvic.h.

#define NVIC_PRI8_INT32_S 0

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 700 of file stm32_nvic.h.

#define NVIC_PRI8_INT33_S 8

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 699 of file stm32_nvic.h.

#define NVIC_PRI8_INT34_S 16

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 698 of file stm32_nvic.h.

#define NVIC_PRI8_INT35_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 693 of file stm32_nvic.h.

#define NVIC_PRI8_INT35_S 24

The following are defines for the bit fields in the NVIC_PRI8 register.

Interrupt 35 priority mask

Definition at line 697 of file stm32_nvic.h.

#define NVIC_PRI9_INT36_S 0

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 714 of file stm32_nvic.h.

#define NVIC_PRI9_INT37_S 8

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 713 of file stm32_nvic.h.

#define NVIC_PRI9_INT38_S 16

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 712 of file stm32_nvic.h.

#define NVIC_PRI9_INT39_M 0xFF000000

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 707 of file stm32_nvic.h.

#define NVIC_PRI9_INT39_S 24

The following are defines for the bit fields in the NVIC_PRI9 register.

Interrupt 39 priority mask

Definition at line 711 of file stm32_nvic.h.

#define NVIC_ST_CAL_NOREF 0x80000000

The following are defines for the bit fields in the NVIC_ST_CAL register.

No reference clock

Definition at line 211 of file stm32_nvic.h.

#define NVIC_ST_CAL_ONEMS_S 0

The following are defines for the bit fields in the NVIC_ST_CAL register.

No reference clock

Definition at line 214 of file stm32_nvic.h.

#define NVIC_ST_CTRL_COUNT 0x00010000

The following are defines for the bit fields in the NVIC_ST_CTRL register.

Count flag

Definition at line 184 of file stm32_nvic.h.

#define NVIC_ST_CURRENT_M 0x00FFFFFF

The following are defines for the bit fields in the NVIC_ST_CURRENT register.

Counter current value

Definition at line 203 of file stm32_nvic.h.

#define NVIC_ST_CURRENT_S 0

The following are defines for the bit fields in the NVIC_ST_CURRENT register.

Counter current value

Definition at line 204 of file stm32_nvic.h.

#define NVIC_ST_RELOAD_M 0x00FFFFFF

The following are defines for the bit fields in the NVIC_ST_RELOAD register.

Counter load value

Definition at line 194 of file stm32_nvic.h.

#define NVIC_ST_RELOAD_S 0

The following are defines for the bit fields in the NVIC_ST_RELOAD register.

Counter load value

Definition at line 195 of file stm32_nvic.h.

#define NVIC_SW_TRIG_INTID_M 0x000003FF

The following are defines for the bit fields in the NVIC_SW_TRIG register.

Interrupt to trigger

Definition at line 1106 of file stm32_nvic.h.

#define NVIC_SW_TRIG_INTID_S 0

The following are defines for the bit fields in the NVIC_SW_TRIG register.

Interrupt to trigger

Definition at line 1107 of file stm32_nvic.h.

#define NVIC_SYS_CTRL_SEVONPEND 0x00000010

The following are defines for the bit fields in the NVIC_SYS_CTRL register.

Wakeup on pend

Definition at line 793 of file stm32_nvic.h.

#define NVIC_SYS_HND_CTRL_USAGE 0x00040000

The following are defines for the bit fields in the NVIC_SYS_HND_CTRL register.

Usage fault enable

Definition at line 850 of file stm32_nvic.h.

#define NVIC_SYS_PRI1_BUS_S 8

The following are defines for the bit fields in the NVIC_SYS_PRI1 register.

Priority of reserved handler

Definition at line 819 of file stm32_nvic.h.

#define NVIC_SYS_PRI1_MEM_S 0

The following are defines for the bit fields in the NVIC_SYS_PRI1 register.

Priority of reserved handler

Definition at line 820 of file stm32_nvic.h.

#define NVIC_SYS_PRI1_RES_M 0xFF000000

The following are defines for the bit fields in the NVIC_SYS_PRI1 register.

Priority of reserved handler

Definition at line 814 of file stm32_nvic.h.

#define NVIC_SYS_PRI1_USAGE_S 16

The following are defines for the bit fields in the NVIC_SYS_PRI1 register.

Priority of reserved handler

Definition at line 818 of file stm32_nvic.h.

#define NVIC_SYS_PRI2_SVC_M 0xFF000000

The following are defines for the bit fields in the NVIC_SYS_PRI2 register.

Priority of SVCall handler

Definition at line 827 of file stm32_nvic.h.

#define NVIC_SYS_PRI2_SVC_S 24

The following are defines for the bit fields in the NVIC_SYS_PRI2 register.

Priority of SVCall handler

Definition at line 829 of file stm32_nvic.h.

#define NVIC_SYS_PRI3_DEBUG_S 0

The following are defines for the bit fields in the NVIC_SYS_PRI3 register.

Priority of Sys Tick handler

Definition at line 842 of file stm32_nvic.h.

#define NVIC_SYS_PRI3_PENDSV_S 16

The following are defines for the bit fields in the NVIC_SYS_PRI3 register.

Priority of Sys Tick handler

Definition at line 841 of file stm32_nvic.h.

#define NVIC_SYS_PRI3_TICK_M 0xFF000000

The following are defines for the bit fields in the NVIC_SYS_PRI3 register.

Priority of Sys Tick handler

Definition at line 836 of file stm32_nvic.h.

#define NVIC_SYS_PRI3_TICK_S 24

The following are defines for the bit fields in the NVIC_SYS_PRI3 register.

Priority of Sys Tick handler

Definition at line 840 of file stm32_nvic.h.

#define NVIC_UNPEND0_INT31 0x80000000

The following are defines for the bit fields in the NVIC_UNPEND0 register.

Interrupt 31 unpend

Definition at line 437 of file stm32_nvic.h.

#define NVIC_UNPEND1_INT59 0x08000000

The following are defines for the bit fields in the NVIC_UNPEND1 register.

Interrupt 59 unpend

Definition at line 475 of file stm32_nvic.h.

#define NVIC_VTABLE_BASE 0x20000000

The following are defines for the bit fields in the NVIC_VTABLE register.

Vector table base

Definition at line 763 of file stm32_nvic.h.

#define NVIC_VTABLE_OFFSET_S 8

The following are defines for the bit fields in the NVIC_VTABLE register.

Vector table base

Definition at line 765 of file stm32_nvic.h.


BeRTOS: stm32_nvic.h Source File

  • cpu
  • cortex-m3
  • io
stm32_nvic.h
Go to the documentation of this file.
00001
00036 #ifndef STM32_NVIC_H
00037 #define STM32_NVIC_H
00038
00039
00043 /*\{*/
00044 #define FAULT_NMI               2           ///< NMI fault
00045 #define FAULT_HARD              3           ///< Hard fault
00046 #define FAULT_MPU               4           ///< MPU fault
00047 #define FAULT_BUS               5           ///< Bus fault
00048 #define FAULT_USAGE             6           ///< Usage fault
00049 #define FAULT_SVCALL            11          ///< SVCall
00050 #define FAULT_DEBUG             12          ///< Debug monitor
00051 #define FAULT_PENDSV            14          ///< PendSV
00052 #define FAULT_SYSTICK           15          ///< System Tick
00053 /*\}*/
00054
00058 /*\{*/
00059 #define NVIC_INT_TYPE_R         (*((reg32_t *)0xE000E004))
00060 #define NVIC_ST_CTRL_R          (*((reg32_t *)0xE000E010))
00061 #define NVIC_ST_RELOAD_R        (*((reg32_t *)0xE000E014))
00062 #define NVIC_ST_CURRENT_R       (*((reg32_t *)0xE000E018))
00063 #define NVIC_ST_CAL_R           (*((reg32_t *)0xE000E01C))
00064 #define NVIC_EN0_R              (*((reg32_t *)0xE000E100))
00065 #define NVIC_EN1_R              (*((reg32_t *)0xE000E104))
00066 #define NVIC_DIS0_R             (*((reg32_t *)0xE000E180))
00067 #define NVIC_DIS1_R             (*((reg32_t *)0xE000E184))
00068 #define NVIC_PEND0_R            (*((reg32_t *)0xE000E200))
00069 #define NVIC_PEND1_R            (*((reg32_t *)0xE000E204))
00070 #define NVIC_UNPEND0_R          (*((reg32_t *)0xE000E280))
00071 #define NVIC_UNPEND1_R          (*((reg32_t *)0xE000E284))
00072 #define NVIC_ACTIVE0_R          (*((reg32_t *)0xE000E300))
00073 #define NVIC_ACTIVE1_R          (*((reg32_t *)0xE000E304))
00074 #define NVIC_PRI0_R             (*((reg32_t *)0xE000E400))
00075 #define NVIC_PRI1_R             (*((reg32_t *)0xE000E404))
00076 #define NVIC_PRI2_R             (*((reg32_t *)0xE000E408))
00077 #define NVIC_PRI3_R             (*((reg32_t *)0xE000E40C))
00078 #define NVIC_PRI4_R             (*((reg32_t *)0xE000E410))
00079 #define NVIC_PRI5_R             (*((reg32_t *)0xE000E414))
00080 #define NVIC_PRI6_R             (*((reg32_t *)0xE000E418))
00081 #define NVIC_PRI7_R             (*((reg32_t *)0xE000E41C))
00082 #define NVIC_PRI8_R             (*((reg32_t *)0xE000E420))
00083 #define NVIC_PRI9_R             (*((reg32_t *)0xE000E424))
00084 #define NVIC_PRI10_R            (*((reg32_t *)0xE000E428))
00085 #define NVIC_CPUID_R            (*((reg32_t *)0xE000ED00))
00086 #define NVIC_INT_CTRL_R         (*((reg32_t *)0xE000ED04))
00087 #define NVIC_VTABLE_R           (*((reg32_t *)0xE000ED08))
00088 #define NVIC_APINT_R            (*((reg32_t *)0xE000ED0C))
00089 #define NVIC_SYS_CTRL_R         (*((reg32_t *)0xE000ED10))
00090 #define NVIC_CFG_CTRL_R         (*((reg32_t *)0xE000ED14))
00091 #define NVIC_SYS_PRI1_R         (*((reg32_t *)0xE000ED18))
00092 #define NVIC_SYS_PRI2_R         (*((reg32_t *)0xE000ED1C))
00093 #define NVIC_SYS_PRI3_R         (*((reg32_t *)0xE000ED20))
00094 #define NVIC_SYS_HND_CTRL_R     (*((reg32_t *)0xE000ED24))
00095 #define NVIC_FAULT_STAT_R       (*((reg32_t *)0xE000ED28))
00096 #define NVIC_HFAULT_STAT_R      (*((reg32_t *)0xE000ED2C))
00097 #define NVIC_DEBUG_STAT_R       (*((reg32_t *)0xE000ED30))
00098 #define NVIC_MM_ADDR_R          (*((reg32_t *)0xE000ED34))
00099 #define NVIC_FAULT_ADDR_R       (*((reg32_t *)0xE000ED38))
00100 #define NVIC_MPU_TYPE_R         (*((reg32_t *)0xE000ED90))
00101 #define NVIC_MPU_CTRL_R         (*((reg32_t *)0xE000ED94))
00102 #define NVIC_MPU_NUMBER_R       (*((reg32_t *)0xE000ED98))
00103 #define NVIC_MPU_BASE_R         (*((reg32_t *)0xE000ED9C))
00104 #define NVIC_MPU_ATTR_R         (*((reg32_t *)0xE000EDA0))
00105 #define NVIC_DBG_CTRL_R         (*((reg32_t *)0xE000EDF0))
00106 #define NVIC_DBG_XFER_R         (*((reg32_t *)0xE000EDF4))
00107 #define NVIC_DBG_DATA_R         (*((reg32_t *)0xE000EDF8))
00108 #define NVIC_DBG_INT_R          (*((reg32_t *)0xE000EDFC))
00109 #define NVIC_SW_TRIG_R          (*((reg32_t *)0xE000EF00))
00110 /*\}*/
00111
00115 /*\{*/
00116 #define NVIC_INT_TYPE           0xE000E004  ///< Interrupt Controller Type Reg
00117 #define NVIC_ST_CTRL            0xE000E010  ///< SysTick Control and Status Reg
00118 #define NVIC_ST_RELOAD          0xE000E014  ///< SysTick Reload Value Register
00119 #define NVIC_ST_CURRENT         0xE000E018  ///< SysTick Current Value Register
00120 #define NVIC_ST_CAL             0xE000E01C  ///< SysTick Calibration Value Reg
00121 #define NVIC_EN0                0xE000E100  ///< IRQ 0 to 31 Set Enable Register
00122 #define NVIC_EN1                0xE000E104  ///< IRQ 32 to 63 Set Enable Register
00123 #define NVIC_DIS0               0xE000E180  ///< IRQ 0 to 31 Clear Enable Reg
00124 #define NVIC_DIS1               0xE000E184  ///< IRQ 32 to 63 Clear Enable Reg
00125 #define NVIC_PEND0              0xE000E200  ///< IRQ 0 to 31 Set Pending Register
00126 #define NVIC_PEND1              0xE000E204  ///< IRQ 32 to 63 Set Pending Reg
00127 #define NVIC_UNPEND0            0xE000E280  ///< IRQ 0 to 31 Clear Pending Reg
00128 #define NVIC_UNPEND1            0xE000E284  ///< IRQ 32 to 63 Clear Pending Reg
00129 #define NVIC_ACTIVE0            0xE000E300  ///< IRQ 0 to 31 Active Register
00130 #define NVIC_ACTIVE1            0xE000E304  ///< IRQ 32 to 63 Active Register
00131 #define NVIC_PRI0               0xE000E400  ///< IRQ 0 to 3 Priority Register
00132 #define NVIC_PRI1               0xE000E404  ///< IRQ 4 to 7 Priority Register
00133 #define NVIC_PRI2               0xE000E408  ///< IRQ 8 to 11 Priority Register
00134 #define NVIC_PRI3               0xE000E40C  ///< IRQ 12 to 15 Priority Register
00135 #define NVIC_PRI4               0xE000E410  ///< IRQ 16 to 19 Priority Register
00136 #define NVIC_PRI5               0xE000E414  ///< IRQ 20 to 23 Priority Register
00137 #define NVIC_PRI6               0xE000E418  ///< IRQ 24 to 27 Priority Register
00138 #define NVIC_PRI7               0xE000E41C  ///< IRQ 28 to 31 Priority Register
00139 #define NVIC_PRI8               0xE000E420  ///< IRQ 32 to 35 Priority Register
00140 #define NVIC_PRI9               0xE000E424  ///< IRQ 36 to 39 Priority Register
00141 #define NVIC_PRI10              0xE000E428  ///< IRQ 40 to 43 Priority Register
00142 #define NVIC_PRI11              0xE000E42C  ///< IRQ 44 to 47 Priority Register
00143 #define NVIC_PRI12              0xE000E430  ///< IRQ 48 to 51 Priority Register
00144 #define NVIC_PRI13              0xE000E434  ///< IRQ 52 to 55 Priority Register
00145 #define NVIC_CPUID              0xE000ED00  ///< CPUID Base Register
00146 #define NVIC_INT_CTRL           0xE000ED04  ///< Interrupt Control State Register
00147 #define NVIC_VTABLE             0xE000ED08  ///< Vector Table Offset Register
00148 #define NVIC_APINT              0xE000ED0C  ///< App. Int & Reset Control Reg
00149 #define NVIC_SYS_CTRL           0xE000ED10  ///< System Control Register
00150 #define NVIC_CFG_CTRL           0xE000ED14  ///< Configuration Control Register
00151 #define NVIC_SYS_PRI1           0xE000ED18  ///< Sys. Handlers 4 to 7 Priority
00152 #define NVIC_SYS_PRI2           0xE000ED1C  ///< Sys. Handlers 8 to 11 Priority
00153 #define NVIC_SYS_PRI3           0xE000ED20  ///< Sys. Handlers 12 to 15 Priority
00154 #define NVIC_SYS_HND_CTRL       0xE000ED24  ///< System Handler Control and State
00155 #define NVIC_FAULT_STAT         0xE000ED28  ///< Configurable Fault Status Reg
00156 #define NVIC_HFAULT_STAT        0xE000ED2C  ///< Hard Fault Status Register
00157 #define NVIC_DEBUG_STAT         0xE000ED30  ///< Debug Status Register
00158 #define NVIC_MM_ADDR            0xE000ED34  ///< Mem Manage Address Register
00159 #define NVIC_FAULT_ADDR         0xE000ED38  ///< Bus Fault Address Register
00160 #define NVIC_MPU_TYPE           0xE000ED90  ///< MPU Type Register
00161 #define NVIC_MPU_CTRL           0xE000ED94  ///< MPU Control Register
00162 #define NVIC_MPU_NUMBER         0xE000ED98  ///< MPU Region Number Register
00163 #define NVIC_MPU_BASE           0xE000ED9C  ///< MPU Region Base Address Register
00164 #define NVIC_MPU_ATTR           0xE000EDA0  ///< MPU Region Attribute & Size Reg
00165 #define NVIC_DBG_CTRL           0xE000EDF0  ///< Debug Control and Status Reg
00166 #define NVIC_DBG_XFER           0xE000EDF4  ///< Debug Core Reg. Transfer Select
00167 #define NVIC_DBG_DATA           0xE000EDF8  ///< Debug Core Register Data
00168 #define NVIC_DBG_INT            0xE000EDFC  ///< Debug Reset Interrupt Control
00169 #define NVIC_SW_TRIG            0xE000EF00  ///< Software Trigger Interrupt Reg
00170 /*\}*/
00171
00175 /*\{*/
00176 #define NVIC_INT_TYPE_LINES_M   0x0000001F  ///< Number of interrupt lines (x32)
00177 #define NVIC_INT_TYPE_LINES_S   0
00178 /*\}*/
00179
00183 /*\{*/
00184 #define NVIC_ST_CTRL_COUNT      0x00010000  ///< Count flag
00185 #define NVIC_ST_CTRL_CLK_SRC    0x00000004  ///< Clock Source
00186 #define NVIC_ST_CTRL_INTEN      0x00000002  ///< Interrupt enable
00187 #define NVIC_ST_CTRL_ENABLE     0x00000001  ///< Counter mode
00188 /*\}*/
00189
00193 /*\{*/
00194 #define NVIC_ST_RELOAD_M        0x00FFFFFF  ///< Counter load value
00195 #define NVIC_ST_RELOAD_S        0
00196 /*\}*/
00197
00202 /*\{*/
00203 #define NVIC_ST_CURRENT_M       0x00FFFFFF  ///< Counter current value
00204 #define NVIC_ST_CURRENT_S       0
00205 /*\}*/
00206
00210 /*\{*/
00211 #define NVIC_ST_CAL_NOREF       0x80000000  ///< No reference clock
00212 #define NVIC_ST_CAL_SKEW        0x40000000  ///< Clock skew
00213 #define NVIC_ST_CAL_ONEMS_M     0x00FFFFFF  ///< 1ms reference value
00214 #define NVIC_ST_CAL_ONEMS_S     0
00215 /*\}*/
00216
00220 /*\{*/
00221 #define NVIC_EN0_INT31          0x80000000  ///< Interrupt 31 enable
00222 #define NVIC_EN0_INT30          0x40000000  ///< Interrupt 30 enable
00223 #define NVIC_EN0_INT29          0x20000000  ///< Interrupt 29 enable
00224 #define NVIC_EN0_INT28          0x10000000  ///< Interrupt 28 enable
00225 #define NVIC_EN0_INT27          0x08000000  ///< Interrupt 27 enable
00226 #define NVIC_EN0_INT26          0x04000000  ///< Interrupt 26 enable
00227 #define NVIC_EN0_INT25          0x02000000  ///< Interrupt 25 enable
00228 #define NVIC_EN0_INT24          0x01000000  ///< Interrupt 24 enable
00229 #define NVIC_EN0_INT23          0x00800000  ///< Interrupt 23 enable
00230 #define NVIC_EN0_INT22          0x00400000  ///< Interrupt 22 enable
00231 #define NVIC_EN0_INT21          0x00200000  ///< Interrupt 21 enable
00232 #define NVIC_EN0_INT20          0x00100000  ///< Interrupt 20 enable
00233 #define NVIC_EN0_INT19          0x00080000  ///< Interrupt 19 enable
00234 #define NVIC_EN0_INT18          0x00040000  ///< Interrupt 18 enable
00235 #define NVIC_EN0_INT17          0x00020000  ///< Interrupt 17 enable
00236 #define NVIC_EN0_INT16          0x00010000  ///< Interrupt 16 enable
00237 #define NVIC_EN0_INT15          0x00008000  ///< Interrupt 15 enable
00238 #define NVIC_EN0_INT14          0x00004000  ///< Interrupt 14 enable
00239 #define NVIC_EN0_INT13          0x00002000  ///< Interrupt 13 enable
00240 #define NVIC_EN0_INT12          0x00001000  ///< Interrupt 12 enable
00241 #define NVIC_EN0_INT11          0x00000800  ///< Interrupt 11 enable
00242 #define NVIC_EN0_INT10          0x00000400  ///< Interrupt 10 enable
00243 #define NVIC_EN0_INT9           0x00000200  ///< Interrupt 9 enable
00244 #define NVIC_EN0_INT8           0x00000100  ///< Interrupt 8 enable
00245 #define NVIC_EN0_INT7           0x00000080  ///< Interrupt 7 enable
00246 #define NVIC_EN0_INT6           0x00000040  ///< Interrupt 6 enable
00247 #define NVIC_EN0_INT5           0x00000020  ///< Interrupt 5 enable
00248 #define NVIC_EN0_INT4           0x00000010  ///< Interrupt 4 enable
00249 #define NVIC_EN0_INT3           0x00000008  ///< Interrupt 3 enable
00250 #define NVIC_EN0_INT2           0x00000004  ///< Interrupt 2 enable
00251 #define NVIC_EN0_INT1           0x00000002  ///< Interrupt 1 enable
00252 #define NVIC_EN0_INT0           0x00000001  ///< Interrupt 0 enable
00253 /*\}*/
00254
00258 /*\{*/
00259 #define NVIC_EN1_INT59          0x08000000  ///< Interrupt 59 enable
00260 #define NVIC_EN1_INT58          0x04000000  ///< Interrupt 58 enable
00261 #define NVIC_EN1_INT57          0x02000000  ///< Interrupt 57 enable
00262 #define NVIC_EN1_INT56          0x01000000  ///< Interrupt 56 enable
00263 #define NVIC_EN1_INT55          0x00800000  ///< Interrupt 55 enable
00264 #define NVIC_EN1_INT54          0x00400000  ///< Interrupt 54 enable
00265 #define NVIC_EN1_INT53          0x00200000  ///< Interrupt 53 enable
00266 #define NVIC_EN1_INT52          0x00100000  ///< Interrupt 52 enable
00267 #define NVIC_EN1_INT51          0x00080000  ///< Interrupt 51 enable
00268 #define NVIC_EN1_INT50          0x00040000  ///< Interrupt 50 enable
00269 #define NVIC_EN1_INT49          0x00020000  ///< Interrupt 49 enable
00270 #define NVIC_EN1_INT48          0x00010000  ///< Interrupt 48 enable
00271 #define NVIC_EN1_INT47          0x00008000  ///< Interrupt 47 enable
00272 #define NVIC_EN1_INT46          0x00004000  ///< Interrupt 46 enable
00273 #define NVIC_EN1_INT45          0x00002000  ///< Interrupt 45 enable
00274 #define NVIC_EN1_INT44          0x00001000  ///< Interrupt 44 enable
00275 #define NVIC_EN1_INT43          0x00000800  ///< Interrupt 43 enable
00276 #define NVIC_EN1_INT42          0x00000400  ///< Interrupt 42 enable
00277 #define NVIC_EN1_INT41          0x00000200  ///< Interrupt 41 enable
00278 #define NVIC_EN1_INT40          0x00000100  ///< Interrupt 40 enable
00279 #define NVIC_EN1_INT39          0x00000080  ///< Interrupt 39 enable
00280 #define NVIC_EN1_INT38          0x00000040  ///< Interrupt 38 enable
00281 #define NVIC_EN1_INT37          0x00000020  ///< Interrupt 37 enable
00282 #define NVIC_EN1_INT36          0x00000010  ///< Interrupt 36 enable
00283 #define NVIC_EN1_INT35          0x00000008  ///< Interrupt 35 enable
00284 #define NVIC_EN1_INT34          0x00000004  ///< Interrupt 34 enable
00285 #define NVIC_EN1_INT33          0x00000002  ///< Interrupt 33 enable
00286 #define NVIC_EN1_INT32          0x00000001  ///< Interrupt 32 enable
00287 /*\}*/
00288
00292 /*\{*/
00293 #define NVIC_DIS0_INT31         0x80000000  ///< Interrupt 31 disable
00294 #define NVIC_DIS0_INT30         0x40000000  ///< Interrupt 30 disable
00295 #define NVIC_DIS0_INT29         0x20000000  ///< Interrupt 29 disable
00296 #define NVIC_DIS0_INT28         0x10000000  ///< Interrupt 28 disable
00297 #define NVIC_DIS0_INT27         0x08000000  ///< Interrupt 27 disable
00298 #define NVIC_DIS0_INT26         0x04000000  ///< Interrupt 26 disable
00299 #define NVIC_DIS0_INT25         0x02000000  ///< Interrupt 25 disable
00300 #define NVIC_DIS0_INT24         0x01000000  ///< Interrupt 24 disable
00301 #define NVIC_DIS0_INT23         0x00800000  ///< Interrupt 23 disable
00302 #define NVIC_DIS0_INT22         0x00400000  ///< Interrupt 22 disable
00303 #define NVIC_DIS0_INT21         0x00200000  ///< Interrupt 21 disable
00304 #define NVIC_DIS0_INT20         0x00100000  ///< Interrupt 20 disable
00305 #define NVIC_DIS0_INT19         0x00080000  ///< Interrupt 19 disable
00306 #define NVIC_DIS0_INT18         0x00040000  ///< Interrupt 18 disable
00307 #define NVIC_DIS0_INT17         0x00020000  ///< Interrupt 17 disable
00308 #define NVIC_DIS0_INT16         0x00010000  ///< Interrupt 16 disable
00309 #define NVIC_DIS0_INT15         0x00008000  ///< Interrupt 15 disable
00310 #define NVIC_DIS0_INT14         0x00004000  ///< Interrupt 14 disable
00311 #define NVIC_DIS0_INT13         0x00002000  ///< Interrupt 13 disable
00312 #define NVIC_DIS0_INT12         0x00001000  ///< Interrupt 12 disable
00313 #define NVIC_DIS0_INT11         0x00000800  ///< Interrupt 11 disable
00314 #define NVIC_DIS0_INT10         0x00000400  ///< Interrupt 10 disable
00315 #define NVIC_DIS0_INT9          0x00000200  ///< Interrupt 9 disable
00316 #define NVIC_DIS0_INT8          0x00000100  ///< Interrupt 8 disable
00317 #define NVIC_DIS0_INT7          0x00000080  ///< Interrupt 7 disable
00318 #define NVIC_DIS0_INT6          0x00000040  ///< Interrupt 6 disable
00319 #define NVIC_DIS0_INT5          0x00000020  ///< Interrupt 5 disable
00320 #define NVIC_DIS0_INT4          0x00000010  ///< Interrupt 4 disable
00321 #define NVIC_DIS0_INT3          0x00000008  ///< Interrupt 3 disable
00322 #define NVIC_DIS0_INT2          0x00000004  ///< Interrupt 2 disable
00323 #define NVIC_DIS0_INT1          0x00000002  ///< Interrupt 1 disable
00324 #define NVIC_DIS0_INT0          0x00000001  ///< Interrupt 0 disable
00325 /*\}*/
00326
00330 /*\{*/
00331 #define NVIC_DIS1_INT59         0x08000000  ///< Interrupt 59 disable
00332 #define NVIC_DIS1_INT58         0x04000000  ///< Interrupt 58 disable
00333 #define NVIC_DIS1_INT57         0x02000000  ///< Interrupt 57 disable
00334 #define NVIC_DIS1_INT56         0x01000000  ///< Interrupt 56 disable
00335 #define NVIC_DIS1_INT55         0x00800000  ///< Interrupt 55 disable
00336 #define NVIC_DIS1_INT54         0x00400000  ///< Interrupt 54 disable
00337 #define NVIC_DIS1_INT53         0x00200000  ///< Interrupt 53 disable
00338 #define NVIC_DIS1_INT52         0x00100000  ///< Interrupt 52 disable
00339 #define NVIC_DIS1_INT51         0x00080000  ///< Interrupt 51 disable
00340 #define NVIC_DIS1_INT50         0x00040000  ///< Interrupt 50 disable
00341 #define NVIC_DIS1_INT49         0x00020000  ///< Interrupt 49 disable
00342 #define NVIC_DIS1_INT48         0x00010000  ///< Interrupt 48 disable
00343 #define NVIC_DIS1_INT47         0x00008000  ///< Interrupt 47 disable
00344 #define NVIC_DIS1_INT46         0x00004000  ///< Interrupt 46 disable
00345 #define NVIC_DIS1_INT45         0x00002000  ///< Interrupt 45 disable
00346 #define NVIC_DIS1_INT44         0x00001000  ///< Interrupt 44 disable
00347 #define NVIC_DIS1_INT43         0x00000800  ///< Interrupt 43 disable
00348 #define NVIC_DIS1_INT42         0x00000400  ///< Interrupt 42 disable
00349 #define NVIC_DIS1_INT41         0x00000200  ///< Interrupt 41 disable
00350 #define NVIC_DIS1_INT40         0x00000100  ///< Interrupt 40 disable
00351 #define NVIC_DIS1_INT39         0x00000080  ///< Interrupt 39 disable
00352 #define NVIC_DIS1_INT38         0x00000040  ///< Interrupt 38 disable
00353 #define NVIC_DIS1_INT37         0x00000020  ///< Interrupt 37 disable
00354 #define NVIC_DIS1_INT36         0x00000010  ///< Interrupt 36 disable
00355 #define NVIC_DIS1_INT35         0x00000008  ///< Interrupt 35 disable
00356 #define NVIC_DIS1_INT34         0x00000004  ///< Interrupt 34 disable
00357 #define NVIC_DIS1_INT33         0x00000002  ///< Interrupt 33 disable
00358 #define NVIC_DIS1_INT32         0x00000001  ///< Interrupt 32 disable
00359 /*\}*/
00360
00364 /*\{*/
00365 #define NVIC_PEND0_INT31        0x80000000  ///< Interrupt 31 pend
00366 #define NVIC_PEND0_INT30        0x40000000  ///< Interrupt 30 pend
00367 #define NVIC_PEND0_INT29        0x20000000  ///< Interrupt 29 pend
00368 #define NVIC_PEND0_INT28        0x10000000  ///< Interrupt 28 pend
00369 #define NVIC_PEND0_INT27        0x08000000  ///< Interrupt 27 pend
00370 #define NVIC_PEND0_INT26        0x04000000  ///< Interrupt 26 pend
00371 #define NVIC_PEND0_INT25        0x02000000  ///< Interrupt 25 pend
00372 #define NVIC_PEND0_INT24        0x01000000  ///< Interrupt 24 pend
00373 #define NVIC_PEND0_INT23        0x00800000  ///< Interrupt 23 pend
00374 #define NVIC_PEND0_INT22        0x00400000  ///< Interrupt 22 pend
00375 #define NVIC_PEND0_INT21        0x00200000  ///< Interrupt 21 pend
00376 #define NVIC_PEND0_INT20        0x00100000  ///< Interrupt 20 pend
00377 #define NVIC_PEND0_INT19        0x00080000  ///< Interrupt 19 pend
00378 #define NVIC_PEND0_INT18        0x00040000  ///< Interrupt 18 pend
00379 #define NVIC_PEND0_INT17        0x00020000  ///< Interrupt 17 pend
00380 #define NVIC_PEND0_INT16        0x00010000  ///< Interrupt 16 pend
00381 #define NVIC_PEND0_INT15        0x00008000  ///< Interrupt 15 pend
00382 #define NVIC_PEND0_INT14        0x00004000  ///< Interrupt 14 pend
00383 #define NVIC_PEND0_INT13        0x00002000  ///< Interrupt 13 pend
00384 #define NVIC_PEND0_INT12        0x00001000  ///< Interrupt 12 pend
00385 #define NVIC_PEND0_INT11        0x00000800  ///< Interrupt 11 pend
00386 #define NVIC_PEND0_INT10        0x00000400  ///< Interrupt 10 pend
00387 #define NVIC_PEND0_INT9         0x00000200  ///< Interrupt 9 pend
00388 #define NVIC_PEND0_INT8         0x00000100  ///< Interrupt 8 pend
00389 #define NVIC_PEND0_INT7         0x00000080  ///< Interrupt 7 pend
00390 #define NVIC_PEND0_INT6         0x00000040  ///< Interrupt 6 pend
00391 #define NVIC_PEND0_INT5         0x00000020  ///< Interrupt 5 pend
00392 #define NVIC_PEND0_INT4         0x00000010  ///< Interrupt 4 pend
00393 #define NVIC_PEND0_INT3         0x00000008  ///< Interrupt 3 pend
00394 #define NVIC_PEND0_INT2         0x00000004  ///< Interrupt 2 pend
00395 #define NVIC_PEND0_INT1         0x00000002  ///< Interrupt 1 pend
00396 #define NVIC_PEND0_INT0         0x00000001  ///< Interrupt 0 pend
00397 /*\}*/
00398
00402 /*\{*/
00403 #define NVIC_PEND1_INT59        0x08000000  ///< Interrupt 59 pend
00404 #define NVIC_PEND1_INT58        0x04000000  ///< Interrupt 58 pend
00405 #define NVIC_PEND1_INT57        0x02000000  ///< Interrupt 57 pend
00406 #define NVIC_PEND1_INT56        0x01000000  ///< Interrupt 56 pend
00407 #define NVIC_PEND1_INT55        0x00800000  ///< Interrupt 55 pend
00408 #define NVIC_PEND1_INT54        0x00400000  ///< Interrupt 54 pend
00409 #define NVIC_PEND1_INT53        0x00200000  ///< Interrupt 53 pend
00410 #define NVIC_PEND1_INT52        0x00100000  ///< Interrupt 52 pend
00411 #define NVIC_PEND1_INT51        0x00080000  ///< Interrupt 51 pend
00412 #define NVIC_PEND1_INT50        0x00040000  ///< Interrupt 50 pend
00413 #define NVIC_PEND1_INT49        0x00020000  ///< Interrupt 49 pend
00414 #define NVIC_PEND1_INT48        0x00010000  ///< Interrupt 48 pend
00415 #define NVIC_PEND1_INT47        0x00008000  ///< Interrupt 47 pend
00416 #define NVIC_PEND1_INT46        0x00004000  ///< Interrupt 46 pend
00417 #define NVIC_PEND1_INT45        0x00002000  ///< Interrupt 45 pend
00418 #define NVIC_PEND1_INT44        0x00001000  ///< Interrupt 44 pend
00419 #define NVIC_PEND1_INT43        0x00000800  ///< Interrupt 43 pend
00420 #define NVIC_PEND1_INT42        0x00000400  ///< Interrupt 42 pend
00421 #define NVIC_PEND1_INT41        0x00000200  ///< Interrupt 41 pend
00422 #define NVIC_PEND1_INT40        0x00000100  ///< Interrupt 40 pend
00423 #define NVIC_PEND1_INT39        0x00000080  ///< Interrupt 39 pend
00424 #define NVIC_PEND1_INT38        0x00000040  ///< Interrupt 38 pend
00425 #define NVIC_PEND1_INT37        0x00000020  ///< Interrupt 37 pend
00426 #define NVIC_PEND1_INT36        0x00000010  ///< Interrupt 36 pend
00427 #define NVIC_PEND1_INT35        0x00000008  ///< Interrupt 35 pend
00428 #define NVIC_PEND1_INT34        0x00000004  ///< Interrupt 34 pend
00429 #define NVIC_PEND1_INT33        0x00000002  ///< Interrupt 33 pend
00430 #define NVIC_PEND1_INT32        0x00000001  ///< Interrupt 32 pend
00431 /*\}*/
00432
00436 /*\{*/
00437 #define NVIC_UNPEND0_INT31      0x80000000  ///< Interrupt 31 unpend
00438 #define NVIC_UNPEND0_INT30      0x40000000  ///< Interrupt 30 unpend
00439 #define NVIC_UNPEND0_INT29      0x20000000  ///< Interrupt 29 unpend
00440 #define NVIC_UNPEND0_INT28      0x10000000  ///< Interrupt 28 unpend
00441 #define NVIC_UNPEND0_INT27      0x08000000  ///< Interrupt 27 unpend
00442 #define NVIC_UNPEND0_INT26      0x04000000  ///< Interrupt 26 unpend
00443 #define NVIC_UNPEND0_INT25      0x02000000  ///< Interrupt 25 unpend
00444 #define NVIC_UNPEND0_INT24      0x01000000  ///< Interrupt 24 unpend
00445 #define NVIC_UNPEND0_INT23      0x00800000  ///< Interrupt 23 unpend
00446 #define NVIC_UNPEND0_INT22      0x00400000  ///< Interrupt 22 unpend
00447 #define NVIC_UNPEND0_INT21      0x00200000  ///< Interrupt 21 unpend
00448 #define NVIC_UNPEND0_INT20      0x00100000  ///< Interrupt 20 unpend
00449 #define NVIC_UNPEND0_INT19      0x00080000  ///< Interrupt 19 unpend
00450 #define NVIC_UNPEND0_INT18      0x00040000  ///< Interrupt 18 unpend
00451 #define NVIC_UNPEND0_INT17      0x00020000  ///< Interrupt 17 unpend
00452 #define NVIC_UNPEND0_INT16      0x00010000  ///< Interrupt 16 unpend
00453 #define NVIC_UNPEND0_INT15      0x00008000  ///< Interrupt 15 unpend
00454 #define NVIC_UNPEND0_INT14      0x00004000  ///< Interrupt 14 unpend
00455 #define NVIC_UNPEND0_INT13      0x00002000  ///< Interrupt 13 unpend
00456 #define NVIC_UNPEND0_INT12      0x00001000  ///< Interrupt 12 unpend
00457 #define NVIC_UNPEND0_INT11      0x00000800  ///< Interrupt 11 unpend
00458 #define NVIC_UNPEND0_INT10      0x00000400  ///< Interrupt 10 unpend
00459 #define NVIC_UNPEND0_INT9       0x00000200  ///< Interrupt 9 unpend
00460 #define NVIC_UNPEND0_INT8       0x00000100  ///< Interrupt 8 unpend
00461 #define NVIC_UNPEND0_INT7       0x00000080  ///< Interrupt 7 unpend
00462 #define NVIC_UNPEND0_INT6       0x00000040  ///< Interrupt 6 unpend
00463 #define NVIC_UNPEND0_INT5       0x00000020  ///< Interrupt 5 unpend
00464 #define NVIC_UNPEND0_INT4       0x00000010  ///< Interrupt 4 unpend
00465 #define NVIC_UNPEND0_INT3       0x00000008  ///< Interrupt 3 unpend
00466 #define NVIC_UNPEND0_INT2       0x00000004  ///< Interrupt 2 unpend
00467 #define NVIC_UNPEND0_INT1       0x00000002  ///< Interrupt 1 unpend
00468 #define NVIC_UNPEND0_INT0       0x00000001  ///< Interrupt 0 unpend
00469 /*\}*/
00470
00474 /*\{*/
00475 #define NVIC_UNPEND1_INT59      0x08000000  ///< Interrupt 59 unpend
00476 #define NVIC_UNPEND1_INT58      0x04000000  ///< Interrupt 58 unpend
00477 #define NVIC_UNPEND1_INT57      0x02000000  ///< Interrupt 57 unpend
00478 #define NVIC_UNPEND1_INT56      0x01000000  ///< Interrupt 56 unpend
00479 #define NVIC_UNPEND1_INT55      0x00800000  ///< Interrupt 55 unpend
00480 #define NVIC_UNPEND1_INT54      0x00400000  ///< Interrupt 54 unpend
00481 #define NVIC_UNPEND1_INT53      0x00200000  ///< Interrupt 53 unpend
00482 #define NVIC_UNPEND1_INT52      0x00100000  ///< Interrupt 52 unpend
00483 #define NVIC_UNPEND1_INT51      0x00080000  ///< Interrupt 51 unpend
00484 #define NVIC_UNPEND1_INT50      0x00040000  ///< Interrupt 50 unpend
00485 #define NVIC_UNPEND1_INT49      0x00020000  ///< Interrupt 49 unpend
00486 #define NVIC_UNPEND1_INT48      0x00010000  ///< Interrupt 48 unpend
00487 #define NVIC_UNPEND1_INT47      0x00008000  ///< Interrupt 47 unpend
00488 #define NVIC_UNPEND1_INT46      0x00004000  ///< Interrupt 46 unpend
00489 #define NVIC_UNPEND1_INT45      0x00002000  ///< Interrupt 45 unpend
00490 #define NVIC_UNPEND1_INT44      0x00001000  ///< Interrupt 44 unpend
00491 #define NVIC_UNPEND1_INT43      0x00000800  ///< Interrupt 43 unpend
00492 #define NVIC_UNPEND1_INT42      0x00000400  ///< Interrupt 42 unpend
00493 #define NVIC_UNPEND1_INT41      0x00000200  ///< Interrupt 41 unpend
00494 #define NVIC_UNPEND1_INT40      0x00000100  ///< Interrupt 40 unpend
00495 #define NVIC_UNPEND1_INT39      0x00000080  ///< Interrupt 39 unpend
00496 #define NVIC_UNPEND1_INT38      0x00000040  ///< Interrupt 38 unpend
00497 #define NVIC_UNPEND1_INT37      0x00000020  ///< Interrupt 37 unpend
00498 #define NVIC_UNPEND1_INT36      0x00000010  ///< Interrupt 36 unpend
00499 #define NVIC_UNPEND1_INT35      0x00000008  ///< Interrupt 35 unpend
00500 #define NVIC_UNPEND1_INT34      0x00000004  ///< Interrupt 34 unpend
00501 #define NVIC_UNPEND1_INT33      0x00000002  ///< Interrupt 33 unpend
00502 #define NVIC_UNPEND1_INT32      0x00000001  ///< Interrupt 32 unpend
00503 /*\}*/
00504
00508 /*\{*/
00509 #define NVIC_ACTIVE0_INT31      0x80000000  ///< Interrupt 31 active
00510 #define NVIC_ACTIVE0_INT30      0x40000000  ///< Interrupt 30 active
00511 #define NVIC_ACTIVE0_INT29      0x20000000  ///< Interrupt 29 active
00512 #define NVIC_ACTIVE0_INT28      0x10000000  ///< Interrupt 28 active
00513 #define NVIC_ACTIVE0_INT27      0x08000000  ///< Interrupt 27 active
00514 #define NVIC_ACTIVE0_INT26      0x04000000  ///< Interrupt 26 active
00515 #define NVIC_ACTIVE0_INT25      0x02000000  ///< Interrupt 25 active
00516 #define NVIC_ACTIVE0_INT24      0x01000000  ///< Interrupt 24 active
00517 #define NVIC_ACTIVE0_INT23      0x00800000  ///< Interrupt 23 active
00518 #define NVIC_ACTIVE0_INT22      0x00400000  ///< Interrupt 22 active
00519 #define NVIC_ACTIVE0_INT21      0x00200000  ///< Interrupt 21 active
00520 #define NVIC_ACTIVE0_INT20      0x00100000  ///< Interrupt 20 active
00521 #define NVIC_ACTIVE0_INT19      0x00080000  ///< Interrupt 19 active
00522 #define NVIC_ACTIVE0_INT18      0x00040000  ///< Interrupt 18 active
00523 #define NVIC_ACTIVE0_INT17      0x00020000  ///< Interrupt 17 active
00524 #define NVIC_ACTIVE0_INT16      0x00010000  ///< Interrupt 16 active
00525 #define NVIC_ACTIVE0_INT15      0x00008000  ///< Interrupt 15 active
00526 #define NVIC_ACTIVE0_INT14      0x00004000  ///< Interrupt 14 active
00527 #define NVIC_ACTIVE0_INT13      0x00002000  ///< Interrupt 13 active
00528 #define NVIC_ACTIVE0_INT12      0x00001000  ///< Interrupt 12 active
00529 #define NVIC_ACTIVE0_INT11      0x00000800  ///< Interrupt 11 active
00530 #define NVIC_ACTIVE0_INT10      0x00000400  ///< Interrupt 10 active
00531 #define NVIC_ACTIVE0_INT9       0x00000200  ///< Interrupt 9 active
00532 #define NVIC_ACTIVE0_INT8       0x00000100  ///< Interrupt 8 active
00533 #define NVIC_ACTIVE0_INT7       0x00000080  ///< Interrupt 7 active
00534 #define NVIC_ACTIVE0_INT6       0x00000040  ///< Interrupt 6 active
00535 #define NVIC_ACTIVE0_INT5       0x00000020  ///< Interrupt 5 active
00536 #define NVIC_ACTIVE0_INT4       0x00000010  ///< Interrupt 4 active
00537 #define NVIC_ACTIVE0_INT3       0x00000008  ///< Interrupt 3 active
00538 #define NVIC_ACTIVE0_INT2       0x00000004  ///< Interrupt 2 active
00539 #define NVIC_ACTIVE0_INT1       0x00000002  ///< Interrupt 1 active
00540 #define NVIC_ACTIVE0_INT0       0x00000001  ///< Interrupt 0 active
00541 /*\}*/
00542
00546 /*\{*/
00547 #define NVIC_ACTIVE1_INT59      0x08000000  ///< Interrupt 59 active
00548 #define NVIC_ACTIVE1_INT58      0x04000000  ///< Interrupt 58 active
00549 #define NVIC_ACTIVE1_INT57      0x02000000  ///< Interrupt 57 active
00550 #define NVIC_ACTIVE1_INT56      0x01000000  ///< Interrupt 56 active
00551 #define NVIC_ACTIVE1_INT55      0x00800000  ///< Interrupt 55 active
00552 #define NVIC_ACTIVE1_INT54      0x00400000  ///< Interrupt 54 active
00553 #define NVIC_ACTIVE1_INT53      0x00200000  ///< Interrupt 53 active
00554 #define NVIC_ACTIVE1_INT52      0x00100000  ///< Interrupt 52 active
00555 #define NVIC_ACTIVE1_INT51      0x00080000  ///< Interrupt 51 active
00556 #define NVIC_ACTIVE1_INT50      0x00040000  ///< Interrupt 50 active
00557 #define NVIC_ACTIVE1_INT49      0x00020000  ///< Interrupt 49 active
00558 #define NVIC_ACTIVE1_INT48      0x00010000  ///< Interrupt 48 active
00559 #define NVIC_ACTIVE1_INT47      0x00008000  ///< Interrupt 47 active
00560 #define NVIC_ACTIVE1_INT46      0x00004000  ///< Interrupt 46 active
00561 #define NVIC_ACTIVE1_INT45      0x00002000  ///< Interrupt 45 active
00562 #define NVIC_ACTIVE1_INT44      0x00001000  ///< Interrupt 44 active
00563 #define NVIC_ACTIVE1_INT43      0x00000800  ///< Interrupt 43 active
00564 #define NVIC_ACTIVE1_INT42      0x00000400  ///< Interrupt 42 active
00565 #define NVIC_ACTIVE1_INT41      0x00000200  ///< Interrupt 41 active
00566 #define NVIC_ACTIVE1_INT40      0x00000100  ///< Interrupt 40 active
00567 #define NVIC_ACTIVE1_INT39      0x00000080  ///< Interrupt 39 active
00568 #define NVIC_ACTIVE1_INT38      0x00000040  ///< Interrupt 38 active
00569 #define NVIC_ACTIVE1_INT37      0x00000020  ///< Interrupt 37 active
00570 #define NVIC_ACTIVE1_INT36      0x00000010  ///< Interrupt 36 active
00571 #define NVIC_ACTIVE1_INT35      0x00000008  ///< Interrupt 35 active
00572 #define NVIC_ACTIVE1_INT34      0x00000004  ///< Interrupt 34 active
00573 #define NVIC_ACTIVE1_INT33      0x00000002  ///< Interrupt 33 active
00574 #define NVIC_ACTIVE1_INT32      0x00000001  ///< Interrupt 32 active
00575 /*\}*/
00576
00580 /*\{*/
00581 #define NVIC_PRI0_INT3_M        0xFF000000  ///< Interrupt 3 priority mask
00582 #define NVIC_PRI0_INT2_M        0x00FF0000  ///< Interrupt 2 priority mask
00583 #define NVIC_PRI0_INT1_M        0x0000FF00  ///< Interrupt 1 priority mask
00584 #define NVIC_PRI0_INT0_M        0x000000FF  ///< Interrupt 0 priority mask
00585 #define NVIC_PRI0_INT3_S        24
00586 #define NVIC_PRI0_INT2_S        16
00587 #define NVIC_PRI0_INT1_S        8
00588 #define NVIC_PRI0_INT0_S        0
00589 /*\}*/
00590
00594 /*\{*/
00595 #define NVIC_PRI1_INT7_M        0xFF000000  ///< Interrupt 7 priority mask
00596 #define NVIC_PRI1_INT6_M        0x00FF0000  ///< Interrupt 6 priority mask
00597 #define NVIC_PRI1_INT5_M        0x0000FF00  ///< Interrupt 5 priority mask
00598 #define NVIC_PRI1_INT4_M        0x000000FF  ///< Interrupt 4 priority mask
00599 #define NVIC_PRI1_INT7_S        24
00600 #define NVIC_PRI1_INT6_S        16
00601 #define NVIC_PRI1_INT5_S        8
00602 #define NVIC_PRI1_INT4_S        0
00603 /*\}*/
00604
00608 /*\{*/
00609 #define NVIC_PRI2_INT11_M       0xFF000000  ///< Interrupt 11 priority mask
00610 #define NVIC_PRI2_INT10_M       0x00FF0000  ///< Interrupt 10 priority mask
00611 #define NVIC_PRI2_INT9_M        0x0000FF00  ///< Interrupt 9 priority mask
00612 #define NVIC_PRI2_INT8_M        0x000000FF  ///< Interrupt 8 priority mask
00613 #define NVIC_PRI2_INT11_S       24
00614 #define NVIC_PRI2_INT10_S       16
00615 #define NVIC_PRI2_INT9_S        8
00616 #define NVIC_PRI2_INT8_S        0
00617 /*\}*/
00618
00622 /*\{*/
00623 #define NVIC_PRI3_INT15_M       0xFF000000  ///< Interrupt 15 priority mask
00624 #define NVIC_PRI3_INT14_M       0x00FF0000  ///< Interrupt 14 priority mask
00625 #define NVIC_PRI3_INT13_M       0x0000FF00  ///< Interrupt 13 priority mask
00626 #define NVIC_PRI3_INT12_M       0x000000FF  ///< Interrupt 12 priority mask
00627 #define NVIC_PRI3_INT15_S       24
00628 #define NVIC_PRI3_INT14_S       16
00629 #define NVIC_PRI3_INT13_S       8
00630 #define NVIC_PRI3_INT12_S       0
00631 /*\}*/
00632
00636 /*\{*/
00637 #define NVIC_PRI4_INT19_M       0xFF000000  ///< Interrupt 19 priority mask
00638 #define NVIC_PRI4_INT18_M       0x00FF0000  ///< Interrupt 18 priority mask
00639 #define NVIC_PRI4_INT17_M       0x0000FF00  ///< Interrupt 17 priority mask
00640 #define NVIC_PRI4_INT16_M       0x000000FF  ///< Interrupt 16 priority mask
00641 #define NVIC_PRI4_INT19_S       24
00642 #define NVIC_PRI4_INT18_S       16
00643 #define NVIC_PRI4_INT17_S       8
00644 #define NVIC_PRI4_INT16_S       0
00645 /*\}*/
00646
00650 /*\{*/
00651 #define NVIC_PRI5_INT23_M       0xFF000000  ///< Interrupt 23 priority mask
00652 #define NVIC_PRI5_INT22_M       0x00FF0000  ///< Interrupt 22 priority mask
00653 #define NVIC_PRI5_INT21_M       0x0000FF00  ///< Interrupt 21 priority mask
00654 #define NVIC_PRI5_INT20_M       0x000000FF  ///< Interrupt 20 priority mask
00655 #define NVIC_PRI5_INT23_S       24
00656 #define NVIC_PRI5_INT22_S       16
00657 #define NVIC_PRI5_INT21_S       8
00658 #define NVIC_PRI5_INT20_S       0
00659 /*\}*/
00660
00664 /*\{*/
00665 #define NVIC_PRI6_INT27_M       0xFF000000  ///< Interrupt 27 priority mask
00666 #define NVIC_PRI6_INT26_M       0x00FF0000  ///< Interrupt 26 priority mask
00667 #define NVIC_PRI6_INT25_M       0x0000FF00  ///< Interrupt 25 priority mask
00668 #define NVIC_PRI6_INT24_M       0x000000FF  ///< Interrupt 24 priority mask
00669 #define NVIC_PRI6_INT27_S       24
00670 #define NVIC_PRI6_INT26_S       16
00671 #define NVIC_PRI6_INT25_S       8
00672 #define NVIC_PRI6_INT24_S       0
00673 /*\}*/
00674
00678 /*\{*/
00679 #define NVIC_PRI7_INT31_M       0xFF000000  ///< Interrupt 31 priority mask
00680 #define NVIC_PRI7_INT30_M       0x00FF0000  ///< Interrupt 30 priority mask
00681 #define NVIC_PRI7_INT29_M       0x0000FF00  ///< Interrupt 29 priority mask
00682 #define NVIC_PRI7_INT28_M       0x000000FF  ///< Interrupt 28 priority mask
00683 #define NVIC_PRI7_INT31_S       24
00684 #define NVIC_PRI7_INT30_S       16
00685 #define NVIC_PRI7_INT29_S       8
00686 #define NVIC_PRI7_INT28_S       0
00687 /*\}*/
00688
00692 /*\{*/
00693 #define NVIC_PRI8_INT35_M       0xFF000000  ///< Interrupt 35 priority mask
00694 #define NVIC_PRI8_INT34_M       0x00FF0000  ///< Interrupt 34 priority mask
00695 #define NVIC_PRI8_INT33_M       0x0000FF00  ///< Interrupt 33 priority mask
00696 #define NVIC_PRI8_INT32_M       0x000000FF  ///< Interrupt 32 priority mask
00697 #define NVIC_PRI8_INT35_S       24
00698 #define NVIC_PRI8_INT34_S       16
00699 #define NVIC_PRI8_INT33_S       8
00700 #define NVIC_PRI8_INT32_S       0
00701 /*\}*/
00702
00706 /*\{*/
00707 #define NVIC_PRI9_INT39_M       0xFF000000  ///< Interrupt 39 priority mask
00708 #define NVIC_PRI9_INT38_M       0x00FF0000  ///< Interrupt 38 priority mask
00709 #define NVIC_PRI9_INT37_M       0x0000FF00  ///< Interrupt 37 priority mask
00710 #define NVIC_PRI9_INT36_M       0x000000FF  ///< Interrupt 36 priority mask
00711 #define NVIC_PRI9_INT39_S       24
00712 #define NVIC_PRI9_INT38_S       16
00713 #define NVIC_PRI9_INT37_S       8
00714 #define NVIC_PRI9_INT36_S       0
00715 /*\}*/
00716
00720 /*\{*/
00721 #define NVIC_PRI10_INT43_M      0xFF000000  ///< Interrupt 43 priority mask
00722 #define NVIC_PRI10_INT42_M      0x00FF0000  ///< Interrupt 42 priority mask
00723 #define NVIC_PRI10_INT41_M      0x0000FF00  ///< Interrupt 41 priority mask
00724 #define NVIC_PRI10_INT40_M      0x000000FF  ///< Interrupt 40 priority mask
00725 #define NVIC_PRI10_INT43_S      24
00726 #define NVIC_PRI10_INT42_S      16
00727 #define NVIC_PRI10_INT41_S      8
00728 #define NVIC_PRI10_INT40_S      0
00729 /*\}*/
00730
00734 /*\{*/
00735 #define NVIC_CPUID_IMP_M        0xFF000000  ///< Implementer
00736 #define NVIC_CPUID_VAR_M        0x00F00000  ///< Variant
00737 #define NVIC_CPUID_PARTNO_M     0x0000FFF0  ///< Processor part number
00738 #define NVIC_CPUID_REV_M        0x0000000F  ///< Revision
00739 /*\}*/
00740
00744 /*\{*/
00745 #define NVIC_INT_CTRL_NMI_SET   0x80000000  ///< Pend a NMI
00746 #define NVIC_INT_CTRL_PEND_SV   0x10000000  ///< Pend a PendSV
00747 #define NVIC_INT_CTRL_UNPEND_SV 0x08000000  ///< Unpend a PendSV
00748 #define NVIC_INT_CTRL_PENDSTSET 0x04000000  ///< Set pending SysTick interrupt
00749 #define NVIC_INT_CTRL_PENDSTCLR 0x02000000  ///< Clear pending SysTick interrupt
00750 #define NVIC_INT_CTRL_ISR_PRE   0x00800000  ///< Debug interrupt handling
00751 #define NVIC_INT_CTRL_ISR_PEND  0x00400000  ///< Debug interrupt pending
00752 #define NVIC_INT_CTRL_VEC_PEN_M 0x003FF000  ///< Highest pending exception
00753 #define NVIC_INT_CTRL_RET_BASE  0x00000800  ///< Return to base
00754 #define NVIC_INT_CTRL_VEC_ACT_M 0x000003FF  ///< Current active exception
00755 #define NVIC_INT_CTRL_VEC_PEN_S 12
00756 #define NVIC_INT_CTRL_VEC_ACT_S 0
00757 /*\}*/
00758
00762 /*\{*/
00763 #define NVIC_VTABLE_BASE        0x20000000  ///< Vector table base
00764 #define NVIC_VTABLE_OFFSET_M    0x1FFFFF00  ///< Vector table offset
00765 #define NVIC_VTABLE_OFFSET_S    8
00766 /*\}*/
00767
00771 /*\{*/
00772 #define NVIC_APINT_VECTKEY_M    0xFFFF0000  ///< Vector key mask
00773 #define NVIC_APINT_VECTKEY      0x05FA0000  ///< Vector key
00774 #define NVIC_APINT_ENDIANESS    0x00008000  ///< Data endianess
00775 #define NVIC_APINT_PRIGROUP_M   0x00000700  ///< Priority group
00776 #define NVIC_APINT_PRIGROUP_0_8 0x00000700  ///< Priority group 0.8 split
00777 #define NVIC_APINT_PRIGROUP_1_7 0x00000600  ///< Priority group 1.7 split
00778 #define NVIC_APINT_PRIGROUP_2_6 0x00000500  ///< Priority group 2.6 split
00779 #define NVIC_APINT_PRIGROUP_3_5 0x00000400  ///< Priority group 3.5 split
00780 #define NVIC_APINT_PRIGROUP_4_4 0x00000300  ///< Priority group 4.4 split
00781 #define NVIC_APINT_PRIGROUP_5_3 0x00000200  ///< Priority group 5.3 split
00782 #define NVIC_APINT_PRIGROUP_6_2 0x00000100  ///< Priority group 6.2 split
00783 #define NVIC_APINT_SYSRESETREQ  0x00000004  ///< System reset request
00784 #define NVIC_APINT_VECT_CLR_ACT 0x00000002  ///< Clear active NMI/fault info
00785 #define NVIC_APINT_VECT_RESET   0x00000001  ///< System reset
00786 #define NVIC_APINT_PRIGROUP_7_1 0x00000000  ///< Priority group 7.1 split
00787 /*\}*/
00788
00792 /*\{*/
00793 #define NVIC_SYS_CTRL_SEVONPEND 0x00000010  ///< Wakeup on pend
00794 #define NVIC_SYS_CTRL_SLEEPDEEP 0x00000004  ///< Deep sleep enable
00795 #define NVIC_SYS_CTRL_SLEEPEXIT 0x00000002  ///< Sleep on ISR exit
00796 /*\}*/
00797
00801 /*\{*/
00802 #define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100  ///< Ignore bus fault in NMI/fault
00803 #define NVIC_CFG_CTRL_DIV0      0x00000010  ///< Trap on divide by 0
00804 #define NVIC_CFG_CTRL_UNALIGNED 0x00000008  ///< Trap on unaligned access
00805 #define NVIC_CFG_CTRL_DEEP_PEND 0x00000004  ///< Allow deep interrupt trigger
00806 #define NVIC_CFG_CTRL_MAIN_PEND 0x00000002  ///< Allow main interrupt trigger
00807 #define NVIC_CFG_CTRL_BASE_THR  0x00000001  ///< Thread state control
00808 /*\}*/
00809
00813 /*\{*/
00814 #define NVIC_SYS_PRI1_RES_M     0xFF000000  ///< Priority of reserved handler
00815 #define NVIC_SYS_PRI1_USAGE_M   0x00FF0000  ///< Priority of usage fault handler
00816 #define NVIC_SYS_PRI1_BUS_M     0x0000FF00  ///< Priority of bus fault handler
00817 #define NVIC_SYS_PRI1_MEM_M     0x000000FF  ///< Priority of mem manage handler
00818 #define NVIC_SYS_PRI1_USAGE_S   16
00819 #define NVIC_SYS_PRI1_BUS_S     8
00820 #define NVIC_SYS_PRI1_MEM_S     0
00821 /*\}*/
00822
00826 /*\{*/
00827 #define NVIC_SYS_PRI2_SVC_M     0xFF000000  ///< Priority of SVCall handler
00828 #define NVIC_SYS_PRI2_RES_M     0x00FFFFFF  ///< Priority of reserved handlers
00829 #define NVIC_SYS_PRI2_SVC_S     24
00830 /*\}*/
00831
00835 /*\{*/
00836 #define NVIC_SYS_PRI3_TICK_M    0xFF000000  ///< Priority of Sys Tick handler
00837 #define NVIC_SYS_PRI3_PENDSV_M  0x00FF0000  ///< Priority of PendSV handler
00838 #define NVIC_SYS_PRI3_RES_M     0x0000FF00  ///< Priority of reserved handler
00839 #define NVIC_SYS_PRI3_DEBUG_M   0x000000FF  ///< Priority of debug handler
00840 #define NVIC_SYS_PRI3_TICK_S    24
00841 #define NVIC_SYS_PRI3_PENDSV_S  16
00842 #define NVIC_SYS_PRI3_DEBUG_S   0
00843 /*\}*/
00844
00849 /*\{*/
00850 #define NVIC_SYS_HND_CTRL_USAGE 0x00040000  ///< Usage fault enable
00851 #define NVIC_SYS_HND_CTRL_BUS   0x00020000  ///< Bus fault enable
00852 #define NVIC_SYS_HND_CTRL_MEM   0x00010000  ///< Mem manage fault enable
00853 #define NVIC_SYS_HND_CTRL_SVC   0x00008000  ///< SVCall is pended
00854 #define NVIC_SYS_HND_CTRL_BUSP  0x00004000  ///< Bus fault is pended
00855 #define NVIC_SYS_HND_CTRL_TICK  0x00000800  ///< Sys tick is active
00856 #define NVIC_SYS_HND_CTRL_PNDSV 0x00000400  ///< PendSV is active
00857 #define NVIC_SYS_HND_CTRL_MON   0x00000100  ///< Monitor is active
00858 #define NVIC_SYS_HND_CTRL_SVCA  0x00000080  ///< SVCall is active
00859 #define NVIC_SYS_HND_CTRL_USGA  0x00000008  ///< Usage fault is active
00860 #define NVIC_SYS_HND_CTRL_BUSA  0x00000002  ///< Bus fault is active
00861 #define NVIC_SYS_HND_CTRL_MEMA  0x00000001  ///< Mem manage is active
00862 /*\}*/
00863
00868 /*\{*/
00869 #define NVIC_FAULT_STAT_DIV0    0x02000000  ///< Divide by zero fault
00870 #define NVIC_FAULT_STAT_UNALIGN 0x01000000  ///< Unaligned access fault
00871 #define NVIC_FAULT_STAT_NOCP    0x00080000  ///< No coprocessor fault
00872 #define NVIC_FAULT_STAT_INVPC   0x00040000  ///< Invalid PC fault
00873 #define NVIC_FAULT_STAT_INVSTAT 0x00020000  ///< Invalid state fault
00874 #define NVIC_FAULT_STAT_UNDEF   0x00010000  ///< Undefined instruction fault
00875 #define NVIC_FAULT_STAT_BFARV   0x00008000  ///< BFAR is valid
00876 #define NVIC_FAULT_STAT_BSTKE   0x00001000  ///< Stack bus fault
00877 #define NVIC_FAULT_STAT_BUSTKE  0x00000800  ///< Unstack bus fault
00878 #define NVIC_FAULT_STAT_IMPRE   0x00000400  ///< Imprecise data bus error
00879 #define NVIC_FAULT_STAT_PRECISE 0x00000200  ///< Precise data bus error
00880 #define NVIC_FAULT_STAT_IBUS    0x00000100  ///< Instruction bus fault
00881 #define NVIC_FAULT_STAT_MMARV   0x00000080  ///< MMAR is valid
00882 #define NVIC_FAULT_STAT_MSTKE   0x00000010  ///< Stack access violation
00883 #define NVIC_FAULT_STAT_MUSTKE  0x00000008  ///< Unstack access violation
00884 #define NVIC_FAULT_STAT_DERR    0x00000002  ///< Data access violation
00885 #define NVIC_FAULT_STAT_IERR    0x00000001  ///< Instruction access violation
00886 /*\}*/
00887
00892 /*\{*/
00893 #define NVIC_HFAULT_STAT_DBG    0x80000000  ///< Debug event
00894 #define NVIC_HFAULT_STAT_FORCED 0x40000000  ///< Cannot execute fault handler
00895 #define NVIC_HFAULT_STAT_VECT   0x00000002  ///< Vector table read fault
00896 /*\}*/
00897
00902 /*\{*/
00903 #define NVIC_DEBUG_STAT_EXTRNL  0x00000010  ///< EDBGRQ asserted
00904 #define NVIC_DEBUG_STAT_VCATCH  0x00000008  ///< Vector catch
00905 #define NVIC_DEBUG_STAT_DWTTRAP 0x00000004  ///< DWT match
00906 #define NVIC_DEBUG_STAT_BKPT    0x00000002  ///< Breakpoint instruction
00907 #define NVIC_DEBUG_STAT_HALTED  0x00000001  ///< Halt request
00908 /*\}*/
00909
00913 /*\{*/
00914 #define NVIC_MM_ADDR_M          0xFFFFFFFF  ///< Data fault address
00915 #define NVIC_MM_ADDR_S          0
00916 /*\}*/
00917
00922 /*\{*/
00923 #define NVIC_FAULT_ADDR_M       0xFFFFFFFF  ///< Data bus fault address
00924 #define NVIC_FAULT_ADDR_S       0
00925 /*\}*/
00926
00930 /*\{*/
00931 #define NVIC_MPU_TYPE_IREGION_M 0x00FF0000  ///< Number of I regions
00932 #define NVIC_MPU_TYPE_DREGION_M 0x0000FF00  ///< Number of D regions
00933 #define NVIC_MPU_TYPE_SEPARATE  0x00000001  ///< Separate or unified MPU
00934 #define NVIC_MPU_TYPE_IREGION_S 16
00935 #define NVIC_MPU_TYPE_DREGION_S 8
00936 /*\}*/
00937
00941 /*\{*/
00942 #define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004  ///< MPU default region in priv mode
00943 #define NVIC_MPU_CTRL_HFNMIENA  0x00000002  ///< MPU enabled during faults
00944 #define NVIC_MPU_CTRL_ENABLE    0x00000001  ///< MPU enable
00945 /*\}*/
00946
00951 /*\{*/
00952 #define NVIC_MPU_NUMBER_M       0x000000FF  ///< MPU region to access
00953 #define NVIC_MPU_NUMBER_S       0
00954 /*\}*/
00955
00959 /*\{*/
00960 #define NVIC_MPU_BASE_ADDR_M    0xFFFFFFE0  ///< Base address mask
00961 #define NVIC_MPU_BASE_VALID     0x00000010  ///< Region number valid
00962 #define NVIC_MPU_BASE_REGION_M  0x0000000F  ///< Region number
00963 #define NVIC_MPU_BASE_ADDR_S    8
00964 #define NVIC_MPU_BASE_REGION_S  0
00965 /*\}*/
00966
00970 /*\{*/
00971 #define NVIC_MPU_ATTR_M         0xFFFF0000  ///< Attributes
00972 #define NVIC_MPU_ATTR_AP_NO_NO  0x00000000  ///< prv: no access, usr: no access
00973 #define NVIC_MPU_ATTR_BUFFRABLE 0x00010000  ///< Bufferable
00974 #define NVIC_MPU_ATTR_CACHEABLE 0x00020000  ///< Cacheable
00975 #define NVIC_MPU_ATTR_SHAREABLE 0x00040000  ///< Shareable
00976 #define NVIC_MPU_ATTR_TEX_M     0x00380000  ///< Type extension mask
00977 #define NVIC_MPU_ATTR_AP_RW_NO  0x01000000  ///< prv: rw, usr: none
00978 #define NVIC_MPU_ATTR_AP_RW_RO  0x02000000  ///< prv: rw, usr: read-only
00979 #define NVIC_MPU_ATTR_AP_RW_RW  0x03000000  ///< prv: rw, usr: rw
00980 #define NVIC_MPU_ATTR_AP_RO_NO  0x05000000  ///< prv: ro, usr: none
00981 #define NVIC_MPU_ATTR_AP_RO_RO  0x06000000  ///< prv: ro, usr: ro
00982 #define NVIC_MPU_ATTR_AP_M      0x07000000  ///< Access permissions mask
00983 #define NVIC_MPU_ATTR_XN        0x10000000  ///< Execute disable
00984 #define NVIC_MPU_ATTR_SRD_M     0x0000FF00  ///< Sub-region disable mask
00985 #define NVIC_MPU_ATTR_SRD_0     0x00000100  ///< Sub-region 0 disable
00986 #define NVIC_MPU_ATTR_SRD_1     0x00000200  ///< Sub-region 1 disable
00987 #define NVIC_MPU_ATTR_SRD_2     0x00000400  ///< Sub-region 2 disable
00988 #define NVIC_MPU_ATTR_SRD_3     0x00000800  ///< Sub-region 3 disable
00989 #define NVIC_MPU_ATTR_SRD_4     0x00001000  ///< Sub-region 4 disable
00990 #define NVIC_MPU_ATTR_SRD_5     0x00002000  ///< Sub-region 5 disable
00991 #define NVIC_MPU_ATTR_SRD_6     0x00004000  ///< Sub-region 6 disable
00992 #define NVIC_MPU_ATTR_SRD_7     0x00008000  ///< Sub-region 7 disable
00993 #define NVIC_MPU_ATTR_SIZE_M    0x0000003E  ///< Region size mask
00994 #define NVIC_MPU_ATTR_SIZE_32B  0x00000008  ///< Region size 32 bytes
00995 #define NVIC_MPU_ATTR_SIZE_64B  0x0000000A  ///< Region size 64 bytes
00996 #define NVIC_MPU_ATTR_SIZE_128B 0x0000000C  ///< Region size 128 bytes
00997 #define NVIC_MPU_ATTR_SIZE_256B 0x0000000E  ///< Region size 256 bytes
00998 #define NVIC_MPU_ATTR_SIZE_512B 0x00000010  ///< Region size 512 bytes
00999 #define NVIC_MPU_ATTR_SIZE_1K   0x00000012  ///< Region size 1 Kbytes
01000 #define NVIC_MPU_ATTR_SIZE_2K   0x00000014  ///< Region size 2 Kbytes
01001 #define NVIC_MPU_ATTR_SIZE_4K   0x00000016  ///< Region size 4 Kbytes
01002 #define NVIC_MPU_ATTR_SIZE_8K   0x00000018  ///< Region size 8 Kbytes
01003 #define NVIC_MPU_ATTR_SIZE_16K  0x0000001A  ///< Region size 16 Kbytes
01004 #define NVIC_MPU_ATTR_SIZE_32K  0x0000001C  ///< Region size 32 Kbytes
01005 #define NVIC_MPU_ATTR_SIZE_64K  0x0000001E  ///< Region size 64 Kbytes
01006 #define NVIC_MPU_ATTR_SIZE_128K 0x00000020  ///< Region size 128 Kbytes
01007 #define NVIC_MPU_ATTR_SIZE_256K 0x00000022  ///< Region size 256 Kbytes
01008 #define NVIC_MPU_ATTR_SIZE_512K 0x00000024  ///< Region size 512 Kbytes
01009 #define NVIC_MPU_ATTR_SIZE_1M   0x00000026  ///< Region size 1 Mbytes
01010 #define NVIC_MPU_ATTR_SIZE_2M   0x00000028  ///< Region size 2 Mbytes
01011 #define NVIC_MPU_ATTR_SIZE_4M   0x0000002A  ///< Region size 4 Mbytes
01012 #define NVIC_MPU_ATTR_SIZE_8M   0x0000002C  ///< Region size 8 Mbytes
01013 #define NVIC_MPU_ATTR_SIZE_16M  0x0000002E  ///< Region size 16 Mbytes
01014 #define NVIC_MPU_ATTR_SIZE_32M  0x00000030  ///< Region size 32 Mbytes
01015 #define NVIC_MPU_ATTR_SIZE_64M  0x00000032  ///< Region size 64 Mbytes
01016 #define NVIC_MPU_ATTR_SIZE_128M 0x00000034  ///< Region size 128 Mbytes
01017 #define NVIC_MPU_ATTR_SIZE_256M 0x00000036  ///< Region size 256 Mbytes
01018 #define NVIC_MPU_ATTR_SIZE_512M 0x00000038  ///< Region size 512 Mbytes
01019 #define NVIC_MPU_ATTR_SIZE_1G   0x0000003A  ///< Region size 1 Gbytes
01020 #define NVIC_MPU_ATTR_SIZE_2G   0x0000003C  ///< Region size 2 Gbytes
01021 #define NVIC_MPU_ATTR_SIZE_4G   0x0000003E  ///< Region size 4 Gbytes
01022 #define NVIC_MPU_ATTR_ENABLE    0x00000001  ///< Region enable
01023 /*\}*/
01024
01028 /*\{*/
01029 #define NVIC_DBG_CTRL_DBGKEY_M  0xFFFF0000  ///< Debug key mask
01030 #define NVIC_DBG_CTRL_DBGKEY    0xA05F0000  ///< Debug key
01031 #define NVIC_DBG_CTRL_S_RESET_ST \
01032                                 0x02000000  ///< Core has reset since last read
01033 #define NVIC_DBG_CTRL_S_RETIRE_ST \
01034                                 0x01000000  ///< Core has executed insruction
01035
01036 #define NVIC_DBG_CTRL_S_LOCKUP  0x00080000  ///< Core is locked up
01037 #define NVIC_DBG_CTRL_S_SLEEP   0x00040000  ///< Core is sleeping
01038 #define NVIC_DBG_CTRL_S_HALT    0x00020000  ///< Core status on halt
01039 #define NVIC_DBG_CTRL_S_REGRDY  0x00010000  ///< Register read/write available
01040 #define NVIC_DBG_CTRL_C_SNAPSTALL \
01041                                 0x00000020  ///< Breaks a stalled load/store
01042 #define NVIC_DBG_CTRL_C_MASKINT 0x00000008  ///< Mask interrupts when stepping
01043 #define NVIC_DBG_CTRL_C_STEP    0x00000004  ///< Step the core
01044 #define NVIC_DBG_CTRL_C_HALT    0x00000002  ///< Halt the core
01045 #define NVIC_DBG_CTRL_C_DEBUGEN 0x00000001  ///< Enable debug
01046 /*\}*/
01047
01051 /*\{*/
01052 #define NVIC_DBG_XFER_REG_WNR   0x00010000  ///< Write or not read
01053 #define NVIC_DBG_XFER_REG_SEL_M 0x0000001F  ///< Register
01054 #define NVIC_DBG_XFER_REG_CFBP  0x00000014  ///< Control/Fault/BasePri/PriMask
01055 #define NVIC_DBG_XFER_REG_DSP   0x00000013  ///< Deep SP
01056 #define NVIC_DBG_XFER_REG_PSP   0x00000012  ///< Process SP
01057 #define NVIC_DBG_XFER_REG_MSP   0x00000011  ///< Main SP
01058 #define NVIC_DBG_XFER_REG_FLAGS 0x00000010  ///< xPSR/Flags register
01059 #define NVIC_DBG_XFER_REG_R15   0x0000000F  ///< Register R15
01060 #define NVIC_DBG_XFER_REG_R14   0x0000000E  ///< Register R14
01061 #define NVIC_DBG_XFER_REG_R13   0x0000000D  ///< Register R13
01062 #define NVIC_DBG_XFER_REG_R12   0x0000000C  ///< Register R12
01063 #define NVIC_DBG_XFER_REG_R11   0x0000000B  ///< Register R11
01064 #define NVIC_DBG_XFER_REG_R10   0x0000000A  ///< Register R10
01065 #define NVIC_DBG_XFER_REG_R9    0x00000009  ///< Register R9
01066 #define NVIC_DBG_XFER_REG_R8    0x00000008  ///< Register R8
01067 #define NVIC_DBG_XFER_REG_R7    0x00000007  ///< Register R7
01068 #define NVIC_DBG_XFER_REG_R6    0x00000006  ///< Register R6
01069 #define NVIC_DBG_XFER_REG_R5    0x00000005  ///< Register R5
01070 #define NVIC_DBG_XFER_REG_R4    0x00000004  ///< Register R4
01071 #define NVIC_DBG_XFER_REG_R3    0x00000003  ///< Register R3
01072 #define NVIC_DBG_XFER_REG_R2    0x00000002  ///< Register R2
01073 #define NVIC_DBG_XFER_REG_R1    0x00000001  ///< Register R1
01074 #define NVIC_DBG_XFER_REG_R0    0x00000000  ///< Register R0
01075 /*\}*/
01076
01080 /*\{*/
01081 #define NVIC_DBG_DATA_M         0xFFFFFFFF  ///< Data temporary cache
01082 #define NVIC_DBG_DATA_S         0
01083 /*\}*/
01084
01088 /*\{*/
01089 #define NVIC_DBG_INT_HARDERR    0x00000400  ///< Debug trap on hard fault
01090 #define NVIC_DBG_INT_INTERR     0x00000200  ///< Debug trap on interrupt errors
01091 #define NVIC_DBG_INT_BUSERR     0x00000100  ///< Debug trap on bus error
01092 #define NVIC_DBG_INT_STATERR    0x00000080  ///< Debug trap on usage fault state
01093 #define NVIC_DBG_INT_CHKERR     0x00000040  ///< Debug trap on usage fault check
01094 #define NVIC_DBG_INT_NOCPERR    0x00000020  ///< Debug trap on coprocessor error
01095 #define NVIC_DBG_INT_MMERR      0x00000010  ///< Debug trap on mem manage fault
01096 #define NVIC_DBG_INT_RESET      0x00000008  ///< Core reset status
01097 #define NVIC_DBG_INT_RSTPENDCLR 0x00000004  ///< Clear pending core reset
01098 #define NVIC_DBG_INT_RSTPENDING 0x00000002  ///< Core reset is pending
01099 #define NVIC_DBG_INT_RSTVCATCH  0x00000001  ///< Reset vector catch
01100 /*\}*/
01101
01105 /*\{*/
01106 #define NVIC_SW_TRIG_INTID_M    0x000003FF  ///< Interrupt to trigger
01107 #define NVIC_SW_TRIG_INTID_S    0
01108 /*\}*/
01109
01110
01111 #endif /* STM32_NVIC_H */


BeRTOS: stm32_pwr.h File Reference

  • cpu
  • cortex-m3
  • io
stm32_pwr.h File Reference

STM32 Power Control. More...

#include <io/stm32.h>

Go to the source code of this file.

Detailed Description

STM32 Power Control.

Author:
Andrea Righi <arighi@develer.com>

Definition in file stm32_pwr.h.


BeRTOS: stm32_pwr.h Source File

  • cpu
  • cortex-m3
  • io
stm32_pwr.h
Go to the documentation of this file.
00001
00037 #ifndef STM32_PWR_H
00038 #define STM32_PWR_H
00039
00040 #include <io/stm32.h>
00041
00042 /* Power Control */
00043 struct PWR
00044 {
00045     reg32_t CR;
00046     reg32_t CSR;
00047 };
00048
00049 #define PWR_CR_DBP  0x00000100
00050
00051 #endif /* STM32_PWR_H */


BeRTOS: stm32_uart.h File Reference

  • cpu
  • cortex-m3
  • io
stm32_uart.h File Reference

UART STM32F10xx registers definition. More...

Go to the source code of this file.

Detailed Description

UART STM32F10xx registers definition.

Definition in file stm32_uart.h.


BeRTOS: stm32_uart.h Source File

  • cpu
  • cortex-m3
  • io
stm32_uart.h
Go to the documentation of this file.
00001
00036 #ifndef STM32_UART_H
00037 #define STM32_UART_H
00038
00039 /*
00040  * USART Word Length
00041  */
00042 #define USART_WORD_LEN_8B                  ((uint16_t)0x0000)
00043 #define USART_WORD_LEN_9B                  ((uint16_t)0x1000)
00044
00045 /*
00046  * USART Stop Bits
00047  */
00048 #define USART_STOP_BIT_1                     ((uint16_t)0x0000)
00049 #define USART_STOP_BIT_0_5                   ((uint16_t)0x1000)
00050 #define USART_STOP_BIT_2                     ((uint16_t)0x2000)
00051 #define USART_STOP_BIT_1_5                   ((uint16_t)0x3000)
00052
00053 /*
00054  * USART Parity
00055  */
00056 #define USART_PARITY_NO                      ((uint16_t)0x0000)
00057 #define USART_PARITY_EVEN                    ((uint16_t)0x0400)
00058 #define USART_PARITY_ODD                     ((uint16_t)0x0600)
00059
00060
00061 /*
00062  * USART Hardware Flow Control
00063  */
00064 #define USART_HW_FLOW_NONE       ((uint16_t)0x0000)
00065 #define USART_HW_FLOW_RTS        ((uint16_t)0x0100)
00066 #define USART_HW_FLOW_CTS        ((uint16_t)0x0200)
00067 #define USART_HW_FLOW_RTS_CTS    ((uint16_t)0x0300)
00068
00069
00070 /*
00071  * USART Clock
00072  */
00073 #define USART_CLK_DIS                  ((uint16_t)0x0000)
00074 #define USART_CLK_EN                   ((uint16_t)0x0800)
00075
00076 /*
00077  * USART Clock Polarity
00078  */
00079 #define USART_CPOL_LOW                       ((uint16_t)0x0000)
00080 #define USART_CPOL_HIGHT                      ((uint16_t)0x0400)
00081
00082 /*
00083  * USART Clock Phase
00084  */
00085 #define USART_CPHA_1EDGE                     ((uint16_t)0x0000)
00086 #define USART_CPHA_2EDGE                     ((uint16_t)0x0200)
00087
00088
00089
00090 /*
00091  * USART Interrupt definition
00092  */
00093 #define USART_IT_PE                          ((uint16_t)0x0028)
00094 #define USART_IT_TXE                         ((uint16_t)0x0727)
00095 #define USART_IT_TC                          ((uint16_t)0x0626)
00096 #define USART_IT_RXNE                        ((uint16_t)0x0525)
00097 #define USART_IT_IDLE                        ((uint16_t)0x0424)
00098 #define USART_IT_LBD                         ((uint16_t)0x0846)
00099 #define USART_IT_CTS                         ((uint16_t)0x096A)
00100 #define USART_IT_ERR                         ((uint16_t)0x0060)
00101 #define USART_IT_ORE                         ((uint16_t)0x0360)
00102 #define USART_IT_NE                          ((uint16_t)0x0260)
00103 #define USART_IT_FE                          ((uint16_t)0x0160)
00104
00105
00106 #define INT_UART0_CR1                                      0x0C
00107 #define INT_UART0_CR2                                      0x10
00108 #define INT_UART0_CR3                                      0x14
00109
00110 /*
00111  * USART DMA Requests
00112  */
00113 #define USART_DMA_REQ_TX                      ((uint16_t)0x0080)
00114 #define USART_DMA_REQ_RX                      ((uint16_t)0x0040)
00115
00116 /*
00117  * USART WakeUp methods
00118  */
00119 #define USART_WAKEUP_IDLELINE                ((uint16_t)0x0000)
00120 #define USART_WAKEUP_ADRESSMARK             ((uint16_t)0x0800)
00121
00122
00123 /*
00124  * USART LIN Break Detection Length
00125  */
00126 #define USART_LIN_BREAK_DET_LEN_10B      ((uint16_t)0x0000)
00127 #define USART_LIN_BREAK_DET_LEN_11B      ((uint16_t)0x0020)
00128
00129 /*
00130  * USART IrDA Low Power
00131  */
00132 #define USART_IRDA_MODE_LOWPOWER              ((uint16_t)0x0004)
00133 #define USART_IRDA_MODE_NORMAL                ((uint16_t)0x0000)
00134
00135
00136 #define CR1_RUN_SET               ((uint16_t)0x2000)  /* USART Enable MASK */
00137 #define CR1_RUN_RESET             ((uint16_t)0xDFFF)  /* USART Disable MASK */
00138 #define CR1_RWU_SET               ((uint16_t)0x0002)  /* USART mute mode Enable MASK */
00139 #define CR1_RWU_RESET             ((uint16_t)0xFFFD)  /* USART mute mode Enable MASK */
00140 #define CR1_SBK_SET               ((uint16_t)0x0001)  /* USART Break Character send MASK */
00141 #define CR1_USART_CLEAR_MASK      ((uint16_t)0xE9F3)  /* USART CR1 MASK */
00142 #define CR1_UE                                   13
00143 #define CR1_M                                    12
00144 #define CR1_WAKE                                 11
00145 #define CR1_PCE                                  10
00146 #define CR1_PS                                    9
00147 #define CR1_PEIE                                  8
00148 #define CR1_TXEIE                                 7
00149 #define CR1_TCIE                                  6
00150 #define CR1_RXNEIE                                5
00151 #define CR1_IDLEIE                                4
00152 #define CR1_TE                                    3
00153 #define CR1_RE                                    2
00154 #define CR1_RWU                                   1
00155 #define CR1_SBK                                   0
00156
00157 #define CR2_MASK                  ((uint16_t)0xFFF0)  /* USART address MASK */
00158 #define CR2_LINE_SET              ((uint16_t)0x4000)  /* USART LIN Enable MASK */
00159 #define CR2_LINE_RESET            ((uint16_t)0xBFFF)  /* USART LIN Disable MASK */
00160 #define CR2_USART_CLEAR_MASK      ((uint16_t)0xC0FF)  /* USART CR2 MASK */
00161
00162 #define CR3_SCEN_SET              ((uint16_t)0x0020)  /* USART SC Enable MASK */
00163 #define CR3_SCEN_RESET            ((uint16_t)0xFFDF)  /* USART SC Disable MASK */
00164 #define CR3_NACK_SET              ((uint16_t)0x0010)  /* USART SC NACK Enable MASK */
00165 #define CR3_NACK_RESET            ((uint16_t)0xFFEF)  /* USART SC NACK Disable MASK */
00166 #define CR3_HDSEL_SET             ((uint16_t)0x0008)  /* USART Half-Duplex Enable MASK */
00167 #define CR3_HDSEL_RESET           ((uint16_t)0xFFF7)  /* USART Half-Duplex Disable MASK */
00168 #define CR3_IRLP_MASK             ((uint16_t)0xFFFB)  /* USART IrDA LowPower mode MASK */
00169 #define CR3_LBDL_MASK             ((uint16_t)0xFFDF)  /* USART LIN Break detection MASK */
00170 #define CR3_WAKE_MASK             ((uint16_t)0xF7FF)  /* USART WakeUp Method MASK */
00171 #define CR3_IREN_SET              ((uint16_t)0x0002)  /* USART IrDA Enable MASK */
00172 #define CR3_IREN_RESET            ((uint16_t)0xFFFD)  /* USART IrDA Disable MASK */
00173 #define CR3_CLEAR_MASK            ((uint16_t)0xFCFF)  /* USART CR3 MASK */
00174
00175
00176 /* Status */
00177 #define SR_CTS                                    9
00178 #define SR_LBD                                    8
00179 #define SR_TXE                                    7
00180 #define SR_TC                                     6
00181 #define SR_RXNE                                   5
00182 #define SR_IDLE                                   4
00183 #define SR_ORE                                    3
00184 #define SR_NE                                     2
00185 #define SR_FE                                     1
00186 #define SR_PE                                     0
00187
00188 #define GTPR_LSB_MASK             ((uint16_t)0x00FF)  /* Guard Time Register LSB MASK */
00189 #define GTPR_MSB_MASK             ((uint16_t)0xFF00)  /* Guard Time Register MSB MASK */
00190
00191 #define USART_IT_MASK             ((uint16_t)0x001F)  /* USART Interrupt MASK */
00192
00193 /* USART flags */
00194 #define USART_FLAG_CTS            ((uint16_t)0x0200)
00195 #define USART_FLAG_LBD            ((uint16_t)0x0100)
00196 #define USART_FLAG_TXE            ((uint16_t)0x0080)
00197 #define USART_FLAG_TC             ((uint16_t)0x0040)
00198 #define USART_FLAG_RXNE           ((uint16_t)0x0020)
00199 #define USART_FLAG_IDLE           ((uint16_t)0x0010)
00200 #define USART_FLAG_ORE            ((uint16_t)0x0008)
00201 #define USART_FLAG_NE             ((uint16_t)0x0004)
00202 #define USART_FLAG_FE             ((uint16_t)0x0002)
00203 #define USART_FLAG_PE             ((uint16_t)0x0001)
00204 #define USART_FLAG_MASK           ((uint16_t)0x03FF)
00205
00206
00207 /* USART registers */
00208 struct stm32_usart
00209 {
00210     reg16_t SR;
00211     uint16_t _RESERVED0;
00212     reg16_t DR;
00213     uint16_t _RESERVED1;
00214     reg16_t BRR;
00215     uint16_t _RESERVED2;
00216     reg16_t CR1;
00217     uint16_t _RESERVED3;
00218     reg16_t CR2;
00219     uint16_t _RESERVED4;
00220     reg16_t CR3;
00221     uint16_t _RESERVED5;
00222     reg16_t GTPR;
00223     uint16_t _RESERVED6;
00224 };
00225
00226 /* USART mode */
00227 #define USART_MODE_RX             ((uint16_t)0x0004)
00228 #define USART_MODE_TX             ((uint16_t)0x0008)
00229
00230 /* USART last bit */
00231 #define USART_LASTBIT_DISABLE     ((uint16_t)0x0000)
00232 #define USART_LASTBIT_ENABLE      ((uint16_t)0x0100)
00233
00234
00235 INLINE uint16_t evaluate_brr(struct stm32_usart *base, unsigned long cpu_freq, unsigned long baud)
00236 {
00237     uint32_t freq, reg, div, frac;
00238
00239     /* NOTE: PCLK1 has been configured as CPU_FREQ / 2 */
00240     freq = (base == (struct stm32_usart *)USART1_BASE) ? cpu_freq : cpu_freq / 2;
00241     div = (0x19 * freq) / (0x04 * baud);
00242     reg = (div / 0x64) << 0x04;
00243     frac = div - (0x64 * (reg >> 0x04));
00244     reg |= ((frac * 0x10 + 0x32) / 0x64) & 0x0f;
00245
00246     return (uint16_t)reg;
00247 }
00248
00249 #endif /* STM32_UART_H */
00250


BeRTOS: strtol10.c File Reference

  • mware
Functions
strtol10.c File Reference

Poor man's hex arrays (implementation). More...

#include "strtol10.h"

Go to the source code of this file.

Functions

bool | strtoul10 (const char *first, const char *last, unsigned long *val)
Convert a formatted base-10 ASCII number to unsigned long binary representation.
bool | strtol10 (const char *first, const char *last, long *val)
Convert a formatted base-10 ASCII number to signed long binary representation.

Detailed Description

Poor man's hex arrays (implementation).

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file strtol10.c.

Function Documentation

bool strtol10 | ( | const char * | first,
 |  | const char * | last,
 |  | long * | val
 | ) |  |

Convert a formatted base-10 ASCII number to signed long binary representation.

See also:
strtoul10()

Definition at line 80 of file strtol10.c.

bool strtoul10 | ( | const char * | first,
 |  | const char * | last,
 |  | unsigned long * | val
 | ) |  |

Convert a formatted base-10 ASCII number to unsigned long binary representation.

Unlike the standard strtoul(), this function has an interface that makes it better suited for protocol parsers. It's also much simpler and smaller than a full featured strtoul().

Parameters:
first | Pointer to first byte of input range (STL-style).
last | Pointer to end of input range (STL-style). Pass NULL to parse up to the first \0.
val | Pointer to converted value.
Returns:
true for success, false for failure.
See also:
strtol10()

Definition at line 56 of file strtol10.c.


BeRTOS: strtol10.c Source File

  • mware
strtol10.c
Go to the documentation of this file.
00001
00038 #include "strtol10.h"
00039
00056 bool strtoul10(const char *first, const char *last, unsigned long *val)
00057 {
00058     // Check for no input
00059     if (*first == '\0')
00060         return false;
00061
00062     *val = 0;
00063     for(/*nop*/; first != last && *first != '\0'; ++first)
00064     {
00065         if ((*first < '0') || (*first > '9'))
00066             return false;
00067
00068         *val = (*val * 10L) + (*first - '0');
00069     }
00070
00071     return true;
00072 }
00073
00074
00080 bool strtol10(const char *first, const char *last, long *val)
00081 {
00082     bool negative = false;
00083
00084     if (*first == '+')
00085         ++first; /* skip unary plus sign */
00086     else if (*first == '-')
00087     {
00088         negative = true;
00089         ++first;
00090     }
00091
00092     bool result = strtoul10(first, last, (unsigned long *)val);
00093
00094     if (negative)
00095         *val = - *val;
00096
00097     return result;
00098 }
00099


BeRTOS: strtol10.h File Reference

  • mware
Functions
strtol10.h File Reference

Poor man's hex arrays (implementation). More...

#include <cfg/compiler.h>

Go to the source code of this file.

Functions

bool | strtoul10 (const char *first, const char *last, unsigned long *val)
Convert a formatted base-10 ASCII number to unsigned long binary representation.
bool | strtol10 (const char *first, const char *last, long *val)
Convert a formatted base-10 ASCII number to signed long binary representation.
long | atol (const char *str)
Replacement for standard library function atol().
int | atoi (const char *str)
Replacement for standard library function atoi().

Detailed Description

Poor man's hex arrays (implementation).

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file strtol10.h.

Function Documentation

bool strtol10 | ( | const char * | first,
 |  | const char * | last,
 |  | long * | val
 | ) |  |

Convert a formatted base-10 ASCII number to signed long binary representation.

See also:
strtoul10()

Definition at line 80 of file strtol10.c.

bool strtoul10 | ( | const char * | first,
 |  | const char * | last,
 |  | unsigned long * | val
 | ) |  |

Convert a formatted base-10 ASCII number to unsigned long binary representation.

Unlike the standard strtoul(), this function has an interface that makes it better suited for protocol parsers. It's also much simpler and smaller than a full featured strtoul().

Parameters:
first | Pointer to first byte of input range (STL-style).
last | Pointer to end of input range (STL-style). Pass NULL to parse up to the first \0.
val | Pointer to converted value.
Returns:
true for success, false for failure.
See also:
strtol10()

Definition at line 56 of file strtol10.c.


BeRTOS: strtol10.h Source File

  • mware
strtol10.h
Go to the documentation of this file.
00001
00039 #ifndef MWARE_STRTOL10_H
00040 #define MWARE_STRTOL10_H
00041
00042 #include <cfg/compiler.h> /* bool */
00043
00044 bool strtoul10(const char *first, const char *last, unsigned long *val);
00045 bool strtol10(const char *first, const char *last, long *val);
00046
00050 INLINE long atol(const char *str)
00051 {
00052     long val;
00053     strtol10(str, NULL, &val);
00054     return val;
00055 }
00056
00060 INLINE int atoi(const char *str)
00061 {
00062     return (int)atol(str);
00063 }
00064
00065 #endif /* MWARE_STRTOL10_H */


BeRTOS: __sn_state Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
__sn_state Struct Reference

State information for __sn_put_char() More...

Detailed Description

State information for __sn_put_char()

Definition at line 100 of file sprintf.c.

The documentation for this struct was generated from the following file:
  • sprintf.c


BeRTOS: Afsk Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Afsk Struct Reference

AFSK1200 modem context. More...

#include <afsk.h>

Data Fields

KFile fd
Base "class".
int | adc_ch
ADC channel to be used by the demodulator.
int | dac_ch
DAC channel to be used by the modulator.
uint8_t | sample_count
Current sample of bit for output data.
uint8_t | curr_out
Current character to be modulated.
uint8_t | tx_bit
Mask of current modulated bit.
bool | bit_stuff
True if bit stuff is allowed, false otherwise.
uint8_t | stuff_cnt
Counter for bit stuffing.
uint16_t | phase_acc
DDS phase accumulator for generating modulated data.
uint16_t | phase_inc
Current phase increment for current modulated bit.
FIFOBuffer | delay_fifo
Delay line used to delay samples by (SAMPLEPERBIT / 2)
int8_t | delay_buf [SAMPLEPERBIT/2+1]
Buffer for delay FIFO.
FIFOBuffer | rx_fifo
FIFO for received data.
uint8_t | rx_buf [CONFIG_AFSK_RX_BUFLEN]
FIFO rx buffer.
FIFOBuffer | tx_fifo
FIFO for transmitted data.
uint8_t | tx_buf [CONFIG_AFSK_TX_BUFLEN]
FIFO tx buffer.
int16_t | iir_x [2]
IIR filter X cells, used to filter sampled data by the demodulator.
int16_t | iir_y [2]
IIR filter Y cells, used to filter sampled data by the demodulator.
uint8_t | sampled_bits
Bits sampled by the demodulator are here.
int8_t | curr_phase
Current phase, needed to know when the bitstream at ADC speed should be sampled.
uint8_t | found_bits
Bits found by the demodulator at the correct bitrate speed.
volatile bool | sending
True while modem sends data.
volatile int | status
AFSK modem status.
Hdlc hdlc
Hdlc context.
uint16_t | preamble_len
Preamble length.
uint16_t | trailer_len
Trailer length.

Detailed Description

AFSK1200 modem context.

Definition at line 93 of file afsk.h.

Field Documentation

int8_t Afsk::delay_buf[SAMPLEPERBIT/2+1]

Buffer for delay FIFO.

The 1 is added because the FIFO macros need 1 byte more to handle a buffer (SAMPLEPERBIT / 2) bytes long.

Definition at line 134 of file afsk.h.

uint8_t Afsk::found_bits

Bits found by the demodulator at the correct bitrate speed.

Definition at line 168 of file afsk.h.

uint16_t Afsk::preamble_len

Preamble length.

When the AFSK modem wants to send data, before sending the actual data, shifts out preamble_len HDLC_FLAG characters. This helps to synchronize the demodulator filters on the receiver side.

Definition at line 188 of file afsk.h.

uint8_t Afsk::sample_count

Current sample of bit for output data.

Definition at line 105 of file afsk.h.

uint8_t Afsk::sampled_bits

Bits sampled by the demodulator are here.

Since ADC samplerate is higher than the bitrate, the bits here are SAMPLEPERBIT times the bitrate.

Definition at line 159 of file afsk.h.

volatile int Afsk::status

AFSK modem status.

If 0 all is ok, otherwise errors are present.

Definition at line 177 of file afsk.h.

uint16_t Afsk::trailer_len

Trailer length.

After sending the actual data, the AFSK shifts out trailer_len HDLC_FLAG characters. This helps to synchronize the demodulator filters on the receiver side.

Definition at line 196 of file afsk.h.

The documentation for this struct was generated from the following file:
  • afsk.h


BeRTOS: ArmSerial Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
ArmSerial Struct Reference

Internal hardware state structure. More...

Detailed Description

Internal hardware state structure.

The sending variable is true while the transmission interrupt is retriggering itself.

For the USARTs the sending flag is useful for taking specific actions before sending a burst of data, at the start of a trasmission but not before every char sent.

For the SPI, this flag is necessary because the SPI sends and receives bytes at the same time and the SPI IRQ is unique for send/receive. The only way to start transmission is to write data in SPDR (this is done by spi_starttx()). We do this *only* if a transfer is not already started.

Definition at line 239 of file ser_at91.c.

The documentation for this struct was generated from the following files:
  • ser_at91.c
  • ser_sam3.c


BeRTOS: AvrSerial Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
AvrSerial Struct Reference

Internal hardware state structure. More...

Detailed Description

Internal hardware state structure.

The sending variable is true while the transmission interrupt is retriggering itself.

For the USARTs the sending flag is useful for taking specific actions before sending a burst of data, at the start of a trasmission but not before every char sent.

For the SPI, this flag is necessary because the SPI sends and receives bytes at the same time and the SPI IRQ is unique for send/receive. The only way to start transmission is to write data in SPDR (this is done by spi_starttx()). We do this *only* if a transfer is not already started.

Definition at line 455 of file ser_mega.c.

The documentation for this struct was generated from the following file:
  • ser_mega.c


BeRTOS: AX25Call Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
AX25Call Struct Reference

AX25 Call sign. More...

#include <ax25.h>

Data Fields

char | call [6]
Call string, max 6 character.
uint8_t | ssid
SSID (secondary station ID) for the call.

Detailed Description

AX25 Call sign.

Definition at line 91 of file ax25.h.

The documentation for this struct was generated from the following file:
  • ax25.h


BeRTOS: AX25Ctx Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
AX25Ctx Struct Reference

AX25 Protocol context. More...

#include <ax25.h>

Data Fields

uint8_t | buf [CONFIG_AX25_FRAME_BUF_LEN]
buffer for received chars
KFile * ch
KFile used to access the physical medium.
size_t | frm_len
received frame length.
uint16_t | crc_in
CRC for current received frame.
uint16_t | crc_out
CRC of current sent frame.
ax25_callback_t hook
Hook function to be called when a message is received.
bool | sync
True if we have received a HDLC flag.
bool | escape
True when we have to escape the following char.

Detailed Description

AX25 Protocol context.

Definition at line 75 of file ax25.h.

The documentation for this struct was generated from the following file:
  • ax25.h


BeRTOS: AX25Msg Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
AX25Msg Struct Reference

AX25 Message. More...

#include <ax25.h>

Data Fields

AX25Call src
Source adress.
AX25Call dst
Destination address.
uint16_t | ctrl
AX25 control field.
uint8_t | pid
AX25 PID field.
const uint8_t * | info
Pointer to the info field (payload) of the message.
size_t | len
Payload length.

Detailed Description

AX25 Message.

Used to handle AX25 sent/received messages.

Definition at line 119 of file ax25.h.

The documentation for this struct was generated from the following file:
  • ax25.h


BeRTOS: BattFs Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
BattFs Struct Reference

Describe a BattFs file usign a KFile. More...

#include <battfs.h>

Data Fields

KFile fd
KFile context.
Node link
Link for inserting in opened file list.
inode_t inode
inode of the opened file
BattFsSuper * disk
Disk context.
filemode_t mode
File open mode.
pgcnt_t * start
Pointer to page_array file start position.
pgcnt_t max_off
Max page offset allocated for the file.
int errors
File status/errors.

Detailed Description

Describe a BattFs file usign a KFile.

Definition at line 181 of file battfs.h.

The documentation for this struct was generated from the following file:
  • battfs.h


BeRTOS: BattFsPageHeader Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
BattFsPageHeader Struct Reference

BattFS page header, used to represent a page header in memory. More...

#include <battfs.h>

Data Fields

inode_t inode
File inode (file identifier).
fill_t fill
Filled bytes in page.
pgoff_t pgoff
Page offset inside file.
seq_t seq
Page sequence number.
fcs_t fcs
FCS (Frame Check Sequence) of the page header.

Detailed Description

BattFS page header, used to represent a page header in memory.

To see how this is stored on disk:

See also:
battfs_to_disk
disk_to_battfs

Definition at line 70 of file battfs.h.

Field Documentation

seq_t BattFsPageHeader::seq

Page sequence number.

Every time a page is rewritten the seq number is increased by 1. seq_t is wide enough to not to perform a wrap around before the memory death. So it can be kept as it would be monotonically increasing for our needs.

Definition at line 84 of file battfs.h.

The documentation for this struct was generated from the following file:
  • battfs.h


BeRTOS: BattFsSuper Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
BattFsSuper Struct Reference

Context used to describe a disk. More...

#include <battfs.h>

Data Fields

KBlock * dev
Block device context (physical disk).
pgaddr_t data_size
Size of space usable for data in a disk page, in bytes. The rest is used by the page header.
pgcnt_t * page_array
Page allocation array.
pgcnt_t free_page_start
Lowest address, in page array, for free pages.
disk_size_t disk_size
Size of the disk, in bytes (page_count * page_size).
disk_size_t free_bytes
Free space on the disk.
List file_opened_list
List used to keep trace of open files.

Detailed Description

Context used to describe a disk.

This context structure will be used to access disk. Must be initialized by hw memory driver.

Definition at line 121 of file battfs.h.

Field Documentation

pgcnt_t BattFsSuper::free_page_start

Lowest address, in page array, for free pages.

Pages above this element are free for use.

Definition at line 139 of file battfs.h.

pgcnt_t* BattFsSuper::page_array

Page allocation array.

This array must be allocated somewhere and must have enough space for page_count elements. Is used by the filesystem to represent the entire disk in memory.

Definition at line 133 of file battfs.h.

The documentation for this struct was generated from the following file:
  • battfs.h


BeRTOS: Bitmap Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Bitmap Struct Reference

Control structure to draw in a bitmap. More...

#include <gfx.h>

Data Fields

uint8_t * raster
Pointer to byte array to hold the data.
coord_t height
Width/Height in pixels.
coord_t stride
Bytes per row.
coord_t penY
Current pen position MoveTo()/LineTo()

Detailed Description

Control structure to draw in a bitmap.

Definition at line 136 of file gfx.h.

Field Documentation

coord_t Bitmap::stride

Bytes per row.

Definition at line 140 of file gfx.h.

The documentation for this struct was generated from the following file:
  • gfx.h


BeRTOS: CardCSD Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
CardCSD Struct Reference

Card Specific Data read directly from the card. More...

Data Fields

uint16_t | block_len
Length of a block.
uint32_t | block_num
Number of block on the card.
uint16_t | capacity
Card capacity in MB.

Detailed Description

Card Specific Data read directly from the card.

Definition at line 59 of file sd.c.

The documentation for this struct was generated from the following file:
  • sd.c


BeRTOS: CmdTemplate Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
CmdTemplate Struct Reference
Simple RPC machinery

Define a command that can be tokenized by the parser. More...

#include <parser.h>

Data Fields

const char * | name
Name of command.
const char * | arg_fmt
Format string for the input.
const char * | result_fmt
Format string for the output.
CmdFuncPtr func
Pointer to the handler function.
uint16_t | flags
Currently unused.

Detailed Description

Define a command that can be tokenized by the parser.

The format strings are sequences of characters, one for each parameter/result. Valid characters are:

d - a long integer, in decimal format s - a var string (in RAM)

Note:
To create and fill an instance for this function, it is strongly advised to use DECLARE_CMD_HUNK (cmd_hunk.h).

Definition at line 150 of file parser.h.

The documentation for this struct was generated from the following file:
  • parser.h


BeRTOS: DataFlash Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
DataFlash Struct Reference

Dataflash KFile context structure. More...

#include <dataflash.h>

Data Fields

KFile fd
File descriptor.
KFile * channel
Dataflash comm channel (usually SPI).
DataflashType dev
Memory device type;.
dataflash_page_t current_page
Current loaded dataflash page.
bool | page_dirty
True if current_page is dirty (needs to be flushed).
dataflash_setReset_t * | setReset
Callback used to set reset pin of dataflash.
dataflash_setCS_t * | setCS
Callback used to set CS pin of dataflash.

Detailed Description

Dataflash KFile context structure.

Definition at line 89 of file dataflash.h.

The documentation for this struct was generated from the following file:
  • dataflash.h


BeRTOS: DataflashInfo Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
DataflashInfo Struct Reference

Structure used to describe a dataflash memory. More...

#include <dataflash.h>

Data Fields

uint8_t | density_id
Density id, used to check memory type.
dataflash_size_t page_size
Page size, in bytes.
uint8_t | page_bits
Number of bits needed to access a page.
uint16_t | page_cnt
Number of pages on memory.
DataFlashOpcode read_cmd
Command to be used to perform a continuous array.

Detailed Description

Structure used to describe a dataflash memory.

Definition at line 179 of file dataflash.h.

The documentation for this struct was generated from the following file:
  • dataflash.h


BeRTOS: DCMotor Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
DCMotor Struct Reference

Context structure for DC motor. More...

#include <dc_motor.h>

Detailed Description

Context structure for DC motor.

Definition at line 94 of file dc_motor.h.

The documentation for this struct was generated from the following file:
  • dc_motor.h


BeRTOS: DCMotorConfig Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
DCMotorConfig Struct Reference

DC motor configuration stucture. More...

#include <dc_motor.h>

Data Fields

PidCfg pid_cfg
Pid control.
bool | pid_enable
Flag to disable or enable pid control.
unsigned | pwm_dev
Pwm channel.
pwm_freq_t freq
Pwm waveform frequency.
adc_ch_t adc_ch
ADC channel.
adcread_t adc_max
ADC max scale value.
adcread_t adc_min
ADC min scale value.
bool | dir
Default direction for select DC motor.
bool | braked
If true the motor is braked when we turn off it.
dc_speed_t speed
Default speed value for select DC motor.
int | speed_dev_id
Index of the device where read speed, to disable set to DC_MOTOR_NO_DEV_SPEED.

Detailed Description

DC motor configuration stucture.

Definition at line 69 of file dc_motor.h.

The documentation for this struct was generated from the following file:
  • dc_motor.h


BeRTOS: DFilter Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
DFilter Struct Reference

A filter is an interface between two notifier. More...

#include <dnotifier.h>

Data Fields

Node link
Allow creating a list of dfilter objects.
DNotifier * target
Target of the filter.
update_filter_ptr | update
Update function called by the source dnotifier.
const DFilterMap * | map
Map for translating messages for target.

Detailed Description

A filter is an interface between two notifier.

It can translate messages between them through a map (if it is not null).

Definition at line 82 of file dnotifier.h.

The documentation for this struct was generated from the following file:
  • dnotifier.h


BeRTOS: DFilterMap Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
DFilterMap Struct Reference

Map for messages. More...

#include <dnotifier.h>

Detailed Description

Map for messages.

Used to translate src message to dst message.

Definition at line 71 of file dnotifier.h.

The documentation for this struct was generated from the following file:
  • dnotifier.h


BeRTOS: DNotifier Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
DNotifier Struct Reference

Base object for receive and forward messages. More...

#include <dnotifier.h>

Data Fields

update_func_ptr update
Receive new attributes from other notifiers.
List targets
List of target notifiers to set new attributes to.

Detailed Description

Base object for receive and forward messages.

It contains an update function used to update itslef and a list to notify other DNotifer eventually connected.

Definition at line 58 of file dnotifier.h.

The documentation for this struct was generated from the following file:
  • dnotifier.h


BeRTOS: DTagItem Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
DTagItem Struct Reference

This is the basic message structure used by all dnotifiers. More...

#include <dtag.h>

Detailed Description

This is the basic message structure used by all dnotifiers.

Definition at line 103 of file dtag.h.

The documentation for this struct was generated from the following file:
  • dtag.h


BeRTOS: DWidget Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
DWidget Struct Reference

Widget definition. More...

#include <dwidget.h>

Detailed Description

Widget definition.

Definition at line 52 of file dwidget.h.

The documentation for this struct was generated from the following file:
  • dwidget.h


BeRTOS: Eeprom Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Eeprom Struct Reference

Describe an EEPROM context, used by the driver to access the single device. More...

#include <eeprom.h>

Data Fields

EepromType type
EEPROM type.
e2dev_addr_t addr
Device address.

Detailed Description

Describe an EEPROM context, used by the driver to access the single device.

Definition at line 92 of file eeprom.h.

The documentation for this struct was generated from the following file:
  • eeprom.h


BeRTOS: EepromInfo Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
EepromInfo Struct Reference

Descrive all EEPROM informations needed by the driver. More...

#include <eeprom.h>

Data Fields

bool has_dev_addr
true if memory is device addressable (its A0, A1, A2 pin are used by memory).
e2blk_size_t blk_size
block size
e2_size_t e2_size
eeprom size

Detailed Description

Descrive all EEPROM informations needed by the driver.

Definition at line 153 of file eeprom.h.

The documentation for this struct was generated from the following file:
  • eeprom.h


BeRTOS: EmulSerial Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
EmulSerial Struct Reference

Internal state structure. More...

Detailed Description

Internal state structure.

Definition at line 68 of file ser_posix.c.

The documentation for this struct was generated from the following file:
  • ser_posix.c


BeRTOS: EntropyPool Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
EntropyPool Struct Reference

Sturct data of entropy pool. More...

#include <randpool.h>

Data Fields

size_t | entropy
Actual value of entropy (byte).
size_t | pos_add
Number of byte added in entropy pool.
size_t | pos_get
Number of byte got in entropy pool.
size_t | counter
Counter.
uint8_t | pool_entropy [CONFIG_SIZE_ENTROPY_POOL]
Entropy pool.

Detailed Description

Sturct data of entropy pool.

Definition at line 53 of file randpool.h.

The documentation for this struct was generated from the following files:
  • randpool.h
  • entropy.h


BeRTOS: Flash Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Flash Struct Reference
Embedded flash driver

EmbFlash KBlock context structure. More...

#include <flash.h>

Data Fields

KBlock blk
KBlock context.

Detailed Description

EmbFlash KBlock context structure.

Definition at line 114 of file flash.h.

The documentation for this struct was generated from the following file:
  • flash.h


BeRTOS: Flash25 Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Flash25 Struct Reference

Flash25 KFile context structure. More...

#include <flash25.h>

Data Fields

KFile fd
File descriptor.
KFile * channel
Dataflash comm channel (usually SPI).

Detailed Description

Flash25 KFile context structure.

Definition at line 62 of file flash25.h.

The documentation for this struct was generated from the following file:
  • flash25.h


BeRTOS: Ft245rl Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Ft245rl Struct Reference

Ft245rl KFile context structure. More...

#include <ft245rl.h>

Data Fields

KFile fd
File descriptor.

Detailed Description

Ft245rl KFile context structure.

Definition at line 58 of file ft245rl.h.

The documentation for this struct was generated from the following file:
  • ft245rl.h


BeRTOS: HashIterator Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
HashIterator Struct Reference

Iterator to walk the hash table. More...

#include <hashtable.h>

Detailed Description

Iterator to walk the hash table.

Definition at line 101 of file hashtable.h.

The documentation for this struct was generated from the following file:
  • hashtable.h


BeRTOS: HashTable Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
HashTable Struct Reference

Hash table description. More...

#include <hashtable.h>

Data Fields

const void ** | mem
Buckets of data.
uint16_t | max_elts_log2
Log2 of the size of the table.
bool | key_internal: 1
true if the key is copied internally
hook_get_key hook
Hook to get the key.
uint8_t * | mem
Pointer to the key memory.

Detailed Description

Hash table description.

Note:
This structures MUST NOT be accessed directly. Its definition is provided in the header file only for optimization purposes (see the rationale in hashtable.c).
If new elements must be added to this list, please double check DECLARE_HASHTABLE, which requires the existing elements to be at the top.

Definition at line 86 of file hashtable.h.

The documentation for this struct was generated from the following file:
  • hashtable.h


BeRTOS: Hdlc Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Hdlc Struct Reference

HDLC (High-Level Data Link Control) context. More...

#include <afsk.h>

Data Fields

uint8_t | demod_bits
Bitstream from the demodulator.
uint8_t | bit_idx
Current received bit.
uint8_t | currchar
Current received character.
bool | rxstart
True if an HDLC_FLAG char has been found in the bitstream.

Detailed Description

HDLC (High-Level Data Link Control) context.

Maybe to be moved in a separate HDLC module one day.

Definition at line 77 of file afsk.h.

The documentation for this struct was generated from the following file:
  • afsk.h


BeRTOS: Heap Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Heap Struct Reference
Embedded optimized memory allocator

A heap. More...

#include <heap.h>

Data Fields

struct _MemChunk * FreeList
Head of the free list.

Detailed Description

A heap.

Definition at line 68 of file heap.h.

The documentation for this struct was generated from the following file:
  • heap.h


BeRTOS: Image Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Image Struct Reference

Hold image pixels. More...

#include <gfx.h>

Data Fields

const uint8_t * raster
Pointer to byte array to hold the data.
coord_t width
Raster width in pixels.
coord_t height
Raster height in pixels.
coord_t stride
Bytes per row.

Detailed Description

Hold image pixels.

Definition at line 179 of file gfx.h.

Field Documentation

coord_t Image::height

Raster height in pixels.

Definition at line 183 of file gfx.h.

const uint8_t* Image::raster

Pointer to byte array to hold the data.

Definition at line 181 of file gfx.h.

coord_t Image::stride

Bytes per row.

Definition at line 184 of file gfx.h.

coord_t Image::width

Raster width in pixels.

Definition at line 182 of file gfx.h.

The documentation for this struct was generated from the following file:
  • gfx.h


BeRTOS: KbdHandler Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
KbdHandler Struct Reference
Keyboard handling driver

Keyboard handler descriptor. More...

#include <kbd.h>

Data Fields

keymask_t(* hook )(keymask_t)
Hook function.
int8_t | pri
Priority in input queue.
uint8_t | flags
See below for definitions.

Detailed Description

Keyboard handler descriptor.

Definition at line 75 of file kbd.h.

The documentation for this struct was generated from the following file:
  • kbd.h


BeRTOS: KBlock Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
KBlock Struct Reference
KBlock interface

KBlock: interface for a generic block device. More...

#include <kblock.h>

Data Fields

KBlockPriv | priv
Interface private data, do not use directly.
size_t | blk_size
Block size.
block_idx_t blk_cnt
Number of blocks available in the device.

Detailed Description

KBlock: interface for a generic block device.

Definition at line 160 of file kblock.h.

The documentation for this struct was generated from the following file:
  • kblock.h


BeRTOS: ReOpenFunc_t Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
ReOpenFunc_t Struct Reference
KFile interface

Context data for callback functions which operate on pseudo files. More...

#include <kfile.h>

Detailed Description

Context data for callback functions which operate on pseudo files.

Note:
Remember to add the corresponding accessor functions when extending this interface.

Definition at line 189 of file io/kfile.h.

The documentation for this struct was generated from the following file:
  • io/kfile.h


BeRTOS: KFileBlock Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
KFileBlock Struct Reference
KFile interface over KBlock

KFileBlock context. More...

#include <kfile_block.h>

Data Fields

KFile fd
KFile context.
KBlock * blk
KBlock device.

Detailed Description

KFileBlock context.

Definition at line 80 of file kfile_block.h.

The documentation for this struct was generated from the following file:
  • kfile_block.h


BeRTOS: KFileDebug Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
KFileDebug Struct Reference

Context for KFile over debug console. More...

#include <kfile_debug.h>

Data Fields

KFile fd
KFile base class.

Detailed Description

Context for KFile over debug console.

Definition at line 50 of file kfile_debug.h.

The documentation for this struct was generated from the following file:
  • kfile_debug.h


BeRTOS: KFileMem Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
KFileMem Struct Reference

Context for KFile over memory buffer. More...

#include <kfile_mem.h>

Data Fields

KFile fd
KFile base class.
void * mem
Pointer to the memory buffer used.

Detailed Description

Context for KFile over memory buffer.

Definition at line 52 of file kfile_mem.h.

The documentation for this struct was generated from the following file:
  • kfile_mem.h


BeRTOS: Layer Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Layer Struct Reference

Overwrapping layer context. More...

#include <lcd_text.h>

Data Fields

lcdpos_t addr
Active layers are linked together in a list sorted in top to bottom order.
signed char | pri
Priority of this layer (greater in front of lesser).
char | buf [CONFIG_LCD_COLS *CONFIG_LCD_ROWS]
Layer backing store buffer.

Detailed Description

Overwrapping layer context.

Definition at line 73 of file lcd_text.h.

Field Documentation

lcdpos_t Layer::addr

Active layers are linked together in a list sorted in top to bottom order.

Current XY address into this layer, for write operations.

Definition at line 82 of file lcd_text.h.

char Layer::buf[CONFIG_LCD_COLS *CONFIG_LCD_ROWS]

Layer backing store buffer.

All writes through the layer are copied into this buffer. Characters cells with value 0 are transparent with respect to other layers in the background.

Definition at line 94 of file lcd_text.h.

signed char Layer::pri

Priority of this layer (greater in front of lesser).

Definition at line 85 of file lcd_text.h.

The documentation for this struct was generated from the following file:
  • lcd_text.h


BeRTOS: LevelEdit Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
LevelEdit Struct Reference

State of a level meter. More...

#include <leveledit.h>

Detailed Description

State of a level meter.

Definition at line 62 of file leveledit.h.

The documentation for this struct was generated from the following file:
  • leveledit.h


BeRTOS: List Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
List Struct Reference
General purpose lists

Head of a doubly-linked list of Node structs. More...

#include <list.h>

Detailed Description

Head of a doubly-linked list of Node structs.

Lists must be initialized with LIST_INIT() prior to use.

Nodes can be added and removed from either end of the list with O(1) performance. Iterating over these lists can be tricky: use the FOREACH_NODE() macro instead.

Definition at line 106 of file list.h.

The documentation for this struct was generated from the following file:
  • list.h


BeRTOS: LM3SSSI Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
LM3SSSI Struct Reference

LM3S1968 SSI handle structure. More...

#include <ssi_lm3s.h>

Detailed Description

LM3S1968 SSI handle structure.

Definition at line 73 of file ssi_lm3s.h.

The documentation for this struct was generated from the following file:
  • ssi_lm3s.h


BeRTOS: Md2Context Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Md2Context Struct Reference

Context for MD2 computation. More...

#include <md2.h>

Data Fields

uint8_t | buffer [CONFIG_MD2_BLOCK_LEN]
Input buffer.
uint8_t | state [CONFIG_MD2_BLOCK_LEN]
Current state buffer.
uint8_t | checksum [CONFIG_MD2_BLOCK_LEN]
Checksum.
size_t | counter
Counter of remaining bytes.

Detailed Description

Context for MD2 computation.

Definition at line 60 of file md2.h.

The documentation for this struct was generated from the following file:
  • md2.h


BeRTOS: Menu Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Menu Struct Reference
Menu handling module

Menu description. More...

#include <menu.h>

Data Fields

MenuItem * items
Array of items (end with a NULL hook)
const_iptr_t title
Menu title (ID or ptr to string, 0 to disable)
int | flags
See MF_#? definitions below.
struct Bitmap * | bitmap
Bitmap where the menu is rendered.
int | selected
Initial selection (written to if MF_SAVESEL is set).
BlitBitmap | lcd_blitBitmap
Callback to call to do smooth the display.

Detailed Description

Menu description.

Definition at line 98 of file menu.h.

Field Documentation

int Menu::selected

Initial selection (written to if MF_SAVESEL is set).

Definition at line 104 of file menu.h.

The documentation for this struct was generated from the following file:
  • menu.h


BeRTOS: MenuItem Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
MenuItem Struct Reference
Menu handling module

Menu item description. More...

#include <menu.h>

Data Fields

const_iptr_t label
Item label (ID or ptr to string, 0 to disable)
int flags
See MIF_#? definitions below.
MenuHook hook
Callback function (NULL to terminate item list)
iptr_t userdata
User data to be passed back to the hook.

Detailed Description

Menu item description.

Definition at line 60 of file menu.h.

The documentation for this struct was generated from the following file:
  • menu.h


BeRTOS: Mt29f Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Mt29f Struct Reference

MT29F context. More...

#include <mt29f.h>

Detailed Description

MT29F context.

Definition at line 87 of file mt29f.h.

The documentation for this struct was generated from the following file:
  • mt29f.h


BeRTOS: NmeaGga Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
NmeaGga Struct Reference

Global Positioning System Fix Data. More...

#include <nmea.h>

Detailed Description

Global Positioning System Fix Data.

Extracted data from a GGA message

Note: time member contains the seconds elapsed from 00:00:00 1/1/1970, because from nmea sentence we read only the time of UTC position, we have not any reference of date (day, month and year) so time is referred to the start of unix time.

Definition at line 75 of file nmea.h.

The documentation for this struct was generated from the following file:
  • nmea.h


BeRTOS: nmeap_context_t Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
nmeap_context_t Struct Reference

parser context More...

#include <nmeap_def.h>

Data Fields

nmeap_sentence_t | sentence [NMEAP_MAX_SENTENCES]
support up to 8 sentences
char | input [NMEAP_MAX_SENTENCE_LENGTH+1]
sentence input buffer
unsigned long | msgs
errors and debug.
void * | user_data
opaque user data

Detailed Description

parser context

Definition at line 39 of file nmeap_def.h.

Field Documentation

unsigned long nmeap_context_t::msgs

errors and debug.

optimize these as desired

Definition at line 57 of file nmeap_def.h.

The documentation for this struct was generated from the following file:
  • nmeap_def.h


BeRTOS: nmeap_gga_t Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
nmeap_gga_t Struct Reference

extracted data from a GGA message More...

#include <nmeap.h>

Detailed Description

extracted data from a GGA message

Definition at line 103 of file nmeap.h.

The documentation for this struct was generated from the following file:
  • nmeap.h


BeRTOS: nmeap_rmc_t Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
nmeap_rmc_t Struct Reference

extracted data from an RMC message More...

#include <nmeap.h>

Detailed Description

extracted data from an RMC message

Definition at line 116 of file nmeap.h.

The documentation for this struct was generated from the following file:
  • nmeap.h


BeRTOS: nmeap_sentence_t Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
nmeap_sentence_t Struct Reference

context for a single sentence More...

#include <nmeap_def.h>

Detailed Description

context for a single sentence

Definition at line 28 of file nmeap_def.h.

The documentation for this struct was generated from the following file:
  • nmeap_def.h


BeRTOS: NmeaRmc Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
NmeaRmc Struct Reference

Recommended minimum specific GPS/Transit data. More...

#include <nmea.h>

Detailed Description

Recommended minimum specific GPS/Transit data.

Extracted data from an RMC message

Note: RMC sentences contain also date stamp so, time contains real seconds elapsed from 0:00:00 1/1/1970.

Definition at line 94 of file nmea.h.

The documentation for this struct was generated from the following file:
  • nmea.h


BeRTOS: NmeaVtg Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
NmeaVtg Struct Reference

Extracted data from an vtg message. More...

#include <nmea.h>

Detailed Description

Extracted data from an vtg message.

Definition at line 108 of file nmea.h.

The documentation for this struct was generated from the following file:
  • nmea.h


BeRTOS: Node Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Node Struct Reference
General purpose lists

This structure represents a node for bidirectional lists. More...

#include <list.h>

Detailed Description

This structure represents a node for bidirectional lists.

Data is usually appended to nodes by making them the first field of another struture, as a poor-man's form of inheritance.

Definition at line 91 of file list.h.

The documentation for this struct was generated from the following file:
  • list.h


BeRTOS: NtcHwInfo Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
NtcHwInfo Struct Reference

type for defining amplifications amp_t = A, where A is a pure number More...

#include <ntc.h>

Data Fields

const res_t * | resistances
resistances of the NTC (ohms * 100)
size_t | num_resistances
number of resistances
deg_t | degrees_min
degrees corresponding to the first entry in the table (celsius * 10)
deg_t | degrees_step
difference in degrees between two consecutive elements in the table (celsius * 10)

Detailed Description

type for defining amplifications amp_t = A, where A is a pure number

Describe a NTC chip

Definition at line 76 of file ntc.h.

The documentation for this struct was generated from the following file:
  • ntc.h


BeRTOS: Observer Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Observer Struct Reference

Here's a simple example: More...

#include <observer.h>

Detailed Description

Here's a simple example:

 Subject kbd_driver;

 Observer kbd_observer;

 void key_pressed(int event, void *_param)
 {
     char *param = (char *)_param;

     if (event == EVENT_KBD_PRESSED)
         printf("You pressed %c\n", *param);
 }

 void register_kbd_listener(void)
 {
     observer_SetEvent(&kbd_observer, key_pressed);
     observer_Subscribe(&kbd_driver, &kbd_observer);
 }

Definition at line 66 of file observer.h.

The documentation for this struct was generated from the following file:
  • observer.h


BeRTOS: Pcf8574 Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Pcf8574 Struct Reference

Context for accessing a PCF8574. More...

#include <pcf8574.h>

Detailed Description

Context for accessing a PCF8574.

Definition at line 65 of file pcf8574.h.

The documentation for this struct was generated from the following file:
  • pcf8574.h


BeRTOS: PidCfg Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
PidCfg Struct Reference

PID context structure. More...

#include <pid_control.h>

Data Fields

pidk_t kp
Proportional term of PID control method (Gain).
pidk_t ki
Integral term of PID control method (Integral Gain).
pidk_t kd
Derivative of PID control method (Derivative Gain).
piddata_t | i_max
Max value of integral term.
piddata_t | i_min
Min value of integral term.
piddata_t | out_max
Man value of output.
piddata_t | out_min
Min value of output.
mtime_t sample_period
Sample period in milliseconds.

Detailed Description

PID context structure.

Definition at line 56 of file pid_control.h.

The documentation for this struct was generated from the following file:
  • pid_control.h


BeRTOS: PidContext Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
PidContext Struct Reference

PID context structure. More...

#include <pid_control.h>

Data Fields

piddata_t | prev_err
Previous error.
piddata_t | i_state
Integrator state (sum of all the preceding errors).

Detailed Description

PID context structure.

Definition at line 76 of file pid_control.h.

The documentation for this struct was generated from the following file:
  • pid_control.h


BeRTOS: PocketBusCtx Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
PocketBusCtx Struct Reference

pocketBus context structure. More...

#include <pocketbus.h>

Data Fields

uint8_t | buf [CONFIG_POCKETBUS_BUFLEN]
receiving Buffer
struct KFile * | fd
File descriptor.
bool | sync
Status flag: true if we have received an STX, false otherwise.
bool | escape
Status flag: true if we are in escape mode, false otherwise.
rotating_t | in_cks
Checksum computation for received data.
rotating_t | out_cks
Checksum computation for transmitted data.
pocketbus_len_t len
Received length.

Detailed Description

pocketBus context structure.

Definition at line 88 of file pocketbus.h.

The documentation for this struct was generated from the following file:
  • pocketbus.h


BeRTOS: PocketBusHdr Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
PocketBusHdr Struct Reference

Header of pocketBus messages. More...

#include <pocketbus.h>

Data Fields

uint8_t ver
packet version
pocketbus_addr_t addr
slave address

Detailed Description

Header of pocketBus messages.

Definition at line 78 of file pocketbus.h.

The documentation for this struct was generated from the following file:
  • pocketbus.h


BeRTOS: PocketCmdCtx Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
PocketCmdCtx Struct Reference

pocketBus context for command layer communications. More...

#include <pocketcmd.h>

Data Fields

struct PocketBusCtx * bus_ctx
pocketBus context
pocketbus_addr_t addr
Our address.
pocketcmd_lookup_t search
Lookup function used to search for command callbacks.
pocketcmd_t waiting
The command ID we are waiting for or PKTCMD_NULL.
ticks_t reply_timer
For waiting_reply.

Detailed Description

pocketBus context for command layer communications.

Definition at line 93 of file pocketcmd.h.

The documentation for this struct was generated from the following file:
  • pocketcmd.h


BeRTOS: PocketCmdHdr Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
PocketCmdHdr Struct Reference

Header for transmitted pocketBus Commands. More...

#include <pocketcmd.h>

Data Fields

pocketcmd_t cmd
command ID

Detailed Description

Header for transmitted pocketBus Commands.

Definition at line 53 of file pocketcmd.h.

The documentation for this struct was generated from the following file:
  • pocketcmd.h


BeRTOS: PocketCmdMsg Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
PocketCmdMsg Struct Reference

pocketBus command message structure. More...

#include <pocketcmd.h>

Data Fields

struct PocketCmdCtx * | cmd_ctx
command context
pocketcmd_t cmd
command id
pocketbus_len_t len
optional arg length
const uint8_t * | buf
optional arguments

Detailed Description

pocketBus command message structure.

Definition at line 72 of file pocketcmd.h.

The documentation for this struct was generated from the following file:
  • pocketcmd.h


BeRTOS: PocketMsg Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
PocketMsg Struct Reference

Structure holding pocketBus message parameters. More...

#include <pocketbus.h>

Data Fields

struct PocketBusCtx * | ctx
pocketBus message context
pocketbus_addr_t addr
address for received packet
pocketbus_len_t len
payload length
const uint8_t * | payload
payload data

Detailed Description

Structure holding pocketBus message parameters.

Definition at line 103 of file pocketbus.h.

The documentation for this struct was generated from the following file:
  • pocketbus.h


BeRTOS: PriNode Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
PriNode Struct Reference
General purpose lists

Extended node for priority queues. More...

#include <list.h>

Detailed Description

Extended node for priority queues.

Definition at line 115 of file list.h.

The documentation for this struct was generated from the following file:
  • list.h


BeRTOS: Pwm Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Pwm Struct Reference
PWM API

PWM context structure. More...

#include <pwm.h>

Detailed Description

PWM context structure.

Definition at line 2570 of file sam3n.h.

The documentation for this struct was generated from the following files:
  • sam3n.h
  • pwm.h


BeRTOS: PwmChannel Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
PwmChannel Struct Reference

Structur definition for pwm driver. More...

#include <pwm_avr.h>

Detailed Description

Structur definition for pwm driver.

Definition at line 58 of file pwm_avr.h.

The documentation for this struct was generated from the following file:
  • pwm_avr.h


BeRTOS: Ramp Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Ramp Struct Reference

Ramp structure. More...

#include <ramp.h>

Data Fields

struct RampPrecalc precalc
pre-calculated values for speed

Detailed Description

Ramp structure.

Definition at line 108 of file ramp.h.

The documentation for this struct was generated from the following file:
  • ramp.h


BeRTOS: RampPrecalc Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
RampPrecalc Struct Reference

Structure holding pre-calculated data for speeding up real-time evaluation of the ramp. More...

#include <ramp.h>

Detailed Description

Structure holding pre-calculated data for speeding up real-time evaluation of the ramp.

This structure is totally different between the fixed and the floating point version of the code.

Consult the file-level documentation of ramp.c for more information about the values of this structure.

Definition at line 92 of file ramp.h.

The documentation for this struct was generated from the following file:
  • ramp.h


BeRTOS: Rect Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Rect Struct Reference

Describe a rectangular area with coordinates expressed in pixels. More...

#include <gfx.h>

Detailed Description

Describe a rectangular area with coordinates expressed in pixels.

The rectangle is represented in terms of its top/left and right/bottom borders.

In some cases, rectangles are assumed to obey to the following invariants:

xmin <= xmax ymin <= ymax

Oddly, the xmin and ymin coordinates are inclusive, while the xmax and ymax coordinates are non-inclusive. This design decision makes several computations simpler and lets you specify empty (0x0) rectangles without breaking the invariants.

Computing the size of a rectangle can be done by simply subtracting the maximum X or Y coordinate from the minimum X or Y coordinate.

Definition at line 111 of file gfx.h.

The documentation for this struct was generated from the following file:
  • gfx.h


BeRTOS: Resource Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Resource Struct Reference

Hold context information for a resource such as an audio channel. More...

#include <resource.h>

Data Fields

Semaphore | lock
Control access to fields below.
struct Observer * | owner
Pointer to current owner's observer. NULL if resource is free.
int | pri
Priority of current owner (higher values mean higher priority).
List queue
Queue of processes waiting to obtain the resource.

Detailed Description

Hold context information for a resource such as an audio channel.

Each driver registers one or more Resource instances with the ResMan using ResMan_Register().

Clients can then allocate the resource through ResMan_Alloc() providing a desired priority and an Observer for asynchronous notification.

Allocated resources can be stolen by other clients asking for a higher priority. ResMan notifies a preemption request by invoking the Observer of the current owner.

The Observer callback must take whatever action is needed to release the resource as soon as possible to avoid blocking the new owner.

Definition at line 78 of file resource.h.

The documentation for this struct was generated from the following file:
  • resource.h


BeRTOS: ResourceWaiter Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
ResourceWaiter Struct Reference

Internal structure for building a priority queue of processes waiting for the resource to become free. More...

Detailed Description

Internal structure for building a priority queue of processes waiting for the resource to become free.

Definition at line 9 of file resource.c.

The documentation for this struct was generated from the following file:
  • resource.c


BeRTOS: Sd Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Sd Struct Reference

SD Card context structure. More...

#include <sd.h>

Data Fields

KBlock b
KBlock base class.
KFile * ch
SPI communication channel.
uint16_t | r1
Last status data received from SD.
uint16_t | tranfer_len
Lenght for the read/write commands, cached in order to increase speed.

Detailed Description

SD Card context structure.

Definition at line 60 of file sd.h.

The documentation for this struct was generated from the following file:
  • sd.h


BeRTOS: Serial Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Serial Struct Reference

Serial handle structure. More...

#include <ser.h>

Data Fields

KFile fd
Serial have a KFile struct implementation.
unsigned int | unit
Physical port number.
volatile serstatus_t | status
Holds the flags defined above.
struct SerialHardware * | hw
Low-level interface to hardware.
Transmit and receive FIFOs.

Declared volatile because handled asinchronously by interrupts.

FIFOBuffer | txfifo
FIFOBuffer | rxfifo

Detailed Description

Serial handle structure.

Definition at line 142 of file ser.h.

Field Documentation

struct SerialHardware* Serial::hw

Low-level interface to hardware.

Definition at line 176 of file ser.h.

volatile serstatus_t Serial::status

Holds the flags defined above.

Will be 0 when no errors have occurred.

Definition at line 173 of file ser.h.

The documentation for this struct was generated from the following file:
  • ser.h


BeRTOS: SevenSeg Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
SevenSeg Struct Reference
7 Segments LED Displays Driver

Context data for Display functions. More...

#include <led_7seg.h>

Data Fields

uint8_t | string [CONFIG_LED_7SEG_STRLEN]
The String to be displayed.
unsigned int | string_len
The length of the string to be displayed.
bool | blink
Has to blink?
uint8_t | bdigit
Has to blink only one digit?
bool | runonce
Has to be displayed only one time?
unsigned int | speed
Scrolling speed.
unsigned int | curspeed
Working scrolling speed.
bool | firstrun
Is it printed at least one time?
unsigned int | curpos
Working current position.
unsigned int | curdigit
Working current digit.
bool | busyedit
Is the structure in edit?

Detailed Description

Context data for Display functions.

Definition at line 137 of file led_7seg.h.

The documentation for this struct was generated from the following file:
  • led_7seg.h


BeRTOS: SHA1_Context Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
SHA1_Context Struct Reference

Context for SHA1 computation. More...

#include <sha1.h>

Detailed Description

Context for SHA1 computation.

Definition at line 49 of file sha1.h.

The documentation for this struct was generated from the following file:
  • sha1.h


BeRTOS: Signal Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Signal Struct Reference

Signal structure. More...

#include <compiler.h>

Data Fields

sigmask_t wait
Signals the process is waiting for.
sigmask_t recv
Received signals.

Detailed Description

Signal structure.

Definition at line 480 of file compiler.h.

The documentation for this struct was generated from the following file:
  • compiler.h


BeRTOS: Sipo Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Sipo Struct Reference

Sipo KFile context structure. More...

#include <sipo.h>

Data Fields

KFile fd
File descriptor.
SipoMap load_device
Descriptor of the device that we want drive.
SipoLoadPol load_pol
Set polarity of load signal.
SipoClkPol clock_pol
Set polarity of data clock.
SipoBitOrder bit_order
Set the order of pushed bits in sipo.

Detailed Description

Sipo KFile context structure.

Definition at line 91 of file sipo.h.

The documentation for this struct was generated from the following file:
  • sipo.h


BeRTOS: Stepper Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Stepper Struct Reference

Motor context structure. More...

#include <stepper.h>

Data Fields

struct StepperConfig * | cfg
Configuration of this stepper.
fsm_state state
Motor FSM state function.
struct TimerCounter * | timer
HW timer bound to this motor.
uint16_t | index
Index of the motor.
volatile int16_t | step
Steps counter (used in interrupt)
volatile int16_t | rampStep
Current position in acceleration ramp (used in intrrupt)
enum MotorDirection | dir
Current direction.
uint8_t | power
Current power.
uint16_t | speed
Timer compare value to reach.
int16_t | stepToReach
Final position to reach when running.
int16_t | skipIrqs
Counter used to skip IRQs (delay state changes)
int16_t | changeCurrentIrqs
Counter used to change current level (delay state changes)
int8_t | enableCheckHome
enable the home sensor control during movement
int8_t | stepsErrorHome
number of consecutive steps in error
int16_t | stepsTollMax
home sensor out max position
int16_t | stepsTollMin
home sensor in max position
int16_t | stepsDeaf
Position after which start the level check.
int16_t | stepsLevel
Position of level contact.
int16_t | stepCircular
Steps corresponding to 360 degrees (rotating motor)

Detailed Description

Motor context structure.

Definition at line 164 of file stepper.h.

The documentation for this struct was generated from the following file:
  • stepper.h


BeRTOS: StepperConfig Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
StepperConfig Struct Reference

Stepper configuration. More...

#include <stepper.h>

Data Fields

struct Ramp | ramp
Acceleration ramp.
uint16_t | pulse
(clocks) Length of the clock pulse used to drive the motor
fsm_state | states [STEPPER_MAX_STATES]
Custom FSM states (or NULL for default handling)
int16_t | stepsInHome
Additional steps to do after home detection.
int16_t | stepsOutHome
Additional steps to do leaving sensor in home procedure.
uint16_t | clocksHome
Clock ticks for steps done when searching home.
int16_t | stepsTollOutHome
tolerance steps leaving home sensor control while moving
int16_t | stepsTollInHome
tolerance steps leaving home sensor control while moving
int16_t | timeoutHome
timeout in ms in home procedure
uint8_t | powerRun
Vref voltage when motor runs (0-255)
uint8_t | powerIdle
Vref voltage when motor is idle (0-255)
uint16_t | homeSensorIndex
Home Sensor index in the sensor list.
uint16_t | levelSensorIndex
Level Sensor index in the sensor list.
bool | homeInverted: 1
True for inverted home sensor.
bool | halfStep: 1
True for half-step mode.
bool | axisInverted: 1
True if the CW/CCW are inverted from default.
bool | levelInverted: 1
True for inverted level sensor.
bool | controlBit: 1
Control bit status.
bool | controlMoveBit: 1
Control bit status in movement.
bool | highcurrentBit: 1
Mantain high current bit status.

Detailed Description

Stepper configuration.

Definition at line 126 of file stepper.h.

The documentation for this struct was generated from the following file:
  • stepper.h


BeRTOS: stm32_flash Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
stm32_flash Struct Reference

Embbeded flash configuration registers structure. More...

#include <stm32_flash.h>

Detailed Description

Embbeded flash configuration registers structure.

Definition at line 163 of file stm32_flash.h.

The documentation for this struct was generated from the following file:
  • stm32_flash.h


BeRTOS: stm32_gpio Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
stm32_gpio Struct Reference

GPIO configuration registers structure. More...

#include <stm32_gpio.h>

Detailed Description

GPIO configuration registers structure.

Definition at line 44 of file stm32_gpio.h.

The documentation for this struct was generated from the following file:
  • stm32_gpio.h


BeRTOS: SvInfo Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
SvInfo Struct Reference

Extracted data from an gsv message. More...

#include <nmea.h>

Detailed Description

Extracted data from an gsv message.

Definition at line 118 of file nmea.h.

The documentation for this struct was generated from the following file:
  • nmea.h


BeRTOS: SysIrq Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
SysIrq Struct Reference

Structure used to define a system interrupt source. More...

#include <sysirq_at91.h>

Data Fields

bool enabled
Getter for irq enable/disable state.
sysirq_setEnable_t setEnable
Setter for irq enable/disable state.
sysirq_handler_t handler
IRQ handler.

Detailed Description

Structure used to define a system interrupt source.

Definition at line 50 of file sysirq_at91.h.

The documentation for this struct was generated from the following file:
  • sysirq_at91.h


BeRTOS: TagPacket Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
TagPacket Struct Reference

Structure of a Tag packet. More...

#include <keytag.h>

Data Fields

KFile * tag
Tag communication channel.
KFile * host
Host communication channel.
bool | sync
Status flag: true if we find an STX.
size_t | len
Packet lenght.
uint8_t | buf [CONFIG_TAG_MAX_LEN]
Reception buffer.

Detailed Description

Structure of a Tag packet.

Definition at line 55 of file keytag.h.

The documentation for this struct was generated from the following file:
  • keytag.h


BeRTOS: Timer Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Timer Struct Reference
Timer module

The timer driver supports multiple synchronous timers that can trigger an event when they expire. More...

#include <timer.h>

Data Fields

Node link
Link into timers queue.
ticks_t _delay
[ticks] Timer delay
ticks_t tick
[ticks] When this timer will expire
Event expire
Event to execute when the timer expires.

Detailed Description

The timer driver supports multiple synchronous timers that can trigger an event when they expire.

See also:
timer_add()
timer_abort()

Definition at line 263 of file timer.h.

The documentation for this struct was generated from the following file:
  • timer.h


BeRTOS: TimerCounter Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
TimerCounter Struct Reference

Timer contex structure. More...

#include <stepper_at91.h>

Data Fields

int | timer_id
Timer counter ID.
uint32_t | blk_ctrl_set
Control block setting for this timer.
reg32_t * | chl_mode_reg
Channel mode register.
reg32_t * | chl_ctrl_reg
Channel control register.
reg32_t * | comp_reg
Compare register.
reg32_t * | comp_c_reg
C compare register.
reg32_t * | count_val_reg
Current timer counter value.
uint32_t | comp_effect_mask
Bit mask for TIO register compare effects.
uint32_t | comp_effect_set
Set TIO on register compare event.
uint32_t | comp_effect_clear
Clear TIO on register compare event.
uint32_t | comp_effect_c_mask
Bit mask for TIO on C register compare effects.
uint32_t | comp_effect_c_clear
Clear TIO on C register compare event.
uint32_t | ext_event_set
Setting for extern event trigger for TIOB.
reg32_t * | irq_enable_reg
Enable interrupt register.
reg32_t * | irq_disable_reg
Disable interrupt register.
uint32_t | irq_set_mask
IRQ flag bit for select TIO.
reg32_t * | irq_mask_reg
IRQ mask register.
irq_t isr
IRQ handler.
reg32_t * | status_reg
Timer status register.
int | tio_pin
Timer I/O pin.
stepper_isr_t callback
Interrupt callback pointer.
struct Stepper * | motor
Stepper context structure.

Detailed Description

Timer contex structure.

Definition at line 92 of file stepper_at91.h.

The documentation for this struct was generated from the following files:
  • stepper_at91.h
  • stepper_avr.h


BeRTOS: UsbConfigDesc Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
UsbConfigDesc Struct Reference

Device configuration descriptor. More...

#include <usb.h>

Detailed Description

Device configuration descriptor.

Note:
See USB 2.0 specification.

Definition at line 284 of file usb.h.

The documentation for this struct was generated from the following file:
  • usb.h


BeRTOS: UsbCtrlRequest Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
UsbCtrlRequest Struct Reference

USB Control Request descriptor. More...

#include <usb.h>

Detailed Description

USB Control Request descriptor.

This structure is used to send control requests to a USB device.

It matches the different fields of the USB 2.0 specification (section 9.3, table 9-2).

Definition at line 144 of file usb.h.

The documentation for this struct was generated from the following file:
  • usb.h


BeRTOS: UsbDescHeader Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
UsbDescHeader Struct Reference

USB common descriptor header. More...

#include <usb.h>

Detailed Description

USB common descriptor header.

Note:
All the USB standard descriptors have these 2 fields at the beginning.

Definition at line 158 of file usb.h.

The documentation for this struct was generated from the following file:
  • usb.h


BeRTOS: UsbDevice Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
UsbDevice Struct Reference

USB: generic device descriptor. More...

#include <usb.h>

Data Fields

UsbDeviceDesc * device
USB 2.0 device descriptor.
const UsbDescHeader ** | config
USB 2.0 configuration descriptors.
const UsbStringDesc ** | strings
USB strings.
void(* | event_cb )(UsbCtrlRequest *)
Called to handle control requests.
bool | configured
True when the device has been correctly initialized.

Detailed Description

USB: generic device descriptor.

Definition at line 357 of file usb.h.

The documentation for this struct was generated from the following file:
  • usb.h


BeRTOS: UsbDeviceDesc Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
UsbDeviceDesc Struct Reference

USB Device descriptor. More...

#include <usb.h>

Detailed Description

USB Device descriptor.

Note:
See USB 2.0 specification.

Definition at line 169 of file usb.h.

The documentation for this struct was generated from the following file:
  • usb.h


BeRTOS: UsbEndpointDesc Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
UsbEndpointDesc Struct Reference

Endpoint descriptor. More...

#include <usb.h>

Detailed Description

Endpoint descriptor.

Note:
See USB 2.0 specification.

Definition at line 325 of file usb.h.

The documentation for this struct was generated from the following file:
  • usb.h


BeRTOS: UsbInterfaceDesc Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
UsbInterfaceDesc Struct Reference

Device interface descriptor. More...

#include <usb.h>

Detailed Description

Device interface descriptor.

Note:
See USB 2.0 specification.

Definition at line 307 of file usb.h.

The documentation for this struct was generated from the following file:
  • usb.h


BeRTOS: UsbStringDesc Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
UsbStringDesc Struct Reference

USB string descriptor. More...

#include <usb.h>

Detailed Description

USB string descriptor.

Note:
See USB 2.0 specification.

Definition at line 192 of file usb.h.

The documentation for this struct was generated from the following file:
  • usb.h


BeRTOS: Window Struct Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
Data Fields
Window Struct Reference

Window handle and context structure. More...

#include <win.h>

Data Fields

Node link
Link us with other siblings into our parent.
struct Window * parent
Our parent window.
Bitmap * bitmap
Pixel storage for window contents.
Rect geom
[px] Window size and position relative to parent.
List children
List of child windows, arranged by depth (front to back).

Detailed Description

Window handle and context structure.

A window is a small rectangular area on the screen backed by its own bitmap where you can draw.

A window can contain any number of children sub-windows that can be depth arranged with respect to their siblings.

At any time, a window and all its children can be drawn into another bitmap to display a complete screen, taking depth and overlapping into account.

This rendering model is commonly referred to as screen composition, and is quite popular among modern windowing systems.

Definition at line 87 of file win.h.

Field Documentation

Bitmap* Window::bitmap

Pixel storage for window contents.

Definition at line 92 of file win.h.

List Window::children

List of child windows, arranged by depth (front to back).

Child top/left coordinates are relative to us.

Definition at line 100 of file win.h.

Rect Window::geom

[px] Window size and position relative to parent.

Definition at line 93 of file win.h.

Node Window::link

Link us with other siblings into our parent.

Definition at line 89 of file win.h.

struct Window* Window::parent

Our parent window.

NULL for the root window.

Definition at line 90 of file win.h.

The documentation for this struct was generated from the following file:
  • win.h


BeRTOS: switch_ctx_cm3.c File Reference

  • cpu
  • cortex-m3
  • hw
switch_ctx_cm3.c File Reference

Cortex-M3 context switch. More...

#include <cfg/compiler.h>
#include <cfg/cfg_proc.h>
#include <cpu/irq.h>
#include <cpu/types.h>
#include <kern/proc_p.h>
#include <kern/proc.h>
#include "switch_ctx_cm3.h"

Go to the source code of this file.

Detailed Description

Cortex-M3 context switch.

Author:
Andrea Righi <arighi@develer.com>

Definition in file switch_ctx_cm3.c.


BeRTOS: switch_ctx_cm3.c Source File

  • cpu
  • cortex-m3
  • hw
switch_ctx_cm3.c
Go to the documentation of this file.
00001
00038 #include <cfg/compiler.h>
00039 #include <cfg/cfg_proc.h> /* CONFIG_KERN_PREEMPT */
00040 #include <cpu/irq.h> /* IRQ_PRIO_DISABLED */
00041 #include <cpu/types.h> /* cpu_stack_t */
00042 #include <kern/proc_p.h> /* asm_switch_context() prototype */
00043 #include <kern/proc.h> /* proc_preempt() */
00044 #include "switch_ctx_cm3.h"
00045
00046 #if CONFIG_KERN_PREEMPT
00047 /*
00048  * Kernel preemption: implementation details.
00049  *
00050  * The kernel preemption is implemented using the PendSV IRQ. Inside the
00051  * SysTick handler when a process needs to be interrupted (expires its time
00052  * quantum or a high-priority process is awakend) a pending PendSV call is
00053  * triggered.
00054  *
00055  * The PendSV handler is called immediately after the SysTick handler, using
00056  * the architecture's tail-chaining functionality (an ISR call without the
00057  * overhead of state saving and restoration between different IRQs). Inside the
00058  * PendSV handler we perform the stack-switching between the old and new
00059  * processes.
00060  *
00061  * Voluntary context switch is implemented as a soft-interrupt call (SVCall),
00062  * so any process is always suspended and resumed from an interrupt context.
00063  *
00064  * NOTE: interrupts must be disabled or enabled when resuming a process context
00065  * depending of the type of the previous suspension. If a process was suspended
00066  * by a voluntary context switch IRQs must be disabled on resume (voluntary
00067  * context switch always happen with IRQs disabled). Instead, if a process was
00068  * suspended by the kernel preemption IRQs must be always re-enabled, because
00069  * the PendSV handler resumes directly the process context. To keep track of
00070  * this, we save the state of the IRQ priority in register r3 before performing
00071  * the context switch.
00072  *
00073  * If CONFIG_KERN_PREEMPT is not enabled the cooperative implementation
00074  * fallbacks to the default stack-switching mechanism, performed directly in
00075  * thread-mode and implemented as a normal function call.
00076  */
00077
00078 /*
00079  * Voluntary context switch handler.
00080  */
00081 void NAKED svcall_handler(void)
00082 {
00083     asm volatile (
00084     /* Save context */
00085         "mrs r3, basepri\n\t"
00086         "mrs ip, psp\n\t"
00087         "stmdb ip!, {r3-r11, lr}\n\t"
00088     /* Stack switch */
00089         "str ip, [r1]\n\t"
00090         "ldr ip, [r0]\n\t"
00091     /* Restore context */
00092         "ldmia ip!, {r3-r11, lr}\n\t"
00093         "msr psp, ip\n\t"
00094         "msr basepri, r3\n\t"
00095         "bx lr" : : : "memory");
00096 }
00097
00098 /*
00099  * Preemptible context switch handler.
00100  */
00101 void NAKED pendsv_handler(void)
00102 {
00103     register cpu_stack_t *stack asm("ip");
00104
00105     asm volatile (
00106         "mrs r3, basepri\n\t"
00107         "mov %0, %2\n\t"
00108         "msr basepri, %0\n\t"
00109         "mrs %0, psp\n\t"
00110         "stmdb %0!, {r3-r11, lr}\n\t"
00111         : "=r"(stack)
00112         : "r"(stack), "i"(IRQ_PRIO_DISABLED)
00113         : "r3", "memory");
00114     proc_current()->stack = stack;
00115     proc_preempt();
00116     stack = proc_current()->stack;
00117     asm volatile (
00118         "ldmia %0!, {r3-r11, lr}\n\t"
00119         "msr psp, %0\n\t"
00120         "msr basepri, r3\n\t"
00121         "bx lr"
00122         : "=r"(stack) : "r"(stack)
00123         : "memory");
00124 }
00125 #else /* !CONFIG_KERN_PREEMPT */
00126 #ifdef __IAR_SYSTEMS_ICC__
00127 #else /* __IAR_SYSTEMS_ICC__ */
00128 void NAKED asm_switch_context(cpu_stack_t **new_sp, cpu_stack_t **old_sp)
00129 {
00130     register cpu_stack_t **_new_sp asm("r0") = new_sp;
00131     register cpu_stack_t **_old_sp asm("r1") = old_sp;
00132
00133     asm volatile (
00134         "mrs ip, psp\n\t"
00135         /* Save registers */
00136         "stmdb ip!, {r4-r11, lr}\n\t"
00137         /* Save old stack pointer */
00138         "str ip, [%1]\n\t"
00139         /* Load new stack pointer */
00140         "ldr ip, [%0]\n\t"
00141         /* Load new registers */
00142         "ldmia ip!, {r4-r11, lr}\n\t"
00143         "msr psp, ip\n\t"
00144         "bx lr"
00145         : : "r"(_new_sp), "r"(_old_sp) : "ip", "memory");
00146 }
00147 #endif /* __IAR_SYSTEMS_ICC__ */
00148 #endif /* CONFIG_KERN_PREEMPT */


BeRTOS: switch_ctx_cm3.h File Reference

  • cpu
  • cortex-m3
  • hw
switch_ctx_cm3.h File Reference

Cortex-M3 context switch. More...

Go to the source code of this file.

Detailed Description

Cortex-M3 context switch.

Definition in file switch_ctx_cm3.h.


BeRTOS: switch_ctx_cm3.h Source File

  • cpu
  • cortex-m3
  • hw
switch_ctx_cm3.h
Go to the documentation of this file.
00001
00036 #ifndef SWITCH_CTX_CM3_H
00037 #define SWITCH_CTX_CM3_H
00038
00039 #if CONFIG_KERN_PREEMPT
00040 extern void svcall_handler(void);
00041 extern void pendsv_handler(void);
00042 #endif /* CONFIG_KERN_PREEMPT */
00043
00044 #endif /* SWITCH_CTX_CM3_H */


BeRTOS: switch_dsp56k.c File Reference

  • cpu
  • dsp56k
  • hw
switch_dsp56k.c File Reference

DSP5680x task switching support. More...

Go to the source code of this file.

Detailed Description

DSP5680x task switching support.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file switch_dsp56k.c.


BeRTOS: switch_dsp56k.c Source File

  • cpu
  • dsp56k
  • hw
switch_dsp56k.c
Go to the documentation of this file.
00001
00037 void asm_switch_context(void ** new_sp /* R2 */, void ** save_sp /* R3 */);
00038 asm void asm_switch_context(void ** new_sp, void ** save_sp)
00039 {
00040     lea   (SP)+
00041
00042     ; From the manual:
00043     ; The compiler uses page 0 address locations X: 0x0030 - 0x003F as register
00044     ; variables. Frequently accessed local variables are assigned to the page 0
00045     ; registers instead of to stack locations so that load and store instructions
00046     ; are shortened. Addresses X: 0x0030 - 0x0037 (page 0 registers MR0-MR7) are
00047     ; volatile registers and can be overwritten. The remaining registers (page 0
00048     ; registers MR8-MR15) are treated as non-volatile and, if used by a routine,
00049     ; must be saved on entry and restored on exit.
00050     ;
00051     ; So, register 0x30-0x37 are caller-save, while 0x38-0x3F are callee-save.
00052     move  x:<$38,y1
00053     move  y1,x:(SP)+
00054     move  x:<$39,y1
00055     move  y1,x:(SP)+
00056     move  x:<$3A,y1
00057     move  y1,x:(SP)+
00058     move  x:<$3B,y1
00059     move  y1,x:(SP)+
00060     move  x:<$3C,y1
00061     move  y1,x:(SP)+
00062     move  x:<$3D,y1
00063     move  y1,x:(SP)+
00064     move  x:<$3E,y1
00065     move  y1,x:(SP)+
00066     move  x:<$3F,y1
00067     move  y1,x:(SP)
00068
00069     ;
00070     ; Switch stacks
00071     nop
00072     move SP, x:(R3)
00073     nop
00074     move x:(R2), SP
00075     nop
00076
00077     ;
00078     ; restore all saved registers
00079     ;
00080     pop   y1
00081     move  y1,x:<$3F
00082     pop   y1
00083     move  y1,x:<$3E
00084     pop   y1
00085     move  y1,x:<$3D
00086     pop   y1
00087     move  y1,x:<$3C
00088     pop   y1
00089     move  y1,x:<$3B
00090     pop   y1
00091     move  y1,x:<$3A
00092     pop   y1
00093     move  y1,x:<$39
00094     pop   y1
00095     move  y1,x:<$38
00096
00097     ; SR is already pushed on the stack (normal call context). Use RTI to restore
00098     ; it, so that interrupt status is preserved across the tasks.
00099     rti
00100 }


BeRTOS: syncobj.c Source File

  • fs
  • fatfs
  • option
syncobj.c
00001 /*------------------------------------------------------------------------*/
00002 /* Sample code of OS dependent synchronization object controls            */
00003 /* for FatFs R0.07a  (C)ChaN, 2009                                        */
00004 /*------------------------------------------------------------------------*/
00005
00006 #include <windows.h>    // Win32
00007 //#include <ucos_ii.h>  // uC/OS-II
00008
00009 #include "../ff.h"
00010
00011 #if _FS_REENTRANT
00012
00013 /*------------------------------------------------------------------------*/
00014 /* Create a Synchronization Object for a Volume
00015 /*------------------------------------------------------------------------*/
00016 /* This function is called in f_mount function to create a new
00017 /  synchronization object, such as semaphore and mutex. When a FALSE is
00018 /  returned, the f_mount function fails with FR_INT_ERR.
00019 */
00020
00021 BOOL ff_cre_syncobj (   /* TRUE:Function succeeded, FALSE:Could not create due to any error */
00022     BYTE vol,           /* Corresponding logical drive being processed */
00023     _SYNC_t *sobj       /* Pointer to return the created sync object */
00024 )
00025 {
00026     BOOL ret;
00027
00028     *sobj = CreateMutex(NULL, FALSE, NULL);                 // Win32
00029     ret = (*sobj != INVALID_HANDLE_VALUE) ? TRUE : FALSE;   //
00030
00031 //  *sobj = VolumeSemId[vol];   // uITRON (give a static created sync object)
00032 //  ret = TRUE;                 // The initial value of the semaphore must be 1.
00033
00034 //  *sobj = OSMutexCreate(0, &err);             // uC/OS-II
00035 //  ret = (err == OS_NO_ERR) ? TRUE : FALSE;    //
00036
00037     return ret;
00038 }
00039
00040
00041
00042 /*------------------------------------------------------------------------*/
00043 /* Delete a Synchronization Object                                        */
00044 /*------------------------------------------------------------------------*/
00045 /* This function is called in f_mount function to delete a synchronization
00046 /  object that created with ff_cre_syncobj function. When a FALSE is
00047 /  returned, the f_mount function fails with FR_INT_ERR.
00048 */
00049
00050 BOOL ff_del_syncobj (   /* TRUE:Function succeeded, FALSE:Could not delete due to any error */
00051     _SYNC_t sobj        /* Sync object tied to the logical drive to be deleted */
00052 )
00053 {
00054     BOOL ret;
00055
00056     ret = CloseHandle(sobj);    // Win32
00057
00058 //  ret = TRUE;                 // uITRON (nothing to do)
00059
00060 //  OSMutexDel(sobj, OS_DEL_ALWAYS, &err);      // uC/OS-II
00061 //  ret = (err == OS_NO_ERR) ? TRUE : FALSE;    //
00062
00063     return ret;
00064 }
00065
00066
00067
00068 /*------------------------------------------------------------------------*/
00069 /* Request Grant to Access the Volume                                     */
00070 /*------------------------------------------------------------------------*/
00071 /* This function is called on entering file functions to lock the volume.
00072 /  When a FALSE is returned, the file function fails with FR_TIMEOUT.
00073 */
00074
00075 BOOL ff_req_grant ( /* TRUE:Got a grant to access the volume, FALSE:Could not get a grant */
00076     _SYNC_t sobj    /* Sync object to wait */
00077 )
00078 {
00079     BOOL ret;
00080
00081     ret = (WaitForSingleObject(sobj, _TIMEOUT) == WAIT_OBJECT_0) ? TRUE : FALSE;    // Win32
00082
00083 //  ret = (wai_sem(sobj) == E_OK) ? TRUE : FALSE;   // uITRON
00084
00085 //  OSMutexPend(sobj, _TIMEOUT, &err));             // uC/OS-II
00086 //  ret = (err == OS_NO_ERR) ? TRUE : FALSE;        //
00087
00088     return ret;
00089 }
00090
00091
00092
00093 /*------------------------------------------------------------------------*/
00094 /* Release Grant to Access the Volume                                     */
00095 /*------------------------------------------------------------------------*/
00096 /* This function is called on leaving file functions to unlock the volume.
00097 */
00098
00099 void ff_rel_grant (
00100     _SYNC_t sobj    /* Sync object to be signaled */
00101 )
00102 {
00103     ReleaseMutex(sobj); // Win32
00104
00105 //  sig_sem(sobj);      // uITRON
00106
00107 //  OSMutexPost(sobj);  // uC/OS-II
00108 }
00109
00110
00111 #else
00112
00113 #error This file is not needed in this configuration.
00114
00115 #endif


BeRTOS: sysirq_at91.c File Reference

  • cpu
  • arm
  • drv
Defines | Functions | Variables
sysirq_at91.c File Reference

System IRQ handler for Atmel AT91 ARM7 processors. More...

#include "sysirq_at91.h"
#include <io/arm.h>
#include <cpu/irq.h>
#include <cpu/types.h>
#include <cfg/module.h>
#include <cfg/macros.h>

Go to the source code of this file.

Defines

#define | SYSIRQ_PRIORITY 0
default priority for system irqs.

Functions

void | pit_setEnable (bool enable)
Enable/disable the Periodic Interrupt Timer interrupt.
static | DECLARE_ISR_CONTEXT_SWITCH (sysirq_dispatcher)
System IRQ dispatcher.
void | sysirq_init (void)
Init system IRQ handling.
void | sysirq_setHandler (sysirq_t irq, sysirq_handler_t handler)
Helper function used to set handler for system IRQ irq.
void | sysirq_setEnable (sysirq_t irq, bool enable)
Helper function used to enable/disable system IRQ irq.
bool | sysirq_enabled (sysirq_t irq)
Helper function used to get system IRQ irq state.

Variables

static SysIrq | sysirq_tab []
Table containing all system irqs.

Detailed Description

System IRQ handler for Atmel AT91 ARM7 processors.

Author:
Francesco Sacchi <batt@develer.com>

In Atmel AT91 ARM7TDMI processors, there are various peripheral interrupt sources. In general, every source has its own interrupt vector, so it is possible to assign a specific handler for each interrupt independently. However, there are a few sources called "system sources" that share a common IRQ line and vector, called "system IRQ". So a unique system IRQ dispatcher is implemented here. This module also contains an interface to manage every source independently. It is possible to assign to every system IRQ a specific IRQ handler.

See also:
sysirq_setHandler
sysirq_setEnable

Definition in file sysirq_at91.c.

Function Documentation

static DECLARE_ISR_CONTEXT_SWITCH ( sysirq_dispatcher ) [static]

System IRQ dispatcher.

This is the entry point for all system IRQs in AT91. This function checks for interrupt enable state of various sources (system timer, etc..) and calls the corresponding handler.

Note:
On AT91SAM7, all system IRQs (timer included) are handled by the sysirq_dispatcher, so we can't differentiate between context-switch and non-context-switch ISR inside this class of IRQs.

Definition at line 101 of file sysirq_at91.c.

void sysirq_init ( void )

Init system IRQ handling.

Note:
all system interrupts are disabled.

Definition at line 125 of file sysirq_at91.c.


BeRTOS: sysirq_at91.c Source File

  • cpu
  • arm
  • drv
sysirq_at91.c
Go to the documentation of this file.
00001
00054 #include "sysirq_at91.h"
00055 #include <io/arm.h>
00056 #include <cpu/irq.h>
00057 #include <cpu/types.h>
00058 #include <cfg/module.h>
00059 #include <cfg/macros.h>
00060
00065 INLINE void pit_setEnable(bool enable)
00066 {
00067     if (enable)
00068         PIT_MR |= BV(PITIEN);
00069     else
00070         PIT_MR &= ~BV(PITIEN);
00071 }
00072
00076 static SysIrq sysirq_tab[] =
00077 {
00078     /* PIT, Periodic Interval Timer (System timer)*/
00079     {
00080         .enabled = false,
00081         .setEnable = pit_setEnable,
00082         .handler = NULL,
00083     },
00084     /* TODO: add other system sources here */
00085 };
00086
00087 STATIC_ASSERT(countof(sysirq_tab) == SYSIRQ_CNT);
00088
00101 static DECLARE_ISR_CONTEXT_SWITCH(sysirq_dispatcher)
00102 {
00103     unsigned int i;
00104
00105     for (i = 0; i < countof(sysirq_tab); i++)
00106     {
00107         if (sysirq_tab[i].enabled
00108          && sysirq_tab[i].handler)
00109             sysirq_tab[i].handler();
00110     }
00111
00112     /* Inform hw that we have served the IRQ */
00113     AIC_EOICR = 0;
00114 }
00115
00116 #define SYSIRQ_PRIORITY 0 ///< default priority for system irqs.
00117
00118
00119 MOD_DEFINE(sysirq);
00120
00125 void sysirq_init(void)
00126 {
00127     cpu_flags_t flags;
00128     IRQ_SAVE_DISABLE(flags);
00129
00130     /* Disable all system interrupts */
00131     for (unsigned i = 0; i < countof(sysirq_tab); i++)
00132         sysirq_tab[i].setEnable(false);
00133
00134     /* Set the vector. */
00135     AIC_SVR(SYSC_ID) = sysirq_dispatcher;
00136     /* Initialize to edge triggered with defined priority. */
00137     AIC_SMR(SYSC_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED | SYSIRQ_PRIORITY;
00138     /* Clear pending interrupt */
00139     AIC_ICCR = BV(SYSC_ID);
00140     /* Enable the system IRQ */
00141     AIC_IECR = BV(SYSC_ID);
00142
00143     IRQ_RESTORE(flags);
00144     MOD_INIT(sysirq);
00145 }
00146
00147
00151 void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler)
00152 {
00153     ASSERT(irq < SYSIRQ_CNT);
00154     sysirq_tab[irq].handler = handler;
00155 }
00156
00160 void sysirq_setEnable(sysirq_t irq, bool enable)
00161 {
00162     ASSERT(irq < SYSIRQ_CNT);
00163
00164     sysirq_tab[irq].setEnable(enable);
00165     sysirq_tab[irq].enabled = enable;
00166 }
00167
00171 bool sysirq_enabled(sysirq_t irq)
00172 {
00173     ASSERT(irq < SYSIRQ_CNT);
00174
00175     return sysirq_tab[irq].enabled;
00176 }


BeRTOS: sysirq_at91.h File Reference

  • cpu
  • arm
  • drv
Data Structures | Typedefs | Enumerations | Functions
sysirq_at91.h File Reference

System irq handler for Atmel AT91 ARM7 processors (interface). More...

#include <cfg/compiler.h>

Go to the source code of this file.

Data Structures

struct | SysIrq
Structure used to define a system interrupt source. More...

Typedefs

typedef void(* | sysirq_handler_t )(void)
Type for system irq handler.
typedef void(* | sysirq_setEnable_t )(bool)
Type for system irq enable/disable function.

Enumerations

enum | sysirq_t { SYSIRQ_PIT }
System IRQ ID list. More...

Functions

void | sysirq_init (void)
Init system IRQ handling.
void | sysirq_setHandler (sysirq_t irq, sysirq_handler_t handler)
Helper function used to set handler for system IRQ irq.
void | sysirq_setEnable (sysirq_t irq, bool enable)
Helper function used to enable/disable system IRQ irq.
bool | sysirq_enabled (sysirq_t irq)
Helper function used to get system IRQ irq state.

Detailed Description

System irq handler for Atmel AT91 ARM7 processors (interface).

Author:
Francesco Sacchi <batt@develer.com>

Definition in file sysirq_at91.h.

Enumeration Type Documentation

enum sysirq_t

System IRQ ID list.

Enumerator:
SYSIRQ_PIT

Periodic Interval Timer.

Definition at line 60 of file sysirq_at91.h.

Function Documentation

void sysirq_init ( void )

Init system IRQ handling.

Note:
all system interrupts are disabled.

Definition at line 125 of file sysirq_at91.c.


BeRTOS: sysirq_at91.h Source File

  • cpu
  • arm
  • drv
sysirq_at91.h
Go to the documentation of this file.
00001
00039 #ifndef DRV_AT91_SYSIRQ_H
00040 #define DRV_AT91_SYSIRQ_H
00041
00042 #include <cfg/compiler.h>
00043
00044 typedef void (* sysirq_handler_t)(void);
00045 typedef void (* sysirq_setEnable_t)(bool);
00046
00050 typedef struct SysIrq
00051 {
00052     bool enabled;
00053     sysirq_setEnable_t setEnable;
00054     sysirq_handler_t handler;
00055 } SysIrq;
00056
00060 typedef enum sysirq_t
00061 {
00062     SYSIRQ_PIT,
00063     /* TODO: add all system irqs */
00064     SYSIRQ_CNT
00065 } sysirq_t;
00066
00067 void sysirq_init(void);
00068 void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler);
00069 void sysirq_setEnable(sysirq_t irq, bool enable);
00070 bool sysirq_enabled(sysirq_t irq);
00071
00072 #endif /* ARCH_ARM_SYSIRQ_H */


BeRTOS: tas5706a.c File Reference

  • drv
Functions
tas5706a.c File Reference

TAS5706A Power DAC i2c driver. More...

#include "tas5706a.h"
#include "hw/hw_tas5706a.h"
#include "cfg/cfg_tas5706a.h"
#include "cfg/cfg_i2c.h"
#include <cfg/module.h>
#include <drv/i2c.h>
#include <drv/timer.h>

Go to the source code of this file.

Functions

void | tas5706a_setVolume_3 (I2c *i2c, Tas5706aCh ch, tas5706a_vol_t vol)
Set the volume for the specified channel.
void | tas5706a_setLowPower_2 (I2c *i2c, bool val)
Set TAS chip to low power mode.
void | tas5706a_init_1 (I2c *i2c)
Initialize the TAS chip.

Detailed Description

TAS5706A Power DAC i2c driver.

Author:
Francesco Sacchi <batt@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file tas5706a.c.

Function Documentation

void tas5706a_init_1 ( I2c * i2c )

Initialize the TAS chip.

Parameters:
i2c The i2c context.

Definition at line 133 of file tas5706a.c.

void tas5706a_setLowPower_2 | ( | I2c * | i2c,
 |  | bool | val
 | ) |  |

Set TAS chip to low power mode.

When in low power mode, the TAS will not play any sound. You should put the TAS chip in low power whenever possible to prevent overheating and to save power.

Parameters:
i2c | The i2c context.
val | True if you want to enable low power mode, false otherwise.

Definition at line 124 of file tas5706a.c.

void tas5706a_setVolume_3 | ( | I2c * | i2c,
 |  | Tas5706aCh | ch,
 |  | tas5706a_vol_t | vol
 | ) |  |

Set the volume for the specified channel.

The volume must be expressed in % and will be at maximum CONFIG_TAS_MAX_VOL.

Parameters:
i2c | The i2c context.
ch | The channel to be controlled.
vol | The volume you want to set.

Definition at line 96 of file tas5706a.c.


BeRTOS: tas5706a.c Source File

  • drv
tas5706a.c
Go to the documentation of this file.
00001
00040 #include "tas5706a.h"
00041
00042 #include "hw/hw_tas5706a.h"
00043
00044 #include "cfg/cfg_tas5706a.h"
00045 #include "cfg/cfg_i2c.h"
00046
00047 #include <cfg/module.h>
00048
00049 #include <drv/i2c.h>
00050 #include <drv/timer.h>
00051
00052 typedef uint8_t tas_addr_t;
00053
00054 #define TAS_ADDR 0x36
00055
00056 #define TRIM_REG   0x1B
00057 #define SYS_REG2   0x05
00058 #define VOLUME_REG 0x07
00059 #define MUTE_VOL 0xFF
00060
00061 #define DB_TO_REG(db) ((24 - (db)) * 2)
00062
00063 #define CH1_VOL_REG 0x08
00064 #define CH2_VOL_REG 0x09
00065 #define CH3_VOL_REG 0x0A
00066 #define CH4_VOL_REG 0x0B
00067
00068
00069 INLINE bool tas5706a_putc(I2c *i2c, tas_addr_t addr, uint8_t ch)
00070 {
00071     i2c_start_w(i2c, TAS_ADDR, 2, I2C_STOP);
00072     i2c_putc(i2c, addr);
00073     i2c_putc(i2c, ch);
00074
00075     if (i2c_error(i2c))
00076         return false;
00077
00078     return true;
00079 }
00080
00081 INLINE int tas5706a_getc(I2c *i2c, tas_addr_t addr)
00082 {
00083     int ch;
00084
00085     i2c_start_w(i2c, TAS_ADDR, 2, I2C_NOSTOP);
00086     i2c_putc(i2c, addr);
00087     i2c_start_r(i2c, TAS_ADDR, 1, I2C_STOP);
00088     ch = (int)(uint8_t)i2c_getc(i2c);
00089
00090     if (i2c_error(i2c))
00091         return EOF;
00092
00093     return ch;
00094 }
00095
00096 void tas5706a_setVolume_3(I2c *i2c, Tas5706aCh ch, tas5706a_vol_t vol)
00097 {
00098     ASSERT(ch < TAS_CNT);
00099     ASSERT(vol <= TAS_VOL_MAX);
00100
00101     tas_addr_t addr1, addr2;
00102
00103     switch(ch)
00104     {
00105         case TAS_CH1:
00106             addr1 = CH1_VOL_REG;
00107             addr2 = CH3_VOL_REG;
00108             break;
00109         case TAS_CH2:
00110             addr1 = CH2_VOL_REG;
00111             addr2 = CH4_VOL_REG;
00112             break;
00113         default:
00114             ASSERT(0);
00115             return;
00116     }
00117
00118     uint8_t vol_att = 0xff - ((vol * 0xff) / TAS_VOL_MAX);
00119
00120     tas5706a_putc(i2c, addr1, vol_att);
00121     tas5706a_putc(i2c, addr2, vol_att);
00122 }
00123
00124 void tas5706a_setLowPower_2(I2c *i2c, bool val)
00125 {
00126     ASSERT(i2c);
00127
00128     TAS5706A_SETPOWERDOWN(val);
00129     TAS5706A_SETMUTE(val);
00130 }
00131
00132
00133 void tas5706a_init_1(I2c *i2c)
00134 {
00135     ASSERT(i2c);
00136     MOD_CHECK(timer);
00137
00138     TAS5706A_PIN_INIT();
00139     timer_delay(200);
00140     TAS5706A_SETPOWERDOWN(false);
00141     TAS5706A_SETMUTE(false);
00142     TAS5706A_MCLK_INIT();
00143     timer_delay(2);
00144     TAS5706A_SETRESET(false);
00145     timer_delay(20);
00146     tas5706a_putc(i2c, TRIM_REG, 0x00);
00147
00148     tas5706a_putc(i2c, VOLUME_REG, DB_TO_REG(CONFIG_TAS_MAX_VOL));
00149
00150     /* Unmute */
00151     tas5706a_putc(i2c, SYS_REG2, 0);
00152 }


BeRTOS: tas5706a.h File Reference

  • drv
Defines | Functions
tas5706a.h File Reference

TAS5706A Power DAC i2c driver. More...

#include "cfg/cfg_i2c.h"
#include <cfg/compiler.h>
#include <drv/i2c.h>

Go to the source code of this file.

Defines

#define | TAS_VOL_MIN 0
TAS minimum volume (%).
#define | TAS_VOL_MAX 100
TAS maximum volume (%).

Functions

void | tas5706a_setVolume_3 (I2c *i2c, Tas5706aCh ch, tas5706a_vol_t vol)
Set the volume for the specified channel.
void | tas5706a_setLowPower_2 (I2c *i2c, bool val)
Set TAS chip to low power mode.
void | tas5706a_init_1 (I2c *i2c)
Initialize the TAS chip.

Detailed Description

TAS5706A Power DAC i2c driver.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file tas5706a.h.

Function Documentation

void tas5706a_init_1 ( I2c * i2c )

Initialize the TAS chip.

Parameters:
i2c The i2c context.

Definition at line 133 of file tas5706a.c.

void tas5706a_setLowPower_2 | ( | I2c * | i2c,
 |  | bool | val
 | ) |  |

Set TAS chip to low power mode.

When in low power mode, the TAS will not play any sound. You should put the TAS chip in low power whenever possible to prevent overheating and to save power.

Parameters:
i2c | The i2c context.
val | True if you want to enable low power mode, false otherwise.

Definition at line 124 of file tas5706a.c.

void tas5706a_setVolume_3 | ( | I2c * | i2c,
 |  | Tas5706aCh | ch,
 |  | tas5706a_vol_t | vol
 | ) |  |

Set the volume for the specified channel.

The volume must be expressed in % and will be at maximum CONFIG_TAS_MAX_VOL.

Parameters:
i2c | The i2c context.
ch | The channel to be controlled.
vol | The volume you want to set.

Definition at line 96 of file tas5706a.c.


BeRTOS: tas5706a.h Source File

  • drv
tas5706a.h
Go to the documentation of this file.
00001
00044 #ifndef DRV_TAS5706A_H
00045 #define DRV_TAS5706A_H
00046
00047 #include "cfg/cfg_i2c.h"
00048
00049 #include <cfg/compiler.h>
00050
00051 #include <drv/i2c.h>
00052
00053 #if COMPILER_C99
00054     #define tas5706a_init(...)               PP_CAT(tas5706a_init ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__)
00055     #define tas5706a_setLowPower(...)        PP_CAT(tas5706a_setLowPower ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__)
00056     #define tas5706a_setVolume(...)          PP_CAT(tas5706a_setVolume ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__)
00057 #else
00058     #define tas5706a_init(args...)           PP_CAT(tas5706a_init ## _, COUNT_PARMS(args)) (args)
00059     #define tas5706a_setLowPower(args...)    PP_CAT(tas5706a_setLowPower ## _, COUNT_PARMS(args)) (args)
00060     #define tas5706a_setVolume(args...)      PP_CAT(tas5706a_setVolume ## _, COUNT_PARMS(args)) (args)
00061 #endif
00062
00063 typedef enum Tas5706aCh
00064 {
00065     TAS_CH1,
00066     TAS_CH2,
00067     TAS_CNT,
00068 } Tas5706aCh;
00069
00073 #define TAS_VOL_MIN 0
00074
00078 #define TAS_VOL_MAX 100
00079
00080 typedef uint8_t tas5706a_vol_t;
00081
00091 void tas5706a_setVolume_3(I2c *i2c, Tas5706aCh ch, tas5706a_vol_t vol);
00092
00102 void tas5706a_setLowPower_2(I2c *i2c, bool val);
00103
00109 void tas5706a_init_1(I2c *i2c);
00110
00111 #if !CONFIG_I2C_DISABLE_OLD_API
00112
00113 DEPRECATED INLINE void tas5706a_setVolume_2(Tas5706aCh ch, tas5706a_vol_t vol)
00114 {
00115     tas5706a_setVolume_3(&local_i2c_old_api, ch, vol);
00116 }
00117 DEPRECATED INLINE void tas5706a_setLowPower_1(bool val)
00118 {
00119     tas5706a_setLowPower_2(&local_i2c_old_api, val);
00120 }
00121 DEPRECATED INLINE void tas5706a_init_0(void)
00122 {
00123     tas5706a_init_1(&local_i2c_old_api);
00124 }
00125
00126 #endif /* !CONFIG_I2C_DISABLE_OLD_API */
00127
00128 #endif /* DRV_TAS5706A_H */


BeRTOS: tc520.c File Reference

  • drv
tc520.c File Reference

TC520 ADC driver (implementation) More...

#include "hw/hw_tc520.h"
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <drv/tc520.h>
#include <drv/timer.h>

Go to the source code of this file.

Detailed Description

TC520 ADC driver (implementation)

Author:
Francesco Sacchi <batt@develer.com>
Marco Benelli <marco@develer.com>

Definition in file tc520.c.


BeRTOS: tc520.c Source File

  • drv
tc520.c
Go to the documentation of this file.
00001
00041 #include "hw/hw_tc520.h"
00042
00043 #include <cfg/macros.h>
00044 #include <cfg/compiler.h>
00045
00046 #include <drv/tc520.h>
00047 #include <drv/timer.h>
00048
00049 #warning FIXME:This implementation is obsolete. Refactor with KFile interface.
00050
00051 #if 0
00052
00053 #include <drv/ser.h>
00054
00055 static Serial *spi_ser;
00056
00057 #define TC520_CONVERSION_TIMEOUT ms_to_ticks(1000)
00058 #define INIT_LOAD_VALUE 0x00
00059
00091 tc520_data_t tc520_read(void)
00092 {
00093     /* Start convertion and wait */
00094     CE_LOW();
00095     ticks_t start = timer_clock();
00096     do
00097     {
00098         /* timeout check */
00099         if (timer_clock() - start >= TC520_CONVERSION_TIMEOUT)
00100         {
00101             ASSERT(0);
00102             CE_HIGH();
00103             return TC520_MAX_VALUE;
00104         }
00105     }
00106     while(DV_LOW());
00107
00108     start = timer_clock();
00109     do
00110     {
00111         /* timeout check */
00112         if (timer_clock() - start >= TC520_CONVERSION_TIMEOUT)
00113         {
00114             ASSERT(0);
00115             CE_HIGH();
00116             return TC520_MAX_VALUE;
00117         }
00118     }
00119     while(DV_HIGH());
00120
00121     /* Ok, convertion finished, read result */
00122     CE_HIGH();
00123     READ_LOW();
00124
00125     /* RX buffer could be dirty...*/
00126     ser_purge(spi_ser);
00127
00128     /* I/O buffer */
00129     uint8_t buf[3] = "\x0\x0\x0";
00130
00131     /* Dummy write to activate recv */
00132     ser_write(spi_ser, buf, sizeof(buf));
00133     ser_drain(spi_ser);
00134     READ_HIGH();
00135
00136     /* recv */
00137     ASSERT(ser_read(spi_ser, buf, sizeof(buf)) == sizeof(buf));
00138
00139     tc520_data_t res;
00140
00141     /* Recompose data */
00142     res = (((tc520_data_t)(buf[0] & 0x3F)) << 10) | (((tc520_data_t)buf[1]) << 2) | (((tc520_data_t)buf[2]) >> 6);
00143
00144     #define OVERRANGE_BIT BV(7)
00145     /* Handle overrange bit as 17th bit */
00146     if (buf[0] & OVERRANGE_BIT)
00147         res |= BV32(16);
00148
00149     return res;
00150 }
00151
00152
00156 void tc520_init(Serial *spi_port)
00157 {
00158     spi_ser = spi_port;
00159     /* init io ports */
00160     TC520_HW_INIT;
00161     /* Send initial load value */
00162     LOAD_LOW();
00163     ser_putchar(INIT_LOAD_VALUE, spi_ser);
00164     ser_drain(spi_ser);
00165     LOAD_HIGH();
00166 }
00167
00168 #endif


BeRTOS: tc520.h File Reference

  • drv
tc520.h File Reference

TC520 ADC driver (intercace) More...

#include <drv/ser.h>
#include <cfg/compiler.h>

Go to the source code of this file.

Detailed Description

TC520 ADC driver (intercace)

Author:
Francesco Sacchi <batt@develer.com>
Marco Benelli <marco@develer.com>

Definition in file tc520.h.


BeRTOS: tc520.h Source File

  • drv
tc520.h
Go to the documentation of this file.
00001
00039 #ifndef DRV_TC520_H
00040 #define DRV_TC520_H
00041
00042 #warning FIXME: This drive is obsolete, you should refactor it.
00043
00044 #include <drv/ser.h>
00045 #include <cfg/compiler.h>
00046
00047 typedef uint32_t tc520_data_t;
00048
00049 /* 17 bit max value */
00050 #define TC520_MAX_VALUE 0x1FFFFUL
00051
00052 tc520_data_t tc520_read(void);
00053 void tc520_init(Serial *spi_port);
00054
00055 #endif  /* DRV_TC520_H */


BeRTOS: tea.c File Reference

  • algo
Functions
tea.c File Reference

TEA Tiny Encription Algorith functions (implementation). More...

#include "tea.h"
#include <cpu/byteorder.h>

Go to the source code of this file.

Functions

void | tea_enc (void *_v, void *_k)
TEA encryption function.
void | tea_dec (void *_v, void *_k)
TEA decryption function.

Detailed Description

TEA Tiny Encription Algorith functions (implementation).

Author:
Francesco Sacchi <batt@develer.com>

The Tiny Encryption Algorithm (TEA) by David Wheeler and Roger Needham of the Cambridge Computer Laboratory

Placed in the Public Domain by David Wheeler and Roger Needham.

**** ANSI C VERSION ****

Notes:

TEA is a Feistel cipher with XOR and and addition as the non-linear mixing functions.

Takes 64 bits of data in v[0] and v[1]. Returns 64 bits of data in w[0] and w[1]. Takes 128 bits of key in k[0] - k[3].

TEA can be operated in any of the modes of DES. Cipher Block Chaining is, for example, simple to implement.

n is the number of iterations. 32 is ample, 16 is sufficient, as few as eight may be OK. The algorithm achieves good dispersion after six iterations. The iteration count can be made variable if required.

Note this is optimised for 32-bit CPUs with fast shift capabilities. It can very easily be ported to assembly language on most CPUs.

delta is chosen to be the real part of (the golden ratio Sqrt(5/4) - 1/2 ~ 0.618034 multiplied by 2^32).

Definition in file tea.c.

Function Documentation

void tea_dec | ( | void * | _v,
 |  | void * | _k
 | ) |  |

TEA decryption function.

This function decrypts v with k and returns the decrypted data in v.

Parameters:
_v | Array of two long values containing the data block.
_k | Array of four long values containing the key.

Definition at line 110 of file tea.c.

void tea_enc | ( | void * | _v,
 |  | void * | _k
 | ) |  |

TEA encryption function.

This function encrypts v with k and returns the encrypted data in v.

Parameters:
_v | Array of two long values containing the data block.
_k | Array of four long values containing the key.

Definition at line 81 of file tea.c.


BeRTOS: tea.c Source File

  • algo
tea.c
Go to the documentation of this file.
00001
00066 #include "tea.h"
00067 #include <cpu/byteorder.h>
00068
00069 static uint32_t tea_func(uint32_t *in, uint32_t *sum, uint32_t *k)
00070 {
00071     return ((*in << 4) + cpu_to_le32(k[0])) ^ (*in + *sum) ^ ((*in >> 5) + cpu_to_le32(k[1]));
00072 }
00073
00081 void tea_enc(void *_v, void *_k)
00082 {
00083     uint32_t y, z;
00084     uint32_t sum = 0;
00085     uint8_t n = ROUNDS;
00086     uint32_t *v = (uint32_t *)_v;
00087     uint32_t *k = (uint32_t *)_k;
00088
00089     y=cpu_to_le32(v[0]);
00090     z=cpu_to_le32(v[1]);
00091
00092     while(n-- > 0)
00093     {
00094         sum += DELTA;
00095         y += tea_func(&z, &sum, &(k[0]));
00096         z += tea_func(&y, &sum, &(k[2]));
00097     }
00098
00099     v[0] = le32_to_cpu(y);
00100     v[1] = le32_to_cpu(z);
00101 }
00102
00110 void tea_dec(void *_v, void *_k)
00111 {
00112     uint32_t y, z;
00113     uint32_t sum = DELTA * ROUNDS;
00114     uint8_t n = ROUNDS;
00115     uint32_t *v = (uint32_t *)_v;
00116     uint32_t *k = (uint32_t *)_k;
00117
00118     y = cpu_to_le32(v[0]);
00119     z = cpu_to_le32(v[1]);
00120
00121     while(n-- > 0)
00122     {
00123         z -= tea_func(&y, &sum, &(k[2]));
00124         y -= tea_func(&z, &sum, &(k[0]));
00125         sum -= DELTA;
00126     }
00127
00128     v[0] = le32_to_cpu(y);
00129     v[1] = le32_to_cpu(z);
00130 }
00131


BeRTOS: tea.h File Reference

  • algo
Defines | Functions
tea.h File Reference

TEA Tiny Encription Algorith functions. More...

#include <cfg/compiler.h>

Go to the source code of this file.

Defines

#define | TEA_KEY_LEN 16
TEA key size.
#define | TEA_BLOCK_LEN 8
TEA block length.
#define | DELTA 0x9E3779B9
Magic value. (Golden number * 2^31)
#define | ROUNDS 32
Number of rounds.

Functions

void | tea_enc (void *_v, void *_k)
TEA encryption function.
void | tea_dec (void *_v, void *_k)
TEA decryption function.

Detailed Description

TEA Tiny Encription Algorith functions.

Documentation for TEA is available at http://www.cl.cam.ac.uk/ftp/users/djw3/tea.ps.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file tea.h.

Function Documentation

void tea_dec | ( | void * | _v,
 |  | void * | _k
 | ) |  |

TEA decryption function.

This function decrypts v with k and returns the decrypted data in v.

Parameters:
_v | Array of two long values containing the data block.
_k | Array of four long values containing the key.

Definition at line 110 of file tea.c.

void tea_enc | ( | void * | _v,
 |  | void * | _k
 | ) |  |

TEA encryption function.

This function encrypts v with k and returns the encrypted data in v.

Parameters:
_v | Array of two long values containing the data block.
_k | Array of four long values containing the key.

Definition at line 81 of file tea.c.


BeRTOS: tea.h Source File

  • algo
tea.h
Go to the documentation of this file.
00001
00043 #ifndef ALGO_TEA_H
00044 #define ALGO_TEA_H
00045
00046 #include <cfg/compiler.h>
00047
00048 #define TEA_KEY_LEN     16  //!< TEA key size.
00049 #define TEA_BLOCK_LEN   8   //!< TEA block length.
00050
00051 #define DELTA   0x9E3779B9  //!< Magic value. (Golden number * 2^31)
00052 #define ROUNDS  32      //!< Number of rounds.
00053
00054 void tea_enc(void *_v, void *_k);
00055 void tea_dec(void *_v, void *_k);
00056
00057 #endif /* ALGO_TEA_H */
00058


BeRTOS: test1.c Source File

  • net
  • nmeap
  • tst
test1.c
00001 /*
00002 Copyright (c) 2005, David M Howard (daveh at dmh2000.com)
00003 All rights reserved.
00004
00005 This product is licensed for use and distribution under the BSD Open Source License.
00006 see the file COPYING for more details.
00007
00008 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00009 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00010 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00011 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
00012 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
00013 OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
00014 OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
00015 OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00016 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
00017 OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
00018 EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00019
00020 */
00021
00022 /*
00023 ========================================================================================================
00024 EXAMPLE : SETUP FOR GGA AND RMC SENTENCES WITH CHARACTER BY CHARACTER IO
00025 =======================================================================================================
00026 */
00027
00028
00029 #include <stdio.h>
00030 #include <stdlib.h>
00031 #include <string.h>
00032 #include "nmeap.h"
00033
00034 nmeap_gga_t g_gga;
00035
00036 char test_vector[] = {
00037 "$GPGGA,123519,3929.946667,N,11946.086667,E,1,08,0.9,545.4,M,46.9,M,,*4A\r\n" /* good */
00038 "$xyz,1234,asdfadfasdfasdfljsadfkjasdfk\r\n"                                  /* junk */
00039 "$GPRMC,225446,A,4916.45,N,12311.12,W,000.5,054.7,191194,020.3,E*68\r\n"      /* good */
00040 "$GPRMC,225446,A,4916.45,N,12311.12,W,000.5,054.7,191194,020.3,E*48\r\n"      /* checksum error */
00041 };
00042
00043 char *pvec = test_vector;
00044
00046 int readchar()
00047 {
00048     int ch;
00049     if (*pvec == 0) {
00050         ch = -1;
00051     }
00052     else {
00053         ch = *pvec++;
00054     }
00055     return ch;
00056 }
00057
00059 static void print_gga(nmeap_gga_t *gga)
00060 {
00061     printf("found GPGGA message %.6f %.6f %.0f %lu %d %d %f %f\n",
00062             gga->latitude  ,
00063             gga->longitude,
00064             gga->altitude ,
00065             gga->time     ,
00066             gga->satellites,
00067             gga->quality   ,
00068             gga->hdop      ,
00069             gga->geoid
00070             );
00071 }
00072
00074 static void gpgga_callout(nmeap_context_t *context,void *data,void *user_data)
00075 {
00076     nmeap_gga_t *gga = (nmeap_gga_t *)data;
00077
00078     printf("-------------callout\n");
00079     print_gga(gga);
00080 }
00081
00082
00084 static void print_rmc(nmeap_rmc_t *rmc)
00085 {
00086     printf("found GPRMC Message %lu %c %.6f %.6f %f %f %lu %f\n",
00087             rmc->time,
00088             rmc->warn,
00089             rmc->latitude,
00090             rmc->longitude,
00091             rmc->speed,
00092             rmc->course,
00093             rmc->date,
00094             rmc->magvar
00095             );
00096 }
00097
00099 static void gprmc_callout(nmeap_context_t *context,void *data,void *user_data)
00100 {
00101     nmeap_rmc_t *rmc = (nmeap_rmc_t *)data;
00102
00103     printf("-------------callout\n");
00104     print_rmc(rmc);
00105 }
00106
00107 /* ---------------------------------------------------------------------------------------*/
00108 /* STEP 1 : allocate the data structures. be careful if you put them on the stack because */
00109 /*          they need to be live for the duration of the parser                           */
00110 /* ---------------------------------------------------------------------------------------*/
00111 static nmeap_context_t nmea;       /* parser context */
00112 static nmeap_gga_t     gga;        /* this is where the data from GGA messages will show up */
00113 static nmeap_rmc_t     rmc;        /* this is where the data from RMC messages will show up */
00114 static int             user_data; /* user can pass in anything. typically it will be a pointer to some user data */
00115
00116 int main(int argc,char *argv[])
00117 {
00118     int             status;
00119     char            ch;
00120
00121     /* ---------------------------------------*/
00122     /*STEP 2 : initialize the nmea context    */
00123     /* ---------------------------------------*/
00124     status = nmeap_init(&nmea,(void *)&user_data);
00125     if (status != 0) {
00126         printf("nmeap_init %d\n",status);
00127         exit(1);
00128     }
00129
00130     /* ---------------------------------------*/
00131     /*STEP 3 : add standard GPGGA parser      */
00132     /* -------------------------------------- */
00133     status = nmeap_addParser(&nmea,"GPGGA",nmeap_gpgga,gpgga_callout,&gga);
00134     if (status != 0) {
00135         printf("nmeap_add %d\n",status);
00136         exit(1);
00137     }
00138
00139     /* ---------------------------------------*/
00140     /*STEP 4 : add standard GPRMC parser      */
00141     /* -------------------------------------- */
00142     status = nmeap_addParser(&nmea,"GPRMC",nmeap_gprmc,gprmc_callout,&rmc);
00143     if (status != 0) {
00144         printf("nmeap_add %d\n",status);
00145         exit(1);
00146     }
00147
00148     /* ---------------------------------------*/
00149     /*STEP 5 : process input until done       */
00150     /* -------------------------------------- */
00151     for(;;) {
00152         /* ---------------------------------------*/
00153         /*STEP 6 : get a byte at a time           */
00154         /* -------------------------------------- */
00155         ch = readchar();
00156         if (ch <= 0) {
00157             break;
00158         }
00159
00160         /* --------------------------------------- */
00161         /*STEP 7 : pass it to the parser           */
00162         /* status indicates whether a complete msg */
00163         /* arrived for this byte                   */
00164         /* NOTE : in addition to the return status */
00165         /* the message callout will be fired when  */
00166         /* a complete message is processed         */
00167         /* --------------------------------------- */
00168         status = nmeap_parse(&nmea,ch);
00169
00170         /* ---------------------------------------*/
00171         /*STEP 8 : process the return code        */
00172         /* -------------------------------------- */
00173         switch(status) {
00174         case NMEAP_GPGGA:
00175             /* GOT A GPGGA MESSAGE */
00176             printf("-------------switch\n");
00177             print_gga(&gga);
00178             printf("-------------\n");
00179             break;
00180         case NMEAP_GPRMC:
00181             /* GOT A GPRMC MESSAGE */
00182             printf("-------------switch\n");
00183             print_rmc(&rmc);
00184             printf("-------------\n");
00185             break;
00186         default:
00187             break;
00188         }
00189     }
00190
00191     return 0;
00192 }
00193


BeRTOS: test2.c Source File

  • net
  • nmeap
  • tst
test2.c
00001 /*
00002 Copyright (c) 2005, David M Howard (daveh at dmh2000.com)
00003 All rights reserved.
00004
00005 This product is licensed for use and distribution under the BSD Open Source License.
00006 see the file COPYING for more details.
00007
00008 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00009 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00010 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00011 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
00012 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
00013 OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
00014 OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
00015 OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00016 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
00017 OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
00018 EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00019
00020 */
00021
00022 /*
00023 ========================================================================================================
00024 EXAMPLE : SETUP FOR GGA AND RMC SENTENCES WITH CHARACTER BY CHARACTER IO
00025 =======================================================================================================
00026 */
00027
00028
00029 #include <stdio.h>
00030 #include <stdlib.h>
00031 #include <string.h>
00032 #include "nmeap.h"
00033
00034 nmeap_gga_t g_gga;
00035
00036 char test_vector[] = {
00037 "$GPGGA,123519,3929.946667,N,11946.086667,E,1,08,0.9,545.4,M,46.9,M,,*4A\r\n" /* good */
00038 "$xyz,1234,asdfadfasdfasdfljsadfkjasdfk\r\n"                                  /* junk */
00039 "$GPRMC,225446,A,4916.45,N,12311.12,W,000.5,054.7,191194,020.3,E*68\r\n"      /* good */
00040 "$GPRMC,225446,A,4916.45,N,12311.12,W,000.5,054.7,191194,020.3,E*48\r\n"      /* checksum error */
00041 };
00042
00043 char *pvec = test_vector;
00044
00046 int readbuffer(char *buffer,int len)
00047 {
00048     int i;
00049
00050     if (*pvec == 0) {
00051         // end of file
00052         return -1;
00053     }
00054
00055     for(i=0;i<len;i++) {
00056         /* quit when no more data */
00057         if (*pvec == 0) {
00058             break;
00059         }
00060         buffer[i] = *pvec++;
00061     }
00062     return i;
00063 }
00064
00066 static void print_gga(nmeap_gga_t *gga)
00067 {
00068     printf("found GPGGA message %.6f %.6f %.0f %lu %d %d %f %f\n",
00069             gga->latitude  ,
00070             gga->longitude,
00071             gga->altitude ,
00072             gga->time     ,
00073             gga->satellites,
00074             gga->quality   ,
00075             gga->hdop      ,
00076             gga->geoid
00077             );
00078 }
00079
00081 static void gpgga_callout(nmeap_context_t *context,void *data,void *user_data)
00082 {
00083     nmeap_gga_t *gga = (nmeap_gga_t *)data;
00084
00085     printf("-------------callout\n");
00086     print_gga(gga);
00087 }
00088
00089
00091 static void print_rmc(nmeap_rmc_t *rmc)
00092 {
00093     printf("found GPRMC Message %lu %c %.6f %.6f %f %f %lu %f\n",
00094             rmc->time,
00095             rmc->warn,
00096             rmc->latitude,
00097             rmc->longitude,
00098             rmc->speed,
00099             rmc->course,
00100             rmc->date,
00101             rmc->magvar
00102             );
00103 }
00104
00106 static void gprmc_callout(nmeap_context_t *context,void *data,void *user_data)
00107 {
00108     nmeap_rmc_t *rmc = (nmeap_rmc_t *)data;
00109
00110     printf("-------------callout\n");
00111     print_rmc(rmc);
00112 }
00113
00114 /* ---------------------------------------------------------------------------------------*/
00115 /* STEP 1 : allocate the data structures. be careful if you put them on the stack because */
00116 /*          they need to be live for the duration of the parser                           */
00117 /* ---------------------------------------------------------------------------------------*/
00118 static nmeap_context_t nmea;       /* parser context */
00119 static nmeap_gga_t     gga;        /* this is where the data from GGA messages will show up */
00120 static nmeap_rmc_t     rmc;        /* this is where the data from RMC messages will show up */
00121 static int             user_data; /* user can pass in anything. typically it will be a pointer to some user data */
00122
00123 int main(int argc,char *argv[])
00124 {
00125     int  status;
00126     int  rem;
00127     int  offset;
00128     int  len;
00129     char buffer[32];
00130
00131     /* ---------------------------------------*/
00132     /*STEP 2 : initialize the nmea context    */
00133     /* ---------------------------------------*/
00134     status = nmeap_init(&nmea,(void *)&user_data);
00135     if (status != 0) {
00136         printf("nmeap_init %d\n",status);
00137         exit(1);
00138     }
00139
00140     /* ---------------------------------------*/
00141     /*STEP 3 : add standard GPGGA parser      */
00142     /* -------------------------------------- */
00143     status = nmeap_addParser(&nmea,"GPGGA",nmeap_gpgga,gpgga_callout,&gga);
00144     if (status != 0) {
00145         printf("nmeap_add %d\n",status);
00146         exit(1);
00147     }
00148
00149     /* ---------------------------------------*/
00150     /*STEP 4 : add standard GPRMC parser      */
00151     /* -------------------------------------- */
00152     status = nmeap_addParser(&nmea,"GPRMC",nmeap_gprmc,gprmc_callout,&rmc);
00153     if (status != 0) {
00154         printf("nmeap_add %d\n",status);
00155         exit(1);
00156     }
00157
00158     /* ---------------------------------------*/
00159     /*STEP 5 : process input until done       */
00160     /* -------------------------------------- */
00161     for(;;) {
00162         /* ---------------------------------------*/
00163         /*STEP 6 : get a buffer of input          */
00164         /* -------------------------------------- */
00165         len = rem = readbuffer(buffer,sizeof(buffer));
00166         if (len <= 0) {
00167             break;
00168         }
00169
00170         /* ----------------------------------------------*/
00171         /*STEP 7 : process input until buffer is used up */
00172         /* --------------------------------------------- */
00173         offset = 0;
00174         while(rem > 0) {
00175             /* --------------------------------------- */
00176             /*STEP 8 : pass it to the parser           */
00177             /* status indicates whether a complete msg */
00178             /* arrived for this byte                   */
00179             /* NOTE : in addition to the return status */
00180             /* the message callout will be fired when  */
00181             /* a complete message is processed         */
00182             /* --------------------------------------- */
00183             status = nmeap_parseBuffer(&nmea,&buffer[offset],&rem);
00184             offset += (len - rem);
00185
00186             /* ---------------------------------------*/
00187             /*STEP 9 : process the return code        */
00188             /* -------------------------------------- */
00189             switch(status) {
00190             case NMEAP_GPGGA:
00191                 printf("-------------switch\n");
00192                 print_gga(&gga);
00193                 printf("-------------\n");
00194                 break;
00195             case NMEAP_GPRMC:
00196                 printf("-------------switch\n");
00197                 print_rmc(&rmc);
00198                 printf("-------------\n");
00199                 break;
00200             default:
00201                 break;
00202             }
00203         }
00204     }
00205
00206     return 0;
00207 }
00208


BeRTOS: test3.c Source File

  • net
  • nmeap
  • tst
test3.c
00001 /*
00002 Copyright (c) 2005, David M Howard (daveh at dmh2000.com)
00003 All rights reserved.
00004
00005 This product is licensed for use and distribution under the BSD Open Source License.
00006 see the file COPYING for more details.
00007
00008 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00009 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00010 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00011 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
00012 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
00013 OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
00014 OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
00015 OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00016 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
00017 OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
00018 EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00019
00020 */
00021
00022 /*
00023 ========================================================================================================
00024 EXAMPLE : SETUP FOR GGA AND RMC SENTENCES + A CUSTOM SENTENCE PARSER WITH CHARACTER BY CHARACTER IO
00025 =======================================================================================================
00026 */
00027
00028
00029 /*
00030 $PGRMF
00031
00032 GARMIN PROPRIETARY GPS Position Fix Data
00033
00034 $PGRMF,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15*HH
00035 1 = GPS week number
00036 2 = GPS seconds in current week
00037 3 = UTC date, ddmmyy format
00038 4 = UTC time, hhmmss format
00039 5 = GPS leap second count
00040 6 = Latitude, dddmm.mmmm format
00041 7 = Latitude hemisphere, N or S
00042 8 = Longitude, dddmm.mmmm format
00043 9 = Longitude hemisphere, E or W
00044 10 = Mode (M=Manual, A=Automatic)
00045 11 = Fix type (0=No fix, 1=2D fix, 2=3D fix)
00046 12 = Speed over ground, kilometres / hour
00047 13 = Course over ground, degrees true
00048 14 = PDOP (Position dilution of precision), rounded to nearest integer
00049 15 = TDOP (Time dilution of precision), rounded to nearest integer
00050 HH = Checksum
00051 */
00052
00053
00054
00055 #include <stdio.h>
00056 #include <stdlib.h>
00057 #include <string.h>
00058 #include <assert.h>
00059 #include "nmeap.h"
00060
00061 nmeap_gga_t g_gga;
00062
00063 char test_vector[] = {
00064 "$GPGGA,123519,3929.946667,N,11946.086667,E,1,08,0.9,545.4,M,46.9,M,,*4A\r\n"
00065 "$GPRMC,225446,A,4916.45,N,12311.12,W,000.5,054.7,191194,020.3,E*68\r\n"
00066 "$PGRMF,1,100,191105,123519,13,3929.946667,N,12311.12,W,A,2,100.1,181.2,3,8*35\r\n"
00067 };
00068
00069 char *pvec = test_vector;
00070
00072 int readchar()
00073 {
00074     int ch;
00075     if (*pvec == 0) {
00076         ch = -1;
00077     }
00078     else {
00079         ch = *pvec++;
00080     }
00081     return ch;
00082 }
00083 /* --------------------------------------------------------------*/
00084 /*STEP 1a : define a data structure to contain the sentence data */
00085 /* ------------------------------------------------------------- */
00086 struct garmin_rmf {
00087     /* field                            position in sentence */
00088     int            week;             /*    1 = GPS week number                                                          */
00089     int            seconds_of_week;  /*    2 = GPS seconds in current week                                              */
00090     unsigned long  date;             /*    3 = UTC date, ddmmyy format                                                  */
00091     unsigned long  time;             /*    4 = UTC time, hhmmss format                                                  */
00092     int            leap;             /*    5 = GPS leap second count                                                    */
00093     double         lat;              /*  6,7 = Latitude, dddmm.mmmm format (north positive)                             */
00094     double         lon;              /*  8,9 = Longitude, dddmm.mmmm format (east positive)                             */
00095     int            mode;             /*   10 = Mode (M=Manual, A=Automatic)                                             */
00096     int            fix;              /*   11 = Fix type (0=No fix, 1=2D fix, 2=3D fix)                                  */
00097     double         speed;            /*   12 = Speed over ground, kilometres / hour                                     */
00098     double         course;           /*   13 = Course over ground, degrees true                                         */
00099     int            pdop;             /*   14 = PDOP (Position dilution of precision), rounded to nearest integer        */
00100     int            tdop;             /*   15 = TDOP (Time dilution of precision), rounded to nearest integer            */
00101 };
00102 typedef struct garmin_rmf garmin_rmf_t;
00103
00104 /* --------------------------------------------------------------*/
00105 /*STEP 1b : define an id value for the message                   */
00106 /* ------------------------------------------------------------- */
00107 #define GARMIN_PGRMF (NMEAP_USER + 0)
00108
00109
00110 /* --------------------------------------------------------------*/
00111 /* STEP 1c : write the sentence parser                            */
00112 /* ------------------------------------------------------------- */
00113 int custom_pgrmf(nmeap_context_t *context,nmeap_sentence_t *sentence)
00114 {
00115 #ifndef NDEBUG
00116     int i;
00117 #endif
00118
00119     /* get pointer to sentence data */
00120     garmin_rmf_t *rmf = (garmin_rmf_t *)sentence->data;
00121
00122     if (rmf != 0) {
00123         /* if the sentence has a data storage element, use it */
00124
00125
00126         /* extract data from the tokens */
00127         rmf->week            = atoi(context->token[1]);
00128         rmf->seconds_of_week = atoi(context->token[2]);
00129         rmf->date            = (unsigned long)atol(context->token[3]);
00130         rmf->time            = (unsigned long)atol(context->token[4]);
00131         rmf->leap            = atoi(context->token[5]);
00132         rmf->lat             = nmeap_latitude(context->token[6],context->token[7]);
00133         rmf->lon             = nmeap_longitude(context->token[8],context->token[9]);
00134         rmf->mode            = atoi(context->token[10]);
00135         rmf->fix             = atoi(context->token[11]);
00136         rmf->speed           = atof(context->token[12]);
00137         rmf->course          = atof(context->token[13]);
00138         rmf->pdop            = atoi(context->token[14]);
00139         rmf->tdop            = atoi(context->token[15]);
00140     }
00141     /* else there was no data element to store into */
00142
00143 #ifndef NDEBUG
00144     /* print raw input string */
00145     printf("%s",context->debug_input);
00146
00147     /* print some validation data */
00148     printf("%s==%s %02x==%02x\n",context->input_name,sentence->name,context->icks,context->ccks);
00149
00150     /* print the tokens */
00151     for(i=0;i<context->tokens;i++) {
00152         printf("%d:%s\n",i,context->token[i]);
00153     }
00154 #endif
00155
00156     /* if the sentence has a callout, call it */
00157     if (sentence->callout != 0) {
00158         (*sentence->callout)(context,rmf,context->user_data);
00159     }
00160
00161     return GARMIN_PGRMF;
00162 }
00163
00164
00165 /* -------------------------------------------------------------*/
00166 /*STEP 2 : write a function to do something with the data       */
00167 /* ------------------------------------------------------------ */
00168 static void print_pgrmf(garmin_rmf_t *rmf)
00169 {
00170     assert(rmf != 0);
00171
00172     printf("                    w sec date   time   lp lat       lon         m f spd    crs    p t\n");
00173     printf("found PGRMF message %d %d %lu %lu %d %.6f %.6f %d %d %.2f %.2f %d %d\n",
00174             rmf->week,
00175             rmf->seconds_of_week,
00176             rmf->date,
00177             rmf->time,
00178             rmf->leap,
00179             rmf->lat,
00180             rmf->lon,
00181             rmf->mode,
00182             rmf->fix,
00183             rmf->speed,
00184             rmf->course,
00185             rmf->pdop,
00186             rmf->tdop
00187             );
00188 }
00189
00190 /* -------------------------------------------------------------*/
00191 /*STEP 3 : if using the callout method, write the callout       */
00192 /* ------------------------------------------------------------ */
00193 static void pgrmf_callout(nmeap_context_t *context,void *data,void *user_data)
00194 {
00195     garmin_rmf_t *rmf = (garmin_rmf_t *)data;
00196
00197     printf("-------------callout\n");
00198     print_pgrmf(rmf);
00199 }
00200
00201
00202 /* ---------------------------------------------------------------------------------------*/
00203 /* STEP 4 : allocate the data structures. be careful if you put them on the stack because */
00204 /*          they need to be live for the duration of the parser                           */
00205 /* ---------------------------------------------------------------------------------------*/
00206 static nmeap_context_t nmea;       /* parser context */
00207 static nmeap_gga_t     gga;        /* this is where the data from GGA messages will show up */
00208 static nmeap_rmc_t     rmc;        /* this is where the data from RMC messages will show up */
00209 static garmin_rmf_t    rmf;        /* this is where the data from RMF messages will show up */
00210 static int             user_data; /* user can pass in anything. typically it will be a pointer to some user data */
00211
00212 int main(int argc,char *argv[])
00213 {
00214     int             status;
00215     char            ch;
00216
00217     /* ---------------------------------------*/
00218     /*STEP 5 : initialize the nmea context    */
00219     /* ---------------------------------------*/
00220     status = nmeap_init(&nmea,(void *)&user_data);
00221     if (status != 0) {
00222         printf("nmeap_init %d\n",status);
00223         exit(1);
00224     }
00225
00226     /* ---------------------------------------*/
00227     /*STEP 6 : add standard GPGGA parser      */
00228     /*         (no callout this time)         */
00229     /* -------------------------------------- */
00230     status = nmeap_addParser(&nmea,"GPGGA",nmeap_gpgga,0,&gga);
00231     if (status != 0) {
00232         printf("nmeap_add %d\n",status);
00233         exit(1);
00234     }
00235
00236     /* ---------------------------------------*/
00237     /*STEP 7 : add standard GPRMC parser      */
00238     /*         (no callout this time)         */
00239     /* -------------------------------------- */
00240     status = nmeap_addParser(&nmea,"GPRMC",nmeap_gprmc,0,&rmc);
00241     if (status != 0) {
00242         printf("nmeap_add %d\n",status);
00243         exit(1);
00244     }
00245
00246     /* ---------------------------------------*/
00247     /*STEP 8 : ADD THE CUSTOM PARSER          */
00248     /*         with callout         )         */
00249     /* -------------------------------------- */
00250     status = nmeap_addParser(&nmea,"PGRMF",custom_pgrmf,pgrmf_callout,&rmf);
00251     if (status != 0) {
00252         printf("nmeap_add %d\n",status);
00253         exit(1);
00254     }
00255     /* ---------------------------------------*/
00256     /*STEP 9 : process input until done       */
00257     /* -------------------------------------- */
00258     for(;;) {
00259         /* ---------------------------------------*/
00260         /*STEP 10: get a byte at a time           */
00261         /* -------------------------------------- */
00262         ch = readchar();
00263         if (ch <= 0) {
00264             break;
00265         }
00266
00267         /* --------------------------------------- */
00268         /*STEP 11: pass it to the parser          */
00269         /* status indicates whether a complete msg */
00270         /* arrived for this byte                   */
00271         /* NOTE : in addition to the return status */
00272         /* the message callout will be fired when  */
00273         /* a complete message is processed         */
00274         /* --------------------------------------- */
00275         status = nmeap_parse(&nmea,ch);
00276
00277         /* ---------------------------------------*/
00278         /*STEP 12 : process the return code       */
00279         /* -------------------------------------- */
00280         switch(status) {
00281         case NMEAP_GPGGA:
00282             /* GOT A GPGGA MESSAGE */
00283             printf("-------------switch\n");
00284             printf("GPGGA\n");
00285             printf("-------------\n");
00286             break;
00287         case NMEAP_GPRMC:
00288             /* GOT A GPRMC MESSAGE */
00289             printf("-------------switch\n");
00290             printf("GPRMC\n");
00291             printf("-------------\n");
00292             break;
00293         case GARMIN_PGRMF:
00294             /* GOT A PGRMF MESSAGE */
00295             printf("-------------switch\n");
00296             print_pgrmf(&rmf);
00297             printf("-------------\n");
00298             break;
00299         default:
00300             break;
00301         }
00302     }
00303
00304     return 0;
00305 }
00306


BeRTOS: test.h File Reference

  • cfg
Defines
test.h File Reference

Utility for the test suite. More...

#include "cfg/cfg_arch.h"

Go to the source code of this file.

Defines

#define SILENT_ASSERT(str) kputs("SILENT_ASSERT:$"str"$\n")
Silent an assert in a test.

Detailed Description

Utility for the test suite.

Author:
Daniele Basile <asterix@develer.com>
Francesco Sacchi <batt@develer.com>

When you want to test a module that is emulable on hosted platforms, these macros come in handy. Your module_test should supply three basic functions:

 int module_testSetup(void)
 int module_testRun(void)
 int module_testTearDown(void)

All of these should return 0 if ok or a value != 0 on errors.

Then, at the end of your module_test you can write:

 #if UNIT_TEST
    #include <whatuneed.h>
    #include <whatuneed.c>
    #include <...>

    TEST_MAIN(module);
 #endif

Including directly into your module the file.c you need to run the test allows you to build and run the test compiling only one file.

To achieve this you also need a main() that is supplied by the TEST_MAIN macro. This will expand to a full main that calls, in sequence: Setup, Run and TearDown of your module.

Definition in file test.h.

Define Documentation

#define SILENT_ASSERT ( str ) kputs("SILENT_ASSERT:$"str"$\n")

Silent an assert in a test.

This is useful when we run a test and we want to test an error condition. We know that an assert will fail but this is not really an error. To ignore that we mark it with this macro, where str is the message string of the assert that we want to drop. To use this macro copy the assert log message and paste as argument of this macro. In assert message log is reported also the line number of the code that have generated the assert. In this way you can trap only the selected assert message.

Definition at line 115 of file test.h.


BeRTOS: test.h Source File

  • cfg
test.h
Go to the documentation of this file.
00001
00072 #ifndef CFG_TEST_H
00073 #define CFG_TEST_H
00074
00075 #include "cfg/cfg_arch.h"
00076
00077 #if defined(ARCH_UNITTEST) && (ARCH & ARCH_UNITTEST)
00078     #define UNIT_TEST 1
00079
00084     #define TEST_MAIN(module) \
00085     int main(void) \
00086     { \
00087         if (module##_testSetup() != 0) \
00088             return 1; \
00089         if (module##_testRun() != 0) \
00090             return 2; \
00091         if (module##_testTearDown() != 0) \
00092             return 3; \
00093         return 0; \
00094     }
00095 #else /* !TEST */
00096     #define UNIT_TEST 0
00097
00098     #define TEST_MAIN(module) /* nothing */
00099 #endif /* TEST */
00100
00101
00115 #define SILENT_ASSERT(str) kputs("SILENT_ASSERT:$"str"$\n")
00116
00117 #endif /* CFG_TEST_H */


BeRTOS: text.c File Reference

  • gfx
Functions | Variables
text.c File Reference

Text graphic routines. More...

#include <gfx/gfx.h>
#include <gfx/font.h>
#include <gfx/text.h>
#include <gfx/gfx_p.h>
#include <cfg/debug.h>

Go to the source code of this file.

Functions

void | text_setCoord (struct Bitmap *bm, int x, int y)
Move (imaginary) cursor to coordinates specified.
void | text_moveTo (struct Bitmap *bm, int row, int col)
Move (imaginary) cursor to column and row specified.
static int | text_putglyph (char c, struct Bitmap *bm)
Render char c on Bitmap bm.
int | text_putchar (char c, struct Bitmap *bm)
Render char c, with (currently) limited ANSI escapes emulation support and '
' for newline.
void | text_clear (struct Bitmap *bmp)
Clear the screen and reset cursor position.
uint8_t | text_style (struct Bitmap *bm, uint8_t flags, uint8_t mask)
Set/clear algorithmic font style bits.

Variables

static bool | ansi_mode = false
ANSI escape sequences flag: true for ESC state on.

Detailed Description

Text graphic routines.

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file text.c.

Variable Documentation

bool ansi_mode = false [static]

ANSI escape sequences flag: true for ESC state on.

Definition at line 54 of file text.c.


BeRTOS: text.c Source File

  • gfx
text.c
Go to the documentation of this file.
00001
00040 #include <gfx/gfx.h>
00041 #include <gfx/font.h>
00042 #include <gfx/text.h>
00043
00044 #include <gfx/gfx_p.h> // FIXME: BM_DRAWPIXEL
00045
00046 #include <cfg/debug.h>
00047
00048
00054 static bool ansi_mode = false;
00055
00059 void text_setCoord(struct Bitmap *bm, int x, int y)
00060 {
00061     bm->penX = x;
00062     bm->penY = y;
00063 }
00064
00065
00070 void text_moveTo(struct Bitmap *bm, int row, int col)
00071 {
00072     ASSERT(col >= 0);
00073     ASSERT(col < bm->width / bm->font->width);
00074     ASSERT(row >= 0);
00075     ASSERT(row < bm->height / bm->font->height);
00076
00077     text_setCoord(bm, col * bm->font->width, row * bm->font->height);
00078 }
00079
00080
00084 static int text_putglyph(char c, struct Bitmap *bm)
00085 {
00086     const uint8_t * PROGMEM glyph;  /* font is in progmem */
00087     uint8_t glyph_width, glyph_height, glyph_height_bytes;
00088     unsigned char index = (unsigned char)c;
00089
00090     /* Check for out of range char and replace with '?' or first char in font. */
00091     if (UNLIKELY(!FONT_HAS_GLYPH(bm->font, index)))
00092     {
00093         kprintf("Illegal char '%c' (0x%02x)\n", index, index);
00094         if (FONT_HAS_GLYPH(bm->font, '?'))
00095             index = '?';
00096         else
00097             index = bm->font->first;
00098     }
00099
00100     /* Make character relative to font start */
00101     index -= bm->font->first;
00102
00103     glyph_height = bm->font->height;
00104     // FIXME: for vertical fonts only
00105     glyph_height_bytes = (glyph_height + 7) / 8;
00106
00107     if (bm->font->offset)
00108     {
00109         /* Proportional font */
00110         glyph_width = bm->font->widths[index]; /* TODO: optimize away */
00111         glyph = bm->font->glyph + bm->font->offset[index];
00112     }
00113     else
00114     {
00115         /*
00116          * Fixed-width font: compute the first column of pixels
00117          * of the selected glyph using the character code to index
00118          * the glyph array.
00119          */
00120         glyph_width = bm->font->width;
00121
00122         //For horizontal fonts
00123         //glyph = bm->font->glyph + index * (((glyph_width + 7) / 8) * glyph_height);
00124         glyph = bm->font->glyph + index * glyph_height_bytes * glyph_width;
00125     }
00126
00127     /* Slow path for styled glyphs */
00128     if (UNLIKELY(bm->styles))
00129     {
00130         uint8_t styles = bm->styles;
00131         uint8_t prev_dots = 0, italic_prev_dots = 0;
00132         uint8_t dots;
00133         uint8_t row, col, row_bit;
00134
00135         /*
00136          * To avoid repeating clipping and other expensive computations,
00137          * we cluster calls to gfx_blitRaster() using a small buffer.
00138          */
00139         #define CONFIG_TEXT_RENDER_OPTIMIZE 1
00140         #if CONFIG_TEXT_RENDER_OPTIMIZE
00141             #define RENDER_BUF_WIDTH 12
00142             #define RENDER_BUF_HEIGHT 8
00143             uint8_t render_buf[RAST_SIZE(RENDER_BUF_WIDTH, RENDER_BUF_HEIGHT)];
00144             uint8_t render_xpos = 0;
00145         #endif
00146
00147         /* This style alone could be handled by the fast path too */
00148         if (bm->styles & STYLEF_CONDENSED)
00149             --glyph_width;
00150
00151         if (bm->styles & STYLEF_EXPANDED)
00152             glyph_width *= 2;
00153
00154         for (row = 0, row_bit = 0; row < glyph_height_bytes; ++row, row_bit += 8)
00155         {
00156             /* For each dot column in the glyph... */
00157             for (col = 0; col < glyph_width; ++col)
00158             {
00159                 uint8_t src_col = col;
00160
00161                 /* Expanded style: advances only once every two columns. */
00162                 if (styles & STYLEF_EXPANDED)
00163                     src_col /= 2;
00164
00165                 /* Fetch a column of dots from glyph. */
00166                 dots = PGM_READ_CHAR(RAST_ADDR(glyph, src_col, row_bit, glyph_width));
00167
00168                 /* Italic: get lower 4 dots from previous column */
00169                 if (styles & STYLEF_ITALIC)
00170                 {
00171                     uint8_t new_dots = dots;
00172                     dots = (dots & 0xF0) | italic_prev_dots;
00173                     italic_prev_dots = new_dots & 0x0F;
00174                 }
00175
00176                 /* Bold: "or" pixels with the previous column */
00177                 if (styles & STYLEF_BOLD)
00178                 {
00179                     uint8_t new_dots = dots;
00180                     dots |= prev_dots;
00181                     prev_dots = new_dots;
00182                 }
00183
00184                 /* Underlined: turn on base pixel */
00185                 if ((styles & STYLEF_UNDERLINE)
00186                     && (row == glyph_height_bytes - 1))
00187                     dots |= (1 << (glyph_height - row_bit - 1));
00188
00189                 /* Inverted: invert pixels */
00190                 if (styles & STYLEF_INVERT)
00191                     dots = ~dots;
00192
00193                 /* Output dots */
00194                 #if CONFIG_TEXT_RENDER_OPTIMIZE
00195                     render_buf[render_xpos++] = dots;
00196                     if (render_xpos == RENDER_BUF_WIDTH)
00197                     {
00198                         gfx_blitRaster(bm, bm->penX + col - render_xpos + 1, bm->penY + row_bit,
00199                             render_buf, render_xpos,
00200                             MIN((uint8_t)RENDER_BUF_HEIGHT, (uint8_t)(glyph_height - row_bit)),
00201                             RENDER_BUF_WIDTH);
00202                         render_xpos = 0;
00203                     }
00204                 #else
00205                     gfx_blitRaster(bm, bm->penX + col, bm->penY + row_bit,
00206                         &dots, 1, MIN((uint8_t)8, glyph_height - row_bit), 1);
00207                 #endif
00208             }
00209
00210             #if CONFIG_TEXT_RENDER_OPTIMIZE
00211                 /* Flush out rest of render buffer */
00212                 if (render_xpos != 0)
00213                 {
00214                     gfx_blitRaster(bm, bm->penX + col - render_xpos, bm->penY + row_bit,
00215                         render_buf, render_xpos,
00216                         MIN((uint8_t)RENDER_BUF_HEIGHT, (uint8_t)(glyph_height - row_bit)),
00217                         RENDER_BUF_WIDTH);
00218                     render_xpos = 0;
00219                 }
00220             #endif
00221         }
00222     }
00223     else
00224     {
00225         /* No style: fast vanilla copy of glyph to bitmap */
00226         gfx_blitRaster(bm, bm->penX, bm->penY, glyph, glyph_width, glyph_height, glyph_width);
00227     }
00228
00229     /* Update current pen position */
00230     bm->penX += glyph_width;
00231
00232     return c;
00233 }
00234
00235
00240 int text_putchar(char c, struct Bitmap *bm)
00241 {
00242     /* Handle ANSI escape sequences */
00243     if (UNLIKELY(ansi_mode))
00244     {
00245         switch (c)
00246         {
00247         case ANSI_ESC_CLEARSCREEN:
00248             gfx_bitmapClear(bm);
00249             bm->penX = 0;
00250             bm->penY = 0;
00251             text_style(bm, 0, STYLEF_MASK);
00252             break;
00253         DB(default:
00254             kprintf("Unknown ANSI esc code: %x\n", c);)
00255         }
00256         ansi_mode = false;
00257     }
00258     else if (c == '\033')  /* Enter ANSI ESC mode */
00259     {
00260         ansi_mode = true;
00261     }
00262     else if (c == '\n')  /* Go one line down on a line-feed */
00263     {
00264         if (bm->penY + bm->font->height < bm->height)
00265         {
00266             bm->penY += bm->font->height;
00267             bm->penX = 0;
00268         }
00269     }
00270     else
00271     {
00272         text_putglyph(c, bm);
00273     }
00274     return c;
00275 }
00276
00277
00281 void text_clear(struct Bitmap *bmp)
00282 {
00283     text_putchar('\x1b', bmp);
00284     text_putchar('c', bmp);
00285 }
00286
00287
00288 void text_clearLine(struct Bitmap *bm, int line)
00289 {
00290     gfx_rectClear(bm, 0, line * bm->font->height, bm->width, (line + 1) * bm->font->height);
00291 }
00292
00293
00315 uint8_t text_style(struct Bitmap *bm, uint8_t flags, uint8_t mask)
00316 {
00317     uint8_t old = bm->styles;
00318     bm->styles = (bm->styles & ~mask) | flags;
00319     return old;
00320 }


BeRTOS: text.h File Reference

  • gfx
Defines | Functions
text.h File Reference
#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <cpu/attr.h>
#include <gfx/gfx.h>
#include <stdarg.h>

Go to the source code of this file.

Defines

#define | ANSI_ESC_CLEARSCREEN 'c'
Escape sequences codes.
Style flags
See also:
text_style()
#define | STYLEF_BOLD BV(0)
#define | STYLEF_ITALIC BV(1)
#define | STYLEF_UNDERLINE BV(2)
#define | STYLEF_INVERT BV(3)
#define | STYLEF_EXPANDED BV(4)
#define | STYLEF_CONDENSED BV(5)
#define | STYLEF_STRIKEOUT BV(6)
#define | STYLEF_TALL BV(7)
#define | STYLEF_MASK
Formatting flags for text rendering
See also:
text_xprintf()
#define | TEXT_NORMAL 0
Normal mode.
#define | TEXT_FILL BV(13)
Fill rest of line with spaces.
#define | TEXT_CENTER BV(14)
Center string in line.
#define | TEXT_RIGHT BV(15)
Right aligned.

Functions

void | text_moveTo (struct Bitmap *bm, int row, int col)
Move (imaginary) cursor to column and row specified.
void | text_setCoord (struct Bitmap *bm, int x, int y)
Move (imaginary) cursor to coordinates specified.
int | text_putchar (char c, struct Bitmap *bm)
Render char c, with (currently) limited ANSI escapes emulation support and '
' for newline.
uint8_t | text_style (struct Bitmap *bm, uint8_t flags, uint8_t mask)
Set/clear algorithmic font style bits.
void | text_clear (struct Bitmap *bm)
Clear the screen and reset cursor position.

Detailed Description

Definition in file text.h.


BeRTOS: text.h Source File

  • gfx
text.h
Go to the documentation of this file.
00001
00046 #ifndef GFX_TEXT_H
00047 #define GFX_TEXT_H
00048
00049 #include <cfg/compiler.h>
00050 #include <cfg/macros.h> /* BV() */
00051 #include <cpu/attr.h> /* CPU_HARVARD */
00052 #include <gfx/gfx.h> /* coord_t */
00053
00054 #include <stdarg.h>
00055
00061 #define STYLEF_BOLD        BV(0)
00062 #define STYLEF_ITALIC      BV(1)
00063 #define STYLEF_UNDERLINE   BV(2)
00064 #define STYLEF_INVERT      BV(3)
00065 #define STYLEF_EXPANDED    BV(4)
00066 #define STYLEF_CONDENSED   BV(5)
00067 #define STYLEF_STRIKEOUT   BV(6)  /*<! Not implemented */
00068 #define STYLEF_TALL        BV(7)  /*<! Not implemented */
00069
00070 #define STYLEF_MASK \
00071     (STYLEF_BOLD | STYLEF_ITALIC | STYLEF_UNDERLINE \
00072     | STYLEF_INVERT | STYLEF_EXPANDED | STYLEF_CONDENSED \
00073     | STYLEF_STRIKEOUT | STYLEF_TALL)
00074 /*\}*/
00075
00081 #define TEXT_NORMAL   0
00082 #define TEXT_FILL     BV(13)
00083 #define TEXT_CENTER   BV(14)
00084 #define TEXT_RIGHT    BV(15)
00085 /*\}*/
00086
00088 #define ANSI_ESC_CLEARSCREEN 'c'
00089
00090
00091 /* Fwd decl */
00092 struct Bitmap;
00093
00094 /* Low-level text functions (mware/text.c) */
00095 void text_moveTo(struct Bitmap *bm, int row, int col);
00096 void text_setCoord(struct Bitmap *bm, int x, int y);
00097 int text_putchar(char c, struct Bitmap *bm);
00098 uint8_t text_style(struct Bitmap *bm, uint8_t flags, uint8_t mask);
00099 void text_clear(struct Bitmap *bm);
00100 void text_clearLine(struct Bitmap *bm, int line);
00101
00102 /* Text formatting functions (mware/text_format.c) */
00103 int text_puts(const char *str, struct Bitmap *bm);
00104 int text_vprintf(struct Bitmap *bm, const char *fmt, va_list ap);
00105 int text_printf(struct Bitmap *bm, const char *fmt, ...) FORMAT(__printf__, 2, 3);
00106 int text_xyvprintf(struct Bitmap *bm, coord_t x, coord_t y, uint16_t mode, const char *fmt, va_list ap);
00107 int text_xyprintf(struct Bitmap *bm, coord_t x, coord_t col, uint16_t mode, const char *fmt, ...) FORMAT(__printf__, 5, 6);
00108 int text_xprintf(struct Bitmap *bm, uint8_t row, uint8_t col, uint16_t mode, const char *fmt, ...) FORMAT(__printf__, 5, 6);
00109 int text_vwidthf(struct Bitmap *bm, const char * fmt, va_list ap);
00110 int text_widthf(struct Bitmap *bm, const char * fmt, ...) FORMAT(__printf__, 2, 3);
00111
00112 /* Text formatting functions for program-memory strings (mware/text_format.c) */
00113 #if CPU_HARVARD
00114 #include <cpu/pgm.h>
00115 int text_puts_P(const char * PROGMEM str, struct Bitmap *bm);
00116 int text_vprintf_P(struct Bitmap *bm, const char * PROGMEM fmt, va_list ap);
00117 int text_printf_P(struct Bitmap *bm, const char * PROGMEM fmt, ...) FORMAT(__printf__, 2, 3);
00118 int text_xyvprintf_P(struct Bitmap *bm, coord_t x, coord_t y, uint16_t mode, const char *fmt, va_list ap);
00119 int text_xyprintf_P(struct Bitmap *bm, coord_t x, coord_t col, uint16_t mode, const char *fmt, ...) FORMAT(__printf__, 5, 6);
00120 int text_xprintf_P(struct Bitmap *bm, uint8_t row, uint8_t col, uint16_t mode, const char * PROGMEM fmt, ...) FORMAT(__printf__, 5, 6);
00121 int text_vwidthf_P(struct Bitmap *bm, const char * PROGMEM fmt, va_list ap);
00122 int text_widthf_P(struct Bitmap *bm, const char * PROGMEM fmt, ...);
00123 #endif /* CPU_HARVARD */
00124  //defgroup text
00126 #endif /* GFX_TEXT_H */


BeRTOS: text_format.c File Reference

  • gfx
Functions
text_format.c File Reference

printf-family routines for text output More...

#include "text.h"
#include <mware/formatwr.h>
#include <gfx/font.h>
#include <gfx/gfx.h>
#include <stdio.h>
#include <stdarg.h>
#include <string.h>

Go to the source code of this file.

Functions

int | text_puts (const char *PGM_ATTR str, struct Bitmap *bm)
Render string str in Bitmap bm at current cursor position.
int | text_vprintf (struct Bitmap *bm, const char *PGM_ATTR fmt, va_list ap)
vprintf()-like formatter to render text in a Bitmap.
int | text_printf (struct Bitmap *bm, const char *PGM_ATTR fmt,...)
printf()-like formatter to render text in a Bitmap.
int | text_xyvprintf (struct Bitmap *bm, coord_t x, coord_t y, uint16_t style, const char *PGM_ATTR fmt, va_list ap)
Render text with vprintf()-like formatting at a specified pixel position.
int | text_xyprintf (struct Bitmap *bm, coord_t x, coord_t y, uint16_t style, const char *PGM_ATTR fmt,...)
Render text with printf()-like formatting at a specified pixel position.
int | text_xprintf (struct Bitmap *bm, uint8_t row, uint8_t col, uint16_t style, const char *PGM_ATTR fmt,...)
Render text with printf()-like formatting at a specified row/column position.
static int | text_charWidth (int c, struct TextWidthData *twd)
Compute width in pixels of a character.
int | text_vwidthf (UNUSED_ARG(struct Bitmap *, bm), const char *PGM_ATTR fmt, va_list ap)
Return the width in pixels of a vprintf()-formatted string.
int | text_widthf (struct Bitmap *bm, const char *PGM_ATTR fmt,...)
Return the width in pixels of a printf()-formatted string.

Detailed Description

printf-family routines for text output

Author:
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>

Definition in file text_format.c.

Function Documentation

static int text_charWidth | ( | int | c,
 |  | struct TextWidthData * | twd
 | ) |  | [static]

Compute width in pixels of a character.

Compute the on screen width of a character, taking the current style and font into account.

The width is accumulated in the WidthData structure passed as second argument.

This is a formatted_write() callback used by text_vwidthf() to compute the length of a formatted string.

Definition at line 222 of file text_format.c.

int text_printf | ( | struct Bitmap * | bm,
 |  | const char *PGM_ATTR | fmt,
 |  |  | ...
 | ) |  |

printf()-like formatter to render text in a Bitmap.

Perform printf()-like formatting on the fmt format string. Render the resulting string in Bitmap bm starting at the current cursor position.

See also:
text_puts() text_putchar() text_vprintf()

Definition at line 99 of file text_format.c.

int text_puts | ( | const char *PGM_ATTR | str,
 |  | struct Bitmap * | bm
 | ) |  |

Render string str in Bitmap bm at current cursor position.

Note:
Text formatting functions are also available with an _P suffix accepting the source string from program memory. This feature is only available (and useful) on Harvard microprocessors such as the AVR.
See also:
text_putchar()

Definition at line 64 of file text_format.c.

int text_vprintf | ( | struct Bitmap * | bm,
 |  | const char *PGM_ATTR | fmt,
 |  | va_list | ap
 | ) |  |

vprintf()-like formatter to render text in a Bitmap.

Perform vprintf()-like formatting on the fmt format string using the variable-argument list ap. Render the resulting string in Bitmap bm starting at the current cursor position.

See also:
text_puts() text_putchar() text_printf()

Definition at line 85 of file text_format.c.

int text_xprintf | ( | struct Bitmap * | bm,
 |  | uint8_t | row,
 |  | uint8_t | col,
 |  | uint16_t | style,
 |  | const char *PGM_ATTR | fmt,
 |  |  | ...
 | ) |  |

Render text with printf()-like formatting at a specified row/column position.

See also:
text_xyprintf()

Definition at line 188 of file text_format.c.

int text_xyprintf | ( | struct Bitmap * | bm,
 |  | coord_t | x,
 |  | coord_t | y,
 |  | uint16_t | style,
 |  | const char *PGM_ATTR | fmt,
 |  |  | ...
 | ) |  |

Render text with printf()-like formatting at a specified pixel position.

Parameters:
bm | Bitmap where to render the text
x | [pixels] Initial X coordinate of text.
y | [pixels] Coordinate of top border of text.
style | Formatting style to use. In addition to any STYLEF_ flag, it can be TEXT_NORMAL, TEXT_FILL, TEXT_INVERT or TEXT_RIGHT, or a combination of these flags ORed together.
fmt | String possibly containing printf() formatting commands.
See also:
text_puts() text_putchar() text_printf() text_vprintf()
text_moveTo() text_style()

Definition at line 169 of file text_format.c.

int text_xyvprintf | ( | struct Bitmap * | bm,
 |  | coord_t | x,
 |  | coord_t | y,
 |  | uint16_t | style,
 |  | const char *PGM_ATTR | fmt,
 |  | va_list | ap
 | ) |  |

Render text with vprintf()-like formatting at a specified pixel position.

See also:
text_xyprintf()

Definition at line 116 of file text_format.c.


BeRTOS: text_format.c Source File

  • gfx
text_format.c
Go to the documentation of this file.
00001
00044 #include "text.h"
00045
00046 #include <mware/formatwr.h> /* _formatted_write() */
00047 #include <gfx/font.h>
00048 #include <gfx/gfx.h>
00049
00050 #include <stdio.h> /* vsprintf() */
00051 #include <stdarg.h>
00052 #include <string.h> /* strlen() */
00053
00064 int PGM_FUNC(text_puts)(const char * PGM_ATTR str, struct Bitmap *bm)
00065 {
00066     char c;
00067
00068     while ((c = PGM_READ_CHAR(str++)))
00069         text_putchar(c, bm);
00070
00071     return 0;
00072 }
00073
00074
00085 int PGM_FUNC(text_vprintf)(struct Bitmap *bm, const char * PGM_ATTR fmt, va_list ap)
00086 {
00087     return PGM_FUNC(_formatted_write)(fmt, (void (*)(char, void *))text_putchar, bm, ap);
00088 }
00089
00099 int PGM_FUNC(text_printf)(struct Bitmap *bm, const char * PGM_ATTR fmt, ...)
00100 {
00101     int len;
00102
00103     va_list ap;
00104     va_start(ap, fmt);
00105     len = PGM_FUNC(text_vprintf)(bm, fmt, ap);
00106     va_end(ap);
00107
00108     return len;
00109 }
00110
00116 int PGM_FUNC(text_xyvprintf)(struct Bitmap *bm,
00117         coord_t x, coord_t y, uint16_t style, const char * PGM_ATTR fmt, va_list ap)
00118 {
00119     int len;
00120     uint8_t oldstyle = 0;
00121
00122     text_setCoord(bm, x, y);
00123
00124     if (style & STYLEF_MASK)
00125         oldstyle = text_style(bm, style, STYLEF_MASK);
00126
00127     if (style & (TEXT_CENTER | TEXT_RIGHT))
00128     {
00129         uint8_t pad = bm->width - PGM_FUNC(text_vwidthf)(bm, fmt, ap);
00130
00131         if (style & TEXT_CENTER)
00132             pad /= 2;
00133
00134         if (style & TEXT_FILL)
00135             gfx_rectFillC(bm, 0, y, pad, y + bm->font->height,
00136                 (style & STYLEF_INVERT) ? 0xFF : 0x00);
00137
00138         text_setCoord(bm, pad, y);
00139     }
00140
00141     len = PGM_FUNC(text_vprintf)(bm, fmt, ap);
00142
00143     if (style & TEXT_FILL)
00144         gfx_rectFillC(bm, bm->penX, y, bm->width, y + bm->font->height,
00145             (style & STYLEF_INVERT) ? 0xFF : 0x00);
00146
00147     /* Restore old style */
00148     if (style & STYLEF_MASK)
00149         text_style(bm, oldstyle, STYLEF_MASK);
00150
00151     return len;
00152 }
00153
00154
00169 int PGM_FUNC(text_xyprintf)(struct Bitmap *bm,
00170         coord_t x, coord_t y, uint16_t style, const char * PGM_ATTR fmt, ...)
00171 {
00172     int len;
00173     va_list ap;
00174
00175     va_start(ap, fmt);
00176     len = PGM_FUNC(text_xyvprintf)(bm, x, y, style, fmt, ap);
00177     va_end(ap);
00178
00179     return len;
00180 }
00181
00182
00188 int PGM_FUNC(text_xprintf)(struct Bitmap *bm,
00189         uint8_t row, uint8_t col, uint16_t style, const char * PGM_ATTR fmt, ...)
00190 {
00191     int len;
00192     va_list ap;
00193
00194     va_start(ap, fmt);
00195     len = PGM_FUNC(text_xyvprintf)(
00196             bm, col * bm->font->width, row * bm->font->height,
00197             style, fmt, ap);
00198     va_end(ap);
00199
00200     return len;
00201 }
00202
00203
00204 struct TextWidthData
00205 {
00206     Bitmap *bitmap;
00207     coord_t width;
00208 };
00209
00222 static int text_charWidth(int c, struct TextWidthData *twd)
00223 {
00224     unsigned char index = (unsigned char)c;
00225     Bitmap *bm = twd->bitmap;
00226     coord_t glyph_width;
00227
00228
00229     if (UNLIKELY(!FONT_HAS_GLYPH(bm->font, index)))
00230     {
00231         if (!FONT_HAS_GLYPH(bm->font, '?'))
00232             index = '?';
00233         else
00234             index = bm->font->first;
00235     }
00236
00237     /* Make character relative to font start */
00238     index -= bm->font->first;
00239
00240     if (bm->font->offset)
00241         /* Proportional font */
00242         glyph_width = bm->font->widths[index]; /* TODO: optimize away */
00243     else
00244         /* Fixed width font */
00245         glyph_width = bm->font->width;
00246
00247     if (bm->styles & STYLEF_CONDENSED)
00248         --glyph_width;
00249
00250     if (bm->styles & STYLEF_EXPANDED)
00251         glyph_width *= 2;
00252
00253     twd->width += glyph_width;
00254
00255     return c;
00256 }
00257
00261 int PGM_FUNC(text_vwidthf)(
00262     UNUSED_ARG(struct Bitmap *, bm),
00263     const char * PGM_ATTR fmt,
00264     va_list ap)
00265 {
00266     /* Fixed font with no styles affecting the width? */
00267     if (!bm->font->offset && !(bm->styles & (STYLEF_CONDENSED | STYLEF_EXPANDED)))
00268         return PGM_FUNC(vsprintf)(NULL, fmt, ap) * bm->font->width;
00269     else
00270     {
00271         struct TextWidthData twd;
00272         twd.bitmap = bm;
00273         twd.width = 0;
00274         _formatted_write(fmt, (void (*)(char, void *))text_charWidth, &twd, ap);
00275         return twd.width;
00276     }
00277 }
00278
00279
00283 int PGM_FUNC(text_widthf)(struct Bitmap *bm, const char * PGM_ATTR fmt, ...)
00284 {
00285     int width;
00286
00287     va_list ap;
00288     va_start(ap, fmt);
00289     width = PGM_FUNC(text_vwidthf)(bm, fmt, ap);
00290     va_end(ap);
00291
00292     return width;
00293 }


BeRTOS: tftp.c File Reference

  • net
Functions
tftp.c File Reference

TFTP protocol implementation. More...

#include "tftp.h"
#include "cfg/cfg_tftp.h"
#include <cfg/log.h>
#include <lwip/inet.h>
#include <lwip/sockets.h>
#include <string.h>

Go to the source code of this file.

Functions

KFile * | tftp_listen (TftpSession *ctx, char *filename, size_t len, TftpOpenMode *mode)
Listen for incoming tftp sessions.
int | tftp_init (TftpSession *ctx, unsigned short port, mtime_t timeout)
Init a server session.

Detailed Description

TFTP protocol implementation.

Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file tftp.c.

Function Documentation

int tftp_init | ( | TftpSession * | ctx,
 |  | unsigned short | port,
 |  | mtime_t | timeout
 | ) |  |

Init a server session.

Create a IPv4 session on all addresses and port port.

Parameters:
ctx | Context to be initialized as server
port | Port to listen incoming connections
timeout | Timeout to be used for tftp connections
Returns:
0 if successful, -1 otherwise

Definition at line 296 of file tftp.c.

KFile* tftp_listen | ( | TftpSession * | ctx,
 |  | char * | filename,
 |  | size_t | len,
 |  | TftpOpenMode * | mode
 | ) |  |

Listen for incoming tftp sessions.

Note:
Only write requests are accepted.
Parameters:
ctx | Initialized TftpChannel
filename | String to be filled with file name to be written
len | Length of the filename
mode | Open mode for the returned KFile
Returns:
KFile pointer to read from

Definition at line 247 of file tftp.c.


BeRTOS: tftp.c Source File

  • net
tftp.c
Go to the documentation of this file.
00001
00040 #include "tftp.h"
00041 #include "cfg/cfg_tftp.h"
00042 #define LOG_LEVEL   TFTP_LOG_LEVEL
00043 #define LOG_FORMAT  TFTP_LOG_FORMAT
00044 #include <cfg/log.h>
00045
00046 //#include <lwip/in.h>
00047 #include <lwip/inet.h>
00048 #include <lwip/sockets.h>
00049 #include <string.h> //memset
00050
00051 #define TFTP_PACKET_SIZE 516
00052
00053 #define DECLARE_TIMEOUT(name, timeout) \
00054     struct timeval name; \
00055     name.tv_sec = timeout / 1000; \
00056     name.tv_usec = (timeout % 1000) * 1000;
00057
00058 #define KFT_TFTPSESSION MAKE_ID('T', 'F', 'T', 'P')
00059 INLINE TftpSession *TFTP_CAST(KFile *fd)
00060 {
00061     ASSERT(fd->_type == KFT_TFTPSESSION);
00062     return (TftpSession *)containerof(fd, TftpSession, kfile_request);
00063 }
00064
00065 /*
00066  * Check if received data is correct and send ACK if ok.
00067  */
00068 static int checkPacket(TftpSession *ctx, const Tftpframe *frame)
00069 {
00070     LOG_INFO("Checking block %hd\n", ctx->block);
00071     if (ntohs(frame->hdr.opcode) != TFTP_DATA)
00072     {
00073         LOG_INFO("Opcode != TFTP_DATA (%hd != %d)\n", ntohs(frame->hdr.opcode), TFTP_DATA);
00074         return -1;
00075     }
00076     if (ntohs(frame->hdr.th_u.block) != ctx->block + 1)
00077         return -1;
00078
00079     ctx->block++;
00080     // if everything was ok, send ACK
00081     // ACK is already in network order
00082     struct ackframe ack;
00083     ack.opcode = TFTP_ACK;
00084     ack.block_num = htons(ctx->block);
00085     ssize_t rc = lwip_sendto(ctx->sock, &ack, 4, 0, (struct sockaddr *)&ctx->addr, ctx->addr_len);
00086     if (rc == 4)
00087         return rc;
00088     else
00089         return -1;
00090 }
00091
00092 /*
00093  * Return >0 if there's something to read in ctx, 0 on timeout, -1 on errors
00094  */
00095 static int tftp_waitEvent(TftpSession *ctx, struct timeval *timeout)
00096 {
00097     fd_set inset;
00098     FD_ZERO(&inset);
00099     FD_SET(ctx->sock, &inset);
00100     struct timeval tmp = *timeout;
00101     return lwip_select(ctx->sock + 1, &inset, NULL, NULL, &tmp);
00102 }
00103
00104 /*
00105  * Read a block from TFTP.
00106  * \param size Must be exactly 516 bytes
00107  * \param timeout Time to wait the network connection, may be NULL to wait forever
00108  * \return Number of bytes read if success, TFTP_ERR_TIMEOUT on timeout, TFTP_ERR otherwise
00109  */
00110 static ssize_t tftp_readPacket(TftpSession *ctx, Tftpframe *frame, mtime_t timeout)
00111 {
00112     DECLARE_TIMEOUT(wait_tm, timeout);
00113
00114     int res = tftp_waitEvent(ctx, &wait_tm);
00115     if (res == 0)
00116         return TFTP_ERR_TIMEOUT;
00117     if (res == -1)
00118         return TFTP_ERR;
00119
00120     ssize_t rlen = lwip_recvfrom(ctx->sock, frame, sizeof(Tftpframe), 0, NULL, NULL);
00121     LOG_INFO("Received %zd bytes\n", rlen);
00122     if (rlen > 0 && (checkPacket(ctx, frame) > 0))
00123         return rlen;
00124     else
00125         return TFTP_ERR;
00126 }
00127
00128 static size_t tftp_read(struct KFile *fd, void *buf, size_t size)
00129 {
00130     TftpSession *fds = TFTP_CAST(fd);
00131     uint8_t *_buf = (uint8_t *) buf;
00132     size_t read_bytes = 0;
00133     size_t offset = fds->valid_data - fds->bytes_available;
00134
00135     if (fds->pending_ack)
00136     {
00137         ASSERT(fds->block == 0);
00138         struct ackframe ack;
00139         ack.opcode = TFTP_ACK;
00140         ack.block_num = fds->block;
00141         lwip_sendto(fds->sock, &ack, 4, 0, (struct sockaddr *)&fds->addr, fds->addr_len);
00142         fds->pending_ack = false;
00143     }
00144
00145     if (fds->bytes_available < size)
00146     {
00147         /* check if we were called again after an error */
00148         if (fds->bytes_available > 0)
00149         {
00150             memcpy(_buf, fds->frame.data + offset, fds->bytes_available);
00151             LOG_INFO("ba < size. Copied %zd bytes from offset %zd\n", fds->bytes_available, offset);
00152             /* adjust buf and size */
00153             _buf += fds->bytes_available;
00154             size -= fds->bytes_available;
00155             read_bytes += fds->bytes_available;
00156         }
00157
00158         if (!fds->is_xfer_end)
00159         {
00160             LOG_INFO("Waiting for new TFTP packet\n");
00161             /* get more data, we can wait since the function is blocking */
00162             ssize_t rd = tftp_readPacket(fds, &fds->frame, fds->timeout);
00163             if (rd < 0)
00164             {
00165                 fds->bytes_available = 0;
00166                 fds->error = rd;
00167                 return 0;
00168             }
00169             else
00170             {
00171                 if (rd < TFTP_PACKET_SIZE)
00172                 {
00173                     fds->is_xfer_end = true;
00174                     LOG_INFO("Received the last packet\n");
00175                 }
00176                 fds->bytes_available = (size_t)rd - sizeof(struct TftpHeader);
00177                 fds->valid_data = fds->bytes_available;
00178                 offset = 0;
00179             }
00180         }
00181         else
00182         {
00183             LOG_INFO("Transfer finished\n");
00184             fds->bytes_available -= fds->bytes_available;
00185             fds->valid_data = 0;
00186             return read_bytes;
00187         }
00188     }
00189
00190     /* check how many bytes we need to copy */
00191     size_t res = MIN(fds->bytes_available, size);
00192     LOG_INFO("Copying %zd bytes from offset %zd\n", res, offset);
00193     memcpy(_buf, fds->frame.data + offset, res);
00194     fds->bytes_available -= res;
00195     read_bytes += res;
00196     return read_bytes;
00197 }
00198
00199 static int tftp_error(struct KFile *fd)
00200 {
00201     TftpSession *fds = TFTP_CAST(fd);
00202     return fds->error;
00203 }
00204
00205 static void tftp_clearerr(struct KFile *fd)
00206 {
00207     TftpSession *fds = TFTP_CAST(fd);
00208     fds->error = 0;
00209 }
00210
00211 static int tftp_close(struct KFile *fd)
00212 {
00213     TftpSession *fds = TFTP_CAST(fd);
00214     struct errframe err;
00215     if (fds->pending_ack)
00216     {
00217         err.opcode = TFTP_PROTOERR;
00218         err.errcode = TFTP_PROTOERR_ACCESS_VIOLATION;
00219         err.str = '\0';
00220         lwip_sendto(fds->sock, &err, 5, 0, (struct sockaddr *)&fds->addr, fds->addr_len);
00221         LOG_INFO("Closed connection upon user request\n");
00222     }
00223     return 0;
00224 }
00225
00226 static void resetTftpState(TftpSession *ctx)
00227 {
00228     ctx->block = 0;
00229     ctx->error = 0;
00230     ctx->bytes_available = 0;
00231     ctx->valid_data = 0;
00232     ctx->is_xfer_end = false;
00233     ctx->pending_ack = false;
00234 }
00235
00247 KFile *tftp_listen(TftpSession *ctx, char *filename, size_t len, TftpOpenMode *mode)
00248 {
00249     DECLARE_TIMEOUT(wait_tm, ctx->timeout);
00250     resetTftpState(ctx);
00251
00252     int res = tftp_waitEvent(ctx, &wait_tm);
00253     if (res == 0)
00254     {
00255         ctx->error = TFTP_ERR_TIMEOUT;
00256         return NULL;
00257     }
00258     if (res == -1)
00259     {
00260         ctx->error = TFTP_ERR;
00261         return NULL;
00262     }
00263
00264     // listen onto TFTP port
00265     ctx->addr_len = sizeof(ctx->addr);
00266     ssize_t rd = 0;
00267     if ((rd = lwip_recvfrom(ctx->sock, &ctx->frame, sizeof(Tftpframe), 0, (struct sockaddr *)&ctx->addr, &ctx->addr_len)) > 0)
00268     {
00269         // check if the packet is WRQ, otherwise discard the packet
00270         if (ctx->frame.hdr.opcode == TFTP_WRQ)
00271         {
00272             *mode = TFTP_WRITE;
00273             ctx->pending_ack = true;
00274             strncpy(filename, (char *)&ctx->frame.hdr.th_u, len);
00275             filename[len - 1] = '\0';
00276             ctx->error = 0;
00277             return &ctx->kfile_request;
00278         }
00279         else
00280             *mode = TFTP_READ;
00281     }
00282     ctx->error = TFTP_ERR;
00283     return NULL;
00284 }
00285
00296 int tftp_init(TftpSession *ctx, unsigned short port, mtime_t timeout)
00297 {
00298     DB(ctx->kfile_request._type = KFT_TFTPSESSION);
00299     ctx->kfile_request.read = tftp_read;
00300     ctx->kfile_request.error = tftp_error;
00301     ctx->kfile_request.clearerr = tftp_clearerr;
00302     ctx->kfile_request.close = tftp_close;
00303     resetTftpState(ctx);
00304
00305     /* Unused kfile methods */
00306     ctx->kfile_request.seek = NULL;
00307     ctx->kfile_request.write = NULL;
00308     ctx->kfile_request.flush = NULL;
00309     ctx->kfile_request.reopen = NULL;
00310
00311     struct sockaddr_in sa;
00312     sa.sin_family = AF_INET;
00313         sa.sin_addr.s_addr = htonl(INADDR_ANY);
00314         sa.sin_port = htons(port);
00315     ctx->timeout = timeout;
00316
00317     ctx->sock = lwip_socket(AF_INET, SOCK_DGRAM, 0);
00318     if (ctx->sock == -1)
00319     {
00320         LOG_INFO("TFTP socket error\n");
00321         return -1;
00322     }
00323
00324     if(lwip_bind(ctx->sock, (struct sockaddr *)&sa, sizeof(sa)))
00325     {
00326         LOG_INFO("Error binding socket\n");
00327         return -1;
00328     }
00329     return 0;
00330 }
00331


BeRTOS: tftp.h File Reference

  • net
Functions
tftp.h File Reference

TFTP protocol implementation. More...

#include <cfg/compiler.h>
#include <lwip/sockets.h>
#include <io/kfile.h>

Go to the source code of this file.

Functions

int | tftp_init (TftpSession *ctx, unsigned short port, mtime_t timeout)
Init a server session.
KFile * | tftp_listen (TftpSession *ctx, char *filename, size_t len, TftpOpenMode *mode)
Listen for incoming tftp sessions.

Detailed Description

TFTP protocol implementation.

This module implements a TFTP server with a handy KFile interface. The call to tftp_listen() will block until a client tries to connect, then it returns a KFile. If you want to accept the transfer, start reading from the handle and the transfer will continue. Otherwise, don't access it and immediately call kfile_close(). Close the KFile when you're done.

The usage pattern is as follows:

 // initialize a TFTP session
 tftp_init();
 // start listening for connections
 KFile *f = tftp_listen();
 // now you can check the returned file name
 // and change behaviour at runtime
 if (!strcmp(filename, "firmware.bin"))
     // do something
 else if (!strcmp(filename, "conf.ini"))
     // update the configuration
 kfile_close(f);
Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file tftp.h.

Function Documentation

int tftp_init | ( | TftpSession * | ctx,
 |  | unsigned short | port,
 |  | mtime_t | timeout
 | ) |  |

Init a server session.

Create a IPv4 session on all addresses and port port.

Parameters:
ctx | Context to be initialized as server
port | Port to listen incoming connections
timeout | Timeout to be used for tftp connections
Returns:
0 if successful, -1 otherwise

Definition at line 296 of file tftp.c.

KFile* tftp_listen | ( | TftpSession * | ctx,
 |  | char * | filename,
 |  | size_t | len,
 |  | TftpOpenMode * | mode
 | ) |  |

Listen for incoming tftp sessions.

Note:
Only write requests are accepted.
Parameters:
ctx | Initialized TftpChannel
filename | String to be filled with file name to be written
len | Length of the filename
mode | Open mode for the returned KFile
Returns:
KFile pointer to read from

Definition at line 247 of file tftp.c.


BeRTOS: tftp.h Source File

  • net
tftp.h
Go to the documentation of this file.
00001
00066 #ifndef TFTP_H
00067 #define TFTP_H
00068
00069 #include <cfg/compiler.h>
00070 #include <lwip/sockets.h> // sockaddr_in, socklen_t
00071 #include <io/kfile.h>
00072
00073 #define TFTP_RRQ     0x0100     /* TFTP read request packet (already in net endianess). */
00074 #define TFTP_WRQ     0x0200     /* TFTP write request packet (already in net endianess). */
00075 #define TFTP_DATA    03         /* TFTP data packet. */
00076 #define TFTP_ACK     0x0400     /* TFTP acknowledgement packet (already in net endianess). */
00077 #define TFTP_PROTOERR     0x0500     /* TFTP acknowledgement packet (already in net endianess). */
00078
00079 /* TFTP protocol error codes */
00080 #define TFTP_PROTOERR_ACCESS_VIOLATION 0x0200
00081
00082 #define TFTP_SERVER_PORT 69
00083
00084 /* Return error codes */
00085 #define TFTP_ERR_TIMEOUT -2
00086 #define TFTP_ERR         -1
00087
00088 struct PACKED TftpHeader
00089 {
00090     short opcode;
00091     union PACKED
00092     {
00093         short block;         /* block # */
00094         short code;          /* error code */
00095         char stuff[1];       /* request packet stuff */
00096     } th_u;
00097 };
00098
00099 typedef struct PACKED Tftpframe {
00100     struct TftpHeader hdr;
00101     char data[512];          /* data or error string */
00102 } Tftpframe;
00103
00104 struct PACKED ackframe
00105 {
00106     short opcode;
00107     short block_num;
00108 };
00109
00110 struct PACKED errframe
00111 {
00112     short opcode;
00113     short errcode;
00114     char str;
00115 };
00116
00117 typedef enum
00118 {
00119     TFTP_READ,
00120     TFTP_WRITE,
00121 } TftpOpenMode;
00122
00123 typedef struct TftpSession
00124 {
00125     struct sockaddr_in addr;
00126     socklen_t addr_len;
00127     int sock;
00128     unsigned short block;
00129     mtime_t timeout;
00130     int error;
00131     Tftpframe frame;
00132     size_t bytes_available;
00133     size_t valid_data;
00134     bool is_xfer_end;
00135     bool pending_ack;
00136     KFile kfile_request;
00137 } TftpSession;
00138
00139 int tftp_init(TftpSession *ctx, unsigned short port, mtime_t timeout);
00140 KFile *tftp_listen(TftpSession *ctx, char *filename, size_t len, TftpOpenMode *mode);
00141
00142 #endif // TFTP_H


BeRTOS: thermo.c File Reference

  • drv
Functions | Variables
thermo.c File Reference

Thermo-control driver. More...

#include "hw/thermo_map.h"
#include "hw/hw_thermo.h"
#include "cfg/cfg_thermo.h"
#include <cfg/module.h>
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <cfg/log.h>
#include <drv/thermo.h>
#include <drv/timer.h>
#include <drv/ntc.h>
#include <kern/proc.h>

Go to the source code of this file.

Functions

thermostatus_t | thermo_status (ThermoDev dev)
Return the status of the specific dev thermo-device.
static void | thermo_do (ThermoDev index)
Do a single thermo control for device dev.
static void | thermo_softint (void)
Thermo soft interrupt.
void | thermo_timer (ThermoDev dev, mtime_t on_time)
Starts a thermo-regulation for channel dev, and turn off timer when on_time was elapsed.
void | thermo_setTarget (ThermoDev dev, deg_t temperature)
Set the target temperature temperature for a specific dev thermo-device.
void | thermo_start (ThermoDev dev)
Starts a thermo-regulation for channel dev.
void | thermo_stop (ThermoDev dev)
Stops a thermo-regulation for channel dev.
void | thermo_clearErrors (ThermoDev dev)
Clear errors for channel dev.
deg_t | thermo_readTemperature (ThermoDev dev)
Read the temperature of the thermo-device dev using mobile mean.
void | thermo_init (void)
Init thermo-control and associated hw.

Variables

static Timer | thermo_timer
Timer for thermo-regulation.
ThermoControlDev | devs [THERMO_CNT]
Array of thermo-devices.

Detailed Description

Thermo-control driver.

The Thermo controll can works both with kernel or without it. In the case we use kernel, the thermo controll is done by one process that poll every CONFIG_THERMO_INTERVAL_MS the temperature sensor and make all operation to follow the target temperature. While we not use the kernel the module works with one timer interrupt in the same way of the kenel case.

Author:
Giovanni Bajo <rasky@develer.com>
Francesco Sacchi <batt@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file thermo.c.

Function Documentation

deg_t thermo_readTemperature ( ThermoDev dev )

Read the temperature of the thermo-device dev using mobile mean.

Return the current temperature of a device currently under thermo control.

Definition at line 292 of file thermo.c.

void thermo_setTarget | ( | ThermoDev | dev,
 |  | deg_t | temperature
 | ) |  |

Set the target temperature temperature for a specific dev thermo-device.

Set the target temperature at which a given device should be kept.

Definition at line 235 of file thermo.c.

void thermo_start ( ThermoDev dev )

Starts a thermo-regulation for channel dev.

Start thermo control for a certain device dev.

Definition at line 247 of file thermo.c.

thermostatus_t thermo_status ( ThermoDev dev )

Return the status of the specific dev thermo-device.

Definition at line 103 of file thermo.c.

void thermo_stop ( ThermoDev dev )

Stops a thermo-regulation for channel dev.

Stop thermo control for a certain device dev.

Definition at line 270 of file thermo.c.

void thermo_timer | ( | ThermoDev | dev,
 |  | mtime_t | on_time
 | ) |  |

Starts a thermo-regulation for channel dev, and turn off timer when on_time was elapsed.

Start thermo control for a certain device dev and stop it after on_time msec.

Definition at line 223 of file thermo.c.

Variable Documentation

ThermoControlDev devs[THERMO_CNT]

Array of thermo-devices.

Definition at line 98 of file thermo.c.

Timer thermo_timer [static]

Timer for thermo-regulation.

Definition at line 84 of file thermo.c.


BeRTOS: thermo.c Source File

  • drv
thermo.c
Go to the documentation of this file.
00001
00047 #include "hw/thermo_map.h"
00048 #include "hw/hw_thermo.h"
00049
00050 #include "cfg/cfg_thermo.h"
00051
00052 #include <cfg/module.h>
00053 #include <cfg/macros.h>
00054 #include <cfg/debug.h>
00055 // Define logging setting (for cfg/log.h module).
00056 #define LOG_LEVEL         CONFIG_THERMO_LOG_LEVEL
00057 #define LOG_VERBOSITY     CONFIG_THERMO_LOG_FORMAT
00058 #include <cfg/log.h>
00059
00060 #include <drv/thermo.h>
00061 #include <drv/timer.h>
00062 #include <drv/ntc.h>
00063
00064 #include <kern/proc.h>
00065
00066 #define THERMO_OFF          0
00067 #define THERMO_HEATING      BV(0)
00068 #define THERMO_FREEZING     BV(1)
00069 #define THERMO_TGT_REACH    BV(2)
00070 #define THERMOERRF_NTCSHORT BV(3)
00071 #define THERMOERRF_NTCOPEN  BV(4)
00072 #define THERMOERRF_TIMEOUT  BV(5)
00073 #define THERMO_ACTIVE       BV(6)
00074 #define THERMO_TIMER        BV(7)
00075
00076 #define THERMO_ERRMASK      (THERMOERRF_NTCSHORT | THERMOERRF_NTCOPEN | THERMOERRF_TIMEOUT)
00077
00078
00079 #if CONFIG_KERN
00080
00081     static PROC_DEFINE_STACK(thermo_poll_stack, 400);
00082 #else
00083
00084     static Timer thermo_timer;
00085 #endif
00086
00087 typedef struct ThermoControlDev
00088 {
00089     deg_t          hifi_samples[CONFIG_THERMO_HIFI_NUM_SAMPLES];
00090     deg_t          cur_hifi_sample;
00091     deg_t          target;
00092     thermostatus_t status;
00093     ticks_t        expire;
00094     ticks_t        on_time;
00095 } ThermoControlDev;
00096
00098 ThermoControlDev devs[THERMO_CNT];
00099
00103 thermostatus_t thermo_status(ThermoDev dev)
00104 {
00105     ASSERT(dev < THERMO_CNT);
00106     return devs[dev].status;
00107 }
00108
00109
00113 static void thermo_do(ThermoDev index)
00114 {
00115     ThermoControlDev* dev = &devs[index];
00116     deg_t cur_temp;
00117     deg_t tolerance = thermo_hw_tolerance(index);
00118
00119     cur_temp = thermo_hw_read(index);
00120
00121     // Store the sample into the hifi FIFO buffer for later interpolation
00122     dev->hifi_samples[dev->cur_hifi_sample] = cur_temp;
00123     if (++dev->cur_hifi_sample == CONFIG_THERMO_HIFI_NUM_SAMPLES)
00124         dev->cur_hifi_sample = 0;
00125
00126     cur_temp = thermo_readTemperature(index);
00127
00128     if (cur_temp == NTC_SHORT_CIRCUIT || cur_temp == NTC_OPEN_CIRCUIT)
00129     {
00130         if (cur_temp == NTC_SHORT_CIRCUIT)
00131         {
00132             LOG_INFOB(if (!(dev->status & THERMOERRF_NTCSHORT))
00133                 LOG_INFO("dev[%d], thermo_do: NTC_SHORT\n",index););
00134
00135             dev->status |= THERMOERRF_NTCSHORT;
00136         }
00137         else
00138         {
00139
00140             LOG_INFOB(if (!(dev->status & THERMOERRF_NTCOPEN))
00141                 LOG_INFO("dev[%d], thermo_do: NTC_OPEN\n", index););
00142
00143             dev->status |= THERMOERRF_NTCOPEN;
00144         }
00145
00146         /* Reset timeout when there is an ntc error */
00147         dev->expire = thermo_hw_timeout(index) + timer_clock();
00148         thermo_hw_off(index);
00149         return;
00150     }
00151     dev->status &= ~(THERMOERRF_NTCOPEN | THERMOERRF_NTCSHORT);
00152
00153     if ((cur_temp < dev->target - tolerance) || (cur_temp > dev->target + tolerance))
00154     {
00155         dev->status &= ~THERMO_TGT_REACH;
00156
00157         /* Check for timeout */
00158         if (timer_clock() - dev->expire > 0)
00159         {
00160             dev->status |= THERMOERRF_TIMEOUT;
00161             LOG_INFO("dev[%d], thermo_do: TIMEOUT\n", index);
00162         }
00163     }
00164     else /* In target */
00165     {
00166         /* Clear errors */
00167         dev->status &= ~THERMO_ERRMASK;
00168         dev->status |= THERMO_TGT_REACH;
00169
00170         /* Reset timeout in case we go out of target in the future */
00171         dev->expire = thermo_hw_timeout(index) + timer_clock();
00172     }
00173
00174     if (cur_temp < dev->target)
00175         dev->status = (dev->status | THERMO_HEATING) & ~THERMO_FREEZING;
00176     else
00177         dev->status = (dev->status & ~THERMO_HEATING) | THERMO_FREEZING;
00178
00179     thermo_hw_set(index, dev->target, cur_temp);
00180
00181 }
00182
00183 static void poll(void)
00184 {
00185     for (int i = 0; i < THERMO_CNT; ++i)
00186         if (devs[i].status & THERMO_ACTIVE)
00187         {
00188             LOG_INFO("THERMO [%d] on_time[%ld],\n", i, ticks_to_ms(devs[i].on_time));
00189             if ((devs[i].status & THERMO_TIMER) && (devs[i].on_time - timer_clock() < 0))
00190             {
00191                 thermo_stop(i);
00192                 continue;
00193             }
00194
00195             thermo_do((ThermoDev)i);
00196         }
00197 }
00198
00199 #if CONFIG_KERN
00200     static void NORETURN thermo_poll(void)
00201     {
00202         for (;;)
00203         {
00204             poll();
00205             timer_delay(CONFIG_THERMO_INTERVAL_MS);
00206         }
00207     }
00208 #else
00209
00212     static void thermo_softint(void)
00213     {
00214         poll();
00215         timer_add(&thermo_timer);
00216     }
00217 #endif
00218
00223 void thermo_timer(ThermoDev dev, mtime_t on_time)
00224 {
00225     ASSERT(dev < THERMO_CNT);
00226     devs[dev].on_time = timer_clock() + ms_to_ticks(on_time);
00227     devs[dev].status |= THERMO_TIMER;
00228     thermo_start(dev);
00229 }
00230
00231
00235 void thermo_setTarget(ThermoDev dev, deg_t temperature)
00236 {
00237     ASSERT(dev < THERMO_CNT);
00238     devs[dev].target = temperature;
00239     devs[dev].expire = timer_clock() + thermo_hw_timeout(dev);
00240
00241     LOG_INFO("THERMO Set Target dev[%d], T[%d.%d]\n", dev, temperature / 10, temperature % 10);
00242 }
00243
00247 void thermo_start(ThermoDev dev)
00248 {
00249     int i;
00250     deg_t temp;
00251
00252     ASSERT(dev < THERMO_CNT);
00253
00254     devs[dev].status |= THERMO_ACTIVE;
00255     LOG_INFO("THERMO Start dev[%d], status[%04x]\n", dev, devs[dev].status);
00256
00257     /* Initialize the hifi FIFO with a constant value (the current temperature) */
00258     temp = thermo_hw_read(dev);
00259     for (i = 0; i < CONFIG_THERMO_HIFI_NUM_SAMPLES; ++i)
00260         devs[dev].hifi_samples[i] = temp;
00261     devs[dev].cur_hifi_sample = 0;
00262
00263     /* Reset timeout */
00264     devs[dev].expire = timer_clock() + thermo_hw_timeout(dev);
00265 }
00266
00270 void thermo_stop(ThermoDev dev)
00271 {
00272     ASSERT(dev < THERMO_CNT);
00273
00274     devs[dev].status &= ~THERMO_ACTIVE;
00275     thermo_hw_off(dev);
00276 }
00277
00278
00282 void thermo_clearErrors(ThermoDev dev)
00283 {
00284     ASSERT(dev < THERMO_CNT);
00285     devs[dev].status &= ~(THERMO_ERRMASK);
00286 }
00287
00288
00292 deg_t thermo_readTemperature(ThermoDev dev)
00293 {
00294     int i;
00295     long accum = 0;
00296
00297     MOD_CHECK(thermo);
00298
00299     for (i = 0; i < CONFIG_THERMO_HIFI_NUM_SAMPLES; i++)
00300         accum += devs[dev].hifi_samples[i];
00301
00302     return (deg_t)(accum / CONFIG_THERMO_HIFI_NUM_SAMPLES);
00303 }
00304
00305 MOD_DEFINE(thermo)
00306
00307
00310 void thermo_init(void)
00311 {
00312     THERMO_HW_INIT;
00313
00314     /* Set all status to off */
00315     for (int i = 0; i < THERMO_CNT; i++)
00316         devs[i].status = THERMO_OFF;
00317
00318     MOD_INIT(thermo);
00319
00320     #if CONFIG_KERN
00321         proc_new_with_name("Thermo", thermo_poll, NULL, sizeof(thermo_poll_stack), thermo_poll_stack);
00322     #else
00323         timer_setDelay(&thermo_timer, ms_to_ticks(CONFIG_THERMO_INTERVAL_MS));
00324         timer_setSoftint(&thermo_timer, (Hook)thermo_softint, 0);
00325         timer_add(&thermo_timer);
00326     #endif
00327 }


BeRTOS: thermo.h File Reference

  • drv
Functions
thermo.h File Reference

Thermo-control driver. More...

#include "hw/thermo_map.h"
#include <drv/ntc.h>
#include <drv/timer.h>

Go to the source code of this file.

Functions

void | thermo_setTarget (ThermoDev dev, deg_t temperature)
Set the target temperature at which a given device should be kept.
void | thermo_timer (ThermoDev dev, mtime_t on_time)
Start thermo control for a certain device dev and stop it after on_time msec.
void | thermo_start (ThermoDev dev)
Start thermo control for a certain device dev.
void | thermo_stop (ThermoDev dev)
Stop thermo control for a certain device dev.
void | thermo_clearErrors (ThermoDev dev)
Clear errors for channel dev.
thermostatus_t | thermo_status (ThermoDev dev)
Return the status of the specific dev thermo-device.
deg_t | thermo_readTemperature (ThermoDev dev)
Return the current temperature of a device currently under thermo control.
void | thermo_init (void)
Init thermo-control and associated hw.

Detailed Description

Thermo-control driver.

This module implements multiple thermo controls, which is the logic needed to try keeping the temperature of a device constant. For this module, a "device" is a black box whose temperature can be measured, and which has a mean to make it hotter or colder. For instance, a device could be the combination of a NTC (analog temperature reader) and a Peltier connected to the same physic block.

This module relies on a low-level driver to communicate with the device (implementation of the black box). This low-level driver also controls the units in which the temperature is expressed: thermo control treats it just as a number.

Author:
Giovanni Bajo <rasky@develer.com>
Francesco Sacchi <batt@develer.com>
Daniele Basile <asterix@develer.com>

Definition in file thermo.h.

Function Documentation

deg_t thermo_readTemperature ( ThermoDev dev )

Return the current temperature of a device currently under thermo control.

Parameters:
dev Device
Returns:
Current temperature (Celsius degrees * 10)

Definition at line 292 of file thermo.c.

void thermo_setTarget | ( | ThermoDev | dev,
 |  | deg_t | temperature
 | ) |  |

Set the target temperature at which a given device should be kept.

Parameters:
dev | Device
temperature | Target temperature

Definition at line 235 of file thermo.c.

thermostatus_t thermo_status ( ThermoDev dev )

Return the status of the specific dev thermo-device.

Definition at line 103 of file thermo.c.


BeRTOS: thermo.h Source File

  • drv
thermo.h
Go to the documentation of this file.
00001
00056 #ifndef DRV_THERMO_H
00057 #define DRV_THERMO_H
00058
00059 #include "hw/thermo_map.h"
00060
00061 #include <drv/ntc.h>
00062 #include <drv/timer.h>
00063
00064 typedef uint8_t thermostatus_t;
00065
00066
00073 void thermo_setTarget(ThermoDev dev, deg_t temperature);
00074
00079 void thermo_timer(ThermoDev dev, mtime_t on_time);
00080
00082 void thermo_start(ThermoDev dev);
00083
00085 void thermo_stop(ThermoDev dev);
00086
00088 void thermo_clearErrors(ThermoDev dev);
00089
00091 thermostatus_t thermo_status(ThermoDev dev);
00092
00100 deg_t thermo_readTemperature(ThermoDev dev);
00101
00102 void thermo_init(void);
00103
00104
00105 #endif /* DRV_THERMO_H */


BeRTOS: thermo_map.h File Reference

  • hw
thermo_map.h File Reference

Thermo regulation control map definitions. More...

#include <cfg/compiler.h>
#include <cfg/macros.h>

Go to the source code of this file.

Detailed Description

Thermo regulation control map definitions.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file thermo_map.h.


BeRTOS: thermo_map.h Source File

  • hw
thermo_map.h
Go to the documentation of this file.
00001
00038 #ifndef THERMO_MAP_H
00039 #define THERMO_MAP_H
00040
00041 #include <cfg/compiler.h>
00042 #include <cfg/macros.h>
00043
00044
00045 #warning TODO:This is an example implentation, you must implement it!
00046
00047 typedef enum ThermoDev
00048 {
00049     THERMO_TEST,
00050
00051     /* Put here your thermo device */
00052
00053     THERMO_CNT
00054 } ThermoDev;
00055
00056 #endif /* THERMO_MAP_H */


BeRTOS: timer.c File Reference

  • drv
Functions | Variables
timer.c File Reference

Hardware independent timer driver (implementation) More...

#include "timer.h"
#include "hw/hw_timer.h"
#include "cfg/cfg_timer.h"
#include "cfg/cfg_wdt.h"
#include "cfg/cfg_proc.h"
#include "cfg/cfg_signal.h"
#include <cfg/os.h>
#include <cfg/debug.h>
#include <cfg/module.h>
#include <cpu/attr.h>
#include <cpu/types.h>
#include <cpu/irq.h>
#include <cpu/power.h>
#include <kern/proc_p.h>
#include <PP_STRINGIZE(drv/PP_CAT3(timer, _, CPU_ID).c)>
#include <kern/signal.h>
#include <kern/proc.h>
#include <cfg/macros.h>

Go to the source code of this file.

Functions

void | timer_addToList (Timer *timer, List *queue)
This function really does the job.
void | timer_add (Timer *timer)
Add the specified timer to the software timer service queue.
Timer * | timer_abort (Timer *timer)
Remove a timer from the timers queue before it has expired.
void | synctimer_add (Timer *timer, List *queue)
Add timer to queue.
void | synctimer_poll (List *queue)
Simple synchronous timer based scheduler polling routine.
void | timer_delayTicks (ticks_t delay)
Wait for the specified amount of timer ticks.
void | timer_busyWait (hptime_t delay)
Busy wait until the specified amount of high-precision ticks have elapsed.
void | timer_delayHp (hptime_t delay)
Wait for the specified amount of time (expressed in microseconds).

Variables

volatile ticks_t | _clock
Master system clock (1 tick accuracy)
static REGISTER List | timers_queue
List of active asynchronous timers.

Detailed Description

Hardware independent timer driver (implementation)

Author:
Bernie Innocenti <bernie@codewiz.org>
Francesco Sacchi <batt@develer.com>

Definition in file timer.c.

Function Documentation

void timer_addToList | ( | Timer * | timer,
 |  | List * | queue
 | ) |  | [inline]

This function really does the job.

It adds timer to queue.

See also:
timer_add for details.

Definition at line 124 of file timer.c.


BeRTOS: timer.c Source File

  • drv
timer.c
Go to the documentation of this file.
00001
00039 #include "timer.h"
00040 #include "hw/hw_timer.h"
00041
00042 #include "cfg/cfg_timer.h"
00043 #include "cfg/cfg_wdt.h"
00044 #include "cfg/cfg_proc.h"
00045 #include "cfg/cfg_signal.h"
00046 #include <cfg/os.h>
00047 #include <cfg/debug.h>
00048 #include <cfg/module.h>
00049
00050 #include <cpu/attr.h>
00051 #include <cpu/types.h>
00052 #include <cpu/irq.h>
00053 #include <cpu/power.h> // cpu_relax()
00054
00055 #include <kern/proc_p.h> // proc_decQuantun()
00056
00057 /*
00058  * Include platform-specific binding code if we're hosted.
00059  * Try the CPU specific one for bare-metal environments.
00060  */
00061 #if OS_HOSTED
00062     //#include OS_CSOURCE(timer)
00063     #include <emul/timer_posix.c>
00064 #else
00065     #ifndef WIZ_AUTOGEN
00066         #warning Deprecated: now you should include timer_<cpu> directly in the makefile. Remove this line and the following once done.
00067         #include CPU_CSOURCE(timer)
00068     #endif
00069 #endif
00070
00071 /*
00072  * Sanity check for config parameters required by this module.
00073  */
00074 #if !defined(CONFIG_KERN) || ((CONFIG_KERN != 0) && CONFIG_KERN != 1)
00075     #error CONFIG_KERN must be set to either 0 or 1 in config.h
00076 #endif
00077 #if !defined(CONFIG_WATCHDOG) || ((CONFIG_WATCHDOG != 0) && CONFIG_WATCHDOG != 1)
00078     #error CONFIG_WATCHDOG must be set to either 0 or 1 in config.h
00079 #endif
00080
00081 #if CONFIG_WATCHDOG
00082     #include <drv/wdt.h>
00083 #endif
00084
00085 #if defined (CONFIG_KERN_SIGNALS) && CONFIG_KERN_SIGNALS
00086     #include <kern/signal.h> /* sig_wait(), sig_check() */
00087     #include <kern/proc.h>   /* proc_current() */
00088     #include <cfg/macros.h>  /* BV() */
00089 #endif
00090
00091
00102 #if !defined(CONFIG_TIMER_STROBE) || !CONFIG_TIMER_STROBE
00103     #define TIMER_STROBE_ON    do {/*nop*/} while(0)
00104     #define TIMER_STROBE_OFF   do {/*nop*/} while(0)
00105     #define TIMER_STROBE_INIT  do {/*nop*/} while(0)
00106 #endif
00107
00108
00110 volatile ticks_t _clock;
00111
00112
00113 #if CONFIG_TIMER_EVENTS
00114
00118 REGISTER static List timers_queue;
00119
00124 INLINE void timer_addToList(Timer *timer, List *queue)
00125 {
00126     /* Inserting timers twice causes mayhem. */
00127     ASSERT(timer->magic != TIMER_MAGIC_ACTIVE);
00128     DB(timer->magic = TIMER_MAGIC_ACTIVE;)
00129
00130
00131     /* Calculate expiration time for this timer */
00132     timer->tick = _clock + timer->_delay;
00133
00134     /*
00135      * Search for the first node whose expiration time is
00136      * greater than the timer we want to add.
00137      */
00138     Timer *node = (Timer *)LIST_HEAD(queue);
00139     while (node->link.succ)
00140     {
00141         /*
00142          * Stop just after the insertion point.
00143          * (this fancy compare takes care of wrap-arounds).
00144          */
00145         if (node->tick - timer->tick > 0)
00146             break;
00147
00148         /* Go to next node */
00149         node = (Timer *)node->link.succ;
00150     }
00151
00152     /* Enqueue timer request into the list */
00153     INSERT_BEFORE(&timer->link, &node->link);
00154 }
00155
00165 void timer_add(Timer *timer)
00166 {
00167     ATOMIC(timer_addToList(timer, &timers_queue));
00168 }
00169
00176 Timer *timer_abort(Timer *timer)
00177 {
00178     ATOMIC(REMOVE(&timer->link));
00179     DB(timer->magic = TIMER_MAGIC_INACTIVE;)
00180
00181     return timer;
00182 }
00183
00184
00185 INLINE void timer_poll(List *queue)
00186 {
00187     Timer *timer;
00188
00189     /*
00190      * Check the first timer request in the list and process
00191      * it when it has expired. Repeat this check until the
00192      * first node has not yet expired. Since the list is sorted
00193      * by expiry time, all the following requests are guaranteed
00194      * to expire later.
00195      */
00196     while ((timer = (Timer *)LIST_HEAD(queue))->link.succ)
00197     {
00198         /* This request in list has not yet expired? */
00199         if (timer_clock() - timer->tick < 0)
00200             break;
00201
00202         /* Retreat the expired timer */
00203         REMOVE(&timer->link);
00204         DB(timer->magic = TIMER_MAGIC_INACTIVE;)
00205
00206         /* Execute the associated event */
00207         event_do(&timer->expire);
00208     }
00209 }
00210
00215 void synctimer_add(Timer *timer, List *queue)
00216 {
00217     timer_addToList(timer, queue);
00218 }
00219
00237 void synctimer_poll(List *queue)
00238 {
00239     timer_poll(queue);
00240 }
00241
00242 #endif /* CONFIG_TIMER_EVENTS */
00243
00244
00250 void timer_delayTicks(ticks_t delay)
00251 {
00252     /* We shouldn't sleep with interrupts disabled */
00253     IRQ_ASSERT_ENABLED();
00254
00255 #if CONFIG_KERN_SIGNALS
00256     Timer t;
00257     DB(t.magic = TIMER_MAGIC_INACTIVE;)
00258     if (proc_preemptAllowed())
00259     {
00260         timer_setEvent(&t);
00261         timer_setDelay(&t, delay);
00262         timer_add(&t);
00263         timer_waitEvent(&t);
00264     }
00265     else
00266 #endif /* !CONFIG_KERN_SIGNALS */
00267     {
00268         ticks_t start = timer_clock();
00269
00270         /* Busy wait */
00271         while (timer_clock() - start < delay)
00272             cpu_relax();
00273     }
00274 }
00275
00276
00277 #if CONFIG_TIMER_UDELAY
00278
00285 void timer_busyWait(hptime_t delay)
00286 {
00287     hptime_t now, prev = timer_hw_hpread();
00288     hptime_t delta;
00289
00290     for (;;)
00291     {
00292         now = timer_hw_hpread();
00293         /*
00294          * The timer counter may wrap here and "prev" can become
00295          * greater than "now". So, be sure to always evaluate a
00296          * coherent timer difference:
00297          *
00298          * 0     prev            now   TIMER_HW_CNT
00299          * |_____|_______________|_____|
00300          *        ^^^^^^^^^^^^^^^
00301          * delta = now - prev
00302          *
00303          * 0     now             prev  TIMER_HW_CNT
00304          * |_____|_______________|_____|
00305          *  ^^^^^                 ^^^^^
00306          * delta = (TIMER_HW_CNT - prev) + now
00307          *
00308          * NOTE: TIMER_HW_CNT can be any value, not necessarily a power
00309          * of 2. For this reason the "%" operator is not suitable for
00310          * the generic case.
00311          */
00312         delta = (now < prev) ? ((hptime_t)TIMER_HW_CNT - prev + now) :
00313                         (now - prev);
00314         if (delta >= delay)
00315             break;
00316         delay -= delta;
00317         prev = now;
00318     }
00319 }
00320
00328 void timer_delayHp(hptime_t delay)
00329 {
00330     if (UNLIKELY(delay > us_to_hptime(1000)))
00331     {
00332         timer_delayTicks(delay / (TIMER_HW_HPTICKS_PER_SEC / TIMER_TICKS_PER_SEC));
00333         delay %= (TIMER_HW_HPTICKS_PER_SEC / TIMER_TICKS_PER_SEC);
00334     }
00335
00336     timer_busyWait(delay);
00337 }
00338 #endif /* CONFIG_TIMER_UDELAY */
00339
00344 DEFINE_TIMER_ISR
00345 {
00346     /*
00347      * With the Metrowerks compiler, the only way to force the compiler generate
00348      * an interrupt service routine is to put a pragma directive within the function
00349      * body.
00350      */
00351     #ifdef __MWERKS__
00352     #pragma interrupt saveall
00353     #endif
00354
00355     /*
00356      * On systems sharing IRQ line and vector, this check is needed
00357      * to ensure that IRQ is generated by timer source.
00358      */
00359     if (!timer_hw_triggered())
00360         return;
00361
00362     TIMER_STROBE_ON;
00363
00364     /* Update the master ms counter */
00365     ++_clock;
00366
00367     /* Update the current task's quantum (if enabled). */
00368     proc_decQuantum();
00369
00370     #if CONFIG_TIMER_EVENTS
00371         timer_poll(&timers_queue);
00372     #endif
00373
00374     /* Perform hw IRQ handling */
00375     timer_hw_irq();
00376
00377     TIMER_STROBE_OFF;
00378 }
00379
00380 MOD_DEFINE(timer)
00381
00382
00385 void timer_init(void)
00386 {
00387     #if CONFIG_KERN_IRQ
00388         MOD_CHECK(irq);
00389     #endif
00390
00391     #if CONFIG_TIMER_EVENTS
00392         LIST_INIT(&timers_queue);
00393     #endif
00394
00395     TIMER_STROBE_INIT;
00396
00397     _clock = 0;
00398
00399     timer_hw_init();
00400
00401     MOD_INIT(timer);
00402 }
00403
00404
00405 #if (ARCH & ARCH_EMUL)
00406
00409 void timer_cleanup(void)
00410 {
00411     MOD_CLEANUP(timer);
00412
00413     timer_hw_cleanup();
00414
00415     // Hmmm... apparently, the demo app does not cleanup properly
00416     //ASSERT(LIST_EMPTY(&timers_queue));
00417 }
00418 #endif /* ARCH_EMUL */


BeRTOS: timer.h File Reference

  • drv
Data Structures | Defines | Functions | Variables
timer.h File Reference
#include <cfg/os.h>
#include <cfg/macros.h>
#include <cpu/attr.h>
#include <cpu/irq.h>
#include <PP_STRINGIZE(drv/PP_CAT3(timer, _, CPU_ID).h)>
#include "cfg/cfg_timer.h"
#include <cfg/debug.h>
#include <cfg/compiler.h>
#include <struct/list.h>
#include <mware/event.h>

Go to the source code of this file.

Data Structures

struct | Timer
The timer driver supports multiple synchronous timers that can trigger an event when they expire. More...

Defines

#define | synctimer_abort(t) timer_abort(t)

Functions

ticks_t | timer_clock (void)
Return the system tick counter (expressed in ticks)
ticks_t | timer_clock_unlocked (void)
Faster version of timer_clock(), to be called only when the timer interrupt is disabled (DISABLE_INTS) or overridden by a higher-priority or non-nesting interrupt.
ticks_t | ms_to_ticks (mtime_t ms)
Convert ms [ms] to ticks.
ticks_t | us_to_ticks (utime_t us)
Convert us [us] to ticks.
mtime_t | ticks_to_ms (ticks_t ticks)
Convert ticks [ticks] to ms.
utime_t | ticks_to_us (ticks_t ticks)
Convert ticks [ticks] to us.
hptime_t | us_to_hptime (utime_t us)
Convert us [us] to hpticks.
utime_t | hptime_to_us (hptime_t hpticks)
Convert hpticks [hptime] to usec.
void | timer_delayTicks (ticks_t delay)
Wait for the specified amount of timer ticks.
void | timer_delay (mtime_t delay)
Wait some time [ms].
void | timer_busyWait (hptime_t delay)
Busy wait until the specified amount of high-precision ticks have elapsed.
void | timer_delayHp (hptime_t delay)
Wait for the specified amount of time (expressed in microseconds).
void | timer_add (Timer *timer)
Add the specified timer to the software timer service queue.
Timer * | timer_abort (Timer *timer)
Remove a timer from the timers queue before it has expired.
void | timer_setSoftint (Timer *timer, Hook func, iptr_t user_data)
Set the timer so that it calls an user hook when it expires.
void | timer_setDelay (Timer *timer, ticks_t delay)
Set the timer delay (the time before the event will be triggered)
void | synctimer_add (Timer *timer, List *q)
Add timer to queue.
void | synctimer_poll (List *q)
Simple synchronous timer based scheduler polling routine.
void | timer_setEvent (Timer *timer)
Set the timer so that it sends a event notification when it expires.
void | timer_waitEvent (Timer *timer)
Wait until the timer expires.
void | timer_setSignal (Timer *timer, struct Process *proc, sigmask_t sigs)
Set the timer so that it sends a signal when it expires.

Variables

volatile ticks_t | _clock
Master system clock (1 tick accuracy)

Detailed Description

Definition in file timer.h.


BeRTOS: timer.h Source File

  • drv
timer.h
Go to the documentation of this file.
00001
00056 #ifndef DRV_TIMER_H
00057 #define DRV_TIMER_H
00058
00059 #include <cfg/os.h>
00060 #include <cfg/macros.h>
00061
00062 #include <cpu/attr.h>
00063 #include <cpu/irq.h>
00064
00065
00066 /*
00067  * Include platform-specific binding header if we're hosted.
00068  * Try the CPU specific one for bare-metal environments.
00069  */
00070 #if OS_HOSTED
00071     //#include OS_HEADER(timer)
00072     #include <emul/timer_posix.h>
00073 #else
00074     #include CPU_HEADER(timer)
00075 #endif
00076
00077 STATIC_ASSERT(sizeof(hptime_t) == SIZEOF_HPTIME_T);
00078
00079 #include "cfg/cfg_timer.h"
00080 #include <cfg/debug.h>
00081 #include <cfg/compiler.h>
00082
00083 #include <struct/list.h>
00084
00085 /*
00086  * Sanity check for config parameters required by this module.
00087  */
00088 #if !defined(CONFIG_TIMER_EVENTS) || ((CONFIG_TIMER_EVENTS != 0) && CONFIG_TIMER_EVENTS != 1)
00089     #error CONFIG_TIMER_EVENTS must be set to either 0 or 1 in cfg_timer.h
00090 #endif
00091 #if !defined(CONFIG_TIMER_UDELAY) || ((CONFIG_TIMER_UDELAY != 0) && CONFIG_TIMER_EVENTS != 1)
00092     #error CONFIG_TIMER_UDELAY must be set to either 0 or 1 in cfg_timer.h
00093 #endif
00094 #if defined(CONFIG_TIMER_DISABLE_UDELAY)
00095     #error Obosolete config option CONFIG_TIMER_DISABLE_UDELAY.  Use CONFIG_TIMER_UDELAY
00096 #endif
00097 #if defined(CONFIG_TIMER_DISABLE_EVENTS)
00098     #error Obosolete config option CONFIG_TIMER_DISABLE_EVENTS.  Use CONFIG_TIMER_EVENTS
00099 #endif
00100
00101 extern volatile ticks_t _clock;
00102
00103 #define TIMER_AFTER(x, y) ((long)(y) - (long)(x) < 0)
00104 #define TIMER_BEFORE(x, y) TIMER_AFTER(y, x)
00105
00134 INLINE ticks_t timer_clock(void)
00135 {
00136     ticks_t result;
00137
00138     ATOMIC(result = _clock);
00139
00140     return result;
00141 }
00142
00150 INLINE ticks_t timer_clock_unlocked(void)
00151 {
00152     return _clock;
00153 }
00154
00155
00157 INLINE ticks_t ms_to_ticks(mtime_t ms)
00158 {
00159 #if TIMER_TICKS_PER_SEC < 1000
00160     /* Slow timer: avoid rounding down too much. */
00161     return (ms * TIMER_TICKS_PER_SEC) / 1000;
00162 #else
00163     /* Fast timer: don't overflow ticks_t. */
00164     return ms * DIV_ROUND(TIMER_TICKS_PER_SEC, 1000);
00165 #endif
00166 }
00167
00169 INLINE ticks_t us_to_ticks(utime_t us)
00170 {
00171 #if TIMER_TICKS_PER_SEC < 1000
00172     /* Slow timer: avoid rounding down too much. */
00173     return ((us / 1000) * TIMER_TICKS_PER_SEC) / 1000;
00174 #else
00175     /* Fast timer: don't overflow ticks_t. */
00176     return (us * DIV_ROUND(TIMER_TICKS_PER_SEC, 1000)) / 1000;
00177 #endif
00178 }
00179
00181 INLINE mtime_t ticks_to_ms(ticks_t ticks)
00182 {
00183 #if TIMER_TICKS_PER_SEC < 1000
00184     /* Slow timer: avoid rounding down too much. */
00185     return (ticks * 1000) / TIMER_TICKS_PER_SEC;
00186 #else
00187     /* Fast timer: avoid overflowing ticks_t. */
00188     return ticks / (TIMER_TICKS_PER_SEC / 1000);
00189 #endif
00190 }
00191
00193 INLINE utime_t ticks_to_us(ticks_t ticks)
00194 {
00195 #if TIMER_TICKS_PER_SEC < 1000
00196     /* Slow timer: avoid rounding down too much. */
00197     return ((ticks * 1000) / TIMER_TICKS_PER_SEC) * 1000;
00198 #else
00199     /* Fast timer: avoid overflowing ticks_t. */
00200     return (ticks / (TIMER_TICKS_PER_SEC / 1000)) * 1000;
00201 #endif
00202 }
00203
00205 INLINE hptime_t us_to_hptime(utime_t us)
00206 {
00207 #if TIMER_HW_HPTICKS_PER_SEC > 10000000UL
00208     return us * DIV_ROUND(TIMER_HW_HPTICKS_PER_SEC, 1000000UL);
00209 #else
00210     return (us * ((TIMER_HW_HPTICKS_PER_SEC + 500) / 1000UL) + 500) / 1000UL;
00211 #endif
00212 }
00213
00215 INLINE utime_t hptime_to_us(hptime_t hpticks)
00216 {
00217 #if TIMER_HW_HPTICKS_PER_SEC < 100000UL
00218     return hpticks * DIV_ROUND(1000000UL, TIMER_HW_HPTICKS_PER_SEC);
00219 #else
00220     return (hpticks * 1000UL) / DIV_ROUND(TIMER_HW_HPTICKS_PER_SEC, 1000UL);
00221 #endif /* TIMER_HW_HPTICKS_PER_SEC < 100000UL */
00222 }
00223
00224 void timer_delayTicks(ticks_t delay);
00231 INLINE void timer_delay(mtime_t delay)
00232 {
00233     timer_delayTicks(ms_to_ticks(delay));
00234 }
00235
00236 void timer_init(void);
00237 void timer_cleanup(void);
00238
00239 int timer_testSetup(void);
00240 int timer_testRun(void);
00241 int timer_testTearDown(void);
00242
00243 #if CONFIG_TIMER_UDELAY
00244 void timer_busyWait(hptime_t delay);
00245 void timer_delayHp(hptime_t delay);
00246 INLINE void timer_udelay(utime_t delay)
00247 {
00248     timer_delayHp(us_to_hptime(delay));
00249 }
00250 #endif
00251
00252 #if CONFIG_TIMER_EVENTS
00253
00254 #include <mware/event.h>
00255
00263 typedef struct Timer
00264 {
00265     Node    link;
00266     ticks_t _delay;
00267     ticks_t tick;
00268     Event   expire;
00269     DB(uint16_t magic;)
00270 } Timer;
00271
00272 /* Timer is active when Timer.magic contains this value (for debugging purposes). */
00273 #define TIMER_MAGIC_ACTIVE    0xABBA
00274 #define TIMER_MAGIC_INACTIVE  0xBAAB
00275
00276 void timer_add(Timer *timer);
00277 Timer *timer_abort(Timer *timer);
00278
00289 INLINE void timer_setSoftint(Timer *timer, Hook func, iptr_t user_data)
00290 {
00291     event_initSoftint(&timer->expire, func, user_data);
00292 }
00293
00300 INLINE void timer_setDelay(Timer *timer, ticks_t delay)
00301 {
00302     timer->_delay = delay;
00303 }
00304
00305
00306 void synctimer_add(Timer *timer, List* q);
00307
00309 #define synctimer_abort(t) timer_abort(t)
00310
00311 void synctimer_poll(List* q);
00312
00313
00314 #endif /* CONFIG_TIMER_EVENTS */
00315
00316 #if defined(CONFIG_KERN_SIGNALS) && CONFIG_KERN_SIGNALS
00317
00319 INLINE void timer_setEvent(Timer *timer)
00320 {
00321     event_initGeneric(&timer->expire);
00322 }
00323
00325 INLINE void timer_waitEvent(Timer *timer)
00326 {
00327     event_wait(&timer->expire);
00328 }
00329
00331 INLINE void timer_setSignal(Timer *timer, struct Process *proc, sigmask_t sigs)
00332 {
00333     event_initSignal(&timer->expire, proc, sigs);
00334 }
00335
00336 #define timer_set_event_signal timer_setSignal
00337
00338 #endif /* CONFIG_KERN_SIGNALS */
00339  //defgroup drv_timers
00341
00342 #endif /* DRV_TIMER_H */


BeRTOS: timer_arm.c File Reference

  • cpu
  • arm
  • drv
timer_arm.c File Reference

Low-level timer module for ARM (inplementation). More...

#include <cpu/detect.h>
#include <cfg/cfg_arch.h>

Go to the source code of this file.

Detailed Description

Low-level timer module for ARM (inplementation).

Author:
Francesco Sacchi <batt@develer.com>

This module is automatically included so no need to include in test list.

Definition in file timer_arm.c.


BeRTOS: timer_arm.c Source File

  • cpu
  • arm
  • drv
timer_arm.c
Go to the documentation of this file.
00001
00043 #ifndef WIZ_AUTOGEN
00044     #warning This file is deprecated, you should use timer_at91.c
00045
00046     #include <cpu/detect.h>
00047     #include <cfg/cfg_arch.h>
00048
00049     #if CPU_ARM_AT91
00050         #include "timer_at91.c"
00051     /*#elif  Add other ARM families here */
00052     #else
00053         #error Unknown CPU
00054     #endif
00055
00056 #endif /* WIZ_AUTOGEN */


BeRTOS: timer_arm.h File Reference

  • cpu
  • arm
  • drv
timer_arm.h File Reference

Low-level timer module for ARM (interface). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level timer module for ARM (interface).

Author:
Francesco Sacchi <batt@develer.com>

Definition in file timer_arm.h.


BeRTOS: timer_arm.h Source File

  • cpu
  • arm
  • drv
timer_arm.h
Go to the documentation of this file.
00001
00039 #include <cpu/detect.h>
00040
00041 #if CPU_ARM_AT91
00042     #include "timer_at91.h"
00043 #elif CPU_ARM_LPC2
00044     #include "timer_lpc2.h"
00045 /*#elif  Add other ARM families here */
00046 #else
00047     #error Unknown CPU
00048 #endif


BeRTOS: timer_at91.c File Reference

  • cpu
  • arm
  • drv
timer_at91.c File Reference

Low-level timer module for Atmel AT91 (inplementation). More...

#include "timer_at91.h"
#include <io/arm.h>
#include "sysirq_at91.h"
#include <cfg/macros.h>
#include <cfg/module.h>
#include <cpu/irq.h>
#include <cpu/types.h>

Go to the source code of this file.

Detailed Description

Low-level timer module for Atmel AT91 (inplementation).

Author:
Francesco Sacchi <batt@develer.com>

Definition in file timer_at91.c.


BeRTOS: timer_at91.c Source File

  • cpu
  • arm
  • drv
timer_at91.c
Go to the documentation of this file.
00001
00038 #include "timer_at91.h"
00039 #include <io/arm.h>
00040 #include "sysirq_at91.h"
00041
00042 #include <cfg/macros.h> // BV()
00043 #include <cfg/module.h>
00044 #include <cpu/irq.h>
00045 #include <cpu/types.h>
00046
00047
00049 #if (CONFIG_TIMER == TIMER_ON_PIT)
00050
00051     ISR_PROTO_CONTEXT_SWITCH(timer_handler);
00052
00053     void timer_hw_init(void)
00054     {
00055         sysirq_init();
00056
00057         cpu_flags_t flags;
00058
00059         MOD_CHECK(sysirq);
00060
00061         IRQ_SAVE_DISABLE(flags);
00062
00063         PIT_MR = TIMER_HW_CNT;
00064         /* Register system interrupt handler. */
00065         sysirq_setHandler(SYSIRQ_PIT, timer_handler);
00066
00067         /* Enable interval timer and interval timer interrupts */
00068         PIT_MR |= BV(PITEN);
00069         sysirq_setEnable(SYSIRQ_PIT, true);
00070
00071         /* Reset counters, this is needed to start timer and interrupt flags */
00072         uint32_t dummy = PIVR;
00073         (void) dummy;
00074
00075         IRQ_RESTORE(flags);
00076     }
00077
00078 #else
00079     #error Unimplemented value for CONFIG_TIMER
00080 #endif /* CONFIG_TIMER */


BeRTOS: timer_at91.h File Reference

  • cpu
  • arm
  • drv
timer_at91.h File Reference

Low-level timer module for Atmel AT91 (interface). More...

#include <hw/hw_cpufreq.h>
#include "cfg/cfg_timer.h"
#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <io/arm.h>

Go to the source code of this file.

Values for CONFIG_TIMER.

Select which hardware timer interrupt to use for system clock and softtimers.

#define | TIMER_ON_PIT 1
System timer on Periodic interval timer.
#define | TIMER_DEFAULT TIMER_ON_PIT
Default system timer.
void | timer_hw_init (void)
HW dependent timer initialization.

Detailed Description

Low-level timer module for Atmel AT91 (interface).

Author:
Francesco Sacchi <batt@develer.com>

Definition in file timer_at91.h.


BeRTOS: timer_at91.h Source File

  • cpu
  • arm
  • drv
timer_at91.h
Go to the documentation of this file.
00001
00038 #ifndef DRV_AT91_TIMER_H
00039 #define DRV_AT91_TIMER_H
00040
00041 #include <hw/hw_cpufreq.h>     /* CPU_FREQ */
00042
00043 #include "cfg/cfg_timer.h"     /* CONFIG_TIMER */
00044 #include <cfg/compiler.h>      /* uint8_t */
00045 #include <cfg/macros.h>        /* BV */
00046
00047 #include <io/arm.h>
00048
00056 #define TIMER_ON_PIT 1  ///< System timer on Periodic interval timer
00057
00058 #define TIMER_DEFAULT TIMER_ON_PIT  ///< Default system timer
00059
00060 /*
00061  * Hardware dependent timer initialization.
00062  */
00063 #if (CONFIG_TIMER == TIMER_ON_PIT)
00064
00065     /*
00066      * On ARM all system IRQs are handled by the sysirq_dispatcher, so the actual
00067      * timer handler can be treated like any other normal routine.
00068      */
00069     #define DEFINE_TIMER_ISR    void timer_handler(void);   \
00070                     void timer_handler(void)
00071
00072     #define TIMER_TICKS_PER_SEC  1000
00073     #define TIMER_HW_CNT         (CPU_FREQ / (16 * TIMER_TICKS_PER_SEC) - 1)
00074
00076     #define TIMER_HW_HPTICKS_PER_SEC (CPU_FREQ / 16)
00077
00079     typedef uint32_t hptime_t;
00080     #define SIZEOF_HPTIME_T 4
00081
00082     INLINE void timer_hw_irq(void)
00083     {
00084         /* Reset counters, this is needed to reset timer and interrupt flags */
00085         uint32_t dummy = PIVR;
00086         (void) dummy;
00087     }
00088
00089     INLINE bool timer_hw_triggered(void)
00090     {
00091         return PIT_SR & BV(PITS);
00092     }
00093
00094     INLINE hptime_t timer_hw_hpread(void)
00095     {
00096         /* In the upper part of PIT_PIIR there is unused data */
00097         return PIIR & CPIV_MASK;
00098     }
00099
00100 #else
00101
00102     #error Unimplemented value for CONFIG_TIMER
00103 #endif /* CONFIG_TIMER */
00104
00105 void timer_hw_init(void);
00106
00107
00108 #endif /* DRV_TIMER_AT91_H */


BeRTOS: timer_avr.c File Reference

  • cpu
  • avr
  • drv
timer_avr.c File Reference

Low-level timer module for AVR (implementation). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level timer module for AVR (implementation).

Author:
Onno <developer@gorgoz.org>

This module is automatically included so no need to include in test list.

Definition in file timer_avr.c.


BeRTOS: timer_avr.c Source File

  • cpu
  • avr
  • drv
timer_avr.c
Go to the documentation of this file.
00001
00043 #ifndef WIZ_AUTOGEN
00044     #warning This file is deprecated, you should probably use timer_mega.c
00045
00046     #include <cpu/detect.h>
00047
00048     #if CPU_AVR_MEGA
00049         #include "timer_mega.c"
00050     #elif CPU_AVR_XMEGA
00051         #include "timer_xmega.c"
00052     /*#elif  Add other AVR families here */
00053     #else
00054         #error Unknown CPU
00055     #endif
00056 #endif /* WIZ_AUTOGEN */
00057


BeRTOS: timer_avr.h File Reference

  • cpu
  • avr
  • drv
timer_avr.h File Reference

Low-level timer module for AVR (interface). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level timer module for AVR (interface).

Author:
Onno <developer@gorgoz.org>

Definition in file timer_avr.h.


BeRTOS: timer_avr.h Source File

  • cpu
  • avr
  • drv
timer_avr.h
Go to the documentation of this file.
00001
00040 #ifndef TIMER_AVR_H_
00041 #define TIMER_AVR_H_
00042
00043 #include <cpu/detect.h>
00044
00045 #if CPU_AVR_MEGA
00046     #include "timer_mega.h"
00047 #elif CPU_AVR_XMEGA
00048     #include "timer_xmega.h"
00049 /*#elif  Add other AVR families here */
00050 #else
00051     #error Unknown CPU
00052 #endif
00053
00054
00055 #endif /* TIMER_AVR_H_ */


BeRTOS: timer_cm3.c File Reference

  • cpu
  • cortex-m3
  • drv
Functions
timer_cm3.c File Reference

Low-level timer driver (SysTick) for LM3S1968. More...

#include "timer_cm3.h"
#include <cfg/debug.h>
#include <cpu/irq.h>
#include <drv/irq_cm3.h>

Go to the source code of this file.

Functions

void timer_hw_init (void)
HW dependent timer initialization.

Detailed Description

Low-level timer driver (SysTick) for LM3S1968.

Author:
Andrea Righi <arighi@develer.com>

Definition in file timer_cm3.c.


BeRTOS: timer_cm3.c Source File

  • cpu
  • cortex-m3
  • drv
timer_cm3.c
Go to the documentation of this file.
00001
00038 #include "timer_cm3.h"
00039
00040 #include <cfg/debug.h>
00041
00042 #include <cpu/irq.h>
00043
00044 #include <drv/irq_cm3.h>
00045
00046 INLINE void timer_hw_setPeriod(unsigned long period)
00047 {
00048     ASSERT(period < (1 << 24));
00049     NVIC_ST_RELOAD_R = period - 1;
00050 }
00051
00052 static void timer_hw_enable(void)
00053 {
00054     NVIC_ST_CTRL_R |=
00055         NVIC_ST_CTRL_CLK_SRC | NVIC_ST_CTRL_ENABLE | NVIC_ST_CTRL_INTEN;
00056 }
00057
00058 static void timer_hw_disable(void)
00059 {
00060     NVIC_ST_CTRL_R &= ~(NVIC_ST_CTRL_ENABLE | NVIC_ST_CTRL_INTEN);
00061 }
00062
00063 void timer_hw_init(void)
00064 {
00065     timer_hw_setPeriod(CPU_FREQ / TIMER_TICKS_PER_SEC);
00066     sysirq_setHandler(FAULT_SYSTICK, timer_handler);
00067     timer_hw_enable();
00068 }
00069
00070 void timer_hw_exit(void)
00071 {
00072     timer_hw_disable();
00073     sysirq_freeHandler(FAULT_SYSTICK);
00074 }


BeRTOS: timer_cm3.h File Reference

  • cpu
  • cortex-m3
  • drv
timer_cm3.h File Reference

Low-level timer driver (SysTick) for Cortex-M3. More...

#include "cfg/cfg_timer.h"
#include <cpu/detect.h>
#include <cpu/irq.h>

Go to the source code of this file.

Values for CONFIG_TIMER.

Select which hardware timer interrupt to use for system clock and softtimers.

#define | TIMER_ON_GPTM 1
Default system timer.
#define | TIMER_DEFAULT TIMER_ON_GPTM
Default system timer.
void | timer_hw_init (void)
HW dependent timer initialization.
void | timer_hw_exit (void)
Default system timer.

Detailed Description

Low-level timer driver (SysTick) for Cortex-M3.

Author:
Andrea Righi <arighi@develer.com>

Definition in file timer_cm3.h.


BeRTOS: timer_cm3.h Source File

  • cpu
  • cortex-m3
  • drv
timer_cm3.h
Go to the documentation of this file.
00001
00038 #ifndef TIMER_CM3_H
00039 #define TIMER_CM3_H
00040
00041 #include "cfg/cfg_timer.h"     /* CONFIG_TIMER */
00042
00043 #include <cpu/detect.h>
00044 #include <cpu/irq.h>
00045
00046 #if CPU_CM3_LM3S
00047     #include <io/lm3s.h>
00048 #elif CPU_CM3_STM32
00049     #include <io/stm32.h>
00050 #elif CPU_CM3_SAM3
00051     #include <io/sam3.h>
00052 /*#elif  Add other families here */
00053 #else
00054     #error Unknown CPU
00055 #endif
00056
00064 #define TIMER_ON_GPTM  1
00065
00066 #define TIMER_DEFAULT  TIMER_ON_GPTM ///< Default system timer
00067
00068 #if (CONFIG_TIMER == TIMER_ON_GPTM)
00069     /* Ticks frequency (HZ) */
00070     #define TIMER_TICKS_PER_SEC 1000
00071
00072     /* Frequency of the hardware high-precision timer. */
00073     #define TIMER_HW_HPTICKS_PER_SEC (CPU_FREQ)
00074
00075     /* Maximum value of the high-precision hardware counter register */
00076     #define TIMER_HW_CNT (CPU_FREQ / TIMER_TICKS_PER_SEC)
00077
00079     typedef uint32_t hptime_t;
00080     #define SIZEOF_HPTIME_T 4
00081
00082     /* Timer ISR prototype */
00083     ISR_PROTO_CONTEXT_SWITCH(timer_handler);
00084     #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(timer_handler)
00085
00086     INLINE void timer_hw_irq(void)
00087     {
00088     }
00089
00090
00091     INLINE bool timer_hw_triggered(void)
00092     {
00093         return true;
00094     }
00095
00096     INLINE hptime_t timer_hw_hpread(void)
00097     {
00098         return (TIMER_HW_CNT - NVIC_ST_CURRENT_R);
00099     }
00100
00101 #else
00102
00103     #error Unimplemented value for CONFIG_TIMER
00104 #endif /* CONFIG_TIMER */
00105
00106 void timer_hw_init(void);
00107 void timer_hw_exit(void);
00108
00109 #endif /* TIMER_CM3_H */


BeRTOS: timer_dsp56k.h File Reference

  • cpu
  • dsp56k
  • drv
Defines | Typedefs
timer_dsp56k.h File Reference

Driver module for DSP56K. More...

#include "timer.h"
#include <DSP56F807.h>
#include <cfg/compiler.h>
#include <hw.h>
#include <drv/irq.h>

Go to the source code of this file.

Defines

#define | TIMER_PRESCALER 16
Prescaler for the system timer.
#define | TIMER_HW_HPTICKS_PER_SEC (IPBUS_FREQ / TIMER_PRESCALER)
Frequency of the hardware high precision timer.

Typedefs

typedef uint16_t | hptime_t
Type of time expressed in ticks of the hardware high precision timer.

Detailed Description

Driver module for DSP56K.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file timer_dsp56k.h.


BeRTOS: timer_dsp56k.h Source File

  • cpu
  • dsp56k
  • drv
timer_dsp56k.h
Go to the documentation of this file.
00001 #error This code must be revised for the new timer API
00002
00041 /*#*
00042  *#* $Log$
00043  *#* Revision 1.10  2006/07/19 12:56:26  bernie
00044  *#* Convert to new Doxygen style.
00045  *#*
00046  *#* Revision 1.9  2006/02/21 21:28:02  bernie
00047  *#* New time handling based on TIMER_TICKS_PER_SEC to support slow timers with ticks longer than 1ms.
00048  *#*
00049  *#* Revision 1.8  2005/11/04 16:20:02  bernie
00050  *#* Fix reference to README.devlib in header.
00051  *#*
00052  *#* Revision 1.7  2005/04/11 19:10:28  bernie
00053  *#* Include top-level headers from cfg/ subdir.
00054  *#*
00055  *#* Revision 1.6  2004/11/16 22:37:14  bernie
00056  *#* Replace IPTR with iptr_t.
00057  *#*
00058  *#* Revision 1.5  2004/08/25 14:12:08  rasky
00059  *#* Aggiornato il comment block dei log RCS
00060  *#*
00061  *#* Revision 1.4  2004/07/30 14:27:49  rasky
00062  *#* Aggiornati alcuni file DSP56k per la nuova libreria di IRQ management
00063  *#*
00064  *#* Revision 1.3  2004/06/06 18:30:34  bernie
00065  *#* Import DSP56800 changes from SC.
00066  *#*
00067  *#* Revision 1.2  2004/06/03 11:27:09  bernie
00068  *#* Add dual-license information.
00069  *#*
00070  *#* Revision 1.1  2004/05/23 18:23:30  bernie
00071  *#* Import drv/timer module.
00072  *#*
00073  *#*/
00074
00075 #ifndef DRV_TIMER_DSP56K_H
00076 #define DRV_TIMER_DSP56K_H
00077
00078 #include "timer.h"
00079 #include <DSP56F807.h>
00080 #include <cfg/compiler.h>
00081 #include <hw.h>
00082 #include <drv/irq.h>
00083
00084 // Calculate register pointer and irq vector from hw.h setting
00085 #define REG_SYSTEM_TIMER          PP_CAT(REG_TIMER_, SYSTEM_TIMER)
00086 #define SYSTEM_TIMER_IRQ_VECTOR   PP_CAT(IRQ_TIMER_, SYSTEM_TIMER)
00087
00089 #define TIMER_PRESCALER           16
00090
00092 #define TIMER_HW_HPTICKS_PER_SEC           (IPBUS_FREQ / TIMER_PRESCALER)
00093
00095 typedef uint16_t hptime_t;
00096
00097 static void system_timer_isr(UNUSED(iptr_t, arg));
00098
00099 static void timer_hw_init(void)
00100 {
00101     uint16_t compare;
00102
00103     // Clear compare flag status and enable interrupt on compare
00104     REG_SYSTEM_TIMER->SCR &= ~REG_TIMER_SCR_TCF;
00105     REG_SYSTEM_TIMER->SCR |= REG_TIMER_SCR_TCFIE;
00106
00107     // Calculate the compare value needed to generate an interrupt exactly
00108     //  TICKS_PER_SEC times each second (usually, every millisecond). Check that
00109     //  the calculation is accurate, otherwise there is a precision error
00110     // (probably the prescaler is too big or too small).
00111     compare = TIMER_HW_HPTICKS_PER_SEC / TICKS_PER_SEC;
00112     ASSERT((uint32_t)compare * TICKS_PER_SEC == IPBUS_FREQ / TIMER_PRESCALER);
00113     REG_SYSTEM_TIMER->CMP1 = compare;
00114
00115     // The value for reload (at initializationa and after compare is met) is zero
00116     REG_SYSTEM_TIMER->LOAD = 0;
00117
00118     // Set the interrupt handler and priority
00119     irq_install(SYSTEM_TIMER_IRQ_VECTOR, &system_timer_isr, NULL);
00120     irq_setpriority(SYSTEM_TIMER_IRQ_VECTOR, IRQ_PRIORITY_SYSTEM_TIMER);
00121
00122     // Small preprocessor trick to generate the REG_TIMER_CTRL_PRIMARY_IPBYNN macro
00123     //  needed to set the prescaler
00124     #define REG_CONTROL_PRESCALER             PP_CAT(REG_TIMER_CTRL_PRIMARY_IPBY, TIMER_PRESCALER)
00125
00126     // Setup the counter and start counting
00127     REG_SYSTEM_TIMER->CTRL =
00128         REG_TIMER_CTRL_MODE_RISING    |          // count rising edges (normal)
00129         REG_CONTROL_PRESCALER         |          // frequency (IPbus / TIMER_PRESCALER)
00130         REG_TIMER_CTRL_LENGTH;                   // up to CMP1, then reload
00131 }
00132
00133 INLINE void timer_hw_irq(void)
00134 {
00135     // Clear the overflow flag so that we are ready for another interrupt
00136     REG_SYSTEM_TIMER->SCR &= ~REG_TIMER_SCR_TCF;
00137 }
00138
00139 INLINE hptime_t timer_hw_hpread(void)
00140 {
00141     return REG_SYSTEM_TIMER->CNTR;
00142 }
00143
00144 #define DEFINE_TIMER_ISR \
00145     static void system_timer_isr(UNUSED(iptr_t, arg))
00146
00147 #endif /* DRV_TIMER_DSP56_H */


BeRTOS: timer_i196.h File Reference

  • cpu
  • i196
  • drv
Defines
timer_i196.h File Reference

Low-level timer module for AVR. More...

Go to the source code of this file.

Defines

#define TIMER_RETRIGGER (TIMER2 -= TICKS_RATE)
Retrigger TIMER2, adjusting the time to account for the interrupt prologue latency.

Detailed Description

Low-level timer module for AVR.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file timer_i196.h.


BeRTOS: timer_i196.h Source File

  • cpu
  • i196
  • drv
timer_i196.h
Go to the documentation of this file.
00001 #error This code must be revised for the new timer API
00002
00041 /*#*
00042  *#* $Log$
00043  *#* Revision 1.7  2006/07/19 12:56:26  bernie
00044  *#* Convert to new Doxygen style.
00045  *#*
00046  *#* Revision 1.6  2006/02/21 21:28:02  bernie
00047  *#* New time handling based on TIMER_TICKS_PER_SEC to support slow timers with ticks longer than 1ms.
00048  *#*
00049  *#* Revision 1.5  2005/11/04 16:20:02  bernie
00050  *#* Fix reference to README.devlib in header.
00051  *#*
00052  *#* Revision 1.4  2004/12/13 11:51:08  bernie
00053  *#* DISABLE_INTS/ENABLE_INTS: Convert to IRQ_DISABLE/IRQ_ENABLE.
00054  *#*
00055  *#* Revision 1.3  2004/08/25 14:12:08  rasky
00056  *#* Aggiornato il comment block dei log RCS
00057  *#*
00058  *#* Revision 1.2  2004/06/03 11:27:09  bernie
00059  *#* Add dual-license information.
00060  *#*
00061  *#* Revision 1.1  2004/05/23 18:23:30  bernie
00062  *#* Import drv/timer module.
00063  *#*
00064  *#*/
00065
00066 #ifndef TIMER_I196_H
00067 #define TIMER_I196_H
00068
00073 #define TIMER_RETRIGGER (TIMER2 -= TICKS_RATE)
00074
00075 #define TIMER_INIT \
00076     TIMER2 = (65535 - TICKS_RATE); \
00077     INT_MASK1 |= INT1F_T2OVF; \
00078     ATOMIC( \
00079         WSR = 1; \
00080         IOC3 |= IOC3F_T2_ENA; \
00081         WSR = 0; \
00082     )
00083
00084 #define DEFINE_TIMER_ISR \
00085     INTERRUPT(0x38) void TM2_OVFL_interrupt(void);  \
00086     INTERRUPT(0x38) void TM2_OVFL_interrupt(void)
00087
00088 #endif /* DRV_TIMER_I196_H */


BeRTOS: timer_lpc2.c File Reference

  • cpu
  • arm
  • drv
Defines
timer_lpc2.c File Reference

Low-level timer module for LPC2xxx (implementation). More...

#include "cfg/cfg_timer.h"
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <drv/vic_lpc2.h>
#include <io/lpc23xx.h>
#include "timer_lpc2.h"

Go to the source code of this file.

Defines

#define TIMER0_ID 4
HW dependent timer initialization.

Detailed Description

Low-level timer module for LPC2xxx (implementation).

Author:
Francesco Sacchi <batt@develer.com>

Definition in file timer_lpc2.c.


BeRTOS: timer_lpc2.c Source File

  • cpu
  • arm
  • drv
timer_lpc2.c
Go to the documentation of this file.
00001
00039 #include "cfg/cfg_timer.h"
00040 #include <cfg/macros.h> // BV()
00041 #include <cfg/debug.h> // BV()
00042
00043 #include <drv/vic_lpc2.h>
00044 #include <io/lpc23xx.h>
00045 #include "timer_lpc2.h"
00046
00048 #if (CONFIG_TIMER == TIMER0_COMPARE0)
00049     #define TIMER0_ID 4
00050     void timer_hw_init(void)
00051     {
00052         /* Power on timer0 */
00053         PCONP |= BV(1);
00054
00055         /* Set TIMER0 clk to CPU_FREQ */
00056         PCLKSEL0 &= ~0x0C;
00057         PCLKSEL0 |= 0x04;
00058
00059         /* reset prescaler counter */
00060         T0PR = 0;
00061
00062         /* Set match register 0 */
00063         T0MR0 = TIMER_HW_CNT;
00064         /* IRQ and reset counter on compare match 0 */
00065         T0MCR &= ~0x03;
00066         T0MCR |= 0x03;
00067         /* Reset timer0 counter and prescaler */
00068         T0TCR = 0x02;
00069
00070         vic_setVector(TIMER0_ID, timer_handler);
00071         vic_enable(TIMER0_ID);
00072
00073         /* Start timer0 */
00074         T0TCR = 0x01;
00075     }
00076
00077
00078 #else
00079     #error Unimplemented value for CONFIG_TIMER
00080 #endif /* CONFIG_TIMER */
00081


BeRTOS: timer_lpc2.h File Reference

  • cpu
  • arm
  • drv
timer_lpc2.h File Reference

Low-level timer module for NXP LPC2xxx (interface). More...

#include <hw/hw_cpufreq.h>
#include "cfg/cfg_timer.h"
#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <io/lpc23xx.h>

Go to the source code of this file.

Values for CONFIG_TIMER.

Select which hardware timer interrupt to use for system clock and softtimers.

#define | TIMER0_COMPARE0 0
System timer on Timer0 Compare match0.
#define | TIMER_DEFAULT TIMER0_COMPARE0
Default system timer.
#define | DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(timer_handler)
System timer on Timer0 Compare match0.
#define | TIMER_TICKS_PER_SEC 1000
System timer on Timer0 Compare match0.
#define | TIMER_HW_CNT (CPU_FREQ / TIMER_TICKS_PER_SEC - 1)
System timer on Timer0 Compare match0.
#define | TIMER_HW_HPTICKS_PER_SEC (CPU_FREQ)
Frequency of the hardware high-precision timer.
#define | SIZEOF_HPTIME_T 4
System timer on Timer0 Compare match0.
typedef uint32_t | hptime_t
Type of time expressed in ticks of the hardware high-precision timer.
ISR_PROTO_CONTEXT_SWITCH (timer_handler)
System timer on Timer0 Compare match0.
void | timer_hw_irq (void)
System timer on Timer0 Compare match0.
bool | timer_hw_triggered (void)
System timer on Timer0 Compare match0.
hptime_t | timer_hw_hpread (void)
System timer on Timer0 Compare match0.
void | timer_hw_init (void)
HW dependent timer initialization.

Detailed Description

Low-level timer module for NXP LPC2xxx (interface).

Author:
Francesco Sacchi <batt@develer.com>

Definition in file timer_lpc2.h.

Define Documentation

#define TIMER_HW_HPTICKS_PER_SEC (CPU_FREQ)

Frequency of the hardware high-precision timer.

Definition at line 71 of file timer_lpc2.h.


BeRTOS: timer_lpc2.h Source File

  • cpu
  • arm
  • drv
timer_lpc2.h
Go to the documentation of this file.
00001
00038 #ifndef DRV_LPC2_TIMER_H
00039 #define DRV_LPC2_TIMER_H
00040
00041 #include <hw/hw_cpufreq.h>     /* CPU_FREQ */
00042
00043 #include "cfg/cfg_timer.h"     /* CONFIG_TIMER */
00044 #include <cfg/compiler.h>      /* uint8_t */
00045 #include <cfg/macros.h>        /* BV */
00046
00047 #include <io/lpc23xx.h>
00048
00056 #define TIMER0_COMPARE0 0  ///< System timer on Timer0 Compare match0
00057
00058 #define TIMER_DEFAULT TIMER0_COMPARE0  ///< Default system timer
00059
00060 /*
00061  * Hardware dependent timer initialization.
00062  */
00063 #if (CONFIG_TIMER == TIMER0_COMPARE0)
00064     ISR_PROTO_CONTEXT_SWITCH(timer_handler);
00065     #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(timer_handler)
00066
00067     #define TIMER_TICKS_PER_SEC  1000
00068     #define TIMER_HW_CNT         (CPU_FREQ / TIMER_TICKS_PER_SEC - 1)
00069
00071     #define TIMER_HW_HPTICKS_PER_SEC (CPU_FREQ)
00072
00074     typedef uint32_t hptime_t;
00075     #define SIZEOF_HPTIME_T 4
00076
00077     INLINE void timer_hw_irq(void)
00078     {
00079         /* Reset The match0 irq flag */
00080         T0IR = 0x01;
00081         /* Signal the VIC we have completed the ISR */
00082         VICVectAddr = 0;
00083     }
00084
00085     INLINE bool timer_hw_triggered(void)
00086     {
00087         return true;
00088     }
00089
00090     INLINE hptime_t timer_hw_hpread(void)
00091     {
00092         return T0TC;
00093     }
00094
00095 #else
00096
00097     #error Unimplemented value for CONFIG_TIMER
00098 #endif /* CONFIG_TIMER */
00099
00100 void timer_hw_init(void);
00101
00102
00103 #endif /* DRV_LPC2_TIMER_H */


BeRTOS: timer_mega.c File Reference

  • cpu
  • avr
  • drv
Functions
timer_mega.c File Reference

Low-level timer module for AVR MEGA (implementation). More...

#include <drv/timer_mega.h>
#include <cfg/macros.h>
#include <cpu/types.h>
#include <cpu/irq.h>
#include <avr/io.h>

Go to the source code of this file.

Functions

void timer_hw_init (void)
HW dependent timer initialization.

Detailed Description

Low-level timer module for AVR MEGA (implementation).

Author:
Bernie Innocenti <bernie@codewiz.org>
Francesco Sacchi <batt@develer.com>
Luca Ottaviano <lottaviano@develer.com>

This module is automatically included so no need to include in test list.

Definition in file timer_mega.c.


BeRTOS: timer_mega.c Source File

  • cpu
  • avr
  • drv
timer_mega.c
Go to the documentation of this file.
00001
00044 #include <drv/timer_mega.h>
00045 #include <cfg/macros.h> // BV()
00046
00047 #include <cpu/types.h>
00048 #include <cpu/irq.h>
00049
00050 #include <avr/io.h>
00051
00052 #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA2560
00053     #define REG_TIFR0 TIFR0
00054     #define REG_TIFR1 TIFR1
00055     #define REG_TIFR2 TIFR2
00056     #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
00057         #define REG_TIFR3 TIFR3
00058     #endif
00059
00060     #define REG_TIMSK0 TIMSK0
00061     #define REG_TIMSK1 TIMSK1
00062     #define REG_TIMSK2 TIMSK2
00063     #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
00064         #define REG_TIMSK3 TIMSK3
00065     #endif
00066
00067     #define REG_TCCR0A TCCR0A
00068     #define REG_TCCR0B TCCR0B
00069
00070     #define REG_TCCR2A TCCR2A
00071     #define REG_TCCR2B TCCR2B
00072
00073     #define REG_OCR0A  OCR0A
00074     #define REG_OCR2A  OCR2A
00075
00076     #define BIT_OCF0A  OCF0A
00077     #define BIT_OCF2A  OCF2A
00078
00079     #define BIT_OCIE0A OCIE0A
00080     #define BIT_OCIE2A OCIE2A
00081 #else
00082     #define REG_TIFR0 TIFR
00083     #define REG_TIFR1 TIFR
00084     #define REG_TIFR2 TIFR
00085     #define REG_TIFR3 TIFR
00086
00087     #define REG_TIMSK0 TIMSK
00088     #define REG_TIMSK1 TIMSK
00089     #define REG_TIMSK2 TIMSK
00090     #define REG_TIMSK3 ETIMSK
00091
00092     #define REG_TCCR0A TCCR0
00093     #define REG_TCCR0B TCCR0
00094
00095     #define REG_TCCR2A TCCR2
00096     #define REG_TCCR2B TCCR2
00097
00098     #define REG_OCR0A  OCR0
00099     #define REG_OCR2A  OCR2
00100
00101     #define BIT_OCF0A  OCF0
00102     #define BIT_OCF2A  OCF2
00103
00104     #define BIT_OCIE0A OCIE0
00105     #define BIT_OCIE2A OCIE2
00106 #endif
00107
00108 #if CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA103
00109     /* These ATMega have different prescaler options. */
00110     #define TIMER0_PRESCALER_64 BV(CS02)
00111     #define TIMER2_PRESCALER_64 (BV(CS21) | BV(CS20))
00112 #else
00113     #define TIMER0_PRESCALER_64 (BV(CS01) | BV(CS00))
00114     #define TIMER2_PRESCALER_64 BV(CS22)
00115 #endif
00116
00118 #if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0)
00119
00120     void timer_hw_init(void)
00121     {
00122         cpu_flags_t flags;
00123         IRQ_SAVE_DISABLE(flags);
00124
00125         /* Reset Timer flags */
00126         REG_TIFR0 = BV(BIT_OCF0A) | BV(TOV0);
00127
00128         /* Setup Timer/Counter interrupt */
00129         REG_TCCR0A = 0; // TCCR2 reg could be separate or a unique register with both A & B values, this is needed to
00130         REG_TCCR0B = 0;
00131
00132         REG_TCCR0A = BV(WGM01);             /* Clear on Compare match */
00133             #if TIMER_PRESCALER == 64
00134             REG_TCCR0B |= TIMER0_PRESCALER_64;
00135             #else
00136                 #error Unsupported value of TIMER_PRESCALER
00137             #endif
00138
00139         TCNT0 = 0x00;                 /* Initialization of Timer/Counter */
00140         REG_OCR0A = OCR_DIVISOR;           /* Timer/Counter Output Compare Register */
00141
00142         /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */
00143         REG_TIMSK0 &= ~BV(TOIE0);
00144         REG_TIMSK0 |= BV(BIT_OCIE0A);
00145
00146         IRQ_RESTORE(flags);
00147     }
00148
00149 #elif (CONFIG_TIMER == TIMER_ON_OVERFLOW1)
00150
00151     void timer_hw_init(void)
00152     {
00153         cpu_flags_t flags;
00154         IRQ_SAVE_DISABLE(flags);
00155
00156         /* Reset Timer overflow flag */
00157         REG_TIFR1 |= BV(TOV1);
00158
00159         /* Fast PWM mode, 9 bit, 24 kHz, no prescaling. */
00160         #if (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 9)
00161             TCCR1A |= BV(WGM11);
00162             TCCR1A &= ~BV(WGM10);
00163             TCCR1B |= BV(WGM12) | BV(CS10);
00164             TCCR1B &= ~(BV(WGM13) | BV(CS11) | BV(CS12));
00165         /* Fast PWM mode, 8 bit, 24 kHz, no prescaling. */
00166         #elif (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 8)
00167             TCCR1A |= BV(WGM10);
00168             TCCR1A &= ~BV(WGM11);
00169             TCCR1B |= BV(WGM12) | BV(CS10);
00170             TCCR1B &= ~(BV(WGM13) | BV(CS11) | BV(CS12));
00171         #else
00172             #error Unsupported value of TIMER_PRESCALER or TIMER_HW_BITS
00173         #endif
00174
00175         TCNT1 = 0x00;         /* initialization of Timer/Counter */
00176
00177         /* Enable timer interrupt: Timer/Counter1 Overflow */
00178         REG_TIMSK1 |= BV(TOIE1);
00179
00180         IRQ_RESTORE(flags);
00181     }
00182
00183 #elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2)
00184     void timer_hw_init(void)
00185     {
00186         cpu_flags_t flags;
00187         IRQ_SAVE_DISABLE(flags);
00188
00189         /* Reset Timer flags */
00190         REG_TIFR2 = BV(BIT_OCF2A) | BV(TOV2);
00191
00192         /* Setup Timer/Counter interrupt */
00193         REG_TCCR2A = 0; // TCCR2 reg could be separate or a unique register with both A & B values, this is needed to
00194         REG_TCCR2B = 0; // ensure correct initialization.
00195
00196         REG_TCCR2A = BV(WGM21);
00197         #if TIMER_PRESCALER == 64
00198             REG_TCCR2B |= TIMER2_PRESCALER_64;
00199         #else
00200             #error Unsupported value of TIMER_PRESCALER
00201         #endif
00202
00203         /* Clear on Compare match & prescaler = 64, internal sys clock.
00204            When changing prescaler change TIMER_HW_HPTICKS_PER_SEC too */
00205         TCNT2 = 0x00;         /* initialization of Timer/Counter */
00206         REG_OCR2A = (uint8_t)OCR_DIVISOR;   /* Timer/Counter Output Compare Register */
00207
00208         /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */
00209         REG_TIMSK2 &= ~BV(TOIE2);
00210         REG_TIMSK2 |= BV(BIT_OCIE2A);
00211
00212         IRQ_RESTORE(flags);
00213     }
00214
00215 #elif (CONFIG_TIMER == TIMER_ON_OVERFLOW3)
00216
00217     #if CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA32
00218         #error For select target there is not TIMER_ON_OVERFLOW3, please select an other one.
00219     #endif
00220
00221     void timer_hw_init(void)
00222     {
00223         cpu_flags_t flags;
00224         IRQ_SAVE_DISABLE(flags);
00225
00226         /* Reset Timer overflow flag */
00227         REG_TIFR3 |= BV(TOV3);
00228
00229         /* Fast PWM mode, 9 bit, 24 kHz, no prescaling. */
00230         #if (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 9)
00231             TCCR3A |= BV(WGM31);
00232             TCCR3A &= ~BV(WGM30);
00233             TCCR3B |= BV(WGM32) | BV(CS30);
00234             TCCR3B &= ~(BV(WGM33) | BV(CS31) | BV(CS32));
00235         /* Fast PWM mode, 8 bit, 24 kHz, no prescaling. */
00236         #elif (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 8)
00237             TCCR3A |= BV(WGM30);
00238             TCCR3A &= ~BV(WGM31);
00239             TCCR3B |= BV(WGM32) | BV(CS30);
00240             TCCR3B &= ~(BV(WGM33) | BV(CS31) | BV(CS32));
00241         #else
00242             #error Unsupported value of TIMER_PRESCALER or TIMER_HW_BITS
00243         #endif
00244
00245         /* initialization of Timer/Counter */
00246         TCNT3 = 0x00;
00247
00248         /* Enable timer interrupt: Timer/Counter3 Overflow */
00249         REG_TIMSK3 |= BV(TOIE3);
00250
00251         IRQ_RESTORE(flags);
00252     }
00253
00254 #else
00255     #error Unimplemented value for CONFIG_TIMER
00256 #endif /* CONFIG_TIMER */
00257


BeRTOS: timer_mega.h File Reference

  • cpu
  • avr
  • drv
timer_mega.h File Reference

Low-level timer module for AVR MEGA (interface). More...

#include <hw/hw_cpufreq.h>
#include "cfg/cfg_timer.h"
#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <avr/io.h>
#include <avr/interrupt.h>

Go to the source code of this file.

Values for CONFIG_TIMER.

Select which hardware timer interrupt to use for system clock and softtimers.

Note:
The timer 1 overflow mode set the timer as a 24 kHz PWM.
#define | TIMER_ON_OUTPUT_COMPARE0 1
Default system timer.
#define | TIMER_ON_OVERFLOW1 2
Default system timer.
#define | TIMER_ON_OUTPUT_COMPARE2 3
Default system timer.
#define | TIMER_ON_OVERFLOW3 4
Default system timer.
#define | TIMER_DEFAULT TIMER_ON_OUTPUT_COMPARE0
Default system timer.
#define | TIMER_HW_HPTICKS_PER_SEC DIV_ROUND(CPU_FREQ, TIMER_PRESCALER)
Frequency of the hardware high precision timer.
#define | OCR_DIVISOR (DIV_ROUND(DIV_ROUND(CPU_FREQ, TIMER_PRESCALER), TIMER_TICKS_PER_SEC) - 1)
System timer: additional division after the prescaler 12288000 / 64 / 192 (0..191) = 1 ms.
#define | timer_hw_irq() do {} while (0)
Not needed, IRQ timer flag cleared automatically.
#define | timer_hw_triggered() (true)
Not needed, timer IRQ handler called only for timer source.
void | timer_hw_init (void)
HW dependent timer initialization.

Detailed Description

Low-level timer module for AVR MEGA (interface).

Author:
Bernie Innocenti <bernie@codewiz.org>
Francesco Sacchi <batt@develer.com>
Luca Ottaviano <lottaviano@develer.com>

Definition in file timer_mega.h.

Define Documentation

#define TIMER_HW_HPTICKS_PER_SEC DIV_ROUND(CPU_FREQ, TIMER_PRESCALER)

Frequency of the hardware high precision timer.

Definition at line 157 of file timer_mega.h.


BeRTOS: timer_mega.h Source File

  • cpu
  • avr
  • drv
timer_mega.h
Go to the documentation of this file.
00001
00042 #ifndef DRV_TIMER_MEGA_H
00043 #define DRV_TIMER_MEGA_H
00044
00045 #include <hw/hw_cpufreq.h>   /* CPU_FREQ */
00046
00047 #include "cfg/cfg_timer.h"   /* CONFIG_TIMER */
00048 #include <cfg/compiler.h>    /* uint8_t */
00049 #include <cfg/macros.h>      /* DIV_ROUND */
00050
00051 #include <avr/io.h>
00052 #include <avr/interrupt.h>
00053
00061 #define TIMER_ON_OUTPUT_COMPARE0  1
00062 #define TIMER_ON_OVERFLOW1        2
00063 #define TIMER_ON_OUTPUT_COMPARE2  3
00064 #define TIMER_ON_OVERFLOW3        4
00065
00066 #define TIMER_DEFAULT TIMER_ON_OUTPUT_COMPARE0 ///< Default system timer
00067
00068 /*
00069  * Hardware dependent timer initialization.
00070  */
00071 #if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0)
00072
00073     #define TIMER_PRESCALER      64
00074     #define TIMER_HW_BITS        8
00075     #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA2560
00076         #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(TIMER0_COMPA_vect)
00077     #else
00078         #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(TIMER0_COMP_vect)
00079     #endif
00080     #define TIMER_TICKS_PER_SEC  1000
00081     #define TIMER_HW_CNT         OCR_DIVISOR
00082
00084     typedef uint8_t hptime_t;
00085     #define SIZEOF_HPTIME_T 1
00086
00087     INLINE hptime_t timer_hw_hpread(void)
00088     {
00089         return TCNT0;
00090     }
00091
00092 #elif (CONFIG_TIMER == TIMER_ON_OVERFLOW1)
00093
00094     #define TIMER_PRESCALER      1
00095     #define TIMER_HW_BITS        8
00096
00097     #define TIMER_HW_CNT         (1 << TIMER_HW_BITS)
00098     #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(TIMER1_OVF_vect)
00099     #define TIMER_TICKS_PER_SEC  DIV_ROUND(TIMER_HW_HPTICKS_PER_SEC, TIMER_HW_CNT)
00100
00102     typedef uint16_t hptime_t;
00103     #define SIZEOF_HPTIME_T 2
00104
00105     INLINE hptime_t timer_hw_hpread(void)
00106     {
00107         return TCNT1;
00108     }
00109
00110 #elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2)
00111
00112     #define TIMER_PRESCALER      64
00113     #define TIMER_HW_BITS        8
00114     #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA2560
00115         #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(TIMER2_COMPA_vect)
00116     #else
00117         #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(TIMER2_COMP_vect)
00118     #endif
00119     #define TIMER_TICKS_PER_SEC  1000
00120
00121     #define TIMER_HW_CNT         OCR_DIVISOR
00122
00124     typedef uint8_t hptime_t;
00125     #define SIZEOF_HPTIME_T 1
00126
00127     INLINE hptime_t timer_hw_hpread(void)
00128     {
00129         return TCNT2;
00130     }
00131
00132 #elif (CONFIG_TIMER == TIMER_ON_OVERFLOW3)
00133
00134     #define TIMER_PRESCALER      1
00135     #define TIMER_HW_BITS        8
00136
00137     #define TIMER_HW_CNT         (1 << TIMER_HW_BITS)
00138     #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(TIMER3_OVF_vect)
00139     #define TIMER_TICKS_PER_SEC  DIV_ROUND(TIMER_HW_HPTICKS_PER_SEC, TIMER_HW_CNT)
00140
00142     typedef uint16_t hptime_t;
00143     #define SIZEOF_HPTIME_T 2
00144
00145     INLINE hptime_t timer_hw_hpread(void)
00146     {
00147         return TCNT3;
00148     }
00149
00150 #else
00151
00152     #error Unimplemented value for CONFIG_TIMER
00153 #endif /* CONFIG_TIMER */
00154
00155
00157 #define TIMER_HW_HPTICKS_PER_SEC  DIV_ROUND(CPU_FREQ, TIMER_PRESCALER)
00158
00163 #define OCR_DIVISOR  (DIV_ROUND(DIV_ROUND(CPU_FREQ, TIMER_PRESCALER), TIMER_TICKS_PER_SEC) - 1)
00164
00166 #define timer_hw_irq() do {} while (0)
00167
00169 #define timer_hw_triggered() (true)
00170
00171 void timer_hw_init(void);
00172
00173 #endif /* DRV_TIMER_MEGA_H */


BeRTOS: timer_posix.c File Reference

  • emul
Functions
timer_posix.c File Reference

Low-level timer module for Qt emulator (implementation). More...

#include <os/hptime.h>
#include <kern/irq.h>
#include <signal.h>
#include <string.h>
#include <sys/time.h>

Go to the source code of this file.

Functions

static void timer_hw_init (void)
HW dependent timer initialization.

Detailed Description

Low-level timer module for Qt emulator (implementation).

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file timer_posix.c.


BeRTOS: timer_posix.c Source File

  • emul
timer_posix.c
Go to the documentation of this file.
00001
00036 //#include <cfg/compiler.h> // hptime.t
00037 #include <os/hptime.h>
00038 #include <kern/irq.h>     // irq_register()
00039
00040 #if !CONFIG_KERN_IRQ
00041 #include <signal.h>       // sigaction()
00042 #include <string.h>       // memset()
00043 #endif
00044 #include <sys/time.h>     // setitimer()
00045
00046
00047 // Forward declaration for the user interrupt server routine.
00048 void timer_isr(int);
00049
00051 static void timer_hw_init(void)
00052 {
00053     #if CONFIG_KERN_IRQ
00054         irq_register(SIGALRM, (void (*)(void))timer_isr);
00055     #else // ! CONFIG_KERN_IRQ
00056         struct sigaction sa;
00057         memset(&sa, 0, sizeof(sa));
00058
00059         // Setup interrupt callback
00060         sa.sa_handler = timer_isr;
00061         sigemptyset(&sa.sa_mask);
00062         sigaddset(&sa.sa_mask, SIGALRM);
00063         sa.sa_flags = SA_RESTART;
00064         sigaction(SIGALRM, &sa, NULL);
00065     #endif // CONFIG_KERN_IRQ
00066
00067     // Setup POSIX realtime timer to interrupt every 1/TIMER_TICKS_PER_SEC.
00068     static const struct itimerval itv =
00069     {
00070         { 0, 1000000 / TIMER_TICKS_PER_SEC }, /* it_interval */
00071         { 0, 1000000 / TIMER_TICKS_PER_SEC }  /* it_value */
00072     };
00073     setitimer(ITIMER_REAL, &itv, NULL);
00074 }
00075
00076 static void timer_hw_cleanup(void)
00077 {
00078     static const struct itimerval itv =
00079     {
00080         { 0, 0 }, /* it_interval */
00081         { 0, 0 }  /* it_value */
00082     };
00083     setitimer(ITIMER_REAL, &itv, NULL);
00084     signal(SIGALRM, SIG_DFL);
00085 }
00086
00087 INLINE hptime_t timer_hw_hpread(void)
00088 {
00089     return hptime_get();
00090 }
00091
00092 #define timer_hw_triggered() (true)


BeRTOS: timer_posix.h File Reference

  • emul
Defines
timer_posix.h File Reference

Low-level timer module for POSIX systems (interface). More...

#include <os/hptime.h>

Go to the source code of this file.

Defines

#define | TIMER_TICKS_PER_SEC 250
Most Linux kernels can't do better than this (CONFIG_HZ=250).
#define | TIMER_HW_HPTICKS_PER_SEC HPTIME_TICKS_PER_SECOND
Frequency of the hardware high-precision timer.
#define | timer_hw_irq() do {} while (0)
Not needed.

Detailed Description

Low-level timer module for POSIX systems (interface).

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file timer_posix.h.

Define Documentation

#define TIMER_TICKS_PER_SEC 250

Most Linux kernels can't do better than this (CONFIG_HZ=250).

Definition at line 46 of file timer_posix.h.


BeRTOS: timer_posix.h Source File

  • emul
timer_posix.h
Go to the documentation of this file.
00001
00038 #ifndef DRV_TIMER_POSIX_H
00039 #define DRV_TIMER_POSIX_H
00040
00041 // HW dependent timer initialization
00042
00043 #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(timer_isr)
00044
00046 #define TIMER_TICKS_PER_SEC  250
00047
00048 #define TIMER_HW_CNT         (1<<31) /* We assume 32bit integers here */
00049
00050 #include <os/hptime.h>
00051
00053 #define TIMER_HW_HPTICKS_PER_SEC  HPTIME_TICKS_PER_SECOND
00054
00056 #define timer_hw_irq() do {} while (0)
00057
00058 #endif /* DRV_TIMER_POSIX_H */


BeRTOS: timer_qt.c File Reference

  • emul
Data Structures | Defines | Functions
timer_qt.c File Reference

Low-level timer module for Qt emulator (implementation). More...

#include <cfg/compiler.h>
#include <QtCore/QDateTime>
#include <QtCore/QTimer>
#include "timer_qt_moc.cpp"

Go to the source code of this file.

Data Structures

class | EmulTimer
Singleton class for Qt-based hardware timer emulation. More...

Defines

#define | timer_hw_triggered() (true)
Not needed, timer IRQ handler called only for timer source.

Functions

static void | timer_hw_init (void)
HW dependent timer initialization.

Detailed Description

Low-level timer module for Qt emulator (implementation).

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file timer_qt.c.


BeRTOS: timer_qt.c Source File

  • emul
timer_qt.c
Go to the documentation of this file.
00001
00038 #include <cfg/compiler.h> /* hptime.t */
00039
00040 // Qt headers
00041 #include <QtCore/QDateTime>
00042 #include <QtCore/QTimer>
00043
00044 #if CONFIG_KERN_IRQ
00045 #include <kern/irq.h>
00046 #endif
00047
00048
00049 // The user interrupt server routine
00050 void timer_isr(void);
00051
00052
00056 class EmulTimer : public QObject
00057 {
00058 private:
00059     Q_OBJECT;
00060
00062     QTime system_time;
00063
00065     QTimer timer;
00066
00071     bool initialized;
00072
00074     EmulTimer() : initialized(false) { }
00075
00076 public:
00078     static EmulTimer &instance()
00079     {
00080         static EmulTimer et;
00081         return et;
00082     }
00083
00085     void init()
00086     {
00087         // Timer initialized twice?
00088         ASSERT(!initialized);
00089
00090         // Record initial time
00091         system_time.start();
00092
00093         #if CONFIG_KERN_IRQ
00094             irq_register(SIGALRM, timer_isr);
00095         #endif
00096
00097         // Activate timer interrupt
00098         connect(&timer, SIGNAL(timeout()), SLOT(timerInterrupt()));
00099         timer.start(1000 / TIMER_TICKS_PER_SEC);
00100
00101         initialized = true;
00102     }
00103
00104     void cleanup()
00105     {
00106         // Timer cleaned twice?
00107         ASSERT(initialized);
00108
00109         timer.stop();
00110         timer.disconnect();
00111
00112         initialized = false;
00113     }
00114
00116     hptime_t hpread()
00117     {
00118         ASSERT(initialized);
00119         return system_time.elapsed();
00120     }
00121
00122 public slots:
00123     void timerInterrupt(void)
00124     {
00125         // Just call user interrupt server, timer restarts automatically.
00126         #if CONFIG_KERN_IRQ
00127             irq_entry(SIGALRM);
00128         #else
00129             timer_isr();
00130         #endif
00131     }
00132
00133 };
00134
00135 #include "timer_qt_moc.cpp"
00136
00137
00139 static void timer_hw_init(void)
00140 {
00141     EmulTimer::instance().init();
00142 }
00143
00144 static void timer_hw_cleanup(void)
00145 {
00146     EmulTimer::instance().cleanup();
00147 }
00148
00149 INLINE hptime_t timer_hw_hpread(void)
00150 {
00151     return EmulTimer::instance().hpread();
00152 }
00153
00155 #define timer_hw_triggered() (true)


BeRTOS: timer_qt.h File Reference

  • emul
Defines | Typedefs
timer_qt.h File Reference

Low-level timer module for Qt emulator (interface). More...

Go to the source code of this file.

Defines

#define | TIMER_HW_HPTICKS_PER_SEC 1000
Frequency of the hardware high-precision timer.
#define | timer_hw_irq() do {} while (0)
Not needed.

Typedefs

typedef unsigned int | hptime_t
Type of time expressed in ticks of the hardware high-precision timer.

Detailed Description

Low-level timer module for Qt emulator (interface).

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file timer_qt.h.


BeRTOS: timer_qt.h Source File

  • emul
timer_qt.h
Go to the documentation of this file.
00001
00038 #ifndef DRV_TIMER_QT_H
00039 #define DRV_TIMER_QT_H
00040
00041 // HW dependent timer initialization
00042
00043 #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(timer_isr)
00044 #define TIMER_TICKS_PER_SEC  250
00045 #define TIMER_HW_CNT         (1<<31) /* We assume 32bit integers here */
00046
00048 typedef unsigned int hptime_t;
00049 #define SIZEOF_HPTIME_T 4
00050
00052 #define TIMER_HW_HPTICKS_PER_SEC  1000
00053
00055 #define timer_hw_irq() do {} while (0)
00056
00057 #endif /* DRV_TIMER_QT_H */


BeRTOS: timer_simple_avr.c File Reference

  • cpu
  • avr
  • drv
timer_simple_avr.c File Reference

Some simple delay routines. More...

Go to the source code of this file.

Detailed Description

Some simple delay routines.

Simple serial driver

Author:
Francesco Sacchi <batt@develer.com>

Definition in file timer_simple_avr.c.


BeRTOS: timer_simple_avr.c Source File

  • cpu
  • avr
  • drv
timer_simple_avr.c
Go to the documentation of this file.
00001
00039 #warning FIXME:This module is obsolete, yuo must refactor it.
00040
00041 #if 0
00042 #include <hw/hw_cpufreq.h>
00043 #include "timer_simple_avr.h"
00044 #include <drv/wdt.h>
00045 #include <cfg/compiler.h>
00046 #include <cfg/macros.h> /* BV() */
00047
00048 #include <avr/io.h>
00049
00050
00051 #define MS_PER_SEC       1000UL
00052 #define TIMER_PRESCALER  64UL
00053 #define TIMER_DELAY_1MS  (255 - CPU_FREQ / TIMER_PRESCALER / MS_PER_SEC)
00054
00059 void timer_delay(mtime_t time)
00060 {
00061     /* Set timer clock to clock_freq/64 */
00062     TCCR0 = BV(CS02);
00063
00064     while (time--)
00065     {
00066         /* Initialize timer counter register */
00067         TCNT0 = TIMER_DELAY_1MS;
00068         /* Clear overflow bit. */
00069         TIFR |= BV(TOV0);
00070         /* Wait overflow. */
00071         while (!(TIFR & BV(TOV0)));
00072 #if CONFIG_WATCHDOG
00073         wdt_reset();
00074 #endif
00075     }
00076 }
00077 #endif
00078


BeRTOS: timer_simple_avr.h File Reference

  • cpu
  • avr
  • drv
timer_simple_avr.h File Reference

Simple delay routine. More...

Go to the source code of this file.

Detailed Description

Simple delay routine.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file timer_simple_avr.h.


BeRTOS: timer_simple_avr.h Source File

  • cpu
  • avr
  • drv
timer_simple_avr.h
Go to the documentation of this file.
00001
00037 #ifndef DRV_TIMER_SIMPLE_AVR_H
00038 #define DRV_TIMER_SIMPLE_AVR_H
00039
00040 #warning FIXME:This module is obsolete, yuo must refactor it.
00041
00042 #if 0
00043 #include <compiler.h>
00044
00045 extern void timer_delay(mtime_t time);
00046
00047 #endif /* TIMER_SIMPLE_H */
00048
00049 #endif


BeRTOS: timer_xmega.c File Reference

  • cpu
  • avr
  • drv
Functions
timer_xmega.c File Reference

Low-level timer module for AVR XMEGA (implementation). More...

#include <drv/timer_xmega.h>
#include <cfg/macros.h>
#include <cpu/types.h>
#include <cpu/irq.h>
#include <avr/io.h>

Go to the source code of this file.

Functions

void timer_hw_init (void)
HW dependent timer initialization.

Detailed Description

Low-level timer module for AVR XMEGA (implementation).

Author:
Onno <developer@gorgoz.org>

This file is heavily inspired by the AVR implementation for BeRTOS, but uses a different approach for implementing the different debug ports, by using the timer structs.

This module is automatically included so no need to include in test list.

Definition in file timer_xmega.c.


BeRTOS: timer_xmega.c Source File

  • cpu
  • avr
  • drv
timer_xmega.c
Go to the documentation of this file.
00001
00047 #include <drv/timer_xmega.h>
00048 #include <cfg/macros.h> // BV()
00049
00050 #include <cpu/types.h>
00051 #include <cpu/irq.h>
00052
00053 #include <avr/io.h>
00054
00055 /* Helper MACROS taken from the Atmel examples and altered
00056  *
00057  *  The AVR XMEGA has different structures for TC0 and TC1,
00058  *  however these only differ in the amount of compare/capture
00059  *  channels, so for this purpose they can be used exactly the same
00060   */
00061
00062 //check if the bitvalues of the TC0 and TC1 Timer/Counters are really the same
00063 #if TC0_CLKSEL_gm != TC1_CLKSEL_gm || TC0_WGMODE_gm != TC1_WGMODE_gm || TC0_OVFINTLVL_gm != TC1_OVFINTLVL_gm
00064     #error TC0 and TC1 Timer/Counters cannot be configured with the same bitvalues
00065 #endif
00066
00067 #define TIMER_CONFIG_CLOCK_SOURCE(_clkSel)\
00068     ((TIMERCOUNTER).CTRLA = ((TIMERCOUNTER).CTRLA & ~TC0_CLKSEL_gm) | _clkSel)
00069
00070 #define TIMER_CLEAR_FLAGS() ((TIMERCOUNTER).INTFLAGS = 0xFF)
00071
00072 #define TIMER_SET_PERIOD( _period ) ( (TIMERCOUNTER).PER = (_period) )
00073
00074 #define TIMER_SET_OVERFLOW_INTERRUPT_LEVEL( _interruptLevel )\
00075     ((TIMERCOUNTER).INTCTRLA = ( (TIMERCOUNTER).INTCTRLA & ~TC0_OVFINTLVL_gm ) | _interruptLevel)
00076
00077 #define TIMER_CONFIG_WGM(_wgm)\
00078     ((TIMERCOUNTER).CTRLB = ( (TIMERCOUNTER).CTRLB & ~TC0_WGMODE_gm ) | _wgm)
00079
00080 #define TIMER_RESET() ( (TIMERCOUNTER).CTRLFSET = TC_CMD_RESET_gc )
00081
00082 //Define TIMER_PRESCALE_REG_VALUE bases on the provided
00083 //TIMER_PRESCALER value
00084 #if TIMER_PRESCALER == 0
00085     #define TIMER_CLKSEL_gc             TC_CLKSEL_OFF_gc
00086 #elif TIMER_PRESCALER == 1
00087     #define TIMER_CLKSEL_gc             TC_CLKSEL_DIV1_gc
00088 #elif TIMER_PRESCALER == 2
00089     #define TIMER_CLKSEL_gc             TC_CLKSEL_DIV2_gc
00090 #elif TIMER_PRESCALER == 4
00091     #define TIMER_CLKSEL_gc             TC_CLKSEL_DIV4_gc
00092 #elif TIMER_PRESCALER == 16
00093     #define TIMER_CLKSEL_gc             TC_CLKSEL_DIV16_gc
00094 #elif TIMER_PRESCALER == 64
00095     #define TIMER_CLKSEL_gc             TC_CLKSEL_DIV64_gc
00096 #elif TIMER_PRESCALER == 256
00097     #define TIMER_CLKSEL_gc             TC_CLKSEL_DIV256_gc
00098 #elif TIMER_PRESCALER == 1024
00099     #define TIMER_CLKSEL_gc             TC_CLKSEL_DIV1024_gc
00100 #else
00101     #error Invalid value for TIMER_PRESCALER has been defined! Using default of 1
00102     #define TIMER_CLKSEL_gc             TC_CLKSEL_DIV1_gc
00103 #endif
00104
00105 void timer_hw_init(void)
00106 {
00107     //Save and disable IRQ
00108     cpu_flags_t flags;
00109     IRQ_SAVE_DISABLE(flags);
00110     //disable the timer
00111     TIMER_CONFIG_CLOCK_SOURCE(TC_CLKSEL_OFF_gc);
00112     //clear all flags
00113     TIMER_CLEAR_FLAGS();
00114     //setup the Periode register value
00115     //CNT register will be reset to 0 when CNT == PER
00116     TIMER_SET_PERIOD(TIMER_PERIOD_VALUE);
00117     //set the Waveform Generation Mode to Normal
00118     TIMER_CONFIG_WGM(TC_WGMODE_NORMAL_gc);
00119     //enable the overflow interrupt
00120     //use the highest priority
00121     TIMER_SET_OVERFLOW_INTERRUPT_LEVEL(TC_OVFINTLVL_HI_gc);
00122     //enable timer by setting the correct prescaler/clock
00123     TIMER_CONFIG_CLOCK_SOURCE(TIMER_CLKSEL_gc);
00124     //Restore IRQ
00125     IRQ_RESTORE(flags);
00126 }


BeRTOS: timer_xmega.h File Reference

  • cpu
  • avr
  • drv
Defines | Functions
timer_xmega.h File Reference

Low-level timer module for AVR XMEGA (interface). More...

#include <hw/hw_cpufreq.h>
#include "cfg/cfg_timer.h"
#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <avr/io.h>
#include <avr/interrupt.h>

Go to the source code of this file.

Defines

#define | TIMER_DEFAULT TIMER_USE_TCC1
Default system timer.
#define | TIMER_HW_HPTICKS_PER_SEC DIV_ROUND(CPU_FREQ, TIMER_PRESCALER)
Frequency of the hardware high precision timer.

Functions

void | timer_hw_init (void)
HW dependent timer initialization.

Detailed Description

Low-level timer module for AVR XMEGA (interface).

This file is heavily inspired by the AVR implementation for BeRTOS, but uses a different approach for implementing the different debug ports, by using the timer structs.

Author:
Onno <developer@gorgoz.org>

Definition in file timer_xmega.h.

Define Documentation

#define TIMER_HW_HPTICKS_PER_SEC DIV_ROUND(CPU_FREQ, TIMER_PRESCALER)

Frequency of the hardware high precision timer.

Definition at line 115 of file timer_xmega.h.


BeRTOS: timer_xmega.h Source File

  • cpu
  • avr
  • drv
timer_xmega.h
Go to the documentation of this file.
00001
00045 #ifndef DRV_TIMER_XMEGA_H
00046 #define DRV_TIMER_XMEGA_H
00047
00048 #include <hw/hw_cpufreq.h>   /* CPU_FREQ */
00049
00050 #include "cfg/cfg_timer.h"   /* CONFIG_TIMER */
00051 #include <cfg/compiler.h>    /* uint8_t */
00052 #include <cfg/macros.h>      /* DIV_ROUND */
00053
00054 #include <avr/io.h>
00055 #include <avr/interrupt.h>
00056
00057 /*
00058  * \name Values for CONFIG_TIMER.
00059  *
00060  * Select which hardware timer interrupt to use for system clock and softtimers.
00061  * $WIZ$ timer_select = "TIMER_USE_TCC0", "TIMER_USE_TCC1", "TIMER_USE_TCD0", "TIMER_USE_TCE0", "TIMER_USE_TCD1", "TIMER_DEFAULT"
00062  */
00063 #define TIMER_USE_TCC0    1
00064 #define TIMER_USE_TCC1    2
00065 #define TIMER_USE_TCD0    3
00066 #define TIMER_USE_TCE0    4
00067 // The XMEGA A Family has one extra timer
00068 #ifdef CPU_AVR_XMEGA_A
00069     #define TIMER_USE_TCD1    5
00070 #endif
00071
00072 #define TIMER_DEFAULT TIMER_USE_TCC1 ///< Default system timer
00073
00074 /*
00075  * Hardware dependent timer initialization.
00076  */
00077 #if (CONFIG_TIMER == TIMER_USE_TCC0)
00078     #define TIMER_OVF_VECT  TCC0_OVF_vect
00079     #define TIMERCOUNTER    TCC0
00080 #elif (CONFIG_TIMER == TIMER_USE_TCC1)
00081     #define TIMER_OVF_VECT  TCC1_OVF_vect
00082     #define TIMERCOUNTER    TCC1
00083 #elif (CONFIG_TIMER == TIMER_USE_TCD0)
00084     #define TIMER_OVF_VECT  TCD0_OVF_vect
00085     #define TIMERCOUNTER    TCD0
00086 #elif (CONFIG_TIMER == TIMER_USE_TCE0)
00087     #define TIMER_OVF_VECT  TCE0_OVF_vect
00088     #define TIMERCOUNTER    TCE0
00089 #elif (CONFIG_TIMER == TIMER_USE_TCD1)
00090     #define TIMER_OVF_VECT  TCD1_OVF_vect
00091     #define TIMERCOUNTER    TCD1
00092 #else
00093     #error Unimplemented value for CONFIG_TIMER
00094 #endif /* CONFIG_TIMER */
00095
00096 //define the Interrupt Service Routine for this Timer Mode
00097 #define DEFINE_TIMER_ISR            DECLARE_ISR_CONTEXT_SWITCH(TIMER_OVF_VECT)
00098 //define the Ticks per second we want
00099 #define TIMER_TICKS_PER_SEC         1000
00100 //define the Prescaler to use, which is dependend on the amount
00101 //of ticks per second, the maximum value for the TOP value of the
00102 //timer (0xFFFF) and the clock frequency.
00103 //The maximum clock frequency is 32Mhz, so as long as the TIMER_TICKS_PER_SEC
00104 //is larger then (about) 500 no prescaler is required.
00105 #define TIMER_PRESCALER             1
00106 //define the TOP/PERIOD value
00107 #define TIMER_PERIOD_VALUE          DIV_ROUND(DIV_ROUND(CPU_FREQ, TIMER_PRESCALER), TIMER_TICKS_PER_SEC)
00108 //check if the TIMER_PRESCALER is large enough to accomate for the TIMER_TICKS_PER_SEC
00109 #if TIMER_PERIOD_VALUE > 0xFFFF
00110     #error Timer cannot generate the required Ticks per second, please adjust TIMER_PRESCALER
00111 #endif
00112 //define TIMER_HW_CNT it is used by the timer.c module to determine the 'edge' of the hardware counter
00113 #define TIMER_HW_CNT                TIMER_PERIOD_VALUE
00114
00115 #define TIMER_HW_HPTICKS_PER_SEC    DIV_ROUND(CPU_FREQ, TIMER_PRESCALER)
00116
00117 // Type of time expressed in ticks of the hardware high-precision timer
00118 typedef uint16_t hptime_t;
00119 #define SIZEOF_HPTIME_T 2
00120
00121 INLINE hptime_t timer_hw_hpread(void)
00122 {
00123     return (TIMERCOUNTER).CNT;
00124 }
00125
00126 /* Not needed, IRQ timer flag cleared automatically */
00127 #define timer_hw_irq() do {} while (0)
00128
00129 /* Not needed, timer IRQ handler called only for timer source */
00130 #define timer_hw_triggered() (true)
00131
00132 void timer_hw_init(void);
00133
00134 #endif /* DRV_TIMER_XMEGA_H */


BeRTOS: tlv5618.c File Reference

  • drv
Functions
tlv5618.c File Reference
#include "tlv5618.h"
#include "hw/hw_tlv5618.h"
#include <io/kfile.h>
#include <string.h>

Go to the source code of this file.

Functions

void | tlv5618_setOutA (Tlv5618 *ctx, uint16_t val)
Set DAC output A to val.
void | tlv5618_setOutB (Tlv5618 *ctx, uint16_t val)
Set DAC output B to val.
void | tlv5618_setPowerDown (Tlv5618 *ctx)
Set the TLV5618 in the power down state.
void | tlv5618_init (Tlv5618 *ctx, KFile *ch, int cs_pin)
Init the TLV5618 with CS connected to cs_pin.

Detailed Description

Author:
Francesco Sacchi <batt@develer.com>

Texas instrument TLV5618 DAC driver.

Definition in file tlv5618.c.

Function Documentation

void tlv5618_init | ( | Tlv5618 * | ctx,
 |  | KFile * | ch,
 |  | int | cs_pin
 | ) |  |

Init the TLV5618 with CS connected to cs_pin.

ch should be the SPI channel needed to communicate with the DAC. This SPI should also be correctly configured (the MOSI should change on the rising edge of the SCK clock).

Note:
the device is set in power down mode.

Definition at line 97 of file tlv5618.c.

void tlv5618_setOutA | ( | Tlv5618 * | ctx,
 |  | uint16_t | val
 | ) |  |

Set DAC output A to val.

val ranges from 0 to 4095 (12 bit).

Note:
: if in power down, the device will be awaken.

Definition at line 64 of file tlv5618.c.

void tlv5618_setOutB | ( | Tlv5618 * | ctx,
 |  | uint16_t | val
 | ) |  |

Set DAC output B to val.

val ranges from 0 to 4095 (12 bit).

Note:
: if in power down, the device will be awaken.

Definition at line 75 of file tlv5618.c.


BeRTOS: tlv5618.c Source File

  • drv
tlv5618.c
Go to the documentation of this file.
00001
00038 #include "tlv5618.h"
00039 #include "hw/hw_tlv5618.h"
00040
00041 #include <io/kfile.h>
00042
00043 #include <string.h> //memset
00044
00045
00046 static void tlv5618_write(Tlv5618 *ctx, uint16_t val)
00047 {
00048     TLV5618_CSLOW(ctx->cs_pin);
00049     kfile_putc(val >> 8, ctx->ch);
00050     kfile_putc(val & 0xFF, ctx->ch);
00051     kfile_flush(ctx->ch);
00052     TLV5618_CSHIGH(ctx->cs_pin);
00053 }
00054
00055 #define POWERDOWN 0x2000
00056 #define OUTA 0xC000
00057 #define OUTB 0x4000
00058
00064 void tlv5618_setOutA(Tlv5618 *ctx, uint16_t val)
00065 {
00066     val &= 0x0FFF;
00067     tlv5618_write(ctx, val | OUTA);
00068 }
00069
00075 void tlv5618_setOutB(Tlv5618 *ctx, uint16_t val)
00076 {
00077     val &= 0x0FFF;
00078     tlv5618_write(ctx, val | OUTB);
00079 }
00080
00084 void tlv5618_setPowerDown(Tlv5618 *ctx)
00085 {
00086     tlv5618_write(ctx, POWERDOWN);
00087 }
00088
00089
00097 void tlv5618_init(Tlv5618 *ctx, KFile *ch, int cs_pin)
00098 {
00099     memset(ctx, 0, sizeof(*ctx));
00100     ctx->cs_pin = cs_pin;
00101     ctx->ch = ch;
00102     TLV5618_CSINIT(cs_pin);
00103     tlv5618_setPowerDown(ctx);
00104 }


BeRTOS: tlv5618.h File Reference

  • drv
Functions
tlv5618.h File Reference

Texas instrument TLV5618 DAC driver. More...

#include <cfg/compiler.h>
#include <io/kfile.h>

Go to the source code of this file.

Functions

void | tlv5618_setOutA (Tlv5618 *ctx, uint16_t val)
Set DAC output A to val.
void | tlv5618_setOutB (Tlv5618 *ctx, uint16_t val)
Set DAC output B to val.
void | tlv5618_setPowerDown (Tlv5618 *ctx)
Set the TLV5618 in the power down state.
void | tlv5618_init (Tlv5618 *ctx, KFile *ch, int pin)
Init the TLV5618 with CS connected to cs_pin.

Detailed Description

Texas instrument TLV5618 DAC driver.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file tlv5618.h.

Function Documentation

void tlv5618_init | ( | Tlv5618 * | ctx,
 |  | KFile * | ch,
 |  | int | cs_pin
 | ) |  |

Init the TLV5618 with CS connected to cs_pin.

ch should be the SPI channel needed to communicate with the DAC. This SPI should also be correctly configured (the MOSI should change on the rising edge of the SCK clock).

Note:
the device is set in power down mode.

Definition at line 97 of file tlv5618.c.

void tlv5618_setOutA | ( | Tlv5618 * | ctx,
 |  | uint16_t | val
 | ) |  |

Set DAC output A to val.

val ranges from 0 to 4095 (12 bit).

Note:
: if in power down, the device will be awaken.

Definition at line 64 of file tlv5618.c.

void tlv5618_setOutB | ( | Tlv5618 * | ctx,
 |  | uint16_t | val
 | ) |  |

Set DAC output B to val.

val ranges from 0 to 4095 (12 bit).

Note:
: if in power down, the device will be awaken.

Definition at line 75 of file tlv5618.c.


BeRTOS: tlv5618.h Source File

  • drv
tlv5618.h
Go to the documentation of this file.
00001
00042 #ifndef DRV_TLV5618_H
00043 #define DRV_TLV5618_H
00044
00045 #include <cfg/compiler.h>
00046 #include <io/kfile.h>
00047
00048 typedef struct Tlv5618
00049 {
00050     KFile *ch;
00051     int cs_pin;
00052 } Tlv5618;
00053
00054 void tlv5618_setOutA(Tlv5618 *ctx, uint16_t val);
00055 void tlv5618_setOutB(Tlv5618 *ctx, uint16_t val);
00056 void tlv5618_setPowerDown(Tlv5618 *ctx);
00057 void tlv5618_init(Tlv5618 *ctx, KFile *ch, int pin);
00058
00059 #endif /* DRV_TLV5618_H */


BeRTOS: tmp123.c File Reference

  • drv
Functions
tmp123.c File Reference

TMP123 Texas Intrument sensor temperature. More...

#include "tmp123.h"
#include "hw/hw_tmp123.h"
#include <cfg/module.h>
#include <cpu/byteorder.h>
#include <io/kfile.h>
#include <drv/ntc.h>

Go to the source code of this file.

Functions

deg_t | tmp123_read (KFile *fd)
Read temperature from TMP123 chip.
void | tmp123_init (void)
Init module.

Detailed Description

TMP123 Texas Intrument sensor temperature.

Author:
Daniele Basile <asterix@develer.com>

Definition in file tmp123.c.


BeRTOS: tmp123.c Source File

  • drv
tmp123.c
Go to the documentation of this file.
00001
00039 #include "tmp123.h"
00040
00041 #include "hw/hw_tmp123.h"
00042
00043 #include <cfg/module.h>
00044
00045 #include <cpu/byteorder.h>
00046
00047 #include <io/kfile.h>
00048
00049 #include <drv/ntc.h> // Macro and data type to manage celsius degree
00050
00054 deg_t tmp123_read(KFile *fd)
00055 {
00056     int16_t tmp;
00057
00058     TMP123_HW_CS_EN();
00059     kfile_read(fd, &tmp, sizeof(tmp));
00060     tmp = be16_to_cpu(tmp);
00061     TMP123_HW_CS_DIS();
00062
00063     tmp >>= 3;
00064     return DIV_ROUND((tmp * 10), 16);
00065 }
00069 void tmp123_init(void)
00070 {
00071     TMP123_HW_INIT();
00072 }
00073
00074


BeRTOS: tmp123.h File Reference

  • drv
Functions
tmp123.h File Reference

TMP123 Texas Intrument sensor temperature. More...

#include <cpu/types.h>
#include <io/kfile.h>
#include <drv/ntc.h>

Go to the source code of this file.

Functions

deg_t | tmp123_read (KFile *fd)
Read temperature from TMP123 chip.
void | tmp123_init (void)
Init module.

Detailed Description

TMP123 Texas Intrument sensor temperature.

Author:
Daniele Basile <asterix@develer.com>

Definition in file tmp123.h.


BeRTOS: tmp123.h Source File

  • drv
tmp123.h
Go to the documentation of this file.
00001
00043 #ifndef DRV_TMP123_H
00044 #define DRV_TMP123_H
00045
00046 #include <cpu/types.h>
00047
00048 #include <io/kfile.h>
00049
00050 #include <drv/ntc.h> // Macro and data type to manage celsius degree
00051
00052 deg_t tmp123_read(KFile *fd);
00053
00054 void tmp123_init(void);
00055
00056 #endif /* DRV_TMP123_H */


BeRTOS: twi_arm.c File Reference

  • cpu
  • arm
  • drv
twi_arm.c File Reference

Low-level TWI module for ARM (inplementation). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level TWI module for ARM (inplementation).

Author:
Daniele Basile <asterix@develer.com>

This module is automatically included so no need to include in test list.

Definition in file twi_arm.c.


BeRTOS: twi_arm.c Source File

  • cpu
  • arm
  • drv
twi_arm.c
Go to the documentation of this file.
00001
00044 #ifndef WIZ_AUTOGEN
00045     #warning This file is deprecated, you should use twi_at91.c
00046
00047     #include <cpu/detect.h>
00048
00049     #if CPU_ARM_AT91
00050         #include "twi_at91.c"
00051     /*#elif  Add other ARM families here */
00052     #else
00053         #error Unknown CPU
00054     #endif
00055 #endif /* WIZ_AUTOGEN */


BeRTOS: twi_arm.h File Reference

  • cpu
  • arm
  • drv
twi_arm.h File Reference

Low-level TWI module for ARM (interface). More...

#include <cpu/detect.h>

Go to the source code of this file.

Detailed Description

Low-level TWI module for ARM (interface).

Author:
Daniele Basile <asterix@develer.com>

Definition in file twi_arm.h.


BeRTOS: twi_arm.h Source File

  • cpu
  • arm
  • drv
twi_arm.h
Go to the documentation of this file.
00001
00040 #include <cpu/detect.h>
00041
00042 #if CPU_ARM_AT91
00043     #include "twi_at91.h"
00044 /*#elif  Add other ARM families here */
00045 #else
00046     #error Unknown CPU
00047 #endif


BeRTOS: twi_at91.c File Reference

  • cpu
  • arm
  • drv
Defines | Functions
twi_at91.c File Reference

Driver for the AT91 ARM TWI (implementation) More...

#include "twi_at91.h"
#include "cfg/cfg_i2c.h"
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cfg/module.h>
#include <drv/timer.h>
#include <io/arm.h>

Go to the source code of this file.

Defines

#define | TWI_TIMEOUT ms_to_ticks(50)
Timeout for ACK slave waiting.

Functions

bool | twi_write (uint8_t id, twi_iaddr_t byte1, twi_iaddr_t byte2, twi_iaddr_t byte3, const void *_buf, size_t size)
Send size bytes over the twi line to slave id.
bool | twi_read (uint8_t id, twi_iaddr_t byte1, twi_iaddr_t byte2, twi_iaddr_t byte3, void *_buf, size_t size)
Read size bytes from the twi line from slave id.
void | twi_init (void)
Init the (broken) sam7 twi driver.

Detailed Description

Driver for the AT91 ARM TWI (implementation)

Author:
Francesco Sacchi <batt@develer.com>

Definition in file twi_at91.c.

Function Documentation

bool twi_read | ( | uint8_t | id,
 |  | twi_iaddr_t | byte1,
 |  | twi_iaddr_t | byte2,
 |  | twi_iaddr_t | byte3,
 |  | void * | _buf,
 |  | size_t | size
 | ) |  |

Read size bytes from the twi line from slave id.

If the device requires internal addressing before reading, byte1 byte2 and byte3 must be specified. Internal addressign bytes not used *must* be set to TWI_NO_IADDR. If 1 or 2 bytes are required for internal addressing you *must* first use byte1 and than byte2.

Note:
Atmel TWI implementation is broken so it was not possible to supply a better interface. Additionally NACK handling is also broken, so if the i2c device reply nack this function will return after TWI_TIMEOUT.
Returns:
true if ok, false on slave timeout.

Definition at line 140 of file twi_at91.c.

bool twi_write | ( | uint8_t | id,
 |  | twi_iaddr_t | byte1,
 |  | twi_iaddr_t | byte2,
 |  | twi_iaddr_t | byte3,
 |  | const void * | _buf,
 |  | size_t | size
 | ) |  |

Send size bytes over the twi line to slave id.

If the device requires internal addressing before writing, byte1 byte2 and byte3 can be specified. Internal addressign bytes not used *must* be set to TWI_NO_IADDR. If 1 or 2 bytes are required for internal addressing you *must* first use byte1 and than byte2.

Note:
Atmel TWI implementation is broken so it was not possible to supply a better interface. Additionally NACK handling is also broken, so if the i2c device reply nack this function will return after TWI_TIMEOUT.
Returns:
true if ok, false on slave timeout.

Definition at line 66 of file twi_at91.c.


BeRTOS: twi_at91.c Source File

  • cpu
  • arm
  • drv
twi_at91.c
Go to the documentation of this file.
00001
00039 #include "twi_at91.h"
00040
00041 #include "cfg/cfg_i2c.h"
00042 #include <cfg/compiler.h>
00043 #include <cfg/debug.h>
00044 #include <cfg/macros.h>
00045 #include <cfg/module.h>
00046
00047 #include <drv/timer.h>
00048
00049 #include <io/arm.h>
00050
00054 #define TWI_TIMEOUT ms_to_ticks(50)
00055
00066 bool twi_write(uint8_t id, twi_iaddr_t byte1, twi_iaddr_t byte2, twi_iaddr_t byte3, const void *_buf, size_t size)
00067 {
00068     uint8_t addr_size = 0;
00069     const uint8_t *buf = (const uint8_t *)_buf;
00070     ticks_t start;
00071
00072     /* At least 1 byte *must* be transmitted, thanks to crappy hw implementation */
00073     ASSERT(size >= 1);
00074
00075     /* Check internal byte address presence */
00076     if (byte1 != TWI_NO_IADDR)
00077         addr_size++;
00078
00079     if (byte2 != TWI_NO_IADDR)
00080     {
00081         ASSERT(addr_size == 1);
00082         addr_size++;
00083     }
00084
00085     if (byte3 != TWI_NO_IADDR)
00086     {
00087         ASSERT(addr_size == 2);
00088         addr_size++;
00089     }
00090
00091     start = timer_clock();
00092     /* Wait tx buffer empty */
00093     while (!(TWI_SR & BV(TWI_TXRDY)))
00094     {
00095         if (timer_clock() - start > TWI_TIMEOUT)
00096             return false;
00097     }
00098
00099     /* Set slave address and (optional) internal slave addresses */
00100     TWI_MMR = (uint32_t)id << TWI_DADR_SHIFT | (uint32_t)addr_size << TWI_IADRSZ_SHIFT;
00101
00102     TWI_IADR = ((uint32_t)(byte3 & 0xff) << 16) | ((uint32_t)(byte2 & 0xff) << 8) | ((uint32_t)(byte1 & 0xff));
00103
00104     while (size--)
00105     {
00106         /* Send data */
00107         TWI_THR = *buf++;
00108
00109         start = timer_clock();
00110         /* Wait tx buffer empty */
00111         while (!(TWI_SR & BV(TWI_TXRDY)))
00112         {
00113             if (timer_clock() - start > TWI_TIMEOUT)
00114                 return false;
00115         }
00116     }
00117
00118     /* Wait transmit complete bit */
00119     start = timer_clock();
00120     while (!(TWI_SR & BV(TWI_TXCOMP)))
00121     {
00122         if (timer_clock() - start > TWI_TIMEOUT)
00123             return false;
00124     }
00125
00126     return true;
00127 }
00128
00129
00140 bool twi_read(uint8_t id, twi_iaddr_t byte1, twi_iaddr_t byte2, twi_iaddr_t byte3, void *_buf, size_t size)
00141 {
00142     uint8_t addr_size = 0;
00143     uint8_t *buf = (uint8_t *)_buf;
00144     bool stopped = false;
00145     ticks_t start;
00146
00147     /* At least 1 byte *must* be transmitted, thanks to crappy twi implementation */
00148     ASSERT(size >= 1);
00149
00150     /* Check internal byte address presence */
00151     if (byte1 != TWI_NO_IADDR)
00152         addr_size++;
00153
00154     if (byte2 != TWI_NO_IADDR)
00155     {
00156         ASSERT(addr_size == 1);
00157         addr_size++;
00158     }
00159
00160     if (byte3 != TWI_NO_IADDR)
00161     {
00162         ASSERT(addr_size == 2);
00163         addr_size++;
00164     }
00165
00166     /* Wait tx buffer empty */
00167     start = timer_clock();
00168     while (!(TWI_SR & BV(TWI_TXRDY)))
00169     {
00170         if (timer_clock() - start > TWI_TIMEOUT)
00171             return false;
00172     }
00173
00174
00175     /* Set slave address and (optional) internal slave addresses */
00176     TWI_MMR = ((uint32_t)id << TWI_DADR_SHIFT) | BV(TWI_MREAD) | ((uint32_t)addr_size << TWI_IADRSZ_SHIFT);
00177
00178     TWI_IADR = ((uint32_t)(byte3 & 0xff) << 16) | ((uint32_t)(byte2 & 0xff) << 8) | ((uint32_t)(byte1 & 0xff));
00179
00180     /*
00181      * Start reception.
00182      * Kludge: if we want to receive only 1 byte, the stop but *must* be set here
00183      * (thanks to crappy twi implementation again).
00184      */
00185     if (size == 1)
00186     {
00187         TWI_CR = BV(TWI_START) | BV(TWI_STOP);
00188         stopped = true;
00189     }
00190     else
00191         TWI_CR = BV(TWI_START);
00192
00193     while (size--)
00194     {
00195         /* If we are at the last byte, inform the crappy hw that we
00196            want to stop the reception. */
00197         if (!size && !stopped)
00198             TWI_CR = BV(TWI_STOP);
00199
00200         /* Wait until a byte is received */
00201         start = timer_clock();
00202         while (!(TWI_SR & BV(TWI_RXRDY)))
00203         {
00204             if (timer_clock() - start > TWI_TIMEOUT)
00205             {
00206                 TWI_CR = BV(TWI_STOP);
00207                 return false;
00208             }
00209         }
00210
00211
00212         *buf++ = TWI_RHR;
00213     }
00214
00215     /* Wait transmit complete bit */
00216     start = timer_clock();
00217     while (!(TWI_SR & BV(TWI_TXCOMP)))
00218     {
00219         if (timer_clock() - start > TWI_TIMEOUT)
00220             return false;
00221     }
00222
00223     return true;
00224 }
00225
00226 MOD_DEFINE(twi);
00227
00231 void twi_init(void)
00232 {
00233     /* Disable PIO on TWI pins */
00234     PIOA_PDR = BV(TWD) | BV(TWCK);
00235
00236     /* Enable oper drain on TWI pins */
00237     PIOA_MDER = BV(TWD);
00238
00239     /* Disable all irqs */
00240     TWI_IDR = 0xFFFFFFFF;
00241
00242     TWI_CR = BV(TWI_SWRST);
00243
00244     /* Enable master mode */
00245     TWI_CR = BV(TWI_MSEN);
00246
00247     PMC_PCER = BV(TWI_ID);
00248
00249     /*
00250      * Compute twi clock.
00251      * CLDIV = ((Tlow * 2^CKDIV) -3) * Tmck
00252      * CHDIV = ((THigh * 2^CKDIV) -3) * Tmck
00253      * Only CLDIV is computed since CLDIV = CHDIV (50% duty cycle)
00254      */
00255     uint16_t cldiv, ckdiv = 0;
00256     while ((cldiv = ((CPU_FREQ / (2 * CONFIG_I2C_FREQ)) - 3) / (1 << ckdiv)) > 255)
00257         ckdiv++;
00258
00259     /* Atmel errata states that ckdiv *must* be less than 5 for unknown reason */
00260     ASSERT(ckdiv < 5);
00261
00262     TWI_CWGR = ((uint32_t)ckdiv << TWI_CKDIV_SHIFT) | (cldiv << TWI_CLDIV_SHIFT) | (cldiv << TWI_CHDIV_SHIFT);
00263     TRACEMSG("TWI_CWGR [%08lx]", TWI_CWGR);
00264
00265     MOD_INIT(twi);
00266 }
00267


BeRTOS: twi_at91.h File Reference

  • cpu
  • arm
  • drv
Functions
twi_at91.h File Reference

Driver for the AT91 ARM TWI (implementation) More...

#include <cfg/compiler.h>

Go to the source code of this file.

Functions

void | twi_init (void)
Init the (broken) sam7 twi driver.
bool | twi_read (uint8_t id, twi_iaddr_t byte1, twi_iaddr_t byte2, twi_iaddr_t byte3, void *_buf, size_t len)
Read size bytes from the twi line from slave id.
bool | twi_write (uint8_t id, twi_iaddr_t byte1, twi_iaddr_t byte2, twi_iaddr_t byte3, const void *_buf, size_t len)
Send size bytes over the twi line to slave id.

Detailed Description

Driver for the AT91 ARM TWI (implementation)

Author:
Francesco Sacchi <batt@develer.com>

Definition in file twi_at91.h.

Function Documentation

bool twi_read | ( | uint8_t | id,
 |  | twi_iaddr_t | byte1,
 |  | twi_iaddr_t | byte2,
 |  | twi_iaddr_t | byte3,
 |  | void * | _buf,
 |  | size_t | size
 | ) |  |

Read size bytes from the twi line from slave id.

If the device requires internal addressing before reading, byte1 byte2 and byte3 must be specified. Internal addressign bytes not used *must* be set to TWI_NO_IADDR. If 1 or 2 bytes are required for internal addressing you *must* first use byte1 and than byte2.

Note:
Atmel TWI implementation is broken so it was not possible to supply a better interface. Additionally NACK handling is also broken, so if the i2c device reply nack this function will return after TWI_TIMEOUT.
Returns:
true if ok, false on slave timeout.

Definition at line 140 of file twi_at91.c.

bool twi_write | ( | uint8_t | id,
 |  | twi_iaddr_t | byte1,
 |  | twi_iaddr_t | byte2,
 |  | twi_iaddr_t | byte3,
 |  | const void * | _buf,
 |  | size_t | size
 | ) |  |

Send size bytes over the twi line to slave id.

If the device requires internal addressing before writing, byte1 byte2 and byte3 can be specified. Internal addressign bytes not used *must* be set to TWI_NO_IADDR. If 1 or 2 bytes are required for internal addressing you *must* first use byte1 and than byte2.

Note:
Atmel TWI implementation is broken so it was not possible to supply a better interface. Additionally NACK handling is also broken, so if the i2c device reply nack this function will return after TWI_TIMEOUT.
Returns:
true if ok, false on slave timeout.

Definition at line 66 of file twi_at91.c.


BeRTOS: twi_at91.h Source File

  • cpu
  • arm
  • drv
twi_at91.h
Go to the documentation of this file.
00001
00039 #ifndef DRV_AT91_TWI_H
00040 #define DRV_AT91_TWI_H
00041
00042 #include <cfg/compiler.h>
00043
00044 typedef int16_t twi_iaddr_t;
00045
00046 #define TWI_NO_IADDR (-1)
00047
00048 void twi_init(void);
00049 bool twi_read(uint8_t id, twi_iaddr_t byte1, twi_iaddr_t byte2, twi_iaddr_t byte3, void *_buf, size_t len);
00050 bool twi_write(uint8_t id, twi_iaddr_t byte1, twi_iaddr_t byte2, twi_iaddr_t byte3, const void *_buf, size_t len);
00051
00052 #endif /* DRV_AT91_TWI_H */


BeRTOS: types.h File Reference

  • cpu
types.h File Reference

CPU-specific type definitions. More...

#include "detect.h"
#include "attr.h"
#include <limits.h>
#include <cfg/compiler.h>

Go to the source code of this file.

Defines

Default type sizes.

These defaults are reasonable for most 16/32bit machines.

Some of these macros may be overridden by CPU-specific code above.

ANSI C requires that the following equations be true:

   sizeof(char) <= sizeof(short) <= sizeof(int) <= sizeof(long)
   sizeof(float) <= sizeof(double)
   CPU_BITS_PER_CHAR  >= 8
   CPU_BITS_PER_SHORT >= 8
   CPU_BITS_PER_INT   >= 16
   CPU_BITS_PER_LONG  >= 32
#define | SIZEOF_CHAR 1
#define | SIZEOF_SHORT 2
#define | SIZEOF_INT 2
#define | SIZEOF_LONG 4
#define | SIZEOF_PTR 2
#define | SIZEOF_SIZE_T 2
#define | CPU_BITS_PER_CHAR (SIZEOF_CHAR * 8)
#define | CPU_BITS_PER_SHORT (SIZEOF_SHORT * CPU_BITS_PER_CHAR)
#define | CPU_BITS_PER_INT (SIZEOF_INT * CPU_BITS_PER_CHAR)
#define | CPU_BITS_PER_LONG (SIZEOF_LONG * CPU_BITS_PER_CHAR)
#define | CPU_BITS_PER_PTR (SIZEOF_PTR * CPU_BITS_PER_CHAR)
#define | HWREG(x) (*((reg32_t *)(x)))
Macros for hardware access, both direct and via the bit-band region.
#define | HWREGH(x) (*((reg16_t *)(x)))
Macros for hardware access, both direct and via the bit-band region.
#define | HWREGB(x) (*((reg8_t *)(x)))
Macros for hardware access, both direct and via the bit-band region.

Detailed Description

CPU-specific type definitions.

Author:
Giovanni Bajo <rasky@develer.com>
Bernie Innocenti <bernie@codewiz.org>
Stefano Fedrigo <aleph@develer.com>
Francesco Sacchi <batt@develer.com>

Definition in file types.h.


BeRTOS: types.h Source File

  • cpu
types.h
Go to the documentation of this file.
00001
00041 #ifndef CPU_TYPES_H
00042 #define CPU_TYPES_H
00043
00044 #include "detect.h"
00045 #include "attr.h"
00046 #include <limits.h>
00047 #include <cfg/compiler.h> /* for uintXX_t */
00048
00049 #if CPU_I196
00050
00051     typedef uint16_t cpu_flags_t; // FIXME
00052     typedef unsigned int cpu_stack_t;
00053     typedef cpu_stack_t cpu_aligned_stack_t;
00054     typedef unsigned int cpu_atomic_t;
00055     #warning Verify following constant
00056     #define SIZEOF_CPUSTACK_T 2
00057     #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T
00058
00059 #elif CPU_X86
00060
00061     /* Get cpu_flags_t definition from the hosting environment. */
00062     #include <cfg/os.h>
00063     #if OS_EMBEDDED
00064         typedef uint32_t cpu_flags_t; // FIXME
00065     #endif /* OS_EMBEDDED */
00066
00067     typedef uint32_t cpu_atomic_t;
00068
00069     #if CPU_X86_64
00070         typedef uint64_t cpu_stack_t;
00071         typedef cpu_stack_t cpu_aligned_stack_t;
00072         #define SIZEOF_CPUSTACK_T 8
00073         #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T
00074     #else
00075         typedef uint32_t cpu_stack_t;
00076         typedef cpu_stack_t cpu_aligned_stack_t;
00077         #define SIZEOF_CPUSTACK_T 4
00078         #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T
00079     #endif
00080
00081 #elif CPU_ARM || CPU_CM3
00082
00083     typedef uint32_t cpu_flags_t;
00084     typedef uint32_t cpu_atomic_t;
00085     typedef uint32_t cpu_stack_t;
00086     #define SIZEOF_CPUSTACK_T 4
00087
00088     typedef uint64_t cpu_aligned_stack_t;
00089     #define SIZEOF_CPUALIGNED_T 8
00090
00091 #elif CPU_PPC
00092
00093     /* Get cpu_flags_t definition from the hosting environment. */
00094     #include <cfg/os.h>
00095     #if OS_EMBEDDED
00096         typedef uint32_t cpu_flags_t;
00097     #endif
00098
00099     typedef uint32_t cpu_atomic_t;
00100     typedef uint32_t cpu_stack_t;
00101     typedef  cpu_stack_t cpu_aligned_stack_t;
00102     #define SIZEOF_CPUSTACK_T 4
00103     #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T
00104
00105 #elif CPU_DSP56K
00106
00107     typedef uint16_t cpu_flags_t;
00108     typedef uint16_t cpu_atomic_t;
00109     typedef unsigned int cpu_stack_t;
00110     typedef cpu_stack_t cpu_aligned_stack_t;
00111     #warning Verify following costant
00112     #define SIZEOF_CPUSTACK_T 2
00113     #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T
00114
00115 #elif CPU_AVR
00116
00117     typedef uint8_t cpu_flags_t;
00118     typedef uint8_t cpu_atomic_t;
00119     typedef uint8_t cpu_stack_t;
00120     typedef cpu_stack_t cpu_aligned_stack_t;
00121     #define SIZEOF_CPUSTACK_T 1
00122     #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T
00123
00124 #elif CPU_MSP430
00125
00126     typedef uint16_t cpu_flags_t;
00127     typedef uint16_t cpu_stack_t;
00128     typedef cpu_stack_t cpu_aligned_stack_t;
00129     #define SIZEOF_CPUSTACK_T 2
00130     #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T
00131
00132 #else
00133     #error No CPU_... defined.
00134 #endif
00135
00153 #ifndef SIZEOF_CHAR
00154 #define SIZEOF_CHAR  1
00155 #endif
00156
00157 #ifndef SIZEOF_SHORT
00158 #define SIZEOF_SHORT  2
00159 #endif
00160
00161 #ifndef SIZEOF_INT
00162 #if CPU_REG_BITS < 32
00163     #define SIZEOF_INT  2
00164 #else
00165     #define SIZEOF_INT  4
00166 #endif
00167 #endif /* !SIZEOF_INT */
00168
00169 #ifndef SIZEOF_LONG
00170 #if CPU_REG_BITS > 32
00171     #define SIZEOF_LONG  8
00172 #else
00173     #define SIZEOF_LONG  4
00174 #endif
00175 #endif
00176
00177 #ifndef SIZEOF_PTR
00178 #if CPU_REG_BITS < 32
00179     #define SIZEOF_PTR   2
00180 #elif CPU_REG_BITS == 32
00181     #define SIZEOF_PTR   4
00182 #else /* CPU_REG_BITS > 32 */
00183     #define SIZEOF_PTR   8
00184 #endif
00185 #endif
00186
00187 #ifndef SIZEOF_SIZE_T
00188 #if CPU_REG_BITS < 32
00189     #define SIZEOF_SIZE_T   2
00190 #elif CPU_REG_BITS == 32
00191     #define SIZEOF_SIZE_T   4
00192 #else /* CPU_REG_BITS > 32 */
00193     #define SIZEOF_SIZE_T   8
00194 #endif
00195 #endif
00196
00197 #ifndef CPU_BITS_PER_CHAR
00198 #define CPU_BITS_PER_CHAR   (SIZEOF_CHAR * 8)
00199 #endif
00200
00201 #ifndef CPU_BITS_PER_SHORT
00202 #define CPU_BITS_PER_SHORT  (SIZEOF_SHORT * CPU_BITS_PER_CHAR)
00203 #endif
00204
00205 #ifndef CPU_BITS_PER_INT
00206 #define CPU_BITS_PER_INT    (SIZEOF_INT * CPU_BITS_PER_CHAR)
00207 #endif
00208
00209 #ifndef CPU_BITS_PER_LONG
00210 #define CPU_BITS_PER_LONG   (SIZEOF_LONG * CPU_BITS_PER_CHAR)
00211 #endif
00212
00213 #ifndef CPU_BITS_PER_PTR
00214 #define CPU_BITS_PER_PTR    (SIZEOF_PTR * CPU_BITS_PER_CHAR)
00215 #endif
00216
00217
00218 /*\}*/
00219
00220 #ifndef INT_MAX
00221     #define INT_MAX ((int)((unsigned int)~0 >> 1))
00222     #define INT_MIN (-INT_MAX - 1)
00223 #endif
00224
00225 /* Sanity checks for the above definitions */
00226 STATIC_ASSERT(sizeof(char) == SIZEOF_CHAR);
00227 STATIC_ASSERT(sizeof(short) == SIZEOF_SHORT);
00228 STATIC_ASSERT(sizeof(long) == SIZEOF_LONG);
00229 STATIC_ASSERT(sizeof(int) == SIZEOF_INT);
00230 STATIC_ASSERT(sizeof(void *) == SIZEOF_PTR);
00231 STATIC_ASSERT(sizeof(int8_t) * CPU_BITS_PER_CHAR == 8);
00232 STATIC_ASSERT(sizeof(uint8_t) * CPU_BITS_PER_CHAR == 8);
00233 STATIC_ASSERT(sizeof(int16_t) * CPU_BITS_PER_CHAR == 16);
00234 STATIC_ASSERT(sizeof(uint16_t) * CPU_BITS_PER_CHAR == 16);
00235 STATIC_ASSERT(sizeof(int32_t) * CPU_BITS_PER_CHAR == 32);
00236 STATIC_ASSERT(sizeof(uint32_t) * CPU_BITS_PER_CHAR == 32);
00237 #ifdef __HAS_INT64_T__
00238 STATIC_ASSERT(sizeof(int64_t) * CPU_BITS_PER_CHAR == 64);
00239 STATIC_ASSERT(sizeof(uint64_t) * CPU_BITS_PER_CHAR == 64);
00240 #endif
00241 STATIC_ASSERT(sizeof(cpu_stack_t) == SIZEOF_CPUSTACK_T);
00242 STATIC_ASSERT(sizeof(cpu_aligned_stack_t) == SIZEOF_CPUALIGNED_T);
00243 STATIC_ASSERT(sizeof(size_t) == SIZEOF_SIZE_T);
00244
00245
00249 /*\{*/
00250 #define HWREG(x)   (*((reg32_t *)(x)))
00251 #define HWREGH(x)  (*((reg16_t *)(x)))
00252 #define HWREGB(x)  (*((reg8_t *)(x)))
00253 /*\}*/
00254
00255 #endif /* CPU_TYPES_H */


BeRTOS: parms Union Reference

  • Data Structures
  • Data Structure Index
  • Data Fields
parms Union Reference
Simple RPC machinery

union that contains parameters passed to and from commands More...

#include <parser.h>

Detailed Description

union that contains parameters passed to and from commands

Definition at line 134 of file parser.h.

The documentation for this union was generated from the following file:
  • parser.h


BeRTOS: usb.h File Reference

  • drv
Data Structures | Defines | Functions
usb.h File Reference

USB 2.0 standard descriptors. More...

#include <cpu/byteorder.h>

Go to the source code of this file.

Data Structures

struct | UsbCtrlRequest
USB Control Request descriptor. More...
struct | UsbDescHeader
USB common descriptor header. More...
struct | UsbDeviceDesc
USB Device descriptor. More...
struct | UsbStringDesc
USB string descriptor. More...
struct | UsbConfigDesc
Device configuration descriptor. More...
struct | UsbInterfaceDesc
Device interface descriptor. More...
struct | UsbEndpointDesc
Endpoint descriptor. More...
struct | UsbDevice
USB: generic device descriptor. More...

Defines

#define | USB_STRING(...) PP_CAT(USB_STRING_, PP_COUNT(__VA_ARGS__))(__VA_ARGS__)
Pack a list with a variable number of elements into a UTF-16LE USB string.
#define | DEFINE_USB_STRING(__name, __text)
Define and initialize an USB string descriptor.

Functions

int | usb_endpointNum (const UsbEndpointDesc *epd)
Get the endpoint's address number of epd.
int | usb_endpointType (const struct UsbEndpointDesc *epd)
Get the transfer type of the endpoint epd.
int | usb_endpointDirIn (const struct UsbEndpointDesc *epd)
Check if the endpoint epd has IN direction.
int | usb_endpointDirOut (const struct UsbEndpointDesc *epd)
Check if the endpoint epd has OUT direction.
int | usb_endpointXferBulk (const struct UsbEndpointDesc *epd)
Check if the endpoint epd has bulk transfer type.
int | usb_endpointXferControl (const struct UsbEndpointDesc *epd)
Check if the endpoint epd has control transfer type.
int | usb_endpointXferInt (const struct UsbEndpointDesc *epd)
Check if the endpoint epd has interrupt transfer type.
int | usb_endpointXferIsoc (const struct UsbEndpointDesc *epd)
Check if the endpoint epd has isochronous transfer type.
int | usb_endpointIsBulkIn (const struct UsbEndpointDesc *epd)
Check if the endpoint epd is bulk IN.
int | usb_endpointIsBulkOut (const struct UsbEndpointDesc *epd)
Check if the endpoint epd is bulk OUT.
int | usb_endpointIsIntIn (const struct UsbEndpointDesc *epd)
Check if the endpoint epd is interrupt IN.
int | usb_endpointIsIntOut (const struct UsbEndpointDesc *epd)
Check if the endpoint epd is interrupt OUT.
int | usb_endpointIsIsocIn (const struct UsbEndpointDesc *epd)
Check if the endpoint epd is isochronous IN.
int | usb_endpointIsIsocOut (const struct UsbEndpointDesc *epd)
Check if the endpoint epd is isochronous OUT.
ssize_t | usb_endpointReadTimeout (int ep, void *buffer, ssize_t size, ticks_t timeout)
Read up to size bytes from the USB endpoint identified by the address ep and store them in buffer.
ssize_t | usb_endpointWriteTimeout (int ep, const void *buffer, ssize_t size, ticks_t timeout)
Write up to size bytes from the buffer pointed buffer to the USB endpoint identified by the address ep.
int | usb_deviceRegister (UsbDevice *dev)
Register a generic USB device driver dev in the USB controller.

Detailed Description

USB 2.0 standard descriptors.

Author:
Andrea Righi <arighi@develer.com>

This file holds USB constants and structures that are needed for USB device APIs, as defined in the USB 2.0 specification.

Attention:
The API is work in progress and may change in future versions.

Definition in file usb.h.

Define Documentation

#define DEFINE_USB_STRING | ( | __name,
 |  | __text
 | ) |
Value:
struct {                            \
        UsbDescHeader __header;                 \
        uint8_t __body[sizeof(__text)];             \
    } PACKED __name = {                     \
        .__header = {                       \
            .bLength =                  \
                cpu_to_le16((uint16_t)sizeof(__name)),  \
            .bDescriptorType = USB_DT_STRING,       \
        },                          \
        .__body = {__text},                 \
    }

Define and initialize an USB string descriptor.

This macro is reuquired to properly declare and initialize a constant USB string in UTF-16LE format.

The structure must contain the standard common USB header (UsbDescHeader) and the UTF-16LE string all packed in a contiguous memory region.

Definition at line 234 of file usb.h.

#define USB_STRING ( ... ) PP_CAT(USB_STRING_, PP_COUNT(__VA_ARGS__))(__VA_ARGS__)

Pack a list with a variable number of elements into a UTF-16LE USB string.

Note:
The macro is recursively defined according the number of elements passed as argument. At the moment we support strings with up to 16 characters.

Definition at line 223 of file usb.h.

Function Documentation

ssize_t usb_endpointReadTimeout | ( | int | ep,
 |  | void * | buffer,
 |  | ssize_t | size,
 |  | ticks_t | timeout
 | ) |  |

Read up to size bytes from the USB endpoint identified by the address ep and store them in buffer.

The timeout is an upper bound on the amount of time (in ticks) elapsed before returns. If timeout is zero, the the function returns immediatly and it basically works in non-blocking fashion. A negative value for timeout means that the function can block indefinitely.

Returns:
number of bytes actually read, or a negative value in case of errors.

Definition at line 1120 of file usb_stm32.c.

ssize_t usb_endpointWriteTimeout | ( | int | ep,
 |  | const void * | buffer,
 |  | ssize_t | size,
 |  | ticks_t | timeout
 | ) |  |

Write up to size bytes from the buffer pointed buffer to the USB endpoint identified by the address ep.

The timeout is an upper bound on the amount of time (in ticks) elapsed before returns. If timeout is zero, the the function returns immediatly and it basically works in non-blocking fashion. A negative value for timeout means that the function can block indefinitely.

Returns:
number of bytes actually wrote, or a negative value in case of errors.

Definition at line 1179 of file usb_stm32.c.


BeRTOS: usb.h Source File

  • drv
usb.h
Go to the documentation of this file.
00001
00047 #ifndef USB_H
00048 #define USB_H
00049
00050 #include <cpu/byteorder.h>
00051
00052 #define usb_cpu_to_le16(x)  cpu_to_le16(x)
00053 #define usb_le16_to_cpu(x)  le16_to_cpu(x)
00054 #define usb_cpu_to_le32(x)  cpu_to_le32(x)
00055 #define usb_le32_to_cpu(x)  le32_to_cpu(x)
00056
00057 /* State of a USB device */
00058 enum usb_device_state {
00059         USB_STATE_NOTATTACHED = 0,
00060
00061         /* chapter 9 device states */
00062         USB_STATE_ATTACHED,
00063         USB_STATE_POWERED,                      /* wired */
00064         USB_STATE_DEFAULT,                      /* limited function */
00065         USB_STATE_ADDRESS,
00066         USB_STATE_CONFIGURED,                   /* most functions */
00067 };
00068
00069 /*
00070  * USB directions
00071  *
00072  * This bit flag is used in endpoint descriptors' bEndpointAddress field.
00073  * It's also one of three fields in control requests bRequestType.
00074  */
00075 #define USB_DIR_OUT         0       /* to device */
00076 #define USB_DIR_IN          0x80        /* to host */
00077 #define USB_DIR_MASK            0x80
00078
00079 /*
00080  * USB types, the second of three bRequestType fields
00081  */
00082 #define USB_TYPE_MASK           (0x03 << 5)
00083 #define USB_TYPE_STANDARD       (0x00 << 5)
00084 #define USB_TYPE_CLASS          (0x01 << 5)
00085 #define USB_TYPE_VENDOR         (0x02 << 5)
00086 #define USB_TYPE_RESERVED       (0x03 << 5)
00087
00088 /*
00089  * USB recipients, the third of three bRequestType fields
00090  */
00091 #define USB_RECIP_MASK          0x1f
00092 #define USB_RECIP_DEVICE        0x00
00093 #define USB_RECIP_INTERFACE     0x01
00094 #define USB_RECIP_ENDPOINT      0x02
00095 #define USB_RECIP_OTHER         0x03
00096
00097 /*
00098  * USB standard requests, for the bRequest field of a SETUP packet.
00099  */
00100 #define USB_REQ_GET_STATUS      0x00
00101 #define USB_REQ_CLEAR_FEATURE       0x01
00102 #define USB_REQ_SET_FEATURE     0x03
00103 #define USB_REQ_SET_ADDRESS     0x05
00104 #define USB_REQ_GET_DESCRIPTOR      0x06
00105 #define USB_REQ_SET_DESCRIPTOR      0x07
00106 #define USB_REQ_GET_CONFIGURATION   0x08
00107 #define USB_REQ_SET_CONFIGURATION   0x09
00108 #define USB_REQ_GET_INTERFACE       0x0A
00109 #define USB_REQ_SET_INTERFACE       0x0B
00110 #define USB_REQ_SYNCH_FRAME     0x0C
00111
00112 /*
00113  * Descriptor types ... USB 2.0 spec table 9.5
00114  */
00115 #define USB_DT_DEVICE           0x01
00116 #define USB_DT_CONFIG           0x02
00117 #define USB_DT_STRING           0x03
00118 #define USB_DT_INTERFACE        0x04
00119 #define USB_DT_ENDPOINT         0x05
00120 #define USB_DT_DEVICE_QUALIFIER     0x06
00121 #define USB_DT_OTHER_SPEED_CONFIG   0x07
00122 #define USB_DT_INTERFACE_POWER      0x08
00123
00124 /*
00125  * Conventional codes for class-specific descriptors.  The convention is
00126  * defined in the USB "Common Class" Spec (3.11).  Individual class specs
00127  * are authoritative for their usage, not the "common class" writeup.
00128  */
00129 #define USB_DT_CS_DEVICE        (USB_TYPE_CLASS | USB_DT_DEVICE)
00130 #define USB_DT_CS_CONFIG        (USB_TYPE_CLASS | USB_DT_CONFIG)
00131 #define USB_DT_CS_STRING        (USB_TYPE_CLASS | USB_DT_STRING)
00132 #define USB_DT_CS_INTERFACE     (USB_TYPE_CLASS | USB_DT_INTERFACE)
00133 #define USB_DT_CS_ENDPOINT      (USB_TYPE_CLASS | USB_DT_ENDPOINT)
00134
00144 typedef struct UsbCtrlRequest
00145 {
00146     uint8_t mRequestType;
00147     uint8_t bRequest;
00148     uint16_t wValue;
00149     uint16_t wIndex;
00150     uint16_t wLength;
00151 } PACKED UsbCtrlRequest;
00152
00158 typedef struct UsbDescHeader
00159 {
00160     uint8_t bLength;
00161     uint8_t bDescriptorType;
00162 } PACKED UsbDescHeader;
00163
00169 typedef struct UsbDeviceDesc
00170 {
00171     uint8_t bLength;
00172     uint8_t bDescriptorType;
00173     uint16_t bcdUSB;
00174     uint8_t bDeviceClass;
00175     uint8_t bDeviceSubClass;
00176     uint8_t bDeviceProtocol;
00177     uint8_t bMaxPacketSize0;
00178     uint16_t idVendor;
00179     uint16_t idProduct;
00180     uint16_t bcdDevice;
00181     uint8_t iManufacturer;
00182     uint8_t iProduct;
00183     uint8_t iSerialNumber;
00184     uint8_t bNumConfigurations;
00185 } PACKED UsbDeviceDesc;
00186
00192 typedef struct UsbStringDesc
00193 {
00194     uint8_t bLength;
00195     uint8_t bDescriptorType;
00196     uint8_t data[0];
00197 } PACKED UsbStringDesc;
00198
00199 #define USB_STRING_1(__a, ...) __a "\x00"
00200 #define USB_STRING_2(__a, ...) __a "\x00" USB_STRING_1(__VA_ARGS__)
00201 #define USB_STRING_3(__a, ...) __a "\x00" USB_STRING_2(__VA_ARGS__)
00202 #define USB_STRING_4(__a, ...) __a "\x00" USB_STRING_3(__VA_ARGS__)
00203 #define USB_STRING_5(__a, ...) __a "\x00" USB_STRING_4(__VA_ARGS__)
00204 #define USB_STRING_6(__a, ...) __a "\x00" USB_STRING_5(__VA_ARGS__)
00205 #define USB_STRING_7(__a, ...) __a "\x00" USB_STRING_6(__VA_ARGS__)
00206 #define USB_STRING_8(__a, ...) __a "\x00" USB_STRING_7(__VA_ARGS__)
00207 #define USB_STRING_9(__a, ...) __a "\x00" USB_STRING_8(__VA_ARGS__)
00208 #define USB_STRING_10(__a, ...) __a "\x00" USB_STRING_9(__VA_ARGS__)
00209 #define USB_STRING_11(__a, ...) __a "\x00" USB_STRING_10(__VA_ARGS__)
00210 #define USB_STRING_12(__a, ...) __a "\x00" USB_STRING_11(__VA_ARGS__)
00211 #define USB_STRING_13(__a, ...) __a "\x00" USB_STRING_12(__VA_ARGS__)
00212 #define USB_STRING_14(__a, ...) __a "\x00" USB_STRING_13(__VA_ARGS__)
00213 #define USB_STRING_15(__a, ...) __a "\x00" USB_STRING_14(__VA_ARGS__)
00214 #define USB_STRING_16(__a, ...) __a "\x00" USB_STRING_15(__VA_ARGS__)
00215
00223 #define USB_STRING(...) PP_CAT(USB_STRING_, PP_COUNT(__VA_ARGS__))(__VA_ARGS__)
00224
00234 #define DEFINE_USB_STRING(__name, __text)               \
00235     struct {                            \
00236         UsbDescHeader __header;                 \
00237         uint8_t __body[sizeof(__text)];             \
00238     } PACKED __name = {                     \
00239         .__header = {                       \
00240             .bLength =                  \
00241                 cpu_to_le16((uint16_t)sizeof(__name)),  \
00242             .bDescriptorType = USB_DT_STRING,       \
00243         },                          \
00244         .__body = {__text},                 \
00245     }
00246
00247 /*
00248  * Device and/or Interface Class codes as found in bDeviceClass or
00249  * bInterfaceClass and defined by www.usb.org documents.
00250  */
00251 #define USB_CLASS_PER_INTERFACE     0   /* for DeviceClass */
00252 #define USB_CLASS_AUDIO         1
00253 #define USB_CLASS_COMM          2
00254 #define USB_CLASS_HID           3
00255 #define USB_CLASS_PHYSICAL      5
00256 #define USB_CLASS_STILL_IMAGE       6
00257 #define USB_CLASS_PRINTER       7
00258 #define USB_CLASS_MASS_STORAGE      8
00259 #define USB_CLASS_HUB           9
00260 #define USB_CLASS_CDC_DATA      0x0a
00261 #define USB_CLASS_CSCID         0x0b    /* chip+ smart card */
00262 #define USB_CLASS_CONTENT_SEC       0x0d    /* content security */
00263 #define USB_CLASS_VIDEO         0x0e
00264 #define USB_CLASS_WIRELESS_CONTROLLER   0xe0
00265 #define USB_CLASS_MISC          0xef
00266 #define USB_CLASS_APP_SPEC      0xfe
00267 #define USB_CLASS_VENDOR_SPEC       0xff
00268
00269 /* USB Device subclasses */
00270 #define USB_CDC_SUBCLASS_ACM                    0x02
00271 #define USB_CDC_SUBCLASS_ETHERNET               0x06
00272 #define USB_CDC_SUBCLASS_WHCM                   0x08
00273 #define USB_CDC_SUBCLASS_DMM                    0x09
00274 #define USB_CDC_SUBCLASS_MDLM                   0x0a
00275 #define USB_CDC_SUBCLASS_OBEX                   0x0b
00276 #define USB_CDC_SUBCLASS_EEM                    0x0c
00277 #define USB_CDC_SUBCLASS_NCM                    0x0d
00278
00284 typedef struct UsbConfigDesc
00285 {
00286     uint8_t bLength;
00287     uint8_t bDescriptorType;
00288     uint16_t wTotalLength;
00289     uint8_t bNumInterfaces;
00290     uint8_t bConfigurationValue;
00291     uint8_t iConfiguration;
00292     uint8_t bmAttributes;
00293     uint8_t bMaxPower;
00294 } PACKED UsbConfigDesc;
00295
00296 /* from config descriptor bmAttributes */
00297 #define USB_CONFIG_ATT_ONE      (1 << 7)    /* must be set */
00298 #define USB_CONFIG_ATT_SELFPOWER    (1 << 6)    /* self powered */
00299 #define USB_CONFIG_ATT_WAKEUP       (1 << 5)    /* can wakeup */
00300 #define USB_CONFIG_ATT_BATTERY      (1 << 4)    /* battery powered */
00301
00307 typedef struct UsbInterfaceDesc
00308 {
00309     uint8_t bLength;
00310     uint8_t bDescriptorType;
00311     uint8_t bInterfaceNumber;
00312     uint8_t bAlternateSetting;
00313     uint8_t bNumEndpoints;
00314     uint8_t bInterfaceClass;
00315     uint8_t bInterfaceSubClass;
00316     uint8_t bInterfaceProtocol;
00317     uint8_t iInterface;
00318 } PACKED UsbInterfaceDesc;
00319
00325 typedef struct UsbEndpointDesc
00326 {
00327     uint8_t bLength;
00328     uint8_t bDescriptorType;
00329     uint8_t bEndpointAddress;
00330     uint8_t bmAttributes;
00331     uint16_t wMaxPacketSize;
00332     uint8_t bInterval;
00333 } PACKED UsbEndpointDesc;
00334
00335 /*
00336  * Endpoints
00337  */
00338 #define USB_ENDPOINT_NUMBER_MASK    0x0f    /* in bEndpointAddress */
00339 #define USB_ENDPOINT_DIR_MASK       USB_DIR_MASK
00340
00341 #define USB_ENDPOINT_SYNCTYPE       0x0c
00342 #define USB_ENDPOINT_SYNC_NONE      (0 << 2)
00343 #define USB_ENDPOINT_SYNC_ASYNC     (1 << 2)
00344 #define USB_ENDPOINT_SYNC_ADAPTIVE  (2 << 2)
00345 #define USB_ENDPOINT_SYNC_SYNC      (3 << 2)
00346
00347 #define USB_ENDPOINT_XFERTYPE_MASK  0x03    /* in bmAttributes */
00348 #define USB_ENDPOINT_XFER_CONTROL   0
00349 #define USB_ENDPOINT_XFER_ISOC      1
00350 #define USB_ENDPOINT_XFER_BULK      2
00351 #define USB_ENDPOINT_XFER_INT       3
00352 #define USB_ENDPOINT_MAX_ADJUSTABLE 0x80
00353
00357 typedef struct UsbDevice
00358 {
00359     UsbDeviceDesc *device;
00360     const UsbDescHeader **config;
00361     const UsbStringDesc **strings;
00362
00363     /* Callbacks */
00364     void (*event_cb)(UsbCtrlRequest *);
00365
00366     /* Private data */
00367     bool configured;
00368 } UsbDevice;
00369
00373 INLINE int usb_endpointNum(const UsbEndpointDesc *epd)
00374 {
00375     return epd->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
00376 }
00377
00381 INLINE int usb_endpointType(const struct UsbEndpointDesc *epd)
00382 {
00383     return epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
00384 }
00385
00389 INLINE int usb_endpointDirIn(const struct UsbEndpointDesc *epd)
00390 {
00391     return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN);
00392 }
00393
00397 INLINE int usb_endpointDirOut(const struct UsbEndpointDesc *epd)
00398 {
00399     return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT);
00400 }
00401
00405 INLINE int usb_endpointXferBulk(const struct UsbEndpointDesc *epd)
00406 {
00407     return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
00408         USB_ENDPOINT_XFER_BULK);
00409 }
00410
00414 INLINE int usb_endpointXferControl(const struct UsbEndpointDesc *epd)
00415 {
00416     return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
00417         USB_ENDPOINT_XFER_CONTROL);
00418 }
00419
00423 INLINE int usb_endpointXferInt(const struct UsbEndpointDesc *epd)
00424 {
00425     return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
00426         USB_ENDPOINT_XFER_INT);
00427 }
00428
00432 INLINE int usb_endpointXferIsoc(const struct UsbEndpointDesc *epd)
00433 {
00434     return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
00435         USB_ENDPOINT_XFER_ISOC);
00436 }
00437
00441 INLINE int usb_endpointIsBulkIn(const struct UsbEndpointDesc *epd)
00442 {
00443     return usb_endpointXferBulk(epd) && usb_endpointDirIn(epd);
00444 }
00445
00449 INLINE int usb_endpointIsBulkOut(const struct UsbEndpointDesc *epd)
00450 {
00451     return usb_endpointXferBulk(epd) && usb_endpointDirOut(epd);
00452 }
00453
00457 INLINE int usb_endpointIsIntIn(const struct UsbEndpointDesc *epd)
00458 {
00459     return usb_endpointXferInt(epd) && usb_endpointDirIn(epd);
00460 }
00461
00465 INLINE int usb_endpointIsIntOut(const struct UsbEndpointDesc *epd)
00466 {
00467     return usb_endpointXferInt(epd) && usb_endpointDirOut(epd);
00468 }
00469
00473 INLINE int usb_endpointIsIsocIn(const struct UsbEndpointDesc *epd)
00474 {
00475     return usb_endpointXferIsoc(epd) && usb_endpointDirIn(epd);
00476 }
00477
00481 INLINE int usb_endpointIsIsocOut(const struct UsbEndpointDesc *epd)
00482 {
00483     return usb_endpointXferIsoc(epd) && usb_endpointDirOut(epd);
00484 }
00485
00498 ssize_t usb_endpointReadTimeout(int ep, void *buffer, ssize_t size,
00499                 ticks_t timeout);
00500
00501 INLINE ssize_t usb_endpointRead(int ep, void *buffer, ssize_t size)
00502 {
00503     return usb_endpointReadTimeout(ep, buffer, size, -1);
00504 }
00505
00518 ssize_t usb_endpointWriteTimeout(int ep, const void *buffer, ssize_t size,
00519                 ticks_t timeout);
00520
00521 INLINE ssize_t usb_endpointWrite(int ep, const void *buffer, ssize_t size)
00522 {
00523     return usb_endpointWriteTimeout(ep, buffer, size, -1);
00524 }
00525
00529 int usb_deviceRegister(UsbDevice *dev);
00530
00531 #endif /* USB_H */


BeRTOS: usb_endpoint.h File Reference

  • drv
usb_endpoint.h File Reference

USB endpoint allocations. More...

#include "cfg/cfg_usb.h"
#include "cfg/cfg_usbser.h"
#include "cfg/cfg_usbkbd.h"
#include "cfg/cfg_usbmouse.h"

Go to the source code of this file.

Detailed Description

USB endpoint allocations.

Author:
Andrea Righi <arighi@develer.com>

This file defines how the endpoints are allocated among the supported USB device drivers in BeRTOs.

Definition in file usb_endpoint.h.


BeRTOS: usb_endpoint.h Source File

  • drv
usb_endpoint.h
Go to the documentation of this file.
00001
00042 #ifndef USB_ENDPOINT_H
00043 #define USB_ENDPOINT_H
00044
00045 #include "cfg/cfg_usb.h"
00046 #include "cfg/cfg_usbser.h"
00047 #include "cfg/cfg_usbkbd.h"
00048 #include "cfg/cfg_usbmouse.h"
00049
00050 /* Enpoint allocation (according to the compile-time options) */
00051 enum {
00052     USB_CTRL_ENDPOINT = 0, /* This must be always allocated */
00053 #if (defined(CONFIG_USBSER) && CONFIG_USBSER)
00054     USB_SERIAL_EP_REPORT,
00055     USB_SERIAL_EP_OUT,
00056     USB_SERIAL_EP_IN,
00057 #endif
00058 #if (defined(CONFIG_USBKBD) && CONFIG_USBKBD)
00059     USB_KBD_EP_REPORT,
00060 #endif
00061 #if (defined(CONFIG_USBMOUSE) && CONFIG_USBMOUSE)
00062     USB_MOUSE_EP_REPORT,
00063 #endif
00064  /* Number of allocated endpoints */
00065 #if (CONFIG_USB_EP_MAX == 0)
00066     USB_EP_MAX,
00067 #else
00068     USB_EP_MAX = CONFIG_USB_EP_MAX,
00069 #endif
00070 };
00071
00072 /*
00073  * NOTE: a USB inteface requires at least one endpoint. Moreover, there's the
00074  * special endpoint 0. In conclusion, the number of endpoints must be always
00075  * greater than the number of interfaces.
00076  */
00077 STATIC_ASSERT(USB_EP_MAX >= CONFIG_USB_INTERFACE_MAX);
00078
00079 #endif /* USB_ENDPOINT_H */


BeRTOS: usb_hid.h File Reference

  • drv
usb_hid.h File Reference

Generic USB Human Interface Device (HID) driver. More...

#include <cpu/types.h>

Go to the source code of this file.

Detailed Description

Generic USB Human Interface Device (HID) driver.

Author:
Andrea Righi <arighi@develer.com>

Definition in file usb_hid.h.


BeRTOS: usb_hid.h Source File

  • drv
usb_hid.h
Go to the documentation of this file.
00001
00038 #ifndef USB_HID_H
00039 #define USB_HID_H
00040
00041 #include <cpu/types.h>
00042
00043 /*
00044  * USB HID interface subclass and protocol codes
00045  */
00046 #define USB_INTERFACE_SUBCLASS_BOOT 1
00047 #define USB_INTERFACE_PROTOCOL_KEYBOARD 1
00048 #define USB_INTERFACE_PROTOCOL_MOUSE    2
00049
00050 /*
00051  * HID class requests
00052  */
00053 #define HID_REQ_GET_REPORT      0x01
00054 #define HID_REQ_GET_IDLE        0x02
00055 #define HID_REQ_GET_PROTOCOL        0x03
00056 #define HID_REQ_SET_REPORT      0x09
00057 #define HID_REQ_SET_IDLE        0x0A
00058 #define HID_REQ_SET_PROTOCOL        0x0B
00059
00060 /*
00061  * HID class descriptor types
00062  */
00063 #define HID_DT_HID      (USB_TYPE_CLASS | 0x01)
00064 #define HID_DT_REPORT       (USB_TYPE_CLASS | 0x02)
00065 #define HID_DT_PHYSICAL     (USB_TYPE_CLASS | 0x03)
00066
00067 /*
00068  * USB HID descriptor
00069  */
00070 typedef struct usb_HidDesc
00071 {
00072     uint8_t bLength;
00073     uint8_t bDescriptorType;
00074     uint16_t bcdHID;
00075     uint8_t bCountryCode;
00076     uint8_t bNumDescriptors;
00077     uint8_t bDescriptorHidType;
00078     uint16_t wDescriptorLength;
00079 } PACKED usb_HidDesc;
00080
00081 #endif /* USB_HID_H */


BeRTOS: usb_stm32.c File Reference

  • cpu
  • cortex-m3
  • drv
Functions
usb_stm32.c File Reference

STM32 USB driver. More...

#include "cfg/cfg_usb.h"
#include <cfg/log.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cfg/module.h>
#include <cpu/irq.h>
#include <cpu/power.h>
#include <drv/irq_cm3.h>
#include <drv/gpio_stm32.h>
#include <drv/clock_stm32.h>
#include <drv/timer.h>
#include <drv/usb.h>
#include <mware/event.h>
#include <string.h>
#include "usb_stm32.h"

Go to the source code of this file.

Functions

ssize_t | usb_endpointReadTimeout (int ep, void *buffer, ssize_t size, ticks_t timeout)
Read up to size bytes from the USB endpoint identified by the address ep and store them in buffer.
ssize_t | usb_endpointWriteTimeout (int ep, const void *buffer, ssize_t size, ticks_t timeout)
Write up to size bytes from the buffer pointed buffer to the USB endpoint identified by the address ep.
int | usb_deviceRegister (UsbDevice *dev)
Register a generic USB device driver dev in the USB controller.

Detailed Description

STM32 USB driver.

Author:
Andrea Righi <arighi@develer.com>

Definition in file usb_stm32.c.

Function Documentation

ssize_t usb_endpointReadTimeout | ( | int | ep,
 |  | void * | buffer,
 |  | ssize_t | size,
 |  | ticks_t | timeout
 | ) |  |

Read up to size bytes from the USB endpoint identified by the address ep and store them in buffer.

The timeout is an upper bound on the amount of time (in ticks) elapsed before returns. If timeout is zero, the the function returns immediatly and it basically works in non-blocking fashion. A negative value for timeout means that the function can block indefinitely.

Returns:
number of bytes actually read, or a negative value in case of errors.

Definition at line 1120 of file usb_stm32.c.

ssize_t usb_endpointWriteTimeout | ( | int | ep,
 |  | const void * | buffer,
 |  | ssize_t | size,
 |  | ticks_t | timeout
 | ) |  |

Write up to size bytes from the buffer pointed buffer to the USB endpoint identified by the address ep.

The timeout is an upper bound on the amount of time (in ticks) elapsed before returns. If timeout is zero, the the function returns immediatly and it basically works in non-blocking fashion. A negative value for timeout means that the function can block indefinitely.

Returns:
number of bytes actually wrote, or a negative value in case of errors.

Definition at line 1179 of file usb_stm32.c.


BeRTOS: usb_stm32.c Source File

  • cpu
  • cortex-m3
  • drv
usb_stm32.c
Go to the documentation of this file.
00001
00038 #include "cfg/cfg_usb.h"
00039
00040 #define LOG_LEVEL  USB_LOG_LEVEL
00041 #define LOG_FORMAT USB_LOG_FORMAT
00042
00043 #include <cfg/log.h>
00044 #include <cfg/debug.h>
00045 #include <cfg/macros.h>
00046 #include <cfg/module.h>
00047
00048 #include <cpu/irq.h>
00049 #include <cpu/power.h>
00050
00051 #include <drv/irq_cm3.h>
00052 #include <drv/gpio_stm32.h>
00053 #include <drv/clock_stm32.h>
00054 #include <drv/timer.h>
00055 #include <drv/usb.h>
00056
00057 #include <mware/event.h>
00058
00059 #include <string.h> /* memcpy() */
00060
00061 #include "usb_stm32.h"
00062
00063 /* XXX: consider to move this to cfg/macros.h */
00064
00065 /* XXX: redefine this to make it usable within C expression */
00066 #define _MIN(a,b)   (((a) < (b)) ? (a) : (b))
00067
00068 /* STM32 USB registers */
00069 struct stm32_usb
00070 {
00071     reg32_t EP0R;
00072     reg32_t EP1R;
00073     reg32_t EP2R;
00074     reg32_t EP3R;
00075     reg32_t EP4R;
00076     reg32_t EP5R;
00077     reg32_t EP6R;
00078     reg32_t EP7R;
00079     reg32_t __reserved[8];
00080     reg32_t CNTR;
00081     reg32_t ISTR;
00082     reg32_t FNR;
00083     reg32_t DADDR;
00084     reg32_t BTABLE;
00085 };
00086
00087 /* Hardware registers */
00088 static struct stm32_usb *usb = (struct stm32_usb *)USB_BASE_ADDR;
00089
00090 /* Endpoint descriptors: used for handling requests to use with endpoints */
00091 static stm32_UsbEp ep_cnfg[EP_MAX_NUM];
00092 STATIC_ASSERT(EP_MAX_NUM <= EP_MAX_HW_NUM);
00093
00094 /* USB EP0 control descriptor */
00095 static const UsbEndpointDesc USB_CtrlEpDescr0 =
00096 {
00097     .bLength = sizeof(USB_CtrlEpDescr0),
00098     .bDescriptorType = USB_DT_ENDPOINT,
00099     .bEndpointAddress = USB_DIR_OUT | 0,
00100     .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
00101     .wMaxPacketSize = USB_EP0_MAX_SIZE,
00102     .bInterval = 0,
00103 };
00104
00105 /* USB EP1 control descriptor */
00106 static const UsbEndpointDesc USB_CtrlEpDescr1 =
00107 {
00108     .bLength = sizeof(USB_CtrlEpDescr1),
00109     .bDescriptorType = USB_DT_ENDPOINT,
00110     .bEndpointAddress = USB_DIR_IN | 0,
00111     .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
00112     .wMaxPacketSize = USB_EP0_MAX_SIZE,
00113     .bInterval = 0,
00114 };
00115
00116 /* USB setup packet */
00117 static UsbCtrlRequest setup_packet;
00118
00119 /* USB device controller: max supported interfaces */
00120 #define USB_MAX_INTERFACE   CONFIG_USB_INTERFACE_MAX
00121
00122 /* USB device controller features */
00123 #define STM32_UDC_FEATURE_SELFPOWERED   BV(0)
00124 #define STM32_UDC_FEATURE_REMOTE_WAKEUP BV(1)
00125
00126 /* Hardware-specific USB device controller structure */
00127 typedef struct stm32_udc
00128 {
00129     uint8_t state;
00130     uint32_t cfg_id;
00131     const UsbConfigDesc *cfg;
00132     uint32_t interfaces;
00133     uint32_t alt[USB_MAX_INTERFACE];
00134     uint32_t address;
00135     uint8_t feature;
00136 } PACKED stm32_udc_t;
00137
00138 /* Hardware-specific USB Device Controller */
00139 static stm32_udc_t udc;
00140
00141 /* Generic USB Device Controller structure */
00142 static UsbDevice *usb_dev;
00143
00144 /* USB packet memory management: list of allocated chunks */
00145 static stm32_UsbMemSlot *mem_use;
00146
00147 /* USB packet memory management: memory buffer metadata */
00148 static stm32_UsbMemSlot memory_buffer[EP_MAX_NUM];
00149
00150 /* Endpoint TX and RX buffers */
00151 static size_t rx_size, tx_size;
00152
00153 #define EP_BUFFER_SIZE _MIN(CONFIG_USB_BUFSIZE, USB_XFER_MAX_SIZE)
00154 STATIC_ASSERT(!(EP_BUFFER_SIZE & 0x03));
00155
00156 static uint8_t ep_buffer[EP_MAX_NUM][EP_BUFFER_SIZE] ALIGNED(4);
00157
00158 static Event usb_event_done[EP_MAX_SLOTS];
00159
00160 /* Check if we're running in atomic (non-sleepable) context or not */
00161 static volatile bool in_atomic = false;
00162
00163 /* Allocate a free block of the packet memory */
00164 static stm32_UsbMemSlot *usb_malloc(void)
00165 {
00166     unsigned int i;
00167
00168     for (i = 0; i < countof(memory_buffer); i++)
00169         if (memory_buffer[i].Size == 0)
00170             return &memory_buffer[i];
00171     return NULL;
00172 }
00173
00174 /* Release a block of the packet memory */
00175 static void usb_free(stm32_UsbMemSlot *pPntr)
00176 {
00177     pPntr->Size = 0;
00178 }
00179
00180 /* Allocate a free chunk of the packet memory (inside a block) */
00181 static bool usb_alloc_buffer(uint16_t *pOffset, uint32_t *size,
00182                             int EndPoint)
00183 {
00184     stm32_UsbMemSlot *mem = mem_use,
00185             *memNext, *mem_useNew;
00186     uint32_t max_size = *size;
00187
00188     /*
00189      * Packet size alignment:
00190      *  - fine-granularity allocation: size alignment by 2;
00191      *  - coarse-granularity allocation: size alignment by 32.
00192      */
00193     if (max_size < 62)
00194         max_size = ALIGN_UP(max_size, 2);
00195     else
00196         max_size = ALIGN_UP(max_size, 32);
00197     /*
00198      * Finding free memory chunks from the allocated blocks of the USB
00199      * packet memory.
00200      */
00201     *pOffset = 0;
00202     while (mem != NULL)
00203     {
00204         /* Offset alignment by 4 */
00205         *pOffset = ALIGN_UP(mem->Start + mem->Size, 4);
00206         memNext = mem->next;
00207         if ((mem->next == NULL) ||
00208                 (memNext->Start >=
00209                     *pOffset + max_size))
00210             break;
00211         mem = mem->next;
00212     }
00213     /* Check for out-of-memory condition */
00214     if (UNLIKELY((*pOffset + max_size) >= USB_BDT_OFFSET))
00215         return false;
00216     /*
00217      * Allocate a new memory block, next to the last allocated block.
00218      */
00219     mem_useNew = usb_malloc();
00220     if (UNLIKELY(mem_useNew == NULL))
00221         return false;
00222     /* Insert the block to the list of allocated blocks */
00223     if (mem_use == NULL)
00224     {
00225         mem_use = mem_useNew;
00226         mem_use->next = NULL;
00227     }
00228     else
00229     {
00230         mem_useNew->next = mem->next;
00231         mem->next = mem_useNew;
00232     }
00233     /* Update block's metadata */
00234     mem_useNew->ep_addr = EndPoint;
00235     mem_useNew->Start = *pOffset;
00236     mem_useNew->Size = max_size;
00237
00238     *size = max_size;
00239
00240     return true;
00241 }
00242
00243 /* Release a chunk of the packet memory (inside a block) */
00244 static void usb_free_buffer(int EndPoint)
00245 {
00246     stm32_UsbMemSlot *mem, *memPrev = NULL;
00247     mem = mem_use;
00248
00249     while (mem != NULL)
00250     {
00251         if (mem->ep_addr == EndPoint)
00252         {
00253             if (UNLIKELY(memPrev == NULL))
00254             {
00255                 /* Free the first element of the list */
00256                 mem_use = mem_use->next;
00257                 usb_free(mem);
00258                 mem = mem_use;
00259                 continue;
00260             }
00261             memPrev->next = mem->next;
00262             usb_free(mem);
00263         }
00264         else
00265             memPrev = mem;
00266         mem = memPrev->next;
00267     }
00268 }
00269
00270 /*-------------------------------------------------------------------------*/
00271
00272 /* Connect USB controller */
00273 static void usb_connect(void)
00274 {
00275     stm32_gpioPinWrite((struct stm32_gpio *)GPIOC_BASE, 1 << 11, 0);
00276 }
00277
00278 /* Set USB device address */
00279 static void usb_set_address(uint32_t addr)
00280 {
00281     usb->DADDR = addr | 0x80;
00282 }
00283
00284 /* Suspend USB controller */
00285 static void usb_suspend(void)
00286 {
00287     usb->CNTR |= bmFSUSP | bmLPMODE;
00288 }
00289
00290 /* Resume USB controller */
00291 static void usb_resume(void)
00292 {
00293     uint32_t line_status;
00294
00295     line_status = usb->FNR & 0xc000;
00296     if (!line_status)
00297         return;
00298     /* check for noise and eventually return to sleep */
00299     if (line_status == 0xc000)
00300         usb_suspend();
00301     else
00302         usb->CNTR &= ~(bmFSUSP | bmLPMODE);
00303 }
00304
00305 /* Convert logical EP address to physical EP address */
00306 static int usb_ep_logical_to_hw(uint8_t ep_addr)
00307 {
00308     int addr = (ep_addr & 0x0f) << 1;
00309     return (ep_addr & 0x80) ? addr + 1 : addr;
00310 }
00311
00312 /* Set EP address */
00313 static void ep_ctrl_set_ea(reg32_t *reg, uint32_t val)
00314 {
00315     val &= 0x0f;
00316     val |= *reg & 0x0700;
00317     val |= USB_CTRL_CLEAR_ONLY_MASK;
00318     *reg = val;
00319 }
00320
00321 /* Get EP IN status */
00322 static uint32_t ep_ctrl_get_stat_tx(reg32_t *reg)
00323 {
00324     return (*reg & (0x3UL << 4)) >> 4;
00325 }
00326
00327 /* Set EP IN state */
00328 static void ep_ctrl_set_stat_tx(reg32_t *reg, stm32_UsbEpState val)
00329 {
00330     uint32_t state;
00331     int i;
00332
00333     /*
00334      * The EP can change state between read and write operations from VALID
00335      * to NAK and result of set operation will be invalid.
00336      */
00337     for (i = 0; i < 2; i++)
00338     {
00339         if (ep_ctrl_get_stat_tx(reg) == val)
00340             return;
00341         state = val;
00342         state <<= 4;
00343         state ^= *reg;
00344         state |= USB_CTRL_CLEAR_ONLY_MASK;
00345         /* Clear the toggle bits without STAT_TX (4,5) */
00346         state &= ~0x7040;
00347         *reg = state;
00348     }
00349 }
00350
00351 /* Set EP DTOG_TX bit (IN) */
00352 static void ep_ctrl_set_dtog_tx(reg32_t *reg, uint32_t val)
00353 {
00354     val = val ? (*reg ^ (1UL << 6)) : *reg;
00355     /* Clear the toggle bits without DTOG_TX (6) */
00356     val &= ~0x7030;
00357     val |= USB_CTRL_CLEAR_ONLY_MASK;
00358     *reg = val;
00359 }
00360
00361 /* Clear EP CTR_TX bit (IN) */
00362 static void ep_ctrl_clr_ctr_tx(reg32_t *reg)
00363 {
00364     uint32_t val = *reg;
00365
00366     val &= ~(USB_CTRL_TOGGLE_MASK | 1UL << 7);
00367     /* Set RX_CTR */
00368     val |= 1UL << 15;
00369     *reg = val;
00370 }
00371
00372 /* Clear EP CTR_RX bit (OUT) */
00373 static void ep_ctrl_clr_ctr_rx(reg32_t *reg)
00374 {
00375     uint32_t val = *reg;
00376     val &= ~(USB_CTRL_TOGGLE_MASK | 1UL << 15);
00377     /* Set TX_CTR */
00378     val |= 1UL << 7;
00379     *reg = val;
00380 }
00381
00382 /* Set EP KIND bit */
00383 static void ep_ctrl_set_ep_kind(reg32_t *reg, uint32_t val)
00384 {
00385     val = val ? (1UL << 8) : 0;
00386     val |= *reg & ~(USB_CTRL_TOGGLE_MASK | (1UL << 8));
00387     val |= USB_CTRL_CLEAR_ONLY_MASK;
00388     *reg = val;
00389 }
00390
00391 /* Set EP type */
00392 static int ep_ctrl_set_ep_type(reg32_t *reg, uint8_t val)
00393 {
00394     uint32_t type;
00395
00396     if (UNLIKELY(val >= EP_TYPE_MAX))
00397     {
00398         ASSERT(0);
00399         return USB_INVAL_ERROR;
00400     }
00401     type = val;
00402     type <<= 9;
00403     type |= *reg & ~(USB_CTRL_TOGGLE_MASK | (0x3UL << 9));
00404     type |= USB_CTRL_CLEAR_ONLY_MASK;
00405     *reg = type;
00406
00407     return USB_OK;
00408 }
00409
00410 /* Get EP STAT_RX (OUT) */
00411 static uint32_t ep_ctrl_get_stat_rx(reg32_t *reg)
00412 {
00413     uint32_t val = *reg & (0x3UL << 12);
00414     return val >> 12;
00415 }
00416
00417 /* Set EP STAT_RX (OUT) */
00418 static void ep_ctrl_set_stat_rx(reg32_t *reg, stm32_UsbEpState val)
00419 {
00420     uint32_t state;
00421     int i;
00422
00423     /*
00424      * The EP can change state between read and write operations from VALID
00425      * to NAK and result of set operation will be invalid.
00426      */
00427     for (i = 0; i < 2; i++)
00428     {
00429         if (ep_ctrl_get_stat_rx(reg) == val)
00430             return;
00431         state = val;
00432         state <<= 12;
00433         state ^= *reg;
00434         state |= USB_CTRL_CLEAR_ONLY_MASK;
00435         /* Clear the toggle bits without STAT_RX (12,13) */
00436         state &= ~0x4070;
00437         *reg = state;
00438     }
00439 }
00440
00441 /* Set DTOG_RX bit */
00442 static void ep_ctrl_set_dtog_rx(reg32_t *reg, uint32_t val)
00443 {
00444     val = val ? (*reg ^ (1UL << 14)) : *reg;
00445     /* Clear the toggle bits without DTOG_RX (14) */
00446     val &= ~0x3070;
00447     val |= USB_CTRL_CLEAR_ONLY_MASK;
00448     *reg = val;
00449 }
00450
00451 /* Get EP SETUP bit */
00452 static uint32_t ep_ctrl_get_setup(reg32_t *reg)
00453 {
00454     uint32_t val = *reg & (1UL << 11);
00455     return val ? 1 : 0;
00456 }
00457
00458 /* Core endpoint I/O function */
00459 static void __usb_ep_io(int EP)
00460 {
00461     ssize_t Count, CountHold, Offset;
00462     uint32_t *pDst, *pSrc, Data;
00463     stm32_UsbEp *epd = &ep_cnfg[EP];
00464
00465     if (UNLIKELY(epd->hw == NULL))
00466     {
00467         LOG_ERR("%s: invalid endpoint (EP%d-%s)\n",
00468                 __func__,
00469                 EP >> 1,
00470                 (EP & 0x01) ? "IN" : "OUT");
00471         ASSERT(0);
00472         return;
00473     }
00474     if (epd->status != BEGIN_SERVICED && epd->status != NO_SERVICED)
00475         return;
00476
00477     if (EP & 0x01)
00478     {
00479         /* EP IN */
00480         Count = epd->size - epd->offset;
00481         while (epd->avail_data)
00482         {
00483             if (!Count && !(epd->flags & STM32_USB_EP_ZERO_PACKET))
00484                 break;
00485
00486             /* Set Status */
00487             epd->status = BEGIN_SERVICED;
00488             /* Get data size */
00489             if ((epd->flags & STM32_USB_EP_ZERO_PACKET) &&
00490                     (Count == epd->max_size))
00491                 epd->flags |= STM32_USB_EP_ZERO_PACKET |
00492                         STM32_USB_EP_ZERO_POSSIBLE;
00493
00494             CountHold = Count = MIN(Count, epd->max_size);
00495             if (!Count)
00496                 epd->flags |= STM32_USB_EP_ZERO_PACKET;
00497             Offset = epd->offset;
00498             epd->offset += Count;
00499             switch (epd->type)
00500             {
00501             case USB_ENDPOINT_XFER_CONTROL:
00502             case USB_ENDPOINT_XFER_INT:
00503                 pDst = (uint32_t *)USB_MEM_ADDR(EP_DTB_READ(EP >> 1, ADDR_TX_OFFSET));
00504                 break;
00505             case USB_ENDPOINT_XFER_BULK:
00506                 pDst = (uint32_t *)USB_MEM_ADDR(EP_DTB_READ(EP >> 1, ADDR_TX_OFFSET));
00507                 break;
00508             case USB_ENDPOINT_XFER_ISOC:
00509                 LOG_ERR("%s: isochronous transfer not supported\n",
00510                     __func__);
00511                 /* Fallback to default */
00512             default:
00513                 ASSERT(0);
00514                 return;
00515             }
00516
00517             /* Write data to packet memory buffer */
00518             while (Count)
00519             {
00520                 Data = *(epd->write_buffer + Offset++);
00521                 if (--Count)
00522                 {
00523                     Data |= (uint32_t)(*(epd->write_buffer + Offset++)) << 8;
00524                     --Count;
00525                 }
00526                 *pDst++ = Data;
00527             }
00528
00529             EP_DTB_WRITE(EP >> 1, COUNT_TX_OFFSET, CountHold);
00530             ep_ctrl_set_stat_tx(epd->hw, EP_VALID);
00531
00532             --ep_cnfg[EP].avail_data;
00533             Count = epd->size - epd->offset;
00534         }
00535         if (!Count && !(epd->flags & STM32_USB_EP_ZERO_PACKET))
00536         {
00537             epd->status = COMPLETE;
00538             /* call callback function */
00539             if (epd->complete)
00540                 epd->complete(EP);
00541         }
00542     }
00543     else
00544     {
00545         /* EP OUT */
00546         while (epd->avail_data)
00547         {
00548             /* Get data size and buffer pointer */
00549             switch (epd->type)
00550             {
00551             case USB_ENDPOINT_XFER_CONTROL:
00552             case USB_ENDPOINT_XFER_INT:
00553                 /* Get received bytes number */
00554                 Count = EP_DTB_READ(EP >> 1, COUNT_RX_OFFSET) & 0x3FF;
00555                 /* Get address of the USB packet buffer for corresponding EP */
00556                 pSrc = (uint32_t *)USB_MEM_ADDR(EP_DTB_READ(EP >> 1, ADDR_RX_OFFSET));
00557                 break;
00558             case USB_ENDPOINT_XFER_BULK:
00559                 /* Get received bytes number */
00560                 Count = EP_DTB_READ(EP >> 1, COUNT_RX_OFFSET) & 0x3FF;
00561                 /* Get address of the USB packet buffer for corresponding EP */
00562                 pSrc = (uint32_t *)USB_MEM_ADDR(EP_DTB_READ(EP >> 1, ADDR_RX_OFFSET));
00563                 break;
00564             case USB_ENDPOINT_XFER_ISOC:
00565                 LOG_ERR("%s: isochronous transfer not supported\n",
00566                     __func__);
00567                 /* Fallback to default */
00568             default:
00569                 ASSERT(0);
00570                 return;
00571             }
00572
00573             if (Count > (epd->size - epd->offset))
00574             {
00575                 epd->status = BUFFER_OVERRUN;
00576                 epd->size = ep_cnfg[EP].offset;
00577                 break;
00578             }
00579             else if (Count < ep_cnfg[EP].max_size)
00580             {
00581                 epd->status = BUFFER_UNDERRUN;
00582                 epd->size = ep_cnfg[EP].offset + Count;
00583             }
00584             else
00585                 epd->status = BEGIN_SERVICED;
00586
00587             Offset = epd->offset;
00588             epd->offset += Count;
00589
00590             /* Read data from packet memory buffer */
00591             while (Count)
00592             {
00593                 Data = *pSrc++;
00594                 *(epd->read_buffer + Offset++) = Data;
00595                 if (--Count)
00596                 {
00597                     Data >>= 8;
00598                     *(epd->read_buffer + Offset++) = Data;
00599                     --Count;
00600                 }
00601             }
00602
00603             ep_ctrl_set_stat_rx(epd->hw, EP_VALID);
00604
00605             --ep_cnfg[EP].avail_data;
00606
00607             if (*epd->hw & (1UL << 11))
00608             {
00609                 ep_cnfg[EP].status = SETUP_OVERWRITE;
00610                 return;
00611             }
00612             if (!(Count = (epd->size - epd->offset)))
00613             {
00614                 epd->status = COMPLETE;
00615                 break;
00616             }
00617         }
00618         if (epd->status != BEGIN_SERVICED && epd->status != NO_SERVICED)
00619         {
00620             /* call callback function */
00621             if (epd->complete)
00622                 epd->complete(EP);
00623         }
00624     }
00625 }
00626
00627 /*
00628  * Return the lower value from Host expected size and size and set a flag
00629  * STM32_USB_EP_ZERO_POSSIBLE when size is lower that host expected size.
00630  */
00631 static size_t usb_size(size_t size, size_t host_size)
00632 {
00633     if (size < host_size)
00634     {
00635         ep_cnfg[CTRL_ENP_IN].flags |= STM32_USB_EP_ZERO_POSSIBLE;
00636         return size;
00637     }
00638     return host_size;
00639 }
00640
00641 /* Configure an EP descriptor before performing a I/O operation */
00642 #define USB_EP_IO(__EP, __op, __buf, __size, __complete)        \
00643 ({                                  \
00644     cpu_flags_t flags;                      \
00645     stm32_UsbIoStatus ret;                  \
00646                                     \
00647     /* Fill EP descriptor */                    \
00648     IRQ_SAVE_DISABLE(flags);                    \
00649     if (__size < 0)                         \
00650     {                               \
00651         ep_cnfg[__EP].status = NOT_READY;           \
00652         ep_cnfg[__EP].complete = NULL;              \
00653         ret = NOT_READY;                    \
00654         goto out;                       \
00655     }                               \
00656     if (ep_cnfg[__EP].status == BEGIN_SERVICED)         \
00657     {                               \
00658         ret = NOT_READY;                    \
00659         goto out;                       \
00660     }                               \
00661     /*                              \
00662      * NOTE: the write_buffer and read_buffer are actually the  \
00663      * same location in memory (it's a union).          \
00664      *                              \
00665      * We have to do this trick to silent a build warning by    \
00666      * casting the I/O buffer to (void *) or (const void *).    \
00667      */                             \
00668     ep_cnfg[__EP].__op ## _buffer = __buf;              \
00669     ep_cnfg[__EP].offset = 0;                   \
00670     ep_cnfg[__EP].size = __size;                    \
00671     ep_cnfg[__EP].complete = __complete;                \
00672     if (!size)                          \
00673         ep_cnfg[__EP].flags = STM32_USB_EP_ZERO_PACKET;     \
00674     else                                \
00675         ep_cnfg[__EP].flags = 0;                \
00676     ep_cnfg[__EP].status = NO_SERVICED;             \
00677                                     \
00678     /* Perform the I/O operation */                 \
00679     __usb_ep_io(__EP);                      \
00680                                     \
00681     ret = ep_cnfg[__EP].status;                 \
00682 out:                                    \
00683     IRQ_RESTORE(flags);                     \
00684     ret;                                \
00685 })
00686
00687 /* Configure and endponint and perform a read operation */
00688 static stm32_UsbIoStatus
00689 __usb_ep_read(int ep, void *buffer, ssize_t size, void (*complete)(int))
00690 {
00691     if (UNLIKELY((ep >= EP_MAX_NUM) || (ep & 0x01)))
00692     {
00693         LOG_ERR("%s: invalid EP number %d\n", __func__, ep);
00694         ASSERT(0);
00695         return STALLED;
00696     }
00697     if (UNLIKELY((size_t)buffer & 0x03))
00698     {
00699         LOG_ERR("%s: unaligned buffer @ %p\n", __func__, buffer);
00700         ASSERT(0);
00701         return STALLED;
00702     }
00703     return USB_EP_IO(ep, read, buffer, size, complete);
00704 }
00705
00706 /* Configure and endponint and perform a write operation */
00707 static stm32_UsbIoStatus
00708 __usb_ep_write(int ep, const void *buffer, ssize_t size, void (*complete)(int))
00709 {
00710     if (UNLIKELY((ep >= EP_MAX_NUM) || !(ep & 0x01)))
00711     {
00712         LOG_ERR("%s: invalid EP number %d\n", __func__, ep);
00713         ASSERT(0);
00714         return STALLED;
00715     }
00716     if (UNLIKELY((size_t)buffer & 0x03))
00717     {
00718         LOG_ERR("%s: unaligned buffer @ %p\n", __func__, buffer);
00719         ASSERT(0);
00720         return STALLED;
00721     }
00722     return USB_EP_IO(ep, write, buffer, size, complete);
00723 }
00724
00725 static void usb_ep_low_level_config(int ep, uint16_t offset, uint16_t size)
00726 {
00727     stm32_UsbEp *epc = &ep_cnfg[ep];
00728
00729     /* IN EP */
00730     if (ep & 0x01)
00731     {
00732         /* Disable EP */
00733         ep_ctrl_set_stat_tx(epc->hw, EP_DISABLED);
00734         /* Clear Tx toggle */
00735         ep_ctrl_set_dtog_tx(epc->hw, 0);
00736         /* Clear Correct Transfer for transmission flag */
00737         ep_ctrl_clr_ctr_tx(epc->hw);
00738
00739         /* Update EP description table */
00740         EP_DTB_WRITE(ep >> 1, ADDR_TX_OFFSET, offset);
00741         EP_DTB_WRITE(ep >> 1, COUNT_TX_OFFSET, 0);
00742     }
00743     /* OUT EP */
00744     else
00745     {
00746         uint16_t rx_count = 0;
00747
00748         /* Disable EP */
00749         ep_ctrl_set_stat_rx(epc->hw, EP_DISABLED);
00750         /* Clear Rx toggle */
00751         ep_ctrl_set_dtog_rx(epc->hw, 0);
00752         /* Clear Correct Transfer for reception flag */
00753         ep_ctrl_clr_ctr_rx(epc->hw);
00754         /* Descriptor block size field */
00755         rx_count |= (size > 62) << 15;
00756         /* Descriptor number of blocks field */
00757         rx_count |= (((size > 62) ?  (size >> 5) - 1 : size >> 1) &
00758                 0x1f) << 10;
00759         /* Update EP description table */
00760         EP_DTB_WRITE(ep >> 1, ADDR_RX_OFFSET, offset);
00761         EP_DTB_WRITE(ep >> 1, COUNT_RX_OFFSET, rx_count);
00762     }
00763 }
00764
00765 /* Enable/Disable an endpoint */
00766 static int usb_ep_configure(const UsbEndpointDesc *epd, bool enable)
00767 {
00768     int EP;
00769     stm32_UsbEp *ep_hw;
00770     reg32_t *hw;
00771     uint16_t Offset;
00772     uint32_t size;
00773
00774     EP = usb_ep_logical_to_hw(epd->bEndpointAddress);
00775     ep_hw = &ep_cnfg[EP];
00776
00777     if (enable)
00778     {
00779         /*
00780          * Allocate packet memory for EP buffer/s calculate actual size
00781          * only for the OUT EPs.
00782          */
00783         size = epd->wMaxPacketSize;
00784         if (!usb_alloc_buffer(&Offset, &size, EP))
00785             return -USB_MEMORY_FULL;
00786
00787         /* Set EP status */
00788         ep_hw->status  = NOT_READY;
00789         /* Init EP flags */
00790         ep_hw->flags = 0;
00791
00792         /* Set endpoint type */
00793         ep_hw->type = usb_endpointType(epd);
00794         /* Init EP max packet size */
00795         ep_hw->max_size = epd->wMaxPacketSize;
00796
00797         if (EP & 0x01)
00798             ep_hw->avail_data = 1;
00799         else
00800             ep_hw->avail_data = 0;
00801         hw = (reg32_t *)&usb->EP0R;
00802         hw += EP >> 1;
00803
00804         /* Set Ep Address */
00805         ep_ctrl_set_ea(hw, EP >> 1);
00806         ep_hw->hw = hw;
00807         LOG_INFO("%s: EP%d-%s configured\n",
00808                 __func__, EP >> 1, EP & 1 ? "IN" : "OUT");
00809
00810         /* Low-level endpoint configuration */
00811         usb_ep_low_level_config(EP, Offset, size);
00812
00813         /* Set EP Kind & enable */
00814         switch (ep_hw->type)
00815         {
00816         case USB_ENDPOINT_XFER_CONTROL:
00817             LOG_INFO("EP%d: CONTROL %s\n", EP >> 1,
00818                     EP & 1 ? "IN" : "OUT");
00819             ep_ctrl_set_ep_type(hw, EP_CTRL);
00820             ep_ctrl_set_ep_kind(hw, 0);
00821             break;
00822         case USB_ENDPOINT_XFER_INT:
00823             LOG_INFO("EP%d: INTERRUPT %s\n", EP >> 1,
00824                     EP & 1 ? "IN" : "OUT");
00825             ep_ctrl_set_ep_type(hw, EP_INTERRUPT);
00826             ep_ctrl_set_ep_kind(hw, 0);
00827             break;
00828         case USB_ENDPOINT_XFER_BULK:
00829             LOG_INFO("EP%d: BULK %s\n", EP >> 1,
00830                     EP & 1 ? "IN" : "OUT");
00831             ep_ctrl_set_ep_type(hw, EP_BULK);
00832             ep_ctrl_set_ep_kind(hw, 0);
00833             break;
00834         case USB_ENDPOINT_XFER_ISOC:
00835             LOG_ERR("EP%d: ISOCHRONOUS %s: not supported\n",
00836                     EP >> 1,
00837                     EP & 1 ? "IN" : "OUT");
00838             /* Fallback to default */
00839         default:
00840             ASSERT(0);
00841             return -USB_NODEV_ERROR;
00842         }
00843         if (EP & 0x01)
00844         {
00845             /* Enable EP */
00846             ep_ctrl_set_stat_tx(hw, EP_NAK);
00847             /* Clear Correct Transfer for transmission flag */
00848             ep_ctrl_clr_ctr_tx(hw);
00849         }
00850         else
00851         {
00852             /* Enable EP */
00853             ep_ctrl_set_stat_rx(hw, EP_VALID);
00854         }
00855     }
00856     else if (ep_cnfg[EP].hw)
00857     {
00858         hw = (reg32_t *)&usb->EP0R;
00859         hw += EP >> 1;
00860
00861         /* IN EP */
00862         if (EP & 0x01)
00863         {
00864             /* Disable IN EP */
00865             ep_ctrl_set_stat_tx(hw, EP_DISABLED);
00866             /* Clear Correct Transfer for reception flag */
00867             ep_ctrl_clr_ctr_tx(hw);
00868         }
00869         /* OUT EP */
00870         else
00871         {
00872             /* Disable OUT EP */
00873             ep_ctrl_set_stat_rx(hw, EP_DISABLED);
00874             /* Clear Correct Transfer for reception flag */
00875             ep_ctrl_clr_ctr_rx(hw);
00876         }
00877         /* Release buffer */
00878         usb_free_buffer(EP);
00879         ep_cnfg[EP].hw = NULL;
00880     }
00881     return 0;
00882 }
00883
00884 /* Get EP stall/unstall */
00885 static int usb_ep_get_stall(int EP, bool *pStall)
00886 {
00887     if (ep_cnfg[EP].hw == NULL)
00888         return -USB_NODEV_ERROR;
00889
00890     *pStall = (EP & 0x01) ?
00891         (ep_ctrl_get_stat_tx(ep_cnfg[EP].hw) == EP_STALL):  /* IN EP  */
00892         (ep_ctrl_get_stat_rx(ep_cnfg[EP].hw) == EP_STALL);  /* OUT EP */
00893
00894     return USB_OK;
00895 }
00896
00897 /* Set EP stall/unstall */
00898 static int usb_ep_set_stall(int EP, bool Stall)
00899 {
00900     if (ep_cnfg[EP].hw == NULL)
00901         return -USB_NODEV_ERROR;
00902
00903     if (Stall)
00904     {
00905         ep_cnfg[EP].status = STALLED;
00906         if (EP & 0x01)
00907         {
00908             /* IN EP */
00909             ep_ctrl_set_stat_tx(ep_cnfg[EP].hw, EP_STALL);
00910             ep_cnfg[EP].avail_data = 1;
00911         }
00912         else
00913         {
00914             /* OUT EP */
00915             ep_ctrl_set_stat_rx(ep_cnfg[EP].hw, EP_STALL);
00916             ep_cnfg[EP].avail_data = 0;
00917         }
00918     }
00919     else
00920     {
00921         ep_cnfg[EP].status = NOT_READY;
00922         if(EP & 0x01)
00923         {
00924             /* IN EP */
00925             ep_cnfg[EP].avail_data = 1;
00926             /* reset Data Toggle bit */
00927             ep_ctrl_set_dtog_tx(ep_cnfg[EP].hw, 0);
00928             ep_ctrl_set_stat_tx(ep_cnfg[EP].hw, EP_NAK);
00929         }
00930         else
00931         {
00932             /* OUT EP */
00933             ep_cnfg[EP].avail_data = 0;
00934             /* reset Data Toggle bit */
00935             ep_ctrl_set_dtog_rx(ep_cnfg[EP].hw, 0);
00936             ep_ctrl_set_stat_rx(ep_cnfg[EP].hw, EP_VALID);
00937         }
00938     }
00939     return USB_OK;
00940 }
00941
00942 /* Stall both directions of the control EP */
00943 static void usb_ep_set_stall_ctrl(void)
00944 {
00945     ep_cnfg[CTRL_ENP_IN].avail_data = 1;
00946     ep_cnfg[CTRL_ENP_IN].status = STALLED;
00947     ep_cnfg[CTRL_ENP_OUT].avail_data = 0;
00948     ep_cnfg[CTRL_ENP_OUT].status = STALLED;
00949
00950     usb_ep_set_stall(CTRL_ENP_IN, true);
00951     usb_ep_set_stall(CTRL_ENP_OUT, true);
00952 }
00953
00954 /*
00955  * Find the position of an interface descriptor inside the configuration
00956  * descriptor.
00957  */
00958 static int usb_find_interface(uint32_t num, uint32_t alt)
00959 {
00960     const UsbInterfaceDesc *id;
00961     int i;
00962
00963     for (i = 0; ; i++)
00964     {
00965         /* TODO: support more than one configuration per device */
00966         id = (const UsbInterfaceDesc *)usb_dev->config[i];
00967         if (id == NULL)
00968             break;
00969         if (id->bDescriptorType != USB_DT_INTERFACE)
00970             continue;
00971         if ((id->bInterfaceNumber == num) &&
00972                 (id->bAlternateSetting == alt))
00973             return i;
00974     }
00975     return -USB_NODEV_ERROR;
00976 }
00977
00978 /*
00979  * Configure/deconfigure EPs of a certain interface.
00980  */
00981 static void
00982 usb_configure_ep_interface(unsigned int num, unsigned int alt, bool enable)
00983 {
00984     const UsbEndpointDesc *epd;
00985     int i, start;
00986
00987     /*
00988      * Find the position of the interface descriptor (inside the
00989      * configuration descriptor).
00990      */
00991     start = usb_find_interface(num, alt);
00992     if (start < 0)
00993     {
00994         LOG_ERR("%s: interface (%u,%u) not found\n",
00995             __func__, num, alt);
00996         return;
00997     }
00998     /*
00999      * Cycle over endpoint descriptors.
01000      *
01001      * NOTE: the first endpoint descriptor is placed next to the interface
01002      * descriptor, so we need to add +1 to the position of the interface
01003      * descriptor to find it.
01004      */
01005     for (i = start + 1; ; i++)
01006     {
01007         epd = (const UsbEndpointDesc *)usb_dev->config[i];
01008         if ((epd == NULL) || (epd->bDescriptorType == USB_DT_INTERFACE))
01009             break;
01010         if (epd->bDescriptorType != USB_DT_ENDPOINT)
01011             continue;
01012         if (UNLIKELY(usb_ep_configure(epd, enable) < 0))
01013         {
01014             LOG_ERR("%s: out of memory, can't initialize EP\n",
01015                 __func__);
01016             return;
01017         }
01018     }
01019 }
01020
01021 /* Set device state */
01022 static void usb_set_device_state(int state)
01023 {
01024     unsigned int i;
01025
01026     LOG_INFO("%s: new state %d\n", __func__, state);
01027
01028     if (udc.state == USB_STATE_CONFIGURED)
01029     {
01030         /* Deconfigure device */
01031         for (i = 0; i < udc.interfaces; ++i)
01032             usb_configure_ep_interface(i,
01033                 udc.alt[i], false);
01034     }
01035     switch (state)
01036     {
01037     case USB_STATE_ATTACHED:
01038     case USB_STATE_POWERED:
01039     case USB_STATE_DEFAULT:
01040         usb_set_address(0);
01041         usb_dev->configured = false;
01042         udc.address = udc.cfg_id = 0;
01043         break;
01044     case USB_STATE_ADDRESS:
01045         udc.cfg_id = 0;
01046         break;
01047     case USB_STATE_CONFIGURED:
01048         /* Configure device */
01049         for (i = 0; i < udc.interfaces; ++i)
01050             usb_configure_ep_interface(i,
01051                 udc.alt[i], true);
01052         break;
01053     default:
01054         /* Unknown state: disconnected or connection in progress */
01055         usb_dev->configured = false;
01056         udc.address = 0;
01057         udc.cfg_id = 0;
01058         break;
01059     }
01060     udc.state = state;
01061 }
01062
01063 /* Setup packet: set address status phase end handler */
01064 static void usb_add_status_handler_end(UNUSED_ARG(int, EP))
01065 {
01066     uint16_t w_value;
01067
01068     w_value = usb_le16_to_cpu(setup_packet.wValue);
01069     udc.address = w_value & 0xff;
01070     usb_set_address(udc.address);
01071
01072     if (udc.address)
01073         usb_set_device_state(USB_STATE_ADDRESS);
01074     else
01075         usb_set_device_state(USB_STATE_DEFAULT);
01076
01077     __usb_ep_write(CTRL_ENP_IN, NULL, -1, NULL);
01078     __usb_ep_read(CTRL_ENP_OUT, NULL, -1, NULL);
01079 }
01080
01081 /* Prepare status phase */
01082 static void usb_status_phase(bool in)
01083 {
01084     if (in)
01085         __usb_ep_write(CTRL_ENP_IN, NULL, 0, NULL);
01086 }
01087
01088 /* Setup packet: status phase end handler */
01089 static void usb_status_handler_end(UNUSED_ARG(int, EP))
01090 {
01091     __usb_ep_write(CTRL_ENP_IN, NULL, -1, NULL);
01092     __usb_ep_read(CTRL_ENP_OUT, NULL, -1, NULL);
01093 }
01094
01095 /* Address status handler */
01096 static void usb_status_handler(UNUSED_ARG(int, EP))
01097 {
01098     if (setup_packet.mRequestType & USB_DIR_IN)
01099     {
01100         usb_status_phase(false);
01101         ep_cnfg[CTRL_ENP_OUT].complete = usb_status_handler_end;
01102     }
01103     else
01104     {
01105         usb_status_phase(true);
01106         ep_cnfg[CTRL_ENP_IN].complete =
01107             (setup_packet.bRequest == USB_REQ_SET_ADDRESS) ?
01108                 usb_add_status_handler_end :
01109                 usb_status_handler_end;
01110     }
01111 }
01112
01113 static void usb_endpointRead_complete(int ep)
01114 {
01115     if (UNLIKELY(ep >= EP_MAX_NUM))
01116     {
01117         ASSERT(0);
01118         return;
01119     }
01120     ASSERT(!(ep & 0x01));
01121
01122     event_do(&usb_event_done[ep >> 1]);
01123     rx_size = ep_cnfg[ep].size;
01124 }
01125
01126 ssize_t usb_endpointReadTimeout(int ep, void *buffer, ssize_t size,
01127                 ticks_t timeout)
01128 {
01129     int ep_num = usb_ep_logical_to_hw(ep);
01130     ssize_t max_size = sizeof(ep_buffer[ep_num]);
01131
01132     /* Non-blocking read for EP0 */
01133     if (in_atomic && (ep_num == CTRL_ENP_OUT))
01134     {
01135         size = usb_size(size, usb_le16_to_cpu(setup_packet.wLength));
01136         if (UNLIKELY(size > max_size))
01137         {
01138             LOG_ERR("%s: ep_buffer exceeded, try to enlarge CONFIG_USB_BUFSIZE\n",
01139                     __func__);
01140             ASSERT(0);
01141             return -USB_BUF_OVERFLOW;
01142         }
01143         if (!size)
01144             usb_status_handler(ep_num);
01145         else
01146         {
01147             __usb_ep_read(ep_num, ep_buffer[ep_num], size,
01148                     usb_status_handler);
01149             memcpy(buffer, ep_buffer[ep_num], size);
01150         }
01151         return size;
01152     }
01153     if (UNLIKELY(!size))
01154         return 0;
01155     size = MIN(size, max_size);
01156     event_initGeneric(&usb_event_done[ep_num >> 1]);
01157     rx_size = 0;
01158
01159     /* Blocking read */
01160     __usb_ep_read(ep_num, ep_buffer[ep_num], size,
01161                 usb_endpointRead_complete);
01162     if (timeout < 0)
01163         event_wait(&usb_event_done[ep_num >> 1]);
01164     else
01165         if (!event_waitTimeout(&usb_event_done[ep_num >> 1], timeout))
01166             return 0;
01167     memcpy(buffer, ep_buffer[ep_num], rx_size);
01168
01169     return rx_size;
01170 }
01171
01172 static void usb_endpointWrite_complete(int ep)
01173 {
01174     if (UNLIKELY(ep >= EP_MAX_NUM))
01175     {
01176         ASSERT(0);
01177         return;
01178     }
01179     ASSERT(ep & 0x01);
01180
01181     event_do(&usb_event_done[ep >> 1]);
01182     tx_size = ep_cnfg[ep].size;
01183 }
01184
01185 ssize_t usb_endpointWriteTimeout(int ep, const void *buffer, ssize_t size,
01186                 ticks_t timeout)
01187 {
01188     int ep_num = usb_ep_logical_to_hw(ep);
01189     ssize_t max_size = sizeof(ep_buffer[ep_num]);
01190
01191     /* Non-blocking write for EP0 */
01192     if (in_atomic && (ep_num == CTRL_ENP_IN))
01193     {
01194         size = usb_size(size, usb_le16_to_cpu(setup_packet.wLength));
01195         if (UNLIKELY(size > max_size))
01196         {
01197             LOG_ERR("%s: ep_buffer exceeded, try to enlarge CONFIG_USB_BUFSIZE\n",
01198                     __func__);
01199             ASSERT(0);
01200             return -USB_BUF_OVERFLOW;
01201         }
01202         if (!size)
01203             usb_status_handler(ep_num);
01204         else
01205         {
01206             memcpy(ep_buffer[ep_num], buffer, size);
01207             __usb_ep_write(ep_num, ep_buffer[ep_num], size,
01208                     usb_status_handler);
01209         }
01210         return size;
01211     }
01212     if (UNLIKELY(!size))
01213         return 0;
01214     size = MIN(size, max_size);
01215     event_initGeneric(&usb_event_done[ep_num >> 1]);
01216     tx_size = 0;
01217
01218     /* Blocking write */
01219     memcpy(ep_buffer[ep_num], buffer, size);
01220     __usb_ep_write(ep_num, ep_buffer[ep_num], size,
01221                 usb_endpointWrite_complete);
01222     if (timeout < 0)
01223         event_wait(&usb_event_done[ep_num >> 1]);
01224     else
01225         if (!event_waitTimeout(&usb_event_done[ep_num >> 1], timeout))
01226             return 0;
01227
01228     return tx_size;
01229 }
01230
01231 /* Global variable to handle the following non-blocking I/O operations */
01232 static uint32_t InData;
01233
01234 /* Get device status */
01235 static int usb_send_device_status(uint16_t index)
01236 {
01237     if (index)
01238         return -USB_NODEV_ERROR;
01239
01240     InData = ((uint32_t)udc.feature) & 0xff;
01241     __usb_ep_write(CTRL_ENP_IN,
01242             (uint8_t *)&InData, sizeof(uint16_t),
01243             usb_status_handler);
01244     return 0;
01245 }
01246
01247 /* Get interface status */
01248 static int usb_send_interface_status(UNUSED_ARG(uint16_t, index))
01249 {
01250     InData = 0;
01251     __usb_ep_write(CTRL_ENP_IN,
01252             (uint8_t *)&InData, sizeof(uint16_t),
01253             usb_status_handler);
01254     return 0;
01255 }
01256
01257 /* Get endpoint status */
01258 static int usb_send_ep_status(uint16_t index)
01259 {
01260     if ((index & 0x7F) > 16)
01261         return -USB_NODEV_ERROR;
01262
01263     InData = 0;
01264     usb_ep_get_stall(usb_ep_logical_to_hw(index), (bool *)&InData);
01265     __usb_ep_write(CTRL_ENP_IN,
01266             (uint8_t *)&InData, sizeof(uint16_t),
01267             usb_status_handler);
01268     return 0;
01269 }
01270
01271 /* USB setup packet: GET_STATUS request handler */
01272 static void usb_get_status_handler(void)
01273 {
01274     uint16_t w_value = usb_le16_to_cpu(setup_packet.wValue);
01275     uint16_t w_index = usb_le16_to_cpu(setup_packet.wIndex);
01276     uint16_t w_length = usb_le16_to_cpu(setup_packet.wLength);
01277
01278     /* GET_STATUS sanity checks */
01279     if (udc.state < USB_STATE_ADDRESS)
01280     {
01281         LOG_WARN("%s: bad GET_STATUS request (State=%02x)\n",
01282                 __func__, udc.state);
01283         ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01284         return;
01285     }
01286     if (w_length != 2)
01287     {
01288         LOG_WARN("%s: bad GET_STATUS request (wLength.Word=%02x)\n",
01289                 __func__, w_length);
01290         ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01291         return;
01292     }
01293     if (!(setup_packet.mRequestType & USB_DIR_IN))
01294     {
01295         LOG_WARN("%s: bad GET_STATUS request (mRequestType=%02x)\n",
01296                 __func__, setup_packet.mRequestType);
01297         ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01298         return;
01299     }
01300     if (w_value)
01301     {
01302         LOG_WARN("%s: bad GET_STATUS request (wValue=%02x)\n",
01303                 __func__, w_value);
01304         ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01305         return;
01306     }
01307
01308     /* Process GET_STATUS request */
01309     switch (setup_packet.mRequestType & USB_RECIP_MASK)
01310     {
01311     case USB_RECIP_DEVICE:
01312         if (usb_send_device_status(w_index) < 0)
01313         {
01314             LOG_WARN("%s: GET_STATUS: invalid UsbRecipientDevice\n",
01315                     __func__);
01316             ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01317             return;
01318         }
01319         LOG_INFO("%s: GET_STATUS: mRequestType=%02x (UsbRecipientDevice)\n",
01320                 __func__, setup_packet.mRequestType);
01321         break;
01322     case USB_RECIP_INTERFACE:
01323         if (usb_send_interface_status(w_index) < 0)
01324         {
01325             LOG_WARN("%s: GET_STATUS: invalid UsbRecipientInterface\n",
01326                     __func__);
01327             ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01328             return;
01329         }
01330         LOG_INFO("%s: GET_STATUS: mRequestType=%02x (UsbRecipientInterface)\n",
01331                 __func__, setup_packet.mRequestType);
01332         break;
01333     case USB_RECIP_ENDPOINT:
01334         if (usb_send_ep_status(w_index) < 0)
01335         {
01336             LOG_WARN("%s: GET_STATUS: invalid UsbRecipientEndpoint\n",
01337                     __func__);
01338             ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01339             return;
01340         }
01341         LOG_INFO("%s: GET_STATUS: mRequestType=%02x (UsbRecipientEndpoint)\n",
01342                 __func__, setup_packet.mRequestType);
01343         break;
01344     default:
01345         LOG_WARN("%s: GET_STATUS: invalid UsbRecipientEndpoint\n",
01346                 __func__);
01347         ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01348         break;
01349     }
01350 }
01351
01352 static int usb_get_device_descriptor(int id)
01353 {
01354     if (id)
01355         return -USB_NODEV_ERROR;
01356
01357     usb_dev->device->bMaxPacketSize0 = USB_EP0_MAX_SIZE;
01358     __usb_ep_write(CTRL_ENP_IN, (const uint8_t *)usb_dev->device,
01359             usb_size(usb_dev->device->bLength,
01360                 usb_le16_to_cpu(setup_packet.wLength)),
01361             usb_status_handler);
01362     return 0;
01363 }
01364
01365 /*
01366  * TODO: refactor this part to remove this temporary buffer.
01367  *
01368  * It would be better to define all the USB descriptors in the right order and
01369  * send them as a contiguous buffer directly from the flash / rodata memory.
01370  */
01371 #define USB_BUFSIZE (128)
01372 static uint8_t usb_cfg_buffer[USB_BUFSIZE];
01373 STATIC_ASSERT(USB_BUFSIZE < (1 << (sizeof(uint16_t) * 8)));
01374
01375 static int usb_get_configuration_descriptor(int id)
01376 {
01377     const UsbConfigDesc **config =
01378             (const UsbConfigDesc **)usb_dev->config;
01379     uint8_t *p = usb_cfg_buffer;
01380     int i;
01381
01382     /* TODO: support more than one configuration per device */
01383     if (UNLIKELY(id > 0))
01384         return -USB_NODEV_ERROR;
01385
01386     for (i = 0; config[i]; i++)
01387     {
01388         memcpy(p, config[i], config[i]->bLength);
01389         p += config[i]->bLength;
01390
01391         if (UNLIKELY((p - usb_cfg_buffer) > USB_BUFSIZE))
01392         {
01393             ASSERT(0);
01394             return -USB_BUF_OVERFLOW;
01395         }
01396     }
01397     ((UsbConfigDesc *)usb_cfg_buffer)->wTotalLength =
01398             usb_cpu_to_le16((uint16_t)(p - usb_cfg_buffer));
01399     __usb_ep_write(CTRL_ENP_IN,
01400             usb_cfg_buffer,
01401             usb_size(p - usb_cfg_buffer,
01402                 usb_le16_to_cpu(setup_packet.wLength)),
01403             usb_status_handler);
01404     return 0;
01405 }
01406
01407 static int usb_get_string_descriptor(unsigned int id)
01408 {
01409     const UsbStringDesc *lang_str;
01410     unsigned int lang_id, str_id;
01411     uint16_t w_index_lo = usb_le16_to_cpu(setup_packet.wIndex) & 0x00ff;
01412     uint16_t w_index_hi = (usb_le16_to_cpu(setup_packet.wIndex) &
01413                         0xff00) >> 8;
01414
01415     ASSERT(usb_dev->strings != NULL);
01416     ASSERT(usb_dev->strings[0] != NULL);
01417
01418     lang_str = usb_dev->strings[0];
01419     if (id)
01420     {
01421         /* Find Language index */
01422         for (lang_id = 0; ; lang_id++)
01423         {
01424             const UsbStringDesc *str =
01425                         usb_dev->strings[lang_id];
01426             if (UNLIKELY(str == NULL))
01427                 return -USB_NODEV_ERROR;
01428             if ((str->data[0] == w_index_lo) &&
01429                     (str->data[1] == w_index_hi))
01430                 break;
01431         }
01432         /* Check buffer overflow to find string index */
01433         for (str_id = 0; str_id < id; str_id++)
01434         {
01435             lang_str = usb_dev->strings[lang_id + 1 + str_id];
01436             if (lang_str == NULL)
01437                 return -USB_NODEV_ERROR;
01438         }
01439     }
01440     __usb_ep_write(CTRL_ENP_IN,
01441             lang_str,
01442             usb_size(lang_str->bLength,
01443                 usb_le16_to_cpu(setup_packet.wLength)),
01444             usb_status_handler);
01445     return 0;
01446 }
01447
01448 static void usb_get_descriptor(void)
01449 {
01450     uint16_t w_value_lo = usb_le16_to_cpu(setup_packet.wValue) & 0x00ff;
01451     uint16_t w_value_hi = (usb_le16_to_cpu(setup_packet.wValue) & 0xff00) >> 8;
01452
01453     if (udc.state < USB_STATE_DEFAULT)
01454     {
01455         ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01456         return;
01457     }
01458     switch (w_value_hi)
01459     {
01460     case USB_DT_DEVICE:
01461         LOG_INFO("%s: GET_DEVICE_DESCRIPTOR: id=%d, state=%d\n",
01462                 __func__,
01463                 w_value_lo,
01464                 udc.state);
01465         if (usb_get_device_descriptor(w_value_lo) < 0)
01466             ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01467         break;
01468     case USB_DT_CONFIG:
01469         LOG_INFO("%s: GET_CONFIG_DESCRIPTOR: id=%d, state=%d\n",
01470                 __func__, w_value_lo, udc.state);
01471         if (usb_get_configuration_descriptor(w_value_lo) < 0)
01472             ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01473         break;
01474     case USB_DT_STRING:
01475         LOG_INFO("%s: GET_STRING_DESCRIPTOR: id=%d, state=%d\n",
01476                 __func__, w_value_lo, udc.state);
01477         if (usb_get_string_descriptor(w_value_lo) < 0)
01478             ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01479         break;
01480     default:
01481         LOG_WARN("%s: GET_UNKNOWN_DESCRIPTOR: id=%d, state=%d\n",
01482                 __func__, w_value_lo, udc.state);
01483         ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01484         break;
01485     }
01486 }
01487
01488 /* USB setup packet: class/vendor request handler */
01489 static void usb_event_handler(UsbDevice *dev)
01490 {
01491     /*
01492      * TODO: get the appropriate usb_dev in function of the endpoint
01493      * address.
01494      */
01495     if (dev->event_cb)
01496         dev->event_cb(&setup_packet);
01497 }
01498
01499 /* USB setup packet: GET_DESCRIPTOR handler */
01500 static void usb_get_descriptor_handler(void)
01501 {
01502     LOG_INFO("%s: GET_DESCRIPTOR: RECIP = %d\n",
01503             __func__,
01504             setup_packet.mRequestType & USB_RECIP_MASK);
01505     if ((setup_packet.mRequestType & USB_RECIP_MASK) ==
01506             USB_RECIP_DEVICE)
01507         usb_get_descriptor();
01508     else
01509         usb_event_handler(usb_dev);
01510 }
01511
01512 /* USB setup packet: SET_ADDRESS handler */
01513 static void usb_set_address_handler(void)
01514 {
01515     uint16_t w_value = usb_le16_to_cpu(setup_packet.wValue);
01516     uint16_t w_index = usb_le16_to_cpu(setup_packet.wIndex);
01517     uint16_t w_length = usb_le16_to_cpu(setup_packet.wLength);
01518
01519     LOG_INFO("%s: SET_ADDRESS: %d\n",
01520             __func__, usb_le16_to_cpu(setup_packet.wValue));
01521     if ((udc.state >= USB_STATE_DEFAULT) &&
01522             ((setup_packet.mRequestType & USB_RECIP_MASK) ==
01523                     USB_RECIP_DEVICE) &&
01524             (w_index == 0) && (w_length == 0) && (w_value < 128))
01525         usb_status_handler(CTRL_ENP_IN);
01526     else
01527         ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01528 }
01529
01530 /* USB setup packet: GET_CONFIGURATION handler */
01531 static void usb_get_config_handler(void)
01532 {
01533     uint16_t w_value = usb_le16_to_cpu(setup_packet.wValue);
01534     uint16_t w_index = usb_le16_to_cpu(setup_packet.wIndex);
01535
01536     LOG_INFO("%s: GET_CONFIGURATION\n", __func__);
01537     if ((udc.state >= USB_STATE_ADDRESS) &&
01538             (w_value == 0) && (w_index == 0) && (w_value == 1))
01539     {
01540         InData = udc.cfg_id;
01541         __usb_ep_write(CTRL_ENP_IN, (uint8_t *)&InData, 1, usb_status_handler);
01542     }
01543     else
01544         ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01545 }
01546
01547 static const UsbConfigDesc *usb_find_configuration(int num)
01548 {
01549     const UsbConfigDesc *cfg;
01550     int i;
01551
01552     for (i = 0; ; i++)
01553     {
01554         cfg = (const UsbConfigDesc *)usb_dev->config[i];
01555         if (cfg == NULL)
01556             break;
01557         if (cfg->bDescriptorType != USB_DT_CONFIG)
01558             continue;
01559         if (cfg->bConfigurationValue == num)
01560             return cfg;
01561     }
01562     return NULL;
01563 }
01564
01565 static int usb_set_config_state(uint32_t conf)
01566 {
01567     const UsbConfigDesc *pCnfg;
01568     unsigned int i;
01569
01570     if (conf)
01571     {
01572         /* Find configuration descriptor */
01573         pCnfg = usb_find_configuration(conf);
01574         if (pCnfg == NULL)
01575             return -USB_NODEV_ERROR;
01576
01577         /* Reset current configuration */
01578         usb_set_device_state(USB_STATE_ADDRESS);
01579         usb_dev->configured = false;
01580         udc.cfg = pCnfg;
01581
01582         /* Set Interface and Alternative Setting */
01583         udc.cfg_id = conf;
01584         /* Set self-powered state */
01585         if (pCnfg->bmAttributes & USB_CONFIG_ATT_SELFPOWER)
01586             udc.feature |= STM32_UDC_FEATURE_SELFPOWERED;
01587
01588         /* Configure all existing interfaces to alternative setting 0 */
01589         ASSERT(pCnfg->bNumInterfaces <= USB_MAX_INTERFACE);
01590         udc.interfaces = pCnfg->bNumInterfaces;
01591         for (i = 0; i < udc.interfaces; i++)
01592             udc.alt[i] = 0;
01593         usb_set_device_state(USB_STATE_CONFIGURED);
01594         usb_dev->configured = true;
01595         event_do(&usb_event_done[0]);
01596         LOG_INFO("%s: device configured\n", __func__);
01597     }
01598     else
01599     {
01600         usb_dev->configured = false;
01601         usb_set_device_state(USB_STATE_ADDRESS);
01602     }
01603     return 0;
01604 }
01605
01606 /* USB setup packet: SET_CONFIGURATION handler */
01607 static void usb_set_config_handler(void)
01608 {
01609     uint16_t w_value = usb_le16_to_cpu(setup_packet.wValue);
01610     uint16_t w_index = usb_le16_to_cpu(setup_packet.wIndex);
01611     uint16_t w_length = usb_le16_to_cpu(setup_packet.wLength);
01612
01613     LOG_INFO("%s: SET_CONFIGURATION: %d\n",
01614             __func__, w_value);
01615     if ((udc.state >= USB_STATE_ADDRESS) &&
01616             (w_index == 0) && (w_length == 0) &&
01617             (usb_set_config_state(w_value & 0xff) == 0))
01618         usb_status_handler(CTRL_ENP_OUT);
01619     else
01620         ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01621 }
01622
01623 /* USB setup packet: standard request handler */
01624 static void usb_standard_request_handler(void)
01625 {
01626     switch (setup_packet.bRequest)
01627     {
01628     case USB_REQ_GET_STATUS:
01629         usb_get_status_handler();
01630         break;
01631     case USB_REQ_CLEAR_FEATURE:
01632         LOG_INFO("%s: bRequest=%d (CLEAR_FEATURE)\n",
01633                 __func__, setup_packet.bRequest);
01634         break;
01635     case USB_REQ_SET_FEATURE:
01636         LOG_INFO("%s: bRequest=%d (SET_FEATURE)\n",
01637                 __func__, setup_packet.bRequest);
01638         break;
01639     case USB_REQ_SET_ADDRESS:
01640         usb_set_address_handler();
01641         break;
01642     case USB_REQ_GET_DESCRIPTOR:
01643         usb_get_descriptor_handler();
01644         break;
01645     case USB_REQ_SET_DESCRIPTOR:
01646         LOG_INFO("%s: bRequest=%d (SET_DESCRIPTOR)\n",
01647                 __func__, setup_packet.bRequest);
01648         break;
01649     case USB_REQ_GET_CONFIGURATION:
01650         usb_get_config_handler();
01651         break;
01652     case USB_REQ_SET_CONFIGURATION:
01653         usb_set_config_handler();
01654         break;
01655     case USB_REQ_GET_INTERFACE:
01656         LOG_INFO("%s: bRequest=%d (GET_INTERFACE)\n",
01657                 __func__, setup_packet.bRequest);
01658         break;
01659     case USB_REQ_SET_INTERFACE:
01660         LOG_INFO("%s: bRequest=%d (SET_INTERFACE)\n",
01661                 __func__, setup_packet.bRequest);
01662         break;
01663     case USB_REQ_SYNCH_FRAME:
01664         LOG_INFO("%s: bRequest=%d (SYNCH_FRAME)\n",
01665                 __func__, setup_packet.bRequest);
01666         break;
01667     default:
01668         LOG_WARN("%s: bRequest=%d (Unknown)\n",
01669                 __func__, setup_packet.bRequest);
01670         ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01671         break;
01672     }
01673 }
01674
01675 /* USB setup packet handler */
01676 static void usb_setup_handler(void)
01677 {
01678     switch (setup_packet.mRequestType & USB_TYPE_MASK)
01679     {
01680     /* Standard */
01681     case USB_TYPE_STANDARD:
01682         LOG_INFO("%s: bmRequestType=%02x (Standard)\n",
01683                 __func__, setup_packet.mRequestType);
01684         usb_standard_request_handler();
01685         break;
01686     /* Class */
01687     case USB_TYPE_CLASS:
01688         LOG_INFO("%s: bmRequestType=%02x (Class)\n",
01689                 __func__, setup_packet.mRequestType);
01690         usb_event_handler(usb_dev);
01691         break;
01692     /* Vendor */
01693     case USB_TYPE_VENDOR:
01694         LOG_INFO("%s: bmRequestType=%02x (Vendor)\n",
01695                 __func__, setup_packet.mRequestType);
01696         usb_event_handler(usb_dev);
01697         break;
01698     case USB_TYPE_RESERVED:
01699         LOG_INFO("%s: bmRequestType=%02x (Reserved)\n",
01700                 __func__, setup_packet.mRequestType);
01701         break;
01702     /* Other */
01703     default:
01704         LOG_WARN("%s: bmRequestType=%02x (Unknown)\n",
01705                 __func__, setup_packet.mRequestType);
01706         ep_cnfg[CTRL_ENP_OUT].status = STALLED;
01707         break;
01708     }
01709 }
01710
01711 /* USB: low-level hardware initialization */
01712 static void usb_hw_reset(void)
01713 {
01714     unsigned int i;
01715     int ret;
01716
01717     /* Initialize endpoint descriptors */
01718     for (i = 0; i < countof(ep_cnfg); i++)
01719         ep_cnfg[i].hw = NULL;
01720
01721     /* Initialize USB memory */
01722     for (i = 0; i < countof(memory_buffer); i++)
01723         memory_buffer[i].Size = 0;
01724     usb->BTABLE = USB_BDT_OFFSET;
01725     mem_use = NULL;
01726
01727     /* Endpoint initialization */
01728     ret = usb_ep_configure(&USB_CtrlEpDescr0, true);
01729     if (UNLIKELY(ret < 0))
01730     {
01731         LOG_WARN("%s: out of memory, cannot initialize EP0\n",
01732                 __func__);
01733         return;
01734     }
01735     ret = usb_ep_configure(&USB_CtrlEpDescr1, true);
01736     if (UNLIKELY(ret < 0))
01737     {
01738         LOG_WARN("%s: out of memory, cannot initialize EP1\n",
01739                 __func__);
01740         return;
01741     }
01742
01743     /* Set default address */
01744     usb_set_address(0);
01745
01746     /* Enable all the device interrupts */
01747     usb->CNTR = bmCTRM | bmRESETM | bmSOFM | bmERRM | bmPMAOVRM |
01748             bmSUSPM | bmWKUPM;
01749 }
01750
01751 /* Handle a correct transfer under ISR */
01752 static void usb_isr_correct_transfer(stm32_usb_irq_status_t interrupt)
01753 {
01754     int EP;
01755     reg32_t *pReg = (reg32_t *)&usb->EP0R;
01756
01757     /* Find corresponding EP */
01758     pReg += interrupt.EP_ID;
01759     EP = (int)(((*pReg & 0x0f) << 1) + (interrupt.DIR ? 0 : 1));
01760     ep_cnfg[EP].avail_data = 1;
01761
01762     ASSERT(ep_cnfg[EP].hw);
01763     /* IN EP */
01764     if (EP & 0x01)
01765         ep_ctrl_clr_ctr_tx(ep_cnfg[EP].hw);
01766     else
01767         ep_ctrl_clr_ctr_rx(ep_cnfg[EP].hw);
01768     if (EP == CTRL_ENP_OUT)
01769     {
01770         /* Determinate type of packet (only for control EP) */
01771         bool SetupPacket = ep_ctrl_get_setup(ep_cnfg[CTRL_ENP_OUT].hw);
01772
01773         if (SetupPacket)
01774         {
01775             ep_cnfg[CTRL_ENP_IN].avail_data = 1;
01776             /* init IO to receive Setup packet */
01777             __usb_ep_write(CTRL_ENP_IN, NULL, -1, NULL);
01778             __usb_ep_read(CTRL_ENP_OUT, &setup_packet,
01779                     sizeof(setup_packet), NULL);
01780
01781             /* reset EP IO ctrl */
01782             if (setup_packet.mRequestType & USB_DIR_IN)
01783                 usb_status_handler(CTRL_ENP_OUT);
01784             usb_setup_handler();
01785             if (ep_cnfg[CTRL_ENP_OUT].status == STALLED)
01786                 usb_ep_set_stall_ctrl();
01787         }
01788         else
01789         {
01790             if (ep_cnfg[CTRL_ENP_OUT].complete &&
01791                     setup_packet.mRequestType & USB_DIR_IN)
01792                 ep_cnfg[CTRL_ENP_OUT].complete(CTRL_ENP_OUT);
01793             else
01794                 __usb_ep_io(EP);
01795         }
01796     }
01797     else if (EP == CTRL_ENP_IN)
01798     {
01799         if (ep_cnfg[CTRL_ENP_IN].complete &&
01800                 !(setup_packet.mRequestType & USB_DIR_IN))
01801             ep_cnfg[CTRL_ENP_IN].complete(CTRL_ENP_IN);
01802         else
01803             __usb_ep_io(EP);
01804
01805     }
01806     else
01807         __usb_ep_io(EP);
01808 }
01809
01810 /* USB: interrupt service routine */
01811 static void usb_isr(void)
01812 {
01813     stm32_usb_irq_status_t interrupt;
01814
01815     /* Get masked interrupt flags */
01816     interrupt.status = usb->ISTR;
01817     interrupt.status &= usb->CNTR | 0x1f;
01818
01819     /* Set the context as atomic */
01820     in_atomic = true;
01821
01822     if (interrupt.PMAOVR)
01823     {
01824         LOG_WARN("%s: DMA overrun / underrun\n", __func__);
01825         usb->ISTR = ~bmPMAOVRM;
01826     }
01827     if (interrupt.ERR)
01828     {
01829         LOG_WARN("%s: engine error\n", __func__);
01830         usb->ISTR = ~bmERRM;
01831     }
01832     if (interrupt.RESET)
01833     {
01834         LOG_INFO("%s: device reset\n", __func__);
01835         usb->ISTR = ~bmRESETM;
01836         usb_hw_reset();
01837         usb_set_device_state(USB_STATE_DEFAULT);
01838     }
01839     if (interrupt.SOF)
01840     {
01841 #if 0
01842         /*
01843          * XXX: disable logging of frame interrupts (too much noise!)
01844          */
01845         uint16_t frame_nr = usb->FNR & 0x0fff;
01846         LOG_INFO("%s: frame %#x\n", __func__, frame_nr);
01847 #endif
01848         usb->ISTR = ~bmSOFM;
01849     }
01850     if (interrupt.WKUP)
01851     {
01852         LOG_INFO("%s: wake-up\n", __func__);
01853         usb->ISTR = ~(bmSUSPM | bmWKUPM);
01854         usb_resume();
01855     }
01856     if (interrupt.SUSP)
01857     {
01858         LOG_INFO("%s: suspend\n", __func__);
01859         usb_suspend();
01860         usb->ISTR = ~(bmSUSPM | bmWKUPM);
01861     }
01862     if (interrupt.ESOF)
01863     {
01864         LOG_INFO("%s: expected frame\n", __func__);
01865         usb->ISTR = ~bmESOFM;
01866     }
01867     if (interrupt.CTR)
01868     {
01869         usb_isr_correct_transfer(interrupt);
01870     }
01871     in_atomic = false;
01872 }
01873
01874 /* USB: hardware initialization */
01875 static void usb_hw_init(void)
01876 {
01877     /* Enable clocking on the required GPIO pins */
01878     RCC->APB2ENR |= RCC_APB2_GPIOA | RCC_APB2_GPIOC;
01879
01880     /* Make sure that the CAN controller is disabled and held in reset */
01881     RCC->APB1ENR &= ~RCC_APB1_CAN;
01882
01883     /* Configure USB_DM and USB_DP to work as USB lines */
01884     stm32_gpioPinConfig((struct stm32_gpio *)GPIOA_BASE,
01885             USB_DM_PIN | USB_DP_PIN,
01886             GPIO_MODE_AF_PP, GPIO_SPEED_50MHZ);
01887     /* Configure USB_DISC to work as USB disconnect */
01888     stm32_gpioPinConfig((struct stm32_gpio *)GPIOC_BASE,
01889             USB_DISC_PIN,
01890             GPIO_MODE_OUT_PP, GPIO_SPEED_50MHZ);
01891     stm32_gpioPinWrite((struct stm32_gpio *)GPIOC_BASE,
01892                 USB_DISC_PIN, 1);
01893
01894     /* Ensure the USB clock is disabled before setting the prescaler */
01895     RCC->APB1ENR &= ~RCC_APB1_USB;
01896
01897     /* Configure USB clock (48MHz) */
01898     *CFGR_USBPRE_BB &= ~RCC_USBCLK_PLLCLK_1DIV5;
01899
01900     /* Activate USB clock */
01901     RCC->APB1ENR |= RCC_APB1_USB;
01902
01903     /* Force USB reset and disable USB interrupts */
01904     usb->CNTR = bmFRES;
01905     timer_delayHp(1);
01906
01907     /* Issue a USB reset */
01908     usb_hw_reset();
01909
01910     /* Clear spurious pending interrupt */
01911     usb->ISTR = 0;
01912
01913     /* Register interrupt handler */
01914     sysirq_setHandler(USB_LP_CAN_RX0_IRQHANDLER, usb_isr);
01915
01916     /* Software connection enable */
01917     usb_connect();
01918 }
01919
01920 /* Initialize the USB controller */
01921 static void usb_init(void)
01922 {
01923     udc.state = USB_STATE_NOTATTACHED;
01924     udc.feature = 0;
01925
01926     usb_hw_init();
01927 }
01928
01929 /* Register an upper layer USB device into the driver */
01930 int usb_deviceRegister(UsbDevice *dev)
01931 {
01932 #if CONFIG_KERN
01933     MOD_CHECK(proc);
01934 #endif
01935     usb_dev = dev;
01936     usb_dev->configured = false;
01937
01938     event_initGeneric(&usb_event_done[0]);
01939     usb_init();
01940     event_wait(&usb_event_done[0]);
01941
01942     return 0;
01943 }


BeRTOS: usb_stm32.h File Reference

  • cpu
  • cortex-m3
  • drv
usb_stm32.h File Reference

STM32: USB full-speed device driver. More...

#include <cfg/compiler.h>
#include <drv/usb.h>
#include <drv/usb_endpoint.h>

Go to the source code of this file.

Detailed Description

STM32: USB full-speed device driver.

Author:
Andrea Righi <arighi@develer.com>

Low-level USB device driver for the STM32 architecture.

Definition in file usb_stm32.h.


BeRTOS: usb_stm32.h Source File

  • cpu
  • cortex-m3
  • drv
usb_stm32.h
Go to the documentation of this file.
00001
00040 #ifndef USB_STM32_H
00041 #define USB_STM32_H
00042
00043 #include <cfg/compiler.h>
00044 #include <drv/usb.h>
00045 #include <drv/usb_endpoint.h>
00046
00047 #define USB_BASE_ADDR           0x40005C00
00048
00049 #define USB_DM_PIN  (1 << 11)
00050 #define USB_DP_PIN  (1 << 12)
00051 #define USB_DISC_PIN    (1 << 11)
00052
00053 #define USB_EP0_MAX_SIZE    CONFIG_EP0_MAX_SIZE
00054 #define USB_XFER_MAX_SIZE   64
00055
00056 #define EP_MAX_SLOTS    USB_EP_MAX
00057 #define EP_MAX_NUM  (EP_MAX_SLOTS << 1)
00058
00059 /* USB packet memory organization */
00060 #define USB_PACKET_MEMORY_BASE      0x40006000
00061 #define USB_PACKET_MEMORY_SIZE      512
00062
00063 /* Offset of the buffer descriptor table inside the packet memory */
00064 #define USB_BDT_OFFSET \
00065     ((USB_PACKET_MEMORY_SIZE - (sizeof(stm32_UsbBd) * EP_MAX_NUM)) & ~7)
00066
00067 #define USB_MEM_ADDR(offset) \
00068     (USB_PACKET_MEMORY_BASE + ((offset << 1) & ~3) + (offset & 1))
00069
00070 #define EP_DTB_READ(slot, offset) \
00071     (*((uint16_t *)(USB_MEM_ADDR((USB_BDT_OFFSET + \
00072                     (slot) * sizeof(stm32_UsbBd) + \
00073                     (offset))))))
00074
00075 #define EP_DTB_WRITE(slot, offset, data)  (EP_DTB_READ(slot, offset) = data)
00076
00077 #define ADDR_TX_OFFSET  offsetof(stm32_UsbBd, AddrTx)
00078 #define COUNT_TX_OFFSET offsetof(stm32_UsbBd, CountTx)
00079 #define ADDR_RX_OFFSET  offsetof(stm32_UsbBd, AddrRx)
00080 #define COUNT_RX_OFFSET offsetof(stm32_UsbBd, CountRx)
00081
00082 #define USB_CTRL_RW_MASK          0x070F
00083 #define USB_CTRL_CLEAR_ONLY_MASK  0x8080
00084 #define USB_CTRL_TOGGLE_MASK      0x7070
00085
00086 /* CNTR register flags */
00087 #define bmCTRM                      0x8000
00088 #define bmPMAOVRM                   0x4000
00089 #define bmERRM                      0x2000
00090 #define bmWKUPM                     0x1000
00091 #define bmSUSPM                     0x0800
00092 #define bmRESETM                    0x0400
00093 #define bmSOFM                      0x0200
00094 #define bmESOFM                     0x0100
00095
00096 #define bmRESUME                    0x0010
00097 #define bmFSUSP                     0x0008
00098 #define bmLPMODE                    0x0004
00099 #define bmPDWN                      0x0002
00100 #define bmFRES                      0x0001
00101
00102 /* USB error codes */
00103 enum stm32_usb_error
00104 {
00105     USB_OK = 0,
00106     USB_INTR_ERROR,
00107     USB_INVAL_ERROR,
00108     USB_NODEV_ERROR,
00109     USB_MEMORY_FULL,
00110     USB_BUF_OVERFLOW,
00111     USB_EP_STALLED,
00112     USB_FATAL_ERROR,
00113 };
00114
00115 /* STM32 USB endpoint types */
00116 enum stm32_UsbEpype
00117 {
00118     EP_BULK = 0,
00119     EP_CTRL,
00120     EP_ISO,
00121     EP_INTERRUPT,
00122
00123     EP_TYPE_MAX
00124 };
00125
00126 /* STM32 USB interrupt status register bits */
00127 typedef union
00128 {
00129     uint32_t status;
00130     struct {
00131         uint8_t EP_ID  : 4;
00132         uint8_t DIR    : 1;
00133         uint8_t        : 2;
00134         uint8_t SZDPR  : 1;
00135         uint8_t ESOF   : 1;
00136         uint8_t SOF    : 1;
00137         uint8_t RESET  : 1;
00138         uint8_t SUSP   : 1;
00139         uint8_t WKUP   : 1;
00140         uint8_t ERR    : 1;
00141         uint8_t PMAOVR : 1;
00142         uint8_t CTR    : 1;
00143     };
00144 } PACKED stm32_usb_irq_status_t;
00145
00146 /* Endpoint state */
00147 typedef enum
00148 {
00149     EP_DISABLED = 0,
00150     EP_STALL,
00151     EP_NAK,
00152     EP_VALID
00153 } stm32_UsbEpState;
00154
00155 /* STM32 USB supported endpoints */
00156 typedef enum stm32_UsbEP
00157 {
00158     CTRL_ENP_OUT = 0, CTRL_ENP_IN,
00159     ENP1_OUT, ENP1_IN,
00160     ENP2_OUT, ENP2_IN,
00161     ENP3_OUT, ENP3_IN,
00162     ENP4_OUT, ENP4_IN,
00163     ENP5_OUT, ENP5_IN,
00164     ENP6_OUT, ENP6_IN,
00165     ENP7_OUT, ENP7_IN,
00166     ENP8_OUT, ENP8_IN,
00167     ENP9_OUT, ENP9_IN,
00168     ENP10_OUT, ENP10_IN,
00169     ENP11_OUT, ENP11_IN,
00170     ENP12_OUT, ENP12_IN,
00171     ENP13_OUT, ENP13_IN,
00172     ENP14_OUT, ENP14_IN,
00173     ENP15_OUT, ENP15_IN,
00174
00175     EP_MAX_HW_NUM
00176 } stm32_UsbEP;
00177
00178 /* STM32 USB packet memory slot */
00179 typedef struct stm32_UsbMemSlot
00180 {
00181     stm32_UsbEP ep_addr;
00182     uint16_t Start;
00183     uint16_t Size;
00184     struct stm32_UsbMemSlot *next;
00185 } stm32_UsbMemSlot;
00186
00187 /* STM32 USB buffer descriptor (packet memory) */
00188 typedef struct stm32_UsbBd
00189 {
00190     uint16_t AddrTx;
00191     uint16_t CountTx;
00192     uint16_t AddrRx;
00193     uint16_t CountRx;
00194 } PACKED stm32_UsbBd;
00195
00196 /* STM32 USB endpoint I/O status */
00197 typedef enum stm32_UsbIoStatus
00198 {
00199     NOT_READY = 0,
00200     NO_SERVICED,
00201     BEGIN_SERVICED,
00202     COMPLETE,
00203     BUFFER_UNDERRUN,
00204     BUFFER_OVERRUN,
00205     SETUP_OVERWRITE,
00206     STALLED,
00207 } stm32_UsbIoStatus;
00208
00209 /* STM32 USB hardware endpoint descriptor */
00210 typedef struct stm32_UsbEp
00211 {
00212     reg32_t *hw;
00213     uint8_t type;
00214     void (*complete)(int);
00215     ssize_t max_size;
00216     ssize_t offset;
00217     ssize_t size;
00218     stm32_UsbIoStatus status;
00219     union
00220     {
00221         uint8_t *read_buffer;
00222         const uint8_t *write_buffer;
00223     };
00224     int32_t avail_data;
00225     uint8_t flags;
00226 } stm32_UsbEp;
00227
00228 /* STM32 USB hardware endpoint flags */
00229 #define STM32_USB_EP_AVAIL_DATA     BV(0)
00230 #define STM32_USB_EP_ZERO_PACKET    BV(1)
00231 #define STM32_USB_EP_ZERO_POSSIBLE  BV(2)
00232
00233 #endif /* USB_STM32_H */


BeRTOS: usbkbd.c File Reference

  • drv
usbkbd.c File Reference

Generic USB keyboard device driver. More...

#include "usb_hid.h"
#include "usbkbd.h"
#include "cfg/cfg_usbkbd.h"
#include <cfg/log.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <cfg/module.h>
#include <cpu/power.h>
#include <drv/usb.h>
#include <drv/usb_endpoint.h>

Go to the source code of this file.

Detailed Description

Generic USB keyboard device driver.

Author:
Andrea Righi <arighi@develer.com>

Definition in file usbkbd.c.


BeRTOS: usbkbd.c Source File

  • drv
usbkbd.c
Go to the documentation of this file.
00001
00039 #include "usb_hid.h"
00040 #include "usbkbd.h"
00041
00042 #include "cfg/cfg_usbkbd.h"
00043
00044 #define LOG_LEVEL  USB_KEYBOARD_LOG_LEVEL
00045 #define LOG_FORMAT USB_KEYBOARD_LOG_FORMAT
00046
00047 #include <cfg/log.h>
00048 #include <cfg/debug.h>
00049 #include <cfg/macros.h>
00050 #include <cfg/compiler.h>
00051 #include <cfg/module.h>
00052
00053 #include <cpu/power.h> // cpu_relax()
00054
00055 #include <drv/usb.h>
00056 #include <drv/usb_endpoint.h>
00057
00058
00059 /*
00060  * HID device configuration (usb-keyboard)
00061  */
00062 #define USB_HID_VENDOR_ID   USB_KEYBOARD_VENDOR_ID
00063 #define USB_HID_PRODUCT_ID  USB_KEYBOARD_PRODUCT_ID
00064
00065 #define USB_HID_INTERFACES  1
00066 #define USB_HID_ENDPOINTS   1
00067
00068 #define USB_STRING_MANUFACTURER 1
00069 #define USB_STRING_PRODUCT  2
00070
00071 #define USB_HID_REPORT_EP   (USB_DIR_IN | USB_KBD_EP_REPORT)
00072
00073 static UsbDeviceDesc usb_hid_device_descriptor =
00074 {
00075     .bLength = sizeof(usb_hid_device_descriptor),
00076     .bDescriptorType = USB_DT_DEVICE,
00077     .bcdUSB = 0x100,
00078     .bDeviceClass = 0,
00079     .bDeviceSubClass = 0,
00080     .bDeviceProtocol = 0,
00081     .idVendor = USB_HID_VENDOR_ID,
00082     .idProduct = USB_HID_PRODUCT_ID,
00083     .bcdDevice = 0,
00084     .iManufacturer = USB_STRING_MANUFACTURER,
00085     .iProduct = USB_STRING_PRODUCT,
00086     .iSerialNumber = 0,
00087     .bNumConfigurations = 1,
00088 };
00089
00090 static const UsbConfigDesc usb_hid_config_descriptor =
00091 {
00092     .bLength = sizeof(usb_hid_config_descriptor),
00093     .bDescriptorType = USB_DT_CONFIG,
00094     .bNumInterfaces = USB_HID_INTERFACES,
00095     .bConfigurationValue = 1,
00096     .iConfiguration = 0,
00097     .bmAttributes = USB_CONFIG_ATT_ONE,
00098     .bMaxPower = 50, /* 100 mA */
00099 };
00100
00101 static const UsbInterfaceDesc usb_hid_interface_descriptor =
00102 {
00103     .bLength = sizeof(usb_hid_interface_descriptor),
00104     .bDescriptorType = USB_DT_INTERFACE,
00105     .bInterfaceNumber = 0,
00106     .bAlternateSetting = 0,
00107     .bNumEndpoints = USB_HID_ENDPOINTS,
00108     .bInterfaceClass = USB_CLASS_HID,
00109     .bInterfaceSubClass = USB_INTERFACE_SUBCLASS_BOOT,
00110     .bInterfaceProtocol = USB_INTERFACE_PROTOCOL_KEYBOARD,
00111     .iInterface = 0,
00112 };
00113
00114 /*
00115  * Keyboard report descriptor
00116  *
00117  * Taken from the USB HID spec:
00118  *  - E.6 Report Descriptor (Keyboard), HID1_11.pdf, p.69
00119  */
00120 static const uint8_t hid_report_descriptor[] =
00121 {
00122     0x05, 0x01, // Usage Page (Generic Desktop)
00123     0x09, 0x06, // Usage (Keyboard)
00124     0xA1, 0x01, // Collection (Application)
00125     0x05, 0x07, // Usage Page (Key Codes)
00126     0x19, 0xE0, // Usage Minimum (224)
00127     0x29, 0xE7, // Usage Maximum (231)
00128     0x15, 0x00, // Logical Minimum (0)
00129     0x25, 0x01, // Logical Maximum (1)
00130     0x75, 0x01, // Report Size (1)
00131     0x95, 0x08, // Report Count (8)
00132     0x81, 0x02, // Input (Data, Variable, Absolute)
00133     0x95, 0x01, // Report Count (1)
00134     0x75, 0x08, // Report Size (8)
00135     0x81, 0x01, // Input (Constant)
00136     0x95, 0x05, // Report Count (5)
00137     0x75, 0x01, // Report Size (1)
00138     0x05, 0x08, // Usage Page (Page# for LEDs)
00139     0x19, 0x01, // Usage Minimum (1)
00140     0x29, 0x05, // Usage Maximum (5)
00141     0x91, 0x02, // Output (Data, Variable, Absolute)
00142     0x95, 0x01, // Report Count (1)
00143     0x75, 0x03, // Report Size (3)
00144     0x91, 0x01, // Output (Constant)
00145     0x95, 0x06, // Report Count (6)
00146     0x75, 0x08, // Report Size (8)
00147     0x15, 0x00, // Logical Minimum (0)
00148     0x25, 0x65, // Logical Maximum(101)
00149     0x05, 0x07, // Usage Page (Key Codes)
00150     0x19, 0x00, // Usage Minimum (0)
00151     0x29, 0x65, // Usage Maximum (101)
00152     0x81, 0x00, // Input (Data, Array)
00153     0xC0, // End Collection
00154 };
00155
00156 static const usb_HidDesc usb_hid_descriptor =
00157 {
00158     .bLength = sizeof(usb_hid_descriptor),
00159     .bDescriptorType = HID_DT_HID,
00160     .bcdHID = usb_cpu_to_le16((uint16_t)0x0110),
00161     .bCountryCode = 0,
00162     .bNumDescriptors = 1,
00163     .bDescriptorHidType = HID_DT_REPORT,
00164     .wDescriptorLength =
00165         usb_cpu_to_le16((uint16_t)sizeof(hid_report_descriptor)),
00166 };
00167
00168 static const UsbEndpointDesc usb_hid_ep_descriptor =
00169 {
00170     .bLength = sizeof(usb_hid_ep_descriptor),
00171     .bDescriptorType = USB_DT_ENDPOINT,
00172     .bEndpointAddress = USB_HID_REPORT_EP,
00173     .bmAttributes = USB_ENDPOINT_XFER_INT,
00174     .wMaxPacketSize = usb_cpu_to_le16((uint16_t)4),
00175     .bInterval = 10, /* resolution in ms */
00176 };
00177
00178 static const UsbDescHeader *usb_hid_config[] =
00179 {
00180     (const UsbDescHeader *)&usb_hid_config_descriptor,
00181     (const UsbDescHeader *)&usb_hid_interface_descriptor,
00182     (const UsbDescHeader *)&usb_hid_descriptor,
00183     (const UsbDescHeader *)&usb_hid_ep_descriptor,
00184     NULL,
00185 };
00186
00187 static const DEFINE_USB_STRING(language_str, "\x09\x04"); // Language ID: en_US
00188 static const DEFINE_USB_STRING(manufacturer_str,
00189         USB_STRING("B", "e", "R", "T", "O", "S"));
00190 static const DEFINE_USB_STRING(product_str,
00191         USB_STRING("U", "S", "B", " ",
00192                 "K", "e", "y", "b", "o", "a", "r", "d"));
00193
00194 static const UsbStringDesc *usb_hid_strings[] =
00195 {
00196     (const UsbStringDesc *)&language_str,
00197     (const UsbStringDesc *)&manufacturer_str,
00198     (const UsbStringDesc *)&product_str,
00199     NULL,
00200 };
00201
00202 static uint8_t report[8];
00203
00204 static bool hid_keyboard_configured;
00205
00206 static void usb_hid_event_cb(UsbCtrlRequest *ctrl)
00207 {
00208     uint16_t value = usb_le16_to_cpu(ctrl->wValue);
00209     uint16_t index = usb_le16_to_cpu(ctrl->wIndex);
00210     uint16_t length = usb_le16_to_cpu(ctrl->wLength);
00211     uint8_t type = ctrl->mRequestType;
00212     uint8_t request = ctrl->bRequest;
00213
00214     LOG_INFO("%s: s 0x%02x 0x%02x 0x%04x 0x%04x 0x%04x\n",
00215         __func__, type, request, value, index, length);
00216     switch (ctrl->bRequest)
00217     {
00218     case USB_REQ_GET_DESCRIPTOR:
00219         switch (value >> 8)
00220         {
00221         case HID_DT_HID:
00222             LOG_INFO("%s: HID_DT_HID\n", __func__);
00223             usb_endpointWrite(USB_DIR_IN | 0,
00224                     &usb_hid_descriptor,
00225                     sizeof(usb_hid_descriptor));
00226             break;
00227         case HID_DT_REPORT:
00228             LOG_INFO("%s: HID_DT_REPORT\n", __func__);
00229             usb_endpointWrite(USB_DIR_IN | 0,
00230                     &hid_report_descriptor,
00231                     sizeof(hid_report_descriptor));
00232             hid_keyboard_configured = true;
00233             break;
00234         default:
00235             LOG_INFO("%s: unknown HID request\n", __func__);
00236             break;
00237         }
00238         break;
00239     case HID_REQ_GET_REPORT:
00240         LOG_INFO("%s: HID_REQ_GET_REPORT\n", __func__);
00241         break;
00242     case HID_REQ_SET_REPORT:
00243         LOG_INFO("%s: HID_REQ_SET_REPORT\n", __func__);
00244         usb_endpointWrite(USB_DIR_IN | 0, NULL, 0);
00245         break;
00246     case HID_REQ_GET_IDLE:
00247         LOG_INFO("%s: HID_REQ_GET_IDLE\n", __func__);
00248         break;
00249     case HID_REQ_SET_IDLE:
00250         LOG_INFO("%s: HID_REQ_SET_IDLE\n", __func__);
00251         usb_endpointWrite(USB_DIR_IN | 0, NULL, 0);
00252         break;
00253     case HID_REQ_GET_PROTOCOL:
00254         LOG_INFO("%s: HID_REQ_GET_PROTOCOL\n", __func__);
00255         break;
00256     case HID_REQ_SET_PROTOCOL:
00257         LOG_INFO("%s: HID_REQ_SET_PROTOCOL\n", __func__);
00258         break;
00259     default:
00260         LOG_ERR("%s: unknown request: 0x%02x\n",
00261             __func__, ctrl->bRequest);
00262         break;
00263     }
00264 }
00265
00266 /* Global usb-keyboard descriptor that identifies the usb-keyboard device */
00267 static UsbDevice usb_keyboard = {
00268     .device = &usb_hid_device_descriptor,
00269     .config = usb_hid_config,
00270     .strings = usb_hid_strings,
00271     .event_cb = usb_hid_event_cb,
00272 };
00273
00274 /* Low-level usb-hid device initialization */
00275 static int usb_keyboard_hw_init(void)
00276 {
00277     if (usb_deviceRegister(&usb_keyboard) < 0)
00278         return -1;
00279     LOG_INFO("usb-hid: registered new USB keyboard device\n");
00280     return 0;
00281 }
00282
00283 /* Send a keyboard event */
00284 void usbkbd_sendEvent(uint8_t mod, uint8_t code)
00285 {
00286     report[0] = mod;
00287     report[2] = code;
00288     usb_endpointWrite(USB_HID_REPORT_EP, &report, sizeof(report));
00289 }
00290
00291 /*
00292  * Initialize a USB HID keyboard device.
00293  *
00294  * TODO: support more than one device at the same time.
00295  */
00296 int usbkbd_init(UNUSED_ARG(int, unit))
00297 {
00298 #if CONFIG_KERN
00299     MOD_CHECK(proc);
00300 #endif
00301     usb_keyboard_hw_init();
00302     while (!hid_keyboard_configured)
00303         cpu_relax();
00304     return 0;
00305 }


BeRTOS: usbkbd.h File Reference

  • drv
usbkbd.h File Reference

Generic USB keyboard device driver. More...

Go to the source code of this file.

Detailed Description

Generic USB keyboard device driver.

Author:
Andrea Righi <arighi@develer.com>

This module allows to create virtual keyboards.

Attention:
The API is work in progress and may change in future versions.

Definition in file usbkbd.h.


BeRTOS: usbkbd.h Source File

  • drv
usbkbd.h
Go to the documentation of this file.
00001
00046 #ifndef USBKBD_H
00047 #define USBKBD_H
00048
00049 void usbkbd_sendEvent(uint8_t mod, uint8_t code);
00050 int usbkbd_init(int unit);
00051
00052 #endif /* USBKBD_H */


BeRTOS: usbmouse.c File Reference

  • drv
usbmouse.c File Reference

Generic USB mouse device driver. More...

#include "usb_hid.h"
#include "usbmouse.h"
#include "cfg/cfg_usbmouse.h"
#include <cfg/log.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <cfg/module.h>
#include <cpu/power.h>
#include <drv/usb.h>
#include <drv/usb_endpoint.h>

Go to the source code of this file.

Detailed Description

Generic USB mouse device driver.

Author:
Andrea Righi <arighi@develer.com>

Definition in file usbmouse.c.


BeRTOS: usbmouse.c Source File

  • drv
usbmouse.c
Go to the documentation of this file.
00001
00041 #include "usb_hid.h"
00042 #include "usbmouse.h"
00043
00044 #include "cfg/cfg_usbmouse.h"
00045
00046 #define LOG_LEVEL  USB_MOUSE_LOG_LEVEL
00047 #define LOG_FORMAT USB_MOUSE_LOG_FORMAT
00048
00049 #include <cfg/log.h>
00050 #include <cfg/debug.h>
00051 #include <cfg/macros.h>
00052 #include <cfg/compiler.h>
00053 #include <cfg/module.h>
00054
00055 #include <cpu/power.h> // cpu_relax()
00056
00057 #include <drv/usb.h>
00058 #include <drv/usb_endpoint.h>
00059
00060
00061 /*
00062  * HID device configuration (usb-mouse)
00063  */
00064 #define USB_HID_VENDOR_ID   USB_MOUSE_VENDOR_ID
00065 #define USB_HID_PRODUCT_ID  USB_MOUSE_PRODUCT_ID
00066
00067 #define USB_HID_INTERFACES  1
00068 #define USB_HID_ENDPOINTS   1
00069
00070 #define USB_STRING_MANUFACTURER 1
00071 #define USB_STRING_PRODUCT  2
00072
00073 #define USB_HID_REPORT_EP   (USB_DIR_IN | USB_MOUSE_EP_REPORT)
00074
00075 static UsbDeviceDesc usb_hid_device_descriptor =
00076 {
00077     .bLength = sizeof(usb_hid_device_descriptor),
00078     .bDescriptorType = USB_DT_DEVICE,
00079     .bcdUSB = 0x100,
00080     .bDeviceClass = 0,
00081     .bDeviceSubClass = 0,
00082     .bDeviceProtocol = 0,
00083     .idVendor = USB_HID_VENDOR_ID,
00084     .idProduct = USB_HID_PRODUCT_ID,
00085     .bcdDevice = 0,
00086     .iManufacturer = USB_STRING_MANUFACTURER,
00087     .iProduct = USB_STRING_PRODUCT,
00088     .iSerialNumber = 0,
00089     .bNumConfigurations = 1,
00090 };
00091
00092 static const UsbConfigDesc usb_hid_config_descriptor =
00093 {
00094     .bLength = sizeof(usb_hid_config_descriptor),
00095     .bDescriptorType = USB_DT_CONFIG,
00096     .bNumInterfaces = USB_HID_INTERFACES,
00097     .bConfigurationValue = 1,
00098     .iConfiguration = 0,
00099     .bmAttributes = USB_CONFIG_ATT_ONE,
00100     .bMaxPower = 50, /* 100 mA */
00101 };
00102
00103 static const UsbInterfaceDesc usb_hid_interface_descriptor =
00104 {
00105     .bLength = sizeof(usb_hid_interface_descriptor),
00106     .bDescriptorType = USB_DT_INTERFACE,
00107     .bInterfaceNumber = 0,
00108     .bAlternateSetting = 0,
00109     .bNumEndpoints = USB_HID_ENDPOINTS,
00110     .bInterfaceClass = USB_CLASS_HID,
00111     .bInterfaceSubClass = USB_INTERFACE_SUBCLASS_BOOT,
00112     .bInterfaceProtocol = USB_INTERFACE_PROTOCOL_MOUSE,
00113     .iInterface = 0,
00114 };
00115
00116 static const uint8_t hid_report_descriptor[] =
00117 {
00118     0x05, 0x01, // Usage Page (Generic Desktop)
00119     0x09, 0x02, // Usage (Mouse)
00120     0xA1, 0x01, // Collection (Application)
00121     0x09, 0x01, // Usage (Pointer)
00122     0xA1, 0x00, // Collection (Physical)
00123     0x05, 0x09, // Usage Page (Buttons)
00124     0x19, 0x01, // Usage Minimum (1)
00125     0x29, 0x03, // Usage Maximum (3)
00126     0x15, 0x00, // Logical Minimum (0)
00127     0x25, 0x01, // Logical Maximum (1)
00128     0x95, 0x03, // Report Count (3)
00129     0x75, 0x01, // Report Size (1)
00130     0x81, 0x02, // Input (Data, Variable, Absolute)
00131     0x95, 0x01, // Report Count (1)
00132     0x75, 0x05, // Report Size (5)
00133     0x81, 0x01, // Input (03=Logitech, 01=Hid spec:Constant)
00134     0x05, 0x01, // Usage Page (Generic Desktop)
00135     0x09, 0x30, // Usage (X)
00136     0x09, 0x31, // Usage (Y)
00137     0x09, 0x38, // Usage (Logitech:_)
00138     0x15, 0x81, // Logical Minimum (-127)
00139     0x25, 0x7F, // Logical Maximum (127)
00140     0x75, 0x08, // Report Size (8)
00141     0x95, 0x02, // Report Count (Logitech=3, Hid spec =2)
00142     0x81, 0x06, // Input (Data, Variable, Relative)
00143     0xC0,   // End Collection
00144     0xC0    // End Collection
00145 };
00146
00147 static const usb_HidDesc usb_hid_descriptor =
00148 {
00149     .bLength = sizeof(usb_hid_descriptor),
00150     .bDescriptorType = HID_DT_HID,
00151     .bcdHID = usb_cpu_to_le16((uint16_t)0x0110),
00152     .bCountryCode = 0,
00153     .bNumDescriptors = 1,
00154     .bDescriptorHidType = HID_DT_REPORT,
00155     .wDescriptorLength =
00156         usb_cpu_to_le16((uint16_t)sizeof(hid_report_descriptor)),
00157 };
00158
00159 static const UsbEndpointDesc usb_hid_ep_descriptor =
00160 {
00161     .bLength = sizeof(usb_hid_ep_descriptor),
00162     .bDescriptorType = USB_DT_ENDPOINT,
00163     .bEndpointAddress = USB_HID_REPORT_EP,
00164     .bmAttributes = USB_ENDPOINT_XFER_INT,
00165     .wMaxPacketSize = usb_cpu_to_le16((uint16_t)4),
00166     .bInterval = 10, /* resolution in ms */
00167 };
00168
00169 static const UsbDescHeader *usb_hid_config[] =
00170 {
00171     (const UsbDescHeader *)&usb_hid_config_descriptor,
00172     (const UsbDescHeader *)&usb_hid_interface_descriptor,
00173     (const UsbDescHeader *)&usb_hid_descriptor,
00174     (const UsbDescHeader *)&usb_hid_ep_descriptor,
00175     NULL,
00176 };
00177
00178 static const DEFINE_USB_STRING(language_str, "\x09\x04"); // Language ID: en_US
00179 static const DEFINE_USB_STRING(manufacturer_str,
00180         USB_STRING("B", "e", "R", "T", "O", "S"));
00181 static const DEFINE_USB_STRING(product_str,
00182         USB_STRING("U", "S", "B", " ", "M", "o", "u", "s", "e"));
00183
00184 static const UsbStringDesc *usb_hid_strings[] =
00185 {
00186     (const UsbStringDesc *)&language_str,
00187     (const UsbStringDesc *)&manufacturer_str,
00188     (const UsbStringDesc *)&product_str,
00189     NULL,
00190 };
00191
00192 typedef struct mouse_report
00193 {
00194     uint8_t buttons;
00195     int8_t x;
00196     int8_t y;
00197 } PACKED mouse_report_t;
00198
00199 static mouse_report_t report;
00200
00201 static bool hid_mouse_configured;
00202
00203 static void usb_hid_event_cb(UsbCtrlRequest *ctrl)
00204 {
00205     uint16_t value = usb_le16_to_cpu(ctrl->wValue);
00206     uint16_t index = usb_le16_to_cpu(ctrl->wIndex);
00207     uint16_t length = usb_le16_to_cpu(ctrl->wLength);
00208     uint8_t type = ctrl->mRequestType;
00209     uint8_t request = ctrl->bRequest;
00210
00211     LOG_INFO("%s: s 0x%02x 0x%02x 0x%04x 0x%04x 0x%04x\n",
00212         __func__, type, request, value, index, length);
00213     switch (ctrl->bRequest)
00214     {
00215     case USB_REQ_GET_DESCRIPTOR:
00216         switch (value >> 8)
00217         {
00218         case HID_DT_HID:
00219             LOG_INFO("%s: HID_DT_HID\n", __func__);
00220             usb_endpointWrite(USB_DIR_IN | 0,
00221                     &usb_hid_descriptor,
00222                     sizeof(usb_hid_descriptor));
00223             break;
00224         case HID_DT_REPORT:
00225             LOG_INFO("%s: HID_DT_REPORT\n", __func__);
00226             usb_endpointWrite(USB_DIR_IN | 0,
00227                     &hid_report_descriptor,
00228                     sizeof(hid_report_descriptor));
00229             hid_mouse_configured = true;
00230             break;
00231         }
00232         break;
00233     case HID_REQ_GET_REPORT:
00234         LOG_INFO("%s: HID_REQ_GET_REPORT\n", __func__);
00235         break;
00236     case HID_REQ_SET_REPORT:
00237         LOG_INFO("%s: HID_REQ_SET_REPORT\n", __func__);
00238         break;
00239     case HID_REQ_GET_IDLE:
00240         LOG_INFO("%s: HID_REQ_GET_IDLE\n", __func__);
00241         break;
00242     case HID_REQ_SET_IDLE:
00243         LOG_INFO("%s: HID_REQ_SET_IDLE\n", __func__);
00244         usb_endpointWrite(USB_DIR_IN | 0, NULL, 0);
00245         break;
00246     case HID_REQ_GET_PROTOCOL:
00247         LOG_INFO("%s: HID_REQ_GET_PROTOCOL\n", __func__);
00248         break;
00249     case HID_REQ_SET_PROTOCOL:
00250         LOG_INFO("%s: HID_REQ_SET_PROTOCOL\n", __func__);
00251         break;
00252     default:
00253         LOG_ERR("%s: unknown request: 0x%02x\n",
00254             __func__, ctrl->bRequest);
00255         break;
00256     }
00257 }
00258
00259 /* Global usb-mouse descriptor that identifies the usb-mouse device */
00260 static UsbDevice usb_mouse = {
00261     .device = &usb_hid_device_descriptor,
00262     .config = usb_hid_config,
00263     .strings = usb_hid_strings,
00264     .event_cb = usb_hid_event_cb,
00265 };
00266
00267 /* Low-level usb-hid device initialization */
00268 static int usb_mouse_hw_init(void)
00269 {
00270     if (usb_deviceRegister(&usb_mouse) < 0)
00271         return -1;
00272     LOG_INFO("usb-hid: registered new USB mouse device\n");
00273     return 0;
00274 }
00275
00276 /* Send a mouse event */
00277 void usbmouse_sendEvent(int8_t x, int8_t y, int8_t buttons)
00278 {
00279     report.x = x;
00280     report.y = y;
00281     report.buttons = buttons;
00282     usb_endpointWrite(USB_HID_REPORT_EP, &report, sizeof(report));
00283 }
00284
00285 /*
00286  * Initialize a USB HID device.
00287  *
00288  * TODO: support more than one device at the same time.
00289  */
00290 int usbmouse_init(UNUSED_ARG(int, unit))
00291 {
00292 #if CONFIG_KERN
00293     MOD_CHECK(proc);
00294 #endif
00295     usb_mouse_hw_init();
00296     while (!hid_mouse_configured)
00297         cpu_relax();
00298     return 0;
00299 }


BeRTOS: usbmouse.h File Reference

  • drv
usbmouse.h File Reference

Generic USB mouse device driver. More...

Go to the source code of this file.

Detailed Description

Generic USB mouse device driver.

Author:
Andrea Righi <arighi@develer.com>
Attention:
The API is work in progress and may change in future versions.

Definition in file usbmouse.h.


BeRTOS: usbmouse.h Source File

  • drv
usbmouse.h
Go to the documentation of this file.
00001
00044 #ifndef USBMOUSE_H
00045 #define USBMOUSE_H
00046
00047 void usbmouse_sendEvent(int8_t x, int8_t y, int8_t buttons);
00048 int usbmouse_init(int unit);
00049
00050 #endif /* USBMOUSE_H */


BeRTOS: usbser.c File Reference

  • drv
Functions
usbser.c File Reference

Generic USB serial device driver. More...

#include "usbser.h"
#include "cfg/cfg_usbser.h"
#include <cfg/log.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <cfg/module.h>
#include <cpu/irq.h>
#include <cpu/power.h>
#include <drv/usb.h>
#include <drv/usb_endpoint.h>
#include <string.h>

Go to the source code of this file.

Functions

static size_t | usb_serial_write (struct KFile *fd, const void *buf, size_t size)
Write a buffer to a usb-serial port.
static size_t | usb_serial_read (struct KFile *fd, void *buf, size_t size)
Read at most size bytes from a usb-serial port and put them in buf.
static int | usb_serial_error (struct KFile *fd)
Return the status of a usb-serial port.
static void | usb_serial_clearerr (struct KFile *fd)
Clear the status of a usb-serial port.
static int | usb_serial_close (struct KFile *fd)
Close an USB serial port.
static int | usb_serial_open (struct USBSerial *fds, int unit)
Initialize an USB serial port.
static struct KFile * | usb_serial_reopen (struct KFile *fd)
Reopen a usb-serial port.
int | usbser_init (struct USBSerial *fds, int unit)
Init serial driver for a usb-serial port unit.

Detailed Description

Generic USB serial device driver.

Author:
Andrea Righi <arighi@develer.com>

Definition in file usbser.c.

Function Documentation

static void usb_serial_clearerr ( struct KFile * fd ) [static]

Clear the status of a usb-serial port.

Definition at line 235 of file usbser.c.

static int usb_serial_error ( struct KFile * fd ) [static]

Return the status of a usb-serial port.

Definition at line 224 of file usbser.c.

static int usb_serial_open | ( | struct USBSerial * | fds,
 |  | int | unit
 | ) |  | [static]

Initialize an USB serial port.

Parameters:
fds | KFile Serial struct interface.
unit | Serial unit to open.

Definition at line 261 of file usbser.c.

static size_t usb_serial_read | ( | struct KFile * | fd,
 |  | void * | buf,
 |  | size_t | size
 | ) |  | [static]

Read at most size bytes from a usb-serial port and put them in buf.

Returns:
number of bytes actually read.

Definition at line 208 of file usbser.c.

static size_t usb_serial_write | ( | struct KFile * | fd,
 |  | const void * | buf,
 |  | size_t | size
 | ) |  | [static]

Write a buffer to a usb-serial port.

Returns:
number of bytes actually written.

Definition at line 191 of file usbser.c.

int usbser_init | ( | struct USBSerial * | fds,
 |  | int | unit
 | ) |  |

Init serial driver for a usb-serial port unit.

Returns:
0 if OK, a negative value in case of error.

Definition at line 295 of file usbser.c.


BeRTOS: usbser.c Source File

  • drv
usbser.c
Go to the documentation of this file.
00001
00039 #include "usbser.h"
00040
00041 #include "cfg/cfg_usbser.h"
00042
00043 #define LOG_LEVEL  USB_SERIAL_LOG_LEVEL
00044 #define LOG_FORMAT USB_SERIAL_LOG_FORMAT
00045
00046 #include <cfg/log.h>
00047 #include <cfg/debug.h>
00048 #include <cfg/macros.h>
00049
00050 #include <cfg/compiler.h>
00051 #include <cfg/module.h>
00052
00053 #include <cpu/irq.h> /* IRQ_DISABLE / IRQ_ENABLE */
00054 #include <cpu/power.h> /* cpu_relax() */
00055
00056 #include <drv/usb.h>
00057 #include <drv/usb_endpoint.h>
00058
00059 #include <string.h> /* memcpy() */
00060
00061
00062 #define USB_SERIAL_INTERFACES   1
00063 #define USB_SERIAL_ENDPOINTS    3
00064
00065 #define USB_STRING_MANUFACTURER 1
00066 #define USB_STRING_PRODUCT  2
00067 #define USB_STRING_SERIAL   3
00068
00069 static UsbDeviceDesc usb_serial_device_descriptor =
00070 {
00071     .bLength = sizeof(usb_serial_device_descriptor),
00072     .bDescriptorType = USB_DT_DEVICE,
00073     .bcdUSB = 0x110,
00074     .bDeviceClass = USB_CLASS_COMM,
00075     .bDeviceSubClass = 0,
00076     .bDeviceProtocol = 0,
00077     .idVendor = USB_SERIAL_VENDOR_ID,
00078     .idProduct = USB_SERIAL_PRODUCT_ID,
00079     .bcdDevice = 0,
00080     .iManufacturer = USB_STRING_MANUFACTURER,
00081     .iProduct = USB_STRING_PRODUCT,
00082     .iSerialNumber = USB_STRING_SERIAL,
00083     .bNumConfigurations = 1,
00084 };
00085
00086 static const UsbConfigDesc usb_serial_config_descriptor =
00087 {
00088     .bLength = sizeof(usb_serial_config_descriptor),
00089     .bDescriptorType = USB_DT_CONFIG,
00090     .bNumInterfaces = USB_SERIAL_INTERFACES,
00091     .bConfigurationValue = 1,
00092     .iConfiguration = 0,
00093     .bmAttributes = USB_CONFIG_ATT_ONE,
00094     .bMaxPower = 50, /* 100 mA */
00095 };
00096
00097 static const UsbInterfaceDesc usb_serial_interface_descriptor =
00098 {
00099     .bLength = sizeof(usb_serial_interface_descriptor),
00100     .bDescriptorType = USB_DT_INTERFACE,
00101     .bInterfaceNumber = 0,
00102     .bAlternateSetting = 0,
00103     .bNumEndpoints = USB_SERIAL_ENDPOINTS,
00104     .bInterfaceClass = 0xff,
00105     .bInterfaceSubClass = 0,
00106     .bInterfaceProtocol = 0,
00107     .iInterface = 0,
00108 };
00109
00110 static const UsbEndpointDesc usb_serial_ep_report_descriptor =
00111 {
00112     .bLength = sizeof(usb_serial_ep_report_descriptor),
00113     .bDescriptorType = USB_DT_ENDPOINT,
00114     .bEndpointAddress = USB_DIR_IN | USB_SERIAL_EP_REPORT,
00115     .bmAttributes = USB_ENDPOINT_XFER_INT,
00116     .wMaxPacketSize = usb_cpu_to_le16((uint16_t)8),
00117     .bInterval = 1,
00118 };
00119
00120 static const UsbEndpointDesc usb_serial_ep_in_descriptor =
00121 {
00122     .bLength = sizeof(usb_serial_ep_in_descriptor),
00123     .bDescriptorType = USB_DT_ENDPOINT,
00124     .bEndpointAddress = USB_DIR_IN | USB_SERIAL_EP_IN,
00125     .bmAttributes = USB_ENDPOINT_XFER_BULK,
00126     .wMaxPacketSize = usb_cpu_to_le16((uint16_t)64),
00127     .bInterval = 0,
00128 };
00129
00130 static const UsbEndpointDesc usb_serial_ep_out_descriptor =
00131 {
00132     .bLength = sizeof(usb_serial_ep_in_descriptor),
00133     .bDescriptorType = USB_DT_ENDPOINT,
00134     .bEndpointAddress = USB_DIR_OUT | USB_SERIAL_EP_OUT,
00135     .bmAttributes = USB_ENDPOINT_XFER_BULK,
00136     .wMaxPacketSize = usb_cpu_to_le16((uint16_t)64),
00137     .bInterval = 0,
00138 };
00139
00140 static const UsbDescHeader *usb_serial_config[] =
00141 {
00142     (const UsbDescHeader *)&usb_serial_config_descriptor,
00143     (const UsbDescHeader *)&usb_serial_interface_descriptor,
00144     (const UsbDescHeader *)&usb_serial_ep_report_descriptor,
00145     (const UsbDescHeader *)&usb_serial_ep_in_descriptor,
00146     (const UsbDescHeader *)&usb_serial_ep_out_descriptor,
00147     NULL,
00148 };
00149
00150 static const DEFINE_USB_STRING(language_str, "\x09\x04"); // Language ID: en_US
00151 static const DEFINE_USB_STRING(manufacturer_str,
00152         USB_STRING("B", "e", "R", "T", "O", "S"));
00153 static const DEFINE_USB_STRING(product_str,
00154         USB_STRING("U", "S", "B", "-", "s", "e", "r", "i", "a", "l"));
00155 static const DEFINE_USB_STRING(serial_str,
00156         USB_STRING("0", "0", "1"));
00157
00158 static const UsbStringDesc *usb_serial_strings[] =
00159 {
00160     (const UsbStringDesc *)&language_str,
00161     (const UsbStringDesc *)&manufacturer_str,
00162     (const UsbStringDesc *)&product_str,
00163     (const UsbStringDesc *)&serial_str,
00164     NULL,
00165 };
00166
00167 /* Global usb-serial descriptor that identifies the usb-serial device */
00168 static UsbDevice usb_serial = {
00169     .device = &usb_serial_device_descriptor,
00170     .config = usb_serial_config,
00171     .strings = usb_serial_strings,
00172 };
00173
00174 /* Low-level usb-serial device initialization */
00175 static int usb_serial_hw_init(void)
00176 {
00177 #if CONFIG_KERN
00178     MOD_CHECK(proc);
00179 #endif
00180     if (usb_deviceRegister(&usb_serial) < 0)
00181         return -1;
00182     LOG_INFO("usb-serial: registered new USB interface driver\n");
00183     return 0;
00184 }
00185
00191 static size_t usb_serial_write(struct KFile *fd,
00192             const void *buf, size_t size)
00193 {
00194     DB(USBSerial *fds = USB_SERIAL_CAST(fd));
00195
00196     /* Silent compiler warnings if _DEBUG is not enabled */
00197     (void)fd;
00198     ASSERT(fds->is_open);
00199     return usb_endpointWrite(usb_serial_ep_in_descriptor.bEndpointAddress,
00200                 buf, size);
00201 }
00202
00208 static size_t usb_serial_read(struct KFile *fd, void *buf, size_t size)
00209 {
00210     DB(USBSerial *fds = USB_SERIAL_CAST(fd));
00211
00212     /* Silent compiler warnings if _DEBUG is not enabled */
00213     (void)fd;
00214     ASSERT(fds->is_open);
00215     return usb_endpointRead(usb_serial_ep_out_descriptor.bEndpointAddress,
00216                 buf, size);
00217 }
00218
00224 static int usb_serial_error(struct KFile *fd)
00225 {
00226     USBSerial *fds = USB_SERIAL_CAST(fd);
00227     return fds->status;
00228 }
00229
00235 static void usb_serial_clearerr(struct KFile *fd)
00236 {
00237     USBSerial *fds = USB_SERIAL_CAST(fd);
00238     fds->status = 0;
00239 }
00240
00244 static int usb_serial_close(struct KFile *fd)
00245 {
00246     DB(USBSerial *fds = USB_SERIAL_CAST(fd));
00247
00248     /* Silent compiler warnings if _DEBUG is not enabled */
00249     (void)fd;
00250     ASSERT(fds->is_open);
00251     DB(fds->is_open = false);
00252     return 0;
00253 }
00254
00261 static int usb_serial_open(struct USBSerial *fds, int unit)
00262 {
00263     unit = unit;
00264     ASSERT(!fds->is_open);
00265     /* TODO: only a single usb-serial unit is supported for now */
00266     ASSERT(unit == 0);
00267
00268     /* Initialize usb-serial driver */
00269     if (usb_serial_hw_init() < 0)
00270         return -1;
00271     /* Clear error flags */
00272     fds->status = 0;
00273     DB(fds->is_open = true);
00274
00275     return 0;
00276 }
00277
00281 static struct KFile *usb_serial_reopen(struct KFile *fd)
00282 {
00283     USBSerial *fds = USB_SERIAL_CAST(fd);
00284
00285     usb_serial_close(fd);
00286     usb_serial_open(fds, fds->unit);
00287     return 0;
00288 }
00289
00295 int usbser_init(struct USBSerial *fds, int unit)
00296 {
00297     memset(fds, 0, sizeof(*fds));
00298
00299     DB(fds->fd._type = KFT_USB_SERIAL);
00300     fds->fd.reopen = usb_serial_reopen;
00301     fds->fd.close = usb_serial_close;
00302     fds->fd.read = usb_serial_read;
00303     fds->fd.write = usb_serial_write;
00304     /* TODO: properly implement error handling. */
00305     fds->fd.error = usb_serial_error;
00306     fds->fd.clearerr = usb_serial_clearerr;
00307
00308     return usb_serial_open(fds, unit);
00309 }


BeRTOS: usbser.h File Reference

  • drv
Defines | Functions
usbser.h File Reference

Generic USB serial device driver. More...

#include <io/kfile.h>

Go to the source code of this file.

Defines

#define | KFT_USB_SERIAL MAKE_ID('U', 'S', 'B', 'S')
ID for usb-serial.

Functions

int | usbser_init (struct USBSerial *fds, int unit)
Init serial driver for a usb-serial port unit.

Detailed Description

Generic USB serial device driver.

Author:
Andrea Righi <arighi@develer.com>

This driver exports a USB-serial converter. It provides a KFile interface to access the data.

Attention:
The API is work in progress and may change in future versions.

Definition in file usbser.h.

Function Documentation

int usbser_init | ( | struct USBSerial * | fds,
 |  | int | unit
 | ) |  |

Init serial driver for a usb-serial port unit.

Returns:
0 if OK, a negative value in case of error.

Definition at line 295 of file usbser.c.


BeRTOS: usbser.h Source File

  • drv
usbser.h
Go to the documentation of this file.
00001
00046 #ifndef USBSER_H
00047 #define USBSER_H
00048
00049 #include <io/kfile.h>
00050
00051 typedef uint32_t usbser_status_t;
00052
00053 typedef struct USBSerial
00054 {
00056         KFile fd;
00058         unsigned int unit;
00059 #ifdef _DEBUG
00060
00061         bool is_open;
00062 #endif
00063
00064         usbser_status_t status;
00065 } USBSerial;
00066
00070 #define KFT_USB_SERIAL MAKE_ID('U', 'S', 'B', 'S')
00071
00072 INLINE USBSerial *USB_SERIAL_CAST(KFile *fd)
00073 {
00074         ASSERT(fd->_type == KFT_USB_SERIAL);
00075         return (USBSerial *)fd;
00076 }
00077
00078 int usbser_init(struct USBSerial *fds, int unit);
00079
00080 #endif /* USBSER_H */


BeRTOS: util.c File Reference

  • sec
Functions
util.c File Reference

Generic utilities. More...

#include "util.h"
#include <sec/kdf/pbkdf2.h>
#include <sec/mac/hmac.h>
#include <sec/hash/sha1.h>

Go to the source code of this file.

Functions

void password2key (const char *pwd, size_t pwd_len, uint8_t *key, size_t key_len)
Convert a generic "password" (low-diffused) to a generic "key" (high-diffused).

Detailed Description

Generic utilities.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file util.c.

Function Documentation

void password2key | ( | const char * | pwd,
 |  | size_t | pwd_len,
 |  | uint8_t * | key,
 |  | size_t | key_len
 | ) |  |

Convert a generic "password" (low-diffused) to a generic "key" (high-diffused).

In common terminology, a "password" is a key with weak cryptographic characteristics, such as commonly used password input by an user, which are usually short and use only a few different characters from the 0-255 byte range.

This function derives a strong key from the password using a one-way process.

Note:
Uses PBKDF2 as key-derivation function, with a fixed salt that changes for each Bertos project.

Definition at line 48 of file util.c.


BeRTOS: util.c Source File

  • sec
util.c
Go to the documentation of this file.
00001
00038 #include "util.h"
00039 #include <sec/kdf/pbkdf2.h>
00040 #include <sec/mac/hmac.h>
00041 #include <sec/hash/sha1.h>
00042
00043 // FIXME: this macros should be generated by the wizard
00044 #define BERTOS_PROJECT_NAME   "bertos_project"
00045
00046 #define SALT   (BERTOS_PROJECT_NAME "P2K_SALT")
00047
00048 void password2key(const char *pwd, size_t pwd_len,
00049                   uint8_t *key, size_t key_len)
00050 {
00051     Kdf *kdf = PBKDF2_stackinit(hmac_stackinit(SHA1_stackinit()));
00052
00053     kdf_begin(kdf, pwd, pwd_len, (uint8_t*)SALT, sizeof(SALT));
00054     kdf_read(kdf, key, key_len);
00055
00056     // FIXME: how to purge the stack?
00057 }


BeRTOS: util.h Source File

  • sec
util.h
00001 #ifndef SEC_UTIL_H
00002 #define SEC_UTIL_H
00003
00004 #include <cfg/macros.h>
00005 #include <cfg/compiler.h>
00006 #include <cfg/debug.h>
00007 #include <string.h>
00008
00015 #define PURGE(x) \
00016     memset(&x, 0, sizeof(x))
00017
00033 void password2key(const char *pwd, size_t pwd_len,
00034                   uint8_t *key, size_t key_len);
00035
00036 INLINE void xor_block_8(uint8_t *out,
00037         const uint8_t *in1, const uint8_t *in2, size_t len)
00038 {
00039     while (len--)
00040                 *out++ = *in1++ ^ *in2++;
00041 }
00042
00043 INLINE void xor_block_const_8(uint8_t *out,
00044             const uint8_t *in, uint8_t k, size_t len)
00045 {
00046     while (len--)
00047                 *out++ = *in++ ^ k;
00048 }
00049
00050 INLINE void xor_block_32(uint32_t *out, const uint32_t *in1,
00051                 const uint32_t *in2, size_t len)
00052 {
00053     size_t rem = (len & (sizeof(uint32_t) - 1));
00054
00055     len /= sizeof(uint32_t);
00056     while (len--)
00057         *out++ = *in1++ ^ *in2++;
00058     xor_block_8((uint8_t *)out,
00059         (const uint8_t *)in1, (const uint8_t *)in2, rem);
00060 }
00061
00062 INLINE void xor_block_const_32(uint32_t *out, const uint32_t *in,
00063                     uint8_t k, size_t len)
00064 {
00065     uint32_t k32 = k | ((uint32_t)k << 8) |
00066             ((uint32_t)k << 16) | ((uint32_t)k << 24);
00067     size_t rem = (len & (sizeof(uint32_t) - 1));
00068
00069     len /= sizeof(uint32_t);
00070     while (len--)
00071         *out++ = *in++ ^ k32;
00072     xor_block_const_8((uint8_t *)out, (const uint8_t *)in, k, rem);
00073 }
00074
00079 INLINE void xor_block(void *out, const void *in1, const void *in2, size_t len)
00080 {
00081     if (is_aligned(out, sizeof(uint32_t)) &&
00082             is_aligned(in1, sizeof(uint32_t)) &&
00083             is_aligned(in2, sizeof(uint32_t)))
00084     {
00085         uint32_t *obuf = (uint32_t *)((size_t)out);
00086         const uint32_t *ibuf1 = (const uint32_t *)((size_t)in1);
00087         const uint32_t *ibuf2 = (const uint32_t *)((size_t)in2);
00088
00089         xor_block_32(obuf, ibuf1, ibuf2, len);
00090     }
00091     else
00092     {
00093         uint8_t *obuf = (uint8_t *)((size_t)out);
00094         const uint8_t *ibuf1 = (const uint8_t *)((size_t)in1);
00095         const uint8_t *ibuf2 = (const uint8_t *)((size_t)in2);
00096
00097         xor_block_8(obuf, ibuf1, ibuf2, len);
00098     }
00099 }
00100
00104 INLINE void xor_block_const(uint8_t *out, const uint8_t *in, uint8_t k, size_t len)
00105 {
00106     if (is_aligned(out, sizeof(uint32_t)) &&
00107             is_aligned(in, sizeof(uint32_t)))
00108     {
00109         uint32_t *obuf = (uint32_t *)((size_t)out);
00110         const uint32_t *ibuf = (const uint32_t *)((size_t)in);
00111
00112         xor_block_const_32(obuf, ibuf, k, len);
00113     }
00114     else
00115     {
00116         uint8_t *obuf = (uint8_t *)((size_t)out);
00117         const uint8_t *ibuf = (const uint8_t *)((size_t)in);
00118
00119         xor_block_const_8(obuf, ibuf, k, len);
00120     }
00121 }
00122
00123 #endif /* SEC_UTIL_H */


BeRTOS: verstag.c File Reference

  • bertos
Variables
verstag.c File Reference

Define application version strings. More...

#include <verstag.h>
#include "buildrev.h"

Go to the source code of this file.

Variables

const char | vers_tag [] = VERS_TAG
The revision string (contains VERS_TAG)
const char | vers_host [] = VERS_HOST
Hostname of the machine used to build this binary (contains VERS_HOST)
const int | vers_build_nr = VERS_BUILD
Sequential build number (contains VERS_BUILD)

Detailed Description

Define application version strings.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file verstag.c.


BeRTOS: verstag.c Source File

  • bertos
verstag.c
Go to the documentation of this file.
00001
00038 #include <verstag.h>
00039
00040 /*
00041  * "buildrev.h" is auto-generated by the build infrastructure,
00042  * incrementing VERS_BUILD each time the project is rebuilt.
00043  */
00044 #include "buildrev.h"
00045
00046 const char vers_tag[] = VERS_TAG;
00047 const char vers_build_str[] = _STRINGIZE(VERS_BUILD);
00048 const char vers_host[] = VERS_HOST;
00049 const int vers_build_nr = VERS_BUILD;
00050


BeRTOS: verstag.h File Reference

  • bertos
Defines | Variables
verstag.h File Reference

Declare application version strings. More...

#include "cfg/cfg_arch.h"

Go to the source code of this file.

Defines

#define | _SNAPSHOT
If _SNAPSHOT is defined, VERS_TAG contains the build date date instead of a numeric version string.
#define | MAKE_VERS(maj, min, rev) _STRINGIZE(maj) "." _STRINGIZE(min) "." _STRINGIZE(rev) VERS_LETTER VERS_DBG
Build application version string (i.e.
#define | MAKE_RCVERS(maj, min, rev, bld) _STRINGIZE(maj) ", " _STRINGIZE(min) ", " _STRINGIZE(rev) ", " _STRINGIZE(bld)
Build application version string suitable for MS windows resource files (i.e.

Variables

const char | vers_tag []
The revision string (contains VERS_TAG)
const int | vers_build_nr
Sequential build number (contains VERS_BUILD)
const char | vers_host []
Hostname of the machine used to build this binary (contains VERS_HOST)

Detailed Description

Declare application version strings.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file verstag.h.

Define Documentation

#define MAKE_RCVERS | ( | maj,
 |  | min,
 |  | rev,
 |  | bld
 | ) | _STRINGIZE(maj) ", " _STRINGIZE(min) ", " _STRINGIZE(rev) ", " _STRINGIZE(bld)

Build application version string suitable for MS windows resource files (i.e.

: "1, 7, 0, 1")

Definition at line 92 of file verstag.h.

#define MAKE_VERS | ( | maj,
 |  | min,
 |  | rev
 | ) | _STRINGIZE(maj) "." _STRINGIZE(min) "." _STRINGIZE(rev) VERS_LETTER VERS_DBG

Build application version string (i.e.

: "1.7.0")

Definition at line 84 of file verstag.h.


BeRTOS: verstag.h Source File

  • bertos
verstag.h
Go to the documentation of this file.
00001
00041 #ifndef BERTOS_VERSTAG_H
00042 #define BERTOS_VERSTAG_H
00043
00044 #ifndef CFG_ARCH_CONFIG_H
00045     #include "cfg/cfg_arch.h"
00046 #endif
00047
00048 #define APP_NAME "Appname"
00049 #define APP_DESCRIPTION "Long application name description"
00050 #define APP_AUTHOR "Develer"
00051 #define APP_COPYRIGHT "Copyright 2009 Develer (http://www.develer.com/)"
00052
00053
00054 #if ARCH & ARCH_DEFAULT
00055     #define VERS_MAJOR 0
00056     #define VERS_MINOR 1
00057     #define VERS_REV   0
00058     #define VERS_LETTER ""
00059 #elif ARCH & ARCH_NIGHTTEST
00060     #define VERS_MAJOR 0
00061     #define VERS_MINOR 1
00062     #define VERS_REV   0
00063     #define VERS_LETTER ""
00064 #else
00065     #error unknown architecture
00066 #endif
00067
00072 #define _SNAPSHOT
00073
00074 #ifdef _DEBUG
00075     #define VERS_DBG "D"
00076 #else
00077     #define VERS_DBG ""
00078 #endif
00079
00080 #define __STRINGIZE(x) #x
00081 #define _STRINGIZE(x) __STRINGIZE(x)
00082
00084 #define MAKE_VERS(maj,min,rev) _STRINGIZE(maj) "." _STRINGIZE(min) "." _STRINGIZE(rev) VERS_LETTER VERS_DBG
00085 #ifdef _SNAPSHOT
00086     #define VERS_TAG "snapshot" " " __DATE__ " " __TIME__ " " VERS_LETTER " " VERS_DBG
00087 #else
00088     #define VERS_TAG MAKE_VERS(VERS_MAJOR,VERS_MINOR,VERS_REV)
00089 #endif
00090
00092 #define MAKE_RCVERS(maj,min,rev,bld) _STRINGIZE(maj) ", " _STRINGIZE(min) ", " _STRINGIZE(rev) ", " _STRINGIZE(bld)
00093 #define RCVERSION_TAG MAKE_VERS(VERS_MAJOR,VERS_MINOR,VERS_REV)
00094
00096 extern const char vers_tag[];
00097
00099 extern const int vers_build_nr;
00100 //extern const char vers_build_str[];
00101
00103 extern const char vers_host[];
00104
00105 #endif /* BERTOS_VERSTAG_H */


BeRTOS: vic_lpc2.c File Reference

  • cpu
  • arm
  • drv
vic_lpc2.c File Reference

Vectored Interrupt Controller VIC driver. More...

#include "vic_lpc2.h"
#include <cfg/log.h>

Go to the source code of this file.

Detailed Description

Vectored Interrupt Controller VIC driver.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file vic_lpc2.c.


BeRTOS: vic_lpc2.c Source File

  • cpu
  • arm
  • drv
vic_lpc2.c
Go to the documentation of this file.
00001
00039 #include "vic_lpc2.h"
00040 #include <cfg/log.h>
00041
00042
00043 void NORETURN vic_defaultHandler(void)
00044 {
00045     IRQ_DISABLE;
00046     LOG_ERR("Unhandled IRQ\n"
00047         "VICIRQStatus %08lX\n"
00048         "VICFIQStatus %08lX\n", VICIRQStatus, VICFIQStatus);
00049     while (1)
00050         PAUSE;
00051 }


BeRTOS: vic_lpc2.h File Reference

  • cpu
  • arm
  • drv
vic_lpc2.h File Reference

Vectored Interrupt Controller VIC driver. More...

#include <cfg/compiler.h>
#include <cpu/irq.h>

Go to the source code of this file.

Detailed Description

Vectored Interrupt Controller VIC driver.

Author:
Francesco Sacchi <batt@develer.com>

Definition in file vic_lpc2.h.


BeRTOS: vic_lpc2.h Source File

  • cpu
  • arm
  • drv
vic_lpc2.h
Go to the documentation of this file.
00001
00038 #ifndef DRV_VIC_LPC2_H
00039 #define DRV_VIC_LPC2_H
00040
00041 #include <cfg/compiler.h>
00042 #include <cpu/irq.h>
00043
00044 #if CPU_ARM_LPC2378
00045     #include <io/lpc23xx.h>
00046     #define vic_vector(i)   (*(&VICVectAddr0 + i))
00047     #define vic_priority(i) (*(&VICVectCntl0 + i))
00048     #define VIC_SRC_CNT 32
00049     #define vic_enable(i)  do { ASSERT(i < VIC_SRC_CNT); VICIntEnable = BV(i); } while (0)
00050     #define vic_disable(i) do { ASSERT(i < VIC_SRC_CNT); VICIntEnClr  = BV(i); } while (0)
00051
00052     typedef void vic_handler_t(void);
00053     void vic_defaultHandler(void);
00054
00055     INLINE void vic_init(void)
00056     {
00057         IRQ_DISABLE;
00058         /* Assign all sources to IRQ (not to FIQ) */
00059         VICIntSelect = 0;
00060         /* Disable all sw interrupts */
00061         VICSoftIntClr = 0xFFFFFFFF;
00062         /* Disable all interrupts */
00063         VICIntEnClr = 0xFFFFFFFF;
00064
00065         for (int i = 0; i < VIC_SRC_CNT; i++)
00066             vic_vector(i) = (reg32_t)vic_defaultHandler;
00067     }
00068
00069     INLINE void vic_setVector(int id, vic_handler_t *handler)
00070     {
00071         ASSERT(id < VIC_SRC_CNT);
00072         vic_vector(id) = (reg32_t)handler;
00073     }
00074 #else
00075     #error Unknown CPU
00076 #endif
00077
00078 #endif /* DRV_VIC_LPC2_H */


BeRTOS: wdt.h File Reference

  • drv
Functions
wdt.h File Reference

Watchdog module, supplies a simple API to manage wdt on supported target. More...

#include "cfg/cfg_wdt.h"
#include <cfg/compiler.h>

Go to the source code of this file.

Functions

void | wdt_reset (void)
Reset the watchdog timer.
void | wdt_start (uint32_t timeout)
Start the watchdog timer that fire at the select timeout.

Detailed Description

Watchdog module, supplies a simple API to manage wdt on supported target.

Author:
Bernie Innocenti <bernie@codewiz.org>

Definition in file wdt.h.

Function Documentation

void wdt_start ( uint32_t timeout ) [inline]

Start the watchdog timer that fire at the select timeout.

Parameters:
timeout this value is target dependant. See the target documentation for more details.

Definition at line 93 of file wdt.h.


BeRTOS: wdt.h Source File

  • drv
wdt.h
Go to the documentation of this file.
00001
00043 #ifndef DRV_WDT_H
00044 #define DRV_WDT_H
00045
00046 #include "cfg/cfg_wdt.h"
00047
00048 #include <cfg/compiler.h> // INLINE
00049
00050 /* Configury sanity check */
00051 #if !defined(CONFIG_WATCHDOG) || (CONFIG_WATCHDOG != 0 && CONFIG_WATCHDOG != 1)
00052     #error CONFIG_WATCHDOG must be defined to either 0 or 1
00053 #endif
00054
00055 #if OS_HOSTED
00056     #include <cpu/detect.h>
00057     #include <cfg/os.h>
00058
00059     #if OS_QT
00060             #include <QtGui/QApplication>
00061     #elif OS_POSIX
00062         #include <sys/select.h>
00063     #else
00064         #error unknown CPU
00065     #endif
00066 #elif CONFIG_WATCHDOG
00067     #include CPU_HEADER(wdt)
00068 #endif /* CONFIG_WATCHDOG */
00069
00070
00071 #if OS_HOSTED || !CONFIG_WATCHDOG
00072
00076     INLINE void wdt_reset(void)
00077     {
00078     #if CONFIG_WATCHDOG
00079         #if OS_POSIX
00080             static struct timeval tv = { 0, 0 };
00081             select(0, NULL, NULL, NULL, &tv);
00082         #endif
00083     #endif /* CONFIG_WATCHDOG */
00084     }
00085
00093     INLINE void wdt_start(uint32_t timeout)
00094     {
00095     #if CONFIG_WATCHDOG
00096         #if OS_QT
00097             // Create a dummy QApplication object
00098             if (!qApp)
00099             {
00100                 int argc;
00101                 new QApplication(argc, (char **)NULL);
00102             }
00103             (void)timeout;
00104         #elif OS_POSIX
00105             (void)timeout; // NOP
00106         #endif
00107     #endif /* CONFIG_WATCHDOG */
00108         (void)timeout; // NOP
00109     }
00110
00111     INLINE void wdt_stop(void)
00112     {
00113     #if CONFIG_WATCHDOG
00114         #if OS_QT
00115             // NOP
00116         #elif OS_POSIX
00117             // NOP
00118         #else
00119             #error unknown CPU
00120         #endif
00121     #endif /* CONFIG_WATCHDOG */
00122     }
00123 #endif /* OS_HOSTED || !CONFIG_WATCHDOG */
00124
00125 #endif /* DRV_WDT_H */


BeRTOS: wdt_arm.h File Reference

  • cpu
  • arm
  • drv
wdt_arm.h File Reference

Watchdog interface for ARM architecture. More...

#include <cfg/compiler.h>

Go to the source code of this file.

Detailed Description

Watchdog interface for ARM architecture.

Author:
Luca Ottaviano <lottaviano@develer.com>

Definition in file wdt_arm.h.


BeRTOS: wdt_arm.h Source File

  • cpu
  • arm
  • drv
wdt_arm.h
Go to the documentation of this file.
00001
00039 #ifndef DRV_WDT_ARM_H
00040 #define DRV_WDT_ARM_H
00041
00042 #include <cfg/compiler.h> // INLINE
00043
00044 #warning TODO: This module is not implemented for at91 CPUs
00045
00046 INLINE void wdt_start(uint32_t _timeout) { (void) _timeout; /* implement me */ }
00047 INLINE void wdt_stop(void) { /*implement me */ }
00048 INLINE void wdt_reset(void) { /* implement me */ }
00049
00050 #endif //DRV_WDT_ARM_H


BeRTOS: wdt_avr.h File Reference

  • cpu
  • avr
  • drv
Functions
wdt_avr.h File Reference

Watchdog interface for AVR architecture. More...

#include "cfg/cfg_wdt.h"
#include <cfg/compiler.h>
#include <avr/io.h>
#include <avr/wdt.h>

Go to the source code of this file.

Functions

void | wdt_start (uint32_t _timeout)
Reset the watchdog timer.
void | wdt_stop (void)
Stop watchdog timer.

Detailed Description

Watchdog interface for AVR architecture.

Note:
The avr-libc already provide an api to manage the watchdog on AVR architecture. In avr-libc are also available several constants used to set the timeout value (see documentation for more detail).
Author:
Daniele Basile <asterix@develer.com>

Definition in file wdt_avr.h.

Function Documentation

void wdt_start ( uint32_t _timeout ) [inline]

Reset the watchdog timer.

This functions is already defind in avr-libc. Start the watchdog timer that fire at the select timeout.

Parameters:
_timeout you can use the macro that are defineded in avr/wdt.h.

(from avr libc documentation) WDTO_15MS WDTO_30MS WDTO_60MS WDTO_120MS WDTO_250MS WDTO_500MS WDTO_1S WDTO_2S WDTO_4S WDTO_8S

Definition at line 80 of file wdt_avr.h.


BeRTOS: wdt_avr.h Source File

  • cpu
  • avr
  • drv
wdt_avr.h
Go to the documentation of this file.
00001
00044 #ifndef DRV_WDT_AVR_H
00045 #define DRV_WDT_AVR_H
00046
00047 #include "cfg/cfg_wdt.h"
00048
00049 #include <cfg/compiler.h> // INLINE
00050
00051 #include <avr/io.h>
00052 #include <avr/wdt.h>
00053
00059 // void wdt_reset(void)
00060
00080 INLINE void wdt_start(uint32_t _timeout)
00081 {
00082     uint8_t timeout = _timeout;
00083
00084     wdt_enable(timeout);
00085 }
00086
00090 INLINE void wdt_stop(void)
00091 {
00092     wdt_disable();
00093 }
00094
00095
00096 #endif /* DRV_WDT_AVR_H */


BeRTOS: win.c File Reference

  • gfx
Functions
win.c File Reference

Very simple hierarchical windowing system. More...

#include "win.h"
#include <struct/list.h>

Go to the source code of this file.

Functions

void | win_compose (Window *w)
Map the contents of all child-windows into the bitmap of w.
void | win_open (Window *w, Window *parent)
Map window w into parent.
void | win_close (Window *w)
Detach window from its parent.
void | win_raise (Window *w)
Move window to the topmost position relative to its sibling.
void | win_setGeometry (Window *w, const Rect *new_geom)
Set window position and size at the same time.
void | win_move (Window *w, coord_t left, coord_t top)
Move window to specified position.
void | win_resize (Window *w, coord_t width, coord_t height)
Resize the rectangle of a window.
void | win_create (Window *w, Bitmap *bm)
Initialize a new window structure.

Detailed Description

Very simple hierarchical windowing system.

Author:
Bernie Innocenti <bernie@codewiz.org>

All functions in this module are to be intended as methods of the Window class. Please see its documentation for a module-wise introduction.

See also:
Embedded optimized general purpose data types Window

Definition in file win.c.

Function Documentation

void win_close ( Window * w )

Detach window from its parent.

Closing a window causes it to become orphan of its parent. Its content will no longer appear in its parent after the next refresh cycle.

Note:
Closing a window that has not been previously opened is illegal.
See also:
win_open()

Definition at line 123 of file win.c.

void win_compose ( Window * w )

Map the contents of all child-windows into the bitmap of w.

Note:
Recursively drawing children into their parent effectively damages the parent buffer.

Definition at line 76 of file win.c.

void win_create | ( | Window * | w,
 |  | Bitmap * | bm
 | ) |  |

Initialize a new window structure.

The new window initial position is set to (0,0). The size is set to the size of the installed bitmap, or (0,0) if there's no backing store.

  • bm The bitmap to install as backing store for drawing into the window, or NULL if the window is not drawable.

Definition at line 218 of file win.c.

void win_move | ( | Window * | w,
 |  | coord_t | left,
 |  | coord_t | top
 | ) |  |

Move window to specified position.

Move the window top-left corner to the pixel coordinates left and top, which are relative to the parent window.

Note:
A window can also be moved outside the borders of its parent, or at negative coordinates.
It is allowed to move an orphan window.

Definition at line 173 of file win.c.

void win_open | ( | Window * | w,
 |  | Window * | parent
 | ) |  |

Map window w into parent.

The new window becomes the topmost window.

Note:
Opening a window twice is illegal.
See also:
win_close()

Definition at line 104 of file win.c.

void win_raise ( Window * w )

Move window to the topmost position relative to its sibling.

See also:
win_move(), win_resize(), win_setGeometry()

Definition at line 135 of file win.c.

void win_resize | ( | Window * | w,
 |  | coord_t | width,
 |  | coord_t | height
 | ) |  |

Resize the rectangle of a window.

The window shrinks or grows to the specified size.

Note:
Growing a window beyond the size of its backing bitmap results in unspecified behavior.
It is allowed to resize an orphan window.

Definition at line 195 of file win.c.

void win_setGeometry | ( | Window * | w,
 |  | const Rect * | new_geom
 | ) |  |

Set window position and size at the same time.

This function is equivalent to subsequent calls to win_move() and win_resize() using the coordinates provided by the new_geom rectangle.

Note:
The xmax and ymax members of new_geom are non-inclusive, as usual for the Rect interface.
See also:
win_move()
win_resize()

Definition at line 155 of file win.c.


BeRTOS: win.c Source File

  • gfx
win.c
Go to the documentation of this file.
00001
00045 /*#*
00046  *#* $Log$
00047  *#* Revision 1.2  2006/08/01 17:26:04  batt
00048  *#* Update docs.
00049  *#*
00050  *#* Revision 1.1  2006/08/01 15:43:01  batt
00051  *#* Add in board_kd current edited channel visualization.
00052  *#*
00053  *#* Revision 1.4  2006/07/19 12:56:26  bernie
00054  *#* Convert to new Doxygen style.
00055  *#*
00056  *#* Revision 1.3  2006/02/10 12:25:41  bernie
00057  *#* Add missing header.
00058  *#*
00059  *#* Revision 1.2  2006/01/26 00:36:48  bernie
00060  *#* Const correctness for some new functions.
00061  *#*
00062  *#* Revision 1.1  2006/01/23 23:14:29  bernie
00063  *#* Implement simple, but impressive windowing system.
00064  *#*
00065  *#*/
00066
00067 #include "win.h"
00068 #include <struct/list.h>
00069
00076 void win_compose(Window *w)
00077 {
00078     Window *child;
00079
00080     /*
00081      * Walk over all children, in back to front order and tell them
00082      * to compose into us.
00083      */
00084     REVERSE_FOREACH_NODE(child, &w->children)
00085     {
00086         /* Recursively compose child first. */
00087         win_compose(child);
00088
00089         /* Draw child into our bitmap. */
00090         if (w->bitmap)
00091             gfx_blit(w->bitmap, &child->geom, child->bitmap, 0, 0);
00092     }
00093 }
00094
00104 void win_open(Window *w, Window *parent)
00105 {
00106     ASSERT(!w->parent);
00107     w->parent = parent;
00108     ADDHEAD(&parent->children, &w->link);
00109 }
00110
00123 void win_close(Window *w)
00124 {
00125     ASSERT(w->parent);
00126     REMOVE(&w->link);
00127     w->parent = NULL;
00128 }
00129
00135 void win_raise(Window *w)
00136 {
00137     ASSERT(w->parent);
00138     REMOVE(&w->link);
00139     ADDHEAD(&w->parent->children, &w->link);
00140 }
00141
00155 void win_setGeometry(Window *w, const Rect *new_geom)
00156 {
00157     // requires C99?
00158     // memcpy(&w->geom, new_geom, sizeof(w->geom));
00159     w->geom = *new_geom;
00160 }
00161
00173 void win_move(Window *w, coord_t left, coord_t top)
00174 {
00175     Rect r;
00176
00177     r.xmin = left;
00178     r.ymin = top;
00179     r.xmax = r.xmin + RECT_WIDTH(&w->geom);
00180     r.ymax = r.ymin + RECT_WIDTH(&w->geom);
00181
00182     win_setGeometry(w, &r);
00183 }
00184
00195 void win_resize(Window *w, coord_t width, coord_t height)
00196 {
00197     Rect r;
00198
00199     r.xmin = w->geom.xmin;
00200     r.ymin = w->geom.ymin;
00201     r.xmax = r.xmin + width;
00202     r.ymax = r.ymin + height;
00203
00204     win_setGeometry(w, &r);
00205 }
00206
00218 void win_create(Window *w, Bitmap *bm)
00219 {
00220     w->parent = NULL;
00221     w->bitmap = bm;
00222     w->geom.xmin = 0;
00223     w->geom.ymin = 0;
00224     if (bm)
00225     {
00226         w->geom.xmax = bm->width;
00227         w->geom.ymax = bm->height;
00228     }
00229     LIST_INIT(&w->children);
00230 }
00231


BeRTOS: win.h File Reference

  • gfx
Data Structures | Functions
win.h File Reference

Very simple hierarchical windowing system. More...

#include <struct/list.h>
#include <gfx/gfx.h>

Go to the source code of this file.

Data Structures

struct | Window
Window handle and context structure. More...

Functions

void | win_compose (Window *w)
Map the contents of all child-windows into the bitmap of w.
void | win_open (Window *w, Window *parent)
Map window w into parent.
void | win_close (Window *w)
Detach window from its parent.
void | win_raise (Window *w)
Move window to the topmost position relative to its sibling.
void | win_setGeometry (Window *w, const Rect *new_geom)
Set window position and size at the same time.
void | win_move (Window *w, coord_t left, coord_t top)
Move window to specified position.
void | win_resize (Window *w, coord_t width, coord_t height)
Resize the rectangle of a window.
void | win_create (Window *w, Bitmap *bm)
Initialize a new window structure.

Detailed Description

Very simple hierarchical windowing system.

Author:
Bernie Innocenti <bernie@codewiz.org>

All functions in this module are to be intended as methods of the Window class. Please see its documentation for a module-wise introduction.

See also:
Embedded optimized general purpose data types Window

Definition in file win.h.

Function Documentation

void win_close ( Window * w )

Detach window from its parent.

Closing a window causes it to become orphan of its parent. Its content will no longer appear in its parent after the next refresh cycle.

Note:
Closing a window that has not been previously opened is illegal.
See also:
win_open()

Definition at line 123 of file win.c.

void win_compose ( Window * w )

Map the contents of all child-windows into the bitmap of w.

Note:
Recursively drawing children into their parent effectively damages the parent buffer.

Definition at line 76 of file win.c.

void win_create | ( | Window * | w,
 |  | Bitmap * | bm
 | ) |  |

Initialize a new window structure.

The new window initial position is set to (0,0). The size is set to the size of the installed bitmap, or (0,0) if there's no backing store.

  • bm The bitmap to install as backing store for drawing into the window, or NULL if the window is not drawable.

Definition at line 218 of file win.c.

void win_move | ( | Window * | w,
 |  | coord_t | left,
 |  | coord_t | top
 | ) |  |

Move window to specified position.

Move the window top-left corner to the pixel coordinates left and top, which are relative to the parent window.

Note:
A window can also be moved outside the borders of its parent, or at negative coordinates.
It is allowed to move an orphan window.

Definition at line 173 of file win.c.

void win_open | ( | Window * | w,
 |  | Window * | parent
 | ) |  |

Map window w into parent.

The new window becomes the topmost window.

Note:
Opening a window twice is illegal.
See also:
win_close()

Definition at line 104 of file win.c.

void win_raise ( Window * w )

Move window to the topmost position relative to its sibling.

See also:
win_move(), win_resize(), win_setGeometry()

Definition at line 135 of file win.c.

void win_resize | ( | Window * | w,
 |  | coord_t | width,
 |  | coord_t | height
 | ) |  |

Resize the rectangle of a window.

The window shrinks or grows to the specified size.

Note:
Growing a window beyond the size of its backing bitmap results in unspecified behavior.
It is allowed to resize an orphan window.

Definition at line 195 of file win.c.

void win_setGeometry | ( | Window * | w,
 |  | const Rect * | new_geom
 | ) |  |

Set window position and size at the same time.

This function is equivalent to subsequent calls to win_move() and win_resize() using the coordinates provided by the new_geom rectangle.

Note:
The xmax and ymax members of new_geom are non-inclusive, as usual for the Rect interface.
See also:
win_move()
win_resize()

Definition at line 155 of file win.c.


BeRTOS: win.h Source File

  • gfx
win.h
Go to the documentation of this file.
00001
00045 /*#*
00046  *#* $Log$
00047  *#* Revision 1.3  2006/07/19 12:56:27  bernie
00048  *#* Convert to new Doxygen style.
00049  *#*
00050  *#* Revision 1.2  2006/01/26 00:36:48  bernie
00051  *#* Const correctness for some new functions.
00052  *#*
00053  *#* Revision 1.1  2006/01/23 23:14:29  bernie
00054  *#* Implement simple, but impressive windowing system.
00055  *#*
00056  *#*/
00057
00058 #ifndef GFX_WIN_H
00059 #define GFX_WIN_H
00060
00061 #include <struct/list.h> /* Node, List */
00062 #include <gfx/gfx.h>    /* coord_t */
00063
00064
00065 EXTERN_C_BEGIN
00066
00087 typedef struct Window
00088 {
00089     Node    link;
00090     struct Window *parent;
00092     Bitmap *bitmap;
00093     Rect    geom;
00100     List    children;
00101
00102 } Window;
00103
00104 /*
00105  * Public function prototypes
00106  */
00107 void win_compose(Window *w);
00108 void win_open(Window *w, Window *parent);
00109 void win_close(Window *w);
00110 void win_raise(Window *w);
00111 void win_setGeometry(Window *w, const Rect *new_geom);
00112 void win_move(Window *w, coord_t left, coord_t top);
00113 void win_resize(Window *w, coord_t width, coord_t height);
00114 void win_create(Window *w, Bitmap *bm);
00115
00116 EXTERN_C_END
00117
00118 #endif /* GFX_WIN_H */
00119


BeRTOS: wingps.c Source File

  • net
  • nmeap
  • tst
wingps.c
00001 /*
00002 Copyright (c) 2005, David M Howard (daveh at dmh2000.com)
00003 All rights reserved.
00004
00005 This product is licensed for use and distribution under the BSD Open Source License.
00006 see the file COPYING for more details.
00007
00008 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00009 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00010 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00011 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
00012 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
00013 OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
00014 OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
00015 OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
00016 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
00017 OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
00018 EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00019
00020 */
00021
00022 /*
00023 ========================================================================================================
00024 EXAMPLE : SETUP FOR GGA AND RMC SENTENCES WITH SERIAL IO FOR WIN32
00025 =======================================================================================================
00026 */
00027 #define WIN32_LEAN_AND_MEAN
00028 #include <windows.h>
00029 #include <stdio.h>
00030 #include <stdlib.h>
00031 #include <string.h>
00032 #include "nmeap.h"
00033
00035 static HANDLE openPort(const char *port,int baud)
00036 {
00037     HANDLE       h;
00038     DCB          dcb;
00039     COMMTIMEOUTS tmo;
00040     int          status;
00041
00042     /* open the port */
00043     h = CreateFile( port,
00044                     GENERIC_READ | GENERIC_WRITE,
00045                     0,
00046                     0,
00047                     OPEN_EXISTING,
00048                     0,
00049                     0);
00050     if (h == INVALID_HANDLE_VALUE) {
00051         /* quit on error */
00052         return h;
00053     }
00054
00055
00056     /* read current configuration */
00057    status = GetCommState(h,&dcb);
00058    if (status == 0) {
00059        CloseHandle(h);
00060        return INVALID_HANDLE_VALUE;
00061    }
00062
00063    /* set the baud rate and other parameters */
00064    dcb.BaudRate = baud;
00065    dcb.ByteSize = 8;
00066    dcb.Parity   = NOPARITY;
00067    dcb.StopBits = ONESTOPBIT;
00068
00069    /* set configuration */
00070    status = SetCommState(h, &dcb);
00071    if (status == 0) {
00072        CloseHandle(h);
00073        return INVALID_HANDLE_VALUE;
00074    }
00075
00076    /* read timeout configuration */
00077    status = GetCommTimeouts(h,&tmo);
00078    if (status == 0) {
00079        CloseHandle(h);
00080        return INVALID_HANDLE_VALUE;
00081    }
00082
00083    /* set to indefinite blocking */
00084    tmo.ReadIntervalTimeout        = 0;
00085    tmo.ReadTotalTimeoutConstant   = 0;
00086    tmo.ReadTotalTimeoutMultiplier = 0;
00087    status = SetCommTimeouts(h,&tmo);
00088    if (status == 0) {
00089        CloseHandle(h);
00090        return INVALID_HANDLE_VALUE;
00091    }
00092
00093     return h;
00094 }
00095
00097 static int readPort(HANDLE h)
00098 {
00099     BOOL  status;
00100     char  ch;
00101     DWORD count;
00102     status =  ReadFile(h,&ch,1,&count,0);
00103     if (status == 0) {
00104         return -1;
00105     }
00106
00107     return (int)ch;
00108 }
00109
00110
00111 static void closePort(HANDLE h)
00112 {
00113     CloseHandle(h);
00114 }
00115
00116
00118 static void printGps(nmeap_gga_t *gga,nmeap_rmc_t *rmc)
00119 {
00120     printf("%lu %lu %.6f %.6f %.0f %f %f %d %d\n",
00121             gga->time,
00122             rmc->date,
00123             gga->latitude  ,
00124             gga->longitude,
00125             gga->altitude ,
00126             rmc->course,
00127             rmc->speed,
00128             gga->satellites,
00129             gga->quality
00130             );
00131 }
00132
00133 /* ---------------------------------------------------------------------------------------*/
00134 /* STEP 1 : allocate the data structures. be careful if you put them on the stack because */
00135 /*          they need to be live for the duration of the parser                           */
00136 /* ---------------------------------------------------------------------------------------*/
00137 static nmeap_context_t nmea;       /* parser context */
00138 static nmeap_gga_t     gga;        /* this is where the data from GGA messages will show up */
00139 static nmeap_rmc_t     rmc;        /* this is where the data from RMC messages will show up */
00140 static int             user_data; /* user can pass in anything. typically it will be a pointer to some user data */
00141
00142 int main(int argc,char *argv[])
00143 {
00144     int             status;
00145     char            ch;
00146     const char     *port;
00147     int             baud;
00148     HANDLE          h;
00149
00150     /* require both arguments */
00151     if (argc != 3) {
00152         printf("%s <comport> <baud>\n",argv[0]);
00153         return 1;
00154     }
00155
00156     /* serial port argument */
00157     port = argv[1];
00158
00159     /* baud rate argument */
00160     status = sscanf(argv[2],"%d",&baud);
00161     if (status != 1) {
00162         printf("%s <comport> <baud>\n",argv[0]);
00163         printf("invalid <baud> : %s\n",argv[2]);
00164         return 1;
00165     }
00166
00168     h = openPort(port,baud);
00169     if (h == INVALID_HANDLE_VALUE) {
00170         printf("can't open port : %s\n",port);
00171         return 1;
00172     }
00173
00174     /* ---------------------------------------*/
00175     /*STEP 2 : initialize the nmea context    */
00176     /* ---------------------------------------*/
00177     status = nmeap_init(&nmea,(void *)&user_data);
00178     if (status != 0) {
00179         printf("nmeap_init %d\n",status);
00180         exit(1);
00181     }
00182
00183     /* ---------------------------------------*/
00184     /*STEP 3 : add standard GPGGA parser      */
00185     /* -------------------------------------- */
00186     status = nmeap_addParser(&nmea,"GPGGA",nmeap_gpgga,0,&gga);
00187     if (status != 0) {
00188         printf("nmeap_add %d\n",status);
00189         exit(1);
00190     }
00191
00192     /* ---------------------------------------*/
00193     /*STEP 4 : add standard GPRMC parser      */
00194     /* -------------------------------------- */
00195     status = nmeap_addParser(&nmea,"GPRMC",nmeap_gprmc,0,&rmc);
00196     if (status != 0) {
00197         printf("nmeap_add %d\n",status);
00198         exit(1);
00199     }
00200
00201     /* ---------------------------------------*/
00202     /*STEP 5 : process input until done       */
00203     /* -------------------------------------- */
00204     for(;;) {
00205         /* ---------------------------------------*/
00206         /*STEP 6 : get a byte at a time           */
00207         /* -------------------------------------- */
00208         ch = readPort(h);
00209         if (ch <= 0) {
00210             break;
00211         }
00212
00213         /* --------------------------------------- */
00214         /*STEP 7 : pass it to the parser           */
00215         /* status indicates whether a complete msg */
00216         /* arrived for this byte                   */
00217         /* NOTE : in addition to the return status */
00218         /* the message callout will be fired when  */
00219         /* a complete message is processed         */
00220         /* --------------------------------------- */
00221         status = nmeap_parse(&nmea,ch);
00222
00223         /* ---------------------------------------*/
00224         /*STEP 8 : process the return code        */
00225         /* -------------------------------------- */
00226         switch(status) {
00227         case NMEAP_GPGGA:
00228             /* GOT A GPGGA MESSAGE */
00229             printGps(&gga,&rmc);
00230             break;
00231         case NMEAP_GPRMC:
00232             /* GOT A GPRMC MESSAGE */
00233             printGps(&gga,&rmc);
00234             break;
00235         default:
00236             break;
00237         }
00238     }
00239
00240     /* close and quit */
00241     closePort(h);
00242
00243     return 0;
00244 }


BeRTOS: x917.c File Reference

  • sec
  • prng
x917.c File Reference

ANSI X9.17 PRNG implementation. More...

#include "x917.h"
#include <sec/util.h>
#include <drv/timer.h>
#include "hw/hw_timer.h"

Go to the source code of this file.

Detailed Description

ANSI X9.17 PRNG implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file x917.c.


BeRTOS: x917.c Source File

  • sec
  • prng
x917.c
Go to the documentation of this file.
00001
00038 #include "x917.h"
00039 #include <sec/util.h>
00040 #include <drv/timer.h>
00041 #include "hw/hw_timer.h"
00042
00043 static void x917_next(X917Context *ctx, BlockCipher *cipher, uint8_t *out)
00044 {
00045     const size_t blen = cipher_block_len(cipher);
00046
00047     struct
00048     {
00049         time_t t0;
00050         hptime_t t1;
00051         uint8_t padding[blen - sizeof(time_t) - sizeof(hptime_t)];
00052     } DT;
00053
00054     ASSERT(sizeof(DT) == blen);
00055
00056     memset(&DT, 0, sizeof(DT));
00057     DT.t0 = timer_clock();
00058     DT.t1 = timer_hw_hpread();
00059
00060     cipher_ecb_encrypt(cipher, &DT);
00061
00062     xor_block(out, (uint8_t*)&DT, ctx->state, blen);
00063     cipher_ecb_encrypt(cipher, out);
00064
00065     xor_block(ctx->state, (uint8_t*)&DT, out, blen);
00066     cipher_ecb_encrypt(cipher, ctx->state);
00067
00068     PURGE(DT);
00069 }
00070
00071
00072 static void x917_generate(PRNG *ctx_, uint8_t *data, size_t len)
00073 {
00074     X917Context *ctx = (X917Context *)ctx_;
00075     BlockCipher *cipher = AES128_stackinit();
00076
00077     const size_t blen = cipher_block_len(cipher);
00078     uint8_t temp[blen];
00079
00080     ASSERT(len);
00081     ASSERT(sizeof(ctx->state) >= blen);
00082     ASSERT(sizeof(ctx->key) >= cipher_key_len(cipher));
00083
00084     cipher_set_key(cipher, ctx->key);
00085
00086     while (len)
00087     {
00088         size_t L = MIN(blen, len);
00089         x917_next(ctx, cipher, temp);
00090         memcpy(data, temp, L);
00091         len -= L;
00092         data += L;
00093     }
00094 }
00095
00096 static void x917_reseed(PRNG *ctx_, const uint8_t *seed)
00097 {
00098     // The X9.17 standard does not specify reseeding. To avoid external
00099     // dependencies, we implement it this way:
00100     //   * Generate a new random block, xor it with the first part
00101     //     of the seed, and use the result as new seed.
00102     //   * Generate and throw away a block to update the state.
00103     X917Context *ctx = (X917Context *)ctx_;
00104     const size_t klen = sizeof(ctx->key);
00105     const size_t blen = sizeof(ctx->state);
00106
00107     if (!ctx->rng.seeded)
00108     {
00109         memcpy(ctx->key, seed, klen);
00110         memcpy(ctx->state, seed+klen, blen);
00111     }
00112     else
00113     {
00114         uint8_t buf[klen];
00115         x917_generate(ctx_, buf, klen);
00116
00117         xor_block(ctx->key, buf, seed, klen);
00118         xor_block(ctx->state, ctx->state, seed+klen, blen);
00119
00120         PURGE(buf);
00121     }
00122 }
00123
00124 /*********************************************************************/
00125
00126 void x917_init(X917Context *ctx)
00127 {
00128     ctx->rng.reseed = x917_reseed;
00129     ctx->rng.generate = x917_generate;
00130     ctx->rng.seed_len = sizeof(ctx->key) + sizeof(ctx->state);
00131     ctx->rng.seeded = 0;
00132 }


BeRTOS: x917.h File Reference

  • sec
  • prng
x917.h File Reference

ANSI X9.17 PRNG implementation. More...

#include <sec/prng.h>
#include <sec/cipher/aes.h>

Go to the source code of this file.

Detailed Description

ANSI X9.17 PRNG implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file x917.h.


BeRTOS: x917.h Source File

  • sec
  • prng
x917.h
Go to the documentation of this file.
00001
00038 #ifndef SEC_PRNG_X917_H
00039 #define SEC_PRNG_X917_H
00040
00041 #include <sec/prng.h>
00042 #include <sec/cipher/aes.h>
00043
00044 typedef struct X917Context
00045 {
00046     PRNG rng;
00047     uint8_t key[16];
00048     uint8_t state[16];
00049
00050 } X917Context;
00051
00052 void x917_init(X917Context *ctx);
00053
00054 #define x917_stackinit(...) \
00055     ({ X917Context *ctx = alloca(sizeof(X917Context)); x917_init(ctx, ##__VA_ARGS__); &ctx->rng; })
00056
00057
00058 #endif /* SEC_CSPRNG_X917_H */


BeRTOS: xmodem.c File Reference

  • net
Defines | Functions
xmodem.c File Reference

X-Modem serial transmission protocol (implementation) More...

#include "xmodem.h"
#include "cfg/cfg_xmodem.h"
#include <cfg/debug.h>
#include <cfg/log.h>
#include <algo/crc.h>
#include <string.h>

Go to the source code of this file.

Defines

#define | XM_BUFSIZE 128
128 bytes of block buffer
Protocol control codes
#define | XM_SOH 0x01
Start Of Header (128-byte block)
#define | XM_STX 0x02
Start Of Header (1024-byte block)
#define | XM_EOT 0x04
End Of Transmission.
#define | XM_ACK 0x06
Acknowledge block.
#define | XM_NAK 0x15
Negative Acknowledge.
#define | XM_C 0x43
Request CRC-16 transmission.
#define | XM_CAN 0x18
CANcel transmission.

Functions

bool | xmodem_recv (KFile *ch, KFile *fd)
Receive a file using the XModem protocol.
bool | xmodem_send (KFile *ch, KFile *fd)
Transmit some data using the XModem protocol.

Detailed Description

X-Modem serial transmission protocol (implementation)

Supports the CRC-16 and 1K-blocks variants of the standard.

See also:
ymodem.txt for the protocol description.
Author:
Bernie Innocenti <bernie@codewiz.org>
Francesco Sacchi <batt@develer.com>

Definition in file xmodem.c.

Function Documentation

bool xmodem_recv | ( | KFile * | ch,
 |  | KFile * | fd
 | ) |  |

Receive a file using the XModem protocol.

Parameters:
ch | Channel to use for transfer
fd | Destination file
Note:
This function allocates a large amount of stack (
See also:
XM_BUFSIZE).

Definition at line 90 of file xmodem.c.

bool xmodem_send | ( | KFile * | ch,
 |  | KFile * | fd
 | ) |  |

Transmit some data using the XModem protocol.

Parameters:
ch | Channel to use for transfer
fd | Source file
Note:
This function allocates a large amount of stack for the XModem transfer buffer (
See also:
XM_BUFSIZE).

Definition at line 316 of file xmodem.c.


BeRTOS: xmodem.c Source File

  • net
xmodem.c
Go to the documentation of this file.
00001
00046 #include "xmodem.h"
00047
00048 #include "cfg/cfg_xmodem.h"
00049
00050 #include <cfg/debug.h>
00051 // Define log settings for cfg/log.h
00052 #define LOG_LEVEL    CONFIG_XMODEM_LOG_LEVEL
00053 #define LOG_FORMAT   CONFIG_XMODEM_LOG_FORMAT
00054 #include <cfg/log.h>
00055
00056
00057 #include <algo/crc.h>
00058
00059 #include <string.h> /* for memset() */
00060
00065 #define XM_SOH  0x01
00066 #define XM_STX  0x02
00067 #define XM_EOT  0x04
00068 #define XM_ACK  0x06
00069 #define XM_NAK  0x15
00070 #define XM_C    0x43
00071 #define XM_CAN  0x18
00072 /*\}*/
00073
00074 #if CONFIG_XMODEM_1KCRC == 1
00075     #define XM_BUFSIZE       1024
00076 #else
00077     #define XM_BUFSIZE       128
00078 #endif
00079
00080
00081 #if CONFIG_XMODEM_RECV
00082
00090 bool xmodem_recv(KFile *ch, KFile *fd)
00091 {
00092     char block_buffer[XM_BUFSIZE]; /* Buffer to hold a block of data */
00093     int c, i, blocksize;
00094     int blocknr = 0, last_block_done = 0, retries = 0;
00095     char *buf;
00096     uint8_t checksum;
00097     uint16_t crc;
00098     bool purge = false;
00099     bool usecrc = true;
00100
00101
00102     LOG_INFO("Starting Transfer...\n");
00103     purge = true;
00104     kfile_clearerr(ch);
00105
00106     /* Send initial NAK to start transmission */
00107     for(;;)
00108     {
00109         if (XMODEM_CHECK_ABORT)
00110         {
00111             kfile_putc(XM_CAN, ch);
00112             kfile_putc(XM_CAN, ch);
00113             LOG_INFO("Transfer aborted\n");
00114             return false;
00115         }
00116
00117         /*
00118          * Discard incoming input until a timeout occurs, then send
00119          * a NAK to the transmitter.
00120          */
00121         if (purge)
00122         {
00123             purge = false;
00124
00125             if (kfile_error(ch))
00126             {
00127                 LOG_ERR("Retries %d\n", retries);
00128             }
00129
00130             kfile_resync(ch, 200);
00131             retries++;
00132
00133             if (retries >= CONFIG_XMODEM_MAXRETRIES)
00134             {
00135                 kfile_putc(XM_CAN, ch);
00136                 kfile_putc(XM_CAN, ch);
00137                 LOG_INFO("Transfer aborted\n");
00138                 return false;
00139             }
00140
00141             /* Transmission start? */
00142             if (blocknr == 0)
00143             {
00144                 if (retries < CONFIG_XMODEM_MAXCRCRETRIES)
00145                 {
00146                     LOG_INFO("Request Tx (CRC)\n");
00147                     kfile_putc(XM_C, ch);
00148                 }
00149                 else
00150                 {
00151                     /* Give up with CRC and fall back to checksum */
00152                     usecrc = false;
00153                     LOG_INFO("Request Tx (BCC)\n");
00154                     kfile_putc(XM_NAK, ch);
00155                 }
00156             }
00157             else
00158                 kfile_putc(XM_NAK, ch);
00159         }
00160
00161         switch (kfile_getc(ch))
00162         {
00163         #if XM_BUFSIZE >= 1024
00164         case XM_STX:  /* Start of header (1024-byte block) */
00165             blocksize = 1024;
00166             goto getblock;
00167         #endif
00168
00169         case XM_SOH:  /* Start of header (128-byte block) */
00170             blocksize = 128;
00171             /* Needed to avoid warning if XM_BUFSIZE < 1024 */
00172
00173         getblock:
00174             /* Get block number */
00175             c = kfile_getc(ch);
00176
00177             /* Check complemented block number */
00178             if ((~c & 0xff) != kfile_getc(ch))
00179             {
00180                 LOG_WARN("Bad blk (%d)\n", c);
00181                 purge = true;
00182                 break;
00183             }
00184
00185             /* Determine which block is being sent */
00186             if (c == (blocknr & 0xff))
00187             {
00188                 /* Last block repeated */
00189                 LOG_INFO("Repeat blk %d\n", blocknr);
00190             }
00191             else if (c == ((blocknr + 1) & 0xff))
00192             {
00193                 /* Next block */
00194                 LOG_INFO("Recv blk %d\n", ++blocknr);
00195             }
00196             else
00197             {
00198                 /* Sync lost */
00199                 LOG_WARN("Sync lost (%d/%d)\n", c, blocknr);
00200                 purge = true;
00201                 break;
00202             }
00203
00204             buf = block_buffer; /* Reset pointer to start of buffer */
00205             checksum = 0;
00206             crc = 0;
00207             for (i = 0; i < blocksize; i++)
00208             {
00209                 if ((c = kfile_getc(ch)) == EOF)
00210                 {
00211                     purge = true;
00212                     break;
00213                 }
00214
00215                 /* Store in buffer */
00216                 *buf++ = (char)c;
00217
00218                 /* Calculate block checksum or CRC */
00219                 if (usecrc)
00220                     crc = UPDCRC16(c, crc);
00221                 else
00222                     checksum += (char)c;
00223             }
00224
00225             if (purge)
00226                 break;
00227
00228             /* Get the checksum byte or the CRC-16 MSB */
00229             if ((c = kfile_getc(ch)) == EOF)
00230             {
00231                 purge = true;
00232                 break;
00233             }
00234
00235             if (usecrc)
00236             {
00237                 crc = UPDCRC16(c, crc);
00238
00239                 /* Get CRC-16 LSB */
00240                 if ((c = kfile_getc(ch)) == EOF)
00241                 {
00242                     purge = true;
00243                     break;
00244                 }
00245
00246                 crc = UPDCRC16(c, crc);
00247
00248                 if (crc)
00249                 {
00250                     LOG_ERR("Bad CRC: %04x\n", crc);
00251                     purge = true;
00252                     break;
00253                 }
00254             }
00255             /* Compare the checksum */
00256             else if (c != checksum)
00257             {
00258                 LOG_ERR("Bad sum: %04x/%04x\n", checksum, c);
00259                 purge = true;
00260                 break;
00261             }
00262
00263             /*
00264              * Avoid flushing the same block twice.
00265              * This could happen when the sender does not receive our
00266              * acknowledge and resends the same block.
00267              */
00268             if (last_block_done < blocknr)
00269             {
00270                 /* Call user function to flush the buffer */
00271                 if (kfile_write(fd, block_buffer, blocksize) == (size_t)blocksize)
00272                 {
00273                     /* Acknowledge block and clear error counter */
00274                     kfile_putc(XM_ACK, ch);
00275                     retries = 0;
00276                     last_block_done = blocknr;
00277                 }
00278                 else
00279                 {
00280                     /* User callback failed: abort transfer immediately */
00281                     retries = CONFIG_XMODEM_MAXRETRIES;
00282                     purge = true;
00283                 }
00284             }
00285             break;
00286
00287         case XM_EOT:    /* End of transmission */
00288             kfile_putc(XM_ACK, ch);
00289             LOG_INFO("Transfer completed\n");
00290             return true;
00291
00292         case EOF: /* Timeout or serial error */
00293             purge = true;
00294             break;
00295
00296         default:
00297             LOG_INFO("Skipping garbage\n");
00298             purge = true;
00299             break;
00300         }
00301     } /* End forever */
00302 }
00303 #endif
00304
00305
00306 #if CONFIG_XMODEM_SEND
00307
00316 bool xmodem_send(KFile *ch, KFile *fd)
00317 {
00318     char block_buffer[XM_BUFSIZE]; /* Buffer to hold a block of data */
00319     size_t size = -1;
00320     int blocknr = 1, retries = 0, c, i;
00321     bool proceed, usecrc = false;
00322     uint16_t crc;
00323     uint8_t sum;
00324
00325     /*
00326      * Reading a block can be very slow, so we read the first block early
00327      * to avoid receiving double XM_C char.
00328      * This could happen if we check for XM_C and then read the block, giving
00329      * the receiving device time to send another XM_C char misinterpretating
00330      * the blocks sent.
00331      */
00332     size = kfile_read(fd, block_buffer, XM_BUFSIZE);
00333
00334     kfile_clearerr(ch);
00335     LOG_INFO("Wait remote host\n");
00336
00337     for(;;)
00338     {
00339         proceed = false;
00340         do
00341         {
00342             if (XMODEM_CHECK_ABORT)
00343                 return false;
00344
00345             switch (c = kfile_getc(ch))
00346             {
00347             case XM_NAK:
00348                 LOG_INFO("Resend blk %d\n", blocknr);
00349                 proceed = true;
00350                 break;
00351
00352             case XM_C:
00353                 if (c == XM_C)
00354                 {
00355                     LOG_INFO("Tx start (CRC)\n");
00356                     usecrc = true;
00357                 }
00358                 else
00359                 {
00360                     LOG_INFO("Tx start (BCC)\n");
00361                 }
00362
00363                 proceed = true;
00364                 break;
00365
00366             case XM_ACK:
00367                 /* End of transfer? */
00368                 if (!size)
00369                     return true;
00370
00371                 /* Call user function to read in one block */
00372                 size = kfile_read(fd, block_buffer, XM_BUFSIZE);
00373                 LOG_INFO("Send blk %d\n", blocknr);
00374                 blocknr++;
00375                 retries = 0;
00376                 proceed = true;
00377                 break;
00378
00379             case EOF:
00380                 kfile_clearerr(ch);
00381                 retries++;
00382                 LOG_INFO("Retries %d\n", retries);
00383                 if (retries <= CONFIG_XMODEM_MAXRETRIES)
00384                     break;
00385                 /* falling through! */
00386
00387             case XM_CAN:
00388                 LOG_INFO("Transfer aborted\n");
00389                 return false;
00390
00391             default:
00392                 LOG_INFO("Skipping garbage\n");
00393                 break;
00394             }
00395         }
00396         while (!proceed);
00397
00398         if (!size)
00399         {
00400             kfile_putc(XM_EOT, ch);
00401             continue;
00402         }
00403
00404         /* Pad block with 0xFF if it's partially full */
00405         memset(block_buffer + size, 0xFF, XM_BUFSIZE - size);
00406
00407         /* Send block header (STX, blocknr, ~blocknr) */
00408         #if XM_BUFSIZE == 128
00409             kfile_putc(XM_SOH, ch);
00410         #else
00411             kfile_putc(XM_STX, ch);
00412         #endif
00413         kfile_putc(blocknr & 0xFF, ch);
00414         kfile_putc(~blocknr & 0xFF, ch);
00415
00416         /* Send block and compute its CRC/checksum */
00417         sum = 0;
00418         crc = 0;
00419         for (i = 0; i < XM_BUFSIZE; i++)
00420         {
00421             kfile_putc(block_buffer[i], ch);
00422             crc = UPDCRC16(block_buffer[i], crc);
00423             sum += block_buffer[i];
00424         }
00425
00426         /* Send CRC/Checksum */
00427         if (usecrc)
00428         {
00429             kfile_putc(crc >> 8, ch);
00430             kfile_putc(crc & 0xFF, ch);
00431         }
00432         else
00433             kfile_putc(sum, ch);
00434     }
00435 }
00436 #endif


BeRTOS: xmodem.h File Reference

  • net
Functions
xmodem.h File Reference

X-Modem serial transmission protocol. More...

#include <cfg/compiler.h>
#include <io/kfile.h>

Go to the source code of this file.

Defines

#define | XMODEM_CHECK_ABORT (false)
Called to know if we want to abort data tranfer.

Functions

bool | xmodem_recv (KFile *ch, KFile *fd)
Receive a file using the XModem protocol.
bool | xmodem_send (KFile *ch, KFile *fd)
Transmit some data using the XModem protocol.

Detailed Description

X-Modem serial transmission protocol.

Author:
Bernie Innocenti <bernie@codewiz.org>
Francesco Sacchi <batt@develer.com>

Definition in file xmodem.h.

Define Documentation

#define XMODEM_CHECK_ABORT (false)

Called to know if we want to abort data tranfer.

Redefine to whatever you need.

Definition at line 56 of file xmodem.h.

Function Documentation

bool xmodem_recv | ( | KFile * | ch,
 |  | KFile * | fd
 | ) |  |

Receive a file using the XModem protocol.

Parameters:
ch | Channel to use for transfer
fd | Destination file
Note:
This function allocates a large amount of stack (
See also:
XM_BUFSIZE).

Definition at line 90 of file xmodem.c.

bool xmodem_send | ( | KFile * | ch,
 |  | KFile * | fd
 | ) |  |

Transmit some data using the XModem protocol.

Parameters:
ch | Channel to use for transfer
fd | Source file
Note:
This function allocates a large amount of stack for the XModem transfer buffer (
See also:
XM_BUFSIZE).

Definition at line 316 of file xmodem.c.


BeRTOS: xmodem.h Source File

  • net
xmodem.h
Go to the documentation of this file.
00001
00044 #ifndef NET_XMODEM_H
00045 #define NET_XMODEM_H
00046
00047 #include <cfg/compiler.h>
00048 #include <io/kfile.h>
00049
00055 #ifndef XMODEM_CHECK_ABORT
00056 #define XMODEM_CHECK_ABORT (false)
00057 #endif
00058 /*\}*/
00059
00060 bool xmodem_recv(KFile *ch, KFile *fd);
00061 bool xmodem_send(KFile *ch, KFile *fd);
00062
00063 #endif /* NET_XMODEM_H */


BeRTOS: yarrow.c File Reference

  • sec
  • prng
yarrow.c File Reference

Yarrow implementation. More...

#include "yarrow.h"
#include <sec/hash/sha1.h>
#include <cfg/macros.h>
#include <string.h>

Go to the source code of this file.

Detailed Description

Yarrow implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file yarrow.c.


BeRTOS: yarrow.c Source File

  • sec
  • prng
yarrow.c
Go to the documentation of this file.
00001
00038 #include "yarrow.h"
00039 #include <sec/hash/sha1.h>
00040 #include <cfg/macros.h>
00041 #include <string.h>
00042
00043 #define CONFIG_YARROW_GENERATOR_GATE             10
00044
00045 static void yarrow_generate(PRNG *ctx_, uint8_t *data, size_t len)
00046 {
00047     YarrowContext *ctx = (YarrowContext *)ctx_;
00048     BlockCipher *cipher = 0;
00049
00050     ASSERT(len != 0);
00051
00052     do
00053     {
00054         if (ctx->lastidx == sizeof(ctx->last))
00055         {
00056             if (!cipher)
00057             {
00058                 cipher = AES128_stackinit();
00059                 ASSERT(sizeof(ctx->counter) == cipher_block_len(cipher));
00060                 ASSERT(sizeof(ctx->curkey) == cipher_key_len(cipher));
00061
00062                 cipher_set_key(cipher, ctx->curkey);
00063                 cipher_ctr_begin(cipher, ctx->counter);
00064             }
00065
00066             cipher_ctr_step(cipher, ctx->last);
00067
00068             if (ctx->curkey_gencount == CONFIG_YARROW_GENERATOR_GATE)
00069             {
00070                 ASSERT(cipher_block_len(cipher) == cipher_key_len(cipher));
00071                 cipher_set_key(cipher, ctx->last);
00072                 ctx->curkey_gencount = 0;
00073                 continue;
00074             }
00075
00076             ctx->lastidx = 0;
00077             ctx->curkey_gencount++;
00078         }
00079
00080         int n = MIN(len, 16U-ctx->lastidx);
00081         memcpy(data, ctx->last+ctx->lastidx, n);
00082         data += n;
00083         len -= n;
00084         ctx->lastidx += n;
00085     } while (len);
00086 }
00087
00088 static void yarrow_reseed(PRNG *ctx_, const uint8_t *seed)
00089 {
00090     YarrowContext *ctx = (YarrowContext *)ctx_;
00091     Hash *h = SHA1_stackinit();
00092
00093     hash_begin(h);
00094     hash_update(h, seed, ctx->prng.seed_len);
00095     hash_update(h, ctx->curkey, sizeof(ctx->curkey));
00096     memcpy(ctx->curkey, hash_final(h), sizeof(ctx->curkey));
00097
00098     // Reset the counter for the sequence
00099     memset(ctx->counter, 0, sizeof(ctx->counter));
00100 }
00101
00102
00103 /*********************************************************************/
00104
00105 void yarrow_init(YarrowContext *ctx)
00106 {
00107     ctx->prng.reseed = yarrow_reseed;
00108     ctx->prng.generate = yarrow_generate;
00109     ctx->prng.seed_len = 16;
00110     ctx->prng.seeded = 0;
00111
00112     ctx->lastidx = sizeof(ctx->last);
00113     ctx->curkey_gencount = 0;
00114     memset(ctx->curkey, 0, sizeof(ctx->curkey));
00115
00116     ASSERT(sizeof(ctx->counter) == sizeof(ctx->last));
00117 }


BeRTOS: yarrow.h File Reference

  • sec
  • prng
yarrow.h File Reference

Yarrow implementation. More...

#include <sec/prng.h>
#include <sec/cipher/aes.h>

Go to the source code of this file.

Detailed Description

Yarrow implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file yarrow.h.


BeRTOS: yarrow.h Source File

  • sec
  • prng
yarrow.h
Go to the documentation of this file.
00001
00038 #ifndef SEC_PRNG_YARROW_H
00039 #define SEC_PRNG_YARROW_H
00040
00041 #include <sec/prng.h>
00042 #include <sec/cipher/aes.h>
00043
00044 typedef struct YarrowContext
00045 {
00046     PRNG prng;
00047
00048     uint8_t counter[16];
00049     uint8_t curkey[16];
00050     uint8_t last[16];
00051     uint8_t curkey_gencount;
00052     uint8_t lastidx;
00053 } YarrowContext;
00054
00055 void yarrow_init(YarrowContext *ctx);
00056
00057 #define yarrow_stackinit(...) \
00058     ({ YarrowContext *ctx = alloca(sizeof(YarrowContext)); yarrow_init(ctx, ##__VA_ARGS__); &ctx->prng; })
00059
00060 #endif /* SEC_PRNG_YARROW_H */


BeRTOS: yarrow_pool.c File Reference

  • sec
  • entropy
yarrow_pool.c File Reference

Yarrow entropy pool. More...

#include "yarrow_pool.h"
#include <cfg/macros.h>
#include <sec/hash/sha1.h>
#include <sec/util.h>
#include <string.h>

Go to the source code of this file.

Detailed Description

Yarrow entropy pool.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file yarrow_pool.c.


BeRTOS: yarrow_pool.c Source File

  • sec
  • entropy
yarrow_pool.c
Go to the documentation of this file.
00001
00038 #include "yarrow_pool.h"
00039 #include <cfg/macros.h>
00040 #include <sec/hash/sha1.h>
00041 #include <sec/util.h>
00042 #include <string.h>
00043
00044 #define CONFIG_YARROW_POOL_FAST_RESEEDING_THRESHOLD   100
00045 #define CONFIG_YARROW_POOL_SLOW_RESEEDING_THRESHOLD   160
00046 #define CONFIG_YARROW_POOL_MAX_ENTROPY_DENSITY        50   // percent
00047 #define CONFIG_YARROW_POOL_RESEED_ITERATIONS          80
00048
00049 static void yarrow_fast_reseed(YarrowPoolContext *ctx, uint8_t *out, size_t len)
00050 {
00051     Hash *h = &ctx->pools[0].hash.h;
00052     size_t hlen = hash_digest_len(h);
00053
00054     uint8_t v0[hlen];
00055     memcpy(v0, hash_final(h), hlen);
00056
00057     uint8_t vcur[hlen];
00058     memcpy(vcur, v0, hlen);
00059
00060     for (uint32_t i=1;i<=CONFIG_YARROW_POOL_RESEED_ITERATIONS; ++i) {
00061         hash_begin(h);
00062         hash_update(h, vcur, hlen);
00063         hash_update(h, v0, hlen);
00064         hash_update(h, &i, 4);
00065         memcpy(vcur, hash_final(h), hlen);
00066     }
00067
00068
00069     // FIXME: yarrow explains how to expand the hash digest if it's
00070     // smaller than the output size. This is not the case for now,
00071     // so we it's not implemented here.
00072     ASSERT(len < hlen);
00073     memcpy(out, vcur, len);
00074
00075     // Reinitialize the fast pool
00076     hash_begin(h);
00077     for (int i=0; i<CONFIG_ENTROPY_NUM_SOURCES; ++i)
00078         ctx->pools[0].entropy[i] = 0;
00079
00080     PURGE(v0);
00081     PURGE(vcur);
00082 }
00083
00084 static void yarrow_slow_reseed(YarrowPoolContext *ctx, uint8_t *out, size_t len)
00085 {
00086     uint8_t *data = hash_final(&ctx->pools[1].hash.h);
00087
00088     hash_update(&ctx->pools[0].hash.h, data, hash_digest_len(&ctx->pools[1].hash.h));
00089     yarrow_fast_reseed(ctx, out, len);
00090
00091     // Reinitialize the slow pool
00092     hash_begin(&ctx->pools[1].hash.h);
00093     for (int i=0; i<CONFIG_ENTROPY_NUM_SOURCES; ++i)
00094         ctx->pools[1].entropy[i] = 0;
00095 }
00096
00097 static void yarrow_add_entropy(EntropyPool *ctx_, int source_idx, const uint8_t *data, size_t len, int entropy)
00098 {
00099     YarrowPoolContext *ctx = (YarrowPoolContext *)ctx_;
00100
00101     ASSERT(source_idx < CONFIG_ENTROPY_NUM_SOURCES);
00102
00103     int curpool = ctx->sources[source_idx].curpool;
00104     ctx->sources[source_idx].curpool = 1 - ctx->sources[source_idx].curpool;
00105
00106     // TODO: Yarrow also describes a statistical entropy estimator
00107     // Currently, we just use the provided entropy and the maximum
00108     // density.
00109     entropy = MIN((size_t)entropy, len*8*100/CONFIG_YARROW_POOL_MAX_ENTROPY_DENSITY);
00110
00111     hash_update(&ctx->pools[curpool].hash.h, data, len);
00112     ctx->pools[curpool].entropy[source_idx] += entropy;
00113 }
00114
00115 static bool yarrow_fast_reseeding_ready(YarrowPoolContext *ctx)
00116 {
00117     for (int i=0; i<CONFIG_ENTROPY_NUM_SOURCES; ++i)
00118         if (ctx->pools[0].entropy[i] >=
00119                 CONFIG_YARROW_POOL_FAST_RESEEDING_THRESHOLD)
00120             return 1;
00121     return 0;
00122 }
00123
00124 static bool yarrow_slow_reseeding_ready(YarrowPoolContext *ctx)
00125 {
00126     int count = 0;
00127
00128     for (int i=0; i<CONFIG_ENTROPY_NUM_SOURCES; ++i)
00129         if (ctx->pools[1].entropy[i] >=
00130                 CONFIG_YARROW_POOL_SLOW_RESEEDING_THRESHOLD) {
00131             ++count;
00132             if (count == 2)
00133                 return 1;
00134         }
00135
00136     return 0;
00137 }
00138
00139 static bool yarrow_reseeding_ready(EntropyPool *ctx_)
00140 {
00141     YarrowPoolContext *ctx = (YarrowPoolContext *)ctx_;
00142     return yarrow_fast_reseeding_ready(ctx) || yarrow_slow_reseeding_ready(ctx);
00143 }
00144
00145 static void yarrow_reseed(EntropyPool *ctx_, uint8_t *out, size_t len)
00146 {
00147     YarrowPoolContext *ctx = (YarrowPoolContext *)ctx_;
00148
00149     if (yarrow_slow_reseeding_ready(ctx))
00150         yarrow_slow_reseed(ctx, out, len);
00151     else {
00152         ASSERT(yarrow_fast_reseeding_ready(ctx));
00153         yarrow_fast_reseed(ctx, out, len);
00154     }
00155 }
00156
00157 /**********************************************************************/
00158
00159 void yarrowpool_init(YarrowPoolContext *ctx)
00160 {
00161     ctx->e.add_entropy = yarrow_add_entropy;
00162     ctx->e.seeding_ready = yarrow_reseeding_ready;
00163     ctx->e.make_seed = yarrow_reseed;
00164
00165     for (int i=0; i<2; ++i) {
00166         memset(ctx->pools[i].entropy, 0, sizeof(ctx->pools[i].entropy));
00167         SHA1_init(&ctx->pools[i].hash);
00168         hash_begin(&ctx->pools[i].hash.h);
00169     }
00170
00171     memset(ctx->sources, 0, sizeof(ctx->sources));
00172 }


BeRTOS: yarrow_pool.h File Reference

  • sec
  • entropy
yarrow_pool.h File Reference

Yarrow pool implementation. More...

#include <sec/entropy.h>
#include <sec/hash/sha1.h>

Go to the source code of this file.

Detailed Description

Yarrow pool implementation.

Author:
Giovanni Bajo <rasky@develer.com>

Definition in file yarrow_pool.h.


BeRTOS: yarrow_pool.h Source File

  • sec
  • entropy
yarrow_pool.h
Go to the documentation of this file.
00001
00038 #ifndef SEC_ENTROPY_YARROW_POOL_H
00039 #define SEC_ENTROPY_YARROW_POOL_H
00040
00041 #include <sec/entropy.h>
00042 #include <sec/hash/sha1.h>
00043
00044 typedef struct
00045 {
00046     EntropyPool e;
00047
00048     struct YarrowPool
00049     {
00050         SHA1_Context hash;
00051         int entropy[CONFIG_ENTROPY_NUM_SOURCES];
00052     } pools[2];
00053
00054     struct YarrowSources
00055     {
00056         int curpool;
00057     } sources[CONFIG_ENTROPY_NUM_SOURCES];
00058
00059 } YarrowPoolContext;
00060
00061 void yarrowpool_init(YarrowPoolContext *ctx);
00062
00063 #endif /* SEC_ENTROPY_YARROW_POOL_H */