Functions | |
enum YepStatus | yepLibrary_GetCpuIsaFeatures (Yep64u *isaFeatures) |
Returns information about the supported ISA extensions (excluding SIMD extensions) More... | |
enum YepStatus | yepLibrary_GetCpuSimdFeatures (Yep64u *simdFeatures) |
Returns information about the supported SIMD extensions. More... | |
enum YepStatus | yepLibrary_GetCpuSystemFeatures (Yep64u *systemFeatures) |
Returns information about processor features other than ISA extensions, and OS features related to CPU. More... | |
Common CPU and System Features | |
| |
#define | YepSystemFeatureCycleCounter 0x0000000000000001ull |
The processor has a built-in cycle counter, and the operating system provides a way to access it. | |
#define | YepSystemFeatureCycleCounter64Bit 0x0000000000000002ull |
The processor has a 64-bit cycle counter, or the operating system provides an abstraction of a 64-bit cycle counter. | |
#define | YepSystemFeatureAddressSpace64Bit 0x0000000000000004ull |
The processor and the operating system allows to use 64-bit pointers. | |
#define | YepSystemFeatureGPRegisters64Bit 0x0000000000000008ull |
The processor and the operating system allows to do 64-bit arithmetical operations on general-purpose registers. | |
#define | YepSystemFeatureMisalignedAccess 0x0000000000000010ull |
The processor and the operating system allows misaligned memory reads and writes. | |
#define | YepSystemFeatureSingleThreaded 0x0000000000000020ull |
The processor or the operating system support at most one hardware thread. | |
x86 and x86-64 ISA Extensions | |
| |
#define | YepX86IsaFeatureFPU 0x0000000000000001ull |
x87 FPU integrated on chip. | |
#define | YepX86IsaFeatureCpuid 0x0000000000000002ull |
x87 CPUID instruction. | |
#define | YepX86IsaFeatureRdtsc 0x0000000000000004ull |
RDTSC instruction. | |
#define | YepX86IsaFeatureCMOV 0x0000000000000008ull |
CMOV, FCMOV, and FCOMI/FUCOMI instructions. | |
#define | YepX86IsaFeatureSYSENTER 0x0000000000000010ull |
SYSENTER and SYSEXIT instructions. | |
#define | YepX86IsaFeatureSYSCALL 0x0000000000000020ull |
SYSCALL and SYSRET instructions. | |
#define | YepX86IsaFeatureMSR 0x0000000000000040ull |
RDMSR and WRMSR instructions. | |
#define | YepX86IsaFeatureClflush 0x0000000000000080ull |
CLFLUSH instruction. | |
#define | YepX86IsaFeatureMONITOR 0x0000000000000100ull |
MONITOR and MWAIT instructions. | |
#define | YepX86IsaFeatureFXSAVE 0x0000000000000200ull |
FXSAVE and FXRSTOR instructions. | |
#define | YepX86IsaFeatureXSAVE 0x0000000000000400ull |
XSAVE, XRSTOR, XGETBV, and XSETBV instructions. | |
#define | YepX86IsaFeatureCmpxchg8b 0x0000000000000800ull |
CMPXCHG8B instruction. | |
#define | YepX86IsaFeatureCmpxchg16b 0x0000000000001000ull |
CMPXCHG16B instruction. | |
#define | YepX86IsaFeatureX64 0x0000000000002000ull |
Support for 64-bit mode. | |
#define | YepX86IsaFeatureLahfSahf64 0x0000000000004000ull |
Support for LAHF and SAHF instructions in 64-bit mode. | |
#define | YepX86IsaFeatureFsGsBase 0x0000000000008000ull |
RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE instructions. | |
#define | YepX86IsaFeatureMovbe 0x0000000000010000ull |
MOVBE instruction. | |
#define | YepX86IsaFeaturePopcnt 0x0000000000020000ull |
POPCNT instruction. | |
#define | YepX86IsaFeatureLzcnt 0x0000000000040000ull |
LZCNT instruction. | |
#define | YepX86IsaFeatureBMI 0x0000000000080000ull |
BMI instruction set. | |
#define | YepX86IsaFeatureBMI2 0x0000000000100000ull |
BMI 2 instruction set. | |
#define | YepX86IsaFeatureTBM 0x0000000000200000ull |
TBM instruction set. | |
#define | YepX86IsaFeatureRdrand 0x0000000000400000ull |
RDRAND instruction. | |
#define | YepX86IsaFeatureACE 0x0000000000800000ull |
Padlock Advanced Cryptography Engine on chip. | |
#define | YepX86IsaFeatureACE2 0x0000000001000000ull |
Padlock Advanced Cryptography Engine 2 on chip. | |
#define | YepX86IsaFeatureRNG 0x0000000002000000ull |
Padlock Random Number Generator on chip. | |
#define | YepX86IsaFeaturePHE 0x0000000004000000ull |
Padlock Hash Engine on chip. | |
#define | YepX86IsaFeaturePMM 0x0000000008000000ull |
Padlock Montgomery Multiplier on chip. | |
#define | YepX86IsaFeatureAES 0x0000000010000000ull |
AES instruction set. | |
#define | YepX86IsaFeaturePclmulqdq 0x0000000020000000ull |
PCLMULQDQ instruction. | |
#define | YepX86IsaFeatureRdtscp 0x0000000040000000ull |
RDTSCP instruction. | |
#define | YepX86IsaFeatureLWP 0x0000000080000000ull |
Lightweight Profiling extension. | |
#define | YepX86IsaFeatureHLE 0x0000000100000000ull |
Hardware Lock Elision extension. | |
#define | YepX86IsaFeatureRTM 0x0000000200000000ull |
Restricted Transactional Memory extension. | |
#define | YepX86IsaFeatureXtest 0x0000000400000000ull |
XTEST instruction. | |
#define | YepX86IsaFeatureRdseed 0x0000000800000000ull |
RDSEED instruction. | |
#define | YepX86IsaFeatureADX 0x0000001000000000ull |
ADCX and ADOX instructions. | |
x86 and x86-64 SIMD Extensions | |
| |
#define | YepX86SimdFeatureMMX 0x0000000000000001ull |
MMX instruction set. More... | |
#define | YepX86SimdFeatureMMXPlus 0x0000000000000002ull |
MMX+ instruction set. More... | |
#define | YepX86SimdFeatureEMMX 0x0000000000000004ull |
EMMX instruction set. | |
#define | YepX86SimdFeature3dnow 0x0000000000000008ull |
3dnow! instruction set. More... | |
#define | YepX86SimdFeature3dnowPlus 0x0000000000000010ull |
3dnow!+ instruction set. More... | |
#define | YepX86SimdFeature3dnowPrefetch 0x0000000000000020ull |
3dnow! prefetch instructions. | |
#define | YepX86SimdFeature3dnowGeode 0x0000000000000040ull |
Geode 3dnow! instructions. | |
#define | YepX86SimdFeatureSSE 0x0000000000000080ull |
SSE instruction set. More... | |
#define | YepX86SimdFeatureSSE2 0x0000000000000100ull |
SSE 2 instruction set. More... | |
#define | YepX86SimdFeatureSSE3 0x0000000000000200ull |
SSE 3 instruction set. More... | |
#define | YepX86SimdFeatureSSSE3 0x0000000000000400ull |
SSSE 3 instruction set. More... | |
#define | YepX86SimdFeatureSSE4_1 0x0000000000000800ull |
SSE 4.1 instruction set. More... | |
#define | YepX86SimdFeatureSSE4_2 0x0000000000001000ull |
SSE 4.2 instruction set. More... | |
#define | YepX86SimdFeatureSSE4A 0x0000000000002000ull |
SSE 4A instruction set. More... | |
#define | YepX86SimdFeatureAVX 0x0000000000004000ull |
AVX instruction set. More... | |
#define | YepX86SimdFeatureAVX2 0x0000000000008000ull |
AVX 2 instruction set. More... | |
#define | YepX86SimdFeatureXOP 0x0000000000010000ull |
XOP instruction set. More... | |
#define | YepX86SimdFeatureF16C 0x0000000000020000ull |
F16C instruction set. More... | |
#define | YepX86SimdFeatureFMA3 0x0000000000040000ull |
FMA3 instruction set. More... | |
#define | YepX86SimdFeatureFMA4 0x0000000000080000ull |
FMA4 instruction set. More... | |
#define | YepX86SimdFeatureKNF 0x0000000000100000ull |
Knights Ferry (aka Larrabee) instruction set. | |
#define | YepX86SimdFeatureKNC 0x0000000000200000ull |
Knights Corner (aka Xeon Phi) instruction set. More... | |
x86 and x86-64 CPU and System Features | |
| |
#define | YepX86SystemFeatureFPU 0x0000000100000000ull |
The CPU has x87 FPU registers, and the operating systems preserves them during context switch. | |
#define | YepX86SystemFeatureSSE 0x0000000200000000ull |
The CPU has SSE registers, and the operating systems preserves them during context switch. | |
#define | YepX86SystemFeatureAVX 0x0000000400000000ull |
The CPU has AVX registers, and the operating systems preserves them during context switch. | |
#define | YepX86SystemFeatureMisalignedSSE 0x0000000800000000ull |
Processor allows to use misaligned memory operands in SSE instructions other than loads and stores. | |
#define | YepX86SystemFeatureACE 0x0000001000000000ull |
Processor and the operating system support the Padlock Advanced Cryptography Engine. | |
#define | YepX86SystemFeatureACE2 0x0000002000000000ull |
Processor and the operating system support the Padlock Advanced Cryptography Engine 2. | |
#define | YepX86SystemFeatureRNG 0x0000004000000000ull |
Processor and the operating system support the Padlock Random Number Generator. | |
#define | YepX86SystemFeaturePHE 0x0000008000000000ull |
Processor and the operating system support the Padlock Hash Engine. | |
#define | YepX86SystemFeaturePMM 0x0000010000000000ull |
Processor and the operating system support the Padlock Montgomery Multiplier. | |
#define | YepX86SystemFeatureMIC 0x0000020000000000ull |
The CPU has MIC registers, and the operating system preserves them during context switch. | |
IA64 ISA Extensions | |
| |
#define | YepIA64IsaFeatureBrl 0x0000000000000001ull |
Long branch instruction. | |
#define | YepIA64IsaFeatureAtomic128 0x0000000000000002ull |
Atomic 128-bit (16-byte) loads, stores, and CAS. | |
#define | YepIA64IsaFeatureClz 0x0000000000000004ull |
CLZ (count leading zeros) instruction. | |
#define | YepIA64IsaFeatureMpy4 0x0000000000000008ull |
MPY4 and MPYSHL4 (Truncated 32-bit multiplication) instructions. | |
ARM ISA Extensions | |
| |
#define | YepARMIsaFeatureV4 0x0000000000000001ull |
ARMv4 instruction set. | |
#define | YepARMIsaFeatureV5 0x0000000000000002ull |
ARMv5 instruciton set. | |
#define | YepARMIsaFeatureV5E 0x0000000000000004ull |
ARMv5 DSP instructions. | |
#define | YepARMIsaFeatureV6 0x0000000000000008ull |
ARMv6 instruction set. | |
#define | YepARMIsaFeatureV6K 0x0000000000000010ull |
ARMv6 Multiprocessing extensions. | |
#define | YepARMIsaFeatureV7 0x0000000000000020ull |
ARMv7 instruction set. | |
#define | YepARMIsaFeatureV7MP 0x0000000000000040ull |
ARMv7 Multiprocessing extensions. | |
#define | YepARMIsaFeatureThumb 0x0000000000000080ull |
Thumb mode. | |
#define | YepARMIsaFeatureThumb2 0x0000000000000100ull |
Thumb 2 mode. | |
#define | YepARMIsaFeatureThumbEE 0x0000000000000200ull |
Thumb EE mode. | |
#define | YepARMIsaFeatureJazelle 0x0000000000000400ull |
Jazelle extensions. | |
#define | YepARMIsaFeatureFPA 0x0000000000000800ull |
FPA instructions. | |
#define | YepARMIsaFeatureVFP 0x0000000000001000ull |
VFP instruction set. | |
#define | YepARMIsaFeatureVFP2 0x0000000000002000ull |
VFPv2 instruction set. | |
#define | YepARMIsaFeatureVFP3 0x0000000000004000ull |
VFPv3 instruction set. | |
#define | YepARMIsaFeatureVFPd32 0x0000000000008000ull |
VFP implementation with 32 double-precision registers. | |
#define | YepARMIsaFeatureVFP3HP 0x0000000000010000ull |
VFPv3 half precision extension. | |
#define | YepARMIsaFeatureVFP4 0x0000000000020000ull |
VFPv4 instruction set. | |
#define | YepARMIsaFeatureDiv 0x0000000000040000ull |
SDIV and UDIV instructions. | |
#define | YepARMIsaFeatureArmada 0x0000000000080000ull |
Marvell Armada instruction extensions. | |
ARM SIMD Extensions | |
| |
#define | YepARMSimdFeatureXScale 0x0000000000000001ull |
XScale instructions. | |
#define | YepARMSimdFeatureWMMX 0x0000000000000002ull |
Wireless MMX instruction set. | |
#define | YepARMSimdFeatureWMMX2 0x0000000000000004ull |
Wireless MMX 2 instruction set. | |
#define | YepARMSimdFeatureNEON 0x0000000000000008ull |
NEON (Advanced SIMD) instruction set. | |
#define | YepARMSimdFeatureNEONHP 0x0000000000000010ull |
NEON (Advanced SIMD) half-precision extension. | |
#define | YepARMSimdFeatureNEON2 0x0000000000000020ull |
NEON (Advanced SIMD) v2 instruction set. | |
ARM CPU and System Features | |
| |
#define | YepARMSystemFeatureVFPVectorMode 0x0000000100000000ull |
VFP vector mode is supported in hardware. | |
MIPS ISA Extensions | |
| |
#define | YepMIPSIsaFeatureR2 0x0000000000000001ull |
MIPS32/MIPS64 Release 2 architecture. | |
#define | YepMIPSIsaFeatureMicroMIPS 0x0000000000000002ull |
MicroMIPS extension. More... | |
#define | YepMIPSIsaFeatureFPU 0x0000000000000004ull |
FPU with S, D, and W formats and instructions. | |
#define | YepMIPSIsaFeatureMT 0x0000000000000008ull |
Multi-threading extension. | |
#define | YepMIPSIsaFeatureMIPS16 0x0000000000000010ull |
MIPS16 extension. | |
#define | YepMIPSIsaFeatureSmartMIPS 0x0000000000000020ull |
SmartMIPS extension. | |
MIPS SIMD Extensions | |
| |
#define | YepMIPSSimdFeatureMDMX 0x0000000000000001ull |
MDMX instruction set. | |
#define | YepMIPSSimdFeatureMIPS3D 0x0000000000000002ull |
MIPS3D instruction set. | |
#define | YepMIPSSimdFeaturePairedSingle 0x0000000000000004ull |
Paired-single instructions. | |
#define | YepMIPSSimdFeatureDSP 0x0000000000000008ull |
MIPS DSP extension. | |
#define | YepMIPSSimdFeatureDSP2 0x0000000000000010ull |
MIPS DSP Release 2 extension. | |
#define | YepMIPSSimdFeatureGodsonMMX 0x0000000000000020ull |
Loongson (Godson) MMX instruction set. More... | |
#define | YepMIPSSimdFeatureIMX 0x0000000000000040ull |
Ingenic Media Extension. | |
#define YepX86SimdFeatureMMX 0x0000000000000001ull |
MMX instruction set.
#define YepX86SimdFeatureMMXPlus 0x0000000000000002ull |
MMX+ instruction set.
#define YepX86SimdFeature3dnow 0x0000000000000008ull |
3dnow! instruction set.
#define YepX86SimdFeature3dnowPlus 0x0000000000000010ull |
3dnow!+ instruction set.
#define YepX86SimdFeatureSSE 0x0000000000000080ull |
SSE instruction set.
#define YepX86SimdFeatureSSE2 0x0000000000000100ull |
SSE 2 instruction set.
#define YepX86SimdFeatureSSE3 0x0000000000000200ull |
SSE 3 instruction set.
#define YepX86SimdFeatureSSSE3 0x0000000000000400ull |
SSSE 3 instruction set.
#define YepX86SimdFeatureSSE4_1 0x0000000000000800ull |
SSE 4.1 instruction set.
#define YepX86SimdFeatureSSE4_2 0x0000000000001000ull |
SSE 4.2 instruction set.
#define YepX86SimdFeatureSSE4A 0x0000000000002000ull |
SSE 4A instruction set.
#define YepX86SimdFeatureAVX 0x0000000000004000ull |
AVX instruction set.
#define YepX86SimdFeatureAVX2 0x0000000000008000ull |
AVX 2 instruction set.
#define YepX86SimdFeatureXOP 0x0000000000010000ull |
XOP instruction set.
#define YepX86SimdFeatureF16C 0x0000000000020000ull |
F16C instruction set.
#define YepX86SimdFeatureFMA3 0x0000000000040000ull |
FMA3 instruction set.
#define YepX86SimdFeatureFMA4 0x0000000000080000ull |
FMA4 instruction set.
#define YepX86SimdFeatureKNC 0x0000000000200000ull |
Knights Corner (aka Xeon Phi) instruction set.
#define YepMIPSIsaFeatureMicroMIPS 0x0000000000000002ull |
MicroMIPS extension.
#define YepMIPSSimdFeatureGodsonMMX 0x0000000000000020ull |
Loongson (Godson) MMX instruction set.
Returns information about the supported ISA extensions (excluding SIMD extensions)
[out] | isaFeatures | Pointer to a 64-bit mask where information about the supported ISA extensions will be stored. |
YepStatusOk | The information successfully stored to the mask pointed by isaFeatures parameter. |
YepStatusNullPointer | The isaFeatures pointer is null. |
Returns information about the supported SIMD extensions.
[out] | simdFeatures | Pointer to a 64-bit mask where information about the supported SIMD extensions will be stored. |
YepStatusOk | The information successfully stored to the mask pointed by simdFeatures parameter. |
YepStatusNullPointer | The simdFeatures pointer is null. |
Returns information about processor features other than ISA extensions, and OS features related to CPU.
[out] | systemFeatures | Pointer to a 64-bit mask where information about extended processor and system features will be stored. |
YepStatusOk | The information successfully stored to the mask pointed by systemFeatures parameter. |
YepStatusNullPointer | The systemFeatures pointer is null. |